.\" $NetBSD: clmpcc.4,v 1.7 2017/02/17 22:24:47 christos Exp $
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.\" by Steve C. Woodford.
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.Dd February 17, 2017
.Dt CLMPCC 4 mvme68k
.Os
.Sh NAME
.Nm clmpcc
.Nd Cirrus Logic CD2400/CD2401 serial communications controller
.Sh SYNOPSIS
.Cd "clmpcc0   at pcctwo? ipl 4"
.Sh DESCRIPTION
The
.Nm
driver provides support for the Cirrus Logic CD2401 Multi-protocol
Communications Controller found on Motorola MVME167 and MVME177
single-board computers.
.Pp
The chip integrates four serial channels in one package,
with each channel being completely independent and capable of
running in Async (with optional DMA control), Bisync, HDLC/SDLC and
X.21 modes. Each channel has 32 bytes of FIFO, split into 16 bytes
for the Tx side and 16 bytes for the Rx side.
.Pp
At the present time, the
.Nm
driver supports the non-DMA Async mode of operation, using the
channel FIFOs to maximize throughput with minimal interrupt overhead.
.Pp
The Motorola MVME1x7 boards provide a 20MHz master clock to the device,
which allows the Tx and Rx side to be independently set to any
baud rate in the range 50 to 57600.
The device should be capable of running at
a baud rate of 115200, however it is not a rate documented in the
device's datasheet for Async. mode so is not recommended.
.Sh FILES
.Bl -tag -width Pa
.It Pa /dev/console
.It Pa /dev/ttyC1
.It Pa /dev/ttyC2
.It Pa /dev/ttyC3
.El
.Sh DIAGNOSTICS
.Bl -diag
.It clmpcc%d: channel %d command timeout (idle)
The chip failed to acknowledge a command sent to the specified
channel.
.It clmpcc%d: Failed to reset chip
The
.Nm
driver was unable to determine if the chip completed
its RESET processing.
.El
.Sh SEE ALSO
.Xr mvme68k/pcctwo 4 ,
.Xr tty 4
.Sh HISTORY
The
.Nm
driver first appeared in
.Nx 1.4
and is
.Ud
.Sh BUGS
The hardware flow control features of the chip are not yet fully
supported.