.\"	$NetBSD: zstty.4,v 1.16 2017/09/12 14:48:11 wiz Exp $
.\"
.\" Copyright (c) 1997 The NetBSD Foundation, Inc.
.\" All rights reserved.
.\"
.\" This code is derived from software contributed to The NetBSD Foundation
.\" by Gordon W. Ross.
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.\" modification, are permitted provided that the following conditions
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.Dd September 12, 2017
.Dt ZSTTY 4
.Os
.Sh NAME
.Nm zstty ,
.Nm zsc ,
.Nm zs
.Nd Zilog 8530 Serial Communications Controller (SCC) for RS-232C, RS-422, and RS-423
.Sh SYNOPSIS
.Cd options PPS_SYNC
.Cd options PPS_TRAILING_EDGE
.Ss alpha ( DEC 3000 )
.Cd "zsc0	at ioasic? offset 0x100000"
.Cd "zsc1	at ioasic? offset 0x180000"
.Cd "zstty0	at zsc0 channel ?	# serial ports on B channels"
.Cd "zstty2	at zsc1 channel ?	# serial ports on B channels"
.Cd "lkkbd0	at zsc1 channel ?	# keyboard port on A channels"
.Cd "vsms0	at zsc0 channel ?	# mouse port on A channels"
.Ss cesfic
.Cd "zsc*	at mainbus0"
.Cd "zstty*	at zsc? channel ?"
.Ss cobalt
.Cd "zsc0	at mainbus? addr 0x1c800000 irq 4"
.Cd "zstty0	at zsc0 channel 0"
.Cd "zstty1	at zsc0 channel 1"
.Ss ews4800mips
.Cd "zsc0	at sbdio?"
.Cd "zstty0	at zsc? channel 0	# SIO ch-A"
.Cd "zstty1	at zsc? channel 1	# SIO ch-B"
.Ss mac68k and macppc
.Cd "zsc0	at obio?"
.Cd "zstty*	at zsc? channel ?"
.Cd options ZS_TXDMA
.Ss mipsco
.Cd "zsc0	at obio0 addr 0xbb000000"
.Cd "zstty0	at zsc0 channel 0"
.Cd "zstty1	at zsc0 channel 1"
.Ss mvme68k
.Cd "zsc*	at pcc? ipl 4"
.Cd "zsc*	at pcctwo? ipl 4"
.Cd "zstty*	at zsc? channel ?"
.Ss news68k
.Cd "zsc0	at hb0 addr 0xe0d40000 ipl 5 vect 64 flags 0x0	# news1700"
.Cd "zsc0	at hb1 addr 0xe1780000 ipl 5 vect 64 flags 0x1	# news1200"
.Cd "zstty0	at zsc0 channel 0"
.Cd "zstty1	at zsc0 channel 1"
.Ss newsmips
.Cd "zsc0	at hb0 addr 0xbfec0000 level 1 flags 0x0	# on-board"
.Cd "zsc1	at hb0 addr 0xb8c40100 level 1 flags 0x1	# expansion board"
.Cd "zsc2	at hb0 addr 0xb8c40104 level 1 flags 0x1"
.Cd "zsc0	at ap?"
.Cd "zstty0	at zsc0 channel 0"
.Cd "zstty1	at zsc0 channel 1"
.Cd "zstty2	at zsc1 channel 0"
.Cd "zstty3	at zsc1 channel 1"
.Cd "zstty4	at zsc2 channel 0"
.Cd "zstty5	at zsc2 channel 1"
.Ss next68k
.Cd "zsc0	at intio? ipl 5"
.Cd "#zsc1	at intio? ipl 5"
.Cd "zstty0	at zsc0 channel 0	# Serial Port A"
.Cd "zstty1	at zsc0 channel 1	# Serial Port B"
.Ss pmax
.Cd "zsc0	at	ioasic? offset 0x100000 # Z85C30"
.Cd "zsc1	at	ioasic? offset 0x180000 # Z85C30"
.Cd "zstty*	at	zsc? channel ?		# serial ports on B/A channels"
.Cd "lkkbd*	at	zsc1 channel ?		# keyboard port on A channels"
.Cd "vsms*	at	zsc0 channel ?		# mouse port on A channels"
.Ss sgimips
.Cd "zsc* 	at hpc0 offset ?"
.Cd "zstty*	at zsc? channel ?"
.Ss sparc
.Cd "zs0	at mainbus0				# sun4c"
.Cd "zs0	at obio0				# sun4m"
.Cd "zs0	at obio0 addr 0xf1000000 level 12	# sun4/200 and sun4/300"
.Cd "zs0	at obio0 addr 0x01000000 level 12	# sun4/100"
.Cd "zstty0	at zs0 channel 0			# ttya"
.Cd "zstty1	at zs0 channel 1			# ttyb"
.Cd "zs1	at mainbus0				# sun4c"
.Cd "zs1	at obio0				# sun4m"
.Cd "zs1	at obio0 addr 0xf0000000 level 12	# sun4/200 and sun4/300"
.Cd "zs1	at obio0 addr 0x00000000 level 12	# sun4/100"
.Cd "kbd0	at zs1 channel 0			# keyboard"
.Cd "ms0	at zs1 channel 1			# mouse"
.Cd "zs2	at obio0 addr 0xe0000000 level 12	# sun4/300"
.Cd "zstty2	at zs2 channel 0			# ttyc"
.Cd "zstty3	at zs2 channel 1			# ttyd"
.Ss sparc64
.Cd "zs*	at sbus? slot ? offset ?"
.Cd "zs*	at fhc?"
.Cd "zstty*	at zs? channel ?			# ttys"
.Cd "kbd0	at zstty?"
.Cd "ms0	at zstty?"
.Ss sun2
.Cd "zs0	at obio0 addr 0x002000	# 2/120, 2/170"
.Cd "zs1	at obmem0 addr 0x780000	# 2/120, 2/170"
.Cd "zs0	at obio0 addr 0x7f2000	# 2/50"
.Cd "zs1	at obio0 addr 0x7f1800	# 2/50"
.Cd "zs2	at mbmem0 addr 0x080800	# 2/120, 2/170 (first sc SCSI)"
.Cd "zs3	at mbmem0 addr 0x081000	# 2/120, 2/170 (first sc SCSI)"
.Cd "zs4	at mbmem0 addr 0x084800	# 2/120, 2/170 (second sc SCSI)"
.Cd "zs5	at mbmem0 addr 0x085000	# 2/120, 2/170 (second sc SCSI)"
.Cd "zstty*	at zs? channel ?	# ttya"
.Cd "kbd0	at zstty?		# keyboard"
.Cd "ms0	at zstty?		# mouse"
.Ss sun3
.Cd "zstty0	at zsc1 channel 0	# ttya"
.Cd "zstty1	at zsc1 channel 1	# ttyb"
.Cd "kbd0	at zsc0 channel 0	# keyboard"
.Cd "ms0	at zsc0 channel 1	# mouse"
.Ss x68k
.Cd "zsc0	at intio0 addr 0xe98000 intr 112"
.Cd "zstty0	at zsc0 channel 0		# built-in RS-232C"
.Cd "ms0	at zsc0 channel 1		# standard mouse"
.Cd "#zsc1	at intio0 addr 0xeafc00 intr 113"
.Cd "#zstty2	at zsc1 channel 0"
.Cd "#zstty3	at zsc1 channel 1"
.Cd "#zsc2	at intio0 addr 0xeafc10 intr 114"
.Cd "#zstty4	at zsc2 channel 0"
.Cd "#zstty5	at zsc2 channel 1"
.Sh DESCRIPTION
The
.Nm
driver provides TTY support for Zilog 8530 Dual UART chips.
.Pp
Input and output for each line may set to any baud rate in the
range 50 to 38400 (and higher on some machines).
.Pp
The
.Em PPS_SYNC
option enables code to use the Data Carrier Detect (DCD) signal line for attachment
to an external precision clock source (e.g., GPS, CDMA)
which generates a Pulse Per Second (PPS) signal.
This is used by
.Xr ntpd 8
to discipline the system clock, and more accurately count/measure time.
See
.Xr options 4
for more discussion.
.Sh FILES
.Ss alpha
.Bl -tag -width Pa
.It Pa /dev/ttyB0
.It Pa /dev/ttyB1
.El
.Ss pmax
.Bl -tag -width Pa
.It Pa /dev/ttya
.It Pa /dev/ttyb
.It Pa /dev/ttyc
.It Pa /dev/ttyd
.El
.Ss sparc
.Bl -tag -width Pa
.It Pa /dev/ttya
.It Pa /dev/ttyb
.It Pa /dev/ttyc
.It Pa /dev/ttyd
.El
.Ss sparc64, sun2, sun3
.Bl -tag -width Pa
.It Pa /dev/ttya
.It Pa /dev/ttyb
.El
.Ss others
.Bl -tag -width Pa
.It Pa /dev/ttyZ0
.It Pa /dev/ttyZ1
.El
.Sh DIAGNOSTICS
.Bl -tag -width indent
.It zs0*: fifo overflow
.br
The on-chip
.Dq FIFO
has overflowed and incoming data has been lost.
This generally means the machine is not responding to
interrupts from the ZS chip fast enough, which can be
remedied only by using a lower baud rate.
.It zs0*: ring overflow
.br
The software input
.Qq ring
has overflowed.
This usually means input flow-control is not configured correctly
.Pq i.e. incorrect cable wiring .
.El
.Sh SEE ALSO
.Xr kbd 4 ,
.Xr ms 4 ,
.Xr options 4 ,
.Xr tty 4 ,
.Xr ntpd 8
.Sh HISTORY
The
.Nm
driver was derived from the
.Nm sparc
.Nm zs
driver supplied with
.Bx 4.4
.Ux .
.Sh CAVEATS
.Pa /dev/ttyB1
on alpha is created by
.Xr MAKEDEV 8
with minor number 2, so the corresponding device should be zstty2, not zstty1.
.Sh BUGS
The old Zilog 8530 chip has a very small FIFO (3 bytes?) and
therefore has very strict latency requirements for the
interrupt service routine.
This limits the usable baud rates on many machines.