diff -Nru linux/COPYING linux-2.4.19-pre5-mjc/COPYING
--- linux/COPYING	Tue Oct  9 18:00:06 2001
+++ linux-2.4.19-pre5-mjc/COPYING	Sat Apr  6 08:25:56 2002
@@ -307,7 +307,7 @@
 the "copyright" line and a pointer to where the full notice is found.
 
     <one line to give the program's name and a brief idea of what it does.>
-    Copyright (C) 19yy  <name of author>
+    Copyright (C) <year>  <name of author>
 
     This program is free software; you can redistribute it and/or modify
     it under the terms of the GNU General Public License as published by
@@ -329,7 +329,7 @@
 If the program is interactive, make it output a short notice like this
 when it starts in an interactive mode:
 
-    Gnomovision version 69, Copyright (C) 19yy name of author
+    Gnomovision version 69, Copyright (C) year name of author
     Gnomovision comes with ABSOLUTELY NO WARRANTY; for details type `show w'.
     This is free software, and you are welcome to redistribute it
     under certain conditions; type `show c' for details.
diff -Nru linux/CREDITS linux-2.4.19-pre5-mjc/CREDITS
--- linux/CREDITS	Mon Feb 25 14:37:50 2002
+++ linux-2.4.19-pre5-mjc/CREDITS	Sat Apr  6 16:07:14 2002
@@ -434,6 +434,7 @@
 E: lars@nocrew.org
 W: http://lars.nocrew.org/
 D: dsp56k device driver
+D: ptrace proxy in user mode kernel port
 S: Kopmansg 2
 S: 411 13  Goteborg
 S: Sweden
@@ -501,6 +502,14 @@
 S: Fremont, California 94539
 S: USA
 
+N: Florent Chabaud
+E: florent.chabaud@polytechnique.org
+D: software suspend
+S: SGDN/DCSSI
+S: 58, Bd Latour-Maubourg
+S: 75700 Paris 07 SP
+S: France
+
 N: Gordon Chaffee
 E: chaffee@cs.berkeley.edu
 W: http://bmrc.berkeley.edu/people/chaffee/
@@ -586,6 +595,13 @@
 S: University of Michigan
 S: Ann Arbor, MI
 
+N: Michael Cornwell
+E: cornwell@acm.org
+D: Original designer and co-author of ATA Taskfile
+D: Kernel module SMART utilities
+S: Santa Cruz, California
+S: USA
+
 N: Kees Cook
 E: cook@cpoint.net
 W: http://outflux.net/
@@ -706,7 +722,7 @@
 E: jdike@karaya.com
 W: http://user-mode-linux.sourceforge.net
 D: User mode kernel port
-S: RR1 Box 67C
+S: 375 Tubbs Hill Rd
 S: Deering NH 03244
 S: USA
 
@@ -981,8 +997,8 @@
 
 N: Nigel Gamble
 E: nigel@nrg.org
-E: nigel@sgi.com
 D: Interrupt-driven printer driver
+D: Preemptible kernel
 S: 120 Alley Way
 S: Mountain View, California 94040
 S: USA
@@ -1184,22 +1200,19 @@
 
 N: Andre Hedrick
 E: andre@linux-ide.org
-E: andre@aslab.com
-E: andre@suse.com
+E: andre@linuxdiskcert.org
 W: http://www.linux-ide.org/
+W: http://www.linuxdiskcert.org/
 D: Random SMP kernel hacker...
 D: Uniform Multi-Platform E-IDE driver
 D: Active-ATA-Chipset maddness..........
-D: Ultra DMA 100/66/33
-D: ATA-Disconnect
+D: Ultra DMA 133/100/66/33 w/48-bit Addressing
+D: ATA-Disconnect, ATA-TCQ
 D: ATA-Smart Kernel Daemon
+D: Serial ATA
+D: ATA Command Block and Taskfile
 S: Linux ATA Development (LAD)
 S: Concord, CA
-S: ASL, Inc. 1-877-ASL-3535
-S: 1757 Houret Court, Milpitas, CA 95035
-S: SuSE Linux, Inc.
-S: 580 Second Street, Suite 210  Oakland, CA  94607
-S: USA
 
 N: Jochen Hein
 E: jochen@jochen.org
@@ -1574,8 +1587,10 @@
 S: Luxembourg
 
 N: Gerd Knorr
-E: kraxel@goldbach.in-berlin.de
-D: SCSI CD-ROM driver hacking, vesafb, v4l, minor bug fixes
+W: http://bytesex.org
+E: kraxel@bytesex.org
+E: kraxel@suse.de
+D: video4linux, bttv, vesafb, some scsi, misc fixes
 
 N: Harald Koenig
 E: koenig@tat.physik.uni-tuebingen.de
@@ -1652,6 +1667,13 @@
 S: San Antonio, Texas 78269-1886
 S: USA
 
+N: Denis O. Kropp
+E: dok@directfb.org
+D: NeoMagic framebuffer driver
+S: Badensche Str. 46
+S: 10715 Berlin
+S: Germany
+
 N: Andrzej M. Krzysztofowicz
 E: ankry@mif.pg.gda.pl
 D: Some 8-bit XT disk driver and devfs hacking 
@@ -1683,6 +1705,11 @@
 S: D-91080 Uttenreuth
 S: Germany
 
+N: Gabor Kuti
+E: seasons@falcon.sch.bme.hu
+E: seasons@makosteszta.sote.hu
+D: Author and Maintainer for Software Suspend
+
 N: Jaroslav Kysela
 E: perex@suse.cz
 W: http://www.perex.cz
@@ -1855,7 +1882,8 @@
 E: pavel@ucw.cz
 E: pavel@suse.cz
 D: Softcursor for vga, hypertech cdrom support, vcsa bugfix, nbd
-D: sun4/330 port, capabilities for elf, speedup for rm on ext2, USB
+D: sun4/330 port, capabilities for elf, speedup for rm on ext2, USB,
+D: x86-64 port, software suspend
 S: Volkova 1131
 S: 198 00 Praha 9
 S: Czech Republic
@@ -1895,13 +1923,13 @@
 S: USA
 
 N: Petko Manolov
-E: petkan@dce.bg
-D: USB ethernet (pegasus) driver
-D: optimizing i[45]86 string routines
-D: i386 task swithing hacks
-S: 5, Vrah Mancho str.
-S: 1324 Sofia
-S: Bulgaria
+E: petkan@users.sourceforge.net
+D: USB ethernet pegasus/pegasus-II driver
+D: i[45]86 optimized string routines
+D: i386 task switching hacks
+S: 482 Shadowgraph Dr.
+S: San Jose, CA  95110
+S: USA
 
 N: Martin Mares
 E: mj@ucw.cz
@@ -2130,6 +2158,10 @@
 S: Fullarton 5063
 S: South Australia
 
+N. Wolfgang Muees
+E: wmues@nexgo.de
+D: Auerswald USB driver
+
 N: Ian A. Murdock
 E: imurdock@gnu.ai.mit.edu
 D: Creator of Debian distribution
@@ -2513,6 +2545,7 @@
 
 N: Thiago Berlitz Rondon
 E: maluco@mileniumnet.com.br
+W: http://vivaldi.linuxms.com.br/~maluco
 D: Miscellaneous kernel hacker
 S: R. Anhanguera, 1487 - Ipiranga
 S: 79080-740 - Campo Grande - Mato Grosso do Sul
@@ -3265,9 +3298,10 @@
 S: USA
 
 N: Richard Zidlicky
-E: rdzidlic@geocities.com,rdzidlic@cip.informatik.uni-erlangen.de
-W: http://www.geocities.com/SiliconValley/Bay/2602/
+E: rz@linux-m68k.org, rdzidlic@geocities.com
+W: http://www.geocities.com/rdzidlic
 D: Q40 port - see arch/m68k/q40/README
+D: various m68k hacks
 S: Germany
 
 N: Werner Zimmermann
diff -Nru linux/Documentation/Changes linux-2.4.19-pre5-mjc/Documentation/Changes
--- linux/Documentation/Changes	Fri Dec 21 12:41:53 2001
+++ linux-2.4.19-pre5-mjc/Documentation/Changes	Sat Apr  6 08:25:56 2002
@@ -31,7 +31,7 @@
 Eine deutsche Version dieser Datei finden Sie unter
 <http://www.stefan-winter.de/Changes-2.4.0.txt>.
 
-Last updated: May 9, 2001
+Last updated: February 13, 2002
 
 Chris Ricker (kaboom@gatech.edu or chris.ricker@genetics.utah.edu).
 
@@ -54,7 +54,8 @@
 o  util-linux             2.10o                   # fdformat --version
 o  modutils               2.4.2                   # insmod -V
 o  e2fsprogs              1.25                    # tune2fs
-o  reiserfsprogs          3.x.0j                  # reiserfsck 2>&1|grep reiserfsprogs
+o  jfsutils               1.0.12                  # fsck.jfs -V
+o  reiserfsprogs          3.x.1b                  # reiserfsck 2>&1|grep reiserfsprogs
 o  pcmcia-cs              3.1.21                  # cardmgr -V
 o  PPP                    2.4.0                   # pppd --version
 o  isdn4k-utils           3.1pre1                 # isdnctrl 2>&1|grep version
@@ -70,9 +71,9 @@
 necessarily to users of other CPUs. Users of other CPUs should obtain
 information about their gcc version requirements from another source.
 
-The recommended compiler for the kernel is gcc 2.95.3 or .4, and it
+The recommended compiler for the kernel is gcc 2.95.x (x >= 3), and it
 should be used when you need absolute stability. You may use gcc 3.0.x
-instead if you wish, although it may cause problems. Later  versions of gcc 
+instead if you wish, although it may cause problems. Later versions of gcc 
 have not received much testing for Linux kernel compilation, and there are 
 almost certainly bugs (mainly, but not exclusively, in the kernel) that
 will need to be fixed in order to use these compilers. In any case, using
@@ -106,14 +107,14 @@
 your kernel.  This change does, however, mean that you need a recent
 release of binutils.
 
-If you can, upgrade to the latest 2.9.5 or 2.10 binutils release.  Older
+If you can, upgrade to the latest 2.9.5 or 2.1x binutils release.  Older
 releases such as 2.8, 2.8.xx, and the FSF's 2.9.1 should be avoided if
 at all possible.  The later releases of 2.9.1.0.x (anything where x >= 22)
 can and do compile the kernel properly, but there are many benefits in
-upgrading to 2.9.5 or 2.10 if you're up to it.
+upgrading to 2.9.5 or 2.1x if you're up to it.
 
-System utils
-============
+System utilities
+================
 
 Architectural changes
 ---------------------
@@ -171,6 +172,16 @@
 The latest version of e2fsprogs fixes several bugs in fsck and
 debugfs.  Obviously, it's a good idea to upgrade.
 
+JFSutils
+--------
+
+The jfsutils package contains the utilities for the file system.
+The following utilities are available:
+o fsck.jfs - initiate replay of the transaction log, and check
+  and repair a JFS formatted partition.
+o mkfs.jfs - create a JFS formatted partition.
+o other file system utilities are also available in this package.
+
 Reiserfsprogs
 -------------
 
@@ -267,8 +278,8 @@
 Getting updated software
 ========================
 
-Compilers
-*********
+Kernel compilation
+******************
 
 egcs 1.1.2 (gcc 2.91.66)
 ------------------------
@@ -276,32 +287,22 @@
 
 gcc 2.95.3
 ----------
-o  <ftp://ftp.gnu.org/pub/gnu/gcc/gcc-2.95.3.tar.gz>
-
-Gnu Make
-********
+o  <ftp://ftp.gnu.org/gnu/gcc/gcc-2.95.3.tar.gz>
 
 Make 3.77
 ---------
 o  <ftp://ftp.gnu.org/gnu/make/make-3.77.tar.gz>
 
 Binutils
-********
-
-2.9.1 series
-------------
-o  <ftp://ftp.valinux.com/pub/support/hjl/binutils/2.9.1/binutils-2.9.1.0.25.tar.gz>
-
-2.9.5 and 2.10 series
----------------------
-o  <ftp://ftp.valinux.com/pub/support/hjl/binutils/>
+--------
+o  <ftp://ftp.kernel.org/pub/linux/devel/binutils/>
 
 System utilities
 ****************
 
 Util-linux
 ----------
-o  <ftp://ftp.kernel.org/pub/linux/utils/util-linux/util-linux-2.10o.tar.gz>
+o  <ftp://ftp.kernel.org/pub/linux/utils/util-linux/>
 
 Ksymoops
 --------
@@ -319,9 +320,13 @@
 ---------
 o  <http://prdownloads.sourceforge.net/e2fsprogs/e2fsprogs-1.25.tar.gz>
 
+JFSutils
+---------
+o  <http://oss.software.ibm.com/jfs/>
+
 Reiserfsprogs
 -------------
-o  <ftp://ftp.namesys.com/pub/reiserfsprogs/reiserfsprogs-3.x.0j.tar.gz>
+o  <ftp://ftp.namesys.com/pub/reiserfsprogs/reiserfsprogs-3.x.1b.tar.gz>
 
 LVM toolset
 -----------
@@ -345,10 +350,10 @@
 
 Powertweak
 ----------
-o  <http://powertweak.sourceforge.net>
+o  <http://powertweak.sourceforge.net/>
 
-Network
-*******
+Networking
+**********
 
 PPP
 ---
diff -Nru linux/Documentation/Configure.help linux-2.4.19-pre5-mjc/Documentation/Configure.help
--- linux/Documentation/Configure.help	Mon Feb 25 14:37:51 2002
+++ linux-2.4.19-pre5-mjc/Documentation/Configure.help	Sat Apr  6 16:07:15 2002
@@ -112,6 +112,31 @@
   like MGA monitors that you are very unlikely to see on today's
   systems.
 
+Software Suspend
+CONFIG_SOFTWARE_SUSPEND
+  Enable the possibilty of suspendig machine. It doesn't need APM.
+  You may suspend your machine by either pressing Sysrq-d or with
+  'swsusp' or 'shutdown -z <time>' (patch for sysvinit needed). It
+  creates an image which is saved in your active swaps. By the next
+  booting the kernel detects the saved image, restores the memory from
+  it and then it continues to run as before you've suspended.
+  If you don't want the previous state to continue use the 'noresume'
+  kernel option. However note that your partitions will be fsck'd and
+  you must re-mkswap your swap partitions/files.
+
+  Right now you may boot without resuming and then later resume but
+  in meantime you cannot use those swap partitions/files which were
+  involved in suspending. Also in this case there is a risk that buffers
+  on disk won't match with saved ones.
+
+  SMP is supported ``as-is''. There's a code for it but doesn't work.
+  There have been problems reported relating SCSI.
+  
+  This option is about getting stable. However there is still some
+  absence of features.
+
+  For more information take a look at Documentation/swsusp.txt.
+
 Symmetric Multi-Processing support
 CONFIG_SMP
   This enables support for systems with more than one CPU. If you have
@@ -266,6 +291,17 @@
   If you have a system with several CPUs, you do not need to say Y
   here: the local APIC will be used automatically.
 
+Preemptible Kernel
+CONFIG_PREEMPT
+  This option reduces the latency of the kernel when reacting to
+  real-time or interactive events by allowing a low priority process to
+  be preempted even if it is in kernel mode executing a system call.
+  This allows applications to run more reliably even when the system is
+  under load.
+
+  Say Y here if you are building a kernel for a desktop, embedded
+  real-time system.  Say N if you are unsure.
+
 Kernel math emulation
 CONFIG_MATH_EMULATION
   Linux can emulate a math coprocessor (used for floating point
@@ -723,6 +759,59 @@
   say M here and read <file:Documentation/modules.txt>.  The module
   will be called ide-floppy.o.
 
+AWARD Bios Work-Around
+CONFIG_IDEDISK_STROKE
+  Should you have a system w/ an AWARD Bios and your drives are larger
+  than 32GB and it will not boot, one is required to perform a few OEM
+  operations first.  The option is called "STROKE" because it allows
+  one to "soft clip" the drive to work around a barrier limit.  For
+  Maxtor drives it is called "jumpon.exe".  Please search Maxtor's
+  web-site for "JUMPON.EXE".  IBM has a similar tool at:
+  <http://www.storage.ibm.com/hdd/support/download.htm>.
+
+  If you are unsure, say N here.
+
+Raw Access to Media
+CONFIG_IDE_TASK_IOCTL
+  This is a direct raw access to the media.  It is a complex but
+  elegant solution to test and validate the domain of the hardware and
+  perform below the driver data recover if needed.  This is the most
+  basic form of media-forensics.
+
+  If you are unsure, say N here.
+
+Use Taskfile I/O
+CONFIG_IDE_TASKFILE_IO
+  This is the "Jewel" of the patch.  It will go away and become the new
+  driver core.  Since all the chipsets/host side hardware deal w/ their
+  exceptions in "their local code" currently, adoption of a
+  standardized data-transport is the only logical solution.
+  Additionally we packetize the requests and gain rapid performance and
+  a reduction in system latency.  Additionally by using a memory struct
+  for the commands we can redirect to a MMIO host hardware in the next
+  generation of controllers, specifically second generation Ultra133
+  and Serial ATA.
+
+  Since this is a major transition, it was deemed necessary to make the
+  driver paths buildable in separtate models.  Therefore if using this
+  option fails for your arch then we need to address the needs for that
+  arch.
+
+  If you want to test this functionality, say Y here.
+
+Force DMA
+CONFIG_BLK_DEV_IDEDMA_FORCED
+  This is an old piece of lost code from Linux 2.0 Kernels.
+
+  Generally say N here.
+
+DMA Only on Disks
+CONFIG_IDEDMA_ONLYDISK
+  This is used if you know your ATAPI Devices are going to fail DMA
+  Transfers.
+
+  Generally say N here.
+
 SCSI emulation support
 CONFIG_BLK_DEV_IDESCSI
   This will provide SCSI host adapter emulation for IDE ATAPI devices,
@@ -747,6 +836,14 @@
   If both this SCSI emulation and native ATAPI support are compiled
   into the kernel, the native support will be used.
 
+Use the NOOP Elevator (WARNING)
+CONFIG_BLK_DEV_ELEVATOR_NOOP
+  If you are using a raid class top-level driver above the ATA/IDE core,
+  one may find a performance boost by preventing a merging and re-sorting
+  of the new requests.
+
+  If unsure, say N.
+
 ISA-PNP EIDE support
 CONFIG_BLK_DEV_ISAPNP
   If you have an ISA EIDE card that is PnP (Plug and Play) and
@@ -1136,9 +1233,15 @@
 
 SiS5513 chipset support
 CONFIG_BLK_DEV_SIS5513
-  This driver ensures (U)DMA support for SIS5513 chipset based
-  mainboards. SiS620/530 UDMA mode 4, SiS5600/5597 UDMA mode 2, all
-  other DMA mode 2 limited chipsets are unsupported to date.
+  This driver ensures (U)DMA support for SIS5513 chipset family based
+  mainboards.
+
+  The following chipsets are supported:
+  ATA16:  SiS5511, SiS5513
+  ATA33:  SiS5591, SiS5597, SiS5598, SiS5600
+  ATA66:  SiS530, SiS540, SiS620, SiS630, SiS640
+  ATA100: SiS635, SiS645, SiS650, SiS730, SiS735, SiS740,
+          SiS745, SiS750
 
   If you say Y here, you need to say Y to "Use DMA by default when
   available" as well.
@@ -1982,6 +2085,11 @@
   which allows for more memory.  Your system is most probably
   running in M-Mode, so you should say N here.
 
+Lasi ethernet
+CONFIG_LASI_82596
+  Say Y here to support the on-board Intel 82596 ethernet controller
+  built into Hewlett-Packard PA-RISC machines.
+
 MIPS JAZZ onboard SONIC Ethernet support
 CONFIG_MIPS_JAZZ_SONIC
   This is the driver for the onboard card of MIPS Magnum 4000,
@@ -2513,6 +2621,19 @@
   If you want to compile it as a module, say M here and read
   <file:Documentation/modules.txt>.  If unsure, say `N'.
 
+Local NAT support
+CONFIG_IP_NF_NAT_LOCAL
+  This option enables support for NAT of locally originated connections. 
+  Enable this if you need to use destination NAT on connections
+  originating from local processes on the nat box itself.
+
+  Please note that you will need a recent version (>= 1.2.6a)
+  of the iptables userspace program in order to use this feature.
+  See http://www.iptables.org/ for download instructions.
+
+  If unsure, say 'N'.
+
+
 Full NAT (Network Address Translation)
 CONFIG_IP_NF_NAT
   The Full NAT option allows masquerading, port forwarding and other
@@ -3167,6 +3288,13 @@
   via the file /proc/rtc and its behaviour is set by various ioctls on
   /dev/rtc.
 
+Indy/I2 Hardware Watchdog
+CONFIG_INDYDOG
+  Hardwaredriver for the Indy's/I2's watchdog. This is a
+  watchdog timer that will reboot the machine after a 60 second 
+  timer expired and no process has written to /dev/watchdog during
+  that time.
+
 Support the Bell Technologies HUB6 card
 CONFIG_HUB6
   Say Y here to enable support in the dumb serial driver to support
@@ -4207,6 +4335,16 @@
   This driver supports the L7200 Color LCD.
   Say Y if you want graphics support.
 
+NeoMagic display support (EXPERIMENTAL)
+CONFIG_FB_NEOMAGIC
+  This driver supports notebooks with NeoMagic PCI chips.
+  Say Y if you have such a graphics card. 
+
+  The driver is also available as a module ( = code which can be
+  inserted and removed from the running kernel whenever you want). The
+  module will be called neofb.o. If you want to compile it as a
+  module, say M here and read Documentation/modules.txt.
+
 PowerMac "control" frame buffer device support
 CONFIG_FB_CONTROL
   This driver supports a frame buffer for the graphics adapter in the
@@ -4414,7 +4552,8 @@
 CONFIG_FB_MATROX
   Say Y here if you have a Matrox Millennium, Millennium II, Mystique,
   Mystique 220, Productiva G100, Mystique G200, Millennium G200,
-  Marvel G200 video, G400, G450, or G550 card in your box.
+  Matrox G400, G450 or G550 card in your box. At this time, support for 
+  the G-series digital output is almost non-existant.
 
   This driver is also available as a module ( = code which can be
   inserted and removed from the running kernel whenever you want).
@@ -4453,6 +4592,10 @@
   "I2C support" and "I2C bit-banging support" in the character devices
   section, and then to "Matrox I2C support" and "G400 second head
   support" here in the framebuffer section.
+  
+  If you have G550, you must also compile support for G450/G550 secondary
+  head into kernel, otherwise picture will be shown only on the output you
+  are probably not using...
 
   If you need support for G450 or G550 secondary head, say Y to
   "Matrox G450/G550 second head support" below.
@@ -4503,7 +4646,8 @@
 Matrox G450 second head support
 CONFIG_FB_MATROX_G450
   Say Y or M here if you want to use a secondary head (meaning two
-  monitors in parallel) on G450 or G550.
+  monitors in parallel) on G450, or if you are using analog output
+  of G550.
 
   If you compile it as module, two modules are created,
   matroxfb_crtc2.o and matroxfb_g450.o. Both modules are needed if you
@@ -4645,6 +4789,12 @@
   The IMS Twin Turbo is a PCI-based frame buffer card bundled with
   many Macintosh and compatible computers.
 
+CONFIG_FB_TX3912
+  The TX3912 is a Toshiba RISC processor based on the MIPS 3900 core;
+  see <http://www.toshiba.com/taec/components/Generic/risc/tx3912.htm>.
+
+  Say Y here to enable kernel support for the on-board framebuffer.
+
 Virtual Frame Buffer support (ONLY FOR TESTING!)
 CONFIG_FB_VIRTUAL
   This is a `virtual' frame buffer device. It operates on a chunk of
@@ -4796,6 +4946,13 @@
   bits per pixel packed pixels on Mac. It supports variable font
   widths for low resolution screens.
 
+Permedia3 support (EXPERIMENTAL)
+CONFIG_FB_PM3
+  This is the frame buffer device driver for the 3DLabs Permedia3
+  chipset, used in Formac ProFormance III, 3DLabs Oxygen VX1 &
+  similar boards, 3DLabs Permedia3 Create!, Appian Jeronimo 2000
+  and maybe other boards.
+
 HGA monochrome support
 CONFIG_FBCON_HGA
   This is the low level frame buffer console driver for Hercules mono
@@ -4951,6 +5108,19 @@
   replacement for kerneld.) Say Y here and read about configuring it
   in <file:Documentation/kmod.txt>.
 
+Kernel .config file saved in kernel image
+CONFIG_IKCONFIG
+  This option enables the complete Linux kernel ".config" file contents
+  to be saved in the kernel (zipped) image file.  It provides
+  documentation of which kernel options are used in a running kernel or
+  in an on-disk kernel.  It can be extracted from the kernel image file
+  with a script and used as input to rebuild the current kernel or to
+  build another kernel.  Since the kernel image is zipped, using this
+  option adds approximately 8 KB to a kernel image file.
+  This option is not available as a module.  If you want a separate
+  file to save the kernel's .config contents, use 'installkernel' or 'cp'
+  or a similar tool, or just save it in '/lib/modules/<kernel-version>'.
+
 ARP daemon support
 CONFIG_ARPD
   Normally, the kernel maintains an internal cache which maps IP
@@ -5959,6 +6129,12 @@
   This is a Logical Link Layer protocol used for X.25 connections over
   Ethernet, using ordinary Ethernet cards.
 
+ANSI/IEEE 802.2 Data link layer User Interface SAPs (EXPERIMENTAL)
+CONFIG_LLC_UI
+  LLC User Interface SAPs is a Linux socket interface into the LLC datalink
+  layer. This allows a user to create entire user space network layers tied
+  to a real SAP.
+
 Frame Diverter
 CONFIG_NET_DIVERT
   The Frame Diverter allows you to divert packets from the
@@ -6099,6 +6275,19 @@
   briefly removed during revalidation. If you say Y here, packets to
   such neighbours are silently discarded instead.
 
+RFC1483/2684 Bridged protocols
+CONFIG_ATM_BR2684
+  ATM PVCs can carry ethernet PDUs according to rfc2684 (formerly 1483)
+  This device will act like an ethernet from the kernels point of view,
+  with the traffic being carried by ATM PVCs (currently 1 PVC/device).
+  This is sometimes used over DSL lines.  If in doubt, say N.
+
+Per-VC IP filter kludge
+CONFIG_ATM_BR2684_IPFILTER
+  This is an experimental mechanism for users who need to terminating a
+  large number of IP-only vcc's.  Do not enable this unless you are sure
+  you know what you are doing.
+
 LAN Emulation (LANE) support
 CONFIG_ATM_LANE
   LAN Emulation emulates services of existing LANs across an ATM
@@ -6394,6 +6583,18 @@
   boards supported by this driver, and for further information
   on the use of this driver.
 
+SCSI tape drive support for Smart Array 5xxx
+CONFIG_CISS_SCSI_TAPE
+  When enabled (Y), this option allows SCSI tape drives and SCSI medium
+  changers (tape robots) to be accessed via a Compaq 5xxx array
+  controller.  (See Documentation/cciss.txt for more details.)
+
+  "SCSI support" and "SCSI tape support" must also be enabled for this
+  option to work.
+
+  When this option is disabled (N), the SCSI portion of the driver
+  is not compiled.
+
 QuickNet Internet LineJack/PhoneJack support
 CONFIG_PHONE_IXJ
   Say M if you have a telephony card manufactured by Quicknet
@@ -6411,6 +6612,12 @@
   If you do not have any Quicknet telephony cards, you can safely
   say N here.
 
+QuickNet Internet LineJack/PhoneJack PCMCIA support
+CONFIG_PHONE_IXJ_PCMCIA
+  Say Y here to configure in PCMCIA service support for the Quicknet
+  cards manufactured by Quicknet Technologies, Inc.  This builds an
+  additional support module for the PCMCIA version of the card.
+
 FORE Systems 200E-series
 CONFIG_ATM_FORE200E_MAYBE
   This is a driver for the FORE Systems 200E-series ATM adapter
@@ -7720,6 +7927,12 @@
   The module will be called qlogicfc.o.  If you want to compile it as
   a module, say M here and read <file:Documentation/modules.txt>.
 
+Include loadable firmware in driver
+CONFIG_SCSI_QLOGIC_FC_FIRMWARE
+  Say Y to include ISP2100 Fabric Initiator/Target Firmware, with
+  expanded LUN addressing and FcTape (FCP-2) support, in the
+  Qlogic QLA 1280 driver. This is required on some platforms.
+
 Qlogic QLA 1280 SCSI support
 CONFIG_SCSI_QLOGIC_1280
   Say Y if you have a QLogic ISP1x80/1x160 SCSI host adapter.
@@ -8869,6 +9082,7 @@
   The module will be called ibmtr_cs.o.  If you want to compile it as
   a module, say M here and read <file:Documentation/modules.txt>.
 
+
 Xircom Tulip-like CardBus support (old driver)
 CONFIG_PCMCIA_XIRTULIP
   This driver is for the Digital "Tulip" Ethernet CardBus adapters.
@@ -8882,6 +9096,19 @@
   it as a module, say M here and read
   <file:Documentation/modules.txt>. If unsure, say N.
 
+Xircom CardBus support (new driver)
+CONFIG_PCMCIA_XIRCOM
+  This driver is for the Digital "Tulip" Ethernet CardBus adapters.
+  It should work with most DEC 21*4*-based chips/ethercards, as well
+  as with work-alike chips from Lite-On (PNIC) and Macronix (MXIC) and
+  ASIX.
+
+  This driver is also available as a module ( = code which can be
+  inserted in and removed from the running kernel whenever you want).
+  The module will be called xircom_cb.o.  If you want to compile
+  it as a module, say M here and read
+  <file:Documentation/modules.txt>. If unsure, say N.
+
 PCMCIA Wireless LAN
 CONFIG_NET_PCMCIA_RADIO
   Say Y here if you would like to use a PCMCIA (PC-card) device to
@@ -9100,6 +9327,20 @@
 
   If you don't know what to use this for, you don't need it.
 
+Allow Net Devices to contribute to /dev/random
+CONFIG_NET_RANDOM
+  If you say Y here, network device interrupts will contribute to the
+  kernel entropy pool. Normally, block devices and some other devices
+  feed the pool. Some systems, such as those that are headless or diskless,
+  need additional entropy sources.  Some people, however, feel that network
+  devices should not contribute to /dev/random because an external attacker
+  could observe incoming packets in an attempt to learn the entropy pool's
+  state.  If you say N, no network device will contribute entropy.
+
+  If you believe there is a chance of your network packets being observed
+  and you doubt the security of the entropy pool's one-way hash, do not
+  enable this.  If unsure, say N.
+
 Ethertap network tap (OBSOLETE)
 CONFIG_ETHERTAP
   If you say Y here (and have said Y to "Kernel/User network link
@@ -9132,6 +9373,28 @@
   If you want to do that, say M here. The module will be called
   sealevel.o.
 
+TMPTX3912/PR31700 serial port support
+CONFIG_SERIAL_TX3912
+  The TX3912 is a Toshiba RISC processor based o the MIPS 3900 core;
+  see <http://www.toshiba.com/taec/components/Generic/risc/tx3912.htm>.
+  Say Y here to enable kernel support for the on-board serial port.
+
+Console on TMPTX3912/PR31700 serial port
+CONFIG_SERIAL_TX3912_CONSOLE
+  The TX3912 is a Toshiba RISC processor based o the MIPS 3900 core;
+  see <http://www.toshiba.com/taec/components/Generic/risc/tx3912.htm>.
+  Say Y here to direct console I/O to the on-board serial port.
+
+Enable Au1000 serial console
+CONFIG_AU1000_SERIAL_CONSOLE
+  If you have an Alchemy AU1000 processor (MIPS based) and you want
+  to use a console on a serial port, say Y.  Otherwise, say N.
+
+Enable Au1000 UART Support
+CONFIG_AU1000_UART
+  If you have an Alchemy AU1000 processor (MIPS based) and you want
+  to use serial ports, say Y.  Otherwise, say N.
+
 SyncLink HDLC/SYNCPPP support
 CONFIG_SYNCLINK_SYNCPPP
   Enables HDLC/SYNCPPP support for the SyncLink WAN driver.
@@ -9588,6 +9851,21 @@
   performance will be written to /proc/net/profile. If you don't know
   what it is about, you don't need it: say N.
 
+Network packet generator
+CONFIG_NET_PKTGEN
+  This module will inject preconfigured packets, at a configurable
+  rate, out of a given interface.  It is used for network interface
+  stress testing and performance analysis.  If you don't understand
+  what was just said, you don't neet it: say N.
+
+  Documentation on how to use the packet generator can be found
+  at <file:Documentation/networking/pktgen.txt>.
+
+  This code is also available as a module called pktgen.o ( = code
+  which can be inserted in and removed from the running kernel
+  whenever you want).  If you want to compile it as a module, say M
+  here and read <file:Documentation/modules.txt>.
+
 Wan interfaces support
 CONFIG_WAN
   Wide Area Networks (WANs), such as X.25, frame relay and leased
@@ -9893,6 +10171,20 @@
   <file:Documentation/modules.txt>.  The module will be called
   i810-tco.o.
 
+SliceCOM/PciCOM board support
+CONFIG_COMX_HW_MUNICH
+  Hardware driver for the 'SliceCOM' (channelized E1) and 'PciCOM'
+  boards (X21) from the MultiGate family.
+
+  This driver is also available as a module ( = code which can be
+  inserted in and removed from the running kernel whenever you want).
+  The module will be called comx-hw-munich.o. If you want to compile it
+  as a module, say M here and read <file:Documentation/modules.txt>.
+
+  Read linux/Documentation/networking/slicecom.txt for help on
+  configuring and using SliceCOM interfaces. Further info on these cards
+  can be found at http://www.itc.hu or <info@itc.hu>.
+
 Support for HDLC and syncPPP protocols on MultiGate boards
 CONFIG_COMX_PROTO_PPP
   Cisco-HDLC and synchronous PPP protocol driver for all MultiGate
@@ -10367,6 +10659,15 @@
   Support for the Sun GEM chip, aka Sun GigabitEthernet/P 2.0.  See also
   <http://www.sun.com/products-n-solutions/hardware/docs/pdf/806-3985-10.pdf>.
 
+Broadcom Tigon3 support
+CONFIG_TIGON3
+  This driver supports Broadcom Tigon3 based gigabit Ethernet cards.
+
+  If you want to compile this driver as a module ( = code which can be
+  inserted in and removed from the running kernel whenever you want),
+  say M here and read <file:Documentation/modules.txt>.  This is
+  recommended.  The module will be called tg3.o.
+
 MyriCOM Gigabit Ethernet support
 CONFIG_MYRI_SBUS
   This driver supports MyriCOM Sbus gigabit Ethernet cards.
@@ -11089,6 +11390,12 @@
   cards. Specifications and data at
   <http://www.myson.com.hk/mtd/datasheet/>.
 
+LP486E on board Ethernet
+CONFIG_LP486E
+  Say Y here to support the 82596-based on-board Ethernet controller
+  for the Panther motherboard, which is one of the two shipped in the
+  Intel Professional Workstation.
+
 ICL EtherTeam 16i/32 support
 CONFIG_ETH16I
   If you have a network (Ethernet) card of this type, say Y and read
@@ -11439,6 +11746,24 @@
   The module will be called smctr.o. If you want to compile it
   as a module, say M here and read <file:Documentation/modules.txt>.
 
+3COM 3C359 Token Link Velocity XL PCI adapter support
+CONFIG_3C359
+  This is support for the 3Com PCI Velocity XL cards, specifically
+  the 3Com 3C359, please note this is not for the 3C339 cards, you
+  should use the tms380 driver instead.
+
+  If you have such an adapter, say Y and read the Token-Ring
+  mini-HOWTO, available from <http://www.linuxdoc.org/docs.html#howto>.
+
+  This driver is also available as a module ( = code which can be
+  inserted in and removed from the running kernel whenever you want).
+  The module will will be called 3c359.o. If you want to compile it
+  as a module, say M here and read Documentation/modules.txt.
+
+  Also read the file <file:Documentation/networking/3c359.txt> or check the 
+  Linux Token Ring Project site for the latest information at
+  <http://www.linuxtr.net>
+
 Sun Happy Meal 10/100baseT support
 CONFIG_HAPPYMEAL
   This driver supports the "hme" interface present on most Ultra
@@ -11551,6 +11876,11 @@
   say M here and read <file:Documentation/modules.txt>.  This is
   recommended.  The module will be called skfp.o.
 
+Network logging support
+CONFIG_NETCONSOLE
+  If you want to log kernel messages over the network, then say
+  "M" here. See Documentation/networking/netlogging.txt for details.
+
 HIgh Performance Parallel Interface (HIPPI) support
 CONFIG_HIPPI
   HIgh Performance Parallel Interface (HIPPI) is a 800Mbit/sec and
@@ -12683,6 +13013,30 @@
   If you have an MGE Ellipse UPS, or you see timeouts in HID
   transactions, say Y; otherwise say N.
 
+EHCI (USB 2.0) support
+CONFIG_USB_EHCI_HCD
+  The Enhanced Host Controller Interface (EHCI) is standard for USB 2.0
+  "high speed" (480 Mbit/sec, 60 Mbyte/sec) host controller hardware.
+  If your USB host controller supports USB 2.0, you will likely want to
+  configure this Host Controller Driver.  At this writing, the primary
+  implementation of EHCI is a chip from NEC, widely available in add-on
+  PCI cards, but implementations are in the works from other vendors
+  including Intel and Philips.  Motherboard support is appearing.
+
+  EHCI controllers are packaged with "companion" host controllers (OHCI
+  or UHCI) to handle USB 1.1 devices connected to root hub ports.  Ports
+  will connect to EHCI if it the device is high speed, otherwise they
+  connect to a companion controller.  If you configure EHCI, you should
+  probably configure the OHCI (for NEC and some other vendors) USB Host
+  Controller Driver too.
+
+  You may want to read <file:Documentation/usb/ehci.txt>.
+
+  This code is also available as a module ( = code which can be
+  inserted in and removed from the running kernel whenever you want).
+  The module will be called ehci-hcd.o. If you want to compile it as a
+  module, say M here and read <file:Documentation/modules.txt>.
+
 UHCI (Intel PIIX4, VIA, ...) support
 CONFIG_USB_UHCI
   The Universal Host Controller Interface is a standard by Intel for
@@ -12927,6 +13281,34 @@
   The module will be called audio.o. If you want to compile it as a
   module, say M here and read <file:Documentation/modules.txt>.
 
+EMI 2|6 USB Audio interface support
+CONFIG_USB_EMI26
+  This driver loads firmware to Emagic EMI 2|6 low latency USB
+  Audio interface.
+
+  After firmware load the device is handled with standard linux
+  USB Audio driver.
+
+  This code is also available as a module ( = code which can be
+  inserted in and removed from the running kernel whenever you want).
+  The module will be called audio.o. If you want to compile it as a
+  module, say M here and read <file:Documentation/modules.txt>.
+			
+
+EMI 2|6 USB Audio interface support
+CONFIG_USB_EMI26
+  This driver loads firmware to Emagic EMI 2|6 low latency USB
+  Audio interface.
+
+  After firmware load the device is handled with standard linux
+  USB Audio driver.
+
+  This code is also available as a module ( = code which can be
+  inserted in and removed from the running kernel whenever you want).
+  The module will be called audio.o. If you want to compile it as a
+  module, say M here and read <file:Documentation/modules.txt>.
+			
+
 USB Modem (CDC ACM) support
 CONFIG_USB_ACM
   This driver supports USB modems and ISDN adapters which support the
@@ -12985,9 +13367,10 @@
 
 USB Compaq iPAQ Driver
 CONFIG_USB_SERIAL_IPAQ
-  Say Y here if you want to connect to your Compaq iPAQ running
-  Windows CE 3.0 using a USB autosync cable. For information on using
-  the driver, read <file:Documentation/usb/usb-serial.txt>.
+  Say Y here if you want to connect to your Compaq iPAQ or HP Jornada
+  548/568 running Windows CE 3.0 or PocketPC 2002 using a USB
+  cradle/cable. For information on using the driver,
+  read <file:Documentation/usb/usb-serial.txt>.
 
   This code is also available as a module ( = code which can be
   inserted in and removed from the running kernel whenever you want).
@@ -13375,12 +13758,12 @@
 
 Pegasus/Pegasus II based USB-Ethernet device support
 CONFIG_USB_PEGASUS
-  Say Y here if you know you have Pegasus or Pegasus II based adapter.
+  Say Y here if you know you have Pegasus or Pegasus-II based adapter.
   If in doubt then look at linux/drivers/usb/pegasus.h for the complete
   list of supported devices.
   If your particular adapter is not in the list and you are _sure_ it
-  is Pegasus or Pegasus II based then send me (pmanolov@lnxw.com) vendor
-  and device IDs.
+  is Pegasus or Pegasus-II based then send me (pmanolov@users.sourceforge.net)
+  vendor and device IDs.
 
   This code is also available as a module ( = code which can be
   inserted in and removed from the running kernel whenever you want).
@@ -13621,6 +14004,26 @@
   The module will be called rio500.o. If you want to compile it as
   a module, say M here and read <file:Documentation/modules.txt>.
 
+USB Auerswald ISDN device support
+CONFIG_USB_AUERSWALD
+  Say Y here if you want to connect an Auerswald USB ISDN Device
+  to your computer's USB port.
+
+  This code is also available as a module ( = code which can be
+  inserted in and removed from the running kernel whenever you want).
+  The module will be called auerswald.o. If you want to compile it as
+  a module, say M here and read <file:Documentation/modules.txt>.
+
+USB Auerswald ISDN device support
+CONFIG_USB_AUERSWALD
+  Say Y here if you want to connect an Auerswald USB ISDN Device
+  to your computer's USB port.
+
+  This code is also available as a module ( = code which can be
+  inserted in and removed from the running kernel whenever you want).
+  The module will be called auerswald.o. If you want to compile it as
+  a module, say M here and read <file:Documentation/modules.txt>.
+
 D-Link DSB-R100 FM radio support
 CONFIG_USB_DSBR
   Say Y here if you want to connect this type of radio to your
@@ -13651,7 +14054,7 @@
   Synchronous operation (i.e. always writing data to the host's disk
   immediately) is configurable on a per-UBD basis by using a special
   kernel command line option.  Alternatively, you can say Y here to
-  turn on synchronous operation by default for all block.
+  turn on synchronous operation by default for all block devices.
 
   If you're running a journalling file system (like reiserfs, for
   example) in your virtual machine, you will want to say Y here.  If
@@ -13663,6 +14066,7 @@
 CONFIG_PT_PROXY
   This option enables a debugging interface which allows gdb to debug
   the kernel without needing to actually attach to kernel threads.
+  CONFIG_XTERM_CHAN must be enabled in order to enable CONFIG_PT_PROXY.
   If you want to do kernel debugging, say Y here; otherwise say N.
 
 Management console
@@ -13857,26 +14261,116 @@
 
 SLIP transport
 CONFIG_UML_NET_SLIP
-  The Slip User-Mode Linux network transport allows a running UML to
+  The slip User-Mode Linux network transport allows a running UML to
   network with its host over a point-to-point link.  Unlike Ethertap,
   which can carry any Ethernet frame (and hence even non-IP packets),
-  the Slip transport can only carry IP packets.
+  the slip transport can only carry IP packets.
 
-  To use this, your host must support Slip devices.
+  To use this, your host must support slip devices.
 
   For more information, see
   <http://user-mode-linux.sourceforge.net/networking.html>.  That site
-  has examples of the UML command line to use to enable Slip
+  has examples of the UML command line to use to enable slip
   networking, and details of a few quirks with it.
 
-  The Ethertap Transport is preferred over Slip because of its
-  limitation.  If you prefer Slip, however, say Y here.  Otherwise
+  The Ethertap Transport is preferred over slip because of its
+  limitations.  If you prefer slip, however, say Y here.  Otherwise
   choose the Multicast transport (to network multiple UMLs on 
   multiple hosts), Ethertap (to network with the host and the
   outside world), and/or the Daemon transport (to network multiple
   UMLs on a single host).  You may choose more than one without
   conflict.  If you don't need UML networking, say N.
 
+Default main console channel initialization
+CONFIG_CON_ZERO_CHAN
+  This is the string describing the channel to which the main console
+  will be attached by default.  This value can be overridden from the
+  command line.  The default value is "fd:0,fd:1", which attaches the
+  main console to stdin and stdout.
+  It is safe to leave this unchanged.
+
+Default console channel initialization
+CONFIG_CON_CHAN
+  This is the string describing the channel to which all consoles
+  except the main console will be attached by default.  This value can
+  be overridden from the command line.  The default value is "xterm",
+  which brings them up in xterms.
+  It is safe to leave this unchanged, although you may wish to change
+  this if you expect the UML that you build to be run in environments
+  which don't have X or xterm available.
+
+Default serial line channel initialization
+CONFIG_SSL_CHAN
+  This is the string describing the channel to which the serial lines
+  will be attached by default.  This value can be overridden from the
+  command line.  The default value is "pty", which attaches them to
+  traditional pseudo-terminals.
+  It is safe to leave this unchanged, although you may wish to change
+  this if you expect the UML that you build to be run in environments
+  which don't have a set of /dev/pty* devices.
+
+UML sound support
+CONFIG_UML_SOUND
+  This option enables UML sound support.  If enabled, it will pull in
+  soundcore and the UML hostaudio relay, which acts as a intermediary
+  between the host's dsp and mixer devices and the UML sound system.
+  It is safe to say 'Y' here.
+
+UML SMP support
+CONFIG_UML_SMP
+  This option enables UML SMP support.  UML implements virtual SMP by
+  allowing as many processes to run simultaneously on the host as
+  there are virtual processors configured.  Obviously, if the host is
+  a uniprocessor, those processes will timeshare, but, inside UML,
+  will appear to be running simultaneously.  If the host is a
+  multiprocessor, then UML processes may run simultaneously, depending
+  on the host scheduler.
+  CONFIG_SMP will be set to whatever this option is set to.
+  It is safe to leave this unchanged.
+
+file descriptor channel support
+CONFIG_FD_CHAN
+  This option enables support for attaching UML consoles and serial
+  lines to already set up file descriptors.  Generally, the main
+  console is attached to file descriptors 0 and 1 (stdin and stdout),
+  so it would be wise to leave this enabled unless you intend to
+  attach it to some other host device.
+
+port channel support
+CONFIG_PORT_CHAN
+  This option enables support for attaching UML consoles and serial
+  lines to host portals.  They may be accessed with 'telnet <host>
+  <port number>'.  Any number of consoles and serial lines may be
+  attached to a single portal, although what UML device you get when
+  you telnet to that portal will be unpredictable.
+  It is safe to say 'Y' here.
+
+pty channel support
+CONFIG_PTY_CHAN
+  This option enables support for attaching UML consoles and serial
+  lines to host pseudo-terminals.  Access to both traditional
+  pseudo-terminals (/dev/pty*) and pts pseudo-terminals are controlled
+  with this option.  The assignment of UML devices to host devices
+  will be announced in the kernel message log.
+  It is safe to say 'Y' here.
+
+tty channel support
+CONFIG_TTY_CHAN
+  This option enables support for attaching UML consoles and serial
+  lines to host terminals.  Access to both virtual consoles
+  (/dev/tty*) and the slave side of pseudo-terminals (/dev/ttyp* and
+  /dev/pts/*) are controlled by this option.
+  It is safe to say 'Y' here.
+
+xterm channel support
+CONFIG_XTERM_CHAN
+  This option enables support for attaching UML consoles and serial
+  lines to xterms.  Each UML device so assigned will be brought up in
+  its own xterm.
+  If you disable this option, then CONFIG_PT_PROXY will be disabled as
+  well, since UML's gdb currently requires an xterm.
+  It is safe to say 'Y' here.
+
 Microtek USB scanner support
 CONFIG_USB_MICROTEK
   Say Y here if you want support for the Microtek X6USB and
@@ -14090,6 +14584,36 @@
   Because this option adds considerably to the size of each buffer,
   most people will want to say N here.
 
+BeOS filesystem support (BeFS) (read only)
+CONFIG_BEFS_FS
+  The BeOS File System (BeFS) is the native file system of Be, Inc's
+  BeOS. Notable features include support for arbitrary attributes
+  on files and directories, and database-like indices on selected
+  attributes. (Also note that this driver doesn't make those features
+  available at this time). It is a 64 bit filesystem, so it supports
+  extreemly large volumes and files.
+
+  If you use this filesystem, you should also say Y to at least one
+  of the NLS (native language support) options below.
+
+  If you don't know what this is about, say N.
+
+  If you want to compile this as a module ( = code which can be
+  inserted in and removed from the running kernel whenever you want),
+  say M here and read Documentation/modules.txt. The module will be
+  called befs.o.
+
+Debug BeFS
+CONFIG_BEFS_DEBUG
+  If you say Y here, you can use the 'debug' mount option to enable
+  debugging output from the driver. This is unlike previous versions
+  of the driver, where enableing this option would turn on debugging
+  output automaticly.
+  
+  Example:
+  mount -t befs /dev/hda2 /mnt -o debug
+
+
 BFS file system support
 CONFIG_BFS_FS
   Boot File System (BFS) is a file system used under SCO UnixWare to
@@ -14526,13 +15050,10 @@
   If you would like to include the NFSv3 server as well as the NFSv2
   server, say Y here.  If unsure, say Y.
 
-Provide NFS over TCP server support DEVELOPER ONLY
+Provide NFS over TCP server support EXPERIMENTAL
 CONFIG_NFSD_TCP
-  If you are a developer and want to work on fixing problems with
-  NFS server over TCP support, say Y here.  If unsure, say N.
-
-  Some problems can be found by looking for FIXME in
-  <file:net/sunrpc/svcsock.c>.
+  Enable NFS service over TCP connections.  This the officially
+  still experimental, but seems to work well.
 
 OS/2 HPFS file system support
 CONFIG_HPFS_FS
@@ -14674,10 +15195,12 @@
 
 QNX4 file system support (read only)
 CONFIG_QNX4FS_FS
-  This is the file system used by the operating system QNX 4. Say Y if
-  you intend to mount QNX hard disks or floppies. Unless you say Y to
-  "QNX4FS read-write support" below, you will only be able to read
-  these file systems.
+  This is the file system used by the real-time operating systems
+  QNX 4 and QNX 6 (the latter is also called QNX RTP).
+  Further information is available at <http://www.qnx.com/>.
+  Say Y if you intend to mount QNX hard disks or floppies.
+  Unless you say Y to "QNX4FS read-write support" below, you will
+  only be able to read these file systems.
 
   This file system support is also available as a module ( = code
   which can be inserted in and removed from the running kernel
@@ -14692,6 +15215,9 @@
 CONFIG_QNX4FS_RW
   Say Y if you want to test write support for QNX4 file systems.
 
+  It's currently broken, so for now:
+  answer N.
+
 Kernel automounter support
 CONFIG_AUTOFS_FS
   The automounter is a tool to automatically mount remote file systems
@@ -15012,6 +15538,25 @@
   hard drives and ADFS-formatted floppy disks. This is experimental
   codes, so if you're unsure, say N.
 
+JFS filesystem support
+CONFIG_JFS_FS
+  This is a port of IBM's Journaled Filesystem .  More information is
+  available in the file Documentation/filesystems/jfs.txt.
+
+  If you do not intend to use the JFS filesystem, say N.
+
+JFS Debugging
+CONFIG_JFS_DEBUG
+  If you are experiencing any problems with the JFS filesystem, say
+  Y here.  This will result in additional debugging messages to be
+  written to the system log.  Under normal circumstances, this
+  results in very little overhead.
+
+JFS Statistics
+CONFIG_JFS_STATISTICS
+  Enabling this option will cause statistics from the JFS file system
+  to be made available to the user in the /proc/fs/jfs/ directory.
+
 /dev/pts file system for Unix98 PTYs
 CONFIG_DEVPTS_FS
   You should say Y here if you said Y to "Unix98 PTY support" above.
@@ -16394,6 +16939,44 @@
   If you have a Cobalt Networks system, you should say Y here,
   unless you are absolutely sure.
 
+IT8172G Sound
+CONFIG_SOUND_IT8172
+  Say Y here to support the on-board sound generator on the Integrated
+  Technology Express, Inc. ITE8172 SBC.  Vendor page at
+  <http://www.ite.com.tw/ia/brief_it8172bsp.htm>; picture of the
+  board at <http://www.mvista.com/allies/semiconductor/ite.html>.
+
+UltraSPARC-III bootbus i2c controller driver
+CONFIG_BBC_I2C
+  The BBC devices on the UltraSPARC III have two I2C controllers.  The
+  first I2C controller connects mainly to configuration PROMs (NVRAM,
+  CPU configuration, DIMM types, etc.).  The second I2C controller
+  connects to environmental control devices such as fans and
+  temperature sensors.  The second controller also connects to the
+  smartcard reader, if present.  Say Y to enable support for these.
+
+ITE I2C Algorithm
+CONFIG_ITE_I2C_ALGO
+  This supports the use the ITE8172 I2C interface found on some MIPS
+  systems. Say Y if you have one of these. You should also say Y for
+  the ITE I2C peripheral driver support below.
+
+  This support is also available as a module. If you want to compile
+  it as a modules, say M here and read
+  <file:Documentation/modules.txt>.
+  The module will be called i2c-algo-ite.o.
+
+ITE I2C Adapter
+CONFIG_ITE_I2C_ADAP
+  This supports the ITE8172 I2C peripheral found on some MIPS
+  systems. Say Y if you have one of these. You should also say Y for
+  the ITE I2C driver algorithm support above.
+
+  This support is also available as a module. If you want to compile
+  it as a module, say M here and read
+  <file:Documentation/modules.txt>.
+  The module will be called i2c-adap-ite.o.
+
 I2C support
 CONFIG_I2C
   I2C (pronounce: I-square-C) is a slow serial bus protocol used in
@@ -16418,15 +17001,6 @@
   <file:Documentation/modules.txt>.
   The module will be called i2c-core.o.
 
-UltraSPARC-III bootbus i2c controller driver
-CONFIG_BBC_I2C
-  The BBC devices on the UltraSPARC III have two I2C controllers.  The
-  first I2C controller connects mainly to configuration PROMs (NVRAM,
-  CPU configuration, DIMM types, etc.).  The second I2C controller
-  connects to environmental control devices such as fans and
-  temperature sensors.  The second controller also connects to the
-  smartcard reader, if present.  Say Y to enable support for these.
-
 I2C bit-banging interfaces
 CONFIG_I2C_ALGOBIT
   This allows you to use a range of I2C adapters called bit-banging
@@ -17551,6 +18125,17 @@
   module, say M here and read <file:Documentation/modules.txt>.  Most
   people will say N.
 
+ALi M7101 Watchdog Timer
+CONFIG_ALIM7101_WDT
+  This is the driver for the hardware watchdog on the ALi M7101 PMU
+  as used in the x86 Cobalt servers.
+
+  This driver is also available as a module ( = code which can be
+  inserted in and removed from the running kernel whenever you want).
+  The module is called alim7101_wdt.o.  If you want to compile it as a
+  module, say M here and read <file:Documentation/modules.txt>.  Most
+  people will say N.
+
 IB700 SBC Watchdog Timer
 CONFIG_IB700_WDT
   This is the driver for the hardware watchdog on the IB700 Single
@@ -17592,6 +18177,18 @@
   The module is called machzwd.o.  If you want to compile it as a
   module, say M here and read <file:Documentation/modules.txt>.
 
+CONFIG_SC1200_WDT
+  This is a driver for National Semiconductor PC87307/PC97307 hardware
+  watchdog cards as found on the SC1200. This watchdog is mainly used
+  for power management purposes and can be used to power down the device
+  during inactivity periods (includes interrupt activity monitoring).
+
+  This driver is also available as a module ( = code which can be
+  inserted in and removed from the running kernel whenever you want).
+  The module is called sc1200wdt.o.  If you want to compile it as a
+  module, say M here and read <file:Documentation/modules.txt>.  Most
+  people will say N.
+
 SuperH 3/4 Watchdog
 CONFIG_SH_WDT
   This driver adds watchdog support for the integrated watchdog in the
@@ -17602,7 +18199,29 @@
   inserted in and removed from the running kernel whenever you want).
   The module is called shwdt.o. If you want to compile it as a module,
   say M here and read Documentation/modules.txt.
+
+Wafer 5823 Watchdog
+CONFIG_WAFER_WDT
+  This is a driver for the hardware watchdog on the ICP Wafer 5823
+  Single Board Computer (and probably other similar models).
+
+  This driver is also available as a module ( = code which can be
+  inserted in and removed from the running kernel whenever you want).
+  If you want to compile it as a module, say M here and read
+  <file:Documentation/modules.txt>. The module will be called
+  wafer5823wdt.o
 	      
+Machine Check Exception
+CONFIG_X86_MCE
+  Machine Check Exception support allows the processor to notify the
+  kernel if it detects a problem (e.g. overheating, component failure).
+  The action the kernel takes depends on the severity of the problem, 
+  ranging from a warning message on the console, to halting the machine.
+  You can safely select this on machines that do not support this feature.
+
+  For pentium machines the mce support defaults to off as the mainboard
+  support is not always present. You must activate it as a boot option.
+
 Toshiba Laptop support
 CONFIG_TOSHIBA
   This adds a driver to safely access the System Management Mode of
@@ -17690,6 +18309,28 @@
   CPU-1410 cards.  These are PC/104 SBCs. Spec sheets and product 
   information are at <http://www.eurotech.it/>.
 
+W83877F Watchdog Timer
+CONFIG_W83877F_WDT
+ This is the driver for the hardware watchdog on the W83877F chipset
+ as used in EMACS PC-104 motherboards (and may work on others). This
+ watchdog simply watches your kernel to make sure it doesn't freeze,
+ and if it does, it reboots your computer after a certain amount of
+ time.
+
+ You can compile this driver directly into the kernel, or use
+ it as a module.  The module will be called w83877f_wdt.o.
+
+SC520 (AMD Elan) Watchdog Timer
+CONFIG_SC520_WDT
+ This is the driver for the hardware watchdog built in to the
+ AMD "Elan" SC520 microcomputer commonly used in embedded systems.
+ This watchdog simply watches your kernel to make sure it doesn't
+ freeze, and if it does, it reboots your computer after a certain
+ amount of time.
+
+ You can compile this driver directly into the kernel, or use
+ it as a module.  The module will be called sc520_wdt.o.
+
 Enhanced Real Time Clock Support
 CONFIG_RTC
   If you say Y here and create a character special file /dev/rtc with
@@ -18184,7 +18825,7 @@
   then you can get the persistent DMA buffer functionality by passing
   the command-line argument "dmabuf=1" to the sound.o module.
 
-  Say Y unless you have 16MB or more RAM or a PCI sound card.
+  Say Y unless you have 16MB or less RAM or a PCI sound card.
 
 Support for Aztech Sound Galaxy (non-PnP) cards
 CONFIG_SOUND_SGALAXY
@@ -18360,6 +19001,12 @@
   <file:Documentation/sound/vwsnd> for more info on this driver's
   capabilities.
 
+NEC Vrc5477 AC97 sound
+CONFIG_SOUND_VRC5477
+  Say Y here to enable sound support for the NEC Vrc5477 chip, an
+  integrated, multi-function controller chip for MIPS CPUs.  Works
+  with the AC97 codec.
+
 Ensoniq SoundScape support
 CONFIG_SOUND_SSCAPE
   Answer Y if you have a sound card based on the Ensoniq SoundScape
@@ -18707,6 +19354,12 @@
   driver as a module you have to specify the MPU I/O base address with
   the parameter 'mpu_base=0xNNN'.
 
+SC-6600 CDROM Interface (4=None, 3=IDE, 1=Panasonic, 0=?Sony?)
+CONFIG_SC6600_CDROM
+  This is used to activate the CD-ROM interface of the Audio Excel
+  DSP 16 card. Enter: 0 for Sony, 1 for Panasonic, 2 for IDE, 4 for no
+  CD-ROM present.
+
 C-Media PCI (CMI8338/8378)
 CONFIG_SOUND_CMPCI
   Say Y or M if you have a PCI sound card using the CMI8338
@@ -18750,6 +19403,41 @@
   This package will among other things help you enable SPDIF 
   out/in/loop/monitor.
 
+Enable legacy FM
+CONFIG_SOUND_CMPCI_FM
+  Say Y here to enable the legacy FM (frequency-modulation) synthesis
+  support on a card using the CMI8338 or CMI8378 chipset.
+
+FM I/O 388, 3C8, 3E0, 3E8
+CONFIG_SOUND_CMPCI_FMIO
+  Set the base I/O address for FM synthesis control on a card using
+  the CMI8338 or CMI8378 chipset.
+
+Enable legacy MPU-401
+CONFIG_SOUND_CMPCI_MIDI
+  Say Y here to enable the legacy MP401 MIDI synthesis support on a
+  card using the CMI8338 or CMI8378 chipset.
+
+MPU-401 I/O 330, 320, 310, 300
+CONFIG_SOUND_CMPCI_MPUIO
+  Set the base I/O address for MP401 MIDI synthesis control on a card
+  using the CMI8338 or CMI8378 chipset.
+
+Inverse S/PDIF in for CMI8738
+CONFIG_SOUND_CMPCI_SPDIFINVERSE
+  Say Y here to have the driver invert the signal presented on SPDIF IN
+  of a card using the CMI8338 or CMI8378 chipset.
+
+Use Line-in as Read-out
+CONFIG_SOUND_CMPCI_LINE_REAR
+  Say Y here to enable using line-in jack as an output jack for a rear
+  speaker.
+
+Use Line-in as Bass
+CONFIG_SOUND_CMPCI_LINE_BASS
+  Say Y here to enable using line-in jack as an output jack for a bass
+  speaker.
+
 Creative SBLive! (EMU10K1) based PCI sound cards
 CONFIG_SOUND_EMU10K1
   Say Y or M if you have a PCI sound card using the EMU10K1 chipset,
@@ -18943,8 +19631,11 @@
 
 Yamaha YMF7xx PCI audio (native mode)
 CONFIG_SOUND_YMFPCI
-  Support for Yamaha cards including the YMF711, YMF715, YMF718,
-  YMF719, YMF724, Waveforce 192XG, and Waveforce 192 Digital.
+  Support for Yamaha cards with the following chipsets: YMF724,
+  YMF724F, YMF740, YMF740C, YMF744, and YMF754.
+
+  Two common cards that use this type of chip are Waveforce 192XG,
+  and Waveforce 192 Digital.
 
 Yamaha PCI legacy ports support
 CONFIG_SOUND_YMFPCI_LEGACY
@@ -18952,8 +19643,9 @@
 
 RME Hammerfall (RME96XX) support
 CONFIG_SOUND_RME96XX
-  Say Y or M if you have a Hammerfall, Hammerfall light or Hammerfall
-  DSP card from RME.
+  Say Y or M if you have a Hammerfall or Hammerfall light multichannel card 
+  from RME. If you want to acess advanced features of the card, read
+  Documentation/sound/rme96xx.
 
 Are you using a crosscompiler
 CONFIG_CROSSCOMPILE
@@ -19504,6 +20196,10 @@
   This enables the PCMCIA client driver for the Sedlbauer Speed Star
   and Speed Star II cards.
 
+CONFIG_HISAX_AVM_A1_CS
+  This enables the PCMCIA client driver for the AVM A1 / Fritz!Card
+  PCMCIA cards.
+
 ST5481 USB ISDN modem
 CONFIG_HISAX_ST5481
   This enables the driver for ST5481 based USB ISDN adapters,
@@ -20027,9 +20723,13 @@
 Sun 3 support
 CONFIG_SUN3
   This option enables support for the Sun 3 series of workstations.
-  Currently, only the Sun 3/80 is supported within the Sun 3x family.
-  You will also want to enable 68030 support.  General Linux
-  information on the Sun 3x series (now discontinued) is at
+  Note that if this option is enabled, support for all other m68k 
+  platforms above must be disabled in order to produce a working 
+  kernel.
+
+  Also, you will want to enable 68020 support below, and disable 
+  all other CPU types.  General Linux information on the Sun 3x series
+  (now discontinued) is at
   <http://www.angelfire.com/ca2/tech68k/sun3.html>.
 
   If you don't want to compile a kernel for a Sun 3, say N.
@@ -20037,8 +20737,8 @@
 Sun 3X support
 CONFIG_SUN3X
   This option enables support for the Sun 3x series of workstations.
-  Be warned that this support is very experimental. You will also want
-  to say Y to 68020 support and N to the other processors below.
+  Currently, only the Sun 3/80 is supported within the Sun 3x family.
+  You will also want to enable 68030 support below  
   General Linux information on the Sun 3x series (now discontinued)
   is at <http://www.angelfire.com/ca2/tech68k/sun3.html>.
 
@@ -20049,8 +20749,7 @@
   ZS refers to a type of asynchronous serial port built in to the Sun3
   and Sun3x workstations; if you have a Sun 3, you probably have
   these.  Say 'Y' to support ZS ports directly.  This option must be
-  enabled in order to support the
-  keyboard and mouse ports.
+  enabled in order to support the keyboard and mouse ports.
 
 Sun keyboard support
 CONFIG_SUN_KEYBOARD
@@ -20348,6 +21047,17 @@
   Hades. This increases the SCSI transfer rates at least ten times
   compared to PIO transfers.
 
+Sun3 NCR5380 OBIO SCSI
+CONFIG_SUN3_SCSI
+  This option will enable support for the OBIO (onboard io) NCR5380
+  SCSI controller found in the Sun 3/50 and 3/60.  Note that this
+  driver does not provide support for VME SCSI boards.
+
+Sun3x ESP SCSI
+CONFIG_SUN3X_ESP
+  This option will enable support for the ESP SCSI controller found
+  onboard the Sun 3/80.
+
 Ariadne support
 CONFIG_ARIADNE
   If you have a Village Tronic Ariadne Ethernet adapter, say Y.
@@ -20411,6 +21121,19 @@
   want). The module is called apne.o. If you want to compile it as a
   module, say M here and read <file:Documentation/modules.txt>.
 
+Sun3/Sun3x on-board LANCE support
+CONFIG_SUN3LANCE
+  This driver enables support for the on-board LANCE ethernet adapter
+  found on the Sun 3/50, 3/60, and 3/80 workstations.  If you have 
+  one of these workstations, and would like Ethernet, say Y. 
+  Otherwise, say N.
+
+Sun3 on-board Intel 82586 support
+CONFIG_SUN3_82586
+  This driver enables support for the on-board Intel 82586 based Ethernet
+  adapter found on Sun 3/1xx and 3/2xx motherboards.  Note that this driver
+  does not support 82586-based adapters on additional VME boards.
+
 Atari Lance support
 CONFIG_ATARILANCE
   Say Y to include support for several Atari Ethernet adapters based
@@ -21662,6 +22385,18 @@
   Say Y here to include support for the Iomega Buz video card.  There
   is a Buz/Linux homepage at <http://www.lysator.liu.se/~gz/buz/>.
 
+Miro DC10(+) support
+CONFIG_VIDEO_ZORAN_DC10
+  Say Y to support the Pinnacle Systems Studio DC10 plus TV/Video
+  card.  Linux page at
+  <http://lhd.datapower.com/db/dispproduct.php3?DISP?1511>.  Vendor
+  page at <http://www.pinnaclesys.com/>.
+
+Linux Media Labs LML33 support
+CONFIG_VIDEO_ZORAN_LML33
+  Say Y here to support the Linux Media Labs LML33 TV/Video card.
+  Resources page is at <http://www.linuxmedialabs.com/lml33doc.html>.
+
 Zoran ZR36120/36125 Video For Linux
 CONFIG_VIDEO_ZR36120
   Support for ZR36120/ZR36125 based frame grabber/overlay boards.
@@ -24705,4 +25440,337 @@
 # fill-prefix:"  "
 # adaptive-fill:nil
 # fill-column:70
+I2C mainboard interfaces
+CONFIG_I2C_MAINBOARD
+  Many modern mainboards have some kind of I2C interface integrated. This
+  is often in the form of a SMBus, or System Management Bus, which is
+  basically the same as I2C but which uses only a subset of the I2C
+  protocol.
+
+  You will also want the latest user-space utilties: you can find them
+  in the lm_sensors package, which you can download at 
+  http://www.lm-sensors.nu
+
+Acer Labs ALI 1535
+CONFIG_I2C_ALI1535
+  If you say yes to this option, support will be included for the Acer
+  Labs ALI 1535 mainboard I2C interface. This can also be 
+  built as a module.
+
+Acer Labs ALI 1533 and 1543C
+CONFIG_I2C_ALI15X3
+  If you say yes to this option, support will be included for the Acer
+  Labs ALI 1533 and 1543C mainboard I2C interfaces. This can also be 
+  built as a module which can be inserted and removed while the kernel
+  is running.
+
+AMD 756/766/768
+CONFIG_I2C_AMD756
+  If you say yes to this option, support will be included for the AMD
+  756/766/768 mainboard I2C interfaces. This can also be 
+  built as a module which can be inserted and removed while the kernel
+  is running.
+
+Apple Hydra Mac I/O
+CONFIG_I2C_HYDRA
+  If you say yes to this option, support will be included for the 
+  Hydra mainboard I2C interface. This can also be built as a module 
+  which can be inserted and removed while the kernel is running.
+
+Intel I801
+CONFIG_I2C_I801
+  If you say yes to this option, support will be included for the 
+  Intel I801 mainboard I2C interfaces. "I810" mainboard sensor chips are
+  generally located on the I801's I2C bus. This can also be
+  built as a module which can be inserted and removed while the kernel
+  is running.
+
+Intel I810/I815 based Mainboard
+CONFIG_I2C_I810
+  If you say yes to this option, support will be included for the 
+  Intel I810/I815 mainboard I2C interfaces. The I2C busses these chips
+  are generally used only for video devices. For "810" mainboard sensor
+  chips, use the I801 I2C driver instead. This can also be
+  built as a module which can be inserted and removed while the kernel
+  is running.
+
+Intel 82371AB PIIX4(E) / ServerWorks OSB4 and CSB5
+CONFIG_I2C_PIIX4
+  If you say yes to this option, support will be included for the 
+  Intel PIIX4, PIIX4E, and 443MX, Serverworks OSB4/CSB5,
+  and SMSC Victory66 mainboard
+  I2C interfaces. This can also be
+  built as a module which can be inserted and removed while the kernel
+  is running.
+
+Silicon Integrated Systems Corp. SiS5595 based Mainboard
+CONFIG_I2C_SIS5595
+  If you say yes to this option, support will be included for the 
+  SiS5595 mainboard I2C interfaces. For integrated sensors on the
+  Sis5595, use CONFIG_SENSORS_SIS5595. This can also be
+  built as a module which can be inserted and removed while the kernel
+  is running.
+
+VIA Technologies, Inc. VT82C586B
+CONFIG_I2C_VIA
+  If you say yes to this option, support will be included for the VIA
+  Technologies I2C adapter found on some motherboards. This can also 
+  be built as a module which can be inserted and removed while the 
+  kernel is running.
+
+VIA Technologies, Inc. VT82C596, 596B, 686A/B, 8233
+CONFIG_I2C_VIAPRO
+  If you say yes to this option, support will be included for the VIA
+  Technologies I2C adapter on these chips. For integrated sensors on the
+  Via 686A/B, use CONFIG_SENSORS_VIA686A. This can also be
+  be built as a module which can be inserted and removed while the 
+  kernel is running.
+
+3DFX Banshee / Voodoo3
+CONFIG_I2C_VOODOO3
+  If you say yes to this option, support will be included for the 
+  3DFX Banshee and Voodoo3 I2C interfaces. The I2C busses on the these
+  chips are generally used only for video devices.
+  This can also be
+  built as a module which can be inserted and removed while the kernel
+  is running.
+
+DEC Tsunami 21272
+CONFIG_I2C_TSUNAMI
+  If you say yes to this option, support will be included for the DEC
+  Tsunami chipset I2C adapter. Requires the Alpha architecture;
+  do not enable otherwise. This can also be built as a module which
+  can be inserted and removed while the kernel is running.
+
+Pseudo ISA adapter (for hardware sensors modules)
+CONFIG_I2C_ISA
+  This provides support for accessing some hardware sensor chips over
+  the ISA bus rather than the I2C or SMBus. If you want to do this, 
+  say yes here. This feature can also be built as a module which can 
+  be inserted and removed while the kernel is running.
+
+  You will also need the latest user-space utilties: you can find them
+  in the lm_sensors package, which you can download at 
+  http://www.lm-sensors.nu
+
+Analog Devices ADM1021 and compatibles
+CONFIG_SENSORS_ADM1021 
+  If you say yes here you get support for Analog Devices ADM1021 
+  and ADM1023 sensor chips and clones: Maxim MAX1617 and MAX1617A,
+  Genesys Logic GL523SM, National Semi LM84, TI THMC10,
+  and the XEON processor built-in sensor. This can also 
+  be built as a module which can be inserted and removed while the 
+  kernel is running.
+
+  You will also need the latest user-space utilties: you can find them
+  in the lm_sensors package, which you can download at 
+  http://www.lm-sensors.nu
+
+Analog Devices ADM1024
+CONFIG_SENSORS_ADM1024
+  If you say yes here you get support for Analog Devices ADM1024 sensor
+  chips.  This can also be built as a module.
+
+  You will also need the latest user-space utilties: you can find them
+  in the lm_sensors package, which you can download at 
+  http://www.lm-sensors.nu
+
+Analog Devices ADM1025
+CONFIG_SENSORS_ADM1025
+  If you say yes here you get support for Analog Devices ADM1025 sensor
+  chips.  This can also be built as a module which can be inserted and
+  removed while the kernel is running.
+
+  You will also need the latest user-space utilties: you can find them
+  in the lm_sensors package, which you can download at 
+  http://www.lm-sensors.nu
+
+Analog Devices ADM9240 and compatibles
+CONFIG_SENSORS_ADM9240
+  If you say yes here you get support for Analog Devices ADM9240 
+  sensor chips and clones: the Dallas Semiconductor DS1780 and
+  the National Semiconductor LM81. This can also be built as a 
+  module which can be inserted and removed while the kernel is
+  running.
+
+  You will also need the latest user-space utilties: you can find them
+  in the lm_sensors package, which you can download at 
+  http://www.lm-sensors.nu
+
+Dallas DS1621 and DS1625
+CONFIG_SENSORS_DS1621
+  If you say yes here you get support for the Dallas DS1621 and DS1625x
+  sensor chips.  This can also be built as a module.
+
+  You will also need the latest user-space utilties: you can find them
+  in the lm_sensors package, which you can download at 
+  http://www.lm-sensors.nu
+
+Fujitsu-Siemens Poseidon
+CONFIG_SENSORS_FSCPOS
+  If you say yes here you get support for the Fujitsu-Siemens Poseidon
+  sensor chip.  This can also be built as a module.
+
+  You will also need the latest user-space utilties: you can find them
+  in the lm_sensors package, which you can download at 
+  http://www.lm-sensors.nu
+
+Fujitsu-Siemens Scylla
+CONFIG_SENSORS_FSCSCY
+  If you say yes here you get support for the Fujitsu-Siemens Scylla
+  sensor chip.  This can also be built as a module. This driver may/should
+  also work with the following Fujitsu-Siemens chips: "Poseidon",
+  "Poseidon II" and "Hydra". You may have to force loading of the module
+  for motherboards in these cases. Be careful - those motherboards have
+  not been tested with this driver.
+
+  You will also need the latest user-space utilties: you can find them
+  in the lm_sensors package, which you can download at 
+  http://www.lm-sensors.nu
+
+Genesys Logic GL518SM
+CONFIG_SENSORS_GL518SM
+  If you say yes here you get support for Genesys Logic GL518SM sensor
+  chips.  This can also be built as a module which can be inserted and
+  removed while the kernel is running.
+
+  You will also need the latest user-space utilties: you can find them
+  in the lm_sensors package, which you can download at 
+  http://www.lm-sensors.nu
+
+Genesys Logic GL520SM
+CONFIG_SENSORS_GL520SM
+  If you say yes here you get support for Genesys Logic GL518SM sensor
+  chips.  This can also be built as a module which can be inserted and
+  removed while the kernel is running.
+
+  You will also need the latest user-space utilties: you can find them
+  in the lm_sensors package, which you can download at 
+  http://www.lm-sensors.nu
+
+HP Maxilife
+CONFIG_SENSORS_MAXILIFE
+  If you say yes here you get support for the HP Maxilife
+  sensor chip.  This can also be built as a module.
+
+  You will also need the latest user-space utilties: you can find them
+  in the lm_sensors package, which you can download at 
+  http://www.lm-sensors.nu
+
+ITE 8705, 8712, Sis950
+CONFIG_SENSORS_IT87
+  If you say yes here you get support for the ITE 8705 and 8712 and
+  SiS950 sensor chips.  This can also be built as a module.
+
+  You will also need the latest user-space utilties: you can find them
+  in the lm_sensors package, which you can download at 
+  http://www.lm-sensors.nu
+
+Myson MTP008
+CONFIG_SENSORS_MTP008
+  If you say yes here you get support for the Myson MTP008
+  sensor chip.  This can also be built as a module.
+
+  You will also need the latest user-space utilties: you can find them
+  in the lm_sensors package, which you can download at 
+  http://www.lm-sensors.nu
+
+National Semiconductors LM75 and compatibles
+CONFIG_SENSORS_LM75 
+  If you say yes here you get support for National Semiconductor LM75
+  sensor chips and clones: Dallas Semi DS75 and DS1775, TelCon
+  TCN75, and National Semi LM77. This can also be built as a module which
+  can be inserted and removed while the kernel is running.
+
+  You will also need the latest user-space utilties: you can find them
+  in the lm_sensors package, which you can download at 
+  http://www.lm-sensors.nu
+
+National Semiconductors LM78
+CONFIG_SENSORS_LM78
+  If you say yes here you get support for National Semiconductor LM78
+  sensor chips family: the LM78-J and LM79. Many clone chips will
+  also work at least somewhat with this driver. This can also be built
+  as a module which can be inserted and removed while the kernel is 
+  running.
+
+  You will also need the latest user-space utilties: you can find them
+  in the lm_sensors package, which you can download at 
+  http://www.lm-sensors.nu
+
+National Semiconductors LM80
+CONFIG_SENSORS_LM80
+  If you say yes here you get support for National Semiconductor LM80
+  sensor chips. This can also be built as a module which can be 
+  inserted and removed while the kernel is running.
+
+  You will also need the latest user-space utilties: you can find them
+  in the lm_sensors package, which you can download at 
+  http://www.lm-sensors.nu
+
+National Semiconductors LM87
+CONFIG_SENSORS_LM87
+  If you say yes here you get support for National Semiconductor LM87
+  sensor chips. This can also be built as a module which can be 
+  inserted and removed while the kernel is running.
+
+  You will also need the latest user-space utilties: you can find them
+  in the lm_sensors package, which you can download at 
+  http://www.lm-sensors.nu
+
+Silicon Integrated Systems Corp. SiS5595 Sensor
+CONFIG_SENSORS_SIS5595
+  If you say yes here you get support for the integrated sensors in 
+  SiS5595 South Bridges. This can also be built as a module 
+  which can be inserted and removed while the kernel is running.
+
+  You will also need the latest user-space utilties: you can find them
+  in the lm_sensors package, which you can download at 
+  http://www.lm-sensors.nu
+
+Texas Instruments THMC50 / Analog Devices ADM1022
+CONFIG_SENSORS_THMC50
+  If you say yes here you get support for Texas Instruments THMC50
+  sensor chips and clones: the Analog Devices ADM1022.
+  This can also be built as a module which
+  can be inserted and removed while the kernel is running.
+
+  You will also need the latest user-space utilties: you can find them
+  in the lm_sensors package, which you can download at 
+  http://www.lm-sensors.nu
+
+Via VT82C686A/B
+CONFIG_SENSORS_VIA686A
+  If you say yes here you get support for the integrated sensors in 
+  Via 686A/B South Bridges. This can also be built as a module 
+  which can be inserted and removed while the kernel is running.
+
+  You will also need the latest user-space utilties: you can find them
+  in the lm_sensors package, which you can download at 
+  http://www.lm-sensors.nu
+
+Winbond W83781D, W83782D, W83783S, W83627HF, AS99127F
+CONFIG_SENSORS_W83781D
+  If you say yes here you get support for the Winbond W8378x series 
+  of sensor chips: the W83781D, W83782D, W83783S and W83682HF,
+  and the similar Asus AS99127F. This
+  can also be built as a module which can be inserted and removed
+  while the kernel is running.
+
+  You will also need the latest user-space utilties: you can find them
+  in the lm_sensors package, which you can download at 
+  http://www.lm-sensors.nu
+
+EEprom (DIMM) reader
+CONFIG_SENSORS_EEPROM
+  If you say yes here you get read-only access to the EEPROM data 
+  available on modern memory DIMMs, and which could theoretically
+  also be available on other devices. This can also be built as a 
+  module which can be inserted and removed while the kernel is 
+  running.
+
+  You will also need the latest user-space utilties: you can find them
+  in the lm_sensors package, which you can download at 
+  http://www.lm-sensors.nu
+
 # End:
diff -Nru linux/Documentation/DocBook/Makefile linux-2.4.19-pre5-mjc/Documentation/DocBook/Makefile
--- linux/Documentation/DocBook/Makefile	Fri Nov  2 20:13:53 2001
+++ linux-2.4.19-pre5-mjc/Documentation/DocBook/Makefile	Sat Apr  6 08:25:56 2002
@@ -93,6 +93,8 @@
 		$(TOPDIR)/drivers/net/8390.c \
 		$(TOPDIR)/drivers/char/serial.c \
 		$(TOPDIR)/drivers/pci/pci.c \
+		$(TOPDIR)/drivers/hotplug/pci_hotplug_core.c \
+		$(TOPDIR)/drivers/hotplug/pci_hotplug_util.c \
 		$(TOPDIR)/drivers/block/ll_rw_blk.c \
 		$(TOPDIR)/drivers/sound/sound_core.c \
 		$(TOPDIR)/drivers/sound/sound_firmware.c \
diff -Nru linux/Documentation/DocBook/kernel-api.tmpl linux-2.4.19-pre5-mjc/Documentation/DocBook/kernel-api.tmpl
--- linux/Documentation/DocBook/kernel-api.tmpl	Fri Oct  5 15:06:51 2001
+++ linux-2.4.19-pre5-mjc/Documentation/DocBook/kernel-api.tmpl	Sat Apr  6 08:25:56 2002
@@ -162,6 +162,10 @@
      <sect1><title>PCI Support Library</title>
 !Edrivers/pci/pci.c
      </sect1>
+     <sect1><title>PCI Hotplug Support Library</title>
+!Edrivers/hotplug/pci_hotplug_core.c
+!Edrivers/hotplug/pci_hotplug_util.c
+     </sect1>
      <sect1><title>MCA Architecture</title>
 	<sect2><title>MCA Device Functions</title>
 !Earch/i386/kernel/mca.c
diff -Nru linux/Documentation/DocBook/kernel-locking.tmpl linux-2.4.19-pre5-mjc/Documentation/DocBook/kernel-locking.tmpl
--- linux/Documentation/DocBook/kernel-locking.tmpl	Sat May 19 20:43:05 2001
+++ linux-2.4.19-pre5-mjc/Documentation/DocBook/kernel-locking.tmpl	Sat Apr  6 08:25:56 2002
@@ -788,8 +788,18 @@
     </para>
 
     <para>
-      Note that the atomic operations are defined to act as both
-      read and write barriers on all platforms.
+      Note that the atomic operations do in general not act as memory
+      barriers. Instead you can insert a memory barrier before or
+      after <function>atomic_inc()</function> or
+      <function>atomic_dec()</function> by inserting
+      <function>smp_mb__before_atomic_inc()</function>,
+      <function>smp_mb__after_atomic_inc()</function>,
+      <function>smp_mb__before_atomic_dec()</function> or
+      <function>smp_mb__after_atomic_dec()</function>
+      respectively. The advantage of using those macros instead of
+      <function>smp_mb()</function> is, that they are cheaper on some
+      platforms.    
+      <!-- Sebastian Wilhelmi <seppi@seppi.de> 2002-03-04 -->
     </para>
    </sect1>
 
diff -Nru linux/Documentation/cachetlb.txt linux-2.4.19-pre5-mjc/Documentation/cachetlb.txt
--- linux/Documentation/cachetlb.txt	Fri Dec 21 12:41:53 2001
+++ linux-2.4.19-pre5-mjc/Documentation/cachetlb.txt	Sat Apr  6 08:25:56 2002
@@ -339,7 +339,18 @@
 	If the icache does not snoop stores then this routine will need
 	to flush it.
 
+  void flush_icache_user_range(struct vm_area_struct *vma,
+			struct page *page, unsigned long addr, int len)
+	This is called when the kernel stores into addresses that are
+	part of the address space of a user process (which may be some
+	other process than the current process).  The addr argument
+	gives the virtual address in that process's address space,
+	page is the page which is being modified, and len indicates
+	how many bytes have been modified.  The modified region must
+	not cross a page boundary.  Currently this is only called from
+	kernel/ptrace.c.
+
   void flush_icache_page(struct vm_area_struct *vma, struct page *page)
-	All the functionality of flush_icache_page can be implemented in
-	flush_dcache_page and update_mmu_cache. In 2.5 the hope is to
-	remove this interface completely.
+	This is called when a page-cache page is about to be mapped
+	into a user process' address space.  It offers an opportunity
+	for a port to ensure d-cache/i-cache coherency if necessary.
diff -Nru linux/Documentation/cciss.txt linux-2.4.19-pre5-mjc/Documentation/cciss.txt
--- linux/Documentation/cciss.txt	Thu Oct 11 12:04:57 2001
+++ linux-2.4.19-pre5-mjc/Documentation/cciss.txt	Sat Apr  6 08:25:56 2002
@@ -100,7 +100,7 @@
 can be informed of changes to the virtual SCSI bus which the driver 
 presents to it in the usual way. For example: 
 
-	echo add-single-device 3 2 1 0 > /proc/scsi/scsi
+	echo scsi add-single-device 3 2 1 0 > /proc/scsi/scsi
  
 to add a device on controller 3, bus 2, target 1, lun 0.   Note that
 the driver makes an effort to preserve the devices positions
diff -Nru linux/Documentation/fb/matroxfb.txt linux-2.4.19-pre5-mjc/Documentation/fb/matroxfb.txt
--- linux/Documentation/fb/matroxfb.txt	Sun Sep 30 15:26:08 2001
+++ linux-2.4.19-pre5-mjc/Documentation/fb/matroxfb.txt	Sat Apr  6 08:25:56 2002
@@ -10,7 +10,7 @@
 
  * It provides a nice large console (128 cols + 48 lines with 1024x768)
    without using tiny, unreadable fonts.
- * You can run XF68_FBDev on top of /dev/fb0
+ * You can run XF{68,86}_FBDev or XFree86 fbdev driver on top of /dev/fb0
  * Most important: boot logo :-)
 
 Disadvantages:
@@ -27,9 +27,6 @@
 
 If you want, for example, enable a resolution of 1280x1024x24bpp you should
 pass to the kernel this command line: "video=matrox:vesa:0x1BB".
-Note that the same line, if 'appended' as a lilo parameter in lilo.conf will
-read "video=matrox:vesa:443" because lilo pass integer parameters as decimal
-numbers to the kernel.
 
 You should compile in both vgacon (to boot if you remove you Matrox from
 box) and matroxfb (for graphics mode). You should not compile-in vesafb
@@ -82,13 +79,16 @@
 X11
 ===
 
-XF68_FBDev should work just fine, but it is non-accelerated. On non-intel
+XF{68,86}_FBDev should work just fine, but it is non-accelerated. On non-intel
 architectures there are some glitches for 24bpp videomodes. 8, 16 and 32bpp
 works fine.
 
 Running another (accelerated) X-Server like XF86_SVGA works too. But (at least)
 XFree servers have big troubles in multihead configurations (even on first
-head, not even talking about second).
+head, not even talking about second). Running XFree86 4.x accelerated mga 
+driver is possible, but you must not enable DRI - if you do, resolution and
+color depth of your X desktop must match resolution and color depths of your
+virtual consoles, otherwise X will corrupt accelerator settings.
 
 
 SVGALib
diff -Nru linux/Documentation/filesystems/00-INDEX linux-2.4.19-pre5-mjc/Documentation/filesystems/00-INDEX
--- linux/Documentation/filesystems/00-INDEX	Wed Jun 20 14:10:27 2001
+++ linux-2.4.19-pre5-mjc/Documentation/filesystems/00-INDEX	Sat Apr  6 08:29:59 2002
@@ -22,6 +22,8 @@
 	- info and mount options for the OS/2 HPFS.
 isofs.txt
 	- info and mount options for the ISO 9660 (CDROM) filesystem.
+jfs.txt
+	- info and mount options for the JFS filesystem.
 ncpfs.txt
 	- info on Novell Netware(tm) filesystem using NCP protocol.
 ntfs.txt
diff -Nru linux/Documentation/filesystems/Locking linux-2.4.19-pre5-mjc/Documentation/filesystems/Locking
--- linux/Documentation/filesystems/Locking	Fri Dec 21 12:41:53 2001
+++ linux-2.4.19-pre5-mjc/Documentation/filesystems/Locking	Sat Apr  6 08:25:56 2002
@@ -156,7 +156,7 @@
 block_flushpage() instead.
 	->releasepage() is called when the kernel is about to try to drop the
 buffers from the page in preparation for freeing it.  It returns zero to
-indicate that the buffers are (or may be) freeable.  If ->flushpage is zero,
+indicate that the buffers are (or may be) freeable.  If ->releasepage is zero,
 the kernel assumes that the fs has no private interest in the buffers.
 
 	Note: currently almost all instances of address_space methods are
diff -Nru linux/Documentation/filesystems/befs.txt linux-2.4.19-pre5-mjc/Documentation/filesystems/befs.txt
--- linux/Documentation/filesystems/befs.txt	Wed Dec 31 19:00:00 1969
+++ linux-2.4.19-pre5-mjc/Documentation/filesystems/befs.txt	Sat Apr  6 08:29:59 2002
@@ -0,0 +1,111 @@
+BeOS filesystem for Linux
+
+Document last updated: Dec 6, 2001
+
+WARNING
+=======
+Make sure you understand that this is alpha software.  This means that the
+implementation is neither complete nor well-tested. 
+
+I DISCLAIM ALL RESPONSIBILTY FOR ANY POSSIBLE BAD EFFECTS OF THIS CODE!
+
+LICENSE
+=====
+This software is covered by the GNU General Public License. 
+See the file COPYING for the complete text of the license.
+Or the GNU website: <http://www.gnu.org/licenses/licenses.html>
+
+AUTHOR
+=====
+Current maintainer: Will Dyson <will_dyson@pobox.com>
+Has been working on the code since Aug 13, 2001. See the changelog for details.
+
+Original Author: Makoto Kato <m_kato@ga2.so-net.ne.jp>
+His orriginal code can still be found at: <http://hp.vector.co.jp/authors/VA008030/bfs/>
+Does anyone know of a more current email address for Makoto? He doesn't respond
+to the address given above...
+
+WHAT IS THIS DRIVER?
+==================
+This module implements the native filesystem of BeOS <http://www.be.com/>
+for the linux 2.4.1 and later kernels. Currently it is a read-only implementation.
+
+Which is it, BFS or BEFS?
+================
+Be, Inc said, "BeOS Filesystem is officially called BFS, not BeFS". 
+But Unixware Boot Filesystem is called bfs, too. And they are already in the
+kernel.
+Because of this nameing conflict, on Linux the BeOS filesystem is called befs.
+
+HOW TO INSTALL
+==============
+step 1.  Install the BeFS  patch into the source code tree of linux.
+
+Apply the patchfile to your kernel source tree.
+Assuming that your kernel source is in /foo/bar/linux and the patchfile is called
+patch-befs-xxx, you would do the following:
+
+	cd /foo/bar/linux
+	patch -p1 < /path/to/patch-befs-xxx
+
+if the patching step fails (i.e. there are rejected hunks), you can try to
+figure it out yourself (it shouldn't be hard), or mail the maintainer 
+(Will Dyson <will_dyson@pobox.com>) for help.
+
+step 2.  Configuretion & make kernel
+
+The linux kernel has many compile-time options. Most of them are beyond the
+scope of this document. I suggest the Kernel-HOWTO document as a good general
+reference on this topic. <http://www.linux.com/howto/Kernel-HOWTO.html>
+
+However, to use the BeFS module, you must enable it at configure time.
+
+	cd /foo/bar/linux
+	make menuconfig (or xconfig)
+
+The BeFS module is not a standard part of the linux kernel, so you must first
+enable support for experimental code under the "Code maturity level" menu.
+
+Then, under the "Filesystems" menu will be an option called "BeFS filesystem (experimental)",
+or something like that. Enable that option (it is fine to make it a module).
+
+Save your kernel configuration and then build your kernel.
+
+step 3.  Install
+
+See the kernel howto <http://www.linux.com/howto/Kernel-HOWTO.html> for
+instructions on this critical step.
+
+USING BFS
+=========
+To use the BeOS filesystem, use filesystem type 'befs'.
+
+ex)
+    mount -t befs /dev/fd0 /beos
+
+MOUNT OPTIONS
+=============
+uid=nnn        All files in the partition will be owned by user id nnn.
+gid=nnn	       All files in the partition will be in group nnn.
+iocharset=xxx  Use xxx as the name of the NLS translation table.
+debug          The driver will output debugging information to the syslog.
+
+HOW TO GET LASTEST VERSION
+==========================
+
+The latest version is currently available at:
+<http://befs-driver.sourceforge.net/>
+
+ANY KNOWN BUGS?
+===========
+As of Jan 20, 2002:
+	
+	None
+
+SPECIAL THANKS
+==============
+Dominic Giampalo ... Writing "Practical file system design with Be filesystem"
+Hiroyuki Yamada  ... Testing LinuxPPC.
+
+
+
diff -Nru linux/Documentation/filesystems/changelog.jfs linux-2.4.19-pre5-mjc/Documentation/filesystems/changelog.jfs
--- linux/Documentation/filesystems/changelog.jfs	Wed Dec 31 19:00:00 1969
+++ linux-2.4.19-pre5-mjc/Documentation/filesystems/changelog.jfs	Sat Apr  6 08:29:59 2002
@@ -0,0 +1,191 @@
+IBM's Journaled File System (JFS) for Linux version 1.0.14
+Team members
+Steve Best        sbest@us.ibm.com
+Dave Kleikamp     shaggy@austin.ibm.com  
+Barry Arndt       barndt@us.ibm.com
+Christoph Hellwig hch@caldera.de
+
+
+Release January 28, 2002 (version 1.0.14)
+
+This is our fifty-second release of IBM's Enterprise JFS technology port to Linux.
+Beta 1 was release 0.1.0 on 12/8/2000, Beta 2 was release 0.2.0 on 3/7/2001, 
+Beta 3 was release 0.3.0 on 4/30/2001, and release 1.0.0 on 6/28/2001.
+  
+Function and Fixes in drop 52 (1.0.14)
+   - Fix hang in invalidate_metapages when jfs.o is built as a module
+   - Fix anon_list removal logic in txLock
+
+Function and Fixes in drop 51 (1.0.13)
+   - chmod changes on newly created directories are lost after umount (bug 2535)
+   - Page locking race fixes
+   - Improve metapage locking
+   - Fix timing window. Lock page while metapage is active to avoid page going 
+     away before the metadata is released. (Fixed crash during mount/umount testing)
+   - Make changes for 2.5.2 kernel
+   - Fix race condition truncating large files
+         
+Function and Fixes in drop50 (1.0.12)
+   - Add O_DIRECT support
+   - Add support for 2.4.17 kernel
+   - Make sure COMMIT_STALE gets reset before the inode is unlocked. Fixing
+     this gets rid of XT_GETPAGE errors
+   - Remove invalid __exit keyword from metapage_exit and txExit.
+   - fix assert(log->cqueue.head == NULL by waiting longer
+   
+Function and Fixes in drop49 (1.0.11)
+   - Readdir was not handling multibyte codepages correctly.
+   - Make mount option parsing more robust.
+   - Add iocharset mount option.
+   - Journalling of symlinks incorrect, resulting in logredo failure of -265.
+   - Add jfsutils information to Changes file
+   - Improve recoverability of the file system when metadata corruption is detected.
+   - Fix kernel OOPS when root inode is corrupted 
+   
+Function and Fixes in drop48 (1.0.10)
+   - put inodes later on hash queues
+   - Fix boundary case in xtTruncate
+   - When invalidating metadata, try to flush the dirty buffers rather than sync them.
+   - Add another sanity check to avoid trapping when imap is corrupt
+   - Fix file truncate while removing large file (assert(cmp == 0))
+   - read_cache_page returns ERR_PTR, not NULL on error
+   - Add dtSearchNode and dtRelocate
+   - JFS needs to use generic_file_open & generic_file_llseek
+   - Remove lazyQwait, etc. It created an unnecessary bottleneck in TxBegin.
+
+Function and Fixes in drop47 (1.0.9)
+   - Fix data corruption problem when creating files while deleting others. (jitterbug 183)
+   - Make sure all metadata is written before finalizing the log
+   - Fix serialization problem in shutdown by setting i_size of directory sooner. (bugzilla #334)
+   - JFS should quit whining when special files are marked dirty during read-only mount.
+   - Must always check rc after DT_GETPAGE
+   - Add diExtendFS
+   - Removing defconfig form JFS source - not really needed
+   
+Function and Fixes in drop46 (1.0.8)
+   - Synclist was being built backwards causing logredo to quit too early
+   - jfs_compat.h needs to include module.h
+   - uncomment EXPORTS_NO_SYMBOLS in super.c
+   - Minor code cleanup
+   - xtree of zero-truncated file not being logged
+   - Fix logging on file truncate
+   - remove unused metapage fields
+
+Function and Fixes in drop45 (1.0.7)
+   - cleanup remove IS_KIOBUFIO define.
+   - cleanup remove TRUNC_NO_TOSS define. 
+   - have jFYI's use the name directly from dentry  
+   - Remove nul _ALLOC and _FREE macros and also make spinlocks static. 
+   - cleanup add externs where needed in the header files  
+   - jfs_write_inode is a bad place to call iput.  Also limit warnings.
+   - More truncate cleanup 
+   - Truncate cleanup 
+   - Add missing statics in jfs_metapage.c 
+   - fsync fixes   
+   - Clean up symlink code - use page_symlink_inode_operations 
+   - unicode handling cleanup   
+   - cleanup replace UniChar with wchar_t
+   - Get rid of CDLL_* macros - use list.h instead 
+   - 2.4.11-prex mount problem Call new_inode instead of get_empty_inode 
+   - use kernel min/max macros 
+   - Add MODULE_LICENSE stub for older kernels 
+   - IA64/gcc3 fixes 
+   - Log Manager fixes, introduce __SLEEP_COND macro 
+   - Mark superblock dirty when some errors detected (forcing fsck to be run).
+   - More robust remounting from r/o to r/w. 
+   - Misc. cleanup add static where appropriate 
+   - small cleanup in jfs_umount_rw 
+   - add MODULE_ stuff 
+   - Set *dropped_lock in alloc_metapage 
+   - Get rid of unused log list 
+   - cleanup jfs_imap.c to remove _OLD_STUFF and _NO_MORE_MOUNT_INODE defines 
+   - Log manager cleanup  
+   - Transaction manager cleanup 
+   - correct memory allocations flags 
+   - Better handling of iterative truncation
+   - Change continue to break, otherwise we don't re-acquire LAZY_LOCK
+
+Function and Fixes in drop44 (1.0.6)
+   - Create jfs_incore.h which merges linux/jfs_fs.h, linux/jfs_fs_i.h, and jfs_fs_sb.h
+   - Create a configuration option to handle JFS_DEBUG define
+   - Fixed a few cases where positive error codes were returned to the VFS.
+   - Replace jfs_dir_read by generic_read_dir.
+   - jfs_fsync_inode is only called by jfs_fsync_file, merge the two and rename to jfs_fsync.
+   - Add a bunch of missing externs.
+   - jfs_rwlock_lock is unused, nuke it.
+   - Always use atomic set/test_bit operations to protect jfs_ip->cflag 
+   - Combine jfs_ip->flag with jfs_ip->cflag
+   - Fixed minor format errors reported by fsck 
+   - cflags should be long so bitops always works correctly
+   - Use GFP_NOFS for runtime memory allocations 
+   - Support  VM changes in 2.4.10 of the kernel
+   - Remove ifdefs supporting older 2.4 kernels. JFS now requires at least 2.4.3 or 2.4.2-ac2
+   - Simplify and remove one use of IWRITE_TRYLOCK
+   - jfs_truncate was not passing tid to xtTruncate
+   - removed obsolete extent_page workaround
+   - correct recovery from failed diAlloc call (disk full)
+   - In write_metapage, don't call commit_write if prepare_write failed   
+   
+Function and Fixes in drop43 (1.0.5)
+   - Allow separate allocation of JFS-private superblock/inode data.
+   - Remove checks in namei.c that are already done by the VFS.
+   - Remove redundant mutex defines.
+   - Replace all occurrences of #include <linux/malloc.h> with #include <linux/slab.h>
+   - Work around race condition in remount -fixes OOPS during shutdown
+   - Truncate large files incrementally ( affects directories too)
+
+Function and Fixes in drop42 (1.0.4)
+   - Fixed compiler warnings in the FS when building on 64 bits systems
+   - Fixed deadlock where jfsCommit hung in hold_metapage
+   - Fixed problems with remount
+   - Reserve metapages for jfsCommit thread 
+   - Get rid of buggy invalidate_metapage & use discard_metapage 
+   - Don't hand metapages to jfsIOthread (too many context switches) (jitterbug 125, bugzilla 238)
+   - Fix error message in jfs_strtoUCS
+
+Function and Fixes in drop41 (1.0.3)
+   - Patch to move from previous release to latest release needs to update the version number in super.c 
+   - Jitterbug problems (134,140,152) removing files have been fixed
+   - Set rc=ENOSPC if ialloc fails in jfs_create and jfs_mkdir
+   - Fixed jfs_txnmgr.c 775! assert
+   - Fixed jfs_txnmgr.c 884! assert(mp->nohomeok==0)
+   - Fix hang - prevent tblocks from being exhausted
+   - Fix oops trying to mount reiserfs
+   - Fail more gracefully in jfs_imap.c
+   - Print more information when char2uni fails
+   - Fix timing problem between Block map and metapage cache - jitterbug 139
+   - Code Cleanup (removed many ifdef's, obsolete code, ran code through indent) Mostly 2.4 tree
+   - Split source tree (Now have a separate source tree for 2.2, 2.4, and jfsutils)  
+
+Function and Fixes in drop40 (1.0.2)
+   - Fixed multiple truncate hang
+   - Fixed hang on unlink a file and sync happening at the same time
+   - Improved handling of kmalloc error conditions
+   - Fixed hang in blk_get_queue and SMP deadlock: bh_end_io call generic_make_request
+     (jitterbug 145 and 146)
+   - stbl was not set correctly set in dtDelete  
+   - changed trap to printk in dbAllocAG to avoid system hang
+
+Function and Fixes in drop 39 (1.0.1)
+   - Fixed hang during copying files on 2.2.x series
+   - Fixed TxLock compile problem
+   - Fixed to correctly update the number of blocks for directories (this was causing the FS 
+     to show fsck error after compiling mozilla).
+   - Fixed to prevent old data from being written to disk from the page cache. 
+
+Function and Fixes in drop 38 (1.0.0)
+   - Fixed some general log problems   
+
+Please send bugs, comments, cards and letters to linuxjfs@us.ibm.com.
+
+The JFS mailing list can be subscribed to by using the link labeled "Mail list Subscribe"
+at our web page http://oss.software.ibm.com/jfs/.
+
+
+
+
+
+
+
+
+
diff -Nru linux/Documentation/filesystems/cramfs.txt linux-2.4.19-pre5-mjc/Documentation/filesystems/cramfs.txt
--- linux/Documentation/filesystems/cramfs.txt	Thu Jul 19 19:14:53 2001
+++ linux-2.4.19-pre5-mjc/Documentation/filesystems/cramfs.txt	Sat Apr  6 08:25:56 2002
@@ -10,7 +10,7 @@
 
 You can't write to a cramfs filesystem (making it compressible and
 compact also makes it _very_ hard to update on-the-fly), so you have to
-create the disk image with the "mkcramfs" utility in scripts/cramfs.
+create the disk image with the "mkcramfs" utility.
 
 
 Usage Notes
@@ -19,9 +19,7 @@
 File sizes are limited to less than 16MB.
 
 Maximum filesystem size is a little over 256MB.  (The last file on the
-filesystem is allowed to extend past 256MB.)  (Comments in mkcramfs.c
-suggest that ROM sizes may be limited to 64MB, though that's not a
-limitation in cramfs code.)
+filesystem is allowed to extend past 256MB.)
 
 Only the low 8 bits of gid are stored.  The current version of
 mkcramfs simply truncates to 8 bits, which is a potential security
@@ -48,18 +46,28 @@
 
 
 For /usr/share/magic
-------------------
+--------------------
 
-0	long	0x28cd3d45	Linux cramfs
->4	long	x		size %d
->8	long	x		flags 0x%x
->12	long	x		future 0x%x
+0	ulelong	0x28cd3d45	Linux cramfs offset 0
+>4	ulelong	x		size %d
+>8	ulelong	x		flags 0x%x
+>12	ulelong	x		future 0x%x
 >16	string	>\0		signature "%.16s"
->32	long	x		fsid.crc 0x%x
->36	long	x		fsid.edition %d
->40	long	x		fsid.blocks %d
->44	long	x		fsid.files %d
+>32	ulelong	x		fsid.crc 0x%x
+>36	ulelong	x		fsid.edition %d
+>40	ulelong	x		fsid.blocks %d
+>44	ulelong	x		fsid.files %d
 >48	string	>\0		name "%.16s"
+512	ulelong	0x28cd3d45	Linux cramfs offset 512
+>516	ulelong	x		size %d
+>520	ulelong	x		flags 0x%x
+>524	ulelong	x		future 0x%x
+>528	string	>\0		signature "%.16s"
+>544	ulelong	x		fsid.crc 0x%x
+>548	ulelong	x		fsid.edition %d
+>552	ulelong	x		fsid.blocks %d
+>556	ulelong	x		fsid.files %d
+>560	string	>\0		name "%.16s"
 
 
 Hacker Notes
diff -Nru linux/Documentation/filesystems/jfs.txt linux-2.4.19-pre5-mjc/Documentation/filesystems/jfs.txt
--- linux/Documentation/filesystems/jfs.txt	Wed Dec 31 19:00:00 1969
+++ linux-2.4.19-pre5-mjc/Documentation/filesystems/jfs.txt	Sat Apr  6 08:29:59 2002
@@ -0,0 +1,136 @@
+IBM's Journaled File System (JFS) for Linux version 1.0.14
+Team members
+Steve Best         sbest@us.ibm.com
+Dave Kleikamp      shaggy@austin.ibm.com  
+Barry Arndt        barndt@us.ibm.com
+Christoph Hellwig  hch@caldera.de
+
+
+Release January 28, 2002 (version 1.0.14)
+
+This is our fifty-second release of IBM's Enterprise JFS technology port to Linux.
+Beta 1 was release 0.1.0 on 12/8/2000, Beta 2 was release 0.2.0 on 3/7/2001, 
+Beta 3 was release 0.3.0 on 4/30/2001, and release 1.0.0 on 6/28/2001.
+ 
+The changelog.jfs file contains detailed information of changes done in each source
+code drop.
+
+JFS has a source tree that can be built on 2.4.3 - 2.4.17 and 2.5.2 kernel.org
+source trees.
+ 
+Our current goal on the 2.5.x series of the kernel is to update to the latest 
+2.5.x version and only support the latest version of this kernel.
+This will change when the distros start shipping the 2.5.x series of the kernel.
+
+Our current goal on the 2.4.x series of the kernel is to continue to support
+all of the kernels in this series as we do today.
+
+There is a anonymous cvs access available for the JFS tree. The steps below are
+what is needed to pull the JFS cvs tree from the oss.software.ibm.com server.
+
+id anoncvs
+password anoncvs
+
+To checkout 2.4.x series of the JFS files do the following:
+CVSROOT should be set to :pserver:anoncvs@oss.software.ibm.com:/usr/cvs/jfs
+cvs checkout linux24
+
+To checkout 2.5.2 series of the JFS files do the following:
+CVSROOT should be set to :pserver:anoncvs@oss.software.ibm.com:/usr/cvs/jfs
+cvs checkout linux25
+
+To checkout the JFS utilities do the following:
+CVSROOT should be set to :pserver:anoncvs@oss.software.ibm.com:/usr/cvs/jfs
+cvs checkout jfsutils
+
+The cvs tree contains the latest changes being done to JFS. To receive notification
+of commits to the cvs tree, please send e-mail to linuxjfs@us.ibm.com stating that 
+you would like notifications sent to you. 
+
+The jfs-2.4-1.0.14-patch.tar.gz is the easiest way to get the latest file system
+source code on your system. There are also patch files that can move your jfs source
+code from one release to another. If you have release 1.0.13 and would like to move
+to release 1.0.14 the patch file named jfs-2.4-1_0_13-to-1_0_14-patch.gz will do that.
+
+The jfs-2.4-1.0.14-patch.tar.gz file contains a readme and patch files for different
+levels of the 2.4 kernel. Please see the README in the jfs-2.4-1.0.14-patch.tar.gz
+file for help on applying the two patch files. 
+
+
+The following files in the kernel source tree have been changed so JFS can be built.
+The jfs-2.4-1.0.14.tar.gz source tar ball contains each of the files below with
+the extension of the kernel level it is associated with. As an example, there are now
+four Config.in files named Config.in-2.4.0, Config.in-2.4.5, Config.in-2.4.7 and 
+Config.in-2.4.17.
+
+
+If you use the jfs-2.4-1.0.14.tar.gz to build JFS you must rename each of the 
+kernel files to the file names listed below. The standard kernel from www.kernel.org 
+is the source of the kernel files that are included in the jfs tar file. 
+
+
+In sub dir fs Config.in, Makefile
+In sub dir fs/nls Config.in
+In sub dir Documentation Configure.help, Changes
+In sub dir Documentation/filesystems 00-INDEX
+In sub dir linux MAINTAINERS
+
+Please backup the above files before the JFS tar file is added to the kernel source 
+tree. All JFS files are located in the include/linux/jfs or fs/jfs sub dirs.
+
+Our development team has used the Linux kernel levels  2.4.3 - 2.4.17 kernels
+with gcc version egcs-2.91.66 19990314/Linux (egcs-1.1.2 release) 
+for our port so far. A goal of the JFS team is to have JFS run on all architectures
+that Linux supports, there is no architecture specific code in JFS. JFS has been run
+on the following architectures (x86, PowerPC, Alpha, s/390, ARM) so far. 
+
+To make JFS build, during the "make config" step of building the kernel answer y to
+the Prompt for development and/or incomplete code/drivers in the Code maturity level
+options section. In the Filesystems section use the m for the answer to 
+JFS filesystem support (experimental) (CONFIG_JFS_FS) [Y/m/n?]
+ 
+
+Build in /usr/src/linux with the command:
+
+
+make modules
+make modules_install
+
+If you rebuild jfs.o after having mounted and unmounted a partition, "modprobe -r jfs" 
+will unload the old module.
+
+For the file system debugging messages are being written to /var/log/messages.
+
+Please see the readme in the utilities package for information about building
+the JFS utilities.
+
+JFS TODO list:
+
+Plans for our near term development items
+
+   - get defrag capabilities operational in the FS
+   - get extendfs capabilities operational in the FS
+   - test EXTENDFS utility, for growing JFS partitions
+   - test defrag utility, calls file system to defrag the file system.
+   - add support for block sizes (512,1024,2048)
+   - add support for logfile on dedicated partition
+
+   
+Longer term work items
+
+   - get access control list functionality operational
+   - get extended attributes functionality operational
+   - add quota support
+
+Please send bugs, comments, cards and letters to linuxjfs@us.ibm.com.
+
+The JFS mailing list can be subscribed to by using the link labeled "Mail list Subscribe"
+at our web page http://oss.software.ibm.com/jfs/.
+
+
+
+
+
+
+
+
diff -Nru linux/Documentation/i2c/i2c-velleman linux-2.4.19-pre5-mjc/Documentation/i2c/i2c-velleman
--- linux/Documentation/i2c/i2c-velleman	Wed Dec 31 19:00:00 1969
+++ linux-2.4.19-pre5-mjc/Documentation/i2c/i2c-velleman	Sat Apr  6 09:33:28 2002
@@ -0,0 +1,27 @@
+i2c-velleman driver
+-------------------
+This is a driver for i2c-hw access for Velleman K9000 and other adapters.
+
+Useful links
+------------
+Velleman:
+	http://www.velleman.be/
+
+Velleman K8000 Howto:
+	http://howto.htlw16.ac.at/k8000-howto.html
+
+
+K8000 and K8005 libraries
+-------------------------
+The project has lead to new libs for the Velleman K8000 and K8005..
+LIBK8000 v1.99.1 and LIBK8005 v0.21
+
+With these libs you can control the K8000 and K8005 with the original
+simple commands which are in the original Velleman software.
+Like SetIOchannel, ReadADchannel, SendStepCCWFull and many more.
+Via i2c kernel device /dev/velleman
+
+The libs can be found on http://groups.yahoo.com/group/k8000/files/linux/
+
+The Velleman K8000 interface card on http://www.velleman.be/kits/k8000.htm
+The Velleman K8005 steppermotorcard on http://www.velleman.be/kits/k8005.htm
diff -Nru linux/Documentation/i2c/smbus-protocol linux-2.4.19-pre5-mjc/Documentation/i2c/smbus-protocol
--- linux/Documentation/i2c/smbus-protocol	Fri Feb 16 18:53:08 2001
+++ linux-2.4.19-pre5-mjc/Documentation/i2c/smbus-protocol	Sat Apr  6 09:33:28 2002
@@ -1,3 +1,10 @@
+SMBus Protocol Summary
+======================
+The following is a summary of the SMBus protocol. It applies to
+all revisions of the protocol (1.0, 1.1, and 2.0).
+Certain protocol features which are not supported by
+this package are briefly described at the end of this document.
+
 Some adapters understand only the SMBus (System Management Bus) protocol,
 which is a subset from the I2C protocol. Fortunately, many devices use
 only the same subset, which makes it possible to put them on an SMBus.
@@ -125,3 +132,23 @@
 Comm byte. The amount of data is specified in the Count byte.
 
 S Addr Wr [A] Comm [A] Count [A] Data [A] Data [A] ... [A] Data [A] P
+
+
+Packet Error Checking (PEC)
+===========================
+Packet Error Checking was introduced in Revision 1.1 of the specification.
+It is optional, and is not supported by the Linux kernel (this package)
+at the present time.
+
+PEC adds a CRC-8 error-checking byte to all transfers.
+
+
+Address Resolution Protocol (ARP)
+=================================
+The Address Resolution Protocol was introduced in Revision 2.0 of
+the specification. It is optional, and is not supported by the
+Linux kernel (this package) at the present time.
+
+ARP adds device enumeration and dynamic address assignment to
+the protocol. All ARP communications use slave address 0x61 and
+require PEC checksums.
diff -Nru linux/Documentation/i2c/summary linux-2.4.19-pre5-mjc/Documentation/i2c/summary
--- linux/Documentation/i2c/summary	Thu Oct 11 11:05:47 2001
+++ linux-2.4.19-pre5-mjc/Documentation/i2c/summary	Sat Apr  6 09:33:28 2002
@@ -66,7 +66,7 @@
 
 i2c-elektor:     Elektor ISA card (uses i2c-algo-pcf)
 i2c-elv:         ELV parallel port adapter (uses i2c-algo-bit)
-i2c-pcf-epp:     PCF8584 on a EPP parallel port (uses i2c-algo-pcf) (BROKEN - missing i2c-pcf-epp.h)
+i2c-pcf-epp:     PCF8584 on a EPP parallel port (uses i2c-algo-pcf) (NOT mkpatched)
 i2c-philips-par: Philips style parallel port adapter (uses i2c-algo-bit)
 i2c-ppc405:      IBM 405xx processor I2C device (uses i2c-algo-ppc405) (NOT BUILT BY DEFAULT)
 i2c-pport:       Primitive parallel port adapter (uses i2c-algo-bit)
diff -Nru linux/Documentation/i2c/writing-clients linux-2.4.19-pre5-mjc/Documentation/i2c/writing-clients
--- linux/Documentation/i2c/writing-clients	Thu Oct 11 11:05:47 2001
+++ linux-2.4.19-pre5-mjc/Documentation/i2c/writing-clients	Sat Apr  6 09:33:28 2002
@@ -365,7 +365,7 @@
 
 The detect client function is called by i2c_probe or i2c_detect.
 The `kind' parameter contains 0 if this call is due to a `force'
-parameter, and 0 otherwise (for i2c_detect, it contains 0 if
+parameter, and -1 otherwise (for i2c_detect, it contains 0 if
 this call is due to the generic `force' parameter, and the chip type
 number if it is due to a specific `force' parameter).
 
diff -Nru linux/Documentation/ia64/IRQ-redir.txt linux-2.4.19-pre5-mjc/Documentation/ia64/IRQ-redir.txt
--- linux/Documentation/ia64/IRQ-redir.txt	Wed Dec 31 19:00:00 1969
+++ linux-2.4.19-pre5-mjc/Documentation/ia64/IRQ-redir.txt	Sat Apr  6 08:25:56 2002
@@ -0,0 +1,69 @@
+IRQ affinity on IA64 platforms
+------------------------------
+                           07.01.2002, Erich Focht <efocht@ess.nec.de>
+
+
+By writing to /proc/irq/IRQ#/smp_affinity the interrupt routing can be
+controlled. The behavior on IA64 platforms is slightly different from
+that described in Documentation/IRQ-affinity.txt for i386 systems.
+
+Because of the usage of SAPIC mode and physical destination mode the
+IRQ target is one particular CPU and cannot be a mask of several
+CPUs. Only the first non-zero bit is taken into account.
+
+
+Usage examples:
+
+The target CPU has to be specified as a hexadecimal CPU mask. The
+first non-zero bit is the selected CPU. This format has been kept for
+compatibility reasons with i386.
+
+Set the delivery mode of interrupt 41 to fixed and route the
+interrupts to CPU #3 (logical CPU number) (2^3=0x08):
+     echo "8" >/proc/irq/41/smp_affinity
+
+Set the default route for IRQ number 41 to CPU 6 in lowest priority
+delivery mode (redirectable):
+     echo "r 40" >/proc/irq/41/smp_affinity
+
+The output of the command
+     cat /proc/irq/IRQ#/smp_affinity
+gives the target CPU mask for the specified interrupt vector. If the CPU
+mask is preceeded by the character "r", the interrupt is redirectable
+(i.e. lowest priority mode routing is used), otherwise its route is
+fixed.
+
+
+
+Initialization and default behavior:
+
+If the platform features IRQ redirection (info provided by SAL) all
+IO-SAPIC interrupts are initialized with CPU#0 as their default target
+and the routing is the so called "lowest priority mode" (actually
+fixed SAPIC mode with hint). The XTP chipset registers are used as hints
+for the IRQ routing. Currently in Linux XTP registers can have three
+values:
+	- minimal for an idle task,
+	- normal if any other task runs,
+	- maximal if the CPU is going to be switched off.
+The IRQ is routed to the CPU with lowest XTP register value, the
+search begins at the default CPU. Therefore most of the interrupts
+will be handled by CPU #0.
+
+If the platform doesn't feature interrupt redirection IOSAPIC fixed
+routing is used. The target CPUs are distributed in a round robin
+manner. IRQs will be routed only to the selected target CPUs. Check
+with
+        cat /proc/interrupts
+
+
+
+Comments:
+
+On large (multi-node) systems it is recommended to route the IRQs to
+the node to which the corresponding device is connected.
+For systems like the NEC AzusA we get IRQ node-affinity for free. This
+is because usually the chipsets on each node redirect the interrupts
+only to their own CPUs (as they cannot see the XTP registers on the
+other nodes).
+
diff -Nru linux/Documentation/networking/3c359.txt linux-2.4.19-pre5-mjc/Documentation/networking/3c359.txt
--- linux/Documentation/networking/3c359.txt	Wed Dec 31 19:00:00 1969
+++ linux-2.4.19-pre5-mjc/Documentation/networking/3c359.txt	Sat Apr  6 08:25:56 2002
@@ -0,0 +1,58 @@
+
+3COM PCI TOKEN LINK VELOCITY XL TOKEN RING CARDS README
+
+Release 0.9.0 - Release   
+	Jul 17th 2000 Mike Phillips 
+
+	1.2.0 - Final
+	Feb 17th 2002 Mike Phillips 
+	Updated for submission to the 2.4.x kernel.
+
+Thanks:
+	Terry Murphy from 3Com for tech docs and support,
+	Adam D. Ligas for testing the driver.
+ 
+Note:
+	This driver will NOT work with the 3C339 Token Ring cards, you need
+to use the tms380 driver instead.
+
+Options:
+
+The driver accepts three options: ringspeed, pkt_buf_sz and message_level.
+
+These options can be specified differently for each card found. 
+
+ringspeed:  Has one of three settings 0 (default), 4 or 16.  0 will 
+make the card autosense the ringspeed and join at the appropriate speed, 
+this will be the default option for most people.  4 or 16 allow you to 
+explicitly force the card to operate at a certain speed.  The card will fail 
+if you try to insert it at the wrong speed. (Although some hubs will allow 
+this so be *very* careful).  The main purpose for explicitly setting the ring
+speed is for when the card is first on the ring.  In autosense mode, if the card
+cannot detect any active monitors on the ring it will open at the same speed as
+its last opening. This can be hazardous if this speed does not match the speed
+you want the ring to operate at.  
+
+pkt_buf_sz:  This is this initial receive buffer allocation size.  This will
+default to 4096 if no value is entered. You may increase performance of the 
+driver by setting this to a value larger than the network packet size, although
+the driver now re-sizes buffers based on MTU settings as well. 
+
+message_level: Controls level of messages created by the driver. Defaults to 0:
+which only displays start-up and critical messages.  Presently any non-zero 
+value will display all soft messages as well.  NB This does not turn 
+debuging messages on, that must be done by modified the source code.
+
+Variable MTU size:
+
+The driver can handle a MTU size upto either 4500 or 18000 depending upon 
+ring speed.  The driver also changes the size of the receive buffers as part
+of the mtu re-sizing, so if you set mtu = 18000, you will need to be able
+to allocate 16 * (sk_buff with 18000 buffer size) call it 18500 bytes per ring 
+position = 296,000 bytes of memory space, plus of course anything 
+necessary for the tx sk_buff's.  Remember this is per card, so if you are
+building routers, gateway's etc, you could start to use a lot of memory
+real fast.
+
+2/17/02 Mike Phillips
+
diff -Nru linux/Documentation/networking/3c509.txt linux-2.4.19-pre5-mjc/Documentation/networking/3c509.txt
--- linux/Documentation/networking/3c509.txt	Wed Dec 31 19:00:00 1969
+++ linux-2.4.19-pre5-mjc/Documentation/networking/3c509.txt	Sat Apr  6 08:25:56 2002
@@ -0,0 +1,210 @@
+Linux and the 3Com EtherLink III Series Ethercards (driver v1.18c and higher)
+----------------------------------------------------------------------------
+
+This file contains the instructions and caveats for v1.18c and higher versions
+of the 3c509 driver. You should not use the driver without reading this file.
+
+release 1.0
+28 February 2002
+Current maintainer (corrections to):
+  David Ruggiero <jdr@farfalle.com>
+
+----------------------------------------------------------------------------
+
+(0) Introduction
+
+The following are notes and information on using the 3Com EtherLink III series
+ethercards in Linux. These cards are commonly known by the most widely-used
+card's 3Com model number, 3c509. They are all 10mb/s ISA-bus cards and shouldn't
+be (but sometimes are) confused with the similarly-numbered PCI-bus "3c905"
+(aka "Vortex" or "Boomerang") series.  Kernel support for the 3c509 family is
+provided by the module 3c509.c, which has code to support all of the following
+models:
+
+  3c509 (original ISA card)
+  3c509B (later revision of the ISA card; supports full-duplex)
+  3c589 (PCMCIA)
+  3c589B (later revision of the 3c589; supports full-duplex)
+  3c529 (MCA)
+  3c579 (EISA)
+
+Large portions of this documentation were heavily borrowed from the guide
+written the original author of the 3c509 driver, Donald Becker. The master
+copy of that document, which contains notes on older versions of the driver,
+currently resides on Scyld web server: http://www.scyld.com/network/3c509.html.
+
+
+(1) Special Driver Features
+
+Overriding card settings
+
+The driver allows boot- or load-time overriding of the card's detected IOADDR,
+IRQ, and transceiver settings, although this capability shouldn't generally be
+needed except to enable full-duplex mode (see below). An example of the syntax
+for LILO parameters for doing this:
+
+    ether=10,0x310,3,0x3c509,eth0 
+
+This configures the first found 3c509 card for IRQ 10, base I/O 0x310, and
+transceiver type 3 (10base2). The flag "0x3c509" must be set to avoid conflicts
+with other card types when overriding the I/O address. When the driver is
+loaded as a module, only the IRQ and transceiver setting may be overridden.
+For example, setting two cards to 10base2/IRQ10 and AUI/IRQ11 is done by using
+the xcvr and irq module options:
+
+   options 3c509 xcvr=3,3 irq=10,11
+
+
+(2) Full-duplex mode
+
+The v1.18c driver added support for the 3c509B's full-duplex capabilities.
+In order to enable and successfully use full-duplex mode, three conditions
+must be met: 
+
+(a) You must have a Etherlink III card model whose hardware supports full-
+duplex operations. Currently, the only members of the 3c509 family that are
+positively known to support full-duplex are the 3c509B (ISA bus) and 3c589B
+(PCMCIA) cards. Cards without the "B" model designation do *not* support
+full-duplex mode; these include the original 3c509 (no "B"), the original
+3c589, the 3c529 (MCA bus), and the 3c579 (EISA bus).
+
+(b) You must be using your card's 10baseT transceiver (i.e., the RJ-45
+connector), not its AUI (thick-net) or 10base2 (thin-net/coax) interfaces.
+AUI and 10base2 network cabling is physically incapable of full-duplex
+operation.
+
+(c) Most importantly, your 3c509B must be connected to a link partner that is
+itself full-duplex capable. This is almost certainly one of two things: a full-
+duplex-capable  Ethernet switch (*not* a hub), or a full-duplex-capable NIC on
+another system that's connected directly to the 3c509B via a crossover cable.
+ 
+/////Extremely important caution concerning full-duplex mode/////
+Understand that the 3c509B's hardware's full-duplex support is much more
+limited than that provide by more modern network interface cards. Although
+at the physical layer of the network it fully supports full-duplex operation,
+the card was designed before the current Ethernet auto-negotiation (N-way)
+spec was written. This means that the 3c509B family ***cannot and will not
+auto-negotiate a full-duplex connection with its link partner under any
+circumstances, no matter how it is initialized***. If the full-duplex mode
+of the 3c509B is enabled, its link partner will very likely need to be
+independently _forced_ into full-duplex mode as well; otherwise various nasty
+failures will occur - at the very least, you'll see massive numbers of packet
+collisions. This is one of very rare circumstances where disabling auto-
+negotiation and forcing the duplex mode of a network interface card or switch
+would ever be necessary or desirable.
+
+
+(3) Available Transceiver Types
+
+For versions of the driver v1.18c and above, the available transceiver types are:
+ 
+0  transceiver type from EEPROM config (normally 10baseT); force half-duplex
+1  AUI (thick-net / DB15 connector)
+2  (undefined)
+3  10base2 (thin-net == coax / BNC connector)
+4  10baseT (RJ-45 connector); force half-duplex mode
+8  transceiver type and duplex mode taken from card's EEPROM config settings
+12 10baseT (RJ-45 connector); force full-duplex mode
+
+Prior to driver version 1.18c, only tranceiver codes 0-4 were supported. Note
+that the new transceiver codes 8 and 12 are the *only* ones that will enable
+full-duplex mode, no matter what the card's detected EEPROM settings might be.
+This insured that merely upgrading the driver from an earlier version would
+never automatically enable full-duplex mode in an existing installation;
+it must always be explicitly enabled via one of these code in order to be
+activated.
+  
+
+(4a) Interpretation of error messages and common problems
+
+Error Messages
+
+eth0: Infinite loop in interrupt, status 2011. 
+These are "mostly harmless" message indicating that the driver had too much
+work during that interrupt cycle. With a status of 0x2011 you are receiving
+packets faster than they can be removed from the card. This should be rare
+or impossible in normal operation. Possible causes of this error report are:
+ 
+   - a "green" mode enabled that slows the processor down when there is no
+     keyboard activitiy. 
+
+   - some other device or device driver hogging the bus or disabling interrupts.
+     Check /proc/interrupts for excessive interrupt counts. The timer tick
+     interrupt should always be incrementing faster than the others. 
+
+No received packets 
+If a 3c509, 3c562 or 3c589 can successfully transmit packets, but never
+receives packets (as reported by /proc/net/dev or 'ifconfig') you likely
+have an interrupt line problem. Check /proc/interrupts to verify that the
+card is actually generating interrupts. If the interrupt count is not
+increasing you likely have a physical conflict with two devices trying to
+use the same ISA IRQ line. The common conflict is with a sound card on IRQ10
+or IRQ5, and the easiest solution is to move the 3c509 to a different
+interrupt line. If the device is receiving packets but 'ping' doesn't work,
+you have a routing problem.
+
+Tx Carrier Errors Reported in /proc/net/dev 
+If an EtherLink III appears to transmit packets, but the "Tx carrier errors"
+field in /proc/net/dev increments as quickly as the Tx packet count, you
+likely have an unterminated network or the incorrect media tranceiver selected. 
+
+3c509B card is not detected on machines with an ISA PnP BIOS. 
+While the updated driver works with most PnP BIOS programs, it does not work
+with all. This can be fixed by disabling PnP support using the 3Com-supplied
+setup program. 
+
+3c509 card is not detected on overclocked machines 
+Increase the delay time in id_read_eeprom() from the current value, 500,
+to an absurdly high value, such as 5000. 
+
+
+(4b) Decoding Status and Error Messages
+
+The bits in the main status register are: 
+
+value 	description
+0x01 	Interrupt latch
+0x02 	Tx overrun, or Rx underrun
+0x04 	Tx complete
+0x08 	Tx FIFO room available
+0x10 	A complete Rx packet has arrived
+0x20 	A Rx packet has started to arrive
+0x40 	The driver has requested an interrupt
+0x80 	Statistics counter nearly full
+
+The bits in the transmit (Tx) status word are: 
+
+value 	description
+0x02 	Out-of-window collision.
+0x04 	Status stack overflow (normally impossible).
+0x08 	16 collisions.
+0x10 	Tx underrun (not enough PCI bus bandwidth).
+0x20 	Tx jabber.
+0x40 	Tx interrupt requested.
+0x80 	Status is valid (this should always be set).
+
+
+When a transmit error occurs the driver produces a status message such as 
+
+   eth0: Transmit error, Tx status register 82
+
+The two values typically seen here are:
+
+0x82 
+Out of window collision. This typically occurs when some other Ethernet
+host is incorrectly set to full duplex on a half duplex network. 
+
+0x88 
+16 collisions. This typically occurs when the network is exceptionally busy
+or when another host doesn't correctly back off after a collision. If this
+error is mixed with 0x82 errors it is the result of a host incorrectly set
+to full duplex (see above).
+
+Both of these errors are the result of network problems that should be
+corrected. They do not represent driver malfunction.
+
+
+(5) Revision history (this file)
+
+28Feb02 v1.0  DR   New; major portions based on Becker original 3c509 docs
+
diff -Nru linux/Documentation/networking/arcnet-hardware.txt linux-2.4.19-pre5-mjc/Documentation/networking/arcnet-hardware.txt
--- linux/Documentation/networking/arcnet-hardware.txt	Tue Aug 22 18:21:54 2000
+++ linux-2.4.19-pre5-mjc/Documentation/networking/arcnet-hardware.txt	Sat Apr  6 08:25:56 2002
@@ -2256,7 +2256,7 @@
 When I got my two cards, one of them had this switch set to "enhanced". That
 card didn't work at all, it wasn't even recognized by the driver. The other
 card had this switch set to "compatible" and it behaved absolutely normally. I
-guess that the switch on one of the cards, must have been changed accidently
+guess that the switch on one of the cards, must have been changed accidentally
 when the card was taken out of its former host. The question remains
 unanswered, what is the purpose of the "enhanced" position?
 
diff -Nru linux/Documentation/networking/bonding.txt linux-2.4.19-pre5-mjc/Documentation/networking/bonding.txt
--- linux/Documentation/networking/bonding.txt	Wed Nov  7 17:39:36 2001
+++ linux-2.4.19-pre5-mjc/Documentation/networking/bonding.txt	Sat Apr  6 08:25:56 2002
@@ -271,7 +271,7 @@
 	
 	If you wish to change the MAC address, you can set it with ifconfig:
 
-	  # ifconfig bond0 ha ether 00:11:22:33:44:55
+	  # ifconfig bond0 hw ether 00:11:22:33:44:55
 
 	The MAC address can be also changed by bringing down/up the device
 	and then changing its slaves (or their order):
@@ -503,7 +503,7 @@
 Resources and links
 ===================
 
-Current developement on this driver is posted to:
+Current development on this driver is posted to:
  - http://www.sourceforge.net/projects/bonding/
 
 Donald Becker's Ethernet Drivers and diag programs may be found at :
diff -Nru linux/Documentation/networking/comx.txt linux-2.4.19-pre5-mjc/Documentation/networking/comx.txt
--- linux/Documentation/networking/comx.txt	Fri Apr  6 13:42:48 2001
+++ linux-2.4.19-pre5-mjc/Documentation/networking/comx.txt	Sat Apr  6 08:25:56 2002
@@ -24,6 +24,8 @@
 LoCOMX (1x512 kbps passive board)
 MixCOM (1x512 or 2x512kbps passive board with a hardware watchdog an
 	optional BRI interface and optional flashROM (1-32M))
+SliceCOM	(1x2Mbps channelized E1 board)
+PciCOM	(X21)
 
 At the moment of writing this document, the (Cisco)-HDLC, LAPB, SyncPPP and
 Frame Relay (DTE, rfc1294 IP encapsulation with partially implemented Q933a 
@@ -72,7 +74,7 @@
 To create the interface 'comx0' which is the first channel of a COMX card:
 
 insmod comx 
-# insmod comx-hw-comx ; insmod comx-proto-hdlc  (these are usually
+# insmod comx-hw-comx ; insmod comx-proto-ppp  (these are usually
 autoloaded if you use the kernel module loader)
 
 mkdir /proc/comx/comx0
@@ -141,47 +143,45 @@
 The MixCOM board doesn't require firmware, the driver communicates with
 it through I/O ports. You can have three of these cards in one machine.
 
-THE HDLC LINE PROTOCOL DRIVER
+THE SLICECOM DRIVER
+
+The SliceCOM board doesn't require firmware. You can have 4 of these cards
+in one machine. The driver doesn't (yet) support shared interrupts, so
+you will need a separate IRQ line for every board.
+Read linux/Documentation/networking/slicecom.txt for help on configuring
+this adapter.
+
+THE HDLC/PPP LINE PROTOCOL DRIVER
+
+The HDLC/SyncPPP line protocol driver uses the kernel's built-in syncppp
+driver (syncppp.o). You don't have to manually select syncppp.o when building
+the kernel, the dependencies compile it in automatically.
 
-There's only one configurable parameter with this protocol: the 'keepalive'
-value. You can set this in seconds or set to 'off'. Agree with the administrator
-of your peer router on this setting. The default is 10 (seconds).
 
-EXAMPLE
 
+
+EXAMPLE
 (setting up hw parameters, see above)
+
+# using HDLC:
 echo hdlc >/proc/comx/comx0/protocol
 echo 10 >/proc/comx/comx0/keepalive	<- not necessary, 10 is the default
 ifconfig comx0 1.2.3.4 pointopoint 5.6.7.8 netmask 255.255.255.255
 
-
-THE PPP LINE PROTOCOL DRIVER
-
-To use this driver, you have to have ppp-2.3.4, and have a modified version of
-pppd (this pppd will work as async pppd to, the modifiactions merely relax 
-some restricions in order to be able to use non-async lines too.
-If configured, this driver can use Van Jacobson TCP header compression (you'll
-need the slhc.o module for this).
-Additionally to use this protocol, enable async ppp in your kernel config, and
-create the comx device special files in /dev. They're character special files
-with major 88, and their names must be the same as their network interface
-counterparts (i.e /dev/comx0 with minor 0 corresponds interface comx0 and so
-on).
-
-EXAMPLE
-
 (setting up hw parameters, see above)
+
+# using PPP:
 echo ppp >/proc/comx/comx0/protocol
 ifconfig comx0 up
-pppd comx0 1.2.3.4:5.6.7.8 persist	<- with this option pppd won't exit
-					   when the line goes down
+ifconfig comx0 1.2.3.4 pointopoint 5.6.7.8 netmask 255.255.255.255
+
 
 THE LAPB LINE PROTOCOL DRIVER
 
 For this, you'll need to configure LAPB support (See 'LAPB Data Link Driver' in
 'Network options' section) into your kernel (thanks to Jonathan Naylor for his 
 excellent implementation). 
-comxlapb.o provides the following files in the appropriate directory
+comx-proto-lapb.o provides the following files in the appropriate directory
 (the default values in parens): t1 (5), t2 (1), n2 (20), mode (DTE, STD) and
 window (7). Agree with the administrator of your peer router on these
 settings (most people use defaults, but you have to know if you are DTE or
@@ -221,7 +221,7 @@
 
 boardtype:
 Type of the hardware. Valid values are:
- 'comx', 'hicomx', 'locomx', 'cmx'.
+ 'comx', 'hicomx', 'locomx', 'cmx', 'slicecom'.
 
 protocol:
 Data-link protocol on this channel. Can be: HDLC, LAPB, PPP, FRAD
diff -Nru linux/Documentation/networking/dl2k.txt linux-2.4.19-pre5-mjc/Documentation/networking/dl2k.txt
--- linux/Documentation/networking/dl2k.txt	Mon Feb 25 14:37:51 2002
+++ linux-2.4.19-pre5-mjc/Documentation/networking/dl2k.txt	Sat Apr  6 08:25:56 2002
@@ -1,7 +1,7 @@
 
     D-Link DL2000-based Gigabit Ethernet Adapter Installation
     for Linux
-    Jan 02, 2002
+    Jan 29, 2002
 
 Contents
 ========
@@ -199,8 +199,8 @@
 				  6          	1000Mbps full duplex.
 
 				  By default, the NIC operates at autosense.
-				  Note that only 1000mbps_fd and 1000mbps_hd
-				  types are available for fiber adapter.
+				  1000mbps_fd and 1000mbps_hd types are only
+				  available for fiber adapter.
 
 vlan=[0|1]			- Specifies the VLAN ID. If vlan=0, the
 				  Virtual Local Area Network (VLAN) function is
diff -Nru linux/Documentation/networking/driver.txt linux-2.4.19-pre5-mjc/Documentation/networking/driver.txt
--- linux/Documentation/networking/driver.txt	Wed Dec 31 19:00:00 1969
+++ linux-2.4.19-pre5-mjc/Documentation/networking/driver.txt	Sat Apr  6 08:25:56 2002
@@ -0,0 +1,84 @@
+Documents about softnet driver issues in general can be found
+at:
+
+	http://www.firstfloor.org/~andi/softnet/
+
+Transmit path guidelines:
+
+1) The hard_start_xmit method must never return '1' under any
+   normal circumstances.  It is considered a hard error unless
+   there is no way your device can tell ahead of time when it's
+   transmit function will become busy.
+
+   Instead it must maintain the queue properly.  For example,
+   for a driver implementing scatter-gather this means:
+
+	static int drv_hard_start_xmit(struct sk_buff *skb,
+		   		       struct net_device *dev)
+	{
+		struct drv *dp = dev->priv;
+
+		lock_tx(dp);
+		...
+		/* This is a hard error log it. */
+		if (TX_BUFFS_AVAIL(dp) <= (skb_shinfo(skb)->nr_frags + 1)) {
+			netif_stop_queue(dev);
+			unlock_tx(dp);
+			printk(KERN_ERR PFX "%s: BUG! Tx Ring full when queue awake!\n",
+			       dev->name);
+			return 1;
+		}
+
+		... queue packet to card ...
+		... update tx consumer index ...
+
+		if (TX_BUFFS_AVAIL(dp) <= (MAX_SKB_FRAGS + 1))
+			netif_stop_queue(dev);
+
+		...
+		unlock_tx(dp);
+		...
+	}
+
+   And then at the end of your TX reclaimation event handling:
+
+	if (netif_queue_stopped(dp->dev) &&
+            TX_BUFFS_AVAIL(dp) > (MAX_SKB_FRAGS + 1))
+		netif_wake_queue(dp->dev);
+
+   For a non-scatter-gather supporting card, the three tests simply become:
+
+		/* This is a hard error log it. */
+		if (TX_BUFFS_AVAIL(dp) <= 0)
+
+   and:
+
+		if (TX_BUFFS_AVAIL(dp) == 0)
+
+   and:
+
+	if (netif_queue_stopped(dp->dev) &&
+            TX_BUFFS_AVAIL(dp) > 0)
+		netif_wake_queue(dp->dev);
+
+2) Do not forget to update netdev->trans_start to jiffies after
+   each new tx packet is given to the hardware.
+
+3) Do not forget that once you return 0 from your hard_start_xmit
+   method, it is your driver's responsibility to free up the SKB
+   and in some finite amount of time.
+
+   For example, this means that it is not allowed for your TX
+   mitigation scheme to let TX packets "hang out" in the TX
+   ring unreclaimed forever if no new TX packets are sent.
+   This error can deadlock sockets waiting for send buffer room
+   to be freed up.
+
+   If you return 1 from the hard_start_xmit method, you must not keep
+   any reference to that SKB and you must not attempt to free it up.
+
+Probing guidelines:
+
+1) Any hardware layer address you obtain for your device should
+   be verified.  For example, for ethernet check it with
+   linux/etherdevice.h:is_valid_ether_addr()
diff -Nru linux/Documentation/networking/ifenslave.c linux-2.4.19-pre5-mjc/Documentation/networking/ifenslave.c
--- linux/Documentation/networking/ifenslave.c	Wed Nov  7 17:39:36 2001
+++ linux-2.4.19-pre5-mjc/Documentation/networking/ifenslave.c	Sat Apr  6 08:25:56 2002
@@ -38,6 +38,9 @@
  *         take care of this itself
  *       - Try the SIOC*** versions of the bonding ioctls before using the
  *         old versions
+ *    - 2002/02/18 Erik Habbinga <erik_habbinga @ hp dot com> :
+ *       - ifr2.ifr_flags was not initialized in the hwaddr_notset case,
+ *         SIOCGIFFLAGS now called before hwaddr_notset test
  */
 
 static char *version =
@@ -288,19 +291,19 @@
 			     hwaddr from it's first slave.
 			   - if !hwaddr_notset, assign the master's hwaddr to each slave
 			*/
-	
+
+			strncpy(ifr2.ifr_name, slave_ifname, IFNAMSIZ);
+			if (ioctl(skfd, SIOCGIFFLAGS, &ifr2) < 0) {
+				int saved_errno = errno;
+				fprintf(stderr, "SIOCGIFFLAGS on %s failed: %s\n", slave_ifname,
+						strerror(saved_errno));
+				return 1;
+			}
+
 			if (hwaddr_notset) { /* we do nothing */
 
 			}
 			else {  /* we'll assign master's hwaddr to this slave */
-				strncpy(ifr2.ifr_name, slave_ifname, IFNAMSIZ);
-				if (ioctl(skfd, SIOCGIFFLAGS, &ifr2) < 0) {
-					int saved_errno = errno;
-					fprintf(stderr, "SIOCGIFFLAGS on %s failed: %s\n", slave_ifname,
-							strerror(saved_errno));
-					return 1;
-				}
-	
 				if (ifr2.ifr_flags & IFF_UP) {
 					ifr2.ifr_flags &= ~IFF_UP;
 					if (ioctl(skfd, SIOCSIFFLAGS, &ifr2) < 0) {
diff -Nru linux/Documentation/networking/ip-sysctl.txt linux-2.4.19-pre5-mjc/Documentation/networking/ip-sysctl.txt
--- linux/Documentation/networking/ip-sysctl.txt	Mon Feb 25 14:37:51 2002
+++ linux-2.4.19-pre5-mjc/Documentation/networking/ip-sysctl.txt	Sat Apr  6 08:25:56 2002
@@ -126,7 +126,13 @@
 	if network conditions require more than default value.
 
 tcp_tw_recycle - BOOLEAN
-	Enable fast recycling TIME-WAIT sockets. Default value is 1.
+	Enable fast recycling TIME-WAIT sockets. Default value is 0.
+	It should not be changed without advice/request of technical
+	experts.
+
+tcp_tw_reuse - BOOLEAN
+	Allow to reuse TIME-WAIT sockets for new connections when it is
+	safe from protocol viewpoint. Default value is 0.
 	It should not be changed without advice/request of technical
 	experts.
 
@@ -182,10 +188,7 @@
 	still did not receive an acknowledgement from connecting client.
 	Default value is 1024 for systems with more than 128Mb of memory,
 	and 128 for low memory machines. If server suffers of overload,
-	try to increase this number. Warning! If you make it greater
-	than 1024, it would be better to change TCP_SYNQ_HSIZE in
-	include/net/tcp.h to keep TCP_SYNQ_HSIZE*16<=tcp_max_syn_backlog
-	and to recompile kernel.
+	try to increase this number.
 
 tcp_window_scaling - BOOLEAN
 	Enable window scaling as defined in RFC1323.
@@ -357,6 +360,17 @@
 mc_forwarding - BOOLEAN
 	Do multicast routing. The kernel needs to be compiled with CONFIG_MROUTE
 	and a multicast routing daemon is required.
+
+medium_id - INTEGER
+	Integer value used to differentiate the devices by the medium they
+	are attached to. Two devices can have different id values when
+	the broadcast packets are received only on one of them.
+	The default value 0 means that the device is the only interface
+	to its medium, value of -1 means that medium is not known.
+	
+	Currently, it is used to change the proxy_arp behavior:
+	the proxy_arp feature is enabled for packets forwarded between
+	two devices attached to different media.
 
 proxy_arp - BOOLEAN
 	Do proxy arp.
diff -Nru linux/Documentation/networking/netlogging.txt linux-2.4.19-pre5-mjc/Documentation/networking/netlogging.txt
--- linux/Documentation/networking/netlogging.txt	Wed Dec 31 19:00:00 1969
+++ linux-2.4.19-pre5-mjc/Documentation/networking/netlogging.txt	Sat Apr  6 09:43:25 2002
@@ -0,0 +1,46 @@
+
+started by Ingo Molnar <mingo@redhat.com>, 2001.09.17
+
+the network console can be configured over the module interface,
+by specifying the dev=, target_ip=, source_port=, target_port=
+module parameters. Sample use:
+
+insmod netconsole dev=eth0 target_ip=0x0a000701 \
+                  source_port=6666 target_port=6666
+
+IP addresses must be specified in hexadecimal numbers. The
+above example uses target host IP 10.0.7.1.
+
+if the module is loaded then all kernel messages are sent to the
+target host via UDP packets. The remote host should run the
+client-side 'netconsole' daemon to display & log the messages.
+
+WARNING: the default setting uses the broadcast ethernet address
+to send packets, which can cause increased load on other systems
+on the same ethernet segment. If this is not desired, then the
+target ethernet address can be specified via the target_eth_byte0,
+target_eth_byte1 ... byte5 module parameters. Eg.:
+
+insmod netconsole dev=eth0 target_ip=0x0a000701 \
+                  source_port=6666 target_port=6666 \
+                  target_eth_byte0=0x00 \
+                  target_eth_byte1=0x02\
+                  target_eth_byte2=0xA5 \
+                  target_eth_byte3=0x13 \
+                  target_eth_byte4=0x51 \
+                  target_eth_byte5=0xDD
+
+will instruct the netconsole code to use target ethernet address
+00:02:A5:13:51:DD.
+
+NOTE: the network device (eth0 in the above case) can run any kind
+of other network traffic, netconsole is not intrusive. Netconsole
+might cause slight delays in other traffic if the volume of kernel
+messages is high, but should have no other impact.
+
+netconsole was designed to be as instantaneous as possible, to
+enable the logging of even the most critical kernel bugs. It works
+from IRQ contexts as well, and does not enable interrupts while
+sending packets. Due to these unique needs, configuration can not
+be more automatic, and some fundamental limitations will remain:
+only IP networks, UDP packets and ethernet devices are supported.
diff -Nru linux/Documentation/networking/pktgen.txt linux-2.4.19-pre5-mjc/Documentation/networking/pktgen.txt
--- linux/Documentation/networking/pktgen.txt	Wed Dec 31 19:00:00 1969
+++ linux-2.4.19-pre5-mjc/Documentation/networking/pktgen.txt	Sat Apr  6 08:25:56 2002
@@ -0,0 +1,50 @@
+How to use the Linux packet generator module.
+
+1. Enable CONFIG_NET_PKTGEN to compile and build pktgen.o, install it
+   in the place where insmod may find it.
+2. Cut script "ipg" (see below).
+3. Edit script to set preferred device and destination IP address.
+4. Run in shell: ". ipg"
+5. After this two commands are defined:
+   A. "pg" to start generator and to get results.
+   B. "pgset" to change generator parameters. F.e.
+      pgset "multiskb 1"      use multiple SKBs for packet generation
+      pgset "multiskb 0"      use single SKB for all transmits
+      pgset "pkt_size 9014"   sets packet size to 9014
+      pgset "frags 5"         packet will consist of 5 fragments
+      pgset "count 200000"    sets number of packets to send
+      pgset "ipg 5000"        sets artificial gap inserted between packets
+                              to 5000 nanoseconds
+      pgset "dst 10.0.0.1"    sets IP destination address
+                              (BEWARE! This generator is very aggressive!)
+      pgset "dstmac 00:00:00:00:00:00"    sets MAC destination address
+      pgset stop    	      aborts injection
+      
+  Also, ^C aborts generator.
+
+---- cut here
+
+#! /bin/sh
+
+modprobe pktgen.o
+
+function pgset() {
+    local result
+
+    echo $1 > /proc/net/pg
+
+    result=`cat /proc/net/pg | fgrep "Result: OK:"`
+    if [ "$result" = "" ]; then
+         cat /proc/net/pg | fgrep Result:
+    fi
+}
+
+function pg() {
+    echo inject > /proc/net/pg
+    cat /proc/net/pg
+}
+
+pgset "odev eth0"
+pgset "dst 0.0.0.0"
+
+---- cut here
diff -Nru linux/Documentation/networking/ppp_generic.txt linux-2.4.19-pre5-mjc/Documentation/networking/ppp_generic.txt
--- linux/Documentation/networking/ppp_generic.txt	Wed Dec 31 19:00:00 1969
+++ linux-2.4.19-pre5-mjc/Documentation/networking/ppp_generic.txt	Sat Apr  6 08:25:56 2002
@@ -0,0 +1,432 @@
+		PPP Generic Driver and Channel Interface
+		----------------------------------------
+
+			    Paul Mackerras
+			   paulus@samba.org
+			      7 Feb 2002
+
+The generic PPP driver in linux-2.4 provides an implementation of the
+functionality which is of use in any PPP implementation, including:
+
+* the network interface unit (ppp0 etc.)
+* the interface to the networking code
+* PPP multilink: splitting datagrams between multiple links, and
+  ordering and combining received fragments
+* the interface to pppd, via a /dev/ppp character device
+* packet compression and decompression
+* TCP/IP header compression and decompression
+* detecting network traffic for demand dialling and for idle timeouts
+* simple packet filtering
+
+For sending and receiving PPP frames, the generic PPP driver calls on
+the services of PPP `channels'.  A PPP channel encapsulates a
+mechanism for transporting PPP frames from one machine to another.  A
+PPP channel implementation can be arbitrarily complex internally but
+has a very simple interface with the generic PPP code: it merely has
+to be able to send PPP frames, receive PPP frames, and optionally
+handle ioctl requests.  Currently there are PPP channel
+implementations for asynchronous serial ports, synchronous serial
+ports, and for PPP over ethernet.
+
+This architecture makes it possible to implement PPP multilink in a
+natural and straightforward way, by allowing more than one channel to
+be linked to each ppp network interface unit.  The generic layer is
+responsible for splitting datagrams on transmit and recombining them
+on receive.
+
+
+PPP channel API
+---------------
+
+See include/linux/ppp_channel.h for the declaration of the types and
+functions used to communicate between the generic PPP layer and PPP
+channels.
+
+Each channel has to provide two functions to the generic PPP layer,
+via the ppp_channel.ops pointer:
+
+* start_xmit() is called by the generic layer when it has a frame to
+  send.  The channel has the option of rejecting the frame for
+  flow-control reasons.  In this case, start_xmit() should return 0
+  and the channel should call the ppp_output_wakeup() function at a
+  later time when it can accept frames again, and the generic layer
+  will then attempt to retransmit the rejected frame(s).  If the frame
+  is accepted, the start_xmit() function should return 1.
+
+* ioctl() provides an interface which can be used by a user-space
+  program to control aspects of the channel's behaviour.  This
+  procedure will be called when a user-space program does an ioctl
+  system call on an instance of /dev/ppp which is bound to the
+  channel.  (Usually it would only be pppd which would do this.)
+
+The generic PPP layer provides seven functions to channels:
+
+* ppp_register_channel() is called when a channel has been created, to
+  notify the PPP generic layer of its presence.  For example, setting
+  a serial port to the PPPDISC line discipline causes the ppp_async
+  channel code to call this function.
+
+* ppp_unregister_channel() is called when a channel is to be
+  destroyed.  For example, the ppp_async channel code calls this when
+  a hangup is detected on the serial port.
+
+* ppp_output_wakeup() is called by a channel when it has previously
+  rejected a call to its start_xmit function, and can now accept more
+  packets.
+
+* ppp_input() is called by a channel when it has received a complete
+  PPP frame.
+
+* ppp_input_error() is called by a channel when it has detected that a
+  frame has been lost or dropped (for example, because of a FCS (frame
+  check sequence) error).
+
+* ppp_channel_index() returns the channel index assigned by the PPP
+  generic layer to this channel.  The channel should provide some way
+  (e.g. an ioctl) to transmit this back to user-space, as user-space
+  will need it to attach an instance of /dev/ppp to this channel.
+
+* ppp_unit_number() returns the unit number of the ppp network
+  interface to which this channel is connected, or -1 if the channel
+  is not connected.
+
+Connecting a channel to the ppp generic layer is initiated from the
+channel code, rather than from the generic layer.  The channel is
+expected to have some way for a user-level process to control it
+independently of the ppp generic layer.  For example, with the
+ppp_async channel, this is provided by the file descriptor to the
+serial port.
+
+Generally a user-level process will initialize the underlying
+communications medium and prepare it to do PPP.  For example, with an
+async tty, this can involve setting the tty speed and modes, issuing
+modem commands, and then going through some sort of dialog with the
+remote system to invoke PPP service there.  We refer to this process
+as `discovery'.  Then the user-level process tells the medium to
+become a PPP channel and register itself with the generic PPP layer.
+The channel then has to report the channel number assigned to it back
+to the user-level process.  From that point, the PPP negotiation code
+in the PPP daemon (pppd) can take over and perform the PPP
+negotiation, accessing the channel through the /dev/ppp interface.
+
+At the interface to the PPP generic layer, PPP frames are stored in
+skbuff structures and start with the two-byte PPP protocol number.
+The frame does *not* include the 0xff `address' byte or the 0x03
+`control' byte that are optionally used in async PPP.  Nor is there
+any escaping of control characters, nor are there any FCS or framing
+characters included.  That is all the responsibility of the channel
+code, if it is needed for the particular medium.  That is, the skbuffs
+presented to the start_xmit() function contain only the 2-byte
+protocol number and the data, and the skbuffs presented to ppp_input()
+must be in the same format.
+
+The channel must provide an instance of a ppp_channel struct to
+represent the channel.  The channel is free to use the `private' field
+however it wishes.  The channel should initialize the `mtu' and
+`hdrlen' fields before calling ppp_register_channel() and not change
+them until after ppp_unregister_channel() returns.  The `mtu' field
+represents the maximum size of the data part of the PPP frames, that
+is, it does not include the 2-byte protocol number.
+
+If the channel needs some headroom in the skbuffs presented to it for
+transmission (i.e., some space free in the skbuff data area before the
+start of the PPP frame), it should set the `hdrlen' field of the
+ppp_channel struct to the amount of headroom required.  The generic
+PPP layer will attempt to provide that much headroom but the channel
+should still check if there is sufficient headroom and copy the skbuff
+if there isn't.
+
+On the input side, channels should ideally provide at least 2 bytes of
+headroom in the skbuffs presented to ppp_input().  The generic PPP
+code does not require this but will be more efficient if this is done.
+
+
+Buffering and flow control
+--------------------------
+
+The generic PPP layer has been designed to minimize the amount of data
+that it buffers in the transmit direction.  It maintains a queue of
+transmit packets for the PPP unit (network interface device) plus a
+queue of transmit packets for each attached channel.  Normally the
+transmit queue for the unit will contain at most one packet; the
+exceptions are when pppd sends packets by writing to /dev/ppp, and
+when the core networking code calls the generic layer's start_xmit()
+function with the queue stopped, i.e. when the generic layer has
+called netif_stop_queue(), which only happens on a transmit timeout.
+The start_xmit function always accepts and queues the packet which it
+is asked to transmit.
+
+Transmit packets are dequeued from the PPP unit transmit queue and
+then subjected to TCP/IP header compression and packet compression
+(Deflate or BSD-Compress compression), as appropriate.  After this
+point the packets can no longer be reordered, as the decompression
+algorithms rely on receiving compressed packets in the same order that
+they were generated.
+
+If multilink is not in use, this packet is then passed to the attached
+channel's start_xmit() function.  If the channel refuses to take
+the packet, the generic layer saves it for later transmission.  The
+generic layer will call the channel's start_xmit() function again
+when the channel calls  ppp_output_wakeup() or when the core
+networking code calls the generic layer's start_xmit() function
+again.  The generic layer contains no timeout and retransmission
+logic; it relies on the core networking code for that.
+
+If multilink is in use, the generic layer divides the packet into one
+or more fragments and puts a multilink header on each fragment.  It
+decides how many fragments to use based on the length of the packet
+and the number of channels which are potentially able to accept a
+fragment at the moment.  A channel is potentially able to accept a
+fragment if it doesn't have any fragments currently queued up for it
+to transmit.  The channel may still refuse a fragment; in this case
+the fragment is queued up for the channel to transmit later.  This
+scheme has the effect that more fragments are given to higher-
+bandwidth channels.  It also means that under light load, the generic
+layer will tend to fragment large packets across all the channels,
+thus reducing latency, while under heavy load, packets will tend to be
+transmitted as single fragments, thus reducing the overhead of
+fragmentation.
+
+
+SMP safety
+----------
+
+The PPP generic layer has been designed to be SMP-safe.  Locks are
+used around accesses to the internal data structures where necessary
+to ensure their integrity.  As part of this, the generic layer
+requires that the channels adhere to certain requirements and in turn
+provides certain guarantees to the channels.  Essentially the channels
+are required to provide the appropriate locking on the ppp_channel
+structures that form the basis of the communication between the
+channel and the generic layer.  This is because the channel provides
+the storage for the ppp_channel structure, and so the channel is
+required to provide the guarantee that this storage exists and is
+valid at the appropriate times.
+
+The generic layer requires these guarantees from the channel:
+
+* The ppp_channel object must exist from the time that
+  ppp_register_channel() is called until after the call to
+  ppp_unregister_channel() returns.
+
+* No thread may be in a call to any of ppp_input(), ppp_input_error(),
+  ppp_output_wakeup(), ppp_channel_index() or ppp_unit_number() for a
+  channel at the time that ppp_unregister_channel() is called for that
+  channel.
+
+* ppp_register_channel() and ppp_unregister_channel() must be called
+  from process context, not interrupt or softirq/BH context.
+
+* The remaining generic layer functions may be called at softirq/BH
+  level but must not be called from a hardware interrupt handler.
+
+* The generic layer may call the channel start_xmit() function at
+  softirq/BH level but will not call it at interrupt level.  Thus the
+  start_xmit() function may not block.
+
+* The generic layer will only call the channel ioctl() function in
+  process context.
+
+The generic layer provides these guarantees to the channels:
+
+* The generic layer will not call the start_xmit() function for a
+  channel while any thread is already executing in that function for
+  that channel.
+
+* The generic layer will not call the ioctl() function for a channel
+  while any thread is already executing in that function for that
+  channel.
+
+* By the time a call to ppp_unregister_channel() returns, no thread
+  will be executing in a call from the generic layer to that channel's
+  start_xmit() or ioctl() function, and the generic layer will not
+  call either of those functions subsequently.
+
+
+Interface to pppd
+-----------------
+
+The PPP generic layer exports a character device interface called
+/dev/ppp.  This is used by pppd to control PPP interface units and
+channels.  Although there is only one /dev/ppp, each open instance of
+/dev/ppp acts independently and can be attached either to a PPP unit
+or a PPP channel.  This is achieved using the file->private_data field
+to point to a separate object for each open instance of /dev/ppp.  In
+this way an effect similar to Solaris' clone open is obtained,
+allowing us to control an arbitrary number of PPP interfaces and
+channels without having to fill up /dev with hundreds of device names.
+
+When /dev/ppp is opened, a new instance is created which is initially
+unattached.  Using an ioctl call, it can then be attached to an
+existing unit, attached to a newly-created unit, or attached to an
+existing channel.  An instance attached to a unit can be used to send
+and receive PPP control frames, using the read() and write() system
+calls, along with poll() if necessary.  Similarly, an instance
+attached to a channel can be used to send and receive PPP frames on
+that channel.
+
+In multilink terms, the unit represents the bundle, while the channels
+represent the individual physical links.  Thus, a PPP frame sent by a
+write to the unit (i.e., to an instance of /dev/ppp attached to the
+unit) will be subject to bundle-level compression and to fragmentation
+across the individual links (if multilink is in use).  In contrast, a
+PPP frame sent by a write to the channel will be sent as-is on that
+channel, without any multilink header.
+
+A channel is not initially attached to any unit.  In this state it can
+be used for PPP negotiation but not for the transfer of data packets.
+It can then be connected to a PPP unit with an ioctl call, which
+makes it available to send and receive data packets for that unit.
+
+The ioctl calls which are available on an instance of /dev/ppp depend
+on whether it is unattached, attached to a PPP interface, or attached
+to a PPP channel.  The ioctl calls which are available on an
+unattached instance are:
+
+* PPPIOCNEWUNIT creates a new PPP interface and makes this /dev/ppp
+  instance the "owner" of the interface.  The argument should point to
+  an int which is the desired unit number if >= 0, or -1 to assign the
+  lowest unused unit number.  Being the owner of the interface means
+  that the interface will be shut down if this instance of /dev/ppp is
+  closed.
+
+* PPPIOCATTACH attaches this instance to an existing PPP interface.
+  The argument should point to an int containing the unit number.
+  This does not make this instance the owner of the PPP interface.
+
+* PPPIOCATTCHAN attaches this instance to an existing PPP channel.
+  The argument should point to an int containing the channel number.
+
+The ioctl calls available on an instance of /dev/ppp attached to a
+channel are:
+
+* PPPIOCDETACH detaches the instance from the channel.  This ioctl is
+  deprecated since the same effect can be achieved by closing the
+  instance.  In order to prevent possible races this ioctl will fail
+  with an EINVAL error if more than one file descriptor refers to this
+  instance (i.e. as a result of dup(), dup2() or fork()).
+
+* PPPIOCCONNECT connects this channel to a PPP interface.  The
+  argument should point to an int containing the interface unit
+  number.  It will return an EINVAL error if the channel is already
+  connected to an interface, or ENXIO if the requested interface does
+  not exist.
+
+* PPPIOCDISCONN disconnects this channel from the PPP interface that
+  it is connected to.  It will return an EINVAL error if the channel
+  is not connected to an interface.
+
+* All other ioctl commands are passed to the channel ioctl() function.
+
+The ioctl calls that are available on an instance that is attached to
+an interface unit are:
+
+* PPPIOCSMRU sets the MRU (maximum receive unit) for the interface.
+  The argument should point to an int containing the new MRU value.
+
+* PPPIOCSFLAGS sets flags which control the operation of the
+  interface.  The argument should be a pointer to an int containing
+  the new flags value.  The bits in the flags value that can be set
+  are:
+	SC_COMP_TCP		enable transmit TCP header compression
+	SC_NO_TCP_CCID		disable connection-id compression for
+				TCP header compression
+	SC_REJ_COMP_TCP		disable receive TCP header decompression
+	SC_CCP_OPEN		Compression Control Protocol (CCP) is
+				open, so inspect CCP packets
+	SC_CCP_UP		CCP is up, may (de)compress packets
+	SC_LOOP_TRAFFIC		send IP traffic to pppd
+	SC_MULTILINK		enable PPP multilink fragmentation on
+				transmitted packets
+	SC_MP_SHORTSEQ		expect short multilink sequence
+				numbers on received multilink fragments
+	SC_MP_XSHORTSEQ		transmit short multilink sequence nos.
+
+  The values of these flags are defined in <linux/if_ppp.h>.  Note
+  that the values of the SC_MULTILINK, SC_MP_SHORTSEQ and
+  SC_MP_XSHORTSEQ bits are ignored if the CONFIG_PPP_MULTILINK option
+  is not selected.
+
+* PPPIOCGFLAGS returns the value of the status/control flags for the
+  interface unit.  The argument should point to an int where the ioctl
+  will store the flags value.  As well as the values listed above for
+  PPPIOCSFLAGS, the following bits may be set in the returned value:
+	SC_COMP_RUN		CCP compressor is running
+	SC_DECOMP_RUN		CCP decompressor is running
+	SC_DC_ERROR		CCP decompressor detected non-fatal error
+	SC_DC_FERROR		CCP decompressor detected fatal error
+
+* PPPIOCSCOMPRESS sets the parameters for packet compression or
+  decompression.  The argument should point to a ppp_option_data
+  structure (defined in <linux/if_ppp.h>), which contains a
+  pointer/length pair which should describe a block of memory
+  containing a CCP option specifying a compression method and its
+  parameters.  The ppp_option_data struct also contains a `transmit'
+  field.  If this is 0, the ioctl will affect the receive path,
+  otherwise the transmit path.
+
+* PPPIOCGUNIT returns, in the int pointed to by the argument, the unit
+  number of this interface unit.
+
+* PPPIOCSDEBUG sets the debug flags for the interface to the value in
+  the int pointed to by the argument.  Only the least significant bit
+  is used; if this is 1 the generic layer will print some debug
+  messages during its operation.  This is only intended for debugging
+  the generic PPP layer code; it is generally not helpful for working
+  out why a PPP connection is failing.
+
+* PPPIOCGDEBUG returns the debug flags for the interface in the int
+  pointed to by the argument.
+
+* PPPIOCGIDLE returns the time, in seconds, since the last data
+  packets were sent and received.  The argument should point to a
+  ppp_idle structure (defined in <linux/ppp_defs.h>).  If the
+  CONFIG_PPP_FILTER option is enabled, the set of packets which reset
+  the transmit and receive idle timers is restricted to those which
+  pass the `active' packet filter.
+
+* PPPIOCSMAXCID sets the maximum connection-ID parameter (and thus the
+  number of connection slots) for the TCP header compressor and
+  decompressor.  The lower 16 bits of the int pointed to by the
+  argument specify the maximum connection-ID for the compressor.  If
+  the upper 16 bits of that int are non-zero, they specify the maximum
+  connection-ID for the decompressor, otherwise the decompressor's
+  maximum connection-ID is set to 15.
+
+* PPPIOCSNPMODE sets the network-protocol mode for a given network
+  protocol.  The argument should point to an npioctl struct (defined
+  in <linux/if_ppp.h>).  The `protocol' field gives the PPP protocol
+  number for the protocol to be affected, and the `mode' field
+  specifies what to do with packets for that protocol:
+
+	NPMODE_PASS	normal operation, transmit and receive packets
+	NPMODE_DROP	silently drop packets for this protocol
+	NPMODE_ERROR	drop packets and return an error on transmit
+	NPMODE_QUEUE	queue up packets for transmit, drop received
+			packets
+
+  At present NPMODE_ERROR and NPMODE_QUEUE have the same effect as
+  NPMODE_DROP.
+
+* PPPIOCGNPMODE returns the network-protocol mode for a given
+  protocol.  The argument should point to an npioctl struct with the
+  `protocol' field set to the PPP protocol number for the protocol of
+  interest.  On return the `mode' field will be set to the network-
+  protocol mode for that protocol.
+
+* PPPIOCSPASS and PPPIOCSACTIVE set the `pass' and `active' packet
+  filters.  These ioctls are only available if the CONFIG_PPP_FILTER
+  option is selected.  The argument should point to a sock_fprog
+  structure (defined in <linux/filter.h>) containing the compiled BPF
+  instructions for the filter.  Packets are dropped if they fail the
+  `pass' filter; otherwise, if they fail the `active' filter they are
+  passed but they do not reset the transmit or receive idle timer.
+
+* PPPIOCSMRRU enables or disables multilink processing for received
+  packets and sets the multilink MRRU (maximum reconstructed receive
+  unit).  The argument should point to an int containing the new MRRU
+  value.  If the MRRU value is 0, processing of received multilink
+  fragments is disabled.  This ioctl is only available if the
+  CONFIG_PPP_MULTILINK option is selected.
+
+Last modified: 7-feb-2002
diff -Nru linux/Documentation/networking/slicecom.hun linux-2.4.19-pre5-mjc/Documentation/networking/slicecom.hun
--- linux/Documentation/networking/slicecom.hun	Wed Dec 31 19:00:00 1969
+++ linux-2.4.19-pre5-mjc/Documentation/networking/slicecom.hun	Sat Apr  6 08:25:56 2002
@@ -0,0 +1,371 @@
+
+SliceCOM adapter felhasznaloi dokumentacioja - 0.51 verziohoz
+
+Bart�k Istv�n <bartoki@itc.hu>
+Utolso modositas: Wed Aug 29 17:26:58 CEST 2001
+
+-----------------------------------------------------------------
+
+Hasznalata:
+
+Forditas:
+
+Code maturity level options
+	[*] Prompt for development and/or incomplete code/drivers
+
+Network device support
+	Wan interfaces
+		<M> MultiGate (COMX) synchronous
+			<M> Support for MUNICH based boards: SliceCOM, PCICOM (NEW)
+			<M> Support for HDLC and syncPPP...
+
+
+A modulok betoltese:
+
+modprobe comx
+
+modprobe comx-proto-ppp		# a Cisco-HDLC es a SyncPPP protokollt is
+				# ez a modul adja
+
+modprobe comx-hw-munich		# a modul betoltodeskor azonnal jelent a
+				# syslogba a detektalt kartyakrol
+
+
+Konfiguralas:
+
+# Ezen az interfeszen Cisco-HDLC vonali protokoll fog futni
+# Az interfeszhez rendelt idoszeletek: 1,2 (128 kbit/sec-es vonal)
+# (a G.703 keretben az elso adatot vivo idoszelet az 1-es)
+#
+mkdir /proc/comx/comx0.1/
+echo slicecom	>/proc/comx/comx0.1/boardtype
+echo hdlc	>/proc/comx/comx0.1/protocol
+echo 1 2	>/proc/comx/comx0.1/timeslots
+
+
+# Ezen az interfeszen SyncPPP vonali protokoll fog futni
+# Az interfeszhez rendelt idoszelet: 3 (64 kbit/sec-es vonal)
+#
+mkdir /proc/comx/comx0.2/
+echo slicecom	>/proc/comx/comx0.2/boardtype
+echo ppp	>/proc/comx/comx0.2/protocol
+echo 3		>/proc/comx/comx0.2/timeslots
+
+...
+
+ifconfig comx0.1 up
+ifconfig comx0.2 up
+
+-----------------------------------------------------------------
+
+A COMX driverek default 20 csomagnyi transmit queue-t rendelnek a halozati
+interfeszekhez. WAN halozatokban ennel hosszabbat is szokas hasznalni
+(20 es 100 kozott), hogy a vonal kihasznaltsaga nagy terheles eseten jobb
+legyen (bar ezzel megno a varhato kesleltetes a csomagok sorban allasa miatt):
+
+# ifconfig comx0 txqueuelen 50
+
+Ezt a beallitasi lehetoseget csak az ujabb disztribuciok ifconfig parancsa
+tamogatja (amik mar a 2.2 kernelekhez keszultek, mint a RedHat 6.1 vagy a
+Debian 2.2).
+
+A 2.1-es Debian disztribuciohoz a http://www.debian.org/~rcw/2.2/netbase/
+cimrol toltheto le ujabb netbase csomag, ami mar ilyet tamogato ifconfig
+parancsot tartalmaz. Bovebben a 2.2 kernel hasznalatarol Debian 2.1 alatt:
+http://www.debian.org/releases/stable/running-kernel-2.2
+
+-----------------------------------------------------------------
+
+A kartya LED-jeinek jelentese:
+
+piros	- eg, ha Remote Alarm-ot kuld a tuloldal
+zold	- eg, ha a vett jelben megtalalja a keretszinkront
+
+Reszletesebben:
+
+piros:	zold:	jelentes:
+
+-	-	nincs keretszinkron (nincs jel, vagy rossz a jel)
+-	eg	"minden rendben"
+eg	eg	a vetel OK, de a tuloldal Remote Alarm-ot kuld
+eg	-	ez nincs ertelmezve, egyelore funkcio nelkul
+
+-----------------------------------------------------------------
+
+Reszletesebb leiras a hardver beallitasi lehetosegeirol:
+
+Az altalanos,- es a protokoll-retegek beallitasi lehetosegeirol a 'comx.txt'
+fajlban leirtak SliceCOM kartyanal is ervenyesek, itt csak a hardver-specifikus
+beallitasi lehetosegek vannak osszefoglalva:
+
+Konfiguralasi interfesz a /proc/comx/ alatt:
+
+Minden timeslot-csoportnak kulon comx* interfeszt kell letrehozni mkdir-rel:
+comx0, comx1, .. stb. Itt beallithato, hogy az adott interfesz hanyadik kartya
+melyik timeslotja(i)bol alljon ossze. A Cisco-fele serial3:1 elnevezesek
+(serial3:1 = a 3. kartyaban az 1-es idoszelet-csoport) Linuxon aliasing-ot
+jelentenenek, ezert mi nem tudunk ilyen elnevezest hasznalni.
+
+Tobb kartya eseten a comx0.1, comx0.2, ... vagy slice0.1, slice0.2 nevek
+hasznalhatoak.
+
+Tobb SliceCOM kartya is lehet egy gepben, de sajat interrupt kell mindegyiknek,
+nem tud meg megosztott interruptot kezelni.
+
+Az egesz kartyat erinto beallitasok:
+
+Az ioport es irq beallitas nincs: amit a PCI BIOS kioszt a rendszernek,
+azt hasznalja a driver.
+
+
+comx0/boardnum	- hanyadik SliceCOM kartya a gepben (a 'termeszetes' PCI
+		sorrendben ertve: ahogyan a /proc/pci-ban vagy az 'lspci'
+		kimeneteben megjelenik, altalaban az alaplapi PCI meghajto
+		aramkorokhoz kozelebb eso kartyak a kisebb sorszamuak)
+
+		Default: 0 (0-tol kezdodik a szamolas)
+
+
+Bar a kovetkezoket csak egy-egy interfeszen allitjuk at, megis az egesz kartya
+mukodeset egyszerre allitjak. A megkotes hogy csak UP-ban levo interfeszen
+hasznalhatoak, azert van, mert kulonben nem vart eredmenyekre vezetne egy ilyen
+paranccsorozat:
+
+	echo 0        >boardnum
+	echo internal >clock_source
+	echo 1        >boardnum
+
+- Ez a 0-s board clock_source-at allitana at.
+
+Ezek a beallitasok megmaradnak az osszes interfesz torlesekor, de torlodnek
+a driver modul ki/betoltesekor.
+
+
+comx0/clock_source - A Tx orajelforrasa, a Cisco-val hasonlatosra keszult.
+	Hasznalata:
+
+	papaya:# echo line     >/proc/comx/comx0/clock_source
+	papaya:# echo internal >/proc/comx/comx0/clock_source
+
+	line     - A Tx orajelet a vett adatfolyambol dekodolja, igyekszik
+		igazodni hozza. Ha nem lat orajelet az inputon, akkor
+		atall a sajat orajelgeneratorara.
+	internal - A Tx orajelet a sajat orajelgeneratora szolgaltatja.
+
+	Default: line
+
+	Normal osszeallitas eseten a tavkozlesi szolgaltato eszkoze
+	(pl. HDSL modem) adja az orajelet, ezert ez a default.
+
+
+comx0/framing	- A CRC4 ki/be kapcsolasa
+
+	A CRC4: 16 PCM keretet (A PCM keret az, amibe a 32 darab 64
+	kilobites csatorna van bemultiplexalva. Nem osszetevesztendo a HDLC
+	kerettel.) 2x8 -as csoportokra osztanak, es azokhoz 4-4 bites CRC-t
+	szamolnak. Elsosorban a vonal minosegenek a monitorozasara szolgal.
+
+	papaya:~# echo crc4	>/proc/comx/comx0/framing
+	papaya:~# echo no-crc4	>/proc/comx/comx0/framing
+
+	Default a 'crc4', a MATAV vonalak altalaban igy futnak. De ha nem
+	egyforma is a beallitas a vonal ket vegen, attol a forgalom altalaban
+	at tud menni.
+
+
+comx0/linecode	- A vonali kodolas beallitasa
+
+	papaya:~# echo hdb3	>/proc/comx/comx0/linecode
+	papaya:~# echo ami	>/proc/comx/comx0/linecode
+
+	Default a 'hdb3', a MATAV vonalak igy futnak.
+	
+	(az AMI kodolas igen ritka E1-es vonalaknal). Ha ez a beallitas nem
+	egyezik a vonal ket vegen, akkor elofordulhat hogy a keretszinkron
+	osszejon, de CRC4-hibak es a vonalakon atvitt adatokban is hibak
+	keletkeznek (amit a HDLC/SyncPPP szinten CRC-hibaval jelez)
+
+
+comx0/reg	- a kartya aramkoreinek, a MUNICH (reg) es a FALC (lbireg)
+comx0/lbireg	regisztereinek kozvetlen elerese. Hasznalata:
+
+		echo >reg 0x04 0x0	- a 4-es regiszterbe 0-t ir
+		echo >reg 0x104		- printk()-val kiirja a 4-es regiszter
+					tartalmat a syslogba.
+
+		WARNING: ezek csak a fejleszteshez keszultek, sok galibat
+		lehet veluk okozni!
+
+
+comx0/loopback - A kartya G.703 jelenek a visszahurkolasara is van lehetoseg:
+
+	papaya:# echo none   >/proc/comx/comx0/loopback
+	papaya:# echo local  >/proc/comx/comx0/loopback
+	papaya:# echo remote >/proc/comx/comx0/loopback
+
+	none   - nincs visszahurkolas, normal mukodes
+	local  - a kartya a sajat maga altal adott jelet kapja vissza
+	remote - a kartya a kivulrol vett jelet adja kifele
+
+	Default: none
+
+-----------------------------------------------------------------
+
+Az interfeszhez (Cisco terminologiaban 'channel-group') kapcsolodo beallitasok:
+
+comx0/timeslots	- mely timeslotok (idoszeletek) tartoznak az adott interfeszhez.
+
+	papaya:~# cat /proc/comx/comx0/timeslots
+	1 3 4 5 6
+	papaya:~#
+
+	Egy timeslot megkeresese (hanyas interfeszbe tartozik nalunk):
+
+	papaya:~# grep ' 4' /proc/comx/comx*/timeslots
+	/proc/comx/comx0/timeslots:1 3 4 5 6
+	papaya:~#
+
+	Beallitasa:
+	papaya:~# echo '1 5 2 6 7 8' >/proc/comx/comx0/timeslots
+	
+	A timeslotok sorrendje nem szamit, '1 3 2' ugyanaz mint az '1 2 3'.
+
+	Beallitashoz az adott interfesznek DOWN-ban kell lennie
+	(ifconfig comx0 down), de ugyanannak a kartyanak a tobbi interfesze
+	uzemelhet kozben.
+
+	Beallitaskor leellenorzi, hogy az uj timeslotok nem utkoznek-e egy
+	masik interfesz timeslotjaival. Ha utkoznek, akkor nem allitja at.
+
+	Mindig 10-es szamrendszerben tortenik a timeslotok ertelmezese, nehogy
+	a 08, 09 alaku felirast rosszul ertelmezze.
+
+-----------------------------------------------------------------
+
+Az interfeszek es a kartya allapotanak lekerdezese:
+
+- A ' '-szel kezdodo sorok az eredeti kimenetet, a //-rel kezdodo sorok a
+magyarazatot jelzik.
+
+ papaya:~$ cat /proc/comx/comx1/status
+ Interface administrative status is UP, modem status is UP, protocol is UP
+ Modem status changes: 0, Transmitter status is IDLE, tbusy: 0
+ Interface load (input): 978376 / 947808 / 951024 bits/s (5s/5m/15m)
+               (output): 978376 / 947848 / 951024 bits/s (5s/5m/15m)
+ Debug flags: none
+ RX errors: len: 22, overrun: 1, crc: 0, aborts: 0
+            buffer overrun: 0, pbuffer overrun: 0
+ TX errors: underrun: 0
+ Line keepalive (value: 10) status UP [0]
+
+// Itt kezdodik a hardver-specifikus resz:
+ Controller status:
+         No alarms
+
+// Alarm: hibajelzes:
+//
+// No alarms - minden rendben
+//
+// LOS  - Loss Of Signal - nem erzekel jelet a bemeneten.
+// AIS  - Alarm Indication Signal - csak egymas utani 1-esek jonnek
+//	a bemeneten, a tuloldal igy is jelezheti hogy meghibasodott vagy
+//	nincs inicializalva.
+// AUXP - Auxiliary Pattern Indication - 01010101.. sorozat jon a bemeneten.
+// LFA  - Loss of Frame Alignment - nincs keretszinkron
+// RRA  - Receive Remote Alarm - a tuloldal el, de hibat jelez.
+// LMFA - Loss of CRC4 Multiframe Alignment - nincs CRC4-multikeret-szinkron
+// NMF  - No Multiframe alignment Found after 400 msec - ilyen alarm a no-crc4
+//	es crc4 keretezesek eseten nincs, lasd lentebb
+//
+// Egyeb lehetseges hibajelzesek:
+//
+// Transmit Line Short - a kartya ugy erzi hogy az adasi kimenete rovidre
+//	van zarva, ezert kikapcsolta az adast. (nem feltetlenul veszi eszre
+//	a kulso rovidzarat)
+
+// A veteli oldal csomagjainak lancolt listai, debug celokra:
+
+ Rx ring:
+         rafutott: 0
+         lastcheck: 50845731, jiffies: 51314281
+         base: 017b1858
+         rx_desc_ptr: 0
+         rx_desc_ptr: 017b1858
+         hw_curr_ptr: 017b1858
+         06040000 017b1868 017b1898 c016ff00
+         06040000 017b1878 017b1e9c c016ff00
+         46040000 017b1888 017b24a0 c016ff00
+         06040000 017b1858 017b2aa4 c016ff00
+
+// A kartyat hasznalo tobbi interfesz: a 0-s channel-group a comx1 interfesz,
+// es az 1,2,...,16 timeslotok tartoznak hozza:
+
+ Interfaces using this board: (channel-group, interface, timeslots)
+          0 comx1: 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16
+          1 comx2: 17
+          2 comx3: 18
+          3 comx4: 19
+          4 comx5: 20
+          5 comx6: 21
+          6 comx7: 22
+          7 comx8: 23
+          8 comx9: 24
+          9 comx10: 25
+         10 comx11: 26
+         11 comx12: 27
+         12 comx13: 28
+         13 comx14: 29
+         14 comx15: 30
+         15 comx16: 31
+
+// Hany esemenyt kezelt le a driver egy-egy hardver-interrupt kiszolgalasanal:
+
+ Interrupt work histogram:
+ hist[ 0]:        0 hist[ 1]:        2 hist[ 2]:    18574 hist[ 3]:       79
+ hist[ 4]:       14 hist[ 5]:        1 hist[ 6]:        0 hist[ 7]:        1
+ hist[ 8]:        0 hist[ 9]:        7
+
+// Hany kikuldendo csomag volt mar a Tx-ringben amikor ujabb lett irva bele:
+
+ Tx ring histogram:
+ hist[ 0]:     2329 hist[ 1]:        0 hist[ 2]:        0 hist[ 3]:        0
+
+// Az E1-interfesz hiba-szamlaloi, az rfc2495-nek megfeleloen:
+// (kb. a Cisco routerek "show controllers e1" formatumaban: http://www.cisco.com/univercd/cc/td/doc/product/software/ios11/rbook/rinterfc.htm#xtocid25669126)
+
+Data in current interval (91 seconds elapsed):
+   9516 Line Code Violations, 65 Path Code Violations, 2 E-Bit Errors
+   0 Slip Secs, 2 Fr Loss Secs, 2 Line Err Secs, 0 Degraded Mins
+   0 Errored Secs, 0 Bursty Err Secs, 0 Severely Err Secs, 11 Unavail Secs
+Data in Interval 1 (15 minutes):
+   0 Line Code Violations, 0 Path Code Violations, 0 E-Bit Errors
+   0 Slip Secs, 0 Fr Loss Secs, 0 Line Err Secs, 0 Degraded Mins
+   0 Errored Secs, 0 Bursty Err Secs, 0 Severely Err Secs, 0 Unavail Secs
+Data in last 4 intervals (1 hour):
+   0 Line Code Violations, 0 Path Code Violations, 0 E-Bit Errors
+   0 Slip Secs, 0 Fr Loss Secs, 0 Line Err Secs, 0 Degraded Mins
+   0 Errored Secs, 0 Bursty Err Secs, 0 Severely Err Secs, 0 Unavail Secs
+Data in last 96 intervals (24 hours):
+   0 Line Code Violations, 0 Path Code Violations, 0 E-Bit Errors
+   0 Slip Secs, 0 Fr Loss Secs, 0 Line Err Secs, 0 Degraded Mins
+   0 Errored Secs, 0 Bursty Err Secs, 0 Severely Err Secs, 0 Unavail Secs
+
+-----------------------------------------------------------------
+
+Nehany kulonlegesebb beallitasi lehetoseg (idovel beepulhetnek majd a driverbe):
+Ezekkel sok galibat lehet okozni, nagyon ovatosan kell oket hasznalni!
+
+	modified CRC-4, for improved interworking of CRC-4 and non-CRC-4
+	devices: (lasd page 107 es g706 Annex B)
+		lbireg[ 0x1b ] |= 0x08
+		lbireg[ 0x1c ] |= 0xc0
+	- ilyenkor ertelmezett az NMF - 'No Multiframe alignment Found after
+	400 msec' alarm.
+
+	FALC - a vonali meghajto IC
+	local loop - a sajat adasomat halljam vissza
+	remote loop - a kivulrol jovo adast adom vissza
+
+	Egy hibakeresesre hasznalhato dolog:
+		- 1-es timeslot local loop a FALC-ban:	echo >lbireg 0x1d 0x21
+		- local loop kikapcsolasa:		echo >lbireg 0x1d 0x00
diff -Nru linux/Documentation/networking/slicecom.txt linux-2.4.19-pre5-mjc/Documentation/networking/slicecom.txt
--- linux/Documentation/networking/slicecom.txt	Wed Dec 31 19:00:00 1969
+++ linux-2.4.19-pre5-mjc/Documentation/networking/slicecom.txt	Sat Apr  6 08:25:56 2002
@@ -0,0 +1,369 @@
+
+SliceCOM adapter user's documentation - for the 0.51 driver version
+
+Written by Bart�k Istv�n <bartoki@itc.hu>
+
+English translation: Lakatos Gy�rgy <gyuri@itc.hu>
+Mon Dec 11 15:28:42 CET 2000
+
+Last modified: Wed Aug 29 17:25:37 CEST 2001
+
+-----------------------------------------------------------------
+
+Usage:
+
+Compiling the kernel:
+
+Code maturity level options
+	[*] Prompt for development and/or incomplete code/drivers
+
+Network device support
+	Wan interfaces
+		<M> MultiGate (COMX) synchronous
+			<M> Support for MUNICH based boards: SliceCOM, PCICOM (NEW)
+			<M> Support for HDLC and syncPPP...
+
+
+Loading the modules:
+
+modprobe comx
+
+modprobe comx-proto-ppp		# module for  Cisco-HDLC and SyncPPP protocols
+
+modprobe comx-hw-munich		# the module logs information by the kernel
+				# about the detected boards
+
+
+Configuring the board:
+
+# This interface will use the Cisco-HDLC line protocol,
+# the timeslices assigned are 1,2 (128 KiBit line speed)
+# (the first data timeslice in the G.703 frame is no. 1)
+#
+mkdir /proc/comx/comx0.1/
+echo slicecom	>/proc/comx/comx0.1/boardtype
+echo hdlc	>/proc/comx/comx0.1/protocol
+echo 1 2	>/proc/comx/comx0.1/timeslots
+
+
+# This interface uses SyncPPP line protocol, the assigned 
+# is no. 3 (64 KiBit line speed)
+#
+mkdir /proc/comx/comx0.2/
+echo slicecom	>/proc/comx/comx0.2/boardtype
+echo ppp	>/proc/comx/comx0.2/protocol
+echo 3		>/proc/comx/comx0.2/timeslots
+
+...
+
+ifconfig comx0.1 up
+ifconfig comx0.2 up
+
+-----------------------------------------------------------------
+
+The COMX interfaces use a 10 packet transmit queue by default, however WAN
+networks sometimes use bigger values (20 to 100), to utilize the line better
+by large traffic (though the line delay increases because of more packets
+join the queue).
+
+# ifconfig comx0 txqueuelen 50
+
+This option is only supported by the ifconfig command of the later 
+distributions, which came with 2.2 kernels, such as RedHat 6.1 or Debian 2.2.
+
+You can download a newer netbase packet from 
+http://www.debian.org/~rcw/2.2/netbase/ for Debian 2.1, which has a new
+ifconfig. You can get further information about using 2.2 kernel with
+Debian 2.1 from http://www.debian.org/releases/stable/running-kernel-2.2
+
+-----------------------------------------------------------------
+
+The SliceCom LEDs:
+
+red	- on, if the interface is unconfigured, or it gets Remote Alarm-s
+green	- on, if the board finds frame-sync in the received signal 	
+
+A bit more detailed:
+
+red:	green:	meaning:
+
+-	-	no frame-sync, no signal received, or signal SNAFU.
+-	on	"Everything is OK"
+on	on	Recepion is ok, but the remote end sends Remote Alarm
+on	-	The interface is unconfigured
+
+-----------------------------------------------------------------
+
+A more detailed description of the hardware setting options:
+
+The general and the protocol layer options described in the 'comx.txt' file
+apply to the SliceCom as well, I only summarize the SliceCom hardware specific
+settings below.
+
+The '/proc/comx' configuring interface:
+
+An interface directory should be created for every timeslot group with
+'mkdir', e,g: 'comx0', 'comx1' etc. The timeslots can be assigned here to the
+specific interface. The Cisco-like naming convention (serial3:1 - first
+timeslot group of the 3rd. board) can't be used here, because these mean IP
+aliasing in Linux.
+
+You can give any meaningful name to keep the configuration clear; 
+e.g: 'comx0.1', 'comx0.2', 'comx1.1', comx1.2', if you have two boards
+with two interfaces each.
+
+Settings, which apply to the board:
+
+Neither 'io' nor 'irq' settings required, the driver uses the resources
+given by the PCI BIOS.
+
+comx0/boardnum	- board number of the SliceCom in the PC (using the 'natural'
+		PCI order) as listed in '/proc/pci' or the output of the
+	 	'lspci' command, generally the slots nearer to the motherboard
+		PCI driver chips have the lower numbers.
+		
+		Default: 0 (the counting starts with 0)
+
+Though the options below are to be set on a single interface, they apply to the
+whole board. The restriction, to use them on 'UP' interfaces, is because the 
+command sequence below could lead to unpredicable results.
+
+	# echo 0        >boardnum
+	# echo internal >clock_source
+	# echo 1        >boardnum
+
+The sequence would set the clock source of board 0.
+
+These settings will persist after all the interfaces are cleared, but are
+cleared when the driver module is unloaded and loaded again.
+
+comx0/clock_source - source of the transmit clock
+	Usage:
+
+	# echo line     >/proc/comx/comx0/clock_source
+	# echo internal >/proc/comx/comx0/clock_source
+
+	line	- The Tx clock is being decoded if the input data stream,
+		if no clock seen on the input, then the board will use it's
+		own clock generator.
+
+	internal - The Tx clock is supplied by the builtin clock generator. 	
+
+	Default: line
+
+	Normally, the telecommunication company's end device (the HDSL
+	modem) provides the Tx clock, that's why 'line' is the default.
+
+comx0/framing	- Switching CRC4 off/on
+
+	CRC4: 16 PCM frames (The 32 64Kibit channels are multiplexed into a
+	PCM frame, nothing to do with HDLC frames) are divided into 2x8
+	groups, each group has a 4 bit CRC.
+
+	# echo crc4	>/proc/comx/comx0/framing
+	# echo no-crc4	>/proc/comx/comx0/framing
+
+	Default is 'crc4', the Hungarian MATAV lines behave like this. 
+	The traffic generally passes if this setting on both ends don't match.
+
+comx0/linecode	- Setting the line coding
+
+	# echo hdb3	>/proc/comx/comx0/linecode
+	# echo ami	>/proc/comx/comx0/linecode
+
+	Default a 'hdb3', MATAV lines use this.
+	
+	(AMI coding is rarely used with E1 lines). Frame sync may occur, if
+	this setting doesn't match the other end's, but CRC4 and data errors
+	will come, which will result in CRC errors on HDLC/SyncPPP level. 
+
+comx0/reg	- direct access to the board's MUNICH (reg) and FALC (lbireg)
+comx0/lbireg	circuit's registers  
+
+	# echo >reg 0x04 0x0	- write 0 to register 4
+	# echo >reg 0x104	- write the contents of register 4 with
+				printk() to syslog
+
+WARNING! These are only for development purposes, messing with this will
+	result much trouble!
+
+comx0/loopback - Places a loop to the board's G.703 signals
+
+	# echo none   >/proc/comx/comx0/loopback
+	# echo local  >/proc/comx/comx0/loopback
+	# echo remote >/proc/comx/comx0/loopback
+
+	none   - normal operation, no loop
+	local  - the board receives it's own output
+	remote - the board sends the received data to the remote side
+
+	Default: none
+
+-----------------------------------------------------------------
+
+Interface (channel group in Cisco terms) settings: 
+
+comx0/timeslots	- which timeslots belong to the given interface
+
+	Setting:
+
+	# echo '1 5 2 6 7 8' >/proc/comx/comx0/timeslots
+
+	# cat /proc/comx/comx0/timeslots
+	1 2 5 6 7 8 
+	#
+
+	Finding a timeslot: 
+
+	# grep ' 4' /proc/comx/comx*/timeslots
+	/proc/comx/comx0/timeslots:1 3 4 5 6
+	#
+
+	The timeslots can be in any order, '1 2 3' is the same as '1 3 2'.
+
+	The interface has to be DOWN during the setting ('ifconfig comx0
+	down'), but the other interfaces could operate normally.
+
+	The driver checks if the assigned timeslots are vacant, if not, then
+	the setting won't be applied.
+
+	The timeslot values are treated as decimal numbers, not to misunderstand
+	values of 08, 09 form.
+
+-----------------------------------------------------------------
+
+Checking the interface and board status:
+
+- Lines beginning with ' ' (space) belong to the original output, the lines
+which begin with '//' are the comments.
+
+ papaya:~$ cat /proc/comx/comx1/status
+ Interface administrative status is UP, modem status is UP, protocol is UP
+ Modem status changes: 0, Transmitter status is IDLE, tbusy: 0
+ Interface load (input): 978376 / 947808 / 951024 bits/s (5s/5m/15m)
+               (output): 978376 / 947848 / 951024 bits/s (5s/5m/15m)
+ Debug flags: none
+ RX errors: len: 22, overrun: 1, crc: 0, aborts: 0
+            buffer overrun: 0, pbuffer overrun: 0
+ TX errors: underrun: 0
+ Line keepalive (value: 10) status UP [0]
+
+// The hardware specific part starts here:
+ Controller status:
+         No alarms
+
+// Alarm: 
+//
+// No alarms - Everything OK
+//
+// LOS  - Loss Of Signal - No signal sensed on the input
+// AIS  - Alarm Indication Signal - The remot side sends '11111111'-s, 
+//	it tells, that there's an error condition, or it's not
+//	initialised.
+// AUXP - Auxiliary Pattern Indication - 01010101.. received.
+// LFA  - Loss of Frame Alignment - no frame sync received.
+// RRA  - Receive Remote Alarm - the remote end's OK, but singnals error cond.
+// LMFA - Loss of CRC4 Multiframe Alignment - no CRC4 multiframe sync.
+// NMF  - No Multiframe alignment Found after 400 msec - no such alarm using
+//	no-crc4 or crc4 framing, see below.
+//
+// Other possible error messages:
+//
+// Transmit Line Short - the board felt, that it's output is short-circuited,
+// 	so it switched the transmission off. (The board can't definitely tell,
+//	that it's output is short-circuited.)
+
+// Chained list of the received packets, for debug purposes:
+
+ Rx ring:
+         rafutott: 0
+         lastcheck: 50845731, jiffies: 51314281
+         base: 017b1858
+         rx_desc_ptr: 0
+         rx_desc_ptr: 017b1858
+         hw_curr_ptr: 017b1858
+         06040000 017b1868 017b1898 c016ff00
+         06040000 017b1878 017b1e9c c016ff00
+         46040000 017b1888 017b24a0 c016ff00
+         06040000 017b1858 017b2aa4 c016ff00
+
+// All the interfaces using the board: comx1, using the 1,2,...16 timeslots,
+// comx2, using timeslot 17, etc.
+
+ Interfaces using this board: (channel-group, interface, timeslots)
+          0 comx1: 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16
+          1 comx2: 17
+          2 comx3: 18
+          3 comx4: 19
+          4 comx5: 20
+          5 comx6: 21
+          6 comx7: 22
+          7 comx8: 23
+          8 comx9: 24
+          9 comx10: 25
+         10 comx11: 26
+         11 comx12: 27
+         12 comx13: 28
+         13 comx14: 29
+         14 comx15: 30
+         15 comx16: 31
+
+// The number of events handled by the driver during an interrupt cycle:
+
+ Interrupt work histogram:
+ hist[ 0]:        0 hist[ 1]:        2 hist[ 2]:    18574 hist[ 3]:       79
+ hist[ 4]:       14 hist[ 5]:        1 hist[ 6]:        0 hist[ 7]:        1
+ hist[ 8]:        0 hist[ 9]:        7
+
+// The number of packets to send in the Tx ring, when a new one arrived:
+
+ Tx ring histogram:
+ hist[ 0]:     2329 hist[ 1]:        0 hist[ 2]:        0 hist[ 3]:        0
+
+// The error counters of the E1 interface, according to the RFC2495,
+// (similar to the Cisco "show controllers e1" command's output:
+// http://www.cisco.com/univercd/cc/td/doc/product/software/ios11/rbook/rinterfc.htm#xtocid25669126)
+
+Data in current interval (91 seconds elapsed):
+   9516 Line Code Violations, 65 Path Code Violations, 2 E-Bit Errors
+   0 Slip Secs, 2 Fr Loss Secs, 2 Line Err Secs, 0 Degraded Mins
+   0 Errored Secs, 0 Bursty Err Secs, 0 Severely Err Secs, 11 Unavail Secs
+Data in Interval 1 (15 minutes):
+   0 Line Code Violations, 0 Path Code Violations, 0 E-Bit Errors
+   0 Slip Secs, 0 Fr Loss Secs, 0 Line Err Secs, 0 Degraded Mins
+   0 Errored Secs, 0 Bursty Err Secs, 0 Severely Err Secs, 0 Unavail Secs
+Data in last 4 intervals (1 hour):
+   0 Line Code Violations, 0 Path Code Violations, 0 E-Bit Errors
+   0 Slip Secs, 0 Fr Loss Secs, 0 Line Err Secs, 0 Degraded Mins
+   0 Errored Secs, 0 Bursty Err Secs, 0 Severely Err Secs, 0 Unavail Secs
+Data in last 96 intervals (24 hours):
+   0 Line Code Violations, 0 Path Code Violations, 0 E-Bit Errors
+   0 Slip Secs, 0 Fr Loss Secs, 0 Line Err Secs, 0 Degraded Mins
+   0 Errored Secs, 0 Bursty Err Secs, 0 Severely Err Secs, 0 Unavail Secs
+
+-----------------------------------------------------------------
+
+Some unique options, (may get into the driver later):
+Treat them very carefully, these can cause much trouble!
+
+	modified CRC-4, for improved interworking of CRC-4 and non-CRC-4
+	devices: (see page 107 and g706 Annex B)
+		lbireg[ 0x1b ] |= 0x08
+		lbireg[ 0x1c ] |= 0xc0
+
+	- The NMF - 'No Multiframe alignment Found after 400 msec' alarm 
+	comes into account.
+
+	FALC - the line driver chip.
+	local loop - I hear my transmission back.
+	remote loop - I echo the remote transmission back.
+
+	Something useful for finding errors:
+	
+		- local loop for timeslot 1 in the FALC chip:
+
+	# echo >lbireg 0x1d 0x21
+
+		- Swithing the loop off:
+
+	# echo >lbireg 0x1d 0x00
diff -Nru linux/Documentation/pci.txt linux-2.4.19-pre5-mjc/Documentation/pci.txt
--- linux/Documentation/pci.txt	Fri Dec 21 12:41:53 2001
+++ linux-2.4.19-pre5-mjc/Documentation/pci.txt	Sat Apr  6 08:25:56 2002
@@ -156,6 +156,11 @@
 which enables the bus master bit in PCI_COMMAND register and also fixes
 the latency timer value if it's set to something bogus by the BIOS.
 
+   If you want to use the PCI Memory-Write-Invalidate transaction,
+call pci_set_mwi().  This enables bit PCI_COMMAND bit for Mem-Wr-Inval
+and also ensures that the cache line size register is set correctly.
+Make sure to check the return value of pci_set_mwi(), not all architectures
+may support Memory-Write-Invalidate.
 
 4. How to access PCI config space
 ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
@@ -202,6 +207,8 @@
 pci_resource_len()		Returns the byte length of a PCI region
 pci_set_drvdata()		Set private driver data pointer for a pci_dev
 pci_get_drvdata()		Return private driver data pointer for a pci_dev
+pci_set_mwi()			Enable Memory-Write-Invalidate transactions.
+pci_clear_mwi()			Disable Memory-Write-Invalidate transactions.
 
 
 7. Miscellaneous hints
diff -Nru linux/Documentation/power/pci.txt linux-2.4.19-pre5-mjc/Documentation/power/pci.txt
--- linux/Documentation/power/pci.txt	Thu Jun 28 17:58:05 2001
+++ linux-2.4.19-pre5-mjc/Documentation/power/pci.txt	Sat Apr  6 08:25:56 2002
@@ -63,7 +63,7 @@
 callbacks. This currently takes place only during APM state transitions.
 
 Upon going to sleep, the PCI subsystem walks its device tree twice. Both times, it does
-a depth first walk of the device tree. The first walk saves  each of the device's state 
+a depth first walk of the device tree. The first walk saves each of the device's state 
 and checks for devices that will prevent the system from entering a global power state. 
 The next walk then places the devices in a low power state.
 
@@ -104,7 +104,7 @@
 -----------------
 
 Usage:
-	pci_restore_state(dev,buffer);
+	pci_restore_state(dev, buffer);
 
 Description:
 	Restore previously saved config space. (First 64 bytes only);
@@ -117,7 +117,7 @@
 -------------------
 
 Usage:
-	pci_set_power_state(dev,state);
+	pci_set_power_state(dev, state);
 
 Description:
 	Transition device to low power state using PCI PM Capabilities registers.
@@ -132,7 +132,7 @@
 ---------------
 
 Usage:
-	pci_enable_wake(dev,state,enable);
+	pci_enable_wake(dev, state, enable);
 
 Description:
 	Enable device to generate PME# during low power state using PCI PM 
@@ -155,7 +155,7 @@
 struct pci_driver:
 
         int  (*save_state) (struct pci_dev *dev, u32 state);
-        int  (*suspend)(struct pci_dev *dev, u32 state);
+        int  (*suspend) (struct pci_dev *dev, u32 state);
         int  (*resume) (struct pci_dev *dev);
         int  (*enable_wake) (struct pci_dev *dev, u32 state, int enable);
 
@@ -178,7 +178,7 @@
 
 The driver can also interpret this function as a notification that it may be entering
 a sleep state in the near future. If it knows that the device cannot enter the 
-requested state, either because of lack of support for it, or because the devices is 
+requested state, either because of lack of support for it, or because the device is 
 middle of some critical operation, then it should fail.
 
 This function should not be used to set any state in the device or the driver because
diff -Nru linux/Documentation/preempt-locking.txt linux-2.4.19-pre5-mjc/Documentation/preempt-locking.txt
--- linux/Documentation/preempt-locking.txt	Wed Dec 31 19:00:00 1969
+++ linux-2.4.19-pre5-mjc/Documentation/preempt-locking.txt	Sat Apr  6 08:35:14 2002
@@ -0,0 +1,104 @@
+		  Proper Locking Under a Preemptible Kernel:
+		       Keeping Kernel Code Preempt-Safe
+			  Robert Love <rml@tech9.net>
+			   Last Updated: 22 Jan 2002
+
+
+INTRODUCTION
+
+
+A preemptible kernel creates new locking issues.  The issues are the same as
+those under SMP: concurrency and reentrancy.  Thankfully, the Linux preemptible
+kernel model leverages existing SMP locking mechanisms.  Thus, the kernel
+requires explicit additional locking for very few additional situations.
+
+This document is for all kernel hackers.  Developing code in the kernel
+requires protecting these situations.
+ 
+
+RULE #1: Per-CPU data structures need explicit protection
+
+
+Two similar problems arise. An example code snippet:
+
+	struct this_needs_locking tux[NR_CPUS];
+	tux[smp_processor_id()] = some_value;
+	/* task is preempted here... */
+	something = tux[smp_processor_id()];
+
+First, since the data is per-CPU, it may not have explicit SMP locking, but
+require it otherwise.  Second, when a preempted task is finally rescheduled,
+the previous value of smp_processor_id may not equal the current.  You must
+protect these situations by disabling preemption around them.
+
+
+RULE #2: CPU state must be protected.
+
+
+Under preemption, the state of the CPU must be protected.  This is arch-
+dependent, but includes CPU structures and state not preserved over a context
+switch.  For example, on x86, entering and exiting FPU mode is now a critical
+section that must occur while preemption is disabled.  Think what would happen
+if the kernel is executing a floating-point instruction and is then preempted.
+Remember, the kernel does not save FPU state except for user tasks.  Therefore,
+upon preemption, the FPU registers will be sold to the lowest bidder.  Thus,
+preemption must be disabled around such regions.
+
+Note, some FPU functions are already explicitly preempt safe.  For example,
+kernel_fpu_begin and kernel_fpu_end will disable and enable preemption.
+However, math_state_restore must be called with preemption disabled.
+
+
+RULE #3: Lock acquire and release must be performed by same task
+
+
+A lock acquired in one task must be released by the same task.  This
+means you can't do oddball things like acquire a lock and go off to
+play while another task releases it.  If you want to do something
+like this, acquire and release the task in the same code path and
+have the caller wait on an event by the other task.
+
+
+SOLUTION
+
+
+Data protection under preemption is achieved by disabling preemption for the
+duration of the critical region.
+
+preempt_enable()		decrement the preempt counter
+preempt_disable()		increment the preempt counter
+preempt_enable_no_resched()	decrement, but do not immediately preempt
+preempt_get_count()		return the preempt counter
+
+The functions are nestable.  In other words, you can call preempt_disable
+n-times in a code path, and preemption will not be reenabled until the n-th
+call to preempt_enable.  The preempt statements define to nothing if
+preemption is not enabled.
+
+Note that you do not need to explicitly prevent preemption if you are holding
+any locks or interrupts are disabled, since preemption is implicitly disabled
+in those cases.
+
+Example:
+
+	cpucache_t *cc; /* this is per-CPU */
+	preempt_disable();
+	cc = cc_data(searchp);
+	if (cc && cc->avail) {
+		__free_block(searchp, cc_entry(cc), cc->avail);
+		cc->avail = 0;
+	}
+	preempt_enable();
+	return 0;
+
+Notice how the preemption statements must encompass every reference of the
+critical variables.  Another example:
+
+	int buf[NR_CPUS];
+	set_cpu_val(buf);
+	if (buf[smp_processor_id()] == -1) printf(KERN_INFO "wee!\n");
+	spin_lock(&buf_lock);
+	/* ... */
+
+This code is not preempt-safe, but see how easily we can fix it by simply
+moving the spin_lock up two lines.
diff -Nru linux/Documentation/sonypi.txt linux-2.4.19-pre5-mjc/Documentation/sonypi.txt
--- linux/Documentation/sonypi.txt	Mon Feb 25 14:37:51 2002
+++ linux-2.4.19-pre5-mjc/Documentation/sonypi.txt	Sat Apr  6 08:29:59 2002
@@ -43,7 +43,7 @@
 to /etc/modules.conf file, when the driver is compiled as a module or by
 adding the following to the kernel command line (in your bootloader):
 
-	sonypi=minor[[[[,camera],fnkeyinit],verbose],compat]
+	sonypi=minor[[[[[,camera],fnkeyinit],verbose],compat],nojogdial]
 
 where:
 
@@ -70,6 +70,9 @@
 			events. If the driver worked for you in the past
 			(prior to version 1.5) and does not work anymore,
 			add this option and report to the author.
+
+	nojogdial:	gives more accurate PKEY events on those Vaio models
+			which don't have a jogdial (like the FX series).
 
 Module use:
 -----------
diff -Nru linux/Documentation/sound/OPL3-SA2 linux-2.4.19-pre5-mjc/Documentation/sound/OPL3-SA2
--- linux/Documentation/sound/OPL3-SA2	Wed Jul 18 10:14:01 2001
+++ linux-2.4.19-pre5-mjc/Documentation/sound/OPL3-SA2	Sat Apr  6 08:25:56 2002
@@ -65,7 +65,7 @@
 ------------
 
 In previous kernels (2.2.x), some configuration was required to
-get the driver to talk to the card.  Being the new millenium and
+get the driver to talk to the card.  Being the new millennium and
 all, the 2.4.x kernels now support auto-configuration if ISA PnP
 support is configured in.  Theoretically, the driver even supports
 having more than one card in this case.
diff -Nru linux/Documentation/sound/README.OSS linux-2.4.19-pre5-mjc/Documentation/sound/README.OSS
--- linux/Documentation/sound/README.OSS	Tue Jun 12 13:56:11 2001
+++ linux-2.4.19-pre5-mjc/Documentation/sound/README.OSS	Sat Apr  6 08:25:56 2002
@@ -542,7 +542,7 @@
 
 	SoftOSS keeps the samples loaded on the system's RAM so much RAM is
 	required. SoftOSS should never be used on machines with less than 16 MB
-	of RAM since this is potentially dangerous (you may accidently run out
+	of RAM since this is potentially dangerous (you may accidentally run out
 	of memory which probably crashes the machine). 
 
 	SoftOSS implements the wave table API originally designed for GUS. For
diff -Nru linux/Documentation/sound/rme96xx linux-2.4.19-pre5-mjc/Documentation/sound/rme96xx
--- linux/Documentation/sound/rme96xx	Wed Dec 31 19:00:00 1969
+++ linux-2.4.19-pre5-mjc/Documentation/sound/rme96xx	Sat Apr  6 08:25:56 2002
@@ -0,0 +1,767 @@
+Beta release of the rme96xx (driver for RME 96XX cards like the 
+"Hammerfall" and the "Hammerfall light") 
+
+Important: The driver module has to be installed on a freshly rebooted system, 
+otherwise the driver might not be able to acquire its buffers.
+
+features:
+
+ - OSS programming interface (i.e. runs with standard OSS soundsoftware) 
+ - OSS/Multichannel interface (OSS multichannel is done by just aquiring
+   more than 2 channels). The driver does not use more than one device 
+   ( yet .. this feature may be implemented later ) 
+ - more than one RME card supported
+
+The driver uses a specific multichannel interface, which I will document
+when the driver gets stable. (take a look at the defines in rme96xx.h,
+which adds blocked multichannel formats i.e instead of 
+lrlrlrlr --> llllrrrr  etc.
+
+Use the "rmectrl" programm to look at the status of the card .. 
+or use xrmectrl, a GUI interface for the ctrl program.
+
+What you can do with the rmectrl program is to set the stereo device for
+OSS emulation (e.g. if you use SPDIF out).
+
+You do:
+
+./ctrl offset 24 24
+
+which makes the stereo device use channels 25 and 26.
+
+Guenter Geiger <geiger@epy.co.at> 
+               
+copy the first part of the attached source code into rmectrl.c
+and the  second part into xrmectrl (or get the program from
+http://gige.xdv.org/pages/soft/pages/rme)
+
+to compile: gcc -o rmectrl rmectrl.c
+------------------------------ snip ------------------------------------
+ 
+#include <stdio.h>
+#include <sys/types.h>
+#include <sys/stat.h>
+#include <sys/ioctl.h>
+#include <fcntl.h>
+#include <linux/soundcard.h>
+#include <math.h>
+#include <unistd.h>
+#include <stdlib.h>
+#include "rme96xx.h"
+
+/*
+  remctrl.c
+  (C) 2000 Guenter Geiger <geiger@debian.org>
+  HP20020201 - Heiko Purnhagen <purnhage@tnt.uni-hannover.de>
+*/
+
+/* # define DEVICE_NAME "/dev/mixer" */
+# define DEVICE_NAME "/dev/mixer1"
+
+
+void usage(void)
+{
+     fprintf(stderr,"usage: rmectrl [/dev/mixer<n>] [command [options]]\n\n");
+     fprintf(stderr,"where command is one of:\n");
+     fprintf(stderr,"  help                       show this help\n");
+     fprintf(stderr,"  status                     show status bits\n");
+     fprintf(stderr,"  control                    show control bits\n");
+     fprintf(stderr,"  mix                        show mixer/offset status\n");
+     fprintf(stderr,"  master <n>                 set sync master\n");
+     fprintf(stderr,"  pro <n>                    set spdif out pro\n");
+     fprintf(stderr,"  emphasis <n>               set spdif out emphasis\n");
+     fprintf(stderr,"  dolby <n>                  set spdif out no audio\n");
+     fprintf(stderr,"  optout <n>                 set spdif out optical\n");
+     fprintf(stderr,"  wordclock <n>              set sync wordclock\n");
+     fprintf(stderr,"  spdifin <n>                set spdif in (0=optical,1=coax,2=intern)\n");
+     fprintf(stderr,"  syncref <n>                set sync source (0=ADAT1,1=ADAT2,2=ADAT3,3=SPDIF)\n");
+     fprintf(stderr,"  adat1cd <n>                set ADAT1 on internal CD\n");
+     fprintf(stderr,"  offset <devnr> <in> <out>  set dev (0..3) offset (0..25)\n");
+     exit(-1);
+}
+
+
+int main(int argc, char* argv[])
+{
+     int cards;
+     int ret;
+     int i;
+     double ft;
+     int fd, fdwr;
+     int param,orig;
+     rme_status_t stat;
+     rme_ctrl_t ctrl;
+     char *device;
+     int argidx;
+
+     if (argc < 2)
+	  usage();
+
+     if (*argv[1]=='/') {
+	  device = argv[1];
+	  argidx = 2;
+     }
+     else {
+	  device = DEVICE_NAME;
+	  argidx = 1;
+     }
+
+     fprintf(stdout,"mixer device %s\n",device);
+     if ((fd = open(device,O_RDONLY)) < 0) {
+	  fprintf(stdout,"opening device failed\n");
+	  exit(-1);
+     }
+
+     if ((fdwr = open(device,O_WRONLY)) < 0) {
+	  fprintf(stdout,"opening device failed\n");
+	  exit(-1);
+     }
+
+     if (argc < argidx+1)
+	  usage();
+	  
+     if (!strcmp(argv[argidx],"help")) 
+        usage();
+     if (!strcmp(argv[argidx],"-h")) 
+        usage();
+     if (!strcmp(argv[argidx],"--help")) 
+        usage();
+
+     if (!strcmp(argv[argidx],"status")) {
+	  ioctl(fd,SOUND_MIXER_PRIVATE2,&stat);
+	  fprintf(stdout,"stat.irq %d\n",stat.irq);
+	  fprintf(stdout,"stat.lockmask %d\n",stat.lockmask);
+	  fprintf(stdout,"stat.sr48 %d\n",stat.sr48);
+	  fprintf(stdout,"stat.wclock %d\n",stat.wclock);
+	  fprintf(stdout,"stat.bufpoint %d\n",stat.bufpoint);
+	  fprintf(stdout,"stat.syncmask %d\n",stat.syncmask);
+	  fprintf(stdout,"stat.doublespeed %d\n",stat.doublespeed);
+	  fprintf(stdout,"stat.tc_busy %d\n",stat.tc_busy);
+	  fprintf(stdout,"stat.tc_out %d\n",stat.tc_out);
+	  fprintf(stdout,"stat.crystalrate %d (0=64k 3=96k 4=88.2k 5=48k 6=44.1k 7=32k)\n",stat.crystalrate);
+	  fprintf(stdout,"stat.spdif_error %d\n",stat.spdif_error);
+	  fprintf(stdout,"stat.bufid %d\n",stat.bufid);
+	  fprintf(stdout,"stat.tc_valid %d\n",stat.tc_valid);
+	  exit (0);
+     }
+	 
+     if (!strcmp(argv[argidx],"control")) {
+	  ioctl(fd,SOUND_MIXER_PRIVATE3,&ctrl);
+	  fprintf(stdout,"ctrl.start %d\n",ctrl.start);
+	  fprintf(stdout,"ctrl.latency %d (0=64 .. 7=8192)\n",ctrl.latency);
+	  fprintf(stdout,"ctrl.master %d\n",ctrl.master);
+	  fprintf(stdout,"ctrl.ie %d\n",ctrl.ie);
+	  fprintf(stdout,"ctrl.sr48 %d\n",ctrl.sr48);
+	  fprintf(stdout,"ctrl.spare %d\n",ctrl.spare);
+	  fprintf(stdout,"ctrl.doublespeed %d\n",ctrl.doublespeed);
+	  fprintf(stdout,"ctrl.pro %d\n",ctrl.pro);
+	  fprintf(stdout,"ctrl.emphasis %d\n",ctrl.emphasis);
+	  fprintf(stdout,"ctrl.dolby %d\n",ctrl.dolby);
+	  fprintf(stdout,"ctrl.opt_out %d\n",ctrl.opt_out);
+	  fprintf(stdout,"ctrl.wordclock %d\n",ctrl.wordclock);
+	  fprintf(stdout,"ctrl.spdif_in %d (0=optical,1=coax,2=intern)\n",ctrl.spdif_in);
+	  fprintf(stdout,"ctrl.sync_ref %d (0=ADAT1,1=ADAT2,2=ADAT3,3=SPDIF)\n",ctrl.sync_ref);
+	  fprintf(stdout,"ctrl.spdif_reset %d\n",ctrl.spdif_reset);
+	  fprintf(stdout,"ctrl.spdif_select %d\n",ctrl.spdif_select);
+	  fprintf(stdout,"ctrl.spdif_clock %d\n",ctrl.spdif_clock);
+	  fprintf(stdout,"ctrl.spdif_write %d\n",ctrl.spdif_write);
+	  fprintf(stdout,"ctrl.adat1_cd %d\n",ctrl.adat1_cd);
+	  exit (0);
+     }
+     
+     if (!strcmp(argv[argidx],"mix")) {
+	  rme_mixer mix;
+	  int i;
+	  
+	  for (i=0; i<4; i++) {
+	       mix.devnr = i;
+	       ioctl(fd,SOUND_MIXER_PRIVATE1,&mix);
+	       if (mix.devnr == i) {
+		    fprintf(stdout,"devnr %d\n",mix.devnr);
+		    fprintf(stdout,"mix.i_offset %2d (0-25)\n",mix.i_offset);
+		    fprintf(stdout,"mix.o_offset %2d (0-25)\n",mix.o_offset);
+	       }
+	  }
+	  exit (0);
+     }
+
+/* the control flags */
+
+     if (argc < argidx+2)
+	  usage();
+	  
+     if (!strcmp(argv[argidx],"master")) {
+	  int val = atoi(argv[argidx+1]);
+	  ioctl(fd,SOUND_MIXER_PRIVATE3,&ctrl);
+	  printf("master = %d\n",val);
+	  ctrl.master = val;
+	  ioctl(fdwr,SOUND_MIXER_PRIVATE3,&ctrl);
+	  exit (0);
+     }
+
+     if (!strcmp(argv[argidx],"pro")) {
+	  int val = atoi(argv[argidx+1]);
+	  ioctl(fd,SOUND_MIXER_PRIVATE3,&ctrl);
+	  printf("pro = %d\n",val);
+	  ctrl.pro = val;
+	  ioctl(fdwr,SOUND_MIXER_PRIVATE3,&ctrl);
+	  exit (0);
+     }
+
+     if (!strcmp(argv[argidx],"emphasis")) {
+	  int val = atoi(argv[argidx+1]);
+	  ioctl(fd,SOUND_MIXER_PRIVATE3,&ctrl);
+	  printf("emphasis = %d\n",val);
+	  ctrl.emphasis = val;
+	  ioctl(fdwr,SOUND_MIXER_PRIVATE3,&ctrl);
+	  exit (0);
+     }
+
+     if (!strcmp(argv[argidx],"dolby")) {
+	  int val = atoi(argv[argidx+1]);
+	  ioctl(fd,SOUND_MIXER_PRIVATE3,&ctrl);
+	  printf("dolby = %d\n",val);
+	  ctrl.dolby = val;
+	  ioctl(fdwr,SOUND_MIXER_PRIVATE3,&ctrl);
+	  exit (0);
+     }
+
+     if (!strcmp(argv[argidx],"optout")) {
+	  int val = atoi(argv[argidx+1]);
+	  ioctl(fd,SOUND_MIXER_PRIVATE3,&ctrl);
+	  printf("optout = %d\n",val);
+	  ctrl.opt_out = val;
+	  ioctl(fdwr,SOUND_MIXER_PRIVATE3,&ctrl);
+	  exit (0);
+     }
+
+     if (!strcmp(argv[argidx],"wordclock")) {
+	  int val = atoi(argv[argidx+1]);
+	  ioctl(fd,SOUND_MIXER_PRIVATE3,&ctrl);
+	  printf("wordclock = %d\n",val);
+	  ctrl.wordclock = val;
+	  ioctl(fdwr,SOUND_MIXER_PRIVATE3,&ctrl);
+	  exit (0);
+     }
+
+     if (!strcmp(argv[argidx],"spdifin")) {
+	  int val = atoi(argv[argidx+1]);
+	  ioctl(fd,SOUND_MIXER_PRIVATE3,&ctrl);
+	  printf("spdifin = %d\n",val);
+	  ctrl.spdif_in = val;
+	  ioctl(fdwr,SOUND_MIXER_PRIVATE3,&ctrl);
+	  exit (0);
+     }
+
+     if (!strcmp(argv[argidx],"syncref")) {
+	  int val = atoi(argv[argidx+1]);
+	  ioctl(fd,SOUND_MIXER_PRIVATE3,&ctrl);
+	  printf("syncref = %d\n",val);
+	  ctrl.sync_ref = val;
+	  ioctl(fdwr,SOUND_MIXER_PRIVATE3,&ctrl);
+	  exit (0);
+     }
+ 
+     if (!strcmp(argv[argidx],"adat1cd")) {
+	  int val = atoi(argv[argidx+1]);
+	  ioctl(fd,SOUND_MIXER_PRIVATE3,&ctrl);
+	  printf("adat1cd = %d\n",val);
+	  ctrl.adat1_cd = val;
+	  ioctl(fdwr,SOUND_MIXER_PRIVATE3,&ctrl);
+	  exit (0);
+     }
+ 
+/* setting offset */
+
+     if (argc < argidx+4)
+	  usage();
+	  
+     if (!strcmp(argv[argidx],"offset")) {
+	  rme_mixer mix;
+
+	  mix.devnr = atoi(argv[argidx+1]);
+	  
+	  mix.i_offset = atoi(argv[argidx+2]);
+	  mix.o_offset = atoi(argv[argidx+3]);
+	  ioctl(fdwr,SOUND_MIXER_PRIVATE1,&mix);
+	  fprintf(stdout,"devnr %d\n",mix.devnr);
+	  fprintf(stdout,"mix.i_offset to %d\n",mix.i_offset);
+	  fprintf(stdout,"mix.o_offset to %d\n",mix.o_offset);
+	  exit (0);
+     }	 
+
+     usage();
+     exit (0); /* to avoid warning */
+}
+
+
+---------------------------- <snip> --------------------------------
+#!/usr/bin/wish
+
+# xrmectrl
+# (C) 2000 Guenter Geiger <geiger@debian.org>
+# HP20020201 - Heiko Purnhagen <purnhage@tnt.uni-hannover.de>
+
+#set defaults "-relief ridged"
+set CTRLPROG "./rmectrl"
+if {$argc} {
+    set CTRLPROG "$CTRLPROG $argv"
+}
+puts "CTRLPROG $CTRLPROG"
+
+frame .butts
+button .butts.exit -text "Exit" -command "exit" -relief ridge
+#button .butts.state -text "State" -command "get_all" 
+
+pack .butts.exit -side left 
+pack .butts -side bottom 
+
+
+#
+# STATUS 
+#
+
+frame .status
+
+# Sampling Rate
+
+frame .status.sr
+label .status.sr.text -text "Sampling Rate" -justify left
+radiobutton .status.sr.441 -selectcolor red -text "44.1 kHz" -width 10 -anchor nw -variable srate -value 44100 -font times
+radiobutton .status.sr.480 -selectcolor red -text "48 kHz" -width 10 -anchor nw -variable srate -value 48000 -font times
+radiobutton .status.sr.882 -selectcolor red -text "88.2 kHz" -width 10 -anchor nw -variable srate -value 88200 -font times
+radiobutton .status.sr.960 -selectcolor red -text "96 kHz" -width 10 -anchor nw  -variable srate -value 96000 -font times
+
+pack .status.sr.text .status.sr.441 .status.sr.480 .status.sr.882 .status.sr.960 -side top -padx 3
+
+# Lock
+
+frame .status.lock
+label .status.lock.text -text "Lock" -justify left
+checkbutton .status.lock.adat1 -selectcolor red -text "ADAT1" -anchor nw -width 10 -variable adatlock1 -font times
+checkbutton .status.lock.adat2 -selectcolor red -text "ADAT2" -anchor nw -width 10 -variable adatlock2 -font times
+checkbutton .status.lock.adat3 -selectcolor red -text "ADAT3" -anchor nw -width 10 -variable adatlock3 -font times
+
+pack .status.lock.text .status.lock.adat1 .status.lock.adat2 .status.lock.adat3 -side top -padx 3 
+
+# Sync
+
+frame .status.sync
+label .status.sync.text -text "Sync" -justify left
+checkbutton .status.sync.adat1 -selectcolor red -text "ADAT1" -anchor nw -width 10 -variable adatsync1 -font times
+checkbutton .status.sync.adat2 -selectcolor red -text "ADAT2" -anchor nw -width 10 -variable adatsync2 -font times
+checkbutton .status.sync.adat3 -selectcolor red -text "ADAT3" -anchor nw -width 10 -variable adatsync3 -font times
+
+pack .status.sync.text .status.sync.adat1 .status.sync.adat2 .status.sync.adat3 -side top -padx 3 
+
+# Timecode
+
+frame .status.tc
+label .status.tc.text -text "Timecode" -justify left
+checkbutton .status.tc.busy -selectcolor red -text "busy" -anchor nw -width 10 -variable tcbusy -font times
+checkbutton .status.tc.out -selectcolor red -text "out" -anchor nw -width 10 -variable tcout -font times
+checkbutton .status.tc.valid -selectcolor red -text "valid" -anchor nw -width 10 -variable tcvalid -font times
+
+pack .status.tc.text .status.tc.busy .status.tc.out .status.tc.valid -side top -padx 3 
+
+# SPDIF In
+
+frame .status.spdif
+label .status.spdif.text -text "SPDIF In" -justify left
+label .status.spdif.sr -text "--.- kHz" -anchor n -width 10 -font times
+checkbutton .status.spdif.error -selectcolor red -text "Input Lock" -anchor nw -width 10 -variable spdiferr -font times
+
+pack .status.spdif.text .status.spdif.sr .status.spdif.error -side top -padx 3 
+
+pack .status.sr .status.lock .status.sync .status.tc .status.spdif -side left -fill x -anchor n -expand 1
+
+
+#
+# CONTROL 
+#
+
+proc setprof {} {
+    global CTRLPROG
+    global spprof
+    exec $CTRLPROG pro $spprof
+}
+
+proc setemph {} {
+    global CTRLPROG
+    global spemph
+    exec $CTRLPROG emphasis $spemph
+}
+
+proc setnoaud {} {
+    global CTRLPROG
+    global spnoaud
+    exec $CTRLPROG dolby $spnoaud
+}
+
+proc setoptical {} {
+    global CTRLPROG
+    global spoptical
+    exec $CTRLPROG optout $spoptical
+}
+
+proc setspdifin {} {
+    global CTRLPROG
+    global spdifin
+    exec $CTRLPROG spdifin [expr $spdifin - 1]
+}
+
+proc setsyncsource {} {
+    global CTRLPROG
+    global syncsource
+    exec $CTRLPROG syncref [expr $syncsource -1]
+}
+
+
+proc setmaster {} {
+    global CTRLPROG
+    global master
+    exec $CTRLPROG master $master
+}
+
+proc setwordclock {} {
+    global CTRLPROG
+    global wordclock
+    exec $CTRLPROG wordclock $wordclock
+}
+
+proc setadat1cd {} {
+    global CTRLPROG
+    global adat1cd
+    exec $CTRLPROG adat1cd $adat1cd
+}
+
+
+frame .control
+
+# SPDIF In & SPDIF Out
+
+
+frame .control.spdif
+
+frame .control.spdif.in
+label .control.spdif.in.text -text "SPDIF In" -justify left
+radiobutton .control.spdif.in.input1 -text "Optical" -anchor nw -width 13 -variable spdifin -value 1 -command setspdifin -selectcolor blue -font times
+radiobutton .control.spdif.in.input2 -text "Coaxial" -anchor nw -width 13 -variable spdifin -value 2 -command setspdifin -selectcolor blue -font times
+radiobutton .control.spdif.in.input3 -text "Intern " -anchor nw -width 13 -variable spdifin -command setspdifin -value 3 -selectcolor blue -font times
+
+checkbutton .control.spdif.in.adat1cd -text "ADAT1 Intern" -anchor nw -width 13 -variable adat1cd -command setadat1cd -selectcolor blue -font times
+
+pack .control.spdif.in.text .control.spdif.in.input1 .control.spdif.in.input2 .control.spdif.in.input3 .control.spdif.in.adat1cd
+
+label .control.spdif.space
+
+frame .control.spdif.out
+label .control.spdif.out.text -text "SPDIF Out" -justify left
+checkbutton .control.spdif.out.pro -text "Professional" -anchor nw -width 13 -variable spprof -command setprof -selectcolor blue -font times
+checkbutton .control.spdif.out.emphasis -text "Emphasis" -anchor nw -width 13 -variable spemph -command setemph -selectcolor blue -font times
+checkbutton .control.spdif.out.dolby -text "NoAudio" -anchor nw -width 13 -variable spnoaud -command setnoaud -selectcolor blue -font times
+checkbutton .control.spdif.out.optout -text "Optical Out" -anchor nw -width 13 -variable spoptical -command setoptical -selectcolor blue -font times
+
+pack .control.spdif.out.optout .control.spdif.out.dolby .control.spdif.out.emphasis .control.spdif.out.pro .control.spdif.out.text -side bottom
+
+pack .control.spdif.in .control.spdif.space .control.spdif.out -side top -fill y -padx 3 -expand 1
+
+# Sync Mode & Sync Source
+
+frame .control.sync
+frame .control.sync.mode
+label .control.sync.mode.text -text "Sync Mode" -justify left
+checkbutton .control.sync.mode.master -text "Master" -anchor nw -width 13 -variable master -command setmaster -selectcolor blue -font times
+checkbutton .control.sync.mode.wc -text "Wordclock" -anchor nw -width 13 -variable wordclock -command setwordclock -selectcolor blue -font times
+
+pack .control.sync.mode.text .control.sync.mode.master .control.sync.mode.wc
+
+label .control.sync.space
+
+frame .control.sync.src
+label .control.sync.src.text -text "Sync Source" -justify left
+radiobutton .control.sync.src.input1 -text "ADAT1" -anchor nw -width 13 -variable syncsource -value 1 -command setsyncsource -selectcolor blue -font times
+radiobutton .control.sync.src.input2 -text "ADAT2" -anchor nw -width 13 -variable syncsource -value 2 -command setsyncsource -selectcolor blue -font times
+radiobutton .control.sync.src.input3 -text "ADAT3" -anchor nw -width 13 -variable syncsource -command setsyncsource -value 3 -selectcolor blue -font times
+radiobutton .control.sync.src.input4 -text "SPDIF" -anchor nw -width 13 -variable syncsource -command setsyncsource -value 4 -selectcolor blue -font times
+
+pack .control.sync.src.input4 .control.sync.src.input3 .control.sync.src.input2 .control.sync.src.input1 .control.sync.src.text -side bottom
+
+pack .control.sync.mode .control.sync.space .control.sync.src -side top -fill y -padx 3 -expand 1
+
+label .control.space -text "" -width 10
+
+# Buffer Size
+
+frame .control.buf
+label .control.buf.text -text "Buffer Size (Latency)" -justify left
+radiobutton .control.buf.b1 -selectcolor red -text "64 (1.5 ms)" -width 13 -anchor nw -variable ssrate -value 1 -font times
+radiobutton .control.buf.b2 -selectcolor red -text "128 (3 ms)" -width 13 -anchor nw -variable ssrate -value 2 -font times
+radiobutton .control.buf.b3 -selectcolor red -text "256 (6 ms)" -width 13 -anchor nw -variable ssrate -value 3 -font times
+radiobutton .control.buf.b4 -selectcolor red -text "512 (12 ms)" -width 13 -anchor nw -variable ssrate -value 4 -font times
+radiobutton .control.buf.b5 -selectcolor red -text "1024 (23 ms)" -width 13 -anchor nw -variable ssrate -value 5 -font times
+radiobutton .control.buf.b6 -selectcolor red -text "2048 (46 ms)" -width 13 -anchor nw -variable ssrate -value 6 -font times
+radiobutton .control.buf.b7 -selectcolor red -text "4096 (93 ms)" -width 13 -anchor nw -variable ssrate -value 7 -font times
+radiobutton .control.buf.b8 -selectcolor red -text "8192 (186 ms)" -width 13 -anchor nw -variable ssrate -value 8 -font times
+
+pack .control.buf.text .control.buf.b1 .control.buf.b2 .control.buf.b3 .control.buf.b4 .control.buf.b5 .control.buf.b6 .control.buf.b7 .control.buf.b8 -side top -padx 3 
+
+# Offset
+
+frame .control.offset
+
+frame .control.offset.in
+label .control.offset.in.text -text "Offset In" -justify left
+label .control.offset.in.off0 -text "dev\#0: -" -anchor nw -width 10 -font times
+label .control.offset.in.off1 -text "dev\#1: -" -anchor nw -width 10 -font times
+label .control.offset.in.off2 -text "dev\#2: -" -anchor nw -width 10 -font times
+label .control.offset.in.off3 -text "dev\#3: -" -anchor nw -width 10 -font times
+
+pack .control.offset.in.text .control.offset.in.off0 .control.offset.in.off1 .control.offset.in.off2 .control.offset.in.off3
+
+label .control.offset.space
+
+frame .control.offset.out
+label .control.offset.out.text -text "Offset Out" -justify left
+label .control.offset.out.off0 -text "dev\#0: -" -anchor nw -width 10 -font times
+label .control.offset.out.off1 -text "dev\#1: -" -anchor nw -width 10 -font times
+label .control.offset.out.off2 -text "dev\#2: -" -anchor nw -width 10 -font times
+label .control.offset.out.off3 -text "dev\#3: -" -anchor nw -width 10 -font times
+
+pack .control.offset.out.off3 .control.offset.out.off2 .control.offset.out.off1 .control.offset.out.off0 .control.offset.out.text -side bottom
+
+pack .control.offset.in .control.offset.space .control.offset.out -side top -fill y -padx 3 -expand 1
+
+
+pack .control.spdif .control.sync .control.space .control.buf .control.offset -side left -fill both -anchor n -expand 1
+
+
+label .statustext -text Status -justify center -relief ridge
+label .controltext -text Control -justify center -relief ridge
+
+label .statusspace
+label .controlspace
+
+pack .statustext .status .statusspace .controltext .control .controlspace -side top -anchor nw -fill both -expand 1
+
+
+proc get_bit {output sstr} {
+    set idx1 [string last [concat $sstr 1] $output]
+    set idx1 [expr $idx1 != -1]
+    return $idx1
+}
+
+proc get_val {output sstr} {
+    set val [string wordend $output [string last $sstr $output]] 
+    set val [string range $output $val [expr $val+1]]
+    return $val
+}
+
+proc get_val2 {output sstr} {
+    set val [string wordend $output [string first $sstr $output]] 
+    set val [string range $output $val [expr $val+2]]
+    return $val
+}
+
+proc get_control {} {
+    global spprof
+    global spemph
+    global spnoaud
+    global spoptical
+    global spdifin
+    global ssrate
+    global master
+    global wordclock
+    global syncsource
+    global CTRLPROG
+
+    set f [open "| $CTRLPROG control" r+]
+    set ooo [read $f 1000]
+    close $f
+#    puts $ooo
+
+    set spprof [ get_bit $ooo "pro"]
+    set spemph [ get_bit $ooo "emphasis"]
+    set spnoaud [ get_bit $ooo "dolby"]
+    set spoptical [ get_bit $ooo "opt_out"]
+    set spdifin [ expr [ get_val $ooo "spdif_in"] + 1]
+    set ssrate [ expr [ get_val $ooo "latency"] + 1]
+    set master [ expr [ get_val $ooo "master"]]
+    set wordclock [ expr [ get_val $ooo "wordclock"]]
+    set syncsource [ expr [ get_val $ooo "sync_ref"] + 1]
+}
+
+proc get_status {} {
+    global srate
+    global ctrlcom
+    
+    global adatlock1
+    global adatlock2
+    global adatlock3
+
+    global adatsync1
+    global adatsync2
+    global adatsync3
+
+    global tcbusy
+    global tcout
+    global tcvalid
+
+    global spdiferr
+    global crystal
+    global .status.spdif.text
+    global CTRLPROG
+
+
+    set f [open "| $CTRLPROG status" r+]
+    set ooo [read $f 1000]
+    close $f
+#    puts $ooo
+ 
+# samplerate
+
+    set idx1 [string last "sr48 1" $ooo]
+    set idx2 [string last "doublespeed 1" $ooo]
+    if {$idx1 >= 0} {
+	set fact1 48000
+    } else {
+	set fact1 44100
+    }
+    
+    if {$idx2 >= 0} {
+	set fact2 2 
+    } else {
+	set fact2 1 
+    }
+    set srate [expr $fact1 * $fact2]
+#   ADAT lock 
+
+    set val [get_val $ooo lockmask]
+    set adatlock1 0
+    set adatlock2 0
+    set adatlock3 0
+    if {[expr $val & 1]} {
+       set adatlock3 1
+    } 
+    if {[expr $val & 2]} {
+       set adatlock2 1
+    } 
+    if {[expr $val & 4]} {
+       set adatlock1 1
+    } 
+
+#  ADAT sync
+    set val [get_val $ooo syncmask]
+    set adatsync1 0
+    set adatsync2 0
+    set adatsync3 0
+
+    if {[expr $val & 1]} {
+       set adatsync3 1
+    } 
+    if {[expr $val & 2]} {
+       set adatsync2 1
+    } 
+    if {[expr $val & 4]} {
+       set adatsync1 1
+    } 
+
+# TC busy
+
+    set tcbusy [get_bit $ooo "busy"]
+    set tcout [get_bit $ooo "out"]
+    set tcvalid [get_bit $ooo "valid"]
+    set spdiferr [expr [get_bit $ooo "spdif_error"] == 0]
+
+#  000=64kHz, 100=88.2kHz, 011=96kHz  
+#  111=32kHz, 110=44.1kHz, 101=48kHz
+
+    set val [get_val $ooo crystalrate] 
+
+    set crystal "--.- kHz"
+    if {$val == 0} {
+        set crystal "64 kHz"
+    }
+    if {$val == 4} {
+        set crystal "88.2 kHz"
+    }
+    if {$val == 3} {
+        set crystal "96 kHz"
+    }
+    if {$val == 7} {
+        set crystal "32 kHz"
+    }
+    if {$val == 6} {
+        set crystal "44.1 kHz"
+    }
+    if {$val == 5} {
+        set crystal "48 kHz"
+    }
+    .status.spdif.sr configure -text $crystal
+}
+
+proc get_offset {} {
+    global inoffset
+    global outoffset
+    global CTRLPROG
+
+    set f [open "| $CTRLPROG mix" r+]
+    set ooo [read $f 1000]
+    close $f
+#    puts $ooo
+
+    if { [string match "*devnr*" $ooo] } {
+	set ooo [string range $ooo [string wordend $ooo [string first devnr $ooo]] end]
+	set val [get_val2 $ooo i_offset] 
+	.control.offset.in.off0 configure -text "dev\#0: $val"
+	set val [get_val2 $ooo o_offset] 
+	.control.offset.out.off0 configure -text "dev\#0: $val"
+    } else {
+	.control.offset.in.off0 configure -text "dev\#0: -"
+	.control.offset.out.off0 configure -text "dev\#0: -"
+    }
+    if { [string match "*devnr*" $ooo] } {
+	set ooo [string range $ooo [string wordend $ooo [string first devnr $ooo]] end]
+	set val [get_val2 $ooo i_offset] 
+	.control.offset.in.off1 configure -text "dev\#1: $val"
+	set val [get_val2 $ooo o_offset] 
+	.control.offset.out.off1 configure -text "dev\#1: $val"
+    } else {
+	.control.offset.in.off1 configure -text "dev\#1: -"
+	.control.offset.out.off1 configure -text "dev\#1: -"
+    }
+    if { [string match "*devnr*" $ooo] } {
+	set ooo [string range $ooo [string wordend $ooo [string first devnr $ooo]] end]
+	set val [get_val2 $ooo i_offset] 
+	.control.offset.in.off2 configure -text "dev\#2: $val"
+	set val [get_val2 $ooo o_offset] 
+	.control.offset.out.off2 configure -text "dev\#2: $val"
+    } else {
+	.control.offset.in.off2 configure -text "dev\#2: -"
+	.control.offset.out.off2 configure -text "dev\#2: -"
+    }
+    if { [string match "*devnr*" $ooo] } {
+	set ooo [string range $ooo [string wordend $ooo [string first devnr $ooo]] end]
+	set val [get_val2 $ooo i_offset] 
+	.control.offset.in.off3 configure -text "dev\#3: $val"
+	set val [get_val2 $ooo o_offset] 
+	.control.offset.out.off3 configure -text "dev\#3: $val"
+    } else {
+	.control.offset.in.off3 configure -text "dev\#3: -"
+	.control.offset.out.off3 configure -text "dev\#3: -"
+    }
+}
+
+
+proc get_all {} {
+get_status
+get_control
+get_offset
+}
+
+# main
+while {1} {
+  after 200 
+  get_all
+  update
+}
diff -Nru linux/Documentation/sysctl/vm.txt linux-2.4.19-pre5-mjc/Documentation/sysctl/vm.txt
--- linux/Documentation/sysctl/vm.txt	Mon Sep 10 17:36:25 2001
+++ linux-2.4.19-pre5-mjc/Documentation/sysctl/vm.txt	Sat Apr  6 08:25:56 2002
@@ -21,6 +21,7 @@
 - buffermem
 - freepages
 - kswapd
+- max_map_count
 - overcommit_memory
 - page-cluster
 - pagecache
@@ -167,6 +168,19 @@
 and don't use much of it.
 
 Look at: mm/mmap.c::vm_enough_memory() for more information.
+
+==============================================================
+
+max_map_count:
+
+This file contains the maximum number of memory map areas a
+process may have. Memory map areas are used as a side-effect
+of calling malloc, directly by mmap and mprotect, and also
+when loading shared libraries.
+
+While most applications need less than a thousand maps,
+certain programs, particularly malloc debuggers, may consume 
+lots of them, e.g. up to one or two maps per allocation.
 
 ==============================================================
 
diff -Nru linux/Documentation/usb/auerswald.txt linux-2.4.19-pre5-mjc/Documentation/usb/auerswald.txt
--- linux/Documentation/usb/auerswald.txt	Wed Dec 31 19:00:00 1969
+++ linux-2.4.19-pre5-mjc/Documentation/usb/auerswald.txt	Sat Apr  6 08:25:56 2002
@@ -0,0 +1,30 @@
+		Auerswald USB kernel driver
+		===========================
+
+What is it? What can I do with it?
+==================================
+The auerswald USB kernel driver connects your linux 2.4.x
+system to the auerswald usb-enabled devices.
+
+There are two types of auerswald usb devices:
+a) small PBX systems (ISDN)
+b) COMfort system telephones (ISDN)
+
+The driver installation creates the devices
+/dev/usb/auer0..15. These devices carry a vendor-
+specific protocol. You may run all auerswald java
+software on it. The java software needs a native
+library "libAuerUsbJNINative.so" installed on
+your system. This library is available from
+auerswald and shipped as part of the java software.
+
+You may create the devices with:
+	mknod -m 666 /dev/usb/auer0 c 180 112
+	...
+	mknod -m 666 /dev/usb/auer15 c 180 127
+
+Future plans
+============
+- Connection to ISDN4LINUX (the hisax interface)
+
+The maintainer of this driver is wmues@nexgo.de
diff -Nru linux/Documentation/usb/ehci.txt linux-2.4.19-pre5-mjc/Documentation/usb/ehci.txt
--- linux/Documentation/usb/ehci.txt	Wed Dec 31 19:00:00 1969
+++ linux-2.4.19-pre5-mjc/Documentation/usb/ehci.txt	Sat Apr  6 08:25:56 2002
@@ -0,0 +1,164 @@
+18-Dec-2001
+
+The EHCI driver is used to talk to high speed USB 2.0 devices using
+USB 2.0-capable host controller hardware.  The USB 2.0 standard is
+compatible with the USB 1.1 standard. It defines three transfer speeds:
+
+    - "High Speed" 480 Mbit/sec (60 MByte/sec)
+    - "Full Speed" 12 Mbit/sec (1.5 MByte/sec)
+    - "Low Speed" 1.5 Mbit/sec
+
+USB 1.1 only addressed full speed and low speed.  High speed devices
+can be used on USB 1.1 systems, but they slow down to USB 1.1 speeds. 
+
+USB 1.1 devices may also be used on USB 2.0 systems.  When plugged
+into an EHCI controller, they are given to a USB 1.1 "companion"
+controller, which is a OHCI or UHCI controller as normally used with
+such devices.  When USB 1.1 devices plug into USB 2.0 hubs, they
+interact with the EHCI controller through a "Transaction Translator"
+(TT) in the hub, which turns low or full speed transactions into
+high speed "split transactions" that don't waste transfer bandwidth.
+
+At this writing, high speed devices are finally beginning to appear.
+While usb-storage devices have been available for some time (working
+quite speedily on the 2.4 version of this driver), hubs have only
+very recently become available.
+
+Note that USB 2.0 support involves more than just EHCI.  It requires
+other changes to the Linux-USB core APIs, including the hub driver,
+but those changes haven't needed to really change the basic "usbcore"
+APIs exposed to USB device drivers.
+
+- David Brownell
+  <dbrownell@users.sourceforge.net>
+
+
+FUNCTIONALITY
+
+This driver is regularly tested on x86 hardware, and has also been
+used on PPC hardware so big/little endianneess issues should be gone.
+It's believed to do all the right PCI magic so that I/O works even on
+systems with interesting DMA mapping issues.
+
+At this writing the driver should comfortably handle all control and bulk
+transfers, including requests to USB 1.1 devices through transaction
+translators (TTs) in USB 2.0 hubs.  However, there some situations where
+the hub driver needs to clear TT error state, which it doesn't yet do.
+
+Interrupt transfer support is newly functional and not yet as robust as
+control and bulk traffic.  As yet there is no support for split transaction
+scheduling for interrupt transfers, which means among other things that
+connecting USB 1.1 hubs, keyboards, and mice to USB 2.0 hubs won't work.
+Connect them to USB 1.1 hubs, or to a root hub.
+
+Isochronous (ISO) transfer support is not yet working.  No production
+high speed devices are available which would need it (though high quality
+webcams are in the works!).  Note that split transaction support for ISO
+transfers can't share much code with the code for high speed ISO transfers,
+since EHCI represents these with a different data structure.
+
+The EHCI root hub code should hand off USB 1.1 devices to its companion
+controller.  This driver doesn't need to know anything about those
+drivers; a OHCI or UHCI driver that works already doesn't need to change
+just because the EHCI driver is also present.
+
+There are some issues with power management; suspend/resume doesn't
+behave quite right at the moment.
+
+
+USE BY
+
+Assuming you have an EHCI controller (on a PCI card or motherboard)
+and have compiled this driver as a module, load this like:
+
+    # modprobe ehci-hcd
+
+and remove it by:
+
+    # rmmod ehci-hcd
+
+You should also have a driver for a "companion controller", such as
+"ohci-hcd", "usb-ohci", "usb-uhci", or "uhci".  In case of any trouble
+with the EHCI driver, remove its module and then the driver for that
+companion controller will take over (at lower speed) all the devices
+that were previously handled by the EHCI driver.
+
+Module parameters (pass to "modprobe") include:
+
+    log2_irq_thresh (default 0):
+	Log2 of default interrupt delay, in microframes.  The default
+	value is 0, indicating 1 microframe (125 usec).  Maximum value
+	is 6, indicating 2^6 = 64 microframes.  This controls how often
+	the EHCI controller can issue interrupts.
+
+The EHCI interrupt handler just acknowledges interrupts and schedules
+a tasklet to handle whatever needs handling.  That keeps latencies low,
+no matter how often interrupts are issued.
+
+Device drivers shouldn't care whether they're running over EHCI or not,
+but they may want to check for "usb_device->speed == USB_SPEED_HIGH".
+High speed devices can do things that full speed (or low speed) ones
+can't, such as "high bandwidth" periodic (interrupt or ISO) transfers.
+
+
+PERFORMANCE
+
+USB 2.0 throughput is gated by two main factors:  how fast the host
+controller can process requests, and how fast devices can respond to
+them.  The 480 Mbit/sec "raw transfer rate" is obeyed by all devices,
+but aggregate throughput is also affected by issues like delays between
+individual high speed packets, driver intelligence, and of course the
+overall system load.  Latency is also a performance concern.
+
+Bulk transfers are most often used where throughput is an issue.  It's
+good to keep in mind that bulk transfers are always in 512 byte packets,
+and at most 13 of those fit into one USB 2.0 microframe.  Eight USB 2.0
+microframes fit in a USB 1.1 frame; a microframe is 1 msec/8 = 125 usec.
+
+Hardware Performance
+
+At this writing, individual USB 2.0 devices tend to max out at around
+20 MByte/sec transfer rates.  This is of course subject to change;
+and some devices now go faster, while others go slower.
+
+The NEC implementation of EHCI seems to have a hardware bottleneck
+at around 28 MByte/sec aggregate transfer rate.  While this is clearly
+enough for a single device at 20 MByte/sec, putting three such devices
+onto one bus does not get you 60 MByte/sec.  The issue appears to be
+that the controller hardware won't do concurrent USB and PCI access,
+so that it's only trying six (or maybe seven) USB transactions each
+microframe rather than thirteen.  (Seems like a reasonable trade off
+for a product that beat all the others to market by over a year!)
+It's expected that newer implementations will better this, throwing
+more silicon real estate at the problem so that new motherboard chip
+sets will get closer to that 60 MByte/sec target.
+
+There's a minimum latency of one microframe (125 usec) for the host
+to receive interrupts from the EHCI controller indicating completion
+of requests.  That latency is tunable; there's a module option.  By
+default ehci-hcd driver uses the minimum latency, which means that if
+you issue a control or bulk request you can often expect to learn that
+it completed in less than 250 usec (depending on transfer size).
+
+Software Performance
+
+To get even 20 MByte/sec transfer rates, Linux-USB device drivers will
+need to keep the EHCI queue full.  That means issuing large requests,
+or using bulk queuing if a series of small requests needs to be issued.
+When drivers don't do that, their performance results will show it.
+
+In typical situations, a usb_bulk_msg() loop writing out 4 KB chunks is
+going to waste more than half the USB 2.0 bandwidth.  Delays between the
+I/O completion and the driver issuing the next request will take longer
+than the I/O.  If that same loop used 16 KB chunks, it'd be better; a
+sequence of 128 KB chunks would waste a lot less.
+
+But rather than depending on such large I/O buffers to make synchronous
+I/O be efficient, it's better to just queue all several (bulk) requests
+to the HC, and wait for them all to complete (or be canceled on error).
+Such URB queuing should work with all the USB 1.1 HC drivers too.
+
+TBD:  Interrupt and ISO transfer performance issues.  Those periodic
+transfers are fully scheduled, so the main issue is likely to be how
+to trigger "high bandwidth" modes.
+
diff -Nru linux/Documentation/usb/ibmcam.txt linux-2.4.19-pre5-mjc/Documentation/usb/ibmcam.txt
--- linux/Documentation/usb/ibmcam.txt	Sun Apr  2 18:19:56 2000
+++ linux-2.4.19-pre5-mjc/Documentation/usb/ibmcam.txt	Sat Apr  6 08:25:56 2002
@@ -25,12 +25,19 @@
 
 SUPPORTED CAMERAS:
 
-IBM "C-It" camera, also known as "Xirlink PC Camera"
+Xirlink "C-It" camera, also known as "IBM PC Camera".
 The device uses proprietary ASIC (and compression method);
 it is manufactured by Xirlink. See http://www.xirlink.com/
 http://www.ibmpccamera.com or http://www.c-itnow.com/ for
 details and pictures.
 
+This very chipset ("X Chip", as marked at the factory)
+is used in several other cameras, and they are supported
+as well:
+
+- IBM NetCamera
+- Veo Stingray
+
 The Linux driver was developed with camera with following
 model number (or FCC ID): KSX-XVP510. This camera has three
 interfaces, each with one endpoint (control, iso, iso). This
@@ -50,12 +57,30 @@
 Such type of cameras is referred to as "model 2". They are supported
 (with exception of 352x288 native mode).
 
+Some IBM NetCameras (Model 4) are made to generate only compressed
+video streams. This is great for performance, but unfortunately
+nobody knows how to decompress the stream :-( Therefore, these
+cameras are *unsupported* and if you try to use one of those, all
+you get is random colored horizontal streaks, not the image!
+If you have one of those cameras, you probably should return it
+to the store and get something that is supported.
+
+Tell me more about all that "model" business
+--------------------------------------------
+
+I just invented model numbers to uniquely identify flavors of the
+hardware/firmware that were sold. It was very confusing to use
+brand names or some other internal numbering schemes. So I found
+by experimentation that all Xirlink chipsets fall into four big
+classes, and I called them "models". Each model is programmed in
+its own way, and each model sends back the video in its own way.
+
 Quirks of Model 2 cameras:
 -------------------------
 
 Model 2 does not have hardware contrast control. Corresponding V4L
-control is not used at the moment. It may be possible to implement
-contrast control in software, at cost of extra processor cycles.
+control is implemented in software, which is not very nice to your
+CPU, but at least it works.
 
 This driver provides 352x288 mode by switching the camera into
 quasi-352x288 RGB mode (800 Kbits per frame) essentially limiting
@@ -67,17 +92,24 @@
 the frame rate at slowest setting, but I had to move it pretty much down
 the scale (so that framerate option barely matters). I also noticed that
 camera after first powering up produces frames slightly faster than during
-consecutive uses. All this means that if you use videosize=2 (which is
+consecutive uses. All this means that if you use 352x288 (which is
 default), be warned - you may encounter broken picture on first connect;
 try to adjust brightness - brighter image is slower, so USB will be able
 to send all data. However if you regularly use Model 2 cameras you may
-prefer videosize=1 which makes perfectly good I420, with no scaling and
+prefer 176x144 which makes perfectly good I420, with no scaling and
 lesser demands on USB (300 Kbits per second, or 26 frames per second).
 
+Another strange effect of 352x288 mode is the fine vertical grid visible
+on some colored surfaces. I am sure it is caused by me not understanding
+what the camera is trying to say. Blame trade secrets for that.
+
 The camera that I had also has a hardware quirk: if disconnected,
 it needs few minutes to "relax" before it can be plugged in again
 (poorly designed USB processor reset circuit?)
 
+[Veo Stingray with Product ID 0x800C is also Model 2, but I haven't
+observed this particular flaw in it.]
+
 Model 2 camera can be programmed for very high sensitivity (even starlight
 may be enough), this makes it convenient for tinkering with. The driver
 code has enough comments to help a programmer to tweak the camera
@@ -98,12 +130,14 @@
 precompile all modules, so you can go directly to the next
 section "HOW TO USE THE DRIVER".
 
-The driver consists of two files in usb/ directory:
-ibmcam.c and ibmcam.h These files are included into the
-Linux kernel build process if you configure the kernel
-for CONFIG_USB_IBMCAM. Run "make xconfig" and in USB section
-you will find the IBM camera driver. Select it, save the
-configuration and recompile.
+The ibmcam driver uses usbvideo helper library (module),
+so if you are studying the ibmcam code you will be led there.
+
+The driver itself consists of only one file in usb/ directory:
+ibmcam.c. This file is included into the Linux kernel build
+process if you configure the kernel for CONFIG_USB_IBMCAM.
+Run "make xconfig" and in USB section you will find the IBM
+camera driver. Select it, save the configuration and recompile.
 
 HOW TO USE THE DRIVER:
 
@@ -112,6 +146,13 @@
 settings than V4L can operate, so some settings are done using
 module options.
 
+To begin with, on most modern Linux distributions the driver
+will be automatically loaded whenever you plug the supported
+camera in. Therefore, you don't need to do anything. However
+if you want to experiment with some module parameters then
+you can load and unload the driver manually, with camera
+plugged in or unplugged.
+
 Typically module is installed with command 'modprobe', like this:
 
 # modprobe ibmcam framerate=1
@@ -138,7 +179,7 @@
 init_hue        Integer         0-255 [128]     init_hue=115
 lighting        Integer         0-2* [1]        lighting=2
 sharpness       Integer         0-6* [4]        sharpness=3
-videosize       Integer         0-2* [2]        videosize=1
+size            Integer         0-2* [2]        size=1
 
 Options for Model 2 only:
 
@@ -181,6 +222,11 @@
                                            this is a little faster but may
                                            produce flicker if frame rate is
                                            too high and Isoc data gets lost.
+                FLAGS_NO_DECODING      128 This flag turns the video stream
+                                           decoder off, and dumps the raw
+                                           Isoc data from the camera into
+                                           the reading process. Useful to
+                                           developers, but not to users.
 
 framerate       This setting controls frame rate of the camera. This is
                 an approximate setting (in terms of "worst" ... "best")
@@ -227,35 +273,38 @@
                 be greeted with "snowy" image. Default is 4. Model 2
                 cameras do not support this feature.
 
-videosize       This setting chooses one if three image sizes that are
-                supported by this driver. Camera supports more, but
+size            This setting chooses one of several image sizes that are
+                supported by this driver. Cameras may support more, but
                 it's difficult to reverse-engineer all formats.
                 Following video sizes are supported:
 
-                videosize=0     128x96  (Model 1 only)
-                videosize=1     176x144
-                videosize=2     352x288
-                videosize=3     320x240 (Model 2 only)
-                videosize=4     352x240 (Model 2 only)
+                size=0     128x96  (Model 1 only)
+                size=1     160x120
+                size=2     176x144
+                size=3     320x240 (Model 2 only)
+                size=4     352x240 (Model 2 only)
+                size=5     352x288
+                size=6     640x480 (Model 3 only)
 
-                The last one (352x288) is the native size of the sensor
-                array, so it's the best resolution camera (Model 1) can
+                The 352x288 is the native size of the Model 1 sensor
+                array, so it's the best resolution the camera can
                 yield. The best resolution of Model 2 is 176x144, and
                 larger images are produced by stretching the bitmap.
+                Model 3 has sensor with 640x480 grid, and it works too,
+                but the frame rate will be exceptionally low (1-2 FPS);
+                it may be still OK for some applications, like security.
                 Choose the image size you need. The smaller image can
                 support faster frame rate. Default is 352x288.
 
+For more information and the Troubleshooting FAQ visit this URL:
+
+                http://www.linux-usb.org/ibmcam/
+
 WHAT NEEDS TO BE DONE:
 
-- The box freezes if camera is unplugged after being used (OHCI).
-  Workaround: remove usb-ohci module first.
-- On occasion camera (model 1) does not start properly (xawtv reports
-  errors), or camera produces negative image (funny colors.)
-  Workaround: reload the driver module. Reason: [1].
 - The button on the camera is not used. I don't know how to get to it.
   I know now how to read button on Model 2, but what to do with it?
 
-[1]
 - Camera reports its status back to the driver; however I don't know
   what returned data means. If camera fails at some initialization
   stage then something should be done, and I don't do that because
@@ -263,26 +312,13 @@
   concern because Model 2 uses different commands which do not return
   status (and seem to complete successfully every time).
 
-VIDEO SIZE AND IMAGE SIZE
-
-Camera produces picture X by Y pixels. This is camera-specific and can be
-altered by programming the camera accordingly. This image is placed onto
-larger (or equal) area W by H, this is V4L image. At this time the driver
-uses V4L image size (W by H) 352x288 pixels because many programs (such
-as xawtv) expect quite specific sizes and don't want to deal with arbitrary,
-camera-specific sizes. However this approach "hides" real image size, and
-application always sees the camera as producing only 352x288 image. It is
-possible to change the V4L image size to 128x96, and then if camera is
-switched to 128x96 mode then xawtv will correctly accept this image size. But
-many other popular sizes (such as 176x144) will not be welcomed. This is the
-reason why all camera images are at this time placed onto 352x288 "canvas",
-and size of that canvas (V4L) is reported to applications. It will be easy
-to add options to control the canvas size, but it will be application-
-specific because not all applications are ready to work with variety of
-camera-specific sizes.
+- Some flavors of Model 4 NetCameras produce only compressed video
+  streams, and I don't know how to decode them.
 
 CREDITS:
 
 The code is based in no small part on the CPiA driver by Johannes Erdfelt,
 Randy Dunlap, and others. Big thanks to them for their pioneering work on that
 and the USB stack.
+
+I also thank John Lightsey for his donation of the Veo Stingray camera.
diff -Nru linux/Documentation/usb/proc_usb_info.txt linux-2.4.19-pre5-mjc/Documentation/usb/proc_usb_info.txt
--- linux/Documentation/usb/proc_usb_info.txt	Tue Aug 22 12:06:31 2000
+++ linux-2.4.19-pre5-mjc/Documentation/usb/proc_usb_info.txt	Sat Apr  6 08:25:56 2002
@@ -1,32 +1,99 @@
 /proc/bus/usb filesystem output
 ===============================
-(version 2000.08.15)
+(version 2002.03.18)
 
 
-The /proc filesystem for USB devices generates
-/proc/bus/usb/drivers and /proc/bus/usb/devices.
+The /proc filesystem for USB devices provides /proc/bus/usb/drivers
+and /proc/bus/usb/devices, as well as /proc/bus/usb/BBB/DDD files.
 
-/proc/bus/usb/drivers lists the registered drivers,
-one per line, with each driver's USB minor dev node
-number range if applicable.
 
-**NOTE**: If /proc/bus/usb appears empty, you need
-          to mount the filesystem, issue the command (as root):
+**NOTE**: If /proc/bus/usb appears empty, and a host controller
+	  driver has been linked, then you need to mount the
+	  filesystem.  Issue the command (as root):
 
-      mount -t usbdevfs none /proc/bus/usb
+      mount -t usbfs none /proc/bus/usb
 
 	  An alternative and more permanent method would be to add
 
-      none  /proc/bus/usb  usbdevfs  defaults  0  0
+      none  /proc/bus/usb  usbfs  defaults  0  0
 
-	  to /etc/fstab.  This will mount usbdevfs at each reboot.
+	  to /etc/fstab.  This will mount usbfs at each reboot.
 	  You can then issue `cat /proc/bus/usb/devices` to extract
-	  USB device information.
+	  USB device information, and user mode drivers can use usbfs 
+	  to interact with USB devices.
 
-For more information on mounting the usbdevfs file system, see the
+	  There are a number of mount options supported by usbfs.
+	  Consult the source code (linux/drivers/usb/inode.c) for
+	  information about those options.
+
+**NOTE**: The filesystem has been renamed from "usbdevfs" to
+	  "usbfs", to reduce confusion with "devfs".  You may
+	  still see references to the older "usbdevfs" name.
+
+For more information on mounting the usbfs file system, see the
 "USB Device Filesystem" section of the USB Guide. The latest copy 
 of the USB Guide can be found at http://www.linux-usb.org/
 
+
+THE /proc/bus/usb/BBB/DDD FILES:
+--------------------------------
+Each connected USB device has one file.  The BBB indicates the bus
+number.  The DDD indicates the device address on that bus.  Both
+of these numbers are assigned sequentially, and can be reused, so
+you can't rely on them for stable access to devices.  For example,
+it's relatively common for devices to re-enumerate while they are
+still connected (perhaps someone jostled their power supply, hub,
+or USB cable), so a device might be 002/027 when you first connect
+it and 002/048 sometime later.
+
+These files can be read as binary data.  The binary data consists
+of first the device descriptor, then the descriptors for each
+configuration of the device.  That information is also shown in
+text form by the /proc/bus/usb/devices file, described later.
+
+These files may also be used to write user-level drivers for the USB
+devices.  You would open the /proc/bus/usb/BBB/DDD file read/write,
+read its descriptors to make sure it's the device you expect, and then
+bind to an interface (or perhaps several) using an ioctl call.  You
+would issue more ioctls to the device to communicate to it using
+control, bulk, or other kinds of USB transfers.  The IOCTLs are
+listed in the <linux/usbdevice_fs.h> file, and at this writing the
+source code (linux/drivers/usb/devio.c) is the primary reference
+for how to access devices through those files.
+
+Note that since by default these BBB/DDD files are writable only by
+root, only root can write such user mode drivers.  You can selectively
+grant read/write permissions to other users by using "chmod".  Also,
+usbfs mount options such as "devmode=0666" may be helpful.
+
+
+
+THE /proc/bus/usb/drivers FILE:
+-------------------------------
+Each of the USB device drivers linked into your kernel (statically,
+or dynamically using "modprobe") is listed in the "drivers" file.
+Here's an example from one system:
+
+         usbdevfs
+         hub
+  0- 15: usblp
+         usbnet
+         serial
+         usb-storage
+         pegasus
+
+If you see this file, "usbdevfs" and "hub" will always be listed,
+since those are part of the "usbcore" framework.
+
+Drivers that use the USB major number (180) to provide character devices
+will include a range of minor numbers, as shown above for the "usblp"
+(actually "printer.o") module.  USB device drivers can of course use any
+major number, but it's easy to use the USB range since there's explicit
+support for subdividing it in the USB device driver framework.
+
+
+THE /proc/bus/usb/devices FILE:
+-------------------------------
 In /proc/bus/usb/devices, each device's output has multiple
 lines of ASCII output.
 I made it ASCII instead of binary on purpose, so that someone
@@ -34,8 +101,6 @@
 auxiliary program.  However, with an auxiliary program, the numbers
 in the first 4 columns of each "T:" line (topology info:
 Lev, Prnt, Port, Cnt) can be used to build a USB topology diagram.
-(I think.  I haven't proved this, but I have tested it with 3
-different topo/connections and it looked possible.)
 
 Each line is tagged with a one-character ID for that line:
 
@@ -73,14 +138,30 @@
 |   |__Bus number
 |__Topology info tag
 
+    Speed may be:
+    	1.5	Mbit/s for low speed USB
+	12	Mbit/s for full speed USB
+	480	Mbit/s for high speed USB (added for USB 2.0)
+
 
 Bandwidth info:
 B:  Alloc=ddd/ddd us (xx%), #Int=ddd, #Iso=ddd
-|   |                       |         |__Number if isochronous requests
+|   |                       |         |__Number of isochronous requests
 |   |                       |__Number of interrupt requests
 |   |__Total Bandwidth allocated to this bus
 |__Bandwidth info tag
 
+    Bandwidth allocation is an approximation of how much of one frame
+    (millisecond) is in use.  It reflects only periodic transfers, which
+    are the only transfers that reserve bandwidth.  Control and bulk
+    transfers use all other bandwidth, including reserved bandwidth that
+    is not used for transfers (such as for short packets).
+    
+    The percentage is how much of the "reserved" bandwidth is scheduled by
+    those transfers.  For a low or full speed bus (loosely, "USB 1.1"),
+    90% of the bus bandwidth is reserved.  For a high speed bus (loosely,
+    "USB 2.0") 80% is reserved.
+
 
 Device descriptor info & Product ID info:
 
@@ -109,37 +190,55 @@
 
 S:  Manufacturer=ssss
 |   |__Manufacturer of this device as read from the device.
+|      For USB host controller drivers (virtual root hubs) this may
+|      be omitted, or (for newer drivers) will identify the kernel
+|      version and the driver which provides this hub emulation.
 |__String info tag
 
 S:  Product=ssss
-|   |__Product description of this device as read from the device,
-|      except that it is a generated string for USB host controllers
-|      (virtual root hubs), in the form "USB *HCI Root Hub".
+|   |__Product description of this device as read from the device.
+|      For older USB host controller drivers (virtual root hubs) this
+|      indicates the driver; for newer ones, it's a product (and vendor)
+|      description that often comes from the kernel's PCI ID database.
 |__String info tag
 
 S:  SerialNumber=ssss
-|   |__Serial Number of this device as read from the device,
-|      except that it is a generated string for USB host controllers
-|      (virtual root hubs), and represents the host controller's
-|      unique identification in the system (currently I/O or
-|      memory-mapped base address).
+|   |__Serial Number of this device as read from the device.
+|      For USB host controller drivers (virtual root hubs) this is
+|      some unique ID, normally a bus ID (address or slot name) that
+|      can't be shared with any other device.
 |__String info tag
 
 
+
 Configuration descriptor info:
 
-C:  #Ifs=dd Cfg#=dd Atr=xx MPwr=dddmA
-|   |       |       |      |__MaxPower in mA
-|   |       |       |__Attributes
-|   |       |__ConfiguratioNumber
-|   |__NumberOfInterfaces
+C:* #Ifs=dd Cfg#=dd Atr=xx MPwr=dddmA
+| | |       |       |      |__MaxPower in mA
+| | |       |       |__Attributes
+| | |       |__ConfiguratioNumber
+| | |__NumberOfInterfaces
+| |__ "*" indicates the active configuration (others are " ")
 |__Config info tag
+    
+    USB devices may have multiple configurations, each of which act
+    rather differently.  For example, a bus-powered configuration
+    might be much less capable than one that is self-powered.  Only
+    one device configuration can be active at a time; most devices
+    have only one configuration.
+
+    Each configuration consists of one or more interfaces.  Each
+    interface serves a distinct "function", which is typically bound
+    to a different USB device driver.  One common example is a USB
+    speaker with an audio interface for playback, and a HID interface
+    for use with software volume control.
 
 
 Interface descriptor info (can be multiple per Config):
 
 I:  If#=dd Alt=dd #EPs=dd Cls=xx(sssss) Sub=xx Prot=xx Driver=ssss
 |   |      |      |       |             |      |       |__Driver name
+|   |      |      |       |             |      |          or "(none)"
 |   |      |      |       |             |      |__InterfaceProtocol
 |   |      |      |       |             |__InterfaceSubClass
 |   |      |      |       |__InterfaceClass
@@ -148,16 +247,38 @@
 |   |__InterfaceNumber
 |__Interface info tag
 
+    A given interface may have one or more "alternate" settings.
+    For example, default settings may not use more than a small
+    amount of periodic bandwidth.  To use significant fractions
+    of bus bandwidth, drivers must select a non-default altsetting.
+    
+    Only one setting for an interface may be active at a time, and
+    only one driver may bind to an interface at a time.  Most devices
+    have only one alternate setting per interface.
+
 
 Endpoint descriptor info (can be multiple per Interface):
 
 E:  Ad=xx(s) Atr=xx(ssss) MxPS=dddd Ivl=dddms
-E:  Ad=xx(s) Atr=xx(ssss) MxPS=dddd Ivl=dddms
-|   |        |            |         |__Interval
+|   |        |            |         |__Interval (max) between transfers
 |   |        |            |__EndpointMaxPacketSize
 |   |        |__Attributes(EndpointType)
 |   |__EndpointAddress(I=In,O=Out)
 |__Endpoint info tag
+
+    The interval is nonzero for all periodic (interrupt or isochronous)
+    endpoints.  For high speed endpoints the transfer interval may be
+    measured in microseconds rather than milliseconds.
+
+    For high speed periodic endpoints, the "MaxPacketSize" reflects
+    the per-microframe data transfer size.  For "high bandwidth"
+    endpoints, that can reflect two or three packets (for up to
+    3KBytes every 125 usec) per endpoint.
+
+    With the Linux-USB stack, periodic bandwidth reservations use the
+    transfer intervals and sizes provided by URBs, which can be less
+    than those found in endpoint descriptor.
+
 
 =======================================================================
 
diff -Nru linux/Documentation/usb/usb-serial.txt linux-2.4.19-pre5-mjc/Documentation/usb/usb-serial.txt
--- linux/Documentation/usb/usb-serial.txt	Mon Feb 25 14:37:52 2002
+++ linux-2.4.19-pre5-mjc/Documentation/usb/usb-serial.txt	Sat Apr  6 08:25:56 2002
@@ -95,12 +95,13 @@
   Kroah-Hartman at greg@kroah.com
 
 
-Compaq iPAQ driver
+Compaq iPAQ and HP Jornada driver
 
-  This driver can be used to connect to Compaq iPAQ PDAs running
-  Windows CE 3.0 using a USB autosync cable. It has been tested only on
-  the Compaq H3135. It should work with the H3600 and later models too.
-  It may work with other CE based handhelds as well.
+  This driver can be used to connect to Compaq iPAQ and HP Jornada PDAs
+  running Windows CE 3.0 or PocketPC 2002 using a USB cable/cradle. It
+  has been tested only on the Compaq H3135, but is rumoured to work on
+  with the H3600 and later models as well as the Jornada 548 and 568.
+  With minor modifications, it may work for other CE based handhelds too.
 
   The driver presents a serial interface (usually on /dev/ttyUSB0) over
   which one may run ppp and establish a TCP/IP link to the iPAQ. Once this
@@ -109,11 +110,14 @@
   kbytes/sec for download/upload to the iPAQ.
 
   The driver works intermittently with the usb-uhci driver but quite
-  reliably with the uhci driver. Make sure you have the right driver
-  loaded - usb-uhci is often the default.
+  reliably with the uhci driver. However, performance is much better
+  with usb-uhci. It does not seem to work with ohci at all.
 
   You must setup hotplug to invoke pppd as soon as the iPAQ is connected.
-  A ppp script like the one below may be used:
+  A ppp script like the one below should be kept in the file
+  /etc/hotplug/usb/ipaq Remember to chmod +x. Make sure there are no
+  options in /etc/ppp/options or ~/.ppprc which conflict with the ones
+  given below.
 
 	#!/bin/bash
 
@@ -133,7 +137,7 @@
   On connecting the cable, you should see the usual "Device Connected",
   "User Authenticated" messages flash by on your iPAQ. Once connected,
   you can use Win CE programs like ftpView, Pocket Outlook from the iPAQ
-  and other synce utilities from the Linux side. Remember to enable IP
+  and xcerdisp, synce utilities from the Linux side. Remember to enable IP
   forwarding. 
 
   To use Pocket IE, follow the instructions given at
diff -Nru linux/Documentation/video4linux/API.html linux-2.4.19-pre5-mjc/Documentation/video4linux/API.html
--- linux/Documentation/video4linux/API.html	Thu Jan  6 17:46:18 2000
+++ linux-2.4.19-pre5-mjc/Documentation/video4linux/API.html	Sat Apr  6 08:29:59 2002
@@ -105,7 +105,7 @@
 <TR><TD><b>height</b><TD>The height of the image capture.</TD>
 <TR><TD><b>chromakey</b><TD>A host order RGB32 value for the chroma key.</TD>
 <TR><TD><b>flags</b><TD>Additional capture flags.</TD>
-<TR><TD><b>clips</b><TD>A list of clipping rectangles. <em>(Set only)</em)</TD>
+<TR><TD><b>clips</b><TD>A list of clipping rectangles. <em>(Set only)</em></TD>
 <TR><TD><b>clipcount</b><TD>The number of clipping rectangles. <em>(Set only)</em></TD>
 </TABLE>
 <P>
@@ -120,6 +120,7 @@
 </TABLE>
 <P>
 Merely setting the window does not enable capturing. Overlay capturing
+(i.e. PCI-PCI transfer to the frame buffer of the video card)
 is activated by passing the <b>VIDIOCCAPTURE</b> ioctl a value of 1, and
 disabled by passing it a value of 0. 
 <P>
@@ -310,9 +311,10 @@
 </TABLE>
 <P>
 <H3>Reading Images</H3>
-Each call to the <b>read</b> syscall returns the next available image from
-the device. It is up to the caller to set the format and then to pass a 
-suitable size buffer and length to the function. Not all devices will support
+Each call to the <b>read</b> syscall returns the next available image
+from the device. It is up to the caller to set format and size (using
+the VIDIOCSPICT and VIDIOCSWIN ioctls) and then to pass a suitable
+size buffer and length to the function. Not all devices will support
 read operations.
 <P>
 A second way to handle image capture is via the mmap interface if supported.
@@ -329,16 +331,39 @@
 <TR><TD><b>offsets</b><TD>The offset of each frame</TD>
 </TABLE>
 <P>
-Once the mmap has been made the VIDIOCMCAPTURE ioctl sets the image size
-you wish to use (which should match or be below the initial query size).
-Having done so it will begin capturing to the memory mapped buffer. Whenever
-a buffer is "used" by the program it should called VIDIOCSYNC to free this
-frame up and continue. <em>to add:</em>VIDIOCSYNC takes the frame number
-you are freeing as its argument. When the buffer is unmapped or all the
-buffers are full capture ceases. While capturing to memory the driver will
-make a "best effort" attempt to capture to screen as well if requested. This
-normally means all frames that "miss" memory mapped capture will go to the
-display.
+Once the mmap has been made the VIDIOCMCAPTURE ioctl starts the
+capture to a frame using the format and image size specified in the
+video_mmap (which should match or be below the initial query size).
+When the VIDIOCMCAPTURE ioctl returns the frame is <em>not</em>
+captured yet, the driver just instructed the hardware to start the
+capture.  The application has to use the VIDIOCSYNC ioctl to wait
+until the capture of a frame is finished.  VIDIOCSYNC takes the frame
+number you want to wait for as argument.
+<p>
+It is allowed to call VIDIOCMCAPTURE multiple times (with different
+frame numbers in video_mmap->frame of course) and thus have multiple
+outstanding capture requests.  A simple way do to double-buffering
+using this feature looks like this:
+<pre>
+/* setup everything */
+VIDIOCMCAPTURE(0)
+while (whatever) {
+   VIDIOCMCAPTURE(1)
+   VIDIOCSYNC(0)
+   /* process frame 0 while the hardware captures frame 1 */
+   VIDIOCMCAPTURE(0)
+   VIDIOCSYNC(1)
+   /* process frame 1 while the hardware captures frame 0 */
+}
+</pre>
+Note that you are <em>not</em> limited to only two frames.  The API
+allows up to 32 frames, the VIDIOCGMBUF ioctl returns the number of
+frames the driver granted.  Thus it is possible to build deeper queues
+to avoid loosing frames on load peaks.
+<p>
+While capturing to memory the driver will make a "best effort" attempt
+to capture to screen as well if requested. This normally means all
+frames that "miss" memory mapped capture will go to the display.
 <P>
 A final ioctl exists to allow a device to obtain related devices if a
 driver has multiple components (for example video0 may not be associated
diff -Nru linux/Documentation/video4linux/bttv/CARDLIST linux-2.4.19-pre5-mjc/Documentation/video4linux/bttv/CARDLIST
--- linux/Documentation/video4linux/bttv/CARDLIST	Wed Oct 17 17:19:20 2001
+++ linux-2.4.19-pre5-mjc/Documentation/video4linux/bttv/CARDLIST	Sat Apr  6 08:25:57 2002
@@ -7,13 +7,13 @@
   card=5 - Diamond DTV2000
   card=6 - AVerMedia TVPhone
   card=7 - MATRIX-Vision MV-Delta
-  card=8 - Fly Video II (Bt848)
-  card=9 - TurboTV
+  card=8 - FlyVideo II (Bt848) LR26
+  card=9 - IXMicro TurboTV
   card=10 - Hauppauge (bt878)
   card=11 - MIRO PCTV pro
   card=12 - ADS Technologies Channel Surfer TV
   card=13 - AVerMedia TVCapture 98
-  card=14 - Aimslab VHX
+  card=14 - Aimslab Video Highway Xtreme (VHX)
   card=15 - Zoltrix TV-Max
   card=16 - Pixelview PlayTV (bt878)
   card=17 - Leadtek WinView 601
@@ -21,7 +21,7 @@
   card=19 - LifeView FlyKit w/o Tuner
   card=20 - CEI Raffles Card
   card=21 - Lucky Star Image World ConferenceTV
-  card=22 - Phoebe Tv Master + FM
+  card=22 - Phoebe Tv Master + FM (CPH050)
   card=23 - Modular Technology MM205 PCTV, bt878
   card=24 - [many vendors] CPH05X/06X (bt878)
   card=25 - Terratec/Vobis TV-Boostar
@@ -54,12 +54,12 @@
   card=52 - Pinnacle PCTV Studio Pro
   card=53 - Typhoon TView RDS + FM Stereo / KNC1 TV Station RDS
   card=54 - Lifetec LT 9415 TV (LR90 Rev.F)
-  card=55 - BESTBUY Easy TV
+  card=55 - BESTBUY Easy TV (CPH031)
   card=56 - FlyVideo '98/FM
-  card=57 - GrandTec 'Grand Video Capture'
-  card=58 - Phoebe TV Master Only (No FM)
-  card=59 - TV Capturer
-  card=60 - MM100PCTV
+  card=57 - GrandTec 'Grand Video Capture' (Bt848)
+  card=58 - Phoebe TV Master Only (No FM) CPH060
+  card=59 - TV Capturer (CPH03X)
+  card=60 - Modular Technology MM100PCTV
   card=61 - AG Electronics GMV1
   card=62 - BESTBUY Easy TV (bt878)
   card=63 - ATI TV-Wonder
@@ -72,6 +72,12 @@
   card=70 - PV-BT878P+
   card=71 - Flyvideo 98EZ (capture only)
   card=72 - Prolink PV-BT878P+9B (PlayTV Pro rev.9B FM+NICAM)
+  card=73 - Sensoray 311
+  card=74 - RemoteVision MX (RV605)
+  card=75 - Powercolor MTV878/ MTV878R/ MTV878F
+  card=76 - Canopus WinDVR PCI (COMPAQ Presario 3524JP, 5112JP)
+  card=77 - GrandTec Multi Capture Card (Bt878)
+  card=78 - AOPEN VA1000
 
 tuner.o
   type=0 - Temic PAL (4002 FH5)
@@ -94,7 +100,7 @@
   type=17 - Philips NTSC_M (MK2)
   type=18 - Temic PAL_I (4066 FY5)
   type=19 - Temic PAL* auto (4006 FN5)
-  type=20 - Temic PAL (4009 FR5)
+  type=20 - Temic PAL_BG (4009 FR5) or PAL_I (4069 FR5)
   type=21 - Temic NTSC (4039 FR5)
   type=22 - Temic PAL/SECAM multi (4046 FM5)
   type=23 - Philips PAL_DK
diff -Nru linux/Documentation/video4linux/bttv/Cards linux-2.4.19-pre5-mjc/Documentation/video4linux/bttv/Cards
--- linux/Documentation/video4linux/bttv/Cards	Wed Oct 17 17:19:20 2001
+++ linux-2.4.19-pre5-mjc/Documentation/video4linux/bttv/Cards	Sat Apr  6 08:25:57 2002
@@ -15,6 +15,10 @@
 All other cards only differ by additional components as tuners, sound decoders,
 EEPROMs, teletext decoders ...
 
+Unsupported Cards: 
+------------------
+Cards with Zoran (ZR) or Philips (SAA) or ISA are not supported by this driver. 
+
 
 MATRIX Vision
 -------------
@@ -137,20 +141,37 @@
       1851:1850 = Flyvideo 98
       1851:1851 = Flyvideo 98 EZ (capture only)
   2) There is a print on the PCB:
-      LR25       = Flyvideo (Zoran)
-      LR37 Rev.C = Capture only (ZR36120 + SAA7110)
+      LR25       = Flyvideo (Zoran ZR36120, SAA7110A)
+      LR26 Rev.N = Flyvideo II (Bt848)
+           Rev.O = Flyvideo II (Bt878)
+      LR37 Rev.C = Flyvideo EZ (Capture only, ZR36120 + SAA7110)
+      LR38 Rev.A1= Flyvideo II EZ (Bt848 capture only)
       LR50 Rev.Q = Flyvideo 98 (w/eeprom and PCI subsystem ID)
-      LR50 Rev.W = Flyvideo 98 (no eeprom)
+           Rev.W = Flyvideo 98 (no eeprom)
       LR51 Rev.E = Flyvideo 98 EZ (capture only)
       LR90       = Flyvideo 2000 series
-      LR90 Rev.F = Lifetec/Medion LT 9815
+      LR91       = Stereo daughter card for LR90
       LR97       = Flyvideo DVBS
+      LR138 Rev.C= Flyvideo 2000 (SAA7130)
+	        or Flyvideo 3000 (SAA7134) w/Stereo TV
+		   These exist in variations w/FM and w/Remote sometimes denoted
+		   by suffixes "FM" and "R".
+
+      Lifeview.com.tw states (Feb. 2002):
+      "The FlyVideo2000 and FlyVideo2000s product name have renamed to FlyVideo98."
+      Their Bt8x8 cards are listed as discontinued.
+      Flyvideo 2000S was probably sold as Flyvideo 3000 in some contries(Europe?).
+      The new Flyvideo 2000/3000 are SAA7130/SAA7134 based. 
+      Flyvideo 2100/3100 are half-sized cards (for system integrators etc.)
 
   "Flyvideo II" had been the name for the 848 cards, nowadays (in Germany)
   this name is re-used for LR50 Rev.W.
-  The Lifeview website has even more names: Flyvideo III,2100,3000,3100.
+  The Lifeview website mentioned Flyvideo III at some time, but such a card
+  has never been seen. 
   These cards are sold by many OEMs too.
 
+  FlyVideo A2 = LR90 Rev.F (w/Remote, w/o FM, stereo TV by tda9821)
+
 
 Typhoon TV card series:
 -----------------------
@@ -176,6 +197,7 @@
 
 Guillemot
 ---------
+  Maxi-TV PCI (ZR36120)
   Maxi TV Video 2 = LR50 Rev.Q (FI1216MF, PAL BG+SECAM)
   Maxi TV Video 3 = CPH064 (PAL BG + SECAM)
 
@@ -208,3 +230,163 @@
 Genius/Kye
 ----------
    Video Wonder/Genius Internet Video Kit = LR37 Rev.C
+   Video Wonder Pro II (848 or 878) = LR26
+
+Tekram
+------
+   VideoCap C205 (Bt848)
+   VideoCap C210 (Zoran ZR36120 +Philips)
+   CaptureTV M200 (ISA)
+   CaptureTV M205 (Bt848)
+
+Lucky Star
+----------
+   Image World Conference TV = LR50 Rev. Q
+
+Leadtek
+-------
+   WinView 601 (Bt848)
+   WinView 610 (Zoran)
+   WinFast2000
+
+KNC One
+-------
+   TV-Station
+   TV-Station SE (+Software Bundle)
+   TV-Station pro (+TV stereo)
+   TV-Station FM (+Radio)
+   TV-Station RDS (+RDS)
+
+PV951 cards:
+------------
+  These are sold as:
+   Boeder TV-FM Video Capture Card
+   Titanmedia Supervision TV-2400
+   Provideo PV951 TF
+   3DeMon PV951
+   MediaForte TV-Vision PV951
+   Yoko PV951
+
+Highscreen
+----------
+   TV Karte = LR50 Rev.S
+   TV-Boostar = Terratec Terra TV+ Version 1.0 (Bt848, TDA9821) "ceb105.pcb"
+
+Zoltrix
+-------
+   Face To Face TV MAX (Bt848) (PCB "VP-8482 Rev1.3")
+   Genie TV (Bt878) (PCB "VP-8790 Rev 2.1")
+
+AVerMedia
+---------
+   AVer FunTV Lite (ISA, AV3001 chipset)  "M101.C"
+   AVerTV
+   AVerTV Stereo
+   AVerTV Studio (w/FM)
+   AVerMedia TV98 with Remote 
+   AVerMedia TV/FM98 Stereo
+   AVerMedia TVCAM98
+   TVCapture (Bt848)
+   TVPhone (Bt848)
+   TVCapture98 (="AVerMedia TV98" in USA) (Bt878)
+   TVPhone98 (Bt878, w/FM)
+
+   PCB      PCI-ID      Model-Name      Eeprom  Tuner  Sound    Country
+   --------------------------------------------------------------------
+   M1A8-A      --       AVer TV-Phone           FM1216  --
+   M168-T   1461:0003   AVerTV Studio   48:17   FM1216 TDA9840T  D    (1) w/FM w/Remote
+   M168-U   1461:0004   TVCapture98     40:11   FI1216   --      D    w/Remote
+   M168II-B 1461:0003   Medion MD9592   48:16   FM1216 TDA9873H  D    w/FM
+
+   (1) Daughterboard MB68-A with TDA9820T and TDA9840T
+
+Aimslab
+-------
+   Video Highway Xtreme (aka "VHX") (Bt848, FM w/ TEA5757)
+
+IXMicro
+-------
+   IXTV BT848
+   IXTV BT878
+   TurboTV (Bt848)
+
+Lifetec/Medion/Tevion/Aldi
+-------
+   LT9415/MD9415 = LR90 Rev. F
+          MD9592 = Avermedia TVphone98 (PCI_ID=1461:0003), PCB-Rev=M168II-B (w/TDA9873H)
+
+Modular Technologies (www.modulartech.com) UK
+--------------------
+   MM100 PCTV (Bt848)
+   MM205 PCTV (Bt878)
+   MM210 PCTV (Bt878) (Galaxy TV)
+
+Terratec
+--------
+   Terra TV+ Version 1.0 (Bt848), "ceb105.PCB" printed on the PCB, TDA9821
+   Terra TV+ Version 1.1 (Bt878), "LR74 Rev.E" printed on the PCB, TDA9821
+   Terra TValueRadio,             "LR102 Rev.C" printed on the PCB
+   Terra TV/Radio+ Version 1.0,   "80-CP2830100-0" TTTV3 printed on the PCB, i
+				     "CPH010-E83" on the back, SAA6588T, TDA9873H
+   Terra TValue Version BT878,    "80-CP2830110-0 TTTV4" printed on the PCB, 
+				     "CPH011-D83" on back
+   Terra TValue Version 1.0       "ceb105.PCB" (really identical to Terra TV+ Version 1.0)
+
+   LR74 is a newer PCB revision of ceb105 (both incl. connector for Active Radio Upgrade)
+
+
+Technisat
+---------
+   Mediafocus I (ZR36120/ZR36125)
+   Mediafocus II (SAA7146)
+
+Siemens
+-------
+   Multimedia eXtension Board (MXB) (SAA7146, SAA7111)
+
+Stradis
+-------
+   SDM275,SDM250,SDM026,SDM025 (SAA7146, IBMMPEG2): MPEG2 decoder only
+
+Powercolor
+----------
+   MTV878
+   MTV878R w/Remote Control
+   MTV878F w/Remote Control w/FM radio
+
+Pinnacle
+--------
+   Mirovideo PCTV (Bt848)
+   Mirovideo PCTV SE (Bt848)
+   Mirovideo PCTV Pro (Bt848 + Daughterboard)
+   Studio PCTV Rave (Bt878 w/o infrared)
+   Studio PCTV
+   Studio PCTV Pro (Bt878 stereo w/ FM)
+
+   DC1+ (ISA)
+   DC10  (zr36057 + zr36060 + saa7110 + adv7176)
+   DC10+ (zr36067 + zr36060 + saa7110 + adv7176)
+   DC20
+   DC30
+   DC30+ (zr36067 + zr36050 + zr36016 + vpx3220 + adv7176)
+
+Lenco
+-----
+   MXR-9565 (=Technisat Mediafocus?)
+   MXR-9571 (Bt848)
+   MXR-9575
+   MXR-9477 (Bt878)
+   MXTV-9578CP (= Prolink PV-BT878P+4E)
+
+Iomega
+------
+   Buz (Zoran zr36067 + zr36060 + SAA7111 + SAA7185)
+
+LML
+---
+   LML33 (zr36067 + zr36060 + bt819+ bt856)
+
+Grandtec
+--------
+   Grand Video Capture (Bt848)
+   Multi Capture Card  (Bt878)
diff -Nru linux/Documentation/video4linux/bttv/Insmod-options linux-2.4.19-pre5-mjc/Documentation/video4linux/bttv/Insmod-options
--- linux/Documentation/video4linux/bttv/Insmod-options	Wed Oct 17 17:19:20 2001
+++ linux-2.4.19-pre5-mjc/Documentation/video4linux/bttv/Insmod-options	Sat Apr  6 08:25:57 2002
@@ -28,7 +28,7 @@
 				default is 0 (off).
 		irq_debug=0/1	irq handler debug messages.
 				default is 0 (off).
-		gbuffers=2-64	number of capture buffers for mmap'ed capture.
+		gbuffers=2-32	number of capture buffers for mmap'ed capture.
 				default is 2.
 		gbufsize=	size of capture buffers. default and
 				maximum value is 0x208000 (~2MB)
@@ -38,6 +38,13 @@
 				push used by bttv.  bttv will disable overlay
 				by default on this hardware to avoid crashes.
 				With this insmod option you can override this.
+		automute=0/1	Automatically mutes the sound if there is
+				no TV signal, on by default.  You might try
+				to disable this if you have bad input signal
+				quality which leading to unwanted sound
+				dropouts.
+		chroma_agc=0/1	AGC of chroma signal, off by default.
+		adc_crush=0/1	Luminance ADC crush, on by default.
 
 		bttv_gpio=0/1
 		gpiomask=
@@ -89,6 +96,8 @@
 	insmod args for tda9874a:
 		tda9874a_SIF=1/2	select sound IF input pin (1 or 2)
 					(default is pin 1)
+		tda9874a_AMSEL=0/1	auto-mute select for NICAM (default=0)
+					Please read note 3 below!
 		tda9874a_STD=n		select TV sound standard (0..8):
 					0 - A2, B/G
 					1 - A2, M (Korea)
@@ -100,11 +109,20 @@
 					7 - NICAM, D/K (default)
 					8 - NICAM, L
 
-	Note: tda9874a is very similar to tda9874 (without 'A'-suffix), but
-	this driver will not work for the latter device (will not load).
-	Note: tda9874a and tda9875 (which is supported separately by
+	Note 1: tda9874a supports both tda9874h (old) and tda9874a (new) chips.
+	Note 2: tda9874h/a and tda9875 (which is supported separately by
 	tda9875.o) use the same i2c address so both modules should not be
 	used at the same time.
+	Note 3: Using tda9874a_AMSEL option depends on your TV card design!
+		AMSEL=0: auto-mute will switch between NICAM sound
+			 and the sound on 1st carrier (i.e. FM mono or AM).
+		AMSEL=1: auto-mute will switch between NICAM sound
+			 and the analog mono input (MONOIN pin).
+	If tda9874a decoder on your card has MONOIN pin not connected, then
+	use only tda9874_AMSEL=0 or don't specify this option at all.
+	For example:
+	  card=65 (FlyVideo 2000S) - set AMSEL=1 or AMSEL=0
+	  card=72 (Prolink PV-BT878P rev.9B) - set AMSEL=0 only
 
 msp3400.o
 	The driver for the msp34xx sound processor chips. If you have a
diff -Nru linux/Documentation/video4linux/bttv/README.freeze linux-2.4.19-pre5-mjc/Documentation/video4linux/bttv/README.freeze
--- linux/Documentation/video4linux/bttv/README.freeze	Wed Dec 31 19:00:00 1969
+++ linux-2.4.19-pre5-mjc/Documentation/video4linux/bttv/README.freeze	Sat Apr  6 08:25:57 2002
@@ -0,0 +1,65 @@
+
+If the box freezes hard with bttv ...
+=====================================
+
+It might be a bttv driver bug.  It also might be bad hardware.  It also
+might be something else ...
+
+Just mailing me "bttv freezes" isn't going to help much.  This README
+has a few hints how you can help to pin down the problem.
+
+
+bttv bugs
+---------
+
+If some version works and another doesn't it is likely to be a driver
+bug.  It is very helpful if you can tell where exactly it broke
+(i.e. the last working and the first broken version).
+
+With a hard freeze you probably doesn't find anything in the logfiles.
+The only way to capture any kernel messages is to hook up a serial
+console and let some terminal application log the messages.  /me uses
+screen.  See Documentation/serial-console.txt for details on setting
+up a serial console.
+
+Read Documentation/oops-tracing.txt to learn how to get any useful
+information out of a register+stack dump printed by the kernel on
+protection faults (so-called "kernel oops").
+
+If you run into some kind of deadlock, you can try to dump a call trace
+for each process using sysrq-t (see Documentation/sysrq.txt).  ksymoops
+will translate these dumps into kernel symbols too.  This way it is
+possible to figure where *exactly* some process in "D" state is stuck.
+
+I've seen reports that bttv 0.7.x crashes whereas 0.8.x works rock solid
+for some people.  Thus probably a small buglet left somewhere in bttv
+0.7.x.  I have no idea where exactly, it works stable for me and alot of
+other people.  But in case you have problems with the 0.7.x versions you
+can give 0.8.x a try ...
+
+
+hardware bugs
+-------------
+
+Some hardware can't deal with PCI-PCI transfers (i.e. grabber => vga).
+Sometimes problems show up with bttv just because of the high load on
+the PCI bus. The bt848/878 chips have a few workarounds for known
+incompatibilities, see README.quirks.
+
+Some mainboard have problems to deal correctly with multiple devices
+doing DMA at the same time.  bttv + ide seems to cause this sometimes,
+if this is the case you likely see freezes only with video and hard disk
+access at the same time.  Updating the IDE driver to get the latest and
+greatest workarounds for hardware bugs might fix these problems.
+
+
+other
+-----
+
+IRQ sharing is known to cause problems in some cases.  It works just
+fine in theory and many configurations.  Neverless it might be worth a
+try to shuffle around the PCI cards to give bttv another IRQ or make
+it share the IRQ with some other piece of hardware.  IRQ sharing with
+VGA cards seems to cause trouble sometimes.  I've also seen funny
+effects with bttv sharing the IRQ with the ACPI bridge (and
+apci-enabled kernel).
diff -Nru linux/Documentation/video4linux/bttv/Sound-FAQ linux-2.4.19-pre5-mjc/Documentation/video4linux/bttv/Sound-FAQ
--- linux/Documentation/video4linux/bttv/Sound-FAQ	Wed Oct 17 17:19:20 2001
+++ linux-2.4.19-pre5-mjc/Documentation/video4linux/bttv/Sound-FAQ	Sat Apr  6 08:25:57 2002
@@ -62,7 +62,7 @@
 {
 	[ ... ]
         u32 gpiomask;
-        u32 audiomux[5];  /* audio mux: tuner, radio, external, internal, mute */
+        u32 audiomux[6]; /* Tuner, Radio, external, internal, mute, stereo */
 };
 
 gpiomask specifies which pins are used to control the audio mux chip.
@@ -127,6 +127,9 @@
 *_modulename    - hint whenever some card needs this or that audio
                   module loaded to work properly.
 has_radio	- whenever this TV card has a radio tuner.
+no_msp34xx	- "1" disables loading of msp3400.o module
+no_tda9875	- "1" disables loading of tda9875.o module 
+needs_tvaudio	- set to "1" to load tvaudio.o module 
 
 If some config item is specified both from the tvcards array and as
 insmod option, the insmod option takes precedence.
diff -Nru linux/Documentation/vm/overcommit-accounting linux-2.4.19-pre5-mjc/Documentation/vm/overcommit-accounting
--- linux/Documentation/vm/overcommit-accounting	Wed Dec 31 19:00:00 1969
+++ linux-2.4.19-pre5-mjc/Documentation/vm/overcommit-accounting	Sat Apr  6 08:29:59 2002
@@ -0,0 +1,73 @@
+* This describes the overcommit management facility in the latest kernel
+  tree (FIXME: actually it also describes the stuff that isnt yet done)
+
+The Linux kernel supports four overcommit handling modes
+
+0	-	Heuristic overcommit handling. Obvious overcommits of
+		address space are refused. Used for a typical system. It
+		ensures a seriously wild allocation fails while allowing
+		overcommit to reduce swap usage
+
+1	-	No overcommit handling. Appropriate for some scientific
+		applications
+
+2	-	(NEW) strict overcommit. The total address space commit
+		for the system is not permitted to exceed swap + half ram.
+		In almost all situations this means a process will not be
+		killed while accessing pages but only by malloc failures
+		that are reported back by the kernel mmap/brk code.
+
+3	-	(NEW) paranoid overcommit The total address space commit
+		for the system is not permitted to exceed swap. The machine
+		will never kill a process accessing pages it has mapped
+		except due to a bug (ie report it!)
+
+Gotchas
+-------
+
+The C language stack growth does an implicit mremap. If you want absolute
+guarantees and run close to the edge you MUST mmap your stack for the 
+largest size you think you will need. For typical stack usage is does
+not matter much but its a corner case if you really really care
+
+In modes 2 and 3 the MAP_NORESERVE flag is ignored. 
+
+
+How It Works
+------------
+
+The overcommit is based on the following rules
+
+For a file backed map
+	SHARED or READ only	-	0 cost (the file is the map not swap)
+
+	WRITABLE SHARED		-	size of mapping per instance
+
+For a direct map
+	SHARED or READ only	-	size of mapping
+	PRIVATE WRITEABLE	-	size of mapping per instance
+
+Additional accounting
+	Pages made writable copies by mmap
+	shmfs memory drawn from the same pool
+
+Status
+------
+
+o	We account mmap memory mappings
+o	We account mprotect changes in commit
+o	We account mremap changes in size
+o	We account brk
+o	We account munmap
+o	We report the commit status in /proc
+o	Account and check on fork
+o	Review stack handling/building on exec
+o	SHMfs accounting
+o	Implement actual limit enforcement
+
+To Do
+-----
+o	Account ptrace pages (this is hard)
+o	Disable MAP_NORESERVE in mode 2/3
+o	Account for shared anonymous mappings properly
+	- right now we account them per instance
diff -Nru linux/Documentation/watchdog-api.txt linux-2.4.19-pre5-mjc/Documentation/watchdog-api.txt
--- linux/Documentation/watchdog-api.txt	Wed Dec 31 19:00:00 1969
+++ linux-2.4.19-pre5-mjc/Documentation/watchdog-api.txt	Sat Apr  6 08:25:57 2002
@@ -0,0 +1,390 @@
+The Linux Watchdog driver API.
+
+Copyright 2002 Christer Weingel <wingel@nano-system.com>
+
+Some parts of this document are copied verbatim from the sbc60xxwdt
+driver which is (c) Copyright 2000 Jakob Oestergaard <jakob@ostenfeld.dk>
+
+This document describes the state of the Linux 2.4.18 kernel.
+
+Introduction:
+
+A Watchdog Timer (WDT) is a hardware circuit that can reset the
+computer system in case of a software fault.  You probably knew that
+already.
+
+Usually a userspace daemon will notify the kernel watchdog driver via the
+/dev/watchdog special device file that userspace is still alive, at
+regular intervals.  When such a notification occurs, the driver will
+usually tell the hardware watchdog that everything is in order, and
+that the watchdog should wait for yet another little while to reset
+the system.  If userspace fails (RAM error, kernel bug, whatever), the
+notifications cease to occur, and the hardware watchdog will reset the
+system (causing a reboot) after the timeout occurs.
+
+The Linux watchdog API is a rather AD hoc construction and different
+drivers implement different, and sometimes incompatible, parts of it.
+This file is an attempt to document the existing usage and allow
+future driver writers to use it as a reference.
+
+The simplest API:
+
+All drivers support the basic mode of operation, where the watchdog
+activates as soon as /dev/watchdog is opened and will reboot unless
+the watchdog is pinged within a certain time, this time is called the
+timeout or margin.  The simplest way to ping the watchdog is to write
+some data to the device.  So a very simple watchdog daemon would look
+like this:
+
+int main(int argc, const char *argv[]) {
+	int fd=open("/dev/watchdog",O_WRONLY);
+	if (fd==-1) {
+		perror("watchdog");
+		exit(1);
+	}
+	while(1) {
+		write(fd, "\0", 1);
+		sleep(10);
+	}
+}
+
+A more advanced driver could for example check that a HTTP server is
+still responding before doing the write call to ping the watchdog.
+
+When the device is closed, the watchdog is disabled.  This is not
+always such a good idea, since if there is a bug in the watchdog
+daemon and it crashes the system will not reboot.  Because of this,
+some of the drivers support the configuration option "Disable watchdog
+shutdown on close", CONFIG_WATCHDOG_NOWAYOUT.  If it is set to Y when
+compiling the kernel, there is no way of disabling the watchdog once
+it has been started.  So, if the watchdog dameon crashes, the system
+will reboot after the timeout has passed.
+
+Some other drivers will not disable the watchdog, unless a specific
+magic character 'V' has been sent /dev/watchdog just before closing
+the file.  If the userspace daemon closes the file without sending
+this special character, the driver will assume that the daemon (and
+userspace in general) died, and will stop pinging the watchdog without
+disabling it first.  This will then cause a reboot.
+
+The ioctl API:
+
+All conforming drivers also support an ioctl API.
+
+Pinging the watchdog using an ioctl:
+
+All drivers that have an ioctl interface support at least one ioctl,
+KEEPALIVE.  This ioctl does exactly the same thing as a write to the
+watchdog device, so the main loop in the above program could be
+replaced with:
+
+	while (1) {
+		ioctl(fd, WDIOC_KEEPALIVE, 0);
+		sleep(10);
+	}
+
+the argument to the ioctl is ignored.
+
+Setting and getting the timeout:
+
+For some drivers it is possible to modify the watchdog timeout on the
+fly with the SETTIMEOUT ioctl, those drivers have the WDIOF_SETTIMEOUT
+flag set in their option field.  The argument is an integer
+representing the timeout in seconds.  The driver returns the real
+timeout used in the same variable, and this timeout might differ from
+the requested one due to limitation of the hardware.
+
+    int timeout = 45;
+    ioctl(fd, WDIOC_SETTIMEOUT, &timeout);
+    printf("The timeout was set to %d seconds\n", timeout);
+
+This example might actually print "The timeout was set to 60 seconds"
+if the device has a granularity of minutes for its timeout.
+
+Starting with the Linux 2.4.18 kernel, it is possible to query the
+current timeout using the GETTIMEOUT ioctl.
+
+    ioctl(fd, WDIOC_GETTIMEOUT, &timeout);
+    printf("The timeout was is %d seconds\n", timeout);
+
+Envinronmental monitoring:
+
+All watchdog drivers are required return more information about the system,
+some do temperature, fan and power level monitoring, some can tell you
+the reason for the last reboot of the system.  The GETSUPPORT ioctl is
+available to ask what the device can do:
+
+	struct watchdog_info ident;
+	ioctl(fd, WDIOC_GETSUPPORT, &ident);
+
+the fields returned in the ident struct are:
+
+        identity		a string identifying the watchdog driver
+	firmware_version	the firmware version of the card if available
+	options			a flags describing what the device supports
+
+the options field can have the following bits set, and describes what
+kind of information that the GET_STATUS and GET_BOOT_STATUS ioctls can
+return.   [FIXME -- Is this correct?]
+
+	WDIOF_OVERHEAT		Reset due to CPU overheat
+
+The machine was last rebooted by the watchdog because the thermal limit was
+exceeded
+
+	WDIOF_FANFAULT		Fan failed
+
+A system fan monitored by the watchdog card has failed
+
+	WDIOF_EXTERN1		External relay 1
+
+External monitoring relay/source 1 was triggered. Controllers intended for
+real world applications include external monitoring pins that will trigger
+a reset.
+
+	WDIOF_EXTERN2		External relay 2
+
+External monitoring relay/source 2 was triggered
+
+	WDIOF_POWERUNDER	Power bad/power fault
+
+The machine is showing an undervoltage status
+
+	WDIOF_CARDRESET		Card previously reset the CPU
+
+The last reboot was caused by the watchdog card
+
+	WDIOF_POWEROVER		Power over voltage
+
+The machine is showing an overvoltage status. Note that if one level is
+under and one over both bits will be set - this may seem odd but makes
+sense.
+
+	WDIOF_KEEPALIVEPING	Keep alive ping reply
+
+The watchdog saw a keepalive ping since it was last queried.
+
+	WDIOF_SETTIMEOUT	Can set/get the timeout
+
+
+For those drivers that return any bits set in the option field, the
+GETSTATUS and GETBOOTSTATUS ioctls can be used to ask for the current
+status, and the status at the last reboot, respectively.  
+
+    int flags;
+    ioctl(fd, WDIOC_GETSTATUS, &flags);
+
+    or
+
+    ioctl(fd, WDIOC_GETBOOTSTATUS, &flags);
+
+Note that not all devices support these two calls, and some only
+support the GETBOOTSTATUS call.
+
+Some drivers can measure the temperature using the GETTEMP ioctl.  The
+returned value is the temperature in degrees farenheit.
+
+    int temperature;
+    ioctl(fd, WDIOC_GETTEMP, &temperature);
+
+Finally the SETOPTIONS ioctl can be used to control some aspects of
+the cards operation; right now the pcwd driver is the only one
+supporting thiss ioctl.
+
+    int options = 0;
+    ioctl(fd, WDIOC_SETOPTIONS, options);
+
+The following options are available:
+
+	WDIOS_DISABLECARD	Turn off the watchdog timer
+	WDIOS_ENABLECARD	Turn on the watchdog timer
+	WDIOS_TEMPPANIC		Kernel panic on temperature trip
+
+[FIXME -- better explanations]
+
+Implementations in the current drivers in the kernel tree:
+
+Here I have tried to summarize what the different drivers support and
+where they do strange things compared to the other drivers.
+
+acquirewdt.c -- Acquire Single Board Computer
+
+	This driver has a hardcoded timeout of 1 minute
+
+	Supports CONFIG_WATCHDOG_NOWAYOUT
+
+	GETSUPPORT returns KEEPALIVEPING.  GETSTATUS will return 1 if
+	the device is open, 0 if not.  [FIXME -- isn't this rather
+	silly?  To be able to use the ioctl, the device must be open
+	and so GETSTATUS will always return 1].
+
+advantechwdt.c -- Advantech Single Board Computer
+
+	Timeout that defaults to 60 seconds, supports SETTIMEOUT.
+
+	Supports CONFIG_WATCHDOG_NOWAYOUT
+
+	GETSUPPORT returns WDIOF_KEEPALIVEPING and WDIOF_SETTIMEOUT.
+	The GETSTATUS call returns if the device is open or not.
+	[FIXME -- silliness again?]
+	
+eurotechwdt.c -- Eurotech CPU-1220/1410
+
+	The timeout can be set using the SETTIMEOUT ioctl and defaults
+	to 60 seconds.
+
+	Also has a module parameter "ev", event type which controls
+	what should happen on a timeout, the string "int" or anything
+	else that causes a reboot.  [FIXME -- better description]
+
+	Supports CONFIG_WATCHDOG_NOWAYOUT
+
+	GETSUPPORT returns CARDRESET and WDIOF_SETTIMEOUT but
+	GETSTATUS is not supported and GETBOOTSTATUS just returns 0.
+
+i810-tco.c -- Intel 810 chipset
+
+	Also has support for a lot of other i8x0 stuff, but the
+	watchdog is one of the things.
+
+	The timeout is set using the module parameter "i810_margin",
+	which is in steps of 0.6 seconds where 2<i810_margin<64.  The
+	driver supports the SETTIMEOUT ioctl.
+
+	Supports CONFIG_WATCHDOG_NOWAYOUT.
+
+	GETSUPPORT returns WDIOF_SETTIMEOUT.  The GETSTATUS call
+	returns some kind of timer value which ist not compatible with
+	the other drivers.  GETBOOT status returns some kind of
+	hardware specific boot status.  [FIXME -- describe this]
+
+ib700wdt.c -- IB700 Single Board Computer
+
+	Default timeout of 30 seconds and the timeout is settable
+	using the SETTIMEOUT ioctl.  Note that only a few timeout
+	values are supported.
+
+	Supports CONFIG_WATCHDOG_NOWAYOUT
+
+	GETSUPPORT returns WDIOF_KEEPALIVEPING and WDIOF_SETTIMEOUT.
+	The GETSTATUS call returns if the device is open or not.
+	[FIXME -- silliness again?]
+
+machzwd.c -- MachZ ZF-Logic
+
+	Hardcoded timeout of 10 seconds
+
+	Has a module parameter "action" that controls what happens
+	when the timeout runs out which can be 0 = RESET (default), 
+	1 = SMI, 2 = NMI, 3 = SCI.
+
+	Supports CONFIG_WATCHDOG_NOWAYOUT and the the magic character
+	'V' close handling.
+
+	GETSUPPORT returns WDIOF_KEEPALIVEPING, and the GETSTATUS call
+	returns if the device is open or not.  [FIXME -- silliness
+	again?]
+
+mixcomwd.c -- MixCom Watchdog
+
+	[FIXME -- I'm unable to tell what the timeout is]
+
+	Supports CONFIG_WATCHDOG_NOWAYOUT
+
+	GETSUPPORT returns WDIOF_KEEPALIVEPING, GETSTATUS returns if
+	the device is opened or not [FIXME -- I'm not really sure how
+	this works, there seems to be some magic connected to
+	CONFIG_WATCHDOG_NOWAYOUT]
+
+pcwd.c -- Berkshire PC Watchdog
+
+	Hardcoded timeout of 1.5 seconds
+
+	Supports CONFIG_WATCHDOG_NOWAYOUT
+
+	GETSUPPORT returns WDIOF_OVERHEAT|WDIOF_CARDRESET and both
+	GETSTATUS and GETBOOTSTATUS return something useful.
+
+	The SETOPTIONS call can be used to enable and disable the card
+	and to ask the driver to call panic if the system overheats.
+
+sbc60xxwdt.c -- 60xx Single Board Computer
+
+	Hardcoded timeout of 10 seconds
+
+	Does not support CONFIG_WATCHDOG_NOWAYOUT, but has the magic
+	character 'V' close handling.
+
+	No bits set in GETSUPPORT
+
+scx200.c -- National SCx200 CPUs
+
+	Not in the kernel yet.
+
+	The timeout is set using a module parameter "margin" which
+	defaults to 60 seconds.  The timeout can also be set using
+	SETTIMEOUT and read using GETTIMEOUT.
+
+	Supports a module parameter "nowayout" that is initialized
+	with the value of CONFIG_WATCHDOG_NOWAYOUT.  Also supports the
+	magic character 'V' handling.
+
+shwdt.c -- SuperH 3/4 processors
+
+	[FIXME -- I'm unable to tell what the timeout is]
+
+	Supports CONFIG_WATCHDOG_NOWAYOUT
+
+	GETSUPPORT returns WDIOF_KEEPALIVEPING, and the GETSTATUS call
+	returns if the device is open or not.  [FIXME -- silliness
+	again?]
+
+softdog.c -- Software watchdog
+
+	The timeout is set with the module parameter "soft_margin"
+	which defaults to 60 seconds, the timeout is also settable
+	using the SETTIMEOUT ioctl.
+
+	Supports CONFIG_WATCHDOG_NOWAYOUT
+
+	WDIOF_SETTIMEOUT bit set in GETSUPPORT
+
+w83877f_wdt.c -- W83877F Computer
+
+	Hardcoded timeout of 30 seconds
+
+	Does not support CONFIG_WATCHDOG_NOWAYOUT, but has the magic
+	character 'V' close handling.
+
+	No bits set in GETSUPPORT
+
+wdt.c -- ICS WDT500/501 ISA and
+wdt_pci.c -- ICS WDT500/501 PCI
+
+	Default timeout of 60 seconds.  The timeout is also settable
+        using the SETTIMEOUT ioctl.
+
+	Supports CONFIG_WATCHDOG_NOWAYOUT
+
+	GETSUPPORT returns with bits set depending on the actual
+	card. The WDT501 supports a lot of external monitoring, the
+	WDT500 much less.
+
+wdt285.c -- Footbridge watchdog
+
+	The timeout is set with the module parameter "soft_margin"
+	which defaults to 60 seconds.  The timeout is also settable
+	using the SETTIMEOUT ioctl.
+
+	Does not support CONFIG_WATCHDOG_NOWAYOUT
+
+	WDIOF_SETTIMEOUT bit set in GETSUPPORT
+
+wdt977.c -- Netwinder W83977AF chip
+
+	Hardcoded timeout of 3 minutes
+
+	Supports CONFIG_WATCHDOG_NOWAYOUT
+
+	Does not support any ioctls at all.
+
diff -Nru linux/MAINTAINERS linux-2.4.19-pre5-mjc/MAINTAINERS
--- linux/MAINTAINERS	Mon Feb 25 14:37:52 2002
+++ linux-2.4.19-pre5-mjc/MAINTAINERS	Sat Apr  6 16:07:15 2002
@@ -69,6 +69,14 @@
 			it has been replaced by a better system and you
 			should be using that.
 
+3C359 NETWORK DRIVER
+P:	Mike Phillips
+M:	mikep@linuxtr.net
+L:	linux-net@vger.rutgers.edu
+L:	linux-tr@linuxtr.net
+W:	http://www.linuxtr.net
+S:	Maintained
+
 3C501 NETWORK DRIVER
 P:	Alan Cox
 M:	alan@the.3c501.cabal.tm
@@ -145,6 +153,14 @@
 W:	http://www.ibm.com/linux/ltc/
 S:	Supported
 
+AACRAID SCSI RAID DRIVER
+P:	Adaptec OEM Raid Solutions
+M:	linux-aacraid-devel@dell.com
+L:	linux-aacraid-devel@dell.com
+L:	linux-aacraid-announce@dell.com
+W:	http://domsch.com/linux
+S:	Supported
+
 ACPI
 P:	Andy Grover
 M:	andrew.grover@intel.com
@@ -233,6 +249,12 @@
 W:	http://www.ife.ee.ethz.ch/~sailer/ham/ham.html
 S:	Maintained
 
+BEFS FILE SYSTEM
+P:	Will Dyson
+M:	will@cs.earlham.edu
+W:	http://cs.earlham.edu/~will/software/linux/kernel/BeFS.html
+S:	Maintained
+
 BERKSHIRE PRODUCTS PC WATCHDOG DRIVER
 P:	Kenji Hollis
 M:	kenji@bitgate.com
@@ -260,9 +282,9 @@
 
 BTTV VIDEO4LINUX DRIVER
 P:	Gerd Knorr
-M:	kraxel@goldbach.in-berlin.de
+M:	kraxel@bytesex.org
 L:	video4linux-list@redhat.com
-W:	http://me.in-berlin.de/~kraxel/bttv.html
+W:	http://bytesex.org/bttv/
 S:	Maintained
 
 BUSLOGIC SCSI DRIVER
@@ -706,12 +728,12 @@
 IDE DRIVER [GENERAL]
 P:	Andre Hedrick
 M:	andre@linux-ide.org
-M:	andre@aslab.com
-M:	andre@suse.com
+M:	andre@linuxdiskcert.org
 L:	linux-kernel@vger.kernel.org
 W:	http://www.kernel.org/pub/linux/kernel/people/hedrick/
 W:	http://www.linux-ide.org/
-S:	Supported
+W:	http://www.linuxdiskcert.org/
+S:	Maintained
 
 IDE/ATAPI CDROM DRIVER
 P:	Jens Axboe
@@ -734,16 +756,12 @@
 S:	Maintained
 
 IEEE 1394 SUBSYSTEM
-P:	Andreas Bombe
-M:	andreas.bombe@munich.netsurf.de
+P:	Ben Collins
+M:	bcollins@debian.org
 L:	linux1394-devel@lists.sourceforge.net
 W:	http://linux1394.sourceforge.net/
 S:	Maintained
 
-IEEE 1394 AIC5800 DRIVER
-L:	linux1394-devel@lists.sourceforge.net
-S:	Orphan
-
 IEEE 1394 OHCI DRIVER
 P:	Ben Collins
 M:	bcollins@debian.org
@@ -791,6 +809,12 @@
 L:      intermezzo-discuss@lists.sourceforge.net
 S:      Maintained
 
+IOC3 DRIVER
+P:	Ralf Baechle
+M:	ralf@oss.sgi.com
+L:	linux-mips@oss.sgi.com
+S:	Maintained
+
 IP MASQUERADING:
 P:	Juanjo Ciarlante
 M:	jjciarla@raiz.uncu.edu.ar
@@ -844,12 +868,19 @@
 W:	http://sources.redhat.com/jffs2/
 S:	Maintained
 
+JFS FILESYSTEM
+P:	Dave Kleikamp
+M:	shaggy@austin.ibm.com
+L:	jfs-discussion@oss.software.ibm.com
+W:	http://oss.software.ibm.com/developerworks/opensource/jfs/
+S:	Supported
+
 JOYSTICK DRIVER
 P:	Vojtech Pavlik
 M:	vojtech@suse.cz
 L:	linux-joystick@atrey.karlin.mff.cuni.cz
 W:	http://www.suse.cz/development/joystick/
-S:	Supported
+S:	Maintained
 
 KERNEL AUTOMOUNTER (AUTOFS)
 P:	H. Peter Anvin
@@ -918,6 +949,18 @@
 L:	linuxppc-dev@lists.linuxppc.org
 S:	Maintained
 
+LLC (802.2)
+P:	Arnaldo Carvalho de Melo
+M:	acme@conectiva.com.br
+S:	Maintained
+
+LINUX FOR 64BIT POWERPC
+P:	David Engebretsen
+M:	engebret@us.ibm.com
+W:	http://linuxppc64.org
+L:	linuxppc64-dev@lists.linuxppc.org
+S:	Supported
+
 LOGICAL DISK MANAGER SUPPORT (LDM, Windows 2000/XP Dynamic Disks)
 P:	Richard Russon (FlatCap)
 M:	ldm@flatcap.org
@@ -1183,8 +1226,10 @@
 S:	Maintained
 
 PCI ID DATABASE
-P:	Jens Maurer
-M:	jmaurer@cck.uni-kl.de
+P:	Martin Mares
+M:	mj@ucw.cz
+L:	pciids-devel@lists.sourceforge.net
+W:	http://pciids.sourceforge.net/
 S:	Maintained
 
 PCI SOUND DRIVERS (ES1370, ES1371 and SONICVIBES)
@@ -1224,6 +1269,20 @@
 L:	linux-net@vger.kernel.org
 S:	Maintained
 
+PERMEDIA 3 FRAMEBUFFER DRIVER
+P:	Romain Dolbeau
+M:	dolbeau@irisa.fr
+L:	linux-fbdev-devel@lists.sourceforge.net
+W:	http://www.irisa.fr/prive/dolbeau/pm3fb/pm3fb.html
+S:	Maintained
+
+PHILIPS NINO PALM PC
+P:	Steven Hill
+M:	sjhill@realitydiluted.com
+L:	linux-mips@oss.sgi.com
+W:	http://www.realitydiluted.com/projects/nino
+S:	Maintained
+
 PNP SUPPORT
 P:	Tom Lees
 M:	tom@lpsg.demon.co.uk
@@ -1248,6 +1307,14 @@
 M:	mostrows@styx.uwaterloo.ca
 S:	Maintained
 
+PREEMPTIBLE KERNEL
+P:	Robert M. Love
+M:	rml@tech9.net
+L:	linux-kernel@vger.kernel.org
+L:	kpreempt-tech@lists.sourceforge.net
+W:	http://tech9.net/rml/linux
+S:	Supported
+
 PROMISE DC4030 CACHING DISK CONTROLLER DRIVER
 P:	Peter Denison
 M:	promise@pnd-pc.demon.co.uk
@@ -1304,6 +1371,12 @@
 L:	linux-kernel@vger.kernel.org
 S:	Maintained
 
+RME96XX MULTICHANNEL SOUND DRIVER
+P:      Guenter Geiger
+M:      geiger@epy.co.at  
+L:      linux-kernel@vger.kernel.org
+S:      Maintained
+
 RTLINUX  REALTIME  LINUX
 P:	Victor Yodaiken
 M:	yodaiken@fsmlabs.com
@@ -1331,6 +1404,11 @@
 L:	linux-kernel@vger.kernel.org
 S:	Maintained
 
+SC1200 WDT DRIVER
+P:      Zwane Mwaikambo
+M:      zwane@commfireservices.com
+S:      Maintained
+
 SCSI CDROM DRIVER
 P:	Jens Axboe
 M:	axboe@suse.de
@@ -1355,6 +1433,15 @@
 L:	linux-scsi@vger.kernel.org
 S:	Maintained
 
+SENSORS DRIVERS
+P:      Frodo Looijaard
+M:      frodol@dds.nl
+P:      Philip Edelbrock
+M:      phil@netroedge.com
+L:      sensors@stimpy.netroedge.com
+W:      http://www.lm-sensors.nu/
+S:      Maintained
+
 SGI VISUAL WORKSTATION 320 AND 540
 P:	Bent Hagemark
 M:	bh@sgi.com
@@ -1362,6 +1449,13 @@
 M:	mingo@redhat.com
 S:	Maintained
 
+SIS 5513 IDE CONTROLLER DRIVER
+P:	Lionel Bouton
+M:	Lionel.Bouton@inet6.fr
+W:	http://inet6.dyn.dhs.org/sponsoring/sis5513/index.html
+W:	http://gyver.homeip.net/sis5513/index.html
+S:	Maintained
+
 SIS 900/7016 FAST ETHERNET DRIVER
 P:	Ollie Lho
 M:	ollie@sis.com.tw
@@ -1390,6 +1484,14 @@
 L:	linux-raid@vger.kernel.org
 S:	Maintained
 
+SOFTWARE SUSPEND:
+P:	Gabor Kuti
+M:	seasons@falcon.sch.bme.hu
+M:	seasons@makosteszta.sote.hu
+L:	http://lister.fornax.hu/mailman/listinfo/swsusp
+W:	http://falcon.sch.bme.hu/~seasons/linux
+S:	Maintained
+
 SONIC NETWORK DRIVER
 P:	Thomas Bogendoerfer
 M:	tsbogend@alpha.franken.de
@@ -1412,8 +1514,6 @@
 M:	anton@samba.org
 L:	sparclinux@vger.kernel.org
 L:	ultralinux@vger.kernel.org
-W:	http://ultra.linux.cz
-W:	http://www.geog.ubc.ca/s_linux.html
 S:	Maintained
 
 SPECIALIX IO8+ MULTIPORT SERIAL CARD DRIVER
@@ -1477,6 +1577,11 @@
 M:	hch@infradead.org
 S:	Maintained
 
+TI PARALLEL LINK CABLE DRIVER
+P:     Romain Lievin
+M:     roms@lpg.ticalc.org
+S:     Maintained
+
 TLAN NETWORK DRIVER
 P:	Torben Mathiasen
 M:	torben.mathiasen@compaq.com
@@ -1562,7 +1667,14 @@
 M:	vojtech@suse.cz
 L:	linux-usb-users@lists.sourceforge.net
 L:	linux-usb-devel@lists.sourceforge.net
-S:	Supported
+S:	Maintained
+
+USB AUERSWALD DRIVER
+P:	Wolfgang Muees
+M:	wmues@nexgo.de
+L:	linux-usb-users@lists.sourceforge.net
+L:	linux-usb-devel@lists.sourceforge.net
+S:	Maintained
 
 USB BLUETOOTH DRIVER
 P:	Greg Kroah-Hartman
@@ -1579,13 +1691,19 @@
 L:	linux-usb-devel@lists.sourceforge.net
 S:	Maintained
 
+USB EHCI DRIVER
+P:	David Brownell
+M:	dbrownell@users.sourceforge.net
+L:	linux-usb-devel@lists.sourceforge.net
+S:	Maintained
+
 USB HID/HIDBP/INPUT DRIVERS
 P:	Vojtech Pavlik
 M:	vojtech@suse.cz
 L:	linux-usb-users@lists.sourceforge.net
 L:	linux-usb-devel@lists.sourceforge.net
 W:	http://www.suse.cz/development/input/
-S:	Supported
+S:	Maintained
 
 USB HUB
 P:	Johannes Erdfelt
@@ -1595,8 +1713,8 @@
 S:	Maintained
 
 USB KAWASAKI LSI DRIVER
-P:	Brad Hards
-M:	bradh@frogmouth.net
+P:	Oliver Neukum
+M:	drivers@neukum.org
 L:	linux-usb-users@lists.sourceforge.net
 L:	linux-usb-devel@lists.sourceforge.net
 S:	Maintained
@@ -1626,7 +1744,7 @@
 
 USB PEGASUS DRIVER
 P:	Petko Manolov
-M:	petkan@dce.bg
+M:	petkan@users.sourceforge.net
 L:	linux-usb-users@lists.sourceforge.net
 L:	linux-usb-devel@lists.sourceforge.net
 S:	Maintained
@@ -1636,7 +1754,7 @@
 M:	vojtech@suse.cz
 L:	linux-usb-users@lists.sourceforge.net
 L:	linux-usb-devel@lists.sourceforge.net
-S:	Supported
+S:	Maintained
 
 USB SE401 DRIVER
 P:	Jeroen Vreeken
@@ -1684,12 +1802,12 @@
 S:	Maintained
 
 USB SERIAL KEYSPAN DRIVER
-P:	Hugh Blemings
-M:	hugh@misc.nu
+P:	Greg Kroah-Hartman
+M:	greg@kroah.com
 L:	linux-usb-users@lists.sourceforge.net
 L:	linux-usb-devel@lists.sourceforge.net
+W:	http://www.kroah.com/linux/
 S:	Maintained
-W:	http://misc.nu/hugh/keyspan/
 
 USB SUBSYSTEM
 P:	Greg Kroah-Hartman
@@ -1706,7 +1824,21 @@
 L:	linux-usb-devel@lists.sourceforge.net
 W:	http://usb.in.tum.de
 S:	Maintained
+
+USER-MODE PORT
+P:	Jeff Dike
+M:	jdike@karaya.com
+L:	user-mode-linux-devel@lists.sourceforge.net
+L:	user-mode-linux-user@lists.sourceforge.net
+W:	http://user-mode-linux.sourceforge.net
+S:	Maintained
 	
+USB "USBNET" DRIVER
+P:	David Brownell
+M:	dbrownell@users.sourceforge.net
+L:	linux-usb-devel@lists.sourceforge.net
+S:	Maintained
+
 VFAT FILESYSTEM:
 P:	Gordon Chaffee
 M:	chaffee@cs.berkeley.edu
@@ -1727,10 +1859,9 @@
 S:	Maintained
 
 VIDEO FOR LINUX
-P:	Alan Cox
-M:	Alan.Cox@linux.org
-W:	http://roadrunner.swansea.linux.org.uk/v4l.shtml
-S:	Maintained for 2.2 only
+P:	Gerd Knorr
+M:	kraxel@bytesex.org
+S:	Maintained
 
 WAN ROUTER & SANGOMA WANPIPE DRIVERS & API (X.25, FRAME RELAY, PPP, CISCO HDLC)
 P:     Nenad Corbic
diff -Nru linux/Makefile linux-2.4.19-pre5-mjc/Makefile
--- linux/Makefile	Mon Feb 25 14:37:52 2002
+++ linux-2.4.19-pre5-mjc/Makefile	Sat Apr  6 16:27:21 2002
@@ -1,11 +1,19 @@
 VERSION = 2
 PATCHLEVEL = 4
-SUBLEVEL = 18
-EXTRAVERSION =
+SUBLEVEL = 19
+EXTRAVERSION = -pre5-mjc2
 
 KERNELRELEASE=$(VERSION).$(PATCHLEVEL).$(SUBLEVEL)$(EXTRAVERSION)
 
-ARCH := $(shell uname -m | sed -e s/i.86/i386/ -e s/sun4u/sparc64/ -e s/arm.*/arm/ -e s/sa110/arm/)
+# SUBARCH tells the usermode build what the underlying arch is.  That is set
+# first, and if a usermode build is happening, the "ARCH=um" on the command
+# line overrides the setting of ARCH below.  If a native build is happening,
+# then ARCH is assigned, getting whatever value it gets normally, and 
+# SUBARCH is subsequently ignored.
+
+SUBARCH := $(shell uname -m | sed -e s/i.86/i386/ -e s/sun4u/sparc64/ -e s/arm.*/arm/ -e s/sa110/arm/)
+ARCH := $(SUBARCH)
+
 KERNELPATH=kernel-$(shell echo $(KERNELRELEASE) | sed -e "s/-//g")
 
 CONFIG_SHELL := $(shell if [ -x "$$BASH" ]; then echo $$BASH; \
@@ -140,7 +148,6 @@
 DRIVERS-$(CONFIG_DRM_NEW) += drivers/char/drm/drm.o
 DRIVERS-$(CONFIG_DRM_OLD) += drivers/char/drm-4.0/drm.o
 DRIVERS-$(CONFIG_NUBUS) += drivers/nubus/nubus.a
-DRIVERS-$(CONFIG_ISDN) += drivers/isdn/isdn.a
 DRIVERS-$(CONFIG_NET_FC) += drivers/net/fc/fc.o
 DRIVERS-$(CONFIG_APPLETALK) += drivers/net/appletalk/appletalk.o
 DRIVERS-$(CONFIG_TR) += drivers/net/tokenring/tr.o
@@ -170,7 +177,7 @@
 DRIVERS-$(CONFIG_FC4) += drivers/fc4/fc4.a
 DRIVERS-$(CONFIG_ALL_PPC) += drivers/macintosh/macintosh.o
 DRIVERS-$(CONFIG_MAC) += drivers/macintosh/macintosh.o
-DRIVERS-$(CONFIG_ISAPNP) += drivers/pnp/pnp.o
+DRIVERS-$(CONFIG_PNP) += drivers/pnp/pnp.o
 DRIVERS-$(CONFIG_SGI_IP22) += drivers/sgi/sgi.a
 DRIVERS-$(CONFIG_VT) += drivers/video/video.o
 DRIVERS-$(CONFIG_PARIDE) += drivers/block/paride/paride.a
@@ -185,7 +192,9 @@
 DRIVERS-$(CONFIG_MD) += drivers/md/mddev.o
 DRIVERS-$(CONFIG_BLUEZ) += drivers/bluetooth/bluetooth.o
 DRIVERS-$(CONFIG_HOTPLUG_PCI) += drivers/hotplug/vmlinux-obj.o
+DRIVERS-$(CONFIG_ISDN_BOOL) += drivers/isdn/vmlinux-obj.o
 
+DRIVERS-$(CONFIG_SENSORS) += drivers/sensors/sensor.o
 DRIVERS := $(DRIVERS-y)
 
 
@@ -194,6 +203,7 @@
 	kernel/ksyms.lst include/linux/compile.h \
 	vmlinux System.map \
 	.tmp* \
+	scripts/mkconfigs kernel/configs.c kernel/configs.o \
 	drivers/char/consolemap_deftbl.c drivers/video/promcon_tbl.c \
 	drivers/char/conmakehash \
 	drivers/char/drm/*-mod.c \
@@ -233,6 +243,7 @@
 	include/asm \
 	.hdepend scripts/mkdep scripts/split-include scripts/docproc \
 	$(TOPDIR)/include/linux/modversions.h \
+	scripts/mkconfigs kernel/configs.c kernel/configs.o \
 	kernel.spec
 
 # directories removed with 'make mrproper'
@@ -258,8 +269,8 @@
 boot: vmlinux
 	@$(MAKE) CFLAGS="$(CFLAGS) $(CFLAGS_KERNEL)" -C arch/$(ARCH)/boot
 
-vmlinux: include/linux/version.h $(CONFIGURATION) init/main.o init/version.o linuxsubdirs
-	$(LD) $(LINKFLAGS) $(HEAD) init/main.o init/version.o \
+vmlinux: include/linux/version.h $(CONFIGURATION) init/main.o init/version.o init/do_mounts.o linuxsubdirs
+	$(LD) $(LINKFLAGS) $(HEAD) init/main.o init/version.o init/do_mounts.o \
 		--start-group \
 		$(CORE_FILES) \
 		$(DRIVERS) \
@@ -336,6 +347,9 @@
 	$(CC) $(CFLAGS) $(CFLAGS_KERNEL) -DUTS_MACHINE='"$(ARCH)"' -DKBUILD_BASENAME=$(subst $(comma),_,$(subst -,_,$(*F))) -c -o init/version.o init/version.c
 
 init/main.o: init/main.c include/config/MARKER
+	$(CC) $(CFLAGS) $(CFLAGS_KERNEL) $(PROFILING) -DKBUILD_BASENAME=$(subst $(comma),_,$(subst -,_,$(*F))) -c -o $*.o $<
+
+init/do_mounts.o: init/do_mounts.c include/config/MARKER
 	$(CC) $(CFLAGS) $(CFLAGS_KERNEL) $(PROFILING) -DKBUILD_BASENAME=$(subst $(comma),_,$(subst -,_,$(*F))) -c -o $*.o $<
 
 fs lib mm ipc kernel drivers net: dummy
diff -Nru linux/Makefile.orig linux-2.4.19-pre5-mjc/Makefile.orig
--- linux/Makefile.orig	Wed Dec 31 19:00:00 1969
+++ linux-2.4.19-pre5-mjc/Makefile.orig	Sat Apr  6 16:27:14 2002
@@ -0,0 +1,555 @@
+VERSION = 2
+PATCHLEVEL = 4
+SUBLEVEL = 19
+EXTRAVERSION = -pre5-ac3
+
+KERNELRELEASE=$(VERSION).$(PATCHLEVEL).$(SUBLEVEL)$(EXTRAVERSION)
+
+# SUBARCH tells the usermode build what the underlying arch is.  That is set
+# first, and if a usermode build is happening, the "ARCH=um" on the command
+# line overrides the setting of ARCH below.  If a native build is happening,
+# then ARCH is assigned, getting whatever value it gets normally, and 
+# SUBARCH is subsequently ignored.
+
+SUBARCH := $(shell uname -m | sed -e s/i.86/i386/ -e s/sun4u/sparc64/ -e s/arm.*/arm/ -e s/sa110/arm/)
+ARCH := $(SUBARCH)
+
+KERNELPATH=kernel-$(shell echo $(KERNELRELEASE) | sed -e "s/-//g")
+
+CONFIG_SHELL := $(shell if [ -x "$$BASH" ]; then echo $$BASH; \
+	  else if [ -x /bin/bash ]; then echo /bin/bash; \
+	  else echo sh; fi ; fi)
+TOPDIR	:= $(shell /bin/pwd)
+
+HPATH   	= $(TOPDIR)/include
+FINDHPATH	= $(HPATH)/asm $(HPATH)/linux $(HPATH)/scsi $(HPATH)/net
+
+HOSTCC  	= gcc
+HOSTCFLAGS	= -Wall -Wstrict-prototypes -O2 -fomit-frame-pointer
+
+CROSS_COMPILE 	=
+
+#
+# Include the make variables (CC, etc...)
+#
+
+AS		= $(CROSS_COMPILE)as
+LD		= $(CROSS_COMPILE)ld
+CC		= $(CROSS_COMPILE)gcc
+CPP		= $(CC) -E
+AR		= $(CROSS_COMPILE)ar
+NM		= $(CROSS_COMPILE)nm
+STRIP		= $(CROSS_COMPILE)strip
+OBJCOPY		= $(CROSS_COMPILE)objcopy
+OBJDUMP		= $(CROSS_COMPILE)objdump
+MAKEFILES	= $(TOPDIR)/.config
+GENKSYMS	= /sbin/genksyms
+DEPMOD		= /sbin/depmod
+MODFLAGS	= -DMODULE
+CFLAGS_KERNEL	=
+PERL		= perl
+
+export	VERSION PATCHLEVEL SUBLEVEL EXTRAVERSION KERNELRELEASE ARCH \
+	CONFIG_SHELL TOPDIR HPATH HOSTCC HOSTCFLAGS CROSS_COMPILE AS LD CC \
+	CPP AR NM STRIP OBJCOPY OBJDUMP MAKE MAKEFILES GENKSYMS MODFLAGS PERL
+
+all:	do-it-all
+
+#
+# Make "config" the default target if there is no configuration file or
+# "depend" the target if there is no top-level dependency information.
+#
+
+ifeq (.config,$(wildcard .config))
+include .config
+ifeq (.depend,$(wildcard .depend))
+include .depend
+do-it-all:	Version vmlinux
+else
+CONFIGURATION = depend
+do-it-all:	depend
+endif
+else
+CONFIGURATION = config
+do-it-all:	config
+endif
+
+#
+# INSTALL_PATH specifies where to place the updated kernel and system map
+# images.  Uncomment if you want to place them anywhere other than root.
+#
+
+#export	INSTALL_PATH=/boot
+
+#
+# INSTALL_MOD_PATH specifies a prefix to MODLIB for module directory
+# relocations required by build roots.  This is not defined in the
+# makefile but the arguement can be passed to make if needed.
+#
+
+MODLIB	:= $(INSTALL_MOD_PATH)/lib/modules/$(KERNELRELEASE)
+export MODLIB
+
+#
+# standard CFLAGS
+#
+
+CPPFLAGS := -D__KERNEL__ -I$(HPATH)
+
+CFLAGS := $(CPPFLAGS) -Wall -Wstrict-prototypes -Wno-trigraphs -O2 \
+	  -fomit-frame-pointer -fno-strict-aliasing -fno-common
+AFLAGS := -D__ASSEMBLY__ $(CPPFLAGS)
+
+#
+# ROOT_DEV specifies the default root-device when making the image.
+# This can be either FLOPPY, CURRENT, /dev/xxxx or empty, in which case
+# the default of FLOPPY is used by 'build'.
+# This is i386 specific.
+#
+
+export ROOT_DEV = CURRENT
+
+#
+# If you want to preset the SVGA mode, uncomment the next line and
+# set SVGA_MODE to whatever number you want.
+# Set it to -DSVGA_MODE=NORMAL_VGA if you just want the EGA/VGA mode.
+# The number is the same as you would ordinarily press at bootup.
+# This is i386 specific.
+#
+
+export SVGA_MODE = -DSVGA_MODE=NORMAL_VGA
+
+#
+# If you want the RAM disk device, define this to be the size in blocks.
+# This is i386 specific.
+#
+
+#export RAMDISK = -DRAMDISK=512
+
+CORE_FILES	=kernel/kernel.o mm/mm.o fs/fs.o ipc/ipc.o
+NETWORKS	=net/network.o
+
+LIBS		=$(TOPDIR)/lib/lib.a
+SUBDIRS		=kernel drivers mm fs net ipc lib
+
+DRIVERS-n :=
+DRIVERS-y :=
+DRIVERS-m :=
+DRIVERS-  :=
+
+DRIVERS-$(CONFIG_ACPI) += drivers/acpi/acpi.o
+DRIVERS-$(CONFIG_PARPORT) += drivers/parport/driver.o
+DRIVERS-y += drivers/char/char.o \
+	drivers/block/block.o \
+	drivers/misc/misc.o \
+	drivers/net/net.o \
+	drivers/media/media.o
+DRIVERS-$(CONFIG_AGP) += drivers/char/agp/agp.o
+DRIVERS-$(CONFIG_DRM_NEW) += drivers/char/drm/drm.o
+DRIVERS-$(CONFIG_DRM_OLD) += drivers/char/drm-4.0/drm.o
+DRIVERS-$(CONFIG_NUBUS) += drivers/nubus/nubus.a
+DRIVERS-$(CONFIG_NET_FC) += drivers/net/fc/fc.o
+DRIVERS-$(CONFIG_APPLETALK) += drivers/net/appletalk/appletalk.o
+DRIVERS-$(CONFIG_TR) += drivers/net/tokenring/tr.o
+DRIVERS-$(CONFIG_WAN) += drivers/net/wan/wan.o
+DRIVERS-$(CONFIG_ARCNET) += drivers/net/arcnet/arcnetdrv.o
+DRIVERS-$(CONFIG_ATM) += drivers/atm/atm.o
+DRIVERS-$(CONFIG_IDE) += drivers/ide/idedriver.o
+DRIVERS-$(CONFIG_FC4) += drivers/fc4/fc4.a
+DRIVERS-$(CONFIG_SCSI) += drivers/scsi/scsidrv.o
+DRIVERS-$(CONFIG_FUSION_BOOT) += drivers/message/fusion/fusion.o
+DRIVERS-$(CONFIG_IEEE1394) += drivers/ieee1394/ieee1394drv.o
+
+ifneq ($(CONFIG_CD_NO_IDESCSI)$(CONFIG_BLK_DEV_IDECD)$(CONFIG_BLK_DEV_SR)$(CONFIG_PARIDE_PCD),)
+DRIVERS-y += drivers/cdrom/driver.o
+endif
+
+DRIVERS-$(CONFIG_SOUND) += drivers/sound/sounddrivers.o
+DRIVERS-$(CONFIG_PCI) += drivers/pci/driver.o
+DRIVERS-$(CONFIG_MTD) += drivers/mtd/mtdlink.o
+DRIVERS-$(CONFIG_PCMCIA) += drivers/pcmcia/pcmcia.o
+DRIVERS-$(CONFIG_NET_PCMCIA) += drivers/net/pcmcia/pcmcia_net.o
+DRIVERS-$(CONFIG_NET_WIRELESS) += drivers/net/wireless/wireless_net.o
+DRIVERS-$(CONFIG_PCMCIA_CHRDEV) += drivers/char/pcmcia/pcmcia_char.o
+DRIVERS-$(CONFIG_DIO) += drivers/dio/dio.a
+DRIVERS-$(CONFIG_SBUS) += drivers/sbus/sbus_all.o
+DRIVERS-$(CONFIG_ZORRO) += drivers/zorro/driver.o
+DRIVERS-$(CONFIG_FC4) += drivers/fc4/fc4.a
+DRIVERS-$(CONFIG_ALL_PPC) += drivers/macintosh/macintosh.o
+DRIVERS-$(CONFIG_MAC) += drivers/macintosh/macintosh.o
+DRIVERS-$(CONFIG_PNP) += drivers/pnp/pnp.o
+DRIVERS-$(CONFIG_SGI_IP22) += drivers/sgi/sgi.a
+DRIVERS-$(CONFIG_VT) += drivers/video/video.o
+DRIVERS-$(CONFIG_PARIDE) += drivers/block/paride/paride.a
+DRIVERS-$(CONFIG_HAMRADIO) += drivers/net/hamradio/hamradio.o
+DRIVERS-$(CONFIG_TC) += drivers/tc/tc.a
+DRIVERS-$(CONFIG_USB) += drivers/usb/usbdrv.o
+DRIVERS-$(CONFIG_INPUT) += drivers/input/inputdrv.o
+DRIVERS-$(CONFIG_I2O) += drivers/message/i2o/i2o.o
+DRIVERS-$(CONFIG_IRDA) += drivers/net/irda/irda.o
+DRIVERS-$(CONFIG_I2C) += drivers/i2c/i2c.o
+DRIVERS-$(CONFIG_PHONE) += drivers/telephony/telephony.o
+DRIVERS-$(CONFIG_MD) += drivers/md/mddev.o
+DRIVERS-$(CONFIG_BLUEZ) += drivers/bluetooth/bluetooth.o
+DRIVERS-$(CONFIG_HOTPLUG_PCI) += drivers/hotplug/vmlinux-obj.o
+DRIVERS-$(CONFIG_ISDN_BOOL) += drivers/isdn/vmlinux-obj.o
+
+DRIVERS-$(CONFIG_SENSORS) += drivers/sensors/sensor.o
+DRIVERS := $(DRIVERS-y)
+
+
+# files removed with 'make clean'
+CLEAN_FILES = \
+	kernel/ksyms.lst include/linux/compile.h \
+	vmlinux System.map \
+	.tmp* \
+	scripts/mkconfigs kernel/configs.c kernel/configs.o \
+	drivers/char/consolemap_deftbl.c drivers/video/promcon_tbl.c \
+	drivers/char/conmakehash \
+	drivers/char/drm/*-mod.c \
+	drivers/pci/devlist.h drivers/pci/classlist.h drivers/pci/gen-devlist \
+	drivers/zorro/devlist.h drivers/zorro/gen-devlist \
+	drivers/sound/bin2hex drivers/sound/hex2hex \
+	drivers/atm/fore200e_mkfirm drivers/atm/{pca,sba}*{.bin,.bin1,.bin2} \
+	drivers/scsi/aic7xxx/aicasm/aicasm_gram.c \
+	drivers/scsi/aic7xxx/aicasm/aicasm_scan.c \
+	drivers/scsi/aic7xxx/aicasm/y.tab.h \
+	drivers/scsi/aic7xxx/aicasm/aicasm \
+	drivers/scsi/53c700_d.h \
+	net/khttpd/make_times_h \
+	net/khttpd/times.h \
+	submenu*
+# directories removed with 'make clean'
+CLEAN_DIRS = \
+	modules
+
+# files removed with 'make mrproper'
+MRPROPER_FILES = \
+	include/linux/autoconf.h include/linux/version.h \
+	drivers/net/hamradio/soundmodem/sm_tbl_{afsk1200,afsk2666,fsk9600}.h \
+	drivers/net/hamradio/soundmodem/sm_tbl_{hapn4800,psk4800}.h \
+	drivers/net/hamradio/soundmodem/sm_tbl_{afsk2400_7,afsk2400_8}.h \
+	drivers/net/hamradio/soundmodem/gentbl \
+	drivers/sound/*_boot.h drivers/sound/.*.boot \
+	drivers/sound/msndinit.c \
+	drivers/sound/msndperm.c \
+	drivers/sound/pndsperm.c \
+	drivers/sound/pndspini.c \
+	drivers/atm/fore200e_*_fw.c drivers/atm/.fore200e_*.fw \
+	.version .config* config.in config.old \
+	scripts/tkparse scripts/kconfig.tk scripts/kconfig.tmp \
+	scripts/lxdialog/*.o scripts/lxdialog/lxdialog \
+	.menuconfig.log \
+	include/asm \
+	.hdepend scripts/mkdep scripts/split-include scripts/docproc \
+	$(TOPDIR)/include/linux/modversions.h \
+	scripts/mkconfigs kernel/configs.c kernel/configs.o \
+	kernel.spec
+
+# directories removed with 'make mrproper'
+MRPROPER_DIRS = \
+	include/config \
+	$(TOPDIR)/include/linux/modules
+
+
+include arch/$(ARCH)/Makefile
+
+export	CPPFLAGS CFLAGS CFLAGS_KERNEL AFLAGS AFLAGS_KERNEL
+
+export	NETWORKS DRIVERS LIBS HEAD LDFLAGS LINKFLAGS MAKEBOOT ASFLAGS
+
+.S.s:
+	$(CPP) $(AFLAGS) $(AFLAGS_KERNEL) -traditional -o $*.s $<
+.S.o:
+	$(CC) $(AFLAGS) $(AFLAGS_KERNEL) -traditional -c -o $*.o $<
+
+Version: dummy
+	@rm -f include/linux/compile.h
+
+boot: vmlinux
+	@$(MAKE) CFLAGS="$(CFLAGS) $(CFLAGS_KERNEL)" -C arch/$(ARCH)/boot
+
+vmlinux: include/linux/version.h $(CONFIGURATION) init/main.o init/version.o init/do_mounts.o linuxsubdirs
+	$(LD) $(LINKFLAGS) $(HEAD) init/main.o init/version.o init/do_mounts.o \
+		--start-group \
+		$(CORE_FILES) \
+		$(DRIVERS) \
+		$(NETWORKS) \
+		$(LIBS) \
+		--end-group \
+		-o vmlinux
+	$(NM) vmlinux | grep -v '\(compiled\)\|\(\.o$$\)\|\( [aUw] \)\|\(\.\.ng$$\)\|\(LASH[RL]DI\)' | sort > System.map
+
+symlinks:
+	rm -f include/asm
+	( cd include ; ln -sf asm-$(ARCH) asm)
+	@if [ ! -d include/linux/modules ]; then \
+		mkdir include/linux/modules; \
+	fi
+
+oldconfig: symlinks
+	$(CONFIG_SHELL) scripts/Configure -d arch/$(ARCH)/config.in
+
+xconfig: symlinks
+	$(MAKE) -C scripts kconfig.tk
+	wish -f scripts/kconfig.tk
+
+menuconfig: include/linux/version.h symlinks
+	$(MAKE) -C scripts/lxdialog all
+	$(CONFIG_SHELL) scripts/Menuconfig arch/$(ARCH)/config.in
+
+config: symlinks
+	$(CONFIG_SHELL) scripts/Configure arch/$(ARCH)/config.in
+
+include/config/MARKER: scripts/split-include include/linux/autoconf.h
+	scripts/split-include include/linux/autoconf.h include/config
+	@ touch include/config/MARKER
+
+linuxsubdirs: $(patsubst %, _dir_%, $(SUBDIRS))
+
+$(patsubst %, _dir_%, $(SUBDIRS)) : dummy include/linux/version.h include/config/MARKER
+	$(MAKE) CFLAGS="$(CFLAGS) $(CFLAGS_KERNEL)" -C $(patsubst _dir_%, %, $@)
+
+$(TOPDIR)/include/linux/version.h: include/linux/version.h
+$(TOPDIR)/include/linux/compile.h: include/linux/compile.h
+
+newversion:
+	. scripts/mkversion > .tmpversion
+	@mv -f .tmpversion .version
+
+include/linux/compile.h: $(CONFIGURATION) include/linux/version.h newversion
+	@echo -n \#define UTS_VERSION \"\#`cat .version` > .ver
+	@if [ -n "$(CONFIG_SMP)" ] ; then echo -n " SMP" >> .ver; fi
+	@if [ -f .name ]; then  echo -n \-`cat .name` >> .ver; fi
+	@echo ' '`date`'"' >> .ver
+	@echo \#define LINUX_COMPILE_TIME \"`date +%T`\" >> .ver
+	@echo \#define LINUX_COMPILE_BY \"`whoami`\" >> .ver
+	@echo \#define LINUX_COMPILE_HOST \"`hostname`\" >> .ver
+	@if [ -x /bin/dnsdomainname ]; then \
+	   echo \#define LINUX_COMPILE_DOMAIN \"`dnsdomainname`\"; \
+	 elif [ -x /bin/domainname ]; then \
+	   echo \#define LINUX_COMPILE_DOMAIN \"`domainname`\"; \
+	 else \
+	   echo \#define LINUX_COMPILE_DOMAIN ; \
+	 fi >> .ver
+	@echo \#define LINUX_COMPILER \"`$(CC) $(CFLAGS) -v 2>&1 | tail -1`\" >> .ver
+	@mv -f .ver $@
+
+include/linux/version.h: ./Makefile
+	@echo \#define UTS_RELEASE \"$(KERNELRELEASE)\" > .ver
+	@echo \#define LINUX_VERSION_CODE `expr $(VERSION) \\* 65536 + $(PATCHLEVEL) \\* 256 + $(SUBLEVEL)` >> .ver
+	@echo '#define KERNEL_VERSION(a,b,c) (((a) << 16) + ((b) << 8) + (c))' >>.ver
+	@mv -f .ver $@
+
+comma	:= ,
+
+init/version.o: init/version.c include/linux/compile.h include/config/MARKER
+	$(CC) $(CFLAGS) $(CFLAGS_KERNEL) -DUTS_MACHINE='"$(ARCH)"' -DKBUILD_BASENAME=$(subst $(comma),_,$(subst -,_,$(*F))) -c -o init/version.o init/version.c
+
+init/main.o: init/main.c include/config/MARKER
+	$(CC) $(CFLAGS) $(CFLAGS_KERNEL) $(PROFILING) -DKBUILD_BASENAME=$(subst $(comma),_,$(subst -,_,$(*F))) -c -o $*.o $<
+
+init/do_mounts.o: init/do_mounts.c include/config/MARKER
+	$(CC) $(CFLAGS) $(CFLAGS_KERNEL) $(PROFILING) -DKBUILD_BASENAME=$(subst $(comma),_,$(subst -,_,$(*F))) -c -o $*.o $<
+
+fs lib mm ipc kernel drivers net: dummy
+	$(MAKE) CFLAGS="$(CFLAGS) $(CFLAGS_KERNEL)" $(subst $@, _dir_$@, $@)
+
+TAGS: dummy
+	etags `find include/asm-$(ARCH) -name '*.h'`
+	find include -type d \( -name "asm-*" -o -name config \) -prune -o -name '*.h' -print | xargs etags -a
+	find $(SUBDIRS) init -name '*.[ch]' | xargs etags -a
+
+# Exuberant ctags works better with -I
+tags: dummy
+	CTAGSF=`ctags --version | grep -i exuberant >/dev/null && echo "-I __initdata,__exitdata,EXPORT_SYMBOL,EXPORT_SYMBOL_NOVERS"`; \
+	ctags $$CTAGSF `find include/asm-$(ARCH) -name '*.h'` && \
+	find include -type d \( -name "asm-*" -o -name config \) -prune -o -name '*.h' -print | xargs ctags $$CTAGSF -a && \
+	find $(SUBDIRS) init -name '*.[ch]' | xargs ctags $$CTAGSF -a
+
+ifdef CONFIG_MODULES
+ifdef CONFIG_MODVERSIONS
+MODFLAGS += -DMODVERSIONS -include $(HPATH)/linux/modversions.h
+endif
+
+.PHONY: modules
+modules: $(patsubst %, _mod_%, $(SUBDIRS))
+
+.PHONY: $(patsubst %, _mod_%, $(SUBDIRS))
+$(patsubst %, _mod_%, $(SUBDIRS)) : include/linux/version.h include/config/MARKER
+	$(MAKE) -C $(patsubst _mod_%, %, $@) CFLAGS="$(CFLAGS) $(MODFLAGS)" MAKING_MODULES=1 modules
+
+.PHONY: modules_install
+modules_install: _modinst_ $(patsubst %, _modinst_%, $(SUBDIRS)) _modinst_post
+
+.PHONY: _modinst_
+_modinst_:
+	@rm -rf $(MODLIB)/kernel
+	@rm -f $(MODLIB)/build
+	@mkdir -p $(MODLIB)/kernel
+	@ln -s $(TOPDIR) $(MODLIB)/build
+
+# If System.map exists, run depmod.  This deliberately does not have a
+# dependency on System.map since that would run the dependency tree on
+# vmlinux.  This depmod is only for convenience to give the initial
+# boot a modules.dep even before / is mounted read-write.  However the
+# boot script depmod is the master version.
+ifeq "$(strip $(INSTALL_MOD_PATH))" ""
+depmod_opts	:=
+else
+depmod_opts	:= -b $(INSTALL_MOD_PATH) -r
+endif
+.PHONY: _modinst_post
+_modinst_post: _modinst_post_pcmcia
+	if [ -r System.map ]; then $(DEPMOD) -ae -F System.map $(depmod_opts) $(KERNELRELEASE); fi
+
+# Backwards compatibilty symlinks for people still using old versions
+# of pcmcia-cs with hard coded pathnames on insmod.  Remove
+# _modinst_post_pcmcia for kernel 2.4.1.
+.PHONY: _modinst_post_pcmcia
+_modinst_post_pcmcia:
+	cd $(MODLIB); \
+	mkdir -p pcmcia; \
+	find kernel -path '*/pcmcia/*' -name '*.o' | xargs -i -r ln -sf ../{} pcmcia
+
+.PHONY: $(patsubst %, _modinst_%, $(SUBDIRS))
+$(patsubst %, _modinst_%, $(SUBDIRS)) :
+	$(MAKE) -C $(patsubst _modinst_%, %, $@) modules_install
+
+# modules disabled....
+
+else
+modules modules_install: dummy
+	@echo
+	@echo "The present kernel configuration has modules disabled."
+	@echo "Type 'make config' and enable loadable module support."
+	@echo "Then build a kernel with module support enabled."
+	@echo
+	@exit 1
+endif
+
+clean:	archclean
+	find . \( -name '*.[oas]' -o -name core -o -name '.*.flags' \) -type f -print \
+		| grep -v lxdialog/ | xargs rm -f
+	rm -f $(CLEAN_FILES)
+	rm -rf $(CLEAN_DIRS)
+	$(MAKE) -C Documentation/DocBook clean
+
+mrproper: clean archmrproper
+	find . \( -size 0 -o -name .depend \) -type f -print | xargs rm -f
+	rm -f $(MRPROPER_FILES)
+	rm -rf $(MRPROPER_DIRS)
+	$(MAKE) -C Documentation/DocBook mrproper
+
+distclean: mrproper
+	rm -f core `find . \( -not -type d \) -and \
+		\( -name '*.orig' -o -name '*.rej' -o -name '*~' \
+		-o -name '*.bak' -o -name '#*#' -o -name '.*.orig' \
+		-o -name '.*.rej' -o -name '.SUMS' -o -size 0 \) -type f -print` TAGS tags
+
+backup: mrproper
+	cd .. && tar cf - linux/ | gzip -9 > backup.gz
+	sync
+
+sgmldocs: 
+	chmod 755 $(TOPDIR)/scripts/docgen
+	chmod 755 $(TOPDIR)/scripts/gen-all-syms
+	chmod 755 $(TOPDIR)/scripts/kernel-doc
+	$(MAKE) -C $(TOPDIR)/Documentation/DocBook books
+
+psdocs: sgmldocs
+	$(MAKE) -C Documentation/DocBook ps
+
+pdfdocs: sgmldocs
+	$(MAKE) -C Documentation/DocBook pdf
+
+htmldocs: sgmldocs
+	$(MAKE) -C Documentation/DocBook html
+
+sums:
+	find . -type f -print | sort | xargs sum > .SUMS
+
+dep-files: scripts/mkdep archdep include/linux/version.h
+	scripts/mkdep -- init/*.c > .depend
+	scripts/mkdep -- `find $(FINDHPATH) -name SCCS -prune -o -follow -name \*.h ! -name modversions.h -print` > .hdepend
+	$(MAKE) $(patsubst %,_sfdep_%,$(SUBDIRS)) _FASTDEP_ALL_SUB_DIRS="$(SUBDIRS)"
+ifdef CONFIG_MODVERSIONS
+	$(MAKE) update-modverfile
+endif
+
+ifdef CONFIG_MODVERSIONS
+MODVERFILE := $(TOPDIR)/include/linux/modversions.h
+else
+MODVERFILE :=
+endif
+export	MODVERFILE
+
+depend dep: dep-files
+
+checkconfig:
+	find * -name '*.[hcS]' -type f -print | sort | xargs $(PERL) -w scripts/checkconfig.pl
+
+checkhelp:
+	find * -name [cC]onfig.in -print | sort | xargs $(PERL) -w scripts/checkhelp.pl
+
+checkincludes:
+	find * -name '*.[hcS]' -type f -print | sort | xargs $(PERL) -w scripts/checkincludes.pl
+
+ifdef CONFIGURATION
+..$(CONFIGURATION):
+	@echo
+	@echo "You have a bad or nonexistent" .$(CONFIGURATION) ": running 'make" $(CONFIGURATION)"'"
+	@echo
+	$(MAKE) $(CONFIGURATION)
+	@echo
+	@echo "Successful. Try re-making (ignore the error that follows)"
+	@echo
+	exit 1
+
+#dummy: ..$(CONFIGURATION)
+dummy:
+
+else
+
+dummy:
+
+endif
+
+include Rules.make
+
+#
+# This generates dependencies for the .h files.
+#
+
+scripts/mkdep: scripts/mkdep.c
+	$(HOSTCC) $(HOSTCFLAGS) -o scripts/mkdep scripts/mkdep.c
+
+scripts/split-include: scripts/split-include.c
+	$(HOSTCC) $(HOSTCFLAGS) -o scripts/split-include scripts/split-include.c
+
+#
+# RPM target
+#
+#	If you do a make spec before packing the tarball you can rpm -ta it
+#
+spec:
+	. scripts/mkspec >kernel.spec
+
+#
+#	Build a tar ball, generate an rpm from it and pack the result
+#	There arw two bits of magic here
+#	1) The use of /. to avoid tar packing just the symlink
+#	2) Removing the .dep files as they have source paths in them that
+#	   will become invalid
+#
+rpm:	clean spec
+	find . \( -size 0 -o -name .depend -o -name .hdepend \) -type f -print | xargs rm -f
+	set -e; \
+	cd $(TOPDIR)/.. ; \
+	ln -sf $(TOPDIR) $(KERNELPATH) ; \
+	tar -cvz --exclude CVS -f $(KERNELPATH).tar.gz $(KERNELPATH)/. ; \
+	rm $(KERNELPATH) ; \
+	cd $(TOPDIR) ; \
+	. scripts/mkversion > .version ; \
+	rpm -ta $(TOPDIR)/../$(KERNELPATH).tar.gz ; \
+	rm $(TOPDIR)/../$(KERNELPATH).tar.gz
diff -Nru linux/README linux-2.4.19-pre5-mjc/README
--- linux/README	Fri Oct  5 15:10:00 2001
+++ linux-2.4.19-pre5-mjc/README	Sat Apr  6 08:25:57 2002
@@ -150,13 +150,12 @@
 
 COMPILING the kernel:
 
- - Make sure you have gcc-2.91.66 (egcs-1.1.2) available.  gcc 2.95.2 may
+ - Make sure you have gcc 2.95.3 available.  gcc 2.91.66 (egcs-1.1.2) may
    also work but is not as safe, and *gcc 2.7.2.3 is no longer supported*.
    Also remember to upgrade your binutils package (for as/ld/nm and company)
    if necessary. For more information, refer to ./Documentation/Changes.
 
-   Please note that you can still run a.out user programs with this
-   kernel.
+   Please note that you can still run a.out user programs with this kernel.
 
  - Do a "make bzImage" to create a compressed kernel image.  If you want
    to make a boot disk (without root filesystem or LILO), insert a floppy
diff -Nru linux/Rules.make linux-2.4.19-pre5-mjc/Rules.make
--- linux/Rules.make	Mon Feb 25 14:37:52 2002
+++ linux-2.4.19-pre5-mjc/Rules.make	Sat Apr  6 09:37:07 2002
@@ -50,10 +50,10 @@
 #
 
 %.s: %.c
-	$(CC) $(CFLAGS) $(EXTRA_CFLAGS) $(CFLAGS_$@) -S $< -o $@
+	$(CC) $(CFLAGS) $(EXTRA_CFLAGS) -DKBUILD_BASENAME=$(subst $(comma),_,$(subst -,_,$(*F))) $(CFLAGS_$@) -S $< -o $@
 
 %.i: %.c
-	$(CPP) $(CFLAGS) $(EXTRA_CFLAGS) $(CFLAGS_$@) $< > $@
+	$(CPP) $(CFLAGS) $(EXTRA_CFLAGS) -DKBUILD_BASENAME=$(subst $(comma),_,$(subst -,_,$(*F))) $(CFLAGS_$@) $< > $@
 
 %.o: %.c
 	$(CC) $(CFLAGS) $(EXTRA_CFLAGS) -DKBUILD_BASENAME=$(subst $(comma),_,$(subst -,_,$(*F))) $(CFLAGS_$@) -c -o $@ $<
@@ -214,12 +214,29 @@
 #
 # Added the SMP separator to stop module accidents between uniprocessor
 # and SMP Intel boxes - AC - from bits by Michael Chastain
+# Added separator for different PAGE_OFFSET memory models - Ingo.
 #
 
 ifdef CONFIG_SMP
 	genksyms_smp_prefix := -p smp_
 else
 	genksyms_smp_prefix := 
+endif
+
+ifdef CONFIG_2GB
+ifdef CONFIG_SMP
+	genksyms_smp_prefix := -p smp_2gig_
+else
+	genksyms_smp_prefix := -p 2gig_
+endif
+endif
+
+ifdef CONFIG_3GB
+ifdef CONFIG_SMP
+	genksyms_smp_prefix := -p smp_3gig_
+else
+	genksyms_smp_prefix := -p 3gig_
+endif
 endif
 
 $(MODINCL)/%.ver: %.c
diff -Nru linux/arch/alpha/Makefile linux-2.4.19-pre5-mjc/arch/alpha/Makefile
--- linux/arch/alpha/Makefile	Sun Dec  3 20:45:20 2000
+++ linux-2.4.19-pre5-mjc/arch/alpha/Makefile	Sat Apr  6 08:25:57 2002
@@ -40,20 +40,20 @@
     CFLAGS := $(CFLAGS) -mcpu=pca56
     mcpu_done := y
   endif
-  ifeq ($(mcpu_done)$(CONFIG_ALPHA_PYXIS),ny)
-    CFLAGS := $(CFLAGS) -mcpu=ev56
-    mcpu_done := y
-  endif
-  ifeq ($(mcpu_done)$(CONFIG_ALPHA_POLARIS),ny)
-    ifeq ($(have_mcpu_pca56),y)
-      CFLAGS := $(CFLAGS) -mcpu=pca56
-    else
-      CFLAGS := $(CFLAGS) -mcpu=ev56
-    endif
+  ifeq ($(mcpu_done)$(CONFIG_ALPHA_POLARIS)$(have_mcpu_pca56),nyy)
+    CFLAGS := $(CFLAGS) -mcpu=pca56
     mcpu_done := y
   endif
   ifeq ($(mcpu_done)$(CONFIG_ALPHA_EV4),ny)
     CFLAGS := $(CFLAGS) -mcpu=ev4
+    mcpu_done := y
+  endif
+  ifeq ($(mcpu_done)$(CONFIG_ALPHA_EV56),ny)
+    CFLAGS := $(CFLAGS) -mcpu=ev56
+    mcpu_done := y
+  endif
+  ifeq ($(mcpu_done)$(CONFIG_ALPHA_EV5),ny)
+    CFLAGS := $(CFLAGS) -mcpu=ev5
     mcpu_done := y
   endif
   ifeq ($(mcpu_done)$(CONFIG_ALPHA_EV67)$(have_mcpu_ev67),nyy)
diff -Nru linux/arch/alpha/config.in linux-2.4.19-pre5-mjc/arch/alpha/config.in
--- linux/arch/alpha/config.in	Tue Nov 20 18:49:31 2001
+++ linux-2.4.19-pre5-mjc/arch/alpha/config.in	Sat Apr  6 08:29:59 2002
@@ -102,19 +102,44 @@
 then
 	define_bool CONFIG_ALPHA_EB64P y
 fi
-if [ "$CONFIG_ALPHA_EB164" = "y" -o "$CONFIG_ALPHA_PC164" = "y" \
-	-o "$CONFIG_ALPHA_ALCOR" = "y" -o "$CONFIG_ALPHA_TAKARA" = "y" ]
+if [ "$CONFIG_ALPHA_ALCOR" = "y" ]
 then
 	define_bool CONFIG_ALPHA_EV5 y
 	define_bool CONFIG_ALPHA_CIA y
+	bool 'EV56 CPU (speed >= 366MHz)?' CONFIG_ALPHA_EV56
 fi
-if [ "$CONFIG_ALPHA_MIKASA" = "y" -o "$CONFIG_ALPHA_NORITAKE" = "y" ]
+if [ "$CONFIG_ALPHA_EB164" = "y" ]
+then
+	define_bool CONFIG_ALPHA_EV5 y
+	define_bool CONFIG_ALPHA_CIA y
+fi
+if [ "$CONFIG_ALPHA_PC164" = "y" -o "$CONFIG_ALPHA_TAKARA" = "y" ]
+then
+	define_bool CONFIG_ALPHA_EV5 y
+	define_bool CONFIG_ALPHA_EV56 y
+	define_bool CONFIG_ALPHA_CIA y
+fi
+if [ "$CONFIG_ALPHA_MIKASA" = "y" ]
 then
 	bool 'EV5 CPU daughtercard (model 5/xxx)?' CONFIG_ALPHA_PRIMO
 	if [ "$CONFIG_ALPHA_PRIMO" = "y" ]
 	then
 		define_bool CONFIG_ALPHA_EV5 y
 		define_bool CONFIG_ALPHA_CIA y
+		bool 'EV56 CPU (speed >= 333MHz)?' CONFIG_ALPHA_EV56
+	else
+		define_bool CONFIG_ALPHA_EV4 y
+		define_bool CONFIG_ALPHA_APECS y
+	fi
+fi
+if [ "$CONFIG_ALPHA_NORITAKE" = "y" ]
+then
+	bool 'EV5 CPU (model 5/xxx)?' CONFIG_ALPHA_PRIMO
+	if [ "$CONFIG_ALPHA_PRIMO" = "y" ]
+	then
+		define_bool CONFIG_ALPHA_EV5 y
+		define_bool CONFIG_ALPHA_CIA y
+		bool 'EV56 CPU (speed >= 333MHz)?' CONFIG_ALPHA_EV56
 	else
 		define_bool CONFIG_ALPHA_EV4 y
 		define_bool CONFIG_ALPHA_APECS y
@@ -135,6 +160,7 @@
 	-o "$CONFIG_ALPHA_SX164" = "y" -o "$CONFIG_ALPHA_RUFFIAN" = "y" ]
 then
 	define_bool CONFIG_ALPHA_EV5 y
+	define_bool CONFIG_ALPHA_EV56 y
 	define_bool CONFIG_ALPHA_CIA y
 	define_bool CONFIG_ALPHA_PYXIS y
 fi
@@ -159,10 +185,12 @@
 then
 	define_bool CONFIG_ALPHA_EV5 y
 	define_bool CONFIG_ALPHA_MCPCIA y
+	bool 'EV56 CPU (speed >= 400MHz)?' CONFIG_ALPHA_EV56
 fi
 if [ "$CONFIG_ALPHA_RX164" = "y" ]
 then
 	define_bool CONFIG_ALPHA_EV5 y
+	define_bool CONFIG_ALPHA_EV56 y
 	define_bool CONFIG_ALPHA_POLARIS y
 fi
 if [ "$CONFIG_ALPHA_JENSEN" = "y" ]
@@ -393,3 +421,5 @@
 fi
 
 endmenu
+
+source lib/Config.in
diff -Nru linux/arch/alpha/kernel/alpha_ksyms.c linux-2.4.19-pre5-mjc/arch/alpha/kernel/alpha_ksyms.c
--- linux/arch/alpha/kernel/alpha_ksyms.c	Mon Feb 25 14:37:52 2002
+++ linux-2.4.19-pre5-mjc/arch/alpha/kernel/alpha_ksyms.c	Sat Apr  6 08:25:57 2002
@@ -214,6 +214,7 @@
 EXPORT_SYMBOL(smp_imb);
 EXPORT_SYMBOL(cpu_data);
 EXPORT_SYMBOL(__cpu_number_map);
+EXPORT_SYMBOL(__cpu_logical_map);
 EXPORT_SYMBOL(smp_num_cpus);
 EXPORT_SYMBOL(smp_call_function);
 EXPORT_SYMBOL(smp_call_function_on_cpu);
diff -Nru linux/arch/alpha/kernel/entry.S linux-2.4.19-pre5-mjc/arch/alpha/kernel/entry.S
--- linux/arch/alpha/kernel/entry.S	Fri Nov  9 16:45:35 2001
+++ linux-2.4.19-pre5-mjc/arch/alpha/kernel/entry.S	Sat Apr  6 08:25:57 2002
@@ -10,7 +10,7 @@
 
 #define SIGCHLD 20
 
-#define NR_SYSCALLS 378
+#define NR_SYSCALLS 382
 
 /*
  * These offsets must match with alpha_mv in <asm/machvec.h>.
@@ -1148,3 +1148,9 @@
 	.quad sys_gettid
 	.quad sys_readahead
 	.quad sys_ni_syscall			/* 380, sys_security */
+	.quad sys_tkill
+
+/* Remember to update everything, kids.  */
+.ifne (. - sys_call_table) - (NR_SYSCALLS * 8)
+.err
+.endif
diff -Nru linux/arch/alpha/kernel/pci_iommu.c linux-2.4.19-pre5-mjc/arch/alpha/kernel/pci_iommu.c
--- linux/arch/alpha/kernel/pci_iommu.c	Mon Feb 25 14:37:52 2002
+++ linux-2.4.19-pre5-mjc/arch/alpha/kernel/pci_iommu.c	Sat Apr  6 08:25:57 2002
@@ -217,9 +217,14 @@
 	}
 
 	/* If the machine doesn't define a pci_tbi routine, we have to
-	   assume it doesn't support sg mapping.  */
+	   assume it doesn't support sg mapping, and, since we tried to
+	   use direct_map above, it now must be considered an error. */
 	if (! alpha_mv.mv_pci_tbi) {
-		printk(KERN_WARNING "pci_map_single failed: no hw sg\n");
+		static int been_here = 0; /* Only print the message once. */
+		if (!been_here) {
+		    printk(KERN_WARNING "pci_map_single: no HW sg\n");
+		    been_here = 1;
+		}
 		return 0;
 	}
 		
diff -Nru linux/arch/alpha/kernel/signal.c linux-2.4.19-pre5-mjc/arch/alpha/kernel/signal.c
--- linux/arch/alpha/kernel/signal.c	Fri Nov  9 16:45:35 2001
+++ linux-2.4.19-pre5-mjc/arch/alpha/kernel/signal.c	Sat Apr  6 08:25:57 2002
@@ -717,9 +717,7 @@
 
 			default:
 				lock_kernel();
-				sigaddset(&current->pending.signal, signr);
-				current->flags |= PF_SIGNALED;
-				do_exit(exit_code);
+				sig_exit(signr, exit_code, &info);
 				/* NOTREACHED */
 			}
 			continue;
diff -Nru linux/arch/alpha/kernel/smp.c linux-2.4.19-pre5-mjc/arch/alpha/kernel/smp.c
--- linux/arch/alpha/kernel/smp.c	Fri Dec 21 12:41:53 2001
+++ linux-2.4.19-pre5-mjc/arch/alpha/kernel/smp.c	Sat Apr  6 08:25:57 2002
@@ -184,9 +184,23 @@
 	 */
 	wait_boot_cpu_to_stop(cpuid);
 	mb();
+ try_again:
 	calibrate_delay();
 
 	smp_store_cpu_info(cpuid);
+
+	{
+#define LPJ(c) ((long)cpu_data[c].loops_per_jiffy)
+	  static int tries = 3;
+	  long diff = LPJ(boot_cpuid) - LPJ(cpuid);
+	  if (diff < 0) diff = -diff;
+				
+	  if (diff > LPJ(boot_cpuid)/10 && --tries) {
+	    printk("Bogus BogoMIPS for cpu %d - retrying...\n", cpuid);
+	    goto try_again;
+	  }
+	}
+
 	/*
 	 * Allow master to continue only after we written
 	 * the loops_per_jiffy.
@@ -1065,7 +1079,8 @@
 }
 
 void
-flush_icache_page(struct vm_area_struct *vma, struct page *page)
+flush_icache_user_range(struct vm_area_struct *vma, struct page *page,
+			unsigned long addr, int len)
 {
 	struct mm_struct *mm = vma->vm_mm;
 
diff -Nru linux/arch/alpha/math-emu/math.c linux-2.4.19-pre5-mjc/arch/alpha/math-emu/math.c
--- linux/arch/alpha/math-emu/math.c	Fri Sep 22 16:54:09 2000
+++ linux-2.4.19-pre5-mjc/arch/alpha/math-emu/math.c	Sat Apr  6 08:25:57 2002
@@ -220,12 +220,12 @@
 				FP_CONV(S,D,1,1,SR,DB);
 				goto pack_s;
 			} else {
-				/* CVTST need do nothing else but copy the
-				   bits and repack.  */
+				vb = alpha_read_fp_reg_s(fb);
+				FP_UNPACK_SP(SB, &vb);
 				DR_c = DB_c;
 				DR_s = DB_s;
 				DR_e = DB_e;
-				DR_f = DB_f;
+				DR_f = SB_f << (52 - 23);
 				goto pack_d;
 			}
 
diff -Nru linux/arch/alpha/mm/init.c linux-2.4.19-pre5-mjc/arch/alpha/mm/init.c
--- linux/arch/alpha/mm/init.c	Thu Sep 20 23:02:03 2001
+++ linux-2.4.19-pre5-mjc/arch/alpha/mm/init.c	Sat Apr  6 08:25:57 2002
@@ -380,7 +380,7 @@
 		free_page(addr);
 		totalram_pages++;
 	}
-	printk ("Freeing unused kernel memory: %ldk freed\n",
+	printk (KERN_INFO "Freeing unused kernel memory: %ldk freed\n",
 		(&__init_end - &__init_begin) >> 10);
 }
 
@@ -395,7 +395,7 @@
 		free_page(start);
 		totalram_pages++;
 	}
-	printk ("Freeing initrd memory: %ldk freed\n", (end - __start) >> 10);
+	printk (KERN_INFO "Freeing initrd memory: %ldk freed\n", (end - __start) >> 10);
 }
 #endif
 
diff -Nru linux/arch/alpha/mm/numa.c linux-2.4.19-pre5-mjc/arch/alpha/mm/numa.c
--- linux/arch/alpha/mm/numa.c	Sun Aug 12 13:38:48 2001
+++ linux-2.4.19-pre5-mjc/arch/alpha/mm/numa.c	Sat Apr  6 08:25:57 2002
@@ -312,7 +312,7 @@
 		printk(".");				\
 } while(0)
 
-#define clobber(p, size) memset((p)->virtual, 0xaa, (size))
+#define clobber(p, size) memset(page_address(p), 0xaa, (size))
 
 void __init mem_stress(void)
 {
diff -Nru linux/arch/arm/Makefile linux-2.4.19-pre5-mjc/arch/arm/Makefile
--- linux/arch/arm/Makefile	Fri Nov  9 16:58:02 2001
+++ linux-2.4.19-pre5-mjc/arch/arm/Makefile	Sat Apr  6 08:25:57 2002
@@ -39,10 +39,12 @@
 tune-$(CONFIG_CPU_ARM710)	:=-mtune=arm710
 tune-$(CONFIG_CPU_ARM720T)	:=-mtune=arm7tdmi
 tune-$(CONFIG_CPU_ARM920T)	:=-mtune=arm9tdmi
+tune-$(CONFIG_CPU_ARM922T)	:=-mtune=arm9tdmi
 tune-$(CONFIG_CPU_ARM926T)	:=-mtune=arm9tdmi
 tune-$(CONFIG_CPU_SA110)	:=-mtune=strongarm110
 tune-$(CONFIG_CPU_SA1100)	:=-mtune=strongarm1100
 
+CFLAGS_BOOT	:=$(apcs-y) $(arch-y) $(tune-y) -mshort-load-bytes -msoft-float
 CFLAGS		+=$(apcs-y) $(arch-y) $(tune-y) -mshort-load-bytes -msoft-float
 AFLAGS		+=$(apcs-y) $(arch-y) -mno-fpu -msoft-float
 
@@ -74,6 +76,8 @@
 
 ifeq ($(CONFIG_ARCH_EBSA110),y)
 MACHINE		 = ebsa110
+CFLAGS_3c589_cs	:=-DISA_SIXTEEN_BIT_PERIPHERAL
+export CFLAGS_3c589_cs
 endif
 
 ifeq ($(CONFIG_ARCH_CLPS7500),y)
@@ -121,6 +125,10 @@
 MACHINE		 = integrator
 endif
 
+ifeq ($(CONFIG_ARCH_MX1ADS),y)
+MACHINE		 = mx1ads
+endif
+
 ifeq ($(CONFIG_ARCH_CAMELOT),y)
 MACHINE          = epxa10db
 endif
@@ -130,11 +138,15 @@
 MACHINE		 = clps711x
 endif
 
+ifeq ($(CONFIG_ARCH_FORTUNET),y)
+TEXTADDR	 = 0xc0008000
+endif
+
 ifeq ($(CONFIG_ARCH_ANAKIN),y)
 MACHINE		 = anakin
 endif
 
-export	MACHINE PROCESSOR TEXTADDR GZFLAGS
+export	MACHINE PROCESSOR TEXTADDR GZFLAGS CFLAGS_BOOT
 
 # Only set INCDIR if its not already defined above
 # Grr, ?= doesn't work as all the other assignment operators do.  Make bug?
@@ -207,6 +219,7 @@
 	arch/arm/vmlinux.lds
 
 MRPROPER_FILES	+= \
+	arch/arm/tools/constants.h* \
 	include/asm-arm/arch \
 	include/asm-arm/proc \
 	include/asm-arm/constants.h* \
@@ -254,7 +267,7 @@
 	@( \
 	CFG=$(@:_config=); \
 	if [ -f arch/arm/def-configs/$$CFG ]; then \
-	  [ -f .config ] && $(MV) .config .config.old; \
+	  [ -f .config ] && mv -f .config .config.old; \
 	  cp arch/arm/def-configs/$$CFG .config; \
 	  echo "*** Default configuration for $$CFG installed"; \
 	  echo "*** Next, you may run 'make oldconfig'"; \
diff -Nru linux/arch/arm/boot/Makefile linux-2.4.19-pre5-mjc/arch/arm/boot/Makefile
--- linux/arch/arm/boot/Makefile	Thu Oct 11 12:04:57 2001
+++ linux-2.4.19-pre5-mjc/arch/arm/boot/Makefile	Sat Apr  6 08:25:57 2002
@@ -54,6 +54,14 @@
 INITRD_VIRT	 = 0xc0800000
 endif
 
+ifeq ($(CONFIG_ARCH_MX1ADS),y)
+ZTEXTADDR	 = 0x08008000
+endif
+
+ifeq ($(CONFIG_ARCH_CAMELOT),y)
+ZTEXTADDR	 = 0x00008000
+endif
+
 ifeq ($(CONFIG_ARCH_NEXUSPCI),y)
 ZTEXTADDR	 = 0x40008000
 endif
diff -Nru linux/arch/arm/boot/compressed/Makefile linux-2.4.19-pre5-mjc/arch/arm/boot/compressed/Makefile
--- linux/arch/arm/boot/compressed/Makefile	Thu Oct 11 12:04:57 2001
+++ linux-2.4.19-pre5-mjc/arch/arm/boot/compressed/Makefile	Sat Apr  6 08:25:57 2002
@@ -9,7 +9,7 @@
 
 HEAD		 = head.o
 OBJS		 = misc.o
-CFLAGS		 = $(CPPFLAGS) -O2 -DSTDC_HEADERS $(CFLAGS_PROC) -msoft-float
+CFLAGS		 = $(CPPFLAGS) -O2 -DSTDC_HEADERS $(CFLAGS_BOOT)
 FONTC		 = $(TOPDIR)/drivers/video/font_acorn_8x8.c
 ZLDFLAGS	 = -p -X -T vmlinux.lds
 
@@ -33,6 +33,14 @@
 OBJS		+= head-integrator.o
 endif
 
+ifeq ($(CONFIG_ARCH_MX1ADS),y)
+OBJS		+= head-mx1ads.o
+endif
+
+ifeq ($(CONFIG_ARCH_CAMELOT),y)
+OBJS		+= head-epxa10db.o
+endif
+
 ifeq ($(CONFIG_ARCH_FTVPCI),y)
 OBJS		+= head-ftvpci.o
 endif
@@ -84,12 +92,12 @@
 font.o:		$(FONTC)
 		$(CC) $(CFLAGS) -Dstatic= -c -o $@ $(FONTC)
 
-vmlinux.lds:	vmlinux.lds.in
+vmlinux.lds:	vmlinux.lds.in Makefile $(TOPDIR)/arch/$(ARCH)/boot/Makefile $(TOPDIR)/.config
 		@sed "$(SEDFLAGS)" < vmlinux.lds.in > $@
 
 clean:;		rm -f vmlinux core piggy* vmlinux.lds
 
-.PHONY:	vmlinux.lds clean
+.PHONY:	clean
 
 misc.o: misc.c $(TOPDIR)/include/asm/arch/uncompress.h $(TOPDIR)/lib/inflate.c
 
diff -Nru linux/arch/arm/boot/compressed/head-epxa10db.S linux-2.4.19-pre5-mjc/arch/arm/boot/compressed/head-epxa10db.S
--- linux/arch/arm/boot/compressed/head-epxa10db.S	Wed Dec 31 19:00:00 1969
+++ linux-2.4.19-pre5-mjc/arch/arm/boot/compressed/head-epxa10db.S	Sat Apr  6 08:25:57 2002
@@ -0,0 +1,5 @@
+#include <asm/mach-types.h>
+#include <asm/arch/excalibur.h>
+
+		.section	".start", #alloc, #execinstr
+		mov	r7, #MACH_TYPE_CAMELOT
diff -Nru linux/arch/arm/boot/compressed/head-mx1ads.S linux-2.4.19-pre5-mjc/arch/arm/boot/compressed/head-mx1ads.S
--- linux/arch/arm/boot/compressed/head-mx1ads.S	Wed Dec 31 19:00:00 1969
+++ linux-2.4.19-pre5-mjc/arch/arm/boot/compressed/head-mx1ads.S	Sat Apr  6 08:25:57 2002
@@ -0,0 +1,4 @@
+#include <asm/mach-types.h>
+
+		.section	".start", #alloc, #execinstr
+		mov	r7, #MACH_TYPE_MX1ADS
diff -Nru linux/arch/arm/boot/compressed/head-shark.S linux-2.4.19-pre5-mjc/arch/arm/boot/compressed/head-shark.S
--- linux/arch/arm/boot/compressed/head-shark.S	Thu Apr 12 15:03:50 2001
+++ linux-2.4.19-pre5-mjc/arch/arm/boot/compressed/head-shark.S	Sat Apr  6 08:25:57 2002
@@ -1,5 +1,5 @@
 /* The head-file for the Shark
- * by Alexander Schulz <aschulz@netwinder.org>
+ * by Alexander Schulz
  *
  * Does the following:
  * - get the memory layout from firmware. This can only be done as long as the mmu
diff -Nru linux/arch/arm/boot/compressed/head.S linux-2.4.19-pre5-mjc/arch/arm/boot/compressed/head.S
--- linux/arch/arm/boot/compressed/head.S	Sun Aug 12 14:13:59 2001
+++ linux-2.4.19-pre5-mjc/arch/arm/boot/compressed/head.S	Sat Apr  6 08:25:57 2002
@@ -18,14 +18,14 @@
  * Please select one of the following when turning on debugging.
  */
 #ifdef DEBUG
-#if 0 /* DC21285-type */
+#if defined(CONFIG_DEBUG_DC21285_PORT)
 		.macro	loadsp,	rb
 		mov	\rb, #0x7c000000
 		.endm
 		.macro	writeb,	rb
 		strb	\rb, [r3, #0x3f8]
 		.endm
-#elif 0 /* RiscPC-type */
+#elif defined(CONFIG_ARCH_RPC)
 		.macro	loadsp,	rb
 		mov	\rb, #0x03000000
 		orr	\rb, \rb, #0x00010000
@@ -33,13 +33,25 @@
 		.macro	writeb,	rb
 		strb	\rb, [r3, #0x3f8 << 2]
 		.endm
-#elif 0 /* integrator-type */
+#elif defined(CONFIG_ARCH_INTEGRATOR)
 		.macro	loadsp, rb
 		mov	\rb, #0x16000000
 		.endm
 		.macro	writeb, rb
 		strb	\rb, [r3, #0]
 		.endm
+#elif defined(CONFIG_ARCH_SA1100)
+		.macro	loadsp, rb
+		mov	\rb, #0x80000000	@ physical base address
+#  if defined(CONFIG_DEBUG_LL_SER3)
+		add	\rb, \rb, #0x00050000	@ Ser3
+#  else
+		add	\rb, \rb, #0x00010000	@ Ser1
+#  endif
+		.endm
+		.macro	writeb, rb
+		str	\rb, [r3, #0x14]	@ UTDR
+		.endm
 #else
 #error no serial architecture defined
 #endif
@@ -64,7 +76,7 @@
 		kphex	r7, 8		/* architecture id */
 		kputc	#':'
 		mrc	p15, 0, r0, c1, c0
-		kphex	r0, 8		/* control reg
+		kphex	r0, 8		/* control reg */
 		kputc	#'\n'
 		kphex	r5, 8		/* decompressed kernel start */
 		kputc	#'-'
@@ -218,7 +230,8 @@
 		ldr     r1, proc_sa1110_type
 		eor	r1, r1, r6
 		movs	r1, r1, lsr #4
-		movne	pc, lr
+@		movne	pc, lr
+		bne	cache_off
 1:
 		sub	r3, r4, #16384		@ Page directory size
 		bic	r3, r3, #0xff		@ Align the pointer
diff -Nru linux/arch/arm/boot/compressed/misc.c linux-2.4.19-pre5-mjc/arch/arm/boot/compressed/misc.c
--- linux/arch/arm/boot/compressed/misc.c	Sun Aug 12 14:13:59 2001
+++ linux-2.4.19-pre5-mjc/arch/arm/boot/compressed/misc.c	Sat Apr  6 08:25:57 2002
@@ -18,6 +18,8 @@
 
 unsigned int __machine_arch_type;
 
+#include <linux/kernel.h>
+
 #include <asm/uaccess.h>
 #include <asm/arch/uncompress.h>
 #include <asm/proc/uncompress.h>
diff -Nru linux/arch/arm/boot/compressed/ofw-shark.c linux-2.4.19-pre5-mjc/arch/arm/boot/compressed/ofw-shark.c
--- linux/arch/arm/boot/compressed/ofw-shark.c	Sun Aug 12 14:13:59 2001
+++ linux-2.4.19-pre5-mjc/arch/arm/boot/compressed/ofw-shark.c	Sat Apr  6 08:25:57 2002
@@ -1,7 +1,7 @@
 /*
  * linux/arch/arm/boot/compressed/ofw-shark.c
  *
- * by Alexander Schulz <aschulz@netwinder.org>
+ * by Alexander Schulz
  *
  * This file is used to get some basic information
  * about the memory layout of the shark we are running
diff -Nru linux/arch/arm/config.in linux-2.4.19-pre5-mjc/arch/arm/config.in
--- linux/arch/arm/config.in	Fri Nov  9 16:58:02 2001
+++ linux-2.4.19-pre5-mjc/arch/arm/config.in	Sat Apr  6 08:35:14 2002
@@ -43,6 +43,7 @@
 	 FootBridge		CONFIG_ARCH_FOOTBRIDGE \
 	 Integrator		CONFIG_ARCH_INTEGRATOR \
 	 LinkUp-L7200		CONFIG_ARCH_L7200 \
+	 Motorola-MX1ADS        CONFIG_ARCH_MX1ADS \
 	 RiscPC			CONFIG_ARCH_RPC \
  	 SA1100-based		CONFIG_ARCH_SA1100 \
 	 Shark			CONFIG_ARCH_SHARK" RiscPC
@@ -85,7 +86,14 @@
          32MB   CONFIG_SA1100_CERF_FLASH_32MB" CerfFlash
    bool 'Cerf w/CPLD support (CerfPDA)' CONFIG_SA1100_CERF_CPLD
 fi
-dep_bool '  Compaq iPAQ H3600' CONFIG_SA1100_H3600 $CONFIG_ARCH_SA1100
+dep_bool '  Compaq iPAQ H3100' CONFIG_SA1100_H3100 $CONFIG_ARCH_SA1100
+dep_bool '  Compaq iPAQ H3600/H3700' CONFIG_SA1100_H3600 $CONFIG_ARCH_SA1100
+dep_bool '  Compaq iPAQ H3800' CONFIG_SA1100_H3800 $CONFIG_ARCH_SA1100
+if [ "$CONFIG_SA1100_H3100" = "y" -o "$CONFIG_SA1100_H3600" = "y" -o "$CONFIG_SA1100_H3800" = "y" ]; then
+  define_bool CONFIG_SA1100_H3XXX y
+else
+  define_bool CONFIG_SA1100_H3XXX n
+fi
 #dep_bool '  Empeg' CONFIG_SA1100_EMPEG $CONFIG_ARCH_SA1100
 dep_bool '  Extenex HandHeld Theater (Squashtail)' CONFIG_SA1100_EXTENEX1 $CONFIG_ARCH_SA1100
 if [ "$CONFIG_SA1100_EXTENEX1" = "y" ]; then
@@ -93,8 +101,10 @@
 fi
 dep_bool '  FlexaNet' CONFIG_SA1100_FLEXANET $CONFIG_ARCH_SA1100
 dep_bool '  FreeBird-v1.1' CONFIG_SA1100_FREEBIRD $CONFIG_ARCH_SA1100
+dep_bool '  Frodo' CONFIG_SA1100_FRODO $CONFIG_ARCH_SA1100
 dep_bool '  GraphicsClient Plus' CONFIG_SA1100_GRAPHICSCLIENT $CONFIG_ARCH_SA1100
 dep_bool '  GraphicsMaster' CONFIG_SA1100_GRAPHICSMASTER $CONFIG_ARCH_SA1100
+dep_bool '  HP Labs BadgePAD 4' CONFIG_SA1100_BADGE4 $CONFIG_ARCH_SA1100
 dep_bool '  HP Jornada 720' CONFIG_SA1100_JORNADA720 $CONFIG_ARCH_SA1100
 dep_bool '  HuW WebPanel' CONFIG_SA1100_HUW_WEBPANEL $CONFIG_ARCH_SA1100
 dep_bool '  Itsy' CONFIG_SA1100_ITSY $CONFIG_ARCH_SA1100
@@ -103,6 +113,8 @@
 dep_bool '  OmniMeter' CONFIG_SA1100_OMNIMETER $CONFIG_ARCH_SA1100
 dep_bool '  Pangolin' CONFIG_SA1100_PANGOLIN $CONFIG_ARCH_SA1100
 dep_bool '  PLEB' CONFIG_SA1100_PLEB $CONFIG_ARCH_SA1100
+dep_bool '  PT System 3' CONFIG_SA1100_PT_SYSTEM3 $CONFIG_ARCH_SA1100
+dep_bool '  Shannon' CONFIG_SA1100_SHANNON $CONFIG_ARCH_SA1100
 dep_bool '  Sherman' CONFIG_SA1100_SHERMAN $CONFIG_ARCH_SA1100
 dep_bool '  Simpad' CONFIG_SA1100_SIMPAD $CONFIG_ARCH_SA1100
 dep_bool '  Tulsa' CONFIG_SA1100_PFS168 $CONFIG_ARCH_SA1100
@@ -116,18 +128,28 @@
      "$CONFIG_SA1100_PFS168" = "y" -o \
      "$CONFIG_SA1100_XP860" = "y" -o \
      "$CONFIG_SA1100_GRAPHICSMASTER" = "y" -o \
-     "$CONFIG_SA1100_ADSBITSY" = "y" ]; then
+     "$CONFIG_SA1100_PT_SYSTEM3" = "y" -o \
+     "$CONFIG_SA1100_ADSBITSY" = "y" -o \
+     "$CONFIG_SA1100_BADGE4" = "y" ]; then
    define_bool CONFIG_SA1111 y
    define_int CONFIG_FORCE_MAX_ZONEORDER 9
 fi
+
+#dep_tristate 'SA1100 USB function support' CONFIG_SA1100_USB $CONFIG_ARCH_SA1100
+#dep_tristate '  Support for SA11x0 USB network link function' CONFIG_SA1100_USB_NETLINK $CONFIG_SA1100_USB
+#dep_tristate '  Support for SA11x0 USB character device emulation' CONFIG_SA1100_USB_CHAR $CONFIG_SA1100_USB
+
+dep_tristate 'Compaq iPAQ Handheld sleeve support' CONFIG_H3600_SLEEVE $CONFIG_SA1100_H3600
 endmenu
 
 mainmenu_option next_comment
 comment 'CLPS711X/EP721X Implementations'
+dep_bool '  AUTCPU12' CONFIG_ARCH_AUTCPU12 $CONFIG_ARCH_CLPS711X
 dep_bool '  CDB89712' CONFIG_ARCH_CDB89712 $CONFIG_ARCH_CLPS711X
 dep_bool '  CLEP7312' CONFIG_ARCH_CLEP7312 $CONFIG_ARCH_CLPS711X
 dep_bool '  EDB7211' CONFIG_ARCH_EDB7211 $CONFIG_ARCH_CLPS711X
 dep_bool '  P720T' CONFIG_ARCH_P720T $CONFIG_ARCH_CLPS711X
+dep_bool '  FORTUNET' CONFIG_ARCH_FORTUNET $CONFIG_ARCH_CLPS711X
 
 # XXX Maybe these should indicate register compatibility
 # instead of being mutually exclusive.
@@ -205,7 +227,7 @@
      "$CONFIG_ARCH_NEXUSPCI"   = "y" -o "$CONFIG_ARCH_CLPS711X" = "y" -o \
      "$CONFIG_ARCH_INTEGRATOR" = "y" -o "$CONFIG_ARCH_SA1100"   = "y" -o \
      "$CONFIG_ARCH_L7200"      = "y" -o "$CONFIG_ARCH_ANAKIN"	= "y" -o \
-     "$CONFIG_ARCH_CAMELOT"    = "y" ]; then
+     "$CONFIG_ARCH_CAMELOT"    = "y" -o "$CONFIG_ARCH_MX1ADS"   = "y" ]; then
    define_bool CONFIG_CPU_32v4 y
 else
    define_bool CONFIG_CPU_32v4 n
@@ -247,11 +269,17 @@
 fi
 
 # ARM920T
-if [ "$CONFIG_ARCH_INTEGRATOR" = "y" ]; then
-   bool 'Support ARM920T processor' CONFIG_CPU_ARM920T
+if [ "$CONFIG_ARCH_MX1ADS" = "y" ]; then
+   define_bool CONFIG_CPU_ARM920T y
 else
-   define_bool CONFIG_CPU_ARM920T n
+   if [ "$CONFIG_ARCH_INTEGRATOR" = "y" ]; then
+      bool 'Support ARM920T processor' CONFIG_CPU_ARM920T
+   else
+      define_bool CONFIG_CPU_ARM920T n
+   fi
 fi
+
+
 if [ "$CONFIG_CPU_ARM920T" = "y" ]; then
    bool '  ARM920T CPU idle' CONFIG_CPU_ARM920_CPU_IDLE
    bool '  ARM920T I-Cache on' CONFIG_CPU_ARM920_I_CACHE_ON
@@ -261,6 +289,21 @@
    fi
 fi
 
+# ARM922T
+if [ "$CONFIG_ARCH_CAMELOT" = "y" ]; then
+         define_bool CONFIG_CPU_ARM922T y
+else
+         define_bool CONFIG_CPU_ARM922T n
+fi
+if [ "$CONFIG_CPU_ARM922T" = "y" ]; then
+   bool '  ARM922T CPU idle' CONFIG_CPU_ARM922_CPU_IDLE
+   bool '  ARM922T I-Cache on' CONFIG_CPU_ARM922_I_CACHE_ON
+   bool '  ARM922T D-Cache on' CONFIG_CPU_ARM922_D_CACHE_ON
+   if [ "$CONFIG_CPU_ARM922_D_CACHE_ON" = "y" ] ; then
+      bool '  Force write through caches on ARM922T' CONFIG_CPU_ARM922_WRITETHROUGH
+   fi
+fi
+
 # ARM926T
 if [ "$CONFIG_ARCH_INTEGRATOR" = "y" ]; then
    bool 'Support ARM926T processor' CONFIG_CPU_ARM926T
@@ -404,7 +447,8 @@
      "$CONFIG_ARCH_P720T" = "y" -o	     \
      "$CONFIG_ARCH_CDB89712" = "y" -o	     \
      "$CONFIG_ARCH_CAMELOT" = "y" -o	     \
-     "$CONFIG_ARCH_ANAKIN" = "y" ]; then
+     "$CONFIG_ARCH_ANAKIN" = "y"  -o         \
+     "$CONFIG_ARCH_MX1ADS" = "y" ]; then
    string 'Default kernel command string' CONFIG_CMDLINE ""
 fi
 if [ "$CONFIG_ARCH_NETWINDER" = "y" -o  \
@@ -508,6 +552,7 @@
 if [ "$CONFIG_ISDN" != "n" ]; then
    source drivers/isdn/Config.in
 fi
+dep_bool 'Preemptible Kernel' CONFIG_PREEMPT $CONFIG_CPU_32
 endmenu
 
 #
@@ -554,7 +599,8 @@
         "$CONFIG_ARCH_TBOX" = "y" -o       \
         "$CONFIG_ARCH_CLPS7500" = "y" -o   \
         "$CONFIG_ARCH_P720T" = "y" -o      \
-        "$CONFIG_ARCH_ANAKIN" = "y" ]; then
+        "$CONFIG_ARCH_ANAKIN" = "y" -o      \
+	"$CONFIG_ARCH_MX1ADS" = "y" ]; then
       define_bool CONFIG_PC_KEYMAP y
    fi
    if [ "$CONFIG_ARCH_ACORN" != "y" -a "$CONFIG_ARCH_EBSA110" != "y" ]; then
@@ -594,15 +640,21 @@
 # Always compile kernel with framepointer (until 2.4 real comes out)
 # Bug reports aren't much use without this.
 bool 'Compile kernel without frame pointer' CONFIG_NO_FRAME_POINTER
-bool 'Verbose kernel error messages' CONFIG_DEBUG_ERRORS
 bool 'Verbose user fault messages' CONFIG_DEBUG_USER
 bool 'Include debugging information in kernel binary' CONFIG_DEBUG_INFO
-bool 'Debug memory allocations' CONFIG_DEBUG_SLAB
-bool 'Magic SysRq key' CONFIG_MAGIC_SYSRQ
-bool 'Spinlock debugging' CONFIG_DEBUG_SPINLOCK
 dep_bool 'Disable pgtable cache' CONFIG_NO_PGT_CACHE $CONFIG_CPU_26
+
+bool 'Kernel debugging' CONFIG_DEBUG_KERNEL
+dep_bool '  Debug memory allocations' CONFIG_DEBUG_SLAB $CONFIG_DEBUG_KERNEL
+dep_bool '  Magic SysRq key' CONFIG_MAGIC_SYSRQ $CONFIG_DEBUG_KERNEL
+dep_bool '  Spinlock debugging' CONFIG_DEBUG_SPINLOCK $CONFIG_DEBUG_KERNEL
+dep_bool '  Wait queue debugging' CONFIG_DEBUG_WAITQ $CONFIG_DEBUG_KERNEL
+dep_bool '  Verbose BUG() reporting (adds 70K)' CONFIG_DEBUG_BUGVERBOSE $CONFIG_DEBUG_KERNEL
+dep_bool '  Verbose kernel error messages' CONFIG_DEBUG_ERRORS $CONFIG_DEBUG_KERNEL
 # These options are only for real kernel hackers who want to get their hands dirty. 
-dep_bool 'Kernel low-level debugging functions' CONFIG_DEBUG_LL $CONFIG_EXPERIMENTAL
-dep_bool '  Kernel low-level debugging messages via footbridge serial port' CONFIG_DEBUG_DC21285_PORT $CONFIG_DEBUG_LL $CONFIG_FOOTBRIDGE
-dep_bool '  kernel low-level debugging messages via UART2' CONFIG_DEBUG_CLPS711X_UART2 $CONFIG_DEBUG_LL $CONFIG_ARCH_CLPS711X
+dep_bool '  Kernel low-level debugging functions' CONFIG_DEBUG_LL $CONFIG_DEBUG_KERNEL
+dep_bool '    Kernel low-level debugging messages via footbridge serial port' CONFIG_DEBUG_DC21285_PORT $CONFIG_DEBUG_LL $CONFIG_FOOTBRIDGE
+dep_bool '    Kernel low-level debugging messages via UART2' CONFIG_DEBUG_CLPS711X_UART2 $CONFIG_DEBUG_LL $CONFIG_ARCH_CLPS711X
 endmenu
+
+source lib/Config.in
diff -Nru linux/arch/arm/def-configs/badge4 linux-2.4.19-pre5-mjc/arch/arm/def-configs/badge4
--- linux/arch/arm/def-configs/badge4	Wed Dec 31 19:00:00 1969
+++ linux-2.4.19-pre5-mjc/arch/arm/def-configs/badge4	Sat Apr  6 08:25:57 2002
@@ -0,0 +1,1136 @@
+#
+# Automatically generated make config: don't edit
+#
+CONFIG_ARM=y
+# CONFIG_EISA is not set
+# CONFIG_SBUS is not set
+# CONFIG_MCA is not set
+CONFIG_UID16=y
+CONFIG_RWSEM_GENERIC_SPINLOCK=y
+# CONFIG_RWSEM_XCHGADD_ALGORITHM is not set
+# CONFIG_GENERIC_BUST_SPINLOCK is not set
+# CONFIG_GENERIC_ISA_DMA is not set
+
+#
+# Code maturity level options
+#
+CONFIG_EXPERIMENTAL=y
+# CONFIG_OBSOLETE is not set
+
+#
+# Loadable module support
+#
+CONFIG_MODULES=y
+CONFIG_MODVERSIONS=y
+CONFIG_KMOD=y
+
+#
+# System Type
+#
+# CONFIG_ARCH_ANAKIN is not set
+# CONFIG_ARCH_ARCA5K is not set
+# CONFIG_ARCH_CLPS7500 is not set
+# CONFIG_ARCH_CLPS711X is not set
+# CONFIG_ARCH_CO285 is not set
+# CONFIG_ARCH_EBSA110 is not set
+# CONFIG_ARCH_CAMELOT is not set
+# CONFIG_ARCH_FOOTBRIDGE is not set
+# CONFIG_ARCH_INTEGRATOR is not set
+# CONFIG_ARCH_L7200 is not set
+# CONFIG_ARCH_RPC is not set
+CONFIG_ARCH_SA1100=y
+# CONFIG_ARCH_SHARK is not set
+
+#
+# Archimedes/A5000 Implementations
+#
+
+#
+# Archimedes/A5000 Implementations (select only ONE)
+#
+# CONFIG_ARCH_ARC is not set
+# CONFIG_ARCH_A5K is not set
+
+#
+# Footbridge Implementations
+#
+# CONFIG_ARCH_CATS is not set
+# CONFIG_ARCH_PERSONAL_SERVER is not set
+# CONFIG_ARCH_EBSA285_ADDIN is not set
+# CONFIG_ARCH_EBSA285_HOST is not set
+# CONFIG_ARCH_NETWINDER is not set
+
+#
+# SA11x0 Implementations
+#
+# CONFIG_SA1100_ASSABET is not set
+# CONFIG_ASSABET_NEPONSET is not set
+# CONFIG_SA1100_ADSBITSY is not set
+# CONFIG_SA1100_BRUTUS is not set
+# CONFIG_SA1100_CERF is not set
+# CONFIG_SA1100_H3100 is not set
+# CONFIG_SA1100_H3600 is not set
+# CONFIG_SA1100_H3800 is not set
+# CONFIG_SA1100_H3XXX is not set
+# CONFIG_SA1100_EXTENEX1 is not set
+# CONFIG_SA1100_FLEXANET is not set
+# CONFIG_SA1100_FREEBIRD is not set
+# CONFIG_SA1100_GRAPHICSCLIENT is not set
+# CONFIG_SA1100_GRAPHICSMASTER is not set
+CONFIG_SA1100_BADGE4=y
+# CONFIG_SA1100_JORNADA720 is not set
+# CONFIG_SA1100_HUW_WEBPANEL is not set
+# CONFIG_SA1100_ITSY is not set
+# CONFIG_SA1100_LART is not set
+# CONFIG_SA1100_NANOENGINE is not set
+# CONFIG_SA1100_OMNIMETER is not set
+# CONFIG_SA1100_PANGOLIN is not set
+# CONFIG_SA1100_PLEB is not set
+# CONFIG_SA1100_PT_SYSTEM3 is not set
+# CONFIG_SA1100_SHANNON is not set
+# CONFIG_SA1100_SHERMAN is not set
+# CONFIG_SA1100_SIMPAD is not set
+# CONFIG_SA1100_PFS168 is not set
+# CONFIG_SA1100_VICTOR is not set
+# CONFIG_SA1100_XP860 is not set
+# CONFIG_SA1100_YOPY is not set
+CONFIG_SA1111=y
+CONFIG_FORCE_MAX_ZONEORDER=9
+# CONFIG_SA1100_USB is not set
+# CONFIG_SA1100_USB_NETLINK is not set
+# CONFIG_SA1100_USB_CHAR is not set
+# CONFIG_H3600_SLEEVE is not set
+
+#
+# CLPS711X/EP721X Implementations
+#
+# CONFIG_ARCH_AUTCPU12 is not set
+# CONFIG_ARCH_CDB89712 is not set
+# CONFIG_ARCH_CLEP7312 is not set
+# CONFIG_ARCH_EDB7211 is not set
+# CONFIG_ARCH_P720T is not set
+# CONFIG_ARCH_FORTUNET is not set
+# CONFIG_ARCH_EP7211 is not set
+# CONFIG_ARCH_EP7212 is not set
+# CONFIG_ARCH_ACORN is not set
+# CONFIG_FOOTBRIDGE is not set
+# CONFIG_FOOTBRIDGE_HOST is not set
+# CONFIG_FOOTBRIDGE_ADDIN is not set
+CONFIG_CPU_32=y
+# CONFIG_CPU_26 is not set
+
+#
+# Processor Type
+#
+# CONFIG_CPU_32v3 is not set
+CONFIG_CPU_32v4=y
+# CONFIG_CPU_ARM610 is not set
+# CONFIG_CPU_ARM710 is not set
+# CONFIG_CPU_ARM720T is not set
+# CONFIG_CPU_ARM920T is not set
+# CONFIG_CPU_ARM922T is not set
+# CONFIG_CPU_ARM926T is not set
+# CONFIG_CPU_ARM1020 is not set
+# CONFIG_CPU_SA110 is not set
+CONFIG_CPU_SA1100=y
+# CONFIG_ARM_THUMB is not set
+CONFIG_DISCONTIGMEM=y
+
+#
+# General setup
+#
+# CONFIG_PCI is not set
+CONFIG_ISA=y
+# CONFIG_ISA_DMA is not set
+CONFIG_CPU_FREQ=y
+CONFIG_HOTPLUG=y
+
+#
+# PCMCIA/CardBus support
+#
+CONFIG_PCMCIA=y
+CONFIG_PCMCIA_PROBE=y
+# CONFIG_I82092 is not set
+# CONFIG_I82365 is not set
+# CONFIG_TCIC is not set
+# CONFIG_PCMCIA_CLPS6700 is not set
+CONFIG_PCMCIA_SA1100=y
+CONFIG_NET=y
+# CONFIG_SYSVIPC is not set
+# CONFIG_BSD_PROCESS_ACCT is not set
+CONFIG_SYSCTL=y
+
+#
+# At least one math emulation must be selected
+#
+CONFIG_FPE_NWFPE=y
+CONFIG_FPE_FASTFPE=m
+CONFIG_KCORE_ELF=y
+# CONFIG_KCORE_AOUT is not set
+CONFIG_BINFMT_AOUT=m
+CONFIG_BINFMT_ELF=y
+CONFIG_BINFMT_MISC=m
+# CONFIG_PM is not set
+CONFIG_ARTHUR=m
+CONFIG_CMDLINE="init=/linuxrc root=/dev/mtdblock3"
+# CONFIG_LEDS is not set
+CONFIG_ALIGNMENT_TRAP=y
+
+#
+# Parallel port support
+#
+CONFIG_PARPORT=m
+# CONFIG_PARPORT_PC is not set
+# CONFIG_PARPORT_AMIGA is not set
+# CONFIG_PARPORT_MFC3 is not set
+# CONFIG_PARPORT_ATARI is not set
+# CONFIG_PARPORT_GSC is not set
+# CONFIG_PARPORT_SUNBPP is not set
+# CONFIG_PARPORT_OTHER is not set
+# CONFIG_PARPORT_1284 is not set
+
+#
+# Memory Technology Devices (MTD)
+#
+CONFIG_MTD=y
+CONFIG_MTD_DEBUG=y
+CONFIG_MTD_DEBUG_VERBOSE=0
+CONFIG_MTD_PARTITIONS=y
+# CONFIG_MTD_REDBOOT_PARTS is not set
+# CONFIG_MTD_BOOTLDR_PARTS is not set
+# CONFIG_MTD_AFS_PARTS is not set
+
+#
+# User Modules And Translation Layers
+#
+CONFIG_MTD_CHAR=y
+CONFIG_MTD_BLOCK=y
+# CONFIG_FTL is not set
+# CONFIG_NFTL is not set
+
+#
+# RAM/ROM/Flash chip drivers
+#
+CONFIG_MTD_CFI=y
+# CONFIG_MTD_JEDECPROBE is not set
+CONFIG_MTD_GEN_PROBE=y
+CONFIG_MTD_CFI_ADV_OPTIONS=y
+CONFIG_MTD_CFI_NOSWAP=y
+# CONFIG_MTD_CFI_BE_BYTE_SWAP is not set
+# CONFIG_MTD_CFI_LE_BYTE_SWAP is not set
+CONFIG_MTD_CFI_GEOMETRY=y
+# CONFIG_MTD_CFI_B1 is not set
+CONFIG_MTD_CFI_B2=y
+# CONFIG_MTD_CFI_B4 is not set
+CONFIG_MTD_CFI_I1=y
+# CONFIG_MTD_CFI_I2 is not set
+# CONFIG_MTD_CFI_I4 is not set
+CONFIG_MTD_CFI_INTELEXT=y
+# CONFIG_MTD_CFI_AMDSTD is not set
+CONFIG_MTD_RAM=y
+# CONFIG_MTD_ROM is not set
+# CONFIG_MTD_ABSENT is not set
+# CONFIG_MTD_OBSOLETE_CHIPS is not set
+# CONFIG_MTD_AMDSTD is not set
+# CONFIG_MTD_SHARP is not set
+# CONFIG_MTD_JEDEC is not set
+
+#
+# Mapping drivers for chip access
+#
+# CONFIG_MTD_PHYSMAP is not set
+# CONFIG_MTD_NORA is not set
+# CONFIG_MTD_ARM_INTEGRATOR is not set
+# CONFIG_MTD_CDB89712 is not set
+CONFIG_MTD_SA1100=y
+# CONFIG_MTD_DC21285 is not set
+# CONFIG_MTD_IQ80310 is not set
+# CONFIG_MTD_FORTUNET is not set
+# CONFIG_MTD_PCI is not set
+
+#
+# Self-contained MTD device drivers
+#
+# CONFIG_MTD_PMC551 is not set
+# CONFIG_MTD_SLRAM is not set
+# CONFIG_MTD_MTDRAM is not set
+# CONFIG_MTD_BLKMTD is not set
+
+#
+# Disk-On-Chip Device Drivers
+#
+# CONFIG_MTD_DOC1000 is not set
+# CONFIG_MTD_DOC2000 is not set
+# CONFIG_MTD_DOC2001 is not set
+# CONFIG_MTD_DOCPROBE is not set
+
+#
+# NAND Flash Device Drivers
+#
+# CONFIG_MTD_NAND is not set
+
+#
+# Plug and Play configuration
+#
+# CONFIG_PNP is not set
+# CONFIG_ISAPNP is not set
+
+#
+# Block devices
+#
+# CONFIG_BLK_DEV_FD is not set
+# CONFIG_BLK_DEV_XD is not set
+# CONFIG_PARIDE is not set
+# CONFIG_BLK_CPQ_DA is not set
+# CONFIG_BLK_CPQ_CISS_DA is not set
+# CONFIG_BLK_DEV_DAC960 is not set
+CONFIG_BLK_DEV_LOOP=y
+CONFIG_BLK_DEV_NBD=m
+# CONFIG_BLK_DEV_RAM is not set
+# CONFIG_BLK_DEV_INITRD is not set
+
+#
+# Multi-device support (RAID and LVM)
+#
+# CONFIG_MD is not set
+# CONFIG_BLK_DEV_MD is not set
+# CONFIG_MD_LINEAR is not set
+# CONFIG_MD_RAID0 is not set
+# CONFIG_MD_RAID1 is not set
+# CONFIG_MD_RAID5 is not set
+# CONFIG_MD_MULTIPATH is not set
+# CONFIG_BLK_DEV_LVM is not set
+
+#
+# Networking options
+#
+CONFIG_PACKET=y
+# CONFIG_PACKET_MMAP is not set
+# CONFIG_NETLINK_DEV is not set
+# CONFIG_NETFILTER is not set
+# CONFIG_FILTER is not set
+CONFIG_UNIX=y
+CONFIG_INET=y
+# CONFIG_IP_MULTICAST is not set
+# CONFIG_IP_ADVANCED_ROUTER is not set
+# CONFIG_IP_PNP is not set
+# CONFIG_NET_IPIP is not set
+# CONFIG_NET_IPGRE is not set
+# CONFIG_ARPD is not set
+# CONFIG_INET_ECN is not set
+# CONFIG_SYN_COOKIES is not set
+# CONFIG_IPV6 is not set
+# CONFIG_KHTTPD is not set
+# CONFIG_ATM is not set
+# CONFIG_VLAN_8021Q is not set
+
+#
+#
+#
+# CONFIG_IPX is not set
+# CONFIG_ATALK is not set
+# CONFIG_DECNET is not set
+# CONFIG_BRIDGE is not set
+# CONFIG_X25 is not set
+# CONFIG_LAPB is not set
+# CONFIG_LLC is not set
+# CONFIG_NET_DIVERT is not set
+# CONFIG_ECONET is not set
+# CONFIG_WAN_ROUTER is not set
+# CONFIG_NET_FASTROUTE is not set
+# CONFIG_NET_HW_FLOWCONTROL is not set
+
+#
+# QoS and/or fair queueing
+#
+# CONFIG_NET_SCHED is not set
+
+#
+# Network device support
+#
+CONFIG_NETDEVICES=y
+
+#
+# ARCnet devices
+#
+# CONFIG_ARCNET is not set
+# CONFIG_DUMMY is not set
+# CONFIG_BONDING is not set
+# CONFIG_EQUALIZER is not set
+# CONFIG_TUN is not set
+# CONFIG_ETHERTAP is not set
+
+#
+# Ethernet (10 or 100Mbit)
+#
+# CONFIG_NET_ETHERNET is not set
+
+#
+# Ethernet (1000 Mbit)
+#
+# CONFIG_ACENIC is not set
+# CONFIG_DL2K is not set
+# CONFIG_MYRI_SBUS is not set
+# CONFIG_NS83820 is not set
+# CONFIG_HAMACHI is not set
+# CONFIG_YELLOWFIN is not set
+# CONFIG_SK98LIN is not set
+# CONFIG_FDDI is not set
+# CONFIG_HIPPI is not set
+# CONFIG_PLIP is not set
+# CONFIG_PPP is not set
+# CONFIG_SLIP is not set
+
+#
+# Wireless LAN (non-hamradio)
+#
+CONFIG_NET_RADIO=y
+# CONFIG_STRIP is not set
+# CONFIG_WAVELAN is not set
+# CONFIG_ARLAN is not set
+# CONFIG_AIRONET4500 is not set
+# CONFIG_AIRONET4500_NONCS is not set
+# CONFIG_AIRONET4500_PROC is not set
+# CONFIG_AIRO is not set
+CONFIG_HERMES=y
+
+#
+# Wireless Pcmcia cards support
+#
+CONFIG_PCMCIA_HERMES=y
+CONFIG_AIRO_CS=m
+CONFIG_NET_WIRELESS=y
+
+#
+# Token Ring devices
+#
+# CONFIG_TR is not set
+# CONFIG_NET_FC is not set
+# CONFIG_RCPCI is not set
+# CONFIG_SHAPER is not set
+
+#
+# Wan interfaces
+#
+# CONFIG_WAN is not set
+
+#
+# PCMCIA network device support
+#
+CONFIG_NET_PCMCIA=y
+CONFIG_PCMCIA_3C589=y
+CONFIG_PCMCIA_3C574=m
+CONFIG_PCMCIA_FMVJ18X=m
+CONFIG_PCMCIA_PCNET=y
+CONFIG_PCMCIA_AXNET=m
+CONFIG_PCMCIA_NMCLAN=m
+CONFIG_PCMCIA_SMC91C92=m
+CONFIG_PCMCIA_XIRC2PS=m
+# CONFIG_ARCNET_COM20020_CS is not set
+# CONFIG_PCMCIA_IBMTR is not set
+CONFIG_NET_PCMCIA_RADIO=y
+CONFIG_PCMCIA_RAYCS=m
+CONFIG_PCMCIA_NETWAVE=m
+CONFIG_PCMCIA_WAVELAN=m
+# CONFIG_AIRONET4500_CS is not set
+
+#
+# Amateur Radio support
+#
+# CONFIG_HAMRADIO is not set
+
+#
+# IrDA (infrared) support
+#
+CONFIG_IRDA=y
+
+#
+# IrDA protocols
+#
+CONFIG_IRLAN=y
+# CONFIG_IRNET is not set
+CONFIG_IRCOMM=y
+CONFIG_IRDA_ULTRA=y
+
+#
+# IrDA options
+#
+# CONFIG_IRDA_CACHE_LAST_LSAP is not set
+# CONFIG_IRDA_FAST_RR is not set
+# CONFIG_IRDA_DEBUG is not set
+
+#
+# Infrared-port device drivers
+#
+
+#
+# SIR device drivers
+#
+# CONFIG_IRTTY_SIR is not set
+# CONFIG_IRPORT_SIR is not set
+
+#
+# Dongle support
+#
+# CONFIG_DONGLE is not set
+
+#
+# FIR device drivers
+#
+# CONFIG_USB_IRDA is not set
+# CONFIG_NSC_FIR is not set
+# CONFIG_WINBOND_FIR is not set
+# CONFIG_TOSHIBA_FIR is not set
+# CONFIG_SMC_IRCC_FIR is not set
+# CONFIG_ALI_FIR is not set
+# CONFIG_VLSI_FIR is not set
+CONFIG_SA1100_FIR=y
+
+#
+# ATA/IDE/MFM/RLL support
+#
+CONFIG_IDE=m
+
+#
+# IDE, ATA and ATAPI Block devices
+#
+CONFIG_BLK_DEV_IDE=m
+
+#
+# Please see Documentation/ide.txt for help/info on IDE drives
+#
+# CONFIG_BLK_DEV_HD_IDE is not set
+# CONFIG_BLK_DEV_HD is not set
+CONFIG_BLK_DEV_IDEDISK=m
+# CONFIG_IDEDISK_MULTI_MODE is not set
+# CONFIG_BLK_DEV_IDEDISK_VENDOR is not set
+# CONFIG_BLK_DEV_IDEDISK_FUJITSU is not set
+# CONFIG_BLK_DEV_IDEDISK_IBM is not set
+# CONFIG_BLK_DEV_IDEDISK_MAXTOR is not set
+# CONFIG_BLK_DEV_IDEDISK_QUANTUM is not set
+# CONFIG_BLK_DEV_IDEDISK_SEAGATE is not set
+# CONFIG_BLK_DEV_IDEDISK_WD is not set
+# CONFIG_BLK_DEV_COMMERIAL is not set
+# CONFIG_BLK_DEV_TIVO is not set
+# CONFIG_BLK_DEV_IDECS is not set
+CONFIG_BLK_DEV_IDECD=m
+# CONFIG_BLK_DEV_IDETAPE is not set
+CONFIG_BLK_DEV_IDEFLOPPY=m
+CONFIG_BLK_DEV_IDESCSI=m
+
+#
+# IDE chipset support/bugfixes
+#
+# CONFIG_BLK_DEV_CMD640 is not set
+# CONFIG_BLK_DEV_CMD640_ENHANCED is not set
+# CONFIG_BLK_DEV_ISAPNP is not set
+# CONFIG_IDE_CHIPSETS is not set
+# CONFIG_IDEDMA_AUTO is not set
+# CONFIG_DMA_NONPCI is not set
+# CONFIG_BLK_DEV_IDE_MODES is not set
+# CONFIG_BLK_DEV_ATARAID is not set
+# CONFIG_BLK_DEV_ATARAID_PDC is not set
+# CONFIG_BLK_DEV_ATARAID_HPT is not set
+
+#
+# SCSI support
+#
+CONFIG_SCSI=y
+
+#
+# SCSI support type (disk, tape, CD-ROM)
+#
+CONFIG_BLK_DEV_SD=y
+CONFIG_SD_EXTRA_DEVS=40
+CONFIG_CHR_DEV_ST=m
+# CONFIG_CHR_DEV_OSST is not set
+CONFIG_BLK_DEV_SR=m
+# CONFIG_BLK_DEV_SR_VENDOR is not set
+CONFIG_SR_EXTRA_DEVS=2
+CONFIG_CHR_DEV_SG=y
+
+#
+# Some SCSI devices (e.g. CD jukebox) support multiple LUNs
+#
+# CONFIG_SCSI_DEBUG_QUEUES is not set
+# CONFIG_SCSI_MULTI_LUN is not set
+# CONFIG_SCSI_CONSTANTS is not set
+# CONFIG_SCSI_LOGGING is not set
+
+#
+# SCSI low-level drivers
+#
+# CONFIG_SCSI_7000FASST is not set
+# CONFIG_SCSI_ACARD is not set
+# CONFIG_SCSI_AHA152X is not set
+# CONFIG_SCSI_AHA1542 is not set
+# CONFIG_SCSI_AHA1740 is not set
+# CONFIG_SCSI_AACRAID is not set
+# CONFIG_SCSI_AIC7XXX is not set
+# CONFIG_SCSI_AIC7XXX_OLD is not set
+# CONFIG_SCSI_DPT_I2O is not set
+# CONFIG_SCSI_ADVANSYS is not set
+# CONFIG_SCSI_IN2000 is not set
+# CONFIG_SCSI_AM53C974 is not set
+# CONFIG_SCSI_MEGARAID is not set
+# CONFIG_SCSI_BUSLOGIC is not set
+# CONFIG_SCSI_DMX3191D is not set
+# CONFIG_SCSI_DTC3280 is not set
+# CONFIG_SCSI_EATA is not set
+# CONFIG_SCSI_EATA_DMA is not set
+# CONFIG_SCSI_EATA_PIO is not set
+# CONFIG_SCSI_FUTURE_DOMAIN is not set
+# CONFIG_SCSI_GDTH is not set
+# CONFIG_SCSI_GENERIC_NCR5380 is not set
+# CONFIG_SCSI_INITIO is not set
+# CONFIG_SCSI_INIA100 is not set
+# CONFIG_SCSI_PPA is not set
+# CONFIG_SCSI_IMM is not set
+# CONFIG_SCSI_NCR53C406A is not set
+# CONFIG_SCSI_NCR53C7xx is not set
+# CONFIG_SCSI_PAS16 is not set
+# CONFIG_SCSI_PCI2000 is not set
+# CONFIG_SCSI_PCI2220I is not set
+# CONFIG_SCSI_PSI240I is not set
+# CONFIG_SCSI_QLOGIC_FAS is not set
+# CONFIG_SCSI_SIM710 is not set
+# CONFIG_SCSI_SYM53C416 is not set
+# CONFIG_SCSI_T128 is not set
+# CONFIG_SCSI_U14_34F is not set
+# CONFIG_SCSI_DEBUG is not set
+
+#
+# PCMCIA SCSI adapter support
+#
+# CONFIG_SCSI_PCMCIA is not set
+
+#
+# I2O device support
+#
+# CONFIG_I2O is not set
+# CONFIG_I2O_BLOCK is not set
+# CONFIG_I2O_LAN is not set
+# CONFIG_I2O_SCSI is not set
+# CONFIG_I2O_PROC is not set
+
+#
+# ISDN subsystem
+#
+# CONFIG_ISDN is not set
+
+#
+# Input core support
+#
+# CONFIG_INPUT is not set
+# CONFIG_INPUT_KEYBDEV is not set
+# CONFIG_INPUT_MOUSEDEV is not set
+# CONFIG_INPUT_JOYDEV is not set
+# CONFIG_INPUT_EVDEV is not set
+
+#
+# Character devices
+#
+# CONFIG_VT is not set
+# CONFIG_SERIAL is not set
+# CONFIG_SERIAL_EXTENDED is not set
+# CONFIG_SERIAL_NONSTANDARD is not set
+
+#
+# Serial drivers
+#
+# CONFIG_SERIAL_ANAKIN is not set
+# CONFIG_SERIAL_ANAKIN_CONSOLE is not set
+# CONFIG_SERIAL_AMBA is not set
+# CONFIG_SERIAL_AMBA_CONSOLE is not set
+# CONFIG_SERIAL_CLPS711X is not set
+# CONFIG_SERIAL_CLPS711X_CONSOLE is not set
+# CONFIG_SERIAL_21285 is not set
+# CONFIG_SERIAL_21285_OLD is not set
+# CONFIG_SERIAL_21285_CONSOLE is not set
+# CONFIG_SERIAL_UART00 is not set
+# CONFIG_SERIAL_UART00_CONSOLE is not set
+CONFIG_SERIAL_SA1100=y
+CONFIG_SERIAL_SA1100_CONSOLE=y
+CONFIG_SA1100_DEFAULT_BAUDRATE=115200
+# CONFIG_SERIAL_8250 is not set
+# CONFIG_SERIAL_8250_CONSOLE is not set
+# CONFIG_SERIAL_8250_EXTENDED is not set
+# CONFIG_SERIAL_8250_MANY_PORTS is not set
+# CONFIG_SERIAL_8250_SHARE_IRQ is not set
+# CONFIG_SERIAL_8250_DETECT_IRQ is not set
+# CONFIG_SERIAL_8250_MULTIPORT is not set
+# CONFIG_SERIAL_8250_HUB6 is not set
+CONFIG_SERIAL_CORE=y
+CONFIG_SERIAL_CORE_CONSOLE=y
+CONFIG_UNIX98_PTYS=y
+CONFIG_UNIX98_PTY_COUNT=256
+# CONFIG_PRINTER is not set
+# CONFIG_PPDEV is not set
+
+#
+# I2C support
+#
+CONFIG_I2C=m
+CONFIG_I2C_ALGOBIT=m
+# CONFIG_I2C_PHILIPSPAR is not set
+CONFIG_I2C_ELV=m
+CONFIG_I2C_VELLEMAN=m
+# CONFIG_I2C_BIT_SA1100_GPIO is not set
+CONFIG_I2C_ALGOPCF=m
+CONFIG_I2C_ELEKTOR=m
+CONFIG_I2C_CHARDEV=m
+CONFIG_I2C_PROC=m
+
+#
+# L3 serial bus support
+#
+CONFIG_L3=y
+# CONFIG_L3_ALGOBIT is not set
+# CONFIG_L3_BIT_SA1100_GPIO is not set
+
+#
+# Other L3 adapters
+#
+CONFIG_L3_SA1111=y
+# CONFIG_BIT_SA1100_GPIO is not set
+
+#
+# Mice
+#
+# CONFIG_BUSMOUSE is not set
+# CONFIG_MOUSE is not set
+
+#
+# Joysticks
+#
+# CONFIG_INPUT_GAMEPORT is not set
+
+#
+# Input core support is needed for gameports
+#
+
+#
+# Input core support is needed for joysticks
+#
+# CONFIG_QIC02_TAPE is not set
+
+#
+# Watchdog Cards
+#
+CONFIG_WATCHDOG=y
+# CONFIG_WATCHDOG_NOWAYOUT is not set
+CONFIG_SOFT_WATCHDOG=m
+# CONFIG_WDT is not set
+# CONFIG_WDTPCI is not set
+# CONFIG_PCWATCHDOG is not set
+# CONFIG_ACQUIRE_WDT is not set
+# CONFIG_ADVANTECH_WDT is not set
+# CONFIG_21285_WATCHDOG is not set
+# CONFIG_977_WATCHDOG is not set
+CONFIG_SA1100_WATCHDOG=m
+# CONFIG_EUROTECH_WDT is not set
+# CONFIG_IB700_WDT is not set
+# CONFIG_I810_TCO is not set
+# CONFIG_MIXCOMWD is not set
+# CONFIG_60XX_WDT is not set
+# CONFIG_W83877F_WDT is not set
+# CONFIG_MACHZ_WDT is not set
+# CONFIG_INTEL_RNG is not set
+# CONFIG_NVRAM is not set
+CONFIG_RTC=m
+CONFIG_SA1100_RTC=m
+# CONFIG_DTLK is not set
+# CONFIG_R3964 is not set
+# CONFIG_APPLICOM is not set
+
+#
+# Ftape, the floppy tape device driver
+#
+# CONFIG_FTAPE is not set
+# CONFIG_AGP is not set
+# CONFIG_DRM is not set
+
+#
+# PCMCIA character devices
+#
+
+#
+# Multimedia devices
+#
+CONFIG_VIDEO_DEV=y
+
+#
+# Video For Linux
+#
+CONFIG_VIDEO_PROC_FS=y
+# CONFIG_I2C_PARPORT is not set
+
+#
+# Video Adapters
+#
+# CONFIG_VIDEO_BT848 is not set
+# CONFIG_VIDEO_PMS is not set
+# CONFIG_VIDEO_BWQCAM is not set
+# CONFIG_VIDEO_CQCAM is not set
+# CONFIG_VIDEO_CPIA is not set
+# CONFIG_VIDEO_SAA5249 is not set
+# CONFIG_TUNER_3036 is not set
+# CONFIG_VIDEO_STRADIS is not set
+# CONFIG_VIDEO_ZORAN is not set
+# CONFIG_VIDEO_ZORAN_BUZ is not set
+# CONFIG_VIDEO_ZORAN_DC10 is not set
+# CONFIG_VIDEO_ZORAN_LML33 is not set
+# CONFIG_VIDEO_ZR36120 is not set
+# CONFIG_VIDEO_MEYE is not set
+# CONFIG_VIDEO_CYBERPRO is not set
+
+#
+# Radio Adapters
+#
+# CONFIG_RADIO_CADET is not set
+# CONFIG_RADIO_RTRACK is not set
+# CONFIG_RADIO_RTRACK2 is not set
+# CONFIG_RADIO_AZTECH is not set
+# CONFIG_RADIO_GEMTEK is not set
+# CONFIG_RADIO_GEMTEK_PCI is not set
+# CONFIG_RADIO_MAXIRADIO is not set
+# CONFIG_RADIO_MAESTRO is not set
+# CONFIG_RADIO_MIROPCM20 is not set
+# CONFIG_RADIO_MIROPCM20_RDS is not set
+# CONFIG_RADIO_SF16FMI is not set
+# CONFIG_RADIO_TERRATEC is not set
+# CONFIG_RADIO_TRUST is not set
+# CONFIG_RADIO_TYPHOON is not set
+# CONFIG_RADIO_ZOLTRIX is not set
+
+#
+# File systems
+#
+# CONFIG_QUOTA is not set
+# CONFIG_AUTOFS_FS is not set
+# CONFIG_AUTOFS4_FS is not set
+# CONFIG_REISERFS_FS is not set
+# CONFIG_REISERFS_CHECK is not set
+# CONFIG_REISERFS_PROC_INFO is not set
+# CONFIG_ADFS_FS is not set
+# CONFIG_ADFS_FS_RW is not set
+# CONFIG_AFFS_FS is not set
+# CONFIG_HFS_FS is not set
+# CONFIG_BFS_FS is not set
+CONFIG_EXT3_FS=m
+CONFIG_JBD=m
+# CONFIG_JBD_DEBUG is not set
+CONFIG_FAT_FS=y
+CONFIG_MSDOS_FS=y
+# CONFIG_UMSDOS_FS is not set
+CONFIG_VFAT_FS=m
+# CONFIG_EFS_FS is not set
+# CONFIG_JFFS_FS is not set
+CONFIG_JFFS2_FS=y
+CONFIG_JFFS2_FS_DEBUG=0
+CONFIG_CRAMFS=m
+CONFIG_TMPFS=y
+# CONFIG_RAMFS is not set
+# CONFIG_ISO9660_FS is not set
+# CONFIG_JOLIET is not set
+# CONFIG_ZISOFS is not set
+CONFIG_MINIX_FS=m
+# CONFIG_VXFS_FS is not set
+# CONFIG_NTFS_FS is not set
+# CONFIG_NTFS_RW is not set
+# CONFIG_HPFS_FS is not set
+CONFIG_PROC_FS=y
+CONFIG_DEVFS_FS=y
+CONFIG_DEVFS_MOUNT=y
+# CONFIG_DEVFS_DEBUG is not set
+# CONFIG_DEVPTS_FS is not set
+# CONFIG_QNX4FS_FS is not set
+# CONFIG_QNX4FS_RW is not set
+# CONFIG_ROMFS_FS is not set
+CONFIG_EXT2_FS=m
+# CONFIG_SYSV_FS is not set
+# CONFIG_UDF_FS is not set
+# CONFIG_UDF_RW is not set
+# CONFIG_UFS_FS is not set
+# CONFIG_UFS_FS_WRITE is not set
+
+#
+# Network File Systems
+#
+# CONFIG_CODA_FS is not set
+# CONFIG_INTERMEZZO_FS is not set
+CONFIG_NFS_FS=m
+CONFIG_NFS_V3=y
+# CONFIG_ROOT_NFS is not set
+# CONFIG_NFSD is not set
+# CONFIG_NFSD_V3 is not set
+CONFIG_SUNRPC=m
+CONFIG_LOCKD=m
+CONFIG_LOCKD_V4=y
+CONFIG_SMB_FS=m
+# CONFIG_SMB_NLS_DEFAULT is not set
+# CONFIG_NCP_FS is not set
+# CONFIG_NCPFS_PACKET_SIGNING is not set
+# CONFIG_NCPFS_IOCTL_LOCKING is not set
+# CONFIG_NCPFS_STRONG is not set
+# CONFIG_NCPFS_NFS_NS is not set
+# CONFIG_NCPFS_OS2_NS is not set
+# CONFIG_NCPFS_SMALLDOS is not set
+# CONFIG_NCPFS_NLS is not set
+# CONFIG_NCPFS_EXTRAS is not set
+# CONFIG_ZISOFS_FS is not set
+CONFIG_ZLIB_FS_INFLATE=m
+
+#
+# Partition Types
+#
+CONFIG_PARTITION_ADVANCED=y
+# CONFIG_ACORN_PARTITION is not set
+# CONFIG_OSF_PARTITION is not set
+# CONFIG_AMIGA_PARTITION is not set
+# CONFIG_ATARI_PARTITION is not set
+# CONFIG_MAC_PARTITION is not set
+CONFIG_MSDOS_PARTITION=y
+# CONFIG_BSD_DISKLABEL is not set
+# CONFIG_MINIX_SUBPARTITION is not set
+# CONFIG_SOLARIS_X86_PARTITION is not set
+# CONFIG_UNIXWARE_DISKLABEL is not set
+# CONFIG_LDM_PARTITION is not set
+# CONFIG_SGI_PARTITION is not set
+# CONFIG_ULTRIX_PARTITION is not set
+# CONFIG_SUN_PARTITION is not set
+CONFIG_SMB_NLS=y
+CONFIG_NLS=y
+
+#
+# Native Language Support
+#
+CONFIG_NLS_DEFAULT="iso8859-1"
+# CONFIG_NLS_CODEPAGE_437 is not set
+# CONFIG_NLS_CODEPAGE_737 is not set
+# CONFIG_NLS_CODEPAGE_775 is not set
+# CONFIG_NLS_CODEPAGE_850 is not set
+# CONFIG_NLS_CODEPAGE_852 is not set
+# CONFIG_NLS_CODEPAGE_855 is not set
+# CONFIG_NLS_CODEPAGE_857 is not set
+# CONFIG_NLS_CODEPAGE_860 is not set
+# CONFIG_NLS_CODEPAGE_861 is not set
+# CONFIG_NLS_CODEPAGE_862 is not set
+# CONFIG_NLS_CODEPAGE_863 is not set
+# CONFIG_NLS_CODEPAGE_864 is not set
+# CONFIG_NLS_CODEPAGE_865 is not set
+# CONFIG_NLS_CODEPAGE_866 is not set
+# CONFIG_NLS_CODEPAGE_869 is not set
+# CONFIG_NLS_CODEPAGE_936 is not set
+# CONFIG_NLS_CODEPAGE_950 is not set
+# CONFIG_NLS_CODEPAGE_932 is not set
+# CONFIG_NLS_CODEPAGE_949 is not set
+# CONFIG_NLS_CODEPAGE_874 is not set
+# CONFIG_NLS_ISO8859_8 is not set
+# CONFIG_NLS_CODEPAGE_1250 is not set
+# CONFIG_NLS_CODEPAGE_1251 is not set
+# CONFIG_NLS_ISO8859_1 is not set
+# CONFIG_NLS_ISO8859_2 is not set
+# CONFIG_NLS_ISO8859_3 is not set
+# CONFIG_NLS_ISO8859_4 is not set
+# CONFIG_NLS_ISO8859_5 is not set
+# CONFIG_NLS_ISO8859_6 is not set
+# CONFIG_NLS_ISO8859_7 is not set
+# CONFIG_NLS_ISO8859_9 is not set
+# CONFIG_NLS_ISO8859_13 is not set
+# CONFIG_NLS_ISO8859_14 is not set
+# CONFIG_NLS_ISO8859_15 is not set
+# CONFIG_NLS_KOI8_R is not set
+# CONFIG_NLS_KOI8_U is not set
+# CONFIG_NLS_UTF8 is not set
+
+#
+# Sound
+#
+CONFIG_SOUND=y
+# CONFIG_SOUND_BT878 is not set
+# CONFIG_SOUND_CMPCI is not set
+# CONFIG_SOUND_EMU10K1 is not set
+# CONFIG_MIDI_EMU10K1 is not set
+# CONFIG_SOUND_FUSION is not set
+# CONFIG_SOUND_CS4281 is not set
+# CONFIG_SOUND_ES1370 is not set
+# CONFIG_SOUND_ES1371 is not set
+# CONFIG_SOUND_ESSSOLO1 is not set
+# CONFIG_SOUND_MAESTRO is not set
+# CONFIG_SOUND_MAESTRO3 is not set
+# CONFIG_SOUND_ICH is not set
+# CONFIG_SOUND_RME96XX is not set
+# CONFIG_SOUND_SONICVIBES is not set
+# CONFIG_SOUND_TRIDENT is not set
+# CONFIG_SOUND_MSNDCLAS is not set
+# CONFIG_SOUND_MSNDPIN is not set
+# CONFIG_SOUND_VIA82CXXX is not set
+# CONFIG_MIDI_VIA82CXXX is not set
+CONFIG_SOUND_SA1100=y
+CONFIG_SOUND_UDA1341=y
+# CONFIG_SOUND_ASSABET_UDA1341 is not set
+# CONFIG_SOUND_H3600_UDA1341 is not set
+# CONFIG_SOUND_PANGOLIN_UDA1341 is not set
+CONFIG_SOUND_SA1111_UDA1341=y
+# CONFIG_SOUND_SA1100SSP is not set
+# CONFIG_SOUND_OSS is not set
+# CONFIG_SOUND_WAVEARTIST is not set
+# CONFIG_SOUND_TVMIXER is not set
+
+#
+# Multimedia Capabilities Port drivers
+#
+CONFIG_MCP=y
+CONFIG_MCP_SA1100=y
+# CONFIG_MCP_UCB1200 is not set
+# CONFIG_MCP_UCB1200_AUDIO is not set
+# CONFIG_MCP_UCB1200_TS is not set
+
+#
+# USB support
+#
+CONFIG_USB=y
+CONFIG_USB_DEBUG=y
+
+#
+# Miscellaneous USB options
+#
+CONFIG_USB_DEVICEFS=y
+# CONFIG_USB_BANDWIDTH is not set
+# CONFIG_USB_LONG_TIMEOUT is not set
+
+#
+# USB Controllers
+#
+# CONFIG_USB_UHCI is not set
+# CONFIG_USB_UHCI_ALT is not set
+# CONFIG_USB_OHCI is not set
+CONFIG_USB_OHCI_SA1111=y
+
+#
+# USB Device Class drivers
+#
+CONFIG_USB_AUDIO=y
+CONFIG_USB_BLUETOOTH=m
+CONFIG_USB_STORAGE=y
+CONFIG_USB_STORAGE_DEBUG=y
+# CONFIG_USB_STORAGE_DATAFAB is not set
+# CONFIG_USB_STORAGE_FREECOM is not set
+# CONFIG_USB_STORAGE_ISD200 is not set
+# CONFIG_USB_STORAGE_DPCM is not set
+# CONFIG_USB_STORAGE_HP8200e is not set
+# CONFIG_USB_STORAGE_SDDR09 is not set
+# CONFIG_USB_STORAGE_JUMPSHOT is not set
+CONFIG_USB_ACM=m
+CONFIG_USB_PRINTER=m
+
+#
+# USB Human Interface Devices (HID)
+#
+
+#
+#   Input core support is needed for USB HID
+#
+
+#
+# USB Imaging devices
+#
+CONFIG_USB_DC2XX=m
+CONFIG_USB_MDC800=m
+CONFIG_USB_SCANNER=m
+CONFIG_USB_MICROTEK=m
+CONFIG_USB_HPUSBSCSI=m
+
+#
+# USB Multimedia devices
+#
+CONFIG_USB_IBMCAM=m
+CONFIG_USB_OV511=m
+CONFIG_USB_PWC=m
+CONFIG_USB_SE401=m
+# CONFIG_USB_STV680 is not set
+CONFIG_USB_VICAM=m
+CONFIG_USB_DSBR=m
+CONFIG_USB_DABUSB=m
+
+#
+# USB Network adaptors
+#
+CONFIG_USB_PEGASUS=m
+CONFIG_USB_KAWETH=m
+CONFIG_USB_CATC=m
+CONFIG_USB_CDCETHER=m
+CONFIG_USB_USBNET=m
+
+#
+# USB port drivers
+#
+CONFIG_USB_USS720=m
+
+#
+# USB Serial Converter support
+#
+CONFIG_USB_SERIAL=m
+CONFIG_USB_SERIAL_GENERIC=y
+CONFIG_USB_SERIAL_BELKIN=m
+CONFIG_USB_SERIAL_WHITEHEAT=m
+CONFIG_USB_SERIAL_DIGI_ACCELEPORT=m
+CONFIG_USB_SERIAL_EMPEG=m
+CONFIG_USB_SERIAL_FTDI_SIO=m
+CONFIG_USB_SERIAL_VISOR=m
+# CONFIG_USB_SERIAL_IPAQ is not set
+CONFIG_USB_SERIAL_IR=m
+CONFIG_USB_SERIAL_EDGEPORT=m
+CONFIG_USB_SERIAL_KEYSPAN_PDA=m
+CONFIG_USB_SERIAL_KEYSPAN=m
+# CONFIG_USB_SERIAL_KEYSPAN_USA28 is not set
+# CONFIG_USB_SERIAL_KEYSPAN_USA28X is not set
+# CONFIG_USB_SERIAL_KEYSPAN_USA28XA is not set
+# CONFIG_USB_SERIAL_KEYSPAN_USA28XB is not set
+# CONFIG_USB_SERIAL_KEYSPAN_USA19 is not set
+# CONFIG_USB_SERIAL_KEYSPAN_USA18X is not set
+# CONFIG_USB_SERIAL_KEYSPAN_USA19W is not set
+# CONFIG_USB_SERIAL_KEYSPAN_USA49W is not set
+CONFIG_USB_SERIAL_MCT_U232=m
+# CONFIG_USB_SERIAL_KLSI is not set
+CONFIG_USB_SERIAL_PL2303=m
+CONFIG_USB_SERIAL_CYBERJACK=m
+CONFIG_USB_SERIAL_XIRCOM=m
+CONFIG_USB_SERIAL_OMNINET=m
+
+#
+# USB Miscellaneous drivers
+#
+CONFIG_USB_RIO500=m
+
+#
+# Bluetooth support
+#
+CONFIG_BLUEZ=m
+CONFIG_BLUEZ_L2CAP=m
+
+#
+# Bluetooth device drivers
+#
+CONFIG_BLUEZ_HCIUSB=m
+CONFIG_BLUEZ_HCIUART=m
+CONFIG_BLUEZ_HCIVHCI=m
+
+#
+# Kernel hacking
+#
+# CONFIG_NO_FRAME_POINTER is not set
+CONFIG_DEBUG_USER=y
+CONFIG_DEBUG_INFO=y
+# CONFIG_NO_PGT_CACHE is not set
+CONFIG_DEBUG_KERNEL=y
+# CONFIG_DEBUG_SLAB is not set
+CONFIG_MAGIC_SYSRQ=y
+# CONFIG_DEBUG_SPINLOCK is not set
+# CONFIG_DEBUG_WAITQ is not set
+CONFIG_DEBUG_BUGVERBOSE=y
+CONFIG_DEBUG_ERRORS=y
+CONFIG_DEBUG_LL=y
+# CONFIG_DEBUG_DC21285_PORT is not set
+# CONFIG_DEBUG_CLPS711X_UART2 is not set
diff -Nru linux/arch/arm/def-configs/flexanet linux-2.4.19-pre5-mjc/arch/arm/def-configs/flexanet
--- linux/arch/arm/def-configs/flexanet	Sun Aug 12 14:13:59 2001
+++ linux-2.4.19-pre5-mjc/arch/arm/def-configs/flexanet	Sat Apr  6 08:25:57 2002
@@ -8,6 +8,8 @@
 CONFIG_UID16=y
 CONFIG_RWSEM_GENERIC_SPINLOCK=y
 # CONFIG_RWSEM_XCHGADD_ALGORITHM is not set
+# CONFIG_GENERIC_BUST_SPINLOCK is not set
+# CONFIG_GENERIC_ISA_DMA is not set
 
 #
 # Code maturity level options
@@ -25,17 +27,19 @@
 #
 # System Type
 #
+# CONFIG_ARCH_ANAKIN is not set
 # CONFIG_ARCH_ARCA5K is not set
 # CONFIG_ARCH_CLPS7500 is not set
+# CONFIG_ARCH_CLPS711X is not set
 # CONFIG_ARCH_CO285 is not set
 # CONFIG_ARCH_EBSA110 is not set
-# CONFIG_ARCH_L7200 is not set
+# CONFIG_ARCH_CAMELOT is not set
 # CONFIG_ARCH_FOOTBRIDGE is not set
 # CONFIG_ARCH_INTEGRATOR is not set
+# CONFIG_ARCH_L7200 is not set
 # CONFIG_ARCH_RPC is not set
 CONFIG_ARCH_SA1100=y
-# CONFIG_ARCH_CLPS711X is not set
-# CONFIG_ARCH_ANAKIN is not set
+# CONFIG_ARCH_SHARK is not set
 
 #
 # Archimedes/A5000 Implementations
@@ -44,22 +48,32 @@
 #
 # Archimedes/A5000 Implementations (select only ONE)
 #
+# CONFIG_ARCH_ARC is not set
+# CONFIG_ARCH_A5K is not set
 
 #
 # Footbridge Implementations
 #
+# CONFIG_ARCH_CATS is not set
+# CONFIG_ARCH_PERSONAL_SERVER is not set
+# CONFIG_ARCH_EBSA285_ADDIN is not set
+# CONFIG_ARCH_EBSA285_HOST is not set
+# CONFIG_ARCH_NETWINDER is not set
 
 #
 # SA11x0 Implementations
 #
 # CONFIG_SA1100_ASSABET is not set
+# CONFIG_ASSABET_NEPONSET is not set
+# CONFIG_SA1100_ADSBITSY is not set
 # CONFIG_SA1100_BRUTUS is not set
 # CONFIG_SA1100_CERF is not set
-# CONFIG_SA1100_BITSY is not set
+# CONFIG_SA1100_H3600 is not set
 # CONFIG_SA1100_EXTENEX1 is not set
 CONFIG_SA1100_FLEXANET=y
 # CONFIG_SA1100_FREEBIRD is not set
 # CONFIG_SA1100_GRAPHICSCLIENT is not set
+# CONFIG_SA1100_GRAPHICSMASTER is not set
 # CONFIG_SA1100_JORNADA720 is not set
 # CONFIG_SA1100_HUW_WEBPANEL is not set
 # CONFIG_SA1100_ITSY is not set
@@ -68,7 +82,9 @@
 # CONFIG_SA1100_OMNIMETER is not set
 # CONFIG_SA1100_PANGOLIN is not set
 # CONFIG_SA1100_PLEB is not set
+# CONFIG_SA1100_SHANNON is not set
 # CONFIG_SA1100_SHERMAN is not set
+# CONFIG_SA1100_SIMPAD is not set
 # CONFIG_SA1100_PFS168 is not set
 # CONFIG_SA1100_VICTOR is not set
 # CONFIG_SA1100_XP860 is not set
@@ -76,11 +92,17 @@
 CONFIG_SA1100_USB=y
 CONFIG_SA1100_USB_NETLINK=y
 # CONFIG_SA1100_USB_CHAR is not set
-# CONFIG_SA1100_FREQUENCY_SCALE is not set
 
 #
 # CLPS711X/EP721X Implementations
 #
+# CONFIG_ARCH_AUTCPU12 is not set
+# CONFIG_ARCH_CDB89712 is not set
+# CONFIG_ARCH_CLEP7312 is not set
+# CONFIG_ARCH_EDB7211 is not set
+# CONFIG_ARCH_P720T is not set
+# CONFIG_ARCH_EP7211 is not set
+# CONFIG_ARCH_EP7212 is not set
 # CONFIG_ARCH_ACORN is not set
 # CONFIG_FOOTBRIDGE is not set
 # CONFIG_FOOTBRIDGE_HOST is not set
@@ -97,32 +119,40 @@
 # CONFIG_CPU_ARM710 is not set
 # CONFIG_CPU_ARM720T is not set
 # CONFIG_CPU_ARM920T is not set
+# CONFIG_CPU_ARM922T is not set
+# CONFIG_CPU_ARM926T is not set
 # CONFIG_CPU_ARM1020 is not set
 # CONFIG_CPU_SA110 is not set
 CONFIG_CPU_SA1100=y
+# CONFIG_ARM_THUMB is not set
 CONFIG_DISCONTIGMEM=y
-# CONFIG_CPU_BIG_ENDIAN is not set
 
 #
 # General setup
 #
 # CONFIG_PCI is not set
-# CONFIG_ISA is not set
+CONFIG_ISA=y
 # CONFIG_ISA_DMA is not set
-# CONFIG_CPU_CLOCK is not set
+CONFIG_CPU_FREQ=y
 CONFIG_HOTPLUG=y
 
 #
 # PCMCIA/CardBus support
 #
 CONFIG_PCMCIA=y
+# CONFIG_I82092 is not set
 # CONFIG_I82365 is not set
 # CONFIG_TCIC is not set
+# CONFIG_PCMCIA_CLPS6700 is not set
 CONFIG_PCMCIA_SA1100=y
 CONFIG_NET=y
 CONFIG_SYSVIPC=y
 # CONFIG_BSD_PROCESS_ACCT is not set
 CONFIG_SYSCTL=y
+
+#
+# At least one math emulation must be selected
+#
 CONFIG_FPE_NWFPE=y
 CONFIG_FPE_FASTFPE=y
 CONFIG_KCORE_ELF=y
@@ -130,7 +160,7 @@
 # CONFIG_BINFMT_AOUT is not set
 CONFIG_BINFMT_ELF=y
 # CONFIG_BINFMT_MISC is not set
-# CONFIG_PM is not set
+CONFIG_PM=y
 # CONFIG_ARTHUR is not set
 CONFIG_CMDLINE=""
 CONFIG_LEDS=y
@@ -149,7 +179,7 @@
 CONFIG_MTD=y
 # CONFIG_MTD_DEBUG is not set
 CONFIG_MTD_PARTITIONS=y
-# CONFIG_MTD_REDBOOT_PARTS is not set
+CONFIG_MTD_REDBOOT_PARTS=y
 # CONFIG_MTD_BOOTLDR_PARTS is not set
 # CONFIG_MTD_AFS_PARTS is not set
 
@@ -165,43 +195,42 @@
 # RAM/ROM/Flash chip drivers
 #
 CONFIG_MTD_CFI=y
-# CONFIG_MTD_CFI_VIRTUAL_ER is not set
+# CONFIG_MTD_JEDECPROBE is not set
+CONFIG_MTD_GEN_PROBE=y
 CONFIG_MTD_CFI_ADV_OPTIONS=y
 CONFIG_MTD_CFI_NOSWAP=y
 # CONFIG_MTD_CFI_BE_BYTE_SWAP is not set
 # CONFIG_MTD_CFI_LE_BYTE_SWAP is not set
-# CONFIG_MTD_CFI_LART_BIT_SWAP is not set
 # CONFIG_MTD_CFI_GEOMETRY is not set
 CONFIG_MTD_CFI_INTELEXT=y
 # CONFIG_MTD_CFI_AMDSTD is not set
-# CONFIG_MTD_AMDSTD is not set
-# CONFIG_MTD_SHARP is not set
 # CONFIG_MTD_RAM is not set
 # CONFIG_MTD_ROM is not set
+# CONFIG_MTD_ABSENT is not set
+# CONFIG_MTD_OBSOLETE_CHIPS is not set
+# CONFIG_MTD_AMDSTD is not set
+# CONFIG_MTD_SHARP is not set
 # CONFIG_MTD_JEDEC is not set
 
 #
 # Mapping drivers for chip access
 #
 # CONFIG_MTD_PHYSMAP is not set
-# CONFIG_MTD_SUN_UFLASH is not set
 # CONFIG_MTD_NORA is not set
-# CONFIG_MTD_PNC2000 is not set
-# CONFIG_MTD_RPXLITE is not set
-# CONFIG_MTD_SC520CDP is not set
-# CONFIG_MTD_NETSC520 is not set
-# CONFIG_MTD_SBC_GXX is not set
-# CONFIG_MTD_ELAN_104NC is not set
+# CONFIG_MTD_ARM_INTEGRATOR is not set
+# CONFIG_MTD_CDB89712 is not set
 CONFIG_MTD_SA1100=y
+# CONFIG_MTD_DC21285 is not set
 # CONFIG_MTD_IQ80310 is not set
-# CONFIG_MTD_CFI_FLAGADM is not set
-# CONFIG_MTD_ARMFLASH is not set
+# CONFIG_MTD_PCI is not set
 
 #
 # Self-contained MTD device drivers
 #
+# CONFIG_MTD_PMC551 is not set
 # CONFIG_MTD_SLRAM is not set
 # CONFIG_MTD_MTDRAM is not set
+# CONFIG_MTD_BLKMTD is not set
 
 #
 # Disk-On-Chip Device Drivers
@@ -220,11 +249,17 @@
 # Plug and Play configuration
 #
 # CONFIG_PNP is not set
+# CONFIG_ISAPNP is not set
 
 #
 # Block devices
 #
 # CONFIG_BLK_DEV_FD is not set
+# CONFIG_BLK_DEV_XD is not set
+# CONFIG_PARIDE is not set
+# CONFIG_BLK_CPQ_DA is not set
+# CONFIG_BLK_CPQ_CISS_DA is not set
+# CONFIG_BLK_DEV_DAC960 is not set
 CONFIG_BLK_DEV_LOOP=y
 # CONFIG_BLK_DEV_NBD is not set
 CONFIG_BLK_DEV_RAM=y
@@ -235,6 +270,13 @@
 # Multi-device support (RAID and LVM)
 #
 # CONFIG_MD is not set
+# CONFIG_BLK_DEV_MD is not set
+# CONFIG_MD_LINEAR is not set
+# CONFIG_MD_RAID0 is not set
+# CONFIG_MD_RAID1 is not set
+# CONFIG_MD_RAID5 is not set
+# CONFIG_MD_MULTIPATH is not set
+# CONFIG_BLK_DEV_LVM is not set
 
 #
 # Networking options
@@ -258,6 +300,7 @@
 # CONFIG_IPV6 is not set
 # CONFIG_KHTTPD is not set
 # CONFIG_ATM is not set
+# CONFIG_VLAN_8021Q is not set
 
 #
 #
@@ -293,42 +336,75 @@
 # CONFIG_BONDING is not set
 # CONFIG_EQUALIZER is not set
 # CONFIG_TUN is not set
-# CONFIG_NET_SB1000 is not set
 
 #
 # Ethernet (10 or 100Mbit)
 #
 CONFIG_NET_ETHERNET=y
+# CONFIG_ARM_AM79C961A is not set
+# CONFIG_SUNLANCE is not set
+# CONFIG_SUNBMAC is not set
+# CONFIG_SUNQE is not set
+# CONFIG_SUNLANCE is not set
+# CONFIG_SUNGEM is not set
 # CONFIG_NET_VENDOR_3COM is not set
+# CONFIG_LANCE is not set
 CONFIG_NET_VENDOR_SMC=y
 # CONFIG_WD80x3 is not set
+# CONFIG_ULTRAMCA is not set
 # CONFIG_ULTRA is not set
+# CONFIG_ULTRA32 is not set
 CONFIG_SMC9194=y
 # CONFIG_NET_VENDOR_RACAL is not set
 # CONFIG_AT1700 is not set
 # CONFIG_DEPCA is not set
+# CONFIG_HP100 is not set
+# CONFIG_NET_ISA is not set
 # CONFIG_NET_PCI is not set
 # CONFIG_NET_POCKET is not set
 
 #
 # Ethernet (1000 Mbit)
 #
-# CONFIG_ACENIC_OMIT_TIGON_I is not set
+# CONFIG_ACENIC is not set
+# CONFIG_DL2K is not set
+# CONFIG_MYRI_SBUS is not set
+# CONFIG_NS83820 is not set
+# CONFIG_HAMACHI is not set
+# CONFIG_YELLOWFIN is not set
+# CONFIG_SK98LIN is not set
 # CONFIG_FDDI is not set
 # CONFIG_HIPPI is not set
+# CONFIG_PLIP is not set
 # CONFIG_PPP is not set
 # CONFIG_SLIP is not set
 
 #
 # Wireless LAN (non-hamradio)
 #
-# CONFIG_NET_RADIO is not set
+CONFIG_NET_RADIO=y
+# CONFIG_STRIP is not set
+# CONFIG_WAVELAN is not set
+# CONFIG_ARLAN is not set
+# CONFIG_AIRONET4500 is not set
+# CONFIG_AIRONET4500_NONCS is not set
+# CONFIG_AIRONET4500_PROC is not set
+# CONFIG_AIRO is not set
+CONFIG_HERMES=m
+
+#
+# Wireless Pcmcia cards support
+#
+CONFIG_PCMCIA_HERMES=m
+# CONFIG_AIRO_CS is not set
+CONFIG_NET_WIRELESS=y
 
 #
 # Token Ring devices
 #
 # CONFIG_TR is not set
 # CONFIG_NET_FC is not set
+# CONFIG_RCPCI is not set
 # CONFIG_SHAPER is not set
 
 #
@@ -347,8 +423,10 @@
 # CONFIG_PCMCIA_NMCLAN is not set
 # CONFIG_PCMCIA_SMC91C92 is not set
 # CONFIG_PCMCIA_XIRC2PS is not set
+# CONFIG_PCMCIA_AXNET is not set
+# CONFIG_ARCNET_COM20020_CS is not set
+# CONFIG_PCMCIA_IBMTR is not set
 # CONFIG_NET_PCMCIA_RADIO is not set
-CONFIG_PCMCIA_NETCARD=y
 
 #
 # Amateur Radio support
@@ -378,20 +456,33 @@
 CONFIG_BLK_DEV_IDEDISK=y
 # CONFIG_IDEDISK_MULTI_MODE is not set
 # CONFIG_BLK_DEV_IDEDISK_VENDOR is not set
+# CONFIG_BLK_DEV_IDEDISK_FUJITSU is not set
+# CONFIG_BLK_DEV_IDEDISK_IBM is not set
+# CONFIG_BLK_DEV_IDEDISK_MAXTOR is not set
+# CONFIG_BLK_DEV_IDEDISK_QUANTUM is not set
+# CONFIG_BLK_DEV_IDEDISK_SEAGATE is not set
+# CONFIG_BLK_DEV_IDEDISK_WD is not set
 # CONFIG_BLK_DEV_COMMERIAL is not set
+# CONFIG_BLK_DEV_TIVO is not set
 CONFIG_BLK_DEV_IDECS=y
 # CONFIG_BLK_DEV_IDECD is not set
 # CONFIG_BLK_DEV_IDETAPE is not set
 # CONFIG_BLK_DEV_IDEFLOPPY is not set
+# CONFIG_BLK_DEV_IDESCSI is not set
 
 #
 # IDE chipset support/bugfixes
 #
 # CONFIG_BLK_DEV_CMD640 is not set
+# CONFIG_BLK_DEV_CMD640_ENHANCED is not set
+# CONFIG_BLK_DEV_ISAPNP is not set
 # CONFIG_IDE_CHIPSETS is not set
 # CONFIG_IDEDMA_AUTO is not set
 # CONFIG_DMA_NONPCI is not set
 # CONFIG_BLK_DEV_IDE_MODES is not set
+# CONFIG_BLK_DEV_ATARAID is not set
+# CONFIG_BLK_DEV_ATARAID_PDC is not set
+# CONFIG_BLK_DEV_ATARAID_HPT is not set
 
 #
 # SCSI support
@@ -402,6 +493,10 @@
 # I2O device support
 #
 # CONFIG_I2O is not set
+# CONFIG_I2O_BLOCK is not set
+# CONFIG_I2O_LAN is not set
+# CONFIG_I2O_SCSI is not set
+# CONFIG_I2O_PROC is not set
 
 #
 # ISDN subsystem
@@ -412,6 +507,10 @@
 # Input core support
 #
 # CONFIG_INPUT is not set
+# CONFIG_INPUT_KEYBDEV is not set
+# CONFIG_INPUT_MOUSEDEV is not set
+# CONFIG_INPUT_JOYDEV is not set
+# CONFIG_INPUT_EVDEV is not set
 
 #
 # Character devices
@@ -419,21 +518,38 @@
 CONFIG_VT=y
 # CONFIG_VT_CONSOLE is not set
 # CONFIG_SERIAL is not set
+# CONFIG_SERIAL_EXTENDED is not set
 # CONFIG_SERIAL_NONSTANDARD is not set
+
+#
+# Serial drivers
+#
+# CONFIG_SERIAL_ANAKIN is not set
+# CONFIG_SERIAL_ANAKIN_CONSOLE is not set
+# CONFIG_SERIAL_AMBA is not set
+# CONFIG_SERIAL_AMBA_CONSOLE is not set
+# CONFIG_SERIAL_CLPS711X is not set
+# CONFIG_SERIAL_CLPS711X_CONSOLE is not set
+# CONFIG_SERIAL_21285 is not set
+# CONFIG_SERIAL_21285_OLD is not set
+# CONFIG_SERIAL_21285_CONSOLE is not set
+# CONFIG_SERIAL_UART00 is not set
+# CONFIG_SERIAL_UART00_CONSOLE is not set
 CONFIG_SERIAL_SA1100=y
-# CONFIG_SERIAL_SA1100_OLD is not set
 CONFIG_SERIAL_SA1100_CONSOLE=y
 CONFIG_SA1100_DEFAULT_BAUDRATE=57600
+# CONFIG_SERIAL_8250 is not set
+# CONFIG_SERIAL_8250_CONSOLE is not set
+# CONFIG_SERIAL_8250_EXTENDED is not set
+# CONFIG_SERIAL_8250_MANY_PORTS is not set
+# CONFIG_SERIAL_8250_SHARE_IRQ is not set
+# CONFIG_SERIAL_8250_DETECT_IRQ is not set
+# CONFIG_SERIAL_8250_MULTIPORT is not set
+# CONFIG_SERIAL_8250_HUB6 is not set
 CONFIG_SERIAL_CORE=y
 CONFIG_SERIAL_CORE_CONSOLE=y
 CONFIG_UNIX98_PTYS=y
 CONFIG_UNIX98_PTY_COUNT=32
-CONFIG_UCB1200=y
-CONFIG_TOUCHSCREEN_UCB1200=y
-CONFIG_AUDIO_UCB1200=y
-CONFIG_ADC_UCB1200=y
-# CONFIG_TOUCHSCREEN_BITSY is not set
-# CONFIG_PROFILER is not set
 
 #
 # I2C support
@@ -441,37 +557,35 @@
 # CONFIG_I2C is not set
 
 #
-# Mice
+# L3 serial bus support
 #
-# CONFIG_BUSMOUSE is not set
-# CONFIG_MOUSE is not set
+# CONFIG_L3 is not set
+# CONFIG_L3_ALGOBIT is not set
+# CONFIG_L3_BIT_SA1100_GPIO is not set
 
 #
-# Joysticks
+# Other L3 adapters
 #
+# CONFIG_L3_SA1111 is not set
+# CONFIG_BIT_SA1100_GPIO is not set
 
 #
-# Game port support
-#
-
-#
-# Gameport joysticks
-#
-
-#
-# Serial port support
+# Mice
 #
+# CONFIG_BUSMOUSE is not set
+# CONFIG_MOUSE is not set
 
 #
-# Serial port joysticks
+# Joysticks
 #
+# CONFIG_INPUT_GAMEPORT is not set
 
 #
-# Parallel port joysticks
+# Input core support is needed for gameports
 #
 
 #
-#   Parport support is needed for parallel port joysticks
+# Input core support is needed for joysticks
 #
 # CONFIG_QIC02_TAPE is not set
 
@@ -479,6 +593,7 @@
 # Watchdog Cards
 #
 # CONFIG_WATCHDOG is not set
+# CONFIG_INTEL_RNG is not set
 # CONFIG_NVRAM is not set
 # CONFIG_RTC is not set
 CONFIG_SA1100_RTC=y
@@ -509,44 +624,74 @@
 # CONFIG_AUTOFS_FS is not set
 # CONFIG_AUTOFS4_FS is not set
 # CONFIG_REISERFS_FS is not set
+# CONFIG_REISERFS_CHECK is not set
+# CONFIG_REISERFS_PROC_INFO is not set
 # CONFIG_ADFS_FS is not set
+# CONFIG_ADFS_FS_RW is not set
 # CONFIG_AFFS_FS is not set
 # CONFIG_HFS_FS is not set
 # CONFIG_BFS_FS is not set
+# CONFIG_EXT3_FS is not set
+# CONFIG_JBD is not set
+# CONFIG_JBD_DEBUG is not set
 # CONFIG_FAT_FS is not set
+# CONFIG_MSDOS_FS is not set
+# CONFIG_UMSDOS_FS is not set
+# CONFIG_VFAT_FS is not set
 # CONFIG_EFS_FS is not set
 # CONFIG_JFFS_FS is not set
-# CONFIG_JFFS2_FS is not set
-CONFIG_CRAMFS=y
+CONFIG_JFFS2_FS=y
+CONFIG_JFFS2_FS_DEBUG=0
+# CONFIG_CRAMFS is not set
 # CONFIG_TMPFS is not set
 CONFIG_RAMFS=y
 # CONFIG_ISO9660_FS is not set
+# CONFIG_JOLIET is not set
+# CONFIG_ZISOFS is not set
 # CONFIG_MINIX_FS is not set
 # CONFIG_VXFS_FS is not set
 # CONFIG_NTFS_FS is not set
+# CONFIG_NTFS_RW is not set
 # CONFIG_HPFS_FS is not set
 CONFIG_PROC_FS=y
 # CONFIG_DEVFS_FS is not set
+# CONFIG_DEVFS_MOUNT is not set
+# CONFIG_DEVFS_DEBUG is not set
 CONFIG_DEVPTS_FS=y
 # CONFIG_QNX4FS_FS is not set
-CONFIG_ROMFS_FS=y
+# CONFIG_QNX4FS_RW is not set
+# CONFIG_ROMFS_FS is not set
 CONFIG_EXT2_FS=y
 # CONFIG_SYSV_FS is not set
 # CONFIG_UDF_FS is not set
+# CONFIG_UDF_RW is not set
 # CONFIG_UFS_FS is not set
+# CONFIG_UFS_FS_WRITE is not set
 
 #
 # Network File Systems
 #
 # CONFIG_CODA_FS is not set
+# CONFIG_INTERMEZZO_FS is not set
 CONFIG_NFS_FS=y
 # CONFIG_NFS_V3 is not set
 CONFIG_ROOT_NFS=y
 # CONFIG_NFSD is not set
+# CONFIG_NFSD_V3 is not set
 CONFIG_SUNRPC=y
 CONFIG_LOCKD=y
 # CONFIG_SMB_FS is not set
 # CONFIG_NCP_FS is not set
+# CONFIG_NCPFS_PACKET_SIGNING is not set
+# CONFIG_NCPFS_IOCTL_LOCKING is not set
+# CONFIG_NCPFS_STRONG is not set
+# CONFIG_NCPFS_NFS_NS is not set
+# CONFIG_NCPFS_OS2_NS is not set
+# CONFIG_NCPFS_SMALLDOS is not set
+# CONFIG_NCPFS_NLS is not set
+# CONFIG_NCPFS_EXTRAS is not set
+# CONFIG_ZISOFS_FS is not set
+# CONFIG_ZLIB_FS_INFLATE is not set
 
 #
 # Partition Types
@@ -562,6 +707,7 @@
 # CONFIG_MINIX_SUBPARTITION is not set
 # CONFIG_SOLARIS_X86_PARTITION is not set
 # CONFIG_UNIXWARE_DISKLABEL is not set
+# CONFIG_LDM_PARTITION is not set
 # CONFIG_SGI_PARTITION is not set
 # CONFIG_ULTRIX_PARTITION is not set
 # CONFIG_SUN_PARTITION is not set
@@ -573,15 +719,17 @@
 #
 CONFIG_PC_KEYMAP=y
 # CONFIG_VGA_CONSOLE is not set
-CONFIG_FB=y
 
 #
 # Frame-buffer support
 #
 CONFIG_FB=y
 CONFIG_DUMMY_CONSOLE=y
+# CONFIG_FB_ACORN is not set
+# CONFIG_FB_ANAKIN is not set
+# CONFIG_FB_CLPS711X is not set
 CONFIG_FB_SA1100=y
-# CONFIG_FB_E1355 is not set
+# CONFIG_FB_CYBER2000 is not set
 # CONFIG_FB_VIRTUAL is not set
 # CONFIG_FBCON_ADVANCED is not set
 CONFIG_FBCON_CFB2=y
@@ -597,28 +745,49 @@
 # Sound
 #
 CONFIG_SOUND=y
-# CONFIG_SOUND_SA1100_SSP is not set
+# CONFIG_SOUND_BT878 is not set
+# CONFIG_SOUND_CMPCI is not set
+# CONFIG_SOUND_EMU10K1 is not set
+# CONFIG_MIDI_EMU10K1 is not set
 # CONFIG_SOUND_FUSION is not set
 # CONFIG_SOUND_CS4281 is not set
+# CONFIG_SOUND_ES1370 is not set
+# CONFIG_SOUND_ES1371 is not set
 # CONFIG_SOUND_ESSSOLO1 is not set
 # CONFIG_SOUND_MAESTRO is not set
+# CONFIG_SOUND_MAESTRO3 is not set
+# CONFIG_SOUND_ICH is not set
+# CONFIG_SOUND_RME96XX is not set
 # CONFIG_SOUND_SONICVIBES is not set
 # CONFIG_SOUND_TRIDENT is not set
 # CONFIG_SOUND_MSNDCLAS is not set
 # CONFIG_SOUND_MSNDPIN is not set
+# CONFIG_SOUND_VIA82CXXX is not set
+# CONFIG_MIDI_VIA82CXXX is not set
+# CONFIG_SOUND_SA1100 is not set
+# CONFIG_SOUND_UDA1341 is not set
+# CONFIG_SOUND_ASSABET_UDA1341 is not set
+# CONFIG_SOUND_H3600_UDA1341 is not set
+# CONFIG_SOUND_PANGOLIN_UDA1341 is not set
+# CONFIG_SOUND_SA1111_UDA1341 is not set
+# CONFIG_SOUND_SA1100SSP is not set
 # CONFIG_SOUND_OSS is not set
+# CONFIG_SOUND_WAVEARTIST is not set
+# CONFIG_SOUND_TVMIXER is not set
 
 #
-# USB support
+# Multimedia Capabilities Port drivers
 #
-CONFIG_USB=y
-CONFIG_USB_DEBUG=y
+# CONFIG_MCP is not set
+# CONFIG_MCP_SA1100 is not set
+# CONFIG_MCP_UCB1200 is not set
+# CONFIG_MCP_UCB1200_AUDIO is not set
+# CONFIG_MCP_UCB1200_TS is not set
 
 #
-# Miscellaneous USB options
+# USB support
 #
-# CONFIG_USB_DEVICEFS is not set
-# CONFIG_USB_BANDWIDTH is not set
+# CONFIG_USB is not set
 
 #
 # USB Controllers
@@ -626,15 +795,22 @@
 # CONFIG_USB_UHCI is not set
 # CONFIG_USB_UHCI_ALT is not set
 # CONFIG_USB_OHCI is not set
+# CONFIG_USB_OHCI_SA1111 is not set
 
 #
 # USB Device Class drivers
 #
 # CONFIG_USB_AUDIO is not set
 # CONFIG_USB_BLUETOOTH is not set
+# CONFIG_USB_STORAGE is not set
 # CONFIG_USB_STORAGE_DEBUG is not set
+# CONFIG_USB_STORAGE_DATAFAB is not set
 # CONFIG_USB_STORAGE_FREECOM is not set
+# CONFIG_USB_STORAGE_ISD200 is not set
 # CONFIG_USB_STORAGE_DPCM is not set
+# CONFIG_USB_STORAGE_HP8200e is not set
+# CONFIG_USB_STORAGE_SDDR09 is not set
+# CONFIG_USB_STORAGE_JUMPSHOT is not set
 # CONFIG_USB_ACM is not set
 # CONFIG_USB_PRINTER is not set
 
@@ -652,40 +828,83 @@
 # CONFIG_USB_DC2XX is not set
 # CONFIG_USB_MDC800 is not set
 # CONFIG_USB_SCANNER is not set
+# CONFIG_USB_MICROTEK is not set
+# CONFIG_USB_HPUSBSCSI is not set
 
 #
 # USB Multimedia devices
 #
-# CONFIG_USB_DABUSB is not set
+
+#
+#   Video4Linux support is needed for USB Multimedia device support
+#
 
 #
 # USB Network adaptors
 #
-# CONFIG_USB_PLUSB is not set
 # CONFIG_USB_PEGASUS is not set
-# CONFIG_USB_NET1080 is not set
+# CONFIG_USB_KAWETH is not set
+# CONFIG_USB_CATC is not set
+# CONFIG_USB_CDCETHER is not set
 # CONFIG_USB_USBNET is not set
 
 #
 # USB port drivers
 #
+# CONFIG_USB_USS720 is not set
 
 #
 # USB Serial Converter support
 #
 # CONFIG_USB_SERIAL is not set
+# CONFIG_USB_SERIAL_GENERIC is not set
+# CONFIG_USB_SERIAL_BELKIN is not set
+# CONFIG_USB_SERIAL_WHITEHEAT is not set
+# CONFIG_USB_SERIAL_DIGI_ACCELEPORT is not set
+# CONFIG_USB_SERIAL_EMPEG is not set
+# CONFIG_USB_SERIAL_FTDI_SIO is not set
+# CONFIG_USB_SERIAL_VISOR is not set
+# CONFIG_USB_SERIAL_IR is not set
+# CONFIG_USB_SERIAL_EDGEPORT is not set
+# CONFIG_USB_SERIAL_KEYSPAN_PDA is not set
+# CONFIG_USB_SERIAL_KEYSPAN is not set
+# CONFIG_USB_SERIAL_KEYSPAN_USA28 is not set
+# CONFIG_USB_SERIAL_KEYSPAN_USA28X is not set
+# CONFIG_USB_SERIAL_KEYSPAN_USA28XA is not set
+# CONFIG_USB_SERIAL_KEYSPAN_USA28XB is not set
+# CONFIG_USB_SERIAL_KEYSPAN_USA19 is not set
+# CONFIG_USB_SERIAL_KEYSPAN_USA18X is not set
+# CONFIG_USB_SERIAL_KEYSPAN_USA19W is not set
+# CONFIG_USB_SERIAL_KEYSPAN_USA49W is not set
+# CONFIG_USB_SERIAL_MCT_U232 is not set
+# CONFIG_USB_SERIAL_PL2303 is not set
+# CONFIG_USB_SERIAL_CYBERJACK is not set
+# CONFIG_USB_SERIAL_XIRCOM is not set
+# CONFIG_USB_SERIAL_OMNINET is not set
 
 #
-# USB misc drivers
+# USB Miscellaneous drivers
 #
 # CONFIG_USB_RIO500 is not set
 
 #
+# Bluetooth support
+#
+# CONFIG_BLUEZ is not set
+
+#
 # Kernel hacking
 #
 # CONFIG_NO_FRAME_POINTER is not set
-CONFIG_DEBUG_ERRORS=y
 CONFIG_DEBUG_USER=y
 # CONFIG_DEBUG_INFO is not set
-CONFIG_MAGIC_SYSRQ=y
+# CONFIG_NO_PGT_CACHE is not set
+# CONFIG_DEBUG_KERNEL is not set
+# CONFIG_DEBUG_SLAB is not set
+# CONFIG_MAGIC_SYSRQ is not set
+# CONFIG_DEBUG_SPINLOCK is not set
+# CONFIG_DEBUG_BUGVERBOSE is not set
+# CONFIG_DEBUG_ERRORS is not set
 # CONFIG_DEBUG_LL is not set
+# CONFIG_DEBUG_DC21285_PORT is not set
+# CONFIG_DEBUG_CLPS711X_UART2 is not set
diff -Nru linux/arch/arm/def-configs/fortunet linux-2.4.19-pre5-mjc/arch/arm/def-configs/fortunet
--- linux/arch/arm/def-configs/fortunet	Wed Dec 31 19:00:00 1969
+++ linux-2.4.19-pre5-mjc/arch/arm/def-configs/fortunet	Sat Apr  6 08:25:57 2002
@@ -0,0 +1,593 @@
+#
+# Automatically generated by make menuconfig: don't edit
+#
+CONFIG_ARM=y
+# CONFIG_EISA is not set
+# CONFIG_SBUS is not set
+# CONFIG_MCA is not set
+CONFIG_UID16=y
+CONFIG_RWSEM_GENERIC_SPINLOCK=y
+# CONFIG_RWSEM_XCHGADD_ALGORITHM is not set
+# CONFIG_GENERIC_BUST_SPINLOCK is not set
+# CONFIG_GENERIC_ISA_DMA is not set
+
+#
+# Code maturity level options
+#
+CONFIG_EXPERIMENTAL=y
+# CONFIG_OBSOLETE is not set
+
+#
+# Loadable module support
+#
+# CONFIG_MODULES is not set
+# CONFIG_MODVERSIONS is not set
+# CONFIG_KMOD is not set
+
+#
+# System Type
+#
+# CONFIG_ARCH_ANAKIN is not set
+# CONFIG_ARCH_ARCA5K is not set
+# CONFIG_ARCH_CLPS7500 is not set
+CONFIG_ARCH_CLPS711X=y
+# CONFIG_ARCH_CO285 is not set
+# CONFIG_ARCH_EBSA110 is not set
+# CONFIG_ARCH_CAMELOT is not set
+# CONFIG_ARCH_FOOTBRIDGE is not set
+# CONFIG_ARCH_INTEGRATOR is not set
+# CONFIG_ARCH_L7200 is not set
+# CONFIG_ARCH_RPC is not set
+# CONFIG_ARCH_SA1100 is not set
+# CONFIG_ARCH_SHARK is not set
+
+#
+# Archimedes/A5000 Implementations
+#
+# CONFIG_ARCH_ARC is not set
+# CONFIG_ARCH_A5K is not set
+
+#
+# Footbridge Implementations
+#
+# CONFIG_ARCH_CATS is not set
+# CONFIG_ARCH_PERSONAL_SERVER is not set
+# CONFIG_ARCH_EBSA285_ADDIN is not set
+# CONFIG_ARCH_EBSA285_HOST is not set
+# CONFIG_ARCH_NETWINDER is not set
+
+#
+# SA11x0 Implementations
+#
+# CONFIG_SA1100_ASSABET is not set
+# CONFIG_ASSABET_NEPONSET is not set
+# CONFIG_SA1100_ADSBITSY is not set
+# CONFIG_SA1100_BRUTUS is not set
+# CONFIG_SA1100_CERF is not set
+# CONFIG_SA1100_H3100 is not set
+# CONFIG_SA1100_H3600 is not set
+# CONFIG_SA1100_H3800 is not set
+# CONFIG_SA1100_H3XXX is not set
+# CONFIG_SA1100_EXTENEX1 is not set
+# CONFIG_SA1100_FLEXANET is not set
+# CONFIG_SA1100_FREEBIRD is not set
+# CONFIG_SA1100_GRAPHICSCLIENT is not set
+# CONFIG_SA1100_GRAPHICSMASTER is not set
+# CONFIG_SA1100_JORNADA720 is not set
+# CONFIG_SA1100_HUW_WEBPANEL is not set
+# CONFIG_SA1100_ITSY is not set
+# CONFIG_SA1100_LART is not set
+# CONFIG_SA1100_NANOENGINE is not set
+# CONFIG_SA1100_OMNIMETER is not set
+# CONFIG_SA1100_PANGOLIN is not set
+# CONFIG_SA1100_PLEB is not set
+# CONFIG_SA1100_SHANNON is not set
+# CONFIG_SA1100_SHERMAN is not set
+# CONFIG_SA1100_SIMPAD is not set
+# CONFIG_SA1100_PFS168 is not set
+# CONFIG_SA1100_VICTOR is not set
+# CONFIG_SA1100_XP860 is not set
+# CONFIG_SA1100_YOPY is not set
+# CONFIG_SA1100_USB is not set
+# CONFIG_SA1100_USB_NETLINK is not set
+# CONFIG_SA1100_USB_CHAR is not set
+# CONFIG_H3600_SLEEVE is not set
+
+#
+# CLPS711X/EP721X Implementations
+#
+# CONFIG_ARCH_AUTCPU12 is not set
+# CONFIG_ARCH_CDB89712 is not set
+# CONFIG_ARCH_CLEP7312 is not set
+# CONFIG_ARCH_EDB7211 is not set
+# CONFIG_ARCH_P720T is not set
+CONFIG_ARCH_FORTUNET=y
+# CONFIG_ARCH_EP7211 is not set
+# CONFIG_ARCH_EP7212 is not set
+# CONFIG_ARCH_ACORN is not set
+# CONFIG_FOOTBRIDGE is not set
+# CONFIG_FOOTBRIDGE_HOST is not set
+# CONFIG_FOOTBRIDGE_ADDIN is not set
+CONFIG_CPU_32=y
+# CONFIG_CPU_26 is not set
+# CONFIG_CPU_32v3 is not set
+CONFIG_CPU_32v4=y
+# CONFIG_CPU_ARM610 is not set
+# CONFIG_CPU_ARM710 is not set
+CONFIG_CPU_ARM720T=y
+# CONFIG_CPU_ARM920T is not set
+# CONFIG_CPU_ARM922T is not set
+# CONFIG_CPU_ARM926T is not set
+# CONFIG_CPU_ARM1020 is not set
+# CONFIG_CPU_SA110 is not set
+# CONFIG_CPU_SA1100 is not set
+# CONFIG_ARM_THUMB is not set
+# CONFIG_DISCONTIGMEM is not set
+
+#
+# General setup
+#
+# CONFIG_PCI is not set
+# CONFIG_ISA is not set
+# CONFIG_ISA_DMA is not set
+# CONFIG_HOTPLUG is not set
+# CONFIG_PCMCIA is not set
+CONFIG_NET=y
+CONFIG_SYSVIPC=y
+# CONFIG_BSD_PROCESS_ACCT is not set
+CONFIG_SYSCTL=y
+# CONFIG_FPE_NWFPE is not set
+CONFIG_FPE_FASTFPE=y
+CONFIG_KCORE_ELF=y
+# CONFIG_KCORE_AOUT is not set
+CONFIG_BINFMT_AOUT=y
+CONFIG_BINFMT_ELF=y
+# CONFIG_BINFMT_MISC is not set
+# CONFIG_PM is not set
+# CONFIG_ARTHUR is not set
+CONFIG_ALIGNMENT_TRAP=y
+
+#
+# Parallel port support
+#
+# CONFIG_PARPORT is not set
+
+#
+# Memory Technology Devices (MTD)
+#
+CONFIG_MTD=y
+# CONFIG_MTD_DEBUG is not set
+# CONFIG_MTD_PARTITIONS is not set
+# CONFIG_MTD_REDBOOT_PARTS is not set
+# CONFIG_MTD_BOOTLDR_PARTS is not set
+# CONFIG_MTD_AFS_PARTS is not set
+CONFIG_MTD_CHAR=y
+CONFIG_MTD_BLOCK=y
+# CONFIG_FTL is not set
+# CONFIG_NFTL is not set
+
+#
+# RAM/ROM/Flash chip drivers
+#
+CONFIG_MTD_CFI=y
+# CONFIG_MTD_JEDECPROBE is not set
+CONFIG_MTD_GEN_PROBE=y
+# CONFIG_MTD_CFI_ADV_OPTIONS is not set
+CONFIG_MTD_CFI_INTELEXT=y
+# CONFIG_MTD_CFI_AMDSTD is not set
+# CONFIG_MTD_RAM is not set
+# CONFIG_MTD_ROM is not set
+# CONFIG_MTD_ABSENT is not set
+# CONFIG_MTD_OBSOLETE_CHIPS is not set
+# CONFIG_MTD_AMDSTD is not set
+# CONFIG_MTD_SHARP is not set
+# CONFIG_MTD_JEDEC is not set
+
+#
+# Mapping drivers for chip access
+#
+# CONFIG_MTD_PHYSMAP is not set
+# CONFIG_MTD_NORA is not set
+# CONFIG_MTD_ARM_INTEGRATOR is not set
+# CONFIG_MTD_CDB89712 is not set
+# CONFIG_MTD_SA1100 is not set
+# CONFIG_MTD_DC21285 is not set
+# CONFIG_MTD_IQ80310 is not set
+CONFIG_MTD_FORTUNET=y
+# CONFIG_MTD_PCI is not set
+
+#
+# Self-contained MTD device drivers
+#
+# CONFIG_MTD_PMC551 is not set
+# CONFIG_MTD_SLRAM is not set
+# CONFIG_MTD_MTDRAM is not set
+# CONFIG_MTD_BLKMTD is not set
+# CONFIG_MTD_DOC1000 is not set
+# CONFIG_MTD_DOC2000 is not set
+# CONFIG_MTD_DOC2001 is not set
+# CONFIG_MTD_DOCPROBE is not set
+
+#
+# NAND Flash Device Drivers
+#
+# CONFIG_MTD_NAND is not set
+
+#
+# Plug and Play configuration
+#
+# CONFIG_PNP is not set
+# CONFIG_ISAPNP is not set
+
+#
+# Block devices
+#
+# CONFIG_BLK_DEV_FD is not set
+# CONFIG_BLK_DEV_XD is not set
+# CONFIG_PARIDE is not set
+# CONFIG_BLK_CPQ_DA is not set
+# CONFIG_BLK_CPQ_CISS_DA is not set
+# CONFIG_BLK_DEV_DAC960 is not set
+# CONFIG_BLK_DEV_LOOP is not set
+# CONFIG_BLK_DEV_NBD is not set
+CONFIG_BLK_DEV_RAM=y
+CONFIG_BLK_DEV_RAM_SIZE=4096
+CONFIG_BLK_DEV_INITRD=y
+
+#
+# Multi-device support (RAID and LVM)
+#
+# CONFIG_MD is not set
+# CONFIG_BLK_DEV_MD is not set
+# CONFIG_MD_LINEAR is not set
+# CONFIG_MD_RAID0 is not set
+# CONFIG_MD_RAID1 is not set
+# CONFIG_MD_RAID5 is not set
+# CONFIG_MD_MULTIPATH is not set
+# CONFIG_BLK_DEV_LVM is not set
+
+#
+# Networking options
+#
+# CONFIG_PACKET is not set
+# CONFIG_NETLINK_DEV is not set
+# CONFIG_NETFILTER is not set
+# CONFIG_FILTER is not set
+CONFIG_UNIX=y
+# CONFIG_INET is not set
+# CONFIG_ATM is not set
+# CONFIG_VLAN_8021Q is not set
+# CONFIG_IPX is not set
+# CONFIG_ATALK is not set
+# CONFIG_DECNET is not set
+# CONFIG_BRIDGE is not set
+# CONFIG_X25 is not set
+# CONFIG_LAPB is not set
+# CONFIG_LLC is not set
+# CONFIG_NET_DIVERT is not set
+# CONFIG_ECONET_AUNUDP is not set
+# CONFIG_ECONET_NATIVE is not set
+# CONFIG_WAN_ROUTER is not set
+# CONFIG_NET_FASTROUTE is not set
+# CONFIG_NET_HW_FLOWCONTROL is not set
+
+#
+# QoS and/or fair queueing
+#
+# CONFIG_NET_SCHED is not set
+
+#
+# Network device support
+#
+# CONFIG_NETDEVICES is not set
+
+#
+# Amateur Radio support
+#
+# CONFIG_HAMRADIO is not set
+
+#
+# IrDA (infrared) support
+#
+# CONFIG_IRDA is not set
+
+#
+# ATA/IDE/MFM/RLL support
+#
+# CONFIG_IDE is not set
+# CONFIG_BLK_DEV_IDE_MODES is not set
+# CONFIG_BLK_DEV_HD is not set
+
+#
+# SCSI support
+#
+# CONFIG_SCSI is not set
+
+#
+# Synchronous Serial Interface
+#
+# CONFIG_SSI is not set
+# CONFIG_SSI_CLPS711X is not set
+# CONFIG_SSI_JUNO is not set
+
+#
+# I2O device support
+#
+# CONFIG_I2O is not set
+# CONFIG_I2O_BLOCK is not set
+# CONFIG_I2O_LAN is not set
+# CONFIG_I2O_SCSI is not set
+# CONFIG_I2O_PROC is not set
+
+#
+# ISDN subsystem
+#
+# CONFIG_ISDN is not set
+
+#
+# Input core support
+#
+# CONFIG_INPUT is not set
+# CONFIG_INPUT_KEYBDEV is not set
+# CONFIG_INPUT_MOUSEDEV is not set
+# CONFIG_INPUT_JOYDEV is not set
+# CONFIG_INPUT_EVDEV is not set
+
+#
+# Character devices
+#
+# CONFIG_VT is not set
+# CONFIG_SERIAL is not set
+# CONFIG_SERIAL_EXTENDED is not set
+# CONFIG_SERIAL_NONSTANDARD is not set
+
+#
+# Serial drivers
+#
+# CONFIG_SERIAL_ANAKIN is not set
+# CONFIG_SERIAL_ANAKIN_CONSOLE is not set
+# CONFIG_SERIAL_AMBA is not set
+# CONFIG_SERIAL_AMBA_CONSOLE is not set
+CONFIG_SERIAL_CLPS711X=y
+CONFIG_SERIAL_CLPS711X_CONSOLE=y
+# CONFIG_SERIAL_21285 is not set
+# CONFIG_SERIAL_21285_OLD is not set
+# CONFIG_SERIAL_21285_CONSOLE is not set
+# CONFIG_SERIAL_UART00 is not set
+# CONFIG_SERIAL_UART00_CONSOLE is not set
+# CONFIG_SERIAL_SA1100 is not set
+# CONFIG_SERIAL_SA1100_CONSOLE is not set
+# CONFIG_SERIAL_8250 is not set
+# CONFIG_SERIAL_8250_CONSOLE is not set
+# CONFIG_SERIAL_8250_EXTENDED is not set
+# CONFIG_SERIAL_8250_MANY_PORTS is not set
+# CONFIG_SERIAL_8250_SHARE_IRQ is not set
+# CONFIG_SERIAL_8250_DETECT_IRQ is not set
+# CONFIG_SERIAL_8250_MULTIPORT is not set
+# CONFIG_SERIAL_8250_HUB6 is not set
+CONFIG_SERIAL_CORE=y
+CONFIG_SERIAL_CORE_CONSOLE=y
+CONFIG_UNIX98_PTYS=y
+CONFIG_UNIX98_PTY_COUNT=256
+
+#
+# I2C support
+#
+# CONFIG_I2C is not set
+
+#
+# L3 serial bus support
+#
+# CONFIG_L3 is not set
+# CONFIG_L3_ALGOBIT is not set
+# CONFIG_L3_BIT_SA1100_GPIO is not set
+# CONFIG_L3_SA1111 is not set
+# CONFIG_BIT_SA1100_GPIO is not set
+
+#
+# Mice
+#
+# CONFIG_BUSMOUSE is not set
+# CONFIG_MOUSE is not set
+
+#
+# Joysticks
+#
+# CONFIG_INPUT_GAMEPORT is not set
+# CONFIG_QIC02_TAPE is not set
+
+#
+# Watchdog Cards
+#
+# CONFIG_WATCHDOG is not set
+# CONFIG_INTEL_RNG is not set
+# CONFIG_NVRAM is not set
+# CONFIG_RTC is not set
+# CONFIG_DTLK is not set
+# CONFIG_R3964 is not set
+# CONFIG_APPLICOM is not set
+
+#
+# Ftape, the floppy tape device driver
+#
+# CONFIG_FTAPE is not set
+# CONFIG_AGP is not set
+# CONFIG_DRM is not set
+
+#
+# Multimedia devices
+#
+# CONFIG_VIDEO_DEV is not set
+
+#
+# File systems
+#
+# CONFIG_QUOTA is not set
+# CONFIG_AUTOFS_FS is not set
+# CONFIG_AUTOFS4_FS is not set
+# CONFIG_REISERFS_FS is not set
+# CONFIG_REISERFS_CHECK is not set
+# CONFIG_REISERFS_PROC_INFO is not set
+# CONFIG_ADFS_FS is not set
+# CONFIG_ADFS_FS_RW is not set
+# CONFIG_AFFS_FS is not set
+# CONFIG_HFS_FS is not set
+# CONFIG_BFS_FS is not set
+# CONFIG_EXT3_FS is not set
+# CONFIG_JBD is not set
+# CONFIG_JBD_DEBUG is not set
+# CONFIG_FAT_FS is not set
+# CONFIG_MSDOS_FS is not set
+# CONFIG_UMSDOS_FS is not set
+# CONFIG_VFAT_FS is not set
+# CONFIG_EFS_FS is not set
+CONFIG_JFFS_FS=y
+CONFIG_JFFS_FS_VERBOSE=0
+# CONFIG_JFFS_PROC_FS is not set
+# CONFIG_JFFS2_FS is not set
+# CONFIG_CRAMFS is not set
+# CONFIG_TMPFS is not set
+# CONFIG_RAMFS is not set
+# CONFIG_ISO9660_FS is not set
+# CONFIG_JOLIET is not set
+# CONFIG_ZISOFS is not set
+# CONFIG_MINIX_FS is not set
+# CONFIG_VXFS_FS is not set
+# CONFIG_NTFS_FS is not set
+# CONFIG_NTFS_RW is not set
+# CONFIG_HPFS_FS is not set
+CONFIG_PROC_FS=y
+# CONFIG_DEVFS_FS is not set
+# CONFIG_DEVFS_MOUNT is not set
+# CONFIG_DEVFS_DEBUG is not set
+CONFIG_DEVPTS_FS=y
+# CONFIG_QNX4FS_FS is not set
+# CONFIG_QNX4FS_RW is not set
+# CONFIG_ROMFS_FS is not set
+CONFIG_EXT2_FS=y
+# CONFIG_SYSV_FS is not set
+# CONFIG_UDF_FS is not set
+# CONFIG_UDF_RW is not set
+# CONFIG_UFS_FS is not set
+# CONFIG_UFS_FS_WRITE is not set
+
+#
+# Network File Systems
+#
+# CONFIG_CODA_FS is not set
+# CONFIG_INTERMEZZO_FS is not set
+# CONFIG_NFS_FS is not set
+# CONFIG_NFS_V3 is not set
+# CONFIG_ROOT_NFS is not set
+# CONFIG_NFSD is not set
+# CONFIG_NFSD_V3 is not set
+# CONFIG_SUNRPC is not set
+# CONFIG_LOCKD is not set
+# CONFIG_SMB_FS is not set
+# CONFIG_NCPFS_NLS is not set
+# CONFIG_ZISOFS_FS is not set
+# CONFIG_ZLIB_FS_INFLATE is not set
+
+#
+# Partition Types
+#
+# CONFIG_PARTITION_ADVANCED is not set
+CONFIG_MSDOS_PARTITION=y
+# CONFIG_SMB_NLS is not set
+# CONFIG_NLS is not set
+
+#
+# Multimedia Capabilities Port drivers
+#
+# CONFIG_MCP is not set
+# CONFIG_MCP_SA1100 is not set
+# CONFIG_MCP_UCB1200 is not set
+# CONFIG_MCP_UCB1200_AUDIO is not set
+# CONFIG_MCP_UCB1200_TS is not set
+
+#
+# USB support
+#
+# CONFIG_USB is not set
+# CONFIG_USB_UHCI is not set
+# CONFIG_USB_UHCI_ALT is not set
+# CONFIG_USB_OHCI is not set
+# CONFIG_USB_OHCI_SA1111 is not set
+# CONFIG_USB_AUDIO is not set
+# CONFIG_USB_BLUETOOTH is not set
+# CONFIG_USB_STORAGE is not set
+# CONFIG_USB_STORAGE_DEBUG is not set
+# CONFIG_USB_STORAGE_DATAFAB is not set
+# CONFIG_USB_STORAGE_FREECOM is not set
+# CONFIG_USB_STORAGE_ISD200 is not set
+# CONFIG_USB_STORAGE_DPCM is not set
+# CONFIG_USB_STORAGE_HP8200e is not set
+# CONFIG_USB_STORAGE_SDDR09 is not set
+# CONFIG_USB_STORAGE_JUMPSHOT is not set
+# CONFIG_USB_ACM is not set
+# CONFIG_USB_PRINTER is not set
+# CONFIG_USB_DC2XX is not set
+# CONFIG_USB_MDC800 is not set
+# CONFIG_USB_SCANNER is not set
+# CONFIG_USB_MICROTEK is not set
+# CONFIG_USB_HPUSBSCSI is not set
+# CONFIG_USB_PEGASUS is not set
+# CONFIG_USB_KAWETH is not set
+# CONFIG_USB_CATC is not set
+# CONFIG_USB_CDCETHER is not set
+# CONFIG_USB_USBNET is not set
+# CONFIG_USB_USS720 is not set
+
+#
+# USB Serial Converter support
+#
+# CONFIG_USB_SERIAL is not set
+# CONFIG_USB_SERIAL_GENERIC is not set
+# CONFIG_USB_SERIAL_BELKIN is not set
+# CONFIG_USB_SERIAL_WHITEHEAT is not set
+# CONFIG_USB_SERIAL_DIGI_ACCELEPORT is not set
+# CONFIG_USB_SERIAL_EMPEG is not set
+# CONFIG_USB_SERIAL_FTDI_SIO is not set
+# CONFIG_USB_SERIAL_VISOR is not set
+# CONFIG_USB_SERIAL_IR is not set
+# CONFIG_USB_SERIAL_EDGEPORT is not set
+# CONFIG_USB_SERIAL_KEYSPAN_PDA is not set
+# CONFIG_USB_SERIAL_KEYSPAN is not set
+# CONFIG_USB_SERIAL_KEYSPAN_USA28 is not set
+# CONFIG_USB_SERIAL_KEYSPAN_USA28X is not set
+# CONFIG_USB_SERIAL_KEYSPAN_USA28XA is not set
+# CONFIG_USB_SERIAL_KEYSPAN_USA28XB is not set
+# CONFIG_USB_SERIAL_KEYSPAN_USA19 is not set
+# CONFIG_USB_SERIAL_KEYSPAN_USA18X is not set
+# CONFIG_USB_SERIAL_KEYSPAN_USA19W is not set
+# CONFIG_USB_SERIAL_KEYSPAN_USA49W is not set
+# CONFIG_USB_SERIAL_MCT_U232 is not set
+# CONFIG_USB_SERIAL_PL2303 is not set
+# CONFIG_USB_SERIAL_CYBERJACK is not set
+# CONFIG_USB_SERIAL_XIRCOM is not set
+# CONFIG_USB_SERIAL_OMNINET is not set
+# CONFIG_USB_RIO500 is not set
+
+#
+# Bluetooth support
+#
+# CONFIG_BLUEZ is not set
+
+#
+# Kernel hacking
+#
+# CONFIG_NO_FRAME_POINTER is not set
+CONFIG_DEBUG_USER=y
+# CONFIG_DEBUG_INFO is not set
+# CONFIG_NO_PGT_CACHE is not set
+# CONFIG_DEBUG_KERNEL is not set
+# CONFIG_DEBUG_SLAB is not set
+# CONFIG_MAGIC_SYSRQ is not set
+# CONFIG_DEBUG_SPINLOCK is not set
+# CONFIG_DEBUG_WAITQ is not set
+# CONFIG_DEBUG_BUGVERBOSE is not set
+# CONFIG_DEBUG_ERRORS is not set
+# CONFIG_DEBUG_LL is not set
+# CONFIG_DEBUG_DC21285_PORT is not set
+# CONFIG_DEBUG_CLPS711X_UART2 is not set
+# CONFIG_DEBUG_LL_SER3 is not set
diff -Nru linux/arch/arm/def-configs/frodo linux-2.4.19-pre5-mjc/arch/arm/def-configs/frodo
--- linux/arch/arm/def-configs/frodo	Wed Dec 31 19:00:00 1969
+++ linux-2.4.19-pre5-mjc/arch/arm/def-configs/frodo	Sat Apr  6 08:25:57 2002
@@ -0,0 +1,618 @@
+#
+# Automatically generated by make menuconfig: don't edit
+#
+CONFIG_ARM=y
+# CONFIG_EISA is not set
+# CONFIG_SBUS is not set
+# CONFIG_MCA is not set
+CONFIG_UID16=y
+CONFIG_RWSEM_GENERIC_SPINLOCK=y
+# CONFIG_RWSEM_XCHGADD_ALGORITHM is not set
+# CONFIG_GENERIC_BUST_SPINLOCK is not set
+# CONFIG_GENERIC_ISA_DMA is not set
+
+#
+# Code maturity level options
+#
+CONFIG_EXPERIMENTAL=y
+# CONFIG_OBSOLETE is not set
+
+#
+# Loadable module support
+#
+CONFIG_MODULES=y
+# CONFIG_MODVERSIONS is not set
+# CONFIG_KMOD is not set
+
+#
+# System Type
+#
+# CONFIG_ARCH_ANAKIN is not set
+# CONFIG_ARCH_ARCA5K is not set
+# CONFIG_ARCH_CLPS7500 is not set
+# CONFIG_ARCH_CLPS711X is not set
+# CONFIG_ARCH_CO285 is not set
+# CONFIG_ARCH_EBSA110 is not set
+# CONFIG_ARCH_CAMELOT is not set
+# CONFIG_ARCH_FOOTBRIDGE is not set
+# CONFIG_ARCH_INTEGRATOR is not set
+# CONFIG_ARCH_L7200 is not set
+# CONFIG_ARCH_RPC is not set
+CONFIG_ARCH_SA1100=y
+# CONFIG_ARCH_SHARK is not set
+
+#
+# Archimedes/A5000 Implementations
+#
+# CONFIG_ARCH_ARC is not set
+# CONFIG_ARCH_A5K is not set
+
+#
+# Footbridge Implementations
+#
+# CONFIG_ARCH_CATS is not set
+# CONFIG_ARCH_PERSONAL_SERVER is not set
+# CONFIG_ARCH_EBSA285_ADDIN is not set
+# CONFIG_ARCH_EBSA285_HOST is not set
+# CONFIG_ARCH_NETWINDER is not set
+
+#
+# SA11x0 Implementations
+#
+# CONFIG_SA1100_ASSABET is not set
+# CONFIG_ASSABET_NEPONSET is not set
+# CONFIG_SA1100_ADSBITSY is not set
+# CONFIG_SA1100_BRUTUS is not set
+# CONFIG_SA1100_CERF is not set
+# CONFIG_SA1100_H3100 is not set
+# CONFIG_SA1100_H3600 is not set
+# CONFIG_SA1100_H3800 is not set
+# CONFIG_SA1100_H3XXX is not set
+# CONFIG_SA1100_EXTENEX1 is not set
+# CONFIG_SA1100_FLEXANET is not set
+# CONFIG_SA1100_FREEBIRD is not set
+# CONFIG_SA1100_GRAPHICSCLIENT is not set
+# CONFIG_SA1100_GRAPHICSMASTER is not set
+# CONFIG_SA1100_BADGE4 is not set
+# CONFIG_SA1100_JORNADA720 is not set
+# CONFIG_SA1100_HUW_WEBPANEL is not set
+# CONFIG_SA1100_ITSY is not set
+# CONFIG_SA1100_LART is not set
+# CONFIG_SA1100_NANOENGINE is not set
+# CONFIG_SA1100_OMNIMETER is not set
+# CONFIG_SA1100_PANGOLIN is not set
+# CONFIG_SA1100_PLEB is not set
+# CONFIG_SA1100_PT_SYSTEM3 is not set
+# CONFIG_SA1100_SHANNON is not set
+# CONFIG_SA1100_SHERMAN is not set
+# CONFIG_SA1100_SIMPAD is not set
+# CONFIG_SA1100_PFS168 is not set
+# CONFIG_SA1100_VICTOR is not set
+# CONFIG_SA1100_XP860 is not set
+# CONFIG_SA1100_YOPY is not set
+CONFIG_SA1100_FRODO=y
+# CONFIG_SA1100_USB is not set
+# CONFIG_SA1100_USB_NETLINK is not set
+# CONFIG_SA1100_USB_CHAR is not set
+# CONFIG_H3600_SLEEVE is not set
+
+#
+# CLPS711X/EP721X Implementations
+#
+# CONFIG_ARCH_AUTCPU12 is not set
+# CONFIG_ARCH_CDB89712 is not set
+# CONFIG_ARCH_CLEP7312 is not set
+# CONFIG_ARCH_EDB7211 is not set
+# CONFIG_ARCH_P720T is not set
+# CONFIG_ARCH_FORTUNET is not set
+# CONFIG_ARCH_EP7211 is not set
+# CONFIG_ARCH_EP7212 is not set
+# CONFIG_ARCH_ACORN is not set
+# CONFIG_FOOTBRIDGE is not set
+# CONFIG_FOOTBRIDGE_HOST is not set
+# CONFIG_FOOTBRIDGE_ADDIN is not set
+CONFIG_CPU_32=y
+# CONFIG_CPU_26 is not set
+# CONFIG_CPU_32v3 is not set
+CONFIG_CPU_32v4=y
+# CONFIG_CPU_ARM610 is not set
+# CONFIG_CPU_ARM710 is not set
+# CONFIG_CPU_ARM720T is not set
+# CONFIG_CPU_ARM920T is not set
+# CONFIG_CPU_ARM922T is not set
+# CONFIG_CPU_ARM926T is not set
+# CONFIG_CPU_ARM1020 is not set
+# CONFIG_CPU_SA110 is not set
+CONFIG_CPU_SA1100=y
+# CONFIG_ARM_THUMB is not set
+CONFIG_DISCONTIGMEM=y
+
+#
+# General setup
+#
+# CONFIG_PCI is not set
+CONFIG_ISA=y
+# CONFIG_ISA_DMA is not set
+# CONFIG_CPU_FREQ is not set
+# CONFIG_HOTPLUG is not set
+# CONFIG_PCMCIA is not set
+CONFIG_NET=y
+CONFIG_SYSVIPC=y
+# CONFIG_BSD_PROCESS_ACCT is not set
+CONFIG_SYSCTL=y
+# CONFIG_FPE_NWFPE is not set
+CONFIG_FPE_FASTFPE=y
+CONFIG_KCORE_ELF=y
+# CONFIG_KCORE_AOUT is not set
+# CONFIG_BINFMT_AOUT is not set
+CONFIG_BINFMT_ELF=y
+# CONFIG_BINFMT_MISC is not set
+# CONFIG_PM is not set
+# CONFIG_ARTHUR is not set
+CONFIG_CMDLINE="console=ttySA0,9600 ramdisk_size=4096 root=/dev/ram idebus=33"
+CONFIG_LEDS=y
+CONFIG_LEDS_TIMER=y
+CONFIG_LEDS_CPU=y
+CONFIG_ALIGNMENT_TRAP=y
+
+#
+# Parallel port support
+#
+# CONFIG_PARPORT is not set
+
+#
+# Memory Technology Devices (MTD)
+#
+# CONFIG_MTD is not set
+
+#
+# Plug and Play configuration
+#
+# CONFIG_PNP is not set
+# CONFIG_ISAPNP is not set
+
+#
+# Block devices
+#
+# CONFIG_BLK_DEV_FD is not set
+# CONFIG_BLK_DEV_XD is not set
+# CONFIG_PARIDE is not set
+# CONFIG_BLK_CPQ_DA is not set
+# CONFIG_BLK_CPQ_CISS_DA is not set
+# CONFIG_BLK_DEV_DAC960 is not set
+# CONFIG_BLK_DEV_LOOP is not set
+# CONFIG_BLK_DEV_NBD is not set
+CONFIG_BLK_DEV_RAM=y
+CONFIG_BLK_DEV_RAM_SIZE=4096
+CONFIG_BLK_DEV_INITRD=y
+
+#
+# Multi-device support (RAID and LVM)
+#
+# CONFIG_MD is not set
+# CONFIG_BLK_DEV_MD is not set
+# CONFIG_MD_LINEAR is not set
+# CONFIG_MD_RAID0 is not set
+# CONFIG_MD_RAID1 is not set
+# CONFIG_MD_RAID5 is not set
+# CONFIG_MD_MULTIPATH is not set
+# CONFIG_BLK_DEV_LVM is not set
+
+#
+# Networking options
+#
+# CONFIG_PACKET is not set
+# CONFIG_NETLINK_DEV is not set
+# CONFIG_NETFILTER is not set
+# CONFIG_FILTER is not set
+CONFIG_UNIX=y
+CONFIG_INET=y
+# CONFIG_IP_MULTICAST is not set
+# CONFIG_IP_ADVANCED_ROUTER is not set
+# CONFIG_IP_PNP is not set
+# CONFIG_NET_IPIP is not set
+# CONFIG_NET_IPGRE is not set
+# CONFIG_ARPD is not set
+# CONFIG_INET_ECN is not set
+# CONFIG_SYN_COOKIES is not set
+# CONFIG_IPV6 is not set
+# CONFIG_KHTTPD is not set
+# CONFIG_ATM is not set
+# CONFIG_VLAN_8021Q is not set
+# CONFIG_IPX is not set
+# CONFIG_ATALK is not set
+# CONFIG_DECNET is not set
+# CONFIG_BRIDGE is not set
+# CONFIG_X25 is not set
+# CONFIG_LAPB is not set
+# CONFIG_LLC is not set
+# CONFIG_NET_DIVERT is not set
+# CONFIG_ECONET is not set
+# CONFIG_WAN_ROUTER is not set
+# CONFIG_NET_FASTROUTE is not set
+# CONFIG_NET_HW_FLOWCONTROL is not set
+
+#
+# QoS and/or fair queueing
+#
+# CONFIG_NET_SCHED is not set
+
+#
+# Network device support
+#
+# CONFIG_NETDEVICES is not set
+
+#
+# Amateur Radio support
+#
+# CONFIG_HAMRADIO is not set
+
+#
+# IrDA (infrared) support
+#
+# CONFIG_IRDA is not set
+
+#
+# ATA/IDE/MFM/RLL support
+#
+CONFIG_IDE=y
+
+#
+# IDE, ATA and ATAPI Block devices
+#
+CONFIG_BLK_DEV_IDE=y
+# CONFIG_BLK_DEV_HD_IDE is not set
+# CONFIG_BLK_DEV_HD is not set
+CONFIG_BLK_DEV_IDEDISK=y
+# CONFIG_IDEDISK_MULTI_MODE is not set
+# CONFIG_BLK_DEV_IDEDISK_VENDOR is not set
+# CONFIG_BLK_DEV_IDEDISK_FUJITSU is not set
+# CONFIG_BLK_DEV_IDEDISK_IBM is not set
+# CONFIG_BLK_DEV_IDEDISK_MAXTOR is not set
+# CONFIG_BLK_DEV_IDEDISK_QUANTUM is not set
+# CONFIG_BLK_DEV_IDEDISK_SEAGATE is not set
+# CONFIG_BLK_DEV_IDEDISK_WD is not set
+# CONFIG_BLK_DEV_COMMERIAL is not set
+# CONFIG_BLK_DEV_TIVO is not set
+# CONFIG_BLK_DEV_IDECS is not set
+CONFIG_BLK_DEV_IDECD=y
+# CONFIG_BLK_DEV_IDETAPE is not set
+# CONFIG_BLK_DEV_IDEFLOPPY is not set
+# CONFIG_BLK_DEV_IDESCSI is not set
+# CONFIG_BLK_DEV_CMD640 is not set
+# CONFIG_BLK_DEV_CMD640_ENHANCED is not set
+# CONFIG_BLK_DEV_ISAPNP is not set
+# CONFIG_IDE_CHIPSETS is not set
+# CONFIG_IDEDMA_AUTO is not set
+# CONFIG_DMA_NONPCI is not set
+# CONFIG_BLK_DEV_IDE_MODES is not set
+# CONFIG_BLK_DEV_ATARAID is not set
+# CONFIG_BLK_DEV_ATARAID_PDC is not set
+# CONFIG_BLK_DEV_ATARAID_HPT is not set
+
+#
+# SCSI support
+#
+# CONFIG_SCSI is not set
+
+#
+# I2O device support
+#
+# CONFIG_I2O is not set
+# CONFIG_I2O_BLOCK is not set
+# CONFIG_I2O_LAN is not set
+# CONFIG_I2O_SCSI is not set
+# CONFIG_I2O_PROC is not set
+
+#
+# ISDN subsystem
+#
+# CONFIG_ISDN is not set
+
+#
+# Input core support
+#
+# CONFIG_INPUT is not set
+# CONFIG_INPUT_KEYBDEV is not set
+# CONFIG_INPUT_MOUSEDEV is not set
+# CONFIG_INPUT_JOYDEV is not set
+# CONFIG_INPUT_EVDEV is not set
+
+#
+# Character devices
+#
+CONFIG_VT=y
+CONFIG_VT_CONSOLE=y
+# CONFIG_SERIAL is not set
+# CONFIG_SERIAL_EXTENDED is not set
+# CONFIG_SERIAL_NONSTANDARD is not set
+
+#
+# Serial drivers
+#
+# CONFIG_SERIAL_ANAKIN is not set
+# CONFIG_SERIAL_ANAKIN_CONSOLE is not set
+# CONFIG_SERIAL_AMBA is not set
+# CONFIG_SERIAL_AMBA_CONSOLE is not set
+# CONFIG_SERIAL_CLPS711X is not set
+# CONFIG_SERIAL_CLPS711X_CONSOLE is not set
+# CONFIG_SERIAL_21285 is not set
+# CONFIG_SERIAL_21285_OLD is not set
+# CONFIG_SERIAL_21285_CONSOLE is not set
+# CONFIG_SERIAL_UART00 is not set
+# CONFIG_SERIAL_UART00_CONSOLE is not set
+CONFIG_SERIAL_SA1100=y
+CONFIG_SERIAL_SA1100_CONSOLE=y
+CONFIG_SA1100_DEFAULT_BAUDRATE=9600
+# CONFIG_SERIAL_8250 is not set
+# CONFIG_SERIAL_8250_CONSOLE is not set
+# CONFIG_SERIAL_8250_EXTENDED is not set
+# CONFIG_SERIAL_8250_MANY_PORTS is not set
+# CONFIG_SERIAL_8250_SHARE_IRQ is not set
+# CONFIG_SERIAL_8250_DETECT_IRQ is not set
+# CONFIG_SERIAL_8250_MULTIPORT is not set
+# CONFIG_SERIAL_8250_HUB6 is not set
+CONFIG_SERIAL_CORE=y
+CONFIG_SERIAL_CORE_CONSOLE=y
+CONFIG_UNIX98_PTYS=y
+CONFIG_UNIX98_PTY_COUNT=16
+
+#
+# I2C support
+#
+# CONFIG_I2C is not set
+
+#
+# L3 serial bus support
+#
+# CONFIG_L3 is not set
+# CONFIG_L3_ALGOBIT is not set
+# CONFIG_L3_BIT_SA1100_GPIO is not set
+# CONFIG_L3_SA1111 is not set
+# CONFIG_BIT_SA1100_GPIO is not set
+
+#
+# Mice
+#
+# CONFIG_BUSMOUSE is not set
+# CONFIG_MOUSE is not set
+
+#
+# Joysticks
+#
+# CONFIG_INPUT_GAMEPORT is not set
+# CONFIG_QIC02_TAPE is not set
+
+#
+# Watchdog Cards
+#
+# CONFIG_WATCHDOG is not set
+# CONFIG_INTEL_RNG is not set
+# CONFIG_NVRAM is not set
+# CONFIG_RTC is not set
+CONFIG_SA1100_RTC=y
+# CONFIG_DTLK is not set
+# CONFIG_R3964 is not set
+# CONFIG_APPLICOM is not set
+
+#
+# Ftape, the floppy tape device driver
+#
+# CONFIG_FTAPE is not set
+# CONFIG_AGP is not set
+# CONFIG_DRM is not set
+
+#
+# Multimedia devices
+#
+# CONFIG_VIDEO_DEV is not set
+
+#
+# File systems
+#
+# CONFIG_QUOTA is not set
+# CONFIG_AUTOFS_FS is not set
+# CONFIG_AUTOFS4_FS is not set
+# CONFIG_REISERFS_FS is not set
+# CONFIG_REISERFS_CHECK is not set
+# CONFIG_REISERFS_PROC_INFO is not set
+# CONFIG_ADFS_FS is not set
+# CONFIG_ADFS_FS_RW is not set
+# CONFIG_AFFS_FS is not set
+# CONFIG_HFS_FS is not set
+# CONFIG_BFS_FS is not set
+# CONFIG_EXT3_FS is not set
+# CONFIG_JBD is not set
+# CONFIG_JBD_DEBUG is not set
+# CONFIG_FAT_FS is not set
+# CONFIG_MSDOS_FS is not set
+# CONFIG_UMSDOS_FS is not set
+# CONFIG_VFAT_FS is not set
+# CONFIG_EFS_FS is not set
+# CONFIG_JFFS_FS is not set
+# CONFIG_JFFS2_FS is not set
+# CONFIG_CRAMFS is not set
+# CONFIG_TMPFS is not set
+# CONFIG_RAMFS is not set
+# CONFIG_ISO9660_FS is not set
+# CONFIG_JOLIET is not set
+# CONFIG_ZISOFS is not set
+# CONFIG_MINIX_FS is not set
+# CONFIG_VXFS_FS is not set
+# CONFIG_NTFS_FS is not set
+# CONFIG_NTFS_RW is not set
+# CONFIG_HPFS_FS is not set
+CONFIG_PROC_FS=y
+# CONFIG_DEVFS_FS is not set
+# CONFIG_DEVFS_MOUNT is not set
+# CONFIG_DEVFS_DEBUG is not set
+CONFIG_DEVPTS_FS=y
+# CONFIG_QNX4FS_FS is not set
+# CONFIG_QNX4FS_RW is not set
+CONFIG_ROMFS_FS=y
+CONFIG_EXT2_FS=y
+# CONFIG_SYSV_FS is not set
+# CONFIG_UDF_FS is not set
+# CONFIG_UDF_RW is not set
+# CONFIG_UFS_FS is not set
+# CONFIG_UFS_FS_WRITE is not set
+
+#
+# Network File Systems
+#
+# CONFIG_CODA_FS is not set
+# CONFIG_INTERMEZZO_FS is not set
+# CONFIG_NFS_FS is not set
+# CONFIG_NFS_V3 is not set
+# CONFIG_ROOT_NFS is not set
+# CONFIG_NFSD is not set
+# CONFIG_NFSD_V3 is not set
+# CONFIG_SUNRPC is not set
+# CONFIG_LOCKD is not set
+# CONFIG_SMB_FS is not set
+# CONFIG_NCP_FS is not set
+# CONFIG_NCPFS_PACKET_SIGNING is not set
+# CONFIG_NCPFS_IOCTL_LOCKING is not set
+# CONFIG_NCPFS_STRONG is not set
+# CONFIG_NCPFS_NFS_NS is not set
+# CONFIG_NCPFS_OS2_NS is not set
+# CONFIG_NCPFS_SMALLDOS is not set
+# CONFIG_NCPFS_NLS is not set
+# CONFIG_NCPFS_EXTRAS is not set
+# CONFIG_ZISOFS_FS is not set
+# CONFIG_ZLIB_FS_INFLATE is not set
+
+#
+# Partition Types
+#
+# CONFIG_PARTITION_ADVANCED is not set
+CONFIG_MSDOS_PARTITION=y
+# CONFIG_SMB_NLS is not set
+# CONFIG_NLS is not set
+
+#
+# Console drivers
+#
+CONFIG_PC_KEYMAP=y
+# CONFIG_VGA_CONSOLE is not set
+
+#
+# Frame-buffer support
+#
+CONFIG_FB=y
+CONFIG_DUMMY_CONSOLE=y
+# CONFIG_FB_ACORN is not set
+# CONFIG_FB_ANAKIN is not set
+# CONFIG_FB_CLPS711X is not set
+CONFIG_FB_SA1100=y
+# CONFIG_FB_CYBER2000 is not set
+# CONFIG_FB_VIRTUAL is not set
+# CONFIG_FBCON_ADVANCED is not set
+CONFIG_FBCON_CFB2=y
+CONFIG_FBCON_CFB4=y
+CONFIG_FBCON_CFB8=y
+CONFIG_FBCON_CFB16=y
+# CONFIG_FBCON_FONTWIDTH8_ONLY is not set
+# CONFIG_FBCON_FONTS is not set
+CONFIG_FONT_8x8=y
+CONFIG_FONT_8x16=y
+
+#
+# Sound
+#
+# CONFIG_SOUND is not set
+
+#
+# Multimedia Capabilities Port drivers
+#
+# CONFIG_MCP is not set
+# CONFIG_MCP_SA1100 is not set
+# CONFIG_MCP_UCB1200 is not set
+# CONFIG_MCP_UCB1200_AUDIO is not set
+# CONFIG_MCP_UCB1200_TS is not set
+
+#
+# USB support
+#
+# CONFIG_USB is not set
+# CONFIG_USB_UHCI is not set
+# CONFIG_USB_UHCI_ALT is not set
+# CONFIG_USB_OHCI is not set
+# CONFIG_USB_OHCI_SA1111 is not set
+# CONFIG_USB_AUDIO is not set
+# CONFIG_USB_BLUETOOTH is not set
+# CONFIG_USB_STORAGE is not set
+# CONFIG_USB_STORAGE_DEBUG is not set
+# CONFIG_USB_STORAGE_DATAFAB is not set
+# CONFIG_USB_STORAGE_FREECOM is not set
+# CONFIG_USB_STORAGE_ISD200 is not set
+# CONFIG_USB_STORAGE_DPCM is not set
+# CONFIG_USB_STORAGE_HP8200e is not set
+# CONFIG_USB_STORAGE_SDDR09 is not set
+# CONFIG_USB_STORAGE_JUMPSHOT is not set
+# CONFIG_USB_ACM is not set
+# CONFIG_USB_PRINTER is not set
+# CONFIG_USB_DC2XX is not set
+# CONFIG_USB_MDC800 is not set
+# CONFIG_USB_SCANNER is not set
+# CONFIG_USB_MICROTEK is not set
+# CONFIG_USB_HPUSBSCSI is not set
+# CONFIG_USB_PEGASUS is not set
+# CONFIG_USB_KAWETH is not set
+# CONFIG_USB_CATC is not set
+# CONFIG_USB_CDCETHER is not set
+# CONFIG_USB_USBNET is not set
+# CONFIG_USB_USS720 is not set
+
+#
+# USB Serial Converter support
+#
+# CONFIG_USB_SERIAL is not set
+# CONFIG_USB_SERIAL_GENERIC is not set
+# CONFIG_USB_SERIAL_BELKIN is not set
+# CONFIG_USB_SERIAL_WHITEHEAT is not set
+# CONFIG_USB_SERIAL_DIGI_ACCELEPORT is not set
+# CONFIG_USB_SERIAL_EMPEG is not set
+# CONFIG_USB_SERIAL_FTDI_SIO is not set
+# CONFIG_USB_SERIAL_VISOR is not set
+# CONFIG_USB_SERIAL_IR is not set
+# CONFIG_USB_SERIAL_EDGEPORT is not set
+# CONFIG_USB_SERIAL_KEYSPAN_PDA is not set
+# CONFIG_USB_SERIAL_KEYSPAN is not set
+# CONFIG_USB_SERIAL_KEYSPAN_USA28 is not set
+# CONFIG_USB_SERIAL_KEYSPAN_USA28X is not set
+# CONFIG_USB_SERIAL_KEYSPAN_USA28XA is not set
+# CONFIG_USB_SERIAL_KEYSPAN_USA28XB is not set
+# CONFIG_USB_SERIAL_KEYSPAN_USA19 is not set
+# CONFIG_USB_SERIAL_KEYSPAN_USA18X is not set
+# CONFIG_USB_SERIAL_KEYSPAN_USA19W is not set
+# CONFIG_USB_SERIAL_KEYSPAN_USA49W is not set
+# CONFIG_USB_SERIAL_MCT_U232 is not set
+# CONFIG_USB_SERIAL_PL2303 is not set
+# CONFIG_USB_SERIAL_CYBERJACK is not set
+# CONFIG_USB_SERIAL_XIRCOM is not set
+# CONFIG_USB_SERIAL_OMNINET is not set
+# CONFIG_USB_RIO500 is not set
+
+#
+# Bluetooth support
+#
+# CONFIG_BLUEZ is not set
+
+#
+# Kernel hacking
+#
+# CONFIG_NO_FRAME_POINTER is not set
+CONFIG_DEBUG_USER=y
+# CONFIG_DEBUG_INFO is not set
+# CONFIG_NO_PGT_CACHE is not set
+CONFIG_DEBUG_KERNEL=y
+CONFIG_DEBUG_SLAB=y
+CONFIG_MAGIC_SYSRQ=y
+CONFIG_DEBUG_SPINLOCK=y
+CONFIG_DEBUG_WAITQ=y
+CONFIG_DEBUG_BUGVERBOSE=y
+CONFIG_DEBUG_ERRORS=y
+CONFIG_DEBUG_LL=y
+# CONFIG_DEBUG_DC21285_PORT is not set
+# CONFIG_DEBUG_CLPS711X_UART2 is not set
diff -Nru linux/arch/arm/def-configs/jornada720 linux-2.4.19-pre5-mjc/arch/arm/def-configs/jornada720
--- linux/arch/arm/def-configs/jornada720	Sun Aug 12 14:13:59 2001
+++ linux-2.4.19-pre5-mjc/arch/arm/def-configs/jornada720	Sat Apr  6 08:25:57 2002
@@ -1,11 +1,15 @@
 #
-# Automatically generated make config: don't edit
+# Automatically generated by make menuconfig: don't edit
 #
 CONFIG_ARM=y
 # CONFIG_EISA is not set
 # CONFIG_SBUS is not set
 # CONFIG_MCA is not set
 CONFIG_UID16=y
+CONFIG_RWSEM_GENERIC_SPINLOCK=y
+# CONFIG_RWSEM_XCHGADD_ALGORITHM is not set
+# CONFIG_GENERIC_BUST_SPINLOCK is not set
+# CONFIG_GENERIC_ISA_DMA is not set
 
 #
 # Code maturity level options
@@ -23,24 +27,23 @@
 #
 # System Type
 #
+# CONFIG_ARCH_ANAKIN is not set
 # CONFIG_ARCH_ARCA5K is not set
 # CONFIG_ARCH_CLPS7500 is not set
+# CONFIG_ARCH_CLPS711X is not set
 # CONFIG_ARCH_CO285 is not set
 # CONFIG_ARCH_EBSA110 is not set
-# CONFIG_ARCH_L7200 is not set
+# CONFIG_ARCH_CAMELOT is not set
 # CONFIG_ARCH_FOOTBRIDGE is not set
 # CONFIG_ARCH_INTEGRATOR is not set
+# CONFIG_ARCH_L7200 is not set
 # CONFIG_ARCH_RPC is not set
 CONFIG_ARCH_SA1100=y
-# CONFIG_ARCH_CLPS711X is not set
+# CONFIG_ARCH_SHARK is not set
 
 #
 # Archimedes/A5000 Implementations
 #
-
-#
-# Archimedes/A5000 Implementations (select only ONE)
-#
 # CONFIG_ARCH_ARC is not set
 # CONFIG_ARCH_A5K is not set
 
@@ -58,12 +61,18 @@
 #
 # CONFIG_SA1100_ASSABET is not set
 # CONFIG_ASSABET_NEPONSET is not set
+# CONFIG_SA1100_ADSBITSY is not set
 # CONFIG_SA1100_BRUTUS is not set
 # CONFIG_SA1100_CERF is not set
-# CONFIG_SA1100_BITSY is not set
+# CONFIG_SA1100_H3100 is not set
+# CONFIG_SA1100_H3600 is not set
+# CONFIG_SA1100_H3800 is not set
+# CONFIG_SA1100_H3XXX is not set
 # CONFIG_SA1100_EXTENEX1 is not set
+# CONFIG_SA1100_FLEXANET is not set
 # CONFIG_SA1100_FREEBIRD is not set
 # CONFIG_SA1100_GRAPHICSCLIENT is not set
+# CONFIG_SA1100_GRAPHICSMASTER is not set
 CONFIG_SA1100_JORNADA720=y
 # CONFIG_SA1100_HUW_WEBPANEL is not set
 # CONFIG_SA1100_ITSY is not set
@@ -72,70 +81,75 @@
 # CONFIG_SA1100_OMNIMETER is not set
 # CONFIG_SA1100_PANGOLIN is not set
 # CONFIG_SA1100_PLEB is not set
+# CONFIG_SA1100_SHANNON is not set
 # CONFIG_SA1100_SHERMAN is not set
+# CONFIG_SA1100_SIMPAD is not set
 # CONFIG_SA1100_PFS168 is not set
 # CONFIG_SA1100_VICTOR is not set
 # CONFIG_SA1100_XP860 is not set
 # CONFIG_SA1100_YOPY is not set
 CONFIG_SA1111=y
+CONFIG_FORCE_MAX_ZONEORDER=9
 # CONFIG_SA1100_USB is not set
 # CONFIG_SA1100_USB_NETLINK is not set
 # CONFIG_SA1100_USB_CHAR is not set
-# CONFIG_SA1100_FREQUENCY_SCALE is not set
-# CONFIG_SA1100_VOLTAGE_SCALE is not set
+# CONFIG_REGISTERS is not set
 
 #
 # CLPS711X/EP721X Implementations
 #
+# CONFIG_ARCH_AUTCPU12 is not set
+# CONFIG_ARCH_CDB89712 is not set
+# CONFIG_ARCH_CLEP7312 is not set
+# CONFIG_ARCH_EDB7211 is not set
 # CONFIG_ARCH_P720T is not set
+# CONFIG_ARCH_EP7211 is not set
+# CONFIG_ARCH_EP7212 is not set
 # CONFIG_ARCH_ACORN is not set
 # CONFIG_FOOTBRIDGE is not set
 # CONFIG_FOOTBRIDGE_HOST is not set
 # CONFIG_FOOTBRIDGE_ADDIN is not set
 CONFIG_CPU_32=y
 # CONFIG_CPU_26 is not set
-
-#
-# Processor Type
-#
 # CONFIG_CPU_32v3 is not set
 CONFIG_CPU_32v4=y
 # CONFIG_CPU_ARM610 is not set
 # CONFIG_CPU_ARM710 is not set
 # CONFIG_CPU_ARM720T is not set
 # CONFIG_CPU_ARM920T is not set
+# CONFIG_CPU_ARM922T is not set
+# CONFIG_CPU_ARM926T is not set
 # CONFIG_CPU_ARM1020 is not set
 # CONFIG_CPU_SA110 is not set
 CONFIG_CPU_SA1100=y
+# CONFIG_ARM_THUMB is not set
 CONFIG_DISCONTIGMEM=y
 
 #
 # General setup
 #
-
-#
-# Please ensure that you have read the help on the next option
-#
-# CONFIG_ANGELBOOT is not set
 # CONFIG_PCI is not set
-# CONFIG_ISA is not set
+CONFIG_ISA=y
 # CONFIG_ISA_DMA is not set
+# CONFIG_CPU_FREQ is not set
 CONFIG_HOTPLUG=y
 
 #
 # PCMCIA/CardBus support
 #
 CONFIG_PCMCIA=y
+# CONFIG_I82092 is not set
 # CONFIG_I82365 is not set
 # CONFIG_TCIC is not set
 # CONFIG_PCMCIA_CLPS6700 is not set
 CONFIG_PCMCIA_SA1100=y
+# CONFIG_MERCURY_BACKPAQ is not set
 CONFIG_NET=y
 CONFIG_SYSVIPC=y
 # CONFIG_BSD_PROCESS_ACCT is not set
 CONFIG_SYSCTL=y
 CONFIG_FPE_NWFPE=y
-# CONFIG_FPE_FASTFPE is not set
+CONFIG_FPE_FASTFPE=y
 CONFIG_KCORE_ELF=y
 # CONFIG_KCORE_AOUT is not set
 CONFIG_BINFMT_AOUT=m
@@ -145,10 +159,8 @@
 # CONFIG_APM is not set
 # CONFIG_ARTHUR is not set
 CONFIG_CMDLINE="keepinitrd"
-# CONFIG_PFS168_CMDLINE is not set
 # CONFIG_LEDS is not set
-# CONFIG_ALIGNMENT_TRAP is not set
-# CONFIG_UCB1200 is not set
+CONFIG_ALIGNMENT_TRAP=y
 
 #
 # Parallel port support
@@ -159,63 +171,72 @@
 # Memory Technology Devices (MTD)
 #
 CONFIG_MTD=y
-# CONFIG_MTD_DEBUG is not set
-
-#
-# Disk-On-Chip Device Drivers
-#
-# CONFIG_MTD_DOC1000 is not set
-# CONFIG_MTD_DOC2000 is not set
-# CONFIG_MTD_DOC2001 is not set
-# CONFIG_MTD_DOCPROBE is not set
-
-#
-# RAM/ROM Device Drivers
-#
-# CONFIG_MTD_PMC551 is not set
-# CONFIG_MTD_SLRAM is not set
-# CONFIG_MTD_RAM is not set
-# CONFIG_MTD_ROM is not set
-# CONFIG_MTD_MTDRAM is not set
+CONFIG_MTD_DEBUG=y
+CONFIG_MTD_DEBUG_VERBOSE=1
+CONFIG_MTD_PARTITIONS=y
+# CONFIG_MTD_REDBOOT_PARTS is not set
+CONFIG_MTD_BOOTLDR_PARTS=y
+# CONFIG_MTD_AFS_PARTS is not set
+CONFIG_MTD_CHAR=m
+CONFIG_MTD_BLOCK=y
+# CONFIG_FTL is not set
+# CONFIG_NFTL is not set
 
 #
-# Linearly Mapped Flash Device Drivers
+# RAM/ROM/Flash chip drivers
 #
 CONFIG_MTD_CFI=y
-# CONFIG_MTD_CFI_ADV_OPTIONS is not set
+# CONFIG_MTD_JEDECPROBE is not set
+CONFIG_MTD_GEN_PROBE=y
+CONFIG_MTD_CFI_ADV_OPTIONS=y
+CONFIG_MTD_CFI_NOSWAP=y
+# CONFIG_MTD_CFI_BE_BYTE_SWAP is not set
+# CONFIG_MTD_CFI_LE_BYTE_SWAP is not set
+CONFIG_MTD_CFI_GEOMETRY=y
+# CONFIG_MTD_CFI_B1 is not set
+CONFIG_MTD_CFI_B2=y
+CONFIG_MTD_CFI_B4=y
+CONFIG_MTD_CFI_I1=y
+CONFIG_MTD_CFI_I2=y
+# CONFIG_MTD_CFI_I4 is not set
 CONFIG_MTD_CFI_INTELEXT=y
 # CONFIG_MTD_CFI_AMDSTD is not set
+# CONFIG_MTD_RAM is not set
+# CONFIG_MTD_ROM is not set
+# CONFIG_MTD_ABSENT is not set
+# CONFIG_MTD_OBSOLETE_CHIPS is not set
 # CONFIG_MTD_AMDSTD is not set
 # CONFIG_MTD_SHARP is not set
+# CONFIG_MTD_JEDEC is not set
+
+#
+# Mapping drivers for chip access
+#
 # CONFIG_MTD_PHYSMAP is not set
 # CONFIG_MTD_NORA is not set
-# CONFIG_MTD_PNC2000 is not set
-# CONFIG_MTD_RPXLITE is not set
-# CONFIG_MTD_SC520CDP is not set
-# CONFIG_MTD_SBC_MEDIAGX is not set
-# CONFIG_MTD_ELAN_104NC is not set
+# CONFIG_MTD_ARM_INTEGRATOR is not set
+# CONFIG_MTD_CDB89712 is not set
 CONFIG_MTD_SA1100=y
+# CONFIG_MTD_H3600_BACKPAQ is not set
 # CONFIG_MTD_DC21285 is not set
 # CONFIG_MTD_IQ80310 is not set
-# CONFIG_MTD_CSTM_CFI_JEDEC is not set
-# CONFIG_MTD_JEDEC is not set
-# CONFIG_MTD_MIXMEM is not set
-# CONFIG_MTD_OCTAGON is not set
-# CONFIG_MTD_VMAX is not set
 
 #
-# NAND Flash Device Drivers
+# Self-contained MTD device drivers
 #
-# CONFIG_MTD_NAND is not set
-# CONFIG_MTD_NAND_SPIA is not set
+# CONFIG_MTD_PMC551 is not set
+# CONFIG_MTD_SLRAM is not set
+# CONFIG_MTD_MTDRAM is not set
+# CONFIG_MTD_BLKMTD is not set
+# CONFIG_MTD_DOC1000 is not set
+# CONFIG_MTD_DOC2000 is not set
+# CONFIG_MTD_DOC2001 is not set
+# CONFIG_MTD_DOCPROBE is not set
 
 #
-# User Modules And Translation Layers
+# NAND Flash Device Drivers
 #
-CONFIG_MTD_CHAR=y
-CONFIG_MTD_BLOCK=y
-# CONFIG_FTL is not set
-# CONFIG_NFTL is not set
+# CONFIG_MTD_NAND is not set
 
 #
 # Plug and Play configuration
@@ -246,6 +267,7 @@
 # CONFIG_MD_RAID0 is not set
 # CONFIG_MD_RAID1 is not set
 # CONFIG_MD_RAID5 is not set
+# CONFIG_MD_MULTIPATH is not set
 # CONFIG_BLK_DEV_LVM is not set
 
 #
@@ -258,7 +280,7 @@
 # CONFIG_NETLINK_DEV is not set
 CONFIG_NETFILTER=y
 # CONFIG_NETFILTER_DEBUG is not set
-# CONFIG_FILTER is not set
+CONFIG_FILTER=y
 CONFIG_UNIX=y
 CONFIG_INET=y
 CONFIG_IP_MULTICAST=y
@@ -282,10 +304,7 @@
 # CONFIG_IPV6 is not set
 # CONFIG_KHTTPD is not set
 # CONFIG_ATM is not set
-
-#
-#
-#
+# CONFIG_VLAN_8021Q is not set
 # CONFIG_IPX is not set
 # CONFIG_ATALK is not set
 # CONFIG_DECNET is not set
@@ -318,7 +337,6 @@
 # CONFIG_EQUALIZER is not set
 # CONFIG_TUN is not set
 # CONFIG_ETHERTAP is not set
-# CONFIG_NET_SB1000 is not set
 
 #
 # Ethernet (10 or 100Mbit)
@@ -329,18 +347,44 @@
 # Ethernet (1000 Mbit)
 #
 # CONFIG_ACENIC is not set
+# CONFIG_DL2K is not set
+# CONFIG_MYRI_SBUS is not set
+# CONFIG_NS83820 is not set
 # CONFIG_HAMACHI is not set
 # CONFIG_YELLOWFIN is not set
 # CONFIG_SK98LIN is not set
 # CONFIG_FDDI is not set
 # CONFIG_HIPPI is not set
-# CONFIG_PPP is not set
+# CONFIG_PLIP is not set
+CONFIG_PPP=m
+# CONFIG_PPP_MULTILINK is not set
+# CONFIG_PPP_FILTER is not set
+CONFIG_PPP_ASYNC=m
+# CONFIG_PPP_SYNC_TTY is not set
+CONFIG_PPP_DEFLATE=m
+CONFIG_PPP_BSDCOMP=m
+# CONFIG_PPPOE is not set
 # CONFIG_SLIP is not set
 
 #
 # Wireless LAN (non-hamradio)
 #
-# CONFIG_NET_RADIO is not set
+CONFIG_NET_RADIO=y
+# CONFIG_STRIP is not set
+CONFIG_WAVELAN=m
+CONFIG_ARLAN=m
+CONFIG_AIRONET4500=m
+CONFIG_AIRONET4500_NONCS=m
+# CONFIG_AIRONET4500_PNP is not set
+# CONFIG_AIRONET4500_PCI is not set
+# CONFIG_AIRONET4500_ISA is not set
+# CONFIG_AIRONET4500_I365 is not set
+# CONFIG_AIRONET4500_PROC is not set
+# CONFIG_AIRO is not set
+CONFIG_HERMES=m
+CONFIG_PCMCIA_HERMES=m
+CONFIG_AIRO_CS=m
+CONFIG_NET_WIRELESS=y
 
 #
 # Token Ring devices
@@ -366,11 +410,11 @@
 CONFIG_PCMCIA_NMCLAN=m
 CONFIG_PCMCIA_SMC91C92=m
 CONFIG_PCMCIA_XIRC2PS=m
+# CONFIG_PCMCIA_AXNET is not set
 # CONFIG_ARCNET_COM20020_CS is not set
 # CONFIG_PCMCIA_IBMTR is not set
 CONFIG_NET_PCMCIA_RADIO=y
 # CONFIG_PCMCIA_RAYCS is not set
-# CONFIG_PCMCIA_HERMES is not set
 # CONFIG_PCMCIA_NETWAVE is not set
 CONFIG_PCMCIA_WAVELAN=m
 CONFIG_AIRONET4500_CS=m
@@ -384,10 +428,6 @@
 # IrDA (infrared) support
 #
 CONFIG_IRDA=m
-
-#
-# IrDA protocols
-#
 CONFIG_IRLAN=m
 # CONFIG_IRNET is not set
 CONFIG_IRCOMM=m
@@ -397,28 +437,19 @@
 #
 # Infrared-port device drivers
 #
-
-#
-# SIR device drivers
-#
 # CONFIG_IRTTY_SIR is not set
 # CONFIG_IRPORT_SIR is not set
-
-#
-# FIR device drivers
-#
+# CONFIG_DONGLE is not set
+# CONFIG_USB_IRDA is not set
 # CONFIG_NSC_FIR is not set
 # CONFIG_WINBOND_FIR is not set
 # CONFIG_TOSHIBA_FIR is not set
 # CONFIG_SMC_IRCC_FIR is not set
+# CONFIG_ALI_FIR is not set
+# CONFIG_VLSI_FIR is not set
 CONFIG_SA1100_FIR=m
 
 #
-# Dongle support
-#
-# CONFIG_DONGLE is not set
-
-#
 # ATA/IDE/MFM/RLL support
 #
 CONFIG_IDE=m
@@ -427,10 +458,6 @@
 # IDE, ATA and ATAPI Block devices
 #
 CONFIG_BLK_DEV_IDE=m
-
-#
-# Please see Documentation/ide.txt for help/info on IDE drives
-#
 # CONFIG_BLK_DEV_HD_IDE is not set
 # CONFIG_BLK_DEV_HD is not set
 CONFIG_BLK_DEV_IDEDISK=m
@@ -445,14 +472,10 @@
 # CONFIG_BLK_DEV_COMMERIAL is not set
 # CONFIG_BLK_DEV_TIVO is not set
 CONFIG_BLK_DEV_IDECS=m
-# CONFIG_BLK_DEV_IDECD is not set
+CONFIG_BLK_DEV_IDECD=m
 # CONFIG_BLK_DEV_IDETAPE is not set
 # CONFIG_BLK_DEV_IDEFLOPPY is not set
 # CONFIG_BLK_DEV_IDESCSI is not set
-
-#
-# IDE chipset support/bugfixes
-#
 # CONFIG_BLK_DEV_CMD640 is not set
 # CONFIG_BLK_DEV_CMD640_ENHANCED is not set
 # CONFIG_BLK_DEV_ISAPNP is not set
@@ -460,6 +483,9 @@
 # CONFIG_IDEDMA_AUTO is not set
 # CONFIG_DMA_NONPCI is not set
 # CONFIG_BLK_DEV_IDE_MODES is not set
+# CONFIG_BLK_DEV_ATARAID is not set
+# CONFIG_BLK_DEV_ATARAID_PDC is not set
+# CONFIG_BLK_DEV_ATARAID_HPT is not set
 
 #
 # SCSI support
@@ -483,7 +509,13 @@
 #
 # Input core support
 #
-# CONFIG_INPUT is not set
+CONFIG_INPUT=y
+# CONFIG_INPUT_KEYBDEV is not set
+CONFIG_INPUT_MOUSEDEV=y
+CONFIG_INPUT_MOUSEDEV_SCREEN_X=640
+CONFIG_INPUT_MOUSEDEV_SCREEN_Y=240
+# CONFIG_INPUT_JOYDEV is not set
+# CONFIG_INPUT_EVDEV is not set
 
 #
 # Character devices
@@ -493,19 +525,37 @@
 CONFIG_SERIAL=m
 # CONFIG_SERIAL_EXTENDED is not set
 # CONFIG_SERIAL_NONSTANDARD is not set
+
+#
+# Serial drivers
+#
+# CONFIG_SERIAL_ANAKIN is not set
+# CONFIG_SERIAL_ANAKIN_CONSOLE is not set
+# CONFIG_SERIAL_AMBA is not set
+# CONFIG_SERIAL_AMBA_CONSOLE is not set
+# CONFIG_SERIAL_CLPS711X is not set
+# CONFIG_SERIAL_CLPS711X_CONSOLE is not set
+# CONFIG_SERIAL_21285 is not set
+# CONFIG_SERIAL_21285_OLD is not set
+# CONFIG_SERIAL_21285_CONSOLE is not set
+# CONFIG_SERIAL_UART00 is not set
+# CONFIG_SERIAL_UART00_CONSOLE is not set
 CONFIG_SERIAL_SA1100=y
 CONFIG_SERIAL_SA1100_CONSOLE=y
 CONFIG_SA1100_DEFAULT_BAUDRATE=115200
-# CONFIG_TOUCHSCREEN_UCB1200 is not set
-# CONFIG_TOUCHSCREEN_BITSY is not set
-CONFIG_PROFILER=m
-# CONFIG_PFS168_SPI is not set
-# CONFIG_PFS168_DTMF is not set
-# CONFIG_PFS168_MISC is not set
+# CONFIG_SERIAL_8250 is not set
+# CONFIG_SERIAL_8250_CONSOLE is not set
+# CONFIG_SERIAL_8250_EXTENDED is not set
+# CONFIG_SERIAL_8250_MANY_PORTS is not set
+# CONFIG_SERIAL_8250_SHARE_IRQ is not set
+# CONFIG_SERIAL_8250_DETECT_IRQ is not set
+# CONFIG_SERIAL_8250_MULTIPORT is not set
+# CONFIG_SERIAL_8250_HUB6 is not set
 CONFIG_SERIAL_CORE=y
 CONFIG_SERIAL_CORE_CONSOLE=y
 CONFIG_UNIX98_PTYS=y
 CONFIG_UNIX98_PTY_COUNT=32
+# CONFIG_NEWTONKBD is not set
 
 #
 # I2C support
@@ -513,6 +563,15 @@
 # CONFIG_I2C is not set
 
 #
+# L3 serial bus support
+#
+# CONFIG_L3 is not set
+# CONFIG_L3_ALGOBIT is not set
+# CONFIG_L3_BIT_SA1100_GPIO is not set
+# CONFIG_L3_SA1111 is not set
+# CONFIG_BIT_SA1100_GPIO is not set
+
+#
 # Mice
 #
 # CONFIG_BUSMOUSE is not set
@@ -524,11 +583,33 @@
 #
 # Joysticks
 #
-# CONFIG_JOYSTICK is not set
-
-#
-# Input core support is needed for joysticks
-#
+# CONFIG_INPUT_GAMEPORT is not set
+# CONFIG_INPUT_NS558 is not set
+# CONFIG_INPUT_LIGHTNING is not set
+# CONFIG_INPUT_PCIGAME is not set
+# CONFIG_INPUT_CS461X is not set
+# CONFIG_INPUT_EMU10K1 is not set
+# CONFIG_INPUT_SERIO is not set
+# CONFIG_INPUT_SERPORT is not set
+# CONFIG_INPUT_ANALOG is not set
+# CONFIG_INPUT_A3D is not set
+# CONFIG_INPUT_ADI is not set
+# CONFIG_INPUT_COBRA is not set
+# CONFIG_INPUT_GF2K is not set
+# CONFIG_INPUT_GRIP is not set
+# CONFIG_INPUT_INTERACT is not set
+# CONFIG_INPUT_TMDC is not set
+# CONFIG_INPUT_SIDEWINDER is not set
+# CONFIG_INPUT_IFORCE_USB is not set
+# CONFIG_INPUT_IFORCE_232 is not set
+# CONFIG_INPUT_WARRIOR is not set
+# CONFIG_INPUT_MAGELLAN is not set
+# CONFIG_INPUT_SPACEORB is not set
+# CONFIG_INPUT_SPACEBALL is not set
+# CONFIG_INPUT_STINGER is not set
+# CONFIG_INPUT_DB9 is not set
+# CONFIG_INPUT_GAMECON is not set
+# CONFIG_INPUT_TURBOGRAFX is not set
 # CONFIG_QIC02_TAPE is not set
 
 #
@@ -553,12 +634,13 @@
 #
 # PCMCIA character devices
 #
-CONFIG_PCMCIA_SERIAL_CS=m
+# CONFIG_PCMCIA_SERIAL_CS is not set
 
 #
 # Multimedia devices
 #
 # CONFIG_VIDEO_DEV is not set
+# CONFIG_V4L2_DEV is not set
 
 #
 # File systems
@@ -568,37 +650,45 @@
 # CONFIG_AUTOFS4_FS is not set
 # CONFIG_REISERFS_FS is not set
 # CONFIG_REISERFS_CHECK is not set
+# CONFIG_REISERFS_PROC_INFO is not set
 # CONFIG_ADFS_FS is not set
 # CONFIG_ADFS_FS_RW is not set
 # CONFIG_AFFS_FS is not set
 # CONFIG_HFS_FS is not set
 # CONFIG_BFS_FS is not set
-CONFIG_FAT_FS=m
-CONFIG_MSDOS_FS=m
+# CONFIG_EXT3_FS is not set
+# CONFIG_JBD is not set
+# CONFIG_JBD_DEBUG is not set
+# CONFIG_FAT_FS is not set
+# CONFIG_MSDOS_FS is not set
 # CONFIG_UMSDOS_FS is not set
-CONFIG_VFAT_FS=m
+# CONFIG_VFAT_FS is not set
 # CONFIG_EFS_FS is not set
 # CONFIG_JFFS_FS is not set
-# CONFIG_JFFS2_FS is not set
-CONFIG_CRAMFS=y
+CONFIG_JFFS2_FS=y
+CONFIG_JFFS2_FS_DEBUG=2
+# CONFIG_CRAMFS is not set
+# CONFIG_TMPFS is not set
 CONFIG_RAMFS=y
-# CONFIG_ISO9660_FS is not set
+CONFIG_ISO9660_FS=m
 # CONFIG_JOLIET is not set
+# CONFIG_ZISOFS is not set
 # CONFIG_MINIX_FS is not set
+# CONFIG_VXFS_FS is not set
 # CONFIG_NTFS_FS is not set
 # CONFIG_NTFS_RW is not set
 # CONFIG_HPFS_FS is not set
 CONFIG_PROC_FS=y
-# CONFIG_DEVFS_FS is not set
-# CONFIG_DEVFS_MOUNT is not set
-# CONFIG_DEVFS_DEBUG is not set
+CONFIG_DEVFS_FS=y
+CONFIG_DEVFS_MOUNT=y
+CONFIG_DEVFS_DEBUG=y
+# CONFIG_DRIVERFS_FS is not set
 CONFIG_DEVPTS_FS=y
 # CONFIG_QNX4FS_FS is not set
 # CONFIG_QNX4FS_RW is not set
 # CONFIG_ROMFS_FS is not set
 CONFIG_EXT2_FS=y
 # CONFIG_SYSV_FS is not set
-# CONFIG_SYSV_FS_WRITE is not set
 # CONFIG_UDF_FS is not set
 # CONFIG_UDF_RW is not set
 # CONFIG_UFS_FS is not set
@@ -608,6 +698,7 @@
 # Network File Systems
 #
 # CONFIG_CODA_FS is not set
+# CONFIG_INTERMEZZO_FS is not set
 CONFIG_NFS_FS=m
 CONFIG_NFS_V3=y
 # CONFIG_ROOT_NFS is not set
@@ -616,8 +707,7 @@
 CONFIG_SUNRPC=m
 CONFIG_LOCKD=m
 CONFIG_LOCKD_V4=y
-CONFIG_SMB_FS=m
-# CONFIG_SMB_NLS_DEFAULT is not set
+# CONFIG_SMB_FS is not set
 # CONFIG_NCP_FS is not set
 # CONFIG_NCPFS_PACKET_SIGNING is not set
 # CONFIG_NCPFS_IOCTL_LOCKING is not set
@@ -627,59 +717,22 @@
 # CONFIG_NCPFS_SMALLDOS is not set
 # CONFIG_NCPFS_NLS is not set
 # CONFIG_NCPFS_EXTRAS is not set
+# CONFIG_ZISOFS_FS is not set
+# CONFIG_ZLIB_FS_INFLATE is not set
 
 #
 # Partition Types
 #
 # CONFIG_PARTITION_ADVANCED is not set
 CONFIG_MSDOS_PARTITION=y
-CONFIG_SMB_NLS=y
-CONFIG_NLS=y
-
-#
-# Native Language Support
-#
-CONFIG_NLS_DEFAULT="iso8859-1"
-CONFIG_NLS_CODEPAGE_437=y
-# CONFIG_NLS_CODEPAGE_737 is not set
-# CONFIG_NLS_CODEPAGE_775 is not set
-# CONFIG_NLS_CODEPAGE_850 is not set
-# CONFIG_NLS_CODEPAGE_852 is not set
-# CONFIG_NLS_CODEPAGE_855 is not set
-# CONFIG_NLS_CODEPAGE_857 is not set
-# CONFIG_NLS_CODEPAGE_860 is not set
-# CONFIG_NLS_CODEPAGE_861 is not set
-# CONFIG_NLS_CODEPAGE_862 is not set
-# CONFIG_NLS_CODEPAGE_863 is not set
-# CONFIG_NLS_CODEPAGE_864 is not set
-# CONFIG_NLS_CODEPAGE_865 is not set
-# CONFIG_NLS_CODEPAGE_866 is not set
-# CONFIG_NLS_CODEPAGE_869 is not set
-# CONFIG_NLS_CODEPAGE_874 is not set
-# CONFIG_NLS_CODEPAGE_932 is not set
-# CONFIG_NLS_CODEPAGE_936 is not set
-# CONFIG_NLS_CODEPAGE_949 is not set
-# CONFIG_NLS_CODEPAGE_950 is not set
-# CONFIG_NLS_ISO8859_1 is not set
-# CONFIG_NLS_ISO8859_2 is not set
-# CONFIG_NLS_ISO8859_3 is not set
-# CONFIG_NLS_ISO8859_4 is not set
-# CONFIG_NLS_ISO8859_5 is not set
-# CONFIG_NLS_ISO8859_6 is not set
-# CONFIG_NLS_ISO8859_7 is not set
-# CONFIG_NLS_ISO8859_8 is not set
-# CONFIG_NLS_ISO8859_9 is not set
-# CONFIG_NLS_ISO8859_14 is not set
-# CONFIG_NLS_ISO8859_15 is not set
-# CONFIG_NLS_KOI8_R is not set
-# CONFIG_NLS_UTF8 is not set
+# CONFIG_SMB_NLS is not set
+# CONFIG_NLS is not set
 
 #
 # Console drivers
 #
 CONFIG_PC_KEYMAP=y
 # CONFIG_VGA_CONSOLE is not set
-CONFIG_FB=y
 
 #
 # Frame-buffer support
@@ -687,16 +740,17 @@
 CONFIG_FB=y
 CONFIG_DUMMY_CONSOLE=y
 # CONFIG_FB_ACORN is not set
+# CONFIG_FB_ANAKIN is not set
 # CONFIG_FB_CLPS711X is not set
+# CONFIG_FB_SA1100 is not set
 CONFIG_FB_EPSON1356=y
 # CONFIG_FB_CYBER2000 is not set
-# CONFIG_FB_SA1100 is not set
 # CONFIG_FB_VIRTUAL is not set
 CONFIG_FBCON_ADVANCED=y
 # CONFIG_FBCON_MFB is not set
 # CONFIG_FBCON_CFB2 is not set
 # CONFIG_FBCON_CFB4 is not set
-CONFIG_FBCON_CFB8=y
+# CONFIG_FBCON_CFB8 is not set
 CONFIG_FBCON_CFB16=y
 # CONFIG_FBCON_CFB24 is not set
 # CONFIG_FBCON_CFB32 is not set
@@ -721,10 +775,10 @@
 # Sound
 #
 CONFIG_SOUND=m
-CONFIG_SOUND_UDA1341=m
-# CONFIG_SOUND_SA1100_SSP is not set
+# CONFIG_SOUND_BT878 is not set
 # CONFIG_SOUND_CMPCI is not set
 # CONFIG_SOUND_EMU10K1 is not set
+# CONFIG_MIDI_EMU10K1 is not set
 # CONFIG_SOUND_FUSION is not set
 # CONFIG_SOUND_CS4281 is not set
 # CONFIG_SOUND_ES1370 is not set
@@ -733,28 +787,121 @@
 # CONFIG_SOUND_MAESTRO is not set
 # CONFIG_SOUND_MAESTRO3 is not set
 # CONFIG_SOUND_ICH is not set
+# CONFIG_SOUND_RME96XX is not set
 # CONFIG_SOUND_SONICVIBES is not set
 # CONFIG_SOUND_TRIDENT is not set
 # CONFIG_SOUND_MSNDCLAS is not set
 # CONFIG_SOUND_MSNDPIN is not set
 # CONFIG_SOUND_VIA82CXXX is not set
+# CONFIG_MIDI_VIA82CXXX is not set
+CONFIG_SOUND_SA1100=m
+# CONFIG_SOUND_UDA1341 is not set
+# CONFIG_SOUND_ASSABET_UDA1341 is not set
+# CONFIG_SOUND_H3600_UDA1341 is not set
+# CONFIG_SOUND_PANGOLIN_UDA1341 is not set
+# CONFIG_SOUND_SA1111_UDA1341 is not set
+# CONFIG_SOUND_SA1100SSP is not set
 # CONFIG_SOUND_OSS is not set
+# CONFIG_SOUND_WAVEARTIST is not set
 # CONFIG_SOUND_TVMIXER is not set
 
 #
+# Multimedia Capabilities Port drivers
+#
+# CONFIG_MCP is not set
+# CONFIG_MCP_SA1100 is not set
+# CONFIG_MCP_UCB1200 is not set
+# CONFIG_MCP_UCB1200_AUDIO is not set
+# CONFIG_MCP_UCB1200_TS is not set
+
+#
 # USB support
 #
 # CONFIG_USB is not set
+# CONFIG_USB_UHCI is not set
+# CONFIG_USB_UHCI_ALT is not set
+# CONFIG_USB_OHCI is not set
+# CONFIG_USB_OHCI_SA1111 is not set
+# CONFIG_USB_AUDIO is not set
+# CONFIG_USB_BLUETOOTH is not set
+# CONFIG_USB_STORAGE is not set
+# CONFIG_USB_STORAGE_DEBUG is not set
+# CONFIG_USB_STORAGE_DATAFAB is not set
+# CONFIG_USB_STORAGE_FREECOM is not set
+# CONFIG_USB_STORAGE_ISD200 is not set
+# CONFIG_USB_STORAGE_DPCM is not set
+# CONFIG_USB_STORAGE_HP8200e is not set
+# CONFIG_USB_STORAGE_SDDR09 is not set
+# CONFIG_USB_STORAGE_JUMPSHOT is not set
+# CONFIG_USB_ACM is not set
+# CONFIG_USB_PRINTER is not set
+# CONFIG_USB_HID is not set
+# CONFIG_USB_HIDDEV is not set
+# CONFIG_USB_KBD is not set
+# CONFIG_USB_MOUSE is not set
+# CONFIG_USB_WACOM is not set
+# CONFIG_USB_DC2XX is not set
+# CONFIG_USB_MDC800 is not set
+# CONFIG_USB_SCANNER is not set
+# CONFIG_USB_MICROTEK is not set
+# CONFIG_USB_HPUSBSCSI is not set
+# CONFIG_USB_PEGASUS is not set
+# CONFIG_USB_KAWETH is not set
+# CONFIG_USB_CATC is not set
+# CONFIG_USB_CDCETHER is not set
+# CONFIG_USB_USBNET is not set
+# CONFIG_USB_USS720 is not set
+
+#
+# USB Serial Converter support
+#
+# CONFIG_USB_SERIAL is not set
+# CONFIG_USB_SERIAL_GENERIC is not set
+# CONFIG_USB_SERIAL_BELKIN is not set
+# CONFIG_USB_SERIAL_WHITEHEAT is not set
+# CONFIG_USB_SERIAL_DIGI_ACCELEPORT is not set
+# CONFIG_USB_SERIAL_EMPEG is not set
+# CONFIG_USB_SERIAL_FTDI_SIO is not set
+# CONFIG_USB_SERIAL_VISOR is not set
+# CONFIG_USB_SERIAL_IR is not set
+# CONFIG_USB_SERIAL_EDGEPORT is not set
+# CONFIG_USB_SERIAL_KEYSPAN_PDA is not set
+# CONFIG_USB_SERIAL_KEYSPAN is not set
+# CONFIG_USB_SERIAL_KEYSPAN_USA28 is not set
+# CONFIG_USB_SERIAL_KEYSPAN_USA28X is not set
+# CONFIG_USB_SERIAL_KEYSPAN_USA28XA is not set
+# CONFIG_USB_SERIAL_KEYSPAN_USA28XB is not set
+# CONFIG_USB_SERIAL_KEYSPAN_USA19 is not set
+# CONFIG_USB_SERIAL_KEYSPAN_USA18X is not set
+# CONFIG_USB_SERIAL_KEYSPAN_USA19W is not set
+# CONFIG_USB_SERIAL_KEYSPAN_USA49W is not set
+# CONFIG_USB_SERIAL_MCT_U232 is not set
+# CONFIG_USB_SERIAL_PL2303 is not set
+# CONFIG_USB_SERIAL_CYBERJACK is not set
+# CONFIG_USB_SERIAL_XIRCOM is not set
+# CONFIG_USB_SERIAL_OMNINET is not set
+# CONFIG_USB_RIO500 is not set
+
+#
+# Bluetooth support
+#
+# CONFIG_BLUEZ is not set
 
 #
 # Kernel hacking
 #
 # CONFIG_NO_FRAME_POINTER is not set
-CONFIG_DEBUG_ERRORS=y
 # CONFIG_DEBUG_USER is not set
 # CONFIG_DEBUG_INFO is not set
-# CONFIG_MAGIC_SYSRQ is not set
 # CONFIG_NO_PGT_CACHE is not set
+CONFIG_DEBUG_KERNEL=y
+CONFIG_DEBUG_SLAB=y
+# CONFIG_MAGIC_SYSRQ is not set
+# CONFIG_DEBUG_SPINLOCK is not set
+# CONFIG_DEBUG_WAITQ is not set
+# CONFIG_DEBUG_BUGVERBOSE is not set
+CONFIG_DEBUG_ERRORS=y
 CONFIG_DEBUG_LL=y
 # CONFIG_DEBUG_DC21285_PORT is not set
 # CONFIG_DEBUG_CLPS711X_UART2 is not set
+# CONFIG_DEBUG_LL_SER3 is not set
diff -Nru linux/arch/arm/def-configs/shannon linux-2.4.19-pre5-mjc/arch/arm/def-configs/shannon
--- linux/arch/arm/def-configs/shannon	Wed Dec 31 19:00:00 1969
+++ linux-2.4.19-pre5-mjc/arch/arm/def-configs/shannon	Sat Apr  6 08:25:57 2002
@@ -0,0 +1,737 @@
+#
+# Automatically generated make config: don't edit
+#
+CONFIG_ARM=y
+# CONFIG_EISA is not set
+# CONFIG_SBUS is not set
+# CONFIG_MCA is not set
+CONFIG_UID16=y
+CONFIG_RWSEM_GENERIC_SPINLOCK=y
+# CONFIG_RWSEM_XCHGADD_ALGORITHM is not set
+# CONFIG_GENERIC_BUST_SPINLOCK is not set
+# CONFIG_GENERIC_ISA_DMA is not set
+
+#
+# Code maturity level options
+#
+CONFIG_EXPERIMENTAL=y
+CONFIG_OBSOLETE=y
+
+#
+# Loadable module support
+#
+CONFIG_MODULES=y
+# CONFIG_MODVERSIONS is not set
+# CONFIG_KMOD is not set
+
+#
+# System Type
+#
+# CONFIG_ARCH_ANAKIN is not set
+# CONFIG_ARCH_ARCA5K is not set
+# CONFIG_ARCH_CLPS7500 is not set
+# CONFIG_ARCH_CLPS711X is not set
+# CONFIG_ARCH_CO285 is not set
+# CONFIG_ARCH_EBSA110 is not set
+# CONFIG_ARCH_CAMELOT is not set
+# CONFIG_ARCH_FOOTBRIDGE is not set
+# CONFIG_ARCH_INTEGRATOR is not set
+# CONFIG_ARCH_L7200 is not set
+# CONFIG_ARCH_RPC is not set
+CONFIG_ARCH_SA1100=y
+# CONFIG_ARCH_SHARK is not set
+
+#
+# Archimedes/A5000 Implementations
+#
+
+#
+# Archimedes/A5000 Implementations (select only ONE)
+#
+
+#
+# Footbridge Implementations
+#
+
+#
+# SA11x0 Implementations
+#
+# CONFIG_SA1100_ASSABET is not set
+# CONFIG_SA1100_ADSBITSY is not set
+# CONFIG_SA1100_BRUTUS is not set
+# CONFIG_SA1100_CERF is not set
+# CONFIG_SA1100_H3600 is not set
+# CONFIG_SA1100_EXTENEX1 is not set
+# CONFIG_SA1100_FLEXANET is not set
+# CONFIG_SA1100_FREEBIRD is not set
+# CONFIG_SA1100_GRAPHICSCLIENT is not set
+# CONFIG_SA1100_GRAPHICSMASTER is not set
+# CONFIG_SA1100_JORNADA720 is not set
+# CONFIG_SA1100_HUW_WEBPANEL is not set
+# CONFIG_SA1100_ITSY is not set
+# CONFIG_SA1100_LART is not set
+# CONFIG_SA1100_NANOENGINE is not set
+# CONFIG_SA1100_OMNIMETER is not set
+# CONFIG_SA1100_PANGOLIN is not set
+# CONFIG_SA1100_PLEB is not set
+CONFIG_SA1100_SHANNON=y
+# CONFIG_SA1100_SHERMAN is not set
+# CONFIG_SA1100_SIMPAD is not set
+# CONFIG_SA1100_PFS168 is not set
+# CONFIG_SA1100_VICTOR is not set
+# CONFIG_SA1100_XP860 is not set
+# CONFIG_SA1100_YOPY is not set
+# CONFIG_SA1100_USB is not set
+
+#
+# CLPS711X/EP721X Implementations
+#
+# CONFIG_ARCH_EP7211 is not set
+# CONFIG_ARCH_EP7212 is not set
+# CONFIG_ARCH_ACORN is not set
+# CONFIG_FOOTBRIDGE is not set
+# CONFIG_FOOTBRIDGE_HOST is not set
+# CONFIG_FOOTBRIDGE_ADDIN is not set
+CONFIG_CPU_32=y
+# CONFIG_CPU_26 is not set
+
+#
+# Processor Type
+#
+# CONFIG_CPU_32v3 is not set
+CONFIG_CPU_32v4=y
+# CONFIG_CPU_ARM610 is not set
+# CONFIG_CPU_ARM710 is not set
+# CONFIG_CPU_ARM720T is not set
+# CONFIG_CPU_ARM920T is not set
+# CONFIG_CPU_ARM922T is not set
+# CONFIG_CPU_ARM926T is not set
+# CONFIG_CPU_ARM1020 is not set
+# CONFIG_CPU_SA110 is not set
+CONFIG_CPU_SA1100=y
+# CONFIG_ARM_THUMB is not set
+CONFIG_DISCONTIGMEM=y
+
+#
+# General setup
+#
+# CONFIG_PCI is not set
+CONFIG_ISA=y
+# CONFIG_ISA_DMA is not set
+# CONFIG_CPU_FREQ is not set
+CONFIG_HOTPLUG=y
+
+#
+# PCMCIA/CardBus support
+#
+CONFIG_PCMCIA=y
+# CONFIG_I82092 is not set
+# CONFIG_I82365 is not set
+# CONFIG_TCIC is not set
+CONFIG_PCMCIA_SA1100=y
+CONFIG_NET=y
+CONFIG_SYSVIPC=y
+# CONFIG_BSD_PROCESS_ACCT is not set
+CONFIG_SYSCTL=y
+
+#
+# At least one math emulation must be selected
+#
+CONFIG_FPE_NWFPE=y
+# CONFIG_FPE_FASTFPE is not set
+CONFIG_KCORE_ELF=y
+# CONFIG_KCORE_AOUT is not set
+# CONFIG_BINFMT_AOUT is not set
+CONFIG_BINFMT_ELF=y
+# CONFIG_BINFMT_MISC is not set
+# CONFIG_PM is not set
+# CONFIG_ARTHUR is not set
+CONFIG_CMDLINE="console=ttySA0,9600 console=tty1 root=/dev/mtdblock2 init=/linuxrc"
+# CONFIG_LEDS is not set
+CONFIG_ALIGNMENT_TRAP=y
+
+#
+# Parallel port support
+#
+# CONFIG_PARPORT is not set
+
+#
+# Memory Technology Devices (MTD)
+#
+CONFIG_MTD=y
+# CONFIG_MTD_DEBUG is not set
+CONFIG_MTD_PARTITIONS=y
+# CONFIG_MTD_REDBOOT_PARTS is not set
+# CONFIG_MTD_BOOTLDR_PARTS is not set
+# CONFIG_MTD_AFS_PARTS is not set
+
+#
+# User Modules And Translation Layers
+#
+CONFIG_MTD_CHAR=y
+CONFIG_MTD_BLOCK=y
+# CONFIG_FTL is not set
+# CONFIG_NFTL is not set
+
+#
+# RAM/ROM/Flash chip drivers
+#
+CONFIG_MTD_CFI=y
+# CONFIG_MTD_JEDECPROBE is not set
+CONFIG_MTD_GEN_PROBE=y
+# CONFIG_MTD_CFI_ADV_OPTIONS is not set
+# CONFIG_MTD_CFI_INTELEXT is not set
+CONFIG_MTD_CFI_AMDSTD=y
+# CONFIG_MTD_RAM is not set
+# CONFIG_MTD_ROM is not set
+# CONFIG_MTD_ABSENT is not set
+# CONFIG_MTD_OBSOLETE_CHIPS is not set
+
+#
+# Mapping drivers for chip access
+#
+# CONFIG_MTD_PHYSMAP is not set
+# CONFIG_MTD_NORA is not set
+# CONFIG_MTD_ARM_INTEGRATOR is not set
+CONFIG_MTD_SA1100=y
+# CONFIG_MTD_IQ80310 is not set
+
+#
+# Self-contained MTD device drivers
+#
+# CONFIG_MTD_SLRAM is not set
+# CONFIG_MTD_MTDRAM is not set
+# CONFIG_MTD_BLKMTD is not set
+
+#
+# Disk-On-Chip Device Drivers
+#
+# CONFIG_MTD_DOC1000 is not set
+# CONFIG_MTD_DOC2000 is not set
+# CONFIG_MTD_DOC2001 is not set
+# CONFIG_MTD_DOCPROBE is not set
+
+#
+# NAND Flash Device Drivers
+#
+# CONFIG_MTD_NAND is not set
+
+#
+# Plug and Play configuration
+#
+# CONFIG_PNP is not set
+
+#
+# Block devices
+#
+# CONFIG_BLK_DEV_FD is not set
+# CONFIG_BLK_DEV_XD is not set
+# CONFIG_BLK_DEV_LOOP is not set
+# CONFIG_BLK_DEV_NBD is not set
+CONFIG_BLK_DEV_RAM=y
+CONFIG_BLK_DEV_RAM_SIZE=8192
+CONFIG_BLK_DEV_INITRD=y
+
+#
+# Multi-device support (RAID and LVM)
+#
+# CONFIG_MD is not set
+
+#
+# Networking options
+#
+CONFIG_PACKET=y
+CONFIG_PACKET_MMAP=y
+# CONFIG_NETLINK is not set
+# CONFIG_NETFILTER is not set
+# CONFIG_FILTER is not set
+CONFIG_UNIX=y
+CONFIG_INET=y
+# CONFIG_IP_MULTICAST is not set
+# CONFIG_IP_ADVANCED_ROUTER is not set
+# CONFIG_IP_PNP is not set
+# CONFIG_NET_IPIP is not set
+# CONFIG_NET_IPGRE is not set
+# CONFIG_INET_ECN is not set
+# CONFIG_SYN_COOKIES is not set
+# CONFIG_IPV6 is not set
+# CONFIG_KHTTPD is not set
+# CONFIG_ATM is not set
+
+#
+#  
+#
+# CONFIG_IPX is not set
+# CONFIG_ATALK is not set
+# CONFIG_DECNET is not set
+# CONFIG_BRIDGE is not set
+# CONFIG_X25 is not set
+# CONFIG_LAPB is not set
+# CONFIG_LLC is not set
+# CONFIG_NET_DIVERT is not set
+# CONFIG_ECONET is not set
+# CONFIG_WAN_ROUTER is not set
+# CONFIG_NET_FASTROUTE is not set
+# CONFIG_NET_HW_FLOWCONTROL is not set
+
+#
+# QoS and/or fair queueing
+#
+# CONFIG_NET_SCHED is not set
+
+#
+# Network device support
+#
+CONFIG_NETDEVICES=y
+
+#
+# ARCnet devices
+#
+# CONFIG_ARCNET is not set
+# CONFIG_DUMMY is not set
+# CONFIG_BONDING is not set
+# CONFIG_EQUALIZER is not set
+# CONFIG_TUN is not set
+
+#
+# Ethernet (10 or 100Mbit)
+#
+CONFIG_NET_ETHERNET=y
+# CONFIG_NET_VENDOR_3COM is not set
+# CONFIG_LANCE is not set
+# CONFIG_NET_VENDOR_SMC is not set
+# CONFIG_NET_VENDOR_RACAL is not set
+# CONFIG_AT1700 is not set
+# CONFIG_DEPCA is not set
+# CONFIG_HP100 is not set
+# CONFIG_NET_ISA is not set
+# CONFIG_NET_PCI is not set
+# CONFIG_NET_POCKET is not set
+
+#
+# Ethernet (1000 Mbit)
+#
+# CONFIG_ACENIC_OMIT_TIGON_I is not set
+# CONFIG_FDDI is not set
+# CONFIG_HIPPI is not set
+# CONFIG_PPP is not set
+# CONFIG_SLIP is not set
+
+#
+# Wireless LAN (non-hamradio)
+#
+# CONFIG_NET_RADIO is not set
+
+#
+# Token Ring devices
+#
+# CONFIG_TR is not set
+# CONFIG_NET_FC is not set
+# CONFIG_SHAPER is not set
+
+#
+# Wan interfaces
+#
+# CONFIG_WAN is not set
+
+#
+# PCMCIA network device support
+#
+CONFIG_NET_PCMCIA=y
+# CONFIG_PCMCIA_3C589 is not set
+# CONFIG_PCMCIA_3C574 is not set
+# CONFIG_PCMCIA_FMVJ18X is not set
+CONFIG_PCMCIA_PCNET=y
+# CONFIG_PCMCIA_NMCLAN is not set
+CONFIG_PCMCIA_SMC91C92=y
+# CONFIG_PCMCIA_XIRC2PS is not set
+# CONFIG_NET_PCMCIA_RADIO is not set
+
+#
+# Amateur Radio support
+#
+# CONFIG_HAMRADIO is not set
+
+#
+# IrDA (infrared) support
+#
+# CONFIG_IRDA is not set
+
+#
+# ATA/IDE/MFM/RLL support
+#
+CONFIG_IDE=m
+
+#
+# IDE, ATA and ATAPI Block devices
+#
+CONFIG_BLK_DEV_IDE=m
+
+#
+# Please see Documentation/ide.txt for help/info on IDE drives
+#
+# CONFIG_BLK_DEV_HD_IDE is not set
+# CONFIG_BLK_DEV_HD is not set
+# CONFIG_BLK_DEV_IDEDISK is not set
+# CONFIG_BLK_DEV_IDEDISK_VENDOR is not set
+# CONFIG_BLK_DEV_IDECS is not set
+# CONFIG_BLK_DEV_IDECD is not set
+# CONFIG_BLK_DEV_IDETAPE is not set
+# CONFIG_BLK_DEV_IDEFLOPPY is not set
+# CONFIG_IDE_TASK_IOCTL is not set
+
+#
+# IDE chipset support/bugfixes
+#
+# CONFIG_BLK_DEV_CMD640 is not set
+# CONFIG_IDE_CHIPSETS is not set
+# CONFIG_IDEDMA_AUTO is not set
+# CONFIG_DMA_NONPCI is not set
+# CONFIG_BLK_DEV_IDE_MODES is not set
+# CONFIG_BLK_DEV_ATARAID is not set
+
+#
+# SCSI support
+#
+# CONFIG_SCSI is not set
+
+#
+# I2O device support
+#
+# CONFIG_I2O is not set
+
+#
+# ISDN subsystem
+#
+# CONFIG_ISDN is not set
+
+#
+# Input core support
+#
+CONFIG_INPUT=y
+CONFIG_INPUT_KEYBDEV=y
+# CONFIG_INPUT_MOUSEDEV is not set
+# CONFIG_INPUT_JOYDEV is not set
+# CONFIG_INPUT_EVDEV is not set
+
+#
+# Character devices
+#
+CONFIG_VT=y
+CONFIG_VT_CONSOLE=y
+# CONFIG_SERIAL is not set
+# CONFIG_SERIAL_NONSTANDARD is not set
+
+#
+# Serial drivers
+#
+CONFIG_SERIAL_SA1100=y
+CONFIG_SERIAL_SA1100_CONSOLE=y
+CONFIG_SA1100_DEFAULT_BAUDRATE=9600
+# CONFIG_SERIAL_8250 is not set
+CONFIG_SERIAL_CORE=y
+CONFIG_SERIAL_CORE_CONSOLE=y
+CONFIG_UNIX98_PTYS=y
+CONFIG_UNIX98_PTY_COUNT=256
+
+#
+# I2C support
+#
+# CONFIG_I2C is not set
+
+#
+# L3 serial bus support
+#
+# CONFIG_L3 is not set
+
+#
+# Other L3 adapters
+#
+# CONFIG_BIT_SA1100_GPIO is not set
+
+#
+# Mice
+#
+# CONFIG_BUSMOUSE is not set
+# CONFIG_MOUSE is not set
+
+#
+# Joysticks
+#
+# CONFIG_INPUT_GAMEPORT is not set
+# CONFIG_INPUT_SERIO is not set
+
+#
+# Joysticks
+#
+# CONFIG_QIC02_TAPE is not set
+
+#
+# Watchdog Cards
+#
+CONFIG_WATCHDOG=y
+# CONFIG_WATCHDOG_NOWAYOUT is not set
+# CONFIG_SOFT_WATCHDOG is not set
+# CONFIG_WDT is not set
+# CONFIG_WDTPCI is not set
+# CONFIG_PCWATCHDOG is not set
+# CONFIG_ACQUIRE_WDT is not set
+# CONFIG_ADVANTECH_WDT is not set
+CONFIG_SA1100_WATCHDOG=y
+# CONFIG_EUROTECH_WDT is not set
+# CONFIG_IB700_WDT is not set
+# CONFIG_I810_TCO is not set
+# CONFIG_MIXCOMWD is not set
+# CONFIG_60XX_WDT is not set
+# CONFIG_W83877F_WDT is not set
+# CONFIG_MACHZ_WDT is not set
+# CONFIG_NVRAM is not set
+# CONFIG_RTC is not set
+CONFIG_SA1100_RTC=y
+# CONFIG_DTLK is not set
+# CONFIG_R3964 is not set
+# CONFIG_APPLICOM is not set
+
+#
+# Ftape, the floppy tape device driver
+#
+# CONFIG_FTAPE is not set
+# CONFIG_AGP is not set
+# CONFIG_DRM is not set
+
+#
+# PCMCIA character devices
+#
+
+#
+# Multimedia devices
+#
+# CONFIG_VIDEO_DEV is not set
+
+#
+# File systems
+#
+# CONFIG_QUOTA is not set
+# CONFIG_AUTOFS_FS is not set
+# CONFIG_AUTOFS4_FS is not set
+# CONFIG_REISERFS_FS is not set
+# CONFIG_ADFS_FS is not set
+# CONFIG_AFFS_FS is not set
+# CONFIG_HFS_FS is not set
+# CONFIG_BFS_FS is not set
+# CONFIG_CMS_FS is not set
+# CONFIG_EXT3_FS is not set
+# CONFIG_JBD is not set
+CONFIG_FAT_FS=y
+CONFIG_MSDOS_FS=y
+# CONFIG_UMSDOS_FS is not set
+CONFIG_VFAT_FS=y
+# CONFIG_EFS_FS is not set
+# CONFIG_JFFS_FS is not set
+CONFIG_JFFS2_FS=y
+CONFIG_JFFS2_FS_DEBUG=0
+# CONFIG_CRAMFS is not set
+# CONFIG_TMPFS is not set
+CONFIG_RAMFS=y
+# CONFIG_ISO9660_FS is not set
+CONFIG_MINIX_FS=y
+# CONFIG_FREEVXFS_FS is not set
+# CONFIG_NTFS_FS is not set
+# CONFIG_HPFS_FS is not set
+CONFIG_PROC_FS=y
+# CONFIG_DEVFS_FS is not set
+CONFIG_DEVPTS_FS=y
+# CONFIG_QNX4FS_FS is not set
+# CONFIG_ROMFS_FS is not set
+# CONFIG_EXT2_FS is not set
+# CONFIG_SYSV_FS is not set
+# CONFIG_UDF_FS is not set
+# CONFIG_UFS_FS is not set
+
+#
+# Network File Systems
+#
+# CONFIG_CODA_FS is not set
+# CONFIG_INTERMEZZO_FS is not set
+CONFIG_NFS_FS=y
+# CONFIG_NFS_V3 is not set
+# CONFIG_NFSD is not set
+CONFIG_SUNRPC=y
+CONFIG_LOCKD=y
+# CONFIG_SMB_FS is not set
+# CONFIG_NCP_FS is not set
+# CONFIG_ZISOFS_FS is not set
+# CONFIG_ZLIB_FS_INFLATE is not set
+
+#
+# Partition Types
+#
+CONFIG_PARTITION_ADVANCED=y
+# CONFIG_ACORN_PARTITION is not set
+# CONFIG_OSF_PARTITION is not set
+# CONFIG_AMIGA_PARTITION is not set
+# CONFIG_ATARI_PARTITION is not set
+# CONFIG_MAC_PARTITION is not set
+CONFIG_MSDOS_PARTITION=y
+# CONFIG_BSD_DISKLABEL is not set
+# CONFIG_MINIX_SUBPARTITION is not set
+# CONFIG_SOLARIS_X86_PARTITION is not set
+# CONFIG_UNIXWARE_DISKLABEL is not set
+# CONFIG_LDM_PARTITION is not set
+# CONFIG_SGI_PARTITION is not set
+# CONFIG_ULTRIX_PARTITION is not set
+# CONFIG_SUN_PARTITION is not set
+# CONFIG_SMB_NLS is not set
+CONFIG_NLS=y
+
+#
+# Native Language Support
+#
+CONFIG_NLS_DEFAULT="iso8859-1"
+# CONFIG_NLS_CODEPAGE_437 is not set
+# CONFIG_NLS_CODEPAGE_737 is not set
+# CONFIG_NLS_CODEPAGE_775 is not set
+# CONFIG_NLS_CODEPAGE_850 is not set
+# CONFIG_NLS_CODEPAGE_852 is not set
+# CONFIG_NLS_CODEPAGE_855 is not set
+# CONFIG_NLS_CODEPAGE_857 is not set
+# CONFIG_NLS_CODEPAGE_860 is not set
+# CONFIG_NLS_CODEPAGE_861 is not set
+# CONFIG_NLS_CODEPAGE_862 is not set
+# CONFIG_NLS_CODEPAGE_863 is not set
+# CONFIG_NLS_CODEPAGE_864 is not set
+# CONFIG_NLS_CODEPAGE_865 is not set
+# CONFIG_NLS_CODEPAGE_866 is not set
+# CONFIG_NLS_CODEPAGE_869 is not set
+# CONFIG_NLS_CODEPAGE_936 is not set
+# CONFIG_NLS_CODEPAGE_950 is not set
+# CONFIG_NLS_CODEPAGE_932 is not set
+# CONFIG_NLS_CODEPAGE_949 is not set
+# CONFIG_NLS_CODEPAGE_874 is not set
+# CONFIG_NLS_ISO8859_8 is not set
+# CONFIG_NLS_CODEPAGE_1251 is not set
+# CONFIG_NLS_ISO8859_1 is not set
+# CONFIG_NLS_ISO8859_2 is not set
+# CONFIG_NLS_ISO8859_3 is not set
+# CONFIG_NLS_ISO8859_4 is not set
+# CONFIG_NLS_ISO8859_5 is not set
+# CONFIG_NLS_ISO8859_6 is not set
+# CONFIG_NLS_ISO8859_7 is not set
+# CONFIG_NLS_ISO8859_9 is not set
+# CONFIG_NLS_ISO8859_13 is not set
+# CONFIG_NLS_ISO8859_14 is not set
+# CONFIG_NLS_ISO8859_15 is not set
+# CONFIG_NLS_KOI8_R is not set
+# CONFIG_NLS_KOI8_U is not set
+# CONFIG_NLS_UTF8 is not set
+
+#
+# Console drivers
+#
+CONFIG_PC_KEYMAP=y
+# CONFIG_VGA_CONSOLE is not set
+
+#
+# Frame-buffer support
+#
+CONFIG_FB=y
+CONFIG_DUMMY_CONSOLE=y
+CONFIG_FB_SA1100=y
+# CONFIG_FB_VIRTUAL is not set
+# CONFIG_FBCON_ADVANCED is not set
+CONFIG_FBCON_CFB2=y
+CONFIG_FBCON_CFB4=y
+CONFIG_FBCON_CFB8=y
+CONFIG_FBCON_CFB16=y
+# CONFIG_FBCON_FONTWIDTH8_ONLY is not set
+# CONFIG_FBCON_FONTS is not set
+CONFIG_FONT_8x8=y
+CONFIG_FONT_8x16=y
+
+#
+# Sound
+#
+CONFIG_SOUND=y
+# CONFIG_SOUND_BT878 is not set
+# CONFIG_SOUND_FUSION is not set
+# CONFIG_SOUND_CS4281 is not set
+# CONFIG_SOUND_ESSSOLO1 is not set
+# CONFIG_SOUND_MAESTRO is not set
+# CONFIG_SOUND_SONICVIBES is not set
+# CONFIG_SOUND_TRIDENT is not set
+# CONFIG_SOUND_MSNDCLAS is not set
+# CONFIG_SOUND_MSNDPIN is not set
+CONFIG_SOUND_SA1100=y
+# CONFIG_SOUND_SA1100SSP is not set
+# CONFIG_SOUND_OSS is not set
+
+#
+# Multimedia Capabilities Port drivers
+#
+CONFIG_MCP=y
+CONFIG_MCP_SA1100=y
+CONFIG_MCP_UCB1200=y
+CONFIG_MCP_UCB1200_AUDIO=y
+CONFIG_MCP_UCB1200_TS=y
+
+#
+# USB support
+#
+# CONFIG_USB is not set
+
+#
+# USB Controllers
+#
+
+#
+# USB Device Class drivers
+#
+
+#
+# USB Human Interface Devices (HID)
+#
+
+#
+# USB Imaging devices
+#
+
+#
+# USB Multimedia devices
+#
+
+#
+#   Video4Linux support is needed for USB Multimedia device support
+#
+
+#
+# USB Network adaptors
+#
+
+#
+# USB port drivers
+#
+
+#
+# USB Serial Converter support
+#
+
+#
+# USB Miscellaneous drivers
+#
+
+#
+# Bluetooth support
+#
+# CONFIG_BLUEZ is not set
+
+#
+# Kernel hacking
+#
+# CONFIG_NO_FRAME_POINTER is not set
+CONFIG_DEBUG_ERRORS=y
+CONFIG_DEBUG_USER=y
+# CONFIG_DEBUG_INFO is not set
+# CONFIG_DEBUG_SLAB is not set
+CONFIG_MAGIC_SYSRQ=y
+# CONFIG_DEBUG_SPINLOCK is not set
+CONFIG_DEBUG_LL=y
diff -Nru linux/arch/arm/def-configs/system3 linux-2.4.19-pre5-mjc/arch/arm/def-configs/system3
--- linux/arch/arm/def-configs/system3	Wed Dec 31 19:00:00 1969
+++ linux-2.4.19-pre5-mjc/arch/arm/def-configs/system3	Sat Apr  6 08:25:57 2002
@@ -0,0 +1,977 @@
+#
+# Automatically generated make config: don't edit
+#
+CONFIG_ARM=y
+# CONFIG_EISA is not set
+# CONFIG_SBUS is not set
+# CONFIG_MCA is not set
+CONFIG_UID16=y
+CONFIG_RWSEM_GENERIC_SPINLOCK=y
+# CONFIG_RWSEM_XCHGADD_ALGORITHM is not set
+# CONFIG_GENERIC_BUST_SPINLOCK is not set
+# CONFIG_GENERIC_ISA_DMA is not set
+
+#
+# Code maturity level options
+#
+CONFIG_EXPERIMENTAL=y
+# CONFIG_OBSOLETE is not set
+
+#
+# Loadable module support
+#
+CONFIG_MODULES=y
+# CONFIG_MODVERSIONS is not set
+# CONFIG_KMOD is not set
+
+#
+# System Type
+#
+# CONFIG_ARCH_ANAKIN is not set
+# CONFIG_ARCH_ARCA5K is not set
+# CONFIG_ARCH_CLPS7500 is not set
+# CONFIG_ARCH_CLPS711X is not set
+# CONFIG_ARCH_CO285 is not set
+# CONFIG_ARCH_EBSA110 is not set
+# CONFIG_ARCH_CAMELOT is not set
+# CONFIG_ARCH_FOOTBRIDGE is not set
+# CONFIG_ARCH_INTEGRATOR is not set
+# CONFIG_ARCH_L7200 is not set
+# CONFIG_ARCH_RPC is not set
+CONFIG_ARCH_SA1100=y
+# CONFIG_ARCH_SHARK is not set
+
+#
+# Archimedes/A5000 Implementations
+#
+
+#
+# Archimedes/A5000 Implementations (select only ONE)
+#
+# CONFIG_ARCH_ARC is not set
+# CONFIG_ARCH_A5K is not set
+
+#
+# Footbridge Implementations
+#
+# CONFIG_ARCH_CATS is not set
+# CONFIG_ARCH_PERSONAL_SERVER is not set
+# CONFIG_ARCH_EBSA285_ADDIN is not set
+# CONFIG_ARCH_EBSA285_HOST is not set
+# CONFIG_ARCH_NETWINDER is not set
+
+#
+# SA11x0 Implementations
+#
+# CONFIG_SA1100_ASSABET is not set
+# CONFIG_ASSABET_NEPONSET is not set
+# CONFIG_SA1100_ADSBITSY is not set
+# CONFIG_SA1100_BRUTUS is not set
+# CONFIG_SA1100_CERF is not set
+# CONFIG_SA1100_H3600 is not set
+# CONFIG_SA1100_EXTENEX1 is not set
+# CONFIG_SA1100_FLEXANET is not set
+# CONFIG_SA1100_FREEBIRD is not set
+# CONFIG_SA1100_GRAPHICSCLIENT is not set
+# CONFIG_SA1100_GRAPHICSMASTER is not set
+# CONFIG_SA1100_JORNADA720 is not set
+# CONFIG_SA1100_HUW_WEBPANEL is not set
+# CONFIG_SA1100_ITSY is not set
+# CONFIG_SA1100_LART is not set
+# CONFIG_SA1100_NANOENGINE is not set
+# CONFIG_SA1100_OMNIMETER is not set
+# CONFIG_SA1100_PANGOLIN is not set
+# CONFIG_SA1100_PLEB is not set
+# CONFIG_SA1100_SHANNON is not set
+# CONFIG_SA1100_SHERMAN is not set
+# CONFIG_SA1100_SIMPAD is not set
+# CONFIG_SA1100_PFS168 is not set
+# CONFIG_SA1100_VICTOR is not set
+# CONFIG_SA1100_XP860 is not set
+# CONFIG_SA1100_YOPY is not set
+CONFIG_SA1100_PT_SYSTEM3=y
+CONFIG_SA1111=y
+CONFIG_FORCE_MAX_ZONEORDER=9
+CONFIG_SA1100_USB=m
+CONFIG_SA1100_USB_NETLINK=m
+CONFIG_SA1100_USB_CHAR=m
+
+#
+# CLPS711X/EP721X Implementations
+#
+# CONFIG_ARCH_AUTCPU12 is not set
+# CONFIG_ARCH_CDB89712 is not set
+# CONFIG_ARCH_CLEP7312 is not set
+# CONFIG_ARCH_EDB7211 is not set
+# CONFIG_ARCH_P720T is not set
+# CONFIG_ARCH_EP7211 is not set
+# CONFIG_ARCH_EP7212 is not set
+# CONFIG_ARCH_ACORN is not set
+# CONFIG_FOOTBRIDGE is not set
+# CONFIG_FOOTBRIDGE_HOST is not set
+# CONFIG_FOOTBRIDGE_ADDIN is not set
+CONFIG_CPU_32=y
+# CONFIG_CPU_26 is not set
+
+#
+# Processor Type
+#
+# CONFIG_CPU_32v3 is not set
+CONFIG_CPU_32v4=y
+# CONFIG_CPU_ARM610 is not set
+# CONFIG_CPU_ARM710 is not set
+# CONFIG_CPU_ARM720T is not set
+# CONFIG_CPU_ARM920T is not set
+# CONFIG_CPU_ARM922T is not set
+# CONFIG_CPU_ARM926T is not set
+# CONFIG_CPU_ARM1020 is not set
+# CONFIG_CPU_SA110 is not set
+CONFIG_CPU_SA1100=y
+# CONFIG_ARM_THUMB is not set
+CONFIG_DISCONTIGMEM=y
+
+#
+# General setup
+#
+# CONFIG_PCI is not set
+CONFIG_ISA=y
+# CONFIG_ISA_DMA is not set
+CONFIG_CPU_FREQ=y
+CONFIG_HOTPLUG=y
+
+#
+# PCMCIA/CardBus support
+#
+CONFIG_PCMCIA=m
+# CONFIG_I82092 is not set
+# CONFIG_I82365 is not set
+# CONFIG_TCIC is not set
+# CONFIG_PCMCIA_CLPS6700 is not set
+CONFIG_PCMCIA_SA1100=m
+CONFIG_NET=y
+CONFIG_SYSVIPC=y
+# CONFIG_BSD_PROCESS_ACCT is not set
+CONFIG_SYSCTL=y
+
+#
+# At least one math emulation must be selected
+#
+CONFIG_FPE_NWFPE=y
+# CONFIG_FPE_FASTFPE is not set
+CONFIG_KCORE_ELF=y
+# CONFIG_KCORE_AOUT is not set
+# CONFIG_BINFMT_AOUT is not set
+CONFIG_BINFMT_ELF=y
+# CONFIG_BINFMT_MISC is not set
+CONFIG_PM=y
+# CONFIG_ARTHUR is not set
+CONFIG_CMDLINE="noinitrd root=/dev/mtdblock3"
+CONFIG_LEDS=y
+CONFIG_LEDS_TIMER=y
+CONFIG_LEDS_CPU=y
+CONFIG_ALIGNMENT_TRAP=y
+
+#
+# Parallel port support
+#
+# CONFIG_PARPORT is not set
+
+#
+# Memory Technology Devices (MTD)
+#
+CONFIG_MTD=y
+# CONFIG_MTD_DEBUG is not set
+CONFIG_MTD_PARTITIONS=y
+CONFIG_MTD_REDBOOT_PARTS=m
+CONFIG_MTD_BOOTLDR_PARTS=m
+# CONFIG_MTD_AFS_PARTS is not set
+
+#
+# User Modules And Translation Layers
+#
+# CONFIG_MTD_CHAR is not set
+CONFIG_MTD_BLOCK=y
+# CONFIG_FTL is not set
+# CONFIG_NFTL is not set
+
+#
+# RAM/ROM/Flash chip drivers
+#
+CONFIG_MTD_CFI=y
+# CONFIG_MTD_JEDECPROBE is not set
+CONFIG_MTD_GEN_PROBE=y
+# CONFIG_MTD_CFI_ADV_OPTIONS is not set
+CONFIG_MTD_CFI_INTELEXT=y
+# CONFIG_MTD_CFI_AMDSTD is not set
+# CONFIG_MTD_RAM is not set
+# CONFIG_MTD_ROM is not set
+# CONFIG_MTD_ABSENT is not set
+# CONFIG_MTD_OBSOLETE_CHIPS is not set
+# CONFIG_MTD_AMDSTD is not set
+# CONFIG_MTD_SHARP is not set
+# CONFIG_MTD_JEDEC is not set
+
+#
+# Mapping drivers for chip access
+#
+# CONFIG_MTD_PHYSMAP is not set
+# CONFIG_MTD_NORA is not set
+# CONFIG_MTD_ARM_INTEGRATOR is not set
+# CONFIG_MTD_CDB89712 is not set
+CONFIG_MTD_SA1100=y
+# CONFIG_MTD_DC21285 is not set
+# CONFIG_MTD_IQ80310 is not set
+# CONFIG_MTD_PCI is not set
+
+#
+# Self-contained MTD device drivers
+#
+# CONFIG_MTD_PMC551 is not set
+# CONFIG_MTD_SLRAM is not set
+# CONFIG_MTD_MTDRAM is not set
+# CONFIG_MTD_BLKMTD is not set
+
+#
+# Disk-On-Chip Device Drivers
+#
+# CONFIG_MTD_DOC1000 is not set
+# CONFIG_MTD_DOC2000 is not set
+# CONFIG_MTD_DOC2001 is not set
+# CONFIG_MTD_DOCPROBE is not set
+
+#
+# NAND Flash Device Drivers
+#
+# CONFIG_MTD_NAND is not set
+
+#
+# Plug and Play configuration
+#
+# CONFIG_PNP is not set
+# CONFIG_ISAPNP is not set
+
+#
+# Block devices
+#
+# CONFIG_BLK_DEV_FD is not set
+# CONFIG_BLK_DEV_XD is not set
+# CONFIG_PARIDE is not set
+# CONFIG_BLK_CPQ_DA is not set
+# CONFIG_BLK_CPQ_CISS_DA is not set
+# CONFIG_BLK_DEV_DAC960 is not set
+CONFIG_BLK_DEV_LOOP=m
+# CONFIG_BLK_DEV_NBD is not set
+CONFIG_BLK_DEV_RAM=y
+CONFIG_BLK_DEV_RAM_SIZE=4096
+CONFIG_BLK_DEV_INITRD=y
+
+#
+# Multi-device support (RAID and LVM)
+#
+# CONFIG_MD is not set
+# CONFIG_BLK_DEV_MD is not set
+# CONFIG_MD_LINEAR is not set
+# CONFIG_MD_RAID0 is not set
+# CONFIG_MD_RAID1 is not set
+# CONFIG_MD_RAID5 is not set
+# CONFIG_MD_MULTIPATH is not set
+# CONFIG_BLK_DEV_LVM is not set
+
+#
+# Networking options
+#
+# CONFIG_PACKET is not set
+# CONFIG_NETLINK is not set
+# CONFIG_NETFILTER is not set
+# CONFIG_FILTER is not set
+CONFIG_UNIX=y
+CONFIG_INET=y
+# CONFIG_IP_MULTICAST is not set
+# CONFIG_IP_ADVANCED_ROUTER is not set
+# CONFIG_IP_PNP is not set
+# CONFIG_NET_IPIP is not set
+# CONFIG_NET_IPGRE is not set
+# CONFIG_INET_ECN is not set
+# CONFIG_SYN_COOKIES is not set
+# CONFIG_IPV6 is not set
+# CONFIG_KHTTPD is not set
+# CONFIG_ATM is not set
+# CONFIG_VLAN_8021Q is not set
+
+#
+#
+#
+# CONFIG_IPX is not set
+# CONFIG_ATALK is not set
+# CONFIG_DECNET is not set
+# CONFIG_BRIDGE is not set
+# CONFIG_X25 is not set
+# CONFIG_LAPB is not set
+# CONFIG_LLC is not set
+# CONFIG_NET_DIVERT is not set
+# CONFIG_ECONET is not set
+# CONFIG_WAN_ROUTER is not set
+# CONFIG_NET_FASTROUTE is not set
+# CONFIG_NET_HW_FLOWCONTROL is not set
+
+#
+# QoS and/or fair queueing
+#
+# CONFIG_NET_SCHED is not set
+
+#
+# Network device support
+#
+CONFIG_NETDEVICES=y
+
+#
+# ARCnet devices
+#
+# CONFIG_ARCNET is not set
+CONFIG_DUMMY=m
+# CONFIG_BONDING is not set
+# CONFIG_EQUALIZER is not set
+# CONFIG_TUN is not set
+
+#
+# Ethernet (10 or 100Mbit)
+#
+CONFIG_NET_ETHERNET=y
+# CONFIG_ARM_AM79C961A is not set
+# CONFIG_SUNLANCE is not set
+# CONFIG_SUNBMAC is not set
+# CONFIG_SUNQE is not set
+# CONFIG_SUNLANCE is not set
+# CONFIG_SUNGEM is not set
+# CONFIG_NET_VENDOR_3COM is not set
+# CONFIG_LANCE is not set
+CONFIG_NET_VENDOR_SMC=y
+# CONFIG_WD80x3 is not set
+# CONFIG_ULTRAMCA is not set
+# CONFIG_ULTRA is not set
+# CONFIG_ULTRA32 is not set
+CONFIG_SMC9194=m
+# CONFIG_NET_VENDOR_RACAL is not set
+# CONFIG_AT1700 is not set
+# CONFIG_DEPCA is not set
+# CONFIG_HP100 is not set
+# CONFIG_NET_ISA is not set
+# CONFIG_NET_PCI is not set
+# CONFIG_NET_POCKET is not set
+
+#
+# Ethernet (1000 Mbit)
+#
+# CONFIG_ACENIC is not set
+# CONFIG_DL2K is not set
+# CONFIG_MYRI_SBUS is not set
+# CONFIG_NS83820 is not set
+# CONFIG_HAMACHI is not set
+# CONFIG_YELLOWFIN is not set
+# CONFIG_SK98LIN is not set
+# CONFIG_FDDI is not set
+# CONFIG_HIPPI is not set
+# CONFIG_PLIP is not set
+# CONFIG_PPP is not set
+# CONFIG_SLIP is not set
+
+#
+# Wireless LAN (non-hamradio)
+#
+# CONFIG_NET_RADIO is not set
+
+#
+# Token Ring devices
+#
+# CONFIG_TR is not set
+# CONFIG_NET_FC is not set
+# CONFIG_RCPCI is not set
+# CONFIG_SHAPER is not set
+
+#
+# Wan interfaces
+#
+# CONFIG_WAN is not set
+
+#
+# PCMCIA network device support
+#
+CONFIG_NET_PCMCIA=y
+# CONFIG_PCMCIA_3C589 is not set
+# CONFIG_PCMCIA_3C574 is not set
+# CONFIG_PCMCIA_FMVJ18X is not set
+CONFIG_PCMCIA_PCNET=m
+# CONFIG_PCMCIA_NMCLAN is not set
+CONFIG_PCMCIA_SMC91C92=m
+# CONFIG_PCMCIA_XIRC2PS is not set
+# CONFIG_PCMCIA_AXNET is not set
+# CONFIG_ARCNET_COM20020_CS is not set
+# CONFIG_PCMCIA_IBMTR is not set
+# CONFIG_NET_PCMCIA_RADIO is not set
+
+#
+# Amateur Radio support
+#
+# CONFIG_HAMRADIO is not set
+
+#
+# IrDA (infrared) support
+#
+CONFIG_IRDA=m
+
+#
+# IrDA protocols
+#
+CONFIG_IRLAN=m
+# CONFIG_IRNET is not set
+CONFIG_IRCOMM=m
+# CONFIG_IRDA_ULTRA is not set
+# CONFIG_IRDA_OPTIONS is not set
+
+#
+# Infrared-port device drivers
+#
+
+#
+# SIR device drivers
+#
+CONFIG_IRTTY_SIR=m
+CONFIG_IRPORT_SIR=m
+
+#
+# Dongle support
+#
+# CONFIG_DONGLE is not set
+
+#
+# FIR device drivers
+#
+# CONFIG_USB_IRDA is not set
+# CONFIG_NSC_FIR is not set
+# CONFIG_WINBOND_FIR is not set
+# CONFIG_TOSHIBA_FIR is not set
+# CONFIG_SMC_IRCC_FIR is not set
+# CONFIG_ALI_FIR is not set
+# CONFIG_VLSI_FIR is not set
+CONFIG_SA1100_FIR=m
+
+#
+# ATA/IDE/MFM/RLL support
+#
+CONFIG_IDE=y
+
+#
+# IDE, ATA and ATAPI Block devices
+#
+CONFIG_BLK_DEV_IDE=y
+
+#
+# Please see Documentation/ide.txt for help/info on IDE drives
+#
+# CONFIG_BLK_DEV_HD_IDE is not set
+# CONFIG_BLK_DEV_HD is not set
+CONFIG_BLK_DEV_IDEDISK=y
+# CONFIG_IDEDISK_MULTI_MODE is not set
+# CONFIG_BLK_DEV_IDEDISK_VENDOR is not set
+# CONFIG_BLK_DEV_IDEDISK_FUJITSU is not set
+# CONFIG_BLK_DEV_IDEDISK_IBM is not set
+# CONFIG_BLK_DEV_IDEDISK_MAXTOR is not set
+# CONFIG_BLK_DEV_IDEDISK_QUANTUM is not set
+# CONFIG_BLK_DEV_IDEDISK_SEAGATE is not set
+# CONFIG_BLK_DEV_IDEDISK_WD is not set
+# CONFIG_BLK_DEV_COMMERIAL is not set
+# CONFIG_BLK_DEV_TIVO is not set
+CONFIG_BLK_DEV_IDECS=m
+# CONFIG_BLK_DEV_IDECD is not set
+# CONFIG_BLK_DEV_IDETAPE is not set
+# CONFIG_BLK_DEV_IDEFLOPPY is not set
+# CONFIG_BLK_DEV_IDESCSI is not set
+
+#
+# IDE chipset support/bugfixes
+#
+# CONFIG_BLK_DEV_CMD640 is not set
+# CONFIG_BLK_DEV_CMD640_ENHANCED is not set
+# CONFIG_BLK_DEV_ISAPNP is not set
+# CONFIG_IDE_CHIPSETS is not set
+# CONFIG_IDEDMA_AUTO is not set
+# CONFIG_DMA_NONPCI is not set
+# CONFIG_BLK_DEV_IDE_MODES is not set
+# CONFIG_BLK_DEV_ATARAID is not set
+# CONFIG_BLK_DEV_ATARAID_PDC is not set
+# CONFIG_BLK_DEV_ATARAID_HPT is not set
+
+#
+# SCSI support
+#
+# CONFIG_SCSI is not set
+
+#
+# I2O device support
+#
+# CONFIG_I2O is not set
+# CONFIG_I2O_BLOCK is not set
+# CONFIG_I2O_LAN is not set
+# CONFIG_I2O_SCSI is not set
+# CONFIG_I2O_PROC is not set
+
+#
+# ISDN subsystem
+#
+# CONFIG_ISDN is not set
+
+#
+# Input core support
+#
+CONFIG_INPUT=y
+CONFIG_INPUT_KEYBDEV=y
+CONFIG_INPUT_MOUSEDEV=y
+CONFIG_INPUT_MOUSEDEV_SCREEN_X=1024
+CONFIG_INPUT_MOUSEDEV_SCREEN_Y=768
+# CONFIG_INPUT_JOYDEV is not set
+# CONFIG_INPUT_EVDEV is not set
+
+#
+# Character devices
+#
+CONFIG_VT=y
+# CONFIG_VT_CONSOLE is not set
+# CONFIG_SERIAL is not set
+# CONFIG_SERIAL_EXTENDED is not set
+# CONFIG_SERIAL_NONSTANDARD is not set
+
+#
+# Serial drivers
+#
+# CONFIG_SERIAL_ANAKIN is not set
+# CONFIG_SERIAL_ANAKIN_CONSOLE is not set
+# CONFIG_SERIAL_AMBA is not set
+# CONFIG_SERIAL_AMBA_CONSOLE is not set
+# CONFIG_SERIAL_CLPS711X is not set
+# CONFIG_SERIAL_CLPS711X_CONSOLE is not set
+# CONFIG_SERIAL_21285 is not set
+# CONFIG_SERIAL_21285_OLD is not set
+# CONFIG_SERIAL_21285_CONSOLE is not set
+# CONFIG_SERIAL_UART00 is not set
+# CONFIG_SERIAL_UART00_CONSOLE is not set
+CONFIG_SERIAL_SA1100=y
+CONFIG_SERIAL_SA1100_CONSOLE=y
+CONFIG_SA1100_DEFAULT_BAUDRATE=38400
+CONFIG_SERIAL_8250=m
+# CONFIG_SERIAL_8250_CONSOLE is not set
+# CONFIG_SERIAL_8250_EXTENDED is not set
+# CONFIG_SERIAL_8250_MANY_PORTS is not set
+# CONFIG_SERIAL_8250_SHARE_IRQ is not set
+# CONFIG_SERIAL_8250_DETECT_IRQ is not set
+# CONFIG_SERIAL_8250_MULTIPORT is not set
+# CONFIG_SERIAL_8250_HUB6 is not set
+CONFIG_SERIAL_CORE=y
+CONFIG_SERIAL_CORE_CONSOLE=y
+CONFIG_UNIX98_PTYS=y
+CONFIG_UNIX98_PTY_COUNT=32
+
+#
+# I2C support
+#
+# CONFIG_I2C is not set
+
+#
+# L3 serial bus support
+#
+# CONFIG_L3 is not set
+# CONFIG_L3_ALGOBIT is not set
+# CONFIG_L3_BIT_SA1100_GPIO is not set
+
+#
+# Other L3 adapters
+#
+# CONFIG_L3_SA1111 is not set
+# CONFIG_BIT_SA1100_GPIO is not set
+
+#
+# Mice
+#
+# CONFIG_BUSMOUSE is not set
+# CONFIG_MOUSE is not set
+
+#
+# Joysticks
+#
+# CONFIG_INPUT_GAMEPORT is not set
+# CONFIG_INPUT_NS558 is not set
+# CONFIG_INPUT_LIGHTNING is not set
+# CONFIG_INPUT_PCIGAME is not set
+# CONFIG_INPUT_CS461X is not set
+# CONFIG_INPUT_EMU10K1 is not set
+# CONFIG_INPUT_SERIO is not set
+# CONFIG_INPUT_SERPORT is not set
+
+#
+# Joysticks
+#
+# CONFIG_INPUT_ANALOG is not set
+# CONFIG_INPUT_A3D is not set
+# CONFIG_INPUT_ADI is not set
+# CONFIG_INPUT_COBRA is not set
+# CONFIG_INPUT_GF2K is not set
+# CONFIG_INPUT_GRIP is not set
+# CONFIG_INPUT_INTERACT is not set
+# CONFIG_INPUT_TMDC is not set
+# CONFIG_INPUT_SIDEWINDER is not set
+# CONFIG_INPUT_IFORCE_USB is not set
+# CONFIG_INPUT_IFORCE_232 is not set
+# CONFIG_INPUT_WARRIOR is not set
+# CONFIG_INPUT_MAGELLAN is not set
+# CONFIG_INPUT_SPACEORB is not set
+# CONFIG_INPUT_SPACEBALL is not set
+# CONFIG_INPUT_STINGER is not set
+# CONFIG_INPUT_DB9 is not set
+# CONFIG_INPUT_GAMECON is not set
+# CONFIG_INPUT_TURBOGRAFX is not set
+# CONFIG_QIC02_TAPE is not set
+
+#
+# Watchdog Cards
+#
+# CONFIG_WATCHDOG is not set
+# CONFIG_INTEL_RNG is not set
+# CONFIG_NVRAM is not set
+# CONFIG_RTC is not set
+# CONFIG_SA1100_RTC is not set
+# CONFIG_DTLK is not set
+# CONFIG_R3964 is not set
+# CONFIG_APPLICOM is not set
+
+#
+# Ftape, the floppy tape device driver
+#
+# CONFIG_FTAPE is not set
+# CONFIG_AGP is not set
+# CONFIG_DRM is not set
+
+#
+# PCMCIA character devices
+#
+CONFIG_PCMCIA_SERIAL_CS=m
+
+#
+# Multimedia devices
+#
+# CONFIG_VIDEO_DEV is not set
+
+#
+# File systems
+#
+# CONFIG_QUOTA is not set
+# CONFIG_AUTOFS_FS is not set
+# CONFIG_AUTOFS4_FS is not set
+# CONFIG_REISERFS_FS is not set
+# CONFIG_REISERFS_CHECK is not set
+# CONFIG_REISERFS_PROC_INFO is not set
+# CONFIG_ADFS_FS is not set
+# CONFIG_ADFS_FS_RW is not set
+# CONFIG_AFFS_FS is not set
+# CONFIG_HFS_FS is not set
+# CONFIG_BFS_FS is not set
+# CONFIG_EXT3_FS is not set
+# CONFIG_JBD is not set
+# CONFIG_JBD_DEBUG is not set
+CONFIG_FAT_FS=y
+CONFIG_MSDOS_FS=y
+# CONFIG_UMSDOS_FS is not set
+# CONFIG_VFAT_FS is not set
+# CONFIG_EFS_FS is not set
+# CONFIG_JFFS_FS is not set
+CONFIG_JFFS2_FS=y
+CONFIG_JFFS2_FS_DEBUG=0
+# CONFIG_CRAMFS is not set
+CONFIG_TMPFS=y
+# CONFIG_RAMFS is not set
+# CONFIG_ISO9660_FS is not set
+# CONFIG_JOLIET is not set
+# CONFIG_ZISOFS is not set
+# CONFIG_MINIX_FS is not set
+# CONFIG_VXFS_FS is not set
+# CONFIG_NTFS_FS is not set
+# CONFIG_NTFS_RW is not set
+# CONFIG_HPFS_FS is not set
+CONFIG_PROC_FS=y
+# CONFIG_DEVFS_FS is not set
+# CONFIG_DEVFS_MOUNT is not set
+# CONFIG_DEVFS_DEBUG is not set
+CONFIG_DEVPTS_FS=y
+# CONFIG_QNX4FS_FS is not set
+# CONFIG_QNX4FS_RW is not set
+# CONFIG_ROMFS_FS is not set
+CONFIG_EXT2_FS=y
+# CONFIG_SYSV_FS is not set
+# CONFIG_UDF_FS is not set
+# CONFIG_UDF_RW is not set
+# CONFIG_UFS_FS is not set
+# CONFIG_UFS_FS_WRITE is not set
+
+#
+# Network File Systems
+#
+# CONFIG_CODA_FS is not set
+# CONFIG_INTERMEZZO_FS is not set
+CONFIG_NFS_FS=y
+# CONFIG_NFS_V3 is not set
+# CONFIG_ROOT_NFS is not set
+# CONFIG_NFSD is not set
+# CONFIG_NFSD_V3 is not set
+CONFIG_SUNRPC=y
+CONFIG_LOCKD=y
+# CONFIG_SMB_FS is not set
+# CONFIG_NCP_FS is not set
+# CONFIG_NCPFS_PACKET_SIGNING is not set
+# CONFIG_NCPFS_IOCTL_LOCKING is not set
+# CONFIG_NCPFS_STRONG is not set
+# CONFIG_NCPFS_NFS_NS is not set
+# CONFIG_NCPFS_OS2_NS is not set
+# CONFIG_NCPFS_SMALLDOS is not set
+# CONFIG_NCPFS_NLS is not set
+# CONFIG_NCPFS_EXTRAS is not set
+# CONFIG_ZISOFS_FS is not set
+# CONFIG_ZLIB_FS_INFLATE is not set
+
+#
+# Partition Types
+#
+CONFIG_PARTITION_ADVANCED=y
+# CONFIG_ACORN_PARTITION is not set
+# CONFIG_OSF_PARTITION is not set
+# CONFIG_AMIGA_PARTITION is not set
+# CONFIG_ATARI_PARTITION is not set
+# CONFIG_MAC_PARTITION is not set
+CONFIG_MSDOS_PARTITION=y
+# CONFIG_BSD_DISKLABEL is not set
+# CONFIG_MINIX_SUBPARTITION is not set
+# CONFIG_SOLARIS_X86_PARTITION is not set
+# CONFIG_UNIXWARE_DISKLABEL is not set
+# CONFIG_LDM_PARTITION is not set
+# CONFIG_SGI_PARTITION is not set
+# CONFIG_ULTRIX_PARTITION is not set
+# CONFIG_SUN_PARTITION is not set
+# CONFIG_SMB_NLS is not set
+CONFIG_NLS=y
+
+#
+# Native Language Support
+#
+CONFIG_NLS_DEFAULT="iso8859-1"
+CONFIG_NLS_CODEPAGE_437=y
+# CONFIG_NLS_CODEPAGE_737 is not set
+# CONFIG_NLS_CODEPAGE_775 is not set
+# CONFIG_NLS_CODEPAGE_850 is not set
+# CONFIG_NLS_CODEPAGE_852 is not set
+# CONFIG_NLS_CODEPAGE_855 is not set
+# CONFIG_NLS_CODEPAGE_857 is not set
+# CONFIG_NLS_CODEPAGE_860 is not set
+# CONFIG_NLS_CODEPAGE_861 is not set
+# CONFIG_NLS_CODEPAGE_862 is not set
+# CONFIG_NLS_CODEPAGE_863 is not set
+# CONFIG_NLS_CODEPAGE_864 is not set
+# CONFIG_NLS_CODEPAGE_865 is not set
+# CONFIG_NLS_CODEPAGE_866 is not set
+# CONFIG_NLS_CODEPAGE_869 is not set
+# CONFIG_NLS_CODEPAGE_936 is not set
+# CONFIG_NLS_CODEPAGE_950 is not set
+# CONFIG_NLS_CODEPAGE_932 is not set
+# CONFIG_NLS_CODEPAGE_949 is not set
+# CONFIG_NLS_CODEPAGE_874 is not set
+# CONFIG_NLS_ISO8859_8 is not set
+# CONFIG_NLS_CODEPAGE_1251 is not set
+# CONFIG_NLS_ISO8859_1 is not set
+# CONFIG_NLS_ISO8859_2 is not set
+# CONFIG_NLS_ISO8859_3 is not set
+# CONFIG_NLS_ISO8859_4 is not set
+# CONFIG_NLS_ISO8859_5 is not set
+# CONFIG_NLS_ISO8859_6 is not set
+# CONFIG_NLS_ISO8859_7 is not set
+# CONFIG_NLS_ISO8859_9 is not set
+# CONFIG_NLS_ISO8859_13 is not set
+# CONFIG_NLS_ISO8859_14 is not set
+# CONFIG_NLS_ISO8859_15 is not set
+# CONFIG_NLS_KOI8_R is not set
+# CONFIG_NLS_KOI8_U is not set
+# CONFIG_NLS_UTF8 is not set
+
+#
+# Console drivers
+#
+CONFIG_PC_KEYMAP=y
+# CONFIG_VGA_CONSOLE is not set
+
+#
+# Frame-buffer support
+#
+CONFIG_FB=y
+CONFIG_DUMMY_CONSOLE=y
+# CONFIG_FB_ACORN is not set
+# CONFIG_FB_ANAKIN is not set
+# CONFIG_FB_CLPS711X is not set
+CONFIG_FB_SA1100=y
+# CONFIG_FB_CYBER2000 is not set
+# CONFIG_FB_VIRTUAL is not set
+# CONFIG_FBCON_ADVANCED is not set
+CONFIG_FBCON_CFB2=y
+CONFIG_FBCON_CFB4=y
+CONFIG_FBCON_CFB8=y
+CONFIG_FBCON_CFB16=y
+CONFIG_FBCON_FONTWIDTH8_ONLY=y
+CONFIG_FBCON_FONTS=y
+CONFIG_FONT_8x8=y
+# CONFIG_FONT_8x16 is not set
+# CONFIG_FONT_SUN8x16 is not set
+# CONFIG_FONT_PEARL_8x8 is not set
+# CONFIG_FONT_ACORN_8x8 is not set
+
+#
+# Sound
+#
+# CONFIG_SOUND is not set
+
+#
+# Multimedia Capabilities Port drivers
+#
+# CONFIG_MCP is not set
+# CONFIG_MCP_SA1100 is not set
+# CONFIG_MCP_UCB1200 is not set
+# CONFIG_MCP_UCB1200_AUDIO is not set
+# CONFIG_MCP_UCB1200_TS is not set
+
+#
+# USB support
+#
+CONFIG_USB=m
+# CONFIG_USB_DEBUG is not set
+
+#
+# Miscellaneous USB options
+#
+CONFIG_USB_DEVICEFS=y
+# CONFIG_USB_BANDWIDTH is not set
+# CONFIG_USB_LONG_TIMEOUT is not set
+
+#
+# USB Controllers
+#
+# CONFIG_USB_UHCI is not set
+# CONFIG_USB_UHCI_ALT is not set
+# CONFIG_USB_OHCI is not set
+CONFIG_USB_OHCI_SA1111=m
+
+#
+# USB Device Class drivers
+#
+# CONFIG_USB_AUDIO is not set
+# CONFIG_USB_BLUETOOTH is not set
+# CONFIG_USB_STORAGE is not set
+# CONFIG_USB_STORAGE_DEBUG is not set
+# CONFIG_USB_STORAGE_DATAFAB is not set
+# CONFIG_USB_STORAGE_FREECOM is not set
+# CONFIG_USB_STORAGE_ISD200 is not set
+# CONFIG_USB_STORAGE_DPCM is not set
+# CONFIG_USB_STORAGE_HP8200e is not set
+# CONFIG_USB_STORAGE_SDDR09 is not set
+# CONFIG_USB_STORAGE_JUMPSHOT is not set
+# CONFIG_USB_ACM is not set
+CONFIG_USB_PRINTER=m
+
+#
+# USB Human Interface Devices (HID)
+#
+CONFIG_USB_HID=m
+CONFIG_USB_HIDDEV=y
+CONFIG_USB_KBD=m
+CONFIG_USB_MOUSE=m
+# CONFIG_USB_WACOM is not set
+
+#
+# USB Imaging devices
+#
+# CONFIG_USB_DC2XX is not set
+# CONFIG_USB_MDC800 is not set
+# CONFIG_USB_SCANNER is not set
+# CONFIG_USB_MICROTEK is not set
+# CONFIG_USB_HPUSBSCSI is not set
+
+#
+# USB Multimedia devices
+#
+
+#
+#   Video4Linux support is needed for USB Multimedia device support
+#
+
+#
+# USB Network adaptors
+#
+# CONFIG_USB_PEGASUS is not set
+# CONFIG_USB_KAWETH is not set
+# CONFIG_USB_CATC is not set
+# CONFIG_USB_CDCETHER is not set
+CONFIG_USB_USBNET=m
+
+#
+# USB port drivers
+#
+# CONFIG_USB_USS720 is not set
+
+#
+# USB Serial Converter support
+#
+# CONFIG_USB_SERIAL is not set
+# CONFIG_USB_SERIAL_GENERIC is not set
+# CONFIG_USB_SERIAL_BELKIN is not set
+# CONFIG_USB_SERIAL_WHITEHEAT is not set
+# CONFIG_USB_SERIAL_DIGI_ACCELEPORT is not set
+# CONFIG_USB_SERIAL_EMPEG is not set
+# CONFIG_USB_SERIAL_FTDI_SIO is not set
+# CONFIG_USB_SERIAL_VISOR is not set
+# CONFIG_USB_SERIAL_IR is not set
+# CONFIG_USB_SERIAL_EDGEPORT is not set
+# CONFIG_USB_SERIAL_KEYSPAN_PDA is not set
+# CONFIG_USB_SERIAL_KEYSPAN is not set
+# CONFIG_USB_SERIAL_KEYSPAN_USA28 is not set
+# CONFIG_USB_SERIAL_KEYSPAN_USA28X is not set
+# CONFIG_USB_SERIAL_KEYSPAN_USA28XA is not set
+# CONFIG_USB_SERIAL_KEYSPAN_USA28XB is not set
+# CONFIG_USB_SERIAL_KEYSPAN_USA19 is not set
+# CONFIG_USB_SERIAL_KEYSPAN_USA18X is not set
+# CONFIG_USB_SERIAL_KEYSPAN_USA19W is not set
+# CONFIG_USB_SERIAL_KEYSPAN_USA49W is not set
+# CONFIG_USB_SERIAL_MCT_U232 is not set
+# CONFIG_USB_SERIAL_PL2303 is not set
+# CONFIG_USB_SERIAL_CYBERJACK is not set
+# CONFIG_USB_SERIAL_XIRCOM is not set
+# CONFIG_USB_SERIAL_OMNINET is not set
+
+#
+# USB Miscellaneous drivers
+#
+# CONFIG_USB_RIO500 is not set
+
+#
+# Bluetooth support
+#
+# CONFIG_BLUEZ is not set
+
+#
+# Kernel hacking
+#
+# CONFIG_NO_FRAME_POINTER is not set
+CONFIG_DEBUG_USER=y
+CONFIG_DEBUG_INFO=y
+# CONFIG_NO_PGT_CACHE is not set
+CONFIG_DEBUG_KERNEL=y
+CONFIG_DEBUG_SLAB=y
+CONFIG_MAGIC_SYSRQ=y
+CONFIG_DEBUG_SPINLOCK=y
+CONFIG_DEBUG_WAITQ=y
+CONFIG_DEBUG_BUGVERBOSE=y
+CONFIG_DEBUG_ERRORS=y
+CONFIG_DEBUG_LL=y
+# CONFIG_DEBUG_DC21285_PORT is not set
+# CONFIG_DEBUG_CLPS711X_UART2 is not set
diff -Nru linux/arch/arm/kernel/Makefile linux-2.4.19-pre5-mjc/arch/arm/kernel/Makefile
--- linux/arch/arm/kernel/Makefile	Thu Oct 25 16:53:45 2001
+++ linux-2.4.19-pre5-mjc/arch/arm/kernel/Makefile	Sat Apr  6 08:25:57 2002
@@ -42,7 +42,8 @@
 
 no-irq-arch	:= $(CONFIG_ARCH_INTEGRATOR) $(CONFIG_ARCH_CLPS711X) \
 		   $(CONFIG_FOOTBRIDGE) $(CONFIG_ARCH_EBSA110) \
-		   $(CONFIG_ARCH_SA1100) $(CONFIG_ARCH_CAMELOT)
+		   $(CONFIG_ARCH_SA1100) $(CONFIG_ARCH_CAMELOT) \
+		   $(CONFIG_ARCH_MX1ADS)
 
 ifneq ($(findstring y,$(no-irq-arch)),y)
   obj-y		+= irq-arch.o
diff -Nru linux/arch/arm/kernel/armksyms.c linux-2.4.19-pre5-mjc/arch/arm/kernel/armksyms.c
--- linux/arch/arm/kernel/armksyms.c	Thu Oct 11 12:04:57 2001
+++ linux-2.4.19-pre5-mjc/arch/arm/kernel/armksyms.c	Sat Apr  6 08:25:57 2002
@@ -77,12 +77,12 @@
 extern void __do_softirq(void);
 
 #define EXPORT_SYMBOL_ALIAS(sym,orig)		\
- const char __kstrtab_##sym##[]			\
+ const char __kstrtab_##sym[]			\
   __attribute__((section(".kstrtab"))) =	\
     __MODULE_STRING(sym);			\
  const struct module_symbol __ksymtab_##sym	\
   __attribute__((section("__ksymtab"))) =	\
-    { (unsigned long)&##orig, __kstrtab_##sym };
+    { (unsigned long)&orig, __kstrtab_##sym };
 
 /*
  * floating point math emulator support.
@@ -115,7 +115,9 @@
 EXPORT_SYMBOL(system_rev);
 EXPORT_SYMBOL(system_serial_low);
 EXPORT_SYMBOL(system_serial_high);
+#ifdef CONFIG_DEBUG_BUGVERBOSE
 EXPORT_SYMBOL(__bug);
+#endif
 EXPORT_SYMBOL(__bad_xchg);
 EXPORT_SYMBOL(__readwrite_bug);
 EXPORT_SYMBOL(enable_irq);
@@ -229,6 +231,7 @@
 EXPORT_SYMBOL_NOVERS(__udivmoddi4);
 EXPORT_SYMBOL_NOVERS(__udivsi3);
 EXPORT_SYMBOL_NOVERS(__umodsi3);
+EXPORT_SYMBOL_NOVERS(abort);
 
 	/* bitops */
 EXPORT_SYMBOL(set_bit);
diff -Nru linux/arch/arm/kernel/bios32.c linux-2.4.19-pre5-mjc/arch/arm/kernel/bios32.c
--- linux/arch/arm/kernel/bios32.c	Thu Oct 11 12:04:57 2001
+++ linux-2.4.19-pre5-mjc/arch/arm/kernel/bios32.c	Sat Apr  6 08:25:57 2002
@@ -153,8 +153,7 @@
 }
 
 /*
- * PCI IDE controllers use non-standard I/O port
- * decoding, respect it.
+ * PCI IDE controllers use non-standard I/O port decoding, respect it.
  */
 static void __init pci_fixup_ide_bases(struct pci_dev *dev)
 {
@@ -181,9 +180,82 @@
 	pci_write_config_dword(dev, 0x40, 0x80000000);
 }
 
+/*
+ * The CY82C693 needs some rather major fixups to ensure that it does
+ * the right thing.  Idea from the Alpha people, with a few additions.
+ *
+ * We ensure that the IDE base registers are set to 1f0/3f4 for the
+ * primary bus, and 170/374 for the secondary bus.  Also, hide them
+ * from the PCI subsystem view as well so we won't try to perform
+ * our own auto-configuration on them.
+ *
+ * In addition, we ensure that the PCI IDE interrupts are routed to
+ * IRQ 14 and IRQ 15 respectively.
+ *
+ * The above gets us to a point where the IDE on this device is
+ * functional.  However, The CY82C693U _does not work_ in bus
+ * master mode without locking the PCI bus solid.
+ */
+static void __init pci_fixup_cy82c693(struct pci_dev *dev)
+{
+	if ((dev->class >> 8) == PCI_CLASS_STORAGE_IDE) {
+		u32 base0, base1;
+
+		if (dev->class & 0x80) {	/* primary */
+			base0 = 0x1f0;
+			base1 = 0x3f4;
+		} else {			/* secondary */
+			base0 = 0x170;
+			base1 = 0x374;
+		}
+
+		pci_write_config_dword(dev, PCI_BASE_ADDRESS_0,
+				       base0 | PCI_BASE_ADDRESS_SPACE_IO);
+		pci_write_config_dword(dev, PCI_BASE_ADDRESS_1,
+				       base1 | PCI_BASE_ADDRESS_SPACE_IO);
+
+		dev->resource[0].start = 0;
+		dev->resource[0].end   = 0;
+		dev->resource[0].flags = 0;
+
+		dev->resource[1].start = 0;
+		dev->resource[1].end   = 0;
+		dev->resource[1].flags = 0;
+	} else if (PCI_FUNC(dev->devfn) == 0) {
+		/*
+		 * Setup IDE IRQ routing.
+		 */
+		pci_write_config_byte(dev, 0x4b, 14);
+		pci_write_config_byte(dev, 0x4c, 15);
+
+		/*
+		 * Disable FREQACK handshake, enable USB.
+		 */
+		pci_write_config_byte(dev, 0x4d, 0x41);
+
+		/*
+		 * Enable PCI retry, and PCI post-write buffer.
+		 */
+		pci_write_config_byte(dev, 0x44, 0x17);
+
+		/*
+		 * Enable ISA master and DMA post write buffering.
+		 */
+		pci_write_config_byte(dev, 0x45, 0x03);
+	}
+}
+
 struct pci_fixup pcibios_fixups[] = {
 	{
 		PCI_FIXUP_HEADER,
+		PCI_VENDOR_ID_CONTAQ,	PCI_DEVICE_ID_CONTAQ_82C693,
+		pci_fixup_cy82c693
+	}, {
+		PCI_FIXUP_HEADER,
+		PCI_VENDOR_ID_DEC,	PCI_DEVICE_ID_DEC_21142,
+		pci_fixup_dec21142
+	}, {
+		PCI_FIXUP_HEADER,
 		PCI_VENDOR_ID_DEC,	PCI_DEVICE_ID_DEC_21285,
 		pci_fixup_dec21285
 	}, {
@@ -198,10 +270,6 @@
 		PCI_FIXUP_HEADER,
 		PCI_ANY_ID,		PCI_ANY_ID,
 		pci_fixup_ide_bases
-	}, {
-		PCI_FIXUP_HEADER,
-		PCI_VENDOR_ID_DEC,	PCI_DEVICE_ID_DEC_21142,
-		pci_fixup_dec21142
 	}, { 0 }
 };
 
diff -Nru linux/arch/arm/kernel/calls.S linux-2.4.19-pre5-mjc/arch/arm/kernel/calls.S
--- linux/arch/arm/kernel/calls.S	Mon Oct  8 13:39:18 2001
+++ linux-2.4.19-pre5-mjc/arch/arm/kernel/calls.S	Sat Apr  6 08:25:57 2002
@@ -236,6 +236,27 @@
 		.long	SYMBOL_NAME(sys_mincore)
 /* 220 */	.long	SYMBOL_NAME(sys_madvise)
 		.long	SYMBOL_NAME(sys_fcntl64)
+		.long	SYMBOL_NAME(sys_ni_syscall) /* TUX */
+		.long	SYMBOL_NAME(sys_ni_syscall) /* Security */
+		.long	SYMBOL_NAME(sys_gettid)
+/* 225 */	.long	SYMBOL_NAME(sys_readahead)
+		.long	SYMBOL_NAME(sys_ni_syscall) /* sys_setxattr */
+		.long	SYMBOL_NAME(sys_ni_syscall) /* sys_lsetxattr */
+		.long	SYMBOL_NAME(sys_ni_syscall) /* sys_fsetxattr */
+		.long	SYMBOL_NAME(sys_ni_syscall) /* sys_getxattr */
+/* 230 */	.long	SYMBOL_NAME(sys_ni_syscall) /* sys_lgetxattr */
+		.long	SYMBOL_NAME(sys_ni_syscall) /* sys_fgetxattr */
+		.long	SYMBOL_NAME(sys_ni_syscall) /* sys_listxattr */
+		.long	SYMBOL_NAME(sys_ni_syscall) /* sys_llistxattr */
+		.long	SYMBOL_NAME(sys_ni_syscall) /* sys_flistxattr */
+/* 235 */	.long	SYMBOL_NAME(sys_ni_syscall) /* sys_removexattr */
+		.long	SYMBOL_NAME(sys_ni_syscall) /* sys_lremovexattr */
+		.long	SYMBOL_NAME(sys_ni_syscall) /* sys_fremovexattr */
+		.long	SYMBOL_NAME(sys_tkill)
+		/*
+		 * Please check 2.5 _before_ adding calls here,
+		 * and copy changes to rmk@arm.linux.org.uk.  Thanks.
+		 */
 __syscall_end:
 
 		.rept	NR_syscalls - (__syscall_end - __syscall_start) / 4
diff -Nru linux/arch/arm/kernel/compat.c linux-2.4.19-pre5-mjc/arch/arm/kernel/compat.c
--- linux/arch/arm/kernel/compat.c	Thu Oct 11 12:04:57 2001
+++ linux-2.4.19-pre5-mjc/arch/arm/kernel/compat.c	Sat Apr  6 08:25:57 2002
@@ -89,10 +89,12 @@
 	}
 
 #ifdef CONFIG_FOOTBRIDGE
-	tag = tag_next(tag);
-	tag->hdr.tag = ATAG_MEMCLK;
-	tag->hdr.size = tag_size(tag_memclk);
-	tag->u.memclk.fmemclk = params->u1.s.mem_fclk_21285;
+	if (params->u1.s.mem_fclk_21285) {
+		tag = tag_next(tag);
+		tag->hdr.tag = ATAG_MEMCLK;
+		tag->hdr.size = tag_size(tag_memclk);
+		tag->u.memclk.fmemclk = params->u1.s.mem_fclk_21285;
+	}
 #endif
 
 #ifdef CONFIG_ARCH_ACORN
diff -Nru linux/arch/arm/kernel/debug-armv.S linux-2.4.19-pre5-mjc/arch/arm/kernel/debug-armv.S
--- linux/arch/arm/kernel/debug-armv.S	Thu Oct 25 16:53:45 2001
+++ linux-2.4.19-pre5-mjc/arch/arm/kernel/debug-armv.S	Sat Apr  6 08:25:57 2002
@@ -164,28 +164,49 @@
 		.endm
 
 #elif defined(CONFIG_ARCH_SA1100)
+
 		.macro	addruart,rx
 		mrc	p15, 0, \rx, c1, c0
 		tst	\rx, #1			@ MMU enabled?
 		moveq	\rx, #0x80000000	@ physical base address
 		movne	\rx, #0xf8000000	@ virtual address
-		@add	\rx, \rx, #0x00050000	@ Ser3
-		add	\rx, \rx, #0x00010000	@ Ser1
+
+		@ We probe for the active serial port here, coherently with
+		@ the comment in include/asm-arm/arch-sa1100/uncompress.h.
+		@ We assume r1 can be clobbered.
+
+		@ see if Ser3 is active
+		add	\rx, \rx, #0x00050000
+		ldr	r1, [\rx, #UTCR3]
+		tst	r1, #UTCR3_TXE
+
+		@ if Ser3 is inactive, then try Ser1
+		addeq	\rx, \rx, #(0x00010000 - 0x00050000)
+		ldreq	r1, [\rx, #UTCR3]
+		tsteq	r1, #UTCR3_TXE
+
+		@ if Ser1 is inactive, then try Ser2
+		addeq	\rx, \rx, #(0x00030000 - 0x00010000)
+		ldreq	r1, [\rx, #UTCR3]
+		tsteq	r1, #UTCR3_TXE
+
+		@ if all ports are inactive, then there is nothing we can do
+		moveq	pc, lr
 		.endm
 
 		.macro	senduart,rd,rx
-		str	\rd, [\rx, #0x14]	@ UTDR
+		str	\rd, [\rx, #UTDR]
 		.endm
 
 		.macro	waituart,rd,rx
-1001:		ldr	\rd, [\rx, #0x20]	@ UTSR1
-		tst	\rd, #1 << 2		@ UTSR1_TNF
+1001:		ldr	\rd, [\rx, #UTSR1]
+		tst	\rd, #UTSR1_TNF
 		beq	1001b
 		.endm
 
 		.macro	busyuart,rd,rx
-1001:		ldr	\rd, [\rx, #0x20]	@ UTSR1
-		tst	\rd, #1 << 0		@ UTSR1_TBY
+1001:		ldr	\rd, [\rx, #UTSR1]
+		tst	\rd, #UTSR1_TBY
 		bne	1001b
 		.endm
 
diff -Nru linux/arch/arm/kernel/dma-arc.c linux-2.4.19-pre5-mjc/arch/arm/kernel/dma-arc.c
--- linux/arch/arm/kernel/dma-arc.c	Wed Jul  4 17:56:44 2001
+++ linux-2.4.19-pre5-mjc/arch/arm/kernel/dma-arc.c	Sat Apr  6 08:25:57 2002
@@ -96,7 +96,7 @@
 	/* 10/1/1999 DAG - Presume whether there is an outstanding command? */
 	extern unsigned int fdc1772_fdc_int_done;
 
-	* Explicit! If the int done is 0 then 1 int to go */
+	/* Explicit! If the int done is 0 then 1 int to go */
 	return (fdc1772_fdc_int_done==0)?1:0;
 }
 
diff -Nru linux/arch/arm/kernel/dma.c linux-2.4.19-pre5-mjc/arch/arm/kernel/dma.c
--- linux/arch/arm/kernel/dma.c	Fri Feb  9 14:29:44 2001
+++ linux-2.4.19-pre5-mjc/arch/arm/kernel/dma.c	Sat Apr  6 08:25:57 2002
@@ -275,6 +275,8 @@
 
 #endif
 
+EXPORT_SYMBOL(request_dma);
+EXPORT_SYMBOL(free_dma);
 EXPORT_SYMBOL(enable_dma);
 EXPORT_SYMBOL(disable_dma);
 EXPORT_SYMBOL(set_dma_addr);
diff -Nru linux/arch/arm/kernel/entry-armv.S linux-2.4.19-pre5-mjc/arch/arm/kernel/entry-armv.S
--- linux/arch/arm/kernel/entry-armv.S	Thu Oct 25 16:53:45 2001
+++ linux-2.4.19-pre5-mjc/arch/arm/kernel/entry-armv.S	Sat Apr  6 08:35:14 2002
@@ -454,6 +454,31 @@
 		.macro	irq_prio_table
 		.endm
 
+#elif defined(CONFIG_ARCH_MX1ADS)
+
+		.macro	disable_fiq
+		.endm
+#define AITC_NIVECSR   0x40
+		.macro	get_irqnr_and_base, irqnr, irqstat, base, tmp
+		ldr	\irqstat, =IO_ADDRESS(MX1ADS_AITC_BASE)
+		@ Load offset & priority of the highest priority
+		@ interrupt pending.
+		ldr	\irqnr, [\irqstat, #AITC_NIVECSR]
+		@ Shift off the priority leaving the offset or
+		@ "interrupt number"
+		mov	\irqnr, \irqnr, lsr #16
+ 		ldr	\irqstat, =1	@ dummy compare
+		ldr	\base, =0xFFFF		// invalid interrupt
+		cmp	\irqnr, \base
+		bne	1001f
+		ldr	\irqstat, =0
+1001:
+		tst	\irqstat, #1	@ to make the condition code = TRUE
+		.endm
+
+		.macro	irq_prio_table
+		.endm
+
 #elif defined(CONFIG_ARCH_CLPS711X)
 
 #include <asm/hardware/clps7111.h>
@@ -643,14 +668,14 @@
 		mrs	r9, cpsr			@ Enable interrupts if they were
 		tst	r3, #I_BIT
 		biceq	r9, r9, #I_BIT			@ previously
-		mov	r0, r2
+		mov	r0, r2				@ *** remove once everyones in sync
 /*
  * This routine must not corrupt r9
  */
 #ifdef MULTI_CPU
-		ldr	r2, .LCprocfns			@ pass r0, r3 to
+		ldr	r4, .LCprocfns			@ pass r0, r3 to
 		mov	lr, pc				@ processor code
-		ldr	pc, [r2]			@ call processor specific code
+		ldr	pc, [r4]			@ call processor specific code
 #else
 		bl	cpu_data_abort
 #endif
@@ -672,6 +697,12 @@
 		add	r4, sp, #S_SP
 		mov	r6, lr
 		stmia	r4, {r5, r6, r7, r8, r9}	@ save sp_SVC, lr_SVC, pc, cpsr, old_ro
+#ifdef CONFIG_PREEMPT
+		get_current_task r9
+		ldr	r8, [r9, #TSK_PREEMPT]
+		add	r8, r8, #1
+		str	r8, [r9, #TSK_PREEMPT]
+#endif
 1:		get_irqnr_and_base r0, r6, r5, lr
 		movne	r1, sp
 		@
@@ -679,6 +710,25 @@
 		@
 		adrsvc	ne, lr, 1b
 		bne	do_IRQ
+#ifdef CONFIG_PREEMPT
+2:		ldr	r8, [r9, #TSK_PREEMPT]
+		subs	r8, r8, #1
+		bne	3f
+		ldr	r7, [r9, #TSK_NEED_RESCHED]
+		teq	r7, #0
+		beq	3f
+		ldr	r6, .LCirqstat
+		ldr	r0, [r6, #IRQSTAT_BH_COUNT]
+		teq	r0, #0
+		bne	3f
+		mov	r0, #MODE_SVC
+		msr	cpsr_c, r0		@ enable interrupts
+		bl	SYMBOL_NAME(preempt_schedule)
+		mov	r0, #I_BIT | MODE_SVC
+		msr	cpsr_c, r0              @ disable interrupts
+		b	2b
+3:		str	r8, [r9, #TSK_PREEMPT]
+#endif
 		ldr	r0, [sp, #S_PSR]		@ irqs are already disabled
 		msr	spsr, r0
 		ldmia	sp, {r0 - pc}^			@ load r0 - pc, cpsr
@@ -736,6 +786,9 @@
 .LCprocfns:	.word	SYMBOL_NAME(processor)
 #endif
 .LCfp:		.word	SYMBOL_NAME(fp_enter)
+#ifdef CONFIG_PREEMPT
+.LCirqstat:	.word	SYMBOL_NAME(irq_stat)
+#endif
 
 		irq_prio_table
 
@@ -747,15 +800,16 @@
 		stmia	sp, {r0 - r12}			@ save r0 - r12
 		ldr	r7, .LCabt
 		add	r5, sp, #S_PC
-		ldmia	r7, {r0, r3, r4}		@ Get USR pc, cpsr
-		stmia	r5, {r0, r3, r4}		@ Save USR pc, cpsr, old_r0
+		ldmia	r7, {r2 - r4}			@ Get USR pc, cpsr
+		stmia	r5, {r2 - r4}			@ Save USR pc, cpsr, old_r0
 		stmdb	r5, {sp, lr}^
 		alignment_trap r7, r7, __temp_abt
 		zero_fp
+		mov	r0, r2				@ remove once everyones in sync
 #ifdef MULTI_CPU
-		ldr	r2, .LCprocfns			@ pass r0, r3 to
+		ldr	r4, .LCprocfns			@ pass r0, r3 to
 		mov	lr, pc				@ processor code
-		ldr	pc, [r2]			@ call processor specific code
+		ldr	pc, [r4]			@ call processor specific code
 #else
 		bl	cpu_data_abort
 #endif
@@ -775,6 +829,12 @@
 		stmdb	r8, {sp, lr}^
 		alignment_trap r4, r7, __temp_irq
 		zero_fp
+		get_current_task tsk
+#ifdef CONFIG_PREEMPT
+		ldr	r0, [tsk, #TSK_PREEMPT]
+		add	r0, r0, #1
+		str	r0, [tsk, #TSK_PREEMPT]
+#endif
 1:		get_irqnr_and_base r0, r6, r5, lr
 		movne	r1, sp
 		adrsvc	ne, lr, 1b
@@ -782,8 +842,12 @@
 		@ routine called with r0 = irq number, r1 = struct pt_regs *
 		@
 		bne	do_IRQ
+#ifdef CONFIG_PREEMPT
+		ldr	r0, [tsk, #TSK_PREEMPT]
+		sub	r0, r0, #1
+		str	r0, [tsk, #TSK_PREEMPT]
+#endif
 		mov	why, #0
-		get_current_task tsk
 		b	ret_to_user
 
 		.align	5
diff -Nru linux/arch/arm/kernel/init_task.c linux-2.4.19-pre5-mjc/arch/arm/kernel/init_task.c
--- linux/arch/arm/kernel/init_task.c	Thu Oct 11 12:04:57 2001
+++ linux-2.4.19-pre5-mjc/arch/arm/kernel/init_task.c	Sat Apr  6 08:25:57 2002
@@ -9,7 +9,6 @@
 #include <asm/uaccess.h>
 #include <asm/pgtable.h>
 
-static struct vm_area_struct init_mmap = INIT_MMAP;
 static struct fs_struct init_fs = INIT_FS;
 static struct files_struct init_files = INIT_FILES;
 static struct signal_struct init_signals = INIT_SIGNALS;
diff -Nru linux/arch/arm/kernel/process.c linux-2.4.19-pre5-mjc/arch/arm/kernel/process.c
--- linux/arch/arm/kernel/process.c	Sun Sep 30 15:26:08 2001
+++ linux-2.4.19-pre5-mjc/arch/arm/kernel/process.c	Sat Apr  6 08:25:57 2002
@@ -24,9 +24,8 @@
 #include <linux/interrupt.h>
 #include <linux/init.h>
 
-#include <asm/system.h>
-#include <asm/io.h>
 #include <asm/leds.h>
+#include <asm/system.h>
 #include <asm/uaccess.h>
 
 /*
diff -Nru linux/arch/arm/kernel/semaphore.c linux-2.4.19-pre5-mjc/arch/arm/kernel/semaphore.c
--- linux/arch/arm/kernel/semaphore.c	Mon Feb 25 14:37:52 2002
+++ linux-2.4.19-pre5-mjc/arch/arm/kernel/semaphore.c	Sat Apr  6 08:25:58 2002
@@ -210,7 +210,6 @@
 	mov	r0, ip
 	bl	__up
 	ldmfd	sp!, {r0 - r3, pc}^
-
 	");
 
 #else
@@ -248,7 +247,6 @@
 	mov	r0, ip
 	bl	__up
 	ldmfd	sp!, {r0 - r3, pc}
-
 	");
 
 #endif
diff -Nru linux/arch/arm/kernel/signal.c linux-2.4.19-pre5-mjc/arch/arm/kernel/signal.c
--- linux/arch/arm/kernel/signal.c	Thu Oct 11 12:04:57 2001
+++ linux-2.4.19-pre5-mjc/arch/arm/kernel/signal.c	Sat Apr  6 08:25:58 2002
@@ -344,7 +344,7 @@
 	/*
 	 * This is the X/Open sanctioned signal stack switching.
 	 */
-	if ((ka->sa.sa_flags & SA_ONSTACK) && sas_ss_flags(sp))
+	if ((ka->sa.sa_flags & SA_ONSTACK) && !sas_ss_flags(sp))
 		sp = current->sas_ss_sp + current->sas_ss_size;
 
 	/*
diff -Nru linux/arch/arm/kernel/traps.c linux-2.4.19-pre5-mjc/arch/arm/kernel/traps.c
--- linux/arch/arm/kernel/traps.c	Thu Oct 11 12:04:57 2001
+++ linux-2.4.19-pre5-mjc/arch/arm/kernel/traps.c	Sat Apr  6 08:25:58 2002
@@ -25,8 +25,6 @@
 #include <linux/interrupt.h>
 #include <linux/init.h>
 
-#include <asm/atomic.h>
-#include <asm/io.h>
 #include <asm/pgtable.h>
 #include <asm/system.h>
 #include <asm/uaccess.h>
@@ -53,7 +51,7 @@
  */
 static int verify_stack(unsigned long sp)
 {
-	if (sp < PAGE_OFFSET || sp > (unsigned long)high_memory)
+	if (sp < PAGE_OFFSET || (sp > (unsigned long)high_memory && high_memory != 0))
 		return -EFAULT;
 
 	return 0;
@@ -62,13 +60,15 @@
 /*
  * Dump out the contents of some memory nicely...
  */
-void dump_mem(unsigned long bottom, unsigned long top)
+static void dump_mem(const char *str, unsigned long bottom, unsigned long top)
 {
 	unsigned long p = bottom & ~31;
 	int i;
 
+	printk("%s(0x%08lx to 0x%08lx)\n", str, bottom, top);
+
 	for (p = bottom & ~31; p < top;) {
-		printk("%08lx: ", p);
+		printk("%04lx: ", p & 0xffff);
 
 		for (i = 0; i < 8; i++, p += 4) {
 			unsigned int val;
@@ -79,21 +79,11 @@
 				__get_user(val, (unsigned long *)p);
 				printk("%08x ", val);
 			}
-			if (i == 3)
-				printk(" ");
 		}
 		printk ("\n");
 	}
 }
 
-/*
- * These constants are for searching for possible module text
- * segments.  VMALLOC_OFFSET comes from mm/vmalloc.c; MODULE_RANGE is
- * a guess of how much space is likely to be vmalloced.
- */
-#define VMALLOC_OFFSET (8*1024*1024)
-#define MODULE_RANGE (8*1024*1024)
-
 static void dump_instr(struct pt_regs *regs)
 {
 	unsigned long addr = instruction_pointer(regs);
@@ -102,7 +92,7 @@
 	int i;
 
 	printk("Code: ");
-	for (i = -2; i < 3; i++) {
+	for (i = -4; i < 1; i++) {
 		unsigned int val, bad;
 
 		if (thumb)
@@ -122,8 +112,7 @@
 
 static void dump_stack(struct task_struct *tsk, unsigned long sp)
 {
-	printk("Stack:\n");
-	dump_mem(sp - 16, 8192+(unsigned long)tsk);
+	dump_mem("Stack: ", sp - 16, 8192+(unsigned long)tsk);
 }
 
 static void dump_backtrace(struct pt_regs *regs, struct task_struct *tsk)
@@ -289,10 +278,9 @@
 		handler[reason], processor_modes[proc_mode]);
 
 	/*
-	 * We need to switch to kernel mode so that we can
-	 * use __get_user to safely read from kernel space.
-	 * Note that we now dump the code first, just in case
-	 * the backtrace kills us.
+	 * We need to switch to kernel mode so that we can use __get_user
+	 * to safely read from kernel space.  Note that we now dump the
+	 * code first, just in case the backtrace kills us.
 	 */
 	fs = get_fs();
 	set_fs(KERNEL_DS);
@@ -301,10 +289,8 @@
 	 * Dump out the vectors and stub routines.  Maybe a better solution
 	 * would be to dump them out only if we detect that they are corrupted.
 	 */
-	printk(KERN_CRIT "Vectors:\n");
-	dump_mem(vectors, 0x40);
-	printk(KERN_CRIT "Stubs:\n");
-	dump_mem(vectors + 0x200, 0x4b8);
+	dump_mem(KERN_CRIT "Vectors: ", vectors, vectors + 0x40);
+	dump_mem(KERN_CRIT "Stubs: ", vectors + 0x200, vectors + 0x4b8);
 
 	set_fs(fs);
 
@@ -528,11 +514,6 @@
 
 void abort(void)
 {
-	void *lr = __builtin_return_address(0);
-
-	printk(KERN_CRIT "abort() called from %p!  (Please "
-	       "report to rmk@arm.linux.org.uk)\n", lr);
-
 	BUG();
 
 	/* if that doesn't kill us, halt */
diff -Nru linux/arch/arm/lib/ecard.S linux-2.4.19-pre5-mjc/arch/arm/lib/ecard.S
--- linux/arch/arm/lib/ecard.S	Mon Nov 27 20:07:59 2000
+++ linux-2.4.19-pre5-mjc/arch/arm/lib/ecard.S	Sat Apr  6 08:25:58 2002
@@ -12,7 +12,7 @@
 #include <asm/assembler.h>
 #include <asm/hardware.h>
 
-#if defined(CONFIG_CPU_26)
+#ifdef CONFIG_CPU_26
 #define CPSR2SPSR(rt)
 #else
 #define CPSR2SPSR(rt) \
diff -Nru linux/arch/arm/lib/getuser.S linux-2.4.19-pre5-mjc/arch/arm/lib/getuser.S
--- linux/arch/arm/lib/getuser.S	Thu Oct 11 12:04:57 2001
+++ linux-2.4.19-pre5-mjc/arch/arm/lib/getuser.S	Sat Apr  6 08:25:58 2002
@@ -80,8 +80,9 @@
 
 	/* fall through */
 
-__get_user_bad:
+__get_user_bad_8:
 	mov	r2, #0
+__get_user_bad:
 	mov	r1, #0
 	mov	r0, #-14
 	mov	pc, lr
@@ -91,6 +92,6 @@
 	.long	2b, __get_user_bad
 	.long	3b, __get_user_bad
 	.long	4b, __get_user_bad
-	.long	5b, __get_user_bad
-	.long	6b, __get_user_bad
+	.long	5b, __get_user_bad_8
+	.long	6b, __get_user_bad_8
 .previous
diff -Nru linux/arch/arm/lib/io-acorn.S linux-2.4.19-pre5-mjc/arch/arm/lib/io-acorn.S
--- linux/arch/arm/lib/io-acorn.S	Thu Oct 25 16:53:45 2001
+++ linux-2.4.19-pre5-mjc/arch/arm/lib/io-acorn.S	Sat Apr  6 08:25:58 2002
@@ -58,7 +58,7 @@
 @ Proto  : void memc_write(int register, int value);
 @ Returns: nothing
 
-#if defined(CONFIG_CPU_26)
+#ifdef CONFIG_CPU_26
 ENTRY(memc_write)
 		cmp	r0, #7
 		RETINSTR(movgt,pc,lr)
diff -Nru linux/arch/arm/lib/io-shark.c linux-2.4.19-pre5-mjc/arch/arm/lib/io-shark.c
--- linux/arch/arm/lib/io-shark.c	Thu Apr 12 15:20:31 2001
+++ linux-2.4.19-pre5-mjc/arch/arm/lib/io-shark.c	Sat Apr  6 08:25:58 2002
@@ -1,7 +1,7 @@
 /*
  *  linux/arch/arm/lib/io-shark.c
  *
- *  by Alexander Schulz <aschulz@netwinder.org>
+ *  by Alexander Schulz
  *
  * derived from:
  * linux/arch/arm/lib/io-ebsa.S
diff -Nru linux/arch/arm/lib/strrchr.S linux-2.4.19-pre5-mjc/arch/arm/lib/strrchr.S
--- linux/arch/arm/lib/strrchr.S	Mon Sep 18 18:15:25 2000
+++ linux-2.4.19-pre5-mjc/arch/arm/lib/strrchr.S	Sat Apr  6 08:25:58 2002
@@ -18,7 +18,7 @@
 		mov	r3, #0
 1:		ldrb	r2, [r0], #1
 		teq	r2, r1
-		moveq	r3, r0
+		subeq	r3, r0, #1
 		teq	r2, #0
 		bne	1b
 		mov	r0, r3
diff -Nru linux/arch/arm/mach-clps711x/Makefile linux-2.4.19-pre5-mjc/arch/arm/mach-clps711x/Makefile
--- linux/arch/arm/mach-clps711x/Makefile	Wed Dec 31 19:00:00 1969
+++ linux-2.4.19-pre5-mjc/arch/arm/mach-clps711x/Makefile	Sat Apr  6 08:25:58 2002
@@ -0,0 +1,30 @@
+#
+# Makefile for the linux kernel.
+#
+# Note! Dependencies are done automagically by 'make dep', which also
+# removes any old dependencies. DON'T put your own dependencies here
+# unless it's something special (ie not a .c file).
+
+USE_STANDARD_AS_RULE := true
+
+O_TARGET		:= clps711x.o
+
+# Object file lists.
+
+obj-y			:= irq.o mm.o time.o
+obj-m			:=
+obj-n			:=
+obj-			:=
+
+export-objs		:= leds-p720t.o
+
+obj-$(CONFIG_ARCH_AUTCPU12) += autcpu12.o
+obj-$(CONFIG_ARCH_CDB89712) += cdb89712.o
+obj-$(CONFIG_ARCH_CLEP7312) += clep7312.o
+obj-$(CONFIG_ARCH_EDB7211) += edb7211-arch.o edb7211-mm.o
+obj-$(CONFIG_ARCH_P720T) += p720t.o
+obj-$(CONFIG_ARCH_FORTUNET) += fortunet.o
+leds-$(CONFIG_ARCH_P720T) += p720t-leds.o
+obj-$(CONFIG_LEDS)	+= $(leds-y)
+
+include $(TOPDIR)/Rules.make
diff -Nru linux/arch/arm/mach-clps711x/autcpu12.c linux-2.4.19-pre5-mjc/arch/arm/mach-clps711x/autcpu12.c
--- linux/arch/arm/mach-clps711x/autcpu12.c	Wed Dec 31 19:00:00 1969
+++ linux-2.4.19-pre5-mjc/arch/arm/mach-clps711x/autcpu12.c	Sat Apr  6 08:25:58 2002
@@ -0,0 +1,72 @@
+/*
+ *  linux/arch/arm/mach-clps711x/autcpu12.c
+ *
+ * (c) 2001 Thomas Gleixner, autronix automation <gleixner@autronix.de>
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or
+ * (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA  02111-1307  USA
+ */
+#include <linux/init.h>
+#include <linux/types.h>
+#include <linux/string.h>
+#include <linux/blk.h>
+#include <linux/sched.h>
+#include <linux/mm.h>
+
+#include <asm/hardware.h>
+#include <asm/sizes.h>
+#include <asm/io.h>
+#include <asm/setup.h>
+#include <asm/mach-types.h>
+#include <asm/mach/arch.h>
+#include <asm/pgtable.h>
+#include <asm/page.h>
+
+#include <asm/mach/map.h>
+#include <asm/arch/autcpu12.h>
+
+extern void clps711x_map_io(void);
+extern void clps711x_init_irq(void);
+
+/*
+ * The on-chip registers are given a size of 1MB so that a section can
+ * be used to map them; this saves a page table.  This is the place to
+ * add mappings for ROM, expansion memory, PCMCIA, etc.  (if static
+ * mappings are chosen for those areas).
+ *
+*/
+
+static struct map_desc autcpu12_io_desc[] __initdata = {
+ /* virtual, physical, length, domain, r, w, c, b */
+ /* memory-mapped extra io and CS8900A Ethernet chip */
+ /* ethernet chip */
+ 	{ AUTCPU12_VIRT_CS8900A, AUTCPU12_PHYS_CS8900A, SZ_1M, DOMAIN_IO, 1, 1, 0, 0 },
+	
+ 	LAST_DESC
+};
+
+void __init autcpu12_map_io(void)
+{
+        clps711x_map_io();
+        iotable_init(autcpu12_io_desc);
+}
+
+MACHINE_START(AUTCPU12, "autronix autcpu12")
+	MAINTAINER("Thomas Gleixner")
+        BOOT_MEM(0xc0000000, 0x80000000, 0xff000000)
+	BOOT_PARAMS(0xc0020000)
+	MAPIO(autcpu12_map_io)
+	INITIRQ(clps711x_init_irq)
+MACHINE_END
+
diff -Nru linux/arch/arm/mach-clps711x/cdb89712.c linux-2.4.19-pre5-mjc/arch/arm/mach-clps711x/cdb89712.c
--- linux/arch/arm/mach-clps711x/cdb89712.c	Wed Dec 31 19:00:00 1969
+++ linux-2.4.19-pre5-mjc/arch/arm/mach-clps711x/cdb89712.c	Sat Apr  6 08:25:58 2002
@@ -0,0 +1,74 @@
+/*
+ *  linux/arch/arm/mach-clps711x/cdb89712.c
+ *
+ *  Copyright (C) 2000-2001 Deep Blue Solutions Ltd
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or
+ * (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA  02111-1307  USA
+ */
+#include <linux/init.h>
+#include <linux/types.h>
+#include <linux/string.h>
+#include <linux/sched.h>
+#include <linux/mm.h>
+
+#include <asm/hardware.h>
+#include <asm/io.h>
+#include <asm/pgtable.h>
+#include <asm/page.h>
+#include <asm/setup.h>
+#include <asm/mach-types.h>
+#include <asm/mach/arch.h>
+#include <asm/mach/map.h>
+
+extern void clps711x_init_irq(void);
+extern void clps711x_map_io(void);
+
+/*
+ * Map the CS89712 Ethernet port.  That should be moved to the
+ * ethernet driver, perhaps.
+ */
+static struct map_desc cdb89712_io_desc[] __initdata = {
+	{ ETHER_BASE, ETHER_START, ETHER_SIZE, DOMAIN_IO, 0, 1, 0, 0 },
+	LAST_DESC
+};
+
+static void __init
+fixup_cdb89712(struct machine_desc *desc, struct param_struct *params,
+	    char **cmdline, struct meminfo *mi)
+{
+}
+
+static void __init cdb89712_map_io(void)
+{
+	clps711x_map_io();
+	iotable_init(cdb89712_io_desc);
+}
+
+MACHINE_START(CDB89712, "Cirrus-CDB89712")
+	MAINTAINER("Ray Lehtiniemi")
+	BOOT_MEM(0xc0000000, 0x80000000, 0xff000000)
+	BOOT_PARAMS(0xc0000100)
+	FIXUP(fixup_cdb89712)
+	MAPIO(cdb89712_map_io)
+	INITIRQ(clps711x_init_irq)
+MACHINE_END
+
+static int cdb89712_hw_init(void)
+{
+	return 0;
+}
+
+__initcall(cdb89712_hw_init);
+
diff -Nru linux/arch/arm/mach-clps711x/clep7312.c linux-2.4.19-pre5-mjc/arch/arm/mach-clps711x/clep7312.c
--- linux/arch/arm/mach-clps711x/clep7312.c	Wed Dec 31 19:00:00 1969
+++ linux-2.4.19-pre5-mjc/arch/arm/mach-clps711x/clep7312.c	Sat Apr  6 08:25:58 2002
@@ -0,0 +1,49 @@
+/*
+ *  linux/arch/arm/mach-clps711x/clep7312.c
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or
+ * (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA  02111-1307  USA
+ */
+#include <linux/init.h>
+#include <linux/types.h>
+#include <linux/string.h>
+
+#include <asm/setup.h>
+#include <asm/mach-types.h>
+#include <asm/mach/arch.h>
+
+extern void clps711x_init_irq(void);
+extern void clps711x_map_io(void); 
+
+static void __init
+fixup_clep7312(struct machine_desc *desc, struct param_struct *params,
+	    char **cmdline, struct meminfo *mi)
+{
+	mi->nr_banks=1;
+	mi->end = 0xc0FFFFFF;
+	mi->bank[0].start = 0xc0000000;
+	mi->bank[0].size = 0x01000000;
+	mi->bank[0].node = 0;
+}
+
+
+MACHINE_START(CLEP7212, "Cirrus Logic 7212/7312")
+	MAINTAINER("Nobody")
+        BOOT_MEM(0xc0000000, 0x80000000, 0xff000000)
+	BOOT_PARAMS(0xc0000100)
+	FIXUP(fixup_clep7312)
+	MAPIO(clps711x_map_io)
+	INITIRQ(clps711x_init_irq)
+MACHINE_END
+
diff -Nru linux/arch/arm/mach-clps711x/dma.c linux-2.4.19-pre5-mjc/arch/arm/mach-clps711x/dma.c
--- linux/arch/arm/mach-clps711x/dma.c	Wed Dec 31 19:00:00 1969
+++ linux-2.4.19-pre5-mjc/arch/arm/mach-clps711x/dma.c	Sat Apr  6 08:25:58 2002
@@ -0,0 +1,35 @@
+/*
+ *  linux/arch/arm/mach-clps711x/dma.c
+ *
+ *  Copyright (C) 2000 Deep Blue Solutions Ltd
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or
+ * (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA  02111-1307  USA
+ */
+#include <linux/sched.h>
+#include <linux/slab.h>
+#include <linux/mman.h>
+#include <linux/init.h>
+
+#include <asm/page.h>
+#include <asm/pgtable.h>
+#include <asm/dma.h>
+#include <asm/io.h>
+#include <asm/hardware.h>
+
+#include <asm/mach/dma.h>
+
+void __init arch_dma_init(dma_t *dma)
+{
+}
diff -Nru linux/arch/arm/mach-clps711x/edb7211-arch.c linux-2.4.19-pre5-mjc/arch/arm/mach-clps711x/edb7211-arch.c
--- linux/arch/arm/mach-clps711x/edb7211-arch.c	Wed Dec 31 19:00:00 1969
+++ linux-2.4.19-pre5-mjc/arch/arm/mach-clps711x/edb7211-arch.c	Sat Apr  6 08:25:58 2002
@@ -0,0 +1,59 @@
+/*
+ *  linux/arch/arm/mach-clps711x/arch-edb7211.c
+ *
+ *  Copyright (C) 2000, 2001 Blue Mug, Inc.  All Rights Reserved.
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or
+ * (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA  02111-1307  USA
+ */
+#include <linux/init.h>
+#include <linux/types.h>
+#include <linux/string.h>
+
+#include <asm/setup.h>
+#include <asm/mach-types.h>
+#include <asm/mach/arch.h>
+
+extern void clps711x_init_irq(void);
+extern void edb7211_map_io(void);
+
+static void __init
+fixup_edb7211(struct machine_desc *desc, struct param_struct *params,
+	      char **cmdline, struct meminfo *mi)
+{
+	/*
+	 * Bank start addresses are not present in the information
+	 * passed in from the boot loader.  We could potentially
+	 * detect them, but instead we hard-code them.
+	 *
+	 * Banks sizes _are_ present in the param block, but we're
+	 * not using that information yet.
+	 */
+	mi->bank[0].start = 0xc0000000;
+	mi->bank[0].size = 8*1024*1024;
+	mi->bank[0].node = 0;
+	mi->bank[1].start = 0xc1000000;
+	mi->bank[1].size = 8*1024*1024;
+	mi->bank[1].node = 1;
+	mi->nr_banks = 2;
+}
+
+MACHINE_START(EDB7211, "CL-EDB7211 (EP7211 eval board)")
+	MAINTAINER("Jon McClintock")
+	BOOT_MEM(0xc0000000, 0x80000000, 0xff000000)
+	BOOT_PARAMS(0xc0020100)	/* 0xc0000000 - 0xc001ffff can be video RAM */
+	FIXUP(fixup_edb7211)
+	MAPIO(edb7211_map_io)
+	INITIRQ(clps711x_init_irq)
+MACHINE_END
diff -Nru linux/arch/arm/mach-clps711x/edb7211-mm.c linux-2.4.19-pre5-mjc/arch/arm/mach-clps711x/edb7211-mm.c
--- linux/arch/arm/mach-clps711x/edb7211-mm.c	Wed Dec 31 19:00:00 1969
+++ linux-2.4.19-pre5-mjc/arch/arm/mach-clps711x/edb7211-mm.c	Sat Apr  6 08:25:58 2002
@@ -0,0 +1,74 @@
+/*
+ *  linux/arch/arm/mach-clps711x/mm.c
+ *
+ *  Extra MM routines for the EDB7211 board
+ *
+ *  Copyright (C) 2000, 2001 Blue Mug, Inc.  All Rights Reserved.
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or
+ * (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA  02111-1307  USA
+ */
+#include <linux/sched.h>
+#include <linux/mm.h>
+#include <linux/init.h>
+
+#include <asm/hardware.h>
+#include <asm/pgtable.h>
+#include <asm/page.h>
+ 
+#include <asm/mach/map.h>
+
+#define MB1 1048576	/* one megabyte == size of an MMU section */
+
+extern void clps711x_map_io(void);
+
+/*
+ * The on-chip registers are given a size of 1MB so that a section can
+ * be used to map them; this saves a page table.  This is the place to
+ * add mappings for ROM, expansion memory, PCMCIA, etc.  (if static
+ * mappings are chosen for those areas).
+ *
+ * Here is a physical memory map (to be fleshed out later):
+ *
+ * Physical Address  Size  Description
+ * ----------------- ----- ---------------------------------
+ * c0000000-c001ffff 128KB reserved for video RAM [1]
+ * c0020000-c0023fff  16KB parameters (see Documentation/arm/Setup)
+ * c0024000-c0027fff  16KB swapper_pg_dir (task 0 page directory)
+ * c0028000-...            kernel image (TEXTADDR)
+ *
+ * [1] Unused pages should be given back to the VM; they are not yet.
+ *     The parameter block should also be released (not sure if this
+ *     happens).
+ */
+static struct map_desc edb7211_io_desc[] __initdata = {
+ /* virtual, physical, length, domain, r, w, c, b */
+
+ /* memory-mapped extra keyboard row and CS8900A Ethernet chip */
+ { EP7211_VIRT_EXTKBD, EP7211_PHYS_EXTKBD, MB1, DOMAIN_IO, 1, 1, 0, 0 }, 
+ { EP7211_VIRT_CS8900A, EP7211_PHYS_CS8900A, MB1, DOMAIN_IO, 1, 1, 0, 0 },
+
+ /* flash banks */
+ { EP7211_VIRT_FLASH1, EP7211_PHYS_FLASH1, MB1 * 8, DOMAIN_KERNEL, 1, 1, 0, 0 },
+ { EP7211_VIRT_FLASH2, EP7211_PHYS_FLASH2, MB1 * 8, DOMAIN_KERNEL, 1, 1, 0, 0 },
+
+ LAST_DESC
+};
+
+void __init edb7211_map_io(void)
+{
+        clps711x_map_io();
+        iotable_init(edb7211_io_desc);
+}
+
diff -Nru linux/arch/arm/mach-clps711x/fortunet.c linux-2.4.19-pre5-mjc/arch/arm/mach-clps711x/fortunet.c
--- linux/arch/arm/mach-clps711x/fortunet.c	Wed Dec 31 19:00:00 1969
+++ linux-2.4.19-pre5-mjc/arch/arm/mach-clps711x/fortunet.c	Sat Apr  6 08:25:58 2002
@@ -0,0 +1,81 @@
+/*
+ *  linux/arch/arm/mach-clps711x/fortunet.c
+ *
+ *  Derived from linux/arch/arm/mach-integrator/arch.c
+ *
+ *  Copyright (C) 2000 Deep Blue Solutions Ltd
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or
+ * (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA  02111-1307  USA
+ */
+#include <linux/config.h>
+#include <linux/types.h>
+#include <linux/sched.h>
+#include <linux/interrupt.h>
+#include <linux/init.h>
+#include <linux/blk.h>
+
+#include <asm/hardware.h>
+#include <asm/irq.h>
+#include <asm/setup.h>
+#include <asm/mach-types.h>
+
+#include <asm/mach/arch.h>
+#include <asm/mach/amba_kmi.h>
+
+extern void clps711x_map_io(void);
+extern void clps711x_init_irq(void);
+
+struct meminfo memmap = { 1, 0xC1000000, {{0xC0000000,0x01000000,0}}};
+
+typedef struct tag_IMAGE_PARAMS
+{
+	int	ramdisk_ok;
+	int	ramdisk_address;
+	int	ramdisk_size;
+	int	ram_size;
+	int	extra_param_type;
+	int	extra_param_ptr;
+	int	command_line;
+} IMAGE_PARAMS;
+
+#define IMAGE_PARAMS_PHYS	0xC01F0000
+
+static void __init
+fortunet_fixup(struct machine_desc *desc, struct param_struct *params,
+		 char **cmdline, struct meminfo *mi)
+{
+	IMAGE_PARAMS *ip;
+	ip = (IMAGE_PARAMS *)__phys_to_virt(IMAGE_PARAMS_PHYS);
+	*cmdline = (char *)__phys_to_virt(ip->command_line);
+#ifdef CONFIG_BLK_DEV_INITRD
+	if(ip->ramdisk_ok)
+	{
+		initrd_start = __phys_to_virt(ip->ramdisk_address);
+		initrd_end = initrd_start + ip->ramdisk_size;
+	}
+#endif
+	memmap.bank[0].size = ip->ram_size;
+	memmap.end = ip->ram_size+0xC0000000;
+	*mi = memmap;
+}
+
+MACHINE_START(FORTUNET, "ARM-FortuNet")
+	MAINTAINER("FortuNet Inc.")
+        BOOT_MEM(0xc0000000, 0x80000000, 0xf0000000)
+	BOOT_PARAMS(0x00000000)
+	FIXUP(fortunet_fixup)
+	MAPIO(clps711x_map_io)
+	INITIRQ(clps711x_init_irq)
+MACHINE_END
diff -Nru linux/arch/arm/mach-clps711x/irq.c linux-2.4.19-pre5-mjc/arch/arm/mach-clps711x/irq.c
--- linux/arch/arm/mach-clps711x/irq.c	Wed Dec 31 19:00:00 1969
+++ linux-2.4.19-pre5-mjc/arch/arm/mach-clps711x/irq.c	Sat Apr  6 08:25:58 2002
@@ -0,0 +1,138 @@
+/*
+ *  linux/arch/arm/mach-clps711x/irq.c
+ *
+ *  Copyright (C) 2000 Deep Blue Solutions Ltd.
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or
+ * (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA  02111-1307  USA
+ */
+#include <linux/init.h>
+
+#include <asm/mach/irq.h>
+#include <asm/hardware.h>
+#include <asm/io.h>
+#include <asm/irq.h>
+
+#include <asm/hardware/clps7111.h>
+
+static void mask_irq_int1(unsigned int irq)
+{
+	u32 intmr1;
+
+	intmr1 = clps_readl(INTMR1);
+	intmr1 &= ~(1 << irq);
+	clps_writel(intmr1, INTMR1);
+}
+
+static void mask_ack_irq_int1(unsigned int irq)
+{
+	u32 intmr1;
+
+	intmr1 = clps_readl(INTMR1);
+	intmr1 &= ~(1 << irq);
+	clps_writel(intmr1, INTMR1);
+
+	switch (irq) {
+	case IRQ_CSINT:  clps_writel(0, COEOI);  break;
+	case IRQ_TC1OI:  clps_writel(0, TC1EOI); break;
+	case IRQ_TC2OI:  clps_writel(0, TC2EOI); break;
+	case IRQ_RTCMI:  clps_writel(0, RTCEOI); break;
+	case IRQ_TINT:   clps_writel(0, TEOI);   break;
+	case IRQ_UMSINT: clps_writel(0, UMSEOI); break;
+	}
+}
+
+static void unmask_irq_int1(unsigned int irq)
+{
+	u32 intmr1;
+
+	intmr1 = clps_readl(INTMR1);
+	intmr1 |= 1 << irq;
+	clps_writel(intmr1, INTMR1);
+}
+
+static void mask_irq_int2(unsigned int irq)
+{
+	u32 intmr2;
+
+	intmr2 = clps_readl(INTMR2);
+	intmr2 &= ~(1 << (irq - 16));
+	clps_writel(intmr2, INTMR2);
+}
+
+static void mask_ack_irq_int2(unsigned int irq)
+{
+	u32 intmr2;
+
+	intmr2 = clps_readl(INTMR2);
+	intmr2 &= ~(1 << (irq - 16));
+	clps_writel(intmr2, INTMR2);
+
+	switch (irq) {
+	case IRQ_KBDINT: clps_writel(0, KBDEOI); break;
+	}
+}
+
+static void unmask_irq_int2(unsigned int irq)
+{
+	u32 intmr2;
+
+	intmr2 = clps_readl(INTMR2);
+	intmr2 |= 1 << (irq - 16);
+	clps_writel(intmr2, INTMR2);
+}
+
+void __init clps711x_init_irq(void)
+{
+	unsigned int i;
+
+	for (i = 0; i < NR_IRQS; i++) {
+	        if (INT1_IRQS & (1 << i)) {
+		        irq_desc[i].valid	= 1;
+			irq_desc[i].probe_ok	= 1;
+			irq_desc[i].mask_ack	= (INT1_ACK_IRQS & (1 << i)) ?
+						   mask_ack_irq_int1 :
+						   mask_irq_int1;
+			irq_desc[i].mask	= mask_irq_int1;
+			irq_desc[i].unmask	= unmask_irq_int1;
+		}
+		if (INT2_IRQS & (1 << i)) {
+		        irq_desc[i].valid	= 1;
+			irq_desc[i].probe_ok	= 1;
+			irq_desc[i].mask_ack	= (INT2_ACK_IRQS & (1 << i)) ?
+						   mask_ack_irq_int2 :
+						   mask_irq_int2;
+			irq_desc[i].mask	= mask_irq_int2;
+			irq_desc[i].unmask	= unmask_irq_int2;
+		}			
+	}
+
+	/*
+	 * Disable interrupts
+	 */
+	clps_writel(0, INTMR1);
+	clps_writel(0, INTMR2);
+
+	/*
+	 * Clear down any pending interrupts
+	 */
+	clps_writel(0, COEOI);
+	clps_writel(0, TC1EOI);
+	clps_writel(0, TC2EOI);
+	clps_writel(0, RTCEOI);
+	clps_writel(0, TEOI);
+	clps_writel(0, UMSEOI);
+	clps_writel(0, SYNCIO);
+	clps_writel(0, KBDEOI);
+}
diff -Nru linux/arch/arm/mach-clps711x/mm.c linux-2.4.19-pre5-mjc/arch/arm/mach-clps711x/mm.c
--- linux/arch/arm/mach-clps711x/mm.c	Wed Dec 31 19:00:00 1969
+++ linux-2.4.19-pre5-mjc/arch/arm/mach-clps711x/mm.c	Sat Apr  6 08:25:58 2002
@@ -0,0 +1,70 @@
+/*
+ *  linux/arch/arm/mach-clps711x/mm.c
+ *
+ *  Generic MM setup for the CLPS711x-based machines.
+ *
+ *  Copyright (C) 2001 Deep Blue Solutions Ltd
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or
+ * (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA  02111-1307  USA
+ */
+#include <linux/sched.h>
+#include <linux/mm.h>
+#include <linux/init.h>
+#include <linux/config.h>
+#include <linux/bootmem.h>
+
+#include <asm/hardware.h>
+#include <asm/pgtable.h>
+#include <asm/page.h>
+#include <asm/mach/map.h>
+#include <asm/hardware/clps7111.h>
+
+#if 0 //def CONFIG_DISCONTIGMEM
+  
+/*
+ * The assumption of maximum 4 discontiguous memory banks is present
+ * in several places in the ARM kernel, including the parameter block
+ * (this affects boot loaders, too).  Banks do not necessarily
+ * correspond 1:1 with NUMA nodes, although they usually will,
+ * especially if they are widely discontiguous.
+ *
+ *  - note that the parameter block is depreciated for new implementations
+ *  - also note that discontig_node_data is actually used
+ *    -- rmk 
+ */
+
+static bootmem_data_t node_bootmem_data[4];
+
+pg_data_t clps711x_node_data[4] = {
+        { bdata: &node_bootmem_data[0] },
+        { bdata: &node_bootmem_data[1] },
+        { bdata: &node_bootmem_data[2] },
+        { bdata: &node_bootmem_data[3] },
+};
+
+#endif
+
+/*
+ * This maps the generic CLPS711x registers
+ */
+static struct map_desc clps711x_io_desc[] __initdata = {
+ { CLPS7111_VIRT_BASE,	CLPS7111_PHYS_BASE,	1048576, DOMAIN_IO, 0, 1 },
+ LAST_DESC
+};
+
+void __init clps711x_map_io(void)
+{
+	iotable_init(clps711x_io_desc);
+}
diff -Nru linux/arch/arm/mach-clps711x/p720t-leds.c linux-2.4.19-pre5-mjc/arch/arm/mach-clps711x/p720t-leds.c
--- linux/arch/arm/mach-clps711x/p720t-leds.c	Wed Dec 31 19:00:00 1969
+++ linux-2.4.19-pre5-mjc/arch/arm/mach-clps711x/p720t-leds.c	Sat Apr  6 08:25:58 2002
@@ -0,0 +1,67 @@
+/*
+ *  linux/arch/arm/mach-clps711x/leds.c
+ *
+ *  Integrator LED control routines
+ *
+ *  Copyright (C) 2000 Deep Blue Solutions Ltd
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or
+ * (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA  02111-1307  USA
+ */
+#include <linux/kernel.h>
+#include <linux/init.h>
+
+#include <asm/hardware.h>
+#include <asm/io.h>
+#include <asm/leds.h>
+#include <asm/system.h>
+#include <asm/mach-types.h>
+
+#include <asm/hardware/clps7111.h>
+#include <asm/hardware/ep7212.h>
+
+static void p720t_leds_event(led_event_t ledevt)
+{
+	unsigned long flags;
+	u32 pddr;
+
+	local_irq_save(flags);
+	switch(ledevt) {
+	case led_idle_start:
+		break;
+
+	case led_idle_end:
+		break;
+
+	case led_timer:
+		pddr = clps_readb(PDDR);
+		clps_writeb(pddr ^ 1, PDDR);
+		break;
+
+	default:
+		break;
+	}
+
+	local_irq_restore(flags);
+}
+
+static int __init leds_init(void)
+{
+	if (machine_is_p720t())
+		leds_event = p720t_leds_event;
+
+	return 0;
+}
+
+__initcall(leds_init);
diff -Nru linux/arch/arm/mach-clps711x/p720t.c linux-2.4.19-pre5-mjc/arch/arm/mach-clps711x/p720t.c
--- linux/arch/arm/mach-clps711x/p720t.c	Wed Dec 31 19:00:00 1969
+++ linux-2.4.19-pre5-mjc/arch/arm/mach-clps711x/p720t.c	Sat Apr  6 08:25:58 2002
@@ -0,0 +1,118 @@
+/*
+ *  linux/arch/arm/mach-clps711x/p720t.c
+ *
+ *  Copyright (C) 2000-2001 Deep Blue Solutions Ltd
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or
+ * (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA  02111-1307  USA
+ */
+#include <linux/config.h>
+#include <linux/init.h>
+#include <linux/types.h>
+#include <linux/string.h>
+#include <linux/sched.h>
+#include <linux/mm.h>
+
+#include <asm/hardware.h>
+#include <asm/io.h>
+#include <asm/pgtable.h>
+#include <asm/page.h>
+#include <asm/setup.h>
+#include <asm/mach-types.h>
+#include <asm/mach/arch.h>
+#include <asm/mach/map.h>
+#include <asm/arch/syspld.h>
+
+extern void clps711x_init_irq(void);
+extern void clps711x_map_io(void);
+
+/*
+ * Map the P720T system PLD.  It occupies two address spaces:
+ *  SYSPLD_PHYS_BASE and SYSPLD_PHYS_BASE + 0x00400000
+ * We map both here.
+ */
+static struct map_desc p720t_io_desc[] __initdata = {
+	{ SYSPLD_VIRT_BASE,	SYSPLD_PHYS_BASE, 1048576, DOMAIN_IO, 0, 1 },
+	{ 0xfe400000,		0x10400000,	  1048576, DOMAIN_IO, 0, 1 },
+	LAST_DESC
+};
+
+static void __init
+fixup_p720t(struct machine_desc *desc, struct param_struct *params,
+	    char **cmdline, struct meminfo *mi)
+{
+	struct tag *tag = (struct tag *)params;
+
+	/*
+	 * Our bootloader doesn't setup any tags (yet).
+	 */
+	if (tag->hdr.tag != ATAG_CORE) {
+		tag->hdr.tag = ATAG_CORE;
+		tag->hdr.size = tag_size(tag_core);
+		tag->u.core.flags = 0;
+		tag->u.core.pagesize = PAGE_SIZE;
+		tag->u.core.rootdev = 0x0100;
+
+		tag = tag_next(tag);
+		tag->hdr.tag = ATAG_MEM;
+		tag->hdr.size = tag_size(tag_mem32);
+		tag->u.mem.size = 4096;
+		tag->u.mem.start = PHYS_OFFSET;
+
+		tag = tag_next(tag);
+		tag->hdr.tag = ATAG_NONE;
+		tag->hdr.size = 0;
+	}
+}
+
+static void __init p720t_map_io(void)
+{
+	clps711x_map_io();
+	iotable_init(p720t_io_desc);
+}
+
+MACHINE_START(P720T, "ARM-Prospector720T")
+	MAINTAINER("ARM Ltd/Deep Blue Solutions Ltd")
+	BOOT_MEM(0xc0000000, 0x80000000, 0xff000000)
+	BOOT_PARAMS(0xc0000100)
+	FIXUP(fixup_p720t)
+	MAPIO(p720t_map_io)
+	INITIRQ(clps711x_init_irq)
+MACHINE_END
+
+static int p720t_hw_init(void)
+{
+	/*
+	 * Power down as much as possible in case we don't
+	 * have the drivers loaded.
+	 */
+	PLD_LCDEN = 0;
+	PLD_PWR  &= ~(PLD_S4_ON|PLD_S3_ON|PLD_S2_ON|PLD_S1_ON);
+
+	PLD_KBD   = 0;
+	PLD_IO    = 0;
+	PLD_IRDA  = 0;
+	PLD_CODEC = 0;
+	PLD_TCH   = 0;
+	PLD_SPI   = 0;
+#ifndef CONFIG_DEBUG_LL
+	PLD_COM2  = 0;
+	PLD_COM1  = 0;
+#endif
+
+	return 0;
+}
+
+__initcall(p720t_hw_init);
+
diff -Nru linux/arch/arm/mach-clps711x/time.c linux-2.4.19-pre5-mjc/arch/arm/mach-clps711x/time.c
--- linux/arch/arm/mach-clps711x/time.c	Wed Dec 31 19:00:00 1969
+++ linux-2.4.19-pre5-mjc/arch/arm/mach-clps711x/time.c	Sat Apr  6 08:25:58 2002
@@ -0,0 +1,54 @@
+/*
+ *  linux/arch/arm/mach-clps711x/time.c
+ *
+ *  Copyright (C) 2001 Deep Blue Solutions Ltd.
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA  02111-1307  USA
+ */
+#include <linux/sched.h>
+#include <linux/init.h>
+
+#include <asm/hardware.h>
+#include <asm/io.h>
+#include <asm/hardware/clps7111.h>
+
+extern unsigned long (*gettimeoffset)(void);
+
+/*
+ * gettimeoffset() returns time since last timer tick, in usecs.
+ *
+ * 'LATCH' is hwclock ticks (see CLOCK_TICK_RATE in timex.h) per jiffy.
+ * 'tick' is usecs per jiffy.
+ */
+static unsigned long clps711x_gettimeoffset(void)
+{
+	unsigned long hwticks;
+	hwticks = LATCH - (clps_readl(TC2D) & 0xffff);	/* since last underflow */
+	return (hwticks * tick) / LATCH;
+}
+
+void __init clps711x_setup_timer(void)
+{
+	unsigned int syscon;
+
+	gettimeoffset = clps711x_gettimeoffset;
+
+	syscon = clps_readl(SYSCON1);
+	syscon |= SYSCON1_TC2S | SYSCON1_TC2M;
+	clps_writel(syscon, SYSCON1);
+
+	clps_writel(LATCH-1, TC2D); /* 512kHz / 100Hz - 1 */
+
+	xtime.tv_sec = clps_readl(RTCDR);
+}
diff -Nru linux/arch/arm/mach-ebsa110/io.c linux-2.4.19-pre5-mjc/arch/arm/mach-ebsa110/io.c
--- linux/arch/arm/mach-ebsa110/io.c	Thu Oct 11 12:04:57 2001
+++ linux-2.4.19-pre5-mjc/arch/arm/mach-ebsa110/io.c	Sat Apr  6 08:25:58 2002
@@ -139,7 +139,11 @@
 	 ((p) >> 3) == (0x2f8 >> 3) || \
 	 ((p) >> 3) == (0x378 >> 3))
 
-u8 __inb(int port)
+/*
+ * We're addressing an 8 or 16-bit peripheral which tranfers
+ * odd addresses on the low ISA byte lane.
+ */
+u8 __inb8(unsigned int port)
 {
 	u32 ret;
 
@@ -162,7 +166,11 @@
 	return ret;
 }
 
-u16 __inw(int port)
+/*
+ * We're addressing a 16-bit peripheral which transfers odd
+ * addresses on the high ISA byte lane.
+ */
+u8 __inb16(unsigned int port)
 {
 	u32 ret;
 
@@ -170,13 +178,33 @@
 	 * The SuperIO registers use sane addressing techniques...
 	 */
 	if (SUPERIO_PORT(port))
-		ret = __arch_getw(ISAIO_BASE + (port << 2));
+		ret = __arch_getb(ISAIO_BASE + (port << 2));
 	else {
 		u32 a = ISAIO_BASE + ((port & ~1) << 1);
 
 		/*
 		 * Shame nothing else does
 		 */
+		ret = __arch_getb(a + (port & 1));
+	}
+	return ret;
+}
+
+u16 __inw(unsigned int port)
+{
+	u32 ret;
+
+	/*
+	 * The SuperIO registers use sane addressing techniques...
+	 */
+	if (SUPERIO_PORT(port) || port & 1)
+		ret = __arch_getw(ISAIO_BASE + (port << 2));
+	else {
+		u32 a = ISAIO_BASE + (port << 1);
+
+		/*
+		 * Shame nothing else does
+		 */
 		if (port & 1)
 			BUG();
 
@@ -185,17 +213,27 @@
 	return ret;
 }
 
-u32 __inl(int port)
+/*
+ * Fake a 32-bit read with two 16-bit reads.  Needed for 3c589.
+ */
+u32 __inl(unsigned int port)
 {
-	BUG();
-	return 0;
+	u32 a;
+
+	if (SUPERIO_PORT(port) || port & 3)
+		BUG();
+
+	a = ISAIO_BASE + (port << 1);
+
+	return __arch_getw(a) | __arch_getw(a + 4) << 16;
 }
 
-EXPORT_SYMBOL(__inb);
+EXPORT_SYMBOL(__inb8);
+EXPORT_SYMBOL(__inb16);
 EXPORT_SYMBOL(__inw);
 EXPORT_SYMBOL(__inl);
 
-void __outb(u8 val, int port)
+void __outb8(u8 val, unsigned int port)
 {
 	/*
 	 * The SuperIO registers use sane addressing techniques...
@@ -215,7 +253,24 @@
 	}
 }
 
-void __outw(u16 val, int port)
+void __outb16(u8 val, unsigned int port)
+{
+	/*
+	 * The SuperIO registers use sane addressing techniques...
+	 */
+	if (SUPERIO_PORT(port))
+		__arch_putb(val, ISAIO_BASE + (port << 2));
+	else {
+		u32 a = ISAIO_BASE + ((port & ~1) << 1);
+
+		/*
+		 * Shame nothing else does
+		 */
+		__arch_putb(val, a + (port & 1));
+	}
+}
+
+void __outw(u16 val, unsigned int port)
 {
 	u32 off;
 
@@ -225,7 +280,7 @@
 	if (SUPERIO_PORT(port))
 		off = port << 2;
 	else {
-		off = (port & ~1) << 1;
+		off = port << 1;
 		if (port & 1)
 			BUG();
 
@@ -233,12 +288,13 @@
 	__arch_putw(val, ISAIO_BASE + off);
 }
 
-void __outl(u32 val, int port)
+void __outl(u32 val, unsigned int port)
 {
 	BUG();
 }
 
-EXPORT_SYMBOL(__outb);
+EXPORT_SYMBOL(__outb8);
+EXPORT_SYMBOL(__outb16);
 EXPORT_SYMBOL(__outw);
 EXPORT_SYMBOL(__outl);
 
@@ -315,12 +371,29 @@
 EXPORT_SYMBOL(outsw);
 EXPORT_SYMBOL(insw);
 
+/*
+ * We implement these as 16-bit insw/outsw, mainly for
+ * 3c589 cards.
+ */
 void outsl(unsigned int port, const void *from, int len)
 {
-	panic("outsl not supported on this architecture");
+	u32 off = port << 1;
+
+	if (SUPERIO_PORT(port) || port & 3)
+		BUG();
+
+	__raw_writesw(ISAIO_BASE + off, from, len << 1);
 }
 
 void insl(unsigned int port, void *from, int len)
 {
-	panic("insl not supported on this architecture");
+	u32 off = port << 1;
+
+	if (SUPERIO_PORT(port) || port & 3)
+		BUG();
+
+	__raw_readsw(ISAIO_BASE + off, from, len << 1);
 }
+
+EXPORT_SYMBOL(outsl);
+EXPORT_SYMBOL(insl);
diff -Nru linux/arch/arm/mach-epxa10db/arch.c linux-2.4.19-pre5-mjc/arch/arm/mach-epxa10db/arch.c
--- linux/arch/arm/mach-epxa10db/arch.c	Thu Oct 25 16:53:45 2001
+++ linux-2.4.19-pre5-mjc/arch/arm/mach-epxa10db/arch.c	Sat Apr  6 08:25:58 2002
@@ -18,7 +18,6 @@
  * along with this program; if not, write to the Free Software
  * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA  02111-1307  USA
  */
-#include <linux/config.h>
 #include <linux/types.h>
 #include <linux/sched.h>
 #include <linux/interrupt.h>
diff -Nru linux/arch/arm/mach-epxa10db/mm.c linux-2.4.19-pre5-mjc/arch/arm/mach-epxa10db/mm.c
--- linux/arch/arm/mach-epxa10db/mm.c	Thu Oct 25 16:53:45 2001
+++ linux-2.4.19-pre5-mjc/arch/arm/mach-epxa10db/mm.c	Sat Apr  6 08:25:58 2002
@@ -27,6 +27,7 @@
 #include <asm/io.h>
 #include <asm/pgtable.h>
 #include <asm/page.h>
+#include <asm/sizes.h>
  
 #include <asm/mach/map.h>
 
diff -Nru linux/arch/arm/mach-integrator/pci_v3.c linux-2.4.19-pre5-mjc/arch/arm/mach-integrator/pci_v3.c
--- linux/arch/arm/mach-integrator/pci_v3.c	Thu Oct 11 12:04:57 2001
+++ linux-2.4.19-pre5-mjc/arch/arm/mach-integrator/pci_v3.c	Sat Apr  6 08:25:58 2002
@@ -20,6 +20,7 @@
  * along with this program; if not, write to the Free Software
  * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA  02111-1307  USA
  */
+#include <linux/config.h>
 #include <linux/sched.h>
 #include <linux/kernel.h>
 #include <linux/pci.h>
@@ -411,12 +412,19 @@
 	flags:	IORESOURCE_MEM | IORESOURCE_PREFETCH,
 };
 
-void __init pci_v3_setup_resources(struct resource **resource)
+int __init pci_v3_setup_resources(struct resource **resource)
 {
-	if (request_resource(&iomem_resource, &non_mem))
-		printk("PCI: unable to allocate non-prefetchable memory region\n");
-	if (request_resource(&iomem_resource, &pre_mem))
-		printk("PCI: unable to allocate prefetchable memory region\n");
+	if (request_resource(&iomem_resource, &non_mem)) {
+		printk(KERN_ERR "PCI: unable to allocate non-prefetchable "
+		       "memory region\n");
+		return -EBUSY;
+	}
+	if (request_resource(&iomem_resource, &pre_mem)) {
+		release_resource(&non_mem);
+		printk(KERN_ERR "PCI: unable to allocate prefetchable "
+		       "memory region\n");
+		return -EBUSY;
+	}
 
 	/*
 	 * bus->resource[0] is the IO resource for this bus
@@ -426,6 +434,8 @@
 	resource[0] = &ioport_resource;
 	resource[1] = &non_mem;
 	resource[2] = &pre_mem;
+
+	return 1;
 }
 
 /*
@@ -433,18 +443,23 @@
  * means I can't get additional information on the reason for the pm2fb
  * problems.  I suppose I'll just have to mind-meld with the machine. ;)
  */
-#define SC_PCI     (IO_ADDRESS(INTEGRATOR_SC_PCIENABLE))
-#define SC_LBFADDR (IO_ADDRESS(INTEGRATOR_SC_BASE+0x20))
-#define SC_LBFCODE (IO_ADDRESS(INTEGRATOR_SC_BASE+0x24))
+#define SC_PCI     (IO_ADDRESS(INTEGRATOR_SC_BASE) + INTEGRATOR_SC_PCIENABLE_OFFSET)
+#define SC_LBFADDR (IO_ADDRESS(INTEGRATOR_SC_BASE) + 0x20)
+#define SC_LBFCODE (IO_ADDRESS(INTEGRATOR_SC_BASE) + 0x24)
 
 static int v3_fault(unsigned long addr, struct pt_regs *regs)
 {
 	unsigned long pc = instruction_pointer(regs);
 	unsigned long instr = *(unsigned long *)pc;
+#if 0
+	char buf[128];
 
-	printk("V3 fault: address=0x%08lx, pc=0x%08lx [%08lx] LBFADDR=%08x LBFCODE=%02x ISTAT=%02x\n",
+	sprintf(buf, "V3 fault: address=0x%08lx, pc=0x%08lx [%08lx] LBFADDR=%08x LBFCODE=%02x ISTAT=%02x\n",
 		addr, pc, instr, __raw_readl(SC_LBFADDR), __raw_readl(SC_LBFCODE) & 255,
 		v3_readb(V3_LB_ISTAT));
+	printk(KERN_DEBUG "%s", buf);
+	printascii(buf);
+#endif
 
 	v3_writeb(V3_LB_ISTAT, 0);
 	__raw_writel(3, SC_PCI);
@@ -467,11 +482,20 @@
 		return 0;
 	}
 
+	if ((instr & 0x0e100090) == 0x00100090) {
+		int reg = (instr >> 12) & 15;
+
+		regs->uregs[reg] = -1;
+		regs->ARM_pc += 4;
+		return 0;
+	}
+
 	return 1;
 }
 
 static void v3_irq(int irq, void *devid, struct pt_regs *regs)
 {
+#ifdef CONFIG_DEBUG_LL
 	unsigned long pc = instruction_pointer(regs);
 	unsigned long instr = *(unsigned long *)pc;
 	char buf[128];
@@ -480,10 +504,13 @@
 		pc, instr, __raw_readl(SC_LBFADDR), __raw_readl(SC_LBFCODE) & 255,
 		v3_readb(V3_LB_ISTAT));
 	printascii(buf);
+#endif
 
+	v3_writew(V3_PCI_STAT, 0xf000);
 	v3_writeb(V3_LB_ISTAT, 0);
 	__raw_writel(3, SC_PCI);
 
+#ifdef CONFIG_DEBUG_LL
 	/*
 	 * If the instruction being executed was a read,
 	 * make it look like it read all-ones.
@@ -493,17 +520,9 @@
 		sprintf(buf, "   reg%d = %08lx\n", reg, regs->uregs[reg]);
 		printascii(buf);
 	}
+#endif
 }
 
-static struct irqaction v3_int = {
-	name: "V3",
-	handler: v3_irq,
-};
-static struct irqaction v3_int2 = {
-	name: "V3TM",
-	handler: v3_irq,
-};
-
 extern int (*external_fault)(unsigned long addr, struct pt_regs *regs);
 
 /*
@@ -514,6 +533,8 @@
 {
 	unsigned int pci_cmd;
 	unsigned long flags;
+	unsigned int temp;
+	int ret;
 
 	/*
 	 * Hook in our fault handler for PCI errors
@@ -523,6 +544,12 @@
 	spin_lock_irqsave(&v3_lock, flags);
 
 	/*
+	 * Unlock V3 registers, but only if they were previously locked.
+	 */
+	if (v3_readw(V3_SYSTEM) & V3_SYSTEM_M_LOCK)
+		v3_writew(V3_SYSTEM, 0xa05f);
+
+	/*
 	 * Setup window 0 - PCI non-prefetchable memory
 	 *  Local: 0x40000000 Bus: 0x00000000 Size: 256MB
 	 */
@@ -548,6 +575,45 @@
 			V3_LB_BASE_ENABLE);
 	v3_writew(V3_LB_MAP2, v3_addr_to_lb_map2(0));
 
+	/*
+	 * Disable PCI to host IO cycles
+	 */
+	temp = v3_readw(V3_PCI_CFG) & ~V3_PCI_CFG_M_I2O_EN;
+	temp |= V3_PCI_CFG_M_IO_REG_DIS | V3_PCI_CFG_M_IO_DIS;
+	v3_writew(V3_PCI_CFG, temp);
+
+	printk(KERN_DEBUG "FIFO_CFG: %04x  FIFO_PRIO: %04x\n",
+		v3_readw(V3_FIFO_CFG), v3_readw(V3_FIFO_PRIORITY));
+
+	/*
+	 * Set the V3 FIFO such that writes have higher priority than
+	 * reads, and local bus write causes local bus read fifo flush.
+	 * Same for PCI.
+	 */
+	v3_writew(V3_FIFO_PRIORITY, 0x0a0a);
+
+	/*
+	 * Re-lock the system register.
+	 */
+	temp = v3_readw(V3_SYSTEM) | V3_SYSTEM_M_LOCK;
+	v3_writew(V3_SYSTEM, temp);
+
+	/*
+	 * Clear any error conditions, and enable write errors.
+	 */
+	v3_writeb(V3_LB_ISTAT, 0);
+	v3_writew(V3_LB_CFG, v3_readw(V3_LB_CFG) | (1 << 10));
+	v3_writeb(V3_LB_IMASK, 0x28);
+	__raw_writel(3, SC_PCI);
+
+	/*
+	 * Grab the PCI error interrupt.
+	 */
+	ret = request_irq(IRQ_V3INT, v3_irq, 0, "V3 error", NULL);
+	if (ret)
+		printk(KERN_ERR "PCI: unable to grab PCI error "
+		       "interrupt: %d\n", ret);
+
 	spin_unlock_irqrestore(&v3_lock, flags);
 
 	pci_scan_bus(0, &pci_v3_ops, sysdata);
@@ -557,18 +623,13 @@
 
 	v3_writew(V3_PCI_CMD, pci_cmd);
 
-	/*
-	 * Clear any error conditions.
-	 */
-	__raw_writel(3, SC_PCI);
-	v3_writew(V3_LB_CFG, v3_readw(V3_LB_CFG) | (1 << 10));
-	v3_writeb(V3_LB_ISTAT, 0);
+	v3_writeb(V3_LB_ISTAT, ~0x40);
 	v3_writeb(V3_LB_IMASK, 0x68);
 
-	printk("LB_CFG: %04x LB_ISTAT: %02x LB_IMASK: %02x\n",
-		v3_readw(V3_LB_CFG),
-		v3_readb(V3_LB_ISTAT),
-		v3_readb(V3_LB_IMASK));
-	setup_arm_irq(IRQ_V3INT, &v3_int);
-//	setup_arm_irq(IRQ_LBUSTIMEOUT, &v3_int2);
+#if 0
+	ret = request_irq(IRQ_LBUSTIMEOUT, lb_timeout, 0, "bus timeout", NULL);
+	if (ret)
+		printk(KERN_ERR "PCI: unable to grab local bus timeout ".
+		       "interrupt: %d\n", ret);
+#endif
 }
diff -Nru linux/arch/arm/mach-mx1ads/Makefile linux-2.4.19-pre5-mjc/arch/arm/mach-mx1ads/Makefile
--- linux/arch/arm/mach-mx1ads/Makefile	Wed Dec 31 19:00:00 1969
+++ linux-2.4.19-pre5-mjc/arch/arm/mach-mx1ads/Makefile	Sat Apr  6 08:25:58 2002
@@ -0,0 +1,20 @@
+#
+# Makefile for the linux kernel.
+#
+# Note! Dependencies are done automagically by 'make dep', which also
+# removes any old dependencies. DON'T put your own dependencies here
+# unless it's something special (ie not a .c file).
+
+USE_STANDARD_AS_RULE := true
+
+O_TARGET		:= mx1ads.o
+
+# Object file lists.
+
+obj-y			:= arch.o cpu.o irq.o mm.o time.o
+obj-m			:=
+obj-n			:=
+obj-			:=
+
+
+include $(TOPDIR)/Rules.make
diff -Nru linux/arch/arm/mach-mx1ads/arch.c linux-2.4.19-pre5-mjc/arch/arm/mach-mx1ads/arch.c
--- linux/arch/arm/mach-mx1ads/arch.c	Wed Dec 31 19:00:00 1969
+++ linux-2.4.19-pre5-mjc/arch/arm/mach-mx1ads/arch.c	Sat Apr  6 08:25:58 2002
@@ -0,0 +1,59 @@
+/*
+ *  linux/arch/arm/mach-mx1ads/arch.c
+ *
+ *  Copyright (C) 2000 Deep Blue Solutions Ltd
+ *  Copyright (C) 2002 Shane Nay (shane@minirl.com)
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or
+ * (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA  02111-1307  USA
+ */
+#include <linux/config.h>
+#include <linux/types.h>
+#include <linux/sched.h>
+#include <linux/interrupt.h>
+#include <linux/init.h>
+
+#include <asm/hardware.h>
+#include <asm/irq.h>
+#include <asm/setup.h>
+#include <asm/mach-types.h>
+
+#include <asm/mach/arch.h>
+#include <asm/mach/amba_kmi.h>
+
+extern void mx1ads_map_io(void);
+extern void mx1ads_init_irq(void);
+
+
+static void __init
+mx1ads_fixup(struct machine_desc *desc, struct param_struct *unused,
+		 char **cmdline, struct meminfo *mi)
+{
+}
+
+MACHINE_START(MX1ADS, "Motorola MX1ADS")
+	MAINTAINER("Shane Nay")
+#ifdef CONFIG_ARCH_MX1ADS_SRAM
+	BOOT_MEM(0x12000000, 0x00200000, 0xf0200000)
+#else
+	BOOT_MEM(0x08000000, 0x00200000, 0xf0200000)
+#endif
+	FIXUP(mx1ads_fixup)
+	MAPIO(mx1ads_map_io)
+	INITIRQ(mx1ads_init_irq)
+MACHINE_END
+
+#if 0
+
+#endif
diff -Nru linux/arch/arm/mach-mx1ads/cpu.c linux-2.4.19-pre5-mjc/arch/arm/mach-mx1ads/cpu.c
--- linux/arch/arm/mach-mx1ads/cpu.c	Wed Dec 31 19:00:00 1969
+++ linux-2.4.19-pre5-mjc/arch/arm/mach-mx1ads/cpu.c	Sat Apr  6 08:25:58 2002
@@ -0,0 +1,34 @@
+/*
+ *  linux/arch/arm/mach-mx1ads/cpu.c
+ *
+ *  Copyright (C) 2001 Deep Blue Solutions Ltd.
+ *
+ *  $Id: cpu.c,v 1.2 2001/09/22 12:11:17 rmk Exp $
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+ *
+ * CPU support functions
+ */
+
+/*  FIXME-
+ *  Add support for clock change on the fly.  (Power)
+ *
+ */
+#include <linux/config.h>
+#include <linux/types.h>
+#include <linux/kernel.h>
+#include <linux/cpufreq.h>
+#include <linux/init.h>
+
+#include <asm/hardware.h>
+#include <asm/io.h>
+
+
+static int __init cpu_init(void)
+{
+	return 0;
+}
+
+__initcall(cpu_init);
diff -Nru linux/arch/arm/mach-mx1ads/irq.c linux-2.4.19-pre5-mjc/arch/arm/mach-mx1ads/irq.c
--- linux/arch/arm/mach-mx1ads/irq.c	Wed Dec 31 19:00:00 1969
+++ linux-2.4.19-pre5-mjc/arch/arm/mach-mx1ads/irq.c	Sat Apr  6 08:25:58 2002
@@ -0,0 +1,73 @@
+/*
+ *  linux/arch/arm/mach-mx1ads/irq.c
+ *
+ *  Copyright (C) 1999 ARM Limited
+ *  Copyright (C) 2002 Shane Nay (shane@minirl.com)
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or
+ * (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA  02111-1307  USA
+ */
+#include <linux/init.h>
+
+#include <asm/hardware.h>
+#include <asm/irq.h>
+#include <asm/io.h>
+
+#include <asm/mach/irq.h>
+
+/*
+ *
+ * We simply use the ENABLE DISABLE registers inside of the MX1
+ * to turn on/off specific interrupts.  FIXME- We should
+ * also add support for the accelerated interrupt controller
+ * by putting offets to irq jump code in the appropriate
+ * places.
+ *
+ */
+
+#define INTENNUM_OFF              0x8
+#define INTDISNUM_OFF             0xC
+
+#define VA_AITC_BASE              IO_ADDRESS(MX1ADS_AITC_BASE)
+#define MX1ADS_AITC_INTDISNUM     (VA_AITC_BASE + INTDISNUM_OFF)
+#define MX1ADS_AITC_INTENNUM      (VA_AITC_BASE + INTENNUM_OFF)
+
+static void
+mx1ads_mask_irq(unsigned int irq)
+{
+	__raw_writel(irq, MX1ADS_AITC_INTDISNUM);
+}
+
+static void
+mx1ads_unmask_irq(unsigned int irq)
+{
+	__raw_writel(irq, MX1ADS_AITC_INTENNUM);
+}
+
+void __init
+mx1ads_init_irq(void)
+{
+	unsigned int i;
+
+	for (i = 0; i < NR_IRQS; i++) {
+		irq_desc[i].valid = 1;
+		irq_desc[i].probe_ok = 1;
+		irq_desc[i].mask_ack = mx1ads_mask_irq;
+		irq_desc[i].mask = mx1ads_mask_irq;
+		irq_desc[i].unmask = mx1ads_unmask_irq;
+	}
+
+	/* Disable all interrupts initially. */
+	/* In MX1 this is done in the bootloader. */
+}
diff -Nru linux/arch/arm/mach-mx1ads/mm.c linux-2.4.19-pre5-mjc/arch/arm/mach-mx1ads/mm.c
--- linux/arch/arm/mach-mx1ads/mm.c	Wed Dec 31 19:00:00 1969
+++ linux-2.4.19-pre5-mjc/arch/arm/mach-mx1ads/mm.c	Sat Apr  6 08:25:58 2002
@@ -0,0 +1,45 @@
+/*
+ *  linux/arch/arm/mach-mx1ads/mm.c
+ *
+ *  Copyright (C) 1999,2000 Arm Limited
+ *  Copyright (C) 2000 Deep Blue Solutions Ltd
+ *  Copyright (C) 2002 Shane Nay (shane@minirl.com)
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or
+ * (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA  02111-1307  USA
+ */
+#include <linux/sched.h>
+#include <linux/mm.h>
+#include <linux/init.h>
+
+#include <asm/hardware.h>
+#include <asm/io.h>
+#include <asm/pgtable.h>
+#include <asm/page.h>
+
+#include <asm/mach/map.h>
+
+
+
+static struct map_desc mx1ads_io_desc[] __initdata = {
+
+  { IO_ADDRESS(MX1ADS_SRAM_BASE),     MX1ADS_SRAM_BASE,      SZ_128K   , DOMAIN_IO, 0, 1},
+  { IO_ADDRESS(MX1ADS_IO_BASE),       MX1ADS_IO_BASE,        SZ_256K   , DOMAIN_IO, 0, 1},
+  LAST_DESC
+};
+
+void __init mx1ads_map_io(void)
+{
+	iotable_init(mx1ads_io_desc);
+}
diff -Nru linux/arch/arm/mach-mx1ads/time.c linux-2.4.19-pre5-mjc/arch/arm/mach-mx1ads/time.c
--- linux/arch/arm/mach-mx1ads/time.c	Wed Dec 31 19:00:00 1969
+++ linux-2.4.19-pre5-mjc/arch/arm/mach-mx1ads/time.c	Sat Apr  6 08:25:58 2002
@@ -0,0 +1,45 @@
+/*
+ *  linux/arch/arm/mach-mx1ads/time.c
+ *
+ *  Copyright (C) 2000-2001 Deep Blue Solutions
+ *  Copyright (C) 2002 Shane Nay (shane@minirl.com)
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+ */
+#include <linux/kernel.h>
+#include <linux/sched.h>
+#include <linux/init.h>
+
+#include <asm/hardware.h>
+#include <asm/io.h>
+
+
+extern int (*set_rtc)(void);
+
+/* FIXME-
+ * When we have an external RTC part,
+ * put the mapping in for that part.
+ *
+ * The internal RTC within the MX1 is not sufficient
+ * for tracking time other than time of day, or
+ * date over very short periods of time.
+ *
+ */
+
+static int mx1ads_set_rtc(void)
+{
+	return 0;
+}
+
+static int mx1ads_rtc_init(void)
+{
+	xtime.tv_sec = 0;
+
+	set_rtc = mx1ads_set_rtc;
+
+	return 0;
+}
+
+__initcall(mx1ads_rtc_init);
diff -Nru linux/arch/arm/mach-sa1100/Makefile linux-2.4.19-pre5-mjc/arch/arm/mach-sa1100/Makefile
--- linux/arch/arm/mach-sa1100/Makefile	Thu Oct 25 16:53:45 2001
+++ linux-2.4.19-pre5-mjc/arch/arm/mach-sa1100/Makefile	Sat Apr  6 08:25:58 2002
@@ -9,20 +9,19 @@
 
 O_TARGET		:= sa1100.o
 
-obj-y :=
+# Common support (must be linked before board specific support)
+obj-y := generic.o irq.o dma-sa1100.o
 obj-m :=
 obj-n :=
 obj-  :=
 
-export-objs :=	assabet.o dma-sa1100.o dma-sa1111.o freebird.o generic.o \
-		h3600.o huw_webpanel.o irq.o pcipool.o sa1111-pcibuf.o   \
-		yopy.o
+export-objs :=	assabet.o dma-sa1100.o dma-sa1111.o \
+		flexanet.o freebird.o generic.o h3600.o \
+		huw_webpanel.o irq.o pcipool.o sa1111.o sa1111-pcibuf.o \
+		system3.o yopy.o usb_ctl.o usb_recv.o usb_send.o
 
 # These aren't present yet, and prevents a plain -ac kernel building.
-# hwtimer.o usb_ctl.o usb_recv.o usb_send.o
-
-# Common support (must be linked before board specific support)
-obj-y += generic.o irq.o dma-sa1100.o
+# hwtimer.o
 
 # This needs to be cleaned up.  We probably need to have SA1100
 # and SA1110 config symbols.
@@ -31,6 +30,7 @@
 ifeq ($(CONFIG_CPU_FREQ),y)
 obj-$(CONFIG_SA1100_ASSABET) += cpu-sa1110.o
 obj-$(CONFIG_SA1100_CERF) += cpu-sa1110.o
+obj-$(CONFIG_SA1100_PT_SYSTEM3) += cpu-sa1110.o
 obj-$(CONFIG_SA1100_LART) += cpu-sa1100.o
 endif
 
@@ -42,11 +42,13 @@
 obj-$(CONFIG_SA1100_ADSBITSY) += adsbitsy.o
 obj-$(CONFIG_SA1100_ASSABET) += assabet.o
 obj-$(CONFIG_ASSABET_NEPONSET) += neponset.o
+obj-$(CONFIG_SA1100_BADGE4) +=  badge4.o
 obj-$(CONFIG_SA1100_BRUTUS) += brutus.o
 obj-$(CONFIG_SA1100_CERF) += cerf.o
 obj-$(CONFIG_SA1100_EMPEG) += empeg.o
 obj-$(CONFIG_SA1100_FLEXANET) += flexanet.o
 obj-$(CONFIG_SA1100_FREEBIRD) += freebird.o
+obj-$(CONFIG_SA1100_FRODO) += frodo.o
 obj-$(CONFIG_SA1100_GRAPHICSCLIENT) += graphicsclient.o
 obj-$(CONFIG_SA1100_GRAPHICSMASTER) += graphicsmaster.o
 obj-$(CONFIG_SA1100_H3600) += h3600.o
@@ -59,6 +61,8 @@
 obj-$(CONFIG_SA1100_PANGOLIN) += pangolin.o
 obj-$(CONFIG_SA1100_PFS168) += pfs168.o
 obj-$(CONFIG_SA1100_PLEB) += pleb.o
+obj-$(CONFIG_SA1100_PT_SYSTEM3) += system3.o
+obj-$(CONFIG_SA1100_SHANNON) += shannon.o
 obj-$(CONFIG_SA1100_SHERMAN) += sherman.o
 obj-$(CONFIG_SA1100_SIMPAD) += simpad.o
 obj-$(CONFIG_SA1100_VICTOR) += victor.o
@@ -72,14 +76,27 @@
 leds-$(CONFIG_SA1100_BRUTUS) += leds-brutus.o
 leds-$(CONFIG_SA1100_CERF) += leds-cerf.o
 leds-$(CONFIG_SA1100_FLEXANET) += leds-flexanet.o
+leds-$(CONFIG_SA1100_FRODO) += leds-frodo.o
 leds-$(CONFIG_SA1100_GRAPHICSCLIENT) += leds-graphicsclient.o
 leds-$(CONFIG_SA1100_GRAPHICSMASTER) += leds-graphicsmaster.o
 leds-$(CONFIG_SA1100_LART) += leds-lart.o
 leds-$(CONFIG_SA1100_PFS168) += leds-pfs168.o
 leds-$(CONFIG_SA1100_SIMPAD) += leds-simpad.o  
+leds-$(CONFIG_SA1100_PT_SYSTEM3) += leds-system3.o
 obj-$(CONFIG_LEDS) += $(leds-y)
 
+# SA1110 USB client support
+list-multi += sa1100usb_core.o
+sa1100usb_core-objs := usb_ctl.o usb_ep0.o usb_recv.o usb_send.o
+obj-$(CONFIG_SA1100_USB) += sa1100usb_core.o
+obj-$(CONFIG_SA1100_USB_NETLINK) += usb-eth.o
+obj-$(CONFIG_SA1100_USB_CHAR) += usb-char.o
+
 # Miscelaneous functions
 obj-$(CONFIG_PM) += pm.o sleep.o
 
 include $(TOPDIR)/Rules.make
+
+sa1100usb_core.o: $(sa1100usb_core-objs)
+	$(LD) -r -o $@ $(sa1100usb_core-objs)
+
diff -Nru linux/arch/arm/mach-sa1100/adsbitsy.c linux-2.4.19-pre5-mjc/arch/arm/mach-sa1100/adsbitsy.c
--- linux/arch/arm/mach-sa1100/adsbitsy.c	Thu Oct 11 12:04:57 2001
+++ linux-2.4.19-pre5-mjc/arch/arm/mach-sa1100/adsbitsy.c	Sat Apr  6 08:25:58 2002
@@ -53,7 +53,7 @@
 	/*
 	 * Probe for SA1111.
 	 */
-	ret = sa1111_probe();
+	ret = sa1111_probe(ADSBITSY_SA1111_BASE);
 	if (ret < 0)
 		return ret;
 
@@ -94,7 +94,7 @@
 	sa1110_mb_enable();
 
 	set_GPIO_IRQ_edge(GPIO_GPIO0, GPIO_RISING_EDGE);
-	sa1111_init_irq(SA1100_GPIO_TO_IRQ(0));
+	sa1111_init_irq(IRQ_GPIO0);
 
 	return 0;
 }
@@ -126,8 +126,8 @@
 
 static struct map_desc adsbitsy_io_desc[] __initdata = {
  /* virtual     physical    length      domain     r  w  c  b */
-  { 0xe8000000, 0x08000000, 0x01000000, DOMAIN_IO, 1, 1, 0, 0 }, /* Flash bank 1 */
-  { 0xf4000000, 0x18000000, 0x00800000, DOMAIN_IO, 1, 1, 0, 0 }, /* SA1111 */
+  { 0xe8000000, 0x08000000, 0x01000000, DOMAIN_IO, 0, 1, 0, 0 }, /* Flash bank 1 */
+  { 0xf4000000, 0x18000000, 0x00800000, DOMAIN_IO, 0, 1, 0, 0 }, /* SA1111 */
   LAST_DESC
 };
 
@@ -135,24 +135,15 @@
 {
 	if (port->mapbase == _Ser1UTCR0) {
 		Ser1SDCR0 |= SDCR0_UART;
-		// Set RTS Output and High (should be done in the set_mctrl fn)
-		GPDR |= GPIO_GPIO15;
-		GPCR |= GPIO_GPIO15;
-		// Set CTS Input
-		GPDR &= ~GPIO_GPIO14;
+#error Fixme	// Set RTS High (should be done in the set_mctrl fn)
+		GPCR = GPIO_GPIO15;
 	} else if (port->mapbase == _Ser2UTCR0) {
 		Ser2UTCR4 = Ser2HSCR0 = 0;
-		// Set RTS Output and High (should be done in the set_mctrl fn)
-		GPDR |= GPIO_GPIO17;
-		GPCR |= GPIO_GPIO17;
-		// Set CTS Input
-		GPDR &= ~GPIO_GPIO16;
+#error Fixme	// Set RTS High (should be done in the set_mctrl fn)
+		GPCR = GPIO_GPIO17;
 	} else if (port->mapbase == _Ser2UTCR0) {
-		// Set RTS Output and High (should be done in the set_mctrl fn)
-		GPDR |= GPIO_GPIO19;
-		GPCR |= GPIO_GPIO19;
-		// Set CTS Input
-		GPDR &= ~GPIO_GPIO18;
+#error Fixme	// Set RTS High (should be done in the set_mctrl fn)
+		GPCR = GPIO_GPIO19;
 	}
 	return 0;
 }
@@ -166,10 +157,12 @@
 	sa1100_map_io();
 	iotable_init(adsbitsy_io_desc);
 
-	sa1110_register_uart_fns(&adsbitsy_port_fns);
+	sa1100_register_uart_fns(&adsbitsy_port_fns);
 	sa1100_register_uart(0, 3);
 	sa1100_register_uart(1, 1);
 	sa1100_register_uart(2, 2);
+	GPDR |= GPIO_GPIO15 | GPIO_GPIO17 | GPIO_GPIO19;
+	GPDR &= ~(GPIO_GPIO14 | GPIO_GPIO16 | GPIO_GPIO18);
 }
 
 MACHINE_START(ADSBITSY, "ADS Bitsy")
diff -Nru linux/arch/arm/mach-sa1100/assabet.c linux-2.4.19-pre5-mjc/arch/arm/mach-sa1100/assabet.c
--- linux/arch/arm/mach-sa1100/assabet.c	Thu Oct 25 16:53:45 2001
+++ linux-2.4.19-pre5-mjc/arch/arm/mach-sa1100/assabet.c	Sat Apr  6 08:25:58 2002
@@ -31,16 +31,48 @@
 
 #include "generic.h"
 
+#define ASSABET_BCR_DB1110 \
+	(ASSABET_BCR_SPK_OFF    | ASSABET_BCR_QMUTE     | \
+	 ASSABET_BCR_LED_GREEN  | ASSABET_BCR_LED_RED   | \
+	 ASSABET_BCR_RS232EN    | ASSABET_BCR_LCD_12RGB | \
+	 ASSABET_BCR_IRDA_MD0)
+
+#define ASSABET_BCR_DB1111 \
+	(ASSABET_BCR_SPK_OFF    | ASSABET_BCR_QMUTE     | \
+	 ASSABET_BCR_LED_GREEN  | ASSABET_BCR_LED_RED   | \
+	 ASSABET_BCR_RS232EN    | ASSABET_BCR_LCD_12RGB | \
+	 ASSABET_BCR_CF_BUS_OFF | ASSABET_BCR_STEREO_LB | \
+	 ASSABET_BCR_IRDA_MD0   | ASSABET_BCR_CF_RST)
 
-unsigned long BCR_value = ASSABET_BCR_DB1110;
 unsigned long SCR_value = ASSABET_SCR_INIT;
-EXPORT_SYMBOL(BCR_value);
 EXPORT_SYMBOL(SCR_value);
 
+static unsigned long BCR_value = ASSABET_BCR_DB1110;
+
+void ASSABET_BCR_frob(unsigned int mask, unsigned int val)
+{
+	unsigned long flags;
+
+	local_irq_save(flags);
+	BCR_value = (BCR_value & ~mask) | val;
+	ASSABET_BCR = BCR_value;
+	local_irq_restore(flags);
+}
+
+EXPORT_SYMBOL(ASSABET_BCR_frob);
+
 
 static int __init assabet_init(void)
 {
-	if (machine_is_assabet() && machine_has_neponset()) {
+	if (!machine_is_assabet())
+		return -EINVAL;
+
+	/*
+	 * Set the IRQ edges
+	 */
+	set_GPIO_IRQ_edge(GPIO_GPIO23, GPIO_RISING_EDGE);	/* UCB1300 */
+
+	if (machine_has_neponset()) {
 		/*
 		 * Angel sets this, but other bootloaders may not.
 		 *
@@ -55,6 +87,7 @@
 			"hasn't been configured in the kernel\n" );
 #endif
 	}
+
 	return 0;
 }
 
@@ -87,18 +120,18 @@
  * repeat it here because the kernel may not be loaded as a zImage, and
  * also because it's a hassle to communicate the SCR value to the kernel
  * from the decompressor.
+ *
+ * Note that IRQs are guaranteed to be disabled.
  */
 static void __init get_assabet_scr(void)
 {
-	unsigned long flags, scr, i;
+	unsigned long scr, i;
 
-	local_irq_save(flags);
 	GPDR |= 0x3fc;			/* Configure GPIO 9:2 as outputs */
 	GPSR = 0x3fc;			/* Write 0xFF to GPIO 9:2 */
 	GPDR &= ~(0x3fc);		/* Configure GPIO 9:2 as inputs */
 	for(i = 100; i--; scr = GPLR);	/* Read GPIO 9:2 */
 	GPDR |= 0x3fc;			/*  restore correct pin direction */
-	local_irq_restore(flags);
 	scr &= 0x3fc;			/* save as system configuration byte. */
 	SCR_value = scr;
 }
@@ -174,9 +207,9 @@
 
 static struct map_desc assabet_io_desc[] __initdata = {
  /* virtual     physical    length      domain     r  w  c  b */
-  { 0xe8000000, 0x00000000, 0x02000000, DOMAIN_IO, 1, 1, 0, 0 }, /* Flash bank 0 */
-  { 0xf1000000, 0x12000000, 0x00100000, DOMAIN_IO, 1, 1, 0, 0 }, /* Board Control Register */
-  { 0xf2800000, 0x4b800000, 0x00800000, DOMAIN_IO, 1, 1, 0, 0 }, /* MQ200 */
+  { 0xe8000000, 0x00000000, 0x02000000, DOMAIN_IO, 0, 1, 0, 0 }, /* Flash bank 0 */
+  { 0xf1000000, 0x12000000, 0x00100000, DOMAIN_IO, 0, 1, 0, 0 }, /* Board Control Register */
+  { 0xf2800000, 0x4b800000, 0x00800000, DOMAIN_IO, 0, 1, 0, 0 }, /* MQ200 */
   /*  f3000000 - neponset system registers */
   /*  f4000000 - neponset SA1111 registers */
   LAST_DESC
@@ -186,19 +219,18 @@
 {
 	if (port->mapbase == _Ser1UTCR0) {
 		if (state)
-			ASSABET_BCR_clear(ASSABET_BCR_RS232EN);
+			ASSABET_BCR_clear(ASSABET_BCR_RS232EN |
+					  ASSABET_BCR_COM_RTS |
+					  ASSABET_BCR_COM_DTR);
 		else
-			ASSABET_BCR_set(ASSABET_BCR_RS232EN);
+			ASSABET_BCR_set(ASSABET_BCR_RS232EN |
+					ASSABET_BCR_COM_RTS |
+					ASSABET_BCR_COM_DTR);
 	}
 }
 
 /*
- * Note! this can be called from IRQ context.
- * FIXME: You _need_ to handle ASSABET_BCR carefully, which doesn't
- * happen at the moment.  Suggest putting interrupt save/restore
- * in ASSABET_BCR_set/clear.
- *
- * NB: Assabet uses COM_RTS and COM_DTR for both UART1 (com port)
+ * Assabet uses COM_RTS and COM_DTR for both UART1 (com port)
  * and UART3 (radio module).  We only handle them for UART1 here.
  */
 static void assabet_set_mctrl(struct uart_port *port, u_int mctrl)
@@ -207,21 +239,21 @@
 		u_int set = 0, clear = 0;
 
 		if (mctrl & TIOCM_RTS)
-			set |= ASSABET_BCR_COM_RTS;
-		else
 			clear |= ASSABET_BCR_COM_RTS;
+		else
+			set |= ASSABET_BCR_COM_RTS;
 
 		if (mctrl & TIOCM_DTR)
-			set |= ASSABET_BCR_COM_DTR;
-		else
 			clear |= ASSABET_BCR_COM_DTR;
+		else
+			set |= ASSABET_BCR_COM_DTR;
 
 		ASSABET_BCR_clear(clear);
 		ASSABET_BCR_set(set);
 	}
 }
 
-static int assabet_get_mctrl(struct uart_port *port)
+static u_int assabet_get_mctrl(struct uart_port *port)
 {
 	u_int ret = 0;
 	u_int bsr = ASSABET_BSR;
@@ -312,11 +344,7 @@
 	PWER = PWER_GPIO0;
 	PGSR = 0;
 	PCFR = 0;
-
-	/*
-	 * Clear all possible wakeup reasons.
-	 */
-	RCSR = RCSR_HWR | RCSR_SWR | RCSR_WDR | RCSR_SMR;
+	PSDR = 0;
 }
 
 
diff -Nru linux/arch/arm/mach-sa1100/badge4.c linux-2.4.19-pre5-mjc/arch/arm/mach-sa1100/badge4.c
--- linux/arch/arm/mach-sa1100/badge4.c	Wed Dec 31 19:00:00 1969
+++ linux-2.4.19-pre5-mjc/arch/arm/mach-sa1100/badge4.c	Sat Apr  6 08:25:58 2002
@@ -0,0 +1,213 @@
+/*
+ * linux/arch/arm/mach-sa1100/badge4.c
+ *
+ * BadgePAD 4 specific initialization
+ *
+ *   Tim Connors <connors@hpl.hp.com>
+ *   Christopher Hoover <ch@hpl.hp.com>
+ *
+ * Copyright (C) 2002 Hewlett-Packard Company
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+ *
+ */
+
+#include <linux/init.h>
+#include <linux/kernel.h>
+#include <linux/delay.h>
+#include <linux/tty.h>
+#include <linux/errno.h>
+
+#include <asm/hardware.h>
+#include <asm/setup.h>
+#include <asm/arch/irqs.h>
+
+#include <asm/mach/arch.h>
+#include <asm/mach/map.h>
+#include <asm/hardware/sa1111.h>
+#include <asm/mach/serial_sa1100.h>
+
+#include "generic.h"
+#include "sa1111.h"
+
+static int __init badge4_sa1111_init(void)
+{
+	int ret;
+
+	/*
+	 * Ensure that the memory bus request/grant signals are setup,
+	 * and the grant is held in its inactive state
+	 */
+	sa1110_mb_disable();
+
+	/*
+	 * Probe for SA1111.
+	 */
+	ret = sa1111_probe(BADGE4_SA1111_BASE);
+	if (ret < 0)
+		return ret;
+
+	/*
+	 * We found it.  Wake the chip up.
+	 */
+	sa1111_wake();
+
+	/*
+	 * The SDRAM configuration of the SA1110 and the SA1111 must
+	 * match.  This is very important to ensure that SA1111 accesses
+	 * don't corrupt the SDRAM.  Note that this ungates the SA1111's
+	 * MBGNT signal, so we must have called sa1110_mb_disable()
+	 * beforehand.
+	 */
+	sa1111_configure_smc(1,
+			     FExtr(MDCNFG, MDCNFG_SA1110_DRAC0),
+			     FExtr(MDCNFG, MDCNFG_SA1110_TDL0));
+
+	/*
+	 * We only need to turn on DCLK whenever we want to use the
+	 * DMA.  It can otherwise be held firmly in the off position.
+	 */
+	SKPCR |= SKPCR_DCLKEN;
+
+	/*
+	 * Enable the SA1110 memory bus request and grant signals.
+	 */
+	sa1110_mb_enable();
+
+	set_GPIO_IRQ_edge(BADGE4_GPIO_INT_1111, GPIO_RISING_EDGE);
+	sa1111_init_irq(BADGE4_IRQ_GPIO_SA1111);
+
+	return 0;
+}
+
+static int __init badge4_init(void)
+{
+	int ret;
+
+	if (!machine_is_badge4())
+		return -ENODEV;
+
+	ret = badge4_sa1111_init();
+	if (ret < 0)
+		printk(KERN_ERR __FUNCTION__
+		       ": SA-1111 initialization failed (%d)\n", ret);
+
+	/* N.B, according to rmk this is the singular place that GPDR
+           should be set */
+
+	/* Video expansion */
+	GPCR  = (BADGE4_GPIO_INT_VID | BADGE4_GPIO_LGP2 | BADGE4_GPIO_LGP3 |
+		 BADGE4_GPIO_LGP4 | BADGE4_GPIO_LGP5 | BADGE4_GPIO_LGP6 |
+		 BADGE4_GPIO_LGP7 | BADGE4_GPIO_LGP8 | BADGE4_GPIO_LGP9 |
+		 BADGE4_GPIO_GPA_VID | BADGE4_GPIO_GPB_VID |
+		 BADGE4_GPIO_GPC_VID);
+	GPDR |= (BADGE4_GPIO_INT_VID | BADGE4_GPIO_LGP2 | BADGE4_GPIO_LGP3 |
+		 BADGE4_GPIO_LGP4 | BADGE4_GPIO_LGP5 | BADGE4_GPIO_LGP6 |
+		 BADGE4_GPIO_LGP7 | BADGE4_GPIO_LGP8 | BADGE4_GPIO_LGP9 |
+		 BADGE4_GPIO_GPA_VID | BADGE4_GPIO_GPB_VID |
+		 BADGE4_GPIO_GPC_VID);
+
+	/* SDRAM SPD i2c */
+	GPCR  = (BADGE4_GPIO_SDSDA | BADGE4_GPIO_SDSCL);
+	GPDR |= (BADGE4_GPIO_SDSDA | BADGE4_GPIO_SDSCL);
+
+	/* uart */
+	GPCR  = (BADGE4_GPIO_UART_HS1 | BADGE4_GPIO_UART_HS2);
+	GPDR |= (BADGE4_GPIO_UART_HS1 | BADGE4_GPIO_UART_HS2);
+
+	/* drives CPLD muxsel0 input */
+	GPCR  = BADGE4_GPIO_MUXSEL0;
+	GPDR |= BADGE4_GPIO_MUXSEL0;
+
+	/* test points */
+	GPCR  = (BADGE4_GPIO_TESTPT_J7 | BADGE4_GPIO_TESTPT_J6 |
+		 BADGE4_GPIO_TESTPT_J5);
+	GPDR |= (BADGE4_GPIO_TESTPT_J7 | BADGE4_GPIO_TESTPT_J6 |
+		 BADGE4_GPIO_TESTPT_J5);
+
+	/* drives CPLD sdram type inputs; this shouldn't be needed;
+           bootloader left it this way. */
+	GPDR |= (BADGE4_GPIO_SDTYP0 | BADGE4_GPIO_SDTYP1);
+
+  	/* 5V supply rail. */
+  	GPCR  = BADGE4_GPIO_PCMEN5V;		/* initially off */
+   	GPDR |= BADGE4_GPIO_PCMEN5V;
+
+	/* drives SA1111 reset pin; this shouldn't be needed;
+           bootloader left it this way. */
+	GPSR  = BADGE4_GPIO_SA1111_NRST;
+	GPDR |= BADGE4_GPIO_SA1111_NRST;
+
+	return 0;
+}
+
+__initcall(badge4_init);
+
+
+static unsigned badge4_5V_bitmap = 0;
+
+void badge4_set_5V(unsigned subsystem, int on)
+{
+	unsigned long flags;
+	unsigned old_5V_bitmap;
+
+	local_irq_save(flags);
+
+	old_5V_bitmap = badge4_5V_bitmap;
+
+	if (on) {
+		badge4_5V_bitmap |= subsystem;
+	} else {
+		badge4_5V_bitmap &= ~subsystem;
+	}
+
+	/* detect on->off and off->on transitions */
+	if ((!old_5V_bitmap) && (badge4_5V_bitmap)) {
+		/* was off, now on */
+		printk(KERN_INFO __FUNCTION__ ": enabling 5V supply rail\n");
+		GPSR = BADGE4_GPIO_PCMEN5V;
+	} else if ((old_5V_bitmap) && (!badge4_5V_bitmap)) {
+		/* was on, now off */
+		printk(KERN_INFO __FUNCTION__ ": disabling 5V supply rail\n");
+		GPCR = BADGE4_GPIO_PCMEN5V;
+	}
+
+	local_irq_restore(flags);
+}
+EXPORT_SYMBOL(badge4_set_5V);
+
+
+static void __init
+fixup_badge4(struct machine_desc *desc, struct param_struct *params,
+	    char **cmdline, struct meminfo *mi)
+{
+	/* nothing needed here */
+}
+
+static struct map_desc badge4_io_desc[] __initdata = {
+  /*  virtual    physical    length      domain   r w c b		   */
+  {0xe8000000, 0x00000000, 0x02000000, DOMAIN_IO, 0,1,0,0},/* Flash bank 0 */
+  {0xf1000000, 0x08000000, 0x00100000, DOMAIN_IO, 0,1,0,0},/* SRAM  bank 1 */
+  {0xf2000000, 0x10000000, 0x00100000, DOMAIN_IO, 0,1,0,0},/* SRAM  bank 2 */
+  {0xf4000000, 0x48000000, 0x00100000, DOMAIN_IO, 0,1,0,0},/* SA-1111      */
+  LAST_DESC
+};
+
+static void __init badge4_map_io(void)
+{
+	sa1100_map_io();
+	iotable_init(badge4_io_desc);
+
+	sa1100_register_uart(0, 3);
+	sa1100_register_uart(1, 1);
+}
+
+MACHINE_START(BADGE4, "Hewlett-Packard Laboratories BadgePAD 4")
+	BOOT_MEM(0xc0000000, 0x80000000, 0xf8000000)
+	BOOT_PARAMS(0xc0000100)
+	FIXUP(fixup_badge4)
+	MAPIO(badge4_map_io)
+	INITIRQ(sa1100_init_irq)
+MACHINE_END
diff -Nru linux/arch/arm/mach-sa1100/cerf.c linux-2.4.19-pre5-mjc/arch/arm/mach-sa1100/cerf.c
--- linux/arch/arm/mach-sa1100/cerf.c	Thu Oct 25 16:53:46 2001
+++ linux-2.4.19-pre5-mjc/arch/arm/mach-sa1100/cerf.c	Sat Apr  6 08:25:58 2002
@@ -1,7 +1,7 @@
 /*
  * linux/arch/arm/mach-sa1100/cerf.c
  */
-
+#include <linux/config.h>
 #include <linux/init.h>
 #include <linux/kernel.h>
 #include <linux/tty.h>
@@ -16,20 +16,22 @@
 #include "generic.h"
 
 
-static void __init cerf_init_irq (void)
+static void __init cerf_init_irq(void)
 {
-  sa1100_init_irq();
+	sa1100_init_irq();
 
-  /* Need to register these as rising edge interrupts
-   * For standard 16550 serial driver support
-   * Basically - I copied it from pfs168.c :)
-   */
+	/* Need to register these as rising edge interrupts
+	 * For standard 16550 serial driver support
+	 * Basically - I copied it from pfs168.c :)
+	 */
 #ifdef CONFIG_SA1100_CERF_CPLD
-  set_GPIO_IRQ_edge(GPIO_GPIO(3), GPIO_RISING_EDGE); /* PDA Full serial port */
-  set_GPIO_IRQ_edge(GPIO_GPIO(2), GPIO_RISING_EDGE); /* PDA Bluetooth */
-  GPDR &= ~(GPIO_GPIO(3)); /* Set the direction of serial port GPIO pin to in */
-  GPDR &= ~(GPIO_GPIO(2)); /* Set the direction of bluetooth GPIO pin to in */
+	/* PDA Full serial port */
+	set_GPIO_IRQ_edge(GPIO_GPIO3, GPIO_RISING_EDGE);
+	/* PDA Bluetooth */
+	set_GPIO_IRQ_edge(GPIO_GPIO2, GPIO_RISING_EDGE);
 #endif /* CONFIG_SA1100_CERF_CPLD */
+
+	set_GPIO_IRQ_edge(GPIO_UCB1200_IRQ, GPIO_RISING_EDGE);
 }
 
 static void __init
@@ -37,22 +39,20 @@
 	   char **cmdline, struct meminfo *mi)
 {
 #if defined(CONFIG_SA1100_CERF_64MB)
-        // 64MB RAM
-        SET_BANK( 0, 0xc0000000, 64*1024*1024 );
-        mi->nr_banks = 1;
-#elif defined(CONFIG_SA1100_CERF_32MB)	// 32MB RAM
+	SET_BANK( 0, 0xc0000000, 64*1024*1024 );
+	mi->nr_banks = 1;
+#elif defined(CONFIG_SA1100_CERF_32MB)
 	SET_BANK( 0, 0xc0000000, 32*1024*1024 );
 	mi->nr_banks = 1;
-#elif defined(CONFIG_SA1100_CERF_16MB)	// 16Meg Ram.
+#elif defined(CONFIG_SA1100_CERF_16MB)
 	SET_BANK( 0, 0xc0000000, 8*1024*1024 );
 	SET_BANK( 1, 0xc8000000, 8*1024*1024 );
 	mi->nr_banks = 2;
 #elif defined(CONFIG_SA1100_CERF_8MB)
-        // 8Meg Ram.
-        SET_BANK( 0, 0xc0000000, 8*1024*1024 );
-        mi->nr_banks = 1;
+	SET_BANK( 0, 0xc0000000, 8*1024*1024 );
+	mi->nr_banks = 1;
 #else
-       #error "Undefined memory size for Cerfboard."
+#error "Undefined memory size for Cerfboard."
 #endif
 
 //	ROOT_DEV = MKDEV(RAMDISK_MAJOR,0);
@@ -62,13 +62,13 @@
 }
 
 static struct map_desc cerf_io_desc[] __initdata = {
-  /* virtual     physical    length      domain     r  w  c  b */
-  { 0xe8000000, 0x00000000, 0x02000000, DOMAIN_IO, 1, 1, 0, 0 }, /* Flash bank 0 */
-  { 0xf0000000, 0x08000000, 0x00100000, DOMAIN_IO, 1, 1, 0, 0 }, /* Crystal Ethernet Chip */
+  /* virtual	 physical    length	 domain     r  w  c  b */
+  { 0xe8000000, 0x00000000, 0x02000000, DOMAIN_IO, 0, 1, 0, 0 }, /* Flash bank 0 */
+  { 0xf0000000, 0x08000000, 0x00100000, DOMAIN_IO, 0, 1, 0, 0 }, /* Crystal Ethernet Chip */
 #ifdef CONFIG_SA1100_CERF_CPLD
-  { 0xf1000000, 0x40000000, 0x00100000, DOMAIN_IO, 1, 1, 0, 0 }, /* CPLD Chip */
-  { 0xf2000000, 0x10000000, 0x00100000, DOMAIN_IO, 1, 1, 0, 0 }, /* CerfPDA Bluetooth */
-  { 0xf3000000, 0x18000000, 0x00100000, DOMAIN_IO, 1, 1, 0, 0 }, /* CerfPDA Serial */
+  { 0xf1000000, 0x40000000, 0x00100000, DOMAIN_IO, 0, 1, 0, 0 }, /* CPLD Chip */
+  { 0xf2000000, 0x10000000, 0x00100000, DOMAIN_IO, 0, 1, 0, 0 }, /* CerfPDA Bluetooth */
+  { 0xf3000000, 0x18000000, 0x00100000, DOMAIN_IO, 0, 1, 0, 0 }, /* CerfPDA Serial */
 #endif
   LAST_DESC
 };
@@ -78,12 +78,18 @@
 	sa1100_map_io();
 	iotable_init(cerf_io_desc);
 
-        sa1100_register_uart(0, 3);
+	sa1100_register_uart(0, 3);
 #ifdef CONFIG_SA1100_CERF_IRDA_ENABLED
 	sa1100_register_uart(1, 1);
 #else
 	sa1100_register_uart(1, 2);
 	sa1100_register_uart(2, 1);
+#endif
+
+	/* set some GPDR bits here while it's safe */
+	GPDR |= GPIO_CF_RESET;
+#ifdef CONFIG_SA1100_CERF_CPLD
+	GPDR |= GPIO_PWR_SHUTDOWN;
 #endif
 }
 
diff -Nru linux/arch/arm/mach-sa1100/cpu-sa1100.c linux-2.4.19-pre5-mjc/arch/arm/mach-sa1100/cpu-sa1100.c
--- linux/arch/arm/mach-sa1100/cpu-sa1100.c	Sun Aug 12 14:13:59 2001
+++ linux-2.4.19-pre5-mjc/arch/arm/mach-sa1100/cpu-sa1100.c	Sat Apr  6 08:25:58 2002
@@ -90,7 +90,8 @@
 
 #include <asm/hardware.h>
 
-
+extern unsigned int sa11x0_freq_to_ppcr(unsigned int khz);
+extern unsigned int sa11x0_validatespeed(unsigned int khz);
 
 
 typedef struct {
@@ -219,14 +220,22 @@
 };
 
 
-
+static void sa1100_setspeed(unsigned int khz)
+{
+	PPCR = sa11x0_freq_to_ppcr(khz);
+}
 
 static int __init sa1100_dram_init(void)
 {
-	return cpufreq_register_notifier(&sa1100_dram_block);
-}
+	int ret = -ENODEV;
 
+	if ((processor_id & CPU_SA1100_MASK) == CPU_SA1100_ID) {
+		ret = cpufreq_register_notifier(&sa1100_dram_block);
 
+		cpufreq_setfunctions(sa11x0_validatespeed, sa1100_setspeed);
+	}
 
+	return ret;
+}
 
 __initcall(sa1100_dram_init);
diff -Nru linux/arch/arm/mach-sa1100/cpu-sa1110.c linux-2.4.19-pre5-mjc/arch/arm/mach-sa1100/cpu-sa1110.c
--- linux/arch/arm/mach-sa1100/cpu-sa1110.c	Thu Oct 11 12:04:57 2001
+++ linux-2.4.19-pre5-mjc/arch/arm/mach-sa1100/cpu-sa1110.c	Sat Apr  6 08:25:58 2002
@@ -3,7 +3,7 @@
  *
  *  Copyright (C) 2001 Russell King
  *
- *  $Id: cpu-sa1110.c,v 1.5 2001/09/10 13:25:58 rmk Exp $
+ *  $Id: cpu-sa1110.c,v 1.6 2001/10/22 11:53:47 rmk Exp $
  *
  * This program is free software; you can redistribute it and/or modify
  * it under the terms of the GNU General Public License version 2 as
@@ -29,14 +29,8 @@
 
 #undef DEBUG
 
-extern u_int processor_id;
-
-#define CPU_REVISION	(processor_id & 15)
-#define CPU_SA1110_A0	(0)
-#define CPU_SA1110_B0	(4)
-#define CPU_SA1110_B1	(5)
-#define CPU_SA1110_B2	(6)
-#define CPU_SA1110_B4	(8)
+extern unsigned int sa11x0_freq_to_ppcr(unsigned int khz);
+extern unsigned int sa11x0_validatespeed(unsigned int khz);
 
 struct sdram_params {
 	u_char  rows;		/* bits				 */
@@ -48,6 +42,12 @@
 	u_short refresh;	/* refresh time for array (us)	 */
 };
 
+struct sdram_info {
+	u_int	mdcnfg;
+	u_int	mdrefr;
+	u_int	mdcas[3];
+};
+
 static struct sdram_params tc59sm716_cl2_params __initdata = {
 	rows:		    12,
 	tck:		    10,
@@ -68,6 +68,16 @@
 	cas_latency:	     3,
 };
 
+static struct sdram_params samsung_k4s641632d_tc75 __initdata = {
+	rows:		    14,
+	tck:		     9,
+	trcd:		    27,
+	trp:		    20,
+	twr:		     9,
+	refresh:	 64000,
+	cas_latency:	     3,
+};
+
 static struct sdram_params sdram_params;
 
 /*
@@ -95,10 +105,11 @@
 	mdcas[1]  = mdcas[2] = 0x55555555 << (shift & 1);
 }
 
-static void sdram_update_timing(u_int cpu_khz, struct sdram_params *sdram)
+static void
+sdram_calculate_timing(struct sdram_info *sd, u_int cpu_khz,
+		       struct sdram_params *sdram)
 {
-	u_int mdcnfg, mdrefr, mdcas[3], mem_khz, sd_khz, trp, twr;
-	unsigned long flags;
+	u_int mem_khz, sd_khz, trp, twr;
 
 	mem_khz = cpu_khz / 2;
 	sd_khz = mem_khz;
@@ -114,7 +125,7 @@
 	    (CPU_REVISION < CPU_SA1110_B2 && sd_khz < 62000))
 		sd_khz /= 2;
 
-	mdcnfg = MDCNFG & 0x007f007f;
+	sd->mdcnfg = MDCNFG & 0x007f007f;
 
 	twr = ns_to_cycles(sdram->twr, mem_khz);
 
@@ -123,53 +134,26 @@
 	if (trp < 1)
 		trp = 1;
 
-	mdcnfg |= trp << 8;
-	mdcnfg |= trp << 24;
-	mdcnfg |= sdram->cas_latency << 12;
-	mdcnfg |= sdram->cas_latency << 28;
-	mdcnfg |= twr << 14;
-	mdcnfg |= twr << 30;
+	sd->mdcnfg |= trp << 8;
+	sd->mdcnfg |= trp << 24;
+	sd->mdcnfg |= sdram->cas_latency << 12;
+	sd->mdcnfg |= sdram->cas_latency << 28;
+	sd->mdcnfg |= twr << 14;
+	sd->mdcnfg |= twr << 30;
 
-	mdrefr = MDREFR & 0xffbffff0;
-	mdrefr |= 7;
+	sd->mdrefr = MDREFR & 0xffbffff0;
+	sd->mdrefr |= 7;
 
 	if (sd_khz != mem_khz)
-		mdrefr |= MDREFR_K1DB2;
+		sd->mdrefr |= MDREFR_K1DB2;
 
 	/* initial number of '1's in MDCAS + 1 */
-	set_mdcas(mdcas, sd_khz >= 62000, ns_to_cycles(sdram->trcd, mem_khz));
+	set_mdcas(sd->mdcas, sd_khz >= 62000, ns_to_cycles(sdram->trcd, mem_khz));
 
 #ifdef DEBUG
-	mdelay(250);
 	printk("MDCNFG: %08x MDREFR: %08x MDCAS0: %08x MDCAS1: %08x MDCAS2: %08x\n",
-		mdcnfg, mdrefr, mdcas[0], mdcas[1], mdcas[2]);
+		sd->mdcnfg, sd->mdrefr, sd->mdcas[0], sd->mdcas[1], sd->mdcas[2]);
 #endif
-
-	/*
-	 * Reprogram the DRAM timings with interrupts disabled, and
-	 * ensure that we are doing this within a complete cache line.
-	 * This means that we won't access SDRAM for the duration of
-	 * the programming.
-	 */
-	local_irq_save(flags);
-	asm("mcr p15, 0, %0, c10, c4" : : "r" (0));
-	udelay(10);
-	__asm__("
-		b	1f
-		.align	5
-1:		str	%3, [%1, #28]		@ MDREFR
-		str	%4, [%1, #4]		@ MDCAS0
-		str	%5, [%1, #8]		@ MDCAS1
-		str	%6, [%1, #12]		@ MDCAS2
-		str	%2, [%1, #0]		@ MDCNFG
-		ldr	%0, [%1, #0]
-		nop
-		nop"
-		: "=&r" (mdcnfg)
-		: "r" (io_p2v(_MDCNFG)),
-		  "0" (mdcnfg), "r" (mdrefr),
-		  "r" (mdcas[0]), "r" (mdcas[1]), "r" (mdcas[2]));
-	local_irq_restore(flags);
 }
 
 /*
@@ -203,65 +187,92 @@
 	sdram_set_refresh(dri);
 }
 
-static int
-sdram_notifier(struct notifier_block *nb, unsigned long val, void *data)
+/*
+ * Ok, set the CPU frequency.  Since we've done the validation
+ * above, we can match for an exact frequency.  If we don't find
+ * an exact match, we will to set the lowest frequency to be safe.
+ */
+static void sa1110_setspeed(unsigned int khz)
 {
-	struct cpufreq_info *ci = data;
 	struct sdram_params *sdram = &sdram_params;
+	struct sdram_info sd;
+	unsigned long flags;
+	unsigned int ppcr, unused;
 
-	/* were we initialised? */
-	if (sdram->cas_latency == 0) {
-		struct cpufreq_minmax *m = data;
-		m->min_freq = m->max_freq = m->cur_freq;
-		return 0;
-	}
+	ppcr = sa11x0_freq_to_ppcr(khz);
+	sdram_calculate_timing(&sd, khz, sdram);
 
-	switch (val) {
-	case CPUFREQ_MINMAX:
-		/*
-		 * until we work out why the assabet
-		 * crashes below 147.5MHz...
-		 */
-		cpufreq_updateminmax(data, 147500, -1);
-		break;
-
-	case CPUFREQ_PRECHANGE:
-		/*
-		 * The clock could be going away for some time.
-		 * Set the SDRAMs to refresh rapidly (every 64
-		 * memory clock cycles).  To get through the
-		 * whole array, we need to wait 262144 mclk cycles.
-		 * We wait 20ms to be safe.
-		 */
-		sdram_set_refresh(2);
-		set_current_state(TASK_UNINTERRUPTIBLE);
-		schedule_timeout(20 * HZ / 1000);
-
-		if (ci->old_freq < ci->new_freq)
-			sdram_update_timing(ci->new_freq, sdram);
-		break;
-
-	case CPUFREQ_POSTCHANGE:
-		if (ci->old_freq > ci->new_freq)
-			sdram_update_timing(ci->new_freq, sdram);
-		sdram_update_refresh(ci->new_freq, sdram);
-		break;
+#if 0
+	/*
+	 * These values are wrong according to the SA1110 documentation
+	 * and errata, but they seem to work.  Need to get a storage
+	 * scope on to the SDRAM signals to work out why.
+	 */
+	if (khz < 147500) {
+		sd.mdrefr |= MDREFR_K1DB2;
+		sd.mdcas[0] = 0xaaaaaa7f;
+	} else {
+		sd.mdrefr &= ~MDREFR_K1DB2;
+		sd.mdcas[0] = 0xaaaaaa9f;
 	}
-	return 0;
-}
+	sd.mdcas[1] = 0xaaaaaaaa;
+	sd.mdcas[2] = 0xaaaaaaaa;
+#endif
+	/*
+	 * The clock could be going away for some time.  Set the SDRAMs
+	 * to refresh rapidly (every 64 memory clock cycles).  To get
+	 * through the whole array, we need to wait 262144 mclk cycles.
+	 * We wait 20ms to be safe.
+	 */
+	sdram_set_refresh(2);
+	set_current_state(TASK_UNINTERRUPTIBLE);
+	schedule_timeout(20 * HZ / 1000);
 
-static struct notifier_block sa1110_clkchg_block = {
-	notifier_call:	sdram_notifier,
-};
+	/*
+	 * Reprogram the DRAM timings with interrupts disabled, and
+	 * ensure that we are doing this within a complete cache line.
+	 * This means that we won't access SDRAM for the duration of
+	 * the programming.
+	 */
+	local_irq_save(flags);
+	asm("mcr p15, 0, %0, c10, c4" : : "r" (0));
+	udelay(10);
+	__asm__ __volatile__("
+		b	2f
+		.align	5
+1:		str	%3, [%1, #0]		@ MDCNFG
+		str	%4, [%1, #28]		@ MDREFR
+		str	%5, [%1, #4]		@ MDCAS0
+		str	%6, [%1, #8]		@ MDCAS1
+		str	%7, [%1, #12]		@ MDCAS2
+		str	%8, [%2, #0]		@ PPCR
+		ldr	%0, [%1, #0]
+		b	3f
+2:		b	1b
+3:		nop
+		nop"
+		: "=&r" (unused)
+		: "r" (&MDCNFG), "r" (&PPCR), "0" (sd.mdcnfg),
+		  "r" (sd.mdrefr), "r" (sd.mdcas[0]),
+		  "r" (sd.mdcas[1]), "r" (sd.mdcas[2]), "r" (ppcr));
+	local_irq_restore(flags);
 
-static int __init sa1110_sdram_init(void)
+	/*
+	 * Now, return the SDRAM refresh back to normal.
+	 */
+	sdram_update_refresh(khz, sdram);
+}
+
+static int __init sa1110_clk_init(void)
 {
 	struct sdram_params *sdram = NULL;
-	unsigned int cur_freq = cpufreq_get(smp_processor_id());
 
 	if (machine_is_assabet())
 		sdram = &tc59sm716_cl3_params;
 
+	if (machine_is_pt_system3())
+		sdram = &samsung_k4s641632d_tc75;
+
 	if (sdram) {
 		printk(KERN_DEBUG "SDRAM: tck: %d trcd: %d trp: %d"
 			" twr: %d refresh: %d cas_latency: %d\n",
@@ -270,11 +281,11 @@
 
 		memcpy(&sdram_params, sdram, sizeof(sdram_params));
 
-		sdram_update_timing(cur_freq, &sdram_params);
-		sdram_update_refresh(cur_freq, &sdram_params);
+		sa1110_setspeed(cpufreq_get(0));
+		cpufreq_setfunctions(sa11x0_validatespeed, sa1110_setspeed);
 	}
 
-	return cpufreq_register_notifier(&sa1110_clkchg_block);
+	return 0;
 }
 
-__initcall(sa1110_sdram_init);
+__initcall(sa1110_clk_init);
diff -Nru linux/arch/arm/mach-sa1100/dma-sa1100.c linux-2.4.19-pre5-mjc/arch/arm/mach-sa1100/dma-sa1100.c
--- linux/arch/arm/mach-sa1100/dma-sa1100.c	Thu Oct 25 16:53:46 2001
+++ linux-2.4.19-pre5-mjc/arch/arm/mach-sa1100/dma-sa1100.c	Sat Apr  6 08:25:58 2002
@@ -147,6 +147,19 @@
 		}
 
 		/*
+		 * This improves latency if there are some active spinning
+		 * buffers.  We kill them altogether.
+		 */
+		if (dma->spin_ref > 0) {
+			if (channel_is_sa1111_sac(dma - dma_chan))
+				sa1111_reset_sac_dma(dma - dma_chan);
+			else
+				dma->regs->ClrDCSR =
+				    DCSR_STRTA|DCSR_STRTB|DCSR_DONEA|DCSR_DONEB;
+			dma->spin_ref = 0;
+		}
+
+		/*
 		 * Let's try to start DMA on the current buffer.
 		 * If DMA is busy then we break here.
 		 */
@@ -188,8 +201,7 @@
 			 */
 			DPRINTK("IRQ: buf done\n");
 			dma->curr = buf->next;
-			if (dma->curr == NULL)
-				dma->spin_ref = -dma->spin_ref;
+			dma->spin_ref = -dma->spin_ref;
 			if (dma->head == buf)
 				dma->head = NULL;
 			if (dma->callback) {
@@ -468,7 +480,6 @@
 		int flags;
 		save_flags_cli(flags);
 		dma->stopped = 0;
-		dma->spin_ref = 0;
 		process_dma(dma);
 		restore_flags(flags);
 	}
diff -Nru linux/arch/arm/mach-sa1100/dma-sa1111.c linux-2.4.19-pre5-mjc/arch/arm/mach-sa1100/dma-sa1111.c
--- linux/arch/arm/mach-sa1100/dma-sa1111.c	Thu Oct 25 16:53:46 2001
+++ linux-2.4.19-pre5-mjc/arch/arm/mach-sa1100/dma-sa1111.c	Sat Apr  6 08:25:58 2002
@@ -22,6 +22,7 @@
 #include <asm/hardware.h>
 #include <asm/io.h>
 #include <asm/dma.h>
+#include <asm/hardware/sa1111.h>
 
 // #define DEBUG
 #ifdef DEBUG
diff -Nru linux/arch/arm/mach-sa1100/empeg.c linux-2.4.19-pre5-mjc/arch/arm/mach-sa1100/empeg.c
--- linux/arch/arm/mach-sa1100/empeg.c	Sun Aug 12 14:13:59 2001
+++ linux-2.4.19-pre5-mjc/arch/arm/mach-sa1100/empeg.c	Sat Apr  6 08:25:58 2002
@@ -31,7 +31,7 @@
 
 static struct map_desc empeg_io_desc[] __initdata = {
  /* virtual     physical    length      domain     r  w  c  b */
-  { EMPEG_FLASHBASE, 0x00000000, 0x00200000, DOMAIN_IO, 1, 1, 0, 0 }, /* Flash */
+  { EMPEG_FLASHBASE, 0x00000000, 0x00200000, DOMAIN_IO, 0, 1, 0, 0 }, /* Flash */
   LAST_DESC
 };
 
diff -Nru linux/arch/arm/mach-sa1100/flexanet.c linux-2.4.19-pre5-mjc/arch/arm/mach-sa1100/flexanet.c
--- linux/arch/arm/mach-sa1100/flexanet.c	Sun Aug 12 14:13:59 2001
+++ linux-2.4.19-pre5-mjc/arch/arm/mach-sa1100/flexanet.c	Sat Apr  6 08:25:58 2002
@@ -9,8 +9,6 @@
  * it under the terms of the GNU General Public License version 2 as
  * published by the Free Software Foundation.
  */
-
-#include <linux/config.h>
 #include <linux/init.h>
 #include <linux/kernel.h>
 #include <linux/sched.h>
@@ -27,22 +25,140 @@
 #include <asm/mach/arch.h>
 #include <asm/mach/map.h>
 #include <asm/mach/serial_sa1100.h>
+#include <linux/serial_core.h>
 
 #include "generic.h"
 
 
-unsigned long BCR_value         = BCR_POWERUP;
-unsigned long flexanet_GUI_type = 0x0000000F;
+unsigned long flexanet_BCR = FHH_BCR_POWERUP;
+
+EXPORT_SYMBOL(flexanet_BCR);
+
+/* physical addresses */
+#define _RCNR        0x90010004
+#define _GPLR        0x90040000
+#define _Ser4SSCR0   0x80070060
+
+/*
+ * Get the modem-control register of the UARTs
+ *
+ */
+static int flexanet_get_mctrl(struct uart_port *port)
+{
+	int            stat = 0;
+	unsigned long  bsr;
+
+	/* only DSR and CTS are implemented in UART1 & 3 */
+	if (port->membase == (void *)&Ser1UTCR0)
+	{
+		bsr = FHH_BSR;
+
+		if ((bsr & FHH_BSR_DSR1) != 0)
+			stat |= TIOCM_DSR;
+		if ((bsr & FHH_BSR_CTS1) != 0)
+			stat |= TIOCM_CTS;
+	}
+	else if (port->membase == (void *)&Ser3UTCR0)
+	{
+		bsr = FHH_BSR;
+
+		if ((bsr & FHH_BSR_DSR3) != 0)
+			stat |= TIOCM_DSR;
+		if ((bsr & FHH_BSR_CTS3) != 0)
+			stat |= TIOCM_CTS;
+	}
+
+	return stat;
+}
+
+/*
+ * Set the modem-control register of the UARTs
+ *
+ */
+static void flexanet_set_mctrl(struct uart_port *port, u_int mctrl)
+{
+	unsigned long	flags;
 
-EXPORT_SYMBOL(BCR_value);
-EXPORT_SYMBOL(flexanet_GUI_type);
+	/* only the RTS signal is implemented in UART1 & 3 */
+	if (port->membase == (void *)&Ser1UTCR0)
+	{
+		local_irq_save(flags);
+
+		if (mctrl & TIOCM_RTS)
+			flexanet_BCR |= FHH_BCR_RTS1;
+		else
+			flexanet_BCR &= ~FHH_BCR_RTS1;
+
+		FHH_BCR = flexanet_BCR;
+		local_irq_restore(flags);
+	}
+	else if (port->membase == (void *)&Ser3UTCR0)
+	{
+		local_irq_save(flags);
+
+		if (mctrl & TIOCM_RTS)
+			flexanet_BCR |= FHH_BCR_RTS3;
+		else
+			flexanet_BCR &= ~FHH_BCR_RTS3;
+
+		FHH_BCR = flexanet_BCR;
+		local_irq_restore(flags);
+	}
+}
+
+/*
+ * machine-specific serial port functions
+ *
+ * get_mctrl : set state of modem control lines
+ * set_mctrl : set the modem control lines
+ * pm        : power-management. Turn device on/off.
+ *
+ */
+static struct sa1100_port_fns	flexanet_port_fns __initdata =
+{
+	set_mctrl : flexanet_set_mctrl,
+	get_mctrl : flexanet_get_mctrl,
+	pm        : NULL,
+};
+
+
+/*
+ * Initialization and serial port mapping
+ *
+ */
+
+static int flexanet_serial_init(void)
+{
+	/* register low-level functions */
+	sa1100_register_uart_fns(&flexanet_port_fns);
+
+	/* UART port number mapping */
+	sa1100_register_uart(0, 1); /* RS232 */
+	sa1100_register_uart(1, 3); /* Radio */
+
+	/* Select UART function in Serial port 1 */
+	Ser1SDCR0 |= SDCR0_UART;
+
+	return 0;
+}
+
+
+static int __init flexanet_init(void)
+{
+	return 0;
+}
+
+__initcall(flexanet_init);
 
-static unsigned long probe_gui_board (void);
 
 static void __init
 fixup_flexanet(struct machine_desc *desc, struct param_struct *params,
 	      char **cmdline, struct meminfo *mi)
 {
+	int				status;
+	unsigned long	now;
+
+
 	/* fixed RAM size, by now (64MB) */
 	SET_BANK( 0, 0xc0000000, 64*1024*1024 );
 	mi->nr_banks = 1;
@@ -56,8 +172,11 @@
 
 static struct map_desc flexanet_io_desc[] __initdata = {
  /* virtual     physical    length      domain     r  w  c  b */
-  { 0xe8000000, 0x00000000, 0x02000000, DOMAIN_IO, 1, 1, 0, 0 }, /* Flash bank 0 */
-  { 0xf0000000, 0x10000000, 0x00001000, DOMAIN_IO, 1, 1, 0, 0 }, /* Board Control Register */
+  { 0xe8000000, 0x00000000, 0x02000000, DOMAIN_IO, 0, 1, 0, 0 }, /* Flash bank 0 */
+  { 0xf0000000, 0x10000000, 0x00001000, DOMAIN_IO, 0, 1, 0, 0 }, /* Board Control Register */
+  { 0xf1000000, 0x18000000, 0x01000000, DOMAIN_IO, 0, 1, 0, 0 }, /* Ethernet controller */
+  { 0xD0000000, 0x40000000, 0x01000000, DOMAIN_IO, 0, 1, 0, 0 }, /* Instrument boards */
+  { 0xD8000000, 0x48000000, 0x01000000, DOMAIN_IO, 0, 1, 0, 0 }, /* External peripherals */
   LAST_DESC
 };
 
@@ -65,9 +184,27 @@
 {
 	sa1100_map_io();
 	iotable_init(flexanet_io_desc);
+	flexanet_serial_init();
 
-	sa1100_register_uart(0, 1);
-	Ser1SDCR0 |= SDCR0_UART;
+	/* wakeup source is GPIO-0 only */
+	PWER = PWER_GPIO0;
+
+	/* GPIOs set to zero during sleep */
+	PGSR = 0;
+
+	/*
+	 * stop the 3.68 MHz oscillator and float control busses
+	 * during sleep, since peripherals are powered off.
+	 */
+	PCFR = PCFR_OPDE | PCFR_FP | PCFR_FS;
+
+	/* deassert the GUI reset */
+	FLEXANET_BCR_set(FHH_BCR_GUI_NRST);
+
+	/*
+	 * Set IRQ edges
+	 */
+	set_GPIO_IRQ_edge(GPIO_GUI_IRQ, GPIO_RISING_EDGE);
 }
 
 
@@ -78,3 +215,4 @@
 	MAPIO(flexanet_map_io)
 	INITIRQ(sa1100_init_irq)
 MACHINE_END
+
diff -Nru linux/arch/arm/mach-sa1100/freebird.c linux-2.4.19-pre5-mjc/arch/arm/mach-sa1100/freebird.c
--- linux/arch/arm/mach-sa1100/freebird.c	Thu Oct 25 16:53:46 2001
+++ linux-2.4.19-pre5-mjc/arch/arm/mach-sa1100/freebird.c	Sat Apr  6 08:25:58 2002
@@ -37,9 +37,9 @@
 
 static struct map_desc freebird_io_desc[] __initdata = {
  /* virtual     physical    length      domain     r  w  c  b */
-  { 0xe8000000, 0x00000000, 0x02000000, DOMAIN_IO, 1, 1, 0, 0 }, /* Flash bank 0 */
-  { 0xf0000000, 0x12000000, 0x00100000, DOMAIN_IO, 1, 1, 0, 0 }, /* Board Control Register */
-  { 0xf2000000, 0x19000000, 0x00100000, DOMAIN_IO, 1, 1, 0, 0},
+  { 0xe8000000, 0x00000000, 0x02000000, DOMAIN_IO, 0, 1, 0, 0 }, /* Flash bank 0 */
+  { 0xf0000000, 0x12000000, 0x00100000, DOMAIN_IO, 0, 1, 0, 0 }, /* Board Control Register */
+  { 0xf2000000, 0x19000000, 0x00100000, DOMAIN_IO, 0, 1, 0, 0},
    LAST_DESC
 };
 
diff -Nru linux/arch/arm/mach-sa1100/frodo.c linux-2.4.19-pre5-mjc/arch/arm/mach-sa1100/frodo.c
--- linux/arch/arm/mach-sa1100/frodo.c	Wed Dec 31 19:00:00 1969
+++ linux-2.4.19-pre5-mjc/arch/arm/mach-sa1100/frodo.c	Sat Apr  6 08:25:58 2002
@@ -0,0 +1,61 @@
+
+/*
+ * linux/arch/arm/mach-sa1100/frodo.c
+ *
+ * Author: Abraham van der Merwe <abraham@2d3d.co.za>
+ *
+ * This file contains the 2d3D, Inc. SA-1110 Development Board tweaks.
+ *
+ * This source code is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License
+ * version 2 as published by the Free Software Foundation.
+ *
+ * History:
+ *
+ *   2002/01/31   Initial version
+ */
+
+#include <linux/init.h>
+#include <linux/kernel.h>
+#include <linux/tty.h>
+
+#include <asm/hardware.h>
+#include <asm/setup.h>
+
+#include <asm/mach/arch.h>
+#include <asm/mach/map.h>
+#include <asm/mach/serial_sa1100.h>
+
+#include "generic.h"
+
+static struct map_desc frodo_io_desc[] __initdata =
+{
+  /* virtual     physical    length      domain     r  w  c  b */
+   { 0xe8000000, 0x00000000, 0x04000000, DOMAIN_IO, 1, 1, 0, 0 },	/* flash memory */
+   { 0xf0000000, 0x40000000, 0x00100000, DOMAIN_IO, 1, 1, 0, 0 },	/* 16-bit on-board devices (including CPLDs) */
+   { 0xf1000000, 0x18000000, 0x04000000, DOMAIN_IO, 1, 1, 0, 0 },	/* 32-bit daughter card */
+   LAST_DESC
+};
+
+static void __init frodo_map_io (void)
+{
+   sa1100_map_io ();
+   iotable_init (frodo_io_desc);
+
+   sa1100_register_uart (0,2);	/* UART2 (serial console) */
+   sa1100_register_uart (1,1);	/* UART1 (big kahuna flow control serial port) */
+
+   /*
+	* Set SUS bit in SDCR0 so serial port 1 acts as a UART.
+	* See Intel SA-1110 Developers Manual Section 11.9.2.1 (GPCLK/UART Select)
+	*/
+   Ser1SDCR0 |= SDCR0_SUS;
+}
+
+MACHINE_START (FRODO,"2d3D, Inc. SA-1110 Development Board")
+	BOOT_MEM (0xc0000000,0x80000000,0xf8000000)
+	BOOT_PARAMS (0xc0000100)
+	MAPIO (frodo_map_io)
+	INITIRQ (sa1100_init_irq)
+MACHINE_END
+
diff -Nru linux/arch/arm/mach-sa1100/generic.c linux-2.4.19-pre5-mjc/arch/arm/mach-sa1100/generic.c
--- linux/arch/arm/mach-sa1100/generic.c	Thu Oct 11 12:04:57 2001
+++ linux-2.4.19-pre5-mjc/arch/arm/mach-sa1100/generic.c	Sat Apr  6 08:25:58 2002
@@ -56,20 +56,13 @@
 /*
  * Return the current CPU clock frequency in units of 100kHz
  */
-unsigned short get_cclk_frequency(void)
+static inline unsigned short get_cclk_frequency(void)
 {
 	return cclk_frequency_100khz[PPCR & 0xf];
 }
 
-EXPORT_SYMBOL(get_cclk_frequency);
-
 #ifdef CONFIG_CPU_FREQ
-
-/*
- * Validate the speed in khz.  If we can't generate the precise
- * frequency requested, round it down (to be on the safe side).
- */
-unsigned int sa1100_validatespeed(unsigned int khz)
+unsigned int sa11x0_freq_to_ppcr(unsigned int khz)
 {
 	int i;
 
@@ -79,35 +72,34 @@
 		if (cclk_frequency_100khz[i] <= khz)
 			break;
 
-	return cclk_frequency_100khz[i] * 100;
+	return i;
 }
 
 /*
- * Ok, set the CPU frequency.  Since we've done the validation
- * above, we can match for an exact frequency.  If we don't find
- * an exact match, we will to set the lowest frequency to be safe.
+ * Validate the speed in khz.  If we can't generate the precise
+ * frequency requested, round it down (to be on the safe side).
  */
-void sa1100_setspeed(unsigned int khz)
+unsigned int sa11x0_validatespeed(unsigned int khz)
 {
-	int i;
-
-	khz /= 100;
-
-	for (i = NR_FREQS - 1; i > 0; i--)
-		if (cclk_frequency_100khz[i] == khz)
-			break;
-//printk("setting ppcr to %d\n", i);
-	PPCR = i;
+	return cclk_frequency_100khz[sa11x0_freq_to_ppcr(khz)] * 100;
 }
 
-static int __init sa1100_init_clock(void)
+static int __init sa11x0_init_clock(void)
 {
-	cpufreq_init(get_cclk_frequency() * 100);
-	cpufreq_setfunctions(sa1100_validatespeed, sa1100_setspeed);
+	cpufreq_init(cclk_frequency_100khz[PPCR & 0xf] * 100);
 	return 0;
 }
 
-__initcall(sa1100_init_clock);
+__initcall(sa11x0_init_clock);
+#else
+/*
+ * We still need to provide this so building without cpufreq works.
+ */ 
+unsigned int cpufreq_get(int cpu)
+{
+	return cclk_frequency_100khz[PPCR & 0xf] * 100;
+}
+EXPORT_SYMBOL(cpufreq_get);
 #endif
 
 /*
@@ -130,13 +122,13 @@
 	PMCR = PMCR_SF;
 }
 
-static int __init sa1100_set_poweroff(void)
+static int __init sa1100_init(void)
 {
 	pm_power_off = sa1100_power_off;
 	return 0;
 }
 
-__initcall(sa1100_set_poweroff);
+__initcall(sa1100_init);
 
 
 /*
@@ -149,7 +141,8 @@
  * 0xf0000000-0xf3ffffff:	miscellaneous stuff (CPLDs, etc.)
  * 0xf4000000-0xf4ffffff:	SA-1111
  * 0xf5000000-0xf5ffffff:	reserved (used by cache flushing area)
- * 0xf6000000-0xffffffff:	reserved (internal SA1100 IO defined above)
+ * 0xf6000000-0xfffeffff:	reserved (internal SA1100 IO defined above)
+ * 0xffff0000-0xffff0fff:	SA1100 exception vectors
  *
  * Below 0xe8000000 is reserved for vm allocation.
  *
@@ -159,8 +152,8 @@
 
 static struct map_desc standard_io_desc[] __initdata = {
  /* virtual     physical    length      domain     r  w  c  b */
-  { 0xf6000000, 0x20000000, 0x01000000, DOMAIN_IO, 1, 1, 0, 0 }, /* PCMCIA0 IO */
-  { 0xf7000000, 0x30000000, 0x01000000, DOMAIN_IO, 1, 1, 0, 0 }, /* PCMCIA1 IO */
+  { 0xf6000000, 0x20000000, 0x01000000, DOMAIN_IO, 0, 1, 0, 0 }, /* PCMCIA0 IO */
+  { 0xf7000000, 0x30000000, 0x01000000, DOMAIN_IO, 0, 1, 0, 0 }, /* PCMCIA1 IO */
   { 0xf8000000, 0x80000000, 0x00100000, DOMAIN_IO, 0, 1, 0, 0 }, /* PCM */
   { 0xfa000000, 0x90000000, 0x00100000, DOMAIN_IO, 0, 1, 0, 0 }, /* SCM */
   { 0xfc000000, 0xa0000000, 0x00100000, DOMAIN_IO, 0, 1, 0, 0 }, /* MER */
diff -Nru linux/arch/arm/mach-sa1100/graphicsclient.c linux-2.4.19-pre5-mjc/arch/arm/mach-sa1100/graphicsclient.c
--- linux/arch/arm/mach-sa1100/graphicsclient.c	Thu Oct 25 16:53:46 2001
+++ linux-2.4.19-pre5-mjc/arch/arm/mach-sa1100/graphicsclient.c	Sat Apr  6 08:25:58 2002
@@ -113,7 +113,6 @@
 		irq_desc[irq].mask	= ADS_mask_irq1;
 		irq_desc[irq].unmask	= ADS_unmask_irq1;
 	}
-	GPDR &= ~GPIO_GPIO0;
 	set_GPIO_IRQ_edge(GPIO_GPIO0, GPIO_FALLING_EDGE);
 	setup_arm_irq( IRQ_GPIO0, &ADS_ext_irq );
 }
@@ -138,7 +137,7 @@
 
 static struct map_desc graphicsclient_io_desc[] __initdata = {
  /* virtual     physical    length      domain     r  w  c  b */
-  { 0xe8000000, 0x08000000, 0x02000000, DOMAIN_IO, 1, 1, 0, 0 }, /* Flash bank 1 */
+  { 0xe8000000, 0x08000000, 0x02000000, DOMAIN_IO, 0, 1, 0, 0 }, /* Flash bank 1 */
   { 0xf0000000, 0x10000000, 0x00400000, DOMAIN_IO, 0, 1, 0, 0 }, /* CPLD */
   { 0xf1000000, 0x18000000, 0x00400000, DOMAIN_IO, 0, 1, 0, 0 }, /* CAN */
   LAST_DESC
@@ -193,12 +192,8 @@
 	if (port->mapbase == _Ser1UTCR0) {
 		Ser1SDCR0 |= SDCR0_UART;
 		/* Set RTS Output */
-		GPDR |= GPIO_GC_UART0_RTS;
 		GPSR  = GPIO_GC_UART0_RTS;
 
-		/* Set CTS Input */
-		GPDR &= ~GPIO_GC_UART0_CTS;
-
 		gc_uart_ctrl_data[0].cts_prev_state = 0;
 		gc_uart_ctrl_data[0].info = info;
 		gc_uart_ctrl_data[0].port = port;
@@ -210,12 +205,8 @@
 	} else if (port->mapbase == _Ser2UTCR0) {
 		Ser2UTCR4 = Ser2HSCR0 = 0;
 		/* Set RTS Output */
-		GPDR |= GPIO_GC_UART1_RTS;
 		GPSR  = GPIO_GC_UART1_RTS;
 
-		/* Set CTS Input */
-		GPDR &= ~GPIO_GC_UART1_RTS;
-
 		gc_uart_ctrl_data[1].cts_prev_state = 0;
 		gc_uart_ctrl_data[1].info = info;
 		gc_uart_ctrl_data[1].port = port;
@@ -226,12 +217,8 @@
 							&gc_uart_ctrl_data[1]);
 	} else if (port->mapbase == _Ser3UTCR0) {
 		/* Set RTS Output */
-		GPDR |= GPIO_GC_UART2_RTS;
 		GPSR =	GPIO_GC_UART2_RTS;
 
-		/* Set CTS Input */
-		GPDR &= ~GPIO_GC_UART2_RTS;
-
 		gc_uart_ctrl_data[2].cts_prev_state = 0;
 		gc_uart_ctrl_data[2].info = info;
 		gc_uart_ctrl_data[2].port = port;
@@ -258,9 +245,9 @@
 	return 0;
 }
 
-static int graphicsclient_get_mctrl(struct uart_port *port)
+static u_int graphicsclient_get_mctrl(struct uart_port *port)
 {
-	int result = TIOCM_CD | TIOCM_DSR;
+	u_int result = TIOCM_CD | TIOCM_DSR;
 
 	if (port->mapbase == _Ser1UTCR0) {
 		if (!(GPLR & GPIO_GC_UART0_CTS))
@@ -326,6 +313,8 @@
 	sa1100_register_uart(0, 3);
 	sa1100_register_uart(1, 1);
 	sa1100_register_uart(2, 2);
+	GPDR |= GPIO_GC_UART0_RTS | GPIO_GC_UART1_RTS | GPIO_GC_UART2_RTS;
+	GPDR &= ~(GPIO_GC_UART0_CTS | GPIO_GC_UART1_RTS | GPIO_GC_UART2_RTS);
 }
 
 MACHINE_START(GRAPHICSCLIENT, "ADS GraphicsClient")
diff -Nru linux/arch/arm/mach-sa1100/graphicsmaster.c linux-2.4.19-pre5-mjc/arch/arm/mach-sa1100/graphicsmaster.c
--- linux/arch/arm/mach-sa1100/graphicsmaster.c	Thu Oct 25 16:53:46 2001
+++ linux-2.4.19-pre5-mjc/arch/arm/mach-sa1100/graphicsmaster.c	Sat Apr  6 08:25:58 2002
@@ -43,7 +43,7 @@
 	/*
 	 * Probe for SA1111.
 	 */
-	ret = sa1111_probe();
+	ret = sa1111_probe(ADS_SA1111_BASE);
 	if (ret < 0)
 		return ret;
 
@@ -174,7 +174,6 @@
 		irq_desc[irq].mask	= ADS_mask_irq1;
 		irq_desc[irq].unmask	= ADS_unmask_irq1;
 	}
-	GPDR &= ~GPIO_GPIO0;
 	set_GPIO_IRQ_edge(GPIO_GPIO0, GPIO_FALLING_EDGE);
 	setup_arm_irq( IRQ_GPIO0, &ADS_ext_irq );
 }
@@ -200,10 +199,10 @@
 
 static struct map_desc graphicsmaster_io_desc[] __initdata = {
  /* virtual     physical    length      domain     r  w  c  b */
-  { 0xe8000000, 0x08000000, 0x02000000, DOMAIN_IO, 1, 1, 0, 0 }, /* Flash bank 1 */
-  { 0xf0000000, 0x10000000, 0x00400000, DOMAIN_IO, 1, 1, 0, 0 }, /* CPLD */
-  { 0xf1000000, 0x40000000, 0x00400000, DOMAIN_IO, 1, 1, 0, 0 }, /* CAN */
-  { 0xf4000000, 0x18000000, 0x00800000, DOMAIN_IO, 1, 1, 0, 0 }, /* SA-1111 */
+  { 0xe8000000, 0x08000000, 0x02000000, DOMAIN_IO, 0, 1, 0, 0 }, /* Flash bank 1 */
+  { 0xf0000000, 0x10000000, 0x00400000, DOMAIN_IO, 0, 1, 0, 0 }, /* CPLD */
+  { 0xf1000000, 0x40000000, 0x00400000, DOMAIN_IO, 0, 1, 0, 0 }, /* CAN */
+  { 0xf4000000, 0x18000000, 0x00800000, DOMAIN_IO, 0, 1, 0, 0 }, /* SA-1111 */
   LAST_DESC
 };
 
@@ -215,31 +214,22 @@
 		Ser1SDCR0 |= SDCR0_UART;
 		/* Set RTS Output */
 		GPSR = GPIO_GPIO15;
-		GPDR |= GPIO_GPIO15;
-		/* Set CTS Input */
-		GPDR &= ~GPIO_GPIO14;
 	}
 	else if (port->mapbase == _Ser2UTCR0) {
 		Ser2UTCR4 = Ser2HSCR0 = 0;
 		/* Set RTS Output */
 		GPSR = GPIO_GPIO17;
-		GPDR |= GPIO_GPIO17;
-		/* Set CTS Input */
-		GPDR &= ~GPIO_GPIO16;
 	}
 	else if (port->mapbase == _Ser3UTCR0) {
 	        /* Set RTS Output */
 		GPSR = GPIO_GPIO19;
-		GPDR |= GPIO_GPIO19;
-		/* Set CTS Input */
-		GPDR &= ~GPIO_GPIO18;
 	}
 	return ret;
 }
 
-static int graphicsmaster_get_mctrl(struct uart_port *port)
+static u_int graphicsmaster_get_mctrl(struct uart_port *port)
 {
-	int result = TIOCM_CD | TIOCM_DSR;
+	u_int result = TIOCM_CD | TIOCM_DSR;
 
 	if (port->mapbase == _Ser1UTCR0) {
 		if (!(GPLR & GPIO_GPIO14))
@@ -304,6 +294,10 @@
 	sa1100_register_uart(0, 3);
 	sa1100_register_uart(1, 1);
 	sa1100_register_uart(2, 2);
+
+	/* set GPDR now */
+	GPDR |= GPIO_GPIO15 | GPIO_GPIO17 | GPIO_GPIO19;
+       	GPDR &= ~(GPIO_GPIO14 | GPIO_GPIO16 | GPIO_GPIO18);
 }
 
 MACHINE_START(GRAPHICSMASTER, "ADS GraphicsMaster")
diff -Nru linux/arch/arm/mach-sa1100/h3600.c linux-2.4.19-pre5-mjc/arch/arm/mach-sa1100/h3600.c
--- linux/arch/arm/mach-sa1100/h3600.c	Thu Oct 25 16:53:46 2001
+++ linux-2.4.19-pre5-mjc/arch/arm/mach-sa1100/h3600.c	Sat Apr  6 08:25:58 2002
@@ -1,8 +1,24 @@
 /*
- * linux/arch/arm/mach-sa1100/h3600.c
+ * Hardware definitions for Compaq iPAQ H3xxx Handheld Computers
+ *
+ * Copyright 2000,1 Compaq Computer Corporation.
+ *
+ * Use consistent with the GNU GPL is permitted,
+ * provided that this copyright notice is
+ * preserved in its entirety in all copies and derived works.
+ *
+ * COMPAQ COMPUTER CORPORATION MAKES NO WARRANTIES, EXPRESSED OR IMPLIED,
+ * AS TO THE USEFULNESS OR CORRECTNESS OF THIS CODE OR ITS
+ * FITNESS FOR ANY PARTICULAR PURPOSE.
+ *
+ * Author: Jamey Hicks.
+ *
+ * History:
+ *
+ * 2001-10-??	Andrew Christian   Added support for iPAQ H3800
+ *				   and abstracted EGPIO interface.
+ *
  */
-
-#include <linux/config.h>
 #include <linux/module.h>
 #include <linux/init.h>
 #include <linux/kernel.h>
@@ -17,84 +33,338 @@
 #include <asm/mach/map.h>
 #include <asm/mach/serial_sa1100.h>
 #include <linux/serial_core.h>
+#include <asm/arch/h3600_gpio.h>
 
 #include "generic.h"
 
-
 /*
- * Bitsy has extended, write-only memory-mapped GPIO's
+ * H3600 has extended, write-only memory-mapped GPIO's
+ * H3100 has 1/2 extended, write-only GPIO and 1/2 on
+ *	 regular GPIO lines.
+ * H3800 has memory-mapped GPIO through ASIC1 & 2
  */
 
-static int h3600_egpio = EGPIO_H3600_RS232_ON;
+#define H3600_EGPIO	(*(volatile unsigned int *)H3600_EGPIO_VIRT)
+
+static unsigned int h3600_egpio;
+
+/************************* H3100 *************************/
+
+#define H3100_DIRECT_EGPIO (GPIO_H3100_BT_ON	  \
+			  | GPIO_H3100_GPIO3	  \
+			  | GPIO_H3100_QMUTE	  \
+			  | GPIO_H3100_LCD_3V_ON  \
+			  | GPIO_H3100_AUD_ON	  \
+			  | GPIO_H3100_AUD_PWR_ON \
+			  | GPIO_H3100_IR_ON	  \
+			  | GPIO_H3100_IR_FSEL)
+
+static void h3100_init_egpio( void )
+{
+	GPDR |= H3100_DIRECT_EGPIO;
+	GPCR = H3100_DIRECT_EGPIO;   /* Initially all off */
+
+	/* Older bootldrs put GPIO2-9 in alternate mode on the
+	   assumption that they are used for video */
+	GAFR &= ~H3100_DIRECT_EGPIO;
+
+	h3600_egpio = EGPIO_H3600_RS232_ON;
+	H3600_EGPIO = h3600_egpio;
+}
+
+static void h3100_control_egpio( enum ipaq_egpio_type x, int setp )
+{
+	unsigned int egpio = 0;
+	long	     gpio = 0;
+	unsigned long flags;
+
+	switch (x) {
+	case IPAQ_EGPIO_LCD_ON:
+		egpio |= EGPIO_H3600_LCD_ON;
+		gpio  |= GPIO_H3100_LCD_3V_ON;
+		break;
+	case IPAQ_EGPIO_CODEC_NRESET:
+		egpio |= EGPIO_H3600_CODEC_NRESET;
+		break;
+	case IPAQ_EGPIO_AUDIO_ON:
+		gpio |= GPIO_H3100_AUD_PWR_ON
+			| GPIO_H3100_AUD_ON;
+		break;
+	case IPAQ_EGPIO_QMUTE:
+		gpio |= GPIO_H3100_QMUTE;
+		break;
+	case IPAQ_EGPIO_OPT_NVRAM_ON:
+		egpio |= EGPIO_H3600_OPT_NVRAM_ON;
+		break;
+	case IPAQ_EGPIO_OPT_ON:
+		egpio |= EGPIO_H3600_OPT_ON;
+		break;
+	case IPAQ_EGPIO_CARD_RESET:
+		egpio |= EGPIO_H3600_CARD_RESET;
+		break;
+	case IPAQ_EGPIO_OPT_RESET:
+		egpio |= EGPIO_H3600_OPT_RESET;
+		break;
+	case IPAQ_EGPIO_IR_ON:
+		gpio |= GPIO_H3100_IR_ON;
+		break;
+	case IPAQ_EGPIO_IR_FSEL:
+		gpio |= GPIO_H3100_IR_FSEL;
+		break;
+	case IPAQ_EGPIO_RS232_ON:
+		egpio |= EGPIO_H3600_RS232_ON;
+		break;
+	case IPAQ_EGPIO_VPP_ON:
+		egpio |= EGPIO_H3600_VPP_ON;
+		break;
+	}
+
+	local_irq_save(flags);
+	if ( setp ) {
+		h3600_egpio |= egpio;
+		GPSR = gpio;
+	} else {
+		h3600_egpio &= ~egpio;
+		GPCR = gpio;
+	}
+	H3600_EGPIO = h3600_egpio;
+	local_irq_restore(flags);
 
-void init_h3600_egpio(void)
+	/*
+	if ( x != IPAQ_EGPIO_VPP_ON ) {
+		printk(__FUNCTION__ " : type=%d (%s) gpio=0x%x (0x%x) egpio=0x%x (0x%x) setp=%d\n",
+		       x, egpio_names[x], GPLR, gpio, h3600_egpio, egpio, setp );
+	}
+	*/
+}
+
+static unsigned long h3100_read_egpio( void )
 {
-#ifdef CONFIG_IPAQ_H3100
-	int h3100_controls = (GPIO_H3100_BT_ON
-			      | GPIO_H3100_QMUTE
-			      | GPIO_H3100_LCD_3V_ON 
-			      | GPIO_H3100_AUD_ON
-			      | GPIO_H3100_AUD_PWR_ON
-			      | GPIO_H3100_IR_ON
-			      | GPIO_H3100_IR_FSEL);
-	GPDR |= h3100_controls;
-	GPCR = h3100_controls;
-	GAFR = GPIO_SSP_CLK;
-#endif
-}
-
-void clr_h3600_egpio(unsigned long x)
-{
-#ifdef CONFIG_IPAQ_H3100
-	unsigned long gpcr = 0;
-	if (x&EGPIO_H3600_QMUTE)
-		gpcr |= GPIO_H3100_QMUTE;
-	if (x&EGPIO_H3600_LCD_ON)
-		gpcr |= GPIO_H3100_LCD_3V_ON;
-	if (x&EGPIO_H3600_AUD_AMP_ON)
-		gpcr |= GPIO_H3100_AUD_ON;
-	if (x&EGPIO_H3600_AUD_PWR_ON)
-		gpcr |= GPIO_H3100_AUD_PWR_ON;
-	if (x&EGPIO_H3600_IR_ON)
-		gpcr |= GPIO_H3100_IR_ON;
-	if (x&EGPIO_H3600_IR_FSEL)
-		gpcr |= GPIO_H3100_IR_FSEL;
-	GPCR = gpcr;
-#endif
-	h3600_egpio &= ~x;
+	return h3600_egpio;
+}
+
+static struct ipaq_model_ops h3100_model_ops __initdata = {
+	model	     : IPAQ_H3100,
+	generic_name : "3100",
+	initialize   : h3100_init_egpio,
+	control      : h3100_control_egpio,
+	read	     : h3100_read_egpio
+};
+
+
+/************************* H3600 *************************/
+
+static void h3600_init_egpio( void )
+{
+	h3600_egpio = EGPIO_H3600_RS232_ON;
 	H3600_EGPIO = h3600_egpio;
 }
 
-void set_h3600_egpio(unsigned long x)
+static void h3600_control_egpio( enum ipaq_egpio_type x, int setp )
 {
-#ifdef CONFIG_IPAQ_H3100
-	unsigned long gpsr = 0;
-	if (x&EGPIO_H3600_QMUTE)
-		gpsr |= GPIO_H3100_QMUTE;
-	if (x&EGPIO_H3600_LCD_ON)
-		gpsr |= GPIO_H3100_LCD_3V_ON;
-	if (x&EGPIO_H3600_AUD_AMP_ON)
-		gpsr |= GPIO_H3100_AUD_ON;
-	if (x&EGPIO_H3600_AUD_PWR_ON)
-		gpsr |= GPIO_H3100_AUD_PWR_ON;
-	if (x&EGPIO_H3600_IR_ON)
-		gpsr |= GPIO_H3100_IR_ON;
-	if (x&EGPIO_H3600_IR_FSEL)
-		gpsr |= GPIO_H3100_IR_FSEL;
-	GPSR = gpsr;
-#endif
-	h3600_egpio |= x;
+	unsigned int egpio = 0;
+	unsigned long flags;
+
+	switch (x) {
+	case IPAQ_EGPIO_LCD_ON:
+		egpio |= EGPIO_H3600_LCD_ON |
+			 EGPIO_H3600_LCD_PCI |
+			 EGPIO_H3600_LCD_5V_ON |
+			 EGPIO_H3600_LVDD_ON;
+		break;
+	case IPAQ_EGPIO_CODEC_NRESET:
+		egpio |= EGPIO_H3600_CODEC_NRESET;
+		break;
+	case IPAQ_EGPIO_AUDIO_ON:
+		egpio |= EGPIO_H3600_AUD_AMP_ON |
+			EGPIO_H3600_AUD_PWR_ON;
+		break;
+	case IPAQ_EGPIO_QMUTE:
+		egpio |= EGPIO_H3600_QMUTE;
+		break;
+	case IPAQ_EGPIO_OPT_NVRAM_ON:
+		egpio |= EGPIO_H3600_OPT_NVRAM_ON;
+		break;
+	case IPAQ_EGPIO_OPT_ON:
+		egpio |= EGPIO_H3600_OPT_ON;
+		break;
+	case IPAQ_EGPIO_CARD_RESET:
+		egpio |= EGPIO_H3600_CARD_RESET;
+		break;
+	case IPAQ_EGPIO_OPT_RESET:
+		egpio |= EGPIO_H3600_OPT_RESET;
+		break;
+	case IPAQ_EGPIO_IR_ON:
+		egpio |= EGPIO_H3600_IR_ON;
+		break;
+	case IPAQ_EGPIO_IR_FSEL:
+		egpio |= EGPIO_H3600_IR_FSEL;
+		break;
+	case IPAQ_EGPIO_RS232_ON:
+		egpio |= EGPIO_H3600_RS232_ON;
+		break;
+	case IPAQ_EGPIO_VPP_ON:
+		egpio |= EGPIO_H3600_VPP_ON;
+		break;
+	}
+
+	local_irq_save(flags);
+	if ( setp )
+		h3600_egpio |= egpio;
+	else
+		h3600_egpio &= ~egpio;
 	H3600_EGPIO = h3600_egpio;
+	local_irq_restore(flags);
+}
+
+static unsigned long h3600_read_egpio( void )
+{
+	return h3600_egpio;
+}
+
+static struct ipaq_model_ops h3600_model_ops __initdata = {
+	model	     : IPAQ_H3600,
+	generic_name : "3600",
+	initialize   : h3600_init_egpio,
+	control      : h3600_control_egpio,
+	read	     : h3600_read_egpio
+};
+
+/************************* H3800 *************************/
+
+#define ASIC1_OUTPUTS	 0x7fff   /* First 15 bits are used */
+
+static unsigned int h3800_asic1_gpio;
+static unsigned int h3800_asic2_gpio;
+
+static void h3800_init_egpio(void)
+{
+	/* Set up ASIC #1 */
+	H3800_ASIC1_GPIO_Direction    = ASIC1_OUTPUTS;		  /* All outputs */
+	H3800_ASIC1_GPIO_Mask	      = ASIC1_OUTPUTS;		  /* No interrupts */
+	H3800_ASIC1_GPIO_SleepMask    = ASIC1_OUTPUTS;
+	H3800_ASIC1_GPIO_SleepDir     = ASIC1_OUTPUTS;
+	H3800_ASIC1_GPIO_SleepOut     = GPIO_H3800_ASIC1_EAR_ON_N;
+	H3800_ASIC1_GPIO_BattFaultDir = ASIC1_OUTPUTS;
+	H3800_ASIC1_GPIO_BattFaultOut = GPIO_H3800_ASIC1_EAR_ON_N;
+
+	h3800_asic1_gpio = GPIO_H3800_ASIC1_IR_ON_N   /* TODO: Check IR level */
+		| GPIO_H3800_ASIC1_RS232_ON
+		| GPIO_H3800_ASIC1_EAR_ON_N;
+
+	H3800_ASIC1_GPIO_Out = h3800_asic1_gpio;
+
+	/* Set up ASIC #2 */
+	H3800_ASIC2_GPIO_Direction = GPIO_H3800_ASIC2_PEN_IRQ
+		| GPIO_H3800_ASIC2_SD_DETECT
+		| GPIO_H3800_ASIC2_EAR_IN_N
+		| GPIO_H3800_ASIC2_USB_DETECT_N
+		| GPIO_H3800_ASIC2_SD_CON_SLT;
+
+	h3800_asic2_gpio = GPIO_H3800_ASIC2_IN_Y1_N | GPIO_H3800_ASIC2_IN_X1_N;
+	H3800_ASIC2_GPIO_Data	      = h3800_asic2_gpio;
+	H3800_ASIC2_GPIO_BattFaultOut = h3800_asic2_gpio;
+
+	/* TODO : Set sleep states & battery fault states */
+
+	/* Clear VPP Enable */
+	H3800_ASIC1_FlashWP_VPP_ON = 0;
+}
+
+static void h3800_control_egpio( enum ipaq_egpio_type x, int setp )
+{
+	unsigned int set_asic1_egpio = 0;
+	unsigned int clear_asic1_egpio = 0;
+	unsigned long flags;
+
+	switch (x) {
+	case IPAQ_EGPIO_LCD_ON:
+		set_asic1_egpio |= GPIO_H3800_ASIC1_LCD_5V_ON
+			| GPIO_H3800_ASIC1_LCD_ON
+			| GPIO_H3800_ASIC1_LCD_PCI
+			| GPIO_H3800_ASIC1_VGH_ON
+			| GPIO_H3800_ASIC1_VGL_ON;
+		break;
+	case IPAQ_EGPIO_CODEC_NRESET:
+		break;
+	case IPAQ_EGPIO_AUDIO_ON:
+		break;
+	case IPAQ_EGPIO_QMUTE:
+		break;
+	case IPAQ_EGPIO_OPT_NVRAM_ON:
+		break;
+	case IPAQ_EGPIO_OPT_ON:
+		break;
+	case IPAQ_EGPIO_CARD_RESET:
+		break;
+	case IPAQ_EGPIO_OPT_RESET:
+		break;
+	case IPAQ_EGPIO_IR_ON:
+		clear_asic1_egpio |= GPIO_H3800_ASIC1_IR_ON_N;	 /* TODO : This is backwards? */
+		break;
+	case IPAQ_EGPIO_IR_FSEL:
+		break;
+	case IPAQ_EGPIO_RS232_ON:
+		set_asic1_egpio |= GPIO_H3800_ASIC1_RS232_ON;
+		break;
+	case IPAQ_EGPIO_VPP_ON:
+		H3800_ASIC1_FlashWP_VPP_ON = setp;
+		break;
+	}
+
+	local_irq_save(flags);
+	if ( setp ) {
+		h3800_asic1_gpio |= set_asic1_egpio;
+		h3800_asic1_gpio &= ~clear_asic1_egpio;
+	}
+	else {
+		h3800_asic1_gpio &= ~set_asic1_egpio;
+		h3800_asic1_gpio |= clear_asic1_egpio;
+	}
+	H3800_ASIC1_GPIO_Out = h3800_asic1_gpio;
+	local_irq_restore(flags);
 }
 
-EXPORT_SYMBOL(clr_h3600_egpio);
-EXPORT_SYMBOL(set_h3600_egpio);
+static unsigned long h3800_read_egpio( void )
+{
+	return h3800_asic1_gpio | (h3800_asic2_gpio << 16);
+}
+
+static struct ipaq_model_ops h3800_model_ops __initdata = {
+	model	     : IPAQ_H3800,
+	generic_name : "3800",
+	initialize   : h3800_init_egpio,
+	control      : h3800_control_egpio,
+	read	     : h3800_read_egpio
+};
 
 
 /*
- * Low-level UART features.
- *
- * Note that RTS, CTS and DCD are all active low.
+ * Use command line argument to choose between ipaq handheld model numbers
+ */
+
+struct ipaq_model_ops ipaq_model_ops;
+EXPORT_SYMBOL(ipaq_model_ops);
+
+static int __init h3600_init_model_ops(void)
+{
+	if (machine_is_h3xxx()) {
+		if (machine_is_h3100()) {
+			ipaq_model_ops = h3100_model_ops;
+		} else if (machine_is_h3600()) {
+			ipaq_model_ops = h3600_model_ops;
+		} else if (machine_is_h3800()) {
+			ipaq_model_ops = h3800_model_ops;
+		}
+		init_h3600_egpio();
+	}
+	return 0;
+}
+
+__initcall(h3600_init_model_ops);
+
+/*
+ * low-level UART features
  */
 
 static void h3600_uart_set_mctrl(struct uart_port *port, u_int mctrl)
@@ -107,9 +377,9 @@
 	}
 }
 
-static int h3600_uart_get_mctrl(struct uart_port *port)
+static u_int h3600_uart_get_mctrl(struct uart_port *port)
 {
-	int ret = TIOCM_CD | TIOCM_CTS | TIOCM_DSR;
+	u_int ret = TIOCM_CD | TIOCM_CTS | TIOCM_DSR;
 
 	if (port->mapbase == _Ser3UTCR0) {
 		int gplr = GPLR;
@@ -139,20 +409,30 @@
 static void h3600_uart_pm(struct uart_port *port, u_int state, u_int oldstate)
 {
 	if (port->mapbase == _Ser2UTCR0) {
-		if (state == 0) {
-			set_h3600_egpio(EGPIO_H3600_IR_ON);
-		} else {
-			clr_h3600_egpio(EGPIO_H3600_IR_ON);
-		}
+		assign_h3600_egpio( IPAQ_EGPIO_IR_ON, !state );
 	} else if (port->mapbase == _Ser3UTCR0) {
-		if (state == 0) {
-			set_h3600_egpio(EGPIO_H3600_RS232_ON);
-		} else {
-			clr_h3600_egpio(EGPIO_H3600_RS232_ON);
-		}
+		assign_h3600_egpio( IPAQ_EGPIO_RS232_ON, !state );
 	}
 }
 
+/*
+ * Enable/Disable wake up events for this serial port.
+ * Obviously, we only support this on the normal COM port.
+ */
+static int h3600_uart_set_wake(struct uart_port *port, u_int enable)
+{
+	int err = -EINVAL;
+
+	if (port->mapbase == _Ser3UTCR0) {
+		if (enable)
+			PWER |= PWER_GPIO23 | PWER_GPIO25 ; /* DCD and CTS */
+		else
+			PWER &= ~(PWER_GPIO23 | PWER_GPIO25); /* DCD and CTS */
+		err = 0;
+	}
+	return err;
+}
+
 static int h3600_uart_open(struct uart_port *port, struct uart_info *info)
 {
 	int ret = 0;
@@ -163,8 +443,6 @@
 		Ser2HSSR0 = HSSR0_EIF | HSSR0_TUR |
 			    HSSR0_RAB | HSSR0_FRE;
 	} else if (port->mapbase == _Ser3UTCR0) {
-		GPDR &= ~(GPIO_H3600_COM_DCD|GPIO_H3600_COM_CTS);
-		GPDR |= GPIO_H3600_COM_RTS;
 		set_GPIO_IRQ_edge(GPIO_H3600_COM_DCD|GPIO_H3600_COM_CTS,
 				  GPIO_BOTH_EDGES);
 
@@ -193,16 +471,17 @@
 	set_mctrl:	h3600_uart_set_mctrl,
 	get_mctrl:	h3600_uart_get_mctrl,
 	pm:		h3600_uart_pm,
+	set_wake:	h3600_uart_set_wake,
 	open:		h3600_uart_open,
 	close:		h3600_uart_close,
 };
 
 static struct map_desc h3600_io_desc[] __initdata = {
- /* virtual     physical    length      domain     r  w  c  b */
-  { 0xe8000000, 0x00000000, 0x02000000, DOMAIN_IO, 1, 1, 0, 0 }, /* Flash bank 0 */
-  { 0xf0000000, 0x49000000, 0x00100000, DOMAIN_IO, 0, 1, 0, 0 }, /* EGPIO 0 */
-  { 0xf1000000, 0x10000000, 0x02800000, DOMAIN_IO, 1, 1, 0, 0 }, /* static memory bank 2 */
-  { 0xf3800000, 0x40000000, 0x00800000, DOMAIN_IO, 1, 1, 0, 0 }, /* static memory bank 4 */
+ /* virtual	       physical    length      domain	  r  w	c  b */
+  { 0xe8000000,        0x00000000, 0x02000000, DOMAIN_IO, 0, 1, 0, 0 }, /* Flash bank 0 	 CS#0 */
+  { H3600_EGPIO_VIRT,  0x49000000, 0x01000000, DOMAIN_IO, 0, 1, 0, 0 }, /* EGPIO 0		 CS#5 */
+  { H3600_BANK_2_VIRT, 0x10000000, 0x02800000, DOMAIN_IO, 0, 1, 0, 0 }, /* static memory bank 2  CS#2 */
+  { H3600_BANK_4_VIRT, 0x40000000, 0x00800000, DOMAIN_IO, 0, 1, 0, 0 }, /* static memory bank 4  CS#4 */
   LAST_DESC
 };
 
@@ -214,13 +493,19 @@
 	sa1100_register_uart_fns(&h3600_port_fns);
 	sa1100_register_uart(0, 3);
 	sa1100_register_uart(1, 1); /* isn't this one driven elsewhere? */
-	init_h3600_egpio();
 
 	/*
-	 * Default GPIO settings.
+	 * Default GPIO settings.  Should be set by machine
 	 */
 	GPCR = 0x0fffffff;
-	GPDR = 0x0401f3fc;
+//	GPDR = 0x0401f3fc;
+	GPDR = GPIO_H3600_COM_RTS  | GPIO_H3600_L3_CLOCK |
+	       GPIO_H3600_L3_MODE  | GPIO_H3600_L3_DATA  |
+	       GPIO_H3600_CLK_SET1 | GPIO_H3600_CLK_SET0 |
+	       GPIO_LDD15 | GPIO_LDD14 | GPIO_LDD13 | GPIO_LDD12 |
+	       GPIO_LDD11 | GPIO_LDD10 | GPIO_LDD9  | GPIO_LDD8;
+
+	init_h3600_egpio();
 
 	/*
 	 * Ensure those pins are outputs and driving low.
@@ -230,11 +515,24 @@
 
 	/* Configure suspend conditions */
 	PGSR = 0;
-	PWER = 0x1 | (1 << 31);
-	PCFR = PCFR_OPDE | PCFR_FP | PCFR_FS;
-}
-
-MACHINE_START(H3600, "Compaq iPAQ")
+	PWER = PWER_GPIO0 | PWER_RTC;
+	PCFR = PCFR_OPDE;
+	PSDR = 0;
+}
+
+MACHINE_START(H3600, "Compaq iPAQ H3600")
+	BOOT_MEM(0xc0000000, 0x80000000, 0xf8000000)
+	BOOT_PARAMS(0xc0000100)
+	MAPIO(h3600_map_io)
+	INITIRQ(sa1100_init_irq)
+MACHINE_END
+MACHINE_START(H3100, "Compaq iPAQ H3100")
+	BOOT_MEM(0xc0000000, 0x80000000, 0xf8000000)
+	BOOT_PARAMS(0xc0000100)
+	MAPIO(h3600_map_io)
+	INITIRQ(sa1100_init_irq)
+MACHINE_END
+MACHINE_START(H3800, "Compaq iPAQ H3800")
 	BOOT_MEM(0xc0000000, 0x80000000, 0xf8000000)
 	BOOT_PARAMS(0xc0000100)
 	MAPIO(h3600_map_io)
diff -Nru linux/arch/arm/mach-sa1100/huw_webpanel.c linux-2.4.19-pre5-mjc/arch/arm/mach-sa1100/huw_webpanel.c
--- linux/arch/arm/mach-sa1100/huw_webpanel.c	Sun Aug 12 14:13:59 2001
+++ linux-2.4.19-pre5-mjc/arch/arm/mach-sa1100/huw_webpanel.c	Sat Apr  6 08:25:58 2002
@@ -2,8 +2,6 @@
  * linux/arch/arm/mach-sa1100/huw_webpanel.c
  *
  */
-
-#include <linux/config.h>
 #include <linux/module.h>
 #include <linux/init.h>
 #include <linux/kernel.h>
@@ -55,8 +53,8 @@
 **/
 static struct map_desc huw_webpanel_io_desc[] __initdata = {
  /* virtual     physical    length      domain     r  w  c  b */
-  { 0xe8000000, 0x00000000, 0x02000000, DOMAIN_IO, 1, 1, 0, 0 }, /* Flash bank 0, neccessary for mtd */
-  { 0xf0000000, 0xc1fb8000, 0x00048000, DOMAIN_IO, 1, 1, 0, 0 }, /* Parameter */
+  { 0xe8000000, 0x00000000, 0x02000000, DOMAIN_IO, 0, 1, 0, 0 }, /* Flash bank 0, neccessary for mtd */
+  { 0xf0000000, 0xc1fb8000, 0x00048000, DOMAIN_IO, 0, 1, 0, 0 }, /* Parameter */
   { 0xf1000000, 0x18000000, 0x00100000, DOMAIN_IO, 0, 1, 0, 0 }, /* Paules CS3, write only */
   LAST_DESC
 };
diff -Nru linux/arch/arm/mach-sa1100/irq.c linux-2.4.19-pre5-mjc/arch/arm/mach-sa1100/irq.c
--- linux/arch/arm/mach-sa1100/irq.c	Sun Aug 12 14:13:59 2001
+++ linux-2.4.19-pre5-mjc/arch/arm/mach-sa1100/irq.c	Sat Apr  6 08:25:58 2002
@@ -9,12 +9,11 @@
  * it under the terms of the GNU General Public License version 2 as
  * published by the Free Software Foundation.
  */
-
-#include <linux/config.h>
 #include <linux/init.h>
 #include <linux/module.h>
 #include <linux/sched.h>
 #include <linux/interrupt.h>
+#include <linux/ioport.h>
 #include <linux/ptrace.h>
 
 #include <asm/hardware.h>
@@ -35,8 +34,13 @@
 static int GPIO_IRQ_rising_edge;
 static int GPIO_IRQ_falling_edge;
 
-void set_GPIO_IRQ_edge( int gpio_mask, int edge )
+void set_GPIO_IRQ_edge(int gpio_mask, int edge)
 {
+	long flags;
+	int irq = 0;
+
+	gpio_mask &= 0x0fffffff;
+	local_irq_save(flags);
 	if (edge & GPIO_FALLING_EDGE)
 		GPIO_IRQ_falling_edge |= gpio_mask;
 	else
@@ -45,6 +49,17 @@
 		GPIO_IRQ_rising_edge |= gpio_mask;
 	else
 		GPIO_IRQ_rising_edge &= ~gpio_mask;
+	GPDR &= ~gpio_mask;
+	GAFR &= ~gpio_mask;
+	while (gpio_mask) {
+		if (irq == 11)
+			irq = IRQ_GPIO11;
+		if (gpio_mask & 1)
+			irq_desc[irq].valid = 1;
+		irq++;
+		gpio_mask >>= 1;
+	}
+	local_irq_restore(flags);
 }
 
 EXPORT_SYMBOL(set_GPIO_IRQ_edge);
@@ -121,7 +136,7 @@
 
 		for (i = 11; i <= 27; ++i) {
 			if (irq & (1<<i)) {
-				do_IRQ (IRQ_GPIO_11_27(i), regs);
+				do_IRQ(IRQ_GPIO11 + i - 11, regs);
 			}
 		}
 	}
@@ -175,11 +190,18 @@
 	GFER = (GFER & ~mask) | (GPIO_IRQ_falling_edge & mask);
 }
 
+static struct resource irq_resource = {
+	name:	"irqs",
+	start:	0x90050000,
+	end:	0x9005ffff,
+};
 
 void __init sa1100_init_irq(void)
 {
 	int irq;
 
+	request_resource(&iomem_resource, &irq_resource);
+
 	/* disable all IRQs */
 	ICMR = 0;
 
@@ -197,8 +219,13 @@
 	 */
 	ICCR = 1;
 
+	/*
+	 * Note: GPIO IRQs are initially invalid until at least one call
+	 * to set_GPIO_IRQ_edge() is performed.
+	 */
+
 	for (irq = 0; irq <= 10; irq++) {
-		irq_desc[irq].valid	= 1;
+		irq_desc[irq].valid	= 0;
 		irq_desc[irq].probe_ok	= 1;
 		irq_desc[irq].mask_ack	= sa1100_mask_and_ack_GPIO0_10_irq;
 		irq_desc[irq].mask	= sa1100_mask_GPIO0_10_irq;
@@ -214,7 +241,7 @@
 	}
 
 	for (irq = 32; irq <= 48; irq++) {
-		irq_desc[irq].valid	= 1;
+		irq_desc[irq].valid	= 0;
 		irq_desc[irq].probe_ok	= 1;
 		irq_desc[irq].mask_ack	= sa1100_mask_and_ack_GPIO11_27_irq;
 		irq_desc[irq].mask	= sa1100_mask_GPIO11_27_irq;
diff -Nru linux/arch/arm/mach-sa1100/itsy.c linux-2.4.19-pre5-mjc/arch/arm/mach-sa1100/itsy.c
--- linux/arch/arm/mach-sa1100/itsy.c	Sun Aug 12 14:13:59 2001
+++ linux-2.4.19-pre5-mjc/arch/arm/mach-sa1100/itsy.c	Sat Apr  6 08:25:58 2002
@@ -31,8 +31,8 @@
    likely wrong. */
 static struct map_desc itsy_io_desc[] __initdata = {
  /* virtual     physical    length      domain     r  w  c  b */
-  { 0xe8000000, 0x00000000, 0x02000000, DOMAIN_IO, 1, 1, 0, 0 }, /* Flash bank 0 */
-  { 0xf0000000, 0x49000000, 0x01000000, DOMAIN_IO, 1, 1, 0, 0 }, /* EGPIO 0 */
+  { 0xe8000000, 0x00000000, 0x02000000, DOMAIN_IO, 0, 1, 0, 0 }, /* Flash bank 0 */
+  { 0xf0000000, 0x49000000, 0x01000000, DOMAIN_IO, 0, 1, 0, 0 }, /* EGPIO 0 */
   LAST_DESC
 };
 
diff -Nru linux/arch/arm/mach-sa1100/jornada720.c linux-2.4.19-pre5-mjc/arch/arm/mach-sa1100/jornada720.c
--- linux/arch/arm/mach-sa1100/jornada720.c	Thu Oct 11 12:04:57 2001
+++ linux-2.4.19-pre5-mjc/arch/arm/mach-sa1100/jornada720.c	Sat Apr  6 08:25:58 2002
@@ -37,20 +37,17 @@
 	SKCR = JORSKCR_INIT;	/* Turn on the PLL, enable Ready and enable nOE assertion from DC */
 	mdelay(100);
 
-	SKCR = JORSKCR_RCLK;	/* turn on the RCLOCK */
-	SMCR = 0x35;	/* initialize the SMC (debug SA-1111 reset */
-	PCCR = 0;	/* initialize the S2MC (debug SA-1111 reset) */
+	SBI_SKCR = JORSKCR_RCLK;/* turn on the RCLOCK */
+	SBI_SMCR = 0x35;	/* initialize the SMC (debug SA-1111 reset */
+	PCCR = 0;		/* initialize the S2MC (debug SA-1111 reset) */
 
 	/* LDD4 is speaker, LDD3 is microphone */
 	PPSR &= ~(PPC_LDD3 | PPC_LDD4);
 	PPDR |= PPC_LDD3 | PPC_LDD4;
 
 	/* initialize extra IRQs */
-	set_GPIO_IRQ_edge(GPIO_GPIO(1), GPIO_RISING_EDGE);
-	sa1111_init_irq(SA1100_GPIO_TO_IRQ(1));	/* chained on GPIO 1 */
-
-	sa1100_register_uart(0, 3);
-	sa1100_register_uart(1, 1);
+	set_GPIO_IRQ_edge(GPIO_GPIO1, GPIO_RISING_EDGE);
+	sa1111_init_irq(IRQ_GPIO1);	/* chained on GPIO 1 */
 
 	return 0;
 }
@@ -68,10 +65,10 @@
 
 static struct map_desc jornada720_io_desc[] __initdata = {
  /* virtual     physical    length      domain     r  w  c  b */
-  { 0xe8000000, 0x00000000, 0x02000000, DOMAIN_IO, 1, 1, 0, 0 }, /* Flash bank 0 */
-  { 0xf0000000, 0x48000000, 0x00100000, DOMAIN_IO, 1, 1, 0, 0 }, /* Epson registers */
-  { 0xf1000000, 0x48200000, 0x00100000, DOMAIN_IO, 1, 1, 0, 0 }, /* Epson frame buffer */
-  { 0xf4000000, 0x40000000, 0x00100000, DOMAIN_IO, 1, 1, 0, 0 }, /* SA-1111 */
+  { 0xe8000000, 0x00000000, 0x02000000, DOMAIN_IO, 0, 1, 0, 0 }, /* Flash bank 0 */
+  { 0xf0000000, 0x48000000, 0x00100000, DOMAIN_IO, 0, 1, 0, 0 }, /* Epson registers */
+  { 0xf1000000, 0x48200000, 0x00100000, DOMAIN_IO, 0, 1, 0, 0 }, /* Epson frame buffer */
+  { 0xf4000000, 0x40000000, 0x00100000, DOMAIN_IO, 0, 1, 0, 0 }, /* SA-1111 */
   LAST_DESC
 };
 
@@ -79,6 +76,9 @@
 {
 	sa1100_map_io();
 	iotable_init(jornada720_io_desc);
+	
+	sa1100_register_uart(0, 3);
+	sa1100_register_uart(1, 1);
 }
 
 MACHINE_START(JORNADA720, "HP Jornada 720")
diff -Nru linux/arch/arm/mach-sa1100/lart.c linux-2.4.19-pre5-mjc/arch/arm/mach-sa1100/lart.c
--- linux/arch/arm/mach-sa1100/lart.c	Sun Aug 12 20:36:24 2001
+++ linux-2.4.19-pre5-mjc/arch/arm/mach-sa1100/lart.c	Sat Apr  6 08:25:58 2002
@@ -18,8 +18,8 @@
 
 static struct map_desc lart_io_desc[] __initdata = {
  /* virtual     physical    length      domain     r  w  c  b */
-  { 0xe8000000, 0x00000000, 0x00400000, DOMAIN_IO, 1, 1, 0, 0 }, /* main flash memory */
-  { 0xec000000, 0x08000000, 0x00400000, DOMAIN_IO, 1, 1, 0, 0 }, /* main flash, alternative location */
+  { 0xe8000000, 0x00000000, 0x00400000, DOMAIN_IO, 0, 1, 0, 0 }, /* main flash memory */
+  { 0xec000000, 0x08000000, 0x00400000, DOMAIN_IO, 0, 1, 0, 0 }, /* main flash, alternative location */
   LAST_DESC
 };
 
@@ -31,6 +31,7 @@
 	sa1100_register_uart(0, 3);
 	sa1100_register_uart(1, 1);
 	sa1100_register_uart(2, 2);
+
 	GAFR |= (GPIO_UART_TXD | GPIO_UART_RXD);
 	GPDR |= GPIO_UART_TXD;
 	GPDR &= ~GPIO_UART_RXD;
diff -Nru linux/arch/arm/mach-sa1100/leds-assabet.c linux-2.4.19-pre5-mjc/arch/arm/mach-sa1100/leds-assabet.c
--- linux/arch/arm/mach-sa1100/leds-assabet.c	Thu Oct 25 16:53:46 2001
+++ linux-2.4.19-pre5-mjc/arch/arm/mach-sa1100/leds-assabet.c	Sat Apr  6 08:25:58 2002
@@ -42,6 +42,8 @@
 
 	case led_stop:
 		led_state &= ~LED_STATE_ENABLED;
+		hw_led_state = ASSABET_BCR_LED_RED | ASSABET_BCR_LED_GREEN;
+		ASSABET_BCR_frob(ASSABET_BCR_LED_MASK, hw_led_state);
 		break;
 
 	case led_claim:
@@ -107,8 +109,7 @@
 	}
 
 	if  (led_state & LED_STATE_ENABLED)
-		ASSABET_BCR = BCR_value = (BCR_value & ~ASSABET_BCR_LED_MASK) |
-			hw_led_state;
+		ASSABET_BCR_frob(ASSABET_BCR_LED_MASK, hw_led_state);
 
 	local_irq_restore(flags);
 }
diff -Nru linux/arch/arm/mach-sa1100/leds-flexanet.c linux-2.4.19-pre5-mjc/arch/arm/mach-sa1100/leds-flexanet.c
--- linux/arch/arm/mach-sa1100/leds-flexanet.c	Sun Aug 12 14:13:59 2001
+++ linux-2.4.19-pre5-mjc/arch/arm/mach-sa1100/leds-flexanet.c	Sat Apr  6 08:25:58 2002
@@ -35,7 +35,7 @@
 	switch (evt) {
 	case led_start:
 		/* start using LEDs and enable its hardware */
-		hw_led_bcr = BCR_LED_GREEN;
+		hw_led_bcr = FHH_BCR_LED_GREEN;
 		hw_led_gpio = GPIO_LED_RED;
 		led_state = LED_STATE_ENABLED;
 		break;
@@ -71,13 +71,13 @@
 	case led_idle_start:
 		/* turn off CPU load LED */
 		if (!(led_state & LED_STATE_CLAIMED))
-			hw_led_bcr &= ~BCR_LED_GREEN;
+			hw_led_bcr &= ~FHH_BCR_LED_GREEN;
 		break;
 
 	case led_idle_end:
 		/* turn on CPU load LED */
 		if (!(led_state & LED_STATE_CLAIMED))
-			hw_led_bcr |= BCR_LED_GREEN;
+			hw_led_bcr |= FHH_BCR_LED_GREEN;
 		break;
 #endif
 
@@ -88,12 +88,12 @@
 	/* direct LED access (must be previously claimed) */
 	case led_green_on:
 		if (led_state & LED_STATE_CLAIMED)
-			hw_led_bcr |= BCR_LED_GREEN;
+			hw_led_bcr |= FHH_BCR_LED_GREEN;
 		break;
 
 	case led_green_off:
 		if (led_state & LED_STATE_CLAIMED)
-			hw_led_bcr &= ~BCR_LED_GREEN;
+			hw_led_bcr &= ~FHH_BCR_LED_GREEN;
 		break;
 
 	case led_amber_on:
@@ -119,7 +119,7 @@
 	if  (led_state & LED_STATE_ENABLED)
 	{
 		/* update LEDs */
-		BCR = BCR_value = (BCR_value & ~BCR_LED_GREEN) | hw_led_bcr;
+		FHH_BCR = flexanet_BCR = (flexanet_BCR & ~FHH_BCR_LED_GREEN) | hw_led_bcr;
 		GPSR = hw_led_gpio;
 		GPCR = hw_led_gpio ^ GPIO_LED_RED;
 	}
diff -Nru linux/arch/arm/mach-sa1100/leds-frodo.c linux-2.4.19-pre5-mjc/arch/arm/mach-sa1100/leds-frodo.c
--- linux/arch/arm/mach-sa1100/leds-frodo.c	Wed Dec 31 19:00:00 1969
+++ linux-2.4.19-pre5-mjc/arch/arm/mach-sa1100/leds-frodo.c	Sat Apr  6 08:25:58 2002
@@ -0,0 +1,121 @@
+
+/*
+ * linux/arch/arm/mach-sa1100/leds-frodo.c
+ *
+ * Author: Abraham van der Merwe <abraham@2d3d.co.za>
+ *
+ * This file contains the 2d3D, Inc. SA-1110 Development Board LED
+ * event handler.
+ *
+ * Frodo LEDs
+ *
+ *   - led6 - toggles state every 50 timer interrupts (Heartbeat)
+ *   - led7 - on if system is not idle (CPU load)
+ */
+
+#include <linux/config.h>
+#include <linux/init.h>
+
+#include <asm/hardware.h>
+#include <asm/leds.h>
+#include <asm/system.h>
+
+#include "leds.h"
+
+#define led6_on() FRODO_CPLD_GENERAL |= FRODO_LED2
+#define led6_off() FRODO_CPLD_GENERAL &= ~FRODO_LED2
+#define led6_invert() do {						\
+		if ((FRODO_CPLD_GENERAL & FRODO_LED2))	\
+			led6_off ();						\
+		else									\
+			led6_on ();							\
+	} while (0)
+
+#define led7_on() FRODO_CPLD_GENERAL |= FRODO_LED1
+#define led7_off() FRODO_CPLD_GENERAL &= ~FRODO_LED1
+#define led7_invert() do {						\
+		if ((FRODO_CPLD_GENERAL & FRODO_LED1))	\
+			led7_off ();						\
+		else									\
+			led7_on ();							\
+	} while (0)
+
+static int claimed;
+
+void frodo_leds_event (led_event_t evt)
+{
+   unsigned long flags;
+
+   local_irq_save (flags);
+
+   switch (evt)
+	 {
+#ifdef CONFIG_LEDS_CPU
+		/* turn off CPU load LED */
+	  case led_idle_start:
+		if (!claimed) led7_off ();
+		break;
+
+		/* turn on CPU load LED */
+	  case led_idle_end:
+		if (!claimed) led7_on ();
+		break;
+#endif
+
+#ifdef CONFIG_LEDS_TIMER
+		/* toggle heartbeat LED */
+	  case led_timer:
+		if (!claimed) led6_invert ();
+		break;
+#endif
+
+		/* start: turn on LEDs and set claimed to 0 */
+	  case led_start:
+		led6_on ();
+		led7_on ();
+		claimed = 0;
+		break;
+
+		/* stop: turn off LEDs */
+	  case led_stop:
+		led6_off ();
+		led7_off ();
+		break;
+
+		/* override CPU load & timer LEDs */
+	  case led_claim:
+		claimed = 1;
+		break;
+
+		/* restore CPU load & timer LEDs */
+	  case led_release:
+		claimed = 0;
+		break;
+
+		/* direct LED access (must be previously claimed) */
+
+		/* led7 */
+	  case led_green_on:
+		if (claimed) led7_on ();
+		break;
+
+	  case led_green_off:
+		if (claimed) led7_off ();
+		break;
+
+		/* led6 -- at the moment this is actually also green */
+	  case led_red_on:
+		if (claimed) led6_on ();
+		break;
+
+	  case led_red_off:
+		if (claimed) led6_off ();
+		break;
+
+	  default:
+		break;
+	}
+
+   local_irq_restore (flags);
+}
+
diff -Nru linux/arch/arm/mach-sa1100/leds-system3.c linux-2.4.19-pre5-mjc/arch/arm/mach-sa1100/leds-system3.c
--- linux/arch/arm/mach-sa1100/leds-system3.c	Wed Dec 31 19:00:00 1969
+++ linux-2.4.19-pre5-mjc/arch/arm/mach-sa1100/leds-system3.c	Sat Apr  6 08:25:58 2002
@@ -0,0 +1,47 @@
+/*
+ * linux/arch/arm/mach-sa1100/leds-system3.c
+ *
+ * Copyright (C) 2001 Stefan Eletzhofer <stefan.eletzhofer@gmx.de>
+ *
+ * Original (leds-footbridge.c) by Russell King
+ *
+ * $Id: leds-system3.c,v 1.1.6.1 2001/12/04 15:19:26 seletz Exp $
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+ *
+ * $Log: leds-system3.c,v $
+ * Revision 1.1.6.1  2001/12/04 15:19:26  seletz
+ * - merged from linux_2_4_13_ac5_rmk2
+ *
+ * Revision 1.1.4.2  2001/11/19 17:58:53  seletz
+ * - cleanup
+ *
+ * Revision 1.1.4.1  2001/11/16 13:49:54  seletz
+ * - dummy LED support for PT Digital Board
+ *
+ * Revision 1.1.2.1  2001/10/15 16:03:39  seletz
+ * - dummy function
+ *
+ *
+ */
+#include <linux/init.h>
+
+#include <asm/hardware.h>
+#include <asm/leds.h>
+#include <asm/system.h>
+
+#include "leds.h"
+
+
+#define LED_STATE_ENABLED	1
+#define LED_STATE_CLAIMED	2
+
+static unsigned int led_state;
+static unsigned int hw_led_state;
+
+void system3_leds_event(led_event_t evt)
+{
+	/* TODO: support LEDs */
+}
diff -Nru linux/arch/arm/mach-sa1100/leds.c linux-2.4.19-pre5-mjc/arch/arm/mach-sa1100/leds.c
--- linux/arch/arm/mach-sa1100/leds.c	Thu Oct 25 16:53:46 2001
+++ linux-2.4.19-pre5-mjc/arch/arm/mach-sa1100/leds.c	Sat Apr  6 08:25:58 2002
@@ -5,7 +5,6 @@
  * 
  * Copyright (C) 2001 Nicolas Pitre
  */
-#include <linux/config.h>
 #include <linux/init.h>
 
 #include <asm/leds.h>
@@ -16,24 +15,30 @@
 static int __init
 sa1100_leds_init(void)
 {
+	if (machine_is_adsbitsy())
+		leds_event = adsbitsy_leds_event;
 	if (machine_is_assabet())
 		leds_event = assabet_leds_event;
+ 	if (machine_is_consus())
+ 	        leds_event = consus_leds_event;
 	if (machine_is_brutus())
 		leds_event = brutus_leds_event;
 	if (machine_is_cerf())
 		leds_event = cerf_leds_event;
 	if (machine_is_flexanet())
 		leds_event = flexanet_leds_event;
+	if (machine_is_frodo())
+		leds_event = frodo_leds_event;
 	if (machine_is_graphicsclient())
 		leds_event = graphicsclient_leds_event;
+	if (machine_is_graphicsmaster())
+		leds_event = graphicsmaster_leds_event;
 	if (machine_is_lart())
 		leds_event = lart_leds_event;
 	if (machine_is_pfs168())
 		leds_event = pfs168_leds_event;
-	if (machine_is_graphicsmaster())
-		leds_event = graphicsmaster_leds_event;
-	if (machine_is_adsbitsy())
-		leds_event = adsbitsy_leds_event;
+	if (machine_is_pt_system3())
+		leds_event = system3_leds_event;
 
 	leds_event(led_start);
 	return 0;
diff -Nru linux/arch/arm/mach-sa1100/leds.h linux-2.4.19-pre5-mjc/arch/arm/mach-sa1100/leds.h
--- linux/arch/arm/mach-sa1100/leds.h	Thu Oct 25 16:53:46 2001
+++ linux-2.4.19-pre5-mjc/arch/arm/mach-sa1100/leds.h	Sat Apr  6 08:25:58 2002
@@ -1,4 +1,5 @@
 extern void assabet_leds_event(led_event_t evt);
+extern void consus_leds_event(led_event_t evt);
 extern void brutus_leds_event(led_event_t evt);
 extern void cerf_leds_event(led_event_t evt);
 extern void flexanet_leds_event(led_event_t evt);
@@ -7,3 +8,5 @@
 extern void pfs168_leds_event(led_event_t evt);
 extern void graphicsmaster_leds_event(led_event_t evt);
 extern void adsbitsy_leds_event(led_event_t evt);
+extern void system3_leds_event(led_event_t evt);
+extern void frodo_leds_event(led_event_t evt);
diff -Nru linux/arch/arm/mach-sa1100/nanoengine.c linux-2.4.19-pre5-mjc/arch/arm/mach-sa1100/nanoengine.c
--- linux/arch/arm/mach-sa1100/nanoengine.c	Sun Aug 12 14:13:59 2001
+++ linux-2.4.19-pre5-mjc/arch/arm/mach-sa1100/nanoengine.c	Sat Apr  6 08:25:58 2002
@@ -34,9 +34,9 @@
 
 static struct map_desc nanoengine_io_desc[] __initdata = {
  /* virtual     physical    length      domain     r  w  c  b */
-  { 0xe8000000, 0x00000000, 0x02000000, DOMAIN_IO, 1, 1, 0, 0 }, /* Flash bank 0 */
-  { 0xf0000000, 0x10000000, 0x00100000, DOMAIN_IO, 1, 1, 0, 0 }, /* System Registers */
-  { 0xf1000000, 0x18A00000, 0x00100000, DOMAIN_IO, 1, 1, 0, 0 }, /* Internal PCI Config Space */
+  { 0xe8000000, 0x00000000, 0x02000000, DOMAIN_IO, 0, 1, 0, 0 }, /* Flash bank 0 */
+  { 0xf0000000, 0x10000000, 0x00100000, DOMAIN_IO, 0, 1, 0, 0 }, /* System Registers */
+  { 0xf1000000, 0x18A00000, 0x00100000, DOMAIN_IO, 0, 1, 0, 0 }, /* Internal PCI Config Space */
   LAST_DESC
 };
 
diff -Nru linux/arch/arm/mach-sa1100/neponset.c linux-2.4.19-pre5-mjc/arch/arm/mach-sa1100/neponset.c
--- linux/arch/arm/mach-sa1100/neponset.c	Thu Oct 25 16:53:46 2001
+++ linux-2.4.19-pre5-mjc/arch/arm/mach-sa1100/neponset.c	Sat Apr  6 08:25:58 2002
@@ -7,6 +7,8 @@
 #include <linux/sched.h>
 #include <linux/interrupt.h>
 #include <linux/ptrace.h>
+#include <linux/tty.h>
+#include <linux/ioport.h>
 #include <linux/serial_core.h>
 
 #include <asm/hardware.h>
@@ -16,6 +18,7 @@
 #include <asm/arch/irq.h>
 #include <asm/mach/serial_sa1100.h>
 #include <asm/arch/assabet.h>
+#include <asm/hardware/sa1111.h>
 
 #include "sa1111.h"
 
@@ -40,10 +43,10 @@
 		if (!irr) break;
 
 		if( irr & IRR_ETHERNET )
-			do_IRQ(NEPONSET_ETHERNET_IRQ, regs);
+			do_IRQ(IRQ_NEPONSET_SMC9196, regs);
 
 		if( irr & IRR_USAR )
-			do_IRQ(NEPONSET_USAR_IRQ, regs);
+			do_IRQ(IRQ_NEPONSET_USAR, regs);
 
 		if( irr & IRR_SA1111 )
 			sa1111_IRQ_demux(irq, dev_id, regs);
@@ -58,19 +61,16 @@
 
 static void __init neponset_init_irq(void)
 {
-	int irq;
-
 	sa1111_init_irq(-1);	/* SA1111 IRQ not routed to a GPIO */
 
 	/* setup extra Neponset IRQs */
-	irq = NEPONSET_ETHERNET_IRQ;
-	irq_desc[irq].valid	= 1;
-	irq_desc[irq].probe_ok	= 1;
-	irq = NEPONSET_USAR_IRQ;
-	irq_desc[irq].valid	= 1;
-	irq_desc[irq].probe_ok	= 1;
-	set_GPIO_IRQ_edge(ASSABET_GPIO_NEP_IRQ, GPIO_RISING_EDGE);
-	setup_arm_irq(ASSABET_IRQ_GPIO_NEP_IRQ, &neponset_irq);
+	irq_desc[IRQ_NEPONSET_SMC9196].valid	= 1;
+	irq_desc[IRQ_NEPONSET_SMC9196].probe_ok	= 1;
+	irq_desc[IRQ_NEPONSET_USAR].valid	= 1;
+	irq_desc[IRQ_NEPONSET_USAR].probe_ok	= 1;
+
+	set_GPIO_IRQ_edge(GPIO_GPIO25, GPIO_RISING_EDGE);
+	setup_arm_irq(IRQ_GPIO25, &neponset_irq);
 }
 
 static int __init neponset_init(void)
@@ -102,6 +102,11 @@
 	}
 
 	/*
+	 * Disable GPIO 0/1 drivers so the buttons work on the module.
+	 */
+	NCR_0 |= NCR_GP01_OFF;
+
+	/*
 	 * Neponset has SA1111 connected to CS4.  We know that after
 	 * reset the chip will be configured for variable latency IO.
 	 */
@@ -110,7 +115,7 @@
 	/*
 	 * Probe for a SA1111.
 	 */
-	ret = sa1111_probe();
+	ret = sa1111_probe(NEPONSET_SA1111_BASE);
 	if (ret < 0)
 		return ret;
 
@@ -150,8 +155,8 @@
 
 static struct map_desc neponset_io_desc[] __initdata = {
  /* virtual     physical    length      domain     r  w  c  b */
-  { 0xf3000000, 0x10000000, 0x00100000, DOMAIN_IO, 1, 1, 0, 0 }, /* System Registers */
-  { 0xf4000000, 0x40000000, 0x00100000, DOMAIN_IO, 1, 1, 0, 0 }, /* SA-1111 */
+  { 0xf3000000, 0x10000000, 0x00100000, DOMAIN_IO, 0, 1, 0, 0 }, /* System Registers */
+  { 0xf4000000, 0x40000000, 0x00100000, DOMAIN_IO, 0, 1, 0, 0 }, /* SA-1111 */
   LAST_DESC
 };
 
@@ -184,7 +189,7 @@
 	MDM_CTL_0 = mdm_ctl0;
 }
 
-static int neponset_get_mctrl(struct uart_port *port)
+static u_int neponset_get_mctrl(struct uart_port *port)
 {
 	u_int ret = TIOCM_CD | TIOCM_CTS | TIOCM_DSR;
 	u_int mdm_ctl1 = MDM_CTL_1;
diff -Nru linux/arch/arm/mach-sa1100/omnimeter.c linux-2.4.19-pre5-mjc/arch/arm/mach-sa1100/omnimeter.c
--- linux/arch/arm/mach-sa1100/omnimeter.c	Sun Aug 12 14:13:59 2001
+++ linux-2.4.19-pre5-mjc/arch/arm/mach-sa1100/omnimeter.c	Sat Apr  6 08:25:58 2002
@@ -30,7 +30,7 @@
 
 static struct map_desc omnimeter_io_desc[] __initdata = {
  /* virtual     physical    length      domain     r  w  c  b */
-  { 0xd2000000, 0x10000000, 0x02000000, DOMAIN_IO, 1, 1, 0, 0 }, /* TS */
+  { 0xd2000000, 0x10000000, 0x02000000, DOMAIN_IO, 0, 1, 0, 0 }, /* TS */
   LAST_DESC
 };
 
diff -Nru linux/arch/arm/mach-sa1100/pangolin.c linux-2.4.19-pre5-mjc/arch/arm/mach-sa1100/pangolin.c
--- linux/arch/arm/mach-sa1100/pangolin.c	Thu Oct 11 12:04:57 2001
+++ linux-2.4.19-pre5-mjc/arch/arm/mach-sa1100/pangolin.c	Sat Apr  6 08:25:58 2002
@@ -1,7 +1,7 @@
 /*
  * linux/arch/arm/mach-sa1100/pangolin.c
  */
-
+#include <linux/config.h>
 #include <linux/init.h>
 #include <linux/kernel.h>
 #include <linux/tty.h>
@@ -30,8 +30,8 @@
 
 static struct map_desc pangolin_io_desc[] __initdata = {
  /* virtual     physical    length      domain     r  w  c  b */
-  { 0xe8000000, 0x00000000, 0x04000000, DOMAIN_IO, 1, 1, 0, 0 }, /* Flash bank 0 */
-  { 0xf2800000, 0x4b800000, 0x00800000, DOMAIN_IO, 1, 1, 0, 0 }, /* MQ200 */
+  { 0xe8000000, 0x00000000, 0x04000000, DOMAIN_IO, 0, 1, 0, 0 }, /* Flash bank 0 */
+  { 0xf2800000, 0x4b800000, 0x00800000, DOMAIN_IO, 0, 1, 0, 0 }, /* MQ200 */
   LAST_DESC
 };
 
@@ -43,6 +43,12 @@
 	sa1100_register_uart(0, 1);
 	sa1100_register_uart(1, 3);
 	Ser1SDCR0 |= SDCR0_UART;
+
+	/* set some GPDR bits while it's safe */
+	GPDR |= GPIO_PCMCIA_RESET;
+#ifndef CONFIG_SA1100_PANGOLIN_PCMCIA_IDE
+	GPDR |= GPIO_PCMCIA_BUS_ON;
+#endif
 }
 
 MACHINE_START(PANGOLIN, "Dialogue-Pangolin")
diff -Nru linux/arch/arm/mach-sa1100/pfs168.c linux-2.4.19-pre5-mjc/arch/arm/mach-sa1100/pfs168.c
--- linux/arch/arm/mach-sa1100/pfs168.c	Thu Oct 11 12:04:57 2001
+++ linux-2.4.19-pre5-mjc/arch/arm/mach-sa1100/pfs168.c	Sat Apr  6 08:25:58 2002
@@ -1,7 +1,7 @@
 /*
  * linux/arch/arm/mach-sa1100/pfs168.c
  */
-
+#include <linux/config.h>
 #include <linux/init.h>
 #include <linux/kernel.h>
 #include <linux/tty.h>
@@ -34,7 +34,7 @@
 	/*
 	 * Probe for SA1111.
 	 */
-	ret = sa1111_probe();
+	ret = sa1111_probe(PFS168_SA1111_BASE);
 	if (ret < 0)
 		return ret;
 
@@ -65,8 +65,7 @@
 	 */
 	sa1110_mb_enable();
 
-	set_GPIO_IRQ_edge(GPIO_GPIO(25), GPIO_RISING_EDGE);
-	sa1111_init_irq(SA1100_GPIO_TO_IRQ(25));	/* SA1111 IRQ on GPIO 25 */
+	sa1111_init_irq(IRQ_GPIO25);	/* SA1111 IRQ on GPIO 25 */
 
 	return 0;
 }
@@ -84,6 +83,8 @@
 	 */
 	set_GPIO_IRQ_edge(GPIO_GPIO(19), GPIO_RISING_EDGE);
 	set_GPIO_IRQ_edge(GPIO_GPIO(20), GPIO_RISING_EDGE);
+	set_GPIO_IRQ_edge(GPIO_GPIO(25), GPIO_RISING_EDGE);
+	set_GPIO_IRQ_edge(GPIO_UCB1300_IRQ, GPIO_RISING_EDGE);
 }
 
 
@@ -101,20 +102,20 @@
 
 static struct map_desc pfs168_io_desc[] __initdata = {
  /* virtual     physical    length      domain     r  w  c  b */
-  { 0xe8000000, 0x00000000, 0x02000000, DOMAIN_IO, 1, 1, 0, 0 }, /* Flash bank 0 */
-  { 0xf0000000, 0x10000000, 0x00001000, DOMAIN_IO, 1, 1, 0, 0 }, /* 16C752 DUART port A (COM5) */
-  { 0xf0001000, 0x10800000, 0x00001000, DOMAIN_IO, 1, 1, 0, 0 }, /* 16C752 DUART port B (COM6) */
-  { 0xf0002000, 0x11000000, 0x00001000, DOMAIN_IO, 1, 1, 0, 0 }, /* COM1 RTS control (SYSC1RTS) */
-  { 0xf0003000, 0x11400000, 0x00001000, DOMAIN_IO, 1, 1, 0, 0 }, /* Status LED control (SYSLED) */
-  { 0xf0004000, 0x11800000, 0x00001000, DOMAIN_IO, 1, 1, 0, 0 }, /* DTMF code read (SYSDTMF) */
-  { 0xf0005000, 0x11c00000, 0x00001000, DOMAIN_IO, 1, 1, 0, 0 }, /* LCD configure, enable (SYSLCDDE) */
-  { 0xf0006000, 0x12000000, 0x00001000, DOMAIN_IO, 1, 1, 0, 0 }, /* COM1 DSR and motion sense (SYSC1DSR) */
-  { 0xf0007000, 0x12800000, 0x00001000, DOMAIN_IO, 1, 1, 0, 0 }, /* COM3 xmit enable (SYSC3TEN) */
-  { 0xf0008000, 0x13000000, 0x00001000, DOMAIN_IO, 1, 1, 0, 0 }, /* Control register A (SYSCTLA) */
-  { 0xf0009000, 0x13800000, 0x00001000, DOMAIN_IO, 1, 1, 0, 0 }, /* Control register B (SYSCTLB) */
-  { 0xf000a000, 0x18000000, 0x00001000, DOMAIN_IO, 1, 1, 0, 0 }, /* SMC91C96 */
-  { 0xf2800000, 0x4b800000, 0x00800000, DOMAIN_IO, 1, 1, 0, 0 }, /* MQ200 */
-  { 0xf4000000, 0x40000000, 0x00100000, DOMAIN_IO, 1, 1, 0, 0 }, /* SA-1111 */
+  { 0xe8000000, 0x00000000, 0x02000000, DOMAIN_IO, 0, 1, 0, 0 }, /* Flash bank 0 */
+  { 0xf0000000, 0x10000000, 0x00001000, DOMAIN_IO, 0, 1, 0, 0 }, /* 16C752 DUART port A (COM5) */
+  { 0xf0001000, 0x10800000, 0x00001000, DOMAIN_IO, 0, 1, 0, 0 }, /* 16C752 DUART port B (COM6) */
+  { 0xf0002000, 0x11000000, 0x00001000, DOMAIN_IO, 0, 1, 0, 0 }, /* COM1 RTS control (SYSC1RTS) */
+  { 0xf0003000, 0x11400000, 0x00001000, DOMAIN_IO, 0, 1, 0, 0 }, /* Status LED control (SYSLED) */
+  { 0xf0004000, 0x11800000, 0x00001000, DOMAIN_IO, 0, 1, 0, 0 }, /* DTMF code read (SYSDTMF) */
+  { 0xf0005000, 0x11c00000, 0x00001000, DOMAIN_IO, 0, 1, 0, 0 }, /* LCD configure, enable (SYSLCDDE) */
+  { 0xf0006000, 0x12000000, 0x00001000, DOMAIN_IO, 0, 1, 0, 0 }, /* COM1 DSR and motion sense (SYSC1DSR) */
+  { 0xf0007000, 0x12800000, 0x00001000, DOMAIN_IO, 0, 1, 0, 0 }, /* COM3 xmit enable (SYSC3TEN) */
+  { 0xf0008000, 0x13000000, 0x00001000, DOMAIN_IO, 0, 1, 0, 0 }, /* Control register A (SYSCTLA) */
+  { 0xf0009000, 0x13800000, 0x00001000, DOMAIN_IO, 0, 1, 0, 0 }, /* Control register B (SYSCTLB) */
+  { 0xf000a000, 0x18000000, 0x00001000, DOMAIN_IO, 0, 1, 0, 0 }, /* SMC91C96 */
+  { 0xf2800000, 0x4b800000, 0x00800000, DOMAIN_IO, 0, 1, 0, 0 }, /* MQ200 */
+  { 0xf4000000, 0x40000000, 0x00100000, DOMAIN_IO, 0, 1, 0, 0 }, /* SA-1111 */
   LAST_DESC
 };
 
diff -Nru linux/arch/arm/mach-sa1100/pleb.c linux-2.4.19-pre5-mjc/arch/arm/mach-sa1100/pleb.c
--- linux/arch/arm/mach-sa1100/pleb.c	Sun Aug 12 20:36:24 2001
+++ linux-2.4.19-pre5-mjc/arch/arm/mach-sa1100/pleb.c	Sat Apr  6 08:25:58 2002
@@ -35,8 +35,8 @@
 
 static struct map_desc pleb_io_desc[] __initdata = {
  /* virtual     physical    length      domain     r  w  c  b */
-  { 0xe8000000, 0x00000000, 0x00400000, DOMAIN_IO, 1, 1, 0, 0 }, /* main flash memory */
-  { 0xe8400000, 0x08000000, 0x00400000, DOMAIN_IO, 1, 1, 0, 0 }, /* main flash, alternative location */
+  { 0xe8000000, 0x00000000, 0x00400000, DOMAIN_IO, 0, 1, 0, 0 }, /* main flash memory */
+  { 0xe8400000, 0x08000000, 0x00400000, DOMAIN_IO, 0, 1, 0, 0 }, /* main flash, alternative location */
   LAST_DESC
 };
 
diff -Nru linux/arch/arm/mach-sa1100/pm.c linux-2.4.19-pre5-mjc/arch/arm/mach-sa1100/pm.c
--- linux/arch/arm/mach-sa1100/pm.c	Thu Oct 25 16:53:46 2001
+++ linux-2.4.19-pre5-mjc/arch/arm/mach-sa1100/pm.c	Sat Apr  6 08:25:58 2002
@@ -19,30 +19,27 @@
  * 			Cleaned up, pushed platform dependent stuff
  * 			in the platform specific files.
  */
-
-/*
- * Debug macros
- */
-#define DEBUG 1
-#ifdef DEBUG
-#  define DPRINTK(fmt, args...)	printk("%s: " fmt, __FUNCTION__ , ## args)
-#else
-#  define DPRINTK(fmt, args...)
-#endif
-
-
+#include <linux/config.h>
 #include <linux/init.h>
 #include <linux/pm.h>
 #include <linux/slab.h>
+#include <linux/sched.h>
+#include <linux/interrupt.h>
 #include <linux/sysctl.h>
-#include <linux/acpi.h>
+#include <linux/errno.h>
 
 #include <asm/hardware.h>
 #include <asm/memory.h>
 #include <asm/system.h>
+#include <asm/leds.h>
 
 #include "sleep.h"
 
+/*
+ * Debug macros
+ */
+#undef DEBUG
+
 extern void sa1100_cpu_suspend(void);
 extern void sa1100_cpu_resume(void);
 
@@ -54,22 +51,17 @@
 
 int pm_do_suspend(void)
 {
-	int retval;
-
 	/* set up pointer to sleep parameters */
-	sleep_save = kmalloc (SLEEP_SAVE_SIZE*sizeof(long), GFP_ATOMIC);
+	sleep_save = kmalloc(SLEEP_SAVE_SIZE*sizeof(long), GFP_ATOMIC);
 	if (!sleep_save)
 		return -ENOMEM;
-	sleep_save_p = virt_to_phys(sleep_save);
 
-	retval = pm_send_all(PM_SUSPEND, (void *)2);
-	if (retval) {
-		kfree(sleep_save);
-		return retval;
-	}
+	sleep_save_p = virt_to_phys(sleep_save);
 
 	cli();
 
+	leds_event(led_stop);
+
 	/* preserve current time */
 	RCNR = xtime.tv_sec;
 
@@ -112,7 +104,9 @@
 	/* ensure not to come back here if it wasn't intended */
 	PSPR = 0;
 
-	DPRINTK("*** made it back from resume\n");
+#ifdef DEBUG
+	printk(KERN_DEBUG "*** made it back from resume\n");
+#endif
 
 	/* restore registers */
 	RESTORE(GPDR);
@@ -146,21 +140,55 @@
 	/* restore current time */
 	xtime.tv_sec = RCNR;
 
+	leds_event(led_start);
+
 	sti();
 
 	kfree (sleep_save);
 
-	retval = pm_send_all(PM_RESUME, (void *)0);
-	if (retval)
-		return retval;
+	/*
+	 * Restore the CPU frequency settings.
+	 */
+#ifdef CONFIG_CPU_FREQ
+	cpufreq_restore();
+#endif
 
 	return 0;
 }
 
+#ifdef CONFIG_SYSCTL
+/*
+ * ARGH!  ACPI people defined CTL_ACPI in linux/acpi.h rather than
+ * linux/sysctl.h.
+ *
+ * This means our interface here won't survive long - it needs a new
+ * interface.  Quick hack to get this working - use sysctl id 9999.
+ */
+#warning ACPI broke the kernel, this interface needs to be fixed up.
+#define CTL_ACPI 9999
+#define ACPI_S1_SLP_TYP 19
+
+/*
+ * Send us to sleep.
+ */
+static int sysctl_pm_do_suspend(void)
+{
+	int retval;
+
+	retval = pm_send_all(PM_SUSPEND, (void *)3);
+
+	if (retval == 0) {
+		retval = pm_do_suspend();
+
+		pm_send_all(PM_RESUME, (void *)0);
+	}
+
+	return retval;
+}
 
 static struct ctl_table pm_table[] =
 {
-	{ACPI_S1_SLP_TYP, "suspend", NULL, 0, 0600, NULL, (proc_handler *)&pm_do_suspend},
+	{ACPI_S1_SLP_TYP, "suspend", NULL, 0, 0600, NULL, (proc_handler *)&sysctl_pm_do_suspend},
 	{0}
 };
 
@@ -181,3 +209,4 @@
 
 __initcall(pm_init);
 
+#endif
diff -Nru linux/arch/arm/mach-sa1100/sa1111-pcibuf.c linux-2.4.19-pre5-mjc/arch/arm/mach-sa1100/sa1111-pcibuf.c
--- linux/arch/arm/mach-sa1100/sa1111-pcibuf.c	Thu Oct 11 12:04:57 2001
+++ linux-2.4.19-pre5-mjc/arch/arm/mach-sa1100/sa1111-pcibuf.c	Sat Apr  6 08:25:58 2002
@@ -13,7 +13,6 @@
  *
  *  06/13/2001 - created.
  */
-#include <linux/config.h>
 #include <linux/module.h>
 #include <linux/init.h>
 #include <linux/slab.h>
diff -Nru linux/arch/arm/mach-sa1100/sa1111.c linux-2.4.19-pre5-mjc/arch/arm/mach-sa1100/sa1111.c
--- linux/arch/arm/mach-sa1100/sa1111.c	Thu Oct 11 12:04:57 2001
+++ linux-2.4.19-pre5-mjc/arch/arm/mach-sa1100/sa1111.c	Sat Apr  6 08:25:58 2002
@@ -15,6 +15,7 @@
  * All initialization functions provided here are intended to be called
  * from machine specific code with proper arguments when required.
  */
+#include <linux/module.h>
 #include <linux/init.h>
 #include <linux/kernel.h>
 #include <linux/delay.h>
@@ -22,57 +23,80 @@
 #include <linux/interrupt.h>
 #include <linux/ptrace.h>
 #include <linux/errno.h>
+#include <linux/ioport.h>
 
 #include <asm/hardware.h>
 #include <asm/irq.h>
 #include <asm/mach/irq.h>
 #include <asm/arch/irq.h>
 
+#include <asm/hardware/sa1111.h>
+
 #include "sa1111.h"
 
+struct resource sa1111_resource = {
+	name:	"SA1111",
+};
+
+EXPORT_SYMBOL(sa1111_resource);
+
 /*
- * SA1111  Interrupt support
+ * SA1111 interrupt support
  */
-
-void sa1111_IRQ_demux( int irq, void *dev_id, struct pt_regs *regs )
+void sa1111_IRQ_demux(int irq, void *dev_id, struct pt_regs *regs)
 {
-	int i;
 	unsigned long stat0, stat1;
 
-	for(;;) {
-		stat0 = INTSTATCLR0, stat1 = INTSTATCLR1;
-		if( !stat0 && !stat1 ) break;
-		if( stat0 )
-			for( i = 0; i < 32; i++ )
-				if( stat0 & (1<<i) )
-					do_IRQ( SA1111_IRQ(i), regs );
-
-		if( stat1 )
-			for( i = 32; i < 55; i++ )
-				if( stat1 & (1<<(i-32)) )
-					do_IRQ( SA1111_IRQ(i), regs );
+	while (1) {
+		int i;
+
+		stat0 = INTSTATCLR0;
+		stat1 = INTSTATCLR1;
+
+		if (stat0 == 0 && stat1 == 0)
+			break;
+
+		for (i = IRQ_SA1111_START; stat0; i++, stat0 >>= 1)
+			if (stat0 & 1)
+				do_IRQ(i, regs);
+
+		for (i = IRQ_SA1111_START + 32; stat1; i++, stat1 >>= 1)
+			if (stat1 & 1)
+				do_IRQ(i, regs);
 	}
 }
 
-static struct irqaction sa1111_irq = {
-	name:		"SA1111",
-	handler:	sa1111_IRQ_demux,
-	flags:		SA_INTERRUPT
-};
+#define SA1111_IRQMASK_LO(x)	(1 << (x - IRQ_SA1111_START))
+#define SA1111_IRQMASK_HI(x)	(1 << (x - IRQ_SA1111_START - 32))
 
+/*
+ * A note about masking IRQs:
+ *
+ * The GPIO IRQ edge detection only functions while the IRQ itself is
+ * enabled; edges are not detected while the IRQ is disabled.
+ *
+ * This is especially important for the PCMCIA signals, where we must
+ * pick up every transition.  We therefore do not disable the IRQs
+ * while processing them.
+ *
+ * However, since we are changed to a GPIO on the host processor,
+ * all SA1111 IRQs will be disabled while we're processing any SA1111
+ * IRQ.
+ *
+ * Note also that changing INTPOL while an IRQ is enabled will itself
+ * trigger an IRQ.
+ */
 static void sa1111_mask_and_ack_lowirq(unsigned int irq)
 {
-	unsigned int mask = 1 << (irq - SA1111_IRQ(0));
+	unsigned int mask = SA1111_IRQMASK_LO(irq);
 
-	// broken hardware: interrupt events are lost if they occur
-	// while the interrupts are disabled.
 	//INTEN0 &= ~mask;
 	INTSTATCLR0 = mask;
 }
 
 static void sa1111_mask_and_ack_highirq(unsigned int irq)
 {
-	unsigned int mask = 1 << (irq - SA1111_IRQ(32));
+	unsigned int mask = SA1111_IRQMASK_HI(irq);
 
 	//INTEN1 &= ~mask;
 	INTSTATCLR1 = mask;
@@ -80,27 +104,29 @@
 
 static void sa1111_mask_lowirq(unsigned int irq)
 {
-	//INTEN0 &= ~(1 << (irq - SA1111_IRQ(0)));
+	INTEN0 &= ~SA1111_IRQMASK_LO(irq);
 }
 
 static void sa1111_mask_highirq(unsigned int irq)
 {
-	//INTEN1 &= ~(1 << (irq - SA1111_IRQ(32)));
+	INTEN1 &= ~SA1111_IRQMASK_HI(irq);
 }
 
 static void sa1111_unmask_lowirq(unsigned int irq)
 {
-	INTEN0 |= 1 << (irq - SA1111_IRQ(0));
+	INTEN0 |= SA1111_IRQMASK_LO(irq);
 }
 
 static void sa1111_unmask_highirq(unsigned int irq)
 {
-	INTEN1 |= 1 << ((irq - SA1111_IRQ(32)));
+	INTEN1 |= SA1111_IRQMASK_HI(irq);
 }
 
 void __init sa1111_init_irq(int irq_nr)
 {
-	int irq;
+	int irq, ret;
+
+	request_mem_region(_INTTEST0, 512, "irqs");
 
 	/* disable all IRQs */
 	INTEN0 = 0;
@@ -111,21 +137,21 @@
 	 * specifies that S0ReadyInt and S1ReadyInt should be '1'.
 	 */
 	INTPOL0 = 0;
-	INTPOL1 = 1 << (S0_READY_NINT - SA1111_IRQ(32)) |
-		  1 << (S1_READY_NINT - SA1111_IRQ(32));
+	INTPOL1 = SA1111_IRQMASK_HI(S0_READY_NINT) |
+		  SA1111_IRQMASK_HI(S1_READY_NINT);
 
 	/* clear all IRQs */
 	INTSTATCLR0 = -1;
 	INTSTATCLR1 = -1;
 
-	for (irq = SA1111_IRQ(0); irq <= SA1111_IRQ(26); irq++) {
+	for (irq = IRQ_GPAIN0; irq <= SSPROR; irq++) {
 		irq_desc[irq].valid	= 1;
 		irq_desc[irq].probe_ok	= 0;
 		irq_desc[irq].mask_ack	= sa1111_mask_and_ack_lowirq;
 		irq_desc[irq].mask	= sa1111_mask_lowirq;
 		irq_desc[irq].unmask	= sa1111_unmask_lowirq;
 	}
-	for (irq = SA1111_IRQ(32); irq <= SA1111_IRQ(54); irq++) {
+	for (irq = AUDXMTDMADONEA; irq <= S1_BVD1_STSCHG; irq++) {
 		irq_desc[irq].valid	= 1;
 		irq_desc[irq].probe_ok	= 0;
 		irq_desc[irq].mask_ack	= sa1111_mask_and_ack_highirq;
@@ -134,28 +160,60 @@
 	}
 
 	/* Register SA1111 interrupt */
-	if (irq_nr >= 0)
-		setup_arm_irq(irq_nr, &sa1111_irq);
+	if (irq_nr < 0)
+		return;
+
+	ret = request_irq(irq_nr, sa1111_IRQ_demux, SA_INTERRUPT,
+			  "SA1111", NULL);
+	if (ret < 0)
+		printk(KERN_ERR "SA1111: unable to claim IRQ%d: %d\n",
+		       irq_nr, ret);
 }
 
-/*
- * Probe for a SA1111 chip.
+/**
+ *	sa1111_probe - probe for a single SA1111 chip.
+ *	@phys_addr: physical address of device.
+ *
+ *	Probe for a SA1111 chip.  This must be called
+ *	before any other SA1111-specific code.
+ *
+ *	Returns:
+ *	%-ENODEV	device not found.
+ *	%-EBUSY		physical address already marked in-use.
+ *	%0		successful.
  */
-
-int __init sa1111_probe(void)
+int __init sa1111_probe(unsigned long phys_addr)
 {
-	unsigned long id = SBI_SKID;
+	unsigned long id;
 	int ret = -ENODEV;
 
-	if ((id & SKID_ID_MASK) == SKID_SA1111_ID) {
-		printk(KERN_INFO "SA-1111 Microprocessor Companion Chip: "
-			"silicon revision %lx, metal revision %lx\n",
-			(id & SKID_SIREV_MASK)>>4, (id & SKID_MTREV_MASK));
-		ret = 0;
-	} else {
-		printk(KERN_DEBUG "SA-1111 not detected: ID = %08lx\n", id);
+	sa1111_resource.start = phys_addr;
+	sa1111_resource.end = phys_addr + 0x2000;
+
+	if (request_resource(&iomem_resource, &sa1111_resource)) {
+		ret = -EBUSY;
+		goto out;
+	}
+
+	/*
+	 * Probe for the chip.  Only touch the SBI registers.
+	 */
+	id = SBI_SKID;
+	if ((id & SKID_ID_MASK) != SKID_SA1111_ID) {
+		printk(KERN_DEBUG "SA1111 not detected: ID = %08lx\n", id);
+		ret = -ENODEV;
+		goto release;
 	}
 
+	printk(KERN_INFO "SA1111 Microprocessor Companion Chip: "
+		"silicon revision %lx, metal revision %lx\n",
+		(id & SKID_SIREV_MASK)>>4, (id & SKID_MTREV_MASK));
+
+	return 0;
+
+ release:
+	release_resource(&sa1111_resource);
+ out:
 	return ret;
 }
 
@@ -175,6 +233,10 @@
  */
 void sa1111_wake(void)
 {
+	unsigned long flags;
+
+	local_irq_save(flags);
+
 	/*
 	 * First, set up the 3.6864MHz clock on GPIO 27 for the SA-1111:
 	 * (SA-1110 Developer's Manual, section 9.1.2.1)
@@ -210,6 +272,8 @@
 	 * Ensure all clocks are initially off.
 	 */
 	SKPCR = 0;
+
+	local_irq_restore(flags);
 }
 
 void sa1111_doze(void)
@@ -242,12 +306,17 @@
  */
 void __init sa1110_mb_disable(void)
 {
+	unsigned long flags;
+
+	local_irq_save(flags);
+	
 	PGSR &= ~GPIO_MBGNT;
 	GPCR = GPIO_MBGNT;
 	GPDR = (GPDR & ~GPIO_MBREQ) | GPIO_MBGNT;
 
 	GAFR &= ~(GPIO_MBGNT | GPIO_MBREQ);
 
+	local_irq_restore(flags);
 }
 
 /*
@@ -256,10 +325,19 @@
  */
 void __init sa1110_mb_enable(void)
 {
+	unsigned long flags;
+
+	local_irq_save(flags);
+
 	PGSR &= ~GPIO_MBGNT;
 	GPCR = GPIO_MBGNT;
 	GPDR = (GPDR & ~GPIO_MBREQ) | GPIO_MBGNT;
 
 	GAFR |= (GPIO_MBGNT | GPIO_MBREQ);
 	TUCR |= TUCR_MR;
+
+	local_irq_restore(flags);
 }
+
+EXPORT_SYMBOL(sa1111_wake);
+EXPORT_SYMBOL(sa1111_doze);
diff -Nru linux/arch/arm/mach-sa1100/sa1111.h linux-2.4.19-pre5-mjc/arch/arm/mach-sa1100/sa1111.h
--- linux/arch/arm/mach-sa1100/sa1111.h	Thu Oct 11 12:04:57 2001
+++ linux-2.4.19-pre5-mjc/arch/arm/mach-sa1100/sa1111.h	Sat Apr  6 08:25:58 2002
@@ -11,7 +11,7 @@
 /*
  * Probe for a SA1111 chip.
  */
-extern int sa1111_probe(void);
+extern int sa1111_probe(unsigned long phys);
 
 /*
  * Wake up a SA1111 chip.
@@ -30,5 +30,5 @@
 
 
 extern void sa1111_init_irq(int irq_nr);
-extern void sa1111_IRQ_demux( int irq, void *dev_id, struct pt_regs *regs );
+extern void sa1111_IRQ_demux(int irq, void *dev_id, struct pt_regs *regs);
 
diff -Nru linux/arch/arm/mach-sa1100/shannon.c linux-2.4.19-pre5-mjc/arch/arm/mach-sa1100/shannon.c
--- linux/arch/arm/mach-sa1100/shannon.c	Wed Dec 31 19:00:00 1969
+++ linux-2.4.19-pre5-mjc/arch/arm/mach-sa1100/shannon.c	Sat Apr  6 08:25:58 2002
@@ -0,0 +1,47 @@
+/*
+ * linux/arch/arm/mach-sa1100/shannon.c
+ */
+
+#include <linux/init.h>
+#include <linux/kernel.h>
+#include <linux/tty.h>
+
+#include <asm/hardware.h>
+#include <asm/setup.h>
+#include <asm/irq.h>
+
+#include <asm/mach/arch.h>
+#include <asm/mach/map.h>
+#include <asm/mach/serial_sa1100.h>
+
+#include "generic.h"
+
+
+static struct map_desc shannon_io_desc[] __initdata = {
+ /* virtual     physical    length      domain     r  w  c  b */
+  { 0xe8000000, 0x00000000, 0x00400000, DOMAIN_IO, 0, 1, 0, 0 }, /* main flash memory */
+  LAST_DESC
+};
+
+static void __init shannon_map_io(void)
+{
+	sa1100_map_io();
+	iotable_init(shannon_io_desc);
+
+	sa1100_register_uart(0, 3);
+	sa1100_register_uart(1, 1);
+	Ser1SDCR0 |= SDCR0_SUS;
+	GAFR |= (GPIO_UART_TXD | GPIO_UART_RXD);
+	GPDR |= GPIO_UART_TXD;
+	GPDR &= ~GPIO_UART_RXD;
+	PPAR |= PPAR_UPR;
+
+	set_GPIO_IRQ_edge(SHANNON_GPIO_IRQ_CODEC);
+}
+
+MACHINE_START(SHANNON, "Shannon (AKA: Tuxscreen)")
+	BOOT_MEM(0xc0000000, 0x80000000, 0xf8000000)
+	BOOT_PARAMS(0xc0000100)
+	MAPIO(shannon_map_io)
+	INITIRQ(sa1100_init_irq)
+MACHINE_END
diff -Nru linux/arch/arm/mach-sa1100/sherman.c linux-2.4.19-pre5-mjc/arch/arm/mach-sa1100/sherman.c
--- linux/arch/arm/mach-sa1100/sherman.c	Sun Aug 12 20:36:24 2001
+++ linux-2.4.19-pre5-mjc/arch/arm/mach-sa1100/sherman.c	Sat Apr  6 08:25:58 2002
@@ -31,7 +31,7 @@
 
 static struct map_desc sherman_io_desc[] __initdata = {
  /* virtual     physical    length      domain     r  w  c  b */
-  { 0xe8000000, 0x00000000, 0x02000000, DOMAIN_IO, 1, 1, 0, 0 }, /* Flash*/
+  { 0xe8000000, 0x00000000, 0x02000000, DOMAIN_IO, 0, 1, 0, 0 }, /* Flash*/
   LAST_DESC
 };
 
diff -Nru linux/arch/arm/mach-sa1100/simpad.c linux-2.4.19-pre5-mjc/arch/arm/mach-sa1100/simpad.c
--- linux/arch/arm/mach-sa1100/simpad.c	Thu Oct 25 16:53:46 2001
+++ linux-2.4.19-pre5-mjc/arch/arm/mach-sa1100/simpad.c	Sat Apr  6 08:25:58 2002
@@ -23,18 +23,6 @@
 
 long cs3_shadow;
 
-static int __init simpad_init(void)
-{
-	PSPR = 0xc0008000;
-	GPDR &= ~GPIO_GPIO0;
-	cs3_shadow = (EN1 | EN0 | LED2_ON | DISPLAY_ON | RS232_ON | 
-		      ENABLE_5V | RESET_SIMCARD);
-	*(CS3BUSTYPE *)(CS3_BASE) = cs3_shadow;
-	return 0;
-}
-
-__initcall(simpad_init);
-
 long get_cs3_shadow()
 {
 	return cs3_shadow;
@@ -70,8 +58,8 @@
 
 static struct map_desc simpad_io_desc[] __initdata = {
   /* virtual	physical    length	domain	   r  w  c  b */
-  { 0xe8000000, 0x00000000, 0x02000000, DOMAIN_IO, 1, 1, 0, 0 }, 
-  { 0xf2800000, 0x4b800000, 0x00800000, DOMAIN_IO, 1, 1, 0, 0 }, /* MQ200 */  
+  { 0xe8000000, 0x00000000, 0x02000000, DOMAIN_IO, 0, 1, 0, 0 }, 
+  { 0xf2800000, 0x4b800000, 0x00800000, DOMAIN_IO, 0, 1, 0, 0 }, /* MQ200 */  
   { 0xf1000000, 0x18000000, 0x00100000, DOMAIN_IO, 0, 1, 0, 0 }, /* Paules CS3, write only */
   LAST_DESC
 };
@@ -96,11 +84,17 @@
 	sa1100_map_io();
 	iotable_init(simpad_io_desc);
 
-#ifndef CONFIG_SERIAL_SA1100_OLD
+	PSPR = 0xc0008000;
+	GPDR &= ~GPIO_GPIO0;
+	cs3_shadow = (EN1 | EN0 | LED2_ON | DISPLAY_ON | RS232_ON | 
+		      ENABLE_5V | RESET_SIMCARD);
+	*(CS3BUSTYPE *)(CS3_BASE) = cs3_shadow;
+
 	//It is only possible to register 3 UART in serial_sa1100.c
 	sa1100_register_uart(0, 3);
 	sa1100_register_uart(1, 1);
-#endif
+
+	set_GPIO_IRQ_edge(GPIO_UCB1300_IRQ, GPIO_RISING_EDGE);
 }
 
 #ifdef CONFIG_PROC_FS
diff -Nru linux/arch/arm/mach-sa1100/system3.c linux-2.4.19-pre5-mjc/arch/arm/mach-sa1100/system3.c
--- linux/arch/arm/mach-sa1100/system3.c	Wed Dec 31 19:00:00 1969
+++ linux-2.4.19-pre5-mjc/arch/arm/mach-sa1100/system3.c	Sat Apr  6 08:25:58 2002
@@ -0,0 +1,379 @@
+/*
+ * linux/arch/arm/mach-sa1100/system3.c
+ *
+ * Copyright (C) 2001 Stefan Eletzhofer <stefan.eletzhofer@eletztrick.de>
+ *
+ * $Id: system3.c,v 1.1.6.1 2001/12/04 17:28:06 seletz Exp $
+ *
+ * This file contains all PT Sytsem 3 tweaks. Based on original work from
+ * Nicolas Pitre's assabet fixes
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+ *
+ * $Log: system3.c,v $
+ * Revision 1.1.6.1  2001/12/04 17:28:06  seletz
+ * - merged from previous branch
+ *
+ * Revision 1.1.4.3  2001/12/04 15:16:31  seletz
+ * - merged from linux_2_4_13_ac5_rmk2
+ *
+ * Revision 1.1.4.2  2001/11/19 17:18:57  seletz
+ * - more code cleanups
+ *
+ * Revision 1.1.4.1  2001/11/16 13:52:05  seletz
+ * - PT Digital Board Support Code
+ *
+ * Revision 1.1.2.2  2001/11/05 16:46:18  seletz
+ * - cleanups
+ *
+ * Revision 1.1.2.1  2001/10/15 16:00:43  seletz
+ * - first revision working with new board
+ *
+ *
+ */
+
+#include <linux/config.h>
+#include <linux/init.h>
+#include <linux/kernel.h>
+#include <linux/sched.h>
+#include <linux/tty.h>
+#include <linux/module.h>
+#include <linux/errno.h>
+#include <linux/cpufreq.h>
+
+#include <asm/hardware.h>
+#include <asm/setup.h>
+#include <asm/page.h>
+#include <asm/pgtable.h>
+#include <asm/irq.h>
+
+#include <asm/mach/arch.h>
+#include <asm/mach/map.h>
+#include <asm/mach/irq.h>
+#include <asm/mach/serial_sa1100.h>
+
+#include <asm/arch/irq.h>
+
+#include <linux/serial_core.h>
+
+#include "generic.h"
+#include "sa1111.h"
+
+#define DEBUG 1
+
+#ifdef DEBUG
+#	define DPRINTK( x, args... )	printk( "%s: line %d: "x, __FUNCTION__, __LINE__, ## args  );
+#else
+#	define DPRINTK( x, args... )	/* nix */
+#endif
+
+/**********************************************************************
+ *  prototypes
+ */
+
+/* init funcs */
+static void __init fixup_system3(struct machine_desc *desc,
+		struct param_struct *params, char **cmdline, struct meminfo *mi);
+static void __init get_system3_scr(void);
+static int __init system3_init(void);
+static void __init system3_init_irq(void);
+static void __init system3_map_io(void);
+
+static void system3_IRQ_demux( int irq, void *dev_id, struct pt_regs *regs );
+static int system3_get_mctrl(struct uart_port *port);
+static void system3_set_mctrl(struct uart_port *port, u_int mctrl);
+static void system3_uart_pm(struct uart_port *port, u_int state, u_int oldstate);
+static int sdram_notifier(struct notifier_block *nb, unsigned long event, void *data);
+
+extern void convert_to_tag_list(struct param_struct *params, int mem_init);
+
+
+/**********************************************************************
+ *  global data
+ */
+
+/**********************************************************************
+ *  static data
+ */
+
+static struct map_desc system3_io_desc[] __initdata = {
+ /* virtual     physical    length      domain     r  w  c  b */
+  { 0xe8000000, 0x00000000, 0x01000000, DOMAIN_IO, 0, 1, 0, 0 }, /* Flash bank 0 */
+  { 0xf3000000, 0x10000000, 0x00100000, DOMAIN_IO, 0, 1, 0, 0 }, /* System Registers */
+  { 0xf4000000, 0x40000000, 0x00100000, DOMAIN_IO, 0, 1, 0, 0 }, /* SA-1111 */
+  LAST_DESC
+};
+
+static struct sa1100_port_fns system3_port_fns __initdata = {
+	set_mctrl:	system3_set_mctrl,
+	get_mctrl:	system3_get_mctrl,
+	pm:		system3_uart_pm,
+};
+
+static struct irqaction system3_irq = {
+	name:		"PT Digital Board SA1111 IRQ",
+	handler:	system3_IRQ_demux,
+	flags:		SA_INTERRUPT
+};
+
+static struct notifier_block system3_clkchg_block = {
+	notifier_call:	sdram_notifier,
+};
+
+/**********************************************************************
+ *  Static functions
+ */
+
+static void __init system3_map_io(void)
+{
+	DPRINTK( "%s\n", "START" );
+	sa1100_map_io();
+	iotable_init(system3_io_desc);
+
+	sa1100_register_uart_fns(&system3_port_fns);
+	sa1100_register_uart(0, 1);	/* com port */
+	sa1100_register_uart(1, 2);
+	sa1100_register_uart(2, 3);	/* radio module */
+
+	Ser1SDCR0 |= SDCR0_SUS;
+}
+
+
+/*********************************************************************
+ * Install IRQ handler
+ */
+static void system3_IRQ_demux( int irq, void *dev_id, struct pt_regs *regs )
+{
+	u_char irr;
+
+	for(;;){
+		//irr = PTCPLD_REG_IRQSR & (PT_IRQ_LAN | PT_IRQ_USAR | PT_IRQ_SA1111);
+		irr = PT_IRQSR & (PT_IRQ_LAN | PT_IRQ_SA1111);
+
+		irr ^= (PT_IRQ_LAN);
+		if (!irr) break;
+
+		if( irr & PT_IRQ_LAN )
+			do_IRQ(IRQ_SYSTEM3_SMC9196, regs);
+
+#if 0
+		/* Highspeed Serial Bus not yet used */
+		if( irr & PT_IRQ_USAR )
+			do_IRQ(PT_USAR_IRQ, regs);
+#endif
+
+		if( irr & PT_IRQ_SA1111 )
+			sa1111_IRQ_demux(irq, dev_id, regs);
+	}
+}
+
+
+static void __init system3_init_irq(void)
+{
+	int irq;
+
+	DPRINTK( "%s\n", "START" );
+
+	/* SA1111 IRQ not routed to a GPIO. */
+	sa1111_init_irq(-1);
+
+	/* setup extra IRQs */
+	irq = IRQ_SYSTEM3_SMC9196;
+	irq_desc[irq].valid	= 1;
+	irq_desc[irq].probe_ok	= 1;
+
+#if 0
+	/* Highspeed Serial Bus not yet used */
+	irq = PT_USAR_IRQ;
+	irq_desc[irq].valid	= 1;
+	irq_desc[irq].probe_ok	= 1;
+#endif
+
+	/* IRQ by CPLD */
+	set_GPIO_IRQ_edge( GPIO_GPIO(25), GPIO_RISING_EDGE );
+	setup_arm_irq( IRQ_GPIO25, &system3_irq );
+}
+
+/**********************************************************************
+ * On system 3 limit cpu frequency to 206 Mhz
+ */
+static int sdram_notifier(struct notifier_block *nb, unsigned long event,
+		void *data)
+{
+	switch (event) {
+		case CPUFREQ_MINMAX:
+			cpufreq_updateminmax(data, 147500, 206000);
+			break;
+
+	}
+	return 0;
+}
+
+/**
+ *	fixup_system3 - fixup function for system 3 board
+ *	@desc:		machine description
+ *	@param:		kernel params
+ *	@cmdline:	kernel cmdline
+ *	@mi:		memory info struct
+ *
+ */
+static void __init fixup_system3(struct machine_desc *desc,
+		struct param_struct *params, char **cmdline, struct meminfo *mi)
+{
+	DPRINTK( "%s\n", "START" );
+
+	ROOT_DEV = MKDEV(RAMDISK_MAJOR,0);
+	setup_ramdisk( 1, 0, 0, 8192 );
+	setup_initrd( 0xc0800000, 8*1024*1024 );
+}
+
+
+/**
+ *	system3_uart_pm - powermgmt callback function for system 3 UART
+ *	@port: uart port structure
+ *	@state: pm state
+ *	@oldstate: old pm state
+ *
+ */
+static void system3_uart_pm(struct uart_port *port, u_int state, u_int oldstate)
+{
+	/* TODO: switch on/off uart in powersave mode */
+}
+
+/*
+ * Note! this can be called from IRQ context.
+ * FIXME: Handle PT Digital Board CTRL regs irq-safe.
+ *
+ * NB: system3 uses COM_RTS and COM_DTR for both UART1 (com port)
+ * and UART3 (radio module).  We only handle them for UART1 here.
+ */
+static void system3_set_mctrl(struct uart_port *port, u_int mctrl)
+{
+	if (port->mapbase == _Ser1UTCR0) {
+		u_int set = 0, clear = 0;
+
+		if (mctrl & TIOCM_RTS)
+			set |= PT_CTRL2_RS1_RTS;
+		else
+			clear |= PT_CTRL2_RS1_RTS;
+
+		if (mctrl & TIOCM_DTR)
+			set |= PT_CTRL2_RS1_DTR;
+		else
+			clear |= PT_CTRL2_RS1_DTR;
+
+		PTCTRL2_clear(clear);
+		PTCTRL2_set(set);
+	}
+}
+
+static int system3_get_mctrl(struct uart_port *port)
+{
+	u_int ret = 0;
+	u_int irqsr = PT_IRQSR;
+
+	/* need 2 reads to read current value */
+	irqsr = PT_IRQSR;
+
+	/* TODO: check IRQ source register for modem/com
+	 status lines and set them correctly. */
+
+	ret = TIOCM_CD | TIOCM_CTS | TIOCM_DSR;
+
+	return ret;
+}
+
+static int __init system3_init(void)
+{
+	int ret = 0;
+	DPRINTK( "%s\n", "START" );
+
+	if ( !machine_is_pt_system3() ) {
+		ret = -EINVAL;
+		goto DONE;
+	}
+
+	/* init control register */
+	PT_CTRL0 = PT_CTRL0_INIT;
+	PT_CTRL1 = 0x02;
+	PT_CTRL2 = 0x00;
+	DPRINTK( "CTRL[0]=0x%02x\n", PT_CTRL0 );
+	DPRINTK( "CTRL[1]=0x%02x\n", PT_CTRL1 );
+	DPRINTK( "CTRL[2]=0x%02x\n", PT_CTRL2 );
+
+	/*
+	 * Ensure that the memory bus request/grant signals are setup,
+	 * and the grant is held in its inactive state.
+	 */
+	sa1110_mb_disable();
+
+	/*
+	 * Probe for a SA1111.
+	 */
+	ret = sa1111_probe(PT_SA1111_BASE);
+	if (ret < 0) {
+		printk( KERN_WARNING"PT Digital Board: no SA1111 found!\n" );
+		goto DONE;
+	}
+
+	/*
+	 * We found it.  Wake the chip up.
+	 */
+	sa1111_wake();
+
+	/*
+	 * The SDRAM configuration of the SA1110 and the SA1111 must
+	 * match.  This is very important to ensure that SA1111 accesses
+	 * don't corrupt the SDRAM.  Note that this ungates the SA1111's
+	 * MBGNT signal, so we must have called sa1110_mb_disable()
+	 * beforehand.
+	 */
+	sa1111_configure_smc(1,
+			     FExtr(MDCNFG, MDCNFG_SA1110_DRAC0),
+			     FExtr(MDCNFG, MDCNFG_SA1110_TDL0));
+
+	/*
+	 * We only need to turn on DCLK whenever we want to use the
+	 * DMA.  It can otherwise be held firmly in the off position.
+	 */
+	SKPCR |= SKPCR_DCLKEN;
+
+	/*
+	 * Enable the SA1110 memory bus request and grant signals.
+	 */
+	sa1110_mb_enable();
+
+	system3_init_irq();
+
+#if defined( CONFIG_CPU_FREQ )
+	ret = cpufreq_register_notifier(&system3_clkchg_block);
+	if ( ret != 0 ) {
+		printk( KERN_WARNING"PT Digital Board: could not register clock scale callback\n" );
+		goto DONE;
+	}
+#endif
+
+	ret = 0;
+DONE:
+	DPRINTK( "ret=%d\n", ret );
+	return ret;
+}
+
+/**********************************************************************
+ *  Exported Functions
+ */
+
+/**********************************************************************
+ *  kernel magic macros
+ */
+__initcall(system3_init);
+
+MACHINE_START(PT_SYSTEM3, "PT System 3")
+	BOOT_MEM(0xc0000000, 0x80000000, 0xf8000000)
+	BOOT_PARAMS(0xc0000100)
+	FIXUP(fixup_system3)
+	MAPIO(system3_map_io)
+	INITIRQ(sa1100_init_irq)
+MACHINE_END
diff -Nru linux/arch/arm/mach-sa1100/victor.c linux-2.4.19-pre5-mjc/arch/arm/mach-sa1100/victor.c
--- linux/arch/arm/mach-sa1100/victor.c	Sun Aug 12 14:13:59 2001
+++ linux-2.4.19-pre5-mjc/arch/arm/mach-sa1100/victor.c	Sat Apr  6 08:25:58 2002
@@ -60,7 +60,7 @@
 
 static struct map_desc victor_io_desc[] __initdata = {
  /* virtual     physical    length      domain     r  w  c  b */
-  { 0xe8000000, 0x00000000, 0x00200000, DOMAIN_IO, 1, 1, 0, 0 }, /* Flash */
+  { 0xe8000000, 0x00000000, 0x00200000, DOMAIN_IO, 0, 1, 0, 0 }, /* Flash */
   LAST_DESC
 };
 
diff -Nru linux/arch/arm/mach-sa1100/xp860.c linux-2.4.19-pre5-mjc/arch/arm/mach-sa1100/xp860.c
--- linux/arch/arm/mach-sa1100/xp860.c	Thu Oct 11 12:04:57 2001
+++ linux-2.4.19-pre5-mjc/arch/arm/mach-sa1100/xp860.c	Sat Apr  6 08:25:58 2002
@@ -21,6 +21,7 @@
 
 static void xp860_power_off(void)
 {
+	cli();
 	GPDR |= GPIO_GPIO20;
 	GPSR = GPIO_GPIO20;
 	mdelay(1000);
@@ -40,7 +41,7 @@
 	/*
 	 * Probe for SA1111.
 	 */
-	ret = sa1111_probe();
+	ret = sa1111_probe(0x40000000);
 	if (ret < 0)
 		return ret;
 
@@ -65,9 +66,9 @@
 
 static struct map_desc xp860_io_desc[] __initdata = {
  /* virtual     physical    length      domain     r  w  c  b */
-  { 0xf0000000, 0x10000000, 0x00100000, DOMAIN_IO, 1, 1, 0, 0 }, /* SCSI */
-  { 0xf1000000, 0x18000000, 0x00100000, DOMAIN_IO, 1, 1, 0, 0 }, /* LAN */
-  { 0xf4000000, 0x40000000, 0x00800000, DOMAIN_IO, 1, 1, 0, 0 }, /* SA-1111 */
+  { 0xf0000000, 0x10000000, 0x00100000, DOMAIN_IO, 0, 1, 0, 0 }, /* SCSI */
+  { 0xf1000000, 0x18000000, 0x00100000, DOMAIN_IO, 0, 1, 0, 0 }, /* LAN */
+  { 0xf4000000, 0x40000000, 0x00800000, DOMAIN_IO, 0, 1, 0, 0 }, /* SA-1111 */
   LAST_DESC
 };
 
diff -Nru linux/arch/arm/mach-sa1100/yopy.c linux-2.4.19-pre5-mjc/arch/arm/mach-sa1100/yopy.c
--- linux/arch/arm/mach-sa1100/yopy.c	Sun Aug 12 14:13:59 2001
+++ linux-2.4.19-pre5-mjc/arch/arm/mach-sa1100/yopy.c	Sat Apr  6 08:25:58 2002
@@ -1,8 +1,6 @@
 /*
  * linux/arch/arm/mach-sa1100/yopy.c
  */
-
-#include <linux/config.h>
 #include <linux/module.h>
 #include <linux/init.h>
 #include <linux/kernel.h>
@@ -52,14 +50,16 @@
 
 static int __init yopy_hw_init(void)
 {
-	YOPY_EGPIO = yopy_egpio;
+	if (machine_is_yopy()) {
+		YOPY_EGPIO = yopy_egpio;
 
-	/* Enable Output */
-	PPDR |= PPC_L_BIAS;
-	PSDR &= ~PPC_L_BIAS;
-	PPSR |= PPC_L_BIAS;
+		/* Enable Output */
+		PPDR |= PPC_L_BIAS;
+		PSDR &= ~PPC_L_BIAS;
+		PPSR |= PPC_L_BIAS;
 
-	YOPY_EGPIO = yopy_egpio;
+		YOPY_EGPIO = yopy_egpio;
+	}
 
 	return 0;
 }
@@ -69,9 +69,9 @@
 
 static struct map_desc yopy_io_desc[] __initdata = {
  /* virtual     physical    length      domain     r  w  c  b */
-  { 0xe8000000, 0x00000000, 0x04000000, DOMAIN_IO, 1, 1, 0, 0 }, /* Flash 0 */
-  { 0xec000000, 0x08000000, 0x04000000, DOMAIN_IO, 1, 1, 0, 0 }, /* Flash 1 */
-  { 0xf0000000, 0x48000000, 0x00300000, DOMAIN_IO, 1, 1, 0, 0 }, /* LCD */
+  { 0xe8000000, 0x00000000, 0x04000000, DOMAIN_IO, 0, 1, 0, 0 }, /* Flash 0 */
+  { 0xec000000, 0x08000000, 0x04000000, DOMAIN_IO, 0, 1, 0, 0 }, /* Flash 1 */
+  { 0xf0000000, 0x48000000, 0x00300000, DOMAIN_IO, 0, 1, 0, 0 }, /* LCD */
   { 0xf1000000, 0x10000000, 0x00100000, DOMAIN_IO, 0, 1, 0, 0 }, /* EGPIO */
   LAST_DESC
 };
@@ -82,6 +82,8 @@
 	iotable_init(yopy_io_desc);
 
 	sa1100_register_uart(0, 3);
+
+	set_GPIO_IRQ_edge(GPIO_UCB1200_IRQ, GPIO_RISING_EDGE);
 }
 
 
diff -Nru linux/arch/arm/mm/Makefile linux-2.4.19-pre5-mjc/arch/arm/mm/Makefile
--- linux/arch/arm/mm/Makefile	Fri Nov  9 16:58:02 2001
+++ linux-2.4.19-pre5-mjc/arch/arm/mm/Makefile	Sat Apr  6 08:25:58 2002
@@ -13,19 +13,20 @@
 
 # Object file lists.
 
-obj-y		:= init.o
+obj-y		:= init.o extable.o fault-common.o
 obj-m		:=
 obj-n		:=
 obj-		:=
 export-objs	:= proc-syms.o discontig.o
 
-cpu32-y		:= consistent.o fault-armv.o ioremap.o mm-armv.o
-cpu32-$(CONFIG_MODULES) += proc-syms.o
+ifeq ($(CONFIG_CPU_32),y)
+obj-y		+= consistent.o fault-armv.o ioremap.o mm-armv.o
+obj-$(CONFIG_MODULES) += proc-syms.o
+endif
 
-obj-y		+= extable.o fault-common.o
 obj-$(CONFIG_CPU_26) += fault-armo.o mm-armo.o small_page.o
-obj-$(CONFIG_CPU_32) += $(cpu32-y)
 
+obj-$(CONFIG_ALIGNMENT_TRAP) += alignment.o
 obj-$(CONFIG_DISCONTIGMEM) += discontig.o
 
 # Select the processor-specific files
@@ -34,6 +35,7 @@
 p-$(CONFIG_CPU_ARM710)	+= proc-arm6,7.o
 p-$(CONFIG_CPU_ARM720T)	+= proc-arm720.o
 p-$(CONFIG_CPU_ARM920T)	+= proc-arm920.o
+p-$(CONFIG_CPU_ARM922T)	+= proc-arm922.o
 p-$(CONFIG_CPU_ARM926T)	+= proc-arm926.o
 p-$(CONFIG_CPU_ARM1020)	+= proc-arm1020.o
 p-$(CONFIG_CPU_SA110)	+= proc-sa110.o
diff -Nru linux/arch/arm/mm/alignment.c linux-2.4.19-pre5-mjc/arch/arm/mm/alignment.c
--- linux/arch/arm/mm/alignment.c	Wed Dec 31 19:00:00 1969
+++ linux-2.4.19-pre5-mjc/arch/arm/mm/alignment.c	Sat Apr  6 08:25:58 2002
@@ -0,0 +1,609 @@
+/*
+ *  linux/arch/arm/mm/alignment.c
+ *
+ *  Copyright (C) 1995  Linus Torvalds
+ *  Modifications for ARM processor (c) 1995-2001 Russell King
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+ */
+#include <linux/config.h>
+#include <linux/compiler.h>
+#include <linux/signal.h>
+#include <linux/sched.h>
+#include <linux/kernel.h>
+#include <linux/errno.h>
+#include <linux/string.h>
+#include <linux/types.h>
+#include <linux/ptrace.h>
+#include <linux/mman.h>
+#include <linux/mm.h>
+#include <linux/interrupt.h>
+#include <linux/proc_fs.h>
+#include <linux/bitops.h>
+#include <linux/init.h>
+
+#include <asm/system.h>
+#include <asm/uaccess.h>
+#include <asm/pgalloc.h>
+#include <asm/pgtable.h>
+#include <asm/unaligned.h>
+
+extern void
+do_bad_area(struct task_struct *tsk, struct mm_struct *mm, unsigned long addr,
+	    int error_code, struct pt_regs *regs);
+
+/*
+ * 32-bit misaligned trap handler (c) 1998 San Mehat (CCC) -July 1998
+ * /proc/sys/debug/alignment, modified and integrated into
+ * Linux 2.1 by Russell King
+ *
+ * Speed optimisations and better fault handling by Russell King.
+ *
+ * *** NOTE ***
+ * This code is not portable to processors with late data abort handling.
+ */
+#define CODING_BITS(i)	(i & 0x0e000000)
+
+#define LDST_I_BIT(i)	(i & (1 << 26))		/* Immediate constant	*/
+#define LDST_P_BIT(i)	(i & (1 << 24))		/* Preindex		*/
+#define LDST_U_BIT(i)	(i & (1 << 23))		/* Add offset		*/
+#define LDST_W_BIT(i)	(i & (1 << 21))		/* Writeback		*/
+#define LDST_L_BIT(i)	(i & (1 << 20))		/* Load			*/
+
+#define LDST_P_EQ_U(i)	((((i) ^ ((i) >> 1)) & (1 << 23)) == 0)
+
+#define LDSTH_I_BIT(i)	(i & (1 << 22))		/* half-word immed	*/
+#define LDM_S_BIT(i)	(i & (1 << 22))		/* write CPSR from SPSR	*/
+
+#define RN_BITS(i)	((i >> 16) & 15)	/* Rn			*/
+#define RD_BITS(i)	((i >> 12) & 15)	/* Rd			*/
+#define RM_BITS(i)	(i & 15)		/* Rm			*/
+
+#define REGMASK_BITS(i)	(i & 0xffff)
+#define OFFSET_BITS(i)	(i & 0x0fff)
+
+#define IS_SHIFT(i)	(i & 0x0ff0)
+#define SHIFT_BITS(i)	((i >> 7) & 0x1f)
+#define SHIFT_TYPE(i)	(i & 0x60)
+#define SHIFT_LSL	0x00
+#define SHIFT_LSR	0x20
+#define SHIFT_ASR	0x40
+#define SHIFT_RORRRX	0x60
+
+static unsigned long ai_user;
+static unsigned long ai_sys;
+static unsigned long ai_skipped;
+static unsigned long ai_half;
+static unsigned long ai_word;
+static unsigned long ai_multi;
+static int ai_usermode;
+
+#ifdef CONFIG_PROC_FS
+static const char *usermode_action[] = {
+	"ignored",
+	"warn",
+	"fixup",
+	"fixup+warn",
+	"signal",
+	"signal+warn"
+};
+
+static int
+proc_alignment_read(char *page, char **start, off_t off, int count, int *eof,
+		    void *data)
+{
+	char *p = page;
+	int len;
+
+	p += sprintf(p, "User:\t\t%lu\n", ai_user);
+	p += sprintf(p, "System:\t\t%lu\n", ai_sys);
+	p += sprintf(p, "Skipped:\t%lu\n", ai_skipped);
+	p += sprintf(p, "Half:\t\t%lu\n", ai_half);
+	p += sprintf(p, "Word:\t\t%lu\n", ai_word);
+	p += sprintf(p, "Multi:\t\t%lu\n", ai_multi);
+	p += sprintf(p, "User faults:\t%i (%s)\n", ai_usermode,
+			usermode_action[ai_usermode]);
+
+	len = (p - page) - off;
+	if (len < 0)
+		len = 0;
+
+	*eof = (len <= count) ? 1 : 0;
+	*start = page + off;
+
+	return len;
+}
+
+static int proc_alignment_write(struct file *file, const char *buffer,
+			       unsigned long count, void *data)
+{
+	int mode;
+
+	if (count > 0) {
+		if (get_user(mode, buffer))
+			return -EFAULT;
+		if (mode >= '0' && mode <= '5')
+			   ai_usermode = mode - '0';
+	}
+	return count;
+}
+
+/*
+ * This needs to be done after sysctl_init, otherwise sys/ will be
+ * overwritten.  Actually, this shouldn't be in sys/ at all since
+ * it isn't a sysctl, and it doesn't contain sysctl information.
+ * We now locate it in /proc/cpu/alignment instead.
+ */
+static int __init alignment_init(void)
+{
+	struct proc_dir_entry *res;
+
+	res = proc_mkdir("cpu", NULL);
+	if (!res)
+		return -ENOMEM;
+
+	res = create_proc_entry("alignment", S_IWUSR | S_IRUGO, res);
+	if (!res)
+		return -ENOMEM;
+
+	res->read_proc = proc_alignment_read;
+	res->write_proc = proc_alignment_write;
+
+	return 0;
+}
+
+__initcall(alignment_init);
+#endif /* CONFIG_PROC_FS */
+
+union offset_union {
+	unsigned long un;
+	  signed long sn;
+};
+
+#define TYPE_ERROR	0
+#define TYPE_FAULT	1
+#define TYPE_LDST	2
+#define TYPE_DONE	3
+
+#define __get8_unaligned_check(ins,val,addr,err)	\
+	__asm__(					\
+	"1:	"ins"	%1, [%2], #1\n"			\
+	"2:\n"						\
+	"	.section .fixup,\"ax\"\n"		\
+	"	.align	2\n"				\
+	"3:	mov	%0, #1\n"			\
+	"	b	2b\n"				\
+	"	.previous\n"				\
+	"	.section __ex_table,\"a\"\n"		\
+	"	.align	3\n"				\
+	"	.long	1b, 3b\n"			\
+	"	.previous\n"				\
+	: "=r" (err), "=&r" (val), "=r" (addr)		\
+	: "0" (err), "2" (addr))
+
+#define __get16_unaligned_check(ins,val,addr)			\
+	do {							\
+		unsigned int err = 0, v, a = addr;		\
+		__get8_unaligned_check(ins,val,a,err);		\
+		__get8_unaligned_check(ins,v,a,err);		\
+		val |= v << 8;					\
+		if (err)					\
+			goto fault;				\
+	} while (0)
+
+#define get16_unaligned_check(val,addr) \
+	__get16_unaligned_check("ldrb",val,addr)
+
+#define get16t_unaligned_check(val,addr) \
+	__get16_unaligned_check("ldrbt",val,addr)
+
+#define __get32_unaligned_check(ins,val,addr)			\
+	do {							\
+		unsigned int err = 0, v, a = addr;		\
+		__get8_unaligned_check(ins,val,a,err);		\
+		__get8_unaligned_check(ins,v,a,err);		\
+		val |= v << 8;					\
+		__get8_unaligned_check(ins,v,a,err);		\
+		val |= v << 16;					\
+		__get8_unaligned_check(ins,v,a,err);		\
+		val |= v << 24;					\
+		if (err)					\
+			goto fault;				\
+	} while (0)
+
+#define get32_unaligned_check(val,addr) \
+	__get32_unaligned_check("ldrb",val,addr)
+
+#define get32t_unaligned_check(val,addr) \
+	__get32_unaligned_check("ldrbt",val,addr)
+
+#define __put16_unaligned_check(ins,val,addr)			\
+	do {							\
+		unsigned int err = 0, v = val, a = addr;	\
+		__asm__(					\
+		"1:	"ins"	%1, [%2], #1\n"			\
+		"	mov	%1, %1, lsr #8\n"		\
+		"2:	"ins"	%1, [%2]\n"			\
+		"3:\n"						\
+		"	.section .fixup,\"ax\"\n"		\
+		"	.align	2\n"				\
+		"4:	mov	%0, #1\n"			\
+		"	b	3b\n"				\
+		"	.previous\n"				\
+		"	.section __ex_table,\"a\"\n"		\
+		"	.align	3\n"				\
+		"	.long	1b, 4b\n"			\
+		"	.long	2b, 4b\n"			\
+		"	.previous\n"				\
+		: "=r" (err), "=&r" (v), "=&r" (a)		\
+		: "0" (err), "1" (v), "2" (a));			\
+		if (err)					\
+			goto fault;				\
+	} while (0)
+
+#define put16_unaligned_check(val,addr)  \
+	__put16_unaligned_check("strb",val,addr)
+
+#define put16t_unaligned_check(val,addr) \
+	__put16_unaligned_check("strbt",val,addr)
+
+#define __put32_unaligned_check(ins,val,addr)			\
+	do {							\
+		unsigned int err = 0, v = val, a = addr;	\
+		__asm__(					\
+		"1:	"ins"	%1, [%2], #1\n"			\
+		"	mov	%1, %1, lsr #8\n"		\
+		"2:	"ins"	%1, [%2], #1\n"			\
+		"	mov	%1, %1, lsr #8\n"		\
+		"3:	"ins"	%1, [%2], #1\n"			\
+		"	mov	%1, %1, lsr #8\n"		\
+		"4:	"ins"	%1, [%2]\n"			\
+		"5:\n"						\
+		"	.section .fixup,\"ax\"\n"		\
+		"	.align	2\n"				\
+		"6:	mov	%0, #1\n"			\
+		"	b	5b\n"				\
+		"	.previous\n"				\
+		"	.section __ex_table,\"a\"\n"		\
+		"	.align	3\n"				\
+		"	.long	1b, 6b\n"			\
+		"	.long	2b, 6b\n"			\
+		"	.long	3b, 6b\n"			\
+		"	.long	4b, 6b\n"			\
+		"	.previous\n"				\
+		: "=r" (err), "=&r" (v), "=&r" (a)		\
+		: "0" (err), "1" (v), "2" (a));			\
+		if (err)					\
+			goto fault;				\
+	} while (0)
+
+#define put32_unaligned_check(val,addr)	 \
+	__put32_unaligned_check("strb", val, addr)
+
+#define put32t_unaligned_check(val,addr) \
+	__put32_unaligned_check("strbt", val, addr)
+
+static void
+do_alignment_finish_ldst(unsigned long addr, unsigned long instr, struct pt_regs *regs, union offset_union offset)
+{
+	if (!LDST_U_BIT(instr))
+		offset.un = -offset.un;
+
+	if (!LDST_P_BIT(instr))
+		addr += offset.un;
+
+	if (!LDST_P_BIT(instr) || LDST_W_BIT(instr))
+		regs->uregs[RN_BITS(instr)] = addr;
+}
+
+static int
+do_alignment_ldrhstrh(unsigned long addr, unsigned long instr, struct pt_regs *regs)
+{
+	unsigned int rd = RD_BITS(instr);
+
+	if ((instr & 0x01f00ff0) == 0x01000090)
+		goto swp;
+
+	if ((instr & 0x90) != 0x90 || (instr & 0x60) == 0)
+		goto bad;
+
+	ai_half += 1;
+
+	if (user_mode(regs))
+		goto user;
+
+	if (LDST_L_BIT(instr)) {
+		unsigned long val;
+		get16_unaligned_check(val, addr);
+
+		/* signed half-word? */
+		if (instr & 0x40)
+			val = (signed long)((signed short) val);
+
+		regs->uregs[rd] = val;
+	} else
+		put16_unaligned_check(regs->uregs[rd], addr);
+
+	return TYPE_LDST;
+
+ user:
+ 	if (LDST_L_BIT(instr)) {
+ 		unsigned long val;
+ 		get16t_unaligned_check(val, addr);
+
+ 		/* signed half-word? */
+ 		if (instr & 0x40)
+ 			val = (signed long)((signed short) val);
+
+ 		regs->uregs[rd] = val;
+ 	} else
+ 		put16t_unaligned_check(regs->uregs[rd], addr);
+
+ 	return TYPE_LDST;
+
+ swp:
+	printk(KERN_ERR "Alignment trap: not handling swp instruction\n");
+ bad:
+	return TYPE_ERROR;
+
+ fault:
+	return TYPE_FAULT;
+}
+
+static int
+do_alignment_ldrstr(unsigned long addr, unsigned long instr, struct pt_regs *regs)
+{
+	unsigned int rd = RD_BITS(instr);
+
+	ai_word += 1;
+
+	if ((!LDST_P_BIT(instr) && LDST_W_BIT(instr)) || user_mode(regs))
+		goto trans;
+
+	if (LDST_L_BIT(instr)) {
+		unsigned int val;
+		get32_unaligned_check(val, addr);
+		regs->uregs[rd] = val;
+	} else
+		put32_unaligned_check(regs->uregs[rd], addr);
+	return TYPE_LDST;
+
+ trans:
+	if (LDST_L_BIT(instr)) {
+		unsigned int val;
+		get32t_unaligned_check(val, addr);
+		regs->uregs[rd] = val;
+	} else
+		put32t_unaligned_check(regs->uregs[rd], addr);
+	return TYPE_LDST;
+
+ fault:
+	return TYPE_FAULT;
+}
+
+/*
+ * LDM/STM alignment handler.
+ *
+ * There are 4 variants of this instruction:
+ *
+ * B = rn pointer before instruction, A = rn pointer after instruction
+ *              ------ increasing address ----->
+ *	        |    | r0 | r1 | ... | rx |    |
+ * PU = 01             B                    A
+ * PU = 11        B                    A
+ * PU = 00        A                    B
+ * PU = 10             A                    B
+ */
+static int
+do_alignment_ldmstm(unsigned long addr, unsigned long instr, struct pt_regs *regs)
+{
+	unsigned int rd, rn, correction, nr_regs, regbits;
+	unsigned long eaddr, newaddr;
+
+	if (LDM_S_BIT(instr))
+		goto bad;
+
+	correction = 4; /* processor implementation defined */
+	regs->ARM_pc += correction;
+
+	ai_multi += 1;
+
+	/* count the number of registers in the mask to be transferred */
+	nr_regs = hweight16(REGMASK_BITS(instr)) * 4;
+
+	rn = RN_BITS(instr);
+	newaddr = eaddr = regs->uregs[rn];
+
+	if (!LDST_U_BIT(instr))
+		nr_regs = -nr_regs;
+	newaddr += nr_regs;
+	if (!LDST_U_BIT(instr))
+		eaddr = newaddr;
+
+	if (LDST_P_EQ_U(instr))	/* U = P */
+		eaddr += 4;
+
+	/* 
+	 * For alignment faults on the ARM922T the MMU  makes 
+	 * the FSR (and hence addr) equal to the updated base address
+	 * of the multiple access rather than the restored value.
+	 * Switch this messsage off if we've got a ARM922, otherwise
+	 * [ls]dm alignment faults are noisy!
+	 */
+#if !(defined CONFIG_CPU_ARM922T)  
+	/*
+	 * This is a "hint" - we already have eaddr worked out by the
+	 * processor for us.
+	 */
+	if (addr != eaddr) {
+		printk(KERN_ERR "LDMSTM: PC = %08lx, instr = %08lx, "
+			"addr = %08lx, eaddr = %08lx\n",
+			 instruction_pointer(regs), instr, addr, eaddr);
+		show_regs(regs);
+	}
+#endif
+
+	if (user_mode(regs)) {
+		for (regbits = REGMASK_BITS(instr), rd = 0; regbits;
+		     regbits >>= 1, rd += 1)
+			if (regbits & 1) {
+				if (LDST_L_BIT(instr)) {
+					unsigned int val;
+					get32t_unaligned_check(val, eaddr);
+					regs->uregs[rd] = val;
+				} else
+					put32t_unaligned_check(regs->uregs[rd], eaddr);
+				eaddr += 4;
+			}
+	} else {
+		for (regbits = REGMASK_BITS(instr), rd = 0; regbits;
+		     regbits >>= 1, rd += 1)
+			if (regbits & 1) {
+				if (LDST_L_BIT(instr)) {
+					unsigned int val;
+					get32_unaligned_check(val, eaddr);
+					regs->uregs[rd] = val;
+				} else
+					put32_unaligned_check(regs->uregs[rd], eaddr);
+				eaddr += 4;
+			}
+	}
+
+	if (LDST_W_BIT(instr))
+		regs->uregs[rn] = newaddr;
+	if (!LDST_L_BIT(instr) || !(REGMASK_BITS(instr) & (1 << 15)))
+		regs->ARM_pc -= correction;
+	return TYPE_DONE;
+
+fault:
+	regs->ARM_pc -= correction;
+	return TYPE_FAULT;
+
+bad:
+	printk(KERN_ERR "Alignment trap: not handling ldm with s-bit set\n");
+	return TYPE_ERROR;
+}
+
+int do_alignment(unsigned long addr, int error_code, struct pt_regs *regs)
+{
+	union offset_union offset;
+	unsigned long instr, instrptr;
+	int (*handler)(unsigned long addr, unsigned long instr, struct pt_regs *regs);
+	unsigned int type;
+
+	instrptr = instruction_pointer(regs);
+	instr = *(unsigned long *)instrptr;
+
+	if (user_mode(regs))
+		goto user;
+
+	ai_sys += 1;
+
+ fixup:
+
+	regs->ARM_pc += 4;
+
+	switch (CODING_BITS(instr)) {
+	case 0x00000000:	/* ldrh or strh */
+		if (LDSTH_I_BIT(instr))
+			offset.un = (instr & 0xf00) >> 4 | (instr & 15);
+		else
+			offset.un = regs->uregs[RM_BITS(instr)];
+		handler = do_alignment_ldrhstrh;
+		break;
+
+	case 0x04000000:	/* ldr or str immediate */
+		offset.un = OFFSET_BITS(instr);
+		handler = do_alignment_ldrstr;
+		break;
+
+	case 0x06000000:	/* ldr or str register */
+		offset.un = regs->uregs[RM_BITS(instr)];
+
+		if (IS_SHIFT(instr)) {
+			unsigned int shiftval = SHIFT_BITS(instr);
+
+			switch(SHIFT_TYPE(instr)) {
+			case SHIFT_LSL:
+				offset.un <<= shiftval;
+				break;
+
+			case SHIFT_LSR:
+				offset.un >>= shiftval;
+				break;
+
+			case SHIFT_ASR:
+				offset.sn >>= shiftval;
+				break;
+
+			case SHIFT_RORRRX:
+				if (shiftval == 0) {
+					offset.un >>= 1;
+					if (regs->ARM_cpsr & CC_C_BIT)
+						offset.un |= 1 << 31;
+				} else
+					offset.un = offset.un >> shiftval |
+							  offset.un << (32 - shiftval);
+				break;
+			}
+		}
+		handler = do_alignment_ldrstr;
+		break;
+
+	case 0x08000000:	/* ldm or stm */
+		handler = do_alignment_ldmstm;
+		break;
+
+	default:
+		goto bad;
+	}
+
+	type = handler(addr, instr, regs);
+
+	if (type == TYPE_ERROR || type == TYPE_FAULT)
+		goto bad_or_fault;
+
+	if (type == TYPE_LDST)
+		do_alignment_finish_ldst(addr, instr, regs, offset);
+
+	return 0;
+
+ bad_or_fault:
+	if (type == TYPE_ERROR)
+		goto bad;
+	regs->ARM_pc -= 4;
+	/*
+	 * We got a fault - fix it up, or die.
+	 */
+	do_bad_area(current, current->mm, addr, error_code, regs);
+	return 0;
+
+ bad:
+	/*
+	 * Oops, we didn't handle the instruction.
+	 */
+	printk(KERN_ERR "Alignment trap: not handling instruction "
+		"%08lx at [<%08lx>]\n", instr, instrptr);
+	ai_skipped += 1;
+	return 1;
+
+ user:
+	ai_user += 1;
+
+	if (ai_usermode & 1)
+		printk("Alignment trap: %s (%d) PC=0x%08lx Instr=0x%08lx "
+		       "Address=0x%08lx Code 0x%02x\n", current->comm,
+			current->pid, instrptr, instr, addr, error_code);
+
+	if (ai_usermode & 2)
+		goto fixup;
+
+	if (ai_usermode & 4)
+		force_sig(SIGBUS, current);
+	else
+		set_cr(cr_no_alignment);
+
+	return 0;
+}
diff -Nru linux/arch/arm/mm/fault-armv.c linux-2.4.19-pre5-mjc/arch/arm/mm/fault-armv.c
--- linux/arch/arm/mm/fault-armv.c	Thu Oct 25 16:53:46 2001
+++ linux-2.4.19-pre5-mjc/arch/arm/mm/fault-armv.c	Sat Apr  6 08:25:58 2002
@@ -27,7 +27,6 @@
 #include <asm/uaccess.h>
 #include <asm/pgalloc.h>
 #include <asm/pgtable.h>
-#include <asm/unaligned.h>
 
 extern void die_if_kernel(const char *str, struct pt_regs *regs, int err);
 extern void show_pte(struct mm_struct *mm, unsigned long addr);
@@ -40,499 +39,15 @@
 			struct pt_regs *regs);
 
 #ifdef CONFIG_ALIGNMENT_TRAP
-/*
- * 32-bit misaligned trap handler (c) 1998 San Mehat (CCC) -July 1998
- * /proc/sys/debug/alignment, modified and integrated into
- * Linux 2.1 by Russell King
- *
- * Speed optimisations and better fault handling by Russell King.
- *
- * *** NOTE ***
- * This code is not portable to processors with late data abort handling.
- */
-#define CODING_BITS(i)	(i & 0x0e000000)
-
-#define LDST_I_BIT(i)	(i & (1 << 26))		/* Immediate constant	*/
-#define LDST_P_BIT(i)	(i & (1 << 24))		/* Preindex		*/
-#define LDST_U_BIT(i)	(i & (1 << 23))		/* Add offset		*/
-#define LDST_W_BIT(i)	(i & (1 << 21))		/* Writeback		*/
-#define LDST_L_BIT(i)	(i & (1 << 20))		/* Load			*/
-
-#define LDST_P_EQ_U(i)	((((i) ^ ((i) >> 1)) & (1 << 23)) == 0)
-
-#define LDSTH_I_BIT(i)	(i & (1 << 22))		/* half-word immed	*/
-#define LDM_S_BIT(i)	(i & (1 << 22))		/* write CPSR from SPSR	*/
-
-#define RN_BITS(i)	((i >> 16) & 15)	/* Rn			*/
-#define RD_BITS(i)	((i >> 12) & 15)	/* Rd			*/
-#define RM_BITS(i)	(i & 15)		/* Rm			*/
-
-#define REGMASK_BITS(i)	(i & 0xffff)
-#define OFFSET_BITS(i)	(i & 0x0fff)
-
-#define IS_SHIFT(i)	(i & 0x0ff0)
-#define SHIFT_BITS(i)	((i >> 7) & 0x1f)
-#define SHIFT_TYPE(i)	(i & 0x60)
-#define SHIFT_LSL	0x00
-#define SHIFT_LSR	0x20
-#define SHIFT_ASR	0x40
-#define SHIFT_RORRRX	0x60
-
-static unsigned long ai_user;
-static unsigned long ai_sys;
-static unsigned long ai_skipped;
-static unsigned long ai_half;
-static unsigned long ai_word;
-static unsigned long ai_multi;
-
-#ifdef CONFIG_SYSCTL
-static int proc_alignment_read(char *page, char **start, off_t off,
-			       int count, int *eof, void *data)
-{
-	char *p = page;
-	int len;
-
-	p += sprintf(p, "User:\t\t%li\n", ai_user);
-	p += sprintf(p, "System:\t\t%li\n", ai_sys);
-	p += sprintf(p, "Skipped:\t%li\n", ai_skipped);
-	p += sprintf(p, "Half:\t\t%li\n", ai_half);
-	p += sprintf(p, "Word:\t\t%li\n", ai_word);
-	p += sprintf(p, "Multi:\t\t%li\n", ai_multi);
-
-	len = (p - page) - off;
-	if (len < 0)
-		len = 0;
-
-	*eof = (len <= count) ? 1 : 0;
-	*start = page + off;
-
-	return len;
-}
-
-/*
- * This needs to be done after sysctl_init, otherwise sys/
- * will be overwritten.
- */
-static int __init alignment_init(void)
-{
-	create_proc_read_entry("sys/debug/alignment", 0, NULL,
-				proc_alignment_read, NULL);
-	return 0;
-}
-
-__initcall(alignment_init);
-#endif /* CONFIG_SYSCTL */
-
-union offset_union {
-	unsigned long un;
-	  signed long sn;
-};
-
-#define TYPE_ERROR	0
-#define TYPE_FAULT	1
-#define TYPE_LDST	2
-#define TYPE_DONE	3
-
-#define get8_unaligned_check(val,addr,err)		\
-	__asm__(					\
-	"1:	ldrb	%1, [%2], #1\n"			\
-	"2:\n"						\
-	"	.section .fixup,\"ax\"\n"		\
-	"	.align	2\n"				\
-	"3:	mov	%0, #1\n"			\
-	"	b	2b\n"				\
-	"	.previous\n"				\
-	"	.section __ex_table,\"a\"\n"		\
-	"	.align	3\n"				\
-	"	.long	1b, 3b\n"			\
-	"	.previous\n"				\
-	: "=r" (err), "=&r" (val), "=r" (addr)		\
-	: "0" (err), "2" (addr))
-
-#define get8t_unaligned_check(val,addr,err)		\
-	__asm__(					\
-	"1:	ldrbt	%1, [%2], #1\n"			\
-	"2:\n"						\
-	"	.section .fixup,\"ax\"\n"		\
-	"	.align	2\n"				\
-	"3:	mov	%0, #1\n"			\
-	"	b	2b\n"				\
-	"	.previous\n"				\
-	"	.section __ex_table,\"a\"\n"		\
-	"	.align	3\n"				\
-	"	.long	1b, 3b\n"			\
-	"	.previous\n"				\
-	: "=r" (err), "=&r" (val), "=r" (addr)		\
-	: "0" (err), "2" (addr))
-
-#define get16_unaligned_check(val,addr)				\
-	do {							\
-		unsigned int err = 0, v, a = addr;		\
-		get8_unaligned_check(val,a,err);		\
-		get8_unaligned_check(v,a,err);			\
-		val |= v << 8;					\
-		if (err)					\
-			goto fault;				\
-	} while (0)
-
-#define put16_unaligned_check(val,addr)				\
-	do {							\
-		unsigned int err = 0, v = val, a = addr;	\
-		__asm__(					\
-		"1:	strb	%1, [%2], #1\n"			\
-		"	mov	%1, %1, lsr #8\n"		\
-		"2:	strb	%1, [%2]\n"			\
-		"3:\n"						\
-		"	.section .fixup,\"ax\"\n"		\
-		"	.align	2\n"				\
-		"4:	mov	%0, #1\n"			\
-		"	b	3b\n"				\
-		"	.previous\n"				\
-		"	.section __ex_table,\"a\"\n"		\
-		"	.align	3\n"				\
-		"	.long	1b, 4b\n"			\
-		"	.long	2b, 4b\n"			\
-		"	.previous\n"				\
-		: "=r" (err), "=&r" (v), "=&r" (a)		\
-		: "0" (err), "1" (v), "2" (a));			\
-		if (err)					\
-			goto fault;				\
-	} while (0)
-
-#define __put32_unaligned_check(ins,val,addr)			\
-	do {							\
-		unsigned int err = 0, v = val, a = addr;	\
-		__asm__(					\
-		"1:	"ins"	%1, [%2], #1\n"			\
-		"	mov	%1, %1, lsr #8\n"		\
-		"2:	"ins"	%1, [%2], #1\n"			\
-		"	mov	%1, %1, lsr #8\n"		\
-		"3:	"ins"	%1, [%2], #1\n"			\
-		"	mov	%1, %1, lsr #8\n"		\
-		"4:	"ins"	%1, [%2]\n"			\
-		"5:\n"						\
-		"	.section .fixup,\"ax\"\n"		\
-		"	.align	2\n"				\
-		"6:	mov	%0, #1\n"			\
-		"	b	5b\n"				\
-		"	.previous\n"				\
-		"	.section __ex_table,\"a\"\n"		\
-		"	.align	3\n"				\
-		"	.long	1b, 6b\n"			\
-		"	.long	2b, 6b\n"			\
-		"	.long	3b, 6b\n"			\
-		"	.long	4b, 6b\n"			\
-		"	.previous\n"				\
-		: "=r" (err), "=&r" (v), "=&r" (a)		\
-		: "0" (err), "1" (v), "2" (a));			\
-		if (err)					\
-			goto fault;				\
-	} while (0)
-
-#define get32_unaligned_check(val,addr)				\
-	do {							\
-		unsigned int err = 0, v, a = addr;		\
-		get8_unaligned_check(val,a,err);		\
-		get8_unaligned_check(v,a,err);			\
-		val |= v << 8;					\
-		get8_unaligned_check(v,a,err);			\
-		val |= v << 16;					\
-		get8_unaligned_check(v,a,err);			\
-		val |= v << 24;					\
-		if (err)					\
-			goto fault;				\
-	} while (0)
-
-#define put32_unaligned_check(val,addr)	 \
-	__put32_unaligned_check("strb", val, addr)
-
-#define get32t_unaligned_check(val,addr)			\
-	do {							\
-		unsigned int err = 0, v, a = addr;		\
-		get8t_unaligned_check(val,a,err);		\
-		get8t_unaligned_check(v,a,err);			\
-		val |= v << 8;					\
-		get8t_unaligned_check(v,a,err);			\
-		val |= v << 16;					\
-		get8t_unaligned_check(v,a,err);			\
-		val |= v << 24;					\
-		if (err)					\
-			goto fault;				\
-	} while (0)
-
-#define put32t_unaligned_check(val,addr) \
-	__put32_unaligned_check("strbt", val, addr)
-
-static void
-do_alignment_finish_ldst(unsigned long addr, unsigned long instr, struct pt_regs *regs, union offset_union offset)
-{
-	if (!LDST_U_BIT(instr))
-		offset.un = -offset.un;
-
-	if (!LDST_P_BIT(instr))
-		addr += offset.un;
-
-	if (!LDST_P_BIT(instr) || LDST_W_BIT(instr))
-		regs->uregs[RN_BITS(instr)] = addr;
-}
-
-static int
-do_alignment_ldrhstrh(unsigned long addr, unsigned long instr, struct pt_regs *regs)
-{
-	unsigned int rd = RD_BITS(instr);
-
-	if ((instr & 0x01f00ff0) == 0x01000090)
-		goto swp;
-
-	if ((instr & 0x90) != 0x90 || (instr & 0x60) == 0)
-		goto bad;
-
-	ai_half += 1;
-
-	if (LDST_L_BIT(instr)) {
-		unsigned long val;
-		get16_unaligned_check(val, addr);
-
-		/* signed half-word? */
-		if (instr & 0x40)
-			val = (signed long)((signed short) val);
-
-		regs->uregs[rd] = val;
-	} else
-		put16_unaligned_check(regs->uregs[rd], addr);
-
-	return TYPE_LDST;
-
-swp:
-	printk(KERN_ERR "Alignment trap: not handling swp instruction\n");
-bad:
-	return TYPE_ERROR;
-
-fault:
-	return TYPE_FAULT;
-}
-
-static int
-do_alignment_ldrstr(unsigned long addr, unsigned long instr, struct pt_regs *regs)
-{
-	unsigned int rd = RD_BITS(instr);
-
-	ai_word += 1;
-
-	if (!LDST_P_BIT(instr) && LDST_W_BIT(instr))
-		goto trans;
-
-	if (LDST_L_BIT(instr))
-		get32_unaligned_check(regs->uregs[rd], addr);
-	else
-		put32_unaligned_check(regs->uregs[rd], addr);
-	return TYPE_LDST;
-
-trans:
-	if (LDST_L_BIT(instr))
-		get32t_unaligned_check(regs->uregs[rd], addr);
-	else
-		put32t_unaligned_check(regs->uregs[rd], addr);
-	return TYPE_LDST;
-
-fault:
-	return TYPE_FAULT;
-}
-
-/*
- * LDM/STM alignment handler.
- *
- * There are 4 variants of this instruction:
- *
- * B = rn pointer before instruction, A = rn pointer after instruction
- *              ------ increasing address ----->
- *	        |    | r0 | r1 | ... | rx |    |
- * PU = 01             B                    A
- * PU = 11        B                    A
- * PU = 00        A                    B
- * PU = 10             A                    B
- */
-static int
-do_alignment_ldmstm(unsigned long addr, unsigned long instr, struct pt_regs *regs)
-{
-	unsigned int rd, rn, correction, nr_regs, regbits;
-	unsigned long eaddr, newaddr;
-
-	if (LDM_S_BIT(instr))
-		goto bad;
-
-	correction = 4; /* processor implementation defined */
-	regs->ARM_pc += correction;
-
-	ai_multi += 1;
-
-	/* count the number of registers in the mask to be transferred */
-	nr_regs = hweight16(REGMASK_BITS(instr)) * 4;
-
-	rn = RN_BITS(instr);
-	newaddr = eaddr = regs->uregs[rn];
-
-	if (!LDST_U_BIT(instr))
-		nr_regs = -nr_regs;
-	newaddr += nr_regs;
-	if (!LDST_U_BIT(instr))
-		eaddr = newaddr;
-
-	if (LDST_P_EQ_U(instr))	/* U = P */
-		eaddr += 4;
-
-	/*
-	 * This is a "hint" - we already have eaddr worked out by the
-	 * processor for us.
-	 */
-	if (addr != eaddr) {
-		printk(KERN_ERR "LDMSTM: PC = %08lx, instr = %08lx, "
-			"addr = %08lx, eaddr = %08lx\n",
-			 instruction_pointer(regs), instr, addr, eaddr);
-		show_regs(regs);
-	}
-
-	for (regbits = REGMASK_BITS(instr), rd = 0; regbits; regbits >>= 1, rd += 1)
-		if (regbits & 1) {
-			if (LDST_L_BIT(instr))
-				get32_unaligned_check(regs->uregs[rd], eaddr);
-			else
-				put32_unaligned_check(regs->uregs[rd], eaddr);
-			eaddr += 4;
-		}
-
-	if (LDST_W_BIT(instr))
-		regs->uregs[rn] = newaddr;
-	if (!LDST_L_BIT(instr) || !(REGMASK_BITS(instr) & (1 << 15)))
-		regs->ARM_pc -= correction;
-	return TYPE_DONE;
-
-fault:
-	regs->ARM_pc -= correction;
-	return TYPE_FAULT;
-
-bad:
-	printk(KERN_ERR "Alignment trap: not handling ldm with s-bit set\n");
-	return TYPE_ERROR;
-}
-
-static int
-do_alignment(unsigned long addr, int error_code, struct pt_regs *regs)
-{
-	union offset_union offset;
-	unsigned long instr, instrptr;
-	int (*handler)(unsigned long addr, unsigned long instr, struct pt_regs *regs);
-	unsigned int type;
-
-	if (user_mode(regs))
-		goto user;
-
-	ai_sys += 1;
-
-	instrptr = instruction_pointer(regs);
-	instr = *(unsigned long *)instrptr;
-
-	regs->ARM_pc += 4;
-
-	switch (CODING_BITS(instr)) {
-	case 0x00000000:	/* ldrh or strh */
-		if (LDSTH_I_BIT(instr))
-			offset.un = (instr & 0xf00) >> 4 | (instr & 15);
-		else
-			offset.un = regs->uregs[RM_BITS(instr)];
-		handler = do_alignment_ldrhstrh;
-		break;
-
-	case 0x04000000:	/* ldr or str immediate */
-		offset.un = OFFSET_BITS(instr);
-		handler = do_alignment_ldrstr;
-		break;
-
-	case 0x06000000:	/* ldr or str register */
-		offset.un = regs->uregs[RM_BITS(instr)];
-
-		if (IS_SHIFT(instr)) {
-			unsigned int shiftval = SHIFT_BITS(instr);
-
-			switch(SHIFT_TYPE(instr)) {
-			case SHIFT_LSL:
-				offset.un <<= shiftval;
-				break;
-
-			case SHIFT_LSR:
-				offset.un >>= shiftval;
-				break;
-
-			case SHIFT_ASR:
-				offset.sn >>= shiftval;
-				break;
-
-			case SHIFT_RORRRX:
-				if (shiftval == 0) {
-					offset.un >>= 1;
-					if (regs->ARM_cpsr & CC_C_BIT)
-						offset.un |= 1 << 31;
-				} else
-					offset.un = offset.un >> shiftval |
-							  offset.un << (32 - shiftval);
-				break;
-			}
-		}
-		handler = do_alignment_ldrstr;
-		break;
-
-	case 0x08000000:	/* ldm or stm */
-		handler = do_alignment_ldmstm;
-		break;
-
-	default:
-		goto bad;
-	}
-
-	type = handler(addr, instr, regs);
-
-	if (type == TYPE_ERROR || type == TYPE_FAULT)
-		goto bad_or_fault;
-
-	if (type == TYPE_LDST)
-		do_alignment_finish_ldst(addr, instr, regs, offset);
-
-	return 0;
-
-bad_or_fault:
-	if (type == TYPE_ERROR)
-		goto bad;
-	regs->ARM_pc -= 4;
-	/*
-	 * We got a fault - fix it up, or die.
-	 */
-	do_bad_area(current, current->mm, addr, error_code, regs);
-	return 0;
-
-bad:
-	/*
-	 * Oops, we didn't handle the instruction.
-	 */
-	printk(KERN_ERR "Alignment trap: not handling instruction "
-		"%08lx at [<%08lx>]\n", instr, instrptr);
-	ai_skipped += 1;
-	return 1;
-
-user:
-	set_cr(cr_no_alignment);
-	ai_user += 1;
-	return 0;
-}
-
+extern int do_alignment(unsigned long addr, int error_code, struct pt_regs *regs);
 #else
-
-#define do_alignment NULL
-
+#define do_alignment do_bad
 #endif
 
+
 /*
- * Some section permission faults need to be handled gracefully, for
- * instance, when they happen due to a __{get,put}_user during an oops).
+ * Some section permission faults need to be handled gracefully.
+ * They can happen due to a __{get,put}_user during an oops.
  */
 static int
 do_sect_fault(unsigned long addr, int error_code, struct pt_regs *regs)
@@ -557,73 +72,54 @@
 	return 1;
 }
 
+/*
+ * This abort handler always returns "fault".
+ */
+static int
+do_bad(unsigned long addr, int error_code, struct pt_regs *regs)
+{
+	return 1;
+}
+
 static const struct fsr_info {
 	int	(*fn)(unsigned long addr, int error_code, struct pt_regs *regs);
 	int	sig;
-	char	*name;
+	const char *name;
 } fsr_info[] = {
-	{ NULL,			SIGSEGV, "vector exception"		   },
+	{ do_bad,		SIGSEGV, "vector exception"		   },
 	{ do_alignment,		SIGILL,	 "alignment exception"		   },
-	{ NULL,			SIGKILL, "terminal exception"		   },
+	{ do_bad,		SIGKILL, "terminal exception"		   },
 	{ do_alignment,		SIGILL,	 "alignment exception"		   },
 	{ do_external_fault,	SIGBUS,	 "external abort on linefetch"	   },
 	{ do_translation_fault,	SIGSEGV, "section translation fault"	   },
 	{ do_external_fault,	SIGBUS,	 "external abort on linefetch"	   },
 	{ do_page_fault,	SIGSEGV, "page translation fault"	   },
 	{ do_external_fault,	SIGBUS,	 "external abort on non-linefetch" },
-	{ NULL,			SIGSEGV, "section domain fault"		   },
+	{ do_bad,		SIGSEGV, "section domain fault"		   },
 	{ do_external_fault,	SIGBUS,	 "external abort on non-linefetch" },
-	{ NULL,			SIGSEGV, "page domain fault"		   },
-	{ NULL,			SIGBUS,	 "external abort on translation"   },
+	{ do_bad,		SIGSEGV, "page domain fault"		   },
+	{ do_bad,		SIGBUS,	 "external abort on translation"   },
 	{ do_sect_fault,	SIGSEGV, "section permission fault"	   },
-	{ NULL,			SIGBUS,	 "external abort on translation"   },
+	{ do_bad,		SIGBUS,	 "external abort on translation"   },
 	{ do_page_fault,	SIGSEGV, "page permission fault"	   }
 };
 
 /*
- * Currently dropped down to debug level
+ * Dispatch a data abort to the relevant handler.
  */
 asmlinkage void
 do_DataAbort(unsigned long addr, int error_code, struct pt_regs *regs, int fsr)
 {
 	const struct fsr_info *inf = fsr_info + (fsr & 15);
 
-#if defined(CONFIG_CPU_SA110) || defined(CONFIG_CPU_SA1100) || defined(CONFIG_DEBUG_ERRORS)
-	if (addr == regs->ARM_pc)
-		goto sa1_weirdness;
-#endif
-
-	if (!inf->fn)
-		goto bad;
-
 	if (!inf->fn(addr, error_code, regs))
 		return;
-bad:
-	printk(KERN_ALERT "Unhandled fault: %s (%X) at 0x%08lx\n",
+
+	printk(KERN_ALERT "Unhandled fault: %s (0x%03x) at 0x%08lx\n",
 		inf->name, fsr, addr);
-	show_pte(current->mm, addr);
 	force_sig(inf->sig, current);
+	show_pte(current->mm, addr);
 	die_if_kernel("Oops", regs, 0);
-	return;
-
-#if defined(CONFIG_CPU_SA110) || defined(CONFIG_CPU_SA1100) || defined(CONFIG_DEBUG_ERRORS)
-sa1_weirdness:
-	if (user_mode(regs)) {
-		static int first = 1;
-		if (first) {
-			printk(KERN_DEBUG "Fixing up bad data abort at %08lx\n", addr);
-#ifdef CONFIG_DEBUG_ERRORS
-			show_pte(current->mm, addr);
-#endif
-		}
-		first = 0;
-		return;
-	}
-
-	if (!inf->fn || inf->fn(addr, error_code, regs))
-		goto bad;
-	return;
-#endif
 }
 
 asmlinkage void
@@ -680,38 +176,13 @@
 	return;
 }
 
-/*
- * Take care of architecture specific things when placing a new PTE into
- * a page table, or changing an existing PTE.  Basically, there are two
- * things that we need to take care of:
- *
- *  1. If PG_dcache_dirty is set for the page, we need to ensure
- *     that any cache entries for the kernels virtual memory
- *     range are written back to the page.
- *  2. If we have multiple shared mappings of the same space in
- *     an object, we need to deal with the cache aliasing issues.
- *
- * Note that the page_table_lock will be held.
- */
-void update_mmu_cache(struct vm_area_struct *vma, unsigned long addr, pte_t pte)
+static void
+make_coherent(struct vm_area_struct *vma, unsigned long addr, struct page *page)
 {
-	struct page *page = pte_page(pte);
 	struct vm_area_struct *mpnt;
-	struct mm_struct *mm;
-	unsigned long pgoff;
-	int aliases;
-
-	if (!VALID_PAGE(page) || !page->mapping)
-		return;
-
-	if (test_and_clear_bit(PG_dcache_dirty, &page->flags)) {
-		unsigned long kvirt = (unsigned long)page_address(page);
-		cpu_cache_clean_invalidate_range(kvirt, kvirt + PAGE_SIZE, 0);
-	}
-
-	mm = vma->vm_mm;
-	pgoff = (addr - vma->vm_start) >> PAGE_SHIFT;
-	aliases = 0;
+	struct mm_struct *mm = vma->vm_mm;
+	unsigned long pgoff = (addr - vma->vm_start) >> PAGE_SHIFT;
+	int aliases = 0;
 
 	/*
 	 * If we have any shared mappings that are in the same mm
@@ -727,7 +198,7 @@
 		 * Note that we intentionally don't mask out the VMA
 		 * that we are fixing up.
 		 */
-		if (mpnt->vm_mm != mm && mpnt != vma)
+		if (mpnt->vm_mm != mm || mpnt == vma)
 			continue;
 
 		/*
@@ -748,4 +219,31 @@
 	}
 	if (aliases)
 		adjust_pte(vma, addr);
+}
+
+/*
+ * Take care of architecture specific things when placing a new PTE into
+ * a page table, or changing an existing PTE.  Basically, there are two
+ * things that we need to take care of:
+ *
+ *  1. If PG_dcache_dirty is set for the page, we need to ensure
+ *     that any cache entries for the kernels virtual memory
+ *     range are written back to the page.
+ *  2. If we have multiple shared mappings of the same space in
+ *     an object, we need to deal with the cache aliasing issues.
+ *
+ * Note that the page_table_lock will be held.
+ */
+void update_mmu_cache(struct vm_area_struct *vma, unsigned long addr, pte_t pte)
+{
+	struct page *page = pte_page(pte);
+
+	if (VALID_PAGE(page) && page->mapping) {
+		if (test_and_clear_bit(PG_dcache_dirty, &page->flags)) {
+			unsigned long kvirt = (unsigned long)page_address(page);
+			cpu_cache_clean_invalidate_range(kvirt, kvirt + PAGE_SIZE, 0);
+		}
+
+		make_coherent(vma, addr, page);
+	}
 }
diff -Nru linux/arch/arm/mm/fault-common.c linux-2.4.19-pre5-mjc/arch/arm/mm/fault-common.c
--- linux/arch/arm/mm/fault-common.c	Thu Oct 11 12:04:57 2001
+++ linux-2.4.19-pre5-mjc/arch/arm/mm/fault-common.c	Sat Apr  6 08:25:58 2002
@@ -141,6 +141,7 @@
 	printk(KERN_DEBUG "%s: unhandled page fault at pc=0x%08lx, "
 	       "lr=0x%08lx (bad address=0x%08lx, code %d)\n",
 	       tsk->comm, regs->ARM_pc, regs->ARM_lr, addr, error_code);
+	show_regs(regs);
 #endif
 
 	tsk->thread.address = addr;
diff -Nru linux/arch/arm/mm/mm-armv.c linux-2.4.19-pre5-mjc/arch/arm/mm/mm-armv.c
--- linux/arch/arm/mm/mm-armv.c	Wed Jun 27 17:12:04 2001
+++ linux-2.4.19-pre5-mjc/arch/arm/mm/mm-armv.c	Sat Apr  6 08:25:58 2002
@@ -14,10 +14,10 @@
 #include <linux/init.h>
 #include <linux/bootmem.h>
 
+#include <asm/hardware.h>
 #include <asm/pgtable.h>
 #include <asm/pgalloc.h>
 #include <asm/page.h>
-#include <asm/io.h>
 #include <asm/setup.h>
 
 #include <asm/mach/map.h>
@@ -224,6 +224,19 @@
 	unsigned long virt, length;
 	int prot_sect, prot_pte;
 	long off;
+
+	if (md->prot_read && md->prot_write &&
+	    !md->cacheable && !md->bufferable) {
+		printk(KERN_WARNING "Security risk: creating user "
+		       "accessible mapping for 0x%08lx at 0x%08lx\n",
+		       md->physical, md->virtual);
+	}
+
+	if (md->virtual != vectors_base() && md->virtual < PAGE_OFFSET) {
+		printk(KERN_WARNING "MM: not creating mapping for "
+		       "0x%08lx at 0x%08lx in user region\n",
+		       md->physical, md->virtual);
+	}
 
 	prot_pte = L_PTE_PRESENT | L_PTE_YOUNG | L_PTE_DIRTY |
 		   (md->prot_read  ? L_PTE_USER       : 0) |
diff -Nru linux/arch/arm/mm/proc-arm1020.S linux-2.4.19-pre5-mjc/arch/arm/mm/proc-arm1020.S
--- linux/arch/arm/mm/proc-arm1020.S	Fri Nov  9 16:58:02 2001
+++ linux-2.4.19-pre5-mjc/arch/arm/mm/proc-arm1020.S	Sat Apr  6 08:25:58 2002
@@ -56,22 +56,27 @@
  * cpu_arm1020_data_abort()
  *
  * obtain information about current aborted instruction
+ * Note: we read user space.  This means we might cause a data
+ * abort here if the I-TLB and D-TLB aren't seeing the same
+ * picture.  Unfortunately, this does happen.  We live with it.
  *
- * r0 = address of aborted instruction
+ *  r2 = address of aborted instruction
+ *  r3 = cpsr
  *
  * Returns:
  *  r0 = address of abort
  *  r1 != 0 if writing
  *  r3 = FSR
+ *  r4 = corrupted
  */
 	.align	5
 ENTRY(cpu_arm1020_data_abort)
-	ldr	r1, [r0]			@ read aborted instruction
+	mrc	p15, 0, r3, c5, c0, 0		@ get FSR
 	mrc	p15, 0, r0, c6, c0, 0		@ get FAR
+	ldr	r1, [r2]			@ read aborted instruction
+	and	r3, r3, #255
 	tst	r1, r1, lsr #21 		@ C = bit 20
-	mrc	p15, 0, r3, c5, c0, 0		@ get FSR
 	sbc	r1, r1, r1			@ r1 = C - 1
-	and	r3, r3, #255
 	mov	pc, lr
 
 /*
diff -Nru linux/arch/arm/mm/proc-arm720.S linux-2.4.19-pre5-mjc/arch/arm/mm/proc-arm720.S
--- linux/arch/arm/mm/proc-arm720.S	Thu Oct 11 12:04:57 2001
+++ linux-2.4.19-pre5-mjc/arch/arm/mm/proc-arm720.S	Sat Apr  6 08:25:58 2002
@@ -111,6 +111,9 @@
  *         : r3 = saved SPSR
  *
  * Purpose : obtain information about current aborted instruction
+ * Note: we read user space.  This means we might cause a data
+ * abort here if the I-TLB and D-TLB aren't seeing the same
+ * picture.  Unfortunately, this does happen.  We live with it.
  *
  * Returns : r0 = address of abort
  *	   : r1 != 0 if writing
diff -Nru linux/arch/arm/mm/proc-arm920.S linux-2.4.19-pre5-mjc/arch/arm/mm/proc-arm920.S
--- linux/arch/arm/mm/proc-arm920.S	Thu Oct 25 16:53:46 2001
+++ linux-2.4.19-pre5-mjc/arch/arm/mm/proc-arm920.S	Sat Apr  6 08:25:58 2002
@@ -56,22 +56,27 @@
  * cpu_arm920_data_abort()
  *
  * obtain information about current aborted instruction
+ * Note: we read user space.  This means we might cause a data
+ * abort here if the I-TLB and D-TLB aren't seeing the same
+ * picture.  Unfortunately, this does happen.  We live with it.
  *
- * r0 = address of aborted instruction
+ *  r2 = address of aborted instruction
+ *  r3 = cpsr
  *
  * Returns:
  *  r0 = address of abort
  *  r1 != 0 if writing
  *  r3 = FSR
+ *  r4 = corrupted
  */
 	.align	5
 ENTRY(cpu_arm920_data_abort)
-	ldr	r1, [r0]			@ read aborted instruction
+	mrc	p15, 0, r3, c5, c0, 0		@ get FSR
 	mrc	p15, 0, r0, c6, c0, 0		@ get FAR
+	ldr	r1, [r2]			@ read aborted instruction
+	and	r3, r3, #255
 	tst	r1, r1, lsr #21			@ C = bit 20
-	mrc	p15, 0, r3, c5, c0, 0		@ get FSR
 	sbc	r1, r1, r1			@ r1 = C - 1
-	and	r3, r3, #255
 	mov	pc, lr
 	
 /*
diff -Nru linux/arch/arm/mm/proc-arm922.S linux-2.4.19-pre5-mjc/arch/arm/mm/proc-arm922.S
--- linux/arch/arm/mm/proc-arm922.S	Wed Dec 31 19:00:00 1969
+++ linux-2.4.19-pre5-mjc/arch/arm/mm/proc-arm922.S	Sat Apr  6 08:25:58 2002
@@ -0,0 +1,657 @@
+/*
+ *  linux/arch/arm/mm/arm922.S: MMU functions for ARM922
+ *
+ *  Copyright (C) 1999,2000 ARM Limited
+ *  Copyright (C) 2000 Deep Blue Solutions Ltd.
+ *  Copyright (C) 2001 Altera Corporation
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or
+ * (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA  02111-1307  USA
+ *
+ *
+ * These are the low level assembler for performing cache and TLB
+ * functions on the arm922.
+ */
+#include <linux/linkage.h>
+#include <linux/config.h>
+#include <asm/assembler.h>
+#include <asm/constants.h>
+#include <asm/procinfo.h>
+#include <asm/hardware.h>
+
+/*
+ * This is the maximum size of an area which will be invalidated
+ * using the single invalidate entry instructions.  Anything larger
+ * than this, and we go for the whole cache.
+ *
+ * This value should be chosen such that we choose the cheapest
+ * alternative.
+ */
+#define MAX_AREA_SIZE	8192
+
+/*
+ * the cache line size of the I and D cache
+ */
+#define DCACHELINESIZE	32
+#define ICACHELINESIZE	32
+
+/*
+ * and the page size
+ */
+#define PAGESIZE	4096
+
+	.text
+
+/*
+ * cpu_arm922_data_abort()
+ *
+ * obtain information about current aborted instruction
+ *
+ * r0 = address of aborted instruction
+ *
+ * Returns:
+ *  r0 = address of abort
+ *  r1 != 0 if writing
+ *  r3 = FSR
+ */
+	.align	5
+ENTRY(cpu_arm922_data_abort)
+	ldr	r1, [r0]			@ read aborted instruction
+	mrc	p15, 0, r0, c6, c0, 0		@ get FAR
+	tst	r1, r1, lsr #21			@ C = bit 20
+	mrc	p15, 0, r3, c5, c0, 0		@ get FSR
+	sbc	r1, r1, r1			@ r1 = C - 1
+	and	r3, r3, #255
+	mov	pc, lr
+	
+/*
+ * cpu_arm922_check_bugs()
+ */
+ENTRY(cpu_arm922_check_bugs)
+	mrs	ip, cpsr
+	bic	ip, ip, #F_BIT
+	msr	cpsr, ip
+	mov	pc, lr
+
+/*
+ * cpu_arm922_proc_init()
+ */
+ENTRY(cpu_arm922_proc_init)
+	mov	pc, lr
+
+/*
+ * cpu_arm922_proc_fin()
+ */
+ENTRY(cpu_arm922_proc_fin)
+	stmfd	sp!, {lr}
+	mov	ip, #F_BIT | I_BIT | SVC_MODE
+	msr	cpsr_c, ip
+	bl	cpu_arm922_cache_clean_invalidate_all
+	mrc	p15, 0, r0, c1, c0, 0		@ ctrl register
+	bic	r0, r0, #0x1000			@ ...i............
+	bic	r0, r0, #0x000e			@ ............wca.
+	mcr	p15, 0, r0, c1, c0, 0		@ disable caches
+	ldmfd	sp!, {pc}
+
+/*
+ * cpu_arm922_reset(loc)
+ *
+ * Perform a soft reset of the system.  Put the CPU into the
+ * same state as it would be if it had been reset, and branch
+ * to what would be the reset vector.
+ *
+ * loc: location to jump to for soft reset
+ */
+	.align	5
+ENTRY(cpu_arm922_reset)
+	mov	ip, #0
+	mcr	p15, 0, ip, c7, c7, 0		@ invalidate I,D caches
+	mcr	p15, 0, ip, c7, c10, 4		@ drain WB
+	mcr	p15, 0, ip, c8, c7, 0		@ invalidate I & D TLBs
+	mrc	p15, 0, ip, c1, c0, 0		@ ctrl register
+	bic	ip, ip, #0x000f			@ ............wcam
+	bic	ip, ip, #0x1100			@ ...i...s........
+	mcr	p15, 0, ip, c1, c0, 0		@ ctrl register
+	mov	pc, r0
+
+/*
+ * cpu_arm922_do_idle()
+ */
+	.align	5
+ENTRY(cpu_arm922_do_idle)
+#if defined(CONFIG_CPU_ARM922_CPU_IDLE)
+	mcr	p15, 0, r0, c7, c0, 4		@ Wait for interrupt
+#endif
+	mov	pc, lr
+
+/* ================================= CACHE ================================ */
+
+
+/*
+ * cpu_arm922_cache_clean_invalidate_all()
+ *
+ * clean and invalidate all cache lines
+ *
+ * Note:
+ *  1. we should preserve r0 at all times
+ */
+	.align	5
+ENTRY(cpu_arm922_cache_clean_invalidate_all)
+	mov	r2, #1
+cpu_arm922_cache_clean_invalidate_all_r2:
+	mov	ip, #0
+#ifdef CONFIG_CPU_ARM922_WRITETHROUGH
+	mcr	p15, 0, ip, c7, c6, 0		@ invalidate D cache
+#else
+/*
+ * 'Clean & Invalidate whole DCache'
+ * Re-written to use Index Ops.
+ * Uses registers r1, r3 and ip
+ */
+	mov	r1, #3 << 5			@ 4 segments
+1:	orr	r3, r1, #63 << 26		@ 64 entries
+2:	mcr	p15, 0, r3, c7, c14, 2		@ clean & invalidate D index
+	subs	r3, r3, #1 << 26
+	bcs	2b				@ entries 63 to 0
+	subs	r1, r1, #1 << 5
+	bcs	1b				@ segments 7 to 0
+#endif
+	teq	r2, #0
+	mcrne	p15, 0, ip, c7, c5, 0		@ invalidate I cache
+	mcr	p15, 0, ip, c7, c10, 4		@ drain WB
+	mov	pc, lr
+
+/*
+ * cpu_arm922_cache_clean_invalidate_range(start, end, flags)
+ *
+ * clean and invalidate all cache lines associated with this area of memory
+ *
+ * start: Area start address
+ * end:   Area end address
+ * flags: nonzero for I cache as well
+ */
+		.align	5
+ENTRY(cpu_arm922_cache_clean_invalidate_range)
+	bic	r0, r0, #DCACHELINESIZE - 1	@ && added by PGM
+	bic	r1, r1, #DCACHELINESIZE - 1     @ && added by DHM
+	sub	r3, r1, r0
+	cmp	r3, #MAX_AREA_SIZE
+	bgt	cpu_arm922_cache_clean_invalidate_all_r2
+1:	teq	r2, #0
+#ifdef CONFIG_CPU_ARM922_WRITETHROUGH
+	mcr	p15, 0, r0, c7, c6, 1		@ invalidate D entry
+	mcrne	p15, 0, r0, c7, c5, 1		@ invalidate I entry
+	add	r0, r0, #DCACHELINESIZE
+	mcr	p15, 0, r0, c7, c6, 1		@ invalidate D entry
+	mcrne	p15, 0, r0, c7, c5, 1		@ invalidate I entry
+	add	r0, r0, #DCACHELINESIZE
+#else
+	mcr	p15, 0, r0, c7, c14, 1		@ clean and invalidate D entry
+	mcrne	p15, 0, r0, c7, c5, 1		@ invalidate I entry
+	add	r0, r0, #DCACHELINESIZE
+	mcr	p15, 0, r0, c7, c14, 1		@ clean and invalidate D entry
+	mcrne	p15, 0, r0, c7, c5, 1		@ invalidate I entry
+	add	r0, r0, #DCACHELINESIZE
+#endif
+	cmp	r0, r1
+	blt	1b
+
+	mcr	p15, 0, r1, c7, c10, 4		@ drain WB
+	mov	pc, lr
+
+/*
+ * cpu_arm922_flush_ram_page(page)
+ *
+ * clean and invalidate all cache lines associated with this area of memory
+ *
+ * page: page to clean and invalidate
+ */
+	.align	5
+ENTRY(cpu_arm922_flush_ram_page)
+	mov	r1, #PAGESIZE
+#ifdef CONFIG_CPU_ARM922_WRITETHROUGH
+1:	mcr	p15, 0, r0, c7, c6, 1		@ invalidate D entry
+	add	r0, r0, #DCACHELINESIZE
+	mcr	p15, 0, r0, c7, c6, 1		@ invalidate D entry
+	add	r0, r0, #DCACHELINESIZE
+#else
+1:	mcr	p15, 0, r0, c7, c14, 1		@ clean and invalidate D entry
+	add	r0, r0, #DCACHELINESIZE
+	mcr	p15, 0, r0, c7, c14, 1		@ clean and invalidate D entry
+	add	r0, r0, #DCACHELINESIZE
+#endif
+	subs	r1, r1, #2 * DCACHELINESIZE
+	bne	1b
+	mcr	p15, 0, r1, c7, c10, 4		@ drain WB
+	mov	pc, lr
+
+/* ================================ D-CACHE =============================== */
+
+/*
+ * cpu_arm922_dcache_invalidate_range(start, end)
+ *
+ * throw away all D-cached data in specified region without an obligation
+ * to write them back.  Note however that we must clean the D-cached entries
+ * around the boundaries if the start and/or end address are not cache
+ * aligned.
+ *
+ * start: virtual start address
+ * end:   virtual end address
+ */
+	.align	5
+ENTRY(cpu_arm922_dcache_invalidate_range)
+#ifndef CONFIG_CPU_ARM922_WRITETHROUGH
+	tst	r0, #DCACHELINESIZE - 1
+	mcrne	p15, 0, r0, c7, c10, 1		@ clean D entry
+	tst	r1, #DCACHELINESIZE - 1
+	mcrne	p15, 0, r1, c7, c10, 1		@ clean D entry
+#endif		@ clean D entry
+	bic	r0, r0, #DCACHELINESIZE - 1
+	bic	r1, r1, #DCACHELINESIZE - 1
+1:	mcr	p15, 0, r0, c7, c6, 1		@ invalidate D entry
+	add	r0, r0, #DCACHELINESIZE
+	cmp	r0, r1
+	blt	1b
+	mov	pc, lr
+
+/*
+ * cpu_arm922_dcache_clean_range(start, end)
+ *
+ * For the specified virtual address range, ensure that all caches contain
+ * clean data, such that peripheral accesses to the physical RAM fetch
+ * correct data.
+ *
+ * start: virtual start address
+ * end:   virtual end address
+ */
+	.align	5
+ENTRY(cpu_arm922_dcache_clean_range)
+#ifndef CONFIG_CPU_ARM922_WRITETHROUGH
+	bic	r0, r0, #DCACHELINESIZE - 1
+	sub	r1, r1, r0
+	cmp	r1, #MAX_AREA_SIZE
+	mov	r2, #0
+	bgt	cpu_arm922_cache_clean_invalidate_all_r2
+
+	bic	r1, r1, #DCACHELINESIZE -1
+	add	r1, r1, #DCACHELINESIZE
+
+1:	mcr	p15, 0, r0, c7, c10, 1		@ clean D entry
+	add	r0, r0, #DCACHELINESIZE
+	subs	r1, r1, #DCACHELINESIZE
+	bpl	1b
+#endif
+	mcr	p15, 0, r2, c7, c10, 4		@ drain WB
+	mov	pc, lr
+
+/*
+ * cpu_arm922_dcache_clean_page(page)
+ *
+ * Cleans a single page of dcache so that if we have any future aliased
+ * mappings, they will be consistent at the time that they are created.
+ *
+ * page: virtual address of page to clean from dcache
+ *
+ * Note:
+ *  1. we don't need to flush the write buffer in this case.
+ *  2. we don't invalidate the entries since when we write the page
+ *     out to disk, the entries may get reloaded into the cache.
+ */
+	.align	5
+ENTRY(cpu_arm922_dcache_clean_page)
+#ifndef CONFIG_CPU_ARM922_WRITETHROUGH
+	mov	r1, #PAGESIZE
+1:	mcr	p15, 0, r0, c7, c10, 1		@ clean D entry
+	add	r0, r0, #DCACHELINESIZE
+	mcr	p15, 0, r0, c7, c10, 1		@ clean D entry
+	add	r0, r0, #DCACHELINESIZE
+	subs	r1, r1, #2 * DCACHELINESIZE
+	bne	1b
+#endif
+	mov	pc, lr
+
+/*
+ * cpu_arm922_dcache_clean_entry(addr)
+ *
+ * Clean the specified entry of any caches such that the MMU
+ * translation fetches will obtain correct data.
+ *
+ * addr: cache-unaligned virtual address
+ */
+	.align	5
+ENTRY(cpu_arm922_dcache_clean_entry)
+#ifndef CONFIG_CPU_ARM922_WRITETHROUGH
+	mcr	p15, 0, r0, c7, c10, 1		@ clean D entry
+#endif
+	mcr	p15, 0, r0, c7, c10, 4		@ drain WB
+	mov	pc, lr
+
+/* ================================ I-CACHE =============================== */
+
+/*
+ * cpu_arm922_icache_invalidate_range(start, end)
+ *
+ * invalidate a range of virtual addresses from the Icache
+ *
+ * This is a little misleading, it is not intended to clean out
+ * the i-cache but to make sure that any data written to the
+ * range is made consistant.  This means that when we execute code
+ * in that region, everything works as we expect.
+ *
+ * This generally means writing back data in the Dcache and
+ * write buffer and flushing the Icache over that region
+ *
+ * start: virtual start address
+ * end:   virtual end address
+ *
+ * NOTE: ICACHELINESIZE == DCACHELINESIZE (so we don't need to
+ * loop twice, once for i-cache, once for d-cache)
+ */
+	.align	5
+ENTRY(cpu_arm922_icache_invalidate_range)
+	bic	r0, r0, #ICACHELINESIZE - 1	@ Safety check
+	sub	r1, r1, r0
+	cmp	r1, #MAX_AREA_SIZE
+	bgt	cpu_arm922_cache_clean_invalidate_all_r2
+
+	bic	r1, r1, #ICACHELINESIZE - 1
+	add	r1, r1, #ICACHELINESIZE
+
+1:	mcr	p15, 0, r0, c7, c5, 1		@ Clean I entry
+	mcr	p15, 0, r0, c7, c10, 1		@ Clean D entry
+	add	r0, r0, #ICACHELINESIZE
+	subs	r1, r1, #ICACHELINESIZE
+	bne	1b
+
+	mov	r0, #0
+	mcr	p15, 0, r0, c7, c10, 4		@ drain WB
+	mov	pc, lr
+
+ENTRY(cpu_arm922_icache_invalidate_page)
+	mcr	p15, 0, r0, c7, c5, 0		@ invalidate I cache
+	mov	pc, lr
+
+/* ================================== TLB ================================= */
+
+/*
+ * cpu_arm922_tlb_invalidate_all()
+ *
+ * Invalidate all TLB entries
+ */
+	.align	5
+ENTRY(cpu_arm922_tlb_invalidate_all)
+	mov	r0, #0
+	mcr	p15, 0, r0, c7, c10, 4		@ drain WB
+	mcr	p15, 0, r0, c8, c7, 0		@ invalidate I & D TLBs
+	mov	pc, lr
+
+/*
+ * cpu_arm922_tlb_invalidate_range(start, end)
+ *
+ * invalidate TLB entries covering the specified range
+ *
+ * start: range start address
+ * end:   range end address
+ */
+	.align	5
+ENTRY(cpu_arm922_tlb_invalidate_range)
+	mov	r3, #0
+	mcr	p15, 0, r3, c7, c10, 4		@ drain WB
+
+	mov	r3, #PAGESIZE
+	sub	r3, r3, #1
+	bic 	r0, r0, r3
+	bic	r1, r1, r3
+
+1:	mcr	p15, 0, r0, c8, c6, 1		@ invalidate D TLB entry
+	mcr	p15, 0, r0, c8, c5, 1		@ invalidate I TLB entry
+	add	r0, r0, #PAGESIZE
+	cmp	r0, r1
+	blt	1b
+	mov	pc, lr
+
+/*
+ * cpu_arm922_tlb_invalidate_page(page, flags)
+ *
+ * invalidate the TLB entries for the specified page.
+ *
+ * page:  page to invalidate
+ * flags: non-zero if we include the I TLB
+ */
+	.align	5
+ENTRY(cpu_arm922_tlb_invalidate_page)
+	mov	r3, #0
+	mcr	p15, 0, r3, c7, c10, 4		@ drain WB
+	teq	r1, #0
+	mcr	p15, 0, r0, c8, c6, 1		@ invalidate D TLB entry
+	mcrne	p15, 0, r0, c8, c5, 1		@ invalidate I TLB entry
+	mov	pc, lr
+
+/* =============================== PageTable ============================== */
+
+/*
+ * cpu_arm922_set_pgd(pgd)
+ *
+ * Set the translation base pointer to be as described by pgd.
+ *
+ * pgd: new page tables
+ */
+	.align	5
+ENTRY(cpu_arm922_set_pgd)
+	mov	ip, #0
+#ifdef CONFIG_CPU_ARM922_WRITETHROUGH
+	/* Any reason why we don't use mcr p15, 0, r0, c7, c7, 0 here? --rmk */
+	mcr	p15, 0, ip, c7, c6, 0		@ invalidate D cache
+#else
+@ && 'Clean & Invalidate whole DCache'
+@ && Re-written to use Index Ops.
+@ && Uses registers r1, r3 and ip
+
+	mov	r1, #3 << 5			@ 4 segments
+1:	orr	r3, r1, #63 << 26		@ 64 entries
+2:	mcr	p15, 0, r3, c7, c14, 2		@ clean & invalidate D index
+	subs	r3, r3, #1 << 26
+	bcs	2b				@ entries 63 to 0
+	subs	r1, r1, #1 << 5
+	bcs	1b				@ segments 7 to 0
+#endif
+	mcr	p15, 0, ip, c7, c5, 0		@ invalidate I cache
+	mcr	p15, 0, ip, c7, c10, 4		@ drain WB
+	mcr	p15, 0, r0, c2, c0, 0		@ load page table pointer
+	mcr	p15, 0, ip, c8, c7, 0		@ invalidate I & D TLBs
+	mov	pc, lr
+
+/*
+ * cpu_arm922_set_pmd(pmdp, pmd)
+ *
+ * Set a level 1 translation table entry, and clean it out of
+ * any caches such that the MMUs can load it correctly.
+ *
+ * pmdp: pointer to PMD entry
+ * pmd:  PMD value to store
+ */
+	.align	5
+ENTRY(cpu_arm922_set_pmd)
+#ifdef CONFIG_CPU_ARM922_WRITETHROUGH
+	eor	r2, r1, #0x0a			@ C & Section
+	tst	r2, #0x0b
+	biceq	r1, r1, #4			@ clear bufferable bit
+#endif
+	str	r1, [r0]
+	mcr	p15, 0, r0, c7, c10, 1		@ clean D entry
+	mcr	p15, 0, r0, c7, c10, 4		@ drain WB
+	mov	pc, lr
+
+/*
+ * cpu_arm922_set_pte(ptep, pte)
+ *
+ * Set a PTE and flush it out
+ */
+	.align	5
+ENTRY(cpu_arm922_set_pte)
+	str	r1, [r0], #-1024		@ linux version
+
+	eor	r1, r1, #LPTE_PRESENT | LPTE_YOUNG | LPTE_WRITE | LPTE_DIRTY
+
+	bic	r2, r1, #0xff0
+	bic	r2, r2, #3
+	orr	r2, r2, #HPTE_TYPE_SMALL
+
+	tst	r1, #LPTE_USER | LPTE_EXEC	@ User or Exec?
+	orrne	r2, r2, #HPTE_AP_READ
+
+	tst	r1, #LPTE_WRITE | LPTE_DIRTY	@ Write and Dirty?
+	orreq	r2, r2, #HPTE_AP_WRITE
+
+	tst	r1, #LPTE_PRESENT | LPTE_YOUNG	@ Present and Young?
+	movne	r2, #0
+
+#ifdef CONFIG_CPU_ARM922_WRITETHROUGH
+	eor	r3, r2, #0x0a			@ C & small page?
+	tst	r3, #0x0b
+	biceq	r2, r2, #4
+#endif
+	str	r2, [r0]			@ hardware version
+	mov	r0, r0
+	mcr	p15, 0, r0, c7, c10, 1		@ clean D entry
+	mcr	p15, 0, r0, c7, c10, 4		@ drain WB
+	mov	pc, lr
+
+
+cpu_manu_name:
+	.asciz	"ARM/ALTERA"
+ENTRY(cpu_arm922_name)
+	.ascii	"Arm922T"
+#if defined(CONFIG_CPU_ARM922_CPU_IDLE)
+	.ascii	"s"
+#endif
+#if defined(CONFIG_CPU_ARM922_I_CACHE_ON)
+	.ascii	"i"
+#endif
+#if defined(CONFIG_CPU_ARM922_D_CACHE_ON)
+	.ascii	"d"
+#if defined(CONFIG_CPU_ARM922_WRITETHROUGH)
+	.ascii	"(wt)"
+#else
+	.ascii	"(wb)"
+#endif
+#endif
+	.ascii	"\0"
+	.align
+
+	.section ".text.init", #alloc, #execinstr
+
+__arm922_setup:
+	mov	r0, #0
+	mcr	p15, 0, r0, c7, c7		@ invalidate I,D caches on v4
+	mcr	p15, 0, r0, c7, c10, 4		@ drain write buffer on v4
+	mcr	p15, 0, r0, c8, c7		@ invalidate I,D TLBs on v4
+	mcr	p15, 0, r4, c2, c0		@ load page table pointer
+	mov	r0, #0x1f			@ Domains 0, 1 = client
+	mcr	p15, 0, r0, c3, c0		@ load domain access register
+	mrc	p15, 0, r0, c1, c0		@ get control register v4
+/*
+ * Clear out 'unwanted' bits (then put them in if we need them)
+ */
+						@   VI ZFRS BLDP WCAM
+	bic	r0, r0, #0x0e00
+	bic	r0, r0, #0x0002
+	bic	r0, r0, #0x000c
+	bic	r0, r0, #0x1000			@ ...0 000. .... 000.
+/*
+ * Turn on what we want
+ */
+	orr	r0, r0, #0x0031
+	orr	r0, r0, #0x2100			@ ..1. ...1 ..11 ...1
+
+#ifdef CONFIG_CPU_ARM922_D_CACHE_ON
+	orr	r0, r0, #0x0004			@ .... .... .... .1..
+#endif
+#ifdef CONFIG_CPU_ARM922_I_CACHE_ON
+	orr	r0, r0, #0x1000			@ ...1 .... .... ....
+#endif
+	mov	pc, lr
+
+	.text
+
+/*
+ * Purpose : Function pointers used to access above functions - all calls
+ *	     come through these
+ */
+	.type	arm922_processor_functions, #object
+arm922_processor_functions:
+	.word	cpu_arm922_data_abort
+	.word	cpu_arm922_check_bugs
+	.word	cpu_arm922_proc_init
+	.word	cpu_arm922_proc_fin
+	.word	cpu_arm922_reset
+	.word   cpu_arm922_do_idle
+
+	/* cache */
+	.word	cpu_arm922_cache_clean_invalidate_all
+	.word	cpu_arm922_cache_clean_invalidate_range
+	.word	cpu_arm922_flush_ram_page
+
+	/* dcache */
+	.word	cpu_arm922_dcache_invalidate_range
+	.word	cpu_arm922_dcache_clean_range
+	.word	cpu_arm922_dcache_clean_page
+	.word	cpu_arm922_dcache_clean_entry
+
+	/* icache */
+	.word	cpu_arm922_icache_invalidate_range
+	.word	cpu_arm922_icache_invalidate_page
+
+	/* tlb */
+	.word	cpu_arm922_tlb_invalidate_all
+	.word	cpu_arm922_tlb_invalidate_range
+	.word	cpu_arm922_tlb_invalidate_page
+
+	/* pgtable */
+	.word	cpu_arm922_set_pgd
+	.word	cpu_arm922_set_pmd
+	.word	cpu_arm922_set_pte
+	.size	arm922_processor_functions, . - arm922_processor_functions
+
+	.type	cpu_arm922_info, #object
+cpu_arm922_info:
+	.long	cpu_manu_name
+	.long	cpu_arm922_name
+	.size	cpu_arm922_info, . - cpu_arm922_info
+
+	.type	cpu_arch_name, #object
+cpu_arch_name:
+	.asciz	"armv4"
+	.size	cpu_arch_name, . - cpu_arch_name
+
+	.type	cpu_elf_name, #object
+cpu_elf_name:
+	.asciz	"v4"
+	.size	cpu_elf_name, . - cpu_elf_name
+	.align
+
+	.section ".proc.info", #alloc, #execinstr
+
+	.type	__arm922_proc_info,#object
+__arm922_proc_info:
+	.long	0x41009220
+	.long	0xff00fff0
+	.long	0x00000c1e			@ mmuflags
+	b	__arm922_setup
+	.long	cpu_arch_name
+	.long	cpu_elf_name
+	.long	HWCAP_SWP | HWCAP_HALF | HWCAP_26BIT
+	.long	cpu_arm922_info
+	.long	arm922_processor_functions
+	.size	__arm922_proc_info, . - __arm922_proc_info
diff -Nru linux/arch/arm/mm/proc-arm926.S linux-2.4.19-pre5-mjc/arch/arm/mm/proc-arm926.S
--- linux/arch/arm/mm/proc-arm926.S	Fri Nov  9 16:58:02 2001
+++ linux-2.4.19-pre5-mjc/arch/arm/mm/proc-arm926.S	Sat Apr  6 08:25:58 2002
@@ -56,35 +56,39 @@
  * cpu_arm926_data_abort()
  *
  * obtain information about current aborted instruction
+ * Note: we read user space.  This means we might cause a data
+ * abort here if the I-TLB and D-TLB aren't seeing the same
+ * picture.  Unfortunately, this does happen.  We live with it.
  *
  * Inputs:
- *  r0 = address of abort 
- *  r1 = cpsr of abort 
+ *  r2 = address of abort 
+ *  r3 = cpsr of abort
  *
  * Returns:
  *  r0 = address of abort
  *  r1 != 0 if writing
  *  r3 = FSR
+ *  r4 = corrupted
  */
 	.align	5
 ENTRY(cpu_arm926_data_abort)
-	tst	r1, #1<<24			@ Check for Jbit (NE -> found)
-	movne	r1, #-1 			@ Mark as writing
+	mrc	p15, 0, r0, c6, c0, 0		@ get FAR
+	mrc	p15, 0, r4, c5, c0, 0		@ get FSR
+
+	tst	r3, #1<<24			@ Check for Jbit (NE -> found)
+	movne	r3, #-1 			@ Mark as writing
 	bne	2f
 
-	tst	r1, #1<<5			@ Check for Thumb-bit (NE -> found)
-	ldrneh	r1, [r0]			@ Read aborted Thumb instruction        
+	tst	r3, #1<<5			@ Check for Thumb-bit (NE -> found)
+	ldrneh	r1, [r2]			@ Read aborted Thumb instruction        
 	tstne	r1, r1, lsr #12 		@ C = bit 11
 
-	ldreq	r1, [r0]			@ Read aborted ARM instruction
+	ldreq	r1, [r2]			@ Read aborted ARM instruction
 	tsteq	r1, r1, lsr #21 		@ C = bit 20
 
 	sbc	r1, r1, r1			@ r1 = C - 1
 2:
-	mrc	p15, 0, r3, c5, c0, 0		@ get FSR
-	and	r3, r3, #255
-	mrc	p15, 0, r0, c6, c0, 0		@ get FAR
-
+	and	r3, r4, #255
 	mov	pc, lr
 
 /*
@@ -193,10 +197,9 @@
 	.align	5
 ENTRY(cpu_arm926_cache_clean_invalidate_range)
 	bic	r0, r0, #DCACHELINESIZE - 1	@ && added by PGM
-	bic	r1, r1, #DCACHELINESIZE - 1	@ && added by DHM
 	sub	r3, r1, r0
 	cmp	r3, #MAX_AREA_SIZE
-	bgt	cpu_arm926_cache_clean_invalidate_all_r2
+	bhi	cpu_arm926_cache_clean_invalidate_all_r2
 
 1:	teq	r2, #0
 #ifdef CONFIG_CPU_ARM926_WRITETHROUGH
@@ -216,7 +219,7 @@
 #endif
         
 	cmp	r0, r1
-	blt	1b
+	blo	1b
 
 	mcr	p15, 0, r1, c7, c10, 4		@ drain WB
 
@@ -267,14 +270,13 @@
 	tst	r0, #DCACHELINESIZE - 1
 	mcrne	p15, 0, r0, c7, c10, 1		@ clean D entry
 	tst	r1, #DCACHELINESIZE - 1
-	mcrne	p15, 0, r1, c7, c10, 1
-#endif		@ clean D entry
+	mcrne	p15, 0, r1, c7, c10, 1		@ clean D entry
+#endif
 	bic	r0, r0, #DCACHELINESIZE - 1
-	bic	r1, r1, #DCACHELINESIZE - 1
 1:	mcr	p15, 0, r0, c7, c6, 1		@ invalidate D entry
 	add	r0, r0, #DCACHELINESIZE
 	cmp	r0, r1
-	blt	1b
+	blo	1b
 	mov	pc, lr
 
 /*
@@ -291,18 +293,15 @@
 ENTRY(cpu_arm926_dcache_clean_range)
 #ifndef CONFIG_CPU_ARM926_WRITETHROUGH
 	bic	r0, r0, #DCACHELINESIZE - 1
-	sub	r1, r1, r0
-	cmp	r1, #MAX_AREA_SIZE
+	sub	r3, r1, r0
+	cmp	r3, #MAX_AREA_SIZE
 	mov	r2, #0
-	bgt	cpu_arm926_cache_clean_invalidate_all_r2
-
-	bic	r1, r1, #DCACHELINESIZE -1
-	add	r1, r1, #DCACHELINESIZE
+	bhi	cpu_arm926_cache_clean_invalidate_all_r2
 
 1:	mcr	p15, 0, r0, c7, c10, 1		@ clean D entry
 	add	r0, r0, #DCACHELINESIZE
-	subs	r1, r1, #DCACHELINESIZE
-	bpl	1b
+	cmp	r0, r1
+	blo	1b
 #endif
 	mcr	p15, 0, r2, c7, c10, 4		@ drain WB
 	mov	pc, lr
@@ -354,7 +353,12 @@
 /*
  * cpu_arm926_icache_invalidate_range(start, end)
  *
- * invalidate a range of virtual addresses from the Icache
+ * This *is not* just icache.  It is to make data written to memory
+ * consistent such that instructions fetched from the region are what
+ * we expect.
+ *
+ * This is typically used after we have copied a module into kernel space,
+ * and we're about to start executing code from that module.
  *
  * start: virtual start address
  * end:   virtual end address
@@ -362,17 +366,14 @@
 	.align	5
 ENTRY(cpu_arm926_icache_invalidate_range)
 	bic	r0, r0, #DCACHELINESIZE - 1	@ Safety check
-	sub	r1, r1, r0
-	cmp	r1, #MAX_AREA_SIZE
-	bgt	cpu_arm926_cache_clean_invalidate_all_r2
-
-	bic	r1, r1, #DCACHELINESIZE - 1
-	add	r1, r1, #DCACHELINESIZE
+	sub	r3, r1, r0
+	cmp	r3, #MAX_AREA_SIZE
+	bhi	cpu_arm926_cache_clean_invalidate_all_r2
 
 1:	mcr	p15, 0, r0, c7, c5, 1		@ clean I entries
 	add	r0, r0, #DCACHELINESIZE
-	subs	r1, r1, #DCACHELINESIZE
-	bne	1b
+	cmp	r0, r1
+	blo	1b
 
 	mov	r0, #0
 	mcr	p15, 0, r0, c7, c10, 4		@ drain WB
@@ -410,16 +411,14 @@
 	mov	r3, #0
 	mcr	p15, 0, r3, c7, c10, 4		@ drain WB
 
-	mov	r3, #PAGESIZE
-	sub	r3, r3, #1
-	bic	r0, r0, r3
-	bic	r1, r1, r3
+	bic	r0, r0, #(PAGESIZE - 1) & 0x00ff
+	bic	r0, r0, #(PAGESIZE - 1) & 0xff00
 
 1:	mcr	p15, 0, r0, c8, c6, 1		@ invalidate D TLB entry
 	mcr	p15, 0, r0, c8, c5, 1		@ invalidate I TLB entry
 	add	r0, r0, #PAGESIZE
 	cmp	r0, r1
-	blt	1b
+	blo	1b
 	mov	pc, lr
 
 /*
diff -Nru linux/arch/arm/mm/proc-sa110.S linux-2.4.19-pre5-mjc/arch/arm/mm/proc-sa110.S
--- linux/arch/arm/mm/proc-sa110.S	Thu Oct 25 16:53:46 2001
+++ linux-2.4.19-pre5-mjc/arch/arm/mm/proc-sa110.S	Sat Apr  6 08:25:58 2002
@@ -69,24 +69,29 @@
 /*
  * cpu_sa110_data_abort()
  *
- * obtain information about current aborted instruction
+ * obtain information about current aborted instruction.
+ * Note: we read user space.  This means we might cause a data
+ * abort here if the I-TLB and D-TLB aren't seeing the same
+ * picture.  Unfortunately, this does happen.  We live with it.
  *
- * r0 = address of aborted instruction
+ *  r2 = address of aborted instruction
+ *  r3 = cpsr
  *
  * Returns:
  *  r0 = address of abort
  *  r1 != 0 if writing
  *  r3 = FSR
+ *  r4 = corrupted
  */
 	.align	5
 ENTRY(cpu_sa110_data_abort)
 ENTRY(cpu_sa1100_data_abort)
-	ldr	r1, [r0]			@ read aborted instruction
+	mrc	p15, 0, r3, c5, c0, 0		@ get FSR
 	mrc	p15, 0, r0, c6, c0, 0		@ get FAR
+	ldr	r1, [r2]			@ read aborted instruction
+	and	r3, r3, #255
 	tst	r1, r1, lsr #21			@ C = bit 20
-	mrc	p15, 0, r3, c5, c0, 0		@ get FSR
 	sbc	r1, r1, r1			@ r1 = C - 1
-	and	r3, r3, #255
 	mov	pc, lr
 
 /*
diff -Nru linux/arch/arm/nwfpe/ARM-gcc.h linux-2.4.19-pre5-mjc/arch/arm/nwfpe/ARM-gcc.h
--- linux/arch/arm/nwfpe/ARM-gcc.h	Thu Jun 17 04:11:35 1999
+++ linux-2.4.19-pre5-mjc/arch/arm/nwfpe/ARM-gcc.h	Sat Apr  6 08:25:58 2002
@@ -1,11 +1,3 @@
-
-/*
--------------------------------------------------------------------------------
-One of the macros `BIGENDIAN' or `LITTLEENDIAN' must be defined.
--------------------------------------------------------------------------------
-*/
-#define LITTLEENDIAN
-
 /*
 -------------------------------------------------------------------------------
 The macro `BITS64' can be defined to indicate that 64-bit integer types are
diff -Nru linux/arch/arm/nwfpe/ChangeLog linux-2.4.19-pre5-mjc/arch/arm/nwfpe/ChangeLog
--- linux/arch/arm/nwfpe/ChangeLog	Wed Oct 20 19:29:08 1999
+++ linux-2.4.19-pre5-mjc/arch/arm/nwfpe/ChangeLog	Sat Apr  6 08:25:58 2002
@@ -1,3 +1,26 @@
+2002-01-19  Russell King <rmk@arm.linux.org.uk>
+
+	* fpa11.h - Add documentation
+	          - remove userRegisters pointer from this structure.
+	          - add new method to obtain integer register values.
+	* softfloat.c - Remove float128
+	* softfloat.h - Remove float128
+	* softfloat-specialize - Remove float128
+
+	* The FPA11 structure is not a kernel-specific data structure.
+	  It is used by users of ptrace to examine the values of the
+	  floating point registers.  Therefore, any changes to the
+	  FPA11 structure (size or position of elements contained
+	  within) have to be well thought out.
+
+	* Since 128-bit float requires the FPA11 structure to change
+	  size, it has been removed.  128-bit float is currently unused,
+	  and needs various things to be re-worked so that we won't
+	  overflow the available space in the task structure.
+
+	* The changes are designed to break any patch that goes on top
+	  of this code, so that the authors properly review their changes.
+
 1999-08-19  Scott Bambrough  <scottb@netwinder.org>
 
 	* fpmodule.c - Changed version number to 0.95
diff -Nru linux/arch/arm/nwfpe/double_cpdo.c linux-2.4.19-pre5-mjc/arch/arm/nwfpe/double_cpdo.c
--- linux/arch/arm/nwfpe/double_cpdo.c	Sun Aug 12 14:13:59 2001
+++ linux-2.4.19-pre5-mjc/arch/arm/nwfpe/double_cpdo.c	Sat Apr  6 08:25:58 2002
@@ -19,9 +19,9 @@
     Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
 */
 
+#include "fpa11.h"
 #include "softfloat.h"
 #include "fpopcode.h"
-#include "fpa11.h"
 
 float64 float64_exp(float64 Fm);
 float64 float64_ln(float64 Fm);
@@ -165,8 +165,7 @@
 
       case RND_CODE:
       case URD_CODE:
-         fpa11->fpreg[Fd].fDouble = 
-             int32_to_float64(float64_to_int32(rFm));
+         fpa11->fpreg[Fd].fDouble = float64_round_to_int(rFm);
       break;
 
       case SQT_CODE:
diff -Nru linux/arch/arm/nwfpe/entry.S linux-2.4.19-pre5-mjc/arch/arm/nwfpe/entry.S
--- linux/arch/arm/nwfpe/entry.S	Sun Aug 12 14:13:59 2001
+++ linux-2.4.19-pre5-mjc/arch/arm/nwfpe/entry.S	Sat Apr  6 08:25:58 2002
@@ -50,11 +50,8 @@
 
 This routine does three things:
 
-1) It saves SP into a variable called userRegisters.  The kernel has
-created a struct pt_regs on the stack and saved the user registers
-into it.  See /usr/include/asm/proc/ptrace.h for details.  The
-emulator code uses userRegisters as the base of an array of words from
-which the contents of the registers can be extracted.
+1) The kernel has created a struct pt_regs on the stack and saved the
+user registers into it.  See inclue/asm-arm/proc/ptrace.h for details.
 
 2) It calls EmulateAll to emulate a floating point instruction.
 EmulateAll returns 1 if the emulation was successful, or 0 if not.
@@ -73,21 +70,16 @@
 
 	.globl	nwfpe_enter
 nwfpe_enter:
-	/* ?? Could put userRegisters and fpa11 into fixed regs during
-	   emulation.  This would reduce load/store overhead at the expense
-	   of stealing two regs from the register allocator.  Not sure if
-	   it's worth it.  */
-	str sp, [r10]                   @ Store the user registers pointer in the fpa11 structure.
-        mov r4, sp			@ use r4 for local pointer
-        mov r10, lr			@ save the failure-return addresses
+        mov r4, lr			@ save the failure-return addresses
+	mov sl, sp			@ we access the registers via 'sl'
 
-        ldr r5, [r4, #60]	 	@ get contents of PC;
+        ldr r5, [sp, #60]	 	@ get contents of PC;
 	sub r8, r5, #4
 .Lx2:	ldrt r0, [r8]			@ get actual instruction into r0
 emulate:
 	bl EmulateAll			@ emulate the instruction
    	cmp r0, #0			@ was emulation successful
-        moveq pc, r10			@ no, return failure
+        moveq pc, r4			@ no, return failure
 
 next:
 .Lx1:	ldrt r6, [r5], #4		@ get the next instruction and
@@ -99,10 +91,10 @@
         teqne r2, #0x0E000000
         movne pc, r9			@ return ok if not a fp insn
 
-        str r5, [r4, #60]		@ update PC copy in regs
+        str r5, [sp, #60]		@ update PC copy in regs
 
         mov r0, r6			@ save a copy
-        ldr r1, [r4, #64]		@ fetch the condition codes
+        ldr r1, [sp, #64]		@ fetch the condition codes
    	bl  checkCondition		@ check the condition
    	cmp r0, #0			@ r0 = 0 ==> condition failed
 
diff -Nru linux/arch/arm/nwfpe/entry26.S linux-2.4.19-pre5-mjc/arch/arm/nwfpe/entry26.S
--- linux/arch/arm/nwfpe/entry26.S	Wed Apr 11 22:02:27 2001
+++ linux-2.4.19-pre5-mjc/arch/arm/nwfpe/entry26.S	Sat Apr  6 08:25:58 2002
@@ -65,18 +65,8 @@
 
 	.globl	nwfpe_enter
 nwfpe_enter:
-	ldr	r4, =userRegisters
-	str	sp, [r4]		@ save pointer to user regs
-
-	mov	r10, sp, lsr #13	@ find workspace
-	mov	r10, r10, lsl #13
-	add	r10, r10, #TSS_FPESAVE
-
-	ldr	r4, =fpa11
-	str	r10, [r4]		@ store pointer to our state
-	mov	r4, sp			@ use r4 for local pointer
-
-	ldr	r5, [r4, #60]		@ get contents of PC
+	mov	sl, sp
+	ldr	r5, [sp, #60]		@ get contents of PC
 	bic	r5, r5, #0xfc000003
 	ldr	r0, [r5, #-4]		@ get actual instruction into r0
 	bl	EmulateAll		@ emulate the instruction
@@ -93,10 +83,10 @@
 	teqne	r2, #0x0E000000
 	bne	ret_from_exception	@ return ok if not a fp insn
 
-	ldr	r9, [r4, #60]		@ get new condition codes
+	ldr	r9, [sp, #60]		@ get new condition codes
 	and	r9, r9, #0xfc000003
 	orr	r7, r5, r9
-	str	r7, [r4, #60]		@ update PC copy in regs
+	str	r7, [sp, #60]		@ update PC copy in regs
 
 	mov	r0, r6			@ save a copy
 	mov	r1, r9			@ fetch the condition codes
diff -Nru linux/arch/arm/nwfpe/extended_cpdo.c linux-2.4.19-pre5-mjc/arch/arm/nwfpe/extended_cpdo.c
--- linux/arch/arm/nwfpe/extended_cpdo.c	Sun Aug 12 14:13:59 2001
+++ linux-2.4.19-pre5-mjc/arch/arm/nwfpe/extended_cpdo.c	Sat Apr  6 08:25:58 2002
@@ -19,9 +19,9 @@
     Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
 */
 
+#include "fpa11.h"
 #include "softfloat.h"
 #include "fpopcode.h"
-#include "fpa11.h"
 
 floatx80 floatx80_exp(floatx80 Fm);
 floatx80 floatx80_ln(floatx80 Fm);
@@ -157,8 +157,7 @@
 
       case RND_CODE:
       case URD_CODE:
-         fpa11->fpreg[Fd].fExtended = 
-             int32_to_floatx80(floatx80_to_int32(rFm));
+         fpa11->fpreg[Fd].fExtended = floatx80_round_to_int(rFm);
       break;
 
       case SQT_CODE:
diff -Nru linux/arch/arm/nwfpe/fpa11.c linux-2.4.19-pre5-mjc/arch/arm/nwfpe/fpa11.c
--- linux/arch/arm/nwfpe/fpa11.c	Sun Aug 12 14:13:59 2001
+++ linux-2.4.19-pre5-mjc/arch/arm/nwfpe/fpa11.c	Sat Apr  6 08:25:58 2002
@@ -19,14 +19,15 @@
     Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
 */
 
-#include <asm/system.h>
-
 #include "fpa11.h"
+
 #include "fpopcode.h"
 
 #include "fpmodule.h"
 #include "fpmodule.inl"
 
+#include <asm/system.h>
+
 /* forward declarations */
 unsigned int EmulateCPDO(const unsigned int);
 unsigned int EmulateCPDT(const unsigned int);
@@ -56,6 +57,7 @@
 void SetRoundingMode(const unsigned int opcode)
 {
 #if MAINTAIN_FPCR
+   FPA11 *fpa11 = GET_FPA11();
    fpa11->fpcr &= ~MASK_ROUNDING_MODE;
 #endif   
    switch (opcode & MASK_ROUNDING_MODE)
@@ -94,6 +96,7 @@
 void SetRoundingPrecision(const unsigned int opcode)
 {
 #if MAINTAIN_FPCR
+   FPA11 *fpa11 = GET_FPA11();
    fpa11->fpcr &= ~MASK_ROUNDING_PRECISION;
 #endif   
    switch (opcode & MASK_ROUNDING_PRECISION)
diff -Nru linux/arch/arm/nwfpe/fpa11.h linux-2.4.19-pre5-mjc/arch/arm/nwfpe/fpa11.h
--- linux/arch/arm/nwfpe/fpa11.h	Sun Aug 12 14:13:59 2001
+++ linux-2.4.19-pre5-mjc/arch/arm/nwfpe/fpa11.h	Sat Apr  6 08:25:58 2002
@@ -22,45 +22,67 @@
 #ifndef __FPA11_H__
 #define __FPA11_H__
 
-/* includes */
-#include "fpsr.h"		/* FP control and status register definitions */
-#include "softfloat.h"
+#define GET_FPA11() ((FPA11 *)(&current->thread.fpstate))
+
+/*
+ * The processes registers are always at the very top of the 8K
+ * stack+task struct.  Use the same method as 'current' uses to
+ * reach them.
+ */
+register unsigned int *user_registers asm("sl");
+
+#define GET_USERREG() (user_registers)
 
 /* Need task_struct */
 #include <linux/sched.h>
 
+/* includes */
+#include "fpsr.h"		/* FP control and status register definitions */
+#include "softfloat.h"
+
 #define		typeNone		0x00
 #define		typeSingle		0x01
 #define		typeDouble		0x02
 #define		typeExtended		0x03
 
+/*
+ * This must be no more and no less than 12 bytes.
+ */
 typedef union tagFPREG {
-   float32  fSingle;
-   float64  fDouble;
    floatx80 fExtended;
+   float64  fDouble;
+   float32  fSingle;
 } FPREG;
 
-/* FPA11 device model */
+/*
+ * FPA11 device model.
+ *
+ * This structure is exported to user space.  Do not re-order.
+ * Only add new stuff to the end, and do not change the size of
+ * any element.  Elements of this structure are used by user
+ * space, and must match struct user_fp in include/asm-arm/user.h.
+ * We include the byte offsets below for documentation purposes.
+ *
+ * The size of this structure and FPREG are checked by fpmodule.c
+ * on initialisation.  If the rules have been broken, NWFPE will
+ * not initialise.
+ */
 typedef struct tagFPA11 {
-  unsigned int *userRegisters;
-  FPREG fpreg[8];		/* 8 floating point registers */
-  FPSR fpsr;			/* floating point status register */
-  FPCR fpcr;			/* floating point control register */
-  unsigned char fType[8];	/* type of floating point value held in
-				   floating point registers.  One of none
-				   single, double or extended. */
-  int initflag;			/* this is special.  The kernel guarantees
-				   to set it to 0 when a thread is launched,
-				   so we can use it to detect whether this
-				   instance of the emulator needs to be
-				   initialised. */
+/*   0 */  FPREG fpreg[8];		/* 8 floating point registers */
+/*  96 */  FPSR fpsr;			/* floating point status register */
+/* 100 */  FPCR fpcr;			/* floating point control register */
+/* 104 */  unsigned char fType[8];	/* type of floating point value held in
+					   floating point registers.  One of none
+					   single, double or extended. */
+/* 112 */  int initflag;		/* this is special.  The kernel guarantees
+					   to set it to 0 when a thread is launched,
+					   so we can use it to detect whether this
+					   instance of the emulator needs to be
+					   initialised. */
 } FPA11;
 
 extern void resetFPA11(void);
 extern void SetRoundingMode(const unsigned int);
 extern void SetRoundingPrecision(const unsigned int);
-
-#define GET_FPA11() ((FPA11 *)(&current->thread.fpstate))
-#define GET_USERREG() (GET_FPA11()->userRegisters)
 
 #endif
diff -Nru linux/arch/arm/nwfpe/fpa11_cpdt.c linux-2.4.19-pre5-mjc/arch/arm/nwfpe/fpa11_cpdt.c
--- linux/arch/arm/nwfpe/fpa11_cpdt.c	Sun Aug 12 14:13:59 2001
+++ linux-2.4.19-pre5-mjc/arch/arm/nwfpe/fpa11_cpdt.c	Sat Apr  6 08:25:58 2002
@@ -20,9 +20,9 @@
     Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
 */
 
+#include "fpa11.h"
 #include "softfloat.h"
 #include "fpopcode.h"
-#include "fpa11.h"
 #include "fpmodule.h"
 #include "fpmodule.inl"
 
diff -Nru linux/arch/arm/nwfpe/fpa11_cprt.c linux-2.4.19-pre5-mjc/arch/arm/nwfpe/fpa11_cprt.c
--- linux/arch/arm/nwfpe/fpa11_cprt.c	Sun Aug 12 14:13:59 2001
+++ linux-2.4.19-pre5-mjc/arch/arm/nwfpe/fpa11_cprt.c	Sat Apr  6 08:25:58 2002
@@ -20,10 +20,10 @@
     Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
 */
 
+#include "fpa11.h"
 #include "milieu.h"
 #include "softfloat.h"
 #include "fpopcode.h"
-#include "fpa11.h"
 #include "fpa11.inl"
 #include "fpmodule.h"
 #include "fpmodule.inl"
@@ -82,8 +82,7 @@
    
    unsigned int nRc = 1;
    SetRoundingMode(opcode);
-   SetRoundingPrecision(opcode);
-   
+
    switch (opcode & MASK_ROUNDING_PRECISION)
    {
       case ROUND_SINGLE:
diff -Nru linux/arch/arm/nwfpe/fpmodule.c linux-2.4.19-pre5-mjc/arch/arm/nwfpe/fpmodule.c
--- linux/arch/arm/nwfpe/fpmodule.c	Sun Aug 12 14:13:59 2001
+++ linux-2.4.19-pre5-mjc/arch/arm/nwfpe/fpmodule.c	Sat Apr  6 08:25:58 2002
@@ -21,6 +21,8 @@
     Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
 */
 
+#include "fpa11.h"
+
 #include <linux/module.h>
 #include <linux/version.h>
 #include <linux/config.h>
@@ -36,7 +38,6 @@
 #include "softfloat.h"
 #include "fpopcode.h"
 #include "fpmodule.h"
-#include "fpa11.h"
 #include "fpa11.inl"
 
 /* kernel symbols required for signal handling */
@@ -83,6 +84,11 @@
 {
   if (sizeof(FPA11) > sizeof(union fp_state)) {
     printk(KERN_ERR "nwfpe: bad structure size\n");
+    return -EINVAL;
+  }
+
+  if (sizeof(FPREG) != 12) {
+    printk(KERN_ERR "nwfpe: bad register size\n");
     return -EINVAL;
   }
 
diff -Nru linux/arch/arm/nwfpe/fpopcode.c linux-2.4.19-pre5-mjc/arch/arm/nwfpe/fpopcode.c
--- linux/arch/arm/nwfpe/fpopcode.c	Wed Apr 11 22:02:27 2001
+++ linux-2.4.19-pre5-mjc/arch/arm/nwfpe/fpopcode.c	Sat Apr  6 08:25:58 2002
@@ -19,10 +19,10 @@
     Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
 */
 
+#include "fpa11.h"
 #include "softfloat.h"
 #include "fpopcode.h"
 #include "fpsr.h"
-#include "fpa11.h"
 #include "fpmodule.h"
 #include "fpmodule.inl"
 
diff -Nru linux/arch/arm/nwfpe/single_cpdo.c linux-2.4.19-pre5-mjc/arch/arm/nwfpe/single_cpdo.c
--- linux/arch/arm/nwfpe/single_cpdo.c	Sun Aug 12 14:13:59 2001
+++ linux-2.4.19-pre5-mjc/arch/arm/nwfpe/single_cpdo.c	Sat Apr  6 08:25:58 2002
@@ -19,9 +19,9 @@
     Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
 */
 
+#include "fpa11.h"
 #include "softfloat.h"
 #include "fpopcode.h"
-#include "fpa11.h"
 
 float32 float32_exp(float32 Fm);
 float32 float32_ln(float32 Fm);
@@ -139,8 +139,7 @@
 
       case RND_CODE:
       case URD_CODE:
-         fpa11->fpreg[Fd].fSingle = 
-             int32_to_float32(float32_to_int32(rFm));
+         fpa11->fpreg[Fd].fSingle = float32_round_to_int(rFm);
       break;
 
       case SQT_CODE:
diff -Nru linux/arch/arm/nwfpe/softfloat-specialize linux-2.4.19-pre5-mjc/arch/arm/nwfpe/softfloat-specialize
--- linux/arch/arm/nwfpe/softfloat-specialize	Thu Jun 17 04:11:35 1999
+++ linux-2.4.19-pre5-mjc/arch/arm/nwfpe/softfloat-specialize	Sat Apr  6 08:25:58 2002
@@ -364,108 +364,3 @@
 }
 
 #endif
-
-#ifdef FLOAT128
-
-/*
--------------------------------------------------------------------------------
-The pattern for a default generated quadruple-precision NaN.  The `high' and
-`low' values hold the most- and least-significant bits, respectively.
--------------------------------------------------------------------------------
-*/
-#define float128_default_nan_high LIT64( 0xFFFFFFFFFFFFFFFF )
-#define float128_default_nan_low  LIT64( 0xFFFFFFFFFFFFFFFF )
-
-/*
--------------------------------------------------------------------------------
-Returns 1 if the quadruple-precision floating-point value `a' is a NaN;
-otherwise returns 0.
--------------------------------------------------------------------------------
-*/
-flag float128_is_nan( float128 a )
-{
-
-    return
-           ( LIT64( 0xFFFE000000000000 ) <= (bits64) ( a.high<<1 ) )
-        && ( a.low || ( a.high & LIT64( 0x0000FFFFFFFFFFFF ) ) );
-
-}
-
-/*
--------------------------------------------------------------------------------
-Returns 1 if the quadruple-precision floating-point value `a' is a
-signaling NaN; otherwise returns 0.
--------------------------------------------------------------------------------
-*/
-flag float128_is_signaling_nan( float128 a )
-{
-
-    return
-           ( ( ( a.high>>47 ) & 0xFFFF ) == 0xFFFE )
-        && ( a.low || ( a.high & LIT64( 0x00007FFFFFFFFFFF ) ) );
-
-}
-
-/*
--------------------------------------------------------------------------------
-Returns the result of converting the quadruple-precision floating-point NaN
-`a' to the canonical NaN format.  If `a' is a signaling NaN, the invalid
-exception is raised.
--------------------------------------------------------------------------------
-*/
-static commonNaNT float128ToCommonNaN( float128 a )
-{
-    commonNaNT z;
-
-    if ( float128_is_signaling_nan( a ) ) float_raise( float_flag_invalid );
-    z.sign = a.high>>63;
-    shortShift128Left( a.high, a.low, 16, &z.high, &z.low );
-    return z;
-
-}
-
-/*
--------------------------------------------------------------------------------
-Returns the result of converting the canonical NaN `a' to the quadruple-
-precision floating-point format.
--------------------------------------------------------------------------------
-*/
-static float128 commonNaNToFloat128( commonNaNT a )
-{
-    float128 z;
-
-    shift128Right( a.high, a.low, 16, &z.high, &z.low );
-    z.high |= ( ( (bits64) a.sign )<<63 ) | LIT64( 0x7FFF800000000000 );
-    return z;
-
-}
-
-/*
--------------------------------------------------------------------------------
-Takes two quadruple-precision floating-point values `a' and `b', one of
-which is a NaN, and returns the appropriate NaN result.  If either `a' or
-`b' is a signaling NaN, the invalid exception is raised.
--------------------------------------------------------------------------------
-*/
-static float128 propagateFloat128NaN( float128 a, float128 b )
-{
-    flag aIsNaN, aIsSignalingNaN, bIsNaN, bIsSignalingNaN;
-
-    aIsNaN = float128_is_nan( a );
-    aIsSignalingNaN = float128_is_signaling_nan( a );
-    bIsNaN = float128_is_nan( b );
-    bIsSignalingNaN = float128_is_signaling_nan( b );
-    a.high |= LIT64( 0x0000800000000000 );
-    b.high |= LIT64( 0x0000800000000000 );
-    if ( aIsSignalingNaN | bIsSignalingNaN ) float_raise( float_flag_invalid );
-    if ( aIsNaN ) {
-        return ( aIsSignalingNaN & bIsNaN ) ? b : a;
-    }
-    else {
-        return b;
-    }
-
-}
-
-#endif
-
diff -Nru linux/arch/arm/nwfpe/softfloat.c linux-2.4.19-pre5-mjc/arch/arm/nwfpe/softfloat.c
--- linux/arch/arm/nwfpe/softfloat.c	Mon Nov 27 20:07:59 2000
+++ linux-2.4.19-pre5-mjc/arch/arm/nwfpe/softfloat.c	Sat Apr  6 08:25:58 2002
@@ -28,6 +28,7 @@
 ===============================================================================
 */
 
+#include "fpa11.h"
 #include "milieu.h"
 #include "softfloat.h"
 
@@ -753,277 +754,6 @@
 
 #endif
 
-#ifdef FLOAT128
-
-/*
--------------------------------------------------------------------------------
-Returns the least-significant 64 fraction bits of the quadruple-precision
-floating-point value `a'.
--------------------------------------------------------------------------------
-*/
-INLINE bits64 extractFloat128Frac1( float128 a )
-{
-
-    return a.low;
-
-}
-
-/*
--------------------------------------------------------------------------------
-Returns the most-significant 48 fraction bits of the quadruple-precision
-floating-point value `a'.
--------------------------------------------------------------------------------
-*/
-INLINE bits64 extractFloat128Frac0( float128 a )
-{
-
-    return a.high & LIT64( 0x0000FFFFFFFFFFFF );
-
-}
-
-/*
--------------------------------------------------------------------------------
-Returns the exponent bits of the quadruple-precision floating-point value
-`a'.
--------------------------------------------------------------------------------
-*/
-INLINE int32 extractFloat128Exp( float128 a )
-{
-
-    return ( a.high>>48 ) & 0x7FFF;
-
-}
-
-/*
--------------------------------------------------------------------------------
-Returns the sign bit of the quadruple-precision floating-point value `a'.
--------------------------------------------------------------------------------
-*/
-INLINE flag extractFloat128Sign( float128 a )
-{
-
-    return a.high>>63;
-
-}
-
-/*
--------------------------------------------------------------------------------
-Normalizes the subnormal quadruple-precision floating-point value
-represented by the denormalized significand formed by the concatenation of
-`aSig0' and `aSig1'.  The normalized exponent is stored at the location
-pointed to by `zExpPtr'.  The most significant 49 bits of the normalized
-significand are stored at the location pointed to by `zSig0Ptr', and the
-least significant 64 bits of the normalized significand are stored at the
-location pointed to by `zSig1Ptr'.
--------------------------------------------------------------------------------
-*/
-static void
- normalizeFloat128Subnormal(
-     bits64 aSig0,
-     bits64 aSig1,
-     int32 *zExpPtr,
-     bits64 *zSig0Ptr,
-     bits64 *zSig1Ptr
- )
-{
-    int8 shiftCount;
-
-    if ( aSig0 == 0 ) {
-        shiftCount = countLeadingZeros64( aSig1 ) - 15;
-        if ( shiftCount < 0 ) {
-            *zSig0Ptr = aSig1>>( - shiftCount );
-            *zSig1Ptr = aSig1<<( shiftCount & 63 );
-        }
-        else {
-            *zSig0Ptr = aSig1<<shiftCount;
-            *zSig1Ptr = 0;
-        }
-        *zExpPtr = - shiftCount - 63;
-    }
-    else {
-        shiftCount = countLeadingZeros64( aSig0 ) - 15;
-        shortShift128Left( aSig0, aSig1, shiftCount, zSig0Ptr, zSig1Ptr );
-        *zExpPtr = 1 - shiftCount;
-    }
-
-}
-
-/*
--------------------------------------------------------------------------------
-Packs the sign `zSign', the exponent `zExp', and the significand formed
-by the concatenation of `zSig0' and `zSig1' into a quadruple-precision
-floating-point value, returning the result.  After being shifted into the
-proper positions, the three fields `zSign', `zExp', and `zSig0' are simply
-added together to form the most significant 32 bits of the result.  This
-means that any integer portion of `zSig0' will be added into the exponent.
-Since a properly normalized significand will have an integer portion equal
-to 1, the `zExp' input should be 1 less than the desired result exponent
-whenever `zSig0' and `zSig1' concatenated form a complete, normalized
-significand.
--------------------------------------------------------------------------------
-*/
-INLINE float128
- packFloat128( flag zSign, int32 zExp, bits64 zSig0, bits64 zSig1 )
-{
-    float128 z;
-
-    z.low = zSig1;
-    z.high = ( ( (bits64) zSign )<<63 ) + ( ( (bits64) zExp )<<48 ) + zSig0;
-    return z;
-
-}
-
-/*
--------------------------------------------------------------------------------
-Takes an abstract floating-point value having sign `zSign', exponent `zExp',
-and extended significand formed by the concatenation of `zSig0', `zSig1',
-and `zSig2', and returns the proper quadruple-precision floating-point value
-corresponding to the abstract input.  Ordinarily, the abstract value is
-simply rounded and packed into the quadruple-precision format, with the
-inexact exception raised if the abstract input cannot be represented
-exactly.  If the abstract value is too large, however, the overflow and
-inexact exceptions are raised and an infinity or maximal finite value is
-returned.  If the abstract value is too small, the input value is rounded to
-a subnormal number, and the underflow and inexact exceptions are raised if
-the abstract input cannot be represented exactly as a subnormal quadruple-
-precision floating-point number.
-    The input significand must be normalized or smaller.  If the input
-significand is not normalized, `zExp' must be 0; in that case, the result
-returned is a subnormal number, and it must not require rounding.  In the
-usual case that the input significand is normalized, `zExp' must be 1 less
-than the ``true'' floating-point exponent.  The handling of underflow and
-overflow follows the IEC/IEEE Standard for Binary Floating-point Arithmetic.
--------------------------------------------------------------------------------
-*/
-static float128
- roundAndPackFloat128(
-     flag zSign, int32 zExp, bits64 zSig0, bits64 zSig1, bits64 zSig2 )
-{
-    int8 roundingMode;
-    flag roundNearestEven, increment, isTiny;
-
-    roundingMode = float_rounding_mode;
-    roundNearestEven = ( roundingMode == float_round_nearest_even );
-    increment = ( (sbits64) zSig2 < 0 );
-    if ( ! roundNearestEven ) {
-        if ( roundingMode == float_round_to_zero ) {
-            increment = 0;
-        }
-        else {
-            if ( zSign ) {
-                increment = ( roundingMode == float_round_down ) && zSig2;
-            }
-            else {
-                increment = ( roundingMode == float_round_up ) && zSig2;
-            }
-        }
-    }
-    if ( 0x7FFD <= (bits32) zExp ) {
-        if (    ( 0x7FFD < zExp )
-             || (    ( zExp == 0x7FFD )
-                  && eq128(
-                         LIT64( 0x0001FFFFFFFFFFFF ),
-                         LIT64( 0xFFFFFFFFFFFFFFFF ),
-                         zSig0,
-                         zSig1
-                     )
-                  && increment
-                )
-           ) {
-            float_raise( float_flag_overflow | float_flag_inexact );
-            if (    ( roundingMode == float_round_to_zero )
-                 || ( zSign && ( roundingMode == float_round_up ) )
-                 || ( ! zSign && ( roundingMode == float_round_down ) )
-               ) {
-                return
-                    packFloat128(
-                        zSign,
-                        0x7FFE,
-                        LIT64( 0x0000FFFFFFFFFFFF ),
-                        LIT64( 0xFFFFFFFFFFFFFFFF )
-                    );
-            }
-            return packFloat128( zSign, 0x7FFF, 0, 0 );
-        }
-        if ( zExp < 0 ) {
-            isTiny =
-                   ( float_detect_tininess == float_tininess_before_rounding )
-                || ( zExp < -1 )
-                || ! increment
-                || lt128(
-                       zSig0,
-                       zSig1,
-                       LIT64( 0x0001FFFFFFFFFFFF ),
-                       LIT64( 0xFFFFFFFFFFFFFFFF )
-                   );
-            shift128ExtraRightJamming(
-                zSig0, zSig1, zSig2, - zExp, &zSig0, &zSig1, &zSig2 );
-            zExp = 0;
-            if ( isTiny && zSig2 ) float_raise( float_flag_underflow );
-            if ( roundNearestEven ) {
-                increment = ( (sbits64) zSig2 < 0 );
-            }
-            else {
-                if ( zSign ) {
-                    increment = ( roundingMode == float_round_down ) && zSig2;
-                }
-                else {
-                    increment = ( roundingMode == float_round_up ) && zSig2;
-                }
-            }
-        }
-    }
-    if ( zSig2 ) float_exception_flags |= float_flag_inexact;
-    if ( increment ) {
-        add128( zSig0, zSig1, 0, 1, &zSig0, &zSig1 );
-        zSig1 &= ~ ( ( zSig2 + zSig2 == 0 ) & roundNearestEven );
-    }
-    else {
-        if ( ( zSig0 | zSig1 ) == 0 ) zExp = 0;
-    }
-    return packFloat128( zSign, zExp, zSig0, zSig1 );
-
-}
-
-/*
--------------------------------------------------------------------------------
-Takes an abstract floating-point value having sign `zSign', exponent `zExp',
-and significand formed by the concatenation of `zSig0' and `zSig1', and
-returns the proper quadruple-precision floating-point value corresponding to
-the abstract input.  This routine is just like `roundAndPackFloat128' except
-that the input significand has fewer bits and does not have to be normalized
-in any way.  In all cases, `zExp' must be 1 less than the ``true'' floating-
-point exponent.
--------------------------------------------------------------------------------
-*/
-static float128
- normalizeRoundAndPackFloat128(
-     flag zSign, int32 zExp, bits64 zSig0, bits64 zSig1 )
-{
-    int8 shiftCount;
-    bits64 zSig2;
-
-    if ( zSig0 == 0 ) {
-        zSig0 = zSig1;
-        zSig1 = 0;
-        zExp -= 64;
-    }
-    shiftCount = countLeadingZeros64( zSig0 ) - 15;
-    if ( 0 <= shiftCount ) {
-        zSig2 = 0;
-        shortShift128Left( zSig0, zSig1, shiftCount, &zSig0, &zSig1 );
-    }
-    else {
-        shift128ExtraRightJamming(
-            zSig0, zSig1, 0, - shiftCount, &zSig0, &zSig1, &zSig2 );
-    }
-    zExp -= shiftCount;
-    return roundAndPackFloat128( zSign, zExp, zSig0, zSig1, zSig2 );
-
-}
-
-#endif
-
 /*
 -------------------------------------------------------------------------------
 Returns the result of converting the 32-bit two's complement integer `a' to
@@ -1093,33 +823,6 @@
 
 #endif
 
-#ifdef FLOAT128
-
-/*
--------------------------------------------------------------------------------
-Returns the result of converting the 32-bit two's complement integer `a' to
-the quadruple-precision floating-point format.  The conversion is performed
-according to the IEC/IEEE Standard for Binary Floating-point Arithmetic.
--------------------------------------------------------------------------------
-*/
-float128 int32_to_float128( int32 a )
-{
-    flag zSign;
-    uint32 absA;
-    int8 shiftCount;
-    bits64 zSig0;
-
-    if ( a == 0 ) return packFloat128( 0, 0, 0, 0 );
-    zSign = ( a < 0 );
-    absA = zSign ? - a : a;
-    shiftCount = countLeadingZeros32( absA ) + 17;
-    zSig0 = absA;
-    return packFloat128( zSign, 0x402E - shiftCount, zSig0<<shiftCount, 0 );
-
-}
-
-#endif
-
 /*
 -------------------------------------------------------------------------------
 Returns the result of converting the single-precision floating-point value
@@ -1256,40 +959,6 @@
 
 #endif
 
-#ifdef FLOAT128
-
-/*
--------------------------------------------------------------------------------
-Returns the result of converting the single-precision floating-point value
-`a' to the double-precision floating-point format.  The conversion is
-performed according to the IEC/IEEE Standard for Binary Floating-point
-Arithmetic.
--------------------------------------------------------------------------------
-*/
-float128 float32_to_float128( float32 a )
-{
-    flag aSign;
-    int16 aExp;
-    bits32 aSig;
-
-    aSig = extractFloat32Frac( a );
-    aExp = extractFloat32Exp( a );
-    aSign = extractFloat32Sign( a );
-    if ( aExp == 0xFF ) {
-        if ( aSig ) return commonNaNToFloat128( float32ToCommonNaN( a ) );
-        return packFloat128( aSign, 0x7FFF, 0, 0 );
-    }
-    if ( aExp == 0 ) {
-        if ( aSig == 0 ) return packFloat128( aSign, 0, 0, 0 );
-        normalizeFloat32Subnormal( aSig, &aExp, &aSig );
-        --aExp;
-    }
-    return packFloat128( aSign, aExp + 0x3F80, ( (bits64) aSig )<<25, 0 );
-
-}
-
-#endif
-
 /*
 -------------------------------------------------------------------------------
 Rounds the single-precision floating-point value `a' to an integer, and
@@ -2183,41 +1852,6 @@
 
 #endif
 
-#ifdef FLOAT128
-
-/*
--------------------------------------------------------------------------------
-Returns the result of converting the double-precision floating-point value
-`a' to the quadruple-precision floating-point format.  The conversion is
-performed according to the IEC/IEEE Standard for Binary Floating-point
-Arithmetic.
--------------------------------------------------------------------------------
-*/
-float128 float64_to_float128( float64 a )
-{
-    flag aSign;
-    int16 aExp;
-    bits64 aSig, zSig0, zSig1;
-
-    aSig = extractFloat64Frac( a );
-    aExp = extractFloat64Exp( a );
-    aSign = extractFloat64Sign( a );
-    if ( aExp == 0x7FF ) {
-        if ( aSig ) return commonNaNToFloat128( float64ToCommonNaN( a ) );
-        return packFloat128( aSign, 0x7FFF, 0, 0 );
-    }
-    if ( aExp == 0 ) {
-        if ( aSig == 0 ) return packFloat128( aSign, 0, 0, 0 );
-        normalizeFloat64Subnormal( aSig, &aExp, &aSig );
-        --aExp;
-    }
-    shift128Right( aSig, 0, 4, &zSig0, &zSig1 );
-    return packFloat128( aSign, aExp + 0x3C00, zSig0, zSig1 );
-
-}
-
-#endif
-
 /*
 -------------------------------------------------------------------------------
 Rounds the double-precision floating-point value `a' to an integer, and
@@ -3029,35 +2663,6 @@
 
 }
 
-#ifdef FLOAT128
-
-/*
--------------------------------------------------------------------------------
-Returns the result of converting the extended double-precision floating-
-point value `a' to the quadruple-precision floating-point format.  The
-conversion is performed according to the IEC/IEEE Standard for Binary
-Floating-point Arithmetic.
--------------------------------------------------------------------------------
-*/
-float128 floatx80_to_float128( floatx80 a )
-{
-    flag aSign;
-    int16 aExp;
-    bits64 aSig, zSig0, zSig1;
-
-    aSig = extractFloatx80Frac( a );
-    aExp = extractFloatx80Exp( a );
-    aSign = extractFloatx80Sign( a );
-    if ( ( aExp == 0x7FFF ) && (bits64) ( aSig<<1 ) ) {
-        return commonNaNToFloat128( floatx80ToCommonNaN( a ) );
-    }
-    shift128Right( aSig<<1, 0, 16, &zSig0, &zSig1 );
-    return packFloat128( aSign, aExp, zSig0, zSig1 );
-
-}
-
-#endif
-
 /*
 -------------------------------------------------------------------------------
 Rounds the extended double-precision floating-point value `a' to an integer,
@@ -3822,1048 +3427,6 @@
         return
                aSign
             && (    ( ( (bits16) ( ( a.high | b.high )<<1 ) ) | a.low | b.low )
-                 != 0 );
-    }
-    return
-          aSign ? lt128( b.high, b.low, a.high, a.low )
-        : lt128( a.high, a.low, b.high, b.low );
-
-}
-
-#endif
-
-#ifdef FLOAT128
-
-/*
--------------------------------------------------------------------------------
-Returns the result of converting the quadruple-precision floating-point
-value `a' to the 32-bit two's complement integer format.  The conversion
-is performed according to the IEC/IEEE Standard for Binary Floating-point
-Arithmetic---which means in particular that the conversion is rounded
-according to the current rounding mode.  If `a' is a NaN, the largest
-positive integer is returned.  Otherwise, if the conversion overflows, the
-largest integer with the same sign as `a' is returned.
--------------------------------------------------------------------------------
-*/
-int32 float128_to_int32( float128 a )
-{
-    flag aSign;
-    int32 aExp, shiftCount;
-    bits64 aSig0, aSig1;
-
-    aSig1 = extractFloat128Frac1( a );
-    aSig0 = extractFloat128Frac0( a );
-    aExp = extractFloat128Exp( a );
-    aSign = extractFloat128Sign( a );
-    if ( ( aExp == 0x7FFF ) && ( aSig0 | aSig1 ) ) aSign = 0;
-    if ( aExp ) aSig0 |= LIT64( 0x0001000000000000 );
-    aSig0 |= ( aSig1 != 0 );
-    shiftCount = 0x4028 - aExp;
-    if ( 0 < shiftCount ) shift64RightJamming( aSig0, shiftCount, &aSig0 );
-    return roundAndPackInt32( aSign, aSig0 );
-
-}
-
-/*
--------------------------------------------------------------------------------
-Returns the result of converting the quadruple-precision floating-point
-value `a' to the 32-bit two's complement integer format.  The conversion
-is performed according to the IEC/IEEE Standard for Binary Floating-point
-Arithmetic, except that the conversion is always rounded toward zero.  If
-`a' is a NaN, the largest positive integer is returned.  Otherwise, if the
-conversion overflows, the largest integer with the same sign as `a' is
-returned.
--------------------------------------------------------------------------------
-*/
-int32 float128_to_int32_round_to_zero( float128 a )
-{
-    flag aSign;
-    int32 aExp, shiftCount;
-    bits64 aSig0, aSig1, savedASig;
-    int32 z;
-
-    aSig1 = extractFloat128Frac1( a );
-    aSig0 = extractFloat128Frac0( a );
-    aExp = extractFloat128Exp( a );
-    aSign = extractFloat128Sign( a );
-    aSig0 |= ( aSig1 != 0 );
-    shiftCount = 0x402F - aExp;
-    if ( shiftCount < 17 ) {
-        if ( ( aExp == 0x7FFF ) && aSig0 ) aSign = 0;
-        goto invalid;
-    }
-    else if ( 48 < shiftCount ) {
-        if ( aExp || aSig0 ) float_exception_flags |= float_flag_inexact;
-        return 0;
-    }
-    aSig0 |= LIT64( 0x0001000000000000 );
-    savedASig = aSig0;
-    aSig0 >>= shiftCount;
-    z = aSig0;
-    if ( aSign ) z = - z;
-    if ( ( z < 0 ) ^ aSign ) {
- invalid:
-        float_exception_flags |= float_flag_invalid;
-        return aSign ? 0x80000000 : 0x7FFFFFFF;
-    }
-    if ( ( aSig0<<shiftCount ) != savedASig ) {
-        float_exception_flags |= float_flag_inexact;
-    }
-    return z;
-
-}
-
-/*
--------------------------------------------------------------------------------
-Returns the result of converting the quadruple-precision floating-point
-value `a' to the single-precision floating-point format.  The conversion
-is performed according to the IEC/IEEE Standard for Binary Floating-point
-Arithmetic.
--------------------------------------------------------------------------------
-*/
-float32 float128_to_float32( float128 a )
-{
-    flag aSign;
-    int32 aExp;
-    bits64 aSig0, aSig1;
-    bits32 zSig;
-
-    aSig1 = extractFloat128Frac1( a );
-    aSig0 = extractFloat128Frac0( a );
-    aExp = extractFloat128Exp( a );
-    aSign = extractFloat128Sign( a );
-    if ( aExp == 0x7FFF ) {
-        if ( aSig0 | aSig1 ) {
-            return commonNaNToFloat32( float128ToCommonNaN( a ) );
-        }
-        return packFloat32( aSign, 0xFF, 0 );
-    }
-    aSig0 |= ( aSig1 != 0 );
-    shift64RightJamming( aSig0, 18, &aSig0 );
-    zSig = aSig0;
-    if ( aExp || zSig ) {
-        zSig |= 0x40000000;
-        aExp -= 0x3F81;
-    }
-    return roundAndPackFloat32( aSign, aExp, zSig );
-
-}
-
-/*
--------------------------------------------------------------------------------
-Returns the result of converting the quadruple-precision floating-point
-value `a' to the double-precision floating-point format.  The conversion
-is performed according to the IEC/IEEE Standard for Binary Floating-point
-Arithmetic.
--------------------------------------------------------------------------------
-*/
-float64 float128_to_float64( float128 a )
-{
-    flag aSign;
-    int32 aExp;
-    bits64 aSig0, aSig1;
-
-    aSig1 = extractFloat128Frac1( a );
-    aSig0 = extractFloat128Frac0( a );
-    aExp = extractFloat128Exp( a );
-    aSign = extractFloat128Sign( a );
-    if ( aExp == 0x7FFF ) {
-        if ( aSig0 | aSig1 ) {
-            return commonNaNToFloat64( float128ToCommonNaN( a ) );
-        }
-        return packFloat64( aSign, 0x7FF, 0 );
-    }
-    shortShift128Left( aSig0, aSig1, 14, &aSig0, &aSig1 );
-    aSig0 |= ( aSig1 != 0 );
-    if ( aExp || aSig0 ) {
-        aSig0 |= LIT64( 0x4000000000000000 );
-        aExp -= 0x3C01;
-    }
-    return roundAndPackFloat64( aSign, aExp, aSig0 );
-
-}
-
-#ifdef FLOATX80
-
-/*
--------------------------------------------------------------------------------
-Returns the result of converting the quadruple-precision floating-point
-value `a' to the extended double-precision floating-point format.  The
-conversion is performed according to the IEC/IEEE Standard for Binary
-Floating-point Arithmetic.
--------------------------------------------------------------------------------
-*/
-floatx80 float128_to_floatx80( float128 a )
-{
-    flag aSign;
-    int32 aExp;
-    bits64 aSig0, aSig1;
-
-    aSig1 = extractFloat128Frac1( a );
-    aSig0 = extractFloat128Frac0( a );
-    aExp = extractFloat128Exp( a );
-    aSign = extractFloat128Sign( a );
-    if ( aExp == 0x7FFF ) {
-        if ( aSig0 | aSig1 ) {
-            return commonNaNToFloatx80( float128ToCommonNaN( a ) );
-        }
-        return packFloatx80( aSign, 0x7FFF, LIT64( 0x8000000000000000 ) );
-    }
-    if ( aExp == 0 ) {
-        if ( ( aSig0 | aSig1 ) == 0 ) return packFloatx80( aSign, 0, 0 );
-        normalizeFloat128Subnormal( aSig0, aSig1, &aExp, &aSig0, &aSig1 );
-    }
-    else {
-        aSig0 |= LIT64( 0x0001000000000000 );
-    }
-    shortShift128Left( aSig0, aSig1, 15, &aSig0, &aSig1 );
-    return roundAndPackFloatx80( 80, aSign, aExp, aSig0, aSig1 );
-
-}
-
-#endif
-
-/*
--------------------------------------------------------------------------------
-Rounds the quadruple-precision floating-point value `a' to an integer, and
-returns the result as a quadruple-precision floating-point value.  The
-operation is performed according to the IEC/IEEE Standard for Binary
-Floating-point Arithmetic.
--------------------------------------------------------------------------------
-*/
-float128 float128_round_to_int( float128 a )
-{
-    flag aSign;
-    int32 aExp;
-    bits64 lastBitMask, roundBitsMask;
-    int8 roundingMode;
-    float128 z;
-
-    aExp = extractFloat128Exp( a );
-    if ( 0x402F <= aExp ) {
-        if ( 0x406F <= aExp ) {
-            if (    ( aExp == 0x7FFF )
-                 && ( extractFloat128Frac0( a ) | extractFloat128Frac1( a ) )
-               ) {
-                return propagateFloat128NaN( a, a );
-            }
-            return a;
-        }
-        lastBitMask = 1;
-        lastBitMask = ( lastBitMask<<( 0x406E - aExp ) )<<1;
-        roundBitsMask = lastBitMask - 1;
-        z = a;
-        roundingMode = float_rounding_mode;
-        if ( roundingMode == float_round_nearest_even ) {
-            if ( lastBitMask ) {
-                add128( z.high, z.low, 0, lastBitMask>>1, &z.high, &z.low );
-                if ( ( z.low & roundBitsMask ) == 0 ) z.low &= ~ lastBitMask;
-            }
-            else {
-                if ( (sbits64) z.low < 0 ) {
-                    ++z.high;
-                    if ( (bits64) ( z.low<<1 ) == 0 ) z.high &= ~1;
-                }
-            }
-        }
-        else if ( roundingMode != float_round_to_zero ) {
-            if (   extractFloat128Sign( z )
-                 ^ ( roundingMode == float_round_up ) ) {
-                add128( z.high, z.low, 0, roundBitsMask, &z.high, &z.low );
-            }
-        }
-        z.low &= ~ roundBitsMask;
-    }
-    else {
-        if ( aExp <= 0x3FFE ) {
-            if ( ( ( (bits64) ( a.high<<1 ) ) | a.low ) == 0 ) return a;
-            float_exception_flags |= float_flag_inexact;
-            aSign = extractFloat128Sign( a );
-            switch ( float_rounding_mode ) {
-             case float_round_nearest_even:
-                if (    ( aExp == 0x3FFE )
-                     && (   extractFloat128Frac0( a )
-                          | extractFloat128Frac1( a ) )
-                   ) {
-                    return packFloat128( aSign, 0x3FFF, 0, 0 );
-                }
-                break;
-             case float_round_down:
-                return
-                      aSign ? packFloat128( 1, 0x3FFF, 0, 0 )
-                    : packFloat128( 0, 0, 0, 0 );
-             case float_round_up:
-                return
-                      aSign ? packFloat128( 1, 0, 0, 0 )
-                    : packFloat128( 0, 0x3FFF, 0, 0 );
-            }
-            return packFloat128( aSign, 0, 0, 0 );
-        }
-        lastBitMask = 1;
-        lastBitMask <<= 0x402F - aExp;
-        roundBitsMask = lastBitMask - 1;
-        z.low = 0;
-        z.high = a.high;
-        roundingMode = float_rounding_mode;
-        if ( roundingMode == float_round_nearest_even ) {
-            z.high += lastBitMask>>1;
-            if ( ( ( z.high & roundBitsMask ) | a.low ) == 0 ) {
-                z.high &= ~ lastBitMask;
-            }
-        }
-        else if ( roundingMode != float_round_to_zero ) {
-            if (   extractFloat128Sign( z )
-                 ^ ( roundingMode == float_round_up ) ) {
-                z.high |= ( a.low != 0 );
-                z.high += roundBitsMask;
-            }
-        }
-        z.high &= ~ roundBitsMask;
-    }
-    if ( ( z.low != a.low ) || ( z.high != a.high ) ) {
-        float_exception_flags |= float_flag_inexact;
-    }
-    return z;
-
-}
-
-/*
--------------------------------------------------------------------------------
-Returns the result of adding the absolute values of the quadruple-precision
-floating-point values `a' and `b'.  If `zSign' is true, the sum is negated
-before being returned.  `zSign' is ignored if the result is a NaN.  The
-addition is performed according to the IEC/IEEE Standard for Binary
-Floating-point Arithmetic.
--------------------------------------------------------------------------------
-*/
-static float128 addFloat128Sigs( float128 a, float128 b, flag zSign )
-{
-    int32 aExp, bExp, zExp;
-    bits64 aSig0, aSig1, bSig0, bSig1, zSig0, zSig1, zSig2;
-    int32 expDiff;
-
-    aSig1 = extractFloat128Frac1( a );
-    aSig0 = extractFloat128Frac0( a );
-    aExp = extractFloat128Exp( a );
-    bSig1 = extractFloat128Frac1( b );
-    bSig0 = extractFloat128Frac0( b );
-    bExp = extractFloat128Exp( b );
-    expDiff = aExp - bExp;
-    if ( 0 < expDiff ) {
-        if ( aExp == 0x7FFF ) {
-            if ( aSig0 | aSig1 ) return propagateFloat128NaN( a, b );
-            return a;
-        }
-        if ( bExp == 0 ) {
-            --expDiff;
-        }
-        else {
-            bSig0 |= LIT64( 0x0001000000000000 );
-        }
-        shift128ExtraRightJamming(
-            bSig0, bSig1, 0, expDiff, &bSig0, &bSig1, &zSig2 );
-        zExp = aExp;
-    }
-    else if ( expDiff < 0 ) {
-        if ( bExp == 0x7FFF ) {
-            if ( bSig0 | bSig1 ) return propagateFloat128NaN( a, b );
-            return packFloat128( zSign, 0x7FFF, 0, 0 );
-        }
-        if ( aExp == 0 ) {
-            ++expDiff;
-        }
-        else {
-            aSig0 |= LIT64( 0x0001000000000000 );
-        }
-        shift128ExtraRightJamming(
-            aSig0, aSig1, 0, - expDiff, &aSig0, &aSig1, &zSig2 );
-        zExp = bExp;
-    }
-    else {
-        if ( aExp == 0x7FFF ) {
-            if ( aSig0 | aSig1 | bSig0 | bSig1 ) {
-                return propagateFloat128NaN( a, b );
-            }
-            return a;
-        }
-        add128( aSig0, aSig1, bSig0, bSig1, &zSig0, &zSig1 );
-        if ( aExp == 0 ) return packFloat128( zSign, 0, zSig0, zSig1 );
-        zSig2 = 0;
-        zSig0 |= LIT64( 0x0002000000000000 );
-        zExp = aExp;
-        goto shiftRight1;
-    }
-    aSig0 |= LIT64( 0x0001000000000000 );
-    add128( aSig0, aSig1, bSig0, bSig1, &zSig0, &zSig1 );
-    --zExp;
-    if ( zSig0 < LIT64( 0x0002000000000000 ) ) goto roundAndPack;
-    ++zExp;
- shiftRight1:
-    shift128ExtraRightJamming(
-        zSig0, zSig1, zSig2, 1, &zSig0, &zSig1, &zSig2 );
- roundAndPack:
-    return roundAndPackFloat128( zSign, zExp, zSig0, zSig1, zSig2 );
-
-}
-
-/*
--------------------------------------------------------------------------------
-Returns the result of subtracting the absolute values of the quadruple-
-precision floating-point values `a' and `b'.  If `zSign' is true, the
-difference is negated before being returned.  `zSign' is ignored if the
-result is a NaN.  The subtraction is performed according to the IEC/IEEE
-Standard for Binary Floating-point Arithmetic.
--------------------------------------------------------------------------------
-*/
-static float128 subFloat128Sigs( float128 a, float128 b, flag zSign )
-{
-    int32 aExp, bExp, zExp;
-    bits64 aSig0, aSig1, bSig0, bSig1, zSig0, zSig1;
-    int32 expDiff;
-    float128 z;
-
-    aSig1 = extractFloat128Frac1( a );
-    aSig0 = extractFloat128Frac0( a );
-    aExp = extractFloat128Exp( a );
-    bSig1 = extractFloat128Frac1( b );
-    bSig0 = extractFloat128Frac0( b );
-    bExp = extractFloat128Exp( b );
-    expDiff = aExp - bExp;
-    shortShift128Left( aSig0, aSig1, 14, &aSig0, &aSig1 );
-    shortShift128Left( bSig0, bSig1, 14, &bSig0, &bSig1 );
-    if ( 0 < expDiff ) goto aExpBigger;
-    if ( expDiff < 0 ) goto bExpBigger;
-    if ( aExp == 0x7FFF ) {
-        if ( aSig0 | aSig1 | bSig0 | bSig1 ) {
-            return propagateFloat128NaN( a, b );
-        }
-        float_raise( float_flag_invalid );
-        z.low = float128_default_nan_low;
-        z.high = float128_default_nan_high;
-        return z;
-    }
-    if ( aExp == 0 ) {
-        aExp = 1;
-        bExp = 1;
-    }
-    if ( bSig0 < aSig0 ) goto aBigger;
-    if ( aSig0 < bSig0 ) goto bBigger;
-    if ( bSig1 < aSig1 ) goto aBigger;
-    if ( aSig1 < bSig1 ) goto bBigger;
-    return packFloat128( float_rounding_mode == float_round_down, 0, 0, 0 );
- bExpBigger:
-    if ( bExp == 0x7FFF ) {
-        if ( bSig0 | bSig1 ) return propagateFloat128NaN( a, b );
-        return packFloat128( zSign ^ 1, 0x7FFF, 0, 0 );
-    }
-    if ( aExp == 0 ) {
-        ++expDiff;
-    }
-    else {
-        aSig0 |= LIT64( 0x4000000000000000 );
-    }
-    shift128RightJamming( aSig0, aSig1, - expDiff, &aSig0, &aSig1 );
-    bSig0 |= LIT64( 0x4000000000000000 );
- bBigger:
-    sub128( bSig0, bSig1, aSig0, aSig1, &zSig0, &zSig1 );
-    zExp = bExp;
-    zSign ^= 1;
-    goto normalizeRoundAndPack;
- aExpBigger:
-    if ( aExp == 0x7FFF ) {
-        if ( aSig0 | aSig1 ) return propagateFloat128NaN( a, b );
-        return a;
-    }
-    if ( bExp == 0 ) {
-        --expDiff;
-    }
-    else {
-        bSig0 |= LIT64( 0x4000000000000000 );
-    }
-    shift128RightJamming( bSig0, bSig1, expDiff, &bSig0, &bSig1 );
-    aSig0 |= LIT64( 0x4000000000000000 );
- aBigger:
-    sub128( aSig0, aSig1, bSig0, bSig1, &zSig0, &zSig1 );
-    zExp = aExp;
- normalizeRoundAndPack:
-    --zExp;
-    return normalizeRoundAndPackFloat128( zSign, zExp - 14, zSig0, zSig1 );
-
-}
-
-/*
--------------------------------------------------------------------------------
-Returns the result of adding the quadruple-precision floating-point values
-`a' and `b'.  The operation is performed according to the IEC/IEEE Standard
-for Binary Floating-point Arithmetic.
--------------------------------------------------------------------------------
-*/
-float128 float128_add( float128 a, float128 b )
-{
-    flag aSign, bSign;
-
-    aSign = extractFloat128Sign( a );
-    bSign = extractFloat128Sign( b );
-    if ( aSign == bSign ) {
-        return addFloat128Sigs( a, b, aSign );
-    }
-    else {
-        return subFloat128Sigs( a, b, aSign );
-    }
-
-}
-
-/*
--------------------------------------------------------------------------------
-Returns the result of subtracting the quadruple-precision floating-point
-values `a' and `b'.  The operation is performed according to the IEC/IEEE
-Standard for Binary Floating-point Arithmetic.
--------------------------------------------------------------------------------
-*/
-float128 float128_sub( float128 a, float128 b )
-{
-    flag aSign, bSign;
-
-    aSign = extractFloat128Sign( a );
-    bSign = extractFloat128Sign( b );
-    if ( aSign == bSign ) {
-        return subFloat128Sigs( a, b, aSign );
-    }
-    else {
-        return addFloat128Sigs( a, b, aSign );
-    }
-
-}
-
-/*
--------------------------------------------------------------------------------
-Returns the result of multiplying the quadruple-precision floating-point
-values `a' and `b'.  The operation is performed according to the IEC/IEEE
-Standard for Binary Floating-point Arithmetic.
--------------------------------------------------------------------------------
-*/
-float128 float128_mul( float128 a, float128 b )
-{
-    flag aSign, bSign, zSign;
-    int32 aExp, bExp, zExp;
-    bits64 aSig0, aSig1, bSig0, bSig1, zSig0, zSig1, zSig2, zSig3;
-    float128 z;
-
-    aSig1 = extractFloat128Frac1( a );
-    aSig0 = extractFloat128Frac0( a );
-    aExp = extractFloat128Exp( a );
-    aSign = extractFloat128Sign( a );
-    bSig1 = extractFloat128Frac1( b );
-    bSig0 = extractFloat128Frac0( b );
-    bExp = extractFloat128Exp( b );
-    bSign = extractFloat128Sign( b );
-    zSign = aSign ^ bSign;
-    if ( aExp == 0x7FFF ) {
-        if (    ( aSig0 | aSig1 )
-             || ( ( bExp == 0x7FFF ) && ( bSig0 | bSig1 ) ) ) {
-            return propagateFloat128NaN( a, b );
-        }
-        if ( ( bExp | bSig0 | bSig1 ) == 0 ) goto invalid;
-        return packFloat128( zSign, 0x7FFF, 0, 0 );
-    }
-    if ( bExp == 0x7FFF ) {
-        if ( bSig0 | bSig1 ) return propagateFloat128NaN( a, b );
-        if ( ( aExp | aSig0 | aSig1 ) == 0 ) {
- invalid:
-            float_raise( float_flag_invalid );
-            z.low = float128_default_nan_low;
-            z.high = float128_default_nan_high;
-            return z;
-        }
-        return packFloat128( zSign, 0x7FFF, 0, 0 );
-    }
-    if ( aExp == 0 ) {
-        if ( ( aSig0 | aSig1 ) == 0 ) return packFloat128( zSign, 0, 0, 0 );
-        normalizeFloat128Subnormal( aSig0, aSig1, &aExp, &aSig0, &aSig1 );
-    }
-    if ( bExp == 0 ) {
-        if ( ( bSig0 | bSig1 ) == 0 ) return packFloat128( zSign, 0, 0, 0 );
-        normalizeFloat128Subnormal( bSig0, bSig1, &bExp, &bSig0, &bSig1 );
-    }
-    zExp = aExp + bExp - 0x4000;
-    aSig0 |= LIT64( 0x0001000000000000 );
-    shortShift128Left( bSig0, bSig1, 16, &bSig0, &bSig1 );
-    mul128To256( aSig0, aSig1, bSig0, bSig1, &zSig0, &zSig1, &zSig2, &zSig3 );
-    add128( zSig0, zSig1, aSig0, aSig1, &zSig0, &zSig1 );
-    zSig2 |= ( zSig3 != 0 );
-    if ( LIT64( 0x0002000000000000 ) <= zSig0 ) {
-        shift128ExtraRightJamming(
-            zSig0, zSig1, zSig2, 1, &zSig0, &zSig1, &zSig2 );
-        ++zExp;
-    }
-    return roundAndPackFloat128( zSign, zExp, zSig0, zSig1, zSig2 );
-
-}
-
-/*
--------------------------------------------------------------------------------
-Returns the result of dividing the quadruple-precision floating-point value
-`a' by the corresponding value `b'.  The operation is performed according to
-the IEC/IEEE Standard for Binary Floating-point Arithmetic.
--------------------------------------------------------------------------------
-*/
-float128 float128_div( float128 a, float128 b )
-{
-    flag aSign, bSign, zSign;
-    int32 aExp, bExp, zExp;
-    bits64 aSig0, aSig1, bSig0, bSig1, zSig0, zSig1, zSig2;
-    bits64 rem0, rem1, rem2, rem3, term0, term1, term2, term3;
-    float128 z;
-
-    aSig1 = extractFloat128Frac1( a );
-    aSig0 = extractFloat128Frac0( a );
-    aExp = extractFloat128Exp( a );
-    aSign = extractFloat128Sign( a );
-    bSig1 = extractFloat128Frac1( b );
-    bSig0 = extractFloat128Frac0( b );
-    bExp = extractFloat128Exp( b );
-    bSign = extractFloat128Sign( b );
-    zSign = aSign ^ bSign;
-    if ( aExp == 0x7FFF ) {
-        if ( aSig0 | aSig1 ) return propagateFloat128NaN( a, b );
-        if ( bExp == 0x7FFF ) {
-            if ( bSig0 | bSig1 ) return propagateFloat128NaN( a, b );
-            goto invalid;
-        }
-        return packFloat128( zSign, 0x7FFF, 0, 0 );
-    }
-    if ( bExp == 0x7FFF ) {
-        if ( bSig0 | bSig1 ) return propagateFloat128NaN( a, b );
-        return packFloat128( zSign, 0, 0, 0 );
-    }
-    if ( bExp == 0 ) {
-        if ( ( bSig0 | bSig1 ) == 0 ) {
-            if ( ( aExp | aSig0 | aSig1 ) == 0 ) {
- invalid:
-                float_raise( float_flag_invalid );
-                z.low = float128_default_nan_low;
-                z.high = float128_default_nan_high;
-                return z;
-            }
-            float_raise( float_flag_divbyzero );
-            return packFloat128( zSign, 0x7FFF, 0, 0 );
-        }
-        normalizeFloat128Subnormal( bSig0, bSig1, &bExp, &bSig0, &bSig1 );
-    }
-    if ( aExp == 0 ) {
-        if ( ( aSig0 | aSig1 ) == 0 ) return packFloat128( zSign, 0, 0, 0 );
-        normalizeFloat128Subnormal( aSig0, aSig1, &aExp, &aSig0, &aSig1 );
-    }
-    zExp = aExp - bExp + 0x3FFD;
-    shortShift128Left(
-        aSig0 | LIT64( 0x0001000000000000 ), aSig1, 15, &aSig0, &aSig1 );
-    shortShift128Left(
-        bSig0 | LIT64( 0x0001000000000000 ), bSig1, 15, &bSig0, &bSig1 );
-    if ( le128( bSig0, bSig1, aSig0, aSig1 ) ) {
-        shift128Right( aSig0, aSig1, 1, &aSig0, &aSig1 );
-        ++zExp;
-    }
-    zSig0 = estimateDiv128To64( aSig0, aSig1, bSig0 );
-    mul128By64To192( bSig0, bSig1, zSig0, &term0, &term1, &term2 );
-    sub192( aSig0, aSig1, 0, term0, term1, term2, &rem0, &rem1, &rem2 );
-    while ( (sbits64) rem0 < 0 ) {
-        --zSig0;
-        add192( rem0, rem1, rem2, 0, bSig0, bSig1, &rem0, &rem1, &rem2 );
-    }
-    zSig1 = estimateDiv128To64( rem1, rem2, bSig0 );
-    if ( ( zSig1 & 0x3FFF ) <= 4 ) {
-        mul128By64To192( bSig0, bSig1, zSig1, &term1, &term2, &term3 );
-        sub192( rem1, rem2, 0, term1, term2, term3, &rem1, &rem2, &rem3 );
-        while ( (sbits64) rem1 < 0 ) {
-            --zSig1;
-            add192( rem1, rem2, rem3, 0, bSig0, bSig1, &rem1, &rem2, &rem3 );
-        }
-        zSig1 |= ( ( rem1 | rem2 | rem3 ) != 0 );
-    }
-    shift128ExtraRightJamming( zSig0, zSig1, 0, 15, &zSig0, &zSig1, &zSig2 );
-    return roundAndPackFloat128( zSign, zExp, zSig0, zSig1, zSig2 );
-
-}
-
-/*
--------------------------------------------------------------------------------
-Returns the remainder of the quadruple-precision floating-point value `a'
-with respect to the corresponding value `b'.  The operation is performed
-according to the IEC/IEEE Standard for Binary Floating-point Arithmetic.
--------------------------------------------------------------------------------
-*/
-float128 float128_rem( float128 a, float128 b )
-{
-    flag aSign, bSign, zSign;
-    int32 aExp, bExp, expDiff;
-    bits64 aSig0, aSig1, bSig0, bSig1;
-    bits64 q, term0, term1, term2, allZero, alternateASig0, alternateASig1;
-    bits64 sigMean1;
-    sbits64 sigMean0;
-    float128 z;
-
-    aSig1 = extractFloat128Frac1( a );
-    aSig0 = extractFloat128Frac0( a );
-    aExp = extractFloat128Exp( a );
-    aSign = extractFloat128Sign( a );
-    bSig1 = extractFloat128Frac1( b );
-    bSig0 = extractFloat128Frac0( b );
-    bExp = extractFloat128Exp( b );
-    bSign = extractFloat128Sign( b );
-    if ( aExp == 0x7FFF ) {
-        if (    ( aSig0 | aSig1 )
-             || ( ( bExp == 0x7FFF ) && ( bSig0 | bSig1 ) ) ) {
-            return propagateFloat128NaN( a, b );
-        }
-        goto invalid;
-    }
-    if ( bExp == 0x7FFF ) {
-        if ( bSig0 | bSig1 ) return propagateFloat128NaN( a, b );
-        return a;
-    }
-    if ( bExp == 0 ) {
-        if ( ( bSig0 | bSig1 ) == 0 ) {
- invalid:
-            float_raise( float_flag_invalid );
-            z.low = float128_default_nan_low;
-            z.high = float128_default_nan_high;
-            return z;
-        }
-        normalizeFloat128Subnormal( bSig0, bSig1, &bExp, &bSig0, &bSig1 );
-    }
-    if ( aExp == 0 ) {
-        if ( ( aSig0 | aSig1 ) == 0 ) return a;
-        normalizeFloat128Subnormal( aSig0, aSig1, &aExp, &aSig0, &aSig1 );
-    }
-    expDiff = aExp - bExp;
-    if ( expDiff < -1 ) return a;
-    shortShift128Left(
-        aSig0 | LIT64( 0x0001000000000000 ),
-        aSig1,
-        15 - ( expDiff < 0 ),
-        &aSig0,
-        &aSig1
-    );
-    shortShift128Left(
-        bSig0 | LIT64( 0x0001000000000000 ), bSig1, 15, &bSig0, &bSig1 );
-    q = le128( bSig0, bSig1, aSig0, aSig1 );
-    if ( q ) sub128( aSig0, aSig1, bSig0, bSig1, &aSig0, &aSig1 );
-    expDiff -= 64;
-    while ( 0 < expDiff ) {
-        q = estimateDiv128To64( aSig0, aSig1, bSig0 );
-        q = ( 4 < q ) ? q - 4 : 0;
-        mul128By64To192( bSig0, bSig1, q, &term0, &term1, &term2 );
-        shortShift192Left( term0, term1, term2, 61, &term1, &term2, &allZero );
-        shortShift128Left( aSig0, aSig1, 61, &aSig0, &allZero );
-        sub128( aSig0, 0, term1, term2, &aSig0, &aSig1 );
-        expDiff -= 61;
-    }
-    if ( -64 < expDiff ) {
-        q = estimateDiv128To64( aSig0, aSig1, bSig0 );
-        q = ( 4 < q ) ? q - 4 : 0;
-        q >>= - expDiff;
-        shift128Right( bSig0, bSig1, 12, &bSig0, &bSig1 );
-        expDiff += 52;
-        if ( expDiff < 0 ) {
-            shift128Right( aSig0, aSig1, - expDiff, &aSig0, &aSig1 );
-        }
-        else {
-            shortShift128Left( aSig0, aSig1, expDiff, &aSig0, &aSig1 );
-        }
-        mul128By64To192( bSig0, bSig1, q, &term0, &term1, &term2 );
-        sub128( aSig0, aSig1, term1, term2, &aSig0, &aSig1 );
-    }
-    else {
-        shift128Right( aSig0, aSig1, 12, &aSig0, &aSig1 );
-        shift128Right( bSig0, bSig1, 12, &bSig0, &bSig1 );
-    }
-    do {
-        alternateASig0 = aSig0;
-        alternateASig1 = aSig1;
-        ++q;
-        sub128( aSig0, aSig1, bSig0, bSig1, &aSig0, &aSig1 );
-    } while ( 0 <= (sbits64) aSig0 );
-    add128(
-        aSig0, aSig1, alternateASig0, alternateASig1, &sigMean0, &sigMean1 );
-    if (    ( sigMean0 < 0 )
-         || ( ( ( sigMean0 | sigMean1 ) == 0 ) && ( q & 1 ) ) ) {
-        aSig0 = alternateASig0;
-        aSig1 = alternateASig1;
-    }
-    zSign = ( (sbits64) aSig0 < 0 );
-    if ( zSign ) sub128( 0, 0, aSig0, aSig1, &aSig0, &aSig1 );
-    return
-        normalizeRoundAndPackFloat128( aSign ^ zSign, bExp - 4, aSig0, aSig1 );
-
-}
-
-/*
--------------------------------------------------------------------------------
-Returns the square root of the quadruple-precision floating-point value `a'.
-The operation is performed according to the IEC/IEEE Standard for Binary
-Floating-point Arithmetic.
--------------------------------------------------------------------------------
-*/
-float128 float128_sqrt( float128 a )
-{
-    flag aSign;
-    int32 aExp, zExp;
-    bits64 aSig0, aSig1, zSig0, zSig1, zSig2;
-    bits64 rem0, rem1, rem2, rem3, term0, term1, term2, term3;
-    bits64 shiftedRem0, shiftedRem1;
-    float128 z;
-
-    aSig1 = extractFloat128Frac1( a );
-    aSig0 = extractFloat128Frac0( a );
-    aExp = extractFloat128Exp( a );
-    aSign = extractFloat128Sign( a );
-    if ( aExp == 0x7FFF ) {
-        if ( aSig0 | aSig1 ) return propagateFloat128NaN( a, a );
-        if ( ! aSign ) return a;
-        goto invalid;
-    }
-    if ( aSign ) {
-        if ( ( aExp | aSig0 | aSig1 ) == 0 ) return a;
- invalid:
-        float_raise( float_flag_invalid );
-        z.low = float128_default_nan_low;
-        z.high = float128_default_nan_high;
-        return z;
-    }
-    if ( aExp == 0 ) {
-        if ( ( aSig0 | aSig1 ) == 0 ) return packFloat128( 0, 0, 0, 0 );
-        normalizeFloat128Subnormal( aSig0, aSig1, &aExp, &aSig0, &aSig1 );
-    }
-    zExp = ( ( aExp - 0x3FFF )>>1 ) + 0x3FFE;
-    aSig0 |= LIT64( 0x0001000000000000 );
-    zSig0 = estimateSqrt32( aExp, aSig0>>17 );
-    zSig0 <<= 31;
-    shortShift128Left( aSig0, aSig1, 13 - ( aExp & 1 ), &aSig0, &aSig1 );
-    zSig0 = estimateDiv128To64( aSig0, aSig1, zSig0 ) + zSig0 + 4;
-    if ( 0 <= (sbits64) zSig0 ) zSig0 = LIT64( 0xFFFFFFFFFFFFFFFF );
-    shortShift128Left( aSig0, aSig1, 2, &aSig0, &aSig1 );
-    mul64To128( zSig0, zSig0, &term0, &term1 );
-    sub128( aSig0, aSig1, term0, term1, &rem0, &rem1 );
-    while ( (sbits64) rem0 < 0 ) {
-        --zSig0;
-        shortShift128Left( 0, zSig0, 1, &term0, &term1 );
-        term1 |= 1;
-        add128( rem0, rem1, term0, term1, &rem0, &rem1 );
-    }
-    shortShift128Left( rem0, rem1, 63, &shiftedRem0, &shiftedRem1 );
-    zSig1 = estimateDiv128To64( shiftedRem0, shiftedRem1, zSig0 );
-    if ( ( zSig1 & 0x3FFF ) <= 5 ) {
-        if ( zSig1 == 0 ) zSig1 = 1;
-        mul64To128( zSig0, zSig1, &term1, &term2 );
-        shortShift128Left( term1, term2, 1, &term1, &term2 );
-        sub128( rem1, 0, term1, term2, &rem1, &rem2 );
-        mul64To128( zSig1, zSig1, &term2, &term3 );
-        sub192( rem1, rem2, 0, 0, term2, term3, &rem1, &rem2, &rem3 );
-        while ( (sbits64) rem1 < 0 ) {
-            --zSig1;
-            shortShift192Left( 0, zSig0, zSig1, 1, &term1, &term2, &term3 );
-            term3 |= 1;
-            add192(
-                rem1, rem2, rem3, term1, term2, term3, &rem1, &rem2, &rem3 );
-        }
-        zSig1 |= ( ( rem1 | rem2 | rem3 ) != 0 );
-    }
-    shift128ExtraRightJamming( zSig0, zSig1, 0, 15, &zSig0, &zSig1, &zSig2 );
-    return roundAndPackFloat128( 0, zExp, zSig0, zSig1, zSig2 );
-
-}
-
-/*
--------------------------------------------------------------------------------
-Returns 1 if the quadruple-precision floating-point value `a' is equal to
-the corresponding value `b', and 0 otherwise.  The comparison is performed
-according to the IEC/IEEE Standard for Binary Floating-point Arithmetic.
--------------------------------------------------------------------------------
-*/
-flag float128_eq( float128 a, float128 b )
-{
-
-    if (    (    ( extractFloat128Exp( a ) == 0x7FFF )
-              && ( extractFloat128Frac0( a ) | extractFloat128Frac1( a ) ) )
-         || (    ( extractFloat128Exp( b ) == 0x7FFF )
-              && ( extractFloat128Frac0( b ) | extractFloat128Frac1( b ) ) )
-       ) {
-        if (    float128_is_signaling_nan( a )
-             || float128_is_signaling_nan( b ) ) {
-            float_raise( float_flag_invalid );
-        }
-        return 0;
-    }
-    return
-           ( a.low == b.low )
-        && (    ( a.high == b.high )
-             || (    ( a.low == 0 )
-                  && ( (bits64) ( ( a.high | b.high )<<1 ) == 0 ) )
-           );
-
-}
-
-/*
--------------------------------------------------------------------------------
-Returns 1 if the quadruple-precision floating-point value `a' is less than
-or equal to the corresponding value `b', and 0 otherwise.  The comparison
-is performed according to the IEC/IEEE Standard for Binary Floating-point
-Arithmetic.
--------------------------------------------------------------------------------
-*/
-flag float128_le( float128 a, float128 b )
-{
-    flag aSign, bSign;
-
-    if (    (    ( extractFloat128Exp( a ) == 0x7FFF )
-              && ( extractFloat128Frac0( a ) | extractFloat128Frac1( a ) ) )
-         || (    ( extractFloat128Exp( b ) == 0x7FFF )
-              && ( extractFloat128Frac0( b ) | extractFloat128Frac1( b ) ) )
-       ) {
-        float_raise( float_flag_invalid );
-        return 0;
-    }
-    aSign = extractFloat128Sign( a );
-    bSign = extractFloat128Sign( b );
-    if ( aSign != bSign ) {
-        return
-               aSign
-            || (    ( ( (bits64) ( ( a.high | b.high )<<1 ) ) | a.low | b.low )
-                 == 0 );
-    }
-    return
-          aSign ? le128( b.high, b.low, a.high, a.low )
-        : le128( a.high, a.low, b.high, b.low );
-
-}
-
-/*
--------------------------------------------------------------------------------
-Returns 1 if the quadruple-precision floating-point value `a' is less than
-the corresponding value `b', and 0 otherwise.  The comparison is performed
-according to the IEC/IEEE Standard for Binary Floating-point Arithmetic.
--------------------------------------------------------------------------------
-*/
-flag float128_lt( float128 a, float128 b )
-{
-    flag aSign, bSign;
-
-    if (    (    ( extractFloat128Exp( a ) == 0x7FFF )
-              && ( extractFloat128Frac0( a ) | extractFloat128Frac1( a ) ) )
-         || (    ( extractFloat128Exp( b ) == 0x7FFF )
-              && ( extractFloat128Frac0( b ) | extractFloat128Frac1( b ) ) )
-       ) {
-        float_raise( float_flag_invalid );
-        return 0;
-    }
-    aSign = extractFloat128Sign( a );
-    bSign = extractFloat128Sign( b );
-    if ( aSign != bSign ) {
-        return
-               aSign
-            && (    ( ( (bits64) ( ( a.high | b.high )<<1 ) ) | a.low | b.low )
-                 != 0 );
-    }
-    return
-          aSign ? lt128( b.high, b.low, a.high, a.low )
-        : lt128( a.high, a.low, b.high, b.low );
-
-}
-
-/*
--------------------------------------------------------------------------------
-Returns 1 if the quadruple-precision floating-point value `a' is equal to
-the corresponding value `b', and 0 otherwise.  The invalid exception is
-raised if either operand is a NaN.  Otherwise, the comparison is performed
-according to the IEC/IEEE Standard for Binary Floating-point Arithmetic.
--------------------------------------------------------------------------------
-*/
-flag float128_eq_signaling( float128 a, float128 b )
-{
-
-    if (    (    ( extractFloat128Exp( a ) == 0x7FFF )
-              && ( extractFloat128Frac0( a ) | extractFloat128Frac1( a ) ) )
-         || (    ( extractFloat128Exp( b ) == 0x7FFF )
-              && ( extractFloat128Frac0( b ) | extractFloat128Frac1( b ) ) )
-       ) {
-        float_raise( float_flag_invalid );
-        return 0;
-    }
-    return
-           ( a.low == b.low )
-        && (    ( a.high == b.high )
-             || (    ( a.low == 0 )
-                  && ( (bits64) ( ( a.high | b.high )<<1 ) == 0 ) )
-           );
-
-}
-
-/*
--------------------------------------------------------------------------------
-Returns 1 if the quadruple-precision floating-point value `a' is less than
-or equal to the corresponding value `b', and 0 otherwise.  Quiet NaNs do not
-cause an exception.  Otherwise, the comparison is performed according to the
-IEC/IEEE Standard for Binary Floating-point Arithmetic.
--------------------------------------------------------------------------------
-*/
-flag float128_le_quiet( float128 a, float128 b )
-{
-    flag aSign, bSign;
-
-    if (    (    ( extractFloat128Exp( a ) == 0x7FFF )
-              && ( extractFloat128Frac0( a ) | extractFloat128Frac1( a ) ) )
-         || (    ( extractFloat128Exp( b ) == 0x7FFF )
-              && ( extractFloat128Frac0( b ) | extractFloat128Frac1( b ) ) )
-       ) {
-        if (    float128_is_signaling_nan( a )
-             || float128_is_signaling_nan( b ) ) {
-            float_raise( float_flag_invalid );
-        }
-        return 0;
-    }
-    aSign = extractFloat128Sign( a );
-    bSign = extractFloat128Sign( b );
-    if ( aSign != bSign ) {
-        return
-               aSign
-            || (    ( ( (bits64) ( ( a.high | b.high )<<1 ) ) | a.low | b.low )
-                 == 0 );
-    }
-    return
-          aSign ? le128( b.high, b.low, a.high, a.low )
-        : le128( a.high, a.low, b.high, b.low );
-
-}
-
-/*
--------------------------------------------------------------------------------
-Returns 1 if the quadruple-precision floating-point value `a' is less than
-the corresponding value `b', and 0 otherwise.  Quiet NaNs do not cause an
-exception.  Otherwise, the comparison is performed according to the IEC/IEEE
-Standard for Binary Floating-point Arithmetic.
--------------------------------------------------------------------------------
-*/
-flag float128_lt_quiet( float128 a, float128 b )
-{
-    flag aSign, bSign;
-
-    if (    (    ( extractFloat128Exp( a ) == 0x7FFF )
-              && ( extractFloat128Frac0( a ) | extractFloat128Frac1( a ) ) )
-         || (    ( extractFloat128Exp( b ) == 0x7FFF )
-              && ( extractFloat128Frac0( b ) | extractFloat128Frac1( b ) ) )
-       ) {
-        if (    float128_is_signaling_nan( a )
-             || float128_is_signaling_nan( b ) ) {
-            float_raise( float_flag_invalid );
-        }
-        return 0;
-    }
-    aSign = extractFloat128Sign( a );
-    bSign = extractFloat128Sign( b );
-    if ( aSign != bSign ) {
-        return
-               aSign
-            && (    ( ( (bits64) ( ( a.high | b.high )<<1 ) ) | a.low | b.low )
                  != 0 );
     }
     return
diff -Nru linux/arch/arm/nwfpe/softfloat.h linux-2.4.19-pre5-mjc/arch/arm/nwfpe/softfloat.h
--- linux/arch/arm/nwfpe/softfloat.h	Thu Jun 17 04:11:35 1999
+++ linux-2.4.19-pre5-mjc/arch/arm/nwfpe/softfloat.h	Sat Apr  6 08:25:58 2002
@@ -37,12 +37,10 @@
 The macro `FLOATX80' must be defined to enable the extended double-precision
 floating-point format `floatx80'.  If this macro is not defined, the
 `floatx80' type will not be defined, and none of the functions that either
-input or output the `floatx80' type will be defined.  The same applies to
-the `FLOAT128' macro and the quadruple-precision format `float128'.
+input or output the `floatx80' type will be defined.
 -------------------------------------------------------------------------------
 */
 #define FLOATX80
-/* #define FLOAT128 */
 
 /*
 -------------------------------------------------------------------------------
@@ -51,17 +49,10 @@
 */
 typedef unsigned long int float32;
 typedef unsigned long long float64;
-#ifdef FLOATX80
 typedef struct {
     unsigned short high;
     unsigned long long low;
 } floatx80;
-#endif
-#ifdef FLOAT128
-typedef struct {
-    unsigned long long high, low;
-} float128;
-#endif
 
 /*
 -------------------------------------------------------------------------------
@@ -131,9 +122,6 @@
 #ifdef FLOATX80
 floatx80 int32_to_floatx80( signed int );
 #endif
-#ifdef FLOAT128
-float128 int32_to_float128( signed int );
-#endif
 
 /*
 -------------------------------------------------------------------------------
@@ -146,9 +134,6 @@
 #ifdef FLOATX80
 floatx80 float32_to_floatx80( float32 );
 #endif
-#ifdef FLOAT128
-float128 float32_to_float128( float32 );
-#endif
 
 /*
 -------------------------------------------------------------------------------
@@ -181,9 +166,6 @@
 #ifdef FLOATX80
 floatx80 float64_to_floatx80( float64 );
 #endif
-#ifdef FLOAT128
-float128 float64_to_float128( float64 );
-#endif
 
 /*
 -------------------------------------------------------------------------------
@@ -216,9 +198,6 @@
 signed int floatx80_to_int32_round_to_zero( floatx80 );
 float32 floatx80_to_float32( floatx80 );
 float64 floatx80_to_float64( floatx80 );
-#ifdef FLOAT128
-float128 floatx80_to_float128( floatx80 );
-#endif
 
 /*
 -------------------------------------------------------------------------------
@@ -247,43 +226,6 @@
 char floatx80_le_quiet( floatx80, floatx80 );
 char floatx80_lt_quiet( floatx80, floatx80 );
 char floatx80_is_signaling_nan( floatx80 );
-
-#endif
-
-#ifdef FLOAT128
-
-/*
--------------------------------------------------------------------------------
-Software IEC/IEEE quadruple-precision conversion routines.
--------------------------------------------------------------------------------
-*/
-signed int float128_to_int32( float128 );
-signed int float128_to_int32_round_to_zero( float128 );
-float32 float128_to_float32( float128 );
-float64 float128_to_float64( float128 );
-#ifdef FLOATX80
-floatx80 float128_to_floatx80( float128 );
-#endif
-
-/*
--------------------------------------------------------------------------------
-Software IEC/IEEE quadruple-precision operations.
--------------------------------------------------------------------------------
-*/
-float128 float128_round_to_int( float128 );
-float128 float128_add( float128, float128 );
-float128 float128_sub( float128, float128 );
-float128 float128_mul( float128, float128 );
-float128 float128_div( float128, float128 );
-float128 float128_rem( float128, float128 );
-float128 float128_sqrt( float128 );
-char float128_eq( float128, float128 );
-char float128_le( float128, float128 );
-char float128_lt( float128, float128 );
-char float128_eq_signaling( float128, float128 );
-char float128_le_quiet( float128, float128 );
-char float128_lt_quiet( float128, float128 );
-char float128_is_signaling_nan( float128 );
 
 #endif
 
diff -Nru linux/arch/arm/tools/Makefile linux-2.4.19-pre5-mjc/arch/arm/tools/Makefile
--- linux/arch/arm/tools/Makefile	Thu Oct 11 12:04:57 2001
+++ linux-2.4.19-pre5-mjc/arch/arm/tools/Makefile	Sat Apr  6 08:25:58 2002
@@ -15,13 +15,17 @@
 # what we want.  We do this in several stages so make picks up on
 # any errors that occur along the way.
 
-$(TOPDIR)/include/asm-arm/constants.h: constants-hdr getconstants.c
-	$(CC) $(CFLAGS) -S -o - getconstants.c > $@.tmp.1
+constants.h: constants-hdr getconstants.c
+	$(CC) $(CFLAGS) -S -o $@.tmp.1 getconstants.c
 	sed 's/^\(#define .* \)[#$$]\(.*\)/\1\2/;/^#define/!d' $@.tmp.1 > $@.tmp.2
-	cat constants-hdr $@.tmp.2 > $@.tmp
-	cmp $@.tmp $@ >/dev/null 2>&1 || mv $@.tmp $@
+	cat constants-hdr $@.tmp.2 > $@
 	$(RM) $@.tmp*
 
+# Only update include/asm-arm/constants.h when it has actually changed.
+
+$(TOPDIR)/include/asm-arm/constants.h: constants.h
+	cmp constants.h $@ >/dev/null 2>&1 || cp -p constants.h $@
+
 # Build our dependencies, and then generate the constants and
 # mach-types header files.  If we do it now, mkdep will pick
 # the dependencies up later on when it runs through the other
@@ -29,7 +33,7 @@
 
 dep:
 	$(TOPDIR)/scripts/mkdep $(CFLAGS) $(EXTRA_CFLAGS) -- getconstants.c |\
-	 sed s,getconstants.o,$(TOPDIR)/include/asm-arm/constants.h, > .depend
+	 sed s,getconstants.o,constants.h, > .depend
 	$(MAKE) all
 
 .PHONY:	all dep
diff -Nru linux/arch/arm/tools/getconstants.c linux-2.4.19-pre5-mjc/arch/arm/tools/getconstants.c
--- linux/arch/arm/tools/getconstants.c	Thu Oct 11 12:04:57 2001
+++ linux-2.4.19-pre5-mjc/arch/arm/tools/getconstants.c	Sat Apr  6 08:35:14 2002
@@ -13,6 +13,7 @@
 
 #include <asm/pgtable.h>
 #include <asm/uaccess.h>
+#include <asm/hardirq.h>
 
 /*
  * Make sure that the compiler and target are compatible.
@@ -38,6 +39,11 @@
 
 DEFN("TSS_SAVE",		OFF_TSK(thread.save));
 DEFN("TSS_FPESAVE",		OFF_TSK(thread.fpstate.soft.save));
+
+#ifdef CONFIG_PREEMPT
+DEFN("TSK_PREEMPT",		OFF_TSK(preempt_count));
+DEFN("IRQSTAT_BH_COUNT",	(unsigned long)&(((irq_cpustat_t *)0)->__local_bh_count));
+#endif
 
 #ifdef CONFIG_CPU_32
 DEFN("TSS_DOMAIN",		OFF_TSK(thread.domain));
diff -Nru linux/arch/arm/tools/mach-types linux-2.4.19-pre5-mjc/arch/arm/tools/mach-types
--- linux/arch/arm/tools/mach-types	Fri Nov  9 16:58:02 2001
+++ linux-2.4.19-pre5-mjc/arch/arm/tools/mach-types	Sat Apr  6 08:25:58 2002
@@ -6,7 +6,7 @@
 # To add an entry into this database, please see Documentation/arm/README,
 # or contact rmk@arm.linux.org.uk
 #
-# Last update: Fri Oct 26 17:37:13 2001
+# Last update: Sat Mar 16 15:56:27 2002
 #
 # machine_is_xxx	CONFIG_xxxx		MACH_TYPE_xxx		number
 #
@@ -118,10 +118,10 @@
 cdb89712		ARCH_CDB89712		CDB89712		107
 graphicsmaster		SA1100_GRAPHICSMASTER	GRAPHICSMASTER		108
 adsbitsy		SA1100_ADSBITSY		ADSBITSY		109
-cotulla_idp		ARCH_COTULLA_IDP	COTULLA_IDP		110
+pxa_idp			ARCH_PXA_IDP		PXA_IDP			110
 plce			ARCH_PLCE		PLCE			111
 pt_system3		SA1100_PT_SYSTEM3	PT_SYSTEM3		112
-medalb			ARCH_MEDALB		MEDALB			113
+murphy			ARCH_MEDALB		MEDALB			113
 eagle			ARCH_EAGLE		EAGLE			114
 dsc21			ARCH_DSC21		DSC21			115
 dsc24			ARCH_DSC24		DSC24			116
@@ -137,3 +137,44 @@
 elroy			SA1100_ELROY		ELROY			126
 gms720			ARCH_GMS720		GMS720			127
 s24x			ARCH_S24X		S24X			128
+jtel_clep7312		ARCH_JTEL_CLEP7312	JTEL_CLEP7312		129
+cx821xx			ARCH_CX821XX		CX821XX			130
+edb7312			ARCH_EDB7312		EDB7312			131
+bsa1110			SA1100_BSA1110		BSA1110			132
+powerpin		ARCH_POWERPIN		POWERPIN		133
+openarm			ARCH_OPENARM		OPENARM			134
+whitechapel		SA1100_WHITECHAPEL	WHITECHAPEL		135
+h3100			SA1100_H3100		H3100			136
+h3800			SA1100_H3800		H3800			137
+blue_v1			ARCH_BLUE_V1		BLUE_V1			138
+pxa_cerf		ARCH_PXA_CERF		PXA_CERF		139
+arm7tevb		ARCH_ARM7TEVB		ARM7TEVB		140
+d7400			ARCH_D7400		D7400			141
+piranha			ARCH_PIRANHA		PIRANHA			142
+sbcamelot		SA1100_SBCAMELOT	SBCAMELOT		143
+kings			SA1100_KINGS		KINGS			144
+smdk2400		ARCH_SMDK2400		SMDK2400		145
+collie			ARCH_COLLIE		COLLIE			146
+idr			ARCH_IDR		IDR			147
+badge4			SA1100_BADGE4		BADGE4			148
+webnet			ARCH_WEBNET		WEBNET			149
+d7300			SA1100_D7300		D7300			150
+cep			SA1100_CEP		CEP			151
+fortunet		ARCH_FORTUNET		FORTUNET		152
+vc547x			ARCH_VC547X		VC547X			153
+filewalker		SA1100_FILEWALKER	FILEWALKER		154
+netgateway		SA1100_NETGATEWAY	NETGATEWAY		155
+symbol2800		SA1100_SYMBOL2800	SYMBOL2800		156
+suns			SA1100_SUNS		SUNS			157
+frodo			SA1100_FRODO		FRODO			158
+ms301			SA1100_MACH_TYTE_MS301	MACH_TYTE_MS301		159
+mx1ads			ARCH_MX1ADS		MX1ADS			160
+h7201			ARCH_H7201		H7201			161
+h7202			ARCH_H7202		H7202			162
+amico			ARCH_AMICO		AMICO			163
+iam			SA1100_IAM		IAM			164
+tt530			SA1100_TT530		TT530			165
+sam2400			ARCH_SAM2400		SAM2400			166
+jornada56x		ARCH_JORNADA56X		JORNADA56X		167
+active			SA1100_ACTIVE		ACTIVE			168
+iq80321			ARCH_IQ80321		IQ80321			169
diff -Nru linux/arch/cris/config.in linux-2.4.19-pre5-mjc/arch/cris/config.in
--- linux/arch/cris/config.in	Mon Feb 25 14:37:52 2002
+++ linux-2.4.19-pre5-mjc/arch/cris/config.in	Sat Apr  6 08:29:59 2002
@@ -253,4 +253,6 @@
 if [ "$CONFIG_PROFILE" = "y" ]; then
   int ' Profile shift count' CONFIG_PROFILE_SHIFT 2
 fi
+
+source lib/Config.in
 endmenu
diff -Nru linux/arch/cris/drivers/ethernet.c linux-2.4.19-pre5-mjc/arch/cris/drivers/ethernet.c
--- linux/arch/cris/drivers/ethernet.c	Mon Feb 25 14:37:52 2002
+++ linux-2.4.19-pre5-mjc/arch/cris/drivers/ethernet.c	Sat Apr  6 08:25:59 2002
@@ -1005,7 +1005,7 @@
 	int i;
 #endif
 
-	if (!led_active && jiffies > led_next_time) {
+	if (!led_active && time_after(jiffies, led_next_time)) {
 		/* light the network leds depending on the current speed. */
 		e100_set_network_leds(NETWORK_ACTIVITY);
 
@@ -1297,7 +1297,7 @@
 {
 	D(printk("e100 send pack, buf 0x%x len %d\n", buf, length));
 
-	if (!led_active && jiffies > led_next_time) {
+	if (!led_active && time_after(jiffies, led_next_time)) {
 		/* light the network leds depending on the current speed. */
 		e100_set_network_leds(NETWORK_ACTIVITY);
 
@@ -1322,7 +1322,7 @@
 static void
 e100_clear_network_leds(unsigned long dummy)
 {
-	if (led_active && jiffies > led_next_time) {
+	if (led_active && jiffies > time_after(jiffies, led_next_time)) {
 		e100_set_network_leds(NO_NETWORK_ACTIVITY);
 
 		/* Set the earliest time we may set the LED */
diff -Nru linux/arch/cris/drivers/ide.c linux-2.4.19-pre5-mjc/arch/cris/drivers/ide.c
--- linux/arch/cris/drivers/ide.c	Wed Jul  4 14:50:38 2001
+++ linux-2.4.19-pre5-mjc/arch/cris/drivers/ide.c	Sat Apr  6 08:25:59 2002
@@ -354,7 +354,7 @@
 	printk("ide: waiting %d seconds for drives to regain consciousness\n", CONFIG_ETRAX_IDE_DELAY);
 
 	h = jiffies + (CONFIG_ETRAX_IDE_DELAY * HZ);
-	while(jiffies < h) ;
+	while(time_before(jiffies, h)) ;
 
   /* reset the dma channels we will use */
 
diff -Nru linux/arch/cris/drivers/lpslave/e100lpslavenet.c linux-2.4.19-pre5-mjc/arch/cris/drivers/lpslave/e100lpslavenet.c
--- linux/arch/cris/drivers/lpslave/e100lpslavenet.c	Thu Jul 26 18:10:06 2001
+++ linux-2.4.19-pre5-mjc/arch/cris/drivers/lpslave/e100lpslavenet.c	Sat Apr  6 08:25:59 2002
@@ -310,7 +310,7 @@
 		IO_STATE(R_PAR0_CONFIG, iautofd, noninv)    |
           /* Not used in reverse direction, don't care */
 		IO_STATE(R_PAR0_CONFIG, istrb,   noninv)    |
-          /* Not connected, don't care /
+          /* Not connected, don't care */
 		IO_STATE(R_PAR0_CONFIG, iinit,   noninv)    |
           /* perror is GND and reverse wants 0, noninv */
 		IO_STATE(R_PAR0_CONFIG, iperr,   noninv)    |
diff -Nru linux/arch/cris/kernel/entry.S linux-2.4.19-pre5-mjc/arch/cris/kernel/entry.S
--- linux/arch/cris/kernel/entry.S	Mon Feb 25 14:37:52 2002
+++ linux-2.4.19-pre5-mjc/arch/cris/kernel/entry.S	Sat Apr  6 08:25:59 2002
@@ -1013,6 +1013,7 @@
         .long SYMBOL_NAME(sys_ni_syscall)       /* Reserved for Security */
         .long SYMBOL_NAME(sys_gettid)
         .long SYMBOL_NAME(sys_readahead)        /* 225 */
+        .long SYMBOL_NAME(sys_tkill)
 
         /*
          * NOTE!! This doesn't have to be exact - we just have
diff -Nru linux/arch/cris/kernel/signal.c linux-2.4.19-pre5-mjc/arch/cris/kernel/signal.c
--- linux/arch/cris/kernel/signal.c	Mon Oct  8 14:43:54 2001
+++ linux-2.4.19-pre5-mjc/arch/cris/kernel/signal.c	Sat Apr  6 08:25:59 2002
@@ -679,10 +679,7 @@
 
 			default:
 				lock_kernel();
-				sigaddset(&current->pending.signal, signr);
-				recalc_sigpending(current);
-				current->flags |= PF_SIGNALED;
-				do_exit(exit_code);
+				sig_exit(signr, exit_code, &info);
 				/* NOTREACHED */
 			}
 		}
diff -Nru linux/arch/cris/mm/init.c linux-2.4.19-pre5-mjc/arch/cris/mm/init.c
--- linux/arch/cris/mm/init.c	Mon Feb 25 14:37:52 2002
+++ linux-2.4.19-pre5-mjc/arch/cris/mm/init.c	Sat Apr  6 08:25:59 2002
@@ -465,7 +465,7 @@
                 free_page(addr);
                 totalram_pages++;
         }
-        printk ("Freeing unused kernel memory: %luk freed\n", 
+        printk (KERN_INFO "Freeing unused kernel memory: %luk freed\n", 
 		(&__init_end - &__init_begin) >> 10);
 }
 
diff -Nru linux/arch/i386/Makefile linux-2.4.19-pre5-mjc/arch/i386/Makefile
--- linux/arch/i386/Makefile	Thu Apr 12 15:20:31 2001
+++ linux-2.4.19-pre5-mjc/arch/i386/Makefile	Sat Apr  6 09:37:07 2002
@@ -106,6 +106,9 @@
 
 MAKEBOOT = $(MAKE) -C arch/$(ARCH)/boot
 
+arch/i386/vmlinux.lds: arch/i386/vmlinux.lds.S FORCE
+	$(CPP) -C -P -I$(HPATH) -imacros $(HPATH)/asm-i386/page_offset.h -Ui386 arch/i386/vmlinux.lds.S >arch/i386/vmlinux.lds
+
 vmlinux: arch/i386/vmlinux.lds
 
 FORCE: ;
@@ -142,6 +145,7 @@
 	@$(MAKEBOOT) clean
 
 archmrproper:
+	rm -f arch/i386/vmlinux.lds
 
 archdep:
 	@$(MAKEBOOT) dep
diff -Nru linux/arch/i386/config.in linux-2.4.19-pre5-mjc/arch/i386/config.in
--- linux/arch/i386/config.in	Mon Feb 25 14:37:52 2002
+++ linux-2.4.19-pre5-mjc/arch/i386/config.in	Sat Apr  6 09:37:07 2002
@@ -163,6 +163,9 @@
    define_bool CONFIG_X86_USE_PPRO_CHECKSUM y
    define_bool CONFIG_X86_OOSTORE y
 fi
+
+bool 'Machine Check Exception' CONFIG_X86_MCE
+
 tristate 'Toshiba Laptop support' CONFIG_TOSHIBA
 tristate 'Dell laptop support' CONFIG_I8K
 
@@ -174,17 +177,29 @@
 	"off    CONFIG_NOHIGHMEM \
 	 4GB    CONFIG_HIGHMEM4G \
 	 64GB   CONFIG_HIGHMEM64G" off
-if [ "$CONFIG_HIGHMEM4G" = "y" ]; then
+if [ "$CONFIG_HIGHMEM4G" = "y" -o "$CONFIG_HIGHMEM64G" = "y" ]; then
    define_bool CONFIG_HIGHMEM y
+else
+   define_bool CONFIG_HIGHMEM n
 fi
 if [ "$CONFIG_HIGHMEM64G" = "y" ]; then
-   define_bool CONFIG_HIGHMEM y
    define_bool CONFIG_X86_PAE y
+   choice 'User address space size' \
+	"3GB		CONFIG_1GB \
+	 2GB		CONFIG_2GB \
+	 1GB		CONFIG_3GB" 3GB
+else
+   choice 'User address space size' \
+	"3GB		CONFIG_1GB \
+	 2GB		CONFIG_2GB \
+	 1GB		CONFIG_3GB \
+	 3.5GB		CONFIG_05GB" 3GB
 fi
 
 bool 'Math emulation' CONFIG_MATH_EMULATION
 bool 'MTRR (Memory Type Range Register) support' CONFIG_MTRR
 bool 'Symmetric multi-processing support' CONFIG_SMP
+bool 'Preemptible Kernel' CONFIG_PREEMPT
 if [ "$CONFIG_SMP" != "y" ]; then
    bool 'Local APIC support on uniprocessors' CONFIG_X86_UP_APIC
    dep_bool 'IO-APIC support on uniprocessors' CONFIG_X86_UP_IOAPIC $CONFIG_X86_UP_APIC
@@ -198,9 +213,12 @@
    bool 'Multiquad NUMA system' CONFIG_MULTIQUAD
 fi
 
-if [ "$CONFIG_SMP" = "y" -a "$CONFIG_X86_CMPXCHG" = "y" ]; then
-   define_bool CONFIG_HAVE_DEC_LOCK y
+if [ "$CONFIG_SMP" = "y" -o "$CONFIG_PREEMPT" = "y" ]; then
+   if [ "$CONFIG_X86_CMPXCHG" = "y" ]; then
+      define_bool CONFIG_HAVE_DEC_LOCK y
+   fi
 fi
+
 endmenu
 
 mainmenu_option next_comment
@@ -267,6 +285,8 @@
 tristate 'Kernel support for ELF binaries' CONFIG_BINFMT_ELF
 tristate 'Kernel support for MISC binaries' CONFIG_BINFMT_MISC
 
+bool 'Kernel .config support' CONFIG_IKCONFIG
+
 bool 'Power Management support' CONFIG_PM
 
 if [ "$CONFIG_EXPERIMENTAL" = "y" ]; then
@@ -413,6 +433,9 @@
 
 mainmenu_option next_comment
 comment 'Kernel hacking'
+if [ "$CONFIG_EXPERIMENTAL" = "y" ]; then
+   dep_bool 'Software Suspend' CONFIG_SOFTWARE_SUSPEND $CONFIG_PM
+fi
 
 bool 'Kernel debugging' CONFIG_DEBUG_KERNEL
 if [ "$CONFIG_DEBUG_KERNEL" != "n" ]; then
@@ -421,7 +444,15 @@
    bool '  Memory mapped I/O debugging' CONFIG_DEBUG_IOVIRT
    bool '  Magic SysRq key' CONFIG_MAGIC_SYSRQ
    bool '  Spinlock debugging' CONFIG_DEBUG_SPINLOCK
-   bool '  Verbose BUG() reporting (adds 70K)' CONFIG_DEBUG_BUGVERBOSE
+   bool '  Early printk() on serial I/O port 0x3F8' CONFIG_EARLY_CONSOLE_3F8
+   bool '  Early printk() on serial I/O port 0x3E8' CONFIG_EARLY_CONSOLE_3E8
+   bool '  Early printk() on VGA text console' CONFIG_EARLY_CONSOLE_VGA
+   bool '  Early printk() via the bochs 0xE9 hack' CONFIG_EARLY_CONSOLE_BOCHS_E9_HACK
+   if [ "$CONFIG_HIGHMEM" = "y" ]; then
+      bool '  Emulate HIGHMEM on lowmem machines' CONFIG_HIGHMEM_EMULATION
+   fi
 fi
 
 endmenu
+
+source lib/Config.in
diff -Nru linux/arch/i386/defconfig linux-2.4.19-pre5-mjc/arch/i386/defconfig
--- linux/arch/i386/defconfig	Mon Feb 25 14:37:52 2002
+++ linux-2.4.19-pre5-mjc/arch/i386/defconfig	Sat Apr  6 08:29:59 2002
@@ -31,6 +31,7 @@
 # CONFIG_MPENTIUM4 is not set
 # CONFIG_MK6 is not set
 # CONFIG_MK7 is not set
+# CONFIG_MELAN is not set
 # CONFIG_MCRUSOE is not set
 # CONFIG_MWINCHIPC6 is not set
 # CONFIG_MWINCHIP2 is not set
@@ -49,6 +50,7 @@
 CONFIG_X86_GOOD_APIC=y
 CONFIG_X86_PGE=y
 CONFIG_X86_USE_PPRO_CHECKSUM=y
+CONFIG_X86_MCE=y
 # CONFIG_TOSHIBA is not set
 # CONFIG_I8K is not set
 # CONFIG_MICROCODE is not set
@@ -95,6 +97,8 @@
 # CONFIG_HOTPLUG_PCI is not set
 # CONFIG_HOTPLUG_PCI_COMPAQ is not set
 # CONFIG_HOTPLUG_PCI_COMPAQ_NVRAM is not set
+# CONFIG_HOTPLUG_PCI_IBM is not set
+# CONFIG_HOTPLUG_PCI_ACPI is not set
 CONFIG_SYSVIPC=y
 # CONFIG_BSD_PROCESS_ACCT is not set
 CONFIG_SYSCTL=y
@@ -103,8 +107,10 @@
 CONFIG_BINFMT_AOUT=y
 CONFIG_BINFMT_ELF=y
 CONFIG_BINFMT_MISC=y
+# CONFIG_IKCONFIG is not set
 CONFIG_PM=y
 # CONFIG_APM is not set
+# CONFIG_SOFTWARE_SUSPEND is not set
 
 #
 # Memory Technology Devices (MTD)
@@ -130,6 +136,7 @@
 # CONFIG_PARIDE is not set
 # CONFIG_BLK_CPQ_DA is not set
 # CONFIG_BLK_CPQ_CISS_DA is not set
+# CONFIG_CISS_SCSI_TAPE is not set
 # CONFIG_BLK_DEV_DAC960 is not set
 # CONFIG_BLK_DEV_LOOP is not set
 # CONFIG_BLK_DEV_NBD is not set
@@ -153,7 +160,7 @@
 #
 CONFIG_PACKET=y
 # CONFIG_PACKET_MMAP is not set
-# CONFIG_NETLINK is not set
+# CONFIG_NETLINK_DEV is not set
 # CONFIG_NETFILTER is not set
 # CONFIG_FILTER is not set
 CONFIG_UNIX=y
@@ -204,6 +211,7 @@
 # CONFIG_BLK_DEV_HD is not set
 CONFIG_BLK_DEV_IDEDISK=y
 CONFIG_IDEDISK_MULTI_MODE=y
+# CONFIG_IDEDISK_STROKE is not set
 # CONFIG_BLK_DEV_IDEDISK_VENDOR is not set
 # CONFIG_BLK_DEV_IDEDISK_FUJITSU is not set
 # CONFIG_BLK_DEV_IDEDISK_IBM is not set
@@ -218,6 +226,7 @@
 # CONFIG_BLK_DEV_IDETAPE is not set
 # CONFIG_BLK_DEV_IDEFLOPPY is not set
 # CONFIG_BLK_DEV_IDESCSI is not set
+# CONFIG_IDE_TASK_IOCTL is not set
 
 #
 # IDE chipset support/bugfixes
@@ -229,12 +238,15 @@
 CONFIG_BLK_DEV_IDEPCI=y
 CONFIG_IDEPCI_SHARE_IRQ=y
 CONFIG_BLK_DEV_IDEDMA_PCI=y
-CONFIG_BLK_DEV_ADMA=y
 # CONFIG_BLK_DEV_OFFBOARD is not set
+# CONFIG_BLK_DEV_IDEDMA_FORCED is not set
 CONFIG_IDEDMA_PCI_AUTO=y
+# CONFIG_IDEDMA_ONLYDISK is not set
 CONFIG_BLK_DEV_IDEDMA=y
 # CONFIG_IDEDMA_PCI_WIP is not set
+# CONFIG_BLK_DEV_IDEDMA_TIMEOUT is not set
 # CONFIG_IDEDMA_NEW_DRIVE_LISTINGS is not set
+CONFIG_BLK_DEV_ADMA=y
 # CONFIG_BLK_DEV_AEC62XX is not set
 # CONFIG_AEC62XX_TUNING is not set
 # CONFIG_BLK_DEV_ALI15X3 is not set
@@ -242,6 +254,7 @@
 # CONFIG_BLK_DEV_AMD74XX is not set
 # CONFIG_AMD74XX_OVERRIDE is not set
 # CONFIG_BLK_DEV_CMD64X is not set
+# CONFIG_BLK_DEV_CMD680 is not set
 # CONFIG_BLK_DEV_CY82C693 is not set
 # CONFIG_BLK_DEV_CS5530 is not set
 # CONFIG_BLK_DEV_HPT34X is not set
@@ -260,6 +273,7 @@
 # CONFIG_BLK_DEV_TRM290 is not set
 # CONFIG_BLK_DEV_VIA82CXXX is not set
 # CONFIG_IDE_CHIPSETS is not set
+# CONFIG_BLK_DEV_ELEVATOR_NOOP is not set
 CONFIG_IDEDMA_AUTO=y
 # CONFIG_IDEDMA_IVB is not set
 # CONFIG_DMA_NONPCI is not set
@@ -394,7 +408,6 @@
 # CONFIG_HAPPYMEAL is not set
 # CONFIG_SUNBMAC is not set
 # CONFIG_SUNQE is not set
-# CONFIG_SUNLANCE is not set
 # CONFIG_SUNGEM is not set
 # CONFIG_NET_VENDOR_3COM is not set
 # CONFIG_LANCE is not set
@@ -411,6 +424,7 @@
 # CONFIG_APRICOT is not set
 # CONFIG_CS89x0 is not set
 # CONFIG_TULIP is not set
+# CONFIG_TC35815 is not set
 # CONFIG_DE4X5 is not set
 # CONFIG_DGRS is not set
 # CONFIG_DM9102 is not set
@@ -426,11 +440,13 @@
 # CONFIG_8139TOO_PIO is not set
 # CONFIG_8139TOO_TUNE_TWISTER is not set
 # CONFIG_8139TOO_8129 is not set
+# CONFIG_8139_NEW_RX_RESET is not set
 # CONFIG_SIS900 is not set
 # CONFIG_EPIC100 is not set
 # CONFIG_SUNDANCE is not set
 # CONFIG_TLAN is not set
 # CONFIG_VIA_RHINE is not set
+# CONFIG_VIA_RHINE_MMIO is not set
 # CONFIG_WINBOND_840 is not set
 # CONFIG_NET_POCKET is not set
 
@@ -473,10 +489,10 @@
 # CONFIG_PCMCIA_3C574 is not set
 # CONFIG_PCMCIA_FMVJ18X is not set
 CONFIG_PCMCIA_PCNET=y
+# CONFIG_PCMCIA_AXNET is not set
 # CONFIG_PCMCIA_NMCLAN is not set
 # CONFIG_PCMCIA_SMC91C92 is not set
 # CONFIG_PCMCIA_XIRC2PS is not set
-# CONFIG_PCMCIA_AXNET is not set
 # CONFIG_ARCNET_COM20020_CS is not set
 # CONFIG_PCMCIA_IBMTR is not set
 # CONFIG_PCMCIA_XIRCOM is not set
@@ -496,9 +512,6 @@
 # IrDA (infrared) support
 #
 # CONFIG_IRDA is not set
-CONFIG_IRDA_CACHE_LAST_LSAP=y
-CONFIG_IRDA_FAST_RR=y
-CONFIG_IRDA_DEBUG=y
 
 #
 # ISDN subsystem
@@ -544,6 +557,7 @@
 CONFIG_PSMOUSE=y
 # CONFIG_82C710_MOUSE is not set
 # CONFIG_PC110_PAD is not set
+# CONFIG_MK712_MOUSE is not set
 
 #
 # Joysticks
@@ -563,7 +577,9 @@
 # Watchdog Cards
 #
 # CONFIG_WATCHDOG is not set
+# CONFIG_AMD_RNG is not set
 # CONFIG_INTEL_RNG is not set
+# CONFIG_AMD_PM768 is not set
 # CONFIG_NVRAM is not set
 # CONFIG_RTC is not set
 # CONFIG_DTLK is not set
@@ -583,18 +599,24 @@
 CONFIG_AGP_ALI=y
 # CONFIG_AGP_SWORKS is not set
 CONFIG_DRM=y
+# CONFIG_DRM_OLD is not set
+
+#
+# DRM 4.1 drivers
+#
+CONFIG_DRM_NEW=y
 CONFIG_DRM_TDFX=y
-# CONFIG_DRM_GAMMA is not set
 # CONFIG_DRM_R128 is not set
 CONFIG_DRM_RADEON=y
 # CONFIG_DRM_I810 is not set
+# CONFIG_DRM_I830 is not set
 # CONFIG_DRM_MGA is not set
+# CONFIG_DRM_SIS is not set
 
 #
 # PCMCIA character devices
 #
 # CONFIG_PCMCIA_SERIAL_CS is not set
-# CONFIG_MWAVE is not set
 
 #
 # Multimedia devices
@@ -631,6 +653,9 @@
 CONFIG_ISO9660_FS=y
 # CONFIG_JOLIET is not set
 # CONFIG_ZISOFS is not set
+# CONFIG_JFS_FS is not set
+# CONFIG_JFS_DEBUG is not set
+# CONFIG_JFS_STATISTICS is not set
 # CONFIG_MINIX_FS is not set
 # CONFIG_VXFS_FS is not set
 # CONFIG_NTFS_FS is not set
@@ -674,7 +699,6 @@
 # CONFIG_NCPFS_NLS is not set
 # CONFIG_NCPFS_EXTRAS is not set
 # CONFIG_ZISOFS_FS is not set
-# CONFIG_ZLIB_FS_INFLATE is not set
 
 #
 # Partition Types
@@ -730,8 +754,9 @@
 # CONFIG_USB_LONG_TIMEOUT is not set
 
 #
-# USB Controllers
+# USB Host Controller Drivers
 #
+# CONFIG_USB_EHCI_HCD is not set
 CONFIG_USB_UHCI_ALT=y
 # CONFIG_USB_OHCI is not set
 
@@ -739,6 +764,7 @@
 # USB Device Class drivers
 #
 # CONFIG_USB_AUDIO is not set
+# CONFIG_USB_EMI26 is not set
 # CONFIG_USB_BLUETOOTH is not set
 CONFIG_USB_STORAGE=y
 # CONFIG_USB_STORAGE_DEBUG is not set
@@ -802,6 +828,7 @@
 # CONFIG_USB_SERIAL_EMPEG is not set
 # CONFIG_USB_SERIAL_FTDI_SIO is not set
 # CONFIG_USB_SERIAL_VISOR is not set
+# CONFIG_USB_SERIAL_IPAQ is not set
 # CONFIG_USB_SERIAL_IR is not set
 # CONFIG_USB_SERIAL_EDGEPORT is not set
 # CONFIG_USB_SERIAL_KEYSPAN_PDA is not set
@@ -815,6 +842,7 @@
 # CONFIG_USB_SERIAL_KEYSPAN_USA19W is not set
 # CONFIG_USB_SERIAL_KEYSPAN_USA49W is not set
 # CONFIG_USB_SERIAL_MCT_U232 is not set
+# CONFIG_USB_SERIAL_KLSI is not set
 # CONFIG_USB_SERIAL_PL2303 is not set
 # CONFIG_USB_SERIAL_CYBERJACK is not set
 # CONFIG_USB_SERIAL_XIRCOM is not set
@@ -824,8 +852,15 @@
 # USB Miscellaneous drivers
 #
 # CONFIG_USB_RIO500 is not set
+# CONFIG_USB_AUERSWALD is not set
 
 #
 # Kernel hacking
 #
 # CONFIG_DEBUG_KERNEL is not set
+
+#
+# Library routines
+#
+# CONFIG_ZLIB_INFLATE is not set
+# CONFIG_ZLIB_DEFLATE is not set
diff -Nru linux/arch/i386/kernel/acpitable.c linux-2.4.19-pre5-mjc/arch/i386/kernel/acpitable.c
--- linux/arch/i386/kernel/acpitable.c	Sun Nov 11 22:15:06 2001
+++ linux-2.4.19-pre5-mjc/arch/i386/kernel/acpitable.c	Sat Apr  6 08:25:59 2002
@@ -172,40 +172,41 @@
 
 
 /*
- * Temporarily use the virtual area starting from FIX_IO_APIC_BASE_0,
+ * Temporarily use the virtual area starting from FIX_IO_APIC_BASE_END,
  * to map the target physical address. The problem is that set_fixmap()
  * provides a single page, and it is possible that the page is not
  * sufficient.
  * By using this area, we can map up to MAX_IO_APICS pages temporarily,
  * i.e. until the next __va_range() call.
+ *
+ * Important Safety Note:  The fixed I/O APIC page numbers are *subtracted*
+ * from the fixed base.  That's why we start at FIX_IO_APIC_BASE_END and
+ * count idx down while incrementing the phys address.
  */
-static __inline__ char *
+static __init char *
 __va_range(unsigned long phys, unsigned long size)
 {
-	unsigned long base, offset, mapped_size, mapped_phys = phys;
-	int idx = FIX_IO_APIC_BASE_0;
+	unsigned long base, offset, mapped_size;
+	int idx;
 
 	offset = phys & (PAGE_SIZE - 1);
 	mapped_size = PAGE_SIZE - offset;
-	set_fixmap(idx, mapped_phys);
-	base = fix_to_virt(FIX_IO_APIC_BASE_0);
+	set_fixmap(FIX_IO_APIC_BASE_END, phys);
+	base = fix_to_virt(FIX_IO_APIC_BASE_END);
+	dprintk("__va_range(0x%lx, 0x%lx): idx=%d mapped at %lx\n", phys, size,
+		FIX_IO_APIC_BASE_END, base);
 
 	/*
 	 * Most cases can be covered by the below.
 	 */
-	if (mapped_size >= size)
-		return ((unsigned char *) base + offset);
-
-	dprintk("__va_range: mapping more than a single page, size = 0x%lx\n",
-		size);
-
-	do {
-		if (idx++ == FIX_IO_APIC_BASE_END)
+	idx = FIX_IO_APIC_BASE_END;
+	while (mapped_size < size) {
+		if (--idx < FIX_IO_APIC_BASE_0)
 			return 0;	/* cannot handle this */
-		mapped_phys = mapped_phys + PAGE_SIZE;
-		set_fixmap(idx, mapped_phys);
-		mapped_size = mapped_size + PAGE_SIZE;
-	} while (mapped_size < size);
+		phys += PAGE_SIZE;
+		set_fixmap(idx, phys);
+		mapped_size += PAGE_SIZE;
+	}
 
 	return ((unsigned char *) base + offset);
 }
@@ -267,11 +268,14 @@
 	}
 
 	for (i = 0; i < tables; i++) {
-
+		/* Map in header, then map in full table length. */
 		header = (acpi_table_header *)
 			    __va_range(saved_rsdt.entry[i],
 				       sizeof(acpi_table_header));
-
+		if (!header)
+			break;
+		header = (acpi_table_header *)
+			    __va_range(saved_rsdt.entry[i], header->length);
 		if (!header)
 			break;
 
diff -Nru linux/arch/i386/kernel/apic.c linux-2.4.19-pre5-mjc/arch/i386/kernel/apic.c
--- linux/arch/i386/kernel/apic.c	Mon Feb 25 14:37:52 2002
+++ linux-2.4.19-pre5-mjc/arch/i386/kernel/apic.c	Sat Apr  6 08:29:59 2002
@@ -582,12 +582,17 @@
  * Detect and enable local APICs on non-SMP boards.
  * Original code written by Keir Fraser.
  */
+int dont_enable_local_apic __initdata = 0;
 
 static int __init detect_init_APIC (void)
 {
 	u32 h, l, features;
 	extern void get_cpu_vendor(struct cpuinfo_x86*);
 
+	/* Disabled by DMI scan or kernel option? */
+	if (dont_enable_local_apic)
+		return -1;
+
 	/* Workaround for us being called before identify_cpu(). */
 	get_cpu_vendor(&boot_cpu_data);
 
@@ -796,8 +801,7 @@
 	 */
 
 	slice = clocks / (smp_num_cpus+1);
-	printk("cpu: %d, clocks: %d, slice: %d\n",
-		smp_processor_id(), clocks, slice);
+	printk("cpu: %d, clocks: %d, slice: %d\n", smp_processor_id(), clocks, slice);
 
 	/*
 	 * Wait for IRQ0's slice:
@@ -820,8 +824,7 @@
 
 	__setup_APIC_LVTT(clocks);
 
-	printk("CPU%d<T0:%d,T1:%d,D:%d,S:%d,C:%d>\n",
-			smp_processor_id(), t0, t1, delta, slice, clocks);
+	printk("CPU%d<T0:%d,T1:%d,D:%d,S:%d,C:%d>\n", smp_processor_id(), t0, t1, delta, slice, clocks);
 
 	__restore_flags(flags);
 }
@@ -905,8 +908,14 @@
 
 static unsigned int calibration_result;
 
+int dont_use_local_apic_timer __initdata = 0;
+
 void __init setup_APIC_clocks (void)
 {
+	/* Disabled by DMI scan or kernel option? */
+	if (dont_use_local_apic_timer)
+		return;
+
 	printk("Using local APIC timer interrupts.\n");
 	using_apic_timer = 1;
 
@@ -922,6 +931,26 @@
 
 	/* and update all other cpus */
 	smp_call_function(setup_APIC_timer, (void *)calibration_result, 1, 1);
+}
+
+void __init disable_APIC_timer(void)
+{
+	if (using_apic_timer) {
+		unsigned long v;
+
+		v = apic_read(APIC_LVTT);
+		apic_write_around(APIC_LVTT, v | APIC_LVT_MASKED);
+	}
+}
+
+void enable_APIC_timer(void)
+{
+	if (using_apic_timer) {
+		unsigned long v;
+
+		v = apic_read(APIC_LVTT);
+		apic_write_around(APIC_LVTT, v & ~APIC_LVT_MASKED);
+	}
 }
 
 /*
diff -Nru linux/arch/i386/kernel/apm.c linux-2.4.19-pre5-mjc/arch/i386/kernel/apm.c
--- linux/arch/i386/kernel/apm.c	Mon Feb 25 14:37:53 2002
+++ linux-2.4.19-pre5-mjc/arch/i386/kernel/apm.c	Sat Apr  6 08:29:59 2002
@@ -275,10 +275,11 @@
  */
 
 /*
- * Define to always call the APM BIOS busy routine even if the clock was
- * not slowed by the idle routine.
+ * Define as 1 to make the driver always call the APM BIOS busy
+ * routine even if the clock was not reported as slowed by the
+ * idle routine.  Otherwise, define as 0.
  */
-#define ALWAYS_CALL_BUSY
+#define ALWAYS_CALL_BUSY   1
 
 /*
  * Define to make the APM BIOS calls zero all data segment registers (so
@@ -380,7 +381,7 @@
 static int			set_pm_idle;
 static int			suspends_pending;
 static int			standbys_pending;
-static int			waiting_for_resume;
+static int			ignore_sys_suspend;
 static int			ignore_normal_resume;
 static int			bounce_interval = DEFAULT_BOUNCE_INTERVAL;
 
@@ -470,6 +471,28 @@
 };
 #define ERROR_COUNT	(sizeof(error_table)/sizeof(lookup_t))
 
+/**
+ *	apm_error	-	display an APM error
+ *	@str: information string
+ *	@err: APM BIOS return code
+ *
+ *	Write a meaningful log entry to the kernel log in the event of
+ *	an APM error.
+ */
+ 
+static void apm_error(char *str, int err)
+{
+	int	i;
+
+	for (i = 0; i < ERROR_COUNT; i++)
+		if (error_table[i].key == err) break;
+	if (i < ERROR_COUNT)
+		printk(KERN_NOTICE "apm: %s: %s\n", str, error_table[i].msg);
+	else
+		printk(KERN_NOTICE "apm: %s: unknown error code %#2.2x\n",
+			str, err);
+}
+
 /*
  * These are the actual BIOS calls.  Depending on APM_ZERO_SEGS and
  * apm_info.allow_ints, we are being really paranoid here!  Not only
@@ -701,13 +724,13 @@
 }
 
 /**
- *	apm_set_power_state - set system wide power state
+ *	set_system_power_state - set system wide power state
  *	@state: which state to enter
  *
  *	Transition the entire system into a new APM power state.
  */
  
-static int apm_set_power_state(u_short state)
+static int set_system_power_state(u_short state)
 {
 	return set_power_state(APM_DEVICE_ALL, state);
 }
@@ -724,7 +747,6 @@
 static int apm_do_idle(void)
 {
 	u32	eax;
-	int	slowed;
 
 	if (apm_bios_call_simple(APM_FUNC_IDLE, 0, 0, &eax)) {
 		static unsigned long t;
@@ -736,13 +758,8 @@
 		}
 		return -1;
 	}
-	slowed = (apm_info.bios.flags & APM_IDLE_SLOWS_CLOCK) != 0;
-#ifdef ALWAYS_CALL_BUSY
-	clock_slowed = 1;
-#else
-	clock_slowed = slowed;
-#endif
-	return slowed;
+	clock_slowed = (apm_info.bios.flags & APM_IDLE_SLOWS_CLOCK) != 0;
+	return clock_slowed;
 }
 
 /**
@@ -755,7 +772,7 @@
 {
 	u32	dummy;
 
-	if (clock_slowed) {
+	if (clock_slowed || ALWAYS_CALL_BUSY) {
 		(void) apm_bios_call_simple(APM_FUNC_BUSY, 0, 0, &dummy);
 		clock_slowed = 0;
 	}
@@ -770,7 +787,7 @@
 #define IDLE_CALC_LIMIT   (HZ * 100)
 #define IDLE_LEAKY_MAX    16
 
-static void (*sys_idle)(void);
+static void (*original_pm_idle)(void);
 
 extern void default_idle(void);
 
@@ -784,14 +801,13 @@
 
 static void apm_cpu_idle(void)
 {
-	static int use_apm_idle = 0;
-	static unsigned int last_jiffies = 0;
-	static unsigned int last_stime = 0;
+	static int use_apm_idle; /* = 0 */
+	static unsigned int last_jiffies; /* = 0 */
+	static unsigned int last_stime; /* = 0 */
 
-	int apm_is_idle = 0;
+	int apm_idle_done = 0;
 	unsigned int jiffies_since_last_check = jiffies - last_jiffies;
-	unsigned int t1;
-
+	unsigned int bucket;
 
 recalc:
 	if (jiffies_since_last_check > IDLE_CALC_LIMIT) {
@@ -809,7 +825,7 @@
 		last_stime = current->times.tms_stime;
 	}
 
-	t1 = IDLE_LEAKY_MAX;
+	bucket = IDLE_LEAKY_MAX;
 
 	while (!current->need_resched) {
 		if (use_apm_idle) {
@@ -817,23 +833,24 @@
 
 			t = jiffies;
 			switch (apm_do_idle()) {
-			case 0: apm_is_idle = 1;
+			case 0: apm_idle_done = 1;
 				if (t != jiffies) {
-					if (t1) {
-						t1 = IDLE_LEAKY_MAX;
+					if (bucket) {
+						bucket = IDLE_LEAKY_MAX;
 						continue;
 					}
-				} else if (t1) {
-					t1--;
+				} else if (bucket) {
+					bucket--;
 					continue;
 				}
 				break;
-			case 1: apm_is_idle = 1;
+			case 1: apm_idle_done = 1;
 				break;
+			default: /* BIOS refused */
 			}
 		}
-		if (sys_idle)
-			sys_idle();
+		if (original_pm_idle)
+			original_pm_idle();
 		else
 			default_idle();
 		jiffies_since_last_check = jiffies - last_jiffies;
@@ -841,7 +858,7 @@
 			goto recalc;
 	}
 
-	if (apm_is_idle)
+	if (apm_idle_done)
 		apm_do_busy();
 }
 
@@ -889,7 +906,7 @@
 	if (apm_info.realmode_power_off)
 		machine_real_restart(po_bios_call, sizeof(po_bios_call));
 	else
-		(void) apm_set_power_state(APM_STATE_OFF);
+		(void) set_system_power_state(APM_STATE_OFF);
 }
 
 /**
@@ -1034,28 +1051,6 @@
 	return APM_SUCCESS;
 }
 
-/**
- *	apm_error	-	display an APM error
- *	@str: information string
- *	@err: APM BIOS return code
- *
- *	Write a meaningful log entry to the kernel log in the event of
- *	an APM error.
- */
- 
-static void apm_error(char *str, int err)
-{
-	int	i;
-
-	for (i = 0; i < ERROR_COUNT; i++)
-		if (error_table[i].key == err) break;
-	if (i < ERROR_COUNT)
-		printk(KERN_NOTICE "apm: %s: %s\n", str, error_table[i].msg);
-	else
-		printk(KERN_NOTICE "apm: %s: unknown error code %#2.2x\n",
-			str, err);
-}
-
 #if defined(CONFIG_APM_DISPLAY_BLANK) && defined(CONFIG_VT)
 
 /**
@@ -1194,9 +1189,9 @@
 		/* Vetoed */
 		if (vetoable) {
 			if (apm_info.connection_version > 0x100)
-				apm_set_power_state(APM_STATE_REJECT);
+				set_system_power_state(APM_STATE_REJECT);
 			err = -EBUSY;
-			waiting_for_resume = 0;
+			ignore_sys_suspend = 0;
 			printk(KERN_WARNING "apm: suspend was vetoed.\n");
 			goto out;
 		}
@@ -1204,9 +1199,10 @@
 	}
 	get_time_diff();
 	cli();
-	err = apm_set_power_state(APM_STATE_SUSPEND);
+	err = set_system_power_state(APM_STATE_SUSPEND);
 	reinit_timer();
 	set_time();
+	ignore_normal_resume = 1;
 	sti();
 	if (err == APM_NO_ERROR)
 		err = APM_SUCCESS;
@@ -1215,7 +1211,6 @@
 	err = (err == APM_SUCCESS) ? 0 : -EIO;
 	pm_send_all(PM_RESUME, (void *)0);
 	queue_event(APM_NORMAL_RESUME, NULL);
-	ignore_normal_resume = 1;
  out:
 	for (as = user_list; as != NULL; as = as->next) {
 		as->suspend_wait = 0;
@@ -1231,7 +1226,7 @@
 
 	/* If needed, notify drivers here */
 	get_time_diff();
-	err = apm_set_power_state(APM_STATE_STANDBY);
+	err = set_system_power_state(APM_STATE_STANDBY);
 	if ((err != APM_SUCCESS) && (err != APM_NO_ERROR))
 		apm_error("standby", err);
 }
@@ -1285,13 +1280,13 @@
 		case APM_USER_SUSPEND:
 #ifdef CONFIG_APM_IGNORE_USER_SUSPEND
 			if (apm_info.connection_version > 0x100)
-				apm_set_power_state(APM_STATE_REJECT);
+				set_system_power_state(APM_STATE_REJECT);
 			break;
 #endif
 		case APM_SYS_SUSPEND:
 			if (ignore_bounce) {
 				if (apm_info.connection_version > 0x100)
-					apm_set_power_state(APM_STATE_REJECT);
+					set_system_power_state(APM_STATE_REJECT);
 				break;
 			}
 			/*
@@ -1302,9 +1297,9 @@
 			 * sending a SUSPEND event until something else
 			 * happens!
 			 */
-			if (waiting_for_resume)
+			if (ignore_sys_suspend)
 				return;
-			waiting_for_resume = 1;
+			ignore_sys_suspend = 1;
 			queue_event(event, NULL);
 			if (suspends_pending <= 0)
 				(void) suspend(1);
@@ -1313,7 +1308,7 @@
 		case APM_NORMAL_RESUME:
 		case APM_CRITICAL_RESUME:
 		case APM_STANDBY_RESUME:
-			waiting_for_resume = 0;
+			ignore_sys_suspend = 0;
 			last_resume = jiffies;
 			ignore_bounce = 1;
 			if ((event != APM_NORMAL_RESUME)
@@ -1357,7 +1352,7 @@
 			pending_count = 4;
 			if (debug)
 				printk(KERN_DEBUG "apm: setting state busy\n");
-			err = apm_set_power_state(APM_STATE_BUSY);
+			err = set_system_power_state(APM_STATE_BUSY);
 			if (err)
 				apm_error("busy", err);
 		}
@@ -1664,6 +1659,7 @@
 	daemonize();
 
 	strcpy(current->comm, "kapmd");
+	current->flags |= PF_IOTHREAD;
 	sigfillset(&current->blocked);
 
 	if (apm_info.connection_version == 0) {
@@ -1964,7 +1960,7 @@
 	if (HZ != 100)
 		idle_period = (idle_period * HZ) / 100;
 	if (idle_threshold < 100) {
-		sys_idle = pm_idle;
+		original_pm_idle = pm_idle;
 		pm_idle  = apm_cpu_idle;
 		set_pm_idle = 1;
 	}
@@ -1977,7 +1973,7 @@
 	int	error;
 
 	if (set_pm_idle)
-		pm_idle = sys_idle;
+		pm_idle = original_pm_idle;
 	if (((apm_info.bios.flags & APM_BIOS_DISENGAGED) == 0)
 	    && (apm_info.connection_version > 0x0100)) {
 		error = apm_engage_power_management(APM_DEVICE_ALL, 0);
diff -Nru linux/arch/i386/kernel/bluesmoke.c linux-2.4.19-pre5-mjc/arch/i386/kernel/bluesmoke.c
--- linux/arch/i386/kernel/bluesmoke.c	Mon Nov 12 12:59:43 2001
+++ linux-2.4.19-pre5-mjc/arch/i386/kernel/bluesmoke.c	Sat Apr  6 08:25:59 2002
@@ -3,9 +3,12 @@
 #include <linux/types.h>
 #include <linux/kernel.h>
 #include <linux/sched.h>
+#include <linux/config.h>
 #include <asm/processor.h> 
 #include <asm/msr.h>
 
+#ifdef CONFIG_X86_MCE
+
 static int mce_disabled __initdata = 0;
 
 /*
@@ -41,13 +44,12 @@
 			if(high&(1<<27))
 			{
 				rdmsr(MSR_IA32_MC0_MISC+i*4, alow, ahigh);
-				printk("[%08x%08x]", alow, ahigh);
+				printk("[%08x%08x]", ahigh, alow);
 			}
 			if(high&(1<<26))
 			{
 				rdmsr(MSR_IA32_MC0_ADDR+i*4, alow, ahigh);
-				printk(" at %08x%08x", 
-					high, low);
+				printk(" at %08x%08x", ahigh, alow);
 			}
 			printk("\n");
 			/* Clear it */
@@ -247,3 +249,8 @@
 
 __setup("nomce", mcheck_disable);
 __setup("mce", mcheck_enable);
+
+#else
+asmlinkage void do_machine_check(struct pt_regs * regs, long error_code) {}
+void __init mcheck_init(struct cpuinfo_x86 *c) {}
+#endif
diff -Nru linux/arch/i386/kernel/dmi_scan.c linux-2.4.19-pre5-mjc/arch/i386/kernel/dmi_scan.c
--- linux/arch/i386/kernel/dmi_scan.c	Mon Feb 25 14:37:53 2002
+++ linux-2.4.19-pre5-mjc/arch/i386/kernel/dmi_scan.c	Sat Apr  6 08:29:59 2002
@@ -9,6 +9,7 @@
 #include <linux/pm.h>
 #include <asm/keyboard.h>
 #include <asm/system.h>
+#include <linux/bootmem.h>
 
 unsigned long dmi_broken;
 int is_sony_vaio_laptop;
@@ -51,7 +52,7 @@
 	u8 *data;
 	int i=1;
 		
-	buf = ioremap(base, len);
+	buf = bt_ioremap(base, len);
 	if(buf==NULL)
 		return -1;
 
@@ -83,7 +84,7 @@
 		data+=2;
 		i++;
 	}
-	iounmap(buf);
+	bt_iounmap(buf, len);
 	return 0;
 }
 
@@ -155,7 +156,7 @@
 		return;
 	if (dmi_ident[slot])
 		return;
-	dmi_ident[slot] = kmalloc(strlen(p)+1, GFP_KERNEL);
+	dmi_ident[slot] = alloc_bootmem(strlen(p)+1);
 	if(dmi_ident[slot])
 		strcpy(dmi_ident[slot], p);
 	else
@@ -292,6 +293,62 @@
 	return 0;
 }
 
+/*
+ * Some machines, usually laptops, can't handle an enabled local APIC.
+ * The symptoms include hangs or reboots when suspending or resuming,
+ * attaching or detaching the power cord, or entering BIOS setup screens
+ * through magic key sequences.
+ */
+static int __init local_apic_kills_bios(struct dmi_blacklist *d)
+{
+#ifdef CONFIG_X86_LOCAL_APIC
+	extern int dont_enable_local_apic;
+	if (!dont_enable_local_apic) {
+		dont_enable_local_apic = 1;
+		printk(KERN_WARNING "%s with broken BIOS detected. "
+		       "Refusing to enable the local APIC.\n",
+		       d->ident);
+	}
+#endif
+	return 0;
+}
+
+/*
+ * The Microstar 6163-2 (a.k.a Pro) mainboard will hang shortly after
+ * resumes, and also at what appears to be asynchronous APM events,
+ * if the local APIC is enabled.
+ */
+static int __init apm_kills_local_apic(struct dmi_blacklist *d)
+{
+#ifdef CONFIG_X86_LOCAL_APIC
+	extern int dont_enable_local_apic;
+	if (apm_info.bios.version && !dont_enable_local_apic) {
+		dont_enable_local_apic = 1;
+		printk(KERN_WARNING "%s with broken BIOS detected. "
+		       "Refusing to enable the local APIC.\n",
+		       d->ident);
+	}
+#endif
+	return 0;
+}
+
+/*
+ * The Intel AL440LX mainboard will hang randomly if the local APIC
+ * timer is running and the APM BIOS hasn't been disabled.
+ */
+static int __init apm_kills_local_apic_timer(struct dmi_blacklist *d)
+{
+#ifdef CONFIG_X86_LOCAL_APIC
+	extern int dont_use_local_apic_timer;
+	if (apm_info.bios.version && !dont_use_local_apic_timer) {
+		dont_use_local_apic_timer = 1;
+		printk(KERN_WARNING "%s with broken BIOS detected. "
+		       "The local APIC timer will not be used.\n",
+		       d->ident);
+	}
+#endif
+	return 0;
+}
 
 /*
  *  Check for clue free BIOS implementations who use
@@ -414,6 +471,22 @@
 	return 0;
 }
 
+/*
+ * Work around broken HP Pavilion Notebooks which assign USB to
+ * IRQ 9 even though it is actually wired to IRQ 11
+ */
+static __init int fix_broken_hp_bios_irq9(struct dmi_blacklist *d)
+{
+#ifdef CONFIG_PCI
+	extern int broken_hp_bios_irq9;
+	if (broken_hp_bios_irq9 == 0)
+	{
+		broken_hp_bios_irq9 = 1;
+		printk(KERN_INFO "%s detected - fixing broken IRQ routing\n", d->ident);
+	}
+#endif
+	return 0;
+}
 
 /*
  *	Simple "print if true" callback
@@ -452,6 +525,11 @@
 			MATCH(DMI_BIOS_VERSION, "A04"),
 			MATCH(DMI_BIOS_DATE, "08/24/2000"), NO_MATCH
 			} },
+	{ broken_apm_power, "Dell Inspiron 2500", {	/* Handle problems with APM on Inspiron 2500 */
+			MATCH(DMI_BIOS_VENDOR, "Phoenix Technologies LTD"),
+			MATCH(DMI_BIOS_VERSION, "A12"),
+			MATCH(DMI_BIOS_DATE, "02/04/2002"), NO_MATCH
+			} },
 	{ set_realmode_power_off, "Award Software v4.60 PGMA", {	/* broken PM poweroff bios */
 			MATCH(DMI_BIOS_VENDOR, "Award Software International, Inc."),
 			MATCH(DMI_BIOS_VERSION, "4.60 PGMA"),
@@ -493,12 +571,23 @@
 			MATCH(DMI_PRODUCT_NAME, "Delhi3"),
 			NO_MATCH, NO_MATCH,
 			} },
+	{ apm_is_horked, "Fujitsu-Siemens", { /* APM crashes */
+			MATCH(DMI_BIOS_VENDOR, "hoenix/FUJITSU SIEMENS"),
+			MATCH(DMI_BIOS_VERSION, "Version1.01"),
+			NO_MATCH, NO_MATCH,
+			} },
 	{ apm_is_horked, "Sharp PC-PJ/AX", { /* APM crashes */
 			MATCH(DMI_SYS_VENDOR, "SHARP"),
 			MATCH(DMI_PRODUCT_NAME, "PC-PJ/AX"),
 			MATCH(DMI_BIOS_VENDOR,"SystemSoft"),
 			MATCH(DMI_BIOS_VERSION,"Version R2.08")
 			} },
+	{ apm_is_horked, "Dell Inspiron 2500", { /* APM crashes */
+			MATCH(DMI_SYS_VENDOR, "Dell Computer Corporation"),
+			MATCH(DMI_PRODUCT_NAME, "Inspiron 2500"),
+			MATCH(DMI_BIOS_VENDOR,"Phoenix Technologies LTD"),
+			MATCH(DMI_BIOS_VERSION,"A11")
+			} },
 	{ sony_vaio_laptop, "Sony Vaio", { /* This is a Sony Vaio laptop */
 			MATCH(DMI_SYS_VENDOR, "Sony Corporation"),
 			MATCH(DMI_PRODUCT_NAME, "PCG-"),
@@ -534,6 +623,12 @@
 			MATCH(DMI_BIOS_DATE, "08/11/00"), NO_MATCH
 			} },
 
+	{ swab_apm_power_in_minutes, "Sony VAIO", {	/* Handle problems with APM on Sony Vaio PCG-Z600LEK(DE) */
+			MATCH(DMI_BIOS_VENDOR, "Phoenix Technologies LTD"),
+			MATCH(DMI_BIOS_VERSION, "R0206Z3"),
+			MATCH(DMI_BIOS_DATE, "12/25/00"), NO_MATCH
+			} },
+
 	{ swab_apm_power_in_minutes, "Sony VAIO", {	/* Handle problems with APM on Sony Vaio PCG-Z505LS */
 			MATCH(DMI_BIOS_VENDOR, "Phoenix Technologies LTD"),
 			MATCH(DMI_BIOS_VERSION, "R0203D0"),
@@ -563,6 +658,36 @@
 			MATCH(DMI_BIOS_DATE, "09/12/00"), NO_MATCH
 			} },
 
+	/* Machines which have problems handling enabled local APICs */
+
+	{ local_apic_kills_bios, "Dell Inspiron", {
+			MATCH(DMI_SYS_VENDOR, "Dell Computer Corporation"),
+			MATCH(DMI_PRODUCT_NAME, "Inspiron"),
+			NO_MATCH, NO_MATCH
+			} },
+
+	{ local_apic_kills_bios, "Dell Latitude", {
+			MATCH(DMI_SYS_VENDOR, "Dell Computer Corporation"),
+			MATCH(DMI_PRODUCT_NAME, "Latitude"),
+			NO_MATCH, NO_MATCH
+			} },
+
+	{ local_apic_kills_bios, "IBM Thinkpad T20", {
+			MATCH(DMI_BOARD_VENDOR, "IBM"),
+			MATCH(DMI_BOARD_NAME, "264741U"),
+			NO_MATCH, NO_MATCH
+			} },
+
+	{ apm_kills_local_apic, "Microstar 6163", {
+			MATCH(DMI_BOARD_VENDOR, "MICRO-STAR INTERNATIONAL CO., LTD"),
+			MATCH(DMI_BOARD_NAME, "MS-6163"),
+			NO_MATCH, NO_MATCH } },
+
+	{ apm_kills_local_apic_timer, "Intel AL440LX", {
+			MATCH(DMI_BOARD_VENDOR, "Intel Corporation"),
+			MATCH(DMI_BOARD_NAME, "AL440LX"),
+			NO_MATCH, NO_MATCH } },
+
 	/* Problem Intel 440GX bioses */
 
 	{ broken_pirq, "SABR1 Bios", {			/* Bad $PIR */
@@ -619,7 +744,14 @@
 			NO_MATCH, NO_MATCH
 			} },
 	 
-			
+	{ fix_broken_hp_bios_irq9, "HP Pavilion N5400 Series Laptop", {
+			MATCH(DMI_SYS_VENDOR, "Hewlett-Packard"),
+			MATCH(DMI_BIOS_VERSION, "GE.M1.03"),
+			MATCH(DMI_PRODUCT_VERSION, "HP Pavilion Notebook Model GE"),
+			MATCH(DMI_BOARD_VERSION, "OmniBook N32N-736")
+			} },
+ 
+
 	/*
 	 *	Generic per vendor APM settings
 	 */
@@ -731,12 +863,9 @@
 	}
 }
 
-static int __init dmi_scan_machine(void)
+void __init dmi_scan_machine(void)
 {
 	int err = dmi_iterate(dmi_decode);
 	if(err == 0)
 		dmi_check_blacklist();
-	return err;
 }
-
-module_init(dmi_scan_machine);
diff -Nru linux/arch/i386/kernel/entry.S linux-2.4.19-pre5-mjc/arch/i386/kernel/entry.S
--- linux/arch/i386/kernel/entry.S	Mon Feb 25 14:37:53 2002
+++ linux-2.4.19-pre5-mjc/arch/i386/kernel/entry.S	Sat Apr  6 08:35:14 2002
@@ -71,16 +71,36 @@
  * these are offsets into the task-struct.
  */
 state		=  0
-flags		=  4
+preempt_count	=  4
 sigpending	=  8
 addr_limit	= 12
 exec_domain	= 16
 need_resched	= 20
 tsk_ptrace	= 24
-processor	= 52
+cpu		= 32
+
+/* These are offsets into the irq_stat structure
+ * There is one per cpu and it is aligned to 32
+ * byte boundry (we put that here as a shift count)
+ */
+irq_array_shift                 = CONFIG_X86_L1_CACHE_SHIFT
+
+irq_stat_local_irq_count        = 4
+irq_stat_local_bh_count         = 8
 
 ENOSYS = 38
 
+#ifdef CONFIG_SMP
+#define GET_CPU_INDX	movl cpu(%ebx),%eax;  \
+                        shll $irq_array_shift,%eax
+#define GET_CURRENT_CPU_INDX GET_CURRENT(%ebx); \
+                             GET_CPU_INDX
+#define CPU_INDX (,%eax)
+#else
+#define GET_CPU_INDX
+#define GET_CURRENT_CPU_INDX GET_CURRENT(%ebx)
+#define CPU_INDX
+#endif
 
 #define SAVE_ALL \
 	cld; \
@@ -176,9 +196,11 @@
 
 
 ENTRY(ret_from_fork)
+#if CONFIG_SMP || CONFIG_PREEMPT
 	pushl %ebx
 	call SYMBOL_NAME(schedule_tail)
 	addl $4, %esp
+#endif
 	GET_CURRENT(%ebx)
 	testb $0x02,tsk_ptrace(%ebx)	# PT_TRACESYS
 	jne tracesys_exit
@@ -247,12 +269,30 @@
 	ALIGN
 ENTRY(ret_from_intr)
 	GET_CURRENT(%ebx)
+#ifdef CONFIG_PREEMPT
+	cli
+	decl preempt_count(%ebx)
+#endif
 ret_from_exception:
 	movl EFLAGS(%esp),%eax		# mix EFLAGS and CS
 	movb CS(%esp),%al
 	testl $(VM_MASK | 3),%eax	# return to VM86 mode or non-supervisor?
 	jne ret_from_sys_call
+#ifdef CONFIG_PREEMPT
+	cmpl $0,preempt_count(%ebx)
+	jnz restore_all
+	cmpl $0,need_resched(%ebx)
+	jz restore_all
+	movl SYMBOL_NAME(irq_stat)+irq_stat_local_bh_count CPU_INDX,%ecx
+	addl SYMBOL_NAME(irq_stat)+irq_stat_local_irq_count CPU_INDX,%ecx
+	jnz restore_all
+	incl preempt_count(%ebx)
+	sti
+	call SYMBOL_NAME(preempt_schedule)
+	jmp ret_from_intr
+#else
 	jmp restore_all
+#endif
 
 	ALIGN
 reschedule:
@@ -289,6 +329,9 @@
 	GET_CURRENT(%ebx)
 	call *%edi
 	addl $8,%esp
+#ifdef CONFIG_PREEMPT
+	cli
+#endif
 	jmp ret_from_exception
 
 ENTRY(coprocessor_error)
@@ -308,12 +351,18 @@
 	movl %cr0,%eax
 	testl $0x4,%eax			# EM (math emulation bit)
 	jne device_not_available_emulate
+#ifdef CONFIG_PREEMPT
+	cli
+#endif
 	call SYMBOL_NAME(math_state_restore)
 	jmp ret_from_exception
 device_not_available_emulate:
 	pushl $0		# temporary storage for ORIG_EIP
 	call  SYMBOL_NAME(math_emulate)
 	addl $4,%esp
+#ifdef CONFIG_PREEMPT
+	cli
+#endif
 	jmp ret_from_exception
 
 ENTRY(debug)
@@ -634,6 +683,7 @@
 	.long SYMBOL_NAME(sys_ni_syscall)	/* 235 reserved for removexattr */
 	.long SYMBOL_NAME(sys_ni_syscall)	/* reserved for lremovexattr */
 	.long SYMBOL_NAME(sys_ni_syscall)	/* reserved for fremovexattr */
+ 	.long SYMBOL_NAME(sys_tkill)
 
 	.rept NR_syscalls-(.-sys_call_table)/4
 		.long SYMBOL_NAME(sys_ni_syscall)
diff -Nru linux/arch/i386/kernel/head.S linux-2.4.19-pre5-mjc/arch/i386/kernel/head.S
--- linux/arch/i386/kernel/head.S	Mon Feb 25 14:37:53 2002
+++ linux-2.4.19-pre5-mjc/arch/i386/kernel/head.S	Sat Apr  6 08:29:59 2002
@@ -178,7 +178,7 @@
  * we don't need to preserve eflags.
  */
 
-	movl $3,X86		# at least 386
+	movb $3,X86		# at least 386
 	pushfl			# push EFLAGS
 	popl %eax		# get EFLAGS
 	movl %eax,%ecx		# save original EFLAGS
@@ -191,7 +191,7 @@
 	andl $0x40000,%eax	# check if AC bit changed
 	je is386
 
-	movl $4,X86		# at least 486
+	movb $4,X86		# at least 486
 	movl %ecx,%eax
 	xorl $0x200000,%eax	# check ID flag
 	pushl %eax
@@ -445,4 +445,15 @@
 	.quad 0x00409a0000000000	/* 0x48 APM CS    code */
 	.quad 0x00009a0000000000	/* 0x50 APM CS 16 code (16 bit) */
 	.quad 0x0040920000000000	/* 0x58 APM DS    data */
+ 	/* Segments used for calling PnP BIOS */
+	.quad 0x00c09a0000000000	/* 0x60 32-bit code */
+	.quad 0x00809a0000000000	/* 0x68 16-bit code */
+	.quad 0x0080920000000000	/* 0x70 16-bit data */
+	.quad 0x0080920000000000	/* 0x78 16-bit data */
+	.quad 0x0080920000000000	/* 0x80 16-bit data */
+	.quad 0x0000000000000000	/* 0x88 not used */
+	.quad 0x0000000000000000	/* 0x90 not used */
+	.quad 0x0000000000000000	/* 0x98 not used */
+	/* Per CPU segments */
 	.fill NR_CPUS*4,8,0		/* space for TSS's and LDT's */
+
diff -Nru linux/arch/i386/kernel/i386_ksyms.c linux-2.4.19-pre5-mjc/arch/i386/kernel/i386_ksyms.c
--- linux/arch/i386/kernel/i386_ksyms.c	Mon Feb 25 14:37:53 2002
+++ linux-2.4.19-pre5-mjc/arch/i386/kernel/i386_ksyms.c	Sat Apr  6 08:25:59 2002
@@ -73,6 +73,7 @@
 EXPORT_SYMBOL(get_cmos_time);
 EXPORT_SYMBOL(apm_info);
 EXPORT_SYMBOL(gdt);
+EXPORT_SYMBOL(empty_zero_page);
 
 #ifdef CONFIG_DEBUG_IOVIRT
 EXPORT_SYMBOL(__io_virt_debug);
@@ -145,6 +146,10 @@
 EXPORT_SYMBOL(flush_tlb_page);
 #endif
 
+#ifdef CONFIG_X86_IO_APIC
+EXPORT_SYMBOL(IO_APIC_get_PCI_irq_vector);
+#endif
+
 #ifdef CONFIG_MCA
 EXPORT_SYMBOL(machine_id);
 #endif
@@ -166,10 +171,6 @@
 
 #ifdef CONFIG_HAVE_DEC_LOCK
 EXPORT_SYMBOL(atomic_dec_and_lock);
-#endif
-
-#ifdef CONFIG_DEBUG_BUGVERBOSE
-EXPORT_SYMBOL(do_BUG);
 #endif
 
 extern int is_sony_vaio_laptop;
diff -Nru linux/arch/i386/kernel/i387.c linux-2.4.19-pre5-mjc/arch/i386/kernel/i387.c
--- linux/arch/i386/kernel/i387.c	Fri Feb 23 13:09:08 2001
+++ linux-2.4.19-pre5-mjc/arch/i386/kernel/i387.c	Sat Apr  6 08:35:14 2002
@@ -10,6 +10,7 @@
 
 #include <linux/config.h>
 #include <linux/sched.h>
+#include <linux/spinlock.h>
 #include <asm/processor.h>
 #include <asm/i387.h>
 #include <asm/math_emu.h>
@@ -65,6 +66,8 @@
 {
 	struct task_struct *tsk = current;
 
+	preempt_disable();
+	
 	if (tsk->flags & PF_USEDFPU) {
 		__save_init_fpu(tsk);
 		return;
diff -Nru linux/arch/i386/kernel/i8259.c linux-2.4.19-pre5-mjc/arch/i386/kernel/i8259.c
--- linux/arch/i386/kernel/i8259.c	Tue Sep 18 02:03:09 2001
+++ linux-2.4.19-pre5-mjc/arch/i386/kernel/i8259.c	Sat Apr  6 08:29:59 2002
@@ -79,6 +79,7 @@
  * through the ICC by us (IPIs)
  */
 #ifdef CONFIG_SMP
+BUILD_SMP_INTERRUPT(task_migration_interrupt,TASK_MIGRATION_VECTOR)
 BUILD_SMP_INTERRUPT(reschedule_interrupt,RESCHEDULE_VECTOR)
 BUILD_SMP_INTERRUPT(invalidate_interrupt,INVALIDATE_TLB_VECTOR)
 BUILD_SMP_INTERRUPT(call_function_interrupt,CALL_FUNCTION_VECTOR)
@@ -472,6 +473,9 @@
 	 * IPI, driven by wakeup.
 	 */
 	set_intr_gate(RESCHEDULE_VECTOR, reschedule_interrupt);
+
+	/* IPI for task migration */
+	set_intr_gate(TASK_MIGRATION_VECTOR, task_migration_interrupt);
 
 	/* IPI for invalidation */
 	set_intr_gate(INVALIDATE_TLB_VECTOR, invalidate_interrupt);
diff -Nru linux/arch/i386/kernel/io_apic.c linux-2.4.19-pre5-mjc/arch/i386/kernel/io_apic.c
--- linux/arch/i386/kernel/io_apic.c	Tue Nov 13 20:28:41 2001
+++ linux-2.4.19-pre5-mjc/arch/i386/kernel/io_apic.c	Sat Apr  6 08:25:59 2002
@@ -67,7 +67,7 @@
  * shared ISA-space IRQs, so we have to support them. We are super
  * fast in the common case, and fast for shared ISA-space IRQs.
  */
-static void add_pin_to_irq(unsigned int irq, int apic, int pin)
+static void __init add_pin_to_irq(unsigned int irq, int apic, int pin)
 {
 	static int first_free_entry = NR_IRQS;
 	struct irq_pin_list *entry = irq_2_pin + irq;
@@ -85,6 +85,26 @@
 	entry->pin = pin;
 }
 
+/*
+ * Reroute an IRQ to a different pin.
+ */
+static void __init replace_pin_at_irq(unsigned int irq,
+				      int oldapic, int oldpin,
+				      int newapic, int newpin)
+{
+	struct irq_pin_list *entry = irq_2_pin + irq;
+
+	while (1) {
+		if (entry->apic == oldapic && entry->pin == oldpin) {
+			entry->apic = newapic;
+			entry->pin = newpin;
+		}
+		if (!entry->next)
+			break;
+		entry = irq_2_pin + entry->next;
+	}
+}
+
 #define __DO_ACTION(R, ACTION, FINAL)					\
 									\
 {									\
@@ -1533,6 +1553,10 @@
 		setup_ExtINT_IRQ0_pin(pin2, vector);
 		if (timer_irq_works()) {
 			printk("works.\n");
+			if (pin1 != -1)
+				replace_pin_at_irq(0, 0, pin1, 0, pin2);
+			else
+				add_pin_to_irq(0, 0, pin2);
 			if (nmi_watchdog == NMI_IO_APIC) {
 				setup_nmi();
 				check_nmi_watchdog();
diff -Nru linux/arch/i386/kernel/microcode.c linux-2.4.19-pre5-mjc/arch/i386/kernel/microcode.c
--- linux/arch/i386/kernel/microcode.c	Tue Oct 30 18:13:17 2001
+++ linux-2.4.19-pre5-mjc/arch/i386/kernel/microcode.c	Sat Apr  6 08:25:59 2002
@@ -51,6 +51,12 @@
  *		Bugfix for HT (Hyper-Threading) enabled processors
  *		whereby processor resources are shared by all logical processors
  *		in a single CPU package.
+ *	1.10	28 Feb 2002 Asit K Mallick <asit.k.mallick@intel.com> and
+ *		Tigran Aivazian <tigran@veritas.com>,
+ *		Serialize updates as required on HT processors due to speculative
+ *		nature of implementation.
+ *	1.11	22 Mar 2001 Tigran Aivazian <tigran@veritas.com>
+ *		Fix the panic when writing zero-length microcode chunk.
  */
 
 #include <linux/init.h>
@@ -60,12 +66,16 @@
 #include <linux/vmalloc.h>
 #include <linux/miscdevice.h>
 #include <linux/devfs_fs_kernel.h>
+#include <linux/spinlock.h>
 
 #include <asm/msr.h>
 #include <asm/uaccess.h>
 #include <asm/processor.h>
 
-#define MICROCODE_VERSION 	"1.09"
+
+static spinlock_t microcode_update_lock = SPIN_LOCK_UNLOCKED;
+
+#define MICROCODE_VERSION 	"1.11"
 
 MODULE_DESCRIPTION("Intel CPU (IA-32) microcode update driver");
 MODULE_AUTHOR("Tigran Aivazian <tigran@veritas.com>");
@@ -195,7 +205,8 @@
 	struct cpuinfo_x86 *c = cpu_data + cpu_num;
 	struct update_req *req = update_req + cpu_num;
 	unsigned int pf = 0, val[2], rev, sig;
-	int i,found=0;
+	unsigned long flags;
+	int i;
 
 	req->err = 1; /* assume update will fail on this cpu */
 
@@ -216,8 +227,9 @@
 	for (i=0; i<microcode_num; i++)
 		if (microcode[i].sig == sig && microcode[i].pf == pf &&
 		    microcode[i].ldrver == 1 && microcode[i].hdrver == 1) {
-
-			found=1;
+			int sum = 0;
+			struct microcode *m = &microcode[i];
+			unsigned int *sump = (unsigned int *)(m+1);
 
 			printf("Microcode\n");
 			printf("   Header Revision %d\n",microcode[i].hdrver);
@@ -234,54 +246,69 @@
 			printf("   Loader Revision %x\n",microcode[i].ldrver);
 			printf("   Processor Flags %x\n\n",microcode[i].pf);
 
+			req->slot = i;
+
+			/* serialize access to update decision */
+			spin_lock_irqsave(&microcode_update_lock, flags);          
+
 			/* trick, to work even if there was no prior update by the BIOS */
 			wrmsr(MSR_IA32_UCODE_REV, 0, 0);
 			__asm__ __volatile__ ("cpuid" : : : "ax", "bx", "cx", "dx");
 
 			/* get current (on-cpu) revision into rev (ignore val[0]) */
 			rdmsr(MSR_IA32_UCODE_REV, val[0], rev);
+			
 			if (microcode[i].rev < rev) {
+				spin_unlock_irqrestore(&microcode_update_lock, flags);
 				printk(KERN_ERR 
-					"microcode: CPU%d not 'upgrading' to earlier revision"
+				       "microcode: CPU%d not 'upgrading' to earlier revision"
+				       " %d (current=%d)\n", cpu_num, microcode[i].rev, rev);
+				return;
+			} else if (microcode[i].rev == rev) {
+				/* notify the caller of success on this cpu */
+				req->err = 0;
+				spin_unlock_irqrestore(&microcode_update_lock, flags);
+				printk(KERN_ERR 
+					"microcode: CPU%d already at revision"
 					" %d (current=%d)\n", cpu_num, microcode[i].rev, rev);
-			} else {
-				int sum = 0;
-				struct microcode *m = &microcode[i];
-				unsigned int *sump = (unsigned int *)(m+1);
-
-				while (--sump >= (unsigned int *)m)
-					sum += *sump;
-				if (sum != 0) {
-					printk(KERN_ERR "microcode: CPU%d aborting, "
-							"bad checksum\n", cpu_num);
-					break;
-				}
-
-				/* write microcode via MSR 0x79 */
-				wrmsr(MSR_IA32_UCODE_WRITE, (unsigned int)(m->bits), 0);
+				return;
+			}
 
-				/* serialize */
-				__asm__ __volatile__ ("cpuid" : : : "ax", "bx", "cx", "dx");
+			/* Verify the checksum */
+			while (--sump >= (unsigned int *)m)
+				sum += *sump;
+			if (sum != 0) {
+				req->err = 1;
+				spin_unlock_irqrestore(&microcode_update_lock, flags);
+				printk(KERN_ERR "microcode: CPU%d aborting, "
+				       "bad checksum\n", cpu_num);
+				return;
+			}
+			
+			/* write microcode via MSR 0x79 */
+			wrmsr(MSR_IA32_UCODE_WRITE, (unsigned int)(m->bits), 0);
 
-				/* get the current revision from MSR 0x8B */
-				rdmsr(MSR_IA32_UCODE_REV, val[0], val[1]);
+			/* serialize */
+			__asm__ __volatile__ ("cpuid" : : : "ax", "bx", "cx", "dx");
 
-				/* notify the caller of success on this cpu */
-				req->err = 0;
-				req->slot = i;
+			/* get the current revision from MSR 0x8B */
+			rdmsr(MSR_IA32_UCODE_REV, val[0], val[1]);
 
-				printk(KERN_INFO "microcode: CPU%d updated from revision "
-						"%d to %d, date=%08x\n", 
-						cpu_num, rev, val[1], m->date);
-			}
-			break;
+			/* notify the caller of success on this cpu */
+			req->err = 0;
+			spin_unlock_irqrestore(&microcode_update_lock, flags);
+			printk(KERN_INFO "microcode: CPU%d updated from revision "
+			       "%d to %d, date=%08x\n", 
+			       cpu_num, rev, val[1], microcode[i].date);
+			return;
 		}
-
-	if(!found)
-		printk(KERN_ERR "microcode: CPU%d no microcode found! (sig=%x, pflags=%d)\n",
-				cpu_num, sig, pf);
+	
+	printk(KERN_ERR
+	       "microcode: CPU%d no microcode found! (sig=%x, pflags=%d)\n", 
+	       cpu_num, sig, pf);
 }
 
+
 static ssize_t microcode_read(struct file *file, char *buf, size_t len, loff_t *ppos)
 {
 	ssize_t ret = 0;
@@ -305,9 +332,13 @@
 {
 	ssize_t ret;
 
-	if (len % sizeof(struct microcode) != 0) {
+	if (!len || len % sizeof(struct microcode) != 0) {
 		printk(KERN_ERR "microcode: can only write in N*%d bytes units\n", 
 			sizeof(struct microcode));
+		return -EINVAL;
+	}
+	if ((len >> PAGE_SHIFT) > num_physpages) {
+		printk(KERN_ERR "microcode: too much data (max %d pages)\n", num_physpages);
 		return -EINVAL;
 	}
 	down_write(&microcode_rwsem);
diff -Nru linux/arch/i386/kernel/mpparse.c linux-2.4.19-pre5-mjc/arch/i386/kernel/mpparse.c
--- linux/arch/i386/kernel/mpparse.c	Fri Nov  9 17:58:18 2001
+++ linux-2.4.19-pre5-mjc/arch/i386/kernel/mpparse.c	Sat Apr  6 08:29:59 2002
@@ -35,16 +35,20 @@
  * MP-table.
  */
 int apic_version [MAX_APICS];
-int mp_bus_id_to_type [MAX_MP_BUSSES];
-int mp_bus_id_to_node [MAX_MP_BUSSES];
-int mp_bus_id_to_pci_bus [MAX_MP_BUSSES] = { [0 ... MAX_MP_BUSSES-1] = -1 };
+int quad_local_to_mp_bus_id [NR_CPUS/4][4];
 int mp_current_pci_id;
+int *mp_bus_id_to_type;
+int *mp_bus_id_to_node;
+int *mp_bus_id_to_local;
+int *mp_bus_id_to_pci_bus;
+int max_mp_busses;
+int max_irq_sources;
 
 /* I/O APIC entries */
 struct mpc_config_ioapic mp_ioapics[MAX_IO_APICS];
 
 /* # of MP IRQ source entries */
-struct mpc_config_intsrc mp_irqs[MAX_IRQ_SOURCES];
+struct mpc_config_intsrc *mp_irqs;
 
 /* MP IRQ source entries */
 int mp_irq_entries;
@@ -219,6 +223,7 @@
 	if (m->mpc_apicid > MAX_APICS) {
 		printk("Processor #%d INVALID. (Max ID: %d).\n",
 			m->mpc_apicid, MAX_APICS);
+		--num_processors;
 		return;
 	}
 	ver = m->mpc_apicver;
@@ -241,13 +246,17 @@
 static void __init MP_bus_info (struct mpc_config_bus *m)
 {
 	char str[7];
+	int quad;
 
 	memcpy(str, m->mpc_bustype, 6);
 	str[6] = 0;
 	
 	if (clustered_apic_mode) {
-		mp_bus_id_to_node[m->mpc_busid] = translation_table[mpc_record]->trans_quad;
-		printk("Bus #%d is %s (node %d)\n", m->mpc_busid, str, mp_bus_id_to_node[m->mpc_busid]);
+		quad = translation_table[mpc_record]->trans_quad;
+		mp_bus_id_to_node[m->mpc_busid] = quad;
+		mp_bus_id_to_local[m->mpc_busid] = translation_table[mpc_record]->trans_local;
+		quad_local_to_mp_bus_id[quad][translation_table[mpc_record]->trans_local] = m->mpc_busid;
+		printk("Bus #%d is %s (node %d)\n", m->mpc_busid, str, quad);
 	} else {
 		Dprintk("Bus #%d is %s\n", m->mpc_busid, str);
 	}
@@ -296,7 +305,7 @@
 			m->mpc_irqtype, m->mpc_irqflag & 3,
 			(m->mpc_irqflag >> 2) & 3, m->mpc_srcbus,
 			m->mpc_srcbusirq, m->mpc_dstapic, m->mpc_dstirq);
-	if (++mp_irq_entries == MAX_IRQ_SOURCES)
+	if (++mp_irq_entries == max_irq_sources)
 		panic("Max # of irq sources exceeded!!\n");
 }
 
@@ -324,13 +333,14 @@
 
 static void __init MP_translation_info (struct mpc_config_translation *m)
 {
-	printk("Translation: record %d, type %d, quad %d, global %d, local %d\n", mpc_record, m->trans_type, 
-		m->trans_quad, m->trans_global, m->trans_local);
+	printk("Translation: record %d, type %d, quad %d, global %d, local %d\n", mpc_record, m->trans_type, m->trans_quad, m->trans_global, m->trans_local);
 
 	if (mpc_record >= MAX_MPC_ENTRY) 
 		printk("MAX_MPC_ENTRY exceeded!\n");
 	else
 		translation_table[mpc_record] = m; /* stash this for later */
+	if (m->trans_quad+1 > numnodes)
+		numnodes = m->trans_quad+1;
 }
 
 /*
@@ -388,6 +398,9 @@
 	char str[16];
 	int count=sizeof(*mpc);
 	unsigned char *mpt=((unsigned char *)mpc)+count;
+	int num_bus = 0;
+	int num_irq = 0;
+	unsigned char *bus_data;
 
 	if (memcmp(mpc->mpc_signature,MPC_SIGNATURE,4)) {
 		panic("SMP mptable: bad signature [%c%c%c%c]!\n",
@@ -433,9 +446,70 @@
 		mpc_record = 0;
 	}
 
+	/* Pre-scan to determine the number of bus and 
+	 * interrupts records we have
+	 */
+	while (count < mpc->mpc_length) {
+		switch (*mpt) {
+			case MP_PROCESSOR:
+				mpt += sizeof(struct mpc_config_processor);
+				count += sizeof(struct mpc_config_processor);
+				break;
+			case MP_BUS:
+				++num_bus;
+				mpt += sizeof(struct mpc_config_bus);
+				count += sizeof(struct mpc_config_bus);
+				break;
+			case MP_INTSRC:
+				++num_irq;
+				mpt += sizeof(struct mpc_config_intsrc);
+				count += sizeof(struct mpc_config_intsrc);
+				break;
+			case MP_IOAPIC:
+				mpt += sizeof(struct mpc_config_ioapic);
+				count += sizeof(struct mpc_config_ioapic);
+				break;
+			case MP_LINTSRC:
+				mpt += sizeof(struct mpc_config_lintsrc);
+				count += sizeof(struct mpc_config_lintsrc);
+				break;
+			default:
+				count = mpc->mpc_length;
+				break;
+		}
+	}
+	/* 
+	 * Paranoia: Allocate one extra of both the number of busses and number
+	 * of irqs, and make sure that we have at least 4 interrupts per PCI
+	 * slot.  But some machines do not report very many busses, so we need
+	 * to fall back on the older defaults.
+	 */
+	++num_bus;
+	max_mp_busses = max(num_bus, MAX_MP_BUSSES);
+	if (num_irq < (4 * max_mp_busses))
+		num_irq = 4 * num_bus;	/* 4 intr/PCI slot */
+	++num_irq;
+	max_irq_sources = max(num_irq, MAX_IRQ_SOURCES);
+	
+	count = (max_mp_busses * sizeof(int)) * 4;
+	count += (max_irq_sources * sizeof(struct mpc_config_intsrc));
+	bus_data = alloc_bootmem(count);
+	if (!bus_data) {
+		printk(KERN_ERR "SMP mptable: out of memory!\n");
+		return 0;
+	}
+	mp_bus_id_to_type = (int *)&bus_data[0];
+	mp_bus_id_to_node = (int *)&bus_data[(max_mp_busses * sizeof(int))];
+	mp_bus_id_to_local = (int *)&bus_data[(max_mp_busses * sizeof(int)) * 2];
+	mp_bus_id_to_pci_bus = (int *)&bus_data[(max_mp_busses * sizeof(int)) * 3];
+	mp_irqs = (struct mpc_config_intsrc *)&bus_data[(max_mp_busses * sizeof(int)) * 4];
+	memset(mp_bus_id_to_pci_bus, -1, max_mp_busses);
+
 	/*
 	 *	Now process the configuration blocks.
 	 */
+	count = sizeof(*mpc);
+	mpt = ((unsigned char *)mpc)+count;
 	while (count < mpc->mpc_length) {
 		switch(*mpt) {
 			case MP_PROCESSOR:
@@ -494,10 +568,6 @@
 			}
 		}
 		++mpc_record;
-	}
-	if (clustered_apic_mode && nr_ioapics > 2) {
-		/* don't initialise IO apics on secondary quads */
-		nr_ioapics = 2;
 	}
 	if (!num_processors)
 		printk(KERN_ERR "SMP mptable: no processors registered!\n");
diff -Nru linux/arch/i386/kernel/mtrr.c linux-2.4.19-pre5-mjc/arch/i386/kernel/mtrr.c
--- linux/arch/i386/kernel/mtrr.c	Fri Nov  9 16:58:02 2001
+++ linux-2.4.19-pre5-mjc/arch/i386/kernel/mtrr.c	Sat Apr  6 08:25:59 2002
@@ -378,10 +378,8 @@
 static int arr3_protected;
 
 /*  Put the processor into a state where MTRRs can be safely set  */
-static void set_mtrr_prepare (struct set_mtrr_context *ctxt)
+static void set_mtrr_prepare_save (struct set_mtrr_context *ctxt)
 {
-    unsigned long tmp;
-
     /*  Disable interrupts locally  */
     __save_flags (ctxt->flags); __cli ();
 
@@ -404,16 +402,27 @@
     }
 
     if ( mtrr_if == MTRR_IF_INTEL ) {
-	/*  Disable MTRRs, and set the default type to uncached  */
+	/*  Save MTRR state */
 	rdmsr (MTRRdefType_MSR, ctxt->deftype_lo, ctxt->deftype_hi);
+    } else {
+	/* Cyrix ARRs - everything else were excluded at the top */
+	ctxt->ccr3 = getCx86 (CX86_CCR3);
+    }
+}   /*  End Function set_mtrr_prepare_save  */
+
+static void set_mtrr_disable (struct set_mtrr_context *ctxt)
+{
+    if ( mtrr_if != MTRR_IF_INTEL && mtrr_if != MTRR_IF_CYRIX_ARR )
+	 return;
+
+    if ( mtrr_if == MTRR_IF_INTEL ) {
+	/*  Disable MTRRs, and set the default type to uncached  */
 	wrmsr (MTRRdefType_MSR, ctxt->deftype_lo & 0xf300UL, ctxt->deftype_hi);
     } else {
 	/* Cyrix ARRs - everything else were excluded at the top */
-	tmp = getCx86 (CX86_CCR3);
-	setCx86 (CX86_CCR3, (tmp & 0x0f) | 0x10);
-	ctxt->ccr3 = tmp;
+	setCx86 (CX86_CCR3, (ctxt->ccr3 & 0x0f) | 0x10);
     }
-}   /*  End Function set_mtrr_prepare  */
+}   /*  End Function set_mtrr_disable  */
 
 /*  Restore the processor after a set_mtrr_prepare  */
 static void set_mtrr_done (struct set_mtrr_context *ctxt)
@@ -674,7 +683,10 @@
 {
     struct set_mtrr_context ctxt;
 
-    if (do_safe) set_mtrr_prepare (&ctxt);
+    if (do_safe) {
+	set_mtrr_prepare_save (&ctxt);
+	set_mtrr_disable (&ctxt);
+	}
     if (size == 0)
     {
 	/* The invalid bit is kept in the mask, so we simply clear the
@@ -726,7 +738,10 @@
 	}
     }
 
-    if (do_safe) set_mtrr_prepare (&ctxt);
+    if (do_safe) {
+	set_mtrr_prepare_save (&ctxt);
+	set_mtrr_disable (&ctxt);
+    }
     base <<= PAGE_SHIFT;
     setCx86(arr,    ((unsigned char *) &base)[3]);
     setCx86(arr+1,  ((unsigned char *) &base)[2]);
@@ -750,7 +765,10 @@
     u32 regs[2];
     struct set_mtrr_context ctxt;
 
-    if (do_safe) set_mtrr_prepare (&ctxt);
+    if (do_safe) {
+	set_mtrr_prepare_save (&ctxt);
+	set_mtrr_disable (&ctxt);
+    }
     /*
      *	Low is MTRR0 , High MTRR 1
      */
@@ -788,7 +806,10 @@
     struct set_mtrr_context ctxt;
     unsigned long low, high;
 
-    if (do_safe) set_mtrr_prepare( &ctxt );
+    if (do_safe) {
+	set_mtrr_prepare_save (&ctxt);
+	set_mtrr_disable (&ctxt);
+    }
     if (size == 0)
     {
         /*  Disable  */
@@ -985,6 +1006,7 @@
 
 
 static atomic_t undone_count;
+static volatile int wait_barrier_mtrr_disable = FALSE;
 static volatile int wait_barrier_execute = FALSE;
 static volatile int wait_barrier_cache_enable = FALSE;
 
@@ -1003,18 +1025,21 @@
 {
     struct set_mtrr_data *data = info;
     struct set_mtrr_context ctxt;
-
-    set_mtrr_prepare (&ctxt);
+    set_mtrr_prepare_save (&ctxt);
     /*  Notify master that I've flushed and disabled my cache  */
     atomic_dec (&undone_count);
-    while (wait_barrier_execute) barrier ();
+    while (wait_barrier_mtrr_disable) { rep_nop(); barrier(); }
+    set_mtrr_disable (&ctxt);
+    /*  Notify master that I've flushed and disabled my cache  */
+    atomic_dec (&undone_count);
+    while (wait_barrier_execute) { rep_nop(); barrier(); }
     /*  The master has cleared me to execute  */
     (*set_mtrr_up) (data->smp_reg, data->smp_base, data->smp_size,
 		    data->smp_type, FALSE);
     /*  Notify master CPU that I've executed the function  */
     atomic_dec (&undone_count);
     /*  Wait for master to clear me to enable cache and return  */
-    while (wait_barrier_cache_enable) barrier ();
+    while (wait_barrier_cache_enable) { rep_nop(); barrier(); }
     set_mtrr_done (&ctxt);
 }   /*  End Function ipi_handler  */
 
@@ -1028,6 +1053,7 @@
     data.smp_base = base;
     data.smp_size = size;
     data.smp_type = type;
+    wait_barrier_mtrr_disable = TRUE;
     wait_barrier_execute = TRUE;
     wait_barrier_cache_enable = TRUE;
     atomic_set (&undone_count, smp_num_cpus - 1);
@@ -1035,15 +1061,22 @@
     if (smp_call_function (ipi_handler, &data, 1, 0) != 0)
 	panic ("mtrr: timed out waiting for other CPUs\n");
     /* Flush and disable the local CPU's cache */
-    set_mtrr_prepare (&ctxt);
+    set_mtrr_prepare_save (&ctxt);
+    /*  Wait for all other CPUs to flush and disable their caches  */
+    while (atomic_read (&undone_count) > 0) { rep_nop(); barrier(); }
+    /* Set up for completion wait and then release other CPUs to change MTRRs*/
+    atomic_set (&undone_count, smp_num_cpus - 1);
+    wait_barrier_mtrr_disable = FALSE;
+    set_mtrr_disable (&ctxt);
+
     /*  Wait for all other CPUs to flush and disable their caches  */
-    while (atomic_read (&undone_count) > 0) barrier ();
+    while (atomic_read (&undone_count) > 0) { rep_nop(); barrier(); }
     /* Set up for completion wait and then release other CPUs to change MTRRs*/
     atomic_set (&undone_count, smp_num_cpus - 1);
     wait_barrier_execute = FALSE;
     (*set_mtrr_up) (reg, base, size, type, FALSE);
     /*  Now wait for other CPUs to complete the function  */
-    while (atomic_read (&undone_count) > 0) barrier ();
+    while (atomic_read (&undone_count) > 0) { rep_nop(); barrier(); }
     /*  Now all CPUs should have finished the function. Release the barrier to
 	allow them to re-enable their caches and return from their interrupt,
 	then enable the local cache and return  */
@@ -1889,7 +1922,9 @@
     struct set_mtrr_context ctxt;
     int i;
 
-    set_mtrr_prepare (&ctxt); /* flush cache and enable MAPEN */
+    /* flush cache and enable MAPEN */
+    set_mtrr_prepare_save (&ctxt);
+    set_mtrr_disable (&ctxt);
 
      /* the CCRs are not contiguous */
     for(i=0; i<4; i++) setCx86(CX86_CCR0 + i, ccr_state[i]);
@@ -1926,7 +1961,9 @@
     int i;
 #endif
 
-    set_mtrr_prepare (&ctxt); /* flush cache and enable MAPEN */
+    /* flush cache and enable MAPEN */
+    set_mtrr_prepare_save (&ctxt);
+    set_mtrr_disable (&ctxt);
 
     /* Save all CCRs locally */
     ccr[0] = getCx86 (CX86_CCR0);
@@ -2075,7 +2112,8 @@
 {
     struct set_mtrr_context ctxt;
 
-    set_mtrr_prepare (&ctxt);
+    set_mtrr_prepare_save (&ctxt);
+    set_mtrr_disable (&ctxt);
 
     if(boot_cpu_data.x86_model==4)
     	centaur_mcr0_init();
@@ -2192,7 +2230,8 @@
     /*  Note that this is not ideal, since the cache is only flushed/disabled
 	for this CPU while the MTRRs are changed, but changing this requires
 	more invasive changes to the way the kernel boots  */
-    set_mtrr_prepare (&ctxt);
+    set_mtrr_prepare_save (&ctxt);
+    set_mtrr_disable (&ctxt);
     mask = set_mtrr_state (&smp_mtrr_state, &ctxt);
     set_mtrr_done (&ctxt);
     /*  Use the atomic bitops to update the global mask  */
diff -Nru linux/arch/i386/kernel/nmi.c linux-2.4.19-pre5-mjc/arch/i386/kernel/nmi.c
--- linux/arch/i386/kernel/nmi.c	Thu Sep 20 23:55:24 2001
+++ linux-2.4.19-pre5-mjc/arch/i386/kernel/nmi.c	Sat Apr  6 08:25:59 2002
@@ -8,6 +8,7 @@
  *  Fixes:
  *  Mikael Pettersson	: AMD K7 support for local APIC NMI watchdog.
  *  Mikael Pettersson	: Power Management for local APIC NMI watchdog.
+ *  Mikael Pettersson	: Pentium 4 support for local APIC NMI watchdog.
  */
 
 #include <linux/config.h>
@@ -43,6 +44,32 @@
 #define P6_EVENT_CPU_CLOCKS_NOT_HALTED	0x79
 #define P6_NMI_EVENT		P6_EVENT_CPU_CLOCKS_NOT_HALTED
 
+#define MSR_P4_MISC_ENABLE	0x1A0
+#define MSR_P4_MISC_ENABLE_PERF_AVAIL	(1<<7)
+#define MSR_P4_MISC_ENABLE_PEBS_UNAVAIL	(1<<12)
+#define MSR_P4_PERFCTR0		0x300
+#define MSR_P4_CCCR0		0x360
+#define P4_ESCR_EVENT_SELECT(N)	((N)<<25)
+#define P4_ESCR_OS		(1<<3)
+#define P4_ESCR_USR		(1<<2)
+#define P4_CCCR_OVF_PMI		(1<<26)
+#define P4_CCCR_THRESHOLD(N)	((N)<<20)
+#define P4_CCCR_COMPLEMENT	(1<<19)
+#define P4_CCCR_COMPARE		(1<<18)
+#define P4_CCCR_REQUIRED	(3<<16)
+#define P4_CCCR_ESCR_SELECT(N)	((N)<<13)
+#define P4_CCCR_ENABLE		(1<<12)
+/* Set up IQ_COUNTER0 to behave like a clock, by having IQ_CCCR0 filter
+   CRU_ESCR0 (with any non-null event selector) through a complemented
+   max threshold. [IA32-Vol3, Section 14.9.9] */
+#define MSR_P4_IQ_COUNTER0	0x30C
+#define MSR_P4_IQ_CCCR0		0x36C
+#define MSR_P4_CRU_ESCR0	0x3B8
+#define P4_NMI_CRU_ESCR0	(P4_ESCR_EVENT_SELECT(0x3F)|P4_ESCR_OS|P4_ESCR_USR)
+#define P4_NMI_IQ_CCCR0	\
+	(P4_CCCR_OVF_PMI|P4_CCCR_THRESHOLD(15)|P4_CCCR_COMPLEMENT|	\
+	 P4_CCCR_COMPARE|P4_CCCR_REQUIRED|P4_CCCR_ESCR_SELECT(4)|P4_CCCR_ENABLE)
+
 int __init check_nmi_watchdog (void)
 {
 	irq_cpustat_t tmp[NR_CPUS];
@@ -84,11 +111,11 @@
 	/*
 	 * If any other x86 CPU has a local APIC, then
 	 * please test the NMI stuff there and send me the
-	 * missing bits. Right now Intel P6 and AMD K7 only.
+	 * missing bits. Right now Intel P6/P4 and AMD K7 only.
 	 */
 	if ((nmi == NMI_LOCAL_APIC) &&
 			(boot_cpu_data.x86_vendor == X86_VENDOR_INTEL) &&
-			(boot_cpu_data.x86 == 6))
+			(boot_cpu_data.x86 == 6 || boot_cpu_data.x86 == 15))
 		nmi_watchdog = nmi;
 	if ((nmi == NMI_LOCAL_APIC) &&
 			(boot_cpu_data.x86_vendor == X86_VENDOR_AMD) &&
@@ -118,7 +145,15 @@
 		wrmsr(MSR_K7_EVNTSEL0, 0, 0);
 		break;
 	case X86_VENDOR_INTEL:
-		wrmsr(MSR_IA32_EVNTSEL0, 0, 0);
+		switch (boot_cpu_data.x86) {
+		case 6:
+			wrmsr(MSR_P6_EVNTSEL0, 0, 0);
+			break;
+		case 15:
+			wrmsr(MSR_P4_IQ_CCCR0, 0, 0);
+			wrmsr(MSR_P4_CRU_ESCR0, 0, 0);
+			break;
+		}
 		break;
 	}
 }
@@ -157,17 +192,22 @@
  * Original code written by Keith Owens.
  */
 
+static void __pminit clear_msr_range(unsigned int base, unsigned int n)
+{
+	unsigned int i;
+
+	for(i = 0; i < n; ++i)
+		wrmsr(base+i, 0, 0);
+}
+
 static void __pminit setup_k7_watchdog(void)
 {
-	int i;
 	unsigned int evntsel;
 
 	nmi_perfctr_msr = MSR_K7_PERFCTR0;
 
-	for(i = 0; i < 4; ++i) {
-		wrmsr(MSR_K7_EVNTSEL0+i, 0, 0);
-		wrmsr(MSR_K7_PERFCTR0+i, 0, 0);
-	}
+	clear_msr_range(MSR_K7_EVNTSEL0, 4);
+	clear_msr_range(MSR_K7_PERFCTR0, 4);
 
 	evntsel = K7_EVNTSEL_INT
 		| K7_EVNTSEL_OS
@@ -184,27 +224,54 @@
 
 static void __pminit setup_p6_watchdog(void)
 {
-	int i;
 	unsigned int evntsel;
 
-	nmi_perfctr_msr = MSR_IA32_PERFCTR0;
+	nmi_perfctr_msr = MSR_P6_PERFCTR0;
 
-	for(i = 0; i < 2; ++i) {
-		wrmsr(MSR_IA32_EVNTSEL0+i, 0, 0);
-		wrmsr(MSR_IA32_PERFCTR0+i, 0, 0);
-	}
+	clear_msr_range(MSR_P6_EVNTSEL0, 2);
+	clear_msr_range(MSR_P6_PERFCTR0, 2);
 
 	evntsel = P6_EVNTSEL_INT
 		| P6_EVNTSEL_OS
 		| P6_EVNTSEL_USR
 		| P6_NMI_EVENT;
 
-	wrmsr(MSR_IA32_EVNTSEL0, evntsel, 0);
-	Dprintk("setting IA32_PERFCTR0 to %08lx\n", -(cpu_khz/nmi_hz*1000));
-	wrmsr(MSR_IA32_PERFCTR0, -(cpu_khz/nmi_hz*1000), 0);
+	wrmsr(MSR_P6_EVNTSEL0, evntsel, 0);
+	Dprintk("setting P6_PERFCTR0 to %08lx\n", -(cpu_khz/nmi_hz*1000));
+	wrmsr(MSR_P6_PERFCTR0, -(cpu_khz/nmi_hz*1000), 0);
 	apic_write(APIC_LVTPC, APIC_DM_NMI);
 	evntsel |= P6_EVNTSEL0_ENABLE;
-	wrmsr(MSR_IA32_EVNTSEL0, evntsel, 0);
+	wrmsr(MSR_P6_EVNTSEL0, evntsel, 0);
+}
+
+static int __pminit setup_p4_watchdog(void)
+{
+	unsigned int misc_enable, dummy;
+
+	rdmsr(MSR_P4_MISC_ENABLE, misc_enable, dummy);
+	if (!(misc_enable & MSR_P4_MISC_ENABLE_PERF_AVAIL))
+		return 0;
+
+	nmi_perfctr_msr = MSR_P4_IQ_COUNTER0;
+
+	if (!(misc_enable & MSR_P4_MISC_ENABLE_PEBS_UNAVAIL))
+		clear_msr_range(0x3F1, 2);
+	/* MSR 0x3F0 seems to have a default value of 0xFC00, but current
+	   docs doesn't fully define it, so leave it alone for now. */
+	clear_msr_range(0x3A0, 31);
+	clear_msr_range(0x3C0, 6);
+	clear_msr_range(0x3C8, 6);
+	clear_msr_range(0x3E0, 2);
+	clear_msr_range(MSR_P4_CCCR0, 18);
+	clear_msr_range(MSR_P4_PERFCTR0, 18);
+
+	wrmsr(MSR_P4_CRU_ESCR0, P4_NMI_CRU_ESCR0, 0);
+	wrmsr(MSR_P4_IQ_CCCR0, P4_NMI_IQ_CCCR0 & ~P4_CCCR_ENABLE, 0);
+	Dprintk("setting P4_IQ_COUNTER0 to 0x%08lx\n", -(cpu_khz/nmi_hz*1000));
+	wrmsr(MSR_P4_IQ_COUNTER0, -(cpu_khz/nmi_hz*1000), -1);
+	apic_write(APIC_LVTPC, APIC_DM_NMI);
+	wrmsr(MSR_P4_IQ_CCCR0, P4_NMI_IQ_CCCR0, 0);
+	return 1;
 }
 
 void __pminit setup_apic_nmi_watchdog (void)
@@ -216,9 +283,17 @@
 		setup_k7_watchdog();
 		break;
 	case X86_VENDOR_INTEL:
-		if (boot_cpu_data.x86 != 6)
+		switch (boot_cpu_data.x86) {
+		case 6:
+			setup_p6_watchdog();
+			break;
+		case 15:
+			if (!setup_p4_watchdog())
+				return;
+			break;
+		default:
 			return;
-		setup_p6_watchdog();
+		}
 		break;
 	default:
 		return;
@@ -283,7 +358,7 @@
 			 * to get a message out.
 			 */
 			bust_spinlocks(1);
-			printk("NMI Watchdog detected LOCKUP on CPU%d, registers:\n", cpu);
+			printk("NMI Watchdog detected LOCKUP on CPU%d, eip %08lx, registers:\n", cpu, regs->eip);
 			show_registers(regs);
 			printk("console shuts up ...\n");
 			console_silent();
@@ -295,6 +370,18 @@
 		last_irq_sums[cpu] = sum;
 		alert_counter[cpu] = 0;
 	}
-	if (nmi_perfctr_msr)
+	if (nmi_perfctr_msr) {
+		if (nmi_perfctr_msr == MSR_P4_IQ_COUNTER0) {
+			/*
+			 * P4 quirks:
+			 * - An overflown perfctr will assert its interrupt
+			 *   until the OVF flag in its CCCR is cleared.
+			 * - LVTPC is masked on interrupt and must be
+			 *   unmasked by the LVTPC handler.
+			 */
+			wrmsr(MSR_P4_IQ_CCCR0, P4_NMI_IQ_CCCR0, 0);
+			apic_write(APIC_LVTPC, APIC_DM_NMI);
+		}
 		wrmsr(nmi_perfctr_msr, -(cpu_khz/nmi_hz*1000), -1);
+	}
 }
diff -Nru linux/arch/i386/kernel/pci-irq.c linux-2.4.19-pre5-mjc/arch/i386/kernel/pci-irq.c
--- linux/arch/i386/kernel/pci-irq.c	Mon Feb 25 14:37:53 2002
+++ linux-2.4.19-pre5-mjc/arch/i386/kernel/pci-irq.c	Sat Apr  6 08:29:59 2002
@@ -22,6 +22,8 @@
 #define PIRQ_SIGNATURE	(('$' << 0) + ('P' << 8) + ('I' << 16) + ('R' << 24))
 #define PIRQ_VERSION 0x0100
 
+int broken_hp_bios_irq9;
+
 static struct irq_routing_table *pirq_table;
 
 /*
@@ -206,6 +208,24 @@
 }
 
 /*
+ * ITE 8330G pirq rules are nibble-based
+ * FIXME: pirqmap may be { 1, 0, 3, 2 },
+ * 	  2+3 are both mapped to irq 9 on my system
+ */
+static int pirq_ite_get(struct pci_dev *router, struct pci_dev *dev, int pirq)
+{
+	static unsigned char pirqmap[4] = { 1, 0, 2, 3 };
+	return read_config_nybble(router,0x43, pirqmap[pirq-1]);
+}
+
+static int pirq_ite_set(struct pci_dev *router, struct pci_dev *dev, int pirq, int irq)
+{
+	static unsigned char pirqmap[4] = { 1, 0, 2, 3 };
+	write_config_nybble(router, 0x43, pirqmap[pirq-1], irq);
+	return 1;
+}
+
+/*
  * OPTI: high four bits are nibble pointer..
  * I wonder what the low bits do?
  */
@@ -443,10 +463,17 @@
 	{ "PIIX", PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_82371AB_0, pirq_piix_get, pirq_piix_set },
 	{ "PIIX", PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_82371MX,   pirq_piix_get, pirq_piix_set },
 	{ "PIIX", PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_82443MX_0, pirq_piix_get, pirq_piix_set },
+	{ "PIIX", PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_82801AA_0, pirq_piix_get, pirq_piix_set },
+	{ "PIIX", PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_82801AB_0, pirq_piix_get, pirq_piix_set },
 	{ "PIIX", PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_82801BA_0, pirq_piix_get, pirq_piix_set },
+	{ "PIIX", PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_82801BA_10, pirq_piix_get, pirq_piix_set },
+	{ "PIIX", PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_82801CA_0, pirq_piix_get, pirq_piix_set },
+	{ "PIIX", PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_82801CA_12, pirq_piix_get, pirq_piix_set },
 
 	{ "ALI", PCI_VENDOR_ID_AL, PCI_DEVICE_ID_AL_M1533, pirq_ali_get, pirq_ali_set },
 
+	{ "ITE", PCI_VENDOR_ID_ITE, PCI_DEVICE_ID_ITE_IT8330G_0, pirq_ite_get, pirq_ite_set },
+
 	{ "VIA", PCI_VENDOR_ID_VIA, PCI_DEVICE_ID_VIA_82C586_0, pirq_via_get, pirq_via_set },
 	{ "VIA", PCI_VENDOR_ID_VIA, PCI_DEVICE_ID_VIA_82C596, pirq_via_get, pirq_via_set },
 	{ "VIA", PCI_VENDOR_ID_VIA, PCI_DEVICE_ID_VIA_82C686, pirq_via_get, pirq_via_set },
@@ -564,6 +591,15 @@
 	}
 	DBG(" -> PIRQ %02x, mask %04x, excl %04x", pirq, mask, pirq_table->exclusive_irqs);
 	mask &= pcibios_irq_mask;
+
+	/* Work around broken HP Pavilion Notebooks which assign USB to
+	   IRQ 9 even though it is actually wired to IRQ 11 */
+
+	if (broken_hp_bios_irq9 && pirq == 0x59 && dev->irq == 9) {
+		dev->irq = 11;
+		pci_write_config_byte(dev, PCI_INTERRUPT_LINE, 11);
+		r->set(pirq_router_dev, dev, pirq, 11);
+	}
 
 	/*
 	 * Find the best IRQ to assign: use the one
diff -Nru linux/arch/i386/kernel/pci-pc.c linux-2.4.19-pre5-mjc/arch/i386/kernel/pci-pc.c
--- linux/arch/i386/kernel/pci-pc.c	Mon Feb 25 14:37:53 2002
+++ linux-2.4.19-pre5-mjc/arch/i386/kernel/pci-pc.c	Sat Apr  6 08:29:59 2002
@@ -14,6 +14,7 @@
 
 #include <asm/segment.h>
 #include <asm/io.h>
+#include <asm/smp.h>
 
 #include "pci-i386.h"
 
@@ -26,6 +27,16 @@
 int (*pci_config_read)(int seg, int bus, int dev, int fn, int reg, int len, u32 *value) = NULL;
 int (*pci_config_write)(int seg, int bus, int dev, int fn, int reg, int len, u32 value) = NULL;
 
+#ifdef CONFIG_MULTIQUAD
+#define BUS2QUAD(global) (mp_bus_id_to_node[global])
+#define BUS2LOCAL(global) (mp_bus_id_to_local[global])
+#define QUADLOCAL2BUS(quad,local) (quad_local_to_mp_bus_id[quad][local])
+#else
+#define BUS2QUAD(global) (0)
+#define BUS2LOCAL(global) (global)
+#define QUADLOCAL2BUS(quad,local) (local)
+#endif
+
 /*
  * This interrupt-safe spinlock protects all accesses to PCI
  * configuration space.
@@ -39,10 +50,71 @@
 
 #ifdef CONFIG_PCI_DIRECT
 
+#ifdef CONFIG_MULTIQUAD
+#define PCI_CONF1_ADDRESS(bus, dev, fn, reg) \
+	(0x80000000 | (BUS2LOCAL(bus) << 16) | (dev << 11) | (fn << 8) | (reg & ~3))
+
+static int pci_conf1_read (int seg, int bus, int dev, int fn, int reg, int len, u32 *value) /* CONFIG_MULTIQUAD */
+{
+	unsigned long flags;
+
+	if (!value || (bus > 255) || (dev > 31) || (fn > 7) || (reg > 255))
+		return -EINVAL;
+
+	spin_lock_irqsave(&pci_config_lock, flags);
+
+	outl_quad(PCI_CONF1_ADDRESS(bus, dev, fn, reg), 0xCF8, BUS2QUAD(bus));
+
+	switch (len) {
+	case 1:
+		*value = inb_quad(0xCFC + (reg & 3), BUS2QUAD(bus));
+		break;
+	case 2:
+		*value = inw_quad(0xCFC + (reg & 2), BUS2QUAD(bus));
+		break;
+	case 4:
+		*value = inl_quad(0xCFC, BUS2QUAD(bus));
+		break;
+	}
+
+	spin_unlock_irqrestore(&pci_config_lock, flags);
+
+	return 0;
+}
+
+static int pci_conf1_write (int seg, int bus, int dev, int fn, int reg, int len, u32 value) /* CONFIG_MULTIQUAD */
+{
+	unsigned long flags;
+
+	if ((bus > 255) || (dev > 31) || (fn > 7) || (reg > 255)) 
+		return -EINVAL;
+
+	spin_lock_irqsave(&pci_config_lock, flags);
+
+	outl_quad(PCI_CONF1_ADDRESS(bus, dev, fn, reg), 0xCF8, BUS2QUAD(bus));
+
+	switch (len) {
+	case 1:
+		outb_quad((u8)value, 0xCFC + (reg & 3), BUS2QUAD(bus));
+		break;
+	case 2:
+		outw_quad((u16)value, 0xCFC + (reg & 2), BUS2QUAD(bus));
+		break;
+	case 4:
+		outl_quad((u32)value, 0xCFC, BUS2QUAD(bus));
+		break;
+	}
+
+	spin_unlock_irqrestore(&pci_config_lock, flags);
+
+	return 0;
+}
+
+#else /* !CONFIG_MULTIQUAD */
 #define PCI_CONF1_ADDRESS(bus, dev, fn, reg) \
 	(0x80000000 | (bus << 16) | (dev << 11) | (fn << 8) | (reg & ~3))
 
-static int pci_conf1_read (int seg, int bus, int dev, int fn, int reg, int len, u32 *value)
+static int pci_conf1_read (int seg, int bus, int dev, int fn, int reg, int len, u32 *value) /* !CONFIG_MULTIQUAD */
 {
 	unsigned long flags;
 
@@ -70,7 +142,7 @@
 	return 0;
 }
 
-static int pci_conf1_write (int seg, int bus, int dev, int fn, int reg, int len, u32 value)
+static int pci_conf1_write (int seg, int bus, int dev, int fn, int reg, int len, u32 value) /* !CONFIG_MULTIQUAD */
 {
 	unsigned long flags;
 
@@ -98,6 +170,8 @@
 	return 0;
 }
 
+#endif /* CONFIG_MULTIQUAD */
+
 #undef PCI_CONF1_ADDRESS
 
 static int pci_conf1_read_config_byte(struct pci_dev *dev, int where, u8 *value)
@@ -347,7 +421,7 @@
 		    pci_sanity_check(&pci_direct_conf1)) {
 			outl (tmp, 0xCF8);
 			__restore_flags(flags);
-			printk("PCI: Using configuration type 1\n");
+			printk(KERN_INFO "PCI: Using configuration type 1\n");
 			request_region(0xCF8, 8, "PCI conf1");
 			return &pci_direct_conf1;
 		}
@@ -364,7 +438,7 @@
 		if (inb (0xCF8) == 0x00 && inb (0xCFA) == 0x00 &&
 		    pci_sanity_check(&pci_direct_conf2)) {
 			__restore_flags(flags);
-			printk("PCI: Using configuration type 2\n");
+			printk(KERN_INFO "PCI: Using configuration type 2\n");
 			request_region(0xCF8, 4, "PCI conf2");
 			return &pci_direct_conf2;
 		}
@@ -472,10 +546,10 @@
 		case 0:
 			return address + entry;
 		case 0x80:	/* Not present */
-			printk("bios32_service(0x%lx): not present\n", service);
+			printk(KERN_WARNING "bios32_service(0x%lx): not present\n", service);
 			return 0;
 		default: /* Shouldn't happen */
-			printk("bios32_service(0x%lx): returned 0x%x -- BIOS bug!\n",
+			printk(KERN_WARNING "bios32_service(0x%lx): returned 0x%x -- BIOS bug!\n",
 				service, return_code);
 			return 0;
 	}
@@ -525,7 +599,7 @@
 				status, signature);
 			return 0;
 		}
-		printk("PCI: PCI BIOS revision %x.%02x entry at 0x%lx, last bus=%d\n",
+		printk(KERN_INFO "PCI: PCI BIOS revision %x.%02x entry at 0x%lx, last bus=%d\n",
 			major_ver, minor_ver, pcibios_entry, pcibios_last_bus);
 #ifdef CONFIG_PCI_DIRECT
 		if (!(hw_mech & PCIBIOS_HW_TYPE1))
@@ -827,7 +901,7 @@
 				}
 			}
 			if (ln == &pci_devices) {
-				printk("PCI: BIOS reporting unknown device %02x:%02x\n", bus, devfn);
+				printk(KERN_WARNING "PCI: BIOS reporting unknown device %02x:%02x\n", bus, devfn);
 				/*
 				 * We must not continue scanning as several buggy BIOSes
 				 * return garbage after the last device. Grr.
@@ -836,7 +910,7 @@
 			}
 		}
 		if (!found) {
-			printk("PCI: Device %02x:%02x not found by BIOS\n",
+			printk(KERN_WARNING "PCI: Device %02x:%02x not found by BIOS\n",
 				dev->bus->number, dev->devfn);
 			list_del(&dev->global_list);
 			list_add_tail(&dev->global_list, &sorted_devices);
@@ -896,7 +970,7 @@
 			rt->size = opt.size + sizeof(struct irq_routing_table);
 			rt->exclusive_irqs = map;
 			memcpy(rt->slots, (void *) page, opt.size);
-			printk("PCI: Using BIOS Interrupt Routing Table\n");
+			printk(KERN_INFO "PCI: Using BIOS Interrupt Routing Table\n");
 		}
 	}
 	free_page(page);
@@ -961,7 +1035,7 @@
 	}
 	if (!seen_host_bridge)
 		return;
-	printk("PCI: Ignoring ghost devices on bus %02x\n", b->number);
+	printk(KERN_WARNING "PCI: Ignoring ghost devices on bus %02x\n", b->number);
 
 	ln = &b->devices;
 	while (ln->next != &b->devices) {
@@ -999,7 +1073,7 @@
 			if (!pci_read_config_word(&dev, PCI_VENDOR_ID, &l) &&
 			    l != 0x0000 && l != 0xffff) {
 				DBG("Found device at %02x:%02x [%04x]\n", n, dev.devfn, l);
-				printk("PCI: Discovered peer bus %02x\n", n);
+				printk(KERN_INFO "PCI: Discovered peer bus %02x\n", n);
 				pci_scan_bus(n, pci_root_ops, NULL);
 				break;
 			}
@@ -1017,6 +1091,8 @@
 	 */
 	int pxb, reg;
 	u8 busno, suba, subb;
+	int quad = BUS2QUAD(d->bus->number);
+
 	printk("PCI: Searching for i450NX host bridges on %s\n", d->slot_name);
 	reg = 0xd0;
 	for(pxb=0; pxb<2; pxb++) {
@@ -1025,9 +1101,9 @@
 		pci_read_config_byte(d, reg++, &subb);
 		DBG("i450NX PXB %d: %02x/%02x/%02x\n", pxb, busno, suba, subb);
 		if (busno)
-			pci_scan_bus(busno, pci_root_ops, NULL);	/* Bus A */
+			pci_scan_bus(QUADLOCAL2BUS(quad,busno), pci_root_ops, NULL);	/* Bus A */
 		if (suba < subb)
-			pci_scan_bus(suba+1, pci_root_ops, NULL);	/* Bus B */
+			pci_scan_bus(QUADLOCAL2BUS(quad,suba+1), pci_root_ops, NULL);	/* Bus B */
 	}
 	pcibios_last_bus = -1;
 }
@@ -1040,7 +1116,7 @@
 	 */
 	u8 busno;
 	pci_read_config_byte(d, 0x4a, &busno);
-	printk("PCI: i440KX/GX host bridge %s: secondary bus %02x\n", d->slot_name, busno);
+	printk(KERN_INFO "PCI: i440KX/GX host bridge %s: secondary bus %02x\n", d->slot_name, busno);
 	pci_scan_bus(busno, pci_root_ops, NULL);
 	pcibios_last_bus = -1;
 }
@@ -1053,7 +1129,7 @@
 	 */
 	int i;
 
-	printk("PCI: Fixing base address flags for device %s\n", d->slot_name);
+	printk(KERN_WARNING "PCI: Fixing base address flags for device %s\n", d->slot_name);
 	for(i=0; i<4; i++)
 		d->resource[i].flags |= PCI_BASE_ADDRESS_SPACE_IO;
 }
@@ -1110,27 +1186,48 @@
 
 /*
  * Addresses issues with problems in the memory write queue timer in
- * certain VIA Northbridges.  This bugfix is per VIA's specifications.
- *
+ * certain VIA Northbridges.  This bugfix is per VIA's specifications,
+ * except for the KL133/KM133: clearing bit 5 on those Northbridges seems
+ * to trigger a bug in its integrated ProSavage video card, which
+ * causes screen corruption.  We only clear bits 6 and 7 for that chipset,
+ * until VIA can provide us with definitive information on why screen
+ * corruption occurs, and what exactly those bits do.
+ * 
  * VIA 8363,8622,8361 Northbridges:
  *  - bits  5, 6, 7 at offset 0x55 need to be turned off
  * VIA 8367 (KT266x) Northbridges:
  *  - bits  5, 6, 7 at offset 0x95 need to be turned off
+ * VIA 8363 rev 0x81/0x84 (KL133/KM133) Northbridges:
+ *  - bits     6, 7 at offset 0x55 need to be turned off
  */
+
+#define VIA_8363_KL133_REVISION_ID 0x81
+#define VIA_8363_KM133_REVISION_ID 0x84
+
 static void __init pci_fixup_via_northbridge_bug(struct pci_dev *d)
 {
 	u8 v;
+	u8 revision;
 	int where = 0x55;
+	int mask = 0x1f; /* clear bits 5, 6, 7 by default */
 
+	pci_read_config_byte(d, PCI_REVISION_ID, &revision);
+	
 	if (d->device == PCI_DEVICE_ID_VIA_8367_0) {
 		where = 0x95; /* the memory write queue timer register is 
-				 different for the kt266x's: 0x95 not 0x55 */
+				 different for the KT266x's: 0x95 not 0x55 */
+	} else if (d->device == PCI_DEVICE_ID_VIA_8363_0 &&
+	           (revision == VIA_8363_KL133_REVISION_ID || 
+		    revision == VIA_8363_KM133_REVISION_ID)) {
+		mask = 0x3f; /* clear only bits 6 and 7; clearing bit 5
+				causes screen corruption on the KL133/KM133 */
 	}
 
 	pci_read_config_byte(d, where, &v);
-	if (v & 0xe0) {
-		printk("Disabling VIA memory write queue: [%02x] %02x->%02x\n", where, v, v & 0x1f);
-		v &= 0x1f; /* clear bits 5, 6, 7 */
+	if (v & ~mask) {
+		printk("Disabling VIA memory write queue (PCI ID %04x, rev %02x): [%02x] %02x & %02x -> %02x\n", \
+			d->device, revision, where, v, mask, v & mask);
+		v &= mask;
 		pci_write_config_byte(d, where, v);
 	}
 }
@@ -1199,15 +1296,25 @@
 
 void __init pcibios_init(void)
 {
+	int quad;
+
 	if (!pci_root_ops)
 		pcibios_config_init();
 	if (!pci_root_ops) {
-		printk("PCI: System does not support PCI\n");
+		printk(KERN_WARNING "PCI: System does not support PCI\n");
 		return;
 	}
 
-	printk("PCI: Probing PCI hardware\n");
+	printk(KERN_INFO "PCI: Probing PCI hardware\n");
 	pci_root_bus = pci_scan_bus(0, pci_root_ops, NULL);
+	if (clustered_apic_mode && (numnodes > 1)) {
+		for (quad = 1; quad < numnodes; ++quad) {
+			printk("Scanning PCI bus %d for quad %d\n", 
+				QUADLOCAL2BUS(quad,0), quad);
+			pci_scan_bus(QUADLOCAL2BUS(quad,0), 
+				pci_root_ops, NULL);
+		}
+	}
 
 	pcibios_irq_init();
 	pcibios_fixup_peer_bridges();
diff -Nru linux/arch/i386/kernel/process.c linux-2.4.19-pre5-mjc/arch/i386/kernel/process.c
--- linux/arch/i386/kernel/process.c	Mon Feb 25 14:37:53 2002
+++ linux-2.4.19-pre5-mjc/arch/i386/kernel/process.c	Sat Apr  6 08:29:59 2002
@@ -124,15 +124,12 @@
 void cpu_idle (void)
 {
 	/* endless idle loop with no priority at all */
-	init_idle();
-	current->nice = 20;
-	current->counter = -100;
 
 	while (1) {
 		void (*idle)(void) = pm_idle;
 		if (!idle)
 			idle = default_idle;
-		while (!current->need_resched)
+		if (!current->need_resched)
 			idle();
 		schedule();
 		check_pgt_cache();
@@ -697,15 +694,17 @@
 	asm volatile("movl %%gs,%0":"=m" (*(int *)&prev->gs));
 
 	/*
-	 * Restore %fs and %gs.
+	 * Restore %fs and %gs if needed.
 	 */
-	loadsegment(fs, next->fs);
-	loadsegment(gs, next->gs);
+	if (unlikely(prev->fs | prev->gs | next->fs | next->gs)) {
+		loadsegment(fs, next->fs);
+		loadsegment(gs, next->gs);
+	}
 
 	/*
 	 * Now maybe reload the debug registers
 	 */
-	if (next->debugreg[7]){
+	if (unlikely(next->debugreg[7])) {
 		loaddebug(next, 0);
 		loaddebug(next, 1);
 		loaddebug(next, 2);
@@ -715,7 +714,7 @@
 		loaddebug(next, 7);
 	}
 
-	if (prev->ioperm || next->ioperm) {
+	if (unlikely(prev->ioperm || next->ioperm)) {
 		if (next->ioperm) {
 			/*
 			 * 4 cachelines copy ... not good, but not that
@@ -738,6 +737,20 @@
 			tss->bitmap = INVALID_IO_BITMAP_OFFSET;
 	}
 }
+
+#ifdef CONFIG_SOFTWARE_SUSPEND
+/*
+ * We reload there esp0, LDT, page table pointer only. Other processor
+ * registers including segment ones are restored before calling this function
+ */
+void activate_task(struct task_struct *tsk_p)
+{
+	struct thread_struct *tsk = &tsk_p->thread;
+	struct tss_struct *tss = init_tss + smp_processor_id();
+
+	tss->esp0 = tsk->esp0;
+}
+#endif
 
 asmlinkage int sys_fork(struct pt_regs regs)
 {
diff -Nru linux/arch/i386/kernel/setup.c linux-2.4.19-pre5-mjc/arch/i386/kernel/setup.c
--- linux/arch/i386/kernel/setup.c	Mon Feb 25 14:37:53 2002
+++ linux-2.4.19-pre5-mjc/arch/i386/kernel/setup.c	Sat Apr  6 09:05:24 2002
@@ -98,6 +98,8 @@
 #endif
 #include <linux/highmem.h>
 #include <linux/bootmem.h>
+#include <linux/pci.h>
+#include <linux/pci_ids.h>
 #include <linux/seq_file.h>
 #include <asm/processor.h>
 #include <linux/console.h>
@@ -139,6 +141,9 @@
 /* For PCI or other memory-mapped resources */
 unsigned long pci_mem_start = 0x10000000;
 
+/* user-defined highmem size */
+static unsigned int highmem_pages = -1;
+
 /*
  * Setup options
  */
@@ -155,6 +160,7 @@
 unsigned char aux_device_present;
 
 extern void mcheck_init(struct cpuinfo_x86 *c);
+extern void dmi_scan_machine(void);
 extern int root_mountflags;
 extern char _text, _etext, _edata, _end;
 
@@ -761,8 +767,15 @@
 			}
 		}
 		/* acpismp=force forces parsing and use of the ACPI SMP table */
-		if (c == ' ' && !memcmp(from, "acpismp=force", 13)) 	
+		if (c == ' ' && !memcmp(from, "acpismp=force", 13))
 			 enable_acpi_smp_table = 1;
+		/*
+		 * highmem=size forces highmem to be exactly 'size' bytes.
+		 * This works even on boxes that have no highmem otherwise.
+		 * This also works to reduce highmem size on bigger boxes.
+		 */
+		if (c == ' ' && !memcmp(from, "highmem=", 8))
+			highmem_pages = memparse(from+8, &from) >> PAGE_SHIFT;
 	
 		c = *(from++);
 		if (!c)
@@ -829,7 +842,20 @@
 /*
  * Reserved space for vmalloc and iomap - defined in asm/page.h
  */
+#ifdef CONFIG_HIGHMEM_EMULATION
+#define ORDER_DOWN(x)  ((x >> (MAX_ORDER-1)) << (MAX_ORDER-1))
+#define MAXMEM_PFN					\
+({							\
+	int __max_pfn;					\
+	if (max_pfn > PFN_DOWN(MAXMEM))			\
+		__max_pfn = PFN_DOWN(MAXMEM);		\
+	else						\
+		__max_pfn = ORDER_DOWN(max_pfn / 5);	\
+	__max_pfn;					\
+})
+#else
 #define MAXMEM_PFN	PFN_DOWN(MAXMEM)
+#endif
 #define MAX_NONPAE_PFN	(1 << 20)
 
 	/*
@@ -860,6 +886,14 @@
 	 */
 	max_low_pfn = max_pfn;
 	if (max_low_pfn > MAXMEM_PFN) {
+		if (highmem_pages == -1)
+			highmem_pages = max_pfn - MAXMEM_PFN;
+		if (highmem_pages + MAXMEM_PFN < max_pfn)
+			max_pfn = MAXMEM_PFN + highmem_pages;
+		if (highmem_pages + MAXMEM_PFN > max_pfn) {
+			printk("only %luMB highmem pages available, ignoring highmem size of %uMB.\n", pages_to_mb(max_pfn - MAXMEM_PFN), pages_to_mb(highmem_pages));
+			highmem_pages = 0;
+		}
 		max_low_pfn = MAXMEM_PFN;
 #ifndef CONFIG_HIGHMEM
 		/* Maximum memory usable is what is directly addressable */
@@ -878,16 +912,37 @@
 		}
 #endif /* !CONFIG_X86_PAE */
 #endif /* !CONFIG_HIGHMEM */
+	} else {
+		if (highmem_pages == -1)
+			highmem_pages = 0;
+#if CONFIG_HIGHMEM
+		if (highmem_pages >= max_pfn) {
+			printk(KERN_ERR "highmem size specified (%uMB) is bigger than pages available (%luMB)!.\n", pages_to_mb(highmem_pages), pages_to_mb(max_pfn));
+			highmem_pages = 0;
+		}
+		if (highmem_pages) {
+			if (max_low_pfn-highmem_pages < 64*1024*1024/PAGE_SIZE){
+				printk(KERN_ERR "highmem size %uMB results in smaller than 64MB lowmem, ignoring it.\n", pages_to_mb(highmem_pages));
+				highmem_pages = 0;
+			}
+			max_low_pfn -= highmem_pages;
+		}
+#else
+		if (highmem_pages)
+			printk(KERN_ERR "ignoring highmem size on non-highmem kernel!\n");
+#endif
 	}
 
 #ifdef CONFIG_HIGHMEM
 	highstart_pfn = highend_pfn = max_pfn;
-	if (max_pfn > MAXMEM_PFN) {
-		highstart_pfn = MAXMEM_PFN;
-		printk(KERN_NOTICE "%ldMB HIGHMEM available.\n",
-			pages_to_mb(highend_pfn - highstart_pfn));
+	if (max_pfn > max_low_pfn) {
+		highstart_pfn = max_low_pfn;
 	}
+	printk(KERN_NOTICE "%ldMB HIGHMEM available.\n",
+		pages_to_mb(highend_pfn - highstart_pfn));
 #endif
+	printk(KERN_NOTICE "%ldMB LOWMEM available.\n",
+			pages_to_mb(max_low_pfn));
 	/*
 	 * Initialize the boot-time allocator (with low memory only):
 	 */
@@ -975,6 +1030,10 @@
 	}
 #endif
 
+	if (test_bit(X86_FEATURE_HT, &boot_cpu_data.x86_capability[0]))
+		enable_acpi_smp_table = 1;
+	
+
 	/*
 	 * NOTE: before this point _nobody_ is allowed to allocate
 	 * any memory using the bootmem allocator.
@@ -990,7 +1049,6 @@
 	 */
 	if (smp_found_config)
 		get_smp_config();
-	init_apic_mappings();
 #endif
 
 
@@ -1042,6 +1100,7 @@
 	conswitchp = &dummy_con;
 #endif
 #endif
+	dmi_scan_machine();
 }
 
 static int cachesize_override __initdata = -1;
@@ -1306,7 +1365,7 @@
 }
 
 /*
- * Read Cyrix DEVID registers (DIR) to get more detailed info. about the CPU
+ * Read NSC/Cyrix DEVID registers (DIR) to get more detailed info. about the CPU
  */
 static void __init do_cyrix_devid(unsigned char *dir0, unsigned char *dir1)
 {
@@ -1468,11 +1527,6 @@
 		break;
 
 	case 4: /* MediaGX/GXm */
-		/*
-		 *	Life sometimes gets weiiiiiiiird if we use this
-		 *	on the MediaGX. So we turn it off for now. 
-		 */
-		
 #ifdef CONFIG_PCI
 		/* It isnt really a PCI quirk directly, but the cure is the
 		   same. The MediaGX has deep magic SMM stuff that handles the
@@ -1494,14 +1548,22 @@
 		/* GXm supports extended cpuid levels 'ala' AMD */
 		if (c->cpuid_level == 2) {
 			get_model_name(c);  /* get CPU marketing name */
-			clear_bit(X86_FEATURE_TSC, c->x86_capability);
+			/*
+	 		 *	The 5510/5520 companion chips have a funky PIT
+			 *	that breaks the TSC synchronizing, so turn it off
+			 */
+			if(pci_find_device(PCI_VENDOR_ID_CYRIX, PCI_DEVICE_ID_CYRIX_5510, NULL) ||
+			   pci_find_device(PCI_VENDOR_ID_CYRIX, PCI_DEVICE_ID_CYRIX_5520, NULL))
+				clear_bit(X86_FEATURE_TSC, c->x86_capability);
 			return;
 		}
 		else {  /* MediaGX */
 			Cx86_cb[2] = (dir0_lsn & 1) ? '3' : '4';
 			p = Cx86_cb+2;
 			c->x86_model = (dir1 & 0x20) ? 1 : 2;
-			clear_bit(X86_FEATURE_TSC, &c->x86_capability);
+			if(pci_find_device(PCI_VENDOR_ID_CYRIX, PCI_DEVICE_ID_CYRIX_5510, NULL) ||
+			   pci_find_device(PCI_VENDOR_ID_CYRIX, PCI_DEVICE_ID_CYRIX_5520, NULL))
+				clear_bit(X86_FEATURE_TSC, &c->x86_capability);
 		}
 		break;
 
@@ -2270,6 +2332,8 @@
 		c->x86_vendor = X86_VENDOR_AMD;
 	else if (!strcmp(v, "CyrixInstead"))
 		c->x86_vendor = X86_VENDOR_CYRIX;
+	else if (!strcmp(v, "Geode by NSC"))
+		c->x86_vendor = X86_VENDOR_NSC;
 	else if (!strcmp(v, "UMC UMC UMC "))
 		c->x86_vendor = X86_VENDOR_UMC;
 	else if (!strcmp(v, "CentaurHauls"))
@@ -2613,6 +2677,10 @@
 		init_cyrix(c);
 		break;
 
+	case X86_VENDOR_NSC:
+	        init_cyrix(c);
+		break;
+
 	case X86_VENDOR_AMD:
 		init_amd(c);
 		break;
@@ -2713,14 +2781,17 @@
 {
 	get_cpu_vendor(&boot_cpu_data);
 
-	if ( boot_cpu_data.x86_vendor == X86_VENDOR_CYRIX )
+	if ( boot_cpu_data.x86_vendor == X86_VENDOR_CYRIX ||
+	     boot_cpu_data.x86_vendor == X86_VENDOR_NSC )
 		init_cyrix(&boot_cpu_data);
 }
 
 
 /* These need to match <asm/processor.h> */
 static char *cpu_vendor_names[] __initdata = {
-	"Intel", "Cyrix", "AMD", "UMC", "NexGen", "Centaur", "Rise", "Transmeta" };
+	"Intel", "Cyrix", "AMD", "UMC", "NexGen", 
+	"Centaur", "Rise", "Transmeta", "NSC"
+};
 
 
 void __init print_cpu_info(struct cpuinfo_x86 *c)
@@ -2920,9 +2991,10 @@
 	load_TR(nr);
 	load_LDT(&init_mm);
 
-	/*
-	 * Clear all 6 debug registers:
-	 */
+	/* Clear %fs and %gs. */
+	asm volatile ("xorl %eax, %eax; movl %eax, %fs; movl %eax, %gs");
+
+	/* Clear all 6 debug registers: */
 
 #define CD(register) __asm__("movl %0,%%db" #register ::"r"(0) );
 
diff -Nru linux/arch/i386/kernel/signal.c linux-2.4.19-pre5-mjc/arch/i386/kernel/signal.c
--- linux/arch/i386/kernel/signal.c	Mon Feb 25 14:37:53 2002
+++ linux-2.4.19-pre5-mjc/arch/i386/kernel/signal.c	Sat Apr  6 08:29:59 2002
@@ -20,6 +20,7 @@
 #include <linux/stddef.h>
 #include <linux/tty.h>
 #include <linux/personality.h>
+#include <linux/suspend.h>
 #include <asm/ucontext.h>
 #include <asm/uaccess.h>
 #include <asm/i387.h>
@@ -595,6 +596,11 @@
 	if ((regs->xcs & 3) != 3)
 		return 1;
 
+	if (current->flags & PF_FREEZE) {
+		refrigerator(0);
+		goto no_signal;
+	}
+
 	if (!oldset)
 		oldset = &current->blocked;
 
@@ -685,10 +691,7 @@
 				/* FALLTHRU */
 
 			default:
-				sigaddset(&current->pending.signal, signr);
-				recalc_sigpending(current);
-				current->flags |= PF_SIGNALED;
-				do_exit(exit_code);
+				sig_exit(signr, exit_code, &info);
 				/* NOTREACHED */
 			}
 		}
@@ -705,6 +708,7 @@
 		return 1;
 	}
 
+ no_signal:
 	/* Did we come from a system call? */
 	if (regs->orig_eax >= 0) {
 		/* Restart the system call - no handlers present */
diff -Nru linux/arch/i386/kernel/smp.c linux-2.4.19-pre5-mjc/arch/i386/kernel/smp.c
--- linux/arch/i386/kernel/smp.c	Fri Dec 21 12:41:53 2001
+++ linux-2.4.19-pre5-mjc/arch/i386/kernel/smp.c	Sat Apr  6 09:51:19 2002
@@ -105,7 +105,7 @@
 /* The 'big kernel lock' */
 spinlock_t kernel_flag __cacheline_aligned_in_smp = SPIN_LOCK_UNLOCKED;
 
-struct tlb_state cpu_tlbstate[NR_CPUS] = {[0 ... NR_CPUS-1] = { &init_mm, 0 }};
+struct tlb_state cpu_tlbstate[NR_CPUS] __cacheline_aligned = {[0 ... NR_CPUS-1] = { &init_mm, 0, }};
 
 /*
  * the following functions deal with sending IPIs between CPUs.
@@ -301,8 +301,7 @@
  */
 static void inline leave_mm (unsigned long cpu)
 {
-	if (cpu_tlbstate[cpu].state == TLBSTATE_OK)
-		BUG();
+	BUG_ON(cpu_tlbstate[cpu].state == TLBSTATE_OK);
 	clear_bit(cpu, &cpu_tlbstate[cpu].active_mm->cpu_vm_mask);
 }
 
@@ -485,15 +484,54 @@
 	do_flush_tlb_all_local();
 }
 
+static spinlock_t migration_lock = SPIN_LOCK_UNLOCKED;
+static task_t *new_task;
+
+/*
+ * This function sends a 'task migration' IPI to another CPU.
+ * Must be called from syscall contexts, with interrupts *enabled*.
+ */
+void smp_migrate_task(int cpu, task_t *p)
+{
+	/*
+	 * The target CPU will unlock the migration spinlock:
+	 */
+	_raw_spin_lock(&migration_lock);
+	new_task = p;
+	send_IPI_mask(1 << cpu, TASK_MIGRATION_VECTOR);
+}
+
+/*
+ * Task migration callback.
+ */
+asmlinkage void smp_task_migration_interrupt(void)
+{
+	task_t *p;
+
+	ack_APIC_irq();
+	p = new_task;
+	_raw_spin_unlock(&migration_lock);
+	sched_task_migrated(p);
+}
 /*
  * this function sends a 'reschedule' IPI to another CPU.
  * it goes straight through and wastes no time serializing
  * anything. Worst case is that we lose a reschedule ...
  */
-
 void smp_send_reschedule(int cpu)
 {
 	send_IPI_mask(1 << cpu, RESCHEDULE_VECTOR);
+}
+
+/*
+ * this function sends a reschedule IPI to all (other) CPUs.
+ * This should only be used if some 'global' task became runnable,
+ * such as a RT task, that must be handled now. The first CPU
+ * that manages to grab the task will run it.
+ */
+void smp_send_reschedule_all(void)
+{
+	send_IPI_allbutself(RESCHEDULE_VECTOR);
 }
 
 /*
diff -Nru linux/arch/i386/kernel/smpboot.c linux-2.4.19-pre5-mjc/arch/i386/kernel/smpboot.c
--- linux/arch/i386/kernel/smpboot.c	Fri Dec 21 12:41:53 2001
+++ linux-2.4.19-pre5-mjc/arch/i386/kernel/smpboot.c	Sat Apr  6 08:29:59 2002
@@ -213,7 +213,7 @@
  *		    ^---- (this multiplication can overflow)
  */
 
-static unsigned long long div64 (unsigned long long a, unsigned long b0)
+static unsigned long long __init div64 (unsigned long long a, unsigned long b0)
 {
 	unsigned int a1, a2;
 	unsigned long long res;
@@ -308,14 +308,14 @@
 			if (tsc_values[i] < avg)
 				realdelta = -realdelta;
 
-			printk("BIOS BUG: CPU#%d improperly initialized, has %ld usecs TSC skew! FIXED.\n",
-				i, realdelta);
+			printk("BIOS BUG: CPU#%d improperly initialized, has %ld usecs TSC skew! FIXED.\n", i, realdelta);
 		}
 
 		sum += delta;
 	}
 	if (!buggy)
 		printk("passed.\n");
+		;
 }
 
 static void __init synchronize_tsc_ap (void)
@@ -365,7 +365,7 @@
 	 * (This works even if the APIC is not enabled.)
 	 */
 	phys_id = GET_APIC_ID(apic_read(APIC_ID));
-	cpuid = current->processor;
+	cpuid = cpu();
 	if (test_and_set_bit(cpuid, &cpu_online_map)) {
 		printk("huh, phys CPU#%d, CPU#%d already present??\n",
 					phys_id, cpuid);
@@ -435,6 +435,7 @@
 	 */
  	smp_store_cpu_info(cpuid);
 
+	disable_APIC_timer();
 	/*
 	 * Allow the master to continue.
 	 */
@@ -465,6 +466,7 @@
 	smp_callin();
 	while (!atomic_read(&smp_commenced))
 		rep_nop();
+	enable_APIC_timer();
 	/*
 	 * low-memory mappings have been cleared, flush them from
 	 * the local TLBs too.
@@ -803,16 +805,13 @@
 	if (!idle)
 		panic("No idle process for CPU %d", cpu);
 
-	idle->processor = cpu;
-	idle->cpus_runnable = 1 << cpu; /* we schedule the first task manually */
+	init_idle(idle, cpu);
 
 	map_cpu_to_boot_apicid(cpu, apicid);
 
 	idle->thread.eip = (unsigned long) start_secondary;
 
-	del_from_runqueue(idle);
 	unhash_process(idle);
-	init_tasks[cpu] = idle;
 
 	/* start_eip had better be page-aligned! */
 	start_eip = setup_trampoline();
@@ -925,6 +924,7 @@
 }
 
 cycles_t cacheflush_time;
+unsigned long cache_decay_ticks;
 
 static void smp_tune_scheduling (void)
 {
@@ -958,9 +958,13 @@
 		cacheflush_time = (cpu_khz>>10) * (cachesize<<10) / bandwidth;
 	}
 
+	cache_decay_ticks = (long)cacheflush_time/cpu_khz * HZ / 1000;
+
 	printk("per-CPU timeslice cutoff: %ld.%02ld usecs.\n",
 		(long)cacheflush_time/(cpu_khz/1000),
 		((long)cacheflush_time*100/(cpu_khz/1000)) % 100);
+	printk("task migration cache decay timeout: %ld msecs.\n",
+		(cache_decay_ticks + 1) * 1000 / HZ);
 }
 
 /*
@@ -981,11 +985,14 @@
 {
 	int apicid, cpu, bit;
 
-        if (clustered_apic_mode) {
-                /* remap the 1st quad's 256k range for cross-quad I/O */
-                xquad_portio = ioremap (XQUAD_PORTIO_BASE, XQUAD_PORTIO_LEN);
-                printk("Cross quad port I/O vaddr 0x%08lx, len %08lx\n",
-                        (u_long) xquad_portio, (u_long) XQUAD_PORTIO_LEN);
+        if (clustered_apic_mode && (numnodes > 1)) {
+                printk("Remapping cross-quad port I/O for %d quads\n",
+			numnodes);
+                printk("xquad_portio vaddr 0x%08lx, len %08lx\n",
+                        (u_long) xquad_portio, 
+			(u_long) numnodes * XQUAD_PORTIO_LEN);
+                xquad_portio = ioremap (XQUAD_PORTIO_BASE, 
+			numnodes * XQUAD_PORTIO_LEN);
         }
 
 #ifdef CONFIG_MTRR
@@ -1020,8 +1027,7 @@
 	map_cpu_to_boot_apicid(0, boot_cpu_apicid);
 
 	global_irq_holder = 0;
-	current->processor = 0;
-	init_idle();
+	current->cpu = 0;
 	smp_tune_scheduling();
 
 	/*
diff -Nru linux/arch/i386/kernel/traps.c linux-2.4.19-pre5-mjc/arch/i386/kernel/traps.c
--- linux/arch/i386/kernel/traps.c	Sun Sep 30 15:26:08 2001
+++ linux-2.4.19-pre5-mjc/arch/i386/kernel/traps.c	Sat Apr  6 08:35:14 2002
@@ -237,13 +237,63 @@
 	printk("\n");
 }	
 
+static void handle_BUG(struct pt_regs *regs)
+{
+	unsigned short ud2;
+	unsigned short line;
+	char *file;
+	char c;
+	unsigned long eip;
+
+	if (regs->xcs & 3)
+		goto no_bug;		/* Not in kernel */
+
+	eip = regs->eip;
+
+	if (eip < PAGE_OFFSET)
+		goto no_bug;
+	if (__get_user(ud2, (unsigned short *)eip))
+		goto no_bug;
+	if (ud2 != 0x0b0f)
+		goto no_bug;
+	if (__get_user(line, (unsigned short *)(eip + 2)))
+		goto bug;
+	if (__get_user(file, (char **)(eip + 4)) ||
+		(unsigned long)file < PAGE_OFFSET || __get_user(c, file))
+		file = "<bad filename>";
+
+	printk("kernel BUG at %s:%d!\n", file, line);
+
+no_bug:
+	return;
+
+	/* Here we know it was a BUG but file-n-line is unavailable */
+bug:
+	printk("Kernel BUG\n");
+}
+
 spinlock_t die_lock = SPIN_LOCK_UNLOCKED;
 
 void die(const char * str, struct pt_regs * regs, long err)
 {
+#ifdef CONFIG_PNPBIOS		
+	if (regs->xcs == 0x60 || regs->xcs == 0x68)
+	{
+		extern u32 pnp_bios_fault_eip, pnp_bios_fault_esp;
+		extern u32 pnp_bios_is_utter_crap;
+		pnp_bios_is_utter_crap = 1;
+		printk(KERN_CRIT "PNPBIOS fault.. attempting recovery.\n");
+		__asm__ volatile(
+			"movl %0, %%esp\n\t"
+			"jmp %1\n\t"
+			: "=a" (pnp_bios_fault_esp), "=b" (pnp_bios_fault_eip));
+		panic("do_trap: can't hit this");
+	}
+#endif	
 	console_verbose();
 	spin_lock_irq(&die_lock);
 	bust_spinlocks(1);
+	handle_BUG(regs);
 	printk("%s: %04lx\n", str, err & 0xffff);
 	show_registers(regs);
 	bust_spinlocks(0);
@@ -269,8 +319,13 @@
 static void inline do_trap(int trapnr, int signr, char *str, int vm86,
 			   struct pt_regs * regs, long error_code, siginfo_t *info)
 {
-	if (vm86 && regs->eflags & VM_MASK)
-		goto vm86_trap;
+	if (regs->eflags & VM_MASK) {
+		if (vm86)
+			goto vm86_trap;
+		else
+			goto trap_signal;
+	}
+
 	if (!(regs->xcs & 3))
 		goto kernel_trap;
 
@@ -478,10 +533,15 @@
 {
 	unsigned int condition;
 	struct task_struct *tsk = current;
+	unsigned long eip = regs->eip;
 	siginfo_t info;
 
 	__asm__ __volatile__("movl %%db6,%0" : "=r" (condition));
 
+	/* If the user set TF, it's simplest to clear it right away. */
+	if ((eip >=PAGE_OFFSET) && (regs->eflags & TF_MASK))
+		goto clear_TF;
+
 	/* Mask out spurious debug traps due to lazy DR7 setting */
 	if (condition & (DR_TRAP0|DR_TRAP1|DR_TRAP2|DR_TRAP3)) {
 		if (!tsk->thread.debugreg[7])
@@ -505,6 +565,8 @@
 		 * allowing programs to debug themselves without the ptrace()
 		 * interface.
 		 */
+		if ((regs->xcs & 3) == 0)
+			goto clear_TF;
 		if ((tsk->ptrace & (PT_DTRACE|PT_PTRACED)) == PT_DTRACE)
 			goto clear_TF;
 	}
@@ -694,6 +756,8 @@
  *
  * Careful.. There are problems with IBM-designed IRQ13 behaviour.
  * Don't touch unless you *really* know how it works.
+ *
+ * Must be called with kernel preemption disabled.
  */
 asmlinkage void math_state_restore(struct pt_regs regs)
 {
@@ -918,6 +982,10 @@
 #ifdef CONFIG_EISA
 	if (isa_readl(0x0FFFD9) == 'E'+('I'<<8)+('S'<<16)+('A'<<24))
 		EISA_bus = 1;
+#endif
+
+#ifdef CONFIG_X86_LOCAL_APIC
+	init_apic_mappings();
 #endif
 
 	set_trap_gate(0,&divide_error);
diff -Nru linux/arch/i386/kernel/vm86.c linux-2.4.19-pre5-mjc/arch/i386/kernel/vm86.c
--- linux/arch/i386/kernel/vm86.c	Mon Feb 25 14:37:53 2002
+++ linux-2.4.19-pre5-mjc/arch/i386/kernel/vm86.c	Sat Apr  6 08:29:59 2002
@@ -3,6 +3,13 @@
  *
  *  Copyright (C) 1994  Linus Torvalds
  */
+
+/*
+ *  Bugfixes Copyright 2002 by Manfred Spraul and
+ *  Kasper Dupont <kasperd@daimi.au.dk>
+ *
+ */
+
 #include <linux/errno.h>
 #include <linux/sched.h>
 #include <linux/kernel.h>
@@ -290,12 +297,25 @@
 	regs->eflags &= ~TF_MASK;
 }
 
+/* It is correct to call set_IF(regs) from the set_vflags_*
+ * functions. However someone forgot to call clear_IF(regs)
+ * in the opposite case.
+ * After the command sequence CLI PUSHF STI POPF you should
+ * end up with interrups disabled, but you ended up with
+ * interrupts enabled.
+ *  ( I was testing my own changes, but the only bug I
+ *    could find was in a function I had not changed. )
+ * [KD]
+ */
+
 static inline void set_vflags_long(unsigned long eflags, struct kernel_vm86_regs * regs)
 {
 	set_flags(VEFLAGS, eflags, current->thread.v86mask);
 	set_flags(regs->eflags, eflags, SAFE_MASK);
 	if (eflags & IF_MASK)
 		set_IF(regs);
+	else
+		clear_IF(regs);
 }
 
 static inline void set_vflags_short(unsigned short flags, struct kernel_vm86_regs * regs)
@@ -304,6 +324,8 @@
 	set_flags(regs->eflags, flags, SAFE_MASK);
 	if (flags & IF_MASK)
 		set_IF(regs);
+	else
+		clear_IF(regs);
 }
 
 static inline unsigned long get_vflags(struct kernel_vm86_regs * regs)
@@ -327,75 +349,184 @@
  * Boy are these ugly, but we need to do the correct 16-bit arithmetic.
  * Gcc makes a mess of it, so we do it inline and use non-obvious calling
  * conventions..
+ * FIXME: is VM86_UNKNOWN really the correct return code? [MS??]
+ * No that wasn't correct, it depends on the context, so lets
+ * make it an argument to the macro. [KD]
+ */
+#define pushb(base, ptr, val, regs, errcode) \
+	do { \
+		int err; \
+		__asm__ __volatile__(				\
+			"decw %w0\n\t"				\
+			"1: movb %3,0(%2,%0)\n\t"		\
+			"xor %1,%1\n\t"				\
+			"2:\n"					\
+			".section .fixup,\"ax\"\n\t"		\
+			"3:	movl $1,%1\n\t"			\
+			"	jmp 2b\n\t"			\
+			".previous\n"				\
+			".section __ex_table,\"a\"\n"		\
+			"	.align 4\n"			\
+			"	.long 1b,3b\n"			\
+			".previous"				\
+			: "=r" (ptr), "=r" (err)		\
+			: "r" (base), "q" (val), "0" (ptr));	\
+		if (err) \
+			return_to_32bit(regs, errcode); \
+	} while(0)
+
+#define pushw(base, ptr, val, regs, errcode) \
+	do { \
+		int err; \
+		__asm__ __volatile__(				\
+			"decw %w0\n\t"				\
+			"1: movb %h3,0(%2,%0)\n\t"		\
+			"decw %w0\n\t"				\
+			"2: movb %b3,0(%2,%0)\n\t"		\
+			"xor %1,%1\n\t"				\
+			"3:\n"					\
+			".section .fixup,\"ax\"\n\t"		\
+			"4:	movl $1,%1\n\t"			\
+			"	jmp 3b\n\t"			\
+			".previous\n"				\
+			".section __ex_table,\"a\"\n"		\
+			"	.align 4\n"			\
+			"	.long 1b,4b\n"			\
+			"	.long 2b,4b\n"			\
+			".previous"				\
+			: "=r" (ptr), "=r" (err)		\
+			: "r" (base), "q" (val), "0" (ptr));	\
+		if (err) \
+			return_to_32bit(regs, errcode); \
+	} while(0)
+
+#define pushl(base, ptr, val, regs, errcode) \
+	do { \
+		int err; \
+		__asm__ __volatile__(				\
+			"decw %w0\n\t"				\
+			"rorl $16,%3\n\t"			\
+			"1: movb %h3,0(%2,%0)\n\t"		\
+			"decw %w0\n\t"				\
+			"2: movb %b3,0(%2,%0)\n\t"		\
+			"decw %w0\n\t"				\
+			"rorl $16,%3\n\t"			\
+			"3: movb %h3,0(%2,%0)\n\t"		\
+			"decw %w0\n\t"				\
+			"4: movb %b3,0(%2,%0)\n\t"		\
+			"xor %1,%1\n\t"				\
+			"5:\n"					\
+			".section .fixup,\"ax\"\n\t"		\
+			"6:	movl $1,%1\n\t"			\
+			"	jmp 5b\n\t"			\
+			".previous\n"				\
+			".section __ex_table,\"a\"\n"		\
+			"	.align 4\n"			\
+			"	.long 1b,6b\n"			\
+			"	.long 2b,6b\n"			\
+			"	.long 3b,6b\n"			\
+			"	.long 4b,6b\n"			\
+			".previous"				\
+			: "=r" (ptr), "=r" (err)		\
+			: "r" (base), "q" (val), "0" (ptr));	\
+		if (err) \
+			return_to_32bit(regs, errcode); \
+	} while(0)
+
+#define popb(base, ptr, regs, errcode) \
+	({ \
+	 	unsigned long __res; \
+	 	unsigned int err; \
+		__asm__ __volatile__( \
+			"1:movb 0(%1,%0),%b2\n\t"		\
+			"incw %w0\n\t"				\
+			"xor %3,%3\n\t"				\
+			"2:\n"					\
+			".section .fixup,\"ax\"\n\t"		\
+			"3:	movl $1,%1\n\t"			\
+			"	jmp 2b\n\t"			\
+			".previous\n"				\
+			".section __ex_table,\"a\"\n"		\
+			"	.align 4\n"			\
+			"	.long 1b,3b\n"			\
+			".previous"				\
+			: "=r" (ptr), "=r" (base), "=q" (__res), \
+				"=r" (err) \
+			: "0" (ptr), "1" (base), "2" (0)); \
+		if (err) \
+			return_to_32bit(regs, errcode); \
+		__res; \
+	})
+
+#define popw(base, ptr, regs, errcode) \
+	({ \
+	 	unsigned long __res; \
+	 	unsigned int err; \
+		__asm__ __volatile__( \
+			"1:movb 0(%1,%0),%b2\n\t"		\
+			"incw %w0\n\t"				\
+			"2:movb 0(%1,%0),%h2\n\t"		\
+			"incw %w0\n\t"				\
+			"xor %3,%3\n\t"				\
+			"3:\n"					\
+			".section .fixup,\"ax\"\n\t"		\
+			"4:	movl $1,%1\n\t"			\
+			"	jmp 3b\n\t"			\
+			".previous\n"				\
+			".section __ex_table,\"a\"\n"		\
+			"	.align 4\n"			\
+			"	.long 1b,4b\n"			\
+			"	.long 2b,4b\n"			\
+			".previous"				\
+			: "=r" (ptr), "=r" (base), "=q" (__res), \
+				"=r" (err) \
+			: "0" (ptr), "1" (base), "2" (0)); \
+		if (err) \
+			return_to_32bit(regs, errcode); \
+		__res; \
+	})
+
+#define popl(base, ptr, regs, errcode) \
+	({ \
+	 	unsigned long __res; \
+	 	unsigned int err; \
+		__asm__ __volatile__( \
+			"1:movb 0(%1,%0),%b2\n\t"		\
+			"incw %w0\n\t"				\
+			"2:movb 0(%1,%0),%h2\n\t"		\
+			"incw %w0\n\t"				\
+			"rorl $16,%2\n\t"			\
+			"3:movb 0(%1,%0),%b2\n\t"		\
+			"incw %w0\n\t"				\
+			"4:movb 0(%1,%0),%h2\n\t"		\
+			"incw %w0\n\t"				\
+			"rorl $16,%2\n\t"			\
+			"xor %3,%3\n\t"				\
+			"5:\n"					\
+			".section .fixup,\"ax\"\n\t"		\
+			"6:	movl $1,%1\n\t"			\
+			"	jmp 5b\n\t"			\
+			".previous\n"				\
+			".section __ex_table,\"a\"\n"		\
+			"	.align 4\n"			\
+			"	.long 1b,6b\n"			\
+			"	.long 2b,6b\n"			\
+			"	.long 3b,6b\n"			\
+			"	.long 4b,6b\n"			\
+			".previous"				\
+			: "=r" (ptr), "=r" (base), "=q" (__res), \
+				"=r" (err) \
+			: "0" (ptr), "1" (base), "2" (0)); \
+		if (err) \
+			return_to_32bit(regs, errcode); \
+		__res; \
+	})
+
+/* There are so many possible reasons for this function to return
+ * VM86_INTx, so adding another doesn't bother me. We can expect
+ * userspace programs to be able to handle it. (Getting a problem
+ * in userspace is always better than an Oops anyway.) [KD]
  */
-#define pushb(base, ptr, val) \
-__asm__ __volatile__( \
-	"decw %w0\n\t" \
-	"movb %2,0(%1,%0)" \
-	: "=r" (ptr) \
-	: "r" (base), "q" (val), "0" (ptr))
-
-#define pushw(base, ptr, val) \
-__asm__ __volatile__( \
-	"decw %w0\n\t" \
-	"movb %h2,0(%1,%0)\n\t" \
-	"decw %w0\n\t" \
-	"movb %b2,0(%1,%0)" \
-	: "=r" (ptr) \
-	: "r" (base), "q" (val), "0" (ptr))
-
-#define pushl(base, ptr, val) \
-__asm__ __volatile__( \
-	"decw %w0\n\t" \
-	"rorl $16,%2\n\t" \
-	"movb %h2,0(%1,%0)\n\t" \
-	"decw %w0\n\t" \
-	"movb %b2,0(%1,%0)\n\t" \
-	"decw %w0\n\t" \
-	"rorl $16,%2\n\t" \
-	"movb %h2,0(%1,%0)\n\t" \
-	"decw %w0\n\t" \
-	"movb %b2,0(%1,%0)" \
-	: "=r" (ptr) \
-	: "r" (base), "q" (val), "0" (ptr))
-
-#define popb(base, ptr) \
-({ unsigned long __res; \
-__asm__ __volatile__( \
-	"movb 0(%1,%0),%b2\n\t" \
-	"incw %w0" \
-	: "=r" (ptr), "=r" (base), "=q" (__res) \
-	: "0" (ptr), "1" (base), "2" (0)); \
-__res; })
-
-#define popw(base, ptr) \
-({ unsigned long __res; \
-__asm__ __volatile__( \
-	"movb 0(%1,%0),%b2\n\t" \
-	"incw %w0\n\t" \
-	"movb 0(%1,%0),%h2\n\t" \
-	"incw %w0" \
-	: "=r" (ptr), "=r" (base), "=q" (__res) \
-	: "0" (ptr), "1" (base), "2" (0)); \
-__res; })
-
-#define popl(base, ptr) \
-({ unsigned long __res; \
-__asm__ __volatile__( \
-	"movb 0(%1,%0),%b2\n\t" \
-	"incw %w0\n\t" \
-	"movb 0(%1,%0),%h2\n\t" \
-	"incw %w0\n\t" \
-	"rorl $16,%2\n\t" \
-	"movb 0(%1,%0),%b2\n\t" \
-	"incw %w0\n\t" \
-	"movb 0(%1,%0),%h2\n\t" \
-	"incw %w0\n\t" \
-	"rorl $16,%2" \
-	: "=r" (ptr), "=r" (base), "=q" (__res) \
-	: "0" (ptr), "1" (base)); \
-__res; })
-
 static void do_int(struct kernel_vm86_regs *regs, int i, unsigned char * ssp, unsigned long sp)
 {
 	unsigned long *intr_ptr, segoffs;
@@ -411,9 +542,9 @@
 		goto cannot_handle;
 	if ((segoffs >> 16) == BIOSSEG)
 		goto cannot_handle;
-	pushw(ssp, sp, get_vflags(regs));
-	pushw(ssp, sp, regs->cs);
-	pushw(ssp, sp, IP(regs));
+	pushw(ssp, sp, get_vflags(regs), regs, VM86_INTx + (i << 8));
+	pushw(ssp, sp, regs->cs, regs, VM86_INTx + (i << 8));
+	pushw(ssp, sp, IP(regs), regs, VM86_INTx + (i << 8));
 	regs->cs = segoffs >> 16;
 	SP(regs) -= 6;
 	IP(regs) = segoffs & 0xffff;
@@ -448,6 +579,22 @@
 	return 0;
 }
 
+/* I guess the most consistent with other stack access like
+ * PUSH AX and similar would be a SIGSEGV, but I really don't
+ * like that so I will just stick to Manfred's solution with
+ * a return code. The SIGSEGV would be harder to implement
+ * here, and also more difficult for userspace code to handle.
+ * I would prefer a new return code, but in order not to mess
+ * up unsuspecting applications I will not invent a new code
+ * yet. Either way we get the problem moved from kernel space
+ * to user space, which is one step in the right direction.
+ * Some existing user space code might even be ready to deal
+ * with VM86_UNKNOWN, since handle_vm86_fault can return that
+ * for so many other reasons as well. I have also fixed the
+ * problem with incorrect IP by moving the increment after the
+ * actual execution of the instruction. [KD]
+ */
+#define VM86_SIGSEGV VM86_UNKNOWN
 void handle_vm86_fault(struct kernel_vm86_regs * regs, long error_code)
 {
 	unsigned char *csp, *ssp;
@@ -455,7 +602,7 @@
 
 #define CHECK_IF_IN_TRAP \
 	if (VMPI.vm86dbg_active && VMPI.vm86dbg_TFpendig) \
-		pushw(ssp,sp,popw(ssp,sp) | TF_MASK);
+		pushw(ssp,sp,popw(ssp,sp, regs, VM86_SIGSEGV) | TF_MASK, regs, VM86_SIGSEGV);
 #define VM86_FAULT_RETURN \
 	if (VMPI.force_return_for_pic  && (VEFLAGS & (IF_MASK | VIF_MASK))) \
 		return_to_32bit(regs, VM86_PICRETURN); \
@@ -466,35 +613,43 @@
 	sp = SP(regs);
 	ip = IP(regs);
 
-	switch (popb(csp, ip)) {
+	switch (popb(csp, ip, regs, VM86_SIGSEGV)) {
 
 	/* operand size override */
 	case 0x66:
-		switch (popb(csp, ip)) {
+		switch (popb(csp, ip, regs, VM86_SIGSEGV)) {
 
 		/* pushfd */
 		case 0x9c:
+			pushl(ssp, sp, get_vflags(regs), regs, VM86_SIGSEGV);
 			SP(regs) -= 4;
 			IP(regs) += 2;
-			pushl(ssp, sp, get_vflags(regs));
 			VM86_FAULT_RETURN;
 
 		/* popfd */
 		case 0x9d:
+			{
+			unsigned long newflags=popl(ssp, sp, regs, VM86_SIGSEGV);
 			SP(regs) += 4;
 			IP(regs) += 2;
 			CHECK_IF_IN_TRAP
-			set_vflags_long(popl(ssp, sp), regs);
+			set_vflags_long(newflags, regs);
 			VM86_FAULT_RETURN;
+			}
 
 		/* iretd */
 		case 0xcf:
+			{
+			unsigned long newip=popl(ssp, sp, regs, VM86_SIGSEGV);
+			unsigned long newcs=popl(ssp, sp, regs, VM86_SIGSEGV);
+			unsigned long newflags=popl(ssp, sp, regs, VM86_SIGSEGV);
 			SP(regs) += 12;
-			IP(regs) = (unsigned short)popl(ssp, sp);
-			regs->cs = (unsigned short)popl(ssp, sp);
+			IP(regs) = (unsigned short)newip;
+			regs->cs = (unsigned short)newcs;
 			CHECK_IF_IN_TRAP
-			set_vflags_long(popl(ssp, sp), regs);
+			set_vflags_long(newflags, regs);
 			VM86_FAULT_RETURN;
+			}
 		/* need this to avoid a fallthrough */
 		default:
 			return_to_32bit(regs, VM86_UNKNOWN);
@@ -502,22 +657,25 @@
 
 	/* pushf */
 	case 0x9c:
+		pushw(ssp, sp, get_vflags(regs), regs, VM86_SIGSEGV);
 		SP(regs) -= 2;
 		IP(regs)++;
-		pushw(ssp, sp, get_vflags(regs));
 		VM86_FAULT_RETURN;
 
 	/* popf */
 	case 0x9d:
+		{
+		unsigned short newflags=popw(ssp, sp, regs, VM86_SIGSEGV);
 		SP(regs) += 2;
 		IP(regs)++;
 		CHECK_IF_IN_TRAP
-		set_vflags_short(popw(ssp, sp), regs);
+		set_vflags_short(newflags, regs);
 		VM86_FAULT_RETURN;
+		}
 
 	/* int xx */
 	case 0xcd: {
-	        int intno=popb(csp, ip);
+	        int intno=popb(csp, ip, regs, VM86_SIGSEGV);
 		IP(regs) += 2;
 		if (VMPI.vm86dbg_active) {
 			if ( (1 << (intno &7)) & VMPI.vm86dbg_intxxtab[intno >> 3] )
@@ -529,12 +687,17 @@
 
 	/* iret */
 	case 0xcf:
+		{
+		unsigned short newip=popw(ssp, sp, regs, VM86_SIGSEGV);
+		unsigned short newcs=popw(ssp, sp, regs, VM86_SIGSEGV);
+		unsigned short newflags=popw(ssp, sp, regs, VM86_SIGSEGV);
 		SP(regs) += 6;
-		IP(regs) = popw(ssp, sp);
-		regs->cs = popw(ssp, sp);
+		IP(regs) = newip;
+		regs->cs = newcs;
 		CHECK_IF_IN_TRAP
-		set_vflags_short(popw(ssp, sp), regs);
+		set_vflags_short(newflags, regs);
 		VM86_FAULT_RETURN;
+		}
 
 	/* cli */
 	case 0xfa:
diff -Nru linux/arch/i386/lib/dec_and_lock.c linux-2.4.19-pre5-mjc/arch/i386/lib/dec_and_lock.c
--- linux/arch/i386/lib/dec_and_lock.c	Fri Jul  7 21:20:16 2000
+++ linux-2.4.19-pre5-mjc/arch/i386/lib/dec_and_lock.c	Sat Apr  6 08:35:14 2002
@@ -8,6 +8,7 @@
  */
 
 #include <linux/spinlock.h>
+#include <linux/sched.h>
 #include <asm/atomic.h>
 
 int atomic_dec_and_lock(atomic_t *atomic, spinlock_t *lock)
diff -Nru linux/arch/i386/lib/mmx.c linux-2.4.19-pre5-mjc/arch/i386/lib/mmx.c
--- linux/arch/i386/lib/mmx.c	Tue May 22 13:23:16 2001
+++ linux-2.4.19-pre5-mjc/arch/i386/lib/mmx.c	Sat Apr  6 08:29:59 2002
@@ -57,7 +57,7 @@
 		: : "r" (from) );
 		
 	
-	for(; i>0; i--)
+	for(; i>5; i--)
 	{
 		__asm__ __volatile__ (
 		"1:  prefetch 320(%0)\n"
@@ -85,6 +85,30 @@
 		"	.align 4\n"
 		"	.long 1b, 3b\n"
 		".previous"
+		: : "r" (from), "r" (to) : "memory");
+		from+=64;
+		to+=64;
+	}
+
+	for(; i>0; i--)
+	{
+		__asm__ __volatile__ (
+		"  movq (%0), %%mm0\n"
+		"  movq 8(%0), %%mm1\n"
+		"  movq 16(%0), %%mm2\n"
+		"  movq 24(%0), %%mm3\n"
+		"  movq %%mm0, (%1)\n"
+		"  movq %%mm1, 8(%1)\n"
+		"  movq %%mm2, 16(%1)\n"
+		"  movq %%mm3, 24(%1)\n"
+		"  movq 32(%0), %%mm0\n"
+		"  movq 40(%0), %%mm1\n"
+		"  movq 48(%0), %%mm2\n"
+		"  movq 56(%0), %%mm3\n"
+		"  movq %%mm0, 32(%1)\n"
+		"  movq %%mm1, 40(%1)\n"
+		"  movq %%mm2, 48(%1)\n"
+		"  movq %%mm3, 56(%1)\n"
 		: : "r" (from), "r" (to) : "memory");
 		from+=64;
 		to+=64;
diff -Nru linux/arch/i386/math-emu/reg_add_sub.c linux-2.4.19-pre5-mjc/arch/i386/math-emu/reg_add_sub.c
--- linux/arch/i386/math-emu/reg_add_sub.c	Tue Dec  9 20:57:09 1997
+++ linux-2.4.19-pre5-mjc/arch/i386/math-emu/reg_add_sub.c	Sat Apr  6 08:25:59 2002
@@ -140,7 +140,7 @@
   FPU_REG const *a, *b;
   FPU_REG *dest;
   u_char taga, tagb, signa, signb, saved_sign, sign;
-  int diff, tag, expa, expb, deststnr;
+  int diff, tag = 0, expa, expb, deststnr;
 
   a = &st(0);
   taga = FPU_gettag0();
diff -Nru linux/arch/i386/math-emu/reg_compare.c linux-2.4.19-pre5-mjc/arch/i386/math-emu/reg_compare.c
--- linux/arch/i386/math-emu/reg_compare.c	Fri Apr  6 13:42:47 2001
+++ linux-2.4.19-pre5-mjc/arch/i386/math-emu/reg_compare.c	Sat Apr  6 08:25:59 2002
@@ -174,7 +174,7 @@
 /* This function requires that st(0) is not empty */
 int FPU_compare_st_data(FPU_REG const *loaded_data, u_char loaded_tag)
 {
-  int f, c;
+  int f = 0, c;
 
   c = compare(loaded_data, loaded_tag);
 
@@ -216,7 +216,7 @@
 
 static int compare_st_st(int nr)
 {
-  int f, c;
+  int f = 0, c;
   FPU_REG *st_ptr;
 
   if ( !NOT_EMPTY(0) || !NOT_EMPTY(nr) )
@@ -268,7 +268,7 @@
 
 static int compare_u_st_st(int nr)
 {
-  int f, c;
+  int f = 0, c;
   FPU_REG *st_ptr;
 
   if ( !NOT_EMPTY(0) || !NOT_EMPTY(nr) )
diff -Nru linux/arch/i386/math-emu/reg_divide.c linux-2.4.19-pre5-mjc/arch/i386/math-emu/reg_divide.c
--- linux/arch/i386/math-emu/reg_divide.c	Fri Apr  6 13:42:47 2001
+++ linux-2.4.19-pre5-mjc/arch/i386/math-emu/reg_divide.c	Sat Apr  6 08:25:59 2002
@@ -203,4 +203,5 @@
     }
 #endif /* PARANOID */ 
 
+	return 0;
 }
diff -Nru linux/arch/i386/math-emu/reg_ld_str.c linux-2.4.19-pre5-mjc/arch/i386/math-emu/reg_ld_str.c
--- linux/arch/i386/math-emu/reg_ld_str.c	Fri Apr  6 13:42:47 2001
+++ linux-2.4.19-pre5-mjc/arch/i386/math-emu/reg_ld_str.c	Sat Apr  6 08:25:59 2002
@@ -632,7 +632,7 @@
 /* Put a float into user memory */
 int FPU_store_single(FPU_REG *st0_ptr, u_char st0_tag, float *single)
 {
-  long templ;
+  long templ = 0;
   unsigned long increment = 0;     	/* avoid gcc warnings */
   int precision_loss;
   int exp;
diff -Nru linux/arch/i386/math-emu/reg_mul.c linux-2.4.19-pre5-mjc/arch/i386/math-emu/reg_mul.c
--- linux/arch/i386/math-emu/reg_mul.c	Fri Apr  6 13:42:47 2001
+++ linux-2.4.19-pre5-mjc/arch/i386/math-emu/reg_mul.c	Sat Apr  6 08:25:59 2002
@@ -128,4 +128,5 @@
     }
 #endif /* PARANOID */ 
 
+	return 0;
 }
diff -Nru linux/arch/i386/mm/fault.c linux-2.4.19-pre5-mjc/arch/i386/mm/fault.c
--- linux/arch/i386/mm/fault.c	Mon Feb 25 14:37:53 2002
+++ linux-2.4.19-pre5-mjc/arch/i386/mm/fault.c	Sat Apr  6 08:29:59 2002
@@ -86,8 +86,7 @@
 
 out_of_memory:
 	if (current->pid == 1) {
-		current->policy |= SCHED_YIELD;
-		schedule();
+		yield();
 		goto survive;
 	}
 	goto bad_area;
@@ -125,12 +124,6 @@
 	}
 }
 
-void do_BUG(const char *file, int line)
-{
-	bust_spinlocks(1);
-	printk("kernel BUG at %s:%d!\n", file, line);
-}
-
 asmlinkage void do_invalid_op(struct pt_regs *, unsigned long);
 extern unsigned long idt;
 
@@ -342,8 +335,7 @@
 out_of_memory:
 	up_read(&mm->mmap_sem);
 	if (tsk->pid == 1) {
-		tsk->policy |= SCHED_YIELD;
-		schedule();
+		yield();
 		down_read(&mm->mmap_sem);
 		goto survive;
 	}
diff -Nru linux/arch/i386/mm/init.c linux-2.4.19-pre5-mjc/arch/i386/mm/init.c
--- linux/arch/i386/mm/init.c	Fri Dec 21 12:41:53 2001
+++ linux-2.4.19-pre5-mjc/arch/i386/mm/init.c	Sat Apr  6 08:25:59 2002
@@ -128,7 +128,6 @@
 static inline void set_pte_phys (unsigned long vaddr,
 			unsigned long phys, pgprot_t flags)
 {
-	pgprot_t prot;
 	pgd_t *pgd;
 	pmd_t *pmd;
 	pte_t *pte;
@@ -144,10 +143,8 @@
 		return;
 	}
 	pte = pte_offset(pmd, vaddr);
-	if (pte_val(*pte))
-		pte_ERROR(*pte);
-	pgprot_val(prot) = pgprot_val(PAGE_KERNEL) | pgprot_val(flags);
-	set_pte(pte, mk_pte_phys(phys, prot));
+	/* <phys,flags> stored as-is, to permit clearing entries */
+	set_pte(pte, mk_pte_phys(phys, flags));
 
 	/*
 	 * It's enough to flush this one mapping.
@@ -462,8 +459,9 @@
 #ifdef CONFIG_HIGHMEM
 	highmem_start_page = mem_map + highstart_pfn;
 	max_mapnr = num_physpages = highend_pfn;
+	num_mappedpages = max_low_pfn;
 #else
-	max_mapnr = num_physpages = max_low_pfn;
+	max_mapnr = num_mappedpages = num_physpages = max_low_pfn;
 #endif
 	high_memory = (void *) __va(max_low_pfn * PAGE_SIZE);
 
@@ -505,7 +503,7 @@
 	datasize =  (unsigned long) &_edata - (unsigned long) &_etext;
 	initsize =  (unsigned long) &__init_end - (unsigned long) &__init_begin;
 
-	printk("Memory: %luk/%luk available (%dk kernel code, %dk reserved, %dk data, %dk init, %ldk highmem)\n",
+	printk(KERN_INFO "Memory: %luk/%luk available (%dk kernel code, %dk reserved, %dk data, %dk init, %ldk highmem)\n",
 		(unsigned long) nr_free_pages() << (PAGE_SHIFT-10),
 		max_mapnr << (PAGE_SHIFT-10),
 		codesize >> 10,
@@ -569,14 +567,14 @@
 		free_page(addr);
 		totalram_pages++;
 	}
-	printk ("Freeing unused kernel memory: %dk freed\n", (&__init_end - &__init_begin) >> 10);
+	printk (KERN_INFO "Freeing unused kernel memory: %dk freed\n", (&__init_end - &__init_begin) >> 10);
 }
 
 #ifdef CONFIG_BLK_DEV_INITRD
 void free_initrd_mem(unsigned long start, unsigned long end)
 {
 	if (start < end)
-		printk ("Freeing initrd memory: %ldk freed\n", (end - start) >> 10);
+		printk (KERN_INFO "Freeing initrd memory: %ldk freed\n", (end - start) >> 10);
 	for (; start < end; start += PAGE_SIZE) {
 		ClearPageReserved(virt_to_page(start));
 		set_page_count(virt_to_page(start), 1);
diff -Nru linux/arch/i386/mm/ioremap.c linux-2.4.19-pre5-mjc/arch/i386/mm/ioremap.c
--- linux/arch/i386/mm/ioremap.c	Tue Mar 20 11:13:33 2001
+++ linux-2.4.19-pre5-mjc/arch/i386/mm/ioremap.c	Sat Apr  6 08:25:59 2002
@@ -161,3 +161,68 @@
 	if (addr > high_memory)
 		return vfree((void *) (PAGE_MASK & (unsigned long) addr));
 }
+
+void __init *bt_ioremap(unsigned long phys_addr, unsigned long size)
+{
+	unsigned long offset, last_addr;
+	unsigned int nrpages;
+	enum fixed_addresses idx;
+
+	/* Don't allow wraparound or zero size */
+	last_addr = phys_addr + size - 1;
+	if (!size || last_addr < phys_addr)
+		return NULL;
+
+	/*
+	 * Don't remap the low PCI/ISA area, it's always mapped..
+	 */
+	if (phys_addr >= 0xA0000 && last_addr < 0x100000)
+		return phys_to_virt(phys_addr);
+
+	/*
+	 * Mappings have to be page-aligned
+	 */
+	offset = phys_addr & ~PAGE_MASK;
+	phys_addr &= PAGE_MASK;
+	size = PAGE_ALIGN(last_addr) - phys_addr;
+
+	/*
+	 * Mappings have to fit in the FIX_BTMAP area.
+	 */
+	nrpages = size >> PAGE_SHIFT;
+	if (nrpages > NR_FIX_BTMAPS)
+		return NULL;
+
+	/*
+	 * Ok, go for it..
+	 */
+	idx = FIX_BTMAP_BEGIN;
+	while (nrpages > 0) {
+		set_fixmap(idx, phys_addr);
+		phys_addr += PAGE_SIZE;
+		--idx;
+		--nrpages;
+	}
+	return (void*) (offset + fix_to_virt(FIX_BTMAP_BEGIN));
+}
+
+void __init bt_iounmap(void *addr, unsigned long size)
+{
+	unsigned long virt_addr;
+	unsigned long offset;
+	unsigned int nrpages;
+	enum fixed_addresses idx;
+
+	virt_addr = (unsigned long)addr;
+	if (virt_addr < fix_to_virt(FIX_BTMAP_BEGIN))
+		return;
+	offset = virt_addr & ~PAGE_MASK;
+	nrpages = PAGE_ALIGN(offset + size - 1) >> PAGE_SHIFT;
+
+	idx = FIX_BTMAP_BEGIN;
+	while (nrpages > 0) {
+		__set_fixmap(idx, 0, __pgprot(0));
+		--idx;
+		--nrpages;
+	}
+}
diff -Nru linux/arch/i386/vmlinux.lds linux-2.4.19-pre5-mjc/arch/i386/vmlinux.lds
--- linux/arch/i386/vmlinux.lds	Mon Feb 25 14:37:53 2002
+++ linux-2.4.19-pre5-mjc/arch/i386/vmlinux.lds	Wed Dec 31 19:00:00 1969
@@ -1,82 +0,0 @@
-/* ld script to make i386 Linux kernel
- * Written by Martin Mares <mj@atrey.karlin.mff.cuni.cz>;
- */
-OUTPUT_FORMAT("elf32-i386", "elf32-i386", "elf32-i386")
-OUTPUT_ARCH(i386)
-ENTRY(_start)
-SECTIONS
-{
-  . = 0xC0000000 + 0x100000;
-  _text = .;			/* Text and read-only data */
-  .text : {
-	*(.text)
-	*(.fixup)
-	*(.gnu.warning)
-	} = 0x9090
-
-  _etext = .;			/* End of text section */
-
-  .rodata : { *(.rodata) *(.rodata.*) }
-  .kstrtab : { *(.kstrtab) }
-
-  . = ALIGN(16);		/* Exception table */
-  __start___ex_table = .;
-  __ex_table : { *(__ex_table) }
-  __stop___ex_table = .;
-
-  __start___ksymtab = .;	/* Kernel symbol table */
-  __ksymtab : { *(__ksymtab) }
-  __stop___ksymtab = .;
-
-  .data : {			/* Data */
-	*(.data)
-	CONSTRUCTORS
-	}
-
-  _edata = .;			/* End of data section */
-
-  . = ALIGN(8192);		/* init_task */
-  .data.init_task : { *(.data.init_task) }
-
-  . = ALIGN(4096);		/* Init code and data */
-  __init_begin = .;
-  .text.init : { *(.text.init) }
-  .data.init : { *(.data.init) }
-  . = ALIGN(16);
-  __setup_start = .;
-  .setup.init : { *(.setup.init) }
-  __setup_end = .;
-  __initcall_start = .;
-  .initcall.init : { *(.initcall.init) }
-  __initcall_end = .;
-  . = ALIGN(4096);
-  __init_end = .;
-
-  . = ALIGN(4096);
-  .data.page_aligned : { *(.data.idt) }
-
-  . = ALIGN(32);
-  .data.cacheline_aligned : { *(.data.cacheline_aligned) }
-
-  __bss_start = .;		/* BSS */
-  .bss : {
-	*(.bss)
-	}
-  _end = . ;
-
-  /* Sections to be discarded */
-  /DISCARD/ : {
-	*(.text.exit)
-	*(.data.exit)
-	*(.exitcall.exit)
-	}
-
-  /* Stabs debugging sections.  */
-  .stab 0 : { *(.stab) }
-  .stabstr 0 : { *(.stabstr) }
-  .stab.excl 0 : { *(.stab.excl) }
-  .stab.exclstr 0 : { *(.stab.exclstr) }
-  .stab.index 0 : { *(.stab.index) }
-  .stab.indexstr 0 : { *(.stab.indexstr) }
-  .comment 0 : { *(.comment) }
-}
diff -Nru linux/arch/i386/vmlinux.lds.S linux-2.4.19-pre5-mjc/arch/i386/vmlinux.lds.S
--- linux/arch/i386/vmlinux.lds.S	Wed Dec 31 19:00:00 1969
+++ linux-2.4.19-pre5-mjc/arch/i386/vmlinux.lds.S	Sat Apr  6 09:37:11 2002
@@ -0,0 +1,82 @@
+/* ld script to make i386 Linux kernel
+ * Written by Martin Mares <mj@atrey.karlin.mff.cuni.cz>;
+ */
+OUTPUT_FORMAT("elf32-i386", "elf32-i386", "elf32-i386")
+OUTPUT_ARCH(i386)
+ENTRY(_start)
+SECTIONS
+{
+  . = PAGE_OFFSET_RAW + 0x100000;
+  _text = .;			/* Text and read-only data */
+  .text : {
+	*(.text)
+	*(.fixup)
+	*(.gnu.warning)
+	} = 0x9090
+
+  _etext = .;			/* End of text section */
+
+  .rodata : { *(.rodata) *(.rodata.*) }
+  .kstrtab : { *(.kstrtab) }
+
+  . = ALIGN(16);		/* Exception table */
+  __start___ex_table = .;
+  __ex_table : { *(__ex_table) }
+  __stop___ex_table = .;
+
+  __start___ksymtab = .;	/* Kernel symbol table */
+  __ksymtab : { *(__ksymtab) }
+  __stop___ksymtab = .;
+
+  .data : {			/* Data */
+	*(.data)
+	CONSTRUCTORS
+	}
+
+  _edata = .;			/* End of data section */
+
+  . = ALIGN(8192);		/* init_task */
+  .data.init_task : { *(.data.init_task) }
+
+  . = ALIGN(4096);		/* Init code and data */
+  __init_begin = .;
+  .text.init : { *(.text.init) }
+  .data.init : { *(.data.init) }
+  . = ALIGN(16);
+  __setup_start = .;
+  .setup.init : { *(.setup.init) }
+  __setup_end = .;
+  __initcall_start = .;
+  .initcall.init : { *(.initcall.init) }
+  __initcall_end = .;
+  . = ALIGN(4096);
+  __init_end = .;
+
+  . = ALIGN(4096);
+  .data.page_aligned : { *(.data.idt) }
+
+  . = ALIGN(32);
+  .data.cacheline_aligned : { *(.data.cacheline_aligned) }
+
+  __bss_start = .;		/* BSS */
+  .bss : {
+	*(.bss)
+	}
+  _end = . ;
+
+  /* Sections to be discarded */
+  /DISCARD/ : {
+	*(.text.exit)
+	*(.data.exit)
+	*(.exitcall.exit)
+	}
+
+  /* Stabs debugging sections.  */
+  .stab 0 : { *(.stab) }
+  .stabstr 0 : { *(.stabstr) }
+  .stab.excl 0 : { *(.stab.excl) }
+  .stab.exclstr 0 : { *(.stab.exclstr) }
+  .stab.index 0 : { *(.stab.index) }
+  .stab.indexstr 0 : { *(.stab.indexstr) }
+  .comment 0 : { *(.comment) }
+}
diff -Nru linux/arch/ia64/Makefile linux-2.4.19-pre5-mjc/arch/ia64/Makefile
--- linux/arch/ia64/Makefile	Fri Nov  9 17:26:17 2001
+++ linux-2.4.19-pre5-mjc/arch/ia64/Makefile	Sat Apr  6 08:25:59 2002
@@ -25,7 +25,7 @@
 GCC_VERSION=$(shell $(CROSS_COMPILE)$(HOSTCC) -v 2>&1 | fgrep 'gcc version' | cut -f3 -d' ' | cut -f1 -d'.')
 
 ifneq ($(GCC_VERSION),2)
-	CFLAGS += -frename-registers --param max-inline-insns=400
+	CFLAGS += -frename-registers --param max-inline-insns=2000
 endif
 
 ifeq ($(CONFIG_ITANIUM_BSTEP_SPECIFIC),y)
@@ -58,7 +58,7 @@
 	CFLAGS		+= -DBRINGUP
         SUBDIRS         :=      arch/$(ARCH)/sn/kernel	\
 				arch/$(ARCH)/sn/io	\
-				arch/$(ARCH)/sn/fprom	\
+				arch/$(ARCH)/sn/fakeprom	\
 				$(SUBDIRS)
         CORE_FILES      :=      arch/$(ARCH)/sn/kernel/sn.o	\
 				arch/$(ARCH)/sn/io/sgiio.o	\
diff -Nru linux/arch/ia64/config.in linux-2.4.19-pre5-mjc/arch/ia64/config.in
--- linux/arch/ia64/config.in	Fri Nov  9 17:26:17 2001
+++ linux-2.4.19-pre5-mjc/arch/ia64/config.in	Sat Apr  6 08:29:59 2002
@@ -135,6 +135,7 @@
 source drivers/mtd/Config.in
 source drivers/pnp/Config.in
 source drivers/block/Config.in
+source drivers/ieee1394/Config.in
 source drivers/message/i2o/Config.in
 source drivers/md/Config.in
 
@@ -163,6 +164,10 @@
 fi
 endmenu
 
+if [ "$CONFIG_PCI" = "y" ]; then
+  source drivers/message/fusion/Config.in
+fi
+
 if [ "$CONFIG_IA64_HP_SIM" = "n" ]; then
 
 if [ "$CONFIG_NET" = "y" ]; then
@@ -234,6 +239,8 @@
 
 source drivers/usb/Config.in
 
+source lib/Config.in
+
 if [ "$CONFIG_EXPERIMENTAL" = "y" ]; then
    source net/bluetooth/Config.in
 fi
@@ -244,7 +251,7 @@
   mainmenu_option next_comment
   comment 'Simulated drivers'
 
-  tristate 'Simulated Ethernet ' CONFIG_SIMETH
+  bool 'Simulated Ethernet ' CONFIG_SIMETH
   bool 'Simulated serial driver support' CONFIG_SIM_SERIAL
   if [ "$CONFIG_SCSI" != "n" ]; then
     bool 'Simulated SCSI disk' CONFIG_SCSI_SIM
@@ -266,9 +273,7 @@
    bool '  Disable VHPT' CONFIG_DISABLE_VHPT
    bool '  Magic SysRq key' CONFIG_MAGIC_SYSRQ
 
-# early printk is currently broken for SMP: the secondary processors get stuck...
-#   bool '  Early printk support (requires VGA!)' CONFIG_IA64_EARLY_PRINTK
-
+   bool '  Early printk support (requires VGA!)' CONFIG_IA64_EARLY_PRINTK
    bool '  Debug memory allocations' CONFIG_DEBUG_SLAB
    bool '  Spinlock debugging' CONFIG_DEBUG_SPINLOCK
    bool '  Turn on compare-and-exchange bug checking (slow!)' CONFIG_IA64_DEBUG_CMPXCHG
diff -Nru linux/arch/ia64/defconfig linux-2.4.19-pre5-mjc/arch/ia64/defconfig
--- linux/arch/ia64/defconfig	Fri Nov  9 17:26:17 2001
+++ linux-2.4.19-pre5-mjc/arch/ia64/defconfig	Sat Apr  6 08:25:59 2002
@@ -299,6 +299,7 @@
 # CONFIG_SCSI_INIA100 is not set
 # CONFIG_SCSI_NCR53C406A is not set
 # CONFIG_SCSI_NCR53C7xx is not set
+# CONFIG_SCSI_SYM53C8XX_2 is not set
 # CONFIG_SCSI_NCR53C8XX is not set
 # CONFIG_SCSI_SYM53C8XX is not set
 # CONFIG_SCSI_PAS16 is not set
@@ -373,6 +374,7 @@
 # CONFIG_SUNDANCE is not set
 # CONFIG_TLAN is not set
 # CONFIG_VIA_RHINE is not set
+# CONFIG_VIA_RHINE_MMIO is not set
 # CONFIG_WINBOND_840 is not set
 # CONFIG_NET_POCKET is not set
 
@@ -554,6 +556,9 @@
 # CONFIG_TUNER_3036 is not set
 # CONFIG_VIDEO_STRADIS is not set
 # CONFIG_VIDEO_ZORAN is not set
+# CONFIG_VIDEO_ZORAN_BUZ is not set
+# CONFIG_VIDEO_ZORAN_DC10 is not set
+# CONFIG_VIDEO_ZORAN_LML33 is not set
 # CONFIG_VIDEO_ZR36120 is not set
 # CONFIG_VIDEO_MEYE is not set
 
@@ -584,11 +589,15 @@
 # CONFIG_AUTOFS4_FS is not set
 # CONFIG_REISERFS_FS is not set
 # CONFIG_REISERFS_CHECK is not set
+# CONFIG_REISERFS_PROC_INFO is not set
 # CONFIG_ADFS_FS is not set
 # CONFIG_ADFS_FS_RW is not set
 # CONFIG_AFFS_FS is not set
 # CONFIG_HFS_FS is not set
 # CONFIG_BFS_FS is not set
+CONFIG_EXT3_FS=m
+CONFIG_JBD=m
+CONFIG_JBD_DEBUG=y
 CONFIG_FAT_FS=y
 CONFIG_MSDOS_FS=y
 # CONFIG_UMSDOS_FS is not set
@@ -626,6 +635,7 @@
 # Network File Systems
 #
 # CONFIG_CODA_FS is not set
+# CONFIG_INTERMEZZO_FS is not set
 CONFIG_NFS_FS=y
 CONFIG_NFS_V3=y
 # CONFIG_ROOT_NFS is not set
@@ -874,6 +884,7 @@
 CONFIG_IA64_PRINT_HAZARDS=y
 # CONFIG_DISABLE_VHPT is not set
 CONFIG_MAGIC_SYSRQ=y
+CONFIG_IA64_EARLY_PRINTK=y
 # CONFIG_DEBUG_SLAB is not set
 # CONFIG_DEBUG_SPINLOCK is not set
 # CONFIG_IA64_DEBUG_CMPXCHG is not set
diff -Nru linux/arch/ia64/ia32/binfmt_elf32.c linux-2.4.19-pre5-mjc/arch/ia64/ia32/binfmt_elf32.c
--- linux/arch/ia64/ia32/binfmt_elf32.c	Fri Nov  9 17:26:17 2001
+++ linux-2.4.19-pre5-mjc/arch/ia64/ia32/binfmt_elf32.c	Sat Apr  6 08:25:59 2002
@@ -142,10 +142,11 @@
 	/*
 	 * Setup GDTD.  Note: GDTD is the descrambled version of the pseudo-descriptor
 	 * format defined by Figure 3-11 "Pseudo-Descriptor Format" in the IA-32
-	 * architecture manual.
+	 * architecture manual. Also note that the only fields that are not ignored are
+	 * `base', `limit', 'G', `P' (must be 1) and `S' (must be 0).
 	 */
-	regs->r31 = IA32_SEG_UNSCRAMBLE(IA32_SEG_DESCRIPTOR(IA32_GDT_OFFSET, IA32_PAGE_SIZE - 1, 0,
-							    0, 0, 0, 0, 0, 0));
+	regs->r31 = IA32_SEG_UNSCRAMBLE(IA32_SEG_DESCRIPTOR(IA32_GDT_OFFSET, IA32_PAGE_SIZE - 1,
+							    0, 0, 0, 1, 0, 0, 0));
 	/* Setup the segment selectors */
 	regs->r16 = (__USER_DS << 16) | __USER_DS; /* ES == DS, GS, FS are zero */
 	regs->r17 = (__USER_DS << 16) | __USER_CS; /* SS, CS; ia32_load_state() sets TSS and LDT */
@@ -206,6 +207,7 @@
 	set_personality(PER_LINUX32);
 	current->thread.map_base  = IA32_PAGE_OFFSET/3;
 	current->thread.task_size = IA32_PAGE_OFFSET;	/* use what Linux/x86 uses... */
+	current->thread.flags |= IA64_THREAD_XSTACK;	/* data must be executable */
 	set_fs(USER_DS);				/* set addr limit for new TASK_SIZE */
 }
 
diff -Nru linux/arch/ia64/ia32/ia32_entry.S linux-2.4.19-pre5-mjc/arch/ia64/ia32/ia32_entry.S
--- linux/arch/ia64/ia32/ia32_entry.S	Fri Nov  9 17:26:17 2001
+++ linux-2.4.19-pre5-mjc/arch/ia64/ia32/ia32_entry.S	Sat Apr  6 08:25:59 2002
@@ -37,7 +37,7 @@
 	mov loc1=r16				// save ar.pfs across do_fork
 	.body
 	zxt4 out1=in1				// newsp
-	mov out3=0				// stacksize
+	mov out3=16				// stacksize (compensates for 16-byte scratch area)
 	adds out2=IA64_SWITCH_STACK_SIZE+16,sp	// out2 = &regs
 	zxt4 out0=in0				// out0 = clone_flags
 	br.call.sptk.many rp=do_fork
@@ -220,7 +220,7 @@
 	data8 sys32_pipe
 	data8 sys32_times
 	data8 sys32_ni_syscall	  /* old prof syscall holder */
-	data8 sys_brk		  /* 45 */
+	data8 sys32_brk		  /* 45 */
 	data8 sys_setgid	/* 16-bit version */
 	data8 sys_getgid	/* 16-bit version */
 	data8 sys32_signal
diff -Nru linux/arch/ia64/ia32/ia32_ioctl.c linux-2.4.19-pre5-mjc/arch/ia64/ia32/ia32_ioctl.c
--- linux/arch/ia64/ia32/ia32_ioctl.c	Fri Nov  9 17:26:17 2001
+++ linux-2.4.19-pre5-mjc/arch/ia64/ia32/ia32_ioctl.c	Sat Apr  6 08:26:00 2002
@@ -79,6 +79,38 @@
 
 		      return ret;
 	      }
+		case IOCTL_NR(SIOCGIFCONF):
+		{
+			struct ifconf32 {
+				int		ifc_len;
+				unsigned int	ifc_ptr;
+			} ifconf32;
+			struct ifconf ifconf;
+			int i, n;
+			char *p32, *p64;
+			char buf[32];	/* sizeof IA32 ifreq structure */
+
+			if (copy_from_user(&ifconf32, P(arg), sizeof(ifconf32)))
+				return -EFAULT;
+			ifconf.ifc_len = ifconf32.ifc_len;
+			ifconf.ifc_req = P(ifconf32.ifc_ptr);
+			ret = DO_IOCTL(fd, SIOCGIFCONF, &ifconf);
+			ifconf32.ifc_len = ifconf.ifc_len;
+			if (copy_to_user(P(arg), &ifconf32, sizeof(ifconf32)))
+				return -EFAULT;
+			n = ifconf.ifc_len / sizeof(struct ifreq);
+			p32 = P(ifconf32.ifc_ptr);
+			p64 = P(ifconf32.ifc_ptr);
+			for (i = 0; i < n; i++) {
+				if (copy_from_user(buf, p64, sizeof(struct ifreq)))
+					return -EFAULT;
+				if (copy_to_user(p32, buf, sizeof(buf)))
+					return -EFAULT;
+				p32 += sizeof(buf);
+				p64 += sizeof(struct ifreq);
+			}
+			return ret;
+		}
 
 	      case IOCTL_NR(DRM_IOCTL_VERSION):
 	      {
diff -Nru linux/arch/ia64/ia32/ia32_signal.c linux-2.4.19-pre5-mjc/arch/ia64/ia32/ia32_signal.c
--- linux/arch/ia64/ia32/ia32_signal.c	Fri Nov  9 17:26:17 2001
+++ linux-2.4.19-pre5-mjc/arch/ia64/ia32/ia32_signal.c	Sat Apr  6 08:26:00 2002
@@ -522,6 +522,7 @@
 static int
 setup_frame_ia32 (int sig, struct k_sigaction *ka, sigset_t *set, struct pt_regs * regs)
 {
+	struct exec_domain *ed = current->exec_domain;
 	struct sigframe_ia32 *frame;
 	int err = 0;
 
@@ -530,12 +531,8 @@
 	if (!access_ok(VERIFY_WRITE, frame, sizeof(*frame)))
 		goto give_sigsegv;
 
-	err |= __put_user((current->exec_domain
-			   && current->exec_domain->signal_invmap
-			   && sig < 32
-			   ? (int)(current->exec_domain->signal_invmap[sig])
-			   : sig),
-			  &frame->sig);
+	err |= __put_user((ed && ed->signal_invmap
+			   && sig < 32 ? (int)(ed->signal_invmap[sig]) : sig), &frame->sig);
 
 	err |= setup_sigcontext_ia32(&frame->sc, &frame->fpstate, regs, set->sig[0]);
 
@@ -590,6 +587,7 @@
 setup_rt_frame_ia32 (int sig, struct k_sigaction *ka, siginfo_t *info,
 		     sigset_t *set, struct pt_regs * regs)
 {
+	struct exec_domain *ed = current->exec_domain;
 	struct rt_sigframe_ia32 *frame;
 	int err = 0;
 
@@ -598,11 +596,8 @@
 	if (!access_ok(VERIFY_WRITE, frame, sizeof(*frame)))
 		goto give_sigsegv;
 
-	err |= __put_user((current->exec_domain
-			   && current->exec_domain->signal_invmap
-			   && sig < 32
-			   ? current->exec_domain->signal_invmap[sig]
-			   : sig),
+	err |= __put_user((ed && ed->signal_invmap
+			   && sig < 32 ? ed->signal_invmap[sig] : sig),
 			  &frame->sig);
 	err |= __put_user((long)&frame->info, &frame->pinfo);
 	err |= __put_user((long)&frame->uc, &frame->puc);
diff -Nru linux/arch/ia64/ia32/ia32_support.c linux-2.4.19-pre5-mjc/arch/ia64/ia32/ia32_support.c
--- linux/arch/ia64/ia32/ia32_support.c	Fri Nov  9 17:26:17 2001
+++ linux-2.4.19-pre5-mjc/arch/ia64/ia32/ia32_support.c	Sat Apr  6 08:26:00 2002
@@ -3,7 +3,7 @@
  *
  * Copyright (C) 1999 Arun Sharma <arun.sharma@intel.com>
  * Copyright (C) 2000 Asit K. Mallick <asit.k.mallick@intel.com>
- * Copyright (C) 2001 Hewlett-Packard Co
+ * Copyright (C) 2001-2002 Hewlett-Packard Co
  *	David Mosberger-Tang <davidm@hpl.hp.com>
  *
  * 06/16/00	A. Mallick	added csd/ssd/tssd for ia32 thread context
@@ -153,10 +153,12 @@
 	/* We never change the TSS and LDT descriptors, so we can share them across all CPUs.  */
 	ldt_size = PAGE_ALIGN(IA32_LDT_ENTRIES*IA32_LDT_ENTRY_SIZE);
 	for (nr = 0; nr < NR_CPUS; ++nr) {
-		ia32_gdt[_TSS(nr)] = IA32_SEG_DESCRIPTOR(IA32_TSS_OFFSET, 235,
-							 0xb, 0, 3, 1, 1, 1, 0);
-		ia32_gdt[_LDT(nr)] = IA32_SEG_DESCRIPTOR(IA32_LDT_OFFSET, ldt_size - 1,
-							 0x2, 0, 3, 1, 1, 1, 0);
+		ia32_gdt[_TSS(nr) >> IA32_SEGSEL_INDEX_SHIFT]
+			= IA32_SEG_DESCRIPTOR(IA32_TSS_OFFSET, 235,
+					      0xb, 0, 3, 1, 1, 1, 0);
+		ia32_gdt[_LDT(nr) >> IA32_SEGSEL_INDEX_SHIFT]
+			= IA32_SEG_DESCRIPTOR(IA32_LDT_OFFSET, ldt_size - 1,
+					      0x2, 0, 3, 1, 1, 1, 0);
 	}
 }
 
@@ -172,6 +174,10 @@
 
 	siginfo.si_signo = SIGTRAP;
 	siginfo.si_errno = int_num;	/* XXX is it OK to abuse si_errno like this? */
+	siginfo.si_flags = 0;
+	siginfo.si_isr = 0;
+	siginfo.si_addr = 0;
+	siginfo.si_imm = 0;
 	siginfo.si_code = TRAP_BRKPT;
 	force_sig_info(SIGTRAP, &siginfo, current);
 }
diff -Nru linux/arch/ia64/ia32/ia32_traps.c linux-2.4.19-pre5-mjc/arch/ia64/ia32/ia32_traps.c
--- linux/arch/ia64/ia32/ia32_traps.c	Fri Nov  9 17:26:17 2001
+++ linux-2.4.19-pre5-mjc/arch/ia64/ia32/ia32_traps.c	Sat Apr  6 08:26:00 2002
@@ -2,7 +2,7 @@
  * IA-32 exception handlers
  *
  * Copyright (C) 2000 Asit K. Mallick <asit.k.mallick@intel.com>
- * Copyright (C) 2001 Hewlett-Packard Co
+ * Copyright (C) 2001-2002 Hewlett-Packard Co
  *	David Mosberger-Tang <davidm@hpl.hp.com>
  *
  * 06/16/00	A. Mallick	added siginfo for most cases (close to IA32)
@@ -40,7 +40,11 @@
 {
 	struct siginfo siginfo;
 
+	/* initialize these fields to avoid leaking kernel bits to user space: */
 	siginfo.si_errno = 0;
+	siginfo.si_flags = 0;
+	siginfo.si_isr = 0;
+	siginfo.si_imm = 0;
 	switch ((isr >> 16) & 0xff) {
 	      case 1:
 	      case 2:
@@ -103,6 +107,8 @@
 			 * and it will suffer the consequences since we won't be able to
 			 * fully reproduce the context of the exception
 			 */
+			siginfo.si_isr = isr;
+			siginfo.si_flags = __ISR_VALID;
 			switch(((~fcr) & (fsr & 0x3f)) | (fsr & 0x240)) {
 				case 0x000:
 				default:
diff -Nru linux/arch/ia64/ia32/sys_ia32.c linux-2.4.19-pre5-mjc/arch/ia64/ia32/sys_ia32.c
--- linux/arch/ia64/ia32/sys_ia32.c	Fri Nov  9 17:26:17 2001
+++ linux-2.4.19-pre5-mjc/arch/ia64/ia32/sys_ia32.c	Sat Apr  6 08:29:59 2002
@@ -6,7 +6,7 @@
  * Copyright (C) 1999		Arun Sharma <arun.sharma@intel.com>
  * Copyright (C) 1997,1998	Jakub Jelinek (jj@sunsite.mff.cuni.cz)
  * Copyright (C) 1997		David S. Miller (davem@caip.rutgers.edu)
- * Copyright (C) 2000-2001 Hewlett-Packard Co
+ * Copyright (C) 2000-2002 Hewlett-Packard Co
  *	David Mosberger-Tang <davidm@hpl.hp.com>
  *
  * These routines maintain argument size conversion between 32bit and 64bit
@@ -82,6 +82,7 @@
 
 /* forward declaration: */
 asmlinkage long sys32_mprotect (unsigned int, unsigned int, int);
+asmlinkage unsigned long sys_brk(unsigned long);
 
 /*
  * Anything that modifies or inspects ia32 user virtual memory must hold this semaphore
@@ -412,7 +413,7 @@
 			return -EINVAL;
 		}
 		if (!(prot & PROT_WRITE) && sys_mprotect(pstart, pend - pstart, prot) < 0)
-			return EINVAL;
+			return -EINVAL;
 	}
 	return start;
 }
@@ -2590,6 +2591,7 @@
 	      default:
 		return -EINVAL;
 	}
+	return -EINVAL;
 }
 
 /*
@@ -3691,24 +3693,25 @@
 	return result;
 }
 
-struct dqblk32 {
-	__u32 dqb_bhardlimit;
-	__u32 dqb_bsoftlimit;
-	__u32 dqb_curblocks;
+struct mem_dqblk32 {
 	__u32 dqb_ihardlimit;
 	__u32 dqb_isoftlimit;
 	__u32 dqb_curinodes;
+	__u32 dqb_bhardlimit;
+	__u32 dqb_bsoftlimit;
+	/* Not __u64 because of alignment */
+	__u32 dqb_curspace[2];
 	__kernel_time_t32 dqb_btime;
 	__kernel_time_t32 dqb_itime;
 };
 
 asmlinkage long
-sys32_quotactl (int cmd, unsigned int special, int id, struct dqblk32 *addr)
+sys32_quotactl (int cmd, unsigned int special, int id, struct mem_dqblk32 *addr)
 {
-	extern asmlinkage long sys_quotactl (int, const char *, int, caddr_t);
+	extern asmlinkage long sys_quotactl (int, const char *, int, __kernel_caddr_t);
 	int cmds = cmd >> SUBCMDSHIFT;
 	mm_segment_t old_fs;
-	struct dqblk d;
+	struct mem_dqblk d;
 	char *spec;
 	long err;
 
@@ -3718,13 +3721,15 @@
 	      case Q_SETQUOTA:
 	      case Q_SETUSE:
 	      case Q_SETQLIM:
-		if (copy_from_user (&d, addr, sizeof(struct dqblk32)))
+		if (copy_from_user (&d, (struct mem_dqblk32 *)addr,
+				    sizeof(struct mem_dqblk32)))
 			return -EFAULT;
-		d.dqb_itime = ((struct dqblk32 *)&d)->dqb_itime;
-		d.dqb_btime = ((struct dqblk32 *)&d)->dqb_btime;
+		d.dqb_itime = ((struct mem_dqblk32 *)&d)->dqb_itime;
+		d.dqb_btime = ((struct mem_dqblk32 *)&d)->dqb_btime;
+		memcpy(&d.dqb_curspace, ((struct mem_dqblk32 *)&d)->dqb_curspace, sizeof(__u64));
 		break;
 	      default:
-		return sys_quotactl(cmd, (void *) A(special), id, (caddr_t) addr);
+		return sys_quotactl(cmd, (void *) A(special), id, (__kernel_caddr_t) addr);
 	}
 	spec = getname32((void *) A(special));
 	err = PTR_ERR(spec);
@@ -3732,17 +3737,22 @@
 		return err;
 	old_fs = get_fs ();
 	set_fs(KERNEL_DS);
-	err = sys_quotactl(cmd, (const char *)spec, id, (caddr_t)&d);
+	err = sys_quotactl(cmd, (const char *)spec, id, (__kernel_caddr_t)&d);
 	set_fs(old_fs);
 	putname(spec);
+	if (err)
+		return err;
 	if (cmds == Q_GETQUOTA) {
 		__kernel_time_t b = d.dqb_btime, i = d.dqb_itime;
-		((struct dqblk32 *)&d)->dqb_itime = i;
-		((struct dqblk32 *)&d)->dqb_btime = b;
-		if (copy_to_user(addr, &d, sizeof(struct dqblk32)))
+		qsize_t s = d.dqb_curspace;
+		((struct mem_dqblk32 *)&d)->dqb_itime = i;
+		((struct mem_dqblk32 *)&d)->dqb_btime = b;
+		memcpy(((struct mem_dqblk32 *)&d)->dqb_curspace, &s, sizeof(__u64));
+		if (copy_to_user((struct mem_dqblk32 *)addr, &d,
+				 sizeof(struct mem_dqblk32)))
 			return -EFAULT;
 	}
-	return err;
+	return 0;
 }
 
 asmlinkage long
@@ -3807,6 +3817,19 @@
 	ret = sys_personality(personality);
 	if (ret == PER_LINUX32)
 		ret = PER_LINUX;
+	return ret;
+}
+
+asmlinkage unsigned long
+sys32_brk (unsigned int brk)
+{
+	unsigned long ret, obrk;
+	struct mm_struct *mm = current->mm;
+
+	obrk = mm->brk;
+	ret = sys_brk(brk);
+	if (ret < obrk)
+		clear_user((void *) ret, PAGE_ALIGN(ret) - ret);
 	return ret;
 }
 
diff -Nru linux/arch/ia64/kernel/Makefile linux-2.4.19-pre5-mjc/arch/ia64/kernel/Makefile
--- linux/arch/ia64/kernel/Makefile	Fri Nov  9 17:26:17 2001
+++ linux-2.4.19-pre5-mjc/arch/ia64/kernel/Makefile	Sat Apr  6 08:26:00 2002
@@ -14,7 +14,7 @@
 export-objs := ia64_ksyms.o
 
 obj-y := acpi.o entry.o gate.o efi.o efi_stub.o ia64_ksyms.o irq.o irq_ia64.o irq_lsapic.o ivt.o \
-	 machvec.o pal.o process.o perfmon.o ptrace.o sal.o semaphore.o setup.o	\
+	 machvec.o pal.o process.o perfmon.o ptrace.o sal.o salinfo.o semaphore.o setup.o	 \
 	 signal.o sys_ia64.o traps.o time.o unaligned.o unwind.o
 obj-$(CONFIG_IA64_GENERIC) += iosapic.o
 obj-$(CONFIG_IA64_DIG) += iosapic.o
diff -Nru linux/arch/ia64/kernel/acpi.c linux-2.4.19-pre5-mjc/arch/ia64/kernel/acpi.c
--- linux/arch/ia64/kernel/acpi.c	Fri Nov  9 17:26:17 2001
+++ linux-2.4.19-pre5-mjc/arch/ia64/kernel/acpi.c	Sat Apr  6 08:26:00 2002
@@ -401,7 +401,7 @@
 # ifdef CONFIG_ACPI
 	acpi_xsdt_t *xsdt;
 	acpi_desc_table_hdr_t *hdrp;
-	acpi_madt_t *madt;
+	acpi_madt_t *madt = NULL;
 	int tables, i;
 
 	if (strncmp(rsdp20->signature, ACPI_RSDP_SIG, ACPI_RSDP_SIG_LEN)) {
diff -Nru linux/arch/ia64/kernel/brl_emu.c linux-2.4.19-pre5-mjc/arch/ia64/kernel/brl_emu.c
--- linux/arch/ia64/kernel/brl_emu.c	Thu Apr  5 15:51:47 2001
+++ linux-2.4.19-pre5-mjc/arch/ia64/kernel/brl_emu.c	Sat Apr  6 08:26:00 2002
@@ -2,6 +2,9 @@
  *  Emulation of the "brl" instruction for IA64 processors that
  *  don't support it in hardware.
  *  Author: Stephan Zeisset, Intel Corp. <Stephan.Zeisset@intel.com>
+ *
+ *    02/22/02	D. Mosberger	Clear si_flgs, si_isr, and si_imm to avoid
+ *				leaking kernel bits.
  */
 
 #include <linux/kernel.h>
@@ -195,6 +198,9 @@
 		printk("Woah! Unimplemented Instruction Address Trap!\n");
 		siginfo.si_signo = SIGILL;
 		siginfo.si_errno = 0;
+		siginfo.si_flags = 0;
+		siginfo.si_isr = 0;
+		siginfo.si_imm = 0;
 		siginfo.si_code = ILL_BADIADDR;
 		force_sig_info(SIGILL, &siginfo, current);
 	} else if (ia64_psr(regs)->tb) {
@@ -205,6 +211,10 @@
 		siginfo.si_signo = SIGTRAP;
 		siginfo.si_errno = 0;
 		siginfo.si_code = TRAP_BRANCH;
+		siginfo.si_flags = 0;
+		siginfo.si_isr = 0;
+		siginfo.si_addr = 0;
+		siginfo.si_imm = 0;
 		force_sig_info(SIGTRAP, &siginfo, current);
 	} else if (ia64_psr(regs)->ss) {
 		/*
@@ -214,6 +224,10 @@
 		siginfo.si_signo = SIGTRAP;
 		siginfo.si_errno = 0;
 		siginfo.si_code = TRAP_TRACE;
+		siginfo.si_flags = 0;
+		siginfo.si_isr = 0;
+		siginfo.si_addr = 0;
+		siginfo.si_imm = 0;
 		force_sig_info(SIGTRAP, &siginfo, current);
 	}
 	return rv;
diff -Nru linux/arch/ia64/kernel/efivars.c linux-2.4.19-pre5-mjc/arch/ia64/kernel/efivars.c
--- linux/arch/ia64/kernel/efivars.c	Fri Dec 21 12:41:53 2001
+++ linux-2.4.19-pre5-mjc/arch/ia64/kernel/efivars.c	Sat Apr  6 08:26:00 2002
@@ -29,6 +29,11 @@
  *
  * Changelog:
  *
+ *  12 Feb 2002 - Matt Domsch <Matt_Domsch@dell.com>
+ *   use list_for_each_safe when deleting vars.
+ *   remove ifdef CONFIG_SMP around include <linux/smp.h>
+ *   v0.04 release to linux-ia64@linuxia64.org
+ *
  *  20 April 2001 - Matt Domsch <Matt_Domsch@dell.com>
  *   Moved vars from /proc/efi to /proc/efi/vars, and made
  *   efi.c own the /proc/efi directory.
@@ -56,18 +61,16 @@
 #include <linux/sched.h>		/* for capable() */
 #include <linux/mm.h>
 #include <linux/module.h>
+#include <linux/smp.h>
 
 #include <asm/efi.h>
 #include <asm/uaccess.h>
-#ifdef CONFIG_SMP
-#include <linux/smp.h>
-#endif
 
 MODULE_AUTHOR("Matt Domsch <Matt_Domsch@Dell.com>");
 MODULE_DESCRIPTION("/proc interface to EFI Variables");
 MODULE_LICENSE("GPL");
 
-#define EFIVARS_VERSION "0.03 2001-Apr-20"
+#define EFIVARS_VERSION "0.04 2002-Feb-12"
 
 static int
 efivar_read(char *page, char **start, off_t off,
@@ -265,7 +268,7 @@
 {
 	unsigned long strsize1, strsize2;
 	int found=0;
-	struct list_head *pos;
+	struct list_head *pos, *n;
 	unsigned long size = sizeof(efi_variable_t);
 	efi_status_t status;
 	efivar_entry_t *efivar = data, *search_efivar = NULL;
@@ -297,7 +300,7 @@
 	   This allows any properly formatted data structure to
 	   be written to any of the files in /proc/efi/vars and it will work.
 	*/
-	list_for_each(pos, &efivar_list) {
+	list_for_each_safe(pos, n, &efivar_list) {
 		search_efivar = efivar_entry(pos);
 		strsize1 = utf8_strsize(search_efivar->var.VariableName, 1024);
 		strsize2 = utf8_strsize(var_data->VariableName, 1024);
@@ -413,12 +416,12 @@
 static void __exit
 efivars_exit(void)
 {
-	struct list_head *pos;
+	struct list_head *pos, *n;
 	efivar_entry_t *efivar;
 
 	spin_lock(&efivars_lock);
 
-	list_for_each(pos, &efivar_list) {
+	list_for_each_safe(pos, n, &efivar_list) {
 		efivar = efivar_entry(pos);
 		remove_proc_entry(efivar->entry->name, efi_vars_dir);
 		list_del(&efivar->list);
diff -Nru linux/arch/ia64/kernel/entry.S linux-2.4.19-pre5-mjc/arch/ia64/kernel/entry.S
--- linux/arch/ia64/kernel/entry.S	Fri Nov  9 17:26:17 2001
+++ linux-2.4.19-pre5-mjc/arch/ia64/kernel/entry.S	Sat Apr  6 08:26:00 2002
@@ -115,7 +115,7 @@
 	mov loc1=r16				// save ar.pfs across do_fork
 	.body
 	mov out1=in1
-	mov out3=0
+	mov out3=16				// stacksize (compensates for 16-byte scratch area)
 	adds out2=IA64_SWITCH_STACK_SIZE+16,sp	// out2 = &regs
 	mov out0=in0				// out0 = clone_flags
 	br.call.sptk.many rp=do_fork
@@ -521,35 +521,38 @@
 	;;
 	mov.ret.sptk rp=r14,.restart
 .restart:
+	// need_resched and signals atomic test
+(pUser)	rsm psr.i
 	adds r17=IA64_TASK_NEED_RESCHED_OFFSET,r13
 	adds r18=IA64_TASK_SIGPENDING_OFFSET,r13
 #ifdef CONFIG_PERFMON
-	adds r19=IA64_TASK_PFM_MUST_BLOCK_OFFSET,r13
+	adds r19=IA64_TASK_PFM_OVFL_BLOCK_RESET_OFFSET,r13
 #endif
 	;;
 #ifdef CONFIG_PERFMON
-(pUser)	ld8 r19=[r19]				// load current->thread.pfm_must_block
+(pUser)	ld8 r19=[r19]				// load current->thread.pfm_ovfl_block_reset
 #endif
 (pUser)	ld8 r17=[r17]				// load current->need_resched
 (pUser)	ld4 r18=[r18]				// load current->sigpending
 	;;
 #ifdef CONFIG_PERFMON
-(pUser)	cmp.ne.unc p9,p0=r19,r0			// current->thread.pfm_must_block != 0?
+(pUser)	cmp.ne.unc p9,p0=r19,r0			// current->thread.pfm_ovfl_block_reset != 0?
 #endif
 (pUser)	cmp.ne.unc p7,p0=r17,r0			// current->need_resched != 0?
 (pUser)	cmp.ne.unc p8,p0=r18,r0			// current->sigpending != 0?
 	;;
-	adds r2=PT(R8)+16,r12
-	adds r3=PT(R9)+16,r12
 #ifdef CONFIG_PERFMON
-(p9)	br.call.spnt.many b7=pfm_block_on_overflow
+(p9)	br.call.spnt.many b7=pfm_ovfl_block_reset
 #endif
 #if __GNUC__ < 3
 (p7)	br.call.spnt.many b7=invoke_schedule
 #else
 (p7)	br.call.spnt.many b7=schedule
 #endif
-(p8)	br.call.spnt.many b7=handle_signal_delivery	// check & deliver pending signals
+(p8)	br.call.spnt.many rp=handle_signal_delivery	// check & deliver pending signals (once)
+	;;
+.ret9:	adds r2=PT(R8)+16,r12
+	adds r3=PT(R9)+16,r12
 	;;
 	// start restoring the state saved on the kernel stack (struct pt_regs):
 	ld8.fill r8=[r2],16
@@ -582,7 +585,7 @@
 	ld8.fill r30=[r2],16
 	ld8.fill r31=[r3],16
 	;;
-	rsm psr.i | psr.ic	// initiate turning off of interrupts & interruption collection
+	rsm psr.i | psr.ic	// initiate turning off of interrupt and interruption collection
 	invala			// invalidate ALAT
 	;;
 	ld8 r1=[r2],16		// ar.ccv
@@ -601,7 +604,7 @@
 	mov ar.fpsr=r13
 	mov b0=r14
 	;;
-	srlz.i			// ensure interrupts & interruption collection are off
+	srlz.i			// ensure interruption collection is off
 	mov b7=r15
 	;;
 	bsw.0			// switch back to bank 0
@@ -1142,7 +1145,7 @@
 	data8 ia64_ni_syscall
 	data8 ia64_ni_syscall
 	data8 ia64_ni_syscall
-	data8 ia64_ni_syscall
+	data8 sys_tkill
 	data8 ia64_ni_syscall			// 1230
 	data8 ia64_ni_syscall
 	data8 ia64_ni_syscall
diff -Nru linux/arch/ia64/kernel/gate.S linux-2.4.19-pre5-mjc/arch/ia64/kernel/gate.S
--- linux/arch/ia64/kernel/gate.S	Fri Nov  9 17:26:17 2001
+++ linux-2.4.19-pre5-mjc/arch/ia64/kernel/gate.S	Sat Apr  6 08:26:00 2002
@@ -90,7 +90,7 @@
 (p8)	br.cond.spnt setup_rbs		// yup -> (clobbers r14, r15, and r16)
 back_from_setup_rbs:
 
-	.save ar.pfs, r8
+	.spillreg ar.pfs, r8
 	alloc r8=ar.pfs,0,0,3,0		// get CFM0, EC0, and CPL0 into r8
 	ld8 out0=[base0],16		// load arg0 (signum)
 	adds base1=(ARG1_OFF-(RBS_BASE_OFF+SIGCONTEXT_OFF)),base1
diff -Nru linux/arch/ia64/kernel/head.S linux-2.4.19-pre5-mjc/arch/ia64/kernel/head.S
--- linux/arch/ia64/kernel/head.S	Fri Nov  9 17:26:17 2001
+++ linux-2.4.19-pre5-mjc/arch/ia64/kernel/head.S	Sat Apr  6 08:26:00 2002
@@ -180,10 +180,12 @@
 	.rodata
 alive_msg:
 	stringz "I'm alive and well\n"
+alive_msg_end:
 	.previous
 
 	alloc r2=ar.pfs,0,0,2,0
 	movl out0=alive_msg
+	movl out1=alive_msg_end-alive_msg-1
 	;;
 	br.call.sptk.many rp=early_printk
 1:	// force new bundle
diff -Nru linux/arch/ia64/kernel/ia64_ksyms.c linux-2.4.19-pre5-mjc/arch/ia64/kernel/ia64_ksyms.c
--- linux/arch/ia64/kernel/ia64_ksyms.c	Fri Nov  9 17:26:17 2001
+++ linux-2.4.19-pre5-mjc/arch/ia64/kernel/ia64_ksyms.c	Sat Apr  6 08:26:00 2002
@@ -24,6 +24,7 @@
 EXPORT_SYMBOL(strrchr);
 EXPORT_SYMBOL(strstr);
 EXPORT_SYMBOL(strtok);
+EXPORT_SYMBOL(strpbrk);
 
 #include <linux/irq.h>
 EXPORT_SYMBOL(isa_irq_to_vector_map);
diff -Nru linux/arch/ia64/kernel/iosapic.c linux-2.4.19-pre5-mjc/arch/ia64/kernel/iosapic.c
--- linux/arch/ia64/kernel/iosapic.c	Fri Nov  9 17:26:17 2001
+++ linux-2.4.19-pre5-mjc/arch/ia64/kernel/iosapic.c	Sat Apr  6 08:26:00 2002
@@ -3,8 +3,9 @@
  *
  * Copyright (C) 1999 Intel Corp.
  * Copyright (C) 1999 Asit Mallick <asit.k.mallick@intel.com>
- * Copyright (C) 1999-2000 Hewlett-Packard Co.
- * Copyright (C) 1999-2000 David Mosberger-Tang <davidm@hpl.hp.com>
+ * Copyright (C) 2000-2002 J.I. Lee <jung-ik.lee@intel.com>
+ * Copyright (C) 1999-2000, 2002 Hewlett-Packard Co.
+ *	David Mosberger-Tang <davidm@hpl.hp.com>
  * Copyright (C) 1999 VA Linux Systems
  * Copyright (C) 1999,2000 Walt Drummond <drummond@valinux.com>
  *
@@ -15,6 +16,12 @@
  *				PCI to vector mapping, shared PCI interrupts.
  * 00/10/27	D. Mosberger	Document things a bit more to make them more understandable.
  *				Clean up much of the old IOSAPIC cruft.
+ * 01/07/27	J.I. Lee	PCI irq routing, Platform/Legacy interrupts and fixes for
+ *				ACPI S5(SoftOff) support.
+ * 02/01/23	J.I. Lee	iosapic pgm fixes for PCI irq routing from _PRT
+ * 02/01/07     E. Focht        <efocht@ess.nec.de> Redirectable interrupt vectors in
+ *                              iosapic_set_affinity(), initializations for
+ *                              /proc/irq/#/smp_affinity
  */
 /*
  * Here is what the interrupt logic between a PCI device and the CPU looks like:
@@ -63,6 +70,7 @@
 
 
 #undef DEBUG_IRQ_ROUTING
+#undef	OVERRIDE_DEBUG
 
 static spinlock_t iosapic_lock = SPIN_LOCK_UNLOCKED;
 
@@ -88,7 +96,7 @@
  * Translate IOSAPIC irq number to the corresponding IA-64 interrupt vector.  If no
  * entry exists, return -1.
  */
-static int
+int
 iosapic_irq_to_vector (int irq)
 {
 	int vector;
@@ -121,6 +129,7 @@
 	u32 low32, high32;
 	char *addr;
 	int pin;
+	char redir;
 
 	pin = iosapic_irq[vector].pin;
 	if (pin < 0)
@@ -131,6 +140,11 @@
 	trigger = iosapic_irq[vector].trigger;
 	dmode   = iosapic_irq[vector].dmode;
 
+	redir = (dmode == IOSAPIC_LOWEST_PRIORITY) ? 1 : 0;
+#ifdef CONFIG_SMP
+	set_irq_affinity_info(vector, (int)(dest & 0xffff), redir);
+#endif
+
 	low32 = ((pol << IOSAPIC_POLARITY_SHIFT) |
 		 (trigger << IOSAPIC_TRIGGER_SHIFT) |
 		 (dmode << IOSAPIC_DELIVERY_SHIFT) |
@@ -211,6 +225,7 @@
 	u32 high32, low32;
 	int dest, pin;
 	char *addr;
+	int redir = (irq & (1<<31)) ? 1 : 0;
 
 	mask &= (1UL << smp_num_cpus) - 1;
 
@@ -225,6 +240,8 @@
 	if (pin < 0)
 		return;			/* not an IOSAPIC interrupt */
 
+	set_irq_affinity_info(irq,dest,redir);
+
 	/* dest contains both id and eid */
 	high32 = dest << IOSAPIC_DEST_SHIFT;
 
@@ -234,9 +251,13 @@
 		writel(IOSAPIC_RTE_LOW(pin), addr + IOSAPIC_REG_SELECT);
 		low32 = readl(addr + IOSAPIC_WINDOW);
 
-		/* change delivery mode to fixed */
 		low32 &= ~(7 << IOSAPIC_DELIVERY_SHIFT);
-		low32 |= (IOSAPIC_FIXED << IOSAPIC_DELIVERY_SHIFT);
+		if (redir)
+		        /* change delivery mode to lowest priority */
+			low32 |= (IOSAPIC_LOWEST_PRIORITY << IOSAPIC_DELIVERY_SHIFT);
+		else
+		        /* change delivery mode to fixed */
+			low32 |= (IOSAPIC_FIXED << IOSAPIC_DELIVERY_SHIFT);
 
 		writel(IOSAPIC_RTE_HIGH(pin), addr + IOSAPIC_REG_SELECT);
 		writel(high32, addr + IOSAPIC_WINDOW);
@@ -343,29 +364,64 @@
 }
 
 /*
- * ACPI can describe IOSAPIC interrupts via static tables and namespace
- * methods.  This provides an interface to register those interrupts and
- * program the IOSAPIC RTE.
+ * if the given vector is already owned by other,
+ *  assign a new vector for the other and make the vector available
  */
-int
-iosapic_register_irq (u32 global_vector, unsigned long polarity, unsigned long
-                      edge_triggered, u32 base_irq, char *iosapic_address)
+static void
+iosapic_reassign_vector (int vector)
+{
+	int new_vector;
+
+	if (iosapic_irq[vector].pin >= 0 || iosapic_irq[vector].addr
+	    || iosapic_irq[vector].base_irq || iosapic_irq[vector].dmode
+	    || iosapic_irq[vector].polarity || iosapic_irq[vector].trigger)
+	{
+		new_vector = ia64_alloc_irq();
+		printk("Reassigning Vector 0x%x to 0x%x\n", vector, new_vector);
+		memcpy (&iosapic_irq[new_vector], &iosapic_irq[vector],
+			sizeof(struct iosapic_irq));
+		memset (&iosapic_irq[vector], 0, sizeof(struct iosapic_irq));
+		iosapic_irq[vector].pin = -1;
+	}
+}
+
+static void
+register_irq (u32 global_vector, int vector, int pin, unsigned char delivery,
+	      unsigned long polarity, unsigned long edge_triggered,
+	      u32 base_irq, char *iosapic_address)
 {
 	irq_desc_t *idesc;
 	struct hw_interrupt_type *irq_type;
-	int vector;
 
-	vector = iosapic_irq_to_vector(global_vector);
-	if (vector < 0)
-		vector = ia64_alloc_irq();
-
-	/* fill in information from this vector's IOSAPIC */
-	iosapic_irq[vector].addr = iosapic_address;
-	iosapic_irq[vector].base_irq = base_irq;
-	iosapic_irq[vector].pin	= global_vector - iosapic_irq[vector].base_irq;
+	iosapic_irq[vector].pin	= pin;
 	iosapic_irq[vector].polarity = polarity ? IOSAPIC_POL_HIGH : IOSAPIC_POL_LOW;
-	iosapic_irq[vector].dmode    = IOSAPIC_LOWEST_PRIORITY;
+	iosapic_irq[vector].dmode    = delivery;
 
+	/*
+	 * In override, it does not provide addr/base_irq.  global_vector is enough to
+	 * locate iosapic addr, base_irq and pin by examining base_irq and max_pin of
+	 * registered iosapics (tbd)
+	 */
+#ifndef	OVERRIDE_DEBUG
+	if (iosapic_address) {
+		iosapic_irq[vector].addr = iosapic_address;
+		iosapic_irq[vector].base_irq = base_irq;
+	}
+#else
+	if (iosapic_address) {
+		if (iosapic_irq[vector].addr && (iosapic_irq[vector].addr != iosapic_address))
+			printk("WARN: register_irq: diff IOSAPIC ADDRESS for gv %x, v %x\n",
+			       global_vector, vector);
+		iosapic_irq[vector].addr = iosapic_address;
+		if (iosapic_irq[vector].base_irq && (iosapic_irq[vector].base_irq != base_irq)) {
+			printk("WARN: register_irq: diff BASE IRQ %x for gv %x, v %x\n",
+			       base_irq, global_vector, vector);
+		}
+		iosapic_irq[vector].base_irq = base_irq;
+	} else if (!iosapic_irq[vector].addr)
+		printk("WARN: register_irq: invalid override for gv %x, v %x\n",
+		       global_vector, vector);
+#endif
 	if (edge_triggered) {
 		iosapic_irq[vector].trigger = IOSAPIC_EDGE;
 		irq_type = &irq_type_iosapic_edge;
@@ -377,12 +433,32 @@
 	idesc = irq_desc(vector);
 	if (idesc->handler != irq_type) {
 		if (idesc->handler != &no_irq_type)
-			printk("iosapic_register_irq(): changing vector 0x%02x from"
+			printk("register_irq(): changing vector 0x%02x from "
 			       "%s to %s\n", vector, idesc->handler->typename, irq_type->typename);
 		idesc->handler = irq_type;
 	}
+}
+
+/*
+ * ACPI can describe IOSAPIC interrupts via static tables and namespace
+ * methods.  This provides an interface to register those interrupts and
+ * program the IOSAPIC RTE.
+ */
+int
+iosapic_register_irq (u32 global_vector, unsigned long polarity, unsigned long
+                      edge_triggered, u32 base_irq, char *iosapic_address)
+{
+	int vector;
 
-	printk("IOSAPIC %x(%s,%s) -> Vector %x\n", global_vector,
+	vector = iosapic_irq_to_vector(global_vector);
+	if (vector < 0)
+		vector = ia64_alloc_irq();
+
+	register_irq (global_vector, vector, global_vector - base_irq,
+			IOSAPIC_LOWEST_PRIORITY, polarity, edge_triggered,
+			base_irq, iosapic_address);
+
+	printk("IOSAPIC 0x%x(%s,%s) -> Vector 0x%x\n", global_vector,
 	       (polarity ? "high" : "low"), (edge_triggered ? "edge" : "level"), vector);
 
 	/* program the IOSAPIC routing table */
@@ -395,51 +471,40 @@
  * Note that the irq_base and IOSAPIC address must be set in iosapic_init().
  */
 int
-iosapic_register_platform_irq (u32 int_type, u32 global_vector, u32 iosapic_vector,
-			       u16 eid, u16 id, unsigned long polarity,
+iosapic_register_platform_irq (u32 int_type, u32 global_vector,
+			       u32 iosapic_vector, u16 eid, u16 id, unsigned long polarity,
 			       unsigned long edge_triggered, u32 base_irq, char *iosapic_address)
 {
-	struct hw_interrupt_type *irq_type;
-	irq_desc_t *idesc;
+	unsigned char delivery;
 	int vector;
 
 	switch (int_type) {
-	      case ACPI20_ENTRY_PIS_CPEI:
+	case ACPI20_ENTRY_PIS_PMI:
+		vector = iosapic_vector;
+		/*
+		 * since PMI vector is alloc'd by FW(ACPI) not by kernel,
+		 * we need to make sure the vector is available
+		 */
+		iosapic_reassign_vector(vector);
+		delivery = IOSAPIC_PMI;
+		break;
+	case ACPI20_ENTRY_PIS_CPEI:
 		vector = IA64_PCE_VECTOR;
-		iosapic_irq[vector].dmode = IOSAPIC_LOWEST_PRIORITY;
+		delivery = IOSAPIC_LOWEST_PRIORITY;
 		break;
-	      case ACPI20_ENTRY_PIS_INIT:
+	case ACPI20_ENTRY_PIS_INIT:
 		vector = ia64_alloc_irq();
-		iosapic_irq[vector].dmode = IOSAPIC_INIT;
+		delivery = IOSAPIC_INIT;
 		break;
-	      default:
+	default:
 		printk("iosapic_register_platform_irq(): invalid int type\n");
 		return -1;
 	}
 
-	/* fill in information from this vector's IOSAPIC */
-	iosapic_irq[vector].addr = iosapic_address;
-	iosapic_irq[vector].base_irq = base_irq;
-	iosapic_irq[vector].pin	= global_vector - iosapic_irq[vector].base_irq;
-	iosapic_irq[vector].polarity = polarity ? IOSAPIC_POL_HIGH : IOSAPIC_POL_LOW;
-
-	if (edge_triggered) {
-		iosapic_irq[vector].trigger = IOSAPIC_EDGE;
-		irq_type = &irq_type_iosapic_edge;
-	} else {
-		iosapic_irq[vector].trigger = IOSAPIC_LEVEL;
-		irq_type = &irq_type_iosapic_level;
-	}
-
-	idesc = irq_desc(vector);
-	if (idesc->handler != irq_type) {
-		if (idesc->handler != &no_irq_type)
-			printk("iosapic_register_platform_irq(): changing vector 0x%02x from"
-			       "%s to %s\n", vector, idesc->handler->typename, irq_type->typename);
-		idesc->handler = irq_type;
-	}
+	register_irq(global_vector, vector, global_vector - base_irq, delivery, polarity,
+		     edge_triggered, base_irq, iosapic_address);
 
-	printk("PLATFORM int %x: IOSAPIC %x(%s,%s) -> Vector %x CPU %.02u:%.02u\n",
+	printk("PLATFORM int 0x%x: IOSAPIC 0x%x(%s,%s) -> Vector 0x%x CPU %.02u:%.02u\n",
 	       int_type, global_vector, (polarity ? "high" : "low"),
 	       (edge_triggered ? "edge" : "level"), vector, eid, id);
 
@@ -450,15 +515,18 @@
 
 
 /*
- * ACPI calls this when it finds an entry for a legacy ISA interrupt.  Note that the
- * irq_base and IOSAPIC address must be set in iosapic_init().
+ * ACPI calls this when it finds an entry for a legacy ISA interrupt.
+ * Note that the irq_base and IOSAPIC address must be set in iosapic_init().
  */
 void
 iosapic_register_legacy_irq (unsigned long irq,
 			     unsigned long pin, unsigned long polarity,
 			     unsigned long edge_triggered)
 {
-	unsigned int vector = isa_irq_to_vector(irq);
+	int vector = isa_irq_to_vector(irq);
+
+	register_irq(irq, vector, (int)pin, IOSAPIC_LOWEST_PRIORITY, polarity, edge_triggered,
+		     0, NULL);		/* ignored for override */
 
 #ifdef DEBUG_IRQ_ROUTING
 	printk("ISA: IRQ %u -> IOSAPIC irq 0x%02x (%s, %s) -> vector %02x\n",
@@ -467,18 +535,14 @@
 	       vector);
 #endif
 
-	iosapic_irq[vector].pin = pin;
-	iosapic_irq[vector].dmode = IOSAPIC_LOWEST_PRIORITY;
-	iosapic_irq[vector].polarity = polarity ? IOSAPIC_POL_HIGH : IOSAPIC_POL_LOW;
-	iosapic_irq[vector].trigger = edge_triggered ? IOSAPIC_EDGE : IOSAPIC_LEVEL;
+	/* program the IOSAPIC routing table */
+	set_rte(vector, (ia64_get_lid() >> 16) & 0xffff);
 }
 
 void __init
 iosapic_init (unsigned long phys_addr, unsigned int base_irq, int pcat_compat)
 {
-	struct hw_interrupt_type *irq_type;
-	int i, irq, max_pin, vector;
-	irq_desc_t *idesc;
+	int i, irq, max_pin, vector, pin;
 	unsigned int ver;
 	char *addr;
 	static int first_time = 1;
@@ -496,7 +560,6 @@
 	}
 
 	addr = ioremap(phys_addr, 0);
-
 	ver = iosapic_version(addr);
 	max_pin = (ver >> 16) & 0xff;
 
@@ -511,27 +574,18 @@
 		 */
 		for (irq = 0; irq < 16; ++irq) {
 			vector = isa_irq_to_vector(irq);
-			iosapic_irq[vector].addr = addr;
-			iosapic_irq[vector].base_irq = 0;
-			if (iosapic_irq[vector].pin == -1)
-				iosapic_irq[vector].pin = irq;
-			iosapic_irq[vector].dmode = IOSAPIC_LOWEST_PRIORITY;
-			iosapic_irq[vector].trigger  = IOSAPIC_EDGE;
-			iosapic_irq[vector].polarity = IOSAPIC_POL_HIGH;
+			if ((pin = iosapic_irq[vector].pin) == -1)
+				pin = irq;
+
+			register_irq(irq, vector, pin,
+				     /* IOSAPIC_POL_HIGH, IOSAPIC_EDGE */
+				     IOSAPIC_LOWEST_PRIORITY, 1, 1, base_irq, addr);
+
 #ifdef DEBUG_IRQ_ROUTING
 			printk("ISA: IRQ %u -> IOSAPIC irq 0x%02x (high, edge) -> vector 0x%02x\n",
 			       irq, iosapic_irq[vector].base_irq + iosapic_irq[vector].pin,
 			       vector);
 #endif
-			irq_type = &irq_type_iosapic_edge;
-			idesc = irq_desc(vector);
-			if (idesc->handler != irq_type) {
-				if (idesc->handler != &no_irq_type)
-					printk("iosapic_init: changing vector 0x%02x from %s to "
-					       "%s\n", irq, idesc->handler->typename,
-					       irq_type->typename);
-				idesc->handler = irq_type;
-			}
 
 			/* program the IOSAPIC routing table: */
 			set_rte(vector, (ia64_get_lid() >> 16) & 0xffff);
@@ -540,7 +594,7 @@
 	for (i = 0; i < pci_irq.num_routes; i++) {
 		irq = pci_irq.route[i].irq;
 
-		if ((unsigned) (irq - base_irq) > max_pin)
+		if ((irq < (int)base_irq) || (irq > (int)(base_irq + max_pin)))
 			/* the interrupt route is for another controller... */
 			continue;
 
@@ -553,29 +607,18 @@
 				vector = ia64_alloc_irq();
 		}
 
-		iosapic_irq[vector].addr     = addr;
-		iosapic_irq[vector].base_irq = base_irq;
-		iosapic_irq[vector].pin	     = (irq - base_irq);
-		iosapic_irq[vector].dmode    = IOSAPIC_LOWEST_PRIORITY;
-		iosapic_irq[vector].trigger  = IOSAPIC_LEVEL;
-		iosapic_irq[vector].polarity = IOSAPIC_POL_LOW;
+		register_irq(irq, vector, irq - base_irq,
+			     /* IOSAPIC_POL_LOW, IOSAPIC_LEVEL */
+			     IOSAPIC_LOWEST_PRIORITY, 0, 0, base_irq, addr);
 
 # ifdef DEBUG_IRQ_ROUTING
 		printk("PCI: (B%d,I%d,P%d) -> IOSAPIC irq 0x%02x -> vector 0x%02x\n",
 		       pci_irq.route[i].bus, pci_irq.route[i].pci_id>>16, pci_irq.route[i].pin,
 		       iosapic_irq[vector].base_irq + iosapic_irq[vector].pin, vector);
 # endif
-		irq_type = &irq_type_iosapic_level;
-		idesc = irq_desc(vector);
-		if (idesc->handler != irq_type){
-			if (idesc->handler != &no_irq_type)
-				printk("iosapic_init: changing vector 0x%02x from %s to %s\n",
-				       vector, idesc->handler->typename, irq_type->typename);
-			idesc->handler = irq_type;
-		}
 
-		/* program the IOSAPIC routing table: */
-		set_rte(vector, (ia64_get_lid() >> 16) & 0xffff);
+			/* program the IOSAPIC routing table: */
+			set_rte(vector, (ia64_get_lid() >> 16) & 0xffff);
 	}
 }
 
@@ -585,6 +628,8 @@
 	struct	pci_dev	*dev;
 	unsigned char pin;
 	int vector;
+	struct hw_interrupt_type *irq_type;
+	irq_desc_t *idesc;
 
 	if (phase != 1)
 		return;
@@ -611,19 +656,28 @@
 				if (vector >= 0)
 					printk(KERN_WARNING
 					       "PCI: using PPB(B%d,I%d,P%d) to get vector %02x\n",
-					       bridge->bus->number, PCI_SLOT(bridge->devfn),
+					       dev->bus->number, PCI_SLOT(dev->devfn),
 					       pin, vector);
 				else
 					printk(KERN_WARNING
-					       "PCI: Couldn't map irq for (B%d,I%d,P%d)o\n",
-					       bridge->bus->number, PCI_SLOT(bridge->devfn),
-					       pin);
+					       "PCI: Couldn't map irq for (B%d,I%d,P%d)\n",
+					       dev->bus->number, PCI_SLOT(dev->devfn), pin);
 			}
 			if (vector >= 0) {
 				printk("PCI->APIC IRQ transform: (B%d,I%d,P%d) -> 0x%02x\n",
 				       dev->bus->number, PCI_SLOT(dev->devfn), pin, vector);
 				dev->irq = vector;
 
+				irq_type = &irq_type_iosapic_level;
+				idesc = irq_desc(vector);
+				if (idesc->handler != irq_type){
+					if (idesc->handler != &no_irq_type)
+						printk("iosapic_pci_fixup: changing vector 0x%02x "
+						       "from %s to %s\n", vector,
+						       idesc->handler->typename,
+						       irq_type->typename);
+					idesc->handler = irq_type;
+				}
 #ifdef CONFIG_SMP
 				/*
 				 * For platforms that do not support interrupt redirect
@@ -638,7 +692,16 @@
 					cpu_index++;
 					if (cpu_index >= smp_num_cpus)
 						cpu_index = 0;
+				} else {
+					/*
+					 * Direct the interrupt vector to the current cpu,
+					 * platform redirection will distribute them.
+					 */
+					set_rte(vector, (ia64_get_lid() >> 16) & 0xffff);
 				}
+#else
+				/* direct the interrupt vector to the running cpu id */
+				set_rte(vector, (ia64_get_lid() >> 16) & 0xffff);
 #endif
 			}
 		}
diff -Nru linux/arch/ia64/kernel/irq.c linux-2.4.19-pre5-mjc/arch/ia64/kernel/irq.c
--- linux/arch/ia64/kernel/irq.c	Fri Nov  9 17:26:17 2001
+++ linux-2.4.19-pre5-mjc/arch/ia64/kernel/irq.c	Sat Apr  6 08:26:00 2002
@@ -287,10 +287,11 @@
 		 * already executing in one..
 		 */
 		if (!irqs_running())
-			if (local_bh_count() || !spin_is_locked(&global_bh_lock))
+			if (really_local_bh_count() || !spin_is_locked(&global_bh_lock))
 				break;
 
 		/* Duh, we have to loop. Release the lock to avoid deadlocks */
+		smp_mb__before_clear_bit();	/* need barrier before releasing lock... */
 		clear_bit(0,&global_irq_lock);
 
 		for (;;) {
@@ -305,7 +306,7 @@
 				continue;
 			if (global_irq_lock)
 				continue;
-			if (!local_bh_count() && spin_is_locked(&global_bh_lock))
+			if (!really_local_bh_count() && spin_is_locked(&global_bh_lock))
 				continue;
 			if (!test_and_set_bit(0,&global_irq_lock))
 				break;
@@ -378,14 +379,14 @@
 	__save_flags(flags);
 	if (flags & IA64_PSR_I) {
 		__cli();
-		if (!local_irq_count())
+		if (!really_local_irq_count())
 			get_irqlock();
 	}
 #else
 	__save_flags(flags);
 	if (flags & (1 << EFLAGS_IF_SHIFT)) {
 		__cli();
-		if (!local_irq_count())
+		if (!really_local_irq_count())
 			get_irqlock();
 	}
 #endif
@@ -393,7 +394,7 @@
 
 void __global_sti(void)
 {
-	if (!local_irq_count())
+	if (!really_local_irq_count())
 		release_irqlock(smp_processor_id());
 	__sti();
 }
@@ -422,7 +423,7 @@
 	retval = 2 + local_enabled;
 
 	/* check for global flags if we're not in an interrupt */
-	if (!local_irq_count()) {
+	if (!really_local_irq_count()) {
 		if (local_enabled)
 			retval = 1;
 		if (global_irq_holder == cpu)
@@ -529,7 +530,7 @@
 	disable_irq_nosync(irq);
 
 #ifdef CONFIG_SMP
-	if (!local_irq_count()) {
+	if (!really_local_irq_count()) {
 		do {
 			barrier();
 		} while (irq_desc(irq)->status & IRQ_INPROGRESS);
@@ -1009,6 +1010,11 @@
 		rand_initialize_irq(irq);
 	}
 
+	if (new->flags & SA_PERCPU_IRQ) {
+		desc->status |= IRQ_PER_CPU;
+		desc->handler = &irq_type_ia64_lsapic;
+	}
+
 	/*
 	 * The following block of code has to be executed atomically
 	 */
@@ -1089,13 +1095,25 @@
 static struct proc_dir_entry * smp_affinity_entry [NR_IRQS];
 
 static unsigned long irq_affinity [NR_IRQS] = { [0 ... NR_IRQS-1] = ~0UL };
+static char irq_redir [NR_IRQS]; // = { [0 ... NR_IRQS-1] = 1 };
+
+void set_irq_affinity_info(int irq, int hwid, int redir)
+{
+	unsigned long mask = 1UL<<cpu_logical_id(hwid);
+
+	if (irq >= 0 && irq < NR_IRQS) {
+		irq_affinity[irq] = mask;
+		irq_redir[irq] = (char) (redir & 0xff);
+	}
+}
 
 static int irq_affinity_read_proc (char *page, char **start, off_t off,
 			int count, int *eof, void *data)
 {
-	if (count < HEX_DIGITS+1)
+	if (count < HEX_DIGITS+3)
 		return -EINVAL;
-	return sprintf (page, "%08lx\n", irq_affinity[(long)data]);
+	return sprintf (page, "%s%08lx\n", irq_redir[(long)data] ? "r " : "",
+			irq_affinity[(long)data]);
 }
 
 static int irq_affinity_write_proc (struct file *file, const char *buffer,
@@ -1103,11 +1121,20 @@
 {
 	int irq = (long) data, full_count = count, err;
 	unsigned long new_value;
+	const char *buf = buffer;
+	int redir;
 
 	if (!irq_desc(irq)->handler->set_affinity)
 		return -EIO;
 
-	err = parse_hex_value(buffer, count, &new_value);
+	if (buf[0] == 'r' || buf[0] == 'R') {
+		++buf;
+		while (*buf == ' ') ++buf;
+		redir = 1;
+	} else
+		redir = 0;
+
+	err = parse_hex_value(buf, count, &new_value);
 
 	/*
 	 * Do not allow disabling IRQs completely - it's a too easy
@@ -1117,8 +1144,7 @@
 	if (!(new_value & cpu_online_map))
 		return -EINVAL;
 
-	irq_affinity[irq] = new_value;
-	irq_desc(irq)->handler->set_affinity(irq, new_value);
+	irq_desc(irq)->handler->set_affinity(irq | (redir?(1<<31):0), new_value);
 
 	return full_count;
 }
diff -Nru linux/arch/ia64/kernel/ivt.S linux-2.4.19-pre5-mjc/arch/ia64/kernel/ivt.S
--- linux/arch/ia64/kernel/ivt.S	Fri Nov  9 17:26:17 2001
+++ linux-2.4.19-pre5-mjc/arch/ia64/kernel/ivt.S	Sat Apr  6 08:26:00 2002
@@ -275,6 +275,7 @@
 	mov r16=cr.ifa		// get address that caused the TLB miss
 	movl r17=PAGE_KERNEL
 	mov r21=cr.ipsr
+	movl r19=(((1 << IA64_MAX_PHYS_BITS) - 1) & ~0xfff)
 	mov r31=pr
 	;;
 #ifdef CONFIG_DISABLE_VHPT
@@ -289,12 +290,12 @@
 (p8)	br.cond.dptk itlb_fault
 #endif
 	extr.u r23=r21,IA64_PSR_CPL0_BIT,2	// extract psr.cpl
+	and r19=r19,r16		// clear ed, reserved bits, and PTE control bits
 	shr.u r18=r16,57	// move address bit 61 to bit 4
-	dep r19=0,r16,IA64_MAX_PHYS_BITS,(64-IA64_MAX_PHYS_BITS)	// clear ed & reserved bits
 	;;
 	andcm r18=0x10,r18	// bit 4=~address-bit(61)
 	cmp.ne p8,p0=r0,r23	// psr.cpl != 0?
-	dep r19=r17,r19,0,12	// insert PTE control bits into r19
+	or r19=r17,r19		// insert PTE control bits into r19
 	;;
 	or r19=r19,r18		// set bit 4 (uncached) if the access was to region 6
 (p8)	br.cond.spnt page_fault
@@ -312,6 +313,7 @@
 	mov r16=cr.ifa		// get address that caused the TLB miss
 	movl r17=PAGE_KERNEL
 	mov r20=cr.isr
+	movl r19=(((1 << IA64_MAX_PHYS_BITS) - 1) & ~0xfff)
 	mov r21=cr.ipsr
 	mov r31=pr
 	;;
@@ -328,15 +330,15 @@
 #endif
 	extr.u r23=r21,IA64_PSR_CPL0_BIT,2	// extract psr.cpl
 	tbit.nz p6,p7=r20,IA64_ISR_SP_BIT	// is speculation bit on?
+	and r19=r19,r16		// clear ed, reserved bits, and PTE control bits
 	shr.u r18=r16,57	// move address bit 61 to bit 4
-	dep r19=0,r16,IA64_MAX_PHYS_BITS,(64-IA64_MAX_PHYS_BITS) // clear ed & reserved bits
 	;;
 	andcm r18=0x10,r18	// bit 4=~address-bit(61)
 	cmp.ne p8,p0=r0,r23
 (p8)	br.cond.spnt page_fault
 
 	dep r21=-1,r21,IA64_PSR_ED_BIT,1
-	dep r19=r17,r19,0,12	// insert PTE control bits into r19
+	or r19=r19,r17		// insert PTE control bits into r19
 	;;
 	or r19=r19,r18		// set bit 4 (uncached) if the access was to region 6
 (p6)	mov cr.ipsr=r21
diff -Nru linux/arch/ia64/kernel/mca.c linux-2.4.19-pre5-mjc/arch/ia64/kernel/mca.c
--- linux/arch/ia64/kernel/mca.c	Fri Nov  9 17:26:17 2001
+++ linux-2.4.19-pre5-mjc/arch/ia64/kernel/mca.c	Sat Apr  6 08:26:00 2002
@@ -3,6 +3,9 @@
  * Purpose:	Generic MCA handling layer
  *
  * Updated for latest kernel
+ * Copyright (C) 2002 Intel
+ * Copyright (C) Jenna Hall (jenna.s.hall@intel.com)
+ *
  * Copyright (C) 2001 Intel
  * Copyright (C) Fred Lewis (frederick.v.lewis@intel.com)
  *
@@ -12,6 +15,11 @@
  * Copyright (C) 1999 Silicon Graphics, Inc.
  * Copyright (C) Vijay Chander(vijay@engr.sgi.com)
  *
+ * 02/01/04 J. Hall	Aligned MCA stack to 16 bytes, added platform vs. CPU
+ *			error flag, set SAL default return values, changed
+ *			error record structure to linked list, added init call
+ *			to sal_get_state_info_size().
+ *
  * 01/01/03 F. Lewis    Added setup of CMCI and CPEI IRQs, logging of corrected
  *                      platform errors, completed code for logging of
  *                      corrected & uncorrected machine check errors, and
@@ -27,6 +35,7 @@
 #include <linux/interrupt.h>
 #include <linux/irq.h>
 #include <linux/smp_lock.h>
+#include <linux/bootmem.h>
 
 #include <asm/machvec.h>
 #include <asm/page.h>
@@ -50,18 +59,22 @@
 ia64_mca_sal_to_os_state_t	ia64_sal_to_os_handoff_state;
 ia64_mca_os_to_sal_state_t	ia64_os_to_sal_handoff_state;
 u64				ia64_mca_proc_state_dump[512];
-u64				ia64_mca_stack[1024];
+u64				ia64_mca_stack[1024] __attribute__((aligned(16)));
 u64				ia64_mca_stackframe[32];
 u64				ia64_mca_bspstore[1024];
 u64				ia64_init_stack[INIT_TASK_SIZE] __attribute__((aligned(16)));
+u64				ia64_mca_sal_data_area[1356];
+u64				ia64_mca_min_state_save_info;
+u64				ia64_tlb_functional;
+u64				ia64_os_mca_recovery_successful;
 
 static void			ia64_mca_wakeup_ipi_wait(void);
 static void			ia64_mca_wakeup(int cpu);
 static void			ia64_mca_wakeup_all(void);
 static void			ia64_log_init(int);
-extern void		        ia64_monarch_init_handler (void);
-extern void		        ia64_slave_init_handler (void);
-extern struct hw_interrupt_type irq_type_iosapic_level;
+extern void			ia64_monarch_init_handler (void);
+extern void			ia64_slave_init_handler (void);
+extern struct hw_interrupt_type	irq_type_iosapic_level;
 
 static struct irqaction cmci_irqaction = {
 	handler:    ia64_mca_cmc_int_handler,
@@ -95,25 +108,31 @@
  *  memory.
  *
  *  Inputs  :   sal_info_type   (Type of error record MCA/CMC/CPE/INIT)
- *  Outputs :   None
+ *  Outputs :   platform error status
  */
-void
+int
 ia64_mca_log_sal_error_record(int sal_info_type)
 {
+	int platform_err = 0;
+
 	/* Get the MCA error record */
 	if (!ia64_log_get(sal_info_type, (prfunc_t)printk))
-		return;                 // no record retrieved
+		return platform_err;                 // no record retrieved
 
-	/* Log the error record */
-	ia64_log_print(sal_info_type, (prfunc_t)printk);
+	/* TODO:
+	 * 1. analyze error logs to determine recoverability
+	 * 2. perform error recovery procedures, if applicable
+	 * 3. set ia64_os_mca_recovery_successful flag, if applicable
+	 */
 
-	/* Clear the CMC SAL logs now that they have been logged */
+	platform_err = ia64_log_print(sal_info_type, (prfunc_t)printk);
 	ia64_sal_clear_state_info(sal_info_type);
+
+	return platform_err;
 }
 
 /*
- * hack for now, add platform dependent handlers
- * here
+ * platform dependent error handling
  */
 #ifndef PLATFORM_MCA_HANDLERS
 void
@@ -275,8 +294,8 @@
 	cmcv_reg_t	cmcv;
 
 	cmcv.cmcv_regval	= 0;
-	cmcv.cmcv_mask      = 0;        /* Unmask/enable interrupt */
-	cmcv.cmcv_vector    = IA64_CMC_VECTOR;
+	cmcv.cmcv_mask		= 0;        /* Unmask/enable interrupt */
+	cmcv.cmcv_vector	= IA64_CMC_VECTOR;
 	ia64_set_cmcv(cmcv.cmcv_regval);
 
 	IA64_MCA_DEBUG("ia64_mca_platform_init: CPU %d corrected "
@@ -374,6 +393,9 @@
 
 	IA64_MCA_DEBUG("ia64_mca_init: begin\n");
 
+	/* initialize recovery success indicator */
+	ia64_os_mca_recovery_successful = 0;
+
 	/* Clear the Rendez checkin flag for all cpus */
 	for(i = 0 ; i < NR_CPUS; i++)
 		ia64_mc_info.imi_rendez_checkin[i] = IA64_MCA_RENDEZ_CHECKIN_NOTDONE;
@@ -459,7 +481,7 @@
 
 	/*
 	 *  Configure the CMCI vector and handler. Interrupts for CMC are
-	 *  per-processor, so AP CMC interrupts are setup in smp_callin() (smp.c).
+	 *  per-processor, so AP CMC interrupts are setup in smp_callin() (smpboot.c).
 	 */
 	register_percpu_irq(IA64_CMC_VECTOR, &cmci_irqaction);
 	ia64_mca_cmc_vector_setup();       /* Setup vector on BSP & enable */
@@ -498,6 +520,9 @@
 	ia64_log_init(SAL_INFO_TYPE_CMC);
 	ia64_log_init(SAL_INFO_TYPE_CPE);
 
+	/* Zero the min state save info */
+	ia64_mca_min_state_save_info = 0;
+
 #if defined(MCA_TEST)
 	mca_test();
 #endif /* #if defined(MCA_TEST) */
@@ -576,7 +601,7 @@
 	int cpu;
 
 	/* Clear the Rendez checkin flag for all cpus */
-	for(cpu = 0 ; cpu < smp_num_cpus; cpu++)
+	for(cpu = 0; cpu < smp_num_cpus; cpu++)
 		if (ia64_mc_info.imi_rendez_checkin[cpu] == IA64_MCA_RENDEZ_CHECKIN_DONE)
 			ia64_mca_wakeup(cpu);
 
@@ -668,6 +693,13 @@
 
 	/* Cold Boot for uncorrectable MCA */
 	ia64_os_to_sal_handoff_state.imots_os_status = IA64_MCA_COLD_BOOT;
+
+	/* Default = tell SAL to return to same context */
+	ia64_os_to_sal_handoff_state.imots_context = IA64_MCA_SAME_CONTEXT;
+
+	/* Register pointer to new min state values */
+	/* NOTE: need to do something with this during recovery phase */
+	ia64_os_to_sal_handoff_state.imots_new_min_state = &ia64_mca_min_state_save_info;
 }
 
 /*
@@ -678,10 +710,10 @@
  *	This is the place where the core of OS MCA handling is done.
  *	Right now the logs are extracted and displayed in a well-defined
  *	format. This handler code is supposed to be run only on the
- *	monarch processor. Once the  monarch is done with MCA handling
+ *	monarch processor. Once the monarch is done with MCA handling
  *	further MCA logging is enabled by clearing logs.
  *	Monarch also has the duty of sending wakeup-IPIs to pull the
- *  slave processors out of rendezvous spinloop.
+ *	slave processors out of rendezvous spinloop.
  *
  *  Inputs  :   None
  *  Outputs :   None
@@ -689,20 +721,16 @@
 void
 ia64_mca_ucmc_handler(void)
 {
-#if 0   /* stubbed out @FVL */
-	/*
-	 *  Attempting to log a DBE error Causes "reserved register/field panic"
-	 *  in printk.
-	 */
+	int platform_err = 0;
 
 	/* Get the MCA error record and log it */
-	ia64_mca_log_sal_error_record(SAL_INFO_TYPE_MCA);
-#endif  /* stubbed out @FVL */
+	platform_err = ia64_mca_log_sal_error_record(SAL_INFO_TYPE_MCA);
 
 	/*
 	 *  Do Platform-specific mca error handling if required.
 	 */
-	mca_handler_platform() ;
+	if (platform_err)
+		mca_handler_platform();
 
 	/*
 	 *  Wakeup all the processors which are spinning in the rendezvous
@@ -749,13 +777,16 @@
 {
 	spinlock_t	isl_lock;
 	int		isl_index;
-	ia64_err_rec_t  isl_log[IA64_MAX_LOGS]; /* need space to store header + error log */
+	ia64_err_rec_t  *isl_log[IA64_MAX_LOGS]; /* need space to store header + error log */
 } ia64_state_log_t;
 
 static ia64_state_log_t ia64_state_log[IA64_MAX_LOG_TYPES];
 
-/* Note:  Some of these macros assume IA64_MAX_LOGS is always 2.  Should be */
-/* fixed. @FVL                                                              */
+#define IA64_LOG_ALLOCATE(it, size) \
+	{ia64_state_log[it].isl_log[IA64_LOG_CURR_INDEX(it)] = \
+		(ia64_err_rec_t *)alloc_bootmem(size); \
+	ia64_state_log[it].isl_log[IA64_LOG_NEXT_INDEX(it)] = \
+		(ia64_err_rec_t *)alloc_bootmem(size);}
 #define IA64_LOG_LOCK_INIT(it) spin_lock_init(&ia64_state_log[it].isl_lock)
 #define IA64_LOG_LOCK(it)      spin_lock_irqsave(&ia64_state_log[it].isl_lock, s)
 #define IA64_LOG_UNLOCK(it)    spin_unlock_irqrestore(&ia64_state_log[it].isl_lock,s)
@@ -765,13 +796,13 @@
     ia64_state_log[it].isl_index = 1 - ia64_state_log[it].isl_index
 #define IA64_LOG_INDEX_DEC(it) \
     ia64_state_log[it].isl_index = 1 - ia64_state_log[it].isl_index
-#define IA64_LOG_NEXT_BUFFER(it)   (void *)(&(ia64_state_log[it].isl_log[IA64_LOG_NEXT_INDEX(it)]))
-#define IA64_LOG_CURR_BUFFER(it)   (void *)(&(ia64_state_log[it].isl_log[IA64_LOG_CURR_INDEX(it)]))
+#define IA64_LOG_NEXT_BUFFER(it)   (void *)((ia64_state_log[it].isl_log[IA64_LOG_NEXT_INDEX(it)]))
+#define IA64_LOG_CURR_BUFFER(it)   (void *)((ia64_state_log[it].isl_log[IA64_LOG_CURR_INDEX(it)]))
 
 /*
  * C portion of the OS INIT handler
  *
- * Called from ia64_<monarch/slave>_init_handler
+ * Called from ia64_monarch_init_handler
  *
  * Inputs: pointer to pt_regs where processor info was saved.
  *
@@ -885,10 +916,18 @@
 void
 ia64_log_init(int sal_info_type)
 {
-	IA64_LOG_LOCK_INIT(sal_info_type);
+	u64	max_size = 0;
+
 	IA64_LOG_NEXT_INDEX(sal_info_type) = 0;
-	memset(IA64_LOG_NEXT_BUFFER(sal_info_type), 0,
-	       sizeof(ia64_err_rec_t) * IA64_MAX_LOGS);
+	IA64_LOG_LOCK_INIT(sal_info_type);
+
+	// SAL will tell us the maximum size of any error record of this type
+	max_size = ia64_sal_get_state_info_size(sal_info_type);
+
+	// set up OS data structures to hold error info
+	IA64_LOG_ALLOCATE(sal_info_type, max_size);
+	memset(IA64_LOG_CURR_BUFFER(sal_info_type), 0, max_size);
+	memset(IA64_LOG_NEXT_BUFFER(sal_info_type), 0, max_size);
 }
 
 /*
@@ -923,8 +962,7 @@
 		return total_len;
 	} else {
 		IA64_LOG_UNLOCK(sal_info_type);
-		prfunc("ia64_log_get: Failed to retrieve SAL error record type %d\n",
-		       sal_info_type);
+		prfunc("ia64_log_get: No SAL error record available for type %d\n", sal_info_type);
 		return 0;
 	}
 }
@@ -1268,7 +1306,7 @@
 	}
 
 	if (mdei->valid.oem_data) {
-		ia64_log_prt_oem_data((int)mdei->header.len,
+		platform_mem_dev_err_print((int)mdei->header.len,
 				      (int)sizeof(sal_log_mem_dev_err_info_t) - 1,
 				      &(mdei->oem_data[0]), prfunc);
 	}
@@ -1357,7 +1395,7 @@
 		prfunc("\n");
 
 	if (pbei->valid.oem_data) {
-		ia64_log_prt_oem_data((int)pbei->header.len,
+		platform_pci_bus_err_print((int)pbei->header.len,
 				      (int)sizeof(sal_log_pci_bus_err_info_t) - 1,
 				      &(pbei->oem_data[0]), prfunc);
 	}
@@ -1456,7 +1494,7 @@
 		}
 	}
 	if (pcei->valid.oem_data) {
-		ia64_log_prt_oem_data((int)pcei->header.len, n_pci_data,
+		platform_pci_comp_err_print((int)pcei->header.len, n_pci_data,
 				      p_oem_data, prfunc);
 		prfunc("\n");
 	}
@@ -1485,7 +1523,7 @@
 		ia64_log_prt_guid(&psei->guid, prfunc);
 	}
 	if (psei->valid.oem_data) {
-		ia64_log_prt_oem_data((int)psei->header.len,
+		platform_plat_specific_err_print((int)psei->header.len,
 				      (int)sizeof(sal_log_plat_specific_err_info_t) - 1,
 				      &(psei->oem_data[0]), prfunc);
 	}
@@ -1519,7 +1557,7 @@
 	if (hcei->valid.bus_spec_data)
 		prfunc(" Bus Specific Data: %#lx", hcei->bus_spec_data);
 	if (hcei->valid.oem_data) {
-		ia64_log_prt_oem_data((int)hcei->header.len,
+		platform_host_ctlr_err_print((int)hcei->header.len,
 				      (int)sizeof(sal_log_host_ctlr_err_info_t) - 1,
 				      &(hcei->oem_data[0]), prfunc);
 	}
@@ -1553,7 +1591,7 @@
 	if (pbei->valid.bus_spec_data)
 		prfunc(" Bus Specific Data: %#lx", pbei->bus_spec_data);
 	if (pbei->valid.oem_data) {
-		ia64_log_prt_oem_data((int)pbei->header.len,
+		platform_plat_bus_err_print((int)pbei->header.len,
 				      (int)sizeof(sal_log_plat_bus_err_info_t) - 1,
 				      &(pbei->oem_data[0]), prfunc);
 	}
@@ -1745,17 +1783,18 @@
  *  Inputs  :   lh      (Pointer to the sal error record header with format
  *                       specified by the SAL spec).
  *              prfunc  (fn ptr of log output function to use)
- *  Outputs :   None
+ *  Outputs :	platform error status
  */
-void
+int
 ia64_log_platform_info_print (sal_log_record_header_t *lh, prfunc_t prfunc)
 {
-	sal_log_section_hdr_t       *slsh;
-	int                         n_sects;
-	int                         ercd_pos;
+	sal_log_section_hdr_t	*slsh;
+	int			n_sects;
+	int			ercd_pos;
+	int			platform_err = 0;
 
 	if (!lh)
-		return;
+		return platform_err;
 
 #ifdef MCA_PRT_XTRA_DATA    // for test only @FVL
 	ia64_log_prt_record_header(lh, prfunc);
@@ -1765,7 +1804,7 @@
 		IA64_MCA_DEBUG("ia64_mca_log_print: "
 			       "truncated SAL error record. len = %d\n",
 			       lh->len);
-		return;
+		return platform_err;
 	}
 
 	/* Print record header info */
@@ -1796,35 +1835,43 @@
 			ia64_log_proc_dev_err_info_print((sal_log_processor_info_t *)slsh,
 							 prfunc);
 		} else if (efi_guidcmp(slsh->guid, SAL_PLAT_MEM_DEV_ERR_SECT_GUID) == 0) {
+			platform_err = 1;
 			prfunc("+Platform Memory Device Error Info Section\n");
 			ia64_log_mem_dev_err_info_print((sal_log_mem_dev_err_info_t *)slsh,
 							prfunc);
 		} else if (efi_guidcmp(slsh->guid, SAL_PLAT_SEL_DEV_ERR_SECT_GUID) == 0) {
+			platform_err = 1;
 			prfunc("+Platform SEL Device Error Info Section\n");
 			ia64_log_sel_dev_err_info_print((sal_log_sel_dev_err_info_t *)slsh,
 							prfunc);
 		} else if (efi_guidcmp(slsh->guid, SAL_PLAT_PCI_BUS_ERR_SECT_GUID) == 0) {
+			platform_err = 1;
 			prfunc("+Platform PCI Bus Error Info Section\n");
 			ia64_log_pci_bus_err_info_print((sal_log_pci_bus_err_info_t *)slsh,
 							prfunc);
 		} else if (efi_guidcmp(slsh->guid, SAL_PLAT_SMBIOS_DEV_ERR_SECT_GUID) == 0) {
+			platform_err = 1;
 			prfunc("+Platform SMBIOS Device Error Info Section\n");
 			ia64_log_smbios_dev_err_info_print((sal_log_smbios_dev_err_info_t *)slsh,
 							   prfunc);
 		} else if (efi_guidcmp(slsh->guid, SAL_PLAT_PCI_COMP_ERR_SECT_GUID) == 0) {
+			platform_err = 1;
 			prfunc("+Platform PCI Component Error Info Section\n");
 			ia64_log_pci_comp_err_info_print((sal_log_pci_comp_err_info_t *)slsh,
 							 prfunc);
 		} else if (efi_guidcmp(slsh->guid, SAL_PLAT_SPECIFIC_ERR_SECT_GUID) == 0) {
+			platform_err = 1;
 			prfunc("+Platform Specific Error Info Section\n");
 			ia64_log_plat_specific_err_info_print((sal_log_plat_specific_err_info_t *)
 							      slsh,
 							      prfunc);
 		} else if (efi_guidcmp(slsh->guid, SAL_PLAT_HOST_CTLR_ERR_SECT_GUID) == 0) {
+			platform_err = 1;
 			prfunc("+Platform Host Controller Error Info Section\n");
 			ia64_log_host_ctlr_err_info_print((sal_log_host_ctlr_err_info_t *)slsh,
 							  prfunc);
 		} else if (efi_guidcmp(slsh->guid, SAL_PLAT_BUS_ERR_SECT_GUID) == 0) {
+			platform_err = 1;
 			prfunc("+Platform Bus Error Info Section\n");
 			ia64_log_plat_bus_err_info_print((sal_log_plat_bus_err_info_t *)slsh,
 							 prfunc);
@@ -1838,8 +1885,9 @@
 		       n_sects, lh->len);
 	if (!n_sects) {
 		prfunc("No Platform Error Info Sections found\n");
-		return;
+		return platform_err;
 	}
+	return platform_err;
 }
 
 /*
@@ -1849,15 +1897,17 @@
  *
  *  Inputs   :  info_type   (SAL_INFO_TYPE_{MCA,INIT,CMC,CPE})
  *              prfunc      (fn ptr of log output function to use)
- * Outputs	:	None
+ * Outputs	:	platform error status
  */
-void
+int
 ia64_log_print(int sal_info_type, prfunc_t prfunc)
 {
+	int platform_err = 0;
+
 	switch(sal_info_type) {
 	      case SAL_INFO_TYPE_MCA:
 		prfunc("+BEGIN HARDWARE ERROR STATE AT MCA\n");
-		ia64_log_platform_info_print(IA64_LOG_CURR_BUFFER(sal_info_type), prfunc);
+		platform_err = ia64_log_platform_info_print(IA64_LOG_CURR_BUFFER(sal_info_type), prfunc);
 		prfunc("+END HARDWARE ERROR STATE AT MCA\n");
 		break;
 	      case SAL_INFO_TYPE_INIT:
@@ -1877,4 +1927,5 @@
 		prfunc("+MCA UNKNOWN ERROR LOG (UNIMPLEMENTED)\n");
 		break;
 	}
+	return platform_err;
 }
diff -Nru linux/arch/ia64/kernel/mca_asm.S linux-2.4.19-pre5-mjc/arch/ia64/kernel/mca_asm.S
--- linux/arch/ia64/kernel/mca_asm.S	Fri Nov  9 17:26:17 2001
+++ linux-2.4.19-pre5-mjc/arch/ia64/kernel/mca_asm.S	Sat Apr  6 08:26:00 2002
@@ -7,6 +7,12 @@
 // 00/03/29 cfleck Added code to save INIT handoff state in pt_regs format, switch to temp
 //		   kstack, switch modes, jump to C INIT handler
 //
+// 02/01/04 J.Hall <jenna.s.hall@intel.com>
+//		   Before entering virtual mode code:
+//		   1. Check for TLB CPU error
+//		   2. Restore current thread pointer to kr6
+//		   3. Move stack ptr 16 bytes to conform to C calling convention
+//
 #include <linux/config.h>
 
 #include <asm/asmmacro.h>
@@ -21,10 +27,21 @@
  */
 #define	MINSTATE_PHYS	/* Make sure stack access is physical for MINSTATE */
 
+/*
+ * Needed for ia64_sal call
+ */
+#define SAL_GET_STATE_INFO      0x01000001
+
+/*
+ * Needed for return context to SAL
+ */
+#define IA64_MCA_SAME_CONTEXT	0x0
+#define IA64_MCA_COLD_BOOT	-2
+
 #include "minstate.h"
 
 /*
- *  SAL_TO_OS_MCA_HANDOFF_STATE (SAL 3.0 spec)
+ * SAL_TO_OS_MCA_HANDOFF_STATE (SAL 3.0 spec)
  *		1. GR1 = OS GP
  *		2. GR8 = PAL_PROC physical address
  *		3. GR9 = SAL_PROC physical address
@@ -40,26 +57,34 @@
 	st8	[_tmp]=r9,0x08;;			\
 	st8	[_tmp]=r10,0x08;;			\
 	st8	[_tmp]=r11,0x08;;			\
-	st8	[_tmp]=r12,0x08;;
+	st8	[_tmp]=r12,0x08
 
 /*
- *  OS_MCA_TO_SAL_HANDOFF_STATE (SAL 3.0 spec)
- *      1. GR8 = OS_MCA return status
+ * OS_MCA_TO_SAL_HANDOFF_STATE (SAL 3.0 spec)
+ * (p6) is executed if we never entered virtual mode (TLB error)
+ * (p7) is executed if we entered virtual mode as expected (normal case)
+ *	1. GR8 = OS_MCA return status
  *	2. GR9 = SAL GP (physical)
- *      3. GR10 = 0/1 returning same/new context
- *      4. GR22 = New min state save area pointer
- *      returns ptr to SAL rtn save loc in _tmp
+ *	3. GR10 = 0/1 returning same/new context
+ *	4. GR22 = New min state save area pointer
+ *	returns ptr to SAL rtn save loc in _tmp
  */
-#define OS_MCA_TO_SAL_HANDOFF_STATE_RESTORE(_tmp)				\
-	movl	_tmp=ia64_os_to_sal_handoff_state;;				\
-	DATA_VA_TO_PA(_tmp);;							\
-	ld8	r8=[_tmp],0x08;;						\
-	ld8	r9=[_tmp],0x08;;						\
-	ld8     r10=[_tmp],0x08;;						\
-	ld8     r22=[_tmp],0x08;;						\
-	movl    _tmp=ia64_sal_to_os_handoff_state;;				\
-	DATA_VA_TO_PA(_tmp);;							\
-	add     _tmp=0x28,_tmp;;            // point to SAL rtn save location
+#define OS_MCA_TO_SAL_HANDOFF_STATE_RESTORE(_tmp)	\
+(p6)	movl	_tmp=ia64_sal_to_os_handoff_state;;	\
+(p7)	movl	_tmp=ia64_os_to_sal_handoff_state;;	\
+	DATA_VA_TO_PA(_tmp);;				\
+(p6)	movl	r8=IA64_MCA_COLD_BOOT;			\
+(p6)	movl	r10=IA64_MCA_SAME_CONTEXT;		\
+(p6)	add     _tmp=0x18,_tmp;;			\
+(p6)	ld8	r9=[_tmp],0x10;				\
+(p6)	movl	r22=ia64_mca_min_state_save_info;;	\
+(p7)	ld8	r8=[_tmp],0x08;;			\
+(p7)	ld8	r9=[_tmp],0x08;;			\
+(p7)	ld8     r10=[_tmp],0x08;;			\
+(p7)	ld8     r22=[_tmp],0x08;;			\
+	DATA_VA_TO_PA(r22)
+	// now _tmp is pointing to SAL rtn save location
+
 
 	.global ia64_os_mca_dispatch
 	.global ia64_os_mca_dispatch_end
@@ -70,6 +95,9 @@
 	.global	ia64_mca_stackframe
 	.global	ia64_mca_bspstore
 	.global ia64_init_stack
+	.global ia64_mca_sal_data_area
+	.global ia64_tlb_functional
+	.global ia64_mca_min_state_save_info
 
 	.text
 	.align 16
@@ -90,26 +118,34 @@
 	//	  for ia64_mca_sal_to_os_state_t has been
 	//	  defined in include/asm/mca.h
 	SAL_TO_OS_MCA_HANDOFF_STATE_SAVE(r2)
+	;;
 
 	// LOG PROCESSOR STATE INFO FROM HERE ON..
-	;;
 begin_os_mca_dump:
 	br	ia64_os_mca_proc_state_dump;;
 
 ia64_os_mca_done_dump:
 
 	// Setup new stack frame for OS_MCA handling
-	movl    r2=ia64_mca_bspstore;;      // local bspstore area location in r2
+	movl	r2=ia64_mca_bspstore;;	// local bspstore area location in r2
 	DATA_VA_TO_PA(r2);;
-	movl    r3=ia64_mca_stackframe;;    // save stack frame to memory in r3
+	movl	r3=ia64_mca_stackframe;; // save stack frame to memory in r3
 	DATA_VA_TO_PA(r3);;
-	rse_switch_context(r6,r3,r2);;                  // RSC management in this new context
-	movl        r12=ia64_mca_stack;;
-	mov     r2=8*1024;;                 // stack size must be same as c array
-	add     r12=r2,r12;;                // stack base @ bottom of array
+	rse_switch_context(r6,r3,r2);;	// RSC management in this new context
+	movl	r12=ia64_mca_stack
+	mov	r2=8*1024;;		// stack size must be same as C array
+	add	r12=r2,r12;;		// stack base @ bottom of array
+	adds	r12=-16,r12;;		// allow 16 bytes of scratch
+					// (C calling convention)
 	DATA_VA_TO_PA(r12);;
 
-	// Enter virtual mode from physical mode
+	// Check to see if the MCA resulted from a TLB error
+begin_tlb_error_check:
+        br      ia64_os_mca_tlb_error_check;;
+
+done_tlb_error_check:
+
+        // If TLB is functional, enter virtual mode from physical mode
 	VIRTUAL_MODE_ENTER(r2, r3, ia64_os_mca_virtual_begin, r4)
 ia64_os_mca_virtual_begin:
 
@@ -130,25 +166,28 @@
 #endif	/* #if defined(MCA_TEST) */
 
 	// restore the original stack frame here
-	movl    r2=ia64_mca_stackframe               // restore stack frame from memory at r2
+	movl    r2=ia64_mca_stackframe	// restore stack frame from memory at r2
 	;;
 	DATA_VA_TO_PA(r2)
 	movl    r4=IA64_PSR_MC
 	;;
-	rse_return_context(r4,r3,r2)                 // switch from interrupt context for RSE
+	rse_return_context(r4,r3,r2)	// switch from interrupt context for RSE
 
 	// let us restore all the registers from our PSI structure
-	mov		r8=gp
+	mov	r8=gp
 	;;
 begin_os_mca_restore:
 	br	ia64_os_mca_proc_state_restore;;
 
 ia64_os_mca_done_restore:
-	;;
+	movl	r3=ia64_tlb_functional;;
+	DATA_VA_TO_PA(r3);;
+	ld8	r3=[r3];;
+	cmp.eq	p6,p7=r0,r3;;
+	OS_MCA_TO_SAL_HANDOFF_STATE_RESTORE(r2);;
 	// branch back to SALE_CHECK
-	OS_MCA_TO_SAL_HANDOFF_STATE_RESTORE(r2)
 	ld8		r3=[r2];;
-	mov		b0=r3;;			      // SAL_CHECK return address
+	mov		b0=r3;;		// SAL_CHECK return address
 	br		b0
 	;;
 ia64_os_mca_dispatch_end:
@@ -405,7 +444,7 @@
 	movl		r2=ia64_mca_proc_state_dump	// Convert virtual address
 	;;						// of OS state dump area
 	DATA_VA_TO_PA(r2)				// to physical address
-	;;
+
 restore_GRs:                                    // restore bank-1 GRs 16-31
 	bsw.1;;
 	add		r3=16*8,r2;;                // to get to NaT of GR 16-31
@@ -621,6 +660,80 @@
 
 //EndStub//////////////////////////////////////////////////////////////////////
 
+//++
+// Name:
+//	ia64_os_mca_tlb_error_check()
+//
+// Stub Description:
+//
+//	This stub checks to see if the MCA resulted from a TLB error
+//
+//--
+
+ia64_os_mca_tlb_error_check:
+
+	// Retrieve sal data structure for uncorrected MCA
+
+	// Make the ia64_sal_get_state_info() call
+	movl	r4=ia64_mca_sal_data_area;;
+	movl	r7=ia64_sal;;
+	mov	r6=r1			// save gp
+	DATA_VA_TO_PA(r4)		// convert to physical address
+	DATA_VA_TO_PA(r7);;		// convert to physical address
+	ld8	r7=[r7]			// get addr of pdesc from ia64_sal
+	movl	r3=SAL_GET_STATE_INFO;;
+	DATA_VA_TO_PA(r7);;		// convert to physical address
+	ld8	r8=[r7],8;;		// get pdesc function pointer
+	DATA_VA_TO_PA(r8)		// convert to physical address
+	ld8	r1=[r7];;		// set new (ia64_sal) gp
+	DATA_VA_TO_PA(r1)		// convert to physical address
+	mov	b6=r8
+
+	alloc	r5=ar.pfs,8,0,8,0;;	// allocate stack frame for SAL call
+	mov	out0=r3			// which SAL proc to call
+	mov	out1=r0			// error type == MCA
+	mov	out2=r0			// null arg
+	mov	out3=r4			// data copy area
+	mov	out4=r0			// null arg
+	mov	out5=r0			// null arg
+	mov	out6=r0			// null arg
+	mov	out7=r0;;		// null arg
+
+	br.call.sptk.few	b0=b6;;
+
+	mov	r1=r6			// restore gp
+	mov	ar.pfs=r5;;		// restore ar.pfs
+
+	movl	r6=ia64_tlb_functional;;
+	DATA_VA_TO_PA(r6)		// needed later
+
+	cmp.eq	p6,p7=r0,r8;;		// check SAL call return address
+(p7)	st8	[r6]=r0			// clear tlb_functional flag
+(p7)    br	tlb_failure		// error; return to SAL
+
+	// examine processor error log for type of error
+	add	r4=40+24,r4;;		// parse past record header (length=40)
+					// and section header (length=24)
+	ld4	r4=[r4]			// get valid field of processor log
+	mov	r5=0xf00;;
+	and	r5=r4,r5;;		// read bits 8-11 of valid field
+					// to determine if we have a TLB error
+	movl	r3=0x1
+	cmp.eq	p6,p7=r0,r5;;
+	// if no TLB failure, set tlb_functional flag
+(p6)	st8	[r6]=r3
+	// else clear flag
+(p7)	st8	[r6]=r0
+
+	// if no TLB failure, continue with normal virtual mode logging
+(p6)    br	done_tlb_error_check
+	// else no point in entering virtual mode for logging
+tlb_failure:
+	br      ia64_os_mca_virtual_end
+
+//EndStub//////////////////////////////////////////////////////////////////////
+
+
 // ok, the issue here is that we need to save state information so
 // it can be useable by the kernel debugger and show regs routines.
 // In order to do this, our best bet is save the current state (plus
@@ -633,7 +746,7 @@
 // This has been defined for registration purposes with SAL
 // as a part of ia64_mca_init.
 //
-// When we get here, the follow registers have been
+// When we get here, the following registers have been
 // set by the SAL for our use
 //
 //		1. GR1 = OS INIT GP
@@ -649,42 +762,10 @@
 
 
 GLOBAL_ENTRY(ia64_monarch_init_handler)
-#if defined(CONFIG_SMP) && defined(SAL_MPINIT_WORKAROUND)
-	//
-	// work around SAL bug that sends all processors to monarch entry
-	//
-	mov	r17=cr.lid
-	// XXX fix me: this is wrong: hard_smp_processor_id() is a pair of lid/eid
-	movl	r18=ia64_cpu_to_sapicid
-	;;
-	dep	r18=0,r18,61,3		// convert to physical address
-	;;
-	shr.u	r17=r17,16
-	ld4	r18=[r18]		// get the BSP ID
-	;;
-	dep	r17=0,r17,16,48
-	;;
-	cmp4.ne	p6,p0=r17,r18		// Am I the BSP ?
-(p6)	br.cond.spnt slave_init_spin_me
-	;;
-#endif
-
 
-//
-// ok, the first thing we do is stash the information
-// the SAL passed to os
-//
-_tmp = r2
-	movl	_tmp=ia64_sal_to_os_handoff_state
-	;;
-	dep	_tmp=0,_tmp, 61, 3	// get physical address
+	// stash the information the SAL passed to os
+	SAL_TO_OS_MCA_HANDOFF_STATE_SAVE(r2)
 	;;
-	st8	[_tmp]=r1,0x08;;
-	st8	[_tmp]=r8,0x08;;
-	st8	[_tmp]=r9,0x08;;
-	st8	[_tmp]=r10,0x08;;
-	st8	[_tmp]=r11,0x08;;
-	st8	[_tmp]=r12,0x08;;
 
 // now we want to save information so we can dump registers
 	SAVE_MIN_WITH_COVER
@@ -695,12 +776,10 @@
 	;;
 	SAVE_REST
 
-// ok, enough should be saved at this point to be dangerous, and  supply
+// ok, enough should be saved at this point to be dangerous, and supply
 // information for a dump
 // We need to switch to Virtual mode before hitting the C functions.
-//
-//
-//
+
 	movl	r2=IA64_PSR_IT|IA64_PSR_IC|IA64_PSR_DT|IA64_PSR_RT|IA64_PSR_DFH|IA64_PSR_BN
 	mov	r3=psr	// get the current psr, minimum enabled at this point
 	;;
@@ -708,8 +787,8 @@
 	;;
 	movl	r3=IVirtual_Switch
 	;;
-	mov	cr.iip=r3		// short return to set the appropriate bits
-	mov	cr.ipsr=r2		// need to do an rfi to set appropriate bits
+	mov	cr.iip=r3	// short return to set the appropriate bits
+	mov	cr.ipsr=r2	// need to do an rfi to set appropriate bits
 	;;
 	rfi
 	;;
@@ -717,7 +796,7 @@
 	//
 	// We should now be running virtual
 	//
-	// Lets call the C handler to get the rest of the state info
+	// Let's call the C handler to get the rest of the state info
 	//
 	alloc r14=ar.pfs,0,0,1,0		// now it's safe (must be first in insn group!)
 	;;					//
diff -Nru linux/arch/ia64/kernel/palinfo.c linux-2.4.19-pre5-mjc/arch/ia64/kernel/palinfo.c
--- linux/arch/ia64/kernel/palinfo.c	Fri Nov  9 17:26:17 2001
+++ linux-2.4.19-pre5-mjc/arch/ia64/kernel/palinfo.c	Sat Apr  6 08:26:00 2002
@@ -724,7 +724,7 @@
 
 		status = ia64_pal_tr_read(j, i, tr_buffer, &tr_valid);
 		if (status != 0) {
-			printk(__FUNCTION__ " pal call failed on tr[%d:%d]=%ld\n", i, j, status);
+			printk("palinfo: pal call failed on tr[%d:%d]=%ld\n", i, j, status);
 			continue;
 		}
 
@@ -842,9 +842,8 @@
 palinfo_smp_call(void *info)
 {
 	palinfo_smp_data_t *data = (palinfo_smp_data_t *)info;
-	/* printk(__FUNCTION__" called on CPU %d\n", smp_processor_id());*/
 	if (data == NULL) {
-		printk(KERN_ERR __FUNCTION__" data pointer is NULL\n");
+		printk("%s palinfo: data pointer is NULL\n", KERN_ERR);
 		data->ret = 0; /* no output */
 		return;
 	}
@@ -868,11 +867,10 @@
 	ptr.page = page;
 	ptr.ret  = 0; /* just in case */
 
-	/*printk(__FUNCTION__" calling CPU %d from CPU %d for function %d\n", f->req_cpu,smp_processor_id(), f->func_id);*/
 
 	/* will send IPI to other CPU and wait for completion of remote call */
 	if ((ret=smp_call_function_single(f->req_cpu, palinfo_smp_call, &ptr, 0, 1))) {
-		printk(__FUNCTION__" remote CPU call from %d to %d on function %d: error %d\n", smp_processor_id(), f->req_cpu, f->func_id, ret);
+		printk("palinfo: remote CPU call from %d to %d on function %d: error %d\n", smp_processor_id(), f->req_cpu, f->func_id, ret);
 		return 0;
 	}
 	return ptr.ret;
@@ -881,7 +879,7 @@
 static
 int palinfo_handle_smp(pal_func_cpu_u_t *f, char *page)
 {
-	printk(__FUNCTION__" should not be called with non SMP kernel\n");
+	printk("palinfo: should not be called with non SMP kernel\n");
 	return 0;
 }
 #endif /* CONFIG_SMP */
diff -Nru linux/arch/ia64/kernel/perfmon.c linux-2.4.19-pre5-mjc/arch/ia64/kernel/perfmon.c
--- linux/arch/ia64/kernel/perfmon.c	Fri Nov  9 17:26:17 2001
+++ linux-2.4.19-pre5-mjc/arch/ia64/kernel/perfmon.c	Sat Apr  6 08:26:00 2002
@@ -1,13 +1,16 @@
 /*
- * This file contains the code to configure and read/write the ia64 performance
- * monitoring stuff.
+ * This file implements the perfmon subsystem which is used
+ * to program the IA-64 Performance Monitoring Unit (PMU).
  *
  * Originaly Written by Ganesh Venkitachalam, IBM Corp.
- * Modifications by David Mosberger-Tang, Hewlett-Packard Co.
- * Modifications by Stephane Eranian, Hewlett-Packard Co.
  * Copyright (C) 1999 Ganesh Venkitachalam <venkitac@us.ibm.com>
- * Copyright (C) 1999 David Mosberger-Tang <davidm@hpl.hp.com>
- * Copyright (C) 2000-2001 Stephane Eranian <eranian@hpl.hp.com>
+ *
+ * Modifications by Stephane Eranian, Hewlett-Packard Co.
+ * Modifications by David Mosberger-Tang, Hewlett-Packard Co.
+ *
+ * Copyright (C) 1999-2002  Hewlett Packard Co
+ *               Stephane Eranian <eranian@hpl.hp.com>
+ *               David Mosberger-Tang <davidm@hpl.hp.com>
  */
 
 #include <linux/config.h>
@@ -22,151 +25,137 @@
 #include <linux/mm.h>
 
 #include <asm/bitops.h>
-#include <asm/efi.h>
 #include <asm/errno.h>
-#include <asm/hw_irq.h>
 #include <asm/page.h>
 #include <asm/pal.h>
 #include <asm/perfmon.h>
-#include <asm/pgtable.h>
 #include <asm/processor.h>
 #include <asm/signal.h>
 #include <asm/system.h>
-#include <asm/system.h>
 #include <asm/uaccess.h>
 #include <asm/delay.h> /* for ia64_get_itc() */
 
 #ifdef CONFIG_PERFMON
 
-#define PFM_VERSION		"0.3"
-#define PFM_SMPL_HDR_VERSION	1
-
-#define PMU_FIRST_COUNTER	4	/* first generic counter */
-
-#define PFM_WRITE_PMCS		0xa0
-#define PFM_WRITE_PMDS		0xa1
-#define PFM_READ_PMDS		0xa2
-#define PFM_STOP		0xa3
-#define PFM_START		0xa4
-#define PFM_ENABLE		0xa5	/* unfreeze only */
-#define PFM_DISABLE		0xa6	/* freeze only */
-#define PFM_RESTART		0xcf
-#define PFM_CREATE_CONTEXT	0xa7
-#define PFM_DESTROY_CONTEXT	0xa8
 /*
- * Those 2 are just meant for debugging. I considered using sysctl() for
- * that but it is a little bit too pervasive. This solution is at least
- * self-contained.
+ * For PMUs which rely on the debug registers for some features, you must
+ * you must enable the following flag to activate the support for
+ * accessing the registers via the perfmonctl() interface.
  */
-#define PFM_DEBUG_ON		0xe0
-#define PFM_DEBUG_OFF		0xe1
-
-#define PFM_DEBUG_BASE		PFM_DEBUG_ON
-
+#ifdef CONFIG_ITANIUM
+#define PFM_PMU_USES_DBR	1
+#endif
 
 /*
- * perfmon API flags
+ * perfmon context states
  */
-#define PFM_FL_INHERIT_NONE	 0x00	/* never inherit a context across fork (default) */
-#define PFM_FL_INHERIT_ONCE	 0x01	/* clone pfm_context only once across fork() */
-#define PFM_FL_INHERIT_ALL	 0x02	/* always clone pfm_context across fork() */
-#define PFM_FL_SMPL_OVFL_NOBLOCK 0x04	/* do not block on sampling buffer overflow */
-#define PFM_FL_SYSTEM_WIDE	 0x08	/* create a system wide context */
-#define PFM_FL_EXCL_INTR	 0x10	/* exclude interrupt from system wide monitoring */
+#define PFM_CTX_DISABLED	0
+#define PFM_CTX_ENABLED		1
 
 /*
- * PMC API flags
+ * Reset register flags
  */
-#define PFM_REGFL_OVFL_NOTIFY	1		/* send notification on overflow */
+#define PFM_RELOAD_LONG_RESET	1
+#define PFM_RELOAD_SHORT_RESET	2
 
 /*
- * Private flags and masks
+ * Misc macros and definitions
  */
+#define PMU_FIRST_COUNTER	4
+
+#define PFM_IS_DISABLED() pmu_conf.pfm_is_disabled
+
+#define PMC_OVFL_NOTIFY(ctx, i)	((ctx)->ctx_soft_pmds[i].flags &  PFM_REGFL_OVFL_NOTIFY)
 #define PFM_FL_INHERIT_MASK	(PFM_FL_INHERIT_NONE|PFM_FL_INHERIT_ONCE|PFM_FL_INHERIT_ALL)
 
-#ifdef CONFIG_SMP
-#define cpu_is_online(i) (cpu_online_map & (1UL << i))
-#else
-#define cpu_is_online(i)	1
-#endif
+#define PMC_IS_IMPL(i)	  (i<pmu_conf.num_pmcs && pmu_conf.impl_regs[i>>6] & (1UL<< (i) %64))
+#define PMD_IS_IMPL(i)	  (i<pmu_conf.num_pmds &&  pmu_conf.impl_regs[4+(i>>6)] & (1UL<<(i) % 64))
+
+#define PMD_IS_COUNTING(i) (i >=0  && i < 256 && pmu_conf.counter_pmds[i>>6] & (1UL <<(i) % 64))
+#define PMC_IS_COUNTING(i) PMD_IS_COUNTING(i)
+
+#define IBR_IS_IMPL(k)	  (k<pmu_conf.num_ibrs)
+#define DBR_IS_IMPL(k)	  (k<pmu_conf.num_dbrs)
+
+#define PMC_IS_BTB(a)	  (((pfm_monitor_t *)(a))->pmc_es == PMU_BTB_EVENT)
+
+#define LSHIFT(x)		(1UL<<(x))
+#define PMM(x)			LSHIFT(x)
+#define PMC_IS_MONITOR(c)	((pmu_conf.monitor_pmcs[0] & PMM((c))) != 0)
+
+#define CTX_IS_ENABLED(c) 	((c)->ctx_flags.state == PFM_CTX_ENABLED)
+#define CTX_OVFL_NOBLOCK(c)	((c)->ctx_fl_block == 0)
+#define CTX_INHERIT_MODE(c)	((c)->ctx_fl_inherit)
+#define CTX_HAS_SMPL(c)		((c)->ctx_psb != NULL)
+#define CTX_USED_PMD(ctx,n) 	(ctx)->ctx_used_pmds[(n)>>6] |= 1UL<< ((n) % 64)
+
+#define CTX_USED_IBR(ctx,n) 	(ctx)->ctx_used_ibrs[(n)>>6] |= 1UL<< ((n) % 64)
+#define CTX_USED_DBR(ctx,n) 	(ctx)->ctx_used_dbrs[(n)>>6] |= 1UL<< ((n) % 64)
+#define CTX_USES_DBREGS(ctx)	(((pfm_context_t *)(ctx))->ctx_fl_using_dbreg==1)
+
+#define LOCK_CTX(ctx)	spin_lock(&(ctx)->ctx_lock)
+#define UNLOCK_CTX(ctx)	spin_unlock(&(ctx)->ctx_lock)
+
+#define SET_PMU_OWNER(t)    do { pmu_owners[smp_processor_id()].owner = (t); } while(0)
+#define PMU_OWNER()	    pmu_owners[smp_processor_id()].owner
+
+#define LOCK_PFS()	    spin_lock(&pfm_sessions.pfs_lock)
+#define UNLOCK_PFS()	    spin_unlock(&pfm_sessions.pfs_lock)
+
+#define PFM_REG_RETFLAG_SET(flags, val)	do { flags &= ~PFM_REG_RETFL_MASK; flags |= (val); } while(0)
+
+/*
+ * debugging
+ */
+#define DBprintk(a) \
+	do { \
+		if (pfm_debug_mode >0) { printk("%s.%d: CPU%d ", __FUNCTION__, __LINE__, smp_processor_id()); printk a; } \
+	} while (0)
 
-#define PMC_IS_IMPL(i)		(i < pmu_conf.num_pmcs && pmu_conf.impl_regs[i>>6] & (1<< (i&~(64-1))))
-#define PMD_IS_IMPL(i)		(i < pmu_conf.num_pmds &&  pmu_conf.impl_regs[4+(i>>6)] & (1<< (i&~(64-1))))
-#define PMD_IS_COUNTER(i)	(i>=PMU_FIRST_COUNTER && i < (PMU_FIRST_COUNTER+pmu_conf.max_counters))
-#define PMC_IS_COUNTER(i)	(i>=PMU_FIRST_COUNTER && i < (PMU_FIRST_COUNTER+pmu_conf.max_counters))
 
-/* This is the Itanium-specific PMC layout for counter config */
+/* 
+ * These are some helpful architected PMC and IBR/DBR register layouts
+ */
 typedef struct {
 	unsigned long pmc_plm:4;	/* privilege level mask */
 	unsigned long pmc_ev:1;		/* external visibility */
 	unsigned long pmc_oi:1;		/* overflow interrupt */
 	unsigned long pmc_pm:1;		/* privileged monitor */
 	unsigned long pmc_ig1:1;	/* reserved */
-	unsigned long pmc_es:7;		/* event select */
-	unsigned long pmc_ig2:1;	/* reserved */
-	unsigned long pmc_umask:4;	/* unit mask */
-	unsigned long pmc_thres:3;	/* threshold */
-	unsigned long pmc_ig3:1;	/* reserved (missing from table on p6-17) */
-	unsigned long pmc_ism:2;	/* instruction set mask */
-	unsigned long pmc_ig4:38;	/* reserved */
-} pmc_counter_reg_t;
-
-/* test for EAR/BTB configuration */
-#define PMU_DEAR_EVENT	0x67
-#define PMU_IEAR_EVENT	0x23
-#define PMU_BTB_EVENT	0x11
-
-#define PMC_IS_DEAR(a)		(((pmc_counter_reg_t *)(a))->pmc_es == PMU_DEAR_EVENT)
-#define PMC_IS_IEAR(a)		(((pmc_counter_reg_t *)(a))->pmc_es == PMU_IEAR_EVENT)
-#define PMC_IS_BTB(a)		(((pmc_counter_reg_t *)(a))->pmc_es == PMU_BTB_EVENT)
-
-/*
- * This header is at the beginning of the sampling buffer returned to the user.
- * It is exported as Read-Only at this point. It is directly followed with the
- * first record.
- */
-typedef struct {
-	int		hdr_version;		/* could be used to differentiate formats */
-	int		hdr_reserved;
-	unsigned long	hdr_entry_size;		/* size of one entry in bytes */
-	unsigned long	hdr_count;		/* how many valid entries */
-	unsigned long	hdr_pmds;		/* which pmds are recorded */
-} perfmon_smpl_hdr_t;
-
-/*
- * Header entry in the buffer as a header as follows.
- * The header is directly followed with the PMDS to saved in increasing index order:
- * PMD4, PMD5, .... How many PMDs are present is determined by the tool which must
- * keep track of it when generating the final trace file.
- */
-typedef struct {
-	int		pid;		/* identification of process */
-	int		cpu;		/* which cpu was used */
-	unsigned long	rate;		/* initial value of this counter */
-	unsigned long	stamp;		/* timestamp */
-	unsigned long	ip;		/* where did the overflow interrupt happened */
-	unsigned long	regs;		/* which registers overflowed (up to 64)*/
-} perfmon_smpl_entry_t;
+	unsigned long pmc_es:8;		/* event select */
+	unsigned long pmc_ig2:48;	/* reserved */
+} pfm_monitor_t;
 
 /*
  * There is one such data structure per perfmon context. It is used to describe the
- * sampling buffer. It is to be shared among siblings whereas the pfm_context isn't.
+ * sampling buffer. It is to be shared among siblings whereas the pfm_context 
+ * is not.
  * Therefore we maintain a refcnt which is incremented on fork().
- * This buffer is private to the kernel only the actual sampling buffer including its
- * header are exposed to the user. This construct allows us to export the buffer read-write,
- * if needed, without worrying about security problems.
- */
-typedef struct {
-	atomic_t		psb_refcnt;	/* how many users for the buffer */
-	int			reserved;
+ * This buffer is private to the kernel only the actual sampling buffer 
+ * including its header are exposed to the user. This construct allows us to 
+ * export the buffer read-write, if needed, without worrying about security 
+ * problems.
+ */
+typedef struct _pfm_smpl_buffer_desc {
+	spinlock_t		psb_lock;	/* protection lock */
+	unsigned long		psb_refcnt;	/* how many users for the buffer */
+	int			psb_flags;	/* bitvector of flags */
+
 	void			*psb_addr;	/* points to location of first entry */
 	unsigned long		psb_entries;	/* maximum number of entries */
 	unsigned long		psb_size;	/* aligned size of buffer */
-	unsigned long		psb_index;	/* next free entry slot */
+	unsigned long		psb_index;	/* next free entry slot XXX: must use the one in buffer */
 	unsigned long		psb_entry_size;	/* size of each entry including entry header */
 	perfmon_smpl_hdr_t	*psb_hdr;	/* points to sampling buffer header */
+
+	struct _pfm_smpl_buffer_desc *psb_next;	/* next psb, used for rvfreeing of psb_hdr */
+
 } pfm_smpl_buffer_desc_t;
 
+#define LOCK_PSB(p)	spin_lock(&(p)->psb_lock)
+#define UNLOCK_PSB(p)	spin_unlock(&(p)->psb_lock)
+
+#define PFM_PSB_VMA	0x1			/* a VMA is describing the buffer */
 
 /*
  * This structure is initialized at boot time and contains
@@ -180,126 +169,192 @@
 	unsigned long num_pmcs ;	/* highest PMC implemented (may have holes) */
 	unsigned long num_pmds;		/* highest PMD implemented (may have holes) */
 	unsigned long impl_regs[16];	/* buffer used to hold implememted PMC/PMD mask */
+	unsigned long num_ibrs;		/* number of instruction debug registers */
+	unsigned long num_dbrs;		/* number of data debug registers */
+	unsigned long monitor_pmcs[4];	/* which pmc are controlling monitors */
+	unsigned long counter_pmds[4];	/* which pmd are used as counters */
 } pmu_config_t;
 
-#define PERFMON_IS_DISABLED() pmu_conf.pfm_is_disabled
-
+/*
+ * 64-bit software counter structure
+ */
 typedef struct {
-	__u64		val;		/* virtual 64bit counter value */
-	__u64		ival;		/* initial value from user */
-	__u64		smpl_rval;	/* reset value on sampling overflow */
-	__u64		ovfl_rval;	/* reset value on overflow */
-	int		flags;		/* notify/do not notify */
+	u64 val;	/* virtual 64bit counter value */
+	u64 ival;	/* initial value from user */
+	u64 long_reset;	/* reset value on sampling overflow */
+	u64 short_reset;/* reset value on overflow */
+	u64 reset_pmds[4]; /* which other pmds to reset when this counter overflows */
+	int flags;	/* notify/do not notify */
 } pfm_counter_t;
-#define PMD_OVFL_NOTIFY(ctx, i)	((ctx)->ctx_pmds[i].flags &  PFM_REGFL_OVFL_NOTIFY)
 
 /*
- * perfmon context. One per process, is cloned on fork() depending on inheritance flags
+ * perfmon context. One per process, is cloned on fork() depending on 
+ * inheritance flags
  */
 typedef struct {
-	unsigned int inherit:2;	/* inherit mode */
-	unsigned int noblock:1;	/* block/don't block on overflow with notification */
-	unsigned int system:1;	/* do system wide monitoring */
-	unsigned int frozen:1;	/* pmu must be kept frozen on ctxsw in */
-	unsigned int exclintr:1;/* exlcude interrupts from system wide monitoring */
-	unsigned int reserved:26;
+	unsigned int state:1;		/* 0=disabled, 1=enabled */
+	unsigned int inherit:2;		/* inherit mode */
+	unsigned int block:1;		/* when 1, task will blocked on user notifications */
+	unsigned int system:1;		/* do system wide monitoring */
+	unsigned int frozen:1;		/* pmu must be kept frozen on ctxsw in */
+	unsigned int protected:1;	/* allow access to creator of context only */
+	unsigned int using_dbreg:1;	/* using range restrictions (debug registers) */
+	unsigned int reserved:24;
 } pfm_context_flags_t;
 
+/*
+ * perfmon context: encapsulates all the state of a monitoring session
+ * XXX: probably need to change layout
+ */
 typedef struct pfm_context {
+	pfm_smpl_buffer_desc_t	*ctx_psb;		/* sampling buffer, if any */
+	unsigned long		ctx_smpl_vaddr;		/* user level virtual address of smpl buffer */
 
-	pfm_smpl_buffer_desc_t	*ctx_smpl_buf;		/* sampling buffer descriptor, if any */
-	unsigned long		ctx_dear_counter;	/* which PMD holds D-EAR */
-	unsigned long		ctx_iear_counter;	/* which PMD holds I-EAR */
-	unsigned long		ctx_btb_counter;	/* which PMD holds BTB */
-
-	spinlock_t		ctx_notify_lock;
+	spinlock_t		ctx_lock;
 	pfm_context_flags_t	ctx_flags;		/* block/noblock */
-	int			ctx_notify_sig;		/* XXX: SIGPROF or other */
+
 	struct task_struct	*ctx_notify_task;	/* who to notify on overflow */
-	struct task_struct	*ctx_creator;		/* pid of creator (debug) */
+	struct task_struct	*ctx_owner;		/* pid of creator (debug) */
+
+	unsigned long		ctx_ovfl_regs[4];	/* which registers overflowed (notification) */
+	unsigned long		ctx_smpl_regs[4];	/* which registers to record on overflow */
 
-	unsigned long		ctx_ovfl_regs;		/* which registers just overflowed (notification) */
-	unsigned long		ctx_smpl_regs;		/* which registers to record on overflow */
+	struct semaphore	ctx_restart_sem;   	/* use for blocking notification mode */
 
-	struct semaphore	ctx_restart_sem; 	/* use for blocking notification mode */
+	unsigned long		ctx_used_pmds[4];	/* bitmask of used PMD (speedup ctxsw) */
+	unsigned long		ctx_saved_pmcs[4];	/* bitmask of PMC to save on ctxsw */
+	unsigned long		ctx_reload_pmcs[4];	/* bitmask of PMC to reload on ctxsw (SMP) */
 
-	unsigned long		ctx_used_pmds[4]; 	/* bitmask of used PMD (speedup ctxsw) */
-	unsigned long		ctx_used_pmcs[4]; 	/* bitmask of used PMC (speedup ctxsw) */
+	unsigned long		ctx_used_ibrs[4];	/* bitmask of used IBR (speedup ctxsw) */
+	unsigned long		ctx_used_dbrs[4];	/* bitmask of used DBR (speedup ctxsw) */
 
-	pfm_counter_t		ctx_pmds[IA64_NUM_PMD_COUNTERS]; /* XXX: size should be dynamic */
+	pfm_counter_t		ctx_soft_pmds[IA64_NUM_PMD_REGS]; /* XXX: size should be dynamic */
 
+	u64			ctx_saved_psr;		/* copy of psr used for lazy ctxsw */
+	unsigned long		ctx_saved_cpus_allowed;	/* copy of the task cpus_allowed (system wide) */
+	unsigned long		ctx_cpu;		/* cpu to which perfmon is applied (system wide) */
+
+	atomic_t		ctx_saving_in_progress;	/* flag indicating actual save in progress */
+	atomic_t		ctx_last_cpu;		/* CPU id of current or last CPU used */
 } pfm_context_t;
 
-#define CTX_USED_PMD(ctx,n) (ctx)->ctx_used_pmds[(n)>>6] |= 1<< ((n) % 64)
-#define CTX_USED_PMC(ctx,n) (ctx)->ctx_used_pmcs[(n)>>6] |= 1<< ((n) % 64)
+#define ctx_fl_inherit		ctx_flags.inherit
+#define ctx_fl_block		ctx_flags.block
+#define ctx_fl_system		ctx_flags.system
+#define ctx_fl_frozen		ctx_flags.frozen
+#define ctx_fl_protected	ctx_flags.protected
+#define ctx_fl_using_dbreg	ctx_flags.using_dbreg
+
+/*
+ * global information about all sessions
+ * mostly used to synchronize between system wide and per-process
+ */
+typedef struct {
+	spinlock_t		pfs_lock;		/* lock the structure */
 
-#define ctx_fl_inherit	ctx_flags.inherit
-#define ctx_fl_noblock	ctx_flags.noblock
-#define ctx_fl_system	ctx_flags.system
-#define ctx_fl_frozen	ctx_flags.frozen
-#define ctx_fl_exclintr	ctx_flags.exclintr
+	unsigned long		pfs_task_sessions;	/* number of per task sessions */
+	unsigned long		pfs_sys_sessions;	/* number of per system wide sessions */
+	unsigned long   	pfs_sys_use_dbregs;	  	/* incremented when a system wide session uses debug regs */
+	unsigned long   	pfs_ptrace_use_dbregs;	  /* incremented when a process uses debug regs */
+	struct task_struct	*pfs_sys_session[NR_CPUS];  /* point to task owning a system-wide session */
+} pfm_session_t;
 
-#define CTX_OVFL_NOBLOCK(c)	((c)->ctx_fl_noblock == 1)
-#define CTX_INHERIT_MODE(c)	((c)->ctx_fl_inherit)
-#define CTX_HAS_SMPL(c)		((c)->ctx_smpl_buf != NULL)
+/*
+ * structure used to pass argument to/from remote CPU 
+ * using IPI to check and possibly save the PMU context on SMP systems.
+ *
+ * not used in UP kernels
+ */
+typedef struct {
+	struct task_struct *task;	/* which task we are interested in */
+	int retval;			/* return value of the call: 0=you can proceed, 1=need to wait for completion */
+} pfm_smp_ipi_arg_t;
 
-static pmu_config_t pmu_conf;
+/*
+ * perfmon command descriptions
+ */
+typedef struct {
+	int		(*cmd_func)(struct task_struct *task, pfm_context_t *ctx, void *arg, int count, struct pt_regs *regs);
+	int		cmd_flags;
+	unsigned int	cmd_narg;
+	size_t		cmd_argsize;
+} pfm_cmd_desc_t;
 
-/* for debug only */
-static int pfm_debug=0;	/* 0= nodebug, >0= debug output on */
+#define PFM_CMD_PID		0x1	/* command requires pid argument */
+#define PFM_CMD_ARG_READ	0x2	/* command must read argument(s) */
+#define PFM_CMD_ARG_WRITE	0x4	/* command must write argument(s) */
+#define PFM_CMD_CTX		0x8	/* command needs a perfmon context */
+#define PFM_CMD_NOCHK		0x10	/* command does not need to check task's state */
 
-#define DBprintk(a) \
-	do { \
-		if (pfm_debug >0) { printk(__FUNCTION__" %d: ", __LINE__); printk a; } \
-	} while (0);
+#define PFM_CMD_IDX(cmd)	(cmd)
+
+#define PFM_CMD_IS_VALID(cmd)	((PFM_CMD_IDX(cmd) >= 0) && (PFM_CMD_IDX(cmd) < PFM_CMD_COUNT) \
+				  && pfm_cmd_tab[PFM_CMD_IDX(cmd)].cmd_func != NULL)
+
+#define PFM_CMD_USE_PID(cmd)	((pfm_cmd_tab[PFM_CMD_IDX(cmd)].cmd_flags & PFM_CMD_PID) != 0)
+#define PFM_CMD_READ_ARG(cmd)	((pfm_cmd_tab[PFM_CMD_IDX(cmd)].cmd_flags & PFM_CMD_ARG_READ) != 0)
+#define PFM_CMD_WRITE_ARG(cmd)	((pfm_cmd_tab[PFM_CMD_IDX(cmd)].cmd_flags & PFM_CMD_ARG_WRITE) != 0)
+#define PFM_CMD_USE_CTX(cmd)	((pfm_cmd_tab[PFM_CMD_IDX(cmd)].cmd_flags & PFM_CMD_CTX) != 0)
+#define PFM_CMD_CHK(cmd)	((pfm_cmd_tab[PFM_CMD_IDX(cmd)].cmd_flags & PFM_CMD_NOCHK) == 0)
+
+#define PFM_CMD_ARG_MANY	-1 /* cannot be zero */
+#define PFM_CMD_NARG(cmd)	(pfm_cmd_tab[PFM_CMD_IDX(cmd)].cmd_narg)
+#define PFM_CMD_ARG_SIZE(cmd)	(pfm_cmd_tab[PFM_CMD_IDX(cmd)].cmd_argsize)
 
-static void ia64_reset_pmu(void);
 
 /*
- * structure used to pass information between the interrupt handler
- * and the tasklet.
+ * perfmon internal variables
  */
-typedef struct {
-	pid_t		to_pid;		/* which process to notify */
-	pid_t		from_pid;	/* which process is source of overflow */
-	int		sig;		/* with which signal */
-	unsigned long	bitvect;	/* which counters have overflowed */
-} notification_info_t;
+static pmu_config_t	pmu_conf; 	/* PMU configuration */
+static int		pfm_debug_mode;	/* 0= nodebug, >0= debug output on */
+static pfm_session_t	pfm_sessions;	/* global sessions information */
+static struct proc_dir_entry *perfmon_dir; /* for debug only */
+static unsigned long pfm_spurious_ovfl_intr_count; /* keep track of spurious ovfl interrupts */
+static unsigned long pfm_ovfl_intr_count; /* keep track of spurious ovfl interrupts */
+static unsigned long pfm_recorded_samples_count;
 
 
-typedef struct {
-	unsigned long pfs_proc_sessions;
-	unsigned long pfs_sys_session; /* can only be 0/1 */
-	unsigned long pfs_dfl_dcr;	/* XXX: hack */
-	unsigned int  pfs_pp;
-} pfm_session_t;
+static unsigned long reset_pmcs[IA64_NUM_PMC_REGS];	/* contains PAL reset values for PMCS */
+
+static void pfm_vm_close(struct vm_area_struct * area);
+static struct vm_operations_struct pfm_vm_ops={
+	close: pfm_vm_close
+};
 
-struct {
+/*
+ * keep track of task owning the PMU per CPU.
+ */
+static struct {
 	struct task_struct *owner;
 } ____cacheline_aligned pmu_owners[NR_CPUS];
 
 
-/* 
- * helper macros
- */
-#define SET_PMU_OWNER(t)	do { pmu_owners[smp_processor_id()].owner = (t); } while(0);
-#define PMU_OWNER()		pmu_owners[smp_processor_id()].owner
 
+/*
+ * forward declarations
+ */
+static void ia64_reset_pmu(struct task_struct *);
 #ifdef CONFIG_SMP
-#define PFM_CAN_DO_LAZY()	(smp_num_cpus==1 && pfs_info.pfs_sys_session==0)
-#else
-#define PFM_CAN_DO_LAZY()	(pfs_info.pfs_sys_session==0)
+static void pfm_fetch_regs(int cpu, struct task_struct *task, pfm_context_t *ctx);
 #endif
-
 static void pfm_lazy_save_regs (struct task_struct *ta);
 
-/* for debug only */
-static struct proc_dir_entry *perfmon_dir;
+static inline unsigned long
+pfm_read_soft_counter(pfm_context_t *ctx, int i)
+{
+	return ctx->ctx_soft_pmds[i].val + (ia64_get_pmd(i) & pmu_conf.perf_ovfl_val);
+}
 
-/*
- * XXX: hack to indicate that a system wide monitoring session is active
- */
-static pfm_session_t pfs_info;
+static inline void
+pfm_write_soft_counter(pfm_context_t *ctx, int i, unsigned long val)
+{
+	ctx->ctx_soft_pmds[i].val = val  & ~pmu_conf.perf_ovfl_val;
+	/*
+	 * writing to unimplemented part is ignore, so we do not need to
+	 * mask off top part
+	 */
+	ia64_set_pmd(i, val);
+}
 
 /*
  * finds the number of PM(C|D) registers given
@@ -324,10 +379,10 @@
  * Generates a unique (per CPU) timestamp
  */
 static inline unsigned long
-perfmon_get_stamp(void)
+pfm_get_stamp(void)
 {
 	/*
-	 * XXX: maybe find something more efficient
+	 * XXX: must find something more efficient
 	 */
 	return ia64_get_itc();
 }
@@ -353,80 +408,185 @@
 			}
 		}
 	}
-	DBprintk(("uv2kva(%lx-->%lx)\n", adr, ret));
+	DBprintk(("[%d] uv2kva(%lx-->%lx)\n", current->pid, adr, ret));
 	return ret;
 }
 
-
 /* Here we want the physical address of the memory.
  * This is used when initializing the contents of the
  * area and marking the pages as reserved.
  */
 static inline unsigned long
-kvirt_to_pa(unsigned long adr)
+pfm_kvirt_to_pa(unsigned long adr)
 {
 	__u64 pa = ia64_tpa(adr);
-	DBprintk(("kv2pa(%lx-->%lx)\n", adr, pa));
+	//DBprintk(("kv2pa(%lx-->%lx)\n", adr, pa));
 	return pa;
 }
 
+
 static void *
-rvmalloc(unsigned long size)
+pfm_rvmalloc(unsigned long size)
 {
 	void *mem;
 	unsigned long adr, page;
 
-	/* XXX: may have to revisit this part because
-	 * vmalloc() does not necessarily return a page-aligned buffer.
-	 * This maybe a security problem when mapped at user level
-	 */
 	mem=vmalloc(size);
 	if (mem) {
+		//printk("perfmon: CPU%d pfm_rvmalloc(%ld)=%p\n", smp_processor_id(), size, mem);
 		memset(mem, 0, size); /* Clear the ram out, no junk to the user */
 		adr=(unsigned long) mem;
 		while (size > 0) {
-			page = kvirt_to_pa(adr);
+			page = pfm_kvirt_to_pa(adr);
 			mem_map_reserve(virt_to_page(__va(page)));
-			adr+=PAGE_SIZE;
-			size-=PAGE_SIZE;
+			adr  += PAGE_SIZE;
+			size -= PAGE_SIZE;
 		}
 	}
 	return mem;
 }
 
 static void
-rvfree(void *mem, unsigned long size)
+pfm_rvfree(void *mem, unsigned long size)
 {
-	unsigned long adr, page;
+	unsigned long adr, page = 0;
 
 	if (mem) {
 		adr=(unsigned long) mem;
 		while (size > 0) {
-			page = kvirt_to_pa(adr);
+			page = pfm_kvirt_to_pa(adr);
 			mem_map_unreserve(virt_to_page(__va(page)));
 			adr+=PAGE_SIZE;
 			size-=PAGE_SIZE;
 		}
 		vfree(mem);
 	}
+	return;
+}
+
+/*
+ * This function gets called from mm/mmap.c:exit_mmap() only when there is a sampling buffer
+ * attached to the context AND the current task has a mapping for it, i.e., it is the original
+ * creator of the context.
+ *
+ * This function is used to remember the fact that the vma describing the sampling buffer
+ * has now been removed. It can only be called when no other tasks share the same mm context.
+ *
+ */
+static void 
+pfm_vm_close(struct vm_area_struct *vma)
+{
+	pfm_smpl_buffer_desc_t *psb = (pfm_smpl_buffer_desc_t *)vma->vm_private_data;
+
+	if (psb == NULL) {
+		printk("perfmon: psb is null in [%d]\n", current->pid);
+		return;
+	}
+	/*
+	 * Add PSB to list of buffers to free on release_thread() when no more users
+	 *
+	 * This call is safe because, once the count is zero is cannot be modified anymore.
+	 * This is not because there is no more user of the mm context, that the sampling
+	 * buffer is not being used anymore outside of this task. In fact, it can still
+	 * be accessed from within the kernel by another task (such as the monitored task).
+	 *
+	 * Therefore, we only move the psb into the list of buffers to free when we know
+	 * nobody else is using it.
+	 * The linked list if independent of the perfmon context, because in the case of
+	 * multi-threaded processes, the last thread may not have been involved with
+	 * monitoring however it will be the one removing the vma and it should therefore
+	 * also remove the sampling buffer. This buffer cannot be removed until the vma
+	 * is removed.
+	 *
+	 * This function cannot remove the buffer from here, because exit_mmap() must first
+	 * complete. Given that there is no other vma related callback in the generic code,
+	 * we have created on own with the linked list of sampling buffer to free which
+	 * is part of the thread structure. In release_thread() we check if the list is
+	 * empty. If not we call into perfmon to free the buffer and psb. That is the only
+	 * way to ensure a safe deallocation of the sampling buffer which works when
+	 * the buffer is shared between distinct processes or with multi-threaded programs.
+	 *
+	 * We need to lock the psb because the refcnt test and flag manipulation must
+	 * looked like an atomic operation vis a vis pfm_context_exit()
+	 */
+	LOCK_PSB(psb);
+
+	if (psb->psb_refcnt == 0) {
+
+		psb->psb_next = current->thread.pfm_smpl_buf_list;
+		current->thread.pfm_smpl_buf_list = psb;
+
+		DBprintk(("psb for [%d] smpl @%p size %ld inserted into list\n", 
+			current->pid, psb->psb_hdr, psb->psb_size));
+	}
+	DBprintk(("psb vma flag cleared for [%d] smpl @%p size %ld inserted into list\n", 
+			current->pid, psb->psb_hdr, psb->psb_size));
+
+	/*
+	 * indicate to pfm_context_exit() that the vma has been removed. 
+	 */
+	psb->psb_flags &= ~PFM_PSB_VMA;
+
+	UNLOCK_PSB(psb);
+}
+
+/*
+ * This function is called from pfm_destroy_context() and also from pfm_inherit()
+ * to explicitely remove the sampling buffer mapping from the user level address space.
+ */
+static int
+pfm_remove_smpl_mapping(struct task_struct *task)
+{
+	pfm_context_t *ctx = task->thread.pfm_context;
+	pfm_smpl_buffer_desc_t *psb;
+	int r;
+
+	/*
+	 * some sanity checks first
+	 */
+	if (ctx == NULL || task->mm == NULL || ctx->ctx_smpl_vaddr == 0 || ctx->ctx_psb == NULL) {
+		printk("perfmon: invalid context mm=%p\n", task->mm);
+		return -1;
+	}
+	psb = ctx->ctx_psb;	
+
+	down_write(&task->mm->mmap_sem);
+
+	r = do_munmap(task->mm, ctx->ctx_smpl_vaddr, psb->psb_size);
+
+	up_write(&task->mm->mmap_sem);
+	if (r !=0) {
+		printk("perfmon: pid %d unable to unmap sampling buffer @0x%lx size=%ld\n", 
+				task->pid, ctx->ctx_smpl_vaddr, psb->psb_size);
+	}
+	DBprintk(("[%d] do_unmap(0x%lx, %ld)=%d\n", 
+		task->pid, ctx->ctx_smpl_vaddr, psb->psb_size, r));
+
+	/* 
+	 * make sure we suppress all traces of this buffer
+	 * (important for pfm_inherit)
+	 */
+	ctx->ctx_smpl_vaddr = 0;
+
+	return 0;
 }
 
 static pfm_context_t *
 pfm_context_alloc(void)
 {
-	pfm_context_t *pfc;
+	pfm_context_t *ctx;
 
 	/* allocate context descriptor */
-	pfc = vmalloc(sizeof(*pfc));
-	if (pfc) memset(pfc, 0, sizeof(*pfc));
-
-	return pfc;
+	ctx = kmalloc(sizeof(pfm_context_t), GFP_KERNEL);
+	if (ctx) memset(ctx, 0, sizeof(pfm_context_t));
+	
+	return ctx;
 }
 
 static void
-pfm_context_free(pfm_context_t *pfc)
+pfm_context_free(pfm_context_t *ctx)
 {
-	if (pfc) vfree(pfc);
+	if (ctx) kfree(ctx);
 }
 
 static int
@@ -434,11 +594,13 @@
 {
 	unsigned long page;
 
+	DBprintk(("CPU%d buf=0x%lx addr=0x%lx size=%ld\n", smp_processor_id(), buf, addr, size));
+
 	while (size > 0) {
-		page = kvirt_to_pa(buf);
+		page = pfm_kvirt_to_pa(buf);
 
 		if (remap_page_range(addr, page, PAGE_SIZE, PAGE_SHARED)) return -ENOMEM;
-
+		
 		addr  += PAGE_SIZE;
 		buf   += PAGE_SIZE;
 		size  -= PAGE_SIZE;
@@ -458,7 +620,7 @@
 
 	for (i=0; i < size; i++, which++) res += hweight64(*which);
 
-	DBprintk((" res=%ld\n", res));
+	DBprintk(("weight=%ld\n", res));
 
 	return res;
 }
@@ -467,15 +629,16 @@
  * Allocates the sampling buffer and remaps it into caller's address space
  */
 static int
-pfm_smpl_buffer_alloc(pfm_context_t *ctx, unsigned long which_pmds, unsigned long entries, void **user_addr)
+pfm_smpl_buffer_alloc(pfm_context_t *ctx, unsigned long *which_pmds, unsigned long entries, 
+		      void **user_vaddr)
 {
 	struct mm_struct *mm = current->mm;
-	struct vm_area_struct *vma;
-	unsigned long addr, size, regcount;
+	struct vm_area_struct *vma = NULL;
+	unsigned long size, regcount;
 	void *smpl_buf;
 	pfm_smpl_buffer_desc_t *psb;
 
-	regcount = pfm_smpl_entry_size(&which_pmds, 1);
+	regcount = pfm_smpl_entry_size(which_pmds, 1);
 
 	/* note that regcount might be 0, in this case only the header for each
 	 * entry will be recorded.
@@ -488,133 +651,207 @@
 			  + entries * (sizeof(perfmon_smpl_entry_t) + regcount*sizeof(u64)));
 	/*
 	 * check requested size to avoid Denial-of-service attacks
-	 * XXX: may have to refine this test
+	 * XXX: may have to refine this test	
+	 * Check against address space limit.
+	 *
+	 * if ((mm->total_vm << PAGE_SHIFT) + len> current->rlim[RLIMIT_AS].rlim_cur) 
+	 * 	return -ENOMEM;
 	 */
 	if (size > current->rlim[RLIMIT_MEMLOCK].rlim_cur) return -EAGAIN;
 
-	/* find some free area in address space */
-	addr = get_unmapped_area(NULL, 0, size, 0, MAP_PRIVATE);
-	if (!addr) goto no_addr;
+	/*
+	 * We do the easy to undo allocations first.
+ 	 *
+	 * pfm_rvmalloc(), clears the buffer, so there is no leak
+	 */
+	smpl_buf = pfm_rvmalloc(size);
+	if (smpl_buf == NULL) {
+		DBprintk(("Can't allocate sampling buffer\n"));
+		return -ENOMEM;
+	}
+
+	DBprintk(("smpl_buf @%p\n", smpl_buf));
 
-	DBprintk((" entries=%ld aligned size=%ld, unmapped @0x%lx\n", entries, size, addr));
+	/* allocate sampling buffer descriptor now */
+	psb = kmalloc(sizeof(*psb), GFP_KERNEL);
+	if (psb == NULL) {
+		DBprintk(("Can't allocate sampling buffer descriptor\n"));
+		pfm_rvfree(smpl_buf, size);
+		return -ENOMEM;
+	}
 
 	/* allocate vma */
 	vma = kmem_cache_alloc(vm_area_cachep, SLAB_KERNEL);
-	if (!vma) goto no_vma;
-
-	/* XXX: see rvmalloc() for page alignment problem */
-	smpl_buf = rvmalloc(size);
-	if (smpl_buf == NULL) goto no_buffer;
-
-	DBprintk((" smpl_buf @%p\n", smpl_buf));
-
-	if (pfm_remap_buffer((unsigned long)smpl_buf, addr, size)) goto cant_remap;
-
-	/* allocate sampling buffer descriptor now */
-	psb = vmalloc(sizeof(*psb));
-	if (psb == NULL) goto no_buffer_desc;
+	if (!vma) {
+		DBprintk(("Cannot allocate vma\n"));
+		goto error;
+	}
+	/*
+	 * partially initialize the vma for the sampling buffer
+	 */
+	vma->vm_mm	     = mm;
+	vma->vm_flags	     = VM_READ| VM_MAYREAD |VM_RESERVED;
+	vma->vm_page_prot    = PAGE_READONLY; /* XXX may need to change */
+	vma->vm_ops	     = &pfm_vm_ops; /* necesarry to get the close() callback */
+	vma->vm_pgoff	     = 0;
+	vma->vm_file	     = NULL;
+	vma->vm_raend	     = 0;
+	vma->vm_private_data = psb;	/* information needed by the pfm_vm_close() function */
 
-	/* start with something clean */
-	memset(smpl_buf, 0x0, size);
+	/*
+	 * Now we have everything we need and we can initialize
+	 * and connect all the data structures
+	 */
 
 	psb->psb_hdr	 = smpl_buf;
-	psb->psb_addr    = (char *)smpl_buf+sizeof(perfmon_smpl_hdr_t); /* first entry */
+	psb->psb_addr    = ((char *)smpl_buf)+sizeof(perfmon_smpl_hdr_t); /* first entry */
 	psb->psb_size    = size; /* aligned size */
 	psb->psb_index   = 0;
 	psb->psb_entries = entries;
+	psb->psb_flags   = PFM_PSB_VMA; /* remember that there is a vma describing the buffer */
+	psb->psb_refcnt  = 1;
 
-	atomic_set(&psb->psb_refcnt, 1);
+	spin_lock_init(&psb->psb_lock);
 
+	/*
+	 * XXX: will need to do cacheline alignment to avoid false sharing in SMP mode and
+	 * multitask monitoring.
+	 */
 	psb->psb_entry_size = sizeof(perfmon_smpl_entry_t) + regcount*sizeof(u64);
 
-	DBprintk((" psb @%p entry_size=%ld hdr=%p addr=%p\n", (void *)psb,psb->psb_entry_size, (void *)psb->psb_hdr, (void *)psb->psb_addr));
-
-	/* initialize some of the fields of header */
-	psb->psb_hdr->hdr_version    = PFM_SMPL_HDR_VERSION;
-	psb->psb_hdr->hdr_entry_size = sizeof(perfmon_smpl_entry_t)+regcount*sizeof(u64);
-	psb->psb_hdr->hdr_pmds	     = which_pmds;
-
-	/* store which PMDS to record */
-	ctx->ctx_smpl_regs = which_pmds;
+	DBprintk(("psb @%p entry_size=%ld hdr=%p addr=%p\n", 
+		  (void *)psb,psb->psb_entry_size, (void *)psb->psb_hdr, 
+		  (void *)psb->psb_addr));
 
-	/* link to perfmon context */
-	ctx->ctx_smpl_buf  = psb;
+	/* initialize some of the fields of user visible buffer header */
+	psb->psb_hdr->hdr_version    = PFM_SMPL_VERSION;
+	psb->psb_hdr->hdr_entry_size = psb->psb_entry_size;
+	psb->psb_hdr->hdr_pmds[0]    = which_pmds[0];
 
 	/*
-	 * initialize the vma for the sampling buffer
+	 * Let's do the difficult operations next.
+	 *
+	 * now we atomically find some area in the address space and
+	 * remap the buffer in it.
 	 */
-	vma->vm_mm	  = mm;
-	vma->vm_start	  = addr;
-	vma->vm_end	  = addr + size;
-	vma->vm_flags	  = VM_READ|VM_MAYREAD;
-	vma->vm_page_prot = PAGE_READONLY; /* XXX may need to change */
-	vma->vm_ops	  = NULL;
-	vma->vm_pgoff	  = 0;
-	vma->vm_file	  = NULL;
-	vma->vm_raend	  = 0;
+	down_write(&current->mm->mmap_sem);
+
 
-	vma->vm_private_data = ctx;	/* link to pfm_context(not yet used) */
+	/* find some free area in address space, must have mmap sem held */
+	vma->vm_start = get_unmapped_area(NULL, 0, size, 0, MAP_PRIVATE|MAP_ANONYMOUS);
+	if (vma->vm_start == 0UL) {
+		DBprintk(("Cannot find unmapped area for size %ld\n", size));
+		up_write(&current->mm->mmap_sem);
+		goto error;
+	}
+	vma->vm_end = vma->vm_start + size;
+
+	DBprintk(("entries=%ld aligned size=%ld, unmapped @0x%lx\n", entries, size, vma->vm_start));
+		
+	/* can only be applied to current, need to have the mm semaphore held when called */
+	if (pfm_remap_buffer((unsigned long)smpl_buf, vma->vm_start, size)) {
+		DBprintk(("Can't remap buffer\n"));
+		up_write(&current->mm->mmap_sem);
+		goto error;
+	}
 
 	/*
-	 * now insert the vma in the vm list for the process
+	 * now insert the vma in the vm list for the process, must be
+	 * done with mmap lock held
 	 */
 	insert_vm_struct(mm, vma);
 
 	mm->total_vm  += size >> PAGE_SHIFT;
 
+	up_write(&current->mm->mmap_sem);
+
+	/* store which PMDS to record */
+	ctx->ctx_smpl_regs[0] = which_pmds[0];
+
+
+	/* link to perfmon context */
+	ctx->ctx_psb        = psb;
+
 	/*
-	 * that's the address returned to the user
+	 * keep track of user level virtual address 
 	 */
-	*user_addr = (void *)addr;
+	ctx->ctx_smpl_vaddr = *(unsigned long *)user_vaddr = vma->vm_start;
 
 	return 0;
 
-	/* outlined error handling */
-no_addr:
-	DBprintk(("Cannot find unmapped area for size %ld\n", size));
-	return -ENOMEM;
-no_vma:
-	DBprintk(("Cannot allocate vma\n"));
-	return -ENOMEM;
-cant_remap:
-	DBprintk(("Can't remap buffer\n"));
-	rvfree(smpl_buf, size);
-no_buffer:
-	DBprintk(("Can't allocate sampling buffer\n"));
-	kmem_cache_free(vm_area_cachep, vma);
-	return -ENOMEM;
-no_buffer_desc:
-	DBprintk(("Can't allocate sampling buffer descriptor\n"));
-	kmem_cache_free(vm_area_cachep, vma);
-	rvfree(smpl_buf, size);
+error:
+	pfm_rvfree(smpl_buf, size);
+	kfree(psb);
 	return -ENOMEM;
 }
 
+/*
+ * XXX: do something better here
+ */
+static int
+pfm_bad_permissions(struct task_struct *task)
+{
+	/* stolen from bad_signal() */
+	return (current->session != task->session)
+	    && (current->euid ^ task->suid) && (current->euid ^ task->uid)
+	    && (current->uid ^ task->suid) && (current->uid ^ task->uid);
+}
+
+
 static int
-pfx_is_sane(pfreq_context_t *pfx)
+pfx_is_sane(struct task_struct *task, pfarg_context_t *pfx)
 {
 	int ctx_flags;
+	int cpu;
 
 	/* valid signal */
-	//if (pfx->notify_sig < 1 || pfx->notify_sig >= _NSIG) return -EINVAL;
-	if (pfx->notify_sig !=0 && pfx->notify_sig != SIGPROF) return -EINVAL;
 
 	/* cannot send to process 1, 0 means do not notify */
-	if (pfx->notify_pid < 0 || pfx->notify_pid == 1) return -EINVAL;
-
-	ctx_flags = pfx->flags;
+	if (pfx->ctx_notify_pid == 1) {
+		DBprintk(("invalid notify_pid %d\n", pfx->ctx_notify_pid));
+		return -EINVAL;
+	}
+	ctx_flags = pfx->ctx_flags;
 
 	if (ctx_flags & PFM_FL_SYSTEM_WIDE) {
-#ifdef CONFIG_SMP
-		if (smp_num_cpus > 1) {
-			printk("perfmon: system wide monitoring on SMP not yet supported\n");
+		DBprintk(("cpu_mask=0x%lx\n", pfx->ctx_cpu_mask));
+		/*
+		 * cannot block in this mode 
+		 */
+		if (ctx_flags & PFM_FL_NOTIFY_BLOCK) {
+			DBprintk(("cannot use blocking mode when in system wide monitoring\n"));
 			return -EINVAL;
 		}
-#endif
-		if ((ctx_flags & PFM_FL_SMPL_OVFL_NOBLOCK) == 0) {
-			printk("perfmon: system wide monitoring cannot use blocking notification mode\n");
+		/*
+		 * must only have one bit set in the CPU mask
+		 */
+		if (hweight64(pfx->ctx_cpu_mask) != 1UL) {
+			DBprintk(("invalid CPU mask specified\n"));
+			return -EINVAL;
+		}
+		/*
+		 * and it must be a valid CPU
+		 */
+		cpu = ffs(pfx->ctx_cpu_mask);
+		if (cpu > smp_num_cpus) {
+			DBprintk(("CPU%d is not online\n", cpu));
+			return -EINVAL;
+		}
+		/*
+		 * check for pre-existing pinning, if conflicting reject
+		 */
+		if (task->cpus_allowed != ~0UL && (task->cpus_allowed & (1UL<<cpu)) == 0) {
+			DBprintk(("[%d] pinned on 0x%lx, mask for CPU%d \n", task->pid, 
+				task->cpus_allowed, cpu));
 			return -EINVAL;
 		}
+
+	} else {
+		/*
+		 * must provide a target for the signal in blocking mode even when
+		 * no counter is configured with PFM_FL_REG_OVFL_NOTIFY
+		 */
+		if ((ctx_flags & PFM_FL_NOTIFY_BLOCK) && pfx->ctx_notify_pid == 0) return -EINVAL;
 	}
 	/* probably more to add here */
 
@@ -622,68 +859,97 @@
 }
 
 static int
-pfm_context_create(int flags, perfmon_req_t *req)
+pfm_create_context(struct task_struct *task, pfm_context_t *ctx, void *req, int count, 
+		   struct pt_regs *regs)
 {
-	pfm_context_t *ctx;
-	struct task_struct *task = NULL;
-	perfmon_req_t tmp;
+	pfarg_context_t tmp;
 	void *uaddr = NULL;
-	int ret;
+	int ret, cpu = 0;
 	int ctx_flags;
-	pid_t pid;
+	pid_t notify_pid;
 
-	/* to go away */
-	if (flags) {
-		printk("perfmon: use context flags instead of perfmon() flags. Obsoleted API\n");
-	}
+	/* a context has already been defined */
+	if (ctx) return -EBUSY;
+
+	/*
+	 * not yet supported
+	 */
+	if (task != current) return -EINVAL;
 
 	if (copy_from_user(&tmp, req, sizeof(tmp))) return -EFAULT;
 
-	ret = pfx_is_sane(&tmp.pfr_ctx);
+	ret = pfx_is_sane(task, &tmp);
 	if (ret < 0) return ret;
 
-	ctx_flags = tmp.pfr_ctx.flags;
+	ctx_flags = tmp.ctx_flags;
+
+	ret =  -EBUSY;
+
+	LOCK_PFS();
 
 	if (ctx_flags & PFM_FL_SYSTEM_WIDE) {
+
+		/* at this point, we know there is at least one bit set */
+		cpu = ffs(tmp.ctx_cpu_mask) - 1;
+
+		DBprintk(("requesting CPU%d currently on CPU%d\n",cpu, smp_processor_id()));
+
+		if (pfm_sessions.pfs_task_sessions > 0) {
+			DBprintk(("system wide not possible, task_sessions=%ld\n", pfm_sessions.pfs_task_sessions));
+			goto abort;
+		}
+
+		if (pfm_sessions.pfs_sys_session[cpu]) {
+			DBprintk(("system wide not possible, conflicting session [%d] on CPU%d\n",pfm_sessions.pfs_sys_session[cpu]->pid, cpu));
+			goto abort;
+		}
+		pfm_sessions.pfs_sys_session[cpu] = task;
 		/*
-		 * XXX: This is not AT ALL SMP safe
+		 * count the number of system wide sessions
 		 */
-		if (pfs_info.pfs_proc_sessions > 0) return -EBUSY;
-		if (pfs_info.pfs_sys_session > 0) return -EBUSY;
+		pfm_sessions.pfs_sys_sessions++;
 
-		pfs_info.pfs_sys_session = 1;
-
-	} else if (pfs_info.pfs_sys_session >0) {
+	} else if (pfm_sessions.pfs_sys_sessions == 0) {
+		pfm_sessions.pfs_task_sessions++;
+	} else {
 		/* no per-process monitoring while there is a system wide session */
-		return -EBUSY;
-	} else
-		pfs_info.pfs_proc_sessions++;
+		goto abort;
+	}
+
+	UNLOCK_PFS();
+
+	ret = -ENOMEM;
 
 	ctx = pfm_context_alloc();
 	if (!ctx) goto error;
 
-	/* record the creator (debug only) */
-	ctx->ctx_creator = current;
+	/* record the creator (important for inheritance) */
+	ctx->ctx_owner = current;
+
+	notify_pid = tmp.ctx_notify_pid;
 
-	pid = tmp.pfr_ctx.notify_pid;
+	spin_lock_init(&ctx->ctx_lock);
 
-	spin_lock_init(&ctx->ctx_notify_lock);
+	if (notify_pid == current->pid) {
 
-	if (pid == current->pid) {
 		ctx->ctx_notify_task = task = current;
 		current->thread.pfm_context = ctx;
 
-		atomic_set(&current->thread.pfm_notifiers_check, 1);
+	} else if (notify_pid!=0) {
+		struct task_struct *notify_task;
 
-	} else if (pid!=0) {
 		read_lock(&tasklist_lock);
 
-		task = find_task_by_pid(pid);
-		if (task) {
+		notify_task = find_task_by_pid(notify_pid);
+
+		if (notify_task) {
+
+			ret = -EPERM;
+
 			/*
-		 	 * record who to notify
-		 	 */
-			ctx->ctx_notify_task = task;
+			 * check if we can send this task a signal
+			 */
+			if (pfm_bad_permissions(notify_task)) goto buffer_error;
 
 			/* 
 		 	 * make visible
@@ -702,7 +968,9 @@
 			 * task has been detached from the tasklist otherwise you are
 			 * exposed to race conditions.
 			 */
-			atomic_add(1, &task->thread.pfm_notifiers_check);
+			atomic_add(1, &ctx->ctx_notify_task->thread.pfm_notifiers_check);
+
+			ctx->ctx_notify_task = notify_task;
 		}
 		read_unlock(&tasklist_lock);
 	}
@@ -710,37 +978,48 @@
 	/*
 	 * notification process does not exist
 	 */
-	if (pid != 0 && task == NULL) {
+	if (notify_pid != 0 && ctx->ctx_notify_task == NULL) {
 		ret = -EINVAL;
 		goto buffer_error;
 	}
 
-	ctx->ctx_notify_sig = SIGPROF;	/* siginfo imposes a fixed signal */
+	if (tmp.ctx_smpl_entries) {
+		DBprintk(("sampling entries=%ld\n",tmp.ctx_smpl_entries));
 
-	if (tmp.pfr_ctx.smpl_entries) {
-		DBprintk((" sampling entries=%ld\n",tmp.pfr_ctx.smpl_entries));
-
-		ret = pfm_smpl_buffer_alloc(ctx, tmp.pfr_ctx.smpl_regs, 
-						 tmp.pfr_ctx.smpl_entries, &uaddr);
+		ret = pfm_smpl_buffer_alloc(ctx, tmp.ctx_smpl_regs, 
+						 tmp.ctx_smpl_entries, &uaddr);
 		if (ret<0) goto buffer_error;
 
-		tmp.pfr_ctx.smpl_vaddr = uaddr;
+		tmp.ctx_smpl_vaddr = uaddr;
 	}
 	/* initialization of context's flags */
-	ctx->ctx_fl_inherit  = ctx_flags & PFM_FL_INHERIT_MASK;
-	ctx->ctx_fl_noblock  = (ctx_flags & PFM_FL_SMPL_OVFL_NOBLOCK) ? 1 : 0;
-	ctx->ctx_fl_system   = (ctx_flags & PFM_FL_SYSTEM_WIDE) ? 1: 0;
-	ctx->ctx_fl_exclintr = (ctx_flags & PFM_FL_EXCL_INTR) ? 1: 0;
-	ctx->ctx_fl_frozen   = 0;
+	ctx->ctx_fl_inherit   = ctx_flags & PFM_FL_INHERIT_MASK;
+	ctx->ctx_fl_block     = (ctx_flags & PFM_FL_NOTIFY_BLOCK) ? 1 : 0;
+	ctx->ctx_fl_system    = (ctx_flags & PFM_FL_SYSTEM_WIDE) ? 1: 0;
+	ctx->ctx_fl_frozen    = 0;
+	/*
+	 * setting this flag to 0 here means, that the creator or the task that the
+	 * context is being attached are granted access. Given that a context can only
+	 * be created for the calling process this, in effect only allows the creator
+	 * to access the context. See pfm_protect() for more.
+	 */
+	ctx->ctx_fl_protected = 0;
+
+	/* for system wide mode only (only 1 bit set) */
+	ctx->ctx_cpu         = cpu;
+
+	atomic_set(&ctx->ctx_last_cpu,-1); /* SMP only, means no CPU */
 
 	/* 
 	 * Keep track of the pmds we want to sample
 	 * XXX: may be we don't need to save/restore the DEAR/IEAR pmds
 	 * but we do need the BTB for sure. This is because of a hardware
 	 * buffer of 1 only for non-BTB pmds.
+	 *
+	 * We ignore the unimplemented pmds specified by the user
 	 */
-	ctx->ctx_used_pmds[0] = tmp.pfr_ctx.smpl_regs;
-	ctx->ctx_used_pmcs[0] = 1; /* always save/restore PMC[0] */
+	ctx->ctx_used_pmds[0]  = tmp.ctx_smpl_regs[0] & pmu_conf.impl_regs[4];
+	ctx->ctx_saved_pmcs[0] = 1; /* always save/restore PMC[0] */
 
 	sema_init(&ctx->ctx_restart_sem, 0); /* init this semaphore to locked */
 
@@ -750,31 +1029,28 @@
 		goto buffer_error;
 	}
 
-	DBprintk((" context=%p, pid=%d notify_sig %d notify_task=%p\n",(void *)ctx, current->pid, ctx->ctx_notify_sig, ctx->ctx_notify_task));
-	DBprintk((" context=%p, pid=%d flags=0x%x inherit=%d noblock=%d system=%d\n",(void *)ctx, current->pid, ctx_flags, ctx->ctx_fl_inherit, ctx->ctx_fl_noblock, ctx->ctx_fl_system));
+	DBprintk(("context=%p, pid=%d notify_task=%p\n",
+			(void *)ctx, task->pid, ctx->ctx_notify_task));
+
+	DBprintk(("context=%p, pid=%d flags=0x%x inherit=%d block=%d system=%d\n", 
+			(void *)ctx, task->pid, ctx_flags, ctx->ctx_fl_inherit, 
+			ctx->ctx_fl_block, ctx->ctx_fl_system));
 
 	/*
 	 * when no notification is required, we can make this visible at the last moment
 	 */
-	if (pid == 0) current->thread.pfm_context = ctx;
-
+	if (notify_pid == 0) task->thread.pfm_context = ctx;
 	/*
-	 * by default, we always include interrupts for system wide
-	 * DCR.pp is set by default to zero by kernel  in cpu_init()
+	 * pin task to CPU and force reschedule on exit to ensure
+	 * that when back to user level the task runs on the designated
+	 * CPU.
 	 */
 	if (ctx->ctx_fl_system) {
-		if (ctx->ctx_fl_exclintr == 0) {
-			unsigned long dcr = ia64_get_dcr();
-
-			ia64_set_dcr(dcr|IA64_DCR_PP);
-			/*
-			* keep track of the kernel default value
-			 */
-			pfs_info.pfs_dfl_dcr = dcr;
-
-			DBprintk((" dcr.pp is set\n"));
-		}
-	} 
+		ctx->ctx_saved_cpus_allowed = task->cpus_allowed;
+		task->cpus_allowed = 1UL << cpu;
+		task->need_resched = 1;
+		DBprintk(("[%d] rescheduled allowed=0x%lx\n", task->pid,task->cpus_allowed));
+	}
 
 	return 0;
 
@@ -784,225 +1060,492 @@
 	/*
 	 * undo session reservation
 	 */
+	LOCK_PFS();
+
 	if (ctx_flags & PFM_FL_SYSTEM_WIDE) {
-		pfs_info.pfs_sys_session = 0;
+		pfm_sessions.pfs_sys_session[cpu] = NULL;
+		pfm_sessions.pfs_sys_sessions--;
 	} else {
-		pfs_info.pfs_proc_sessions--;
+		pfm_sessions.pfs_task_sessions--;
 	}
+abort:
+	UNLOCK_PFS();
+
 	return ret;
 }
 
 static void
-pfm_reset_regs(pfm_context_t *ctx)
+pfm_reset_regs(pfm_context_t *ctx, unsigned long *ovfl_regs, int flag)
 {
-	unsigned long mask = ctx->ctx_ovfl_regs;
-	int i, cnum;
+	unsigned long mask = ovfl_regs[0];
+	unsigned long reset_others = 0UL;
+	unsigned long val;
+	int i;
+
+	DBprintk(("masks=0x%lx\n", mask));
 
-	DBprintk((" ovfl_regs=0x%lx\n", mask));
 	/*
 	 * now restore reset value on sampling overflowed counters
 	 */
-	for(i=0, cnum=PMU_FIRST_COUNTER; i < pmu_conf.max_counters; i++, cnum++, mask >>= 1) {
+	mask >>= PMU_FIRST_COUNTER;
+	for(i = PMU_FIRST_COUNTER; mask; i++, mask >>= 1) {
 		if (mask & 0x1) {
-			DBprintk((" reseting PMD[%d]=%lx\n", cnum, ctx->ctx_pmds[i].smpl_rval & pmu_conf.perf_ovfl_val));
+			val  = flag == PFM_RELOAD_LONG_RESET ? 
+					ctx->ctx_soft_pmds[i].long_reset:
+					ctx->ctx_soft_pmds[i].short_reset;
+
+			reset_others |= ctx->ctx_soft_pmds[i].reset_pmds[0];
+
+			DBprintk(("[%d] %s reset soft_pmd[%d]=%lx\n", 
+			  	current->pid, 
+				flag == PFM_RELOAD_LONG_RESET ? "long" : "short", i, val));
 
 			/* upper part is ignored on rval */
-			ia64_set_pmd(cnum, ctx->ctx_pmds[i].smpl_rval);
+			pfm_write_soft_counter(ctx, i, val);
+		}
+	}
 
-			/*
-			 * we must reset BTB index (clears pmd16.full to make
-			 * sure we do not report the same branches twice.
-			 * The non-blocking case in handled in update_counters()
-			 */
-			if (cnum == ctx->ctx_btb_counter) {
-				DBprintk(("reseting PMD16\n"));
-				ia64_set_pmd(16, 0);
-			}
+	/*
+	 * Now take care of resetting the other registers
+	 */
+	for(i = 0; reset_others; i++, reset_others >>= 1) {
+
+		if ((reset_others & 0x1) == 0) continue;
+
+		val  = flag == PFM_RELOAD_LONG_RESET ? 
+					ctx->ctx_soft_pmds[i].long_reset:
+					ctx->ctx_soft_pmds[i].short_reset;
+
+		if (PMD_IS_COUNTING(i)) {
+			pfm_write_soft_counter(ctx, i, val);
+		} else {
+			ia64_set_pmd(i, val);
 		}
+
+		DBprintk(("[%d] %s reset_others pmd[%d]=%lx\n", 
+			  	current->pid, 
+				flag == PFM_RELOAD_LONG_RESET ? "long" : "short", i, val));
 	}
 	/* just in case ! */
-	ctx->ctx_ovfl_regs = 0;
+	ctx->ctx_ovfl_regs[0] = 0UL;
 }
 
 static int
-pfm_write_pmcs(struct task_struct *ta, perfmon_req_t *req, int count)
+pfm_write_pmcs(struct task_struct *ta, pfm_context_t *ctx, void *arg, int count, struct pt_regs *regs)
 {
 	struct thread_struct *th = &ta->thread;
-	pfm_context_t *ctx = th->pfm_context;
-	perfmon_req_t tmp;
-	unsigned long cnum;
+	pfarg_reg_t tmp, *req = (pfarg_reg_t *)arg;
+	unsigned int cnum;
 	int i;
+	int ret = 0, reg_retval = 0;
+
+	/* we don't quite support this right now */
+	if (ta != current) return -EINVAL;
+
+	if (!CTX_IS_ENABLED(ctx)) return -EINVAL;
 
 	/* XXX: ctx locking may be required here */
 
 	for (i = 0; i < count; i++, req++) {
 
+
 		if (copy_from_user(&tmp, req, sizeof(tmp))) return -EFAULT;
 
-		cnum = tmp.pfr_reg.reg_num;
+		cnum = tmp.reg_num;
 
-		/* XXX needs to check validity of the data maybe */
-		if (!PMC_IS_IMPL(cnum)) {
-			DBprintk((" invalid pmc[%ld]\n", cnum));
-			return -EINVAL;
+		/* 
+		 * we reject all non implemented PMC as well
+		 * as attempts to modify PMC[0-3] which are used
+		 * as status registers by the PMU
+		 */
+		if (!PMC_IS_IMPL(cnum) || cnum < 4) {
+			DBprintk(("pmc[%u] is unimplemented or invalid\n", cnum));
+			ret = -EINVAL;
+			goto abort_mission;
 		}
+		/*
+		 * A PMC used to configure monitors must be:
+		 * 	- system-wide session: privileged monitor
+		 * 	- per-task : user monitor
+		 * any other configuration is rejected.
+		 */
+		if (PMC_IS_MONITOR(cnum)) {
+			pfm_monitor_t *p = (pfm_monitor_t *)&tmp.reg_value;
 
-		if (PMC_IS_COUNTER(cnum)) {
+			DBprintk(("pmc[%u].pm = %d\n", cnum, p->pmc_pm));
 
+			if (ctx->ctx_fl_system ^ p->pmc_pm) {
+			//if ((ctx->ctx_fl_system == 1 && p->pmc_pm == 0)
+			 //  ||(ctx->ctx_fl_system == 0 && p->pmc_pm == 1)) {
+				ret = -EINVAL;
+				goto abort_mission;
+			}
 			/*
-			 * we keep track of EARS/BTB to speed up sampling later
+			 * enforce generation of overflow interrupt. Necessary on all
+			 * CPUs which do not implement 64-bit hardware counters.
 			 */
-			if (PMC_IS_DEAR(&tmp.pfr_reg.reg_value)) {
-				ctx->ctx_dear_counter = cnum;
-			} else if (PMC_IS_IEAR(&tmp.pfr_reg.reg_value)) {
-				ctx->ctx_iear_counter = cnum;
-			} else if (PMC_IS_BTB(&tmp.pfr_reg.reg_value)) {
-				ctx->ctx_btb_counter = cnum;
+			p->pmc_oi = 1;
+		}
+
+		if (PMC_IS_COUNTING(cnum)) {
+			if (tmp.reg_flags & PFM_REGFL_OVFL_NOTIFY) {
+				/*
+				 * must have a target for the signal
+				 */
+				if (ctx->ctx_notify_task == NULL) {
+					ret = -EINVAL;
+					goto abort_mission;
+				}
+
+				ctx->ctx_soft_pmds[cnum].flags |= PFM_REGFL_OVFL_NOTIFY;
 			}
-#if 0
-			if (tmp.pfr_reg.reg_flags & PFM_REGFL_OVFL_NOTIFY)
-				ctx->ctx_pmds[cnum - PMU_FIRST_COUNTER].flags |= PFM_REGFL_OVFL_NOTIFY;
-#endif
+			/*
+			 * copy reset vector
+			 */
+			ctx->ctx_soft_pmds[cnum].reset_pmds[0] = tmp.reg_reset_pmds[0];
+			ctx->ctx_soft_pmds[cnum].reset_pmds[1] = tmp.reg_reset_pmds[1];
+			ctx->ctx_soft_pmds[cnum].reset_pmds[2] = tmp.reg_reset_pmds[2];
+			ctx->ctx_soft_pmds[cnum].reset_pmds[3] = tmp.reg_reset_pmds[3];
+
+			/*
+			 * needed in case the user does not initialize the equivalent
+			 * PMD. Clearing is done in reset_pmu() so there is no possible
+			 * leak here.
+			 */
+			CTX_USED_PMD(ctx, cnum);
 		}
-		/* keep track of what we use */
-		CTX_USED_PMC(ctx, cnum);
-		ia64_set_pmc(cnum, tmp.pfr_reg.reg_value);
+abort_mission:
+		if (ret == -EINVAL) reg_retval = PFM_REG_RETFL_EINVAL;
 
-		DBprintk((" setting PMC[%ld]=0x%lx flags=0x%x used_pmcs=0%lx\n", cnum, tmp.pfr_reg.reg_value, ctx->ctx_pmds[cnum - PMU_FIRST_COUNTER].flags, ctx->ctx_used_pmcs[0]));
+		PFM_REG_RETFLAG_SET(tmp.reg_flags, reg_retval);
 
-	}
-	/*
-	 * we have to set this here event hough we haven't necessarily started monitoring
-	 * because we may be context switched out
-	 */
-	if (ctx->ctx_fl_system==0) th->flags |= IA64_THREAD_PM_VALID;
+		/*
+		 * update register return value, abort all if problem during copy.
+		 */
+		if (copy_to_user(req, &tmp, sizeof(tmp))) return -EFAULT;
 
-	return 0;
+		/*
+		 * if there was something wrong on this register, don't touch
+		 * the hardware at all and abort write request for others.
+		 *
+		 * On error, the user mut sequentially scan the table and the first
+		 * entry which has a return flag set is the one that caused the error.
+		 */
+		if (ret != 0) {
+			DBprintk(("[%d] pmc[%u]=0x%lx error %d\n",
+				  ta->pid, cnum, tmp.reg_value, reg_retval));
+			break;
+		}
+
+		/* 
+		 * We can proceed with this register!
+		 */
+		
+		/* 
+		 * keep copy the pmc, used for register reload
+		 */
+		th->pmc[cnum] = tmp.reg_value;
+
+		ia64_set_pmc(cnum, tmp.reg_value);
+
+		DBprintk(("[%d] pmc[%u]=0x%lx flags=0x%x save_pmcs=0%lx reload_pmcs=0x%lx\n", 
+			  ta->pid, cnum, tmp.reg_value, 
+			  ctx->ctx_soft_pmds[cnum].flags, 
+			  ctx->ctx_saved_pmcs[0], ctx->ctx_reload_pmcs[0]));
+
+	}
+	return ret;
 }
 
 static int
-pfm_write_pmds(struct task_struct *ta, perfmon_req_t *req, int count)
+pfm_write_pmds(struct task_struct *ta, pfm_context_t *ctx, void *arg, int count, struct pt_regs *regs)
 {
-	struct thread_struct *th = &ta->thread;
-	pfm_context_t *ctx = th->pfm_context;
-	perfmon_req_t tmp;
-	unsigned long cnum;
+	pfarg_reg_t tmp, *req = (pfarg_reg_t *)arg;
+	unsigned int cnum;
 	int i;
+	int ret = 0, reg_retval = 0;
+
+	/* we don't quite support this right now */
+	if (ta != current) return -EINVAL;
+
+	/* 
+	 * Cannot do anything before PMU is enabled 
+	 */
+	if (!CTX_IS_ENABLED(ctx)) return -EINVAL;
+
 
 	/* XXX: ctx locking may be required here */
 
 	for (i = 0; i < count; i++, req++) {
-		int k;
 
 		if (copy_from_user(&tmp, req, sizeof(tmp))) return -EFAULT;
 
-		cnum = tmp.pfr_reg.reg_num;
-
-		k = cnum - PMU_FIRST_COUNTER;
+		cnum = tmp.reg_num;
 
-		if (!PMD_IS_IMPL(cnum)) return -EINVAL;
+		if (!PMD_IS_IMPL(cnum)) {
+			ret = -EINVAL;
+			goto abort_mission;
+		}
 
 		/* update virtualized (64bits) counter */
-		if (PMD_IS_COUNTER(cnum)) {
-			ctx->ctx_pmds[k].ival = tmp.pfr_reg.reg_value;
-			ctx->ctx_pmds[k].val  = tmp.pfr_reg.reg_value & ~pmu_conf.perf_ovfl_val;
-			ctx->ctx_pmds[k].smpl_rval = tmp.pfr_reg.reg_smpl_reset;
-			ctx->ctx_pmds[k].ovfl_rval = tmp.pfr_reg.reg_ovfl_reset;
+		if (PMD_IS_COUNTING(cnum)) {
+			ctx->ctx_soft_pmds[cnum].ival = tmp.reg_value;
+			ctx->ctx_soft_pmds[cnum].val  = tmp.reg_value & ~pmu_conf.perf_ovfl_val;
+			ctx->ctx_soft_pmds[cnum].long_reset = tmp.reg_long_reset;
+			ctx->ctx_soft_pmds[cnum].short_reset = tmp.reg_short_reset;
+
+		}
+abort_mission:
+		if (ret == -EINVAL) reg_retval = PFM_REG_RETFL_EINVAL;
+
+		PFM_REG_RETFLAG_SET(tmp.reg_flags, reg_retval);
 
-			if (tmp.pfr_reg.reg_flags & PFM_REGFL_OVFL_NOTIFY)
-				ctx->ctx_pmds[cnum - PMU_FIRST_COUNTER].flags |= PFM_REGFL_OVFL_NOTIFY;
+		if (copy_to_user(req, &tmp, sizeof(tmp))) return -EFAULT;
+
+		/*
+		 * if there was something wrong on this register, don't touch
+		 * the hardware at all and abort write request for others.
+		 *
+		 * On error, the user mut sequentially scan the table and the first
+		 * entry which has a return flag set is the one that caused the error.
+		 */
+		if (ret != 0) {
+			DBprintk(("[%d] pmc[%u]=0x%lx error %d\n",
+				  ta->pid, cnum, tmp.reg_value, reg_retval));
+			break;
 		}
+
 		/* keep track of what we use */
 		CTX_USED_PMD(ctx, cnum);
 
 		/* writes to unimplemented part is ignored, so this is safe */
-		ia64_set_pmd(cnum, tmp.pfr_reg.reg_value);
+		ia64_set_pmd(cnum, tmp.reg_value);
 
 		/* to go away */
 		ia64_srlz_d();
-		DBprintk((" setting PMD[%ld]:  ovfl_notify=%d pmd.val=0x%lx pmd.ovfl_rval=0x%lx pmd.smpl_rval=0x%lx pmd=%lx used_pmds=0%lx\n",
-					cnum,
-					PMD_OVFL_NOTIFY(ctx, cnum - PMU_FIRST_COUNTER),
-					ctx->ctx_pmds[k].val,
-					ctx->ctx_pmds[k].ovfl_rval,
-					ctx->ctx_pmds[k].smpl_rval,
-					ia64_get_pmd(cnum) & pmu_conf.perf_ovfl_val,
-					ctx->ctx_used_pmds[0]));
+		DBprintk(("[%d] pmd[%u]: soft_pmd=0x%lx  short_reset=0x%lx "
+			  "long_reset=0x%lx hw_pmd=%lx notify=%c used_pmds=0x%lx reset_pmds=0x%lx\n",
+				ta->pid, cnum,
+				ctx->ctx_soft_pmds[cnum].val,
+				ctx->ctx_soft_pmds[cnum].short_reset,
+				ctx->ctx_soft_pmds[cnum].long_reset,
+				ia64_get_pmd(cnum) & pmu_conf.perf_ovfl_val,
+				PMC_OVFL_NOTIFY(ctx, cnum) ? 'Y':'N',
+				ctx->ctx_used_pmds[0],
+				ctx->ctx_soft_pmds[cnum].reset_pmds[0]));
 	}
-	/*
-	 * we have to set this here event hough we haven't necessarily started monitoring
-	 * because we may be context switched out
-	 */
-	if (ctx->ctx_fl_system==0) th->flags |= IA64_THREAD_PM_VALID;
-
-	return 0;
+	return ret;
 }
 
 static int
-pfm_read_pmds(struct task_struct *ta, perfmon_req_t *req, int count)
+pfm_read_pmds(struct task_struct *ta, pfm_context_t *ctx, void *arg, int count, struct pt_regs *regs)
 {
 	struct thread_struct *th = &ta->thread;
-	pfm_context_t *ctx = th->pfm_context;
 	unsigned long val=0;
-	perfmon_req_t tmp;
+	pfarg_reg_t tmp, *req = (pfarg_reg_t *)arg;
 	int i;
 
+	if (!CTX_IS_ENABLED(ctx)) return -EINVAL;
+
 	/*
 	 * XXX: MUST MAKE SURE WE DON"T HAVE ANY PENDING OVERFLOW BEFORE READING
-	 * This is required when the monitoring has been stoppped by user of kernel.
-	 * If ity is still going on, then that's fine because we a re not gauranteed
-	 * to return an accurate value in this case
+	 * This is required when the monitoring has been stoppped by user or kernel.
+	 * If it is still going on, then that's fine because we a re not guaranteed
+	 * to return an accurate value in this case.
 	 */
 
 	/* XXX: ctx locking may be required here */
 
+	DBprintk(("ctx_last_cpu=%d for [%d]\n", atomic_read(&ctx->ctx_last_cpu), ta->pid));
+
 	for (i = 0; i < count; i++, req++) {
-		unsigned long reg_val = ~0, ctx_val = ~0;
+		unsigned long reg_val = ~0UL, ctx_val = ~0UL;
 
 		if (copy_from_user(&tmp, req, sizeof(tmp))) return -EFAULT;
 
-		if (!PMD_IS_IMPL(tmp.pfr_reg.reg_num)) return -EINVAL;
+		if (!PMD_IS_IMPL(tmp.reg_num)) goto abort_mission;
 
-		if (PMD_IS_COUNTER(tmp.pfr_reg.reg_num)) {
-			if (ta == current){
-				val = ia64_get_pmd(tmp.pfr_reg.reg_num);
-			} else {
-				val = reg_val = th->pmd[tmp.pfr_reg.reg_num];
+		/*
+		 * If the task is not the current one, then we check if the
+		 * PMU state is still in the local live register due to lazy ctxsw.
+		 * If true, then we read directly from the registers.
+		 */
+		if (atomic_read(&ctx->ctx_last_cpu) == smp_processor_id()){
+			ia64_srlz_d();
+			val = reg_val = ia64_get_pmd(tmp.reg_num);
+			DBprintk(("reading pmd[%u]=0x%lx from hw\n", tmp.reg_num, val));
+		} else {
+#ifdef CONFIG_SMP
+			int cpu;
+			/*
+			 * for SMP system, the context may still be live on another
+			 * CPU so we need to fetch it before proceeding with the read
+			 * This call we only be made once for the whole loop because
+			 * of ctx_last_cpu becoming == -1.
+			 *
+			 * We cannot reuse ctx_last_cpu as it may change before we get to the
+			 * actual IPI call. In this case, we will do the call for nothing but
+			 * there is no way around it. The receiving side will simply do nothing.
+			 */
+			cpu = atomic_read(&ctx->ctx_last_cpu);
+			if (cpu != -1) {
+				DBprintk(("must fetch on CPU%d for [%d]\n", cpu, ta->pid));
+				pfm_fetch_regs(cpu, ta, ctx);
 			}
-			val &= pmu_conf.perf_ovfl_val;
+#endif
+			/* context has been saved */
+			val = reg_val = th->pmd[tmp.reg_num];
+		}
+		if (PMD_IS_COUNTING(tmp.reg_num)) {
 			/*
-			 * lower part of .val may not be zero, so we must be an addition because of
-			 * residual count (see update_counters).
+			 * XXX: need to check for overflow
 			 */
-			val += ctx_val = ctx->ctx_pmds[tmp.pfr_reg.reg_num - PMU_FIRST_COUNTER].val;
+
+			val &= pmu_conf.perf_ovfl_val;
+			val += ctx_val = ctx->ctx_soft_pmds[tmp.reg_num].val;
 		} else {
-			/* for now */
-			if (ta != current) return -EINVAL;
 
-			ia64_srlz_d();
-			val = ia64_get_pmd(tmp.pfr_reg.reg_num);
+			val = reg_val = ia64_get_pmd(tmp.reg_num);
 		}
-		tmp.pfr_reg.reg_value = val;
+		PFM_REG_RETFLAG_SET(tmp.reg_flags, 0);
+		tmp.reg_value = val;
 
-		DBprintk((" reading PMD[%ld]=0x%lx reg=0x%lx ctx_val=0x%lx pmc=0x%lx\n", 
-					tmp.pfr_reg.reg_num, val, reg_val, ctx_val, ia64_get_pmc(tmp.pfr_reg.reg_num)));
+		DBprintk(("read pmd[%u] soft_pmd=0x%lx reg=0x%lx pmc=0x%lx\n", 
+					tmp.reg_num, ctx_val, reg_val, 
+					ia64_get_pmc(tmp.reg_num)));
 
 		if (copy_to_user(req, &tmp, sizeof(tmp))) return -EFAULT;
 	}
 	return 0;
+abort_mission:
+	PFM_REG_RETFLAG_SET(tmp.reg_flags, PFM_REG_RETFL_EINVAL);
+	/* 
+	 * XXX: if this fails, we stick we the original failure, flag not updated!
+	 */
+	copy_to_user(req, &tmp, sizeof(tmp));
+	return -EINVAL;
+
+}
+
+#ifdef PFM_PMU_USES_DBR
+/*
+ * Only call this function when a process it trying to
+ * write the debug registers (reading is always allowed)
+ */
+int
+pfm_use_debug_registers(struct task_struct *task)
+{
+	pfm_context_t *ctx = task->thread.pfm_context;
+	int ret = 0;
+
+	DBprintk(("called for [%d]\n", task->pid));
+
+	/*
+	 * do it only once
+	 */
+	if (task->thread.flags & IA64_THREAD_DBG_VALID) return 0;
+
+	/*
+	 * Even on SMP, we do not need to use an atomic here because
+	 * the only way in is via ptrace() and this is possible only when the
+	 * process is stopped. Even in the case where the ctxsw out is not totally
+	 * completed by the time we come here, there is no way the 'stopped' process
+	 * could be in the middle of fiddling with the pfm_write_ibr_dbr() routine.
+	 * So this is always safe.
+	 */
+	if (ctx && ctx->ctx_fl_using_dbreg == 1) return -1;
+
+	/*
+	 * XXX: not pretty
+	 */
+	LOCK_PFS();
+
+	/*
+	 * We only allow the use of debug registers when there is no system
+	 * wide monitoring 
+	 * XXX: we could relax this by 
+	 */
+	if (pfm_sessions.pfs_sys_use_dbregs> 0)
+		ret = -1;
+	else
+		pfm_sessions.pfs_ptrace_use_dbregs++;
+
+	DBprintk(("ptrace_use_dbregs=%lu  sys_use_dbregs=%lu by [%d] ret = %d\n", 
+		  pfm_sessions.pfs_ptrace_use_dbregs, 
+		  pfm_sessions.pfs_sys_use_dbregs, 
+		  task->pid, ret));
+
+	UNLOCK_PFS();
+
+	return ret;
+}
+
+/*
+ * This function is called for every task that exits with the
+ * IA64_THREAD_DBG_VALID set. This indicates a task which was
+ * able to use the debug registers for debugging purposes via
+ * ptrace(). Therefore we know it was not using them for
+ * perfmormance monitoring, so we only decrement the number
+ * of "ptraced" debug register users to keep the count up to date
+ */
+int
+pfm_release_debug_registers(struct task_struct *task)
+{
+	int ret;
+
+	LOCK_PFS();
+	if (pfm_sessions.pfs_ptrace_use_dbregs == 0) {
+		printk("perfmon: invalid release for [%d] ptrace_use_dbregs=0\n", task->pid);
+		ret = -1;
+	}  else {
+		pfm_sessions.pfs_ptrace_use_dbregs--;
+		ret = 0;
+	}
+	UNLOCK_PFS();
+
+	return ret;
+}
+#else /* PFM_PMU_USES_DBR is true */
+/*
+ * in case, the PMU does not use the debug registers, these two functions are nops.
+ * The first function is called from arch/ia64/kernel/ptrace.c.
+ * The second function is called from arch/ia64/kernel/process.c.
+ */
+int
+pfm_use_debug_registers(struct task_struct *task)
+{
+	return 0;
+}
+int
+pfm_release_debug_registers(struct task_struct *task)
+{
+	return 0;
 }
+#endif /* PFM_PMU_USES_DBR */
 
 static int
-pfm_do_restart(struct task_struct *task)
+pfm_restart(struct task_struct *task, pfm_context_t *ctx, void *arg, int count, 
+	 struct pt_regs *regs)
 {
-	struct thread_struct *th = &task->thread;
-	pfm_context_t *ctx = th->pfm_context;
 	void *sem = &ctx->ctx_restart_sem;
 
+	/* 
+	 * Cannot do anything before PMU is enabled 
+	 */
+	if (!CTX_IS_ENABLED(ctx)) return -EINVAL;
+
+
+	if (ctx->ctx_fl_frozen==0) {
+		printk("task %d without pmu_frozen set\n", task->pid);
+		return -EINVAL;
+	}
+
 	if (task == current) {
-		DBprintk((" restarting self %d frozen=%d \n", current->pid, ctx->ctx_fl_frozen));
+		DBprintk(("restarting self %d frozen=%d \n", current->pid, ctx->ctx_fl_frozen));
+
+		pfm_reset_regs(ctx, ctx->ctx_ovfl_regs, PFM_RELOAD_LONG_RESET);
 
-		pfm_reset_regs(ctx);
+		ctx->ctx_ovfl_regs[0] = 0UL;
 
 		/*
 		 * We ignore block/don't block because we never block
@@ -1011,26 +1554,36 @@
 		ctx->ctx_fl_frozen = 0;
 
 		if (CTX_HAS_SMPL(ctx)) {
-			ctx->ctx_smpl_buf->psb_hdr->hdr_count = 0;
-			ctx->ctx_smpl_buf->psb_index = 0;
+			ctx->ctx_psb->psb_hdr->hdr_count = 0;
+			ctx->ctx_psb->psb_index = 0;
 		}
 
-		/* pfm_reset_smpl_buffers(ctx,th->pfm_ovfl_regs);*/
-
 		/* simply unfreeze */
 		ia64_set_pmc(0, 0);
 		ia64_srlz_d();
 
 		return 0;
-	}
+	} 
+	/* restart on another task */
 
-	/* check if blocking */
+	/*
+	 * if blocking, then post the semaphore.
+	 * if non-blocking, then we ensure that the task will go into
+	 * pfm_overflow_must_block() before returning to user mode. 
+	 * We cannot explicitely reset another task, it MUST always
+	 * be done by the task itself. This works for system wide because
+	 * the tool that is controlling the session is doing "self-monitoring".
+	 *
+	 * XXX: what if the task never goes back to user?
+	 *
+	 */
 	if (CTX_OVFL_NOBLOCK(ctx) == 0) {
-		DBprintk((" unblocking %d \n", task->pid));
+		DBprintk(("unblocking %d \n", task->pid));
 		up(sem);
-		return 0;
+	} else {
+		task->thread.pfm_ovfl_block_reset = 1;
 	}
-
+#if 0
 	/*
 	 * in case of non blocking mode, then it's just a matter of
 	 * of reseting the sampling buffer (if any) index. The PMU
@@ -1041,281 +1594,719 @@
 	 * must reset the header count first
 	 */
 	if (CTX_HAS_SMPL(ctx)) {
-		DBprintk((" resetting sampling indexes for %d \n", task->pid));
-		ctx->ctx_smpl_buf->psb_hdr->hdr_count = 0;
-		ctx->ctx_smpl_buf->psb_index = 0;
+		DBprintk(("resetting sampling indexes for %d \n", task->pid));
+		ctx->ctx_psb->psb_hdr->hdr_count = 0;
+		ctx->ctx_psb->psb_index = 0;
 	}
-
+#endif
 	return 0;
 }
 
+#ifndef CONFIG_SMP
 /*
- * system-wide mode: propagate activation/desactivation throughout the tasklist
- *
- * XXX: does not work for SMP, of course
+ * On UP kernels, we do not need to constantly set the psr.pp bit
+ * when a task is scheduled. The psr.pp bit can only be changed in
+ * the kernel because of a user request. Given we are on a UP non preeemptive 
+ * kernel we know that no other task is running, so we cna simply update their
+ * psr.pp from their saved state. There is this no impact on the context switch
+ * code compared to the SMP case.
  */
 static void
-pfm_process_tasklist(int cmd)
+pfm_tasklist_toggle_pp(unsigned int val)
 {
 	struct task_struct *p;
 	struct pt_regs *regs;
 
+	DBprintk(("invoked by [%d] pp=%u\n", current->pid, val));
+
+	read_lock(&tasklist_lock);
+
 	for_each_task(p) {
-		regs = (struct pt_regs *)((unsigned long)p + IA64_STK_OFFSET);
+       		regs = (struct pt_regs *)((unsigned long) p + IA64_STK_OFFSET);
+
+		/*
+		 * position on pt_regs saved on stack on 1st entry into the kernel
+		 */
 		regs--;
-		ia64_psr(regs)->pp = cmd;
+
+		/*
+		 * update psr.pp
+		 */
+		ia64_psr(regs)->pp = val;
 	}
+	read_unlock(&tasklist_lock);
 }
+#endif
+
+
 
 static int
-do_perfmonctl (struct task_struct *task, int cmd, int flags, perfmon_req_t *req, int count, struct pt_regs *regs)
+pfm_stop(struct task_struct *task, pfm_context_t *ctx, void *arg, int count, 
+	 struct pt_regs *regs)
 {
-	perfmon_req_t tmp;
-	struct thread_struct *th = &task->thread;
-	pfm_context_t *ctx = th->pfm_context;
-
-	memset(&tmp, 0, sizeof(tmp));
+	/* we don't quite support this right now */
+	if (task != current) return -EINVAL;
 
-	if (ctx == NULL && cmd != PFM_CREATE_CONTEXT && cmd < PFM_DEBUG_BASE) {
-		DBprintk((" PFM_WRITE_PMCS: no context for task %d\n", task->pid));
-		return -EINVAL;
-	}
+	/* 
+	 * Cannot do anything before PMU is enabled 
+	 */
+	if (!CTX_IS_ENABLED(ctx)) return -EINVAL;
 
-	switch (cmd) {
-		case PFM_CREATE_CONTEXT:
-			/* a context has already been defined */
-			if (ctx) return -EBUSY;
+	DBprintk(("[%d] fl_system=%d owner=%p current=%p\n",
+				current->pid,
+				ctx->ctx_fl_system, PMU_OWNER(),
+				current));
+	/* simply stop monitoring but not the PMU */
+	if (ctx->ctx_fl_system) {
 
-			/*
-			 * cannot directly create a context in another process
-			 */
-			if (task != current) return -EINVAL;
+		__asm__ __volatile__ ("rsm psr.pp;;"::: "memory");
 
-			if (req == NULL || count != 1) return -EINVAL;
+		/* disable dcr pp */
+		ia64_set_dcr(ia64_get_dcr() & ~IA64_DCR_PP);
 
-			if (!access_ok(VERIFY_READ, req, sizeof(struct perfmon_req_t)*count)) return -EFAULT;
+#ifdef CONFIG_SMP
+		local_cpu_data->pfm_dcr_pp  = 0;
+#else
+		pfm_tasklist_toggle_pp(0);
+#endif
 
-			return pfm_context_create(flags, req);
+		ia64_psr(regs)->pp = 0;
 
-		case PFM_WRITE_PMCS:
-			/* we don't quite support this right now */
-			if (task != current) return -EINVAL;
+	} else {
+		__asm__ __volatile__ ("rum psr.up;;"::: "memory");
 
-			if (!access_ok(VERIFY_READ, req, sizeof(struct perfmon_req_t)*count)) return -EFAULT;
+		ia64_psr(regs)->up = 0;
+	}
+	return 0;
+}
 
-			return pfm_write_pmcs(task, req, count);
+static int
+pfm_disable(struct task_struct *task, pfm_context_t *ctx, void *arg, int count, 
+	   struct pt_regs *regs)
+{	
+	/* we don't quite support this right now */
+	if (task != current) return -EINVAL;
 
-		case PFM_WRITE_PMDS:
-			/* we don't quite support this right now */
-			if (task != current) return -EINVAL;
+	if (!CTX_IS_ENABLED(ctx)) return -EINVAL;
 
-			if (!access_ok(VERIFY_READ, req, sizeof(struct perfmon_req_t)*count)) return -EFAULT;
+	/*
+	 * stop monitoring, freeze PMU, and save state in context
+	 * this call will clear IA64_THREAD_PM_VALID for per-task sessions.
+	 */
+	pfm_flush_regs(task);
 
-			return pfm_write_pmds(task, req, count);
+	if (ctx->ctx_fl_system) {	
+		ia64_psr(regs)->pp = 0;
+	} else {
+		ia64_psr(regs)->up = 0;
+	}
+	/* 
+	 * goes back to default behavior 
+	 * no need to change live psr.sp because useless at the kernel level
+	 */
+	ia64_psr(regs)->sp = 1;
 
-		case PFM_START:
-			/* we don't quite support this right now */
-			if (task != current) return -EINVAL;
+	DBprintk(("enabling psr.sp for [%d]\n", current->pid));
 
-			if (PMU_OWNER()  && PMU_OWNER() != current && PFM_CAN_DO_LAZY()) pfm_lazy_save_regs(PMU_OWNER());
+	ctx->ctx_flags.state = PFM_CTX_DISABLED;
 
-			SET_PMU_OWNER(current);
+	return 0;
+}
 
-			/* will start monitoring right after rfi */
-			ia64_psr(regs)->up = 1;
-			ia64_psr(regs)->pp = 1;
 
-			if (ctx->ctx_fl_system) {
-				pfm_process_tasklist(1);
-				pfs_info.pfs_pp = 1;
-			}
 
-			/*
-			 * mark the state as valid.
-			 * this will trigger save/restore at context switch
-			 */
-			if (ctx->ctx_fl_system==0) th->flags |= IA64_THREAD_PM_VALID;
+static int
+pfm_destroy_context(struct task_struct *task, pfm_context_t *ctx, void *arg, int count, 
+	 struct pt_regs *regs)
+{
+	/* we don't quite support this right now */
+	if (task != current) return -EINVAL;
 
-			ia64_set_pmc(0, 0);
-			ia64_srlz_d();
+	/*
+	 * if context was never enabled, then there is not much
+	 * to do
+	 */
+	if (!CTX_IS_ENABLED(ctx)) goto skipped_stop;
 
-			break;
+	/*
+	 * Disable context: stop monitoring, flush regs to software state (useless here), 
+	 * and freeze PMU
+	 * 
+	 * The IA64_THREAD_PM_VALID is cleared by pfm_flush_regs() called from pfm_disable()
+	 */
+	pfm_disable(task, ctx, arg, count, regs);
 
-		case PFM_ENABLE:
-			/* we don't quite support this right now */
-			if (task != current) return -EINVAL;
+	if (ctx->ctx_fl_system) {	
+		ia64_psr(regs)->pp = 0;
+	} else {
+		ia64_psr(regs)->up = 0;
+	}
 
-			if (PMU_OWNER()  && PMU_OWNER() != current && PFM_CAN_DO_LAZY()) pfm_lazy_save_regs(PMU_OWNER());
+	/* restore security level */
+	ia64_psr(regs)->sp = 1;
 
-			/* reset all registers to stable quiet state */
-			ia64_reset_pmu();
+skipped_stop:
+	/*
+	 * remove sampling buffer mapping, if any
+	 */
+	if (ctx->ctx_smpl_vaddr) pfm_remove_smpl_mapping(task);
 
-			/* make sure nothing starts */
-			ia64_psr(regs)->up = 0;
-			ia64_psr(regs)->pp = 0;
+	/* now free context and related state */
+	pfm_context_exit(task);
 
-			/* do it on the live register as well */
-			__asm__ __volatile__ ("rsm psr.pp|psr.pp;;"::: "memory");
+	return 0;
+}
 
-			SET_PMU_OWNER(current);
+/*
+ * does nothing at the moment
+ */
+static int
+pfm_unprotect_context(struct task_struct *task, pfm_context_t *ctx, void *arg, int count, 
+	 struct pt_regs *regs)
+{
+	return 0;
+}
 
-			/*
-			 * mark the state as valid.
-			 * this will trigger save/restore at context switch
-			 */
-			if (ctx->ctx_fl_system==0) th->flags |= IA64_THREAD_PM_VALID;
+static int
+pfm_protect_context(struct task_struct *task, pfm_context_t *ctx, void *arg, int count, 
+	 struct pt_regs *regs)
+{
+	DBprintk(("context from [%d] is protected\n", task->pid));
+	/*
+	 * from now on, only the creator of the context has access to it
+	 */
+	ctx->ctx_fl_protected = 1;
 
-			/* simply unfreeze */
-			ia64_set_pmc(0, 0);
-			ia64_srlz_d();
-			break;
+	/*
+	 * reinforce secure monitoring: cannot toggle psr.up
+	 */
+	ia64_psr(regs)->sp = 1;
 
-		case PFM_DISABLE:
-			/* we don't quite support this right now */
-			if (task != current) return -EINVAL;
+	return 0;
+}
 
-			/* simply freeze */
-			ia64_set_pmc(0, 1);
-			ia64_srlz_d();
-			/*
-			 * XXX: cannot really toggle IA64_THREAD_PM_VALID
-			 * but context is still considered valid, so any 
-			 * read request would return something valid. Same
-			 * thing when this task terminates (pfm_flush_regs()).
-			 */
-			break;
+static int
+pfm_debug(struct task_struct *task, pfm_context_t *ctx, void *arg, int count, 
+	 struct pt_regs *regs)
+{
+	unsigned int mode = *(unsigned int *)arg;
 
-		case PFM_READ_PMDS:
-			if (!access_ok(VERIFY_READ, req, sizeof(struct perfmon_req_t)*count)) return -EFAULT;
-			if (!access_ok(VERIFY_WRITE, req, sizeof(struct perfmon_req_t)*count)) return -EFAULT;
-
-			return pfm_read_pmds(task, req, count);
-
-	      case PFM_STOP:
-			/* we don't quite support this right now */
-			if (task != current) return -EINVAL;
-
-			/* simply stop monitors, not PMU */
-			ia64_psr(regs)->up = 0;
-			ia64_psr(regs)->pp = 0;
-
-			if (ctx->ctx_fl_system) {
-				pfm_process_tasklist(0);
-				pfs_info.pfs_pp = 0;
-			}
+	pfm_debug_mode = mode == 0 ? 0 : 1;
 
-			break;
+	printk("perfmon debugging %s\n", pfm_debug_mode ? "on" : "off");
+
+	return 0;
+}
+
+#ifdef PFM_PMU_USES_DBR
+
+typedef struct {
+	unsigned long ibr_mask:56;
+	unsigned long ibr_plm:4;
+	unsigned long ibr_ig:3;
+	unsigned long ibr_x:1;
+} ibr_mask_reg_t;
+
+typedef struct {
+	unsigned long dbr_mask:56;
+	unsigned long dbr_plm:4;
+	unsigned long dbr_ig:2;
+	unsigned long dbr_w:1;
+	unsigned long dbr_r:1;
+} dbr_mask_reg_t;
+
+typedef union {
+	unsigned long  val;
+	ibr_mask_reg_t ibr;
+	dbr_mask_reg_t dbr;
+} dbreg_t;
+
+
+static int
+pfm_write_ibr_dbr(int mode, struct task_struct *task, void *arg, int count, struct pt_regs *regs)
+{
+	struct thread_struct *thread = &task->thread;
+	pfm_context_t *ctx = task->thread.pfm_context;
+	pfarg_dbreg_t tmp, *req = (pfarg_dbreg_t *)arg;
+	dbreg_t dbreg;
+	unsigned int rnum;
+	int first_time;
+	int i, ret = 0;
+
+	/*
+	 * for range restriction: psr.db must be cleared or the
+	 * the PMU will ignore the debug registers.
+	 *
+	 * XXX: may need more in system wide mode,
+	 * no task can have this bit set?
+	 */
+	if (ia64_psr(regs)->db == 1) return -EINVAL;
+
+
+	first_time = ctx->ctx_fl_using_dbreg == 0;
+
+	/*
+	 * check for debug registers in system wide mode
+	 *
+	 */
+	LOCK_PFS();
+	if (ctx->ctx_fl_system && first_time) {
+		if (pfm_sessions.pfs_ptrace_use_dbregs) 
+			ret = -EBUSY;
+		else
+			pfm_sessions.pfs_sys_use_dbregs++;
+	}
+	UNLOCK_PFS();
 
-	      case PFM_RESTART: /* temporary, will most likely end up as a PFM_ENABLE */
+	if (ret != 0) return ret;
 
-			if ((th->flags & IA64_THREAD_PM_VALID) == 0 && ctx->ctx_fl_system==0) {
-				printk(" PFM_RESTART not monitoring\n");
-				return -EINVAL;
+	if (ctx->ctx_fl_system) {
+		/* we mark ourselves as owner  of the debug registers */
+		ctx->ctx_fl_using_dbreg = 1;
+	} else {
+       		if (ctx->ctx_fl_using_dbreg == 0) {
+			ret= -EBUSY;
+			if ((thread->flags & IA64_THREAD_DBG_VALID) != 0) {
+				DBprintk(("debug registers already in use for [%d]\n", task->pid));
+				goto abort_mission;
+			}
+			/* we mark ourselves as owner  of the debug registers */
+			ctx->ctx_fl_using_dbreg = 1;
+
+			/* 
+			 * Given debug registers cannot be used for both debugging 
+			 * and performance monitoring at the same time, we reuse
+			 * the storage area to save and restore the registers on ctxsw.
+			 */
+			memset(task->thread.dbr, 0, sizeof(task->thread.dbr));
+			memset(task->thread.ibr, 0, sizeof(task->thread.ibr));
+
+			/*
+			 * clear hardware registers to make sure we don't leak
+			 * information and pick up stale state
+			 */
+			for (i=0; i < pmu_conf.num_ibrs; i++) {
+				ia64_set_ibr(i, 0UL);
 			}
-			if (CTX_OVFL_NOBLOCK(ctx) == 0 && ctx->ctx_fl_frozen==0) {
-				printk("task %d without pmu_frozen set\n", task->pid);
-				return -EINVAL;
+			for (i=0; i < pmu_conf.num_dbrs; i++) {
+				ia64_set_dbr(i, 0UL);
 			}
+		}
+	}
 
-			return pfm_do_restart(task); /* we only look at first entry */
+	ret = -EFAULT;
 
-	      case PFM_DESTROY_CONTEXT:
-			/* we don't quite support this right now */
-			if (task != current) return -EINVAL;
-
-			/* first stop monitors */
-			ia64_psr(regs)->up = 0;
-			ia64_psr(regs)->pp = 0;
+	/*
+	 * Now install the values into the registers
+	 */
+	for (i = 0; i < count; i++, req++) {
 
-			/* then freeze PMU */
-			ia64_set_pmc(0, 1);
-			ia64_srlz_d();
+		
+		if (copy_from_user(&tmp, req, sizeof(tmp))) goto abort_mission;
+		
+		rnum      = tmp.dbreg_num;
+		dbreg.val = tmp.dbreg_value;
+		
+		ret = -EINVAL;
 
-			/* don't save/restore on context switch */
-			if (ctx->ctx_fl_system ==0) task->thread.flags &= ~IA64_THREAD_PM_VALID;
+		if ((mode == 0 && !IBR_IS_IMPL(rnum)) || ((mode == 1) && !DBR_IS_IMPL(rnum))) {
+			DBprintk(("invalid register %u val=0x%lx mode=%d i=%d count=%d\n", 
+				  rnum, dbreg.val, mode, i, count));
 
-			SET_PMU_OWNER(NULL);
+			goto abort_mission;
+		}
 
-			/* now free context and related state */
-			pfm_context_exit(task);
-			break;
+		/*
+		 * make sure we do not install enabled breakpoint
+		 */
+		if (rnum & 0x1) {
+			if (mode == 0) 
+				dbreg.ibr.ibr_x = 0;
+			else
+				dbreg.dbr.dbr_r = dbreg.dbr.dbr_w = 0;
+		}
 
-	      case PFM_DEBUG_ON:
-			printk("perfmon debugging on\n");
-			pfm_debug = 1;
-			break;
+		/*
+		 * clear return flags and copy back to user
+		 *
+		 * XXX: fix once EAGAIN is implemented
+		 */
+		ret = -EFAULT;
 
-	      case PFM_DEBUG_OFF:
-			printk("perfmon debugging off\n");
-			pfm_debug = 0;
-			break;
+		PFM_REG_RETFLAG_SET(tmp.dbreg_flags, 0);
+
+		if (copy_to_user(req, &tmp, sizeof(tmp))) goto abort_mission;
+
+		/*
+		 * Debug registers, just like PMC, can only be modified
+		 * by a kernel call. Moreover, perfmon() access to those
+		 * registers are centralized in this routine. The hardware
+		 * does not modify the value of these registers, therefore,
+		 * if we save them as they are written, we can avoid having
+		 * to save them on context switch out. This is made possible
+		 * by the fact that when perfmon uses debug registers, ptrace()
+		 * won't be able to modify them concurrently.
+		 */
+		if (mode == 0) {
+			CTX_USED_IBR(ctx, rnum);
+
+			ia64_set_ibr(rnum, dbreg.val);
 
-	      default:
-			DBprintk((" UNknown command 0x%x\n", cmd));
+			thread->ibr[rnum] = dbreg.val;
+
+			DBprintk(("write ibr%u=0x%lx used_ibrs=0x%lx\n", rnum, dbreg.val, ctx->ctx_used_ibrs[0]));
+		} else {
+			CTX_USED_DBR(ctx, rnum);
+
+			ia64_set_dbr(rnum, dbreg.val);
+
+			thread->dbr[rnum] = dbreg.val;
+
+			DBprintk(("write dbr%u=0x%lx used_dbrs=0x%lx\n", rnum, dbreg.val, ctx->ctx_used_dbrs[0]));
+		}
+	}
+
+	return 0;
+
+abort_mission:
+	/*
+	 * in case it was our first attempt, we undo the global modifications
+	 */
+	if (first_time) {
+		LOCK_PFS();
+		if (ctx->ctx_fl_system) {
+			pfm_sessions.pfs_sys_use_dbregs--;
+		}
+		UNLOCK_PFS();
+		ctx->ctx_fl_using_dbreg = 0;
+	}
+	/*
+	 * install error return flag
+	 */
+	if (ret != -EFAULT) {
+		/*
+		 * XXX: for now we can only come here on EINVAL
+		 */
+		PFM_REG_RETFLAG_SET(tmp.dbreg_flags, PFM_REG_RETFL_EINVAL);
+		copy_to_user(req, &tmp, sizeof(tmp));
+	}
+	return ret;
+}
+
+static int
+pfm_write_ibrs(struct task_struct *task, pfm_context_t *ctx, void *arg, int count, 
+	 struct pt_regs *regs)
+{	
+	/* we don't quite support this right now */
+	if (task != current) return -EINVAL;
+
+	if (!CTX_IS_ENABLED(ctx)) return -EINVAL;
+
+	return pfm_write_ibr_dbr(0, task, arg, count, regs);
+}
+
+static int
+pfm_write_dbrs(struct task_struct *task, pfm_context_t *ctx, void *arg, int count, 
+	 struct pt_regs *regs)
+{	
+	/* we don't quite support this right now */
+	if (task != current) return -EINVAL;
+
+	if (!CTX_IS_ENABLED(ctx)) return -EINVAL;
+
+	return pfm_write_ibr_dbr(1, task, arg, count, regs);
+}
+
+#endif /* PFM_PMU_USES_DBR */
+
+static int
+pfm_get_features(struct task_struct *task, pfm_context_t *ctx, void *arg, int count, struct pt_regs *regs)
+{
+	pfarg_features_t tmp;
+
+	memset(&tmp, 0, sizeof(tmp));
+
+	tmp.ft_version      = PFM_VERSION;
+	tmp.ft_smpl_version = PFM_SMPL_VERSION;
+
+	if (copy_to_user(arg, &tmp, sizeof(tmp))) return -EFAULT;
+
+	return 0;
+}
+
+static int
+pfm_start(struct task_struct *task, pfm_context_t *ctx, void *arg, int count, 
+	  struct pt_regs *regs)
+{
+	/* we don't quite support this right now */
+	if (task != current) return -EINVAL;
+
+	/* 
+	 * Cannot do anything before PMU is enabled 
+	 */
+	if (!CTX_IS_ENABLED(ctx)) return -EINVAL;
+
+	DBprintk(("[%d] fl_system=%d owner=%p current=%p\n",
+				current->pid,
+				ctx->ctx_fl_system, PMU_OWNER(),
+				current));
+
+	if (PMU_OWNER() != task) {
+		printk("perfmon: pfm_start task [%d] not pmu owner\n", task->pid);
+		return -EINVAL;
+	}
+
+	if (ctx->ctx_fl_system) {
+		
+		/* enable dcr pp */
+		ia64_set_dcr(ia64_get_dcr()|IA64_DCR_PP);
+
+#ifdef CONFIG_SMP
+		local_cpu_data->pfm_dcr_pp  = 1;
+#else
+		pfm_tasklist_toggle_pp(1);
+#endif
+		ia64_psr(regs)->pp = 1;
+
+		__asm__ __volatile__ ("ssm psr.pp;;"::: "memory");
+
+	} else {
+		if ((task->thread.flags & IA64_THREAD_PM_VALID) == 0) {
+			printk("perfmon: pfm_start task flag not set for [%d]\n", task->pid);
 			return -EINVAL;
+		}
+		ia64_psr(regs)->up = 1;
+		__asm__ __volatile__ ("sum psr.up;;"::: "memory");
+	}
+	ia64_srlz_d();
+
+	return 0;
+}
+
+static int
+pfm_enable(struct task_struct *task, pfm_context_t *ctx, void *arg, int count, 
+	   struct pt_regs *regs)
+{
+	/* we don't quite support this right now */
+	if (task != current) return -EINVAL;
+
+	if (ctx->ctx_fl_system == 0 && PMU_OWNER()  && PMU_OWNER() != current) 
+		pfm_lazy_save_regs(PMU_OWNER());
+
+	/* reset all registers to stable quiet state */
+	ia64_reset_pmu(task);
+
+	/* make sure nothing starts */
+	if (ctx->ctx_fl_system) {
+		ia64_psr(regs)->pp = 0;
+		ia64_psr(regs)->up = 0; /* just to make sure! */
+
+		__asm__ __volatile__ ("rsm psr.pp;;"::: "memory");
+
+#ifdef CONFIG_SMP
+		local_cpu_data->pfm_syst_wide = 1;
+		local_cpu_data->pfm_dcr_pp    = 0;
+#endif
+	} else {
+		/*
+		 * needed in case the task was a passive task during
+		 * a system wide session and now wants to have its own
+		 * session
+		 */
+		ia64_psr(regs)->pp = 0; /* just to make sure! */
+		ia64_psr(regs)->up = 0;
+
+		__asm__ __volatile__ ("rum psr.up;;"::: "memory");
+		/*
+		 * allow user control (user monitors only)
+		if (task  == ctx->ctx_owner) {
+		 */
+		{
+			DBprintk(("clearing psr.sp for [%d]\n", current->pid));
+			ia64_psr(regs)->sp = 0;
+		}
+		task->thread.flags |= IA64_THREAD_PM_VALID;
 	}
+
+	SET_PMU_OWNER(task);
+
+
+	ctx->ctx_flags.state = PFM_CTX_ENABLED;
+	atomic_set(&ctx->ctx_last_cpu, smp_processor_id());
+
+	/* simply unfreeze */
+	ia64_set_pmc(0, 0);
+	ia64_srlz_d();
+
 	return 0;
 }
 
 /*
- * XXX: do something better here
+ * functions MUST be listed in the increasing order of their index (see permfon.h)
  */
+static pfm_cmd_desc_t pfm_cmd_tab[]={
+/* 0  */{ NULL, 0, 0, 0}, /* not used */
+/* 1  */{ pfm_write_pmcs, PFM_CMD_PID|PFM_CMD_CTX|PFM_CMD_ARG_READ|PFM_CMD_ARG_WRITE, PFM_CMD_ARG_MANY, sizeof(pfarg_reg_t)}, 
+/* 2  */{ pfm_write_pmds, PFM_CMD_PID|PFM_CMD_CTX|PFM_CMD_ARG_READ, PFM_CMD_ARG_MANY, sizeof(pfarg_reg_t)},
+/* 3  */{ pfm_read_pmds, PFM_CMD_PID|PFM_CMD_CTX|PFM_CMD_ARG_READ|PFM_CMD_ARG_WRITE, PFM_CMD_ARG_MANY, sizeof(pfarg_reg_t)},
+/* 4  */{ pfm_stop, PFM_CMD_PID|PFM_CMD_CTX, 0, 0},
+/* 5  */{ pfm_start, PFM_CMD_PID|PFM_CMD_CTX, 0, 0},
+/* 6  */{ pfm_enable, PFM_CMD_PID|PFM_CMD_CTX, 0, 0},
+/* 7  */{ pfm_disable, PFM_CMD_PID|PFM_CMD_CTX, 0, 0},
+/* 8  */{ pfm_create_context, PFM_CMD_ARG_READ, 1, sizeof(pfarg_context_t)},
+/* 9  */{ pfm_destroy_context, PFM_CMD_PID|PFM_CMD_CTX, 0, 0},
+/* 10 */{ pfm_restart, PFM_CMD_PID|PFM_CMD_CTX|PFM_CMD_NOCHK, 0, 0},
+/* 11 */{ pfm_protect_context, PFM_CMD_PID|PFM_CMD_CTX, 0, 0},
+/* 12 */{ pfm_get_features, PFM_CMD_ARG_WRITE, 0, 0},
+/* 13 */{ pfm_debug, 0, 1, sizeof(unsigned int)},
+/* 14 */{ pfm_unprotect_context, PFM_CMD_PID|PFM_CMD_CTX, 0, 0},
+/* 15 */{ NULL, 0, 0, 0}, /* not used */
+/* 16 */{ NULL, 0, 0, 0}, /* not used */
+/* 17 */{ NULL, 0, 0, 0}, /* not used */
+/* 18 */{ NULL, 0, 0, 0}, /* not used */
+/* 19 */{ NULL, 0, 0, 0}, /* not used */
+/* 20 */{ NULL, 0, 0, 0}, /* not used */
+/* 21 */{ NULL, 0, 0, 0}, /* not used */
+/* 22 */{ NULL, 0, 0, 0}, /* not used */
+/* 23 */{ NULL, 0, 0, 0}, /* not used */
+/* 24 */{ NULL, 0, 0, 0}, /* not used */
+/* 25 */{ NULL, 0, 0, 0}, /* not used */
+/* 26 */{ NULL, 0, 0, 0}, /* not used */
+/* 27 */{ NULL, 0, 0, 0}, /* not used */
+/* 28 */{ NULL, 0, 0, 0}, /* not used */
+/* 29 */{ NULL, 0, 0, 0}, /* not used */
+/* 30 */{ NULL, 0, 0, 0}, /* not used */
+/* 31 */{ NULL, 0, 0, 0}, /* not used */
+#ifdef PFM_PMU_USES_DBR
+/* 32 */{ pfm_write_ibrs, PFM_CMD_PID|PFM_CMD_CTX|PFM_CMD_ARG_READ|PFM_CMD_ARG_WRITE, PFM_CMD_ARG_MANY, sizeof(pfarg_dbreg_t)},
+/* 33 */{ pfm_write_dbrs, PFM_CMD_PID|PFM_CMD_CTX|PFM_CMD_ARG_READ|PFM_CMD_ARG_WRITE, PFM_CMD_ARG_MANY, sizeof(pfarg_dbreg_t)}
+#endif
+};
+#define PFM_CMD_COUNT	(sizeof(pfm_cmd_tab)/sizeof(pfm_cmd_desc_t))
+
 static int
-perfmon_bad_permissions(struct task_struct *task)
+check_task_state(struct task_struct *task)
 {
-	/* stolen from bad_signal() */
-	return (current->session != task->session)
-	    && (current->euid ^ task->suid) && (current->euid ^ task->uid)
-	    && (current->uid ^ task->suid) && (current->uid ^ task->uid);
+	int ret = 0;
+#ifdef CONFIG_SMP
+	/* We must wait until the state has been completely
+	 * saved. There can be situations where the reader arrives before
+	 * after the task is marked as STOPPED but before pfm_save_regs()
+	 * is completed.
+	 */
+	for (;;) {
+
+		task_lock(task);
+		if (!task_has_cpu(task)) break;
+		task_unlock(task);
+
+		do {
+			if (task->state != TASK_ZOMBIE && task->state != TASK_STOPPED) return -EBUSY;
+			barrier();
+			cpu_relax();
+		} while (task_has_cpu(task));
+	}
+	task_unlock(task);
+#else
+	if (task->state != TASK_ZOMBIE && task->state != TASK_STOPPED) {
+		DBprintk(("warning [%d] not in stable state %ld\n", task->pid, task->state));
+		ret = -EBUSY;
+	}
+#endif
+	return ret;
 }
 
 asmlinkage int
-sys_perfmonctl (int pid, int cmd, int flags, perfmon_req_t *req, int count, long arg6, long arg7, long arg8, long stack)
+sys_perfmonctl (pid_t pid, int cmd, void *arg, int count, long arg5, long arg6, long arg7, 
+		long arg8, long stack)
 {
-	struct pt_regs *regs = (struct pt_regs *) &stack;
-	struct task_struct *child = current;
-	int ret = -ESRCH;
+	struct pt_regs *regs = (struct pt_regs *)&stack;
+	struct task_struct *task = current;
+	pfm_context_t *ctx = task->thread.pfm_context;
+	size_t sz;
+	int ret = -ESRCH, narg;
 
-	/* sanity check:
-	 *
-	 * ensures that we don't do bad things in case the OS
-	 * does not have enough storage to save/restore PMC/PMD
+	/* 
+	 * reject any call if perfmon was disabled at initialization time
 	 */
-	if (PERFMON_IS_DISABLED()) return -ENOSYS;
+	if (PFM_IS_DISABLED()) return -ENOSYS;
 
-	/* XXX: pid interface is going away in favor of pfm context */
-	if (pid != current->pid) {
-		read_lock(&tasklist_lock);
+	DBprintk(("cmd=%d idx=%d valid=%d narg=0x%x\n", cmd, PFM_CMD_IDX(cmd), 
+		  PFM_CMD_IS_VALID(cmd), PFM_CMD_NARG(cmd)));
 
-		child = find_task_by_pid(pid);
+	if (PFM_CMD_IS_VALID(cmd) == 0) return -EINVAL;
 
-		if (!child) goto abort_call;
+	/* ingore arguments when command has none */
+	narg = PFM_CMD_NARG(cmd);
+	if ((narg == PFM_CMD_ARG_MANY  && count == 0) || (narg > 0 && narg != count)) return -EINVAL;
 
-		ret = -EPERM;
+	sz = PFM_CMD_ARG_SIZE(cmd);
 
-		if (perfmon_bad_permissions(child)) goto abort_call;
+	if (PFM_CMD_READ_ARG(cmd) && !access_ok(VERIFY_READ, arg, sz*count)) return -EFAULT;
 
-		/*
-		 * XXX: need to do more checking here
+	if (PFM_CMD_WRITE_ARG(cmd) && !access_ok(VERIFY_WRITE, arg, sz*count)) return -EFAULT;
+
+	if (PFM_CMD_USE_PID(cmd))  {
+		/* 
+		 * XXX: may need to fine tune this one
 		 */
-		if (child->state != TASK_ZOMBIE && child->state != TASK_STOPPED) {
-			DBprintk((" warning process %d not in stable state %ld\n", pid, child->state));
+		if (pid < 2) return -EPERM;
+
+		if (pid != current->pid) {
+
+			read_lock(&tasklist_lock);
+
+			task = find_task_by_pid(pid);
+
+			if (!task) goto abort_call;
+
+			ret = -EPERM;
+
+			if (pfm_bad_permissions(task)) goto abort_call;
+
+			if (PFM_CMD_CHK(cmd)) {
+				ret = check_task_state(task);
+				if (ret != 0) goto abort_call;
+			}
+			ctx = task->thread.pfm_context;
 		}
+	} 
+
+	if (PFM_CMD_USE_CTX(cmd)) {
+		ret = -EINVAL;
+	       if (ctx == NULL) {
+			DBprintk(("no context for task %d\n", task->pid));
+			goto abort_call;
+	       }
+	       ret = -EPERM;
+	       /*
+		* we only grant access to the context if:
+		* 	- the caller is the creator of the context (ctx_owner)
+		*  OR   - the context is attached to the caller AND The context IS NOT 
+		*  	  in protected mode
+		*/
+	       if (ctx->ctx_owner != current && (ctx->ctx_fl_protected || task != current)) {
+				DBprintk(("context protected, no access for [%d]\n", task->pid));
+				goto abort_call;
+	       }
 	}
-	ret = do_perfmonctl(child, cmd, flags, req, count, regs);
+
+	ret = (*pfm_cmd_tab[PFM_CMD_IDX(cmd)].cmd_func)(task, ctx, arg, count, regs);
 
 abort_call:
-	if (child != current) read_unlock(&tasklist_lock);
+	if (task != current) read_unlock(&tasklist_lock);
 
 	return ret;
 }
 
 #if __GNUC__ >= 3
 void asmlinkage
-pfm_block_on_overflow(void)
+pfm_ovfl_block_reset(u64 arg0, u64 arg1, u64 arg2, u64 arg3, u64 arg4, u64 arg5, 
+		      u64 arg6, u64 arg7, long info)
 #else
 void asmlinkage
-pfm_block_on_overflow(u64 arg0, u64 arg1, u64 arg2, u64 arg3, u64 arg4, u64 arg5, u64 arg6, u64 arg7)
+pfm_ovfl_block_reset(u64 arg0, u64 arg1, u64 arg2, u64 arg3, u64 arg4, u64 arg5, 
+		      u64 arg6, u64 arg7, long info)
 #endif
 {
 	struct thread_struct *th = &current->thread;
@@ -1323,32 +2314,22 @@
 	int ret;
 
 	/*
-	 * NO matter what notify_pid is,
-	 * we clear overflow, won't notify again
+	 * clear the flag, to make sure we won't get here
+	 * again
 	 */
-	th->pfm_must_block = 0;
+	th->pfm_ovfl_block_reset = 0;
 
 	/*
 	 * do some sanity checks first
 	 */
 	if (!ctx) {
-		printk("perfmon: process %d has no PFM context\n", current->pid);
-		return;
-	}
-	if (ctx->ctx_notify_task == 0) {
-		printk("perfmon: process %d has no task to notify\n", current->pid);
+		printk("perfmon: [%d] has no PFM context\n", current->pid);
 		return;
 	}
 
-	DBprintk((" current=%d task=%d\n", current->pid, ctx->ctx_notify_task->pid));
-
-	/* should not happen */
-	if (CTX_OVFL_NOBLOCK(ctx)) {
-		printk("perfmon: process %d non-blocking ctx should not be here\n", current->pid);
-		return;
-	}
+	if (CTX_OVFL_NOBLOCK(ctx)) goto non_blocking;
 
-	DBprintk((" CPU%d %d before sleep\n", smp_processor_id(), current->pid));
+	DBprintk(("[%d] before sleeping\n", current->pid));
 
 	/*
 	 * may go through without blocking on SMP systems
@@ -1356,12 +2337,14 @@
 	 */
 	ret = down_interruptible(&ctx->ctx_restart_sem);
 
-	DBprintk((" CPU%d %d after sleep ret=%d\n", smp_processor_id(), current->pid, ret));
+	DBprintk(("[%d] after sleeping ret=%d\n", current->pid, ret));
 
 	/*
 	 * in case of interruption of down() we don't restart anything
 	 */
 	if (ret >= 0) {
+
+non_blocking:
 		/* we reactivate on context switch */
 		ctx->ctx_fl_frozen = 0;
 		/*
@@ -1369,19 +2352,19 @@
 		 * use the local reference
 		 */
 
-		pfm_reset_regs(ctx);
+		pfm_reset_regs(ctx, ctx->ctx_ovfl_regs, PFM_RELOAD_LONG_RESET);
+
+		ctx->ctx_ovfl_regs[0] = 0UL;
 
 		/*
 		 * Unlock sampling buffer and reset index atomically
 		 * XXX: not really needed when blocking
 		 */
 		if (CTX_HAS_SMPL(ctx)) {
-			ctx->ctx_smpl_buf->psb_hdr->hdr_count = 0;
-			ctx->ctx_smpl_buf->psb_index = 0;
+			ctx->ctx_psb->psb_hdr->hdr_count = 0;
+			ctx->ctx_psb->psb_index = 0;
 		}
 
-		DBprintk((" CPU%d %d unfreeze PMU\n", smp_processor_id(), current->pid));
-
 		ia64_set_pmc(0, 0);
 		ia64_srlz_d();
 
@@ -1390,23 +2373,111 @@
 }
 
 /*
+ * This function will record an entry in the sampling if it is not full already.
+ * Return:
+ * 	0 : buffer is not full (did not BECOME full: still space or was already full)
+ * 	1 : buffer is full (recorded the last entry)
+ */
+static int
+pfm_record_sample(struct task_struct *task, pfm_context_t *ctx, unsigned long ovfl_mask, struct pt_regs *regs)
+{
+	pfm_smpl_buffer_desc_t *psb = ctx->ctx_psb;
+	unsigned long *e, m, idx;
+	perfmon_smpl_entry_t *h;
+	int j;
+
+
+pfm_recorded_samples_count++;
+	idx = ia64_fetch_and_add(1, &psb->psb_index);
+	DBprintk(("recording index=%ld entries=%ld\n", idx-1, psb->psb_entries));
+
+	/*
+	* XXX: there is a small chance that we could run out on index before resetting
+	* but index is unsigned long, so it will take some time.....
+	* We use > instead of == because fetch_and_add() is off by one (see below)
+	*
+	* This case can happen in non-blocking mode or with multiple processes.
+	* For non-blocking, we need to reload and continue.
+	 */
+	if (idx > psb->psb_entries) return 0;
+
+	/* first entry is really entry 0, not 1 caused by fetch_and_add */
+	idx--;
+
+	h = (perfmon_smpl_entry_t *)(((char *)psb->psb_addr) + idx*(psb->psb_entry_size));
+
+	/*
+	 * initialize entry header
+	 */
+	h->pid  = task->pid;
+	h->cpu  = smp_processor_id();
+	h->rate = 0; /* XXX: add the sampling rate used here */
+	h->ip   = regs ? regs->cr_iip : 0x0;	/* where did the fault happened */
+	h->regs = ovfl_mask; 			/* which registers overflowed */
+
+	/* guaranteed to monotonically increase on each cpu */
+	h->stamp  = pfm_get_stamp();
+	h->period = 0UL; /* not yet used */
+
+	/* position for first pmd */
+	e = (unsigned long *)(h+1);
+
+	/*
+	 * selectively store PMDs in increasing index number
+	 */
+	m = ctx->ctx_smpl_regs[0];
+	for (j=0; m; m >>=1, j++) {
+
+		if ((m & 0x1) == 0) continue;
+
+		if (PMD_IS_COUNTING(j)) {
+			*e  =  pfm_read_soft_counter(ctx, j);
+			/* check if this pmd overflowed as well */
+			*e +=  ovfl_mask & (1UL<<j) ? 1 + pmu_conf.perf_ovfl_val : 0;
+		} else {
+			*e = ia64_get_pmd(j); /* slow */
+		}
+		DBprintk(("e=%p pmd%d =0x%lx\n", (void *)e, j, *e));
+		e++;
+	}
+	/*
+	 * make the new entry visible to user, needs to be atomic
+	 */
+	ia64_fetch_and_add(1, &psb->psb_hdr->hdr_count);
+
+	DBprintk(("index=%ld entries=%ld hdr_count=%ld\n", 
+				idx, psb->psb_entries, psb->psb_hdr->hdr_count));
+	/* 
+	 * sampling buffer full ? 
+	 */
+	if (idx == (psb->psb_entries-1)) {
+		DBprintk(("sampling buffer full\n"));
+		/*
+		 * XXX: must reset buffer in blocking mode and lost notified
+		 */
+		return 1;
+	}
+	return 0;
+}
+
+/*
  * main overflow processing routine.
  * it can be called from the interrupt path or explicitely during the context switch code
  * Return:
  *	new value of pmc[0]. if 0x0 then unfreeze, else keep frozen
  */
-unsigned long
-update_counters (struct task_struct *task, u64 pmc0, struct pt_regs *regs)
+static unsigned long
+pfm_overflow_handler(struct task_struct *task, u64 pmc0, struct pt_regs *regs)
 {
-	unsigned long mask, i, cnum;
-	struct thread_struct *th;
+	unsigned long mask;
+	struct thread_struct *t;
 	pfm_context_t *ctx;
-	unsigned long bv = 0;
+	unsigned long old_val;
+	unsigned long ovfl_notify = 0UL, ovfl_pmds = 0UL;
+	int i;
 	int my_cpu = smp_processor_id();
-	int ret = 1, buffer_is_full = 0;
-	int ovfl_has_long_recovery, can_notify, need_reset_pmd16=0;
+	int ret = 1;
 	struct siginfo si;
-
 	/*
 	 * It is never safe to access the task for which the overflow interrupt is destinated
 	 * using the current variable as the interrupt may occur in the middle of a context switch
@@ -1421,233 +2492,151 @@
 	 */
 
 	if (task == NULL) {
-		DBprintk((" owners[%d]=NULL\n", my_cpu));
+		DBprintk(("owners[%d]=NULL\n", my_cpu));
 		return 0x1;
 	}
-	th  = &task->thread;
-	ctx = th->pfm_context;
+	t   = &task->thread;
+	ctx = task->thread.pfm_context;
+
+	if (!ctx) {
+		printk("perfmon: Spurious overflow interrupt: process %d has no PFM context\n", 
+			task->pid);
+		return 0;
+	}
 
 	/*
 	 * XXX: debug test
 	 * Don't think this could happen given upfront tests
 	 */
-	if ((th->flags & IA64_THREAD_PM_VALID) == 0 && ctx->ctx_fl_system == 0) {
-		printk("perfmon: Spurious overflow interrupt: process %d not using perfmon\n", task->pid);
+	if ((t->flags & IA64_THREAD_PM_VALID) == 0 && ctx->ctx_fl_system == 0) {
+		printk("perfmon: Spurious overflow interrupt: process %d not using perfmon\n", 
+			task->pid);
 		return 0x1;
 	}
-	if (!ctx) {
-		printk("perfmon: Spurious overflow interrupt: process %d has no PFM context\n", task->pid);
-		return 0;
-	}
-
 	/*
 	 * sanity test. Should never happen
 	 */
-	if ((pmc0 & 0x1 )== 0) {
-		printk("perfmon: pid %d pmc0=0x%lx assumption error for freeze bit\n", task->pid, pmc0);
+	if ((pmc0 & 0x1) == 0) {
+		printk("perfmon: pid %d pmc0=0x%lx assumption error for freeze bit\n", 
+			task->pid, pmc0);
 		return 0x0;
 	}
 
 	mask = pmc0 >> PMU_FIRST_COUNTER;
 
-	DBprintk(("pmc0=0x%lx pid=%d owner=%d iip=0x%lx, ctx is in %s mode used_pmds=0x%lx used_pmcs=0x%lx\n", 
-				pmc0, task->pid, PMU_OWNER()->pid, regs->cr_iip, 
-				CTX_OVFL_NOBLOCK(ctx) ? "NO-BLOCK" : "BLOCK",
-				ctx->ctx_used_pmds[0],
-				ctx->ctx_used_pmcs[0]));
+	DBprintk(("pmc0=0x%lx pid=%d iip=0x%lx, %s"
+		  " mode used_pmds=0x%lx save_pmcs=0x%lx reload_pmcs=0x%lx\n", 
+			pmc0, task->pid, (regs ? regs->cr_iip : 0), 
+			CTX_OVFL_NOBLOCK(ctx) ? "nonblocking" : "blocking",
+			ctx->ctx_used_pmds[0],
+			ctx->ctx_saved_pmcs[0],
+			ctx->ctx_reload_pmcs[0]));
 
 	/*
-	 * XXX: need to record sample only when an EAR/BTB has overflowed
+	 * First we update the virtual counters
 	 */
-	if (CTX_HAS_SMPL(ctx)) {
-		pfm_smpl_buffer_desc_t *psb = ctx->ctx_smpl_buf;
-		unsigned long *e, m, idx=0;
-		perfmon_smpl_entry_t *h;
-		int j;
-
-		idx = ia64_fetch_and_add(1, &psb->psb_index);
-		DBprintk((" recording index=%ld entries=%ld\n", idx, psb->psb_entries));
+	for (i = PMU_FIRST_COUNTER; mask ; i++, mask >>= 1) {
+
+		/* skip pmd which did not overflow */
+		if ((mask & 0x1) == 0) continue;
+
+		DBprintk(("PMD[%d] overflowed hw_pmd=0x%lx soft_pmd=0x%lx\n", 
+			  i, ia64_get_pmd(i), ctx->ctx_soft_pmds[i].val));
 
 		/*
-		 * XXX: there is a small chance that we could run out on index before resetting
-		 * but index is unsigned long, so it will take some time.....
-		 * We use > instead of == because fetch_and_add() is off by one (see below)
-		 *
-		 * This case can happen in non-blocking mode or with multiple processes.
-		 * For non-blocking, we need to reload and continue.
+		 * Because we sometimes (EARS/BTB) reset to a specific value, we cannot simply use
+		 * val to count the number of times we overflowed. Otherwise we would loose the 
+		 * current value in the PMD (which can be >0). So to make sure we don't loose
+		 * the residual counts we set val to contain full 64bits value of the counter.
 		 */
-		if (idx > psb->psb_entries) {
-			buffer_is_full = 1;
-			goto reload_pmds;
-		}
-
-		/* first entry is really entry 0, not 1 caused by fetch_and_add */
-		idx--;
+		old_val = ctx->ctx_soft_pmds[i].val;
+		ctx->ctx_soft_pmds[i].val = 1 + pmu_conf.perf_ovfl_val + pfm_read_soft_counter(ctx, i);
 
-		h = (perfmon_smpl_entry_t *)(((char *)psb->psb_addr) + idx*(psb->psb_entry_size));
 
-		h->pid  = task->pid;
-		h->cpu  = my_cpu;
-		h->rate = 0;
-		h->ip   = regs ? regs->cr_iip : 0x0; /* where did the fault happened */
-		h->regs = mask; /* which registers overflowed */
+		DBprintk(("soft_pmd[%d].val=0x%lx old_val=0x%lx pmd=0x%lx\n", 
+			  i, ctx->ctx_soft_pmds[i].val, old_val, 
+			  ia64_get_pmd(i) & pmu_conf.perf_ovfl_val));
 
-		/* guaranteed to monotonically increase on each cpu */
-		h->stamp = perfmon_get_stamp();
-
-		e = (unsigned long *)(h+1);
-
-		/*
-		 * selectively store PMDs in increasing index number
-		 */
-		for (j=0, m = ctx->ctx_smpl_regs; m; m >>=1, j++) {
-			if (m & 0x1) {
-				if (PMD_IS_COUNTER(j))
-					*e =  ctx->ctx_pmds[j-PMU_FIRST_COUNTER].val
-					    + (ia64_get_pmd(j) & pmu_conf.perf_ovfl_val);
-				else {
-					*e = ia64_get_pmd(j); /* slow */
-				}
-				DBprintk((" e=%p pmd%d =0x%lx\n", (void *)e, j, *e));
-				e++;
-			}
-		}
 		/*
-		 * make the new entry visible to user, needs to be atomic
+		 * now that we have extracted the hardware counter, we can clear it to ensure
+		 * that a subsequent PFM_READ_PMDS will not include it again.
 		 */
-		ia64_fetch_and_add(1, &psb->psb_hdr->hdr_count);
+		ia64_set_pmd(i, 0UL);
 
-		DBprintk((" index=%ld entries=%ld hdr_count=%ld\n", idx, psb->psb_entries, psb->psb_hdr->hdr_count));
-		/* 
-		 * sampling buffer full ? 
+		/*
+		 * check for overflow condition
 		 */
-		if (idx == (psb->psb_entries-1)) {
-			/*
-			 * will cause notification, cannot be 0
-			 */
-			bv = mask << PMU_FIRST_COUNTER;
+		if (old_val > ctx->ctx_soft_pmds[i].val) {
 
-			buffer_is_full = 1;
+			ovfl_pmds |= 1UL << i;
 
-			DBprintk((" sampling buffer full must notify bv=0x%lx\n", bv));
+			DBprintk(("soft_pmd[%d] overflowed flags=0x%x, ovfl=0x%lx\n", i, ctx->ctx_soft_pmds[i].flags, ovfl_pmds));
 
-			/*
-			 * we do not reload here, when context is blocking
-			 */
-			if (!CTX_OVFL_NOBLOCK(ctx)) goto no_reload;
-
-			/*
-			 * here, we have a full buffer but we are in non-blocking mode
-			 * so we need to reload overflowed PMDs with sampling reset values
-			 * and restart right away.
-			 */
+			if (PMC_OVFL_NOTIFY(ctx, i)) {
+				ovfl_notify |= 1UL << i;
+			}
 		}
-		/* FALL THROUGH */
 	}
-reload_pmds:
-
-	/*
-	 * in the case of a non-blocking context, we reload
-	 * with the ovfl_rval when no user notification is taking place (short recovery)
-	 * otherwise when the buffer is full which requires user interaction) then we use
-	 * smpl_rval which is the long_recovery path (disturbance introduce by user execution).
-	 *
-	 * XXX: implies that when buffer is full then there is always notification.
-	 */
-	ovfl_has_long_recovery = CTX_OVFL_NOBLOCK(ctx) && buffer_is_full;
 
 	/*
-	 * XXX: CTX_HAS_SMPL() should really be something like CTX_HAS_SMPL() and is activated,i.e.,
-	 * one of the PMC is configured for EAR/BTB.
+	 * check for sampling buffer
 	 *
-	 * When sampling, we can only notify when the sampling buffer is full.
+	 * if present, record sample. We propagate notification ONLY when buffer
+	 * becomes full.
 	 */
-	can_notify   = CTX_HAS_SMPL(ctx) == 0 && ctx->ctx_notify_task;
-
-	DBprintk((" ovfl_has_long_recovery=%d can_notify=%d\n", ovfl_has_long_recovery, can_notify));
-
-	for (i = 0, cnum = PMU_FIRST_COUNTER; mask ; cnum++, i++, mask >>= 1) {
-
-		if ((mask & 0x1) == 0) continue;
-
-		DBprintk((" PMD[%ld] overflowed pmd=0x%lx pmod.val=0x%lx\n", cnum, ia64_get_pmd(cnum), ctx->ctx_pmds[i].val));
-
-		/*
-		 * Because we sometimes (EARS/BTB) reset to a specific value, we cannot simply use
-		 * val to count the number of times we overflowed. Otherwise we would loose the current value
-		 * in the PMD (which can be >0). So to make sure we don't loose
-		 * the residual counts we set val to contain full 64bits value of the counter.
-		 *
-		 * XXX: is this needed for EARS/BTB ?
-		 */
-		ctx->ctx_pmds[i].val += 1 + pmu_conf.perf_ovfl_val
-				      + (ia64_get_pmd(cnum) & pmu_conf.perf_ovfl_val); /* slow */
-
-		DBprintk((" pmod[%ld].val=0x%lx pmd=0x%lx\n", i, ctx->ctx_pmds[i].val, ia64_get_pmd(cnum)&pmu_conf.perf_ovfl_val));
-
-		if (can_notify && PMD_OVFL_NOTIFY(ctx, i)) {
-			DBprintk((" CPU%d should notify task %p with signal %d\n", my_cpu, ctx->ctx_notify_task, ctx->ctx_notify_sig));
-			bv |= 1 << i;
-		} else {
-			DBprintk((" CPU%d PMD[%ld] overflow, no notification\n", my_cpu, cnum));
+	if(CTX_HAS_SMPL(ctx)) {
+		ret = pfm_record_sample(task, ctx, ovfl_pmds, regs);
+		if (ret == 1) {
 			/*
-			 * In case no notification is requested, we reload the reset value right away
-			 * otherwise we wait until the notify_pid process has been called and has
-			 * has finished processing data. Check out pfm_overflow_notify()
+			 * Sampling buffer became full
+			 * If no notication was requested, then we reset buffer index
+			 * and reset registers (done below) and resume.
+			 * If notification requested, then defer reset until pfm_restart()
 			 */
-
-			/* writes to upper part are ignored, so this is safe */
-			if (ovfl_has_long_recovery) {
-				DBprintk((" CPU%d PMD[%ld] reload with smpl_val=%lx\n", my_cpu, cnum,ctx->ctx_pmds[i].smpl_rval));
-				ia64_set_pmd(cnum, ctx->ctx_pmds[i].smpl_rval);
-			} else {
-				DBprintk((" CPU%d PMD[%ld] reload with ovfl_val=%lx\n", my_cpu, cnum,ctx->ctx_pmds[i].smpl_rval));
-				ia64_set_pmd(cnum, ctx->ctx_pmds[i].ovfl_rval);
+			if (ovfl_notify == 0UL) {
+				ctx->ctx_psb->psb_hdr->hdr_count = 0UL;
+				ctx->ctx_psb->psb_index		 = 0UL;
 			}
+		} else {
+			/*
+			 * sample recorded in buffer, no need to notify user
+			 */
+			ovfl_notify = 0UL;
 		}
-		if (cnum == ctx->ctx_btb_counter) need_reset_pmd16=1;
 	}
-	/*
-	 * In case of BTB overflow we need to reset the BTB index.
-	 */
-	if (need_reset_pmd16) {
-		DBprintk(("reset PMD16\n"));
-		ia64_set_pmd(16, 0);
-	}
-
-no_reload:
 
 	/*
-	 * some counters overflowed, but they did not require
-	 * user notification, so after having reloaded them above
-	 * we simply restart
+	 * No overflow requiring a user level notification
 	 */
-	if (!bv) return 0x0;
+	if (ovfl_notify == 0UL) {
+		pfm_reset_regs(ctx, &ovfl_pmds, PFM_RELOAD_SHORT_RESET);
+		return 0x0;
+	}
 
-	ctx->ctx_ovfl_regs  = bv; /* keep track of what to reset when unblocking */
-	/*
-	 * Now we know that:
-	 * 	- we have some counters which overflowed (contains in bv)
-	 * 	- someone has asked to be notified on overflow. 
+	/* 
+	 * keep track of what to reset when unblocking 
 	 */
+	ctx->ctx_ovfl_regs[0]  = ovfl_pmds; 
 
-	
 	/*
-	 * If the notification task is still present, then notify_task is non
-	 * null. It is clean by that task if it ever exits before we do. 
+	 * we have come to this point because there was an overflow and that notification
+	 * was requested. The notify_task may have disappeared, in which case notify_task
+	 * is NULL.
 	 */
-
 	if (ctx->ctx_notify_task) {
 
 		si.si_errno    = 0;
 		si.si_addr     = NULL;
 		si.si_pid      = task->pid; /* who is sending */
 
-		si.si_signo    = ctx->ctx_notify_sig; /* is SIGPROF */
-		si.si_code     = PROF_OVFL; /* goes to user */
-		si.si_pfm_ovfl = bv;
-
-
+		si.si_signo    = SIGPROF;
+		si.si_code     = PROF_OVFL; /* indicates a perfmon SIGPROF signal */
+		/*
+		 * Shift the bitvector such that the user sees bit 4 for PMD4 and so on.
+		 * We only use smpl_ovfl[0] for now. It should be fine for quite a while
+		 * until we have more than 61 PMD available.
+		 */
+		si.si_pfm_ovfl[0] = ovfl_notify;
 	
 		/*
 		 * when the target of the signal is not ourself, we have to be more
@@ -1659,15 +2648,29 @@
 		if (ctx->ctx_notify_task != current) {
 			/*
 			 * grab the notification lock for this task
+			 * This guarantees that the sequence: test + send_signal
+			 * is atomic with regards to the ctx_notify_task field.
+			 *
+			 * We need a spinlock and not just an atomic variable for this.
+			 *
 			 */
-			spin_lock(&ctx->ctx_notify_lock);
+			spin_lock(&ctx->ctx_lock);
 
 			/*
 			 * now notify_task cannot be modified until we're done
 			 * if NULL, they it got modified while we were in the handler
 			 */
 			if (ctx->ctx_notify_task == NULL) {
-				spin_unlock(&ctx->ctx_notify_lock);
+
+				spin_unlock(&ctx->ctx_lock);
+
+				/*
+				 * If we've lost the notified task, then we will run
+				 * to completion wbut keep the PMU frozen. Results
+				 * will be incorrect anyway. We do not kill task
+				 * to leave it possible to attach perfmon context
+				 * to already running task.
+				 */
 				goto lost_notify;
 			}
 			/*
@@ -1681,20 +2684,23 @@
 	 	 * necessarily go to the signal handler (if any) when it goes back to
 	 	 * user mode.
 	 	 */
-		DBprintk((" %d sending %d notification to %d\n", task->pid, si.si_signo, ctx->ctx_notify_task->pid));
+		DBprintk(("[%d] sending notification to [%d]\n", 
+			  task->pid, ctx->ctx_notify_task->pid));
 
 
 		/* 
 		 * this call is safe in an interrupt handler, so does read_lock() on tasklist_lock
 		 */
-		ret = send_sig_info(ctx->ctx_notify_sig, &si, ctx->ctx_notify_task);
-		if (ret != 0) printk(" send_sig_info(process %d, SIGPROF)=%d\n",  ctx->ctx_notify_task->pid, ret);
+		ret = send_sig_info(SIGPROF, &si, ctx->ctx_notify_task);
+		if (ret != 0) 
+			printk("send_sig_info(process %d, SIGPROF)=%d\n",  
+			       ctx->ctx_notify_task->pid, ret);
 		/*
 		 * now undo the protections in order
 		 */
 		if (ctx->ctx_notify_task != current) {
 			read_unlock(&tasklist_lock);
-			spin_unlock(&ctx->ctx_notify_lock);
+			spin_unlock(&ctx->ctx_lock);
 		}
 
 		/*
@@ -1711,35 +2717,41 @@
 		 * before, changing it to NULL will still maintain this invariant.
 		 * Of course, when it is equal to current it cannot change at this point.
 		 */
-		if (!CTX_OVFL_NOBLOCK(ctx) && ctx->ctx_notify_task != current) {
-				th->pfm_must_block = 1; /* will cause blocking */
+		DBprintk(("block=%d notify [%d] current [%d]\n", 
+			ctx->ctx_fl_block,
+			ctx->ctx_notify_task ? ctx->ctx_notify_task->pid: -1, 
+			current->pid ));
+
+		if (!CTX_OVFL_NOBLOCK(ctx) && ctx->ctx_notify_task != task) {
+			t->pfm_ovfl_block_reset = 1; /* will cause blocking */
 		}
 	} else {
-lost_notify:
-		DBprintk((" notification task has disappeared !\n"));
+lost_notify: /* XXX: more to do here, to convert to non-blocking (reset values) */
+
+		DBprintk(("notification task has disappeared !\n"));
 		/*
-		 * for a non-blocking context, we make sure we do not fall into the pfm_overflow_notify()
-		 * trap. Also in the case of a blocking context with lost notify process, then we do not
-		 * want to block either (even though it is interruptible). In this case, the PMU will be kept
-		 * frozen and the process will run to completion without monitoring enabled.
+		 * for a non-blocking context, we make sure we do not fall into the 
+		 * pfm_overflow_notify() trap. Also in the case of a blocking context with lost 
+		 * notify process, then we do not want to block either (even though it is 
+		 * interruptible). In this case, the PMU will be kept frozen and the process will 
+		 * run to completion without monitoring enabled.
 		 *
 		 * Of course, we cannot loose notify process when self-monitoring.
 		 */
-		th->pfm_must_block = 0; 
+		t->pfm_ovfl_block_reset = 0; 
 
 	}
 	/*
-	 * if we block, we keep the PMU frozen. If non-blocking we restart.
-	 * in the case of non-blocking were the notify process is lost, we also 
-	 * restart. 
+	 * If notification was successful, then we rely on the pfm_restart()
+	 * call to unfreeze and reset (in both blocking or non-blocking mode).
+	 *
+	 * If notification failed, then we will keep the PMU frozen and run
+	 * the task to completion
 	 */
-	if (!CTX_OVFL_NOBLOCK(ctx)) 
-		ctx->ctx_fl_frozen  = 1;
-	else
-		ctx->ctx_fl_frozen = 0;
+	ctx->ctx_fl_frozen = 1;
 
-	DBprintk((" reload pmc0=0x%x must_block=%ld\n",
-				ctx->ctx_fl_frozen ? 0x1 : 0x0, th->pfm_must_block));
+	DBprintk(("reload pmc0=0x%x must_block=%ld\n",
+				ctx->ctx_fl_frozen ? 0x1 : 0x0, t->pfm_ovfl_block_reset));
 
 	return ctx->ctx_fl_frozen ? 0x1 : 0x0;
 }
@@ -1748,29 +2760,40 @@
 perfmon_interrupt (int irq, void *arg, struct pt_regs *regs)
 {
 	u64 pmc0;
-	struct task_struct *ta;
+	struct task_struct *task;
 
-	pmc0 = ia64_get_pmc(0); /* slow */
+	pfm_ovfl_intr_count++;
+
+	/* 
+	 * srlz.d done before arriving here
+	 *
+	 * This is slow
+	 */
+	pmc0 = ia64_get_pmc(0); 
 
 	/*
 	 * if we have some pending bits set
 	 * assumes : if any PM[0].bit[63-1] is set, then PMC[0].fr = 1
 	 */
-	if ((pmc0 & ~0x1) && (ta=PMU_OWNER())) {
+	if ((pmc0 & ~0x1UL)!=0UL && (task=PMU_OWNER())!= NULL) {
 
-		/* assumes, PMC[0].fr = 1 at this point */
-		pmc0 = update_counters(ta, pmc0, regs);
-
-		/*
-		 * if pmu_frozen = 0
-		 *	pmc0 = 0 and we resume monitoring right away
-		 * else
-		 *	pmc0 = 0x1 frozen but all pending bits are cleared
+		/* 
+		 * assumes, PMC[0].fr = 1 at this point 
+		 *
+		 * XXX: change protype to pass &pmc0
 		 */
-		ia64_set_pmc(0, pmc0);
-		ia64_srlz_d();
+		pmc0 = pfm_overflow_handler(task, pmc0, regs);
+
+		/* we never explicitely freeze PMU here */
+		if (pmc0 == 0) {
+			ia64_set_pmc(0, 0);
+			ia64_srlz_d();
+		}
 	} else {
-		printk("perfmon: Spurious PMU overflow interrupt: pmc0=0x%lx owner=%p\n", pmc0, (void *)PMU_OWNER());
+		pfm_spurious_ovfl_intr_count++;
+
+		DBprintk(("perfmon: Spurious PMU overflow interrupt on CPU%d: pmc0=0x%lx owner=%p\n", 
+			smp_processor_id(), pmc0, (void *)PMU_OWNER()));
 	}
 }
 
@@ -1778,14 +2801,39 @@
 static int
 perfmon_proc_info(char *page)
 {
+#ifdef CONFIG_SMP
+#define cpu_is_online(i) (cpu_online_map & (1UL << i))
+#else
+#define cpu_is_online(i)        1
+#endif
 	char *p = page;
 	u64 pmc0 = ia64_get_pmc(0);
 	int i;
 
-	p += sprintf(p, "CPU%d.pmc[0]=%lx\nPerfmon debug: %s\n", smp_processor_id(), pmc0, pfm_debug ? "On" : "Off");
-	p += sprintf(p, "proc_sessions=%lu sys_sessions=%lu\n", 
-			pfs_info.pfs_proc_sessions, 
-			pfs_info.pfs_sys_session);
+	p += sprintf(p, "perfmon enabled: %s\n", pmu_conf.pfm_is_disabled ? "No": "Yes");
+
+	p += sprintf(p, "monitors_pmcs0]=0x%lx\n", pmu_conf.monitor_pmcs[0]);
+	p += sprintf(p, "counter_pmcds[0]=0x%lx\n", pmu_conf.counter_pmds[0]);
+	p += sprintf(p, "overflow interrupts=%lu\n", pfm_ovfl_intr_count);
+	p += sprintf(p, "spurious overflow interrupts=%lu\n", pfm_spurious_ovfl_intr_count);
+	p += sprintf(p, "recorded samples=%lu\n", pfm_recorded_samples_count);
+
+	p += sprintf(p, "CPU%d.pmc[0]=%lx\nPerfmon debug: %s\n", 
+			smp_processor_id(), pmc0, pfm_debug_mode ? "On" : "Off");
+
+#ifdef CONFIG_SMP
+	p += sprintf(p, "CPU%d cpu_data.pfm_syst_wide=%d cpu_data.dcr_pp=%d\n", 
+			smp_processor_id(), local_cpu_data->pfm_syst_wide, local_cpu_data->pfm_dcr_pp);
+#endif
+
+	LOCK_PFS();
+	p += sprintf(p, "proc_sessions=%lu\nsys_sessions=%lu\nsys_use_dbregs=%lu\nptrace_use_dbregs=%lu\n", 
+			pfm_sessions.pfs_task_sessions, 
+			pfm_sessions.pfs_sys_sessions,
+			pfm_sessions.pfs_sys_use_dbregs,
+			pfm_sessions.pfs_ptrace_use_dbregs);
+
+	UNLOCK_PFS();
 
 	for(i=0; i < NR_CPUS; i++) {
 		if (cpu_is_online(i)) {
@@ -1794,10 +2842,11 @@
 					pmu_owners[i].owner ? pmu_owners[i].owner->pid: -1);
 		}
 	}
+
 	return p - page;
 }
 
-/* for debug only */
+/* /proc interface, for debug only */
 static int
 perfmon_read_entry(char *page, char **start, off_t off, int count, int *eof, void *data)
 {
@@ -1814,153 +2863,90 @@
 	return len;
 }
 
-static struct irqaction perfmon_irqaction = {
-	handler:	perfmon_interrupt,
-	flags:		SA_INTERRUPT,
-	name:		"perfmon"
-};
-
-void __init
-perfmon_init (void)
+#ifdef CONFIG_SMP
+void
+pfm_syst_wide_update_task(struct task_struct *task, int mode)
 {
-	pal_perf_mon_info_u_t pm_info;
-	s64 status;
+	struct pt_regs *regs = (struct pt_regs *)((unsigned long) task + IA64_STK_OFFSET);
 
-	register_percpu_irq(IA64_PERFMON_VECTOR, &perfmon_irqaction);
+	regs--;
 
-	ia64_set_pmv(IA64_PERFMON_VECTOR);
-	ia64_srlz_d();
-
-	pmu_conf.pfm_is_disabled = 1;
+	/*
+	 * propagate the value of the dcr_pp bit to the psr
+	 */
+	ia64_psr(regs)->pp = mode ? local_cpu_data->pfm_dcr_pp : 0;
+}
+#endif
 
-	printk("perfmon: version %s (sampling format v%d)\n", PFM_VERSION, PFM_SMPL_HDR_VERSION);
-	printk("perfmon: Interrupt vectored to %u\n", IA64_PERFMON_VECTOR);
 
-	if ((status=ia64_pal_perf_mon_info(pmu_conf.impl_regs, &pm_info)) != 0) {
-		printk("perfmon: PAL call failed (%ld)\n", status);
-		return;
-	}
-	pmu_conf.perf_ovfl_val = (1L << pm_info.pal_perf_mon_info_s.width) - 1;
-	pmu_conf.max_counters  = pm_info.pal_perf_mon_info_s.generic;
-	pmu_conf.num_pmcs      = find_num_pm_regs(pmu_conf.impl_regs);
-	pmu_conf.num_pmds      = find_num_pm_regs(&pmu_conf.impl_regs[4]);
+void
+pfm_save_regs (struct task_struct *task)
+{
+	pfm_context_t *ctx;
+	u64 psr;
 
-	printk("perfmon: %d bits counters (max value 0x%lx)\n", pm_info.pal_perf_mon_info_s.width, pmu_conf.perf_ovfl_val);
-	printk("perfmon: %ld PMC/PMD pairs, %ld PMCs, %ld PMDs\n", pmu_conf.max_counters, pmu_conf.num_pmcs, pmu_conf.num_pmds);
+	ctx = task->thread.pfm_context;
 
-	/* sanity check */
-	if (pmu_conf.num_pmds >= IA64_NUM_PMD_REGS || pmu_conf.num_pmcs >= IA64_NUM_PMC_REGS) {
-		printk(KERN_ERR "perfmon: ERROR not enough PMC/PMD storage in kernel, perfmon is DISABLED\n");
-		return; /* no need to continue anyway */
-	}
-	/* we are all set */
-	pmu_conf.pfm_is_disabled = 0;
 
 	/*
-	 * Insert the tasklet in the list.
-	 * It is still disabled at this point, so it won't run
-	printk(__FUNCTION__" tasklet is %p state=%d, count=%d\n", &perfmon_tasklet, perfmon_tasklet.state, perfmon_tasklet.count);
+	 * save current PSR: needed because we modify it
 	 */
+	__asm__ __volatile__ ("mov %0=psr;;": "=r"(psr) :: "memory");
 
 	/*
-	 * for now here for debug purposes
+	 * stop monitoring:
+	 * This is the last instruction which can generate an overflow
+	 *
+	 * We do not need to set psr.sp because, it is irrelevant in kernel.
+	 * It will be restored from ipsr when going back to user level
 	 */
-	perfmon_dir = create_proc_read_entry ("perfmon", 0, 0, perfmon_read_entry, NULL);
-}
+	__asm__ __volatile__ ("rum psr.up;;"::: "memory");
+
+	ctx->ctx_saved_psr = psr;
+
+	//ctx->ctx_last_cpu  = smp_processor_id();
 
-void
-perfmon_init_percpu (void)
-{
-	ia64_set_pmv(IA64_PERFMON_VECTOR);
-	ia64_srlz_d();
 }
 
-void
-pfm_save_regs (struct task_struct *ta)
+static void
+pfm_lazy_save_regs (struct task_struct *task)
 {
-	struct task_struct *owner;
 	pfm_context_t *ctx;
 	struct thread_struct *t;
-	u64 pmc0, psr;
 	unsigned long mask;
 	int i;
 
-	t   = &ta->thread;
-	ctx = ta->thread.pfm_context;
+	DBprintk(("on [%d] by [%d]\n", task->pid, current->pid));
 
-	/*
-	 * We must make sure that we don't loose any potential overflow
-	 * interrupt while saving PMU context. In this code, external
-	 * interrupts are always enabled.
-	 */
+	t   = &task->thread;
+	ctx = task->thread.pfm_context;
 
-	/*
-	 * save current PSR: needed because we modify it
+#ifdef CONFIG_SMP
+	/* 
+	 * announce we are saving this PMU state
+	 * This will cause other CPU, to wait until we're done
+	 * before using the context.h
+	 *
+	 * must be an atomic operation
 	 */
-	__asm__ __volatile__ ("mov %0=psr;;": "=r"(psr) :: "memory");
+	atomic_set(&ctx->ctx_saving_in_progress, 1);
 
-	/*
-	 * stop monitoring:
-	 * This is the only way to stop monitoring without destroying overflow
-	 * information in PMC[0].
-	 * This is the last instruction which can cause overflow when monitoring
-	 * in kernel.
-	 * By now, we could still have an overflow interrupt in-flight.
-	 */
-	__asm__ __volatile__ ("rsm psr.up|psr.pp;;"::: "memory");
+	 /*
+	  * if owner is NULL, it means that the other CPU won the race
+	  * and the IPI has caused the context to be saved in pfm_handle_fectch_regs()
+	  * instead of here. We have nothing to do
+	  *
+	  * note that this is safe, because the other CPU NEVER modifies saving_in_progress.
+	  */
+	if (PMU_OWNER() == NULL) goto do_nothing;
+#endif
 
 	/*
-	 * Mark the PMU as not owned
-	 * This will cause the interrupt handler to do nothing in case an overflow
-	 * interrupt was in-flight
-	 * This also guarantees that pmc0 will contain the final state
-	 * It virtually gives us full control over overflow processing from that point
-	 * on.
-	 * It must be an atomic operation.
+	 * do not own the PMU
 	 */
-	owner = PMU_OWNER();
 	SET_PMU_OWNER(NULL);
 
-	/*
-	 * read current overflow status:
-	 *
-	 * we are guaranteed to read the final stable state
-	 */
 	ia64_srlz_d();
-	pmc0 = ia64_get_pmc(0); /* slow */
-
-	/*
-	 * freeze PMU:
-	 *
-	 * This destroys the overflow information. This is required to make sure
-	 * next process does not start with monitoring on if not requested
-	 */
-	ia64_set_pmc(0, 1);
-
-	/*
-	 * Check for overflow bits and proceed manually if needed
-	 *
-	 * It is safe to call the interrupt handler now because it does
-	 * not try to block the task right away. Instead it will set a
-	 * flag and let the task proceed. The blocking will only occur
-	 * next time the task exits from the kernel.
-	 */
-	if (pmc0 & ~0x1) {
-		update_counters(owner, pmc0, NULL);
-		/* we will save the updated version of pmc0 */
-	}
-	/*
-	 * restore PSR for context switch to save
-	 */
-	__asm__ __volatile__ ("mov psr.l=%0;; srlz.i;;"::"r"(psr): "memory");
-
-	/*
-	 * we do not save registers if we can do lazy
-	 */
-	if (PFM_CAN_DO_LAZY()) {
-		SET_PMU_OWNER(owner);
-		return;
-	}
 
 	/*
 	 * XXX needs further optimization.
@@ -1970,30 +2956,75 @@
 	for (i=0; mask; i++, mask>>=1) {
 		if (mask & 0x1) t->pmd[i] =ia64_get_pmd(i);
 	}
-
-	/* skip PMC[0], we handle it separately */
-	mask = ctx->ctx_used_pmcs[0]>>1;
-	for (i=1; mask; i++, mask>>=1) {
+	/*
+	 * XXX: simplify to pmc0 only
+	 */
+	mask = ctx->ctx_saved_pmcs[0];
+	for (i=0; mask; i++, mask>>=1) {
 		if (mask & 0x1) t->pmc[i] = ia64_get_pmc(i);
 	}
+
+	/* not owned by this CPU */
+	atomic_set(&ctx->ctx_last_cpu, -1);
+
+#ifdef CONFIG_SMP
+do_nothing:
+#endif
 	/*
-	 * Throughout this code we could have gotten an overflow interrupt. It is transformed
-	 * into a spurious interrupt as soon as we give up pmu ownership.
+	 * declare we are done saving this context
+	 *
+	 * must be an atomic operation
 	 */
+	atomic_set(&ctx->ctx_saving_in_progress,0);
+
 }
 
-static void
-pfm_lazy_save_regs (struct task_struct *ta)
+#ifdef CONFIG_SMP
+/*
+ * Handles request coming from other CPUs
+ */
+static void 
+pfm_handle_fetch_regs(void *info)
 {
-	pfm_context_t *ctx;
+	pfm_smp_ipi_arg_t *arg = info;
 	struct thread_struct *t;
+	pfm_context_t *ctx;
 	unsigned long mask;
 	int i;
 
-	DBprintk(("  on [%d] by [%d]\n", ta->pid, current->pid));
+	ctx = arg->task->thread.pfm_context;
+	t   = &arg->task->thread;
+
+	DBprintk(("task=%d owner=%d saving=%d\n", 
+		  arg->task->pid,
+		  PMU_OWNER() ? PMU_OWNER()->pid: -1,
+		  atomic_read(&ctx->ctx_saving_in_progress)));
+
+	/* must wait if saving was interrupted */
+	if (atomic_read(&ctx->ctx_saving_in_progress)) {
+		arg->retval = 1;
+		return;
+	}
+
+	/* can proceed, done with context */
+	if (PMU_OWNER() != arg->task) {
+		arg->retval = 0;
+		return;
+	}
+
+	DBprintk(("saving state for [%d] save_pmcs=0x%lx all_pmcs=0x%lx used_pmds=0x%lx\n", 
+		arg->task->pid,
+		ctx->ctx_saved_pmcs[0],
+		ctx->ctx_reload_pmcs[0],
+		ctx->ctx_used_pmds[0]));
+
+	/*
+	 * XXX: will be replaced with pure assembly call
+	 */
+	SET_PMU_OWNER(NULL);
+
+	ia64_srlz_d();
 
-	t   = &ta->thread;
-	ctx = ta->thread.pfm_context;
 	/*
 	 * XXX needs further optimization.
 	 * Also must take holes into account
@@ -2003,84 +3034,295 @@
 		if (mask & 0x1) t->pmd[i] =ia64_get_pmd(i);
 	}
 	
-	/* skip PMC[0], we handle it separately */
-	mask = ctx->ctx_used_pmcs[0]>>1;
-	for (i=1; mask; i++, mask>>=1) {
+	mask = ctx->ctx_saved_pmcs[0];
+	for (i=0; mask; i++, mask>>=1) {
 		if (mask & 0x1) t->pmc[i] = ia64_get_pmc(i);
 	}
-	SET_PMU_OWNER(NULL);
+	/* not owned by this CPU */
+	atomic_set(&ctx->ctx_last_cpu, -1);
+
+	/* can proceed */
+	arg->retval = 0;
+}
+
+/*
+ * Function call to fetch PMU state from another CPU identified by 'cpu'.
+ * If the context is being saved on the remote CPU, then we busy wait until
+ * the saving is done and then we return. In this case, non IPI is sent.
+ * Otherwise, we send an IPI to the remote CPU, potentially interrupting 
+ * pfm_lazy_save_regs() over there.
+ *
+ * If the retval==1, then it means that we interrupted remote save and that we must
+ * wait until the saving is over before proceeding.
+ * Otherwise, we did the saving on the remote CPU, and it was done by the time we got there.
+ * in either case, we can proceed.
+ */
+static void
+pfm_fetch_regs(int cpu, struct task_struct *task, pfm_context_t *ctx)
+{
+	pfm_smp_ipi_arg_t  arg;
+	int ret;
+
+	arg.task   = task;
+	arg.retval = -1;
+
+	if (atomic_read(&ctx->ctx_saving_in_progress)) {
+		DBprintk(("no IPI, must wait for [%d] to be saved on [%d]\n", task->pid, cpu));
+
+		/* busy wait */
+		while (atomic_read(&ctx->ctx_saving_in_progress));
+		return;
+	}
+	DBprintk(("calling CPU %d from CPU %d\n", cpu, smp_processor_id()));
+
+	if (cpu == -1) {
+		printk("refusing to use -1 for [%d]\n", task->pid);
+		return;
+	}
+
+	/* will send IPI to other CPU and wait for completion of remote call */
+	if ((ret=smp_call_function_single(cpu, pfm_handle_fetch_regs, &arg, 0, 1))) {
+		printk("perfmon: remote CPU call from %d to %d error %d\n", smp_processor_id(), cpu, ret);
+		return;
+	}
+	/*
+	 * we must wait until saving is over on the other CPU
+	 * This is the case, where we interrupted the saving which started just at the time we sent the
+	 * IPI.
+	 */
+	if (arg.retval == 1) {
+		DBprintk(("must wait for [%d] to be saved on [%d]\n", task->pid, cpu));
+		while (atomic_read(&ctx->ctx_saving_in_progress));
+		DBprintk(("done saving for [%d] on [%d]\n", task->pid, cpu));
+	}
 }
+#endif /* CONFIG_SMP */
 
 void
-pfm_load_regs (struct task_struct *ta)
+pfm_load_regs (struct task_struct *task)
 {
-	struct thread_struct *t = &ta->thread;
-	pfm_context_t *ctx = ta->thread.pfm_context;
+	struct thread_struct *t;
+	pfm_context_t *ctx;
 	struct task_struct *owner;
 	unsigned long mask;
+	u64 psr;
 	int i;
+#ifdef CONFIG_SMP
+	int cpu;
+#endif
 
 	owner = PMU_OWNER();
-	if (owner == ta) goto skip_restore;
+	ctx   = task->thread.pfm_context;
+
+	/*
+	 * if we were the last user, then nothing to do except restore psr
+	 */
+	if (owner == task) {
+		if (atomic_read(&ctx->ctx_last_cpu) != smp_processor_id())
+			DBprintk(("invalid last_cpu=%d for [%d]\n", 
+				atomic_read(&ctx->ctx_last_cpu), task->pid));
+
+		psr = ctx->ctx_saved_psr;
+		__asm__ __volatile__ ("mov psr.l=%0;; srlz.i;;"::"r"(psr): "memory");
+
+		return;
+	}
+	DBprintk(("load_regs: must reload for [%d] owner=%d\n", 
+		task->pid, owner ? owner->pid : -1 ));
+	/*
+	 * someone else is still using the PMU, first push it out and
+	 * then we'll be able to install our stuff !
+	 */
 	if (owner) pfm_lazy_save_regs(owner);
 
-	SET_PMU_OWNER(ta);
+#ifdef CONFIG_SMP
+	/* 
+	 * check if context on another CPU (-1 means saved)
+	 * We MUST use the variable, as last_cpu may change behind our 
+	 * back. If it changes to -1 (not on a CPU anymore), then in cpu
+	 * we have the last CPU the context was on. We may be sending the 
+	 * IPI for nothing, but we have no way of verifying this. 
+	 */
+	cpu = atomic_read(&ctx->ctx_last_cpu);
+	if (cpu != -1) {
+		pfm_fetch_regs(cpu, task, ctx);
+	}
+#endif
+	t   = &task->thread;
 
+	/*
+	 * XXX: will be replaced by assembly routine
+	 * We clear all unused PMDs to avoid leaking information
+	 */
 	mask = ctx->ctx_used_pmds[0];
 	for (i=0; mask; i++, mask>>=1) {
-		if (mask & 0x1) ia64_set_pmd(i, t->pmd[i]);
+		if (mask & 0x1) 
+			ia64_set_pmd(i, t->pmd[i]);
+		else
+			ia64_set_pmd(i, 0UL);
 	}
+	/* XXX: will need to clear all unused pmd, for security */
 
-	/* skip PMC[0] to avoid side effects */
-	mask = ctx->ctx_used_pmcs[0]>>1;
+	/* 
+	 * skip pmc[0] to avoid side-effects, 
+	 * all PMCs are systematically reloaded, unsued get default value
+	 * to avoid picking up stale configuration
+	 */	
+	mask = ctx->ctx_reload_pmcs[0]>>1;
 	for (i=1; mask; i++, mask>>=1) {
 		if (mask & 0x1) ia64_set_pmc(i, t->pmc[i]);
 	}
-skip_restore:
+
+	/*
+	 * restore debug registers when used for range restrictions.
+	 * We must restore the unused registers to avoid picking up
+	 * stale information.
+	 */
+	mask = ctx->ctx_used_ibrs[0];
+	for (i=0; mask; i++, mask>>=1) {
+		if (mask & 0x1) 
+			ia64_set_ibr(i, t->ibr[i]);
+		else
+			ia64_set_ibr(i, 0UL);
+	}
+
+	mask = ctx->ctx_used_dbrs[0];
+	for (i=0; mask; i++, mask>>=1) {
+		if (mask & 0x1) 
+			ia64_set_dbr(i, t->dbr[i]);
+		else
+			ia64_set_dbr(i, 0UL);
+	}
+
+	if (t->pmc[0] & ~0x1) {
+		ia64_srlz_d();
+		pfm_overflow_handler(task, t->pmc[0], NULL);
+	}
+
+	/*
+	 * fl_frozen==1 when we are in blocking mode waiting for restart
+	 */
+	if (ctx->ctx_fl_frozen == 0) {
+		ia64_set_pmc(0, 0);
+		ia64_srlz_d();
+	}
+	atomic_set(&ctx->ctx_last_cpu, smp_processor_id());
+
+	SET_PMU_OWNER(task);
+
+	/*
+	 * restore the psr we changed in pfm_save_regs()
+	 */
+	psr = ctx->ctx_saved_psr;
+	__asm__ __volatile__ ("mov psr.l=%0;; srlz.i;;"::"r"(psr): "memory");
+
+}
+
+/*
+ * XXX: make this routine able to work with non current context
+ */
+static void
+ia64_reset_pmu(struct task_struct *task)
+{
+	struct thread_struct *t = &task->thread;
+	pfm_context_t *ctx = t->pfm_context;
+	unsigned long mask;
+	int i;
+
+	if (task != current) {
+		printk("perfmon: invalid task in ia64_reset_pmu()\n");
+		return;
+	}
+
+	/* Let's make sure the PMU is frozen */
+	ia64_set_pmc(0,1);
+
+	/*
+	 * install reset values for PMC. We skip PMC0 (done above)
+	 * XX: good up to 64 PMCS
+	 */
+	mask = pmu_conf.impl_regs[0] >> 1;
+	for(i=1; mask; mask>>=1, i++) {
+		if (mask & 0x1) {
+			ia64_set_pmc(i, reset_pmcs[i]);
+			/*
+			 * When restoring context, we must restore ALL pmcs, even the ones 
+			 * that the task does not use to avoid leaks and possibly corruption
+			 * of the sesion because of configuration conflicts. So here, we 
+			 * initializaed the table used in the context switch restore routine.
+	 		 */
+			t->pmc[i] = reset_pmcs[i];
+			DBprintk((" pmc[%d]=0x%lx\n", i, reset_pmcs[i]));
+						 
+		}
+	}
+	/*
+	 * clear reset values for PMD. 
+	 * XX: good up to 64 PMDS. Suppose that zero is a valid value.
+	 */
+	mask = pmu_conf.impl_regs[4];
+	for(i=0; mask; mask>>=1, i++) {
+		if (mask & 0x1) ia64_set_pmd(i, 0UL);
+	}
+
 	/*
-	 * unfreeze only when possible
+	 * On context switched restore, we must restore ALL pmc even
+	 * when they are not actively used by the task. In UP, the incoming process 
+	 * may otherwise pick up left over PMC state from the previous process.
+	 * As opposed to PMD, stale PMC can cause harm to the incoming
+	 * process because they may change what is being measured. 
+	 * Therefore, we must systematically reinstall the entire
+	 * PMC state. In SMP, the same thing is possible on the 
+	 * same CPU but also on between 2 CPUs.
+	 *
+	 * There is unfortunately no easy way to avoid this problem
+	 * on either UP or SMP. This definitively slows down the 
+	 * pfm_load_regs(). 
 	 */
-	if (ctx->ctx_fl_frozen == 0) {
-		ia64_set_pmc(0, 0);
-		ia64_srlz_d();
-		/* place where we potentially (kernel level) start monitoring again */
-	}
-}
+	
+	 /*
+	  * We must include all the PMC in this mask to make sure we don't
+	  * see any side effect of the stale state, such as opcode matching
+	  * or range restrictions, for instance.
+	  */
+	ctx->ctx_reload_pmcs[0] = pmu_conf.impl_regs[0];
 
+	/*
+	 * useful in case of re-enable after disable
+	 */
+	ctx->ctx_used_pmds[0] = 0UL;
+	ctx->ctx_used_ibrs[0] = 0UL;
+	ctx->ctx_used_dbrs[0] = 0UL;
+
+	ia64_srlz_d();
+}
 
 /*
  * This function is called when a thread exits (from exit_thread()).
  * This is a simplified pfm_save_regs() that simply flushes the current
  * register state into the save area taking into account any pending
- * overflow. This time no notification is sent because the taks is dying
+ * overflow. This time no notification is sent because the task is dying
  * anyway. The inline processing of overflows avoids loosing some counts.
  * The PMU is frozen on exit from this call and is to never be reenabled
  * again for this task.
+ *
  */
 void
-pfm_flush_regs (struct task_struct *ta)
+pfm_flush_regs (struct task_struct *task)
 {
 	pfm_context_t *ctx;
-	u64 pmc0, psr, mask;
-	int i,j;
+	u64 pmc0;
+	unsigned long mask, mask2, val;
+	int i;
 
-	if (ta == NULL) {
-		panic(__FUNCTION__" task is NULL\n");
-	}
-	ctx = ta->thread.pfm_context;
-	if (ctx == NULL) {
-		panic(__FUNCTION__" no PFM ctx is NULL\n");
-	}
-	/*
-	 * We must make sure that we don't loose any potential overflow
-	 * interrupt while saving PMU context. In this code, external
-	 * interrupts are always enabled.
-	 */
+	ctx = task->thread.pfm_context;
 
-	/*
-	 * save current PSR: needed because we modify it
+	if (ctx == NULL) return;
+
+	/* 
+	 * that's it if context already disabled
 	 */
-	__asm__ __volatile__ ("mov %0=psr;;": "=r"(psr) :: "memory");
+	if (ctx->ctx_flags.state == PFM_CTX_DISABLED) return;
 
 	/*
 	 * stop monitoring:
@@ -2090,7 +3332,27 @@
 	 * in kernel.
 	 * By now, we could still have an overflow interrupt in-flight.
 	 */
-	__asm__ __volatile__ ("rsm psr.up;;"::: "memory");
+	if (ctx->ctx_fl_system) {
+
+		__asm__ __volatile__ ("rsm psr.pp;;"::: "memory");
+
+		/* disable dcr pp */
+		ia64_set_dcr(ia64_get_dcr() & ~IA64_DCR_PP);
+
+#ifdef CONFIG_SMP
+		local_cpu_data->pfm_syst_wide = 0;
+		local_cpu_data->pfm_dcr_pp    = 0;
+#else
+		pfm_tasklist_toggle_pp(0);
+#endif
+
+	} else  {
+
+		__asm__ __volatile__ ("rum psr.up;;"::: "memory");
+
+		/* no more save/restore on ctxsw */
+		current->thread.flags &= ~IA64_THREAD_PM_VALID;
+	}
 
 	/*
 	 * Mark the PMU as not owned
@@ -2121,85 +3383,68 @@
 	ia64_srlz_d();
 
 	/*
-	 * restore PSR for context switch to save
+	 * We don't need to restore psr, because we are on our way out anyway
 	 */
-	__asm__ __volatile__ ("mov psr.l=%0;;srlz.i;"::"r"(psr): "memory");
 
 	/*
 	 * This loop flushes the PMD into the PFM context.
-	 * IT also processes overflow inline.
+	 * It also processes overflow inline.
 	 *
 	 * IMPORTANT: No notification is sent at this point as the process is dying.
 	 * The implicit notification will come from a SIGCHILD or a return from a
 	 * waitpid().
 	 *
-	 * XXX: must take holes into account
 	 */
-	mask = pmc0 >> PMU_FIRST_COUNTER;
-	for (i=0,j=PMU_FIRST_COUNTER; i< pmu_conf.max_counters; i++,j++) {
-
-		/* collect latest results */
-		ctx->ctx_pmds[i].val += ia64_get_pmd(j) & pmu_conf.perf_ovfl_val;
-
-		/*
-		 * now everything is in ctx_pmds[] and we need
-		 * to clear the saved context from save_regs() such that
-		 * pfm_read_pmds() gets the correct value
-		 */
-		ta->thread.pmd[j] = 0;
 
-		/* take care of overflow inline */
-		if (mask & 0x1) {
-			ctx->ctx_pmds[i].val += 1 + pmu_conf.perf_ovfl_val;
-			DBprintk((" PMD[%d] overflowed pmd=0x%lx pmds.val=0x%lx\n",
-			j, ia64_get_pmd(j), ctx->ctx_pmds[i].val));
-		}
-		mask >>=1;
-	}
-}
+	if (atomic_read(&ctx->ctx_last_cpu) != smp_processor_id()) 
+		printk("perfmon: [%d] last_cpu=%d\n", task->pid, atomic_read(&ctx->ctx_last_cpu));
 
-/*
- * XXX: this routine is not very portable for PMCs
- * XXX: make this routine able to work with non current context
- */
-static void
-ia64_reset_pmu(void)
-{
-	int i;
+	mask  = pmc0 >> PMU_FIRST_COUNTER;
+	mask2 = ctx->ctx_used_pmds[0] >> PMU_FIRST_COUNTER;
 
-	/* PMU is frozen, no pending overflow bits */
-	ia64_set_pmc(0,1);
+	for (i = PMU_FIRST_COUNTER; mask2; i++, mask>>=1, mask2>>=1) {
 
-	/* extra overflow bits + counter configs cleared */
-	for(i=1; i< PMU_FIRST_COUNTER + pmu_conf.max_counters ; i++) {
-		ia64_set_pmc(i,0);
-	}
+		/* skip non used pmds */
+		if ((mask2 & 0x1) == 0) continue;
 
-	/* opcode matcher set to all 1s */
-	ia64_set_pmc(8,~0);
-	ia64_set_pmc(9,~0);
+		val = ia64_get_pmd(i);
 
-	/* I-EAR config cleared, plm=0 */
-	ia64_set_pmc(10,0);
+		if (PMD_IS_COUNTING(i)) {
 
-	/* D-EAR config cleared, PMC[11].pt must be 1 */
-	ia64_set_pmc(11,1 << 28);
+			DBprintk(("[%d] pmd[%d] soft_pmd=0x%lx hw_pmd=0x%lx\n", task->pid, i, ctx->ctx_soft_pmds[i].val, val & pmu_conf.perf_ovfl_val));
 
-	/* BTB config. plm=0 */
-	ia64_set_pmc(12,0);
+			/* collect latest results */
+			ctx->ctx_soft_pmds[i].val += val & pmu_conf.perf_ovfl_val;
 
-	/* Instruction address range, PMC[13].ta must be 1 */
-	ia64_set_pmc(13,1);
+			/*
+			 * now everything is in ctx_soft_pmds[] and we need
+			 * to clear the saved context from save_regs() such that
+			 * pfm_read_pmds() gets the correct value
+			 */
+			task->thread.pmd[i] = 0;
 
-	/* clears all PMD registers */
-	for(i=0;i< pmu_conf.num_pmds; i++) {
-		if (PMD_IS_IMPL(i))  ia64_set_pmd(i,0);
+			/* take care of overflow inline */
+			if (mask & 0x1) {
+				ctx->ctx_soft_pmds[i].val += 1 + pmu_conf.perf_ovfl_val;
+				DBprintk(("[%d] pmd[%d] overflowed soft_pmd=0x%lx\n",
+					task->pid, i, ctx->ctx_soft_pmds[i].val));
+			}
+		} else {
+			DBprintk(("[%d] pmd[%d] hw_pmd=0x%lx\n", task->pid, i, val));
+			/* not a counter, just save value as is */
+			task->thread.pmd[i] = val;
+		}
 	}
-	ia64_srlz_d();
+	/* 
+	 * indicates that context has been saved
+	 */
+	atomic_set(&ctx->ctx_last_cpu, -1);
+
 }
 
+
 /*
- * task is the newly created task
+ * task is the newly created task, pt_regs for new child
  */
 int
 pfm_inherit(struct task_struct *task, struct pt_regs *regs)
@@ -2207,25 +3452,29 @@
 	pfm_context_t *ctx = current->thread.pfm_context;
 	pfm_context_t *nctx;
 	struct thread_struct *th = &task->thread;
-	int i, cnum;
+	unsigned long m;
+	int i;
 
 	/*
-	 * bypass completely for system wide
+	 * make sure child cannot mess up the monitoring session
 	 */
-	if (pfs_info.pfs_sys_session) {
-		DBprintk((" enabling psr.pp for %d\n", task->pid));
-		ia64_psr(regs)->pp = pfs_info.pfs_pp;
-		return 0;
-	}
+	 ia64_psr(regs)->sp = 1;
+	 DBprintk(("enabling psr.sp for [%d]\n", task->pid));
+
+	 /*
+	  * remove any sampling buffer mapping from child user 
+	  * address space. Must be done for all cases of inheritance.
+	  */
+	 if (ctx->ctx_smpl_vaddr) pfm_remove_smpl_mapping(task);
 
 	/*
 	 * takes care of easiest case first
 	 */
 	if (CTX_INHERIT_MODE(ctx) == PFM_FL_INHERIT_NONE) {
-		DBprintk((" removing PFM context for %d\n", task->pid));
+		DBprintk(("removing PFM context for [%d]\n", task->pid));
 		task->thread.pfm_context     = NULL;
-		task->thread.pfm_must_block  = 0;
-		atomic_set(&task->thread.pfm_notifiers_check, 0);
+		task->thread.pfm_ovfl_block_reset  = 0;
+
 		/* copy_thread() clears IA64_THREAD_PM_VALID */
 		return 0;
 	}
@@ -2235,45 +3484,81 @@
 	/* copy content */
 	*nctx = *ctx;
 
+
 	if (CTX_INHERIT_MODE(ctx) == PFM_FL_INHERIT_ONCE) {
 		nctx->ctx_fl_inherit = PFM_FL_INHERIT_NONE;
-		atomic_set(&task->thread.pfm_notifiers_check, 0);
-		DBprintk((" downgrading to INHERIT_NONE for %d\n", task->pid));
-		pfs_info.pfs_proc_sessions++;
+		atomic_set(&nctx->ctx_last_cpu, -1);
+
+		/*
+		 * task is not yet visible in the tasklist, so we do 
+		 * not need to lock the newly created context.
+		 * However, we must grab the tasklist_lock to ensure
+		 * that the ctx_owner or ctx_notify_task do not disappear
+		 * while we increment their check counters.
+		 */
+		read_lock(&tasklist_lock);
+
+		if (nctx->ctx_notify_task) 
+			atomic_inc(&nctx->ctx_notify_task->thread.pfm_notifiers_check);
+
+		if (nctx->ctx_owner)
+			atomic_inc(&nctx->ctx_owner->thread.pfm_owners_check);
+
+		read_unlock(&tasklist_lock);
+
+		DBprintk(("downgrading to INHERIT_NONE for [%d]\n", task->pid));
+
+		LOCK_PFS();
+		pfm_sessions.pfs_task_sessions++;
+		UNLOCK_PFS();
 	}
 
 	/* initialize counters in new context */
-	for(i=0, cnum= PMU_FIRST_COUNTER; i < pmu_conf.max_counters; cnum++, i++) {
-		nctx->ctx_pmds[i].val = nctx->ctx_pmds[i].ival & ~pmu_conf.perf_ovfl_val;
-		th->pmd[cnum]	      = nctx->ctx_pmds[i].ival & pmu_conf.perf_ovfl_val;
+	m = pmu_conf.counter_pmds[0] >> PMU_FIRST_COUNTER;
+	for(i = PMU_FIRST_COUNTER ; m ; m>>=1, i++) {
+		if (m & 0x1) {
+			nctx->ctx_soft_pmds[i].val = nctx->ctx_soft_pmds[i].ival & ~pmu_conf.perf_ovfl_val;
+			th->pmd[i]	      	   = nctx->ctx_soft_pmds[i].ival & pmu_conf.perf_ovfl_val;
+		}
 
 	}
 	/* clear BTB index register */
 	th->pmd[16] = 0;
 
 	/* if sampling then increment number of users of buffer */
-	if (nctx->ctx_smpl_buf) {
-		atomic_inc(&nctx->ctx_smpl_buf->psb_refcnt);
+	if (nctx->ctx_psb) {
+
+		/*
+		 * XXX: nopt very pretty!
+		 */
+		LOCK_PSB(nctx->ctx_psb);
+		nctx->ctx_psb->psb_refcnt++;
+		UNLOCK_PSB(nctx->ctx_psb);
+		/*
+	 	 * remove any pointer to sampling buffer mapping
+	 	 */
+		nctx->ctx_smpl_vaddr = 0;
 	}
 
 	nctx->ctx_fl_frozen = 0;
-	nctx->ctx_ovfl_regs = 0;
+	nctx->ctx_ovfl_regs[0] = 0UL;
+
 	sema_init(&nctx->ctx_restart_sem, 0); /* reset this semaphore to locked */
 
 	/* clear pending notification */
-	th->pfm_must_block = 0;
+	th->pfm_ovfl_block_reset = 0;
 
 	/* link with new task */
-	th->pfm_context     = nctx;
+	th->pfm_context    = nctx;
 
-	DBprintk((" nctx=%p for process %d\n", (void *)nctx, task->pid));
+	DBprintk(("nctx=%p for process [%d]\n", (void *)nctx, task->pid));
 
 	/*
 	 * the copy_thread routine automatically clears
 	 * IA64_THREAD_PM_VALID, so we need to reenable it, if it was used by the caller
 	 */
 	if (current->thread.flags & IA64_THREAD_PM_VALID) {
-		DBprintk(("  setting PM_VALID for %d\n", task->pid));
+		DBprintk(("setting PM_VALID for [%d]\n", task->pid));
 		th->flags |= IA64_THREAD_PM_VALID;
 	}
 
@@ -2281,100 +3566,249 @@
 }
 
 /* 
- * called from release_thread(), at this point this task is not in the 
- * tasklist anymore
+ *
+ * We cannot touch any of the PMU registers at this point as we may
+ * not be running on the same CPU the task was last run on.  Therefore
+ * it is assumed that the PMU has been stopped appropriately in
+ * pfm_flush_regs() called from exit_thread(). 
+ *
+ * The function is called in the context of the parent via a release_thread()
+ * and wait4(). The task is not in the tasklist anymore.
  */
 void
 pfm_context_exit(struct task_struct *task)
 {
 	pfm_context_t *ctx = task->thread.pfm_context;
 
-	if (!ctx) {
-		DBprintk((" invalid context for %d\n", task->pid));
-		return;
-	}
+	/*
+	 * check sampling buffer
+	 */
+	if (ctx->ctx_psb) {
+		pfm_smpl_buffer_desc_t *psb = ctx->ctx_psb;
+
+		LOCK_PSB(psb);
+
+		DBprintk(("sampling buffer from [%d] @%p size %ld vma_flag=0x%x\n",
+			task->pid,
+			psb->psb_hdr, psb->psb_size, psb->psb_flags));
+
+		/*
+		 * in the case where we are the last user, we may be able to free
+		 * the buffer
+		 */
+		psb->psb_refcnt--;
+
+		if (psb->psb_refcnt == 0) {
+
+			/*
+			 * The flag is cleared in pfm_vm_close(). which gets 
+			 * called from do_exit() via exit_mm(). 
+			 * By the time we come here, the task has no more mm context.
+			 *
+			 * We can only free the psb and buffer here after the vm area
+			 * describing the buffer has been removed. This normally happens 
+			 * as part of do_exit() but the entire mm context is ONLY removed
+			 * once its reference counts goes to zero. This is typically
+			 * the case except for multi-threaded (several tasks) processes.
+			 *
+			 * See pfm_vm_close() and pfm_cleanup_smpl_buf() for more details.
+			 */
+			if ((psb->psb_flags & PFM_PSB_VMA) == 0) {
+
+				DBprintk(("cleaning sampling buffer from [%d] @%p size %ld\n",
+					task->pid,
+					psb->psb_hdr, psb->psb_size));
+
+				/* 
+				 * free the buffer and psb 
+				 */
+				pfm_rvfree(psb->psb_hdr, psb->psb_size);
+				kfree(psb);
+				psb = NULL;
+			} 
+		} 
+		/* psb may have been deleted */
+		if (psb) UNLOCK_PSB(psb);
+	} 
+
+	DBprintk(("cleaning [%d] pfm_context @%p notify_task=%p check=%d mm=%p\n", 
+		task->pid, ctx, 
+		ctx->ctx_notify_task, 
+		atomic_read(&task->thread.pfm_notifiers_check), task->mm));
 
-	/* check is we have a sampling buffer attached */
-	if (ctx->ctx_smpl_buf) {
-		pfm_smpl_buffer_desc_t *psb = ctx->ctx_smpl_buf;
-
-		/* if only user left, then remove */
-		DBprintk((" [%d] [%d] psb->refcnt=%d\n", current->pid, task->pid, psb->psb_refcnt.counter));
-
-		if (atomic_dec_and_test(&psb->psb_refcnt) ) {
-			rvfree(psb->psb_hdr, psb->psb_size);
-			vfree(psb);
-			DBprintk((" [%d] cleaning [%d] sampling buffer\n", current->pid, task->pid ));
-		}
-	}
-	DBprintk((" [%d] cleaning [%d] pfm_context @%p\n", current->pid, task->pid, (void *)ctx));
-
-	/*
-	 * To avoid getting the notified task scan the entire process list
-	 * when it exits because it would have pfm_notifiers_check set, we 
-	 * decrease it by 1 to inform the task, that one less task is going
-	 * to send it notification. each new notifer increases this field by
-	 * 1 in pfm_context_create(). Of course, there is race condition between
-	 * decreasing the value and the notified task exiting. The danger comes
-	 * from the fact that we have a direct pointer to its task structure
-	 * thereby bypassing the tasklist. We must make sure that if we have 
-	 * notify_task!= NULL, the target task is still somewhat present. It may
-	 * already be detached from the tasklist but that's okay. Note that it is
-	 * okay if we 'miss the deadline' and the task scans the list for nothing,
-	 * it will affect performance but not correctness. The correctness is ensured
-	 * by using the notify_lock whic prevents the notify_task from changing on us.
-	 * Once holdhing this lock, if we see notify_task!= NULL, then it will stay like
+	/*
+	 * To avoid getting the notified task or owner task scan the entire process 
+	 * list when they exit, we decrement notifiers_check and owners_check respectively.
+	 *
+	 * Of course, there is race condition between decreasing the value and the 
+	 * task exiting. The danger comes from the fact that, in both cases, we have a 
+	 * direct pointer to a task structure thereby bypassing the tasklist. 
+	 * We must make sure that, if we have task!= NULL, the target task is still 
+	 * present and is identical to the initial task specified 
+	 * during pfm_create_context(). It may already be detached from the tasklist but 
+	 * that's okay. Note that it is okay if we miss the deadline and the task scans 
+	 * the list for nothing, it will affect performance but not correctness. 
+	 * The correctness is ensured by using the ctx_lock which prevents the 
+	 * notify_task from changing the fields in our context.
+	 * Once holdhing this lock, if we see task!= NULL, then it will stay like
 	 * that until we release the lock. If it is NULL already then we came too late.
 	 */
-	spin_lock(&ctx->ctx_notify_lock);
+	LOCK_CTX(ctx);
 
-	if (ctx->ctx_notify_task) {
-		DBprintk((" [%d] [%d] atomic_sub on [%d] notifiers=%u\n", current->pid, task->pid,
-					ctx->ctx_notify_task->pid, 
-					atomic_read(&ctx->ctx_notify_task->thread.pfm_notifiers_check)));
+	if (ctx->ctx_notify_task != NULL) {
+		DBprintk(("[%d], [%d] atomic_sub on [%d] notifiers=%u\n", current->pid,
+			task->pid,
+			ctx->ctx_notify_task->pid, 
+			atomic_read(&ctx->ctx_notify_task->thread.pfm_notifiers_check)));
+
+		atomic_dec(&ctx->ctx_notify_task->thread.pfm_notifiers_check);
+	}
+
+	if (ctx->ctx_owner != NULL) {
+		DBprintk(("[%d], [%d] atomic_sub on [%d] owners=%u\n", 
+			 current->pid, 
+			 task->pid,
+			 ctx->ctx_owner->pid, 
+			 atomic_read(&ctx->ctx_owner->thread.pfm_owners_check)));
 
-		atomic_sub(1, &ctx->ctx_notify_task->thread.pfm_notifiers_check);
+		atomic_dec(&ctx->ctx_owner->thread.pfm_owners_check);
 	}
 
-	spin_unlock(&ctx->ctx_notify_lock);
+	UNLOCK_CTX(ctx);
+
+	LOCK_PFS();
 
 	if (ctx->ctx_fl_system) {
-		/*
-		 * if included interrupts (true by default), then reset
-		 * to get default value
-		 */
-		if (ctx->ctx_fl_exclintr == 0) {
-			/*
-			 * reload kernel default DCR value
-			 */
-			ia64_set_dcr(pfs_info.pfs_dfl_dcr);
-			DBprintk((" restored dcr to 0x%lx\n", pfs_info.pfs_dfl_dcr));
+
+		pfm_sessions.pfs_sys_session[ctx->ctx_cpu] = NULL;
+		pfm_sessions.pfs_sys_sessions--;
+		DBprintk(("freeing syswide session on CPU%ld\n", ctx->ctx_cpu));
+		/* update perfmon debug register counter */
+		if (ctx->ctx_fl_using_dbreg) {
+			if (pfm_sessions.pfs_sys_use_dbregs == 0) {
+				printk("perfmon: invalid release for [%d] sys_use_dbregs=0\n", task->pid);
+			} else
+				pfm_sessions.pfs_sys_use_dbregs--;
 		}
-		/* 
-		 * free system wide session slot
-		 */
-		pfs_info.pfs_sys_session = 0;
+
+		/*
+	 	 * remove any CPU pinning
+	 	 */
+		task->cpus_allowed = ctx->ctx_saved_cpus_allowed;
+		task->need_resched = 1;
 	} else {
-		pfs_info.pfs_proc_sessions--;
+		pfm_sessions.pfs_task_sessions--;
 	}
+	UNLOCK_PFS();
 
 	pfm_context_free(ctx);
 	/* 
 	 *  clean pfm state in thread structure,
 	 */
-	task->thread.pfm_context    = NULL;
-	task->thread.pfm_must_block = 0;
+	task->thread.pfm_context          = NULL;
+	task->thread.pfm_ovfl_block_reset = 0;
+
 	/* pfm_notifiers is cleaned in pfm_cleanup_notifiers() */
+}
+
+/*
+ * function invoked from release_thread when pfm_smpl_buf_list is not NULL
+ */
+int
+pfm_cleanup_smpl_buf(struct task_struct *task)
+{
+	pfm_smpl_buffer_desc_t *tmp, *psb = task->thread.pfm_smpl_buf_list;
 
+	if (psb == NULL) {
+		printk("perfmon: psb is null in [%d]\n", current->pid);
+		return -1;
+	}
+	/*
+	 * Walk through the list and free the sampling buffer and psb
+	 */
+	while (psb) {
+		DBprintk(("[%d] freeing smpl @%p size %ld\n", current->pid, psb->psb_hdr, psb->psb_size));
+
+		pfm_rvfree(psb->psb_hdr, psb->psb_size);
+		tmp = psb->psb_next;
+		kfree(psb);
+		psb = tmp;
+	}
+
+	/* just in case */
+	task->thread.pfm_smpl_buf_list = NULL;
+
+	return 0;
+}
+
+/*
+ * function invoked from release_thread to make sure that the ctx_owner field does not
+ * point to an unexisting task.
+ */
+void
+pfm_cleanup_owners(struct task_struct *task)
+{
+	struct task_struct *p;
+	pfm_context_t *ctx;
+
+	DBprintk(("called by [%d] for [%d]\n", current->pid, task->pid));
+
+	read_lock(&tasklist_lock);
+
+	for_each_task(p) {
+		/*
+		 * It is safe to do the 2-step test here, because thread.ctx
+		 * is cleaned up only in release_thread() and at that point
+		 * the task has been detached from the tasklist which is an
+		 * operation which uses the write_lock() on the tasklist_lock
+		 * so it cannot run concurrently to this loop. So we have the
+		 * guarantee that if we find p and it has a perfmon ctx then
+		 * it is going to stay like this for the entire execution of this
+		 * loop.
+		 */
+		ctx = p->thread.pfm_context;
+
+		//DBprintk(("[%d] scanning task [%d] ctx=%p\n", task->pid, p->pid, ctx));
+
+		if (ctx && ctx->ctx_owner == task) {
+			DBprintk(("trying for owner [%d] in [%d]\n", task->pid, p->pid));
+			/*
+			 * the spinlock is required to take care of a race condition
+			 * with the send_sig_info() call. We must make sure that 
+			 * either the send_sig_info() completes using a valid task,
+			 * or the notify_task is cleared before the send_sig_info()
+			 * can pick up a stale value. Note that by the time this
+			 * function is executed the 'task' is already detached from the
+			 * tasklist. The problem is that the notifiers have a direct
+			 * pointer to it. It is okay to send a signal to a task in this
+			 * stage, it simply will have no effect. But it is better than sending
+			 * to a completely destroyed task or worse to a new task using the same
+			 * task_struct address.
+			 */
+			LOCK_CTX(ctx);
+
+			ctx->ctx_owner = NULL;
+
+			UNLOCK_CTX(ctx);
+
+			DBprintk(("done for notifier [%d] in [%d]\n", task->pid, p->pid));
+		}
+	}
+	read_unlock(&tasklist_lock);
 }
 
+
+/*
+ * function called from release_thread to make sure that the ctx_notify_task is not pointing
+ * to an unexisting task
+ */
 void
 pfm_cleanup_notifiers(struct task_struct *task)
 {
 	struct task_struct *p;
 	pfm_context_t *ctx;
 
-	DBprintk((" [%d] called\n", task->pid));
+	DBprintk(("called by [%d] for [%d]\n", current->pid, task->pid));
 
 	read_lock(&tasklist_lock);
 
@@ -2391,10 +3825,10 @@
 		 */
 		ctx = p->thread.pfm_context;
 
-		DBprintk((" [%d] scanning task [%d] ctx=%p\n", task->pid, p->pid, ctx));
+		//DBprintk(("[%d] scanning task [%d] ctx=%p\n", task->pid, p->pid, ctx));
 
 		if (ctx && ctx->ctx_notify_task == task) {
-			DBprintk((" trying for notifier %d in %d\n", task->pid, p->pid));
+			DBprintk(("trying for notifier [%d] in [%d]\n", task->pid, p->pid));
 			/*
 			 * the spinlock is required to take care of a race condition
 			 * with the send_sig_info() call. We must make sure that 
@@ -2408,23 +3842,146 @@
 			 * to a completely destroyed task or worse to a new task using the same
 			 * task_struct address.
 			 */
-			spin_lock(&ctx->ctx_notify_lock);
+			LOCK_CTX(ctx);
 
 			ctx->ctx_notify_task = NULL;
 
-			spin_unlock(&ctx->ctx_notify_lock);
+			UNLOCK_CTX(ctx);
 
-			DBprintk((" done for notifier %d in %d\n", task->pid, p->pid));
+			DBprintk(("done for notifier [%d] in [%d]\n", task->pid, p->pid));
 		}
 	}
 	read_unlock(&tasklist_lock);
+}
+
+static struct irqaction perfmon_irqaction = {
+	handler:	perfmon_interrupt,
+	flags:		SA_INTERRUPT,
+	name:		"perfmon"
+};
+
 
+static void
+pfm_pmu_snapshot(void)
+{
+	int i;
+
+	for (i=0; i < IA64_NUM_PMC_REGS; i++) {
+		if (i >= pmu_conf.num_pmcs) break;
+		if (PMC_IS_IMPL(i)) reset_pmcs[i] = ia64_get_pmc(i);
+	}
+}
+
+/*
+ * perfmon initialization routine, called from the initcall() table
+ */
+int __init
+perfmon_init (void)
+{
+	pal_perf_mon_info_u_t pm_info;
+	s64 status;
+
+	register_percpu_irq(IA64_PERFMON_VECTOR, &perfmon_irqaction);
+
+	ia64_set_pmv(IA64_PERFMON_VECTOR);
+	ia64_srlz_d();
+
+	pmu_conf.pfm_is_disabled = 1;
+
+	printk("perfmon: version %u.%u (sampling format v%u.%u) IRQ %u\n", 
+		PFM_VERSION_MAJ, 
+		PFM_VERSION_MIN, 
+		PFM_SMPL_VERSION_MAJ, 
+		PFM_SMPL_VERSION_MIN, 
+		IA64_PERFMON_VECTOR);
+
+	if ((status=ia64_pal_perf_mon_info(pmu_conf.impl_regs, &pm_info)) != 0) {
+		printk("perfmon: PAL call failed (%ld), perfmon disabled\n", status);
+		return -1;
+	}
+
+	pmu_conf.perf_ovfl_val = (1UL << pm_info.pal_perf_mon_info_s.width) - 1;
+	pmu_conf.max_counters  = pm_info.pal_perf_mon_info_s.generic;
+	pmu_conf.num_pmcs      = find_num_pm_regs(pmu_conf.impl_regs);
+	pmu_conf.num_pmds      = find_num_pm_regs(&pmu_conf.impl_regs[4]);
+
+	printk("perfmon: %u bits counters\n", pm_info.pal_perf_mon_info_s.width);
+
+	printk("perfmon: %lu PMC/PMD pairs, %lu PMCs, %lu PMDs\n", 
+	       pmu_conf.max_counters, pmu_conf.num_pmcs, pmu_conf.num_pmds);
+
+	/* sanity check */
+	if (pmu_conf.num_pmds >= IA64_NUM_PMD_REGS || pmu_conf.num_pmcs >= IA64_NUM_PMC_REGS) {
+		printk(KERN_ERR "perfmon: not enough pmc/pmd, perfmon is DISABLED\n");
+		return -1; /* no need to continue anyway */
+	}
+
+	if (ia64_pal_debug_info(&pmu_conf.num_ibrs, &pmu_conf.num_dbrs)) {
+		printk(KERN_WARNING "perfmon: unable to get number of debug registers\n");
+		pmu_conf.num_ibrs = pmu_conf.num_dbrs = 0;
+	}
+	/* PAL reports the number of pairs */
+	pmu_conf.num_ibrs <<=1;
+	pmu_conf.num_dbrs <<=1;
+
+	/*
+	 * take a snapshot of all PMU registers. PAL is supposed
+	 * to configure them with stable/safe values, i.e., not
+	 * capturing anything.
+	 * We take a snapshot now, before we make any modifications. This
+	 * will become our master copy. Then we will reuse the snapshot
+	 * to reset the PMU in pfm_enable(). Using this technique, perfmon
+	 * does NOT have to know about the specific values to program for
+	 * the PMC/PMD. The safe values may be different from one CPU model to
+	 * the other.
+	 */
+	pfm_pmu_snapshot();
+
+	/* 
+	 * list the pmc registers used to control monitors 
+	 * XXX: unfortunately this information is not provided by PAL
+	 *
+	 * We start with the architected minimum and then refine for each CPU model
+	 */
+	pmu_conf.monitor_pmcs[0] = PMM(4)|PMM(5)|PMM(6)|PMM(7);
+
+	/*
+	 * architected counters
+	 */
+	pmu_conf.counter_pmds[0] |= PMM(4)|PMM(5)|PMM(6)|PMM(7);
+
+#ifdef CONFIG_ITANIUM
+	pmu_conf.monitor_pmcs[0] |= PMM(10)|PMM(11)|PMM(12);
+	/* Itanium does not add more counters */
+#endif
+	/* we are all set */
+	pmu_conf.pfm_is_disabled = 0;
+
+	/*
+	 * for now here for debug purposes
+	 */
+	perfmon_dir = create_proc_read_entry ("perfmon", 0, 0, perfmon_read_entry, NULL);
+
+	spin_lock_init(&pfm_sessions.pfs_lock);
+
+	return 0;
+}
+
+__initcall(perfmon_init);
+
+void
+perfmon_init_percpu (void)
+{
+	ia64_set_pmv(IA64_PERFMON_VECTOR);
+	ia64_srlz_d();
 }
 
+
 #else /* !CONFIG_PERFMON */
 
 asmlinkage int
-sys_perfmonctl (int pid, int cmd, int flags, perfmon_req_t *req, int count, long arg6, long arg7, long arg8, long stack)
+sys_perfmonctl (int pid, int cmd, void *req, int count, long arg5, long arg6, 
+		long arg7, long arg8, long stack)
 {
 	return -ENOSYS;
 }
diff -Nru linux/arch/ia64/kernel/process.c linux-2.4.19-pre5-mjc/arch/ia64/kernel/process.c
--- linux/arch/ia64/kernel/process.c	Fri Nov  9 17:26:17 2001
+++ linux-2.4.19-pre5-mjc/arch/ia64/kernel/process.c	Sat Apr  6 08:26:00 2002
@@ -1,8 +1,8 @@
 /*
  * Architecture-specific setup.
  *
- * Copyright (C) 1998-2001 Hewlett-Packard Co
- * Copyright (C) 1998-2001 David Mosberger-Tang <davidm@hpl.hp.com>
+ * Copyright (C) 1998-2002 Hewlett-Packard Co
+ *	David Mosberger-Tang <davidm@hpl.hp.com>
  */
 #define __KERNEL_SYSCALLS__	/* see <asm/unistd.h> */
 #include <linux/config.h>
@@ -12,6 +12,7 @@
 #include <linux/errno.h>
 #include <linux/kernel.h>
 #include <linux/mm.h>
+#include <linux/personality.h>
 #include <linux/sched.h>
 #include <linux/slab.h>
 #include <linux/smp_lock.h>
@@ -28,6 +29,10 @@
 #include <asm/unwind.h>
 #include <asm/user.h>
 
+#ifdef CONFIG_IA64_SGI_SN
+#include <asm/sn/idle.h>
+#endif
+
 static void
 do_show_stack (struct unw_frame_info *info, void *arg)
 {
@@ -46,6 +51,15 @@
 }
 
 void
+show_trace_task (struct task_struct *task)
+{
+	struct unw_frame_info info;
+
+	unw_init_from_blocked_task(&info, task);
+	do_show_stack(&info, 0);
+}
+
+void
 show_stack (struct task_struct *task)
 {
 	if (!task)
@@ -90,8 +104,8 @@
 	printk("r26 : %016lx r27 : %016lx r28 : %016lx\n", regs->r26, regs->r27, regs->r28);
 	printk("r29 : %016lx r30 : %016lx r31 : %016lx\n", regs->r29, regs->r30, regs->r31);
 
-	/* print the stacked registers if cr.ifs is valid: */
-	if (regs->cr_ifs & 0x8000000000000000) {
+	if (user_mode(regs)) {
+		/* print the stacked registers */
 		unsigned long val, sof, *bsp, ndirty;
 		int i, is_nat = 0;
 
@@ -122,8 +136,18 @@
 		if (!current->need_resched)
 			min_xtp();
 #endif
-		while (!current->need_resched)
+
+		while (!current->need_resched) {
+#ifdef CONFIG_IA64_SGI_SN
+			snidle();
+#endif
 			continue;
+		}
+
+#ifdef CONFIG_IA64_SGI_SN
+		snidleoff();
+#endif
+
 #ifdef CONFIG_SMP
 		normal_xtp();
 #endif
@@ -139,10 +163,17 @@
 {
 	if ((task->thread.flags & IA64_THREAD_DBG_VALID) != 0)
 		ia64_save_debug_regs(&task->thread.dbr[0]);
+
 #ifdef CONFIG_PERFMON
 	if ((task->thread.flags & IA64_THREAD_PM_VALID) != 0)
 		pfm_save_regs(task);
+
+# ifdef CONFIG_SMP
+	if (local_cpu_data->pfm_syst_wide)
+		pfm_syst_wide_update_task(task, 0);
+# endif
 #endif
+
 	if (IS_IA32_PROCESS(ia64_task_regs(task)))
 		ia32_save_state(task);
 }
@@ -152,10 +183,17 @@
 {
 	if ((task->thread.flags & IA64_THREAD_DBG_VALID) != 0)
 		ia64_load_debug_regs(&task->thread.dbr[0]);
+
 #ifdef CONFIG_PERFMON
 	if ((task->thread.flags & IA64_THREAD_PM_VALID) != 0)
 		pfm_load_regs(task);
+
+# ifdef CONFIG_SMP
+	if (local_cpu_data->pfm_syst_wide)
+		pfm_syst_wide_update_task(task, 1);
+# endif
 #endif
+
 	if (IS_IA32_PROCESS(ia64_task_regs(task)))
 		ia32_load_state(task);
 }
@@ -235,7 +273,7 @@
 
 	if (user_mode(child_ptregs)) {
 		if (user_stack_base) {
-			child_ptregs->r12 = user_stack_base + user_stack_size;
+			child_ptregs->r12 = user_stack_base + user_stack_size - 16;
 			child_ptregs->ar_bspstore = user_stack_base;
 			child_ptregs->ar_rnat = 0;
 			child_ptregs->loadrs = 0;
@@ -288,9 +326,15 @@
 	if (IS_IA32_PROCESS(ia64_task_regs(current)))
 		ia32_save_state(p);
 #endif
+
 #ifdef CONFIG_PERFMON
-	if (p->thread.pfm_context)
-		retval = pfm_inherit(p, child_ptregs);
+	/*
+	 * reset notifiers and owner check (may not have a perfmon context)
+	 */
+	atomic_set(&p->thread.pfm_notifiers_check, 0);
+	atomic_set(&p->thread.pfm_owners_check, 0);
+
+	if (current->thread.pfm_context) retval = pfm_inherit(p, child_ptregs);
 #endif
 	return retval;
 }
@@ -414,6 +458,16 @@
 	return error;
 }
 
+void
+ia64_set_personality (struct elf64_hdr *elf_ex, int ibcs2_interpreter)
+{
+	set_personality(PER_LINUX);
+	if (elf_ex->e_flags & EF_IA_64_LINUX_EXECUTABLE_STACK)
+		current->thread.flags |= IA64_THREAD_XSTACK;
+	else
+		current->thread.flags &= ~IA64_THREAD_XSTACK;
+}
+
 pid_t
 kernel_thread (int (*fn)(void *), void *arg, unsigned long flags)
 {
@@ -445,15 +499,15 @@
 
 #ifdef CONFIG_PERFMON
 /*
- * By the time we get here, the task is detached from the tasklist. This is important
- * because it means that no other tasks can ever find it as a notifiied task, therfore
- * there is no race condition between this code and let's say a pfm_context_create().
- * Conversely, the pfm_cleanup_notifiers() cannot try to access a task's pfm context if
- * this other task is in the middle of its own pfm_context_exit() because it would alreayd
- * be out of the task list. Note that this case is very unlikely between a direct child
- * and its parents (if it is the notified process) because of the way the exit is notified
- * via SIGCHLD.
+ * by the time we get here, the task is detached from the tasklist. This is important
+ * because it means that no other tasks can ever find it as a notified task, therfore there
+ * is no race condition between this code and let's say a pfm_context_create().
+ * Conversely, the pfm_cleanup_notifiers() cannot try to access a task's pfm context if this
+ * other task is in the middle of its own pfm_context_exit() because it would already be out of
+ * the task list. Note that this case is very unlikely between a direct child and its parents
+ * (if it is the notified process) because of the way the exit is notified via SIGCHLD.
  */
+
 void
 release_thread (struct task_struct *task)
 {
@@ -462,6 +516,12 @@
 
 	if (atomic_read(&task->thread.pfm_notifiers_check) > 0)
 		pfm_cleanup_notifiers(task);
+
+	if (atomic_read(&task->thread.pfm_owners_check) > 0)
+		pfm_cleanup_owners(task);
+
+	if (task->thread.pfm_smpl_buf_list)
+		pfm_cleanup_smpl_buf(task);
 }
 #endif
 
@@ -477,21 +537,13 @@
 		ia64_set_fpu_owner(0);
 #endif
 #ifdef CONFIG_PERFMON
-       /* stop monitoring */
-	if ((current->thread.flags & IA64_THREAD_PM_VALID) != 0) {
-		/*
-		 * we cannot rely on switch_to() to save the PMU
-		 * context for the last time. There is a possible race
-		 * condition in SMP mode between the child and the
-		 * parent.  by explicitly saving the PMU context here
-		 * we garantee no race.  this call we also stop
-		 * monitoring
-		 */
+       /* if needed, stop monitoring and flush state to perfmon context */
+	if (current->thread.pfm_context) 
 		pfm_flush_regs(current);
-		/*
-		 * make sure that switch_to() will not save context again
-		 */
-		current->thread.flags &= ~IA64_THREAD_PM_VALID;
+
+	/* free debug register resources */
+	if ((current->thread.flags & IA64_THREAD_DBG_VALID) != 0) {
+		pfm_release_debug_registers(current);
 	}
 #endif
 }
diff -Nru linux/arch/ia64/kernel/ptrace.c linux-2.4.19-pre5-mjc/arch/ia64/kernel/ptrace.c
--- linux/arch/ia64/kernel/ptrace.c	Wed Nov 21 14:04:18 2001
+++ linux-2.4.19-pre5-mjc/arch/ia64/kernel/ptrace.c	Sat Apr  6 08:26:00 2002
@@ -1,7 +1,7 @@
 /*
  * Kernel support for the ptrace() and syscall tracing interfaces.
  *
- * Copyright (C) 1999-2001 Hewlett-Packard Co
+ * Copyright (C) 1999-2002 Hewlett-Packard Co
  *	David Mosberger-Tang <davidm@hpl.hp.com>
  *
  * Derived from the x86 and Alpha versions.  Most of the code in here
@@ -23,6 +23,9 @@
 #include <asm/system.h>
 #include <asm/uaccess.h>
 #include <asm/unwind.h>
+#ifdef CONFIG_PERFMON
+# include <asm/perfmon.h>
+#endif
 
 /*
  * Bits in the PSR that we allow ptrace() to change:
@@ -755,11 +758,6 @@
 	} else {
 		/* access debug registers */
 
-		if (!(child->thread.flags & IA64_THREAD_DBG_VALID)) {
-			child->thread.flags |= IA64_THREAD_DBG_VALID;
-			memset(child->thread.dbr, 0, sizeof(child->thread.dbr));
-			memset(child->thread.ibr, 0, sizeof(child->thread.ibr));
-		}
 		if (addr >= PT_IBR) {
 			regnum = (addr - PT_IBR) >> 3;
 			ptr = &child->thread.ibr[0];
@@ -772,6 +770,30 @@
 			dprintk("ptrace: rejecting access to register address 0x%lx\n", addr);
 			return -1;
 		}
+#ifdef CONFIG_PERFMON
+		/*
+		 * Check if debug registers are used by perfmon. This test must be done
+		 * once we know that we can do the operation, i.e. the arguments are all
+		 * valid, but before we start modifying the state.
+		 *
+		 * Perfmon needs to keep a count of how many processes are trying to
+		 * modify the debug registers for system wide monitoring sessions.
+		 *
+		 * We also include read access here, because they may cause the
+		 * PMU-installed debug register state (dbr[], ibr[]) to be reset. The two
+		 * arrays are also used by perfmon, but we do not use
+		 * IA64_THREAD_DBG_VALID. The registers are restored by the PMU context
+		 * switch code.
+		 */
+		if (pfm_use_debug_registers(child))
+			return -1;
+#endif
+
+		if (!(child->thread.flags & IA64_THREAD_DBG_VALID)) {
+			child->thread.flags |= IA64_THREAD_DBG_VALID;
+			memset(child->thread.dbr, 0, sizeof(child->thread.dbr));
+			memset(child->thread.ibr, 0, sizeof(child->thread.ibr));
+		}
 
 		ptr += regnum;
 
@@ -789,6 +811,260 @@
 	return 0;
 }
 
+static long
+ptrace_getregs (struct task_struct *child, struct pt_all_user_regs *ppr)
+{
+	struct switch_stack *sw;
+	struct pt_regs *pt;
+	long ret, retval;
+	struct unw_frame_info info;
+	char nat = 0;
+	int i;
+
+	retval = verify_area(VERIFY_WRITE, ppr, sizeof(struct pt_all_user_regs));
+	if (retval != 0) {
+		return -EIO;
+	}
+
+	pt = ia64_task_regs(child);
+	sw = (struct switch_stack *) (child->thread.ksp + 16);
+	unw_init_from_blocked_task(&info, child);
+	if (unw_unwind_to_user(&info) < 0) {
+		return -EIO;
+	}
+
+	if (((unsigned long) ppr & 0x7) != 0) {
+		dprintk("ptrace:unaligned register address %p\n", ppr);
+		return -EIO;
+	}
+
+	retval = 0;
+
+	/* control regs */
+
+	retval |= __put_user(pt->cr_iip, &ppr->cr_iip);
+	retval |= access_uarea(child, PT_CR_IPSR, &ppr->cr_ipsr, 0);
+
+	/* app regs */
+
+	retval |= __put_user(pt->ar_pfs, &ppr->ar[PT_AUR_PFS]);
+	retval |= __put_user(pt->ar_rsc, &ppr->ar[PT_AUR_RSC]);
+	retval |= __put_user(pt->ar_bspstore, &ppr->ar[PT_AUR_BSPSTORE]);
+	retval |= __put_user(pt->ar_unat, &ppr->ar[PT_AUR_UNAT]);
+	retval |= __put_user(pt->ar_ccv, &ppr->ar[PT_AUR_CCV]);
+	retval |= __put_user(pt->ar_fpsr, &ppr->ar[PT_AUR_FPSR]);
+
+	retval |= access_uarea(child, PT_AR_EC, &ppr->ar[PT_AUR_EC], 0);
+	retval |= access_uarea(child, PT_AR_LC, &ppr->ar[PT_AUR_LC], 0);
+	retval |= access_uarea(child, PT_AR_RNAT, &ppr->ar[PT_AUR_RNAT], 0);
+	retval |= access_uarea(child, PT_AR_BSP, &ppr->ar[PT_AUR_BSP], 0);
+	retval |= access_uarea(child, PT_CFM, &ppr->cfm, 0);
+
+	/* gr1-gr3 */
+
+	retval |= __copy_to_user(&ppr->gr[1], &pt->r1, sizeof(long) * 3);
+
+	/* gr4-gr7 */
+
+	for (i = 4; i < 8; i++) {
+		retval |= unw_access_gr(&info, i, &ppr->gr[i], &nat, 0);
+	}
+
+	/* gr8-gr11 */
+
+	retval |= __copy_to_user(&ppr->gr[8], &pt->r8, sizeof(long) * 4);
+
+	/* gr12-gr15 */
+
+	retval |= __copy_to_user(&ppr->gr[12], &pt->r12, sizeof(long) * 4);
+
+	/* gr16-gr31 */
+
+	retval |= __copy_to_user(&ppr->gr[16], &pt->r16, sizeof(long) * 16);
+
+	/* b0 */
+
+	retval |= __put_user(pt->b0, &ppr->br[0]);
+
+	/* b1-b5 */
+
+	for (i = 1; i < 6; i++) {
+		retval |= unw_access_br(&info, i, &ppr->br[i], 0);
+	}
+
+	/* b6-b7 */
+
+	retval |= __put_user(pt->b6, &ppr->br[6]);
+	retval |= __put_user(pt->b7, &ppr->br[7]);
+
+	/* fr2-fr5 */
+
+	for (i = 2; i < 6; i++) {
+		retval |= access_fr(&info, i, 0, (unsigned long *) &ppr->fr[i], 0);
+		retval |= access_fr(&info, i, 1, (unsigned long *) &ppr->fr[i] + 1, 0);
+	}
+
+	/* fr6-fr9 */
+
+	retval |= __copy_to_user(&ppr->fr[6], &pt->f6, sizeof(struct ia64_fpreg) * 4);
+
+	/* fp scratch regs(10-15) */
+
+	retval |= __copy_to_user(&ppr->fr[10], &sw->f10, sizeof(struct ia64_fpreg) * 6);
+
+	/* fr16-fr31 */
+
+	for (i = 16; i < 32; i++) {
+		retval |= access_fr(&info, i, 0, (unsigned long *) &ppr->fr[i], 0);
+		retval |= access_fr(&info, i, 1, (unsigned long *) &ppr->fr[i] + 1, 0);
+	}
+
+	/* fph */
+
+	ia64_flush_fph(child);
+	retval |= __copy_to_user(&ppr->fr[32], &child->thread.fph, sizeof(ppr->fr[32]) * 96);
+
+	/* preds */
+
+	retval |= __put_user(pt->pr, &ppr->pr);
+
+	/* nat bits */
+
+	retval |= access_uarea(child, PT_NAT_BITS, &ppr->nat, 0);
+
+	ret = retval ? -EIO : 0;
+	return ret;
+}
+
+static long
+ptrace_setregs (struct task_struct *child, struct pt_all_user_regs *ppr)
+{
+	struct switch_stack *sw;
+	struct pt_regs *pt;
+	long ret, retval;
+	struct unw_frame_info info;
+	char nat = 0;
+	int i;
+
+	retval = verify_area(VERIFY_READ, ppr, sizeof(struct pt_all_user_regs));
+	if (retval != 0) {
+		return -EIO;
+	}
+
+	pt = ia64_task_regs(child);
+	sw = (struct switch_stack *) (child->thread.ksp + 16);
+	unw_init_from_blocked_task(&info, child);
+	if (unw_unwind_to_user(&info) < 0) {
+		return -EIO;
+	}
+
+	if (((unsigned long) ppr & 0x7) != 0) {
+		dprintk("ptrace:unaligned register address %p\n", ppr);
+		return -EIO;
+	}
+
+	retval = 0;
+
+	/* control regs */
+
+	retval |= __get_user(pt->cr_iip, &ppr->cr_iip);
+	retval |= access_uarea(child, PT_CR_IPSR, &ppr->cr_ipsr, 1);
+
+	/* app regs */
+
+	retval |= __get_user(pt->ar_pfs, &ppr->ar[PT_AUR_PFS]);
+	retval |= __get_user(pt->ar_rsc, &ppr->ar[PT_AUR_RSC]);
+	retval |= __get_user(pt->ar_bspstore, &ppr->ar[PT_AUR_BSPSTORE]);
+	retval |= __get_user(pt->ar_unat, &ppr->ar[PT_AUR_UNAT]);
+	retval |= __get_user(pt->ar_ccv, &ppr->ar[PT_AUR_CCV]);
+	retval |= __get_user(pt->ar_fpsr, &ppr->ar[PT_AUR_FPSR]);
+
+	retval |= access_uarea(child, PT_AR_EC, &ppr->ar[PT_AUR_EC], 1);
+	retval |= access_uarea(child, PT_AR_LC, &ppr->ar[PT_AUR_LC], 1);
+	retval |= access_uarea(child, PT_AR_RNAT, &ppr->ar[PT_AUR_RNAT], 1);
+	retval |= access_uarea(child, PT_AR_BSP, &ppr->ar[PT_AUR_BSP], 1);
+	retval |= access_uarea(child, PT_CFM, &ppr->cfm, 1);
+
+	/* gr1-gr3 */
+
+	retval |= __copy_from_user(&pt->r1, &ppr->gr[1], sizeof(long) * 3);
+
+	/* gr4-gr7 */
+
+	for (i = 4; i < 8; i++) {
+		long ret = unw_get_gr(&info, i, &ppr->gr[i], &nat);
+		if (ret < 0) {
+			return ret;
+		}
+		retval |= unw_access_gr(&info, i, &ppr->gr[i], &nat, 1);
+	}
+
+	/* gr8-gr11 */
+
+	retval |= __copy_from_user(&pt->r8, &ppr->gr[8], sizeof(long) * 4);
+
+	/* gr12-gr15 */
+
+	retval |= __copy_from_user(&pt->r12, &ppr->gr[12], sizeof(long) * 4);
+
+	/* gr16-gr31 */
+
+	retval |= __copy_from_user(&pt->r16, &ppr->gr[16], sizeof(long) * 16);
+
+	/* b0 */
+
+	retval |= __get_user(pt->b0, &ppr->br[0]);
+
+	/* b1-b5 */
+
+	for (i = 1; i < 6; i++) {
+		retval |= unw_access_br(&info, i, &ppr->br[i], 1);
+	}
+
+	/* b6-b7 */
+
+	retval |= __get_user(pt->b6, &ppr->br[6]);
+	retval |= __get_user(pt->b7, &ppr->br[7]);
+
+	/* fr2-fr5 */
+
+	for (i = 2; i < 6; i++) {
+		retval |= access_fr(&info, i, 0, (unsigned long *) &ppr->fr[i], 1);
+		retval |= access_fr(&info, i, 1, (unsigned long *) &ppr->fr[i] + 1, 1);
+	}
+
+	/* fr6-fr9 */
+
+	retval |= __copy_from_user(&pt->f6, &ppr->fr[6], sizeof(ppr->fr[6]) * 4);
+
+	/* fp scratch regs(10-15) */
+
+	retval |= __copy_from_user(&sw->f10, &ppr->fr[10], sizeof(ppr->fr[10]) * 6);
+
+	/* fr16-fr31 */
+
+	for (i = 16; i < 32; i++) {
+		retval |= access_fr(&info, i, 0, (unsigned long *) &ppr->fr[i], 1);
+		retval |= access_fr(&info, i, 1, (unsigned long *) &ppr->fr[i] + 1, 1);
+	}
+
+	/* fph */
+
+	ia64_sync_fph(child);
+	retval |= __copy_from_user(&child->thread.fph, &ppr->fr[32], sizeof(ppr->fr[32]) * 96);
+
+	/* preds */
+
+	retval |= __get_user(pt->pr, &ppr->pr);
+
+	/* nat bits */
+
+	retval |= access_uarea(child, PT_NAT_BITS, &ppr->nat, 1);
+
+	ret = retval ? -EIO : 0;
+	return ret;
+}
+
 /*
  * Called by kernel/ptrace.c when detaching..
  *
@@ -977,6 +1253,14 @@
 
 	      case PTRACE_DETACH:		/* detach a process that was attached. */
 		ret = ptrace_detach(child, data);
+		goto out_tsk;
+
+	      case PTRACE_GETREGS:
+		ret = ptrace_getregs(child, (struct pt_all_user_regs*) data);
+		goto out_tsk;
+
+	      case PTRACE_SETREGS:
+		ret = ptrace_setregs(child, (struct pt_all_user_regs*) data);
 		goto out_tsk;
 
 	      default:
diff -Nru linux/arch/ia64/kernel/sal.c linux-2.4.19-pre5-mjc/arch/ia64/kernel/sal.c
--- linux/arch/ia64/kernel/sal.c	Fri Nov  9 17:26:17 2001
+++ linux-2.4.19-pre5-mjc/arch/ia64/kernel/sal.c	Sat Apr  6 08:26:00 2002
@@ -18,7 +18,8 @@
 #include <asm/sal.h>
 #include <asm/pal.h>
 
-spinlock_t sal_lock = SPIN_LOCK_UNLOCKED;
+spinlock_t sal_lock __cacheline_aligned = SPIN_LOCK_UNLOCKED;
+unsigned long sal_platform_features;
 
 static struct {
 	void *addr;	/* function entry point */
@@ -76,7 +77,7 @@
 	return str;
 }
 
-static void __init 
+static void __init
 ia64_sal_handler_init (void *entry_point, void *gpval)
 {
 	/* fill in the SAL procedure descriptor and point ia64_sal to it: */
@@ -102,7 +103,7 @@
 	if (strncmp(systab->signature, "SST_", 4) != 0)
 		printk("bad signature in system table!");
 
-	/* 
+	/*
 	 * revisions are coded in BCD, so %x does the job for us
 	 */
 	printk("SAL v%x.%02x: oem=%.32s, product=%.32s\n",
@@ -152,12 +153,12 @@
 		      case SAL_DESC_PLATFORM_FEATURE:
 		      {
 			      struct ia64_sal_desc_platform_feature *pf = (void *) p;
+			      sal_platform_features = pf->feature_mask;
 			      printk("SAL: Platform features ");
 
-			      if (pf->feature_mask & (1 << 0))
+			      if (pf->feature_mask & IA64_SAL_PLATFORM_FEATURE_BUS_LOCK)
 				      printk("BusLock ");
-
-			      if (pf->feature_mask & (1 << 1)) {
+			      if (pf->feature_mask & IA64_SAL_PLATFORM_FEATURE_IRQ_REDIR_HINT) {
 				      printk("IRQ_Redirection ");
 #ifdef CONFIG_SMP
 				      if (no_int_routing)
@@ -166,15 +167,17 @@
 					      smp_int_redirect |= SMP_IRQ_REDIRECTION;
 #endif
 			      }
-			      if (pf->feature_mask & (1 << 2)) {
+			      if (pf->feature_mask & IA64_SAL_PLATFORM_FEATURE_IPI_REDIR_HINT) {
 				      printk("IPI_Redirection ");
 #ifdef CONFIG_SMP
-				      if (no_int_routing) 
+				      if (no_int_routing)
 					      smp_int_redirect &= ~SMP_IPI_REDIRECTION;
 				      else
 					      smp_int_redirect |= SMP_IPI_REDIRECTION;
 #endif
 			      }
+			      if (pf->feature_mask & IA64_SAL_PLATFORM_FEATURE_ITC_DRIFT)
+				      printk("ITC_Drift ");
 			      printk("\n");
 			      break;
  		      }
diff -Nru linux/arch/ia64/kernel/setup.c linux-2.4.19-pre5-mjc/arch/ia64/kernel/setup.c
--- linux/arch/ia64/kernel/setup.c	Tue Nov 13 12:01:16 2001
+++ linux-2.4.19-pre5-mjc/arch/ia64/kernel/setup.c	Sat Apr  6 08:26:00 2002
@@ -3,7 +3,7 @@
  *
  * Copyright (C) 1998-2001 Hewlett-Packard Co
  *	David Mosberger-Tang <davidm@hpl.hp.com>
- * Copyright (C) 1998, 1999, 2001 Stephane Eranian <eranian@hpl.hp.com>
+ *	Stephane Eranian <eranian@hpl.hp.com>
  * Copyright (C) 2000, Rohit Seth <rohit.seth@intel.com>
  * Copyright (C) 1999 VA Linux Systems
  * Copyright (C) 1999 Walt Drummond <drummond@valinux.com>
@@ -147,6 +147,10 @@
 }
 
 
+/*
+ * Find a place to put the bootmap and return its starting address in bootmap_start.
+ * This address must be page-aligned.
+ */
 static int
 find_bootmap_location (unsigned long start, unsigned long end, void *arg)
 {
@@ -165,7 +169,7 @@
 
 	for (i = 0; i < num_rsvd_regions; i++) {
 		range_start = MAX(start, free_start);
-		range_end   = MIN(end, rsvd_region[i].start);
+		range_end   = MIN(end, rsvd_region[i].start & PAGE_MASK);
 
 		if (range_end <= range_start) continue;	/* skip over empty range */
 
@@ -177,7 +181,7 @@
 		/* nothing more available in this segment */
 		if (range_end == end) return 0;
 
-		free_start = rsvd_region[i].end;
+		free_start = PAGE_ALIGN(rsvd_region[i].end);
 	}
 	return 0;
 }
@@ -306,6 +310,10 @@
 	/* process SAL system table: */
 	ia64_sal_init(efi.sal_systab);
 
+#ifdef CONFIG_IA64_GENERIC
+	machvec_init(acpi_get_sysname());
+#endif
+
 	/*
 	 *  Set `iobase' to the appropriate address in region 6
 	 *    (uncached access range)
@@ -332,10 +340,6 @@
 
 	cpu_init();	/* initialize the bootstrap CPU */
 
-#ifdef CONFIG_IA64_GENERIC
-	machvec_init(acpi_get_sysname());
-#endif
-
 	if (efi.acpi20) {
 		/* Parse the ACPI 2.0 tables */
 		acpi20_parse(efi.acpi20);
@@ -371,17 +375,14 @@
 {
 #ifdef CONFIG_SMP
 #	define lpj	c->loops_per_jiffy
+#	define cpu	c->processor
 #else
 #	define lpj	loops_per_jiffy
+#	define cpu	0
 #endif
 	char family[32], features[128], *cp;
 	struct cpuinfo_ia64 *c = v;
-	unsigned long mask, cpu = c - cpu_data(0);
-
-#ifdef CONFIG_SMP
-	if (!(cpu_online_map & (1 << cpu)))
-		return 0;
-#endif
+	unsigned long mask;
 
 	mask = c->features;
 
@@ -403,7 +404,7 @@
 		sprintf(cp, " 0x%lx", mask);
 
 	seq_printf(m,
-		   "processor  : %lu\n"
+		   "processor  : %d\n"
 		   "vendor     : %s\n"
 		   "arch       : IA-64\n"
 		   "family     : %s\n"
@@ -427,6 +428,10 @@
 static void *
 c_start (struct seq_file *m, loff_t *pos)
 {
+#ifdef CONFIG_SMP
+	while (*pos < NR_CPUS && !(cpu_online_map & (1 << *pos)))
+		++*pos;
+#endif
 	return *pos < NR_CPUS ? cpu_data(*pos) : NULL;
 }
 
@@ -483,6 +488,9 @@
 		cpuid.bits[i] = ia64_get_cpuid(i);
 
 	memcpy(c->vendor, cpuid.field.vendor, 16);
+#ifdef CONFIG_SMP
+	c->processor = smp_processor_id();
+#endif
 	c->ppn = cpuid.field.ppn;
 	c->number = cpuid.field.number;
 	c->revision = cpuid.field.revision;
@@ -534,7 +542,7 @@
 				= alloc_bootmem_pages_node(NODE_DATA(numa_node_id()),
 							   sizeof(struct cpuinfo_ia64));
 		for (cpu = 1; cpu < NR_CPUS; ++cpu)
-			memcpy(my_cpu_data->cpu_data[cpu]->cpu_data_ptrs,
+			memcpy(my_cpu_data->cpu_data[cpu]->cpu_data,
 			       my_cpu_data->cpu_data, sizeof(my_cpu_data->cpu_data));
 	} else {
 		order = get_order(sizeof(struct cpuinfo_ia64));
@@ -616,4 +624,6 @@
 		num_phys_stacked = 96;
 	}
 	local_cpu_data->phys_stacked_size_p8 = num_phys_stacked*8 + 8;
+
+	platform_cpu_init();
 }
diff -Nru linux/arch/ia64/kernel/signal.c linux-2.4.19-pre5-mjc/arch/ia64/kernel/signal.c
--- linux/arch/ia64/kernel/signal.c	Fri Nov  9 17:26:17 2001
+++ linux-2.4.19-pre5-mjc/arch/ia64/kernel/signal.c	Sat Apr  6 08:26:00 2002
@@ -1,7 +1,7 @@
 /*
  * Architecture-specific signal handling support.
  *
- * Copyright (C) 1999-2001 Hewlett-Packard Co
+ * Copyright (C) 1999-2002 Hewlett-Packard Co
  *	David Mosberger-Tang <davidm@hpl.hp.com>
  *
  * Derived from i386 and Alpha versions.
@@ -160,6 +160,7 @@
 		err |= __put_user((short)from->si_code, &to->si_code);
 		switch (from->si_code >> 16) {
 		      case __SI_FAULT >> 16:
+			err |= __put_user(from->si_flags, &to->si_flags);
 			err |= __put_user(from->si_isr, &to->si_isr);
 		      case __SI_POLL >> 16:
 			err |= __put_user(from->si_addr, &to->si_addr);
@@ -172,7 +173,12 @@
 		      case __SI_PROF >> 16:
 			err |= __put_user(from->si_uid, &to->si_uid);
 			err |= __put_user(from->si_pid, &to->si_pid);
-			err |= __put_user(from->si_pfm_ovfl, &to->si_pfm_ovfl);
+			if (from->si_code == PROF_OVFL) {
+				err |= __put_user(from->si_pfm_ovfl[0], &to->si_pfm_ovfl[0]);
+				err |= __put_user(from->si_pfm_ovfl[1], &to->si_pfm_ovfl[1]);
+				err |= __put_user(from->si_pfm_ovfl[2], &to->si_pfm_ovfl[2]);
+				err |= __put_user(from->si_pfm_ovfl[3], &to->si_pfm_ovfl[3]);
+			}
 			break;
 		      default:
 			err |= __put_user(from->si_uid, &to->si_uid);
@@ -578,10 +584,7 @@
 				/* FALLTHRU */
 
 			      default:
-				sigaddset(&current->pending.signal, signr);
-				recalc_sigpending(current);
-				current->flags |= PF_SIGNALED;
-				do_exit(exit_code);
+				sig_exit(signr, exit_code, &info);
 				/* NOTREACHED */
 			}
 		}
diff -Nru linux/arch/ia64/kernel/smpboot.c linux-2.4.19-pre5-mjc/arch/ia64/kernel/smpboot.c
--- linux/arch/ia64/kernel/smpboot.c	Wed Nov 21 13:31:09 2001
+++ linux-2.4.19-pre5-mjc/arch/ia64/kernel/smpboot.c	Sat Apr  6 08:26:00 2002
@@ -416,9 +416,9 @@
 	if (!idle)
 		panic("No idle process for CPU %d", cpu);
 
-	idle->processor = cpu;
+	task_set_cpu(idle, cpu);	/* we schedule the first task manually */
+
 	ia64_cpu_to_sapicid[cpu] = sapicid;
-	idle->cpus_runnable = 1 << cpu; /* we schedule the first task manually */
 
 	del_from_runqueue(idle);
 	unhash_process(idle);
diff -Nru linux/arch/ia64/kernel/traps.c linux-2.4.19-pre5-mjc/arch/ia64/kernel/traps.c
--- linux/arch/ia64/kernel/traps.c	Fri Nov  9 17:26:17 2001
+++ linux-2.4.19-pre5-mjc/arch/ia64/kernel/traps.c	Sat Apr  6 08:26:00 2002
@@ -1,7 +1,7 @@
 /*
  * Architecture-specific trap handling.
  *
- * Copyright (C) 1998-2001 Hewlett-Packard Co
+ * Copyright (C) 1998-2002 Hewlett-Packard Co
  *	David Mosberger-Tang <davidm@hpl.hp.com>
  *
  * 05/12/00 grao <goutham.rao@intel.com> : added isr in siginfo for SIGFPE
@@ -133,6 +133,8 @@
 	/* SIGILL, SIGFPE, SIGSEGV, and SIGBUS want these field initialized: */
 	siginfo.si_addr = (void *) (regs->cr_iip + ia64_psr(regs)->ri);
 	siginfo.si_imm = break_num;
+	siginfo.si_flags = 0;		/* clear __ISR_VALID */
+	siginfo.si_isr = 0;
 
 	switch (break_num) {
 	      case 0: /* unknown error */
@@ -352,6 +354,8 @@
 				siginfo.si_code = FPE_FLTDIV;
 			}
 			siginfo.si_isr = isr;
+			siginfo.si_flags = __ISR_VALID;
+			siginfo.si_imm = 0;
 			force_sig_info(SIGFPE, &siginfo, current);
 		}
 	} else {
@@ -372,6 +376,8 @@
 				siginfo.si_code = FPE_FLTRES;
 			}
 			siginfo.si_isr = isr;
+			siginfo.si_flags = __ISR_VALID;
+			siginfo.si_imm = 0;
 			force_sig_info(SIGFPE, &siginfo, current);
 		}
 	}
@@ -490,6 +496,8 @@
 			siginfo.si_errno = 0;
 			siginfo.si_addr = (void *) (regs->cr_iip + ia64_psr(regs)->ri);
 			siginfo.si_imm = vector;
+			siginfo.si_flags = __ISR_VALID;
+			siginfo.si_isr = isr;
 			force_sig_info(SIGILL, &siginfo, current);
 			return;
 		}
@@ -517,6 +525,10 @@
 		}
 		siginfo.si_signo = SIGTRAP;
 		siginfo.si_errno = 0;
+		siginfo.si_flags = 0;
+		siginfo.si_isr = 0;
+		siginfo.si_addr = 0;
+		siginfo.si_imm = 0;
 		force_sig_info(SIGTRAP, &siginfo, current);
 		return;
 
@@ -528,6 +540,9 @@
 			siginfo.si_errno = 0;
 			siginfo.si_code = FPE_FLTINV;
 			siginfo.si_addr = (void *) (regs->cr_iip + ia64_psr(regs)->ri);
+			siginfo.si_flags = __ISR_VALID;
+			siginfo.si_isr = isr;
+			siginfo.si_imm = 0;
 			force_sig_info(SIGFPE, &siginfo, current);
 		}
 		return;
@@ -537,6 +552,9 @@
 			siginfo.si_signo = SIGILL;
 			siginfo.si_code = ILL_BADIADDR;
 			siginfo.si_errno = 0;
+			siginfo.si_flags = 0;
+			siginfo.si_isr = 0;
+			siginfo.si_imm = 0;
 			siginfo.si_addr = (void *) (regs->cr_iip + ia64_psr(regs)->ri);
 			force_sig_info(SIGILL, &siginfo, current);
 			return;
diff -Nru linux/arch/ia64/kernel/unaligned.c linux-2.4.19-pre5-mjc/arch/ia64/kernel/unaligned.c
--- linux/arch/ia64/kernel/unaligned.c	Fri Nov  9 17:26:17 2001
+++ linux-2.4.19-pre5-mjc/arch/ia64/kernel/unaligned.c	Sat Apr  6 08:26:00 2002
@@ -1,9 +1,9 @@
 /*
  * Architecture-specific unaligned trap handling.
  *
- * Copyright (C) 1999-2001 Hewlett-Packard Co
- * Copyright (C) 1999-2000 Stephane Eranian <eranian@hpl.hp.com>
- * Copyright (C) 2001 David Mosberger-Tang <davidm@hpl.hp.com>
+ * Copyright (C) 1999-2002 Hewlett-Packard Co
+ *	Stephane Eranian <eranian@hpl.hp.com>
+ *	David Mosberger-Tang <davidm@hpl.hp.com>
  *
  * 2001/10/11	Fix unaligned access to rotating registers in s/w pipelined loops.
  * 2001/08/13	Correct size of extended floats (float_fsz) from 16 to 10 bytes.
@@ -23,7 +23,7 @@
 #undef DEBUG_UNALIGNED_TRAP
 
 #ifdef DEBUG_UNALIGNED_TRAP
-# define DPRINT(a...)	do { printk("%s.%u: ", __FUNCTION__, __LINE__); printk (a); } while (0)
+# define DPRINT(a...)	do { printk("%s %u: ", __FUNCTION__, __LINE__); printk (a); } while (0)
 # define DDUMP(str,vp,len)	dump(str, vp, len)
 
 static void
@@ -650,7 +650,7 @@
 	 * just in case.
 	 */
 	if (ld.x6_op == 1 || ld.x6_op == 3) {
-		printk(KERN_ERR __FUNCTION__": register update on speculative load, error\n");
+		printk("%s %s: register update on speculative load, error\n", KERN_ERR, __FUNCTION__);
 		die_if_kernel("unaligned reference on specualtive load with register update\n",
 			      regs, 30);
 	}
@@ -1080,8 +1080,8 @@
 		 * For this reason we keep this sanity check
 		 */
 		if (ld.x6_op == 1 || ld.x6_op == 3)
-			printk(KERN_ERR __FUNCTION__": register update on speculative load pair, "
-			       "error\n");
+			printk("%s %s: register update on speculative load pair, "
+			       "error\n",KERN_ERR, __FUNCTION__);
 
 		setreg(ld.r3, ifa, 0, regs);
 	}
@@ -1488,6 +1488,9 @@
 	si.si_errno = 0;
 	si.si_code = BUS_ADRALN;
 	si.si_addr = (void *) ifa;
+	si.si_flags = 0;
+	si.si_isr = 0;
+	si.si_imm = 0;
 	force_sig_info(SIGBUS, &si, current);
 	goto done;
 }
diff -Nru linux/arch/ia64/kernel/unwind.c linux-2.4.19-pre5-mjc/arch/ia64/kernel/unwind.c
--- linux/arch/ia64/kernel/unwind.c	Fri Nov  9 17:26:17 2001
+++ linux-2.4.19-pre5-mjc/arch/ia64/kernel/unwind.c	Sat Apr  6 08:26:00 2002
@@ -1,6 +1,6 @@
 /*
- * Copyright (C) 1999-2001 Hewlett-Packard Co
- * Copyright (C) 1999-2001 David Mosberger-Tang <davidm@hpl.hp.com>
+ * Copyright (C) 1999-2002 Hewlett-Packard Co
+ *	David Mosberger-Tang <davidm@hpl.hp.com>
  */
 /*
  * This file implements call frame unwind support for the Linux
@@ -72,6 +72,8 @@
 
 #define alloc_reg_state()	kmalloc(sizeof(struct unw_state_record), GFP_ATOMIC)
 #define free_reg_state(usr)	kfree(usr)
+#define alloc_labeled_state()	kmalloc(sizeof(struct unw_labeled_state), GFP_ATOMIC)
+#define free_labeled_state(usr)	kfree(usr)
 
 typedef unsigned long unw_word;
 typedef unsigned char unw_hash_index_t;
@@ -521,7 +523,7 @@
 }
 
 
-/* Unwind decoder routines */
+/* Routines to manipulate the state stack.  */
 
 static inline void
 push (struct unw_state_record *sr)
@@ -534,24 +536,60 @@
 		return;
 	}
 	memcpy(rs, &sr->curr, sizeof(*rs));
-	rs->next = sr->stack;
-	sr->stack = rs;
+	sr->curr.next = rs;
 }
 
 static void
 pop (struct unw_state_record *sr)
 {
-	struct unw_reg_state *rs;
+	struct unw_reg_state *rs = sr->curr.next;
 
-	if (!sr->stack) {
-		printk ("unwind: stack underflow!\n");
+	if (!rs) {
+		printk("unwind: stack underflow!\n");
 		return;
 	}
-	rs = sr->stack;
-	sr->stack = rs->next;
+	memcpy(&sr->curr, rs, sizeof(*rs));
 	free_reg_state(rs);
 }
 
+/* Make a copy of the state stack.  Non-recursive to avoid stack overflows.  */
+static struct unw_reg_state *
+dup_state_stack (struct unw_reg_state *rs)
+{
+	struct unw_reg_state *copy, *prev = NULL, *first = NULL;
+
+	while (rs) {
+		copy = alloc_reg_state();
+		if (!copy) {
+			printk ("unwind.dup_state_stack: out of memory\n");
+			return NULL;
+		}
+		memcpy(copy, rs, sizeof(*copy));
+		if (first)
+			prev->next = copy;
+		else
+			first = copy;
+		rs = rs->next;
+		prev = copy;
+	}
+	return first;
+}
+
+/* Free all stacked register states (but not RS itself).  */
+static void
+free_state_stack (struct unw_reg_state *rs)
+{
+	struct unw_reg_state *p, *next;
+
+	for (p = rs->next; p != NULL; p = next) {
+		next = p->next;
+		free_reg_state(p);
+	}
+	rs->next = NULL;
+}
+
+/* Unwind decoder routines */
+
 static enum unw_register_index __attribute__((const))
 decode_abreg (unsigned char abreg, int memory)
 {
@@ -689,7 +727,7 @@
 	sr->first_region = 0;
 
 	/* check if we're done: */
-	if (body && sr->when_target < sr->region_start + sr->region_len) {
+	if (sr->when_target < sr->region_start + sr->region_len) {
 		sr->done = 1;
 		return;
 	}
@@ -902,31 +940,36 @@
 static inline void
 desc_copy_state (unw_word label, struct unw_state_record *sr)
 {
-	struct unw_reg_state *rs;
+	struct unw_labeled_state *ls;
 
-	for (rs = sr->reg_state_list; rs; rs = rs->next) {
-		if (rs->label == label) {
-			memcpy (&sr->curr, rs, sizeof(sr->curr));
+	for (ls = sr->labeled_states; ls; ls = ls->next) {
+		if (ls->label == label) {
+			free_state_stack(&sr->curr);
+			memcpy(&sr->curr, &ls->saved_state, sizeof(sr->curr));
+			sr->curr.next = dup_state_stack(ls->saved_state.next);
 			return;
 		}
 	}
-	printk("unwind: failed to find state labelled 0x%lx\n", label);
+	printk("unwind: failed to find state labeled 0x%lx\n", label);
 }
 
 static inline void
 desc_label_state (unw_word label, struct unw_state_record *sr)
 {
-	struct unw_reg_state *rs;
+	struct unw_labeled_state *ls;
 
-	rs = alloc_reg_state();
-	if (!rs) {
-		printk("unwind: cannot stack!\n");
+	ls = alloc_labeled_state();
+	if (!ls) {
+		printk("unwind.desc_label_state(): out of memory\n");
 		return;
 	}
-	memcpy(rs, &sr->curr, sizeof(*rs));
-	rs->label = label;
-	rs->next = sr->reg_state_list;
-	sr->reg_state_list = rs;
+	ls->label = label;
+	memcpy(&ls->saved_state, &sr->curr, sizeof(ls->saved_state));
+	ls->saved_state.next = dup_state_stack(sr->curr.next);
+
+	/* insert into list of labeled states: */
+	ls->next = sr->labeled_states;
+	sr->labeled_states = ls;
 }
 
 /*
@@ -1378,6 +1421,8 @@
 		else
 			break;
 	}
+	if (rel_ip < e->start_offset || rel_ip >= e->end_offset)
+		return NULL;
 	return e;
 }
 
@@ -1388,9 +1433,9 @@
 static inline struct unw_script *
 build_script (struct unw_frame_info *info)
 {
-	struct unw_reg_state *rs, *next;
 	const struct unw_table_entry *e = 0;
 	struct unw_script *script = 0;
+	struct unw_labeled_state *ls, *next;
 	unsigned long ip = info->ip;
 	struct unw_state_record sr;
 	struct unw_table *table;
@@ -1535,15 +1580,15 @@
 	for (i = UNW_REG_BSP; i < UNW_NUM_REGS; ++i)
 		compile_reg(&sr, i, script);
 
-	/* free labelled register states & stack: */
+	/* free labeled register states & stack: */
 
 	STAT(parse_start = ia64_get_itc());
-	for (rs = sr.reg_state_list; rs; rs = next) {
-		next = rs->next;
-		free_reg_state(rs);
+	for (ls = sr.labeled_states; ls; ls = next) {
+		next = ls->next;
+		free_state_stack(&ls->saved_state);
+		free_labeled_state(ls);
 	}
-	while (sr.stack)
-		pop(&sr);
+	free_state_stack(&sr.curr);
 	STAT(unw.stat.script.parse_time += ia64_get_itc() - parse_start);
 
 	script_finalize(script, &sr);
diff -Nru linux/arch/ia64/kernel/unwind_i.h linux-2.4.19-pre5-mjc/arch/ia64/kernel/unwind_i.h
--- linux/arch/ia64/kernel/unwind_i.h	Tue Jul 31 13:30:08 2001
+++ linux-2.4.19-pre5-mjc/arch/ia64/kernel/unwind_i.h	Sat Apr  6 08:26:00 2002
@@ -1,6 +1,6 @@
 /*
- * Copyright (C) 2000 Hewlett-Packard Co
- * Copyright (C) 2000 David Mosberger-Tang <davidm@hpl.hp.com>
+ * Copyright (C) 2000, 2002 Hewlett-Packard Co
+ *	David Mosberger-Tang <davidm@hpl.hp.com>
  *
  * Kernel unwind support.
  */
@@ -85,6 +85,17 @@
 	int when;			/* when the register gets saved */
 };
 
+struct unw_reg_state {
+	struct unw_reg_state *next;		/* next (outer) element on state stack */
+	struct unw_reg_info reg[UNW_NUM_REGS];	/* register save locations */
+};
+
+struct unw_labeled_state {
+	struct unw_labeled_state *next;		/* next labeled state (or NULL) */
+	unsigned long label;			/* label for this state */
+	struct unw_reg_state saved_state;
+};
+
 struct unw_state_record {
 	unsigned int first_region : 1;	/* is this the first region? */
 	unsigned int done : 1;		/* are we done scanning descriptors? */
@@ -105,11 +116,8 @@
 	u8 gr_save_loc;			/* next general register to use for saving a register */
 	u8 return_link_reg;		/* branch register in which the return link is passed */
 
-	struct unw_reg_state {
-		struct unw_reg_state *next;
-		unsigned long label;		/* label of this state record */
-		struct unw_reg_info reg[UNW_NUM_REGS];
-	} curr, *stack, *reg_state_list;
+	struct unw_labeled_state *labeled_states;	/* list of all labeled states */
+	struct unw_reg_state curr;	/* current state */
 };
 
 enum unw_nat_type {
diff -Nru linux/arch/ia64/lib/swiotlb.c linux-2.4.19-pre5-mjc/arch/ia64/lib/swiotlb.c
--- linux/arch/ia64/lib/swiotlb.c	Tue Nov 13 12:01:16 2001
+++ linux-2.4.19-pre5-mjc/arch/ia64/lib/swiotlb.c	Sat Apr  6 08:26:00 2002
@@ -27,11 +27,21 @@
 #define ALIGN(val, align) ((unsigned long)	\
 	(((unsigned long) (val) + ((align) - 1)) & ~((align) - 1)))
 
+#define OFFSET(val,align) ((unsigned long)	\
+	                   ( (val) & ( (align) - 1)))
+
 #define SG_ENT_VIRT_ADDRESS(sg)	((sg)->address ? (sg)->address			\
 				 : page_address((sg)->page) + (sg)->offset)
 #define SG_ENT_PHYS_ADDRESS(SG)	virt_to_phys(SG_ENT_VIRT_ADDRESS(SG))
 
 /*
+ * Maximum allowable number of contiguous slabs to map,
+ * must be a power of 2.  What is the appropriate value ?
+ * The complexity of {map,unmap}_single is linearly dependent on this value.
+ */
+#define IO_TLB_SEGSIZE	128
+
+/*
  * log of the size of each IO TLB slab.  The number of slabs is command line controllable.
  */
 #define IO_TLB_SHIFT 11
@@ -69,10 +79,15 @@
 setup_io_tlb_npages (char *str)
 {
 	io_tlb_nslabs = simple_strtoul(str, NULL, 0) << (PAGE_SHIFT - IO_TLB_SHIFT);
+
+	/* avoid tail segment of size < IO_TLB_SEGSIZE */
+	io_tlb_nslabs = ALIGN(io_tlb_nslabs, IO_TLB_SEGSIZE);
+
 	return 1;
 }
 __setup("swiotlb=", setup_io_tlb_npages);
 
+
 /*
  * Statically reserve bounce buffer space and initialize bounce buffer data structures for
  * the software IO TLB used to implement the PCI DMA API.
@@ -92,12 +107,12 @@
 
 	/*
 	 * Allocate and initialize the free list array.  This array is used
-	 * to find contiguous free memory regions of size 2^IO_TLB_SHIFT between
-	 * io_tlb_start and io_tlb_end.
+	 * to find contiguous free memory regions of size up to IO_TLB_SEGSIZE
+	 * between io_tlb_start and io_tlb_end.
 	 */
 	io_tlb_list = alloc_bootmem(io_tlb_nslabs * sizeof(int));
 	for (i = 0; i < io_tlb_nslabs; i++)
-		io_tlb_list[i] = io_tlb_nslabs - i;
+ 		io_tlb_list[i] = IO_TLB_SEGSIZE - OFFSET(i, IO_TLB_SEGSIZE);
 	io_tlb_index = 0;
 	io_tlb_orig_addr = alloc_bootmem(io_tlb_nslabs * sizeof(char *));
 
@@ -124,7 +139,7 @@
 	if (size > (1 << PAGE_SHIFT))
 		stride = (1 << (PAGE_SHIFT - IO_TLB_SHIFT));
 	else
-		stride = nslots;
+		stride = 1;
 
 	if (!nslots)
 		BUG();
@@ -151,7 +166,8 @@
 
 				for (i = index; i < index + nslots; i++)
 					io_tlb_list[i] = 0;
-				for (i = index - 1; (i >= 0) && io_tlb_list[i]; i--)
+				for (i = index - 1; (OFFSET(i, IO_TLB_SEGSIZE) != IO_TLB_SEGSIZE -1)
+				       && io_tlb_list[i]; i--)
 					io_tlb_list[i] = ++count;
 				dma_addr = io_tlb_start + (index << IO_TLB_SHIFT);
 
@@ -217,7 +233,8 @@
 	 */
 	spin_lock_irqsave(&io_tlb_lock, flags);
 	{
-		int count = ((index + nslots) < io_tlb_nslabs ? io_tlb_list[index + nslots] : 0);
+		int count = ((index + nslots) < ALIGN(index + 1, IO_TLB_SEGSIZE) ?
+			     io_tlb_list[index + nslots] : 0);
 		/*
 		 * Step 1: return the slots to the free list, merging the slots with
 		 * superceeding slots
@@ -228,7 +245,8 @@
 		 * Step 2: merge the returned slots with the preceeding slots, if
 		 * available (non zero)
 		 */
-		for (i = index - 1; (i >= 0) && io_tlb_list[i]; i--)
+		for (i = index - 1;  (OFFSET(i, IO_TLB_SEGSIZE) != IO_TLB_SEGSIZE -1) &&
+		       io_tlb_list[i]; i--)
 			io_tlb_list[i] = ++count;
 	}
 	spin_unlock_irqrestore(&io_tlb_lock, flags);
@@ -405,11 +423,13 @@
 	for (i = 0; i < nelems; i++, sg++) {
 		sg->orig_address = SG_ENT_VIRT_ADDRESS(sg);
 		if ((SG_ENT_PHYS_ADDRESS(sg) & ~hwdev->dma_mask) != 0) {
-			addr = map_single(hwdev, sg->address, sg->length, direction);
+			addr = map_single(hwdev, sg->orig_address, sg->length, direction);
 			if (sg->address)
 				sg->address = addr;
-			else
+			else {
 				sg->page = virt_to_page(addr);
+				sg->offset = (u64) addr & ~PAGE_MASK;
+			}
 		}
 	}
 	return nelems;
@@ -432,10 +452,12 @@
 			unmap_single(hwdev, SG_ENT_VIRT_ADDRESS(sg), sg->length, direction);
 			if (sg->address)
 				sg->address = sg->orig_address;
-			else
+			else {
 				sg->page = virt_to_page(sg->orig_address);
+				sg->offset = (u64) sg->orig_address & ~PAGE_MASK;
+			}
 		} else if (direction == PCI_DMA_FROMDEVICE)
-			mark_clean(sg->address, sg->length);
+			mark_clean(SG_ENT_VIRT_ADDRESS(sg), sg->length);
 }
 
 /*
diff -Nru linux/arch/ia64/mm/extable.c linux-2.4.19-pre5-mjc/arch/ia64/mm/extable.c
--- linux/arch/ia64/mm/extable.c	Tue Jul 31 13:30:08 2001
+++ linux-2.4.19-pre5-mjc/arch/ia64/mm/extable.c	Sat Apr  6 08:26:00 2002
@@ -1,8 +1,8 @@
 /*
  * Kernel exception handling table support.  Derived from arch/alpha/mm/extable.c.
  *
- * Copyright (C) 1998, 1999, 2001 Hewlett-Packard Co
- * Copyright (C) 1998, 1999, 2001 David Mosberger-Tang <davidm@hpl.hp.com>
+ * Copyright (C) 1998, 1999, 2001-2002 Hewlett-Packard Co
+ *	David Mosberger-Tang <davidm@hpl.hp.com>
  */
 
 #include <linux/config.h>
@@ -55,10 +55,12 @@
 	struct module *mp;
 
 	/* The kernel is the last "module" -- no need to treat it special. */
-	for (mp = module_list; mp ; mp = mp->next) {
+	for (mp = module_list; mp; mp = mp->next) {
 		if (!mp->ex_table_start)
 			continue;
 		archdata = (struct archdata *) mp->archdata_start;
+		if (!archdata)
+			continue;
 		entry = search_one_table(mp->ex_table_start, mp->ex_table_end - 1,
 					 addr, (unsigned long) archdata->gp);
 		if (entry) {
diff -Nru linux/arch/ia64/mm/fault.c linux-2.4.19-pre5-mjc/arch/ia64/mm/fault.c
--- linux/arch/ia64/mm/fault.c	Fri Nov  9 17:26:17 2001
+++ linux-2.4.19-pre5-mjc/arch/ia64/mm/fault.c	Sat Apr  6 08:26:00 2002
@@ -1,7 +1,7 @@
 /*
  * MMU fault handling support.
  *
- * Copyright (C) 1998-2001 Hewlett-Packard Co
+ * Copyright (C) 1998-2002 Hewlett-Packard Co
  *	David Mosberger-Tang <davidm@hpl.hp.com>
  */
 #include <linux/sched.h>
@@ -96,7 +96,7 @@
 	 * sure we exit gracefully rather than endlessly redo the
 	 * fault.
 	 */
-	switch (handle_mm_fault(mm, vma, address, mask)) {
+	switch (handle_mm_fault(mm, vma, address, (mask & VM_WRITE) != 0)) {
 	      case 1:
 		++current->min_flt;
 		break;
@@ -151,6 +151,8 @@
 		si.si_errno = 0;
 		si.si_code = code;
 		si.si_addr = (void *) address;
+		si.si_isr = isr;
+		si.si_flags = __ISR_VALID;
 		force_sig_info(signal, &si, current);
 		return;
 	}
diff -Nru linux/arch/ia64/mm/init.c linux-2.4.19-pre5-mjc/arch/ia64/mm/init.c
--- linux/arch/ia64/mm/init.c	Fri Nov  9 17:26:17 2001
+++ linux-2.4.19-pre5-mjc/arch/ia64/mm/init.c	Sat Apr  6 08:29:59 2002
@@ -99,7 +99,7 @@
 		free_page(addr);
 		++totalram_pages;
 	}
-	printk ("Freeing unused kernel memory: %ldkB freed\n",
+	printk (KERN_INFO "Freeing unused kernel memory: %ldkB freed\n",
 		(&__init_end - &__init_begin) >> 10);
 }
 
@@ -141,7 +141,7 @@
 	end = end & PAGE_MASK;
 
 	if (start < end)
-		printk ("Freeing initrd memory: %ldkB freed\n", (end - start) >> 10);
+		printk (KERN_INFO "Freeing initrd memory: %ldkB freed\n", (end - start) >> 10);
 
 	for (; start < end; start += PAGE_SIZE) {
 		if (!VALID_PAGE(virt_to_page(start)))
diff -Nru linux/arch/ia64/sn/Makefile linux-2.4.19-pre5-mjc/arch/ia64/sn/Makefile
--- linux/arch/ia64/sn/Makefile	Thu Apr  5 15:51:47 2001
+++ linux-2.4.19-pre5-mjc/arch/ia64/sn/Makefile	Wed Dec 31 19:00:00 1969
@@ -1,19 +0,0 @@
-#
-# ia64/sn/Makefile
-#
-# Copyright (C) 1999 Silicon Graphics, Inc.
-# Copyright (C) Srinivasa Thirumalachar (sprasad@engr.sgi.com)
-#
-
-EXTRA_CFLAGS	:= -DSN -DLANGUAGE_C=1 -D_LANGUAGE_C=1 -I. -DBRINGUP \
-		   -DDIRECT_L1_CONSOLE -DNUMA_BASE -DSIMULATED_KLGRAPH \
-		   -DNUMA_MIGR_CONTROL -DLITTLE_ENDIAN -DREAL_HARDWARE \
-		   -DNEW_INTERRUPTS
-all: sn.a
-
-O_TARGET        = sn.a
-obj-y           = sn1/sn1.a
-
-clean::
-
-include $(TOPDIR)/Rules.make
diff -Nru linux/arch/ia64/sn/configs/sn1/defconfig-bigsur-mp linux-2.4.19-pre5-mjc/arch/ia64/sn/configs/sn1/defconfig-bigsur-mp
--- linux/arch/ia64/sn/configs/sn1/defconfig-bigsur-mp	Wed Dec 31 19:00:00 1969
+++ linux-2.4.19-pre5-mjc/arch/ia64/sn/configs/sn1/defconfig-bigsur-mp	Sat Apr  6 08:26:00 2002
@@ -0,0 +1,777 @@
+#
+# Automatically generated make config: don't edit
+#
+
+#
+# Code maturity level options
+#
+CONFIG_EXPERIMENTAL=y
+
+#
+# Loadable module support
+#
+# CONFIG_MODULES is not set
+
+#
+# General setup
+#
+CONFIG_IA64=y
+# CONFIG_ISA is not set
+# CONFIG_EISA is not set
+# CONFIG_MCA is not set
+# CONFIG_SBUS is not set
+CONFIG_RWSEM_GENERIC_SPINLOCK=y
+# CONFIG_RWSEM_XCHGADD_ALGORITHM is not set
+CONFIG_ACPI=y
+CONFIG_ACPI_EFI=y
+CONFIG_ACPI_INTERPRETER=y
+CONFIG_ACPI_KERNEL_CONFIG=y
+CONFIG_ITANIUM=y
+# CONFIG_MCKINLEY is not set
+# CONFIG_IA64_GENERIC is not set
+CONFIG_IA64_DIG=y
+# CONFIG_IA64_HP_SIM is not set
+# CONFIG_IA64_SGI_SN1 is not set
+# CONFIG_IA64_SGI_SN2 is not set
+# CONFIG_IA64_PAGE_SIZE_4KB is not set
+# CONFIG_IA64_PAGE_SIZE_8KB is not set
+CONFIG_IA64_PAGE_SIZE_16KB=y
+# CONFIG_IA64_PAGE_SIZE_64KB is not set
+CONFIG_IA64_BRL_EMU=y
+CONFIG_ITANIUM_BSTEP_SPECIFIC=y
+CONFIG_IA64_L1_CACHE_SHIFT=6
+# CONFIG_NUMA is not set
+# CONFIG_IA64_MCA is not set
+CONFIG_PM=y
+CONFIG_IA64_HAVE_SYNCRONIZED_ITC=y
+CONFIG_DEVFS_FS=y
+CONFIG_DEVFS_DEBUG=y
+CONFIG_KCORE_ELF=y
+CONFIG_SMP=y
+CONFIG_IA32_SUPPORT=y
+CONFIG_PERFMON=y
+CONFIG_IA64_PALINFO=y
+# CONFIG_EFI_VARS is not set
+CONFIG_NET=y
+CONFIG_SYSVIPC=y
+# CONFIG_BSD_PROCESS_ACCT is not set
+CONFIG_SYSCTL=y
+CONFIG_BINFMT_ELF=y
+# CONFIG_BINFMT_MISC is not set
+# CONFIG_ACPI_DEBUG is not set
+# CONFIG_ACPI_BUSMGR is not set
+# CONFIG_ACPI_SYS is not set
+# CONFIG_ACPI_CPU is not set
+# CONFIG_ACPI_BUTTON is not set
+# CONFIG_ACPI_AC is not set
+# CONFIG_ACPI_EC is not set
+# CONFIG_ACPI_CMBATT is not set
+# CONFIG_ACPI_THERMAL is not set
+CONFIG_PCI=y
+# CONFIG_PCI_NAMES is not set
+# CONFIG_HOTPLUG is not set
+# CONFIG_PCMCIA is not set
+
+#
+# Parallel port support
+#
+# CONFIG_PARPORT is not set
+
+#
+# Networking options
+#
+# CONFIG_PACKET is not set
+# CONFIG_NETLINK is not set
+# CONFIG_NETFILTER is not set
+# CONFIG_FILTER is not set
+CONFIG_UNIX=y
+CONFIG_INET=y
+# CONFIG_IP_MULTICAST is not set
+# CONFIG_IP_ADVANCED_ROUTER is not set
+# CONFIG_IP_PNP is not set
+# CONFIG_NET_IPIP is not set
+# CONFIG_NET_IPGRE is not set
+# CONFIG_INET_ECN is not set
+# CONFIG_SYN_COOKIES is not set
+# CONFIG_IPV6 is not set
+# CONFIG_KHTTPD is not set
+# CONFIG_ATM is not set
+
+#
+#  
+#
+# CONFIG_IPX is not set
+# CONFIG_ATALK is not set
+# CONFIG_DECNET is not set
+# CONFIG_BRIDGE is not set
+# CONFIG_X25 is not set
+# CONFIG_LAPB is not set
+# CONFIG_LLC is not set
+# CONFIG_NET_DIVERT is not set
+# CONFIG_ECONET is not set
+# CONFIG_WAN_ROUTER is not set
+# CONFIG_NET_FASTROUTE is not set
+# CONFIG_NET_HW_FLOWCONTROL is not set
+
+#
+# QoS and/or fair queueing
+#
+# CONFIG_NET_SCHED is not set
+
+#
+# Memory Technology Devices (MTD)
+#
+# CONFIG_MTD is not set
+
+#
+# Plug and Play configuration
+#
+# CONFIG_PNP is not set
+# CONFIG_ISAPNP is not set
+# CONFIG_PNPBIOS is not set
+
+#
+# Block devices
+#
+# CONFIG_BLK_DEV_FD is not set
+# CONFIG_BLK_DEV_XD is not set
+# CONFIG_PARIDE is not set
+# CONFIG_BLK_CPQ_DA is not set
+# CONFIG_BLK_CPQ_CISS_DA is not set
+# CONFIG_BLK_DEV_DAC960 is not set
+# CONFIG_BLK_DEV_LOOP is not set
+# CONFIG_BLK_DEV_NBD is not set
+# CONFIG_BLK_DEV_RAM is not set
+# CONFIG_BLK_DEV_INITRD is not set
+
+#
+# I2O device support
+#
+# CONFIG_I2O is not set
+# CONFIG_I2O_PCI is not set
+# CONFIG_I2O_BLOCK is not set
+# CONFIG_I2O_LAN is not set
+# CONFIG_I2O_SCSI is not set
+# CONFIG_I2O_PROC is not set
+
+#
+# Multi-device support (RAID and LVM)
+#
+# CONFIG_MD is not set
+# CONFIG_BLK_DEV_MD is not set
+# CONFIG_MD_LINEAR is not set
+# CONFIG_MD_RAID0 is not set
+# CONFIG_MD_RAID1 is not set
+# CONFIG_MD_RAID5 is not set
+# CONFIG_MD_MULTIPATH is not set
+# CONFIG_BLK_DEV_LVM is not set
+
+#
+# ATA/IDE/MFM/RLL support
+#
+CONFIG_IDE=y
+
+#
+# IDE, ATA and ATAPI Block devices
+#
+CONFIG_BLK_DEV_IDE=y
+
+#
+# Please see Documentation/ide.txt for help/info on IDE drives
+#
+# CONFIG_BLK_DEV_HD_IDE is not set
+# CONFIG_BLK_DEV_HD is not set
+CONFIG_BLK_DEV_IDEDISK=y
+# CONFIG_IDEDISK_MULTI_MODE is not set
+# CONFIG_BLK_DEV_IDEDISK_VENDOR is not set
+# CONFIG_BLK_DEV_IDEDISK_FUJITSU is not set
+# CONFIG_BLK_DEV_IDEDISK_IBM is not set
+# CONFIG_BLK_DEV_IDEDISK_MAXTOR is not set
+# CONFIG_BLK_DEV_IDEDISK_QUANTUM is not set
+# CONFIG_BLK_DEV_IDEDISK_SEAGATE is not set
+# CONFIG_BLK_DEV_IDEDISK_WD is not set
+# CONFIG_BLK_DEV_COMMERIAL is not set
+# CONFIG_BLK_DEV_TIVO is not set
+# CONFIG_BLK_DEV_IDECS is not set
+CONFIG_BLK_DEV_IDECD=y
+# CONFIG_BLK_DEV_IDETAPE is not set
+CONFIG_BLK_DEV_IDEFLOPPY=y
+# CONFIG_BLK_DEV_IDESCSI is not set
+
+#
+# IDE chipset support/bugfixes
+#
+# CONFIG_BLK_DEV_CMD640 is not set
+# CONFIG_BLK_DEV_CMD640_ENHANCED is not set
+# CONFIG_BLK_DEV_ISAPNP is not set
+# CONFIG_BLK_DEV_RZ1000 is not set
+CONFIG_BLK_DEV_IDEPCI=y
+# CONFIG_IDEPCI_SHARE_IRQ is not set
+CONFIG_BLK_DEV_IDEDMA_PCI=y
+CONFIG_BLK_DEV_ADMA=y
+# CONFIG_BLK_DEV_OFFBOARD is not set
+# CONFIG_IDEDMA_PCI_AUTO is not set
+CONFIG_BLK_DEV_IDEDMA=y
+# CONFIG_IDEDMA_PCI_WIP is not set
+# CONFIG_IDEDMA_NEW_DRIVE_LISTINGS is not set
+# CONFIG_BLK_DEV_AEC62XX is not set
+# CONFIG_AEC62XX_TUNING is not set
+# CONFIG_BLK_DEV_ALI15X3 is not set
+# CONFIG_WDC_ALI15X3 is not set
+# CONFIG_BLK_DEV_AMD74XX is not set
+# CONFIG_AMD74XX_OVERRIDE is not set
+# CONFIG_BLK_DEV_CMD64X is not set
+# CONFIG_BLK_DEV_CY82C693 is not set
+# CONFIG_BLK_DEV_CS5530 is not set
+# CONFIG_BLK_DEV_HPT34X is not set
+# CONFIG_HPT34X_AUTODMA is not set
+# CONFIG_BLK_DEV_HPT366 is not set
+# CONFIG_BLK_DEV_PIIX is not set
+# CONFIG_PIIX_TUNING is not set
+# CONFIG_BLK_DEV_NS87415 is not set
+# CONFIG_BLK_DEV_OPTI621 is not set
+# CONFIG_BLK_DEV_PDC202XX is not set
+# CONFIG_PDC202XX_BURST is not set
+# CONFIG_PDC202XX_FORCE is not set
+# CONFIG_BLK_DEV_SVWKS is not set
+# CONFIG_BLK_DEV_SIS5513 is not set
+# CONFIG_BLK_DEV_SLC90E66 is not set
+# CONFIG_BLK_DEV_TRM290 is not set
+# CONFIG_BLK_DEV_VIA82CXXX is not set
+# CONFIG_IDE_CHIPSETS is not set
+# CONFIG_IDEDMA_AUTO is not set
+# CONFIG_IDEDMA_IVB is not set
+# CONFIG_DMA_NONPCI is not set
+# CONFIG_BLK_DEV_IDE_MODES is not set
+# CONFIG_BLK_DEV_ATARAID is not set
+# CONFIG_BLK_DEV_ATARAID_PDC is not set
+# CONFIG_BLK_DEV_ATARAID_HPT is not set
+
+#
+# Alternate 1394 support
+#
+# CONFIG_X1394 is not set
+
+#
+# Alternate SCSI support
+#
+# CONFIG_XSCSI is not set
+
+#
+# SCSI support
+#
+CONFIG_SCSI=y
+
+#
+# SCSI support type (disk, tape, CD-ROM)
+#
+CONFIG_BLK_DEV_SD=y
+CONFIG_SD_EXTRA_DEVS=40
+# CONFIG_CHR_DEV_ST is not set
+# CONFIG_CHR_DEV_OSST is not set
+# CONFIG_BLK_DEV_SR is not set
+# CONFIG_CHR_DEV_SG is not set
+
+#
+# Some SCSI devices (e.g. CD jukebox) support multiple LUNs
+#
+# CONFIG_SCSI_DEBUG_QUEUES is not set
+CONFIG_SCSI_MULTI_LUN=y
+CONFIG_SCSI_CONSTANTS=y
+CONFIG_SCSI_LOGGING=y
+
+#
+# SCSI low-level drivers
+#
+# CONFIG_BLK_DEV_3W_XXXX_RAID is not set
+# CONFIG_SCSI_7000FASST is not set
+# CONFIG_SCSI_ACARD is not set
+# CONFIG_SCSI_AHA152X is not set
+# CONFIG_SCSI_AHA1542 is not set
+# CONFIG_SCSI_AHA1740 is not set
+# CONFIG_SCSI_AIC7XXX is not set
+# CONFIG_SCSI_AIC7XXX_OLD is not set
+# CONFIG_SCSI_DPT_I2O is not set
+# CONFIG_SCSI_ADVANSYS is not set
+# CONFIG_SCSI_IN2000 is not set
+# CONFIG_SCSI_AM53C974 is not set
+# CONFIG_SCSI_MEGARAID is not set
+# CONFIG_SCSI_BUSLOGIC is not set
+# CONFIG_SCSI_CPQFCTS is not set
+# CONFIG_SCSI_DMX3191D is not set
+# CONFIG_SCSI_DTC3280 is not set
+# CONFIG_SCSI_EATA is not set
+# CONFIG_SCSI_EATA_DMA is not set
+# CONFIG_SCSI_EATA_PIO is not set
+# CONFIG_SCSI_FUTURE_DOMAIN is not set
+# CONFIG_SCSI_GDTH is not set
+# CONFIG_SCSI_GENERIC_NCR5380 is not set
+# CONFIG_SCSI_INITIO is not set
+# CONFIG_SCSI_INIA100 is not set
+# CONFIG_SCSI_NCR53C406A is not set
+# CONFIG_SCSI_NCR53C7xx is not set
+# CONFIG_SCSI_NCR53C8XX is not set
+# CONFIG_SCSI_SYM53C8XX is not set
+# CONFIG_SCSI_PAS16 is not set
+# CONFIG_SCSI_PCI2000 is not set
+# CONFIG_SCSI_PCI2220I is not set
+# CONFIG_SCSI_PSI240I is not set
+# CONFIG_SCSI_QLOGIC_FAS is not set
+# CONFIG_SCSI_QLOGIC_ISP is not set
+# CONFIG_SCSI_QLOGIC_FC is not set
+CONFIG_SCSI_QLOGIC_1280=y
+# CONFIG_SCSI_QLOGIC_QLA2100 is not set
+# CONFIG_SCSI_SIM710 is not set
+# CONFIG_SCSI_SYM53C416 is not set
+# CONFIG_SCSI_DC390T is not set
+# CONFIG_SCSI_T128 is not set
+# CONFIG_SCSI_U14_34F is not set
+# CONFIG_SCSI_DEBUG is not set
+
+#
+# Network device support
+#
+CONFIG_NETDEVICES=y
+
+#
+# ARCnet devices
+#
+# CONFIG_ARCNET is not set
+CONFIG_DUMMY=y
+# CONFIG_BONDING is not set
+# CONFIG_EQUALIZER is not set
+# CONFIG_TUN is not set
+
+#
+# Ethernet (10 or 100Mbit)
+#
+CONFIG_NET_ETHERNET=y
+# CONFIG_SUNLANCE is not set
+# CONFIG_HAPPYMEAL is not set
+# CONFIG_SUNBMAC is not set
+# CONFIG_SUNQE is not set
+# CONFIG_SUNLANCE is not set
+# CONFIG_SUNGEM is not set
+# CONFIG_NET_VENDOR_3COM is not set
+# CONFIG_LANCE is not set
+# CONFIG_NET_VENDOR_SMC is not set
+# CONFIG_NET_VENDOR_RACAL is not set
+# CONFIG_HP100 is not set
+# CONFIG_NET_ISA is not set
+CONFIG_NET_PCI=y
+# CONFIG_PCNET32 is not set
+# CONFIG_ADAPTEC_STARFIRE is not set
+# CONFIG_APRICOT is not set
+# CONFIG_CS89x0 is not set
+# CONFIG_TULIP is not set
+# CONFIG_DE4X5 is not set
+# CONFIG_DGRS is not set
+# CONFIG_DM9102 is not set
+CONFIG_EEPRO100=y
+# CONFIG_LNE390 is not set
+# CONFIG_FEALNX is not set
+# CONFIG_NATSEMI is not set
+# CONFIG_NE2K_PCI is not set
+# CONFIG_NE3210 is not set
+# CONFIG_ES3210 is not set
+# CONFIG_8139CP is not set
+# CONFIG_8139TOO is not set
+# CONFIG_8139TOO_PIO is not set
+# CONFIG_8139TOO_TUNE_TWISTER is not set
+# CONFIG_8139TOO_8129 is not set
+# CONFIG_SIS900 is not set
+# CONFIG_EPIC100 is not set
+# CONFIG_SUNDANCE is not set
+# CONFIG_TLAN is not set
+# CONFIG_VIA_RHINE is not set
+# CONFIG_WINBOND_840 is not set
+# CONFIG_NET_POCKET is not set
+
+#
+# Ethernet (1000 Mbit)
+#
+# CONFIG_ACENIC is not set
+# CONFIG_DL2K is not set
+# CONFIG_MYRI_SBUS is not set
+# CONFIG_NS83820 is not set
+# CONFIG_HAMACHI is not set
+# CONFIG_YELLOWFIN is not set
+# CONFIG_SK98LIN is not set
+# CONFIG_FDDI is not set
+# CONFIG_HIPPI is not set
+# CONFIG_PLIP is not set
+# CONFIG_PPP is not set
+# CONFIG_SLIP is not set
+
+#
+# Wireless LAN (non-hamradio)
+#
+# CONFIG_NET_RADIO is not set
+
+#
+# Token Ring devices
+#
+# CONFIG_TR is not set
+# CONFIG_NET_FC is not set
+# CONFIG_RCPCI is not set
+# CONFIG_SHAPER is not set
+
+#
+# Wan interfaces
+#
+# CONFIG_WAN is not set
+
+#
+# Amateur Radio support
+#
+# CONFIG_HAMRADIO is not set
+
+#
+# ISDN subsystem
+#
+# CONFIG_ISDN is not set
+
+#
+# CD-ROM drivers (not for SCSI or IDE/ATAPI drives)
+#
+# CONFIG_CD_NO_IDESCSI is not set
+
+#
+# Input core support
+#
+# CONFIG_INPUT is not set
+# CONFIG_INPUT_KEYBDEV is not set
+# CONFIG_INPUT_MOUSEDEV is not set
+# CONFIG_INPUT_JOYDEV is not set
+# CONFIG_INPUT_EVDEV is not set
+
+#
+# Character devices
+#
+CONFIG_VT=y
+CONFIG_VT_CONSOLE=y
+CONFIG_SERIAL=y
+CONFIG_SERIAL_CONSOLE=y
+# CONFIG_SERIAL_EXTENDED is not set
+# CONFIG_SERIAL_NONSTANDARD is not set
+CONFIG_UNIX98_PTYS=y
+CONFIG_UNIX98_PTY_COUNT=256
+
+#
+# I2C support
+#
+# CONFIG_I2C is not set
+
+#
+# Mice
+#
+# CONFIG_BUSMOUSE is not set
+CONFIG_MOUSE=y
+CONFIG_PSMOUSE=y
+# CONFIG_82C710_MOUSE is not set
+# CONFIG_PC110_PAD is not set
+
+#
+# Joysticks
+#
+# CONFIG_INPUT_GAMEPORT is not set
+
+#
+# Input core support is needed for gameports
+#
+
+#
+# Input core support is needed for joysticks
+#
+# CONFIG_QIC02_TAPE is not set
+
+#
+# Watchdog Cards
+#
+# CONFIG_WATCHDOG is not set
+# CONFIG_INTEL_RNG is not set
+# CONFIG_NVRAM is not set
+# CONFIG_RTC is not set
+# CONFIG_EFI_RTC is not set
+# CONFIG_DTLK is not set
+# CONFIG_R3964 is not set
+# CONFIG_APPLICOM is not set
+
+#
+# Ftape, the floppy tape device driver
+#
+# CONFIG_FTAPE is not set
+# CONFIG_AGP is not set
+# CONFIG_DRM is not set
+# CONFIG_MWAVE is not set
+
+#
+# Multimedia devices
+#
+# CONFIG_VIDEO_DEV is not set
+
+#
+# File systems
+#
+# CONFIG_QUOTA is not set
+CONFIG_AUTOFS_FS=y
+CONFIG_AUTOFS4_FS=y
+# CONFIG_REISERFS_FS is not set
+# CONFIG_REISERFS_CHECK is not set
+# CONFIG_ADFS_FS is not set
+# CONFIG_ADFS_FS_RW is not set
+# CONFIG_AFFS_FS is not set
+# CONFIG_HFS_FS is not set
+# CONFIG_BFS_FS is not set
+CONFIG_FAT_FS=y
+CONFIG_MSDOS_FS=y
+# CONFIG_UMSDOS_FS is not set
+CONFIG_VFAT_FS=y
+# CONFIG_EFS_FS is not set
+# CONFIG_JFFS_FS is not set
+# CONFIG_JFFS2_FS is not set
+# CONFIG_CRAMFS is not set
+CONFIG_TMPFS=y
+# CONFIG_RAMFS is not set
+CONFIG_ISO9660_FS=y
+CONFIG_JOLIET=y
+# CONFIG_MINIX_FS is not set
+# CONFIG_VXFS_FS is not set
+# CONFIG_NTFS_FS is not set
+# CONFIG_NTFS_RW is not set
+# CONFIG_HPFS_FS is not set
+CONFIG_PROC_FS=y
+CONFIG_DEVFS_FS=y
+CONFIG_DEVFS_MOUNT=y
+CONFIG_DEVFS_DEBUG=y
+CONFIG_DEVPTS_FS=y
+# CONFIG_QNX4FS_FS is not set
+# CONFIG_QNX4FS_RW is not set
+# CONFIG_ROMFS_FS is not set
+CONFIG_EXT2_FS=y
+# CONFIG_SYSV_FS is not set
+# CONFIG_UDF_FS is not set
+# CONFIG_UDF_RW is not set
+# CONFIG_UFS_FS is not set
+# CONFIG_UFS_FS_WRITE is not set
+# CONFIG_XFS_SUPPORT is not set
+
+#
+# Network File Systems
+#
+# CONFIG_CODA_FS is not set
+CONFIG_NFS_FS=y
+CONFIG_NFS_V3=y
+# CONFIG_ROOT_NFS is not set
+CONFIG_NFSD=y
+CONFIG_NFSD_V3=y
+CONFIG_SUNRPC=y
+CONFIG_LOCKD=y
+CONFIG_LOCKD_V4=y
+# CONFIG_SMB_FS is not set
+# CONFIG_NCP_FS is not set
+# CONFIG_NCPFS_PACKET_SIGNING is not set
+# CONFIG_NCPFS_IOCTL_LOCKING is not set
+# CONFIG_NCPFS_STRONG is not set
+# CONFIG_NCPFS_NFS_NS is not set
+# CONFIG_NCPFS_OS2_NS is not set
+# CONFIG_NCPFS_SMALLDOS is not set
+# CONFIG_NCPFS_NLS is not set
+# CONFIG_NCPFS_EXTRAS is not set
+
+#
+# Partition Types
+#
+# CONFIG_PARTITION_ADVANCED is not set
+CONFIG_MSDOS_PARTITION=y
+# CONFIG_SMB_NLS is not set
+CONFIG_NLS=y
+
+#
+# Native Language Support
+#
+CONFIG_NLS_DEFAULT="iso8859-1"
+# CONFIG_NLS_CODEPAGE_437 is not set
+# CONFIG_NLS_CODEPAGE_737 is not set
+# CONFIG_NLS_CODEPAGE_775 is not set
+# CONFIG_NLS_CODEPAGE_850 is not set
+# CONFIG_NLS_CODEPAGE_852 is not set
+# CONFIG_NLS_CODEPAGE_855 is not set
+# CONFIG_NLS_CODEPAGE_857 is not set
+# CONFIG_NLS_CODEPAGE_860 is not set
+# CONFIG_NLS_CODEPAGE_861 is not set
+# CONFIG_NLS_CODEPAGE_862 is not set
+# CONFIG_NLS_CODEPAGE_863 is not set
+# CONFIG_NLS_CODEPAGE_864 is not set
+# CONFIG_NLS_CODEPAGE_865 is not set
+# CONFIG_NLS_CODEPAGE_866 is not set
+# CONFIG_NLS_CODEPAGE_869 is not set
+# CONFIG_NLS_CODEPAGE_936 is not set
+# CONFIG_NLS_CODEPAGE_950 is not set
+# CONFIG_NLS_CODEPAGE_932 is not set
+# CONFIG_NLS_CODEPAGE_949 is not set
+# CONFIG_NLS_CODEPAGE_874 is not set
+# CONFIG_NLS_ISO8859_8 is not set
+# CONFIG_NLS_CODEPAGE_1251 is not set
+# CONFIG_NLS_ISO8859_1 is not set
+# CONFIG_NLS_ISO8859_2 is not set
+# CONFIG_NLS_ISO8859_3 is not set
+# CONFIG_NLS_ISO8859_4 is not set
+# CONFIG_NLS_ISO8859_5 is not set
+# CONFIG_NLS_ISO8859_6 is not set
+# CONFIG_NLS_ISO8859_7 is not set
+# CONFIG_NLS_ISO8859_9 is not set
+# CONFIG_NLS_ISO8859_13 is not set
+# CONFIG_NLS_ISO8859_14 is not set
+# CONFIG_NLS_ISO8859_15 is not set
+# CONFIG_NLS_KOI8_R is not set
+# CONFIG_NLS_KOI8_U is not set
+# CONFIG_NLS_UTF8 is not set
+
+#
+# Console drivers
+#
+CONFIG_VGA_CONSOLE=y
+
+#
+# Frame-buffer support
+#
+# CONFIG_FB is not set
+
+#
+# Sound
+#
+# CONFIG_SOUND is not set
+
+#
+# USB support
+#
+# CONFIG_USB is not set
+
+#
+# USB Controllers
+#
+# CONFIG_USB_UHCI is not set
+# CONFIG_USB_UHCI_ALT is not set
+# CONFIG_USB_OHCI is not set
+
+#
+# USB Device Class drivers
+#
+# CONFIG_USB_AUDIO is not set
+# CONFIG_USB_BLUETOOTH is not set
+# CONFIG_USB_STORAGE is not set
+# CONFIG_USB_STORAGE_DEBUG is not set
+# CONFIG_USB_STORAGE_DATAFAB is not set
+# CONFIG_USB_STORAGE_FREECOM is not set
+# CONFIG_USB_STORAGE_ISD200 is not set
+# CONFIG_USB_STORAGE_DPCM is not set
+# CONFIG_USB_STORAGE_HP8200e is not set
+# CONFIG_USB_STORAGE_SDDR09 is not set
+# CONFIG_USB_STORAGE_JUMPSHOT is not set
+# CONFIG_USB_ACM is not set
+# CONFIG_USB_PRINTER is not set
+
+#
+# USB Human Interface Devices (HID)
+#
+
+#
+#   Input core support is needed for USB HID
+#
+
+#
+# USB Imaging devices
+#
+# CONFIG_USB_DC2XX is not set
+# CONFIG_USB_MDC800 is not set
+# CONFIG_USB_SCANNER is not set
+# CONFIG_USB_MICROTEK is not set
+# CONFIG_USB_HPUSBSCSI is not set
+
+#
+# USB Multimedia devices
+#
+
+#
+#   Video4Linux support is needed for USB Multimedia device support
+#
+
+#
+# USB Network adaptors
+#
+# CONFIG_USB_PEGASUS is not set
+# CONFIG_USB_KAWETH is not set
+# CONFIG_USB_CATC is not set
+# CONFIG_USB_CDCETHER is not set
+# CONFIG_USB_USBNET is not set
+
+#
+# USB port drivers
+#
+# CONFIG_USB_USS720 is not set
+
+#
+# USB Serial Converter support
+#
+# CONFIG_USB_SERIAL is not set
+# CONFIG_USB_SERIAL_GENERIC is not set
+# CONFIG_USB_SERIAL_BELKIN is not set
+# CONFIG_USB_SERIAL_WHITEHEAT is not set
+# CONFIG_USB_SERIAL_DIGI_ACCELEPORT is not set
+# CONFIG_USB_SERIAL_EMPEG is not set
+# CONFIG_USB_SERIAL_FTDI_SIO is not set
+# CONFIG_USB_SERIAL_VISOR is not set
+# CONFIG_USB_SERIAL_IR is not set
+# CONFIG_USB_SERIAL_EDGEPORT is not set
+# CONFIG_USB_SERIAL_KEYSPAN_PDA is not set
+# CONFIG_USB_SERIAL_KEYSPAN is not set
+# CONFIG_USB_SERIAL_KEYSPAN_USA28 is not set
+# CONFIG_USB_SERIAL_KEYSPAN_USA28X is not set
+# CONFIG_USB_SERIAL_KEYSPAN_USA28XA is not set
+# CONFIG_USB_SERIAL_KEYSPAN_USA28XB is not set
+# CONFIG_USB_SERIAL_KEYSPAN_USA19 is not set
+# CONFIG_USB_SERIAL_KEYSPAN_USA18X is not set
+# CONFIG_USB_SERIAL_KEYSPAN_USA19W is not set
+# CONFIG_USB_SERIAL_KEYSPAN_USA49W is not set
+# CONFIG_USB_SERIAL_MCT_U232 is not set
+# CONFIG_USB_SERIAL_PL2303 is not set
+# CONFIG_USB_SERIAL_CYBERJACK is not set
+# CONFIG_USB_SERIAL_XIRCOM is not set
+# CONFIG_USB_SERIAL_OMNINET is not set
+
+#
+# USB Miscellaneous drivers
+#
+# CONFIG_USB_RIO500 is not set
+
+#
+# IEEE 1394 (FireWire) support (EXPERIMENTAL)
+#
+# CONFIG_IEEE1394 is not set
+
+#
+# Bluetooth support
+#
+# CONFIG_BLUEZ is not set
+
+#
+# Kernel hacking
+#
+CONFIG_DEBUG_KERNEL=y
+CONFIG_IA64_PRINT_HAZARDS=y
+# CONFIG_DISABLE_VHPT is not set
+CONFIG_MAGIC_SYSRQ=y
+CONFIG_IA64_EARLY_PRINTK=y
+# CONFIG_DEBUG_SLAB is not set
+# CONFIG_DEBUG_SPINLOCK is not set
+# CONFIG_IA64_DEBUG_CMPXCHG is not set
+# CONFIG_IA64_DEBUG_IRQ is not set
+CONFIG_KDB=y
+CONFIG_KDB_MODULES=y
+# CONFIG_KDB_OFF is not set
+
+#
+#   Load all symbols for debugging is required for KDB
+#
+CONFIG_KALLSYMS=y
diff -Nru linux/arch/ia64/sn/configs/sn1/defconfig-bigsur-sp linux-2.4.19-pre5-mjc/arch/ia64/sn/configs/sn1/defconfig-bigsur-sp
--- linux/arch/ia64/sn/configs/sn1/defconfig-bigsur-sp	Wed Dec 31 19:00:00 1969
+++ linux-2.4.19-pre5-mjc/arch/ia64/sn/configs/sn1/defconfig-bigsur-sp	Sat Apr  6 08:26:00 2002
@@ -0,0 +1,772 @@
+#
+# Automatically generated make config: don't edit
+#
+
+#
+# Code maturity level options
+#
+CONFIG_EXPERIMENTAL=y
+
+#
+# Loadable module support
+#
+# CONFIG_MODULES is not set
+
+#
+# General setup
+#
+CONFIG_IA64=y
+# CONFIG_ISA is not set
+# CONFIG_EISA is not set
+# CONFIG_MCA is not set
+# CONFIG_SBUS is not set
+CONFIG_RWSEM_GENERIC_SPINLOCK=y
+# CONFIG_RWSEM_XCHGADD_ALGORITHM is not set
+CONFIG_ACPI=y
+CONFIG_ACPI_EFI=y
+CONFIG_ACPI_INTERPRETER=y
+CONFIG_ACPI_KERNEL_CONFIG=y
+CONFIG_ITANIUM=y
+# CONFIG_MCKINLEY is not set
+# CONFIG_IA64_GENERIC is not set
+CONFIG_IA64_DIG=y
+# CONFIG_IA64_HP_SIM is not set
+# CONFIG_IA64_SGI_SN1 is not set
+# CONFIG_IA64_SGI_SN2 is not set
+# CONFIG_IA64_PAGE_SIZE_4KB is not set
+# CONFIG_IA64_PAGE_SIZE_8KB is not set
+CONFIG_IA64_PAGE_SIZE_16KB=y
+# CONFIG_IA64_PAGE_SIZE_64KB is not set
+CONFIG_IA64_BRL_EMU=y
+CONFIG_ITANIUM_BSTEP_SPECIFIC=y
+CONFIG_IA64_L1_CACHE_SHIFT=6
+# CONFIG_NUMA is not set
+# CONFIG_IA64_MCA is not set
+CONFIG_PM=y
+CONFIG_IA64_HAVE_SYNCRONIZED_ITC=y
+CONFIG_DEVFS_FS=y
+CONFIG_DEVFS_DEBUG=y
+CONFIG_KCORE_ELF=y
+# CONFIG_SMP is not set
+CONFIG_IA32_SUPPORT=y
+CONFIG_PERFMON=y
+CONFIG_IA64_PALINFO=y
+# CONFIG_EFI_VARS is not set
+CONFIG_NET=y
+CONFIG_SYSVIPC=y
+# CONFIG_BSD_PROCESS_ACCT is not set
+CONFIG_SYSCTL=y
+CONFIG_BINFMT_ELF=y
+# CONFIG_BINFMT_MISC is not set
+# CONFIG_ACPI_DEBUG is not set
+# CONFIG_ACPI_BUSMGR is not set
+# CONFIG_ACPI_SYS is not set
+# CONFIG_ACPI_CPU is not set
+# CONFIG_ACPI_BUTTON is not set
+# CONFIG_ACPI_AC is not set
+# CONFIG_ACPI_EC is not set
+# CONFIG_ACPI_CMBATT is not set
+# CONFIG_ACPI_THERMAL is not set
+CONFIG_PCI=y
+# CONFIG_PCI_NAMES is not set
+# CONFIG_HOTPLUG is not set
+# CONFIG_PCMCIA is not set
+
+#
+# Parallel port support
+#
+# CONFIG_PARPORT is not set
+
+#
+# Networking options
+#
+# CONFIG_PACKET is not set
+# CONFIG_NETLINK is not set
+# CONFIG_NETFILTER is not set
+# CONFIG_FILTER is not set
+CONFIG_UNIX=y
+CONFIG_INET=y
+# CONFIG_IP_MULTICAST is not set
+# CONFIG_IP_ADVANCED_ROUTER is not set
+# CONFIG_IP_PNP is not set
+# CONFIG_NET_IPIP is not set
+# CONFIG_NET_IPGRE is not set
+# CONFIG_INET_ECN is not set
+# CONFIG_SYN_COOKIES is not set
+# CONFIG_IPV6 is not set
+# CONFIG_KHTTPD is not set
+# CONFIG_ATM is not set
+
+#
+#  
+#
+# CONFIG_IPX is not set
+# CONFIG_ATALK is not set
+# CONFIG_DECNET is not set
+# CONFIG_BRIDGE is not set
+# CONFIG_X25 is not set
+# CONFIG_LAPB is not set
+# CONFIG_LLC is not set
+# CONFIG_NET_DIVERT is not set
+# CONFIG_ECONET is not set
+# CONFIG_WAN_ROUTER is not set
+# CONFIG_NET_FASTROUTE is not set
+# CONFIG_NET_HW_FLOWCONTROL is not set
+
+#
+# QoS and/or fair queueing
+#
+# CONFIG_NET_SCHED is not set
+
+#
+# Memory Technology Devices (MTD)
+#
+# CONFIG_MTD is not set
+
+#
+# Plug and Play configuration
+#
+# CONFIG_PNP is not set
+# CONFIG_ISAPNP is not set
+# CONFIG_PNPBIOS is not set
+
+#
+# Block devices
+#
+# CONFIG_BLK_DEV_FD is not set
+# CONFIG_BLK_DEV_XD is not set
+# CONFIG_PARIDE is not set
+# CONFIG_BLK_CPQ_DA is not set
+# CONFIG_BLK_CPQ_CISS_DA is not set
+# CONFIG_BLK_DEV_DAC960 is not set
+# CONFIG_BLK_DEV_LOOP is not set
+# CONFIG_BLK_DEV_NBD is not set
+# CONFIG_BLK_DEV_RAM is not set
+# CONFIG_BLK_DEV_INITRD is not set
+
+#
+# I2O device support
+#
+# CONFIG_I2O is not set
+# CONFIG_I2O_PCI is not set
+# CONFIG_I2O_BLOCK is not set
+# CONFIG_I2O_LAN is not set
+# CONFIG_I2O_SCSI is not set
+# CONFIG_I2O_PROC is not set
+
+#
+# Multi-device support (RAID and LVM)
+#
+# CONFIG_MD is not set
+# CONFIG_BLK_DEV_MD is not set
+# CONFIG_MD_LINEAR is not set
+# CONFIG_MD_RAID0 is not set
+# CONFIG_MD_RAID1 is not set
+# CONFIG_MD_RAID5 is not set
+# CONFIG_MD_MULTIPATH is not set
+# CONFIG_BLK_DEV_LVM is not set
+
+#
+# ATA/IDE/MFM/RLL support
+#
+CONFIG_IDE=y
+
+#
+# IDE, ATA and ATAPI Block devices
+#
+CONFIG_BLK_DEV_IDE=y
+
+#
+# Please see Documentation/ide.txt for help/info on IDE drives
+#
+# CONFIG_BLK_DEV_HD_IDE is not set
+# CONFIG_BLK_DEV_HD is not set
+CONFIG_BLK_DEV_IDEDISK=y
+# CONFIG_IDEDISK_MULTI_MODE is not set
+# CONFIG_BLK_DEV_IDEDISK_VENDOR is not set
+# CONFIG_BLK_DEV_IDEDISK_FUJITSU is not set
+# CONFIG_BLK_DEV_IDEDISK_IBM is not set
+# CONFIG_BLK_DEV_IDEDISK_MAXTOR is not set
+# CONFIG_BLK_DEV_IDEDISK_QUANTUM is not set
+# CONFIG_BLK_DEV_IDEDISK_SEAGATE is not set
+# CONFIG_BLK_DEV_IDEDISK_WD is not set
+# CONFIG_BLK_DEV_COMMERIAL is not set
+# CONFIG_BLK_DEV_TIVO is not set
+# CONFIG_BLK_DEV_IDECS is not set
+CONFIG_BLK_DEV_IDECD=y
+# CONFIG_BLK_DEV_IDETAPE is not set
+CONFIG_BLK_DEV_IDEFLOPPY=y
+# CONFIG_BLK_DEV_IDESCSI is not set
+
+#
+# IDE chipset support/bugfixes
+#
+# CONFIG_BLK_DEV_CMD640 is not set
+# CONFIG_BLK_DEV_CMD640_ENHANCED is not set
+# CONFIG_BLK_DEV_ISAPNP is not set
+# CONFIG_BLK_DEV_RZ1000 is not set
+CONFIG_BLK_DEV_IDEPCI=y
+# CONFIG_IDEPCI_SHARE_IRQ is not set
+CONFIG_BLK_DEV_IDEDMA_PCI=y
+CONFIG_BLK_DEV_ADMA=y
+# CONFIG_BLK_DEV_OFFBOARD is not set
+# CONFIG_IDEDMA_PCI_AUTO is not set
+CONFIG_BLK_DEV_IDEDMA=y
+# CONFIG_IDEDMA_PCI_WIP is not set
+# CONFIG_IDEDMA_NEW_DRIVE_LISTINGS is not set
+# CONFIG_BLK_DEV_AEC62XX is not set
+# CONFIG_AEC62XX_TUNING is not set
+# CONFIG_BLK_DEV_ALI15X3 is not set
+# CONFIG_WDC_ALI15X3 is not set
+# CONFIG_BLK_DEV_AMD74XX is not set
+# CONFIG_AMD74XX_OVERRIDE is not set
+# CONFIG_BLK_DEV_CMD64X is not set
+# CONFIG_BLK_DEV_CY82C693 is not set
+# CONFIG_BLK_DEV_CS5530 is not set
+# CONFIG_BLK_DEV_HPT34X is not set
+# CONFIG_HPT34X_AUTODMA is not set
+# CONFIG_BLK_DEV_HPT366 is not set
+# CONFIG_BLK_DEV_PIIX is not set
+# CONFIG_PIIX_TUNING is not set
+# CONFIG_BLK_DEV_NS87415 is not set
+# CONFIG_BLK_DEV_OPTI621 is not set
+# CONFIG_BLK_DEV_PDC202XX is not set
+# CONFIG_PDC202XX_BURST is not set
+# CONFIG_PDC202XX_FORCE is not set
+# CONFIG_BLK_DEV_SVWKS is not set
+# CONFIG_BLK_DEV_SIS5513 is not set
+# CONFIG_BLK_DEV_SLC90E66 is not set
+# CONFIG_BLK_DEV_TRM290 is not set
+# CONFIG_BLK_DEV_VIA82CXXX is not set
+# CONFIG_IDE_CHIPSETS is not set
+# CONFIG_IDEDMA_AUTO is not set
+# CONFIG_IDEDMA_IVB is not set
+# CONFIG_DMA_NONPCI is not set
+# CONFIG_BLK_DEV_IDE_MODES is not set
+# CONFIG_BLK_DEV_ATARAID is not set
+# CONFIG_BLK_DEV_ATARAID_PDC is not set
+# CONFIG_BLK_DEV_ATARAID_HPT is not set
+
+#
+# Alternate 1394 support
+#
+# CONFIG_X1394 is not set
+
+#
+# Alternate SCSI support
+#
+# CONFIG_XSCSI is not set
+
+#
+# SCSI support
+#
+CONFIG_SCSI=y
+
+#
+# SCSI support type (disk, tape, CD-ROM)
+#
+CONFIG_BLK_DEV_SD=y
+CONFIG_SD_EXTRA_DEVS=40
+# CONFIG_CHR_DEV_ST is not set
+# CONFIG_CHR_DEV_OSST is not set
+# CONFIG_BLK_DEV_SR is not set
+# CONFIG_CHR_DEV_SG is not set
+
+#
+# Some SCSI devices (e.g. CD jukebox) support multiple LUNs
+#
+# CONFIG_SCSI_DEBUG_QUEUES is not set
+CONFIG_SCSI_MULTI_LUN=y
+CONFIG_SCSI_CONSTANTS=y
+CONFIG_SCSI_LOGGING=y
+
+#
+# SCSI low-level drivers
+#
+# CONFIG_BLK_DEV_3W_XXXX_RAID is not set
+# CONFIG_SCSI_7000FASST is not set
+# CONFIG_SCSI_ACARD is not set
+# CONFIG_SCSI_AHA152X is not set
+# CONFIG_SCSI_AHA1542 is not set
+# CONFIG_SCSI_AHA1740 is not set
+# CONFIG_SCSI_AIC7XXX is not set
+# CONFIG_SCSI_AIC7XXX_OLD is not set
+# CONFIG_SCSI_DPT_I2O is not set
+# CONFIG_SCSI_ADVANSYS is not set
+# CONFIG_SCSI_IN2000 is not set
+# CONFIG_SCSI_AM53C974 is not set
+# CONFIG_SCSI_MEGARAID is not set
+# CONFIG_SCSI_BUSLOGIC is not set
+# CONFIG_SCSI_CPQFCTS is not set
+# CONFIG_SCSI_DMX3191D is not set
+# CONFIG_SCSI_DTC3280 is not set
+# CONFIG_SCSI_EATA is not set
+# CONFIG_SCSI_EATA_DMA is not set
+# CONFIG_SCSI_EATA_PIO is not set
+# CONFIG_SCSI_FUTURE_DOMAIN is not set
+# CONFIG_SCSI_GDTH is not set
+# CONFIG_SCSI_GENERIC_NCR5380 is not set
+# CONFIG_SCSI_INITIO is not set
+# CONFIG_SCSI_INIA100 is not set
+# CONFIG_SCSI_NCR53C406A is not set
+# CONFIG_SCSI_NCR53C7xx is not set
+# CONFIG_SCSI_NCR53C8XX is not set
+# CONFIG_SCSI_SYM53C8XX is not set
+# CONFIG_SCSI_PAS16 is not set
+# CONFIG_SCSI_PCI2000 is not set
+# CONFIG_SCSI_PCI2220I is not set
+# CONFIG_SCSI_PSI240I is not set
+# CONFIG_SCSI_QLOGIC_FAS is not set
+# CONFIG_SCSI_QLOGIC_ISP is not set
+# CONFIG_SCSI_QLOGIC_FC is not set
+CONFIG_SCSI_QLOGIC_1280=y
+# CONFIG_SCSI_QLOGIC_QLA2100 is not set
+# CONFIG_SCSI_SIM710 is not set
+# CONFIG_SCSI_SYM53C416 is not set
+# CONFIG_SCSI_DC390T is not set
+# CONFIG_SCSI_T128 is not set
+# CONFIG_SCSI_U14_34F is not set
+# CONFIG_SCSI_DEBUG is not set
+
+#
+# Network device support
+#
+CONFIG_NETDEVICES=y
+
+#
+# ARCnet devices
+#
+# CONFIG_ARCNET is not set
+CONFIG_DUMMY=y
+# CONFIG_BONDING is not set
+# CONFIG_EQUALIZER is not set
+# CONFIG_TUN is not set
+
+#
+# Ethernet (10 or 100Mbit)
+#
+CONFIG_NET_ETHERNET=y
+# CONFIG_SUNLANCE is not set
+# CONFIG_HAPPYMEAL is not set
+# CONFIG_SUNBMAC is not set
+# CONFIG_SUNQE is not set
+# CONFIG_SUNLANCE is not set
+# CONFIG_SUNGEM is not set
+# CONFIG_NET_VENDOR_3COM is not set
+# CONFIG_LANCE is not set
+# CONFIG_NET_VENDOR_SMC is not set
+# CONFIG_NET_VENDOR_RACAL is not set
+# CONFIG_HP100 is not set
+# CONFIG_NET_ISA is not set
+CONFIG_NET_PCI=y
+# CONFIG_PCNET32 is not set
+# CONFIG_ADAPTEC_STARFIRE is not set
+# CONFIG_APRICOT is not set
+# CONFIG_CS89x0 is not set
+# CONFIG_TULIP is not set
+# CONFIG_DE4X5 is not set
+# CONFIG_DGRS is not set
+# CONFIG_DM9102 is not set
+CONFIG_EEPRO100=y
+# CONFIG_LNE390 is not set
+# CONFIG_FEALNX is not set
+# CONFIG_NATSEMI is not set
+# CONFIG_NE2K_PCI is not set
+# CONFIG_NE3210 is not set
+# CONFIG_ES3210 is not set
+# CONFIG_8139CP is not set
+# CONFIG_8139TOO is not set
+# CONFIG_8139TOO_PIO is not set
+# CONFIG_8139TOO_TUNE_TWISTER is not set
+# CONFIG_8139TOO_8129 is not set
+# CONFIG_SIS900 is not set
+# CONFIG_EPIC100 is not set
+# CONFIG_SUNDANCE is not set
+# CONFIG_TLAN is not set
+# CONFIG_VIA_RHINE is not set
+# CONFIG_WINBOND_840 is not set
+# CONFIG_NET_POCKET is not set
+
+#
+# Ethernet (1000 Mbit)
+#
+# CONFIG_ACENIC is not set
+# CONFIG_DL2K is not set
+# CONFIG_MYRI_SBUS is not set
+# CONFIG_NS83820 is not set
+# CONFIG_HAMACHI is not set
+# CONFIG_YELLOWFIN is not set
+# CONFIG_SK98LIN is not set
+# CONFIG_FDDI is not set
+# CONFIG_HIPPI is not set
+# CONFIG_PLIP is not set
+# CONFIG_PPP is not set
+# CONFIG_SLIP is not set
+
+#
+# Wireless LAN (non-hamradio)
+#
+# CONFIG_NET_RADIO is not set
+
+#
+# Token Ring devices
+#
+# CONFIG_TR is not set
+# CONFIG_NET_FC is not set
+# CONFIG_RCPCI is not set
+# CONFIG_SHAPER is not set
+
+#
+# Wan interfaces
+#
+# CONFIG_WAN is not set
+
+#
+# Amateur Radio support
+#
+# CONFIG_HAMRADIO is not set
+
+#
+# ISDN subsystem
+#
+# CONFIG_ISDN is not set
+
+#
+# CD-ROM drivers (not for SCSI or IDE/ATAPI drives)
+#
+# CONFIG_CD_NO_IDESCSI is not set
+
+#
+# Input core support
+#
+# CONFIG_INPUT is not set
+# CONFIG_INPUT_KEYBDEV is not set
+# CONFIG_INPUT_MOUSEDEV is not set
+# CONFIG_INPUT_JOYDEV is not set
+# CONFIG_INPUT_EVDEV is not set
+
+#
+# Character devices
+#
+CONFIG_VT=y
+CONFIG_VT_CONSOLE=y
+CONFIG_SERIAL=y
+CONFIG_SERIAL_CONSOLE=y
+# CONFIG_SERIAL_EXTENDED is not set
+# CONFIG_SERIAL_NONSTANDARD is not set
+CONFIG_UNIX98_PTYS=y
+CONFIG_UNIX98_PTY_COUNT=256
+
+#
+# I2C support
+#
+# CONFIG_I2C is not set
+
+#
+# Mice
+#
+# CONFIG_BUSMOUSE is not set
+CONFIG_MOUSE=y
+CONFIG_PSMOUSE=y
+# CONFIG_82C710_MOUSE is not set
+# CONFIG_PC110_PAD is not set
+
+#
+# Joysticks
+#
+# CONFIG_INPUT_GAMEPORT is not set
+
+#
+# Input core support is needed for gameports
+#
+
+#
+# Input core support is needed for joysticks
+#
+# CONFIG_QIC02_TAPE is not set
+
+#
+# Watchdog Cards
+#
+# CONFIG_WATCHDOG is not set
+# CONFIG_INTEL_RNG is not set
+# CONFIG_NVRAM is not set
+# CONFIG_RTC is not set
+# CONFIG_EFI_RTC is not set
+# CONFIG_DTLK is not set
+# CONFIG_R3964 is not set
+# CONFIG_APPLICOM is not set
+
+#
+# Ftape, the floppy tape device driver
+#
+# CONFIG_FTAPE is not set
+# CONFIG_AGP is not set
+# CONFIG_DRM is not set
+# CONFIG_MWAVE is not set
+
+#
+# Multimedia devices
+#
+# CONFIG_VIDEO_DEV is not set
+
+#
+# File systems
+#
+# CONFIG_QUOTA is not set
+CONFIG_AUTOFS_FS=y
+CONFIG_AUTOFS4_FS=y
+# CONFIG_REISERFS_FS is not set
+# CONFIG_REISERFS_CHECK is not set
+# CONFIG_ADFS_FS is not set
+# CONFIG_ADFS_FS_RW is not set
+# CONFIG_AFFS_FS is not set
+# CONFIG_HFS_FS is not set
+# CONFIG_BFS_FS is not set
+CONFIG_FAT_FS=y
+CONFIG_MSDOS_FS=y
+# CONFIG_UMSDOS_FS is not set
+CONFIG_VFAT_FS=y
+# CONFIG_EFS_FS is not set
+# CONFIG_JFFS_FS is not set
+# CONFIG_JFFS2_FS is not set
+# CONFIG_CRAMFS is not set
+CONFIG_TMPFS=y
+# CONFIG_RAMFS is not set
+CONFIG_ISO9660_FS=y
+CONFIG_JOLIET=y
+# CONFIG_MINIX_FS is not set
+# CONFIG_VXFS_FS is not set
+# CONFIG_NTFS_FS is not set
+# CONFIG_NTFS_RW is not set
+# CONFIG_HPFS_FS is not set
+CONFIG_PROC_FS=y
+CONFIG_DEVFS_FS=y
+CONFIG_DEVFS_MOUNT=y
+CONFIG_DEVFS_DEBUG=y
+CONFIG_DEVPTS_FS=y
+# CONFIG_QNX4FS_FS is not set
+# CONFIG_QNX4FS_RW is not set
+# CONFIG_ROMFS_FS is not set
+CONFIG_EXT2_FS=y
+# CONFIG_SYSV_FS is not set
+# CONFIG_UDF_FS is not set
+# CONFIG_UDF_RW is not set
+# CONFIG_UFS_FS is not set
+# CONFIG_UFS_FS_WRITE is not set
+# CONFIG_XFS_SUPPORT is not set
+
+#
+# Network File Systems
+#
+# CONFIG_CODA_FS is not set
+CONFIG_NFS_FS=y
+CONFIG_NFS_V3=y
+# CONFIG_ROOT_NFS is not set
+CONFIG_NFSD=y
+CONFIG_NFSD_V3=y
+CONFIG_SUNRPC=y
+CONFIG_LOCKD=y
+CONFIG_LOCKD_V4=y
+# CONFIG_SMB_FS is not set
+# CONFIG_NCP_FS is not set
+# CONFIG_NCPFS_PACKET_SIGNING is not set
+# CONFIG_NCPFS_IOCTL_LOCKING is not set
+# CONFIG_NCPFS_STRONG is not set
+# CONFIG_NCPFS_NFS_NS is not set
+# CONFIG_NCPFS_OS2_NS is not set
+# CONFIG_NCPFS_SMALLDOS is not set
+# CONFIG_NCPFS_NLS is not set
+# CONFIG_NCPFS_EXTRAS is not set
+
+#
+# Partition Types
+#
+# CONFIG_PARTITION_ADVANCED is not set
+CONFIG_MSDOS_PARTITION=y
+# CONFIG_SMB_NLS is not set
+CONFIG_NLS=y
+
+#
+# Native Language Support
+#
+CONFIG_NLS_DEFAULT="iso8859-1"
+# CONFIG_NLS_CODEPAGE_437 is not set
+# CONFIG_NLS_CODEPAGE_737 is not set
+# CONFIG_NLS_CODEPAGE_775 is not set
+# CONFIG_NLS_CODEPAGE_850 is not set
+# CONFIG_NLS_CODEPAGE_852 is not set
+# CONFIG_NLS_CODEPAGE_855 is not set
+# CONFIG_NLS_CODEPAGE_857 is not set
+# CONFIG_NLS_CODEPAGE_860 is not set
+# CONFIG_NLS_CODEPAGE_861 is not set
+# CONFIG_NLS_CODEPAGE_862 is not set
+# CONFIG_NLS_CODEPAGE_863 is not set
+# CONFIG_NLS_CODEPAGE_864 is not set
+# CONFIG_NLS_CODEPAGE_865 is not set
+# CONFIG_NLS_CODEPAGE_866 is not set
+# CONFIG_NLS_CODEPAGE_869 is not set
+# CONFIG_NLS_CODEPAGE_936 is not set
+# CONFIG_NLS_CODEPAGE_950 is not set
+# CONFIG_NLS_CODEPAGE_932 is not set
+# CONFIG_NLS_CODEPAGE_949 is not set
+# CONFIG_NLS_CODEPAGE_874 is not set
+# CONFIG_NLS_ISO8859_8 is not set
+# CONFIG_NLS_CODEPAGE_1251 is not set
+# CONFIG_NLS_ISO8859_1 is not set
+# CONFIG_NLS_ISO8859_2 is not set
+# CONFIG_NLS_ISO8859_3 is not set
+# CONFIG_NLS_ISO8859_4 is not set
+# CONFIG_NLS_ISO8859_5 is not set
+# CONFIG_NLS_ISO8859_6 is not set
+# CONFIG_NLS_ISO8859_7 is not set
+# CONFIG_NLS_ISO8859_9 is not set
+# CONFIG_NLS_ISO8859_13 is not set
+# CONFIG_NLS_ISO8859_14 is not set
+# CONFIG_NLS_ISO8859_15 is not set
+# CONFIG_NLS_KOI8_R is not set
+# CONFIG_NLS_KOI8_U is not set
+# CONFIG_NLS_UTF8 is not set
+
+#
+# Console drivers
+#
+CONFIG_VGA_CONSOLE=y
+
+#
+# Frame-buffer support
+#
+# CONFIG_FB is not set
+
+#
+# Sound
+#
+# CONFIG_SOUND is not set
+
+#
+# USB support
+#
+# CONFIG_USB is not set
+
+#
+# USB Controllers
+#
+# CONFIG_USB_UHCI is not set
+# CONFIG_USB_UHCI_ALT is not set
+# CONFIG_USB_OHCI is not set
+
+#
+# USB Device Class drivers
+#
+# CONFIG_USB_AUDIO is not set
+# CONFIG_USB_BLUETOOTH is not set
+# CONFIG_USB_STORAGE is not set
+# CONFIG_USB_STORAGE_DEBUG is not set
+# CONFIG_USB_STORAGE_DATAFAB is not set
+# CONFIG_USB_STORAGE_FREECOM is not set
+# CONFIG_USB_STORAGE_ISD200 is not set
+# CONFIG_USB_STORAGE_DPCM is not set
+# CONFIG_USB_STORAGE_HP8200e is not set
+# CONFIG_USB_STORAGE_SDDR09 is not set
+# CONFIG_USB_STORAGE_JUMPSHOT is not set
+# CONFIG_USB_ACM is not set
+# CONFIG_USB_PRINTER is not set
+
+#
+# USB Human Interface Devices (HID)
+#
+
+#
+#   Input core support is needed for USB HID
+#
+
+#
+# USB Imaging devices
+#
+# CONFIG_USB_DC2XX is not set
+# CONFIG_USB_MDC800 is not set
+# CONFIG_USB_SCANNER is not set
+# CONFIG_USB_MICROTEK is not set
+# CONFIG_USB_HPUSBSCSI is not set
+
+#
+# USB Multimedia devices
+#
+
+#
+#   Video4Linux support is needed for USB Multimedia device support
+#
+
+#
+# USB Network adaptors
+#
+# CONFIG_USB_PEGASUS is not set
+# CONFIG_USB_KAWETH is not set
+# CONFIG_USB_CATC is not set
+# CONFIG_USB_CDCETHER is not set
+# CONFIG_USB_USBNET is not set
+
+#
+# USB port drivers
+#
+# CONFIG_USB_USS720 is not set
+
+#
+# USB Serial Converter support
+#
+# CONFIG_USB_SERIAL is not set
+# CONFIG_USB_SERIAL_GENERIC is not set
+# CONFIG_USB_SERIAL_BELKIN is not set
+# CONFIG_USB_SERIAL_WHITEHEAT is not set
+# CONFIG_USB_SERIAL_DIGI_ACCELEPORT is not set
+# CONFIG_USB_SERIAL_EMPEG is not set
+# CONFIG_USB_SERIAL_FTDI_SIO is not set
+# CONFIG_USB_SERIAL_VISOR is not set
+# CONFIG_USB_SERIAL_IR is not set
+# CONFIG_USB_SERIAL_EDGEPORT is not set
+# CONFIG_USB_SERIAL_KEYSPAN_PDA is not set
+# CONFIG_USB_SERIAL_KEYSPAN is not set
+# CONFIG_USB_SERIAL_KEYSPAN_USA28 is not set
+# CONFIG_USB_SERIAL_KEYSPAN_USA28X is not set
+# CONFIG_USB_SERIAL_KEYSPAN_USA28XA is not set
+# CONFIG_USB_SERIAL_KEYSPAN_USA28XB is not set
+# CONFIG_USB_SERIAL_KEYSPAN_USA19 is not set
+# CONFIG_USB_SERIAL_KEYSPAN_USA18X is not set
+# CONFIG_USB_SERIAL_KEYSPAN_USA19W is not set
+# CONFIG_USB_SERIAL_KEYSPAN_USA49W is not set
+# CONFIG_USB_SERIAL_MCT_U232 is not set
+# CONFIG_USB_SERIAL_PL2303 is not set
+# CONFIG_USB_SERIAL_CYBERJACK is not set
+# CONFIG_USB_SERIAL_XIRCOM is not set
+# CONFIG_USB_SERIAL_OMNINET is not set
+
+#
+# USB Miscellaneous drivers
+#
+# CONFIG_USB_RIO500 is not set
+
+#
+# IEEE 1394 (FireWire) support (EXPERIMENTAL)
+#
+# CONFIG_IEEE1394 is not set
+
+#
+# Bluetooth support
+#
+# CONFIG_BLUEZ is not set
+
+#
+# Kernel hacking
+#
+CONFIG_DEBUG_KERNEL=y
+CONFIG_IA64_PRINT_HAZARDS=y
+# CONFIG_DISABLE_VHPT is not set
+CONFIG_MAGIC_SYSRQ=y
+CONFIG_IA64_EARLY_PRINTK=y
+# CONFIG_DEBUG_SLAB is not set
+# CONFIG_DEBUG_SPINLOCK is not set
+# CONFIG_IA64_DEBUG_CMPXCHG is not set
+# CONFIG_IA64_DEBUG_IRQ is not set
+# CONFIG_KDB is not set
+# CONFIG_KDB_MODULES is not set
+# CONFIG_KALLSYMS is not set
diff -Nru linux/arch/ia64/sn/configs/sn1/defconfig-dig-mp linux-2.4.19-pre5-mjc/arch/ia64/sn/configs/sn1/defconfig-dig-mp
--- linux/arch/ia64/sn/configs/sn1/defconfig-dig-mp	Wed Dec 31 19:00:00 1969
+++ linux-2.4.19-pre5-mjc/arch/ia64/sn/configs/sn1/defconfig-dig-mp	Sat Apr  6 08:26:00 2002
@@ -0,0 +1,459 @@
+#
+# Automatically generated make config: don't edit
+#
+
+#
+# Code maturity level options
+#
+# CONFIG_EXPERIMENTAL is not set
+
+#
+# Loadable module support
+#
+# CONFIG_MODULES is not set
+
+#
+# General setup
+#
+CONFIG_IA64=y
+# CONFIG_ISA is not set
+# CONFIG_EISA is not set
+# CONFIG_MCA is not set
+# CONFIG_SBUS is not set
+CONFIG_RWSESlot 10 - unused */
  	0,	/* Slot 11 - unused */
  	3,	/* Slot 12 - SCSI */
  	0,	/* Slot 13 - unused */
  	1,	/* Slot 14 - Ethernet */
  	0,	/* Slot 15 - unused */
};

static char Genesis_pci_IRQ_routes[] __prepdata =
{
   	0,	/* Line 0 - Unused */
   	10,	/* Line 1 */
   	11,	/* Line 2 */
   	14,	/* Line 3 */
   	15	/* Line 4 */
};
   
static char Genesis2_pci_IRQ_map[23] __prepdata =
{
	0,	/* Slot 0  - unused */
	0,	/* Slot 1  - unused */
	0,	/* Slot 2  - unused */
	0,	/* Slot 3  - unused */
	0,	/* Slot 4  - unused */
	0,	/* Slot 5  - unused */
	0,	/* Slot 6  - unused */
	0,	/* Slot 7  - unused */
	0,	/* Slot 8  - unused */
	0,	/* Slot 9  - unused */
	0,	/* Slot 10 - Ethernet */
	0,	/* Slot 11 - Universe PCI - VME Bridge */
	3,	/* Slot 12 - unused */
	0,	/* Slot 13 - unused */
	2,	/* Slot 14 - SCSI */
	0,	/* Slot 15 - unused */
	9,	/* Slot 16 - PMC 1 */
	12,	/* Slot 17 - pci */
	11,	/* Slot 18 - pci */
	10,	/* Slot 19 - pci */
	0,	/* Slot 20 - pci */
	0,	/* Slot 21 - unused */
	0,	/* Slot 22 - unused */
};

/* Motorola Series-E */
static char Comet_pci_IRQ_map[23] __prepdata =
{
  	0,	/* Slot 0  - unused */
  	0,	/* Slot 1  - unused */
  	0,	/* Slot 2  - unused */
  	0,	/* Slot 3  - unused */
  	0,	/* Slot 4  - unused */
  	0,	/* Slot 5  - unused */
  	0,	/* Slot 6  - unused */
  	0,	/* Slot 7  - unused */
  	0,	/* Slot 8  - unused */
  	0,	/* Slot 9  - unused */
  	0,	/* Slot 10 - unused */
  	0,	/* Slot 11 - unused */
  	3,	/* Slot 12 - SCSI */
  	0,	/* Slot 13 - unused */
  	1,	/* Slot 14 - Ethernet */
  	0,	/* Slot 15 - unused */
	1,	/* Slot 16 - PCI slot 1 */
	2,	/* Slot 17 - PCI slot 2 */
	3,	/* Slot 18 - PCI slot 3 */
	4,	/* Slot 19 - PCI bridge */
	0,
	0,
	0,
};

static char Comet_pci_IRQ_routes[] __prepdata =
{
   	0,	/* Line 0 - Unused */
   	10,	/* Line 1 */
   	11,	/* Line 2 */
   	14,	/* Line 3 */
   	15	/* Line 4 */
};

/* Motorola Series-EX */
static char Comet2_pci_IRQ_map[23] __prepdata =
{
	0,	/* Slot 0  - unused */
	0,	/* Slot 1  - unused */
	3,	/* Slot 2  - SCSI - NCR825A */
	0,	/* Slot 3  - unused */
	1,	/* Slot 4  - Ethernet - DEC2104X */
	0,	/* Slot 5  - unused */
	1,	/* Slot 6  - PCI slot 1 */
	2,	/* Slot 7  - PCI slot 2 */
	3,	/* Slot 8  - PCI slot 3 */
	4,	/* Slot 9  - PCI bridge  */
	0,	/* Slot 10 - unused */
	0,	/* Slot 11 - unused */
	3,	/* Slot 12 - SCSI - NCR825A */
	0,	/* Slot 13 - unused */
	1,	/* Slot 14 - Ethernet - DEC2104X */
	0,	/* Slot 15 - unused */
	1,	/* Slot 16 - PCI slot 1 */
	2,	/* Slot 17 - PCI slot 2 */
	3,	/* Slot 18 - PCI slot 3 */
	4,	/* Slot 19 - PCI bridge */
	0,
	0,
	0,
};

static char Comet2_pci_IRQ_routes[] __prepdata =
{
	0,	/* Line 0 - Unused */
	10,	/* Line 1 */
	11,	/* Line 2 */
	14,	/* Line 3 */
	15,	/* Line 4 */
};

/*
 * ibm 830 (and 850?).
 * This is actually based on the Carolina motherboard
 * -- Cort
 */
static char ibm8xx_pci_IRQ_map[23] __prepdata = {
        0, /* Slot 0  - unused */
        0, /* Slot 1  - unused */
        0, /* Slot 2  - unused */
        0, /* Slot 3  - unused */
        0, /* Slot 4  - unused */
        0, /* Slot 5  - unused */
        0, /* Slot 6  - unused */
        0, /* Slot 7  - unused */
        0, /* Slot 8  - unused */
        0, /* Slot 9  - unused */
        0, /* Slot 10 - unused */
        0, /* Slot 11 - FireCoral */
        4, /* Slot 12 - Ethernet  PCIINTD# */
        2, /* Slot 13 - PCI Slot #2 */
        2, /* Slot 14 - S3 Video PCIINTD# */
        0, /* Slot 15 - onboard SCSI (INDI) [1] */
        3, /* Slot 16 - NCR58C810 RS6000 Only PCIINTC# */
        0, /* Slot 17 - unused */
        2, /* Slot 18 - PCI Slot 2 PCIINTx# (See below) */
        0, /* Slot 19 - unused */
        0, /* Slot 20 - unused */
        0, /* Slot 21 - unused */
        2, /* Slot 22 - PCI slot 1 PCIINTx# (See below) */
};

static char ibm8xx_pci_IRQ_routes[] __prepdata = {
        0,      /* Line 0 - unused */
        15,     /* Line 1 */
        15,     /* Line 2 */
        15,     /* Line 3 */
        15,     /* Line 4 */
};

/*
 * a 6015 ibm board
 * -- Cort
 */
static char ibm6015_pci_IRQ_map[23] __prepdata = {
        0, /* Slot 0  - unused */
        0, /* Slot 1  - unused */
        0, /* Slot 2  - unused */
        0, /* Slot 3  - unused */
        0, /* Slot 4  - unused */
        0, /* Slot 5  - unused */
        0, /* Slot 6  - unused */
        0, /* Slot 7  - unused */
        0, /* Slot 8  - unused */
        0, /* Slot 9  - unused */
        0, /* Slot 10 - unused */
        0, /* Slot 11 -  */
        1, /* Slot 12 - SCSI */
        2, /* Slot 13 -  */
        2, /* Slot 14 -  */
        1, /* Slot 15 -  */
        1, /* Slot 16 -  */
        0, /* Slot 17 -  */
        2, /* Slot 18 -  */
        0, /* Slot 19 -  */
        0, /* Slot 20 -  */
        0, /* Slot 21 -  */
        2, /* Slot 22 -  */
};

static char ibm6015_pci_IRQ_routes[] __prepdata = {
        0,      /* Line 0 - unused */
        13,     /* Line 1 */
        15,     /* Line 2 */
        15,     /* Line 3 */
        15,     /* Line 4 */
};


/* IBM Nobis and Thinkpad 850 */
static char Nobis_pci_IRQ_map[23] __prepdata ={
        0, /* Slot 0  - unused */
        0, /* Slot 1  - unused */
        0, /* Slot 2  - unused */
        0, /* Slot 3  - unused */
        0, /* Slot 4  - unused */
        0, /* Slot 5  - unused */
        0, /* Slot 6  - unused */
        0, /* Slot 7  - unused */
        0, /* Slot 8  - unused */
        0, /* Slot 9  - unused */
        0, /* Slot 10 - unused */
        0, /* Slot 11 - unused */
        3, /* Slot 12 - SCSI */
        0, /* Slot 13 - unused */
        0, /* Slot 14 - unused */
        0, /* Slot 15 - unused */
};

static char Nobis_pci_IRQ_routes[] __prepdata = {
        0, /* Line 0 - Unused */
        13, /* Line 1 */
        13, /* Line 2 */
        13, /* Line 3 */
        13      /* Line 4 */
};

/*
 * IBM RS/6000 43p/140  -- paulus
 * XXX we should get all this from the residual data
 */
static char ibm43p_pci_IRQ_map[23] __prepdata = {
        0, /* Slot 0  - unused */
        0, /* Slot 1  - unused */
        0, /* Slot 2  - unused */
        0, /* Slot 3  - unused */
        0, /* Slot 4  - unused */
        0, /* Slot 5  - unused */
        0, /* Slot 6  - unused */
        0, /* Slot 7  - unused */
        0, /* Slot 8  - unused */
        0, /* Slot 9  - unused */
        0, /* Slot 10 - unused */
        0, /* Slot 11 - FireCoral ISA bridge */
        6, /* Slot 12 - Ethernet  */
        0, /* Slot 13 - openpic */
        0, /* Slot 14 - unused */
        0, /* Slot 15 - unused */
        7, /* Slot 16 - NCR58C825a onboard scsi */
        0, /* Slot 17 - unused */
        2, /* Slot 18 - PCI Slot 2 PCIINTx# (See below) */
        0, /* Slot 19 - unused */
        0, /* Slot 20 - unused */
        0, /* Slot 21 - unused */
        1, /* Slot 22 - PCI slot 1 PCIINTx# (See below) */
};

static char ibm43p_pci_IRQ_routes[] __prepdata = {
        0,      /* Line 0 - unused */
        15,     /* Line 1 */
        15,     /* Line 2 */
        15,     /* Line 3 */
        15,     /* Line 4 */
};

/* Motorola PowerPlus architecture PCI IRQ tables */
/* Interrupt line values for INTA-D on primary/secondary MPIC inputs */

struct powerplus_irq_list
{
	unsigned char primary[4];       /* INT A-D */
	unsigned char secondary[4];     /* INT A-D */
};

/*
 * For standard PowerPlus boards, bus 0 PCI INTs A-D are routed to
 * OpenPIC inputs 9-12.  PCI INTs A-D from the on board P2P bridge
 * are routed to OpenPIC inputs 5-8.  These values are offset by
 * 16 in the table to reflect the Linux kernel interrupt value.
 */
struct powerplus_irq_list Powerplus_pci_IRQ_list __prepdata =
{
	{25, 26, 27, 28},
	{21, 22, 23, 24}
};

/*
 * For the MCP750 (system slot board), cPCI INTs A-D are routed to
 * OpenPIC inputs 8-11 and the PMC INTs A-D are routed to OpenPIC
 * input 3.  On a hot swap MCP750, the companion card PCI INTs A-D
 * are routed to OpenPIC inputs 12-15. These values are offset by
 * 16 in the table to reflect the Linux kernel interrupt value.
 */
struct powerplus_irq_list Mesquite_pci_IRQ_list __prepdata =
{
	{24, 25, 26, 27},
	{28, 29, 30, 31}
};

/*
 * This table represents the standard PCI swizzle defined in the
 * PCI bus specification.
 */
static unsigned char prep_pci_intpins[4][4] __prepdata =
{
	{ 1, 2, 3, 4},  /* Buses 0, 4, 8, ... */
	{ 2, 3, 4, 1},  /* Buses 1, 5, 9, ... */
	{ 3, 4, 1, 2},  /* Buses 2, 6, 10 ... */
	{ 4, 1, 2, 3},  /* Buses 3, 7, 11 ... */
};

/* We have to turn on LEVEL mode for changed IRQ's */
/* All PCI IRQ's need to be level mode, so this should be something
 * other than hard-coded as well... IRQ's are individually mappable
 * to either edge or level.
 */

/*
 * 8259 edge/level control definitions
 */
#define ISA8259_M_ELCR 0x4d0
#define ISA8259_S_ELCR 0x4d1

#define ELCRS_INT15_LVL         0x80
#define ELCRS_INT14_LVL         0x40
#define ELCRS_INT12_LVL         0x10
#define ELCRS_INT11_LVL         0x08
#define ELCRS_INT10_LVL         0x04
#define ELCRS_INT9_LVL          0x02
#define ELCRS_INT8_LVL          0x01
#define ELCRM_INT7_LVL          0x80
#define ELCRM_INT5_LVL          0x20

#define CFGPTR(dev) (0x80800000 | (1<<(dev>>3)) | ((dev&7)<<8) | offset)
#define DEVNO(dev)  (dev>>3)                                  

#define cfg_read(val, addr, type, op)	*val = op((type)(addr))
#define cfg_write(val, addr, type, op)	op((type *)(addr), (val))

#define cfg_read_bad(val, size)		*val = bad_##size;
#define cfg_write_bad(val, size)

#define bad_byte	0xff
#define bad_word	0xffff
#define bad_dword	0xffffffffU

#define PREP_PCI_OP(rw, size, type, op)					\
static int __prep							\
prep_##rw##_config_##size(struct pci_dev *dev, int offset, type val)	\
{									\
	if ((dev->bus->number != 0) || (DEVNO(dev->devfn) > MAX_DEVNR))	\
	{                   						\
		cfg_##rw##_bad(val, size)				\
		return PCIBIOS_DEVICE_NOT_FOUND;    			\
	}								\
	cfg_##rw(val, CFGPTR(dev->devfn), type, op);			\
	return PCIBIOS_SUCCESSFUL;					\
}

PREP_PCI_OP(read, byte, u8 *, in_8)
PREP_PCI_OP(read, word, u16 *, in_le16)
PREP_PCI_OP(read, dword, u32 *, in_le32)
PREP_PCI_OP(write, byte, u8, out_8)
PREP_PCI_OP(write, word, u16, out_le16)
PREP_PCI_OP(write, dword, u32, out_le32)

static struct pci_ops prep_pci_ops =
{
	prep_read_config_byte,
	prep_read_config_word,
	prep_read_config_dword,
	prep_write_config_byte,
	prep_write_config_word,
	prep_write_config_dword
};

#define MOTOROLA_CPUTYPE_REG	0x800
#define MOTOROLA_BASETYPE_REG	0x803
#define MPIC_RAVEN_ID		0x48010000
#define	MPIC_HAWK_ID		0x48030000
#define	MOT_PROC2_BIT		0x800

static u_char mvme2600_openpic_initsenses[] __initdata = {
    1,	/* MVME2600_INT_SIO */
    0,	/* MVME2600_INT_FALCN_ECC_ERR */
    1,	/* MVME2600_INT_PCI_ETHERNET */
    1,	/* MVME2600_INT_PCI_SCSI */
    1,	/* MVME2600_INT_PCI_GRAPHICS */
    1,	/* MVME2600_INT_PCI_VME0 */
    1,	/* MVME2600_INT_PCI_VME1 */
    1,	/* MVME2600_INT_PCI_VME2 */
    1,	/* MVME2600_INT_PCI_VME3 */
    1,	/* MVME2600_INT_PCI_INTA */
    1,	/* MVME2600_INT_PCI_INTB */
    1,	/* MVME2600_INT_PCI_INTC */
    1,	/* MVME2600_INT_PCI_INTD */
    1,	/* MVME2600_INT_LM_SIG0 */
    1,	/* MVME2600_INT_LM_SIG1 */
};

#define MOT_RAVEN_PRESENT	0x1
#define MOT_HAWK_PRESENT	0x2

int mot_entry = -1;
int prep_keybd_present = 1;
int MotMPIC;
int mot_multi;

int __init
raven_init(void)
{
	unsigned int	devid;
	unsigned int	pci_membase;
	unsigned char	base_mod;

	/* Check to see if the Raven chip exists. */
	if ( _prep_type != _PREP_Motorola) {
		OpenPIC_Addr = NULL;
		return 0;
	}

	/* Check to see if this board is a type that might have a Raven. */
	if ((inb(MOTOROLA_CPUTYPE_REG) & 0xF0) != 0xE0) {
		OpenPIC_Addr = NULL;
		return 0;
	}

	/* Check the first PCI device to see if it is a Raven. */
	early_read_config_dword(0, 0, 0, PCI_VENDOR_ID, &devid);

	switch (devid & 0xffff0000) {
	case MPIC_RAVEN_ID:
		MotMPIC = MOT_RAVEN_PRESENT;
		break;
	case MPIC_HAWK_ID:
		MotMPIC = MOT_HAWK_PRESENT;
		break;
	default:
		OpenPIC_Addr = NULL;
		return 0;
	}


	/* Read the memory base register. */
	early_read_config_dword(0, 0, 0, PCI_BASE_ADDRESS_1, &pci_membase);

	if (pci_membase == 0) {
		OpenPIC_Addr = NULL;
		return 0;
	}

	/* Map the Raven MPIC registers to virtual memory. */
	OpenPIC_Addr = ioremap(pci_membase+0xC0000000, 0x22000);

	OpenPIC_InitSenses = mvme2600_openpic_initsenses;
	OpenPIC_NumInitSenses = sizeof(mvme2600_openpic_initsenses);

	ppc_md.get_irq = openpic_get_irq;
	
	/* If raven is present on Motorola store the system config register
	 * for later use.
	 */
	ProcInfo = (unsigned long *)ioremap(0xfef80400, 4);

	/* Indicate to system if this is a multiprocessor board */
	if (!(*ProcInfo & MOT_PROC2_BIT)) {
		mot_multi = 1;
	}

	/* This is a hack.  If this is a 2300 or 2400 mot board then there is
	 * no keyboard controller and we have to indicate that.
	 */
	base_mod = inb(MOTOROLA_BASETYPE_REG);
	if ((MotMPIC == MOT_HAWK_PRESENT) || (base_mod == 0xF9) ||
	    (base_mod == 0xFA) || (base_mod == 0xE1))
		prep_keybd_present = 0;

	return 1;
}

struct mot_info {
	int		cpu_type;	/* 0x100 mask assumes for Raven and Hawk boards that the level/edge are set */
					/* 0x200 if this board has a Hawk chip. */
	int		base_type;
	int		max_cpu;	/* ored with 0x80 if this board should be checked for multi CPU */
	const char	*name;
	unsigned char	*map;
	unsigned char	*routes;
	void            (*map_non0_bus)(struct pci_dev *);      /* For boards with more than bus 0 devices. */
	struct powerplus_irq_list *pci_irq_list; /* List of PCI MPIC inputs */
	unsigned char   secondary_bridge_devfn; /* devfn of secondary bus transparent bridge */
} mot_info[] __prepdata = {
	{0x300, 0x00, 0x00, "MVME 2400",			Genesis2_pci_IRQ_map,	Raven_pci_IRQ_routes, Powerplus_Map_Non0, &Powerplus_pci_IRQ_list, 0xFF},
	{0x010, 0x00, 0x00, "Genesis",				Genesis_pci_IRQ_map,	Genesis_pci_IRQ_routes, Powerplus_Map_Non0, &Powerplus_pci_IRQ_list, 0x00},
	{0x020, 0x00, 0x00, "Powerstack (Series E)",		Comet_pci_IRQ_map,	Comet_pci_IRQ_routes, NULL, NULL, 0x00},
	{0x040, 0x00, 0x00, "Blackhawk (Powerstack)",		Blackhawk_pci_IRQ_map,	Blackhawk_pci_IRQ_routes, NULL, NULL, 0x00},
	{0x050, 0x00, 0x00, "Omaha (PowerStack II Pro3000)",	Omaha_pci_IRQ_map,	Omaha_pci_IRQ_routes, NULL, NULL, 0x00},
	{0x060, 0x00, 0x00, "Utah (Powerstack II Pro4000)",	Utah_pci_IRQ_map,	Utah_pci_IRQ_routes, NULL, NULL, 0x00},
	{0x0A0, 0x00, 0x00, "Powerstack (Series EX)",		Comet2_pci_IRQ_map,	Comet2_pci_IRQ_routes, NULL, NULL, 0x00},
	{0x1E0, 0xE0, 0x00, "Mesquite cPCI (MCP750)",		Mesquite_pci_IRQ_map,	Raven_pci_IRQ_routes, Powerplus_Map_Non0, &Mesquite_pci_IRQ_list, 0xFF},
	{0x1E0, 0xE1, 0x00, "Sitka cPCI (MCPN750)",		Sitka_pci_IRQ_map,	Raven_pci_IRQ_routes, Powerplus_Map_Non0, &Powerplus_pci_IRQ_list, 0xFF},
	{0x1E0, 0xE2, 0x00, "Mesquite cPCI (MCP750) w/ HAC",	Mesquite_pci_IRQ_map,	Raven_pci_IRQ_routes, Powerplus_Map_Non0, &Mesquite_pci_IRQ_list, 0xC0},
	{0x1E0, 0xF6, 0x80, "MTX Plus",				MTXplus_pci_IRQ_map,	Raven_pci_IRQ_routes, Powerplus_Map_Non0, &Powerplus_pci_IRQ_list, 0xA0},
	{0x1E0, 0xF6, 0x81, "Dual MTX Plus",			MTXplus_pci_IRQ_map,	Raven_pci_IRQ_routes, Powerplus_Map_Non0, &Powerplus_pci_IRQ_list, 0xA0},
	{0x1E0, 0xF7, 0x80, "MTX wo/ Parallel Port",		MTX_pci_IRQ_map,	Raven_pci_IRQ_routes, Powerplus_Map_Non0, &Powerplus_pci_IRQ_list, 0x00},
	{0x1E0, 0xF7, 0x81, "Dual MTX wo/ Parallel Port",	MTX_pci_IRQ_map,	Raven_pci_IRQ_routes, Powerplus_Map_Non0, &Powerplus_pci_IRQ_list, 0x00},
	{0x1E0, 0xF8, 0x80, "MTX w/ Parallel Port",		MTX_pci_IRQ_map,	Raven_pci_IRQ_routes, Powerplus_Map_Non0, &Powerplus_pci_IRQ_list, 0x00},
	{0x1E0, 0xF8, 0x81, "Dual MTX w/ Parallel Port",	MTX_pci_IRQ_map,	Raven_pci_IRQ_routes, Powerplus_Map_Non0, &Powerplus_pci_IRQ_list, 0x00},
	{0x1E0, 0xF9, 0x00, "MVME 2300",			Genesis2_pci_IRQ_map,	Raven_pci_IRQ_routes, Powerplus_Map_Non0, &Powerplus_pci_IRQ_list, 0xFF},
	{0x1E0, 0xFA, 0x00, "MVME 2300SC/2600",			Genesis2_pci_IRQ_map,	Raven_pci_IRQ_routes, Powerplus_Map_Non0, &Powerplus_pci_IRQ_list, 0xFF},
	{0x1E0, 0xFB, 0x00, "MVME 2600 with MVME712M",		Genesis2_pci_IRQ_map,	Raven_pci_IRQ_routes, Powerplus_Map_Non0, &Powerplus_pci_IRQ_list, 0xFF},
	{0x1E0, 0xFC, 0x00, "MVME 2600/2700 with MVME761",	Genesis2_pci_IRQ_map,	Raven_pci_IRQ_routes, Powerplus_Map_Non0, &Powerplus_pci_IRQ_list, 0xFF},
	{0x1E0, 0xFD, 0x80, "MVME 3600 with MVME712M",		Genesis2_pci_IRQ_map,	Raven_pci_IRQ_routes, Powerplus_Map_Non0, &Powerplus_pci_IRQ_list, 0x00},
	{0x1E0, 0xFD, 0x81, "MVME 4600 with MVME712M",		Genesis2_pci_IRQ_map,	Raven_pci_IRQ_routes, Powerplus_Map_Non0, &Powerplus_pci_IRQ_list, 0xFF},
	{0x1E0, 0xFE, 0x80, "MVME 3600 with MVME761",		Genesis2_pci_IRQ_map,	Raven_pci_IRQ_routes, Powerplus_Map_Non0, &Powerplus_pci_IRQ_list, 0xFF},
	{0x1E0, 0xFE, 0x81, "MVME 4600 with MVME761",		Genesis2_pci_IRQ_map,	Raven_pci_IRQ_routes, Powerplus_Map_Non0, &Powerplus_pci_IRQ_list, 0xFF},
	{0x1E0, 0xFF, 0x00, "MVME 1600-001 or 1600-011",	Genesis2_pci_IRQ_map,	Raven_pci_IRQ_routes, Powerplus_Map_Non0, &Powerplus_pci_IRQ_list, 0xFF},
	{0x000, 0x00, 0x00, "",					NULL,			NULL, NULL, NULL, 0x00}
};

void __init
ibm_prep_init(void)
{
	u32 addr;
#ifdef CONFIG_PREP_RESIDUAL
	PPC_DEVICE *mpic;
#endif

	if (inb(0x0852) == 0xd5) {
		/* This is for the 43p-140 */
		early_read_config_dword(0, 0, PCI_DEVFN(13, 0),
					PCI_BASE_ADDRESS_0, &addr);
		if (addr != 0xffffffff
		    && !(addr & PCI_BASE_ADDRESS_SPACE_IO)
		    && (addr &= PCI_BASE_ADDRESS_MEM_MASK) != 0) {
			addr += PREP_ISA_MEM_BASE;
			OpenPIC_Addr = ioremap(addr, 0x40000);
			ppc_md.get_irq = openpic_get_irq;
		}
	}

#ifdef CONFIG_PREP_RESIDUAL
	mpic = residual_find_device(-1, NULL, SystemPeripheral,
				    ProgrammableInterruptController, MPIC, 0);
	if (mpic != NULL)
		printk("mpic = %p\n", mpic);
#endif
}

static void __init
ibm43p_pci_map_non0(struct pci_dev *dev)
{
	unsigned char intpin;
	static unsigned char bridge_intrs[4] = { 3, 4, 5, 8 };

	if (dev == NULL)
		return;
	pci_read_config_byte(dev, PCI_INTERRUPT_PIN, &intpin);
	if (intpin < 1 || intpin > 4)
		return;
	intpin = (PCI_SLOT(dev->devfn) + intpin - 1) & 3;
	dev->irq = openpic_to_irq(bridge_intrs[intpin]);
	pci_write_config_byte(dev, PCI_INTERRUPT_LINE, dev->irq);
}

void __init
prep_route_pci_interrupts(void)
{
	unsigned char *ibc_pirq = (unsigned char *)0x80800860;
	unsigned char *ibc_pcicon = (unsigned char *)0x80800840;
	int i;
	
	if ( _prep_type == _PREP_Motorola)
	{
		unsigned short irq_mode;
		unsigned char  cpu_type;
		unsigned char  base_mod;
		int	       entry;

		cpu_type = inb(MOTOROLA_CPUTYPE_REG) & 0xF0;
		base_mod = inb(MOTOROLA_BASETYPE_REG);

		for (entry = 0; mot_info[entry].cpu_type != 0; entry++) {
			if (mot_info[entry].cpu_type & 0x200) {		 	/* Check for Hawk chip */
				if (!(MotMPIC & MOT_HAWK_PRESENT))
					continue;
			} else {						/* Check non hawk boards */
				if ((mot_info[entry].cpu_type & 0xff) != cpu_type)
					continue;

				if (mot_info[entry].base_type == 0) {
					mot_entry = entry;
					break;
				}

				if (mot_info[entry].base_type != base_mod)
					continue;
			}

			if (!(mot_info[entry].max_cpu & 0x80)) {
				mot_entry = entry;
				break;
			}

			/* processor 1 not present and max processor zero indicated */
			if ((*ProcInfo & MOT_PROC2_BIT) && !(mot_info[entry].max_cpu & 0x7f)) {
				mot_entry = entry;
				break;
			}

			/* processor 1 present and max processor zero indicated */
			if (!(*ProcInfo & MOT_PROC2_BIT) && (mot_info[entry].max_cpu & 0x7f)) {
				mot_entry = entry;
				break;
			}
		}

		if (mot_entry == -1) 	/* No particular cpu type found - assume Blackhawk */
			mot_entry = 3;

		Motherboard_map_name = (unsigned char *)mot_info[mot_entry].name;
		Motherboard_map = mot_info[mot_entry].map;
		Motherboard_routes = mot_info[mot_entry].routes;
		Motherboard_non0 = mot_info[mot_entry].map_non0_bus;

		if (!(mot_info[entry].cpu_type & 0x100)) {
			/* AJF adjust level/edge control according to routes */
			irq_mode = 0;
			for (i = 1;  i <= 4;  i++)
				irq_mode |= ( 1 << Motherboard_routes[i] );
			outb( irq_mode & 0xff, 0x4d0 );
			outb( (irq_mode >> 8) & 0xff, 0x4d1 );
		}
	} else if ( _prep_type == _PREP_IBM ) {
		unsigned char planar_id = inb(0x0852);
		unsigned char irq_edge_mask_lo, irq_edge_mask_hi;

		printk("IBM ID: %08x\n", planar_id);
		switch(planar_id) {
		case 0xff:
			Motherboard_map_name = "IBM Thinkpad 850/860";
			Motherboard_map = Nobis_pci_IRQ_map;
			Motherboard_routes = Nobis_pci_IRQ_routes;
			irq_edge_mask_lo = 0x00; /* irq's 0-7 all edge-triggered */
			irq_edge_mask_hi = 0xA0; /* irq's 13, 15 level-triggered */
			break;
		case 0xfc:
			Motherboard_map_name = "IBM 6015/7020 (Sandalfoot/Sandalbow)";
			Motherboard_map = ibm6015_pci_IRQ_map;
			Motherboard_routes = ibm6015_pci_IRQ_routes;
			irq_edge_mask_lo = 0x00; /* irq's 0-7 all edge-triggered */
			irq_edge_mask_hi = 0xA0; /* irq's 13, 15 level-triggered */
			break;
		case 0xd5:
			Motherboard_map_name = "IBM 43P-140 (Tiger1)";
			Motherboard_map = ibm43p_pci_IRQ_map;
			Motherboard_routes = ibm43p_pci_IRQ_routes;
			Motherboard_non0 = ibm43p_pci_map_non0;
			irq_edge_mask_lo = 0x00; /* irq's 0-7 all edge-triggered */
			irq_edge_mask_hi = 0xA0; /* irq's 13, 15 level-triggered */
			break;
		default:
			printk(KERN_ERR "Unknown IBM motherboard! Defaulting to Carolina.\n");
		case 0xf0: /* PowerSeries 830/850 */
		case 0xf1: /* PowerSeries 830/850 */
		case 0xf2: /* PowerSeries 830/850 */
		case 0xf4: /* 7248-43P */
		case 0xf5: /* 7248-43P */
		case 0xf6: /* 7248-43P */
		case 0xf7: /* 7248-43P (missing from Carolina Tech Spec) */
			Motherboard_map_name = "IBM PS830/PS850/7248 (Carolina)";
			Motherboard_map = ibm8xx_pci_IRQ_map;
			Motherboard_routes = ibm8xx_pci_IRQ_routes;
			irq_edge_mask_lo = 0x00; /* irq's 0-7 all edge-triggered */
			irq_edge_mask_hi = 0xA4; /* irq's 10, 13, 15 level-triggered */
			break;
		}

		outb(inb(0x04d0)|irq_edge_mask_lo, 0x04d0); /* primary 8259 */
		outb(inb(0x04d1)|irq_edge_mask_hi, 0x04d1); /* cascaded 8259 */
	} else {
		printk("No known machine pci routing!\n");
		return;
	}
	
	/* Set up mapping from slots */
	for (i = 1;  i <= 4;  i++)
		ibc_pirq[i-1] = Motherboard_routes[i];
	/* Enable PCI interrupts */
	*ibc_pcicon |= 0x20;
}

void __init
prep_pib_init(void)
{
	unsigned char   reg;
	unsigned short  short_reg;

	struct pci_dev *dev = NULL;

	if (( _prep_type == _PREP_Motorola) && (OpenPIC_Addr)) {
		/*
		 * Perform specific configuration for the Via Tech or
		 * or Winbond PCI-ISA-Bridge part.
		 */
		if ((dev = pci_find_device(PCI_VENDOR_ID_VIA, 
					PCI_DEVICE_ID_VIA_82C586_1, dev))) {
			/*
			 * PPCBUG does not set the enable bits
			 * for the IDE device. Force them on here.
			 */
			pci_read_config_byte(dev, 0x40, &reg);

			reg |= 0x03; /* IDE: Chip Enable Bits */
			pci_write_config_byte(dev, 0x40, reg);
		}
		if ((dev = pci_find_device(PCI_VENDOR_ID_VIA,
						PCI_DEVICE_ID_VIA_82C586_2,
						dev)) && (dev->devfn = 0x5a)) {
			/* Force correct USB interrupt */
			dev->irq = 11;
			pci_write_config_byte(dev,
					PCI_INTERRUPT_LINE,
					dev->irq);
		}
		if ((dev = pci_find_device(PCI_VENDOR_ID_WINBOND,
					PCI_DEVICE_ID_WINBOND_83C553, dev))) {
			 /* Clear PCI Interrupt Routing Control Register. */
			short_reg = 0x0000;
			pci_write_config_word(dev, 0x44, short_reg);
			if (OpenPIC_Addr){
				/* Route IDE interrupts to IRQ 14 */
				reg = 0xEE;
				pci_write_config_byte(dev, 0x43, reg);
			}
		}
	}

	if ((dev = pci_find_device(PCI_VENDOR_ID_WINBOND,
				   PCI_DEVICE_ID_WINBOND_82C105, dev))){
		if (OpenPIC_Addr){
			/*
			 * Disable LEGIRQ mode so PCI INTS are routed
			 * directly to the 8259 and enable both channels
			 */
			pci_write_config_dword(dev, 0x40, 0x10ff0033);

			/* Force correct IDE interrupt */
			dev->irq = 14;
			pci_write_config_byte(dev,
					PCI_INTERRUPT_LINE,
					dev->irq);
		} else {
			/* Enable LEGIRQ for PCI INT -> 8259 IRQ routing */
			pci_write_config_dword(dev, 0x40, 0x10ff08a1);
		}
	}
}

static void __init
Powerplus_Map_Non0(struct pci_dev *dev)
{
	struct pci_bus  *pbus;          /* Parent bus structure pointer */
	struct pci_dev  *tdev = dev;    /* Temporary device structure */
	unsigned int    devnum;         /* Accumulated device number */
	unsigned char   intline;        /* Linux interrupt value */
	unsigned char   intpin;         /* PCI interrupt pin */

	/* Check for valid PCI dev pointer */
	if (dev == NULL) return;

	/* Initialize bridge IDSEL variable */
	devnum = PCI_SLOT(tdev->devfn);

	/* Read the interrupt pin of the device and adjust for indexing */
	pcibios_read_config_byte(dev->bus->number, dev->devfn,
			PCI_INTERRUPT_PIN, &intpin);

	/* If device doesn't request an interrupt, return */
	if ( (intpin < 1) || (intpin > 4) )
		return;

	intpin--;

	/*
	 * Walk up to bus 0, adjusting the interrupt pin for the standard
	 * PCI bus swizzle.
	 */
	do {
		intpin = (prep_pci_intpins[devnum % 4][intpin]) - 1;
		pbus = tdev->bus;        /* up one level */
		tdev = pbus->self;
		devnum = PCI_SLOT(tdev->devfn);
	} while(tdev->bus->number);

	/* Use the primary interrupt inputs by default */
	intline = mot_info[mot_entry].pci_irq_list->primary[intpin];

	/*
	 * If the board has secondary interrupt inputs, walk the bus and
	 * note the devfn of the bridge from bus 0.  If it is the same as
	 * the devfn of the bus bridge with secondary inputs, use those.
	 * Otherwise, assume it's a PMC site and get the interrupt line
	 * value from the interrupt routing table.
	 */ 
	if (mot_info[mot_entry].secondary_bridge_devfn) {
		pbus = dev->bus;

		while (pbus->primary != 0)
			pbus = pbus->parent;

		if ((pbus->self)->devfn != 0xA0) {
			if ((pbus->self)->devfn == mot_info[mot_entry].secondary_bridge_devfn)
				intline = mot_info[mot_entry].pci_irq_list->secondary[intpin];
			else {
				if ((char *)(mot_info[mot_entry].map) == (char *)Mesquite_pci_IRQ_map)
					intline = mot_info[mot_entry].map[((pbus->self)->devfn)/8] + 16;
				else {
					int i;
					for (i=0;i<3;i++)
						intpin = (prep_pci_intpins[devnum % 4][intpin]) - 1;
					intline = mot_info[mot_entry].pci_irq_list->primary[intpin];
				}
			}
		}
	}

	/* Write calculated interrupt value to header and device list */
	dev->irq = intline;
	pci_write_config_byte(dev, PCI_INTERRUPT_LINE, (u8)dev->irq);
}

void __init
prep_pcibios_fixup(void)
{
        struct pci_dev *dev;
        extern unsigned char *Motherboard_map;
        extern unsigned char *Motherboard_routes;
        unsigned char i;

	prep_route_pci_interrupts();

	printk("Setting PCI interrupts for a \"%s\"\n", Motherboard_map_name);
	if (OpenPIC_Addr) {
		/* PCI interrupts are controlled by the OpenPIC */
		pci_for_each_dev(dev) {
			if (dev->bus->number == 0) {
                       		dev->irq = openpic_to_irq(Motherboard_map[PCI_SLOT(dev->devfn)]);
				pcibios_write_config_byte(dev->bus->number, dev->devfn, PCI_INTERRUPT_LINE, dev->irq);
			} else {
				if (Motherboard_non0 != NULL)
					Motherboard_non0(dev);
			}
		}

		/* Setup the Winbond or Via PIB */
		prep_pib_init();

		return;
	}

	pci_for_each_dev(dev) {
		/*
		 * Use our old hard-coded kludge to figure out what
		 * irq this device uses.  This is necessary on things
		 * without residual data. -- Cort
		 */
		unsigned char d = PCI_SLOT(dev->devfn);
		dev->irq = Motherboard_routes[Motherboard_map[d]];

		for ( i = 0 ; i <= 5 ; i++ ) {
			/*
			 * Relocate PCI I/O resources if necessary so the
			 * standard 256MB BAT covers them.
			 */
			if ( (pci_resource_flags(dev, i) & IORESOURCE_IO) &&
				      (dev->resource[i].start > 0x10000000))  {
				printk("Relocating PCI address %lx -> %lx\n",
						dev->resource[i].start,
						(dev->resource[i].start & 
						 0x00FFFFFF)| 0x01000000);
				dev->resource[i].start =
					(dev->resource[i].start & 0x00FFFFFF)
					| 0x01000000;
		                pci_write_config_dword(dev,
						PCI_BASE_ADDRESS_0 + (i*0x4),
						dev->resource[i].start);
				dev->resource[i].end = 
					(dev->resource[i].end & 0x00FFFFFF)
					| 0x01000000;
		        }
		}
#if 0
		/*
		 * If we have residual data and if it knows about this
		 * device ask it what the irq is.
		 *  -- Cort
		 */
		ppcd = residual_find_device_id( ~0L, dev->device,
		                                -1,-1,-1, 0);
#endif
	}
}

static void __init
prep_pcibios_after_init(void)
{
	struct pci_dev *dev;
	
	/* If there is a WD 90C, reset the IO BAR to 0x0 (it started that 
	 * way, but the PCI layer relocated it because it thought 0x0 was
	 * invalid for a BAR).
	 * If you don't do this, the card's VGA base will be <IO BAR>+0xc0000
	 * instead of 0xc0000. vgacon.c (for example) is completely unaware of
	 * this little quirk.
	 */
	dev = pci_find_device(PCI_VENDOR_ID_WD, PCI_DEVICE_ID_WD_90C, NULL);
	if (dev) {
		dev->resource[1].end -= dev->resource[1].start;
		dev->resource[1].start = 0;
		/* tell the hardware */
		pci_write_config_dword(dev, PCI_BASE_ADDRESS_1, 0x0);
	}
}

static void __init
prep_init_resource(struct resource *res, unsigned long start,
		   unsigned long end, int flags)
{
	res->flags = flags;
	res->start = start;
	res->end = end;
	res->name = "PCI host bridge";
	res->parent = NULL;
	res->sibling = NULL;
	res->child = NULL;
}

void __init
prep_find_bridges(void)
{
	struct pci_controller* hose;

	hose = pcibios_alloc_controller();
	if (!hose)
		return;

	hose->first_busno = 0;
	hose->last_busno = 0xff;
	hose->pci_mem_offset = PREP_ISA_MEM_BASE;
	hose->io_base_phys = PREP_ISA_IO_BASE;
	hose->io_base_virt = (void *)0x80000000; /* see prep_map_io() */
	prep_init_resource(&hose->io_resource, 0, 0x0fffffff, IORESOURCE_IO);
	prep_init_resource(&hose->mem_resources[0], 0xc0000000, 0xfeffffff,
			   IORESOURCE_MEM);
	
	printk("PReP architecture\n");
	{
#ifdef CONFIG_PREP_RESIDUAL	  
		PPC_DEVICE *hostbridge;

		hostbridge = residual_find_device(PROCESSORDEVICE, NULL,
			BridgeController, PCIBridge, -1, 0);
		if (hostbridge &&
			hostbridge->DeviceId.Interface == PCIBridgeIndirect) {
			PnP_TAG_PACKET * pkt;
			pkt = PnP_find_large_vendor_packet(
				res->DevicePnPHeap+hostbridge->AllocatedOffset,
				3, 0);
			if(pkt) {
#define p pkt->L4_Pack.L4_Data.L4_PPCPack
				setup_indirect_pci(hose, 
					ld_le32((unsigned *) (p.PPCData)),
					ld_le32((unsigned *) (p.PPCData+8)));
			} else
				setup_indirect_pci(hose, 0x80000cf8, 0x80000cfc);
		} else
#endif /* CONFIG_PREP_RESIDUAL */
			hose->ops = &prep_pci_ops;
	}

	ppc_md.pcibios_fixup = prep_pcibios_fixup;
	ppc_md.pcibios_after_init = prep_pcibios_after_init;
}
/*
 * BK Id: SCCS/s.prep_setup.c 1.47 12/19/01 09:45:54 trini
 */
/*
 *  linux/arch/ppc/kernel/setup.c
 *
 *  Copyright (C) 1995  Linus Torvalds
 *  Adapted from 'alpha' version by Gary Thomas
 *  Modified by Cort Dougan (cort@cs.nmt.edu)
 *
 * Support for PReP (Motorola MTX/MVME)
 * by Troy Benjegerdes (hozer@drgw.net)
 */

/*
 * bootup setup stuff..
 */

#include <linux/config.h>
#include <linux/delay.h>
#include <linux/module.h>
#include <linux/errno.h>
#include <linux/sched.h>
#include <linux/kernel.h>
#include <linux/mm.h>
#include <linux/stddef.h>
#include <linux/unistd.h>
#include <linux/ptrace.h>
#include <linux/slab.h>
#include <linux/user.h>
#include <linux/a.out.h>
#include <linux/tty.h>
#include <linux/major.h>
#include <linux/interrupt.h>
#include <linux/reboot.h>
#include <linux/init.h>
#include <linux/blk.h>
#include <linux/ioport.h>
#include <linux/console.h>
#include <linux/timex.h>
#include <linux/pci.h>
#include <linux/ide.h>
#include <linux/seq_file.h>

#include <asm/sections.h>
#include <asm/mmu.h>
#include <asm/processor.h>
#include <asm/residual.h>
#include <asm/io.h>
#include <asm/pgtable.h>
#include <asm/cache.h>
#include <asm/dma.h>
#include <asm/machdep.h>
#include <asm/mk48t59.h>
#include <asm/prep_nvram.h>
#include <asm/raven.h>
#include <asm/keyboard.h>
#include <asm/vga.h>
#include <asm/time.h>

#include "local_irq.h"
#include "i8259.h"
#include "open_pic.h"

#if defined(CONFIG_SOUND) || defined(CONFIG_SOUND_MODULE)
#include <../drivers/sound/sound_config.h>
#include <../drivers/sound/dev_table.h>
#endif

unsigned char ucSystemType;
unsigned char ucBoardRev;
unsigned char ucBoardRevMaj, ucBoardRevMin;

extern unsigned long mc146818_get_rtc_time(void);
extern int mc146818_set_rtc_time(unsigned long nowtime);
extern unsigned long mk48t59_get_rtc_time(void);
extern int mk48t59_set_rtc_time(unsigned long nowtime);

extern unsigned char prep_nvram_read_val(int addr);
extern void prep_nvram_write_val(int addr,
				 unsigned char val);
extern unsigned char rs_nvram_read_val(int addr);
extern void rs_nvram_write_val(int addr,
				 unsigned char val);
extern void ibm_prep_init(void);

extern int pckbd_setkeycode(unsigned int scancode, unsigned int keycode);
extern int pckbd_getkeycode(unsigned int scancode);
extern int pckbd_translate(unsigned char scancode, unsigned char *keycode,
		char raw_mode);
extern char pckbd_unexpected_up(unsigned char keycode);
extern void pckbd_leds(unsigned char leds);
extern void pckbd_init_hw(void);
extern unsigned char pckbd_sysrq_xlate[];

extern void prep_find_bridges(void);
extern char saved_command_line[];

int _prep_type;

#define cached_21	(((char *)(ppc_cached_irq_mask))[3])
#define cached_A1	(((char *)(ppc_cached_irq_mask))[2])

/* for the mac fs */
kdev_t boot_dev;
/* used in nasty hack for sound - see prep_setup_arch() -- Cort */
long ppc_cs4232_dma, ppc_cs4232_dma2;

extern PTE *Hash, *Hash_end;
extern unsigned long Hash_size, Hash_mask;
extern int probingmem;
extern unsigned long loops_per_jiffy;

#ifdef CONFIG_BLK_DEV_RAM
extern int rd_doload;		/* 1 = load ramdisk, 0 = don't load */
extern int rd_prompt;		/* 1 = prompt for ramdisk, 0 = don't prompt */
extern int rd_image_start;	/* starting block # of image */
#endif

#ifdef CONFIG_SOUND_MODULE
EXPORT_SYMBOL(ppc_cs4232_dma);
EXPORT_SYMBOL(ppc_cs4232_dma2);
#endif

static int __prep
prep_show_cpuinfo(struct seq_file *m)
{
	extern char *Motherboard_map_name;
	int cachew;
#ifdef CONFIG_PREP_RESIDUAL
	int i;
#endif

	seq_printf(m, "machine\t\t: PReP %s\n", Motherboard_map_name);

	switch ( _prep_type ) {
	case _PREP_IBM:
		cachew = inw(0x80c);
		if (cachew & (1<<6))
			seq_printf(m, "Upgrade CPU\n");
		seq_printf(m, "L2\t\t: ");
		if (cachew & (1<<7)) {
			seq_printf(m, "not present\n");
			goto no_l2;
		}
		seq_printf(m, "%sKb,", (cachew & (1 << 10))? "512" : "256");
		seq_printf(m, "%ssync\n", (cachew & (1 << 15))? "" : "a");
		break;
	case _PREP_Motorola:
		cachew = *((unsigned char *)CACHECRBA);
		seq_printf(m, "L2\t\t: ");
		switch (cachew & L2CACHE_MASK) {
		case L2CACHE_512KB:
			seq_printf(m, "512Kb");
			break;
		case L2CACHE_256KB:
			seq_printf(m, "256Kb");
			break;
		case L2CACHE_1MB:
			seq_printf(m, "1MB");
			break;
		case L2CACHE_NONE:
			seq_printf(m, "none\n");
			goto no_l2;
			break;
		default:
			seq_printf(m, "%x\n", cachew);
		}
		
		seq_printf(m, ", parity %s",
			   (cachew & L2CACHE_PARITY)? "enabled" : "disabled");

		seq_printf(m, " SRAM:");
		
		switch ( ((cachew & 0xf0) >> 4) & ~(0x3) ) {
		case 1: seq_printf(m, "synchronous,parity,flow-through\n");
			break;
		case 2: seq_printf(m, "asynchronous,no parity\n");
			break;
		case 3: seq_printf(m, "asynchronous,parity\n");
			break;
		default:seq_printf(m, "synchronous,pipelined,no parity\n");
			break;
		}
		break;
	default:
		break;
	}

no_l2:
#ifdef CONFIG_PREP_RESIDUAL
	if (res->ResidualLength != 0) {
		/* print info about SIMMs */
		seq_printf(m, "simms\t\t: ");
		for (i = 0; (res->ActualNumMemories) && (i < MAX_MEMS); i++) {
			if (res->Memories[i].SIMMSize != 0)
				seq_printf(m, "%d:%ldM ", i,
					(res->Memories[i].SIMMSize > 1024) ? 
					res->Memories[i].SIMMSize>>20 : 
					res->Memories[i].SIMMSize);
		}
		seq_printf(m, "\n");
	}
#endif

	return 0;
}

static int __prep
prep_show_percpuinfo(struct seq_file *m, int i)
{
	int len = 0;

	/* PREP's without residual data will give incorrect values here */
	seq_printf(m, "clock\t\t: ");
#ifdef CONFIG_PREP_RESIDUAL	
	if (res->ResidualLength)
		seq_printf(m, "%ldMHz\n",
			   (res->VitalProductData.ProcessorHz > 1024) ?
			   res->VitalProductData.ProcessorHz>>20 :
			   res->VitalProductData.ProcessorHz);
	else
#endif /* CONFIG_PREP_RESIDUAL */
		seq_printf(m, "???\n");

	return 0;
}

static void __init
prep_setup_arch(void)
{
	unsigned char reg;
#if 0 /* unused?? */
	unsigned char ucMothMemType;
	unsigned char ucEquipPres1;
#endif

	/* init to some ~sane value until calibrate_delay() runs */
	loops_per_jiffy = 50000000;
	
	/* Lookup PCI host bridges */
	prep_find_bridges();
	
	/* Set up floppy in PS/2 mode */
	outb(0x09, SIO_CONFIG_RA);
	reg = inb(SIO_CONFIG_RD);
	reg = (reg & 0x3F) | 0x40;
	outb(reg, SIO_CONFIG_RD);
	outb(reg, SIO_CONFIG_RD);	/* Have to write twice to change! */

	/*
	 * We need to set up the NvRAM access routines early as prep_init
	 * has yet to be called
	 */
	ppc_md.nvram_read_val = prep_nvram_read_val;
	ppc_md.nvram_write_val = prep_nvram_write_val;

	/* we should determine this according to what we find! -- Cort */
	switch ( _prep_type )
	{
	case _PREP_IBM:
		/* Enable L2.  Assume we don't need to flush -- Cort*/
		*(unsigned char *)(0x8000081c) |= 3;
		ROOT_DEV = to_kdev_t(0x0301); /* hda1 */
		break;
	case _PREP_Motorola:
		/* Enable L2.  Assume we don't need to flush -- Cort*/
		*(unsigned char *)(0x8000081c) |= 3;
#ifdef CONFIG_BLK_DEV_INITRD
		if (initrd_start)
			ROOT_DEV = MKDEV(RAMDISK_MAJOR, 0); /* /dev/ram */
		else
#endif
#ifdef CONFIG_ROOT_NFS
			ROOT_DEV = to_kdev_t(0x00ff); /* /dev/nfs */
#else
			ROOT_DEV = to_kdev_t(0x0802); /* /dev/sda2 */
#endif
		break;
	}

	/* Read in NVRAM data */ 
	init_prep_nvram();

	/* if no bootargs, look in NVRAM */
	if ( cmd_line[0] == '\0' ) {
		char *bootargs;
		 bootargs = prep_nvram_get_var("bootargs");
		 if (bootargs != NULL) {
			 strcpy(cmd_line, bootargs);
			 /* again.. */
			 strcpy(saved_command_line, cmd_line);
		}
	}

#ifdef CONFIG_SOUND_CS4232
	/*
	 * setup proper values for the cs4232 driver so we don't have
	 * to recompile for the motorola or ibm workstations sound systems.
	 * This is a really nasty hack, but unless we change the driver
	 * it's the only way to support both addrs from one binary.
	 * -- Cort
	 */
	if ( _machine == _MACH_prep )
	{
		extern struct card_info snd_installed_cards[];
		struct card_info *snd_ptr;

		for ( snd_ptr = snd_installed_cards; 
			snd_ptr < &snd_installed_cards[num_sound_cards];
			snd_ptr++ )
		{
			if ( snd_ptr->card_type == SNDCARD_CS4232 )
			{
				if ( _prep_type == _PREP_Motorola )
				{
					snd_ptr->config.io_base = 0x830;
					snd_ptr->config.irq = 10;
					snd_ptr->config.dma = ppc_cs4232_dma = 6;
					snd_ptr->config.dma2 = ppc_cs4232_dma2 = 7;
				}
				if ( _prep_type == _PREP_IBM )
				{
					snd_ptr->config.io_base = 0x530;
					snd_ptr->config.irq = 5;
					snd_ptr->config.dma = ppc_cs4232_dma = 1;
					/* this is wrong - but leave it for now */
					snd_ptr->config.dma2 = ppc_cs4232_dma2 = 7;
				}
			}
		}
	}
#endif /* CONFIG_SOUND_CS4232 */	

	/*print_residual_device_info();*/

	switch (_prep_type) {
	case _PREP_Motorola:
		raven_init();
		break;
	case _PREP_IBM:
		ibm_prep_init();
		break;
	}

#ifdef CONFIG_VGA_CONSOLE
	/* remap the VGA memory */
	vgacon_remap_base = 0xf0000000;
	/*vgacon_remap_base = ioremap(0xc0000000, 0xba000);*/
	conswitchp = &vga_con;
#elif defined(CONFIG_DUMMY_CONSOLE)
	conswitchp = &dummy_con;
#endif
}

/*
 * Determine the decrementer frequency from the residual data
 * This allows for a faster boot as we do not need to calibrate the
 * decrementer against another clock. This is important for embedded systems.
 */
static int __init
prep_res_calibrate_decr(void)
{
#ifdef CONFIG_PREP_RESIDUAL
	unsigned long freq, divisor = 4;

	if ( res->VitalProductData.ProcessorBusHz ) {
		freq = res->VitalProductData.ProcessorBusHz;
		printk("time_init: decrementer frequency = %lu.%.6lu MHz\n",
				(freq/divisor)/1000000,
				(freq/divisor)%1000000);
		tb_to_us = mulhwu_scale_factor(freq/divisor, 1000000);
		tb_ticks_per_jiffy = freq / HZ / divisor;
		return 0;
	} else
#endif	
		return 1;
}

/*
 * Uses the on-board timer to calibrate the on-chip decrementer register
 * for prep systems.  On the pmac the OF tells us what the frequency is
 * but on prep we have to figure it out.
 * -- Cort
 */
/* Done with 3 interrupts: the first one primes the cache and the
 * 2 following ones measure the interval. The precision of the method
 * is still doubtful due to the short interval sampled.
 */
static volatile int calibrate_steps __initdata = 3;
static unsigned tbstamp __initdata = 0;

static void __init
prep_calibrate_decr_handler(int irq, void *dev, struct pt_regs *regs)
{
	unsigned long t, freq;
	int step=--calibrate_steps;

	t = get_tbl();
	if (step > 0) {
		tbstamp = t;
	} else {
		freq = (t - tbstamp)*HZ;
		printk("time_init: decrementer frequency = %lu.%.6lu MHz\n",
			 freq/1000000, freq%1000000);
		tb_ticks_per_jiffy = freq / HZ;
		tb_to_us = mulhwu_scale_factor(freq, 1000000);
	}
}

static void __init
prep_calibrate_decr(void)
{
	int res;

	/* Try and get this from the residual data. */
	res = prep_res_calibrate_decr();

	/* If we didn't get it from the residual data, try this. */
	if ( res ) {
		unsigned long flags;

		save_flags(flags);

#define TIMER0_COUNT 0x40
#define TIMER_CONTROL 0x43
		/* set timer to periodic mode */
		outb_p(0x34,TIMER_CONTROL);/* binary, mode 2, LSB/MSB, ch 0 */
		/* set the clock to ~100 Hz */
		outb_p(LATCH & 0xff , TIMER0_COUNT);	/* LSB */
		outb(LATCH >> 8 , TIMER0_COUNT);	/* MSB */

		if (request_irq(0, prep_calibrate_decr_handler, 0, "timer", NULL) != 0)
			panic("Could not allocate timer IRQ!");
		__sti();
		/* wait for calibrate */
		while ( calibrate_steps )
			;
		restore_flags(flags);
		free_irq( 0, NULL);
	}
}

static long __init
mk48t59_init(void) {
	unsigned char tmp;

	tmp = ppc_md.nvram_read_val(MK48T59_RTC_CONTROLB);
	if (tmp & MK48T59_RTC_CB_STOP) {
		printk("Warning: RTC was stopped, date will be wrong.\n");
		ppc_md.nvram_write_val(MK48T59_RTC_CONTROLB, 
					 tmp & ~MK48T59_RTC_CB_STOP);
		/* Low frequency crystal oscillators may take a very long
		 * time to startup and stabilize. For now just ignore the
		 * the issue, but attempting to calibrate the decrementer
		 * from the RTC just after this wakeup is likely to be very 
		 * inaccurate. Firmware should not allow to load
		 * the OS with the clock stopped anyway...
		 */
	}
	/* Ensure that the clock registers are updated */
	tmp = ppc_md.nvram_read_val(MK48T59_RTC_CONTROLA);
	tmp &= ~(MK48T59_RTC_CA_READ | MK48T59_RTC_CA_WRITE);
	ppc_md.nvram_write_val(MK48T59_RTC_CONTROLA, tmp);
	return 0;
}

/* We use the NVRAM RTC to time a second to calibrate the decrementer,
 * the RTC registers have just been set up in the right state by the
 * preceding routine.
 */
static void __init
mk48t59_calibrate_decr(void)
{
	unsigned long freq;
	unsigned long t1;
	unsigned char save_control;
	long i;
	unsigned char sec;
 
		
	/* Make sure the time is not stopped. */
	save_control = ppc_md.nvram_read_val(MK48T59_RTC_CONTROLB);
	
	ppc_md.nvram_write_val(MK48T59_RTC_CONTROLA,
			(save_control & (~MK48T59_RTC_CB_STOP)));

	/* Now make sure the read bit is off so the value will change. */
	save_control = ppc_md.nvram_read_val(MK48T59_RTC_CONTROLA);
	save_control &= ~MK48T59_RTC_CA_READ;
	ppc_md.nvram_write_val(MK48T59_RTC_CONTROLA, save_control);


	/* Read the seconds value to see when it changes. */
	sec = ppc_md.nvram_read_val(MK48T59_RTC_SECONDS);
	/* Actually this is bad for precision, we should have a loop in
	 * which we only read the seconds counter. nvram_read_val writes
	 * the address bytes on every call and this takes a lot of time.
	 * Perhaps an nvram_wait_change method returning a time
	 * stamp with a loop count as parameter would be the  solution.
	 */
	for (i = 0 ; i < 1000000 ; i++)	{ /* may take up to 1 second... */
		t1 = get_tbl();
		if (ppc_md.nvram_read_val(MK48T59_RTC_SECONDS) != sec) {
			break;
		}
	}

	sec = ppc_md.nvram_read_val(MK48T59_RTC_SECONDS);
	for (i = 0 ; i < 1000000 ; i++)	{ /* Should take up 1 second... */
		freq = get_tbl()-t1;
		if (ppc_md.nvram_read_val(MK48T59_RTC_SECONDS) != sec)
			break;
	}

	printk("time_init: decrementer frequency = %lu.%.6lu MHz\n",
		 freq/1000000, freq%1000000);
	tb_ticks_per_jiffy = freq / HZ;
	tb_to_us = mulhwu_scale_factor(freq, 1000000);
}

static void __prep
prep_restart(char *cmd)
{
	unsigned long i = 10000;

	__cli();

	/* set exception prefix high - to the prom */
	_nmask_and_or_msr(0, MSR_IP);

	/* make sure bit 0 (reset) is a 0 */
	outb( inb(0x92) & ~1L , 0x92 );
	/* signal a reset to system control port A - soft reset */
	outb( inb(0x92) | 1 , 0x92 );

	while ( i != 0 ) i++;
	panic("restart failed\n");
}

static void __prep
prep_halt(void)
{
	unsigned long flags;
	__cli();
	/* set exception prefix high - to the prom */
	save_flags( flags );
	restore_flags( flags|MSR_IP );

	/* make sure bit 0 (reset) is a 0 */
	outb( inb(0x92) & ~1L , 0x92 );
	/* signal a reset to system control port A - soft reset */
	outb( inb(0x92) | 1 , 0x92 );

	while ( 1 ) ;
	/*
	 * Not reached
	 */
}

/*
 * On IBM PReP's, power management is handled by a Signetics 87c750 behind the
 * Utah component on the ISA bus. To access the 750 you must write a series of
 * nibbles to port 0x82a (decoded by the Utah). This is described somewhat in
 * the IBM Carolina Technical Specification.
 * -Hollis
 */
static void __prep
utah_sig87c750_setbit(unsigned int bytenum, unsigned int bitnum, int value)
{
	/*
	 * byte1: 0 0 0 1 0  d  a5 a4
	 * byte2: 0 0 0 1 a3 a2 a1 a0
	 *
	 * d = the bit's value, enabled or disabled
	 * (a5 a4 a3) = the byte number, minus 20
	 * (a2 a1 a0) = the bit number
	 *
	 * example: set the 5th bit of byte 21 (21.5)
	 *     a5 a4 a3 = 001 (byte 1)
	 *     a2 a1 a0 = 101 (bit 5)
	 *
	 *     byte1 = 0001 0100 (0x14)
	 *     byte2 = 0001 1101 (0x1d)
	 */
	unsigned char byte1=0x10, byte2=0x10;
	const unsigned int pm_reg_1=0x82a; /* ISA address */

	/* the 750's '20.0' is accessed as '0.0' through Utah (which adds 20) */
	bytenum -= 20;

	byte1 |= (!!value) << 2;		/* set d */
	byte1 |= (bytenum >> 1) & 0x3;	/* set a5, a4 */

	byte2 |= (bytenum & 0x1) << 3;	/* set a3 */
	byte2 |= bitnum & 0x7;			/* set a2, a1, a0 */

	outb(byte1, pm_reg_1);		/* first nibble */
	mb();
	udelay(100);				/* important: let controller recover */

	outb(byte2, pm_reg_1);		/* second nibble */
	mb();
	udelay(100);				/* important: let controller recover */
}

static void __prep
prep_power_off(void)
{
	if ( _prep_type == _PREP_IBM) {
		/* tested on:
		 * 		Carolina's: 7248-43P, 6070 (PowerSeries 850)
		 * should work on:
		 * 		Carolina: 6050 (PowerSeries 830)
		 * 		7043-140 (Tiger 1)
		 */
		unsigned long flags;
		__cli();
		/* set exception prefix high - to the prom */
		save_flags( flags );
		restore_flags( flags|MSR_IP );

		utah_sig87c750_setbit(21, 5, 1); /* set bit 21.5, "PMEXEC_OFF" */

		while ( 1 ) ;
		/* not reached */
	} else {
		prep_halt();
	}
}

static unsigned int __prep
prep_irq_cannonicalize(u_int irq)
{
	if (irq == 2)
	{
		return 9;
	}
	else
	{
		return irq;
	}
}

static int __prep
prep_get_irq(struct pt_regs *regs)
{
	return i8259_irq();
}		

static void __init
prep_init_IRQ(void)
{
	int i;

	if (OpenPIC_Addr != NULL)
		openpic_init(1, NUM_8259_INTERRUPTS, 0, -1);
	for ( i = 0 ; i < NUM_8259_INTERRUPTS ; i++ )
		irq_desc[i].handler = &i8259_pic;
	i8259_init(0xbffffff0); /* PCI interrupt ack address for MPC105 and 106 */
}

#if defined(CONFIG_BLK_DEV_IDE) || defined(CONFIG_BLK_DEV_IDE_MODULE)
/*
 * IDE stuff.
 */
static int __prep
prep_ide_default_irq(ide_ioreg_t base)
{
	switch (base) {
		case 0x1f0: return 13;
		case 0x170: return 13;
		case 0x1e8: return 11;
		case 0x168: return 10;
		case 0xfff0: return 14;		/* MCP(N)750 ide0 */
		case 0xffe0: return 15;		/* MCP(N)750 ide1 */
		default: return 0;
	}
}

static ide_ioreg_t __prep
prep_ide_default_io_base(int index)
{
	switch (index) {
		case 0: return 0x1f0;
		case 1: return 0x170;
		case 2: return 0x1e8;
		case 3: return 0x168;
		default:
			return 0;
	}
}

static int __prep
prep_ide_check_region(ide_ioreg_t from, unsigned int extent)
{
	return check_region(from, extent);
}

static void __prep
prep_ide_request_region(ide_ioreg_t from,
			unsigned int extent,
			const char *name)
{
	request_region(from, extent, name);
}

static void __prep
prep_ide_release_region(ide_ioreg_t from,
			unsigned int extent)
{
	release_region(from, extent);
}

static void __init
prep_ide_init_hwif_ports (hw_regs_t *hw, ide_ioreg_t data_port, ide_ioreg_t ctrl_port, int *irq)
{
	ide_ioreg_t reg = data_port;
	int i;

	for (i = IDE_DATA_OFFSET; i <= IDE_STATUS_OFFSET; i++) {
		hw->io_ports[i] = reg;
		reg += 1;
	}
	if (ctrl_port) {
		hw->io_ports[IDE_CONTROL_OFFSET] = ctrl_port;
	} else {
		hw->io_ports[IDE_CONTROL_OFFSET] = hw->io_ports[IDE_DATA_OFFSET] + 0x206;
	}
	if (irq != NULL)
		*irq = 0;
}
#endif

#ifdef CONFIG_SMP
/* PReP (MTX) support */
static int __init
smp_prep_probe(void)
{
	extern int mot_multi;

	if (mot_multi) {
		openpic_request_IPIs();
		smp_hw_index[1] = 1;
		return 2;
	}

	return 1;
}

static void __init
smp_prep_kick_cpu(int nr)
{
	*(unsigned long *)KERNELBASE = nr;
	asm volatile("dcbf 0,%0"::"r"(KERNELBASE):"memory");
	printk("CPU1 reset, waiting\n");
}

static void __init
smp_prep_setup_cpu(int cpu_nr)
{
	if (OpenPIC_Addr)
		do_openpic_setup_cpu();
}

static struct smp_ops_t prep_smp_ops __prepdata = {
	smp_openpic_message_pass,
	smp_prep_probe,
	smp_prep_kick_cpu,
	smp_prep_setup_cpu,
};
#endif /* CONFIG_SMP */

/*
 * This finds the amount of physical ram and does necessary
 * setup for prep.  This is pretty architecture specific so
 * this will likely stay separate from the pmac.
 * -- Cort
 */
static unsigned long __init
prep_find_end_of_memory(void)
{
	unsigned long total = 0;
	extern unsigned int boot_mem_size;

#ifdef CONFIG_PREP_RESIDUAL	
	total = res->TotalMemory;
#endif	

	if (total == 0 && boot_mem_size != 0)
		total = boot_mem_size;
	else if (total == 0) {
		/*
		 * I need a way to probe the amount of memory if the residual
		 * data doesn't contain it. -- Cort
		 */
		total = 0x02000000;
		printk(KERN_INFO "Ramsize from residual data was 0"
			 " -- defaulting to %ldM\n", total>>20);
	}

	return (total);
}

/*
 * Setup the bat mappings we're going to load that cover
 * the io areas.  RAM was mapped by mapin_ram().
 * -- Cort
 */
static void __init
prep_map_io(void)
{
	io_block_mapping(0x80000000, PREP_ISA_IO_BASE, 0x10000000, _PAGE_IO);
	io_block_mapping(0xf0000000, PREP_ISA_MEM_BASE, 0x08000000, _PAGE_IO);
}

static void __init
prep_init2(void)
{
#ifdef CONFIG_NVRAM
	request_region(PREP_NVRAM_AS0, 0x8, "nvram");
#endif
	request_region(0x20,0x20,"pic1");
	request_region(0xa0,0x20,"pic2");
	request_region(0x00,0x20,"dma1");
	request_region(0x40,0x20,"timer");
	request_region(0x80,0x10,"dma page reg");
	request_region(0xc0,0x20,"dma2");
}

void __init
prep_init(unsigned long r3, unsigned long r4, unsigned long r5,
		unsigned long r6, unsigned long r7)
{
#ifdef CONFIG_PREP_RESIDUAL	
	/* make a copy of residual data */
	if ( r3 ) {
		memcpy((void *)res,(void *)(r3+KERNELBASE),
			 sizeof(RESIDUAL));
	}
#endif

#ifdef CONFIG_BLK_DEV_INITRD
	if ( r4 )
	{
		initrd_start = r4 + KERNELBASE;
		initrd_end = r5 + KERNELBASE;
	}
#endif /* CONFIG_BLK_DEV_INITRD */

	/* Copy cmd_line parameters */
	if ( r6 )
	{
		*(char *)(r7 + KERNELBASE) = 0;
		strcpy(cmd_line, (char *)(r6 + KERNELBASE));
	}
	
	isa_io_base = PREP_ISA_IO_BASE;
	isa_mem_base = PREP_ISA_MEM_BASE;
	pci_dram_offset = PREP_PCI_DRAM_OFFSET;
	ISA_DMA_THRESHOLD = 0x00ffffff;
	DMA_MODE_READ = 0x44;
	DMA_MODE_WRITE = 0x48;

	/* figure out what kind of prep workstation we are */
#ifdef CONFIG_PREP_RESIDUAL	
	if ( res->ResidualLength != 0 )
	{
		if ( !strncmp(res->VitalProductData.PrintableModel,"IBM",3) )
			_prep_type = _PREP_IBM;
		else
			_prep_type = _PREP_Motorola;
	}
	else /* assume motorola if no residual (netboot?) */
#endif
	{
		_prep_type = _PREP_Motorola;
	}

	ppc_md.setup_arch     = prep_setup_arch;
	ppc_md.show_percpuinfo = prep_show_percpuinfo;
	ppc_md.show_cpuinfo   = prep_show_cpuinfo;
	ppc_md.irq_cannonicalize = prep_irq_cannonicalize;
	ppc_md.init_IRQ       = prep_init_IRQ;
	/* this gets changed later on if we have an OpenPIC -- Cort */
	ppc_md.get_irq        = prep_get_irq;
	ppc_md.init           = prep_init2;

	ppc_md.restart        = prep_restart;
	ppc_md.power_off      = prep_power_off;
	ppc_md.halt           = prep_halt;

	ppc_md.time_init      = NULL;
	if (_prep_type == _PREP_IBM) {
		ppc_md.set_rtc_time   = mc146818_set_rtc_time;
		ppc_md.get_rtc_time   = mc146818_get_rtc_time;
		ppc_md.calibrate_decr = prep_calibrate_decr;
	} else {
		ppc_md.set_rtc_time   = mk48t59_set_rtc_time;
		ppc_md.get_rtc_time   = mk48t59_get_rtc_time;
		ppc_md.calibrate_decr = mk48t59_calibrate_decr;
		ppc_md.time_init      = mk48t59_init;
	}

	ppc_md.find_end_of_memory = prep_find_end_of_memory;
	ppc_md.setup_io_mappings = prep_map_io;

#if defined(CONFIG_BLK_DEV_IDE) || defined(CONFIG_BLK_DEV_IDE_MODULE)
	ppc_ide_md.default_irq = prep_ide_default_irq;
	ppc_ide_md.default_io_base = prep_ide_default_io_base;
	ppc_ide_md.ide_check_region = prep_ide_check_region;
	ppc_ide_md.ide_request_region = prep_ide_request_region;
	ppc_ide_md.ide_release_region = prep_ide_release_region;
	ppc_ide_md.ide_init_hwif = prep_ide_init_hwif_ports;
#endif

#ifdef CONFIG_VT
	ppc_md.kbd_setkeycode    = pckbd_setkeycode;
	ppc_md.kbd_getkeycode    = pckbd_getkeycode;
	ppc_md.kbd_translate     = pckbd_translate;
	ppc_md.kbd_unexpected_up = pckbd_unexpected_up;
	ppc_md.kbd_leds          = pckbd_leds;
	ppc_md.kbd_init_hw       = pckbd_init_hw;
#ifdef CONFIG_MAGIC_SYSRQ
	ppc_md.ppc_kbd_sysrq_xlate	 = pckbd_sysrq_xlate;
	SYSRQ_KEY = 0x54;
#endif
#endif

#ifdef CONFIG_SMP
	ppc_md.smp_ops		 = &prep_smp_ops;
#endif /* CONFIG_SMP */
}
/*
 * BK Id: SCCS/s.prep_time.c 1.10 09/08/01 15:47:42 paulus
 */
/*
 *  linux/arch/i386/kernel/time.c
 *
 *  Copyright (C) 1991, 1992, 1995  Linus Torvalds
 *
 * Adapted for PowerPC (PreP) by Gary Thomas
 * Modified by Cort Dougan (cort@cs.nmt.edu)
 *  copied and modified from intel version
 *
 */
#include <linux/errno.h>
#include <linux/sched.h>
#include <linux/kernel.h>
#include <linux/param.h>
#include <linux/string.h>
#include <linux/mm.h>
#include <linux/interrupt.h>
#include <linux/time.h>
#include <linux/timex.h>
#include <linux/kernel_stat.h>
#include <linux/init.h>

#include <asm/sections.h>
#include <asm/segment.h>
#include <asm/io.h>
#include <asm/processor.h>
#include <asm/machdep.h>
#include <asm/prep_nvram.h>
#include <asm/mk48t59.h>

#include <asm/time.h>

extern spinlock_t rtc_lock;

/*
 * The motorola uses the m48t18 rtc (includes DS1643) whose registers
 * are at a higher end of nvram (1ff8-1fff) than the ibm mc146818
 * rtc (ds1386) which has regs at addr 0-d).  The intel gets
 * past this because the bios emulates the mc146818.
 *
 * Why in the world did they have to use different clocks?
 *
 * Right now things are hacked to check which machine we're on then
 * use the appropriate macro.  This is very very ugly and I should
 * probably have a function that checks which machine we're on then
 * does things correctly transparently or a function pointer which
 * is setup at boot time to use the correct addresses.
 * -- Cort
 */

/*
 * Set the hardware clock. -- Cort
 */
__prep
int mc146818_set_rtc_time(unsigned long nowtime)
{
	unsigned char save_control, save_freq_select;
	struct rtc_time tm;

	spin_lock(&rtc_lock);
	to_tm(nowtime, &tm);

	/* tell the clock it's being set */
	save_control = CMOS_READ(RTC_CONTROL);
	
	CMOS_WRITE((save_control|RTC_SET), RTC_CONTROL);
	
	/* stop and reset prescaler */
	save_freq_select = CMOS_READ(RTC_FREQ_SELECT);
	
	CMOS_WRITE((save_freq_select|RTC_DIV_RESET2), RTC_FREQ_SELECT);
	
        tm.tm_year = (tm.tm_year - 1900) % 100;
	if (!(save_control & RTC_DM_BINARY) || RTC_ALWAYS_BCD) {
		BIN_TO_BCD(tm.tm_sec);
		BIN_TO_BCD(tm.tm_min);
		BIN_TO_BCD(tm.tm_hour);
		BIN_TO_BCD(tm.tm_mon);
		BIN_TO_BCD(tm.tm_mday);
		BIN_TO_BCD(tm.tm_year);
	}
	CMOS_WRITE(tm.tm_sec,  RTC_SECONDS);
	CMOS_WRITE(tm.tm_min,  RTC_MINUTES);
	CMOS_WRITE(tm.tm_hour, RTC_HOURS);
	CMOS_WRITE(tm.tm_mon,  RTC_MONTH);
	CMOS_WRITE(tm.tm_mday, RTC_DAY_OF_MONTH);
	CMOS_WRITE(tm.tm_year, RTC_YEAR);
	
	/* The following flags have to be released exactly in this order,
	 * otherwise the DS12887 (popular MC146818A clone with integrated
	 * battery and quartz) will not reset the oscillator and will not
	 * update precisely 500 ms later. You won't find this mentioned in
	 * the Dallas Semiconductor data sheets, but who believes data
	 * sheets anyway ...                           -- Markus Kuhn
	 */
	CMOS_WRITE(save_control,     RTC_CONTROL);
	CMOS_WRITE(save_freq_select, RTC_FREQ_SELECT);
	spin_unlock(&rtc_lock);

	return 0;
}

__prep
unsigned long mc146818_get_rtc_time(void)
{
	unsigned int year, mon, day, hour, min, sec;
	int uip, i;

	/* The Linux interpretation of the CMOS clock register contents:
	 * When the Update-In-Progress (UIP) flag goes from 1 to 0, the
	 * RTC registers show the second which has precisely just started.
	 * Let's hope other operating systems interpret the RTC the same way.
	 */

	/* Since the UIP flag is set for about 2.2 ms and the clock
	 * is typically written with a precision of 1 jiffy, trying
	 * to obtain a precision better than a few milliseconds is 
	 * an illusion. Only consistency is interesting, this also
	 * allows to use the routine for /dev/rtc without a potential
	 * 1 second kernel busy loop triggered by any reader of /dev/rtc. 
	 */

	for ( i = 0; i<1000000; i++) {
		uip = CMOS_READ(RTC_FREQ_SELECT);
		sec = CMOS_READ(RTC_SECONDS);
		min = CMOS_READ(RTC_MINUTES);
		hour = CMOS_READ(RTC_HOURS);
		day = CMOS_READ(RTC_DAY_OF_MONTH);
		mon = CMOS_READ(RTC_MONTH);
		year = CMOS_READ(RTC_YEAR);
		uip |= CMOS_READ(RTC_FREQ_SELECT);
		if ((uip & RTC_UIP)==0) break;
	}

	if (!(CMOS_READ(RTC_CONTROL) & RTC_DM_BINARY)
	    || RTC_ALWAYS_BCD)
	{
		BCD_TO_BIN(sec);
		BCD_TO_BIN(min);
		BCD_TO_BIN(hour);
		BCD_TO_BIN(day);
		BCD_TO_BIN(mon);
		BCD_TO_BIN(year);
	}
	if ((year += 1900) < 1970)
		year += 100;
	return mktime(year, mon, day, hour, min, sec);
}

__prep
int mk48t59_set_rtc_time(unsigned long nowtime)
{
	unsigned char save_control;
	struct rtc_time tm;

	spin_lock(&rtc_lock);
	to_tm(nowtime, &tm);

	/* tell the clock it's being written */
	save_control = ppc_md.nvram_read_val(MK48T59_RTC_CONTROLA);
	
	ppc_md.nvram_write_val(MK48T59_RTC_CONTROLA,
			     (save_control | MK48T59_RTC_CA_WRITE));

        tm.tm_year = (tm.tm_year - 1900) % 100;
	BIN_TO_BCD(tm.tm_sec);
	BIN_TO_BCD(tm.tm_min);
	BIN_TO_BCD(tm.tm_hour);
	BIN_TO_BCD(tm.tm_mon);
	BIN_TO_BCD(tm.tm_mday);
	BIN_TO_BCD(tm.tm_year);

	ppc_md.nvram_write_val(MK48T59_RTC_SECONDS,      tm.tm_sec);
	ppc_md.nvram_write_val(MK48T59_RTC_MINUTES,      tm.tm_min);
	ppc_md.nvram_write_val(MK48T59_RTC_HOURS,        tm.tm_hour);
	ppc_md.nvram_write_val(MK48T59_RTC_MONTH,        tm.tm_mon);
	ppc_md.nvram_write_val(MK48T59_RTC_DAY_OF_MONTH, tm.tm_mday);
	ppc_md.nvram_write_val(MK48T59_RTC_YEAR,         tm.tm_year);
	
	/* Turn off the write bit. */
	ppc_md.nvram_write_val(MK48T59_RTC_CONTROLA, save_control);
	spin_unlock(&rtc_lock);

	return 0;
}

__prep
unsigned long mk48t59_get_rtc_time(void)
{
	unsigned char save_control;
	unsigned int year, mon, day, hour, min, sec;

	/* Simple: freeze the clock, read it and allow updates again */
	save_control = ppc_md.nvram_read_val(MK48T59_RTC_CONTROLA);
	save_control &= ~MK48T59_RTC_CA_READ;
	ppc_md.nvram_write_val(MK48T59_RTC_CONTROLA, save_control);

	/* Set the register to read the value. */
	ppc_md.nvram_write_val(MK48T59_RTC_CONTROLA,
			     (save_control | MK48T59_RTC_CA_READ));

	sec = ppc_md.nvram_read_val(MK48T59_RTC_SECONDS);
	min = ppc_md.nvram_read_val(MK48T59_RTC_MINUTES);
	hour = ppc_md.nvram_read_val(MK48T59_RTC_HOURS);
	day = ppc_md.nvram_read_val(MK48T59_RTC_DAY_OF_MONTH);
	mon = ppc_md.nvram_read_val(MK48T59_RTC_MONTH);
	year = ppc_md.nvram_read_val(MK48T59_RTC_YEAR);

	/* Let the time values change again. */
	ppc_md.nvram_write_val(MK48T59_RTC_CONTROLA, save_control);

	BCD_TO_BIN(sec);
	BCD_TO_BIN(min);
	BCD_TO_BIN(hour);
	BCD_TO_BIN(day);
	BCD_TO_BIN(mon);
	BCD_TO_BIN(year);

	year = year + 1900;
	if (year < 1970) {
		year += 100;
	}

	return mktime(year, mon, day, hour, min, sec);
}
/*
 * BK Id: SCCS/s.residual.c 1.13 09/11/01 16:54:34 trini
 */
/*
 * Code to deal with the PReP residual data.
 *
 * Written by: Cort Dougan (cort@cs.nmt.edu)
 * Improved _greatly_ and rewritten by Gabriel Paubert (paubert@iram.es)
 *
 *  This file is based on the following documentation:
 *
 *	IBM Power Personal Systems Architecture
 *	Residual Data
 * 	Document Number: PPS-AR-FW0001
 *
 *  This file is subject to the terms and conditions of the GNU General Public
 *  License.  See the file COPYING in the main directory of this archive
 *  for more details.
 *
 */

#include <linux/string.h>
#include <asm/residual.h>
#include <asm/pnp.h>
#include <asm/byteorder.h>

#include <linux/errno.h>
#include <linux/sched.h>
#include <linux/kernel.h>
#include <linux/mm.h>
#include <linux/stddef.h>
#include <linux/unistd.h>
#include <linux/ptrace.h>
#include <linux/slab.h>
#include <linux/user.h>
#include <linux/a.out.h>
#include <linux/tty.h>
#include <linux/major.h>
#include <linux/interrupt.h>
#include <linux/reboot.h>
#include <linux/init.h>
#include <linux/blk.h>
#include <linux/ioport.h>
#include <linux/pci.h>
#include <linux/ide.h>

#include <asm/sections.h>
#include <asm/mmu.h>
#include <asm/processor.h>
#include <asm/io.h>
#include <asm/pgtable.h>
#include <asm/ide.h>


unsigned char __res[sizeof(RESIDUAL)] __prepdata = {0,};
RESIDUAL *res = (RESIDUAL *)&__res;

char * PnP_BASE_TYPES[] __initdata = {
  "Reserved",
  "MassStorageDevice",
  "NetworkInterfaceController",
  "DisplayController",
  "MultimediaController",
  "MemoryController",
  "BridgeController",
  "CommunicationsDevice",
  "SystemPeripheral",
  "InputDevice",
  "ServiceProcessor"
  };

/* Device Sub Type Codes */

unsigned char * PnP_SUB_TYPES[] __initdata = {
  "\001\000SCSIController",
  "\001\001IDEController",
  "\001\002FloppyController",
  "\001\003IPIController",
  "\001\200OtherMassStorageController",
  "\002\000EthernetController",
  "\002\001TokenRingController",
  "\002\002FDDIController",
  "\002\0x80OtherNetworkController",
  "\003\000VGAController",
  "\003\001SVGAController",
  "\003\002XGAController",
  "\003\200OtherDisplayController",
  "\004\000VideoController",
  "\004\001AudioController",
  "\004\200OtherMultimediaController",
  "\005\000RAM",
  "\005\001FLASH",
  "\005\200OtherMemoryDevice",
  "\006\000HostProcessorBridge",
  "\006\001ISABridge",
  "\006\002EISABridge",
  "\006\003MicroChannelBridge",
  "\006\004PCIBridge",
  "\006\005PCMCIABridge",
  "\006\006VMEBridge",
  "\006\200OtherBridgeDevice",
  "\007\000RS232Device",
  "\007\001ATCompatibleParallelPort",
  "\007\200OtherCommunicationsDevice",
  "\010\000ProgrammableInterruptController",
  "\010\001DMAController",
  "\010\002SystemTimer",
  "\010\003RealTimeClock",
  "\010\004L2Cache",
  "\010\005NVRAM",
  "\010\006PowerManagement",
  "\010\007CMOS",
  "\010\010OperatorPanel",
  "\010\011ServiceProcessorClass1",
  "\010\012ServiceProcessorClass2",
  "\010\013ServiceProcessorClass3",
  "\010\014GraphicAssist",
  "\010\017SystemPlanar",
  "\010\200OtherSystemPeripheral",
  "\011\000KeyboardController",
  "\011\001Digitizer",
  "\011\002MouseController",
  "\011\003TabletController",
  "\011\0x80OtherInputController",
  "\012\000GeneralMemoryController",
  NULL
};

/* Device Interface Type Codes */

unsigned char * PnP_INTERFACES[] __initdata = {
  "\000\000\000General",
  "\001\000\000GeneralSCSI",
  "\001\001\000GeneralIDE",
  "\001\001\001ATACompatible",

  "\001\002\000GeneralFloppy",
  "\001\002\001Compatible765",
  "\001\002\002NS398_Floppy",         /* NS Super I/O wired to use index
                                         register at port 398 and data
                                         register at port 399               */
  "\001\002\003NS26E_Floppy",         /* Ports 26E and 26F                  */
  "\001\002\004NS15C_Floppy",         /* Ports 15C and 15D                  */
  "\001\002\005NS2E_Floppy",          /* Ports 2E and 2F                    */
  "\001\002\006CHRP_Floppy",          /* CHRP Floppy in PR*P system         */

  "\001\003\000GeneralIPI",
  
  "\002\000\000GeneralEther",
  "\002\001\000GeneralToken",
  "\002\002\000GeneralFDDI",
  
  "\003\000\000GeneralVGA",
  "\003\001\000GeneralSVGA",
  "\003\002\000GeneralXGA",
  
  "\004\000\000GeneralVideo",
  "\004\001\000GeneralAudio",
  "\004\001\001CS4232Audio",            /* CS 4232 Plug 'n Play Configured    */

  "\005\000\000GeneralRAM",
  /* This one is obviously wrong ! */
  "\005\000\000PCIMemoryController",    /* PCI Config Method                  */
  "\005\000\001RS6KMemoryController",   /* RS6K Config Method                 */
  "\005\001\000GeneralFLASH",
  
  "\006\000\000GeneralHostBridge",
  "\006\001\000GeneralISABridge",
  "\006\002\000GeneralEISABridge",
  "\006\003\000GeneralMCABridge",
  /* GeneralPCIBridge = 0, */
  "\006\004\000PCIBridgeDirect",
  "\006\004\001PCIBridgeIndirect",
  "\006\004\002PCIBridgeRS6K",
  "\006\005\000GeneralPCMCIABridge",
  "\006\006\000GeneralVMEBridge",
  
  "\007\000\000GeneralRS232",
  "\007\000\001COMx",
  "\007\000\002Compatible16450",
  "\007\000\003Compatible16550",
  "\007\000\004NS398SerPort",         /* NS Super I/O wired to use index
                                         register at port 398 and data
                                         register at port 399               */
  "\007\000\005NS26ESerPort",         /* Ports 26E and 26F                  */
  "\007\000\006NS15CSerPort",         /* Ports 15C and 15D                  */
  "\007\000\007NS2ESerPort",          /* Ports 2E and 2F                    */

  "\007\001\000GeneralParPort",
  "\007\001\001LPTx",
  "\007\001\002NS398ParPort",         /* NS Super I/O wired to use index
                                         register at port 398 and data
                                         register at port 399               */
  "\007\001\003NS26EParPort",         /* Ports 26E and 26F                  */
  "\007\001\004NS15CParPort",         /* Ports 15C and 15D                  */
  "\007\001\005NS2EParPort",          /* Ports 2E and 2F                    */
  
  "\010\000\000GeneralPIC",
  "\010\000\001ISA_PIC",
  "\010\000\002EISA_PIC",
  "\010\000\003MPIC",
  "\010\000\004RS6K_PIC",

  "\010\001\000GeneralDMA",
  "\010\001\001ISA_DMA",
  "\010\001\002EISA_DMA",

  "\010\002\000GeneralTimer",
  "\010\002\001ISA_Timer",
  "\010\002\002EISA_Timer",
  "\010\003\000GeneralRTC",
  "\010\003\001ISA_RTC",
  
  "\010\004\001StoreThruOnly",
  "\010\004\002StoreInEnabled",
  "\010\004\003RS6KL2Cache",

  "\010\005\000IndirectNVRAM",        /* Indirectly addressed               */
  "\010\005\001DirectNVRAM",          /* Memory Mapped                      */
  "\010\005\002IndirectNVRAM24",      /* Indirectly addressed - 24 bit      */

  "\010\006\000GeneralPowerManagement",
  "\010\006\001EPOWPowerManagement",
  "\010\006\002PowerControl",         // d1378
  
  "\010\007\000GeneralCMOS",

  "\010\010\000GeneralOPPanel",
  "\010\010\001HarddiskLight",
  "\010\010\002CDROMLight",
  "\010\010\003PowerLight",
  "\010\010\004KeyLock",
  "\010\010\005ANDisplay",            /* AlphaNumeric Display               */
  "\010\010\006SystemStatusLED",      /* 3 digit 7 segment LED              */
  "\010\010\007CHRP_SystemStatusLED", /* CHRP LEDs in PR*P system           */

  "\010\011\000GeneralServiceProcessor",
  "\010\012\000GeneralServiceProcessor",
  "\010\013\000GeneralServiceProcessor",
  
  "\010\014\001TransferData",
  "\010\014\002IGMC32",
  "\010\014\003IGMC64",
  
  "\010\017\000GeneralSystemPlanar",   /* 10/5/95                            */
  NULL
  };

static const unsigned char __init *PnP_SUB_TYPE_STR(unsigned char BaseType, 
					     unsigned char SubType) {
	unsigned char ** s=PnP_SUB_TYPES;
	while (*s && !((*s)[0]==BaseType 
		       && (*s)[1]==SubType)) s++;
	if (*s) return *s+2;
	else return("Unknown !");
};

static const unsigned char __init *PnP_INTERFACE_STR(unsigned char BaseType, 
					      unsigned char SubType,
					      unsigned char Interface) {
	unsigned char ** s=PnP_INTERFACES;
	while (*s && !((*s)[0]==BaseType 
		       && (*s)[1]==SubType 
		       && (*s)[2]==Interface)) s++;
	if (*s) return *s+3;
	else return NULL;
};

static void __init printsmallvendor(PnP_TAG_PACKET *pkt, int size) {
	int i, c;
	char decomp[4];
#define p pkt->S14_Pack.S14_Data.S14_PPCPack
	switch(p.Type) {
	case 1:
	  /* Decompress first 3 chars */
	  c = *(unsigned short *)p.PPCData;
	  decomp[0]='A'-1+((c>>10)&0x1F);
	  decomp[1]='A'-1+((c>>5)&0x1F);
	  decomp[2]='A'-1+(c&0x1F);
	  decomp[3]=0;
	  printk("    Chip identification: %s%4.4X\n",
		 decomp, ld_le16((unsigned short *)(p.PPCData+2)));
	  break;
	default:
	  printk("    Small vendor item type 0x%2.2x, data (hex): ",
		 p.Type);
	  for(i=0; i<size-2; i++) printk("%2.2x ", p.PPCData[i]);
	  printk("\n");
	  break;
	}
#undef p
}

static void __init printsmallpacket(PnP_TAG_PACKET * pkt, int size) {
	static const unsigned char * intlevel[] = {"high", "low"};
	static const unsigned char * intsense[] = {"edge", "level"};

	switch (tag_small_item_name(pkt->S1_Pack.Tag)) {
	case PnPVersion:
	  printk("    PnPversion 0x%x.%x\n", 
		 pkt->S1_Pack.Version[0], /* How to interpret version ? */
		 pkt->S1_Pack.Version[1]);
	  break;
//	case Logicaldevice:
	  break;
//	case CompatibleDevice:
	  break;
	case IRQFormat:
#define p pkt->S4_Pack
	  printk("    IRQ Mask 0x%4.4x, %s %s sensitive\n", 
		 ld_le16((unsigned short *)p.IRQMask),
		 intlevel[(size>3) ? !(p.IRQInfo&0x05) : 0],
		 intsense[(size>3) ? !(p.IRQInfo&0x03) : 0]);
#undef p
	  break;
	case DMAFormat:
#define p pkt->S5_Pack
	  printk("    DMA channel mask 0x%2.2x, info 0x%2.2x\n",
		 p.DMAMask, p.DMAInfo);
#undef p
	  break;
	case StartDepFunc:
	  printk("Start dependent function:\n");
	  break;
	case EndDepFunc:
	  printk("End dependent function\n");
	  break;
	case IOPort:
#define p pkt->S8_Pack
	  printk("    Variable (%d decoded bits) I/O port\n"
		 "      from 0x%4.4x to 0x%4.4x, alignment %d, %d ports\n",
		 p.IOInfo&ISAAddr16bit?16:10,
		 ld_le16((unsigned short *)p.RangeMin),
 		 ld_le16((unsigned short *)p.RangeMax),
		 p.IOAlign, p.IONum); 
#undef p
	  break;
	case FixedIOPort:
#define p pkt->S9_Pack
	  printk("    Fixed (10 decoded bits) I/O port from %3.3x to %3.3x\n",
		 (p.Range[1]<<8)|p.Range[0],
		 ((p.Range[1]<<8)|p.Range[0])+p.IONum-1);
#undef p		 
	  break;
	case Res1:
	case Res2:
	case Res3:
	  printk("    Undefined packet type %d!\n", 
		 tag_small_item_name(pkt->S1_Pack.Tag));
	  break;
	case SmallVendorItem:
	  printsmallvendor(pkt,size);
	  break;
	default:
	  printk("    Type 0x2.2x%d, size=%d\n", 
		 pkt->S1_Pack.Tag, size);    
	  break;
	}
}

static void __init printlargevendor(PnP_TAG_PACKET * pkt, int size) {
	static const unsigned char * addrtype[] = {"I/O", "Memory", "System"};
	static const unsigned char * inttype[] = {"8259", "MPIC", "RS6k BUID %d"};
	static const unsigned char * convtype[] = {"Bus Memory", "Bus I/O", "DMA"};
	static const unsigned char * transtype[] = {"direct", "mapped", "direct-store segment"};
	static const unsigned char * L2type[] = {"WriteThru", "CopyBack"};
	static const unsigned char * L2assoc[] = {"DirectMapped", "2-way set"};

	int i;
	char tmpstr[30], *t;
#define p pkt->L4_Pack.L4_Data.L4_PPCPack
	switch(p.Type) {
	case 2:
	  printk("    %d K %s %s L2 cache, %d/%d bytes line/sector size\n",
		 ld_le32((unsigned int *)p.PPCData),
		 L2type[p.PPCData[10]-1],
		 L2assoc[p.PPCData[4]-1],
		 ld_le16((unsigned short *)p.PPCData+3),
		 ld_le16((unsigned short *)p.PPCData+4));
	  break;
	case 3:
	  printk("    PCI Bridge parameters\n"
		 "      ConfigBaseAddress %0x\n"
		 "      ConfigBaseData %0x\n"
		 "      Bus number %d\n",
		 ld_le32((unsigned int *)p.PPCData),
		 ld_le32((unsigned int *)(p.PPCData+8)),
		 p.PPCData[16]);
	  for(i=20; i<size-4; i+=12) {
	  	int j, first;
	  	if(p.PPCData[i]) printk("      PCI Slot %d", p.PPCData[i]);
		else printk ("      Integrated PCI device");
		for(j=0, first=1, t=tmpstr; j<4; j++) {
			int line=ld_le16((unsigned short *)(p.PPCData+i+4)+j);
			if(line!=0xffff){
			        if(first) first=0; else *t++='/';
				*t++='A'+j;
			}
		}
		*t='\0';
		printk(" DevFunc 0x%x interrupt line(s) %s routed to",
		       p.PPCData[i+1],tmpstr);
		sprintf(tmpstr,
			inttype[p.PPCData[i+2]-1],
			p.PPCData[i+3]);
		printk(" %s line(s) ",
		       tmpstr);
		for(j=0, first=1, t=tmpstr; j<4; j++) {
			int line=ld_le16((unsigned short *)(p.PPCData+i+4)+j);
			if(line!=0xffff){
				if(first) first=0; else *t++='/';
				t+=sprintf(t,"%d(%c)",
					   line&0x7fff,
					   line&0x8000?'E':'L');
			}
		}
		printk("%s\n",tmpstr);
	  }
	  break;
	case 5:
	  printk("    Bridge address translation, %s decoding:\n"
		 "      Processor  Bus        Size       Conversion Translation\n"
		 "      0x%8.8x 0x%8.8x 0x%8.8x %s %s\n",
		 p.PPCData[0]&1 ? "positive" : "subtractive",
		 ld_le32((unsigned int *)p.PPCData+1),
		 ld_le32((unsigned int *)p.PPCData+3),
		 ld_le32((unsigned int *)p.PPCData+5),
		 convtype[p.PPCData[2]-1],
		 transtype[p.PPCData[1]-1]);
	  break;
	case 6:
	  printk("    Bus speed %d Hz, %d slot(s)\n",
		 ld_le32((unsigned int *)p.PPCData),
		 p.PPCData[4]);
	  break;
	case 7:
	  printk("    SCSI buses: %d, id(s):", p.PPCData[0]);
	  for(i=1; i<=p.PPCData[0]; i++) 
	    printk(" %d%c", p.PPCData[i], i==p.PPCData[0] ? '\n' : ',');
	  break;
	case 9:
	  printk("    %s address (%d bits), at 0x%x size 0x%x bytes\n",
		 addrtype[p.PPCData[0]-1],
		 p.PPCData[1],
		 ld_le32((unsigned int *)(p.PPCData+4)),
		 ld_le32((unsigned int *)(p.PPCData+12)));
	  break;
	case 10:
	  sprintf(tmpstr,
		  inttype[p.PPCData[0]-1],
		  p.PPCData[1]);

	  printk("    ISA interrupts routed to %s\n"
		 "      lines", 
		 tmpstr);
	  for(i=0; i<16; i++) {
	  	int line=ld_le16((unsigned short *)p.PPCData+i+1);
		if (line!=0xffff) printk(" %d(IRQ%d)", line, i); 
	  }
	  printk("\n");
	  break;
	default:
	  printk("    Large vendor item type 0x%2.2x\n      Data (hex):",
		 p.Type);
	  for(i=0; i<size-4; i++) printk(" %2.2x", p.PPCData[i]);
	  printk("\n");
#undef p
	}
}

static void __init printlargepacket(PnP_TAG_PACKET * pkt, int size) {
	switch (tag_large_item_name(pkt->S1_Pack.Tag)) {
	case LargeVendorItem:
	  printlargevendor(pkt, size);
	  break;
	default:
	  printk("    Type 0x2.2x%d, size=%d\n", 
		 pkt->S1_Pack.Tag, size);    
	  break;
	}
}
static void __init printpackets(PnP_TAG_PACKET * pkt, const char * cat) {
	if (pkt->S1_Pack.Tag== END_TAG) {
		printk("  No packets describing %s resources.\n", cat);
		return;
	}
	printk(  "  Packets describing %s resources:\n",cat);
	do {
		int size;
		if (tag_type(pkt->S1_Pack.Tag)) {
		  	size= 3 +
			  pkt->L1_Pack.Count0 + 
			  pkt->L1_Pack.Count1*256;
			printlargepacket(pkt, size);
		} else {
			size=tag_small_count(pkt->S1_Pack.Tag)+1;
			printsmallpacket(pkt, size);
		}
		(unsigned char *) pkt+=size;
	} while (pkt->S1_Pack.Tag != END_TAG);
}

void __init print_residual_device_info(void)
{
	int i;
	PPC_DEVICE *dev;
#define did dev->DeviceId
	
	/* make sure we have residual data first */
	if ( res->ResidualLength == 0 )
		return;
	
	printk("Residual: %ld devices\n", res->ActualNumDevices);
	for ( i = 0;
	      i < res->ActualNumDevices ;
	      i++)
	{
	  	char decomp[4], sn[20];
		const char * s;
		dev = &res->Devices[i];
		s = PnP_INTERFACE_STR(did.BaseType, did.SubType, 
				      did.Interface);
		if(!s) {
			sprintf(sn, "interface %d", did.Interface);
			s=sn;
		}
		if ( did.BusId & PCIDEVICE ) 
		  printk("PCI Device, Bus %d, DevFunc 0x%x:",
			 dev->BusAccess.PCIAccess.BusNumber,
			 dev->BusAccess.PCIAccess.DevFuncNumber);
	       	if ( did.BusId & PNPISADEVICE ) printk("PNPISA Device:");
		if ( did.BusId & ISADEVICE ) 
		  printk("ISA Device, Slot %d, LogicalDev %d:",
			 dev->BusAccess.ISAAccess.SlotNumber,
			 dev->BusAccess.ISAAccess.LogicalDevNumber);
		if ( did.BusId & EISADEVICE ) printk("EISA Device:");
		if ( did.BusId & PROCESSORDEVICE ) 
		  printk("ProcBus Device, Bus %d, BUID %d: ",
			 dev->BusAccess.ProcBusAccess.BusNumber,
			 dev->BusAccess.ProcBusAccess.BUID);
		if ( did.BusId & PCMCIADEVICE ) printk("PCMCIA ");
		if ( did.BusId & VMEDEVICE ) printk("VME ");
		if ( did.BusId & MCADEVICE ) printk("MCA ");
		if ( did.BusId & MXDEVICE ) printk("MX ");
		/* Decompress first 3 chars */
		decomp[0]='A'-1+((did.DevId>>26)&0x1F);
		decomp[1]='A'-1+((did.DevId>>21)&0x1F);
		decomp[2]='A'-1+((did.DevId>>16)&0x1F);
		decomp[3]=0;
		printk(" %s%4.4lX, %s, %s, %s\n", 
		       decomp, did.DevId&0xffff,
		       PnP_BASE_TYPES[did.BaseType],
		       PnP_SUB_TYPE_STR(did.BaseType,did.SubType),
		       s);
		if ( dev->AllocatedOffset )
			printpackets( (union _PnP_TAG_PACKET *)
				      &res->DevicePnPHeap[dev->AllocatedOffset],
				      "allocated");
		if ( dev->PossibleOffset )
			printpackets( (union _PnP_TAG_PACKET *)
				      &res->DevicePnPHeap[dev->PossibleOffset],
				      "possible");
		if ( dev->CompatibleOffset )
			printpackets( (union _PnP_TAG_PACKET *)
				      &res->DevicePnPHeap[dev->CompatibleOffset],
				      "compatible");
	}
}


#if 0
static void __init printVPD(void) {
#define vpd res->VitalProductData
	int ps=vpd.PageSize, i, j;
	static const char* Usage[]={
	  "FirmwareStack",  "FirmwareHeap",  "FirmwareCode", "BootImage",
	  "Free", "Unpopulated", "ISAAddr", "PCIConfig",
	  "IOMemory", "SystemIO", "SystemRegs", "PCIAddr", 
	  "UnPopSystemRom", "SystemROM", "ResumeBlock", "Other" 
	};
	static const unsigned char *FWMan[]={
	  "IBM", "Motorola", "FirmWorks", "Bull"
	};
	static const unsigned char *FWFlags[]={
	  "Conventional", "OpenFirmware", "Diagnostics", "LowDebug",
	  "MultiBoot", "LowClient", "Hex41", "FAT", 
	  "ISO9660", "SCSI_ID_Override", "Tape_Boot", "FW_Boot_Path"
	};
	static const unsigned char *ESM[]={
	  "Port92", "PCIConfigA8", "FF001030", "????????"
	};
	static const unsigned char *SIOM[]={
	  "Port850", "????????", "PCIConfigA8", "????????"
	};

	printk("Model: %s\n",vpd.PrintableModel);
	printk("Serial: %s\n", vpd.Serial);
	printk("FirmwareSupplier: %s\n", FWMan[vpd.FirmwareSupplier]);
	printk("FirmwareFlags:");
	for(j=0; j<12; j++) {
	  	if (vpd.FirmwareSupports & (1<<j)) {
			printk(" %s%c", FWFlags[j], 
			       vpd.FirmwareSupports&(-2<<j) ? ',' : '\n');
		}
	}
	printk("NVRamSize: %ld\n", vpd.NvramSize);
	printk("SIMMslots: %ld\n", vpd.NumSIMMSlots);
	printk("EndianSwitchMethod: %s\n", 
	       ESM[vpd.EndianSwitchMethod>2 ? 2 : vpd.EndianSwitchMethod]);
	printk("SpreadIOMethod: %s\n", 
	       SIOM[vpd.SpreadIOMethod>3 ? 3 : vpd.SpreadIOMethod]);
	printk("Processor/Bus frequencies (Hz): %ld/%ld\n",
	       vpd.ProcessorHz, vpd.ProcessorBusHz);
	printk("Time Base Divisor: %ld\n", vpd.TimeBaseDivisor);
	printk("WordWidth, PageSize: %ld, %d\n", vpd.WordWidth, ps);
	printk("Cache sector size, Lock granularity: %ld, %ld\n",
	       vpd.CoherenceBlockSize, vpd.GranuleSize);
	for (i=0; i<res->ActualNumMemSegs; i++) {
		int mask=res->Segs[i].Usage, first, j;
		printk("%8.8lx-%8.8lx ", 
		       res->Segs[i].BasePage*ps,
		       (res->Segs[i].PageCount+res->Segs[i].BasePage)*ps-1);
		for(j=15, first=1; j>=0; j--) {
			if (mask&(1<<j)) {
				if (first) first=0;
				else printk(", ");
				printk("%s", Usage[j]);
			}
		}
		printk("\n");
	}
}

/*
 * Spit out some info about residual data
 */
void print_residual_device_info(void)
{
	int i;
	union _PnP_TAG_PACKET *pkt;
	PPC_DEVICE *dev;
#define did dev->DeviceId
	
	/* make sure we have residual data first */
	if ( res->ResidualLength == 0 )
		return;
	printk("Residual: %ld devices\n", res->ActualNumDevices);
	for ( i = 0;
	      i < res->ActualNumDevices ;
	      i++)
	{
		dev = &res->Devices[i];
		/*
		 * pci devices
		 */
		if ( did.BusId & PCIDEVICE )
		{
			printk("PCI Device:");
			/* unknown vendor */
			if ( !strncmp( "Unknown", pci_strvendor(did.DevId>>16), 7) )
				printk(" id %08lx types %d/%d", did.DevId,
				       did.BaseType, did.SubType);
			/* known vendor */
			else
				printk(" %s %s",
				       pci_strvendor(did.DevId>>16),
				       pci_strdev(did.DevId>>16,
						  did.DevId&0xffff)
					);
			
			if ( did.BusId & PNPISADEVICE )
			{
				printk(" pnp:");
				/* get pnp info on the device */
				pkt = (union _PnP_TAG_PACKET *)
					&res->DevicePnPHeap[dev->AllocatedOffset];
				for (; pkt->S1_Pack.Tag != DF_END_TAG;
				     pkt++ )
				{
					if ( (pkt->S1_Pack.Tag == S4_Packet) ||
					     (pkt->S1_Pack.Tag == S4_Packet_flags) )
						printk(" irq %02x%02x",
						       pkt->S4_Pack.IRQMask[0],
						       pkt->S4_Pack.IRQMask[1]);
				}
			}
			printk("\n");
			continue;
		}
		/*
		 * isa devices
		 */
		if ( did.BusId & ISADEVICE )
		{
			printk("ISA Device: basetype: %d subtype: %d",
			       did.BaseType, did.SubType);
			printk("\n");
			continue;
		}		
		/*
		 * eisa devices
		 */
		if ( did.BusId & EISADEVICE )
		{
			printk("EISA Device: basetype: %d subtype: %d",
			       did.BaseType, did.SubType);
			printk("\n");
			continue;
		}		
		/*
		 * proc bus devices
		 */
		if ( did.BusId & PROCESSORDEVICE )
		{
			printk("ProcBus Device: basetype: %d subtype: %d",
			       did.BaseType, did.SubType);
			printk("\n");
			continue;
		}
		/*
		 * pcmcia devices
		 */
		if ( did.BusId & PCMCIADEVICE )
		{
			printk("PCMCIA Device: basetype: %d subtype: %d",
			       did.BaseType, did.SubType);
			printk("\n");
			continue;
		}		
		printk("Unknown bus access device: busid %lx\n",
		       did.BusId);
	}
}
#endif	

/* Returns the device index in the residual data, 
   any of the search items may be set as -1 for wildcard,
   DevID number field (second halfword) is big endian ! 

   Examples:
   - search for the Interrupt controller (8259 type), 2 methods:
     1) i8259 = residual_find_device(~0, 
                                     NULL, 
				     SystemPeripheral, 
				     ProgrammableInterruptController, 
				     ISA_PIC, 
				     0);
     2) i8259 = residual_find_device(~0, "PNP0000", -1, -1, -1, 0) 

   - search for the first two serial devices, whatever their type)
     iserial1 = residual_find_device(~0,NULL,
                                     CommunicationsDevice,
				     RS232Device,
				     -1, 0)
     iserial2 = residual_find_device(~0,NULL,
                                     CommunicationsDevice,
				     RS232Device,
				     -1, 1)
   - but search for typical COM1 and COM2 is not easy due to the
     fact that the interface may be anything and the name "PNP0500" or 
     "PNP0501". Quite bad. 

*/

/* devid are easier to uncompress than to compress, so to minimize bloat
in this rarely used area we unencode and compare */

/* in residual data number is big endian in the device table and
little endian in the heap, so we use two parameters to avoid writing
two very similar functions */

static int __init same_DevID(unsigned short vendor,
	       unsigned short Number,
	       char * str) 
{
	static unsigned const char hexdigit[]="0123456789ABCDEF";
	if (strlen(str)!=7) return 0;
	if ( ( ((vendor>>10)&0x1f)+'A'-1 == str[0])  &&
	     ( ((vendor>>5)&0x1f)+'A'-1 == str[1])   &&
	     ( (vendor&0x1f)+'A'-1 == str[2])        &&
	     (hexdigit[(Number>>12)&0x0f] == str[3]) &&
	     (hexdigit[(Number>>8)&0x0f] == str[4])  &&
	     (hexdigit[(Number>>4)&0x0f] == str[5])  &&
	     (hexdigit[Number&0x0f] == str[6]) ) return 1;
	return 0;
}

PPC_DEVICE __init *residual_find_device(unsigned long BusMask,
			 unsigned char * DevID,
			 int BaseType,
			 int SubType,
			 int Interface,
			 int n)
{
	int i;
	if ( !res->ResidualLength ) return NULL;
	for (i=0; i<res->ActualNumDevices; i++) {
#define Dev res->Devices[i].DeviceId
		if ( (Dev.BusId&BusMask)                                  &&
		     (BaseType==-1 || Dev.BaseType==BaseType)             &&
		     (SubType==-1 || Dev.SubType==SubType)                &&
		     (Interface==-1 || Dev.Interface==Interface)          &&
		     (DevID==NULL || same_DevID((Dev.DevId>>16)&0xffff,
						Dev.DevId&0xffff, DevID)) &&
		     !(n--) ) return res->Devices+i;
#undef Dev
	}
	return 0;
}

PPC_DEVICE __init *residual_find_device_id(unsigned long BusMask,
			 unsigned short DevID,
			 int BaseType,
			 int SubType,
			 int Interface,
			 int n)
{
	int i;
	if ( !res->ResidualLength ) return NULL;
	for (i=0; i<res->ActualNumDevices; i++) {
#define Dev res->Devices[i].DeviceId
		if ( (Dev.BusId&BusMask)                                  &&
		     (BaseType==-1 || Dev.BaseType==BaseType)             &&
		     (SubType==-1 || Dev.SubType==SubType)                &&
		     (Interface==-1 || Dev.Interface==Interface)          &&
		     (DevID==0xffff || (Dev.DevId&0xffff) == DevID)	  &&
		     !(n--) ) return res->Devices+i;
#undef Dev
	}
	return 0;
}

PnP_TAG_PACKET *PnP_find_packet(unsigned char *p,
				unsigned packet_tag,
				int n)
{
	unsigned mask, masked_tag, size;
	if(!p) return 0;
	if (tag_type(packet_tag)) mask=0xff; else mask=0xF8;
	masked_tag = packet_tag&mask;
	for(; *p != END_TAG; p+=size) {
		if ((*p & mask) == masked_tag && !(n--)) 
			return (PnP_TAG_PACKET *) p;
		if (tag_type(*p))
			size=ld_le16((unsigned short *)(p+1))+3;
		else 
			size=tag_small_count(*p)+1;
	}
	return 0; /* not found */
}

PnP_TAG_PACKET __init *PnP_find_small_vendor_packet(unsigned char *p,
					     unsigned packet_type,
					     int n)
{
	int next=0;
	while (p) {
		p = (unsigned char *) PnP_find_packet(p, 0x70, next);
		if (p && p[1]==packet_type && !(n--)) 
			return (PnP_TAG_PACKET *) p;
		next = 1;
	};
	return 0; /* not found */
}

PnP_TAG_PACKET __init *PnP_find_large_vendor_packet(unsigned char *p,
					   unsigned packet_type,
					   int n)
{
	int next=0;
	while (p) {
		p = (unsigned char *) PnP_find_packet(p, 0x84, next);
		if (p && p[3]==packet_type && !(n--)) 
			return (PnP_TAG_PACKET *) p;
		next = 1;
	};
	return 0; /* not found */
}
/*
 * BK Id: SCCS/s.entry.S 1.26 01/25/02 15:15:24 benh
 */
/*
 *  PowerPC version 
 *    Copyright (C) 1995-1996 Gary Thomas (gdt@linuxppc.org)
 *  Rewritten by Cort Dougan (cort@fsmlabs.com) for PReP
 *    Copyright (C) 1996 Cort Dougan <cort@fsmlabs.com>
 *  Adapted for Power Macintosh by Paul Mackerras.
 *  Low-level exception handlers and MMU support
 *  rewritten by Paul Mackerras.
 *    Copyright (C) 1996 Paul Mackerras.
 *  MPC8xx modifications Copyright (C) 1997 Dan Malek (dmalek@jlc.net).
 *
 *  This file contains the system call entry code, context switch
 *  code, and exception/interrupt return code for PowerPC.
 *
 *  This program is free software; you can redistribute it and/or
 *  modify it under the terms of the GNU General Public License
 *  as published by the Free Software Foundation; either version
 *  2 of the License, or (at your option) any later version.
 *	
 */

#include "ppc_asm.h"
#include <linux/config.h>
#include <linux/errno.h>
#include <linux/sys.h>
#include <linux/threads.h>
#include <asm/processor.h>
#include <asm/page.h>
#include <asm/mmu.h>
#include <asm/cputable.h>

#undef SHOW_SYSCALLS
#undef SHOW_SYSCALLS_TASK

#ifdef SHOW_SYSCALLS_TASK
	.data
show_syscalls_task:
	.long	-1
#endif

/*
 * Handle a system call.
 */
	.text
_GLOBAL(DoSyscall)
	stw	r0,THREAD+LAST_SYSCALL(r2)
	lwz	r11,_CCR(r1)	/* Clear SO bit in CR */
	lis	r10,0x1000
	andc	r11,r11,r10
	stw	r11,_CCR(r1)
#ifdef SHOW_SYSCALLS
#ifdef SHOW_SYSCALLS_TASK
	lis	r31,show_syscalls_task@ha
	lwz	r31,show_syscalls_task@l(r31)
	cmp	0,r2,r31
	bne	1f
#endif
	lis	r3,7f@ha
	addi	r3,r3,7f@l
	lwz	r4,GPR0(r1)
	lwz	r5,GPR3(r1)
	lwz	r6,GPR4(r1)
	lwz	r7,GPR5(r1)
	lwz	r8,GPR6(r1)
	lwz	r9,GPR7(r1)
	bl	printk
	lis	r3,77f@ha
	addi	r3,r3,77f@l
	lwz	r4,GPR8(r1)
	lwz	r5,GPR9(r1)
	mr	r6,r2
	bl	printk
	lwz	r0,GPR0(r1)
	lwz	r3,GPR3(r1)
	lwz	r4,GPR4(r1)
	lwz	r5,GPR5(r1)
	lwz	r6,GPR6(r1)
	lwz	r7,GPR7(r1)
	lwz	r8,GPR8(r1)
1:
#endif /* SHOW_SYSCALLS */
	cmpi	0,r0,0x7777	/* Special case for 'sys_sigreturn' */
	beq-	10f
	cmpi    0,r0,0x6666     /* Special case for 'sys_rt_sigreturn' */
	beq-    16f
	lwz	r10,TASK_PTRACE(r2)
	andi.	r10,r10,PT_TRACESYS
	bne-	50f
	cmpli	0,r0,NR_syscalls
	bge-	66f
	lis	r10,sys_call_table@h
	ori	r10,r10,sys_call_table@l
	slwi	r0,r0,2
	lwzx	r10,r10,r0	/* Fetch system call handler [ptr] */
	cmpi	0,r10,0
	beq-	66f
	mtlr	r10
	addi	r9,r1,STACK_FRAME_OVERHEAD
	blrl			/* Call handler */
	.globl	ret_from_syscall_1
ret_from_syscall_1:
20:	stw	r3,RESULT(r1)	/* Save result */
#ifdef SHOW_SYSCALLS
#ifdef SHOW_SYSCALLS_TASK
	cmp	0,r2,r31
	bne	91f
#endif
	mr	r4,r3
	lis	r3,79f@ha
	addi	r3,r3,79f@l
	bl	printk
	lwz	r3,RESULT(r1)
91:
#endif
	li	r10,-_LAST_ERRNO
	cmpl	0,r3,r10
	blt	30f
	neg	r3,r3
	cmpi	0,r3,ERESTARTNOHAND
	bne	22f
	li	r3,EINTR
22:	lwz	r10,_CCR(r1)	/* Set SO bit in CR */
	oris	r10,r10,0x1000
	stw	r10,_CCR(r1)
30:	stw	r3,GPR3(r1)	/* Update return value */
	b	ret_from_except
66:	li	r3,ENOSYS
	b	22b
/* sys_sigreturn */
10:	addi	r3,r1,STACK_FRAME_OVERHEAD
	bl	sys_sigreturn
	cmpi    0,r3,0          /* Check for restarted system call */
	bge     ret_from_except
	b       20b
/* sys_rt_sigreturn */
16:	addi    r3,r1,STACK_FRAME_OVERHEAD
	bl      sys_rt_sigreturn
	cmpi	0,r3,0		/* Check for restarted system call */
	bge	ret_from_except
	b	20b
/* Traced system call support */
50:	bl	syscall_trace
	lwz	r0,GPR0(r1)	/* Restore original registers */
	lwz	r3,GPR3(r1)
	lwz	r4,GPR4(r1)
	lwz	r5,GPR5(r1)
	lwz	r6,GPR6(r1)
	lwz	r7,GPR7(r1)
	lwz	r8,GPR8(r1)
	lwz	r9,GPR9(r1)
	cmpli	0,r0,NR_syscalls
	bge-	66f
	lis	r10,sys_call_table@h
	ori	r10,r10,sys_call_table@l
	slwi	r0,r0,2
	lwzx	r10,r10,r0	/* Fetch system call handler [ptr] */
	cmpi	0,r10,0
	beq-	66f
	mtlr	r10
	addi	r9,r1,STACK_FRAME_OVERHEAD
	blrl			/* Call handler */
	.globl	ret_from_syscall_2
ret_from_syscall_2:
	stw	r3,RESULT(r1)	/* Save result */	
	stw	r3,GPR0(r1)	/* temporary gross hack to make strace work */
	li	r10,-_LAST_ERRNO
	cmpl	0,r3,r10
	blt	60f
	neg	r3,r3
	cmpi	0,r3,ERESTARTNOHAND
	bne	52f
	li	r3,EINTR
52:	lwz	r10,_CCR(r1)	/* Set SO bit in CR */
	oris	r10,r10,0x1000
	stw	r10,_CCR(r1)
60:	stw	r3,GPR3(r1)	/* Update return value */
	bl	syscall_trace
	b	ret_from_except
66:	li	r3,ENOSYS
	b	52b
#ifdef SHOW_SYSCALLS
7:	.string	"syscall %d(%x, %x, %x, %x, %x, "
77:	.string	"%x, %x), current=%p\n"
79:	.string	" -> %x\n"
	.align	2,0
#endif

/*
 * This routine switches between two different tasks.  The process
 * state of one is saved on its kernel stack.  Then the state
 * of the other is restored from its kernel stack.  The memory
 * management hardware is updated to the second process's state.
 * Finally, we can return to the second process.
 * On entry, r3 points to the THREAD for the current task, r4
 * points to the THREAD for the new task.
 *
 * Note: there are two ways to get to the "going out" portion
 * of this code; either by coming in via the entry (_switch)
 * or via "fork" which must set up an environment equivalent
 * to the "_switch" path.  If you change this , you'll have to
 * change the fork code also.
 *
 * The code which creates the new task context is in 'copy_thread'
 * in arch/ppc/kernel/process.c
 */	
_GLOBAL(_switch)
	stwu	r1,-INT_FRAME_SIZE(r1)
	stw	r0,GPR0(r1)
	lwz	r0,0(r1)
	stw	r0,GPR1(r1)
	/* r3-r13 are caller saved -- Cort */
	SAVE_GPR(2, r1)
	SAVE_8GPRS(14, r1)
	SAVE_10GPRS(22, r1)
	mflr	r20		/* Return to switch caller */
	stw	r20,INT_FRAME_SIZE+4(r1)
	mfmsr	r22
	li	r0,MSR_FP	/* Disable floating-point */
#ifdef CONFIG_ALTIVEC
BEGIN_FTR_SECTION
	oris	r0,r0,MSR_VEC@h	/* Disable altivec */
END_FTR_SECTION_IFSET(CPU_FTR_ALTIVEC)
#endif /* CONFIG_ALTIVEC */
	and.	r0,r0,r22	/* FP or altivec enabled? */
	beq+	1f
	andc	r22,r22,r0
	mtmsr	r22
	isync
1:	stw	r20,_NIP(r1)
	stw	r22,_MSR(r1)
	stw	r20,_LINK(r1)
	mfcr	r20
	mfctr	r22
	mfspr	r23,XER
	stw	r20,_CCR(r1)
	stw	r22,_CTR(r1)
	stw	r23,_XER(r1)
	li	r0,0x0ff0
	stw	r0,TRAP(r1)
	stw	r1,KSP(r3)	/* Set old stack pointer */

	tophys(r0,r4)
	CLR_TOP32(r0)
	mtspr	SPRG3,r0	/* Update current THREAD phys addr */
	lwz	r1,KSP(r4)	/* Load new stack pointer */
	/* save the old current 'last' for return value */
	mr	r3,r2
	addi	r2,r4,-THREAD	/* Update current */
	lwz	r0,_CCR(r1)
	mtcrf	0xFF,r0
	/* r3-r13 are destroyed -- Cort */
	REST_2GPRS(14, r1)
	REST_8GPRS(16, r1)
	REST_8GPRS(24, r1)

	lwz	r4,_NIP(r1)	/* Return to _switch caller in new task */
	mtlr	r4
	addi	r1,r1,INT_FRAME_SIZE
	blr

	.globl	ret_from_fork
ret_from_fork:
	bl	schedule_tail
	lwz	r0,TASK_PTRACE(r2)
	andi.	r0,r0,PT_TRACESYS
	bnel-	syscall_trace
	b	ret_from_except

	.globl	ret_from_intercept
ret_from_intercept:
	/*
	 * We may be returning from RTL and cannot do the normal checks
	 * -- Cort
	 */
	cmpi	0,r3,0
	beq	restore
	.globl	ret_from_except
ret_from_except:
	lwz	r3,_MSR(r1)	/* Returning to user mode? */
	andi.	r3,r3,MSR_PR
	beq+	do_signal_ret	/* if so, check need_resched and signals */
	lwz	r3,NEED_RESCHED(r2)
	cmpi	0,r3,0		/* check need_resched flag */
	beq+	7f
	bl	schedule
7:	lwz	r5,SIGPENDING(r2) /* Check for pending unblocked signals */
	cmpwi	0,r5,0
	beq+	do_signal_ret
	li	r3,0
	addi	r4,r1,STACK_FRAME_OVERHEAD
	bl	do_signal
	.globl	do_signal_ret
do_signal_ret:
	.globl ret_to_user_hook	
ret_to_user_hook:
	nop
restore:
	lwz	r3,_XER(r1)
	mtspr	XER,r3
	REST_10GPRS(9,r1)
	REST_10GPRS(19,r1)
	REST_2GPRS(29,r1)
	REST_GPR(31,r1)

	/* make sure we hard disable here, even if rtl is active, to protect
	 * SRR[01] and SPRG2 -- Cort 
	 */
	mfmsr	r0		/* Get current interrupt state */
	rlwinm	r0,r0,0,17,15	/* clear MSR_EE in r0 */
	SYNC			/* Some chip revs have problems here... */
	mtmsr	r0		/* Update machine state */

	stwcx.	r0,0,r1		/* to clear the reservation */

	/* if returning to user mode, set new sprg2 and save kernel SP */
	lwz	r0,_MSR(r1)
	andi.	r0,r0,MSR_PR
	beq+	1f
#ifdef CONFIG_ALTIVEC
BEGIN_FTR_SECTION
	lwz	r0,THREAD+THREAD_VRSAVE(r2)
	mtspr	SPRN_VRSAVE,r0		/* if G4, restore VRSAVE reg */
END_FTR_SECTION_IFSET(CPU_FTR_ALTIVEC)
#endif /* CONFIG_ALTIVEC */
	addi	r0,r1,INT_FRAME_SIZE	/* size of frame */
	stw	r0,THREAD+KSP(r2)	/* save kernel stack pointer */
	tophys(r8,r1)
	CLR_TOP32(r8)
	mtspr	SPRG2,r8		/* phys exception stack pointer */
1:
	lwz	r3,_CTR(r1)
	lwz	r0,_LINK(r1)
	mtctr	r3
	mtlr	r0
	REST_4GPRS(3, r1)
	REST_2GPRS(7, r1)

#ifndef CONFIG_SMP
	/* We have to "dummy" load from the context save area in case
	 * these instructions cause an MMU fault.  If this happens
	 * after we load SRR0/SRR1, our return context is hosed.  -- Dan
	 * 
	 * This workaround is not enough, we must also make sure the
	 * actual code for this routine is in the TLB or BAT mapped.
	 * For 6xx/Power3, we know the code is in a BAT, so this should
	 * be enough in UP. In SMP, I limit lowmem to the amount of
	 * RAM that can be BAT mapped. Other CPUs may need additional
	 * tweaks, especially if used SMP or if the code for this routine
	 * crosses page boundaries. The TLB pin down for 4xx should help
	 * for example. --BenH.
	 */
	lwz	r0,GPR0(r1)
	lwz	r0,GPR2(r1)
	lwz	r0,GPR1(r1)
#endif /* ndef CONFIG_SMP */

	/* We re-use r3,r4 here (the load above was to cause the MMU
	 * fault if necessary).  Using r3,r4 removes the need to "dummy"
	 * load the CCR and NIP.  Since we load them we may as well
	 * use them.
	 */
	lwz	r3,_CCR(r1)
	lwz	r4,_NIP(r1)

	lwz	r0,_MSR(r1)
	FIX_SRR1(r0,r2)
	mtspr	SRR1,r0
	mtcrf	0xFF,r3
	mtspr	SRR0,r4
	lwz	r0,GPR0(r1)
	lwz	r2,GPR2(r1)
	lwz	r3,GPR3(r1)
	lwz	r4,GPR4(r1)
	lwz	r1,GPR1(r1)
	SYNC
	RFI


/*
 * PROM code for specific machines follows.  Put it 
 * here so it's easy to add arch-specific sections later.
 * -- Cort
 */
#if defined(CONFIG_ALL_PPC)
/*
 * On CHRP, the Run-Time Abstraction Services (RTAS) have to be
 * called with the MMU off.
 */
	.globl	enter_rtas
enter_rtas:
	mflr	r0
	stw	r0,20(r1)
	lis	r4,rtas_data@ha
	lwz	r4,rtas_data@l(r4)
	lis	r6,1f@ha	/* physical return address for rtas */
	addi	r6,r6,1f@l
	addis	r6,r6,-KERNELBASE@h
	subi	r7,r1,INT_FRAME_SIZE
	addis	r7,r7,-KERNELBASE@h
	lis	r8,rtas_entry@ha
	lwz	r8,rtas_entry@l(r8)
	mfmsr	r9
	stw	r9,8(r1)
	li	r0,0
	ori	r0,r0,MSR_EE|MSR_SE|MSR_BE|MSR_FE0|MSR_FE1
	andc	r0,r9,r0
	li	r10,MSR_IR|MSR_DR|MSR_FP
	andc	r9,r0,r10
	SYNC			/* disable interrupts so SRR0/1 */
	mtmsr	r0		/* don't get trashed */
	mtlr	r6
	CLR_TOP32(r7)
	mtspr	SPRG2,r7
	mtspr	SRR0,r8
	mtspr	SRR1,r9
	RFI
1:	addis	r9,r1,-KERNELBASE@h
	lwz	r8,20(r9)	/* get return address */
	lwz	r9,8(r9)	/* original msr value */
	FIX_SRR1(r9,r0)
	li	r0,0
	mtspr	SPRG2,r0
	mtspr	SRR0,r8
	mtspr	SRR1,r9
	RFI			/* return to caller */
#endif /* CONFIG_ALL_PPC */
/*
 * BK Id: SCCS/s.apus_setup.c 1.24 11/13/01 21:26:07 paulus
 */
/*
 *  linux/arch/ppc/kernel/apus_setup.c
 *
 *  Copyright (C) 1998, 1999  Jesper Skov
 *
 *  Basically what is needed to replace functionality found in
 *  arch/m68k allowing Amiga drivers to work under APUS.
 *  Bits of code and/or ideas from arch/m68k and arch/ppc files.
 *
 * TODO:
 *  This file needs a *really* good cleanup. Restructure and optimize.
 *  Make sure it can be compiled for non-APUS configs. Begin to move
 *  Amiga specific stuff into mach/amiga.
 */

#include <linux/config.h>
#include <linux/types.h>
#include <linux/kernel.h>
#include <linux/sched.h>
#include <linux/kd.h>
#include <linux/init.h>
#include <linux/hdreg.h>
#include <linux/blk.h>
#include <linux/pci.h>
#include <linux/seq_file.h>

#ifdef CONFIG_APUS
#include <asm/logging.h>
#endif

/* Needs INITSERIAL call in head.S! */
#undef APUS_DEBUG


#include <linux/ide.h>
#define T_CHAR          (0x0000)        /* char:  don't touch  */
#define T_SHORT         (0x4000)        /* short: 12 -> 21     */
#define T_INT           (0x8000)        /* int:   1234 -> 4321 */
#define T_TEXT          (0xc000)        /* text:  12 -> 21     */

#define T_MASK_TYPE     (0xc000)
#define T_MASK_COUNT    (0x3fff)

#define D_CHAR(cnt)     (T_CHAR  | (cnt))
#define D_SHORT(cnt)    (T_SHORT | (cnt))
#define D_INT(cnt)      (T_INT   | (cnt))
#define D_TEXT(cnt)     (T_TEXT  | (cnt))

static u_short driveid_types[] = {
        D_SHORT(10),    /* config - vendor2 */
        D_TEXT(20),     /* serial_no */
        D_SHORT(3),     /* buf_type, buf_size - ecc_bytes */
        D_TEXT(48),     /* fw_rev - model */
        D_CHAR(2),      /* max_multsect - vendor3 */
        D_SHORT(1),     /* dword_io */
        D_CHAR(2),      /* vendor4 - capability */
        D_SHORT(1),     /* reserved50 */
        D_CHAR(4),      /* vendor5 - tDMA */
        D_SHORT(4),     /* field_valid - cur_sectors */
        D_INT(1),       /* cur_capacity */
        D_CHAR(2),      /* multsect - multsect_valid */
        D_INT(1),       /* lba_capacity */
        D_SHORT(194)    /* dma_1word - reservedyy */
};

#define num_driveid_types       (sizeof(driveid_types)/sizeof(*driveid_types))

#include <asm/bootinfo.h>
#include <asm/setup.h>
#include <asm/amigahw.h>
#include <asm/amigaints.h>
#include <asm/amigappc.h>
#include <asm/pgtable.h>
#include <asm/io.h>
#include <asm/dma.h>
#include <asm/machdep.h>

#include "local_irq.h"

unsigned long m68k_machtype;
char debug_device[6] = "";

extern void amiga_init_IRQ(void);

void (*mach_sched_init) (void (*handler)(int, void *, struct pt_regs *)) __initdata = NULL;
/* machine dependent keyboard functions */
int (*mach_keyb_init) (void) __initdata = NULL;
int (*mach_kbdrate) (struct kbd_repeat *) = NULL;
void (*mach_kbd_leds) (unsigned int) = NULL;
/* machine dependent irq functions */
void (*mach_init_IRQ) (void) __initdata = NULL;
void (*(*mach_default_handler)[]) (int, void *, struct pt_regs *) = NULL;
void (*mach_get_model) (char *model) = NULL;
int (*mach_get_hardware_list) (char *buffer) = NULL;
int (*mach_get_irq_list) (char *) = NULL;
void (*mach_process_int) (int, struct pt_regs *) = NULL;
/* machine dependent timer functions */
unsigned long (*mach_gettimeoffset) (void);
void (*mach_gettod) (int*, int*, int*, int*, int*, int*);
int (*mach_hwclk) (int, struct hwclk_time*) = NULL;
int (*mach_set_clock_mmss) (unsigned long) = NULL;
void (*mach_reset)( void );
long mach_max_dma_address = 0x00ffffff; /* default set to the lower 16MB */
#if defined(CONFIG_AMIGA_FLOPPY)
void (*mach_floppy_setup) (char *, int *) __initdata = NULL;
void (*mach_floppy_eject) (void) = NULL;
#endif
#ifdef CONFIG_HEARTBEAT
void (*mach_heartbeat) (int) = NULL;
extern void apus_heartbeat (void);
#endif

extern unsigned long amiga_model;
extern unsigned decrementer_count;/* count value for 1e6/HZ microseconds */
extern unsigned count_period_num; /* 1 decrementer count equals */
extern unsigned count_period_den; /* count_period_num / count_period_den us */

int num_memory = 0;
struct mem_info memory[NUM_MEMINFO];/* memory description */
/* FIXME: Duplicate memory data to avoid conflicts with m68k shared code. */
int m68k_realnum_memory = 0;
struct mem_info m68k_memory[NUM_MEMINFO];/* memory description */

struct mem_info ramdisk;

extern void amiga_floppy_setup(char *, int *);
extern void config_amiga(void);

static int __60nsram = 0;

/* for cpuinfo */
static int __bus_speed = 0;
static int __speed_test_failed = 0;

/********************************************** COMPILE PROTECTION */
/* Provide some stubs that links to Amiga specific functions. 
 * This allows CONFIG_APUS to be removed from generic PPC files while
 * preventing link errors for other PPC targets.
 */
unsigned long apus_get_rtc_time(void)
{
#ifdef CONFIG_APUS
	extern unsigned long m68k_get_rtc_time(void);
	
	return m68k_get_rtc_time ();
#else
	return 0;
#endif
}

int apus_set_rtc_time(unsigned long nowtime)
{
#ifdef CONFIG_APUS
	extern int m68k_set_rtc_time(unsigned long nowtime);

	return m68k_set_rtc_time (nowtime);
#else
	return 0;
#endif
}



/* Here some functions we don't support, but which the other ports reference */
int pckbd_setkeycode(unsigned int scancode, unsigned int keycode)
{
	printk("Bogus call to " __FILE__ ":" __FUNCTION__ "\n");
	return 0; 
}
int pckbd_getkeycode(unsigned int scancode) 
{ 
	printk("Bogus call to " __FILE__ ":" __FUNCTION__ "\n");
	return 0; 
}
int pckbd_translate(unsigned char scancode, unsigned char *keycode,
		    char raw_mode) 
{
	printk("Bogus call to " __FILE__ ":" __FUNCTION__ "\n");
	return 0; 
}
char pckbd_unexpected_up(unsigned char keycode)
{
	printk("Bogus call to " __FILE__ ":" __FUNCTION__ "\n");
	return 0;
}
void pckbd_leds(unsigned char leds)
{
	printk("Bogus call to " __FILE__ ":" __FUNCTION__ "\n");
}
void pckbd_init_hw(void)
{
	printk("Bogus call to " __FILE__ ":" __FUNCTION__ "\n");
}
unsigned char pckbd_sysrq_xlate[128];

struct pci_bus * __init pci_scan_peer_bridge(int bus)
{
	printk("Bogus call to " __FILE__ ":" __FUNCTION__ "\n");
	return NULL;
}

/*********************************************************** SETUP */
/* From arch/m68k/kernel/setup.c. */
void __init apus_setup_arch(void)
{
#ifdef CONFIG_APUS
	extern char cmd_line[];
	int i;
	char *p, *q;

	/* Let m68k-shared code know it should do the Amiga thing. */
	m68k_machtype = MACH_AMIGA;

	/* Parse the command line for arch-specific options.
	 * For the m68k, this is currently only "debug=xxx" to enable printing
	 * certain kernel messages to some machine-specific device.  */
	for( p = cmd_line; p && *p; ) {
	    i = 0;
	    if (!strncmp( p, "debug=", 6 )) {
		    strncpy( debug_device, p+6, sizeof(debug_device)-1 );
		    debug_device[sizeof(debug_device)-1] = 0;
		    if ((q = strchr( debug_device, ' ' ))) *q = 0;
		    i = 1;
	    } else if (!strncmp( p, "60nsram", 7 )) {
		    APUS_WRITE (APUS_REG_WAITSTATE, 
				REGWAITSTATE_SETRESET
				|REGWAITSTATE_PPCR
				|REGWAITSTATE_PPCW);
		    __60nsram = 1;
		    i = 1;
	    }

	    if (i) {
		/* option processed, delete it */
		if ((q = strchr( p, ' ' )))
		    strcpy( p, q+1 );
		else
		    *p = 0;
	    } else {
		if ((p = strchr( p, ' ' ))) ++p;
	    }
	}

	config_amiga();

#if 0 /* Enable for logging - also include logging.o in Makefile rule */
	{
#define LOG_SIZE 4096
		void* base;

		/* Throw away some memory - the P5 firmare stomps on top
		 * of CHIP memory during bootup.
		 */
		amiga_chip_alloc(0x1000);

		base = amiga_chip_alloc(LOG_SIZE+sizeof(klog_data_t));
		LOG_INIT(base, base+sizeof(klog_data_t), LOG_SIZE);
	}
#endif
#endif
}

int
apus_show_cpuinfo(struct seq_file *m)
{
	extern int __map_without_bats;
	extern unsigned long powerup_PCI_present;

	seq_printf(m, "machine\t\t: Amiga\n");
	seq_printf(m, "bus speed\t: %d%s", __bus_speed,
		   (__speed_test_failed) ? " [failed]\n" : "\n");
	seq_printf(m, "using BATs\t: %s\n",
		   (__map_without_bats) ? "No" : "Yes");
	seq_printf(m, "ram speed\t: %dns\n", (__60nsram) ? 60 : 70);
	seq_printf(m, "PCI bridge\t: %s\n",
		   (powerup_PCI_present) ? "Yes" : "No");
	return 0;
}

static void get_current_tb(unsigned long long *time)
{
	__asm __volatile ("1:mftbu 4      \n\t"
			  "  mftb  5      \n\t"
			  "  mftbu 6      \n\t"
			  "  cmpw  4,6    \n\t"
			  "  bne   1b     \n\t"
			  "  stw   4,0(%0)\n\t"
			  "  stw   5,4(%0)\n\t"
			  : 
			  : "r" (time)
			  : "r4", "r5", "r6");
}


void apus_calibrate_decr(void)
{
#ifdef CONFIG_APUS
	unsigned long freq;

	/* This algorithm for determining the bus speed was
           contributed by Ralph Schmidt. */
	unsigned long long start, stop;
	int bus_speed;
	int speed_test_failed = 0;

	{
		unsigned long loop = amiga_eclock / 10;

		get_current_tb (&start);
		while (loop--) {
			unsigned char tmp;

			tmp = ciaa.pra;
		}
		get_current_tb (&stop);
	}

	bus_speed = (((unsigned long)(stop-start))*10*4) / 1000000;
	if (AMI_1200 == amiga_model)
		bus_speed /= 2;

	if ((bus_speed >= 47) && (bus_speed < 53)) {
		bus_speed = 50;
		freq = 12500000;
	} else if ((bus_speed >= 57) && (bus_speed < 63)) {
		bus_speed = 60;
		freq = 15000000;
	} else if ((bus_speed >= 63) && (bus_speed < 69)) {
		bus_speed = 67;
		freq = 16666667;
	} else {
		printk ("APUS: Unable to determine bus speed (%d). "
			"Defaulting to 50MHz", bus_speed);
		bus_speed = 50;
		freq = 12500000;
		speed_test_failed = 1;
	}

	/* Ease diagnostics... */
	{
		extern int __map_without_bats;
		extern unsigned long powerup_PCI_present;

		printk ("APUS: BATs=%d, BUS=%dMHz",
			(__map_without_bats) ? 0 : 1,
			bus_speed);
		if (speed_test_failed)
			printk ("[FAILED - please report]");

		printk (", RAM=%dns, PCI bridge=%d\n",
			(__60nsram) ? 60 : 70,
			(powerup_PCI_present) ? 1 : 0);

		/* print a bit more if asked politely... */
		if (!(ciaa.pra & 0x40)){
			extern unsigned int bat_addrs[4][3];
			int b;
			for (b = 0; b < 4; ++b) {
				printk ("APUS: BAT%d ", b);
				printk ("%08x-%08x -> %08x\n",
					bat_addrs[b][0],
					bat_addrs[b][1],
					bat_addrs[b][2]);
			}
		}

	}

        printk("time_init: decrementer frequency = %lu.%.6lu MHz\n",
	       freq/1000000, freq%1000000);
	tb_ticks_per_jiffy = freq / HZ;
	tb_to_us = mulhwu_scale_factor(freq, 1000000);

	__bus_speed = bus_speed;
	__speed_test_failed = speed_test_failed;
#endif
}

void arch_gettod(int *year, int *mon, int *day, int *hour,
		 int *min, int *sec)
{
#ifdef CONFIG_APUS
	if (mach_gettod)
		mach_gettod(year, mon, day, hour, min, sec);
	else
		*year = *mon = *day = *hour = *min = *sec = 0;
#endif
}

/* for "kbd-reset" cmdline param */
__init
void kbd_reset_setup(char *str, int *ints)
{
}

/*********************************************************** FLOPPY */
#if defined(CONFIG_AMIGA_FLOPPY)
__init 
void floppy_setup(char *str, int *ints)
{
	if (mach_floppy_setup)
		mach_floppy_setup (str, ints);
}

void floppy_eject(void)
{
	if (mach_floppy_eject)
		mach_floppy_eject();
}
#endif

/*********************************************************** MEMORY */
#define KMAP_MAX 32
unsigned long kmap_chunks[KMAP_MAX*3];
int kmap_chunk_count = 0;

/* From pgtable.h */
static __inline__ pte_t *my_find_pte(struct mm_struct *mm,unsigned long va)
{
	pgd_t *dir = 0;
	pmd_t *pmd = 0;
	pte_t *pte = 0;

	va &= PAGE_MASK;
	
	dir = pgd_offset( mm, va );
	if (dir)
	{
		pmd = pmd_offset(dir, va & PAGE_MASK);
		if (pmd && pmd_present(*pmd))
		{
			pte = pte_offset(pmd, va);
		}
	}
	return pte;
}


/* Again simulating an m68k/mm/kmap.c function. */
void kernel_set_cachemode( unsigned long address, unsigned long size,
			   unsigned int cmode )
{
	unsigned long mask, flags;

	switch (cmode)
	{
	case IOMAP_FULL_CACHING:
		mask = ~(_PAGE_NO_CACHE | _PAGE_GUARDED);
		flags = 0;
		break;
	case IOMAP_NOCACHE_SER:
		mask = ~0;
		flags = (_PAGE_NO_CACHE | _PAGE_GUARDED);
		break;
	default:
		panic ("kernel_set_cachemode() doesn't support mode %d\n", 
		       cmode);
		break;
	}
	
	size /= PAGE_SIZE;
	address &= PAGE_MASK;
	while (size--)
	{
		pte_t *pte;

		pte = my_find_pte(&init_mm, address);
		if ( !pte )
		{
			printk("pte NULL in kernel_set_cachemode()\n");
			return;
		}

                pte_val (*pte) &= mask;
                pte_val (*pte) |= flags;
                flush_tlb_page(find_vma(&init_mm,address),address);

		address += PAGE_SIZE;
	}
}

unsigned long mm_ptov (unsigned long paddr)
{
	unsigned long ret;
	if (paddr < 16*1024*1024)
		ret = ZTWO_VADDR(paddr);
	else {
		int i;

		for (i = 0; i < kmap_chunk_count;){
			unsigned long phys = kmap_chunks[i++];
			unsigned long size = kmap_chunks[i++];
			unsigned long virt = kmap_chunks[i++];
			if (paddr >= phys
			    && paddr < (phys + size)){
				ret = virt + paddr - phys;
				goto exit;
			}
		}
		
		ret = (unsigned long) __va(paddr);
	}
exit:
#ifdef DEBUGPV
	printk ("PTOV(%lx)=%lx\n", paddr, ret);
#endif
	return ret;
}

int mm_end_of_chunk (unsigned long addr, int len)
{
	if (memory[0].addr + memory[0].size == addr + len)
		return 1;
	return 0;
}

/*********************************************************** CACHE */

#define L1_CACHE_BYTES 32
#define MAX_CACHE_SIZE 8192
void cache_push(__u32 addr, int length)
{
	addr = mm_ptov(addr);

	if (MAX_CACHE_SIZE < length)
		length = MAX_CACHE_SIZE;

	while(length > 0){
		__asm ("dcbf 0,%0\n\t"
		       : : "r" (addr));
		addr += L1_CACHE_BYTES;
		length -= L1_CACHE_BYTES;
	}
	/* Also flush trailing block */
	__asm ("dcbf 0,%0\n\t"
	       "sync \n\t"
	       : : "r" (addr));
}

void cache_clear(__u32 addr, int length)
{
	if (MAX_CACHE_SIZE < length)
		length = MAX_CACHE_SIZE;

	addr = mm_ptov(addr);

	__asm ("dcbf 0,%0\n\t"
	       "sync \n\t"
	       "icbi 0,%0 \n\t"
	       "isync \n\t"
	       : : "r" (addr));
	
	addr += L1_CACHE_BYTES;
	length -= L1_CACHE_BYTES;

	while(length > 0){
		__asm ("dcbf 0,%0\n\t"
		       "sync \n\t"
		       "icbi 0,%0 \n\t"
		       "isync \n\t"
		       : : "r" (addr));
		addr += L1_CACHE_BYTES;
		length -= L1_CACHE_BYTES;
	}

	__asm ("dcbf 0,%0\n\t"
	       "sync \n\t"
	       "icbi 0,%0 \n\t"
	       "isync \n\t"
	       : : "r" (addr));
}

/****************************************************** from setup.c */
void
apus_restart(char *cmd)
{
	cli();

	APUS_WRITE(APUS_REG_LOCK, 
		   REGLOCK_BLACKMAGICK1|REGLOCK_BLACKMAGICK2);
	APUS_WRITE(APUS_REG_LOCK, 
		   REGLOCK_BLACKMAGICK1|REGLOCK_BLACKMAGICK3);
	APUS_WRITE(APUS_REG_LOCK, 
		   REGLOCK_BLACKMAGICK2|REGLOCK_BLACKMAGICK3);
	APUS_WRITE(APUS_REG_SHADOW, REGSHADOW_SELFRESET);
	APUS_WRITE(APUS_REG_RESET, REGRESET_AMIGARESET);
	for(;;);
}

void
apus_power_off(void)
{
	for (;;);
}

void
apus_halt(void)
{
   apus_restart(NULL);
}

/****************************************************** from setup.c/IDE */
#if defined(CONFIG_BLK_DEV_IDE) || defined(CONFIG_BLK_DEV_IDE_MODULE)
/*
 * IDE stuff.
 */

#if 0	/* no longer used  -- paulus */
void
apus_ide_fix_driveid(struct hd_driveid *id)
{
   u_char *p = (u_char *)id;
   int i, j, cnt;
   u_char t;

   if (!MACH_IS_AMIGA && !MACH_IS_MAC)
   	return;
   for (i = 0; i < num_driveid_types; i++) {
      cnt = driveid_types[i] & T_MASK_COUNT;
      switch (driveid_types[i] & T_MASK_TYPE) {
         case T_CHAR:
            p += cnt;
            break;
         case T_SHORT:
            for (j = 0; j < cnt; j++) {
               t = p[0];
               p[0] = p[1];
               p[1] = t;
               p += 2;
            }
            break;
         case T_INT:
            for (j = 0; j < cnt; j++) {
               t = p[0];
               p[0] = p[3];
               p[3] = t;
               t = p[1];
               p[1] = p[2];
               p[2] = t;
               p += 4;
            }
            break;
         case T_TEXT:
            for (j = 0; j < cnt; j += 2) {
               t = p[0];
               p[0] = p[1];
               p[1] = t;
               p += 2;
            }
            break;
      }
   }
}
#endif /* 0 */

__init
void apus_ide_init_hwif_ports (hw_regs_t *hw, ide_ioreg_t data_port, 
			       ide_ioreg_t ctrl_port, int *irq)
{
        if (data_port || ctrl_port)
                printk("apus_ide_init_hwif_ports: must not be called\n");
}
#endif
/****************************************************** IRQ stuff */

static unsigned int apus_irq_cannonicalize(unsigned int irq)
{
	return irq;
}

int apus_get_irq_list(char *buf)
{
#ifdef CONFIG_APUS
	extern int amiga_get_irq_list(char *buf);
	
	return amiga_get_irq_list (buf);
#else
	return 0;
#endif
}

/* IPL must be between 0 and 7 */
static inline void apus_set_IPL(unsigned long ipl)
{
	APUS_WRITE(APUS_IPL_EMU, IPLEMU_SETRESET | IPLEMU_DISABLEINT);
	APUS_WRITE(APUS_IPL_EMU, IPLEMU_IPLMASK);
	APUS_WRITE(APUS_IPL_EMU, IPLEMU_SETRESET | ((~ipl) & IPLEMU_IPLMASK));
	APUS_WRITE(APUS_IPL_EMU, IPLEMU_DISABLEINT);
}

static inline unsigned long apus_get_IPL(void)
{
	/* This returns the present IPL emulation level. */
	unsigned long __f;
	APUS_READ(APUS_IPL_EMU, __f);
	return ((~__f) & IPLEMU_IPLMASK);
}

static inline unsigned long apus_get_prev_IPL(struct pt_regs* regs)
{
	/* The value saved in mq is the IPL_EMU value at the time of
	   interrupt. The lower bits are the current interrupt level,
	   the upper bits the requested level. Thus, to restore the
	   IPL level to the post-interrupt state, we will need to use
	   the lower bits. */
	unsigned long __f = regs->mq;
	return ((~__f) & IPLEMU_IPLMASK);
}


#ifdef CONFIG_APUS
void free_irq(unsigned int irq, void *dev_id)
{
	extern void amiga_free_irq(unsigned int irq, void *dev_id);

	amiga_free_irq (irq, dev_id);
}

int request_irq(unsigned int irq, void (*handler)(int, void *, struct pt_regs *),
	unsigned long irqflags, const char * devname, void *dev_id)
{
	extern int  amiga_request_irq(unsigned int irq, 
				      void (*handler)(int, void *, 
						      struct pt_regs *),
				      unsigned long flags, 
				      const char *devname, 
				      void *dev_id);

	return amiga_request_irq (irq, handler, irqflags, devname, dev_id);
}

/* In Linux/m68k the sys_request_irq deals with vectors 0-7. That's what
   callers expect - but on Linux/APUS we actually use the IRQ_AMIGA_AUTO
   vectors (24-31), so we put this dummy function in between to adjust
   the vector argument (rather have cruft here than in the generic irq.c). */
int sys_request_irq(unsigned int irq, void (*handler)(int, void *, struct pt_regs *),
		    unsigned long irqflags, const char * devname, void *dev_id)
{
	extern int request_sysirq(unsigned int irq, 
				  void (*handler)(int, void *, 
						  struct pt_regs *),
				  unsigned long irqflags,
				  const char * devname, void *dev_id);
	return request_sysirq(irq+IRQ_AMIGA_AUTO, handler, irqflags, 
			      devname, dev_id);
}
#endif

int apus_get_irq(struct pt_regs* regs)
{
#ifdef CONFIG_APUS
	int level = apus_get_IPL();

#ifdef __INTERRUPT_DEBUG
	printk("<%d:%d>", level, apus_get_prev_IPL(regs));
#endif

	if (0 == level)
		return -8;
	if (7 == level)
		return -9;

	return level + IRQ_AMIGA_AUTO;
#else
	return 0;
#endif
}

void apus_post_irq(struct pt_regs* regs, int level)
{
#ifdef __INTERRUPT_DEBUG
	printk("{%d}", apus_get_prev_IPL(regs));
#endif
	/* Restore IPL to the previous value */
	apus_set_IPL(apus_get_prev_IPL(regs));
}

/****************************************************** keyboard */
static int apus_kbd_setkeycode(unsigned int scancode, unsigned int keycode)
{
	return -EOPNOTSUPP;
}

static int apus_kbd_getkeycode(unsigned int scancode)
{
	return scancode > 127 ? -EINVAL : scancode;
}

static int apus_kbd_translate(unsigned char keycode, unsigned char *keycodep,
			      char raw_mode)
{
	*keycodep = keycode;
	return 1;
}

static char apus_kbd_unexpected_up(unsigned char keycode)
{
	return 0200;
}

static void apus_kbd_leds(unsigned char leds)
{
}

static void apus_kbd_init_hw(void)
{
#ifdef CONFIG_APUS
	extern int amiga_keyb_init(void);

	amiga_keyb_init();
#endif
}


/****************************************************** debugging */

/* some serial hardware definitions */
#define SDR_OVRUN   (1<<15)
#define SDR_RBF     (1<<14)
#define SDR_TBE     (1<<13)
#define SDR_TSRE    (1<<12)

#define AC_SETCLR   (1<<15)
#define AC_UARTBRK  (1<<11)

#define SER_DTR     (1<<7)
#define SER_RTS     (1<<6)
#define SER_DCD     (1<<5)
#define SER_CTS     (1<<4)
#define SER_DSR     (1<<3)

static __inline__ void ser_RTSon(void)
{
    ciab.pra &= ~SER_RTS; /* active low */
}

int __debug_ser_out( unsigned char c )
{
	custom.serdat = c | 0x100;
	mb();
	while (!(custom.serdatr & 0x2000))
		barrier();
	return 1;
}

unsigned char __debug_ser_in( void )
{
	unsigned char c;

	/* XXX: is that ok?? derived from amiga_ser.c... */
	while( !(custom.intreqr & IF_RBF) )
		barrier();
	c = custom.serdatr;
	/* clear the interrupt, so that another character can be read */
	custom.intreq = IF_RBF;
	return c;
}

int __debug_serinit( void )
{	
	unsigned long flags;
	
	save_flags (flags);
	cli();

	/* turn off Rx and Tx interrupts */
	custom.intena = IF_RBF | IF_TBE;

	/* clear any pending interrupt */
	custom.intreq = IF_RBF | IF_TBE;

	restore_flags (flags);

	/*
	 * set the appropriate directions for the modem control flags,
	 * and clear RTS and DTR
	 */
	ciab.ddra |= (SER_DTR | SER_RTS);   /* outputs */
	ciab.ddra &= ~(SER_DCD | SER_CTS | SER_DSR);  /* inputs */
	
#ifdef CONFIG_KGDB
	/* turn Rx interrupts on for GDB */
	custom.intena = IF_SETCLR | IF_RBF;
	ser_RTSon();
#endif

	return 0;
}

void __debug_print_hex(unsigned long x)
{
	int i;
	char hexchars[] = "0123456789ABCDEF";

	for (i = 0; i < 8; i++) {
		__debug_ser_out(hexchars[(x >> 28) & 15]);
		x <<= 4;
	}
	__debug_ser_out('\n');
	__debug_ser_out('\r');
}

void __debug_print_string(char* s)
{
	unsigned char c;
	while((c = *s++))
		__debug_ser_out(c);
	__debug_ser_out('\n');
	__debug_ser_out('\r');
}

static void apus_progress(char *s, unsigned short value)
{
	__debug_print_string(s);
}

/****************************************************** init */

/* The number of spurious interrupts */
volatile unsigned int num_spurious;

#define NUM_IRQ_NODES 100
static irq_node_t nodes[NUM_IRQ_NODES];

extern void (*amiga_default_handler[AUTO_IRQS])(int, void *, struct pt_regs *);

static const char *default_names[SYS_IRQS] = {
	"spurious int", "int1 handler", "int2 handler", "int3 handler",
	"int4 handler", "int5 handler", "int6 handler", "int7 handler"
};

irq_node_t *new_irq_node(void)
{
	irq_node_t *node;
	short i;

	for (node = nodes, i = NUM_IRQ_NODES-1; i >= 0; node++, i--)
		if (!node->handler)
			return node;

	printk ("new_irq_node: out of nodes\n");
	return NULL;
}

extern void amiga_enable_irq(unsigned int irq);
extern void amiga_disable_irq(unsigned int irq);

struct hw_interrupt_type amiga_irqctrl = {
	" Amiga  ",
	NULL,
	NULL,
	amiga_enable_irq,
	amiga_disable_irq,
	0,
	0
};

#define HARDWARE_MAPPED_SIZE (512*1024)
unsigned long __init apus_find_end_of_memory(void)
{
	int shadow = 0;
	unsigned long total;

	/* The memory size reported by ADOS excludes the 512KB
	   reserved for PPC exception registers and possibly 512KB
	   containing a shadow of the ADOS ROM. */
	{
		unsigned long size = memory[0].size;

		/* If 2MB aligned, size was probably user
                   specified. We can't tell anything about shadowing
                   in this case so skip shadow assignment. */
		if (0 != (size & 0x1fffff)){
			/* Align to 512KB to ensure correct handling
			   of both memfile and system specified
			   sizes. */
			size = ((size+0x0007ffff) & 0xfff80000);
			/* If memory is 1MB aligned, assume
                           shadowing. */
			shadow = !(size & 0x80000);
		}

		/* Add the chunk that ADOS does not see. by aligning
                   the size to the nearest 2MB limit upwards.  */
		memory[0].size = ((size+0x001fffff) & 0xffe00000);
	}

	total = memory[0].size;

	/* Remove the memory chunks that are controlled by special
           Phase5 hardware. */

	/* Remove the upper 512KB if it contains a shadow of
	   the ADOS ROM. FIXME: It might be possible to
	   disable this shadow HW. Check the booter
	   (ppc_boot.c) */
	if (shadow)
		total -= HARDWARE_MAPPED_SIZE;

	/* Remove the upper 512KB where the PPC exception
	   vectors are mapped. */
	total -= HARDWARE_MAPPED_SIZE;

	/* Linux/APUS only handles one block of memory -- the one on
	   the PowerUP board. Other system memory is horrible slow in
	   comparison. The user can use other memory for swapping
	   using the z2ram device. */
	ram_phys_base = memory[0].addr;
	return total;
}

static void __init
apus_map_io(void)
{
	/* Map PPC exception vectors. */
	io_block_mapping(0xfff00000, 0xfff00000, 0x00020000, _PAGE_KERNEL);
	/* Map chip and ZorroII memory */
	io_block_mapping(zTwoBase,   0x00000000, 0x01000000, _PAGE_IO);
}

__init
void apus_init_IRQ(void)
{
	int i;

	for ( i = 0 ; i < NR_IRQS ; i++ )
		irq_desc[i].handler = &amiga_irqctrl;

	for (i = 0; i < NUM_IRQ_NODES; i++)
		nodes[i].handler = NULL;

	for (i = 0; i < AUTO_IRQS; i++) {
		if (amiga_default_handler[i] != NULL)
			sys_request_irq(i, amiga_default_handler[i],
					0, default_names[i], NULL);
	}

	amiga_init_IRQ();

}

__init
void platform_init(unsigned long r3, unsigned long r4, unsigned long r5,
		   unsigned long r6, unsigned long r7)
{
	extern int parse_bootinfo(const struct bi_record *);
	extern char _end[];
	
	/* Parse bootinfo. The bootinfo is located right after
           the kernel bss */
	parse_bootinfo((const struct bi_record *)&_end);
#ifdef CONFIG_BLK_DEV_INITRD
	/* Take care of initrd if we have one. Use data from
	   bootinfo to avoid the need to initialize PPC
	   registers when kernel is booted via a PPC reset. */
	if ( ramdisk.addr ) {
		initrd_start = (unsigned long) __va(ramdisk.addr);
		initrd_end = (unsigned long) 
			__va(ramdisk.size + ramdisk.addr);
	}
#endif /* CONFIG_BLK_DEV_INITRD */

	ISA_DMA_THRESHOLD = 0x00ffffff;

	ppc_md.setup_arch     = apus_setup_arch;
	ppc_md.show_cpuinfo   = apus_show_cpuinfo;
	ppc_md.irq_cannonicalize = apus_irq_cannonicalize;
	ppc_md.init_IRQ       = apus_init_IRQ;
	ppc_md.get_irq        = apus_get_irq;
	
#error Should use the ->end() member of irq_desc[x]. -- Cort
	/*ppc_md.post_irq       = apus_post_irq;*/
	
#ifdef CONFIG_HEARTBEAT
	ppc_md.heartbeat      = apus_heartbeat;
	ppc_md.heartbeat_count = 1;
#endif
#ifdef APUS_DEBUG
	__debug_serinit();
	ppc_md.progress       = apus_progress;
#endif
	ppc_md.init           = NULL;

	ppc_md.restart        = apus_restart;
	ppc_md.power_off      = apus_power_off;
	ppc_md.halt           = apus_halt;

	ppc_md.time_init      = NULL;
	ppc_md.set_rtc_time   = apus_set_rtc_time;
	ppc_md.get_rtc_time   = apus_get_rtc_time;
	ppc_md.calibrate_decr = apus_calibrate_decr;

	ppc_md.find_end_of_memory = apus_find_end_of_memory;
	ppc_md.setup_io_mappings = apus_map_io;

	ppc_md.nvram_read_val = NULL;
	ppc_md.nvram_write_val = NULL;

	/* These should not be used for the APUS yet, since it uses
	   the M68K keyboard now. */
	ppc_md.kbd_setkeycode    = apus_kbd_setkeycode;
	ppc_md.kbd_getkeycode    = apus_kbd_getkeycode;
	ppc_md.kbd_translate     = apus_kbd_translate;
	ppc_md.kbd_unexpected_up = apus_kbd_unexpected_up;
	ppc_md.kbd_leds          = apus_kbd_leds;
	ppc_md.kbd_init_hw       = apus_kbd_init_hw;

#if defined(CONFIG_BLK_DEV_IDE) || defined(CONFIG_BLK_DEV_IDE_MODULE)
        ppc_ide_md.ide_init_hwif = apus_ide_init_hwif_ports;
#endif		
}


/*************************************************** coexistence */
void __init adbdev_init(void)
{
}
/*
 * BK Id: SCCS/s.ppc-stub.c 1.6 05/17/01 18:14:21 cort
 */
/*
 * ppc-stub.c:  KGDB support for the Linux kernel.
 *
 * adapted from arch/sparc/kernel/sparc-stub.c for the PowerPC
 * some stuff borrowed from Paul Mackerras' xmon
 * Copyright (C) 1998 Michael AK Tesch (tesch@cs.wisc.edu)
 *
 * Modifications to run under Linux
 * Copyright (C) 1995 David S. Miller (davem@caip.rutgers.edu)
 *
 * This file originally came from the gdb sources, and the
 * copyright notices have been retained below.
 */

/****************************************************************************

		THIS SOFTWARE IS NOT COPYRIGHTED

   HP offers the following for use in the public domain.  HP makes no
   warranty with regard to the software or its performance and the
   user accepts the software "AS IS" with all faults.

   HP DISCLAIMS ANY WARRANTIES, EXPRESS OR IMPLIED, WITH REGARD
   TO THIS SOFTWARE INCLUDING BUT NOT LIMITED TO THE WARRANTIES
   OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE.

****************************************************************************/

/****************************************************************************
 *  Header: remcom.c,v 1.34 91/03/09 12:29:49 glenne Exp $
 *
 *  Module name: remcom.c $
 *  Revision: 1.34 $
 *  Date: 91/03/09 12:29:49 $
 *  Contributor:     Lake Stevens Instrument Division$
 *
 *  Description:     low level support for gdb debugger. $
 *
 *  Considerations:  only works on target hardware $
 *
 *  Written by:      Glenn Engel $
 *  ModuleState:     Experimental $
 *
 *  NOTES:           See Below $
 *
 *  Modified for SPARC by Stu Grossman, Cygnus Support.
 *
 *  This code has been extensively tested on the Fujitsu SPARClite demo board.
 *
 *  To enable debugger support, two things need to happen.  One, a
 *  call to set_debug_traps() is necessary in order to allow any breakpoints
 *  or error conditions to be properly intercepted and reported to gdb.
 *  Two, a breakpoint needs to be generated to begin communication.  This
 *  is most easily accomplished by a call to breakpoint().  Breakpoint()
 *  simulates a breakpoint by executing a trap #1.
 *
 *************
 *
 *    The following gdb commands are supported:
 *
 * command          function                               Return value
 *
 *    g             return the value of the CPU registers  hex data or ENN
 *    G             set the value of the CPU registers     OK or ENN
 *    qOffsets      Get section offsets.  Reply is Text=xxx;Data=yyy;Bss=zzz
 *
 *    mAA..AA,LLLL  Read LLLL bytes at address AA..AA      hex data or ENN
 *    MAA..AA,LLLL: Write LLLL bytes at address AA.AA      OK or ENN
 *
 *    c             Resume at current address              SNN   ( signal NN)
 *    cAA..AA       Continue at address AA..AA             SNN
 *
 *    s             Step one instruction                   SNN
 *    sAA..AA       Step one instruction from AA..AA       SNN
 *
 *    k             kill
 *
 *    ?             What was the last sigval ?             SNN   (signal NN)
 *
 *    bBB..BB	    Set baud rate to BB..BB		   OK or BNN, then sets
 *							   baud rate
 *
 * All commands and responses are sent with a packet which includes a
 * checksum.  A packet consists of
 *
 * $<packet info>#<checksum>.
 *
 * where
 * <packet info> :: <characters representing the command or response>
 * <checksum>    :: <two hex digits computed as modulo 256 sum of <packetinfo>>
 *
 * When a packet is received, it is first acknowledged with either '+' or '-'.
 * '+' indicates a successful transfer.  '-' indicates a failed transfer.
 *
 * Example:
 *
 * Host:                  Reply:
 * $m0,10#2a               +$00010203040506070809101112131415#42
 *
 ****************************************************************************/

#include <linux/config.h>
#include <linux/kernel.h>
#include <linux/string.h>
#include <linux/mm.h>
#include <linux/smp.h>
#include <linux/smp_lock.h>

#include <asm/system.h>
#include <asm/signal.h>
#include <asm/kgdb.h>
#include <asm/pgtable.h>
#include <asm/ptrace.h>

void breakinst(void);

/*
 * BUFMAX defines the maximum number of characters in inbound/outbound buffers
 * at least NUMREGBYTES*2 are needed for register packets
 */
#define BUFMAX 2048
static char remcomInBuffer[BUFMAX];
static char remcomOutBuffer[BUFMAX];

static int initialized;
static int kgdb_active;
static int kgdb_started;
static u_int fault_jmp_buf[100];
static int kdebug;

static const char hexchars[]="0123456789abcdef";

/* Place where we save old trap entries for restoration - sparc*/
/* struct tt_entry kgdb_savettable[256]; */
/* typedef void (*trapfunc_t)(void); */

#if 0
/* Install an exception handler for kgdb */
static void exceptionHandler(int tnum, unsigned int *tfunc)
{
	/* We are dorking with a live trap table, all irqs off */
}
#endif

int
kgdb_setjmp(long *buf)
{
	asm ("mflr 0; stw 0,0(%0);"
	     "stw 1,4(%0); stw 2,8(%0);"
	     "mfcr 0; stw 0,12(%0);"
	     "stmw 13,16(%0)"
	     : : "r" (buf));
	/* XXX should save fp regs as well */
	return 0;
}
void
kgdb_longjmp(long *buf, int val)
{
	if (val == 0)
		val = 1;
	asm ("lmw 13,16(%0);"
	     "lwz 0,12(%0); mtcrf 0x38,0;"
	     "lwz 0,0(%0); lwz 1,4(%0); lwz 2,8(%0);"
	     "mtlr 0; mr 3,%1"
	     : : "r" (buf), "r" (val));
}
/* Convert ch from a hex digit to an int */
static int
hex(unsigned char ch)
{
	if (ch >= 'a' && ch <= 'f')
		return ch-'a'+10;
	if (ch >= '0' && ch <= '9')
		return ch-'0';
	if (ch >= 'A' && ch <= 'F')
		return ch-'A'+10;
	return -1;
}

/* Convert the memory pointed to by mem into hex, placing result in buf.
 * Return a pointer to the last char put in buf (null), in case of mem fault,
 * return 0.
 */
static unsigned char *
mem2hex(char *mem, char *buf, int count)
{
	unsigned char ch;

	if (kgdb_setjmp((long*)fault_jmp_buf) == 0) {
		debugger_fault_handler = kgdb_fault_handler;
		while (count-- > 0) {
			ch = *mem++;
			*buf++ = hexchars[ch >> 4];
			*buf++ = hexchars[ch & 0xf];
		}
	} else {
		/* error condition */
	}
	debugger_fault_handler = 0;
	*buf = 0;
	return buf;
}

/* convert the hex array pointed to by buf into binary to be placed in mem
 * return a pointer to the character AFTER the last byte written.
*/
static char *
hex2mem(char *buf, char *mem, int count)
{
	int i;
	unsigned char ch;

	if (kgdb_setjmp((long*)fault_jmp_buf) == 0) {
		debugger_fault_handler = kgdb_fault_handler;
		for (i=0; i<count; i++) {
			ch = hex(*buf++) << 4;
			ch |= hex(*buf++);
			*mem++ = ch;
		}
		flush_icache_range((int)mem, (int)mem+count);
	} else {
		/* error condition */
	}
	debugger_fault_handler = 0;
	return mem;
}

/*
 * While we find nice hex chars, build an int.
 * Return number of chars processed.
 */
static int
hexToInt(char **ptr, int *intValue)
{
	int numChars = 0;
	int hexValue;

	*intValue = 0;

	if (kgdb_setjmp((long*)fault_jmp_buf) == 0) {
		debugger_fault_handler = kgdb_fault_handler;
		while (**ptr) {
			hexValue = hex(**ptr);
			if (hexValue < 0)
				break;

			*intValue = (*intValue << 4) | hexValue;
			numChars ++;

			(*ptr)++;
		}
	} else {
	     /* error condition */
	}
	debugger_fault_handler = 0;

	return (numChars);
}

/* scan for the sequence $<data>#<checksum>     */
static void
getpacket(char *buffer)
{
	unsigned char checksum;
	unsigned char xmitcsum;
	int i;
	int count;
	unsigned char ch;

	do {
		/* wait around for the start character, ignore all other
		 * characters */
		while ((ch = (getDebugChar() & 0x7f)) != '$') ;

		checksum = 0;
		xmitcsum = -1;

		count = 0;

		/* now, read until a # or end of buffer is found */
		while (count < BUFMAX) {
			ch = getDebugChar() & 0x7f;
			if (ch == '#')
				break;
			checksum = checksum + ch;
			buffer[count] = ch;
			count = count + 1;
		}

		if (count >= BUFMAX)
			continue;

		buffer[count] = 0;

		if (ch == '#') {
			xmitcsum = hex(getDebugChar() & 0x7f) << 4;
			xmitcsum |= hex(getDebugChar() & 0x7f);
			if (checksum != xmitcsum)
				putDebugChar('-');	/* failed checksum */
			else {
				putDebugChar('+'); /* successful transfer */
				/* if a sequence char is present, reply the ID */
				if (buffer[2] == ':') {
					putDebugChar(buffer[0]);
					putDebugChar(buffer[1]);
					/* remove sequence chars from buffer */
					count = strlen(buffer);
					for (i=3; i <= count; i++)
						buffer[i-3] = buffer[i];
				}
			}
		}
	} while (checksum != xmitcsum);
}

/* send the packet in buffer.  */
static void putpacket(unsigned char *buffer)
{
	unsigned char checksum;
	int count;
	unsigned char ch, recv;

	/*  $<packet info>#<checksum>. */
	do {
		putDebugChar('$');
		checksum = 0;
		count = 0;

		while ((ch = buffer[count])) {
			putDebugChar(ch);
			checksum += ch;
			count += 1;
		}

		putDebugChar('#');
		putDebugChar(hexchars[checksum >> 4]);
		putDebugChar(hexchars[checksum & 0xf]);
		recv = getDebugChar();
	} while ((recv & 0x7f) != '+');
}

static void kgdb_flush_cache_all(void)
{
	flush_instruction_cache();
}

static inline int get_msr(void)
{
	int msr;
	asm volatile("mfmsr %0" : "=r" (msr):);
	return msr;
}

static inline void set_msr(int msr)
{
	asm volatile("mtmsr %0" : : "r" (msr));
}

/* Set up exception handlers for tracing and breakpoints
 * [could be called kgdb_init()]
 */
void set_debug_traps(void)
{
#if 0
	unsigned char c;

	save_and_cli(flags);

	/* In case GDB is started before us, ack any packets (presumably
	 * "$?#xx") sitting there.
	 *
	 * I've found this code causes more problems than it solves,
	 * so that's why it's commented out.  GDB seems to work fine
	 * now starting either before or after the kernel   -bwb
	 */

	while((c = getDebugChar()) != '$');
	while((c = getDebugChar()) != '#');
	c = getDebugChar(); /* eat first csum byte */
	c = getDebugChar(); /* eat second csum byte */
	putDebugChar('+'); /* ack it */
#endif
	debugger = kgdb;
	debugger_bpt = kgdb_bpt;
	debugger_sstep = kgdb_sstep;
	debugger_iabr_match = kgdb_iabr_match;
	debugger_dabr_match = kgdb_dabr_match;

	initialized = 1;
}

static void kgdb_fault_handler(struct pt_regs *regs)
{
	kgdb_longjmp((long*)fault_jmp_buf, 1);
}

int kgdb_bpt(struct pt_regs *regs)
{
	handle_exception(regs);
	return 1;
}

int kgdb_sstep(struct pt_regs *regs)
{
	handle_exception(regs);
	return 1;
}

void kgdb(struct pt_regs *regs)
{
	handle_exception(regs);
}

int kgdb_iabr_match(struct pt_regs *regs)
{
	printk("kgdb doesn't support iabr, what?!?\n");
	handle_exception(regs);
	return 1;
}

int kgdb_dabr_match(struct pt_regs *regs)
{
	printk("kgdb doesn't support dabr, what?!?\n");
	handle_exception(regs);
	return 1;
}

/* Convert the SPARC hardware trap type code to a unix signal number. */
/*
 * This table contains the mapping between PowerPC hardware trap types, and
 * signals, which are primarily what GDB understands.
 */
static struct hard_trap_info
{
	unsigned int tt;		/* Trap type code for powerpc */
	unsigned char signo;		/* Signal that we map this trap into */
} hard_trap_info[] = {
	{ 0x200, SIGSEGV },			/* machine check */
	{ 0x300, SIGSEGV },			/* address error (store) */
	{ 0x400, SIGBUS },			/* instruction bus error */
	{ 0x500, SIGINT },			/* interrupt */
	{ 0x600, SIGBUS },			/* alingment */
	{ 0x700, SIGTRAP },			/* breakpoint trap */
	{ 0x800, SIGFPE },			/* fpu unavail */
	{ 0x900, SIGALRM },			/* decrementer */
	{ 0xa00, SIGILL },			/* reserved */
	{ 0xb00, SIGILL },			/* reserved */
	{ 0xc00, SIGCHLD },			/* syscall */
	{ 0xd00, SIGTRAP },			/* single-step/watch */
	{ 0xe00, SIGFPE },			/* fp assist */
	{ 0, 0}				/* Must be last */
};

static int computeSignal(unsigned int tt)
{
	struct hard_trap_info *ht;

	for (ht = hard_trap_info; ht->tt && ht->signo; ht++)
		if (ht->tt == tt)
			return ht->signo;

	return SIGHUP;         /* default for things we don't know about */
}

#define PC_REGNUM 64
#define SP_REGNUM 1

/*
 * This function does all command processing for interfacing to gdb.
 */
static void
handle_exception (struct pt_regs *regs)
{
	int sigval;
	int addr;
	int length;
	char *ptr;
	unsigned int msr;

	if (debugger_fault_handler) {
		debugger_fault_handler(regs);
		panic("kgdb longjump failed!\n");
	}
	if (kgdb_active) {
		printk("interrupt while in kgdb, returning\n");
		return;
	}
	kgdb_active = 1;
	kgdb_started = 1;

#ifdef KGDB_DEBUG
	printk("kgdb: entering handle_exception; trap [0x%x]\n",
	       (unsigned int)regs->trap);
#endif

	kgdb_interruptible(0);
	lock_kernel();
	msr = get_msr();
	set_msr(msr & ~MSR_EE);	/* disable interrupts */

	if (regs->nip == (unsigned long)breakinst) {
		/* Skip over breakpoint trap insn */
		regs->nip += 4;
	}

	/* reply to host that an exception has occurred */
	sigval = computeSignal(regs->trap);
	ptr = remcomOutBuffer;

#if 0
	*ptr++ = 'S';
	*ptr++ = hexchars[sigval >> 4];
	*ptr++ = hexchars[sigval & 0xf];
#else
	*ptr++ = 'T';
	*ptr++ = hexchars[sigval >> 4];
	*ptr++ = hexchars[sigval & 0xf];
	*ptr++ = hexchars[PC_REGNUM >> 4];
	*ptr++ = hexchars[PC_REGNUM & 0xf];
	*ptr++ = ':';
	ptr = mem2hex((char *)&regs->nip, ptr, 4);
	*ptr++ = ';';
	*ptr++ = hexchars[SP_REGNUM >> 4];
	*ptr++ = hexchars[SP_REGNUM & 0xf];
	*ptr++ = ':';
	ptr = mem2hex(((char *)&regs) + SP_REGNUM*4, ptr, 4);
	*ptr++ = ';';
#endif

	*ptr++ = 0;

	putpacket(remcomOutBuffer);

	/* XXX We may want to add some features dealing with poking the
	 * XXX page tables, ... (look at sparc-stub.c for more info)
	 * XXX also required hacking to the gdb sources directly...
	 */

	while (1) {
		remcomOutBuffer[0] = 0;

		getpacket(remcomInBuffer);
		switch (remcomInBuffer[0]) {
		case '?':               /* report most recent signal */
			remcomOutBuffer[0] = 'S';
			remcomOutBuffer[1] = hexchars[sigval >> 4];
			remcomOutBuffer[2] = hexchars[sigval & 0xf];
			remcomOutBuffer[3] = 0;
			break;
#if 0
		case 'q': /* this screws up gdb for some reason...*/
		{
			extern long _start, sdata, __bss_start;

			ptr = &remcomInBuffer[1];
			if (strncmp(ptr, "Offsets", 7) != 0)
				break;

			ptr = remcomOutBuffer;
			sprintf(ptr, "Text=%8.8x;Data=%8.8x;Bss=%8.8x",
				&_start, &sdata, &__bss_start);
			break;
		}
#endif
		case 'd':
			/* toggle debug flag */
			kdebug ^= 1;
			break;

		case 'g':	/* return the value of the CPU registers.
				 * some of them are non-PowerPC names :(
				 * they are stored in gdb like:
				 * struct {
				 *     u32 gpr[32];
				 *     f64 fpr[32];
				 *     u32 pc, ps, cnd, lr; (ps=msr)
				 *     u32 cnt, xer, mq;
				 * }
				 */
		{
			int i;
			ptr = remcomOutBuffer;
			/* General Purpose Regs */
			ptr = mem2hex((char *)regs, ptr, 32 * 4);
			/* Floating Point Regs - FIXME */
			/*ptr = mem2hex((char *), ptr, 32 * 8);*/
			for(i=0; i<(32*8*2); i++) { /* 2chars/byte */
				ptr[i] = '0';
			}
			ptr += 32*8*2;
			/* pc, msr, cr, lr, ctr, xer, (mq is unused) */
			ptr = mem2hex((char *)&regs->nip, ptr, 4);
			ptr = mem2hex((char *)&regs->msr, ptr, 4);
			ptr = mem2hex((char *)&regs->ccr, ptr, 4);
			ptr = mem2hex((char *)&regs->link, ptr, 4);
			ptr = mem2hex((char *)&regs->ctr, ptr, 4);
			ptr = mem2hex((char *)&regs->xer, ptr, 4);
		}
			break;

		case 'G':   /* set the value of the CPU registers */
		{
			ptr = &remcomInBuffer[1];

			/*
			 * If the stack pointer has moved, you should pray.
			 * (cause only god can help you).
			 */

			/* General Purpose Regs */
			hex2mem(ptr, (char *)regs, 32 * 4);

			/* Floating Point Regs - FIXME?? */
			/*ptr = hex2mem(ptr, ??, 32 * 8);*/
			ptr += 32*8*2;

			/* pc, msr, cr, lr, ctr, xer, (mq is unused) */
			ptr = hex2mem(ptr, (char *)&regs->nip, 4);
			ptr = hex2mem(ptr, (char *)&regs->msr, 4);
			ptr = hex2mem(ptr, (char *)&regs->ccr, 4);
			ptr = hex2mem(ptr, (char *)&regs->link, 4);
			ptr = hex2mem(ptr, (char *)&regs->ctr, 4);
			ptr = hex2mem(ptr, (char *)&regs->xer, 4);

			strcpy(remcomOutBuffer,"OK");
		}
			break;
		case 'H':
			/* don't do anything, yet, just acknowledge */
			hexToInt(&ptr, &addr);
			strcpy(remcomOutBuffer,"OK");
			break;

		case 'm':	/* mAA..AA,LLLL  Read LLLL bytes at address AA..AA */
				/* Try to read %x,%x.  */

			ptr = &remcomInBuffer[1];

			if (hexToInt(&ptr, &addr)
			    && *ptr++ == ','
			    && hexToInt(&ptr, &length))	{
				if (mem2hex((char *)addr, remcomOutBuffer,length))
					break;
				strcpy (remcomOutBuffer, "E03");
			} else {
				strcpy(remcomOutBuffer,"E01");
			}
			break;

		case 'M': /* MAA..AA,LLLL: Write LLLL bytes at address AA.AA return OK */
			/* Try to read '%x,%x:'.  */

			ptr = &remcomInBuffer[1];

			if (hexToInt(&ptr, &addr)
			    && *ptr++ == ','
			    && hexToInt(&ptr, &length)
			    && *ptr++ == ':') {
				if (hex2mem(ptr, (char *)addr, length)) {
					strcpy(remcomOutBuffer, "OK");
				} else {
					strcpy(remcomOutBuffer, "E03");
				}
				flush_icache_range(addr, addr+length);
			} else {
				strcpy(remcomOutBuffer, "E02");
			}
			break;


		case 'k':    /* kill the program, actually just continue */
		case 'c':    /* cAA..AA  Continue; address AA..AA optional */
			/* try to read optional parameter, pc unchanged if no parm */

			ptr = &remcomInBuffer[1];
			if (hexToInt(&ptr, &addr)) {
				regs->nip = addr;
			}

/* Need to flush the instruction cache here, as we may have deposited a
 * breakpoint, and the icache probably has no way of knowing that a data ref to
 * some location may have changed something that is in the instruction cache.
 */
			kgdb_flush_cache_all();
			set_msr(msr);
			kgdb_interruptible(1);
			unlock_kernel();
			kgdb_active = 0;
			return;

		case 's':
			kgdb_flush_cache_all();
			regs->msr |= MSR_SE;
#if 0
			set_msr(msr | MSR_SE);
#endif
			unlock_kernel();
			kgdb_active = 0;
			return;

		case 'r':		/* Reset (if user process..exit ???)*/
			panic("kgdb reset.");
			break;
		}			/* switch */
		if (remcomOutBuffer[0] && kdebug) {
			printk("remcomInBuffer: %s\n", remcomInBuffer);
			printk("remcomOutBuffer: %s\n", remcomOutBuffer);
		}
		/* reply to the request */
		putpacket(remcomOutBuffer);
	} /* while(1) */
}

/* This function will generate a breakpoint exception.  It is used at the
   beginning of a program to sync up with a debugger and can be used
   otherwise as a quick means to stop program execution and "break" into
   the debugger. */

void
breakpoint(void)
{
	if (!initialized) {
		printk("breakpoint() called b4 kgdb init\n");
		return;
	}

	asm("	.globl breakinst
	     breakinst: .long 0x7d821008
            ");
}

/* Output string in GDB O-packet format if GDB has connected. If nothing
   output, returns 0 (caller must then handle output). */
int
kgdb_output_string (const char* s, unsigned int count)
{
	char buffer[512];

        if (!kgdb_started)
            return 0;

	count = (count <= (sizeof(buffer) / 2 - 2)) 
		? count : (sizeof(buffer) / 2 - 2);

	buffer[0] = 'O';
	mem2hex (s, &buffer[1], count);
	putpacket(buffer);

        return 1;
 }

#ifndef CONFIG_8xx

/* I don't know why other platforms don't need this.  The function for
 * the 8xx is found in arch/ppc/8xx_io/uart.c.  -- Dan
 */
void
kgdb_map_scc(void)
{
}
#endif
/*
 * BK Id: SCCS/s.smp.c 1.37 11/23/01 16:38:30 paulus
 */
/*
 * Smp support for ppc.
 *
 * Written by Cort Dougan (cort@cs.nmt.edu) borrowing a great
 * deal of code from the sparc and intel versions.
 *
 * Copyright (C) 1999 Cort Dougan <cort@cs.nmt.edu>
 *
 */

#include <linux/config.h>
#include <linux/kernel.h>
#include <linux/sched.h>
#include <linux/smp.h>
#include <linux/smp_lock.h>
#include <linux/interrupt.h>
#include <linux/kernel_stat.h>
#include <linux/delay.h>
#define __KERNEL_SYSCALLS__
#include <linux/unistd.h>
#include <linux/init.h>
#include <linux/spinlock.h>
#include <linux/cache.h>

#include <asm/ptrace.h>
#include <asm/atomic.h>
#include <asm/irq.h>
#include <asm/page.h>
#include <asm/pgtable.h>
#include <asm/hardirq.h>
#include <asm/softirq.h>
#include <asm/io.h>
#include <asm/prom.h>
#include <asm/smp.h>
#include <asm/residual.h>
#include <asm/time.h>

int smp_threads_ready;
volatile int smp_commenced;
int smp_num_cpus = 1;
int smp_tb_synchronized;
struct cpuinfo_PPC cpu_data[NR_CPUS];
struct klock_info_struct klock_info = { KLOCK_CLEAR, 0 };
atomic_t ipi_recv;
atomic_t ipi_sent;
spinlock_t kernel_flag __cacheline_aligned_in_smp = SPIN_LOCK_UNLOCKED;
unsigned int prof_multiplier[NR_CPUS];
unsigned int prof_counter[NR_CPUS];
cycles_t cacheflush_time;
static int max_cpus __initdata = NR_CPUS;
unsigned long cpu_online_map;
int smp_hw_index[NR_CPUS];
static struct smp_ops_t *smp_ops;

/* all cpu mappings are 1-1 -- Cort */
volatile unsigned long cpu_callin_map[NR_CPUS];

#define TB_SYNC_PASSES 4
volatile unsigned long __initdata tb_sync_flag = 0;
volatile unsigned long __initdata tb_offset = 0;

int start_secondary(void *);
extern int cpu_idle(void *unused);
void smp_call_function_interrupt(void);
void smp_message_pass(int target, int msg, unsigned long data, int wait);

/* Since OpenPIC has only 4 IPIs, we use slightly different message numbers.
 * 
 * Make sure this matches openpic_request_IPIs in open_pic.c, or what shows up
 * in /proc/interrupts will be wrong!!! --Troy */
#define PPC_MSG_CALL_FUNCTION	0
#define PPC_MSG_RESCHEDULE	1
#define PPC_MSG_INVALIDATE_TLB	2
#define PPC_MSG_XMON_BREAK	3

#define smp_message_pass(t,m,d,w) \
    do { if (smp_ops) \
	     atomic_inc(&ipi_sent); \
	     smp_ops->message_pass((t),(m),(d),(w)); \
       } while(0)

/* 
 * Common functions
 */
void smp_local_timer_interrupt(struct pt_regs * regs)
{
	int cpu = smp_processor_id();

	if (!--prof_counter[cpu]) {
		update_process_times(user_mode(regs));
		prof_counter[cpu]=prof_multiplier[cpu];
	}
}

void smp_message_recv(int msg, struct pt_regs *regs)
{
	atomic_inc(&ipi_recv);
	
	switch( msg ) {
	case PPC_MSG_CALL_FUNCTION:
		smp_call_function_interrupt();
		break;
	case PPC_MSG_RESCHEDULE: 
		current->need_resched = 1;
		break;
	case PPC_MSG_INVALIDATE_TLB:
		_tlbia();
		break;
#ifdef CONFIG_XMON
	case PPC_MSG_XMON_BREAK:
		xmon(regs);
		break;
#endif /* CONFIG_XMON */
	default:
		printk("SMP %d: smp_message_recv(): unknown msg %d\n",
		       smp_processor_id(), msg);
		break;
	}
}

/*
 * 750's don't broadcast tlb invalidates so
 * we have to emulate that behavior.
 *   -- Cort
 */
void smp_send_tlb_invalidate(int cpu)
{
	if ( PVR_VER(mfspr(PVR)) == 8 )
		smp_message_pass(MSG_ALL_BUT_SELF, PPC_MSG_INVALIDATE_TLB, 0, 0);
}

void smp_send_reschedule(int cpu)
{
	/*
	 * This is only used if `cpu' is running an idle task,
	 * so it will reschedule itself anyway...
	 *
	 * This isn't the case anymore since the other CPU could be
	 * sleeping and won't reschedule until the next interrupt (such
	 * as the timer).
	 *  -- Cort
	 */
	/* This is only used if `cpu' is running an idle task,
	   so it will reschedule itself anyway... */
	smp_message_pass(cpu, PPC_MSG_RESCHEDULE, 0, 0);
}

#ifdef CONFIG_XMON
void smp_send_xmon_break(int cpu)
{
	smp_message_pass(cpu, PPC_MSG_XMON_BREAK, 0, 0);
}
#endif /* CONFIG_XMON */

static void stop_this_cpu(void *dummy)
{
	__cli();
	while (1)
		;
}

void smp_send_stop(void)
{
	smp_call_function(stop_this_cpu, NULL, 1, 0);
	smp_num_cpus = 1;
}

/*
 * Structure and data for smp_call_function(). This is designed to minimise
 * static memory requirements. It also looks cleaner.
 * Stolen from the i386 version.
 */
static spinlock_t call_lock = SPIN_LOCK_UNLOCKED;

static struct call_data_struct {
	void (*func) (void *info);
	void *info;
	atomic_t started;
	atomic_t finished;
	int wait;
} *call_data;

/*
 * this function sends a 'generic call function' IPI to all other CPUs
 * in the system.
 */

int smp_call_function (void (*func) (void *info), void *info, int nonatomic,
			int wait)
/*
 * [SUMMARY] Run a function on all other CPUs.
 * <func> The function to run. This must be fast and non-blocking.
 * <info> An arbitrary pointer to pass to the function.
 * <nonatomic> currently unused.
 * <wait> If true, wait (atomically) until function has completed on other CPUs.
 * [RETURNS] 0 on success, else a negative status code. Does not return until
 * remote CPUs are nearly ready to execute <<func>> or are or have executed.
 *
 * You must not call this function with disabled interrupts or from a
 * hardware interrupt handler, you may call it from a bottom half handler.
 */
{
	struct call_data_struct data;
	int ret = -1, cpus = smp_num_cpus-1;
	int timeout;

	if (!cpus)
		return 0;

	data.func = func;
	data.info = info;
	atomic_set(&data.started, 0);
	data.wait = wait;
	if (wait)
		atomic_set(&data.finished, 0);

	spin_lock_bh(&call_lock);
	call_data = &data;
	/* Send a message to all other CPUs and wait for them to respond */
	smp_message_pass(MSG_ALL_BUT_SELF, PPC_MSG_CALL_FUNCTION, 0, 0);

	/* Wait for response */
	timeout = 1000000;
	while (atomic_read(&data.started) != cpus) {
		if (--timeout == 0) {
			printk("smp_call_function on cpu %d: other cpus not responding (%d)\n",
			       smp_processor_id(), atomic_read(&data.started));
			goto out;
		}
		barrier();
		udelay(1);
	}

	if (wait) {
		timeout = 1000000;
		while (atomic_read(&data.finished) != cpus) {
			if (--timeout == 0) {
				printk("smp_call_function on cpu %d: other cpus not finishing (%d/%d)\n",
				       smp_processor_id(), atomic_read(&data.finished), atomic_read(&data.started));
				goto out;
			}
			barrier();
			udelay(1);
		}
	}
	ret = 0;

 out:
	spin_unlock_bh(&call_lock);
	return ret;
}

void smp_call_function_interrupt(void)
{
	void (*func) (void *info) = call_data->func;
	void *info = call_data->info;
	int wait = call_data->wait;

	/*
	 * Notify initiating CPU that I've grabbed the data and am
	 * about to execute the function
	 */
	atomic_inc(&call_data->started);
	/*
	 * At this point the info structure may be out of scope unless wait==1
	 */
	(*func)(info);
	if (wait)
		atomic_inc(&call_data->finished);
}

void __init smp_boot_cpus(void)
{
	extern struct task_struct *current_set[NR_CPUS];
	int i, cpu_nr;
	struct task_struct *p;

	printk("Entering SMP Mode...\n");
	smp_num_cpus = 1;
        smp_store_cpu_info(0);
	cpu_online_map = 1UL;

	/*
	 * assume for now that the first cpu booted is
	 * cpu 0, the master -- Cort
	 */
	cpu_callin_map[0] = 1;
	current->processor = 0;

	init_idle();

	for (i = 0; i < NR_CPUS; i++) {
		prof_counter[i] = 1;
		prof_multiplier[i] = 1;
	}

	/*
	 * XXX very rough, assumes 20 bus cycles to read a cache line,
	 * timebase increments every 4 bus cycles, 32kB L1 data cache.
	 */
	cacheflush_time = 5 * 1024;

	smp_ops = ppc_md.smp_ops;
	if (smp_ops == NULL) {
		printk("SMP not supported on this machine.\n");
		return;
	}

	/* Probe arch for CPUs */
	cpu_nr = smp_ops->probe();

	/*
	 * only check for cpus we know exist.  We keep the callin map
	 * with cpus at the bottom -- Cort
	 */
	if (cpu_nr > max_cpus)
		cpu_nr = max_cpus;
	for (i = 1; i < cpu_nr; i++) {
		int c;
		struct pt_regs regs;
		
		/* create a process for the processor */
		/* only regs.msr is actually used, and 0 is OK for it */
		memset(&regs, 0, sizeof(struct pt_regs));
		if (do_fork(CLONE_VM|CLONE_PID, 0, &regs, 0) < 0)
			panic("failed fork for CPU %d", i);
		p = init_task.prev_task;
		if (!p)
			panic("No idle task for CPU %d", i);
		del_from_runqueue(p);
		unhash_process(p);
		init_tasks[i] = p;

		p->processor = i;
		p->cpus_runnable = 1 << i; /* we schedule the first task manually */
		current_set[i] = p;

		/*
		 * There was a cache flush loop here to flush the cache
		 * to memory for the first 8MB of RAM.  The cache flush
		 * has been pushed into the kick_cpu function for those
		 * platforms that need it.
		 */

		/* wake up cpus */
		smp_ops->kick_cpu(i);
		
		/*
		 * wait to see if the cpu made a callin (is actually up).
		 * use this value that I found through experimentation.
		 * -- Cort
		 */
		for ( c = 1000; c && !cpu_callin_map[i] ; c-- )
			udelay(100);
		
		if ( cpu_callin_map[i] )
		{
			char buf[32];
			sprintf(buf, "found cpu %d", i);
			if (ppc_md.progress) ppc_md.progress(buf, 0x350+i);
			printk("Processor %d found.\n", i);
			smp_num_cpus++;
		} else {
			char buf[32];
			sprintf(buf, "didn't find cpu %d", i);
			if (ppc_md.progress) ppc_md.progress(buf, 0x360+i);
			printk("Processor %d is stuck.\n", i);
		}
	}

	/* Setup CPU 0 last (important) */
	smp_ops->setup_cpu(0);
	
	if (smp_num_cpus < 2)
		smp_tb_synchronized = 1;
}

void __init smp_software_tb_sync(int cpu)
{
#define PASSES 4	/* 4 passes.. */
	int pass;
	int i, j;

	/* stop - start will be the number of timebase ticks it takes for cpu0
	 * to send a message to all others and the first reponse to show up.
	 *
	 * ASSUMPTION: this time is similiar for all cpus
	 * ASSUMPTION: the time to send a one-way message is ping/2
	 */
	register unsigned long start = 0;
	register unsigned long stop = 0;
	register unsigned long temp = 0;

	set_tb(0, 0);

	/* multiple passes to get in l1 cache.. */
	for (pass = 2; pass < 2+PASSES; pass++){
		if (cpu == 0){
			mb();
			for (i = j = 1; i < smp_num_cpus; i++, j++){
				/* skip stuck cpus */
				while (!cpu_callin_map[j])
					++j;
				while (cpu_callin_map[j] != pass)
					barrier();
			}
			mb();
			tb_sync_flag = pass;
			start = get_tbl();	/* start timing */
			while (tb_sync_flag)
				mb();
			stop = get_tbl();	/* end timing */
			/* theoretically, the divisor should be 2, but
			 * I get better results on my dual mtx. someone
			 * please report results on other smp machines..
			 */
			tb_offset = (stop-start)/4;
			mb();
			tb_sync_flag = pass;
			udelay(10);
			mb();
			tb_sync_flag = 0;
			mb();
			set_tb(0,0);
			mb();
		} else {
			cpu_callin_map[cpu] = pass;
			mb();
			while (!tb_sync_flag)
				mb();		/* wait for cpu0 */
			mb();
			tb_sync_flag = 0;	/* send response for timing */
			mb();
			while (!tb_sync_flag)
				mb();
			temp = tb_offset;	/* make sure offset is loaded */
			while (tb_sync_flag)
				mb();
			set_tb(0,temp);		/* now, set the timebase */
			mb();
		}
	}
	if (cpu == 0) {
		smp_tb_synchronized = 1;
		printk("smp_software_tb_sync: %d passes, final offset: %ld\n",
			PASSES, tb_offset);
	}
	/* so time.c doesn't get confused */
	set_dec(tb_ticks_per_jiffy);
	last_jiffy_stamp(cpu) = 0;
}

void __init smp_commence(void)
{
	/*
	 *	Lets the callin's below out of their loop.
	 */
	if (ppc_md.progress) ppc_md.progress("smp_commence", 0x370);
	wmb();
	smp_commenced = 1;

	/* if the smp_ops->setup_cpu function has not already synched the
	 * timebases with a nicer hardware-based method, do so now
	 *
	 * I am open to suggestions for improvements to this method
	 * -- Troy <hozer@drgw.net>
	 *
	 * NOTE: if you are debugging, set smp_tb_synchronized for now
	 * since if this code runs pretty early and needs all cpus that
	 * reported in in smp_callin_map to be working
	 *
	 * NOTE2: this code doesn't seem to work on > 2 cpus. -- paulus/BenH
	 */
	if (!smp_tb_synchronized && smp_num_cpus == 2) {
		unsigned long flags;
		__save_and_cli(flags);	
		smp_software_tb_sync(0);
		__restore_flags(flags);
	}
}

void __init smp_callin(void)
{
	int cpu = current->processor;
	
        smp_store_cpu_info(cpu);
	set_dec(tb_ticks_per_jiffy);
	cpu_callin_map[cpu] = 1;

	smp_ops->setup_cpu(cpu);

	/*
	 * This cpu is now "online".  Only set them online
	 * before they enter the loop below since write access
	 * to the below variable is _not_ guaranteed to be
	 * atomic.
	 *   -- Cort <cort@fsmlabs.com>
	 */
	cpu_online_map |= 1UL << smp_processor_id();
	
	while(!smp_commenced)
		barrier();

	/* see smp_commence for more info */
	if (!smp_tb_synchronized && smp_num_cpus == 2) {
		smp_software_tb_sync(cpu);
	}
	__sti();
}

/* intel needs this */
void __init initialize_secondary(void)
{
}

/* Activate a secondary processor. */
int __init start_secondary(void *unused)
{
	atomic_inc(&init_mm.mm_count);
	current->active_mm = &init_mm;
	smp_callin();
	return cpu_idle(NULL);
}

void __init smp_setup(char *str, int *ints)
{
}

int __init setup_profiling_timer(unsigned int multiplier)
{
	return 0;
}

void __init smp_store_cpu_info(int id)
{
        struct cpuinfo_PPC *c = &cpu_data[id];

	/* assume bogomips are same for everything */
        c->loops_per_jiffy = loops_per_jiffy;
        c->pvr = mfspr(PVR);
}

static int __init maxcpus(char *str)
{
	get_option(&str, &max_cpus);
	return 1;
}

__setup("maxcpus=", maxcpus);
/*
 * BK Id: SCCS/s.softemu8xx.c 1.8 05/17/01 18:14:22 cort
 */
/*
 * Software emulation of some PPC instructions for the 8xx core.
 *
 * Copyright (C) 1998 Dan Malek (dmalek@jlc.net)
 *
 * Software floating emuation for the MPC8xx processor.  I did this mostly
 * because it was easier than trying to get the libraries compiled for
 * software floating point.  The goal is still to get the libraries done,
 * but I lost patience and needed some hacks to at least get init and
 * shells running.  The first problem is the setjmp/longjmp that save
 * and restore the floating point registers.
 *
 * For this emulation, our working registers are found on the register
 * save area.
 */

#include <linux/errno.h>
#include <linux/sched.h>
#include <linux/kernel.h>
#include <linux/mm.h>
#include <linux/stddef.h>
#include <linux/unistd.h>
#include <linux/ptrace.h>
#include <linux/slab.h>
#include <linux/user.h>
#include <linux/a.out.h>
#include <linux/interrupt.h>

#include <asm/pgtable.h>
#include <asm/uaccess.h>
#include <asm/system.h>
#include <asm/io.h>
#include <asm/processor.h>

/* Eventually we may need a look-up table, but this works for now.
*/
#define LFS	48
#define LFD	50
#define LFDU	51
#define STFD	54
#define STFDU	55
#define FMR	63

/*
 * We return 0 on success, 1 on unimplemented instruction, and EFAULT
 * if a load/store faulted.
 */
int
Soft_emulate_8xx(struct pt_regs *regs)
{
	uint	inst, instword;
	uint	flreg, idxreg, disp;
	uint	retval;
	signed short sdisp;
	uint	*ea, *ip;

	retval = 0;

	instword = *((uint *)regs->nip);
	inst = instword >> 26;

	flreg = (instword >> 21) & 0x1f;
	idxreg = (instword >> 16) & 0x1f;
	disp = instword & 0xffff;

	ea = (uint *)(regs->gpr[idxreg] + disp);
	ip = (uint *)&current->thread.fpr[flreg];

	switch ( inst )
	{
	case LFD:
		/* this is a 16 bit quantity that is sign extended
		 * so use a signed short here -- Cort
		 */
		sdisp = (instword & 0xffff);
		ea = (uint *)(regs->gpr[idxreg] + sdisp);
		if (copy_from_user(ip, ea, sizeof(double)))
			retval = -EFAULT;
		break;
		
	case LFDU:
		if (copy_from_user(ip, ea, sizeof(double)))
			retval = -EFAULT;
		else
			regs->gpr[idxreg] = (uint)ea;
		break;
	case LFS:
		sdisp = (instword & 0xffff);
		ea = (uint *)(regs->gpr[idxreg] + sdisp);
		if (copy_from_user(ip, ea, sizeof(float)))
			retval = -EFAULT;
		break;
	case STFD:
		/* this is a 16 bit quantity that is sign extended
		 * so use a signed short here -- Cort
		 */
		sdisp = (instword & 0xffff);
		ea = (uint *)(regs->gpr[idxreg] + sdisp);
		if (copy_to_user(ea, ip, sizeof(double)))
			retval = -EFAULT;
		break;

	case STFDU:
		if (copy_to_user(ea, ip, sizeof(double)))
			retval = -EFAULT;
		else
			regs->gpr[idxreg] = (uint)ea;
		break;
	case FMR:
		/* assume this is a fp move -- Cort */
		memcpy( ip, &current->thread.fpr[(instword>>11)&0x1f],
			sizeof(double) );
		break;
	default:
		retval = 1;
		printk("Bad emulation %s/%d\n"
		       " NIP: %08x instruction: %08x opcode: %x "
		       "A: %x B: %x C: %x code: %x rc: %x\n",
		       current->comm,current->pid,
		       regs->nip,
		       instword,inst,
		       (instword>>16)&0x1f,
		       (instword>>11)&0x1f,
		       (instword>>6)&0x1f,
		       (instword>>1)&0x3ff,
		       instword&1);
		{
			int pa;
			print_8xx_pte(current->mm,regs->nip);
			pa = get_8xx_pte(current->mm,regs->nip) & PAGE_MASK;
			pa |= (regs->nip & ~PAGE_MASK);
			pa = __va(pa);
			printk("Kernel VA for NIP %x ", pa);
			print_8xx_pte(current->mm,pa);
		}
		
	}

	if (retval == 0)
		regs->nip += 4;
	return(retval);
}

/*
 * BK Id: SCCS/s.pmac_pic.c 1.24 12/19/01 10:53:01 paulus
 */
#include <linux/config.h>
#include <linux/stddef.h>
#include <linux/init.h>
#include <linux/sched.h>
#include <linux/signal.h>
#include <linux/pci.h>

#include <asm/sections.h>
#include <asm/io.h>
#include <asm/smp.h>
#include <asm/prom.h>
#include <asm/pci-bridge.h>
#include <asm/time.h>

#include "pmac_pic.h"
#include "open_pic.h"

struct pmac_irq_hw {
        unsigned int    event;
        unsigned int    enable;
        unsigned int    ack;
        unsigned int    level;
};

/* Default addresses */
static volatile struct pmac_irq_hw *pmac_irq_hw[4] __pmacdata = {
        (struct pmac_irq_hw *) 0xf3000020,
        (struct pmac_irq_hw *) 0xf3000010,
        (struct pmac_irq_hw *) 0xf4000020,
        (struct pmac_irq_hw *) 0xf4000010,
};

#define GC_LEVEL_MASK		0x3ff00000
#define OHARE_LEVEL_MASK	0x1ff00000
#define HEATHROW_LEVEL_MASK	0x1ff00000

static int max_irqs __pmacdata;
static int max_real_irqs __pmacdata;
static u32 level_mask[4] __pmacdata;

static spinlock_t pmac_pic_lock __pmacdata = SPIN_LOCK_UNLOCKED;


#define GATWICK_IRQ_POOL_SIZE        10
static struct interrupt_info gatwick_int_pool[GATWICK_IRQ_POOL_SIZE] __pmacdata;

/*
 * Mark an irq as "lost".  This is only used on the pmac
 * since it can lose interrupts (see pmac_set_irq_mask).
 * -- Cort
 */
void __pmac
__set_lost(unsigned long irq_nr, int nokick)
{
	if (!test_and_set_bit(irq_nr, ppc_lost_interrupts)) {
		atomic_inc(&ppc_n_lost_interrupts);
		if (!nokick)
			set_dec(1);
	}
}

static void __pmac
pmac_mask_and_ack_irq(unsigned int irq_nr)
{
        unsigned long bit = 1UL << (irq_nr & 0x1f);
        int i = irq_nr >> 5;
        unsigned long flags;

        if ((unsigned)irq_nr >= max_irqs)
                return;

        clear_bit(irq_nr, ppc_cached_irq_mask);
        if (test_and_clear_bit(irq_nr, ppc_lost_interrupts))
                atomic_dec(&ppc_n_lost_interrupts);
	spin_lock_irqsave(&pmac_pic_lock, flags);
        out_le32(&pmac_irq_hw[i]->enable, ppc_cached_irq_mask[i]);
        out_le32(&pmac_irq_hw[i]->ack, bit);
        do {
                /* make sure ack gets to controller before we enable
                   interrupts */
                mb();
        } while((in_le32(&pmac_irq_hw[i]->enable) & bit)
                != (ppc_cached_irq_mask[i] & bit));
	spin_unlock_irqrestore(&pmac_pic_lock, flags);
}

static void __pmac pmac_set_irq_mask(unsigned int irq_nr, int nokicklost)
{
        unsigned long bit = 1UL << (irq_nr & 0x1f);
        int i = irq_nr >> 5;
        unsigned long flags;

        if ((unsigned)irq_nr >= max_irqs)
                return;

	spin_lock_irqsave(&pmac_pic_lock, flags);
        /* enable unmasked interrupts */
        out_le32(&pmac_irq_hw[i]->enable, ppc_cached_irq_mask[i]);

        do {
                /* make sure mask gets to controller before we
                   return to user */
                mb();
        } while((in_le32(&pmac_irq_hw[i]->enable) & bit)
                != (ppc_cached_irq_mask[i] & bit));

        /*
         * Unfortunately, setting the bit in the enable register
         * when the device interrupt is already on *doesn't* set
         * the bit in the flag register or request another interrupt.
         */
        if (bit & ppc_cached_irq_mask[i] & in_le32(&pmac_irq_hw[i]->level))
		__set_lost((ulong)irq_nr, nokicklost);
	spin_unlock_irqrestore(&pmac_pic_lock, flags);
}

static void __pmac pmac_mask_irq(unsigned int irq_nr)
{
        clear_bit(irq_nr, ppc_cached_irq_mask);
        pmac_set_irq_mask(irq_nr, 0);
        mb();
}

static void __pmac pmac_unmask_irq(unsigned int irq_nr)
{
        set_bit(irq_nr, ppc_cached_irq_mask);
        pmac_set_irq_mask(irq_nr, 0);
}

static void __pmac pmac_end_irq(unsigned int irq_nr)
{
	if (!(irq_desc[irq_nr].status & (IRQ_DISABLED|IRQ_INPROGRESS))) {
        	set_bit(irq_nr, ppc_cached_irq_mask);
	        pmac_set_irq_mask(irq_nr, 1);
	}
}


struct hw_interrupt_type pmac_pic = {
        " PMAC-PIC ",
        NULL,
        NULL,
        pmac_unmask_irq,
        pmac_mask_irq,
        pmac_mask_and_ack_irq,
        pmac_end_irq,
        NULL
};

struct hw_interrupt_type gatwick_pic = {
	" GATWICK  ",
	NULL,
	NULL,
	pmac_unmask_irq,
	pmac_mask_irq,
	pmac_mask_and_ack_irq,
	pmac_end_irq,
	NULL
};

static void gatwick_action(int cpl, void *dev_id, struct pt_regs *regs)
{
	int irq, bits;
	
	for (irq = max_irqs; (irq -= 32) >= max_real_irqs; ) {
		int i = irq >> 5;
		bits = in_le32(&pmac_irq_hw[i]->event) | ppc_lost_interrupts[i];
		/* We must read level interrupts from the level register */
		bits |= (in_le32(&pmac_irq_hw[i]->level) & level_mask[i]);
		bits &= ppc_cached_irq_mask[i];
		if (bits == 0)
			continue;
		irq += __ilog2(bits);
		break;
	}
	/* The previous version of this code allowed for this case, we
	 * don't.  Put this here to check for it.
	 * -- Cort
	 */
	if ( irq_desc[irq].handler != &gatwick_pic )
		printk("gatwick irq not from gatwick pic\n");
	else
		ppc_irq_dispatch_handler( regs, irq );
}

int
pmac_get_irq(struct pt_regs *regs)
{
	int irq;
	unsigned long bits = 0;

#ifdef CONFIG_SMP
	void psurge_smp_message_recv(struct pt_regs *);
	
       	/* IPI's are a hack on the powersurge -- Cort */
       	if ( smp_processor_id() != 0 ) {
		psurge_smp_message_recv(regs);
		return -2;	/* ignore, already handled */
        }
#endif /* CONFIG_SMP */
	for (irq = max_real_irqs; (irq -= 32) >= 0; ) {
		int i = irq >> 5;
		bits = in_le32(&pmac_irq_hw[i]->event) | ppc_lost_interrupts[i];
		/* We must read level interrupts from the level register */
		bits |= (in_le32(&pmac_irq_hw[i]->level) & level_mask[i]);
		bits &= ppc_cached_irq_mask[i];
		if (bits == 0)
			continue;
		irq += __ilog2(bits);
		break;
	}

	return irq;
}

/* This routine will fix some missing interrupt values in the device tree
 * on the gatwick mac-io controller used by some PowerBooks
 */
static void __init
pmac_fix_gatwick_interrupts(struct device_node *gw, int irq_base)
{
	struct device_node *node;
	int count;
	
	memset(gatwick_int_pool, 0, sizeof(gatwick_int_pool));
	node = gw->child;
	count = 0;
	while(node)
	{
		/* Fix SCC */
		if (strcasecmp(node->name, "escc") == 0)
			if (node->child) {
				if (node->child->n_intrs < 3) {
					node->child->intrs = &gatwick_int_pool[count];
					count += 3;
				}
				node->child->n_intrs = 3;				
				node->child->intrs[0].line = 15+irq_base;
				node->child->intrs[1].line =  4+irq_base;
				node->child->intrs[2].line =  5+irq_base;
				printk(KERN_INFO "irq: fixed SCC on second controller (%d,%d,%d)\n",
					node->child->intrs[0].line,
					node->child->intrs[1].line,
					node->child->intrs[2].line);
			}
		/* Fix media-bay & left SWIM */
		if (strcasecmp(node->name, "media-bay") == 0) {
			struct device_node* ya_node;

			if (node->n_intrs == 0)
				node->intrs = &gatwick_int_pool[count++];
			node->n_intrs = 1;
			node->intrs[0].line = 29+irq_base;
			printk(KERN_INFO "irq: fixed media-bay on second controller (%d)\n",
					node->intrs[0].line);
			
			ya_node = node->child;
			while(ya_node)
			{
				if (strcasecmp(ya_node->name, "floppy") == 0) {
					if (ya_node->n_intrs < 2) {
						ya_node->intrs = &gatwick_int_pool[count];
						count += 2;
					}
					ya_node->n_intrs = 2;
					ya_node->intrs[0].line = 19+irq_base;
					ya_node->intrs[1].line =  1+irq_base;
					printk(KERN_INFO "irq: fixed floppy on second controller (%d,%d)\n",
						ya_node->intrs[0].line, ya_node->intrs[1].line);
				} 
				if (strcasecmp(ya_node->name, "ata4") == 0) {
					if (ya_node->n_intrs < 2) {
						ya_node->intrs = &gatwick_int_pool[count];
						count += 2;
					}
					ya_node->n_intrs = 2;
					ya_node->intrs[0].line = 14+irq_base;
					ya_node->intrs[1].line =  3+irq_base;
					printk(KERN_INFO "irq: fixed ide on second controller (%d,%d)\n",
						ya_node->intrs[0].line, ya_node->intrs[1].line);
				} 
				ya_node = ya_node->sibling;
			}
		}
		node = node->sibling;
	}
	if (count > 10) {
		printk("WARNING !! Gatwick interrupt pool overflow\n");
		printk("  GATWICK_IRQ_POOL_SIZE = %d\n", GATWICK_IRQ_POOL_SIZE);
		printk("              requested = %d\n", count);
	}
}

/*
 * The PowerBook 3400/2400/3500 can have a combo ethernet/modem
 * card which includes an ohare chip that acts as a second interrupt
 * controller.  If we find this second ohare, set it up and fix the
 * interrupt value in the device tree for the ethernet chip.
 */
static int __init enable_second_ohare(void)
{
	unsigned char bus, devfn;
	unsigned short cmd;
        unsigned long addr;
	struct device_node *irqctrler = find_devices("pci106b,7");
	struct device_node *ether;

	if (irqctrler == NULL || irqctrler->n_addrs <= 0)
		return -1;
	addr = (unsigned long) ioremap(irqctrler->addrs[0].address, 0x40);
	pmac_irq_hw[1] = (volatile struct pmac_irq_hw *)(addr + 0x20);
	max_irqs = 64;
	if (pci_device_from_OF_node(irqctrler, &bus, &devfn) == 0) {
		struct pci_controller* hose = pci_find_hose_for_OF_device(irqctrler);
		if (!hose)
		    printk(KERN_ERR "Can't find PCI hose for OHare2 !\n");
		else {
		    early_read_config_word(hose, bus, devfn, PCI_COMMAND, &cmd);
		    cmd |= PCI_COMMAND_MEMORY | PCI_COMMAND_MASTER;
	  	    cmd &= ~PCI_COMMAND_IO;
		    early_write_config_word(hose, bus, devfn, PCI_COMMAND, cmd);
		}
	}

	/* Fix interrupt for the modem/ethernet combo controller. The number
	   in the device tree (27) is bogus (correct for the ethernet-only
	   board but not the combo ethernet/modem board).
	   The real interrupt is 28 on the second controller -> 28+32 = 60.
	*/
	ether = find_devices("pci1011,14");
	if (ether && ether->n_intrs > 0) {
		ether->intrs[0].line = 60;
		printk(KERN_INFO "irq: Fixed ethernet IRQ to %d\n",
		       ether->intrs[0].line);
	}

	/* Return the interrupt number of the cascade */
	return irqctrler->intrs[0].line;
}

void __init
pmac_pic_init(void)
{
        int i;
        struct device_node *irqctrler;
        unsigned long addr;
	int irq_cascade = -1;
	
	/* We first try to detect Apple's new Core99 chipset, since mac-io
	 * is quite different on those machines and contains an IBM MPIC2.
	 */
	irqctrler = find_type_devices("open-pic");
	if (irqctrler != NULL)
	{
		printk("PowerMac using OpenPIC irq controller\n");
		if (irqctrler->n_addrs > 0)
		{
			int nmi_irq = -1;
			unsigned char senses[NR_IRQS];
#ifdef CONFIG_XMON
			struct device_node* pswitch;

			pswitch = find_devices("programmer-switch");
			if (pswitch && pswitch->n_intrs)
				nmi_irq = pswitch->intrs[0].line;
#endif /* CONFIG_XMON */
			prom_get_irq_senses(senses, 0, NR_IRQS);
			OpenPIC_InitSenses = senses;
			OpenPIC_NumInitSenses = NR_IRQS;
			ppc_md.get_irq = openpic_get_irq;
			OpenPIC_Addr = ioremap(irqctrler->addrs[0].address,
					       irqctrler->addrs[0].size);
			openpic_init(1, 0, 0, nmi_irq);
#ifdef CONFIG_XMON
			if (nmi_irq >= 0)
				request_irq(nmi_irq, xmon_irq, 0,
					    "NMI - XMON", 0);
#endif	/* CONFIG_XMON */
			return;
		}
		irqctrler = NULL;
	}

	/* Get the level/edge settings, assume if it's not
	 * a Grand Central nor an OHare, then it's an Heathrow
	 * (or Paddington).
	 */
	if (find_devices("gc"))
		level_mask[0] = GC_LEVEL_MASK;
	else if (find_devices("ohare")) {
		level_mask[0] = OHARE_LEVEL_MASK;
		/* We might have a second cascaded ohare */
		level_mask[1] = OHARE_LEVEL_MASK;
	} else {
		level_mask[0] = HEATHROW_LEVEL_MASK;
		level_mask[1] = 0;
		/* We might have a second cascaded heathrow */
		level_mask[2] = HEATHROW_LEVEL_MASK;
		level_mask[3] = 0;
	}

	/*
	 * G3 powermacs and 1999 G3 PowerBooks have 64 interrupts,
	 * 1998 G3 Series PowerBooks have 128, 
	 * other powermacs have 32.
	 * The combo ethernet/modem card for the Powerstar powerbooks
	 * (2400/3400/3500, ohare based) has a second ohare chip
	 * effectively making a total of 64.
	 */
	max_irqs = max_real_irqs = 32;
	irqctrler = find_devices("mac-io");
	if (irqctrler)
	{
		max_real_irqs = 64;
		if (irqctrler->next)
			max_irqs = 128;
		else
			max_irqs = 64;
	}
	for ( i = 0; i < max_real_irqs ; i++ )
		irq_desc[i].handler = &pmac_pic;

	/* get addresses of first controller */
	if (irqctrler) {
		if  (irqctrler->n_addrs > 0) {
			addr = (unsigned long) 
				ioremap(irqctrler->addrs[0].address, 0x40);
			for (i = 0; i < 2; ++i)
				pmac_irq_hw[i] = (volatile struct pmac_irq_hw*)
					(addr + (2 - i) * 0x10);
		}
		
		/* get addresses of second controller */
		irqctrler = irqctrler->next;
		if (irqctrler && irqctrler->n_addrs > 0) {
			addr = (unsigned long) 
				ioremap(irqctrler->addrs[0].address, 0x40);
			for (i = 2; i < 4; ++i)
				pmac_irq_hw[i] = (volatile struct pmac_irq_hw*)
					(addr + (4 - i) * 0x10);
			irq_cascade = irqctrler->intrs[0].line;
			if (device_is_compatible(irqctrler, "gatwick"))
				pmac_fix_gatwick_interrupts(irqctrler, max_real_irqs);
		}
	} else {
		/* older powermacs have a GC (grand central) or ohare at
		   f3000000, with interrupt control registers at f3000020. */
		addr = (unsigned long) ioremap(0xf3000000, 0x40);
		pmac_irq_hw[0] = (volatile struct pmac_irq_hw *) (addr + 0x20);
	}

	/* PowerBooks 3400 and 3500 can have a second controller in a second
	   ohare chip, on the combo ethernet/modem card */
	if (machine_is_compatible("AAPL,3400/2400")
	     || machine_is_compatible("AAPL,3500"))
		irq_cascade = enable_second_ohare();

	/* disable all interrupts in all controllers */
	for (i = 0; i * 32 < max_irqs; ++i)
		out_le32(&pmac_irq_hw[i]->enable, 0);
	/* mark level interrupts */
	for (i = 0; i < max_irqs; i++)
		if (level_mask[i >> 5] & (1UL << (i & 0x1f)))
			irq_desc[i].status = IRQ_LEVEL;
	
	/* get interrupt line of secondary interrupt controller */
	if (irq_cascade >= 0) {
		printk(KERN_INFO "irq: secondary controller on irq %d\n",
			(int)irq_cascade);
		for ( i = max_real_irqs ; i < max_irqs ; i++ )
			irq_desc[i].handler = &gatwick_pic;
		request_irq( irq_cascade, gatwick_action, SA_INTERRUPT,
			     "cascade", 0 );
	}
	printk("System has %d possible interrupts\n", max_irqs);
	if (max_irqs != max_real_irqs)
		printk(KERN_DEBUG "%d interrupts on main controller\n",
			max_real_irqs);

#ifdef CONFIG_XMON
	request_irq(20, xmon_irq, 0, "NMI - XMON", 0);
#endif	/* CONFIG_XMON */
}

#ifdef CONFIG_PMAC_PBOOK
/*
 * These procedures are used in implementing sleep on the powerbooks.
 * sleep_save_intrs() saves the states of all interrupt enables
 * and disables all interrupts except for the nominated one.
 * sleep_restore_intrs() restores the states of all interrupt enables.
 */
unsigned int sleep_save_mask[2];

void __pmac
pmac_sleep_save_intrs(int viaint)
{
	sleep_save_mask[0] = ppc_cached_irq_mask[0];
	sleep_save_mask[1] = ppc_cached_irq_mask[1];
	ppc_cached_irq_mask[0] = 0;
	ppc_cached_irq_mask[1] = 0;
	if (viaint > 0)
		set_bit(viaint, ppc_cached_irq_mask);
	out_le32(&pmac_irq_hw[0]->enable, ppc_cached_irq_mask[0]);
	if (max_real_irqs > 32)
		out_le32(&pmac_irq_hw[1]->enable, ppc_cached_irq_mask[1]);
	(void)in_le32(&pmac_irq_hw[0]->event);
	/* make sure mask gets to controller before we return to caller */
	mb();
        (void)in_le32(&pmac_irq_hw[0]->enable);
}

void __pmac
pmac_sleep_restore_intrs(void)
{
	int i;

	out_le32(&pmac_irq_hw[0]->enable, 0);
	if (max_real_irqs > 32)
		out_le32(&pmac_irq_hw[1]->enable, 0);
	mb();
	for (i = 0; i < max_real_irqs; ++i)
		if (test_bit(i, sleep_save_mask))
			pmac_unmask_irq(i);
}
#endif /* CONFIG_PMAC_PBOOK */
/*
 * BK Id: SCCS/s.sleep.S 1.18 12/02/01 12:38:54 benh
 */
/*
 * This file contains sleep low-level functions for PowerBook G3.
 *    Copyright (C) 1999 Benjamin Herrenschmidt (benh@kernel.crashing.org)
 *    and Paul Mackerras (paulus@samba.org).
 *
 * This program is free software; you can redistribute it and/or
 * modify it under the terms of the GNU General Public License
 * as published by the Free Software Foundation; either version
 * 2 of the License, or (at your option) any later version.
 *
 */

#include "ppc_asm.tmpl"
#include <asm/processor.h>
#include <asm/page.h>
#include <asm/cputable.h>

#define MAGIC	0x4c617273	/* 'Lars' */

/*
 * Structure for storing CPU registers on the stack.
 */
#define SL_SP		0
#define SL_PC		4
#define SL_MSR		8
#define SL_SDR1		0xc
#define SL_SPRG0	0x10	/* 4 sprg's */
#define SL_DBAT0	0x20
#define SL_IBAT0	0x28
#define SL_DBAT1	0x30
#define SL_IBAT1	0x38
#define SL_DBAT2	0x40
#define SL_IBAT2	0x48
#define SL_DBAT3	0x50
#define SL_IBAT3	0x58
#define SL_TB		0x60
#define SL_HID0		0x68
#define SL_HID1		0x6c
#define SL_MSSCR0	0x70
#define SL_MSSSR0	0x74
#define SL_ICTRL	0x78
#define SL_LDSTCR	0x7c
#define SL_LDSTDB	0x80
#define SL_R2		0x84
#define SL_CR		0x88
#define SL_R12		0x8c	/* r12 to r31 */
#define SL_SIZE		(SL_R12 + 80)

#define tophys(rd,rs)   addis   rd,rs,-KERNELBASE@h     
#define tovirt(rd,rs)	addis	rd,rs,KERNELBASE@h

	.text
	.align	5

/* This gets called by via-pmu.c late during the sleep process.
 * The PMU was already send the sleep command and will shut us down
 * soon. We need to save all that is needed and setup the wakeup
 * vector that will be called by the ROM on wakeup
 */
_GLOBAL(low_sleep_handler)
	mflr	r0
	stw	r0,4(r1)
	stwu	r1,-SL_SIZE(r1)
	mfcr	r0
	stw	r0,SL_CR(r1)
	stw	r2,SL_R2(r1)
	stmw	r12,SL_R12(r1)

	/* Save MSR & SDR1 */
	mfmsr	r4
	stw	r4,SL_MSR(r1)
	mfsdr1	r4
	stw	r4,SL_SDR1(r1)

	/* Get a stable timebase and save it */
1:	mftbu	r4
	stw	r4,SL_TB(r1)
	mftb	r5
	stw	r5,SL_TB+4(r1)
	mftbu	r3
	cmpw	r3,r4
	bne	1b
	
	/* Save SPRGs */
	mfsprg	r4,0
	stw	r4,SL_SPRG0(r1)
	mfsprg	r4,1
	stw	r4,SL_SPRG0+4(r1)
	mfsprg	r4,2
	stw	r4,SL_SPRG0+8(r1)
	mfsprg	r4,3
	stw	r4,SL_SPRG0+12(r1)

	/* Save BATs */
	mfdbatu	r4,0
	stw	r4,SL_DBAT0(r1)
	mfdbatl	r4,0
	stw	r4,SL_DBAT0+4(r1)
	mfdbatu	r4,1
	stw	r4,SL_DBAT1(r1)
	mfdbatl	r4,1
	stw	r4,SL_DBAT1+4(r1)
	mfdbatu	r4,2
	stw	r4,SL_DBAT2(r1)
	mfdbatl	r4,2
	stw	r4,SL_DBAT2+4(r1)
	mfdbatu	r4,3
	stw	r4,SL_DBAT3(r1)
	mfdbatl	r4,3
	stw	r4,SL_DBAT3+4(r1)
	mfibatu	r4,0
	stw	r4,SL_IBAT0(r1)
	mfibatl	r4,0
	stw	r4,SL_IBAT0+4(r1)
	mfibatu	r4,1
	stw	r4,SL_IBAT1(r1)
	mfibatl	r4,1
	stw	r4,SL_IBAT1+4(r1)
	mfibatu	r4,2
	stw	r4,SL_IBAT2(r1)
	mfibatl	r4,2
	stw	r4,SL_IBAT2+4(r1)
	mfibatu	r4,3
	stw	r4,SL_IBAT3(r1)
	mfibatl	r4,3
	stw	r4,SL_IBAT3+4(r1)

	/* Save HID0 */
	mfspr	r4,HID0
	stw	r4,SL_HID0(r1)

	/* Save 7400/7410/7450 specific registers */
	mfspr	r3,PVR
	srwi	r3,r3,16
	cmpli	cr0,r3,0x8000
	cmpli	cr1,r3,0x000c
	cmpli	cr2,r3,0x800c
	cror	4*cr1+eq,4*cr1+eq,4*cr2+eq
	cror	4*cr0+eq,4*cr0+eq,4*cr1+eq
	bne	1f
	mfspr	r4,SPRN_MSSCR0
	stw	r4,SL_MSSCR0(r1)
	mfspr	r4,SPRN_MSSSR0
	stw	r4,SL_MSSSR0(r1)
	/* Save 7450 specific registers */
	beq	cr1,1f
	mfspr	r4,HID1
	stw	r4,SL_HID1(r1)
	mfspr	r4,SPRN_ICTRL
	stw	r4,SL_ICTRL(r1)
	mfspr	r4,SPRN_LDSTCR
	stw	r4,SL_LDSTCR(r1)
	mfspr	r4,SPRN_LDSTDB
	stw	r4,SL_LDSTDB(r1)
1:
	/* The ROM can wake us up via 2 different vectors:
	 *  - On wallstreet & lombard, we must write a magic
	 *    value 'Lars' at address 4 and a pointer to a
	 *    memory location containing the PC to resume from
	 *    at address 0.
	 *  - On Core99, we must store the wakeup vector at
	 *    address 0x80 and eventually it's parameters
	 *    at address 0x84. I've have some trouble with those
	 *    parameters however and I no longer use them.
	 */
	lis	r5,grackle_wake_up@ha
	addi	r5,r5,grackle_wake_up@l
	tophys(r5,r5)
	stw	r5,SL_PC(r1)
	lis	r4,KERNELBASE@h
	tophys(r5,r1)
	addi	r5,r5,SL_PC
	lis	r6,MAGIC@ha
	addi	r6,r6,MAGIC@l
	stw	r5,0(r4)
	stw	r6,4(r4)
	/* Setup stuffs at 0x80-0x84 for Core99 */
	lis	r3,core99_wake_up@ha
	addi	r3,r3,core99_wake_up@l
	tophys(r3,r3)
	stw	r3,0x80(r4)
	stw	r5,0x84(r4)
	/* Store a pointer to our backup storage into
	 * a kernel global
	 */
	lis r3,sleep_storage@ha
	addi r3,r3,sleep_storage@l
	stw r5,0(r3)


/*
 * Flush the L1 data cache by reading the first 128kB of RAM
 * and then flushing the same area with the dcbf instruction.
 * The L2 cache has already been disabled.
 */
	li	r4,0x1000	/* 128kB / 32B */
	mtctr	r4
	lis	r4,KERNELBASE@h
1:
	lwz	r0,0(r4)
	addi	r4,r4,0x0020	/* Go to start of next cache line */
	bdnz	1b
	sync
	
	li	r4,0x1000	/* 128kB / 32B */
	mtctr	r4
	lis	r4,KERNELBASE@h
1:
	dcbf	r0,r4
	addi	r4,r4,0x0020	/* Go to start of next cache line */
	bdnz	1b
	sync

/*
 * Set the HID0 and MSR for sleep.
 */
	mfspr	r2,HID0
	rlwinm	r2,r2,0,10,7	/* clear doze, nap */
	oris	r2,r2,HID0_SLEEP@h
	sync
	mtspr	HID0,r2
	sync

/* This loop puts us back to sleep in case we have a spurrious
 * wakeup so that the host bridge properly stays asleep. The
 * CPU will be turned off, either after a known time (about 1
 * second) on wallstreet & lombard, or as soon as the CPU enters
 * SLEEP mode on core99
 */
	mfmsr	r2
	oris	r2,r2,MSR_POW@h
1:	sync
	mtmsr	r2
	isync
	b	1b

/* 
 * Here is the resume code.
 */


/*
 * Core99 machines resume here
 * r4 has the physical address of SL_PC(sp) (unused)
 */
_GLOBAL(core99_wake_up)
	/* Make sure HID0 no longer contains any sleep bit */
	mfspr	r3,HID0
	rlwinm	r3,r3,0,11,7		/* clear SLEEP, NAP, DOZE bits */
	mtspr	HID0,r3
	sync
	isync

	/* Won't that cause problems on CPU that doesn't support it ? */
	lis	r3, 0
	mtspr	SPRN_MMCR0, r3
	
	/* sanitize MSR */
	mfmsr	r3
	ori	r3,r3,MSR_EE|MSR_IP
	xori	r3,r3,MSR_EE|MSR_IP
	sync
	isync
	mtmsr	r3
	sync
	isync

	/* Recover sleep storage */
	lis	r3,sleep_storage@ha
	addi	r3,r3,sleep_storage@l
	tophys(r3,r3)
	lwz	r1,0(r3)

	/* Pass thru to older resume code ... */
/* 
 * Here is the resume code for older machines.
 * r1 has the physical address of SL_PC(sp).
 */
	
grackle_wake_up:
	/* Enable and then Flash inval the instruction & data cache */
	mfspr	r3,HID0
	ori	r3,r3, HID0_ICE|HID0_ICFI|HID0_DCE|HID0_DCI
	sync
	isync
	mtspr	HID0,r3
	xori	r3,r3, HID0_ICFI|HID0_DCI
	mtspr	HID0,r3
	sync
	
	/* Restore the kernel's segment registers before
	 * we do any r1 memory access as we are not sure they
	 * are in a sane state above the first 256Mb region
	 */
	li	r0,16		/* load up segment register values */
	mtctr	r0		/* for context 0 */
	lis	r3,0x2000	/* Ku = 1, VSID = 0 */
	li	r4,0
3:	mtsrin	r3,r4
	addi	r3,r3,0x111	/* increment VSID */
	addis	r4,r4,0x1000	/* address of next segment */
	bdnz	3b
	
	/* Restore the remaining bits of the HID0 register. */
	subi	r1,r1,SL_PC
	lwz	r3,SL_HID0(r1)
	sync
	isync
	mtspr	HID0,r3
	sync
	isync

	/* Restore 7400/7410/7450 specific registers */
	mfspr	r3,PVR
	srwi	r3,r3,16
	cmpli	cr0,r3,0x8000
	cmpli	cr1,r3,0x000c
	cmpli	cr2,r3,0x800c
	cror	4*cr1+eq,4*cr1+eq,4*cr2+eq
	cror	4*cr0+eq,4*cr0+eq,4*cr1+eq
	bne	1f
	lwz	r4,SL_MSSCR0(r1)
	sync
	mtspr	SPRN_MSSCR0,r4
	sync
	isync
	lwz	r4,SL_MSSSR0(r1)
	sync
	mtspr	SPRN_MSSSR0,r4
	sync
	isync
	bne	cr2,1f
	li	r4,0
	mtspr	SPRN_L2CR2,r4
	/* Restore 7450 specific registers */
	beq	cr1,1f
	lwz	r4,SL_HID1(r1)
	sync
	mtspr	HID1,r4
	isync
	sync
	lwz	r4,SPRN_ICTRL(r1)
	sync
	mtspr	SPRN_ICTRL,r4
	isync
	sync
	lwz	r4,SPRN_LDSTCR(r1)
	sync
	mtspr	SPRN_LDSTCR,r4
	isync
	sync
	lwz	r4,SL_LDSTDB(r1)
	sync
	mtspr	SPRN_LDSTDB,r4
	isync
	sync
1:
	/* Restore the BATs, and SDR1.  Then we can turn on the MMU. */
	lwz	r4,SL_SDR1(r1)
	mtsdr1	r4
	lwz	r4,SL_SPRG0(r1)
	mtsprg	0,r4
	lwz	r4,SL_SPRG0+4(r1)
	mtsprg	1,r4
	lwz	r4,SL_SPRG0+8(r1)
	mtsprg	2,r4
	lwz	r4,SL_SPRG0+12(r1)
	mtsprg	3,r4

	lwz	r4,SL_DBAT0(r1)
	mtdbatu	0,r4
	lwz	r4,SL_DBAT0+4(r1)
	mtdbatl	0,r4
	lwz	r4,SL_DBAT1(r1)
	mtdbatu	1,r4
	lwz	r4,SL_DBAT1+4(r1)
	mtdbatl	1,r4
	lwz	r4,SL_DBAT2(r1)
	mtdbatu	2,r4
	lwz	r4,SL_DBAT2+4(r1)
	mtdbatl	2,r4
	lwz	r4,SL_DBAT3(r1)
	mtdbatu	3,r4
	lwz	r4,SL_DBAT3+4(r1)
	mtdbatl	3,r4
	lwz	r4,SL_IBAT0(r1)
	mtibatu	0,r4
	lwz	r4,SL_IBAT0+4(r1)
	mtibatl	0,r4
	lwz	r4,SL_IBAT1(r1)
	mtibatu	1,r4
	lwz	r4,SL_IBAT1+4(r1)
	mtibatl	1,r4
	lwz	r4,SL_IBAT2(r1)
	mtibatu	2,r4
	lwz	r4,SL_IBAT2+4(r1)
	mtibatl	2,r4
	lwz	r4,SL_IBAT3(r1)
	mtibatu	3,r4
	lwz	r4,SL_IBAT3+4(r1)
	mtibatl	3,r4

	/* Flush all TLBs */
	lis	r4,0x1000
1:	addic.	r4,r4,-0x1000
	tlbie	r4
	blt	1b
	sync

	/* restore the MSR and turn on the MMU */
	lwz	r3,SL_MSR(r1)
	bl	turn_on_mmu	

	/* get back the stack pointer */
	tovirt(r1,r1)

	/* Restore TB */
	li	r3,0
	mttbl	r3
	lwz	r3,SL_TB(r1)
	lwz	r4,SL_TB+4(r1)
	mttbu	r3
	mttbl	r4

	/* Restore the callee-saved registers and return */
	lwz	r0,SL_CR(r1)
	mtcr	r0
	lwz	r2,SL_R2(r1)
	lmw	r12,SL_R12(r1)
	addi	r1,r1,SL_SIZE
	lwz	r0,4(r1)
	mtlr	r0
	blr

turn_on_mmu:
	mflr	r4
	tovirt(r4,r4)
	mtsrr0	r4
	mtsrr1	r3
	sync
	isync
	rfi

	.data
	.globl sleep_storage
sleep_storage:
	.long 0
/*
 * BK Id: SCCS/s.open_pic.c 1.33 12/19/01 09:45:54 trini
 */
/*
 *  arch/ppc/kernel/open_pic.c -- OpenPIC Interrupt Handling
 *
 *  Copyright (C) 1997 Geert Uytterhoeven
 *
 *  This file is subject to the terms and conditions of the GNU General Public
 *  License.  See the file COPYING in the main directory of this archive
 *  for more details.
 */

#include <linux/config.h>
#include <linux/types.h>
#include <linux/kernel.h>
#include <linux/sched.h>
#include <linux/init.h>
#include <linux/irq.h>
#include <linux/init.h>
#include <asm/ptrace.h>
#include <asm/signal.h>
#include <asm/io.h>
#include <asm/irq.h>
#include <asm/prom.h>
#include <asm/sections.h>

#include "local_irq.h"
#include "open_pic.h"
#include "open_pic_defs.h"
#include "i8259.h"

void* OpenPIC_Addr;
static volatile struct OpenPIC *OpenPIC = NULL;
u_int OpenPIC_NumInitSenses __initdata = 0;
u_char *OpenPIC_InitSenses __initdata = NULL;
extern int use_of_interrupt_tree;

void find_ISUs(void);

static u_int NumProcessors;
static u_int NumSources;
#ifdef CONFIG_POWER3
static int NumISUs;
#endif
static int open_pic_irq_offset;
static volatile unsigned char* chrp_int_ack_special;

OpenPIC_SourcePtr ISU[OPENPIC_MAX_ISU];

/* Global Operations */
static void openpic_disable_8259_pass_through(void);
static void openpic_set_priority(u_int pri);
static void openpic_set_spurious(u_int vector);

#ifdef CONFIG_SMP
/* Interprocessor Interrupts */
static void openpic_initipi(u_int ipi, u_int pri, u_int vector);
static void openpic_ipi_action(int cpl, void *dev_id, struct pt_regs *regs);
#endif

/* Timer Interrupts */
static void openpic_inittimer(u_int timer, u_int pri, u_int vector);
static void openpic_maptimer(u_int timer, u_int cpumask);

/* Interrupt Sources */
static void openpic_enable_irq(u_int irq);
static void openpic_disable_irq(u_int irq);
static void openpic_initirq(u_int irq, u_int pri, u_int vector, int polarity,
			    int is_level);
static void openpic_mapirq(u_int irq, u_int cpumask);

/*
 * These functions are not used but the code is kept here
 * for completeness and future reference.
 */
static void openpic_reset(void);
#ifdef notused
static void openpic_enable_8259_pass_through(void);
static u_int openpic_get_priority(void);
static u_int openpic_get_spurious(void);
static void openpic_set_sense(u_int irq, int sense);
#endif /* notused */

/*
 * Description of the openpic for the higher-level irq code
 */
static void openpic_end_irq(unsigned int irq_nr);
static void openpic_ack_irq(unsigned int irq_nr);
static void openpic_set_affinity(unsigned int irq_nr, unsigned long cpumask);

struct hw_interrupt_type open_pic = {
	" OpenPIC  ",
	NULL,
	NULL,
	openpic_enable_irq,
	openpic_disable_irq,
	openpic_ack_irq,
	openpic_end_irq,
	openpic_set_affinity
};

#ifdef CONFIG_SMP
static void openpic_end_ipi(unsigned int irq_nr);
static void openpic_ack_ipi(unsigned int irq_nr);
static void openpic_enable_ipi(unsigned int irq_nr);
static void openpic_disable_ipi(unsigned int irq_nr);

struct hw_interrupt_type open_pic_ipi = {
	" OpenPIC  ",
	NULL,
	NULL,
	openpic_enable_ipi,
	openpic_disable_ipi,
	openpic_ack_ipi,
	openpic_end_ipi,
	0
};
#endif /* CONFIG_SMP */

/*
 *  Accesses to the current processor's openpic registers
 */
#ifdef CONFIG_SMP
#define THIS_CPU		Processor[cpu]
#define DECL_THIS_CPU		int cpu = smp_hw_index[smp_processor_id()]
#define CHECK_THIS_CPU		check_arg_cpu(cpu)
#else
#define THIS_CPU		Processor[0]
#define DECL_THIS_CPU
#define CHECK_THIS_CPU
#endif /* CONFIG_SMP */

#if 1
#define check_arg_ipi(ipi) \
    if (ipi < 0 || ipi >= OPENPIC_NUM_IPI) \
	printk("open_pic.c:%d: illegal ipi %d\n", __LINE__, ipi);
#define check_arg_timer(timer) \
    if (timer < 0 || timer >= OPENPIC_NUM_TIMERS) \
	printk("open_pic.c:%d: illegal timer %d\n", __LINE__, timer);
#define check_arg_vec(vec) \
    if (vec < 0 || vec >= OPENPIC_NUM_VECTORS) \
	printk("open_pic.c:%d: illegal vector %d\n", __LINE__, vec);
#define check_arg_pri(pri) \
    if (pri < 0 || pri >= OPENPIC_NUM_PRI) \
	printk("open_pic.c:%d: illegal priority %d\n", __LINE__, pri);
/*
 * Print out a backtrace if it's out of range, since if it's larger than NR_IRQ's
 * data has probably been corrupted and we're going to panic or deadlock later
 * anyway --Troy
 */
extern unsigned long* _get_SP(void);
#define check_arg_irq(irq) \
    if (irq < open_pic_irq_offset || irq >= (NumSources+open_pic_irq_offset)){ \
      printk("open_pic.c:%d: illegal irq %d\n", __LINE__, irq); \
      print_backtrace(_get_SP()); }
#define check_arg_cpu(cpu) \
    if (cpu < 0 || cpu >= NumProcessors){ \
	printk("open_pic.c:%d: illegal cpu %d\n", __LINE__, cpu); \
	print_backtrace(_get_SP()); }
#else
#define check_arg_ipi(ipi)	do {} while (0)
#define check_arg_timer(timer)	do {} while (0)
#define check_arg_vec(vec)	do {} while (0)
#define check_arg_pri(pri)	do {} while (0)
#define check_arg_irq(irq)	do {} while (0)
#define check_arg_cpu(cpu)	do {} while (0)
#endif

#ifdef CONFIG_POWER3
	#define GET_ISU(source)	ISU[(source) >> 4][(source) & 0xf]
#else
	#define GET_ISU(source)	ISU[0][(source)]
#endif

u_int openpic_read(volatile u_int *addr)
{
	u_int val;

	val = in_le32(addr);
	return val;
}

static inline void openpic_write(volatile u_int *addr, u_int val)
{
	out_le32(addr, val);
}

static inline u_int openpic_readfield(volatile u_int *addr, u_int mask)
{
	u_int val = openpic_read(addr);
	return val & mask;
}

inline void openpic_writefield(volatile u_int *addr, u_int mask,
			       u_int field)
{
	u_int val = openpic_read(addr);
	openpic_write(addr, (val & ~mask) | (field & mask));
}

static inline void openpic_clearfield(volatile u_int *addr, u_int mask)
{
	openpic_writefield(addr, mask, 0);
}

static inline void openpic_setfield(volatile u_int *addr, u_int mask)
{
	openpic_writefield(addr, mask, mask);
}

static void openpic_safe_writefield(volatile u_int *addr, u_int mask,
				    u_int field)
{
	openpic_setfield(addr, OPENPIC_MASK);
	while (openpic_read(addr) & OPENPIC_ACTIVITY);
	openpic_writefield(addr, mask | OPENPIC_MASK, field | OPENPIC_MASK);
}

#ifdef CONFIG_SMP
/* yes this is right ... bug, feature, you decide! -- tgall */
u_int openpic_read_IPI(volatile u_int* addr)
{
         u_int val = 0;
#ifdef CONFIG_POWER3
        val = in_be32(addr);
#else
        val = in_le32(addr);
#endif
        return val;
}

/* because of the power3 be / le above, this is needed */
inline void openpic_writefield_IPI(volatile u_int* addr, u_int mask, u_int field)
{
        u_int  val = openpic_read_IPI(addr);
        openpic_write(addr, (val & ~mask) | (field & mask));
}

static inline void openpic_clearfield_IPI(volatile u_int *addr, u_int mask)
{
        openpic_writefield_IPI(addr, mask, 0);
}

static inline void openpic_setfield_IPI(volatile u_int *addr, u_int mask)
{
        openpic_writefield_IPI(addr, mask, mask);
}

static void openpic_safe_writefield_IPI(volatile u_int *addr, u_int mask, u_int field)
{
        openpic_setfield_IPI(addr, OPENPIC_MASK);

        /* wait until it's not in use */
        /* BenH: Is this code really enough ? I would rather check the result
         *       and eventually retry ...
         */
        while(openpic_read_IPI(addr) & OPENPIC_ACTIVITY);

        openpic_writefield_IPI(addr, mask | OPENPIC_MASK, field | OPENPIC_MASK);
}
#endif /* CONFIG_SMP */

void __init openpic_init(int main_pic, int offset, unsigned char* chrp_ack,
			 int programmer_switch_irq)
{
	u_int t, i;
	u_int timerfreq;
	const char *version;

	if (!OpenPIC_Addr) {
		printk("No OpenPIC found !\n");
		return;
	}
	OpenPIC = (volatile struct OpenPIC *)OpenPIC_Addr;

	if ( ppc_md.progress ) ppc_md.progress("openpic enter",0x122);

	t = openpic_read(&OpenPIC->Global.Feature_Reporting0);
	switch (t & OPENPIC_FEATURE_VERSION_MASK) {
	case 1:
		version = "1.0";
		break;
	case 2:
		version = "1.2";
		break;
	case 3:
		version = "1.3";
		break;
	default:
		version = "?";
		break;
	}
	NumProcessors = ((t & OPENPIC_FEATURE_LAST_PROCESSOR_MASK) >>
			 OPENPIC_FEATURE_LAST_PROCESSOR_SHIFT) + 1;
	NumSources = ((t & OPENPIC_FEATURE_LAST_SOURCE_MASK) >>
		      OPENPIC_FEATURE_LAST_SOURCE_SHIFT) + 1;
	printk("OpenPIC Version %s (%d CPUs and %d IRQ sources) at %p\n",
	       version, NumProcessors, NumSources, OpenPIC);
	timerfreq = openpic_read(&OpenPIC->Global.Timer_Frequency);
	if (timerfreq)
		printk("OpenPIC timer frequency is %d.%06d MHz\n",
		       timerfreq / 1000000, timerfreq % 1000000);

	if (!main_pic)
		return;

	open_pic_irq_offset = offset;
	chrp_int_ack_special = (volatile unsigned char*)chrp_ack;

	/* Initialize timer interrupts */
	if ( ppc_md.progress ) ppc_md.progress("openpic timer",0x3ba);
	for (i = 0; i < OPENPIC_NUM_TIMERS; i++) {
		/* Disabled, Priority 0 */
		openpic_inittimer(i, 0, OPENPIC_VEC_TIMER+i+offset);
		/* No processor */
		openpic_maptimer(i, 0);
	}

#ifdef CONFIG_SMP
	/* Initialize IPI interrupts */
	if ( ppc_md.progress ) ppc_md.progress("openpic ipi",0x3bb);
	for (i = 0; i < OPENPIC_NUM_IPI; i++) {
		/* Disabled, Priority 10..13 */
		openpic_initipi(i, 10+i, OPENPIC_VEC_IPI+i+offset);
		/* IPIs are per-CPU */
		irq_desc[OPENPIC_VEC_IPI+i+offset].status |= IRQ_PER_CPU;
		irq_desc[OPENPIC_VEC_IPI+i+offset].handler = &open_pic_ipi;
	}
#endif

	find_ISUs();

	/* Initialize external interrupts */
	if (ppc_md.progress) ppc_md.progress("openpic ext",0x3bc);

	openpic_set_priority(0xf);

	/* SIOint (8259 cascade) is special */
	if (offset) {
		openpic_initirq(0, 8, offset, 1, 1);
		openpic_mapirq(0, 1<<0);
	}

	/* Init all external sources */
	for (i = 1; i < NumSources; i++) {
		int pri, sense;

		/* the bootloader may have left it enabled (bad !) */
		openpic_disable_irq(i+offset);

		pri = (i == programmer_switch_irq)? 9: 8;
		sense = (i < OpenPIC_NumInitSenses)? OpenPIC_InitSenses[i]: 1;
		if (sense)
			irq_desc[i+offset].status = IRQ_LEVEL;

		/* Enabled, Priority 8 or 9 */
		openpic_initirq(i, pri, i+offset, !sense, sense);
		/* Processor 0 */
		openpic_mapirq(i, 1<<0);
	}

	/* Init descriptors */
	for (i = offset; i < NumSources + offset; i++)
		irq_desc[i].handler = &open_pic;

	/* Initialize the spurious interrupt */
	if (ppc_md.progress) ppc_md.progress("openpic spurious",0x3bd);
	openpic_set_spurious(OPENPIC_VEC_SPURIOUS+offset);

	/* Initialize the cascade */
	if (offset) {
		if (request_irq(offset, no_action, SA_INTERRUPT,
				"82c59 cascade", NULL))
			printk("Unable to get OpenPIC IRQ 0 for cascade\n");
	}
	openpic_set_priority(0);
	openpic_disable_8259_pass_through();

	if (ppc_md.progress) ppc_md.progress("openpic exit",0x222);
}

#ifdef CONFIG_POWER3
void openpic_setup_ISU(int isu_num, unsigned long addr)
{
	if (isu_num >= OPENPIC_MAX_ISU)
		return;
	ISU[isu_num] = (OpenPIC_SourcePtr) ioremap(addr, 0x400);
	if (isu_num >= NumISUs)
		NumISUs = isu_num + 1;
}
#endif

void find_ISUs(void)
{
#ifdef CONFIG_POWER3
        /* Use /interrupt-controller/reg and
         * /interrupt-controller/interrupt-ranges from OF device tree
	 * the ISU array is setup in chrp_pci.c in ibm_add_bridges
	 * as a result
	 * -- tgall
         */

	/* basically each ISU is a bus, and this assumes that
	 * open_pic_isu_count interrupts per bus are possible 
	 * ISU == Interrupt Source
	 */
	NumSources = NumISUs * 0x10;

#else
	/* for non-distributed OpenPIC implementations it's in the IDU -- Cort */
	ISU[0] = (OpenPIC_Source *)OpenPIC->Source;
#endif
}

static void openpic_reset(void)
{
	openpic_setfield(&OpenPIC->Global.Global_Configuration0,
			 OPENPIC_CONFIG_RESET);
	while (openpic_readfield(&OpenPIC->Global.Global_Configuration0,
				 OPENPIC_CONFIG_RESET))
		mb();
}

#ifdef notused
static void openpic_enable_8259_pass_through(void)
{
	openpic_clearfield(&OpenPIC->Global.Global_Configuration0,
			   OPENPIC_CONFIG_8259_PASSTHROUGH_DISABLE);
}
#endif /* notused */

static void openpic_disable_8259_pass_through(void)
{
	openpic_setfield(&OpenPIC->Global.Global_Configuration0,
			 OPENPIC_CONFIG_8259_PASSTHROUGH_DISABLE);
}

/*
 *  Find out the current interrupt
 */
u_int openpic_irq(void)
{
	u_int vec;
	DECL_THIS_CPU;

	CHECK_THIS_CPU;
	vec = openpic_readfield(&OpenPIC->THIS_CPU.Interrupt_Acknowledge,
				OPENPIC_VECTOR_MASK);
	return vec;
}

void openpic_eoi(void)
{
	DECL_THIS_CPU;

	CHECK_THIS_CPU;
	openpic_write(&OpenPIC->THIS_CPU.EOI, 0);
	/* Handle PCI write posting */
	(void)openpic_read(&OpenPIC->THIS_CPU.EOI);
}

#ifdef notused
static u_int openpic_get_priority(void)
{
	DECL_THIS_CPU;

	CHECK_THIS_CPU;
	return openpic_readfield(&OpenPIC->THIS_CPU.Current_Task_Priority,
				 OPENPIC_CURRENT_TASK_PRIORITY_MASK);
}
#endif /* notused */

static void openpic_set_priority(u_int pri)
{
	DECL_THIS_CPU;

	CHECK_THIS_CPU;
	check_arg_pri(pri);
	openpic_writefield(&OpenPIC->THIS_CPU.Current_Task_Priority,
			   OPENPIC_CURRENT_TASK_PRIORITY_MASK, pri);
}

/*
 *  Get/set the spurious vector
 */
#ifdef notused
static u_int openpic_get_spurious(void)
{
	return openpic_readfield(&OpenPIC->Global.Spurious_Vector,
				 OPENPIC_VECTOR_MASK);
}
#endif /* notused */

static void openpic_set_spurious(u_int vec)
{
	check_arg_vec(vec);
	openpic_writefield(&OpenPIC->Global.Spurious_Vector, OPENPIC_VECTOR_MASK,
			   vec);
}

#ifdef CONFIG_SMP
/*
 * Convert a cpu mask from logical to physical cpu numbers.
 */
static inline u32 physmask(u32 cpumask)
{
	int i;
	u32 mask = 0;

	for (i = 0; i < smp_num_cpus; ++i, cpumask >>= 1)
		mask |= (cpumask & 1) << smp_hw_index[i];
	return mask;
}
#else
#define physmask(cpumask)	(cpumask)
#endif

void openpic_reset_processor_phys(u_int mask)
{
	openpic_write(&OpenPIC->Global.Processor_Initialization, mask);
}

static spinlock_t openpic_setup_lock = SPIN_LOCK_UNLOCKED;

#ifdef CONFIG_SMP
/*
 *  Initialize an interprocessor interrupt (and disable it)
 *
 *  ipi: OpenPIC interprocessor interrupt number
 *  pri: interrupt source priority
 *  vec: the vector it will produce
 */
static void __init openpic_initipi(u_int ipi, u_int pri, u_int vec)
{
	check_arg_ipi(ipi);
	check_arg_pri(pri);
	check_arg_vec(vec);
	openpic_safe_writefield_IPI(&OpenPIC->Global.IPI_Vector_Priority(ipi),
				OPENPIC_PRIORITY_MASK | OPENPIC_VECTOR_MASK,
				(pri << OPENPIC_PRIORITY_SHIFT) | vec);
}

/*
 *  Send an IPI to one or more CPUs
 *  
 *  Externally called, however, it takes an IPI number (0...OPENPIC_NUM_IPI)
 *  and not a system-wide interrupt number
 */
void openpic_cause_IPI(u_int ipi, u_int cpumask)
{
	DECL_THIS_CPU;

	CHECK_THIS_CPU;
	check_arg_ipi(ipi);
	openpic_write(&OpenPIC->THIS_CPU.IPI_Dispatch(ipi),
		      physmask(cpumask));
}

void openpic_request_IPIs(void)
{
	int i;
	
	/*
	 * Make sure this matches what is defined in smp.c for 
	 * smp_message_{pass|recv}() or what shows up in 
	 * /proc/interrupts will be wrong!!! --Troy */
	
	if (OpenPIC == NULL)
		return;

	request_irq(OPENPIC_VEC_IPI+open_pic_irq_offset,
		    openpic_ipi_action, 0, "IPI0 (call function)", 0);
	request_irq(OPENPIC_VEC_IPI+open_pic_irq_offset+1,
		    openpic_ipi_action, 0, "IPI1 (reschedule)", 0);
	request_irq(OPENPIC_VEC_IPI+open_pic_irq_offset+2,
		    openpic_ipi_action, 0, "IPI2 (invalidate tlb)", 0);
	request_irq(OPENPIC_VEC_IPI+open_pic_irq_offset+3,
		    openpic_ipi_action, 0, "IPI3 (xmon break)", 0);

	for ( i = 0; i < OPENPIC_NUM_IPI ; i++ )
		openpic_enable_ipi(OPENPIC_VEC_IPI+open_pic_irq_offset+i);
}

/*
 * Do per-cpu setup for SMP systems.
 *
 * Get IPI's working and start taking interrupts.
 *   -- Cort
 */

void __init do_openpic_setup_cpu(void)
{
 	int i;
	u32 msk = 1 << smp_hw_index[smp_processor_id()];

	spin_lock(&openpic_setup_lock);

#ifdef CONFIG_IRQ_ALL_CPUS
 	/* let the openpic know we want intrs. default affinity
 	 * is 0xffffffff until changed via /proc
 	 * That's how it's done on x86. If we want it differently, then
 	 * we should make sure we also change the default values of irq_affinity
 	 * in irq.c.
 	 */
 	for (i = 0; i < NumSources ; i++)
		openpic_mapirq(i, openpic_read(&GET_ISU(i).Destination) | msk);
#endif /* CONFIG_IRQ_ALL_CPUS */
 	openpic_set_priority(0);

	spin_unlock(&openpic_setup_lock);
}
#endif /* CONFIG_SMP */

/*
 *  Initialize a timer interrupt (and disable it)
 *
 *  timer: OpenPIC timer number
 *  pri: interrupt source priority
 *  vec: the vector it will produce
 */
static void __init openpic_inittimer(u_int timer, u_int pri, u_int vec)
{
	check_arg_timer(timer);
	check_arg_pri(pri);
	check_arg_vec(vec);
	openpic_safe_writefield(&OpenPIC->Global.Timer[timer].Vector_Priority,
				OPENPIC_PRIORITY_MASK | OPENPIC_VECTOR_MASK,
				(pri << OPENPIC_PRIORITY_SHIFT) | vec);
}

/*
 *  Map a timer interrupt to one or more CPUs
 */
static void __init openpic_maptimer(u_int timer, u_int cpumask)
{
	check_arg_timer(timer);
	openpic_write(&OpenPIC->Global.Timer[timer].Destination,
		      physmask(cpumask));
}


/*
 *
 * All functions below take an offset'ed irq argument
 *
 */


/*
 *  Enable/disable an external interrupt source
 *
 *  Externally called, irq is an offseted system-wide interrupt number
 */
static void openpic_enable_irq(u_int irq)
{
	check_arg_irq(irq);
	openpic_clearfield(&GET_ISU(irq - open_pic_irq_offset).Vector_Priority, OPENPIC_MASK);
	/* make sure mask gets to controller before we return to user */
	do {
		mb(); /* sync is probably useless here */
	} while(openpic_readfield(&GET_ISU(irq - open_pic_irq_offset).Vector_Priority,
			OPENPIC_MASK));
}

static void openpic_disable_irq(u_int irq)
{
	u32 vp;
	
	check_arg_irq(irq);
	openpic_setfield(&GET_ISU(irq - open_pic_irq_offset).Vector_Priority, OPENPIC_MASK);
	/* make sure mask gets to controller before we return to user */
	do {
		mb();  /* sync is probably useless here */
		vp = openpic_readfield(&GET_ISU(irq - open_pic_irq_offset).Vector_Priority,
    			OPENPIC_MASK | OPENPIC_ACTIVITY);
	} while((vp & OPENPIC_ACTIVITY) && !(vp & OPENPIC_MASK));
}

#ifdef CONFIG_SMP
/*
 *  Enable/disable an IPI interrupt source
 *  
 *  Externally called, irq is an offseted system-wide interrupt number
 */
void openpic_enable_ipi(u_int irq)
{
	irq -= (OPENPIC_VEC_IPI+open_pic_irq_offset);
	check_arg_ipi(irq);
	openpic_clearfield_IPI(&OpenPIC->Global.IPI_Vector_Priority(irq), OPENPIC_MASK);

}

void openpic_disable_ipi(u_int irq)
{
	irq -= (OPENPIC_VEC_IPI+open_pic_irq_offset);
	check_arg_ipi(irq);
	openpic_setfield_IPI(&OpenPIC->Global.IPI_Vector_Priority(irq), OPENPIC_MASK);
}
#endif

/*
 *  Initialize an interrupt source (and disable it!)
 *
 *  irq: OpenPIC interrupt number
 *  pri: interrupt source priority
 *  vec: the vector it will produce
 *  pol: polarity (1 for positive, 0 for negative)
 *  sense: 1 for level, 0 for edge
 */
static void openpic_initirq(u_int irq, u_int pri, u_int vec, int pol, int sense)
{
	openpic_safe_writefield(&GET_ISU(irq).Vector_Priority,
				OPENPIC_PRIORITY_MASK | OPENPIC_VECTOR_MASK |
				OPENPIC_SENSE_MASK | OPENPIC_POLARITY_MASK,
				(pri << OPENPIC_PRIORITY_SHIFT) | vec |
				(pol ? OPENPIC_POLARITY_POSITIVE :
			    		OPENPIC_POLARITY_NEGATIVE) |
				(sense ? OPENPIC_SENSE_LEVEL : OPENPIC_SENSE_EDGE));
}

/*
 *  Map an interrupt source to one or more CPUs
 */
static void openpic_mapirq(u_int irq, u_int physmask)
{
	openpic_write(&GET_ISU(irq).Destination, physmask);
}

#ifdef notused
/*
 *  Set the sense for an interrupt source (and disable it!)
 *
 *  sense: 1 for level, 0 for edge
 */
static void openpic_set_sense(u_int irq, int sense)
{
	openpic_safe_writefield(&GET_ISU(irq).Vector_Priority,
				OPENPIC_SENSE_LEVEL,
				(sense ? OPENPIC_SENSE_LEVEL : 0));
}
#endif /* notused */

/* No spinlocks, should not be necessary with the OpenPIC
 * (1 register = 1 interrupt and we have the desc lock).
 */
static void openpic_ack_irq(unsigned int irq_nr)
{
	openpic_disable_irq(irq_nr);
	openpic_eoi();
}

static void openpic_end_irq(unsigned int irq_nr)
{
	if (!(irq_desc[irq_nr].status & (IRQ_DISABLED|IRQ_INPROGRESS)))
		openpic_enable_irq(irq_nr);
}

static void openpic_set_affinity(unsigned int irq_nr, unsigned long cpumask)
{
	openpic_mapirq(irq_nr - open_pic_irq_offset, physmask(cpumask));
}

#ifdef CONFIG_SMP
static void openpic_ack_ipi(unsigned int irq_nr)
{
	openpic_eoi();
}

static void openpic_end_ipi(unsigned int irq_nr)
{
}

static void openpic_ipi_action(int cpl, void *dev_id, struct pt_regs *regs)
{
	smp_message_recv(cpl-OPENPIC_VEC_IPI-open_pic_irq_offset, regs);
}

#endif /* CONFIG_SMP */

/* This one may be merged with PReP and CHRP */
int
openpic_get_irq(struct pt_regs *regs)
{
/*
 * Clean up needed. -VAL
 */
	int irq = openpic_irq();

	/* Management of the cascade should be moved out of here */

	/* Yep - because openpic !=> i8259, for one thing. -VAL */
        if (open_pic_irq_offset && irq == open_pic_irq_offset)
        {
                /*
                 * This magic address generates a PCI IACK cycle.
                 */
		if ( chrp_int_ack_special )
			irq = *chrp_int_ack_special;
#ifndef CONFIG_GEMINI
		else
			irq = i8259_poll();
#endif
		openpic_eoi();
        }
	if (irq == OPENPIC_VEC_SPURIOUS + open_pic_irq_offset)
		irq = -1;
	return irq;
}

#ifdef CONFIG_SMP
void
smp_openpic_message_pass(int target, int msg, unsigned long data, int wait)
{
	/* make sure we're sending something that translates to an IPI */
	if (msg > 0x3) {
		printk("SMP %d: smp_message_pass: unknown msg %d\n",
		       smp_processor_id(), msg);
		return;
	}
	switch (target) {
	case MSG_ALL:
		openpic_cause_IPI(msg, 0xffffffff);
		break;
	case MSG_ALL_BUT_SELF:
		openpic_cause_IPI(msg,
				  0xffffffff & ~(1 << smp_processor_id()));
		break;
	default:
		openpic_cause_IPI(msg, 1<<target);
		break;
	}
}
#endif /* CONFIG_SMP */

#ifdef CONFIG_PMAC_PBOOK
static u32 save_ipi_vp[OPENPIC_NUM_IPI];
static u32 save_irq_src_vp[OPENPIC_MAX_SOURCES];
static u32 save_irq_src_dest[OPENPIC_MAX_SOURCES];
static u32 save_cpu_task_pri[OPENPIC_MAX_PROCESSORS];

void __pmac
openpic_sleep_save_intrs(void)
{
	int	i;
	unsigned long flags;
	
	spin_lock_irqsave(&openpic_setup_lock, flags);

	for (i=0; i<NumProcessors; i++) {
		save_cpu_task_pri[i] = openpic_read(&OpenPIC->Processor[i].Current_Task_Priority);
		openpic_writefield(&OpenPIC->Processor[i].Current_Task_Priority,
				   OPENPIC_CURRENT_TASK_PRIORITY_MASK, 0xf);
	}

	for (i=0; i<OPENPIC_NUM_IPI; i++)
		save_ipi_vp[i] = openpic_read(&OpenPIC->Global.IPI_Vector_Priority(i));
	for (i=0; i<NumSources; i++) {
		save_irq_src_vp[i] = openpic_read(&OpenPIC->Source[i].Vector_Priority)
			& ~OPENPIC_ACTIVITY;
		save_irq_src_dest[i] = openpic_read(&OpenPIC->Source[i].Destination);
	}
	spin_unlock_irqrestore(&openpic_setup_lock, flags);
}

void __pmac
openpic_sleep_restore_intrs(void)
{
	int		i;
	unsigned long	flags;

	spin_lock_irqsave(&openpic_setup_lock, flags);
	
	openpic_reset();

	for (i=0; i<OPENPIC_NUM_IPI; i++)
		openpic_write(&OpenPIC->Global.IPI_Vector_Priority(i), save_ipi_vp[i]);
	for (i=0; i<NumSources; i++) {
		openpic_write(&OpenPIC->Source[i].Vector_Priority, save_irq_src_vp[i]);
		openpic_write(&OpenPIC->Source[i].Destination, save_irq_src_dest[i]);
	}
	openpic_set_spurious(OPENPIC_VEC_SPURIOUS+open_pic_irq_offset);
	openpic_disable_8259_pass_through();
	for (i=0; i<NumProcessors; i++)
		openpic_write(&OpenPIC->Processor[i].Current_Task_Priority, save_cpu_task_pri[i]);

	spin_unlock_irqrestore(&openpic_setup_lock, flags);
}
#endif /* CONFIG_PMAC_PBOOK */
/*
 * BK Id: SCCS/s.i8259.c 1.11 12/19/01 09:45:54 trini
 */

#include <linux/stddef.h>
#include <linux/init.h>
#include <linux/irq.h>
#include <linux/ioport.h>
#include <linux/sched.h>
#include <linux/signal.h>
#include <asm/io.h>
#include "i8259.h"

static volatile char *pci_intack; /* RO, gives us the irq vector */

unsigned char cached_8259[2] = { 0xff, 0xff };
#define cached_A1 (cached_8259[0])
#define cached_21 (cached_8259[1])

static spinlock_t i8259_lock = SPIN_LOCK_UNLOCKED;

int i8259_pic_irq_offset;

/* Acknowledge the irq using the PCI host bridge's interrupt acknowledge
 * feature. (Polling is somehow broken on some IBM and Motorola PReP boxes.)
 */
int i8259_irq(void)
{
	int irq;

	spin_lock/*_irqsave*/(&i8259_lock/*, flags*/);

	irq = *pci_intack & 0xff;
	if (irq==7) {
		/*
		 * This may be a spurious interrupt.
		 *
		 * Read the interrupt status register (ISR). If the most
		 * significant bit is not set then there is no valid
		 * interrupt.
		 */
		if(~inb(0x20)&0x80) {
			irq = -1;
		}
	}
	spin_unlock/*_irqrestore*/(&i8259_lock/*, flags*/);
	return irq;
}

/* Poke the 8259's directly using poll commands. */
int i8259_poll(void)
{
	int irq;

	spin_lock/*_irqsave*/(&i8259_lock/*, flags*/);
	/*
	 * Perform an interrupt acknowledge cycle on controller 1
	 */
	outb(0x0C, 0x20); /* prepare for poll */
	irq = inb(0x20) & 7;
	if (irq == 2) {
		/*
		 * Interrupt is cascaded so perform interrupt
		 * acknowledge on controller 2
		 */
		outb(0x0C, 0xA0); /* prepare for poll */
		irq = (inb(0xA0) & 7) + 8;
	} else if (irq==7) {
		/*
		 * This may be a spurious interrupt
		 *
		 * Read the interrupt status register. If the most
		 * significant bit is not set then there is no valid
		 * interrupt
		 */
		outb(0x0b, 0x20);
		if(~inb(0x20)&0x80) {
			spin_unlock/*_irqrestore*/(&i8259_lock/*, flags*/);
			return -1;
		}
	}
	spin_unlock/*_irqrestore*/(&i8259_lock/*, flags*/);
	return irq;
}

static void i8259_mask_and_ack_irq(unsigned int irq_nr)
{
	unsigned long flags;

	spin_lock_irqsave(&i8259_lock, flags);
	if ( irq_nr >= i8259_pic_irq_offset )
		irq_nr -= i8259_pic_irq_offset;

	if (irq_nr > 7) {
		cached_A1 |= 1 << (irq_nr-8);
		inb(0xA1); /* DUMMY */
		outb(cached_A1,0xA1);
		outb(0x20,0xA0); /* Non-specific EOI */
		outb(0x20,0x20); /* Non-specific EOI to cascade */
	} else {
		cached_21 |= 1 << irq_nr;
		inb(0x21); /* DUMMY */
		outb(cached_21,0x21);
		outb(0x20,0x20); /* Non-specific EOI */
	}
	spin_unlock_irqrestore(&i8259_lock, flags);
}

static void i8259_set_irq_mask(int irq_nr)
{
	outb(cached_A1,0xA1);
	outb(cached_21,0x21);
}
 
static void i8259_mask_irq(unsigned int irq_nr)
{
	unsigned long flags;

	spin_lock_irqsave(&i8259_lock, flags);
	if ( irq_nr >= i8259_pic_irq_offset )
		irq_nr -= i8259_pic_irq_offset;
	if ( irq_nr < 8 )
		cached_21 |= 1 << irq_nr;
	else
		cached_A1 |= 1 << (irq_nr-8);
	i8259_set_irq_mask(irq_nr);
	spin_unlock_irqrestore(&i8259_lock, flags);
}

static void i8259_unmask_irq(unsigned int irq_nr)
{
	unsigned long flags;

	spin_lock_irqsave(&i8259_lock, flags);
	if ( irq_nr >= i8259_pic_irq_offset )
		irq_nr -= i8259_pic_irq_offset;
	if ( irq_nr < 8 )
		cached_21 &= ~(1 << irq_nr);
	else
		cached_A1 &= ~(1 << (irq_nr-8));
	i8259_set_irq_mask(irq_nr);
	spin_unlock_irqrestore(&i8259_lock, flags);
}

static void i8259_end_irq(unsigned int irq)
{
	if (!(irq_desc[irq].status & (IRQ_DISABLED|IRQ_INPROGRESS)))
		i8259_unmask_irq(irq);
}

struct hw_interrupt_type i8259_pic = {
	" i8259    ",
	NULL,
	NULL,
	i8259_unmask_irq,
	i8259_mask_irq,
	i8259_mask_and_ack_irq,
	i8259_end_irq,
	NULL
};

static struct resource pic1_iores = {
	"8259 (master)", 0x20, 0x21, IORESOURCE_BUSY
};

static struct resource pic2_iores = {
	"8259 (slave)", 0xa0, 0xa1, IORESOURCE_BUSY
};

static struct resource pic_edgectrl_iores = {
	"8259 edge control", 0x4d0, 0x4d1, IORESOURCE_BUSY
};

void __init i8259_init(long intack_addr)
{
	unsigned long flags;

	spin_lock_irqsave(&i8259_lock, flags);
	/* init master interrupt controller */
	outb(0x11, 0x20); /* Start init sequence */
	outb(0x00, 0x21); /* Vector base */
	outb(0x04, 0x21); /* edge tiggered, Cascade (slave) on IRQ2 */
	outb(0x01, 0x21); /* Select 8086 mode */

	/* init slave interrupt controller */
	outb(0x11, 0xA0); /* Start init sequence */
	outb(0x08, 0xA1); /* Vector base */
	outb(0x02, 0xA1); /* edge triggered, Cascade (slave) on IRQ2 */
	outb(0x01, 0xA1); /* Select 8086 mode */

	/* always read ISR */
	outb(0x0B, 0x20);
	outb(0x0B, 0xA0);

	/* Mask all interrupts */
	outb(cached_A1, 0xA1);
	outb(cached_21, 0x21);

	spin_unlock_irqrestore(&i8259_lock, flags);

	/* reserve our resources */
	request_irq( i8259_pic_irq_offset + 2, no_action, SA_INTERRUPT,
				"82c59 secondary cascade", NULL );
	request_resource(&ioport_resource, &pic1_iores);
	request_resource(&ioport_resource, &pic2_iores);
	request_resource(&ioport_resource, &pic_edgectrl_iores);

	if (intack_addr)
		pci_intack = ioremap(intack_addr, 1);
}
/*
 * BK Id: SCCS/s.i8259.h 1.8 12/19/01 09:45:54 trini
 */

#ifndef _PPC_KERNEL_i8259_H
#define _PPC_KERNEL_i8259_H

#include "local_irq.h"

extern struct hw_interrupt_type i8259_pic;

void i8259_init(long);
int i8259_irq(void);
int i8259_poll(void);

#endif /* _PPC_KERNEL_i8259_H */
/*
	L2CR functions
	Copyright � 1997-1998 by PowerLogix R & D, Inc.
	
	This program is free software; you can redistribute it and/or modify
	it under the terms of the GNU General Public License as published by
	the Free Software Foundation; either version 2 of the License, or
	(at your option) any later version.
	
	This program is distributed in the hope that it will be useful,
	but WITHOUT ANY WARRANTY; without even the implied warranty of
	MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
	GNU General Public License for more details.
	
	You should have received a copy of the GNU General Public License
	along with this program; if not, write to the Free Software
	Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
*/
/*
	Thur, Dec. 12, 1998.
	- First public release, contributed by PowerLogix.
	***********
	Sat, Aug. 7, 1999.
	- Terry: Made sure code disabled interrupts before running. (Previously
			it was assumed interrupts were already disabled).
	- Terry: Updated for tentative G4 support.  4MB of memory is now flushed
			instead of 2MB.  (Prob. only 3 is necessary).
	- Terry: Updated for workaround to HID0[DPM] processor bug
			during global invalidates.
	***********
	Thu, July 13, 2000.
	- Terry: Added isync to correct for an errata.

	22 August 2001.
	- DanM: Finally added the 7450 patch I've had for the past
		several months.  The L2CR is similar, but I'm going
		to assume the user of this functions knows what they
		are doing.
	
	Author:	Terry Greeniaus (tgree@phys.ualberta.ca)
	Please e-mail updates to this file to me, thanks!
*/
#include <asm/processor.h>
#include <asm/cputable.h>
#include "ppc_asm.h"

/* Usage:
	
	When setting the L2CR register, you must do a few special
	things.  If you are enabling the cache, you must perform a
	global invalidate.  If you are disabling the cache, you must
	flush the cache contents first.  This routine takes care of
	doing these things.  When first enabling the cache, make sure
	you pass in the L2CR you want, as well as passing in the
	global invalidate bit set.  A global invalidate will only be
	performed if the L2I bit is set in applyThis.  When enabling
	the cache, you should also set the L2E bit in applyThis.  If
	you want to modify the L2CR contents after the cache has been
	enabled, the recommended procedure is to first call
	__setL2CR(0) to disable the cache and then call it again with
	the new values for L2CR.  Examples:

	_setL2CR(0)		- disables the cache
	_setL2CR(0xB3A04000)	- enables my G3 upgrade card:
				- L2E set to turn on the cache
				- L2SIZ set to 1MB
				- L2CLK set to 1:1
				- L2RAM set to pipelined synchronous late-write
				- L2I set to perform a global invalidation
				- L2OH set to 0.5 nS
				- L2DF set because this upgrade card
				  requires it

	A similar call should work for your card.  You need to know
	the correct setting for your card and then place them in the
	fields I have outlined above.  Other fields support optional
	features, such as L2DO which caches only data, or L2TS which
	causes cache pushes from the L1 cache to go to the L2 cache
	instead of to main memory.

IMPORTANT:
	Starting with the 7450, the bits in this register have moved
	or behave differently.  The Enable, Parity Enable, Size,
	and L2 Invalidate are the only bits that have not moved.
	The size is read-only for these processors with internal L2
	cache, and the invalidate is a control as well as status.
		-- Dan

*/
/*
 * Summary: this procedure ignores the L2I bit in the value passed in,
 * flushes the cache if it was already enabled, always invalidates the
 * cache, then enables the cache if the L2E bit is set in the value
 * passed in.
 *   -- paulus.
 */
_GLOBAL(_set_L2CR)
	/* Make sure this is a 750 or 7400 chip */
BEGIN_FTR_SECTION
	li	r3,-1
	blr
END_FTR_SECTION_IFCLR(CPU_FTR_L2CR)

	/* Turn off interrupts and data relocation. */
	mfmsr	r7		/* Save MSR in r7 */
	rlwinm	r4,r7,0,17,15
	rlwinm	r4,r4,0,28,26	/* Turn off DR bit */
	sync
	mtmsr	r4
	isync

	/* Get the current enable bit of the L2CR into r4 */
	mfspr	r4,L2CR
	
	/* Tweak some bits */
	rlwinm	r5,r3,0,0,0		/* r5 contains the new enable bit */
	rlwinm	r3,r3,0,11,9		/* Turn off the invalidate bit */
	rlwinm	r3,r3,0,1,31		/* Turn off the enable bit */

	/* Check to see if we need to flush */
	rlwinm.	r4,r4,0,0,0
	beq	2f

	/* Flush the cache. First, read the first 4MB of memory (physical) to
	 * put new data in the cache.  (Actually we only need
	 * the size of the L2 cache plus the size of the L1 cache, but 4MB will
	 * cover everything just to be safe).
	 */
		
	 /**** Might be a good idea to set L2DO here - to prevent instructions
	       from getting into the cache.  But since we invalidate
	       the next time we enable the cache it doesn't really matter.
	       Don't do this unless you accomodate all processor variations.
	       The bit moved on the 7450.....
	  ****/

	lis	r4,0x0002
	mtctr	r4
	li	r4,0
1:
	lwzx	r0,r0,r4
	addi	r4,r4,32		/* Go to start of next cache line */
	bdnz	1b
	
	/* Now, flush the first 4MB of memory */
	lis	r4,0x0002
	mtctr	r4
	li	r4,0
	sync
1:
	dcbf	r0,r4
	addi	r4,r4,32		/* Go to start of next cache line */
	bdnz	1b

2:
	/* Set up the L2CR configuration bits (and switch L2 off) */
	sync
	mtspr	L2CR,r3
	sync

	/* Before we perform the global invalidation, we must disable dynamic
	 * power management via HID0[DPM] to work around a processor bug where
	 * DPM can possibly interfere with the state machine in the processor
	 * that invalidates the L2 cache tags.
	 */
	mfspr	r8,HID0			/* Save HID0 in r8 */
	rlwinm	r4,r8,0,12,10		/* Turn off HID0[DPM] */
	sync
	mtspr	HID0,r4			/* Disable DPM */
	sync

	/* Perform a global invalidation */
	oris	r3,r3,0x0020
	sync
	mtspr	L2CR,r3
	sync
	isync				/* For errata */

BEGIN_FTR_SECTION
	/* On the 7450, we wait for the L2I bit to clear......
	*/
10:	mfspr	r3,L2CR
	andis.	r4,r3,0x0020
	bne	10b
	b	11f
END_FTR_SECTION_IFSET(CPU_FTR_SPEC7450)

	/* Wait for the invalidation to complete */
3:	mfspr	r3,L2CR
	rlwinm.	r4,r3,0,31,31
	bne	3b
	
11:	rlwinm	r3,r3,0,11,9		/* Turn off the L2I bit */
	sync
	mtspr	L2CR,r3
	sync
	
	/* Restore HID0[DPM] to whatever it was before */
	sync
	mtspr	1008,r8
	sync

	/* See if we need to enable the cache */
	cmplwi	r5,0
	beq	4f

	/* Enable the cache */
	oris	r3,r3,0x8000
	mtspr	L2CR,r3
	sync

	/* Restore MSR (restores EE and DR bits to original state) */
4:	SYNC
	mtmsr	r7
	isync
	blr

_GLOBAL(_get_L2CR)
	/* Return the L2CR contents */
	li	r3,0
BEGIN_FTR_SECTION
	mfspr	r3,L2CR
END_FTR_SECTION_IFSET(CPU_FTR_L2CR)
	blr

/* --- End of PowerLogix code ---
 */
/*
 * BK Id: SCCS/s.indirect_pci.c 1.10 09/08/01 15:47:42 paulus
 */
/*
 * Support for indirect PCI bridges.
 *
 * Copyright (C) 1998 Gabriel Paubert.
 *
 * This program is free software; you can redistribute it and/or
 * modify it under the terms of the GNU General Public License
 * as published by the Free Software Foundation; either version
 * 2 of the License, or (at your option) any later version.
 */

#include <linux/kernel.h>
#include <linux/pci.h>
#include <linux/delay.h>
#include <linux/string.h>
#include <linux/init.h>
#include <linux/bootmem.h>

#include <asm/io.h>
#include <asm/prom.h>
#include <asm/pci-bridge.h>
#include <asm/machdep.h>

#include "pci.h"

#define cfg_read(val, addr, type, op)	*val = op((type)(addr))
#define cfg_write(val, addr, type, op)	op((type *)(addr), (val))

#define INDIRECT_PCI_OP(rw, size, type, op, mask)			 \
static int								 \
indirect_##rw##_config_##size(struct pci_dev *dev, int offset, type val) \
{									 \
	struct pci_controller *hose = dev->sysdata;			 \
									 \
	out_be32(hose->cfg_addr, 					 \
		 ((offset & 0xfc) << 24) | (dev->devfn << 16)		 \
		 | (dev->bus->number << 8) | 0x80);			 \
	cfg_##rw(val, hose->cfg_data + (offset & mask), type, op);	 \
	return PCIBIOS_SUCCESSFUL;    					 \
}

INDIRECT_PCI_OP(read, byte, u8 *, in_8, 3)
INDIRECT_PCI_OP(read, word, u16 *, in_le16, 2)
INDIRECT_PCI_OP(read, dword, u32 *, in_le32, 0)
INDIRECT_PCI_OP(write, byte, u8, out_8, 3)
INDIRECT_PCI_OP(write, word, u16, out_le16, 2)
INDIRECT_PCI_OP(write, dword, u32, out_le32, 0)

static struct pci_ops indirect_pci_ops =
{
	indirect_read_config_byte,
	indirect_read_config_word,
	indirect_read_config_dword,
	indirect_write_config_byte,
	indirect_write_config_word,
	indirect_write_config_dword
};

void __init
setup_indirect_pci(struct pci_controller* hose, u32 cfg_addr, u32 cfg_data)
{
	hose->ops = &indirect_pci_ops;
	hose->cfg_addr = (unsigned int *) ioremap(cfg_addr, 4);
	hose->cfg_data = (unsigned char *) ioremap(cfg_data, 4);
}

/*
 * BK Id: SCCS/s.local_irq.h 1.7 05/17/01 18:14:21 cort
 */

#ifndef _PPC_KERNEL_LOCAL_IRQ_H
#define _PPC_KERNEL_LOCAL_IRQ_H

#include <linux/kernel_stat.h>
#include <linux/interrupt.h>
#include <linux/cache.h>
#include <linux/spinlock.h>
#include <linux/irq.h>

void ppc_irq_dispatch_handler(struct pt_regs *regs, int irq);

#define NR_MASK_WORDS	((NR_IRQS + 31) / 32)

extern int ppc_spurious_interrupts;
extern int ppc_second_irq;
extern struct irqaction *ppc_irq_action[NR_IRQS];

#endif /* _PPC_KERNEL_LOCAL_IRQ_H */
/*
 * BK Id: SCCS/s.pmac_nvram.c 1.17 12/01/01 20:09:06 benh
 */
/*
 * Miscellaneous procedures for dealing with the PowerMac hardware.
 */
#include <linux/config.h>
#include <linux/module.h>
#include <linux/kernel.h>
#include <linux/stddef.h>
#include <linux/nvram.h>
#include <linux/init.h>
#include <linux/slab.h>
#include <linux/delay.h>
#include <asm/sections.h>
#include <asm/io.h>
#include <asm/system.h>
#include <asm/prom.h>
#include <asm/machdep.h>
#include <asm/nvram.h>
#include <linux/adb.h>
#include <linux/pmu.h>

#undef DEBUG

#define NVRAM_SIZE		0x2000	/* 8kB of non-volatile RAM */

#define CORE99_SIGNATURE	0x5a
#define CORE99_ADLER_START	0x14

/* Core99 nvram is a flash */
#define CORE99_FLASH_STATUS_DONE	0x80
#define CORE99_FLASH_STATUS_ERR		0x38
#define CORE99_FLASH_CMD_ERASE_CONFIRM	0xd0
#define CORE99_FLASH_CMD_ERASE_SETUP	0x20
#define CORE99_FLASH_CMD_RESET		0xff
#define CORE99_FLASH_CMD_WRITE_SETUP	0x40

/* CHRP NVRAM header */
struct chrp_header {
  u8		signature;
  u8		cksum;
  u16		len;
  char          name[12];
  u8		data[0];
};

struct core99_header {
  struct chrp_header	hdr;
  u32			adler;
  u32			generation;
  u32			reserved[2];
};

/*
 * Read and write the non-volatile RAM on PowerMacs and CHRP machines.
 */
static int nvram_naddrs;
static volatile unsigned char *nvram_addr;
static volatile unsigned char *nvram_data;
static int nvram_mult, is_core_99;
static int core99_bank = 0;
static int nvram_partitions[3];

/* FIXME: kmalloc fails to allocate the image now that I had to move it
 *        before time_init(). For now, I allocate a static buffer here
 *        but it's a waste of space on all but core99 machines
 */
#if 0
static char* nvram_image;
#else
static char nvram_image[NVRAM_SIZE] __pmacdata;
#endif

extern int pmac_newworld;

static u8 __openfirmware
chrp_checksum(struct chrp_header* hdr)
{
	u8 *ptr;
	u16 sum = hdr->signature;
	for (ptr = (u8 *)&hdr->len; ptr < hdr->data; ptr++)
		sum += *ptr;
	while (sum > 0xFF)
		sum = (sum & 0xFF) + (sum>>8);
	return sum;
}

static u32 __pmac
core99_calc_adler(u8 *buffer)
{
	int cnt;
	u32 low, high;

   	buffer += CORE99_ADLER_START;
	low = 1;
	high = 0;
	for (cnt=0; cnt<(NVRAM_SIZE-CORE99_ADLER_START); cnt++) {
		if ((cnt % 5000) == 0) {
			high  %= 65521UL;
			high %= 65521UL;
		}
		low += buffer[cnt];
		high += low;
	}
	low  %= 65521UL;
	high %= 65521UL;
  
	return (high << 16) | low;
}

static u32 __pmac
core99_check(u8* datas)
{
	struct core99_header* hdr99 = (struct core99_header*)datas;

	if (hdr99->hdr.signature != CORE99_SIGNATURE) {
#ifdef DEBUG
		printk("Invalid signature\n");
#endif		
		return 0;
	}
	if (hdr99->hdr.cksum != chrp_checksum(&hdr99->hdr)) {
#ifdef DEBUG
		printk("Invalid checksum\n");
#endif
		return 0;
	}
	if (hdr99->adler != core99_calc_adler(datas)) {
#ifdef DEBUG
		printk("Invalid adler\n");
#endif
		return 0;
	}
	return hdr99->generation;
}

static int __pmac
core99_erase_bank(int bank)
{
	int stat, i;
	
	u8* base = (u8 *)nvram_data + core99_bank*NVRAM_SIZE;
	
	out_8(base, CORE99_FLASH_CMD_ERASE_SETUP);
	out_8(base, CORE99_FLASH_CMD_ERASE_CONFIRM);
	do { stat = in_8(base); }
	while(!(stat & CORE99_FLASH_STATUS_DONE));
	out_8(base, CORE99_FLASH_CMD_RESET);
	if (stat & CORE99_FLASH_STATUS_ERR) {
		printk("nvram: flash error 0x%02x on erase !\n", stat);
		return -ENXIO;
	}
	for (i=0; i<NVRAM_SIZE; i++)
		if (base[i] != 0xff) {
			printk("nvram: flash erase failed !\n");
			return -ENXIO;
		}
	return 0;
}

static int __pmac
core99_write_bank(int bank, u8* datas)
{
	int i, stat = 0;
	
	u8* base = (u8 *)nvram_data + core99_bank*NVRAM_SIZE;
	
	for (i=0; i<NVRAM_SIZE; i++) {
		out_8(base+i, CORE99_FLASH_CMD_WRITE_SETUP);
		out_8(base+i, datas[i]);
		do { stat = in_8(base); }
		while(!(stat & CORE99_FLASH_STATUS_DONE));
		if (stat & CORE99_FLASH_STATUS_ERR)
			break;
	}
	out_8(base, CORE99_FLASH_CMD_RESET);
	if (stat & CORE99_FLASH_STATUS_ERR) {
		printk("nvram: flash error 0x%02x on write !\n", stat);
		return -ENXIO;
	}
	for (i=0; i<NVRAM_SIZE; i++)
		if (base[i] != datas[i]) {
			printk("nvram: flash write failed !\n");
			return -ENXIO;
		}
	return 0;	
}

static void __init
lookup_partitions(void)
{
	u8 buffer[17];
	int i, offset;
	struct chrp_header* hdr;

	if (pmac_newworld) {
		nvram_partitions[pmac_nvram_OF] = -1;
		nvram_partitions[pmac_nvram_XPRAM] = -1;
		nvram_partitions[pmac_nvram_NR] = -1;
		hdr = (struct chrp_header *)buffer;
	
		offset = 0;
		buffer[16] = 0;
		do {
			for (i=0;i<16;i++)
				buffer[i] = nvram_read_byte(offset+i);
			if (!strcmp(hdr->name, "common"))
				nvram_partitions[pmac_nvram_OF] = offset + 0x10;
			if (!strcmp(hdr->name, "APL,MacOS75")) {
				nvram_partitions[pmac_nvram_XPRAM] = offset + 0x10;
				nvram_partitions[pmac_nvram_NR] = offset + 0x110;
			}
			offset += (hdr->len * 0x10);
		} while(offset < NVRAM_SIZE);
	} else {
		nvram_partitions[pmac_nvram_OF] = 0x1800;
		nvram_partitions[pmac_nvram_XPRAM] = 0x1300;
		nvram_partitions[pmac_nvram_NR] = 0x1400;
	}	
#ifdef DEBUG
	printk("nvram: OF partition at 0x%x\n", nvram_partitions[pmac_nvram_OF]);
	printk("nvram: XP partition at 0x%x\n", nvram_partitions[pmac_nvram_XPRAM]);
	printk("nvram: NR partition at 0x%x\n", nvram_partitions[pmac_nvram_NR]);
#endif	
}

void __init
pmac_nvram_init(void)
{
	struct device_node *dp;

	nvram_naddrs = 0;

	dp = find_devices("nvram");
	if (dp == NULL) {
		printk(KERN_ERR "Can't find NVRAM device\n");
		return;
	}
	nvram_naddrs = dp->n_addrs;
	is_core_99 = device_is_compatible(dp, "nvram,flash");
	if (is_core_99) {
		int i;
		u32 gen_bank0, gen_bank1;
		
		if (nvram_naddrs < 1) {
			printk(KERN_ERR "nvram: no address\n");
			return;
		}
#if 0
		nvram_image = kmalloc(NVRAM_SIZE, GFP_KERNEL);
		if (!nvram_image) {
			printk(KERN_ERR "nvram: can't allocate image\n");
			return;
		}
#endif
		nvram_data = ioremap(dp->addrs[0].address, NVRAM_SIZE*2);
#ifdef DEBUG
		printk("nvram: Checking bank 0...\n");
#endif
		gen_bank0 = core99_check((u8 *)nvram_data);
		gen_bank1 = core99_check((u8 *)nvram_data + NVRAM_SIZE);
		core99_bank = (gen_bank0 < gen_bank1) ? 1 : 0;
#ifdef DEBUG
		printk("nvram: gen0=%d, gen1=%d\n", gen_bank0, gen_bank1);
		printk("nvram: Active bank is: %d\n", core99_bank);
#endif
		for (i=0; i<NVRAM_SIZE; i++)
			nvram_image[i] = nvram_data[i + core99_bank*NVRAM_SIZE];
	} else if (_machine == _MACH_chrp && nvram_naddrs == 1) {
		nvram_data = ioremap(dp->addrs[0].address + isa_mem_base,
				     dp->addrs[0].size);
		nvram_mult = 1;
	} else if (nvram_naddrs == 1) {
		nvram_data = ioremap(dp->addrs[0].address, dp->addrs[0].size);
		nvram_mult = (dp->addrs[0].size + NVRAM_SIZE - 1) / NVRAM_SIZE;
	} else if (nvram_naddrs == 2) {
		nvram_addr = ioremap(dp->addrs[0].address, dp->addrs[0].size);
		nvram_data = ioremap(dp->addrs[1].address, dp->addrs[1].size);
	} else if (nvram_naddrs == 0 && sys_ctrler == SYS_CTRLER_PMU) {
		nvram_naddrs = -1;
	} else {
		printk(KERN_ERR "Don't know how to access NVRAM with %d addresses\n",
		       nvram_naddrs);
	}
	lookup_partitions();
}

void __pmac
pmac_nvram_update(void)
{
	struct core99_header* hdr99;
	
	if (!is_core_99 || !nvram_data || !nvram_image)
		return;
	if (!memcmp(nvram_image, (u8*)nvram_data + core99_bank*NVRAM_SIZE,
		NVRAM_SIZE))
		return;
#ifdef DEBUG
	printk("Updating nvram...\n");
#endif
	hdr99 = (struct core99_header*)nvram_image;
	hdr99->generation++;
	hdr99->hdr.signature = CORE99_SIGNATURE;
	hdr99->hdr.cksum = chrp_checksum(&hdr99->hdr);
	hdr99->adler = core99_calc_adler(nvram_image);
	core99_bank = core99_bank ? 0 : 1;
	if (core99_erase_bank(core99_bank)) {
		printk("nvram: Error erasing bank %d\n", core99_bank);
		return;
	}
	if (core99_write_bank(core99_bank, nvram_image))
		printk("nvram: Error writing bank %d\n", core99_bank);
}

unsigned char __openfirmware
nvram_read_byte(int addr)
{
	switch (nvram_naddrs) {
#ifdef CONFIG_ADB_PMU
	case -1: {
		struct adb_request req;

		if (pmu_request(&req, NULL, 3, PMU_READ_NVRAM,
				(addr >> 8) & 0xff, addr & 0xff))
			break;
		while (!req.complete)
			pmu_poll();
		return req.reply[0];
	}
#endif
	case 1:
		if (is_core_99)
			return nvram_image[addr];
		return nvram_data[(addr & (NVRAM_SIZE - 1)) * nvram_mult];
	case 2:
		*nvram_addr = addr >> 5;
		eieio();
		return nvram_data[(addr & 0x1f) << 4];
	}
	return 0;
}

void __openfirmware
nvram_write_byte(unsigned char val, int addr)
{
	switch (nvram_naddrs) {
#ifdef CONFIG_ADB_PMU
	case -1: {
		struct adb_request req;

		if (pmu_request(&req, NULL, 4, PMU_WRITE_NVRAM,
				(addr >> 8) & 0xff, addr & 0xff, val))
			break;
		while (!req.complete)
			pmu_poll();
		break;
	}
#endif
	case 1:
		if (is_core_99) {
			nvram_image[addr] = val;
			break;
		}
		nvram_data[(addr & (NVRAM_SIZE - 1)) * nvram_mult] = val;
		break;
	case 2:
		*nvram_addr = addr >> 5;
		eieio();
		nvram_data[(addr & 0x1f) << 4] = val;
		break;
	}
	eieio();
}

int __pmac
pmac_get_partition(int partition)
{
	return nvram_partitions[partition];
}

u8 __pmac
pmac_xpram_read(int xpaddr)
{
	int offset = nvram_partitions[pmac_nvram_XPRAM];
	
	if (offset < 0)
		return 0;
		
	return nvram_read_byte(xpaddr + offset);
}

void __pmac
pmac_xpram_write(int xpaddr, u8 data)
{
	int offset = nvram_partitions[pmac_nvram_XPRAM];
	
	if (offset < 0)
		return;
		
	nvram_write_byte(xpaddr + offset, data);
}
/*
 * BK Id: SCCS/s.open_pic.h 1.14 10/11/01 12:09:12 trini
 */
/*
 *  arch/ppc/kernel/open_pic.h -- OpenPIC Interrupt Handling
 *
 *  Copyright (C) 1997 Geert Uytterhoeven
 *
 *  This file is subject to the terms and conditions of the GNU General Public
 *  License.  See the file COPYING in the main directory of this archive
 *  for more details.
 *  
 */

#ifndef _PPC_KERNEL_OPEN_PIC_H
#define _PPC_KERNEL_OPEN_PIC_H

#include <linux/config.h>

#define OPENPIC_SIZE	0x40000

/*
 *  Non-offset'ed vector numbers
 */

#define OPENPIC_VEC_TIMER	64	/* and up */
#define OPENPIC_VEC_IPI		72	/* and up */
#define OPENPIC_VEC_SPURIOUS	127

/* OpenPIC IRQ controller structure */
extern struct hw_interrupt_type open_pic;

/* OpenPIC IPI controller structure */
#ifdef CONFIG_SMP
extern struct hw_interrupt_type open_pic_ipi;
#endif /* CONFIG_SMP */

extern u_int OpenPIC_NumInitSenses;
extern u_char *OpenPIC_InitSenses;
extern void* OpenPIC_Addr;

/* Exported functions */
extern void openpic_init(int, int, unsigned char *, int);
extern u_int openpic_irq(void);
extern void openpic_eoi(void);
extern void openpic_request_IPIs(void);
extern void do_openpic_setup_cpu(void);
extern int openpic_get_irq(struct pt_regs *regs);
extern void openpic_reset_processor_phys(u_int cpumask);
extern void openpic_setup_ISU(int isu_num, unsigned long addr);
extern void openpic_cause_IPI(u_int ipi, u_int cpumask);
extern void smp_openpic_message_pass(int target, int msg, unsigned long data,
				     int wait);

extern inline int openpic_to_irq(int irq)
{
	/* IRQ 0 usually means 'disabled'.. don't mess with it 
	 * exceptions to this (sandpoint maybe?) 
	 * shouldn't use openpic_to_irq 
	 */
	if (irq != 0){
		return irq += NUM_8259_INTERRUPTS;
	} else {
		return 0;
	}
}
/*extern int open_pic_irq_offset;*/
#endif /* _PPC_KERNEL_OPEN_PIC_H */
/*
 * BK Id: SCCS/s.xics.c 1.8 12/19/01 09:48:40 trini
 */
/*
 * arch/ppc/kernel/xics.c
 *
 * Copyright 2000 IBM Corporation.
 *
 *  This program is free software; you can redistribute it and/or
 *  modify it under the terms of the GNU General Public License
 *  as published by the Free Software Foundation; either version
 *  2 of the License, or (at your option) any later version.
 */
#include <linux/config.h>
#include <linux/types.h>
#include <linux/threads.h>
#include <linux/kernel.h>
#include <linux/sched.h>
#include <asm/prom.h>
#include <asm/io.h>
#include "i8259.h"
#include "xics.h"

void xics_enable_irq(u_int irq);
void xics_disable_irq(u_int irq);
void xics_mask_and_ack_irq(u_int irq);
void xics_end_irq(u_int irq);

struct hw_interrupt_type xics_pic = {
	" XICS     ",
	NULL,
	NULL,
	xics_enable_irq,
	xics_disable_irq,
	xics_mask_and_ack_irq,
	xics_end_irq
};

struct hw_interrupt_type xics_8259_pic = {
	" XICS/8259",
	NULL,
	NULL,
	NULL,
	NULL,
	xics_mask_and_ack_irq,
	NULL
};

#define XICS_IPI		2
#define XICS_IRQ_8259_CASCADE	0x2c
#define XICS_IRQ_OFFSET		16
#define XICS_IRQ_SPURIOUS	0

#define DEFAULT_SERVER		0
#define	DEFAULT_PRIORITY	0

struct xics_ipl {
	union {
		u32	word;
		u8	bytes[4];
	} xirr_poll;
	union {
		u32 word;
		u8	bytes[4];
	} xirr;
	u32	dummy;
	union {
		u32	word;
		u8	bytes[4];
	} qirr;
};

struct xics_info {
	volatile struct xics_ipl *	per_cpu[NR_CPUS];
};

struct xics_info	xics_info;

#define xirr_info(n_cpu)	(xics_info.per_cpu[n_cpu]->xirr.word)
#define cppr_info(n_cpu)	(xics_info.per_cpu[n_cpu]->xirr.bytes[0])
#define poll_info(n_cpu)	(xics_info.per_cpu[n_cpu]->xirr_poll.word)
#define qirr_info(n_cpu)	(xics_info.per_cpu[n_cpu]->qirr.bytes[0])

void
xics_enable_irq(
	u_int	irq
	)
{
	int	status;
	int	call_status;

	irq -= XICS_IRQ_OFFSET;
	if (irq == XICS_IPI)
		return;
	call_status = call_rtas("ibm,set-xive", 3, 1, (ulong*)&status,
				irq, DEFAULT_SERVER, DEFAULT_PRIORITY);
	if( call_status != 0 ) {
		printk("xics_enable_irq: irq=%x: call_rtas failed; retn=%x, status=%x\n",
		       irq, call_status, status);
		return;
	}
}

void
xics_disable_irq(
	u_int	irq
	)
{
	int	status;
	int	call_status;

	irq -= XICS_IRQ_OFFSET;
	call_status = call_rtas("ibm,int-off", 1, 1, (ulong*)&status, irq);
	if( call_status != 0 ) {
		printk("xics_disable_irq: irq=%x: call_rtas failed, retn=%x\n",
		       irq, call_status);
		return;
	}
}

void
xics_end_irq(
	u_int	irq
	)
{
	int cpu = smp_processor_id();

	cppr_info(cpu) = 0; /* actually the value overwritten by ack */
	xirr_info(cpu) = (0xff<<24) | (irq-XICS_IRQ_OFFSET);
}

void
xics_mask_and_ack_irq(
	u_int	irq
	)
{
	int cpu = smp_processor_id();

	if( irq < XICS_IRQ_OFFSET ) {
		i8259_pic.ack(irq);
		xirr_info(cpu) = (0xff<<24) | XICS_IRQ_8259_CASCADE;
	}
	else {
		cppr_info(cpu) = 0xff;
	}
}

int
xics_get_irq(struct pt_regs *regs)
{
	u_int	cpu = smp_processor_id();
	u_int	vec;
	int irq;
  
	vec = xirr_info(cpu);
	/*  (vec >> 24) == old priority */
	vec &= 0x00ffffff;
	/* for sanity, this had better be < NR_IRQS - 16 */
	if( vec == XICS_IRQ_8259_CASCADE )
		irq = i8259_poll();
	else if( vec == XICS_IRQ_SPURIOUS )
		irq = -1;
	else
		irq = vec + XICS_IRQ_OFFSET;
	return irq;
}

#ifdef CONFIG_SMP
void xics_ipi_action(int irq, void *dev_id, struct pt_regs *regs)
{
	qirr_info(smp_processor_id()) = 0xff;
	smp_message_recv(MSG_RESCHEDULE, regs);
}

void xics_cause_IPI(int cpu)
{
	qirr_info(cpu) = 0;
}

void xics_setup_cpu(void)
{
	int cpu = smp_processor_id();

	cppr_info(cpu) = 0xff;
}
#endif /* CONFIG_SMP */

void
xics_init_IRQ( void )
{
	int i;
	extern unsigned long smp_chrp_cpu_nr;

#ifdef CONFIG_SMP
	for (i = 0; i < smp_chrp_cpu_nr; ++i)
		xics_info.per_cpu[i] =
			ioremap(0xfe000000 + smp_hw_index[i] * 0x1000, 0x20);
#else
	xics_info.per_cpu[0] = ioremap(0xfe000000, 0x20);
#endif /* CONFIG_SMP */
	xics_8259_pic.enable = i8259_pic.enable;
	xics_8259_pic.disable = i8259_pic.disable;
	for (i = 0; i < 16; ++i)
		irq_desc[i].handler = &xics_8259_pic;
	for (; i < NR_IRQS; ++i)
		irq_desc[i].handler = &xics_pic;

	cppr_info(0) = 0xff;
	if (request_irq(XICS_IRQ_8259_CASCADE + XICS_IRQ_OFFSET, no_action,
			0, "8259 cascade", 0))
		printk(KERN_ERR "xics_init_IRQ: couldn't get 8259 cascade\n");
	i8259_init();

#ifdef CONFIG_SMP
	request_irq(XICS_IPI + XICS_IRQ_OFFSET, xics_ipi_action, 0, "IPI", 0);
#endif
}
/*
 * BK Id: SCCS/s.head_8xx.S 1.23 09/16/01 19:32:54 trini
 */
/*
 *  arch/ppc/kernel/except_8xx.S
 *
 *  PowerPC version 
 *    Copyright (C) 1995-1996 Gary Thomas (gdt@linuxppc.org)
 *  Rewritten by Cort Dougan (cort@cs.nmt.edu) for PReP
 *    Copyright (C) 1996 Cort Dougan <cort@cs.nmt.edu>
 *  Low-level exception handlers and MMU support
 *  rewritten by Paul Mackerras.
 *    Copyright (C) 1996 Paul Mackerras.
 *  MPC8xx modifications by Dan Malek
 *    Copyright (C) 1997 Dan Malek (dmalek@jlc.net).
 *
 *  This file contains low-level support and setup for PowerPC 8xx
 *  embedded processors, including trap and interrupt dispatch.
 *
 *  This program is free software; you can redistribute it and/or
 *  modify it under the terms of the GNU General Public License
 *  as published by the Free Software Foundation; either version
 *  2 of the License, or (at your option) any later version.
 *	
 */

#include "ppc_asm.h"
#include <asm/processor.h>
#include <asm/page.h>
#include <linux/config.h>
#include <asm/mmu.h>
#include <asm/cache.h>
#include <asm/pgtable.h>
#include <asm/cputable.h>

	.text
	.globl	_stext
_stext:

/*
 * _start is defined this way because the XCOFF loader in the OpenFirmware
 * on the powermac expects the entry point to be a procedure descriptor.
 */
	.text
	.globl	_start
_start:

/* MPC8xx
 * This port was done on an MBX board with an 860.  Right now I only
 * support an ELF compressed (zImage) boot from EPPC-Bug because the
 * code there loads up some registers before calling us:
 *   r3: ptr to board info data
 *   r4: initrd_start or if no initrd then 0
 *   r5: initrd_end - unused if r4 is 0
 *   r6: Start of command line string
 *   r7: End of command line string
 *
 * I decided to use conditional compilation instead of checking PVR and
 * adding more processor specific branches around code I don't need.
 * Since this is an embedded processor, I also appreciate any memory
 * savings I can get.
 *
 * The MPC8xx does not have any BATs, but it supports large page sizes.
 * We first initialize the MMU to support 8M byte pages, then load one
 * entry into each of the instruction and data TLBs to map the first
 * 8M 1:1.  I also mapped an additional I/O space 1:1 so we can get to
 * the "internal" processor registers before MMU_init is called.
 *
 * The TLB code currently contains a major hack.  Since I use the condition
 * code register, I have to save and restore it.  I am out of registers, so
 * I just store it in memory location 0 (the TLB handlers are not reentrant).
 * To avoid making any decisions, I need to use the "segment" valid bit
 * in the first level table, but that would require many changes to the
 * Linux page directory/table functions that I don't want to do right now.
 *
 * I used to use SPRG2 for a temporary register in the TLB handler, but it
 * has since been put to other uses.  I now use a hack to save a register
 * and the CCR at memory location 0.....Someday I'll fix this.....
 *	-- Dan
 */
	
	.globl	__start
__start:
	mr	r31,r3			/* save parameters */
	mr	r30,r4
	mr	r29,r5
	mr	r28,r6
	mr	r27,r7
	li	r24,0			/* cpu # */

	/* We have to turn on the MMU right away so we get cache modes
	 * set correctly.
	 */
	bl	initial_mmu

/* We now have the lower 8 Meg mapped into TLB entries, and the caches
 * ready to work.
 */

turn_on_mmu:
	mfmsr	r0
	ori	r0,r0,MSR_DR|MSR_IR
	mtspr	SRR1,r0
	lis	r0,start_here@h
	ori	r0,r0,start_here@l
	mtspr	SRR0,r0
	SYNC
	rfi				/* enables MMU */

/*
 * Exception entry code.  This code runs with address translation
 * turned off, i.e. using physical addresses.
 * We assume sprg3 has the physical address of the current
 * task's thread_struct.
 */
#define EXCEPTION_PROLOG	\
	mtspr	SPRG0,r20;	\
	mtspr	SPRG1,r21;	\
	mfcr	r20;		\
	mfspr	r21,SPRG2;		/* exception stack to use from */ \
	cmpwi	0,r21,0;		/* user mode or RTAS */ \
	bne	1f;		\
	tophys(r21,r1);			/* use tophys(kernel sp) otherwise */ \
	subi	r21,r21,INT_FRAME_SIZE;	/* alloc exc. frame */\
1:	stw	r20,_CCR(r21);		/* save registers */ \
	stw	r22,GPR22(r21);	\
	stw	r23,GPR23(r21);	\
	mfspr	r20,SPRG0;	\
	stw	r20,GPR20(r21);	\
	mfspr	r22,SPRG1;	\
	stw	r22,GPR21(r21);	\
	mflr	r20;		\
	stw	r20,_LINK(r21);	\
	mfctr	r22;		\
	stw	r22,_CTR(r21);	\
	mfspr	r20,XER;	\
	stw	r20,_XER(r21);	\
	mfspr	r22,SRR0;	\
	mfspr	r23,SRR1;	\
	stw	r0,GPR0(r21);	\
	stw	r1,GPR1(r21);	\
	stw	r2,GPR2(r21);	\
	stw	r1,0(r21);	\
	tovirt(r1,r21);			/* set new kernel sp */	\
	SAVE_4GPRS(3, r21);	\
	SAVE_GPR(7, r21);
/*
 * Note: code which follows this uses cr0.eq (set if from kernel),
 * r21, r22 (SRR0), and r23 (SRR1).
 */

/*
 * Exception vectors.
 */
#define STD_EXCEPTION(n, label, hdlr)		\
	. = n;					\
label:						\
	EXCEPTION_PROLOG;			\
	addi	r3,r1,STACK_FRAME_OVERHEAD;	\
	li	r20,MSR_KERNEL;			\
	bl	transfer_to_handler; 		\
	.long	hdlr;				\
	.long	ret_from_except

/* System reset */
#ifdef CONFIG_SMP /* MVME/MTX start the secondary here */
	STD_EXCEPTION(0x100, Reset, __secondary_start_psurge)
#else
	STD_EXCEPTION(0x100, Reset, UnknownException)
#endif	

/* Machine check */
	STD_EXCEPTION(0x200, MachineCheck, MachineCheckException)

/* Data access exception.
 * This is "never generated" by the MPC8xx.  We jump to it for other
 * translation errors.
 */
	. = 0x300
DataAccess:
	EXCEPTION_PROLOG
	mfspr	r20,DSISR
	stw	r20,_DSISR(r21)
	mr	r5,r20
	mfspr	r4,DAR
	stw	r4,_DAR(r21)
	addi	r3,r1,STACK_FRAME_OVERHEAD
	li	r20,MSR_KERNEL
	rlwimi	r20,r23,0,16,16		/* copy EE bit from saved MSR */
	bl	transfer_to_handler
	.long	do_page_fault
	.long	ret_from_except

/* Instruction access exception.
 * This is "never generated" by the MPC8xx.  We jump to it for other
 * translation errors.
 */
	. = 0x400
InstructionAccess:
	EXCEPTION_PROLOG
	addi	r3,r1,STACK_FRAME_OVERHEAD
	mr	r4,r22
	mr	r5,r23
	li	r20,MSR_KERNEL
	rlwimi	r20,r23,0,16,16		/* copy EE bit from saved MSR */
	bl	transfer_to_handler
	.long	do_page_fault
	.long	ret_from_except

/* External interrupt */
	. = 0x500;
HardwareInterrupt:
	EXCEPTION_PROLOG;
	addi	r3,r1,STACK_FRAME_OVERHEAD
	li	r20,MSR_KERNEL
	li	r4,0
	bl	transfer_to_handler
	.globl do_IRQ_intercept
do_IRQ_intercept:
	.long	do_IRQ;
	.long	ret_from_intercept
	

/* Alignment exception */
	. = 0x600
Alignment:
	EXCEPTION_PROLOG
	mfspr	r4,DAR
	stw	r4,_DAR(r21)
	mfspr	r5,DSISR
	stw	r5,_DSISR(r21)
	addi	r3,r1,STACK_FRAME_OVERHEAD
	li	r20,MSR_KERNEL
	rlwimi	r20,r23,0,16,16		/* copy EE bit from saved MSR */
	bl	transfer_to_handler
	.long	AlignmentException
	.long	ret_from_except

/* Program check exception */
	. = 0x700
ProgramCheck:
	EXCEPTION_PROLOG
	addi	r3,r1,STACK_FRAME_OVERHEAD
	li	r20,MSR_KERNEL
	rlwimi	r20,r23,0,16,16		/* copy EE bit from saved MSR */
	bl	transfer_to_handler
	.long	ProgramCheckException
	.long	ret_from_except

/* No FPU on MPC8xx.  This exception is not supposed to happen.
*/
	STD_EXCEPTION(0x800, FPUnavailable, UnknownException)

	. = 0x900
Decrementer:
	EXCEPTION_PROLOG
	addi	r3,r1,STACK_FRAME_OVERHEAD
	li	r20,MSR_KERNEL
	bl	transfer_to_handler
	.globl timer_interrupt_intercept
timer_interrupt_intercept:
	.long	timer_interrupt
	.long	ret_from_intercept

	STD_EXCEPTION(0xa00, Trap_0a, UnknownException)
	STD_EXCEPTION(0xb00, Trap_0b, UnknownException)

/* System call */
	. = 0xc00
SystemCall:
	EXCEPTION_PROLOG
	stw	r3,ORIG_GPR3(r21)
	li	r20,MSR_KERNEL
	rlwimi	r20,r23,0,16,16		/* copy EE bit from saved MSR */
	bl	transfer_to_handler
	.long	DoSyscall
	.long	ret_from_except

/* Single step - not used on 601 */
	STD_EXCEPTION(0xd00, SingleStep, SingleStepException)

	STD_EXCEPTION(0xe00, Trap_0e, UnknownException)
	STD_EXCEPTION(0xf00, Trap_0f, UnknownException)

/* On the MPC8xx, this is a software emulation interrupt.  It occurs
 * for all unimplemented and illegal instructions.
 */
	STD_EXCEPTION(0x1000, SoftEmu, SoftwareEmulation)

	. = 0x1100
/*
 * For the MPC8xx, this is a software tablewalk to load the instruction
 * TLB.  It is modelled after the example in the Motorola manual.  The task
 * switch loads the M_TWB register with the pointer to the first level table.
 * If we discover there is no second level table (the value is zero), the
 * plan was to load that into the TLB, which causes another fault into the
 * TLB Error interrupt where we can handle such problems.  However, that did
 * not work, so if we discover there is no second level table, we restore
 * registers and branch to the error exception.  We have to use the MD_xxx
 * registers for the tablewalk because the equivalent MI_xxx registers
 * only perform the attribute functions.
 */
InstructionTLBMiss:
#ifdef CONFIG_8xx_CPU6
	stw	r3, 8(r0)
	li	r3, 0x3f80
	stw	r3, 12(r0)
	lwz	r3, 12(r0)
#endif
	mtspr	M_TW, r20	/* Save a couple of working registers */
	mfcr	r20
	stw	r20, 0(r0)
	stw	r21, 4(r0)
	mfspr	r20, SRR0	/* Get effective address of fault */
#ifdef CONFIG_8xx_CPU6
	li	r3, 0x3780
	stw	r3, 12(r0)
	lwz	r3, 12(r0)
#endif
	mtspr	MD_EPN, r20	/* Have to use MD_EPN for walk, MI_EPN can't */
	mfspr	r20, M_TWB	/* Get level 1 table entry address */

	/* If we are faulting a kernel address, we have to use the
	 * kernel page tables.
	 */
	andi.	r21, r20, 0x0800	/* Address >= 0x80000000 */
	beq	3f
	lis	r21, swapper_pg_dir@h
	ori	r21, r21, swapper_pg_dir@l
	rlwimi	r20, r21, 0, 2, 19
3:
	lwz	r21, 0(r20)	/* Get the level 1 entry */
	rlwinm.	r20, r21,0,0,19	/* Extract page descriptor page address */
	beq	2f		/* If zero, don't try to find a pte */

	/* We have a pte table, so load the MI_TWC with the attributes
	 * for this page, which has only bit 31 set.
	 */
	tophys(r21,r21)
	ori	r21,r21,1		/* Set valid bit */
#ifdef CONFIG_8xx_CPU6
	li	r3, 0x2b80
	stw	r3, 12(r0)
	lwz	r3, 12(r0)
#endif
	mtspr	MI_TWC, r21	/* Set page attributes */
#ifdef CONFIG_8xx_CPU6
	li	r3, 0x3b80
	stw	r3, 12(r0)
	lwz	r3, 12(r0)
#endif
	mtspr	MD_TWC, r21	/* Load pte table base address */
	mfspr	r21, MD_TWC	/* ....and get the pte address */
	lwz	r20, 0(r21)	/* Get the pte */

	ori	r20, r20, _PAGE_ACCESSED
	stw	r20, 0(r21)

	/* The Linux PTE won't go exactly into the MMU TLB.
	 * Software indicator bits 21, 22 and 28 must be clear.
	 * Software indicator bits 24, 25, 26, and 27 must be
	 * set.  All other Linux PTE bits control the behavior
	 * of the MMU.
	 */
	li	r21, 0x0600
	andc	r20, r20, r21		/* Clear 21, 22 */
	li	r21, 0x00f0
	rlwimi	r20, r21, 0, 24, 28	/* Set 24-27, clear 28 */

#ifdef CONFIG_8xx_CPU6
	li	r3, 0x2d80
	stw	r3, 12(r0)
	lwz	r3, 12(r0)
#endif
	mtspr	MI_RPN, r20	/* Update TLB entry */

	mfspr	r20, M_TW	/* Restore registers */
	lwz	r21, 0(r0)
	mtcr	r21
	lwz	r21, 4(r0)
#ifdef CONFIG_8xx_CPU6
	lwz	r3, 8(r0)
#endif
	rfi

2:	mfspr	r20, M_TW	/* Restore registers */
	lwz	r21, 0(r0)
	mtcr	r21
	lwz	r21, 4(r0)
#ifdef CONFIG_8xx_CPU6
	lwz	r3, 8(r0)
#endif
	b	InstructionAccess

	. = 0x1200
DataStoreTLBMiss:
#ifdef CONFIG_8xx_CPU6
	stw	r3, 8(r0)
	li	r3, 0x3f80
	stw	r3, 12(r0)
	lwz	r3, 12(r0)
#endif
	mtspr	M_TW, r20	/* Save a couple of working registers */
	mfcr	r20
	stw	r20, 0(r0)
	stw	r21, 4(r0)
	mfspr	r20, M_TWB	/* Get level 1 table entry address */

	/* If we are faulting a kernel address, we have to use the
	 * kernel page tables.
	 */
	andi.	r21, r20, 0x0800
	beq	3f
	lis	r21, swapper_pg_dir@h
	ori	r21, r21, swapper_pg_dir@l
	rlwimi r20, r21, 0, 2, 19
3:
	lwz	r21, 0(r20)	/* Get the level 1 entry */
	rlwinm.	r20, r21,0,0,19	/* Extract page descriptor page address */
	beq	2f		/* If zero, don't try to find a pte */

	/* We have a pte table, so load fetch the pte from the table.
	 */
	tophys(r21, r21)
	ori	r21, r21, 1	/* Set valid bit in physical L2 page */
#ifdef CONFIG_8xx_CPU6
	li	r3, 0x3b80
	stw	r3, 12(r0)
	lwz	r3, 12(r0)
#endif
	mtspr	MD_TWC, r21	/* Load pte table base address */
	mfspr	r20, MD_TWC	/* ....and get the pte address */
	lwz	r20, 0(r20)	/* Get the pte */

	/* Insert the Guarded flag into the TWC from the Linux PTE.
	 * It is bit 27 of both the Linux PTE and the TWC (at least
	 * I got that right :-).  It will be better when we can put
	 * this into the Linux pgd/pmd and load it in the operation
	 * above.
	 */
	rlwimi	r21, r20, 0, 27, 27
#ifdef CONFIG_8xx_CPU6
	li	r3, 0x3b80
	stw	r3, 12(r0)
	lwz	r3, 12(r0)
#endif
	mtspr	MD_TWC, r21

	mfspr	r21, MD_TWC	/* get the pte address again */
	ori	r20, r20, _PAGE_ACCESSED
	stw	r20, 0(r21)

	/* The Linux PTE won't go exactly into the MMU TLB.
	 * Software indicator bits 21, 22 and 28 must be clear.
	 * Software indicator bits 24, 25, 26, and 27 must be
	 * set.  All other Linux PTE bits control the behavior
	 * of the MMU.
	 */
	li	r21, 0x0600
	andc	r20, r20, r21		/* Clear 21, 22 */
	li	r21, 0x00f0
	rlwimi	r20, r21, 0, 24, 28	/* Set 24-27, clear 28 */

#ifdef CONFIG_8xx_CPU6
	li	r3, 0x3d80
	stw	r3, 12(r0)
	lwz	r3, 12(r0)
#endif
	mtspr	MD_RPN, r20	/* Update TLB entry */

	mfspr	r20, M_TW	/* Restore registers */
	lwz	r21, 0(r0)
	mtcr	r21
	lwz	r21, 4(r0)
#ifdef CONFIG_8xx_CPU6
	lwz	r3, 8(r0)
#endif
	rfi

2:	mfspr	r20, M_TW	/* Restore registers */
	lwz	r21, 0(r0)
	mtcr	r21
	lwz	r21, 4(r0)
#ifdef CONFIG_8xx_CPU6
	lwz	r3, 8(r0)
#endif
	b	DataAccess

/* This is an instruction TLB error on the MPC8xx.  This could be due
 * to many reasons, such as executing guarded memory or illegal instruction
 * addresses.  There is nothing to do but handle a big time error fault.
 */
	. = 0x1300
InstructionTLBError:
	b	InstructionAccess

/* This is the data TLB error on the MPC8xx.  This could be due to
 * many reasons, including a dirty update to a pte.  We can catch that
 * one here, but anything else is an error.  First, we track down the
 * Linux pte.  If it is valid, write access is allowed, but the
 * page dirty bit is not set, we will set it and reload the TLB.  For
 * any other case, we bail out to a higher level function that can
 * handle it.
 */
	. = 0x1400
DataTLBError:
#ifdef CONFIG_8xx_CPU6
	stw	r3, 8(r0)
	li	r3, 0x3f80
	stw	r3, 12(r0)
	lwz	r3, 12(r0)
#endif
	mtspr	M_TW, r20	/* Save a couple of working registers */
	mfcr	r20
	stw	r20, 0(r0)
	stw	r21, 4(r0)

	/* First, make sure this was a store operation.
	*/
	mfspr	r20, DSISR
	andis.	r21, r20, 0x0200	/* If set, indicates store op */
	beq	2f

	mfspr	r20, M_TWB	/* Get level 1 table entry address */

	/* If we are faulting a kernel address, we have to use the
	 * kernel page tables.
	 */
	andi.	r21, r20, 0x0800
	beq	3f
	lis	r21, swapper_pg_dir@h
	ori	r21, r21, swapper_pg_dir@l
	rlwimi	r20, r21, 0, 2, 19
3:
	lwz	r21, 0(r20)	/* Get the level 1 entry */
	rlwinm.	r20, r21,0,0,19	/* Extract page descriptor page address */
	beq	2f		/* If zero, bail */

	/* We have a pte table, so fetch the pte from the table.
	 */
	tophys(r21, r21)
	ori	r21, r21, 1		/* Set valid bit in physical L2 page */
#ifdef CONFIG_8xx_CPU6
	li	r3, 0x3b80
	stw	r3, 12(r0)
	lwz	r3, 12(r0)
#endif
	mtspr	MD_TWC, r21		/* Load pte table base address */
	mfspr	r21, MD_TWC		/* ....and get the pte address */
	lwz	r20, 0(r21)		/* Get the pte */

	andi.	r21, r20, _PAGE_RW	/* Is it writeable? */
	beq	2f			/* Bail out if not */

	/* Update 'changed', among others.
	*/
	ori	r20, r20, _PAGE_DIRTY|_PAGE_ACCESSED|_PAGE_HWWRITE
	mfspr	r21, MD_TWC		/* Get pte address again */
	stw	r20, 0(r21)		/* and update pte in table */

	/* The Linux PTE won't go exactly into the MMU TLB.
	 * Software indicator bits 21, 22 and 28 must be clear.
	 * Software indicator bits 24, 25, 26, and 27 must be
	 * set.  All other Linux PTE bits control the behavior
	 * of the MMU.
	 */
	li	r21, 0x0600
	andc	r20, r20, r21		/* Clear 21, 22 */
	li	r21, 0x00f0
	rlwimi	r20, r21, 0, 24, 28	/* Set 24-27, clear 28 */

#ifdef CONFIG_8xx_CPU6
	li	r3, 0x3d80
	stw	r3, 12(r0)
	lwz	r3, 12(r0)
#endif
	mtspr	MD_RPN, r20	/* Update TLB entry */

	mfspr	r20, M_TW	/* Restore registers */
	lwz	r21, 0(r0)
	mtcr	r21
	lwz	r21, 4(r0)
#ifdef CONFIG_8xx_CPU6
	lwz	r3, 8(r0)
#endif
	rfi
2:
	mfspr	r20, M_TW	/* Restore registers */
	lwz	r21, 0(r0)
	mtcr	r21
	lwz	r21, 4(r0)
#ifdef CONFIG_8xx_CPU6
	lwz	r3, 8(r0)
#endif
	b	DataAccess

	STD_EXCEPTION(0x1500, Trap_15, UnknownException)
	STD_EXCEPTION(0x1600, Trap_16, UnknownException)
	STD_EXCEPTION(0x1700, Trap_17, TAUException)
	STD_EXCEPTION(0x1800, Trap_18, UnknownException)
	STD_EXCEPTION(0x1900, Trap_19, UnknownException)
	STD_EXCEPTION(0x1a00, Trap_1a, UnknownException)
	STD_EXCEPTION(0x1b00, Trap_1b, UnknownException)

/* On the MPC8xx, these next four traps are used for development
 * support of breakpoints and such.  Someday I will get around to
 * using them.
 */
	STD_EXCEPTION(0x1c00, Trap_1c, UnknownException)
	STD_EXCEPTION(0x1d00, Trap_1d, UnknownException)
	STD_EXCEPTION(0x1e00, Trap_1e, UnknownException)
	STD_EXCEPTION(0x1f00, Trap_1f, UnknownException)

	. = 0x2000

/*
 * This code finishes saving the registers to the exception frame
 * and jumps to the appropriate handler for the exception, turning
 * on address translation.
 */
	.globl	transfer_to_handler
transfer_to_handler:
	stw	r22,_NIP(r21)
	lis	r22,MSR_POW@h
	andc	r23,r23,r22
	stw	r23,_MSR(r21)
	SAVE_4GPRS(8, r21)
	SAVE_8GPRS(12, r21)
	SAVE_8GPRS(24, r21)
	andi.	r23,r23,MSR_PR
	mfspr	r23,SPRG3		/* if from user, fix up THREAD.regs */
	beq	2f
	addi	r24,r1,STACK_FRAME_OVERHEAD
	stw	r24,PT_REGS(r23)
2:	addi	r2,r23,-THREAD		/* set r2 to current */
	tovirt(r2,r2)
	mflr	r23
	andi.	r24,r23,0x3f00		/* get vector offset */
	stw	r24,TRAP(r21)
	li	r22,0
	stw	r22,RESULT(r21)
	mtspr	SPRG2,r22		/* r1 is now kernel sp */
	addi	r24,r2,TASK_STRUCT_SIZE	/* check for kernel stack overflow */
	cmplw	0,r1,r2
	cmplw	1,r1,r24
	crand	1,1,4
	bgt-	stack_ovf		/* if r2 < r1 < r2+TASK_STRUCT_SIZE */
	lwz	r24,0(r23)		/* virtual address of handler */
	lwz	r23,4(r23)		/* where to go when done */
	mtspr	SRR0,r24
	mtspr	SRR1,r20
	mtlr	r23
	SYNC
	rfi				/* jump to handler, enable MMU */

/*
 * On kernel stack overflow, load up an initial stack pointer
 * and call StackOverflow(regs), which should not return.
 */
stack_ovf:
	addi	r3,r1,STACK_FRAME_OVERHEAD
	lis	r1,init_task_union@ha
	addi	r1,r1,init_task_union@l
	addi	r1,r1,TASK_UNION_SIZE-STACK_FRAME_OVERHEAD
	lis	r24,StackOverflow@ha
	addi	r24,r24,StackOverflow@l
	li	r20,MSR_KERNEL
	mtspr	SRR0,r24
	mtspr	SRR1,r20
	SYNC
	rfi

	.globl	giveup_fpu
giveup_fpu:
	blr

/* Maybe someday.......
*/
_GLOBAL(__setup_cpu_8xx)
	blr

/*
 * This is where the main kernel code starts.
 */
start_here:

	/* ptr to current */
	lis	r2,init_task_union@h
	ori	r2,r2,init_task_union@l

	/* ptr to phys current thread */
	tophys(r4,r2)
	addi	r4,r4,THREAD	/* init task's THREAD */
	mtspr	SPRG3,r4
	li	r3,0
	mtspr	SPRG2,r3	/* 0 => r1 has kernel sp */

	/* stack */
	addi	r1,r2,TASK_UNION_SIZE
	li	r0,0
	stwu	r0,-STACK_FRAME_OVERHEAD(r1)

	bl	early_init	/* We have to do this with MMU on */

/*
 * Decide what sort of machine this is and initialize the MMU.
 */
	mr	r3,r31
	mr	r4,r30
	mr	r5,r29
	mr	r6,r28
	mr	r7,r27
	bl	machine_init
	bl	MMU_init

/*
 * Go back to running unmapped so we can load up new values
 * and change to using our exception vectors.
 * On the 8xx, all we have to do is invalidate the TLB to clear
 * the old 8M byte TLB mappings and load the page table base register.
 */
	/* The right way to do this would be to track it down through
	 * init's THREAD like the context switch code does, but this is
	 * easier......until someone changes init's static structures.
	 */
	lis	r6, swapper_pg_dir@h
	ori	r6, r6, swapper_pg_dir@l
	tophys(r6,r6)
#ifdef CONFIG_8xx_CPU6
	lis	r4, cpu6_errata_word@h
	ori	r4, r4, cpu6_errata_word@l
	li	r3, 0x3980
	stw	r3, 12(r4)
	lwz	r3, 12(r4)
#endif
	mtspr	M_TWB, r6
	lis	r4,2f@h
	ori	r4,r4,2f@l
	tophys(r4,r4)
	li	r3,MSR_KERNEL & ~(MSR_IR|MSR_DR)
	mtspr	SRR0,r4
	mtspr	SRR1,r3
	rfi
/* Load up the kernel context */
2:
	SYNC			/* Force all PTE updates to finish */
	tlbia			/* Clear all TLB entries */
	sync			/* wait for tlbia/tlbie to finish */
	TLBSYNC			/* ... on all CPUs */

	/* set up the PTE pointers for the Abatron bdiGDB.
	*/
	tovirt(r6,r6)
	lis	r5, abatron_pteptrs@h
	ori	r5, r5, abatron_pteptrs@l
	stw	r5, 0xf0(r0)	/* Must match your Abatron config file */
	tophys(r5,r5)
	stw	r6, 0(r5)

/* Now turn on the MMU for real! */
	li	r4,MSR_KERNEL
	lis	r3,start_kernel@h
	ori	r3,r3,start_kernel@l
	mtspr	SRR0,r3
	mtspr	SRR1,r4
	rfi			/* enable MMU and jump to start_kernel */

/* Set up the initial MMU state so we can do the first level of
 * kernel initialization.  This maps the first 8 MBytes of memory 1:1
 * virtual to physical.  Also, set the cache mode since that is defined
 * by TLB entries and perform any additional mapping (like of the IMMR).
 */
initial_mmu:
	tlbia			/* Invalidate all TLB entries */
	li	r8, 0
	mtspr	MI_CTR, r8	/* Set instruction control to zero */
	lis	r8, MD_RESETVAL@h
#ifndef CONFIG_8xx_COPYBACK
	oris	r8, r8, MD_WTDEF@h
#endif
	mtspr	MD_CTR, r8	/* Set data TLB control */

	/* Now map the lower 8 Meg into the TLBs.  For this quick hack,
	 * we can load the instruction and data TLB registers with the
	 * same values.
	 */
	lis	r8, KERNELBASE@h	/* Create vaddr for TLB */
	ori	r8, r8, MI_EVALID	/* Mark it valid */
	mtspr	MI_EPN, r8
	mtspr	MD_EPN, r8
	li	r8, MI_PS8MEG		/* Set 8M byte page */
	ori	r8, r8, MI_SVALID	/* Make it valid */
	mtspr	MI_TWC, r8
	mtspr	MD_TWC, r8
	li	r8, MI_BOOTINIT		/* Create RPN for address 0 */
	mtspr	MI_RPN, r8		/* Store TLB entry */
	mtspr	MD_RPN, r8
	lis	r8, MI_Kp@h		/* Set the protection mode */
	mtspr	MI_AP, r8
	mtspr	MD_AP, r8

	/* Map another 8 MByte at the IMMR to get the processor
	 * internal registers (among other things).
	 */
	mfspr	r9, 638			/* Get current IMMR */
	andis.	r9, r9, 0xff80		/* Get 8Mbyte boundary */

	mr	r8, r9			/* Create vaddr for TLB */
	ori	r8, r8, MD_EVALID	/* Mark it valid */
	mtspr	MD_EPN, r8
	li	r8, MD_PS8MEG		/* Set 8M byte page */
	ori	r8, r8, MD_SVALID	/* Make it valid */
	mtspr	MD_TWC, r8
	mr	r8, r9			/* Create paddr for TLB */
	ori	r8, r8, MI_BOOTINIT|0x2 /* Inhibit cache -- Cort */
	mtspr	MD_RPN, r8

	/* Since the cache is enabled according to the information we
	 * just loaded into the TLB, invalidate and enable the caches here.
	 * We should probably check/set other modes....later.
	 */
	lis	r8, IDC_INVALL@h
	mtspr	IC_CST, r8
	mtspr	DC_CST, r8
	lis	r8, IDC_ENABLE@h
	mtspr	IC_CST, r8
#ifdef CONFIG_8xx_COPYBACK
	mtspr	DC_CST, r8
#else
	/* For a debug option, I left this here to easily enable
	 * the write through cache mode
	 */
	lis	r8, DC_SFWT@h
	mtspr	DC_CST, r8
	lis	r8, IDC_ENABLE@h
	mtspr	DC_CST, r8
#endif
	blr


/*
 * Set up to use a given MMU context.
 * r3 is context number, r4 is PGD pointer.
 *
 * We place the physical address of the new task page directory loaded
 * into the MMU base register, and set the ASID compare register with
 * the new "context."
 */
_GLOBAL(set_context)

#ifdef CONFIG_BDI_SWITCH
	/* Context switch the PTE pointer for the Abatron BDI2000.
	 * The PGDIR is passed as second argument.
	 */
	lis	r5, KERNELBASE@h
	lwz	r5, 0xf0(r5)
	stw	r4, 0x4(r5)
#endif

#ifdef CONFIG_8xx_CPU6
	lis	r6, cpu6_errata_word@h
	ori	r6, r6, cpu6_errata_word@l
	tophys	(r4, r4)
	li	r7, 0x3980
	stw	r7, 12(r6)
	lwz	r7, 12(r6)
        mtspr   M_TWB, r4               /* Update MMU base address */
	li	r7, 0x3380
	stw	r7, 12(r6)
	lwz	r7, 12(r6)
        mtspr   M_CASID, r3             /* Update context */
#else
        mtspr   M_CASID,r3		/* Update context */
	tophys	(r4, r4)
	mtspr	M_TWB, r4		/* and pgd */
#endif
	SYNC
	blr

#ifdef CONFIG_8xx_CPU6
/* It's here because it is unique to the 8xx.
 * It is important we get called with interrupts disabled.  I used to
 * do that, but it appears that all code that calls this already had
 * interrupt disabled.
 */
	.globl	set_dec_cpu6
set_dec_cpu6:
	lis	r7, cpu6_errata_word@h
	ori	r7, r7, cpu6_errata_word@l
	li	r4, 0x2c00
	stw	r4, 8(r7)
	lwz	r4, 8(r7)
        mtspr   22, r3		/* Update Decrementer */
	SYNC
	blr
#endif
	
/*
 * We put a few things here that have to be page-aligned.
 * This stuff goes at the beginning of the data segment,
 * which is page-aligned.
 */
	.data
	.globl	sdata
sdata:
	.globl	empty_zero_page
empty_zero_page:
	.space	4096

	.globl	swapper_pg_dir
swapper_pg_dir:
	.space	4096	

/*
 * This space gets a copy of optional info passed to us by the bootstrap
 * Used to pass parameters into the kernel like root=/dev/sda1, etc.
 */	
	.globl	cmd_line
cmd_line:
	.space	512

/* Room for two PTE table poiners, usually the kernel and current user
 * pointer to their respective root page table (pgdir).
 */
abatron_pteptrs:
	.space	8

#ifdef CONFIG_8xx_CPU6
	.globl	cpu6_errata_word
cpu6_errata_word:
	.space	16
#endif

/*
 * BK Id: SCCS/s.pmac_pic.h 1.9 08/19/01 22:23:04 paulus
 */
#ifndef _PPC_KERNEL_PMAC_PIC_H
#define _PPC_KERNEL_PMAC_PIC_H

#include "local_irq.h"

extern struct hw_interrupt_type pmac_pic;

void pmac_pic_init(void);
int pmac_get_irq(struct pt_regs *regs);

#endif /* _PPC_KERNEL_PMAC_PIC_H */
/*
 * BK Id: SCCS/s.ppc8xx_pic.c 1.13 12/01/01 17:19:48 trini
 */
#include <linux/config.h>
#include <linux/stddef.h>
#include <linux/init.h>
#include <linux/sched.h>
#include <linux/signal.h>
#include <asm/irq.h>
#include <asm/8xx_immap.h>
#include <asm/mpc8xx.h>
#include "ppc8xx_pic.h"

/* The 8xx internal interrupt controller.  It is usually
 * the only interrupt controller.  Some boards, like the MBX and
 * Sandpoint have the 8259 as a secondary controller.  Depending
 * upon the processor type, the internal controller can have as
 * few as 16 interrups or as many as 64.  We could use  the
 * "clear_bit()" and "set_bit()" functions like other platforms,
 * but they are overkill for us.
 */

static void m8xx_mask_irq(unsigned int irq_nr)
{
	int	bit, word;

	bit = irq_nr & 0x1f;
	word = irq_nr >> 5;

	ppc_cached_irq_mask[word] &= ~(1 << (31-bit));
	((immap_t *)IMAP_ADDR)->im_siu_conf.sc_simask =
						ppc_cached_irq_mask[word];
}

static void m8xx_unmask_irq(unsigned int irq_nr)
{
	int	bit, word;

	bit = irq_nr & 0x1f;
	word = irq_nr >> 5;

	ppc_cached_irq_mask[word] |= (1 << (31-bit));
	((immap_t *)IMAP_ADDR)->im_siu_conf.sc_simask =
						ppc_cached_irq_mask[word];
}

static void m8xx_end_irq(unsigned int irq_nr)
{
	if (!(irq_desc[irq_nr].status & (IRQ_DISABLED|IRQ_INPROGRESS))) {
		int bit, word;

		bit = irq_nr & 0x1f;
		word = irq_nr >> 5;

		ppc_cached_irq_mask[word] |= (1 << (31-bit));
		((immap_t *)IMAP_ADDR)->im_siu_conf.sc_simask = 
			ppc_cached_irq_mask[word];
	}
}


static void m8xx_mask_and_ack(unsigned int irq_nr)
{
	int	bit, word;

	bit = irq_nr & 0x1f;
	word = irq_nr >> 5;

	ppc_cached_irq_mask[word] &= ~(1 << (31-bit));
	((immap_t *)IMAP_ADDR)->im_siu_conf.sc_simask =
						ppc_cached_irq_mask[word];
	((immap_t *)IMAP_ADDR)->im_siu_conf.sc_sipend = 1 << (31-bit);
}

struct hw_interrupt_type ppc8xx_pic = {
	" 8xx SIU  ",
	NULL,
	NULL,
	m8xx_unmask_irq,
	m8xx_mask_irq,
	m8xx_mask_and_ack,
	m8xx_end_irq,
	0
};

#if 0
void
m8xx_do_IRQ(struct pt_regs *regs,
	   int            cpu)
{
	int irq;
        unsigned long bits = 0;

        /* For MPC8xx, read the SIVEC register and shift the bits down
         * to get the irq number.         */
        bits = ((immap_t *)IMAP_ADDR)->im_siu_conf.sc_sivec;
        irq = bits >> 26;
#if 0
        irq += ppc8xx_pic.irq_offset;
#endif
        bits = 1UL << irq;

	if (irq < 0) {
		printk(KERN_DEBUG "Bogus interrupt %d from PC = %lx\n",
		       irq, regs->nip);
		ppc_spurious_interrupts++;
	}
	else {
                ppc_irq_dispatch_handler( regs, irq );
	}

}
#endif


/*
 * We either return a valid interrupt or -1 if there is nothing pending
 */
int
m8xx_get_irq(struct pt_regs *regs)
{
	int irq;

	/* For MPC8xx, read the SIVEC register and shift the bits down
	 * to get the irq number.
	 */
	irq = ((immap_t *)IMAP_ADDR)->im_siu_conf.sc_sivec >> 26;

	/*
	 * When we read the sivec without an interrupt to process, we will 
	 * get back SIU_LEVEL7.  In this case, return -1
	 */
	if (irq == SIU_LEVEL7)
		return -1;

	return irq;
}

/* The MBX is the only 8xx board that uses the 8259.
*/
#if defined(CONFIG_MBX) && defined(CONFIG_PCI)
void mbx_i8259_action(int cpl, void *dev_id, struct pt_regs *regs)
{
	int bits, irq;

	/* A bug in the QSpan chip causes it to give us 0xff always
	 * when doing a character read.  So read 32 bits and shift.
	 * This doesn't seem to return useful values anyway, but
	 * read it to make sure things are acked.
	 * -- Cort
	 */
	irq = (inl(0x508) >> 24)&0xff;
	if ( irq != 0xff ) printk("iack %d\n", irq);
	
	outb(0x0C, 0x20);
	irq = inb(0x20) & 7;
	if (irq == 2)
	{
		outb(0x0C, 0xA0);
		irq = inb(0xA0);
		irq = (irq&7) + 8;
	}
	bits = 1UL << irq;
	irq += i8259_pic.irq_offset;
	ppc_irq_dispatch_handler( regs, irq );
}
#endif

/* Only the MBX uses the external 8259.  This allows us to catch standard
 * drivers that may mess up the internal interrupt controllers, and also
 * allow them to run without modification on the MBX.
 */
int request_irq(unsigned int irq, void (*handler)(int, void *, struct pt_regs *),
	unsigned long irqflags, const char * devname, void *dev_id)
{

#if defined(CONFIG_MBX) && defined(CONFIG_PCI)
	irq += i8259_pic.irq_offset;
	return (request_8xxirq(irq, handler, irqflags, devname, dev_id));
#else
	/*
	 * Handle other "well-known" interrupts, but panic on unknown ones.
	 */
	switch (irq) {
#ifdef	IDE0_INTERRUPT
		case IDE0_INTERRUPT:	/* IDE0 */
			return (request_8xxirq(irq, handler, irqflags, devname,
						dev_id));
#endif
#ifdef	IDE1_INTERRUPT
		case IDE1_INTERRUPT:	/* IDE1 */
			return (request_8xxirq(irq, handler, irqflags, devname,
						dev_id));
#endif
	default:			/* unknown IRQ -> panic */
		panic("request_irq");
	}
#endif
}
/*
 * BK Id: SCCS/s.ppc8xx_pic.h 1.7 05/17/01 18:14:21 cort
 */
#ifndef _PPC_KERNEL_PPC8xx_H
#define _PPC_KERNEL_PPC8xx_H

#include <linux/config.h>
#include "local_irq.h"

extern struct hw_interrupt_type ppc8xx_pic;

void m8xx_pic_init(void);
void m8xx_do_IRQ(struct pt_regs *regs,
                 int            cpu);
int m8xx_get_irq(struct pt_regs *regs);

#ifdef CONFIG_MBX
#include "i8259.h"
#include <asm/io.h>
void mbx_i8259_action(int cpl, void *dev_id, struct pt_regs *regs);
#endif

#endif /* _PPC_KERNEL_PPC8xx_H */
/*
 * BK Id: SCCS/s.prep_nvram.c 1.12 09/08/01 15:47:42 paulus
 */
/*
 *  linux/arch/ppc/kernel/prep_nvram.c
 *
 *  Copyright (C) 1998  Corey Minyard
 *
 */
#include <linux/init.h>
#include <linux/delay.h>
#include <linux/slab.h>
#include <linux/ioport.h>

#include <asm/sections.h>
#include <asm/segment.h>
#include <asm/io.h>
#include <asm/processor.h>
#include <asm/machdep.h>
#include <asm/prep_nvram.h>

static char nvramData[MAX_PREP_NVRAM];
static NVRAM_MAP *nvram=(NVRAM_MAP *)&nvramData[0];

unsigned char __prep prep_nvram_read_val(int addr)
{
	outb(addr, PREP_NVRAM_AS0);
	outb(addr>>8, PREP_NVRAM_AS1);
	return inb(PREP_NVRAM_DATA);
}
  
void __prep prep_nvram_write_val(int           addr,
			  unsigned char val)
{
	outb(addr, PREP_NVRAM_AS0);
	outb(addr>>8, PREP_NVRAM_AS1);
   	outb(val, PREP_NVRAM_DATA);
}
  
void __init init_prep_nvram(void)
{
	unsigned char *nvp;
	int  i;
	int  nvramSize;

	/*
	 * The following could fail if the NvRAM were corrupt but
	 * we expect the boot firmware to have checked its checksum
	 * before boot
	 */
	nvp = (char *) &nvram->Header;
	for (i=0; i<sizeof(HEADER); i++)
	{
		*nvp = ppc_md.nvram_read_val(i);
		nvp++;
	}
	
	/*
	 * The PReP NvRAM may be any size so read in the header to
	 * determine how much we must read in order to get the complete
	 * GE area
	 */
	nvramSize=(int)nvram->Header.GEAddress+nvram->Header.GELength;
	if(nvramSize>MAX_PREP_NVRAM)
	{
		/*
		 * NvRAM is too large
		 */
		nvram->Header.GELength=0;
		return;
	}

	/*
	 * Read the remainder of the PReP NvRAM
	 */
	nvp = (char *) &nvram->GEArea[0];
	for (i=sizeof(HEADER); i<nvramSize; i++)
	{
		*nvp = ppc_md.nvram_read_val(i);
		nvp++;
	}
}

__prep
char __prep *prep_nvram_get_var(const char *name)
{
	char *cp;
	int  namelen;

	namelen = strlen(name);
	cp = prep_nvram_first_var();
	while (cp != NULL) {
		if ((strncmp(name, cp, namelen) == 0)
		    && (cp[namelen] == '='))
		{
			return cp+namelen+1;
		}
		cp = prep_nvram_next_var(cp);
	}

	return NULL;
}

__prep
char __prep *prep_nvram_first_var(void)
{
        if (nvram->Header.GELength == 0) {
		return NULL;
	} else {
		return (((char *)nvram)
			+ ((unsigned int) nvram->Header.GEAddress));
	}
}

__prep
char __prep *prep_nvram_next_var(char *name)
{
	char *cp;


	cp = name;
	while (((cp - ((char *) nvram->GEArea)) < nvram->Header.GELength)
	       && (*cp != '\0'))
	{
		cp++;
	}

	/* Skip over any null characters. */
	while (((cp - ((char *) nvram->GEArea)) < nvram->Header.GELength)
	       && (*cp == '\0'))
	{
		cp++;
	}

	if ((cp - ((char *) nvram->GEArea)) < nvram->Header.GELength) {
		return cp;
	} else {
		return NULL;
	}
}



/*
 * BK Id: SCCS/s.oak_setup.c 1.12 11/13/01 21:26:07 paulus
 */
/*
 *
 *    Copyright (c) 1999-2000 Grant Erickson <grant@lcse.umn.edu>
 *
 *    Module name: oak_setup.c
 *
 *    Description:
 *      Architecture- / platform-specific boot-time initialization code for
 *      the IBM PowerPC 403GCX "Oak" evaluation board. Adapted from original
 *      code by Gary Thomas, Cort Dougan <cort@fsmlabs.com>, and Dan Malek
 *      <dan@net4x.com>.
 *
 */

#include <linux/config.h>
#include <linux/init.h>
#include <linux/smp.h>
#include <linux/threads.h>
#include <linux/interrupt.h>
#include <linux/param.h>
#include <linux/string.h>
#include <linux/blk.h>
#include <linux/seq_file.h>

#include <asm/processor.h>
#include <asm/board.h>
#include <asm/machdep.h>
#include <asm/page.h>

#include "local_irq.h"
#include "ppc4xx_pic.h"
#include <asm/time.h>
#include "oak_setup.h"







/* Function Prototypes */

extern void abort(void);

/* Global Variables */

unsigned char __res[sizeof(bd_t)];


/*
 * void __init oak_init()
 *
 * Description:
 *   This routine...
 *
 * Input(s):
 *   r3 - Optional pointer to a board information structure.
 *   r4 - Optional pointer to the physical starting address of the init RAM
 *        disk.
 *   r5 - Optional pointer to the physical ending address of the init RAM
 *        disk.
 *   r6 - Optional pointer to the physical starting address of any kernel
 *        command-line parameters.
 *   r7 - Optional pointer to the physical ending address of any kernel
 *        command-line parameters.
 *
 * Output(s):
 *   N/A
 *
 * Returns:
 *   N/A
 *
 */
void __init
platform_init(unsigned long r3, unsigned long r4, unsigned long r5, 
	      unsigned long r6, unsigned long r7)
{
	/*
	 * If we were passed in a board information, copy it into the
	 * residual data area.
	 */
	if (r3) {
		memcpy((void *)__res, (void *)(r3 + KERNELBASE), sizeof(bd_t));
	}

#if defined(CONFIG_BLK_DEV_INITRD)
	/*
	 * If the init RAM disk has been configured in, and there's a valid
	 * starting address for it, set it up.
	 */
	if (r4) {
		initrd_start = r4 + KERNELBASE;
		initrd_end = r5 + KERNELBASE;
	}
#endif /* CONFIG_BLK_DEV_INITRD */

	/* Copy the kernel command line arguments to a safe place. */

	if (r6) {
 		*(char *)(r7 + KERNELBASE) = 0;
		strcpy(cmd_line, (char *)(r6 + KERNELBASE));
	}

	/* Initialize machine-dependency vectors */

	ppc_md.setup_arch	 	= oak_setup_arch;
	ppc_md.show_percpuinfo	 	= oak_show_percpuinfo;
	ppc_md.irq_cannonicalize 	= NULL;
	ppc_md.init_IRQ		 	= oak_init_IRQ;
	ppc_md.get_irq		 	= oak_get_irq;
	ppc_md.init		 	= NULL;

	ppc_md.restart		 	= oak_restart;
	ppc_md.power_off	 	= oak_power_off;
	ppc_md.halt		 	= oak_halt;

	ppc_md.time_init	 	= oak_time_init;
	ppc_md.set_rtc_time	 	= oak_set_rtc_time;
	ppc_md.get_rtc_time	 	= oak_get_rtc_time;
	ppc_md.calibrate_decr	 	= oak_calibrate_decr;

	ppc_md.kbd_setkeycode    	= NULL;
	ppc_md.kbd_getkeycode    	= NULL;
	ppc_md.kbd_translate     	= NULL;
	ppc_md.kbd_unexpected_up 	= NULL;
	ppc_md.kbd_leds          	= NULL;
	ppc_md.kbd_init_hw       	= NULL;
	ppc_md.ppc_kbd_sysrq_xlate	= NULL;
}

/*
 * Document me.
 */
void __init
oak_setup_arch(void)
{
	/* XXX - Implement me */
}

/*
 * int oak_show_percpuinfo()
 *
 * Description:
 *   This routine pretty-prints the platform's internal CPU and bus clock
 *   frequencies into the buffer for usage in /proc/cpuinfo.
 *
 * Input(s):
 *  *buffer - Buffer into which CPU and bus clock frequencies are to be
 *            printed.
 *
 * Output(s):
 *  *buffer - Buffer with the CPU and bus clock frequencies.
 *
 * Returns:
 *   The number of bytes copied into 'buffer' if OK, otherwise zero or less
 *   on error.
 */
int
oak_show_percpuinfo(struct seq_file *m, int i)
{
	bd_t *bp = (bd_t *)__res;

	seq_printf(m, "clock\t\t: %dMHz\n"
		   "bus clock\t\t: %dMHz\n",
		   bp->bi_intfreq / 1000000,
		   bp->bi_busfreq / 1000000);

	return 0;
}

/*
 * Document me.
 */
void __init
oak_init_IRQ(void)
{
	int i;

	ppc4xx_pic_init();

	for (i = 0; i < NR_IRQS; i++) {
		irq_desc[i].handler = ppc4xx_pic;
	}

	return;
}

/*
 * Document me.
 */
int
oak_get_irq(struct pt_regs *regs)
{
	return (ppc4xx_pic_get_irq(regs));
}

/*
 * Document me.
 */
void
oak_restart(char *cmd)
{
	abort();
}

/*
 * Document me.
 */
void
oak_power_off(void)
{
	oak_restart(NULL);
}

/*
 * Document me.
 */
void
oak_halt(void)
{
	oak_restart(NULL);
}

/*
 * Document me.
 */
long __init
oak_time_init(void)
{
	/* XXX - Implement me */
	return 0;
}

/*
 * Document me.
 */
int __init
oak_set_rtc_time(unsigned long time)
{
	/* XXX - Implement me */

	return (0);
}

/*
 * Document me.
 */
unsigned long __init
oak_get_rtc_time(void)
{
	/* XXX - Implement me */

	return (0);
}

/*
 * void __init oak_calibrate_decr()
 *
 * Description:
 *   This routine retrieves the internal processor frequency from the board
 *   information structure, sets up the kernel timer decrementer based on
 *   that value, enables the 403 programmable interval timer (PIT) and sets
 *   it up for auto-reload.
 *
 * Input(s):
 *   N/A
 *
 * Output(s):
 *   N/A
 *
 * Returns:
 *   N/A
 *
 */
void __init
oak_calibrate_decr(void)
{
	unsigned int freq;
	bd_t *bip = (bd_t *)__res;

	freq = bip->bi_intfreq;

	decrementer_count = freq / HZ;
	count_period_num = 1;
	count_period_den = freq;

	/* Enable the PIT and set auto-reload of its value */

	mtspr(SPRN_TCR, TCR_PIE | TCR_ARE);

	/* Clear any pending timer interrupts */

	mtspr(SPRN_TSR, TSR_ENW | TSR_WIS | TSR_PIS | TSR_FIS);
}
/*
 * BK Id: SCCS/s.m8260_setup.c 1.30 11/13/01 21:26:07 paulus
 */
/*
 *  linux/arch/ppc/kernel/setup.c
 *
 *  Copyright (C) 1995  Linus Torvalds
 *  Adapted from 'alpha' version by Gary Thomas
 *  Modified by Cort Dougan (cort@cs.nmt.edu)
 *  Modified for MBX using prep/chrp/pmac functions by Dan (dmalek@jlc.net)
 *  Further modified for generic 8xx and 8260 by Dan.
 */

/*
 * bootup setup stuff..
 */

#include <linux/config.h>
#include <linux/errno.h>
#include <linux/sched.h>
#include <linux/kernel.h>
#include <linux/mm.h>
#include <linux/stddef.h>
#include <linux/unistd.h>
#include <linux/ptrace.h>
#include <linux/slab.h>
#include <linux/user.h>
#include <linux/a.out.h>
#include <linux/tty.h>
#include <linux/major.h>
#include <linux/interrupt.h>
#include <linux/reboot.h>
#include <linux/init.h>
#include <linux/blk.h>
#include <linux/ioport.h>
#include <linux/ide.h>
#include <linux/seq_file.h>

#include <asm/mmu.h>
#include <asm/processor.h>
#include <asm/residual.h>
#include <asm/io.h>
#include <asm/pgtable.h>
#include <asm/ide.h>
#include <asm/mpc8260.h>
#include <asm/immap_8260.h>
#include <asm/machdep.h>

#include <asm/time.h>
#include "ppc8260_pic.h"

static int m8260_set_rtc_time(unsigned long time);
static unsigned long m8260_get_rtc_time(void);
static void m8260_calibrate_decr(void);

unsigned char __res[sizeof(bd_t)];

extern void m8260_cpm_reset(void);

static void __init
m8260_setup_arch(void)
{
	/* Reset the Communication Processor Module.
	*/
	m8260_cpm_reset();
}

static void
abort(void)
{
#ifdef CONFIG_XMON
	extern void xmon(void *);
	xmon(0);
#endif
	machine_restart(NULL);
}

/* The decrementer counts at the system (internal) clock frequency
 * divided by four.
 */
static void __init
m8260_calibrate_decr(void)
{
	bd_t	*binfo = (bd_t *)__res;
	int freq, divisor;

	freq = binfo->bi_busfreq;
        divisor = 4;
        tb_ticks_per_jiffy = freq / HZ / divisor;
	tb_to_us = mulhwu_scale_factor(freq / divisor, 1000000);
}

/* The 8260 has an internal 1-second timer update register that
 * we should use for this purpose.
 */
static uint rtc_time;

static static int
m8260_set_rtc_time(unsigned long time)
{
	rtc_time = time;
	return(0);
}

static unsigned long
m8260_get_rtc_time(void)
{

	/* Get time from the RTC.
	*/
	return((unsigned long)rtc_time);
}

static void
m8260_restart(char *cmd)
{
	extern void m8260_gorom(bd_t *bi, uint addr);
	uint	startaddr;

	/* Most boot roms have a warmstart as the second instruction
	 * of the reset vector.  If that doesn't work for you, change this
	 * or the reboot program to send a proper address.
	 */
	startaddr = 0xff000104;

	if (cmd != NULL) {
		if (!strncmp(cmd, "startaddr=", 10))
			startaddr = simple_strtoul(&cmd[10], NULL, 0);
	}

	m8260_gorom((unsigned int)__pa(__res), startaddr);
}

static void
m8260_power_off(void)
{
   m8260_restart(NULL);
}

static void
m8260_halt(void)
{
   m8260_restart(NULL);
}


static int
m8260_show_percpuinfo(struct seq_file *m, int i)
{
	bd_t	*bp;

	bp = (bd_t *)__res;
			
	seq_printf(m, "core clock\t: %d MHz\n"
		   "CPM  clock\t: %d MHz\n"
		   "bus  clock\t: %d MHz\n",
		   bp->bi_intfreq / 1000000,
		   bp->bi_cpmfreq / 1000000,
		   bp->bi_busfreq / 1000000);

	return 0;
}

/* Initialize the internal interrupt controller.  The number of
 * interrupts supported can vary with the processor type, and the
 * 8260 family can have up to 64.
 * External interrupts can be either edge or level triggered, and
 * need to be initialized by the appropriate driver.
 */
static void __init
m8260_init_IRQ(void)
{
	int i;
	void cpm_interrupt_init(void);

#if 0
        ppc8260_pic.irq_offset = 0;
#endif
        for ( i = 0 ; i < NR_SIU_INTS ; i++ )
                irq_desc[i].handler = &ppc8260_pic;
	
	/* Initialize the default interrupt mapping priorities,
	 * in case the boot rom changed something on us.
	 */
	immr->im_intctl.ic_sicr = 0;
	immr->im_intctl.ic_siprr = 0x05309770;
	immr->im_intctl.ic_scprrh = 0x05309770;
	immr->im_intctl.ic_scprrl = 0x05309770;

}

/*
 * Same hack as 8xx
 */
static unsigned long __init
m8260_find_end_of_memory(void)
{
	bd_t	*binfo;
	extern unsigned char __res[];
	
	binfo = (bd_t *)__res;

	return binfo->bi_memsize;
}

/* Map the IMMR, plus anything else we can cover
 * in that upper space according to the memory controller
 * chip select mapping.  Grab another bunch of space
 * below that for stuff we can't cover in the upper.
 */
static void __init
m8260_map_io(void)
{
	io_block_mapping(0xf0000000, 0xf0000000, 0x10000000, _PAGE_IO);
	io_block_mapping(0xe0000000, 0xe0000000, 0x10000000, _PAGE_IO);
}

void __init
platform_init(unsigned long r3, unsigned long r4, unsigned long r5,
	      unsigned long r6, unsigned long r7)
{

	if ( r3 )
		memcpy( (void *)__res,(void *)(r3+KERNELBASE), sizeof(bd_t) );
	
#ifdef CONFIG_BLK_DEV_INITRD
	/* take care of initrd if we have one */
	if ( r4 )
	{
		initrd_start = r4 + KERNELBASE;
		initrd_end = r5 + KERNELBASE;
	}
#endif /* CONFIG_BLK_DEV_INITRD */
	/* take care of cmd line */
	if ( r6 )
	{
		
		*(char *)(r7+KERNELBASE) = 0;
		strcpy(cmd_line, (char *)(r6+KERNELBASE));
	}

	ppc_md.setup_arch		= m8260_setup_arch;
	ppc_md.show_percpuinfo		= m8260_show_percpuinfo;
	ppc_md.irq_cannonicalize	= NULL;
	ppc_md.init_IRQ			= m8260_init_IRQ;
	ppc_md.get_irq			= m8260_get_irq;
	ppc_md.init			= NULL;

	ppc_md.restart			= m8260_restart;
	ppc_md.power_off		= m8260_power_off;
	ppc_md.halt			= m8260_halt;

	ppc_md.time_init		= NULL;
	ppc_md.set_rtc_time		= m8260_set_rtc_time;
	ppc_md.get_rtc_time		= m8260_get_rtc_time;
	ppc_md.calibrate_decr		= m8260_calibrate_decr;

	ppc_md.find_end_of_memory	= m8260_find_end_of_memory;
	ppc_md.setup_io_mappings	= m8260_map_io;

	ppc_md.kbd_setkeycode		= NULL;
	ppc_md.kbd_getkeycode		= NULL;
	ppc_md.kbd_translate		= NULL;
	ppc_md.kbd_unexpected_up	= NULL;
	ppc_md.kbd_leds			= NULL;
	ppc_md.kbd_init_hw		= NULL;
	ppc_md.ppc_kbd_sysrq_xlate	= NULL;
}

/* Mainly for ksyms.
*/
int
request_irq(unsigned int irq, void (*handler)(int, void *, struct pt_regs *),
		       unsigned long flag, const char *naem, void *dev)
{
	panic("request IRQ\n");
}
/*
 * BK Id: SCCS/s.m8xx_setup.c 1.40 11/13/01 21:26:07 paulus
 *
 *  linux/arch/ppc/kernel/setup.c
 *
 *  Copyright (C) 1995  Linus Torvalds
 *  Adapted from 'alpha' version by Gary Thomas
 *  Modified by Cort Dougan (cort@cs.nmt.edu)
 *  Modified for MBX using prep/chrp/pmac functions by Dan (dmalek@jlc.net)
 *  Further modified for generic 8xx by Dan.
 */

/*
 * bootup setup stuff..
 */

#include <linux/config.h>
#include <linux/errno.h>
#include <linux/sched.h>
#include <linux/kernel.h>
#include <linux/mm.h>
#include <linux/stddef.h>
#include <linux/unistd.h>
#include <linux/ptrace.h>
#include <linux/slab.h>
#include <linux/user.h>
#include <linux/a.out.h>
#include <linux/tty.h>
#include <linux/major.h>
#include <linux/interrupt.h>
#include <linux/reboot.h>
#include <linux/init.h>
#include <linux/blk.h>
#include <linux/ioport.h>
#include <linux/bootmem.h>
#include <linux/seq_file.h>

#include <asm/mmu.h>
#include <asm/processor.h>
#include <asm/residual.h>
#include <asm/io.h>
#include <asm/pgtable.h>
#include <asm/mpc8xx.h>
#include <asm/8xx_immap.h>
#include <asm/machdep.h>

#include <asm/time.h>
#include "ppc8xx_pic.h"

static int m8xx_set_rtc_time(unsigned long time);
static unsigned long m8xx_get_rtc_time(void);
void m8xx_calibrate_decr(void);

unsigned char __res[sizeof(bd_t)];

extern void m8xx_ide_init(void);

#ifdef CONFIG_BLK_DEV_RAM
extern int rd_doload;		/* 1 = load ramdisk, 0 = don't load */
extern int rd_prompt;		/* 1 = prompt for ramdisk, 0 = don't prompt */
extern int rd_image_start;	/* starting block # of image */
#endif

extern unsigned long find_available_memory(void);
extern void m8xx_cpm_reset(uint);

void __init
m8xx_setup_arch(void)
{
	int	cpm_page;
	
	cpm_page = (int) alloc_bootmem_pages(PAGE_SIZE);
	
	/* Reset the Communication Processor Module.
	*/
	m8xx_cpm_reset(cpm_page);

#ifdef notdef
	ROOT_DEV = to_kdev_t(0x0301); /* hda1 */
#endif
	
#ifdef CONFIG_BLK_DEV_INITRD
#if 0
	ROOT_DEV = to_kdev_t(0x0200); /* floppy */  
	rd_prompt = 1;
	rd_doload = 1;
	rd_image_start = 0;
#endif
#if 0	/* XXX this may need to be updated for the new bootmem stuff,
	   or possibly just deleted (see set_phys_avail() in init.c).
	   - paulus. */
	/* initrd_start and size are setup by boot/head.S and kernel/head.S */
	if ( initrd_start )
	{
		if (initrd_end > *memory_end_p)
		{
			printk("initrd extends beyond end of memory "
			       "(0x%08lx > 0x%08lx)\ndisabling initrd\n",
			       initrd_end,*memory_end_p);
			initrd_start = 0;
		}
	}
#endif
#endif
}

void
abort(void)
{
#ifdef CONFIG_XMON
	xmon(0);
#endif
	machine_restart(NULL);
}

/* A place holder for time base interrupts, if they are ever enabled. */
void timebase_interrupt(int irq, void * dev, struct pt_regs * regs)
{
	printk ("timebase_interrupt()\n");
}

/* The decrementer counts at the system (internal) clock frequency divided by
 * sixteen, or external oscillator divided by four.  We force the processor
 * to use system clock divided by sixteen.
 */
void __init m8xx_calibrate_decr(void)
{
	bd_t	*binfo = (bd_t *)__res;
	int freq, fp, divisor;

	/* Unlock the SCCR. */
	((volatile immap_t *)IMAP_ADDR)->im_clkrstk.cark_sccrk = ~KAPWR_KEY;
	((volatile immap_t *)IMAP_ADDR)->im_clkrstk.cark_sccrk = KAPWR_KEY;

	/* Force all 8xx processors to use divide by 16 processor clock. */
	((volatile immap_t *)IMAP_ADDR)->im_clkrst.car_sccr |= 0x02000000;

	/* Processor frequency is MHz.
	 * The value 'fp' is the number of decrementer ticks per second.
	 */
	fp = binfo->bi_intfreq / 16;
	freq = fp*60;	/* try to make freq/1e6 an integer */
        divisor = 60;
        printk("Decrementer Frequency = %d/%d\n", freq, divisor);
        tb_ticks_per_jiffy = freq / HZ / divisor;
	tb_to_us = mulhwu_scale_factor(freq / divisor, 1000000);

	/* Perform some more timer/timebase initialization.  This used
	 * to be done elsewhere, but other changes caused it to get
	 * called more than once....that is a bad thing.
	 *
	 * First, unlock all of the registers we are going to modify.
	 * To protect them from corruption during power down, registers
	 * that are maintained by keep alive power are "locked".  To
	 * modify these registers we have to write the key value to
	 * the key location associated with the register.
	 * Some boards power up with these unlocked, while others
	 * are locked.  Writing anything (including the unlock code?)
	 * to the unlocked registers will lock them again.  So, here
	 * we guarantee the registers are locked, then we unlock them
	 * for our use.
	 */
	((volatile immap_t *)IMAP_ADDR)->im_sitk.sitk_tbscrk = ~KAPWR_KEY;
	((volatile immap_t *)IMAP_ADDR)->im_sitk.sitk_rtcsck = ~KAPWR_KEY;
	((volatile immap_t *)IMAP_ADDR)->im_sitk.sitk_tbk    = ~KAPWR_KEY;
	((volatile immap_t *)IMAP_ADDR)->im_sitk.sitk_tbscrk =  KAPWR_KEY;
	((volatile immap_t *)IMAP_ADDR)->im_sitk.sitk_rtcsck =  KAPWR_KEY;
	((volatile immap_t *)IMAP_ADDR)->im_sitk.sitk_tbk    =  KAPWR_KEY;

	/* Disable the RTC one second and alarm interrupts. */
	((volatile immap_t *)IMAP_ADDR)->im_sit.sit_rtcsc &=
						~(RTCSC_SIE | RTCSC_ALE);
	/* Enable the RTC */
	((volatile immap_t *)IMAP_ADDR)->im_sit.sit_rtcsc |=
						(RTCSC_RTF | RTCSC_RTE);

	/* Enabling the decrementer also enables the timebase interrupts
	 * (or from the other point of view, to get decrementer interrupts
	 * we have to enable the timebase).  The decrementer interrupt
	 * is wired into the vector table, nothing to do here for that.
	 */
	((volatile immap_t *)IMAP_ADDR)->im_sit.sit_tbscr =
				((mk_int_int_mask(DEC_INTERRUPT) << 8) |
					 (TBSCR_TBF | TBSCR_TBE));

	if (request_8xxirq(DEC_INTERRUPT, timebase_interrupt, 0, "tbint", NULL) != 0)
		panic("Could not allocate timer IRQ!");
}

/* The RTC on the MPC8xx is an internal register.
 * We want to protect this during power down, so we need to unlock,
 * modify, and re-lock.
 */
static int
m8xx_set_rtc_time(unsigned long time)
{
	((volatile immap_t *)IMAP_ADDR)->im_sitk.sitk_rtck = KAPWR_KEY;
	((volatile immap_t *)IMAP_ADDR)->im_sit.sit_rtc = time;
	((volatile immap_t *)IMAP_ADDR)->im_sitk.sitk_rtck = ~KAPWR_KEY;
	return(0);
}

static unsigned long
m8xx_get_rtc_time(void)
{
	/* Get time from the RTC. */
	return((unsigned long)(((immap_t *)IMAP_ADDR)->im_sit.sit_rtc));
}

static void
m8xx_restart(char *cmd)
{
	__volatile__ unsigned char dummy;
	uint	msr;

	cli();
	((immap_t *)IMAP_ADDR)->im_clkrst.car_plprcr |= 0x00000080;

	/* Clear the ME bit in MSR to cause checkstop on machine check
	*/
	__asm__("mfmsr %0" : "=r" (msr) );
	msr &= ~0x1000;
	__asm__("mtmsr %0" : : "r" (msr) );

	dummy = ((immap_t *)IMAP_ADDR)->im_clkrst.res[0];
	printk("Restart failed\n"); 
	while(1);
}

static void
m8xx_power_off(void)
{
   m8xx_restart(NULL);
}

static void
m8xx_halt(void)
{
   m8xx_restart(NULL);
}


static int
m8xx_show_percpuinfo(struct seq_file *m, int i)
{
	bd_t	*bp;

	bp = (bd_t *)__res;
			
	seq_printf(m, "clock\t\t: %ldMHz\n"
		   "bus clock\t: %ldMHz\n",
		   bp->bi_intfreq / 1000000,
		   bp->bi_busfreq / 1000000);

	return 0;
}

/* Initialize the internal interrupt controller.  The number of
 * interrupts supported can vary with the processor type, and the
 * 82xx family can have up to 64.
 * External interrupts can be either edge or level triggered, and
 * need to be initialized by the appropriate driver.
 */
static void __init
m8xx_init_IRQ(void)
{
	int i;
	void cpm_interrupt_init(void);

        for ( i = 0 ; i < NR_SIU_INTS ; i++ )
                irq_desc[i].handler = &ppc8xx_pic;
	
	/* We could probably incorporate the CPM into the multilevel
	 * interrupt structure.
	 */
	cpm_interrupt_init();
        unmask_irq(CPM_INTERRUPT);

#if defined(CONFIG_PCI)
        for ( i = NR_SIU_INTS ; i < (NR_SIU_INTS + NR_8259_INTS) ; i++ )
                irq_desc[i].handler = &i8259_pic;
        i8259_pic.irq_offset = NR_SIU_INTS;
        i8259_init();
        request_8xxirq(ISA_BRIDGE_INT, mbx_i8259_action, 0, "8259 cascade", NULL);
        enable_irq(ISA_BRIDGE_INT);
#endif
}

/* -------------------------------------------------------------------- */

/*
 * This is a big hack right now, but it may turn into something real
 * someday.
 *
 * For the 8xx boards (at this time anyway), there is nothing to initialize
 * associated the PROM.  Rather than include all of the prom.c
 * functions in the image just to get prom_init, all we really need right
 * now is the initialization of the physical memory region.
 */
static unsigned long __init
m8xx_find_end_of_memory(void)
{
	bd_t	*binfo;
	extern unsigned char __res[];
	
	binfo = (bd_t *)__res;

	return binfo->bi_memsize;
}

/*
 * Now map in some of the I/O space that is generically needed
 * or shared with multiple devices.
 * All of this fits into the same 4Mbyte region, so it only
 * requires one page table page.  (or at least it used to  -- paulus)
 */
static void __init
m8xx_map_io(void)
{
        io_block_mapping(IMAP_ADDR, IMAP_ADDR, IMAP_SIZE, _PAGE_IO);
#ifdef CONFIG_MBX
        io_block_mapping(NVRAM_ADDR, NVRAM_ADDR, NVRAM_SIZE, _PAGE_IO);
        io_block_mapping(MBX_CSR_ADDR, MBX_CSR_ADDR, MBX_CSR_SIZE, _PAGE_IO);
        io_block_mapping(PCI_CSR_ADDR, PCI_CSR_ADDR, PCI_CSR_SIZE, _PAGE_IO);

	/* Map some of the PCI/ISA I/O space to get the IDE interface.
	*/
        io_block_mapping(PCI_ISA_IO_ADDR, PCI_ISA_IO_ADDR, 0x4000, _PAGE_IO);
        io_block_mapping(PCI_IDE_ADDR, PCI_IDE_ADDR, 0x4000, _PAGE_IO);
#endif
#if defined(CONFIG_RPXLITE) || defined(CONFIG_RPXCLASSIC)
	io_block_mapping(RPX_CSR_ADDR, RPX_CSR_ADDR, RPX_CSR_SIZE, _PAGE_IO);
#if !defined(CONFIG_PCI)
	io_block_mapping(_IO_BASE,_IO_BASE,_IO_BASE_SIZE, _PAGE_IO);
#endif
#endif
#ifdef CONFIG_HTDMSOUND
	io_block_mapping(HIOX_CSR_ADDR, HIOX_CSR_ADDR, HIOX_CSR_SIZE, _PAGE_IO);
#endif
#ifdef CONFIG_FADS
	io_block_mapping(BCSR_ADDR, BCSR_ADDR, BCSR_SIZE, _PAGE_IO);
#endif
#ifdef CONFIG_PCI
        io_block_mapping(PCI_CSR_ADDR, PCI_CSR_ADDR, PCI_CSR_SIZE, _PAGE_IO);
#endif
}

void __init
platform_init(unsigned long r3, unsigned long r4, unsigned long r5,
		unsigned long r6, unsigned long r7)
{
	if ( r3 )
		memcpy( (void *)__res,(void *)(r3+KERNELBASE), sizeof(bd_t) );
	
#ifdef CONFIG_PCI
	m8xx_setup_pci_ptrs();
#endif

#ifdef CONFIG_BLK_DEV_INITRD
	/* take care of initrd if we have one */
	if ( r4 )
	{
		initrd_start = r4 + KERNELBASE;
		initrd_end = r5 + KERNELBASE;
	}
#endif /* CONFIG_BLK_DEV_INITRD */
	/* take care of cmd line */
	if ( r6 )
	{	
		*(char *)(r7+KERNELBASE) = 0;
		strcpy(cmd_line, (char *)(r6+KERNELBASE));
	}

	ppc_md.setup_arch		= m8xx_setup_arch;
	ppc_md.show_percpuinfo		= m8xx_show_percpuinfo;
	ppc_md.irq_cannonicalize	= NULL;
	ppc_md.init_IRQ			= m8xx_init_IRQ;
	ppc_md.get_irq			= m8xx_get_irq;
	ppc_md.init			= NULL;

	ppc_md.restart			= m8xx_restart;
	ppc_md.power_off		= m8xx_power_off;
	ppc_md.halt			= m8xx_halt;

	ppc_md.time_init		= NULL;
	ppc_md.set_rtc_time		= m8xx_set_rtc_time;
	ppc_md.get_rtc_time		= m8xx_get_rtc_time;
	ppc_md.calibrate_decr		= m8xx_calibrate_decr;

	ppc_md.find_end_of_memory	= m8xx_find_end_of_memory;
	ppc_md.setup_io_mappings	= m8xx_map_io;

	ppc_md.kbd_setkeycode		= NULL;
	ppc_md.kbd_getkeycode		= NULL;
	ppc_md.kbd_translate		= NULL;
	ppc_md.kbd_unexpected_up	= NULL;
	ppc_md.kbd_leds			= NULL;
	ppc_md.kbd_init_hw		= NULL;
	ppc_md.ppc_kbd_sysrq_xlate	= NULL;

#if defined(CONFIG_BLK_DEV_IDE) || defined(CONFIG_BLK_DEV_IDE_MODULE)
	m8xx_ide_init();
#endif		
}
/*
 * BK Id: SCCS/s.open_pic_defs.h 1.8 08/20/01 22:33:28 paulus
 */
/*
 *  linux/openpic.h -- OpenPIC definitions
 *
 *  Copyright (C) 1997 Geert Uytterhoeven
 *
 *  This file is based on the following documentation:
 *
 *	The Open Programmable Interrupt Controller (PIC)
 *	Register Interface Specification Revision 1.2
 *
 *	Issue Date: October 1995
 *
 *	Issued jointly by Advanced Micro Devices and Cyrix Corporation
 *
 *	AMD is a registered trademark of Advanced Micro Devices, Inc.
 *	Copyright (C) 1995, Advanced Micro Devices, Inc. and Cyrix, Inc.
 *	All Rights Reserved.
 *
 *  To receive a copy of this documentation, send an email to openpic@amd.com.
 *
 *  This file is subject to the terms and conditions of the GNU General Public
 *  License.  See the file COPYING in the main directory of this archive
 *  for more details.
 */

#ifndef _LINUX_OPENPIC_H
#define _LINUX_OPENPIC_H

#ifdef __KERNEL__

    /*
     *  OpenPIC supports up to 2048 interrupt sources and up to 32 processors
     */

#define OPENPIC_MAX_SOURCES	2048
#define OPENPIC_MAX_PROCESSORS	32
#define OPENPIC_MAX_ISU		16

#define OPENPIC_NUM_TIMERS	4
#define OPENPIC_NUM_IPI		4
#define OPENPIC_NUM_PRI		16
#define OPENPIC_NUM_VECTORS	256



    /*
     *  OpenPIC Registers are 32 bits and aligned on 128 bit boundaries
     */

typedef struct _OpenPIC_Reg {
    u_int Reg;					/* Little endian! */
    char Pad[0xc];
} OpenPIC_Reg;


    /*
     *  Per Processor Registers
     */

typedef struct _OpenPIC_Processor {
    /*
     *  Private Shadow Registers (for SLiC backwards compatibility)
     */
    u_int IPI0_Dispatch_Shadow;			/* Write Only */
    char Pad1[0x4];
    u_int IPI0_Vector_Priority_Shadow;		/* Read/Write */
    char Pad2[0x34];
    /*
     *  Interprocessor Interrupt Command Ports
     */
    OpenPIC_Reg _IPI_Dispatch[OPENPIC_NUM_IPI];	/* Write Only */
    /*
     *  Current Task Priority Register
     */
    OpenPIC_Reg _Current_Task_Priority;		/* Read/Write */
    char Pad3[0x10];
    /*
     *  Interrupt Acknowledge Register
     */
    OpenPIC_Reg _Interrupt_Acknowledge;		/* Read Only */
    /*
     *  End of Interrupt (EOI) Register
     */
    OpenPIC_Reg _EOI;				/* Read/Write */
    char Pad5[0xf40];
} OpenPIC_Processor;


    /*
     *  Timer Registers
     */

typedef struct _OpenPIC_Timer {
    OpenPIC_Reg _Current_Count;			/* Read Only */
    OpenPIC_Reg _Base_Count;			/* Read/Write */
    OpenPIC_Reg _Vector_Priority;		/* Read/Write */
    OpenPIC_Reg _Destination;			/* Read/Write */
} OpenPIC_Timer;


    /*
     *  Global Registers
     */

typedef struct _OpenPIC_Global {
    /*
     *  Feature Reporting Registers
     */
    OpenPIC_Reg _Feature_Reporting0;		/* Read Only */
    OpenPIC_Reg _Feature_Reporting1;		/* Future Expansion */
    /*
     *  Global Configuration Registers
     */
    OpenPIC_Reg _Global_Configuration0;		/* Read/Write */
    OpenPIC_Reg _Global_Configuration1;		/* Future Expansion */
    /*
     *  Vendor Specific Registers
     */
    OpenPIC_Reg _Vendor_Specific[4];
    /*
     *  Vendor Identification Register
     */
    OpenPIC_Reg _Vendor_Identification;		/* Read Only */
    /*
     *  Processor Initialization Register
     */
    OpenPIC_Reg _Processor_Initialization;	/* Read/Write */
    /*
     *  IPI Vector/Priority Registers
     */
    OpenPIC_Reg _IPI_Vector_Priority[OPENPIC_NUM_IPI];	/* Read/Write */
    /*
     *  Spurious Vector Register
     */
    OpenPIC_Reg _Spurious_Vector;		/* Read/Write */
    /*
     *  Global Timer Registers
     */
    OpenPIC_Reg _Timer_Frequency;		/* Read/Write */
    OpenPIC_Timer Timer[OPENPIC_NUM_TIMERS];
    char Pad1[0xee00];
} OpenPIC_Global;


    /*
     *  Interrupt Source Registers
     */

typedef struct _OpenPIC_Source {
    OpenPIC_Reg _Vector_Priority;		/* Read/Write */
    OpenPIC_Reg _Destination;			/* Read/Write */
} OpenPIC_Source, *OpenPIC_SourcePtr;


    /*
     *  OpenPIC Register Map
     */

struct OpenPIC {
    char Pad1[0x1000];
    /*
     *  Global Registers
     */
    OpenPIC_Global Global;
    /*
     *  Interrupt Source Configuration Registers
     */
    OpenPIC_Source Source[OPENPIC_MAX_SOURCES];
    /*
     *  Per Processor Registers
     */
    OpenPIC_Processor Processor[OPENPIC_MAX_PROCESSORS];
};

extern volatile struct OpenPIC *OpenPIC;


    /*
     *  Current Task Priority Register
     */

#define OPENPIC_CURRENT_TASK_PRIORITY_MASK	0x0000000f

    /*
     *  Who Am I Register
     */

#define OPENPIC_WHO_AM_I_ID_MASK		0x0000001f

    /*
     *  Feature Reporting Register 0
     */

#define OPENPIC_FEATURE_LAST_SOURCE_MASK	0x07ff0000
#define OPENPIC_FEATURE_LAST_SOURCE_SHIFT	16
#define OPENPIC_FEATURE_LAST_PROCESSOR_MASK	0x00001f00
#define OPENPIC_FEATURE_LAST_PROCESSOR_SHIFT	8
#define OPENPIC_FEATURE_VERSION_MASK		0x000000ff

    /*
     *  Global Configuration Register 0
     */

#define OPENPIC_CONFIG_RESET			0x80000000
#define OPENPIC_CONFIG_8259_PASSTHROUGH_DISABLE	0x20000000
#define OPENPIC_CONFIG_BASE_MASK		0x000fffff

    /*
     *  Vendor Identification Register
     */

#define OPENPIC_VENDOR_ID_STEPPING_MASK		0x00ff0000
#define OPENPIC_VENDOR_ID_STEPPING_SHIFT	16
#define OPENPIC_VENDOR_ID_DEVICE_ID_MASK	0x0000ff00
#define OPENPIC_VENDOR_ID_DEVICE_ID_SHIFT	8
#define OPENPIC_VENDOR_ID_VENDOR_ID_MASK	0x000000ff

    /*
     *  Vector/Priority Registers
     */

#define OPENPIC_MASK				0x80000000
#define OPENPIC_ACTIVITY			0x40000000	/* Read Only */
#define OPENPIC_PRIORITY_MASK			0x000f0000
#define OPENPIC_PRIORITY_SHIFT			16
#define OPENPIC_VECTOR_MASK			0x000000ff


    /*
     *  Interrupt Source Registers
     */

#define OPENPIC_POLARITY_POSITIVE		0x00800000
#define OPENPIC_POLARITY_NEGATIVE		0x00000000
#define OPENPIC_POLARITY_MASK			0x00800000
#define OPENPIC_SENSE_LEVEL			0x00400000
#define OPENPIC_SENSE_EDGE			0x00000000
#define OPENPIC_SENSE_MASK			0x00400000


    /*
     *  Timer Registers
     */

#define OPENPIC_COUNT_MASK			0x7fffffff
#define OPENPIC_TIMER_TOGGLE			0x80000000
#define OPENPIC_TIMER_COUNT_INHIBIT		0x80000000


    /*
     *  Aliases to make life simpler
     */

/* Per Processor Registers */
#define IPI_Dispatch(i)			_IPI_Dispatch[i].Reg
#define Current_Task_Priority		_Current_Task_Priority.Reg
#define Interrupt_Acknowledge		_Interrupt_Acknowledge.Reg
#define EOI				_EOI.Reg

/* Global Registers */
#define Feature_Reporting0		_Feature_Reporting0.Reg
#define Feature_Reporting1		_Feature_Reporting1.Reg
#define Global_Configuration0		_Global_Configuration0.Reg
#define Global_Configuration1		_Global_Configuration1.Reg
#define Vendor_Specific(i)		_Vendor_Specific[i].Reg
#define Vendor_Identification		_Vendor_Identification.Reg
#define Processor_Initialization	_Processor_Initialization.Reg
#define IPI_Vector_Priority(i)		_IPI_Vector_Priority[i].Reg
#define Spurious_Vector			_Spurious_Vector.Reg
#define Timer_Frequency			_Timer_Frequency.Reg

/* Timer Registers */
#define Current_Count			_Current_Count.Reg
#define Base_Count			_Base_Count.Reg
#define Vector_Priority			_Vector_Priority.Reg
#define Destination			_Destination.Reg

/* Interrupt Source Registers */
#define Vector_Priority			_Vector_Priority.Reg
#define Destination			_Destination.Reg

#endif /* __KERNEL__ */

#endif /* _LINUX_OPENPIC_H */
/*
 * BK Id: SCCS/s.ppc4xx_pic.h 1.8 06/15/01 13:56:56 paulus
 */
/*
 *
 *    Copyright (c) 1999 Grant Erickson <grant@lcse.umn.edu>
 *
 *    Module name: ppc4xx_pic.h
 *
 *    Description:
 *      Interrupt controller driver for PowerPC 4xx-based processors.
 */

#ifndef	__PPC4XX_PIC_H__
#define	__PPC4XX_PIC_H__

#include <linux/config.h>
#include "local_irq.h"

/* External Global Variables */

extern struct hw_interrupt_type *ppc4xx_pic;


/* Function Prototypes */

extern void	 ppc4xx_pic_init(void);
extern int	 ppc4xx_pic_get_irq(struct pt_regs *regs);

#endif /* __PPC4XX_PIC_H__ */
/*
 * BK Id: SCCS/s.oak_setup.h 1.5 05/17/01 18:14:21 cort
 */
/*
 *
 *    Copyright (c) 1999-2000 Grant Erickson <grant@lcse.umn.edu>
 *
 *    Module name: oak_setup.h
 *
 *    Description:
 *      Architecture- / platform-specific boot-time initialization code for
 *      the IBM PowerPC 403GCX "Oak" evaluation board. Adapted from original
 *      code by Gary Thomas, Cort Dougan <cort@cs.nmt.edu>, and Dan Malek
 *      <dan@netx4.com>.
 *
 */

#ifndef	__OAK_SETUP_H__
#define	__OAK_SETUP_H__

#include <asm/ptrace.h>
#include <asm/board.h>


#ifdef __cplusplus
extern "C" {
#endif

extern unsigned char	 __res[sizeof(bd_t)];

extern void		 oak_init(unsigned long r3,
				  unsigned long ird_start,
				  unsigned long ird_end,
				  unsigned long cline_start,
				  unsigned long cline_end);
extern void		 oak_setup_arch(void);
extern int		 oak_setup_residual(char *buffer);
extern void		 oak_init_IRQ(void);
extern int		 oak_get_irq(struct pt_regs *regs);
extern void		 oak_restart(char *cmd);
extern void		 oak_power_off(void);
extern void		 oak_halt(void);
extern void		 oak_time_init(void);
extern int		 oak_set_rtc_time(unsigned long now);
extern unsigned long	 oak_get_rtc_time(void);
extern void		 oak_calibrate_decr(void);


#ifdef __cplusplus
}
#endif

#endif /* __OAK_SETUP_H__ */
/*
 * BK Id: SCCS/s.semaphore.c 1.12 05/17/01 18:14:22 cort
 */
/*
 * PowerPC-specific semaphore code.
 *
 * Copyright (C) 1999 Cort Dougan <cort@cs.nmt.edu>
 *
 * This program is free software; you can redistribute it and/or
 * modify it under the terms of the GNU General Public License
 * as published by the Free Software Foundation; either version
 * 2 of the License, or (at your option) any later version.
 *
 * April 2001 - Reworked by Paul Mackerras <paulus@samba.org>
 * to eliminate the SMP races in the old version between the updates
 * of `count' and `waking'.  Now we use negative `count' values to
 * indicate that some process(es) are waiting for the semaphore.
 */

#include <linux/sched.h>
#include <asm/atomic.h>
#include <asm/semaphore.h>

/*
 * Atomically update sem->count.
 * This does the equivalent of the following:
 *
 *	old_count = sem->count;
 *	tmp = MAX(old_count, 0) + incr;
 *	sem->count = tmp;
 *	return old_count;
 */
static inline int __sem_update_count(struct semaphore *sem, int incr)
{
	int old_count, tmp;

	__asm__ __volatile__("\n"
"1:	lwarx	%0,0,%3\n"
"	srawi	%1,%0,31\n"
"	andc	%1,%0,%1\n"
"	add	%1,%1,%4\n"
"	stwcx.	%1,0,%3\n"
"	bne	1b"
	: "=&r" (old_count), "=&r" (tmp), "=m" (sem->count)
	: "r" (&sem->count), "r" (incr), "m" (sem->count)
	: "cc");

	return old_count;
}

void __up(struct semaphore *sem)
{
	/*
	 * Note that we incremented count in up() before we came here,
	 * but that was ineffective since the result was <= 0, and
	 * any negative value of count is equivalent to 0.
	 * This ends up setting count to 1, unless count is now > 0
	 * (i.e. because some other cpu has called up() in the meantime),
	 * in which case we just increment count.
	 */
	__sem_update_count(sem, 1);
	wake_up(&sem->wait);
}

/*
 * Note that when we come in to __down or __down_interruptible,
 * we have already decremented count, but that decrement was
 * ineffective since the result was < 0, and any negative value
 * of count is equivalent to 0.
 * Thus it is only when we decrement count from some value > 0
 * that we have actually got the semaphore.
 */
void __down(struct semaphore *sem)
{
	struct task_struct *tsk = current;
	DECLARE_WAITQUEUE(wait, tsk);

	tsk->state = TASK_UNINTERRUPTIBLE;
	add_wait_queue_exclusive(&sem->wait, &wait);
	smp_wmb();

	/*
	 * Try to get the semaphore.  If the count is > 0, then we've
	 * got the semaphore; we decrement count and exit the loop.
	 * If the count is 0 or negative, we set it to -1, indicating
	 * that we are asleep, and then sleep.
	 */
	while (__sem_update_count(sem, -1) <= 0) {
		schedule();
		tsk->state = TASK_UNINTERRUPTIBLE;
	}
	remove_wait_queue(&sem->wait, &wait);
	tsk->state = TASK_RUNNING;

	/*
	 * If there are any more sleepers, wake one of them up so
	 * that it can either get the semaphore, or set count to -1
	 * indicating that there are still processes sleeping.
	 */
	wake_up(&sem->wait);
}

int __down_interruptible(struct semaphore * sem)
{
	int retval = 0;
	struct task_struct *tsk = current;
	DECLARE_WAITQUEUE(wait, tsk);

	tsk->state = TASK_INTERRUPTIBLE;
	add_wait_queue_exclusive(&sem->wait, &wait);
	smp_wmb();

	while (__sem_update_count(sem, -1) <= 0) {
		if (signal_pending(current)) {
			/*
			 * A signal is pending - give up trying.
			 * Set sem->count to 0 if it is negative,
			 * since we are no longer sleeping.
			 */
			__sem_update_count(sem, 0);
			retval = -EINTR;
			break;
		}
		schedule();
		tsk->state = TASK_INTERRUPTIBLE;
	}
	tsk->state = TASK_RUNNING;
	remove_wait_queue(&sem->wait, &wait);
	wake_up(&sem->wait);
	return retval;
}
/*
 * BK Id: SCCS/s.proc_rtas.c 1.5 05/17/01 18:14:22 cort
 */
/*
 *   arch/ppc/kernel/proc_rtas.c
 *   Copyright (C) 2000 Tilmann Bitterberg
 *   (tilmann@bitterberg.de)
 *
 *   RTAS (Runtime Abstraction Services) stuff
 *   Intention is to provide a clean user interface
 *   to use the RTAS.
 *
 *   TODO:
 *   Split off a header file and maybe move it to a different
 *   location. Write Documentation on what the /proc/rtas/ entries
 *   actually do.
 */

#include <linux/errno.h>
#include <linux/sched.h>
#include <linux/proc_fs.h>
#include <linux/stat.h>
#include <linux/ctype.h>
#include <linux/time.h>
#include <linux/string.h>

#include <asm/uaccess.h>
#include <asm/bitops.h>
#include <asm/processor.h>
#include <asm/io.h>
#include <asm/prom.h>
#include <asm/machdep.h> /* for ppc_md */
#include <asm/time.h>

/* Token for Sensors */
#define KEY_SWITCH		0x0001
#define ENCLOSURE_SWITCH	0x0002
#define THERMAL_SENSOR		0x0003
#define LID_STATUS		0x0004
#define POWER_SOURCE		0x0005
#define BATTERY_VOLTAGE		0x0006
#define BATTERY_REMAINING	0x0007
#define BATTERY_PERCENTAGE	0x0008
#define EPOW_SENSOR		0x0009
#define BATTERY_CYCLESTATE	0x000a
#define BATTERY_CHARGING	0x000b

/* IBM specific sensors */
#define IBM_SURVEILLANCE	0x2328 /* 9000 */
#define IBM_FANRPM		0x2329 /* 9001 */
#define IBM_VOLTAGE		0x232a /* 9002 */
#define IBM_DRCONNECTOR		0x232b /* 9003 */
#define IBM_POWERSUPPLY		0x232c /* 9004 */
#define IBM_INTQUEUE		0x232d /* 9005 */

/* Status return values */
#define SENSOR_CRITICAL_HIGH	13
#define SENSOR_WARNING_HIGH	12
#define SENSOR_NORMAL		11
#define SENSOR_WARNING_LOW	10
#define SENSOR_CRITICAL_LOW	 9
#define SENSOR_SUCCESS		 0
#define SENSOR_HW_ERROR		-1
#define SENSOR_BUSY		-2
#define SENSOR_NOT_EXIST	-3
#define SENSOR_DR_ENTITY	-9000

/* Location Codes */
#define LOC_SCSI_DEV_ADDR	'A'
#define LOC_SCSI_DEV_LOC	'B'
#define LOC_CPU			'C'
#define LOC_DISKETTE		'D'
#define LOC_ETHERNET		'E'
#define LOC_FAN			'F'
#define LOC_GRAPHICS		'G'
/* reserved / not used		'H' */
#define LOC_IO_ADAPTER		'I'
/* reserved / not used		'J' */
#define LOC_KEYBOARD		'K'
#define LOC_LCD			'L'
#define LOC_MEMORY		'M'
#define LOC_NV_MEMORY		'N'
#define LOC_MOUSE		'O'
#define LOC_PLANAR		'P'
#define LOC_OTHER_IO		'Q'
#define LOC_PARALLEL		'R'
#define LOC_SERIAL		'S'
#define LOC_DEAD_RING		'T'
#define LOC_RACKMOUNTED		'U' /* for _u_nit is rack mounted */
#define LOC_VOLTAGE		'V'
#define LOC_SWITCH_ADAPTER	'W'
#define LOC_OTHER		'X'
#define LOC_FIRMWARE		'Y'
#define LOC_SCSI		'Z'

/* Tokens for indicators */
#define TONE_FREQUENCY		0x0001 /* 0 - 1000 (HZ)*/
#define TONE_VOLUME		0x0002 /* 0 - 100 (%) */
#define SYSTEM_POWER_STATE	0x0003 
#define WARNING_LIGHT		0x0004
#define DISK_ACTIVITY_LIGHT	0x0005
#define HEX_DISPLAY_UNIT	0x0006
#define BATTERY_WARNING_TIME	0x0007
#define CONDITION_CYCLE_REQUEST	0x0008
#define SURVEILLANCE_INDICATOR	0x2328 /* 9000 */
#define DR_ACTION		0x2329 /* 9001 */
#define DR_INDICATOR		0x232a /* 9002 */
/* 9003 - 9004: Vendor specific */
#define GLOBAL_INTERRUPT_QUEUE	0x232d /* 9005 */
/* 9006 - 9999: Vendor specific */

/* other */
#define MAX_SENSORS		 17  /* I only know of 17 sensors */    
#define MAX_LINELENGTH          256
#define SENSOR_PREFIX		"ibm,sensor-"
#define cel_to_fahr(x)		((x*9/5)+32)


/* Globals */
static struct proc_dir_entry *proc_rtas;
static struct rtas_sensors sensors;
static struct device_node *rtas;
static unsigned long power_on_time = 0; /* Save the time the user set */
static char progress_led[MAX_LINELENGTH];

static unsigned long rtas_tone_frequency = 1000;
static unsigned long rtas_tone_volume = 0;

/* ****************STRUCTS******************************************* */
struct individual_sensor {
	unsigned int token;
	unsigned int quant;
};

struct rtas_sensors {
        struct individual_sensor sensor[MAX_SENSORS];
	unsigned int quant;
};

/* ****************************************************************** */
/* Declarations */
static int ppc_rtas_sensor_read(char * buf, char ** start, off_t off,
		int count, int *eof, void *data);
static ssize_t ppc_rtas_clock_read(struct file * file, char * buf, 
		size_t count, loff_t *ppos);
static ssize_t ppc_rtas_clock_write(struct file * file, const char * buf, 
		size_t count, loff_t *ppos);
static ssize_t ppc_rtas_progress_read(struct file * file, char * buf,
		size_t count, loff_t *ppos);
static ssize_t ppc_rtas_progress_write(struct file * file, const char * buf,
		size_t count, loff_t *ppos);
static ssize_t ppc_rtas_poweron_read(struct file * file, char * buf,
		size_t count, loff_t *ppos);
static ssize_t ppc_rtas_poweron_write(struct file * file, const char * buf,
		size_t count, loff_t *ppos);

static ssize_t ppc_rtas_tone_freq_write(struct file * file, const char * buf,
		size_t count, loff_t *ppos);
static ssize_t ppc_rtas_tone_freq_read(struct file * file, char * buf,
		size_t count, loff_t *ppos);
static ssize_t ppc_rtas_tone_volume_write(struct file * file, const char * buf,
		size_t count, loff_t *ppos);
static ssize_t ppc_rtas_tone_volume_read(struct file * file, char * buf,
		size_t count, loff_t *ppos);

struct file_operations ppc_rtas_poweron_operations = {
	read:		ppc_rtas_poweron_read,
	write:		ppc_rtas_poweron_write
};
struct file_operations ppc_rtas_progress_operations = {
	read:		ppc_rtas_progress_read,
	write:		ppc_rtas_progress_write
};

struct file_operations ppc_rtas_clock_operations = {
	read:		ppc_rtas_clock_read,
	write:		ppc_rtas_clock_write
};

struct file_operations ppc_rtas_tone_freq_operations = {
	read:		ppc_rtas_tone_freq_read,
	write:		ppc_rtas_tone_freq_write
};
struct file_operations ppc_rtas_tone_volume_operations = {
	read:		ppc_rtas_tone_volume_read,
	write:		ppc_rtas_tone_volume_write
};

int ppc_rtas_find_all_sensors (void);
int ppc_rtas_process_sensor(struct individual_sensor s, int state, 
		int error, char * buf);
char * ppc_rtas_process_error(int error);
int get_location_code(struct individual_sensor s, char * buf);
int check_location_string (char *c, char * buf);
int check_location (char *c, int idx, char * buf);

/* ****************************************************************** */
/* MAIN                                                               */
/* ****************************************************************** */
void proc_rtas_init(void)
{
	struct proc_dir_entry *entry;

	rtas = find_devices("rtas");
	if ((rtas == 0) || (_machine != _MACH_chrp)) {
		return;
	}
	
	proc_rtas = proc_mkdir("rtas", 0);
	if (proc_rtas == 0)
		return;

	/* /proc/rtas entries */

	entry = create_proc_entry("progress", S_IRUGO|S_IWUSR, proc_rtas);
	if (entry) entry->proc_fops = &ppc_rtas_progress_operations;

	entry = create_proc_entry("clock", S_IRUGO|S_IWUSR, proc_rtas); 
	if (entry) entry->proc_fops = &ppc_rtas_clock_operations;

	entry = create_proc_entry("poweron", S_IWUSR|S_IRUGO, proc_rtas); 
	if (entry) entry->proc_fops = &ppc_rtas_poweron_operations;

	create_proc_read_entry("sensors", S_IRUGO, proc_rtas, 
			ppc_rtas_sensor_read, NULL);
	
	entry = create_proc_entry("frequency", S_IWUSR|S_IRUGO, proc_rtas); 
	if (entry) entry->proc_fops = &ppc_rtas_tone_freq_operations;

	entry = create_proc_entry("volume", S_IWUSR|S_IRUGO, proc_rtas); 
	if (entry) entry->proc_fops = &ppc_rtas_tone_volume_operations;
}

/* ****************************************************************** */
/* POWER-ON-TIME                                                      */
/* ****************************************************************** */
static ssize_t ppc_rtas_poweron_write(struct file * file, const char * buf,
		size_t count, loff_t *ppos)
{
	struct rtc_time tm;
	unsigned long nowtime;
	char *dest;
	int error;

	nowtime = simple_strtoul(buf, &dest, 10);
	if (*dest != '\0' && *dest != '\n') {
		printk("ppc_rtas_poweron_write: Invalid time\n");
		return count;
	}
	power_on_time = nowtime; /* save the time */

	to_tm(nowtime, &tm);

	error = call_rtas("set-time-for-power-on", 7, 1, NULL, 
			tm.tm_year, tm.tm_mon, tm.tm_mday, 
			tm.tm_hour, tm.tm_min, tm.tm_sec, 0 /* nano */);
	if (error != 0)
		printk(KERN_WARNING "error: setting poweron time returned: %s\n", 
				ppc_rtas_process_error(error));
	return count;
}
/* ****************************************************************** */
static ssize_t ppc_rtas_poweron_read(struct file * file, char * buf,
		size_t count, loff_t *ppos)
{
	int n;
	if (power_on_time == 0)
		n = sprintf(buf, "Power on time not set\n");
	else
		n = sprintf(buf, "%lu\n", power_on_time);

	if (*ppos >= strlen(buf))
		return 0;
	if (n > strlen(buf) - *ppos)
		n = strlen(buf) - *ppos;
	if (n > count)
		n = count;
	*ppos += n;
	return n;
}

/* ****************************************************************** */
/* PROGRESS                                                           */
/* ****************************************************************** */
static ssize_t ppc_rtas_progress_write(struct file * file, const char * buf,
		size_t count, loff_t *ppos)
{
	unsigned long hex;

	strcpy(progress_led, buf); /* save the string */
	/* Lets see if the user passed hexdigits */
	hex = simple_strtoul(buf, NULL, 10);
	
	ppc_md.progress ((char *)buf, hex);
	return count;

	/* clear the line */ /* ppc_md.progress("                   ", 0xffff);*/
}
/* ****************************************************************** */
static ssize_t ppc_rtas_progress_read(struct file * file, char * buf,
		size_t count, loff_t *ppos)
{
	int n = 0;
	if (progress_led != NULL)
		n = sprintf (buf, "%s\n", progress_led);
	if (*ppos >= strlen(buf))
		return 0;
	if (n > strlen(buf) - *ppos)
		n = strlen(buf) - *ppos;
	if (n > count)
		n = count;
	*ppos += n;
	return n;
}

/* ****************************************************************** */
/* CLOCK                                                              */
/* ****************************************************************** */
static ssize_t ppc_rtas_clock_write(struct file * file, const char * buf, 
		size_t count, loff_t *ppos)
{
	struct rtc_time tm;
	unsigned long nowtime;
	char *dest;
	int error;

	nowtime = simple_strtoul(buf, &dest, 10);
	if (*dest != '\0' && *dest != '\n') {
		printk("ppc_rtas_clock_write: Invalid time\n");
		return count;
	}

	to_tm(nowtime, &tm);
	error = call_rtas("set-time-of-day", 7, 1, NULL, 
			tm.tm_year, tm.tm_mon, tm.tm_mday, 
			tm.tm_hour, tm.tm_min, tm.tm_sec, 0);
	if (error != 0)
		printk(KERN_WARNING "error: setting the clock returned: %s\n", 
				ppc_rtas_process_error(error));
	return count;
}
/* ****************************************************************** */
static ssize_t ppc_rtas_clock_read(struct file * file, char * buf, 
		size_t count, loff_t *ppos)
{
	unsigned int year, mon, day, hour, min, sec;
	unsigned long *ret = kmalloc(4*8, GFP_KERNEL);
	int n, error;

	error = call_rtas("get-time-of-day", 0, 8, ret);
	
	year = ret[0]; mon  = ret[1]; day  = ret[2];
	hour = ret[3]; min  = ret[4]; sec  = ret[5];

	if (error != 0){
		printk(KERN_WARNING "error: reading the clock returned: %s\n", 
				ppc_rtas_process_error(error));
		n = sprintf (buf, "0");
	} else { 
		n = sprintf (buf, "%lu\n", mktime(year, mon, day, hour, min, sec));
	}
	kfree(ret);

	if (*ppos >= strlen(buf))
		return 0;
	if (n > strlen(buf) - *ppos)
		n = strlen(buf) - *ppos;
	if (n > count)
		n = count;
	*ppos += n;
	return n;
}

/* ****************************************************************** */
/* SENSOR STUFF                                                       */
/* ****************************************************************** */
static int ppc_rtas_sensor_read(char * buf, char ** start, off_t off,
		int count, int *eof, void *data)
{
	int i,j,n;
	unsigned long ret;
	int state, error;
	char buffer[MAX_LINELENGTH*MAX_SENSORS]; /* May not be enough */

	if (count < 0)
		return -EINVAL;

	n  = sprintf ( buffer  , "RTAS (RunTime Abstraction Services) Sensor Information\n");
	n += sprintf ( buffer+n, "Sensor\t\tValue\t\tCondition\tLocation\n");
	n += sprintf ( buffer+n, "********************************************************\n");

	if (ppc_rtas_find_all_sensors() != 0) {
		n += sprintf ( buffer+n, "\nNo sensors are available\n");
		goto return_string;
	}

	for (i=0; i<sensors.quant; i++) {
		j = sensors.sensor[i].quant;
		/* A sensor may have multiple instances */
		while (j >= 0) {
			error =	call_rtas("get-sensor-state", 2, 2, &ret, 
				  sensors.sensor[i].token, sensors.sensor[i].quant-j);
			state = (int) ret;
			n += ppc_rtas_process_sensor(sensors.sensor[i], state, error, buffer+n );
			n += sprintf (buffer+n, "\n");
			j--;
		} /* while */
	} /* for */

return_string:
	if (off >= strlen(buffer)) {
		*eof = 1;
		return 0;
	}
	if (n > strlen(buffer) - off)
		n = strlen(buffer) - off;
	if (n > count)
		n = count;
	else
		*eof = 1;
	memcpy(buf, buffer + off, n);
	*start = buf;
	return n;
}

/* ****************************************************************** */

int ppc_rtas_find_all_sensors (void)
{
	unsigned long *utmp;
	int len, i, j;

	utmp = (unsigned long *) get_property(rtas, "rtas-sensors", &len);
	if (utmp == NULL) {
		printk (KERN_ERR "error: could not get rtas-sensors\n");
		return 1;
	}

	sensors.quant = len / 8;      /* int + int */

	for (i=0, j=0; j<sensors.quant; i+=2, j++) {
		sensors.sensor[j].token = utmp[i];
		sensors.sensor[j].quant = utmp[i+1];
	}
	return 0;
}

/* ****************************************************************** */
/*
 * Builds a string of what rtas returned
 */
char * ppc_rtas_process_error(int error)
{
	switch (error) {
		case SENSOR_CRITICAL_HIGH:
			return "(critical high)";
		case SENSOR_WARNING_HIGH:
			return "(warning high)";
		case SENSOR_NORMAL:
			return "(normal)";
		case SENSOR_WARNING_LOW:
			return "(warning low)";
		case SENSOR_CRITICAL_LOW:
			return "(critical low)";
		case SENSOR_SUCCESS:
			return "(read ok)";
		case SENSOR_HW_ERROR:
			return "(hardware error)";
		case SENSOR_BUSY:
			return "(busy)";
		case SENSOR_NOT_EXIST:
			return "(non existant)";
		case SENSOR_DR_ENTITY:
			return "(dr entity removed)";
		default:
			return "(UNKNOWN)";
	}
}

/* ****************************************************************** */
/*
 * Builds a string out of what the sensor said
 */

int ppc_rtas_process_sensor(struct individual_sensor s, int state, 
		int error, char * buf) 
{
	/* Defined return vales */
	const char * key_switch[]        = { "Off\t", "Normal\t", "Secure\t", "Mainenance" };
	const char * enclosure_switch[]  = { "Closed", "Open" };
	const char * lid_status[]        = { " ", "Open", "Closed" };
	const char * power_source[]      = { "AC\t", "Battery", "AC & Battery" };
	const char * battery_remaining[] = { "Very Low", "Low", "Mid", "High" };
	const char * epow_sensor[]       = { 
		"EPOW Reset", "Cooling warning", "Power warning",
		"System shutdown", "System halt", "EPOW main enclosure",
		"EPOW power off" };
	const char * battery_cyclestate[]  = { "None", "In progress", "Requested" };
	const char * battery_charging[]    = { "Charging", "Discharching", "No current flow" };
	const char * ibm_drconnector[]     = { "Empty", "Present" };
	const char * ibm_intqueue[]        = { "Disabled", "Enabled" };

	int have_strings = 0;
	int temperature = 0;
	int unknown = 0;
	int n = 0;

	/* What kind of sensor do we have here? */
	switch (s.token) {
		case KEY_SWITCH:
			n += sprintf(buf+n, "Key switch:\t");
			n += sprintf(buf+n, "%s\t", key_switch[state]);
			have_strings = 1;
			break;
		case ENCLOSURE_SWITCH:
			n += sprintf(buf+n, "Enclosure switch:\t");
			n += sprintf(buf+n, "%s\t", enclosure_switch[state]);
			have_strings = 1;
			break;
		case THERMAL_SENSOR:
			n += sprintf(buf+n, "Temp. (�C/�F):\t");
			temperature = 1;
			break;
		case LID_STATUS:
			n += sprintf(buf+n, "Lid status:\t");
			n += sprintf(buf+n, "%s\t", lid_status[state]);
			have_strings = 1;
			break;
		case POWER_SOURCE:
			n += sprintf(buf+n, "Power source:\t");
			n += sprintf(buf+n, "%s\t", power_source[state]);
			have_strings = 1;
			break;
		case BATTERY_VOLTAGE:
			n += sprintf(buf+n, "Battery voltage:\t");
			break;
		case BATTERY_REMAINING:
			n += sprintf(buf+n, "Battery remaining:\t");
			n += sprintf(buf+n, "%s\t", battery_remaining[state]);
			have_strings = 1;
			break;
		case BATTERY_PERCENTAGE:
			n += sprintf(buf+n, "Battery percentage:\t");
			break;
		case EPOW_SENSOR:
			n += sprintf(buf+n, "EPOW Sensor:\t");
			n += sprintf(buf+n, "%s\t", epow_sensor[state]);
			have_strings = 1;
			break;
		case BATTERY_CYCLESTATE:
			n += sprintf(buf+n, "Battery cyclestate:\t");
			n += sprintf(buf+n, "%s\t", battery_cyclestate[state]);
			have_strings = 1;
			break;
		case BATTERY_CHARGING:
			n += sprintf(buf+n, "Battery Charging:\t");
			n += sprintf(buf+n, "%s\t", battery_charging[state]);
			have_strings = 1;
			break;
		case IBM_SURVEILLANCE:
			n += sprintf(buf+n, "Surveillance:\t");
			break;
		case IBM_FANRPM:
			n += sprintf(buf+n, "Fan (rpm):\t");
			break;
		case IBM_VOLTAGE:
			n += sprintf(buf+n, "Voltage (mv):\t");
			break;
		case IBM_DRCONNECTOR:
			n += sprintf(buf+n, "DR connector:\t");
			n += sprintf(buf+n, "%s\t", ibm_drconnector[state]);
			have_strings = 1;
			break;
		case IBM_POWERSUPPLY:
			n += sprintf(buf+n, "Powersupply:\t");
			break;
		case IBM_INTQUEUE:
			n += sprintf(buf+n, "Interrupt queue:\t");
			n += sprintf(buf+n, "%s\t", ibm_intqueue[state]);
			have_strings = 1;
			break;
		default:
			n += sprintf(buf+n,  "Unkown sensor (type %d), ignoring it\n",
					s.token);
			unknown = 1;
			have_strings = 1;
			break;
	}
	if (have_strings == 0) {
		if (temperature) {
			n += sprintf(buf+n, "%4d /%4d\t", state, cel_to_fahr(state));
		} else
			n += sprintf(buf+n, "%10d\t", state);
	}
	if (unknown == 0) {
		n += sprintf ( buf+n, "%s\t", ppc_rtas_process_error(error));
		n += get_location_code(s, buf+n);
	}
	return n;
}

/* ****************************************************************** */

int check_location (char *c, int idx, char * buf)
{
	int n = 0;

	switch (*(c+idx)) {
		case LOC_PLANAR:
			n += sprintf ( buf, "Planar #%c", *(c+idx+1));
			break;
		case LOC_CPU:
			n += sprintf ( buf, "CPU #%c", *(c+idx+1));
			break;
		case LOC_FAN:
			n += sprintf ( buf, "Fan #%c", *(c+idx+1));
			break;
		case LOC_RACKMOUNTED:
			n += sprintf ( buf, "Rack #%c", *(c+idx+1));
			break;
		case LOC_VOLTAGE:
			n += sprintf ( buf, "Voltage #%c", *(c+idx+1));
			break;
		case LOC_LCD:
			n += sprintf ( buf, "LCD #%c", *(c+idx+1));
			break;
		case '.':
			n += sprintf ( buf, "- %c", *(c+idx+1));
		default:
			n += sprintf ( buf, "Unknown location");
			break;
	}
	return n;
}


/* ****************************************************************** */
/* 
 * Format: 
 * ${LETTER}${NUMBER}[[-/]${LETTER}${NUMBER} [ ... ] ]
 * the '.' may be an abbrevation
 */
int check_location_string (char *c, char *buf)
{
	int n=0,i=0;

	while (c[i]) {
		if (isalpha(c[i]) || c[i] == '.') {
			 n += check_location(c, i, buf+n);
		}
		else if (c[i] == '/' || c[i] == '-')
			n += sprintf(buf+n, " at ");
		i++;
	}
	return n;
}


/* ****************************************************************** */

int get_location_code(struct individual_sensor s, char * buffer)
{
	char rstr[512], tmp[10], tmp2[10];
	int n=0, i=0, llen, len;
	/* char *buf = kmalloc(MAX_LINELENGTH, GFP_KERNEL); */
	char *ret;

	static int pos = 0; /* remember position where buffer was */

	/* construct the sensor number like 0003 */
	/* fill with zeros */
	n = sprintf(tmp, "%d", s.token);
	len = strlen(tmp);
	while (strlen(tmp) < 4)
		n += sprintf (tmp+n, "0");
	
	/* invert the string */
	while (tmp[i]) {
		if (i<len)
			tmp2[4-len+i] = tmp[i];
		else
			tmp2[3-i] = tmp[i];
		i++;
	}
	tmp2[4] = '\0';

	sprintf (rstr, SENSOR_PREFIX"%s", tmp2);

	ret = (char *) get_property(rtas, rstr, &llen);

	n=0;
	if (ret[0] == '\0')
		n += sprintf ( buffer+n, "--- ");/* does not have a location */
	else {
		char t[50];
		ret += pos;

		n += check_location_string(ret, buffer + n);
		n += sprintf ( buffer+n, " ");
		/* see how many characters we have printed */
		sprintf ( t, "%s ", ret);

		pos += strlen(t);
		if (pos >= llen) pos=0;
	}
	return n;
}
/* ****************************************************************** */
/* INDICATORS - Tone Frequency                                        */
/* ****************************************************************** */
static ssize_t ppc_rtas_tone_freq_write(struct file * file, const char * buf,
		size_t count, loff_t *ppos)
{
	unsigned long freq;
	char *dest;
	int error;
	freq = simple_strtoul(buf, &dest, 10);
	if (*dest != '\0' && *dest != '\n') {
		printk("ppc_rtas_tone_freq_write: Invalid tone freqency\n");
		return count;
	}
	if (freq < 0) freq = 0;
	rtas_tone_frequency = freq; /* save it for later */
	error = call_rtas("set-indicator", 3, 1, NULL,
			TONE_FREQUENCY, 0, freq);
	if (error != 0)
		printk(KERN_WARNING "error: setting tone frequency returned: %s\n", 
				ppc_rtas_process_error(error));
	return count;
}
/* ****************************************************************** */
static ssize_t ppc_rtas_tone_freq_read(struct file * file, char * buf,
		size_t count, loff_t *ppos)
{
	int n;
	n = sprintf(buf, "%lu\n", rtas_tone_frequency);

	if (*ppos >= strlen(buf))
		return 0;
	if (n > strlen(buf) - *ppos)
		n = strlen(buf) - *ppos;
	if (n > count)
		n = count;
	*ppos += n;
	return n;
}
/* ****************************************************************** */
/* INDICATORS - Tone Volume                                           */
/* ****************************************************************** */
static ssize_t ppc_rtas_tone_volume_write(struct file * file, const char * buf,
		size_t count, loff_t *ppos)
{
	unsigned long volume;
	char *dest;
	int error;
	volume = simple_strtoul(buf, &dest, 10);
	if (*dest != '\0' && *dest != '\n') {
		printk("ppc_rtas_tone_volume_write: Invalid tone volume\n");
		return count;
	}
	if (volume < 0) volume = 0;
	if (volume > 100) volume = 100;
	
        rtas_tone_volume = volume; /* save it for later */
	error = call_rtas("set-indicator", 3, 1, NULL,
			TONE_VOLUME, 0, volume);
	if (error != 0)
		printk(KERN_WARNING "error: setting tone volume returned: %s\n", 
				ppc_rtas_process_error(error));
	return count;
}
/* ****************************************************************** */
static ssize_t ppc_rtas_tone_volume_read(struct file * file, char * buf,
		size_t count, loff_t *ppos)
{
	int n;
	n = sprintf(buf, "%lu\n", rtas_tone_volume);

	if (*ppos >= strlen(buf))
		return 0;
	if (n > strlen(buf) - *ppos)
		n = strlen(buf) - *ppos;
	if (n > count)
		n = count;
	*ppos += n;
	return n;
}
/*
 * BK Id: SCCS/s.head_4xx.S 1.6 05/21/01 11:50:00 paulus
 */
/*
 *    Copyright (c) 1995-1996 Gary Thomas <gdt@linuxppc.org>
 *      Initial PowerPC version.
 *    Copyright (c) 1996 Cort Dougan <cort@cs.nmt.edu>
 *      Rewritten for PReP
 *    Copyright (c) 1996 Paul Mackerras <paulus@cs.anu.edu.au>
 *      Low-level exception handers, MMU support, and rewrite.
 *    Copyright (c) 1997 Dan Malek <dmalek@jlc.net>
 *      PowerPC 8xx modifications.
 *    Copyright (c) 1998-1999 TiVo, Inc.
 *      PowerPC 403GCX modifications.
 *    Copyright (c) 1999 Grant Erickson <grant@lcse.umn.edu>
 *      PowerPC 403GCX/405GP modifications.
 *
 *    Module name: head_4xx.S
 *
 *    Description:
 *      Kernel execution entry point code.
 *
 *    This program is free software; you can redistribute it and/or
 *    modify it under the terms of the GNU General Public License
 *    as published by the Free Software Foundation; either version
 *    2 of the License, or (at your option) any later version.
 *
 */

#include <linux/config.h>

#include <asm/processor.h>
#include <asm/page.h>
#include <asm/pgtable.h>
#include <asm/mmu.h>

#include "ppc_asm.h"


/* Preprocessor Defines */

#define	STND_EXC	0
#define	CRIT_EXC	1

###
### Check to make sure the right processor has been defined.
###

#if !defined(CONFIG_4xx)
#error "This file is only appropriate for kernels supporting the PPC4xx."
#endif

###
### Execution entry point.
###

###
### As with the other PowerPC ports, it is expected that when code
### execution begins here, the following registers contain valid, yet
### optional, information:
###
###   r3 - Board info structure pointer (DRAM, frequency, MAC address, etc.)
###   r4 - Starting address of the init RAM disk
###   r5 - Ending address of the init RAM disk
###   r6 - Start of kernel command line string (e.g. "mem=96m")
###   r7 - End of kernel command line string
### 
	
	.text
_GLOBAL(_stext)
_GLOBAL(_start)
	## Save residual data, init RAM disk, and command line parameters
	
	mr	r31,r3
	mr	r30,r4
	mr	r29,r5
	mr	r28,r6
	mr	r27,r7

	## Set the ID for this CPU

	li	r24,0

	## Invalidate all TLB entries

	tlbia
	
	## We should still be executing code at physical address 0x0000xxxx
	## at this point. However, start_here is at virtual address
	## 0xC000xxxx. So, set up a TLB mapping to cover this once
	## translation is enabled.

	lis	r3,KERNELBASE@h		# Load the kernel virtual address
	ori	r3,r3,KERNELBASE@l
	tophys(r4,r3)			# Load the kernel physical address

	## Save the existing PID and load the kernel PID.
		
	mfspr	r7,SPRN_PID		# Save the old PID
	li	r0,0
	mtspr	SPRN_PID,r0		# Load the kernel PID

	## Configure and load entry into TLB slot 0.
	
	clrrwi	r4,r4,10		# Mask off the real page number
	ori	r4,r4,(TLB_WR | TLB_EX)	# Set the write and execute bits
	
	clrrwi	r3,r3,10		# Mask off the effective page number
	ori	r3,r3,(TLB_VALID | TLB_PAGESZ(PAGESZ_16M))

	tlbwe	r4,r0,TLB_DATA		# Load the data portion of the entry
	tlbwe	r3,r0,TLB_TAG		# Load the tag portion of the entry
	isync
	
	mtspr	SPRN_PID,r7		# Restore the existing PID
	
	## Establish the exception vector base
	
	lis	r4,KERNELBASE@h		# EVPR only uses the high 16-bits
	tophys(r0,r4)			# Use the physical address
	mtspr	SPRN_EVPR,r0

	## Enable the MMU and jump to the main PowerPC kernel start-up code

	mfmsr	r0			# Get the machine state register
	ori	r0,r0,(MSR_DR | MSR_IR)	# Enable data and instr. translation
	mtspr	SPRN_SRR1,r0		# Set up the new machine state register
	lis	r0,start_here@h		
	ori	r0,r0,start_here@l	
	mtspr	SPRN_SRR0,r0		# Set up the new instruction pointer
	rfi				# Jump to start_here w/ translation on


###
### Exception vector entry code. This code runs with address translation
### turned off (i.e. using physical addresses). We assume SPRG3 has the
### physical address of the current task thread_struct.
### 

	## Common exception code for all exception types.

#define COMMON_PROLOG							     \
0:	mtspr	SPRN_SPRG0,r20;		/* We need r20, move it to SPRG0   */\
	mtspr	SPRN_SPRG1,r21;		/* We need r21, move it to SPRG1   */\
	mfcr	r20;			/* We need the CR, move it to r20  */\
	mfspr	r21,SPRN_SPRG2;		/* Exception stack to use	   */\
	cmpwi	cr0,r21,0;		/* From user mode or RTAS?	   */\
	bne	1f;			/* Not RTAS, branch		   */\
	tophys(r21, r1);		/* Convert vka in r1 to pka in r21 */\
	subi	r21,r21,INT_FRAME_SIZE;	/* Allocate an exception frame	   */\
1:	stw	r20,_CCR(r21);		/* Save CR on the stack		   */\
	stw	r22,GPR22(r21);		/* Save r22 on the stack	   */\
	stw	r23,GPR23(r21);		/* r23 Save on the stack	   */\
	mfspr	r20,SPRN_SPRG0;		/* Get r20 back out of SPRG0	   */\
	stw	r20,GPR20(r21);		/* Save r20 on the stack	   */\
	mfspr	r22,SPRN_SPRG1;		/* Get r21 back out of SPRG0	   */\
	stw	r22,GPR21(r21);		/* Save r21 on the stack	   */\
	mflr	r20;							     \
	stw	r20,_LINK(r21);		/* Save LR on the stack		   */\
	mfctr	r22;							     \
	stw	r22,_CTR(r21);		/* Save CTR on the stack	   */\
	mfspr	r20,XER;						     \
	stw	r20,_XER(r21);		/* Save XER on the stack	   */

#define	COMMON_EPILOG							     \
	stw	r0,GPR0(r21);		/* Save r0 on the stack		   */\
	stw	r1,GPR1(r21);		/* Save r1 on the stack		   */\
	stw	r2,GPR2(r21);		/* Save r2 on the stack		   */\
	stw	r1,0(r21);						     \
	tovirt(r1,r21);			/* Set-up new kernel stack pointer */\
	SAVE_4GPRS(3, r21);		/* Save r3 through r6 on the stack */\
	SAVE_GPR(7, r21);		/* Save r7 on the stack		   */

	## Common exception code for standard (non-critical) exceptions.

#define	STND_EXCEPTION_PROLOG						     \
	COMMON_PROLOG;							     \
	mfspr	r22,SPRN_SRR0;		/* Faulting instruction address	   */\
	mfspr	r23,SPRN_SRR1;		/* MSR at the time of fault	   */\
	COMMON_EPILOG;

	## Common exception code for critical exceptions.
	
#define	CRIT_EXCEPTION_PROLOG						     \
	COMMON_PROLOG;							     \
	mfspr	r22,SPRN_SRR2;		/* Faulting instruction address	   */\
	mfspr	r23,SPRN_SRR3;		/* MSR at the time of fault	   */\
	COMMON_EPILOG;

###
### Macros for specific exception types
### 

#define	START_EXCEPTION(n, label)					     \
	. = n;								     \
label:


#define FINISH_EXCEPTION(func)						     \
	bl	transfer_to_handler;					     \
	.long	func;							     \
	.long	ret_from_except
	
		
#define STND_EXCEPTION(n, label, func)					     \
	START_EXCEPTION(n, label);					     \
	STND_EXCEPTION_PROLOG;						     \
	addi	r3,r1,STACK_FRAME_OVERHEAD;				     \
	li	r7,STND_EXC;						     \
	li	r20,MSR_KERNEL;						     \
	FINISH_EXCEPTION(func)

	
#define	CRIT_EXCEPTION(n, label, func)					     \
	START_EXCEPTION(n, label);					     \
	CRIT_EXCEPTION_PROLOG;						     \
	addi	r3,r1,STACK_FRAME_OVERHEAD;				     \
	li	r7,CRIT_EXC;						     \
	li	r20,MSR_KERNEL;						     \
	FINISH_EXCEPTION(func)

	
###
### Exception vectors.
### 
	
### 0x0100 - Critical Interrupt Exception

	CRIT_EXCEPTION(0x0100,	CriticalInterrupt,	UnknownException)

### 0x0200 - Machine Check Exception
	
	CRIT_EXCEPTION(0x0200,	MachineCheck,		MachineCheckException)

### 0x0300 - Data Storage Exception

	START_EXCEPTION(0x0300,	DataAccess)
	STND_EXCEPTION_PROLOG
	mfspr	r5,SPRN_ESR		# Grab the ESR, save it, pass as arg3
	stw	r5,_ESR(r21)
	mfspr	r4,SPRN_DEAR		# Grab the DEAR, save it, pass as arg2
	stw	r4,_DEAR(r21)
	addi	r3,r1,STACK_FRAME_OVERHEAD
	li	r7,STND_EXC		# This is a standard exception
	li	r20,MSR_KERNEL
	rlwimi	r20,r23,0,16,16		# Copy EE bit from the saved MSR
	FINISH_EXCEPTION(do_page_fault)	# do_page_fault(regs, ESR, DEAR)
	
### 0x0400 - Instruction Storage Exception

	START_EXCEPTION(0x0400, InstructionAccess)
	STND_EXCEPTION_PROLOG
	mr	r4,r22			# Pass SRR0 as arg2
	mr	r5,r23			# Pass SRR1 as arg3
	addi	r3,r1,STACK_FRAME_OVERHEAD
	li	r7,STND_EXC		# This is a standard exception
	li	r20,MSR_KERNEL
	rlwimi	r20,r23,0,16,16		# Copy EE bit from the saved MSR
	FINISH_EXCEPTION(do_page_fault)	# do_page_fault(regs, SRR0, SRR1)
	
### 0x0500 - External Interrupt Exception

	START_EXCEPTION(0x0500, HardwareInterrupt)
	STND_EXCEPTION_PROLOG
	addi	r3,r1,STACK_FRAME_OVERHEAD
	li	r7,STND_EXC
	li	r20,MSR_KERNEL
	li	r4,0
	bl	transfer_to_handler
_GLOBAL(do_IRQ_intercept)
	.long	do_IRQ
	.long	ret_from_intercept

### 0x0600 - Alignment Exception
	
	START_EXCEPTION(0x0600, Alignment)
	STND_EXCEPTION_PROLOG
	mfspr	r4,SPRN_DEAR		# Grab the DEAR and save it
	stw	r4,_DEAR(r21)
	addi	r3,r1,STACK_FRAME_OVERHEAD
	li	r7,STND_EXC		# This is a standard exception
	li	r20,MSR_KERNEL
	rlwimi	r20,r23,0,16,16		# Copy EE bit from the saved MSR
	FINISH_EXCEPTION(AlignmentException)

### 0x0700 - Program Exception

	START_EXCEPTION(0x0700,	ProgramCheck)
	STND_EXCEPTION_PROLOG
	addi	r3,r1,STACK_FRAME_OVERHEAD
	li	r7,STND_EXC		# This is a standard exception
	li	r20,MSR_KERNEL
	rlwimi	r20,r23,0,16,16		# Copy EE bit from the saved MSR
	FINISH_EXCEPTION(ProgramCheckException)
	
	STND_EXCEPTION(0x0800,	Trap_08,		UnknownException)
	STND_EXCEPTION(0x0900,	Trap_09,		UnknownException)
	STND_EXCEPTION(0x0A00,	Trap_0A,		UnknownException)
	STND_EXCEPTION(0x0B00,	Trap_0B,		UnknownException)		
### 0x0C00 - System Call Exception

	START_EXCEPTION(0x0C00,	SystemCall)
	STND_EXCEPTION_PROLOG
	stw	r3,ORIG_GPR3(r21)
	li	r7,STND_EXC		# This is a standard exception
	li	r20,MSR_KERNEL
	rlwimi	r20,r23,0,16,16		# Copy EE bit from the saved MSR
	FINISH_EXCEPTION(DoSyscall)

	STND_EXCEPTION(0x0D00,	Trap_0D,		UnknownException)
	STND_EXCEPTION(0x0E00,	Trap_0E,		UnknownException)
	STND_EXCEPTION(0x0F00,	Trap_0F,		UnknownException)

### 0x1000 - Programmable Interval Timer (PIT) Exception

	START_EXCEPTION(0x1000,	Decrementer)
	STND_EXCEPTION_PROLOG
	lis	r0,TSR_PIS@h		# Set-up the PIT exception mask
	mtspr	SPRN_TSR,r0		# Clear the PIT exception
	addi	r3,r1,STACK_FRAME_OVERHEAD
	li	r7,STND_EXC		# This is a standard exception
	li	r20,MSR_KERNEL
	bl	transfer_to_handler
_GLOBAL(timer_interrupt_intercept)
	.long	timer_interrupt
	.long	ret_from_intercept

#if 0
### 0x1010 - Fixed Interval Timer (FIT) Exception
	
	STND_EXCEPTION(0x1010,	FITException,		UnknownException)

### 0x1020 - Watchdog Timer (WDT) Exception

	CRIT_EXCEPTION(0x1020,	WDTException,		UnknownException)
#endif

### 0x1100 - Data TLB Miss Exception

	STND_EXCEPTION(0x1100,	DTLBMiss, 		PPC4xx_dtlb_miss)

### 0x1200 - Instruction TLB Miss Exception

	STND_EXCEPTION(0x1200,	ITLBMiss, 		PPC4xx_itlb_miss)

	STND_EXCEPTION(0x1300,	Trap_13,		UnknownException)
	STND_EXCEPTION(0x1400,	Trap_14,		UnknownException)
	STND_EXCEPTION(0x1500,	Trap_15,		UnknownException)
	STND_EXCEPTION(0x1600,	Trap_16,		UnknownException)
	STND_EXCEPTION(0x1700,	Trap_17,		UnknownException)
	STND_EXCEPTION(0x1800,	Trap_18,		UnknownException)
	STND_EXCEPTION(0x1900,	Trap_19,		UnknownException)
	STND_EXCEPTION(0x1A00,	Trap_1A,		UnknownException)
	STND_EXCEPTION(0x1B00,	Trap_1B,		UnknownException)
	STND_EXCEPTION(0x1C00,	Trap_1C,		UnknownException)
	STND_EXCEPTION(0x1D00,	Trap_1D,		UnknownException)
	STND_EXCEPTION(0x1E00,	Trap_1E,		UnknownException)
	STND_EXCEPTION(0x1F00,	Trap_1F,		UnknownException)
	
### 0x2000 - Debug Exception

	CRIT_EXCEPTION(0x2000,	DebugTrap,		UnknownException)

###
### Other PowerPC processors, namely those derived from the 6xx-series
### have vectors from 0x2100 through 0x2F00 defined, but marked as reserved.
### However, for the 4xx-series processors these are neither defined nor
### reserved.
### 

### 
### This code finishes saving the registers to the exception frame
### and jumps to the appropriate handler for the exception, turning
### on address translation.
###

_GLOBAL(transfer_to_handler)
	stw	r22,_NIP(r21)		# Save the faulting IP on the stack
	stw	r23,_MSR(r21)		# Save the exception MSR on the stack
	SAVE_4GPRS(8, r21)		# Save r8 through r11 on the stack
	SAVE_8GPRS(12, r21)		# Save r12 through r19 on the stack
	SAVE_8GPRS(24, r21)		# Save r24 through r31 on the stack
	andi.	r23,r23,MSR_PR		# Is this from user space?
	mfspr	r23,SPRN_SPRG3		# If from user, fix up THREAD.regs
	beq	2f			# No, it is from the kernel; branch.
	addi	r24,r1,STACK_FRAME_OVERHEAD
	stw	r24,PT_REGS(r23)	# 
2:	addi	r2,r23,-THREAD		# Set r2 to current thread
	tovirt(r2,r2)
	mflr	r23
	andi.	r24,r23,0x3f00		# Get vector offset
	stw	r24,TRAP(r21)
	li	r22,0
	stw	r22,RESULT(r21)
	mtspr	SPRN_SPRG2,r22		# r1 is now the kernel stack pointer
	addi	r24,r2,TASK_STRUCT_SIZE	# Check for kernel stack overflow
	cmplw	cr0,r1,r2
	cmplw	cr1,r1,r24
	crand	cr1,cr1,cr4
	bgt-	stack_ovf		# If r2 < r1 < r2 + TASK_STRUCT_SIZE
	lwz	r24,0(r23)		# Virtual address of the handler
	lwz	r23,4(r23)		# Handler return pointer
	cmpwi	cr0,r7,STND_EXC		# What type of exception is this?
	bne	3f			# It is a critical exception...

	## Standard exception jump path
	
	mtspr	SPRN_SRR0,r24		# Set up the instruction pointer
	mtspr	SPRN_SRR1,r20		# Set up the machine state register
	mtlr	r23			# Set up the return pointer
	SYNC
	rfi				# Enable the MMU, jump to the handler

	## Critical exception jump path

3:	mtspr	SPRN_SRR2,r24		# Set up the instruction pointer
	mtspr	SPRN_SRR3,r20		# Set up the machine state register
	mtlr	r23			# Set up the return pointer
	SYNC
	rfci				# Enable the MMU, jump to the handler

###
### On kernel stack overlow, load up an initial stack pointer and call
### StackOverflow(regs), which should NOT return.
### 

stack_ovf:
	addi	r3,r1,STACK_FRAME_OVERHEAD
	lis	r1,init_task_union@ha
	addi	r1,r1,init_task_union@l
	addi	r1,r1,TASK_UNION_SIZE - STACK_FRAME_OVERHEAD
	lis	r24,StackOverflow@ha
	addi	r24,r24,StackOverflow@l
	li	r20,MSR_KERNEL
	mtspr	SPRN_SRR0,r24		# Set up the instruction pointer
	mtspr	SPRN_SRR1,r20		# Set up the machine state register
	SYNC
	rfi				# Enable the MMU, jump to StackOverflow

###
### extern void giveup_altivec(struct task_struct *prev)
###
### The PowerPC 4xx family of processors do not have AltiVec capabilities, so
### this just returns.
###

_GLOBAL(giveup_altivec)
	blr
	
###
### extern void giveup_fpu(struct task_struct *prev)
###
### The PowerPC 4xx family of processors do not have an FPU, so this just
### returns.
###

_GLOBAL(giveup_fpu)
	blr

###
### extern void abort(void)
###
### At present, this routine just applies a system reset.
### 
	
_GLOBAL(abort)
	mfspr	r13,SPRN_DBCR
	oris	r13,r13,DBCR_RST(DBCR_RST_SYSTEM)@h
	mtspr	SPRN_DBCR,r13


### 
### This is where the main kernel code starts.
### 

start_here:
	## Establish a pointer to the current task
	
	lis	r2,init_task_union@h
	ori	r2,r2,init_task_union@l
	
	## Clear out the BSS as per ANSI C requirements

	lis	r7,_end@ha
	addi	r7,r7,_end@l
	lis	r8,__bss_start@ha
	addi	r8,r8,__bss_start@l
	subf	r7,r8,r7
	addi	r7,r7,3
	srwi.	r7,r7,2
	beq	2f
	addi	r8,r8,-4
	mtctr	r7
	li	r0,0
3:	stwu	r0,4(r8)
	bdnz	3b

	## Stack
	
2:	addi	r1,r2,TASK_UNION_SIZE
	li	r0,0
	stwu	r0,-STACK_FRAME_OVERHEAD(r1)

	## Determine what type of platform this is.

	mr	r3,r31
	mr	r4,r30
	mr	r5,r29
	mr	r6,r28
	mr	r7,r27
	bl	identify_machine
	
	## Initialize the memory management unit.

	bl	MMU_init

	## Go back to running unmapped so that we can change to our
	## exception vectors.

	lis	r4,2f@h
	ori	r4,r4,2f@l
	tophys(r4,r4)
	li	r3,MSR_KERNEL & ~(MSR_IR|MSR_DR)
	mtspr	SPRN_SRR0,r4		# Set up the instruction pointer
	mtspr	SPRN_SRR1,r3		# Set up the machine state register
	rfi

	## Load up the kernel context

2:	SYNC				# Force all PTE updates to finish
#	tlbia				# Clear all TLB entries
#	sync				# Wait for tlbia to finish...

	## Set up for using our exception vectors
	
	tophys(r4,r2)			# Pointer to physical current thread
	addi	r4,r4,THREAD		# The init task thread
	mtspr	SPRN_SPRG3,r4		# Save it for exceptions later
	li	r3,0			# 
	mtspr	SPRN_SPRG2,r3		# 0 implies r1 has kernel stack pointer
	
	## Really turn on the MMU and jump into the kernel

        lis     r4,MSR_KERNEL@h
        ori     r4,r4,MSR_KERNEL@l
        lis     r3,start_kernel@h
        ori     r3,r3,start_kernel@l
        mtspr   SPRN_SRR0,r3		# Set up the instruction pointer
        mtspr   SPRN_SRR1,r4		# Set up the machine state register
        rfi				# Enable the MMU, jump to the kernel

_GLOBAL(set_context)
	mtspr	SPRN_PID,r3
	blr

###
### We put a few things here that have to be page-aligned. This stuff
### goes at the beginning of the data segment, which is page-aligned.
###

	.data
_GLOBAL(sdata)
_GLOBAL(empty_zero_page)
	.space	4096
_GLOBAL(swapper_pg_dir)
	.space	4096	

###
### This space gets a copy of optional info passed to us by the bootstrap
### which is used to pass parameters into the kernel like root=/dev/sda1, etc.
###

_GLOBAL(cmd_line)
	.space	512
/*
 * BK Id: SCCS/s.ppc4xx_pic.c 1.5 05/17/01 18:14:21 cort
 */
/*
 *
 *    Copyright (c) 1999 Grant Erickson <grant@lcse.umn.edu>
 *
 *    Module name: ppc4xx_pic.c
 *
 *    Description:
 *      Interrupt controller driver for PowerPC 4xx-based processors.
 */

/*
 * The PowerPC 403 cores' Asynchronous Interrupt Controller (AIC) has
 * 32 possible interrupts, a majority of which are not implemented on
 * all cores. There are six configurable, external interrupt pins and
 * there are eight internal interrupts for the on-chip serial port
 * (SPU), DMA controller, and JTAG controller.
 *
 * The PowerPC 405 cores' Universal Interrupt Controller (UIC) has 32
 * possible interrupts as well. There are seven, configurable external
 * interrupt pins and there are 17 internal interrupts for the on-chip
 * serial port, DMA controller, on-chip Ethernet controller, PCI, etc.
 *
 */

#include <linux/init.h>
#include <linux/sched.h>
#include <linux/signal.h>
#include <linux/stddef.h>

#include <asm/processor.h>
#include <asm/system.h>
#include <asm/irq.h>

#include "local_irq.h"
#include "ppc4xx_pic.h"


/* Global Variables */

struct hw_interrupt_type *ppc4xx_pic;


/* Function Prototypes */

static void	 ppc403_aic_enable(unsigned int irq);
static void	 ppc403_aic_disable(unsigned int irq);
static void	 ppc403_aic_disable_and_ack(unsigned int irq);

static void	 ppc405_uic_enable(unsigned int irq);
static void	 ppc405_uic_disable(unsigned int irq);
static void	 ppc405_uic_disable_and_ack(unsigned int irq);

static struct hw_interrupt_type ppc403_aic = {
	"403GC AIC",
	NULL,
	NULL,
	ppc403_aic_enable,
	ppc403_aic_disable,
	ppc403_aic_disable_and_ack,
	0
};

static struct hw_interrupt_type ppc405_uic = {
	"405GP UIC",
	NULL,
	NULL,
	ppc405_uic_enable,
	ppc405_uic_disable,
	ppc405_uic_disable_and_ack,
	0
};

/*
 * Document me.
 */
void __init
ppc4xx_pic_init(void)
{
	unsigned long ver = PVR_VER(mfspr(SPRN_PVR));

	switch (ver) {

	case PVR_VER(PVR_403GC):
		/*
		 * Disable all external interrupts until they are
		 * explicity requested.
		 */
		ppc_cached_irq_mask[0] = 0;
		mtdcr(DCRN_EXIER, 0);

		ppc4xx_pic = &ppc403_aic;
		break;

	case PVR_VER(PVR_405GP):
		ppc4xx_pic = &ppc405_uic;
		break;
	}

	return;
}

/*
 * XXX - Currently 403-specific!
 *
 * Document me.
 */
int
ppc4xx_pic_get_irq(struct pt_regs *regs)
{
	int irq;
	unsigned long bits, mask = (1 << 31);

	/*
	 * Only report the status of those interrupts that are actually
	 * enabled.
	 */

	bits = mfdcr(DCRN_EXISR) & mfdcr(DCRN_EXIER);

	/*
	 * Walk through the interrupts from highest priority to lowest, and
	 * report the first pending interrupt found.
	 */

	for (irq = 0; irq < NR_IRQS; irq++, mask >>= 1) {
		if (bits & mask)
			break;
	}

	return (irq);
}

/*
 * Document me.
 */
static void
ppc403_aic_enable(unsigned int irq)
{
	int bit, word;

	bit = irq & 0x1f;
	word = irq >> 5;

	ppc_cached_irq_mask[word] |= (1 << (31 - bit));
	mtdcr(DCRN_EXIER, ppc_cached_irq_mask[word]);
}

/*
 * Document me.
 */
static void
ppc403_aic_disable(unsigned int irq)
{
	int bit, word;

	bit = irq & 0x1f;
	word = irq >> 5;

	ppc_cached_irq_mask[word] &= ~(1 << (31 - bit));
	mtdcr(DCRN_EXIER, ppc_cached_irq_mask[word]);
}

/*
 * Document me.
 */
static void
ppc403_aic_disable_and_ack(unsigned int irq)
{
	int bit, word;

	bit = irq & 0x1f;
	word = irq >> 5;

	ppc_cached_irq_mask[word] &= ~(1 << (31 - bit));
	mtdcr(DCRN_EXIER, ppc_cached_irq_mask[word]);
	mtdcr(DCRN_EXISR, (1 << (31 - bit)));
}

/*
 * Document me.
 */
static void
ppc405_uic_enable(unsigned int irq)
{
	/* XXX - Implement me. */
}

/*
 * Document me.
 */
static void
ppc405_uic_disable(unsigned int irq)
{
	/* XXX - Implement me. */
}

/*
 * Document me.
 */
static void
ppc405_uic_disable_and_ack(unsigned int irq)
{
	/* XXX - Implement me. */
}
/*
 * BK Id: SCCS/s.apus_pci.c 1.5 09/08/01 15:47:42 paulus
 */
/*
 * Copyright (C) Michel D�nzer <michdaen@iiic.ethz.ch>
 *
 * APUS PCI routines.
 *
 * Currently, only B/CVisionPPC cards (Permedia2) are supported.
 *
 * Thanks to Geert Uytterhoeven for the idea:
 * Read values from given config space(s) for the first devices, -1 otherwise
 *
 */

#include <linux/config.h>
#ifdef CONFIG_AMIGA

#include <linux/kernel.h>
#include <linux/pci.h>
#include <linux/delay.h>
#include <linux/string.h>

#include <asm/io.h>
#include <asm/pci-bridge.h>
#include <asm/machdep.h>

#include "apus_pci.h"


/* These definitions are mostly adapted from pm2fb.c */

#undef APUS_PCI_MASTER_DEBUG
#ifdef APUS_PCI_MASTER_DEBUG
#define DPRINTK(a,b...)	printk(KERN_DEBUG "apus_pci: %s: " a, __FUNCTION__ , ## b)
#else
#define DPRINTK(a,b...)
#endif 

/*
 * The _DEFINITIVE_ memory mapping/unmapping functions.
 * This is due to the fact that they're changing soooo often...
 */
#define DEFW()		wmb()
#define DEFR()		rmb()
#define DEFRW()		mb()

#define DEVNO(d)	((d)>>3)
#define FNNO(d)		((d)&7)


extern unsigned long powerup_PCI_present;

static struct pci_controller *apus_hose;


void *pci_io_base(unsigned int bus)
{
	return 0;
}


#define cfg_read(val, addr, type, op)	*val = op((type)(addr))
#define cfg_write(val, addr, type, op)	op((val), (type *)(addr)); DEFW()
#define cfg_read_bad	*val = ~0;
#define cfg_write_bad	;
#define cfg_read_val(val)	*val
#define cfg_write_val(val)	val

#define APUS_PCI_OP(rw, size, type, op, mask)					\
int									\
apus_pcibios_##rw##_config_##size(struct pci_dev *dev, int offset, type val)	\
{										\
	int fnno = FNNO(dev->devfn);						\
	int devno = DEVNO(dev->devfn);						\
										\
	if (dev->bus->number > 0 || devno != 1) {				\
		cfg_##rw##_bad;							\
		return PCIBIOS_DEVICE_NOT_FOUND;				\
	}									\
	/* base address + function offset + offset ^ endianness conversion */	\
	cfg_##rw(val, apus_hose->cfg_data + (fnno<<5) + (offset ^ mask),	\
		 type, op);							\
										\
	DPRINTK(#op " b: 0x%x, d: 0x%x, f: 0x%x, o: 0x%x, v: 0x%x\n",		\
		dev->bus->number, dev->devfn>>3, dev->devfn&7,			\
		offset, cfg_##rw##_val(val));					\
	return PCIBIOS_SUCCESSFUL;						\
}

APUS_PCI_OP(read, byte, u8 *, readb, 3)
APUS_PCI_OP(read, word, u16 *, readw, 2)
APUS_PCI_OP(read, dword, u32 *, readl, 0)
APUS_PCI_OP(write, byte, u8, writeb, 3)
APUS_PCI_OP(write, word, u16, writew, 2)
APUS_PCI_OP(write, dword, u32, writel, 0)


static struct pci_ops apus_pci_ops = {
	apus_pcibios_read_config_byte,
	apus_pcibios_read_config_word,
	apus_pcibios_read_config_dword,
	apus_pcibios_write_config_byte,
	apus_pcibios_write_config_word,
	apus_pcibios_write_config_dword
};

static struct resource pci_mem = { "B/CVisionPPC PCI mem", CVPPC_FB_APERTURE_ONE, CVPPC_PCI_CONFIG, IORESOURCE_MEM };

void __init
apus_pcibios_fixup(void)
{
/*	struct pci_dev *dev = pci_find_slot(0, 1<<3);
	unsigned int reg, val, offset;*/

	/* FIXME: interrupt? */
	/*dev->interrupt = xxx;*/

        request_resource(&iomem_resource, &pci_mem);
    	printk("%s: PCI mem resource requested\n", __FUNCTION__);
}

static void __init apus_pcibios_fixup_bus(struct pci_bus *bus)
{
        bus->resource[1] = &pci_mem;
}


/* 
 * This is from pm2fb.c again
 * 
 * Check if PCI (B/CVisionPPC) is available, initialize it and set up
 * the pcibios_* pointers
 */


void __init
apus_setup_pci_ptrs(void)
{
	if (!powerup_PCI_present) {
		DPRINTK("no PCI bridge detected\n");
		return;
	}
	DPRINTK("Phase5 B/CVisionPPC PCI bridge detected.\n");

	apus_hose = pcibios_alloc_controller();
	if (!apus_hose) {
		printk("apus_pci: Can't allocate PCI controller structure\n");
		return;
	}

	if (!(apus_hose->cfg_data = ioremap(CVPPC_PCI_CONFIG, 256))) {
		printk("apus_pci: unable to map PCI config region\n");
		return;
	}

	if (!(apus_hose->cfg_addr = ioremap(CSPPC_PCI_BRIDGE, 256))) {
		printk("apus_pci: unable to map PCI bridge\n");
		return;
	}

	writel(CSPPCF_BRIDGE_BIG_ENDIAN, apus_hose->cfg_addr + CSPPC_BRIDGE_ENDIAN);
	DEFW();

	writel(CVPPC_REGS_REGION,  apus_hose->cfg_data+ PCI_BASE_ADDRESS_0);
	DEFW();
	writel(CVPPC_FB_APERTURE_ONE, apus_hose->cfg_data + PCI_BASE_ADDRESS_1);
	DEFW();
	writel(CVPPC_FB_APERTURE_TWO, apus_hose->cfg_data + PCI_BASE_ADDRESS_2);
	DEFW();
	writel(CVPPC_ROM_ADDRESS, apus_hose->cfg_data + PCI_ROM_ADDRESS);
	DEFW();

	writel(0xef000000 | PCI_COMMAND_IO | PCI_COMMAND_MEMORY |
		PCI_COMMAND_MASTER, apus_hose->cfg_data + PCI_COMMAND);
	DEFW();

	apus_hose->first_busno = 0;
	apus_hose->last_busno = 0;
	apus_hose->ops = &apus_pci_ops;
	ppc_md.pcibios_fixup = apus_pcibios_fixup;
	ppc_md.pcibios_fixup_bus = apus_pcibios_fixup_bus;

	return;
}

#endif /* CONFIG_AMIGA */
/*
 * BK Id: SCCS/s.walnut_setup.c 1.10 11/13/01 21:26:07 paulus
 */
/*
 *
 *    Copyright (c) 1999-2000 Grant Erickson <grant@lcse.umn.edu>
 *
 *    Module name: walnut_setup.c
 *
 *    Description:
 *      Architecture- / platform-specific boot-time initialization code for
 *      the IBM PowerPC 403GP "Walnut" evaluation board. Adapted from original
 *      code by Gary Thomas, Cort Dougan <cort@fsmlabs.com>, and Dan Malek
 *      <dan@net4x.com>.
 *
 */

#include <linux/config.h>
#include <linux/init.h>
#include <linux/smp.h>
#include <linux/threads.h>
#include <linux/interrupt.h>
#include <linux/param.h>
#include <linux/string.h>
#include <linux/blk.h>
#include <linux/seq_file.h>

#include <asm/processor.h>
#include <asm/board.h>
#include <asm/machdep.h>
#include <asm/page.h>

#include "local_irq.h"
#include "ppc4xx_pic.h"
#include <asm/time.h>
#include "walnut_setup.h"


/* Function Prototypes */

extern void abort(void);

/* Global Variables */

unsigned char __res[sizeof(bd_t)];


/*
 * void __init walnut_init()
 *
 * Description:
 *   This routine...
 *
 * Input(s):
 *   r3 - Optional pointer to a board information structure.
 *   r4 - Optional pointer to the physical starting address of the init RAM
 *        disk.
 *   r5 - Optional pointer to the physical ending address of the init RAM
 *        disk.
 *   r6 - Optional pointer to the physical starting address of any kernel
 *        command-line parameters.
 *   r7 - Optional pointer to the physical ending address of any kernel
 *        command-line parameters.
 *
 * Output(s):
 *   N/A
 *
 * Returns:
 *   N/A
 *
 */
void __init
walnut_init(unsigned long r3, unsigned long r4, unsigned long r5, 
	    unsigned long r6, unsigned long r7)
{
	/*
	 * If we were passed in a board information, copy it into the
	 * residual data area.
	 */
	if (r3) {
		memcpy((void *)__res, (void *)(r3 + KERNELBASE), sizeof(bd_t));
	}

#if defined(CONFIG_BLK_DEV_INITRD)
	/*
	 * If the init RAM disk has been configured in, and there's a valid
	 * starting address for it, set it up.
	 */
	if (r4) {
		initrd_start = r4 + KERNELBASE;
		initrd_end = r5 + KERNELBASE;
	}
#endif /* CONFIG_BLK_DEV_INITRD */

	/* Copy the kernel command line arguments to a safe place. */

	if (r6) {
 		*(char *)(r7 + KERNELBASE) = 0;
		strcpy(cmd_line, (char *)(r6 + KERNELBASE));
	}

	/* Initialize machine-dependency vectors */

	ppc_md.setup_arch	 	= walnut_setup_arch;
	ppc_md.show_percpuinfo	 	= walnut_show_percpuinfo;
	ppc_md.irq_cannonicalize 	= NULL;
	ppc_md.init_IRQ		 	= walnut_init_IRQ;
	ppc_md.get_irq		 	= walnut_get_irq;
	ppc_md.init		 	= NULL;

	ppc_md.restart		 	= walnut_restart;
	ppc_md.power_off	 	= walnut_power_off;
	ppc_md.halt		 	= walnut_halt;

	ppc_md.time_init	 	= walnut_time_init;
	ppc_md.set_rtc_time	 	= walnut_set_rtc_time;
	ppc_md.get_rtc_time	 	= walnut_get_rtc_time;
	ppc_md.calibrate_decr	 	= walnut_calibrate_decr;

	ppc_md.kbd_setkeycode    	= NULL;
	ppc_md.kbd_getkeycode    	= NULL;
	ppc_md.kbd_translate     	= NULL;
	ppc_md.kbd_unexpected_up 	= NULL;
	ppc_md.kbd_leds          	= NULL;
	ppc_md.kbd_init_hw       	= NULL;
	ppc_md.ppc_kbd_sysrq_xlate	= NULL;
}

/*
 * Document me.
 */
void __init
walnut_setup_arch(void)
{
	/* XXX - Implement me */
}

/*
 * int walnut_show_percpuinfo()
 *
 * Description:
 *   This routine pretty-prints the platform's internal CPU and bus clock
 *   frequencies into the buffer for usage in /proc/cpuinfo.
 *
 * Input(s):
 *  *buffer - Buffer into which CPU and bus clock frequencies are to be
 *            printed.
 *
 * Output(s):
 *  *buffer - Buffer with the CPU and bus clock frequencies.
 *
 * Returns:
 *   The number of bytes copied into 'buffer' if OK, otherwise zero or less
 *   on error.
 */
int
walnut_show_percpuinfo(struct seq_file *m)
{
	bd_t *bp = (bd_t *)__res;

	seq_printf(m, "clock\t\t: %dMHz\n"
		   "bus clock\t\t: %dMHz\n",
		   bp->bi_intfreq / 1000000,
		   bp->bi_busfreq / 1000000);

	return 0;
}

/*
 * Document me.
 */
void __init
walnut_init_IRQ(void)
{
	int i;

	ppc4xx_pic_init();

	for (i = 0; i < NR_IRQS; i++) {
		irq_desc[i].handler = ppc4xx_pic;
	}

	return;
}

/*
 * Document me.
 */
int
walnut_get_irq(struct pt_regs *regs)
{
	return (ppc4xx_pic_get_irq(regs));
}

/*
 * Document me.
 */
void
walnut_restart(char *cmd)
{
	abort();
}

/*
 * Document me.
 */
void
walnut_power_off(void)
{
	walnut_restart(NULL);
}

/*
 * Document me.
 */
void
walnut_halt(void)
{
	walnut_restart(NULL);
}

/*
 * Document me.
 */
long __init
walnut_time_init(void)
{
	/* XXX - Implement me */
	return 0;
}

/*
 * Document me.
 */
int __init
walnut_set_rtc_time(unsigned long time)
{
	/* XXX - Implement me */

	return (0);
}

/*
 * Document me.
 */
unsigned long __init
walnut_get_rtc_time(void)
{
	/* XXX - Implement me */

	return (0);
}

/*
 * void __init walnut_calibrate_decr()
 *
 * Description:
 *   This routine retrieves the internal processor frequency from the board
 *   information structure, sets up the kernel timer decrementer based on
 *   that value, enables the 403 programmable interval timer (PIT) and sets
 *   it up for auto-reload.
 *
 * Input(s):
 *   N/A
 *
 * Output(s):
 *   N/A
 *
 * Returns:
 *   N/A
 *
 */
void __init
walnut_calibrate_decr(void)
{
	unsigned int freq;
	bd_t *bip = (bd_t *)__res;

	freq = bip->bi_intfreq;

	decrementer_count = freq / HZ;
	count_period_num = 1;
	count_period_den = freq;

	/* Enable the PIT and set auto-reload of its value */

	mtspr(SPRN_TCR, TCR_PIE | TCR_ARE);

	/* Clear any pending timer interrupts */

	mtspr(SPRN_TSR, TSR_ENW | TSR_WIS | TSR_PIS | TSR_FIS);
}
/*
 * BK Id: SCCS/s.walnut_setup.h 1.5 05/17/01 18:14:22 cort
 */
/*
 *
 *    Copyright (c) 1999-2000 Grant Erickson <grant@lcse.umn.edu>
 *
 *    Module name: walnut_setup.c
 *
 *    Description:
 *      Architecture- / platform-specific boot-time initialization code for
 *      the IBM PowerPC 405GP "Walnut" evaluation board. Adapted from original
 *      code by Gary Thomas, Cort Dougan <cort@cs.nmt.edu>, and Dan Malek
 *      <dan@netx4.com>.
 *
 */

#ifndef	__WALNUT_SETUP_H__
#define	__WALNUT_SETUP_H__

#include <asm/ptrace.h>
#include <asm/board.h>


#ifdef __cplusplus
extern "C" {
#endif

extern unsigned char	 __res[sizeof(bd_t)];

extern void		 walnut_init(unsigned long r3,
				  unsigned long ird_start,
				  unsigned long ird_end,
				  unsigned long cline_start,
				  unsigned long cline_end);
extern void		 walnut_setup_arch(void);
extern int		 walnut_setup_residual(char *buffer);
extern void		 walnut_init_IRQ(void);
extern int		 walnut_get_irq(struct pt_regs *regs);
extern void		 walnut_restart(char *cmd);
extern void		 walnut_power_off(void);
extern void		 walnut_halt(void);
extern void		 walnut_time_init(void);
extern int		 walnut_set_rtc_time(unsigned long now);
extern unsigned long	 walnut_get_rtc_time(void);
extern void		 walnut_calibrate_decr(void);


#ifdef __cplusplus
}
#endif

#endif /* __WALNUT_SETUP_H__ */
/*
 * BK Id: SCCS/s.xics.h 1.5 05/17/01 18:14:22 cort
 */
/*
 * arch/ppc/kernel/xics.h
 *
 * Copyright 2000 IBM Corporation.
 *
 *  This program is free software; you can redistribute it and/or
 *  modify it under the terms of the GNU General Public License
 *  as published by the Free Software Foundation; either version
 *  2 of the License, or (at your option) any later version.
 */

#ifndef _PPC_KERNEL_XICS_H
#define _PPC_KERNEL_XICS_H

#include "local_irq.h"

extern struct hw_interrupt_type xics_pic;
extern struct hw_interrupt_type xics_8259_pic;

void xics_init_IRQ(void);
int xics_get_irq(struct pt_regs *);

#endif /* _PPC_KERNEL_XICS_H */
/*
 * BK Id: SCCS/s.galaxy_pci.c 1.7 05/17/01 18:14:21 cort
 */
/*
 *
 *    Copyright (c) 2000 Grant Erickson <grant@borg.umn.edu>
 *    All rights reserved.
 *
 *    Module name: galaxy_pci.c
 *
 *    Description:
 *      PCI interface code for the IBM PowerPC 405GP on-chip PCI bus
 *      interface.
 *
 *      Why is this file called "galaxy_pci"? Because on the original
 *      IBM "Walnut" evaluation board schematic I have, the 405GP is
 *      is labeled "GALAXY".
 *
 */

#include <linux/kernel.h>
#include <linux/pci.h>
#include <linux/string.h>
#include <linux/init.h>

#include <asm/processor.h>
#include <asm/system.h>
#include <asm/io.h>
#include <asm/machdep.h>

#include "pci.h"


/* Preprocessor Defines */

#define	PCICFGADDR	(volatile unsigned int *)(0xEEC00000)
#define	PCICFGDATA	(volatile unsigned int *)(0xEEC00004)


/* Function Prototypes */

void __init
galaxy_pcibios_fixup(void)
{

}

static int
galaxy_pcibios_read_config_byte(struct pci_controller* hose,
				  u8 bus, u8 dev, u8 offset, u8 *val)
{

	return (PCIBIOS_SUCCESSFUL);
}

static int
galaxy_pcibios_read_config_word(struct pci_controller* hose,
				  u8 bus, u8 dev, u8 offset, u16 *val)
{

	return (PCIBIOS_SUCCESSFUL);
}

static int
galaxy_pcibios_read_config_dword(struct pci_controller* hose,
				  u8 bus, u8 dev, u8 offset, u32 *val)
{

	return (PCIBIOS_SUCCESSFUL);
}

static int
galaxy_pcibios_write_config_byte(struct pci_controller* hose,
				  u8 bus, u8 dev, u8 offset, u8 val)
{

	return (PCIBIOS_SUCCESSFUL);
}

static int
galaxy_pcibios_write_config_word(struct pci_controller* hose,
				  u8 bus, u8 dev, u8 offset, u16 val)
{

	return (PCIBIOS_SUCCESSFUL);
}

static int
galaxy_pcibios_write_config_dword(struct pci_controller* hose,
				  u8 bus, u8 dev, u8 offset, u32 val)
{

	return (PCIBIOS_SUCCESSFUL);
}

static struct pci_controller_ops galaxy_pci_ops =
{
	galaxy_pcibios_read_config_byte,
	galaxy_pcibios_read_config_word,
	galaxy_pcibios_read_config_dword,
	galaxy_pcibios_write_config_byte,
	galaxy_pcibios_write_config_word,
	galaxy_pcibios_write_config_dword
};

void __init
galaxy_find_bridges(void)
{
	struct pci_controller* hose;

	set_config_access_method(galaxy);

	ppc_md.pcibios_fixup = galaxy_pcibios_fixup;
	hose = pcibios_alloc_controller();
	if (!hose)
		return;
	hose->ops = &galaxy_pci_ops;
	/* Todo ...
	hose->cfg_data = ioremap(PCICFGDATA, ...);
	hose->cfg_addr = ioremap(PCICFGADDR, ...);
	*/
}
/*
 * BK Id: SCCS/s.pci-dma.c 1.5 05/17/01 18:14:21 cort
 */
/*
 * Copyright (C) 2000   Ani Joshi <ajoshi@unixbox.com>
 *
 *
 * Dynamic DMA mapping support.
 *
 * swiped from i386
 *
 */

#include <linux/types.h>
#include <linux/mm.h>
#include <linux/string.h>
#include <linux/pci.h>
#include <asm/io.h>

void *pci_alloc_consistent(struct pci_dev *hwdev, size_t size,
			   dma_addr_t *dma_handle)
{
	void *ret;
	int gfp = GFP_ATOMIC;

	if (hwdev == NULL || hwdev->dma_mask != 0xffffffff)
		gfp |= GFP_DMA;
	ret = (void *)__get_free_pages(gfp, get_order(size));

	if (ret != NULL) {
		memset(ret, 0, size);
		*dma_handle = virt_to_bus(ret);
	}
	return ret;
}

void pci_free_consistent(struct pci_dev *hwdev, size_t size,
			 void *vaddr, dma_addr_t dma_handle)
{
	free_pages((unsigned long)vaddr, get_order(size));
}
/*
 * BK Id: SCCS/s.gemini_pci.c 1.6 10/11/01 08:51:46 trini
 */
#include <linux/kernel.h>
#include <linux/init.h>
#include <linux/pci.h>
#include <linux/slab.h>

#include <asm/machdep.h>
#include <asm/gemini.h>
#include <asm/byteorder.h>
#include <asm/io.h>
#include <asm/uaccess.h>
#include <asm/pci-bridge.h>

#include "pci.h"

#define pci_config_addr(bus,dev,offset) \
        (0x80000000 | (bus<<16) | (dev<<8) | offset)


int
gemini_pcibios_read_config_byte(struct pci_dev *dev, int offset, u8 *val)
{
	unsigned long reg;
	reg = grackle_read(pci_config_addr(dev->bus->number, dev->devfn,
					   (offset & ~(0x3))));
	*val = ((reg >> ((offset & 0x3) << 3)) & 0xff);
	return PCIBIOS_SUCCESSFUL;
}

int
gemini_pcibios_read_config_word(struct pci_dev *dev, int offset, u16 *val)
{
	unsigned long reg;
	reg = grackle_read(pci_config_addr(dev->bus->number, dev->devfn,
					   (offset & ~(0x3))));
	*val = ((reg >> ((offset & 0x3) << 3)) & 0xffff);
	return PCIBIOS_SUCCESSFUL;
}

int
gemini_pcibios_read_config_dword(struct pci_dev *dev, int offset, u32 *val)
{
	*val = grackle_read(pci_config_addr(dev->bus->number, dev->devfn,
					    (offset & ~(0x3))));
	return PCIBIOS_SUCCESSFUL;
}

int
gemini_pcibios_write_config_byte(struct pci_dev *dev, int offset, u8 val)
{
	unsigned long reg;
	int shifts = offset & 0x3;
	unsigned int addr = pci_config_addr(dev->bus->number, dev->devfn,
					    (offset & ~(0x3)));

	reg = grackle_read(addr);
	reg = (reg & ~(0xff << (shifts << 3))) | (val << (shifts << 3));
	grackle_write(addr, reg );
	return PCIBIOS_SUCCESSFUL;
}

int
gemini_pcibios_write_config_word(struct pci_dev *dev, int offset, u16 val)
{
	unsigned long reg;
	int shifts = offset & 0x3;
	unsigned int addr = pci_config_addr(dev->bus->number, dev->devfn,
					    (offset & ~(0x3)));

	reg = grackle_read(addr);
	reg = (reg & ~(0xffff << (shifts << 3))) | (val << (shifts << 3));
	grackle_write(addr, reg );
	return PCIBIOS_SUCCESSFUL;
}

int
gemini_pcibios_write_config_dword(struct pci_dev *dev, int offset, u32 val)
{
	grackle_write(pci_config_addr(dev->bus->number, dev->devfn,
				      (offset & ~(0x3))), val);
	return PCIBIOS_SUCCESSFUL;
}

static struct pci_ops gemini_pci_ops =
{
	gemini_pcibios_read_config_byte,
	gemini_pcibios_read_config_word,
	gemini_pcibios_read_config_dword,
	gemini_pcibios_write_config_byte,
	gemini_pcibios_write_config_word,
	gemini_pcibios_write_config_dword
};

void __init gemini_pcibios_fixup(void)
{
	int i;
	struct pci_dev *dev;
	
	pci_for_each_dev(dev) {
		for(i = 0; i < 6; i++) {
			if (dev->resource[i].flags & IORESOURCE_IO) {
				dev->resource[i].start |= (0xfe << 24);
				dev->resource[i].end |= (0xfe << 24);
			}
		}
	}
}


/* The "bootloader" for Synergy boards does none of this for us, so we need to
   lay it all out ourselves... --Dan */
void __init gemini_find_bridges(void)
{
	struct pci_controller* hose;
	
	ppc_md.pcibios_fixup = gemini_pcibios_fixup;

	hose = pcibios_alloc_controller();
	if (!hose)
		return;
	hose->ops = &gemini_pci_ops;
}
/*
 * BK Id: SCCS/s.ppc8260_pic.c 1.5 05/17/01 18:14:21 cort
 */

#include <linux/stddef.h>
#include <linux/init.h>
#include <linux/sched.h>
#include <linux/signal.h>
#include <asm/irq.h>
#include <asm/immap_8260.h>
#include <asm/mpc8260.h>
#include "ppc8260_pic.h"

/* The 8260 internal interrupt controller.  It is usually
 * the only interrupt controller.
 * There are two 32-bit registers (high/low) for up to 64
 * possible interrupts.
 *
 * Now, the fun starts.....Interrupt Numbers DO NOT MAP
 * in a simple arithmetic fashion to mask or pending registers.
 * That is, interrupt 4 does not map to bit position 4.
 * We create two tables, indexed by vector number, to indicate
 * which register to use and which bit in the register to use.
 */
static	u_char	irq_to_siureg[] = {
	1, 1, 1, 1, 1, 1, 1, 1,
	1, 1, 1, 1, 1, 1, 1, 1,
	0, 0, 0, 0, 0, 0, 0, 0,
	0, 0, 0, 0, 0, 0, 0, 0,
	1, 1, 1, 1, 1, 1, 1, 1,
	1, 1, 1, 1, 1, 1, 1, 1,
	0, 0, 0, 0, 0, 0, 0, 0,
	0, 0, 0, 0, 0, 0, 0, 0
};

static	u_char	irq_to_siubit[] = {
	31, 16, 17, 18, 19, 20, 21, 22,
	23, 24, 25, 26, 27, 28, 29, 30,
	29, 30, 16, 17, 18, 19, 20, 21,
	22, 23, 24, 25, 26, 27, 28, 31,
	 0,  1,  2,  3,  4,  5,  6,  7,
	 8,  9, 10, 11, 12, 13, 14, 15,
	15, 14, 13, 12, 11, 10,  9,  8,
	 7,  6,  5,  4,  3,  2,  1,  0
};

static void m8260_mask_irq(unsigned int irq_nr)
{
	int	bit, word;
	volatile uint	*simr;

	bit = irq_to_siubit[irq_nr];
	word = irq_to_siureg[irq_nr];

	simr = &(immr->im_intctl.ic_simrh);
	ppc_cached_irq_mask[word] &= ~(1 << (31 - bit));
	simr[word] = ppc_cached_irq_mask[word];
}

static void m8260_unmask_irq(unsigned int irq_nr)
{
	int	bit, word;
	volatile uint	*simr;

	bit = irq_to_siubit[irq_nr];
	word = irq_to_siureg[irq_nr];

	simr = &(immr->im_intctl.ic_simrh);
	ppc_cached_irq_mask[word] |= (1 << (31 - bit));
	simr[word] = ppc_cached_irq_mask[word];
}

static void m8260_mask_and_ack(unsigned int irq_nr)
{
	int	bit, word;
	volatile uint	*simr, *sipnr;

	bit = irq_to_siubit[irq_nr];
	word = irq_to_siureg[irq_nr];

	simr = &(immr->im_intctl.ic_simrh);
	sipnr = &(immr->im_intctl.ic_sipnrh);
	ppc_cached_irq_mask[word] &= ~(1 << (31 - bit));
	simr[word] = ppc_cached_irq_mask[word];
	sipnr[word] = 1 << (31 - bit);
}

static void m8260_end_irq(unsigned int irq_nr)
{
	int	bit, word;
	volatile uint	*simr;

	if (!(irq_desc[irq_nr].status & (IRQ_DISABLED|IRQ_INPROGRESS))) {

		bit = irq_to_siubit[irq_nr];
		word = irq_to_siureg[irq_nr];

		simr = &(immr->im_intctl.ic_simrh);
		ppc_cached_irq_mask[word] |= (1 << (31 - bit));
		simr[word] = ppc_cached_irq_mask[word];
	}
}

struct hw_interrupt_type ppc8260_pic = {
	" 8260 SIU  ",
	NULL,
	NULL,
	m8260_unmask_irq,
	m8260_mask_irq,
	m8260_mask_and_ack,
	m8260_end_irq,
	0
};


int
m8260_get_irq(struct pt_regs *regs)
{
	int irq;
        unsigned long bits;

        /* For MPC8260, read the SIVEC register and shift the bits down
         * to get the irq number.         */
        bits = immr->im_intctl.ic_sivec;
        irq = bits >> 26;

	if (irq == 0)
		return(-1);
#if 0
        irq += ppc8260_pic.irq_offset;
#endif
	return irq;
}

/*
 * BK Id: SCCS/s.ppc8260_pic.h 1.7 05/17/01 18:14:21 cort
 */

#ifndef _PPC_KERNEL_PPC8260_H
#define _PPC_KERNEL_PPC8260_H

#include "local_irq.h"

extern struct hw_interrupt_type ppc8260_pic;

void m8260_pic_init(void);
void m8260_do_IRQ(struct pt_regs *regs,
                 int            cpu);
int m8260_get_irq(struct pt_regs *regs);

#endif /* _PPC_KERNEL_PPC8260_H */
/*
 * BK Id: SCCS/s.pmac_backlight.c 1.10 12/01/01 20:09:06 benh
 */
/*
 * Miscellaneous procedures for dealing with the PowerMac hardware.
 * Contains support for the backlight.
 * 
 *   Copyright (C) 2000 Benjamin Herrenschmidt
 *
 */

#include <linux/config.h>
#include <linux/kernel.h>
#include <linux/stddef.h>
#include <linux/reboot.h>
#include <linux/nvram.h>
#include <asm/sections.h>
#include <asm/ptrace.h>
#include <asm/io.h>
#include <asm/pgtable.h>
#include <asm/system.h>
#include <asm/prom.h>
#include <asm/machdep.h>
#include <asm/nvram.h>
#include <asm/backlight.h>

#include <linux/adb.h>
#include <linux/pmu.h>

static struct backlight_controller *backlighter = NULL;
static void* backlighter_data = NULL;
static int backlight_autosave = 0;
static int backlight_level = BACKLIGHT_MAX;
static int backlight_enabled = 1;

void __pmac
register_backlight_controller(struct backlight_controller *ctrler, void *data, char *type)
{
	struct device_node* bk_node;
	char *prop;
	int valid = 0;

	bk_node = find_devices("backlight");
	
#ifdef CONFIG_ADB_PMU
	/* Special case for the old PowerBook since I can't test on it */
	backlight_autosave = machine_is_compatible("AAPL,3400/2400")
		|| machine_is_compatible("AAPL,3500");
	if ((backlight_autosave
	     || machine_is_compatible("AAPL,PowerBook1998")
	     || machine_is_compatible("PowerBook1,1"))
	    && !strcmp(type, "pmu"))
		valid = 1;
#endif
	if (bk_node) {
		prop = get_property(bk_node, "backlight-control", NULL);
		if (prop && !strncmp(prop, type, strlen(type)))
			valid = 1;
	}
	if (!valid)
		return;
	backlighter = ctrler;
	backlighter_data = data;
	
	if (bk_node && !backlight_autosave)
		prop = get_property(bk_node, "bklt", NULL);
	else
		prop = NULL;
	if (prop) {
		backlight_level = ((*prop)+1) >> 1;
		if (backlight_level > BACKLIGHT_MAX)
			backlight_level = BACKLIGHT_MAX;
	}
	
#ifdef CONFIG_ADB_PMU
	if (backlight_autosave) {
		struct adb_request req;
		pmu_request(&req, NULL, 2, 0xd9, 0);
		while (!req.complete)
			pmu_poll();
		backlight_level = req.reply[0] >> 4;
	}
#endif
	if (!backlighter->set_enable(1, backlight_level, data))
		backlight_enabled = 1;

	printk(KERN_INFO "Registered \"%s\" backlight controller, level: %d/15\n",
		type, backlight_level);
}

void __pmac
unregister_backlight_controller(struct backlight_controller *ctrler, void *data)
{
	/* We keep the current backlight level (for now) */
	if (ctrler == backlighter && data == backlighter_data)
		backlighter = NULL;
}

int __pmac
set_backlight_enable(int enable)
{
	int rc;
	
	if (!backlighter)
		return -ENODEV;
	rc = backlighter->set_enable(enable, backlight_level, backlighter_data);
	if (!rc)
		backlight_enabled = enable;
	return rc;
}

int __pmac
get_backlight_enable(void)
{
	if (!backlighter)
		return -ENODEV;
	return backlight_enabled;
}

int __pmac
set_backlight_level(int level)
{
	int rc = 0;
	
	if (!backlighter)
		return -ENODEV;
	if (level < BACKLIGHT_MIN)
		level = BACKLIGHT_OFF;
	if (level > BACKLIGHT_MAX)
		level = BACKLIGHT_MAX;
	if (backlight_enabled)
		rc = backlighter->set_level(level, backlighter_data);
	if (!rc)
		backlight_level = level;
	if (!rc && !backlight_autosave) {
		level <<=1;
		if (level & 0x10)
			level |= 0x01;
		// -- todo: save to property "bklt"
	}
	return rc;
}

int __pmac
get_backlight_level(void)
{
	if (!backlighter)
		return -ENODEV;
	return backlight_level;
}
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#define su_num_ports	_set_ver(su_num_ports)
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<6>usb.c: registered new driver %s
<3>usb.c: null device being purged!!!
<6>usb.c: deregistering driver %s
<4>usb.c: too many buses
<6>usb.c: new USB bus registered, assigned bus number %d
<6>usb.c: USB bus %d deregistered
<3>usb.c: null device being checked!!!
<3>usb.c: bad find_interface_driver params
usbHOME=/PATH=/sbin:/bin:/usr/sbin:/usr/binACTION=%sPRODUCT=%x/%x/%xTYPE=%d/%d/%dINTERFACE=%d/%d/%d<4>usb.c: USB device %d (vend/prod 0x%x/0x%x) is not claimed by any active driver.
<3>usb.c: alloc_urb: kmalloc failed
<3>usb: raced timeout, pipe 0x%x status %d time left %d
usb_control/bulk_msg: timeout
<3>usb.c: ran out of descriptors parsing
<4>usb.c: unexpected descriptor 0x%X, expecting endpoint descriptor, type 0x%X
<3>usb.c: invalid descriptor length of %d
<3>usb.c: couldn't allocate memory for endpoint extra descriptors
<3>usb.c: couldn't kmalloc interface->altsetting
<4>usb.c: too many alternate settings (max %d)
<3>usb.c: couldn't allocate memory for interface extra descriptors
<4>usb.c: too many endpoints
<3>usb.c: out of memory
<4>usb.c: too many interfaces
<4>usb.c: extra config descriptor
<3>usb.c: couldn't allocate memory for config extra descriptors
%xUSB %s Root Hub<6>usb.c: USB disconnect on device %d
remove<3>usb.c: unable to allocate memory for configuration descriptors
<4>usb.c: selecting invalid interface %d
<4>usb.c: selecting invalid configuration %d
<4>usb.c: too many configurations
<4>usb.c: not enough configurations
<3>usb.c: unable to get descriptor
<3>usb.c: config descriptor too short (expected %i, got %i)
<3>usb.c: couldn't get all of config descriptors
<3>usb.c: error getting string descriptor 0 (error=%d)
<3>usb.c: string descriptor 0 too short
<3>usb.c: USB device not accepting new address=%d (error=%d)
<3>usb.c: USB device not responding, giving up (error=%d)
<3>usb.c: USB device descriptor short read (expected %i, got %i)
<3>usb.c: unable to get device descriptor (error=%d)
<3>usb.c: USB device descriptor short read (expected %Zi, got %i)
<3>usb.c: unable to get device %d configuration (error=%d)
<3>usb.c: failed to set device %d default configuration (error=%d)
add<3>usb.c: unable to get major %d for usb devices

  Interface: %d
Invalid USB device descriptor (NULL POINTER)
 (!!!)  Length              = %2d%s
  DescriptorType      = %02x
  USB version         = %x.%02x
  Vendor:Product      = %04x:%04x
  MaxPacketSize0      = %d
  NumConfigurations   = %d
ng new address (error=%d)
<3>hub.c: unable to get device descriptor (error=%d)
<3>hub.c: USB device descriptor short read (expected %Zi, got %i)
<3>hub.c: unable to get configuration (error=%d)
<3>hub.c: failed to set active configuration (error=%d)
<3>hub.c: failed to set active alternate setting for interface %d (error=%d)

	
@



	@

	

@	
	�2.4.19-pre5-ac3Linux%s %s %s<7>hcd.c: no device features yet yet
<7>hcd.c: %s root hub device address %d
<7>hcd.c: no endpoint features yet
<7>hcd.c: unsupported hub control message (maxchild %d)
<7>hcd.c: CTRL: TypeReq=0x%x val=0x%x idx=0x%x len=%d ==> %d
<7>hcd.c: not queuing status urb, stat %d
<7>hcd.c: %s, can't resubmit roothub status urb?
hcd.c<3>hcd.c: Found HC with no IRQ.  Check BIOS/PCI %s setup!
<7>hcd.c: controller already in use
<7>hcd.c: error mapping memory
<3>hcd.c: init %s fail, %d
<7>hcd.c: no i/o regions available
<7>hcd.c: hcd alloc fail
<6>hcd.c: %s @ %s, %s
<7>hcd.c: PCI latency reduced to max %d
%d<3>hcd.c: request interrupt %s failed
pci memio base<6>hcd.c: irq %s, %s %p
<7>hcd.c: usb_alloc_bus fail
<6>hcd.c: remove: %s, state %x
<7>hcd.c: %s: roothub graceful disconnect
<6>hcd.c: suspend %s to state %d
<6>hcd.c: resume %s
<3>hcd.c: concurrent PCI resumes for %s
<7>hcd.c: can't resume, not suspended!
<7>hcd.c: resume %s failure, retval %d
<7>hcd.c: shutdown %s urb %p pipe %x, current status %d
<4>hcd.c: BOGUS urb flags, %x --> %x
<7>hcd.c: non-async unlink in_interrupt
<3>hcd.c: whoa! retval %d
<7>hcd.c: %s: wait for giveback urb %p
(no bus?)<7>hcd.c: %s: hcd_unlink_urb fail %d
<7>hcd.c: free busy dev, %s devnum %d (bug!)
<7>hcd.c: giveback urb %p status %d
<7>hcd.c: urb %p chain fail, %d
usb_ifnum_to_if_Rsmp_307f304fusb_epnum_to_ep_desc_Rsmp_3d566828usb_register_Rsmp_06910b64usb_deregister_Rsmp_7c733760usb_scan_devices_Rsmp_ca4f6301usb_alloc_bus_Rsmp_5f5a53beusb_free_bus_Rsmp_1c191909usb_register_bus_Rsmp_3be2f4ddusb_deregister_bus_Rsmp_002a1324usb_alloc_dev_Rsmp_071e1b0busb_free_dev_Rsmp_554d4503usb_inc_dev_use_Rsmp_d59ab0b5usb_driver_claim_interface_Rsmp_f034b3a5usb_interface_claimed_Rsmp_0617bb13usb_driver_release_interface_Rsmp_9b88643cusb_match_id_Rsmp_39ec40b2usb_root_hub_string_Rsmp_a68718f0usb_new_device_Rsmp_5e3dcaf0usb_reset_device_Rsmp_1c2db2afusb_connect_Rsmp_e195a77cusb_disconnect_Rsmp_0cd70ceausb_check_bandwidth_Rsmp_e0b090a0usb_claim_bandwidth_Rsmp_b6f4c429usb_release_bandwidth_Rsmp_7c4e7102usb_set_address_Rsmp_1c4363f5usb_get_descriptor_Rsmp_6f70f233usb_get_class_descriptor_Rsmp_a053c831__usb_get_extra_descriptor_Rsmp_9924c496usb_get_device_descriptor_Rsmp_320076e2usb_get_string_Rsmp_f9550cccusb_string_Rsmp_f8a0a63cusb_get_protocol_Rsmp_ccfbbf0fusb_set_protocol_Rsmp_8f177c24usb_get_report_Rsmp_1712307cusb_set_report_Rsmp_9f9e6a74usb_set_idle_Rsmp_f147cb9eusb_clear_halt_Rsmp_ce63d897usb_set_interface_Rsmp_e25be1fbusb_get_configuration_Rsmp_314ee88busb_set_configuration_Rsmp_5a4a699dusb_get_status_Rsmp_ae63eff8usb_get_current_frame_number_Rsmp_18daaba7usb_alloc_urb_Rsmp_a5842bf3usb_free_urb_Rsmp_60a7bddӘ'5j�ew��`!7�9
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 * BK Id: SCCS/s.error_log.c 1.6 05/17/01 18:14:21 cort
 */
/*
 *  arch/ppc/kernel/error_log.c
 *  
 *  Copyright (c) 2000 Tilmann Bitterberg
 *  (tilmann@bitterberg.de)
 *
 *  Error processing of errors found by rtas even-scan routine
 *  which is done with every heartbeat. (chrp_setup.c)
 */

#include <linux/sched.h>

#include <asm/prom.h>

#include "error_log.h"

/* ****************************************************************** */
/* 
 * EVENT-SCAN
 * The whole stuff below here doesn't take any action when it found
 * an error, it just prints as much information as possible and 
 * then its up to the user to decide what to do.
 *
 * Returns 0 if no errors were found
 * Returns 1 if there may be more errors
 */
int ppc_rtas_errorlog_scan(void)
{
const char *_errlog_severity[] = {
#ifdef VERBOSE_ERRORS
	"No Error\n\t\
Should require no further information",
	"Event\n\t\
This is not really an error, it is an event. I use events\n\t\
to communicate with RTAS back and forth.",
	"Warning\n\t\
Indicates a non-state-losing error, either fully recovered\n\t\
by RTAS or not needing recovery. Ignore it.",
	"Error sync\n\t\
May only be fatal to a certain program or thread. Recovery\n\t\
and continuation is possible, if I only had a handler for\n\t\
this. Less serious",
	"Error\n\t\
Less serious, but still causing a loss of data and state.\n\t\
I can't tell you exactly what to do, You have to decide\n\t\
with help from the target and initiator field, what kind\n\t\
of further actions may take place.",
	"Fatal\n\t\
Represent a permanent hardware failure and I believe this\n\t\
affects my overall performance and behaviour. I would not\n\t\
attempt to continue normal operation."
#else
	"No Error",
	"Event",
	"Warning",
	"Error sync",
	"Error",
	"Fatal"
#endif /* VERBOSE_ERRORS */
};

#if 0 /* unused?? */
const char *_errlog_disposition[] = {
#ifdef VERBOSE_ERRORS
	"Fully recovered\n\t\
There was an error, but it is fully recovered by RTAS.",
	"Limited recovery\n\t\
RTAS was able to recover the state of the machine, but some\n\t\
feature of the machine has been disabled or lost (for example\n\t\
error checking) or performance may suffer.",
	"Not recovered\n\t\
Whether RTAS did not try to recover anything or recovery failed:\n\t\
HOUSTON, WE HAVE A PROBLEM!"
#else
	"Fully recovered",
	"Limited recovery",
	"Not recovered"
#endif /* VERBOSE_ERRORS */
};
#endif

const char *_errlog_extended[] = {
#ifdef VERBOSE_ERRORS
	"Not present\n\t\
Sad, the RTAS call didn't return an extended error log.",
	"Present\n\t\
The extended log is present and hopefully it contains a lot of\n\t\
useful information, which leads to the solution of the problem."
#else
	"Not present",
	"Present"
#endif /* VERBOSE_ERRORS */
};

const char *_errlog_initiator[] = { 
	"Unknown or not applicable",
	"CPU",
	"PCI",
	"ISA",
	"Memory",
	"Power management"
};

const char *_errlog_target[] = { 
	"Unknown or not applicable",
	"CPU",
	"PCI",
	"ISA",
	"Memory",
	"Power management"
};
	rtas_error_log error_log;
	char logdata[1024];
	int error;
#if 0 /* unused?? */
	int retries = 0; /* if HW error, try 10 times */
#endif

	error = call_rtas ("event-scan", 4, 1, (unsigned long *)&error_log,
			INTERNAL_ERROR | EPOW_WARNING,
			0, __pa(logdata), 1024);

	if (error == 1) /* no errors found */
		return 0;

	if (error == -1) {
		printk(KERN_ERR "Unable to get errors. Do you a favor and throw this box away\n");
		return 0;
	}
	if (error_log.version != 1)
		printk(KERN_WARNING "Unknown version (%d), please implement me\n", 
				error_log.version);

	switch (error_log.disposition) {
		case DISP_FULLY_RECOVERED:
			/* there was an error, but everything is fine now */
			return 0;
		case DISP_NOT_RECOVERED:
			printk("We have a really serious Problem!\n");
		case DISP_LIMITED_RECOVERY:
			printk("Error classification\n");
			printk("Severity  : %s\n", 
					ppc_rtas_errorlog_check_severity (error_log));
			printk("Initiator : %s\n", 
					ppc_rtas_errorlog_check_initiator (error_log));
			printk("Target    : %s\n", 
					ppc_rtas_errorlog_check_target (error_log));
			printk("Type      : %s\n", 
					ppc_rtas_errorlog_check_type (error_log));
			printk("Ext. log  : %s\n", 
					ppc_rtas_errorlog_check_extended (error_log));
			if (error_log.extended)
				ppc_rtas_errorlog_disect_extended (logdata);
			return 1;	
		default:
			/* nothing */
			break;
	}
	return 0;
}
/* ****************************************************************** */
const char * ppc_rtas_errorlog_check_type (rtas_error_log error_log)
{
	const char *_errlog_type[] = {
		"unknown type",
		"too many tries failed",
		"TCE error",
		"RTAS device failed",
		"target timed out",
		"parity error on data",			/* 5 */
		"parity error on address",
		"parity error on external cache",
		"access to invalid address",
		"uncorrectable ECC error",
		"corrected ECC error"			/* 10 */
	};
	if (error_log.type == TYPE_EPOW) 
		return "EPOW"; 
	if (error_log.type >= TYPE_PMGM_POWER_SW_ON)
		return "PowerMGM Event (not handled right now)";
	return _errlog_type[error_log.type];
}

/*
 * BK Id: SCCS/s.error_log.h 1.5 05/17/01 18:14:21 cort
 */
#ifndef __ERROR_LOG_H__
#define __ERROR_LOG_H__

#define VERBOSE_ERRORS		1 /* Maybe I enlarge the kernel too much */
#undef VERBOSE_ERRORS

/* Event classes */
/* XXX: Endianess correct? NOW*/
#define INTERNAL_ERROR		0x80000000 /* set bit 0 */
#define EPOW_WARNING		0x40000000 /* set bit 1 */
#define POWERMGM_EVENTS		0x20000000 /* set bit 2 */

/* event-scan returns */
#define SEVERITY_FATAL		0x5
#define SEVERITY_ERROR		0x4
#define SEVERITY_ERROR_SYNC	0x3
#define SEVERITY_WARNING	0x2
#define SEVERITY_EVENT		0x1
#define SEVERITY_NO_ERROR	0x0
#define DISP_FULLY_RECOVERED	0x0
#define DISP_LIMITED_RECOVERY	0x1
#define DISP_NOT_RECOVERED	0x2
#define PART_PRESENT		0x0
#define PART_NOT_PRESENT	0x1
#define INITIATOR_UNKNOWN	0x0
#define INITIATOR_CPU		0x1
#define INITIATOR_PCI		0x2
#define INITIATOR_ISA		0x3
#define INITIATOR_MEMORY	0x4
#define INITIATOR_POWERMGM	0x5
#define TARGET_UNKNOWN		0x0
#define TARGET_CPU		0x1
#define TARGET_PCI		0x2
#define TARGET_ISA		0x3
#define TARGET_MEMORY		0x4
#define TARGET_POWERMGM		0x5
#define TYPE_RETRY		0x01
#define TYPE_TCE_ERR		0x02
#define TYPE_INTERN_DEV_FAIL	0x03
#define TYPE_TIMEOUT		0x04
#define TYPE_DATA_PARITY	0x05
#define TYPE_ADDR_PARITY	0x06
#define TYPE_CACHE_PARITY	0x07
#define TYPE_ADDR_INVALID	0x08
#define TYPE_ECC_UNCORR		0x09
#define TYPE_ECC_CORR		0x0a
#define TYPE_EPOW		0x40
/* I don't add PowerMGM events right now, this is a different topic */ 
#define TYPE_PMGM_POWER_SW_ON	0x60
#define TYPE_PMGM_POWER_SW_OFF	0x61
#define TYPE_PMGM_LID_OPEN	0x62
#define TYPE_PMGM_LID_CLOSE	0x63
#define TYPE_PMGM_SLEEP_BTN	0x64
#define TYPE_PMGM_WAKE_BTN	0x65
#define TYPE_PMGM_BATTERY_WARN	0x66
#define TYPE_PMGM_BATTERY_CRIT	0x67
#define TYPE_PMGM_SWITCH_TO_BAT	0x68
#define TYPE_PMGM_SWITCH_TO_AC	0x69
#define TYPE_PMGM_KBD_OR_MOUSE	0x6a
#define TYPE_PMGM_ENCLOS_OPEN	0x6b
#define TYPE_PMGM_ENCLOS_CLOSED	0x6c
#define TYPE_PMGM_RING_INDICATE	0x6d
#define TYPE_PMGM_LAN_ATTENTION	0x6e
#define TYPE_PMGM_TIME_ALARM	0x6f
#define TYPE_PMGM_CONFIG_CHANGE	0x70
#define TYPE_PMGM_SERVICE_PROC	0x71

typedef struct _rtas_error_log {
	unsigned long version:8;		/* Architectural version */
	unsigned long severity:3;		/* Severity level of error */
	unsigned long disposition:2;		/* Degree of recovery */
	unsigned long extended:1;		/* extended log present? */
	unsigned long /* reserved */ :2;	/* Reserved for future use */
	unsigned long initiator:4;		/* Initiator of event */
	unsigned long target:4;			/* Target of failed operation */
	unsigned long type:8;			/* General event or error*/
	unsigned long extended_log_length:32;	/* length in bytes */
} rtas_error_log;

/* ****************************************************************** */
#define ppc_rtas_errorlog_check_severity(x) \
	(_errlog_severity[x.severity])
#define ppc_rtas_errorlog_check_target(x) \
	(_errlog_target[x.target])
#define ppc_rtas_errorlog_check_initiator(x) \
	(_errlog_initiator[x.initiator])
#define ppc_rtas_errorlog_check_extended(x) \
	(_errlog_extended[x.extended])
#define ppc_rtas_errorlog_disect_extended(x) \
	do { /* implement me */ } while(0)
extern const char * ppc_rtas_errorlog_check_type (rtas_error_log error_log);
extern int ppc_rtas_errorlog_scan(void);


#endif /* __ERROR_LOG_H__ */
/*
 * BK Id: SCCS/s.gemini_prom.S 1.5 05/17/01 18:14:21 cort
 */
/*
 *  arch/ppc/kernel/gemini_prom.S
 *
 *  Not really prom support code (yet), but sort of anti-prom code.  The current
 *  bootloader does a number of things it shouldn't and doesn't do things that it
 *  should.  The stuff in here is mainly a hodge-podge collection of setup code
 *  to get the board up and running.
 *    ---Dan
 */

#include "ppc_asm.tmpl"
#include "ppc_defs.h"
#include <linux/config.h>
#include <asm/processor.h>
#include <asm/page.h>
#include <asm/gemini.h>

#define HID0_ABE (1<<3)

/*
 *  On 750's the MMU is on when Linux is booted, so we need to clear out the
 *  bootloader's BAT settings, make sure we're in supervisor state (gotcha!),
 *  and turn off the MMU.
 *
 */

_GLOBAL(gemini_prom_init)
#ifdef CONFIG_SMP
	/* Since the MMU's on, get stuff in rom space that we'll need */
	lis	r4,GEMINI_CPUSTAT@h
	ori	r4,r4,GEMINI_CPUSTAT@l
	lbz	r5,0(r4)
	andi.	r5,r5,3
	mr	r24,r5		/* cpu # used later on */
#endif
	mfmsr	r4
	li	r3,MSR_PR	/* ensure supervisor! */
	ori	r3,r3,MSR_IR|MSR_DR
	andc	r4,r4,r3
	mtmsr	r4
	isync
#if 0
	/* zero out the bats now that the MMU is off */
prom_no_mmu:	
	li	r3,0
        mtspr   IBAT0U,r3
        mtspr   IBAT0L,r3
        mtspr   IBAT1U,r3
        mtspr   IBAT1L,r3
        mtspr   IBAT2U,r3
        mtspr   IBAT2L,r3
        mtspr   IBAT3U,r3
        mtspr   IBAT3L,r3

        mtspr   DBAT0U,r3
        mtspr   DBAT0L,r3
        mtspr   DBAT1U,r3
        mtspr   DBAT1L,r3
        mtspr   DBAT2U,r3
	mtspr   DBAT2L,r3
        mtspr   DBAT3U,r3
        mtspr   DBAT3L,r3
#endif

	/* the bootloader (as far as I'm currently aware) doesn't mess with page
	   tables, but since we're already here, might as well zap these, too */
	li	r4,0
	mtspr	SDR1,r4

	li	r4,16
	mtctr	r4
	li	r3,0
	li	r4,0
3:	mtsrin	r3,r4
	addi	r3,r3,1
	bdnz	3b

#ifdef CONFIG_SMP
	/* The 750 book (and Mot/IBM support) says that this will "assist" snooping
	   when in SMP.  Not sure yet whether this should stay or leave... */
	mfspr	r4,HID0
	ori	r4,r4,HID0_ABE
	mtspr	HID0,r4
	sync
#endif /* CONFIG_SMP */
	blr

/*  apparently, SMon doesn't pay attention to HID0[SRST].  Disable the MMU and
    branch to 0xfff00100 */
_GLOBAL(_gemini_reboot)
	lis	r5,GEMINI_BOOT_INIT@h
	ori	r5,r5,GEMINI_BOOT_INIT@l
	li	r6,MSR_IP
	mtspr	SRR0,r5
	mtspr	SRR1,r6
	rfi
/*
 * BK Id: SCCS/s.gemini_setup.c 1.14 10/18/01 11:16:28 trini
 */
/*
 *  linux/arch/ppc/kernel/setup.c
 *
 *  Copyright (C) 1995 Linus Torvalds
 *  Adapted from 'alpha' version by Gary Thomas
 *  Modified by Cort Dougan (cort@cs.nmt.edu)
 *  Synergy Microsystems board support by Dan Cox (dan@synergymicro.com)
 *
 */

#include <linux/config.h>
#include <linux/stddef.h>
#include <linux/kernel.h>
#include <linux/init.h>
#include <linux/errno.h> 
#include <linux/reboot.h>
#include <linux/pci.h>
#include <linux/time.h>
#include <linux/kdev_t.h>
#include <linux/types.h>
#include <linux/major.h>
#include <linux/blk.h>
#include <linux/console.h>
#include <linux/seq_file.h>

#include <asm/system.h>
#include <asm/pgtable.h>
#include <asm/page.h>
#include <asm/dma.h>
#include <asm/io.h>
#include <asm/m48t35.h>
#include <asm/gemini.h>
#include <asm/time.h>

#include "local_irq.h"
#include "open_pic.h"

void gemini_find_bridges(void);
static int gemini_get_clock_speed(void);
extern void gemini_pcibios_fixup(void);

static char *gemini_board_families[] = {
  "VGM", "VSS", "KGM", "VGR", "VCM", "VCS", "KCM", "VCR"
};
static int gemini_board_count = sizeof(gemini_board_families) /
                                 sizeof(gemini_board_families[0]);

static unsigned int cpu_7xx[16] = {
	0, 15, 14, 0, 0, 13, 5, 9, 6, 11, 8, 10, 16, 12, 7, 0
};
static unsigned int cpu_6xx[16] = {
	0, 0, 14, 0, 0, 13, 5, 9, 6, 11, 8, 10, 0, 12, 7, 0
};

/*
 * prom_init is the Gemini version of prom.c:prom_init.  We only need
 * the BSS clearing code, so I copied that out of prom.c.  This is a
 * lot simpler than hacking prom.c so it will build with Gemini. -VAL
 */

#define PTRRELOC(x)	((typeof(x))((unsigned long)(x) + offset))

unsigned long
prom_init(void)
{
	unsigned long offset = reloc_offset();
	unsigned long phys;
	extern char __bss_start, _end;

	/* First zero the BSS -- use memset, some arches don't have
	 * caches on yet */
	memset_io(PTRRELOC(&__bss_start),0 , &_end - &__bss_start);

 	/* Default */
 	phys = offset + KERNELBASE;

	gemini_prom_init();

	return phys;
}

int
gemini_show_cpuinfo(struct seq_file *m)
{
	unsigned char reg, rev;
	char *family;
	unsigned int type;

	reg = readb(GEMINI_FEAT);
	family = gemini_board_families[((reg>>4) & 0xf)];
	if (((reg>>4) & 0xf) > gemini_board_count)
		printk(KERN_ERR "cpuinfo(): unable to determine board family\n");

	reg = readb(GEMINI_BREV);
	type = (reg>>4) & 0xf;
	rev = reg & 0xf;

	reg = readb(GEMINI_BECO);

	seq_printf(m, "machine\t\t: Gemini %s%d, rev %c, eco %d\n", 
		   family, type, (rev + 'A'), (reg & 0xf));

	seq_printf(m, "board\t\t: Gemini %s", family);
	if (type > 9)
		seq_printf(m, "%c", (type - 10) + 'A');
	else
		seq_printf(m, "%d", type);

	seq_printf(m, ", rev %c, eco %d\n", (rev + 'A'), (reg & 0xf));

	seq_printf(m, "clock\t\t: %dMhz\n", gemini_get_clock_speed());

	return 0;
}

static u_char gemini_openpic_initsenses[] = {
	1,
	1,
	1,
	1,
	0,
	0,
	1, /* remainder are level-triggered */
};

#define GEMINI_MPIC_ADDR (0xfcfc0000)
#define GEMINI_MPIC_PCI_CFG (0x80005800)

void __init gemini_openpic_init(void)
{

	OpenPIC_Addr = (volatile struct OpenPIC *)
		grackle_read(GEMINI_MPIC_PCI_CFG + 0x10);
	OpenPIC_InitSenses = gemini_openpic_initsenses;
	OpenPIC_NumInitSenses = sizeof( gemini_openpic_initsenses );

	ioremap( GEMINI_MPIC_ADDR, OPENPIC_SIZE);
}


extern unsigned long loops_per_jiffy;
extern int root_mountflags;
extern char cmd_line[];

void
gemini_heartbeat(void)
{
	static unsigned long led = GEMINI_LEDBASE+(4*8);
	static char direction = 8;

	/* We only want to do this on 1 CPU */
	if (smp_processor_id())
		return;
	*(char *)led = 0;
	if ( (led + direction) > (GEMINI_LEDBASE+(7*8)) ||
	     (led + direction) < (GEMINI_LEDBASE+(4*8)) )
		direction *= -1;
	led += direction;
	*(char *)led = 0xff;
	ppc_md.heartbeat_count = ppc_md.heartbeat_reset;
}

void __init gemini_setup_arch(void)
{
	extern char cmd_line[];


	loops_per_jiffy = 50000000/HZ;

#ifdef CONFIG_BLK_DEV_INITRD
	/* bootable off CDROM */
	if (initrd_start)
		ROOT_DEV = MKDEV(SCSI_CDROM_MAJOR, 0);
	else
#endif
		ROOT_DEV = to_kdev_t(0x0801);

	/* nothing but serial consoles... */
	sprintf(cmd_line, "%s console=ttyS0", cmd_line);

	printk("Boot arguments: %s\n", cmd_line);

	ppc_md.heartbeat = gemini_heartbeat;
	ppc_md.heartbeat_reset = HZ/8;
	ppc_md.heartbeat_count = 1;
	
	/* Lookup PCI hosts */
	gemini_find_bridges();
	/* take special pains to map the MPIC, since it isn't mapped yet */
	gemini_openpic_init();
	/* start the L2 */
	gemini_init_l2();
}


int
gemini_get_clock_speed(void)
{
	unsigned long hid1, pvr;
	int clock;

	pvr = mfspr(PVR);
	hid1 = (mfspr(HID1) >> 28) & 0xf;
	if (PVR_VER(pvr) == 8 ||
	    PVR_VER(pvr) == 12)
		hid1 = cpu_7xx[hid1];
	else
		hid1 = cpu_6xx[hid1];

	switch((readb(GEMINI_BSTAT) & 0xc) >> 2) {

	case 0:
	default:
		clock = (hid1*100)/3;
		break;
  
	case 1:
		clock = (hid1*125)/3;
		break;
  
	case 2:
		clock = (hid1*50);
		break;
	}

	return clock;
}

void __init gemini_init_l2(void)
{
        unsigned char reg, brev, fam, creg;
        unsigned long cache;
        unsigned long pvr;

        reg = readb(GEMINI_L2CFG);
        brev = readb(GEMINI_BREV);
        fam = readb(GEMINI_FEAT);
        pvr = mfspr(PVR);

        switch(PVR_VER(pvr)) {

        case 8:
                if (reg & 0xc0)
                        cache = (((reg >> 6) & 0x3) << 28);
                else
                        cache = 0x3 << 28;

#ifdef CONFIG_SMP
                /* Pre-3.0 processor revs had snooping errata.  Leave
                   their L2's disabled with SMP. -- Dan */
                if (PVR_CFG(pvr) < 3) {
                        printk("Pre-3.0 750; L2 left disabled!\n");
                        return;
                }
#endif /* CONFIG_SMP */

                /* Special case: VGM5-B's came before L2 ratios were set on
                   the board.  Processor speed shouldn't be too high, so
                   set L2 ratio to 1:1.5.  */
                if ((brev == 0x51) && ((fam & 0xa0) >> 4) == 0)
                        reg |= 1;

                /* determine best cache ratio based upon what the board
                   tells us (which sometimes _may_ not be true) and
                   the processor speed. */
                else {
                        if (gemini_get_clock_speed() > 250)
                                reg = 2;
                }
                break;
        case 12:
	{
		static unsigned long l2_size_val = 0;
		
		if (!l2_size_val)
			l2_size_val = _get_L2CR();
		cache = l2_size_val;
                break;
	}
        case 4:
        case 9:
                creg = readb(GEMINI_CPUSTAT);
                if (((creg & 0xc) >> 2) != 1)
                        printk("Dual-604 boards don't support the use of L2\n");
                else
                        writeb(1, GEMINI_L2CFG);
                return;
        default:
                printk("Unknown processor; L2 left disabled\n");
                return;
        }

        cache |= ((1<<reg) << 25);
        cache |= (L2CR_L2RAM_MASK|L2CR_L2CTL|L2CR_L2DO);
        _set_L2CR(0);
        _set_L2CR(cache | L2CR_L2E);

}

void
gemini_restart(char *cmd)
{
	__cli();
	/* make a clean restart, not via the MPIC */
	_gemini_reboot();
	for(;;);
}

void
gemini_power_off(void)
{
	for(;;);
}

void
gemini_halt(void)
{
	gemini_restart(NULL);
}

void __init gemini_init_IRQ(void)
{
	/* gemini has no 8259 */
	openpic_init(1, 0, 0, -1);
}

#define gemini_rtc_read(x)       (readb(GEMINI_RTC+(x)))
#define gemini_rtc_write(val,x)  (writeb((val),(GEMINI_RTC+(x))))

/* ensure that the RTC is up and running */
long __init gemini_time_init(void)
{
	unsigned char reg;

	reg = gemini_rtc_read(M48T35_RTC_CONTROL);

	if ( reg & M48T35_RTC_STOPPED ) {
		printk(KERN_INFO "M48T35 real-time-clock was stopped. Now starting...\n");
		gemini_rtc_write((reg & ~(M48T35_RTC_STOPPED)), M48T35_RTC_CONTROL);
		gemini_rtc_write((reg | M48T35_RTC_SET), M48T35_RTC_CONTROL);
	}
	return 0;
}

#undef DEBUG_RTC

unsigned long
gemini_get_rtc_time(void)
{
	unsigned int year, mon, day, hour, min, sec;
	unsigned char reg;

	reg = gemini_rtc_read(M48T35_RTC_CONTROL);
	gemini_rtc_write((reg|M48T35_RTC_READ), M48T35_RTC_CONTROL);
#ifdef DEBUG_RTC
	printk("get rtc: reg = %x\n", reg);
#endif
  
	do {
		sec = gemini_rtc_read(M48T35_RTC_SECONDS);
		min = gemini_rtc_read(M48T35_RTC_MINUTES);
		hour = gemini_rtc_read(M48T35_RTC_HOURS);
		day = gemini_rtc_read(M48T35_RTC_DOM);
		mon = gemini_rtc_read(M48T35_RTC_MONTH);
		year = gemini_rtc_read(M48T35_RTC_YEAR);
	} while( sec != gemini_rtc_read(M48T35_RTC_SECONDS));
#ifdef DEBUG_RTC
	printk("get rtc: sec=%x, min=%x, hour=%x, day=%x, mon=%x, year=%x\n", 
	       sec, min, hour, day, mon, year);
#endif

	gemini_rtc_write(reg, M48T35_RTC_CONTROL);

	BCD_TO_BIN(sec);
	BCD_TO_BIN(min);
	BCD_TO_BIN(hour);
	BCD_TO_BIN(day);
	BCD_TO_BIN(mon);
	BCD_TO_BIN(year);

	if ((year += 1900) < 1970)
		year += 100;
#ifdef DEBUG_RTC
	printk("get rtc: sec=%x, min=%x, hour=%x, day=%x, mon=%x, year=%x\n", 
	       sec, min, hour, day, mon, year);
#endif

	return mktime( year, mon, day, hour, min, sec );
}


int
gemini_set_rtc_time( unsigned long now )
{
	unsigned char reg;
	struct rtc_time tm;

	to_tm( now, &tm );

	reg = gemini_rtc_read(M48T35_RTC_CONTROL);
#if DEBUG_RTC
	printk("set rtc: reg = %x\n", reg);
#endif
  
	gemini_rtc_write((reg|M48T35_RTC_SET), M48T35_RTC_CONTROL);
#if DEBUG_RTC
	printk("set rtc: tm vals - sec=%x, min=%x, hour=%x, mon=%x, mday=%x, year=%x\n",
	       tm.tm_sec, tm.tm_min, tm.tm_hour, tm.tm_mon, tm.tm_mday, tm.tm_year);
#endif
  
	tm.tm_year -= 1900;
	BIN_TO_BCD(tm.tm_sec);
	BIN_TO_BCD(tm.tm_min);
	BIN_TO_BCD(tm.tm_hour);
	BIN_TO_BCD(tm.tm_mon);
	BIN_TO_BCD(tm.tm_mday);
	BIN_TO_BCD(tm.tm_year);
#ifdef DEBUG_RTC
	printk("set rtc: tm vals - sec=%x, min=%x, hour=%x, mon=%x, mday=%x, year=%x\n",
	       tm.tm_sec, tm.tm_min, tm.tm_hour, tm.tm_mon, tm.tm_mday, tm.tm_year);
#endif

	gemini_rtc_write(tm.tm_sec, M48T35_RTC_SECONDS);
	gemini_rtc_write(tm.tm_min, M48T35_RTC_MINUTES);
	gemini_rtc_write(tm.tm_hour, M48T35_RTC_HOURS);
	gemini_rtc_write(tm.tm_mday, M48T35_RTC_DOM);
	gemini_rtc_write(tm.tm_mon, M48T35_RTC_MONTH);
	gemini_rtc_write(tm.tm_year, M48T35_RTC_YEAR);

	/* done writing */
	gemini_rtc_write(reg, M48T35_RTC_CONTROL);

	if ((time_state == TIME_ERROR) || (time_state == TIME_BAD))
		time_state = TIME_OK;
  
	return 0;
}

/*  use the RTC to determine the decrementer count */
void __init gemini_calibrate_decr(void)
{
	int freq, divisor;
	unsigned char reg;

	/* determine processor bus speed */
	reg = readb(GEMINI_BSTAT);

	switch(((reg & 0x0c)>>2)&0x3) {
	case 0:
	default:
		freq = 66667;
		break;
	case 1:
		freq = 83000;
		break;
	case 2:
		freq = 100000;
		break;
	}

	freq *= 1000;
	divisor = 4;
	tb_ticks_per_jiffy = freq / HZ / divisor;
	tb_to_us = mulhwu_scale_factor(freq/divisor, 1000000);
}

unsigned long __init gemini_find_end_of_memory(void)
{
	unsigned long total;
	unsigned char reg;

	reg = readb(GEMINI_MEMCFG);
	total = ((1<<((reg & 0x7) - 1)) *
		 (8<<((reg >> 3) & 0x7)));
	total *= (1024*1024);
	return total;
}

static void __init
gemini_map_io(void)
{
	io_block_mapping(0xf0000000, 0xf0000000, 0x10000000, _PAGE_IO);
	io_block_mapping(0x80000000, 0x80000000, 0x10000000, _PAGE_IO);
}

#ifdef CONFIG_SMP
static int
smp_gemini_probe(void)
{
	int i, nr;

        nr = (readb(GEMINI_CPUSTAT) & GEMINI_CPU_COUNT_MASK) >> 2;
	if (nr == 0)
		nr = 4;

	if (nr > 1) {
		openpic_request_IPIs();
		for (i = 1; i < nr; ++i)
			smp_hw_index[i] = i;
	}

	return nr;
}

static void
smp_gemini_kick_cpu(int nr)
{
	openpic_reset_processor_phys(1 << nr);
	openpic_reset_processor_phys(0);
}

static void
smp_gemini_setup_cpu(int cpu_nr)
{
	if (OpenPIC_Addr)
		do_openpic_setup_cpu();
	if (cpu_nr > 0)
		gemini_init_l2();
}

static struct smp_ops_t gemini_smp_ops = {
	smp_openpic_message_pass,
	smp_gemini_probe,
	smp_gemini_kick_cpu,
	smp_gemini_setup_cpu,
};
#endif /* CONFIG_SMP */

void __init platform_init(unsigned long r3, unsigned long r4, unsigned long r5,
			  unsigned long r6, unsigned long r7)
{
	int i;

	for(i = 0; i < GEMINI_LEDS; i++)
		gemini_led_off(i);
 
	ISA_DMA_THRESHOLD = 0;
	DMA_MODE_READ = 0;
	DMA_MODE_WRITE = 0;

#ifdef CONFIG_BLK_DEV_INITRD
	if ( r4 )
	{
		initrd_start = r4 + KERNELBASE;
		initrd_end = r5 + KERNELBASE;
	}
#endif

	ppc_md.setup_arch = gemini_setup_arch;
	ppc_md.show_cpuinfo = gemini_show_cpuinfo;
	ppc_md.irq_cannonicalize = NULL;
	ppc_md.init_IRQ = gemini_init_IRQ;
	ppc_md.get_irq = openpic_get_irq;
	ppc_md.init = NULL;

	ppc_md.restart = gemini_restart;
	ppc_md.power_off = gemini_power_off;
	ppc_md.halt = gemini_halt;

	ppc_md.time_init = gemini_time_init;
	ppc_md.set_rtc_time = gemini_set_rtc_time;
	ppc_md.get_rtc_time = gemini_get_rtc_time;
	ppc_md.calibrate_decr = gemini_calibrate_decr;

	ppc_md.find_end_of_memory = gemini_find_end_of_memory;
	ppc_md.setup_io_mappings = gemini_map_io;

	/* no keyboard/mouse/video stuff yet.. */
	ppc_md.kbd_setkeycode = NULL;
	ppc_md.kbd_getkeycode = NULL;
	ppc_md.kbd_translate = NULL;
	ppc_md.kbd_unexpected_up = NULL;
	ppc_md.kbd_leds = NULL;
	ppc_md.kbd_init_hw = NULL;
	ppc_md.ppc_kbd_sysrq_xlate = NULL;
	ppc_md.pcibios_fixup_bus = gemini_pcibios_fixup;

#ifdef CONFIG_SMP
	ppc_md.smp_ops = &gemini_smp_ops;
#endif /* CONFIG_SMP */
}
/*
 * BK Id: SCCS/s.apus_pci.h 1.4 05/17/01 18:14:21 cort
 */
/*
 * Phase5 CybervisionPPC (TVP4020) definitions for the Permedia2 framebuffer
 * driver.
 *
 * Copyright (c) 1998-1999 Ilario Nardinocchi (nardinoc@CS.UniBO.IT)
 * --------------------------------------------------------------------------
 * This file is subject to the terms and conditions of the GNU General Public
 * License.  See the file README.legal in the main directory of this archive
 * for more details.
 */

#ifndef APUS_PCI_H
#define APUS_PCI_H


#include "pci.h"


#define CSPPC_PCI_BRIDGE		0xfffe0000
#define CSPPC_BRIDGE_ENDIAN		0x0000
#define CSPPC_BRIDGE_INT		0x0010

#define	CVPPC_PCI_CONFIG		0xfffc0000
#define CVPPC_ROM_ADDRESS		0xe2000001
#define CVPPC_REGS_REGION		0xef000000
#define CVPPC_FB_APERTURE_ONE		0xe0000000
#define CVPPC_FB_APERTURE_TWO		0xe1000000
#define CVPPC_FB_SIZE			0x00800000

/* CVPPC_BRIDGE_ENDIAN */
#define CSPPCF_BRIDGE_BIG_ENDIAN	0x02

/* CVPPC_BRIDGE_INT */
#define CSPPCF_BRIDGE_ACTIVE_INT2	0x01


#endif	/* APUS_PCI_H */
/*
 * BK Id: %F% %I% %G% %U% %#%
 */
/*
 * Procedures for drawing on the screen early on in the boot process.
 *
 * Benjamin Herrenschmidt <benh@kernel.crashing.org>
 */
#include <linux/config.h>
#include <linux/kernel.h>
#include <linux/string.h>
#include <linux/init.h>
#include <linux/version.h>

#include <asm/sections.h>
#include <asm/bootx.h>
#include <asm/btext.h>
#include <asm/prom.h>
#include <asm/page.h>
#include <asm/mmu.h>
#include <asm/pgtable.h>
#include <asm/io.h>
#include <asm/processor.h>

#define NO_SCROLL

#ifndef NO_SCROLL
static void scrollscreen(void);
#endif

static void draw_byte(unsigned char c, long locX, long locY);
static void draw_byte_32(unsigned char *bits, unsigned long *base, int rb);
static void draw_byte_16(unsigned char *bits, unsigned long *base, int rb);
static void draw_byte_8(unsigned char *bits, unsigned long *base, int rb);

static int g_loc_X;
static int g_loc_Y;
static int g_max_loc_X;
static int g_max_loc_Y;

unsigned long disp_BAT[2] __initdata = {0, 0};

#define cmapsz	(16*256)

static unsigned char vga_font[cmapsz];

int boot_text_mapped = 1;

boot_infos_t *disp_bi;
boot_infos_t fake_bi;

extern char *klimit;

/*
 * Powermac can use btext_* after boot for xmon,
 * chrp only uses it during early boot.
 */
#ifdef CONFIG_XMON
#define BTEXT	__pmac
#define BTDATA	__pmacdata
#else
#define BTEXT	__init
#define BTDATA	__initdata
#endif /* CONFIG_XMON */

/*
 * This is called only when we are booted via BootX.
 */
void __init
btext_init(boot_infos_t *bi)
{
	unsigned long offset = reloc_offset();

	RELOC(g_loc_X) = 0;
	RELOC(g_loc_Y) = 0;
	RELOC(g_max_loc_X) = (bi->dispDeviceRect[2] - bi->dispDeviceRect[0]) / 8;
	RELOC(g_max_loc_Y) = (bi->dispDeviceRect[3] - bi->dispDeviceRect[1]) / 16;
	RELOC(disp_bi) = PTRUNRELOC(bi);
}

void __init
btext_welcome(boot_infos_t* bi)
{
	unsigned long offset = reloc_offset();
	unsigned long flags;
	unsigned long pvr;
	
	btext_drawstring(RELOC("Welcome to Linux, kernel " UTS_RELEASE "\n"));
	btext_drawstring(RELOC("\nlinked at        : 0x"));
	btext_drawhex(KERNELBASE);
	btext_drawstring(RELOC("\nframe buffer at  : 0x"));
	btext_drawhex((unsigned long)bi->dispDeviceBase);
	btext_drawstring(RELOC(" (phys), 0x"));
	btext_drawhex((unsigned long)bi->logicalDisplayBase);
	btext_drawstring(RELOC(" (log)"));
	btext_drawstring(RELOC("\nklimit           : 0x"));
	btext_drawhex((unsigned long)RELOC(klimit));
	btext_drawstring(RELOC("\nMSR              : 0x"));
	__asm__ __volatile__ ("mfmsr %0" : "=r" (flags));
	btext_drawhex(flags);
	__asm__ __volatile__ ("mfspr %0, 287" : "=r" (pvr));
	pvr >>= 16;
	if (pvr > 1) {
	    btext_drawstring(RELOC("\nHID0             : 0x"));
	    __asm__ __volatile__ ("mfspr %0, 1008" : "=r" (flags));
	    btext_drawhex(flags);
	}
	if (pvr == 8 || pvr == 12 || pvr == 0x800c) {
	    btext_drawstring(RELOC("\nICTC             : 0x"));
	    __asm__ __volatile__ ("mfspr %0, 1019" : "=r" (flags));
	    btext_drawhex(flags);
	}
	btext_drawstring(RELOC("\n\n"));
}

/* Calc BAT values for mapping the display and store them
 * in disp_BAT.  Those values are then used from head.S to map
 * the display during identify_machine() and MMU_Init()
 * 
 * The display is mapped to virtual address 0xD0000000, rather
 * than 1:1, because some some CHRP machines put the frame buffer
 * in the region starting at 0xC0000000 (KERNELBASE).
 * This mapping is temporary and will disappear as soon as the
 * setup done by MMU_Init() is applied.
 * 
 * For now, we align the BAT and then map 8Mb on 601 and 16Mb
 * on other PPCs. This may cause trouble if the framebuffer
 * is really badly aligned, but I didn't encounter this case
 * yet.
 */
void __init
btext_prepare_BAT(void)
{
	unsigned long offset = reloc_offset();
	boot_infos_t* bi = PTRRELOC(RELOC(disp_bi));
	unsigned long vaddr = KERNELBASE + 0x10000000;
	unsigned long addr;
	unsigned long lowbits;

	if (!RELOC(disp_bi)) {
		RELOC(boot_text_mapped) = 0;
		return;
	}
	addr = (unsigned long)bi->dispDeviceBase;
	if (!addr) {
		RELOC(boot_text_mapped) = 0;
		return;
	}
	if (PVR_VER(mfspr(PVR)) != 1) {
		/* 603, 604, G3, G4, ... */
		lowbits = addr & ~0xFF000000UL;
		addr &= 0xFF000000UL;
		RELOC(disp_BAT[0]) = vaddr | (BL_16M<<2) | 2;
		RELOC(disp_BAT[1]) = addr | (_PAGE_NO_CACHE | _PAGE_GUARDED | BPP_RW);		
	} else {
		/* 601 */
		lowbits = addr & ~0xFF800000UL;
		addr &= 0xFF800000UL;
		RELOC(disp_BAT[0]) = vaddr | (_PAGE_NO_CACHE | PP_RWXX) | 4;
		RELOC(disp_BAT[1]) = addr | BL_8M | 0x40;
	}
	bi->logicalDisplayBase = (void *) (vaddr + lowbits);
}

/* This function will enable the early boot text when doing OF booting. This
 * way, xmon output should work too
 */
void __init
btext_setup_display(int width, int height, int depth, int pitch,
		    unsigned long address)
{
	unsigned long offset = reloc_offset();
	boot_infos_t* bi;

	RELOC(disp_bi) = &fake_bi;
	bi = PTRRELOC((&fake_bi));
	RELOC(g_loc_X) = 0;
	RELOC(g_loc_Y) = 0;
	RELOC(g_max_loc_X) = width / 8;
	RELOC(g_max_loc_Y) = height / 16;
	bi->logicalDisplayBase = (unsigned char *)address;
	bi->dispDeviceBase = (unsigned char *)address;
	bi->dispDeviceRowBytes = pitch;
	bi->dispDeviceDepth = depth;
	bi->dispDeviceRect[0] = bi->dispDeviceRect[1] = 0;
	bi->dispDeviceRect[2] = width;
	bi->dispDeviceRect[3] = height;
}

/* Here's a small text engine to use during early boot
 * or for debugging purposes
 * 
 * todo:
 * 
 *  - build some kind of vgacon with it to enable early printk
 *  - move to a separate file
 *  - add a few video driver hooks to keep in sync with display
 *    changes.
 */

void __openfirmware
map_boot_text(void)
{
	unsigned long base, offset, size;
	if (disp_bi == 0)
		return;
	base = ((unsigned long) disp_bi->dispDeviceBase) & 0xFFFFF000UL;
	offset = ((unsigned long) disp_bi->dispDeviceBase) - base;
	size = disp_bi->dispDeviceRowBytes * disp_bi->dispDeviceRect[3] + offset
		+ disp_bi->dispDeviceRect[0];
	disp_bi->logicalDisplayBase = ioremap(base, size);
	if (disp_bi->logicalDisplayBase == 0)
		return;
	disp_bi->logicalDisplayBase += offset;
	boot_text_mapped = 1;
}

/* Calc the base address of a given point (x,y) */
static unsigned char * BTEXT
calc_base(boot_infos_t *bi, int x, int y)
{
	unsigned char *base;

	base = bi->logicalDisplayBase;
	if (base == 0)
		base = bi->dispDeviceBase;
	base += (x + bi->dispDeviceRect[0]) * (bi->dispDeviceDepth >> 3);
	base += (y + bi->dispDeviceRect[1]) * bi->dispDeviceRowBytes;
	return base;
}

/* Adjust the display to a new resolution */
void
btext_update_display(unsigned long phys, int width, int height,
		     int depth, int pitch)
{
	if (disp_bi == 0)
		return;

	/* check it's the same frame buffer (within 256MB) */
	if ((phys ^ (unsigned long)disp_bi->dispDeviceBase) & 0xf0000000)
		return;

	disp_bi->dispDeviceBase = (__u8 *) phys;
	disp_bi->dispDeviceRect[0] = 0;
	disp_bi->dispDeviceRect[1] = 0;
	disp_bi->dispDeviceRect[2] = width;
	disp_bi->dispDeviceRect[3] = height;
	disp_bi->dispDeviceDepth = depth;
	disp_bi->dispDeviceRowBytes = pitch;
	if (boot_text_mapped) {
		iounmap(disp_bi->logicalDisplayBase);
		boot_text_mapped = 0;
	}
	map_boot_text();
	g_loc_X = 0;
	g_loc_Y = 0;
	g_max_loc_X = width / 8;
	g_max_loc_Y = height / 16;
}

void BTEXT btext_clearscreen(void)
{
	unsigned long offset	= reloc_offset();
	boot_infos_t* bi	= PTRRELOC(RELOC(disp_bi));
	unsigned long *base	= (unsigned long *)calc_base(bi, 0, 0);
	unsigned long width 	= ((bi->dispDeviceRect[2] - bi->dispDeviceRect[0]) *
					(bi->dispDeviceDepth >> 3)) >> 2;
	int i,j;
	
	for (i=0; i<(bi->dispDeviceRect[3] - bi->dispDeviceRect[1]); i++)
	{
		unsigned long *ptr = base;
		for(j=width; j; --j)
			*(ptr++) = 0;
		base += (bi->dispDeviceRowBytes >> 2);
	}
}

__inline__ void dcbst(const void* addr)
{
	__asm__ __volatile__ ("dcbst 0,%0" :: "r" (addr));
}

void BTEXT btext_flushscreen(void)
{
	unsigned long offset	= reloc_offset();
	boot_infos_t* bi	= PTRRELOC(RELOC(disp_bi));
	unsigned long *base	= (unsigned long *)calc_base(bi, 0, 0);
	unsigned long width 	= ((bi->dispDeviceRect[2] - bi->dispDeviceRect[0]) *
					(bi->dispDeviceDepth >> 3)) >> 2;
	int i,j;
	
	for (i=0; i<(bi->dispDeviceRect[3] - bi->dispDeviceRect[1]); i++)
	{
		unsigned long *ptr = base;
		for(j=width; j>0; j-=8) {
			dcbst(ptr);
			ptr += 8;
		}
		base += (bi->dispDeviceRowBytes >> 2);
	}
}

#ifndef NO_SCROLL
static BTEXT void
scrollscreen(void)
{
	unsigned long offset		= reloc_offset();
	boot_infos_t* bi		= PTRRELOC(RELOC(disp_bi));
	unsigned long *src		= (unsigned long *)calc_base(bi,0,16);
	unsigned long *dst		= (unsigned long *)calc_base(bi,0,0);
	unsigned long width		= ((bi->dispDeviceRect[2] - bi->dispDeviceRect[0]) *
						(bi->dispDeviceDepth >> 3)) >> 2;
	int i,j;
	
#ifdef CONFIG_ADB_PMU
	pmu_suspend();	/* PMU will not shut us down ! */
#endif
	for (i=0; i<(bi->dispDeviceRect[3] - bi->dispDeviceRect[1] - 16); i++)
	{
		unsigned long *src_ptr = src;
		unsigned long *dst_ptr = dst;
		for(j=width; j; --j)
			*(dst_ptr++) = *(src_ptr++);
		src += (bi->dispDeviceRowBytes >> 2);
		dst += (bi->dispDeviceRowBytes >> 2);
	}
	for (i=0; i<16; i++)
	{
		unsigned long *dst_ptr = dst;
		for(j=width; j; --j)
			*(dst_ptr++) = 0;
		dst += (bi->dispDeviceRowBytes >> 2);
	}
#ifdef CONFIG_ADB_PMU
	pmu_resume();	/* PMU will not shut us down ! */
#endif
}
#endif /* ndef NO_SCROLL */

void BTEXT btext_drawchar(char c)
{
	unsigned long offset = reloc_offset();
	int cline = 0, x;

	if (!RELOC(boot_text_mapped))
		return;

	switch (c) {
	case '\b':
		if (RELOC(g_loc_X) > 0)
			--RELOC(g_loc_X);
		break;
	case '\t':
		RELOC(g_loc_X) = (RELOC(g_loc_X) & -8) + 8;
		break;
	case '\r':
		RELOC(g_loc_X) = 0;
		break;
	case '\n':
		RELOC(g_loc_X) = 0;
		RELOC(g_loc_Y)++;
		cline = 1;
		break;
	default:
		draw_byte(c, RELOC(g_loc_X)++, RELOC(g_loc_Y));
	}
	if (RELOC(g_loc_X) >= RELOC(g_max_loc_X)) {
		RELOC(g_loc_X) = 0;
		RELOC(g_loc_Y)++;
		cline = 1;
	}
#ifndef NO_SCROLL
	while (RELOC(g_loc_Y) >= RELOC(g_max_loc_Y)) {
		scrollscreen();
		RELOC(g_loc_Y)--;
	}
#else
	/* wrap around from bottom to top of screen so we don't
	   waste time scrolling each line.  -- paulus. */
	if (RELOC(g_loc_Y) >= RELOC(g_max_loc_Y))
		RELOC(g_loc_Y) = 0;
	if (cline) {
		for (x = 0; x < RELOC(g_max_loc_X); ++x)
			draw_byte(' ', x, RELOC(g_loc_Y));
	}
#endif
}

void BTEXT
btext_drawstring(const char *c)
{
	unsigned long offset	= reloc_offset();

	if (!RELOC(boot_text_mapped))
		return;
	while (*c)
		btext_drawchar(*c++);
}

void BTEXT
btext_drawhex(unsigned long v)
{
	static char hex_table[] = "0123456789abcdef";
	unsigned long offset	= reloc_offset();
	
	if (!RELOC(boot_text_mapped))
		return;
	btext_drawchar(RELOC(hex_table)[(v >> 28) & 0x0000000FUL]);
	btext_drawchar(RELOC(hex_table)[(v >> 24) & 0x0000000FUL]);
	btext_drawchar(RELOC(hex_table)[(v >> 20) & 0x0000000FUL]);
	btext_drawchar(RELOC(hex_table)[(v >> 16) & 0x0000000FUL]);
	btext_drawchar(RELOC(hex_table)[(v >> 12) & 0x0000000FUL]);
	btext_drawchar(RELOC(hex_table)[(v >>  8) & 0x0000000FUL]);
	btext_drawchar(RELOC(hex_table)[(v >>  4) & 0x0000000FUL]);
	btext_drawchar(RELOC(hex_table)[(v >>  0) & 0x0000000FUL]);
	btext_drawchar(' ');
}

static void BTEXT
draw_byte(unsigned char c, long locX, long locY)
{
	unsigned long offset	= reloc_offset();
	boot_infos_t* bi	= PTRRELOC(RELOC(disp_bi));
	unsigned char *base	= calc_base(bi, locX << 3, locY << 4);
	unsigned char *font	= &RELOC(vga_font)[((unsigned long)c) * 16];
	int rb			= bi->dispDeviceRowBytes;
	
	switch(bi->dispDeviceDepth) {
	case 24:
	case 32:
		draw_byte_32(font, (unsigned long *)base, rb);
		break;
	case 15:
	case 16:
		draw_byte_16(font, (unsigned long *)base, rb);
		break;
	case 8:
		draw_byte_8(font, (unsigned long *)base, rb);
		break;
	}
}

static unsigned long expand_bits_8[16] BTDATA = {
	0x00000000,
	0x000000ff,
	0x0000ff00,
	0x0000ffff,
	0x00ff0000,
	0x00ff00ff,
	0x00ffff00,
	0x00ffffff,
	0xff000000,
	0xff0000ff,
	0xff00ff00,
	0xff00ffff,
	0xffff0000,
	0xffff00ff,
	0xffffff00,
	0xffffffff
};

static unsigned long expand_bits_16[4] BTDATA = {
	0x00000000,
	0x0000ffff,
	0xffff0000,
	0xffffffff
};


static void BTEXT
draw_byte_32(unsigned char *font, unsigned long *base, int rb)
{
	int l, bits;	
	int fg = 0xFFFFFFFFUL;
	int bg = 0x00000000UL;
	
	for (l = 0; l < 16; ++l)
	{
		bits = *font++;
		base[0] = (-(bits >> 7) & fg) ^ bg;
		base[1] = (-((bits >> 6) & 1) & fg) ^ bg;
		base[2] = (-((bits >> 5) & 1) & fg) ^ bg;
		base[3] = (-((bits >> 4) & 1) & fg) ^ bg;
		base[4] = (-((bits >> 3) & 1) & fg) ^ bg;
		base[5] = (-((bits >> 2) & 1) & fg) ^ bg;
		base[6] = (-((bits >> 1) & 1) & fg) ^ bg;
		base[7] = (-(bits & 1) & fg) ^ bg;
		base = (unsigned long *) ((char *)base + rb);
	}
}

static void BTEXT
draw_byte_16(unsigned char *font, unsigned long *base, int rb)
{
	int l, bits;	
	int fg = 0xFFFFFFFFUL;
	int bg = 0x00000000UL;
	unsigned long offset = reloc_offset();
	unsigned long *eb = RELOC(expand_bits_16);

	for (l = 0; l < 16; ++l)
	{
		bits = *font++;
		base[0] = (eb[bits >> 6] & fg) ^ bg;
		base[1] = (eb[(bits >> 4) & 3] & fg) ^ bg;
		base[2] = (eb[(bits >> 2) & 3] & fg) ^ bg;
		base[3] = (eb[bits & 3] & fg) ^ bg;
		base = (unsigned long *) ((char *)base + rb);
	}
}

static void BTEXT
draw_byte_8(unsigned char *font, unsigned long *base, int rb)
{
	int l, bits;	
	int fg = 0x0F0F0F0FUL;
	int bg = 0x00000000UL;
	unsigned long offset = reloc_offset();
	unsigned long *eb = RELOC(expand_bits_8);

	for (l = 0; l < 16; ++l)
	{
		bits = *font++;
		base[0] = (eb[bits >> 4] & fg) ^ bg;
		base[1] = (eb[bits & 0xf] & fg) ^ bg;
		base = (unsigned long *) ((char *)base + rb);
	}
}

static unsigned char vga_font[cmapsz] BTDATA = {
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x7e, 0x81, 0xa5, 0x81, 0x81, 0xbd, 
0x99, 0x81, 0x81, 0x7e, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x7e, 0xff, 
0xdb, 0xff, 0xff, 0xc3, 0xe7, 0xff, 0xff, 0x7e, 0x00, 0x00, 0x00, 0x00, 
0x00, 0x00, 0x00, 0x00, 0x6c, 0xfe, 0xfe, 0xfe, 0xfe, 0x7c, 0x38, 0x10, 
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x10, 0x38, 0x7c, 0xfe, 
0x7c, 0x38, 0x10, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x18, 
0x3c, 0x3c, 0xe7, 0xe7, 0xe7, 0x18, 0x18, 0x3c, 0x00, 0x00, 0x00, 0x00, 
0x00, 0x00, 0x00, 0x18, 0x3c, 0x7e, 0xff, 0xff, 0x7e, 0x18, 0x18, 0x3c, 
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x18, 0x3c, 
0x3c, 0x18, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xff, 0xff, 0xff, 0xff, 
0xff, 0xff, 0xe7, 0xc3, 0xc3, 0xe7, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 
0x00, 0x00, 0x00, 0x00, 0x00, 0x3c, 0x66, 0x42, 0x42, 0x66, 0x3c, 0x00, 
0x00, 0x00, 0x00, 0x00, 0xff, 0xff, 0xff, 0xff, 0xff, 0xc3, 0x99, 0xbd, 
0xbd, 0x99, 0xc3, 0xff, 0xff, 0xff, 0xff, 0xff, 0x00, 0x00, 0x1e, 0x0e, 
0x1a, 0x32, 0x78, 0xcc, 0xcc, 0xcc, 0xcc, 0x78, 0x00, 0x00, 0x00, 0x00, 
0x00, 0x00, 0x3c, 0x66, 0x66, 0x66, 0x66, 0x3c, 0x18, 0x7e, 0x18, 0x18, 
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x3f, 0x33, 0x3f, 0x30, 0x30, 0x30, 
0x30, 0x70, 0xf0, 0xe0, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x7f, 0x63, 
0x7f, 0x63, 0x63, 0x63, 0x63, 0x67, 0xe7, 0xe6, 0xc0, 0x00, 0x00, 0x00, 
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0x18, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x0f, 0x0c, 0x0c, 
0x0c, 0x0c, 0x0c, 0xec, 0x6c, 0x6c, 0x3c, 0x1c, 0x00, 0x00, 0x00, 0x00, 
0x00, 0xd8, 0x6c, 0x6c, 0x6c, 0x6c, 0x6c, 0x00, 0x00, 0x00, 0x00, 0x00, 
0x00, 0x00, 0x00, 0x00, 0x00, 0x70, 0xd8, 0x30, 0x60, 0xc8, 0xf8, 0x00, 
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 
0x7c, 0x7c, 0x7c, 0x7c, 0x7c, 0x7c, 0x7c, 0x00, 0x00, 0x00, 0x00, 0x00, 
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 
0x00, 0x00, 0x00, 0x00, 
};
/*
 * BK Id: %F% %I% %G% %U% %#%
 */
/*
 * Smp support for CHRP machines.
 *
 * Written by Cort Dougan (cort@cs.nmt.edu) borrowing a great
 * deal of code from the sparc and intel versions.
 *
 * Copyright (C) 1999 Cort Dougan <cort@cs.nmt.edu>
 *
 */

#include <linux/config.h>
#include <linux/kernel.h>
#include <linux/sched.h>
#include <linux/smp.h>
#include <linux/smp_lock.h>
#include <linux/interrupt.h>
#include <linux/kernel_stat.h>
#include <linux/delay.h>
#define __KERNEL_SYSCALLS__
#include <linux/unistd.h>
#include <linux/init.h>
#include <linux/spinlock.h>

#include <asm/ptrace.h>
#include <asm/atomic.h>
#include <asm/irq.h>
#include <asm/page.h>
#include <asm/pgtable.h>
#include <asm/hardirq.h>
#include <asm/softirq.h>
#include <asm/sections.h>
#include <asm/io.h>
#include <asm/prom.h>
#include <asm/smp.h>
#include <asm/residual.h>
#include <asm/time.h>

#include "open_pic.h"

extern unsigned long smp_chrp_cpu_nr;

static int __init
smp_chrp_probe(void)
{
	if (smp_chrp_cpu_nr > 1)
		openpic_request_IPIs();

	return smp_chrp_cpu_nr;
}

static void __init
smp_chrp_kick_cpu(int nr)
{
	*(unsigned long *)KERNELBASE = nr;
	asm volatile("dcbf 0,%0"::"r"(KERNELBASE):"memory");
}

static void __init
smp_chrp_setup_cpu(int cpu_nr)
{
	static atomic_t ready = ATOMIC_INIT(1);
	static volatile int frozen = 0;

	if (cpu_nr == 0) {
		/* wait for all the others */
		while (atomic_read(&ready) < smp_num_cpus)
			barrier();
		atomic_set(&ready, 1);
		/* freeze the timebase */
		call_rtas("freeze-time-base", 0, 1, NULL);
		mb();
		frozen = 1;
		/* XXX assumes this is not a 601 */
		set_tb(0, 0);
		last_jiffy_stamp(0) = 0;
		while (atomic_read(&ready) < smp_num_cpus)
			barrier();
		/* thaw the timebase again */
		call_rtas("thaw-time-base", 0, 1, NULL);
		mb();
		frozen = 0;
		smp_tb_synchronized = 1;
	} else {
		atomic_inc(&ready);
		while (!frozen)
			barrier();
		set_tb(0, 0);
		last_jiffy_stamp(0) = 0;
		mb();
		atomic_inc(&ready);
		while (frozen)
			barrier();
	}

	if (OpenPIC_Addr)
		do_openpic_setup_cpu();
}

#ifdef CONFIG_POWER4
static void __chrp
smp_xics_message_pass(int target, int msg, unsigned long data, int wait)
{
	/* for now, only do reschedule messages
	   since we only have one IPI */
	if (msg != PPC_MSG_RESCHEDULE)
		return;
	for (i = 0; i < smp_num_cpus; ++i) {
		if (target == MSG_ALL || target == i
		    || (target == MSG_ALL_BUT_SELF
			&& i != smp_processor_id()))
			xics_cause_IPI(i);
	}
}

static int __chrp
smp_xics_probe(void)
{
	return smp_chrp_cpu_nr;
}

static void __chrp
smp_xics_setup_cpu(int cpu_nr)
{
	if (cpu_nr > 0)
		xics_setup_cpu();
}
#endif /* CONFIG_POWER4 */

/* CHRP with openpic */
struct smp_ops_t chrp_smp_ops __chrpdata = {
	smp_openpic_message_pass,
	smp_chrp_probe,
	smp_chrp_kick_cpu,
	smp_chrp_setup_cpu,
};

#ifdef CONFIG_POWER4
/* CHRP with new XICS interrupt controller */
struct smp_ops_t xics_smp_ops __chrpdata = {
	smp_xics_message_pass,
	smp_xics_probe,
	smp_chrp_kick_cpu,
	smp_xics_setup_cpu,
};
#endif /* CONFIG_POWER4 */
/*
 * BK Id: %F% %I% %G% %U% %#%
 */
/*
 *  arch/ppc/kernel/cputable.c
 *
 *  Copyright (C) 2001 Ben. Herrenschmidt (benh@kernel.crashing.org)
 *
 *  This program is free software; you can redistribute it and/or
 *  modify it under the terms of the GNU General Public License
 *  as published by the Free Software Foundation; either version
 *  2 of the License, or (at your option) any later version.
 */

#include <linux/config.h>
#include <linux/string.h>
#include <linux/sched.h>
#include <linux/threads.h>
#include <linux/init.h>
#include <asm/cputable.h>

struct cpu_spec* cur_cpu_spec[NR_CPUS];

extern void __setup_cpu_601(int cpu_nr);
extern void __setup_cpu_603(int cpu_nr);
extern void __setup_cpu_604(int cpu_nr);
extern void __setup_cpu_750(int cpu_nr);
extern void __setup_cpu_7400(int cpu_nr);
extern void __setup_cpu_7410(int cpu_nr);
extern void __setup_cpu_7450(int cpu_nr);
extern void __setup_cpu_power3(int cpu_nr);
extern void __setup_cpu_power4(int cpu_nr);
extern void __setup_cpu_8xx(int cpu_nr);
extern void __setup_cpu_generic(int cpu_nr);

#define CLASSIC_PPC (!defined(CONFIG_8xx) && 	 \
		     !defined(CONFIG_4xx) && !defined(CONFIG_POWER3) &&  \
		     !defined(CONFIG_POWER4) && !defined(CONFIG_PPC_ISERIES))

/* This table only contains "desktop" CPUs, it need to be filled with embedded
 * ones as well...
 */
#define COMMON_PPC	(PPC_FEATURE_32 | PPC_FEATURE_HAS_FPU | \
			 PPC_FEATURE_HAS_MMU)

/* We only set the altivec features if the kernel was compiled with altivec
 * support
 */
#ifdef CONFIG_ALTIVEC
#define CPU_FTR_ALTIVEC_COMP	CPU_FTR_ALTIVEC
#else
#define CPU_FTR_ALTIVEC_COMP	0
#endif

struct cpu_spec	cpu_specs[] = {
#if CLASSIC_PPC
    { 	/* 601 */
	0xffff0000, 0x00010000, "601",
	CPU_FTR_601 | CPU_FTR_HPTE_TABLE,
	COMMON_PPC | PPC_FEATURE_601_INSTR | PPC_FEATURE_UNIFIED_CACHE,
	32, 32,
	__setup_cpu_601
    },
    {	/* 603 */
    	0xffff0000, 0x00030000, "603",
    	CPU_FTR_SPLIT_ID_CACHE | CPU_FTR_CAN_DOZE | CPU_FTR_USE_TB,
	COMMON_PPC,
    	32, 32,
	__setup_cpu_603
    },
    {	/* 603e */
    	0xffff0000, 0x00060000, "603e",
    	CPU_FTR_SPLIT_ID_CACHE | CPU_FTR_CAN_DOZE | CPU_FTR_USE_TB,
	COMMON_PPC,
	32, 32,
	__setup_cpu_603
    },
    {	/* 603ev */
    	0xffff0000, 0x00070000, "603ev",
    	CPU_FTR_SPLIT_ID_CACHE | CPU_FTR_CAN_DOZE | CPU_FTR_USE_TB,
	COMMON_PPC,
	32, 32,
	__setup_cpu_603
    },
    {	/* 604 */
    	0xffff0000, 0x00040000, "604",
    	CPU_FTR_SPLIT_ID_CACHE | CPU_FTR_USE_TB | CPU_FTR_604_PERF_MON |
	CPU_FTR_HPTE_TABLE,
	COMMON_PPC,
	32, 32,
	__setup_cpu_604
    },
    {	/* 604e */
    	0xfffff000, 0x00090000, "604e",
    	CPU_FTR_SPLIT_ID_CACHE | CPU_FTR_USE_TB | CPU_FTR_604_PERF_MON |
	CPU_FTR_HPTE_TABLE,
	COMMON_PPC,
	32, 32,
	__setup_cpu_604
    },
    {	/* 604r */
    	0xffff0000, 0x00090000, "604r",
    	CPU_FTR_SPLIT_ID_CACHE | CPU_FTR_USE_TB | CPU_FTR_604_PERF_MON |
	CPU_FTR_HPTE_TABLE,
	COMMON_PPC,
	32, 32,
	__setup_cpu_604
    },
    {	/* 604ev */
    	0xffff0000, 0x000a0000, "604ev",
    	CPU_FTR_SPLIT_ID_CACHE | CPU_FTR_USE_TB | CPU_FTR_604_PERF_MON |
	CPU_FTR_HPTE_TABLE,
	COMMON_PPC,
	32, 32,
	__setup_cpu_604
    },
    {	/* 740/750 (0x4202, don't support TAU ?) */
    	0xffffffff, 0x00084202, "740/750",
    	CPU_FTR_SPLIT_ID_CACHE | CPU_FTR_CAN_DOZE | CPU_FTR_USE_TB |
	CPU_FTR_L2CR | CPU_FTR_HPTE_TABLE,
	COMMON_PPC,
	32, 32,
	__setup_cpu_750
    },
    {	/* 745/755 */
    	0xfffff000, 0x00083000, "745/755",
    	CPU_FTR_SPLIT_ID_CACHE | CPU_FTR_CAN_DOZE | CPU_FTR_USE_TB |
	CPU_FTR_L2CR | CPU_FTR_TAU | CPU_FTR_HPTE_TABLE,
	COMMON_PPC,
	32, 32,
	__setup_cpu_750
    },
    {	/* 750CX */
    	0xffffff00, 0x00082200, "750CX",
    	CPU_FTR_SPLIT_ID_CACHE | CPU_FTR_CAN_DOZE | CPU_FTR_USE_TB |
	CPU_FTR_L2CR | CPU_FTR_TAU | CPU_FTR_HPTE_TABLE,
	COMMON_PPC,
	32, 32,
	__setup_cpu_750
    },
    {	/* 740/750 (L2CR bit need fixup for 740) */
    	0xffff0000, 0x00080000, "740/750",
    	CPU_FTR_SPLIT_ID_CACHE | CPU_FTR_CAN_DOZE | CPU_FTR_USE_TB |
	CPU_FTR_L2CR | CPU_FTR_TAU | CPU_FTR_HPTE_TABLE,
	COMMON_PPC,
	32, 32,
	__setup_cpu_750
    },
    {	/* 7400 rev 1.1 ? (no TAU) */
    	0xffffffff, 0x000c1101, "7400 (1.1)",
    	CPU_FTR_SPLIT_ID_CACHE | CPU_FTR_CAN_DOZE | CPU_FTR_USE_TB |
	CPU_FTR_L2CR | CPU_FTR_ALTIVEC_COMP | CPU_FTR_HPTE_TABLE,
	COMMON_PPC | PPC_FEATURE_HAS_ALTIVEC,
	32, 32,
	__setup_cpu_7400
    },
    {	/* 7400 */
    	0xffff0000, 0x000c0000, "7400",
    	CPU_FTR_SPLIT_ID_CACHE | CPU_FTR_CAN_DOZE | CPU_FTR_USE_TB |
	CPU_FTR_L2CR | CPU_FTR_TAU | CPU_FTR_ALTIVEC_COMP | CPU_FTR_HPTE_TABLE,
	COMMON_PPC | PPC_FEATURE_HAS_ALTIVEC,
	32, 32,
	__setup_cpu_7400
    },
    {	/* 7410 */
    	0xffff0000, 0x800c0000, "7410",
    	CPU_FTR_SPLIT_ID_CACHE | CPU_FTR_CAN_DOZE | CPU_FTR_USE_TB |
	CPU_FTR_L2CR | CPU_FTR_TAU | CPU_FTR_ALTIVEC_COMP | CPU_FTR_HPTE_TABLE,
	COMMON_PPC | PPC_FEATURE_HAS_ALTIVEC,
	32, 32,
	__setup_cpu_7410
    },
    {	/* 7450 2.0 - no doze/nap */
    	0xffffffff, 0x80000200, "7450",
    	CPU_FTR_SPLIT_ID_CACHE | CPU_FTR_USE_TB |
	CPU_FTR_L2CR | CPU_FTR_TAU | CPU_FTR_ALTIVEC_COMP |
	CPU_FTR_HPTE_TABLE | CPU_FTR_SPEC7450,
	COMMON_PPC | PPC_FEATURE_HAS_ALTIVEC,
	32, 32,
	__setup_cpu_7450
    },
    {	/* 7450 others */
    	0xffff0000, 0x80000000, "7450",
    	CPU_FTR_SPLIT_ID_CACHE | CPU_FTR_CAN_DOZE | CPU_FTR_USE_TB |
	CPU_FTR_L2CR | CPU_FTR_TAU | CPU_FTR_ALTIVEC_COMP |
	CPU_FTR_HPTE_TABLE | CPU_FTR_SPEC7450,
	COMMON_PPC | PPC_FEATURE_HAS_ALTIVEC,
	32, 32,
	__setup_cpu_7450
    },
    {	/* 82xx (8240, 8245, 8260 are all 603e cores) */
	0x7fff0000, 0x00810000, "82xx",
	CPU_FTR_SPLIT_ID_CACHE | CPU_FTR_CAN_DOZE | CPU_FTR_USE_TB,
	COMMON_PPC,
	32, 32,
	__setup_cpu_603
    },
    {	/* default match, we assume split I/D cache & TB (non-601)... */
    	0x00000000, 0x00000000, "(generic PPC)",
    	CPU_FTR_SPLIT_ID_CACHE | CPU_FTR_USE_TB | CPU_FTR_HPTE_TABLE,
	COMMON_PPC,
	32, 32,
	__setup_cpu_generic
    },
#endif /* CLASSIC_PPC */    
#ifdef CONFIG_PPC64BRIDGE
    {	/* Power3 */
    	0xffff0000, 0x00400000, "Power3 (630)",
    	CPU_FTR_SPLIT_ID_CACHE | CPU_FTR_USE_TB | CPU_FTR_HPTE_TABLE,
    	COMMON_PPC | PPC_FEATURE_64,
	128, 128,
	__setup_cpu_power3
    },
    {	/* Power3+ */
    	0xffff0000, 0x00410000, "Power3 (630+)",
    	CPU_FTR_SPLIT_ID_CACHE | CPU_FTR_USE_TB | CPU_FTR_HPTE_TABLE,
    	COMMON_PPC | PPC_FEATURE_64,
	128, 128,
	__setup_cpu_power3
    },
	{	/* I-star */
		0xffff0000, 0x00360000, "I-star",
		CPU_FTR_SPLIT_ID_CACHE | CPU_FTR_USE_TB | CPU_FTR_HPTE_TABLE,
		COMMON_PPC | PPC_FEATURE_64,
		128, 128,
		__setup_cpu_power3
	},
	{	/* S-star */
		0xffff0000, 0x00370000, "S-star",
		CPU_FTR_SPLIT_ID_CACHE | CPU_FTR_USE_TB | CPU_FTR_HPTE_TABLE,
		COMMON_PPC | PPC_FEATURE_64,
		128, 128,
		__setup_cpu_power3
	},
#endif /* CONFIG_PPC64BRIDGE */    
#ifdef CONFIG_POWER4
    {	/* Power4 */
    	0xffff0000, 0x00350000, "Power4",
    	CPU_FTR_SPLIT_ID_CACHE | CPU_FTR_USE_TB | CPU_FTR_HPTE_TABLE,
    	COMMON_PPC | PPC_FEATURE_64,
	128, 128,
	__setup_cpu_power4
    },
#endif /* CONFIG_POWER4 */    
#ifdef CONFIG_8xx
    {	/* 8xx */
    	0xffff0000, 0x00500000, "8xx",
		/* CPU_FTR_CAN_DOZE is possible, if the 8xx code is there.... */
    	CPU_FTR_SPLIT_ID_CACHE | CPU_FTR_USE_TB,
    	PPC_FEATURE_32 | PPC_FEATURE_HAS_MMU,
 	16, 16,
	__setup_cpu_8xx	/* Empty */
    },
#endif /* CONFIG_8xx */
#ifdef CONFIG_4xx
    {	/* 403GC */
    	0xffffff00, 0x00200200, "403GC",
    	CPU_FTR_SPLIT_ID_CACHE | CPU_FTR_USE_TB,
    	PPC_FEATURE_32 | PPC_FEATURE_HAS_MMU,
	16, 16,
	0, /*__setup_cpu_403 */
    },
    {	/* 403GCX */
    	0xffffff00, 0x00201400, "403GCX",
    	CPU_FTR_SPLIT_ID_CACHE | CPU_FTR_USE_TB,
    	PPC_FEATURE_32 | PPC_FEATURE_HAS_MMU,
	16, 16,
	0, /*__setup_cpu_403 */
    },
    {	/* 403G ?? */
    	0xffff0000, 0x00200000, "403G ??",
    	CPU_FTR_SPLIT_ID_CACHE | CPU_FTR_USE_TB,
    	PPC_FEATURE_32 | PPC_FEATURE_HAS_MMU,
	16, 16,
	0, /*__setup_cpu_403 */
    },
    {	/* 405GP */
    	0xffff0000, 0x40110000, "405GP",
    	CPU_FTR_SPLIT_ID_CACHE | CPU_FTR_USE_TB,
    	PPC_FEATURE_32 | PPC_FEATURE_HAS_MMU | PPC_FEATURE_HAS_4xxMAC,
	32, 32,
	0, /*__setup_cpu_405 */
    },
    {	/* STB 03xxx */
    	0xffff0000, 0x40130000, "STB03xxx",
    	CPU_FTR_SPLIT_ID_CACHE | CPU_FTR_USE_TB,
    	PPC_FEATURE_32 | PPC_FEATURE_HAS_MMU | PPC_FEATURE_HAS_4xxMAC,
	32, 32,
	0, /*__setup_cpu_405 */
    },
#endif /* CONFIG_4xx */
#if !CLASSIC_PPC
    {	/* default match */
    	0x00000000, 0x00000000, "(generic PPC)",
    	0,
    	PPC_FEATURE_32,
	32, 32,
	0,
    }
#endif /* !CLASSIC_PPC */
};
/*
 * BK Id: %F% %I% %G% %U% %#%
 */
/*
 * SMP support for power macintosh.
 *
 * We support both the old "powersurge" SMP architecture
 * and the current Core99 (G4 PowerMac) machines.
 *
 * Support Macintosh G4 SMP by Troy Benjegerdes (hozer@drgw.net)
 * and Ben Herrenschmidt <benh@kernel.crashing.org>.
 *
 * Support for DayStar quad CPU cards
 * Copyright (C) XLR8, Inc. 1994-2000
 *
 *  This program is free software; you can redistribute it and/or
 *  modify it under the terms of the GNU General Public License
 *  as published by the Free Software Foundation; either version
 *  2 of the License, or (at your option) any later version.
 */
#include <linux/config.h>
#include <linux/kernel.h>
#include <linux/sched.h>
#include <linux/smp.h>
#include <linux/smp_lock.h>
#include <linux/interrupt.h>
#include <linux/kernel_stat.h>
#include <linux/delay.h>
#define __KERNEL_SYSCALLS__
#include <linux/unistd.h>
#include <linux/init.h>
#include <linux/spinlock.h>

#include <asm/ptrace.h>
#include <asm/atomic.h>
#include <asm/irq.h>
#include <asm/page.h>
#include <asm/pgtable.h>
#include <asm/hardirq.h>
#include <asm/softirq.h>
#include <asm/sections.h>
#include <asm/io.h>
#include <asm/prom.h>
#include <asm/smp.h>
#include <asm/residual.h>
#include <asm/machdep.h>
#include <asm/pmac_feature.h>
#include <asm/time.h>
#include <asm/gemini.h>

#include "open_pic.h"

/*
 * Powersurge (old powermac SMP) support.
 */

extern void __secondary_start_psurge(void);
extern void __secondary_start_psurge2(void);	/* Temporary horrible hack */
extern void __secondary_start_psurge3(void);	/* Temporary horrible hack */

/* Addresses for powersurge registers */
#define HAMMERHEAD_BASE		0xf8000000
#define HHEAD_CONFIG		0x90
#define HHEAD_SEC_INTR		0xc0

/* register for interrupting the primary processor on the powersurge */
/* N.B. this is actually the ethernet ROM! */
#define PSURGE_PRI_INTR		0xf3019000

/* register for storing the start address for the secondary processor */
/* N.B. this is the PCI config space address register for the 1st bridge */
#define PSURGE_START		0xf2800000

/* Daystar/XLR8 4-CPU card */
#define PSURGE_QUAD_REG_ADDR	0xf8800000

#define PSURGE_QUAD_IRQ_SET	0
#define PSURGE_QUAD_IRQ_CLR	1
#define PSURGE_QUAD_IRQ_PRIMARY	2
#define PSURGE_QUAD_CKSTOP_CTL	3
#define PSURGE_QUAD_PRIMARY_ARB	4
#define PSURGE_QUAD_BOARD_ID	6
#define PSURGE_QUAD_WHICH_CPU	7
#define PSURGE_QUAD_CKSTOP_RDBK	8
#define PSURGE_QUAD_RESET_CTL	11

#define PSURGE_QUAD_OUT(r, v)	(out_8(quad_base + ((r) << 4) + 4, (v)))
#define PSURGE_QUAD_IN(r)	(in_8(quad_base + ((r) << 4) + 4) & 0x0f)
#define PSURGE_QUAD_BIS(r, v)	(PSURGE_QUAD_OUT((r), PSURGE_QUAD_IN(r) | (v)))
#define PSURGE_QUAD_BIC(r, v)	(PSURGE_QUAD_OUT((r), PSURGE_QUAD_IN(r) & ~(v)))

/* virtual addresses for the above */
static volatile u8 *hhead_base;
static volatile u8 *quad_base;
static volatile u32 *psurge_pri_intr;
static volatile u8 *psurge_sec_intr;
static volatile u32 *psurge_start;

/* what sort of powersurge board we have */
static int psurge_type;

/* values for psurge_type */
#define PSURGE_DUAL		0
#define PSURGE_QUAD_OKEE	1
#define PSURGE_QUAD_COTTON	2
#define PSURGE_QUAD_ICEGRASS	3

/* l2 cache stuff for dual G4 macs */
extern void core99_init_l2(void);

/*
 * Set and clear IPIs for powersurge.
 */
static inline void psurge_set_ipi(int cpu)
{
	if (cpu == 0)
		in_be32(psurge_pri_intr);
	else if (psurge_type == PSURGE_DUAL)
		out_8(psurge_sec_intr, 0);
	else
		PSURGE_QUAD_OUT(PSURGE_QUAD_IRQ_SET, 1 << cpu);
}

static inline void psurge_clr_ipi(int cpu)
{
	if (cpu > 0) {
		if (psurge_type == PSURGE_DUAL)
			out_8(psurge_sec_intr, ~0);
		else
			PSURGE_QUAD_OUT(PSURGE_QUAD_IRQ_CLR, 1 << cpu);
	}
}

/*
 * On powersurge (old SMP powermac architecture) we don't have
 * separate IPIs for separate messages like openpic does.  Instead
 * we have a bitmap for each processor, where a 1 bit means that
 * the corresponding message is pending for that processor.
 * Ideally each cpu's entry would be in a different cache line.
 *  -- paulus.
 */
static unsigned long psurge_smp_message[NR_CPUS];

void __pmac
psurge_smp_message_recv(struct pt_regs *regs)
{
	int cpu = smp_processor_id();
	int msg;

	/* clear interrupt */
	psurge_clr_ipi(cpu);

	if (smp_num_cpus < 2)
		return;

	/* make sure there is a message there */
	for (msg = 0; msg < 4; msg++)
		if (test_and_clear_bit(msg, &psurge_smp_message[cpu]))
			smp_message_recv(msg, regs);
}

void __pmac
psurge_primary_intr(int irq, void *d, struct pt_regs *regs)
{
	psurge_smp_message_recv(regs);
}

static void __pmac
smp_psurge_message_pass(int target, int msg, unsigned long data, int wait)
{
	int i;

	if (smp_num_cpus < 2)
		return;

	for (i = 0; i < smp_num_cpus; i++) {
		if (target == MSG_ALL
		    || (target == MSG_ALL_BUT_SELF && i != smp_processor_id())
		    || target == i) {
			set_bit(msg, &psurge_smp_message[i]);
			psurge_set_ipi(i);
		}
	}
}

/*
 * Determine a quad card presence. We read the board ID register, we
 * force the data bus to change to something else, and we read it again.
 * It it's stable, then the register probably exist (ugh !)
 */
static int __init psurge_quad_probe(void)
{
	int type;
	unsigned int i;

	type = PSURGE_QUAD_IN(PSURGE_QUAD_BOARD_ID);
	if (type < PSURGE_QUAD_OKEE || type > PSURGE_QUAD_ICEGRASS
	    || type != PSURGE_QUAD_IN(PSURGE_QUAD_BOARD_ID))
		return PSURGE_DUAL;

	/* looks OK, try a slightly more rigorous test */
	/* bogus is not necessarily cacheline-aligned,
	   though I don't suppose that really matters.  -- paulus */
	for (i = 0; i < 100; i++) {
		volatile u32 bogus[8];
		bogus[(0+i)%8] = 0x00000000;
		bogus[(1+i)%8] = 0x55555555;
		bogus[(2+i)%8] = 0xFFFFFFFF;
		bogus[(3+i)%8] = 0xAAAAAAAA;
		bogus[(4+i)%8] = 0x33333333;
		bogus[(5+i)%8] = 0xCCCCCCCC;
		bogus[(6+i)%8] = 0xCCCCCCCC;
		bogus[(7+i)%8] = 0x33333333;
		wmb();
		asm volatile("dcbf 0,%0" : : "r" (bogus) : "memory");
		mb();
		if (type != PSURGE_QUAD_IN(PSURGE_QUAD_BOARD_ID))
			return PSURGE_DUAL;
	}
	return type;
}

static void __init psurge_quad_init(void)
{
	int procbits;

	if (ppc_md.progress) ppc_md.progress("psurge_quad_init", 0x351);
	procbits = ~PSURGE_QUAD_IN(PSURGE_QUAD_WHICH_CPU);
	if (psurge_type == PSURGE_QUAD_ICEGRASS)
		PSURGE_QUAD_BIS(PSURGE_QUAD_RESET_CTL, procbits);
	else
		PSURGE_QUAD_BIC(PSURGE_QUAD_CKSTOP_CTL, procbits);
	mdelay(33);
	out_8(psurge_sec_intr, ~0);
	PSURGE_QUAD_OUT(PSURGE_QUAD_IRQ_CLR, procbits);
	PSURGE_QUAD_BIS(PSURGE_QUAD_RESET_CTL, procbits);
	if (psurge_type != PSURGE_QUAD_ICEGRASS)
		PSURGE_QUAD_BIS(PSURGE_QUAD_CKSTOP_CTL, procbits);
	PSURGE_QUAD_BIC(PSURGE_QUAD_PRIMARY_ARB, procbits);
	mdelay(33);
	PSURGE_QUAD_BIC(PSURGE_QUAD_RESET_CTL, procbits);
	mdelay(33);
	PSURGE_QUAD_BIS(PSURGE_QUAD_PRIMARY_ARB, procbits);
	mdelay(33);
}

static int __init smp_psurge_probe(void)
{
	int i, ncpus;

	/* We don't do SMP on the PPC601 -- paulus */
	if (PVR_VER(mfspr(PVR)) == 1)
		return 1;

	/*
	 * The powersurge cpu board can be used in the generation
	 * of powermacs that have a socket for an upgradeable cpu card,
	 * including the 7500, 8500, 9500, 9600.
	 * The device tree doesn't tell you if you have 2 cpus because
	 * OF doesn't know anything about the 2nd processor.
	 * Instead we look for magic bits in magic registers,
	 * in the hammerhead memory controller in the case of the
	 * dual-cpu powersurge board.  -- paulus.
	 */
	if (find_devices("hammerhead") == NULL)
		return 1;

	hhead_base = ioremap(HAMMERHEAD_BASE, 0x800);
	quad_base = ioremap(PSURGE_QUAD_REG_ADDR, 1024);
	psurge_sec_intr = hhead_base + HHEAD_SEC_INTR;

	psurge_type = psurge_quad_probe();
	if (psurge_type != PSURGE_DUAL) {
		psurge_quad_init();
		/* All released cards using this HW design have 4 CPUs */
		ncpus = 4;
	} else {
		iounmap((void *) quad_base);
		if ((in_8(hhead_base + HHEAD_CONFIG) & 0x02) == 0) {
			/* not a dual-cpu card */
			iounmap((void *) hhead_base);
			return 1;
		}
		ncpus = 2;
	}

	psurge_start = ioremap(PSURGE_START, 4);
	psurge_pri_intr = ioremap(PSURGE_PRI_INTR, 4);

	/* this is not actually strictly necessary -- paulus. */
	for (i = 1; i < ncpus; ++i)
		smp_hw_index[i] = i;

	if (ppc_md.progress) ppc_md.progress("smp_psurge_probe - done", 0x352);

	return ncpus;
}

static void __init smp_psurge_kick_cpu(int nr)
{
	void (*start)(void) = __secondary_start_psurge;
	unsigned long a;

	/* may need to flush here if secondary bats aren't setup */
	for (a = KERNELBASE; a < KERNELBASE + 0x800000; a += 32)
		asm volatile("dcbf 0,%0" : : "r" (a) : "memory");
	asm volatile("sync");

	if (ppc_md.progress) ppc_md.progress("smp_psurge_kick_cpu", 0x353);

	/* setup entry point of secondary processor */
	switch (nr) {
	case 2:
		start = __secondary_start_psurge2;
		break;
	case 3:
		start = __secondary_start_psurge3;
		break;
	}

	out_be32(psurge_start, __pa(start));
	mb();

	psurge_set_ipi(nr);
	udelay(10);
	psurge_clr_ipi(nr);

	if (ppc_md.progress) ppc_md.progress("smp_psurge_kick_cpu - done", 0x354);
}

/*
 * With the dual-cpu powersurge board, the decrementers and timebases
 * of both cpus are frozen after the secondary cpu is started up,
 * until we give the secondary cpu another interrupt.  This routine
 * uses this to get the timebases synchronized.
 *  -- paulus.
 */
static void __init psurge_dual_sync_tb(int cpu_nr)
{
	static volatile int sec_tb_reset = 0;
	int t;

	set_dec(tb_ticks_per_jiffy);
	set_tb(0, 0);
	last_jiffy_stamp(cpu_nr) = 0;

	if (cpu_nr > 0) {
		mb();
		sec_tb_reset = 1;
		return;
	}

	/* wait for the secondary to have reset its TB before proceeding */
	for (t = 10000000; t > 0 && !sec_tb_reset; --t)
		;

	/* now interrupt the secondary, starting both TBs */
	psurge_set_ipi(1);

	smp_tb_synchronized = 1;
}

static void __init
smp_psurge_setup_cpu(int cpu_nr)
{

	if (cpu_nr == 0) {
		if (smp_num_cpus < 2)
			return;
		/* reset the entry point so if we get another intr we won't
		 * try to startup again */
		out_be32(psurge_start, 0x100);
		if (request_irq(30, psurge_primary_intr, 0, "primary IPI", 0))
			printk(KERN_ERR "Couldn't get primary IPI interrupt");
	}

	if (psurge_type == PSURGE_DUAL)
		psurge_dual_sync_tb(cpu_nr);
}

static int __init
smp_core99_probe(void)
{
	struct device_node *cpus;
	int i, ncpus = 1;

	if (ppc_md.progress) ppc_md.progress("smp_core99_probe", 0x345);
	cpus = find_type_devices("cpu");
	if (cpus)
		while ((cpus = cpus->next) != NULL)
			++ncpus;
	printk("smp_core99_probe: found %d cpus\n", ncpus);
	if (ncpus > 1) {
		openpic_request_IPIs();
		for (i = 1; i < ncpus; ++i)
			smp_hw_index[i] = i;
	}

	return ncpus;
}

static void __init
smp_core99_kick_cpu(int nr)
{
	unsigned long save_vector, new_vector;
	unsigned long flags;
#if 1 /* New way... */
	volatile unsigned long *vector
		 = ((volatile unsigned long *)(KERNELBASE+0x100));
	if (nr < 1 || nr > 3)
		return;
#else
	volatile unsigned long *vector
		 = ((volatile unsigned long *)(KERNELBASE+0x500));
	if (nr != 1)
		return;
#endif
	if (ppc_md.progress) ppc_md.progress("smp_core99_kick_cpu", 0x346);

	local_irq_save(flags);
	local_irq_disable();
	
	/* Save reset vector */
	save_vector = *vector;
	
	/* Setup fake reset vector that does	  
	 *   b __secondary_start_psurge - KERNELBASE
	 */  
	switch(nr) {
		case 1:
			new_vector = (unsigned long)__secondary_start_psurge;
			break;
		case 2:
			new_vector = (unsigned long)__secondary_start_psurge2;
			break;
		case 3:
			new_vector = (unsigned long)__secondary_start_psurge3;
			break;
	}
	*vector = 0x48000002 + new_vector - KERNELBASE;
	
	/* flush data cache and inval instruction cache */
	flush_icache_range((unsigned long) vector, (unsigned long) vector + 4);
	
	/* Put some life in our friend */
	pmac_call_feature(PMAC_FTR_RESET_CPU, NULL, nr, 0);
	
	/* FIXME: We wait a bit for the CPU to take the exception, I should
	 * instead wait for the entry code to set something for me. Well,
	 * ideally, all that crap will be done in prom.c and the CPU left
	 * in a RAM-based wait loop like CHRP.
	 */
	mdelay(1);
	
	/* Restore our exception vector */
	*vector = save_vector;
	flush_icache_range((unsigned long) vector, (unsigned long) vector + 4);
	
	local_irq_restore(flags);
	if (ppc_md.progress) ppc_md.progress("smp_core99_kick_cpu done", 0x347);
}

static void __init
smp_core99_setup_cpu(int cpu_nr)
{
	/* Setup openpic */
	do_openpic_setup_cpu();

	/* Setup L2 */
	if (cpu_nr != 0)
		core99_init_l2();
	else
		if (ppc_md.progress) ppc_md.progress("core99_setup_cpu 0 done", 0x349);
}

/* PowerSurge-style Macs */
struct smp_ops_t psurge_smp_ops __pmacdata = {
	smp_psurge_message_pass,
	smp_psurge_probe,
	smp_psurge_kick_cpu,
	smp_psurge_setup_cpu,
};

/* Core99 Macs (dual G4s) */
struct smp_ops_t core99_smp_ops __pmacdata = {
	smp_openpic_message_pass,
	smp_core99_probe,
	smp_core99_kick_cpu,
	smp_core99_setup_cpu,
};
/*
 * temp.c	Thermal management for cpu's with Thermal Assist Units
 *
 * Written by Troy Benjegerdes <hozer@drgw.net>
 *
 * TODO:
 * dynamic power management to limit peak CPU temp (using ICTC)
 * calibration???
 * 
 * Silly, crazy ideas: use cpu load (from scheduler) and ICTC to extend battery
 * life in portables, and add a 'performance/watt' metric somewhere in /proc
 */

#include <linux/config.h>
#include <linux/errno.h>
#include <linux/sched.h>
#include <linux/kernel.h>
#include <linux/param.h>
#include <linux/string.h>
#include <linux/mm.h>
#include <linux/interrupt.h>
#include <linux/init.h>

#include <asm/segment.h>
#include <asm/io.h>
#include <asm/processor.h>
#include <asm/nvram.h>
#include <asm/cache.h>
#include <asm/8xx_immap.h>
#include <asm/machdep.h>

static struct tau_temp
{
	int interrupts;
	unsigned char low;
	unsigned char high;
	unsigned char grew;
} tau[NR_CPUS];

struct timer_list tau_timer;

#undef DEBUG

/* TODO: put these in a /proc interface, with some sanity checks, and maybe
 * dynamic adjustment to minimize # of interrupts */
/* configurable values for step size and how much to expand the window when
 * we get an interrupt. These are based on the limit that was out of range */
#define step_size		2	/* step size when temp goes out of range */
#define window_expand		1	/* expand the window by this much */
/* configurable values for shrinking the window */
#define shrink_timer	2*HZ	/* period between shrinking the window */
#define min_window	2	/* minimum window size, degrees C */

void set_thresholds(unsigned long cpu)
{
#ifdef CONFIG_TAU_INT
	/*
	 * setup THRM1,
	 * threshold, valid bit, enable interrupts, interrupt when below threshold
	 */
	mtspr(SPRN_THRM1, THRM1_THRES(tau[cpu].low) | THRM1_V | THRM1_TIE | THRM1_TID);

	/* setup THRM2,
	 * threshold, valid bit, enable interrupts, interrupt when above threshhold
	 */
	mtspr (SPRN_THRM2, THRM1_THRES(tau[cpu].high) | THRM1_V | THRM1_TIE);
#else
	/* same thing but don't enable interrupts */
	mtspr(SPRN_THRM1, THRM1_THRES(tau[cpu].low) | THRM1_V | THRM1_TID);
	mtspr(SPRN_THRM2, THRM1_THRES(tau[cpu].high) | THRM1_V);
#endif
}

void TAUupdate(int cpu)
{
	unsigned thrm;

#ifdef DEBUG
	printk("TAUupdate ");
#endif

	/* if both thresholds are crossed, the step_sizes cancel out
	 * and the window winds up getting expanded twice. */
	if((thrm = mfspr(SPRN_THRM1)) & THRM1_TIV){ /* is valid? */
		if(thrm & THRM1_TIN){ /* crossed low threshold */
			if (tau[cpu].low >= step_size){
				tau[cpu].low -= step_size;
				tau[cpu].high -= (step_size - window_expand);
			}
			tau[cpu].grew = 1;
#ifdef DEBUG
			printk("low threshold crossed ");
#endif
		}
	}
	if((thrm = mfspr(SPRN_THRM2)) & THRM1_TIV){ /* is valid? */
		if(thrm & THRM1_TIN){ /* crossed high threshold */
			if (tau[cpu].high <= 127-step_size){
				tau[cpu].low += (step_size - window_expand);
				tau[cpu].high += step_size;
			}
			tau[cpu].grew = 1;
#ifdef DEBUG
			printk("high threshold crossed ");
#endif
		}
	}

#ifdef DEBUG
	printk("grew = %d\n", tau[cpu].grew);
#endif

#ifndef CONFIG_TAU_INT /* tau_timeout will do this if not using interrupts */
	set_thresholds(cpu);	
#endif

}

#ifdef CONFIG_TAU_INT
/*
 * TAU interrupts - called when we have a thermal assist unit interrupt
 * with interrupts disabled
 */

void TAUException(struct pt_regs * regs)
{
	unsigned long cpu = smp_processor_id();

	hardirq_enter(cpu);
	tau[cpu].interrupts++;
	
	TAUupdate(cpu);

	hardirq_exit(cpu);
	return;
}
#endif /* CONFIG_TAU_INT */

static void tau_timeout(void * info)
{
	unsigned long cpu = smp_processor_id();
	unsigned long flags;
	int size;
	int shrink;
 
	/* disabling interrupts *should* be okay */
	save_flags(flags); cli();

#ifndef CONFIG_TAU_INT
	TAUupdate(cpu);
#endif
	
	size = tau[cpu].high - tau[cpu].low;
	if (size > min_window && ! tau[cpu].grew) {
		/* do an exponential shrink of half the amount currently over size */
		shrink = (2 + size - min_window) / 4;
		if (shrink) {
			tau[cpu].low += shrink;
			tau[cpu].high -= shrink;
		} else { /* size must have been min_window + 1 */
			tau[cpu].low += 1;
#if 1 /* debug */
			if ((tau[cpu].high - tau[cpu].low) != min_window){
				printk(KERN_ERR "temp.c: line %d, logic error\n", __LINE__);
			}
#endif
		}
	}

	tau[cpu].grew = 0;
	
	set_thresholds(cpu);

	/*
	 * Do the enable every time, since otherwise a bunch of (relatively)
	 * complex sleep code needs to be added. One mtspr every time
	 * tau_timeout is called is probably not a big deal.
	 * 
	 * Enable thermal sensor and set up sample interval timer
	 * need 20 us to do the compare.. until a nice 'cpu_speed' function
	 * call is implemented, just assume a 500 mhz clock. It doesn't really
	 * matter if we take too long for a compare since it's all interrupt 
	 * driven anyway. 
	 *
	 * use a extra long time.. (60 us @ 500 mhz)
	 */
	mtspr(SPRN_THRM3, THRM3_SITV(500*60) | THRM3_E);

	restore_flags(flags);
}

static void tau_timeout_smp(unsigned long unused)
{

	/* schedule ourselves to be run again */
	mod_timer(&tau_timer, jiffies + shrink_timer) ;
#ifdef CONFIG_SMP
	smp_call_function(tau_timeout, NULL, 1, 0);
#endif
	tau_timeout(NULL);
}

/*
 * setup the TAU
 * 
 * Set things up to use THRM1 as a temperature lower bound, and THRM2 as an upper bound.
 * Start off at zero
 */

int tau_initialized = 0;

void __init TAU_init_smp(void * info)
{
	unsigned long cpu = smp_processor_id();
	
	/* set these to a reasonable value and let the timer shrink the
	 * window */
	tau[cpu].low = 5;
	tau[cpu].high = 120;

	set_thresholds(cpu);
}

int __init TAU_init(void)
{
	/* We assume in SMP that if one CPU has TAU support, they
	 * all have it --BenH
	 */
	if (!(cur_cpu_spec[0]->cpu_features & CPU_FTR_TAU)) {
		printk("Thermal assist unit not available\n");
		tau_initialized = 0;
		return 1;
	}


	/* first, set up the window shrinking timer */
	init_timer(&tau_timer);
	tau_timer.function = tau_timeout_smp;
	tau_timer.expires = jiffies + shrink_timer;
	add_timer(&tau_timer);
	
#ifdef CONFIG_SMP
	smp_call_function(TAU_init_smp, NULL, 1, 0);
#endif
	TAU_init_smp(NULL);
	
	printk("Thermal assist unit ");
#ifdef CONFIG_TAU_INT
	printk("using interrupts, ");
#else
	printk("using timers, ");
#endif
	printk("shrink_timer: %d jiffies\n", shrink_timer); 
	tau_initialized = 1;

	return 0;
}

__initcall(TAU_init);

/*
 * return current temp
 */

u32 cpu_temp_both(unsigned long cpu)
{
	return ((tau[cpu].high << 16) | tau[cpu].low);
}

int cpu_temp(unsigned long cpu)
{
	return ((tau[cpu].high + tau[cpu].low) / 2);
}

int tau_interrupts(unsigned long cpu)
{
	return (tau[cpu].interrupts);
}
/*
 * BK Id: %F% %I% %G% %U% %#%
 */
/*
 *  arch/ppc/kernel/pmac_feature.c
 *
 *  Copyright (C) 1996-2001 Paul Mackerras (paulus@cs.anu.edu.au)
 *                          Ben. Herrenschmidt (benh@kernel.crashing.org)
 *
 *  This program is free software; you can redistribute it and/or
 *  modify it under the terms of the GNU General Public License
 *  as published by the Free Software Foundation; either version
 *  2 of the License, or (at your option) any later version.
 *  
 *  TODO: 
 *  
 *   - Replace mdelay with some schedule loop if possible
 *   - Shorten some obfuscated delays on some routines (like modem
 *     power)
 *
 */
#include <linux/config.h>
#include <linux/types.h>
#include <linux/init.h>
#include <linux/delay.h>
#include <linux/kernel.h>
#include <linux/sched.h>
#include <linux/spinlock.h>
#include <linux/adb.h>
#include <linux/pmu.h>
#include <asm/sections.h>
#include <asm/errno.h>
#include <asm/ohare.h>
#include <asm/heathrow.h>
#include <asm/keylargo.h>
#include <asm/uninorth.h>
#include <asm/io.h>
#include <asm/prom.h>
#include <asm/machdep.h>
#include <asm/pmac_feature.h>
#include <asm/dbdma.h>

#undef DEBUG_FEATURE

#ifdef DEBUG_FEATURE
#define DBG(fmt,...) printk(KERN_DEBUG fmt)
#else
#define DBG(fmt,...)
#endif

/* Exported from arch/ppc/kernel/idle.c */
extern unsigned long powersave_nap;

/*
 * We use a single global lock to protect accesses. Each driver has
 * to take care of it's own locking
 */
static spinlock_t feature_lock  __pmacdata = SPIN_LOCK_UNLOCKED;

#define LOCK(flags)	spin_lock_irqsave(&feature_lock, flags);
#define UNLOCK(flags)	spin_unlock_irqrestore(&feature_lock, flags);

/*
 * Helper functions regarding the various flavors of mac-io
 */
 
#define MAX_MACIO_CHIPS		2

enum {
	macio_unknown = 0,
	macio_grand_central,
	macio_ohare,
	macio_ohareII,
	macio_heathrow,
	macio_gatwick,
	macio_paddington,
	macio_keylargo,
	macio_pangea
};

static const char* macio_names[] __pmacdata = 
{
	"Unknown",
	"Grand Central",
	"OHare",
	"OHareII",
	"Heathrow",
	"Gatwick",
	"Paddington",
	"Keylargo",
	"Pangea"
};

static struct macio_chip
{
	struct device_node*	of_node;
	int			type;
	int			rev;
	volatile u32*		base;
	unsigned long		flags;
} macio_chips[MAX_MACIO_CHIPS]  __pmacdata;

#define MACIO_FLAG_SCCA_ON	0x00000001
#define MACIO_FLAG_SCCB_ON	0x00000002
#define MACIO_FLAG_SCC_LOCKED	0x00000004
#define MACIO_FLAG_AIRPORT_ON	0x00000010
#define MACIO_FLAG_FW_SUPPORTED	0x00000020

static struct macio_chip* __pmac
macio_find(struct device_node* child, int type)
{
	while(child) {
		int	i;
	
		for (i=0; i < MAX_MACIO_CHIPS && macio_chips[i].of_node; i++)
			if (child == macio_chips[i].of_node &&
			    (!type || macio_chips[i].type == type))
				return &macio_chips[i];
		child = child->parent;
	}
	return NULL;
}

#define MACIO_FCR32(macio, r)	((macio)->base + ((r) >> 2))
#define MACIO_FCR8(macio, r)	(((volatile u8*)((macio)->base)) + (r))

#define MACIO_IN32(r)		(in_le32(MACIO_FCR32(macio,r)))
#define MACIO_OUT32(r,v)	(out_le32(MACIO_FCR32(macio,r), (v)))
#define MACIO_BIS(r,v)		(MACIO_OUT32((r), MACIO_IN32(r) | (v)))
#define MACIO_BIC(r,v)		(MACIO_OUT32((r), MACIO_IN32(r) & ~(v)))
#define MACIO_IN8(r)		(in_8(MACIO_FCR8(macio,r)))
#define MACIO_OUT8(r,v)		(out_8(MACIO_FCR8(macio,r), (v)))

/*
 * Uninorth reg. access. Note that Uni-N regs are big endian
 */
 
#define UN_REG(r)	(uninorth_base + ((r) >> 2))
#define UN_IN(r)	(in_be32(UN_REG(r)))
#define UN_OUT(r,v)	(out_be32(UN_REG(r), (v)))
#define UN_BIS(r,v)	(UN_OUT((r), UN_IN(r) | (v)))
#define UN_BIC(r,v)	(UN_OUT((r), UN_IN(r) & ~(v)))

static struct device_node* uninorth_node __pmacdata;
static u32* uninorth_base __pmacdata;
static u32 uninorth_rev __pmacdata;


/*
 * For each motherboard family, we have a table of functions pointers
 * that handle the various features.
 */

typedef int (*feature_call)(struct device_node* node, int param, int value);

struct feature_table_entry {
	unsigned int	selector;	
	feature_call	function;
};

struct pmac_mb_def
{
	const char*			model_string;
	const char*			model_name;
	int				model_id;
	struct feature_table_entry* 	features;
	unsigned long			board_flags;
};
static struct pmac_mb_def pmac_mb __pmacdata;

/*
 * Here are the chip specific feature functions
 */

static inline int __pmac
simple_feature_tweak(struct device_node* node, int type, int reg, u32 mask, int value)
{
	struct macio_chip*	macio;
	unsigned long		flags;
	
	macio = macio_find(node, type);
	if (!macio)
		return -ENODEV;
	LOCK(flags);
	if (value)
		MACIO_BIS(reg, mask);
	else
		MACIO_BIC(reg, mask);
	(void)MACIO_IN32(reg);
	UNLOCK(flags);

	return 0;
}

static int __pmac
generic_scc_enable(struct device_node* node, u32 enable_mask, u32 reset_mask,
	int param, int value)
{
	struct macio_chip*	macio;
	unsigned long		chan_mask;
	unsigned long		fcr;
	unsigned long		flags;
	
	macio = macio_find(node, 0);
	if (!macio)
		return -ENODEV;
	if (!strcmp(node->name, "ch-a"))
		chan_mask = MACIO_FLAG_SCCA_ON;
	else if (!strcmp(node->name, "ch-b"))
		chan_mask = MACIO_FLAG_SCCB_ON;
	else
		return -ENODEV;

	if (value) {
		LOCK(flags);
		fcr = MACIO_IN32(OHARE_FCR);
		/* Check if scc cell need enabling */
		if (!(fcr & OH_SCC_ENABLE)) {
			fcr |= enable_mask;
			MACIO_OUT32(OHARE_FCR, fcr);
			fcr |= reset_mask;
			MACIO_OUT32(OHARE_FCR, fcr);
			UNLOCK(flags);
			(void)MACIO_IN32(OHARE_FCR);
			mdelay(15);
			LOCK(flags);
			fcr &= ~reset_mask;
			MACIO_OUT32(OHARE_FCR, fcr);
		}
		if (chan_mask & MACIO_FLAG_SCCA_ON)
			fcr |= OH_SCCA_IO;
		if (chan_mask & MACIO_FLAG_SCCB_ON)
			fcr |= OH_SCCB_IO;
		MACIO_OUT32(OHARE_FCR, fcr);
		macio->flags |= chan_mask;
		UNLOCK(flags);
		if (param & PMAC_SCC_FLAG_XMON)
			macio->flags |= MACIO_FLAG_SCC_LOCKED;
	} else {
		if (macio->flags & MACIO_FLAG_SCC_LOCKED)
			return -EPERM;
		LOCK(flags);
		fcr = MACIO_IN32(OHARE_FCR);
		if (chan_mask & MACIO_FLAG_SCCA_ON)
			fcr &= ~OH_SCCA_IO;
		if (chan_mask & MACIO_FLAG_SCCB_ON)
			fcr &= ~OH_SCCB_IO;
		MACIO_OUT32(OHARE_FCR, fcr);
		if ((fcr & (OH_SCCA_IO | OH_SCCB_IO)) == 0) {
			fcr &= ~enable_mask;
			MACIO_OUT32(OHARE_FCR, fcr);
		}
		macio->flags &= ~(chan_mask);
		UNLOCK(flags);
		mdelay(10);
	}
	return 0;
}

static int __pmac
ohare_scc_enable(struct device_node* node, int param, int value)
{
	int rc;

#ifdef CONFIG_ADB_PMU
	if (value && (param & 0xfff) == PMAC_SCC_IRDA)
		pmu_enable_irled(1);
#endif /* CONFIG_ADB_PMU */		
	rc = generic_scc_enable(node, OH_SCC_ENABLE, OH_SCC_RESET, param, value);
#ifdef CONFIG_ADB_PMU
	if ((param & 0xfff) == PMAC_SCC_IRDA && (rc || !value))
		pmu_enable_irled(0);
#endif /* CONFIG_ADB_PMU */		
	return rc;
}

static int __pmac
ohare_floppy_enable(struct device_node* node, int param, int value)
{
	return simple_feature_tweak(node, macio_ohare,
		OHARE_FCR, OH_FLOPPY_ENABLE, value);
}

static int __pmac
ohare_mesh_enable(struct device_node* node, int param, int value)
{
	return simple_feature_tweak(node, macio_ohare,
		OHARE_FCR, OH_MESH_ENABLE, value);
}

static int __pmac
ohare_ide_enable(struct device_node* node, int param, int value)
{
	switch(param) {
	    case 0:
	    	/* For some reason, setting the bit in set_initial_features()
	    	 * doesn't stick. I'm still investigating... --BenH.
	    	 */
	    	if (value)
	    		simple_feature_tweak(node, macio_ohare,
				OHARE_FCR, OH_IOBUS_ENABLE, 1);
		return simple_feature_tweak(node, macio_ohare,
			OHARE_FCR, OH_IDE0_ENABLE, value);
	    case 1:
		return simple_feature_tweak(node, macio_ohare,
			OHARE_FCR, OH_BAY_IDE_ENABLE, value);
	    default:
	    	return -ENODEV;
	}
}

static int __pmac
ohare_ide_reset(struct device_node* node, int param, int value)
{
	switch(param) {
	    case 0:
		return simple_feature_tweak(node, macio_ohare,
			OHARE_FCR, OH_IDE0_RESET_N, !value);
	    case 1:
		return simple_feature_tweak(node, macio_ohare,
			OHARE_FCR, OH_IDE1_RESET_N, !value);
	    default:
	    	return -ENODEV;
	}
}

static int __pmac
ohare_sleep_state(struct device_node* node, int param, int value)
{
	struct macio_chip*	macio = &macio_chips[0];

	if ((pmac_mb.board_flags & PMAC_MB_CAN_SLEEP) == 0)
		return -EPERM;
	if (value) {
		MACIO_BIC(OHARE_FCR, OH_IOBUS_ENABLE);
	} else {
		MACIO_BIS(OHARE_FCR, OH_IOBUS_ENABLE);
	}
	
	return 0;
}

static int __pmac
heathrow_scc_enable(struct device_node* node, int param, int value)
{
	int rc;
	
#ifdef CONFIG_ADB_PMU
	if (value && param == PMAC_SCC_IRDA)
		pmu_enable_irled(1);
#endif /* CONFIG_ADB_PMU */		
	/* Fixme: It's possible that wallstreet (heathrow) is different
	 * than other paddington machines. I still have to figure that
	 * out exactly, for now, the paddington values are used
	 */
	rc = generic_scc_enable(node, HRW_SCC_ENABLE, PADD_RESET_SCC, param, value);
#ifdef CONFIG_ADB_PMU
	if (param == PMAC_SCC_IRDA && (rc || !value))
		pmu_enable_irled(0);
#endif /* CONFIG_ADB_PMU */		
	return rc;
}

static int __pmac
heathrow_modem_enable(struct device_node* node, int param, int value)
{
	struct macio_chip*	macio;
	u8			gpio;
	unsigned long		flags;
	
	macio = macio_find(node, macio_unknown);
	if (!macio)
		return -ENODEV;
	gpio = MACIO_IN8(HRW_GPIO_MODEM_RESET) & ~1;
	if (!value) {
		LOCK(flags);
		MACIO_OUT8(HRW_GPIO_MODEM_RESET, gpio);
		UNLOCK(flags);
		(void)MACIO_IN8(HRW_GPIO_MODEM_RESET);
		mdelay(250);
	}
	if (pmac_mb.model_id != PMAC_TYPE_YOSEMITE &&
	    pmac_mb.model_id != PMAC_TYPE_YIKES) {
	    	LOCK(flags);
	    	/* We use the paddington values as they seem to work properly
	    	 * on the wallstreet (heathrow) as well. I can't tell why we
	    	 * had to flip them on older feature.c, the fact is that new
	    	 * code uses the paddington values which are also the ones used
	    	 * in Darwin, and that works on wallstreet !
	    	 */
	    	if (value)
	    		MACIO_BIC(HEATHROW_FCR, PADD_MODEM_POWER_N);
	    	else
	    		MACIO_BIS(HEATHROW_FCR, PADD_MODEM_POWER_N);
	    	UNLOCK(flags);
	    	(void)MACIO_IN32(HEATHROW_FCR);
		mdelay(250);
	}
	if (value) {
		LOCK(flags);
		MACIO_OUT8(HRW_GPIO_MODEM_RESET, gpio | 1);
		(void)MACIO_IN8(HRW_GPIO_MODEM_RESET);
	    	UNLOCK(flags); mdelay(250); LOCK(flags);
		MACIO_OUT8(HRW_GPIO_MODEM_RESET, gpio);
		(void)MACIO_IN8(HRW_GPIO_MODEM_RESET);
	    	UNLOCK(flags); mdelay(250); LOCK(flags);
		MACIO_OUT8(HRW_GPIO_MODEM_RESET, gpio | 1);
		(void)MACIO_IN8(HRW_GPIO_MODEM_RESET);
	    	UNLOCK(flags); mdelay(250); LOCK(flags);
	}
	return 0;
}

static int __pmac
heathrow_floppy_enable(struct device_node* node, int param, int value)
{
	return simple_feature_tweak(node, macio_unknown,
		HEATHROW_FCR,
		HRW_SWIM_ENABLE|HRW_BAY_FLOPPY_ENABLE,
		value);
}

static int __pmac
heathrow_mesh_enable(struct device_node* node, int param, int value)
{
	struct macio_chip*	macio;
	unsigned long		flags;
	
	macio = macio_find(node, macio_unknown);
	if (!macio)
		return -ENODEV;
	LOCK(flags);
	/* Set clear mesh cell enable */
	if (value)
		MACIO_BIS(HEATHROW_FCR, HRW_MESH_ENABLE);
	else
		MACIO_BIC(HEATHROW_FCR, HRW_MESH_ENABLE);
	(void)MACIO_IN32(HEATHROW_FCR);
	udelay(10);
	/* Set/Clear termination power (todo: test ! the bit value
	 * used by Darwin doesn't seem to match what we used so
	 * far. If you experience problems, turn #if 1 into #if 0
	 * and tell me about it --BenH.
	 */
#if 1
	if (value)
		MACIO_BIC(HEATHROW_MBCR, 0x00000004);
	else
		MACIO_BIS(HEATHROW_MBCR, 0x00000004);
#else
	if (value)
		MACIO_BIC(HEATHROW_MBCR, 0x00040000);
	else
		MACIO_BIS(HEATHROW_MBCR, 0x00040000);
#endif		
	(void)MACIO_IN32(HEATHROW_MBCR);
	udelay(10);
	UNLOCK(flags);

	return 0;
}

static int __pmac
heathrow_ide_enable(struct device_node* node, int param, int value)
{
	switch(param) {
	    case 0:
		return simple_feature_tweak(node, macio_unknown,
			HEATHROW_FCR, HRW_IDE0_ENABLE, value);
	    case 1:
		return simple_feature_tweak(node, macio_unknown,
			HEATHROW_FCR, HRW_BAY_IDE_ENABLE, value);
	    default:
	    	return -ENODEV;
	}
}

static int __pmac
heathrow_ide_reset(struct device_node* node, int param, int value)
{
	switch(param) {
	    case 0:
		return simple_feature_tweak(node, macio_unknown,
			HEATHROW_FCR, HRW_IDE0_RESET_N, !value);
	    case 1:
		return simple_feature_tweak(node, macio_unknown,
			HEATHROW_FCR, HRW_IDE1_RESET_N, !value);
	    default:
	    	return -ENODEV;
	}
}

static int __pmac
heathrow_bmac_enable(struct device_node* node, int param, int value)
{
	struct macio_chip*	macio;
	unsigned long		flags;
	
	macio = macio_find(node, 0);
	if (!macio)
		return -ENODEV;
	if (value) {
		LOCK(flags);
		MACIO_BIS(HEATHROW_FCR, HRW_BMAC_IO_ENABLE);
		MACIO_BIS(HEATHROW_FCR, HRW_BMAC_RESET);
		UNLOCK(flags);
		(void)MACIO_IN32(HEATHROW_FCR);
		mdelay(10);
		LOCK(flags);
		MACIO_BIC(HEATHROW_FCR, HRW_BMAC_RESET);
		UNLOCK(flags);
		(void)MACIO_IN32(HEATHROW_FCR);
		mdelay(10);
	} else {
		LOCK(flags);
		MACIO_BIC(HEATHROW_FCR, HRW_BMAC_IO_ENABLE);
		UNLOCK(flags);
	}
	return 0;
}

static int __pmac
heathrow_sound_enable(struct device_node* node, int param, int value)
{
	struct macio_chip*	macio;
	unsigned long		flags;

	/* B&W G3 and Yikes don't support that properly (the
	 * sound appear to never come back after beeing shut down).
	 */
	if (pmac_mb.model_id == PMAC_TYPE_YOSEMITE ||
	    pmac_mb.model_id == PMAC_TYPE_YIKES)
		return 0;
	
	macio = macio_find(node, 0);
	if (!macio)
		return -ENODEV;
	if (value) {
		LOCK(flags);
		MACIO_BIS(HEATHROW_FCR, HRW_SOUND_CLK_ENABLE);
		MACIO_BIC(HEATHROW_FCR, HRW_SOUND_POWER_N);
		UNLOCK(flags);
		(void)MACIO_IN32(HEATHROW_FCR);
	} else {
		LOCK(flags);
		MACIO_BIS(HEATHROW_FCR, HRW_SOUND_POWER_N);
		MACIO_BIC(HEATHROW_FCR, HRW_SOUND_CLK_ENABLE);
		UNLOCK(flags);
	}
	return 0;
}

static u32 save_fcr[5] __pmacdata;
static u32 save_mbcr __pmacdata;
static u32 save_gpio_levels[2] __pmacdata;
static u8 save_gpio_extint[KEYLARGO_GPIO_EXTINT_CNT] __pmacdata;
static u8 save_gpio_normal[KEYLARGO_GPIO_CNT] __pmacdata;
static u32 save_unin_clock_ctl __pmacdata;
static struct dbdma_regs save_dbdma[13] __pmacdata;
static struct dbdma_regs save_alt_dbdma[13] __pmacdata;

static void __pmac
dbdma_save(struct macio_chip* macio, struct dbdma_regs* save)
{
	int i;
	
	/* Save state & config of DBDMA channels */
	for (i=0; i<13; i++) {
		volatile struct dbdma_regs* chan = (volatile struct dbdma_regs*)
			(macio->base + ((0x8000+i*0x100)>>2));
		save[i].cmdptr_hi = in_le32(&chan->cmdptr_hi);
		save[i].cmdptr = in_le32(&chan->cmdptr);
		save[i].intr_sel = in_le32(&chan->intr_sel);
		save[i].br_sel = in_le32(&chan->br_sel);
		save[i].wait_sel = in_le32(&chan->wait_sel);
	}
}

static void __pmac
dbdma_restore(struct macio_chip* macio, struct dbdma_regs* save)
{
	int i;
	
	/* Save state & config of DBDMA channels */
	for (i=0; i<13; i++) {
		volatile struct dbdma_regs* chan = (volatile struct dbdma_regs*)
			(macio->base + ((0x8000+i*0x100)>>2));
		out_le32(&chan->control, (ACTIVE|DEAD|WAKE|FLUSH|PAUSE|RUN)<<16);
		while (in_le32(&chan->status) & ACTIVE)
			mb();
		out_le32(&chan->cmdptr_hi, save[i].cmdptr_hi);
		out_le32(&chan->cmdptr, save[i].cmdptr);
		out_le32(&chan->intr_sel, save[i].intr_sel);
		out_le32(&chan->br_sel, save[i].br_sel);
		out_le32(&chan->wait_sel, save[i].wait_sel);
	}
}

static void __pmac
heathrow_sleep(struct macio_chip* macio, int secondary)
{
	if (secondary) {
		dbdma_save(macio, save_alt_dbdma);
		save_fcr[2] = MACIO_IN32(0x38);
		save_fcr[3] = MACIO_IN32(0x3c);
	} else {
		dbdma_save(macio, save_dbdma);
		save_fcr[0] = MACIO_IN32(0x38);
		save_fcr[1] = MACIO_IN32(0x3c);
		save_mbcr = MACIO_IN32(0x34);
		/* Make sure sound is shut down */
		MACIO_BIS(HEATHROW_FCR, HRW_SOUND_POWER_N);
		MACIO_BIC(HEATHROW_FCR, HRW_SOUND_CLK_ENABLE);
		/* This seems to be necessary as well or the fan
		 * keeps coming up and battery drains fast */
		MACIO_BIC(HEATHROW_FCR, HRW_IOBUS_ENABLE);
	}
	/* Make sure modem is shut down */
	MACIO_OUT8(HRW_GPIO_MODEM_RESET,
		MACIO_IN8(HRW_GPIO_MODEM_RESET) & ~1);
	MACIO_BIS(HEATHROW_FCR, PADD_MODEM_POWER_N);
	MACIO_BIC(HEATHROW_FCR, OH_SCCA_IO|OH_SCCB_IO|HRW_SCC_ENABLE);

	/* Let things settle */
	(void)MACIO_IN32(HEATHROW_FCR);
	mdelay(1);
}

static void __pmac
heathrow_wakeup(struct macio_chip* macio, int secondary)
{
	if (secondary) {
		MACIO_OUT32(0x38, save_fcr[2]);
		(void)MACIO_IN32(0x38);
		mdelay(1);
		MACIO_OUT32(0x3c, save_fcr[3]);
		(void)MACIO_IN32(0x38);
		mdelay(10);
		dbdma_restore(macio, save_alt_dbdma);
	} else {
		MACIO_OUT32(0x38, save_fcr[0] | HRW_IOBUS_ENABLE);
		(void)MACIO_IN32(0x38);
		mdelay(1);
		MACIO_OUT32(0x3c, save_fcr[1]);
		(void)MACIO_IN32(0x38);
		mdelay(1);
		MACIO_OUT32(0x34, save_mbcr);
		(void)MACIO_IN32(0x38);
		mdelay(10);
		dbdma_restore(macio, save_dbdma);
	}
}

static int __pmac
heathrow_sleep_state(struct device_node* node, int param, int value)
{
	if ((pmac_mb.board_flags & PMAC_MB_CAN_SLEEP) == 0)
		return -EPERM;
	if (value == 1) {
		if (macio_chips[1].type == macio_gatwick)
			heathrow_sleep(&macio_chips[0], 1);
		heathrow_sleep(&macio_chips[0], 0);
	} else if (value == 0) {
		heathrow_wakeup(&macio_chips[0], 0);
		if (macio_chips[1].type == macio_gatwick)
			heathrow_wakeup(&macio_chips[0], 1);
	}
	return 0;
}

static int __pmac
core99_scc_enable(struct device_node* node, int param, int value)
{
	struct macio_chip*	macio;
	unsigned long		flags;
	unsigned long		chan_mask;
	u32			fcr;
	
	macio = macio_find(node, 0);
	if (!macio)
		return -ENODEV;
	if (!strcmp(node->name, "ch-a"))
		chan_mask = MACIO_FLAG_SCCA_ON;
	else if (!strcmp(node->name, "ch-b"))
		chan_mask = MACIO_FLAG_SCCB_ON;
	else
		return -ENODEV;

	if (value) {
		int need_reset_scc = 0;
		int need_reset_irda = 0;
		
		LOCK(flags);
		fcr = MACIO_IN32(KEYLARGO_FCR0);
		/* Check if scc cell need enabling */
		if (!(fcr & KL0_SCC_CELL_ENABLE)) {
			fcr |= KL0_SCC_CELL_ENABLE;
			need_reset_scc = 1;
		}
		if (chan_mask & MACIO_FLAG_SCCA_ON) {
			fcr |= KL0_SCCA_ENABLE;
			/* Don't enable line drivers for I2S modem */
			if ((param & 0xfff) == PMAC_SCC_I2S1)
				fcr &= ~KL0_SCC_A_INTF_ENABLE;
			else
				fcr |= KL0_SCC_A_INTF_ENABLE;
		}
		if (chan_mask & MACIO_FLAG_SCCB_ON) {
			fcr |= KL0_SCCB_ENABLE;
			/* Perform irda specific inits */
			if ((param & 0xfff) == PMAC_SCC_IRDA) {
				fcr &= ~KL0_SCC_B_INTF_ENABLE;
				fcr |= KL0_IRDA_ENABLE;
				fcr |= KL0_IRDA_CLK32_ENABLE | KL0_IRDA_CLK19_ENABLE;
				fcr |= KL0_IRDA_SOURCE1_SEL;
				fcr &= ~(KL0_IRDA_FAST_CONNECT|KL0_IRDA_DEFAULT1|KL0_IRDA_DEFAULT0);
				fcr &= ~(KL0_IRDA_SOURCE2_SEL|KL0_IRDA_HIGH_BAND);
				need_reset_irda = 1;
			} else
				fcr |= KL0_SCC_B_INTF_ENABLE;
		}
		MACIO_OUT32(KEYLARGO_FCR0, fcr);
		macio->flags |= chan_mask;
		if (need_reset_scc)  {
			MACIO_BIS(KEYLARGO_FCR0, KL0_SCC_RESET);
			(void)MACIO_IN32(KEYLARGO_FCR0);
			UNLOCK(flags);
			mdelay(15);
			LOCK(flags);
			MACIO_BIC(KEYLARGO_FCR0, KL0_SCC_RESET);
		}
		if (need_reset_irda)  {
			MACIO_BIS(KEYLARGO_FCR0, KL0_IRDA_RESET);
			(void)MACIO_IN32(KEYLARGO_FCR0);
			UNLOCK(flags);
			mdelay(15);
			LOCK(flags);
			MACIO_BIC(KEYLARGO_FCR0, KL0_IRDA_RESET);
		}
		UNLOCK(flags);
		if (param & PMAC_SCC_FLAG_XMON)
			macio->flags |= MACIO_FLAG_SCC_LOCKED;
	} else {
		if (macio->flags & MACIO_FLAG_SCC_LOCKED)
			return -EPERM;
		LOCK(flags);
		fcr = MACIO_IN32(KEYLARGO_FCR0);
		if (chan_mask & MACIO_FLAG_SCCA_ON)
			fcr &= ~KL0_SCCA_ENABLE;
		if (chan_mask & MACIO_FLAG_SCCB_ON) {
			fcr &= ~KL0_SCCB_ENABLE;
			/* Perform irda specific clears */
			if ((param & 0xfff) == PMAC_SCC_IRDA) {
				fcr &= ~KL0_IRDA_ENABLE;
				fcr &= ~(KL0_IRDA_CLK32_ENABLE | KL0_IRDA_CLK19_ENABLE);
				fcr &= ~(KL0_IRDA_FAST_CONNECT|KL0_IRDA_DEFAULT1|KL0_IRDA_DEFAULT0);
				fcr &= ~(KL0_IRDA_SOURCE1_SEL|KL0_IRDA_SOURCE2_SEL|KL0_IRDA_HIGH_BAND);
			}
		}
		MACIO_OUT32(KEYLARGO_FCR0, fcr);
		if ((fcr & (KL0_SCCA_ENABLE | KL0_SCCB_ENABLE)) == 0) {
			fcr &= ~KL0_SCC_CELL_ENABLE;
			MACIO_OUT32(KEYLARGO_FCR0, fcr);
		}
		macio->flags &= ~(chan_mask);
		UNLOCK(flags);
		mdelay(10);
	}
	return 0;
}

static int __pmac
core99_modem_enable(struct device_node* node, int param, int value)
{
	struct macio_chip*	macio;
	u8			gpio;
	unsigned long		flags;
	
	macio = macio_find(node, 0);
	if (!macio)
		return -ENODEV;
	gpio = MACIO_IN8(KL_GPIO_MODEM_RESET);
	gpio |= KEYLARGO_GPIO_OUTPUT_ENABLE;
	gpio &= ~KEYLARGO_GPIO_OUTOUT_DATA;
	
	if (!value) {
		LOCK(flags);
		MACIO_OUT8(KL_GPIO_MODEM_RESET, gpio);
		UNLOCK(flags);
		(void)MACIO_IN8(KL_GPIO_MODEM_RESET);
		mdelay(250);
	}
    	LOCK(flags);
    	if (value) {
    		MACIO_BIC(KEYLARGO_FCR2, KL2_ALT_DATA_OUT);
	    	UNLOCK(flags);
	    	(void)MACIO_IN32(KEYLARGO_FCR2);
		mdelay(250);
    	} else {
    		MACIO_BIS(KEYLARGO_FCR2, KL2_ALT_DATA_OUT);
	    	UNLOCK(flags);
    	}
	if (value) {
		LOCK(flags);
		MACIO_OUT8(KL_GPIO_MODEM_RESET, gpio | KEYLARGO_GPIO_OUTOUT_DATA);
		(void)MACIO_IN8(KL_GPIO_MODEM_RESET);
	    	UNLOCK(flags); mdelay(250); LOCK(flags);
		MACIO_OUT8(KL_GPIO_MODEM_RESET, gpio);
		(void)MACIO_IN8(KL_GPIO_MODEM_RESET);
	    	UNLOCK(flags); mdelay(250); LOCK(flags);
		MACIO_OUT8(KL_GPIO_MODEM_RESET, gpio | KEYLARGO_GPIO_OUTOUT_DATA);
		(void)MACIO_IN8(KL_GPIO_MODEM_RESET);
	    	UNLOCK(flags); mdelay(250); LOCK(flags);
	}
	return 0;
}

static int __pmac
core99_ide_enable(struct device_node* node, int param, int value)
{
	switch(param) {
	    case 0:
		return simple_feature_tweak(node, macio_unknown,
			KEYLARGO_FCR1, KL1_EIDE0_ENABLE, value);
	    case 1:
		return simple_feature_tweak(node, macio_unknown,
			KEYLARGO_FCR1, KL1_EIDE1_ENABLE, value);
	    case 2:
		return simple_feature_tweak(node, macio_unknown,
			KEYLARGO_FCR1, KL1_UIDE_ENABLE, value);
	    default:
	    	return -ENODEV;
	}
}

static int __pmac
core99_ide_reset(struct device_node* node, int param, int value)
{
	switch(param) {
	    case 0:
		return simple_feature_tweak(node, macio_unknown,
			KEYLARGO_FCR1, KL1_EIDE0_RESET_N, !value);
	    case 1:
		return simple_feature_tweak(node, macio_unknown,
			KEYLARGO_FCR1, KL1_EIDE1_RESET_N, !value);
	    case 2:
		return simple_feature_tweak(node, macio_unknown,
			KEYLARGO_FCR1, KL1_UIDE_RESET_N, !value);
	    default:
	    	return -ENODEV;
	}
}

static int __pmac
core99_gmac_enable(struct device_node* node, int param, int value)
{
	unsigned long flags;

	LOCK(flags);
	if (value)
		UN_BIS(UNI_N_CLOCK_CNTL, UNI_N_CLOCK_CNTL_GMAC);
	else
		UN_BIC(UNI_N_CLOCK_CNTL, UNI_N_CLOCK_CNTL_GMAC);
	(void)UN_IN(UNI_N_CLOCK_CNTL);
	UNLOCK(flags);
	udelay(20);

	return 0;
}

static int __pmac
core99_gmac_phy_reset(struct device_node* node, int param, int value)
{
	unsigned long flags;
	struct macio_chip* macio;
	
	macio = &macio_chips[0];
	if (macio->type != macio_keylargo && macio->type != macio_pangea)
		return -ENODEV;

	LOCK(flags);
	MACIO_OUT8(KL_GPIO_ETH_PHY_RESET, KEYLARGO_GPIO_OUTPUT_ENABLE);
	(void)MACIO_IN8(KL_GPIO_ETH_PHY_RESET);
	UNLOCK(flags);
	mdelay(10);
	LOCK(flags);
	MACIO_OUT8(KL_GPIO_ETH_PHY_RESET, KEYLARGO_GPIO_OUTPUT_ENABLE
		| KEYLARGO_GPIO_OUTOUT_DATA);
	UNLOCK(flags);
	mdelay(10);

	return 0;
}

static int __pmac
core99_sound_chip_enable(struct device_node* node, int param, int value)
{
	struct macio_chip*	macio;
	unsigned long		flags;
	
	macio = macio_find(node, 0);
	if (!macio)
		return -ENODEV;

	/* Do a better probe code, screamer G4 desktops &
	 * iMacs can do that too, add a recalibrate  in
	 * the driver as well
	 */
	if (pmac_mb.model_id == PMAC_TYPE_PISMO ||
	    pmac_mb.model_id == PMAC_TYPE_TITANIUM) {
		LOCK(flags);
		if (value)
	    		MACIO_OUT8(KL_GPIO_SOUND_POWER,
	    			KEYLARGO_GPIO_OUTPUT_ENABLE |
	    			KEYLARGO_GPIO_OUTOUT_DATA);
	    	else
	    		MACIO_OUT8(KL_GPIO_SOUND_POWER,
	    			KEYLARGO_GPIO_OUTPUT_ENABLE);
	    	(void)MACIO_IN8(KL_GPIO_SOUND_POWER);
	    	UNLOCK(flags);
	}
	return 0;
}

static int __pmac
core99_airport_enable(struct device_node* node, int param, int value)
{
	struct macio_chip*	macio;
	unsigned long		flags;
	int			state;
	
	macio = macio_find(node, 0);
	if (!macio)
		return -ENODEV;
	
	/* Hint: we allow passing of macio itself for the sake of the
	 * sleep code
	 */
	if (node != macio->of_node &&
	    (!node->parent || node->parent != macio->of_node))
		return -ENODEV;
	state = (macio->flags & MACIO_FLAG_AIRPORT_ON) != 0;
	if (value == state)
		return 0;
	if (value) {
		/* This code is a reproduction of OF enable-cardslot
		 * and init-wireless methods, slightly hacked until
		 * I got it working.
		 */
		LOCK(flags);
		MACIO_OUT8(KEYLARGO_GPIO_0+0xf, 5);
		(void)MACIO_IN8(KEYLARGO_GPIO_0+0xf);
		UNLOCK(flags);
		mdelay(10);
		LOCK(flags);
		MACIO_OUT8(KEYLARGO_GPIO_0+0xf, 4);
		(void)MACIO_IN8(KEYLARGO_GPIO_0+0xf);
		UNLOCK(flags);

		mdelay(10);

		LOCK(flags);
		MACIO_BIC(KEYLARGO_FCR2, KL2_CARDSEL_16);
		(void)MACIO_IN32(KEYLARGO_FCR2);
		udelay(10);
		MACIO_OUT8(KEYLARGO_GPIO_EXTINT_0+0xb, 0);
		(void)MACIO_IN8(KEYLARGO_GPIO_EXTINT_0+0xb);
		udelay(10);
		MACIO_OUT8(KEYLARGO_GPIO_EXTINT_0+0xa, 0x28);
		(void)MACIO_IN8(KEYLARGO_GPIO_EXTINT_0+0xa);
		udelay(10);
		MACIO_OUT8(KEYLARGO_GPIO_EXTINT_0+0xd, 0x28);
		(void)MACIO_IN8(KEYLARGO_GPIO_EXTINT_0+0xd);
		udelay(10);
		MACIO_OUT8(KEYLARGO_GPIO_0+0xd, 0x28);
		(void)MACIO_IN8(KEYLARGO_GPIO_0+0xd);
		udelay(10);
		MACIO_OUT8(KEYLARGO_GPIO_0+0xe, 0x28);
		(void)MACIO_IN8(KEYLARGO_GPIO_0+0xe);
		UNLOCK(flags);
		udelay(10);
		MACIO_OUT32(0x1c000, 0);
		mdelay(1);
		MACIO_OUT8(0x1a3e0, 0x41);
		(void)MACIO_IN8(0x1a3e0);
		udelay(10);
		LOCK(flags);
		MACIO_BIS(KEYLARGO_FCR2, KL2_CARDSEL_16);
		(void)MACIO_IN32(KEYLARGO_FCR2);
		UNLOCK(flags);
		mdelay(100);

		macio->flags |= MACIO_FLAG_AIRPORT_ON;
	} else {
		LOCK(flags);
		MACIO_BIC(KEYLARGO_FCR2, KL2_CARDSEL_16);
		(void)MACIO_IN32(KEYLARGO_FCR2);
		MACIO_OUT8(KL_GPIO_AIRPORT_0, 0);
		MACIO_OUT8(KL_GPIO_AIRPORT_1, 0);
		MACIO_OUT8(KL_GPIO_AIRPORT_2, 0);
		MACIO_OUT8(KL_GPIO_AIRPORT_3, 0);
		MACIO_OUT8(KL_GPIO_AIRPORT_4, 0);
		(void)MACIO_IN8(KL_GPIO_AIRPORT_4);
		UNLOCK(flags);

		macio->flags &= ~MACIO_FLAG_AIRPORT_ON;
	}
	return 0;
}

#ifdef CONFIG_SMP
static int __pmac
core99_reset_cpu(struct device_node* node, int param, int value)
{
	const int reset_lines[] = {	KL_GPIO_RESET_CPU0,
					KL_GPIO_RESET_CPU1,
					KL_GPIO_RESET_CPU2,
					KL_GPIO_RESET_CPU3 };
	int reset_io;
	unsigned long flags;
	struct macio_chip* macio;
	
	macio = &macio_chips[0];
	if (macio->type != macio_keylargo && macio->type != macio_pangea)
		return -ENODEV;
	if (param > 3 || param < 0)
		return -ENODEV;

	reset_io = reset_lines[param];
	
	LOCK(flags);
	MACIO_OUT8(reset_io, KEYLARGO_GPIO_OUTPUT_ENABLE);
	(void)MACIO_IN8(reset_io);
	udelay(1);
	MACIO_OUT8(reset_io, KEYLARGO_GPIO_OUTPUT_ENABLE | KEYLARGO_GPIO_OUTOUT_DATA);
	(void)MACIO_IN8(reset_io);
	UNLOCK(flags);

	return 0;
}
#endif /* CONFIG_SMP */

static int __pmac
core99_usb_enable(struct device_node* node, int param, int value)
{
	struct macio_chip* macio;
	unsigned long flags;
	char* prop;
	int number;
	u32 reg;
	
	macio = &macio_chips[0];
	if (macio->type != macio_keylargo && macio->type != macio_pangea)
		return -ENODEV;
	
	prop = (char *)get_property(node, "AAPL,clock-id", NULL);
	if (!prop)
		return -ENODEV;
	if (strncmp(prop, "usb0u048", strlen("usb0u048")) == 0)
		number = 0;
	else if (strncmp(prop, "usb1u148", strlen("usb1u148")) == 0)
		number = 2;
	else
		return -ENODEV;

	/* Sorry for the brute-force locking, but this is only used during
	 * sleep and the timing seem to be critical
	 */
	LOCK(flags);
	if (value) {
		/* Turn ON */
		if (number == 0) {
			MACIO_BIC(KEYLARGO_FCR0, (KL0_USB0_PAD_SUSPEND0 | KL0_USB0_PAD_SUSPEND1));
			(void)MACIO_IN32(KEYLARGO_FCR0);
			UNLOCK(flags);
			mdelay(1);
			LOCK(flags);
			MACIO_BIS(KEYLARGO_FCR0, KL0_USB0_CELL_ENABLE);
		} else {
			MACIO_BIC(KEYLARGO_FCR0, (KL0_USB1_PAD_SUSPEND0 | KL0_USB1_PAD_SUSPEND1));
			UNLOCK(flags);
			(void)MACIO_IN32(KEYLARGO_FCR0);
			mdelay(1);
			LOCK(flags);
			MACIO_BIS(KEYLARGO_FCR0, KL0_USB1_CELL_ENABLE);
		}
		reg = MACIO_IN32(KEYLARGO_FCR4);
		reg &=	~(KL4_PORT_WAKEUP_ENABLE(number) | KL4_PORT_RESUME_WAKE_EN(number) |
			KL4_PORT_CONNECT_WAKE_EN(number) | KL4_PORT_DISCONNECT_WAKE_EN(number));
		reg &=	~(KL4_PORT_WAKEUP_ENABLE(number+1) | KL4_PORT_RESUME_WAKE_EN(number+1) |
			KL4_PORT_CONNECT_WAKE_EN(number+1) | KL4_PORT_DISCONNECT_WAKE_EN(number+1));
		MACIO_OUT32(KEYLARGO_FCR4, reg);
		(void)MACIO_IN32(KEYLARGO_FCR4);
		udelay(10);
	} else {
		/* Turn OFF */
		reg = MACIO_IN32(KEYLARGO_FCR4);
		reg |=	KL4_PORT_WAKEUP_ENABLE(number) | KL4_PORT_RESUME_WAKE_EN(number) |
			KL4_PORT_CONNECT_WAKE_EN(number) | KL4_PORT_DISCONNECT_WAKE_EN(number);
		reg |=	KL4_PORT_WAKEUP_ENABLE(number+1) | KL4_PORT_RESUME_WAKE_EN(number+1) |
			KL4_PORT_CONNECT_WAKE_EN(number+1) | KL4_PORT_DISCONNECT_WAKE_EN(number+1);
		MACIO_OUT32(KEYLARGO_FCR4, reg);
		(void)MACIO_IN32(KEYLARGO_FCR4);
		udelay(1);
		if (number == 0) {
			MACIO_BIC(KEYLARGO_FCR0, KL0_USB0_CELL_ENABLE);
			(void)MACIO_IN32(KEYLARGO_FCR0);
			udelay(1);
			MACIO_BIS(KEYLARGO_FCR0, (KL0_USB0_PAD_SUSPEND0 | KL0_USB0_PAD_SUSPEND1));
			(void)MACIO_IN32(KEYLARGO_FCR0);
		} else {
			MACIO_BIC(KEYLARGO_FCR0, KL0_USB1_CELL_ENABLE);
			(void)MACIO_IN32(KEYLARGO_FCR0);
			udelay(1);
			MACIO_BIS(KEYLARGO_FCR0, (KL0_USB1_PAD_SUSPEND0 | KL0_USB1_PAD_SUSPEND1));
			(void)MACIO_IN32(KEYLARGO_FCR0);
		}
		udelay(1);
	}
	UNLOCK(flags);

	return 0;
}

static int __pmac
core99_firewire_enable(struct device_node* node, int param, int value)
{
	unsigned long flags;
	struct macio_chip* macio;

	macio = &macio_chips[0];
	if (macio->type != macio_keylargo && macio->type != macio_pangea)
		return -ENODEV;
	if (!(macio->flags & MACIO_FLAG_FW_SUPPORTED))
		return -ENODEV;
	
	LOCK(flags);
	if (value) {
		UN_BIS(UNI_N_CLOCK_CNTL, UNI_N_CLOCK_CNTL_FW);
		(void)UN_IN(UNI_N_CLOCK_CNTL);
	} else {
		UN_BIC(UNI_N_CLOCK_CNTL, UNI_N_CLOCK_CNTL_FW);
		(void)UN_IN(UNI_N_CLOCK_CNTL);
	}
	UNLOCK(flags);
	mdelay(1);

	return 0;
}

static int __pmac
core99_firewire_cable_power(struct device_node* node, int param, int value)
{
	unsigned long flags;
	struct macio_chip* macio;

	/* Trick: we allow NULL node */
	if ((pmac_mb.board_flags & PMAC_MB_HAS_FW_POWER) == 0)
	    	return -ENODEV;
	macio = &macio_chips[0];
	if (macio->type != macio_keylargo && macio->type != macio_pangea)
		return -ENODEV;
	if (!(macio->flags & MACIO_FLAG_FW_SUPPORTED))
		return -ENODEV;
	
	LOCK(flags);
	if (value) {
		MACIO_OUT8(KL_GPIO_FW_CABLE_POWER , 0);
		MACIO_IN8(KL_GPIO_FW_CABLE_POWER);
		udelay(10);
	} else {
		MACIO_OUT8(KL_GPIO_FW_CABLE_POWER , 4);
		MACIO_IN8(KL_GPIO_FW_CABLE_POWER); udelay(10);
	}
	UNLOCK(flags);
	mdelay(1);

	return 0;
}

static int __pmac
core99_read_gpio(struct device_node* node, int param, int value)
{
	struct macio_chip* macio = &macio_chips[0];
	
	return MACIO_IN8(param);
}


static int __pmac
core99_write_gpio(struct device_node* node, int param, int value)
{
	struct macio_chip* macio = &macio_chips[0];

	MACIO_OUT8(param, (u8)(value & 0xff));
	return 0;
}

static void __pmac
keylargo_shutdown(struct macio_chip* macio, int restart)
{
	u32 temp;

	mdelay(1);
	MACIO_BIS(KEYLARGO_FCR0, KL0_USB_REF_SUSPEND);
	(void)MACIO_IN32(KEYLARGO_FCR0);
	mdelay(100);

	MACIO_BIC(KEYLARGO_FCR0,KL0_SCCA_ENABLE | KL0_SCCB_ENABLE |
				KL0_SCC_CELL_ENABLE |
		      		KL0_IRDA_ENABLE | KL0_IRDA_CLK32_ENABLE |
		      		KL0_IRDA_CLK19_ENABLE);

	(void)MACIO_IN32(KEYLARGO_FCR0); udelay(10);
	MACIO_BIC(KEYLARGO_MBCR, KL_MBCR_MB0_DEV_MASK);
	(void)MACIO_IN32(KEYLARGO_MBCR); udelay(10);

	MACIO_BIC(KEYLARGO_FCR1,
		KL1_AUDIO_SEL_22MCLK | KL1_AUDIO_CLK_ENABLE_BIT |
		KL1_AUDIO_CLK_OUT_ENABLE | KL1_AUDIO_CELL_ENABLE |
		KL1_I2S0_CELL_ENABLE | KL1_I2S0_CLK_ENABLE_BIT |
		KL1_I2S0_ENABLE | KL1_I2S1_CELL_ENABLE |
		KL1_I2S1_CLK_ENABLE_BIT | KL1_I2S1_ENABLE |
		KL1_EIDE0_ENABLE | KL1_EIDE0_RESET_N |
		KL1_EIDE1_ENABLE | KL1_EIDE1_RESET_N |
		KL1_UIDE_ENABLE);
	(void)MACIO_IN32(KEYLARGO_FCR1); udelay(10);

	MACIO_BIS(KEYLARGO_FCR2, KL2_ALT_DATA_OUT);
 	udelay(10);
 	MACIO_BIC(KEYLARGO_FCR2, KL2_IOBUS_ENABLE);
 	udelay(10);
	temp = MACIO_IN32(KEYLARGO_FCR3);
	if (macio->rev >= 2)
		temp |= (KL3_SHUTDOWN_PLL2X | KL3_SHUTDOWN_PLL_TOTAL);
		
	temp |= KL3_SHUTDOWN_PLLKW6 | KL3_SHUTDOWN_PLLKW4 |
		KL3_SHUTDOWN_PLLKW35 | KL3_SHUTDOWN_PLLKW12;
	temp &= ~(KL3_CLK66_ENABLE | KL3_CLK49_ENABLE | KL3_CLK45_ENABLE
		| KL3_CLK31_ENABLE | KL3_TIMER_CLK18_ENABLE | KL3_I2S1_CLK18_ENABLE
		| KL3_I2S0_CLK18_ENABLE | KL3_VIA_CLK16_ENABLE);
	MACIO_OUT32(KEYLARGO_FCR3, temp);
	(void)MACIO_IN32(KEYLARGO_FCR3); udelay(10);
}

static void __pmac
pangea_shutdown(struct macio_chip* macio, int restart)
{
	u32 temp;

	MACIO_BIC(KEYLARGO_FCR0,KL0_SCCA_ENABLE | KL0_SCCB_ENABLE |
				KL0_SCC_CELL_ENABLE |
				KL0_USB0_CELL_ENABLE | KL0_USB1_CELL_ENABLE);

	(void)MACIO_IN32(KEYLARGO_FCR0); udelay(10);
	MACIO_BIC(KEYLARGO_MBCR, KL_MBCR_MB0_DEV_MASK);
	(void)MACIO_IN32(KEYLARGO_MBCR); udelay(10);

	MACIO_BIC(KEYLARGO_FCR1,
		KL1_AUDIO_SEL_22MCLK | KL1_AUDIO_CLK_ENABLE_BIT |
		KL1_AUDIO_CLK_OUT_ENABLE | KL1_AUDIO_CELL_ENABLE |
		KL1_I2S0_CELL_ENABLE | KL1_I2S0_CLK_ENABLE_BIT |
		KL1_I2S0_ENABLE | KL1_I2S1_CELL_ENABLE |
		KL1_I2S1_CLK_ENABLE_BIT | KL1_I2S1_ENABLE |
		KL1_UIDE_ENABLE);
	(void)MACIO_IN32(KEYLARGO_FCR1); udelay(10);

	MACIO_BIS(KEYLARGO_FCR2, KL2_ALT_DATA_OUT);
 	udelay(10);
	temp = MACIO_IN32(KEYLARGO_FCR3);
	temp |= KL3_SHUTDOWN_PLLKW6 | KL3_SHUTDOWN_PLLKW4 |
		KL3_SHUTDOWN_PLLKW35;
	temp &= ~(KL3_CLK49_ENABLE | KL3_CLK45_ENABLE
		| KL3_CLK31_ENABLE | KL3_TIMER_CLK18_ENABLE | KL3_I2S1_CLK18_ENABLE
		| KL3_I2S0_CLK18_ENABLE | KL3_VIA_CLK16_ENABLE);
	MACIO_OUT32(KEYLARGO_FCR3, temp);
	(void)MACIO_IN32(KEYLARGO_FCR3); udelay(10);
}

static int __pmac
core99_sleep(void)
{
	struct macio_chip* macio;
	int i;

	macio = &macio_chips[0];
	if (macio->type != macio_keylargo && macio->type != macio_pangea)
		return -ENODEV;
	
	/* We power off the wireless slot in case it was not done
	 * by the driver. We don't power it on automatically however
	 */
	if (macio->flags & MACIO_FLAG_AIRPORT_ON)
		core99_airport_enable(macio->of_node, 0, 0);

	/* We power off the FW cable. Should be done by the driver... */
	if (macio->flags & MACIO_FLAG_FW_SUPPORTED) {
		core99_firewire_enable(NULL, 0, 0);
		core99_firewire_cable_power(NULL, 0, 0);
	}

	/* We make sure int. modem is off (in case driver lost it) */
	core99_modem_enable(macio->of_node, 0, 0);
	/* We make sure the sound is off as well */
	core99_sound_chip_enable(macio->of_node, 0, 0);
	 
	/*
	 * Save various bits of KeyLargo
	 */

	/* Save the state of the various GPIOs */
	save_gpio_levels[0] = MACIO_IN32(KEYLARGO_GPIO_LEVELS0);
	save_gpio_levels[1] = MACIO_IN32(KEYLARGO_GPIO_LEVELS1);
	for (i=0; i<KEYLARGO_GPIO_EXTINT_CNT; i++)
		save_gpio_extint[i] = MACIO_IN8(KEYLARGO_GPIO_EXTINT_0+i);
	for (i=0; i<KEYLARGO_GPIO_CNT; i++)
		save_gpio_normal[i] = MACIO_IN8(KEYLARGO_GPIO_0+i);

	/* Save the FCRs */
	save_mbcr = MACIO_IN32(KEYLARGO_MBCR);
	save_fcr[0] = MACIO_IN32(KEYLARGO_FCR0);
	save_fcr[1] = MACIO_IN32(KEYLARGO_FCR1);
	save_fcr[2] = MACIO_IN32(KEYLARGO_FCR2);
	save_fcr[3] = MACIO_IN32(KEYLARGO_FCR3);
	save_fcr[4] = MACIO_IN32(KEYLARGO_FCR4);

	/* Save state & config of DBDMA channels */
	dbdma_save(macio, save_dbdma);
	
	/*
	 * Turn off as much as we can
	 */
	if (macio->type == macio_pangea)
		pangea_shutdown(macio, 0);
	else if (macio->type == macio_keylargo)
		keylargo_shutdown(macio, 0);
	
	/* 
	 * Put the host bridge to sleep
	 */

	save_unin_clock_ctl = UN_IN(UNI_N_CLOCK_CNTL);
	UN_OUT(UNI_N_CLOCK_CNTL, save_unin_clock_ctl &
		~(UNI_N_CLOCK_CNTL_GMAC|UNI_N_CLOCK_CNTL_FW/*|UNI_N_CLOCK_CNTL_PCI*/));
	udelay(100);
	UN_OUT(UNI_N_HWINIT_STATE, UNI_N_HWINIT_STATE_SLEEPING);
	UN_OUT(UNI_N_POWER_MGT, UNI_N_POWER_MGT_SLEEP);

	/*
	 * FIXME: A bit of black magic with OpenPIC (don't ask me why)
	 */
	if (pmac_mb.model_id == PMAC_TYPE_SAWTOOTH) {
		MACIO_BIS(0x506e0, 0x00400000);
		MACIO_BIS(0x506e0, 0x80000000);
	}
	return 0;
}

static int __pmac
core99_wake_up(void)
{
	struct macio_chip* macio;
	int i;

	macio = &macio_chips[0];
	if (macio->type != macio_keylargo && macio->type != macio_pangea)
		return -ENODEV;

	/*
	 * Wakeup the host bridge
	 */
	UN_OUT(UNI_N_POWER_MGT, UNI_N_POWER_MGT_NORMAL);
	udelay(10);
	UN_OUT(UNI_N_HWINIT_STATE, UNI_N_HWINIT_STATE_RUNNING);
	udelay(10);
	
	/*
	 * Restore KeyLargo
	 */
	 
	MACIO_OUT32(KEYLARGO_MBCR, save_mbcr);
	(void)MACIO_IN32(KEYLARGO_MBCR); udelay(10);
	MACIO_OUT32(KEYLARGO_FCR0, save_fcr[0]);
	(void)MACIO_IN32(KEYLARGO_FCR0); udelay(10);
	MACIO_OUT32(KEYLARGO_FCR1, save_fcr[1]);
	(void)MACIO_IN32(KEYLARGO_FCR1); udelay(10);
	MACIO_OUT32(KEYLARGO_FCR2, save_fcr[2]);
	(void)MACIO_IN32(KEYLARGO_FCR2); udelay(10);
	MACIO_OUT32(KEYLARGO_FCR3, save_fcr[3]);
	(void)MACIO_IN32(KEYLARGO_FCR3); udelay(10);
	MACIO_OUT32(KEYLARGO_FCR4, save_fcr[4]);
	(void)MACIO_IN32(KEYLARGO_FCR4); udelay(10);

	dbdma_restore(macio, save_dbdma);

	MACIO_OUT32(KEYLARGO_GPIO_LEVELS0, save_gpio_levels[0]);
	MACIO_OUT32(KEYLARGO_GPIO_LEVELS1, save_gpio_levels[1]);
	for (i=0; i<KEYLARGO_GPIO_EXTINT_CNT; i++)
		MACIO_OUT8(KEYLARGO_GPIO_EXTINT_0+i, save_gpio_extint[i]);
	for (i=0; i<KEYLARGO_GPIO_CNT; i++)
		MACIO_OUT8(KEYLARGO_GPIO_0+i, save_gpio_normal[i]);

	/* FIXME more black magic with OpenPIC ... */
	if (pmac_mb.model_id == PMAC_TYPE_SAWTOOTH) {
		MACIO_BIC(0x506e0, 0x00400000);
		MACIO_BIC(0x506e0, 0x80000000);
	}

	UN_OUT(UNI_N_CLOCK_CNTL, save_unin_clock_ctl);
	udelay(100);

	return 0;
}

static int __pmac
core99_sleep_state(struct device_node* node, int param, int value)
{
	if ((pmac_mb.board_flags & PMAC_MB_CAN_SLEEP) == 0)
		return -EPERM;
	if (value == 1)
		return core99_sleep();
	else if (value == 0)
		return core99_wake_up();
	return 0;
}

static int __pmac
pangea_modem_enable(struct device_node* node, int param, int value)
{
	struct macio_chip*	macio;
	u8			gpio;
	unsigned long		flags;
	
	macio = macio_find(node, 0);
	if (!macio)
		return -ENODEV;
	gpio = MACIO_IN8(KL_GPIO_MODEM_RESET);
	gpio |= KEYLARGO_GPIO_OUTPUT_ENABLE;
	gpio &= ~KEYLARGO_GPIO_OUTOUT_DATA;
	
	if (!value) {
		LOCK(flags);
		MACIO_OUT8(KL_GPIO_MODEM_RESET, gpio);
		UNLOCK(flags);
		(void)MACIO_IN8(KL_GPIO_MODEM_RESET);
		mdelay(250);
	}
    	LOCK(flags);
	if (value) {
		MACIO_OUT8(KL_GPIO_MODEM_POWER,
			KEYLARGO_GPIO_OUTPUT_ENABLE);
    		UNLOCK(flags);
	    	(void)MACIO_IN32(KEYLARGO_FCR2);
		mdelay(250);
	} else {
		MACIO_OUT8(KL_GPIO_MODEM_POWER,
			KEYLARGO_GPIO_OUTPUT_ENABLE | KEYLARGO_GPIO_OUTOUT_DATA);
    		UNLOCK(flags);
	}
	if (value) {
		LOCK(flags);
		MACIO_OUT8(KL_GPIO_MODEM_RESET, gpio | KEYLARGO_GPIO_OUTOUT_DATA);
		(void)MACIO_IN8(KL_GPIO_MODEM_RESET);
	    	UNLOCK(flags); mdelay(250); LOCK(flags);
		MACIO_OUT8(KL_GPIO_MODEM_RESET, gpio);
		(void)MACIO_IN8(KL_GPIO_MODEM_RESET);
	    	UNLOCK(flags); mdelay(250); LOCK(flags);
		MACIO_OUT8(KL_GPIO_MODEM_RESET, gpio | KEYLARGO_GPIO_OUTOUT_DATA);
		(void)MACIO_IN8(KL_GPIO_MODEM_RESET);
	    	UNLOCK(flags); mdelay(250); LOCK(flags);
	}
	return 0;
}


static int __pmac
generic_get_mb_info(struct device_node* node, int param, int value)
{
	switch(param) {
		case PMAC_MB_INFO_MODEL:
			return pmac_mb.model_id;
		case PMAC_MB_INFO_FLAGS:
			return pmac_mb.board_flags;
		case PMAC_MB_INFO_NAME:	
			/* hack hack hack... but should work */
			return (int)pmac_mb.model_name;
	}
	return 0;
}


/* 
 * Table definitions
 */
 
/* Used on any machine
 */
static struct feature_table_entry any_features[]  __pmacdata = {
	{ PMAC_FTR_GET_MB_INFO,		generic_get_mb_info },
	{ 0, NULL }
};

/* OHare based motherboards. Currently, we only use these on the
 * 2400,3400 and 3500 series powerbooks. Some older desktops seem
 * to have issues with turning on/off those asic cells
 */
static struct feature_table_entry ohare_features[]  __pmacdata = {
	{ PMAC_FTR_SCC_ENABLE,		ohare_scc_enable },
	{ PMAC_FTR_SWIM3_ENABLE,	ohare_floppy_enable },
	{ PMAC_FTR_MESH_ENABLE,		ohare_mesh_enable },
	{ PMAC_FTR_IDE_ENABLE,		ohare_ide_enable},
	{ PMAC_FTR_IDE_RESET,		ohare_ide_reset},
	{ PMAC_FTR_SLEEP_STATE,		ohare_sleep_state },
	{ 0, NULL }
};

/* Heathrow desktop machines (Beige G3).
 * Separated as some features couldn't be properly tested
 * and the serial port control bits appear to confuse it.
 */
static struct feature_table_entry heathrow_desktop_features[]  __pmacdata = {
	{ PMAC_FTR_SWIM3_ENABLE,	heathrow_floppy_enable },
	{ PMAC_FTR_MESH_ENABLE,		heathrow_mesh_enable },
	{ PMAC_FTR_IDE_ENABLE,		heathrow_ide_enable },
	{ PMAC_FTR_IDE_RESET,		heathrow_ide_reset },
	{ PMAC_FTR_BMAC_ENABLE,		heathrow_bmac_enable },
	{ 0, NULL }
};

/* Heathrow based laptop, that is the Wallstreet and mainstreet
 * powerbooks.
 */
static struct feature_table_entry heathrow_laptop_features[]  __pmacdata = {
	{ PMAC_FTR_SCC_ENABLE,		heathrow_scc_enable },
	{ PMAC_FTR_MODEM_ENABLE,	heathrow_modem_enable },
	{ PMAC_FTR_SWIM3_ENABLE,	heathrow_floppy_enable },
	{ PMAC_FTR_MESH_ENABLE,		heathrow_mesh_enable },
	{ PMAC_FTR_IDE_ENABLE,		heathrow_ide_enable },
	{ PMAC_FTR_IDE_RESET,		heathrow_ide_reset },
	{ PMAC_FTR_BMAC_ENABLE,		heathrow_bmac_enable },
	{ PMAC_FTR_SOUND_CHIP_ENABLE,	heathrow_sound_enable },
	{ PMAC_FTR_SLEEP_STATE,		heathrow_sleep_state },
	{ 0, NULL }
};

/* Paddington based machines
 * The lombard (101) powerbook, first iMac models, B&W G3 and Yikes G4.
 */
static struct feature_table_entry paddington_features[]  __pmacdata = {
	{ PMAC_FTR_SCC_ENABLE,		heathrow_scc_enable },
	{ PMAC_FTR_MODEM_ENABLE,	heathrow_modem_enable },
	{ PMAC_FTR_SWIM3_ENABLE,	heathrow_floppy_enable },
	{ PMAC_FTR_MESH_ENABLE,		heathrow_mesh_enable },
	{ PMAC_FTR_IDE_ENABLE,		heathrow_ide_enable },
	{ PMAC_FTR_IDE_RESET,		heathrow_ide_reset },
	{ PMAC_FTR_BMAC_ENABLE,		heathrow_bmac_enable },
	{ PMAC_FTR_SOUND_CHIP_ENABLE,	heathrow_sound_enable },
	{ PMAC_FTR_SLEEP_STATE,		heathrow_sleep_state },
	{ 0, NULL }
};

/* Core99 & MacRISC 2 machines (all machines released since the
 * iBook (included), that is all AGP machines, except pangea
 * chipset. The pangea chipset is the "combo" UniNorth/KeyLargo
 * used on iBook2 & iMac "flow power".
 */
static struct feature_table_entry core99_features[]  __pmacdata = {
	{ PMAC_FTR_SCC_ENABLE,		core99_scc_enable },
	{ PMAC_FTR_MODEM_ENABLE,	core99_modem_enable },
	{ PMAC_FTR_IDE_ENABLE,		core99_ide_enable },
	{ PMAC_FTR_IDE_RESET,		core99_ide_reset },
	{ PMAC_FTR_GMAC_ENABLE,		core99_gmac_enable },
	{ PMAC_FTR_GMAC_PHY_RESET,	core99_gmac_phy_reset },
	{ PMAC_FTR_SOUND_CHIP_ENABLE,	core99_sound_chip_enable },
	{ PMAC_FTR_AIRPORT_ENABLE,	core99_airport_enable },
	{ PMAC_FTR_USB_ENABLE,		core99_usb_enable },
	{ PMAC_FTR_1394_ENABLE,		core99_firewire_enable },
	{ PMAC_FTR_1394_CABLE_POWER,	core99_firewire_cable_power },
	{ PMAC_FTR_SLEEP_STATE,		core99_sleep_state },
#ifdef CONFIG_SMP
	{ PMAC_FTR_RESET_CPU,		core99_reset_cpu },
#endif /* CONFIG_SMP */
	{ PMAC_FTR_READ_GPIO,		core99_read_gpio },
	{ PMAC_FTR_WRITE_GPIO,		core99_write_gpio },
	{ 0, NULL }
};

/* Pangea features
 */
static struct feature_table_entry pangea_features[]  __pmacdata = {
	{ PMAC_FTR_SCC_ENABLE,		core99_scc_enable },
	{ PMAC_FTR_MODEM_ENABLE,	pangea_modem_enable },
	{ PMAC_FTR_IDE_ENABLE,		core99_ide_enable },
	{ PMAC_FTR_IDE_RESET,		core99_ide_reset },
	{ PMAC_FTR_GMAC_ENABLE,		core99_gmac_enable },
	{ PMAC_FTR_GMAC_PHY_RESET,	core99_gmac_phy_reset },
	{ PMAC_FTR_SOUND_CHIP_ENABLE,	core99_sound_chip_enable },
	{ PMAC_FTR_AIRPORT_ENABLE,	core99_airport_enable },
	{ PMAC_FTR_USB_ENABLE,		core99_usb_enable },
	{ PMAC_FTR_1394_ENABLE,		core99_firewire_enable },
	{ PMAC_FTR_1394_CABLE_POWER,	core99_firewire_cable_power },
	{ PMAC_FTR_SLEEP_STATE,		core99_sleep_state },
	{ PMAC_FTR_READ_GPIO,		core99_read_gpio },
	{ PMAC_FTR_WRITE_GPIO,		core99_write_gpio },
	{ 0, NULL }
};
	
static struct pmac_mb_def pmac_mb_defs[] __pmacdata = {
	/* Warning: ordering is important as some models may claim
	 * beeing compatible with several types
	 */
	{	"AAPL,8500",			"PowerMac 8500/8600",
		PMAC_TYPE_PSURGE,		NULL,
		0
	},
	{	"AAPL,9500",			"PowerMac 9500/9600",
		PMAC_TYPE_PSURGE,		NULL,
		0
	},
	{	"AAPL,7500",			"PowerMac 7500",
		PMAC_TYPE_PSURGE,		NULL,
		0
	},
	{	"AAPL,e407",			"Alchemy",
		PMAC_TYPE_ALCHEMY,		NULL,
		0
	},
	{	"AAPL,e411",			"Gazelle",
		PMAC_TYPE_GAZELLE,		NULL,
		0
	},
	{	"AAPL,3400/2400",		"PowerBook 3400",
		PMAC_TYPE_HOOPER,		ohare_features,
		PMAC_MB_CAN_SLEEP
	},
	{	"AAPL,3500",			"PowerBook 3500",
		PMAC_TYPE_KANGA,		ohare_features,
		PMAC_MB_CAN_SLEEP
	},
	{	"AAPL,Gossamer",		"PowerMac G3 (Gossamer)",
		PMAC_TYPE_GOSSAMER,		heathrow_desktop_features,
		0
	},
	{	"AAPL,PowerMac G3",		"PowerMac G3 (Silk)",
		PMAC_TYPE_SILK,			heathrow_desktop_features,
		0
	},
	{	"AAPL,PowerBook1998",		"PowerBook Wallstreet",
		PMAC_TYPE_WALLSTREET,		heathrow_laptop_features,
		PMAC_MB_CAN_SLEEP
	},
	{	"AAPL,PowerBook1,1",		"PowerBook 101 (Lombard)",
		PMAC_TYPE_101_PBOOK,		paddington_features,
		PMAC_MB_CAN_SLEEP
	},
	{	"iMac,1",			"iMac (first generation)",
		PMAC_TYPE_ORIG_IMAC,		paddington_features,
		0
	},
	{	"PowerMac4,1",			"iMac \"Flower Power\"",
		PMAC_TYPE_PANGEA_IMAC,		pangea_features,
		PMAC_MB_CAN_SLEEP
	},
	{	"PowerBook4,1",			"iBook 2",
		PMAC_TYPE_IBOOK2,		pangea_features,
		PMAC_MB_CAN_SLEEP | PMAC_MB_HAS_FW_POWER
	},
	{	"PowerMac1,1",			"Blue&White G3",
		PMAC_TYPE_YOSEMITE,		paddington_features,
		0
	},
	{	"PowerMac1,2",			"PowerMac G4 PCI Graphics",
		PMAC_TYPE_YIKES,		paddington_features,
		0
	},
	{	"PowerBook2,1",			"iBook (first generation)",
		PMAC_TYPE_ORIG_IBOOK,		core99_features,
		PMAC_MB_CAN_SLEEP
	},
	{	"PowerMac3,1",			"PowerMac G4 AGP Graphics",
		PMAC_TYPE_SAWTOOTH,		core99_features,
		0
	},
	{	"PowerMac3,2",			"PowerMac G4 AGP Graphics",
		PMAC_TYPE_SAWTOOTH,		core99_features,
		0
	},
	{	"PowerMac3,3",			"PowerMac G4 AGP Graphics",
		PMAC_TYPE_SAWTOOTH,		core99_features,
		0
	},
	{	"PowerMac2,1",			"iMac FireWire",
		PMAC_TYPE_FW_IMAC,		core99_features,
		PMAC_MB_CAN_SLEEP
	},
	{	"PowerMac2,2",			"iMac FireWire",
		PMAC_TYPE_FW_IMAC,		core99_features,
		PMAC_MB_CAN_SLEEP
	},
	{	"PowerBook2,2",			"iBook FireWire",
		PMAC_TYPE_FW_IBOOK,		core99_features,
		PMAC_MB_CAN_SLEEP | PMAC_MB_HAS_FW_POWER
	},
	{	"PowerMac5,1",			"PowerMac G4 Cube",
		PMAC_TYPE_CUBE,			core99_features,
	},
	{	"PowerMac3,4",			"PowerMac G4 Silver",
		PMAC_TYPE_QUICKSILVER,		core99_features,
		0
	},
	{	"PowerMac3,5",			"PowerMac G4 Silver",
		PMAC_TYPE_QUICKSILVER,		core99_features,
		0
	},
	{	"PowerBook3,1",			"PowerBook Pismo",
		PMAC_TYPE_PISMO,		core99_features,
		PMAC_MB_CAN_SLEEP | PMAC_MB_HAS_FW_POWER
	},
	{	"PowerBook3,2",			"PowerBook Titanium",
		PMAC_TYPE_TITANIUM,		core99_features,
		PMAC_MB_CAN_SLEEP | PMAC_MB_HAS_FW_POWER
	},
	{	"PowerBook3,3",			"PowerBook Titanium II",
		PMAC_TYPE_TITANIUM2,		core99_features,
		PMAC_MB_CAN_SLEEP | PMAC_MB_HAS_FW_POWER
	},
};

/*
 * The toplevel feature_call callback
 */
int __pmac
pmac_do_feature_call(unsigned int selector, ...)
{
	struct device_node* node;
	int param, value, i;
	feature_call func = NULL;
	va_list args;
	
	if (!pmac_mb.features)
		return -ENODEV;
	for (i=0; pmac_mb.features[i].function; i++)
		if (pmac_mb.features[i].selector == selector) {
			func = pmac_mb.features[i].function;
			break;
		}
	if (!func)
		for (i=0; any_features[i].function; i++)
			if (any_features[i].selector == selector) {
				func = any_features[i].function;
				break;
			}
	if (!func)
		return -ENODEV;

	va_start(args, selector);
	node = (struct device_node*)va_arg(args, void*);
	param = va_arg(args, int);
	value = va_arg(args, int);
	va_end(args);

	return func(node, param, value);
}

static int __init
probe_motherboard(void)
{
	int i;
	struct macio_chip* macio = &macio_chips[0];

	/* Lookup known motherboard type in device-tree */
	for(i=0; i<(sizeof(pmac_mb_defs)/sizeof(struct pmac_mb_def)); i++) {
	    if (machine_is_compatible(pmac_mb_defs[i].model_string)) {
		pmac_mb = pmac_mb_defs[i];
		goto found;
	    }
	}

	/* Fallback to selection depending on mac-io chip type */
	switch(macio->type) {
	    case macio_grand_central:
		pmac_mb.model_id = PMAC_TYPE_PSURGE;
		pmac_mb.model_name = "Unknown PowerSurge";
		break;
	    case macio_ohare:
		pmac_mb.model_id = PMAC_TYPE_UNKNOWN_OHARE;
		pmac_mb.model_name = "Unknown OHare-based";
	    	break;
	    case macio_heathrow:
		pmac_mb.model_id = PMAC_TYPE_UNKNOWN_HEATHROW;
		pmac_mb.model_name = "Unknown Heathrow-based";
		pmac_mb.features = heathrow_desktop_features;
		break;
	    case macio_paddington:
		pmac_mb.model_id = PMAC_TYPE_UNKNOWN_PADDINGTON;
		pmac_mb.model_name = "Unknown Paddington-based";
	    	pmac_mb.features = paddington_features;
		break;
	    case macio_keylargo:
		pmac_mb.model_id = PMAC_TYPE_UNKNOWN_CORE99;
		pmac_mb.model_name = "Unknown Keylargo-based";
	    	pmac_mb.features = core99_features;
		break;
	    case macio_pangea:
		pmac_mb.model_id = PMAC_TYPE_UNKNOWN_PANGEA;
		pmac_mb.model_name = "Unknown Pangea-based";
	    	pmac_mb.features = pangea_features;
		break;
	    default:
	    	return -ENODEV;
	}
found:
	/* Fixup Hooper vs. Comet */
	if (pmac_mb.model_id == PMAC_TYPE_HOOPER) {
		u32* mach_id_ptr = (u32*)ioremap(0xf3000034, 4);
		if (!mach_id_ptr)
			return -ENODEV;
		/* Here, I used to disable the media-bay on comet. It
		 * appears this is wrong, the floppy connector is actually
		 * a kind of media-bay and works with the current driver.
		 */
		if ((*mach_id_ptr) & 0x20000000UL)
			pmac_mb.model_id = PMAC_TYPE_COMET;
		iounmap(mach_id_ptr);
	}

	/* Set default value of powersave_nap on machines that support it.
	 * It appears that uninorth rev 3 has a problem with it, we don't
	 * enable it on those. In theory, the flush-on-lock property is
	 * supposed to be set when not supported, but I'm not very confident
	 * that all Apple OF revs did it properly, I do it the paranoid way.
	 */
	while (uninorth_base && uninorth_rev > 3) {
		struct device_node* np = find_path_device("/cpus");
		u32 pvr = mfspr(PVR);
		if (!np || !np->child) {
			printk(KERN_WARNING "Can't find CPU(s) in device tree !\n");
			break;
		}
		np = np->child;
		/* Nap mode not supported on SMP */
		if (np->sibling)
			break;
		/* Nap mode not supported if flush-on-lock property is present */
		if (get_property(np, "flush-on-lock", NULL))
			break;
		/* Some 7450 may have problem with NAP mode too ... */
		if (((pvr >> 16) == 0x8000) && ((pvr & 0xffff) < 0x0201))
			break;
		powersave_nap = 1;
		printk(KERN_INFO "Processor NAP mode on idle enabled.\n");
		break;
	}

	printk(KERN_INFO "PowerMac motherboard: %s\n", pmac_mb.model_name);
	return 0;
}

/* Initialize the Core99 UniNorth host bridge and memory controller
 */
static void __init
probe_uninorth(void)
{
	unsigned long actrl;
	
	/* Locate core99 Uni-N */
	uninorth_node = find_devices("uni-n");
	if (uninorth_node && uninorth_node->n_addrs > 0) {
		uninorth_base = ioremap(uninorth_node->addrs[0].address, 0x1000);
		uninorth_rev = in_be32(UN_REG(UNI_N_VERSION));
	} else
		uninorth_node = NULL;
		
	if (!uninorth_node)
		return;
	
	printk(KERN_INFO "Found Uninorth memory controller & host bridge, revision: %d\n",
			uninorth_rev);

	/* Set the arbitrer QAck delay according to what Apple does
	 */
	if (uninorth_rev < 0x10) {
		actrl = UN_IN(UNI_N_ARB_CTRL) & ~UNI_N_ARB_CTRL_QACK_DELAY_MASK;
		actrl |= ((uninorth_rev < 3) ? UNI_N_ARB_CTRL_QACK_DELAY105 :
			UNI_N_ARB_CTRL_QACK_DELAY) << UNI_N_ARB_CTRL_QACK_DELAY_SHIFT;
		UN_OUT(UNI_N_ARB_CTRL, actrl);
	}
}	

static void __init
probe_one_macio(const char* name, const char* compat, int type)
{
	struct device_node*	node;
	int			i;
	volatile u32*		base;
	u32*			revp;
	
	node = find_devices(name);
	if (!node || !node->n_addrs)
		return;
	if (compat)
		do {
			if (device_is_compatible(node, compat))
				break;
			node = node->next;
		} while (node);
	if (!node)
		return;
	for(i=0; i<MAX_MACIO_CHIPS; i++) {
		if (!macio_chips[i].of_node)
			break;
		if (macio_chips[i].of_node == node)
			return;
	}
	if (i >= MAX_MACIO_CHIPS) {
		printk(KERN_ERR "pmac_feature: Please increase MAX_MACIO_CHIPS !\n");
		printk(KERN_ERR "pmac_feature: %s skipped\n", node->full_name);
		return;
	}
	base = (volatile u32*)ioremap(node->addrs[0].address, node->addrs[0].size);
	if (!base) {
		printk(KERN_ERR "pmac_feature: Can't map mac-io chip !\n");
		return;
	}
	if (type == macio_keylargo) {
		u32* did = (u32 *)get_property(node, "device-id", NULL);
		if (*did == 0x00000025)
			type = macio_pangea;
	}
	macio_chips[i].of_node	= node;
	macio_chips[i].type	= type;
	macio_chips[i].base	= base;
	macio_chips[i].flags	= MACIO_FLAG_SCCB_ON | MACIO_FLAG_SCCB_ON;
	revp = (u32 *)get_property(node, "revision-id", NULL);
	if (revp)
		macio_chips[i].rev = *revp;
	printk(KERN_INFO "Found a %s mac-io controller, rev: %d, mapped at 0x%p\n",
		macio_names[type], macio_chips[i].rev, macio_chips[i].base);
}

static int __init
probe_macios(void)
{
	/* Warning, ordering is important */
	probe_one_macio("gc", NULL, macio_grand_central);
	probe_one_macio("ohare", NULL, macio_ohare);
	probe_one_macio("pci106b,7", NULL, macio_ohareII);
	probe_one_macio("mac-io", "keylargo", macio_keylargo);
	probe_one_macio("mac-io", "paddington", macio_paddington);
	probe_one_macio("mac-io", "gatwick", macio_gatwick);
	probe_one_macio("mac-io", "heathrow", macio_heathrow);

	/* Make sure the "main" macio chip appear first */
	if (macio_chips[0].type == macio_gatwick
	    && macio_chips[1].type == macio_heathrow) {
		struct macio_chip temp = macio_chips[0];
		macio_chips[0] = macio_chips[1];
		macio_chips[1] = temp;
	}
	if (macio_chips[0].type == macio_ohareII
	    && macio_chips[1].type == macio_ohare) {
		struct macio_chip temp = macio_chips[0];
		macio_chips[0] = macio_chips[1];
		macio_chips[1] = temp;
	}

	return (macio_chips[0].of_node == NULL) ? -ENODEV : 0;
}

static void __init
initial_serial_shutdown(struct device_node* np)
{
	int len;
	struct slot_names_prop {
		int	count;
		char	name[1];
	} *slots;
	char *conn;
	int port_type = PMAC_SCC_ASYNC;
	int modem = 0;
	
	slots = (struct slot_names_prop *)get_property(np, "slot-names", &len);
	conn = get_property(np, "AAPL,connector", &len);
	if (conn && (strcmp(conn, "infrared") == 0))
		port_type = PMAC_SCC_IRDA;
	else if (device_is_compatible(np, "cobalt"))
		modem = 1;
	else if (slots && slots->count > 0) {
		if (strcmp(slots->name, "IrDA") == 0)
			port_type = PMAC_SCC_IRDA;
		else if (strcmp(slots->name, "Modem") == 0)
			modem = 1;
	}
	if (modem)
		pmac_call_feature(PMAC_FTR_MODEM_ENABLE, np, 0, 0);
	pmac_call_feature(PMAC_FTR_SCC_ENABLE, np, port_type, 0);
}

static void __init
set_initial_features(void)
{
	struct device_node* np;
	
	/* That hack appears to be necessary for some StarMax motherboards
	 * but I'm not too sure it was audited for side-effects on other
	 * ohare based machines...
	 * Since I still have difficulties figuring the right way to
	 * differenciate them all and since that hack was there for a long
	 * time, I'll keep it around
	 */
	if (macio_chips[0].type == macio_ohare && !find_devices("via-pmu")) {
		struct macio_chip* macio = &macio_chips[0];
		MACIO_OUT32(OHARE_FCR, STARMAX_FEATURES);
	} else if (macio_chips[0].type == macio_ohare) {
		struct macio_chip* macio = &macio_chips[0];
		MACIO_BIS(OHARE_FCR, OH_IOBUS_ENABLE);
	} else if (macio_chips[1].type == macio_ohare) {
		struct macio_chip* macio = &macio_chips[1];
		MACIO_BIS(OHARE_FCR, OH_IOBUS_ENABLE);
	}

	if (macio_chips[0].type == macio_keylargo ||
	    macio_chips[0].type == macio_pangea) {
		/* Enable GMAC for now for PCI probing. It will be disabled
		 * later on after PCI probe
		 */
		np = find_devices("ethernet");
		while(np) {
			if (np->parent
			    && device_is_compatible(np->parent, "uni-north")
			    && device_is_compatible(np, "gmac"))
				core99_gmac_enable(np, 0, 1);
			np = np->next;
		}

		/* Enable FW before PCI probe. Will be disabled later on
		 * Note: We should have a batter way to check that we are
		 * dealing with uninorth internal cell and not a PCI cell
		 * on the external PCI. The code below works though.
		 */
		np = find_devices("firewire");
		while(np) {
			if (np->parent
			    && device_is_compatible(np->parent, "uni-north")
			    && (device_is_compatible(np, "pci106b,18") || 
	     		        device_is_compatible(np, "pci106b,30") ||
	     		        device_is_compatible(np, "pci11c1,5811"))) {
				macio_chips[0].flags |= MACIO_FLAG_FW_SUPPORTED;
				core99_firewire_enable(np, 0, 1);
			}
			np = np->next;
		}
		
		/* Switch airport off */
		np = find_devices("radio");
		while(np) {
			if (np && np->parent == macio_chips[0].of_node) {
				macio_chips[0].flags |= MACIO_FLAG_AIRPORT_ON;
				core99_airport_enable(np, 0, 0);
			}
			np = np->next;
		}
	}

	/* On all machines, switch sound off */
	if (macio_chips[0].of_node)
		pmac_do_feature_call(PMAC_FTR_SOUND_CHIP_ENABLE,
			macio_chips[0].of_node, 0, 0);

	/* On all machines, switch modem & serial ports off */
	np = find_devices("ch-a");
	while(np) {
		initial_serial_shutdown(np);
		np = np->next;
	}
	np = find_devices("ch-b");
	while(np) {
		initial_serial_shutdown(np);
		np = np->next;
	}
	
	/* Let hardware settle down */
	mdelay(10);
}

void __init
pmac_feature_init(void)
{
	/* Detect the UniNorth memory controller */
	probe_uninorth();

	/* Probe mac-io controllers */
	if (probe_macios()) {
		printk(KERN_WARNING "No mac-io chip found\n");
		return;
	}

	/* Probe machine type */
	if (probe_motherboard())
		printk(KERN_WARNING "Unknown PowerMac !\n");

	/* Set some initial features (turn off some chips that will
	 * be later turned on)
	 */
	set_initial_features();
}

void __init
pmac_feature_late_init(void)
{
	struct device_node* np;
	
	/* Request some resources late */
	if (uninorth_node)
		request_OF_resource(uninorth_node, 0, NULL);
	np = find_devices("hammerhead");
	if (np)
		request_OF_resource(np, 0, NULL);
	np = find_devices("interrupt-controller");
	if (np)
		request_OF_resource(np, 0, NULL);
}
/*
 * BK Id: SCCS/s.misc.S 1.6 05/18/01 15:17:15 cort
 */
/*
 * Copyright (C) Paul Mackerras 1997.
 *
 * This program is free software; you can redistribute it and/or
 * modify it under the terms of the GNU General Public License
 * as published by the Free Software Foundation; either version
 * 2 of the License, or (at your option) any later version.
 */
	.text

/*
 * Use the BAT3 registers to map the 1st 8MB of RAM to
 * the address given as the 1st argument.
 */
	.globl	setup_bats
setup_bats:
	mfpvr	5
	rlwinm	5,5,16,16,31		/* r3 = 1 for 601, 4 for 604 */
	cmpi	0,5,1
	li	0,0
	bne	4f
	mtibatl	3,0			/* invalidate BAT first */
	ori	3,3,4			/* set up BAT registers for 601 */
	li	4,0x7f
	mtibatu	3,3
	mtibatl	3,4
	b	5f
4:	mtdbatu	3,0			/* invalidate BATs first */
	mtibatu	3,0
	ori	3,3,0xff		/* set up BAT registers for 604 */
	li	4,2
	mtdbatl	3,4
	mtdbatu	3,3
	mtibatl	3,4
	mtibatu	3,3
5:	sync
	isync
	blr

/*
 * Flush the dcache and invalidate the icache for a range of addresses.
 *
 * flush_cache(addr, len)
 */
	.global	flush_cache
flush_cache:
	addi	4,4,0x1f	/* len = (len + 0x1f) / 0x20 */
	rlwinm.	4,4,27,5,31
	mtctr	4
	beqlr
1:	dcbf	0,3
	icbi	0,3
	addi	3,3,0x20
	bdnz	1b
	sync
	isync
	blr
/*
 * BK Id: SCCS/s.start.c 1.10 07/25/01 18:13:07 trini
 */
/*
 * Copyright (C) Paul Mackerras 1997.
 *
 * This program is free software; you can redistribute it and/or
 * modify it under the terms of the GNU General Public License
 * as published by the Free Software Foundation; either version
 * 2 of the License, or (at your option) any later version.
 */
#include <stdarg.h>

extern int strlen(const char *s);
extern void boot(int a1, int a2, void *prom);

int (*prom)();

void *chosen_handle;
void *stdin;
void *stdout;
void *stderr;

void exit(void);
void *finddevice(const char *name);
int getprop(void *phandle, const char *name, void *buf, int buflen);
void printk(char *fmt, ...);

void
start(int a1, int a2, void *promptr)
{
    prom = (int (*)()) promptr;
    chosen_handle = finddevice("/chosen");
    if (chosen_handle == (void *) -1)
	exit();
    if (getprop(chosen_handle, "stdout", &stdout, sizeof(stdout)) != 4)
	exit();
    stderr = stdout;
    if (getprop(chosen_handle, "stdin", &stdin, sizeof(stdin)) != 4)
	exit();

    boot(a1, a2, promptr);
    for (;;)
	exit();
}

int
write(void *handle, void *ptr, int nb)
{
    struct prom_args {
	char *service;
	int nargs;
	int nret;
	void *ihandle;
	void *addr;
	int len;
	int actual;
    } args;

    args.service = "write";
    args.nargs = 3;
    args.nret = 1;
    args.ihandle = handle;
    args.addr = ptr;
    args.len = nb;
    args.actual = -1;
    (*prom)(&args);
    return args.actual;
}

int writestring(void *f, char *ptr, int nb)
{
	int w = 0, i;
	char *ret = "\r";

	for (i = 0; i < nb; ++i) {
		if (ptr[i] == '\n') {
			if (i > w) {
				write(f, ptr + w, i - w);
				w = i;
			}
			write(f, ret, 1);
		}
	}
	if (w < nb)
		write(f, ptr + w, nb - w);
	return nb;
}

int
read(void *handle, void *ptr, int nb)
{
    struct prom_args {
	char *service;
	int nargs;
	int nret;
	void *ihandle;
	void *addr;
	int len;
	int actual;
    } args;

    args.service = "read";
    args.nargs = 3;
    args.nret = 1;
    args.ihandle = handle;
    args.addr = ptr;
    args.len = nb;
    args.actual = -1;
    (*prom)(&args);
    return args.actual;
}

void
exit(void)
{
    struct prom_args {
	char *service;
    } args;

    for (;;) {
	args.service = "exit";
	(*prom)(&args);
    }
}

void
pause(void)
{
    struct prom_args {
	char *service;
    } args;

    args.service = "enter";
    (*prom)(&args);
}

void *
finddevice(const char *name)
{
    struct prom_args {
	char *service;
	int nargs;
	int nret;
	const char *devspec;
	void *phandle;
    } args;

    args.service = "finddevice";
    args.nargs = 1;
    args.nret = 1;
    args.devspec = name;
    args.phandle = (void *) -1;
    (*prom)(&args);
    return args.phandle;
}

void *
claim(unsigned int virt, unsigned int size, unsigned int align)
{
    struct prom_args {
	char *service;
	int nargs;
	int nret;
	unsigned int virt;
	unsigned int size;
	unsigned int align;
	void *ret;
    } args;

    args.service = "claim";
    args.nargs = 3;
    args.nret = 1;
    args.virt = virt;
    args.size = size;
    args.align = align;
    (*prom)(&args);
    return args.ret;
}

void
release(void *virt, unsigned int size)
{
    struct prom_args {
	char *service;
	int nargs;
	int nret;
	void *virt;
	unsigned int size;
    } args;

    args.service = "release";
    args.nargs = 2;
    args.nret = 0;
    args.virt = virt;
    args.size = size;
    (*prom)(&args);
}

int
getprop(void *phandle, const char *name, void *buf, int buflen)
{
    struct prom_args {
	char *service;
	int nargs;
	int nret;
	void *phandle;
	const char *name;
	void *buf;
	int buflen;
	int size;
    } args;

    args.service = "getprop";
    args.nargs = 4;
    args.nret = 1;
    args.phandle = phandle;
    args.name = name;
    args.buf = buf;
    args.buflen = buflen;
    args.size = -1;
    (*prom)(&args);
    return args.size;
}

int
putc(int c, void *f)
{
    char ch = c;

    return writestring(f, &ch, 1) == 1? c: -1;
}

int
putchar(int c)
{
    return putc(c, stdout);
}

int
fputs(char *str, void *f)
{
    int n = strlen(str);

    return writestring(f, str, n) == n? 0: -1;
}

int
readchar(void)
{
    char ch;

    for (;;) {
	switch (read(stdin, &ch, 1)) {
	case 1:
	    return ch;
	case -1:
	    printk("read(stdin) returned -1\n");
	    return -1;
	}
    }
}

static char line[256];
static char *lineptr;
static int lineleft;

int
getchar(void)
{
    int c;

    if (lineleft == 0) {
	lineptr = line;
	for (;;) {
	    c = readchar();
	    if (c == -1 || c == 4)
		break;
	    if (c == '\r' || c == '\n') {
		*lineptr++ = '\n';
		putchar('\n');
		break;
	    }
	    switch (c) {
	    case 0177:
	    case '\b':
		if (lineptr > line) {
		    putchar('\b');
		    putchar(' ');
		    putchar('\b');
		    --lineptr;
		}
		break;
	    case 'U' & 0x1F:
		while (lineptr > line) {
		    putchar('\b');
		    putchar(' ');
		    putchar('\b');
		    --lineptr;
		}
		break;
	    default:
		if (lineptr >= &line[sizeof(line) - 1])
		    putchar('\a');
		else {
		    putchar(c);
		    *lineptr++ = c;
		}
	    }
	}
	lineleft = lineptr - line;
	lineptr = line;
    }
    if (lineleft == 0)
	return -1;
    --lineleft;
    return *lineptr++;
}

extern int vsprintf(char *buf, const char *fmt, va_list args);
static char sprint_buf[1024];

void
printk(char *fmt, ...)
{
	va_list args;
	int n;

	va_start(args, fmt);
	n = vsprintf(sprint_buf, fmt, args);
	va_end(args);
	writestring(stdout, sprint_buf, n);
}

int
printf(char *fmt, ...)
{
	va_list args;
	int n;

	va_start(args, fmt);
	n = vsprintf(sprint_buf, fmt, args);
	va_end(args);
	writestring(stdout, sprint_buf, n);
	return n;
}
/*
 * BK Id: SCCS/s.iso_font.h 1.6 05/18/01 15:16:42 cort
 */
static const unsigned char font[] = {
/* 0x00 */ 0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
/* 0x01 */ 0x00,0x00,0x7E,0x81,0xA5,0x81,0x81,0xBD,0x99,0x81,0x81,0x7E,0x00,0x00,0x00,0x00,
/* 0x02 */ 0x00,0x00,0x7E,0xFF,0xDB,0xFF,0xFF,0xC3,0xC3,0xE7,0xFF,0x7E,0x00,0x00,0x00,0x00,
/* 0x03 */ 0x00,0x00,0x00,0x00,0x6C,0xFE,0xFE,0xFE,0xFE,0x7C,0x38,0x10,0x00,0x00,0x00,0x00,
/* 0x04 */ 0x00,0x00,0x00,0x00,0x10,0x38,0x7C,0xFE,0x7C,0x38,0x10,0x00,0x00,0x00,0x00,0x00,
/* 0x05 */ 0x00,0x00,0x00,0x18,0x3C,0x3C,0xE7,0xE7,0xE7,0x18,0x18,0x3C,0x00,0x00,0x00,0x00,
/* 0x06 */ 0x00,0x00,0x00,0x18,0x3C,0x7E,0xFF,0xFF,0x7E,0x18,0x18,0x3C,0x00,0x00,0x00,0x00,
/* 0x07 */ 0x00,0x00,0x00,0x00,0x00,0x00,0x18,0x3C,0x3C,0x18,0x00,0x00,0x00,0x00,0x00,0x00,
/* 0x08 */ 0xFF,0xFF,0xFF,0xFF,0xFF,0xFF,0xE7,0xC3,0xC3,0xE7,0xFF,0xFF,0xFF,0xFF,0xFF,0xFF,
/* 0x09 */ 0x00,0x00,0x00,0x00,0x00,0x3C,0x66,0x42,0x42,0x66,0x3C,0x00,0x00,0x00,0x00,0x00,
/* 0x0A */ 0xFF,0xFF,0xFF,0xFF,0xFF,0xC3,0x99,0xBD,0xBD,0x99,0xC3,0xFF,0xFF,0xFF,0xFF,0xFF,
/* 0x0B */ 0x00,0x00,0x3E,0x0E,0x1A,0x32,0x78,0xCC,0xCC,0xCC,0xCC,0x78,0x00,0x00,0x00,0x00,
/* 0x0C */ 0x00,0x00,0x3C,0x66,0x66,0x66,0x66,0x3C,0x18,0x7E,0x18,0x18,0x00,0x00,0x00,0x00,
/* 0x0D */ 0x00,0x00,0x30,0x38,0x3C,0x36,0x33,0x30,0x30,0x70,0xF0,0xE0,0x00,0x00,0x00,0x00,
/* 0x0E */ 0x00,0x00,0x7F,0x63,0x7F,0x63,0x63,0x63,0x63,0x67,0xE7,0xE6,0xC0,0x00,0x00,0x00,
/* 0x0F */ 0x00,0x00,0x00,0x18,0x18,0xDB,0x3C,0xE7,0x3C,0xDB,0x18,0x18,0x00,0x00,0x00,0x00,
/* 0x10 */ 0x00,0x80,0xC0,0xE0,0xF0,0xF8,0xFE,0xF8,0xF0,0xE0,0xC0,0x80,0x00,0x00,0x00,0x00,
/* 0x11 */ 0x00,0x02,0x06,0x0E,0x1E,0x3E,0xFE,0x3E,0x1E,0x0E,0x06,0x02,0x00,0x00,0x00,0x00,
/* 0x12 */ 0x00,0x00,0x18,0x3C,0x7E,0x18,0x18,0x18,0x7E,0x3C,0x18,0x00,0x00,0x00,0x00,0x00,
/* 0x13 */ 0x00,0x00,0x66,0x66,0x66,0x66,0x66,0x66,0x66,0x00,0x66,0x66,0x00,0x00,0x00,0x00,
/* 0x14 */ 0x00,0x00,0x7F,0xDB,0xDB,0xDB,0x7B,0x1B,0x1B,0x1B,0x1B,0x1B,0x00,0x00,0x00,0x00,
/* 0x15 */ 0x00,0x7C,0xC6,0x60,0x38,0x6C,0xC6,0xC6,0x6C,0x38,0x0C,0xC6,0x7C,0x00,0x00,0x00,
/* 0x16 */ 0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0xFE,0xFE,0xFE,0xFE,0x00,0x00,0x00,0x00,
/* 0x17 */ 0x00,0x00,0x18,0x3C,0x7E,0x18,0x18,0x18,0x7E,0x3C,0x18,0x7E,0x00,0x00,0x00,0x00,
/* 0x18 */ 0x00,0x00,0x18,0x3C,0x7E,0x18,0x18,0x18,0x18,0x18,0x18,0x18,0x00,0x00,0x00,0x00,
/* 0x19 */ 0x00,0x00,0x18,0x18,0x18,0x18,0x18,0x18,0x18,0x7E,0x3C,0x18,0x00,0x00,0x00,0x00,
/* 0x1A */ 0x00,0x00,0x00,0x00,0x00,0x18,0x0C,0xFE,0x0C,0x18,0x00,0x00,0x00,0x00,0x00,0x00,
/* 0x1B */ 0x00,0x00,0x00,0x00,0x00,0x30,0x60,0xFE,0x60,0x30,0x00,0x00,0x00,0x00,0x00,0x00,
/* 0x1C */ 0x00,0x00,0x00,0x00,0x00,0x00,0xC0,0xC0,0xC0,0xFE,0x00,0x00,0x00,0x00,0x00,0x00,
/* 0x1D */ 0x00,0x00,0x00,0x00,0x00,0x28,0x6C,0xFE,0x6C,0x28,0x00,0x00,0x00,0x00,0x00,0x00,
/* 0x1E */ 0x00,0x00,0x00,0x00,0x10,0x38,0x38,0x7C,0x7C,0xFE,0xFE,0x00,0x00,0x00,0x00,0x00,
/* 0x1F */ 0x00,0x00,0x00,0x00,0xFE,0xFE,0x7C,0x7C,0x38,0x38,0x10,0x00,0x00,0x00,0x00,0x00,
/* 0x20 */ 0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
/* 0x21 */ 0x00,0x00,0x18,0x3C,0x3C,0x3C,0x18,0x18,0x18,0x00,0x18,0x18,0x00,0x00,0x00,0x00,
/* 0x22 */ 0x00,0x66,0x66,0x66,0x24,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
/* 0x23 */ 0x00,0x00,0x00,0x6C,0x6C,0xFE,0x6C,0x6C,0x6C,0xFE,0x6C,0x6C,0x00,0x00,0x00,0x00,
/* 0x24 */ 0x18,0x18,0x7C,0xC6,0xC2,0xC0,0x7C,0x06,0x06,0x86,0xC6,0x7C,0x18,0x18,0x00,0x00,
/* 0x25 */ 0x00,0x00,0x00,0x00,0xC2,0xC6,0x0C,0x18,0x30,0x60,0xC6,0x86,0x00,0x00,0x00,0x00,
/* 0x26 */ 0x00,0x00,0x38,0x6C,0x6C,0x38,0x76,0xDC,0xCC,0xCC,0xCC,0x76,0x00,0x00,0x00,0x00,
/* 0x27 */ 0x00,0x30,0x30,0x30,0x60,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
/* 0x28 */ 0x00,0x00,0x0C,0x18,0x30,0x30,0x30,0x30,0x30,0x30,0x18,0x0C,0x00,0x00,0x00,0x00,
/* 0x29 */ 0x00,0x00,0x30,0x18,0x0C,0x0C,0x0C,0x0C,0x0C,0x0C,0x18,0x30,0x00,0x00,0x00,0x00,
/* 0x2A */ 0x00,0x00,0x00,0x00,0x00,0x66,0x3C,0xFF,0x3C,0x66,0x00,0x00,0x00,0x00,0x00,0x00,
/* 0x2B */ 0x00,0x00,0x00,0x00,0x00,0x18,0x18,0x7E,0x18,0x18,0x00,0x00,0x00,0x00,0x00,0x00,
/* 0x2C */ 0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x18,0x18,0x18,0x30,0x00,0x00,0x00,
/* 0x2D */ 0x00,0x00,0x00,0x00,0x00,0x00,0x00,0xFE,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
/* 0x2E */ 0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x18,0x18,0x00,0x00,0x00,0x00,
/* 0x2F */ 0x00,0x00,0x00,0x00,0x02,0x06,0x0C,0x18,0x30,0x60,0xC0,0x80,0x00,0x00,0x00,0x00,
/* 0x30 */ 0x00,0x00,0x38,0x6C,0xC6,0xC6,0xD6,0xD6,0xC6,0xC6,0x6C,0x38,0x00,0x00,0x00,0x00,
/* 0x31 */ 0x00,0x00,0x18,0x38,0x78,0x18,0x18,0x18,0x18,0x18,0x18,0x7E,0x00,0x00,0x00,0x00,
/* 0x32 */ 0x00,0x00,0x7C,0xC6,0x06,0x0C,0x18,0x30,0x60,0xC0,0xC6,0xFE,0x00,0x00,0x00,0x00,
/* 0x33 */ 0x00,0x00,0x7C,0xC6,0x06,0x06,0x3C,0x06,0x06,0x06,0xC6,0x7C,0x00,0x00,0x00,0x00,
/* 0x34 */ 0x00,0x00,0x0C,0x1C,0x3C,0x6C,0xCC,0xFE,0x0C,0x0C,0x0C,0x1E,0x00,0x00,0x00,0x00,
/* 0x35 */ 0x00,0x00,0xFE,0xC0,0xC0,0xC0,0xFC,0x06,0x06,0x06,0xC6,0x7C,0x00,0x00,0x00,0x00,
/* 0x36 */ 0x00,0x00,0x38,0x60,0xC0,0xC0,0xFC,0xC6,0xC6,0xC6,0xC6,0x7C,0x00,0x00,0x00,0x00,
/* 0x37 */ 0x00,0x00,0xFE,0xC6,0x06,0x06,0x0C,0x18,0x30,0x30,0x30,0x30,0x00,0x00,0x00,0x00,
/* 0x38 */ 0x00,0x00,0x7C,0xC6,0xC6,0xC6,0x7C,0xC6,0xC6,0xC6,0xC6,0x7C,0x00,0x00,0x00,0x00,
/* 0x39 */ 0x00,0x00,0x7C,0xC6,0xC6,0xC6,0x7E,0x06,0x06,0x06,0x0C,0x78,0x00,0x00,0x00,0x00,
/* 0x3A */ 0x00,0x00,0x00,0x00,0x18,0x18,0x00,0x00,0x00,0x18,0x18,0x00,0x00,0x00,0x00,0x00,
/* 0x3B */ 0x00,0x00,0x00,0x00,0x18,0x18,0x00,0x00,0x00,0x18,0x18,0x30,0x00,0x00,0x00,0x00,
/* 0x3C */ 0x00,0x00,0x00,0x06,0x0C,0x18,0x30,0x60,0x30,0x18,0x0C,0x06,0x00,0x00,0x00,0x00,
/* 0x3D */ 0x00,0x00,0x00,0x00,0x00,0x7E,0x00,0x00,0x7E,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
/* 0x3E */ 0x00,0x00,0x00,0x60,0x30,0x18,0x0C,0x06,0x0C,0x18,0x30,0x60,0x00,0x00,0x00,0x00,
/* 0x3F */ 0x00,0x00,0x7C,0xC6,0xC6,0x0C,0x18,0x18,0x18,0x00,0x18,0x18,0x00,0x00,0x00,0x00,
/* 0x40 */ 0x00,0x00,0x00,0x7C,0xC6,0xC6,0xDE,0xDE,0xDE,0xDC,0xC0,0x7C,0x00,0x00,0x00,0x00,
/* 0x41 */ 0x00,0x00,0x10,0x38,0x6C,0xC6,0xC6,0xFE,0xC6,0xC6,0xC6,0xC6,0x00,0x00,0x00,0x00,
/* 0x42 */ 0x00,0x00,0xFC,0x66,0x66,0x66,0x7C,0x66,0x66,0x66,0x66,0xFC,0x00,0x00,0x00,0x00,
/* 0x43 */ 0x00,0x00,0x3C,0x66,0xC2,0xC0,0xC0,0xC0,0xC0,0xC2,0x66,0x3C,0x00,0x00,0x00,0x00,
/* 0x44 */ 0x00,0x00,0xF8,0x6C,0x66,0x66,0x66,0x66,0x66,0x66,0x6C,0xF8,0x00,0x00,0x00,0x00,
/* 0x45 */ 0x00,0x00,0xFE,0x66,0x62,0x68,0x78,0x68,0x60,0x62,0x66,0xFE,0x00,0x00,0x00,0x00,
/* 0x46 */ 0x00,0x00,0xFE,0x66,0x62,0x68,0x78,0x68,0x60,0x60,0x60,0xF0,0x00,0x00,0x00,0x00,
/* 0x47 */ 0x00,0x00,0x3C,0x66,0xC2,0xC0,0xC0,0xDE,0xC6,0xC6,0x66,0x3A,0x00,0x00,0x00,0x00,
/* 0x48 */ 0x00,0x00,0xC6,0xC6,0xC6,0xC6,0xFE,0xC6,0xC6,0xC6,0xC6,0xC6,0x00,0x00,0x00,0x00,
/* 0x49 */ 0x00,0x00,0x3C,0x18,0x18,0x18,0x18,0x18,0x18,0x18,0x18,0x3C,0x00,0x00,0x00,0x00,
/* 0x4A */ 0x00,0x00,0x1E,0x0C,0x0C,0x0C,0x0C,0x0C,0xCC,0xCC,0xCC,0x78,0x00,0x00,0x00,0x00,
/* 0x4B */ 0x00,0x00,0xE6,0x66,0x66,0x6C,0x78,0x78,0x6C,0x66,0x66,0xE6,0x00,0x00,0x00,0x00,
/* 0x4C */ 0x00,0x00,0xF0,0x60,0x60,0x60,0x60,0x60,0x60,0x62,0x66,0xFE,0x00,0x00,0x00,0x00,
/* 0x4D */ 0x00,0x00,0xC6,0xEE,0xFE,0xFE,0xD6,0xC6,0xC6,0xC6,0xC6,0xC6,0x00,0x00,0x00,0x00,
/* 0x4E */ 0x00,0x00,0xC6,0xE6,0xF6,0xFE,0xDE,0xCE,0xC6,0xC6,0xC6,0xC6,0x00,0x00,0x00,0x00,
/* 0x4F */ 0x00,0x00,0x7C,0xC6,0xC6,0xC6,0xC6,0xC6,0xC6,0xC6,0xC6,0x7C,0x00,0x00,0x00,0x00,
/* 0x50 */ 0x00,0x00,0xFC,0x66,0x66,0x66,0x7C,0x60,0x60,0x60,0x60,0xF0,0x00,0x00,0x00,0x00,
/* 0x51 */ 0x00,0x00,0x7C,0xC6,0xC6,0xC6,0xC6,0xC6,0xC6,0xD6,0xDE,0x7C,0x0C,0x0E,0x00,0x00,
/* 0x52 */ 0x00,0x00,0xFC,0x66,0x66,0x66,0x7C,0x6C,0x66,0x66,0x66,0xE6,0x00,0x00,0x00,0x00,
/* 0x53 */ 0x00,0x00,0x7C,0xC6,0xC6,0x60,0x38,0x0C,0x06,0xC6,0xC6,0x7C,0x00,0x00,0x00,0x00,
/* 0x54 */ 0x00,0x00,0x7E,0x7E,0x5A,0x18,0x18,0x18,0x18,0x18,0x18,0x3C,0x00,0x00,0x00,0x00,
/* 0x55 */ 0x00,0x00,0xC6,0xC6,0xC6,0xC6,0xC6,0xC6,0xC6,0xC6,0xC6,0x7C,0x00,0x00,0x00,0x00,
/* 0x56 */ 0x00,0x00,0xC6,0xC6,0xC6,0xC6,0xC6,0xC6,0xC6,0x6C,0x38,0x10,0x00,0x00,0x00,0x00,
/* 0x57 */ 0x00,0x00,0xC6,0xC6,0xC6,0xC6,0xD6,0xD6,0xD6,0xFE,0xEE,0x6C,0x00,0x00,0x00,0x00,
/* 0x58 */ 0x00,0x00,0xC6,0xC6,0x6C,0x7C,0x38,0x38,0x7C,0x6C,0xC6,0xC6,0x00,0x00,0x00,0x00,
/* 0x59 */ 0x00,0x00,0x66,0x66,0x66,0x66,0x3C,0x18,0x18,0x18,0x18,0x3C,0x00,0x00,0x00,0x00,
/* 0x5A */ 0x00,0x00,0xFE,0xC6,0x86,0x0C,0x18,0x30,0x60,0xC2,0xC6,0xFE,0x00,0x00,0x00,0x00,
/* 0x5B */ 0x00,0x00,0x3C,0x30,0x30,0x30,0x30,0x30,0x30,0x30,0x30,0x3C,0x00,0x00,0x00,0x00,
/* 0x5C */ 0x00,0x00,0x00,0x80,0xC0,0xE0,0x70,0x38,0x1C,0x0E,0x06,0x02,0x00,0x00,0x00,0x00,
/* 0x5D */ 0x00,0x00,0x3C,0x0C,0x0C,0x0C,0x0C,0x0C,0x0C,0x0C,0x0C,0x3C,0x00,0x00,0x00,0x00,
/* 0x5E */ 0x10,0x38,0x6C,0xC6,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
/* 0x5F */ 0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0xFF,0x00,0x00,
/* 0x60 */ 0x30,0x30,0x18,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
/* 0x61 */ 0x00,0x00,0x00,0x00,0x00,0x78,0x0C,0x7C,0xCC,0xCC,0xCC,0x76,0x00,0x00,0x00,0x00,
/* 0x62 */ 0x00,0x00,0xE0,0x60,0x60,0x78,0x6C,0x66,0x66,0x66,0x66,0x7C,0x00,0x00,0x00,0x00,
/* 0x63 */ 0x00,0x00,0x00,0x00,0x00,0x7C,0xC6,0xC0,0xC0,0xC0,0xC6,0x7C,0x00,0x00,0x00,0x00,
/* 0x64 */ 0x00,0x00,0x1C,0x0C,0x0C,0x3C,0x6C,0xCC,0xCC,0xCC,0xCC,0x76,0x00,0x00,0x00,0x00,
/* 0x65 */ 0x00,0x00,0x00,0x00,0x00,0x7C,0xC6,0xFE,0xC0,0xC0,0xC6,0x7C,0x00,0x00,0x00,0x00,
/* 0x66 */ 0x00,0x00,0x38,0x6C,0x64,0x60,0xF0,0x60,0x60,0x60,0x60,0xF0,0x00,0x00,0x00,0x00,
/* 0x67 */ 0x00,0x00,0x00,0x00,0x00,0x3E,0x66,0x66,0x66,0x66,0x66,0x3E,0x06,0x66,0x3C,0x00,
/* 0x68 */ 0x00,0x00,0xE0,0x60,0x60,0x6C,0x76,0x66,0x66,0x66,0x66,0xE6,0x00,0x00,0x00,0x00,
/* 0x69 */ 0x00,0x00,0x18,0x18,0x00,0x38,0x18,0x18,0x18,0x18,0x18,0x3C,0x00,0x00,0x00,0x00,
/* 0x6A */ 0x00,0x00,0x06,0x06,0x00,0x0E,0x06,0x06,0x06,0x06,0x06,0x06,0x66,0x66,0x3C,0x00,
/* 0x6B */ 0x00,0x00,0xE0,0x60,0x60,0x66,0x6C,0x78,0x78,0x6C,0x66,0xE6,0x00,0x00,0x00,0x00,
/* 0x6C */ 0x00,0x00,0x38,0x18,0x18,0x18,0x18,0x18,0x18,0x18,0x18,0x3C,0x00,0x00,0x00,0x00,
/* 0x6D */ 0x00,0x00,0x00,0x00,0x00,0x6C,0xFE,0xD6,0xD6,0xD6,0xC6,0xC6,0x00,0x00,0x00,0x00,
/* 0x6E */ 0x00,0x00,0x00,0x00,0x00,0xDC,0x66,0x66,0x66,0x66,0x66,0x66,0x00,0x00,0x00,0x00,
/* 0x6F */ 0x00,0x00,0x00,0x00,0x00,0x7C,0xC6,0xC6,0xC6,0xC6,0xC6,0x7C,0x00,0x00,0x00,0x00,
/* 0x70 */ 0x00,0x00,0x00,0x00,0x00,0xFC,0x66,0x66,0x66,0x66,0x66,0x7C,0x60,0x60,0xF0,0x00,
/* 0x71 */ 0x00,0x00,0x00,0x00,0x00,0x7E,0xCC,0xCC,0xCC,0xCC,0xCC,0x7C,0x0C,0x0C,0x1E,0x00,
/* 0x72 */ 0x00,0x00,0x00,0x00,0x00,0xDC,0x76,0x66,0x60,0x60,0x60,0xF0,0x00,0x00,0x00,0x00,
/* 0x73 */ 0x00,0x00,0x00,0x00,0x00,0x7C,0xC6,0x60,0x38,0x0C,0xC6,0x7C,0x00,0x00,0x00,0x00,
/* 0x74 */ 0x00,0x00,0x10,0x30,0x30,0xFC,0x30,0x30,0x30,0x30,0x36,0x1C,0x00,0x00,0x00,0x00,
/* 0x75 */ 0x00,0x00,0x00,0x00,0x00,0xCC,0xCC,0xCC,0xCC,0xCC,0xCC,0x76,0x00,0x00,0x00,0x00,
/* 0x76 */ 0x00,0x00,0x00,0x00,0x00,0x66,0x66,0x66,0x66,0x66,0x3C,0x18,0x00,0x00,0x00,0x00,
/* 0x77 */ 0x00,0x00,0x00,0x00,0x00,0xC6,0xC6,0xD6,0xD6,0xD6,0xFE,0x6C,0x00,0x00,0x00,0x00,
/* 0x78 */ 0x00,0x00,0x00,0x00,0x00,0xC6,0x6C,0x38,0x38,0x38,0x6C,0xC6,0x00,0x00,0x00,0x00,
/* 0x79 */ 0x00,0x00,0x00,0x00,0x00,0xC6,0xC6,0xC6,0xC6,0xC6,0xC6,0x7E,0x06,0x0C,0xF8,0x00,
/* 0x7A */ 0x00,0x00,0x00,0x00,0x00,0xFE,0xCC,0x18,0x30,0x60,0xC6,0xFE,0x00,0x00,0x00,0x00,
/* 0x7B */ 0x00,0x00,0x0E,0x18,0x18,0x18,0x70,0x18,0x18,0x18,0x18,0x0E,0x00,0x00,0x00,0x00,
/* 0x7C */ 0x00,0x00,0x18,0x18,0x18,0x18,0x00,0x18,0x18,0x18,0x18,0x18,0x00,0x00,0x00,0x00,
/* 0x7D */ 0x00,0x00,0x70,0x18,0x18,0x18,0x0E,0x18,0x18,0x18,0x18,0x70,0x00,0x00,0x00,0x00,
/* 0x7E */ 0x00,0x00,0x76,0xDC,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
/* 0x7F */ 0x00,0x00,0x00,0x00,0x10,0x38,0x6C,0xC6,0xC6,0xC6,0xFE,0x00,0x00,0x00,0x00,0x00,
/* 0x80 */ 0x00,0x00,0x3C,0x66,0xC2,0xC0,0xC0,0xC0,0xC2,0x66,0x3C,0x0C,0x06,0x7C,0x00,0x00,
/* 0x81 */ 0x00,0x00,0xCC,0x00,0x00,0xCC,0xCC,0xCC,0xCC,0xCC,0xCC,0x76,0x00,0x00,0x00,0x00,
/* 0x82 */ 0x00,0x0C,0x18,0x30,0x00,0x7C,0xC6,0xC6,0xFE,0xC0,0xC6,0x7C,0x00,0x00,0x00,0x00,
/* 0x83 */ 0x00,0x10,0x38,0x6C,0x00,0x78,0x0C,0x7C,0xCC,0xCC,0xCC,0x76,0x00,0x00,0x00,0x00,
/* 0x84 */ 0x00,0x00,0xCC,0x00,0x00,0x78,0x0C,0x7C,0xCC,0xCC,0xCC,0x76,0x00,0x00,0x00,0x00,
/* 0x85 */ 0x00,0x60,0x30,0x18,0x00,0x78,0x0C,0x7C,0xCC,0xCC,0xCC,0x76,0x00,0x00,0x00,0x00,
/* 0x86 */ 0x00,0x38,0x6C,0x38,0x00,0x78,0x0C,0x7C,0xCC,0xCC,0xCC,0x76,0x00,0x00,0x00,0x00,
/* 0x87 */ 0x00,0x00,0x00,0x00,0x3C,0x66,0x60,0x60,0x66,0x3C,0x0C,0x06,0x3C,0x00,0x00,0x00,
/* 0x88 */ 0x00,0x10,0x38,0x6C,0x00,0x7C,0xC6,0xC6,0xFE,0xC0,0xC6,0x7C,0x00,0x00,0x00,0x00,
/* 0x89 */ 0x00,0x00,0xC6,0x00,0x00,0x7C,0xC6,0xC6,0xFE,0xC0,0xC6,0x7C,0x00,0x00,0x00,0x00,
/* 0x8A */ 0x00,0x60,0x30,0x18,0x00,0x7C,0xC6,0xC6,0xFE,0xC0,0xC6,0x7C,0x00,0x00,0x00,0x00,
/* 0x8B */ 0x00,0x00,0x66,0x00,0x00,0x38,0x18,0x18,0x18,0x18,0x18,0x3C,0x00,0x00,0x00,0x00,
/* 0x8C */ 0x00,0x18,0x3C,0x66,0x00,0x38,0x18,0x18,0x18,0x18,0x18,0x3C,0x00,0x00,0x00,0x00,
/* 0x8D */ 0x00,0x60,0x30,0x18,0x00,0x38,0x18,0x18,0x18,0x18,0x18,0x3C,0x00,0x00,0x00,0x00,
/* 0x8E */ 0x00,0xC6,0x00,0x10,0x38,0x6C,0xC6,0xC6,0xFE,0xC6,0xC6,0xC6,0x00,0x00,0x00,0x00,
/* 0x8F */ 0x38,0x6C,0x38,0x00,0x38,0x6C,0xC6,0xC6,0xFE,0xC6,0xC6,0xC6,0x00,0x00,0x00,0x00,
/* 0x90 */ 0x18,0x30,0x60,0x00,0xFE,0x66,0x60,0x7C,0x60,0x60,0x66,0xFE,0x00,0x00,0x00,0x00,
/* 0x91 */ 0x00,0x00,0x00,0x00,0x00,0xCC,0x76,0x36,0x7E,0xD8,0xD8,0x6E,0x00,0x00,0x00,0x00,
/* 0x92 */ 0x00,0x00,0x3E,0x6C,0xCC,0xCC,0xFE,0xCC,0xCC,0xCC,0xCC,0xCE,0x00,0x00,0x00,0x00,
/* 0x93 */ 0x00,0x10,0x38,0x6C,0x00,0x7C,0xC6,0xC6,0xC6,0xC6,0xC6,0x7C,0x00,0x00,0x00,0x00,
/* 0x94 */ 0x00,0x00,0xC6,0x00,0x00,0x7C,0xC6,0xC6,0xC6,0xC6,0xC6,0x7C,0x00,0x00,0x00,0x00,
/* 0x95 */ 0x00,0x60,0x30,0x18,0x00,0x7C,0xC6,0xC6,0xC6,0xC6,0xC6,0x7C,0x00,0x00,0x00,0x00,
/* 0x96 */ 0x00,0x30,0x78,0xCC,0x00,0xCC,0xCC,0xCC,0xCC,0xCC,0xCC,0x76,0x00,0x00,0x00,0x00,
/* 0x97 */ 0x00,0x60,0x30,0x18,0x00,0xCC,0xCC,0xCC,0xCC,0xCC,0xCC,0x76,0x00,0x00,0x00,0x00,
/* 0x98 */ 0x00,0x00,0xC6,0x00,0x00,0xC6,0xC6,0xC6,0xC6,0xC6,0xC6,0x7E,0x06,0x0C,0x78,0x00,
/* 0x99 */ 0x00,0xC6,0x00,0x7C,0xC6,0xC6,0xC6,0xC6,0xC6,0xC6,0xC6,0x7C,0x00,0x00,0x00,0x00,
/* 0x9A */ 0x00,0xC6,0x00,0xC6,0xC6,0xC6,0xC6,0xC6,0xC6,0xC6,0xC6,0x7C,0x00,0x00,0x00,0x00,
/* 0x9B */ 0x00,0x18,0x18,0x3C,0x66,0x60,0x60,0x60,0x66,0x3C,0x18,0x18,0x00,0x00,0x00,0x00,
/* 0x9C */ 0x00,0x38,0x6C,0x64,0x60,0xF8,0x60,0x60,0x60,0x60,0xE6,0xFC,0x00,0x00,0x00,0x00,
/* 0x9D */ 0x00,0x00,0x66,0x66,0x3C,0x18,0x7E,0x18,0x7E,0x18,0x18,0x18,0x00,0x00,0x00,0x00,
/* 0x9E */ 0x00,0xF8,0xCC,0xCC,0xF8,0xC4,0xCC,0xDE,0xCC,0xCC,0xCC,0xC6,0x00,0x00,0x00,0x00,
/* 0x9F */ 0x00,0x0E,0x1B,0x18,0x18,0x18,0x7E,0x18,0x18,0x18,0x18,0x18,0xD8,0x70,0x00,0x00,
/* 0xA0 */ 0x00,0x18,0x30,0x60,0x00,0x78,0x0C,0x7C,0xCC,0xCC,0xCC,0x76,0x00,0x00,0x00,0x00,
/* 0xA1 */ 0x00,0x0C,0x18,0x30,0x00,0x38,0x18,0x18,0x18,0x18,0x18,0x3C,0x00,0x00,0x00,0x00,
/* 0xA2 */ 0x00,0x18,0x30,0x60,0x00,0x7C,0xC6,0xC6,0xC6,0xC6,0xC6,0x7C,0x00,0x00,0x00,0x00,
/* 0xA3 */ 0x00,0x18,0x30,0x60,0x00,0xCC,0xCC,0xCC,0xCC,0xCC,0xCC,0x76,0x00,0x00,0x00,0x00,
/* 0xA4 */ 0x00,0x00,0x76,0xDC,0x00,0xDC,0x66,0x66,0x66,0x66,0x66,0x66,0x00,0x00,0x00,0x00,
/* 0xA5 */ 0x76,0xDC,0x00,0xC6,0xE6,0xF6,0xFE,0xDE,0xCE,0xC6,0xC6,0xC6,0x00,0x00,0x00,0x00,
/* 0xA6 */ 0x00,0x3C,0x6C,0x6C,0x3E,0x00,0x7E,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
/* 0xA7 */ 0x00,0x38,0x6C,0x6C,0x38,0x00,0x7C,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
/* 0xA8 */ 0x00,0x00,0x30,0x30,0x00,0x30,0x30,0x60,0xC0,0xC6,0xC6,0x7C,0x00,0x00,0x00,0x00,
/* 0xA9 */ 0x00,0x00,0x00,0x00,0x00,0x00,0xFE,0xC0,0xC0,0xC0,0xC0,0x00,0x00,0x00,0x00,0x00,
/* 0xAA */ 0x00,0x00,0x00,0x00,0x00,0x00,0xFE,0x06,0x06,0x06,0x06,0x00,0x00,0x00,0x00,0x00,
/* 0xAB */ 0x00,0xC0,0xC0,0xC2,0xC6,0xCC,0x18,0x30,0x60,0xDC,0x86,0x0C,0x18,0x3E,0x00,0x00,
/* 0xAC */ 0x00,0xC0,0xC0,0xC2,0xC6,0xCC,0x18,0x30,0x66,0xCE,0x9E,0x3E,0x06,0x06,0x00,0x00,
/* 0xAD */ 0x00,0x00,0x18,0x18,0x00,0x18,0x18,0x18,0x3C,0x3C,0x3C,0x18,0x00,0x00,0x00,0x00,
/* 0xAE */ 0x00,0x00,0x00,0x00,0x00,0x36,0x6C,0xD8,0x6C,0x36,0x00,0x00,0x00,0x00,0x00,0x00,
/* 0xAF */ 0x00,0x00,0x00,0x00,0x00,0xD8,0x6C,0x36,0x6C,0xD8,0x00,0x00,0x00,0x00,0x00,0x00,
/* 0xB0 */ 0x11,0x44,0x11,0x44,0x11,0x44,0x11,0x44,0x11,0x44,0x11,0x44,0x11,0x44,0x11,0x44,
/* 0xB1 */ 0x55,0xAA,0x55,0xAA,0x55,0xAA,0x55,0xAA,0x55,0xAA,0x55,0xAA,0x55,0xAA,0x55,0xAA,
/* 0xB2 */ 0xDD,0x77,0xDD,0x77,0xDD,0x77,0xDD,0x77,0xDD,0x77,0xDD,0x77,0xDD,0x77,0xDD,0x77,
/* 0xB3 */ 0x18,0x18,0x18,0x18,0x18,0x18,0x18,0x18,0x18,0x18,0x18,0x18,0x18,0x18,0x18,0x18,
/* 0xB4 */ 0x18,0x18,0x18,0x18,0x18,0x18,0x18,0xF8,0x18,0x18,0x18,0x18,0x18,0x18,0x18,0x18,
/* 0xB5 */ 0x18,0x18,0x18,0x18,0x18,0xF8,0x18,0xF8,0x18,0x18,0x18,0x18,0x18,0x18,0x18,0x18,
/* 0xB6 */ 0x36,0x36,0x36,0x36,0x36,0x36,0x36,0xF6,0x36,0x36,0x36,0x36,0x36,0x36,0x36,0x36,
/* 0xB7 */ 0x00,0x00,0x00,0x00,0x00,0x00,0x00,0xFE,0x36,0x36,0x36,0x36,0x36,0x36,0x36,0x36,
/* 0xB8 */ 0x00,0x00,0x00,0x00,0x00,0xF8,0x18,0xF8,0x18,0x18,0x18,0x18,0x18,0x18,0x18,0x18,
/* 0xB9 */ 0x36,0x36,0x36,0x36,0x36,0xF6,0x06,0xF6,0x36,0x36,0x36,0x36,0x36,0x36,0x36,0x36,
/* 0xBA */ 0x36,0x36,0x36,0x36,0x36,0x36,0x36,0x36,0x36,0x36,0x36,0x36,0x36,0x36,0x36,0x36,
/* 0xBB */ 0x00,0x00,0x00,0x00,0x00,0xFE,0x06,0xF6,0x36,0x36,0x36,0x36,0x36,0x36,0x36,0x36,
/* 0xBC */ 0x36,0x36,0x36,0x36,0x36,0xF6,0x06,0xFE,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
/* 0xBD */ 0x36,0x36,0x36,0x36,0x36,0x36,0x36,0xFE,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
/* 0xBE */ 0x18,0x18,0x18,0x18,0x18,0xF8,0x18,0xF8,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
/* 0xBF */ 0x00,0x00,0x00,0x00,0x00,0x00,0x00,0xF8,0x18,0x18,0x18,0x18,0x18,0x18,0x18,0x18,
/* 0xC0 */ 0x18,0x18,0x18,0x18,0x18,0x18,0x18,0x1F,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
/* 0xC1 */ 0x18,0x18,0x18,0x18,0x18,0x18,0x18,0xFF,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
/* 0xC2 */ 0x00,0x00,0x00,0x00,0x00,0x00,0x00,0xFF,0x18,0x18,0x18,0x18,0x18,0x18,0x18,0x18,
/* 0xC3 */ 0x18,0x18,0x18,0x18,0x18,0x18,0x18,0x1F,0x18,0x18,0x18,0x18,0x18,0x18,0x18,0x18,
/* 0xC4 */ 0x00,0x00,0x00,0x00,0x00,0x00,0x00,0xFF,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
/* 0xC5 */ 0x18,0x18,0x18,0x18,0x18,0x18,0x18,0xFF,0x18,0x18,0x18,0x18,0x18,0x18,0x18,0x18,
/* 0xC6 */ 0x18,0x18,0x18,0x18,0x18,0x1F,0x18,0x1F,0x18,0x18,0x18,0x18,0x18,0x18,0x18,0x18,
/* 0xC7 */ 0x36,0x36,0x36,0x36,0x36,0x36,0x36,0x37,0x36,0x36,0x36,0x36,0x36,0x36,0x36,0x36,
/* 0xC8 */ 0x36,0x36,0x36,0x36,0x36,0x37,0x30,0x3F,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
/* 0xC9 */ 0x00,0x00,0x00,0x00,0x00,0x3F,0x30,0x37,0x36,0x36,0x36,0x36,0x36,0x36,0x36,0x36,
/* 0xCA */ 0x36,0x36,0x36,0x36,0x36,0xF7,0x00,0xFF,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
/* 0xCB */ 0x00,0x00,0x00,0x00,0x00,0xFF,0x00,0xF7,0x36,0x36,0x36,0x36,0x36,0x36,0x36,0x36,
/* 0xCC */ 0x36,0x36,0x36,0x36,0x36,0x37,0x30,0x37,0x36,0x36,0x36,0x36,0x36,0x36,0x36,0x36,
/* 0xCD */ 0x00,0x00,0x00,0x00,0x00,0xFF,0x00,0xFF,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
/* 0xCE */ 0x36,0x36,0x36,0x36,0x36,0xF7,0x00,0xF7,0x36,0x36,0x36,0x36,0x36,0x36,0x36,0x36,
/* 0xCF */ 0x18,0x18,0x18,0x18,0x18,0xFF,0x00,0xFF,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
/* 0xD0 */ 0x36,0x36,0x36,0x36,0x36,0x36,0x36,0xFF,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
/* 0xD1 */ 0x00,0x00,0x00,0x00,0x00,0xFF,0x00,0xFF,0x18,0x18,0x18,0x18,0x18,0x18,0x18,0x18,
/* 0xD2 */ 0x00,0x00,0x00,0x00,0x00,0x00,0x00,0xFF,0x36,0x36,0x36,0x36,0x36,0x36,0x36,0x36,
/* 0xD3 */ 0x36,0x36,0x36,0x36,0x36,0x36,0x36,0x3F,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
/* 0xD4 */ 0x18,0x18,0x18,0x18,0x18,0x1F,0x18,0x1F,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
/* 0xD5 */ 0x00,0x00,0x00,0x00,0x00,0x1F,0x18,0x1F,0x18,0x18,0x18,0x18,0x18,0x18,0x18,0x18,
/* 0xD6 */ 0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x3F,0x36,0x36,0x36,0x36,0x36,0x36,0x36,0x36,
/* 0xD7 */ 0x36,0x36,0x36,0x36,0x36,0x36,0x36,0xFF,0x36,0x36,0x36,0x36,0x36,0x36,0x36,0x36,
/* 0xD8 */ 0x18,0x18,0x18,0x18,0x18,0xFF,0x18,0xFF,0x18,0x18,0x18,0x18,0x18,0x18,0x18,0x18,
/* 0xD9 */ 0x18,0x18,0x18,0x18,0x18,0x18,0x18,0xF8,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
/* 0xDA */ 0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x1F,0x18,0x18,0x18,0x18,0x18,0x18,0x18,0x18,
/* 0xDB */ 0xFF,0xFF,0xFF,0xFF,0xFF,0xFF,0xFF,0xFF,0xFF,0xFF,0xFF,0xFF,0xFF,0xFF,0xFF,0xFF,
/* 0xDC */ 0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0xFF,0xFF,0xFF,0xFF,0xFF,0xFF,0xFF,0xFF,
/* 0xDD */ 0xF0,0xF0,0xF0,0xF0,0xF0,0xF0,0xF0,0xF0,0xF0,0xF0,0xF0,0xF0,0xF0,0xF0,0xF0,0xF0,
/* 0xDE */ 0x0F,0x0F,0x0F,0x0F,0x0F,0x0F,0x0F,0x0F,0x0F,0x0F,0x0F,0x0F,0x0F,0x0F,0x0F,0x0F,
/* 0xDF */ 0xFF,0xFF,0xFF,0xFF,0xFF,0xFF,0xFF,0xFF,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
/* 0xE0 */ 0x00,0x00,0x00,0x00,0x00,0x76,0xDC,0xD8,0xD8,0xD8,0xDC,0x76,0x00,0x00,0x00,0x00,
/* 0xE1 */ 0x00,0x00,0x7C,0xC6,0xC6,0xC6,0xFC,0xC6,0xC6,0xC6,0xC6,0xDC,0xC0,0xC0,0x00,0x00,
/* 0xE2 */ 0x00,0x00,0xFE,0xC6,0xC6,0xC0,0xC0,0xC0,0xC0,0xC0,0xC0,0xC0,0x00,0x00,0x00,0x00,
/* 0xE3 */ 0x00,0x00,0x00,0x00,0x00,0xFE,0x6C,0x6C,0x6C,0x6C,0x6C,0x6C,0x00,0x00,0x00,0x00,
/* 0xE4 */ 0x00,0x00,0xFE,0xC6,0x60,0x30,0x18,0x18,0x30,0x60,0xC6,0xFE,0x00,0x00,0x00,0x00,
/* 0xE5 */ 0x00,0x00,0x00,0x00,0x00,0x7E,0xD8,0xD8,0xD8,0xD8,0xD8,0x70,0x00,0x00,0x00,0x00,
/* 0xE6 */ 0x00,0x00,0x00,0x00,0x00,0x66,0x66,0x66,0x66,0x66,0x7C,0x60,0xC0,0x00,0x00,0x00,
/* 0xE7 */ 0x00,0x00,0x00,0x00,0x00,0x76,0xDC,0x18,0x18,0x18,0x18,0x18,0x00,0x00,0x00,0x00,
/* 0xE8 */ 0x00,0x00,0x7E,0x18,0x3C,0x66,0x66,0x66,0x66,0x3C,0x18,0x7E,0x00,0x00,0x00,0x00,
/* 0xE9 */ 0x00,0x00,0x38,0x6C,0xC6,0xC6,0xFE,0xC6,0xC6,0xC6,0x6C,0x38,0x00,0x00,0x00,0x00,
/* 0xEA */ 0x00,0x00,0x38,0x6C,0xC6,0xC6,0xC6,0x6C,0x6C,0x6C,0x6C,0xEE,0x00,0x00,0x00,0x00,
/* 0xEB */ 0x00,0x00,0x1E,0x30,0x18,0x0C,0x3E,0x66,0x66,0x66,0x66,0x3C,0x00,0x00,0x00,0x00,
/* 0xEC */ 0x00,0x00,0x00,0x00,0x00,0x7E,0xDB,0xDB,0xDB,0x7E,0x00,0x00,0x00,0x00,0x00,0x00,
/* 0xED */ 0x00,0x00,0x00,0x03,0x06,0x7E,0xDB,0xDB,0xF3,0x7E,0x60,0xC0,0x00,0x00,0x00,0x00,
/* 0xEE */ 0x00,0x00,0x1C,0x30,0x60,0x60,0x7C,0x60,0x60,0x60,0x30,0x1C,0x00,0x00,0x00,0x00,
/* 0xEF */ 0x00,0x00,0x7C,0xC6,0xC6,0xC6,0xC6,0xC6,0xC6,0xC6,0xC6,0xC6,0x00,0x00,0x00,0x00,
/* 0xF0 */ 0x00,0x00,0x00,0x00,0xFE,0x00,0x00,0xFE,0x00,0x00,0xFE,0x00,0x00,0x00,0x00,0x00,
/* 0xF1 */ 0x00,0x00,0x00,0x00,0x18,0x18,0x7E,0x18,0x18,0x00,0x00,0xFF,0x00,0x00,0x00,0x00,
/* 0xF2 */ 0x00,0x00,0x00,0x30,0x18,0x0C,0x06,0x0C,0x18,0x30,0x00,0x7E,0x00,0x00,0x00,0x00,
/* 0xF3 */ 0x00,0x00,0x00,0x0C,0x18,0x30,0x60,0x30,0x18,0x0C,0x00,0x7E,0x00,0x00,0x00,0x00,
/* 0xF4 */ 0x00,0x0E,0x1B,0x1B,0x18,0x18,0x18,0x18,0x18,0x18,0x18,0x18,0x18,0x18,0x18,0x18,
/* 0xF5 */ 0x18,0x18,0x18,0x18,0x18,0x18,0x18,0x18,0xD8,0xD8,0xD8,0x70,0x00,0x00,0x00,0x00,
/* 0xF6 */ 0x00,0x00,0x00,0x00,0x18,0x18,0x00,0x7E,0x00,0x18,0x18,0x00,0x00,0x00,0x00,0x00,
/* 0xF7 */ 0x00,0x00,0x00,0x00,0x00,0x76,0xDC,0x00,0x76,0xDC,0x00,0x00,0x00,0x00,0x00,0x00,
/* 0xF8 */ 0x00,0x38,0x6C,0x6C,0x38,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
/* 0xF9 */ 0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x18,0x18,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
/* 0xFA */ 0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x18,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
/* 0xFB */ 0x00,0x0F,0x0C,0x0C,0x0C,0x0C,0x0C,0xEC,0x6C,0x6C,0x3C,0x1C,0x00,0x00,0x00,0x00,
/* 0xFC */ 0x00,0xD8,0x6C,0x6C,0x6C,0x6C,0x6C,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
/* 0xFD */ 0x00,0x70,0xD8,0x30,0x60,0xC8,0xF8,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
/* 0xFE */ 0x00,0x00,0x00,0x00,0x7C,0x7C,0x7C,0x7C,0x7C,0x7C,0x7C,0x00,0x00,0x00,0x00,0x00,
};
#define __ver_bbc_i2c_getdev	smp_49484f7f
#define bbc_i2c_getdev	_set_ver(bbc_i2c_getdev)
#define __ver_bbc_i2c_attach	smp_6f1b5aa9
#define bbc_i2c_attach	_set_ver(bbc_i2c_attach)
#define __ver_bbc_i2c_detach	smp_a7b65756
#define bbc_i2c_detach	_set_ver(bbc_i2c_detach)
#define __ver_bbc_i2c_writeb	smp_ddbb22a6
#define bbc_i2c_writeb	_set_ver(bbc_i2c_writeb)
#define __ver_bbc_i2c_readb	smp_60ca6136
#define bbc_i2c_readb	_set_ver(bbc_i2c_readb)
#define __ver_bbc_i2c_write_buf	smp_ef26ccfd
#define bbc_i2c_write_buf	_set_ver(bbc_i2c_write_buf)
#define __ver_bbc_i2c_read_buf	smp_859b15df
#define bbc_i2c_read_buf	_set_ver(bbc_i2c_read_buf)
/*
 * BK Id: SCCS/s.of1275.c 1.6 05/18/01 15:16:42 cort
 */
/* Open Firmware Client Interface */


#include "of1275.h"


static int (*of_server)(void *) = (int(*)(void*))-1;

void
of_init(void *handler)
{
	of_server = (int(*)(void*))handler;
}


/* 6.3.2.1 Client interface */


int
of_test(const char *name, int *missing)
{
	int result;
	static of_test_service s;
	s.service = "test";
	s.n_args = 1;
	s.n_returns = 1;
	s.name = name;
	result = of_server(&s);
	*missing = s.missing;
	return result;
}


/* 6.3.2.2 Device tree */


int
of_peer(int phandle, int *sibling_phandle)
{
	int result;
	static of_peer_service s;
	s.service = "peer";
	s.n_args = 1;
	s.n_returns = 1;
	s.phandle = phandle;
	result = of_server(&s);
	*sibling_phandle = s.sibling_phandle;
	return result;
}

int
of_child(int phandle, int *child_phandle)
{
	int result;
	static of_child_service s;
	s.service = "child";
	s.n_args = 1;
	s.n_returns = 1;
	s.phandle = phandle;
	result = of_server(&s);
	*child_phandle = s.child_phandle;
	return result;
}

int
of_parent(int phandle, int *parent_phandle)
{
	int result;
	static of_parent_service s;
	s.service = "parent";
	s.n_args = 1;
	s.n_returns = 1;
	s.phandle = phandle;
	result = of_server(&s);
	*parent_phandle = s.parent_phandle;
	return result;
}

int
of_instance_to_package(int ihandle, int *phandle)
{
	int result;
	static of_instance_to_package_service s;
	s.service = "instance-to-package";
	s.n_args = 1;
	s.n_returns = 1;
	s.ihandle = ihandle;
	result = of_server(&s);
	*phandle = s.phandle;
	return result;
}

int
of_getproplen(int phandle, const char *name, int *proplen)
{
	int result;
	static of_getproplen_service s;
	s.service = "getproplen";
	s.n_args = 2;
	s.n_returns = 1;
	s.phandle = phandle;
	s.name = name;
	result = of_server(&s);
	*proplen = s.proplen;
	return result;
}

int
of_getprop(int phandle, const char *name, void *buf, int buflen, int *size)
{
	int result;
	static of_getprop_service s;
	s.service = "getprop";
	s.n_args = 4;
	s.n_returns = 1;
	s.phandle = phandle;
	s.name = name;
	s.buf = buf;
	s.buflen = buflen;
	result = of_server(&s);
	*size = s.size;
	return result;
}

int
of_nextprop(int phandle, const char *previous, void *buf, int *flag)
{
	int result;
	static of_nextprop_service s;
	s.service = "nextprop";
	s.n_args = 3;
	s.n_returns = 1;
	s.phandle = phandle;
	s.previous = previous;
	s.buf = buf;
	result = of_server(&s);
	*flag = s.flag;
	return result;
}

int
of_setprop(int phandle, const char *name, void *buf, int len, int *size)
{
	int result;
	static of_setprop_service s;
	s.service = "setprop";
	s.n_args = 4;
	s.n_returns = 1;
	s.phandle = phandle;
	s.name = name;
	s.buf = buf;
	s.len = len;
	result = of_server(&s);
	*size = s.size;
	return result;
}

int
of_canon(const char *device_specifier, void *buf, int buflen, int *length)
{
	int result;
	static of_canon_service s;
	s.service = "canon";
	s.n_args = 3;
	s.n_returns = 1;
	s.device_specifier = device_specifier;
	s.buf = buf;
	s.buflen = buflen;
	result = of_server(&s);
	*length = s.length;
	return result;
}

int
of_finddevice(const char *device_specifier, int *phandle)
{
	int result;
	static of_finddevice_service s;
	s.service = "finddevice";
	s.n_args = 1;
	s.n_returns = 1;
	s.device_specifier = device_specifier;
	result = of_server(&s);
	*phandle = s.phandle;
	return result;
}

int
of_instance_to_path(int ihandle, void *buf, int buflen, int *length)
{
	int result;
	static of_instance_to_path_service s;
	s.service = "instance-to-path";
	s.n_args = 3;
	s.n_returns = 1;
	s.ihandle = ihandle;
	s.buf = buf;
	s.buflen = buflen;
	result = of_server(&s);
	*length = s.length;
	return result;
}

int
of_package_to_path(int phandle, void *buf, int buflen, int *length)
{
	int result;
	static of_package_to_path_service s;
	s.service = "package-to-path";
	s.n_args = 3;
	s.n_returns = 1;
	s.phandle = phandle;
	s.buf = buf;
	s.buflen = buflen;
	result = of_server(&s);
	*length = s.length;
	return result;
}

/* int of_call_method(const char *method, int ihandle, ...); */


/* 6.3.2.3 Device I/O */


int
of_open(const char *device_specifier, int *ihandle)
{
	int result;
	static of_open_service s;
	s.service = "open";
	s.n_args = 1;
	s.n_returns = 1;
	s.device_specifier = device_specifier;
	result = of_server(&s);
	*ihandle = s.ihandle;
	return result;
}

int
of_close(int ihandle)
{
	int result;
	static of_close_service s;
	s.service = "close";
	s.n_args = 1;
	s.n_returns = 0;
	s.ihandle = ihandle;
	result = of_server(&s);
	return result;
}

int
of_read(int ihandle, void *addr, int len, int *actual)
{
	int result;
	static of_read_service s;
	s.service = "read";
	s.n_args = 3;
	s.n_returns = 1;
	s.ihandle = ihandle;
	s.addr = addr;
	s.len = len;
	result = of_server(&s);
	*actual = s.actual;
	return result;
}

int
of_write(int ihandle, void *addr, int len, int *actual)
{
	int result;
	static of_write_service s;
	s.service = "write";
	s.n_args = 3;
	s.n_returns = 1;
	s.ihandle = ihandle;
	s.addr = addr;
	s.len = len;
	result = of_server(&s);
	*actual = s.actual;
	return result;
}

int
of_seek(int ihandle, int pos_hi, int pos_lo, int *status)
{
	int result;
	static of_seek_service s;
	s.service = "seek";
	s.n_args = 3;
	s.n_returns = 1;
	s.ihandle = ihandle;
	s.pos_hi = pos_hi;
	s.pos_lo = pos_lo;
	result = of_server(&s);
	*status = s.status;
	return result;
}


/* 6.3.2.4 Memory */


int
of_claim(void *virt, int size, int align, void **baseaddr)
{
	int result;
	static of_claim_service s;
	s.service = "claim";
	s.n_args = 3;
	s.n_returns = 1;
	s.virt = virt;
	s.size = size;
	s.align = align;
	result = of_server(&s);
	*baseaddr = s.baseaddr;
	return result;
}

int
of_release(void *virt, int size)
{
	int result;
	static of_release_service s;
	s.service = "release";
	s.n_args = 2;
	s.n_returns = 0;
	s.virt = virt;
	s.size = size;
	result = of_server(&s);
	return result;
}


/* 6.3.2.5 Control transfer */


int
of_boot(const char *bootspec)
{
	int result;
	static of_boot_service s;
	s.service = "boot";
	s.n_args = 1;
	s.n_returns = 0;
	s.bootspec = bootspec;
	result = of_server(&s);
	return result;
}

int
of_enter(void)
{
	int result;
	static of_enter_service s;
	s.service = "enter";
	s.n_args = 0;
	s.n_returns = 0;
	result = of_server(&s);
	return result;
}

int
of_exit(void)
{
	int result;
	static of_exit_service s;
	s.service = "exit";
	s.n_args = 0;
	s.n_returns = 0;
	result = of_server(&s);
	return result;
}

/* int of_chain(void *virt, int size, void *entry, void *args, int len); */


/* 6.3.2.6 User interface */


/* int of_interpret(const char *arg, ...); */

int
of_set_callback(void *newfunc, void **oldfunc)
{
	int result;
	static of_set_callback_service s;
	s.service = "set-callback";
	s.n_args = 1;
	s.n_returns = 1;
	s.newfunc = newfunc;
	result = of_server(&s);
	*oldfunc = s.oldfunc;
	return result;
}

int
of_set_symbol_lookup(void *sym_to_value, void *value_to_sym)
{
	int result;
	static of_set_symbol_lookup_service s;
	s.service = "set-symbol-lookup";
	s.n_args = 2;
	s.n_returns = 0;
	s.sym_to_value = sym_to_value;
	s.value_to_sym = s.value_to_sym;
	result = of_server(&s);
	return result;
}


/* 6.3.2.7 Time */


int
of_milliseconds(int *ms)
{
	int result;
	static of_milliseconds_service s;
	s.service = "milliseconds";
	s.n_args = 0;
	s.n_returns = 1;
	result = of_server(&s);
	*ms = s.ms;
	return result;
}
/*
 * BK Id: SCCS/s.of1275.h 1.6 05/18/01 15:16:42 cort
 */
/* 6.3.2.1 Client interface */


typedef struct _of_test_service {
	const char *service;
	int n_args;
	int n_returns;
	/*in*/
	const char *name;
	/*out*/
	int missing;
} of_test_service;

int of_test(const char *name, int *missing);


/* 6.3.2.2 Device tree */


typedef struct _of_peer_service {
	const char *service;
	int n_args;
	int n_returns;
	/*in*/
	int phandle;
	/*out*/
	int sibling_phandle;
} of_peer_service;

int of_peer(int phandle, int *sibling_phandle);


typedef struct _of_child_service {
	const char *service;
	int n_args;
	int n_returns;
	/*in*/
	int phandle;
	/*out*/
	int child_phandle;
} of_child_service;

int of_child(int phandle, int *child_phandle);


typedef struct _of_parent_service {
	const char *service;
	int n_args;
	int n_returns;
	/*in*/
	int phandle;
	/*out*/
	int parent_phandle;
} of_parent_service;

int of_child(int phandle, int *parent_phandle);


typedef struct _of_instance_to_package_service {
	const char *service;
	int n_args;
	int n_returns;
	/*in*/
	int ihandle;
	/*out*/
	int phandle;
} of_instance_to_package_service;

int of_instance_to_package(int ihandle, int *phandle);


typedef struct _of_getproplen_service {
	const char *service;
	int n_args;
	int n_returns;
	/*in*/
	int phandle;
	const char *name;
	/*out*/
	int proplen;
} of_getproplen_service;

int of_getproplen(int phandle, const char *name, int *proplen);


typedef struct _of_getprop_service {
	const char *service;
	int n_args;
	int n_returns;
	/*in*/
	int phandle;
	const char *name;
	void *buf;
	int buflen;
	/*out*/
	int size;
} of_getprop_service;

int of_getprop(int phandle, const char *name, void *buf, int buflen,
	       int *size);


typedef struct _of_nextprop_service {
	const char *service;
	int n_args;
	int n_returns;
	/*in*/
	int phandle;
	const char *previous;
	void *buf;
	/*out*/
	int flag;
} of_nextprop_service;

int of_nextprop(int phandle, const char *previous, void *buf, int *flag);


typedef struct _of_setprop_service {
	const char *service;
	int n_args;
	int n_returns;
	/*in*/
	int phandle;
	const char *name;
	void *buf;
	int len;
	/*out*/
	int size;
} of_setprop_service;

int of_setprop(int phandle, const char *name, void *buf, int len, int *size);


typedef struct _of_canon_service {
	const char *service;
	int n_args;
	int n_returns;
	/*in*/
	const char *device_specifier;
	void *buf;
	int buflen;
	/*out*/
	int length;
} of_canon_service;

int of_canon(const char *device_specifier, void *buf, int buflen, int *length);


typedef struct _of_finddevice_service {
	const char *service;
	int n_args;
	int n_returns;
	/*in*/
	const char *device_specifier;
	/*out*/
	int phandle;
} of_finddevice_service;

int of_finddevice(const char *device_specifier, int *phandle);


typedef struct _of_instance_to_path_service {
	const char *service;
	int n_args;
	int n_returns;
	/*in*/
	int ihandle;
	void *buf;
	int buflen;
	/*out*/
	int length;
} of_instance_to_path_service;

int of_instance_to_path(int ihandle, void *buf, int buflen, int *length);


typedef struct _of_package_to_path_service {
	const char *service;
	int n_args;
	int n_returns;
	/*in*/
	int phandle;
	void *buf;
	int buflen;
	/*out*/
	int length;
} of_package_to_path_service;

int of_package_to_path(int phandle, void *buf, int buflen, int *length);


typedef struct _of_call_method_service {
	const char *service;
	int n_args;
	int n_returns;
	/*in*/
	const char *method;
	int ihandle;
	/*...*/
	int args[0]; 
} of_call_method_service;

int of_call_method(const char *method, int ihandle, ...);


/* 6.3.2.3 Device I/O */


typedef struct _of_open_service {
	const char *service;
	int n_args;
	int n_returns;
	/*in*/
	const char *device_specifier;
	/*out*/
	int ihandle;
} of_open_service;

int of_open(const char *device_specifier,
	    int *ihandle);


typedef struct _of_close_service {
	const char *service;
	int n_args;
	int n_returns;
	/*in*/
	int ihandle;
	/*out*/
} of_close_service;

int of_close(int ihandle);


typedef struct _of_read_service {
	const char *service;
	int n_args;
	int n_returns;
	/*in*/
	int ihandle;
	void *addr;
	int len;
	/*out*/
	int actual;
} of_read_service;

int of_read(int ihandle, void *addr, int len, int *actual);


typedef struct _of_write_service {
	const char *service;
	int n_args;
	int n_returns;
	/*in*/
	int ihandle;
	void *addr;
	int len;
	/*out*/
	int actual;
} of_write_service;

int of_write(int ihandle, void *addr, int len, int *actual);


typedef struct _of_seek_service {
	const char *service;
	int n_args;
	int n_returns;
	/*in*/
	int ihandle;
	int pos_hi;
	int pos_lo;
	/*out*/
	int status;
} of_seek_service;

int of_seek(int ihandle, int pos_hi, int pos_lo, int *status);


/* 6.3.2.4 Memory */


typedef struct _of_claim_service {
	const char *service;
	int n_args;
	int n_returns;
	/*in*/
	void *virt;
	int size;
	int align;
	/*out*/
	void *baseaddr;
} of_claim_service;

int of_claim(void *virt, int size, int align, void **baseaddr);


typedef struct _of_release_service {
	const char *service;
	int n_args;
	int n_returns;
	/*in*/
	void *virt;
	int size;
	int align;
	/*out*/
} of_release_service;

int of_release(void *virt, int size);


/* 6.3.2.5 Control transfer */


typedef struct _of_boot_service {
	const char *service;
	int n_args;
	int n_returns;
	/*in*/
	const char *bootspec;
	/*out*/
} of_boot_service;

int of_boot(const char *bootspec);


typedef struct _of_enter_service {
	const char *service;
	int n_args;
	int n_returns;
	/*in*/
	/*out*/
} of_enter_service;

int of_enter(void);


typedef struct _of_exit_service {
	const char *service;
	int n_args;
	int n_returns;
	/*in*/
	/*out*/
} of_exit_service;

int of_exit(void);


typedef struct _of_chain_service {
	const char *service;
	int n_args;
	int n_returns;
	/*in*/
	void *virt;
	int size;
	void *entry;
	void *args;
	int len;
	/*out*/
} of_chain_service;

int of_chain(void *virt, int size, void *entry, void *args, int len);


/* 6.3.2.6 User interface */


typedef struct _of_interpret_service {
	const char *service;
	int n_args;
	int n_returns;
	/*in*/
	const char *cmd;
	int args[0];
	/*...*/
	/*out*/
	/*...*/
} of_interpret_service;

int of_interpret(const char *arg, ...);


typedef struct _of_set_callback_service {
	const char *service;
	int n_args;
	int n_returns;
	/*in*/
	void *newfunc;
	/*out*/
	void *oldfunc;
} of_set_callback_service;

int of_set_callback(void *newfunc, void **oldfunc);


typedef struct _of_set_symbol_lookup_service {
	const char *service;
	int n_args;
	int n_returns;
	/*in*/
	void *sym_to_value;
	void *value_to_sym;
	/*out*/
} of_set_symbol_lookup_service;

int of_set_symbol_lookup(void *sym_to_value, void *value_to_sym);


/* 6.3.2.7 Time */


typedef struct _of_milliseconds_service {
	const char *service;
	int n_args;
	int n_returns;
	/*in*/
	/*out*/
	int ms;
} of_milliseconds_service;

int of_milliseconds(int *ms);
] 2 }
	global CONFIG_PARIDE_ON26
	if {($CONFIG_PARIDE == 1 || $CONFIG_PARIDE == 2) && ($CONFIG_PARIDE == 1 || $CONFIG_PARIDE == 2 || $CONFIG_PARIDE == 4)} then {write_tristate $cfg $autocfg CONFIG_PARIDE_ON26 $CONFIG_PARIDE_ON26 [list $CONFIG_PARIDE] 2 }
	global CONFIG_BLK_CPQ_DA
	if {($CONFIG_PCI == 1 || $CONFIG_PCI == 2 || $CONFIG_PCI == 4)} then {write_tristate $cfg $autocfg CONFIG_BLK_CPQ_DA $CONFIG_BLK_CPQ_DA [list $CONFIG_PCI] 2 }
	global CONFIG_BLK_CPQ_CISS_DA
	if {($CONFIG_PCI == 1 || $CONFIG_PCI == 2 || $CONFIG_PCI == 4)} then {write_tristate $cfg $autocfg CONFIG_BLK_CPQ_CISS_DA $CONFIG_BLK_CPQ_CISS_DA [list $CONFIG_PCI] 2 }
	global CONFIG_CISS_SCSI_TAPE
	global CONFIG_SCSI
	if {($CONFIG_BLK_CPQ_CISS_DA == 1 || $CONFIG_BLK_CPQ_CISS_DA == 2 || $CONFIG_BLK_CPQ_CISS_DA == 4) && ($CONFIG_SCSI == 1 || $CONFIG_SCSI == 2 || $CONFIG_SCSI == 4)} then {write_tristate $cfg $autocfg CONFIG_CISS_SCSI_TAPE $CONFIG_CISS_SCSI_TAPE [list $CONFIG_BLK_CPQ_CISS_DA $CONFIG_SCSI] 1 }
	global CONFIG_BLK_DEV_DAC960
	if {($CONFIG_PCI == 1 || $CONFIG_PCI == 2 || $CONFIG_PCI == 4)} then {write_tristate $cfg $autocfg CONFIG_BLK_DEV_DAC960 $CONFIG_BLK_DEV_DAC960 [list $CONFIG_PCI] 2 }
	global CONFIG_BLK_DEV_LOOP
	write_tristate $cfg $autocfg CONFIG_BLK_DEV_LOOP $CONFIG_BLK_DEV_LOOP [list $notmod] 2
	global CONFIG_BLK_DEV_NBD
	if {($CONFIG_NET == 1 || $CONFIG_NET == 2 || $CONFIG_NET == 4)} then {write_tristate $cfg $autocfg CONFIG_BLK_DEV_NBD $CONFIG_BLK_DEV_NBD [list $CONFIG_NET] 2 }
	global CONFIG_BLK_DEV_RAM
	write_tristate $cfg $autocfg CONFIG_BLK_DEV_RAM $CONFIG_BLK_DEV_RAM [list $notmod] 2
	global CONFIG_BLK_DEV_RAM_SIZE
	if {($CONFIG_BLK_DEV_RAM == 1 || $CONFIG_BLK_DEV_RAM == 2)} then {write_int $cfg $autocfg CONFIG_BLK_DEV_RAM_SIZE $CONFIG_BLK_DEV_RAM_SIZE $notmod }
	global CONFIG_BLK_DEV_INITRD
	if {($CONFIG_BLK_DEV_RAM == 1 || $CONFIG_BLK_DEV_RAM == 4)} then {write_tristate $cfg $autocfg CONFIG_BLK_DEV_INITRD $CONFIG_BLK_DEV_INITRD [list $CONFIG_BLK_DEV_RAM] 2 }
	write_comment $cfg $autocfg "Multi-device support (RAID and LVM)"
	global CONFIG_MD
	write_tristate $cfg $autocfg CONFIG_MD $CONFIG_MD [list $notmod] 2
	global CONFIG_BLK_DEV_MD
	if {($CONFIG_MD == 1 || $CONFIG_MD == 2 || $CONFIG_MD == 4)} then {write_tristate $cfg $autocfg CONFIG_BLK_DEV_MD $CONFIG_BLK_DEV_MD [list $CONFIG_MD] 2 }
	global CONFIG_MD_LINEAR
	if {($CONFIG_BLK_DEV_MD == 1 || $CONFIG_BLK_DEV_MD == 2 || $CONFIG_BLK_DEV_MD == 4)} then {write_tristate $cfg $autocfg CONFIG_MD_LINEAR $CONFIG_MD_LINEAR [list $CONFIG_BLK_DEV_MD] 2 }
	global CONFIG_MD_RAID0
	if {($CONFIG_BLK_DEV_MD == 1 || $CONFIG_BLK_DEV_MD == 2 || $CONFIG_BLK_DEV_MD == 4)} then {write_tristate $cfg $autocfg CONFIG_MD_RAID0 $CONFIG_MD_RAID0 [list $CONFIG_BLK_DEV_MD] 2 }
	global CONFIG_MD_RAID1
	if {($CONFIG_BLK_DEV_MD == 1 || $CONFIG_BLK_DEV_MD == 2 || $CONFIG_BLK_DEV_MD == 4)} then {write_tristate $cfg $autocfg CONFIG_MD_RAID1 $CONFIG_MD_RAID1 [list $CONFIG_BLK_DEV_MD] 2 }
	global CONFIG_MD_RAID5
	if {($CONFIG_BLK_DEV_MD == 1 || $CONFIG_BLK_DEV_MD == 2 || $CONFIG_BLK_DEV_MD == 4)} then {write_tristate $cfg $autocfg CONFIG_MD_RAID5 $CONFIG_MD_RAID5 [list $CONFIG_BLK_DEV_MD] 2 }
	global CONFIG_MD_MULTIPATH
	if {($CONFIG_BLK_DEV_MD == 1 || $CONFIG_BLK_DEV_MD == 2 || $CONFIG_BLK_DEV_MD == 4)} then {write_tristate $cfg $autocfg CONFIG_MD_MULTIPATH $CONFIG_MD_MULTIPATH [list $CONFIG_BLK_DEV_MD] 2 }
	global CONFIG_BLK_DEV_LVM
	if {($CONFIG_MD == 1 || $CONFIG_MD == 2 || $CONFIG_MD == 4)} then {write_tristate $cfg $autocfg CONFIG_BLK_DEV_LVM $CONFIG_BLK_DEV_LVM [list $CONFIG_MD] 2 }
	if {($CONFIG_NET == 1)} then {write_comment $cfg $autocfg "Networking options"}
	global CONFIG_PACKET
	if {($CONFIG_NET == 1)} then {write_tristate $cfg $autocfg CONFIG_PACKET $CONFIG_PACKET [list $notmod] 2 }
	global CONFIG_PACKET_MMAP
	if {($CONFIG_NET == 1) && ($CONFIG_PACKET != 0)} then {write_tristate $cfg $autocfg CONFIG_PACKET_MMAP $CONFIG_PACKET_MMAP [list $notmod] 2 }
	global CONFIG_NETLINK_DEV
	if {($CONFIG_NET == 1)} then {write_tristate $cfg $autocfg CONFIG_NETLINK_DEV $CONFIG_NETLINK_DEV [list $notmod] 2 }
	global CONFIG_NETFILTER
	if {($CONFIG_NET == 1)} then {write_tristate $cfg $autocfg CONFIG_NETFILTER $CONFIG_NETFILTER [list $notmod] 2 }
	global CONFIG_NETFILTER_DEBUG
	if {($CONFIG_NET == 1) && ($CONFIG_NETFILTER == 1)} then {write_tristate $cfg $autocfg CONFIG_NETFILTER_DEBUG $CONFIG_NETFILTER_DEBUG [list $notmod] 2 }
	global CONFIG_FILTER
	if {($CONFIG_NET == 1)} then {write_tristate $cfg $autocfg CONFIG_FILTER $CONFIG_FILTER [list $notmod] 2 }
	global CONFIG_UNIX
	if {($CONFIG_NET == 1)} then {write_tristate $cfg $autocfg CONFIG_UNIX $CONFIG_UNIX [list $notmod] 2 }
	global CONFIG_INET
	if {($CONFIG_NET == 1)} then {write_tristate $cfg $autocfg CONFIG_INET $CONFIG_INET [list $notmod] 2 }
	global CONFIG_IP_MULTICAST
	if {($CONFIG_NET == 1) && ($CONFIG_INET == 1)} then {write_tristate $cfg $autocfg CONFIG_IP_MULTICAST $CONFIG_IP_MULTICAST [list $notmod] 2 }
	global CONFIG_IP_ADVANCED_ROUTER
	if {($CONFIG_NET == 1) && ($CONFIG_INET == 1)} then {write_tristate $cfg $autocfg CONFIG_IP_ADVANCED_ROUTER $CONFIG_IP_ADVANCED_ROUTER [list $notmod] 2 }
	global CONFIG_IP_MULTIPLE_TABLES
	if {($CONFIG_NET == 1) && ($CONFIG_INET == 1) && ($CONFIG_IP_ADVANCED_ROUTER == 1)} then {write_tristate $cfg $autocfg CONFIG_IP_MULTIPLE_TABLES $CONFIG_IP_MULTIPLE_TABLES [list $notmod] 2 }
	global CONFIG_IP_ROUTE_FWMARK
	if {($CONFIG_NET == 1) && ($CONFIG_INET == 1) && ($CONFIG_IP_ADVANCED_ROUTER == 1) && ($CONFIG_IP_MULTIPLE_TABLES == 1) && ($CONFIG_NETFILTER == 1)} then {write_tristate $cfg $autocfg CONFIG_IP_ROUTE_FWMARK $CONFIG_IP_ROUTE_FWMARK [list $notmod] 2 }
	global CONFIG_IP_ROUTE_NAT
	if {($CONFIG_NET == 1) && ($CONFIG_INET == 1) && ($CONFIG_IP_ADVANCED_ROUTER == 1) && ($CONFIG_IP_MULTIPLE_TABLES == 1)} then {write_tristate $cfg $autocfg CONFIG_IP_ROUTE_NAT $CONFIG_IP_ROUTE_NAT [list $notmod] 2 }
	global CONFIG_IP_ROUTE_MULTIPATH
	if {($CONFIG_NET == 1) && ($CONFIG_INET == 1) && ($CONFIG_IP_ADVANCED_ROUTER == 1)} then {write_tristate $cfg $autocfg CONFIG_IP_ROUTE_MULTIPATH $CONFIG_IP_ROUTE_MULTIPATH [list $notmod] 2 }
	global CONFIG_IP_ROUTE_TOS
	if {($CONFIG_NET == 1) && ($CONFIG_INET == 1) && ($CONFIG_IP_ADVANCED_ROUTER == 1)} then {write_tristate $cfg $autocfg CONFIG_IP_ROUTE_TOS $CONFIG_IP_ROUTE_TOS [list $notmod] 2 }
	global CONFIG_IP_ROUTE_VERBOSE
	if {($CONFIG_NET == 1) && ($CONFIG_INET == 1) && ($CONFIG_IP_ADVANCED_ROUTER == 1)} then {write_tristate $cfg $autocfg CONFIG_IP_ROUTE_VERBOSE $CONFIG_IP_ROUTE_VERBOSE [list $notmod] 2 }
	global CONFIG_IP_ROUTE_LARGE_TABLES
	if {($CONFIG_NET == 1) && ($CONFIG_INET == 1) && ($CONFIG_IP_ADVANCED_ROUTER == 1)} then {write_tristate $cfg $autocfg CONFIG_IP_ROUTE_LARGE_TABLES $CONFIG_IP_ROUTE_LARGE_TABLES [list $notmod] 2 }
	global CONFIG_IP_PNP
	if {($CONFIG_NET == 1) && ($CONFIG_INET == 1)} then {write_tristate $cfg $autocfg CONFIG_IP_PNP $CONFIG_IP_PNP [list $notmod] 2 }
	global CONFIG_IP_PNP_DHCP
	if {($CONFIG_NET == 1) && ($CONFIG_INET == 1) && ($CONFIG_IP_PNP == 1)} then {write_tristate $cfg $autocfg CONFIG_IP_PNP_DHCP $CONFIG_IP_PNP_DHCP [list $notmod] 2 }
	global CONFIG_IP_PNP_BOOTP
	if {($CONFIG_NET == 1) && ($CONFIG_INET == 1) && ($CONFIG_IP_PNP == 1)} then {write_tristate $cfg $autocfg CONFIG_IP_PNP_BOOTP $CONFIG_IP_PNP_BOOTP [list $notmod] 2 }
	global CONFIG_IP_PNP_RARP
	if {($CONFIG_NET == 1) && ($CONFIG_INET == 1) && ($CONFIG_IP_PNP == 1)} then {write_tristate $cfg $autocfg CONFIG_IP_PNP_RARP $CONFIG_IP_PNP_RARP [list $notmod] 2 }
	global CONFIG_NET_IPIP
	if {($CONFIG_NET == 1) && ($CONFIG_INET == 1)} then {write_tristate $cfg $autocfg CONFIG_NET_IPIP $CONFIG_NET_IPIP [list $notmod] 2 }
	global CONFIG_NET_IPGRE
	if {($CONFIG_NET == 1) && ($CONFIG_INET == 1)} then {write_tristate $cfg $autocfg CONFIG_NET_IPGRE $CONFIG_NET_IPGRE [list $notmod] 2 }
	global CONFIG_NET_IPGRE_BROADCAST
	if {($CONFIG_NET == 1) && ($CONFIG_INET == 1) && ($CONFIG_IP_MULTICAST == 1) && ($CONFIG_NET_IPGRE != 0)} then {write_tristate $cfg $autocfg CONFIG_NET_IPGRE_BROADCAST $CONFIG_NET_IPGRE_BROADCAST [list $notmod] 2 }
	global CONFIG_IP_MROUTE
	if {($CONFIG_NET == 1) && ($CONFIG_INET == 1) && ($CONFIG_IP_MULTICAST == 1)} then {write_tristate $cfg $autocfg CONFIG_IP_MROUTE $CONFIG_IP_MROUTE [list $notmod] 2 }
	global CONFIG_IP_PIMSM_V1
	if {($CONFIG_NET == 1) && ($CONFIG_INET == 1) && ($CONFIG_IP_MULTICAST == 1) && ($CONFIG_IP_MROUTE == 1)} then {write_tristate $cfg $autocfg CONFIG_IP_PIMSM_V1 $CONFIG_IP_PIMSM_V1 [list $notmod] 2 }
	global CONFIG_IP_PIMSM_V2
	if {($CONFIG_NET == 1) && ($CONFIG_INET == 1) && ($CONFIG_IP_MULTICAST == 1) && ($CONFIG_IP_MROUTE == 1)} then {write_tristate $cfg $autocfg CONFIG_IP_PIMSM_V2 $CONFIG_IP_PIMSM_V2 [list $notmod] 2 }
	global CONFIG_ARPD
	if {($CONFIG_NET == 1) && ($CONFIG_INET == 1) && ($CONFIG_EXPERIMENTAL == 1)} then {write_tristate $cfg $autocfg CONFIG_ARPD $CONFIG_ARPD [list $notmod] 2 }
	global CONFIG_INET_ECN
	if {($CONFIG_NET == 1) && ($CONFIG_INET == 1)} then {write_tristate $cfg $autocfg CONFIG_INET_ECN $CONFIG_INET_ECN [list $notmod] 2 }
	global CONFIG_SYN_COOKIES
	if {($CONFIG_NET == 1) && ($CONFIG_INET == 1)} then {write_tristate $cfg $autocfg CONFIG_SYN_COOKIES $CONFIG_SYN_COOKIES [list $notmod] 2 }
	if {($CONFIG_NET == 1) && ($CONFIG_INET == 1) && ($CONFIG_NETFILTER != 0)} then {write_comment $cfg $autocfg "  IP: Netfilter Configuration"}
	global CONFIG_IP_NF_CONNTRACK
	if {($CONFIG_NET == 1) && ($CONFIG_INET == 1) && ($CONFIG_NETFILTER != 0)} then {write_tristate $cfg $autocfg CONFIG_IP_NF_CONNTRACK $CONFIG_IP_NF_CONNTRACK [list $notmod] 2 }
	global CONFIG_IP_NF_FTP
	if {($CONFIG_NET == 1) && ($CONFIG_INET == 1) && ($CONFIG_NETFILTER != 0) && ($CONFIG_IP_NF_CONNTRACK != 0) && ($CONFIG_IP_NF_CONNTRACK == 1 || $CONFIG_IP_NF_CONNTRACK == 2 || $CONFIG_IP_NF_CONNTRACK == 4)} then {write_tristate $cfg $autocfg CONFIG_IP_NF_FTP $CONFIG_IP_NF_FTP [list $CONFIG_IP_NF_CONNTRACK] 2 }
	global CONFIG_IP_NF_IRC
	if {($CONFIG_NET == 1) && ($CONFIG_INET == 1) && ($CONFIG_NETFILTER != 0) && ($CONFIG_IP_NF_CONNTRACK != 0) && ($CONFIG_IP_NF_CONNTRACK == 1 || $CONFIG_IP_NF_CONNTRACK == 2 || $CONFIG_IP_NF_CONNTRACK == 4)} then {write_tristate $cfg $autocfg CONFIG_IP_NF_IRC $CONFIG_IP_NF_IRC [list $CONFIG_IP_NF_CONNTRACK] 2 }
	global CONFIG_IP_NF_QUEUE
	if {($CONFIG_NET == 1) && ($CONFIG_INET == 1) && ($CONFIG_NETFILTER != 0) && ($CONFIG_EXPERIMENTAL == 1)} then {write_tristate $cfg $autocfg CONFIG_IP_NF_QUEUE $CONFIG_IP_NF_QUEUE [list $notmod] 2 }
	global CONFIG_IP_NF_IPTABLES
	if {($CONFIG_NET == 1) && ($CONFIG_INET == 1) && ($CONFIG_NETFILTER != 0)} then {write_tristate $cfg $autocfg CONFIG_IP_NF_IPTABLES $CONFIG_IP_NF_IPTABLES [list $notmod] 2 }
	global CONFIG_IP_NF_MATCH_LIMIT
	if {($CONFIG_NET == 1) && ($CONFIG_INET == 1) && ($CONFIG_NETFILTER != 0) && ($CONFIG_IP_NF_IPTABLES != 0) && ($CONFIG_IP_NF_IPTABLES == 1 || $CONFIG_IP_NF_IPTABLES == 2 || $CONFIG_IP_NF_IPTABLES == 4)} then {write_tristate $cfg $autocfg CONFIG_IP_NF_MATCH_LIMIT $CONFIG_IP_NF_MATCH_LIMIT [list $CONFIG_IP_NF_IPTABLES] 2 }
	global CONFIG_IP_NF_MATCH_MAC
	if {($CONFIG_NET == 1) && ($CONFIG_INET == 1) && ($CONFIG_NETFILTER != 0) && ($CONFIG_IP_NF_IPTABLES != 0) && ($CONFIG_IP_NF_IPTABLES == 1 || $CONFIG_IP_NF_IPTABLES == 2 || $CONFIG_IP_NF_IPTABLES == 4)} then {write_tristate $cfg $autocfg CONFIG_IP_NF_MATCH_MAC $CONFIG_IP_NF_MATCH_MAC [list $CONFIG_IP_NF_IPTABLES] 2 }
	global CONFIG_IP_NF_MATCH_MARK
	if {($CONFIG_NET == 1) && ($CONFIG_INET == 1) && ($CONFIG_NETFILTER != 0) && ($CONFIG_IP_NF_IPTABLES != 0) && ($CONFIG_IP_NF_IPTABLES == 1 || $CONFIG_IP_NF_IPTABLES == 2 || $CONFIG_IP_NF_IPTABLES == 4)} then {write_tristate $cfg $autocfg CONFIG_IP_NF_MATCH_MARK $CONFIG_IP_NF_MATCH_MARK [list $CONFIG_IP_NF_IPTABLES] 2 }
	global CONFIG_IP_NF_MATCH_MULTIPORT
	if {($CONFIG_NET == 1) && ($CONFIG_INET == 1) && ($CONFIG_NETFILTER != 0) && ($CONFIG_IP_NF_IPTABLES != 0) && ($CONFIG_IP_NF_IPTABLES == 1 || $CONFIG_IP_NF_IPTABLES == 2 || $CONFIG_IP_NF_IPTABLES == 4)} then {write_tristate $cfg $autocfg CONFIG_IP_NF_MATCH_MULTIPORT $CONFIG_IP_NF_MATCH_MULTIPORT [list $CONFIG_IP_NF_IPTABLES] 2 }
	global CONFIG_IP_NF_MATCH_TOS
	if {($CONFIG_NET == 1) && ($CONFIG_INET == 1) && ($CONFIG_NETFILTER != 0) && ($CONFIG_IP_NF_IPTABLES != 0) && ($CONFIG_IP_NF_IPTABLES == 1 || $CONFIG_IP_NF_IPTABLES == 2 || $CONFIG_IP_NF_IPTABLES == 4)} then {write_tristate $cfg $autocfg CONFIG_IP_NF_MATCH_TOS $CONFIG_IP_NF_MATCH_TOS [list $CONFIG_IP_NF_IPTABLES] 2 }
	global CONFIG_IP_NF_MATCH_AH_ESP
	if {($CONFIG_NET == 1) && ($CONFIG_INET == 1) && ($CONFIG_NETFILTER != 0) && ($CONFIG_IP_NF_IPTABLES != 0) && ($CONFIG_IP_NF_IPTABLES == 1 || $CONFIG_IP_NF_IPTABLES == 2 || $CONFIG_IP_NF_IPTABLES == 4)} then {write_tristate $cfg $autocfg CONFIG_IP_NF_MATCH_AH_ESP $CONFIG_IP_NF_MATCH_AH_ESP [list $CONFIG_IP_NF_IPTABLES] 2 }
	global CONFIG_IP_NF_MATCH_LENGTH
	if {($CONFIG_NET == 1) && ($CONFIG_INET == 1) && ($CONFIG_NETFILTER != 0) && ($CONFIG_IP_NF_IPTABLES != 0) && ($CONFIG_IP_NF_IPTABLES == 1 || $CONFIG_IP_NF_IPTABLES == 2 || $CONFIG_IP_NF_IPTABLES == 4)} then {write_tristate $cfg $autocfg CONFIG_IP_NF_MATCH_LENGTH $CONFIG_IP_NF_MATCH_LENGTH [list $CONFIG_IP_NF_IPTABLES] 2 }
	global CONFIG_IP_NF_MATCH_TTL
	if {($CONFIG_NET == 1) && ($CONFIG_INET == 1) && ($CONFIG_NETFILTER != 0) && ($CONFIG_IP_NF_IPTABLES != 0) && ($CONFIG_IP_NF_IPTABLES == 1 || $CONFIG_IP_NF_IPTABLES == 2 || $CONFIG_IP_NF_IPTABLES == 4)} then {write_tristate $cfg $autocfg CONFIG_IP_NF_MATCH_TTL $CONFIG_IP_NF_MATCH_TTL [list $CONFIG_IP_NF_IPTABLES] 2 }
	global CONFIG_IP_NF_MATCH_TCPMSS
	if {($CONFIG_NET == 1) && ($CONFIG_INET == 1) && ($CONFIG_NETFILTER != 0) && ($CONFIG_IP_NF_IPTABLES != 0) && ($CONFIG_IP_NF_IPTABLES == 1 || $CONFIG_IP_NF_IPTABLES == 2 || $CONFIG_IP_NF_IPTABLES == 4)} then {write_tristate $cfg $autocfg CONFIG_IP_NF_MATCH_TCPMSS $CONFIG_IP_NF_MATCH_TCPMSS [list $CONFIG_IP_NF_IPTABLES] 2 }
	global CONFIG_IP_NF_MATCH_STATE
	if {($CONFIG_NET == 1) && ($CONFIG_INET == 1) && ($CONFIG_NETFILTER != 0) && ($CONFIG_IP_NF_IPTABLES != 0) && ($CONFIG_IP_NF_CONNTRACK != 0) && ($CONFIG_IP_NF_CONNTRACK == 1 || $CONFIG_IP_NF_CONNTRACK == 2 || $CONFIG_IP_NF_CONNTRACK == 4) && ($CONFIG_IP_NF_IPTABLES == 1 || $CONFIG_IP_NF_IPTABLES == 2 || $CONFIG_IP_NF_IPTABLES == 4)} then {write_tristate $cfg $autocfg CONFIG_IP_NF_MATCH_STATE $CONFIG_IP_NF_MATCH_STATE [list $CONFIG_IP_NF_CONNTRACK $CONFIG_IP_NF_IPTABLES] 2 }
	global CONFIG_IP_NF_MATCH_UNCLEAN
	if {($CONFIG_NET == 1) && ($CONFIG_INET == 1) && ($CONFIG_NETFILTER != 0) && ($CONFIG_IP_NF_IPTABLES != 0) && ($CONFIG_EXPERIMENTAL == 1) && ($CONFIG_IP_NF_IPTABLES == 1 || $CONFIG_IP_NF_IPTABLES == 2 || $CONFIG_IP_NF_IPTABLES == 4)} then {write_tristate $cfg $autocfg CONFIG_IP_NF_MATCH_UNCLEAN $CONFIG_IP_NF_MATCH_UNCLEAN [list $CONFIG_IP_NF_IPTABLES] 2 }
	global CONFIG_IP_NF_MATCH_OWNER
	if {($CONFIG_NET == 1) && ($CONFIG_INET == 1) && ($CONFIG_NETFILTER != 0) && ($CONFIG_IP_NF_IPTABLES != 0) && ($CONFIG_EXPERIMENTAL == 1) && ($CONFIG_IP_NF_IPTABLES == 1 || $CONFIG_IP_NF_IPTABLES == 2 || $CONFIG_IP_NF_IPTABLES == 4)} then {write_tristate $cfg $autocfg CONFIG_IP_NF_MATCH_OWNER $CONFIG_IP_NF_MATCH_OWNER [list $CONFIG_IP_NF_IPTABLES] 2 }
	global CONFIG_IP_NF_FILTER
	if {($CONFIG_NET == 1) && ($CONFIG_INET == 1) && ($CONFIG_NETFILTER != 0) && ($CONFIG_IP_NF_IPTABLES != 0) && ($CONFIG_IP_NF_IPTABLES == 1 || $CONFIG_IP_NF_IPTABLES == 2 || $CONFIG_IP_NF_IPTABLES == 4)} then {write_tristate $cfg $autocfg CONFIG_IP_NF_FILTER $CONFIG_IP_NF_FILTER [list $CONFIG_IP_NF_IPTABLES] 2 }
	global CONFIG_IP_NF_TARGET_REJECT
	if {($CONFIG_NET == 1) && ($CONFIG_INET == 1) && ($CONFIG_NETFILTER != 0) && ($CONFIG_IP_NF_IPTABLES != 0) && ($CONFIG_IP_NF_FILTER != 0) && ($CONFIG_IP_NF_FILTER == 1 || $CONFIG_IP_NF_FILTER == 2 || $CONFIG_IP_NF_FILTER == 4)} then {write_tristate $cfg $autocfg CONFIG_IP_NF_TARGET_REJECT $CONFIG_IP_NF_TARGET_REJECT [list $CONFIG_IP_NF_FILTER] 2 }
	global CONFIG_IP_NF_TARGET_MIRROR
	if {($CONFIG_NET == 1) && ($CONFIG_INET == 1) && ($CONFIG_NETFILTER != 0) && ($CONFIG_IP_NF_IPTABLES != 0) && ($CONFIG_IP_NF_FILTER != 0) && ($CONFIG_EXPERIMENTAL == 1) && ($CONFIG_IP_NF_FILTER == 1 || $CONFIG_IP_NF_FILTER == 2 || $CONFIG_IP_NF_FILTER == 4)} then {write_tristate $cfg $autocfg CONFIG_IP_NF_TARGET_MIRROR $CONFIG_IP_NF_TARGET_MIRROR [list $CONFIG_IP_NF_FILTER] 2 }
	global CONFIG_IP_NF_NAT
	if {($CONFIG_NET == 1) && ($CONFIG_INET == 1) && ($CONFIG_NETFILTER != 0) && ($CONFIG_IP_NF_IPTABLES != 0) && ($CONFIG_IP_NF_CONNTRACK != 0) && ($CONFIG_IP_NF_IPTABLES == 1 || $CONFIG_IP_NF_IPTABLES == 2 || $CONFIG_IP_NF_IPTABLES == 4) && ($CONFIG_IP_NF_CONNTRACK == 1 || $CONFIG_IP_NF_CONNTRACK == 2 || $CONFIG_IP_NF_CONNTRACK == 4)} then {write_tristate $cfg $autocfg CONFIG_IP_NF_NAT $CONFIG_IP_NF_NAT [list $CONFIG_IP_NF_IPTABLES $CONFIG_IP_NF_CONNTRACK] 2 }
	global CONFIG_IP_NF_NAT_NEEDED
	if {($CONFIG_NET == 1) && ($CONFIG_INET == 1) && ($CONFIG_NETFILTER != 0) && ($CONFIG_IP_NF_IPTABLES != 0) && ($CONFIG_IP_NF_CONNTRACK != 0) && ($CONFIG_IP_NF_NAT != 0)} then {write_tristate $cfg $autocfg CONFIG_IP_NF_NAT_NEEDED $CONSTANT_Y [list $notmod] 2 }
	global CONFIG_IP_NF_TARGET_MASQUERADE
	if {($CONFIG_NET == 1) && ($CONFIG_INET == 1) && ($CONFIG_NETFILTER != 0) && ($CONFIG_IP_NF_IPTABLES != 0) && ($CONFIG_IP_NF_CONNTRACK != 0) && ($CONFIG_IP_NF_NAT != 0) && ($CONFIG_IP_NF_NAT == 1 || $CONFIG_IP_NF_NAT == 2 || $CONFIG_IP_NF_NAT == 4)} then {write_tristate $cfg $autocfg CONFIG_IP_NF_TARGET_MASQUERADE $CONFIG_IP_NF_TARGET_MASQUERADE [list $CONFIG_IP_NF_NAT] 2 }
	global CONFIG_IP_NF_TARGET_REDIRECT
	if {($CONFIG_NET == 1) && ($CONFIG_INET == 1) && ($CONFIG_NETFILTER != 0) && ($CONFIG_IP_NF_IPTABLES != 0) && ($CONFIG_IP_NF_CONNTRACK != 0) && ($CONFIG_IP_NF_NAT != 0) && ($CONFIG_IP_NF_NAT == 1 || $CONFIG_IP_NF_NAT == 2 || $CONFIG_IP_NF_NAT == 4)} then {write_tristate $cfg $autocfg CONFIG_IP_NF_TARGET_REDIRECT $CONFIG_IP_NF_TARGET_REDIRECT [list $CONFIG_IP_NF_NAT] 2 }
	global CONFIG_IP_NF_NAT_LOCAL
	if {($CONFIG_NET == 1) && ($CONFIG_INET == 1) && ($CONFIG_NETFILTER != 0) && ($CONFIG_IP_NF_IPTABLES != 0) && ($CONFIG_IP_NF_CONNTRACK != 0) && ($CONFIG_IP_NF_NAT != 0)} then {write_tristate $cfg $autocfg CONFIG_IP_NF_NAT_LOCAL $CONFIG_IP_NF_NAT_LOCAL [list $notmod] 2 }
	global CONFIG_IP_NF_NAT_SNMP_BASIC
	if {($CONFIG_NET == 1) && ($CONFIG_INET == 1) && ($CONFIG_NETFILTER != 0) && ($CONFIG_IP_NF_IPTABLES != 0) && ($CONFIG_IP_NF_CONNTRACK != 0) && ($CONFIG_IP_NF_NAT != 0) && ($CONFIG_EXPERIMENTAL == 1) && ($CONFIG_IP_NF_NAT == 1 || $CONFIG_IP_NF_NAT == 2 || $CONFIG_IP_NF_NAT == 4)} then {write_tristate $cfg $autocfg CONFIG_IP_NF_NAT_SNMP_BASIC $CONFIG_IP_NF_NAT_SNMP_BASIC [list $CONFIG_IP_NF_NAT] 2 }
	global CONFIG_IP_NF_NAT_IRC
	if {($CONFIG_NET == 1) && ($CONFIG_INET == 1) && ($CONFIG_NETFILTER != 0) && ($CONFIG_IP_NF_IPTABLES != 0) && ($CONFIG_IP_NF_CONNTRACK != 0) && ($CONFIG_IP_NF_NAT != 0) && ($CONFIG_IP_NF_IRC == 2)} then {write_tristate $cfg $autocfg CONFIG_IP_NF_NAT_IRC $CONSTANT_M [list $notmod] 2 }
	if {($CONFIG_NET == 1) && ($CONFIG_INET == 1) && ($CONFIG_NETFILTER != 0) && ($CONFIG_IP_NF_IPTABLES != 0) && ($CONFIG_IP_NF_CONNTRACK != 0) && ($CONFIG_IP_NF_NAT != 0) && ($CONFIG_IP_NF_IRC != 2) && ($CONFIG_IP_NF_IRC == 1)} then {write_tristate $cfg $autocfg CONFIG_IP_NF_NAT_IRC $CONFIG_IP_NF_NAT [list $notmod] 2 }
	global CONFIG_IP_NF_NAT_FTP
	if {($CONFIG_NET == 1) && ($CONFIG_INET == 1) && ($CONFIG_NETFILTER != 0) && ($CONFIG_IP_NF_IPTABLES != 0) && ($CONFIG_IP_NF_CONNTRACK != 0) && ($CONFIG_IP_NF_NAT != 0) && ($CONFIG_IP_NF_FTP == 2)} then {write_tristate $cfg $autocfg CONFIG_IP_NF_NAT_FTP $CONSTANT_M [list $notmod] 2 }
	if {($CONFIG_NET == 1) && ($CONFIG_INET == 1) && ($CONFIG_NETFILTER != 0) && ($CONFIG_IP_NF_IPTABLES != 0) && ($CONFIG_IP_NF_CONNTRACK != 0) && ($CONFIG_IP_NF_NAT != 0) && ($CONFIG_IP_NF_FTP != 2) && ($CONFIG_IP_NF_FTP == 1)} then {write_tristate $cfg $autocfg CONFIG_IP_NF_NAT_FTP $CONFIG_IP_NF_NAT [list $notmod] 2 }
	global CONFIG_IP_NF_MANGLE
	if {($CONFIG_NET == 1) && ($CONFIG_INET == 1) && ($CONFIG_NETFILTER != 0) && ($CONFIG_IP_NF_IPTABLES != 0) && ($CONFIG_IP_NF_IPTABLES == 1 || $CONFIG_IP_NF_IPTABLES == 2 || $CONFIG_IP_NF_IPTABLES == 4)} then {write_tristate $cfg $autocfg CONFIG_IP_NF_MANGLE $CONFIG_IP_NF_MANGLE [list $CONFIG_IP_NF_IPTABLES] 2 }
	global CONFIG_IP_NF_TARGET_TOS
	if {($CONFIG_NET == 1) && ($CONFIG_INET == 1) && ($CONFIG_NETFILTER != 0) && ($CONFIG_IP_NF_IPTABLES != 0) && ($CONFIG_IP_NF_MANGLE != 0) && ($CONFIG_IP_NF_MANGLE == 1 || $CONFIG_IP_NF_MANGLE == 2 || $CONFIG_IP_NF_MANGLE == 4)} then {write_tristate $cfg $autocfg CONFIG_IP_NF_TARGET_TOS $CONFIG_IP_NF_TARGET_TOS [list $CONFIG_IP_NF_MANGLE] 2 }
	global CONFIG_IP_NF_TARGET_MARK
	if {($CONFIG_NET == 1) && ($CONFIG_INET == 1) && ($CONFIG_NETFILTER != 0) && ($CONFIG_IP_NF_IPTABLES != 0) && ($CONFIG_IP_NF_MANGLE != 0) && ($CONFIG_IP_NF_MANGLE == 1 || $CONFIG_IP_NF_MANGLE == 2 || $CONFIG_IP_NF_MANGLE == 4)} then {write_tristate $cfg $autocfg CONFIG_IP_NF_TARGET_MARK $CONFIG_IP_NF_TARGET_MARK [list $CONFIG_IP_NF_MANGLE] 2 }
	global CONFIG_IP_NF_TARGET_LOG
	if {($CONFIG_NET == 1) && ($CONFIG_INET == 1) && ($CONFIG_NETFILTER != 0) && ($CONFIG_IP_NF_IPTABLES != 0) && ($CONFIG_IP_NF_IPTABLES == 1 || $CONFIG_IP_NF_IPTABLES == 2 || $CONFIG_IP_NF_IPTABLES == 4)} then {write_tristate $cfg $autocfg CONFIG_IP_NF_TARGET_LOG $CONFIG_IP_NF_TARGET_LOG [list $CONFIG_IP_NF_IPTABLES] 2 }
	global CONFIG_IP_NF_TARGET_ULOG
	if {($CONFIG_NET == 1) && ($CONFIG_INET == 1) && ($CONFIG_NETFILTER != 0) && ($CONFIG_IP_NF_IPTABLES != 0) && ($CONFIG_IP_NF_IPTABLES == 1 || $CONFIG_IP_NF_IPTABLES == 2 || $CONFIG_IP_NF_IPTABLES == 4)} then {write_tristate $cfg $autocfg CONFIG_IP_NF_TARGET_ULOG $CONFIG_IP_NF_TARGET_ULOG [list $CONFIG_IP_NF_IPTABLES] 2 }
	global CONFIG_IP_NF_TARGET_TCPMSS
	if {($CONFIG_NET == 1) && ($CONFIG_INET == 1) && ($CONFIG_NETFILTER != 0) && ($CONFIG_IP_NF_IPTABLES != 0) && ($CONFIG_IP_NF_IPTABLES == 1 || $CONFIG_IP_NF_IPTABLES == 2 || $CONFIG_IP_NF_IPTABLES == 4)} then {write_tristate $cfg $autocfg CONFIG_IP_NF_TARGET_TCPMSS $CONFIG_IP_NF_TARGET_TCPMSS [list $CONFIG_IP_NF_IPTABLES] 2 }
	global CONFIG_IP_NF_ARPTABLES
	if {($CONFIG_NET == 1) && ($CONFIG_INET == 1) && ($CONFIG_NETFILTER != 0)} then {write_tristate $cfg $autocfg CONFIG_IP_NF_ARPTABLES $CONFIG_IP_NF_ARPTABLES [list $notmod] 2 }
	global CONFIG_IP_NF_ARPFILTER
	if {($CONFIG_NET == 1) && ($CONFIG_INET == 1) && ($CONFIG_NETFILTER != 0) && ($CONFIG_IP_NF_ARPTABLES != 0) && ($CONFIG_IP_NF_ARPTABLES == 1 || $CONFIG_IP_NF_ARPTABLES == 2 || $CONFIG_IP_NF_ARPTABLES == 4)} then {write_tristate $cfg $autocfg CONFIG_IP_NF_ARPFILTER $CONFIG_IP_NF_ARPFILTER [list $CONFIG_IP_NF_ARPTABLES] 2 }
	global CONFIG_IP_NF_COMPAT_IPCHAINS
	if {($CONFIG_NET == 1) && ($CONFIG_INET == 1) && ($CONFIG_NETFILTER != 0) && ($CONFIG_IP_NF_CONNTRACK != 1) && ($CONFIG_IP_NF_IPTABLES != 1)} then {write_tristate $cfg $autocfg CONFIG_IP_NF_COMPAT_IPCHAINS $CONFIG_IP_NF_COMPAT_IPCHAINS [list $notmod] 2 }
	if {($CONFIG_NET == 1) && ($CONFIG_INET == 1) && ($CONFIG_NETFILTER != 0) && ($CONFIG_IP_NF_CONNTRACK != 1) && ($CONFIG_IP_NF_IPTABLES != 1) && ($CONFIG_IP_NF_COMPAT_IPCHAINS != 0)} then {write_tristate $cfg $autocfg CONFIG_IP_NF_NAT_NEEDED $CONSTANT_Y [list $notmod] 2 }
	global CONFIG_IP_NF_COMPAT_IPFWADM
	if {($CONFIG_NET == 1) && ($CONFIG_INET == 1) && ($CONFIG_NETFILTER != 0) && ($CONFIG_IP_NF_CONNTRACK != 1) && ($CONFIG_IP_NF_IPTABLES != 1) && ($CONFIG_IP_NF_COMPAT_IPCHAINS != 1)} then {write_tristate $cfg $autocfg CONFIG_IP_NF_COMPAT_IPFWADM $CONFIG_IP_NF_COMPAT_IPFWADM [list $notmod] 2 }
	if {($CONFIG_NET == 1) && ($CONFIG_INET == 1) && ($CONFIG_NETFILTER != 0) && ($CONFIG_IP_NF_CONNTRACK != 1) && ($CONFIG_IP_NF_IPTABLES != 1) && ($CONFIG_IP_NF_COMPAT_IPCHAINS != 1) && ($CONFIG_IP_NF_COMPAT_IPFWADM != 0)} then {write_tristate $cfg $autocfg CONFIG_IP_NF_NAT_NEEDED $CONSTANT_Y [list $notmod] 2 }
	global CONFIG_IPV6
	if {($CONFIG_NET == 1) && ($CONFIG_INET == 1) && ($CONFIG_EXPERIMENTAL == 1)} then {write_tristate $cfg $autocfg CONFIG_IPV6 $CONFIG_IPV6 [list $notmod] 2 }
	if {($CONFIG_NET == 1) && ($CONFIG_INET == 1) && ($CONFIG_EXPERIMENTAL == 1) && ($CONFIG_IPV6 != 0) && ($CONFIG_NETFILTER != 0)} then {write_comment $cfg $autocfg "  IPv6: Netfilter Configuration"}
	global CONFIG_IP6_NF_QUEUE
	if {($CONFIG_NET == 1) && ($CONFIG_INET == 1) && ($CONFIG_IPV6 != 0) && ($CONFIG_NETFILTER != 0) && ($CONFIG_EXPERIMENTAL == 1)} then {write_tristate $cfg $autocfg CONFIG_IP6_NF_QUEUE $CONFIG_IP6_NF_QUEUE [list $notmod] 2 }
	global CONFIG_IP6_NF_IPTABLES
	if {($CONFIG_NET == 1) && ($CONFIG_INET == 1) && ($CONFIG_EXPERIMENTAL == 1) && ($CONFIG_IPV6 != 0) && ($CONFIG_NETFILTER != 0)} then {write_tristate $cfg $autocfg CONFIG_IP6_NF_IPTABLES $CONFIG_IP6_NF_IPTABLES [list $notmod] 2 }
	global CONFIG_IP6_NF_MATCH_LIMIT
	if {($CONFIG_NET == 1) && ($CONFIG_INET == 1) && ($CONFIG_EXPERIMENTAL == 1) && ($CONFIG_IPV6 != 0) && ($CONFIG_NETFILTER != 0) && ($CONFIG_IP6_NF_IPTABLES != 0) && ($CONFIG_IP6_NF_IPTABLES == 1 || $CONFIG_IP6_NF_IPTABLES == 2 || $CONFIG_IP6_NF_IPTABLES == 4)} then {write_tristate $cfg $autocfg CONFIG_IP6_NF_MATCH_LIMIT $CONFIG_IP6_NF_MATCH_LIMIT [list $CONFIG_IP6_NF_IPTABLES] 2 }
	global CONFIG_IP6_NF_MATCH_MAC
	if {($CONFIG_NET == 1) && ($CONFIG_INET == 1) && ($CONFIG_EXPERIMENTAL == 1) && ($CONFIG_IPV6 != 0) && ($CONFIG_NETFILTER != 0) && ($CONFIG_IP6_NF_IPTABLES != 0) && ($CONFIG_IP6_NF_IPTABLES == 1 || $CONFIG_IP6_NF_IPTABLES == 2 || $CONFIG_IP6_NF_IPTABLES == 4)} then {write_tristate $cfg $autocfg CONFIG_IP6_NF_MATCH_MAC $CONFIG_IP6_NF_MATCH_MAC [list $CONFIG_IP6_NF_IPTABLES] 2 }
	global CONFIG_IP6_NF_MATCH_MULTIPORT
	if {($CONFIG_NET == 1) && ($CONFIG_INET == 1) && ($CONFIG_EXPERIMENTAL == 1) && ($CONFIG_IPV6 != 0) && ($CONFIG_NETFILTER != 0) && ($CONFIG_IP6_NF_IPTABLES != 0) && ($CONFIG_IP6_NF_IPTABLES == 1 || $CONFIG_IP6_NF_IPTABLES == 2 || $CONFIG_IP6_NF_IPTABLES == 4)} then {write_tristate $cfg $autocfg CONFIG_IP6_NF_MATCH_MULTIPORT $CONFIG_IP6_NF_MATCH_MULTIPORT [list $CONFIG_IP6_NF_IPTABLES] 2 }
	global CONFIG_IP6_NF_MATCH_OWNER
	if {($CONFIG_NET == 1) && ($CONFIG_INET == 1) && ($CONFIG_IPV6 != 0) && ($CONFIG_NETFILTER != 0) && ($CONFIG_IP6_NF_IPTABLES != 0) && ($CONFIG_EXPERIMENTAL == 1) && ($CONFIG_IP6_NF_IPTABLES == 1 || $CONFIG_IP6_NF_IPTABLES == 2 || $CONFIG_IP6_NF_IPTABLES == 4)} then {write_tristate $cfg $autocfg CONFIG_IP6_NF_MATCH_OWNER $CONFIG_IP6_NF_MATCH_OWNER [list $CONFIG_IP6_NF_IPTABLES] 2 }
	global CONFIG_IP6_NF_MATCH_MARK
	if {($CONFIG_NET == 1) && ($CONFIG_INET == 1) && ($CONFIG_EXPERIMENTAL == 1) && ($CONFIG_IPV6 != 0) && ($CONFIG_NETFILTER != 0) && ($CONFIG_IP6_NF_IPTABLES != 0) && ($CONFIG_IP6_NF_IPTABLES == 1 || $CONFIG_IP6_NF_IPTABLES == 2 || $CONFIG_IP6_NF_IPTABLES == 4)} then {write_tristate $cfg $autocfg CONFIG_IP6_NF_MATCH_MARK $CONFIG_IP6_NF_MATCH_MARK [list $CONFIG_IP6_NF_IPTABLES] 2 }
	global CONFIG_IP6_NF_FILTER
	if {($CONFIG_NET == 1) && ($CONFIG_INET == 1) && ($CONFIG_EXPERIMENTAL == 1) && ($CONFIG_IPV6 != 0) && ($CONFIG_NETFILTER != 0) && ($CONFIG_IP6_NF_IPTABLES != 0) && ($CONFIG_IP6_NF_IPTABLES == 1 || $CONFIG_IP6_NF_IPTABLES == 2 || $CONFIG_IP6_NF_IPTABLES == 4)} then {write_tristate $cfg $autocfg CONFIG_IP6_NF_FILTER $CONFIG_IP6_NF_FILTER [list $CONFIG_IP6_NF_IPTABLES] 2 }
	global CONFIG_IP6_NF_TARGET_LOG
	if {($CONFIG_NET == 1) && ($CONFIG_INET == 1) && ($CONFIG_EXPERIMENTAL == 1) && ($CONFIG_IPV6 != 0) && ($CONFIG_NETFILTER != 0) && ($CONFIG_IP6_NF_IPTABLES != 0) && ($CONFIG_IP6_NF_FILTER != 0) && ($CONFIG_IP6_NF_FILTER == 1 || $CONFIG_IP6_NF_FILTER == 2 || $CONFIG_IP6_NF_FILTER == 4)} then {write_tristate $cfg $autocfg CONFIG_IP6_NF_TARGET_LOG $CONFIG_IP6_NF_TARGET_LOG [list $CONFIG_IP6_NF_FILTER] 2 }
	global CONFIG_IP6_NF_MANGLE
	if {($CONFIG_NET == 1) && ($CONFIG_INET == 1) && ($CONFIG_EXPERIMENTAL == 1) && ($CONFIG_IPV6 != 0) && ($CONFIG_NETFILTER != 0) && ($CONFIG_IP6_NF_IPTABLES != 0) && ($CONFIG_IP6_NF_IPTABLES == 1 || $CONFIG_IP6_NF_IPTABLES == 2 || $CONFIG_IP6_NF_IPTABLES == 4)} then {write_tristate $cfg $autocfg CONFIG_IP6_NF_MANGLE $CONFIG_IP6_NF_MANGLE [list $CONFIG_IP6_NF_IPTABLES] 2 }
	global CONFIG_IP6_NF_TARGET_MARK
	if {($CONFIG_NET == 1) && ($CONFIG_INET == 1) && ($CONFIG_EXPERIMENTAL == 1) && ($CONFIG_IPV6 != 0) && ($CONFIG_NETFILTER != 0) && ($CONFIG_IP6_NF_IPTABLES != 0) && ($CONFIG_IP6_NF_MANGLE != 0) && ($CONFIG_IP6_NF_MANGLE == 1 || $CONFIG_IP6_NF_MANGLE == 2 || $CONFIG_IP6_NF_MANGLE == 4)} then {write_tristate $cfg $autocfg CONFIG_IP6_NF_TARGET_MARK $CONFIG_IP6_NF_TARGET_MARK [list $CONFIG_IP6_NF_MANGLE] 2 }
	global CONFIG_KHTTPD
	if {($CONFIG_NET == 1) && ($CONFIG_INET == 1) && ($CONFIG_EXPERIMENTAL == 1)} then {write_tristate $cfg $autocfg CONFIG_KHTTPD $CONFIG_KHTTPD [list $notmod] 2 }
	global CONFIG_ATM
	if {($CONFIG_NET == 1) && ($CONFIG_EXPERIMENTAL == 1)} then {write_tristate $cfg $autocfg CONFIG_ATM $CONFIG_ATM [list $notmod] 2 }
	global CONFIG_ATM_CLIP
	if {($CONFIG_NET == 1) && ($CONFIG_EXPERIMENTAL == 1) && ($CONFIG_ATM == 1) && ($CONFIG_INET == 1)} then {write_tristate $cfg $autocfg CONFIG_ATM_CLIP $CONFIG_ATM_CLIP [list $notmod] 2 }
	global CONFIG_ATM_CLIP_NO_ICMP
	if {($CONFIG_NET == 1) && ($CONFIG_EXPERIMENTAL == 1) && ($CONFIG_ATM == 1) && ($CONFIG_INET == 1) && ($CONFIG_ATM_CLIP == 1)} then {write_tristate $cfg $autocfg CONFIG_ATM_CLIP_NO_ICMP $CONFIG_ATM_CLIP_NO_ICMP [list $notmod] 2 }
	global CONFIG_ATM_LANE
	if {($CONFIG_NET == 1) && ($CONFIG_EXPERIMENTAL == 1) && ($CONFIG_ATM == 1)} then {write_tristate $cfg $autocfg CONFIG_ATM_LANE $CONFIG_ATM_LANE [list $notmod] 2 }
	global CONFIG_ATM_MPOA
	if {($CONFIG_NET == 1) && ($CONFIG_EXPERIMENTAL == 1) && ($CONFIG_ATM == 1) && ($CONFIG_INET == 1 && $CONFIG_ATM_LANE != 0)} then {write_tristate $cfg $autocfg CONFIG_ATM_MPOA $CONFIG_ATM_MPOA [list $notmod] 2 }
	global CONFIG_ATM_BR2684
	if {($CONFIG_NET == 1) && ($CONFIG_EXPERIMENTAL == 1) && ($CONFIG_ATM == 1)} then {write_tristate $cfg $autocfg CONFIG_ATM_BR2684 $CONFIG_ATM_BR2684 [list $notmod] 2 }
	global CONFIG_ATM_BR2684_IPFILTER
	if {($CONFIG_NET == 1) && ($CONFIG_EXPERIMENTAL == 1) && ($CONFIG_ATM == 1) && ($CONFIG_ATM_BR2684 != 0)} then {write_tristate $cfg $autocfg CONFIG_ATM_BR2684_IPFILTER $CONFIG_ATM_BR2684_IPFILTER [list $notmod] 2 }
	global CONFIG_VLAN_8021Q
	if {($CONFIG_NET == 1)} then {write_tristate $cfg $autocfg CONFIG_VLAN_8021Q $CONFIG_VLAN_8021Q [list $notmod] 2 }
	if {($CONFIG_NET == 1)} then {write_comment $cfg $autocfg " "}
	global CONFIG_IPX
	if {($CONFIG_NET == 1)} then {write_tristate $cfg $autocfg CONFIG_IPX $CONFIG_IPX [list $notmod] 2 }
	global CONFIG_IPX_INTERN
	if {($CONFIG_NET == 1) && ($CONFIG_IPX != 0)} then {write_tristate $cfg $autocfg CONFIG_IPX_INTERN $CONFIG_IPX_INTERN [list $notmod] 2 }
	global CONFIG_ATALK
	if {($CONFIG_NET == 1)} then {write_tristate $cfg $autocfg CONFIG_ATALK $CONFIG_ATALK [list $notmod] 2 }
	global CONFIG_DECNET
	if {($CONFIG_NET == 1)} then {write_tristate $cfg $autocfg CONFIG_DECNET $CONFIG_DECNET [list $notmod] 2 }
	global CONFIG_DECNET_SIOCGIFCONF
	if {($CONFIG_NET == 1) && ($CONFIG_DECNET != 0)} then {write_tristate $cfg $autocfg CONFIG_DECNET_SIOCGIFCONF $CONFIG_DECNET_SIOCGIFCONF [list $notmod] 2 }
	global CONFIG_DECNET_ROUTER
	if {($CONFIG_NET == 1) && ($CONFIG_DECNET != 0) && ($CONFIG_EXPERIMENTAL == 1)} then {write_tristate $cfg $autocfg CONFIG_DECNET_ROUTER $CONFIG_DECNET_ROUTER [list $notmod] 2 }
	global CONFIG_DECNET_ROUTE_FWMARK
	if {($CONFIG_NET == 1) && ($CONFIG_DECNET != 0) && ($CONFIG_EXPERIMENTAL == 1) && ($CONFIG_DECNET_ROUTER == 1) && ($CONFIG_NETFILTER == 1)} then {write_tristate $cfg $autocfg CONFIG_DECNET_ROUTE_FWMARK $CONFIG_DECNET_ROUTE_FWMARK [list $notmod] 2 }
	global CONFIG_BRIDGE
	if {($CONFIG_NET == 1) && ($CONFIG_INET == 1 || $CONFIG_INET == 2 || $CONFIG_INET == 4)} then {write_tristate $cfg $autocfg CONFIG_BRIDGE $CONFIG_BRIDGE [list $CONFIG_INET] 2 }
	global CONFIG_X25
	if {($CONFIG_NET == 1) && ($CONFIG_EXPERIMENTAL == 1)} then {write_tristate $cfg $autocfg CONFIG_X25 $CONFIG_X25 [list $notmod] 2 }
	global CONFIG_LAPB
	if {($CONFIG_NET == 1) && ($CONFIG_EXPERIMENTAL == 1)} then {write_tristate $cfg $autocfg CONFIG_LAPB $CONFIG_LAPB [list $notmod] 2 }
	global CONFIG_LLC
	if {($CONFIG_NET == 1) && ($CONFIG_EXPERIMENTAL == 1)} then {write_tristate $cfg $autocfg CONFIG_LLC $CONFIG_LLC [list $notmod] 2 }
	global CONFIG_LLC_UI
	if {($CONFIG_NET == 1) && ($CONFIG_EXPERIMENTAL == 1) && ($CONFIG_LLC != 0)} then {write_tristate $cfg $autocfg CONFIG_LLC_UI $CONSTANT_Y [list $notmod] 2 }
	global CONFIG_NET_DIVERT
	if {($CONFIG_NET == 1) && ($CONFIG_EXPERIMENTAL == 1)} then {write_tristate $cfg $autocfg CONFIG_NET_DIVERT $CONFIG_NET_DIVERT [list $notmod] 2 }
	global CONFIG_ECONET
	if {($CONaurora.o: aurora.c \
   /home/me/kernel/linux/include/linux/module.h \
   /home/me/kernel/linux/include/linux/errno.h \
   /home/me/kernel/linux/include/linux/sched.h \
   /home/me/kernel/linux/include/linux/timer.h \
   /home/me/kernel/linux/include/linux/interrupt.h \
   /home/me/kernel/linux/include/linux/tty.h \
   /home/me/kernel/linux/include/linux/tty_flip.h \
   /home/me/kernel/linux/include/linux/major.h \
   /home/me/kernel/linux/include/linux/string.h \
   /home/me/kernel/linux/include/linux/fcntl.h \
   /home/me/kernel/linux/include/linux/mm.h \
   /home/me/kernel/linux/include/linux/kernel.h \
   /home/me/kernel/linux/include/linux/init.h \
   /home/me/kernel/linux/include/linux/tqueue.h \
   /home/me/kernel/linux/include/linux/delay.h \
   /home/me/kernel/linux/include/asm/io.h \
   /home/me/kernel/linux/include/asm/irq.h \
   /home/me/kernel/linux/include/asm/system.h \
   /home/me/kernel/linux/include/asm/segment.h \
   /home/me/kernel/linux/include/asm/bitops.h \
   /home/me/kernel/linux/include/asm/uaccess.h \
   aurora.h \
   cd180.h
aurora.h: \
   /home/me/kernel/linux/include/linux/serial.h \
   /home/me/kernel/linux/include/linux/serialP.h
	@touch aurora.h
bbc_envctrl.o: bbc_envctrl.c \
   /home/me/kernel/linux/include/linux/kernel.h \
   /home/me/kernel/linux/include/linux/sched.h \
   /home/me/kernel/linux/include/linux/slab.h \
   /home/me/kernel/linux/include/asm/unistd.h \
   bbc_i2c.h \
   max1617.h
bbc_i2c.o: bbc_i2c.c \
   /home/me/kernel/linux/include/linux/module.h \
   /home/me/kernel/linux/include/linux/kernel.h \
   /home/me/kernel/linux/include/linux/types.h \
   /home/me/kernel/linux/include/linux/slab.h \
   /home/me/kernel/linux/include/linux/sched.h \
   /home/me/kernel/linux/include/linux/wait.h \
   /home/me/kernel/linux/include/linux/delay.h \
   /home/me/kernel/linux/include/linux/init.h \
   bbc_i2c.h
bpp.o: bpp.c \
   /home/me/kernel/linux/include/linux/kernel.h \
   /home/me/kernel/linux/include/linux/module.h \
   /home/me/kernel/linux/include/linux/version.h \
   /home/me/kernel/linux/include/linux/fs.h \
   /home/me/kernel/linux/include/linux/errno.h \
   /home/me/kernel/linux/include/linux/sched.h \
   /home/me/kernel/linux/include/linux/smp_lock.h \
   /home/me/kernel/linux/include/linux/spinlock.h \
   /home/me/kernel/linux/include/linux/timer.h \
   /home/me/kernel/linux/include/linux/ioport.h \
   /home/me/kernel/linux/include/linux/major.h \
   /home/me/kernel/linux/include/linux/devfs_fs_kernel.h \
   /home/me/kernel/linux/include/asm/uaccess.h \
   /home/me/kernel/linux/include/asm/io.h \
   /home/me/kernel/linux/include/asm/system.h \
   /home/me/kernel/linux/include/asm/segment.h \
   /home/me/kernel/linux/include/linux/init.h \
   /home/me/kernel/linux/include/linux/delay.h
cpwatchdog.o: cpwatchdog.c \
   /home/me/kernel/linux/include/linux/kernel.h \
   /home/me/kernel/linux/include/linux/module.h \
   /home/me/kernel/linux/include/linux/version.h \
   /home/me/kernel/linux/include/linux/fs.h \
   /home/me/kernel/linux/include/linux/errno.h \
   /home/me/kernel/linux/include/linux/major.h \
   /home/me/kernel/linux/include/linux/init.h \
   /home/me/kernel/linux/include/linux/miscdevice.h \
   /home/me/kernel/linux/include/linux/sched.h \
   /home/me/kernel/linux/include/linux/interrupt.h \
   /home/me/kernel/linux/include/linux/ioport.h \
   /home/me/kernel/linux/include/linux/timer.h \
   /home/me/kernel/linux/include/asm/irq.h \
   /home/me/kernel/linux/include/asm/uaccess.h
display7seg.o: display7seg.c \
   /home/me/kernel/linux/include/linux/kernel.h \
   /home/me/kernel/linux/include/linux/module.h \
   /home/me/kernel/linux/include/linux/version.h \
   /home/me/kernel/linux/include/linux/fs.h \
   /home/me/kernel/linux/include/linux/errno.h \
   /home/me/kernel/linux/include/linux/major.h \
   /home/me/kernel/linux/include/linux/init.h \
   /home/me/kernel/linux/include/linux/miscdevice.h \
   /home/me/kernel/linux/include/linux/ioport.h \
   /home/me/kernel/linux/include/asm/uaccess.h
envctrl.o: envctrl.c \
   /home/me/kernel/linux/include/linux/module.h \
   /home/me/kernel/linux/include/linux/sched.h \
   /home/me/kernel/linux/include/linux/errno.h \
   /home/me/kernel/linux/include/linux/delay.h \
   /home/me/kernel/linux/include/linux/ioport.h \
   /home/me/kernel/linux/include/linux/init.h \
   /home/me/kernel/linux/include/linux/miscdevice.h \
   /home/me/kernel/linux/include/linux/mm.h \
   /home/me/kernel/linux/include/linux/slab.h \
   /home/me/kernel/linux/include/linux/kernel.h \
   /home/me/kernel/linux/include/asm/uaccess.h \
   /home/me/kernel/linux/include/asm/unistd.h \
   $(wildcard /home/me/kernel/linux/include/config/pci.h)
flash.o: flash.c \
   /home/me/kernel/linux/include/linux/module.h \
   /home/me/kernel/linux/include/linux/types.h \
   /home/me/kernel/linux/include/linux/errno.h \
   /home/me/kernel/linux/include/linux/miscdevice.h \
   /home/me/kernel/linux/include/linux/slab.h \
   /home/me/kernel/linux/include/linux/fcntl.h \
   /home/me/kernel/linux/include/linux/poll.h \
   /home/me/kernel/linux/include/linux/init.h \
   /home/me/kernel/linux/include/linux/smp_lock.h \
   /home/me/kernel/linux/include/linux/spinlock.h \
   /home/me/kernel/linux/include/asm/system.h \
   /home/me/kernel/linux/include/asm/uaccess.h \
   /home/me/kernel/linux/include/asm/pgtable.h \
   /home/me/kernel/linux/include/asm/io.h \
   $(wildcard /home/me/kernel/linux/include/config/pci.h)
jsflash.o: jsflash.c \
   /home/me/kernel/linux/include/linux/module.h \
   /home/me/kernel/linux/include/linux/types.h \
   /home/me/kernel/linux/include/linux/errno.h \
   /home/me/kernel/linux/include/linux/miscdevice.h \
   /home/me/kernel/linux/include/linux/slab.h \
   /home/me/kernel/linux/include/linux/fcntl.h \
   /home/me/kernel/linux/include/linux/poll.h \
   /home/me/kernel/linux/include/linux/init.h \
   /home/me/kernel/linux/include/linux/string.h \
   /home/me/kernel/linux/include/linux/smp_lock.h \
   /home/me/kernel/linux/include/linux/blk.h \
   /home/me/kernel/linux/include/asm/uaccess.h \
   /home/me/kernel/linux/include/asm/pgtable.h \
   /home/me/kernel/linux/include/asm/io.h
openprom.o: openprom.c \
   /home/me/kernel/linux/include/linux/module.h \
   /home/me/kernel/linux/include/linux/kernel.h \
   /home/me/kernel/linux/include/linux/sched.h \
   /home/me/kernel/linux/include/linux/errno.h \
   /home/me/kernel/linux/include/linux/slab.h \
   /home/me/kernel/linux/include/linux/string.h \
   /home/me/kernel/linux/include/linux/miscdevice.h \
   /home/me/kernel/linux/include/linux/init.h \
   /home/me/kernel/linux/include/asm/system.h \
   /home/me/kernel/linux/include/asm/uaccess.h \
   $(wildcard /home/me/kernel/linux/include/config/pci.h) \
   /home/me/kernel/linux/include/linux/pci.h
pcikbd.o: pcikbd.c \
   /home/me/kernel/linux/include/linux/module.h \
   /home/me/kernel/linux/include/linux/kernel.h \
   /home/me/kernel/linux/include/linux/sched.h \
   /home/me/kernel/linux/include/linux/interrupt.h \
   /home/me/kernel/linux/include/linux/ioport.h \
   /home/me/kernel/linux/include/linux/poll.h \
   /home/me/kernel/linux/include/linux/slab.h \
   /home/me/kernel/linux/include/linux/errno.h \
   /home/me/kernel/linux/include/linux/random.h \
   /home/me/kernel/linux/include/linux/miscdevice.h \
   /home/me/kernel/linux/include/linux/kbd_ll.h \
   /home/me/kernel/linux/include/linux/kbd_kern.h \
   /home/me/kernel/linux/include/linux/vt_kern.h \
   /home/me/kernel/linux/include/linux/delay.h \
   /home/me/kernel/linux/include/linux/spinlock.h \
   /home/me/kernel/linux/include/linux/smp_lock.h \
   /home/me/kernel/linux/include/linux/init.h \
   $(wildcard /home/me/kernel/linux/include/config/usb.h) \
   $(wildcard /home/me/kernel/linux/include/config/sparc64.h) \
   /home/me/kernel/linux/include/asm/irq.h \
   /home/me/kernel/linux/include/asm/io.h \
   /home/me/kernel/linux/include/asm/uaccess.h \
   pcikbd.h \
   sunserial.h \
   $(wildcard /home/me/kernel/linux/include/config/magic/sysrq.h)
riowatchdog.o: riowatchdog.c \
   /home/me/kernel/linux/include/linux/kernel.h \
   /home/me/kernel/linux/include/linux/module.h \
   /home/me/kernel/linux/include/linux/types.h \
   /home/me/kernel/linux/include/linux/fs.h \
   /home/me/kernel/linux/include/linux/errno.h \
   /home/me/kernel/linux/include/linux/init.h \
   /home/me/kernel/linux/include/linux/miscdevice.h \
   /home/me/kernel/linux/include/asm/io.h \
   /home/me/kernel/linux/include/asm/uaccess.h
rtc.o: rtc.c \
   /home/me/kernel/linux/include/linux/module.h \
   /home/me/kernel/linux/include/linux/types.h \
   /home/me/kernel/linux/include/linux/errno.h \
   /home/me/kernel/linux/include/linux/miscdevice.h \
   /home/me/kernel/linux/include/linux/slab.h \
   /home/me/kernel/linux/include/linux/fcntl.h \
   /home/me/kernel/linux/include/linux/poll.h \
   /home/me/kernel/linux/include/linux/init.h \
   /home/me/kernel/linux/include/linux/smp_lock.h \
   /home/me/kernel/linux/include/asm/system.h \
   /home/me/kernel/linux/include/asm/uaccess.h
sab82532.o: sab82532.c \
   /home/me/kernel/linux/include/linux/module.h \
   /home/me/kernel/linux/include/linux/errno.h \
   /home/me/kernel/linux/include/linux/signal.h \
   /home/me/kernel/linux/include/linux/sched.h \
   /home/me/kernel/linux/include/linux/timer.h \
   /home/me/kernel/linux/include/linux/interrupt.h \
   /home/me/kernel/linux/include/linux/tty.h \
   /home/me/kernel/linux/include/linux/tty_flip.h \
   /home/me/kernel/linux/include/linux/serial.h \
   /home/me/kernel/linux/include/linux/serialP.h \
   /home/me/kernel/linux/include/linux/serial_reg.h \
   /home/me/kernel/linux/include/linux/console.h \
   /home/me/kernel/linux/include/linux/major.h \
   /home/me/kernel/linux/include/linux/string.h \
   /home/me/kernel/linux/include/linux/fcntl.h \
   /home/me/kernel/linux/include/linux/ptrace.h \
   /home/me/kernel/linux/include/linux/ioport.h \
   /home/me/kernel/linux/include/linux/mm.h \
   /home/me/kernel/linux/include/linux/slab.h \
   /home/me/kernel/linux/include/linux/init.h \
   /home/me/kernel/linux/include/linux/delay.h \
   /home/me/kernel/linux/include/asm/uaccess.h \
   /home/me/kernel/linux/include/asm/irq.h \
   sunserial.h \
   $(wildcard /home/me/kernel/linux/include/config/serial/console.h) \
   $(wildcard /home/me/kernel/linux/include/config/devfs/fs.h)
su.o: su.c \
   /home/me/kernel/linux/include/linux/module.h \
   /home/me/kernel/linux/include/linux/errno.h \
   /home/me/kernel/linux/include/linux/signal.h \
   /home/me/kernel/linux/include/linux/sched.h \
   /home/me/kernel/linux/include/linux/interrupt.h \
   /home/me/kernel/linux/include/linux/tty.h \
   /home/me/kernel/linux/include/linux/tty_flip.h \
   /home/me/kernel/linux/include/linux/serial.h \
   /home/me/kernel/linux/include/linux/serialP.h \
   /home/me/kernel/linux/include/linux/serial_reg.h \
   /home/me/kernel/linux/include/linux/string.h \
   /home/me/kernel/linux/include/linux/fcntl.h \
   /home/me/kernel/linux/include/linux/ptrace.h \
   /home/me/kernel/linux/include/linux/ioport.h \
   /home/me/kernel/linux/include/linux/mm.h \
   /home/me/kernel/linux/include/linux/slab.h \
   /home/me/kernel/linux/include/linux/init.h \
   /home/me/kernel/linux/include/linux/bootmem.h \
   /home/me/kernel/linux/include/linux/delay.h \
   $(wildcard /home/me/kernel/linux/include/config/serial/console.h) \
   /home/me/kernel/linux/include/linux/console.h \
   /home/me/kernel/linux/include/linux/major.h \
   /home/me/kernel/linux/include/linux/sysrq.h \
   /home/me/kernel/linux/include/asm/system.h \
   /home/me/kernel/linux/include/asm/io.h \
   $(wildcard /home/me/kernel/linux/include/config/sparc64.h) \
   /home/me/kernel/linux/include/asm/irq.h \
   /home/me/kernel/linux/include/asm/uaccess.h \
   /home/me/kernel/linux/include/asm/bitops.h \
   sunserial.h \
   sunkbd.h \
   sunmouse.h \
   $(wildcard /home/me/kernel/linux/include/config/hard/pps.h) \
   $(wildcard /home/me/kernel/linux/include/config/devfs/fs.h) \
   $(wildcard /home/me/kernel/linux/include/config/pci.h)
sunkbd.o: sunkbd.c \
   /home/me/kernel/linux/include/linux/kernel.h \
   /home/me/kernel/linux/include/linux/sched.h \
   /home/me/kernel/linux/include/linux/tty.h \
   /home/me/kernel/linux/include/linux/*
 * BK Id: SCCS/s.addnote.c 1.7 05/18/01 15:17:23 cort
 */
/*
 * Program to hack in a PT_NOTE program header entry in an ELF file.
 * This is needed for OF on RS/6000s to load an image correctly.
 * Note that OF needs a program header entry for the note, not an
 * ELF section.
 *
 * Copyright 2000 Paul Mackerras.
 *
 * This program is free software; you can redistribute it and/or
 * modify it under the terms of the GNU General Public License
 * as published by the Free Software Foundation; either version
 * 2 of the License, or (at your option) any later version.
 *
 * Usage: addnote zImage
 */
#include <stdio.h>
#include <fcntl.h>
#include <unistd.h>
#include <string.h>

char arch[] = "PowerPC";

#define N_DESCR	6
unsigned int descr[N_DESCR] = {
#if 1
	/* values for IBM RS/6000 machines */
	0xffffffff,		/* real-mode = true */
	0x00c00000,		/* real-base, i.e. where we expect OF to be */
	0xffffffff,		/* real-size */
	0xffffffff,		/* virt-base */
	0xffffffff,		/* virt-size */
	0x4000,			/* load-base */
#else
	/* values for longtrail CHRP */
	0,			/* real-mode = false */
	0xffffffff,		/* real-base */
	0xffffffff,		/* real-size */
	0xffffffff,		/* virt-base */
	0xffffffff,		/* virt-size */
	0x00600000,		/* load-base */
#endif
};

unsigned char buf[512];

#define GET_16BE(off)	((buf[off] << 8) + (buf[(off)+1]))
#define GET_32BE(off)	((GET_16BE(off) << 16) + GET_16BE((off)+2))

#define PUT_16BE(off, v)	(buf[off] = ((v) >> 8) & 0xff, \
				 buf[(off) + 1] = (v) & 0xff)
#define PUT_32BE(off, v)	(PUT_16BE((off), (v) >> 16), \
				 PUT_16BE((off) + 2, (v)))

/* Structure of an ELF file */
#define E_IDENT		0	/* ELF header */
#define	E_PHOFF		28
#define E_PHENTSIZE	42
#define E_PHNUM		44
#define E_HSIZE		52	/* size of ELF header */

#define EI_MAGIC	0	/* offsets in E_IDENT area */
#define EI_CLASS	4
#define EI_DATA		5

#define PH_TYPE		0	/* ELF program header */
#define PH_OFFSET	4
#define PH_FILESZ	16
#define PH_HSIZE	32	/* size of program header */

#define PT_NOTE		4	/* Program header type = note */

#define ELFCLASS32	1
#define ELFDATA2MSB	2

unsigned char elf_magic[4] = { 0x7f, 'E', 'L', 'F' };

int main(int ac, char **av)
{
	int fd, n, i;
	int ph, ps, np;
	int nnote, ns;

	if (ac != 2) {
		fprintf(stderr, "Usage: %s elf-file\n", av[0]);
		exit(1);
	}
	fd = open(av[1], O_RDWR);
	if (fd < 0) {
		perror(av[1]);
		exit(1);
	}

	nnote = strlen(arch) + 1 + (N_DESCR + 3) * 4;

	n = read(fd, buf, sizeof(buf));
	if (n < 0) {
		perror("read");
		exit(1);
	}

	if (n < E_HSIZE || memcmp(&buf[E_IDENT+EI_MAGIC], elf_magic, 4) != 0)
		goto notelf;

	if (buf[E_IDENT+EI_CLASS] != ELFCLASS32
	    || buf[E_IDENT+EI_DATA] != ELFDATA2MSB) {
		fprintf(stderr, "%s is not a big-endian 32-bit ELF image\n",
			av[1]);
		exit(1);
	}

	ph = GET_32BE(E_PHOFF);
	ps = GET_16BE(E_PHENTSIZE);
	np = GET_16BE(E_PHNUM);
	if (ph < E_HSIZE || ps < PH_HSIZE || np < 1)
		goto notelf;
	if (ph + (np + 1) * ps + nnote > n)
		goto nospace;

	for (i = 0; i < np; ++i) {
		if (GET_32BE(ph + PH_TYPE) == PT_NOTE) {
			fprintf(stderr, "%s already has a note entry\n",
				av[1]);
			exit(0);
		}
		ph += ps;
	}

	/* XXX check that the area we want to use is all zeroes */
	for (i = 0; i < ps + nnote; ++i)
		if (buf[ph + i] != 0)
			goto nospace;

	/* fill in the program header entry */
	ns = ph + ps;
	PUT_32BE(ph + PH_TYPE, PT_NOTE);
	PUT_32BE(ph + PH_OFFSET, ns);
	PUT_32BE(ph + PH_FILESZ, nnote);

	/* fill in the note area we point to */
	/* XXX we should probably make this a proper section */
	PUT_32BE(ns, strlen(arch) + 1);
	PUT_32BE(ns + 4, N_DESCR * 4);
	PUT_32BE(ns + 8, 0x1275);
	strcpy(&buf[ns + 12], arch);
	ns += 12 + strlen(arch) + 1;
	for (i = 0; i < N_DESCR; ++i)
		PUT_32BE(ns + i * 4, descr[i]);

	/* Update the number of program headers */
	PUT_16BE(E_PHNUM, np + 1);

	/* write back */
	lseek(fd, (long) 0, SEEK_SET);
	i = write(fd, buf, n);
	if (i < 0) {
		perror("write");
		exit(1);
	}
	if (i < n) {
		fprintf(stderr, "%s: write truncated\n", av[1]);
		exit(1);
	}

	exit(0);

 notelf:
	fprintf(stderr, "%s does not appear to be an ELF file\n", av[0]);
	exit(1);

 nospace:
	fprintf(stderr, "sorry, I can't find space in %s to put the note\n",
		av[0]);
	exit(1);
}
#
# ELF header field numbers
#

$e_ident	=  0;	# Identification bytes / magic number
$e_type		=  1;	# ELF file type
$e_machine	=  2;	# Target machine type
$e_version	=  3;	# File version
$e_entry	=  4;	# Start address
$e_phoff	=  5;	# Program header file offset
$e_shoff	=  6;	# Section header file offset
$e_flags	=  7;	# File flags
$e_ehsize	=  8;	# Size of ELF header
$e_phentsize	=  9;	# Size of program header
$e_phnum	= 10;	# Number of program header entries
$e_shentsize	= 11;	# Size of section header
$e_shnum	= 12;	# Number of section header entries
$e_shstrndx	= 13;	# Section header table string index

#
# Section header field numbers
#

$sh_name	=  0;	# Section name
$sh_type	=  1;	# Section header type
$sh_flags	=  2;	# Section header flags
$sh_addr	=  3;	# Virtual address
$sh_offset	=  4;	# File offset
$sh_size	=  5;	# Section size
$sh_link	=  6;	# Miscellaneous info
$sh_info	=  7;	# More miscellaneous info
$sh_addralign	=  8;	# Memory alignment
$sh_entsize	=  9;	# Entry size if this is a table
/*
 * BK Id: SCCS/s.hack-coff.c 1.8 05/18/01 06:20:29 patch
 */
/*
 * hack-coff.c - hack the header of an xcoff file to fill in
 * a few fields needed by the Open Firmware xcoff loader on
 * Power Macs but not initialized by objcopy.
 *
 * Copyright (C) Paul Mackerras 1997.
 *
 * This program is free software; you can redistribute it and/or
 * modify it under the terms of the GNU General Public License
 * as published by the Free Software Foundation; either version
 * 2 of the License, or (at your option) any later version.
 */
#include <stdio.h>
#include <unistd.h>
#include <fcntl.h>
#include "rs6000.h"

#define AOUT_MAGIC	0x010b

#define get_16be(x)	((((unsigned char *)(x))[0] << 8) \
			 + ((unsigned char *)(x))[1])
#define put_16be(x, v)	(((unsigned char *)(x))[0] = (v) >> 8, \
			 ((unsigned char *)(x))[1] = (v) & 0xff)
#define get_32be(x)	((((unsigned char *)(x))[0] << 24) \
			 + (((unsigned char *)(x))[1] << 16) \
			 + (((unsigned char *)(x))[2] << 8) \
			 + ((unsigned char *)(x))[3])

int
main(int ac, char **av)
{
    int fd;
    int i, nsect;
    int aoutsz;
    struct external_filehdr fhdr;
    AOUTHDR aout;
    struct external_scnhdr shdr;

    if (ac != 2) {
	fprintf(stderr, "Usage: hack-coff coff-file\n");
	exit(1);
    }
    if ((fd = open(av[1], 2)) == -1) {
	perror(av[2]);
	exit(1);
    }
    if (read(fd, &fhdr, sizeof(fhdr)) != sizeof(fhdr))
	goto readerr;
    i = get_16be(fhdr.f_magic);
    if (i != U802TOCMAGIC && i != U802WRMAGIC && i != U802ROMAGIC) {
	fprintf(stderr, "%s: not an xcoff file\n", av[1]);
	exit(1);
    }
    aoutsz = get_16be(fhdr.f_opthdr);
    if (read(fd, &aout, aoutsz) != aoutsz)
	goto readerr;
    nsect = get_16be(fhdr.f_nscns);
    for (i = 0; i < nsect; ++i) {
	if (read(fd, &shdr, sizeof(shdr)) != sizeof(shdr))
	    goto readerr;
	if (strcmp(shdr.s_name, ".text") == 0) {
	    put_16be(aout.o_snentry, i+1);
	    put_16be(aout.o_sntext, i+1);
	} else if (strcmp(shdr.s_name, ".data") == 0) {
	    put_16be(aout.o_sndata, i+1);
	} else if (strcmp(shdr.s_name, ".bss") == 0) {
	    put_16be(aout.o_snbss, i+1);
	}
    }
    put_16be(aout.magic, AOUT_MAGIC);
    if (lseek(fd, (long) sizeof(struct external_filehdr), 0) == -1
	|| write(fd, &aout, aoutsz) != aoutsz) {
	fprintf(stderr, "%s: write error\n", av[1]);
	exit(1);
    }
    close(fd);
    exit(0);

readerr:
    fprintf(stderr, "%s: read error or file too short\n", av[1]);
    exit(1);
}
/*
 * BK Id: SCCS/s.mknote.c 1.7 05/18/01 15:17:23 cort
 */
/*
 * Copyright (C) Cort Dougan 1999.
 *
 * This program is free software; you can redistribute it and/or
 * modify it under the terms of the GNU General Public License
 * as published by the Free Software Foundation; either version
 * 2 of the License, or (at your option) any later version.
 *
 * Generate a note section as per the CHRP specification.
 *
 */

#include <stdio.h>

#define PL(x) printf("%c%c%c%c", ((x)>>24)&0xff, ((x)>>16)&0xff, ((x)>>8)&0xff, (x)&0xff );

int main(void)
{
/* header */
	/* namesz */
	PL(strlen("PowerPC")+1);
	/* descrsz */
	PL(6*4);
	/* type */
	PL(0x1275);
	/* name */
	printf("PowerPC"); printf("%c", 0);
	
/* descriptor */
	/* real-mode */
	PL(0xffffffff);
	/* real-base */
	PL(0x00c00000);
	/* real-size */
	PL(0xffffffff);
	/* virt-base */
	PL(0xffffffff);
	/* virt-size */
	PL(0xffffffff);
	/* load-base */
	PL(0x4000);
	return 0;
}
/*
 * BK Id: SCCS/s.mkprep.c 1.7 05/18/01 06:20:29 patch
 */
/*
 * Makes a prep bootable image which can be dd'd onto
 * a disk device to make a bootdisk.  Will take
 * as input a elf executable, strip off the header
 * and write out a boot image as:
 * 1) default - strips elf header
 *      suitable as a network boot image
 * 2) -pbp - strips elf header and writes out prep boot partition image
 *      cat or dd onto disk for booting
 * 3) -asm - strips elf header and writes out as asm data
 *      useful for generating data for a compressed image
 *                  -- Cort
 *
 * Modified for x86 hosted builds by Matt Porter <porter@neta.com>
 */

#include <fcntl.h>
#include <stdio.h>
#include <stdlib.h>
#include <string.h>
#include <sys/stat.h>
#include <unistd.h>

#define cpu_to_le32(x) le32_to_cpu((x))
unsigned long le32_to_cpu(unsigned long x)
{
     	return (((x & 0x000000ffU) << 24) |
		((x & 0x0000ff00U) <<  8) |
		((x & 0x00ff0000U) >>  8) |
		((x & 0xff000000U) >> 24));
}


#define cpu_to_le16(x) le16_to_cpu((x))
unsigned short le16_to_cpu(unsigned short x)
{
	return (((x & 0x00ff) << 8) |
		((x & 0xff00) >> 8));
}

#define cpu_to_be32(x) (x)
#define be32_to_cpu(x) (x)
#define cpu_to_be16(x) (x)
#define be16_to_cpu(x) (x)

/* size of read buffer */
#define SIZE 0x1000


typedef unsigned long dword_t;
typedef unsigned short word_t;
typedef unsigned char byte_t;
typedef byte_t block_t[512];
typedef byte_t page_t[4096];


/*
 * Partition table entry
 *  - from the PReP spec
 */
typedef struct partition_entry {
  byte_t	boot_indicator;
  byte_t	starting_head;
  byte_t	starting_sector;
  byte_t	starting_cylinder;

  byte_t	system_indicator;
  byte_t	ending_head;
  byte_t	ending_sector;
  byte_t	ending_cylinder;

  dword_t	beginning_sector;
  dword_t	number_of_sectors;
} partition_entry_t;

#define BootActive	0x80
#define SystemPrep	0x41

void copy_image(int , int);
void write_prep_partition(int , int );
void write_asm_data( int in, int out );

unsigned int elfhdr_size = 65536;

int main(int argc, char *argv[])
{
  int in_fd, out_fd;
  int argptr = 1;
  unsigned int prep = 0;
  unsigned int asmoutput = 0;

  if ( (argc < 3) || (argc > 4) )
  {
    fprintf(stderr, "usage: %s [-pbp] [-asm] <boot-file> <image>\n",argv[0]);
    exit(-1);
  }

  /* needs to handle args more elegantly -- but this is a small/simple program */
  
  /* check for -pbp */
  if ( !strcmp( argv[argptr], "-pbp" ) )
  {
    prep = 1;
    argptr++;
  }
  
  /* check for -asm */
  if ( !strcmp( argv[argptr], "-asm" ) )
  {
    asmoutput = 1;
    argptr++;
  }

  /* input file */
  if ( !strcmp( argv[argptr], "-" ) )
    in_fd = 0;			/* stdin */
  else
    if ((in_fd = open( argv[argptr] , 0)) < 0)
      exit(-1);
  argptr++;

  /* output file */
  if ( !strcmp( argv[argptr], "-" ) )
    out_fd = 1;			/* stdout */
  else
    if ((out_fd = creat( argv[argptr] , 0755)) < 0)
      exit(-1);
  argptr++;

  /* skip elf header in input file */
  /*if ( !prep )*/
  lseek(in_fd, elfhdr_size, SEEK_SET);
  
  /* write prep partition if necessary */
  if ( prep )
	  write_prep_partition( in_fd, out_fd );

  /* write input image to bootimage */
  if ( asmoutput )
	  write_asm_data( in_fd, out_fd );
  else
	  copy_image(in_fd, out_fd);
  
  return 0;
}

void write_prep_partition(int in, int out)
{
  unsigned char block[512];
  partition_entry_t *pe = (partition_entry_t *)&block[0x1BE];
  dword_t *entry  = (dword_t *)&block[0];
  dword_t *length = (dword_t *)&block[sizeof(long)];
  struct stat info;
  
  if (fstat(in, &info) < 0)
  {
    fprintf(stderr,"info failed\n");
    exit(-1);
  }
  
  bzero( block, sizeof block );
 
  /* set entry point and boot image size skipping over elf header */
#ifdef __i386__
  *entry = 0x400/*+65536*/;
  *length = info.st_size-elfhdr_size+0x400;
#else
  *entry = cpu_to_le32(0x400/*+65536*/);
  *length = cpu_to_le32(info.st_size-elfhdr_size+0x400);
#endif /* __i386__ */

  /* sets magic number for msdos partition (used by linux) */
  block[510] = 0x55;
  block[511] = 0xAA;
  
  /*
   * Build a "PReP" partition table entry in the boot record
   *  - "PReP" may only look at the system_indicator
   */
  pe->boot_indicator   = BootActive;
  pe->system_indicator = SystemPrep;
  /*
   * The first block of the diskette is used by this "boot record" which
   * actually contains the partition table. (The first block of the
   * partition contains the boot image, but I digress...)  We'll set up
   * one partition on the diskette and it shall contain the rest of the
   * diskette.
   */
  pe->starting_head     = 0;	/* zero-based			     */
  pe->starting_sector   = 2;	/* one-based			     */
  pe->starting_cylinder = 0;	/* zero-based			     */
  pe->ending_head       = 1;	/* assumes two heads		     */
  pe->ending_sector     = 18;	/* assumes 18 sectors/track	     */
  pe->ending_cylinder   = 79;	/* assumes 80 cylinders/diskette     */

  /*
   * The "PReP" software ignores the above fields and just looks at
   * the next two.
   *   - size of the diskette is (assumed to be)
   *     (2 tracks/cylinder)(18 sectors/tracks)(80 cylinders/diskette)
   *   - unlike the above sector numbers, the beginning sector is zero-based!
   */
#if 0
  pe->beginning_sector  = cpu_to_le32(1);
#else
  /* This has to be 0 on the PowerStack? */   
#ifdef __i386__
  pe->beginning_sector  = 0;
#else
  pe->beginning_sector  = cpu_to_le32(0);
#endif /* __i386__ */
#endif    

#ifdef __i386__
  pe->number_of_sectors = 2*18*80-1;
#else
  pe->number_of_sectors = cpu_to_le32(2*18*80-1);
#endif /* __i386__ */

  write( out, block, sizeof(block) );
  write( out, entry, sizeof(*entry) );
  write( out, length, sizeof(*length) );  
  /* set file position to 2nd sector where image will be written */
  lseek( out, 0x400, SEEK_SET );
}



void
copy_image(int in, int out)
{
  char buf[SIZE];
  int n;

  while ( (n = read(in, buf, SIZE)) > 0 )
    write(out, buf, n);
}


void
write_asm_data( int in, int out )
{
  int i, cnt, pos, len;
  unsigned int cksum, val;
  unsigned char *lp;
  unsigned char buf[SIZE];
  unsigned char str[256];
  
  write( out, "\t.data\n\t.globl input_data\ninput_data:\n",
	 strlen( "\t.data\n\t.globl input_data\ninput_data:\n" ) );
  pos = 0;
  cksum = 0;
  while ((len = read(in, buf, sizeof(buf))) > 0)
  {
    cnt = 0;
    lp = (unsigned char *)buf;
    len = (len + 3) & ~3;  /* Round up to longwords */
    for (i = 0;  i < len;  i += 4)
    {
      if (cnt == 0)
      {
	write( out, "\t.long\t", strlen( "\t.long\t" ) );
      }
      sprintf( str, "0x%02X%02X%02X%02X", lp[0], lp[1], lp[2], lp[3]);
      write( out, str, strlen(str) );
      val = *(unsigned long *)lp;
      cksum ^= val;
      lp += 4;
      if (++cnt == 4)
      {
	cnt = 0;
	sprintf( str, " # %x \n", pos+i-12);
	write( out, str, strlen(str) );
      } else
      {
	write( out, ",", 1 );
      }
    }
    if (cnt)
    {
      write( out, "0\n", 2 );
    }
    pos += len;
  }
  sprintf(str, "\t.globl input_len\ninput_len:\t.long\t0x%x\n", pos);
  write( out, str, strlen(str) );

  fprintf(stderr, "cksum = %x\n", cksum);
}
#
# Makefile for some libs needed by zImage.
#

L_TARGET := zlib.a

obj-y := zlib.o

include $(TOPDIR)/Rules.make
/tty_flip.h \
   /home/me/kernel/linux/include/linux/mm.h \
   /home/me/kernel/linux/include/linux/ptrace.h \
   /home/me/kernel/linux/include/linux/signal.h \
   /home/me/kernel/linux/include/linux/string.h \
   /home/me/kernel/linux/include/linux/fcntl.h \
   /home/me/kernel/linux/include/linux/poll.h \
   /home/me/kernel/linux/include/linux/random.h \
   /home/me/kernel/linux/include/linux/delay.h \
   /home/me/kernel/linux/include/linux/init.h \
   /home/me/kernel/linux/include/linux/sysrq.h \
   /home/me/kernel/linux/include/linux/spinlock.h \
   /home/me/kernel/linux/include/linux/smp_lock.h \
   /home/me/kernel/linux/include/linux/devfs_fs_kernel.h \
   /home/me/kernel/linux/include/asm/bitops.h \
   /home/me/kernel/linux/include/asm/uaccess.h \
   /home/me/kernel/linux/include/linux/kbd_kern.h \
   /home/me/kernel/linux/include/linux/kbd_diacr.h \
   /home/me/kernel/linux/include/linux/vt_kern.h \
   $(wildcard /home/me/kernel/linux/include/config/pci.h) \
   /home/me/kernel/linux/include/linux/pci.h \
   sunkbd.h \
   $(wildcard /home/me/kernel/linux/include/config/magic/sysrq.h) \
   $(wildcard /home/me/kernel/linux/include/config/sparc32/compat.h)
sunkbd.h: \
   $(wildcard /home/me/kernel/linux/include/config/pci.h)
	@touch sunkbd.h
sunkbdmap.o: sunkbdmap.c \
   $(wildcard /home/me/kernel/linux/include/config/pci.h) \
   sunkeymap.c
sunkeymap.o: sunkeymap.c \
   /home/me/kernel/linux/include/linux/types.h \
   /home/me/kernel/linux/include/linux/keyboard.h \
   /home/me/kernel/linux/include/linux/kd.h
sunmouse.o: sunmouse.c \
   /home/me/kernel/linux/include/linux/kernel.h \
   /home/me/kernel/linux/include/linux/sched.h \
   /home/me/kernel/linux/include/linux/fcntl.h \
   /home/me/kernel/linux/include/linux/signal.h \
   /home/me/kernel/linux/include/linux/timer.h \
   /home/me/kernel/linux/include/linux/errno.h \
   /home/me/kernel/linux/include/linux/miscdevice.h \
   /home/me/kernel/linux/include/linux/mm.h \
   /home/me/kernel/linux/include/linux/poll.h \
   /home/me/kernel/linux/include/linux/spinlock.h \
   /home/me/kernel/linux/include/linux/smp_lock.h \
   /home/me/kernel/linux/include/linux/init.h \
   /home/me/kernel/linux/include/asm/uaccess.h \
   /home/me/kernel/linux/include/asm/system.h \
   /home/me/kernel/linux/include/linux/random.h \
   $(wildcard /home/me/kernel/linux/include/config/sparc32/compat.h)
sunserial.o: sunserial.c \
   /home/me/kernel/linux/include/linux/kernel.h \
   /home/me/kernel/linux/include/linux/sched.h \
   /home/me/kernel/linux/include/linux/module.h \
   /home/me/kernel/linux/include/linux/errno.h \
   /home/me/kernel/linux/include/linux/tty.h \
   /home/me/kernel/linux/include/linux/serial.h \
   /home/me/kernel/linux/include/linux/serialP.h \
   /home/me/kernel/linux/include/linux/string.h \
   /home/me/kernel/linux/include/linux/kbd_diacr.h \
   /home/me/kernel/linux/include/linux/version.h \
   /home/me/kernel/linux/include/linux/init.h \
   /home/me/kernel/linux/include/linux/bootmem.h \
   sunserial.h \
   $(wildcard /home/me/kernel/linux/include/config/usb.h) \
   $(wildcard /home/me/kernel/linux/include/config/pci.h) \
   $(wildcard /home/me/kernel/linux/include/config/sab82532.h)
sunserial.h: \
   /home/me/kernel/linux/include/linux/tty.h \
   /home/me/kernel/linux/include/linux/kd.h \
   /home/me/kernel/linux/include/linux/kbd_kern.h \
   /home/me/kernel/linux/include/linux/console.h \
   $(wildcard /home/me/kernel/linux/include/config/pci.h)
	@touch sunserial.h
uctrl.o: uctrl.c \
   /home/me/kernel/linux/include/linux/module.h \
   /home/me/kernel/linux/include/linux/sched.h \
   /home/me/kernel/linux/include/linux/errno.h \
   /home/me/kernel/linux/include/linux/delay.h \
   /home/me/kernel/linux/include/linux/interrupt.h \
   /home/me/kernel/linux/include/linux/slab.h \
   /home/me/kernel/linux/include/linux/ioport.h \
   /home/me/kernel/linux/include/linux/init.h \
   /home/me/kernel/linux/include/linux/miscdevice.h \
   /home/me/kernel/linux/include/linux/mm.h \
   /home/me/kernel/linux/include/asm/system.h \
   /home/me/kernel/linux/include/asm/irq.h \
   /home/me/kernel/linux/include/asm/io.h \
   /home/me/kernel/linux/include/asm/pgtable.h
vfc.h: \
   /home/me/kernel/linux/include/linux/devfs_fs_kernel.h
	@touch vfc.h
vfc_dev.o: vfc_dev.c \
   /home/me/kernel/linux/include/linux/module.h \
   /home/me/kernel/linux/include/linux/kernel.h \
   /home/me/kernel/linux/include/linux/string.h \
   /home/me/kernel/linux/include/linux/slab.h \
   /home/me/kernel/linux/include/linux/errno.h \
   /home/me/kernel/linux/include/linux/sched.h \
   /home/me/kernel/linux/include/linux/fs.h \
   /home/me/kernel/linux/include/linux/smp_lock.h \
   /home/me/kernel/linux/include/linux/delay.h \
   /home/me/kernel/linux/include/linux/spinlock.h \
   /home/me/kernel/linux/include/asm/io.h \
   /home/me/kernel/linux/include/asm/system.h \
   /home/me/kernel/linux/include/asm/page.h \
   /home/me/kernel/linux/include/asm/pgtable.h \
   /home/me/kernel/linux/include/asm/uaccess.h \
   vfc.h
vfc_i2c.o: vfc_i2c.c \
   /home/me/kernel/linux/include/linux/kernel.h \
   /home/me/kernel/linux/include/linux/string.h \
   /home/me/kernel/linux/include/linux/slab.h \
   /home/me/kernel/linux/include/linux/errno.h \
   /home/me/kernel/linux/include/linux/sched.h \
   /home/me/kernel/linux/include/linux/wait.h \
   /home/me/kernel/linux/include/linux/delay.h \
   /home/me/kernel/linux/include/asm/io.h \
   /home/me/kernel/linux/include/asm/system.h \
   vfc.h \
   vfc_i2c.h
zs.o: zs.c \
   /home/me/kernel/linux/include/linux/errno.h \
   /home/me/kernel/linux/include/linux/signal.h \
   /home/me/kernel/linux/include/linux/sched.h \
   /home/me/kernel/linux/include/linux/timer.h \
   /home/me/kernel/linux/include/linux/interrupt.h \
   /home/me/kernel/linux/include/linux/tty.h \
   /home/me/kernel/linux/include/linux/tty_flip.h \
   /home/me/kernel/linux/include/linux/major.h \
   /home/me/kernel/linux/include/linux/string.h \
   /home/me/kernel/linux/include/linux/fcntl.h \
   /home/me/kernel/linux/include/linux/mm.h \
   /home/me/kernel/linux/include/linux/kernel.h \
   /home/me/kernel/linux/include/linux/keyboard.h \
   /home/me/kernel/linux/include/linux/console.h \
   /home/me/kernel/linux/include/linux/delay.h \
   /home/me/kernel/linux/include/linux/init.h \
   /home/me/kernel/linux/include/linux/bootmem.h \
   /home/me/kernel/linux/include/linux/sysrq.h \
   /home/me/kernel/linux/include/asm/io.h \
   /home/me/kernel/linux/include/asm/irq.h \
   /home/me/kernel/linux/include/asm/system.h \
   /home/me/kernel/linux/include/asm/uaccess.h \
   /home/me/kernel/linux/include/asm/bitops.h \
   /home/me/kernel/linux/include/asm/page.h \
   /home/me/kernel/linux/include/asm/pgtable.h \
   $(wildcard /home/me/kernel/linux/include/config/pci.h) \
   /home/me/kernel/linux/include/linux/pci.h \
   sunserial.h \
   zs.h \
   sunkbd.h \
   sunmouse.h \
   $(wildcard /home/me/kernel/linux/include/config/serial/console.h) \
   $(wildcard /home/me/kernel/linux/include/config/devfs/fs.h)
.PRECIOUS:	aurora.h \
	sunkbd.h \
	sunserial.h \
	vfc.h \

/*
 * BK Id: SCCS/s.misc.S 1.6 05/18/01 15:16:59 cort
 */
/*
 * Copyright (C) Paul Mackerras 1997.
 *
 * This program is free software; you can redistribute it and/or
 * modify it under the terms of the GNU General Public License
 * as published by the Free Software Foundation; either version
 * 2 of the License, or (at your option) any later version.
 */
	.text

/*
 * Use the BAT0 registers to map the 1st 8MB of RAM to 0x90000000.
 */
	.globl	setup_bats
setup_bats:
	mfpvr	3
	rlwinm	3,3,16,16,31		/* r3 = 1 for 601, 4 for 604 */
	cmpi	0,3,1
	lis	4,0x9000
	bne	4f
	ori	4,4,4			/* set up BAT registers for 601 */
	li	5,0x7f
	b	5f
4:	ori	4,4,0xff		/* set up BAT registers for 604 */
	li	5,2
	mtdbatu	3,4
	mtdbatl	3,5
5:	mtibatu	3,4
	mtibatl	3,5
	isync
	blr

/*
 * Flush the dcache and invalidate the icache for a range of addresses.
 *
 * flush_cache(addr, len)
 */
	.global	flush_cache
flush_cache:
	addi	4,4,0x1f	/* len = (len + 0x1f) / 0x20 */
	rlwinm.	4,4,27,5,31
	mtctr	4
	beqlr
1:	dcbf	0,3
	icbi	0,3
	addi	3,3,0x20
	bdnz	1b
	sync
	isync
	blr
/*
 * BK Id: SCCS/s.start.c 1.8 07/25/01 18:13:07 trini
 */
/*
 * Copyright (C) Paul Mackerras 1997.
 *
 * This program is free software; you can redistribute it and/or
 * modify it under the terms of the GNU General Public License
 * as published by the Free Software Foundation; either version
 * 2 of the License, or (at your option) any later version.
 */
#include <stdarg.h>

int (*prom)();

void *chosen_handle;
void *stdin;
void *stdout;
void *stderr;

void exit(void);
void *finddevice(const char *name);
int getprop(void *phandle, const char *name, void *buf, int buflen);

void printk(char *fmt, ...);

extern void chrpboot(int a1, int a2, void *prom);
extern int strlen(const char *s);

void
start(int a1, int a2, void *promptr)
{
    prom = (int (*)()) promptr;
    chosen_handle = finddevice("/chosen");
    if (chosen_handle == (void *) -1)
	exit();
    if (getprop(chosen_handle, "stdout", &stdout, sizeof(stdout)) != 4)
	exit();
    stderr = stdout;
    if (getprop(chosen_handle, "stdin", &stdin, sizeof(stdin)) != 4)
	exit();

    chrpboot(a1, a2, promptr);
    for (;;)
	exit();
}

int
write(void *handle, void *ptr, int nb)
{
    struct prom_args {
	char *service;
	int nargs;
	int nret;
	void *ihandle;
	void *addr;
	int len;
	int actual;
    } args;

    args.service = "write";
    args.nargs = 3;
    args.nret = 1;
    args.ihandle = handle;
    args.addr = ptr;
    args.len = nb;
    args.actual = -1;
    (*prom)(&args);
    return args.actual;
}

int
read(void *handle, void *ptr, int nb)
{
    struct prom_args {
	char *service;
	int nargs;
	int nret;
	void *ihandle;
	void *addr;
	int len;
	int actual;
    } args;

    args.service = "read";
    args.nargs = 3;
    args.nret = 1;
    args.ihandle = handle;
    args.addr = ptr;
    args.len = nb;
    args.actual = -1;
    (*prom)(&args);
    return args.actual;
}

void
exit(void)
{
    struct prom_args {
	char *service;
    } args;

    for (;;) {
	args.service = "exit";
	(*prom)(&args);
    }
}

void
pause(void)
{
    struct prom_args {
	char *service;
    } args;

    args.service = "enter";
    (*prom)(&args);
}

void *
finddevice(const char *name)
{
    struct prom_args {
	char *service;
	int nargs;
	int nret;
	const char *devspec;
	void *phandle;
    } args;

    args.service = "finddevice";
    args.nargs = 1;
    args.nret = 1;
    args.devspec = name;
    args.phandle = (void *) -1;
    (*prom)(&args);
    return args.phandle;
}

void *
claim(unsigned int virt, unsigned int size, unsigned int align)
{
    struct prom_args {
	char *service;
	int nargs;
	int nret;
	unsigned int virt;
	unsigned int size;
	unsigned int align;
	void *ret;
    } args;

    args.service = "claim";
    args.nargs = 3;
    args.nret = 1;
    args.virt = virt;
    args.size = size;
    args.align = align;
    (*prom)(&args);
    return args.ret;
}

int
getprop(void *phandle, const char *name, void *buf, int buflen)
{
    struct prom_args {
	char *service;
	int nargs;
	int nret;
	void *phandle;
	const char *name;
	void *buf;
	int buflen;
	int size;
    } args;

    args.service = "getprop";
    args.nargs = 4;
    args.nret = 1;
    args.phandle = phandle;
    args.name = name;
    args.buf = buf;
    args.buflen = buflen;
    args.size = -1;
    (*prom)(&args);
    return args.size;
}

int
putc(int c, void *f)
{
    char ch = c;

    if (c == '\n')
	putc('\r', f);
    return write(f, &ch, 1) == 1? c: -1;
}

int
putchar(int c)
{
    return putc(c, stdout);
}

int
fputs(char *str, void *f)
{
    int n = strlen(str);

    return write(f, str, n) == n? 0: -1;
}

int
readchar()
{
    char ch;

    for (;;) {
	switch (read(stdin, &ch, 1)) {
	case 1:
	    return ch;
	case -1:
	    printk("read(stdin) returned -1\r\n");
	    return -1;
	}
    }
}

static char line[256];
static char *lineptr;
static int lineleft;

int
getchar(void)
{
    int c;

    if (lineleft == 0) {
	lineptr = line;
	for (;;) {
	    c = readchar();
	    if (c == -1 || c == 4)
		break;
	    if (c == '\r' || c == '\n') {
		*lineptr++ = '\n';
		putchar('\n');
		break;
	    }
	    switch (c) {
	    case 0177:
	    case '\b':
		if (lineptr > line) {
		    putchar('\b');
		    putchar(' ');
		    putchar('\b');
		    --lineptr;
		}
		break;
	    case 'U' & 0x1F:
		while (lineptr > line) {
		    putchar('\b');
		    putchar(' ');
		    putchar('\b');
		    --lineptr;
		}
		break;
	    default:
		if (lineptr >= &line[sizeof(line) - 1])
		    putchar('\a');
		else {
		    putchar(c);
		    *lineptr++ = c;
		}
	    }
	}
	lineleft = lineptr - line;
	lineptr = line;
    }
    if (lineleft == 0)
	return -1;
    --lineleft;
    return *lineptr++;
}

extern int vsprintf(char *buf, const char *fmt, va_list args);
static char sprint_buf[1024];

void
printk(char *fmt, ...)
{
	va_list args;
	int n;

	va_start(args, fmt);
	n = vsprintf(sprint_buf, fmt, args);
	va_end(args);
	write(stdout, sprint_buf, n);
}

int
printf(char *fmt, ...)
{
	va_list args;
	int n;

	va_start(args, fmt);
	n = vsprintf(sprint_buf, fmt, args);
	va_end(args);
	write(stdout, sprint_buf, n);
	return n;
}
/*
 * arch/ppc/boot/common/misc-common.c
 * 
 * Misc. bootloader code (almost) all platforms can use
 *
 * Author: Johnnie Peters <jpeters@mvista.com>
 * Editor: Tom Rini <trini@mvista.com>
 *
 * Derived from arch/ppc/boot/prep/misc.c
 *
 * Copyright 2000-2001 MontaVista Software Inc.
 *
 * This program is free software; you can redistribute  it and/or modify it
 * under  the terms of  the GNU General  Public License as published by the
 * Free Software Foundation;  either version 2 of the  License, or (at your
 * option) any later version.
 *
 * THIS  SOFTWARE  IS PROVIDED   ``AS  IS'' AND   ANY  EXPRESS OR   IMPLIED
 * WARRANTIES,   INCLUDING, BUT NOT  LIMITED  TO, THE IMPLIED WARRANTIES OF
 * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN
 * NO  EVENT  SHALL   THE AUTHOR  BE    LIABLE FOR ANY   DIRECT,  INDIRECT,
 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
 * NOT LIMITED   TO, PROCUREMENT OF  SUBSTITUTE GOODS  OR SERVICES; LOSS OF
 * USE, DATA,  OR PROFITS; OR  BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON
 * ANY THEORY OF LIABILITY, WHETHER IN  CONTRACT, STRICT LIABILITY, OR TORT
 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
 * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
 *
 * You should have received a copy of the  GNU General Public License along
 * with this program; if not, write  to the Free Software Foundation, Inc.,
 * 675 Mass Ave, Cambridge, MA 02139, USA.
 */

#include <stdarg.h>	/* for va_ bits */
#include <linux/config.h>
#include "zlib.h"
#include "nonstdio.h"

/* If we're on a ALL_PPC, assume we have a keyboard controller
 * Also note, if we're not ALL_PPC, we assume you are a serial
 * console - Tom */
#if defined(CONFIG_ALL_PPC) && defined(CONFIG_VGA_CONSOLE)
extern void cursor(int x, int y);
extern void scroll(void);
extern char *vidmem;
extern int lines, cols;
extern int orig_x, orig_y;
extern int keyb_present;
extern int CRT_tstc(void);
extern int CRT_getc(void);
#else
int cursor(int x, int y) {return 0;}
void scroll(void) {}
char vidmem[1];
#define lines 0
#define cols 0
int orig_x = 0;
int orig_y = 0;
#define keyb_present 0
int CRT_tstc(void) {return 0;}
int CRT_getc(void) {return 0;}
#endif

extern char *avail_ram;
extern char *end_avail;
extern char _end[];

void puts(const char *);
void putc(const char c);
void puthex(unsigned long val);
void _bcopy(char *src, char *dst, int len);
void gunzip(void *, int, unsigned char *, int *);
static int _cvt(unsigned long val, char *buf, long radix, char *digits);

void _vprintk(void(*putc)(const char), const char *fmt0, va_list ap);
unsigned char *ISA_io = NULL;

#if defined(CONFIG_SERIAL_CONSOLE)
extern unsigned long com_port;

extern int serial_tstc(unsigned long com_port);
extern unsigned char serial_getc(unsigned long com_port);
extern void serial_putc(unsigned long com_port, unsigned char c);
#endif

void pause(void)
{
	puts("pause\n");
}

void exit(void)
{
	puts("exit\n");
	while(1); 
}

int tstc(void)
{
#if defined(CONFIG_SERIAL_CONSOLE)
	if(keyb_present)
		return (CRT_tstc() || serial_tstc(com_port));
	else
		return (serial_tstc(com_port));
#else
	return CRT_tstc();
#endif
}

int getc(void)
{
	while (1) {
#if defined(CONFIG_SERIAL_CONSOLE)
		if (serial_tstc(com_port))
			return (serial_getc(com_port));
#endif /* CONFIG_SERIAL_CONSOLE */
		if (keyb_present)
			if(CRT_tstc())
				return (CRT_getc());
	}
}

void 
putc(const char c)
{
	int x,y;

#if defined(CONFIG_SERIAL_CONSOLE)
	serial_putc(com_port, c);
	if ( c == '\n' )
		serial_putc(com_port, '\r');
#endif /* CONFIG_SERIAL_CONSOLE */

	x = orig_x;
	y = orig_y;

	if ( c == '\n' ) {
		x = 0;
		if ( ++y >= lines ) {
			scroll();
			y--;
		}
	} else if (c == '\r') {
		x = 0;
	} else if (c == '\b') {
		if (x > 0) {
			x--;
		}
	} else {
		vidmem [ ( x + cols * y ) * 2 ] = c; 
		if ( ++x >= cols ) {
			x = 0;
			if ( ++y >= lines ) {
				scroll();
				y--;
			}
		}
	}

	cursor(x, y);

	orig_x = x;
	orig_y = y;
}

void puts(const char *s)
{
	int x,y;
	char c;

	x = orig_x;
	y = orig_y;

	while ( ( c = *s++ ) != '\0' ) {
#if defined(CONFIG_SERIAL_CONSOLE)
	        serial_putc(com_port, c);
	        if ( c == '\n' ) serial_putc(com_port, '\r');
#endif /* CONFIG_SERIAL_CONSOLE */

		if ( c == '\n' ) {
			x = 0;
			if ( ++y >= lines ) {
				scroll();
				y--;
			}
		} else if (c == '\b') {
		  if (x > 0) {
		    x--;
		  }
		} else {
			vidmem [ ( x + cols * y ) * 2 ] = c; 
			if ( ++x >= cols ) {
				x = 0;
				if ( ++y >= lines ) {
					scroll();
					y--;
				}
			}
		}
	}

	cursor(x, y);

	orig_x = x;
	orig_y = y;
}

void error(char *x)
{
	puts("\n\n");
	puts(x);
	puts("\n\n -- System halted");

	while(1);	/* Halt */
}

void *zalloc(void *x, unsigned items, unsigned size)
{
	void *p = avail_ram;
	
	size *= items;
	size = (size + 7) & -8;
	avail_ram += size;
	if (avail_ram > end_avail) {
		puts("oops... out of memory\n");
		pause();
	}
	return p;
}

void zfree(void *x, void *addr, unsigned nb)
{
}

#define HEAD_CRC	2
#define EXTRA_FIELD	4
#define ORIG_NAME	8
#define COMMENT		0x10
#define RESERVED	0xe0

#define DEFLATED	8

void gunzip(void *dst, int dstlen, unsigned char *src, int *lenp)
{
	z_stream s;
	int r, i, flags;
	
	/* skip header */
	i = 10;
	flags = src[3];
	if (src[2] != DEFLATED || (flags & RESERVED) != 0) {
		puts("bad gzipped data\n");
		exit();
	}
	if ((flags & EXTRA_FIELD) != 0)
		i = 12 + src[10] + (src[11] << 8);
	if ((flags & ORIG_NAME) != 0)
		while (src[i++] != 0)
			;
	if ((flags & COMMENT) != 0)
		while (src[i++] != 0)
			;
	if ((flags & HEAD_CRC) != 0)
		i += 2;
	if (i >= *lenp) {
		puts("gunzip: ran out of data in header\n");
		exit();
	}
	
	s.zalloc = zalloc;
	s.zfree = zfree;
	r = inflateInit2(&s, -MAX_WBITS);
	if (r != Z_OK) {
		puts("inflateInit2 returned "); puthex(r); puts("\n");
		exit();
	}
	s.next_in = src + i;
	s.avail_in = *lenp - i;
	s.next_out = dst;
	s.avail_out = dstlen;
	r = inflate(&s, Z_FINISH);
	if (r != Z_OK && r != Z_STREAM_END) {
		puts("inflate returned "); puthex(r); puts("\n");
		exit();
	}
	*lenp = s.next_out - (unsigned char *) dst;
	inflateEnd(&s);
}

void
puthex(unsigned long val)
{

	unsigned char buf[10];
	int i;
	for (i = 7;  i >= 0;  i--)
	{
		buf[i] = "0123456789ABCDEF"[val & 0x0F];
		val >>= 4;
	}
	buf[8] = '\0';
	puts(buf);
}

#define FALSE 0
#define TRUE  1

void
_printk(char const *fmt, ...)
{
	va_list ap;

	va_start(ap, fmt);
	_vprintk(putc, fmt, ap);
	va_end(ap);
	return;
}

#define is_digit(c) ((c >= '0') && (c <= '9'))

void
_vprintk(void(*putc)(const char), const char *fmt0, va_list ap)
{
	char c, sign, *cp = 0;
	int left_prec, right_prec, zero_fill, length = 0, pad, pad_on_right;
	char buf[32];
	long val;
	while ((c = *fmt0++))
	{
		if (c == '%')
		{
			c = *fmt0++;
			left_prec = right_prec = pad_on_right = 0;
			if (c == '-')
			{
				c = *fmt0++;
				pad_on_right++;
			}
			if (c == '0')
			{
				zero_fill = TRUE;
				c = *fmt0++;
			} else
			{
				zero_fill = FALSE;
			}
			while (is_digit(c))
			{
				left_prec = (left_prec * 10) + (c - '0');
				c = *fmt0++;
			}
			if (c == '.')
			{
				c = *fmt0++;
				zero_fill++;
				while (is_digit(c))
				{
					right_prec = (right_prec * 10) + (c - '0');
					c = *fmt0++;
				}
			} else
			{
				right_prec = left_prec;
			}
			sign = '\0';
			switch (c)
			{
			case 'd':
			case 'x':
			case 'X':
				val = va_arg(ap, long);
				switch (c)
				{
				case 'd':
					if (val < 0)
					{
						sign = '-';
						val = -val;
					}
					length = _cvt(val, buf, 10, "0123456789");
					break;
				case 'x':
					length = _cvt(val, buf, 16, "0123456789abcdef");
					break;
				case 'X':
					length = _cvt(val, buf, 16, "0123456789ABCDEF");
					break;
				}
				cp = buf;
				break;
			case 's':
				cp = va_arg(ap, char *);
				length = strlen(cp);
				break;
			case 'c':
				c = va_arg(ap, long /*char*/);
				(*putc)(c);
				continue;
			default:
				(*putc)('?');
			}
			pad = left_prec - length;
			if (sign != '\0')
			{
				pad--;
			}
			if (zero_fill)
			{
				c = '0';
				if (sign != '\0')
				{
					(*putc)(sign);
					sign = '\0';
				}
			} else
			{
				c = ' ';
			}
			if (!pad_on_right)
			{
				while (pad-- > 0)
				{
					(*putc)(c);
				}
			}
			if (sign != '\0')
			{
				(*putc)(sign);
			}
			while (length-- > 0)
			{
				(*putc)(c = *cp++);
				if (c == '\n')
				{
					(*putc)('\r');
				}
			}
			if (pad_on_right)
			{
				while (pad-- > 0)
				{
					(*putc)(c);
				}
			}
		} else
		{
			(*putc)(c);
			if (c == '\n')
			{
				(*putc)('\r');
			}
		}
	}
}

int
_cvt(unsigned long val, char *buf, long radix, char *digits)
{
	char temp[80];
	char *cp = temp;
	int length = 0;
	if (val == 0)
	{ /* Special case */
		*cp++ = '0';
	} else
		while (val)
		{
			*cp++ = digits[val % radix];
			val /= radix;
		}
	while (cp != temp)
	{
		*buf++ = *--cp;
		length++;
	}
	*buf = '\0';
	return (length);
}

void
_dump_buf_with_offset(unsigned char *p, int s, unsigned char *base)
{
	int i, c;
	if ((unsigned int)s > (unsigned int)p)
	{
		s = (unsigned int)s - (unsigned int)p;
	}
	while (s > 0)
	{
		if (base)
		{
			_printk("%06X: ", (int)p - (int)base);
		} else
		{
			_printk("%06X: ", p);
		}
		for (i = 0;  i < 16;  i++)
		{
			if (i < s)
			{
				_printk("%02X", p[i] & 0xFF);
			} else
			{
				_printk("  ");
			}
			if ((i % 2) == 1) _printk(" ");
			if ((i % 8) == 7) _printk(" ");
		}
		_printk(" |");
		for (i = 0;  i < 16;  i++)
		{
			if (i < s)
			{
				c = p[i] & 0xFF;
				if ((c < 0x20) || (c >= 0x7F)) c = '.';
			} else
			{
				c = ' ';
			}
			_printk("%c", c);
		}
		_printk("|\n");
		s -= 16;
		p += 16;
	}
}

void
_dump_buf(unsigned char *p, int s)
{
	_printk("\n");
	_dump_buf_with_offset(p, s, 0);
}

/* Very simple inb/outb routines.  We declare ISA_io to be 0 above, and
 * then modify it on platforms which need to.  We do it like this
 * because on some platforms we give inb/outb an exact location, and
 * on others it's an offset from a given location. -- Tom
 */

void
outb(int port, unsigned char val)
{
	/* Ensure I/O operations complete */
	__asm__ volatile("eieio");
	ISA_io[port] = val;
}

unsigned char
inb(int port)
{
	/* Ensure I/O operations complete */
	__asm__ volatile("eieio");
	return (ISA_io[port]);
}

/*
 * Local variables:
 *  c-indent-level: 8
 *  c-basic-offset: 8
 *  tab-width: 8
 * End:
 */
/*
 * BK Id: SCCS/s.string.S 1.8 05/18/01 06:20:29 patch
 */
/*
 * String handling functions for PowerPC.
 *
 * Copyright (C) 1996 Paul Mackerras.
 *
 * This program is free software; you can redistribute it and/or
 * modify it under the terms of the GNU General Public License
 * as published by the Free Software Foundation; either version
 * 2 of the License, or (at your option) any later version.
 */
#define r0	0
#define r3	3
#define r4	4
#define r5	5
#define r6	6
#define r7	7
#define r8	8

	.globl	strlen
strlen:
	addi	r4,r3,-1
1:	lbzu	r0,1(r4)
	cmpwi	0,r0,0
	bne	1b
	subf	r3,r3,r4
	blr

	.globl	memset
memset:
	rlwimi	r4,r4,8,16,23
	rlwimi	r4,r4,16,0,15
	addi	r6,r3,-4
	cmplwi	0,r5,4
	blt	7f
	stwu	r4,4(r6)
	beqlr
	andi.	r0,r6,3
	add	r5,r0,r5
	subf	r6,r0,r6
	rlwinm	r0,r5,32-2,2,31
	mtctr	r0
	bdz	6f
1:	stwu	r4,4(r6)
	bdnz	1b
6:	andi.	r5,r5,3
7:	cmpwi	0,r5,0
	beqlr
	mtctr	r5
	addi	r6,r6,3
8:	stbu	r4,1(r6)
	bdnz	8b
	blr

	.globl	memmove
memmove:
	cmplw	0,r3,r4
	bgt	backwards_memcpy
	/* fall through */

	.globl	memcpy
memcpy:
	rlwinm.	r7,r5,32-3,3,31		/* r0 = r5 >> 3 */
	addi	r6,r3,-4
	addi	r4,r4,-4
	beq	2f			/* if less than 8 bytes to do */
	andi.	r0,r6,3			/* get dest word aligned */
	mtctr	r7
	bne	5f
1:	lwz	r7,4(r4)
	lwzu	r8,8(r4)
	stw	r7,4(r6)
	stwu	r8,8(r6)
	bdnz	1b
	andi.	r5,r5,7
2:	cmplwi	0,r5,4
	blt	3f
	lwzu	r0,4(r4)
	addi	r5,r5,-4
	stwu	r0,4(r6)
3:	cmpwi	0,r5,0
	beqlr
	mtctr	r5
	addi	r4,r4,3
	addi	r6,r6,3
4:	lbzu	r0,1(r4)
	stbu	r0,1(r6)
	bdnz	4b
	blr
5:	subfic	r0,r0,4
	mtctr	r0
6:	lbz	r7,4(r4)
	addi	r4,r4,1
	stb	r7,4(r6)
	addi	r6,r6,1
	bdnz	6b
	subf	r5,r0,r5
	rlwinm.	r7,r5,32-3,3,31
	beq	2b
	mtctr	r7
	b	1b

	.globl	backwards_memcpy
backwards_memcpy:
	rlwinm.	r7,r5,32-3,3,31		/* r0 = r5 >> 3 */
	add	r6,r3,r5
	add	r4,r4,r5
	beq	2f
	andi.	r0,r6,3
	mtctr	r7
	bne	5f
1:	lwz	r7,-4(r4)
	lwzu	r8,-8(r4)
	stw	r7,-4(r6)
	stwu	r8,-8(r6)
	bdnz	1b
	andi.	r5,r5,7
2:	cmplwi	0,r5,4
	blt	3f
	lwzu	r0,-4(r4)
	subi	r5,r5,4
	stwu	r0,-4(r6)
3:	cmpwi	0,r5,0
	beqlr
	mtctr	r5
4:	lbzu	r0,-1(r4)
	stbu	r0,-1(r6)
	bdnz	4b
	blr
5:	mtctr	r0
6:	lbzu	r7,-1(r4)
	stbu	r7,-1(r6)
	bdnz	6b
	subf	r5,r0,r5
	rlwinm.	r7,r5,32-3,3,31
	beq	2b
	mtctr	r7
	b	1b

	.globl	memcmp
memcmp:
	cmpwi	0,r5,0
	blelr
	mtctr	r5
	addi	r6,r3,-1
	addi	r4,r4,-1
1:	lbzu	r3,1(r6)
	lbzu	r0,1(r4)
	subf.	r3,r0,r3
	bdnzt	2,1b
	blr
/*
 * BK Id: SCCS/s.nonstdio.h 1.9 07/25/01 18:13:07 trini
 */
/*
 * Copyright (C) Paul Mackerras 1997.
 *
 * This program is free software; you can redistribute it and/or
 * modify it under the terms of the GNU General Public License
 * as published by the Free Software Foundation; either version
 * 2 of the License, or (at your option) any later version.
 *
 * This is sort of a catchall for I/O related functions.  Stuff that
 * wouldn't be in 'stdio.h' normally is here, and it's 'nonstdio.h'
 * for a reason.  -- Tom
 */
typedef int FILE;
extern FILE *stdin, *stdout;
#define NULL ((void *)0)
#define EOF (-1)
#define fopen(n, m) NULL
#define fflush(f) 0
#define fclose(f) 0
#define perror(s) printf("%s: no files!\n", (s))

extern int getc(void);
extern int printf(const char *format, ...);
extern int strlen(const char *s);
extern int sprintf(char *str, const char *format, ...);
extern int tstc(void);
extern void exit(void);
extern void *memcpy(void *dest, const void *src, int n);
extern void *memmove(void *dest, const void *src, int n);
extern void outb(int port, unsigned char val);
extern void putc(const char c);
extern void puthex(unsigned long val);
extern void puts(const char *);
extern void udelay(long delay);
extern unsigned char inb(int port);
/*
 * BK Id: SCCS/s.rs6000.h 1.7 05/18/01 15:17:23 cort
 */
/* IBM RS/6000 "XCOFF" file definitions for BFD.
   Copyright (C) 1990, 1991 Free Software Foundation, Inc.
   FIXME: Can someone provide a transliteration of this name into ASCII?
   Using the following chars caused a compiler warning on HIUX (so I replaced
   them with octal escapes), and isn't useful without an understanding of what
   character set it is.
   Written by Mimi Ph\373\364ng-Th\345o V\365 of IBM
   and John Gilmore of Cygnus Support.  */

/********************** FILE HEADER **********************/

struct external_filehdr {
	char f_magic[2];	/* magic number			*/
	char f_nscns[2];	/* number of sections		*/
	char f_timdat[4];	/* time & date stamp		*/
	char f_symptr[4];	/* file pointer to symtab	*/
	char f_nsyms[4];	/* number of symtab entries	*/
	char f_opthdr[2];	/* sizeof(optional hdr)		*/
	char f_flags[2];	/* flags			*/
};

        /* IBM RS/6000 */
#define U802WRMAGIC     0730    /* writeable text segments **chh**      */
#define U802ROMAGIC     0735    /* readonly sharable text segments      */
#define U802TOCMAGIC    0737    /* readonly text segments and TOC       */

#define BADMAG(x)	\
	((x).f_magic != U802ROMAGIC && (x).f_magic != U802WRMAGIC && \
	 (x).f_magic != U802TOCMAGIC)

#define	FILHDR	struct external_filehdr
#define	FILHSZ	20


/********************** AOUT "OPTIONAL HEADER" **********************/


typedef struct 
{
  unsigned char	magic[2];	/* type of file			*/
  unsigned char	vstamp[2];	/* version stamp		*/
  unsigned char	tsize[4];	/* text size in bytes, padded to FW bdry */
  unsigned char	dsize[4];	/* initialized data "  "	*/
  unsigned char	bsize[4];	/* uninitialized data "   "	*/
  unsigned char	entry[4];	/* entry pt.			*/
  unsigned char	text_start[4];	/* base of text used for this file */
  unsigned char	data_start[4];	/* base of data used for this file */
  unsigned char	o_toc[4];	/* address of TOC */
  unsigned char	o_snentry[2];	/* section number of entry point */
  unsigned char	o_sntext[2];	/* section number of .text section */
  unsigned char	o_sndata[2];	/* section number of .data section */
  unsigned char	o_sntoc[2];	/* section number of TOC */
  unsigned char	o_snloader[2];	/* section number of .loader section */
  unsigned char	o_snbss[2];	/* section number of .bss section */
  unsigned char	o_algntext[2];	/* .text alignment */
  unsigned char	o_algndata[2];	/* .data alignment */
  unsigned char	o_modtype[2];	/* module type (??) */
  unsigned char o_cputype[2];	/* cpu type */
  unsigned char	o_maxstack[4];	/* max stack size (??) */
  unsigned char o_maxdata[4];	/* max data size (??) */
  unsigned char	o_resv2[12];	/* reserved */
}
AOUTHDR;

#define AOUTSZ 72
#define SMALL_AOUTSZ (28)
#define AOUTHDRSZ 72

#define	RS6K_AOUTHDR_OMAGIC	0x0107	/* old: text & data writeable */
#define	RS6K_AOUTHDR_NMAGIC	0x0108	/* new: text r/o, data r/w */
#define	RS6K_AOUTHDR_ZMAGIC	0x010B	/* paged: text r/o, both page-aligned */


/********************** SECTION HEADER **********************/


struct external_scnhdr {
	char		s_name[8];	/* section name			*/
	char		s_paddr[4];	/* physical address, aliased s_nlib */
	char		s_vaddr[4];	/* virtual address		*/
	char		s_size[4];	/* section size			*/
	char		s_scnptr[4];	/* file ptr to raw data for section */
	char		s_relptr[4];	/* file ptr to relocation	*/
	char		s_lnnoptr[4];	/* file ptr to line numbers	*/
	char		s_nreloc[2];	/* number of relocation entries	*/
	char		s_nlnno[2];	/* number of line number entries*/
	char		s_flags[4];	/* flags			*/
};

/*
 * names of "special" sections
 */
#define _TEXT	".text"
#define _DATA	".data"
#define _BSS	".bss"
#define _PAD	".pad"
#define _LOADER	".loader"

#define	SCNHDR	struct external_scnhdr
#define	SCNHSZ	40

/* XCOFF uses a special .loader section with type STYP_LOADER.  */
#define STYP_LOADER 0x1000

/* XCOFF uses a special .debug section with type STYP_DEBUG.  */
#define STYP_DEBUG 0x2000

/* XCOFF handles line number or relocation overflow by creating
   another section header with STYP_OVRFLO set.  */
#define STYP_OVRFLO 0x8000

/********************** LINE NUMBERS **********************/

/* 1 line number entry for every "breakpointable" source line in a section.
 * Line numbers are grouped on a per function basis; first entry in a function
 * grouping will have l_lnno = 0 and in place of physical address will be the
 * symbol table index of the function name.
 */
struct external_lineno {
	union {
		char l_symndx[4];	/* function name symbol index, iff l_lnno == 0*/
		char l_paddr[4];	/* (physical) address of line number	*/
	} l_addr;
	char l_lnno[2];	/* line number		*/
};


#define	LINENO	struct external_lineno
#define	LINESZ	6


/********************** SYMBOLS **********************/

#define E_SYMNMLEN	8	/* # characters in a symbol name	*/
#define E_FILNMLEN	14	/* # characters in a file name		*/
#define E_DIMNUM	4	/* # array dimensions in auxiliary entry */

struct external_syment 
{
  union {
    char e_name[E_SYMNMLEN];
    struct {
      char e_zeroes[4];
      char e_offset[4];
    } e;
  } e;
  char e_value[4];
  char e_scnum[2];
  char e_type[2];
  char e_sclass[1];
  char e_numaux[1];
};



#define N_BTMASK	(017)
#define N_TMASK		(060)
#define N_BTSHFT	(4)
#define N_TSHIFT	(2)
  

union external_auxent {
	struct {
		char x_tagndx[4];	/* str, un, or enum tag indx */
		union {
			struct {
			    char  x_lnno[2]; /* declaration line number */
			    char  x_size[2]; /* str/union/array size */
			} x_lnsz;
			char x_fsize[4];	/* size of function */
		} x_misc;
		union {
			struct {		/* if ISFCN, tag, or .bb */
			    char x_lnnoptr[4];	/* ptr to fcn line # */
			    char x_endndx[4];	/* entry ndx past block end */
			} x_fcn;
			struct {		/* if ISARY, up to 4 dimen. */
			    char x_dimen[E_DIMNUM][2];
			} x_ary;
		} x_fcnary;
		char x_tvndx[2];		/* tv index */
	} x_sym;

	union {
		char x_fname[E_FILNMLEN];
		struct {
			char x_zeroes[4];
			char x_offset[4];
		} x_n;
	} x_file;

	struct {
		char x_scnlen[4];			/* section length */
		char x_nreloc[2];	/* # relocation entries */
		char x_nlinno[2];	/* # line numbers */
	} x_scn;

        struct {
		char x_tvfill[4];	/* tv fill value */
		char x_tvlen[2];	/* length of .tv */
		char x_tvran[2][2];	/* tv range */
	} x_tv;		/* info about .tv section (in auxent of symbol .tv)) */

	struct {
		unsigned char x_scnlen[4];
		unsigned char x_parmhash[4];
		unsigned char x_snhash[2];
		unsigned char x_smtyp[1];
		unsigned char x_smclas[1];
		unsigned char x_stab[4];
		unsigned char x_snstab[2];
	} x_csect;

};

#define	SYMENT	struct external_syment
#define	SYMESZ	18	
#define	AUXENT	union external_auxent
#define	AUXESZ	18
#define DBXMASK 0x80		/* for dbx storage mask */
#define SYMNAME_IN_DEBUG(symptr) ((symptr)->n_sclass & DBXMASK)



/********************** RELOCATION DIRECTIVES **********************/


struct external_reloc {
  char r_vaddr[4];
  char r_symndx[4];
  char r_size[1];
  char r_type[1];
};


#define RELOC struct external_reloc
#define RELSZ 10

#define DEFAULT_DATA_SECTION_ALIGNMENT 4
#define DEFAULT_BSS_SECTION_ALIGNMENT 4
#define DEFAULT_TEXT_SECTION_ALIGNMENT 4
/* For new sections we havn't heard of before */
#define DEFAULT_SECTION_ALIGNMENT 4
/*
 * BK Id: SCCS/s.zlib.h 1.8 05/18/01 15:17:23 cort
 */
/*
 * This file is derived from zlib.h and zconf.h from the zlib-0.95
 * distribution by Jean-loup Gailly and Mark Adler, with some additions
 * by Paul Mackerras to aid in implementing Deflate compression and
 * decompression for PPP packets.
 */

/*
 *  ==FILEVERSION 960122==
 *
 * This marker is used by the Linux installation script to determine
 * whether an up-to-date version of this file is already installed.
 */

/* zlib.h -- interface of the 'zlib' general purpose compression library
  version 0.95, Aug 16th, 1995.

  Copyright (C) 1995 Jean-loup Gailly and Mark Adler

  This software is provided 'as-is', without any express or implied
  warranty.  In no event will the authors be held liable for any damages
  arising from the use of this software.

  Permission is granted to anyone to use this software for any purpose,
  including commercial applications, and to alter it and redistribute it
  freely, subject to the following restrictions:

  1. The origin of this software must not be misrepresented; you must not
     claim that you wrote the original software. If you use this software
     in a product, an acknowledgment in the product documentation would be
     appreciated but is not required.
  2. Altered source versions must be plainly marked as such, and must not be
     misrepresented as being the original software.
  3. This notice may not be removed or altered from any source distribution.

  Jean-loup Gailly        Mark Adler
  gzip@prep.ai.mit.edu    madler@alumni.caltech.edu
 */

#ifndef _ZLIB_H
#define _ZLIB_H

/* #include "zconf.h" */	/* included directly here */

/* zconf.h -- configuration of the zlib compression library
 * Copyright (C) 1995 Jean-loup Gailly.
 * For conditions of distribution and use, see copyright notice in zlib.h 
 */

/* From: zconf.h,v 1.12 1995/05/03 17:27:12 jloup Exp */

/*
     The library does not install any signal handler. It is recommended to
  add at least a handler for SIGSEGV when decompressing; the library checks
  the consistency of the input data whenever possible but may go nuts
  for some forms of corrupted input.
 */

/*
 * Compile with -DMAXSEG_64K if the alloc function cannot allocate more
 * than 64k bytes at a time (needed on systems with 16-bit int).
 * Compile with -DUNALIGNED_OK if it is OK to access shorts or ints
 * at addresses which are not a multiple of their size.
 * Under DOS, -DFAR=far or -DFAR=__far may be needed.
 */

#ifndef STDC
#  if defined(MSDOS) || defined(__STDC__) || defined(__cplusplus)
#    define STDC
#  endif
#endif

#ifdef	__MWERKS__ /* Metrowerks CodeWarrior declares fileno() in unix.h */
#  include <unix.h>
#endif

/* Maximum value for memLevel in deflateInit2 */
#ifndef MAX_MEM_LEVEL
#  ifdef MAXSEG_64K
#    define MAX_MEM_LEVEL 8
#  else
#    define MAX_MEM_LEVEL 9
#  endif
#endif

#ifndef FAR
#  define FAR
#endif

/* Maximum value for windowBits in deflateInit2 and inflateInit2 */
#ifndef MAX_WBITS
#  define MAX_WBITS   15 /* 32K LZ77 window */
#endif

/* The memory requirements for deflate are (in bytes):
            1 << (windowBits+2)   +  1 << (memLevel+9)
 that is: 128K for windowBits=15  +  128K for memLevel = 8  (default values)
 plus a few kilobytes for small objects. For example, if you want to reduce
 the default memory requirements from 256K to 128K, compile with
     make CFLAGS="-O -DMAX_WBITS=14 -DMAX_MEM_LEVEL=7"
 Of course this will generally degrade compression (there's no free lunch).

   The memory requirements for inflate are (in bytes) 1 << windowBits
 that is, 32K for windowBits=15 (default value) plus a few kilobytes
 for small objects.
*/

                        /* Type declarations */

#ifndef OF /* function prototypes */
#  ifdef STDC
#    define OF(args)  args
#  else
#    define OF(args)  ()
#  endif
#endif

typedef unsigned char  Byte;  /* 8 bits */
typedef unsigned int   uInt;  /* 16 bits or more */
typedef unsigned long  uLong; /* 32 bits or more */

typedef Byte FAR Bytef;
typedef char FAR charf;
typedef int FAR intf;
typedef uInt FAR uIntf;
typedef uLong FAR uLongf;

#ifdef STDC
   typedef void FAR *voidpf;
   typedef void     *voidp;
#else
   typedef Byte FAR *voidpf;
   typedef Byte     *voidp;
#endif

/* end of original zconf.h */

#define ZLIB_VERSION "0.95P"

/* 
     The 'zlib' compression library provides in-memory compression and
  decompression functions, including integrity checks of the uncompressed
  data.  This version of the library supports only one compression method
  (deflation) but other algorithms may be added later and will have the same
  stream interface.

     For compression the application must provide the output buffer and
  may optionally provide the input buffer for optimization. For decompression,
  the application must provide the input buffer and may optionally provide
  the output buffer for optimization.

     Compression can be done in a single step if the buffers are large
  enough (for example if an input file is mmap'ed), or can be done by
  repeated calls of the compression function.  In the latter case, the
  application must provide more input and/or consume the output
  (providing more output space) before each call.
*/

typedef voidpf (*alloc_func) OF((voidpf opaque, uInt items, uInt size));
typedef void   (*free_func)  OF((voidpf opaque, voidpf address, uInt nbytes));

struct internal_state;

typedef struct z_stream_s {
    Bytef    *next_in;  /* next input byte */
    uInt     avail_in;  /* number of bytes available at next_in */
    uLong    total_in;  /* total nb of input bytes read so far */

    Bytef    *next_out; /* next output byte should be put there */
    uInt     avail_out; /* remaining free space at next_out */
    uLong    total_out; /* total nb of bytes output so far */

    char     *msg;      /* last error message, NULL if no error */
    struct internal_state FAR *state; /* not visible by applications */

    alloc_func zalloc;  /* used to allocate the internal state */
    free_func  zfree;   /* used to free the internal state */
    voidp      opaque;  /* private data object passed to zalloc and zfree */

    Byte     data_type; /* best guess about the data type: ascii or binary */

} z_stream;

/*
   The application must update next_in and avail_in when avail_in has
   dropped to zero. It must update next_out and avail_out when avail_out
   has dropped to zero. The application must initialize zalloc, zfree and
   opaque before calling the init function. All other fields are set by the
   compression library and must not be updated by the application.

   The opaque value provided by the application will be passed as the first
   parameter for calls of zalloc and zfree. This can be useful for custom
   memory management. The compression library attaches no meaning to the
   opaque value.

   zalloc must return Z_NULL if there is not enough memory for the object.
   On 16-bit systems, the functions zalloc and zfree must be able to allocate
   exactly 65536 bytes, but will not be required to allocate more than this
   if the symbol MAXSEG_64K is defined (see zconf.h). WARNING: On MSDOS,
   pointers returned by zalloc for objects of exactly 65536 bytes *must*
   have their offset normalized to zero. The default allocation function
   provided by this library ensures this (see zutil.c). To reduce memory
   requirements and avoid any allocation of 64K objects, at the expense of
   compression ratio, compile the library with -DMAX_WBITS=14 (see zconf.h).

   The fields total_in and total_out can be used for statistics or
   progress reports. After compression, total_in holds the total size of
   the uncompressed data and may be saved for use in the decompressor
   (particularly if the decompressor wants to decompress everything in
   a single step).
*/

                        /* constants */

#define Z_NO_FLUSH      0
#define Z_PARTIAL_FLUSH 1
#define Z_FULL_FLUSH    2
#define Z_SYNC_FLUSH    3 /* experimental: partial_flush + byte align */
#define Z_FINISH        4
#define Z_PACKET_FLUSH	5
/* See deflate() below for the usage of these constants */

#define Z_OK            0
#define Z_STREAM_END    1
#define Z_ERRNO        (-1)
#define Z_STREAM_ERROR (-2)
#define Z_DATA_ERROR   (-3)
#define Z_MEM_ERROR    (-4)
#define Z_BUF_ERROR    (-5)
/* error codes for the compression/decompression functions */

#define Z_BEST_SPEED             1
#define Z_BEST_COMPRESSION       9
#define Z_DEFAULT_COMPRESSION  (-1)
/* compression levels */

#define Z_FILTERED            1
#define Z_HUFFMAN_ONLY        2
#define Z_DEFAULT_STRATEGY    0

#define Z_BINARY   0
#define Z_ASCII    1
#define Z_UNKNOWN  2
/* Used to set the data_type field */

#define Z_NULL  0  /* for initializing zalloc, zfree, opaque */

extern char *zlib_version;
/* The application can compare zlib_version and ZLIB_VERSION for consistency.
   If the first character differs, the library code actually used is
   not compatible with the zlib.h header file used by the application.
 */

                        /* basic functions */

extern int inflateInit OF((z_stream *strm));
/* 
     Initializes the internal stream state for decompression. The fields
   zalloc and zfree must be initialized before by the caller.  If zalloc and
   zfree are set to Z_NULL, inflateInit updates them to use default allocation
   functions.

     inflateInit returns Z_OK if success, Z_MEM_ERROR if there was not
   enough memory.  msg is set to null if there is no error message.
   inflateInit does not perform any decompression: this will be done by
   inflate().
*/


extern int inflate OF((z_stream *strm, int flush));
/*
  Performs one or both of the following actions:

  - Decompress more input starting at next_in and update next_in and avail_in
    accordingly. If not all input can be processed (because there is not
    enough room in the output buffer), next_in is updated and processing
    will resume at this point for the next call of inflate().

  - Provide more output starting at next_out and update next_out and avail_out
    accordingly.  inflate() always provides as much output as possible
    (until there is no more input data or no more space in the output buffer).

  Before the call of inflate(), the application should ensure that at least
  one of the actions is possible, by providing more input and/or consuming
  more output, and updating the next_* and avail_* values accordingly.
  The application can consume the uncompressed output when it wants, for
  example when the output buffer is full (avail_out == 0), or after each
  call of inflate().

    If the parameter flush is set to Z_PARTIAL_FLUSH or Z_PACKET_FLUSH,
  inflate flushes as much output as possible to the output buffer. The
  flushing behavior of inflate is not specified for values of the flush
  parameter other than Z_PARTIAL_FLUSH, Z_PACKET_FLUSH or Z_FINISH, but the
  current implementation actually flushes as much output as possible
  anyway.  For Z_PACKET_FLUSH, inflate checks that once all the input data
  has been consumed, it is expecting to see the length field of a stored
  block; if not, it returns Z_DATA_ERROR.

    inflate() should normally be called until it returns Z_STREAM_END or an
  error. However if all decompression is to be performed in a single step
  (a single call of inflate), the parameter flush should be set to
  Z_FINISH. In this case all pending input is processed and all pending
  output is flushed; avail_out must be large enough to hold all the
  uncompressed data. (The size of the uncompressed data may have been saved
  by the compressor for this purpose.) The next operation on this stream must
  be inflateEnd to deallocate the decompression state. The use of Z_FINISH
  is never required, but can be used to inform inflate that a faster routine
  may be used for the single inflate() call.

    inflate() returns Z_OK if some progress has been made (more input
  processed or more output produced), Z_STREAM_END if the end of the
  compressed data has been reached and all uncompressed output has been
  produced, Z_DATA_ERROR if the input data was corrupted, Z_STREAM_ERROR if
  the stream structure was inconsistent (for example if next_in or next_out
  was NULL), Z_MEM_ERROR if there was not enough memory, Z_BUF_ERROR if no
  progress is possible or if there was not enough room in the output buffer
  when Z_FINISH is used. In the Z_DATA_ERROR case, the application may then
  call inflateSync to look for a good compression block.  */


extern int inflateEnd OF((z_stream *strm));
/*
     All dynamically allocated data structures for this stream are freed.
   This function discards any unprocessed input and does not flush any
   pending output.

     inflateEnd returns Z_OK if success, Z_STREAM_ERROR if the stream state
   was inconsistent. In the error case, msg may be set but then points to a
   static string (which must not be deallocated).
*/

                        /* advanced functions */

extern int inflateInit2 OF((z_stream *strm,
                            int  windowBits));
/*   
     This is another version of inflateInit with more compression options. The
   fields next_out, zalloc and zfree must be initialized before by the caller.

     The windowBits parameter is the base two logarithm of the maximum window
   size (the size of the history buffer).  It should be in the range 8..15 for
   this version of the library (the value 16 will be allowed soon). The
   default value is 15 if inflateInit is used instead. If a compressed stream
   with a larger window size is given as input, inflate() will return with
   the error code Z_DATA_ERROR instead of trying to allocate a larger window.

     If next_out is not null, the library will use this buffer for the history
   buffer; the buffer must either be large enough to hold the entire output
   data, or have at least 1<<windowBits bytes.  If next_out is null, the
   library will allocate its own buffer (and leave next_out null). next_in
   need not be provided here but must be provided by the application for the
   next call of inflate().

     If the history buffer is provided by the application, next_out must
   never be changed by the application since the decompressor maintains
   history information inside this buffer from call to call; the application
   can only reset next_out to the beginning of the history buffer when
   avail_out is zero and all output has been consumed.

      inflateInit2 returns Z_OK if success, Z_MEM_ERROR if there was
   not enough memory, Z_STREAM_ERROR if a parameter is invalid (such as
   windowBits < 8). msg is set to null if there is no error message.
   inflateInit2 does not perform any decompression: this will be done by
   inflate().
*/

extern int inflateSync OF((z_stream *strm));
/* 
    Skips invalid compressed data until the special marker (see deflate()
  above) can be found, or until all available input is skipped. No output
  is provided.

    inflateSync returns Z_OK if the special marker has been found, Z_BUF_ERROR
  if no more input was provided, Z_DATA_ERROR if no marker has been found,
  or Z_STREAM_ERROR if the stream structure was inconsistent. In the success
  case, the application may save the current current value of total_in which
  indicates where valid compressed data was found. In the error case, the
  application may repeatedly call inflateSync, providing more input each time,
  until success or end of the input data.
*/

extern int inflateReset OF((z_stream *strm));
/*
     This function is equivalent to inflateEnd followed by inflateInit,
   but does not free and reallocate all the internal decompression state.
   The stream will keep attributes that may have been set by inflateInit2.

      inflateReset returns Z_OK if success, or Z_STREAM_ERROR if the source
   stream state was inconsistent (such as zalloc or state being NULL).
*/

extern int inflateIncomp OF((z_stream *strm));
/*
     This function adds the data at next_in (avail_in bytes) to the output
   history without performing any output.  There must be no pending output,
   and the decompressor must be expecting to see the start of a block.
   Calling this function is equivalent to decompressing a stored block
   containing the data at next_in (except that the data is not output).
*/

                        /* checksum functions */

/*
     This function is not related to compression but is exported
   anyway because it might be useful in applications using the
   compression library.
*/

extern uLong adler32 OF((uLong adler, Bytef *buf, uInt len));

/*
     Update a running Adler-32 checksum with the bytes buf[0..len-1] and
   return the updated checksum. If buf is NULL, this function returns
   the required initial value for the checksum.
   An Adler-32 checksum is almost as reliable as a CRC32 but can be computed
   much faster. Usage example:

     uLong adler = adler32(0L, Z_NULL, 0);

     while (read_buffer(buffer, length) != EOF) {
       adler = adler32(adler, buffer, length);
     }
     if (adler != original_adler) error();
*/

#ifndef _Z_UTIL_H
    struct internal_state {int dummy;}; /* hack for buggy compilers */
#endif

#endif /* _ZLIB_H */
#
# Automatically generated make config: don't edit
#
# CONFIG_UID16 is not set
# CONFIG_RWSEM_GENERIC_SPINLOCK is not set
CONFIG_RWSEM_XCHGADD_ALGORITHM=y
CONFIG_HAVE_DEC_LOCK=y

#
# Code maturity level options
#
CONFIG_EXPERIMENTAL=y

#
# Loadable module support
#
CONFIG_MODULES=y
CONFIG_MODVERSIONS=y
CONFIG_KMOD=y

#
# Platform support
#
CONFIG_PPC=y
CONFIG_PPC32=y
CONFIG_6xx=y
# CONFIG_4xx is not set
# CONFIG_POWER3 is not set
# CONFIG_POWER4 is not set
# CONFIG_8xx is not set
# CONFIG_8260 is not set
CONFIG_PPC_STD_MMU=y
CONFIG_ALL_PPC=y
# CONFIG_APUS is not set
# CONFIG_GEMINI is not set
# CONFIG_SMP is not set
CONFIG_ALTIVEC=y
CONFIG_TAU=y
# CONFIG_TAU_INT is not set
# CONFIG_TAU_AVERAGE is not set

#
# General setup
#
# CONFIG_HIGHMEM is not set
# CONFIG_ISA is not set
# CONFIG_EISA is not set
# CONFIG_SBUS is not set
# CONFIG_MCA is not set
CONFIG_PCI=y
CONFIG_NET=y
CONFIG_SYSCTL=y
CONFIG_SYSVIPC=y
# CONFIG_BSD_PROCESS_ACCT is not set
CONFIG_KCORE_ELF=y
CONFIG_BINFMT_ELF=y
CONFIG_KERNEL_ELF=y
CONFIG_BINFMT_MISC=m
CONFIG_PCI_NAMES=y
CONFIG_HOTPLUG=y

#
# PCMCIA/CardBus support
#
# CONFIG_PCMCIA is not set

#
# Parallel port support
#
# CONFIG_PARPORT is not set
CONFIG_PPC_RTC=y
CONFIG_PPC601_SYNC_FIX=y
CONFIG_PROC_DEVICETREE=y
CONFIG_PPC_RTAS=y
CONFIG_BOOTX_TEXT=y
CONFIG_PREP_RESIDUAL=y
CONFIG_CMDLINE_BOOL=y
CONFIG_CMDLINE="console=ttyS0,9600 console=tty0 root=/dev/sda2"

#
# Memory Technology Devices (MTD)
#
# CONFIG_MTD is not set

#
# Plug and Play configuration
#
# CONFIG_PNP is not set
# CONFIG_ISAPNP is not set

#
# Block devices
#
CONFIG_BLK_DEV_FD=m
# CONFIG_BLK_DEV_XD is not set
# CONFIG_PARIDE is not set
# CONFIG_BLK_CPQ_DA is not set
# CONFIG_BLK_CPQ_CISS_DA is not set
# CONFIG_BLK_DEV_DAC960 is not set
CONFIG_BLK_DEV_LOOP=y
# CONFIG_BLK_DEV_NBD is not set
CONFIG_BLK_DEV_RAM=y
CONFIG_BLK_DEV_RAM_SIZE=4096
CONFIG_BLK_DEV_INITRD=y

#
# Multi-device support (RAID and LVM)
#
# CONFIG_MD is not set
# CONFIG_BLK_DEV_MD is not set
# CONFIG_MD_LINEAR is not set
# CONFIG_MD_RAID0 is not set
# CONFIG_MD_RAID1 is not set
# CONFIG_MD_RAID5 is not set
# CONFIG_MD_MULTIPATH is not set
# CONFIG_BLK_DEV_LVM is not set

#
# Networking options
#
CONFIG_PACKET=y
# CONFIG_PACKET_MMAP is not set
# CONFIG_NETLINK_DEV is not set
CONFIG_NETFILTER=y
# CONFIG_NETFILTER_DEBUG is not set
# CONFIG_FILTER is not set
CONFIG_UNIX=y
CONFIG_INET=y
CONFIG_IP_MULTICAST=y
# CONFIG_IP_ADVANCED_ROUTER is not set
# CONFIG_IP_PNP is not set
# CONFIG_NET_IPIP is not set
# CONFIG_NET_IPGRE is not set
# CONFIG_IP_MROUTE is not set
# CONFIG_ARPD is not set
# CONFIG_INET_ECN is not set
CONFIG_SYN_COOKIES=y

#
#   IP: Netfilter Configuration
#
CONFIG_IP_NF_CONNTRACK=m
CONFIG_IP_NF_FTP=m
CONFIG_IP_NF_IRC=m
# CONFIG_IP_NF_QUEUE is not set
CONFIG_IP_NF_IPTABLES=m
CONFIG_IP_NF_MATCH_LIMIT=m
CONFIG_IP_NF_MATCH_MAC=m
CONFIG_IP_NF_MATCH_MARK=m
CONFIG_IP_NF_MATCH_MULTIPORT=m
CONFIG_IP_NF_MATCH_TOS=m
CONFIG_IP_NF_MATCH_LENGTH=m
CONFIG_IP_NF_MATCH_TTL=m
CONFIG_IP_NF_MATCH_TCPMSS=m
CONFIG_IP_NF_MATCH_STATE=m
CONFIG_IP_NF_MATCH_UNCLEAN=m
CONFIG_IP_NF_MATCH_OWNER=m
CONFIG_IP_NF_FILTER=m
CONFIG_IP_NF_TARGET_REJECT=m
CONFIG_IP_NF_TARGET_MIRROR=m
CONFIG_IP_NF_NAT=m
CONFIG_IP_NF_NAT_NEEDED=y
CONFIG_IP_NF_TARGET_MASQUERADE=m
CONFIG_IP_NF_TARGET_REDIRECT=m
CONFIG_IP_NF_NAT_SNMP_BASIC=m
CONFIG_IP_NF_NAT_IRC=m
CONFIG_IP_NF_NAT_FTP=m
# CONFIG_IP_NF_MANGLE is not set
# CONFIG_IP_NF_TARGET_LOG is not set
CONFIG_IP_NF_TARGET_TCPMSS=m
CONFIG_IP_NF_COMPAT_IPCHAINS=m
CONFIG_IP_NF_NAT_NEEDED=y
# CONFIG_IP_NF_COMPAT_IPFWADM is not set
# CONFIG_IPV6 is not set
# CONFIG_KHTTPD is not set
# CONFIG_ATM is not set
# CONFIG_VLAN_8021Q is not set

#
#  
#
# CONFIG_IPX is not set
CONFIG_ATALK=m
# CONFIG_DECNET is not set
# CONFIG_BRIDGE is not set
# CONFIG_X25 is not set
# CONFIG_LAPB is not set
# CONFIG_LLC is not set
# CONFIG_NET_DIVERT is not set
# CONFIG_ECONET is not set
# CONFIG_WAN_ROUTER is not set
# CONFIG_NET_FASTROUTE is not set
# CONFIG_NET_HW_FLOWCONTROL is not set

#
# QoS and/or fair queueing
#
# CONFIG_NET_SCHED is not set

#
# ATA/IDE/MFM/RLL support
#
CONFIG_IDE=y

#
# IDE, ATA and ATAPI Block devices
#
CONFIG_BLK_DEV_IDE=y

#
# Please see Documentation/ide.txt for help/info on IDE drives
#
# CONFIG_BLK_DEV_HD_IDE is not set
# CONFIG_BLK_DEV_HD is not set
CONFIG_BLK_DEV_IDEDISK=y
# CONFIG_IDEDISK_MULTI_MODE is not set
# CONFIG_BLK_DEV_IDEDISK_VENDOR is not set
# CONFIG_BLK_DEV_IDEDISK_FUJITSU is not set
# CONFIG_BLK_DEV_IDEDISK_IBM is not set
# CONFIG_BLK_DEV_IDEDISK_MAXTOR is not set
# CONFIG_BLK_DEV_IDEDISK_QUANTUM is not set
# CONFIG_BLK_DEV_IDEDISK_SEAGATE is not set
# CONFIG_BLK_DEV_IDEDISK_WD is not set
# CONFIG_BLK_DEV_COMMERIAL is not set
# CONFIG_BLK_DEV_TIVO is not set
# CONFIG_BLK_DEV_IDECS is not set
CONFIG_BLK_DEV_IDECD=y
# CONFIG_BLK_DEV_IDETAPE is not set
CONFIG_BLK_DEV_IDEFLOPPY=y
CONFIG_BLK_DEV_IDESCSI=y

#
# IDE chipset support/bugfixes
#
# CONFIG_BLK_DEV_CMD640 is not set
# CONFIG_BLK_DEV_CMD640_ENHANCED is not set
# CONFIG_BLK_DEV_ISAPNP is not set
# CONFIG_BLK_DEV_RZ1000 is not set
CONFIG_BLK_DEV_IDEPCI=y
CONFIG_IDEPCI_SHARE_IRQ=y
CONFIG_BLK_DEV_IDEDMA_PCI=y
CONFIG_BLK_DEV_ADMA=y
# CONFIG_BLK_DEV_OFFBOARD is not set
CONFIG_IDEDMA_PCI_AUTO=y
CONFIG_BLK_DEV_IDEDMA=y
# CONFIG_IDEDMA_PCI_WIP is not set
# CONFIG_IDEDMA_NEW_DRIVE_LISTINGS is not set
# CONFIG_BLK_DEV_AEC62XX is not set
# CONFIG_AEC62XX_TUNING is not set
# CONFIG_BLK_DEV_ALI15X3 is not set
# CONFIG_WDC_ALI15X3 is not set
# CONFIG_BLK_DEV_AMD74XX is not set
# CONFIG_AMD74XX_OVERRIDE is not set
CONFIG_BLK_DEV_CMD64X=y
# CONFIG_BLK_DEV_CY82C693 is not set
# CONFIG_BLK_DEV_CS5530 is not set
# CONFIG_BLK_DEV_HPT34X is not set
# CONFIG_HPT34X_AUTODMA is not set
# CONFIG_BLK_DEV_HPT366 is not set
# CONFIG_BLK_DEV_NS87415 is not set
# CONFIG_BLK_DEV_OPTI621 is not set
# CONFIG_BLK_DEV_PDC202XX is not set
# CONFIG_PDC202XX_BURST is not set
# CONFIG_PDC202XX_FORCE is not set
# CONFIG_BLK_DEV_SVWKS is not set
# CONFIG_BLK_DEV_SIS5513 is not set
# CONFIG_BLK_DEV_SLC90E66 is not set
# CONFIG_BLK_DEV_TRM290 is not set
# CONFIG_BLK_DEV_VIA82CXXX is not set
CONFIG_BLK_DEV_SL82C105=y
CONFIG_BLK_DEV_IDE_PMAC=y
CONFIG_BLK_DEV_IDEDMA_PMAC=y
CONFIG_BLK_DEV_IDEDMA_PMAC_AUTO=y
CONFIG_BLK_DEV_IDEDMA=y
CONFIG_BLK_DEV_IDEPCI=y
# CONFIG_IDE_CHIPSETS is not set
CONFIG_IDEDMA_AUTO=y
# CONFIG_IDEDMA_IVB is not set
# CONFIG_DMA_NONPCI is not set
CONFIG_BLK_DEV_IDE_MODES=y
# CONFIG_BLK_DEV_ATARAID is not set
# CONFIG_BLK_DEV_ATARAID_PDC is not set
# CONFIG_BLK_DEV_ATARAID_HPT is not set

#
# SCSI support
#
CONFIG_SCSI=y

#
# SCSI support type (disk, tape, CD-ROM)
#
CONFIG_BLK_DEV_SD=y
CONFIG_SD_EXTRA_DEVS=40
CONFIG_CHR_DEV_ST=y
# CONFIG_CHR_DEV_OSST is not set
CONFIG_BLK_DEV_SR=y
CONFIG_BLK_DEV_SR_VENDOR=y
CONFIG_SR_EXTRA_DEVS=2
CONFIG_CHR_DEV_SG=y

#
# Some SCSI devices (e.g. CD jukebox) support multiple LUNs
#
# CONFIG_SCSI_DEBUG_QUEUES is not set
# CONFIG_SCSI_MULTI_LUN is not set
CONFIG_SCSI_CONSTANTS=y
# CONFIG_SCSI_LOGGING is not set

#
# SCSI low-level drivers
#
# CONFIG_BLK_DEV_3W_XXXX_RAID is not set
# CONFIG_SCSI_7000FASST is not set
# CONFIG_SCSI_ACARD is not set
# CONFIG_SCSI_AHA152X is not set
# CONFIG_SCSI_AHA1542 is not set
# CONFIG_SCSI_AHA1740 is not set
CONFIG_SCSI_AIC7XXX=m
CONFIG_AIC7XXX_CMDS_PER_DEVICE=253
CONFIG_AIC7XXX_RESET_DELAY_MS=15000
# CONFIG_AIC7XXX_BUILD_FIRMWARE is not set
CONFIG_SCSI_AIC7XXX_OLD=m
# CONFIG_AIC7XXX_OLD_TCQ_ON_BY_DEFAULT is not set
CONFIG_AIC7XXX_OLD_CMDS_PER_DEVICE=8
CONFIG_AIC7XXX_OLD_PROC_STATS=y
# CONFIG_SCSI_DPT_I2O is not set
CONFIG_SCSI_ADVANSYS=m
# CONFIG_SCSI_IN2000 is not set
# CONFIG_SCSI_AM53C974 is not set
# CONFIG_SCSI_MEGARAID is not set
# CONFIG_SCSI_BUSLOGIC is not set
# CONFIG_SCSI_CPQFCTS is not set
# CONFIG_SCSI_DMX3191D is not set
# CONFIG_SCSI_DTC3280 is not set
# CONFIG_SCSI_EATA is not set
# CONFIG_SCSI_EATA_DMA is not set
# CONFIG_SCSI_EATA_PIO is not set
# CONFIG_SCSI_FUTURE_DOMAIN is not set
# CONFIG_SCSI_GDTH is not set
# CONFIG_SCSI_GENERIC_NCR5380 is not set
# CONFIG_SCSI_INITIO is not set
# CONFIG_SCSI_INIA100 is not set
# CONFIG_SCSI_NCR53C406A is not set
# CONFIG_SCSI_NCR53C7xx is not set
CONFIG_SCSI_SYM53C8XX_2=y
CONFIG_SCSI_SYM53C8XX_DMA_ADDRESSING_MODE=0
CONFIG_SCSI_SYM53C8XX_DEFAULT_TAGS=16
CONFIG_SCSI_SYM53C8XX_MAX_TAGS=64
# CONFIG_SCSI_SYM53C8XX_IOMAPPED is not set
# CONFIG_SCSI_PAS16 is not set
# CONFIG_SCSI_PCI2000 is not set
# CONFIG_SCSI_PCI2220I is not set
# CONFIG_SCSI_PSI240I is not set
# CONFIG_SCSI_QLOGIC_FAS is not set
# CONFIG_SCSI_QLOGIC_ISP is not set
# CONFIG_SCSI_QLOGIC_FC is not set
# CONFIG_SCSI_QLOGIC_1280 is not set
# CONFIG_SCSI_SIM710 is not set
# CONFIG_SCSI_SYM53C416 is not set
# CONFIG_SCSI_DC390T is not set
# CONFIG_SCSI_T128 is not set
# CONFIG_SCSI_U14_34F is not set
# CONFIG_SCSI_DEBUG is not set
CONFIG_SCSI_MESH=y
CONFIG_SCSI_MESH_SYNC_RATE=5
CONFIG_SCSI_MAC53C94=y

#
# IEEE 1394 (FireWire) support (EXPERIMENTAL)
#
# CONFIG_IEEE1394 is not set

#
# Network device support
#
CONFIG_NETDEVICES=y

#
# ARCnet devices
#
# CONFIG_ARCNET is not set

#
# Appletalk devices
#
# CONFIG_LTPC is not set
# CONFIG_COPS is not set
# CONFIG_IPDDP is not set
# CONFIG_DUMMY is not set
# CONFIG_BONDING is not set
# CONFIG_EQUALIZER is not set
# CONFIG_TUN is not set
# CONFIG_ETHERTAP is not set

#
# Ethernet (10 or 100Mbit)
#
CONFIG_NET_ETHERNET=y
CONFIG_MACE=y
# CONFIG_MACE_AAUI_PORT is not set
CONFIG_BMAC=y
CONFIG_GMAC=y
# CONFIG_SUNLANCE is not set
# CONFIG_HAPPYMEAL is not set
# CONFIG_SUNBMAC is not set
# CONFIG_SUNQE is not set
# CONFIG_SUNLANCE is not set
# CONFIG_SUNGEM is not set
# CONFIG_NET_VENDOR_3COM is not set
# CONFIG_LANCE is not set
# CONFIG_NET_VENDOR_SMC is not set
# CONFIG_NET_VENDOR_RACAL is not set
# CONFIG_HP100 is not set
# CONFIG_NET_ISA is not set
CONFIG_NET_PCI=y
CONFIG_PCNET32=y
# CONFIG_ADAPTEC_STARFIRE is not set
# CONFIG_APRICOT is not set
# CONFIG_CS89x0 is not set
CONFIG_TULIP=y
# CONFIG_TULIP_MWI is not set
CONFIG_TULIP_MMIO=y
CONFIG_DE4X5=m
# CONFIG_DGRS is not set
# CONFIG_DM9102 is not set
# CONFIG_EEPRO100 is not set
# CONFIG_LNE390 is not set
# CONFIG_FEALNX is not set
# CONFIG_NATSEMI is not set
# CONFIG_NE2K_PCI is not set
# CONFIG_NE3210 is not set
# CONFIG_ES3210 is not set
# CONFIG_8139CP is not set
# CONFIG_8139TOO is not set
# CONFIG_8139TOO_PIO is not set
# CONFIG_8139TOO_TUNE_TWISTER is not set
# CONFIG_8139TOO_8129 is not set
# CONFIG_SIS900 is not set
# CONFIG_EPIC100 is not set
# CONFIG_SUNDANCE is not set
# CONFIG_TLAN is not set
# CONFIG_VIA_RHINE is not set
# CONFIG_VIA_RHINE_MMIO is not set
# CONFIG_WINBOND_840 is not set
# CONFIG_NET_POCKET is not set

#
# Ethernet (1000 Mbit)
#
# CONFIG_ACENIC is not set
# CONFIG_DL2K is not set
# CONFIG_MYRI_SBUS is not set
# CONFIG_NS83820 is not set
# CONFIG_HAMACHI is not set
# CONFIG_YELLOWFIN is not set
# CONFIG_SK98LIN is not set
# CONFIG_FDDI is not set
# CONFIG_HIPPI is not set
# CONFIG_PLIP is not set
CONFIG_PPP=y
CONFIG_PPP_MULTILINK=y
# CONFIG_PPP_FILTER is not set
CONFIG_PPP_ASYNC=y
# CONFIG_PPP_SYNC_TTY is not set
CONFIG_PPP_DEFLATE=y
# CONFIG_PPP_BSDCOMP is not set
# CONFIG_PPPOE is not set
# CONFIG_SLIP is not set

#
# Wireless LAN (non-hamradio)
#
CONFIG_NET_RADIO=y
# CONFIG_STRIP is not set
# CONFIG_WAVELAN is not set
# CONFIG_ARLAN is not set
# CONFIG_AIRONET4500 is not set
# CONFIG_AIRONET4500_NONCS is not set
# CONFIG_AIRONET4500_PROC is not set
# CONFIG_AIRO is not set
CONFIG_HERMES=m
CONFIG_APPLE_AIRPORT=m
# CONFIG_PLX_HERMES is not set
CONFIG_NET_WIRELESS=y

#
# Token Ring devices
#
# CONFIG_TR is not set
# CONFIG_NET_FC is not set
# CONFIG_RCPCI is not set
# CONFIG_SHAPER is not set

#
# Wan interfaces
#
# CONFIG_WAN is not set

#
# Amateur Radio support
#
# CONFIG_HAMRADIO is not set

#
# IrDA (infrared) support
#
# CONFIG_IRDA is not set

#
# ISDN subsystem
#
# CONFIG_ISDN is not set

#
# Old CD-ROM drivers (not SCSI, not IDE)
#
# CONFIG_CD_NO_IDESCSI is not set

#
# Console drivers
#
CONFIG_VGA_CONSOLE=y

#
# Frame-buffer support
#
CONFIG_FB=y
CONFIG_DUMMY_CONSOLE=y
# CONFIG_FB_RIVA is not set
# CONFIG_FB_CLGEN is not set
# CONFIG_FB_PM2 is not set
# CONFIG_FB_CYBER2000 is not set
CONFIG_FB_OF=y
CONFIG_FB_CONTROL=y
CONFIG_FB_PLATINUM=y
CONFIG_FB_VALKYRIE=y
CONFIG_FB_CT65550=y
CONFIG_FB_IMSTT=y
# CONFIG_FB_S3TRIO is not set
# CONFIG_FB_VGA16 is not set
CONFIG_FB_MATROX=y
CONFIG_FB_MATROX_MILLENIUM=y
CONFIG_FB_MATROX_MYSTIQUE=y
# CONFIG_FB_MATROX_G100 is not set
# CONFIG_FB_MATROX_I2C is not set
# CONFIG_FB_MATROX_G450 is not set
# CONFIG_FB_MATROX_MULTIHEAD is not set
CONFIG_FB_ATY=y
CONFIG_FB_ATY_GX=y
CONFIG_FB_ATY_CT=y
CONFIG_FB_RADEON=y
CONFIG_FB_ATY128=y
# CONFIG_FB_SIS is not set
CONFIG_FB_3DFX=y
# CONFIG_FB_VOODOO1 is not set
# CONFIG_FB_VIRTUAL is not set
# CONFIG_FBCON_ADVANCED is not set
CONFIG_FBCON_CFB8=y
CONFIG_FBCON_CFB16=y
CONFIG_FBCON_CFB24=y
CONFIG_FBCON_CFB32=y
# CONFIG_FBCON_FONTWIDTH8_ONLY is not set
CONFIG_FBCON_FONTS=y
# CONFIG_FONT_8x8 is not set
CONFIG_FONT_8x16=y
CONFIG_FONT_SUN8x16=y
CONFIG_FONT_SUN12x22=y
# CONFIG_FONT_6x11 is not set
# CONFIG_FONT_PEARL_8x8 is not set
# CONFIG_FONT_ACORN_8x8 is not set
# CONFIG_FB_COMPAT_XPMAC is not set

#
# Input core support
#
CONFIG_INPUT=y
CONFIG_INPUT_KEYBDEV=y
CONFIG_INPUT_MOUSEDEV=y
CONFIG_INPUT_MOUSEDEV_SCREEN_X=1024
CONFIG_INPUT_MOUSEDEV_SCREEN_Y=768
# CONFIG_INPUT_JOYDEV is not set
CONFIG_INPUT_EVDEV=y

#
# Macintosh device drivers
#
CONFIG_ADB_CUDA=y
CONFIG_ADB_PMU=y
# CONFIG_PMAC_PBOOK is not set
# CONFIG_PMAC_BACKLIGHT is not set
# CONFIG_MAC_FLOPPY is not set
CONFIG_MAC_SERIAL=m
CONFIG_ADB=y
CONFIG_ADB_MACIO=y
CONFIG_INPUT_ADBHID=y
CONFIG_MAC_ADBKEYCODES=y
CONFIG_MAC_EMUMOUSEBTN=y
CONFIG_MAC_HID=y
# CONFIG_ANSLCD is not set

#
# Character devices
#
CONFIG_VT=y
CONFIG_VT_CONSOLE=y
CONFIG_SERIAL=m
# CONFIG_SERIAL_EXTENDED is not set
# CONFIG_SERIAL_NONSTANDARD is not set
CONFIG_UNIX98_PTYS=y
CONFIG_UNIX98_PTY_COUNT=256

#
# I2C support
#
CONFIG_I2C=m
# CONFIG_I2C_ALGOBIT is not set
# CONFIG_I2C_ALGOPCF is not set
CONFIG_I2C_KEYWEST=m
CONFIG_I2C_CHARDEV=m
CONFIG_I2C_PROC=m

#
# Mice
#
CONFIG_BUSMOUSE=y
# CONFIG_ATIXL_BUSMOUSE is not set
# CONFIG_LOGIBUSMOUSE is not set
# CONFIG_MS_BUSMOUSE is not set
CONFIG_MOUSE=y
CONFIG_PSMOUSE=y
# CONFIG_82C710_MOUSE is not set
# CONFIG_PC110_PAD is not set

#
# Joysticks
#
# CONFIG_INPUT_GAMEPORT is not set
# CONFIG_INPUT_NS558 is not set
# CONFIG_INPUT_LIGHTNING is not set
# CONFIG_INPUT_PCIGAME is not set
# CONFIG_INPUT_CS461X is not set
# CONFIG_INPUT_EMU10K1 is not set
# CONFIG_INPUT_SERIO is not set
# CONFIG_INPUT_SERPORT is not set

#
# Joysticks
#
# CONFIG_INPUT_ANALOG is not set
# CONFIG_INPUT_A3D is not set
# CONFIG_INPUT_ADI is not set
# CONFIG_INPUT_COBRA is not set
# CONFIG_INPUT_GF2K is not set
# CONFIG_INPUT_GRIP is not set
# CONFIG_INPUT_INTERACT is not set
# CONFIG_INPUT_TMDC is not set
# CONFIG_INPUT_SIDEWINDER is not set
# CONFIG_INPUT_IFORCE_USB is not set
# CONFIG_INPUT_IFORCE_232 is not set
# CONFIG_INPUT_WARRIOR is not set
# CONFIG_INPUT_MAGELLAN is not set
# CONFIG_INPUT_SPACEORB is not set
# CONFIG_INPUT_SPACEBALL is not set
# CONFIG_INPUT_STINGER is not set
# CONFIG_INPUT_DB9 is not set
# CONFIG_INPUT_GAMECON is not set
# CONFIG_INPUT_TURBOGRAFX is not set
# CONFIG_QIC02_TAPE is not set

#
# Watchdog Cards
#
# CONFIG_WATCHDOG is not set
# CONFIG_INTEL_RNG is not set
CONFIG_NVRAM=y
# CONFIG_RTC is not set
# CONFIG_DTLK is not set
# CONFIG_R3964 is not set
# CONFIG_APPLICOM is not set

#
# Ftape, the floppy tape device driver
#
# CONFIG_FTAPE is not set
# CONFIG_AGP is not set
# CONFIG_DRM is not set

#
# Multimedia devices
#
# CONFIG_VIDEO_DEV is not set

#
# File systems
#
# CONFIG_QUOTA is not set
# CONFIG_AUTOFS_FS is not set
# CONFIG_AUTOFS4_FS is not set
# CONFIG_REISERFS_FS is not set
# CONFIG_REISERFS_CHECK is not set
# CONFIG_REISERFS_PROC_INFO is not set
# CONFIG_ADFS_FS is not set
# CONFIG_ADFS_FS_RW is not set
# CONFIG_AFFS_FS is not set
CONFIG_HFS_FS=m
# CONFIG_BFS_FS is not set
# CONFIG_EXT3_FS is not set
# CONFIG_JBD is not set
# CONFIG_JBD_DEBUG is not set
CONFIG_FAT_FS=m
CONFIG_MSDOS_FS=m
# CONFIG_UMSDOS_FS is not set
CONFIG_VFAT_FS=m
# CONFIG_EFS_FS is not set
# CONFIG_JFFS_FS is not set
# CONFIG_JFFS2_FS is not set
# CONFIG_CRAMFS is not set
CONFIG_TMPFS=y
# CONFIG_RAMFS is not set
CONFIG_ISO9660_FS=y
# CONFIG_JOLIET is not set
# CONFIG_ZISOFS is not set
# CONFIG_MINIX_FS is not set
# CONFIG_VXFS_FS is not set
# CONFIG_NTFS_FS is not set
# CONFIG_NTFS_RW is not set
# CONFIG_HPFS_FS is not set
CONFIG_PROC_FS=y
CONFIG_DEVFS_FS=y
# CONFIG_DEVFS_MOUNT is not set
# CONFIG_DEVFS_DEBUG is not set
CONFIG_DEVPTS_FS=y
# CONFIG_QNX4FS_FS is not set
# CONFIG_QNX4FS_RW is not set
# CONFIG_ROMFS_FS is not set
CONFIG_EXT2_FS=y
# CONFIG_SYSV_FS is not set
# CONFIG_UDF_FS is not set
# CONFIG_UDF_RW is not set
# CONFIG_UFS_FS is not set
# CONFIG_UFS_FS_WRITE is not set

#
# Network File Systems
#
# CONFIG_CODA_FS is not set
# CONFIG_INTERMEZZO_FS is not set
CONFIG_NFS_FS=y
# CONFIG_NFS_V3 is not set
# CONFIG_ROOT_NFS is not set
CONFIG_NFSD=y
# CONFIG_NFSD_V3 is not set
CONFIG_SUNRPC=y
CONFIG_LOCKD=y
# CONFIG_SMB_FS is not set
# CONFIG_NCP_FS is not set
# CONFIG_NCPFS_PACKET_SIGNING is not set
# CONFIG_NCPFS_IOCTL_LOCKING is not set
# CONFIG_NCPFS_STRONG is not set
# CONFIG_NCPFS_NFS_NS is not set
# CONFIG_NCPFS_OS2_NS is not set
# CONFIG_NCPFS_SMALLDOS is not set
# CONFIG_NCPFS_NLS is not set
# CONFIG_NCPFS_EXTRAS is not set
# CONFIG_ZISOFS_FS is not set
# CONFIG_ZLIB_FS_INFLATE is not set

#
# Partition Types
#
CONFIG_PARTITION_ADVANCED=y
# CONFIG_ACORN_PARTITION is not set
# CONFIG_OSF_PARTITION is not set
# CONFIG_AMIGA_PARTITION is not set
# CONFIG_ATARI_PARTITION is not set
CONFIG_MAC_PARTITION=y
CONFIG_MSDOS_PARTITION=y
# CONFIG_BSD_DISKLABEL is not set
# CONFIG_MINIX_SUBPARTITION is not set
# CONFIG_SOLARIS_X86_PARTITION is not set
# CONFIG_UNIXWARE_DISKLABEL is not set
# CONFIG_LDM_PARTITION is not set
# CONFIG_SGI_PARTITION is not set
# CONFIG_ULTRIX_PARTITION is not set
# CONFIG_SUN_PARTITION is not set
# CONFIG_SMB_NLS is not set
CONFIG_NLS=y

#
# Native Language Support
#
CONFIG_NLS_DEFAULT="iso8859-1"
# CONFIG_NLS_CODEPAGE_437 is not set
# CONFIG_NLS_CODEPAGE_737 is not set
# CONFIG_NLS_CODEPAGE_775 is not set
# CONFIG_NLS_CODEPAGE_850 is not set
# CONFIG_NLS_CODEPAGE_852 is not set
# CONFIG_NLS_CODEPAGE_855 is not set
# CONFIG_NLS_CODEPAGE_857 is not set
# CONFIG_NLS_CODEPAGE_860 is not set
# CONFIG_NLS_CODEPAGE_861 is not set
# CONFIG_NLS_CODEPAGE_862 is not set
# CONFIG_NLS_CODEPAGE_863 is not set
# CONFIG_NLS_CODEPAGE_864 is not set
# CONFIG_NLS_CODEPAGE_865 is not set
# CONFIG_NLS_CODEPAGE_866 is not set
# CONFIG_NLS_CODEPAGE_869 is not set
# CONFIG_NLS_CODEPAGE_936 is not set
# CONFIG_NLS_CODEPAGE_950 is not set
# CONFIG_NLS_CODEPAGE_932 is not set
# CONFIG_NLS_CODEPAGE_949 is not set
# CONFIG_NLS_CODEPAGE_874 is not set
# CONFIG_NLS_ISO8859_8 is not set
# CONFIG_NLS_CODEPAGE_1251 is not set
CONFIG_NLS_ISO8859_1=m
# CONFIG_NLS_ISO8859_2 is not set
# CONFIG_NLS_ISO8859_3 is not set
# CONFIG_NLS_ISO8859_4 is not set
# CONFIG_NLS_ISO8859_5 is not set
# CONFIG_NLS_ISO8859_6 is not set
# CONFIG_NLS_ISO8859_7 is not set
# CONFIG_NLS_ISO8859_9 is not set
# CONFIG_NLS_ISO8859_13 is not set
# CONFIG_NLS_ISO8859_14 is not set
# CONFIG_NLS_ISO8859_15 is not set
# CONFIG_NLS_KOI8_R is not set
# CONFIG_NLS_KOI8_U is not set
# CONFIG_NLS_UTF8 is not set

#
# Sound
#
CONFIG_SOUND=m
CONFIG_DMASOUND_PMAC=m
CONFIG_DMASOUND=m
CONFIG_I2C=m
CONFIG_I2C_KEYWEST=m
# CONFIG_SOUND_BT878 is not set
# CONFIG_SOUND_CMPCI is not set
# CONFIG_SOUND_EMU10K1 is not set
# CONFIG_MIDI_EMU10K1 is not set
# CONFIG_SOUND_FUSION is not set
# CONFIG_SOUND_CS4281 is not set
# CONFIG_SOUND_ES1370 is not set
# CONFIG_SOUND_ES1371 is not set
# CONFIG_SOUND_ESSSOLO1 is not set
# CONFIG_SOUND_MAESTRO is not set
# CONFIG_SOUND_MAESTRO3 is not set
# CONFIG_SOUND_ICH is not set
# CONFIG_SOUND_RME96XX is not set
# CONFIG_SOUND_SONICVIBES is not set
# CONFIG_SOUND_TRIDENT is not set
# CONFIG_SOUND_MSNDCLAS is not set
# CONFIG_SOUND_MSNDPIN is not set
# CONFIG_SOUND_VIA82CXXX is not set
# CONFIG_MIDI_VIA82CXXX is not set
# CONFIG_SOUND_OSS is not set
# CONFIG_SOUND_TVMIXER is not set

#
# USB support
#
CONFIG_USB=y
# CONFIG_USB_DEBUG is not set

#
# Miscellaneous USB options
#
CONFIG_USB_DEVICEFS=y
# CONFIG_USB_BANDWIDTH is not set
# CONFIG_USB_LONG_TIMEOUT is not set

#
# USB Controllers
#
# CONFIG_USB_UHCI is not set
# CONFIG_USB_UHCI_ALT is not set
CONFIG_USB_OHCI=y

#
# USB Device Class drivers
#
# CONFIG_USB_AUDIO is not set
# CONFIG_USB_BLUETOOTH is not set
# CONFIG_USB_STORAGE is not set
# CONFIG_USB_STORAGE_DEBUG is not set
# CONFIG_USB_STORAGE_DATAFAB is not set
# CONFIG_USB_STORAGE_FREECOM is not set
# CONFIG_USB_STORAGE_ISD200 is not set
# CONFIG_USB_STORAGE_DPCM is not set
# CONFIG_USB_STORAGE_HP8200e is not set
# CONFIG_USB_STORAGE_SDDR09 is not set
# CONFIG_USB_STORAGE_JUMPSHOT is not set
CONFIG_USB_ACM=m
CONFIG_USB_PRINTER=m

#
# USB Human Interface Devices (HID)
#
CONFIG_USB_HID=y
# CONFIG_USB_HIDDEV is not set
# CONFIG_USB_WACOM is not set

#
# USB Imaging devices
#
# CONFIG_USB_DC2XX is not set
# CONFIG_USB_MDC800 is not set
CONFIG_USB_SCANNER=m
# CONFIG_USB_MICROTEK is not set
# CONFIG_USB_HPUSBSCSI is not set

#
# USB Multimedia devices
#

#
#   Video4Linux support is needed for USB Multimedia device support
#

#
# USB Network adaptors
#
# CONFIG_USB_PEGASUS is not set
# CONFIG_USB_KAWETH is not set
# CONFIG_USB_CATC is not set
# CONFIG_USB_CDCETHER is not set
# CONFIG_USB_USBNET is not set

#
# USB port drivers
#
# CONFIG_USB_USS720 is not set

#
# USB Serial Converter support
#
CONFIG_USB_SERIAL=m
# CONFIG_USB_SERIAL_GENERIC is not set
# CONFIG_USB_SERIAL_BELKIN is not set
# CONFIG_USB_SERIAL_WHITEHEAT is not set
# CONFIG_USB_SERIAL_DIGI_ACCELEPORT is not set
# CONFIG_USB_SERIAL_EMPEG is not set
# CONFIG_USB_SERIAL_FTDI_SIO is not set
CONFIG_USB_SERIAL_VISOR=m
# CONFIG_USB_SERIAL_IR is not set
# CONFIG_USB_SERIAL_EDGEPORT is not set
# CONFIG_USB_SERIAL_KEYSPAN_PDA is not set
# CONFIG_USB_SERIAL_KEYSPAN is not set
# CONFIG_USB_SERIAL_KEYSPAN_USA28 is not set
# CONFIG_USB_SERIAL_KEYSPAN_USA28X is not set
# CONFIG_USB_SERIAL_KEYSPAN_USA28XA is not set
# CONFIG_USB_SERIAL_KEYSPAN_USA28XB is not set
# CONFIG_USB_SERIAL_KEYSPAN_USA19 is not set
# CONFIG_USB_SERIAL_KEYSPAN_USA18X is not set
# CONFIG_USB_SERIAL_KEYSPAN_USA19W is not set
# CONFIG_USB_SERIAL_KEYSPAN_USA49W is not set
# CONFIG_USB_SERIAL_MCT_U232 is not set
# CONFIG_USB_SERIAL_PL2303 is not set
# CONFIG_USB_SERIAL_CYBERJACK is not set
# CONFIG_USB_SERIAL_XIRCOM is not set
# CONFIG_USB_SERIAL_OMNINET is not set

#
# USB Miscellaneous drivers
#
# CONFIG_USB_RIO500 is not set

#
# Bluetooth support
#
# CONFIG_BLUEZ is not set

#
# Kernel hacking
#
CONFIG_MAGIC_SYSRQ=y
# CONFIG_KGDB is not set
CONFIG_XMON=y
# BK Id: SCCS/s.Makefile 1.10 11/08/01 07:57:40 paulus
#
#
# Makefile for ppc-specific library files..
#

USE_STANDARD_AS_RULE	:= true

O_TARGET		:= lib.o

export-objs		:= dec_and_lock.o

obj-y			:= checksum.o string.o strcase.o dec_and_lock.o

obj-$(CONFIG_SMP)	+= locks.o

include $(TOPDIR)/Rules.make
/*
 * BK Id: SCCS/s.string.S 1.9 10/25/01 10:08:51 trini
 */
/*
 * String handling functions for PowerPC.
 *
 * Copyright (C) 1996 Paul Mackerras.
 *
 * This program is free software; you can redistribute it and/or
 * modify it under the terms of the GNU General Public License
 * as published by the Free Software Foundation; either version
 * 2 of the License, or (at your option) any later version.
 */
#include "../kernel/ppc_asm.tmpl"
#include <linux/config.h>
#include <asm/processor.h>
#include <asm/cache.h>
#include <asm/errno.h>

#define COPY_16_BYTES		\
	lwz	r7,4(r4);	\
	lwz	r8,8(r4);	\
	lwz	r9,12(r4);	\
	lwzu	r10,16(r4);	\
	stw	r7,4(r6);	\
	stw	r8,8(r6);	\
	stw	r9,12(r6);	\
	stwu	r10,16(r6)

#define COPY_16_BYTES_WITHEX(n)	\
8 ## n ## 0:			\
	lwz	r7,4(r4);	\
8 ## n ## 1:			\
	lwz	r8,8(r4);	\
8 ## n ## 2:			\
	lwz	r9,12(r4);	\
8 ## n ## 3:			\
	lwzu	r10,16(r4);	\
8 ## n ## 4:			\
	stw	r7,4(r6);	\
8 ## n ## 5:			\
	stw	r8,8(r6);	\
8 ## n ## 6:			\
	stw	r9,12(r6);	\
8 ## n ## 7:			\
	stwu	r10,16(r6)

#define COPY_16_BYTES_EXCODE(n)			\
9 ## n ## 0:					\
	addi	r5,r5,-(16 * n);		\
	b	104f;				\
9 ## n ## 1:					\
	addi	r5,r5,-(16 * n);		\
	b	105f;				\
.section __ex_table,"a";			\
	.align	2;				\
	.long	8 ## n ## 0b,9 ## n ## 0b;	\
	.long	8 ## n ## 1b,9 ## n ## 0b;	\
	.long	8 ## n ## 2b,9 ## n ## 0b;	\
	.long	8 ## n ## 3b,9 ## n ## 0b;	\
	.long	8 ## n ## 4b,9 ## n ## 1b;	\
	.long	8 ## n ## 5b,9 ## n ## 1b;	\
	.long	8 ## n ## 6b,9 ## n ## 1b;	\
	.long	8 ## n ## 7b,9 ## n ## 1b;	\
	.text

	.text

CACHELINE_BYTES = L1_CACHE_LINE_SIZE
LG_CACHELINE_BYTES = LG_L1_CACHE_LINE_SIZE
CACHELINE_MASK = (L1_CACHE_LINE_SIZE-1)

	.globl	strcpy
strcpy:
	addi	r5,r3,-1
	addi	r4,r4,-1
1:	lbzu	r0,1(r4)
	cmpwi	0,r0,0
	stbu	r0,1(r5)
	bne	1b
	blr

	.globl	strncpy
strncpy:
	cmpwi	0,r5,0
	beqlr
	mtctr	r5
	addi	r6,r3,-1
	addi	r4,r4,-1
1:	lbzu	r0,1(r4)
	cmpwi	0,r0,0
	stbu	r0,1(r6)
	bdnzf	2,1b		/* dec ctr, branch if ctr != 0 && !cr0.eq */
	blr

	.globl	strcat
strcat:
	addi	r5,r3,-1
	addi	r4,r4,-1
1:	lbzu	r0,1(r5)
	cmpwi	0,r0,0
	bne	1b
	addi	r5,r5,-1
1:	lbzu	r0,1(r4)
	cmpwi	0,r0,0
	stbu	r0,1(r5)
	bne	1b
	blr

	.globl	strcmp
strcmp:
	addi	r5,r3,-1
	addi	r4,r4,-1
1:	lbzu	r3,1(r5)
	cmpwi	1,r3,0
	lbzu	r0,1(r4)
	subf.	r3,r0,r3
	beqlr	1
	beq	1b
	blr

	.globl	strlen
strlen:
	addi	r4,r3,-1
1:	lbzu	r0,1(r4)
	cmpwi	0,r0,0
	bne	1b
	subf	r3,r3,r4
	blr

/*
 * Use dcbz on the complete cache lines in the destination
 * to set them to zero.  This requires that the destination
 * area is cacheable.  -- paulus
 */
	.globl	cacheable_memzero
cacheable_memzero:
	mr	r5,r4
	li	r4,0
	addi	r6,r3,-4
	cmplwi	0,r5,4
	blt	7f
	stwu	r4,4(r6)
	beqlr
	andi.	r0,r6,3
	add	r5,r0,r5
	subf	r6,r0,r6
	clrlwi	r7,r6,32-LG_CACHELINE_BYTES
	add	r8,r7,r5
	srwi	r9,r8,LG_CACHELINE_BYTES
	addic.	r9,r9,-1	/* total number of complete cachelines */
	ble	2f
	xori	r0,r7,CACHELINE_MASK & ~3
	srwi.	r0,r0,2
	beq	3f
	mtctr	r0
4:	stwu	r4,4(r6)
	bdnz	4b
3:	mtctr	r9
	li	r7,4
#if !defined(CONFIG_8xx)
10:	dcbz	r7,r6
#else
10:	stw	r4, 4(r6)
	stw	r4, 8(r6)
	stw	r4, 12(r6)
	stw	r4, 16(r6)
#endif
	addi	r6,r6,CACHELINE_BYTES
	bdnz	10b
	clrlwi	r5,r8,32-LG_CACHELINE_BYTES
	addi	r5,r5,4
2:	srwi	r0,r5,2
	mtctr	r0
	bdz	6f
1:	stwu	r4,4(r6)
	bdnz	1b
6:	andi.	r5,r5,3
7:	cmpwi	0,r5,0
	beqlr
	mtctr	r5
	addi	r6,r6,3
8:	stbu	r4,1(r6)
	bdnz	8b
	blr

	.globl	memset
memset:
	rlwimi	r4,r4,8,16,23
	rlwimi	r4,r4,16,0,15
	addi	r6,r3,-4
	cmplwi	0,r5,4
	blt	7f
	stwu	r4,4(r6)
	beqlr
	andi.	r0,r6,3
	add	r5,r0,r5
	subf	r6,r0,r6
	srwi	r0,r5,2
	mtctr	r0
	bdz	6f
1:	stwu	r4,4(r6)
	bdnz	1b
6:	andi.	r5,r5,3
7:	cmpwi	0,r5,0
	beqlr
	mtctr	r5
	addi	r6,r6,3
8:	stbu	r4,1(r6)
	bdnz	8b
	blr

	.globl	bcopy
bcopy:
	mr	r6,r3
	mr	r3,r4
	mr	r4,r6
	b	memcpy

/*
 * This version uses dcbz on the complete cache lines in the
 * destination area to reduce memory traffic.  This requires that
 * the destination area is cacheable.
 * We only use this version if the source and dest don't overlap.
 * -- paulus.
 */
	.global	cacheable_memcpy
cacheable_memcpy:
	add	r7,r3,r5		/* test if the src & dst overlap */
	add	r8,r4,r5
	cmplw	0,r4,r7
	cmplw	1,r3,r8
	crand	0,0,4			/* cr0.lt &= cr1.lt */
	blt	memcpy			/* if regions overlap */

	addi	r4,r4,-4
	addi	r6,r3,-4
	neg	r0,r3
	andi.	r0,r0,CACHELINE_MASK	/* # bytes to start of cache line */
	beq	58f

	cmplw	0,r5,r0			/* is this more than total to do? */
	blt	63f			/* if not much to do */
	andi.	r8,r0,3			/* get it word-aligned first */
	subf	r5,r0,r5
	mtctr	r8
	beq+	61f
70:	lbz	r9,4(r4)		/* do some bytes */
	stb	r9,4(r6)
	addi	r4,r4,1
	addi	r6,r6,1
	bdnz	70b
61:	srwi.	r0,r0,2
	mtctr	r0
	beq	58f
72:	lwzu	r9,4(r4)		/* do some words */
	stwu	r9,4(r6)
	bdnz	72b

58:	srwi.	r0,r5,LG_CACHELINE_BYTES /* # complete cachelines */
	clrlwi	r5,r5,32-LG_CACHELINE_BYTES
	li	r11,4
	mtctr	r0
	beq	63f
53:
#if !defined(CONFIG_8xx)
	dcbz	r11,r6
#endif
	COPY_16_BYTES
#if L1_CACHE_LINE_SIZE >= 32
	COPY_16_BYTES
#if L1_CACHE_LINE_SIZE >= 64
	COPY_16_BYTES
	COPY_16_BYTES
#if L1_CACHE_LINE_SIZE >= 128
	COPY_16_BYTES
	COPY_16_BYTES
	COPY_16_BYTES
	COPY_16_BYTES
#endif
#endif
#endif
	bdnz	53b

63:	srwi.	r0,r5,2
	mtctr	r0
	beq	64f
30:	lwzu	r0,4(r4)
	stwu	r0,4(r6)
	bdnz	30b

64:	andi.	r0,r5,3
	mtctr	r0
	beq+	65f
40:	lbz	r0,4(r4)
	stb	r0,4(r6)
	addi	r4,r4,1
	addi	r6,r6,1
	bdnz	40b
65:	blr

	.globl	memmove
memmove:
	cmplw	0,r3,r4
	bgt	backwards_memcpy
	/* fall through */

	.globl	memcpy
memcpy:
	srwi.	r7,r5,3
	addi	r6,r3,-4
	addi	r4,r4,-4
	beq	2f			/* if less than 8 bytes to do */
	andi.	r0,r6,3			/* get dest word aligned */
	mtctr	r7
	bne	5f
1:	lwz	r7,4(r4)
	lwzu	r8,8(r4)
	stw	r7,4(r6)
	stwu	r8,8(r6)
	bdnz	1b
	andi.	r5,r5,7
2:	cmplwi	0,r5,4
	blt	3f
	lwzu	r0,4(r4)
	addi	r5,r5,-4
	stwu	r0,4(r6)
3:	cmpwi	0,r5,0
	beqlr
	mtctr	r5
	addi	r4,r4,3
	addi	r6,r6,3
4:	lbzu	r0,1(r4)
	stbu	r0,1(r6)
	bdnz	4b
	blr
5:	subfic	r0,r0,4
	mtctr	r0
6:	lbz	r7,4(r4)
	addi	r4,r4,1
	stb	r7,4(r6)
	addi	r6,r6,1
	bdnz	6b
	subf	r5,r0,r5
	rlwinm.	r7,r5,32-3,3,31
	beq	2b
	mtctr	r7
	b	1b

	.globl	backwards_memcpy
backwards_memcpy:
	rlwinm.	r7,r5,32-3,3,31		/* r0 = r5 >> 3 */
	add	r6,r3,r5
	add	r4,r4,r5
	beq	2f
	andi.	r0,r6,3
	mtctr	r7
	bne	5f
1:	lwz	r7,-4(r4)
	lwzu	r8,-8(r4)
	stw	r7,-4(r6)
	stwu	r8,-8(r6)
	bdnz	1b
	andi.	r5,r5,7
2:	cmplwi	0,r5,4
	blt	3f
	lwzu	r0,-4(r4)
	subi	r5,r5,4
	stwu	r0,-4(r6)
3:	cmpwi	0,r5,0
	beqlr
	mtctr	r5
4:	lbzu	r0,-1(r4)
	stbu	r0,-1(r6)
	bdnz	4b
	blr
5:	mtctr	r0
6:	lbzu	r7,-1(r4)
	stbu	r7,-1(r6)
	bdnz	6b
	subf	r5,r0,r5
	rlwinm.	r7,r5,32-3,3,31
	beq	2b
	mtctr	r7
	b	1b
	
	.globl	memcmp
memcmp:
	cmpwi	0,r5,0
	ble-	2f
	mtctr	r5
	addi	r6,r3,-1
	addi	r4,r4,-1
1:	lbzu	r3,1(r6)
	lbzu	r0,1(r4)
	subf.	r3,r0,r3
	bdnzt	2,1b
	blr
2:	li	r3,0
	blr

	.global	memchr
memchr:
	cmpwi	0,r5,0
	ble-	2f
	mtctr	r5
	addi	r3,r3,-1
1:	lbzu	r0,1(r3)
	cmpw	0,r0,r4
	bdnzf	2,1b
	beqlr
2:	li	r3,0
	blr

	.globl	__copy_tofrom_user
__copy_tofrom_user:
	addi	r4,r4,-4
	addi	r6,r3,-4
	neg	r0,r3
	andi.	r0,r0,CACHELINE_MASK	/* # bytes to start of cache line */
	beq	58f

	cmplw	0,r5,r0			/* is this more than total to do? */
	blt	63f			/* if not much to do */
	andi.	r8,r0,3			/* get it word-aligned first */
	mtctr	r8
	beq+	61f
70:	lbz	r9,4(r4)		/* do some bytes */
71:	stb	r9,4(r6)
	addi	r4,r4,1
	addi	r6,r6,1
	bdnz	70b
61:	subf	r5,r0,r5
	srwi.	r0,r0,2
	mtctr	r0
	beq	58f
72:	lwzu	r9,4(r4)		/* do some words */
73:	stwu	r9,4(r6)
	bdnz	72b

58:	srwi.	r0,r5,LG_CACHELINE_BYTES /* # complete cachelines */
	clrlwi	r5,r5,32-LG_CACHELINE_BYTES
	li	r11,4
	beq	63f

#if !defined(CONFIG_8xx)
	/* Here we decide how far ahead to prefetch the source */
#if MAX_L1_COPY_PREFETCH > 1
	/* Heuristically, for large transfers we prefetch
	   MAX_L1_COPY_PREFETCH cachelines ahead.  For small transfers
	   we prefetch 1 cacheline ahead. */
	cmpwi	r0,MAX_L1_COPY_PREFETCH
	li	r7,1
	li	r3,4
	ble	111f
	li	r7,MAX_L1_COPY_PREFETCH
111:	mtctr	r7
112:	dcbt	r3,r4
	addi	r3,r3,CACHELINE_BYTES
	bdnz	112b
#else /* MAX_L1_COPY_PREFETCH == 1 */
	li	r3,CACHELINE_BYTES + 4
	dcbt	r11,r4
#endif /* MAX_L1_COPY_PREFETCH */
#endif /* CONFIG_8xx */

	mtctr	r0
53:
#if !defined(CONFIG_8xx)
	dcbt	r3,r4
	dcbz	r11,r6
#endif
/* had to move these to keep extable in order */
	.section __ex_table,"a"
	.align	2
	.long	70b,100f
	.long	71b,101f
	.long	72b,102f
	.long	73b,103f
	.long	53b,105f
	.text
/* the main body of the cacheline loop */
	COPY_16_BYTES_WITHEX(0)
#if L1_CACHE_LINE_SIZE >= 32
	COPY_16_BYTES_WITHEX(1)
#if L1_CACHE_LINE_SIZE >= 64
	COPY_16_BYTES_WITHEX(2)
	COPY_16_BYTES_WITHEX(3)
#if L1_CACHE_LINE_SIZE >= 128
	COPY_16_BYTES_WITHEX(4)
	COPY_16_BYTES_WITHEX(5)
	COPY_16_BYTES_WITHEX(6)
	COPY_16_BYTES_WITHEX(7)
#endif
#endif
#endif
	bdnz	53b

63:	srwi.	r0,r5,2
	mtctr	r0
	beq	64f
30:	lwzu	r0,4(r4)
31:	stwu	r0,4(r6)
	bdnz	30b

64:	andi.	r0,r5,3
	mtctr	r0
	beq+	65f
40:	lbz	r0,4(r4)
41:	stb	r0,4(r6)
	addi	r4,r4,1
	addi	r6,r6,1
	bdnz	40b
65:	li	r3,0
	blr

/* read fault, initial single-byte copy */
100:	li	r4,0
	b	90f
/* write fault, initial single-byte copy */
101:	li	r4,1
90:	subf	r5,r8,r5
	li	r3,0
	b	99f
/* read fault, initial word copy */
102:	li	r4,0
	b	91f
/* write fault, initial word copy */
103:	li	r4,1
91:	li	r3,2
	b	99f

/*
 * this stuff handles faults in the cacheline loop and branches to either
 * 104f (if in read part) or 105f (if in write part), after updating r5
 */
	COPY_16_BYTES_EXCODE(0)
#if L1_CACHE_LINE_SIZE >= 32
	COPY_16_BYTES_EXCODE(1)
#if L1_CACHE_LINE_SIZE >= 64
	COPY_16_BYTES_EXCODE(2)
	COPY_16_BYTES_EXCODE(3)
#if L1_CACHE_LINE_SIZE >= 128
	COPY_16_BYTES_EXCODE(4)
	COPY_16_BYTES_EXCODE(5)
	COPY_16_BYTES_EXCODE(6)
	COPY_16_BYTES_EXCODE(7)
#endif
#endif
#endif

/* read fault in cacheline loop */
104:	li	r4,0
	b	92f
/* fault on dcbz (effectively a write fault) */
/* or write fault in cacheline loop */
105:	li	r4,1
92:	li	r3,LG_CACHELINE_BYTES
	b	99f
/* read fault in final word loop */
108:	li	r4,0
	b	93f
/* write fault in final word loop */
109:	li	r4,1
93:	andi.	r5,r5,3
	li	r3,2
	b	99f
/* read fault in final byte loop */
110:	li	r4,0
	b	94f
/* write fault in final byte loop */
111:	li	r4,1
94:	li	r5,0
	li	r3,0
/*
 * At this stage the number of bytes not copied is
 * r5 + (ctr << r3), and r4 is 0 for read or 1 for write.
 */
99:	mfctr	r0
	slw	r3,r0,r3
	add	r3,r3,r5
	cmpwi	0,r4,0
	bne	120f
/* for read fault, clear out the destination: r3 bytes starting at 4(r6) */
	srwi.	r0,r3,2
	li	r9,0
	mtctr	r0
	beq	113f
112:	stwu	r9,4(r6)
	bdnz	112b
113:	andi.	r0,r3,3
	mtctr	r0
	beq	120f
114:	stb	r9,4(r6)
	addi	r6,r6,1
	bdnz	114b
120:	blr

	.section __ex_table,"a"
	.align	2
	.long	30b,108b
	.long	31b,109b
	.long	40b,110b
	.long	41b,111b
	.long	112b,120b
	.long	114b,120b
	.text

	.globl	__clear_user
__clear_user:
	addi	r6,r3,-4
	li	r3,0
	li	r5,0
	cmplwi	0,r4,4
	blt	7f
	/* clear a single word */
11:	stwu	r5,4(r6)
	beqlr
	/* clear word sized chunks */
	andi.	r0,r6,3
	add	r4,r0,r4
	subf	r6,r0,r6
	srwi	r0,r4,2
	mtctr	r0
	bdz	6f
1:	stwu	r5,4(r6)
	bdnz	1b
6:	andi.	r4,r4,3
	/* clear byte sized chunks */
7:	cmpwi	0,r4,0
	beqlr
	mtctr	r4
	addi	r6,r6,3
8:	stbu	r5,1(r6)
	bdnz	8b
	blr
99:	li	r3,-EFAULT
	blr

	.section __ex_table,"a"
	.align	2
	.long	11b,99b
	.long	1b,99b
	.long	8b,99b
	.text

	.globl	__strncpy_from_user
__strncpy_from_user:
	addi	r6,r3,-1
	addi	r4,r4,-1
	cmpwi	0,r5,0
	beq	2f
	mtctr	r5
1:	lbzu	r0,1(r4)
	cmpwi	0,r0,0
	stbu	r0,1(r6)
	bdnzf	2,1b		/* dec ctr, branch if ctr != 0 && !cr0.eq */
	beq	3f
2:	addi	r6,r6,1
3:	subf	r3,r3,r6
	blr
99:	li	r3,-EFAULT
	blr

	.section __ex_table,"a"
	.align	2
	.long	1b,99b
	.text

/* r3 = str, r4 = len (> 0), r5 = top (highest addr) */
	.globl	__strnlen_user
__strnlen_user:
	addi	r7,r3,-1
	subf	r6,r7,r5	/* top+1 - str */
	cmplw	0,r4,r6
	bge	0f
	mr	r6,r4
0:	mtctr	r6		/* ctr = min(len, top - str) */
1:	lbzu	r0,1(r7)	/* get next byte */
	cmpwi	0,r0,0
	bdnzf	2,1b		/* loop if --ctr != 0 && byte != 0 */
	addi	r7,r7,1
	subf	r3,r3,r7	/* number of bytes we have looked at */
	beqlr			/* return if we found a 0 byte */
	cmpw	0,r3,r4		/* did we look at all len bytes? */
	blt	99f		/* if not, must have hit top */
	addi	r3,r4,1		/* return len + 1 to indicate no null found */
	blr
99:	li	r3,0		/* bad address, return 0 */
	blr

	.section __ex_table,"a"
	.align	2
	.long	1b,99b
/*
 * BK Id: SCCS/s.checksum.S 1.8 08/20/01 22:09:34 paulus
 */
/*
 * This file contains assembly-language implementations
 * of IP-style 1's complement checksum routines.
 *	
 *    Copyright (C) 1995-1996 Gary Thomas (gdt@linuxppc.org)
 *
 *  This program is free software; you can redistribute it and/or
 *  modify it under the terms of the GNU General Public License
 *  as published by the Free Software Foundation; either version
 *  2 of the License, or (at your option) any later version.
 *
 * Severely hacked about by Paul Mackerras (paulus@cs.anu.edu.au).
 */

#include <linux/sys.h>
#include <asm/processor.h>
#include <asm/errno.h>
#include "../kernel/ppc_asm.tmpl"

	.text

/*
 * ip_fast_csum(buf, len) -- Optimized for IP header
 * len is in words and is always >= 5.
 */
_GLOBAL(ip_fast_csum)
	lwz	r0,0(r3)
	lwzu	r5,4(r3)
	addic.	r4,r4,-2
	addc	r0,r0,r5
	mtctr	r4
	blelr-
1:	lwzu	r4,4(r3)
	adde	r0,r0,r4
	bdnz	1b
	addze	r0,r0		/* add in final carry */
	rlwinm	r3,r0,16,0,31	/* fold two halves together */
	add	r3,r0,r3
	not	r3,r3
	srwi	r3,r3,16
	blr

/*
 * Compute checksum of TCP or UDP pseudo-header:
 *   csum_tcpudp_magic(saddr, daddr, len, proto, sum)
 */	
_GLOBAL(csum_tcpudp_magic)
	rlwimi	r5,r6,16,0,15	/* put proto in upper half of len */
	addc	r0,r3,r4	/* add 4 32-bit words together */
	adde	r0,r0,r5
	adde	r0,r0,r7
	addze	r0,r0		/* add in final carry */
	rlwinm	r3,r0,16,0,31	/* fold two halves together */
	add	r3,r0,r3
	not	r3,r3
	srwi	r3,r3,16
	blr

/*
 * computes the checksum of a memory block at buff, length len,
 * and adds in "sum" (32-bit)
 *
 * csum_partial(buff, len, sum)
 */
_GLOBAL(csum_partial)
	addic	r0,r5,0
	subi	r3,r3,4
	srwi.	r6,r4,2
	beq	3f		/* if we're doing < 4 bytes */
	andi.	r5,r3,2		/* Align buffer to longword boundary */
	beq+	1f
	lhz	r5,4(r3)	/* do 2 bytes to get aligned */
	addi	r3,r3,2
	subi	r4,r4,2
	addc	r0,r0,r5
	srwi.	r6,r4,2		/* # words to do */
	beq	3f
1:	mtctr	r6
2:	lwzu	r5,4(r3)	/* the bdnz has zero overhead, so it should */
	adde	r0,r0,r5	/* be unnecessary to unroll this loop */
	bdnz	2b
	andi.	r4,r4,3
3:	cmpi	0,r4,2
	blt+	4f
	lhz	r5,4(r3)
	addi	r3,r3,2
	subi	r4,r4,2
	adde	r0,r0,r5
4:	cmpi	0,r4,1
	bne+	5f
	lbz	r5,4(r3)
	slwi	r5,r5,8		/* Upper byte of word */
	adde	r0,r0,r5
5:	addze	r3,r0		/* add in final carry */
	blr

/*
 * Computes the checksum of a memory block at src, length len,
 * and adds in "sum" (32-bit), while copying the block to dst.
 * If an access exception occurs on src or dst, it stores -EFAULT
 * to *src_err or *dst_err respectively, and (for an error on
 * src) zeroes the rest of dst.
 *
 * csum_partial_copy_generic(src, dst, len, sum, src_err, dst_err)
 */
_GLOBAL(csum_partial_copy_generic)
	addic	r0,r6,0
	subi	r3,r3,4
	subi	r4,r4,4
	srwi.	r6,r5,2
	beq	3f		/* if we're doing < 4 bytes */
	andi.	r9,r4,2		/* Align dst to longword boundary */
	beq+	1f
81:	lhz	r6,4(r3)	/* do 2 bytes to get aligned */
	addi	r3,r3,2
	subi	r5,r5,2
91:	sth	r6,4(r4)
	addi	r4,r4,2
	addc	r0,r0,r6
	srwi.	r6,r5,2		/* # words to do */
	beq	3f
1:	srwi.	r6,r5,4		/* # groups of 4 words to do */
	beq	10f
	mtctr	r6
71:	lwz	r6,4(r3)
72:	lwz	r9,8(r3)
73:	lwz	r10,12(r3)
74:	lwzu	r11,16(r3)
	adde	r0,r0,r6
75:	stw	r6,4(r4)
	adde	r0,r0,r9
76:	stw	r9,8(r4)
	adde	r0,r0,r10
77:	stw	r10,12(r4)
	adde	r0,r0,r11
78:	stwu	r11,16(r4)
	bdnz	71b
10:	rlwinm.	r6,r5,30,30,31	/* # words left to do */
	beq	13f
	mtctr	r6
82:	lwzu	r9,4(r3)
92:	stwu	r9,4(r4)
	adde	r0,r0,r9
	bdnz	82b
13:	andi.	r5,r5,3
3:	cmpi	0,r5,2
	blt+	4f
83:	lhz	r6,4(r3)
	addi	r3,r3,2
	subi	r5,r5,2
93:	sth	r6,4(r4)
	addi	r4,r4,2
	adde	r0,r0,r6
4:	cmpi	0,r5,1
	bne+	5f
84:	lbz	r6,4(r3)
94:	stb	r6,4(r4)
	slwi	r6,r6,8		/* Upper byte of word */
	adde	r0,r0,r6
5:	addze	r3,r0		/* add in final carry */
	blr

/* These shouldn't go in the fixup section, since that would
   cause the ex_table addresses to get out of order. */

src_error_4:
	mfctr	r6		/* update # bytes remaining from ctr */
	rlwimi	r5,r6,4,0,27
	b	79f
src_error_1:
	li	r6,0
	subi	r5,r5,2
95:	sth	r6,4(r4)
	addi	r4,r4,2
79:	srwi.	r6,r5,2
	beq	3f
	mtctr	r6
src_error_2:
	li	r6,0
96:	stwu	r6,4(r4)
	bdnz	96b
3:	andi.	r5,r5,3
	beq	src_error
src_error_3:
	li	r6,0
	mtctr	r5
	addi	r4,r4,3
97:	stbu	r6,1(r4)
	bdnz	97b
src_error:
	cmpi	0,r7,0
	beq	1f
	li	r6,-EFAULT
	stw	r6,0(r7)
1:	addze	r3,r0
	blr

dst_error:
	cmpi	0,r8,0
	beq	1f
	li	r6,-EFAULT
	stw	r6,0(r8)
1:	addze	r3,r0
	blr

.section __ex_table,"a"
	.long	81b,src_error_1
	.long	91b,dst_error
	.long	71b,src_error_4
	.long	72b,src_error_4
	.long	73b,src_error_4
	.long	74b,src_error_4
	.long	75b,dst_error
	.long	76b,dst_error
	.long	77b,dst_error
	.long	78b,dst_error
	.long	82b,src_error_2
	.long	92b,dst_error
	.long	83b,src_error_3
	.long	93b,dst_error
	.long	84b,src_error_3
	.long	94b,dst_error
	.long	95b,dst_error
	.long	96b,dst_error
	.long	97b,dst_error
/*
 * BK Id: SCCS/s.strcase.c 1.5 05/17/01 18:14:22 cort
 */
#include <linux/ctype.h>

int strcasecmp(const char *s1, const char *s2)
{
	int c1, c2;

	do {
		c1 = tolower(*s1++);
		c2 = tolower(*s2++);
	} while (c1 == c2 && c1 != 0);
	return c1 - c2;
}

int strncasecmp(const char *s1, const char *s2, int n)
{
	int c1, c2;

	do {
		c1 = tolower(*s1++);
		c2 = tolower(*s2++);
	} while ((--n > 0) && c1 == c2 && c1 != 0);
	return c1 - c2;
}
/*
 * BK Id: SCCS/s.locks.c 1.11 08/19/01 22:27:32 paulus
 */
/*
 * Locks for smp ppc 
 * 
 * Written by Cort Dougan (cort@cs.nmt.edu)
 */


#include <linux/kernel.h>
#include <linux/sched.h>
#include <linux/delay.h>
#include <linux/spinlock.h>
#include <asm/processor.h>
#include <asm/system.h>
#include <asm/io.h>

#ifdef SPINLOCK_DEBUG

#undef INIT_STUCK
#define INIT_STUCK 200000000 /*0xffffffff*/

/*
 * Try to acquire a spinlock.
 * Only does the stwcx. if the load returned 0 - the Programming
 * Environments Manual suggests not doing unnecessary stcwx.'s
 * since they may inhibit forward progress by other CPUs in getting
 * a lock.
 */
static unsigned long __spin_trylock(volatile unsigned long *lock)
{
	unsigned long ret;

	__asm__ __volatile__ ("\n\
1:	lwarx	%0,0,%1\n\
	cmpwi	0,%0,0\n\
	bne	2f\n\
	stwcx.	%2,0,%1\n\
	bne-	1b\n\
	isync\n\
2:"
	: "=&r"(ret)
	: "r"(lock), "r"(1)
	: "cr0", "memory");

	return ret;
}

void _spin_lock(spinlock_t *lock)
{
	int cpu = smp_processor_id();
	unsigned int stuck = INIT_STUCK;
	while (__spin_trylock(&lock->lock)) {
		while ((unsigned volatile long)lock->lock != 0) {
			if (!--stuck) {
				printk("_spin_lock(%p) CPU#%d NIP %p"
				       " holder: cpu %ld pc %08lX\n",
				       lock, cpu, __builtin_return_address(0),
				       lock->owner_cpu,lock->owner_pc);
				stuck = INIT_STUCK;
				/* steal the lock */
				/*xchg_u32((void *)&lock->lock,0);*/
			}
		}
	}
	lock->owner_pc = (unsigned long)__builtin_return_address(0);
	lock->owner_cpu = cpu;
}

int spin_trylock(spinlock_t *lock)
{
	if (__spin_trylock(&lock->lock))
		return 0;
	lock->owner_cpu = smp_processor_id(); 
	lock->owner_pc = (unsigned long)__builtin_return_address(0);
	return 1;
}

void _spin_unlock(spinlock_t *lp)
{
  	if ( !lp->lock )
		printk("_spin_unlock(%p): no lock cpu %d curr PC %p %s/%d\n",
		       lp, smp_processor_id(), __builtin_return_address(0),
		       current->comm, current->pid);
	if ( lp->owner_cpu != smp_processor_id() )
		printk("_spin_unlock(%p): cpu %d trying clear of cpu %d pc %lx val %lx\n",
		      lp, smp_processor_id(), (int)lp->owner_cpu,
		      lp->owner_pc,lp->lock);
	lp->owner_pc = lp->owner_cpu = 0;
	wmb();
	lp->lock = 0;
}


/*
 * Just like x86, implement read-write locks as a 32-bit counter
 * with the high bit (sign) being the "write" bit.
 * -- Cort
 */
void _read_lock(rwlock_t *rw)
{
	unsigned long stuck = INIT_STUCK;
	int cpu = smp_processor_id();

again:	
	/* get our read lock in there */
	atomic_inc((atomic_t *) &(rw)->lock);
	if ( (signed long)((rw)->lock) < 0) /* someone has a write lock */
	{
		/* turn off our read lock */
		atomic_dec((atomic_t *) &(rw)->lock);
		/* wait for the write lock to go away */
		while ((signed long)((rw)->lock) < 0)
		{
			if(!--stuck)
			{
				printk("_read_lock(%p) CPU#%d\n", rw, cpu);
				stuck = INIT_STUCK;
			}
		}
		/* try to get the read lock again */
		goto again;
	}
	wmb();
}

void _read_unlock(rwlock_t *rw)
{
	if ( rw->lock == 0 )
		printk("_read_unlock(): %s/%d (nip %08lX) lock %lx\n",
		       current->comm,current->pid,current->thread.regs->nip,
		      rw->lock);
	wmb();
	atomic_dec((atomic_t *) &(rw)->lock);
}

void _write_lock(rwlock_t *rw)
{
	unsigned long stuck = INIT_STUCK;
	int cpu = smp_processor_id();

again:
	if ( test_and_set_bit(31,&(rw)->lock) ) /* someone has a write lock */
	{
		while ( (rw)->lock & (1<<31) ) /* wait for write lock */
		{
			if(!--stuck)
			{
				printk("write_lock(%p) CPU#%d lock %lx)\n",
				       rw, cpu,rw->lock);
				stuck = INIT_STUCK;
			}
			barrier();
		}
		goto again;
	}
	
	if ( (rw)->lock & ~(1<<31)) /* someone has a read lock */
	{
		/* clear our write lock and wait for reads to go away */
		clear_bit(31,&(rw)->lock);
		while ( (rw)->lock & ~(1<<31) )
		{
			if(!--stuck)
			{
				printk("write_lock(%p) 2 CPU#%d lock %lx)\n",
				       rw, cpu,rw->lock);
				stuck = INIT_STUCK;
			}
			barrier();
		}
		goto again;
	}
	wmb();
}

void _write_unlock(rwlock_t *rw)
{
	if ( !(rw->lock & (1<<31)) )
		printk("_write_lock(): %s/%d (nip %08lX) lock %lx\n",
		      current->comm,current->pid,current->thread.regs->nip,
		      rw->lock);
	wmb();
	clear_bit(31,&(rw)->lock);
}

#endif
#include <linux/module.h>
#include <linux/spinlock.h>
#include <asm/atomic.h>
#include <asm/system.h>

/*
 * This is an implementation of the notion of "decrement a
 * reference count, and return locked if it decremented to zero".
 *
 * This implementation can be used on any architecture that
 * has a cmpxchg, and where atomic->value is an int holding
 * the value of the atomic (i.e. the high bits aren't used
 * for a lock or anything like that).
 *
 * N.B. ATOMIC_DEC_AND_LOCK gets defined in include/linux/spinlock.h
 * if spinlocks are empty and thus atomic_dec_and_lock is defined
 * to be atomic_dec_and_test - in that case we don't need it
 * defined here as well.
 */

#ifndef ATOMIC_DEC_AND_LOCK
int atomic_dec_and_lock(atomic_t *atomic, spinlock_t *lock)
{
	int counter;
	int newcount;

	for (;;) {
		counter = atomic_read(atomic);
		newcount = counter - 1;
		if (!newcount)
			break;		/* do it the slow way */

		newcount = cmpxchg(&atomic->counter, counter, newcount);
		if (newcount == counter)
			return 0;
	}

	spin_lock(lock);
	if (atomic_dec_and_test(atomic))
		return 1;
	spin_unlock(lock);
	return 0;
}

EXPORT_SYMBOL(atomic_dec_and_lock);
#endif /* ATOMIC_DEC_AND_LOCK */
# BK Id: SCCS/s.Makefile 1.6 08/30/01 09:33:48 trini
#
#
# Makefile for the linux MPC8xx ppc-specific parts of comm processor
#
# Note! Dependencies are done automagically by 'make dep', which also
# removes any old dependencies. DON'T put your own dependencies here
# unless it's something special (ie not a .c file).
#
# Note 2! The CFLAGS definition is now in the main makefile...

O_TARGET 		:= 8xx_io.o

obj-y			:= commproc.o uart.o

obj-$(CONFIG_FEC_ENET)	+= fec.o
obj-$(CONFIG_SCC_ENET)	+= enet.o
obj-$(CONFIG_UCODE_PATCH) += micropatch.o

include $(TOPDIR)/Rules.make
/*
 * BK Id: SCCS/s.commproc.c 1.15 10/16/01 16:21:52 trini
 */

/*
 * General Purpose functions for the global management of the
 * Communication Processor Module.
 * Copyright (c) 1997 Dan Malek (dmalek@jlc.net)
 *
 * In addition to the individual control of the communication
 * channels, there are a few functions that globally affect the
 * communication processor.
 *
 * Buffer descriptors must be allocated from the dual ported memory
 * space.  The allocator for that is here.  When the communication
 * process is reset, we reclaim the memory available.  There is
 * currently no deallocator for this memory.
 * The amount of space available is platform dependent.  On the
 * MBX, the EPPC software loads additional microcode into the
 * communication processor, and uses some of the DP ram for this
 * purpose.  Current, the first 512 bytes and the last 256 bytes of
 * memory are used.  Right now I am conservative and only use the
 * memory that can never be used for microcode.  If there are
 * applications that require more DP ram, we can expand the boundaries
 * but then we have to be careful of any downloaded microcode.
 */
#include <linux/errno.h>
#include <linux/sched.h>
#include <linux/kernel.h>
#include <linux/param.h>
#include <linux/string.h>
#include <linux/mm.h>
#include <linux/interrupt.h>
#include <asm/irq.h>
#include <asm/mpc8xx.h>
#include <asm/page.h>
#include <asm/pgtable.h>
#include <asm/8xx_immap.h>
#include <asm/commproc.h>

extern int get_pteptr(struct mm_struct *mm, unsigned long addr, pte_t **ptep);

static	uint	dp_alloc_base;	/* Starting offset in DP ram */
static	uint	dp_alloc_top;	/* Max offset + 1 */
static	uint	host_buffer;	/* One page of host buffer */
static	uint	host_end;	/* end + 1 */
cpm8xx_t	*cpmp;		/* Pointer to comm processor space */

/* CPM interrupt vector functions.
*/
struct	cpm_action {
	void	(*handler)(void *, struct pt_regs * regs);
	void	*dev_id;
};
static	struct	cpm_action cpm_vecs[CPMVEC_NR];
static	void	cpm_interrupt(int irq, void * dev, struct pt_regs * regs);
static	void	cpm_error_interrupt(void *, struct pt_regs * regs);

void
m8xx_cpm_reset(uint host_page_addr)
{
	volatile immap_t	 *imp;
	volatile cpm8xx_t	*commproc;
	pte_t			*pte;

	imp = (immap_t *)IMAP_ADDR;
	commproc = (cpm8xx_t *)&imp->im_cpm;

#ifdef CONFIG_UCODE_PATCH
	/* Perform a reset.
	*/
	commproc->cp_cpcr = (CPM_CR_RST | CPM_CR_FLG);

	/* Wait for it.
	*/
	while (commproc->cp_cpcr & CPM_CR_FLG);

	cpm_load_patch(imp);
#endif

	/* Set SDMA Bus Request priority 5.
	 * On 860T, this also enables FEC priority 6.  I am not sure
	 * this is what we realy want for some applications, but the
	 * manual recommends it.
	 * Bit 25, FAM can also be set to use FEC aggressive mode (860T).
	*/
	imp->im_siu_conf.sc_sdcr = 1;

	/* Reclaim the DP memory for our use.
	*/
	dp_alloc_base = CPM_DATAONLY_BASE;
	dp_alloc_top = dp_alloc_base + CPM_DATAONLY_SIZE;

	/* Set the host page for allocation.
	*/
	host_buffer = host_page_addr;	/* Host virtual page address */
	host_end = host_page_addr + PAGE_SIZE;

	/* We need to get this page early, so I have to do it the
	 * hard way.
	 */
	if (get_pteptr(&init_mm, host_page_addr, &pte)) {
		pte_val(*pte) |= _PAGE_NO_CACHE;
		flush_tlb_page(init_mm.mmap, host_buffer);
	}
	else {
		panic("Huh?  No CPM host page?");
	}

	/* Tell everyone where the comm processor resides.
	*/
	cpmp = (cpm8xx_t *)commproc;
}

/* This is called during init_IRQ.  We used to do it above, but this
 * was too early since init_IRQ was not yet called.
 */
void
cpm_interrupt_init(void)
{
	/* Initialize the CPM interrupt controller.
	*/
	((immap_t *)IMAP_ADDR)->im_cpic.cpic_cicr =
	    (CICR_SCD_SCC4 | CICR_SCC_SCC3 | CICR_SCB_SCC2 | CICR_SCA_SCC1) |
		((CPM_INTERRUPT/2) << 13) | CICR_HP_MASK;
	((immap_t *)IMAP_ADDR)->im_cpic.cpic_cimr = 0;

	/* Set our interrupt handler with the core CPU.
	*/
	if (request_8xxirq(CPM_INTERRUPT, cpm_interrupt, 0, "cpm", NULL) != 0)
		panic("Could not allocate CPM IRQ!");

	/* Install our own error handler.
	*/
	cpm_install_handler(CPMVEC_ERROR, cpm_error_interrupt, NULL);
	((immap_t *)IMAP_ADDR)->im_cpic.cpic_cicr |= CICR_IEN;
}

/* CPM interrupt controller interrupt.
*/
static	void
cpm_interrupt(int irq, void * dev, struct pt_regs * regs)
{
	uint	vec;

	/* Get the vector by setting the ACK bit and then reading
	 * the register.
	 */
	((volatile immap_t *)IMAP_ADDR)->im_cpic.cpic_civr = 1;
	vec = ((volatile immap_t *)IMAP_ADDR)->im_cpic.cpic_civr;
	vec >>= 11;

	if (cpm_vecs[vec].handler != 0)
		(*cpm_vecs[vec].handler)(cpm_vecs[vec].dev_id, regs);
	else
		((immap_t *)IMAP_ADDR)->im_cpic.cpic_cimr &= ~(1 << vec);

	/* After servicing the interrupt, we have to remove the status
	 * indicator.
	 */
	((immap_t *)IMAP_ADDR)->im_cpic.cpic_cisr = (1 << vec);
	
}

/* The CPM can generate the error interrupt when there is a race condition
 * between generating and masking interrupts.  All we have to do is ACK it
 * and return.  This is a no-op function so we don't need any special
 * tests in the interrupt handler.
 */
static	void
cpm_error_interrupt(void *dev, struct pt_regs *regs)
{
}

/* Install a CPM interrupt handler.
*/
void
cpm_install_handler(int vec, void (*handler)(void *, struct pt_regs *regs),
		    void *dev_id)
{

	/* If null handler, assume we are trying to free the IRQ.
	*/
	if (!handler) {
		cpm_free_handler(vec);
		return;
	}

	if (cpm_vecs[vec].handler != 0)
		printk("CPM interrupt %x replacing %x\n",
			(uint)handler, (uint)cpm_vecs[vec].handler);
	cpm_vecs[vec].handler = handler;
	cpm_vecs[vec].dev_id = dev_id;
	((immap_t *)IMAP_ADDR)->im_cpic.cpic_cimr |= (1 << vec);
}

/* Free a CPM interrupt handler.
*/
void
cpm_free_handler(int vec)
{
	cpm_vecs[vec].handler = NULL;
	cpm_vecs[vec].dev_id = NULL;
	((immap_t *)IMAP_ADDR)->im_cpic.cpic_cimr &= ~(1 << vec);
}

/* Allocate some memory from the dual ported ram.  We may want to
 * enforce alignment restrictions, but right now everyone is a good
 * citizen.
 */
uint
m8xx_cpm_dpalloc(uint size)
{
	uint	retloc;

	if ((dp_alloc_base + size) >= dp_alloc_top)
		return(CPM_DP_NOSPACE);

	retloc = dp_alloc_base;
	dp_alloc_base += size;

	return(retloc);
}

/* We also own one page of host buffer space for the allocation of
 * UART "fifos" and the like.
 */
uint
m8xx_cpm_hostalloc(uint size)
{
	uint	retloc;

	if ((host_buffer + size) >= host_end)
		return(0);

	retloc = host_buffer;
	host_buffer += size;

	return(retloc);
}

/* Set a baud rate generator.  This needs lots of work.  There are
 * four BRGs, any of which can be wired to any channel.
 * The internal baud rate clock is the system clock divided by 16.
 * This assumes the baudrate is 16x oversampled by the uart.
 */
#define BRG_INT_CLK		(((bd_t *)__res)->bi_intfreq)
#define BRG_UART_CLK		(BRG_INT_CLK/16)
#define BRG_UART_CLK_DIV16	(BRG_UART_CLK/16)

void
m8xx_cpm_setbrg(uint brg, uint rate)
{
	volatile uint	*bp;

	/* This is good enough to get SMCs running.....
	*/
	bp = (uint *)&cpmp->cp_brgc1;
	bp += brg;
	/* The BRG has a 12-bit counter.  For really slow baud rates (or
	 * really fast processors), we may have to further divide by 16.
	 */
	if (((BRG_UART_CLK / rate) - 1) < 4096)
		*bp = (((BRG_UART_CLK / rate) - 1) << 1) | CPM_BRG_EN;
	else
		*bp = (((BRG_UART_CLK_DIV16 / rate) - 1) << 1) |
						CPM_BRG_EN | CPM_BRG_DIV16;
}
#
# MPC8xx Communication options
#
mainmenu_option next_comment
comment 'MPC8xx CPM Options'

if [ "$CONFIG_NET_ETHERNET" = "y" ]; then
  bool 'CPM SCC Ethernet' CONFIG_SCC_ENET
  if [ "$CONFIG_SCC_ENET" = "y" ]; then
    choice 'SCC used for Ethernet'	\
  	"SCC1	CONFIG_SCC1_ENET	\
	 SCC2	CONFIG_SCC2_ENET	\
	 SCC3	CONFIG_SCC3_ENET"	SCC1
  fi
  bool '860T FEC Ethernet' CONFIG_FEC_ENET
  if [ "$CONFIG_FEC_ENET" = "y" ]; then
    bool 'Use MDIO for PHY configuration' CONFIG_USE_MDIO
  fi
  bool 'Use Big CPM Ethernet Buffers' CONFIG_ENET_BIG_BUFFERS
fi
bool 'Use SMC2 for UART' CONFIG_SMC2_UART
if [ "$CONFIG_SMC2_UART" = "y" ]; then
  bool 'Use Alternate SMC2 I/O (823/850)' CONFIG_ALTSMC2
  bool 'Use SMC2 for Console' CONFIG_CONS_SMC2
fi
bool 'Enable SCC2 and SCC3 for UART' CONFIG_USE_SCC_IO

# This doesn't really belong here, but it is convenient to ask
# 8xx specific questions.

comment 'Generic MPC8xx Options'
bool 'Copy-Back Data Cache (else Writethrough)' CONFIG_8xx_COPYBACK
bool 'CPU6 Silicon Errata (860 Pre Rev. C)' CONFIG_8xx_CPU6
bool 'I2C/SPI Microcode Patch' CONFIG_UCODE_PATCH

endmenu
/*
 * BK Id: SCCS/s.uart.c 1.23 12/29/01 14:50:03 trini
 */
/*
 *  UART driver for MPC860 CPM SCC or SMC
 *  Copyright (c) 1997 Dan Malek (dmalek@jlc.net)
 *
 * I used the serial.c driver as the framework for this driver.
 * Give credit to those guys.
 * The original code was written for the MBX860 board.  I tried to make
 * it generic, but there may be some assumptions in the structures that
 * have to be fixed later.
 * To save porting time, I did not bother to change any object names
 * that are not accessed outside of this file.
 * It still needs lots of work........When it was easy, I included code
 * to support the SCCs, but this has never been tested, nor is it complete.
 * Only the SCCs support modem control, so that is not complete either.
 *
 * This module exports the following rs232 io functions:
 *
 *	int rs_8xx_init(void);
 */

#include <linux/config.h>
#include <linux/module.h>
#include <linux/errno.h>
#include <linux/signal.h>
#include <linux/sched.h>
#include <linux/timer.h>
#include <linux/interrupt.h>
#include <linux/tty.h>
#include <linux/tty_flip.h>
#include <linux/serial.h>
#include <linux/serialP.h>
#include <linux/major.h>
#include <linux/string.h>
#include <linux/fcntl.h>
#include <linux/ptrace.h>
#include <linux/mm.h>
#include <linux/slab.h>
#include <linux/init.h>
#include <linux/delay.h>
#include <asm/uaccess.h>
#include <asm/8xx_immap.h>
#include <asm/mpc8xx.h>
#include <asm/commproc.h>
#ifdef CONFIG_MAGIC_SYSRQ
#include <linux/sysrq.h>
#endif

#ifdef CONFIG_KGDB
extern void breakpoint(void);
extern void set_debug_traps(void);
extern int  kgdb_output_string (const char* s, unsigned int count);
#endif

#ifdef CONFIG_SERIAL_CONSOLE
#include <linux/console.h>

/* this defines the index into rs_table for the port to use
*/
# ifndef CONFIG_SERIAL_CONSOLE_PORT
#  ifdef CONFIG_SCC3_ENET
#   ifdef CONFIG_CONS_SMC2
#    define CONFIG_SERIAL_CONSOLE_PORT	0	/* Console on SMC2 is 1st port */
#   else
#    error "Can't use SMC1 for console with Ethernet on SCC3"
#   endif
#  else	/* ! CONFIG_SCC3_ENET */
#   ifdef CONFIG_CONS_SMC2			/* Console on SMC2 */
#    define CONFIG_SERIAL_CONSOLE_PORT	1
#   else					/* Console on SMC1 */
#    define CONFIG_SERIAL_CONSOLE_PORT	0
#   endif /* CONFIG_CONS_SMC2 */
#  endif  /* CONFIG_SCC3_ENET */
# endif	  /* CONFIG_SERIAL_CONSOLE_PORT */
#endif	  /* CONFIG_SERIAL_CONSOLE */

#if 0
/* SCC2 for console
*/
#undef CONFIG_SERIAL_CONSOLE_PORT
#define CONFIG_SERIAL_CONSOLE_PORT	2
#endif

#define TX_WAKEUP	ASYNC_SHARE_IRQ

static char *serial_name = "CPM UART driver";
static char *serial_version = "0.03";

static DECLARE_TASK_QUEUE(tq_serial);

static struct tty_driver serial_driver, callout_driver;
static int serial_refcount;
static int serial_console_setup(struct console *co, char *options);

static void serial_console_write(struct console *c, const char *s,
				unsigned count);
static kdev_t serial_console_device(struct console *c);
static int serial_console_wait_key(struct console *co);

#if defined(CONFIG_SERIAL_CONSOLE) && defined(CONFIG_MAGIC_SYSRQ)
static unsigned long break_pressed; /* break, really ... */
#endif

/*
 * Serial driver configuration section.  Here are the various options:
 */
#define SERIAL_PARANOIA_CHECK
#define CONFIG_SERIAL_NOPAUSE_IO
#define SERIAL_DO_RESTART

/* Set of debugging defines */

#undef SERIAL_DEBUG_INTR
#undef SERIAL_DEBUG_OPEN
#undef SERIAL_DEBUG_FLOW
#undef SERIAL_DEBUG_RS_WAIT_UNTIL_SENT

#define _INLINE_ inline
  
#define DBG_CNT(s)

/* We overload some of the items in the data structure to meet our
 * needs.  For example, the port address is the CPM parameter ram
 * offset for the SCC or SMC.  The maximum number of ports is 4 SCCs and
 * 2 SMCs.  The "hub6" field is used to indicate the channel number, with
 * a flag indicating SCC or SMC, and the number is used as an index into
 * the CPM parameter area for this device.
 * The "type" field is currently set to 0, for PORT_UNKNOWN.  It is
 * not currently used.  I should probably use it to indicate the port
 * type of SMC or SCC.
 * The SMCs do not support any modem control signals.
 */
#define smc_scc_num	hub6
#define NUM_IS_SCC	((int)0x00010000)
#define PORT_NUM(P)	((P) & 0x0000ffff)

/* Processors other than the 860 only get SMCs configured by default.
 * Either they don't have SCCs or they are allocated somewhere else.
 * Of course, there are now 860s without some SCCs, so we will need to
 * address that someday.
 * The Embedded Planet Multimedia I/O cards use TDM interfaces to the
 * stereo codec parts, and we use SMC2 to help support that.
 */
static struct serial_state rs_table[] = {
	/* UART CLK   PORT          IRQ      FLAGS  NUM   */
#ifndef CONFIG_SCC3_ENET	/* SMC1 not usable with Ethernet on SCC3 */
  	{ 0,     0, PROFF_SMC1, CPMVEC_SMC1,   0,    0 },    /* SMC1 ttyS0 */
#endif
#if !defined(CONFIG_USB_MPC8xx) && !defined(CONFIG_USB_CLIENT_MPC8xx)
# ifdef CONFIG_SMC2_UART
  	{ 0,     0, PROFF_SMC2, CPMVEC_SMC2,   0,    1 },    /* SMC2 ttyS1 */
# endif
# ifdef CONFIG_USE_SCC_IO
  	{ 0,     0, PROFF_SCC2, CPMVEC_SCC2,   0,    (NUM_IS_SCC | 1) },    /* SCC2 ttyS2 */
  	{ 0,     0, PROFF_SCC3, CPMVEC_SCC3,   0,    (NUM_IS_SCC | 2) },    /* SCC3 ttyS3 */
# endif
  #else /* CONFIG_USB_xxx */
# ifdef CONFIG_USE_SCC_IO
  	{ 0,     0, PROFF_SCC3, CPMVEC_SCC3,   0,    (NUM_IS_SCC | 2) },    /* SCC3 ttyS3 */
# endif
#endif	/* CONFIG_USB_xxx */
};

#define NR_PORTS	(sizeof(rs_table)/sizeof(struct serial_state))

static struct tty_struct *serial_table[NR_PORTS];
static struct termios *serial_termios[NR_PORTS];
static struct termios *serial_termios_locked[NR_PORTS];

/* The number of buffer descriptors and their sizes.
*/
#define RX_NUM_FIFO	4
#define RX_BUF_SIZE	32
#define TX_NUM_FIFO	4
#define TX_BUF_SIZE	32

#ifndef MIN
#define MIN(a,b)	((a) < (b) ? (a) : (b))
#endif

/* The async_struct in serial.h does not really give us what we
 * need, so define our own here.
 */
typedef struct serial_info {
	int			magic;
	int			flags;
	struct serial_state	*state;
	struct tty_struct 	*tty;
	int			read_status_mask;
	int			ignore_status_mask;
	int			timeout;
	int			line;
	int			x_char;	/* xon/xoff character */
	int			close_delay;
	unsigned short		closing_wait;
	unsigned short		closing_wait2;
	unsigned long		event;
	unsigned long		last_active;
	int			blocked_open; /* # of blocked opens */
	long			session; /* Session of opening process */
	long			pgrp; /* pgrp of opening process */
	struct tq_struct	tqueue;
	struct tq_struct	tqueue_hangup;
	wait_queue_head_t	open_wait;
	wait_queue_head_t	close_wait;

	/* CPM Buffer Descriptor pointers.
	*/
	cbd_t			*rx_bd_base;
	cbd_t			*rx_cur;
	cbd_t			*tx_bd_base;
	cbd_t			*tx_cur;
} ser_info_t;

static struct console sercons = {
	name:		"ttyS",
	write:		serial_console_write,
	device:		serial_console_device,
	wait_key:	serial_console_wait_key,
	setup:		serial_console_setup,
	flags:		CON_PRINTBUFFER,
	index:		CONFIG_SERIAL_CONSOLE_PORT,
};

static void change_speed(ser_info_t *info);
static void rs_8xx_wait_until_sent(struct tty_struct *tty, int timeout);

static inline int serial_paranoia_check(ser_info_t *info,
					kdev_t device, const char *routine)
{
#ifdef SERIAL_PARANOIA_CHECK
	static const char *badmagic =
		"Warning: bad magic number for serial struct (%s) in %s\n";
	static const char *badinfo =
		"Warning: null async_struct for (%s) in %s\n";

	if (!info) {
		printk(badinfo, kdevname(device), routine);
		return 1;
	}
	if (info->magic != SERIAL_MAGIC) {
		printk(badmagic, kdevname(device), routine);
		return 1;
	}
#endif
	return 0;
}

/*
 * This is used to figure out the divisor speeds and the timeouts,
 * indexed by the termio value.  The generic CPM functions are responsible
 * for setting and assigning baud rate generators for us.
 */
static int baud_table[] = {
	0, 50, 75, 110, 134, 150, 200, 300, 600, 1200, 1800, 2400, 4800,
	9600, 19200, 38400, 57600, 115200, 230400, 460800, 0 };


/*
 * ------------------------------------------------------------
 * rs_stop() and rs_start()
 *
 * This routines are called before setting or resetting tty->stopped.
 * They enable or disable transmitter interrupts, as necessary.
 * ------------------------------------------------------------
 */
static void rs_8xx_stop(struct tty_struct *tty)
{
	ser_info_t *info = (ser_info_t *)tty->driver_data;
	int	idx;
	unsigned long flags;
	volatile scc_t	*sccp;
	volatile smc_t	*smcp;

	if (serial_paranoia_check(info, tty->device, "rs_stop"))
		return;
	
	save_flags(flags); cli();
	idx = PORT_NUM(info->state->smc_scc_num);
	if (info->state->smc_scc_num & NUM_IS_SCC) {
		sccp = &cpmp->cp_scc[idx];
		sccp->scc_sccm &= ~UART_SCCM_TX;
	}
	else {
		smcp = &cpmp->cp_smc[idx];
		smcp->smc_smcm &= ~SMCM_TX;
	}
	restore_flags(flags);
}

static void rs_8xx_start(struct tty_struct *tty)
{
	ser_info_t *info = (ser_info_t *)tty->driver_data;
	int	idx;
	unsigned long flags;
	volatile scc_t	*sccp;
	volatile smc_t	*smcp;

	if (serial_paranoia_check(info, tty->device, "rs_stop"))
		return;
	
	idx = PORT_NUM(info->state->smc_scc_num);
	save_flags(flags); cli();
	if (info->state->smc_scc_num & NUM_IS_SCC) {
		sccp = &cpmp->cp_scc[idx];
		sccp->scc_sccm |= UART_SCCM_TX;
	}
	else {
		smcp = &cpmp->cp_smc[idx];
		smcp->smc_smcm |= SMCM_TX;
	}
	restore_flags(flags);
}

/*
 * ----------------------------------------------------------------------
 *
 * Here starts the interrupt handling routines.  All of the following
 * subroutines are declared as inline and are folded into
 * rs_interrupt().  They were separated out for readability's sake.
 *
 * Note: rs_interrupt() is a "fast" interrupt, which means that it
 * runs with interrupts turned off.  People who may want to modify
 * rs_interrupt() should try to keep the interrupt handler as fast as
 * possible.  After you are done making modifications, it is not a bad
 * idea to do:
 * 
 * gcc -S -DKERNEL -Wall -Wstrict-prototypes -O6 -fomit-frame-pointer serial.c
 *
 * and look at the resulting assemble code in serial.s.
 *
 * 				- Ted Ts'o (tytso@mit.edu), 7-Mar-93
 * -----------------------------------------------------------------------
 */

/*
 * This routine is used by the interrupt handler to schedule
 * processing in the software interrupt portion of the driver.
 */
static _INLINE_ void rs_sched_event(ser_info_t *info,
				  int event)
{
	info->event |= 1 << event;
	queue_task(&info->tqueue, &tq_serial);
	mark_bh(SERIAL_BH);
}

static _INLINE_ void receive_chars(ser_info_t *info, struct pt_regs *regs)
{
	struct tty_struct *tty = info->tty;
	unsigned char ch, *cp;
	/*int	ignored = 0;*/
	int	i;
	ushort	status;
	struct	async_icount *icount;
	volatile cbd_t	*bdp;

	icount = &info->state->icount;

	/* Just loop through the closed BDs and copy the characters into
	 * the buffer.
	 */
	bdp = info->rx_cur;
	for (;;) {
		if (bdp->cbd_sc & BD_SC_EMPTY)	/* If this one is empty */
			break;			/*   we are all done */

		/* The read status mask tell us what we should do with
		 * incoming characters, especially if errors occur.
		 * One special case is the use of BD_SC_EMPTY.  If
		 * this is not set, we are supposed to be ignoring
		 * inputs.  In this case, just mark the buffer empty and
		 * continue.
		if (!(info->read_status_mask & BD_SC_EMPTY)) {
			bdp->cbd_sc |= BD_SC_EMPTY;
			bdp->cbd_sc &=
				~(BD_SC_BR | BD_SC_FR | BD_SC_PR | BD_SC_OV);

			if (bdp->cbd_sc & BD_SC_WRAP)
				bdp = info->rx_bd_base;
			else
				bdp++;
			continue;
		}
		 */

		/* Get the number of characters and the buffer pointer.
		*/
		i = bdp->cbd_datlen;
		cp = (unsigned char *)__va(bdp->cbd_bufaddr);
		status = bdp->cbd_sc;

		/* Check to see if there is room in the tty buffer for
		 * the characters in our BD buffer.  If not, we exit
		 * now, leaving the BD with the characters.  We'll pick
		 * them up again on the next receive interrupt (which could
		 * be a timeout).
		 */
		if ((tty->flip.count + i) >= TTY_FLIPBUF_SIZE)
			break;

		while (i-- > 0) {
			ch = *cp++;
			*tty->flip.char_buf_ptr = ch;
			icount->rx++;

#ifdef SERIAL_DEBUG_INTR
			printk("DR%02x:%02x...", ch, status);
#endif
			*tty->flip.flag_buf_ptr = 0;
			if (status & (BD_SC_BR | BD_SC_FR |
				       BD_SC_PR | BD_SC_OV)) {
				/*
				 * For statistics only
				 */
				if (status & BD_SC_BR)
					icount->brk++;
				else if (status & BD_SC_PR)
					icount->parity++;
				else if (status & BD_SC_FR)
					icount->frame++;
				if (status & BD_SC_OV)
					icount->overrun++;

				/*
				 * Now check to see if character should be
				 * ignored, and mask off conditions which
				 * should be ignored.
				if (status & info->ignore_status_mask) {
					if (++ignored > 100)
						break;
					continue;
				}
				 */
				status &= info->read_status_mask;

				if (status & (BD_SC_BR)) {
#ifdef SERIAL_DEBUG_INTR
					printk("handling break....");
#endif
					*tty->flip.flag_buf_ptr = TTY_BREAK;
					if (info->flags & ASYNC_SAK)
						do_SAK(tty);
				} else if (status & BD_SC_PR)
					*tty->flip.flag_buf_ptr = TTY_PARITY;
				else if (status & BD_SC_FR)
					*tty->flip.flag_buf_ptr = TTY_FRAME;
				if (status & BD_SC_OV) {
					/*
					 * Overrun is special, since it's
					 * reported immediately, and doesn't
					 * affect the current character
					 */
					if (tty->flip.count < TTY_FLIPBUF_SIZE) {
						tty->flip.count++;
						tty->flip.flag_buf_ptr++;
						tty->flip.char_buf_ptr++;
						*tty->flip.flag_buf_ptr =
								TTY_OVERRUN;
					}
				}
			}
#if defined(CONFIG_SERIAL_CONSOLE) && defined(CONFIG_MAGIC_SYSRQ)
			if (break_pressed && info->line == sercons.index) {
				if (ch != 0 && time_before(jiffies, 
							break_pressed + HZ*5)) {
					handle_sysrq(ch, regs, NULL, NULL);
					break_pressed = 0;
					goto ignore_char;
				} else
					break_pressed = 0;
			}
#endif
			if (tty->flip.count >= TTY_FLIPBUF_SIZE)
				break;

			tty->flip.flag_buf_ptr++;
			tty->flip.char_buf_ptr++;
			tty->flip.count++;
		}

#if defined(CONFIG_SERIAL_CONSOLE) && defined(CONFIG_MAGIC_SYSRQ)
	ignore_char:	
#endif
		/* This BD is ready to be used again.  Clear status.
		 * Get next BD.
		 */
		bdp->cbd_sc |= BD_SC_EMPTY;
		bdp->cbd_sc &= ~(BD_SC_BR | BD_SC_FR | BD_SC_PR | BD_SC_OV);

		if (bdp->cbd_sc & BD_SC_WRAP)
			bdp = info->rx_bd_base;
		else
			bdp++;
	}
	info->rx_cur = (cbd_t *)bdp;

	queue_task(&tty->flip.tqueue, &tq_timer);
}

static _INLINE_ void receive_break(ser_info_t *info, struct pt_regs *regs)
{
	struct tty_struct *tty = info->tty;

	info->state->icount.brk++;

#if defined(CONFIG_SERIAL_CONSOLE) && defined(CONFIG_MAGIC_SYSRQ)
	if (info->line == sercons.index) {
		if (!break_pressed) {
			break_pressed = jiffies;
			return;
		} else
			break_pressed = 0;
	}
#endif

	/* Check to see if there is room in the tty buffer for
	 * the break.  If not, we exit now, losing the break.  FIXME
	 */
	if ((tty->flip.count + 1) >= TTY_FLIPBUF_SIZE)
		return;
	*(tty->flip.flag_buf_ptr++) = TTY_BREAK;
	*(tty->flip.char_buf_ptr++) = 0;
	tty->flip.count++;

	queue_task(&tty->flip.tqueue, &tq_timer);
}

static _INLINE_ void transmit_chars(ser_info_t *info, struct pt_regs *regs)
{
	
	if ((info->flags & TX_WAKEUP) ||
	    (info->tty->flags & (1 << TTY_DO_WRITE_WAKEUP))) {
		rs_sched_event(info, RS_EVENT_WRITE_WAKEUP);
	}

#ifdef SERIAL_DEBUG_INTR
	printk("THRE...");
#endif
}

#ifdef notdef
	/* I need to do this for the SCCs, so it is left as a reminder.
	*/
static _INLINE_ void check_modem_status(struct async_struct *info)
{
	int	status;
	struct	async_icount *icount;
	
	status = serial_in(info, UART_MSR);

	if (status & UART_MSR_ANY_DELTA) {
		icount = &info->state->icount;
		/* update input line counters */
		if (status & UART_MSR_TERI)
			icount->rng++;
		if (status & UART_MSR_DDSR)
			icount->dsr++;
		if (status & UART_MSR_DDCD) {
			icount->dcd++;
#ifdef CONFIG_HARD_PPS
			if ((info->flags & ASYNC_HARDPPS_CD) &&
			    (status & UART_MSR_DCD))
				hardpps();
#endif
		}
		if (status & UART_MSR_DCTS)
			icount->cts++;
		wake_up_interruptible(&info->delta_msr_wait);
	}

	if ((info->flags & ASYNC_CHECK_CD) && (status & UART_MSR_DDCD)) {
#if (defined(SERIAL_DEBUG_OPEN) || defined(SERIAL_DEBUG_INTR))
		printk("ttys%d CD now %s...", info->line,
		       (status & UART_MSR_DCD) ? "on" : "off");
#endif		
		if (status & UART_MSR_DCD)
			wake_up_interruptible(&info->open_wait);
		else if (!((info->flags & ASYNC_CALLOUT_ACTIVE) &&
			   (info->flags & ASYNC_CALLOUT_NOHUP))) {
#ifdef SERIAL_DEBUG_OPEN
			printk("scheduling hangup...");
#endif
			MOD_INC_USE_COUNT;
			if (schedule_task(&info->tqueue_hangup) == 0)
				MOD_DEC_USE_COUNT;
		}
	}
	if (info->flags & ASYNC_CTS_FLOW) {
		if (info->tty->hw_stopped) {
			if (status & UART_MSR_CTS) {
#if (defined(SERIAL_DEBUG_INTR) || defined(SERIAL_DEBUG_FLOW))
				printk("CTS tx start...");
#endif
				info->tty->hw_stopped = 0;
				info->IER |= UART_IER_THRI;
				serial_out(info, UART_IER, info->IER);
				rs_sched_event(info, RS_EVENT_WRITE_WAKEUP);
				return;
			}
		} else {
			if (!(status & UART_MSR_CTS)) {
#if (defined(SERIAL_DEBUG_INTR) || defined(SERIAL_DEBUG_FLOW))
				printk("CTS tx stop...");
#endif
				info->tty->hw_stopped = 1;
				info->IER &= ~UART_IER_THRI;
				serial_out(info, UART_IER, info->IER);
			}
		}
	}
}
#endif

/*
 * This is the serial driver's interrupt routine for a single port
 */
static void rs_8xx_interrupt(void *dev_id, struct pt_regs *regs)
{
	u_char	events;
	int	idx;
	ser_info_t *info;
	volatile smc_t	*smcp;
	volatile scc_t	*sccp;
	
	info = (ser_info_t *)dev_id;

	idx = PORT_NUM(info->state->smc_scc_num);
	if (info->state->smc_scc_num & NUM_IS_SCC) {
		sccp = &cpmp->cp_scc[idx];
		events = sccp->scc_scce;
		if (events & SMCM_BRKE)
			receive_break(info, regs);
		if (events & SCCM_RX)
			receive_chars(info, regs);
		if (events & SCCM_TX)
			transmit_chars(info, regs);
		sccp->scc_scce = events;
	}
	else {
		smcp = &cpmp->cp_smc[idx];
		events = smcp->smc_smce;
		if (events & SMCM_BRKE)
			receive_break(info, regs);
		if (events & SMCM_RX)
			receive_chars(info, regs);
		if (events & SMCM_TX)
			transmit_chars(info, regs);
		smcp->smc_smce = events;
	}
	
#ifdef SERIAL_DEBUG_INTR
	printk("rs_interrupt_single(%d, %x)...",
					info->state->smc_scc_num, events);
#endif
#ifdef modem_control
	check_modem_status(info);
#endif
	info->last_active = jiffies;
#ifdef SERIAL_DEBUG_INTR
	printk("end.\n");
#endif
}


/*
 * -------------------------------------------------------------------
 * Here ends the serial interrupt routines.
 * -------------------------------------------------------------------
 */

/*
 * This routine is used to handle the "bottom half" processing for the
 * serial driver, known also the "software interrupt" processing.
 * This processing is done at the kernel interrupt level, after the
 * rs_interrupt() has returned, BUT WITH INTERRUPTS TURNED ON.  This
 * is where time-consuming activities which can not be done in the
 * interrupt driver proper are done; the interrupt driver schedules
 * them using rs_sched_event(), and they get done here.
 */
static void do_serial_bh(void)
{
	run_task_queue(&tq_serial);
}

static void do_softint(void *private_)
{
	ser_info_t	*info = (ser_info_t *) private_;
	struct tty_struct	*tty;
	
	tty = info->tty;
	if (!tty)
		return;

	if (test_and_clear_bit(RS_EVENT_WRITE_WAKEUP, &info->event)) {
		if ((tty->flags & (1 << TTY_DO_WRITE_WAKEUP)) &&
		    tty->ldisc.write_wakeup)
			(tty->ldisc.write_wakeup)(tty);
		wake_up_interruptible(&tty->write_wait);
	}
}

/*
 * This routine is called from the scheduler tqueue when the interrupt
 * routine has signalled that a hangup has occurred.  The path of
 * hangup processing is:
 *
 * 	serial interrupt routine -> (scheduler tqueue) ->
 * 	do_serial_hangup() -> tty->hangup() -> rs_hangup()
 * 
 */
static void do_serial_hangup(void *private_)
{
	struct async_struct	*info = (struct async_struct *) private_;
	struct tty_struct	*tty;
	
	tty = info->tty;
	if (tty)
		tty_hangup(tty);
	MOD_DEC_USE_COUNT;
}

/*static void rs_8xx_timer(void)
{
	printk("rs_8xx_timer\n");
}*/


static int startup(ser_info_t *info)
{
	unsigned long flags;
	int	retval=0;
	int	idx;
	struct serial_state *state= info->state;
	volatile smc_t		*smcp;
	volatile scc_t		*sccp;
	volatile smc_uart_t	*up;
	volatile scc_uart_t	*scup;


	save_flags(flags); cli();

	if (info->flags & ASYNC_INITIALIZED) {
		goto errout;
	}

#ifdef maybe
	if (!state->port || !state->type) {
		if (info->tty)
			set_bit(TTY_IO_ERROR, &info->tty->flags);
		goto errout;
	}
#endif

#ifdef SERIAL_DEBUG_OPEN
	printk("starting up ttys%d (irq %d)...", info->line, state->irq);
#endif


#ifdef modem_control
	info->MCR = 0;
	if (info->tty->termios->c_cflag & CBAUD)
		info->MCR = UART_MCR_DTR | UART_MCR_RTS;
#endif
	
	if (info->tty)
		clear_bit(TTY_IO_ERROR, &info->tty->flags);

	/*
	 * and set the speed of the serial port
	 */
	change_speed(info);
	
	idx = PORT_NUM(info->state->smc_scc_num);
	if (info->state->smc_scc_num & NUM_IS_SCC) {
		sccp = &cpmp->cp_scc[idx];
		scup = (scc_uart_t *)&cpmp->cp_dparam[state->port];
		scup->scc_genscc.scc_mrblr = RX_BUF_SIZE;
		scup->scc_maxidl = RX_BUF_SIZE;
		sccp->scc_sccm |= (UART_SCCM_TX | UART_SCCM_RX);
		sccp->scc_gsmrl |= (SCC_GSMRL_ENR | SCC_GSMRL_ENT);
	}
	else {
		smcp = &cpmp->cp_smc[idx];

		/* Enable interrupts and I/O.
		*/
		smcp->smc_smcm |= (SMCM_RX | SMCM_TX);
		smcp->smc_smcmr |= (SMCMR_REN | SMCMR_TEN);

		/* We can tune the buffer length and idle characters
		 * to take advantage of the entire incoming buffer size.
		 * If mrblr is something other than 1, maxidl has to be
		 * non-zero or we never get an interrupt.  The maxidl
		 * is the number of character times we wait after reception
		 * of the last character before we decide no more characters
		 * are coming.
		 */
		up = (smc_uart_t *)&cpmp->cp_dparam[state->port];
		up->smc_mrblr = RX_BUF_SIZE;
		up->smc_maxidl = RX_BUF_SIZE;
		up->smc_brkcr = 1;	/* number of break chars */
	}

	info->flags |= ASYNC_INITIALIZED;
	restore_flags(flags);
	return 0;
	
errout:
	restore_flags(flags);
	return retval;
}

/*
 * This routine will shutdown a serial port; interrupts are disabled, and
 * DTR is dropped if the hangup on close termio flag is on.
 */
static void shutdown(ser_info_t * info)
{
	unsigned long	flags;
	struct serial_state *state;
	int		idx;
	volatile smc_t	*smcp;
	volatile scc_t	*sccp;

	if (!(info->flags & ASYNC_INITIALIZED))
		return;

	state = info->state;

#ifdef SERIAL_DEBUG_OPEN
	printk("Shutting down serial port %d (irq %d)....", info->line,
	       state->irq);
#endif
	
	save_flags(flags); cli(); /* Disable interrupts */

	idx = PORT_NUM(state->smc_scc_num);
	if (state->smc_scc_num & NUM_IS_SCC) {
		sccp = &cpmp->cp_scc[idx];
		sccp->scc_gsmrl &= ~(SCC_GSMRL_ENR | SCC_GSMRL_ENT);
#ifdef CONFIG_SERIAL_CONSOLE
		/* We can't disable the transmitter if this is the
		 * system console.
		 */
		if ((state - rs_table) != CONFIG_SERIAL_CONSOLE_PORT)
#endif
			sccp->scc_sccm &= ~(UART_SCCM_TX | UART_SCCM_RX);
	}
	else {
		smcp = &cpmp->cp_smc[idx];

		/* Disable interrupts and I/O.
		*/
		smcp->smc_smcm &= ~(SMCM_RX | SMCM_TX);
#ifdef CONFIG_SERIAL_CONSOLE
		/* We can't disable the transmitter if this is the
		 * system console.
		 */
		if ((state - rs_table) != CONFIG_SERIAL_CONSOLE_PORT)
#endif
			smcp->smc_smcmr &= ~(SMCMR_REN | SMCMR_TEN);
	}
	
	if (info->tty)
		set_bit(TTY_IO_ERROR, &info->tty->flags);

	info->flags &= ~ASYNC_INITIALIZED;
	restore_flags(flags);
}

/*
 * This routine is called to set the UART divisor registers to match
 * the specified baud rate for a serial port.
 */
static void change_speed(ser_info_t *info)
{
	int	baud_rate;
	unsigned cflag, cval, scval, prev_mode, new_mode;
	int	i, bits, sbits, idx;
	unsigned long	flags;
	struct serial_state *state;
	volatile smc_t	*smcp;
	volatile scc_t	*sccp;

	if (!info->tty || !info->tty->termios)
		return;
	cflag = info->tty->termios->c_cflag;

	state = info->state;

	/* Character length programmed into the mode register is the
	 * sum of: 1 start bit, number of data bits, 0 or 1 parity bit,
	 * 1 or 2 stop bits, minus 1.
	 * The value 'bits' counts this for us.
	 */
	cval = 0;
	scval = 0;

	/* byte size and parity */
	switch (cflag & CSIZE) {
	      case CS5: bits = 5; break;
	      case CS6: bits = 6; break;
	      case CS7: bits = 7; break;
	      case CS8: bits = 8; break;
	      /* Never happens, but GCC is too dumb to figure it out */
	      default:  bits = 8; break;
	}
	sbits = bits - 5;

	if (cflag & CSTOPB) {
		cval |= SMCMR_SL;	/* Two stops */
		scval |= SCU_PMSR_SL;
		bits++;
	}
	if (cflag & PARENB) {
		cval |= SMCMR_PEN;
		scval |= SCU_PMSR_PEN;
		bits++;
		if (!(cflag & PARODD)) {
			cval |= SMCMR_PM_EVEN;
			scval |= (SCU_PMSR_REVP | SCU_PMSR_TEVP);
		}
	}

	/* Determine divisor based on baud rate */
	i = cflag & CBAUD;
	if (i >= (sizeof(baud_table)/sizeof(int)))
		baud_rate = 9600;
	else
		baud_rate = baud_table[i];

	info->timeout = (TX_BUF_SIZE*HZ*bits);
	info->timeout += HZ/50;		/* Add .02 seconds of slop */

#ifdef modem_control
	/* CTS flow control flag and modem status interrupts */
	info->IER &= ~UART_IER_MSI;
	if (info->flags & ASYNC_HARDPPS_CD)
		info->IER |= UART_IER_MSI;
	if (cflag & CRTSCTS) {
		info->flags |= ASYNC_CTS_FLOW;
		info->IER |= UART_IER_MSI;
	} else
		info->flags &= ~ASYNC_CTS_FLOW;
	if (cflag & CLOCAL)
		info->flags &= ~ASYNC_CHECK_CD;
	else {
		info->flags |= ASYNC_CHECK_CD;
		info->IER |= UART_IER_MSI;
	}
	serial_out(info, UART_IER, info->IER);
#endif

	/*
	 * Set up parity check flag
	 */
#define RELEVANT_IFLAG(iflag) (iflag & (IGNBRK|BRKINT|IGNPAR|PARMRK|INPCK))

	info->read_status_mask = (BD_SC_EMPTY | BD_SC_OV);
	if (I_INPCK(info->tty))
		info->read_status_mask |= BD_SC_FR | BD_SC_PR;
	if (I_BRKINT(info->tty) || I_PARMRK(info->tty))
		info->read_status_mask |= BD_SC_BR;
	
	/*
	 * Characters to ignore
	 */
	info->ignore_status_mask = 0;
	if (I_IGNPAR(info->tty))
		info->ignore_status_mask |= BD_SC_PR | BD_SC_FR;
	if (I_IGNBRK(info->tty)) {
		info->ignore_status_mask |= BD_SC_BR;
		/*
		 * If we're ignore parity and break indicators, ignore 
		 * overruns too.  (For real raw support).
		 */
		if (I_IGNPAR(info->tty))
			info->ignore_status_mask |= BD_SC_OV;
	}
	/*
	 * !!! ignore all characters if CREAD is not set
	 */
	if ((cflag & CREAD) == 0)
		info->read_status_mask &= ~BD_SC_EMPTY;
	save_flags(flags); cli();

	/* Start bit has not been added (so don't, because we would just
	 * subtract it later), and we need to add one for the number of
	 * stops bits (there is always at least one).
	 */
	bits++;
	idx = PORT_NUM(state->smc_scc_num);
	if (state->smc_scc_num & NUM_IS_SCC) {
		sccp = &cpmp->cp_scc[idx];
		new_mode = (sbits << 12) | scval;
		prev_mode = sccp->scc_pmsr;
		if (!(prev_mode & SCU_PMSR_PEN)) 
			/* If parity is disabled, mask out even/odd */
			prev_mode &= ~(SCU_PMSR_TPM|SCU_PMSR_RPM);
		if (prev_mode != new_mode)
			sccp->scc_pmsr = new_mode;
	}
	else {
		smcp = &cpmp->cp_smc[idx];

		/* Set the mode register.  We want to keep a copy of the
		 * enables, because we want to put them back if they were
		 * present.
		 */
		prev_mode = smcp->smc_smcmr;
		new_mode = smcr_mk_clen(bits) | cval |  SMCMR_SM_UART;
		new_mode |= (prev_mode & (SMCMR_REN | SMCMR_TEN));
		if (!(prev_mode & SMCMR_PEN))
			/* If parity is disabled, mask out even/odd */
			prev_mode &= ~SMCMR_PM_EVEN;
		if (prev_mode != new_mode)
			smcp->smc_smcmr = new_mode;
	}

	m8xx_cpm_setbrg((state - rs_table), baud_rate);

	restore_flags(flags);
}

static void rs_8xx_put_char(struct tty_struct *tty, unsigned char ch)
{
	ser_info_t *info = (ser_info_t *)tty->driver_data;
	volatile cbd_t	*bdp;

	if (serial_paranoia_check(info, tty->device, "rs_put_char"))
		return;

	if (!tty)
		return;

	bdp = info->tx_cur;
	while (bdp->cbd_sc & BD_SC_READY);

	*((char *)__va(bdp->cbd_bufaddr)) = ch;
	bdp->cbd_datlen = 1;
	bdp->cbd_sc |= BD_SC_READY;

	/* Get next BD.
	*/
	if (bdp->cbd_sc & BD_SC_WRAP)
		bdp = info->tx_bd_base;
	else
		bdp++;

	info->tx_cur = (cbd_t *)bdp;

}

static int rs_8xx_write(struct tty_struct * tty, int from_user,
		    const unsigned char *buf, int count)
{
	int	c, ret = 0;
	ser_info_t *info = (ser_info_t *)tty->driver_data;
	volatile cbd_t *bdp;

#ifdef CONFIG_KGDB
        /* Try to let stub handle output. Returns true if it did. */ 
        if (kgdb_output_string(buf, count))
            return ret;
#endif

	if (serial_paranoia_check(info, tty->device, "rs_write"))
		return 0;

	if (!tty) 
		return 0;

	bdp = info->tx_cur;

	while (1) {
		c = MIN(count, TX_BUF_SIZE);

		if (c <= 0)
			break;

		if (bdp->cbd_sc & BD_SC_READY) {
			info->flags |= TX_WAKEUP;
			break;
		}

		if (from_user) {
			if (copy_from_user(__va(bdp->cbd_bufaddr), buf, c)) {
				if (!ret)
					ret = -EFAULT;
				break;
			}
		} else {
			memcpy(__va(bdp->cbd_bufaddr), buf, c);
		}

		bdp->cbd_datlen = c;
		bdp->cbd_sc |= BD_SC_READY;

		buf += c;
		count -= c;
		ret += c;

		/* Get next BD.
		*/
		if (bdp->cbd_sc & BD_SC_WRAP)
			bdp = info->tx_bd_base;
		else
			bdp++;
		info->tx_cur = (cbd_t *)bdp;
	}
	return ret;
}

static int rs_8xx_write_room(struct tty_struct *tty)
{
	ser_info_t *info = (ser_info_t *)tty->driver_data;
	int	ret;

	if (serial_paranoia_check(info, tty->device, "rs_write_room"))
		return 0;

	if ((info->tx_cur->cbd_sc & BD_SC_READY) == 0) {
		info->flags &= ~TX_WAKEUP;
		ret = TX_BUF_SIZE;
	}
	else {
		info->flags |= TX_WAKEUP;
		ret = 0;
	}
	return ret;
}

/* I could track this with transmit counters....maybe later.
*/
static int rs_8xx_chars_in_buffer(struct tty_struct *tty)
{
	ser_info_t *info = (ser_info_t *)tty->driver_data;
				
	if (serial_paranoia_check(info, tty->device, "rs_chars_in_buffer"))
		return 0;
	return 0;
}

static void rs_8xx_flush_buffer(struct tty_struct *tty)
{
	ser_info_t *info = (ser_info_t *)tty->driver_data;
				
	if (serial_paranoia_check(info, tty->device, "rs_flush_buffer"))
		return;

	/* There is nothing to "flush", whatever we gave the CPM
	 * is on its way out.
	 */
	wake_up_interruptible(&tty->write_wait);
	if ((tty->flags & (1 << TTY_DO_WRITE_WAKEUP)) &&
	    tty->ldisc.write_wakeup)
		(tty->ldisc.write_wakeup)(tty);
	info->flags &= ~TX_WAKEUP;
}

/*
 * This function is used to send a high-priority XON/XOFF character to
 * the device
 */
static void rs_8xx_send_xchar(struct tty_struct *tty, char ch)
{
	volatile cbd_t	*bdp;

	ser_info_t *info = (ser_info_t *)tty->driver_data;

	if (serial_paranoia_check(info, tty->device, "rs_send_char"))
		return;

	bdp = info->tx_cur;
	while (bdp->cbd_sc & BD_SC_READY);

	*((char *)__va(bdp->cbd_bufaddr)) = ch;
	bdp->cbd_datlen = 1;
	bdp->cbd_sc |= BD_SC_READY;

	/* Get next BD.
	*/
	if (bdp->cbd_sc & BD_SC_WRAP)
		bdp = info->tx_bd_base;
	else
		bdp++;

	info->tx_cur = (cbd_t *)bdp;
}

/*
 * ------------------------------------------------------------
 * rs_throttle()
 * 
 * This routine is called by the upper-layer tty layer to signal that
 * incoming characters should be throttled.
 * ------------------------------------------------------------
 */
static void rs_8xx_throttle(struct tty_struct * tty)
{
	ser_info_t *info = (ser_info_t *)tty->driver_data;
#ifdef SERIAL_DEBUG_THROTTLE
	char	buf[64];
	
	printk("throttle %s: %d....\n", _tty_name(tty, buf),
	       tty->ldisc.chars_in_buffer(tty));
#endif

	if (serial_paranoia_check(info, tty->device, "rs_throttle"))
		return;
	
	if (I_IXOFF(tty))
		rs_8xx_send_xchar(tty, STOP_CHAR(tty));

#ifdef modem_control
	if (tty->termios->c_cflag & CRTSCTS)
		info->MCR &= ~UART_MCR_RTS;

	cli();
	serial_out(info, UART_MCR, info->MCR);
	sti();
#endif
}

static void rs_8xx_unthrottle(struct tty_struct * tty)
{
	ser_info_t *info = (ser_info_t *)tty->driver_data;
#ifdef SERIAL_DEBUG_THROTTLE
	char	buf[64];
	
	printk("unthrottle %s: %d....\n", _tty_name(tty, buf),
	       tty->ldisc.chars_in_buffer(tty));
#endif

	if (serial_paranoia_check(info, tty->device, "rs_unthrottle"))
		return;
	
	if (I_IXOFF(tty)) {
		if (info->x_char)
			info->x_char = 0;
		else
			rs_8xx_send_xchar(tty, START_CHAR(tty));
	}
#ifdef modem_control
	if (tty->termios->c_cflag & CRTSCTS)
		info->MCR |= UART_MCR_RTS;
	cli();
	serial_out(info, UART_MCR, info->MCR);
	sti();
#endif
}

/*
 * ------------------------------------------------------------
 * rs_ioctl() and friends
 * ------------------------------------------------------------
 */

#ifdef maybe
/*
 * get_lsr_info - get line status register info
 *
 * Purpose: Let user call ioctl() to get info when the UART physically
 * 	    is emptied.  On bus types like RS485, the transmitter must
 * 	    release the bus after transmitting. This must be done when
 * 	    the transmit shift register is empty, not be done when the
 * 	    transmit holding register is empty.  This functionality
 * 	    allows an RS485 driver to be written in user space. 
 */
static int get_lsr_info(struct async_struct * info, unsigned int *value)
{
	unsigned char status;
	unsigned int result;

	cli();
	status = serial_in(info, UART_LSR);
	sti();
	result = ((status & UART_LSR_TEMT) ? TIOCSER_TEMT : 0);
	return put_user(result,value);
}
#endif

static int get_modem_info(ser_info_t *info, unsigned int *value)
{
	unsigned int result = 0;
#ifdef modem_control
	unsigned char control, status;

	control = info->MCR;
	cli();
	status = serial_in(info, UART_MSR);
	sti();
	result =  ((control & UART_MCR_RTS) ? TIOCM_RTS : 0)
		| ((control & UART_MCR_DTR) ? TIOCM_DTR : 0)
#ifdef TIOCM_OUT1
		| ((control & UART_MCR_OUT1) ? TIOCM_OUT1 : 0)
		| ((control & UART_MCR_OUT2) ? TIOCM_OUT2 : 0)
#endif
		| ((status  & UART_MSR_DCD) ? TIOCM_CAR : 0)
		| ((status  & UART_MSR_RI) ? TIOCM_RNG : 0)
		| ((status  & UART_MSR_DSR) ? TIOCM_DSR : 0)
		| ((status  & UART_MSR_CTS) ? TIOCM_CTS : 0);
#endif
	return put_user(result,value);
}

static int set_modem_info(ser_info_t *info, unsigned int cmd,
			  unsigned int *value)
{
	int error;
	unsigned int arg;

	error = get_user(arg, value);
	if (error)
		return error;
#ifdef modem_control
	switch (cmd) {
	case TIOCMBIS: 
		if (arg & TIOCM_RTS)
			info->MCR |= UART_MCR_RTS;
		if (arg & TIOCM_DTR)
			info->MCR |= UART_MCR_DTR;
#ifdef TIOCM_OUT1
		if (arg & TIOCM_OUT1)
			info->MCR |= UART_MCR_OUT1;
		if (arg & TIOCM_OUT2)
			info->MCR |= UART_MCR_OUT2;
#endif
		break;
	case TIOCMBIC:
		if (arg & TIOCM_RTS)
			info->MCR &= ~UART_MCR_RTS;
		if (arg & TIOCM_DTR)
			info->MCR &= ~UART_MCR_DTR;
#ifdef TIOCM_OUT1
		if (arg & TIOCM_OUT1)
			info->MCR &= ~UART_MCR_OUT1;
		if (arg & TIOCM_OUT2)
			info->MCR &= ~UART_MCR_OUT2;
#endif
		break;
	case TIOCMSET:
		info->MCR = ((info->MCR & ~(UART_MCR_RTS |
#ifdef TIOCM_OUT1
					    UART_MCR_OUT1 |
					    UART_MCR_OUT2 |
#endif
					    UART_MCR_DTR))
			     | ((arg & TIOCM_RTS) ? UART_MCR_RTS : 0)
#ifdef TIOCM_OUT1
			     | ((arg & TIOCM_OUT1) ? UART_MCR_OUT1 : 0)
			     | ((arg & TIOCM_OUT2) ? UART_MCR_OUT2 : 0)
#endif
			     | ((arg & TIOCM_DTR) ? UART_MCR_DTR : 0));
		break;
	default:
		return -EINVAL;
	}
	cli();
	serial_out(info, UART_MCR, info->MCR);
	sti();
#endif
	return 0;
}

/* Sending a break is a two step process on the SMC/SCC.  It is accomplished
 * by sending a STOP TRANSMIT command followed by a RESTART TRANSMIT
 * command.  We take advantage of the begin/end functions to make this
 * happen.
 */
static ushort	smc_chan_map[] = {
	CPM_CR_CH_SMC1,
	CPM_CR_CH_SMC2
};

static ushort	scc_chan_map[] = {
	CPM_CR_CH_SCC1,
	CPM_CR_CH_SCC2,
	CPM_CR_CH_SCC3,
	CPM_CR_CH_SCC4
};

static void begin_break(ser_info_t *info)
{
	volatile cpm8xx_t *cp;
	ushort	chan;
	int	idx;

	cp = cpmp;

	idx = PORT_NUM(info->state->smc_scc_num);
	if (info->state->smc_scc_num & NUM_IS_SCC)
		chan = scc_chan_map[idx];
	else
		chan = smc_chan_map[idx];
	cp->cp_cpcr = mk_cr_cmd(chan, CPM_CR_STOP_TX) | CPM_CR_FLG;
	while (cp->cp_cpcr & CPM_CR_FLG);
}

static void end_break(ser_info_t *info)
{
	volatile cpm8xx_t *cp;
	ushort	chan;
	int	idx;

	cp = cpmp;

	idx = PORT_NUM(info->state->smc_scc_num);
	if (info->state->smc_scc_num & NUM_IS_SCC)
		chan = scc_chan_map[idx];
	else
		chan = smc_chan_map[idx];
	cp->cp_cpcr = mk_cr_cmd(chan, CPM_CR_RESTART_TX) | CPM_CR_FLG;
	while (cp->cp_cpcr & CPM_CR_FLG);
}

/*
 * This routine sends a break character out the serial port.
 */
static void send_break(ser_info_t *info, int duration)
{
	current->state = TASK_INTERRUPTIBLE;
#ifdef SERIAL_DEBUG_SEND_BREAK
	printk("rs_send_break(%d) jiff=%lu...", duration, jiffies);
#endif
	begin_break(info);
	schedule_timeout(duration);
	end_break(info);
#ifdef SERIAL_DEBUG_SEND_BREAK
	printk("done jiffies=%lu\n", jiffies);
#endif
}


static int rs_8xx_ioctl(struct tty_struct *tty, struct file * file,
		    unsigned int cmd, unsigned long arg)
{
	int error;
	ser_info_t *info = (ser_info_t *)tty->driver_data;
	int retval;
	struct async_icount cnow;	/* kernel counter temps */
	struct serial_icounter_struct *p_cuser;	/* user space */

	if (serial_paranoia_check(info, tty->device, "rs_ioctl"))
		return -ENODEV;

	if ((cmd != TIOCMIWAIT) && (cmd != TIOCGICOUNT)) {
		if (tty->flags & (1 << TTY_IO_ERROR))
		    return -EIO;
	}
	
	switch (cmd) {
		case TCSBRK:	/* SVID version: non-zero arg --> no break */
			retval = tty_check_change(tty);
			if (retval)
				return retval;
			tty_wait_until_sent(tty, 0);
			if (signal_pending(current))
				return -EINTR;
			if (!arg) {
				send_break(info, HZ/4);	/* 1/4 second */
				if (signal_pending(current))
					return -EINTR;
			}
			return 0;
		case TCSBRKP:	/* support for POSIX tcsendbreak() */
			retval = tty_check_change(tty);
			if (retval)
				return retval;
			tty_wait_until_sent(tty, 0);
			if (signal_pending(current))
				return -EINTR;
			send_break(info, arg ? arg*(HZ/10) : HZ/4);
			if (signal_pending(current))
				return -EINTR;
			return 0;
		case TIOCSBRK:
			retval = tty_check_change(tty);
			if (retval)
				return retval;
			tty_wait_until_sent(tty, 0);
			begin_break(info);
			return 0;
		case TIOCCBRK:
			retval = tty_check_change(tty);
			if (retval)
				return retval;
			end_break(info);
			return 0;
		case TIOCGSOFTCAR:
			return put_user(C_CLOCAL(tty) ? 1 : 0, (int *) arg);
		case TIOCSSOFTCAR:
			error = get_user(arg, (unsigned int *) arg);
			if (error)
				return error;
			tty->termios->c_cflag =
				((tty->termios->c_cflag & ~CLOCAL) |
				 (arg ? CLOCAL : 0));
			return 0;
		case TIOCMGET:
			return get_modem_info(info, (unsigned int *) arg);
		case TIOCMBIS:
		case TIOCMBIC:
		case TIOCMSET:
			return set_modem_info(info, cmd, (unsigned int *) arg);
#ifdef maybe
		case TIOCSERGETLSR: /* Get line status register */
			return get_lsr_info(info, (unsigned int *) arg);
#endif
		/*
		 * Wait for any of the 4 modem inputs (DCD,RI,DSR,CTS) to change
		 * - mask passed in arg for lines of interest
 		 *   (use |'ed TIOCM_RNG/DSR/CD/CTS for masking)
		 * Caller should use TIOCGICOUNT to see which one it was
		 */
		 case TIOCMIWAIT:
#ifdef modem_control
			cli();
			/* note the counters on entry */
			cprev = info->state->icount;
			sti();
			while (1) {
				interruptible_sleep_on(&info->delta_msr_wait);
				/* see if a signal did it */
				if (signal_pending(current))
					return -ERESTARTSYS;
				cli();
				cnow = info->state->icount; /* atomic copy */
				sti();
				if (cnow.rng == cprev.rng && cnow.dsr == cprev.dsr && 
				    cnow.dcd == cprev.dcd && cnow.cts == cprev.cts)
					return -EIO; /* no change => error */
				if ( ((arg & TIOCM_RNG) && (cnow.rng != cprev.rng)) ||
				     ((arg & TIOCM_DSR) && (cnow.dsr != cprev.dsr)) ||
				     ((arg & TIOCM_CD)  && (cnow.dcd != cprev.dcd)) ||
				     ((arg & TIOCM_CTS) && (cnow.cts != cprev.cts)) ) {
					return 0;
				}
				cprev = cnow;
			}
			/* NOTREACHED */
#else
			return 0;
#endif

		/* 
		 * Get counter of input serial line interrupts (DCD,RI,DSR,CTS)
		 * Return: write counters to the user passed counter struct
		 * NB: both 1->0 and 0->1 transitions are counted except for
		 *     RI where only 0->1 is counted.
		 */
		case TIOCGICOUNT:
			cli();
			cnow = info->state->icount;
			sti();
			p_cuser = (struct serial_icounter_struct *) arg;
			error = put_user(cnow.cts, &p_cuser->cts);
			if (error) return error;
			error = put_user(cnow.dsr, &p_cuser->dsr);
			if (error) return error;
			error = put_user(cnow.rng, &p_cuser->rng);
			if (error) return error;
			error = put_user(cnow.dcd, &p_cuser->dcd);
			if (error) return error;
			return 0;

		default:
			return -ENOIOCTLCMD;
		}
	return 0;
}

/* FIX UP modem control here someday......
*/
static void rs_8xx_set_termios(struct tty_struct *tty, struct termios *old_termios)
{
	ser_info_t *info = (ser_info_t *)tty->driver_data;

	if (   (tty->termios->c_cflag == old_termios->c_cflag)
	    && (   RELEVANT_IFLAG(tty->termios->c_iflag) 
		== RELEVANT_IFLAG(old_termios->c_iflag)))
	  return;

	change_speed(info);

#ifdef modem_control
	/* Handle transition to B0 status */
	if ((old_termios->c_cflag & CBAUD) &&
	    !(tty->termios->c_cflag & CBAUD)) {
		info->MCR &= ~(UART_MCR_DTR|UART_MCR_RTS);
		cli();
		serial_out(info, UART_MCR, info->MCR);
		sti();
	}
	
	/* Handle transition away from B0 status */
	if (!(old_termios->c_cflag & CBAUD) &&
	    (tty->termios->c_cflag & CBAUD)) {
		info->MCR |= UART_MCR_DTR;
		if (!tty->hw_stopped ||
		    !(tty->termios->c_cflag & CRTSCTS)) {
			info->MCR |= UART_MCR_RTS;
		}
		cli();
		serial_out(info, UART_MCR, info->MCR);
		sti();
	}
	
	/* Handle turning off CRTSCTS */
	if ((old_termios->c_cflag & CRTSCTS) &&
	    !(tty->termios->c_cflag & CRTSCTS)) {
		tty->hw_stopped = 0;
		rs_8xx_start(tty);
	}
#endif

#if 0
	/*
	 * No need to wake up processes in open wait, since they
	 * sample the CLOCAL flag once, and don't recheck it.
	 * XXX  It's not clear whether the current behavior is correct
	 * or not.  Hence, this may change.....
	 */
	if (!(old_termios->c_cflag & CLOCAL) &&
	    (tty->termios->c_cflag & CLOCAL))
		wake_up_interruptible(&info->open_wait);
#endif
}

/*
 * ------------------------------------------------------------
 * rs_close()
 * 
 * This routine is called when the serial port gets closed.  First, we
 * wait for the last remaining data to be sent.  Then, we unlink its
 * async structure from the interrupt chain if necessary, and we free
 * that IRQ if nothing is left in the chain.
 * ------------------------------------------------------------
 */
static void rs_8xx_close(struct tty_struct *tty, struct file * filp)
{
	ser_info_t *info = (ser_info_t *)tty->driver_data;
	struct serial_state *state;
	unsigned long	flags;
	int		idx;
	volatile smc_t	*smcp;
	volatile scc_t	*sccp;

	if (!info || serial_paranoia_check(info, tty->device, "rs_close"))
		return;

	state = info->state;
	
	save_flags(flags); cli();
	
	if (tty_hung_up_p(filp)) {
		DBG_CNT("before DEC-hung");
		MOD_DEC_USE_COUNT;
		restore_flags(flags);
		return;
	}
	
#ifdef SERIAL_DEBUG_OPEN
	printk("rs_close ttys%d, count = %d\n", info->line, state->count);
#endif
	if ((tty->count == 1) && (state->count != 1)) {
		/*
		 * Uh, oh.  tty->count is 1, which means that the tty
		 * structure will be freed.  state->count should always
		 * be one in these conditions.  If it's greater than
		 * one, we've got real problems, since it means the
		 * serial port won't be shutdown.
		 */
		printk("rs_close: bad serial port count; tty->count is 1, "
		       "state->count is %d\n", state->count);
		state->count = 1;
	}
	if (--state->count < 0) {
		printk("rs_close: bad serial port count for ttys%d: %d\n",
		       info->line, state->count);
		state->count = 0;
	}
	if (state->count) {
		DBG_CNT("before DEC-2");
		MOD_DEC_USE_COUNT;
		restore_flags(flags);
		return;
	}
	info->flags |= ASYNC_CLOSING;
	/*
	 * Save the termios structure, since this port may have
	 * separate termios for callout and dialin.
	 */
	if (info->flags & ASYNC_NORMAL_ACTIVE)
		info->state->normal_termios = *tty->termios;
	if (info->flags & ASYNC_CALLOUT_ACTIVE)
		info->state->callout_termios = *tty->termios;
	/*
	 * Now we wait for the transmit buffer to clear; and we notify 
	 * the line discipline to only process XON/XOFF characters.
	 */
	tty->closing = 1;
	if (info->closing_wait != ASYNC_CLOSING_WAIT_NONE)
		tty_wait_until_sent(tty, info->closing_wait);
	/*
	 * At this point we stop accepting input.  To do this, we
	 * disable the receive line status interrupts, and tell the
	 * interrupt driver to stop checking the data ready bit in the
	 * line status register.
	 */
	info->read_status_mask &= ~BD_SC_EMPTY;
	if (info->flags & ASYNC_INITIALIZED) {
		idx = PORT_NUM(info->state->smc_scc_num);
		if (info->state->smc_scc_num & NUM_IS_SCC) {
			sccp = &cpmp->cp_scc[idx];
			sccp->scc_sccm &= ~UART_SCCM_RX;
			sccp->scc_gsmrl &= ~SCC_GSMRL_ENR;
		}
		else {
			smcp = &cpmp->cp_smc[idx];
			smcp->smc_smcm &= ~SMCM_RX;
			smcp->smc_smcmr &= ~SMCMR_REN;
		}
		/*
		 * Before we drop DTR, make sure the UART transmitter
		 * has completely drained; this is especially
		 * important if there is a transmit FIFO!
		 */
		rs_8xx_wait_until_sent(tty, info->timeout);
	}
	shutdown(info);
	if (tty->driver.flush_buffer)
		tty->driver.flush_buffer(tty);
	if (tty->ldisc.flush_buffer)
		tty->ldisc.flush_buffer(tty);
	tty->closing = 0;
	info->event = 0;
	info->tty = 0;
	if (info->blocked_open) {
		if (info->close_delay) {
			current->state = TASK_INTERRUPTIBLE;
			schedule_timeout(info->close_delay);
		}
		wake_up_interruptible(&info->open_wait);
	}
	info->flags &= ~(ASYNC_NORMAL_ACTIVE|ASYNC_CALLOUT_ACTIVE|
			 ASYNC_CLOSING);
	wake_up_interruptible(&info->close_wait);
	MOD_DEC_USE_COUNT;
	restore_flags(flags);
}

/*
 * rs_wait_until_sent() --- wait until the transmitter is empty
 */
static void rs_8xx_wait_until_sent(struct tty_struct *tty, int timeout)
{
	ser_info_t *info = (ser_info_t *)tty->driver_data;
	unsigned long orig_jiffies, char_time;
	/*int lsr;*/
	volatile cbd_t *bdp;
	
	if (serial_paranoia_check(info, tty->device, "rs_wait_until_sent"))
		return;

#ifdef maybe
	if (info->state->type == PORT_UNKNOWN)
		return;
#endif

	orig_jiffies = jiffies;
	/*
	 * Set the check interval to be 1/5 of the estimated time to
	 * send a single character, and make it at least 1.  The check
	 * interval should also be less than the timeout.
	 * 
	 * Note: we have to use pretty tight timings here to satisfy
	 * the NIST-PCTS.
	 */
	char_time = 1;
	if (timeout)
		char_time = MIN(char_time, timeout);
#ifdef SERIAL_DEBUG_RS_WAIT_UNTIL_SENT
	printk("In rs_wait_until_sent(%d) check=%lu...", timeout, char_time);
	printk("jiff=%lu...", jiffies);
#endif

	/* We go through the loop at least once because we can't tell
	 * exactly when the last character exits the shifter.  There can
	 * be at least two characters waiting to be sent after the buffers
	 * are empty.
	 */
	do {
#ifdef SERIAL_DEBUG_RS_WAIT_UNTIL_SENT
		printk("lsr = %d (jiff=%lu)...", lsr, jiffies);
#endif
		current->state = TASK_INTERRUPTIBLE;
/*		current->counter = 0;	 make us low-priority */
		schedule_timeout(char_time);
		if (signal_pending(current))
			break;
		if (timeout && time_after(jiffies, orig_jiffies + timeout))
			break;

		/* The 'tx_cur' is really the next buffer to send.  We
		 * have to back up to the previous BD and wait for it
		 * to go.  This isn't perfect, because all this indicates
		 * is the buffer is available.  There are still characters
		 * in the CPM FIFO.
		 */
		bdp = info->tx_cur;
		if (bdp == info->tx_bd_base)
			bdp += (TX_NUM_FIFO-1);
		else
			bdp--;
	} while (bdp->cbd_sc & BD_SC_READY);
	current->state = TASK_RUNNING;
#ifdef SERIAL_DEBUG_RS_WAIT_UNTIL_SENT
	printk("lsr = %d (jiff=%lu)...done\n", lsr, jiffies);
#endif
}

/*
 * rs_hangup() --- called by tty_hangup() when a hangup is signaled.
 */
static void rs_8xx_hangup(struct tty_struct *tty)
{
	ser_info_t *info = (ser_info_t *)tty->driver_data;
	struct serial_state *state = info->state;
	
	if (serial_paranoia_check(info, tty->device, "rs_hangup"))
		return;

	state = info->state;
	
	rs_8xx_flush_buffer(tty);
	shutdown(info);
	info->event = 0;
	state->count = 0;
	info->flags &= ~(ASYNC_NORMAL_ACTIVE|ASYNC_CALLOUT_ACTIVE);
	info->tty = 0;
	wake_up_interruptible(&info->open_wait);
}

/*
 * ------------------------------------------------------------
 * rs_open() and friends
 * ------------------------------------------------------------
 */
static int block_til_ready(struct tty_struct *tty, struct file * filp,
			   ser_info_t *info)
{
#ifdef DO_THIS_LATER
	DECLARE_WAITQUEUE(wait, current);
#endif
	struct serial_state *state = info->state;
	int		retval;
	int		do_clocal = 0;

	/*
	 * If the device is in the middle of being closed, then block
	 * until it's done, and then try again.
	 */
	if (tty_hung_up_p(filp) ||
	    (info->flags & ASYNC_CLOSING)) {
		if (info->flags & ASYNC_CLOSING)
			interruptible_sleep_on(&info->close_wait);
#ifdef SERIAL_DO_RESTART
		if (info->flags & ASYNC_HUP_NOTIFY)
			return -EAGAIN;
		else
			return -ERESTARTSYS;
#else
		return -EAGAIN;
#endif
	}

	/*
	 * If this is a callout device, then just make sure the normal
	 * device isn't being used.
	 */
	if (tty->driver.subtype == SERIAL_TYPE_CALLOUT) {
		if (info->flags & ASYNC_NORMAL_ACTIVE)
			return -EBUSY;
		if ((info->flags & ASYNC_CALLOUT_ACTIVE) &&
		    (info->flags & ASYNC_SESSION_LOCKOUT) &&
		    (info->session != current->session))
		    return -EBUSY;
		if ((info->flags & ASYNC_CALLOUT_ACTIVE) &&
		    (info->flags & ASYNC_PGRP_LOCKOUT) &&
		    (info->pgrp != current->pgrp))
		    return -EBUSY;
		info->flags |= ASYNC_CALLOUT_ACTIVE;
		return 0;
	}
	
	/*
	 * If non-blocking mode is set, or the port is not enabled,
	 * then make the check up front and then exit.
	 * If this is an SMC port, we don't have modem control to wait
	 * for, so just get out here.
	 */
	if ((filp->f_flags & O_NONBLOCK) ||
	    (tty->flags & (1 << TTY_IO_ERROR)) ||
	    !(info->state->smc_scc_num & NUM_IS_SCC)) {
		if (info->flags & ASYNC_CALLOUT_ACTIVE)
			return -EBUSY;
		info->flags |= ASYNC_NORMAL_ACTIVE;
		return 0;
	}

	if (info->flags & ASYNC_CALLOUT_ACTIVE) {
		if (state->normal_termios.c_cflag & CLOCAL)
			do_clocal = 1;
	} else {
		if (tty->termios->c_cflag & CLOCAL)
			do_clocal = 1;
	}
	
	/*
	 * Block waiting for the carrier detect and the line to become
	 * free (i.e., not in use by the callout).  While we are in
	 * this loop, state->count is dropped by one, so that
	 * rs_close() knows when to free things.  We restore it upon
	 * exit, either normal or abnormal.
	 */
	retval = 0;
#ifdef DO_THIS_LATER
	add_wait_queue(&info->open_wait, &wait);
#ifdef SERIAL_DEBUG_OPEN
	printk("block_til_ready before block: ttys%d, count = %d\n",
	       state->line, state->count);
#endif
	cli();
	if (!tty_hung_up_p(filp)) 
		state->count--;
	sti();
	info->blocked_open++;
	while (1) {
		cli();
		if (!(info->flags & ASYNC_CALLOUT_ACTIVE) &&
		    (tty->termios->c_cflag & CBAUD))
			serial_out(info, UART_MCR,
				   serial_inp(info, UART_MCR) |
				   (UART_MCR_DTR | UART_MCR_RTS));
		sti();
		set_current_state(TASK_INTERRUPTIBLE);
		if (tty_hung_up_p(filp) ||
		    !(info->flags & ASYNC_INITIALIZED)) {
#ifdef SERIAL_DO_RESTART
			if (info->flags & ASYNC_HUP_NOTIFY)
				retval = -EAGAIN;
			else
				retval = -ERESTARTSYS;	
#else
			retval = -EAGAIN;
#endif
			break;
		}
		if (!(info->flags & ASYNC_CALLOUT_ACTIVE) &&
		    !(info->flags & ASYNC_CLOSING) &&
		    (do_clocal || (serial_in(info, UART_MSR) &
				   UART_MSR_DCD)))
			break;
		if (signal_pending(current)) {
			retval = -ERESTARTSYS;
			break;
		}
#ifdef SERIAL_DEBUG_OPEN
		printk("block_til_ready blocking: ttys%d, count = %d\n",
		       info->line, state->count);
#endif
		schedule();
	}
	current->state = TASK_RUNNING;
	remove_wait_queue(&info->open_wait, &wait);
	if (!tty_hung_up_p(filp))
		state->count++;
	info->blocked_open--;
#ifdef SERIAL_DEBUG_OPEN
	printk("block_til_ready after blocking: ttys%d, count = %d\n",
	       info->line, state->count);
#endif
#endif /* DO_THIS_LATER */
	if (retval)
		return retval;
	info->flags |= ASYNC_NORMAL_ACTIVE;
	return 0;
}

static int get_async_struct(int line, ser_info_t **ret_info)
{
	struct serial_state *sstate;

	sstate = rs_table + line;
	if (sstate->info) {
		sstate->count++;
		*ret_info = (ser_info_t *)sstate->info;
		return 0;
	}
	else {
		return -ENOMEM;
	}
}

/*
 * This routine is called whenever a serial port is opened.  It
 * enables interrupts for a serial port, linking in its async structure into
 * the IRQ chain.   It also performs the serial-specific
 * initialization for the tty structure.
 */
static int rs_8xx_open(struct tty_struct *tty, struct file * filp)
{
	ser_info_t	*info;
	int 		retval, line;

	line = MINOR(tty->device) - tty->driver.minor_start;
	if ((line < 0) || (line >= NR_PORTS))
		return -ENODEV;
	retval = get_async_struct(line, &info);
	if (retval)
		return retval;
	if (serial_paranoia_check(info, tty->device, "rs_open"))
		return -ENODEV;

#ifdef SERIAL_DEBUG_OPEN
	printk("rs_open %s%d, count = %d\n", tty->driver.name, info->line,
	       info->state->count);
#endif
	tty->driver_data = info;
	info->tty = tty;

	/*
	 * Start up serial port
	 */
	retval = startup(info);
	if (retval)
		return retval;

	MOD_INC_USE_COUNT;
	retval = block_til_ready(tty, filp, info);
	if (retval) {
#ifdef SERIAL_DEBUG_OPEN
		printk("rs_open returning after block_til_ready with %d\n",
		       retval);
#endif
		MOD_DEC_USE_COUNT;
		return retval;
	}

	if ((info->state->count == 1) &&
	    (info->flags & ASYNC_SPLIT_TERMIOS)) {
		if (tty->driver.subtype == SERIAL_TYPE_NORMAL)
			*tty->termios = info->state->normal_termios;
		else 
			*tty->termios = info->state->callout_termios;
		change_speed(info);
	}

	info->session = current->session;
	info->pgrp = current->pgrp;

#ifdef SERIAL_DEBUG_OPEN
	printk("rs_open ttys%d successful...", info->line);
#endif
	return 0;
}

/*
 * /proc fs routines....
 */

static int inline line_info(char *buf, struct serial_state *state)
{
#ifdef notdef
	struct async_struct *info = state->info, scr_info;
	char	stat_buf[30], control, status;
#endif
	int	ret;

	ret = sprintf(buf, "%d: uart:%s port:%X irq:%d",
		      state->line,
		      (state->smc_scc_num & NUM_IS_SCC) ? "SCC" : "SMC",
		      (unsigned int)(state->port), state->irq);

	if (!state->port || (state->type == PORT_UNKNOWN)) {
		ret += sprintf(buf+ret, "\n");
		return ret;
	}

#ifdef notdef
	/*
	 * Figure out the current RS-232 lines
	 */
	if (!info) {
		info = &scr_info;	/* This is just for serial_{in,out} */

		info->magic = SERIAL_MAGIC;
		info->port = state->port;
		info->flags = state->flags;
		info->quot = 0;
		info->tty = 0;
	}
	cli();
	status = serial_in(info, UART_MSR);
	control = info ? info->MCR : serial_in(info, UART_MCR);
	sti();
	
	stat_buf[0] = 0;
	stat_buf[1] = 0;
	if (control & UART_MCR_RTS)
		strcat(stat_buf, "|RTS");
	if (status & UART_MSR_CTS)
		strcat(stat_buf, "|CTS");
	if (control & UART_MCR_DTR)
		strcat(stat_buf, "|DTR");
	if (status & UART_MSR_DSR)
		strcat(stat_buf, "|DSR");
	if (status & UART_MSR_DCD)
		strcat(stat_buf, "|CD");
	if (status & UART_MSR_RI)
		strcat(stat_buf, "|RI");

	if (info->quot) {
		ret += sprintf(buf+ret, " baud:%d",
			       state->baud_base / info->quot);
	}

	ret += sprintf(buf+ret, " tx:%d rx:%d",
		      state->icount.tx, state->icount.rx);

	if (state->icount.frame)
		ret += sprintf(buf+ret, " fe:%d", state->icount.frame);
	
	if (state->icount.parity)
		ret += sprintf(buf+ret, " pe:%d", state->icount.parity);
	
	if (state->icount.brk)
		ret += sprintf(buf+ret, " brk:%d", state->icount.brk);	

	if (state->icount.overrun)
		ret += sprintf(buf+ret, " oe:%d", state->icount.overrun);

	/*
	 * Last thing is the RS-232 status lines
	 */
	ret += sprintf(buf+ret, " %s\n", stat_buf+1);
#endif
	return ret;
}

int rs_8xx_read_proc(char *page, char **start, off_t off, int count,
		 int *eof, void *data)
{
	int i, len = 0;
	off_t	begin = 0;

	len += sprintf(page, "serinfo:1.0 driver:%s\n", serial_version);
	for (i = 0; i < NR_PORTS && len < 4000; i++) {
		len += line_info(page + len, &rs_table[i]);
		if (len+begin > off+count)
			goto done;
		if (len+begin < off) {
			begin += len;
			len = 0;
		}
	}
	*eof = 1;
done:
	if (off >= len+begin)
		return 0;
	*start = page + (begin-off);
	return ((count < begin+len-off) ? count : begin+len-off);
}

/*
 * ---------------------------------------------------------------------
 * rs_init() and friends
 *
 * rs_init() is called at boot-time to initialize the serial driver.
 * ---------------------------------------------------------------------
 */

/*
 * This routine prints out the appropriate serial driver version
 * number, and identifies which options were configured into this
 * driver.
 */
static _INLINE_ void show_serial_version(void)
{
 	printk(KERN_INFO "%s version %s\n", serial_name, serial_version);
}


/*
 * The serial console driver used during boot.  Note that these names
 * clash with those found in "serial.c", so we currently can't support
 * the 16xxx uarts and these at the same time.  I will fix this to become
 * an indirect function call from tty_io.c (or something).
 */

#ifdef CONFIG_SERIAL_CONSOLE

/*
 * Print a string to the serial port trying not to disturb any possible
 * real use of the port...
 */
static void my_console_write(int idx, const char *s,
				unsigned count)
{
	struct		serial_state	*ser;
	ser_info_t			*info;
	unsigned			i;
	volatile	cbd_t		*bdp, *bdbase;
	volatile	smc_uart_t	*up;
	volatile	u_char		*cp;

	ser = rs_table + idx;

	/* If the port has been initialized for general use, we have
	 * to use the buffer descriptors allocated there.  Otherwise,
	 * we simply use the single buffer allocated.
	 */
	if ((info = (ser_info_t *)ser->info) != NULL) {
		bdp = info->tx_cur;
		bdbase = info->tx_bd_base;
	}
	else {
		/* Pointer to UART in parameter ram.
		*/
		up = (smc_uart_t *)&cpmp->cp_dparam[ser->port];

		/* Get the address of the host memory buffer.
		 */
		bdp = bdbase = (cbd_t *)&cpmp->cp_dpmem[up->smc_tbase];
	}

	/*
	 * We need to gracefully shut down the transmitter, disable
	 * interrupts, then send our bytes out.
	 */

	/*
	 * Now, do each character.  This is not as bad as it looks
	 * since this is a holding FIFO and not a transmitting FIFO.
	 * We could add the complexity of filling the entire transmit
	 * buffer, but we would just wait longer between accesses......
	 */
	for (i = 0; i < count; i++, s++) {
		/* Wait for transmitter fifo to empty.
		 * Ready indicates output is ready, and xmt is doing
		 * that, not that it is ready for us to send.
		 */
		while (bdp->cbd_sc & BD_SC_READY);

		/* Send the character out.
		 * If the buffer address is in the CPM DPRAM, don't
		 * convert it.
		 */
		if ((uint)(bdp->cbd_bufaddr) > (uint)IMAP_ADDR)
			cp = (u_char *)(bdp->cbd_bufaddr);
		else
			cp = __va(bdp->cbd_bufaddr);
		*cp = *s;
		
		bdp->cbd_datlen = 1;
		bdp->cbd_sc |= BD_SC_READY;

		if (bdp->cbd_sc & BD_SC_WRAP)
			bdp = bdbase;
		else
			bdp++;

		/* if a LF, also do CR... */
		if (*s == 10) {
			while (bdp->cbd_sc & BD_SC_READY);
			cp = __va(bdp->cbd_bufaddr);
			*cp = 13;
			bdp->cbd_datlen = 1;
			bdp->cbd_sc |= BD_SC_READY;

			if (bdp->cbd_sc & BD_SC_WRAP) {
				bdp = bdbase;
			}
			else {
				bdp++;
			}
		}
	}

	/*
	 * Finally, Wait for transmitter & holding register to empty
	 *  and restore the IER
	 */
	while (bdp->cbd_sc & BD_SC_READY);

	if (info)
		info->tx_cur = (cbd_t *)bdp;
}

static void serial_console_write(struct console *c, const char *s,
				unsigned count)
{
#ifdef CONFIG_KGDB
	/* Try to let stub handle output. Returns true if it did. */ 
	if (kgdb_output_string(s, count))
		return;
#endif
	my_console_write(c->index, s, count);
}

#ifdef CONFIG_XMON
int
xmon_8xx_write(const char *s, unsigned count)
{
	my_console_write(0, s, count);
	return(count);
}
#endif

#ifdef CONFIG_KGDB
void
putDebugChar(char ch)
{
	my_console_write(0, &ch, 1);
}
#endif

/*
 * Receive character from the serial port.  This only works well
 * before the port is initialized for real use.
 */
static int my_console_wait_key(int idx, int xmon, char *obuf)
{
	struct serial_state		*ser;
	u_char				c, *cp;
	ser_info_t			*info;
	volatile	cbd_t		*bdp;
	volatile	smc_uart_t	*up;
	int				i;

	ser = rs_table + idx;

	/* Pointer to UART in parameter ram.
	*/
	up = (smc_uart_t *)&cpmp->cp_dparam[ser->port];

	/* Get the address of the host memory buffer.
	 * If the port has been initialized for general use, we must
	 * use information from the port structure.
	 */
	if ((info = (ser_info_t *)ser->info))
		bdp = info->rx_cur;
	else
		bdp = (cbd_t *)&cpmp->cp_dpmem[up->smc_rbase];

	/*
	 * We need to gracefully shut down the receiver, disable
	 * interrupts, then read the input.
	 * XMON just wants a poll.  If no character, return -1, else
	 * return the character.
	 */
	if (!xmon) {
		while (bdp->cbd_sc & BD_SC_EMPTY);
	}
	else {
		if (bdp->cbd_sc & BD_SC_EMPTY)
			return -1;
	}

	/* If the buffer address is in the CPM DPRAM, don't
	 * convert it.
	 */
	if ((uint)(bdp->cbd_bufaddr) > (uint)IMAP_ADDR)
		cp = (u_char *)(bdp->cbd_bufaddr);
	else
		cp = __va(bdp->cbd_bufaddr);

	if (obuf) {
		i = c = bdp->cbd_datlen;
		while (i-- > 0)
			*obuf++ = *cp++;
	}
	else {
		c = *cp;
	}
	bdp->cbd_sc |= BD_SC_EMPTY;

	if (info) {
		if (bdp->cbd_sc & BD_SC_WRAP) {
			bdp = info->rx_bd_base;
		}
		else {
			bdp++;
		}
		info->rx_cur = (cbd_t *)bdp;
	}

	return((int)c);
}

static int serial_console_wait_key(struct console *co)
{
	return(my_console_wait_key(co->index, 0, NULL));
}

#ifdef CONFIG_XMON
int
xmon_8xx_read_poll(void)
{
	return(my_console_wait_key(0, 1, NULL));
}

int
xmon_8xx_read_char(void)
{
	return(my_console_wait_key(0, 0, NULL));
}
#endif

#ifdef CONFIG_KGDB
static char kgdb_buf[RX_BUF_SIZE], *kgdp;
static int kgdb_chars;

unsigned char
getDebugChar(void)
{
	if (kgdb_chars <= 0) {
		kgdb_chars = my_console_wait_key(0, 0, kgdb_buf);
		kgdp = kgdb_buf;
	}
	kgdb_chars--;

	return(*kgdp++);
}

void kgdb_interruptible(int state)
{
}
void kgdb_map_scc(void)
{
	struct		serial_state *ser;
	uint		mem_addr;
	volatile	cbd_t		*bdp;
	volatile	smc_uart_t	*up;

	cpmp = (cpm8xx_t *)&(((immap_t *)IMAP_ADDR)->im_cpm);

	/* To avoid data cache CPM DMA coherency problems, allocate a
	 * buffer in the CPM DPRAM.  This will work until the CPM and
	 * serial ports are initialized.  At that time a memory buffer
	 * will be allocated.
	 * The port is already initialized from the boot procedure, all
	 * we do here is give it a different buffer and make it a FIFO.
	 */

	ser = rs_table;

	/* Right now, assume we are using SMCs.
	*/
	up = (smc_uart_t *)&cpmp->cp_dparam[ser->port];

	/* Allocate space for an input FIFO, plus a few bytes for output.
	 * Allocate bytes to maintain word alignment.
	 */
	mem_addr = (uint)(&cpmp->cp_dpmem[0x1000]);

	/* Set the physical address of the host memory buffers in
	 * the buffer descriptors.
	 */
	bdp = (cbd_t *)&cpmp->cp_dpmem[up->smc_rbase];
	bdp->cbd_bufaddr = mem_addr;

	bdp = (cbd_t *)&cpmp->cp_dpmem[up->smc_tbase];
	bdp->cbd_bufaddr = mem_addr+RX_BUF_SIZE;

	up->smc_mrblr = RX_BUF_SIZE;		/* receive buffer length */
	up->smc_maxidl = RX_BUF_SIZE;
}
#endif

static kdev_t serial_console_device(struct console *c)
{
	return MKDEV(TTY_MAJOR, 64 + c->index);
}

/*
 *	Register console.
 */
long __init console_8xx_init(long kmem_start, long kmem_end)
{
	register_console(&sercons);
	return kmem_start;
}

#endif

/* Index in baud rate table of the default console baud rate.
*/
static	int	baud_idx;

/*
 * The serial driver boot-time initialization code!
 */
int __init rs_8xx_init(void)
{
	struct serial_state * state;
	ser_info_t	*info;
	uint		mem_addr, dp_addr, iobits;
	int		i, j, idx;
	ushort		chan;
	volatile	cbd_t		*bdp;
	volatile	cpm8xx_t	*cp;
	volatile	smc_t		*sp;
	volatile	smc_uart_t	*up;
	volatile	scc_t		*scp;
	volatile	scc_uart_t	*sup;
	volatile	immap_t		*immap;
	
	init_bh(SERIAL_BH, do_serial_bh);

	show_serial_version();

	/* Initialize the tty_driver structure */
	
	__clear_user(&serial_driver,sizeof(struct tty_driver));
	serial_driver.magic = TTY_DRIVER_MAGIC;
	serial_driver.driver_name = "serial";
#ifdef CONFIG_DEVFS_FS
	serial_driver.name = "tts/%d";
#else
	serial_driver.name = "ttyS";
#endif
	serial_driver.major = TTY_MAJOR;
	serial_driver.minor_start = 64;
	serial_driver.num = NR_PORTS;
	serial_driver.type = TTY_DRIVER_TYPE_SERIAL;
	serial_driver.subtype = SERIAL_TYPE_NORMAL;
	serial_driver.init_termios = tty_std_termios;
	serial_driver.init_termios.c_cflag =
		baud_idx | CS8 | CREAD | HUPCL | CLOCAL;
	serial_driver.flags = TTY_DRIVER_REAL_RAW;
	serial_driver.refcount = &serial_refcount;
	serial_driver.table = serial_table;
	serial_driver.termios = serial_termios;
	serial_driver.termios_locked = serial_termios_locked;

	serial_driver.open = rs_8xx_open;
	serial_driver.close = rs_8xx_close;
	serial_driver.write = rs_8xx_write;
	serial_driver.put_char = rs_8xx_put_char;
	serial_driver.write_room = rs_8xx_write_room;
	serial_driver.chars_in_buffer = rs_8xx_chars_in_buffer;
	serial_driver.flush_buffer = rs_8xx_flush_buffer;
	serial_driver.ioctl = rs_8xx_ioctl;
	serial_driver.throttle = rs_8xx_throttle;
	serial_driver.unthrottle = rs_8xx_unthrottle;
	serial_driver.send_xchar = rs_8xx_send_xchar;
	serial_driver.set_termios = rs_8xx_set_termios;
	serial_driver.stop = rs_8xx_stop;
	serial_driver.start = rs_8xx_start;
	serial_driver.hangup = rs_8xx_hangup;
	serial_driver.wait_until_sent = rs_8xx_wait_until_sent;
	serial_driver.read_proc = rs_8xx_read_proc;
	
	/*
	 * The callout device is just like normal device except for
	 * major number and the subtype code.
	 */
	callout_driver = serial_driver;
#ifdef CONFIG_DEVFS_FS
	callout_driver.name = "cua/%d";
#else
	callout_driver.name = "cua";
#endif
	callout_driver.major = TTYAUX_MAJOR;
	callout_driver.subtype = SERIAL_TYPE_CALLOUT;
	callout_driver.read_proc = 0;
	callout_driver.proc_entry = 0;

	if (tty_register_driver(&serial_driver))
		panic("Couldn't register serial driver\n");
	if (tty_register_driver(&callout_driver))
		panic("Couldn't register callout driver\n");
	
	cp = cpmp;	/* Get pointer to Communication Processor */
	immap = (immap_t *)IMAP_ADDR;	/* and to internal registers */


	/* Configure SCC2, SCC3, and SCC4 instead of port A parallel I/O.
	 */
#ifdef CONFIG_USE_SCC_IO
#ifndef CONFIG_MBX
	/* The "standard" configuration through the 860.
	*/
	immap->im_ioport.iop_papar |= 0x00fc;
	immap->im_ioport.iop_padir &= ~0x00fc;
	immap->im_ioport.iop_paodr &= ~0x00fc;
#else
	/* On the MBX, SCC3 is through Port D.
	*/
	immap->im_ioport.iop_papar |= 0x000c;	/* SCC2 on port A */
	immap->im_ioport.iop_padir &= ~0x000c;
	immap->im_ioport.iop_paodr &= ~0x000c;

	immap->im_ioport.iop_pdpar |= 0x0030;	/* SCC3 on port D */
#endif

	/* Since we don't yet do modem control, connect the port C pins
	 * as general purpose I/O.  This will assert CTS and CD for the
	 * SCC ports.
	 */
	immap->im_ioport.iop_pcdir |= 0x03c6;
	immap->im_ioport.iop_pcpar &= ~0x03c6;

	/* Connect SCC2 and SCC3 to NMSI.  Connect BRG3 to SCC2 and
	 * BRG4 to SCC3.
	 */
	cp->cp_sicr &= ~0x00ffff00;
	cp->cp_sicr |= 0x001b1200;

#ifdef CONFIG_PP04
	/* Frequentis PP04 forced to RS-232 until we know better.
	 * Port C 12 and 13 low enables RS-232 on SCC3 and SCC4.
	 */
	immap->im_ioport.iop_pcdir |= 0x000c;
	immap->im_ioport.iop_pcpar &= ~0x000c;
	immap->im_ioport.iop_pcdat &= ~0x000c;

	/* This enables the TX driver.
	*/
	cp->cp_pbpar &= ~0x6000;
	cp->cp_pbdat &= ~0x6000;
#endif
#endif

	for (i = 0, state = rs_table; i < NR_PORTS; i++,state++) {
		state->magic = SSTATE_MAGIC;
		state->line = i;
		state->type = PORT_UNKNOWN;
		state->custom_divisor = 0;
		state->close_delay = 5*HZ/10;
		state->closing_wait = 30*HZ;
		state->callout_termios = callout_driver.init_termios;
		state->normal_termios = serial_driver.init_termios;
		state->icount.cts = state->icount.dsr = 
			state->icount.rng = state->icount.dcd = 0;
		state->icount.rx = state->icount.tx = 0;
		state->icount.frame = state->icount.parity = 0;
		state->icount.overrun = state->icount.brk = 0;
		printk(KERN_INFO "ttyS%02d at 0x%04x is a %s\n",
		       i, (unsigned int)(state->port),
		       (state->smc_scc_num & NUM_IS_SCC) ? "SCC" : "SMC");
#ifdef CONFIG_SERIAL_CONSOLE
		/* If we just printed the message on the console port, and
		 * we are about to initialize it for general use, we have
		 * to wait a couple of character times for the CR/NL to
		 * make it out of the transmit buffer.
		 */
		if (i == CONFIG_SERIAL_CONSOLE_PORT)
			mdelay(2);
#endif
		info = kmalloc(sizeof(ser_info_t), GFP_KERNEL);
		if (info) {
			__clear_user(info,sizeof(ser_info_t));
			init_waitqueue_head(&info->open_wait);
			init_waitqueue_head(&info->close_wait);
			info->magic = SERIAL_MAGIC;
			info->flags = state->flags;
			info->tqueue.routine = do_softint;
			info->tqueue.data = info;
			info->tqueue_hangup.routine = do_serial_hangup;
			info->tqueue_hangup.data = info;
			info->line = i;
			info->state = state;
			state->info = (struct async_struct *)info;

			/* We need to allocate a transmit and receive buffer
			 * descriptors from dual port ram, and a character
			 * buffer area from host mem.
			 */
			dp_addr = m8xx_cpm_dpalloc(sizeof(cbd_t) * RX_NUM_FIFO);

			/* Allocate space for FIFOs in the host memory.
			*/
			mem_addr = m8xx_cpm_hostalloc(RX_NUM_FIFO * RX_BUF_SIZE);

			/* Set the physical address of the host memory
			 * buffers in the buffer descriptors, and the
			 * virtual address for us to work with.
			 */
			bdp = (cbd_t *)&cp->cp_dpmem[dp_addr];
			info->rx_cur = info->rx_bd_base = (cbd_t *)bdp;

			for (j=0; j<(RX_NUM_FIFO-1); j++) {
				bdp->cbd_bufaddr = __pa(mem_addr);
				bdp->cbd_sc = BD_SC_EMPTY | BD_SC_INTRPT;
				mem_addr += RX_BUF_SIZE;
				bdp++;
			}
			bdp->cbd_bufaddr = __pa(mem_addr);
			bdp->cbd_sc = BD_SC_WRAP | BD_SC_EMPTY | BD_SC_INTRPT;

			idx = PORT_NUM(info->state->smc_scc_num);
			if (info->state->smc_scc_num & NUM_IS_SCC) {
				scp = &cp->cp_scc[idx];
				sup = (scc_uart_t *)&cp->cp_dparam[state->port];
				sup->scc_genscc.scc_rbase = dp_addr;
			}
			else {
				sp = &cp->cp_smc[idx];
				up = (smc_uart_t *)&cp->cp_dparam[state->port];
				up->smc_rbase = dp_addr;
			}

			dp_addr = m8xx_cpm_dpalloc(sizeof(cbd_t) * TX_NUM_FIFO);

			/* Allocate space for FIFOs in the host memory.
			*/
			mem_addr = m8xx_cpm_hostalloc(TX_NUM_FIFO * TX_BUF_SIZE);

			/* Set the physical address of the host memory
			 * buffers in the buffer descriptors, and the
			 * virtual address for us to work with.
			 */
			bdp = (cbd_t *)&cp->cp_dpmem[dp_addr];
			info->tx_cur = info->tx_bd_base = (cbd_t *)bdp;

			for (j=0; j<(TX_NUM_FIFO-1); j++) {
				bdp->cbd_bufaddr = __pa(mem_addr);
				bdp->cbd_sc = BD_SC_INTRPT;
				mem_addr += TX_BUF_SIZE;
				bdp++;
			}
			bdp->cbd_bufaddr = __pa(mem_addr);
			bdp->cbd_sc = (BD_SC_WRAP | BD_SC_INTRPT);

			if (info->state->smc_scc_num & NUM_IS_SCC) {
				sup->scc_genscc.scc_tbase = dp_addr;

				/* Set up the uart parameters in the
				 * parameter ram.
				 */
				sup->scc_genscc.scc_rfcr = SMC_EB;
				sup->scc_genscc.scc_tfcr = SMC_EB;

				/* Set this to 1 for now, so we get single
				 * character interrupts.  Using idle charater
				 * time requires some additional tuning.
				 */
				sup->scc_genscc.scc_mrblr = 1;
				sup->scc_maxidl = 0;
				sup->scc_brkcr = 1;
				sup->scc_parec = 0;
				sup->scc_frmec = 0;
				sup->scc_nosec = 0;
				sup->scc_brkec = 0;
				sup->scc_uaddr1 = 0;
				sup->scc_uaddr2 = 0;
				sup->scc_toseq = 0;
				sup->scc_char1 = 0x8000;
				sup->scc_char2 = 0x8000;
				sup->scc_char3 = 0x8000;
				sup->scc_char4 = 0x8000;
				sup->scc_char5 = 0x8000;
				sup->scc_char6 = 0x8000;
				sup->scc_char7 = 0x8000;
				sup->scc_char8 = 0x8000;
				sup->scc_rccm = 0xc0ff;

				/* Send the CPM an initialize command.
				*/
				chan = scc_chan_map[idx];

				cp->cp_cpcr = mk_cr_cmd(chan,
						CPM_CR_INIT_TRX) | CPM_CR_FLG;
				while (cp->cp_cpcr & CPM_CR_FLG);

				/* Set UART mode, 8 bit, no parity, one stop.
				 * Enable receive and transmit.
				 */
				scp->scc_gsmrh = 0;
				scp->scc_gsmrl = 
					(SCC_GSMRL_MODE_UART | SCC_GSMRL_TDCR_16 | SCC_GSMRL_RDCR_16);

				/* Disable all interrupts and clear all pending
				 * events.
				 */
				scp->scc_sccm = 0;
				scp->scc_scce = 0xffff;
				scp->scc_dsr = 0x7e7e;
				scp->scc_pmsr = 0x3000;

				/* If the port is the console, enable Rx and Tx.
				*/
#ifdef CONFIG_SERIAL_CONSOLE
				if (i == CONFIG_SERIAL_CONSOLE_PORT)
					scp->scc_gsmrl |= (SCC_GSMRL_ENR | SCC_GSMRL_ENT);
#endif
			}
			else {
				/* Configure SMCs Tx/Rx instead of port B
				 * parallel I/O.  On 823/850 these are on
				 * port A for SMC2.
				 */
#ifndef CONFIG_ALTSMC2
				iobits = 0xc0 << (idx * 4);
				cp->cp_pbpar |= iobits;
				cp->cp_pbdir &= ~iobits;
				cp->cp_pbodr &= ~iobits;
#else
				iobits = 0xc0;
				if (idx == 0) {
					/* SMC1 on Port B, like all 8xx.
					*/
					cp->cp_pbpar |= iobits;
					cp->cp_pbdir &= ~iobits;
					cp->cp_pbodr &= ~iobits;
				}
				else {
					/* SMC2 is on Port A.
					*/
					immap->im_ioport.iop_papar |= iobits;
					immap->im_ioport.iop_padir &= ~iobits;
					immap->im_ioport.iop_paodr &= ~iobits;
				}
#endif /* CONFIG_ALTSMC2 */

				/* Connect the baud rate generator to the
				 * SMC based upon index in rs_table.  Also
				 * make sure it is connected to NMSI.
				 */
				cp->cp_simode &= ~(0xffff << (idx * 16));
				cp->cp_simode |= (i << ((idx * 16) + 12));

				up->smc_tbase = dp_addr;

				/* Set up the uart parameters in the
				 * parameter ram.
				 */
				up->smc_rfcr = SMC_EB;
				up->smc_tfcr = SMC_EB;

				/* Set this to 1 for now, so we get single
				 * character interrupts.  Using idle charater
				 * time requires some additional tuning.
				 */
				up->smc_mrblr = 1;
				up->smc_maxidl = 0;
				up->smc_brkcr = 1;

				/* Send the CPM an initialize command.
				*/
				chan = smc_chan_map[idx];

				cp->cp_cpcr = mk_cr_cmd(chan,
						CPM_CR_INIT_TRX) | CPM_CR_FLG;
				while (cp->cp_cpcr & CPM_CR_FLG);

				/* Set UART mode, 8 bit, no parity, one stop.
				 * Enable receive and transmit.
				 */
				sp->smc_smcmr = smcr_mk_clen(9) | SMCMR_SM_UART;

				/* Disable all interrupts and clear all pending
				 * events.
				 */
				sp->smc_smcm = 0;
				sp->smc_smce = 0xff;

				/* If the port is the console, enable Rx and Tx.
				*/
#ifdef CONFIG_SERIAL_CONSOLE
				if (i == CONFIG_SERIAL_CONSOLE_PORT)
					sp->smc_smcmr |= SMCMR_REN | SMCMR_TEN;
#endif
			}

			/* Install interrupt handler.
			*/
			cpm_install_handler(state->irq, rs_8xx_interrupt, info);

			/* Set up the baud rate generator.
			*/
			m8xx_cpm_setbrg(i, baud_table[baud_idx]);

		}
	}

	return 0;
}

/* This must always be called before the rs_8xx_init() function, otherwise
 * it blows away the port control information.
*/
static int __init serial_console_setup(struct console *co, char *options)
{
	struct		serial_state *ser;
	uint		mem_addr, dp_addr, bidx, idx;
	ushort		chan;
	volatile	cbd_t		*bdp;
	volatile	cpm8xx_t	*cp;
	volatile	smc_t		*sp;
	volatile	scc_t		*scp;
	volatile	smc_uart_t	*up;
	volatile	scc_uart_t	*sup;
	bd_t				*bd;

	bd = (bd_t *)__res;

	for (bidx = 0; bidx < (sizeof(baud_table) / sizeof(int)); bidx++)
		if (bd->bi_baudrate == baud_table[bidx])
			break;
	/* make sure we have a useful value */
	if (bidx == (sizeof(baud_table) / sizeof(int)))
		bidx = 13;	/* B9600 */

	co->cflag = CREAD|CLOCAL|bidx|CS8;
	baud_idx = bidx;

	ser = rs_table + co->index;

	cp = cpmp;	/* Get pointer to Communication Processor */

	idx = PORT_NUM(ser->smc_scc_num);
	if (ser->smc_scc_num & NUM_IS_SCC) {
		scp = &cp->cp_scc[idx];
		sup = (scc_uart_t *)&cp->cp_dparam[ser->port];
	}
	else {
		sp = &cp->cp_smc[idx];
		up = (smc_uart_t *)&cpmp->cp_dparam[ser->port];
	}

	/* When we get here, the CPM has been reset, so we need
	 * to configure the port.
	 * We need to allocate a transmit and receive buffer descriptor
	 * from dual port ram, and a character buffer area from host mem.
	 */

	/* Allocate space for two buffer descriptors in the DP ram.
	*/
	dp_addr = m8xx_cpm_dpalloc(sizeof(cbd_t) * 2);

	/* Allocate space for two 2 byte FIFOs in the host memory.
	*/
	mem_addr = m8xx_cpm_hostalloc(8);

	/* Set the physical address of the host memory buffers in
	 * the buffer descriptors.
	 */
	bdp = (cbd_t *)&cp->cp_dpmem[dp_addr];
	bdp->cbd_bufaddr = __pa(mem_addr);
	(bdp+1)->cbd_bufaddr = __pa(mem_addr+4);

	/* For the receive, set empty and wrap.
	 * For transmit, set wrap.
	 */
	bdp->cbd_sc = BD_SC_EMPTY | BD_SC_WRAP;
	(bdp+1)->cbd_sc = BD_SC_WRAP;

	/* Set up the uart parameters in the parameter ram.
	*/
	if (ser->smc_scc_num & NUM_IS_SCC) {

		sup->scc_genscc.scc_rbase = dp_addr;
		sup->scc_genscc.scc_tbase = dp_addr + sizeof(cbd_t);

		/* Set up the uart parameters in the
		 * parameter ram.
		 */
		sup->scc_genscc.scc_rfcr = SMC_EB;
		sup->scc_genscc.scc_tfcr = SMC_EB;

		/* Set this to 1 for now, so we get single
		 * character interrupts.  Using idle charater
		 * time requires some additional tuning.
		 */
		sup->scc_genscc.scc_mrblr = 1;
		sup->scc_maxidl = 0;
		sup->scc_brkcr = 1;
		sup->scc_parec = 0;
		sup->scc_frmec = 0;
		sup->scc_nosec = 0;
		sup->scc_brkec = 0;
		sup->scc_uaddr1 = 0;
		sup->scc_uaddr2 = 0;
		sup->scc_toseq = 0;
		sup->scc_char1 = 0x8000;
		sup->scc_char2 = 0x8000;
		sup->scc_char3 = 0x8000;
		sup->scc_char4 = 0x8000;
		sup->scc_char5 = 0x8000;
		sup->scc_char6 = 0x8000;
		sup->scc_char7 = 0x8000;
		sup->scc_char8 = 0x8000;
		sup->scc_rccm = 0xc0ff;

		/* Send the CPM an initialize command.
		*/
		chan = scc_chan_map[idx];

		cp->cp_cpcr = mk_cr_cmd(chan, CPM_CR_INIT_TRX) | CPM_CR_FLG;
		while (cp->cp_cpcr & CPM_CR_FLG);

		/* Set UART mode, 8 bit, no parity, one stop.
		 * Enable receive and transmit.
		 */
		scp->scc_gsmrh = 0;
		scp->scc_gsmrl = 
			(SCC_GSMRL_MODE_UART | SCC_GSMRL_TDCR_16 | SCC_GSMRL_RDCR_16);

		/* Disable all interrupts and clear all pending
		 * events.
		 */
		scp->scc_sccm = 0;
		scp->scc_scce = 0xffff;
		scp->scc_dsr = 0x7e7e;
		scp->scc_pmsr = 0x3000;

		scp->scc_gsmrl |= (SCC_GSMRL_ENR | SCC_GSMRL_ENT);

	}
	else {
		up->smc_rbase = dp_addr;	/* Base of receive buffer desc. */
		up->smc_tbase = dp_addr+sizeof(cbd_t);	/* Base of xmt buffer desc. */
		up->smc_rfcr = SMC_EB;
		up->smc_tfcr = SMC_EB;

		/* Set this to 1 for now, so we get single character interrupts.
		*/
		up->smc_mrblr = 1;		/* receive buffer length */
		up->smc_maxidl = 0;		/* wait forever for next char */

		/* Send the CPM an initialize command.
		*/
		chan = smc_chan_map[idx];
		cp->cp_cpcr = mk_cr_cmd(chan, CPM_CR_INIT_TRX) | CPM_CR_FLG;
		printk("%s", "");
		while (cp->cp_cpcr & CPM_CR_FLG);

		/* Set UART mode, 8 bit, no parity, one stop.
		 * Enable receive and transmit.
		 */
		sp->smc_smcmr = smcr_mk_clen(9) |  SMCMR_SM_UART;

		/* And finally, enable Rx and Tx.
		*/
		sp->smc_smcmr |= SMCMR_REN | SMCMR_TEN;
	}

	/* Set up the baud rate generator.
	*/
	m8xx_cpm_setbrg((ser - rs_table), bd->bi_baudrate);

	return 0;
}

/*
 * BK Id: SCCS/s.enet.c 1.17 10/11/01 11:55:47 trini
 */
/*
 * Ethernet driver for Motorola MPC8xx.
 * Copyright (c) 1997 Dan Malek (dmalek@jlc.net)
 *
 * I copied the basic skeleton from the lance driver, because I did not
 * know how to write the Linux driver, but I did know how the LANCE worked.
 *
 * This version of the driver is somewhat selectable for the different
 * processor/board combinations.  It works for the boards I know about
 * now, and should be easily modified to include others.  Some of the
 * configuration information is contained in <asm/commproc.h> and the
 * remainder is here.
 *
 * Buffer descriptors are kept in the CPM dual port RAM, and the frame
 * buffers are in the host memory.
 *
 * Right now, I am very watseful with the buffers.  I allocate memory
 * pages and then divide them into 2K frame buffers.  This way I know I
 * have buffers large enough to hold one frame within one buffer descriptor.
 * Once I get this working, I will use 64 or 128 byte CPM buffers, which
 * will be much more memory efficient and will easily handle lots of
 * small packets.
 *
 */
#include <linux/config.h>
#include <linux/kernel.h>
#include <linux/sched.h>
#include <linux/string.h>
#include <linux/ptrace.h>
#include <linux/errno.h>
#include <linux/ioport.h>
#include <linux/slab.h>
#include <linux/interrupt.h>
#include <linux/pci.h>
#include <linux/init.h>
#include <linux/delay.h>
#include <linux/netdevice.h>
#include <linux/etherdevice.h>
#include <linux/skbuff.h>
#include <linux/spinlock.h>

#include <asm/8xx_immap.h>
#include <asm/pgtable.h>
#include <asm/mpc8xx.h>
#include <asm/bitops.h>
#include <asm/uaccess.h>
#include <asm/commproc.h>

/*
 *				Theory of Operation
 *
 * The MPC8xx CPM performs the Ethernet processing on SCC1.  It can use
 * an aribtrary number of buffers on byte boundaries, but must have at
 * least two receive buffers to prevent constant overrun conditions.
 *
 * The buffer descriptors are allocated from the CPM dual port memory
 * with the data buffers allocated from host memory, just like all other
 * serial communication protocols.  The host memory buffers are allocated
 * from the free page pool, and then divided into smaller receive and
 * transmit buffers.  The size of the buffers should be a power of two,
 * since that nicely divides the page.  This creates a ring buffer
 * structure similar to the LANCE and other controllers.
 *
 * Like the LANCE driver:
 * The driver runs as two independent, single-threaded flows of control.  One
 * is the send-packet routine, which enforces single-threaded use by the
 * cep->tx_busy flag.  The other thread is the interrupt handler, which is
 * single threaded by the hardware and other software.
 *
 * The send packet thread has partial control over the Tx ring and the
 * 'cep->tx_busy' flag.  It sets the tx_busy flag whenever it's queuing a Tx
 * packet. If the next queue slot is empty, it clears the tx_busy flag when
 * finished otherwise it sets the 'lp->tx_full' flag.
 *
 * The MBX has a control register external to the MPC8xx that has some
 * control of the Ethernet interface.  Information is in the manual for
 * your board.
 *
 * The RPX boards have an external control/status register.  Consult the
 * programming documents for details unique to your board.
 *
 * For the TQM8xx(L) modules, there is no control register interface.
 * All functions are directly controlled using I/O pins.  See <asm/commproc.h>.
 */

/* The transmitter timeout
 */
#define TX_TIMEOUT	(2*HZ)

/* The number of Tx and Rx buffers.  These are allocated from the page
 * pool.  The code may assume these are power of two, so it is best
 * to keep them that size.
 * We don't need to allocate pages for the transmitter.  We just use
 * the skbuffer directly.
 */
#ifdef CONFIG_ENET_BIG_BUFFERS
#define CPM_ENET_RX_PAGES	32
#define CPM_ENET_RX_FRSIZE	2048
#define CPM_ENET_RX_FRPPG	(PAGE_SIZE / CPM_ENET_RX_FRSIZE)
#define RX_RING_SIZE		(CPM_ENET_RX_FRPPG * CPM_ENET_RX_PAGES)
#define TX_RING_SIZE		64	/* Must be power of two */
#define TX_RING_MOD_MASK	63	/*   for this to work */
#else
#define CPM_ENET_RX_PAGES	4
#define CPM_ENET_RX_FRSIZE	2048
#define CPM_ENET_RX_FRPPG	(PAGE_SIZE / CPM_ENET_RX_FRSIZE)
#define RX_RING_SIZE		(CPM_ENET_RX_FRPPG * CPM_ENET_RX_PAGES)
#define TX_RING_SIZE		8	/* Must be power of two */
#define TX_RING_MOD_MASK	7	/*   for this to work */
#endif

/* The CPM stores dest/src/type, data, and checksum for receive packets.
 */
#define PKT_MAXBUF_SIZE		1518
#define PKT_MINBUF_SIZE		64
#define PKT_MAXBLR_SIZE		1520

/* The CPM buffer descriptors track the ring buffers.  The rx_bd_base and
 * tx_bd_base always point to the base of the buffer descriptors.  The
 * cur_rx and cur_tx point to the currently available buffer.
 * The dirty_tx tracks the current buffer that is being sent by the
 * controller.  The cur_tx and dirty_tx are equal under both completely
 * empty and completely full conditions.  The empty/ready indicator in
 * the buffer descriptor determines the actual condition.
 */
struct scc_enet_private {
	/* The saved address of a sent-in-place packet/buffer, for skfree(). */
	struct	sk_buff* tx_skbuff[TX_RING_SIZE];
	ushort	skb_cur;
	ushort	skb_dirty;

	/* CPM dual port RAM relative addresses.
	*/
	cbd_t	*rx_bd_base;		/* Address of Rx and Tx buffers. */
	cbd_t	*tx_bd_base;
	cbd_t	*cur_rx, *cur_tx;		/* The next free ring entry */
	cbd_t	*dirty_tx;	/* The ring entries to be free()ed. */
	scc_t	*sccp;
	struct	net_device_stats stats;
	uint	tx_full;
	spinlock_t lock;
};

static int scc_enet_open(struct net_device *dev);
static int scc_enet_start_xmit(struct sk_buff *skb, struct net_device *dev);
static int scc_enet_rx(struct net_device *dev);
static void scc_enet_interrupt(void *dev_id, struct pt_regs *regs);
static int scc_enet_close(struct net_device *dev);
static struct net_device_stats *scc_enet_get_stats(struct net_device *dev);
static void set_multicast_list(struct net_device *dev);

/* Get this from various configuration locations (depends on board).
*/
/*static	ushort	my_enet_addr[] = { 0x0800, 0x3e26, 0x1559 };*/

/* Typically, 860(T) boards use SCC1 for Ethernet, and other 8xx boards
 * use SCC2. Some even may use SCC3.
 * This is easily extended if necessary.
 */
#if defined(CONFIG_SCC3_ENET)
#define CPM_CR_ENET	CPM_CR_CH_SCC3
#define PROFF_ENET	PROFF_SCC3
#define SCC_ENET	2		/* Index, not number! */
#define CPMVEC_ENET	CPMVEC_SCC3
#elif defined(CONFIG_SCC2_ENET)
#define CPM_CR_ENET	CPM_CR_CH_SCC2
#define PROFF_ENET	PROFF_SCC2
#define SCC_ENET	1		/* Index, not number! */
#define CPMVEC_ENET	CPMVEC_SCC2
#elif defined(CONFIG_SCC1_ENET)
#define CPM_CR_ENET	CPM_CR_CH_SCC1
#define PROFF_ENET	PROFF_SCC1
#define SCC_ENET	0		/* Index, not number! */
#define CPMVEC_ENET	CPMVEC_SCC1
#else
#error CONFIG_SCCx_ENET not defined
#endif

static int
scc_enet_open(struct net_device *dev)
{

	/* I should reset the ring buffers here, but I don't yet know
	 * a simple way to do that.
	 */

	netif_start_queue(dev);
	return 0;					/* Always succeed */
}

static int
scc_enet_start_xmit(struct sk_buff *skb, struct net_device *dev)
{
	struct scc_enet_private *cep = (struct scc_enet_private *)dev->priv;
	volatile cbd_t	*bdp;

	/* Fill in a Tx ring entry */
	bdp = cep->cur_tx;

#ifndef final_version
	if (bdp->cbd_sc & BD_ENET_TX_READY) {
		/* Ooops.  All transmit buffers are full.  Bail out.
		 * This should not happen, since cep->tx_busy should be set.
		 */
		printk("%s: tx queue full!.\n", dev->name);
		return 1;
	}
#endif

	/* Clear all of the status flags.
	 */
	bdp->cbd_sc &= ~BD_ENET_TX_STATS;

	/* If the frame is short, tell CPM to pad it.
	*/
	if (skb->len <= ETH_ZLEN)
		bdp->cbd_sc |= BD_ENET_TX_PAD;
	else
		bdp->cbd_sc &= ~BD_ENET_TX_PAD;

	/* Set buffer length and buffer pointer.
	*/
	bdp->cbd_datlen = skb->len;
	bdp->cbd_bufaddr = __pa(skb->data);

	/* Save skb pointer.
	*/
	cep->tx_skbuff[cep->skb_cur] = skb;

	cep->stats.tx_bytes += skb->len;
	cep->skb_cur = (cep->skb_cur+1) & TX_RING_MOD_MASK;
	
	/* Push the data cache so the CPM does not get stale memory
	 * data.
	 */
	flush_dcache_range((unsigned long)(skb->data),
					(unsigned long)(skb->data + skb->len));

	spin_lock_irq(&cep->lock);

	/* Send it on its way.  Tell CPM its ready, interrupt when done,
	 * its the last BD of the frame, and to put the CRC on the end.
	 */
	bdp->cbd_sc |= (BD_ENET_TX_READY | BD_ENET_TX_INTR | BD_ENET_TX_LAST | BD_ENET_TX_TC);

	dev->trans_start = jiffies;

	/* If this was the last BD in the ring, start at the beginning again.
	*/
	if (bdp->cbd_sc & BD_ENET_TX_WRAP)
		bdp = cep->tx_bd_base;
	else
		bdp++;

	if (bdp->cbd_sc & BD_ENET_TX_READY) {
		netif_stop_queue(dev);
		cep->tx_full = 1;
	}

	cep->cur_tx = (cbd_t *)bdp;

	spin_unlock_irq(&cep->lock);

	return 0;
}

static void
scc_enet_timeout(struct net_device *dev)
{
	struct scc_enet_private *cep = (struct scc_enet_private *)dev->priv;

	printk("%s: transmit timed out.\n", dev->name);
	cep->stats.tx_errors++;
#ifndef final_version
	{
		int	i;
		cbd_t	*bdp;
		printk(" Ring data dump: cur_tx %p%s cur_rx %p.\n",
		       cep->cur_tx, cep->tx_full ? " (full)" : "",
		       cep->cur_rx);
		bdp = cep->tx_bd_base;
		for (i = 0 ; i < TX_RING_SIZE; i++, bdp++)
			printk("%04x %04x %08x\n",
			       bdp->cbd_sc,
			       bdp->cbd_datlen,
			       bdp->cbd_bufaddr);
		bdp = cep->rx_bd_base;
		for (i = 0 ; i < RX_RING_SIZE; i++, bdp++)
			printk("%04x %04x %08x\n",
			       bdp->cbd_sc,
			       bdp->cbd_datlen,
			       bdp->cbd_bufaddr);
	}
#endif
	if (!cep->tx_full)
		netif_wake_queue(dev);
}

/* The interrupt handler.
 * This is called from the CPM handler, not the MPC core interrupt.
 */
static void
scc_enet_interrupt(void *dev_id, struct pt_regs *regs)
{
	struct	net_device *dev = dev_id;
	volatile struct	scc_enet_private *cep;
	volatile cbd_t	*bdp;
	ushort	int_events;
	int	must_restart;

	cep = (struct scc_enet_private *)dev->priv;

	/* Get the interrupt events that caused us to be here.
	*/
	int_events = cep->sccp->scc_scce;
	cep->sccp->scc_scce = int_events;
	must_restart = 0;

	/* Handle receive event in its own function.
	*/
	if (int_events & SCCE_ENET_RXF)
		scc_enet_rx(dev_id);

	/* Check for a transmit error.  The manual is a little unclear
	 * about this, so the debug code until I get it figured out.  It
	 * appears that if TXE is set, then TXB is not set.  However,
	 * if carrier sense is lost during frame transmission, the TXE
	 * bit is set, "and continues the buffer transmission normally."
	 * I don't know if "normally" implies TXB is set when the buffer
	 * descriptor is closed.....trial and error :-).
	 */

	/* Transmit OK, or non-fatal error.  Update the buffer descriptors.
	*/
	if (int_events & (SCCE_ENET_TXE | SCCE_ENET_TXB)) {
	    spin_lock(&cep->lock);
	    bdp = cep->dirty_tx;
	    while ((bdp->cbd_sc&BD_ENET_TX_READY)==0) {
		if ((bdp==cep->cur_tx) && (cep->tx_full == 0))
		    break;

		if (bdp->cbd_sc & BD_ENET_TX_HB)	/* No heartbeat */
			cep->stats.tx_heartbeat_errors++;
		if (bdp->cbd_sc & BD_ENET_TX_LC)	/* Late collision */
			cep->stats.tx_window_errors++;
		if (bdp->cbd_sc & BD_ENET_TX_RL)	/* Retrans limit */
			cep->stats.tx_aborted_errors++;
		if (bdp->cbd_sc & BD_ENET_TX_UN)	/* Underrun */
			cep->stats.tx_fifo_errors++;
		if (bdp->cbd_sc & BD_ENET_TX_CSL)	/* Carrier lost */
			cep->stats.tx_carrier_errors++;


		/* No heartbeat or Lost carrier are not really bad errors.
		 * The others require a restart transmit command.
		 */
		if (bdp->cbd_sc &
		    (BD_ENET_TX_LC | BD_ENET_TX_RL | BD_ENET_TX_UN)) {
			must_restart = 1;
			cep->stats.tx_errors++;
		}

		cep->stats.tx_packets++;

		/* Deferred means some collisions occurred during transmit,
		 * but we eventually sent the packet OK.
		 */
		if (bdp->cbd_sc & BD_ENET_TX_DEF)
			cep->stats.collisions++;

		/* Free the sk buffer associated with this last transmit.
		*/
		dev_kfree_skb_irq(cep->tx_skbuff[cep->skb_dirty]);
		cep->skb_dirty = (cep->skb_dirty + 1) & TX_RING_MOD_MASK;

		/* Update pointer to next buffer descriptor to be transmitted.
		*/
		if (bdp->cbd_sc & BD_ENET_TX_WRAP)
			bdp = cep->tx_bd_base;
		else
			bdp++;

		/* I don't know if we can be held off from processing these
		 * interrupts for more than one frame time.  I really hope
		 * not.  In such a case, we would now want to check the
		 * currently available BD (cur_tx) and determine if any
		 * buffers between the dirty_tx and cur_tx have also been
		 * sent.  We would want to process anything in between that
		 * does not have BD_ENET_TX_READY set.
		 */

		/* Since we have freed up a buffer, the ring is no longer
		 * full.
		 */
		if (cep->tx_full) {
			cep->tx_full = 0;
			if (netif_queue_stopped(dev))
				netif_wake_queue(dev);
		}

		cep->dirty_tx = (cbd_t *)bdp;
	    }

	    if (must_restart) {
		volatile cpm8xx_t *cp;

		/* Some transmit errors cause the transmitter to shut
		 * down.  We now issue a restart transmit.  Since the
		 * errors close the BD and update the pointers, the restart
		 * _should_ pick up without having to reset any of our
		 * pointers either.
		 */
		cp = cpmp;
		cp->cp_cpcr =
		    mk_cr_cmd(CPM_CR_ENET, CPM_CR_RESTART_TX) | CPM_CR_FLG;
		while (cp->cp_cpcr & CPM_CR_FLG);
	    }
	    spin_unlock(&cep->lock);
	}

	/* Check for receive busy, i.e. packets coming but no place to
	 * put them.  This "can't happen" because the receive interrupt
	 * is tossing previous frames.
	 */
	if (int_events & SCCE_ENET_BSY) {
		cep->stats.rx_dropped++;
		printk("CPM ENET: BSY can't happen.\n");
	}

	return;
}

/* During a receive, the cur_rx points to the current incoming buffer.
 * When we update through the ring, if the next incoming buffer has
 * not been given to the system, we just set the empty indicator,
 * effectively tossing the packet.
 */
static int
scc_enet_rx(struct net_device *dev)
{
	struct	scc_enet_private *cep;
	volatile cbd_t	*bdp;
	struct	sk_buff *skb;
	ushort	pkt_len;

	cep = (struct scc_enet_private *)dev->priv;

	/* First, grab all of the stats for the incoming packet.
	 * These get messed up if we get called due to a busy condition.
	 */
	bdp = cep->cur_rx;

for (;;) {
	if (bdp->cbd_sc & BD_ENET_RX_EMPTY)
		break;
		
#ifndef final_version
	/* Since we have allocated space to hold a complete frame, both
	 * the first and last indicators should be set.
	 */
	if ((bdp->cbd_sc & (BD_ENET_RX_FIRST | BD_ENET_RX_LAST)) !=
		(BD_ENET_RX_FIRST | BD_ENET_RX_LAST))
			printk("CPM ENET: rcv is not first+last\n");
#endif

	/* Frame too long or too short.
	*/
	if (bdp->cbd_sc & (BD_ENET_RX_LG | BD_ENET_RX_SH))
		cep->stats.rx_length_errors++;
	if (bdp->cbd_sc & BD_ENET_RX_NO)	/* Frame alignment */
		cep->stats.rx_frame_errors++;
	if (bdp->cbd_sc & BD_ENET_RX_CR)	/* CRC Error */
		cep->stats.rx_crc_errors++;
	if (bdp->cbd_sc & BD_ENET_RX_OV)	/* FIFO overrun */
		cep->stats.rx_crc_errors++;

	/* Report late collisions as a frame error.
	 * On this error, the BD is closed, but we don't know what we
	 * have in the buffer.  So, just drop this frame on the floor.
	 */
	if (bdp->cbd_sc & BD_ENET_RX_CL) {
		cep->stats.rx_frame_errors++;
	}
	else {

		/* Process the incoming frame.
		*/
		cep->stats.rx_packets++;
		pkt_len = bdp->cbd_datlen;
		cep->stats.rx_bytes += pkt_len;

		/* This does 16 byte alignment, much more than we need.
		 * The packet length includes FCS, but we don't want to
		 * include that when passing upstream as it messes up
		 * bridging applications.
		 */
		skb = dev_alloc_skb(pkt_len-4);

		if (skb == NULL) {
			printk("%s: Memory squeeze, dropping packet.\n", dev->name);
			cep->stats.rx_dropped++;
		}
		else {
			skb->dev = dev;
			skb_put(skb,pkt_len-4);	/* Make room */
			eth_copy_and_sum(skb,
				(unsigned char *)__va(bdp->cbd_bufaddr),
				pkt_len-4, 0);
			skb->protocol=eth_type_trans(skb,dev);
			netif_rx(skb);
		}
	}

	/* Clear the status flags for this buffer.
	*/
	bdp->cbd_sc &= ~BD_ENET_RX_STATS;

	/* Mark the buffer empty.
	*/
	bdp->cbd_sc |= BD_ENET_RX_EMPTY;

	/* Update BD pointer to next entry.
	*/
	if (bdp->cbd_sc & BD_ENET_RX_WRAP)
		bdp = cep->rx_bd_base;
	else
		bdp++;

   }
	cep->cur_rx = (cbd_t *)bdp;

	return 0;
}

static int
scc_enet_close(struct net_device *dev)
{
	/* Don't know what to do yet.
	*/
	netif_stop_queue(dev);

	return 0;
}

static struct net_device_stats *scc_enet_get_stats(struct net_device *dev)
{
	struct scc_enet_private *cep = (struct scc_enet_private *)dev->priv;

	return &cep->stats;
}

/* Set or clear the multicast filter for this adaptor.
 * Skeleton taken from sunlance driver.
 * The CPM Ethernet implementation allows Multicast as well as individual
 * MAC address filtering.  Some of the drivers check to make sure it is
 * a group multicast address, and discard those that are not.  I guess I
 * will do the same for now, but just remove the test if you want
 * individual filtering as well (do the upper net layers want or support
 * this kind of feature?).
 */

static void set_multicast_list(struct net_device *dev)
{
	struct	scc_enet_private *cep;
	struct	dev_mc_list *dmi;
	u_char	*mcptr, *tdptr;
	volatile scc_enet_t *ep;
	int	i, j;
	cep = (struct scc_enet_private *)dev->priv;

	/* Get pointer to SCC area in parameter RAM.
	*/
	ep = (scc_enet_t *)dev->base_addr;

	if (dev->flags&IFF_PROMISC) {
	  
		/* Log any net taps. */
		printk("%s: Promiscuous mode enabled.\n", dev->name);
		cep->sccp->scc_pmsr |= SCC_PMSR_PRO;
	} else {

		cep->sccp->scc_pmsr &= ~SCC_PMSR_PRO;

		if (dev->flags & IFF_ALLMULTI) {
			/* Catch all multicast addresses, so set the
			 * filter to all 1's.
			 */
			ep->sen_gaddr1 = 0xffff;
			ep->sen_gaddr2 = 0xffff;
			ep->sen_gaddr3 = 0xffff;
			ep->sen_gaddr4 = 0xffff;
		}
		else {
			/* Clear filter and add the addresses in the list.
			*/
			ep->sen_gaddr1 = 0;
			ep->sen_gaddr2 = 0;
			ep->sen_gaddr3 = 0;
			ep->sen_gaddr4 = 0;

			dmi = dev->mc_list;

			for (i=0; i<dev->mc_count; i++) {
				
				/* Only support group multicast for now.
				*/
				if (!(dmi->dmi_addr[0] & 1))
					continue;

				/* The address in dmi_addr is LSB first,
				 * and taddr is MSB first.  We have to
				 * copy bytes MSB first from dmi_addr.
				 */
				mcptr = (u_char *)dmi->dmi_addr + 5;
				tdptr = (u_char *)&ep->sen_taddrh;
				for (j=0; j<6; j++)
					*tdptr++ = *mcptr--;

				/* Ask CPM to run CRC and set bit in
				 * filter mask.
				 */
				cpmp->cp_cpcr = mk_cr_cmd(CPM_CR_ENET, CPM_CR_SET_GADDR) | CPM_CR_FLG;
				/* this delay is necessary here -- Cort */
				udelay(10);
				while (cpmp->cp_cpcr & CPM_CR_FLG);
			}
		}
	}
}

/* Initialize the CPM Ethernet on SCC.  If EPPC-Bug loaded us, or performed
 * some other network I/O, a whole bunch of this has already been set up.
 * It is no big deal if we do it again, we just have to disable the
 * transmit and receive to make sure we don't catch the CPM with some
 * inconsistent control information.
 */
int __init scc_enet_init(void)
{
	struct net_device *dev;
	struct scc_enet_private *cep;
	int i, j;
	unsigned char	*eap;
	unsigned long	mem_addr;
	pte_t		*pte;
	bd_t		*bd;
	volatile	cbd_t		*bdp;
	volatile	cpm8xx_t	*cp;
	volatile	scc_t		*sccp;
	volatile	scc_enet_t	*ep;
	volatile	immap_t		*immap;

	cp = cpmp;	/* Get pointer to Communication Processor */

	immap = (immap_t *)(mfspr(IMMR) & 0xFFFF0000);	/* and to internal registers */

	bd = (bd_t *)__res;

	/* Allocate some private information.
	*/
	cep = (struct scc_enet_private *)kmalloc(sizeof(*cep), GFP_KERNEL);
	if (cep == NULL)
		return -ENOMEM;

	__clear_user(cep,sizeof(*cep));
	spin_lock_init(&cep->lock);

	/* Create an Ethernet device instance.
	*/
	dev = init_etherdev(0, 0);

	/* Get pointer to SCC area in parameter RAM.
	*/
	ep = (scc_enet_t *)(&cp->cp_dparam[PROFF_ENET]);

	/* And another to the SCC register area.
	*/
	sccp = (volatile scc_t *)(&cp->cp_scc[SCC_ENET]);
	cep->sccp = (scc_t *)sccp;		/* Keep the pointer handy */

	/* Disable receive and transmit in case EPPC-Bug started it.
	*/
	sccp->scc_gsmrl &= ~(SCC_GSMRL_ENR | SCC_GSMRL_ENT);

	/* Cookbook style from the MPC860 manual.....
	 * Not all of this is necessary if EPPC-Bug has initialized
	 * the network.
	 * So far we are lucky, all board configurations use the same
	 * pins, or at least the same I/O Port for these functions.....
	 * It can't last though......
	 */

#if (defined(PA_ENET_RXD) && defined(PA_ENET_TXD))
	/* Configure port A pins for Txd and Rxd.
	*/
	immap->im_ioport.iop_papar |=  (PA_ENET_RXD | PA_ENET_TXD);
	immap->im_ioport.iop_padir &= ~(PA_ENET_RXD | PA_ENET_TXD);
	immap->im_ioport.iop_paodr &=                ~PA_ENET_TXD;
#elif (defined(PB_ENET_RXD) && defined(PB_ENET_TXD))
	/* Configure port B pins for Txd and Rxd.
	*/
	immap->im_cpm.cp_pbpar |=  (PB_ENET_RXD | PB_ENET_TXD);
	immap->im_cpm.cp_pbdir &= ~(PB_ENET_RXD | PB_ENET_TXD);
	immap->im_cpm.cp_pbodr &=		 ~PB_ENET_TXD;
#else
#error Exactly ONE pair of PA_ENET_[RT]XD, PB_ENET_[RT]XD must be defined
#endif

#if defined(PC_ENET_LBK)
	/* Configure port C pins to disable External Loopback
	 */
	immap->im_ioport.iop_pcpar &= ~PC_ENET_LBK;
	immap->im_ioport.iop_pcdir |=  PC_ENET_LBK;
	immap->im_ioport.iop_pcso  &= ~PC_ENET_LBK;
	immap->im_ioport.iop_pcdat &= ~PC_ENET_LBK;	/* Disable Loopback */
#endif	/* PC_ENET_LBK */

	/* Configure port C pins to enable CLSN and RENA.
	*/
	immap->im_ioport.iop_pcpar &= ~(PC_ENET_CLSN | PC_ENET_RENA);
	immap->im_ioport.iop_pcdir &= ~(PC_ENET_CLSN | PC_ENET_RENA);
	immap->im_ioport.iop_pcso  |=  (PC_ENET_CLSN | PC_ENET_RENA);

	/* Configure port A for TCLK and RCLK.
	*/
	immap->im_ioport.iop_papar |=  (PA_ENET_TCLK | PA_ENET_RCLK);
	immap->im_ioport.iop_padir &= ~(PA_ENET_TCLK | PA_ENET_RCLK);

	/* Configure Serial Interface clock routing.
	 * First, clear all SCC bits to zero, then set the ones we want.
	 */
	cp->cp_sicr &= ~SICR_ENET_MASK;
	cp->cp_sicr |=  SICR_ENET_CLKRT;

	/* Manual says set SDDR, but I can't find anything with that
	 * name.  I think it is a misprint, and should be SDCR.  This
	 * has already been set by the communication processor initialization.
	 */

	/* Allocate space for the buffer descriptors in the DP ram.
	 * These are relative offsets in the DP ram address space.
	 * Initialize base addresses for the buffer descriptors.
	 */
	i = m8xx_cpm_dpalloc(sizeof(cbd_t) * RX_RING_SIZE);
	ep->sen_genscc.scc_rbase = i;
	cep->rx_bd_base = (cbd_t *)&cp->cp_dpmem[i];

	i = m8xx_cpm_dpalloc(sizeof(cbd_t) * TX_RING_SIZE);
	ep->sen_genscc.scc_tbase = i;
	cep->tx_bd_base = (cbd_t *)&cp->cp_dpmem[i];

	cep->dirty_tx = cep->cur_tx = cep->tx_bd_base;
	cep->cur_rx = cep->rx_bd_base;

	/* Issue init Rx BD command for SCC.
	 * Manual says to perform an Init Rx parameters here.  We have
	 * to perform both Rx and Tx because the SCC may have been
	 * already running.
	 * In addition, we have to do it later because we don't yet have
	 * all of the BD control/status set properly.
	cp->cp_cpcr = mk_cr_cmd(CPM_CR_ENET, CPM_CR_INIT_RX) | CPM_CR_FLG;
	while (cp->cp_cpcr & CPM_CR_FLG);
	 */

	/* Initialize function code registers for big-endian.
	*/
	ep->sen_genscc.scc_rfcr = SCC_EB;
	ep->sen_genscc.scc_tfcr = SCC_EB;

	/* Set maximum bytes per receive buffer.
	 * This appears to be an Ethernet frame size, not the buffer
	 * fragment size.  It must be a multiple of four.
	 */
	ep->sen_genscc.scc_mrblr = PKT_MAXBLR_SIZE;

	/* Set CRC preset and mask.
	*/
	ep->sen_cpres = 0xffffffff;
	ep->sen_cmask = 0xdebb20e3;

	ep->sen_crcec = 0;	/* CRC Error counter */
	ep->sen_alec = 0;	/* alignment error counter */
	ep->sen_disfc = 0;	/* discard frame counter */

	ep->sen_pads = 0x8888;	/* Tx short frame pad character */
	ep->sen_retlim = 15;	/* Retry limit threshold */

	ep->sen_maxflr = PKT_MAXBUF_SIZE;   /* maximum frame length register */
	ep->sen_minflr = PKT_MINBUF_SIZE;  /* minimum frame length register */

	ep->sen_maxd1 = PKT_MAXBLR_SIZE;	/* maximum DMA1 length */
	ep->sen_maxd2 = PKT_MAXBLR_SIZE;	/* maximum DMA2 length */

	/* Clear hash tables.
	*/
	ep->sen_gaddr1 = 0;
	ep->sen_gaddr2 = 0;
	ep->sen_gaddr3 = 0;
	ep->sen_gaddr4 = 0;
	ep->sen_iaddr1 = 0;
	ep->sen_iaddr2 = 0;
	ep->sen_iaddr3 = 0;
	ep->sen_iaddr4 = 0;

	/* Set Ethernet station address.
	 */
	eap = (unsigned char *)&(ep->sen_paddrh);
	for (i=5; i>=0; i--)
		*eap++ = dev->dev_addr[i] = bd->bi_enetaddr[i];

	ep->sen_pper = 0;	/* 'cause the book says so */
	ep->sen_taddrl = 0;	/* temp address (LSB) */
	ep->sen_taddrm = 0;
	ep->sen_taddrh = 0;	/* temp address (MSB) */

	/* Now allocate the host memory pages and initialize the
	 * buffer descriptors.
	 */
	bdp = cep->tx_bd_base;
	for (i=0; i<TX_RING_SIZE; i++) {

		/* Initialize the BD for every fragment in the page.
		*/
		bdp->cbd_sc = 0;
		bdp->cbd_bufaddr = 0;
		bdp++;
	}

	/* Set the last buffer to wrap.
	*/
	bdp--;
	bdp->cbd_sc |= BD_SC_WRAP;

	bdp = cep->rx_bd_base;
	for (i=0; i<CPM_ENET_RX_PAGES; i++) {

		/* Allocate a page.
		*/
		mem_addr = __get_free_page(GFP_KERNEL);

		/* Make it uncached.
		*/
		pte = va_to_pte(mem_addr);
		pte_val(*pte) |= _PAGE_NO_CACHE;
		flush_tlb_page(init_mm.mmap, mem_addr);

		/* Initialize the BD for every fragment in the page.
		*/
		for (j=0; j<CPM_ENET_RX_FRPPG; j++) {
			bdp->cbd_sc = BD_ENET_RX_EMPTY | BD_ENET_RX_INTR;
			bdp->cbd_bufaddr = __pa(mem_addr);
			mem_addr += CPM_ENET_RX_FRSIZE;
			bdp++;
		}
	}

	/* Set the last buffer to wrap.
	*/
	bdp--;
	bdp->cbd_sc |= BD_SC_WRAP;

	/* Let's re-initialize the channel now.  We have to do it later
	 * than the manual describes because we have just now finished
	 * the BD initialization.
	 */
	cp->cp_cpcr = mk_cr_cmd(CPM_CR_ENET, CPM_CR_INIT_TRX) | CPM_CR_FLG;
	while (cp->cp_cpcr & CPM_CR_FLG);

	cep->skb_cur = cep->skb_dirty = 0;

	sccp->scc_scce = 0xffff;	/* Clear any pending events */

	/* Enable interrupts for transmit error, complete frame
	 * received, and any transmit buffer we have also set the
	 * interrupt flag.
	 */
	sccp->scc_sccm = (SCCE_ENET_TXE | SCCE_ENET_RXF | SCCE_ENET_TXB);

	/* Install our interrupt handler.
	*/
	cpm_install_handler(CPMVEC_ENET, scc_enet_interrupt, dev);

	/* Set GSMR_H to enable all normal operating modes.
	 * Set GSMR_L to enable Ethernet to MC68160.
	 */
	sccp->scc_gsmrh = 0;
	sccp->scc_gsmrl = (SCC_GSMRL_TCI | SCC_GSMRL_TPL_48 | SCC_GSMRL_TPP_10 | SCC_GSMRL_MODE_ENET);

	/* Set sync/delimiters.
	*/
	sccp->scc_dsr = 0xd555;

	/* Set processing mode.  Use Ethernet CRC, catch broadcast, and
	 * start frame search 22 bit times after RENA.
	 */
	sccp->scc_pmsr = (SCC_PMSR_ENCRC | SCC_PMSR_NIB22);

	/* It is now OK to enable the Ethernet transmitter.
	 * Unfortunately, there are board implementation differences here.
	 */
#if   (!defined (PB_ENET_TENA) &&  defined (PC_ENET_TENA))
	immap->im_ioport.iop_pcpar |=  PC_ENET_TENA;
	immap->im_ioport.iop_pcdir &= ~PC_ENET_TENA;
#elif ( defined (PB_ENET_TENA) && !defined (PC_ENET_TENA))
	cp->cp_pbpar |= PB_ENET_TENA;
	cp->cp_pbdir |= PB_ENET_TENA;
#else
#error Configuration Error: define exactly ONE of PB_ENET_TENA, PC_ENET_TENA
#endif

#if defined(CONFIG_RPXLITE) || defined(CONFIG_RPXCLASSIC)
	/* And while we are here, set the configuration to enable ethernet.
	*/
	*((volatile uint *)RPX_CSR_ADDR) &= ~BCSR0_ETHLPBK;
	*((volatile uint *)RPX_CSR_ADDR) |=
			(BCSR0_ETHEN | BCSR0_COLTESTDIS | BCSR0_FULLDPLXDIS);
#endif

#ifdef CONFIG_BSEIP
	/* BSE uses port B and C for PHY control.
	*/
	cp->cp_pbpar &= ~(PB_BSE_POWERUP | PB_BSE_FDXDIS);
	cp->cp_pbdir |= (PB_BSE_POWERUP | PB_BSE_FDXDIS);
	cp->cp_pbdat |= (PB_BSE_POWERUP | PB_BSE_FDXDIS);

	immap->im_ioport.iop_pcpar &= ~PC_BSE_LOOPBACK;
	immap->im_ioport.iop_pcdir |= PC_BSE_LOOPBACK;
	immap->im_ioport.iop_pcso &= ~PC_BSE_LOOPBACK;
	immap->im_ioport.iop_pcdat &= ~PC_BSE_LOOPBACK;
#endif

#ifdef CONFIG_FADS
	cp->cp_pbpar |= PB_ENET_TENA;
	cp->cp_pbdir |= PB_ENET_TENA;

	/* Enable the EEST PHY.
	*/
	*((volatile uint *)BCSR1) &= ~BCSR1_ETHEN;
#endif

	dev->base_addr = (unsigned long)ep;
	dev->priv = cep;
#if 0
	dev->name = "CPM_ENET";
#endif

	/* The CPM Ethernet specific entries in the device structure. */
	dev->open = scc_enet_open;
	dev->hard_start_xmit = scc_enet_start_xmit;
	dev->tx_timeout = scc_enet_timeout;
	dev->watchdog_timeo = TX_TIMEOUT;
	dev->stop = scc_enet_close;
	dev->get_stats = scc_enet_get_stats;
	dev->set_multicast_list = set_multicast_list;

	/* And last, enable the transmit and receive processing.
	*/
	sccp->scc_gsmrl |= (SCC_GSMRL_ENR | SCC_GSMRL_ENT);

	printk("%s: CPM ENET Version 0.2 on SCC%d, ", dev->name, SCC_ENET+1);
	for (i=0; i<5; i++)
		printk("%02x:", dev->dev_addr[i]);
	printk("%02x\n", dev->dev_addr[5]);

	return 0;
}
/*
 * BK Id: SCCS/s.fec.c 1.20 10/11/01 11:55:47 trini
 */
/*
 * Fast Ethernet Controller (FEC) driver for Motorola MPC8xx.
 * Copyright (c) 1997 Dan Malek (dmalek@jlc.net)
 *
 * This version of the driver is specific to the FADS implementation,
 * since the board contains control registers external to the processor
 * for the control of the LevelOne LXT970 transceiver.  The MPC860T manual
 * describes connections using the internal parallel port I/O, which
 * is basically all of Port D.
 *
 * Includes support for the following PHYs: QS6612, LXT970, LXT971/2.
 *
 * Right now, I am very wasteful with the buffers.  I allocate memory
 * pages and then divide them into 2K frame buffers.  This way I know I
 * have buffers large enough to hold one frame within one buffer descriptor.
 * Once I get this working, I will use 64 or 128 byte CPM buffers, which
 * will be much more memory efficient and will easily handle lots of
 * small packets.
 *
 * Much better multiple PHY support by Magnus Damm.
 * Copyright (c) 2000 Ericsson Radio Systems AB.
 *
 * Make use of MII for PHY control configurable.
 * Some fixes.
 * Copyright (c) 2000 Wolfgang Denk, DENX Software Engineering.
 */

/* List of PHYs we wish to support.
*/
#undef	CONFIG_FEC_LXT970
#define	CONFIG_FEC_LXT971
#undef	CONFIG_FEC_QS6612

#include <linux/config.h>
#include <linux/kernel.h>
#include <linux/sched.h>
#include <linux/string.h>
#include <linux/ptrace.h>
#include <linux/errno.h>
#include <linux/ioport.h>
#include <linux/slab.h>
#include <linux/interrupt.h>
#include <linux/pci.h>
#include <linux/init.h>
#include <linux/delay.h>
#include <linux/netdevice.h>
#include <linux/etherdevice.h>
#include <linux/skbuff.h>
#include <linux/spinlock.h>
#ifdef CONFIG_FEC_PACKETHOOK
#include <linux/pkthook.h>
#endif

#include <asm/8xx_immap.h>
#include <asm/pgtable.h>
#include <asm/mpc8xx.h>
#include <asm/irq.h>
#include <asm/bitops.h>
#include <asm/uaccess.h>
#include <asm/commproc.h>

#ifdef	CONFIG_USE_MDIO
/* Forward declarations of some structures to support different PHYs
*/

typedef struct {
	uint mii_data;
	void (*funct)(uint mii_reg, struct net_device *dev);
} phy_cmd_t;

typedef struct {
	uint id;
	char *name;

	const phy_cmd_t *config;
	const phy_cmd_t *startup;
	const phy_cmd_t *ack_int;
	const phy_cmd_t *shutdown;
} phy_info_t;
#endif	/* CONFIG_USE_MDIO */

/* The number of Tx and Rx buffers.  These are allocated from the page
 * pool.  The code may assume these are power of two, so it is best
 * to keep them that size.
 * We don't need to allocate pages for the transmitter.  We just use
 * the skbuffer directly.
 */
#ifdef CONFIG_ENET_BIG_BUFFERS
#define FEC_ENET_RX_PAGES	16
#define FEC_ENET_RX_FRSIZE	2048
#define FEC_ENET_RX_FRPPG	(PAGE_SIZE / FEC_ENET_RX_FRSIZE)
#define RX_RING_SIZE		(FEC_ENET_RX_FRPPG * FEC_ENET_RX_PAGES)
#define TX_RING_SIZE		16	/* Must be power of two */
#define TX_RING_MOD_MASK	15	/*   for this to work */
#else
#define FEC_ENET_RX_PAGES	4
#define FEC_ENET_RX_FRSIZE	2048
#define FEC_ENET_RX_FRPPG	(PAGE_SIZE / FEC_ENET_RX_FRSIZE)
#define RX_RING_SIZE		(FEC_ENET_RX_FRPPG * FEC_ENET_RX_PAGES)
#define TX_RING_SIZE		8	/* Must be power of two */
#define TX_RING_MOD_MASK	7	/*   for this to work */
#endif

/* Interrupt events/masks.
*/
#define FEC_ENET_HBERR	((uint)0x80000000)	/* Heartbeat error */
#define FEC_ENET_BABR	((uint)0x40000000)	/* Babbling receiver */
#define FEC_ENET_BABT	((uint)0x20000000)	/* Babbling transmitter */
#define FEC_ENET_GRA	((uint)0x10000000)	/* Graceful stop complete */
#define FEC_ENET_TXF	((uint)0x08000000)	/* Full frame transmitted */
#define FEC_ENET_TXB	((uint)0x04000000)	/* A buffer was transmitted */
#define FEC_ENET_RXF	((uint)0x02000000)	/* Full frame received */
#define FEC_ENET_RXB	((uint)0x01000000)	/* A buffer was received */
#define FEC_ENET_MII	((uint)0x00800000)	/* MII interrupt */
#define FEC_ENET_EBERR	((uint)0x00400000)	/* SDMA bus error */

/*
*/
#define FEC_ECNTRL_PINMUX	0x00000004
#define FEC_ECNTRL_ETHER_EN	0x00000002
#define FEC_ECNTRL_RESET	0x00000001

#define FEC_RCNTRL_BC_REJ	0x00000010
#define FEC_RCNTRL_PROM		0x00000008
#define FEC_RCNTRL_MII_MODE	0x00000004
#define FEC_RCNTRL_DRT		0x00000002
#define FEC_RCNTRL_LOOP		0x00000001

#define FEC_TCNTRL_FDEN		0x00000004
#define FEC_TCNTRL_HBC		0x00000002
#define FEC_TCNTRL_GTS		0x00000001

/* Delay to wait for FEC reset command to complete (in us)
*/
#define FEC_RESET_DELAY		50

/* The FEC stores dest/src/type, data, and checksum for receive packets.
 */
#define PKT_MAXBUF_SIZE		1518
#define PKT_MINBUF_SIZE		64
#define PKT_MAXBLR_SIZE		1520

/* The FEC buffer descriptors track the ring buffers.  The rx_bd_base and
 * tx_bd_base always point to the base of the buffer descriptors.  The
 * cur_rx and cur_tx point to the currently available buffer.
 * The dirty_tx tracks the current buffer that is being sent by the
 * controller.  The cur_tx and dirty_tx are equal under both completely
 * empty and completely full conditions.  The empty/ready indicator in
 * the buffer descriptor determines the actual condition.
 */
struct fec_enet_private {
	/* The saved address of a sent-in-place packet/buffer, for skfree(). */
	struct	sk_buff* tx_skbuff[TX_RING_SIZE];
	ushort	skb_cur;
	ushort	skb_dirty;

	/* CPM dual port RAM relative addresses.
	*/
	cbd_t	*rx_bd_base;		/* Address of Rx and Tx buffers. */
	cbd_t	*tx_bd_base;
	cbd_t	*cur_rx, *cur_tx;		/* The next free ring entry */
	cbd_t	*dirty_tx;	/* The ring entries to be free()ed. */
	scc_t	*sccp;
	struct	net_device_stats stats;
	uint	tx_full;
	spinlock_t lock;

#ifdef	CONFIG_USE_MDIO
	uint	phy_id;
	uint	phy_id_done;
	uint	phy_status;
	uint	phy_speed;
	phy_info_t	*phy;
	struct tq_struct phy_task;

	uint	sequence_done;

	uint	phy_addr;
#endif	/* CONFIG_USE_MDIO */

	int	link;
	int	old_link;
	int	full_duplex;

#ifdef CONFIG_FEC_PACKETHOOK
	unsigned long	ph_lock;
	fec_ph_func	*ph_rxhandler;
	fec_ph_func	*ph_txhandler;
	__u16		ph_proto;
	volatile __u32	*ph_regaddr;
	void 		*ph_priv;
#endif
};

static int fec_enet_open(struct net_device *dev);
static int fec_enet_start_xmit(struct sk_buff *skb, struct net_device *dev);
#ifdef	CONFIG_USE_MDIO
static void fec_enet_mii(struct net_device *dev);
#endif	/* CONFIG_USE_MDIO */
static void fec_enet_interrupt(int irq, void * dev_id, struct pt_regs * regs);
#ifdef CONFIG_FEC_PACKETHOOK
static void  fec_enet_tx(struct net_device *dev, __u32 regval);
static void  fec_enet_rx(struct net_device *dev, __u32 regval);
#else
static void  fec_enet_tx(struct net_device *dev);
static void  fec_enet_rx(struct net_device *dev);
#endif
static int fec_enet_close(struct net_device *dev);
static struct net_device_stats *fec_enet_get_stats(struct net_device *dev);
static void set_multicast_list(struct net_device *dev);
static void fec_restart(struct net_device *dev, int duplex);
static void fec_stop(struct net_device *dev);
static	ushort	my_enet_addr[3];

#ifdef	CONFIG_USE_MDIO
/* MII processing.  We keep this as simple as possible.  Requests are
 * placed on the list (if there is room).  When the request is finished
 * by the MII, an optional function may be called.
 */
typedef struct mii_list {
	uint	mii_regval;
	void	(*mii_func)(uint val, struct net_device *dev);
	struct	mii_list *mii_next;
} mii_list_t;

#define		NMII	20
mii_list_t	mii_cmds[NMII];
mii_list_t	*mii_free;
mii_list_t	*mii_head;
mii_list_t	*mii_tail;

static int	mii_queue(struct net_device *dev, int request,
				void (*func)(uint, struct net_device *));

/* Make MII read/write commands for the FEC.
*/
#define mk_mii_read(REG)	(0x60020000 | ((REG & 0x1f) << 18))
#define mk_mii_write(REG, VAL)	(0x50020000 | ((REG & 0x1f) << 18) | \
						(VAL & 0xffff))
#define mk_mii_end	0
#endif	/* CONFIG_USE_MDIO */

/* Transmitter timeout.
*/
#define TX_TIMEOUT (2*HZ)

#ifdef	CONFIG_USE_MDIO
/* Register definitions for the PHY.
*/

#define MII_REG_CR          0  /* Control Register                         */
#define MII_REG_SR          1  /* Status Register                          */
#define MII_REG_PHYIR1      2  /* PHY Identification Register 1            */
#define MII_REG_PHYIR2      3  /* PHY Identification Register 2            */
#define MII_REG_ANAR        4  /* A-N Advertisement Register               */
#define MII_REG_ANLPAR      5  /* A-N Link Partner Ability Register        */
#define MII_REG_ANER        6  /* A-N Expansion Register                   */
#define MII_REG_ANNPTR      7  /* A-N Next Page Transmit Register          */
#define MII_REG_ANLPRNPR    8  /* A-N Link Partner Received Next Page Reg. */

/* values for phy_status */

#define PHY_CONF_ANE	0x0001  /* 1 auto-negotiation enabled */
#define PHY_CONF_LOOP	0x0002  /* 1 loopback mode enabled */
#define PHY_CONF_SPMASK	0x00f0  /* mask for speed */
#define PHY_CONF_10HDX	0x0010  /* 10 Mbit half duplex supported */
#define PHY_CONF_10FDX	0x0020  /* 10 Mbit full duplex supported */
#define PHY_CONF_100HDX	0x0040  /* 100 Mbit half duplex supported */
#define PHY_CONF_100FDX	0x0080  /* 100 Mbit full duplex supported */

#define PHY_STAT_LINK	0x0100  /* 1 up - 0 down */
#define PHY_STAT_FAULT	0x0200  /* 1 remote fault */
#define PHY_STAT_ANC	0x0400  /* 1 auto-negotiation complete	*/
#define PHY_STAT_SPMASK	0xf000  /* mask for speed */
#define PHY_STAT_10HDX	0x1000  /* 10 Mbit half duplex selected	*/
#define PHY_STAT_10FDX	0x2000  /* 10 Mbit full duplex selected	*/
#define PHY_STAT_100HDX	0x4000  /* 100 Mbit half duplex selected */
#define PHY_STAT_100FDX	0x8000  /* 100 Mbit full duplex selected */
#endif	/* CONFIG_USE_MDIO */

#ifdef CONFIG_FEC_PACKETHOOK
int
fec_register_ph(struct net_device *dev, fec_ph_func *rxfun, fec_ph_func *txfun,
		__u16 proto, volatile __u32 *regaddr, void *priv)
{
	struct fec_enet_private *fep;
	int retval = 0;

	fep = dev->priv;

	if (test_and_set_bit(0, (void*)&fep->ph_lock) != 0) {
		/* Someone is messing with the packet hook */
		return -EAGAIN;
	}
	if (fep->ph_rxhandler != NULL || fep->ph_txhandler != NULL) {
		retval = -EBUSY;
		goto out;
	}
	fep->ph_rxhandler = rxfun;
	fep->ph_txhandler = txfun;
	fep->ph_proto = proto;
	fep->ph_regaddr = regaddr;
	fep->ph_priv = priv;

	out:
	fep->ph_lock = 0;

	return retval;
}


int
fec_unregister_ph(struct net_device *dev)
{
	struct fec_enet_private *fep;
	int retval = 0;

	fep = dev->priv;

	if (test_and_set_bit(0, (void*)&fep->ph_lock) != 0) {
		/* Someone is messing with the packet hook */
		return -EAGAIN;
	}

	fep->ph_rxhandler = fep->ph_txhandler = NULL;
	fep->ph_proto = 0;
	fep->ph_regaddr = NULL;
	fep->ph_priv = NULL;

	fep->ph_lock = 0;

	return retval;
}

EXPORT_SYMBOL(fec_register_ph);
EXPORT_SYMBOL(fec_unregister_ph);

#endif /* CONFIG_FEC_PACKETHOOK */

static int
fec_enet_start_xmit(struct sk_buff *skb, struct net_device *dev)
{
	struct fec_enet_private *fep;
	volatile fec_t	*fecp;
	volatile cbd_t	*bdp;

	fep = dev->priv;
	fecp = (volatile fec_t*)dev->base_addr;

	if (!fep->link) {
		/* Link is down or autonegotiation is in progress. */
		return 1;
	}

	/* Fill in a Tx ring entry */
	bdp = fep->cur_tx;

#ifndef final_version
	if (bdp->cbd_sc & BD_ENET_TX_READY) {
		/* Ooops.  All transmit buffers are full.  Bail out.
		 * This should not happen, since dev->tbusy should be set.
		 */
		printk("%s: tx queue full!.\n", dev->name);
		return 1;
	}
#endif

	/* Clear all of the status flags.
	 */
	bdp->cbd_sc &= ~BD_ENET_TX_STATS;

	/* Set buffer length and buffer pointer.
	*/
	bdp->cbd_bufaddr = __pa(skb->data);
	bdp->cbd_datlen = skb->len;

	/* Save skb pointer.
	*/
	fep->tx_skbuff[fep->skb_cur] = skb;

	fep->stats.tx_bytes += skb->len;
	fep->skb_cur = (fep->skb_cur+1) & TX_RING_MOD_MASK;

	/* Push the data cache so the CPM does not get stale memory
	 * data.
	 */
	flush_dcache_range((unsigned long)skb->data,
			   (unsigned long)skb->data + skb->len);

	spin_lock_irq(&fep->lock);

	/* Send it on its way.  Tell FEC its ready, interrupt when done,
	 * its the last BD of the frame, and to put the CRC on the end.
	 */

	bdp->cbd_sc |= (BD_ENET_TX_READY | BD_ENET_TX_INTR
			| BD_ENET_TX_LAST | BD_ENET_TX_TC);

	dev->trans_start = jiffies;

	/* Trigger transmission start */
	fecp->fec_x_des_active = 0x01000000;

	/* If this was the last BD in the ring, start at the beginning again.
	*/
	if (bdp->cbd_sc & BD_ENET_TX_WRAP) {
		bdp = fep->tx_bd_base;
	} else {
		bdp++;
	}

	if (bdp->cbd_sc & BD_ENET_TX_READY) {
		netif_stop_queue(dev);
		fep->tx_full = 1;
	}

	fep->cur_tx = (cbd_t *)bdp;

	spin_unlock_irq(&fep->lock);

	return 0;
}

static void
fec_timeout(struct net_device *dev)
{
	struct fec_enet_private *fep = dev->priv;

	printk("%s: transmit timed out.\n", dev->name);
	fep->stats.tx_errors++;
#ifndef final_version
	{
	int	i;
	cbd_t	*bdp;

	printk("Ring data dump: cur_tx %lx%s, dirty_tx %lx cur_rx: %lx\n",
	       (unsigned long)fep->cur_tx, fep->tx_full ? " (full)" : "",
	       (unsigned long)fep->dirty_tx,
	       (unsigned long)fep->cur_rx);

	bdp = fep->tx_bd_base;
	printk(" tx: %u buffers\n",  TX_RING_SIZE);
	for (i = 0 ; i < TX_RING_SIZE; i++) {
		printk("  %08x: %04x %04x %08x\n",
		       (uint) bdp,
		       bdp->cbd_sc,
		       bdp->cbd_datlen,
		       bdp->cbd_bufaddr);
		bdp++;
	}

	bdp = fep->rx_bd_base;
	printk(" rx: %lu buffers\n",  RX_RING_SIZE);
	for (i = 0 ; i < RX_RING_SIZE; i++) {
		printk("  %08x: %04x %04x %08x\n",
		       (uint) bdp,
		       bdp->cbd_sc,
		       bdp->cbd_datlen,
		       bdp->cbd_bufaddr);
		bdp++;
	}
	}
#endif
	if (!fep->tx_full)
		netif_wake_queue(dev);
}

/* The interrupt handler.
 * This is called from the MPC core interrupt.
 */
static	void
fec_enet_interrupt(int irq, void * dev_id, struct pt_regs * regs)
{
	struct	net_device *dev = dev_id;
	volatile fec_t	*fecp;
	uint	int_events;
#ifdef CONFIG_FEC_PACKETHOOK
	struct	fec_enet_private *fep = dev->priv;
	__u32 regval;

	if (fep->ph_regaddr) regval = *fep->ph_regaddr;
#endif
	fecp = (volatile fec_t*)dev->base_addr;

	/* Get the interrupt events that caused us to be here.
	*/
	while ((int_events = fecp->fec_ievent) != 0) {
		fecp->fec_ievent = int_events;
		if ((int_events & (FEC_ENET_HBERR | FEC_ENET_BABR |
				   FEC_ENET_BABT | FEC_ENET_EBERR)) != 0) {
			printk("FEC ERROR %x\n", int_events);
		}

		/* Handle receive event in its own function.
		 */
		if (int_events & FEC_ENET_RXF) {
#ifdef CONFIG_FEC_PACKETHOOK
			fec_enet_rx(dev, regval);
#else
			fec_enet_rx(dev);
#endif
		}

		/* Transmit OK, or non-fatal error. Update the buffer
		   descriptors. FEC handles all errors, we just discover
		   them as part of the transmit process.
		*/
		if (int_events & FEC_ENET_TXF) {
#ifdef CONFIG_FEC_PACKETHOOK
			fec_enet_tx(dev, regval);
#else
			fec_enet_tx(dev);
#endif
		}

		if (int_events & FEC_ENET_MII) {
#ifdef	CONFIG_USE_MDIO
			fec_enet_mii(dev);
#else
printk("%s[%d] %s: unexpected FEC_ENET_MII event\n", __FILE__,__LINE__,__FUNCTION__);
#endif	/* CONFIG_USE_MDIO */
		}

	}
}


static void
#ifdef CONFIG_FEC_PACKETHOOK
fec_enet_tx(struct net_device *dev, __u32 regval)
#else
fec_enet_tx(struct net_device *dev)
#endif
{
	struct	fec_enet_private *fep;
	volatile cbd_t	*bdp;
	struct	sk_buff	*skb;

	fep = dev->priv;
	spin_lock(&fep->lock);
	bdp = fep->dirty_tx;

	while ((bdp->cbd_sc&BD_ENET_TX_READY) == 0) {
		if (bdp == fep->cur_tx && fep->tx_full == 0) break;

		skb = fep->tx_skbuff[fep->skb_dirty];
		/* Check for errors. */
		if (bdp->cbd_sc & (BD_ENET_TX_HB | BD_ENET_TX_LC |
				   BD_ENET_TX_RL | BD_ENET_TX_UN |
				   BD_ENET_TX_CSL)) {
			fep->stats.tx_errors++;
			if (bdp->cbd_sc & BD_ENET_TX_HB)  /* No heartbeat */
				fep->stats.tx_heartbeat_errors++;
			if (bdp->cbd_sc & BD_ENET_TX_LC)  /* Late collision */
				fep->stats.tx_window_errors++;
			if (bdp->cbd_sc & BD_ENET_TX_RL)  /* Retrans limit */
				fep->stats.tx_aborted_errors++;
			if (bdp->cbd_sc & BD_ENET_TX_UN)  /* Underrun */
				fep->stats.tx_fifo_errors++;
			if (bdp->cbd_sc & BD_ENET_TX_CSL) /* Carrier lost */
				fep->stats.tx_carrier_errors++;
		} else {
#ifdef CONFIG_FEC_PACKETHOOK
			/* Packet hook ... */
			if (fep->ph_txhandler &&
			    ((struct ethhdr *)skb->data)->h_proto
			    == fep->ph_proto) {
				fep->ph_txhandler((__u8*)skb->data, skb->len,
						  regval, fep->ph_priv);
			}
#endif
			fep->stats.tx_packets++;
		}

#ifndef final_version
		if (bdp->cbd_sc & BD_ENET_TX_READY)
			printk("HEY! Enet xmit interrupt and TX_READY.\n");
#endif
		/* Deferred means some collisions occurred during transmit,
		 * but we eventually sent the packet OK.
		 */
		if (bdp->cbd_sc & BD_ENET_TX_DEF)
			fep->stats.collisions++;

		/* Free the sk buffer associated with this last transmit.
		 */
#if 0
printk("TXI: %x %x %x\n", bdp, skb, fep->skb_dirty);
#endif
		dev_kfree_skb_irq (skb/*, FREE_WRITE*/);
		fep->tx_skbuff[fep->skb_dirty] = NULL;
		fep->skb_dirty = (fep->skb_dirty + 1) & TX_RING_MOD_MASK;

		/* Update pointer to next buffer descriptor to be transmitted.
		 */
		if (bdp->cbd_sc & BD_ENET_TX_WRAP)
			bdp = fep->tx_bd_base;
		else
			bdp++;

		/* Since we have freed up a buffer, the ring is no longer
		 * full.
		 */
		if (fep->tx_full) {
			fep->tx_full = 0;
			if (netif_queue_stopped(dev))
				netif_wake_queue(dev);
		}
#ifdef CONFIG_FEC_PACKETHOOK
		/* Re-read register. Not exactly guaranteed to be correct,
		   but... */
		if (fep->ph_regaddr) regval = *fep->ph_regaddr;
#endif
	}
	fep->dirty_tx = (cbd_t *)bdp;
	spin_unlock(&fep->lock);
}


/* During a receive, the cur_rx points to the current incoming buffer.
 * When we update through the ring, if the next incoming buffer has
 * not been given to the system, we just set the empty indicator,
 * effectively tossing the packet.
 */
static void
#ifdef CONFIG_FEC_PACKETHOOK
fec_enet_rx(struct net_device *dev, __u32 regval)
#else
fec_enet_rx(struct net_device *dev)
#endif
{
	struct	fec_enet_private *fep;
	volatile fec_t	*fecp;
	volatile cbd_t *bdp;
	struct	sk_buff	*skb;
	ushort	pkt_len;
	__u8 *data;

	fep = dev->priv;
	fecp = (volatile fec_t*)dev->base_addr;

	/* First, grab all of the stats for the incoming packet.
	 * These get messed up if we get called due to a busy condition.
	 */
	bdp = fep->cur_rx;

while (!(bdp->cbd_sc & BD_ENET_RX_EMPTY)) {

#ifndef final_version
	/* Since we have allocated space to hold a complete frame,
	 * the last indicator should be set.
	 */
	if ((bdp->cbd_sc & BD_ENET_RX_LAST) == 0)
		printk("FEC ENET: rcv is not +last\n");
#endif

	/* Check for errors. */
	if (bdp->cbd_sc & (BD_ENET_RX_LG | BD_ENET_RX_SH | BD_ENET_RX_NO |
			   BD_ENET_RX_CR | BD_ENET_RX_OV)) {
		fep->stats.rx_errors++;
		if (bdp->cbd_sc & (BD_ENET_RX_LG | BD_ENET_RX_SH)) {
		/* Frame too long or too short. */
			fep->stats.rx_length_errors++;
		}
		if (bdp->cbd_sc & BD_ENET_RX_NO)	/* Frame alignment */
			fep->stats.rx_frame_errors++;
		if (bdp->cbd_sc & BD_ENET_RX_CR)	/* CRC Error */
			fep->stats.rx_crc_errors++;
		if (bdp->cbd_sc & BD_ENET_RX_OV)	/* FIFO overrun */
			fep->stats.rx_crc_errors++;
	}

	/* Report late collisions as a frame error.
	 * On this error, the BD is closed, but we don't know what we
	 * have in the buffer.  So, just drop this frame on the floor.
	 */
	if (bdp->cbd_sc & BD_ENET_RX_CL) {
		fep->stats.rx_errors++;
		fep->stats.rx_frame_errors++;
		goto rx_processing_done;
	}

	/* Process the incoming frame.
	 */
	fep->stats.rx_packets++;
	pkt_len = bdp->cbd_datlen;
	fep->stats.rx_bytes += pkt_len;
	data = (__u8*)__va(bdp->cbd_bufaddr);

#ifdef CONFIG_FEC_PACKETHOOK
	/* Packet hook ... */
	if (fep->ph_rxhandler) {
		if (((struct ethhdr *)data)->h_proto == fep->ph_proto) {
			switch (fep->ph_rxhandler(data, pkt_len, regval,
						  fep->ph_priv)) {
			case 1:
				goto rx_processing_done;
				break;
			case 0:
				break;
			default:
				fep->stats.rx_errors++;
				goto rx_processing_done;
			}
		}
	}

	/* If it wasn't filtered - copy it to an sk buffer. */
#endif

	/* This does 16 byte alignment, exactly what we need.
	 * The packet length includes FCS, but we don't want to
	 * include that when passing upstream as it messes up
	 * bridging applications.
	 */
	skb = dev_alloc_skb(pkt_len-4);

	if (skb == NULL) {
		printk("%s: Memory squeeze, dropping packet.\n", dev->name);
		fep->stats.rx_dropped++;
	} else {
		skb->dev = dev;
		skb_put(skb,pkt_len-4);	/* Make room */
		eth_copy_and_sum(skb,
				 (unsigned char *)__va(bdp->cbd_bufaddr),
				 pkt_len-4, 0);
		skb->protocol=eth_type_trans(skb,dev);
		netif_rx(skb);
	}
  rx_processing_done:

	/* Clear the status flags for this buffer.
	*/
	bdp->cbd_sc &= ~BD_ENET_RX_STATS;

	/* Mark the buffer empty.
	*/
	bdp->cbd_sc |= BD_ENET_RX_EMPTY;

	/* Update BD pointer to next entry.
	*/
	if (bdp->cbd_sc & BD_ENET_RX_WRAP)
		bdp = fep->rx_bd_base;
	else
		bdp++;

#if 1
	/* Doing this here will keep the FEC running while we process
	 * incoming frames.  On a heavily loaded network, we should be
	 * able to keep up at the expense of system resources.
	 */
	fecp->fec_r_des_active = 0x01000000;
#endif
#ifdef CONFIG_FEC_PACKETHOOK
	/* Re-read register. Not exactly guaranteed to be correct,
	   but... */
	if (fep->ph_regaddr) regval = *fep->ph_regaddr;
#endif
   } /* while (!(bdp->cbd_sc & BD_ENET_RX_EMPTY)) */
	fep->cur_rx = (cbd_t *)bdp;

#if 0
	/* Doing this here will allow us to process all frames in the
	 * ring before the FEC is allowed to put more there.  On a heavily
	 * loaded network, some frames may be lost.  Unfortunately, this
	 * increases the interrupt overhead since we can potentially work
	 * our way back to the interrupt return only to come right back
	 * here.
	 */
	fecp->fec_r_des_active = 0x01000000;
#endif
}


#ifdef	CONFIG_USE_MDIO
static void
fec_enet_mii(struct net_device *dev)
{
	struct	fec_enet_private *fep;
	volatile fec_t	*ep;
	mii_list_t	*mip;
	uint		mii_reg;

	fep = (struct fec_enet_private *)dev->priv;
	ep = &(((immap_t *)IMAP_ADDR)->im_cpm.cp_fec);
	mii_reg = ep->fec_mii_data;

	if ((mip = mii_head) == NULL) {
		printk("MII and no head!\n");
		return;
	}

	if (mip->mii_func != NULL)
		(*(mip->mii_func))(mii_reg, dev);

	mii_head = mip->mii_next;
	mip->mii_next = mii_free;
	mii_free = mip;

	if ((mip = mii_head) != NULL) {
		ep->fec_mii_data = mip->mii_regval;
	}
}

static int
mii_queue(struct net_device *dev, int regval, void (*func)(uint, struct net_device *))
{
	struct fec_enet_private *fep;
	unsigned long	flags;
	mii_list_t	*mip;
	int		retval;

	/* Add PHY address to register command.
	*/
	fep = dev->priv;
	regval |= fep->phy_addr << 23;

	retval = 0;

	save_flags(flags);
	cli();

	if ((mip = mii_free) != NULL) {
		mii_free = mip->mii_next;
		mip->mii_regval = regval;
		mip->mii_func = func;
		mip->mii_next = NULL;
		if (mii_head) {
			mii_tail->mii_next = mip;
			mii_tail = mip;
		} else {
			mii_head = mii_tail = mip;
			(&(((immap_t *)IMAP_ADDR)->im_cpm.cp_fec))->fec_mii_data = regval;
		}
	} else {
		retval = 1;
	}

	restore_flags(flags);

	return(retval);
}

static void mii_do_cmd(struct net_device *dev, const phy_cmd_t *c)
{
	int k;

	if(!c)
		return;

	for(k = 0; (c+k)->mii_data != mk_mii_end; k++)
		mii_queue(dev, (c+k)->mii_data, (c+k)->funct);
}

static void mii_parse_sr(uint mii_reg, struct net_device *dev)
{
	struct fec_enet_private *fep = dev->priv;
	volatile uint *s = &(fep->phy_status);

	*s &= ~(PHY_STAT_LINK | PHY_STAT_FAULT | PHY_STAT_ANC);

	if (mii_reg & 0x0004)
		*s |= PHY_STAT_LINK;
	if (mii_reg & 0x0010)
		*s |= PHY_STAT_FAULT;
	if (mii_reg & 0x0020)
		*s |= PHY_STAT_ANC;

	fep->link = (*s & PHY_STAT_LINK) ? 1 : 0;
}

static void mii_parse_cr(uint mii_reg, struct net_device *dev)
{
	struct fec_enet_private *fep = dev->priv;
	volatile uint *s = &(fep->phy_status);

	*s &= ~(PHY_CONF_ANE | PHY_CONF_LOOP);

	if (mii_reg & 0x1000)
		*s |= PHY_CONF_ANE;
	if (mii_reg & 0x4000)
		*s |= PHY_CONF_LOOP;
}

static void mii_parse_anar(uint mii_reg, struct net_device *dev)
{
	struct fec_enet_private *fep = dev->priv;
	volatile uint *s = &(fep->phy_status);

	*s &= ~(PHY_CONF_SPMASK);

	if (mii_reg & 0x0020)
		*s |= PHY_CONF_10HDX;
	if (mii_reg & 0x0040)
		*s |= PHY_CONF_10FDX;
	if (mii_reg & 0x0080)
		*s |= PHY_CONF_100HDX;
	if (mii_reg & 0x00100)
		*s |= PHY_CONF_100FDX;
}
#if 0
static void mii_disp_reg(uint mii_reg, struct net_device *dev)
{
	printk("reg %u = 0x%04x\n", (mii_reg >> 18) & 0x1f, mii_reg & 0xffff);
}
#endif

/* ------------------------------------------------------------------------- */
/* The Level one LXT970 is used by many boards				     */

#ifdef CONFIG_FEC_LXT970

#define MII_LXT970_MIRROR    16  /* Mirror register           */
#define MII_LXT970_IER       17  /* Interrupt Enable Register */
#define MII_LXT970_ISR       18  /* Interrupt Status Register */
#define MII_LXT970_CONFIG    19  /* Configuration Register    */
#define MII_LXT970_CSR       20  /* Chip Status Register      */

static void mii_parse_lxt970_csr(uint mii_reg, struct net_device *dev)
{
	struct fec_enet_private *fep = dev->priv;
	volatile uint *s = &(fep->phy_status);

	*s &= ~(PHY_STAT_SPMASK);

	if (mii_reg & 0x0800) {
		if (mii_reg & 0x1000)
			*s |= PHY_STAT_100FDX;
		else
			*s |= PHY_STAT_100HDX;
	}
	else {
		if (mii_reg & 0x1000)
			*s |= PHY_STAT_10FDX;
		else
			*s |= PHY_STAT_10HDX;
	}
}

static phy_info_t phy_info_lxt970 = {
	0x07810000,
	"LXT970",

	(const phy_cmd_t []) {  /* config */
#if 0
//		{ mk_mii_write(MII_REG_ANAR, 0x0021), NULL },

		/* Set default operation of 100-TX....for some reason
		 * some of these bits are set on power up, which is wrong.
		 */
		{ mk_mii_write(MII_LXT970_CONFIG, 0), NULL },
#endif
		{ mk_mii_read(MII_REG_CR), mii_parse_cr },
		{ mk_mii_read(MII_REG_ANAR), mii_parse_anar },
		{ mk_mii_end, }
	},
	(const phy_cmd_t []) {  /* startup - enable interrupts */
		{ mk_mii_write(MII_LXT970_IER, 0x0002), NULL },
		{ mk_mii_write(MII_REG_CR, 0x1200), NULL }, /* autonegotiate */
		{ mk_mii_end, }
	},
	(const phy_cmd_t []) { /* ack_int */
		/* read SR and ISR to acknowledge */

		{ mk_mii_read(MII_REG_SR), mii_parse_sr },
		{ mk_mii_read(MII_LXT970_ISR), NULL },

		/* find out the current status */

		{ mk_mii_read(MII_LXT970_CSR), mii_parse_lxt970_csr },
		{ mk_mii_end, }
	},
	(const phy_cmd_t []) {  /* shutdown - disable interrupts */
		{ mk_mii_write(MII_LXT970_IER, 0x0000), NULL },
		{ mk_mii_end, }
	},
};

#endif /* CONFIG_FEC_LXT970 */

/* ------------------------------------------------------------------------- */
/* The Level one LXT971 is used on some of my custom boards                  */

#ifdef CONFIG_FEC_LXT971

/* register definitions for the 971 */

#define MII_LXT971_PCR       16  /* Port Control Register     */
#define MII_LXT971_SR2       17  /* Status Register 2         */
#define MII_LXT971_IER       18  /* Interrupt Enable Register */
#define MII_LXT971_ISR       19  /* Interrupt Status Register */
#define MII_LXT971_LCR       20  /* LED Control Register      */
#define MII_LXT971_TCR       30  /* Transmit Control Register */

/*
 * I had some nice ideas of running the MDIO faster...
 * The 971 should support 8MHz and I tried it, but things acted really
 * weird, so 2.5 MHz ought to be enough for anyone...
 */

static void mii_parse_lxt971_sr2(uint mii_reg, struct net_device *dev)
{
	struct fec_enet_private *fep = dev->priv;
	volatile uint *s = &(fep->phy_status);

	*s &= ~(PHY_STAT_SPMASK);

	if (mii_reg & 0x4000) {
		if (mii_reg & 0x0200)
			*s |= PHY_STAT_100FDX;
		else
			*s |= PHY_STAT_100HDX;
	}
	else {
		if (mii_reg & 0x0200)
			*s |= PHY_STAT_10FDX;
		else
			*s |= PHY_STAT_10HDX;
	}
	if (mii_reg & 0x0008)
		*s |= PHY_STAT_FAULT;
}

static phy_info_t phy_info_lxt971 = {
	0x0001378e,
	"LXT971",

	(const phy_cmd_t []) {  /* config */
//		{ mk_mii_write(MII_REG_ANAR, 0x021), NULL }, /* 10  Mbps, HD */
		{ mk_mii_read(MII_REG_CR), mii_parse_cr },
		{ mk_mii_read(MII_REG_ANAR), mii_parse_anar },
		{ mk_mii_end, }
	},
	(const phy_cmd_t []) {  /* startup - enable interrupts */
		{ mk_mii_write(MII_LXT971_IER, 0x00f2), NULL },
		{ mk_mii_write(MII_REG_CR, 0x1200), NULL }, /* autonegotiate */

		/* Somehow does the 971 tell me that the link is down
		 * the first read after power-up.
		 * read here to get a valid value in ack_int */

		{ mk_mii_read(MII_REG_SR), mii_parse_sr },
		{ mk_mii_end, }
	},
	(const phy_cmd_t []) { /* ack_int */
		/* find out the current status */

		{ mk_mii_read(MII_REG_SR), mii_parse_sr },
		{ mk_mii_read(MII_LXT971_SR2), mii_parse_lxt971_sr2 },

		/* we only need to read ISR to acknowledge */

		{ mk_mii_read(MII_LXT971_ISR), NULL },
		{ mk_mii_end, }
	},
	(const phy_cmd_t []) {  /* shutdown - disable interrupts */
		{ mk_mii_write(MII_LXT971_IER, 0x0000), NULL },
		{ mk_mii_end, }
	},
};

#endif /* CONFIG_FEC_LXT970 */


/* ------------------------------------------------------------------------- */
/* The Quality Semiconductor QS6612 is used on the RPX CLLF                  */

#ifdef CONFIG_FEC_QS6612

/* register definitions */

#define MII_QS6612_MCR       17  /* Mode Control Register      */
#define MII_QS6612_FTR       27  /* Factory Test Register      */
#define MII_QS6612_MCO       28  /* Misc. Control Register     */
#define MII_QS6612_ISR       29  /* Interrupt Source Register  */
#define MII_QS6612_IMR       30  /* Interrupt Mask Register    */
#define MII_QS6612_PCR       31  /* 100BaseTx PHY Control Reg. */

static void mii_parse_qs6612_pcr(uint mii_reg, struct net_device *dev)
{
	struct fec_enet_private *fep = dev->priv;
	volatile uint *s = &(fep->phy_status);

	*s &= ~(PHY_STAT_SPMASK);

	switch((mii_reg >> 2) & 7) {
	case 1: *s |= PHY_STAT_10HDX; break;
	case 2: *s |= PHY_STAT_100HDX; break;
	case 5: *s |= PHY_STAT_10FDX; break;
	case 6: *s |= PHY_STAT_100FDX; break;
	}
}

static phy_info_t phy_info_qs6612 = {
	0x00181440,
	"QS6612",

	(const phy_cmd_t []) {  /* config */
//	{ mk_mii_write(MII_REG_ANAR, 0x061), NULL }, /* 10  Mbps */

		/* The PHY powers up isolated on the RPX,
		 * so send a command to allow operation.
		 */

		{ mk_mii_write(MII_QS6612_PCR, 0x0dc0), NULL },

		/* parse cr and anar to get some info */

		{ mk_mii_read(MII_REG_CR), mii_parse_cr },
		{ mk_mii_read(MII_REG_ANAR), mii_parse_anar },
		{ mk_mii_end, }
	},
	(const phy_cmd_t []) {  /* startup - enable interrupts */
		{ mk_mii_write(MII_QS6612_IMR, 0x003a), NULL },
		{ mk_mii_write(MII_REG_CR, 0x1200), NULL }, /* autonegotiate */
		{ mk_mii_end, }
	},
	(const phy_cmd_t []) { /* ack_int */

		/* we need to read ISR, SR and ANER to acknowledge */

		{ mk_mii_read(MII_QS6612_ISR), NULL },
		{ mk_mii_read(MII_REG_SR), mii_parse_sr },
		{ mk_mii_read(MII_REG_ANER), NULL },

		/* read pcr to get info */

		{ mk_mii_read(MII_QS6612_PCR), mii_parse_qs6612_pcr },
		{ mk_mii_end, }
	},
	(const phy_cmd_t []) {  /* shutdown - disable interrupts */
		{ mk_mii_write(MII_QS6612_IMR, 0x0000), NULL },
		{ mk_mii_end, }
	},
};


#endif /* CONFIG_FEC_QS6612 */


static phy_info_t *phy_info[] = {

#ifdef CONFIG_FEC_LXT970
	&phy_info_lxt970,
#endif /* CONFIG_FEC_LXT970 */

#ifdef CONFIG_FEC_LXT971
	&phy_info_lxt971,
#endif /* CONFIG_FEC_LXT971 */

#ifdef CONFIG_FEC_QS6612
	&phy_info_qs6612,
#endif /* CONFIG_FEC_LXT971 */

	NULL
};

static void mii_display_status(struct net_device *dev)
{
	struct fec_enet_private *fep = dev->priv;
	volatile uint *s = &(fep->phy_status);

	if (!fep->link && !fep->old_link) {
		/* Link is still down - don't print anything */
		return;
	}

	printk("%s: status: ", dev->name);

	if (!fep->link) {
		printk("link down");
	} else {
		printk("link up");

		switch(*s & PHY_STAT_SPMASK) {
		case PHY_STAT_100FDX: printk(", 100 Mbps Full Duplex"); break;
		case PHY_STAT_100HDX: printk(", 100 Mbps Half Duplex"); break;
		case PHY_STAT_10FDX: printk(", 10 Mbps Full Duplex"); break;
		case PHY_STAT_10HDX: printk(", 10 Mbps Half Duplex"); break;
		default:
			printk(", Unknown speed/duplex");
		}

		if (*s & PHY_STAT_ANC)
			printk(", auto-negotiation complete");
	}

	if (*s & PHY_STAT_FAULT)
		printk(", remote fault");

	printk(".\n");
}

static void mii_display_config(struct net_device *dev)
{
	struct fec_enet_private *fep = dev->priv;
	volatile uint *s = &(fep->phy_status);

	printk("%s: config: auto-negotiation ", dev->name);

	if (*s & PHY_CONF_ANE)
		printk("on");
	else
		printk("off");

	if (*s & PHY_CONF_100FDX)
		printk(", 100FDX");
	if (*s & PHY_CONF_100HDX)
		printk(", 100HDX");
	if (*s & PHY_CONF_10FDX)
		printk(", 10FDX");
	if (*s & PHY_CONF_10HDX)
		printk(", 10HDX");
	if (!(*s & PHY_CONF_SPMASK))
		printk(", No speed/duplex selected?");

	if (*s & PHY_CONF_LOOP)
		printk(", loopback enabled");

	printk(".\n");

	fep->sequence_done = 1;
}

static void mii_relink(struct net_device *dev)
{
	struct fec_enet_private *fep = dev->priv;
	int duplex;

	fep->link = (fep->phy_status & PHY_STAT_LINK) ? 1 : 0;
	mii_display_status(dev);
	fep->old_link = fep->link;

	if (fep->link) {
		duplex = 0;
		if (fep->phy_status
		    & (PHY_STAT_100FDX | PHY_STAT_10FDX))
			duplex = 1;
		fec_restart(dev, duplex);
	}
	else
		fec_stop(dev);

#if 0
	enable_irq(fep->mii_irq);
#endif

}

static void mii_queue_relink(uint mii_reg, struct net_device *dev)
{
	struct fec_enet_private *fep = dev->priv;

	fep->phy_task.routine = (void *)mii_relink;
	fep->phy_task.data = dev;
	schedule_task(&fep->phy_task);
}

static void mii_queue_config(uint mii_reg, struct net_device *dev)
{
	struct fec_enet_private *fep = dev->priv;

	fep->phy_task.routine = (void *)mii_display_config;
	fep->phy_task.data = dev;
	schedule_task(&fep->phy_task);
}



phy_cmd_t phy_cmd_relink[] = { { mk_mii_read(MII_REG_CR), mii_queue_relink },
			       { mk_mii_end, } };
phy_cmd_t phy_cmd_config[] = { { mk_mii_read(MII_REG_CR), mii_queue_config },
			       { mk_mii_end, } };



/* Read remainder of PHY ID.
*/
static void
mii_discover_phy3(uint mii_reg, struct net_device *dev)
{
	struct fec_enet_private *fep;
	int	i;

	fep = dev->priv;
	fep->phy_id |= (mii_reg & 0xffff);

	for(i = 0; phy_info[i]; i++)
		if(phy_info[i]->id == (fep->phy_id >> 4))
			break;

	if(!phy_info[i])
		panic("%s: PHY id 0x%08x is not supported!\n",
		      dev->name, fep->phy_id);

	fep->phy = phy_info[i];
	fep->phy_id_done = 1;

	printk("%s: Phy @ 0x%x, type %s (0x%08x)\n",
		dev->name, fep->phy_addr, fep->phy->name, fep->phy_id);
}

/* Scan all of the MII PHY addresses looking for someone to respond
 * with a valid ID.  This usually happens quickly.
 */
static void
mii_discover_phy(uint mii_reg, struct net_device *dev)
{
	struct fec_enet_private *fep;
	uint	phytype;

	fep = dev->priv;

	if ((phytype = (mii_reg & 0xffff)) != 0xffff) {

		/* Got first part of ID, now get remainder.
		*/
		fep->phy_id = phytype << 16;
		mii_queue(dev, mk_mii_read(MII_REG_PHYIR2), mii_discover_phy3);
	} else {
		fep->phy_addr++;
		if (fep->phy_addr < 32) {
			mii_queue(dev, mk_mii_read(MII_REG_PHYIR1),
							mii_discover_phy);
		} else {
			printk("fec: No PHY device found.\n");
		}
	}
}
#endif	/* CONFIG_USE_MDIO */

/* This interrupt occurs when the PHY detects a link change.
*/
static void
#ifdef CONFIG_RPXCLASSIC
mii_link_interrupt(void *dev_id)
#else
mii_link_interrupt(int irq, void * dev_id, struct pt_regs * regs)
#endif
{
#ifdef	CONFIG_USE_MDIO
	struct	net_device *dev = dev_id;
	struct fec_enet_private *fep = dev->priv;
	volatile immap_t *immap = (immap_t *)IMAP_ADDR;
	volatile fec_t *fecp = &(immap->im_cpm.cp_fec);
	unsigned int ecntrl = fecp->fec_ecntrl;

	/* We need the FEC enabled to access the MII
	*/
	if ((ecntrl & FEC_ECNTRL_ETHER_EN) == 0) {
		fecp->fec_ecntrl |= FEC_ECNTRL_ETHER_EN;
	}
#endif	/* CONFIG_USE_MDIO */

#if 0
	disable_irq(fep->mii_irq);  /* disable now, enable later */
#endif


#ifdef	CONFIG_USE_MDIO
	mii_do_cmd(dev, fep->phy->ack_int);
	mii_do_cmd(dev, phy_cmd_relink);  /* restart and display status */

	if ((ecntrl & FEC_ECNTRL_ETHER_EN) == 0) {
		fecp->fec_ecntrl = ecntrl;	/* restore old settings */
	}
#else
printk("%s[%d] %s: unexpected Link interrupt\n", __FILE__,__LINE__,__FUNCTION__);
#endif	/* CONFIG_USE_MDIO */

}

static int
fec_enet_open(struct net_device *dev)
{
	struct fec_enet_private *fep = dev->priv;

	/* I should reset the ring buffers here, but I don't yet know
	 * a simple way to do that.
	 */

#ifdef	CONFIG_USE_MDIO
	fep->sequence_done = 0;
	fep->link = 0;

	if (fep->phy) {
		mii_do_cmd(dev, fep->phy->ack_int);
		mii_do_cmd(dev, fep->phy->config);
		mii_do_cmd(dev, phy_cmd_config);  /* display configuration */
		while(!fep->sequence_done)
			schedule();

		mii_do_cmd(dev, fep->phy->startup);
		netif_start_queue(dev);
		return 0;		/* Success */
	}
	return -ENODEV;		/* No PHY we understand */
#else
	fep->link = 1;
	netif_start_queue(dev);
	return 0;	/* Success */
#endif	/* CONFIG_USE_MDIO */

}

static int
fec_enet_close(struct net_device *dev)
{
	/* Don't know what to do yet.
	*/
	netif_stop_queue(dev);
	fec_stop(dev);

	return 0;
}

static struct net_device_stats *fec_enet_get_stats(struct net_device *dev)
{
	struct fec_enet_private *fep = (struct fec_enet_private *)dev->priv;

	return &fep->stats;
}

/* Set or clear the multicast filter for this adaptor.
 * Skeleton taken from sunlance driver.
 * The CPM Ethernet implementation allows Multicast as well as individual
 * MAC address filtering.  Some of the drivers check to make sure it is
 * a group multicast address, and discard those that are not.  I guess I
 * will do the same for now, but just remove the test if you want
 * individual filtering as well (do the upper net layers want or support
 * this kind of feature?).
 */

static void set_multicast_list(struct net_device *dev)
{
	struct	fec_enet_private *fep;
	volatile fec_t *ep;

	fep = (struct fec_enet_private *)dev->priv;
	ep = &(((immap_t *)IMAP_ADDR)->im_cpm.cp_fec);

	if (dev->flags&IFF_PROMISC) {

		/* Log any net taps. */
		printk("%s: Promiscuous mode enabled.\n", dev->name);
		ep->fec_r_cntrl |= FEC_RCNTRL_PROM;
	} else {

		ep->fec_r_cntrl &= ~FEC_RCNTRL_PROM;

		if (dev->flags & IFF_ALLMULTI) {
			/* Catch all multicast addresses, so set the
			 * filter to all 1's.
			 */
			ep->fec_hash_table_high = 0xffffffff;
			ep->fec_hash_table_low = 0xffffffff;
		}
#if 0
		else {
			/* Clear filter and add the addresses in the list.
			*/
			ep->sen_gaddr1 = 0;
			ep->sen_gaddr2 = 0;
			ep->sen_gaddr3 = 0;
			ep->sen_gaddr4 = 0;

			dmi = dev->mc_list;

			for (i=0; i<dev->mc_count; i++) {

				/* Only support group multicast for now.
				*/
				if (!(dmi->dmi_addr[0] & 1))
					continue;

				/* The address in dmi_addr is LSB first,
				 * and taddr is MSB first.  We have to
				 * copy bytes MSB first from dmi_addr.
				 */
				mcptr = (u_char *)dmi->dmi_addr + 5;
				tdptr = (u_char *)&ep->sen_taddrh;
				for (j=0; j<6; j++)
					*tdptr++ = *mcptr--;

				/* Ask CPM to run CRC and set bit in
				 * filter mask.
				 */
				cpmp->cp_cpcr = mk_cr_cmd(CPM_CR_CH_SCC1, CPM_CR_SET_GADDR) | CPM_CR_FLG;
				/* this delay is necessary here -- Cort */
				udelay(10);
				while (cpmp->cp_cpcr & CPM_CR_FLG);
			}
		}
#endif
	}
}

/* Initialize the FEC Ethernet on 860T.
 */
int __init fec_enet_init(void)
{
	struct net_device *dev;
	struct fec_enet_private *fep;
	int i, j;
	unsigned char	*eap, *iap;
	unsigned long	mem_addr;
	pte_t		*pte;
	volatile	cbd_t	*bdp;
	cbd_t		*cbd_base;
	volatile	immap_t	*immap;
	volatile	fec_t	*fecp;
	bd_t		*bd;
#ifdef CONFIG_SCC_ENET
	unsigned char	tmpaddr[6];
#endif

	immap = (immap_t *)IMAP_ADDR;	/* pointer to internal registers */

	bd = (bd_t *)__res;

	/* Allocate some private information.
	*/
	fep = (struct fec_enet_private *)kmalloc(sizeof(*fep), GFP_KERNEL);
	if (fep == NULL)
		return -ENOMEM;

	__clear_user(fep,sizeof(*fep));

	/* Create an Ethernet device instance.
	*/
	dev = init_etherdev(0, 0);

	fecp = &(immap->im_cpm.cp_fec);

	/* Whack a reset.  We should wait for this.
	*/
	fecp->fec_ecntrl = FEC_ECNTRL_PINMUX | FEC_ECNTRL_RESET;
	for (i = 0;
	     (fecp->fec_ecntrl & FEC_ECNTRL_RESET) && (i < FEC_RESET_DELAY);
	     ++i) {
		udelay(1);
	}
	if (i == FEC_RESET_DELAY) {
		printk ("FEC Reset timeout!\n");
	}

	/* Set the Ethernet address.  If using multiple Enets on the 8xx,
	 * this needs some work to get unique addresses.
	 */
	eap = (unsigned char *)my_enet_addr;
	iap = bd->bi_enetaddr;

#ifdef CONFIG_SCC_ENET
	/*
         * If a board has Ethernet configured both on a SCC and the
         * FEC, it needs (at least) 2 MAC addresses (we know that Sun
         * disagrees, but anyway). For the FEC port, we create
         * another address by setting one of the address bits above
         * something that would have (up to now) been allocated.
	 */
	for (i=0; i<6; i++)
		tmpaddr[i] = *iap++;
	tmpaddr[3] |= 0x80;
	iap = tmpaddr;
#endif

	for (i=0; i<6; i++) {
		dev->dev_addr[i] = *eap++ = *iap++;
	}

	/* Allocate memory for buffer descriptors.
	*/
	if (((RX_RING_SIZE + TX_RING_SIZE) * sizeof(cbd_t)) > PAGE_SIZE) {
		printk("FEC init error.  Need more space.\n");
		printk("FEC initialization failed.\n");
		return 1;
	}
	mem_addr = __get_free_page(GFP_KERNEL);
	cbd_base = (cbd_t *)mem_addr;

	/* Make it uncached.
	*/
	pte = va_to_pte(mem_addr);
	pte_val(*pte) |= _PAGE_NO_CACHE;
	flush_tlb_page(init_mm.mmap, mem_addr);

	/* Set receive and transmit descriptor base.
	*/
	fep->rx_bd_base = cbd_base;
	fep->tx_bd_base = cbd_base + RX_RING_SIZE;

	fep->skb_cur = fep->skb_dirty = 0;

	/* Initialize the receive buffer descriptors.
	*/
	bdp = fep->rx_bd_base;
	for (i=0; i<FEC_ENET_RX_PAGES; i++) {

		/* Allocate a page.
		*/
		mem_addr = __get_free_page(GFP_KERNEL);

		/* Make it uncached.
		*/
		pte = va_to_pte(mem_addr);
		pte_val(*pte) |= _PAGE_NO_CACHE;
		flush_tlb_page(init_mm.mmap, mem_addr);

		/* Initialize the BD for every fragment in the page.
		*/
		for (j=0; j<FEC_ENET_RX_FRPPG; j++) {
			bdp->cbd_sc = BD_ENET_RX_EMPTY;
			bdp->cbd_bufaddr = __pa(mem_addr);
			mem_addr += FEC_ENET_RX_FRSIZE;
			bdp++;
		}
	}

	/* Set the last buffer to wrap.
	*/
	bdp--;
	bdp->cbd_sc |= BD_SC_WRAP;

#ifdef CONFIG_FEC_PACKETHOOK
	fep->ph_lock = 0;
	fep->ph_rxhandler = fep->ph_txhandler = NULL;
	fep->ph_proto = 0;
	fep->ph_regaddr = NULL;
	fep->ph_priv = NULL;
#endif

	/* Install our interrupt handler.
	*/
	if (request_8xxirq(FEC_INTERRUPT, fec_enet_interrupt, 0, "fec", dev) != 0)
		panic("Could not allocate FEC IRQ!");

#ifdef CONFIG_RPXCLASSIC
	/* Make Port C, bit 15 an input that causes interrupts.
	*/
	immap->im_ioport.iop_pcpar &= ~0x0001;
	immap->im_ioport.iop_pcdir &= ~0x0001;
	immap->im_ioport.iop_pcso  &= ~0x0001;
	immap->im_ioport.iop_pcint |=  0x0001;
	cpm_install_handler(CPMVEC_PIO_PC15, mii_link_interrupt, dev);

	/* Make LEDS reflect Link status.
	*/
	*((uint *) RPX_CSR_ADDR) &= ~BCSR2_FETHLEDMODE;
#endif

#ifdef PHY_INTERRUPT
	((immap_t *)IMAP_ADDR)->im_siu_conf.sc_siel |=
		(0x80000000 >> PHY_INTERRUPT);

	if (request_8xxirq(PHY_INTERRUPT, mii_link_interrupt, 0, "mii", dev) != 0)
		panic("Could not allocate MII IRQ!");
#endif

	dev->base_addr = (unsigned long)fecp;
	dev->priv = fep;

	/* The FEC Ethernet specific entries in the device structure. */
	dev->open = fec_enet_open;
	dev->hard_start_xmit = fec_enet_start_xmit;
	dev->tx_timeout = fec_timeout;
	dev->watchdog_timeo = TX_TIMEOUT;
	dev->stop = fec_enet_close;
	dev->get_stats = fec_enet_get_stats;
	dev->set_multicast_list = set_multicast_list;

#ifdef	CONFIG_USE_MDIO
	for (i=0; i<NMII-1; i++)
		mii_cmds[i].mii_next = &mii_cmds[i+1];
	mii_free = mii_cmds;
#endif	/* CONFIG_USE_MDIO */

	/* Configure all of port D for MII.
	*/
	immap->im_ioport.iop_pdpar = 0x1fff;

	/* Bits moved from Rev. D onward.
	*/
	if ((mfspr(IMMR) & 0xffff) < 0x0501)
		immap->im_ioport.iop_pddir = 0x1c58;	/* Pre rev. D */
	else
		immap->im_ioport.iop_pddir = 0x1fff;	/* Rev. D and later */

#ifdef	CONFIG_USE_MDIO
	/* Set MII speed to 2.5 MHz
	*/
	fecp->fec_mii_speed = fep->phy_speed =
		(( (bd->bi_intfreq + 500000) / 2500000 / 2 ) & 0x3F ) << 1;
#else
	fecp->fec_mii_speed = 0;	/* turn off MDIO */
#endif	/* CONFIG_USE_MDIO */

	printk ("%s: FEC ENET Version 0.2, FEC irq %d"
#ifdef PHY_INTERRUPT
		", MII irq %d"
#endif
		", addr ",
		dev->name, FEC_INTERRUPT
#ifdef PHY_INTERRUPT
		, PHY_INTERRUPT
#endif
	);
	for (i=0; i<6; i++)
		printk("%02x%c", dev->dev_addr[i], (i==5) ? '\n' : ':');

#ifdef	CONFIG_USE_MDIO	/* start in full duplex mode, and negotiate speed */
	fec_restart (dev, 1);
#else			/* always use half duplex mode only */
	fec_restart (dev, 0);
#endif

#ifdef	CONFIG_USE_MDIO
	/* Queue up command to detect the PHY and initialize the
	 * remainder of the interface.
	 */
	fep->phy_id_done = 0;
	fep->phy_addr = 0;
	mii_queue(dev, mk_mii_read(MII_REG_PHYIR1), mii_discover_phy);
#endif	/* CONFIG_USE_MDIO */

	return 0;
}

/* This function is called to start or restart the FEC during a link
 * change.  This only happens when switching between half and full
 * duplex.
 */
static void
fec_restart(struct net_device *dev, int duplex)
{
	struct fec_enet_private *fep;
	int i;
	volatile	cbd_t	*bdp;
	volatile	immap_t	*immap;
	volatile	fec_t	*fecp;

	immap = (immap_t *)IMAP_ADDR;	/* pointer to internal registers */

	fecp = &(immap->im_cpm.cp_fec);

	fep = dev->priv;

	/* Whack a reset.  We should wait for this.
	*/
	fecp->fec_ecntrl = FEC_ECNTRL_PINMUX | FEC_ECNTRL_RESET;
	for (i = 0;
	     (fecp->fec_ecntrl & FEC_ECNTRL_RESET) && (i < FEC_RESET_DELAY);
	     ++i) {
		udelay(1);
	}
	if (i == FEC_RESET_DELAY) {
		printk ("FEC Reset timeout!\n");
	}

	/* Set station address.
	*/
	fecp->fec_addr_low  = (my_enet_addr[0] << 16) | my_enet_addr[1];
	fecp->fec_addr_high =  my_enet_addr[2];

	/* Reset all multicast.
	*/
	fecp->fec_hash_table_high = 0;
	fecp->fec_hash_table_low  = 0;

	/* Set maximum receive buffer size.
	*/
	fecp->fec_r_buff_size = PKT_MAXBLR_SIZE;
	fecp->fec_r_hash = PKT_MAXBUF_SIZE;

	/* Set receive and transmit descriptor base.
	*/
	fecp->fec_r_des_start = __pa((uint)(fep->rx_bd_base));
	fecp->fec_x_des_start = __pa((uint)(fep->tx_bd_base));

	fep->dirty_tx = fep->cur_tx = fep->tx_bd_base;
	fep->cur_rx = fep->rx_bd_base;

	/* Reset SKB transmit buffers.
	*/
	fep->skb_cur = fep->skb_dirty = 0;
	for (i=0; i<=TX_RING_MOD_MASK; i++) {
		if (fep->tx_skbuff[i] != NULL) {
			dev_kfree_skb(fep->tx_skbuff[i]);
			fep->tx_skbuff[i] = NULL;
		}
	}

	/* Initialize the receive buffer descriptors.
	*/
	bdp = fep->rx_bd_base;
	for (i=0; i<RX_RING_SIZE; i++) {

		/* Initialize the BD for every fragment in the page.
		*/
		bdp->cbd_sc = BD_ENET_RX_EMPTY;
		bdp++;
	}

	/* Set the last buffer to wrap.
	*/
	bdp--;
	bdp->cbd_sc |= BD_SC_WRAP;

	/* ...and the same for transmmit.
	*/
	bdp = fep->tx_bd_base;
	for (i=0; i<TX_RING_SIZE; i++) {

		/* Initialize the BD for every fragment in the page.
		*/
		bdp->cbd_sc = 0;
		bdp->cbd_bufaddr = 0;
		bdp++;
	}

	/* Set the last buffer to wrap.
	*/
	bdp--;
	bdp->cbd_sc |= BD_SC_WRAP;

	/* Enable MII mode.
	*/
	if (duplex) {
		fecp->fec_r_cntrl = FEC_RCNTRL_MII_MODE;	/* MII enable */
		fecp->fec_x_cntrl = FEC_TCNTRL_FDEN;		/* FD enable */
	}
	else {
		fecp->fec_r_cntrl = FEC_RCNTRL_MII_MODE | FEC_RCNTRL_DRT;
		fecp->fec_x_cntrl = 0;
	}
	fep->full_duplex = duplex;

	/* Enable big endian and don't care about SDMA FC.
	*/
	fecp->fec_fun_code = 0x78000000;

#ifdef	CONFIG_USE_MDIO
	/* Set MII speed.
	*/
	fecp->fec_mii_speed = fep->phy_speed;
#endif	/* CONFIG_USE_MDIO */

	/* Clear any outstanding interrupt.
	*/
	fecp->fec_ievent = 0xffc0;

	fecp->fec_ivec = (FEC_INTERRUPT/2) << 29;

	/* Enable interrupts we wish to service.
	*/
	fecp->fec_imask = ( FEC_ENET_TXF | FEC_ENET_TXB |
			    FEC_ENET_RXF | FEC_ENET_RXB | FEC_ENET_MII );

	/* And last, enable the transmit and receive processing.
	*/
	fecp->fec_ecntrl = FEC_ECNTRL_PINMUX | FEC_ECNTRL_ETHER_EN;
	fecp->fec_r_des_active = 0x01000000;
}

static void
fec_stop(struct net_device *dev)
{
	volatile	immap_t	*immap;
	volatile	fec_t	*fecp;
	struct fec_enet_private *fep;
	int i;

	immap = (immap_t *)IMAP_ADDR;	/* pointer to internal registers */

	fecp = &(immap->im_cpm.cp_fec);

	if ((fecp->fec_ecntrl & FEC_ECNTRL_ETHER_EN) == 0)
		return;	/* already down */

	fep = dev->priv;


	fecp->fec_x_cntrl = 0x01;	/* Graceful transmit stop */

	for (i = 0;
	     ((fecp->fec_ievent & 0x10000000) == 0) && (i < FEC_RESET_DELAY);
	     ++i) {
		udelay(1);
	}
	if (i == FEC_RESET_DELAY) {
		printk ("FEC timeout on graceful transmit stop\n");
	}

	/* Clear outstanding MII command interrupts.
	*/
	fecp->fec_ievent = FEC_ENET_MII;

	/* Enable MII command finished interrupt
	*/
	fecp->fec_ivec = (FEC_INTERRUPT/2) << 29;
	fecp->fec_imask = FEC_ENET_MII;

#ifdef	CONFIG_USE_MDIO
	/* Set MII speed.
	*/
	fecp->fec_mii_speed = fep->phy_speed;
#endif	/* CONFIG_USE_MDIO */

	/* Disable FEC
	*/
	fecp->fec_ecntrl &= ~(FEC_ECNTRL_ETHER_EN);
}

/* Microcode patches for the CPM as supplied by Motorola.
 * This is the one for IIC/SPI.  There is a newer one that
 * also relocates SMC2, but this would require additional changes
 * to uart.c, so I am holding off on that for a moment.
 */
#include <linux/config.h>
#include <linux/errno.h>
#include <linux/sched.h>
#include <linux/kernel.h>
#include <linux/param.h>
#include <linux/string.h>
#include <linux/mm.h>
#include <linux/interrupt.h>
#include <asm/irq.h>
#include <asm/mpc8xx.h>
#include <asm/page.h>
#include <asm/pgtable.h>
#include <asm/8xx_immap.h>
#include <asm/commproc.h>

/* Define this to get SMC patches as well.  You need to modify the uart
 * driver as well......
#define USE_SMC_PATCH 1
 */

#ifdef CONFIG_USB_MPC8xx
#define USE_USB_SOF_PATCH
#endif

#ifdef USE_IIC_PATCH
#define PATCH_DEFINED
	/* IIC/SPI */
uint patch_2000[] = {
	0x7FFFEFD9,
	0x3FFD0000,
	0x7FFB49F7,
	0x7FF90000,
	0x5FEFADF7,
	0x5F89ADF7,
	0x5FEFAFF7,
	0x5F89AFF7,
	0x3A9CFBC8,
	0xE7C0EDF0,
	0x77C1E1BB,
	0xF4DC7F1D,
	0xABAD932F,
	0x4E08FDCF,
	0x6E0FAFF8,
	0x7CCF76CF,
	0xFD1FF9CF,
	0xABF88DC6,
	0xAB5679F7,
	0xB0937383,
	0xDFCE79F7,
	0xB091E6BB,
	0xE5BBE74F,
	0xB3FA6F0F,
	0x6FFB76CE,
	0xEE0DF9CF,
	0x2BFBEFEF,
	0xCFEEF9CF,
	0x76CEAD24,
	0x90B2DF9A,
	0x7FDDD0BF,
	0x4BF847FD,
	0x7CCF76CE,
	0xCFEF7E1F,
	0x7F1D7DFD,
	0xF0B6EF71,
	0x7FC177C1,
	0xFBC86079,
	0xE722FBC8,
	0x5FFFDFFF,
	0x5FB2FFFB,
	0xFBC8F3C8,
	0x94A67F01,
	0x7F1D5F39,
	0xAFE85F5E,
	0xFFDFDF96,
	0xCB9FAF7D,
	0x5FC1AFED,
	0x8C1C5FC1,
	0xAFDD5FC3,
	0xDF9A7EFD,
	0xB0B25FB2,
	0xFFFEABAD,
	0x5FB2FFFE,
	0x5FCE600B,
	0xE6BB600B,
	0x5FCEDFC6,
	0x27FBEFDF,
	0x5FC8CFDE,
	0x3A9CE7C0,
	0xEDF0F3C8,
	0x7F0154CD,
	0x7F1D2D3D,
	0x363A7570,
	0x7E0AF1CE,
	0x37EF2E68,
	0x7FEE10EC,
	0xADF8EFDE,
	0xCFEAE52F,
	0x7D0FE12B,
	0xF1CE5F65,
	0x7E0A4DF8,
	0xCFEA5F72,
	0x7D0BEFEE,
	0xCFEA5F74,
	0xE522EFDE,
	0x5F74CFDA,
	0x0B627385,
	0xDF627E0A,
	0x30D8145B,
	0xBFFFF3C8,
	0x5FFFDFFF,
	0xA7F85F5E,
	0xBFFE7F7D,
	0x10D31450,
	0x5F36BFFF,
	0xAF785F5E,
	0xBFFDA7F8,
	0x5F36BFFE,
	0x77FD30C0,
	0x4E08FDCF,
	0xE5FF6E0F,
	0xAFF87E1F,
	0x7E0FFD1F,
	0xF1CF5F1B,
	0xABF80D5E,
	0x5F5EFFEF,
	0x79F730A2,
	0xAFDD5F34,
	0x47F85F34,
	0xAFED7FDD,
	0x50B24978,
	0x47FD7F1D,
	0x7DFD70AD,
	0xEF717EC1,
	0x6BA47F01,
	0x2D267EFD,
	0x30DE5F5E,
	0xFFFD5F5E,
	0xFFEF5F5E,
	0xFFDF0CA0,
	0xAFED0A9E,
	0xAFDD0C3A,
	0x5F3AAFBD,
	0x7FBDB082,
	0x5F8247F8
};

uint patch_2f00[] = {
	0x3E303430,
	0x34343737,
	0xABF7BF9B,
	0x994B4FBD,
	0xBD599493,
	0x349FFF37,
	0xFB9B177D,
	0xD9936956,
	0xBBFDD697,
	0xBDD2FD11,
	0x31DB9BB3,
	0x63139637,
	0x93733693,
	0x193137F7,
	0x331737AF,
	0x7BB9B999,
	0xBB197957,
	0x7FDFD3D5,
	0x73B773F7,
	0x37933B99,
	0x1D115316,
	0x99315315,
	0x31694BF4,
	0xFBDBD359,
	0x31497353,
	0x76956D69,
	0x7B9D9693,
	0x13131979,
	0x79376935
};
#endif

#ifdef USE_SMC_PATCH
#define PATCH_DEFINED
/* SMC2/IIC/SPI Patch */
/* This is the area from 0x2000 to 0x23ff.
*/
uint patch_2000[] = {
	0x3fff0000,
	0x3ffd0000,
	0x3ffb0000,
	0x3ff90000,
	0x5f13eff8,
	0x5eb5eff8,
	0x5f88adf7,
	0x5fefadf7,
	0x3a9cfbc8,
	0x77cae1bb,
	0xf4de7fad,
	0xabae9330,
	0x4e08fdcf,
	0x6e0faff8,
	0x7ccf76cf,
	0xfdaff9cf,
	0xabf88dc8,
	0xab5879f7,
	0xb0925d8d,
	0xdfd079f7,
	0xb090e6bb,
	0xe5bbe74f,
	0x9e046f0f,
	0x6ffb76ce,
	0xee0cf9cf,
	0x2bfbefef,
	0xcfeef9cf,
	0x76cead23,
	0x90b3df99,
	0x7fddd0c1,
	0x4bf847fd,
	0x7ccf76ce,
	0xcfef77ca,
	0x7eaf7fad,
	0x7dfdf0b7,
	0xef7a7fca,
	0x77cafbc8,
	0x6079e722,
	0xfbc85fff,
	0xdfff5fb3,
	0xfffbfbc8,
	0xf3c894a5,
	0xe7c9edf9,
	0x7f9a7fad,
	0x5f36afe8,
	0x5f5bffdf,
	0xdf95cb9e,
	0xaf7d5fc3,
	0xafed8c1b,
	0x5fc3afdd,
	0x5fc5df99,
	0x7efdb0b3,
	0x5fb3fffe,
	0xabae5fb3,
	0xfffe5fd0,
	0x600be6bb,
	0x600b5fd0,
	0xdfc827fb,
	0xefdf5fca,
	0xcfde3a9c,
	0xe7c9edf9,
	0xf3c87f9e,
	0x54ca7fed,
	0x2d3a3637,
	0x756f7e9a,
	0xf1ce37ef,
	0x2e677fee,
	0x10ebadf8,
	0xefdecfea,
	0xe52f7d9f,
	0xe12bf1ce,
	0x5f647e9a,
	0x4df8cfea,
	0x5f717d9b,
	0xefeecfea,
	0x5f73e522,
	0xefde5f73,
	0xcfda0b61,
	0x5d8fdf61,
	0xe7c9edf9,
	0x7e9a30d5,
	0x1458bfff,
	0xf3c85fff,
	0xdfffa7f8,
	0x5f5bbffe,
	0x7f7d10d0,
	0x144d5f33,
	0xbfffaf78,
	0x5f5bbffd,
	0xa7f85f33,
	0xbffe77fd,
	0x30bd4e08,
	0xfdcfe5ff,
	0x6e0faff8,
	0x7eef7e9f,
	0xfdeff1cf,
	0x5f17abf8,
	0x0d5b5f5b,
	0xffef79f7,
	0x309eafdd,
	0x5f3147f8,
	0x5f31afed,
	0x7fdd50af,
	0x497847fd,
	0x7f9e7fed,
	0x7dfd70a9,
	0xef7e7ece,
	0x6ba07f9e,
	0x2d227efd,
	0x30db5f5b,
	0xfffd5f5b,
	0xffef5f5b,
	0xffdf0c9c,
	0xafed0a9a,
	0xafdd0c37,
	0x5f37afbd,
	0x7fbdb081,
	0x5f8147f8,
	0x3a11e710,
	0xedf0ccdd,
	0xf3186d0a,
	0x7f0e5f06,
	0x7fedbb38,
	0x3afe7468,
	0x7fedf4fc,
	0x8ffbb951,
	0xb85f77fd,
	0xb0df5ddd,
	0xdefe7fed,
	0x90e1e74d,
	0x6f0dcbf7,
	0xe7decfed,
	0xcb74cfed,
	0xcfeddf6d,
	0x91714f74,
	0x5dd2deef,
	0x9e04e7df,
	0xefbb6ffb,
	0xe7ef7f0e,
	0x9e097fed,
	0xebdbeffa,
	0xeb54affb,
	0x7fea90d7,
	0x7e0cf0c3,
	0xbffff318,
	0x5fffdfff,
	0xac59efea,
	0x7fce1ee5,
	0xe2ff5ee1,
	0xaffbe2ff,
	0x5ee3affb,
	0xf9cc7d0f,
	0xaef8770f,
	0x7d0fb0c6,
	0xeffbbfff,
	0xcfef5ede,
	0x7d0fbfff,
	0x5ede4cf8,
	0x7fddd0bf,
	0x49f847fd,
	0x7efdf0bb,
	0x7fedfffd,
	0x7dfdf0b7,
	0xef7e7e1e,
	0x5ede7f0e,
	0x3a11e710,
	0xedf0ccab,
	0xfb18ad2e,
	0x1ea9bbb8,
	0x74283b7e,
	0x73c2e4bb,
	0x2ada4fb8,
	0xdc21e4bb,
	0xb2a1ffbf,
	0x5e2c43f8,
	0xfc87e1bb,
	0xe74ffd91,
	0x6f0f4fe8,
	0xc7ba32e2,
	0xf396efeb,
	0x600b4f78,
	0xe5bb760b,
	0x53acaef8,
	0x4ef88b0e,
	0xcfef9e09,
	0xabf8751f,
	0xefef5bac,
	0x741f4fe8,
	0x751e760d,
	0x7fdbf081,
	0x741cafce,
	0xefcc7fce,
	0x751e70ac,
	0x741ce7bb,
	0x3372cfed,
	0xafdbefeb,
	0xe5bb760b,
	0x53f2aef8,
	0xafe8e7eb,
	0x4bf8771e,
	0x7e247fed,
	0x4fcbe2cc,
	0x7fbc30a9,
	0x7b0f7a0f,
	0x34d577fd,
	0x308b5db7,
	0xde553e5f,
	0xaf78741f,
	0x741f30f0,
	0xcfef5e2c,
	0x741f3eac,
	0xafb8771e,
	0x5e677fed,
	0x0bd3e2cc,
	0x741ccfec,
	0xe5ca53cd,
	0x6fcb4f74,
	0x5dadde4b,
	0x2ab63d38,
	0x4bb3de30,
	0x751f741c,
	0x6c42effa,
	0xefea7fce,
	0x6ffc30be,
	0xefec3fca,
	0x30b3de2e,
	0xadf85d9e,
	0xaf7daefd,
	0x5d9ede2e,
	0x5d9eafdd,
	0x761f10ac,
	0x1da07efd,
	0x30adfffe,
	0x4908fb18,
	0x5fffdfff,
	0xafbb709b,
	0x4ef85e67,
	0xadf814ad,
	0x7a0f70ad,
	0xcfef50ad,
	0x7a0fde30,
	0x5da0afed,
	0x3c12780f,
	0xefef780f,
	0xefef790f,
	0xa7f85e0f,
	0xffef790f,
	0xefef790f,
	0x14adde2e,
	0x5d9eadfd,
	0x5e2dfffb,
	0xe79addfd,
	0xeff96079,
	0x607ae79a,
	0xddfceff9,
	0x60795dff,
	0x607acfef,
	0xefefefdf,
	0xefbfef7f,
	0xeeffedff,
	0xebffe7ff,
	0xafefafdf,
	0xafbfaf7f,
	0xaeffadff,
	0xabffa7ff,
	0x6fef6fdf,
	0x6fbf6f7f,
	0x6eff6dff,
	0x6bff67ff,
	0x2fef2fdf,
	0x2fbf2f7f,
	0x2eff2dff,
	0x2bff27ff,
	0x4e08fd1f,
	0xe5ff6e0f,
	0xaff87eef,
	0x7e0ffdef,
	0xf11f6079,
	0xabf8f542,
	0x7e0af11c,
	0x37cfae3a,
	0x7fec90be,
	0xadf8efdc,
	0xcfeae52f,
	0x7d0fe12b,
	0xf11c6079,
	0x7e0a4df8,
	0xcfea5dc4,
	0x7d0befec,
	0xcfea5dc6,
	0xe522efdc,
	0x5dc6cfda,
	0x4e08fd1f,
	0x6e0faff8,
	0x7c1f761f,
	0xfdeff91f,
	0x6079abf8,
	0x761cee24,
	0xf91f2bfb,
	0xefefcfec,
	0xf91f6079,
	0x761c27fb,
	0xefdf5da7,
	0xcfdc7fdd,
	0xd09c4bf8,
	0x47fd7c1f,
	0x761ccfcf,
	0x7eef7fed,
	0x7dfdf093,
	0xef7e7f1e,
	0x771efb18,
	0x6079e722,
	0xe6bbe5bb,
	0xae0ae5bb,
	0x600bae85,
	0xe2bbe2bb,
	0xe2bbe2bb,
	0xaf02e2bb,
	0xe2bb2ff9,
	0x6079e2bb
};

	/* This is from 0x2f00 to 0x2fff
	*/
uint patch_2f00[] = {
	0x30303030,
	0x3e3e3434,
	0xabbf9b99,
	0x4b4fbdbd,
	0x59949334,
	0x9fff37fb,
	0x9b177dd9,
	0x936956bb,
	0xfbdd697b,
	0xdd2fd113,
	0x1db9f7bb,
	0x36313963,
	0x79373369,
	0x3193137f,
	0x7331737a,
	0xf7bb9b99,
	0x9bb19795,
	0x77fdfd3d,
	0x573b773f,
	0x737933f7,
	0xb991d115,
	0x31699315,
	0x31531694,
	0xbf4fbdbd,
	0x35931497,
	0x35376956,
	0xbd697b9d,
	0x96931313,
	0x19797937,
	0x6935af78,
	0xb9b3baa3,
	0xb8788683,
	0x368f78f7,
	0x87778733,
	0x3ffffb3b,
	0x8e8f78b8,
	0x1d118e13,
	0xf3ff3f8b,
	0x6bd8e173,
	0xd1366856,
	0x68d1687b,
	0x3daf78b8,
	0x3a3a3f87,
	0x8f81378f,
	0xf876f887,
	0x77fd8778,
	0x737de8d6,
	0xbbf8bfff,
	0xd8df87f7,
	0xfd876f7b,
	0x8bfff8bd,
	0x8683387d,
	0xb873d87b,
	0x3b8fd7f8,
	0xf7338883,
	0xbb8ee1f8,
	0xef837377,
	0x3337b836,
	0x817d11f8,
	0x7378b878,
	0xd3368b7d,
	0xed731b7d,
	0x833731f3,
	0xf22f3f23
};

uint patch_2e00[] = {
	/* This is from 0x2e00 to 0x2e3c
	*/
	0x27eeeeee,
	0xeeeeeeee,
	0xeeeeeeee,
	0xeeeeeeee,
	0xee4bf4fb,
	0xdbd259bb,
	0x1979577f,
	0xdfd2d573,
	0xb773f737,
	0x4b4fbdbd,
	0x25b9b177,
	0xd2d17376,
	0x956bbfdd,
	0x697bdd2f,
	0xff9f79ff,
	0xff9ff22f
};
#endif

#ifdef USE_USB_SOF_PATCH
#define PATCH_DEFINED
uint patch_2000[] = {
	0x7fff0000,
	0x7ffd0000,
	0x7ffb0000,
	0x49f7ba5b,
	0xba383ffb,
	0xf9b8b46d,
	0xe5ab4e07,
	0xaf77bffe,
	0x3f7bbf79,
	0xba5bba38,
	0xe7676076,
	0x60750000
};

uint patch_2f00[] = {
	0x3030304c,
	0xcab9e441,
	0xa1aaf220
};
#endif

/* Load the microcode patch.  This is called early in the CPM initialization
 * with the controller in the reset state.  We enable the processor after
 * we load the patch.
 */
void
cpm_load_patch(volatile immap_t *immr)
{
#ifdef PATCH_DEFINED
	volatile uint		*dp;
	volatile cpm8xx_t	*commproc;
	volatile iic_t		*iip;
	volatile spi_t		*spp;
	int	i;

	commproc = (cpm8xx_t *)&immr->im_cpm;

	/* We work closely with commproc.c.  We know it only allocates
	 * from data only space.
	 * For this particular patch, we only use the bottom 512 bytes
	 * and the upper 256 byte extension.  We will use the space
	 * starting at 1K for the relocated parameters, as the general
	 * CPM allocation won't come from that area.
	 */
	commproc->cp_rccr = 0;

	/* Copy the patch into DPRAM.
	*/
	dp = (uint *)(commproc->cp_dpmem);
	for (i=0; i<(sizeof(patch_2000)/4); i++)
		*dp++ = patch_2000[i];

	dp = (uint *)&(commproc->cp_dpmem[0x0f00]);
	for (i=0; i<(sizeof(patch_2f00)/4); i++)
		*dp++ = patch_2f00[i];

#ifdef USE_USB_SOF_PATCH
#if 0 /* usb patch should not relocate iic */
	iip = (iic_t *)&commproc->cp_dparam[PROFF_IIC];
#define RPBASE 0x0030
	iip->iic_rpbase = RPBASE;

	/* Put SPI above the IIC, also 32-byte aligned.
	*/
	i = (RPBASE + sizeof(iic_t) + 31) & ~31;
	spp = (spi_t *)&commproc->cp_dparam[PROFF_SPI];
	spp->spi_rpbase = i;
#endif

	/* Enable uCode fetches from DPRAM. */
	commproc->cp_rccr = 0x0009;

	printk("USB uCode patch installed\n");
#endif /* USE_USB_SOF_PATCH */

#if defined(USE_SMC_PATCH) || defined(USE_IIC_PATCH)

	iip = (iic_t *)&commproc->cp_dparam[PROFF_IIC];
#define RPBASE 0x0400
	iip->iic_rpbase = RPBASE;

	/* Put SPI above the IIC, also 32-byte aligned.
	*/
	i = (RPBASE + sizeof(iic_t) + 31) & ~31;
	spp = (spi_t *)&commproc->cp_dparam[PROFF_SPI];
	spp->spi_rpbase = i;

#ifdef USE_SMC_PATCH
	dp = (uint *)&(commproc->cp_dpmem[0x0e00]);
	for (i=0; i<(sizeof(patch_2e00)/4); i++)
		*dp++ = patch_2e00[i];

	/* Enable the traps to get to it.
	*/
	commproc->cp_cpmcr1 = 0x8080;
	commproc->cp_cpmcr2 = 0x808a;
	commproc->cp_cpmcr3 = 0x8028;
	commproc->cp_cpmcr4 = 0x802a;

	/* Enable uCode fetches from DPRAM.
	*/
	commproc->cp_rccr = 3;
#endif

#ifdef USE_IIC_PATCH
	/* Enable the traps to get to it.
	*/
	commproc->cp_cpmcr1 = 0x802a;
	commproc->cp_cpmcr2 = 0x8028;
	commproc->cp_cpmcr3 = 0x802e;
	commproc->cp_cpmcr4 = 0x802c;

	/* Enable uCode fetches from DPRAM.
	*/
	commproc->cp_rccr = 1;

	printk("I2C uCode patch installed\n");
#endif

	/* Relocate the IIC and SPI parameter areas.  These have to
	 * aligned on 32-byte boundaries.
	 */
	iip = (iic_t *)&commproc->cp_dparam[PROFF_IIC];
	iip->iic_rpbase = RPBASE;

	/* Put SPI above the IIC, also 32-byte aligned.
	*/
	i = (RPBASE + sizeof(iic_t) + 31) & ~31;
	spp = (spi_t *)&commproc->cp_dparam[PROFF_SPI];
	spp->spi_rpbase = i;

#endif /* USE_SMC_PATCH || USE_IIC_PATCH */
#endif /* PATCH_DEFINED */
}

void
verify_patch(volatile immap_t *immr)
{
#ifdef PATCH_DEFINED
	volatile uint		*dp;
	volatile cpm8xx_t	*commproc;
	int i;

	commproc = (cpm8xx_t *)&immr->im_cpm;

	printk("cp_rccr %x\n", commproc->cp_rccr);
	commproc->cp_rccr = 0;

	dp = (uint *)(commproc->cp_dpmem);
	for (i=0; i<(sizeof(patch_2000)/4); i++)
		if (*dp++ != patch_2000[i]) {
			printk("patch_2000 bad at %d\n", i);
			dp--;
			printk("found 0x%X, wanted 0x%X\n", *dp, patch_2000[i]);
			break;
		}

	dp = (uint *)&(commproc->cp_dpmem[0x0f00]);
	for (i=0; i<(sizeof(patch_2f00)/4); i++)
		if (*dp++ != patch_2f00[i]) {
			printk("patch_2f00 bad at %d\n", i);
			dp--;
			printk("found 0x%X, wanted 0x%X\n", *dp, patch_2f00[i]);
			break;
		}

	commproc->cp_rccr = 0x0009;
#endif /* PATCH_DEFINED */
}

OUTPUT_ARCH(powerpc)
SEARCH_DIR(/lib); SEARCH_DIR(/usr/lib); SEARCH_DIR(/usr/local/lib); SEARCH_DIR(/usr/local/powerpc-any-elf/lib);
/* Do we need any of these for elf?
   __DYNAMIC = 0;    */
SECTIONS
{
  /* Read-only sections, merged into text segment: */
  . = + SIZEOF_HEADERS;
  .interp : { *(.interp) }
  .hash          : { *(.hash)		}
  .dynsym        : { *(.dynsym)		}
  .dynstr        : { *(.dynstr)		}
  .rel.text      : { *(.rel.text)		}
  .rela.text     : { *(.rela.text) 	}
  .rel.data      : { *(.rel.data)		}
  .rela.data     : { *(.rela.data) 	}
  .rel.rodata    : { *(.rel.rodata) 	}
  .rela.rodata   : { *(.rela.rodata) 	}
  .rel.got       : { *(.rel.got)		}
  .rela.got      : { *(.rela.got)		}
  .rel.ctors     : { *(.rel.ctors)	}
  .rela.ctors    : { *(.rela.ctors)	}
  .rel.dtors     : { *(.rel.dtors)	}
  .rela.dtors    : { *(.rela.dtors)	}
  .rel.bss       : { *(.rel.bss)		}
  .rela.bss      : { *(.rela.bss)		}
  .rel.plt       : { *(.rel.plt)		}
  .rela.plt      : { *(.rela.plt)		}
/*  .init          : { *(.init)	} =0*/
  .plt : { *(.plt) }
  .text      :
  {
    *(.text)
    *(.fixup)
    *(.got1)
  }
  _etext = .;
  PROVIDE (etext = .);
  .rodata    :
  {
    *(.rodata)
    *(.rodata.*)
    *(.rodata1)
  }
  .kstrtab   : { *(.kstrtab) }
  .fini      : { *(.fini)    } =0
  .ctors     : { *(.ctors)   }
  .dtors     : { *(.dtors)   }
  /* Read-write section, merged into data segment: */
  . = (. + 0x0FFF) & 0xFFFFF000;
  .data    :
  {
    *(.data)
    *(.data1)
    *(.sdata)
    *(.sdata2)
    *(.got.plt) *(.got)
    *(.dynamic)
    CONSTRUCTORS
  }
  _edata  =  .;
  PROVIDE (edata = .);

  .fixup   : { *(.fixup) }
  __start___ex_table = .;
  __ex_table : { *(__ex_table) }
  __stop___ex_table = .;

  __start___ksymtab = .;	/* Kernel symbol table */
  __ksymtab : { *(__ksymtab) }
  __stop___ksymtab = .;

  __start___ftr_fixup = .;
  __ftr_fixup : { *(__ftr_fixup) }
  __stop___ftr_fixup = .;

  . = ALIGN(32);
  .data.cacheline_aligned : { *(.data.cacheline_aligned) }

  . = ALIGN(4096);
  __init_begin = .;
  .text.init : { *(.text.init) }
  .data.init : { 
    *(.data.init);
    __vtop_table_begin = .;
    *(.vtop_fixup);
    __vtop_table_end = .;
    __ptov_table_begin = .;
    *(.ptov_fixup);
    __ptov_table_end = .;
  }
  . = ALIGN(16);
  __setup_start = .;
  .setup.init : { *(.setup.init) }
  __setup_end = .;
  __initcall_start = .;
  .initcall.init : { *(.initcall.init) }
  __initcall_end = .;
  . = ALIGN(4096);
  __init_end = .;

  . = ALIGN(4096);
  __pmac_begin = .;
  .text.pmac : { *(.text.pmac) }
  .data.pmac : { *(.data.pmac) }
  . = ALIGN(4096);
  __pmac_end = .;

  . = ALIGN(4096);
  __prep_begin = .;
  .text.prep : { *(.text.prep) }
  .data.prep : { *(.data.prep) }
  . = ALIGN(4096);
  __prep_end = .;

  . = ALIGN(4096);
  __chrp_begin = .;
  .text.chrp : { *(.text.chrp) }
  .data.chrp : { *(.data.chrp) }
  . = ALIGN(4096);
  __chrp_end = .;

  . = ALIGN(4096);
  __openfirmware_begin = .;
  .text.openfirmware : { *(.text.openfirmware) }
  .data.openfirmware : { *(.data.openfirmware) }
  . = ALIGN(4096);
  __openfirmware_end = .;

  __bss_start = .;
  .bss       :
  {
   *(.sbss) *(.scommon)
   *(.dynbss)
   *(.bss)
   *(COMMON)
  }
  _end = . ;
  PROVIDE (end = .);
}
#
# Automatically generated make config: don't edit
#
# CONFIG_UID16 is not set
# CONFIG_RWSEM_GENERIC_SPINLOCK is not set
CONFIG_RWSEM_XCHGADD_ALGORITHM=y

#
# Code maturity level options
#
CONFIG_EXPERIMENTAL=y

#
# Loadable module support
#
CONFIG_MODULES=y
# CONFIG_MODVERSIONS is not set
CONFIG_KMOD=y

#
# Platform support
#
CONFIG_PPC=y
CONFIG_PPC32=y
CONFIG_6xx=y
# CONFIG_4xx is not set
# CONFIG_POWER3 is not set
# CONFIG_POWER4 is not set
# CONFIG_8xx is not set
# CONFIG_8260 is not set
CONFIG_PPC_STD_MMU=y
# CONFIG_ALL_PPC is not set
CONFIG_APUS=y
# CONFIG_GEMINI is not set
# CONFIG_SMP is not set
# CONFIG_ALTIVEC is not set
# CONFIG_TAU is not set

#
# General setup
#
# CONFIG_HIGHMEM is not set
# CONFIG_ISA is not set
# CONFIG_EISA is not set
# CONFIG_SBUS is not set
# CONFIG_MCA is not set
CONFIG_PCI_PERMEDIA=y
CONFIG_PCI=y
CONFIG_NET=y
CONFIG_SYSCTL=y
CONFIG_SYSVIPC=y
# CONFIG_BSD_PROCESS_ACCT is not set
CONFIG_KCORE_ELF=y
CONFIG_BINFMT_ELF=y
CONFIG_KERNEL_ELF=y
CONFIG_BINFMT_MISC=m
CONFIG_PCI_NAMES=y
# CONFIG_HOTPLUG is not set
# CONFIG_PCMCIA is not set

#
# Parallel port support
#
CONFIG_PARPORT=m
# CONFIG_PARPORT_PC is not set
CONFIG_PARPORT_AMIGA=m
# CONFIG_PARPORT_MFC3 is not set
# CONFIG_PARPORT_ATARI is not set
# CONFIG_PARPORT_SUNBPP is not set
# CONFIG_PARPORT_OTHER is not set
# CONFIG_PARPORT_1284 is not set
CONFIG_GEN_RTC=y
# CONFIG_CMDLINE_BOOL is not set
CONFIG_FB_CONSOLE=y
CONFIG_AMIGA=y
CONFIG_ZORRO=y
CONFIG_AMIGAMOUSE=y
CONFIG_ABSTRACT_CONSOLE=y
CONFIG_FB=y
CONFIG_MOUSE=y
CONFIG_BUSMOUSE=y
CONFIG_APUS_FAST_EXCEPT=y
CONFIG_AMIGA_PCMCIA=y
CONFIG_AMIGA_BUILTIN_SERIAL=y
CONFIG_GVPIOEXT=y
CONFIG_GVPIOEXT_LP=m
CONFIG_GVPIOEXT_PLIP=m
CONFIG_MULTIFACE_III_TTY=y
CONFIG_A2232=y
CONFIG_WHIPPET_SERIAL=y
CONFIG_APNE=y
CONFIG_SERIAL_CONSOLE=y
CONFIG_HEARTBEAT=y
CONFIG_PROC_HARDWARE=y
CONFIG_ZORRO_NAMES=y

#
# Memory Technology Devices (MTD)
#
# CONFIG_MTD is not set

#
# Plug and Play configuration
#
# CONFIG_PNP is not set
# CONFIG_ISAPNP is not set

#
# Block devices
#
# CONFIG_BLK_DEV_FD is not set
CONFIG_AMIGA_FLOPPY=y
CONFIG_AMIGA_Z2RAM=m
# CONFIG_BLK_DEV_XD is not set
# CONFIG_PARIDE is not set
# CONFIG_BLK_CPQ_DA is not set
# CONFIG_BLK_CPQ_CISS_DA is not set
# CONFIG_BLK_DEV_DAC960 is not set
CONFIG_BLK_DEV_LOOP=y
CONFIG_BLK_DEV_NBD=m
CONFIG_BLK_DEV_RAM=y
CONFIG_BLK_DEV_RAM_SIZE=4096
CONFIG_BLK_DEV_INITRD=y

#
# Multi-device support (RAID and LVM)
#
CONFIG_MD=y
CONFIG_BLK_DEV_MD=m
CONFIG_MD_LINEAR=m
CONFIG_MD_RAID0=m
CONFIG_MD_RAID1=m
CONFIG_MD_RAID5=m
# CONFIG_MD_MULTIPATH is not set
CONFIG_BLK_DEV_LVM=m

#
# Networking options
#
CONFIG_PACKET=m
CONFIG_PACKET_MMAP=y
CONFIG_NETLINK=y
# CONFIG_RTNETLINK is not set
CONFIG_NETLINK_DEV=m
CONFIG_NETFILTER=y
# CONFIG_NETFILTER_DEBUG is not set
CONFIG_FILTER=y
CONFIG_UNIX=y
CONFIG_INET=y
# CONFIG_IP_MULTICAST is not set
# CONFIG_IP_ADVANCED_ROUTER is not set
# CONFIG_IP_PNP is not set
# CONFIG_NET_IPIP is not set
# CONFIG_NET_IPGRE is not set
# CONFIG_INET_ECN is not set
CONFIG_SYN_COOKIES=y

#
#   IP: Netfilter Configuration
#
CONFIG_IP_NF_CONNTRACK=m
CONFIG_IP_NF_FTP=m
CONFIG_IP_NF_IRC=m
CONFIG_IP_NF_QUEUE=m
CONFIG_IP_NF_IPTABLES=m
CONFIG_IP_NF_MATCH_LIMIT=m
CONFIG_IP_NF_MATCH_MAC=m
CONFIG_IP_NF_MATCH_MARK=m
CONFIG_IP_NF_MATCH_MULTIPORT=m
CONFIG_IP_NF_MATCH_TOS=m
CONFIG_IP_NF_MATCH_LENGTH=m
CONFIG_IP_NF_MATCH_TTL=m
CONFIG_IP_NF_MATCH_TCPMSS=m
CONFIG_IP_NF_MATCH_STATE=m
CONFIG_IP_NF_MATCH_UNCLEAN=m
CONFIG_IP_NF_MATCH_OWNER=m
CONFIG_IP_NF_FILTER=m
CONFIG_IP_NF_TARGET_REJECT=m
CONFIG_IP_NF_TARGET_MIRROR=m
CONFIG_IP_NF_NAT=m
CONFIG_IP_NF_NAT_NEEDED=y
CONFIG_IP_NF_TARGET_MASQUERADE=m
CONFIG_IP_NF_TARGET_REDIRECT=m
CONFIG_IP_NF_NAT_SNMP_BASIC=m
CONFIG_IP_NF_NAT_IRC=m
CONFIG_IP_NF_NAT_FTP=m
CONFIG_IP_NF_MANGLE=m
CONFIG_IP_NF_TARGET_TOS=m
CONFIG_IP_NF_TARGET_MARK=m
CONFIG_IP_NF_TARGET_LOG=m
CONFIG_IP_NF_TARGET_TCPMSS=m
CONFIG_IP_NF_COMPAT_IPCHAINS=m
CONFIG_IP_NF_NAT_NEEDED=y
# CONFIG_IP_NF_COMPAT_IPFWADM is not set
# CONFIG_IPV6 is not set
CONFIG_KHTTPD=m
# CONFIG_ATM is not set
# CONFIG_VLAN_8021Q is not set

#
#  
#
# CONFIG_IPX is not set
# CONFIG_ATALK is not set
# CONFIG_DECNET is not set
# CONFIG_BRIDGE is not set
# CONFIG_X25 is not set
# CONFIG_LAPB is not set
# CONFIG_LLC is not set
# CONFIG_NET_DIVERT is not set
# CONFIG_ECONET is not set
# CONFIG_WAN_ROUTER is not set
# CONFIG_NET_FASTROUTE is not set
# CONFIG_NET_HW_FLOWCONTROL is not set

#
# QoS and/or fair queueing
#
# CONFIG_NET_SCHED is not set

#
# ATA/IDE/MFM/RLL support
#
CONFIG_IDE=y

#
# IDE, ATA and ATAPI Block devices
#
CONFIG_BLK_DEV_IDE=y

#
# Please see Documentation/ide.txt for help/info on IDE drives
#
# CONFIG_BLK_DEV_HD_IDE is not set
# CONFIG_BLK_DEV_HD is not set
CONFIG_BLK_DEV_IDEDISK=y
# CONFIG_IDEDISK_MULTI_MODE is not set
# CONFIG_BLK_DEV_IDEDISK_VENDOR is not set
# CONFIG_BLK_DEV_IDEDISK_FUJITSU is not set
# CONFIG_BLK_DEV_IDEDISK_IBM is not set
# CONFIG_BLK_DEV_IDEDISK_MAXTOR is not set
# CONFIG_BLK_DEV_IDEDISK_QUANTUM is not set
# CONFIG_BLK_DEV_IDEDISK_SEAGATE is not set
# CONFIG_BLK_DEV_IDEDISK_WD is not set
# CONFIG_BLK_DEV_COMMERIAL is not set
# CONFIG_BLK_DEV_TIVO is not set
# CONFIG_BLK_DEV_IDECS is not set
CONFIG_BLK_DEV_IDECD=y
CONFIG_BLK_DEV_IDETAPE=m
CONFIG_BLK_DEV_IDEFLOPPY=y
CONFIG_BLK_DEV_IDESCSI=m

#
# IDE chipset support/bugfixes
#
# CONFIG_BLK_DEV_CMD640 is not set
# CONFIG_BLK_DEV_CMD640_ENHANCED is not set
# CONFIG_BLK_DEV_ISAPNP is not set
# CONFIG_BLK_DEV_RZ1000 is not set
# CONFIG_BLK_DEV_IDEPCI is not set
# CONFIG_BLK_DEV_SL82C105 is not set
CONFIG_BLK_DEV_GAYLE=y
CONFIG_BLK_DEV_IDEDOUBLER=y
CONFIG_BLK_DEV_BUDDHA=y
# CONFIG_IDE_CHIPSETS is not set
# CONFIG_IDEDMA_AUTO is not set
# CONFIG_DMA_NONPCI is not set
# CONFIG_BLK_DEV_IDE_MODES is not set
# CONFIG_BLK_DEV_ATARAID is not set
# CONFIG_BLK_DEV_ATARAID_PDC is not set
# CONFIG_BLK_DEV_ATARAID_HPT is not set

#
# SCSI support
#
CONFIG_SCSI=y

#
# SCSI support type (disk, tape, CD-ROM)
#
CONFIG_BLK_DEV_SD=y
CONFIG_SD_EXTRA_DEVS=40
CONFIG_CHR_DEV_ST=m
CONFIG_CHR_DEV_OSST=m
CONFIG_BLK_DEV_SR=y
CONFIG_BLK_DEV_SR_VENDOR=y
CONFIG_SR_EXTRA_DEVS=4
CONFIG_CHR_DEV_SG=m

#
# Some SCSI devices (e.g. CD jukebox) support multiple LUNs
#
# CONFIG_SCSI_DEBUG_QUEUES is not set
# CONFIG_SCSI_MULTI_LUN is not set
CONFIG_SCSI_CONSTANTS=y
CONFIG_SCSI_LOGGING=y

#
# SCSI low-level drivers
#
# CONFIG_BLK_DEV_3W_XXXX_RAID is not set
# CONFIG_SCSI_7000FASST is not set
# CONFIG_SCSI_ACARD is not set
# CONFIG_SCSI_AHA152X is not set
# CONFIG_SCSI_AHA1542 is not set
# CONFIG_SCSI_AHA1740 is not set
# CONFIG_SCSI_AIC7XXX is not set
# CONFIG_SCSI_AIC7XXX_OLD is not set
# CONFIG_SCSI_DPT_I2O is not set
# CONFIG_SCSI_ADVANSYS is not set
# CONFIG_SCSI_IN2000 is not set
# CONFIG_SCSI_AM53C974 is not set
# CONFIG_SCSI_MEGARAID is not set
# CONFIG_SCSI_BUSLOGIC is not set
# CONFIG_SCSI_CPQFCTS is not set
# CONFIG_SCSI_DMX3191D is not set
# CONFIG_SCSI_DTC3280 is not set
# CONFIG_SCSI_EATA is not set
# CONFIG_SCSI_EATA_DMA is not set
# CONFIG_SCSI_EATA_PIO is not set
# CONFIG_SCSI_FUTURE_DOMAIN is not set
# CONFIG_SCSI_GDTH is not set
# CONFIG_SCSI_GENERIC_NCR5380 is not set
# CONFIG_SCSI_INITIO is not set
# CONFIG_SCSI_INIA100 is not set
# CONFIG_SCSI_PPA is not set
# CONFIG_SCSI_IMM is not set
# CONFIG_SCSI_NCR53C406A is not set
# CONFIG_SCSI_NCR53C7xx is not set
# CONFIG_SCSI_NCR53C8XX is not set
# CONFIG_SCSI_SYM53C8XX is not set
# CONFIG_SCSI_PAS16 is not set
# CONFIG_SCSI_PCI2000 is not set
# CONFIG_SCSI_PCI2220I is not set
# CONFIG_SCSI_PSI240I is not set
# CONFIG_SCSI_QLOGIC_FAS is not set
# CONFIG_SCSI_QLOGIC_ISP is not set
# CONFIG_SCSI_QLOGIC_FC is not set
# CONFIG_SCSI_QLOGIC_1280 is not set
# CONFIG_SCSI_SIM710 is not set
# CONFIG_SCSI_SYM53C416 is not set
# CONFIG_SCSI_DC390T is not set
# CONFIG_SCSI_T128 is not set
# CONFIG_SCSI_U14_34F is not set
# CONFIG_SCSI_DEBUG is not set
CONFIG_A3000_SCSI=y
CONFIG_A4000T_SCSI=y
CONFIG_A2091_SCSI=y
CONFIG_GVP11_SCSI=y
CONFIG_CYBERSTORM_SCSI=y
CONFIG_CYBERSTORMII_SCSI=y
CONFIG_BLZ2060_SCSI=y
CONFIG_BLZ1230_SCSI=y
CONFIG_FASTLANE_SCSI=y
CONFIG_A4091_SCSI=y
CONFIG_WARPENGINE_SCSI=y
CONFIG_BLZ603EPLUS_SCSI=y
CONFIG_OKTAGON_SCSI=y

#
# IEEE 1394 (FireWire) support (EXPERIMENTAL)
#
# CONFIG_IEEE1394 is not set

#
# Network device support
#
CONFIG_NETDEVICES=y

#
# ARCnet devices
#
# CONFIG_ARCNET is not set
CONFIG_DUMMY=m
# CONFIG_BONDING is not set
# CONFIG_EQUALIZER is not set
CONFIG_TUN=m
# CONFIG_ETHERTAP is not set

#
# Ethernet (10 or 100Mbit)
#
CONFIG_NET_ETHERNET=y
# CONFIG_MACE is not set
# CONFIG_BMAC is not set
# CONFIG_GMAC is not set
CONFIG_ARIADNE=y
CONFIG_NE2K_ZORRO=y
CONFIG_A2065=y
CONFIG_HYDRA=y
# CONFIG_SUNLANCE is not set
# CONFIG_HAPPYMEAL is not set
# CONFIG_SUNBMAC is not set
# CONFIG_SUNQE is not set
# CONFIG_SUNLANCE is not set
# CONFIG_SUNGEM is not set
# CONFIG_NET_VENDOR_3COM is not set
# CONFIG_LANCE is not set
# CONFIG_NET_VENDOR_SMC is not set
# CONFIG_NET_VENDOR_RACAL is not set
# CONFIG_HP100 is not set
# CONFIG_NET_ISA is not set
# CONFIG_NET_PCI is not set
# CONFIG_NET_POCKET is not set

#
# Ethernet (1000 Mbit)
#
# CONFIG_ACENIC is not set
# CONFIG_DL2K is not set
# CONFIG_MYRI_SBUS is not set
# CONFIG_NS83820 is not set
# CONFIG_HAMACHI is not set
# CONFIG_YELLOWFIN is not set
# CONFIG_SK98LIN is not set
# CONFIG_FDDI is not set
# CONFIG_HIPPI is not set
CONFIG_PLIP=m
CONFIG_PPP=y
CONFIG_PPP_MULTILINK=y
CONFIG_PPP_FILTER=y
CONFIG_PPP_ASYNC=y
CONFIG_PPP_SYNC_TTY=y
CONFIG_PPP_DEFLATE=y
CONFIG_PPP_BSDCOMP=y
CONFIG_PPPOE=y
CONFIG_SLIP=y
CONFIG_SLIP_COMPRESSED=y
CONFIG_SLIP_SMART=y
CONFIG_SLIP_MODE_SLIP6=y

#
# Wireless LAN (non-hamradio)
#
# CONFIG_NET_RADIO is not set

#
# Token Ring devices
#
# CONFIG_TR is not set
# CONFIG_NET_FC is not set
# CONFIG_RCPCI is not set
# CONFIG_SHAPER is not set

#
# Wan interfaces
#
# CONFIG_WAN is not set

#
# Amateur Radio support
#
# CONFIG_HAMRADIO is not set

#
# IrDA (infrared) support
#
# CONFIG_IRDA is not set

#
# ISDN subsystem
#
# CONFIG_ISDN is not set

#
# Old CD-ROM drivers (not SCSI, not IDE)
#
# CONFIG_CD_NO_IDESCSI is not set

#
# Console drivers
#
# CONFIG_VGA_CONSOLE is not set

#
# Frame-buffer support
#
CONFIG_FB=y
CONFIG_DUMMY_CONSOLE=y
# CONFIG_FB_RIVA is not set
CONFIG_FB_CLGEN=y
CONFIG_FB_PM2=y
# CONFIG_FB_PM2_FIFO_DISCONNECT is not set
# CONFIG_FB_PM2_PCI is not set
CONFIG_FB_PM2_CVPPC=y
CONFIG_FB_CYBER2000=y
CONFIG_FB_AMIGA=y
CONFIG_FB_AMIGA_OCS=y
CONFIG_FB_AMIGA_ECS=y
CONFIG_FB_AMIGA_AGA=y
CONFIG_FB_CYBER=y
CONFIG_FB_VIRGE=y
CONFIG_FB_RETINAZ3=y
CONFIG_FB_FM2=y
# CONFIG_FB_OF is not set
# CONFIG_FB_CONTROL is not set
# CONFIG_FB_PLATINUM is not set
# CONFIG_FB_VALKYRIE is not set
# CONFIG_FB_CT65550 is not set
# CONFIG_FB_IMSTT is not set
# CONFIG_FB_S3TRIO is not set
# CONFIG_FB_VGA16 is not set
# CONFIG_FB_MATROX is not set
# CONFIG_FB_ATY is not set
# CONFIG_FB_RADEON is not set
# CONFIG_FB_ATY128 is not set
# CONFIG_FB_SIS is not set
# CONFIG_FB_3DFX is not set
# CONFIG_FB_VOODOO1 is not set
# CONFIG_FB_VIRTUAL is not set
CONFIG_FBCON_ADVANCED=y
# CONFIG_FBCON_MFB is not set
# CONFIG_FBCON_CFB2 is not set
# CONFIG_FBCON_CFB4 is not set
CONFIG_FBCON_CFB8=y
CONFIG_FBCON_CFB16=y
CONFIG_FBCON_CFB24=y
CONFIG_FBCON_CFB32=y
CONFIG_FBCON_AFB=y
CONFIG_FBCON_ILBM=y
# CONFIG_FBCON_IPLAN2P2 is not set
# CONFIG_FBCON_IPLAN2P4 is not set
# CONFIG_FBCON_IPLAN2P8 is not set
# CONFIG_FBCON_MAC is not set
# CONFIG_FBCON_VGA_PLANES is not set
# CONFIG_FBCON_VGA is not set
# CONFIG_FBCON_HGA is not set
# CONFIG_FBCON_FONTWIDTH8_ONLY is not set
CONFIG_FBCON_FONTS=y
CONFIG_FONT_8x8=y
CONFIG_FONT_8x16=y
CONFIG_FONT_SUN8x16=y
CONFIG_FONT_SUN12x22=y
CONFIG_FONT_6x11=y
CONFIG_FONT_PEARL_8x8=y
CONFIG_FONT_ACORN_8x8=y

#
# Input core support
#
CONFIG_INPUT=m
CONFIG_INPUT_KEYBDEV=m
CONFIG_INPUT_MOUSEDEV=m
CONFIG_INPUT_MOUSEDEV_SCREEN_X=1024
CONFIG_INPUT_MOUSEDEV_SCREEN_Y=768
CONFIG_INPUT_JOYDEV=m
CONFIG_INPUT_EVDEV=m

#
# Macintosh device drivers
#

#
# Character devices
#
CONFIG_VT=y
CONFIG_VT_CONSOLE=y
# CONFIG_SERIAL is not set
# CONFIG_SERIAL_EXTENDED is not set
# CONFIG_SERIAL_NONSTANDARD is not set
CONFIG_A2232=y
CONFIG_UNIX98_PTYS=y
CONFIG_UNIX98_PTY_COUNT=256
CONFIG_PRINTER=m
# CONFIG_LP_CONSOLE is not set
# CONFIG_PPDEV is not set

#
# I2C support
#
# CONFIG_I2C is not set

#
# Mice
#
CONFIG_BUSMOUSE=y
# CONFIG_ATIXL_BUSMOUSE is not set
# CONFIG_LOGIBUSMOUSE is not set
# CONFIG_MS_BUSMOUSE is not set
CONFIG_MOUSE=y
# CONFIG_PSMOUSE is not set
# CONFIG_82C710_MOUSE is not set
# CONFIG_PC110_PAD is not set

#
# Joysticks
#
# CONFIG_INPUT_GAMEPORT is not set
# CONFIG_INPUT_NS558 is not set
# CONFIG_INPUT_LIGHTNING is not set
# CONFIG_INPUT_PCIGAME is not set
# CONFIG_INPUT_CS461X is not set
# CONFIG_INPUT_EMU10K1 is not set
# CONFIG_INPUT_SERIO is not set
# CONFIG_INPUT_SERPORT is not set

#
# Joysticks
#
# CONFIG_INPUT_ANALOG is not set
# CONFIG_INPUT_A3D is not set
# CONFIG_INPUT_ADI is not set
# CONFIG_INPUT_COBRA is not set
# CONFIG_INPUT_GF2K is not set
# CONFIG_INPUT_GRIP is not set
# CONFIG_INPUT_INTERACT is not set
# CONFIG_INPUT_TMDC is not set
# CONFIG_INPUT_SIDEWINDER is not set
# CONFIG_INPUT_IFORCE_USB is not set
# CONFIG_INPUT_IFORCE_232 is not set
# CONFIG_INPUT_WARRIOR is not set
# CONFIG_INPUT_MAGELLAN is not set
# CONFIG_INPUT_SPACEORB is not set
# CONFIG_INPUT_SPACEBALL is not set
# CONFIG_INPUT_STINGER is not set
# CONFIG_INPUT_DB9 is not set
# CONFIG_INPUT_GAMECON is not set
# CONFIG_INPUT_TURBOGRAFX is not set
# CONFIG_INPUT_AMIJOY is not set
# CONFIG_QIC02_TAPE is not set

#
# Watchdog Cards
#
# CONFIG_WATCHDOG is not set
# CONFIG_INTEL_RNG is not set
# CONFIG_NVRAM is not set
# CONFIG_RTC is not set
# CONFIG_DTLK is not set
# CONFIG_R3964 is not set
# CONFIG_APPLICOM is not set

#
# Ftape, the floppy tape device driver
#
# CONFIG_FTAPE is not set
# CONFIG_AGP is not set
# CONFIG_DRM is not set

#
# Multimedia devices
#
# CONFIG_VIDEO_DEV is not set

#
# File systems
#
# CONFIG_QUOTA is not set
CONFIG_AUTOFS_FS=m
CONFIG_AUTOFS4_FS=m
# CONFIG_REISERFS_FS is not set
# CONFIG_REISERFS_CHECK is not set
# CONFIG_ADFS_FS is not set
# CONFIG_ADFS_FS_RW is not set
CONFIG_AFFS_FS=y
CONFIG_HFS_FS=y
# CONFIG_BFS_FS is not set
CONFIG_FAT_FS=y
CONFIG_MSDOS_FS=y
# CONFIG_UMSDOS_FS is not set
CONFIG_VFAT_FS=y
# CONFIG_EFS_FS is not set
# CONFIG_JFFS_FS is not set
# CONFIG_JFFS2_FS is not set
CONFIG_CRAMFS=y
CONFIG_TMPFS=y
CONFIG_RAMFS=m
CONFIG_ISO9660_FS=y
CONFIG_JOLIET=y
CONFIG_MINIX_FS=y
# CONFIG_VXFS_FS is not set
# CONFIG_NTFS_FS is not set
# CONFIG_NTFS_RW is not set
# CONFIG_HPFS_FS is not set
CONFIG_PROC_FS=y
# CONFIG_DEVFS_FS is not set
# CONFIG_DEVFS_MOUNT is not set
# CONFIG_DEVFS_DEBUG is not set
CONFIG_DEVPTS_FS=y
# CONFIG_QNX4FS_FS is not set
# CONFIG_QNX4FS_RW is not set
CONFIG_ROMFS_FS=y
CONFIG_EXT2_FS=y
# CONFIG_SYSV_FS is not set
# CONFIG_UDF_FS is not set
# CONFIG_UDF_RW is not set
# CONFIG_UFS_FS is not set
# CONFIG_UFS_FS_WRITE is not set

#
# Network File Systems
#
CONFIG_CODA_FS=m
CONFIG_NFS_FS=y
CONFIG_NFS_V3=y
# CONFIG_ROOT_NFS is not set
CONFIG_NFSD=m
CONFIG_NFSD_V3=y
CONFIG_SUNRPC=y
CONFIG_LOCKD=y
CONFIG_LOCKD_V4=y
CONFIG_SMB_FS=m
# CONFIG_SMB_NLS_DEFAULT is not set
# CONFIG_NCP_FS is not set
# CONFIG_NCPFS_PACKET_SIGNING is not set
# CONFIG_NCPFS_IOCTL_LOCKING is not set
# CONFIG_NCPFS_STRONG is not set
# CONFIG_NCPFS_NFS_NS is not set
# CONFIG_NCPFS_OS2_NS is not set
# CONFIG_NCPFS_SMALLDOS is not set
# CONFIG_NCPFS_NLS is not set
# CONFIG_NCPFS_EXTRAS is not set

#
# Partition Types
#
CONFIG_PARTITION_ADVANCED=y
# CONFIG_ACORN_PARTITION is not set
# CONFIG_OSF_PARTITION is not set
CONFIG_AMIGA_PARTITION=y
CONFIG_ATARI_PARTITION=y
# CONFIG_MAC_PARTITION is not set
CONFIG_MSDOS_PARTITION=y
CONFIG_BSD_DISKLABEL=y
# CONFIG_MINIX_SUBPARTITION is not set
CONFIG_SOLARIS_X86_PARTITION=y
CONFIG_UNIXWARE_DISKLABEL=y
# CONFIG_LDM_PARTITION is not set
# CONFIG_SGI_PARTITION is not set
# CONFIG_ULTRIX_PARTITION is not set
# CONFIG_SUN_PARTITION is not set
CONFIG_SMB_NLS=y
CONFIG_NLS=y

#
# Native Language Support
#
CONFIG_NLS_DEFAULT="iso8859-1"
CONFIG_NLS_CODEPAGE_437=m
CONFIG_NLS_CODEPAGE_737=m
CONFIG_NLS_CODEPAGE_775=m
CONFIG_NLS_CODEPAGE_850=m
CONFIG_NLS_CODEPAGE_852=m
CONFIG_NLS_CODEPAGE_855=m
CONFIG_NLS_CODEPAGE_857=m
CONFIG_NLS_CODEPAGE_860=m
CONFIG_NLS_CODEPAGE_861=m
CONFIG_NLS_CODEPAGE_862=m
CONFIG_NLS_CODEPAGE_863=m
CONFIG_NLS_CODEPAGE_864=m
CONFIG_NLS_CODEPAGE_865=m
CONFIG_NLS_CODEPAGE_866=m
CONFIG_NLS_CODEPAGE_869=m
CONFIG_NLS_CODEPAGE_936=m
CONFIG_NLS_CODEPAGE_950=m
CONFIG_NLS_CODEPAGE_932=m
CONFIG_NLS_CODEPAGE_949=m
CONFIG_NLS_CODEPAGE_874=m
CONFIG_NLS_ISO8859_8=m
CONFIG_NLS_CODEPAGE_1251=m
CONFIG_NLS_ISO8859_1=m
CONFIG_NLS_ISO8859_2=m
CONFIG_NLS_ISO8859_3=m
CONFIG_NLS_ISO8859_4=m
CONFIG_NLS_ISO8859_5=m
CONFIG_NLS_ISO8859_6=m
CONFIG_NLS_ISO8859_7=m
CONFIG_NLS_ISO8859_9=m
CONFIG_NLS_ISO8859_13=m
CONFIG_NLS_ISO8859_14=m
CONFIG_NLS_ISO8859_15=m
CONFIG_NLS_KOI8_R=m
CONFIG_NLS_KOI8_U=m
CONFIG_NLS_UTF8=m

#
# Sound
#
CONFIG_SOUND=y
CONFIG_DMASOUND_PAULA=m
CONFIG_DMASOUND=m
# CONFIG_SOUND_BT878 is not set
# CONFIG_SOUND_CMPCI is not set
# CONFIG_SOUND_EMU10K1 is not set
# CONFIG_MIDI_EMU10K1 is not set
# CONFIG_SOUND_FUSION is not set
# CONFIG_SOUND_CS4281 is not set
# CONFIG_SOUND_ES1370 is not set
# CONFIG_SOUND_ES1371 is not set
# CONFIG_SOUND_ESSSOLO1 is not set
# CONFIG_SOUND_MAESTRO is not set
# CONFIG_SOUND_MAESTRO3 is not set
# CONFIG_SOUND_ICH is not set
# CONFIG_SOUND_RME96XX is not set
# CONFIG_SOUND_SONICVIBES is not set
# CONFIG_SOUND_TRIDENT is not set
# CONFIG_SOUND_MSNDCLAS is not set
# CONFIG_SOUND_MSNDPIN is not set
# CONFIG_SOUND_VIA82CXXX is not set
# CONFIG_MIDI_VIA82CXXX is not set
CONFIG_SOUND_OSS=m
CONFIG_SOUND_TRACEINIT=y
CONFIG_SOUND_DMAP=y
# CONFIG_SOUND_AD1816 is not set
# CONFIG_SOUND_SGALAXY is not set
# CONFIG_SOUND_ADLIB is not set
# CONFIG_SOUND_ACI_MIXER is not set
# CONFIG_SOUND_CS4232 is not set
# CONFIG_SOUND_SSCAPE is not set
# CONFIG_SOUND_GUS is not set
CONFIG_SOUND_VMIDI=m
# CONFIG_SOUND_TRIX is not set
# CONFIG_SOUND_MSS is not set
# CONFIG_SOUND_MPU401 is not set
# CONFIG_SOUND_NM256 is not set
# CONFIG_SOUND_MAD16 is not set
# CONFIG_SOUND_PAS is not set
# CONFIG_PAS_JOYSTICK is not set
# CONFIG_SOUND_PSS is not set
# CONFIG_SOUND_SB is not set
# CONFIG_SOUND_AWE32_SYNTH is not set
# CONFIG_SOUND_WAVEFRONT is not set
# CONFIG_SOUND_MAUI is not set
# CONFIG_SOUND_YM3812 is not set
# CONFIG_SOUND_OPL3SA1 is not set
# CONFIG_SOUND_OPL3SA2 is not set
# CONFIG_SOUND_YMFPCI is not set
# CONFIG_SOUND_YMFPCI_LEGACY is not set
# CONFIG_SOUND_UART6850 is not set
# CONFIG_SOUND_AEDSP16 is not set
# CONFIG_SOUND_TVMIXER is not set

#
# USB support
#
# CONFIG_USB is not set

#
# USB Controllers
#
# CONFIG_USB_UHCI is not set
# CONFIG_USB_UHCI_ALT is not set
# CONFIG_USB_OHCI is not set

#
# USB Device Class drivers
#
# CONFIG_USB_AUDIO is not set
# CONFIG_USB_BLUETOOTH is not set
# CONFIG_USB_STORAGE is not set
# CONFIG_USB_STORAGE_DEBUG is not set
# CONFIG_USB_STORAGE_DATAFAB is not set
# CONFIG_USB_STORAGE_FREECOM is not set
# CONFIG_USB_STORAGE_ISD200 is not set
# CONFIG_USB_STORAGE_DPCM is not set
# CONFIG_USB_STORAGE_HP8200e is not set
# CONFIG_USB_STORAGE_SDDR09 is not set
# CONFIG_USB_STORAGE_JUMPSHOT is not set
# CONFIG_USB_ACM is not set
# CONFIG_USB_PRINTER is not set

#
# USB Human Interface Devices (HID)
#
# CONFIG_USB_HID is not set
# CONFIG_USB_HIDDEV is not set
# CONFIG_USB_KBD is not set
# CONFIG_USB_MOUSE is not set
# CONFIG_USB_WACOM is not set

#
# USB Imaging devices
#
# CONFIG_USB_DC2XX is not set
# CONFIG_USB_MDC800 is not set
# CONFIG_USB_SCANNER is not set
# CONFIG_USB_MICROTEK is not set
# CONFIG_USB_HPUSBSCSI is not set

#
# USB Multimedia devices
#

#
#   Video4Linux support is needed for USB Multimedia device support
#

#
# USB Network adaptors
#
# CONFIG_USB_PEGASUS is not set
# CONFIG_USB_KAWETH is not set
# CONFIG_USB_CATC is not set
# CONFIG_USB_CDCETHER is not set
# CONFIG_USB_USBNET is not set

#
# USB port drivers
#
# CONFIG_USB_USS720 is not set

#
# USB Serial Converter support
#
# CONFIG_USB_SERIAL is not set
# CONFIG_USB_SERIAL_GENERIC is not set
# CONFIG_USB_SERIAL_BELKIN is not set
# CONFIG_USB_SERIAL_WHITEHEAT is not set
# CONFIG_USB_SERIAL_DIGI_ACCELEPORT is not set
# CONFIG_USB_SERIAL_EMPEG is not set
# CONFIG_USB_SERIAL_FTDI_SIO is not set
# CONFIG_USB_SERIAL_VISOR is not set
# CONFIG_USB_SERIAL_IR is not set
# CONFIG_USB_SERIAL_EDGEPORT is not set
# CONFIG_USB_SERIAL_KEYSPAN_PDA is not set
# CONFIG_USB_SERIAL_KEYSPAN is not set
# CONFIG_USB_SERIAL_KEYSPAN_USA28 is not set
# CONFIG_USB_SERIAL_KEYSPAN_USA28X is not set
# CONFIG_USB_SERIAL_KEYSPAN_USA28XA is not set
# CONFIG_USB_SERIAL_KEYSPAN_USA28XB is not set
# CONFIG_USB_SERIAL_KEYSPAN_USA19 is not set
# CONFIG_USB_SERIAL_KEYSPAN_USA18X is not set
# CONFIG_USB_SERIAL_KEYSPAN_USA19W is not set
# CONFIG_USB_SERIAL_KEYSPAN_USA49W is not set
# CONFIG_USB_SERIAL_MCT_U232 is not set
# CONFIG_USB_SERIAL_PL2303 is not set
# CONFIG_USB_SERIAL_CYBERJACK is not set
# CONFIG_USB_SERIAL_XIRCOM is not set
# CONFIG_USB_SERIAL_OMNINET is not set

#
# USB Miscellaneous drivers
#
# CONFIG_USB_RIO500 is not set

#
# Bluetooth support
#
# CONFIG_BLUEZ is not set

#
# Kernel hacking
#
CONFIG_MAGIC_SYSRQ=y
# CONFIG_KGDB is not set
# CONFIG_XMON is not set
#
# Automatically generated make config: don't edit
#
# CONFIG_UID16 is not set
# CONFIG_RWSEM_GENERIC_SPINLOCK is not set
CONFIG_RWSEM_XCHGADD_ALGORITHM=y
CONFIG_HAVE_DEC_LOCK=y

#
# Code maturity level options
#
CONFIG_EXPERIMENTAL=y

#
# Loadable module support
#
CONFIG_MODULES=y
CONFIG_MODVERSIONS=y
CONFIG_KMOD=y

#
# Platform support
#
CONFIG_PPC=y
CONFIG_PPC32=y
CONFIG_6xx=y
# CONFIG_4xx is not set
# CONFIG_POWER3 is not set
# CONFIG_POWER4 is not set
# CONFIG_8xx is not set
# CONFIG_8260 is not set
CONFIG_PPC_STD_MMU=y
CONFIG_ALL_PPC=y
# CONFIG_APUS is not set
# CONFIG_GEMINI is not set
# CONFIG_SMP is not set
CONFIG_ALTIVEC=y
CONFIG_TAU=y
# CONFIG_TAU_INT is not set
# CONFIG_TAU_AVERAGE is not set

#
# General setup
#
# CONFIG_HIGHMEM is not set
# CONFIG_ISA is not set
# CONFIG_EISA is not set
# CONFIG_SBUS is not set
# CONFIG_MCA is not set
CONFIG_PCI=y
CONFIG_NET=y
CONFIG_SYSCTL=y
CONFIG_SYSVIPC=y
# CONFIG_BSD_PROCESS_ACCT is not set
CONFIG_KCORE_ELF=y
CONFIG_BINFMT_ELF=y
CONFIG_KERNEL_ELF=y
CONFIG_BINFMT_MISC=m
CONFIG_PCI_NAMES=y
CONFIG_HOTPLUG=y

#
# PCMCIA/CardBus support
#
# CONFIG_PCMCIA is not set

#
# Parallel port support
#
# CONFIG_PARPORT is not set
CONFIG_PPC_RTC=y
CONFIG_PPC601_SYNC_FIX=y
CONFIG_PROC_DEVICETREE=y
CONFIG_PPC_RTAS=y
CONFIG_BOOTX_TEXT=y
CONFIG_PREP_RESIDUAL=y
CONFIG_CMDLINE_BOOL=y
CONFIG_CMDLINE="console=ttyS0,9600 console=tty0 root=/dev/sda2"

#
# Memory Technology Devices (MTD)
#
# CONFIG_MTD is not set

#
# Plug and Play configuration
#
# CONFIG_PNP is not set
# CONFIG_ISAPNP is not set

#
# Block devices
#
CONFIG_BLK_DEV_FD=m
# CONFIG_BLK_DEV_XD is not set
# CONFIG_PARIDE is not set
# CONFIG_BLK_CPQ_DA is not set
# CONFIG_BLK_CPQ_CISS_DA is not set
# CONFIG_BLK_DEV_DAC960 is not set
CONFIG_BLK_DEV_LOOP=y
# CONFIG_BLK_DEV_NBD is not set
CONFIG_BLK_DEV_RAM=y
CONFIG_BLK_DEV_RAM_SIZE=4096
CONFIG_BLK_DEV_INITRD=y

#
# Multi-device support (RAID and LVM)
#
# CONFIG_MD is not set
# CONFIG_BLK_DEV_MD is not set
# CONFIG_MD_LINEAR is not set
# CONFIG_MD_RAID0 is not set
# CONFIG_MD_RAID1 is not set
# CONFIG_MD_RAID5 is not set
# CONFIG_MD_MULTIPATH is not set
# CONFIG_BLK_DEV_LVM is not set

#
# Networking options
#
CONFIG_PACKET=y
# CONFIG_PACKET_MMAP is not set
# CONFIG_NETLINK_DEV is not set
CONFIG_NETFILTER=y
# CONFIG_NETFILTER_DEBUG is not set
# CONFIG_FILTER is not set
CONFIG_UNIX=y
CONFIG_INET=y
CONFIG_IP_MULTICAST=y
# CONFIG_IP_ADVANCED_ROUTER is not set
# CONFIG_IP_PNP is not set
# CONFIG_NET_IPIP is not set
# CONFIG_NET_IPGRE is not set
# CONFIG_IP_MROUTE is not set
# CONFIG_ARPD is not set
# CONFIG_INET_ECN is not set
CONFIG_SYN_COOKIES=y

#
#   IP: Netfilter Configuration
#
CONFIG_IP_NF_CONNTRACK=m
CONFIG_IP_NF_FTP=m
CONFIG_IP_NF_IRC=m
# CONFIG_IP_NF_QUEUE is not set
CONFIG_IP_NF_IPTABLES=m
CONFIG_IP_NF_MATCH_LIMIT=m
CONFIG_IP_NF_MATCH_MAC=m
CONFIG_IP_NF_MATCH_MARK=m
CONFIG_IP_NF_MATCH_MULTIPORT=m
CONFIG_IP_NF_MATCH_TOS=m
CONFIG_IP_NF_MATCH_LENGTH=m
CONFIG_IP_NF_MATCH_TTL=m
CONFIG_IP_NF_MATCH_TCPMSS=m
CONFIG_IP_NF_MATCH_STATE=m
CONFIG_IP_NF_MATCH_UNCLEAN=m
CONFIG_IP_NF_MATCH_OWNER=m
CONFIG_IP_NF_FILTER=m
CONFIG_IP_NF_TARGET_REJECT=m
CONFIG_IP_NF_TARGET_MIRROR=m
CONFIG_IP_NF_NAT=m
CONFIG_IP_NF_NAT_NEEDED=y
CONFIG_IP_NF_TARGET_MASQUERADE=m
CONFIG_IP_NF_TARGET_REDIRECT=m
CONFIG_IP_NF_NAT_SNMP_BASIC=m
CONFIG_IP_NF_NAT_IRC=m
CONFIG_IP_NF_NAT_FTP=m
# CONFIG_IP_NF_MANGLE is not set
# CONFIG_IP_NF_TARGET_LOG is not set
CONFIG_IP_NF_TARGET_TCPMSS=m
CONFIG_IP_NF_COMPAT_IPCHAINS=m
CONFIG_IP_NF_NAT_NEEDED=y
# CONFIG_IP_NF_COMPAT_IPFWADM is not set
# CONFIG_IPV6 is not set
# CONFIG_KHTTPD is not set
# CONFIG_ATM is not set
# CONFIG_VLAN_8021Q is not set

#
#  
#
# CONFIG_IPX is not set
CONFIG_ATALK=m
# CONFIG_DECNET is not set
# CONFIG_BRIDGE is not set
# CONFIG_X25 is not set
# CONFIG_LAPB is not set
# CONFIG_LLC is not set
# CONFIG_NET_DIVERT is not set
# CONFIG_ECONET is not set
# CONFIG_WAN_ROUTER is not set
# CONFIG_NET_FASTROUTE is not set
# CONFIG_NET_HW_FLOWCONTROL is not set

#
# QoS and/or fair queueing
#
# CONFIG_NET_SCHED is not set

#
# ATA/IDE/MFM/RLL support
#
CONFIG_IDE=y

#
# IDE, ATA and ATAPI Block devices
#
CONFIG_BLK_DEV_IDE=y

#
# Please see Documentation/ide.txt for help/info on IDE drives
#
# CONFIG_BLK_DEV_HD_IDE is not set
# CONFIG_BLK_DEV_HD is not set
CONFIG_BLK_DEV_IDEDISK=y
# CONFIG_IDEDISK_MULTI_MODE is not set
# CONFIG_BLK_DEV_IDEDISK_VENDOR is not set
# CONFIG_BLK_DEV_IDEDISK_FUJITSU is not set
# CONFIG_BLK_DEV_IDEDISK_IBM is not set
# CONFIG_BLK_DEV_IDEDISK_MAXTOR is not set
# CONFIG_BLK_DEV_IDEDISK_QUANTUM is not set
# CONFIG_BLK_DEV_IDEDISK_SEAGATE is not set
# CONFIG_BLK_DEV_IDEDISK_WD is not set
# CONFIG_BLK_DEV_COMMERIAL is not set
# CONFIG_BLK_DEV_TIVO is not set
# CONFIG_BLK_DEV_IDECS is not set
CONFIG_BLK_DEV_IDECD=y
# CONFIG_BLK_DEV_IDETAPE is not set
CONFIG_BLK_DEV_IDEFLOPPY=y
CONFIG_BLK_DEV_IDESCSI=y

#
# IDE chipset support/bugfixes
#
# CONFIG_BLK_DEV_CMD640 is not set
# CONFIG_BLK_DEV_CMD640_ENHANCED is not set
# CONFIG_BLK_DEV_ISAPNP is not set
# CONFIG_BLK_DEV_RZ1000 is not set
CONFIG_BLK_DEV_IDEPCI=y
CONFIG_IDEPCI_SHARE_IRQ=y
CONFIG_BLK_DEV_IDEDMA_PCI=y
CONFIG_BLK_DEV_ADMA=y
# CONFIG_BLK_DEV_OFFBOARD is not set
CONFIG_IDEDMA_PCI_AUTO=y
CONFIG_BLK_DEV_IDEDMA=y
# CONFIG_IDEDMA_PCI_WIP is not set
# CONFIG_IDEDMA_NEW_DRIVE_LISTINGS is not set
# CONFIG_BLK_DEV_AEC62XX is not set
# CONFIG_AEC62XX_TUNING is not set
# CONFIG_BLK_DEV_ALI15X3 is not set
# CONFIG_WDC_ALI15X3 is not set
# CONFIG_BLK_DEV_AMD74XX is not set
# CONFIG_AMD74XX_OVERRIDE is not set
CONFIG_BLK_DEV_CMD64X=y
# CONFIG_BLK_DEV_CY82C693 is not set
# CONFIG_BLK_DEV_CS5530 is not set
# CONFIG_BLK_DEV_HPT34X is not set
# CONFIG_HPT34X_AUTODMA is not set
# CONFIG_BLK_DEV_HPT366 is not set
# CONFIG_BLK_DEV_NS87415 is not set
# CONFIG_BLK_DEV_OPTI621 is not set
# CONFIG_BLK_DEV_PDC202XX is not set
# CONFIG_PDC202XX_BURST is not set
# CONFIG_PDC202XX_FORCE is not set
# CONFIG_BLK_DEV_SVWKS is not set
# CONFIG_BLK_DEV_SIS5513 is not set
# CONFIG_BLK_DEV_SLC90E66 is not set
# CONFIG_BLK_DEV_TRM290 is not set
# CONFIG_BLK_DEV_VIA82CXXX is not set
CONFIG_BLK_DEV_SL82C105=y
CONFIG_BLK_DEV_IDE_PMAC=y
CONFIG_BLK_DEV_IDEDMA_PMAC=y
CONFIG_BLK_DEV_IDEDMA_PMAC_AUTO=y
CONFIG_BLK_DEV_IDEDMA=y
CONFIG_BLK_DEV_IDEPCI=y
# CONFIG_IDE_CHIPSETS is not set
CONFIG_IDEDMA_AUTO=y
# CONFIG_IDEDMA_IVB is not set
# CONFIG_DMA_NONPCI is not set
CONFIG_BLK_DEV_IDE_MODES=y
# CONFIG_BLK_DEV_ATARAID is not set
# CONFIG_BLK_DEV_ATARAID_PDC is not set
# CONFIG_BLK_DEV_ATARAID_HPT is not set

#
# SCSI support
#
CONFIG_SCSI=y

#
# SCSI support type (disk, tape, CD-ROM)
#
CONFIG_BLK_DEV_SD=y
CONFIG_SD_EXTRA_DEVS=40
CONFIG_CHR_DEV_ST=y
# CONFIG_CHR_DEV_OSST is not set
CONFIG_BLK_DEV_SR=y
CONFIG_BLK_DEV_SR_VENDOR=y
CONFIG_SR_EXTRA_DEVS=2
CONFIG_CHR_DEV_SG=y

#
# Some SCSI devices (e.g. CD jukebox) support multiple LUNs
#
# CONFIG_SCSI_DEBUG_QUEUES is not set
# CONFIG_SCSI_MULTI_LUN is not set
CONFIG_SCSI_CONSTANTS=y
# CONFIG_SCSI_LOGGING is not set

#
# SCSI low-level drivers
#
# CONFIG_BLK_DEV_3W_XXXX_RAID is not set
# CONFIG_SCSI_7000FASST is not set
# CONFIG_SCSI_ACARD is not set
# CONFIG_SCSI_AHA152X is not set
# CONFIG_SCSI_AHA1542 is not set
# CONFIG_SCSI_AHA1740 is not set
CONFIG_SCSI_AIC7XXX=m
CONFIG_AIC7XXX_CMDS_PER_DEVICE=253
CONFIG_AIC7XXX_RESET_DELAY_MS=15000
# CONFIG_AIC7XXX_BUILD_FIRMWARE is not set
CONFIG_SCSI_AIC7XXX_OLD=m
# CONFIG_AIC7XXX_OLD_TCQ_ON_BY_DEFAULT is not set
CONFIG_AIC7XXX_OLD_CMDS_PER_DEVICE=8
CONFIG_AIC7XXX_OLD_PROC_STATS=y
# CONFIG_SCSI_DPT_I2O is not set
CONFIG_SCSI_ADVANSYS=m
# CONFIG_SCSI_IN2000 is not set
# CONFIG_SCSI_AM53C974 is not set
# CONFIG_SCSI_MEGARAID is not set
# CONFIG_SCSI_BUSLOGIC is not set
# CONFIG_SCSI_CPQFCTS is not set
# CONFIG_SCSI_DMX3191D is not set
# CONFIG_SCSI_DTC3280 is not set
# CONFIG_SCSI_EATA is not set
# CONFIG_SCSI_EATA_DMA is not set
# CONFIG_SCSI_EATA_PIO is not set
# CONFIG_SCSI_FUTURE_DOMAIN is not set
# CONFIG_SCSI_GDTH is not set
# CONFIG_SCSI_GENERIC_NCR5380 is not set
# CONFIG_SCSI_INITIO is not set
# CONFIG_SCSI_INIA100 is not set
# CONFIG_SCSI_NCR53C406A is not set
# CONFIG_SCSI_NCR53C7xx is not set
CONFIG_SCSI_SYM53C8XX_2=y
CONFIG_SCSI_SYM53C8XX_DMA_ADDRESSING_MODE=0
CONFIG_SCSI_SYM53C8XX_DEFAULT_TAGS=16
CONFIG_SCSI_SYM53C8XX_MAX_TAGS=64
# CONFIG_SCSI_SYM53C8XX_IOMAPPED is not set
# CONFIG_SCSI_PAS16 is not set
# CONFIG_SCSI_PCI2000 is not set
# CONFIG_SCSI_PCI2220I is not set
# CONFIG_SCSI_PSI240I is not set
# CONFIG_SCSI_QLOGIC_FAS is not set
# CONFIG_SCSI_QLOGIC_ISP is not set
# CONFIG_SCSI_QLOGIC_FC is not set
# CONFIG_SCSI_QLOGIC_1280 is not set
# CONFIG_SCSI_SIM710 is not set
# CONFIG_SCSI_SYM53C416 is not set
# CONFIG_SCSI_DC390T is not set
# CONFIG_SCSI_T128 is not set
# CONFIG_SCSI_U14_34F is not set
# CONFIG_SCSI_DEBUG is not set
CONFIG_SCSI_MESH=y
CONFIG_SCSI_MESH_SYNC_RATE=5
CONFIG_SCSI_MAC53C94=y

#
# IEEE 1394 (FireWire) support (EXPERIMENTAL)
#
# CONFIG_IEEE1394 is not set

#
# Network device support
#
CONFIG_NETDEVICES=y

#
# ARCnet devices
#
# CONFIG_ARCNET is not set

#
# Appletalk devices
#
# CONFIG_LTPC is not set
# CONFIG_COPS is not set
# CONFIG_IPDDP is not set
# CONFIG_DUMMY is not set
# CONFIG_BONDING is not set
# CONFIG_EQUALIZER is not set
# CONFIG_TUN is not set
# CONFIG_ETHERTAP is not set

#
# Ethernet (10 or 100Mbit)
#
CONFIG_NET_ETHERNET=y
CONFIG_MACE=y
# CONFIG_MACE_AAUI_PORT is not set
CONFIG_BMAC=y
CONFIG_GMAC=y
# CONFIG_SUNLANCE is not set
# CONFIG_HAPPYMEAL is not set
# CONFIG_SUNBMAC is not set
# CONFIG_SUNQE is not set
# CONFIG_SUNLANCE is not set
# CONFIG_SUNGEM is not set
# CONFIG_NET_VENDOR_3COM is not set
# CONFIG_LANCE is not set
# CONFIG_NET_VENDOR_SMC is not set
# CONFIG_NET_VENDOR_RACAL is not set
# CONFIG_HP100 is not set
# CONFIG_NET_ISA is not set
CONFIG_NET_PCI=y
CONFIG_PCNET32=y
# CONFIG_ADAPTEC_STARFIRE is not set
# CONFIG_APRICOT is not set
# CONFIG_CS89x0 is not set
CONFIG_TULIP=y
# CONFIG_TULIP_MWI is not set
CONFIG_TULIP_MMIO=y
CONFIG_DE4X5=m
# CONFIG_DGRS is not set
# CONFIG_DM9102 is not set
# CONFIG_EEPRO100 is not set
# CONFIG_LNE390 is not set
# CONFIG_FEALNX is not set
# CONFIG_NATSEMI is not set
# CONFIG_NE2K_PCI is not set
# CONFIG_NE3210 is not set
# CONFIG_ES3210 is not set
# CONFIG_8139CP is not set
# CONFIG_8139TOO is not set
# CONFIG_8139TOO_PIO is not set
# CONFIG_8139TOO_TUNE_TWISTER is not set
# CONFIG_8139TOO_8129 is not set
# CONFIG_SIS900 is not set
# CONFIG_EPIC100 is not set
# CONFIG_SUNDANCE is not set
# CONFIG_TLAN is not set
# CONFIG_VIA_RHINE is not set
# CONFIG_VIA_RHINE_MMIO is not set
# CONFIG_WINBOND_840 is not set
# CONFIG_NET_POCKET is not set

#
# Ethernet (1000 Mbit)
#
# CONFIG_ACENIC is not set
# CONFIG_DL2K is not set
# CONFIG_MYRI_SBUS is not set
# CONFIG_NS83820 is not set
# CONFIG_HAMACHI is not set
# CONFIG_YELLOWFIN is not set
# CONFIG_SK98LIN is not set
# CONFIG_FDDI is not set
# CONFIG_HIPPI is not set
# CONFIG_PLIP is not set
CONFIG_PPP=y
CONFIG_PPP_MULTILINK=y
# CONFIG_PPP_FILTER is not set
CONFIG_PPP_ASYNC=y
# CONFIG_PPP_SYNC_TTY is not set
CONFIG_PPP_DEFLATE=y
# CONFIG_PPP_BSDCOMP is not set
# CONFIG_PPPOE is not set
# CONFIG_SLIP is not set

#
# Wireless LAN (non-hamradio)
#
CONFIG_NET_RADIO=y
# CONFIG_STRIP is not set
# CONFIG_WAVELAN is not set
# CONFIG_ARLAN is not set
# CONFIG_AIRONET4500 is not set
# CONFIG_AIRONET4500_NONCS is not set
# CONFIG_AIRONET4500_PROC is not set
# CONFIG_AIRO is not set
CONFIG_HERMES=m
CONFIG_APPLE_AIRPORT=m
# CONFIG_PLX_HERMES is not set
CONFIG_NET_WIRELESS=y

#
# Token Ring devices
#
# CONFIG_TR is not set
# CONFIG_NET_FC is not set
# CONFIG_RCPCI is not set
# CONFIG_SHAPER is not set

#
# Wan interfaces
#
# CONFIG_WAN is not set

#
# Amateur Radio support
#
# CONFIG_HAMRADIO is not set

#
# IrDA (infrared) support
#
# CONFIG_IRDA is not set

#
# ISDN subsystem
#
# CONFIG_ISDN is not set

#
# Old CD-ROM drivers (not SCSI, not IDE)
#
# CONFIG_CD_NO_IDESCSI is not set

#
# Console drivers
#
CONFIG_VGA_CONSOLE=y

#
# Frame-buffer support
#
CONFIG_FB=y
CONFIG_DUMMY_CONSOLE=y
# CONFIG_FB_RIVA is not set
# CONFIG_FB_CLGEN is not set
# CONFIG_FB_PM2 is not set
# CONFIG_FB_CYBER2000 is not set
CONFIG_FB_OF=y
CONFIG_FB_CONTROL=y
CONFIG_FB_PLATINUM=y
CONFIG_FB_VALKYRIE=y
CONFIG_FB_CT65550=y
CONFIG_FB_IMSTT=y
# CONFIG_FB_S3TRIO is not set
# CONFIG_FB_VGA16 is not set
CONFIG_FB_MATROX=y
CONFIG_FB_MATROX_MILLENIUM=y
CONFIG_FB_MATROX_MYSTIQUE=y
# CONFIG_FB_MATROX_G100 is not set
# CONFIG_FB_MATROX_I2C is not set
# CONFIG_FB_MATROX_G450 is not set
# CONFIG_FB_MATROX_MULTIHEAD is not set
CONFIG_FB_ATY=y
CONFIG_FB_ATY_GX=y
CONFIG_FB_ATY_CT=y
CONFIG_FB_RADEON=y
CONFIG_FB_ATY128=y
# CONFIG_FB_SIS is not set
CONFIG_FB_3DFX=y
# CONFIG_FB_VOODOO1 is not set
# CONFIG_FB_VIRTUAL is not set
# CONFIG_FBCON_ADVANCED is not set
CONFIG_FBCON_CFB8=y
CONFIG_FBCON_CFB16=y
CONFIG_FBCON_CFB24=y
CONFIG_FBCON_CFB32=y
# CONFIG_FBCON_FONTWIDTH8_ONLY is not set
CONFIG_FBCON_FONTS=y
# CONFIG_FONT_8x8 is not set
CONFIG_FONT_8x16=y
CONFIG_FONT_SUN8x16=y
CONFIG_FONT_SUN12x22=y
# CONFIG_FONT_6x11 is not set
# CONFIG_FONT_PEARL_8x8 is not set
# CONFIG_FONT_ACORN_8x8 is not set
# CONFIG_FB_COMPAT_XPMAC is not set

#
# Input core support
#
CONFIG_INPUT=y
CONFIG_INPUT_KEYBDEV=y
CONFIG_INPUT_MOUSEDEV=y
CONFIG_INPUT_MOUSEDEV_SCREEN_X=1024
CONFIG_INPUT_MOUSEDEV_SCREEN_Y=768
# CONFIG_INPUT_JOYDEV is not set
CONFIG_INPUT_EVDEV=y

#
# Macintosh device drivers
#
CONFIG_ADB_CUDA=y
CONFIG_ADB_PMU=y
# CONFIG_PMAC_PBOOK is not set
# CONFIG_PMAC_BACKLIGHT is not set
# CONFIG_MAC_FLOPPY is not set
CONFIG_MAC_SERIAL=m
CONFIG_ADB=y
CONFIG_ADB_MACIO=y
CONFIG_INPUT_ADBHID=y
CONFIG_MAC_ADBKEYCODES=y
CONFIG_MAC_EMUMOUSEBTN=y
CONFIG_MAC_HID=y
# CONFIG_ANSLCD is not set

#
# Character devices
#
CONFIG_VT=y
CONFIG_VT_CONSOLE=y
CONFIG_SERIAL=m
# CONFIG_SERIAL_EXTENDED is not set
# CONFIG_SERIAL_NONSTANDARD is not set
CONFIG_UNIX98_PTYS=y
CONFIG_UNIX98_PTY_COUNT=256

#
# I2C support
#
CONFIG_I2C=m
# CONFIG_I2C_ALGOBIT is not set
# CONFIG_I2C_ALGOPCF is not set
CONFIG_I2C_KEYWEST=m
CONFIG_I2C_CHARDEV=m
CONFIG_I2C_PROC=m

#
# Mice
#
CONFIG_BUSMOUSE=y
# CONFIG_ATIXL_BUSMOUSE is not set
# CONFIG_LOGIBUSMOUSE is not set
# CONFIG_MS_BUSMOUSE is not set
CONFIG_MOUSE=y
CONFIG_PSMOUSE=y
# CONFIG_82C710_MOUSE is not set
# CONFIG_PC110_PAD is not set

#
# Joysticks
#
# CONFIG_INPUT_GAMEPORT is not set
# CONFIG_INPUT_NS558 is not set
# CONFIG_INPUT_LIGHTNING is not set
# CONFIG_INPUT_PCIGAME is not set
# CONFIG_INPUT_CS461X is not set
# CONFIG_INPUT_EMU10K1 is not set
# CONFIG_INPUT_SERIO is not set
# CONFIG_INPUT_SERPORT is not set

#
# Joysticks
#
# CONFIG_INPUT_ANALOG is not set
# CONFIG_INPUT_A3D is not set
# CONFIG_INPUT_ADI is not set
# CONFIG_INPUT_COBRA is not set
# CONFIG_INPUT_GF2K is not set
# CONFIG_INPUT_GRIP is not set
# CONFIG_INPUT_INTERACT is not set
# CONFIG_INPUT_TMDC is not set
# CONFIG_INPUT_SIDEWINDER is not set
# CONFIG_INPUT_IFORCE_USB is not set
# CONFIG_INPUT_IFORCE_232 is not set
# CONFIG_INPUT_WARRIOR is not set
# CONFIG_INPUT_MAGELLAN is not set
# CONFIG_INPUT_SPACEORB is not set
# CONFIG_INPUT_SPACEBALL is not set
# CONFIG_INPUT_STINGER is not set
# CONFIG_INPUT_DB9 is not set
# CONFIG_INPUT_GAMECON is not set
# CONFIG_INPUT_TURBOGRAFX is not set
# CONFIG_QIC02_TAPE is not set

#
# Watchdog Cards
#
# CONFIG_WATCHDOG is not set
# CONFIG_INTEL_RNG is not set
CONFIG_NVRAM=y
# CONFIG_RTC is not set
# CONFIG_DTLK is not set
# CONFIG_R3964 is not set
# CONFIG_APPLICOM is not set

#
# Ftape, the floppy tape device driver
#
# CONFIG_FTAPE is not set
# CONFIG_AGP is not set
# CONFIG_DRM is not set

#
# Multimedia devices
#
# CONFIG_VIDEO_DEV is not set

#
# File systems
#
# CONFIG_QUOTA is not set
# CONFIG_AUTOFS_FS is not set
# CONFIG_AUTOFS4_FS is not set
# CONFIG_REISERFS_FS is not set
# CONFIG_REISERFS_CHECK is not set
# CONFIG_REISERFS_PROC_INFO is not set
# CONFIG_ADFS_FS is not set
# CONFIG_ADFS_FS_RW is not set
# CONFIG_AFFS_FS is not set
CONFIG_HFS_FS=m
# CONFIG_BFS_FS is not set
# CONFIG_EXT3_FS is not set
# CONFIG_JBD is not set
# CONFIG_JBD_DEBUG is not set
CONFIG_FAT_FS=m
CONFIG_MSDOS_FS=m
# CONFIG_UMSDOS_FS is not set
CONFIG_VFAT_FS=m
# CONFIG_EFS_FS is not set
# CONFIG_JFFS_FS is not set
# CONFIG_JFFS2_FS is not set
# CONFIG_CRAMFS is not set
CONFIG_TMPFS=y
# CONFIG_RAMFS is not set
CONFIG_ISO9660_FS=y
# CONFIG_JOLIET is not set
# CONFIG_ZISOFS is not set
# CONFIG_MINIX_FS is not set
# CONFIG_VXFS_FS is not set
# CONFIG_NTFS_FS is not set
# CONFIG_NTFS_RW is not set
# CONFIG_HPFS_FS is not set
CONFIG_PROC_FS=y
CONFIG_DEVFS_FS=y
# CONFIG_DEVFS_MOUNT is not set
# CONFIG_DEVFS_DEBUG is not set
CONFIG_DEVPTS_FS=y
# CONFIG_QNX4FS_FS is not set
# CONFIG_QNX4FS_RW is not set
# CONFIG_ROMFS_FS is not set
CONFIG_EXT2_FS=y
# CONFIG_SYSV_FS is not set
# CONFIG_UDF_FS is not set
# CONFIG_UDF_RW is not set
# CONFIG_UFS_FS is not set
# CONFIG_UFS_FS_WRITE is not set

#
# Network File Systems
#
# CONFIG_CODA_FS is not set
# CONFIG_INTERMEZZO_FS is not set
CONFIG_NFS_FS=y
# CONFIG_NFS_V3 is not set
# CONFIG_ROOT_NFS is not set
CONFIG_NFSD=y
# CONFIG_NFSD_V3 is not set
CONFIG_SUNRPC=y
CONFIG_LOCKD=y
# CONFIG_SMB_FS is not set
# CONFIG_NCP_FS is not set
# CONFIG_NCPFS_PACKET_SIGNING is not set
# CONFIG_NCPFS_IOCTL_LOCKING is not set
# CONFIG_NCPFS_STRONG is not set
# CONFIG_NCPFS_NFS_NS is not set
# CONFIG_NCPFS_OS2_NS is not set
# CONFIG_NCPFS_SMALLDOS is not set
# CONFIG_NCPFS_NLS is not set
# CONFIG_NCPFS_EXTRAS is not set
# CONFIG_ZISOFS_FS is not set
# CONFIG_ZLIB_FS_INFLATE is not set

#
# Partition Types
#
CONFIG_PARTITION_ADVANCED=y
# CONFIG_ACORN_PARTITION is not set
# CONFIG_OSF_PARTITION is not set
# CONFIG_AMIGA_PARTITION is not set
# CONFIG_ATARI_PARTITION is not set
CONFIG_MAC_PARTITION=y
CONFIG_MSDOS_PARTITION=y
# CONFIG_BSD_DISKLABEL is not set
# CONFIG_MINIX_SUBPARTITION is not set
# CONFIG_SOLARIS_X86_PARTITION is not set
# CONFIG_UNIXWARE_DISKLABEL is not set
# CONFIG_LDM_PARTITION is not set
# CONFIG_SGI_PARTITION is not set
# CONFIG_ULTRIX_PARTITION is not set
# CONFIG_SUN_PARTITION is not set
# CONFIG_SMB_NLS is not set
CONFIG_NLS=y

#
# Native Language Support
#
CONFIG_NLS_DEFAULT="iso8859-1"
# CONFIG_NLS_CODEPAGE_437 is not set
# CONFIG_NLS_CODEPAGE_737 is not set
# CONFIG_NLS_CODEPAGE_775 is not set
# CONFIG_NLS_CODEPAGE_850 is not set
# CONFIG_NLS_CODEPAGE_852 is not set
# CONFIG_NLS_CODEPAGE_855 is not set
# CONFIG_NLS_CODEPAGE_857 is not set
# CONFIG_NLS_CODEPAGE_860 is not set
# CONFIG_NLS_CODEPAGE_861 is not set
# CONFIG_NLS_CODEPAGE_862 is not set
# CONFIG_NLS_CODEPAGE_863 is not set
# CONFIG_NLS_CODEPAGE_864 is not set
# CONFIG_NLS_CODEPAGE_865 is not set
# CONFIG_NLS_CODEPAGE_866 is not set
# CONFIG_NLS_CODEPAGE_869 is not set
# CONFIG_NLS_CODEPAGE_936 is not set
# CONFIG_NLS_CODEPAGE_950 is not set
# CONFIG_NLS_CODEPAGE_932 is not set
# CONFIG_NLS_CODEPAGE_949 is not set
# CONFIG_NLS_CODEPAGE_874 is not set
# CONFIG_NLS_ISO8859_8 is not set
# CONFIG_NLS_CODEPAGE_1251 is not set
CONFIG_NLS_ISO8859_1=m
# CONFIG_NLS_ISO8859_2 is not set
# CONFIG_NLS_ISO8859_3 is not set
# CONFIG_NLS_ISO8859_4 is not set
# CONFIG_NLS_ISO8859_5 is not set
# CONFIG_NLS_ISO8859_6 is not set
# CONFIG_NLS_ISO8859_7 is not set
# CONFIG_NLS_ISO8859_9 is not set
# CONFIG_NLS_ISO8859_13 is not set
# CONFIG_NLS_ISO8859_14 is not set
# CONFIG_NLS_ISO8859_15 is not set
# CONFIG_NLS_KOI8_R is not set
# CONFIG_NLS_KOI8_U is not set
# CONFIG_NLS_UTF8 is not set

#
# Sound
#
CONFIG_SOUND=m
CONFIG_DMASOUND_PMAC=m
CONFIG_DMASOUND=m
CONFIG_I2C=m
CONFIG_I2C_KEYWEST=m
# CONFIG_SOUND_BT878 is not set
# CONFIG_SOUND_CMPCI is not set
# CONFIG_SOUND_EMU10K1 is not set
# CONFIG_MIDI_EMU10K1 is not set
# CONFIG_SOUND_FUSION is not set
# CONFIG_SOUND_CS4281 is not set
# CONFIG_SOUND_ES1370 is not set
# CONFIG_SOUND_ES1371 is not set
# CONFIG_SOUND_ESSSOLO1 is not set
# CONFIG_SOUND_MAESTRO is not set
# CONFIG_SOUND_MAESTRO3 is not set
# CONFIG_SOUND_ICH is not set
# CONFIG_SOUND_RME96XX is not set
# CONFIG_SOUND_SONICVIBES is not set
# CONFIG_SOUND_TRIDENT is not set
# CONFIG_SOUND_MSNDCLAS is not set
# CONFIG_SOUND_MSNDPIN is not set
# CONFIG_SOUND_VIA82CXXX is not set
# CONFIG_MIDI_VIA82CXXX is not set
# CONFIG_SOUND_OSS is not set
# CONFIG_SOUND_TVMIXER is not set

#
# USB support
#
CONFIG_USB=y
# CONFIG_USB_DEBUG is not set

#
# Miscellaneous USB options
#
CONFIG_USB_DEVICEFS=y
# CONFIG_USB_BANDWIDTH is not set
# CONFIG_USB_LONG_TIMEOUT is not set

#
# USB Controllers
#
# CONFIG_USB_UHCI is not set
# CONFIG_USB_UHCI_ALT is not set
CONFIG_USB_OHCI=y

#
# USB Device Class drivers
#
# CONFIG_USB_AUDIO is not set
# CONFIG_USB_BLUETOOTH is not set
# CONFIG_USB_STORAGE is not set
# CONFIG_USB_STORAGE_DEBUG is not set
# CONFIG_USB_STORAGE_DATAFAB is not set
# CONFIG_USB_STORAGE_FREECOM is not set
# CONFIG_USB_STORAGE_ISD200 is not set
# CONFIG_USB_STORAGE_DPCM is not set
# CONFIG_USB_STORAGE_HP8200e is not set
# CONFIG_USB_STORAGE_SDDR09 is not set
# CONFIG_USB_STORAGE_JUMPSHOT is not set
CONFIG_USB_ACM=m
CONFIG_USB_PRINTER=m

#
# USB Human Interface Devices (HID)
#
CONFIG_USB_HID=y
# CONFIG_USB_HIDDEV is not set
# CONFIG_USB_WACOM is not set

#
# USB Imaging devices
#
# CONFIG_USB_DC2XX is not set
# CONFIG_USB_MDC800 is not set
CONFIG_USB_SCANNER=m
# CONFIG_USB_MICROTEK is not set
# CONFIG_USB_HPUSBSCSI is not set

#
# USB Multimedia devices
#

#
#   Video4Linux support is needed for USB Multimedia device support
#

#
# USB Network adaptors
#
# CONFIG_USB_PEGASUS is not set
# CONFIG_USB_KAWETH is not set
# CONFIG_USB_CATC is not set
# CONFIG_USB_CDCETHER is not set
# CONFIG_USB_USBNET is not set

#
# USB port drivers
#
# CONFIG_USB_USS720 is not set

#
# USB Serial Converter support
#
CONFIG_USB_SERIAL=m
# CONFIG_USB_SERIAL_GENERIC is not set
# CONFIG_USB_SERIAL_BELKIN is not set
# CONFIG_USB_SERIAL_WHITEHEAT is not set
# CONFIG_USB_SERIAL_DIGI_ACCELEPORT is not set
# CONFIG_USB_SERIAL_EMPEG is not set
# CONFIG_USB_SERIAL_FTDI_SIO is not set
CONFIG_USB_SERIAL_VISOR=m
# CONFIG_USB_SERIAL_IR is not set
# CONFIG_USB_SERIAL_EDGEPORT is not set
# CONFIG_USB_SERIAL_KEYSPAN_PDA is not set
# CONFIG_USB_SERIAL_KEYSPAN is not set
# CONFIG_USB_SERIAL_KEYSPAN_USA28 is not set
# CONFIG_USB_SERIAL_KEYSPAN_USA28X is not set
# CONFIG_USB_SERIAL_KEYSPAN_USA28XA is not set
# CONFIG_USB_SERIAL_KEYSPAN_USA28XB is not set
# CONFIG_USB_SERIAL_KEYSPAN_USA19 is not set
# CONFIG_USB_SERIAL_KEYSPAN_USA18X is not set
# CONFIG_USB_SERIAL_KEYSPAN_USA19W is not set
# CONFIG_USB_SERIAL_KEYSPAN_USA49W is not set
# CONFIG_USB_SERIAL_MCT_U232 is not set
# CONFIG_USB_SERIAL_PL2303 is not set
# CONFIG_USB_SERIAL_CYBERJACK is not set
# CONFIG_USB_SERIAL_XIRCOM is not set
# CONFIG_USB_SERIAL_OMNINET is not set

#
# USB Miscellaneous drivers
#
# CONFIG_USB_RIO500 is not set

#
# Bluetooth support
#
# CONFIG_BLUEZ is not set

#
# Kernel hacking
#
CONFIG_MAGIC_SYSRQ=y
# CONFIG_KGDB is not set
CONFIG_XMON=y
#
# Automatically generated make config: don't edit
#
# CONFIG_UID16 is not set
# CONFIG_RWSEM_GENERIC_SPINLOCK is not set
CONFIG_RWSEM_XCHGADD_ALGORITHM=y

#
# Code maturity level options
#
CONFIG_EXPERIMENTAL=y

#
# Loadable module support
#
# CONFIG_MODULES is not set

#
# Platform support
#
CONFIG_PPC=y
CONFIG_PPC32=y
# CONFIG_6xx is not set
# CONFIG_4xx is not set
# CONFIG_POWER3 is not set
# CONFIG_POWER4 is not set
CONFIG_8xx=y
# CONFIG_PPC_STD_MMU is not set
CONFIG_SERIAL_CONSOLE=y
# CONFIG_RPXLITE is not set
# CONFIG_RPXCLASSIC is not set
CONFIG_BSEIP=y
# CONFIG_FADS is not set
# CONFIG_TQM823L is not set
# CONFIG_TQM850L is not set
# CONFIG_TQM855L is not set
# CONFIG_TQM860L is not set
# CONFIG_FPS850L is not set
# CONFIG_TQM860 is not set
# CONFIG_SPD823TS is not set
# CONFIG_IVMS8 is not set
# CONFIG_IVML24 is not set
# CONFIG_SM850 is not set
# CONFIG_MBX is not set
# CONFIG_WINCEPT is not set
# CONFIG_ALL_PPC is not set
# CONFIG_SMP is not set
CONFIG_MATH_EMULATION=y

#
# General setup
#
# CONFIG_HIGHMEM is not set
# CONFIG_ISA is not set
# CONFIG_EISA is not set
# CONFIG_SBUS is not set
# CONFIG_MCA is not set
# CONFIG_PCI_QSPAN is not set
# CONFIG_PCI is not set
CONFIG_NET=y
CONFIG_SYSCTL=y
CONFIG_SYSVIPC=y
# CONFIG_BSD_PROCESS_ACCT is not set
CONFIG_KCORE_ELF=y
CONFIG_BINFMT_ELF=y
CONFIG_KERNEL_ELF=y
# CONFIG_BINFMT_MISC is not set
# CONFIG_HOTPLUG is not set
# CONFIG_PCMCIA is not set

#
# Parallel port support
#
# CONFIG_PARPORT is not set
CONFIG_PPC_RTC=y
# CONFIG_CMDLINE_BOOL is not set

#
# Memory Technology Devices (MTD)
#
# CONFIG_MTD is not set

#
# Plug and Play configuration
#
# CONFIG_PNP is not set
# CONFIG_ISAPNP is not set

#
# Block devices
#
# CONFIG_BLK_DEV_FD is not set
# CONFIG_BLK_DEV_XD is not set
# CONFIG_PARIDE is not set
# CONFIG_BLK_CPQ_DA is not set
# CONFIG_BLK_CPQ_CISS_DA is not set
# CONFIG_BLK_DEV_DAC960 is not set
CONFIG_BLK_DEV_LOOP=y
# CONFIG_BLK_DEV_NBD is not set
CONFIG_BLK_DEV_RAM=y
CONFIG_BLK_DEV_RAM_SIZE=4096
CONFIG_BLK_DEV_INITRD=y

#
# Multi-device support (RAID and LVM)
#
# CONFIG_MD is not set
# CONFIG_BLK_DEV_MD is not set
# CONFIG_MD_LINEAR is not set
# CONFIG_MD_RAID0 is not set
# CONFIG_MD_RAID1 is not set
# CONFIG_MD_RAID5 is not set
# CONFIG_MD_MULTIPATH is not set
# CONFIG_BLK_DEV_LVM is not set

#
# Networking options
#
CONFIG_PACKET=y
# CONFIG_PACKET_MMAP is not set
CONFIG_NETLINK=y
# CONFIG_RTNETLINK is not set
# CONFIG_NETLINK_DEV is not set
# CONFIG_NETFILTER is not set
# CONFIG_FILTER is not set
CONFIG_UNIX=y
CONFIG_INET=y
CONFIG_IP_MULTICAST=y
# CONFIG_IP_ADVANCED_ROUTER is not set
CONFIG_IP_PNP=y
# CONFIG_IP_PNP_DHCP is not set
CONFIG_IP_PNP_BOOTP=y
# CONFIG_IP_PNP_RARP is not set
# CONFIG_NET_IPIP is not set
# CONFIG_NET_IPGRE is not set
# CONFIG_IP_MROUTE is not set
# CONFIG_INET_ECN is not set
CONFIG_SYN_COOKIES=y
# CONFIG_IPV6 is not set
# CONFIG_KHTTPD is not set
# CONFIG_ATM is not set
# CONFIG_VLAN_8021Q is not set

#
#  
#
# CONFIG_IPX is not set
# CONFIG_ATALK is not set
# CONFIG_DECNET is not set
# CONFIG_BRIDGE is not set
# CONFIG_X25 is not set
# CONFIG_LAPB is not set
# CONFIG_LLC is not set
# CONFIG_NET_DIVERT is not set
# CONFIG_ECONET is not set
# CONFIG_WAN_ROUTER is not set
# CONFIG_NET_FASTROUTE is not set
# CONFIG_NET_HW_FLOWCONTROL is not set

#
# QoS and/or fair queueing
#
# CONFIG_NET_SCHED is not set

#
# ATA/IDE/MFM/RLL support
#
# CONFIG_IDE is not set
# CONFIG_BLK_DEV_IDE_MODES is not set
# CONFIG_BLK_DEV_HD is not set

#
# SCSI support
#
# CONFIG_SCSI is not set

#
# Network device support
#
CONFIG_NETDEVICES=y

#
# ARCnet devices
#
# CONFIG_ARCNET is not set
# CONFIG_DUMMY is not set
# CONFIG_BONDING is not set
# CONFIG_EQUALIZER is not set
# CONFIG_TUN is not set
# CONFIG_ETHERTAP is not set

#
# Ethernet (10 or 100Mbit)
#
CONFIG_NET_ETHERNET=y
# CONFIG_MACE is not set
# CONFIG_BMAC is not set
# CONFIG_GMAC is not set
# CONFIG_SUNLANCE is not set
# CONFIG_SUNBMAC is not set
# CONFIG_SUNQE is not set
# CONFIG_SUNLANCE is not set
# CONFIG_SUNGEM is not set
# CONFIG_NET_VENDOR_3COM is not set
# CONFIG_LANCE is not set
# CONFIG_NET_VENDOR_SMC is not set
# CONFIG_NET_VENDOR_RACAL is not set
# CONFIG_NET_ISA is not set
# CONFIG_NET_PCI is not set
# CONFIG_NET_POCKET is not set

#
# Ethernet (1000 Mbit)
#
# CONFIG_ACENIC is not set
# CONFIG_DL2K is not set
# CONFIG_MYRI_SBUS is not set
# CONFIG_NS83820 is not set
# CONFIG_HAMACHI is not set
# CONFIG_YELLOWFIN is not set
# CONFIG_SK98LIN is not set
# CONFIG_FDDI is not set
# CONFIG_HIPPI is not set
# CONFIG_PLIP is not set
# CONFIG_PPP is not set
# CONFIG_SLIP is not set

#
# Wireless LAN (non-hamradio)
#
# CONFIG_NET_RADIO is not set

#
# Token Ring devices
#
# CONFIG_TR is not set
# CONFIG_NET_FC is not set
# CONFIG_RCPCI is not set
# CONFIG_SHAPER is not set

#
# Wan interfaces
#
# CONFIG_WAN is not set

#
# Amateur Radio support
#
# CONFIG_HAMRADIO is not set

#
# IrDA (infrared) support
#
# CONFIG_IRDA is not set

#
# ISDN subsystem
#
# CONFIG_ISDN is not set

#
# Old CD-ROM drivers (not SCSI, not IDE)
#
# CONFIG_CD_NO_IDESCSI is not set

#
# Console drivers
#

#
# Frame-buffer support
#
# CONFIG_FB is not set

#
# Input core support
#
# CONFIG_INPUT is not set
# CONFIG_INPUT_KEYBDEV is not set
# CONFIG_INPUT_MOUSEDEV is not set
# CONFIG_INPUT_JOYDEV is not set
# CONFIG_INPUT_EVDEV is not set

#
# Macintosh device drivers
#

#
# Character devices
#
# CONFIG_VT is not set
# CONFIG_SERIAL is not set
# CONFIG_SERIAL_EXTENDED is not set
# CONFIG_SERIAL_NONSTANDARD is not set
CONFIG_UNIX98_PTYS=y
CONFIG_UNIX98_PTY_COUNT=256

#
# I2C support
#
# CONFIG_I2C is not set

#
# Mice
#
# CONFIG_BUSMOUSE is not set
# CONFIG_MOUSE is not set

#
# Joysticks
#
# CONFIG_INPUT_GAMEPORT is not set

#
# Input core support is needed for gameports
#

#
# Input core support is needed for joysticks
#
# CONFIG_QIC02_TAPE is not set

#
# Watchdog Cards
#
# CONFIG_WATCHDOG is not set
# CONFIG_INTEL_RNG is not set
# CONFIG_NVRAM is not set
# CONFIG_RTC is not set
# CONFIG_DTLK is not set
# CONFIG_R3964 is not set
# CONFIG_APPLICOM is not set

#
# Ftape, the floppy tape device driver
#
# CONFIG_FTAPE is not set
# CONFIG_AGP is not set
# CONFIG_DRM is not set

#
# Multimedia devices
#
# CONFIG_VIDEO_DEV is not set

#
# File systems
#
# CONFIG_QUOTA is not set
# CONFIG_AUTOFS_FS is not set
# CONFIG_AUTOFS4_FS is not set
# CONFIG_REISERFS_FS is not set
# CONFIG_REISERFS_CHECK is not set
# CONFIG_ADFS_FS is not set
# CONFIG_ADFS_FS_RW is not set
# CONFIG_AFFS_FS is not set
# CONFIG_HFS_FS is not set
# CONFIG_BFS_FS is not set
# CONFIG_FAT_FS is not set
# CONFIG_MSDOS_FS is not set
# CONFIG_UMSDOS_FS is not set
# CONFIG_VFAT_FS is not set
# CONFIG_EFS_FS is not set
# CONFIG_JFFS_FS is not set
# CONFIG_JFFS2_FS is not set
# CONFIG_CRAMFS is not set
CONFIG_TMPFS=y
# CONFIG_RAMFS is not set
# CONFIG_ISO9660_FS is not set
# CONFIG_JOLIET is not set
# CONFIG_MINIX_FS is not set
# CONFIG_VXFS_FS is not set
# CONFIG_NTFS_FS is not set
# CONFIG_NTFS_RW is not set
# CONFIG_HPFS_FS is not set
CONFIG_PROC_FS=y
# CONFIG_DEVFS_FS is not set
# CONFIG_DEVFS_MOUNT is not set
# CONFIG_DEVFS_DEBUG is not set
CONFIG_DEVPTS_FS=y
# CONFIG_QNX4FS_FS is not set
# CONFIG_QNX4FS_RW is not set
# CONFIG_ROMFS_FS is not set
CONFIG_EXT2_FS=y
# CONFIG_SYSV_FS is not set
# CONFIG_UDF_FS is not set
# CONFIG_UDF_RW is not set
# CONFIG_UFS_FS is not set
# CONFIG_UFS_FS_WRITE is not set

#
# Network File Systems
#
# CONFIG_CODA_FS is not set
CONFIG_NFS_FS=y
# CONFIG_NFS_V3 is not set
CONFIG_ROOT_NFS=y
# CONFIG_NFSD is not set
# CONFIG_NFSD_V3 is not set
CONFIG_SUNRPC=y
CONFIG_LOCKD=y
# CONFIG_SMB_FS is not set
# CONFIG_NCP_FS is not set
# CONFIG_NCPFS_PACKET_SIGNING is not set
# CONFIG_NCPFS_IOCTL_LOCKING is not set
# CONFIG_NCPFS_STRONG is not set
# CONFIG_NCPFS_NFS_NS is not set
# CONFIG_NCPFS_OS2_NS is not set
# CONFIG_NCPFS_SMALLDOS is not set
# CONFIG_NCPFS_NLS is not set
# CONFIG_NCPFS_EXTRAS is not set

#
# Partition Types
#
CONFIG_PARTITION_ADVANCED=y
# CONFIG_ACORN_PARTITION is not set
# CONFIG_OSF_PARTITION is not set
# CONFIG_AMIGA_PARTITION is not set
# CONFIG_ATARI_PARTITION is not set
# CONFIG_MAC_PARTITION is not set
# CONFIG_MSDOS_PARTITION is not set
# CONFIG_LDM_PARTITION is not set
# CONFIG_SGI_PARTITION is not set
# CONFIG_ULTRIX_PARTITION is not set
# CONFIG_SUN_PARTITION is not set
# CONFIG_SMB_NLS is not set
# CONFIG_NLS is not set

#
# Sound
#
# CONFIG_SOUND is not set

#
# MPC8xx CPM Options
#
CONFIG_SCC_ENET=y
# CONFIG_SCC1_ENET is not set
CONFIG_SCC2_ENET=y
# CONFIG_SCC3_ENET is not set
# CONFIG_FEC_ENET is not set
# CONFIG_ENET_BIG_BUFFERS is not set
CONFIG_SMC2_UART=y
# CONFIG_ALTSMC2 is not set
# CONFIG_CONS_SMC2 is not set
# CONFIG_USE_SCC_IO is not set

#
# Generic MPC8xx Options
#
CONFIG_8xx_COPYBACK=y
# CONFIG_8xx_CPU6 is not set
# CONFIG_UCODE_PATCH is not set

#
# USB support
#
# CONFIG_USB is not set

#
# USB Controllers
#
# CONFIG_USB_UHCI is not set
# CONFIG_USB_UHCI_ALT is not set
# CONFIG_USB_OHCI is not set

#
# USB Device Class drivers
#
# CONFIG_USB_AUDIO is not set
# CONFIG_USB_BLUETOOTH is not set
# CONFIG_USB_STORAGE is not set
# CONFIG_USB_STORAGE_DEBUG is not set
# CONFIG_USB_STORAGE_DATAFAB is not set
# CONFIG_USB_STORAGE_FREECOM is not set
# CONFIG_USB_STORAGE_ISD200 is not set
# CONFIG_USB_STORAGE_DPCM is not set
# CONFIG_USB_STORAGE_HP8200e is not set
# CONFIG_USB_STORAGE_SDDR09 is not set
# CONFIG_USB_STORAGE_JUMPSHOT is not set
# CONFIG_USB_ACM is not set
# CONFIG_USB_PRINTER is not set

#
# USB Human Interface Devices (HID)
#

#
#   Input core support is needed for USB HID
#

#
# USB Imaging devices
#
# CONFIG_USB_DC2XX is not set
# CONFIG_USB_MDC800 is not set
# CONFIG_USB_SCANNER is not set
# CONFIG_USB_MICROTEK is not set
# CONFIG_USB_HPUSBSCSI is not set

#
# USB Multimedia devices
#

#
#   Video4Linux support is needed for USB Multimedia device support
#

#
# USB Network adaptors
#
# CONFIG_USB_PEGASUS is not set
# CONFIG_USB_KAWETH is not set
# CONFIG_USB_CATC is not set
# CONFIG_USB_CDCETHER is not set
# CONFIG_USB_USBNET is not set

#
# USB port drivers
#
# CONFIG_USB_USS720 is not set

#
# USB Serial Converter support
#
# CONFIG_USB_SERIAL is not set
# CONFIG_USB_SERIAL_GENERIC is not set
# CONFIG_USB_SERIAL_BELKIN is not set
# CONFIG_USB_SERIAL_WHITEHEAT is not set
# CONFIG_USB_SERIAL_DIGI_ACCELEPORT is not set
# CONFIG_USB_SERIAL_EMPEG is not set
# CONFIG_USB_SERIAL_FTDI_SIO is not set
# CONFIG_USB_SERIAL_VISOR is not set
# CONFIG_USB_SERIAL_IR is not set
# CONFIG_USB_SERIAL_EDGEPORT is not set
# CONFIG_USB_SERIAL_KEYSPAN_PDA is not set
# CONFIG_USB_SERIAL_KEYSPAN is not set
# CONFIG_USB_SERIAL_KEYSPAN_USA28 is not set
# CONFIG_USB_SERIAL_KEYSPAN_USA28X is not set
# CONFIG_USB_SERIAL_KEYSPAN_USA28XA is not set
# CONFIG_USB_SERIAL_KEYSPAN_USA28XB is not set
# CONFIG_USB_SERIAL_KEYSPAN_USA19 is not set
# CONFIG_USB_SERIAL_KEYSPAN_USA18X is not set
# CONFIG_USB_SERIAL_KEYSPAN_USA19W is not set
# CONFIG_USB_SERIAL_KEYSPAN_USA49W is not set
# CONFIG_USB_SERIAL_MCT_U232 is not set
# CONFIG_USB_SERIAL_PL2303 is not set
# CONFIG_USB_SERIAL_CYBERJACK is not set
# CONFIG_USB_SERIAL_XIRCOM is not set
# CONFIG_USB_SERIAL_OMNINET is not set

#
# USB Miscellaneous drivers
#
# CONFIG_USB_RIO500 is not set

#
# Bluetooth support
#
# CONFIG_BLUEZ is not set

#
# Kernel hacking
#
# CONFIG_MAGIC_SYSRQ is not set
# CONFIG_KGDB is not set
# CONFIG_XMON is not set
#
# Automatically generated make config: don't edit
#
# CONFIG_UID16 is not set
# CONFIG_RWSEM_GENERIC_SPINLOCK is not set
CONFIG_RWSEM_XCHGADD_ALGORITHM=y

#
# Code maturity level options
#
CONFIG_EXPERIMENTAL=y

#
# Loadable module support
#
# CONFIG_MODULES is not set

#
# Platform support
#
CONFIG_PPC=y
CONFIG_PPC32=y
# CONFIG_6xx is not set
# CONFIG_4xx is not set
# CONFIG_POWER3 is not set
# CONFIG_POWER4 is not set
CONFIG_8xx=y
# CONFIG_PPC_STD_MMU is not set
CONFIG_SERIAL_CONSOLE=y
# CONFIG_RPXLITE is not set
# CONFIG_RPXCLASSIC is not set
# CONFIG_BSEIP is not set
# CONFIG_FADS is not set
# CONFIG_TQM823L is not set
# CONFIG_TQM850L is not set
# CONFIG_TQM855L is not set
# CONFIG_TQM860L is not set
# CONFIG_FPS850L is not set
# CONFIG_TQM860 is not set
# CONFIG_SPD823TS is not set
# CONFIG_IVMS8 is not set
# CONFIG_IVML24 is not set
# CONFIG_SM850 is not set
CONFIG_MBX=y
# CONFIG_WINCEPT is not set
# CONFIG_ALL_PPC is not set
# CONFIG_SMP is not set
CONFIG_MATH_EMULATION=y

#
# General setup
#
# CONFIG_HIGHMEM is not set
# CONFIG_ISA is not set
# CONFIG_EISA is not set
# CONFIG_SBUS is not set
# CONFIG_MCA is not set
# CONFIG_PCI_QSPAN is not set
# CONFIG_PCI is not set
CONFIG_NET=y
# CONFIG_SYSCTL is not set
CONFIG_SYSVIPC=y
# CONFIG_BSD_PROCESS_ACCT is not set
CONFIG_KCORE_ELF=y
CONFIG_BINFMT_ELF=y
CONFIG_KERNEL_ELF=y
# CONFIG_BINFMT_MISC is not set
# CONFIG_HOTPLUG is not set
# CONFIG_PCMCIA is not set

#
# Parallel port support
#
# CONFIG_PARPORT is not set
CONFIG_PPC_RTC=y
# CONFIG_CMDLINE_BOOL is not set

#
# Memory Technology Devices (MTD)
#
# CONFIG_MTD is not set

#
# Plug and Play configuration
#
# CONFIG_PNP is not set
# CONFIG_ISAPNP is not set

#
# Block devices
#
# CONFIG_BLK_DEV_FD is not set
# CONFIG_BLK_DEV_XD is not set
# CONFIG_PARIDE is not set
# CONFIG_BLK_CPQ_DA is not set
# CONFIG_BLK_CPQ_CISS_DA is not set
# CONFIG_BLK_DEV_DAC960 is not set
# CONFIG_BLK_DEV_LOOP is not set
# CONFIG_BLK_DEV_NBD is not set
# CONFIG_BLK_DEV_RAM is not set
# CONFIG_BLK_DEV_INITRD is not set

#
# Multi-device support (RAID and LVM)
#
# CONFIG_MD is not set
# CONFIG_BLK_DEV_MD is not set
# CONFIG_MD_LINEAR is not set
# CONFIG_MD_RAID0 is not set
# CONFIG_MD_RAID1 is not set
# CONFIG_MD_RAID5 is not set
# CONFIG_MD_MULTIPATH is not set
# CONFIG_BLK_DEV_LVM is not set

#
# Networking options
#
# CONFIG_PACKET is not set
# CONFIG_NETLINK is not set
# CONFIG_NETFILTER is not set
# CONFIG_FILTER is not set
CONFIG_UNIX=y
CONFIG_INET=y
# CONFIG_IP_MULTICAST is not set
# CONFIG_IP_ADVANCED_ROUTER is not set
CONFIG_IP_PNP=y
# CONFIG_IP_PNP_DHCP is not set
CONFIG_IP_PNP_BOOTP=y
# CONFIG_IP_PNP_RARP is not set
# CONFIG_NET_IPIP is not set
# CONFIG_NET_IPGRE is not set
# CONFIG_INET_ECN is not set
# CONFIG_SYN_COOKIES is not set
# CONFIG_IPV6 is not set
# CONFIG_KHTTPD is not set
# CONFIG_ATM is not set
# CONFIG_VLAN_8021Q is not set

#
#  
#
# CONFIG_IPX is not set
# CONFIG_ATALK is not set
# CONFIG_DECNET is not set
# CONFIG_BRIDGE is not set
# CONFIG_X25 is not set
# CONFIG_LAPB is not set
# CONFIG_LLC is not set
# CONFIG_NET_DIVERT is not set
# CONFIG_ECONET is not set
# CONFIG_WAN_ROUTER is not set
# CONFIG_NET_FASTROUTE is not set
# CONFIG_NET_HW_FLOWCONTROL is not set

#
# QoS and/or fair queueing
#
# CONFIG_NET_SCHED is not set

#
# ATA/IDE/MFM/RLL support
#
# CONFIG_IDE is not set
# CONFIG_BLK_DEV_IDE_MODES is not set
# CONFIG_BLK_DEV_HD is not set

#
# SCSI support
#
# CONFIG_SCSI is not set

#
# Network device support
#
CONFIG_NETDEVICES=y

#
# ARCnet devices
#
# CONFIG_ARCNET is not set
# CONFIG_DUMMY is not set
# CONFIG_BONDING is not set
# CONFIG_EQUALIZER is not set
# CONFIG_TUN is not set

#
# Ethernet (10 or 100Mbit)
#
CONFIG_NET_ETHERNET=y
# CONFIG_MACE is not set
# CONFIG_BMAC is not set
# CONFIG_GMAC is not set
# CONFIG_SUNLANCE is not set
# CONFIG_SUNBMAC is not set
# CONFIG_SUNQE is not set
# CONFIG_SUNLANCE is not set
# CONFIG_SUNGEM is not set
# CONFIG_NET_VENDOR_3COM is not set
# CONFIG_LANCE is not set
# CONFIG_NET_VENDOR_SMC is not set
# CONFIG_NET_VENDOR_RACAL is not set
# CONFIG_NET_ISA is not set
# CONFIG_NET_PCI is not set
# CONFIG_NET_POCKET is not set

#
# Ethernet (1000 Mbit)
#
# CONFIG_ACENIC is not set
# CONFIG_DL2K is not set
# CONFIG_MYRI_SBUS is not set
# CONFIG_NS83820 is not set
# CONFIG_HAMACHI is not set
# CONFIG_YELLOWFIN is not set
# CONFIG_SK98LIN is not set
# CONFIG_FDDI is not set
# CONFIG_HIPPI is not set
# CONFIG_PLIP is not set
# CONFIG_PPP is not set
# CONFIG_SLIP is not set

#
# Wireless LAN (non-hamradio)
#
# CONFIG_NET_RADIO is not set

#
# Token Ring devices
#
# CONFIG_TR is not set
# CONFIG_NET_FC is not set
# CONFIG_RCPCI is not set
# CONFIG_SHAPER is not set

#
# Wan interfaces
#
# CONFIG_WAN is not set

#
# Amateur Radio support
#
# CONFIG_HAMRADIO is not set

#
# IrDA (infrared) support
#
# CONFIG_IRDA is not set

#
# ISDN subsystem
#
# CONFIG_ISDN is not set

#
# Old CD-ROM drivers (not SCSI, not IDE)
#
# CONFIG_CD_NO_IDESCSI is not set

#
# Console drivers
#

#
# Frame-buffer support
#
# CONFIG_FB is not set

#
# Input core support
#
# CONFIG_INPUT is not set
# CONFIG_INPUT_KEYBDEV is not set
# CONFIG_INPUT_MOUSEDEV is not set
# CONFIG_INPUT_JOYDEV is not set
# CONFIG_INPUT_EVDEV is not set

#
# Macintosh device drivers
#

#
# Character devices
#
# CONFIG_VT is not set
# CONFIG_SERIAL is not set
# CONFIG_SERIAL_EXTENDED is not set
# CONFIG_SERIAL_NONSTANDARD is not set
# CONFIG_UNIX98_PTYS is not set

#
# I2C support
#
# CONFIG_I2C is not set

#
# Mice
#
# CONFIG_BUSMOUSE is not set
# CONFIG_MOUSE is not set

#
# Joysticks
#
# CONFIG_INPUT_GAMEPORT is not set

#
# Input core support is needed for gameports
#

#
# Input core support is needed for joysticks
#
# CONFIG_QIC02_TAPE is not set

#
# Watchdog Cards
#
# CONFIG_WATCHDOG is not set
# CONFIG_INTEL_RNG is not set
# CONFIG_NVRAM is not set
# CONFIG_RTC is not set
# CONFIG_DTLK is not set
# CONFIG_R3964 is not set
# CONFIG_APPLICOM is not set

#
# Ftape, the floppy tape device driver
#
# CONFIG_FTAPE is not set
# CONFIG_AGP is not set
# CONFIG_DRM is not set

#
# Multimedia devices
#
# CONFIG_VIDEO_DEV is not set

#
# File systems
#
# CONFIG_QUOTA is not set
# CONFIG_AUTOFS_FS is not set
# CONFIG_AUTOFS4_FS is not set
# CONFIG_REISERFS_FS is not set
# CONFIG_REISERFS_CHECK is not set
# CONFIG_ADFS_FS is not set
# CONFIG_ADFS_FS_RW is not set
# CONFIG_AFFS_FS is not set
# CONFIG_HFS_FS is not set
# CONFIG_BFS_FS is not set
# CONFIG_FAT_FS is not set
# CONFIG_MSDOS_FS is not set
# CONFIG_UMSDOS_FS is not set
# CONFIG_VFAT_FS is not set
# CONFIG_EFS_FS is not set
# CONFIG_JFFS_FS is not set
# CONFIG_JFFS2_FS is not set
# CONFIG_CRAMFS is not set
CONFIG_TMPFS=y
# CONFIG_RAMFS is not set
# CONFIG_ISO9660_FS is not set
# CONFIG_JOLIET is not set
# CONFIG_MINIX_FS is not set
# CONFIG_VXFS_FS is not set
# CONFIG_NTFS_FS is not set
# CONFIG_NTFS_RW is not set
# CONFIG_HPFS_FS is not set
CONFIG_PROC_FS=y
# CONFIG_DEVFS_FS is not set
# CONFIG_DEVFS_MOUNT is not set
# CONFIG_DEVFS_DEBUG is not set
# CONFIG_DEVPTS_FS is not set
# CONFIG_QNX4FS_FS is not set
# CONFIG_QNX4FS_RW is not set
# CONFIG_ROMFS_FS is not set
CONFIG_EXT2_FS=y
# CONFIG_SYSV_FS is not set
# CONFIG_UDF_FS is not set
# CONFIG_UDF_RW is not set
# CONFIG_UFS_FS is not set
# CONFIG_UFS_FS_WRITE is not set

#
# Network File Systems
#
# CONFIG_CODA_FS is not set
CONFIG_NFS_FS=y
# CONFIG_NFS_V3 is not set
CONFIG_ROOT_NFS=y
# CONFIG_NFSD is not set
# CONFIG_NFSD_V3 is not set
CONFIG_SUNRPC=y
CONFIG_LOCKD=y
# CONFIG_SMB_FS is not set
# CONFIG_NCP_FS is not set
# CONFIG_NCPFS_PACKET_SIGNING is not set
# CONFIG_NCPFS_IOCTL_LOCKING is not set
# CONFIG_NCPFS_STRONG is not set
# CONFIG_NCPFS_NFS_NS is not set
# CONFIG_NCPFS_OS2_NS is not set
# CONFIG_NCPFS_SMALLDOS is not set
# CONFIG_NCPFS_NLS is not set
# CONFIG_NCPFS_EXTRAS is not set

#
# Partition Types
#
CONFIG_PARTITION_ADVANCED=y
# CONFIG_ACORN_PARTITION is not set
# CONFIG_OSF_PARTITION is not set
# CONFIG_AMIGA_PARTITION is not set
# CONFIG_ATARI_PARTITION is not set
# CONFIG_MAC_PARTITION is not set
# CONFIG_MSDOS_PARTITION is not set
# CONFIG_LDM_PARTITION is not set
# CONFIG_SGI_PARTITION is not set
# CONFIG_ULTRIX_PARTITION is not set
# CONFIG_SUN_PARTITION is not set
# CONFIG_SMB_NLS is not set
# CONFIG_NLS is not set

#
# Sound
#
# CONFIG_SOUND is not set

#
# MPC8xx CPM Options
#
CONFIG_SCC_ENET=y
CONFIG_SCC1_ENET=y
# CONFIG_SCC2_ENET is not set
# CONFIG_SCC3_ENET is not set
# CONFIG_FEC_ENET is not set
CONFIG_ENET_BIG_BUFFERS=y
CONFIG_SMC2_UART=y
# CONFIG_ALTSMC2 is not set
# CONFIG_CONS_SMC2 is not set
CONFIG_USE_SCC_IO=y

#
# Generic MPC8xx Options
#
CONFIG_8xx_COPYBACK=y
CONFIG_8xx_CPU6=y
# CONFIG_UCODE_PATCH is not set

#
# USB support
#
# CONFIG_USB is not set

#
# USB Controllers
#
# CONFIG_USB_UHCI is not set
# CONFIG_USB_UHCI_ALT is not set
# CONFIG_USB_OHCI is not set

#
# USB Device Class drivers
#
# CONFIG_USB_AUDIO is not set
# CONFIG_USB_BLUETOOTH is not set
# CONFIG_USB_STORAGE is not set
# CONFIG_USB_STORAGE_DEBUG is not set
# CONFIG_USB_STORAGE_DATAFAB is not set
# CONFIG_USB_STORAGE_FREECOM is not set
# CONFIG_USB_STORAGE_ISD200 is not set
# CONFIG_USB_STORAGE_DPCM is not set
# CONFIG_USB_STORAGE_HP8200e is not set
# CONFIG_USB_STORAGE_SDDR09 is not set
# CONFIG_USB_STORAGE_JUMPSHOT is not set
# CONFIG_USB_ACM is not set
# CONFIG_USB_PRINTER is not set

#
# USB Human Interface Devices (HID)
#

#
#   Input core support is needed for USB HID
#

#
# USB Imaging devices
#
# CONFIG_USB_DC2XX is not set
# CONFIG_USB_MDC800 is not set
# CONFIG_USB_SCANNER is not set
# CONFIG_USB_MICROTEK is not set
# CONFIG_USB_HPUSBSCSI is not set

#
# USB Multimedia devices
#

#
#   Video4Linux support is needed for USB Multimedia device support
#

#
# USB Network adaptors
#
# CONFIG_USB_PEGASUS is not set
# CONFIG_USB_KAWETH is not set
# CONFIG_USB_CATC is not set
# CONFIG_USB_CDCETHER is not set
# CONFIG_USB_USBNET is not set

#
# USB port drivers
#
# CONFIG_USB_USS720 is not set

#
# USB Serial Converter support
#
# CONFIG_USB_SERIAL is not set
# CONFIG_USB_SERIAL_GENERIC is not set
# CONFIG_USB_SERIAL_BELKIN is not set
# CONFIG_USB_SERIAL_WHITEHEAT is not set
# CONFIG_USB_SERIAL_DIGI_ACCELEPORT is not set
# CONFIG_USB_SERIAL_EMPEG is not set
# CONFIG_USB_SERIAL_FTDI_SIO is not set
# CONFIG_USB_SERIAL_VISOR is not set
# CONFIG_USB_SERIAL_IR is not set
# CONFIG_USB_SERIAL_EDGEPORT is not set
# CONFIG_USB_SERIAL_KEYSPAN_PDA is not set
# CONFIG_USB_SERIAL_KEYSPAN is not set
# CONFIG_USB_SERIAL_KEYSPAN_USA28 is not set
# CONFIG_USB_SERIAL_KEYSPAN_USA28X is not set
# CONFIG_USB_SERIAL_KEYSPAN_USA28XA is not set
# CONFIG_USB_SERIAL_KEYSPAN_USA28XB is not set
# CONFIG_USB_SERIAL_KEYSPAN_USA19 is not set
# CONFIG_USB_SERIAL_KEYSPAN_USA18X is not set
# CONFIG_USB_SERIAL_KEYSPAN_USA19W is not set
# CONFIG_USB_SERIAL_KEYSPAN_USA49W is not set
# CONFIG_USB_SERIAL_MCT_U232 is not set
# CONFIG_USB_SERIAL_PL2303 is not set
# CONFIG_USB_SERIAL_CYBERJACK is not set
# CONFIG_USB_SERIAL_XIRCOM is not set
# CONFIG_USB_SERIAL_OMNINET is not set

#
# USB Miscellaneous drivers
#
# CONFIG_USB_RIO500 is not set

#
# Bluetooth support
#
# CONFIG_BLUEZ is not set

#
# Kernel hacking
#
# CONFIG_MAGIC_SYSRQ is not set
# CONFIG_KGDB is not set
# CONFIG_XMON is not set
#
# Automatically generated make config: don't edit
#
# CONFIG_UID16 is not set
# CONFIG_RWSEM_GENERIC_SPINLOCK is not set
CONFIG_RWSEM_XCHGADD_ALGORITHM=y

#
# Code maturity level options
#
CONFIG_EXPERIMENTAL=y

#
# Loadable module support
#
CONFIG_MODULES=y
CONFIG_MODVERSIONS=y
CONFIG_KMOD=y

#
# Platform support
#
CONFIG_PPC=y
CONFIG_PPC32=y
# CONFIG_6xx is not set
CONFIG_4xx=y
# CONFIG_POWER3 is not set
# CONFIG_POWER4 is not set
# CONFIG_8xx is not set
# CONFIG_PPC_STD_MMU is not set
CONFIG_OAK=y
# CONFIG_WALNUT is not set
# CONFIG_ALL_PPC is not set
# CONFIG_SMP is not set
# CONFIG_MATH_EMULATION is not set

#
# General setup
#
# CONFIG_HIGHMEM is not set
# CONFIG_ISA is not set
# CONFIG_EISA is not set
# CONFIG_SBUS is not set
# CONFIG_MCA is not set
# CONFIG_PCI is not set
CONFIG_NET=y
CONFIG_SYSCTL=y
CONFIG_SYSVIPC=y
# CONFIG_BSD_PROCESS_ACCT is not set
CONFIG_KCORE_ELF=y
CONFIG_BINFMT_ELF=y
CONFIG_KERNEL_ELF=y
# CONFIG_BINFMT_MISC is not set
# CONFIG_HOTPLUG is not set
# CONFIG_PCMCIA is not set

#
# Parallel port support
#
# CONFIG_PARPORT is not set
# CONFIG_CMDLINE_BOOL is not set

#
# Memory Technology Devices (MTD)
#
# CONFIG_MTD is not set

#
# Plug and Play configuration
#
# CONFIG_PNP is not set
# CONFIG_ISAPNP is not set

#
# Block devices
#
# CONFIG_BLK_DEV_FD is not set
# CONFIG_BLK_DEV_XD is not set
# CONFIG_PARIDE is not set
# CONFIG_BLK_CPQ_DA is not set
# CONFIG_BLK_CPQ_CISS_DA is not set
# CONFIG_BLK_DEV_DAC960 is not set
CONFIG_BLK_DEV_LOOP=y
# CONFIG_BLK_DEV_NBD is not set
CONFIG_BLK_DEV_RAM=y
CONFIG_BLK_DEV_RAM_SIZE=4096
CONFIG_BLK_DEV_INITRD=y

#
# Multi-device support (RAID and LVM)
#
# CONFIG_MD is not set
# CONFIG_BLK_DEV_MD is not set
# CONFIG_MD_LINEAR is not set
# CONFIG_MD_RAID0 is not set
# CONFIG_MD_RAID1 is not set
# CONFIG_MD_RAID5 is not set
# CONFIG_MD_MULTIPATH is not set
# CONFIG_BLK_DEV_LVM is not set

#
# Networking options
#
# CONFIG_PACKET is not set
# CONFIG_NETLINK is not set
# CONFIG_NETFILTER is not set
# CONFIG_FILTER is not set
CONFIG_UNIX=y
CONFIG_INET=y
CONFIG_IP_MULTICAST=y
# CONFIG_IP_ADVANCED_ROUTER is not set
CONFIG_IP_PNP=y
# CONFIG_IP_PNP_DHCP is not set
CONFIG_IP_PNP_BOOTP=y
CONFIG_IP_PNP_RARP=y
# CONFIG_NET_IPIP is not set
# CONFIG_NET_IPGRE is not set
# CONFIG_IP_MROUTE is not set
# CONFIG_INET_ECN is not set
CONFIG_SYN_COOKIES=y
# CONFIG_IPV6 is not set
# CONFIG_KHTTPD is not set
# CONFIG_ATM is not set
# CONFIG_VLAN_8021Q is not set

#
#  
#
# CONFIG_IPX is not set
# CONFIG_ATALK is not set
# CONFIG_DECNET is not set
# CONFIG_BRIDGE is not set
# CONFIG_X25 is not set
# CONFIG_LAPB is not set
# CONFIG_LLC is not set
# CONFIG_NET_DIVERT is not set
# CONFIG_ECONET is not set
# CONFIG_WAN_ROUTER is not set
# CONFIG_NET_FASTROUTE is not set
# CONFIG_NET_HW_FLOWCONTROL is not set

#
# QoS and/or fair queueing
#
# CONFIG_NET_SCHED is not set

#
# ATA/IDE/MFM/RLL support
#
# CONFIG_IDE is not set
# CONFIG_BLK_DEV_IDE_MODES is not set
# CONFIG_BLK_DEV_HD is not set

#
# SCSI support
#
# CONFIG_SCSI is not set

#
# Network device support
#
CONFIG_NETDEVICES=y

#
# ARCnet devices
#
# CONFIG_ARCNET is not set
# CONFIG_DUMMY is not set
# CONFIG_BONDING is not set
# CONFIG_EQUALIZER is not set
# CONFIG_TUN is not set

#
# Ethernet (10 or 100Mbit)
#
CONFIG_NET_ETHERNET=y
# CONFIG_MACE is not set
# CONFIG_BMAC is not set
# CONFIG_GMAC is not set
# CONFIG_SUNLANCE is not set
# CONFIG_SUNBMAC is not set
# CONFIG_SUNQE is not set
# CONFIG_SUNLANCE is not set
# CONFIG_SUNGEM is not set
# CONFIG_NET_VENDOR_3COM is not set
# CONFIG_LANCE is not set
# CONFIG_NET_VENDOR_SMC is not set
# CONFIG_NET_VENDOR_RACAL is not set
# CONFIG_NET_ISA is not set
# CONFIG_NET_PCI is not set
# CONFIG_NET_POCKET is not set

#
# Ethernet (1000 Mbit)
#
# CONFIG_ACENIC is not set
# CONFIG_DL2K is not set
# CONFIG_MYRI_SBUS is not set
# CONFIG_NS83820 is not set
# CONFIG_HAMACHI is not set
# CONFIG_YELLOWFIN is not set
# CONFIG_SK98LIN is not set
# CONFIG_FDDI is not set
# CONFIG_HIPPI is not set
# CONFIG_PLIP is not set
# CONFIG_PPP is not set
# CONFIG_SLIP is not set

#
# Wireless LAN (non-hamradio)
#
# CONFIG_NET_RADIO is not set

#
# Token Ring devices
#
# CONFIG_TR is not set
# CONFIG_NET_FC is not set
# CONFIG_RCPCI is not set
# CONFIG_SHAPER is not set

#
# Wan interfaces
#
# CONFIG_WAN is not set

#
# Amateur Radio support
#
# CONFIG_HAMRADIO is not set

#
# IrDA (infrared) support
#
# CONFIG_IRDA is not set

#
# ISDN subsystem
#
# CONFIG_ISDN is not set

#
# Old CD-ROM drivers (not SCSI, not IDE)
#
# CONFIG_CD_NO_IDESCSI is not set

#
# Console drivers
#

#
# Frame-buffer support
#
# CONFIG_FB is not set

#
# Input core support
#
# CONFIG_INPUT is not set
# CONFIG_INPUT_KEYBDEV is not set
# CONFIG_INPUT_MOUSEDEV is not set
# CONFIG_INPUT_JOYDEV is not set
# CONFIG_INPUT_EVDEV is not set

#
# Macintosh device drivers
#

#
# Character devices
#
# CONFIG_VT is not set
CONFIG_SERIAL=y
CONFIG_SERIAL_CONSOLE=y
# CONFIG_SERIAL_EXTENDED is not set
# CONFIG_SERIAL_NONSTANDARD is not set
# CONFIG_UNIX98_PTYS is not set

#
# I2C support
#
# CONFIG_I2C is not set

#
# Mice
#
# CONFIG_BUSMOUSE is not set
# CONFIG_MOUSE is not set

#
# Joysticks
#
# CONFIG_INPUT_GAMEPORT is not set

#
# Input core support is needed for gameports
#

#
# Input core support is needed for joysticks
#
# CONFIG_QIC02_TAPE is not set

#
# Watchdog Cards
#
# CONFIG_WATCHDOG is not set
# CONFIG_INTEL_RNG is not set
# CONFIG_NVRAM is not set
# CONFIG_RTC is not set
# CONFIG_DTLK is not set
# CONFIG_R3964 is not set
# CONFIG_APPLICOM is not set

#
# Ftape, the floppy tape device driver
#
# CONFIG_FTAPE is not set
# CONFIG_AGP is not set
# CONFIG_DRM is not set

#
# Multimedia devices
#
# CONFIG_VIDEO_DEV is not set

#
# File systems
#
# CONFIG_QUOTA is not set
# CONFIG_AUTOFS_FS is not set
# CONFIG_AUTOFS4_FS is not set
# CONFIG_REISERFS_FS is not set
# CONFIG_REISERFS_CHECK is not set
# CONFIG_ADFS_FS is not set
# CONFIG_ADFS_FS_RW is not set
# CONFIG_AFFS_FS is not set
# CONFIG_HFS_FS is not set
# CONFIG_BFS_FS is not set
# CONFIG_FAT_FS is not set
# CONFIG_MSDOS_FS is not set
# CONFIG_UMSDOS_FS is not set
# CONFIG_VFAT_FS is not set
# CONFIG_EFS_FS is not set
# CONFIG_JFFS_FS is not set
# CONFIG_JFFS2_FS is not set
# CONFIG_CRAMFS is not set
CONFIG_TMPFS=y
# CONFIG_RAMFS is not set
# CONFIG_ISO9660_FS is not set
# CONFIG_JOLIET is not set
# CONFIG_MINIX_FS is not set
# CONFIG_VXFS_FS is not set
# CONFIG_NTFS_FS is not set
# CONFIG_NTFS_RW is not set
# CONFIG_HPFS_FS is not set
CONFIG_PROC_FS=y
# CONFIG_DEVFS_FS is not set
# CONFIG_DEVFS_MOUNT is not set
# CONFIG_DEVFS_DEBUG is not set
# CONFIG_DEVPTS_FS is not set
# CONFIG_QNX4FS_FS is not set
# CONFIG_QNX4FS_RW is not set
# CONFIG_ROMFS_FS is not set
CONFIG_EXT2_FS=y
# CONFIG_SYSV_FS is not set
# CONFIG_UDF_FS is not set
# CONFIG_UDF_RW is not set
# CONFIG_UFS_FS is not set
# CONFIG_UFS_FS_WRITE is not set

#
# Network File Systems
#
# CONFIG_CODA_FS is not set
CONFIG_NFS_FS=y
# CONFIG_NFS_V3 is not set
CONFIG_ROOT_NFS=y
# CONFIG_NFSD is not set
# CONFIG_NFSD_V3 is not set
CONFIG_SUNRPC=y
CONFIG_LOCKD=y
# CONFIG_SMB_FS is not set
# CONFIG_NCP_FS is not set
# CONFIG_NCPFS_PACKET_SIGNING is not set
# CONFIG_NCPFS_IOCTL_LOCKING is not set
# CONFIG_NCPFS_STRONG is not set
# CONFIG_NCPFS_NFS_NS is not set
# CONFIG_NCPFS_OS2_NS is not set
# CONFIG_NCPFS_SMALLDOS is not set
# CONFIG_NCPFS_NLS is not set
# CONFIG_NCPFS_EXTRAS is not set

#
# Partition Types
#
# CONFIG_PARTITION_ADVANCED is not set
CONFIG_MSDOS_PARTITION=y
# CONFIG_SMB_NLS is not set
# CONFIG_NLS is not set

#
# Sound
#
# CONFIG_SOUND is not set

#
# USB support
#
# CONFIG_USB is not set

#
# USB Controllers
#
# CONFIG_USB_UHCI is not set
# CONFIG_USB_UHCI_ALT is not set
# CONFIG_USB_OHCI is not set

#
# USB Device Class drivers
#
# CONFIG_USB_AUDIO is not set
# CONFIG_USB_BLUETOOTH is not set
# CONFIG_USB_STORAGE is not set
# CONFIG_USB_STORAGE_DEBUG is not set
# CONFIG_USB_STORAGE_DATAFAB is not set
# CONFIG_USB_STORAGE_FREECOM is not set
# CONFIG_USB_STORAGE_ISD200 is not set
# CONFIG_USB_STORAGE_DPCM is not set
# CONFIG_USB_STORAGE_HP8200e is not set
# CONFIG_USB_STORAGE_SDDR09 is not set
# CONFIG_USB_STORAGE_JUMPSHOT is not set
# CONFIG_USB_ACM is not set
# CONFIG_USB_PRINTER is not set

#
# USB Human Interface Devices (HID)
#

#
#   Input core support is needed for USB HID
#

#
# USB Imaging devices
#
# CONFIG_USB_DC2XX is not set
# CONFIG_USB_MDC800 is not set
# CONFIG_USB_SCANNER is not set
# CONFIG_USB_MICROTEK is not set
# CONFIG_USB_HPUSBSCSI is not set

#
# USB Multimedia devices
#

#
#   Video4Linux support is needed for USB Multimedia device support
#

#
# USB Network adaptors
#
# CONFIG_USB_PEGASUS is not set
# CONFIG_USB_KAWETH is not set
# CONFIG_USB_CATC is not set
# CONFIG_USB_CDCETHER is not set
# CONFIG_USB_USBNET is not set

#
# USB port drivers
#
# CONFIG_USB_USS720 is not set

#
# USB Serial Converter support
#
# CONFIG_USB_SERIAL is not set
# CONFIG_USB_SERIAL_GENERIC is not set
# CONFIG_USB_SERIAL_BELKIN is not set
# CONFIG_USB_SERIAL_WHITEHEAT is not set
# CONFIG_USB_SERIAL_DIGI_ACCELEPORT is not set
# CONFIG_USB_SERIAL_EMPEG is not set
# CONFIG_USB_SERIAL_FTDI_SIO is not set
# CONFIG_USB_SERIAL_VISOR is not set
# CONFIG_USB_SERIAL_IR is not set
# CONFIG_USB_SERIAL_EDGEPORT is not set
# CONFIG_USB_SERIAL_KEYSPAN_PDA is not set
# CONFIG_USB_SERIAL_KEYSPAN is not set
# CONFIG_USB_SERIAL_KEYSPAN_USA28 is not set
# CONFIG_USB_SERIAL_KEYSPAN_USA28X is not set
# CONFIG_USB_SERIAL_KEYSPAN_USA28XA is not set
# CONFIG_USB_SERIAL_KEYSPAN_USA28XB is not set
# CONFIG_USB_SERIAL_KEYSPAN_USA19 is not set
# CONFIG_USB_SERIAL_KEYSPAN_USA18X is not set
# CONFIG_USB_SERIAL_KEYSPAN_USA19W is not set
# CONFIG_USB_SERIAL_KEYSPAN_USA49W is not set
# CONFIG_USB_SERIAL_MCT_U232 is not set
# CONFIG_USB_SERIAL_PL2303 is not set
# CONFIG_USB_SERIAL_CYBERJACK is not set
# CONFIG_USB_SERIAL_XIRCOM is not set
# CONFIG_USB_SERIAL_OMNINET is not set

#
# USB Miscellaneous drivers
#
# CONFIG_USB_RIO500 is not set

#
# Bluetooth support
#
# CONFIG_BLUEZ is not set

#
# Kernel hacking
#
# CONFIG_MAGIC_SYSRQ is not set
# CONFIG_KGDB is not set
# CONFIG_XMON is not set
#
# Automatically generated make config: don't edit
#
# CONFIG_UID16 is not set
# CONFIG_RWSEM_GENERIC_SPINLOCK is not set
CONFIG_RWSEM_XCHGADD_ALGORITHM=y
CONFIG_HAVE_DEC_LOCK=y

#
# Code maturity level options
#
CONFIG_EXPERIMENTAL=y

#
# Loadable module support
#
CONFIG_MODULES=y
# CONFIG_MODVERSIONS is not set
CONFIG_KMOD=y

#
# Platform support
#
CONFIG_PPC=y
CONFIG_PPC32=y
# CONFIG_6xx is not set
# CONFIG_4xx is not set
CONFIG_POWER3=y
# CONFIG_POWER4 is not set
# CONFIG_8xx is not set
CONFIG_PPC64BRIDGE=y
CONFIG_ALL_PPC=y
CONFIG_PPC_STD_MMU=y
CONFIG_SMP=y
# CONFIG_IRQ_ALL_CPUS is not set

#
# General setup
#
CONFIG_HIGHMEM=y
# CONFIG_ISA is not set
# CONFIG_EISA is not set
# CONFIG_SBUS is not set
# CONFIG_MCA is not set
CONFIG_PCI=y
CONFIG_NET=y
CONFIG_SYSCTL=y
CONFIG_SYSVIPC=y
# CONFIG_BSD_PROCESS_ACCT is not set
CONFIG_KCORE_ELF=y
CONFIG_BINFMT_ELF=y
CONFIG_KERNEL_ELF=y
CONFIG_BINFMT_MISC=y
CONFIG_PCI_NAMES=y
# CONFIG_HOTPLUG is not set
# CONFIG_PCMCIA is not set

#
# Parallel port support
#
CONFIG_PARPORT=m
CONFIG_PARPORT_PC=m
CONFIG_PARPORT_PC_CML1=m
# CONFIG_PARPORT_SERIAL is not set
CONFIG_PARPORT_PC_FIFO=y
# CONFIG_PARPORT_PC_SUPERIO is not set
# CONFIG_PARPORT_AMIGA is not set
# CONFIG_PARPORT_MFC3 is not set
# CONFIG_PARPORT_ATARI is not set
# CONFIG_PARPORT_GSC is not set
# CONFIG_PARPORT_SUNBPP is not set
# CONFIG_PARPORT_OTHER is not set
# CONFIG_PARPORT_1284 is not set
# CONFIG_PPC_RTC is not set
CONFIG_PROC_DEVICETREE=y
CONFIG_PPC_RTAS=y
# CONFIG_BOOTX_TEXT is not set
# CONFIG_PREP_RESIDUAL is not set
# CONFIG_CMDLINE_BOOL is not set

#
# Memory Technology Devices (MTD)
#
# CONFIG_MTD is not set

#
# Plug and Play configuration
#
# CONFIG_PNP is not set
# CONFIG_ISAPNP is not set

#
# Block devices
#
CONFIG_BLK_DEV_FD=y
# CONFIG_BLK_DEV_XD is not set
# CONFIG_PARIDE is not set
# CONFIG_BLK_CPQ_DA is not set
# CONFIG_BLK_CPQ_CISS_DA is not set
# CONFIG_BLK_DEV_DAC960 is not set
CONFIG_BLK_DEV_LOOP=y
# CONFIG_BLK_DEV_NBD is not set
CONFIG_BLK_DEV_RAM=y
CONFIG_BLK_DEV_RAM_SIZE=4096
CONFIG_BLK_DEV_INITRD=y

#
# Multi-device support (RAID and LVM)
#
CONFIG_MD=y
CONFIG_BLK_DEV_MD=y
CONFIG_MD_LINEAR=y
CONFIG_MD_RAID0=y
CONFIG_MD_RAID1=y
CONFIG_MD_RAID5=y
# CONFIG_MD_MULTIPATH is not set
CONFIG_BLK_DEV_LVM=y

#
# Networking options
#
CONFIG_PACKET=y
# CONFIG_PACKET_MMAP is not set
# CONFIG_NETLINK_DEV is not set
# CONFIG_NETFILTER is not set
# CONFIG_FILTER is not set
CONFIG_UNIX=y
CONFIG_INET=y
CONFIG_IP_MULTICAST=y
# CONFIG_IP_ADVANCED_ROUTER is not set
# CONFIG_IP_PNP is not set
# CONFIG_NET_IPIP is not set
# CONFIG_NET_IPGRE is not set
# CONFIG_IP_MROUTE is not set
# CONFIG_ARPD is not set
# CONFIG_INET_ECN is not set
CONFIG_SYN_COOKIES=y
# CONFIG_IPV6 is not set
# CONFIG_KHTTPD is not set
# CONFIG_ATM is not set
# CONFIG_VLAN_8021Q is not set

#
#  
#
# CONFIG_IPX is not set
# CONFIG_ATALK is not set
# CONFIG_DECNET is not set
# CONFIG_BRIDGE is not set
# CONFIG_X25 is not set
# CONFIG_LAPB is not set
# CONFIG_LLC is not set
# CONFIG_NET_DIVERT is not set
# CONFIG_ECONET is not set
# CONFIG_WAN_ROUTER is not set
# CONFIG_NET_FASTROUTE is not set
# CONFIG_NET_HW_FLOWCONTROL is not set

#
# QoS and/or fair queueing
#
# CONFIG_NET_SCHED is not set

#
# ATA/IDE/MFM/RLL support
#
# CONFIG_IDE is not set
# CONFIG_BLK_DEV_IDE_MODES is not set
# CONFIG_BLK_DEV_HD is not set

#
# SCSI support
#
CONFIG_SCSI=y

#
# SCSI support type (disk, tape, CD-ROM)
#
CONFIG_BLK_DEV_SD=y
CONFIG_SD_EXTRA_DEVS=40
CONFIG_CHR_DEV_ST=y
# CONFIG_CHR_DEV_OSST is not set
CONFIG_BLK_DEV_SR=y
CONFIG_BLK_DEV_SR_VENDOR=y
CONFIG_SR_EXTRA_DEVS=2
CONFIG_CHR_DEV_SG=y

#
# Some SCSI devices (e.g. CD jukebox) support multiple LUNs
#
# CONFIG_SCSI_DEBUG_QUEUES is not set
# CONFIG_SCSI_MULTI_LUN is not set
CONFIG_SCSI_CONSTANTS=y
CONFIG_SCSI_LOGGING=y

#
# SCSI low-level drivers
#
# CONFIG_BLK_DEV_3W_XXXX_RAID is not set
# CONFIG_SCSI_7000FASST is not set
# CONFIG_SCSI_ACARD is not set
# CONFIG_SCSI_AHA152X is not set
# CONFIG_SCSI_AHA1542 is not set
# CONFIG_SCSI_AHA1740 is not set
# CONFIG_SCSI_AIC7XXX is not set
# CONFIG_SCSI_AIC7XXX_OLD is not set
# CONFIG_SCSI_DPT_I2O is not set
# CONFIG_SCSI_ADVANSYS is not set
# CONFIG_SCSI_IN2000 is not set
# CONFIG_SCSI_AM53C974 is not set
# CONFIG_SCSI_MEGARAID is not set
# CONFIG_SCSI_BUSLOGIC is not set
# CONFIG_SCSI_CPQFCTS is not set
# CONFIG_SCSI_DMX3191D is not set
# CONFIG_SCSI_DTC3280 is not set
# CONFIG_SCSI_EATA is not set
# CONFIG_SCSI_EATA_DMA is not set
# CONFIG_SCSI_EATA_PIO is not set
# CONFIG_SCSI_FUTURE_DOMAIN is not set
# CONFIG_SCSI_GDTH is not set
# CONFIG_SCSI_GENERIC_NCR5380 is not set
# CONFIG_SCSI_INITIO is not set
# CONFIG_SCSI_INIA100 is not set
# CONFIG_SCSI_PPA is not set
# CONFIG_SCSI_IMM is not set
# CONFIG_SCSI_NCR53C406A is not set
# CONFIG_SCSI_NCR53C7xx is not set
CONFIG_SCSI_SYM53C8XX_2=y
CONFIG_SCSI_SYM53C8XX_DMA_ADDRESSING_MODE=0
CONFIG_SCSI_SYM53C8XX_DEFAULT_TAGS=16
CONFIG_SCSI_SYM53C8XX_MAX_TAGS=64
# CONFIG_SCSI_SYM53C8XX_IOMAPPED is not set
# CONFIG_SCSI_PAS16 is not set
# CONFIG_SCSI_PCI2000 is not set
# CONFIG_SCSI_PCI2220I is not set
# CONFIG_SCSI_PSI240I is not set
# CONFIG_SCSI_QLOGIC_FAS is not set
# CONFIG_SCSI_QLOGIC_ISP is not set
# CONFIG_SCSI_QLOGIC_FC is not set
# CONFIG_SCSI_QLOGIC_1280 is not set
# CONFIG_SCSI_SIM710 is not set
# CONFIG_SCSI_SYM53C416 is not set
# CONFIG_SCSI_DC390T is not set
# CONFIG_SCSI_T128 is not set
# CONFIG_SCSI_U14_34F is not set
# CONFIG_SCSI_DEBUG is not set
# CONFIG_SCSI_MESH is not set
# CONFIG_SCSI_MAC53C94 is not set

#
# IEEE 1394 (FireWire) support (EXPERIMENTAL)
#
# CONFIG_IEEE1394 is not set

#
# Network device support
#
CONFIG_NETDEVICES=y

#
# ARCnet devices
#
# CONFIG_ARCNET is not set
# CONFIG_DUMMY is not set
# CONFIG_BONDING is not set
# CONFIG_EQUALIZER is not set
# CONFIG_TUN is not set
# CONFIG_ETHERTAP is not set

#
# Ethernet (10 or 100Mbit)
#
CONFIG_NET_ETHERNET=y
# CONFIG_MACE is not set
# CONFIG_BMAC is not set
# CONFIG_GMAC is not set
# CONFIG_SUNLANCE is not set
# CONFIG_HAPPYMEAL is not set
# CONFIG_SUNBMAC is not set
# CONFIG_SUNQE is not set
# CONFIG_SUNLANCE is not set
# CONFIG_SUNGEM is not set
# CONFIG_NET_VENDOR_3COM is not set
# CONFIG_LANCE is not set
# CONFIG_NET_VENDOR_SMC is not set
# CONFIG_NET_VENDOR_RACAL is not set
# CONFIG_HP100 is not set
# CONFIG_NET_ISA is not set
CONFIG_NET_PCI=y
CONFIG_PCNET32=y
# CONFIG_ADAPTEC_STARFIRE is not set
# CONFIG_APRICOT is not set
# CONFIG_CS89x0 is not set
# CONFIG_TULIP is not set
# CONFIG_DE4X5 is not set
# CONFIG_DGRS is not set
# CONFIG_DM9102 is not set
# CONFIG_EEPRO100 is not set
# CONFIG_LNE390 is not set
# CONFIG_FEALNX is not set
# CONFIG_NATSEMI is not set
# CONFIG_NE2K_PCI is not set
# CONFIG_NE3210 is not set
# CONFIG_ES3210 is not set
# CONFIG_8139CP is not set
# CONFIG_8139TOO is not set
# CONFIG_8139TOO_PIO is not set
# CONFIG_8139TOO_TUNE_TWISTER is not set
# CONFIG_8139TOO_8129 is not set
# CONFIG_SIS900 is not set
# CONFIG_EPIC100 is not set
# CONFIG_SUNDANCE is not set
# CONFIG_TLAN is not set
# CONFIG_VIA_RHINE is not set
# CONFIG_VIA_RHINE_MMIO is not set
# CONFIG_WINBOND_840 is not set
# CONFIG_NET_POCKET is not set

#
# Ethernet (1000 Mbit)
#
# CONFIG_ACENIC is not set
# CONFIG_DL2K is not set
# CONFIG_MYRI_SBUS is not set
# CONFIG_NS83820 is not set
# CONFIG_HAMACHI is not set
# CONFIG_YELLOWFIN is not set
# CONFIG_SK98LIN is not set
# CONFIG_FDDI is not set
# CONFIG_HIPPI is not set
# CONFIG_PLIP is not set
# CONFIG_PPP is not set
# CONFIG_SLIP is not set

#
# Wireless LAN (non-hamradio)
#
# CONFIG_NET_RADIO is not set

#
# Token Ring devices
#
CONFIG_TR=y
CONFIG_IBMOL=y
# CONFIG_IBMLS is not set
# CONFIG_TMS380TR is not set
# CONFIG_NET_FC is not set
# CONFIG_RCPCI is not set
# CONFIG_SHAPER is not set

#
# Wan interfaces
#
# CONFIG_WAN is not set

#
# Amateur Radio support
#
# CONFIG_HAMRADIO is not set

#
# IrDA (infrared) support
#
# CONFIG_IRDA is not set

#
# ISDN subsystem
#
# CONFIG_ISDN is not set

#
# Old CD-ROM drivers (not SCSI, not IDE)
#
# CONFIG_CD_NO_IDESCSI is not set

#
# Console drivers
#
# CONFIG_VGA_CONSOLE is not set

#
# Frame-buffer support
#
CONFIG_FB=y
CONFIG_DUMMY_CONSOLE=y
# CONFIG_FB_RIVA is not set
# CONFIG_FB_CLGEN is not set
# CONFIG_FB_PM2 is not set
# CONFIG_FB_CYBER2000 is not set
CONFIG_FB_OF=y
# CONFIG_FB_CONTROL is not set
# CONFIG_FB_PLATINUM is not set
# CONFIG_FB_VALKYRIE is not set
# CONFIG_FB_CT65550 is not set
# CONFIG_FB_IMSTT is not set
# CONFIG_FB_S3TRIO is not set
# CONFIG_FB_VGA16 is not set
CONFIG_FB_MATROX=y
CONFIG_FB_MATROX_MILLENIUM=y
CONFIG_FB_MATROX_MYSTIQUE=y
CONFIG_FB_MATROX_G100=y
CONFIG_FB_MATROX_I2C=y
# CONFIG_FB_MATROX_MAVEN is not set
# CONFIG_FB_MATROX_G450 is not set
CONFIG_FB_MATROX_MULTIHEAD=y
# CONFIG_FB_ATY is not set
# CONFIG_FB_RADEON is not set
# CONFIG_FB_ATY128 is not set
# CONFIG_FB_SIS is not set
# CONFIG_FB_3DFX is not set
# CONFIG_FB_VOODOO1 is not set
# CONFIG_FB_VIRTUAL is not set
# CONFIG_FBCON_ADVANCED is not set
CONFIG_FBCON_CFB8=y
CONFIG_FBCON_CFB16=y
CONFIG_FBCON_CFB24=y
CONFIG_FBCON_CFB32=y
# CONFIG_FBCON_FONTWIDTH8_ONLY is not set
CONFIG_FBCON_FONTS=y
# CONFIG_FONT_8x8 is not set
CONFIG_FONT_8x16=y
CONFIG_FONT_SUN8x16=y
CONFIG_FONT_SUN12x22=y
# CONFIG_FONT_6x11 is not set
# CONFIG_FONT_PEARL_8x8 is not set
# CONFIG_FONT_ACORN_8x8 is not set
# CONFIG_FB_COMPAT_XPMAC is not set

#
# Input core support
#
CONFIG_INPUT=y
CONFIG_INPUT_KEYBDEV=y
CONFIG_INPUT_MOUSEDEV=y
CONFIG_INPUT_MOUSEDEV_SCREEN_X=1024
CONFIG_INPUT_MOUSEDEV_SCREEN_Y=768
# CONFIG_INPUT_JOYDEV is not set
CONFIG_INPUT_EVDEV=y

#
# Macintosh device drivers
#
# CONFIG_ADB_CUDA is not set
# CONFIG_ADB_PMU is not set
# CONFIG_MAC_FLOPPY is not set
# CONFIG_MAC_SERIAL is not set
# CONFIG_ADB is not set
CONFIG_MAC_HID=y

#
# Character devices
#
CONFIG_VT=y
CONFIG_VT_CONSOLE=y
CONFIG_SERIAL=y
CONFIG_SERIAL_CONSOLE=y
# CONFIG_SERIAL_EXTENDED is not set
# CONFIG_SERIAL_NONSTANDARD is not set
CONFIG_UNIX98_PTYS=y
CONFIG_UNIX98_PTY_COUNT=2048
CONFIG_PRINTER=m
# CONFIG_LP_CONSOLE is not set
# CONFIG_PPDEV is not set

#
# I2C support
#
CONFIG_I2C=y
CONFIG_I2C_ALGOBIT=y
# CONFIG_I2C_PHILIPSPAR is not set
# CONFIG_I2C_ELV is not set
# CONFIG_I2C_VELLEMAN is not set
CONFIG_I2C_ALGOPCF=y
# CONFIG_I2C_ELEKTOR is not set
# CONFIG_I2C_KEYWEST is not set
CONFIG_I2C_CHARDEV=y
# CONFIG_I2C_PROC is not set

#
# Mice
#
# CONFIG_BUSMOUSE is not set
CONFIG_MOUSE=y
CONFIG_PSMOUSE=y
# CONFIG_82C710_MOUSE is not set
# CONFIG_PC110_PAD is not set

#
# Joysticks
#
# CONFIG_INPUT_GAMEPORT is not set
# CONFIG_INPUT_NS558 is not set
# CONFIG_INPUT_LIGHTNING is not set
# CONFIG_INPUT_PCIGAME is not set
# CONFIG_INPUT_CS461X is not set
# CONFIG_INPUT_EMU10K1 is not set
# CONFIG_INPUT_SERIO is not set
# CONFIG_INPUT_SERPORT is not set

#
# Joysticks
#
# CONFIG_INPUT_ANALOG is not set
# CONFIG_INPUT_A3D is not set
# CONFIG_INPUT_ADI is not set
# CONFIG_INPUT_COBRA is not set
# CONFIG_INPUT_GF2K is not set
# CONFIG_INPUT_GRIP is not set
# CONFIG_INPUT_INTERACT is not set
# CONFIG_INPUT_TMDC is not set
# CONFIG_INPUT_SIDEWINDER is not set
# CONFIG_INPUT_IFORCE_USB is not set
# CONFIG_INPUT_IFORCE_232 is not set
# CONFIG_INPUT_WARRIOR is not set
# CONFIG_INPUT_MAGELLAN is not set
# CONFIG_INPUT_SPACEORB is not set
# CONFIG_INPUT_SPACEBALL is not set
# CONFIG_INPUT_STINGER is not set
# CONFIG_INPUT_DB9 is not set
# CONFIG_INPUT_GAMECON is not set
# CONFIG_INPUT_TURBOGRAFX is not set
# CONFIG_QIC02_TAPE is not set

#
# Watchdog Cards
#
# CONFIG_WATCHDOG is not set
# CONFIG_INTEL_RNG is not set
CONFIG_NVRAM=y
# CONFIG_RTC is not set
# CONFIG_DTLK is not set
# CONFIG_R3964 is not set
# CONFIG_APPLICOM is not set

#
# Ftape, the floppy tape device driver
#
# CONFIG_FTAPE is not set
# CONFIG_AGP is not set
# CONFIG_DRM is not set

#
# Multimedia devices
#
# CONFIG_VIDEO_DEV is not set

#
# File systems
#
# CONFIG_QUOTA is not set
# CONFIG_AUTOFS_FS is not set
# CONFIG_AUTOFS4_FS is not set
# CONFIG_REISERFS_FS is not set
# CONFIG_REISERFS_CHECK is not set
# CONFIG_REISERFS_PROC_INFO is not set
# CONFIG_ADFS_FS is not set
# CONFIG_ADFS_FS_RW is not set
# CONFIG_AFFS_FS is not set
# CONFIG_HFS_FS is not set
# CONFIG_BFS_FS is not set
# CONFIG_EXT3_FS is not set
# CONFIG_JBD is not set
# CONFIG_JBD_DEBUG is not set
CONFIG_FAT_FS=y
CONFIG_MSDOS_FS=y
# CONFIG_UMSDOS_FS is not set
CONFIG_VFAT_FS=y
# CONFIG_EFS_FS is not set
# CONFIG_JFFS_FS is not set
# CONFIG_JFFS2_FS is not set
# CONFIG_CRAMFS is not set
CONFIG_TMPFS=y
# CONFIG_RAMFS is not set
CONFIG_ISO9660_FS=y
CONFIG_JOLIET=y
# CONFIG_ZISOFS is not set
# CONFIG_MINIX_FS is not set
# CONFIG_VXFS_FS is not set
# CONFIG_NTFS_FS is not set
# CONFIG_NTFS_RW is not set
# CONFIG_HPFS_FS is not set
CONFIG_PROC_FS=y
# CONFIG_DEVFS_FS is not set
# CONFIG_DEVFS_MOUNT is not set
# CONFIG_DEVFS_DEBUG is not set
CONFIG_DEVPTS_FS=y
# CONFIG_QNX4FS_FS is not set
# CONFIG_QNX4FS_RW is not set
# CONFIG_ROMFS_FS is not set
CONFIG_EXT2_FS=y
# CONFIG_SYSV_FS is not set
# CONFIG_UDF_FS is not set
# CONFIG_UDF_RW is not set
# CONFIG_UFS_FS is not set
# CONFIG_UFS_FS_WRITE is not set

#
# Network File Systems
#
# CONFIG_CODA_FS is not set
# CONFIG_INTERMEZZO_FS is not set
CONFIG_NFS_FS=y
# CONFIG_NFS_V3 is not set
# CONFIG_ROOT_NFS is not set
CONFIG_NFSD=y
# CONFIG_NFSD_V3 is not set
CONFIG_SUNRPC=y
CONFIG_LOCKD=y
# CONFIG_SMB_FS is not set
# CONFIG_NCP_FS is not set
# CONFIG_NCPFS_PACKET_SIGNING is not set
# CONFIG_NCPFS_IOCTL_LOCKING is not set
# CONFIG_NCPFS_STRONG is not set
# CONFIG_NCPFS_NFS_NS is not set
# CONFIG_NCPFS_OS2_NS is not set
# CONFIG_NCPFS_SMALLDOS is not set
# CONFIG_NCPFS_NLS is not set
# CONFIG_NCPFS_EXTRAS is not set
# CONFIG_ZISOFS_FS is not set
# CONFIG_ZLIB_FS_INFLATE is not set

#
# Partition Types
#
# CONFIG_PARTITION_ADVANCED is not set
CONFIG_MSDOS_PARTITION=y
# CONFIG_SMB_NLS is not set
CONFIG_NLS=y

#
# Native Language Support
#
CONFIG_NLS_DEFAULT="iso8859-1"
CONFIG_NLS_CODEPAGE_437=y
# CONFIG_NLS_CODEPAGE_737 is not set
# CONFIG_NLS_CODEPAGE_775 is not set
# CONFIG_NLS_CODEPAGE_850 is not set
# CONFIG_NLS_CODEPAGE_852 is not set
# CONFIG_NLS_CODEPAGE_855 is not set
# CONFIG_NLS_CODEPAGE_857 is not set
# CONFIG_NLS_CODEPAGE_860 is not set
# CONFIG_NLS_CODEPAGE_861 is not set
# CONFIG_NLS_CODEPAGE_862 is not set
# CONFIG_NLS_CODEPAGE_863 is not set
# CONFIG_NLS_CODEPAGE_864 is not set
# CONFIG_NLS_CODEPAGE_865 is not set
# CONFIG_NLS_CODEPAGE_866 is not set
# CONFIG_NLS_CODEPAGE_869 is not set
# CONFIG_NLS_CODEPAGE_936 is not set
# CONFIG_NLS_CODEPAGE_950 is not set
# CONFIG_NLS_CODEPAGE_932 is not set
# CONFIG_NLS_CODEPAGE_949 is not set
# CONFIG_NLS_CODEPAGE_874 is not set
# CONFIG_NLS_ISO8859_8 is not set
# CONFIG_NLS_CODEPAGE_1251 is not set
CONFIG_NLS_ISO8859_1=y
# CONFIG_NLS_ISO8859_2 is not set
# CONFIG_NLS_ISO8859_3 is not set
# CONFIG_NLS_ISO8859_4 is not set
# CONFIG_NLS_ISO8859_5 is not set
# CONFIG_NLS_ISO8859_6 is not set
# CONFIG_NLS_ISO8859_7 is not set
# CONFIG_NLS_ISO8859_9 is not set
# CONFIG_NLS_ISO8859_13 is not set
# CONFIG_NLS_ISO8859_14 is not set
# CONFIG_NLS_ISO8859_15 is not set
# CONFIG_NLS_KOI8_R is not set
# CONFIG_NLS_KOI8_U is not set
# CONFIG_NLS_UTF8 is not set

#
# Sound
#
CONFIG_SOUND=y
# CONFIG_DMASOUND_PMAC is not set
# CONFIG_SOUND_BT878 is not set
# CONFIG_SOUND_CMPCI is not set
# CONFIG_SOUND_EMU10K1 is not set
# CONFIG_MIDI_EMU10K1 is not set
# CONFIG_SOUND_FUSION is not set
# CONFIG_SOUND_CS4281 is not set
# CONFIG_SOUND_ES1370 is not set
# CONFIG_SOUND_ES1371 is not set
# CONFIG_SOUND_ESSSOLO1 is not set
# CONFIG_SOUND_MAESTRO is not set
# CONFIG_SOUND_MAESTRO3 is not set
# CONFIG_SOUND_ICH is not set
# CONFIG_SOUND_RME96XX is not set
# CONFIG_SOUND_SONICVIBES is not set
# CONFIG_SOUND_TRIDENT is not set
# CONFIG_SOUND_MSNDCLAS is not set
# CONFIG_SOUND_MSNDPIN is not set
# CONFIG_SOUND_VIA82CXXX is not set
# CONFIG_MIDI_VIA82CXXX is not set
CONFIG_SOUND_OSS=y
CONFIG_SOUND_TRACEINIT=y
# CONFIG_SOUND_DMAP is not set
# CONFIG_SOUND_AD1816 is not set
# CONFIG_SOUND_SGALAXY is not set
# CONFIG_SOUND_ADLIB is not set
# CONFIG_SOUND_ACI_MIXER is not set
CONFIG_SOUND_CS4232=m
# CONFIG_SOUND_SSCAPE is not set
# CONFIG_SOUND_GUS is not set
# CONFIG_SOUND_VMIDI is not set
# CONFIG_SOUND_TRIX is not set
CONFIG_SOUND_MSS=m
# CONFIG_SOUND_MPU401 is not set
# CONFIG_SOUND_NM256 is not set
# CONFIG_SOUND_MAD16 is not set
# CONFIG_SOUND_PAS is not set
# CONFIG_PAS_JOYSTICK is not set
# CONFIG_SOUND_PSS is not set
# CONFIG_SOUND_SB is not set
# CONFIG_SOUND_AWE32_SYNTH is not set
# CONFIG_SOUND_WAVEFRONT is not set
# CONFIG_SOUND_MAUI is not set
# CONFIG_SOUND_YM3812 is not set
# CONFIG_SOUND_OPL3SA1 is not set
# CONFIG_SOUND_OPL3SA2 is not set
# CONFIG_SOUND_YMFPCI is not set
# CONFIG_SOUND_YMFPCI_LEGACY is not set
# CONFIG_SOUND_UART6850 is not set
# CONFIG_SOUND_AEDSP16 is not set
CONFIG_SOUND_TVMIXER=y

#
# USB support
#
# CONFIG_USB is not set

#
# USB Controllers
#
# CONFIG_USB_UHCI is not set
# CONFIG_USB_UHCI_ALT is not set
# CONFIG_USB_OHCI is not set

#
# USB Device Class drivers
#
# CONFIG_USB_AUDIO is not set
# CONFIG_USB_BLUETOOTH is not set
# CONFIG_USB_STORAGE is not set
# CONFIG_USB_STORAGE_DEBUG is not set
# CONFIG_USB_STORAGE_DATAFAB is not set
# CONFIG_USB_STORAGE_FREECOM is not set
# CONFIG_USB_STORAGE_ISD200 is not set
# CONFIG_USB_STORAGE_DPCM is not set
# CONFIG_USB_STORAGE_HP8200e is not set
# CONFIG_USB_STORAGE_SDDR09 is not set
# CONFIG_USB_STORAGE_JUMPSHOT is not set
# CONFIG_USB_ACM is not set
# CONFIG_USB_PRINTER is not set

#
# USB Human Interface Devices (HID)
#
# CONFIG_USB_HID is not set
# CONFIG_USB_HIDDEV is not set
# CONFIG_USB_KBD is not set
# CONFIG_USB_MOUSE is not set
# CONFIG_USB_WACOM is not set

#
# USB Imaging devices
#
# CONFIG_USB_DC2XX is not set
# CONFIG_USB_MDC800 is not set
# CONFIG_USB_SCANNER is not set
# CONFIG_USB_MICROTEK is not set
# CONFIG_USB_HPUSBSCSI is not set

#
# USB Multimedia devices
#

#
#   Video4Linux support is needed for USB Multimedia device support
#

#
# USB Network adaptors
#
# CONFIG_USB_PEGASUS is not set
# CONFIG_USB_KAWETH is not set
# CONFIG_USB_CATC is not set
# CONFIG_USB_CDCETHER is not set
# CONFIG_USB_USBNET is not set

#
# USB port drivers
#
# CONFIG_USB_USS720 is not set

#
# USB Serial Converter support
#
# CONFIG_USB_SERIAL is not set
# CONFIG_USB_SERIAL_GENERIC is not set
# CONFIG_USB_SERIAL_BELKIN is not set
# CONFIG_USB_SERIAL_WHITEHEAT is not set
# CONFIG_USB_SERIAL_DIGI_ACCELEPORT is not set
# CONFIG_USB_SERIAL_EMPEG is not set
# CONFIG_USB_SERIAL_FTDI_SIO is not set
# CONFIG_USB_SERIAL_VISOR is not set
# CONFIG_USB_SERIAL_IR is not set
# CONFIG_USB_SERIAL_EDGEPORT is not set
# CONFIG_USB_SERIAL_KEYSPAN_PDA is not set
# CONFIG_USB_SERIAL_KEYSPAN is not set
# CONFIG_USB_SERIAL_KEYSPAN_USA28 is not set
# CONFIG_USB_SERIAL_KEYSPAN_USA28X is not set
# CONFIG_USB_SERIAL_KEYSPAN_USA28XA is not set
# CONFIG_USB_SERIAL_KEYSPAN_USA28XB is not set
# CONFIG_USB_SERIAL_KEYSPAN_USA19 is not set
# CONFIG_USB_SERIAL_KEYSPAN_USA18X is not set
# CONFIG_USB_SERIAL_KEYSPAN_USA19W is not set
# CONFIG_USB_SERIAL_KEYSPAN_USA49W is not set
# CONFIG_USB_SERIAL_MCT_U232 is not set
# CONFIG_USB_SERIAL_PL2303 is not set
# CONFIG_USB_SERIAL_CYBERJACK is not set
# CONFIG_USB_SERIAL_XIRCOM is not set
# CONFIG_USB_SERIAL_OMNINET is not set

#
# USB Miscellaneous drivers
#
# CONFIG_USB_RIO500 is not set

#
# Bluetooth support
#
# CONFIG_BLUEZ is not set

#
# Kernel hacking
#
CONFIG_MAGIC_SYSRQ=y
# CONFIG_KGDB is not set
CONFIG_XMON=y
#
# Automatically generated make config: don't edit
#
# CONFIG_UID16 is not set
# CONFIG_RWSEM_GENERIC_SPINLOCK is not set
CONFIG_RWSEM_XCHGADD_ALGORITHM=y

#
# Code maturity level options
#
CONFIG_EXPERIMENTAL=y

#
# Loadable module support
#
# CONFIG_MODULES is not set

#
# Platform support
#
CONFIG_PPC=y
CONFIG_PPC32=y
CONFIG_6xx=y
# CONFIG_4xx is not set
# CONFIG_POWER3 is not set
# CONFIG_POWER4 is not set
# CONFIG_8xx is not set
CONFIG_8260=y
CONFIG_PPC_STD_MMU=y
CONFIG_SERIAL_CONSOLE=y
CONFIG_EST8260=y
# CONFIG_SMP is not set

#
# General setup
#
# CONFIG_HIGHMEM is not set
# CONFIG_ISA is not set
# CONFIG_EISA is not set
# CONFIG_SBUS is not set
# CONFIG_MCA is not set
# CONFIG_PCI is not set
CONFIG_NET=y
CONFIG_SYSCTL=y
CONFIG_SYSVIPC=y
# CONFIG_BSD_PROCESS_ACCT is not set
CONFIG_KCORE_ELF=y
CONFIG_BINFMT_ELF=y
CONFIG_KERNEL_ELF=y
# CONFIG_BINFMT_MISC is not set
# CONFIG_HOTPLUG is not set
# CONFIG_PCMCIA is not set

#
# Parallel port support
#
# CONFIG_PARPORT is not set
CONFIG_PPC_RTC=y
# CONFIG_CMDLINE_BOOL is not set

#
# Memory Technology Devices (MTD)
#
# CONFIG_MTD is not set

#
# Plug and Play configuration
#
# CONFIG_PNP is not set
# CONFIG_ISAPNP is not set

#
# Block devices
#
# CONFIG_BLK_DEV_FD is not set
# CONFIG_BLK_DEV_XD is not set
# CONFIG_PARIDE is not set
# CONFIG_BLK_CPQ_DA is not set
# CONFIG_BLK_CPQ_CISS_DA is not set
# CONFIG_BLK_DEV_DAC960 is not set
CONFIG_BLK_DEV_LOOP=y
# CONFIG_BLK_DEV_NBD is not set
CONFIG_BLK_DEV_RAM=y
CONFIG_BLK_DEV_RAM_SIZE=4096
CONFIG_BLK_DEV_INITRD=y

#
# Multi-device support (RAID and LVM)
#
# CONFIG_MD is not set
# CONFIG_BLK_DEV_MD is not set
# CONFIG_MD_LINEAR is not set
# CONFIG_MD_RAID0 is not set
# CONFIG_MD_RAID1 is not set
# CONFIG_MD_RAID5 is not set
# CONFIG_MD_MULTIPATH is not set
# CONFIG_BLK_DEV_LVM is not set

#
# Networking options
#
CONFIG_PACKET=y
# CONFIG_PACKET_MMAP is not set
CONFIG_NETLINK=y
# CONFIG_RTNETLINK is not set
# CONFIG_NETLINK_DEV is not set
# CONFIG_NETFILTER is not set
# CONFIG_FILTER is not set
CONFIG_UNIX=y
CONFIG_INET=y
CONFIG_IP_MULTICAST=y
# CONFIG_IP_ADVANCED_ROUTER is not set
CONFIG_IP_PNP=y
# CONFIG_IP_PNP_DHCP is not set
CONFIG_IP_PNP_BOOTP=y
# CONFIG_IP_PNP_RARP is not set
# CONFIG_NET_IPIP is not set
# CONFIG_NET_IPGRE is not set
# CONFIG_IP_MROUTE is not set
# CONFIG_INET_ECN is not set
CONFIG_SYN_COOKIES=y
# CONFIG_IPV6 is not set
# CONFIG_KHTTPD is not set
# CONFIG_ATM is not set
# CONFIG_VLAN_8021Q is not set

#
#  
#
# CONFIG_IPX is not set
# CONFIG_ATALK is not set
# CONFIG_DECNET is not set
# CONFIG_BRIDGE is not set
# CONFIG_X25 is not set
# CONFIG_LAPB is not set
# CONFIG_LLC is not set
# CONFIG_NET_DIVERT is not set
# CONFIG_ECONET is not set
# CONFIG_WAN_ROUTER is not set
# CONFIG_NET_FASTROUTE is not set
# CONFIG_NET_HW_FLOWCONTROL is not set

#
# QoS and/or fair queueing
#
# CONFIG_NET_SCHED is not set

#
# ATA/IDE/MFM/RLL support
#
# CONFIG_IDE is not set
# CONFIG_BLK_DEV_IDE_MODES is not set
# CONFIG_BLK_DEV_HD is not set

#
# SCSI support
#
# CONFIG_SCSI is not set

#
# Network device support
#
CONFIG_NETDEVICES=y

#
# ARCnet devices
#
# CONFIG_ARCNET is not set
# CONFIG_DUMMY is not set
# CONFIG_BONDING is not set
# CONFIG_EQUALIZER is not set
# CONFIG_TUN is not set
# CONFIG_ETHERTAP is not set

#
# Ethernet (10 or 100Mbit)
#
CONFIG_NET_ETHERNET=y
# CONFIG_MACE is not set
# CONFIG_BMAC is not set
# CONFIG_GMAC is not set
# CONFIG_SUNLANCE is not set
# CONFIG_SUNBMAC is not set
# CONFIG_SUNQE is not set
# CONFIG_SUNLANCE is not set
# CONFIG_SUNGEM is not set
# CONFIG_NET_VENDOR_3COM is not set
# CONFIG_LANCE is not set
# CONFIG_NET_VENDOR_SMC is not set
# CONFIG_NET_VENDOR_RACAL is not set
# CONFIG_NET_ISA is not set
# CONFIG_NET_PCI is not set
# CONFIG_NET_POCKET is not set

#
# Ethernet (1000 Mbit)
#
# CONFIG_ACENIC is not set
# CONFIG_DL2K is not set
# CONFIG_MYRI_SBUS is not set
# CONFIG_NS83820 is not set
# CONFIG_HAMACHI is not set
# CONFIG_YELLOWFIN is not set
# CONFIG_SK98LIN is not set
# CONFIG_FDDI is not set
# CONFIG_HIPPI is not set
# CONFIG_PLIP is not set
# CONFIG_PPP is not set
# CONFIG_SLIP is not set

#
# Wireless LAN (non-hamradio)
#
# CONFIG_NET_RADIO is not set

#
# Token Ring devices
#
# CONFIG_TR is not set
# CONFIG_NET_FC is not set
# CONFIG_RCPCI is not set
# CONFIG_SHAPER is not set

#
# Wan interfaces
#
# CONFIG_WAN is not set

#
# Amateur Radio support
#
# CONFIG_HAMRADIO is not set

#
# IrDA (infrared) support
#
# CONFIG_IRDA is not set

#
# ISDN subsystem
#
# CONFIG_ISDN is not set

#
# Old CD-ROM drivers (not SCSI, not IDE)
#
# CONFIG_CD_NO_IDESCSI is not set

#
# Console drivers
#
# CONFIG_VGA_CONSOLE is not set

#
# Frame-buffer support
#
# CONFIG_FB is not set

#
# Input core support
#
# CONFIG_INPUT is not set
# CONFIG_INPUT_KEYBDEV is not set
# CONFIG_INPUT_MOUSEDEV is not set
# CONFIG_INPUT_JOYDEV is not set
# CONFIG_INPUT_EVDEV is not set

#
# Macintosh device drivers
#

#
# Character devices
#
# CONFIG_VT is not set
# CONFIG_SERIAL is not set
# CONFIG_SERIAL_EXTENDED is not set
# CONFIG_SERIAL_NONSTANDARD is not set
CONFIG_UNIX98_PTYS=y
CONFIG_UNIX98_PTY_COUNT=256

#
# I2C support
#
# CONFIG_I2C is not set

#
# Mice
#
# CONFIG_BUSMOUSE is not set
# CONFIG_MOUSE is not set

#
# Joysticks
#
# CONFIG_INPUT_GAMEPORT is not set

#
# Input core support is needed for gameports
#

#
# Input core support is needed for joysticks
#
# CONFIG_QIC02_TAPE is not set

#
# Watchdog Cards
#
# CONFIG_WATCHDOG is not set
# CONFIG_INTEL_RNG is not set
# CONFIG_NVRAM is not set
# CONFIG_RTC is not set
# CONFIG_DTLK is not set
# CONFIG_R3964 is not set
# CONFIG_APPLICOM is not set

#
# Ftape, the floppy tape device driver
#
# CONFIG_FTAPE is not set
# CONFIG_AGP is not set
# CONFIG_DRM is not set

#
# Multimedia devices
#
# CONFIG_VIDEO_DEV is not set

#
# File systems
#
# CONFIG_QUOTA is not set
# CONFIG_AUTOFS_FS is not set
# CONFIG_AUTOFS4_FS is not set
# CONFIG_REISERFS_FS is not set
# CONFIG_REISERFS_CHECK is not set
# CONFIG_ADFS_FS is not set
# CONFIG_ADFS_FS_RW is not set
# CONFIG_AFFS_FS is not set
# CONFIG_HFS_FS is not set
# CONFIG_BFS_FS is not set
# CONFIG_FAT_FS is not set
# CONFIG_MSDOS_FS is not set
# CONFIG_UMSDOS_FS is not set
# CONFIG_VFAT_FS is not set
# CONFIG_EFS_FS is not set
# CONFIG_JFFS_FS is not set
# CONFIG_JFFS2_FS is not set
# CONFIG_CRAMFS is not set
CONFIG_TMPFS=y
# CONFIG_RAMFS is not set
# CONFIG_ISO9660_FS is not set
# CONFIG_JOLIET is not set
# CONFIG_MINIX_FS is not set
# CONFIG_VXFS_FS is not set
# CONFIG_NTFS_FS is not set
# CONFIG_NTFS_RW is not set
# CONFIG_HPFS_FS is not set
CONFIG_PROC_FS=y
# CONFIG_DEVFS_FS is not set
# CONFIG_DEVFS_MOUNT is not set
# CONFIG_DEVFS_DEBUG is not set
CONFIG_DEVPTS_FS=y
# CONFIG_QNX4FS_FS is not set
# CONFIG_QNX4FS_RW is not set
# CONFIG_ROMFS_FS is not set
CONFIG_EXT2_FS=y
# CONFIG_SYSV_FS is not set
# CONFIG_UDF_FS is not set
# CONFIG_UDF_RW is not set
# CONFIG_UFS_FS is not set
# CONFIG_UFS_FS_WRITE is not set

#
# Network File Systems
#
# CONFIG_CODA_FS is not set
CONFIG_NFS_FS=y
# CONFIG_NFS_V3 is not set
CONFIG_ROOT_NFS=y
# CONFIG_NFSD is not set
# CONFIG_NFSD_V3 is not set
CONFIG_SUNRPC=y
CONFIG_LOCKD=y
# CONFIG_SMB_FS is not set
# CONFIG_NCP_FS is not set
# CONFIG_NCPFS_PACKET_SIGNING is not set
# CONFIG_NCPFS_IOCTL_LOCKING is not set
# CONFIG_NCPFS_STRONG is not set
# CONFIG_NCPFS_NFS_NS is not set
# CONFIG_NCPFS_OS2_NS is not set
# CONFIG_NCPFS_SMALLDOS is not set
# CONFIG_NCPFS_NLS is not set
# CONFIG_NCPFS_EXTRAS is not set

#
# Partition Types
#
CONFIG_PARTITION_ADVANCED=y
# CONFIG_ACORN_PARTITION is not set
# CONFIG_OSF_PARTITION is not set
# CONFIG_AMIGA_PARTITION is not set
# CONFIG_ATARI_PARTITION is not set
# CONFIG_MAC_PARTITION is not set
# CONFIG_MSDOS_PARTITION is not set
# CONFIG_LDM_PARTITION is not set
# CONFIG_SGI_PARTITION is not set
# CONFIG_ULTRIX_PARTITION is not set
# CONFIG_SUN_PARTITION is not set
# CONFIG_SMB_NLS is not set
# CONFIG_NLS is not set

#
# Sound
#
# CONFIG_SOUND is not set

#
# MPC8260 Communication Options
#
CONFIG_SCC_ENET=y
CONFIG_SCC1_ENET=y
# CONFIG_FEC_ENET is not set

#
# USB support
#
# CONFIG_USB is not set

#
# USB Controllers
#
# CONFIG_USB_UHCI is not set
# CONFIG_USB_UHCI_ALT is not set
# CONFIG_USB_OHCI is not set

#
# USB Device Class drivers
#
# CONFIG_USB_AUDIO is not set
# CONFIG_USB_BLUETOOTH is not set
# CONFIG_USB_STORAGE is not set
# CONFIG_USB_STORAGE_DEBUG is not set
# CONFIG_USB_STORAGE_DATAFAB is not set
# CONFIG_USB_STORAGE_FREECOM is not set
# CONFIG_USB_STORAGE_ISD200 is not set
# CONFIG_USB_STORAGE_DPCM is not set
# CONFIG_USB_STORAGE_HP8200e is not set
# CONFIG_USB_STORAGE_SDDR09 is not set
# CONFIG_USB_STORAGE_JUMPSHOT is not set
# CONFIG_USB_ACM is not set
# CONFIG_USB_PRINTER is not set

#
# USB Human Interface Devices (HID)
#

#
#   Input core support is needed for USB HID
#

#
# USB Imaging devices
#
# CONFIG_USB_DC2XX is not set
# CONFIG_USB_MDC800 is not set
# CONFIG_USB_SCANNER is not set
# CONFIG_USB_MICROTEK is not set
# CONFIG_USB_HPUSBSCSI is not set

#
# USB Multimedia devices
#

#
#   Video4Linux support is needed for USB Multimedia device support
#

#
# USB Network adaptors
#
# CONFIG_USB_PEGASUS is not set
# CONFIG_USB_KAWETH is not set
# CONFIG_USB_CATC is not set
# CONFIG_USB_CDCETHER is not set
# CONFIG_USB_USBNET is not set

#
# USB port drivers
#
# CONFIG_USB_USS720 is not set

#
# USB Serial Converter support
#
# CONFIG_USB_SERIAL is not set
# CONFIG_USB_SERIAL_GENERIC is not set
# CONFIG_USB_SERIAL_BELKIN is not set
# CONFIG_USB_SERIAL_WHITEHEAT is not set
# CONFIG_USB_SERIAL_DIGI_ACCELEPORT is not set
# CONFIG_USB_SERIAL_EMPEG is not set
# CONFIG_USB_SERIAL_FTDI_SIO is not set
# CONFIG_USB_SERIAL_VISOR is not set
# CONFIG_USB_SERIAL_IR is not set
# CONFIG_USB_SERIAL_EDGEPORT is not set
# CONFIG_USB_SERIAL_KEYSPAN_PDA is not set
# CONFIG_USB_SERIAL_KEYSPAN is not set
# CONFIG_USB_SERIAL_KEYSPAN_USA28 is not set
# CONFIG_USB_SERIAL_KEYSPAN_USA28X is not set
# CONFIG_USB_SERIAL_KEYSPAN_USA28XA is not set
# CONFIG_USB_SERIAL_KEYSPAN_USA28XB is not set
# CONFIG_USB_SERIAL_KEYSPAN_USA19 is not set
# CONFIG_USB_SERIAL_KEYSPAN_USA18X is not set
# CONFIG_USB_SERIAL_KEYSPAN_USA19W is not set
# CONFIG_USB_SERIAL_KEYSPAN_USA49W is not set
# CONFIG_USB_SERIAL_MCT_U232 is not set
# CONFIG_USB_SERIAL_PL2303 is not set
# CONFIG_USB_SERIAL_CYBERJACK is not set
# CONFIG_USB_SERIAL_XIRCOM is not set
# CONFIG_USB_SERIAL_OMNINET is not set

#
# USB Miscellaneous drivers
#
# CONFIG_USB_RIO500 is not set

#
# Bluetooth support
#
# CONFIG_BLUEZ is not set

#
# Kernel hacking
#
# CONFIG_MAGIC_SYSRQ is not set
# CONFIG_KGDB is not set
# CONFIG_XMON is not set
#
# Automatically generated make config: don't edit
#
# CONFIG_UID16 is not set
# CONFIG_RWSEM_GENERIC_SPINLOCK is not set
CONFIG_RWSEM_XCHGADD_ALGORITHM=y

#
# Code maturity level options
#
CONFIG_EXPERIMENTAL=y

#
# Loadable module support
#
CONFIG_MODULES=y
CONFIG_MODVERSIONS=y
CONFIG_KMOD=y

#
# Platform support
#
CONFIG_PPC=y
CONFIG_PPC32=y
# CONFIG_6xx is not set
CONFIG_4xx=y
# CONFIG_POWER3 is not set
# CONFIG_POWER4 is not set
# CONFIG_8xx is not set
# CONFIG_PPC_STD_MMU is not set
# CONFIG_OAK is not set
CONFIG_WALNUT=y
# CONFIG_ALL_PPC is not set
# CONFIG_SMP is not set
# CONFIG_MATH_EMULATION is not set

#
# General setup
#
# CONFIG_HIGHMEM is not set
# CONFIG_ISA is not set
# CONFIG_EISA is not set
# CONFIG_SBUS is not set
# CONFIG_MCA is not set
# CONFIG_PCI is not set
CONFIG_NET=y
CONFIG_SYSCTL=y
CONFIG_SYSVIPC=y
# CONFIG_BSD_PROCESS_ACCT is not set
CONFIG_KCORE_ELF=y
CONFIG_BINFMT_ELF=y
CONFIG_KERNEL_ELF=y
# CONFIG_BINFMT_MISC is not set
# CONFIG_HOTPLUG is not set
# CONFIG_PCMCIA is not set

#
# Parallel port support
#
# CONFIG_PARPORT is not set
# CONFIG_CMDLINE_BOOL is not set

#
# Memory Technology Devices (MTD)
#
# CONFIG_MTD is not set

#
# Plug and Play configuration
#
# CONFIG_PNP is not set
# CONFIG_ISAPNP is not set

#
# Block devices
#
# CONFIG_BLK_DEV_FD is not set
# CONFIG_BLK_DEV_XD is not set
# CONFIG_PARIDE is not set
# CONFIG_BLK_CPQ_DA is not set
# CONFIG_BLK_CPQ_CISS_DA is not set
# CONFIG_BLK_DEV_DAC960 is not set
CONFIG_BLK_DEV_LOOP=y
# CONFIG_BLK_DEV_NBD is not set
CONFIG_BLK_DEV_RAM=y
CONFIG_BLK_DEV_RAM_SIZE=4096
CONFIG_BLK_DEV_INITRD=y

#
# Multi-device support (RAID and LVM)
#
# CONFIG_MD is not set
# CONFIG_BLK_DEV_MD is not set
# CONFIG_MD_LINEAR is not set
# CONFIG_MD_RAID0 is not set
# CONFIG_MD_RAID1 is not set
# CONFIG_MD_RAID5 is not set
# CONFIG_MD_MULTIPATH is not set
# CONFIG_BLK_DEV_LVM is not set

#
# Networking options
#
# CONFIG_PACKET is not set
# CONFIG_NETLINK is not set
# CONFIG_NETFILTER is not set
# CONFIG_FILTER is not set
CONFIG_UNIX=y
CONFIG_INET=y
CONFIG_IP_MULTICAST=y
# CONFIG_IP_ADVANCED_ROUTER is not set
CONFIG_IP_PNP=y
# CONFIG_IP_PNP_DHCP is not set
CONFIG_IP_PNP_BOOTP=y
CONFIG_IP_PNP_RARP=y
# CONFIG_NET_IPIP is not set
# CONFIG_NET_IPGRE is not set
# CONFIG_IP_MROUTE is not set
# CONFIG_INET_ECN is not set
CONFIG_SYN_COOKIES=y
# CONFIG_IPV6 is not set
# CONFIG_KHTTPD is not set
# CONFIG_ATM is not set
# CONFIG_VLAN_8021Q is not set

#
#  
#
# CONFIG_IPX is not set
# CONFIG_ATALK is not set
# CONFIG_DECNET is not set
# CONFIG_BRIDGE is not set
# CONFIG_X25 is not set
# CONFIG_LAPB is not set
# CONFIG_LLC is not set
# CONFIG_NET_DIVERT is not set
# CONFIG_ECONET is not set
# CONFIG_WAN_ROUTER is not set
# CONFIG_NET_FASTROUTE is not set
# CONFIG_NET_HW_FLOWCONTROL is not set

#
# QoS and/or fair queueing
#
# CONFIG_NET_SCHED is not set

#
# ATA/IDE/MFM/RLL support
#
# CONFIG_IDE is not set
# CONFIG_BLK_DEV_IDE_MODES is not set
# CONFIG_BLK_DEV_HD is not set

#
# SCSI support
#
# CONFIG_SCSI is not set

#
# Network device support
#
CONFIG_NETDEVICES=y

#
# ARCnet devices
#
# CONFIG_ARCNET is not set
# CONFIG_DUMMY is not set
# CONFIG_BONDING is not set
# CONFIG_EQUALIZER is not set
# CONFIG_TUN is not set

#
# Ethernet (10 or 100Mbit)
#
CONFIG_NET_ETHERNET=y
# CONFIG_MACE is not set
# CONFIG_BMAC is not set
# CONFIG_GMAC is not set
# CONFIG_SUNLANCE is not set
# CONFIG_SUNBMAC is not set
# CONFIG_SUNQE is not set
# CONFIG_SUNLANCE is not set
# CONFIG_SUNGEM is not set
# CONFIG_NET_VENDOR_3COM is not set
# CONFIG_LANCE is not set
# CONFIG_NET_VENDOR_SMC is not set
# CONFIG_NET_VENDOR_RACAL is not set
# CONFIG_NET_ISA is not set
# CONFIG_NET_PCI is not set
# CONFIG_NET_POCKET is not set

#
# Ethernet (1000 Mbit)
#
# CONFIG_ACENIC is not set
# CONFIG_DL2K is not set
# CONFIG_MYRI_SBUS is not set
# CONFIG_NS83820 is not set
# CONFIG_HAMACHI is not set
# CONFIG_YELLOWFIN is not set
# CONFIG_SK98LIN is not set
# CONFIG_FDDI is not set
# CONFIG_HIPPI is not set
# CONFIG_PLIP is not set
# CONFIG_PPP is not set
# CONFIG_SLIP is not set

#
# Wireless LAN (non-hamradio)
#
# CONFIG_NET_RADIO is not set

#
# Token Ring devices
#
# CONFIG_TR is not set
# CONFIG_NET_FC is not set
# CONFIG_RCPCI is not set
# CONFIG_SHAPER is not set

#
# Wan interfaces
#
# CONFIG_WAN is not set

#
# Amateur Radio support
#
# CONFIG_HAMRADIO is not set

#
# IrDA (infrared) support
#
# CONFIG_IRDA is not set

#
# ISDN subsystem
#
# CONFIG_ISDN is not set

#
# Old CD-ROM drivers (not SCSI, not IDE)
#
# CONFIG_CD_NO_IDESCSI is not set

#
# Console drivers
#

#
# Frame-buffer support
#
# CONFIG_FB is not set

#
# Input core support
#
# CONFIG_INPUT is not set
# CONFIG_INPUT_KEYBDEV is not set
# CONFIG_INPUT_MOUSEDEV is not set
# CONFIG_INPUT_JOYDEV is not set
# CONFIG_INPUT_EVDEV is not set

#
# Macintosh device drivers
#

#
# Character devices
#
# CONFIG_VT is not set
CONFIG_SERIAL=y
CONFIG_SERIAL_CONSOLE=y
# CONFIG_SERIAL_EXTENDED is not set
# CONFIG_SERIAL_NONSTANDARD is not set
# CONFIG_UNIX98_PTYS is not set

#
# I2C support
#
CONFIG_I2C=y
# CONFIG_I2C_ALGOBIT is not set
# CONFIG_I2C_ALGOPCF is not set
# CONFIG_I2C_CHARDEV is not set
# CONFIG_I2C_PROC is not set

#
# Mice
#
# CONFIG_BUSMOUSE is not set
# CONFIG_MOUSE is not set

#
# Joysticks
#
# CONFIG_INPUT_GAMEPORT is not set

#
# Input core support is needed for gameports
#

#
# Input core support is needed for joysticks
#
# CONFIG_QIC02_TAPE is not set

#
# Watchdog Cards
#
# CONFIG_WATCHDOG is not set
# CONFIG_INTEL_RNG is not set
# CONFIG_NVRAM is not set
# CONFIG_RTC is not set
# CONFIG_DTLK is not set
# CONFIG_R3964 is not set
# CONFIG_APPLICOM is not set

#
# Ftape, the floppy tape device driver
#
# CONFIG_FTAPE is not set
# CONFIG_AGP is not set
# CONFIG_DRM is not set

#
# Multimedia devices
#
# CONFIG_VIDEO_DEV is not set

#
# File systems
#
# CONFIG_QUOTA is not set
# CONFIG_AUTOFS_FS is not set
# CONFIG_AUTOFS4_FS is not set
# CONFIG_REISERFS_FS is not set
# CONFIG_REISERFS_CHECK is not set
# CONFIG_ADFS_FS is not set
# CONFIG_ADFS_FS_RW is not set
# CONFIG_AFFS_FS is not set
# CONFIG_HFS_FS is not set
# CONFIG_BFS_FS is not set
# CONFIG_FAT_FS is not set
# CONFIG_MSDOS_FS is not set
# CONFIG_UMSDOS_FS is not set
# CONFIG_VFAT_FS is not set
# CONFIG_EFS_FS is not set
# CONFIG_JFFS_FS is not set
# CONFIG_JFFS2_FS is not set
# CONFIG_CRAMFS is not set
CONFIG_TMPFS=y
# CONFIG_RAMFS is not set
# CONFIG_ISO9660_FS is not set
# CONFIG_JOLIET is not set
# CONFIG_MINIX_FS is not set
# CONFIG_VXFS_FS is not set
# CONFIG_NTFS_FS is not set
# CONFIG_NTFS_RW is not set
# CONFIG_HPFS_FS is not set
CONFIG_PROC_FS=y
# CONFIG_DEVFS_FS is not set
# CONFIG_DEVFS_MOUNT is not set
# CONFIG_DEVFS_DEBUG is not set
# CONFIG_DEVPTS_FS is not set
# CONFIG_QNX4FS_FS is not set
# CONFIG_QNX4FS_RW is not set
# CONFIG_ROMFS_FS is not set
CONFIG_EXT2_FS=y
# CONFIG_SYSV_FS is not set
# CONFIG_UDF_FS is not set
# CONFIG_UDF_RW is not set
# CONFIG_UFS_FS is not set
# CONFIG_UFS_FS_WRITE is not set

#
# Network File Systems
#
# CONFIG_CODA_FS is not set
CONFIG_NFS_FS=y
# CONFIG_NFS_V3 is not set
CONFIG_ROOT_NFS=y
# CONFIG_NFSD is not set
# CONFIG_NFSD_V3 is not set
CONFIG_SUNRPC=y
CONFIG_LOCKD=y
# CONFIG_SMB_FS is not set
# CONFIG_NCP_FS is not set
# CONFIG_NCPFS_PACKET_SIGNING is not set
# CONFIG_NCPFS_IOCTL_LOCKING is not set
# CONFIG_NCPFS_STRONG is not set
# CONFIG_NCPFS_NFS_NS is not set
# CONFIG_NCPFS_OS2_NS is not set
# CONFIG_NCPFS_SMALLDOS is not set
# CONFIG_NCPFS_NLS is not set
# CONFIG_NCPFS_EXTRAS is not set

#
# Partition Types
#
# CONFIG_PARTITION_ADVANCED is not set
CONFIG_MSDOS_PARTITION=y
# CONFIG_SMB_NLS is not set
# CONFIG_NLS is not set

#
# Sound
#
# CONFIG_SOUND is not set

#
# USB support
#
# CONFIG_USB is not set

#
# USB Controllers
#
# CONFIG_USB_UHCI is not set
# CONFIG_USB_UHCI_ALT is not set
# CONFIG_USB_OHCI is not set

#
# USB Device Class drivers
#
# CONFIG_USB_AUDIO is not set
# CONFIG_USB_BLUETOOTH is not set
# CONFIG_USB_STORAGE is not set
# CONFIG_USB_STORAGE_DEBUG is not set
# CONFIG_USB_STORAGE_DATAFAB is not set
# CONFIG_USB_STORAGE_FREECOM is not set
# CONFIG_USB_STORAGE_ISD200 is not set
# CONFIG_USB_STORAGE_DPCM is not set
# CONFIG_USB_STORAGE_HP8200e is not set
# CONFIG_USB_STORAGE_SDDR09 is not set
# CONFIG_USB_STORAGE_JUMPSHOT is not set
# CONFIG_USB_ACM is not set
# CONFIG_USB_PRINTER is not set

#
# USB Human Interface Devices (HID)
#

#
#   Input core support is needed for USB HID
#

#
# USB Imaging devices
#
# CONFIG_USB_DC2XX is not set
# CONFIG_USB_MDC800 is not set
# CONFIG_USB_SCANNER is not set
# CONFIG_USB_MICROTEK is not set
# CONFIG_USB_HPUSBSCSI is not set

#
# USB Multimedia devices
#

#
#   Video4Linux support is needed for USB Multimedia device support
#

#
# USB Network adaptors
#
# CONFIG_USB_PEGASUS is not set
# CONFIG_USB_KAWETH is not set
# CONFIG_USB_CATC is not set
# CONFIG_USB_CDCETHER is not set
# CONFIG_USB_USBNET is not set

#
# USB port drivers
#
# CONFIG_USB_USS720 is not set

#
# USB Serial Converter support
#
# CONFIG_USB_SERIAL is not set
# CONFIG_USB_SERIAL_GENERIC is not set
# CONFIG_USB_SERIAL_BELKIN is not set
# CONFIG_USB_SERIAL_WHITEHEAT is not set
# CONFIG_USB_SERIAL_DIGI_ACCELEPORT is not set
# CONFIG_USB_SERIAL_EMPEG is not set
# CONFIG_USB_SERIAL_FTDI_SIO is not set
# CONFIG_USB_SERIAL_VISOR is not set
# CONFIG_USB_SERIAL_IR is not set
# CONFIG_USB_SERIAL_EDGEPORT is not set
# CONFIG_USB_SERIAL_KEYSPAN_PDA is not set
# CONFIG_USB_SERIAL_KEYSPAN is not set
# CONFIG_USB_SERIAL_KEYSPAN_USA28 is not set
# CONFIG_USB_SERIAL_KEYSPAN_USA28X is not set
# CONFIG_USB_SERIAL_KEYSPAN_USA28XA is not set
# CONFIG_USB_SERIAL_KEYSPAN_USA28XB is not set
# CONFIG_USB_SERIAL_KEYSPAN_USA19 is not set
# CONFIG_USB_SERIAL_KEYSPAN_USA18X is not set
# CONFIG_USB_SERIAL_KEYSPAN_USA19W is not set
# CONFIG_USB_SERIAL_KEYSPAN_USA49W is not set
# CONFIG_USB_SERIAL_MCT_U232 is not set
# CONFIG_USB_SERIAL_PL2303 is not set
# CONFIG_USB_SERIAL_CYBERJACK is not set
# CONFIG_USB_SERIAL_XIRCOM is not set
# CONFIG_USB_SERIAL_OMNINET is not set

#
# USB Miscellaneous drivers
#
# CONFIG_USB_RIO500 is not set

#
# Bluetooth support
#
# CONFIG_BLUEZ is not set

#
# Kernel hacking
#
# CONFIG_MAGIC_SYSRQ is not set
# CONFIG_KGDB is not set
# CONFIG_XMON is not set
#
# Automatically generated make config: don't edit
#
# CONFIG_UID16 is not set
# CONFIG_RWSEM_GENERIC_SPINLOCK is not set
CONFIG_RWSEM_XCHGADD_ALGORITHM=y

#
# Code maturity level options
#
CONFIG_EXPERIMENTAL=y

#
# Loadable module support
#
# CONFIG_MODULES is not set

#
# Platform support
#
CONFIG_PPC=y
CONFIG_PPC32=y
# CONFIG_6xx is not set
# CONFIG_4xx is not set
# CONFIG_POWER3 is not set
# CONFIG_POWER4 is not set
CONFIG_8xx=y
# CONFIG_PPC_STD_MMU is not set
CONFIG_SERIAL_CONSOLE=y
# CONFIG_RPXLITE is not set
CONFIG_RPXCLASSIC=y
# CONFIG_BSEIP is not set
# CONFIG_FADS is not set
# CONFIG_TQM823L is not set
# CONFIG_TQM850L is not set
# CONFIG_TQM855L is not set
# CONFIG_TQM860L is not set
# CONFIG_FPS850L is not set
# CONFIG_TQM860 is not set
# CONFIG_SPD823TS is not set
# CONFIG_IVMS8 is not set
# CONFIG_IVML24 is not set
# CONFIG_SM850 is not set
# CONFIG_MBX is not set
# CONFIG_WINCEPT is not set
# CONFIG_ALL_PPC is not set
# CONFIG_SMP is not set
CONFIG_MATH_EMULATION=y

#
# General setup
#
# CONFIG_HIGHMEM is not set
# CONFIG_ISA is not set
# CONFIG_EISA is not set
# CONFIG_SBUS is not set
# CONFIG_MCA is not set
# CONFIG_PCI_QSPAN is not set
# CONFIG_PCI is not set
CONFIG_NET=y
CONFIG_SYSCTL=y
CONFIG_SYSVIPC=y
# CONFIG_BSD_PROCESS_ACCT is not set
CONFIG_KCORE_ELF=y
CONFIG_BINFMT_ELF=y
CONFIG_KERNEL_ELF=y
# CONFIG_BINFMT_MISC is not set
# CONFIG_HOTPLUG is not set
# CONFIG_PCMCIA is not set

#
# Parallel port support
#
# CONFIG_PARPORT is not set
CONFIG_PPC_RTC=y
# CONFIG_CMDLINE_BOOL is not set

#
# Memory Technology Devices (MTD)
#
# CONFIG_MTD is not set

#
# Plug and Play configuration
#
# CONFIG_PNP is not set
# CONFIG_ISAPNP is not set

#
# Block devices
#
# CONFIG_BLK_DEV_FD is not set
# CONFIG_BLK_DEV_XD is not set
# CONFIG_PARIDE is not set
# CONFIG_BLK_CPQ_DA is not set
# CONFIG_BLK_CPQ_CISS_DA is not set
# CONFIG_BLK_DEV_DAC960 is not set
CONFIG_BLK_DEV_LOOP=y
# CONFIG_BLK_DEV_NBD is not set
CONFIG_BLK_DEV_RAM=y
CONFIG_BLK_DEV_RAM_SIZE=4096
CONFIG_BLK_DEV_INITRD=y

#
# Multi-device support (RAID and LVM)
#
# CONFIG_MD is not set
# CONFIG_BLK_DEV_MD is not set
# CONFIG_MD_LINEAR is not set
# CONFIG_MD_RAID0 is not set
# CONFIG_MD_RAID1 is not set
# CONFIG_MD_RAID5 is not set
# CONFIG_MD_MULTIPATH is not set
# CONFIG_BLK_DEV_LVM is not set

#
# Networking options
#
CONFIG_PACKET=y
# CONFIG_PACKET_MMAP is not set
CONFIG_NETLINK=y
# CONFIG_RTNETLINK is not set
# CONFIG_NETLINK_DEV is not set
# CONFIG_NETFILTER is not set
# CONFIG_FILTER is not set
CONFIG_UNIX=y
CONFIG_INET=y
CONFIG_IP_MULTICAST=y
# CONFIG_IP_ADVANCED_ROUTER is not set
CONFIG_IP_PNP=y
# CONFIG_IP_PNP_DHCP is not set
CONFIG_IP_PNP_BOOTP=y
# CONFIG_IP_PNP_RARP is not set
# CONFIG_NET_IPIP is not set
# CONFIG_NET_IPGRE is not set
# CONFIG_IP_MROUTE is not set
# CONFIG_INET_ECN is not set
CONFIG_SYN_COOKIES=y
# CONFIG_IPV6 is not set
# CONFIG_KHTTPD is not set
# CONFIG_ATM is not set
# CONFIG_VLAN_8021Q is not set

#
#  
#
# CONFIG_IPX is not set
# CONFIG_ATALK is not set
# CONFIG_DECNET is not set
# CONFIG_BRIDGE is not set
# CONFIG_X25 is not set
# CONFIG_LAPB is not set
# CONFIG_LLC is not set
# CONFIG_NET_DIVERT is not set
# CONFIG_ECONET is not set
# CONFIG_WAN_ROUTER is not set
# CONFIG_NET_FASTROUTE is not set
# CONFIG_NET_HW_FLOWCONTROL is not set

#
# QoS and/or fair queueing
#
# CONFIG_NET_SCHED is not set

#
# ATA/IDE/MFM/RLL support
#
# CONFIG_IDE is not set
# CONFIG_BLK_DEV_IDE_MODES is not set
# CONFIG_BLK_DEV_HD is not set

#
# SCSI support
#
# CONFIG_SCSI is not set

#
# Network device support
#
CONFIG_NETDEVICES=y

#
# ARCnet devices
#
# CONFIG_ARCNET is not set
# CONFIG_DUMMY is not set
# CONFIG_BONDING is not set
# CONFIG_EQUALIZER is not set
# CONFIG_TUN is not set
# CONFIG_ETHERTAP is not set

#
# Ethernet (10 or 100Mbit)
#
CONFIG_NET_ETHERNET=y
# CONFIG_MACE is not set
# CONFIG_BMAC is not set
# CONFIG_GMAC is not set
# CONFIG_SUNLANCE is not set
# CONFIG_SUNBMAC is not set
# CONFIG_SUNQE is not set
# CONFIG_SUNLANCE is not set
# CONFIG_SUNGEM is not set
# CONFIG_NET_VENDOR_3COM is not set
# CONFIG_LANCE is not set
# CONFIG_NET_VENDOR_SMC is not set
# CONFIG_NET_VENDOR_RACAL is not set
# CONFIG_NET_ISA is not set
# CONFIG_NET_PCI is not set
# CONFIG_NET_POCKET is not set

#
# Ethernet (1000 Mbit)
#
# CONFIG_ACENIC is not set
# CONFIG_DL2K is not set
# CONFIG_MYRI_SBUS is not set
# CONFIG_NS83820 is not set
# CONFIG_HAMACHI is not set
# CONFIG_YELLOWFIN is not set
# CONFIG_SK98LIN is not set
# CONFIG_FDDI is not set
# CONFIG_HIPPI is not set
# CONFIG_PLIP is not set
# CONFIG_PPP is not set
# CONFIG_SLIP is not set

#
# Wireless LAN (non-hamradio)
#
# CONFIG_NET_RADIO is not set

#
# Token Ring devices
#
# CONFIG_TR is not set
# CONFIG_NET_FC is not set
# CONFIG_RCPCI is not set
# CONFIG_SHAPER is not set

#
# Wan interfaces
#
# CONFIG_WAN is not set

#
# Amateur Radio support
#
# CONFIG_HAMRADIO is not set

#
# IrDA (infrared) support
#
# CONFIG_IRDA is not set

#
# ISDN subsystem
#
# CONFIG_ISDN is not set

#
# Old CD-ROM drivers (not SCSI, not IDE)
#
# CONFIG_CD_NO_IDESCSI is not set

#
# Console drivers
#

#
# Frame-buffer support
#
# CONFIG_FB is not set

#
# Input core support
#
# CONFIG_INPUT is not set
# CONFIG_INPUT_KEYBDEV is not set
# CONFIG_INPUT_MOUSEDEV is not set
# CONFIG_INPUT_JOYDEV is not set
# CONFIG_INPUT_EVDEV is not set

#
# Macintosh device drivers
#

#
# Character devices
#
# CONFIG_VT is not set
# CONFIG_SERIAL is not set
# CONFIG_SERIAL_EXTENDED is not set
# CONFIG_SERIAL_NONSTANDARD is not set
CONFIG_UNIX98_PTYS=y
CONFIG_UNIX98_PTY_COUNT=256

#
# I2C support
#
# CONFIG_I2C is not set

#
# Mice
#
# CONFIG_BUSMOUSE is not set
# CONFIG_MOUSE is not set

#
# Joysticks
#
# CONFIG_INPUT_GAMEPORT is not set

#
# Input core support is needed for gameports
#

#
# Input core support is needed for joysticks
#
# CONFIG_QIC02_TAPE is not set

#
# Watchdog Cards
#
# CONFIG_WATCHDOG is not set
# CONFIG_INTEL_RNG is not set
# CONFIG_NVRAM is not set
# CONFIG_RTC is not set
# CONFIG_DTLK is not set
# CONFIG_R3964 is not set
# CONFIG_APPLICOM is not set

#
# Ftape, the floppy tape device driver
#
# CONFIG_FTAPE is not set
# CONFIG_AGP is not set
# CONFIG_DRM is not set

#
# Multimedia devices
#
# CONFIG_VIDEO_DEV is not set

#
# File systems
#
# CONFIG_QUOTA is not set
# CONFIG_AUTOFS_FS is not set
# CONFIG_AUTOFS4_FS is not set
# CONFIG_REISERFS_FS is not set
# CONFIG_REISERFS_CHECK is not set
# CONFIG_ADFS_FS is not set
# CONFIG_ADFS_FS_RW is not set
# CONFIG_AFFS_FS is not set
# CONFIG_HFS_FS is not set
# CONFIG_BFS_FS is not set
# CONFIG_FAT_FS is not set
# CONFIG_MSDOS_FS is not set
# CONFIG_UMSDOS_FS is not set
# CONFIG_VFAT_FS is not set
# CONFIG_EFS_FS is not set
# CONFIG_JFFS_FS is not set
# CONFIG_JFFS2_FS is not set
# CONFIG_CRAMFS is not set
CONFIG_TMPFS=y
# CONFIG_RAMFS is not set
# CONFIG_ISO9660_FS is not set
# CONFIG_JOLIET is not set
# CONFIG_MINIX_FS is not set
# CONFIG_VXFS_FS is not set
# CONFIG_NTFS_FS is not set
# CONFIG_NTFS_RW is not set
# CONFIG_HPFS_FS is not set
CONFIG_PROC_FS=y
# CONFIG_DEVFS_FS is not set
# CONFIG_DEVFS_MOUNT is not set
# CONFIG_DEVFS_DEBUG is not set
CONFIG_DEVPTS_FS=y
# CONFIG_QNX4FS_FS is not set
# CONFIG_QNX4FS_RW is not set
# CONFIG_ROMFS_FS is not set
CONFIG_EXT2_FS=y
# CONFIG_SYSV_FS is not set
# CONFIG_UDF_FS is not set
# CONFIG_UDF_RW is not set
# CONFIG_UFS_FS is not set
# CONFIG_UFS_FS_WRITE is not set

#
# Network File Systems
#
# CONFIG_CODA_FS is not set
CONFIG_NFS_FS=y
# CONFIG_NFS_V3 is not set
CONFIG_ROOT_NFS=y
# CONFIG_NFSD is not set
# CONFIG_NFSD_V3 is not set
CONFIG_SUNRPC=y
CONFIG_LOCKD=y
# CONFIG_SMB_FS is not set
# CONFIG_NCP_FS is not set
# CONFIG_NCPFS_PACKET_SIGNING is not set
# CONFIG_NCPFS_IOCTL_LOCKING is not set
# CONFIG_NCPFS_STRONG is not set
# CONFIG_NCPFS_NFS_NS is not set
# CONFIG_NCPFS_OS2_NS is not set
# CONFIG_NCPFS_SMALLDOS is not set
# CONFIG_NCPFS_NLS is not set
# CONFIG_NCPFS_EXTRAS is not set

#
# Partition Types
#
CONFIG_PARTITION_ADVANCED=y
# CONFIG_ACORN_PARTITION is not set
# CONFIG_OSF_PARTITION is not set
# CONFIG_AMIGA_PARTITION is not set
# CONFIG_ATARI_PARTITION is not set
# CONFIG_MAC_PARTITION is not set
# CONFIG_MSDOS_PARTITION is not set
# CONFIG_LDM_PARTITION is not set
# CONFIG_SGI_PARTITION is not set
# CONFIG_ULTRIX_PARTITION is not set
# CONFIG_SUN_PARTITION is not set
# CONFIG_SMB_NLS is not set
# CONFIG_NLS is not set

#
# Sound
#
# CONFIG_SOUND is not set

#
# MPC8xx CPM Options
#
CONFIG_SCC_ENET=y
CONFIG_SCC1_ENET=y
# CONFIG_SCC2_ENET is not set
# CONFIG_SCC3_ENET is not set
CONFIG_FEC_ENET=y
# CONFIG_USE_MDIO is not set
CONFIG_ENET_BIG_BUFFERS=y
CONFIG_SMC2_UART=y
# CONFIG_ALTSMC2 is not set
# CONFIG_CONS_SMC2 is not set
CONFIG_USE_SCC_IO=y

#
# Generic MPC8xx Options
#
CONFIG_8xx_COPYBACK=y
# CONFIG_8xx_CPU6 is not set
# CONFIG_UCODE_PATCH is not set

#
# USB support
#
# CONFIG_USB is not set

#
# USB Controllers
#
# CONFIG_USB_UHCI is not set
# CONFIG_USB_UHCI_ALT is not set
# CONFIG_USB_OHCI is not set

#
# USB Device Class drivers
#
# CONFIG_USB_AUDIO is not set
# CONFIG_USB_BLUETOOTH is not set
# CONFIG_USB_STORAGE is not set
# CONFIG_USB_STORAGE_DEBUG is not set
# CONFIG_USB_STORAGE_DATAFAB is not set
# CONFIG_USB_STORAGE_FREECOM is not set
# CONFIG_USB_STORAGE_ISD200 is not set
# CONFIG_USB_STORAGE_DPCM is not set
# CONFIG_USB_STORAGE_HP8200e is not set
# CONFIG_USB_STORAGE_SDDR09 is not set
# CONFIG_USB_STORAGE_JUMPSHOT is not set
# CONFIG_USB_ACM is not set
# CONFIG_USB_PRINTER is not set

#
# USB Human Interface Devices (HID)
#

#
#   Input core support is needed for USB HID
#

#
# USB Imaging devices
#
# CONFIG_USB_DC2XX is not set
# CONFIG_USB_MDC800 is not set
# CONFIG_USB_SCANNER is not set
# CONFIG_USB_MICROTEK is not set
# CONFIG_USB_HPUSBSCSI is not set

#
# USB Multimedia devices
#

#
#   Video4Linux support is needed for USB Multimedia device support
#

#
# USB Network adaptors
#
# CONFIG_USB_PEGASUS is not set
# CONFIG_USB_KAWETH is not set
# CONFIG_USB_CATC is not set
# CONFIG_USB_CDCETHER is not set
# CONFIG_USB_USBNET is not set

#
# USB port drivers
#
# CONFIG_USB_USS720 is not set

#
# USB Serial Converter support
#
# CONFIG_USB_SERIAL is not set
# CONFIG_USB_SERIAL_GENERIC is not set
# CONFIG_USB_SERIAL_BELKIN is not set
# CONFIG_USB_SERIAL_WHITEHEAT is not set
# CONFIG_USB_SERIAL_DIGI_ACCELEPORT is not set
# CONFIG_USB_SERIAL_EMPEG is not set
# CONFIG_USB_SERIAL_FTDI_SIO is not set
# CONFIG_USB_SERIAL_VISOR is not set
# CONFIG_USB_SERIAL_IR is not set
# CONFIG_USB_SERIAL_EDGEPORT is not set
# CONFIG_USB_SERIAL_KEYSPAN_PDA is not set
# CONFIG_USB_SERIAL_KEYSPAN is not set
# CONFIG_USB_SERIAL_KEYSPAN_USA28 is not set
# CONFIG_USB_SERIAL_KEYSPAN_USA28X is not set
# CONFIG_USB_SERIAL_KEYSPAN_USA28XA is not set
# CONFIG_USB_SERIAL_KEYSPAN_USA28XB is not set
# CONFIG_USB_SERIAL_KEYSPAN_USA19 is not set
# CONFIG_USB_SERIAL_KEYSPAN_USA18X is not set
# CONFIG_USB_SERIAL_KEYSPAN_USA19W is not set
# CONFIG_USB_SERIAL_KEYSPAN_USA49W is not set
# CONFIG_USB_SERIAL_MCT_U232 is not set
# CONFIG_USB_SERIAL_PL2303 is not set
# CONFIG_USB_SERIAL_CYBERJACK is not set
# CONFIG_USB_SERIAL_XIRCOM is not set
# CONFIG_USB_SERIAL_OMNINET is not set

#
# USB Miscellaneous drivers
#
# CONFIG_USB_RIO500 is not set

#
# Bluetooth support
#
# CONFIG_BLUEZ is not set

#
# Kernel hacking
#
# CONFIG_MAGIC_SYSRQ is not set
# CONFIG_KGDB is not set
# CONFIG_XMON is not set
#
# Automatically generated make config: don't edit
#
# CONFIG_UID16 is not set
# CONFIG_RWSEM_GENERIC_SPINLOCK is not set
CONFIG_RWSEM_XCHGADD_ALGORITHM=y

#
# Code maturity level options
#
CONFIG_EXPERIMENTAL=y

#
# Loadable module support
#
# CONFIG_MODULES is not set

#
# Platform support
#
CONFIG_PPC=y
CONFIG_PPC32=y
# CONFIG_6xx is not set
# CONFIG_4xx is not set
# CONFIG_POWER3 is not set
# CONFIG_POWER4 is not set
CONFIG_8xx=y
# CONFIG_PPC_STD_MMU is not set
CONFIG_SERIAL_CONSOLE=y
CONFIG_RPXLITE=y
# CONFIG_RPXCLASSIC is not set
# CONFIG_BSEIP is not set
# CONFIG_FADS is not set
# CONFIG_TQM823L is not set
# CONFIG_TQM850L is not set
# CONFIG_TQM855L is not set
# CONFIG_TQM860L is not set
# CONFIG_FPS850L is not set
# CONFIG_TQM860 is not set
# CONFIG_SPD823TS is not set
# CONFIG_IVMS8 is not set
# CONFIG_IVML24 is not set
# CONFIG_SM850 is not set
# CONFIG_MBX is not set
# CONFIG_WINCEPT is not set
# CONFIG_ALL_PPC is not set
# CONFIG_SMP is not set
CONFIG_MATH_EMULATION=y

#
# General setup
#
# CONFIG_HIGHMEM is not set
# CONFIG_ISA is not set
# CONFIG_EISA is not set
# CONFIG_SBUS is not set
# CONFIG_MCA is not set
# CONFIG_PCI_QSPAN is not set
# CONFIG_PCI is not set
CONFIG_NET=y
CONFIG_SYSCTL=y
CONFIG_SYSVIPC=y
# CONFIG_BSD_PROCESS_ACCT is not set
CONFIG_KCORE_ELF=y
CONFIG_BINFMT_ELF=y
CONFIG_KERNEL_ELF=y
# CONFIG_BINFMT_MISC is not set
# CONFIG_HOTPLUG is not set
# CONFIG_PCMCIA is not set

#
# Parallel port support
#
# CONFIG_PARPORT is not set
CONFIG_PPC_RTC=y
# CONFIG_CMDLINE_BOOL is not set

#
# Memory Technology Devices (MTD)
#
# CONFIG_MTD is not set

#
# Plug and Play configuration
#
# CONFIG_PNP is not set
# CONFIG_ISAPNP is not set

#
# Block devices
#
# CONFIG_BLK_DEV_FD is not set
# CONFIG_BLK_DEV_XD is not set
# CONFIG_PARIDE is not set
# CONFIG_BLK_CPQ_DA is not set
# CONFIG_BLK_CPQ_CISS_DA is not set
# CONFIG_BLK_DEV_DAC960 is not set
CONFIG_BLK_DEV_LOOP=y
# CONFIG_BLK_DEV_NBD is not set
CONFIG_BLK_DEV_RAM=y
CONFIG_BLK_DEV_RAM_SIZE=4096
CONFIG_BLK_DEV_INITRD=y

#
# Multi-device support (RAID and LVM)
#
# CONFIG_MD is not set
# CONFIG_BLK_DEV_MD is not set
# CONFIG_MD_LINEAR is not set
# CONFIG_MD_RAID0 is not set
# CONFIG_MD_RAID1 is not set
# CONFIG_MD_RAID5 is not set
# CONFIG_MD_MULTIPATH is not set
# CONFIG_BLK_DEV_LVM is not set

#
# Networking options
#
CONFIG_PACKET=y
# CONFIG_PACKET_MMAP is not set
CONFIG_NETLINK=y
# CONFIG_RTNETLINK is not set
# CONFIG_NETLINK_DEV is not set
# CONFIG_NETFILTER is not set
# CONFIG_FILTER is not set
CONFIG_UNIX=y
CONFIG_INET=y
CONFIG_IP_MULTICAST=y
# CONFIG_IP_ADVANCED_ROUTER is not set
CONFIG_IP_PNP=y
# CONFIG_IP_PNP_DHCP is not set
CONFIG_IP_PNP_BOOTP=y
# CONFIG_IP_PNP_RARP is not set
# CONFIG_NET_IPIP is not set
# CONFIG_NET_IPGRE is not set
# CONFIG_IP_MROUTE is not set
# CONFIG_INET_ECN is not set
CONFIG_SYN_COOKIES=y
# CONFIG_IPV6 is not set
# CONFIG_KHTTPD is not set
# CONFIG_ATM is not set
# CONFIG_VLAN_8021Q is not set

#
#  
#
# CONFIG_IPX is not set
# CONFIG_ATALK is not set
# CONFIG_DECNET is not set
# CONFIG_BRIDGE is not set
# CONFIG_X25 is not set
# CONFIG_LAPB is not set
# CONFIG_LLC is not set
# CONFIG_NET_DIVERT is not set
# CONFIG_ECONET is not set
# CONFIG_WAN_ROUTER is not set
# CONFIG_NET_FASTROUTE is not set
# CONFIG_NET_HW_FLOWCONTROL is not set

#
# QoS and/or fair queueing
#
# CONFIG_NET_SCHED is not set

#
# ATA/IDE/MFM/RLL support
#
# CONFIG_IDE is not set
# CONFIG_BLK_DEV_IDE_MODES is not set
# CONFIG_BLK_DEV_HD is not set

#
# SCSI support
#
# CONFIG_SCSI is not set

#
# Network device support
#
CONFIG_NETDEVICES=y

#
# ARCnet devices
#
# CONFIG_ARCNET is not set
# CONFIG_DUMMY is not set
# CONFIG_BONDING is not set
# CONFIG_EQUALIZER is not set
# CONFIG_TUN is not set
# CONFIG_ETHERTAP is not set

#
# Ethernet (10 or 100Mbit)
#
CONFIG_NET_ETHERNET=y
# CONFIG_MACE is not set
# CONFIG_BMAC is not set
# CONFIG_GMAC is not set
# CONFIG_SUNLANCE is not set
# CONFIG_SUNBMAC is not set
# CONFIG_SUNQE is not set
# CONFIG_SUNLANCE is not set
# CONFIG_SUNGEM is not set
# CONFIG_NET_VENDOR_3COM is not set
# CONFIG_LANCE is not set
# CONFIG_NET_VENDOR_SMC is not set
# CONFIG_NET_VENDOR_RACAL is not set
# CONFIG_NET_ISA is not set
# CONFIG_NET_PCI is not set
# CONFIG_NET_POCKET is not set

#
# Ethernet (1000 Mbit)
#
# CONFIG_ACENIC is not set
# CONFIG_DL2K is not set
# CONFIG_MYRI_SBUS is not set
# CONFIG_NS83820 is not set
# CONFIG_HAMACHI is not set
# CONFIG_YELLOWFIN is not set
# CONFIG_SK98LIN is not set
# CONFIG_FDDI is not set
# CONFIG_HIPPI is not set
# CONFIG_PLIP is not set
# CONFIG_PPP is not set
# CONFIG_SLIP is not set

#
# Wireless LAN (non-hamradio)
#
# CONFIG_NET_RADIO is not set

#
# Token Ring devices
#
# CONFIG_TR is not set
# CONFIG_NET_FC is not set
# CONFIG_RCPCI is not set
# CONFIG_SHAPER is not set

#
# Wan interfaces
#
# CONFIG_WAN is not set

#
# Amateur Radio support
#
# CONFIG_HAMRADIO is not set

#
# IrDA (infrared) support
#
# CONFIG_IRDA is not set

#
# ISDN subsystem
#
# CONFIG_ISDN is not set

#
# Old CD-ROM drivers (not SCSI, not IDE)
#
# CONFIG_CD_NO_IDESCSI is not set

#
# Console drivers
#

#
# Frame-buffer support
#
# CONFIG_FB is not set

#
# Input core support
#
# CONFIG_INPUT is not set
# CONFIG_INPUT_KEYBDEV is not set
# CONFIG_INPUT_MOUSEDEV is not set
# CONFIG_INPUT_JOYDEV is not set
# CONFIG_INPUT_EVDEV is not set

#
# Macintosh device drivers
#

#
# Character devices
#
# CONFIG_VT is not set
# CONFIG_SERIAL is not set
# CONFIG_SERIAL_EXTENDED is not set
# CONFIG_SERIAL_NONSTANDARD is not set
CONFIG_UNIX98_PTYS=y
CONFIG_UNIX98_PTY_COUNT=256

#
# I2C support
#
# CONFIG_I2C is not set

#
# Mice
#
# CONFIG_BUSMOUSE is not set
# CONFIG_MOUSE is not set

#
# Joysticks
#
# CONFIG_INPUT_GAMEPORT is not set

#
# Input core support is needed for gameports
#

#
# Input core support is needed for joysticks
#
# CONFIG_QIC02_TAPE is not set

#
# Watchdog Cards
#
# CONFIG_WATCHDOG is not set
# CONFIG_INTEL_RNG is not set
# CONFIG_NVRAM is not set
# CONFIG_RTC is not set
# CONFIG_DTLK is not set
# CONFIG_R3964 is not set
# CONFIG_APPLICOM is not set

#
# Ftape, the floppy tape device driver
#
# CONFIG_FTAPE is not set
# CONFIG_AGP is not set
# CONFIG_DRM is not set

#
# Multimedia devices
#
# CONFIG_VIDEO_DEV is not set

#
# File systems
#
# CONFIG_QUOTA is not set
# CONFIG_AUTOFS_FS is not set
# CONFIG_AUTOFS4_FS is not set
# CONFIG_REISERFS_FS is not set
# CONFIG_REISERFS_CHECK is not set
# CONFIG_ADFS_FS is not set
# CONFIG_ADFS_FS_RW is not set
# CONFIG_AFFS_FS is not set
# CONFIG_HFS_FS is not set
# CONFIG_BFS_FS is not set
# CONFIG_FAT_FS is not set
# CONFIG_MSDOS_FS is not set
# CONFIG_UMSDOS_FS is not set
# CONFIG_VFAT_FS is not set
# CONFIG_EFS_FS is not set
# CONFIG_JFFS_FS is not set
# CONFIG_JFFS2_FS is not set
# CONFIG_CRAMFS is not set
CONFIG_TMPFS=y
# CONFIG_RAMFS is not set
# CONFIG_ISO9660_FS is not set
# CONFIG_JOLIET is not set
# CONFIG_MINIX_FS is not set
# CONFIG_VXFS_FS is not set
# CONFIG_NTFS_FS is not set
# CONFIG_NTFS_RW is not set
# CONFIG_HPFS_FS is not set
CONFIG_PROC_FS=y
# CONFIG_DEVFS_FS is not set
# CONFIG_DEVFS_MOUNT is not set
# CONFIG_DEVFS_DEBUG is not set
CONFIG_DEVPTS_FS=y
# CONFIG_QNX4FS_FS is not set
# CONFIG_QNX4FS_RW is not set
# CONFIG_ROMFS_FS is not set
CONFIG_EXT2_FS=y
# CONFIG_SYSV_FS is not set
# CONFIG_UDF_FS is not set
# CONFIG_UDF_RW is not set
# CONFIG_UFS_FS is not set
# CONFIG_UFS_FS_WRITE is not set

#
# Network File Systems
#
# CONFIG_CODA_FS is not set
CONFIG_NFS_FS=y
# CONFIG_NFS_V3 is not set
CONFIG_ROOT_NFS=y
# CONFIG_NFSD is not set
# CONFIG_NFSD_V3 is not set
CONFIG_SUNRPC=y
CONFIG_LOCKD=y
# CONFIG_SMB_FS is not set
# CONFIG_NCP_FS is not set
# CONFIG_NCPFS_PACKET_SIGNING is not set
# CONFIG_NCPFS_IOCTL_LOCKING is not set
# CONFIG_NCPFS_STRONG is not set
# CONFIG_NCPFS_NFS_NS is not set
# CONFIG_NCPFS_OS2_NS is not set
# CONFIG_NCPFS_SMALLDOS is not set
# CONFIG_NCPFS_NLS is not set
# CONFIG_NCPFS_EXTRAS is not set

#
# Partition Types
#
CONFIG_PARTITION_ADVANCED=y
# CONFIG_ACORN_PARTITION is not set
# CONFIG_OSF_PARTITION is not set
# CONFIG_AMIGA_PARTITION is not set
# CONFIG_ATARI_PARTITION is not set
# CONFIG_MAC_PARTITION is not set
# CONFIG_MSDOS_PARTITION is not set
# CONFIG_LDM_PARTITION is not set
# CONFIG_SGI_PARTITION is not set
# CONFIG_ULTRIX_PARTITION is not set
# CONFIG_SUN_PARTITION is not set
# CONFIG_SMB_NLS is not set
# CONFIG_NLS is not set

#
# Sound
#
# CONFIG_SOUND is not set

#
# MPC8xx CPM Options
#
CONFIG_SCC_ENET=y
# CONFIG_SCC1_ENET is not set
CONFIG_SCC2_ENET=y
# CONFIG_SCC3_ENET is not set
# CONFIG_FEC_ENET is not set
# CONFIG_ENET_BIG_BUFFERS is not set
# CONFIG_SMC2_UART is not set
# CONFIG_USE_SCC_IO is not set

#
# Generic MPC8xx Options
#
CONFIG_8xx_COPYBACK=y
# CONFIG_8xx_CPU6 is not set
# CONFIG_UCODE_PATCH is not set

#
# USB support
#
# CONFIG_USB is not set

#
# USB Controllers
#
# CONFIG_USB_UHCI is not set
# CONFIG_USB_UHCI_ALT is not set
# CONFIG_USB_OHCI is not set

#
# USB Device Class drivers
#
# CONFIG_USB_AUDIO is not set
# CONFIG_USB_BLUETOOTH is not set
# CONFIG_USB_STORAGE is not set
# CONFIG_USB_STORAGE_DEBUG is not set
# CONFIG_USB_STORAGE_DATAFAB is not set
# CONFIG_USB_STORAGE_FREECOM is not set
# CONFIG_USB_STORAGE_ISD200 is not set
# CONFIG_USB_STORAGE_DPCM is not set
# CONFIG_USB_STORAGE_HP8200e is not set
# CONFIG_USB_STORAGE_SDDR09 is not set
# CONFIG_USB_STORAGE_JUMPSHOT is not set
# CONFIG_USB_ACM is not set
# CONFIG_USB_PRINTER is not set

#
# USB Human Interface Devices (HID)
#

#
#   Input core support is needed for USB HID
#

#
# USB Imaging devices
#
# CONFIG_USB_DC2XX is not set
# CONFIG_USB_MDC800 is not set
# CONFIG_USB_SCANNER is not set
# CONFIG_USB_MICROTEK is not set
# CONFIG_USB_HPUSBSCSI is not set

#
# USB Multimedia devices
#

#
#   Video4Linux support is needed for USB Multimedia device support
#

#
# USB Network adaptors
#
# CONFIG_USB_PEGASUS is not set
# CONFIG_USB_KAWETH is not set
# CONFIG_USB_CATC is not set
# CONFIG_USB_CDCETHER is not set
# CONFIG_USB_USBNET is not set

#
# USB port drivers
#
# CONFIG_USB_USS720 is not set

#
# USB Serial Converter support
#
# CONFIG_USB_SERIAL is not set
# CONFIG_USB_SERIAL_GENERIC is not set
# CONFIG_USB_SERIAL_BELKIN is not set
# CONFIG_USB_SERIAL_WHITEHEAT is not set
# CONFIG_USB_SERIAL_DIGI_ACCELEPORT is not set
# CONFIG_USB_SERIAL_EMPEG is not set
# CONFIG_USB_SERIAL_FTDI_SIO is not set
# CONFIG_USB_SERIAL_VISOR is not set
# CONFIG_USB_SERIAL_IR is not set
# CONFIG_USB_SERIAL_EDGEPORT is not set
# CONFIG_USB_SERIAL_KEYSPAN_PDA is not set
# CONFIG_USB_SERIAL_KEYSPAN is not set
# CONFIG_USB_SERIAL_KEYSPAN_USA28 is not set
# CONFIG_USB_SERIAL_KEYSPAN_USA28X is not set
# CONFIG_USB_SERIAL_KEYSPAN_USA28XA is not set
# CONFIG_USB_SERIAL_KEYSPAN_USA28XB is not set
# CONFIG_USB_SERIAL_KEYSPAN_USA19 is not set
# CONFIG_USB_SERIAL_KEYSPAN_USA18X is not set
# CONFIG_USB_SERIAL_KEYSPAN_USA19W is not set
# CONFIG_USB_SERIAL_KEYSPAN_USA49W is not set
# CONFIG_USB_SERIAL_MCT_U232 is not set
# CONFIG_USB_SERIAL_PL2303 is not set
# CONFIG_USB_SERIAL_CYBERJACK is not set
# CONFIG_USB_SERIAL_XIRCOM is not set
# CONFIG_USB_SERIAL_OMNINET is not set

#
# USB Miscellaneous drivers
#
# CONFIG_USB_RIO500 is not set

#
# Bluetooth support
#
# CONFIG_BLUEZ is not set

#
# Kernel hacking
#
# CONFIG_MAGIC_SYSRQ is not set
# CONFIG_KGDB is not set
# CONFIG_XMON is not set
#
# Automatically generated make config: don't edit
#
# CONFIG_UID16 is not set
# CONFIG_RWSEM_GENERIC_SPINLOCK is not set
CONFIG_RWSEM_XCHGADD_ALGORITHM=y
CONFIG_HAVE_DEC_LOCK=y

#
# Code maturity level options
#
CONFIG_EXPERIMENTAL=y

#
# Loadable module support
#
CONFIG_MODULES=y
# CONFIG_MODVERSIONS is not set
CONFIG_KMOD=y

#
# Platform support
#
CONFIG_PPC=y
CONFIG_PPC32=y
CONFIG_6xx=y
# CONFIG_4xx is not set
# CONFIG_POWER3 is not set
# CONFIG_POWER4 is not set
# CONFIG_8xx is not set
# CONFIG_8260 is not set
CONFIG_PPC_STD_MMU=y
CONFIG_ALL_PPC=y
# CONFIG_APUS is not set
# CONFIG_GEMINI is not set
# CONFIG_SMP is not set
# CONFIG_ALTIVEC is not set
# CONFIG_TAU is not set

#
# General setup
#
CONFIG_HIGHMEM=y
# CONFIG_ISA is not set
# CONFIG_EISA is not set
# CONFIG_SBUS is not set
# CONFIG_MCA is not set
CONFIG_PCI=y
CONFIG_NET=y
CONFIG_SYSCTL=y
CONFIG_SYSVIPC=y
# CONFIG_BSD_PROCESS_ACCT is not set
CONFIG_KCORE_ELF=y
CONFIG_BINFMT_ELF=y
CONFIG_KERNEL_ELF=y
CONFIG_BINFMT_MISC=y
CONFIG_PCI_NAMES=y
# CONFIG_HOTPLUG is not set
# CONFIG_PCMCIA is not set

#
# Parallel port support
#
# CONFIG_PARPORT is not set
CONFIG_PPC_RTC=y
# CONFIG_PPC601_SYNC_FIX is not set
CONFIG_PROC_DEVICETREE=y
CONFIG_PPC_RTAS=y
# CONFIG_BOOTX_TEXT is not set
# CONFIG_PREP_RESIDUAL is not set
# CONFIG_CMDLINE_BOOL is not set

#
# Memory Technology Devices (MTD)
#
# CONFIG_MTD is not set

#
# Plug and Play configuration
#
# CONFIG_PNP is not set
# CONFIG_ISAPNP is not set

#
# Block devices
#
CONFIG_BLK_DEV_FD=y
# CONFIG_BLK_DEV_XD is not set
# CONFIG_PARIDE is not set
# CONFIG_BLK_CPQ_DA is not set
# CONFIG_BLK_CPQ_CISS_DA is not set
# CONFIG_BLK_DEV_DAC960 is not set
CONFIG_BLK_DEV_LOOP=y
# CONFIG_BLK_DEV_NBD is not set
CONFIG_BLK_DEV_RAM=y
CONFIG_BLK_DEV_RAM_SIZE=4096
CONFIG_BLK_DEV_INITRD=y

#
# Multi-device support (RAID and LVM)
#
# CONFIG_MD is not set
# CONFIG_BLK_DEV_MD is not set
# CONFIG_MD_LINEAR is not set
# CONFIG_MD_RAID0 is not set
# CONFIG_MD_RAID1 is not set
# CONFIG_MD_RAID5 is not set
# CONFIG_MD_MULTIPATH is not set
# CONFIG_BLK_DEV_LVM is not set

#
# Networking options
#
CONFIG_PACKET=y
# CONFIG_PACKET_MMAP is not set
# CONFIG_NETLINK_DEV is not set
CONFIG_NETFILTER=y
# CONFIG_NETFILTER_DEBUG is not set
# CONFIG_FILTER is not set
CONFIG_UNIX=y
CONFIG_INET=y
CONFIG_IP_MULTICAST=y
# CONFIG_IP_ADVANCED_ROUTER is not set
# CONFIG_IP_PNP is not set
# CONFIG_NET_IPIP is not set
# CONFIG_NET_IPGRE is not set
# CONFIG_IP_MROUTE is not set
# CONFIG_ARPD is not set
# CONFIG_INET_ECN is not set
CONFIG_SYN_COOKIES=y

#
#   IP: Netfilter Configuration
#
CONFIG_IP_NF_CONNTRACK=m
CONFIG_IP_NF_FTP=m
CONFIG_IP_NF_IRC=m
# CONFIG_IP_NF_QUEUE is not set
CONFIG_IP_NF_IPTABLES=m
CONFIG_IP_NF_MATCH_LIMIT=m
CONFIG_IP_NF_MATCH_MAC=m
CONFIG_IP_NF_MATCH_MARK=m
CONFIG_IP_NF_MATCH_MULTIPORT=m
CONFIG_IP_NF_MATCH_TOS=m
CONFIG_IP_NF_MATCH_LENGTH=m
CONFIG_IP_NF_MATCH_TTL=m
CONFIG_IP_NF_MATCH_TCPMSS=m
CONFIG_IP_NF_MATCH_STATE=m
CONFIG_IP_NF_MATCH_UNCLEAN=m
CONFIG_IP_NF_MATCH_OWNER=m
CONFIG_IP_NF_FILTER=m
CONFIG_IP_NF_TARGET_REJECT=m
CONFIG_IP_NF_TARGET_MIRROR=m
CONFIG_IP_NF_NAT=m
CONFIG_IP_NF_NAT_NEEDED=y
CONFIG_IP_NF_TARGET_MASQUERADE=m
CONFIG_IP_NF_TARGET_REDIRECT=m
CONFIG_IP_NF_NAT_SNMP_BASIC=m
CONFIG_IP_NF_NAT_IRC=m
CONFIG_IP_NF_NAT_FTP=m
# CONFIG_IP_NF_MANGLE is not set
# CONFIG_IP_NF_TARGET_LOG is not set
CONFIG_IP_NF_TARGET_TCPMSS=m
CONFIG_IP_NF_COMPAT_IPCHAINS=m
CONFIG_IP_NF_NAT_NEEDED=y
# CONFIG_IP_NF_COMPAT_IPFWADM is not set
# CONFIG_IPV6 is not set
# CONFIG_KHTTPD is not set
# CONFIG_ATM is not set
# CONFIG_VLAN_8021Q is not set

#
#  
#
# CONFIG_IPX is not set
# CONFIG_ATALK is not set
# CONFIG_DECNET is not set
# CONFIG_BRIDGE is not set
# CONFIG_X25 is not set
# CONFIG_LAPB is not set
# CONFIG_LLC is not set
# CONFIG_NET_DIVERT is not set
# CONFIG_ECONET is not set
# CONFIG_WAN_ROUTER is not set
# CONFIG_NET_FASTROUTE is not set
# CONFIG_NET_HW_FLOWCONTROL is not set

#
# QoS and/or fair queueing
#
# CONFIG_NET_SCHED is not set

#
# ATA/IDE/MFM/RLL support
#
# CONFIG_IDE is not set
# CONFIG_BLK_DEV_IDE_MODES is not set
# CONFIG_BLK_DEV_HD FIG_NET == 1) && ($CONFIG_EXPERIMENTAL == 1) && ($CONFIG_INET == 1)} then {write_tristate $cfg $autocfg CONFIG_ECONET $CONFIG_ECONET [list $notmod] 2 }
	global CONFIG_ECONET_AUNUDP
	if {($CONFIG_NET == 1) && ($CONFIG_EXPERIMENTAL == 1) && ($CONFIG_ECONET != 0)} then {write_tristate $cfg $autocfg CONFIG_ECONET_AUNUDP $CONFIG_ECONET_AUNUDP [list $notmod] 2 }
	global CONFIG_ECONET_NATIVE
	if {($CONFIG_NET == 1) && ($CONFIG_EXPERIMENTAL == 1) && ($CONFIG_ECONET != 0)} then {write_tristate $cfg $autocfg CONFIG_ECONET_NATIVE $CONFIG_ECONET_NATIVE [list $notmod] 2 }
	global CONFIG_WAN_ROUTER
	if {($CONFIG_NET == 1) && ($CONFIG_EXPERIMENTAL == 1)} then {write_tristate $cfg $autocfg CONFIG_WAN_ROUTER $CONFIG_WAN_ROUTER [list $notmod] 2 }
	global CONFIG_NET_FASTROUTE
	if {($CONFIG_NET == 1) && ($CONFIG_EXPERIMENTAL == 1)} then {write_tristate $cfg $autocfg CONFIG_NET_FASTROUTE $CONFIG_NET_FASTROUTE [list $notmod] 2 }
	global CONFIG_NET_HW_FLOWCONTROL
	if {($CONFIG_NET == 1) && ($CONFIG_EXPERIMENTAL == 1)} then {write_tristate $cfg $autocfg CONFIG_NET_HW_FLOWCONTROL $CONFIG_NET_HW_FLOWCONTROL [list $notmod] 2 }
	if {($CONFIG_NET == 1)} then {write_comment $cfg $autocfg "QoS and/or fair queueing"}
	global CONFIG_NET_SCHED
	if {($CONFIG_NET == 1)} then {write_tristate $cfg $autocfg CONFIG_NET_SCHED $CONFIG_NET_SCHED [list $notmod] 2 }
	global CONFIG_NET_SCH_CBQ
	if {($CONFIG_NET == 1) && ($CONFIG_NET_SCHED == 1)} then {write_tristate $cfg $autocfg CONFIG_NET_SCH_CBQ $CONFIG_NET_SCH_CBQ [list $notmod] 2 }
	global CONFIG_NET_SCH_CSZ
	if {($CONFIG_NET == 1) && ($CONFIG_NET_SCHED == 1)} then {write_tristate $cfg $autocfg CONFIG_NET_SCH_CSZ $CONFIG_NET_SCH_CSZ [list $notmod] 2 }
	global CONFIG_NET_SCH_ATM
	if {($CONFIG_NET == 1) && ($CONFIG_NET_SCHED == 1) && ($CONFIG_ATM == 1)} then {write_tristate $cfg $autocfg CONFIG_NET_SCH_ATM $CONFIG_NET_SCH_ATM [list $notmod] 2 }
	global CONFIG_NET_SCH_PRIO
	if {($CONFIG_NET == 1) && ($CONFIG_NET_SCHED == 1)} then {write_tristate $cfg $autocfg CONFIG_NET_SCH_PRIO $CONFIG_NET_SCH_PRIO [list $notmod] 2 }
	global CONFIG_NET_SCH_RED
	if {($CONFIG_NET == 1) && ($CONFIG_NET_SCHED == 1)} then {write_tristate $cfg $autocfg CONFIG_NET_SCH_RED $CONFIG_NET_SCH_RED [list $notmod] 2 }
	global CONFIG_NET_SCH_SFQ
	if {($CONFIG_NET == 1) && ($CONFIG_NET_SCHED == 1)} then {write_tristate $cfg $autocfg CONFIG_NET_SCH_SFQ $CONFIG_NET_SCH_SFQ [list $notmod] 2 }
	global CONFIG_NET_SCH_TEQL
	if {($CONFIG_NET == 1) && ($CONFIG_NET_SCHED == 1)} then {write_tristate $cfg $autocfg CONFIG_NET_SCH_TEQL $CONFIG_NET_SCH_TEQL [list $notmod] 2 }
	global CONFIG_NET_SCH_TBF
	if {($CONFIG_NET == 1) && ($CONFIG_NET_SCHED == 1)} then {write_tristate $cfg $autocfg CONFIG_NET_SCH_TBF $CONFIG_NET_SCH_TBF [list $notmod] 2 }
	global CONFIG_NET_SCH_GRED
	if {($CONFIG_NET == 1) && ($CONFIG_NET_SCHED == 1)} then {write_tristate $cfg $autocfg CONFIG_NET_SCH_GRED $CONFIG_NET_SCH_GRED [list $notmod] 2 }
	global CONFIG_NET_SCH_DSMARK
	if {($CONFIG_NET == 1) && ($CONFIG_NET_SCHED == 1)} then {write_tristate $cfg $autocfg CONFIG_NET_SCH_DSMARK $CONFIG_NET_SCH_DSMARK [list $notmod] 2 }
	global CONFIG_NET_SCH_INGRESS
	if {($CONFIG_NET == 1) && ($CONFIG_NET_SCHED == 1) && ($CONFIG_NETFILTER == 1)} then {write_tristate $cfg $autocfg CONFIG_NET_SCH_INGRESS $CONFIG_NET_SCH_INGRESS [list $notmod] 2 }
	global CONFIG_NET_QOS
	if {($CONFIG_NET == 1) && ($CONFIG_NET_SCHED == 1)} then {write_tristate $cfg $autocfg CONFIG_NET_QOS $CONFIG_NET_QOS [list $notmod] 2 }
	global CONFIG_NET_ESTIMATOR
	if {($CONFIG_NET == 1) && ($CONFIG_NET_SCHED == 1) && ($CONFIG_NET_QOS == 1)} then {write_tristate $cfg $autocfg CONFIG_NET_ESTIMATOR $CONFIG_NET_ESTIMATOR [list $notmod] 2 }
	global CONFIG_NET_CLS
	if {($CONFIG_NET == 1) && ($CONFIG_NET_SCHED == 1)} then {write_tristate $cfg $autocfg CONFIG_NET_CLS $CONFIG_NET_CLS [list $notmod] 2 }
	global CONFIG_NET_CLS_TCINDEX
	if {($CONFIG_NET == 1) && ($CONFIG_NET_SCHED == 1) && ($CONFIG_NET_CLS == 1)} then {write_tristate $cfg $autocfg CONFIG_NET_CLS_TCINDEX $CONFIG_NET_CLS_TCINDEX [list $notmod] 2 }
	global CONFIG_NET_CLS_ROUTE4
	if {($CONFIG_NET == 1) && ($CONFIG_NET_SCHED == 1) && ($CONFIG_NET_CLS == 1)} then {write_tristate $cfg $autocfg CONFIG_NET_CLS_ROUTE4 $CONFIG_NET_CLS_ROUTE4 [list $notmod] 2 }
	global CONFIG_NET_CLS_ROUTE
	if {($CONFIG_NET == 1) && ($CONFIG_NET_SCHED == 1) && ($CONFIG_NET_CLS == 1) && ($CONFIG_NET_CLS_ROUTE4 != 0)} then {write_tristate $cfg $autocfg CONFIG_NET_CLS_ROUTE $CONSTANT_Y [list $notmod] 2 }
	global CONFIG_NET_CLS_FW
	if {($CONFIG_NET == 1) && ($CONFIG_NET_SCHED == 1) && ($CONFIG_NET_CLS == 1)} then {write_tristate $cfg $autocfg CONFIG_NET_CLS_FW $CONFIG_NET_CLS_FW [list $notmod] 2 }
	global CONFIG_NET_CLS_U32
	if {($CONFIG_NET == 1) && ($CONFIG_NET_SCHED == 1) && ($CONFIG_NET_CLS == 1)} then {write_tristate $cfg $autocfg CONFIG_NET_CLS_U32 $CONFIG_NET_CLS_U32 [list $notmod] 2 }
	global CONFIG_NET_CLS_RSVP
	if {($CONFIG_NET == 1) && ($CONFIG_NET_SCHED == 1) && ($CONFIG_NET_CLS == 1) && ($CONFIG_NET_QOS == 1)} then {write_tristate $cfg $autocfg CONFIG_NET_CLS_RSVP $CONFIG_NET_CLS_RSVP [list $notmod] 2 }
	global CONFIG_NET_CLS_RSVP6
	if {($CONFIG_NET == 1) && ($CONFIG_NET_SCHED == 1) && ($CONFIG_NET_CLS == 1) && ($CONFIG_NET_QOS == 1)} then {write_tristate $cfg $autocfg CONFIG_NET_CLS_RSVP6 $CONFIG_NET_CLS_RSVP6 [list $notmod] 2 }
	global CONFIG_NET_CLS_POLICE
	if {($CONFIG_NET == 1) && ($CONFIG_NET_SCHED == 1) && ($CONFIG_NET_CLS == 1) && ($CONFIG_NET_QOS == 1)} then {write_tristate $cfg $autocfg CONFIG_NET_CLS_POLICE $CONFIG_NET_CLS_POLICE [list $notmod] 2 }
	if {($CONFIG_NET == 1)} then {write_comment $cfg $autocfg "Network testing"}
	global CONFIG_NET_PKTGEN
	if {($CONFIG_NET == 1)} then {write_tristate $cfg $autocfg CONFIG_NET_PKTGEN $CONFIG_NET_PKTGEN [list $notmod] 2 }
	write_comment $cfg $autocfg "Telephony Support"
	global CONFIG_PHONE
	write_tristate $cfg $autocfg CONFIG_PHONE $CONFIG_PHONE [list $notmod] 2
	global CONFIG_PHONE_IXJ
	if {($CONFIG_PHONE == 1 || $CONFIG_PHONE == 2 || $CONFIG_PHONE == 4)} then {write_tristate $cfg $autocfg CONFIG_PHONE_IXJ $CONFIG_PHONE_IXJ [list $CONFIG_PHONE] 2 }
	global CONFIG_PHONE_IXJ_PCMCIA
	if {($CONFIG_PHONE_IXJ == 1 || $CONFIG_PHONE_IXJ == 2 || $CONFIG_PHONE_IXJ == 4) && ($CONFIG_PCMCIA == 1 || $CONFIG_PCMCIA == 2 || $CONFIG_PCMCIA == 4)} then {write_tristate $cfg $autocfg CONFIG_PHONE_IXJ_PCMCIA $CONFIG_PHONE_IXJ_PCMCIA [list $CONFIG_PHONE_IXJ $CONFIG_PCMCIA] 2 }
	write_comment $cfg $autocfg "ATA/IDE/MFM/RLL support"
	global CONFIG_IDE
	write_tristate $cfg $autocfg CONFIG_IDE $CONFIG_IDE [list $notmod] 2
	if {($CONFIG_IDE != 0)} then {write_comment $cfg $autocfg "IDE, ATA and ATAPI Block devices"}
	global CONFIG_BLK_DEV_IDE
	if {($CONFIG_IDE != 0) && ($CONFIG_IDE == 1 || $CONFIG_IDE == 2 || $CONFIG_IDE == 4)} then {write_tristate $cfg $autocfg CONFIG_BLK_DEV_IDE $CONFIG_BLK_DEV_IDE [list $CONFIG_IDE] 2 }
	if {($CONFIG_IDE != 0)} then {write_comment $cfg $autocfg "Please see Documentation/ide.txt for help/info on IDE drives"}
	global CONFIG_BLK_DEV_HD_IDE
	if {($CONFIG_IDE != 0) && ($CONFIG_BLK_DEV_IDE != 0) && ($CONFIG_X86 == 1 || $CONFIG_X86 == 4)} then {write_tristate $cfg $autocfg CONFIG_BLK_DEV_HD_IDE $CONFIG_BLK_DEV_HD_IDE [list $CONFIG_X86] 2 }
	global CONFIG_BLK_DEV_HD
	if {($CONFIG_IDE != 0) && ($CONFIG_BLK_DEV_IDE != 0)} then {write_tristate $cfg $autocfg CONFIG_BLK_DEV_HD $CONFIG_BLK_DEV_HD_IDE [list $notmod] 2 }
	global CONFIG_BLK_DEV_IDEDISK
	if {($CONFIG_IDE != 0) && ($CONFIG_BLK_DEV_IDE != 0) && ($CONFIG_BLK_DEV_IDE == 1 || $CONFIG_BLK_DEV_IDE == 2 || $CONFIG_BLK_DEV_IDE == 4)} then {write_tristate $cfg $autocfg CONFIG_BLK_DEV_IDEDISK $CONFIG_BLK_DEV_IDEDISK [list $CONFIG_BLK_DEV_IDE] 2 }
	global CONFIG_IDEDISK_MULTI_MODE
	if {($CONFIG_IDE != 0) && ($CONFIG_BLK_DEV_IDE != 0) && ($CONFIG_BLK_DEV_IDEDISK == 1 || $CONFIG_BLK_DEV_IDEDISK == 2 || $CONFIG_BLK_DEV_IDEDISK == 4)} then {write_tristate $cfg $autocfg CONFIG_IDEDISK_MULTI_MODE $CONFIG_IDEDISK_MULTI_MODE [list $CONFIG_BLK_DEV_IDEDISK] 1 }
	global CONFIG_IDEDISK_STROKE
	if {($CONFIG_IDE != 0) && ($CONFIG_BLK_DEV_IDE != 0) && ($CONFIG_BLK_DEV_IDEDISK == 1 || $CONFIG_BLK_DEV_IDEDISK == 2 || $CONFIG_BLK_DEV_IDEDISK == 4)} then {write_tristate $cfg $autocfg CONFIG_IDEDISK_STROKE $CONFIG_IDEDISK_STROKE [list $CONFIG_BLK_DEV_IDEDISK] 1 }
	global CONFIG_BLK_DEV_IDEDISK_VENDOR
	if {($CONFIG_IDE != 0) && ($CONFIG_BLK_DEV_IDE != 0)} then {write_tristate $cfg $autocfg CONFIG_BLK_DEV_IDEDISK_VENDOR $CONSTANT_N [list $notmod] 2 }
	global CONFIG_BLK_DEV_IDEDISK_FUJITSU
	if {($CONFIG_IDE != 0) && ($CONFIG_BLK_DEV_IDE != 0) && ($CONFIG_BLK_DEV_IDEDISK_VENDOR == 1 || $CONFIG_BLK_DEV_IDEDISK_VENDOR == 2 || $CONFIG_BLK_DEV_IDEDISK_VENDOR == 4)} then {write_tristate $cfg $autocfg CONFIG_BLK_DEV_IDEDISK_FUJITSU $CONFIG_BLK_DEV_IDEDISK_FUJITSU [list $CONFIG_BLK_DEV_IDEDISK_VENDOR] 1 }
	global CONFIG_BLK_DEV_IDEDISK_IBM
	if {($CONFIG_IDE != 0) && ($CONFIG_BLK_DEV_IDE != 0) && ($CONFIG_BLK_DEV_IDEDISK_VENDOR == 1 || $CONFIG_BLK_DEV_IDEDISK_VENDOR == 2 || $CONFIG_BLK_DEV_IDEDISK_VENDOR == 4)} then {write_tristate $cfg $autocfg CONFIG_BLK_DEV_IDEDISK_IBM $CONFIG_BLK_DEV_IDEDISK_IBM [list $CONFIG_BLK_DEV_IDEDISK_VENDOR] 1 }
	global CONFIG_BLK_DEV_IDEDISK_MAXTOR
	if {($CONFIG_IDE != 0) && ($CONFIG_BLK_DEV_IDE != 0) && ($CONFIG_BLK_DEV_IDEDISK_VENDOR == 1 || $CONFIG_BLK_DEV_IDEDISK_VENDOR == 2 || $CONFIG_BLK_DEV_IDEDISK_VENDOR == 4)} then {write_tristate $cfg $autocfg CONFIG_BLK_DEV_IDEDISK_MAXTOR $CONFIG_BLK_DEV_IDEDISK_MAXTOR [list $CONFIG_BLK_DEV_IDEDISK_VENDOR] 1 }
	global CONFIG_BLK_DEV_IDEDISK_QUANTUM
	if {($CONFIG_IDE != 0) && ($CONFIG_BLK_DEV_IDE != 0) && ($CONFIG_BLK_DEV_IDEDISK_VENDOR == 1 || $CONFIG_BLK_DEV_IDEDISK_VENDOR == 2 || $CONFIG_BLK_DEV_IDEDISK_VENDOR == 4)} then {write_tristate $cfg $autocfg CONFIG_BLK_DEV_IDEDISK_QUANTUM $CONFIG_BLK_DEV_IDEDISK_QUANTUM [list $CONFIG_BLK_DEV_IDEDISK_VENDOR] 1 }
	global CONFIG_BLK_DEV_IDEDISK_SEAGATE
	if {($CONFIG_IDE != 0) && ($CONFIG_BLK_DEV_IDE != 0) && ($CONFIG_BLK_DEV_IDEDISK_VENDOR == 1 || $CONFIG_BLK_DEV_IDEDISK_VENDOR == 2 || $CONFIG_BLK_DEV_IDEDISK_VENDOR == 4)} then {write_tristate $cfg $autocfg CONFIG_BLK_DEV_IDEDISK_SEAGATE $CONFIG_BLK_DEV_IDEDISK_SEAGATE [list $CONFIG_BLK_DEV_IDEDISK_VENDOR] 1 }
	global CONFIG_BLK_DEV_IDEDISK_WD
	if {($CONFIG_IDE != 0) && ($CONFIG_BLK_DEV_IDE != 0) && ($CONFIG_BLK_DEV_IDEDISK_VENDOR == 1 || $CONFIG_BLK_DEV_IDEDISK_VENDOR == 2 || $CONFIG_BLK_DEV_IDEDISK_VENDOR == 4)} then {write_tristate $cfg $autocfg CONFIG_BLK_DEV_IDEDISK_WD $CONFIG_BLK_DEV_IDEDISK_WD [list $CONFIG_BLK_DEV_IDEDISK_VENDOR] 1 }
	global CONFIG_BLK_DEV_COMMERIAL
	if {($CONFIG_IDE != 0) && ($CONFIG_BLK_DEV_IDE != 0)} then {write_tristate $cfg $autocfg CONFIG_BLK_DEV_COMMERIAL $CONSTANT_N [list $notmod] 2 }
	global CONFIG_BLK_DEV_TIVO
	if {($CONFIG_IDE != 0) && ($CONFIG_BLK_DEV_IDE != 0) && ($CONFIG_BLK_DEV_COMMERIAL == 1 || $CONFIG_BLK_DEV_COMMERIAL == 2 || $CONFIG_BLK_DEV_COMMERIAL == 4)} then {write_tristate $cfg $autocfg CONFIG_BLK_DEV_TIVO $CONFIG_BLK_DEV_TIVO [list $CONFIG_BLK_DEV_COMMERIAL] 1 }
	global CONFIG_BLK_DEV_IDECS
	if {($CONFIG_IDE != 0) && ($CONFIG_BLK_DEV_IDE != 0) && ($CONFIG_BLK_DEV_IDE == 1 || $CONFIG_BLK_DEV_IDE == 2 || $CONFIG_BLK_DEV_IDE == 4) && ($CONFIG_PCMCIA == 1 || $CONFIG_PCMCIA == 2 || $CONFIG_PCMCIA == 4)} then {write_tristate $cfg $autocfg CONFIG_BLK_DEV_IDECS $CONFIG_BLK_DEV_IDECS [list $CONFIG_BLK_DEV_IDE $CONFIG_PCMCIA] 2 }
	global CONFIG_BLK_DEV_IDECD
	if {($CONFIG_IDE != 0) && ($CONFIG_BLK_DEV_IDE != 0) && ($CONFIG_BLK_DEV_IDE == 1 || $CONFIG_BLK_DEV_IDE == 2 || $CONFIG_BLK_DEV_IDE == 4)} then {write_tristate $cfg $autocfg CONFIG_BLK_DEV_IDECD $CONFIG_BLK_DEV_IDECD [list $CONFIG_BLK_DEV_IDE] 2 }
	global CONFIG_BLK_DEV_IDETAPE
	if {($CONFIG_IDE != 0) && ($CONFIG_BLK_DEV_IDE != 0) && ($CONFIG_BLK_DEV_IDE == 1 || $CONFIG_BLK_DEV_IDE == 2 || $CONFIG_BLK_DEV_IDE == 4)} then {write_tristate $cfg $autocfg CONFIG_BLK_DEV_IDETAPE $CONFIG_BLK_DEV_IDETAPE [list $CONFIG_BLK_DEV_IDE] 2 }
	global CONFIG_BLK_DEV_IDEFLOPPY
	if {($CONFIG_IDE != 0) && ($CONFIG_BLK_DEV_IDE != 0) && ($CONFIG_BLK_DEV_IDE == 1 || $CONFIG_BLK_DEV_IDE == 2 || $CONFIG_BLK_DEV_IDE == 4)} then {write_tristate $cfg $autocfg CONFIG_BLK_DEV_IDEFLOPPY $CONFIG_BLK_DEV_IDEFLOPPY [list $CONFIG_BLK_DEV_IDE] 2 }
	global CONFIG_BLK_DEV_IDESCSI
	if {($CONFIG_IDE != 0) && ($CONFIG_BLK_DEV_IDE != 0) && ($CONFIG_BLK_DEV_IDE == 1 || $CONFIG_BLK_DEV_IDE == 2 || $CONFIG_BLK_DEV_IDE == 4) && ($CONFIG_SCSI == 1 || $CONFIG_SCSI == 2 || $CONFIG_SCSI == 4)} then {write_tristate $cfg $autocfg CONFIG_BLK_DEV_IDESCSI $CONFIG_BLK_DEV_IDESCSI [list $CONFIG_BLK_DEV_IDE $CONFIG_SCSI] 2 }
	global CONFIG_IDE_TASK_IOCTL
	if {($CONFIG_IDE != 0) && ($CONFIG_BLK_DEV_IDE != 0)} then {write_tristate $cfg $autocfg CONFIG_IDE_TASK_IOCTL $CONFIG_IDE_TASK_IOCTL [list $notmod] 2 }
	global CONFIG_IDE_TASKFILE_IO
	if {($CONFIG_IDE != 0) && ($CONFIG_BLK_DEV_IDE != 0)} then {write_tristate $cfg $autocfg CONFIG_IDE_TASKFILE_IO $CONFIG_IDE_TASKFILE_IO [list $notmod] 2 }
	if {($CONFIG_IDE != 0) && ($CONFIG_BLK_DEV_IDE != 0)} then {write_comment $cfg $autocfg "IDE chipset support/bugfixes"}
	global CONFIG_BLK_DEV_CMD640
	if {($CONFIG_IDE != 0) && ($CONFIG_BLK_DEV_IDE != 0) && ($CONFIG_X86 == 1 || $CONFIG_X86 == 4)} then {write_tristate $cfg $autocfg CONFIG_BLK_DEV_CMD640 $CONFIG_BLK_DEV_CMD640 [list $CONFIG_X86] 2 }
	global CONFIG_BLK_DEV_CMD640_ENHANCED
	if {($CONFIG_IDE != 0) && ($CONFIG_BLK_DEV_IDE != 0) && ($CONFIG_BLK_DEV_CMD640 == 1 || $CONFIG_BLK_DEV_CMD640 == 4)} then {write_tristate $cfg $autocfg CONFIG_BLK_DEV_CMD640_ENHANCED $CONFIG_BLK_DEV_CMD640_ENHANCED [list $CONFIG_BLK_DEV_CMD640] 2 }
	global CONFIG_BLK_DEV_ISAPNP
	if {($CONFIG_IDE != 0) && ($CONFIG_BLK_DEV_IDE != 0) && ($CONFIG_ISAPNP == 1 || $CONFIG_ISAPNP == 4)} then {write_tristate $cfg $autocfg CONFIG_BLK_DEV_ISAPNP $CONFIG_BLK_DEV_ISAPNP [list $CONFIG_ISAPNP] 2 }
	global CONFIG_BLK_DEV_RZ1000
	if {($CONFIG_IDE != 0) && ($CONFIG_BLK_DEV_IDE != 0) && ($CONFIG_PCI == 1) && ($CONFIG_X86 == 1 || $CONFIG_X86 == 4)} then {write_tristate $cfg $autocfg CONFIG_BLK_DEV_RZ1000 $CONFIG_BLK_DEV_RZ1000 [list $CONFIG_X86] 2 }
	global CONFIG_BLK_DEV_IDEPCI
	if {($CONFIG_IDE != 0) && ($CONFIG_BLK_DEV_IDE != 0) && ($CONFIG_PCI == 1)} then {write_tristate $cfg $autocfg CONFIG_BLK_DEV_IDEPCI $CONFIG_BLK_DEV_IDEPCI [list $notmod] 2 }
	global CONFIG_IDEPCI_SHARE_IRQ
	if {($CONFIG_IDE != 0) && ($CONFIG_BLK_DEV_IDE != 0) && ($CONFIG_PCI == 1) && ($CONFIG_BLK_DEV_IDEPCI == 1)} then {write_tristate $cfg $autocfg CONFIG_IDEPCI_SHARE_IRQ $CONFIG_IDEPCI_SHARE_IRQ [list $notmod] 2 }
	global CONFIG_BLK_DEV_IDEDMA_PCI
	if {($CONFIG_IDE != 0) && ($CONFIG_BLK_DEV_IDE != 0) && ($CONFIG_PCI == 1) && ($CONFIG_BLK_DEV_IDEPCI == 1)} then {write_tristate $cfg $autocfg CONFIG_BLK_DEV_IDEDMA_PCI $CONFIG_BLK_DEV_IDEDMA_PCI [list $notmod] 2 }
	global CONFIG_BLK_DEV_OFFBOARD
	if {($CONFIG_IDE != 0) && ($CONFIG_BLK_DEV_IDE != 0) && ($CONFIG_PCI == 1) && ($CONFIG_BLK_DEV_IDEPCI == 1)} then {write_tristate $cfg $autocfg CONFIG_BLK_DEV_OFFBOARD $CONFIG_BLK_DEV_OFFBOARD [list $notmod] 2 }
	global CONFIG_BLK_DEV_IDEDMA_FORCED
	if {($CONFIG_IDE != 0) && ($CONFIG_BLK_DEV_IDE != 0) && ($CONFIG_PCI == 1) && ($CONFIG_BLK_DEV_IDEPCI == 1) && ($CONFIG_BLK_DEV_IDEDMA_PCI == 1 || $CONFIG_BLK_DEV_IDEDMA_PCI == 4)} then {write_tristate $cfg $autocfg CONFIG_BLK_DEV_IDEDMA_FORCED $CONFIG_BLK_DEV_IDEDMA_FORCED [list $CONFIG_BLK_DEV_IDEDMA_PCI] 2 }
	global CONFIG_IDEDMA_PCI_AUTO
	if {($CONFIG_IDE != 0) && ($CONFIG_BLK_DEV_IDE != 0) && ($CONFIG_PCI == 1) && ($CONFIG_BLK_DEV_IDEPCI == 1) && ($CONFIG_BLK_DEV_IDEDMA_PCI == 1 || $CONFIG_BLK_DEV_IDEDMA_PCI == 4)} then {write_tristate $cfg $autocfg CONFIG_IDEDMA_PCI_AUTO $CONFIG_IDEDMA_PCI_AUTO [list $CONFIG_BLK_DEV_IDEDMA_PCI] 2 }
	global CONFIG_IDEDMA_ONLYDISK
	if {($CONFIG_IDE != 0) && ($CONFIG_BLK_DEV_IDE != 0) && ($CONFIG_PCI == 1) && ($CONFIG_BLK_DEV_IDEPCI == 1) && ($CONFIG_IDEDMA_PCI_AUTO == 1 || $CONFIG_IDEDMA_PCI_AUTO == 4)} then {write_tristate $cfg $autocfg CONFIG_IDEDMA_ONLYDISK $CONFIG_IDEDMA_ONLYDISK [list $CONFIG_IDEDMA_PCI_AUTO] 2 }
	global CONFIG_BLK_DEV_IDEDMA
	if {($CONFIG_IDE != 0) && ($CONFIG_BLK_DEV_IDE != 0) && ($CONFIG_PCI == 1) && ($CONFIG_BLK_DEV_IDEPCI == 1)} then {write_tristate $cfg $autocfg CONFIG_BLK_DEV_IDEDMA $CONFIG_BLK_DEV_IDEDMA_PCI [list $notmod] 2 }
	global CONFIG_IDEDMA_PCI_WIP
	if {($CONFIG_IDE != 0) && ($CONFIG_BLK_DEV_IDE != 0) && ($CONFIG_PCI == 1) && ($CONFIG_BLK_DEV_IDEPCI == 1) && ($CONFIG_BLK_DEV_IDEDMA_PCI == 1 || $CONFIG_BLK_DEV_IDEDMA_PCI == 4) && ($CONFIG_EXPERIMENTAL == 1 || $CONFIG_EXPERIMENTAL == 4)} then {write_tristate $cfg $autocfg CONFIG_IDEDMA_PCI_WIP $CONFIG_IDEDMA_PCI_WIP [list $CONFIG_BLK_DEV_IDEDMA_PCI $CONFIG_EXPERIMENTAL] 2 }
	global CONFIG_BLK_DEV_IDEDMA_TIMEOUT
	if {($CONFIG_IDE != 0) && ($CONFIG_BLK_DEV_IDE != 0) && ($CONFIG_PCI == 1) && ($CONFIG_BLK_DEV_IDEPCI == 1) && ($CONFIG_IDEDMA_PCI_WIP == 1 || $CONFIG_IDEDMA_PCI_WIP == 4)} then {write_tristate $cfg $autocfg CONFIG_BLK_DEV_IDEDMA_TIMEOUT $CONFIG_BLK_DEV_IDEDMA_TIMEOUT [list $CONFIG_IDEDMA_PCI_WIP] 2 }
	global CONFIG_IDEDMA_NEW_DRIVE_LISTINGS
	if {($CONFIG_IDE != 0) && ($CONFIG_BLK_DEV_IDE != 0) && ($CONFIG_PCI == 1) && ($CONFIG_BLK_DEV_IDEPCI == 1) && ($CONFIG_IDEDMA_PCI_WIP == 1 || $CONFIG_IDEDMA_PCI_WIP == 4)} then {write_tristate $cfg $autocfg CONFIG_IDEDMA_NEW_DRIVE_LISTINGS $CONFIG_IDEDMA_NEW_DRIVE_LISTINGS [list $CONFIG_IDEDMA_PCI_WIP] 2 }
	global CONFIG_BLK_DEV_ADMA
	if {($CONFIG_IDE != 0) && ($CONFIG_BLK_DEV_IDE != 0) && ($CONFIG_PCI == 1) && ($CONFIG_BLK_DEV_IDEPCI == 1)} then {write_tristate $cfg $autocfg CONFIG_BLK_DEV_ADMA $CONFIG_BLK_DEV_IDEDMA_PCI [list $notmod] 2 }
	global CONFIG_BLK_DEV_AEC62XX
	if {($CONFIG_IDE != 0) && ($CONFIG_BLK_DEV_IDE != 0) && ($CONFIG_PCI == 1) && ($CONFIG_BLK_DEV_IDEPCI == 1) && ($CONFIG_BLK_DEV_IDEDMA_PCI == 1 || $CONFIG_BLK_DEV_IDEDMA_PCI == 4)} then {write_tristate $cfg $autocfg CONFIG_BLK_DEV_AEC62XX $CONFIG_BLK_DEV_AEC62XX [list $CONFIG_BLK_DEV_IDEDMA_PCI] 2 }
	global CONFIG_AEC62XX_TUNING
	if {($CONFIG_IDE != 0) && ($CONFIG_BLK_DEV_IDE != 0) && ($CONFIG_PCI == 1) && ($CONFIG_BLK_DEV_IDEPCI == 1) && ($CONFIG_BLK_DEV_AEC62XX == 1 || $CONFIG_BLK_DEV_AEC62XX == 2 || $CONFIG_BLK_DEV_AEC62XX == 4)} then {write_tristate $cfg $autocfg CONFIG_AEC62XX_TUNING $CONFIG_AEC62XX_TUNING [list $CONFIG_BLK_DEV_AEC62XX] 1 }
	global CONFIG_BLK_DEV_ALI15X3
	if {($CONFIG_IDE != 0) && ($CONFIG_BLK_DEV_IDE != 0) && ($CONFIG_PCI == 1) && ($CONFIG_BLK_DEV_IDEPCI == 1) && ($CONFIG_BLK_DEV_IDEDMA_PCI == 1 || $CONFIG_BLK_DEV_IDEDMA_PCI == 4)} then {write_tristate $cfg $autocfg CONFIG_BLK_DEV_ALI15X3 $CONFIG_BLK_DEV_ALI15X3 [list $CONFIG_BLK_DEV_IDEDMA_PCI] 2 }
	global CONFIG_WDC_ALI15X3
	if {($CONFIG_IDE != 0) && ($CONFIG_BLK_DEV_IDE != 0) && ($CONFIG_PCI == 1) && ($CONFIG_BLK_DEV_IDEPCI == 1) && ($CONFIG_BLK_DEV_ALI15X3 == 1 || $CONFIG_BLK_DEV_ALI15X3 == 2 || $CONFIG_BLK_DEV_ALI15X3 == 4)} then {write_tristate $cfg $autocfg CONFIG_WDC_ALI15X3 $CONFIG_WDC_ALI15X3 [list $CONFIG_BLK_DEV_ALI15X3] 1 }
	global CONFIG_BLK_DEV_AMD74XX
	if {($CONFIG_IDE != 0) && ($CONFIG_BLK_DEV_IDE != 0) && ($CONFIG_PCI == 1) && ($CONFIG_BLK_DEV_IDEPCI == 1) && ($CONFIG_BLK_DEV_IDEDMA_PCI == 1 || $CONFIG_BLK_DEV_IDEDMA_PCI == 4)} then {write_tristate $cfg $autocfg CONFIG_BLK_DEV_AMD74XX $CONFIG_BLK_DEV_AMD74XX [list $CONFIG_BLK_DEV_IDEDMA_PCI] 2 }
	global CONFIG_AMD74XX_OVERRIDE
	if {($CONFIG_IDE != 0) && ($CONFIG_BLK_DEV_IDE != 0) && ($CONFIG_PCI == 1) && ($CONFIG_BLK_DEV_IDEPCI == 1) && ($CONFIG_BLK_DEV_AMD74XX == 1 || $CONFIG_BLK_DEV_AMD74XX == 2 || $CONFIG_BLK_DEV_AMD74XX == 4) && ($CONFIG_IDEDMA_PCI_WIP == 1 || $CONFIG_IDEDMA_PCI_WIP == 2 || $CONFIG_IDEDMA_PCI_WIP == 4)} then {write_tristate $cfg $autocfg CONFIG_AMD74XX_OVERRIDE $CONFIG_AMD74XX_OVERRIDE [list $CONFIG_BLK_DEV_AMD74XX $CONFIG_IDEDMA_PCI_WIP] 1 }
	global CONFIG_BLK_DEV_CMD64X
	if {($CONFIG_IDE != 0) && ($CONFIG_BLK_DEV_IDE != 0) && ($CONFIG_PCI == 1) && ($CONFIG_BLK_DEV_IDEPCI == 1) && ($CONFIG_BLK_DEV_IDEDMA_PCI == 1 || $CONFIG_BLK_DEV_IDEDMA_PCI == 4)} then {write_tristate $cfg $autocfg CONFIG_BLK_DEV_CMD64X $CONFIG_BLK_DEV_CMD64X [list $CONFIG_BLK_DEV_IDEDMA_PCI] 2 }
	global CONFIG_BLK_DEV_CMD680
	if {($CONFIG_IDE != 0) && ($CONFIG_BLK_DEV_IDE != 0) && ($CONFIG_PCI == 1) && ($CONFIG_BLK_DEV_IDEPCI == 1) && ($CONFIG_BLK_DEV_CMD64X == 1 || $CONFIG_BLK_DEV_CMD64X == 4)} then {write_tristate $cfg $autocfg CONFIG_BLK_DEV_CMD680 $CONFIG_BLK_DEV_CMD680 [list $CONFIG_BLK_DEV_CMD64X] 2 }
	global CONFIG_BLK_DEV_CY82C693
	if {($CONFIG_IDE != 0) && ($CONFIG_BLK_DEV_IDE != 0) && ($CONFIG_PCI == 1) && ($CONFIG_BLK_DEV_IDEPCI == 1) && ($CONFIG_BLK_DEV_IDEDMA_PCI == 1 || $CONFIG_BLK_DEV_IDEDMA_PCI == 4)} then {write_tristate $cfg $autocfg CONFIG_BLK_DEV_CY82C693 $CONFIG_BLK_DEV_CY82C693 [list $CONFIG_BLK_DEV_IDEDMA_PCI] 2 }
	global CONFIG_BLK_DEV_CS5530
	if {($CONFIG_IDE != 0) && ($CONFIG_BLK_DEV_IDE != 0) && ($CONFIG_PCI == 1) && ($CONFIG_BLK_DEV_IDEPCI == 1) && ($CONFIG_BLK_DEV_IDEDMA_PCI == 1 || $CONFIG_BLK_DEV_IDEDMA_PCI == 4)} then {write_tristate $cfg $autocfg CONFIG_BLK_DEV_CS5530 $CONFIG_BLK_DEV_CS5530 [list $CONFIG_BLK_DEV_IDEDMA_PCI] 2 }
	global CONFIG_BLK_DEV_HPT34X
	if {($CONFIG_IDE != 0) && ($CONFIG_BLK_DEV_IDE != 0) && ($CONFIG_PCI == 1) && ($CONFIG_BLK_DEV_IDEPCI == 1) && ($CONFIG_BLK_DEV_IDEDMA_PCI == 1 || $CONFIG_BLK_DEV_IDEDMA_PCI == 4)} then {write_tristate $cfg $autocfg CONFIG_BLK_DEV_HPT34X $CONFIG_BLK_DEV_HPT34X [list $CONFIG_BLK_DEV_IDEDMA_PCI] 2 }
	global CONFIG_HPT34X_AUTODMA
	if {($CONFIG_IDE != 0) && ($CONFIG_BLK_DEV_IDE != 0) && ($CONFIG_PCI == 1) && ($CONFIG_BLK_DEV_IDEPCI == 1) && ($CONFIG_BLK_DEV_HPT34X == 1 || $CONFIG_BLK_DEV_HPT34X == 2 || $CONFIG_BLK_DEV_HPT34X == 4) && ($CONFIG_IDEDMA_PCI_WIP == 1 || $CONFIG_IDEDMA_PCI_WIP == 2 || $CONFIG_IDEDMA_PCI_WIP == 4)} then {write_tristate $cfg $autocfg CONFIG_HPT34X_AUTODMA $CONFIG_HPT34X_AUTODMA [list $CONFIG_BLK_DEV_HPT34X $CONFIG_IDEDMA_PCI_WIP] 1 }
	global CONFIG_BLK_DEV_HPT366
	if {($CONFIG_IDE != 0) && ($CONFIG_BLK_DEV_IDE != 0) && ($CONFIG_PCI == 1) && ($CONFIG_BLK_DEV_IDEPCI == 1) && ($CONFIG_BLK_DEV_IDEDMA_PCI == 1 || $CONFIG_BLK_DEV_IDEDMA_PCI == 4)} then {write_tristate $cfg $autocfg CONFIG_BLK_DEV_HPT366 $CONFIG_BLK_DEV_HPT366 [list $CONFIG_BLK_DEV_IDEDMA_PCI] 2 }
	global CONFIG_BLK_DEV_PIIX
	global CONFIG_IA64
	if {($CONFIG_IDE != 0) && ($CONFIG_BLK_DEV_IDE != 0) && ($CONFIG_PCI == 1) && ($CONFIG_BLK_DEV_IDEPCI == 1) && ($CONFIG_X86 == 1 || $CONFIG_IA64 == 1) && ($CONFIG_BLK_DEV_IDEDMA_PCI == 1 || $CONFIG_BLK_DEV_IDEDMA_PCI == 2 || $CONFIG_BLK_DEV_IDEDMA_PCI == 4)} then {write_tristate $cfg $autocfg CONFIG_BLK_DEV_PIIX $CONFIG_BLK_DEV_PIIX [list $CONFIG_BLK_DEV_IDEDMA_PCI] 1 }
	global CONFIG_PIIX_TUNING
	if {($CONFIG_IDE != 0) && ($CONFIG_BLK_DEV_IDE != 0) && ($CONFIG_PCI == 1) && ($CONFIG_BLK_DEV_IDEPCI == 1) && ($CONFIG_X86 == 1 || $CONFIG_IA64 == 1) && ($CONFIG_BLK_DEV_PIIX == 1 || $CONFIG_BLK_DEV_PIIX == 2 || $CONFIG_BLK_DEV_PIIX == 4) && ($CONFIG_IDEDMA_PCI_AUTO == 1 || $CONFIG_IDEDMA_PCI_AUTO == 2 || $CONFIG_IDEDMA_PCI_AUTO == 4)} then {write_tristate $cfg $autocfg CONFIG_PIIX_TUNING $CONFIG_PIIX_TUNING [list $CONFIG_BLK_DEV_PIIX $CONFIG_IDEDMA_PCI_AUTO] 1 }
	global CONFIG_BLK_DEV_NS87415
	if {($CONFIG_IDE != 0) && ($CONFIG_BLK_DEV_IDE != 0) && ($CONFIG_PCI == 1) && ($CONFIG_BLK_DEV_IDEPCI == 1) && ($CONFIG_BLK_DEV_IDEDMA_PCI == 1 || $CONFIG_BLK_DEV_IDEDMA_PCI == 4) && ($CONFIG_EXPERIMENTAL == 1 || $CONFIG_EXPERIMENTAL == 4)} then {write_tristate $cfg $autocfg CONFIG_BLK_DEV_NS87415 $CONFIG_BLK_DEV_NS87415 [list $CONFIG_BLK_DEV_IDEDMA_PCI $CONFIG_EXPERIMENTAL] 2 }
	global CONFIG_BLK_DEV_OPTI621
	if {($CONFIG_IDE != 0) && ($CONFIG_BLK_DEV_IDE != 0) && ($CONFIG_PCI == 1) && ($CONFIG_BLK_DEV_IDEPCI == 1) && ($CONFIG_EXPERIMENTAL == 1 || $CONFIG_EXPERIMENTAL == 4)} then {write_tristate $cfg $autocfg CONFIG_BLK_DEV_OPTI621 $CONFIG_BLK_DEV_OPTI621 [list $CONFIG_EXPERIMENTAL] 2 }
	global CONFIG_BLK_DEV_PDC202XX
	if {($CONFIG_IDE != 0) && ($CONFIG_BLK_DEV_IDE != 0) && ($CONFIG_PCI == 1) && ($CONFIG_BLK_DEV_IDEPCI == 1) && ($CONFIG_BLK_DEV_IDEDMA_PCI == 1 || $CONFIG_BLK_DEV_IDEDMA_PCI == 4)} then {write_tristate $cfg $autocfg CONFIG_BLK_DEV_PDC202XX $CONFIG_BLK_DEV_PDC202XX [list $CONFIG_BLK_DEV_IDEDMA_PCI] 2 }
	global CONFIG_PDC202XX_BURST
	if {($CONFIG_IDE != 0) && ($CONFIG_BLK_DEV_IDE != 0) && ($CONFIG_PCI == 1) && ($CONFIG_BLK_DEV_IDEPCI == 1) && ($CONFIG_BLK_DEV_PDC202XX == 1 || $CONFIG_BLK_DEV_PDC202XX == 4)} then {write_tristate $cfg $autocfg CONFIG_PDC202XX_BURST $CONFIG_PDC202XX_BURST [list $CONFIG_BLK_DEV_PDC202XX] 2 }
	global CONFIG_PDC202XX_FORCE
	if {($CONFIG_IDE != 0) && ($CONFIG_BLK_DEV_IDE != 0) && ($CONFIG_PCI == 1) && ($CONFIG_BLK_DEV_IDEPCI == 1) && ($CONFIG_BLK_DEV_PDC202XX == 1 || $CONFIG_BLK_DEV_PDC202XX == 4)} then {write_tristate $cfg $autocfg CONFIG_PDC202XX_FORCE $CONFIG_PDC202XX_FORCE [list $CONFIG_BLK_DEV_PDC202XX] 2 }
	global CONFIG_BLK_DEV_SVWKS
	if {($CONFIG_IDE != 0) && ($CONFIG_BLK_DEV_IDE != 0) && ($CONFIG_PCI == 1) && ($CONFIG_BLK_DEV_IDEPCI == 1) && ($CONFIG_BLK_DEV_IDEDMA_PCI == 1 || $CONFIG_BLK_DEV_IDEDMA_PCI == 4) && ($CONFIG_X86 == 1 || $CONFIG_X86 == 4)} then {write_tristate $cfg $autocfg CONFIG_BLK_DEV_SVWKS $CONFIG_BLK_DEV_SVWKS [list $CONFIG_BLK_DEV_IDEDMA_PCI $CONFIG_X86] 2 }
	global CONFIG_BLK_DEV_SIS5513
	if {($CONFIG_IDE != 0) && ($CONFIG_BLK_DEV_IDE != 0) && ($CONFIG_PCI == 1) && ($CONFIG_BLK_DEV_IDEPCI == 1) && ($CONFIG_BLK_DEV_IDEDMA_PCI == 1 || $CONFIG_BLK_DEV_IDEDMA_PCI == 4) && ($CONFIG_X86 == 1 || $CONFIG_X86 == 4)} then {write_tristate $cfg $autocfg CONFIG_BLK_DEV_SIS5513 $CONFIG_BLK_DEV_SIS5513 [list $CONFIG_BLK_DEV_IDEDMA_PCI $CONFIG_X86] 2 }
	global CONFIG_BLK_DEV_SLC90E66
	if {($CONFIG_IDE != 0) && ($CONFIG_BLK_DEV_IDE != 0) && ($CONFIG_PCI == 1) && ($CONFIG_BLK_DEV_IDEPCI == 1) && ($CONFIG_BLK_DEV_IDEDMA_PCI == 1 || $CONFIG_BLK_DEV_IDEDMA_PCI == 4) && ($CONFIG_X86 == 1 || $CONFIG_X86 == 4)} then {write_tristate $cfg $autocfg CONFIG_BLK_DEV_SLC90E66 $CONFIG_BLK_DEV_SLC90E66 [list $CONFIG_BLK_DEV_IDEDMA_PCI $CONFIG_X86] 2 }
	global CONFIG_BLK_DEV_TRM290
	if {($CONFIG_IDE != 0) && ($CONFIG_BLK_DEV_IDE != 0) && ($CONFIG_PCI == 1) && ($CONFIG_BLK_DEV_IDEPCI == 1) && ($CONFIG_BLK_DEV_IDEDMA_PCI == 1 || $CONFIG_BLK_DEV_IDEDMA_PCI == 4) && ($CONFIG_EXPERIMENTAL == 1 || $CONFIG_EXPERIMENTAL == 4)} then {write_tristate $cfg $autocfg CONFIG_BLK_DEV_TRM290 $CONFIG_BLK_DEV_TRM290 [list $CONFIG_BLK_DEV_IDEDMA_PCI $CONFIG_EXPERIMENTAL] 2 }
	global CONFIG_BLK_DEV_VIA82CXXX
	if {($CONFIG_IDE != 0) && ($CONFIG_BLK_DEV_IDE != 0) && ($CONFIG_PCI == 1) && ($CONFIG_BLK_DEV_IDEPCI == 1) && ($CONFIG_BLK_DEV_IDEDMA_PCI == 1 || $CONFIG_BLK_DEV_IDEDMA_PCI == 4)} then {write_tristate $cfg $autocfg CONFIG_BLK_DEV_VIA82CXXX $CONFIG_BLK_DEV_VIA82CXXX [list $CONFIG_BLK_DEV_IDEDMA_PCI] 2 }
	global tmpvar_7
	global CONFIG_BLK_DEV_MPC8xx_IDE
	if {($CONFIG_IDE != 0) && ($CONFIG_BLK_DEV_IDE != 0) && ($CONFIG_BLK_DEV_MPC8xx_IDE == 1)} then {
	if { $tmpvar_7 == "8xx_PCCARD" } then { write_tristate $cfg $autocfg CONFIG_IDE_8xx_PCCARD 1 [list $notmod] 2 } else { write_tristate $cfg $autocfg CONFIG_IDE_8xx_PCCARD 0 [list $notmod] 2 }
	if { $tmpvar_7 == "8xx_DIRECT" } then { write_tristate $cfg $autocfg CONFIG_IDE_8xx_DIRECT 1 [list $notmod] 2 } else { write_tristate $cfg $autocfg CONFIG_IDE_8xx_DIRECT 0 [list $notmod] 2 }
	if { $tmpvar_7 == "EXT_DIRECT" } then { write_tristate $cfg $autocfg CONFIG_IDE_EXT_DIRECT 1 [list $notmod] 2 } else { write_tristate $cfg $autocfg CONFIG_IDE_EXT_DIRECT 0 [list $notmod] 2 }}
	global CONFIG_IDE_CHIPSETS
	if {($CONFIG_IDE != 0) && ($CONFIG_BLK_DEV_IDE != 0)} then {write_tristate $cfg $autocfg CONFIG_IDE_CHIPSETS $CONFIG_IDE_CHIPSETS [list $notmod] 2 }
	if {($CONFIG_IDE != 0) && ($CONFIG_BLK_DEV_IDE != 0) && ($CONFIG_IDE_CHIPSETS == 1)} then {write_comment $cfg $autocfg "Note: most of these also require special kernel boot parameters"}
	global CONFIG_BLK_DEV_4DRIVES
	if {($CONFIG_IDE != 0) && ($CONFIG_BLK_DEV_IDE != 0) && ($CONFIG_IDE_CHIPSETS == 1)} then {write_tristate $cfg $autocfg CONFIG_BLK_DEV_4DRIVES $CONFIG_BLK_DEV_4DRIVES [list $notmod] 2 }
	global CONFIG_BLK_DEV_ALI14XX
	if {($CONFIG_IDE != 0) && ($CONFIG_BLK_DEV_IDE != 0) && ($CONFIG_IDE_CHIPSETS == 1)} then {write_tristate $cfg $autocfg CONFIG_BLK_DEV_ALI14XX $CONFIG_BLK_DEV_ALI14XX [list $notmod] 2 }
	global CONFIG_BLK_DEV_DTC2278
	if {($CONFIG_IDE != 0) && ($CONFIG_BLK_DEV_IDE != 0) && ($CONFIG_IDE_CHIPSETS == 1)} then {write_tristate $cfg $autocfg CONFIG_BLK_DEV_DTC2278 $CONFIG_BLK_DEV_DTC2278 [list $notmod] 2 }
	global CONFIG_BLK_DEV_HT6560B
	if {($CONFIG_IDE != 0) && ($CONFIG_BLK_DEV_IDE != 0) && ($CONFIG_IDE_CHIPSETS == 1)} then {write_tristate $cfg $autocfg CONFIG_BLK_DEV_HT6560B $CONFIG_BLK_DEV_HT6560B [list $notmod] 2 }
	global CONFIG_BLK_DEV_PDC4030
	if {($CONFIG_IDE != 0) && ($CONFIG_BLK_DEV_IDE != 0) && ($CONFIG_IDE_CHIPSETS == 1) && ($CONFIG_BLK_DEV_IDEDISK == 1 && $CONFIG_EXPERIMENTAL == 1)} then {write_tristate $cfg $autocfg CONFIG_BLK_DEV_PDC4030 $CONFIG_BLK_DEV_PDC4030 [list $notmod] 2 }
	global CONFIG_BLK_DEV_QD65XX
	if {($CONFIG_IDE != 0) && ($CONFIG_BLK_DEV_IDE != 0) && ($CONFIG_IDE_CHIPSETS == 1)} then {write_tristate $cfg $autocfg CONFIG_BLK_DEV_QD65XX $CONFIG_BLK_DEV_QD65XX [list $notmod] 2 }
	global CONFIG_BLK_DEV_UMC8672
	if {($CONFIG_IDE != 0) && ($CONFIG_BLK_DEV_IDE != 0) && ($CONFIG_IDE_CHIPSETS == 1)} then {write_tristate $cfg $autocfg CONFIG_BLK_DEV_UMC8672 $CONFIG_BLK_DEV_UMC8672 [list $notmod] 2 }
	global CONFIG_BLK_DEV_HD_ONLY
	if {($CONFIG_IDE != 0) && ($CONFIG_BLK_DEV_IDE == 0)} then {write_tristate $cfg $autocfg CONFIG_BLK_DEV_HD_ONLY $CONFIG_BLK_DEV_HD_ONLY [list $notmod] 2 }
	if {($CONFIG_IDE != 0) && ($CONFIG_BLK_DEV_IDE == 0)} then {write_tristate $cfg $autocfg CONFIG_BLK_DEV_HD $CONFIG_BLK_DEV_HD_ONLY [list $notmod] 2 }
	global CONFIG_IDEDMA_AUTO
	global CONFIG_BLK_DEV_IDEDMA_PMAC_AUTO
	global CONFIG_IDEDMA_ICS_AUTO
	if {($CONFIG_IDE != 0) && ($CONFIG_IDEDMA_PCI_AUTO == 1 || $CONFIG_BLK_DEV_IDEDMA_PMAC_AUTO == 1 || $CONFIG_IDEDMA_ICS_AUTO == 1)} then {write_tristate $cfg $autocfg CONFIG_IDEDMA_AUTO $CONSTANT_Y [list $notmod] 2 }
	if {($CONFIG_IDE != 0) && ($CONFIG_IDEDMA_PCI_AUTO != 1 && $CONFIG_BLK_DEV_IDEDMA_PMAC_AUTO != 1 && $CONFIG_IDEDMA_ICS_AUTO != 1)} then {write_tristate $cfg $autocfg CONFIG_IDEDMA_AUTO $CONSTANT_N [list $notmod] 2 }
	global CONFIG_IDEDMA_IVB
	global CONFIG_BLK_DEV_IDEDMA_PMAC
	global CONFIG_BLK_DEV_IDEDMA_ICS
	if {($CONFIG_IDE != 0) && ($CONFIG_BLK_DEV_IDEDMA_PCI == 1 || $CONFIG_BLK_DEV_IDEDMA_PMAC == 1 || $CONFIG_BLK_DEV_IDEDMA_ICS == 1)} then {write_tristate $cfg $autocfg CONFIG_IDEDMA_IVB $CONFIG_IDEDMA_IVB [list $notmod] 2 }
	global CONFIG_DMA_NONPCI
	if {($CONFIG_IDE != 0) && ($CONFIG_BLK_DEV_TIVO == 1)} then {write_tristate $cfg $autocfg CONFIG_DMA_NONPCI $CONSTANT_Y [list $notmod] 2 }
	if {($CONFIG_IDE != 0) && ($CONFIG_BLK_DEV_TIVO != 1)} then {write_tristate $cfg $autocfg CONFIG_DMA_NONPCI $CONSTANT_N [list $notmod] 2 }
	global CONFIG_BLK_DEV_IDE_MODES
	global CONFIG_BLK_DEV_IDE_PMAC
	global CONFIG_BLK_DEV_IT8172
	global CONFIG_BLK_DEV_SL82C105
	if {($CONFIG_IDE != 0) && ($CONFIG_IDE_CHIPSETS == 1 || $CONFIG_BLK_DEV_AEC62XX == 1 || $CONFIG_BLK_DEV_ALI15X3 == 1 || $CONFIG_BLK_DEV_AMD74XX == 1 || $CONFIG_BLK_DEV_CMD640 == 1 || $CONFIG_BLK_DEV_CMD64X == 1 || $CONFIG_BLK_DEV_CS5530 == 1 || $CONFIG_BLK_DEV_CY82C693 == 1 || $CONFIG_BLK_DEV_HPT34X == 1 || $CONFIG_BLK_DEV_HPT366 == 1 || $CONFIG_BLK_DEV_IDE_PMAC == 1 || $CONFIG_BLK_DEV_OPTI621 == 1 || $CONFIG_BLK_DEV_SVWKS == 1 || $CONFIG_BLK_DEV_PDC202XX == 1 || $CONFIG_BLK_DEV_PIIX == 1 || $CONFIG_BLK_DEV_IT8172 == 1 || $CONFIG_BLK_DEV_SIS5513 == 1 || $CONFIG_BLK_DEV_SLC90E66 == 1 || $CONFIG_BLK_DEV_SL82C105 == 1 || $CONFIG_BLK_DEV_VIA82CXXX == 1 || $CONFIG_BLK_DEV_MPC8xx_IDE == 1)} then {write_tristate $cfg $autocfg CONFIG_BLK_DEV_IDE_MODES $CONSTANT_Y [list $notmod] 2 }
	if {($CONFIG_IDE != 0) && ($CONFIG_IDE_CHIPSETS != 1 && $CONFIG_BLK_DEV_AEC62XX != 1 && $CONFIG_BLK_DEV_ALI15X3 != 1 && $CONFIG_BLK_DEV_AMD74XX != 1 && $CONFIG_BLK_DEV_CMD640 != 1 && $CONFIG_BLK_DEV_CMD64X != 1 && $CONFIG_BLK_DEV_CS5530 != 1 && $CONFIG_BLK_DEV_CY82C693 != 1 && $CONFIG_BLK_DEV_HPT34X != 1 && $CONFIG_BLK_DEV_HPT366 != 1 && $CONFIG_BLK_DEV_IDE_PMAC != 1 && $CONFIG_BLK_DEV_OPTI621 != 1 && $CONFIG_BLK_DEV_SVWKS != 1 && $CONFIG_BLK_DEV_PDC202XX != 1 && $CONFIG_BLK_DEV_PIIX != 1 && $CONFIG_BLK_DEV_IT8172 != 1 && $CONFIG_BLK_DEV_SIS5513 != 1 && $CONFIG_BLK_DEV_SLC90E66 != 1 && $CONFIG_BLK_DEV_SL82C105 != 1 && $CONFIG_BLK_DEV_VIA82CXXX != 1 && $CONFIG_BLK_DEV_MPC8xx_IDE != 1)} then {write_tristate $cfg $autocfg CONFIG_BLK_DEV_IDE_MODES $CONSTANT_N [list $notmod] 2 }
	global CONFIG_BLK_DEV_ATARAI#define __ver_scsi_register_module	smp_fa20b7b0
#define scsi_register_module	_set_ver(scsi_register_module)
#define __ver_scsi_unregister_module	smp_81d85a75
#define scsi_unregister_module	_set_ver(scsi_unregister_module)
#define __ver_scsi_free	smp_475dddfa
#define scsi_free	_set_ver(scsi_free)
#define __ver_scsi_malloc	smp_1cce3f92
#define scsi_malloc	_set_ver(scsi_malloc)
#define __ver_scsi_register	smp_dc286115
#define scsi_register	_set_ver(scsi_register)
#define __ver_scsi_unregister	smp_d7ba1517
#define scsi_unregister	_set_ver(scsi_unregister)
#define __ver_scsicam_bios_param	smp_f4feb0ad
#define scsicam_bios_param	_set_ver(scsicam_bios_param)
#define __ver_scsi_partsize	smp_22615a6e
#define scsi_partsize	_set_ver(scsi_partsize)
#define __ver_scsi_allocate_device	smp_770eabaf
#define scsi_allocate_device	_set_ver(scsi_allocate_device)
#define __ver_scsi_do_cmd	smp_2b69c91d
#define scsi_do_cmd	_set_ver(scsi_do_cmd)
#define __ver_scsi_command_size	smp_9b05ea5c
#define scsi_command_size	_set_ver(scsi_command_size)
#define __ver_scsi_ioctl	smp_7f375f05
#define scsi_ioctl	_set_ver(scsi_ioctl)
#define __ver_print_command	smp_528232e7
#define print_command	_set_ver(print_command)
#define __ver_print_sense	smp_4ddc8500
#define print_sense	_set_ver(print_sense)
#define __ver_print_req_sense	smp_a7ba4907
#define print_req_sense	_set_ver(print_req_sense)
#define __ver_print_msg	smp_8cc5ae07
#define print_msg	_set_ver(print_msg)
#define __ver_print_status	smp_e4c08ccd
#define print_status	_set_ver(print_status)
#define __ver_scsi_dma_free_sectors	smp_e930b3cb
#define scsi_dma_free_sectors	_set_ver(scsi_dma_free_sectors)
#define __ver_kernel_scsi_ioctl	smp_59c9e638
#define kernel_scsi_ioctl	_set_ver(kernel_scsi_ioctl)
#define __ver_scsi_need_isa_buffer	smp_e22bca98
#define scsi_need_isa_buffer	_set_ver(scsi_need_isa_buffer)
#define __ver_scsi_release_command	smp_b9b6bc57
#define scsi_release_command	_set_ver(scsi_release_command)
#define __ver_print_Scsi_Cmnd	smp_7154d603
#define print_Scsi_Cmnd	_set_ver(print_Scsi_Cmnd)
#define __ver_scsi_block_when_processing_errors	smp_97ad10ad
#define scsi_block_when_processing_errors	_set_ver(scsi_block_when_processing_errors)
#define __ver_scsi_mark_host_reset	smp_6d21a878
#define scsi_mark_host_reset	_set_ver(scsi_mark_host_reset)
#define __ver_scsi_ioctl_send_command	smp_0d431b75
#define scsi_ioctl_send_command	_set_ver(scsi_ioctl_send_command)
#define __ver_scsi_allocate_request	smp_6c693c68
#define scsi_allocate_request	_set_ver(scsi_allocate_request)
#define __ver_scsi_release_request	smp_c3080d00
#define scsi_release_request	_set_ver(scsi_release_request)
#define __ver_scsi_wait_req	smp_f2831d31
#define scsi_wait_req	_set_ver(scsi_wait_req)
#define __ver_scsi_do_req	smp_847a6167
#define scsi_do_req	_set_ver(scsi_do_req)
#define __ver_scsi_report_bus_reset	smp_0dbf0a11
#define scsi_report_bus_reset	_set_ver(scsi_report_bus_reset)
#define __ver_scsi_block_requests	smp_f0e36a3c
#define scsi_block_requests	_set_ver(scsi_block_requests)
#define __ver_scsi_unblock_requests	smp_df1e258d
#define scsi_unblock_requests	_set_ver(scsi_unblock_requests)
#define __ver_scsi_get_host_dev	smp_fab797c2
#define scsi_get_host_dev	_set_ver(scsi_get_host_dev)
#define __ver_scsi_free_host_dev	smp_e80b47f7
#define scsi_free_host_dev	_set_ver(scsi_free_host_dev)
#define __ver_scsi_sleep	smp_35962bf8
#define scsi_sleep	_set_ver(scsi_sleep)
#define __ver_proc_print_scsidevice	smp_0ad1c726
#define proc_print_scsidevice	_set_ver(proc_print_scsidevice)
#define __ver_proc_scsi	smp_b170b32c
#define proc_scsi	_set_ver(proc_scsi)
#define __ver_scsi_io_completion	smp_8c5ea865
#define scsi_io_completion	_set_ver(scsi_io_completion)
#define __ver_scsi_end_request	smp_ad6c8cfe
#define scsi_end_request	_set_ver(scsi_end_request)
#define __ver_scsi_register_blocked_host	smp_da20b663
#define scsi_register_blocked_host	_set_ver(scsi_register_blocked_host)
#define __ver_scsi_deregister_blocked_host	smp_17a6697d
#define scsi_deregister_blocked_host	_set_ver(scsi_deregister_blocked_host)
#define __ver_scsi_reset_provider	smp_27a0793c
#define scsi_reset_provider	_set_ver(scsi_reset_provider)
#define __ver_scsi_hostlist	smp_59f36065
#define scsi_hostlist	_set_ver(scsi_hostlist)
#define __ver_scsi_hosts	smp_bfc9db1d
#define scsi_hosts	_set_ver(scsi_hosts)
#define __ver_scsi_devicelist	smp_021cd645
#define scsi_devicelist	_set_ver(scsi_devicelist)
#define __ver_scsi_device_types	smp_d54b74ac
#define scsi_device_types	_set_ver(scsi_device_types)
#define __ver_scsi_add_timer	smp_c484a6b7
#define scsi_add_timer	_set_ver(scsi_add_timer)
#define __ver_scsi_delete_timer	smp_3b840b51
#define scsi_delete_timer	_set_ver(scsi_delete_timer)
is not set

#
# SCSI support
#
CONFIG_SCSI=y

#
# SCSI support type (disk, tape, CD-ROM)
#
CONFIG_BLK_DEV_SD=y
CONFIG_SD_EXTRA_DEVS=40
CONFIG_CHR_DEV_ST=y
# CONFIG_CHR_DEV_OSST is not set
CONFIG_BLK_DEV_SR=y
CONFIG_BLK_DEV_SR_VENDOR=y
CONFIG_SR_EXTRA_DEVS=2
CONFIG_CHR_DEV_SG=y

#
# Some SCSI devices (e.g. CD jukebox) support multiple LUNs
#
# CONFIG_SCSI_DEBUG_QUEUES is not set
# CONFIG_SCSI_MULTI_LUN is not set
CONFIG_SCSI_CONSTANTS=y
# CONFIG_SCSI_LOGGING is not set

#
# SCSI low-level drivers
#
# CONFIG_BLK_DEV_3W_XXXX_RAID is not set
# CONFIG_SCSI_7000FASST is not set
# CONFIG_SCSI_ACARD is not set
# CONFIG_SCSI_AHA152X is not set
# CONFIG_SCSI_AHA1542 is not set
# CONFIG_SCSI_AHA1740 is not set
# CONFIG_SCSI_AIC7XXX is not set
# CONFIG_SCSI_AIC7XXX_OLD is not set
# CONFIG_SCSI_DPT_I2O is not set
# CONFIG_SCSI_ADVANSYS is not set
# CONFIG_SCSI_IN2000 is not set
# CONFIG_SCSI_AM53C974 is not set
# CONFIG_SCSI_MEGARAID is not set
# CONFIG_SCSI_BUSLOGIC is not set
# CONFIG_SCSI_CPQFCTS is not set
# CONFIG_SCSI_DMX3191D is not set
# CONFIG_SCSI_DTC3280 is not set
# CONFIG_SCSI_EATA is not set
# CONFIG_SCSI_EATA_DMA is not set
# CONFIG_SCSI_EATA_PIO is not set
# CONFIG_SCSI_FUTURE_DOMAIN is not set
# CONFIG_SCSI_GDTH is not set
# CONFIG_SCSI_GENERIC_NCR5380 is not set
# CONFIG_SCSI_INITIO is not set
# CONFIG_SCSI_INIA100 is not set
# CONFIG_SCSI_NCR53C406A is not set
# CONFIG_SCSI_NCR53C7xx is not set
CONFIG_SCSI_SYM53C8XX_2=y
CONFIG_SCSI_SYM53C8XX_DMA_ADDRESSING_MODE=0
CONFIG_SCSI_SYM53C8XX_DEFAULT_TAGS=16
CONFIG_SCSI_SYM53C8XX_MAX_TAGS=64
# CONFIG_SCSI_SYM53C8XX_IOMAPPED is not set
# CONFIG_SCSI_PAS16 is not set
# CONFIG_SCSI_PCI2000 is not set
# CONFIG_SCSI_PCI2220I is not set
# CONFIG_SCSI_PSI240I is not set
# CONFIG_SCSI_QLOGIC_FAS is not set
# CONFIG_SCSI_QLOGIC_ISP is not set
# CONFIG_SCSI_QLOGIC_FC is not set
# CONFIG_SCSI_QLOGIC_1280 is not set
# CONFIG_SCSI_SIM710 is not set
# CONFIG_SCSI_SYM53C416 is not set
# CONFIG_SCSI_DC390T is not set
# CONFIG_SCSI_T128 is not set
# CONFIG_SCSI_U14_34F is not set
# CONFIG_SCSI_DEBUG is not set
# CONFIG_SCSI_MESH is not set
# CONFIG_SCSI_MAC53C94 is not set

#
# IEEE 1394 (FireWire) support (EXPERIMENTAL)
#
# CONFIG_IEEE1394 is not set

#
# Network device support
#
CONFIG_NETDEVICES=y

#
# ARCnet devices
#
# CONFIG_ARCNET is not set
# CONFIG_DUMMY is not set
# CONFIG_BONDING is not set
# CONFIG_EQUALIZER is not set
# CONFIG_TUN is not set
# CONFIG_ETHERTAP is not set

#
# Ethernet (10 or 100Mbit)
#
CONFIG_NET_ETHERNET=y
# CONFIG_MACE is not set
# CONFIG_BMAC is not set
# CONFIG_GMAC is not set
# CONFIG_SUNLANCE is not set
# CONFIG_HAPPYMEAL is not set
# CONFIG_SUNBMAC is not set
# CONFIG_SUNQE is not set
# CONFIG_SUNLANCE is not set
# CONFIG_SUNGEM is not set
# CONFIG_NET_VENDOR_3COM is not set
# CONFIG_LANCE is not set
# CONFIG_NET_VENDOR_SMC is not set
# CONFIG_NET_VENDOR_RACAL is not set
# CONFIG_HP100 is not set
# CONFIG_NET_ISA is not set
CONFIG_NET_PCI=y
CONFIG_PCNET32=y
# CONFIG_ADAPTEC_STARFIRE is not set
# CONFIG_APRICOT is not set
# CONFIG_CS89x0 is not set
# CONFIG_TULIP is not set
CONFIG_DE4X5=y
# CONFIG_DGRS is not set
# CONFIG_DM9102 is not set
# CONFIG_EEPRO100 is not set
# CONFIG_LNE390 is not set
# CONFIG_FEALNX is not set
# CONFIG_NATSEMI is not set
# CONFIG_NE2K_PCI is not set
# CONFIG_NE3210 is not set
# CONFIG_ES3210 is not set
# CONFIG_8139CP is not set
# CONFIG_8139TOO is not set
# CONFIG_8139TOO_PIO is not set
# CONFIG_8139TOO_TUNE_TWISTER is not set
# CONFIG_8139TOO_8129 is not set
# CONFIG_SIS900 is not set
# CONFIG_EPIC100 is not set
# CONFIG_SUNDANCE is not set
# CONFIG_TLAN is not set
# CONFIG_VIA_RHINE is not set
# CONFIG_VIA_RHINE_MMIO is not set
# CONFIG_WINBOND_840 is not set
# CONFIG_NET_POCKET is not set

#
# Ethernet (1000 Mbit)
#
# CONFIG_ACENIC is not set
# CONFIG_DL2K is not set
# CONFIG_MYRI_SBUS is not set
# CONFIG_NS83820 is not set
# CONFIG_HAMACHI is not set
# CONFIG_YELLOWFIN is not set
# CONFIG_SK98LIN is not set
# CONFIG_FDDI is not set
# CONFIG_HIPPI is not set
# CONFIG_PLIP is not set
# CONFIG_PPP is not set
# CONFIG_SLIP is not set

#
# Wireless LAN (non-hamradio)
#
# CONFIG_NET_RADIO is not set

#
# Token Ring devices
#
CONFIG_TR=y
CONFIG_IBMOL=y
# CONFIG_IBMLS is not set
# CONFIG_TMS380TR is not set
# CONFIG_NET_FC is not set
# CONFIG_RCPCI is not set
# CONFIG_SHAPER is not set

#
# Wan interfaces
#
# CONFIG_WAN is not set

#
# Amateur Radio support
#
# CONFIG_HAMRADIO is not set

#
# IrDA (infrared) support
#
# CONFIG_IRDA is not set

#
# ISDN subsystem
#
# CONFIG_ISDN is not set

#
# Old CD-ROM drivers (not SCSI, not IDE)
#
# CONFIG_CD_NO_IDESCSI is not set

#
# Console drivers
#
CONFIG_VGA_CONSOLE=y

#
# Frame-buffer support
#
CONFIG_FB=y
CONFIG_DUMMY_CONSOLE=y
# CONFIG_FB_RIVA is not set
# CONFIG_FB_CLGEN is not set
# CONFIG_FB_PM2 is not set
# CONFIG_FB_CYBER2000 is not set
CONFIG_FB_OF=y
# CONFIG_FB_CONTROL is not set
# CONFIG_FB_PLATINUM is not set
# CONFIG_FB_VALKYRIE is not set
# CONFIG_FB_CT65550 is not set
# CONFIG_FB_IMSTT is not set
# CONFIG_FB_S3TRIO is not set
# CONFIG_FB_VGA16 is not set
CONFIG_FB_MATROX=y
CONFIG_FB_MATROX_MILLENIUM=y
CONFIG_FB_MATROX_MYSTIQUE=y
CONFIG_FB_MATROX_G100=y
# CONFIG_FB_MATROX_G450 is not set
# CONFIG_FB_MATROX_MULTIHEAD is not set
# CONFIG_FB_ATY is not set
# CONFIG_FB_RADEON is not set
# CONFIG_FB_ATY128 is not set
# CONFIG_FB_SIS is not set
CONFIG_FB_3DFX=y
# CONFIG_FB_VOODOO1 is not set
# CONFIG_FB_VIRTUAL is not set
# CONFIG_FBCON_ADVANCED is not set
CONFIG_FBCON_CFB8=y
CONFIG_FBCON_CFB16=y
CONFIG_FBCON_CFB24=y
CONFIG_FBCON_CFB32=y
# CONFIG_FBCON_FONTWIDTH8_ONLY is not set
CONFIG_FBCON_FONTS=y
# CONFIG_FONT_8x8 is not set
CONFIG_FONT_8x16=y
CONFIG_FONT_SUN8x16=y
CONFIG_FONT_SUN12x22=y
# CONFIG_FONT_6x11 is not set
# CONFIG_FONT_PEARL_8x8 is not set
# CONFIG_FONT_ACORN_8x8 is not set
# CONFIG_FB_COMPAT_XPMAC is not set

#
# Input core support
#
CONFIG_INPUT=y
CONFIG_INPUT_KEYBDEV=y
CONFIG_INPUT_MOUSEDEV=y
CONFIG_INPUT_MOUSEDEV_SCREEN_X=1024
CONFIG_INPUT_MOUSEDEV_SCREEN_Y=768
# CONFIG_INPUT_JOYDEV is not set
CONFIG_INPUT_EVDEV=y

#
# Macintosh device drivers
#
# CONFIG_ADB_CUDA is not set
# CONFIG_ADB_PMU is not set
# CONFIG_MAC_FLOPPY is not set
# CONFIG_MAC_SERIAL is not set
# CONFIG_ADB is not set
CONFIG_MAC_HID=y

#
# Character devices
#
CONFIG_VT=y
CONFIG_VT_CONSOLE=y
CONFIG_SERIAL=y
CONFIG_SERIAL_CONSOLE=y
# CONFIG_SERIAL_EXTENDED is not set
# CONFIG_SERIAL_NONSTANDARD is not set
CONFIG_UNIX98_PTYS=y
CONFIG_UNIX98_PTY_COUNT=256

#
# I2C support
#
# CONFIG_I2C is not set

#
# Mice
#
CONFIG_BUSMOUSE=y
# CONFIG_ATIXL_BUSMOUSE is not set
# CONFIG_LOGIBUSMOUSE is not set
# CONFIG_MS_BUSMOUSE is not set
CONFIG_MOUSE=y
CONFIG_PSMOUSE=y
# CONFIG_82C710_MOUSE is not set
# CONFIG_PC110_PAD is not set

#
# Joysticks
#
# CONFIG_INPUT_GAMEPORT is not set
# CONFIG_INPUT_NS558 is not set
# CONFIG_INPUT_LIGHTNING is not set
# CONFIG_INPUT_PCIGAME is not set
# CONFIG_INPUT_CS461X is not set
# CONFIG_INPUT_EMU10K1 is not set
# CONFIG_INPUT_SERIO is not set
# CONFIG_INPUT_SERPORT is not set

#
# Joysticks
#
# CONFIG_INPUT_ANALOG is not set
# CONFIG_INPUT_A3D is not set
# CONFIG_INPUT_ADI is not set
# CONFIG_INPUT_COBRA is not set
# CONFIG_INPUT_GF2K is not set
# CONFIG_INPUT_GRIP is not set
# CONFIG_INPUT_INTERACT is not set
# CONFIG_INPUT_TMDC is not set
# CONFIG_INPUT_SIDEWINDER is not set
# CONFIG_INPUT_IFORCE_USB is not set
# CONFIG_INPUT_IFORCE_232 is not set
# CONFIG_INPUT_WARRIOR is not set
# CONFIG_INPUT_MAGELLAN is not set
# CONFIG_INPUT_SPACEORB is not set
# CONFIG_INPUT_SPACEBALL is not set
# CONFIG_INPUT_STINGER is not set
# CONFIG_INPUT_DB9 is not set
# CONFIG_INPUT_GAMECON is not set
# CONFIG_INPUT_TURBOGRAFX is not set
# CONFIG_QIC02_TAPE is not set

#
# Watchdog Cards
#
# CONFIG_WATCHDOG is not set
# CONFIG_INTEL_RNG is not set
CONFIG_NVRAM=y
# CONFIG_RTC is not set
# CONFIG_DTLK is not set
# CONFIG_R3964 is not set
# CONFIG_APPLICOM is not set

#
# Ftape, the floppy tape device driver
#
# CONFIG_FTAPE is not set
# CONFIG_AGP is not set
# CONFIG_DRM is not set

#
# Multimedia devices
#
# CONFIG_VIDEO_DEV is not set

#
# File systems
#
# CONFIG_QUOTA is not set
# CONFIG_AUTOFS_FS is not set
# CONFIG_AUTOFS4_FS is not set
# CONFIG_REISERFS_FS is not set
# CONFIG_REISERFS_CHECK is not set
# CONFIG_REISERFS_PROC_INFO is not set
# CONFIG_ADFS_FS is not set
# CONFIG_ADFS_FS_RW is not set
# CONFIG_AFFS_FS is not set
# CONFIG_HFS_FS is not set
# CONFIG_BFS_FS is not set
# CONFIG_EXT3_FS is not set
# CONFIG_JBD is not set
# CONFIG_JBD_DEBUG is not set
CONFIG_FAT_FS=m
CONFIG_MSDOS_FS=m
# CONFIG_UMSDOS_FS is not set
CONFIG_VFAT_FS=m
# CONFIG_EFS_FS is not set
# CONFIG_JFFS_FS is not set
# CONFIG_JFFS2_FS is not set
# CONFIG_CRAMFS is not set
CONFIG_TMPFS=y
# CONFIG_RAMFS is not set
CONFIG_ISO9660_FS=y
# CONFIG_JOLIET is not set
# CONFIG_ZISOFS is not set
# CONFIG_MINIX_FS is not set
# CONFIG_VXFS_FS is not set
# CONFIG_NTFS_FS is not set
# CONFIG_NTFS_RW is not set
# CONFIG_HPFS_FS is not set
CONFIG_PROC_FS=y
CONFIG_DEVFS_FS=y
# CONFIG_DEVFS_MOUNT is not set
# CONFIG_DEVFS_DEBUG is not set
CONFIG_DEVPTS_FS=y
# CONFIG_QNX4FS_FS is not set
# CONFIG_QNX4FS_RW is not set
# CONFIG_ROMFS_FS is not set
CONFIG_EXT2_FS=y
# CONFIG_SYSV_FS is not set
# CONFIG_UDF_FS is not set
# CONFIG_UDF_RW is not set
# CONFIG_UFS_FS is not set
# CONFIG_UFS_FS_WRITE is not set

#
# Network File Systems
#
# CONFIG_CODA_FS is not set
# CONFIG_INTERMEZZO_FS is not set
# CONFIG_NFS_FS is not set
# CONFIG_NFS_V3 is not set
# CONFIG_ROOT_NFS is not set
# CONFIG_NFSD is not set
# CONFIG_NFSD_V3 is not set
# CONFIG_SUNRPC is not set
# CONFIG_LOCKD is not set
# CONFIG_SMB_FS is not set
# CONFIG_NCP_FS is not set
# CONFIG_NCPFS_PACKET_SIGNING is not set
# CONFIG_NCPFS_IOCTL_LOCKING is not set
# CONFIG_NCPFS_STRONG is not set
# CONFIG_NCPFS_NFS_NS is not set
# CONFIG_NCPFS_OS2_NS is not set
# CONFIG_NCPFS_SMALLDOS is not set
# CONFIG_NCPFS_NLS is not set
# CONFIG_NCPFS_EXTRAS is not set
# CONFIG_ZISOFS_FS is not set
# CONFIG_ZLIB_FS_INFLATE is not set

#
# Partition Types
#
CONFIG_PARTITION_ADVANCED=y
# CONFIG_ACORN_PARTITION is not set
# CONFIG_OSF_PARTITION is not set
# CONFIG_AMIGA_PARTITION is not set
# CONFIG_ATARI_PARTITION is not set
CONFIG_MAC_PARTITION=y
CONFIG_MSDOS_PARTITION=y
# CONFIG_BSD_DISKLABEL is not set
# CONFIG_MINIX_SUBPARTITION is not set
# CONFIG_SOLARIS_X86_PARTITION is not set
# CONFIG_UNIXWARE_DISKLABEL is not set
# CONFIG_LDM_PARTITION is not set
# CONFIG_SGI_PARTITION is not set
# CONFIG_ULTRIX_PARTITION is not set
# CONFIG_SUN_PARTITION is not set
# CONFIG_SMB_NLS is not set
CONFIG_NLS=y

#
# Native Language Support
#
CONFIG_NLS_DEFAULT="iso8859-1"
# CONFIG_NLS_CODEPAGE_437 is not set
# CONFIG_NLS_CODEPAGE_737 is not set
# CONFIG_NLS_CODEPAGE_775 is not set
# CONFIG_NLS_CODEPAGE_850 is not set
# CONFIG_NLS_CODEPAGE_852 is not set
# CONFIG_NLS_CODEPAGE_855 is not set
# CONFIG_NLS_CODEPAGE_857 is not set
# CONFIG_NLS_CODEPAGE_860 is not set
# CONFIG_NLS_CODEPAGE_861 is not set
# CONFIG_NLS_CODEPAGE_862 is not set
# CONFIG_NLS_CODEPAGE_863 is not set
# CONFIG_NLS_CODEPAGE_864 is not set
# CONFIG_NLS_CODEPAGE_865 is not set
# CONFIG_NLS_CODEPAGE_866 is not set
# CONFIG_NLS_CODEPAGE_869 is not set
# CONFIG_NLS_CODEPAGE_936 is not set
# CONFIG_NLS_CODEPAGE_950 is not set
# CONFIG_NLS_CODEPAGE_932 is not set
# CONFIG_NLS_CODEPAGE_949 is not set
# CONFIG_NLS_CODEPAGE_874 is not set
# CONFIG_NLS_ISO8859_8 is not set
# CONFIG_NLS_CODEPAGE_1251 is not set
CONFIG_NLS_ISO8859_1=m
# CONFIG_NLS_ISO8859_2 is not set
# CONFIG_NLS_ISO8859_3 is not set
# CONFIG_NLS_ISO8859_4 is not set
# CONFIG_NLS_ISO8859_5 is not set
# CONFIG_NLS_ISO8859_6 is not set
# CONFIG_NLS_ISO8859_7 is not set
# CONFIG_NLS_ISO8859_9 is not set
# CONFIG_NLS_ISO8859_13 is not set
# CONFIG_NLS_ISO8859_14 is not set
# CONFIG_NLS_ISO8859_15 is not set
# CONFIG_NLS_KOI8_R is not set
# CONFIG_NLS_KOI8_U is not set
# CONFIG_NLS_UTF8 is not set

#
# Sound
#
# CONFIG_SOUND is not set

#
# USB support
#
# CONFIG_USB is not set

#
# USB Controllers
#
# CONFIG_USB_UHCI is not set
# CONFIG_USB_UHCI_ALT is not set
# CONFIG_USB_OHCI is not set

#
# USB Device Class drivers
#
# CONFIG_USB_AUDIO is not set
# CONFIG_USB_BLUETOOTH is not set
# CONFIG_USB_STORAGE is not set
# CONFIG_USB_STORAGE_DEBUG is not set
# CONFIG_USB_STORAGE_DATAFAB is not set
# CONFIG_USB_STORAGE_FREECOM is not set
# CONFIG_USB_STORAGE_ISD200 is not set
# CONFIG_USB_STORAGE_DPCM is not set
# CONFIG_USB_STORAGE_HP8200e is not set
# CONFIG_USB_STORAGE_SDDR09 is not set
# CONFIG_USB_STORAGE_JUMPSHOT is not set
# CONFIG_USB_ACM is not set
# CONFIG_USB_PRINTER is not set

#
# USB Human Interface Devices (HID)
#
# CONFIG_USB_HID is not set
# CONFIG_USB_HIDDEV is not set
# CONFIG_USB_KBD is not set
# CONFIG_USB_MOUSE is not set
# CONFIG_USB_WACOM is not set

#
# USB Imaging devices
#
# CONFIG_USB_DC2XX is not set
# CONFIG_USB_MDC800 is not set
# CONFIG_USB_SCANNER is not set
# CONFIG_USB_MICROTEK is not set
# CONFIG_USB_HPUSBSCSI is not set

#
# USB Multimedia devices
#

#
#   Video4Linux support is needed for USB Multimedia device support
#

#
# USB Network adaptors
#
# CONFIG_USB_PEGASUS is not set
# CONFIG_USB_KAWETH is not set
# CONFIG_USB_CATC is not set
# CONFIG_USB_CDCETHER is not set
# CONFIG_USB_USBNET is not set

#
# USB port drivers
#
# CONFIG_USB_USS720 is not set

#
# USB Serial Converter support
#
# CONFIG_USB_SERIAL is not set
# CONFIG_USB_SERIAL_GENERIC is not set
# CONFIG_USB_SERIAL_BELKIN is not set
# CONFIG_USB_SERIAL_WHITEHEAT is not set
# CONFIG_USB_SERIAL_DIGI_ACCELEPORT is not set
# CONFIG_USB_SERIAL_EMPEG is not set
# CONFIG_USB_SERIAL_FTDI_SIO is not set
# CONFIG_USB_SERIAL_VISOR is not set
# CONFIG_USB_SERIAL_IR is not set
# CONFIG_USB_SERIAL_EDGEPORT is not set
# CONFIG_USB_SERIAL_KEYSPAN_PDA is not set
# CONFIG_USB_SERIAL_KEYSPAN is not set
# CONFIG_USB_SERIAL_KEYSPAN_USA28 is not set
# CONFIG_USB_SERIAL_KEYSPAN_USA28X is not set
# CONFIG_USB_SERIAL_KEYSPAN_USA28XA is not set
# CONFIG_USB_SERIAL_KEYSPAN_USA28XB is not set
# CONFIG_USB_SERIAL_KEYSPAN_USA19 is not set
# CONFIG_USB_SERIAL_KEYSPAN_USA18X is not set
# CONFIG_USB_SERIAL_KEYSPAN_USA19W is not set
# CONFIG_USB_SERIAL_KEYSPAN_USA49W is not set
# CONFIG_USB_SERIAL_MCT_U232 is not set
# CONFIG_USB_SERIAL_PL2303 is not set
# CONFIG_USB_SERIAL_CYBERJACK is not set
# CONFIG_USB_SERIAL_XIRCOM is not set
# CONFIG_USB_SERIAL_OMNINET is not set

#
# USB Miscellaneous drivers
#
# CONFIG_USB_RIO500 is not set

#
# Bluetooth support
#
# CONFIG_BLUEZ is not set

#
# Kernel hacking
#
CONFIG_MAGIC_SYSRQ=y
# CONFIG_KGDB is not set
CONFIG_XMON=y
#
# Automatically generated make config: don't edit
#
# CONFIG_UID16 is not set
# CONFIG_RWSEM_GENERIC_SPINLOCK is not set
CONFIG_RWSEM_XCHGADD_ALGORITHM=y

#
# Code maturity level options
#
CONFIG_EXPERIMENTAL=y

#
# Loadable module support
#
CONFIG_MODULES=y
# CONFIG_MODVERSIONS is not set
CONFIG_KMOD=y

#
# Platform support
#
CONFIG_PPC=y
CONFIG_PPC32=y
# CONFIG_6xx is not set
# CONFIG_4xx is not set
# CONFIG_POWER3 is not set
# CONFIG_POWER4 is not set
CONFIG_8xx=y
# CONFIG_PPC_STD_MMU is not set
CONFIG_SERIAL_CONSOLE=y
# CONFIG_RPXLITE is not set
# CONFIG_RPXCLASSIC is not set
# CONFIG_BSEIP is not set
# CONFIG_FADS is not set
# CONFIG_TQM823L is not set
# CONFIG_TQM850L is not set
# CONFIG_TQM855L is not set
# CONFIG_TQM860L is not set
# CONFIG_FPS850L is not set
# CONFIG_TQM860 is not set
# CONFIG_SPD823TS is not set
CONFIG_IVMS8=y
# CONFIG_IVML24 is not set
# CONFIG_SM850 is not set
# CONFIG_MBX is not set
# CONFIG_WINCEPT is not set
# CONFIG_ALL_PPC is not set
# CONFIG_SMP is not set
CONFIG_MATH_EMULATION=y

#
# General setup
#
# CONFIG_HIGHMEM is not set
# CONFIG_ISA is not set
# CONFIG_EISA is not set
# CONFIG_SBUS is not set
# CONFIG_MCA is not set
# CONFIG_PCI_QSPAN is not set
# CONFIG_PCI is not set
CONFIG_NET=y
CONFIG_SYSCTL=y
CONFIG_SYSVIPC=y
# CONFIG_BSD_PROCESS_ACCT is not set
CONFIG_KCORE_ELF=y
CONFIG_BINFMT_ELF=y
CONFIG_KERNEL_ELF=y
# CONFIG_BINFMT_MISC is not set
# CONFIG_HOTPLUG is not set
# CONFIG_PCMCIA is not set

#
# Parallel port support
#
# CONFIG_PARPORT is not set
CONFIG_PPC_RTC=y
# CONFIG_CMDLINE_BOOL is not set

#
# Memory Technology Devices (MTD)
#
# CONFIG_MTD is not set

#
# Plug and Play configuration
#
# CONFIG_PNP is not set
# CONFIG_ISAPNP is not set

#
# Block devices
#
# CONFIG_BLK_DEV_FD is not set
# CONFIG_BLK_DEV_XD is not set
# CONFIG_PARIDE is not set
# CONFIG_BLK_CPQ_DA is not set
# CONFIG_BLK_CPQ_CISS_DA is not set
# CONFIG_BLK_DEV_DAC960 is not set
# CONFIG_BLK_DEV_LOOP is not set
# CONFIG_BLK_DEV_NBD is not set
# CONFIG_BLK_DEV_RAM is not set
# CONFIG_BLK_DEV_INITRD is not set

#
# Multi-device support (RAID and LVM)
#
# CONFIG_MD is not set
# CONFIG_BLK_DEV_MD is not set
# CONFIG_MD_LINEAR is not set
# CONFIG_MD_RAID0 is not set
# CONFIG_MD_RAID1 is not set
# CONFIG_MD_RAID5 is not set
# CONFIG_MD_MULTIPATH is not set
# CONFIG_BLK_DEV_LVM is not set

#
# Networking options
#
CONFIG_PACKET=y
# CONFIG_PACKET_MMAP is not set
CONFIG_NETLINK=y
# CONFIG_RTNETLINK is not set
# CONFIG_NETLINK_DEV is not set
# CONFIG_NETFILTER is not set
# CONFIG_FILTER is not set
CONFIG_UNIX=y
CONFIG_INET=y
# CONFIG_IP_MULTICAST is not set
# CONFIG_IP_ADVANCED_ROUTER is not set
CONFIG_IP_PNP=y
# CONFIG_IP_PNP_DHCP is not set
# CONFIG_IP_PNP_BOOTP is not set
# CONFIG_IP_PNP_RARP is not set
# CONFIG_NET_IPIP is not set
# CONFIG_NET_IPGRE is not set
# CONFIG_INET_ECN is not set
# CONFIG_SYN_COOKIES is not set
# CONFIG_IPV6 is not set
# CONFIG_KHTTPD is not set
# CONFIG_ATM is not set
# CONFIG_VLAN_8021Q is not set

#
#  
#
# CONFIG_IPX is not set
# CONFIG_ATALK is not set
# CONFIG_DECNET is not set
# CONFIG_BRIDGE is not set
# CONFIG_X25 is not set
# CONFIG_LAPB is not set
# CONFIG_LLC is not set
# CONFIG_NET_DIVERT is not set
# CONFIG_ECONET is not set
# CONFIG_WAN_ROUTER is not set
# CONFIG_NET_FASTROUTE is not set
# CONFIG_NET_HW_FLOWCONTROL is not set

#
# QoS and/or fair queueing
#
# CONFIG_NET_SCHED is not set

#
# ATA/IDE/MFM/RLL support
#
CONFIG_IDE=y

#
# IDE, ATA and ATAPI Block devices
#
CONFIG_BLK_DEV_IDE=y

#
# Please see Documentation/ide.txt for help/info on IDE drives
#
# CONFIG_BLK_DEV_HD_IDE is not set
# CONFIG_BLK_DEV_HD is not set
CONFIG_BLK_DEV_IDEDISK=y
CONFIG_IDEDISK_MULTI_MODE=y
# CONFIG_BLK_DEV_IDEDISK_VENDOR is not set
# CONFIG_BLK_DEV_IDEDISK_FUJITSU is not set
# CONFIG_BLK_DEV_IDEDISK_IBM is not set
# CONFIG_BLK_DEV_IDEDISK_MAXTOR is not set
# CONFIG_BLK_DEV_IDEDISK_QUANTUM is not set
# CONFIG_BLK_DEV_IDEDISK_SEAGATE is not set
# CONFIG_BLK_DEV_IDEDISK_WD is not set
# CONFIG_BLK_DEV_COMMERIAL is not set
# CONFIG_BLK_DEV_TIVO is not set
# CONFIG_BLK_DEV_IDECS is not set
CONFIG_BLK_DEV_IDECD=y
# CONFIG_BLK_DEV_IDETAPE is not set
# CONFIG_BLK_DEV_IDEFLOPPY is not set
# CONFIG_BLK_DEV_IDESCSI is not set

#
# IDE chipset support/bugfixes
#
# CONFIG_BLK_DEV_CMD640 is not set
# CONFIG_BLK_DEV_CMD640_ENHANCED is not set
# CONFIG_BLK_DEV_ISAPNP is not set
CONFIG_BLK_DEV_MPC8xx_IDE=y
CONFIG_IDE_8xx_PCCARD=y
# CONFIG_IDE_8xx_DIRECT is not set
# CONFIG_IDE_EXT_DIRECT is not set
# CONFIG_IDE_CHIPSETS is not set
# CONFIG_IDEDMA_AUTO is not set
# CONFIG_DMA_NONPCI is not set
CONFIG_BLK_DEV_IDE_MODES=y
# CONFIG_BLK_DEV_ATARAID is not set
# CONFIG_BLK_DEV_ATARAID_PDC is not set
# CONFIG_BLK_DEV_ATARAID_HPT is not set

#
# SCSI support
#
# CONFIG_SCSI is not set

#
# Network device support
#
CONFIG_NETDEVICES=y

#
# ARCnet devices
#
# CONFIG_ARCNET is not set
# CONFIG_DUMMY is not set
# CONFIG_BONDING is not set
# CONFIG_EQUALIZER is not set
# CONFIG_TUN is not set
# CONFIG_ETHERTAP is not set

#
# Ethernet (10 or 100Mbit)
#
CONFIG_NET_ETHERNET=y
# CONFIG_MACE is not set
# CONFIG_BMAC is not set
# CONFIG_GMAC is not set
# CONFIG_SUNLANCE is not set
# CONFIG_SUNBMAC is not set
# CONFIG_SUNQE is not set
# CONFIG_SUNLANCE is not set
# CONFIG_SUNGEM is not set
# CONFIG_NET_VENDOR_3COM is not set
# CONFIG_LANCE is not set
# CONFIG_NET_VENDOR_SMC is not set
# CONFIG_NET_VENDOR_RACAL is not set
# CONFIG_NET_ISA is not set
# CONFIG_NET_PCI is not set
# CONFIG_NET_POCKET is not set

#
# Ethernet (1000 Mbit)
#
# CONFIG_ACENIC is not set
# CONFIG_DL2K is not set
# CONFIG_MYRI_SBUS is not set
# CONFIG_NS83820 is not set
# CONFIG_HAMACHI is not set
# CONFIG_YELLOWFIN is not set
# CONFIG_SK98LIN is not set
# CONFIG_FDDI is not set
# CONFIG_HIPPI is not set
# CONFIG_PLIP is not set
# CONFIG_PPP is not set
# CONFIG_SLIP is not set

#
# Wireless LAN (non-hamradio)
#
# CONFIG_NET_RADIO is not set

#
# Token Ring devices
#
# CONFIG_TR is not set
# CONFIG_NET_FC is not set
# CONFIG_RCPCI is not set
# CONFIG_SHAPER is not set

#
# Wan interfaces
#
# CONFIG_WAN is not set

#
# Amateur Radio support
#
# CONFIG_HAMRADIO is not set

#
# IrDA (infrared) support
#
# CONFIG_IRDA is not set

#
# ISDN subsystem
#
# CONFIG_ISDN is not set

#
# Old CD-ROM drivers (not SCSI, not IDE)
#
# CONFIG_CD_NO_IDESCSI is not set

#
# Console drivers
#

#
# Frame-buffer support
#
# CONFIG_FB is not set

#
# Input core support
#
# CONFIG_INPUT is not set
# CONFIG_INPUT_KEYBDEV is not set
# CONFIG_INPUT_MOUSEDEV is not set
# CONFIG_INPUT_JOYDEV is not set
# CONFIG_INPUT_EVDEV is not set

#
# Macintosh device drivers
#

#
# Character devices
#
# CONFIG_VT is not set
# CONFIG_SERIAL is not set
# CONFIG_SERIAL_EXTENDED is not set
# CONFIG_SERIAL_NONSTANDARD is not set
CONFIG_UNIX98_PTYS=y
CONFIG_UNIX98_PTY_COUNT=32

#
# I2C support
#
# CONFIG_I2C is not set

#
# Mice
#
# CONFIG_BUSMOUSE is not set
# CONFIG_MOUSE is not set

#
# Joysticks
#
# CONFIG_INPUT_GAMEPORT is not set

#
# Input core support is needed for gameports
#

#
# Input core support is needed for joysticks
#
# CONFIG_QIC02_TAPE is not set

#
# Watchdog Cards
#
# CONFIG_WATCHDOG is not set
# CONFIG_INTEL_RNG is not set
# CONFIG_NVRAM is not set
# CONFIG_RTC is not set
# CONFIG_DTLK is not set
# CONFIG_R3964 is not set
# CONFIG_APPLICOM is not set

#
# Ftape, the floppy tape device driver
#
# CONFIG_FTAPE is not set
# CONFIG_AGP is not set
# CONFIG_DRM is not set

#
# Multimedia devices
#
# CONFIG_VIDEO_DEV is not set

#
# File systems
#
# CONFIG_QUOTA is not set
# CONFIG_AUTOFS_FS is not set
# CONFIG_AUTOFS4_FS is not set
# CONFIG_REISERFS_FS is not set
# CONFIG_REISERFS_CHECK is not set
# CONFIG_ADFS_FS is not set
# CONFIG_ADFS_FS_RW is not set
# CONFIG_AFFS_FS is not set
# CONFIG_HFS_FS is not set
# CONFIG_BFS_FS is not set
# CONFIG_FAT_FS is not set
# CONFIG_MSDOS_FS is not set
# CONFIG_UMSDOS_FS is not set
# CONFIG_VFAT_FS is not set
# CONFIG_EFS_FS is not set
# CONFIG_JFFS_FS is not set
# CONFIG_JFFS2_FS is not set
# CONFIG_CRAMFS is not set
CONFIG_TMPFS=y
# CONFIG_RAMFS is not set
CONFIG_ISO9660_FS=y
# CONFIG_JOLIET is not set
# CONFIG_MINIX_FS is not set
# CONFIG_VXFS_FS is not set
# CONFIG_NTFS_FS is not set
# CONFIG_NTFS_RW is not set
# CONFIG_HPFS_FS is not set
CONFIG_PROC_FS=y
# CONFIG_DEVFS_FS is not set
# CONFIG_DEVFS_MOUNT is not set
# CONFIG_DEVFS_DEBUG is not set
CONFIG_DEVPTS_FS=y
# CONFIG_QNX4FS_FS is not set
# CONFIG_QNX4FS_RW is not set
# CONFIG_ROMFS_FS is not set
CONFIG_EXT2_FS=y
# CONFIG_SYSV_FS is not set
# CONFIG_UDF_FS is not set
# CONFIG_UDF_RW is not set
# CONFIG_UFS_FS is not set
# CONFIG_UFS_FS_WRITE is not set

#
# Network File Systems
#
# CONFIG_CODA_FS is not set
CONFIG_NFS_FS=y
# CONFIG_NFS_V3 is not set
CONFIG_ROOT_NFS=y
# CONFIG_NFSD is not set
# CONFIG_NFSD_V3 is not set
CONFIG_SUNRPC=y
CONFIG_LOCKD=y
# CONFIG_SMB_FS is not set
# CONFIG_NCP_FS is not set
# CONFIG_NCPFS_PACKET_SIGNING is not set
# CONFIG_NCPFS_IOCTL_LOCKING is not set
# CONFIG_NCPFS_STRONG is not set
# CONFIG_NCPFS_NFS_NS is not set
# CONFIG_NCPFS_OS2_NS is not set
# CONFIG_NCPFS_SMALLDOS is not set
# CONFIG_NCPFS_NLS is not set
# CONFIG_NCPFS_EXTRAS is not set

#
# Partition Types
#
CONFIG_PARTITION_ADVANCED=y
# CONFIG_ACORN_PARTITION is not set
# CONFIG_OSF_PARTITION is not set
# CONFIG_AMIGA_PARTITION is not set
# CONFIG_ATARI_PARTITION is not set
CONFIG_MAC_PARTITION=y
# CONFIG_MSDOS_PARTITION is not set
# CONFIG_LDM_PARTITION is not set
# CONFIG_SGI_PARTITION is not set
# CONFIG_ULTRIX_PARTITION is not set
# CONFIG_SUN_PARTITION is not set
# CONFIG_SMB_NLS is not set
# CONFIG_NLS is not set

#
# Sound
#
# CONFIG_SOUND is not set

#
# MPC8xx CPM Options
#
# CONFIG_SCC_ENET is not set
CONFIG_FEC_ENET=y
CONFIG_USE_MDIO=y
CONFIG_ENET_BIG_BUFFERS=y
# CONFIG_SMC2_UART is not set
# CONFIG_USE_SCC_IO is not set

#
# Generic MPC8xx Options
#
CONFIG_8xx_COPYBACK=y
# CONFIG_8xx_CPU6 is not set
# CONFIG_UCODE_PATCH is not set

#
# USB support
#
# CONFIG_USB is not set

#
# USB Controllers
#
# CONFIG_USB_UHCI is not set
# CONFIG_USB_UHCI_ALT is not set
# CONFIG_USB_OHCI is not set

#
# USB Device Class drivers
#
# CONFIG_USB_AUDIO is not set
# CONFIG_USB_BLUETOOTH is not set
# CONFIG_USB_STORAGE is not set
# CONFIG_USB_STORAGE_DEBUG is not set
# CONFIG_USB_STORAGE_DATAFAB is not set
# CONFIG_USB_STORAGE_FREECOM is not set
# CONFIG_USB_STORAGE_ISD200 is not set
# CONFIG_USB_STORAGE_DPCM is not set
# CONFIG_USB_STORAGE_HP8200e is not set
# CONFIG_USB_STORAGE_SDDR09 is not set
# CONFIG_USB_STORAGE_JUMPSHOT is not set
# CONFIG_USB_ACM is not set
# CONFIG_USB_PRINTER is not set

#
# USB Human Interface Devices (HID)
#

#
#   Input core support is needed for USB HID
#

#
# USB Imaging devices
#
# CONFIG_USB_DC2XX is not set
# CONFIG_USB_MDC800 is not set
# CONFIG_USB_SCANNER is not set
# CONFIG_USB_MICROTEK is not set
# CONFIG_USB_HPUSBSCSI is not set

#
# USB Multimedia devices
#

#
#   Video4Linux support is needed for USB Multimedia device support
#

#
# USB Network adaptors
#
# CONFIG_USB_PEGASUS is not set
# CONFIG_USB_KAWETH is not set
# CONFIG_USB_CATC is not set
# CONFIG_USB_CDCETHER is not set
# CONFIG_USB_USBNET is not set

#
# USB port drivers
#
# CONFIG_USB_USS720 is not set

#
# USB Serial Converter support
#
# CONFIG_USB_SERIAL is not set
# CONFIG_USB_SERIAL_GENERIC is not set
# CONFIG_USB_SERIAL_BELKIN is not set
# CONFIG_USB_SERIAL_WHITEHEAT is not set
# CONFIG_USB_SERIAL_DIGI_ACCELEPORT is not set
# CONFIG_USB_SERIAL_EMPEG is not set
# CONFIG_USB_SERIAL_FTDI_SIO is not set
# CONFIG_USB_SERIAL_VISOR is not set
# CONFIG_USB_SERIAL_IR is not set
# CONFIG_USB_SERIAL_EDGEPORT is not set
# CONFIG_USB_SERIAL_KEYSPAN_PDA is not set
# CONFIG_USB_SERIAL_KEYSPAN is not set
# CONFIG_USB_SERIAL_KEYSPAN_USA28 is not set
# CONFIG_USB_SERIAL_KEYSPAN_USA28X is not set
# CONFIG_USB_SERIAL_KEYSPAN_USA28XA is not set
# CONFIG_USB_SERIAL_KEYSPAN_USA28XB is not set
# CONFIG_USB_SERIAL_KEYSPAN_USA19 is not set
# CONFIG_USB_SERIAL_KEYSPAN_USA18X is not set
# CONFIG_USB_SERIAL_KEYSPAN_USA19W is not set
# CONFIG_USB_SERIAL_KEYSPAN_USA49W is not set
# CONFIG_USB_SERIAL_MCT_U232 is not set
# CONFIG_USB_SERIAL_PL2303 is not set
# CONFIG_USB_SERIAL_CYBERJACK is not set
# CONFIG_USB_SERIAL_XIRCOM is not set
# CONFIG_USB_SERIAL_OMNINET is not set

#
# USB Miscellaneous drivers
#
# CONFIG_USB_RIO500 is not set

#
# Bluetooth support
#
# CONFIG_BLUEZ is not set

#
# Kernel hacking
#
# CONFIG_MAGIC_SYSRQ is not set
# CONFIG_KGDB is not set
# CONFIG_XMON is not set
#
# Automatically generated make config: don't edit
#
# CONFIG_UID16 is not set
# CONFIG_RWSEM_GENERIC_SPINLOCK is not set
CONFIG_RWSEM_XCHGADD_ALGORITHM=y

#
# Code maturity level options
#
CONFIG_EXPERIMENTAL=y

#
# Loadable module support
#
CONFIG_MODULES=y
# CONFIG_MODVERSIONS is not set
CONFIG_KMOD=y

#
# Platform support
#
CONFIG_PPC=y
CONFIG_PPC32=y
# CONFIG_6xx is not set
# CONFIG_4xx is not set
# CONFIG_POWER3 is not set
# CONFIG_POWER4 is not set
CONFIG_8xx=y
# CONFIG_PPC_STD_MMU is not set
CONFIG_SERIAL_CONSOLE=y
# CONFIG_RPXLITE is not set
# CONFIG_RPXCLASSIC is not set
# CONFIG_BSEIP is not set
# CONFIG_FADS is not set
# CONFIG_TQM823L is not set
# CONFIG_TQM850L is not set
# CONFIG_TQM855L is not set
# CONFIG_TQM860L is not set
# CONFIG_FPS850L is not set
# CONFIG_TQM860 is not set
# CONFIG_SPD823TS is not set
# CONFIG_IVMS8 is not set
# CONFIG_IVML24 is not set
CONFIG_SM850=y
# CONFIG_MBX is not set
# CONFIG_WINCEPT is not set
CONFIG_TQM8xxL=y
# CONFIG_ALL_PPC is not set
# CONFIG_SMP is not set
CONFIG_MATH_EMULATION=y

#
# General setup
#
# CONFIG_HIGHMEM is not set
# CONFIG_ISA is not set
# CONFIG_EISA is not set
# CONFIG_SBUS is not set
# CONFIG_MCA is not set
# CONFIG_PCI_QSPAN is not set
# CONFIG_PCI is not set
CONFIG_NET=y
CONFIG_SYSCTL=y
CONFIG_SYSVIPC=y
# CONFIG_BSD_PROCESS_ACCT is not set
CONFIG_KCORE_ELF=y
CONFIG_BINFMT_ELF=y
CONFIG_KERNEL_ELF=y
# CONFIG_BINFMT_MISC is not set
# CONFIG_HOTPLUG is not set
# CONFIG_PCMCIA is not set

#
# Parallel port support
#
# CONFIG_PARPORT is not set
CONFIG_PPC_RTC=y
# CONFIG_CMDLINE_BOOL is not set

#
# Memory Technology Devices (MTD)
#
# CONFIG_MTD is not set

#
# Plug and Play configuration
#
# CONFIG_PNP is not set
# CONFIG_ISAPNP is not set

#
# Block devices
#
# CONFIG_BLK_DEV_FD is not set
# CONFIG_BLK_DEV_XD is not set
# CONFIG_PARIDE is not set
# CONFIG_BLK_CPQ_DA is not set
# CONFIG_BLK_CPQ_CISS_DA is not set
# CONFIG_BLK_DEV_DAC960 is not set
# CONFIG_BLK_DEV_LOOP is not set
# CONFIG_BLK_DEV_NBD is not set
# CONFIG_BLK_DEV_RAM is not set
# CONFIG_BLK_DEV_INITRD is not set

#
# Multi-device support (RAID and LVM)
#
# CONFIG_MD is not set
# CONFIG_BLK_DEV_MD is not set
# CONFIG_MD_LINEAR is not set
# CONFIG_MD_RAID0 is not set
# CONFIG_MD_RAID1 is not set
# CONFIG_MD_RAID5 is not set
# CONFIG_MD_MULTIPATH is not set
# CONFIG_BLK_DEV_LVM is not set

#
# Networking options
#
CONFIG_PACKET=y
# CONFIG_PACKET_MMAP is not set
CONFIG_NETLINK=y
# CONFIG_RTNETLINK is not set
# CONFIG_NETLINK_DEV is not set
# CONFIG_NETFILTER is not set
# CONFIG_FILTER is not set
CONFIG_UNIX=y
CONFIG_INET=y
# CONFIG_IP_MULTICAST is not set
# CONFIG_IP_ADVANCED_ROUTER is not set
CONFIG_IP_PNP=y
# CONFIG_IP_PNP_DHCP is not set
# CONFIG_IP_PNP_BOOTP is not set
# CONFIG_IP_PNP_RARP is not set
# CONFIG_NET_IPIP is not set
# CONFIG_NET_IPGRE is not set
# CONFIG_INET_ECN is not set
# CONFIG_SYN_COOKIES is not set
# CONFIG_IPV6 is not set
# CONFIG_KHTTPD is not set
# CONFIG_ATM is not set
# CONFIG_VLAN_8021Q is not set

#
#  
#
# CONFIG_IPX is not set
# CONFIG_ATALK is not set
# CONFIG_DECNET is not set
# CONFIG_BRIDGE is not set
# CONFIG_X25 is not set
# CONFIG_LAPB is not set
# CONFIG_LLC is not set
# CONFIG_NET_DIVERT is not set
# CONFIG_ECONET is not set
# CONFIG_WAN_ROUTER is not set
# CONFIG_NET_FASTROUTE is not set
# CONFIG_NET_HW_FLOWCONTROL is not set

#
# QoS and/or fair queueing
#
# CONFIG_NET_SCHED is not set

#
# ATA/IDE/MFM/RLL support
#
# CONFIG_IDE is not set
# CONFIG_BLK_DEV_IDE_MODES is not set
# CONFIG_BLK_DEV_HD is not set

#
# SCSI support
#
# CONFIG_SCSI is not set

#
# Network device support
#
CONFIG_NETDEVICES=y

#
# ARCnet devices
#
# CONFIG_ARCNET is not set
# CONFIG_DUMMY is not set
# CONFIG_BONDING is not set
# CONFIG_EQUALIZER is not set
# CONFIG_TUN is not set
# CONFIG_ETHERTAP is not set

#
# Ethernet (10 or 100Mbit)
#
CONFIG_NET_ETHERNET=y
# CONFIG_MACE is not set
# CONFIG_BMAC is not set
# CONFIG_GMAC is not set
# CONFIG_SUNLANCE is not set
# CONFIG_SUNBMAC is not set
# CONFIG_SUNQE is not set
# CONFIG_SUNLANCE is not set
# CONFIG_SUNGEM is not set
# CONFIG_NET_VENDOR_3COM is not set
# CONFIG_LANCE is not set
# CONFIG_NET_VENDOR_SMC is not set
# CONFIG_NET_VENDOR_RACAL is not set
# CONFIG_NET_ISA is not set
# CONFIG_NET_PCI is not set
# CONFIG_NET_POCKET is not set

#
# Ethernet (1000 Mbit)
#
# CONFIG_ACENIC is not set
# CONFIG_DL2K is not set
# CONFIG_MYRI_SBUS is not set
# CONFIG_NS83820 is not set
# CONFIG_HAMACHI is not set
# CONFIG_YELLOWFIN is not set
# CONFIG_SK98LIN is not set
# CONFIG_FDDI is not set
# CONFIG_HIPPI is not set
# CONFIG_PLIP is not set
# CONFIG_PPP is not set
# CONFIG_SLIP is not set

#
# Wireless LAN (non-hamradio)
#
# CONFIG_NET_RADIO is not set

#
# Token Ring devices
#
# CONFIG_TR is not set
# CONFIG_NET_FC is not set
# CONFIG_RCPCI is not set
# CONFIG_SHAPER is not set

#
# Wan interfaces
#
# CONFIG_WAN is not set

#
# Amateur Radio support
#
# CONFIG_HAMRADIO is not set

#
# IrDA (infrared) support
#
# CONFIG_IRDA is not set

#
# ISDN subsystem
#
# CONFIG_ISDN is not set

#
# Old CD-ROM drivers (not SCSI, not IDE)
#
# CONFIG_CD_NO_IDESCSI is not set

#
# Console drivers
#

#
# Frame-buffer support
#
# CONFIG_FB is not set

#
# Input core support
#
# CONFIG_INPUT is not set
# CONFIG_INPUT_KEYBDEV is not set
# CONFIG_INPUT_MOUSEDEV is not set
# CONFIG_INPUT_JOYDEV is not set
# CONFIG_INPUT_EVDEV is not set

#
# Macintosh device drivers
#

#
# Character devices
#
# CONFIG_VT is not set
# CONFIG_SERIAL is not set
# CONFIG_SERIAL_EXTENDED is not set
# CONFIG_SERIAL_NONSTANDARD is not set
CONFIG_UNIX98_PTYS=y
CONFIG_UNIX98_PTY_COUNT=32

#
# I2C support
#
# CONFIG_I2C is not set

#
# Mice
#
# CONFIG_BUSMOUSE is not set
# CONFIG_MOUSE is not set

#
# Joysticks
#
# CONFIG_INPUT_GAMEPORT is not set

#
# Input core support is needed for gameports
#

#
# Input core support is needed for joysticks
#
# CONFIG_QIC02_TAPE is not set

#
# Watchdog Cards
#
# CONFIG_WATCHDOG is not set
# CONFIG_INTEL_RNG is not set
# CONFIG_NVRAM is not set
# CONFIG_RTC is not set
# CONFIG_DTLK is not set
# CONFIG_R3964 is not set
# CONFIG_APPLICOM is not set

#
# Ftape, the floppy tape device driver
#
# CONFIG_FTAPE is not set
# CONFIG_AGP is not set
# CONFIG_DRM is not set

#
# Multimedia devices
#
# CONFIG_VIDEO_DEV is not set

#
# File systems
#
# CONFIG_QUOTA is not set
# CONFIG_AUTOFS_FS is not set
# CONFIG_AUTOFS4_FS is not set
# CONFIG_REISERFS_FS is not set
# CONFIG_REISERFS_CHECK is not set
# CONFIG_ADFS_FS is not set
# CONFIG_ADFS_FS_RW is not set
# CONFIG_AFFS_FS is not set
# CONFIG_HFS_FS is not set
# CONFIG_BFS_FS is not set
# CONFIG_FAT_FS is not set
# CONFIG_MSDOS_FS is not set
# CONFIG_UMSDOS_FS is not set
# CONFIG_VFAT_FS is not set
# CONFIG_EFS_FS is not set
# CONFIG_JFFS_FS is not set
# CONFIG_JFFS2_FS is not set
# CONFIG_CRAMFS is not set
CONFIG_TMPFS=y
# CONFIG_RAMFS is not set
# CONFIG_ISO9660_FS is not set
# CONFIG_JOLIET is not set
# CONFIG_MINIX_FS is not set
# CONFIG_VXFS_FS is not set
# CONFIG_NTFS_FS is not set
# CONFIG_NTFS_RW is not set
# CONFIG_HPFS_FS is not set
CONFIG_PROC_FS=y
# CONFIG_DEVFS_FS is not set
# CONFIG_DEVFS_MOUNT is not set
# CONFIG_DEVFS_DEBUG is not set
CONFIG_DEVPTS_FS=y
# CONFIG_QNX4FS_FS is not set
# CONFIG_QNX4FS_RW is not set
# CONFIG_ROMFS_FS is not set
# CONFIG_EXT2_FS is not set
# CONFIG_SYSV_FS is not set
# CONFIG_UDF_FS is not set
# CONFIG_UDF_RW is not set
# CONFIG_UFS_FS is not set
# CONFIG_UFS_FS_WRITE is not set

#
# Network File Systems
#
# CONFIG_CODA_FS is not set
CONFIG_NFS_FS=y
# CONFIG_NFS_V3 is not set
CONFIG_ROOT_NFS=y
# CONFIG_NFSD is not set
# CONFIG_NFSD_V3 is not set
CONFIG_SUNRPC=y
CONFIG_LOCKD=y
# CONFIG_SMB_FS is not set
# CONFIG_NCP_FS is not set
# CONFIG_NCPFS_PACKET_SIGNING is not set
# CONFIG_NCPFS_IOCTL_LOCKING is not set
# CONFIG_NCPFS_STRONG is not set
# CONFIG_NCPFS_NFS_NS is not set
# CONFIG_NCPFS_OS2_NS is not set
# CONFIG_NCPFS_SMALLDOS is not set
# CONFIG_NCPFS_NLS is not set
# CONFIG_NCPFS_EXTRAS is not set

#
# Partition Types
#
CONFIG_PARTITION_ADVANCED=y
# CONFIG_ACORN_PARTITION is not set
# CONFIG_OSF_PARTITION is not set
# CONFIG_AMIGA_PARTITION is not set
# CONFIG_ATARI_PARTITION is not set
# CONFIG_MAC_PARTITION is not set
# CONFIG_MSDOS_PARTITION is not set
# CONFIG_LDM_PARTITION is not set
# CONFIG_SGI_PARTITION is not set
# CONFIG_ULTRIX_PARTITION is not set
# CONFIG_SUN_PARTITION is not set
# CONFIG_SMB_NLS is not set
# CONFIG_NLS is not set

#
# Sound
#
# CONFIG_SOUND is not set

#
# MPC8xx CPM Options
#
CONFIG_SCC_ENET=y
# CONFIG_SCC1_ENET is not set
# CONFIG_SCC2_ENET is not set
CONFIG_SCC3_ENET=y
# CONFIG_FEC_ENET is not set
CONFIG_ENET_BIG_BUFFERS=y
CONFIG_SMC2_UART=y
CONFIG_ALTSMC2=y
CONFIG_CONS_SMC2=y
# CONFIG_USE_SCC_IO is not set

#
# Generic MPC8xx Options
#
CONFIG_8xx_COPYBACK=y
CONFIG_8xx_CPU6=y
# CONFIG_UCODE_PATCH is not set

#
# USB support
#
# CONFIG_USB is not set

#
# USB Controllers
#
# CONFIG_USB_UHCI is not set
# CONFIG_USB_UHCI_ALT is not set
# CONFIG_USB_OHCI is not set

#
# USB Device Class drivers
#
# CONFIG_USB_AUDIO is not set
# CONFIG_USB_BLUETOOTH is not set
# CONFIG_USB_STORAGE is not set
# CONFIG_USB_STORAGE_DEBUG is not set
# CONFIG_USB_STORAGE_DATAFAB is not set
# CONFIG_USB_STORAGE_FREECOM is not set
# CONFIG_USB_STORAGE_ISD200 is not set
# CONFIG_USB_STORAGE_DPCM is not set
# CONFIG_USB_STORAGE_HP8200e is not set
# CONFIG_USB_STORAGE_SDDR09 is not set
# CONFIG_USB_STORAGE_JUMPSHOT is not set
# CONFIG_USB_ACM is not set
# CONFIG_USB_PRINTER is not set

#
# USB Human Interface Devices (HID)
#

#
#   Input core support is needed for USB HID
#

#
# USB Imaging devices
#
# CONFIG_USB_DC2XX is not set
# CONFIG_USB_MDC800 is not set
# CONFIG_USB_SCANNER is not set
# CONFIG_USB_MICROTEK is not set
# CONFIG_USB_HPUSBSCSI is not set

#
# USB Multimedia devices
#

#
#   Video4Linux support is needed for USB Multimedia device support
#

#
# USB Network adaptors
#
# CONFIG_USB_PEGASUS is not set
# CONFIG_USB_KAWETH is not set
# CONFIG_USB_CATC is not set
# CONFIG_USB_CDCETHER is not set
# CONFIG_USB_USBNET is not set

#
# USB port drivers
#
# CONFIG_USB_USS720 is not set

#
# USB Serial Converter support
#
# CONFIG_USB_SERIAL is not set
# CONFIG_USB_SERIAL_GENERIC is not set
# CONFIG_USB_SERIAL_BELKIN is not set
# CONFIG_USB_SERIAL_WHITEHEAT is not set
# CONFIG_USB_SERIAL_DIGI_ACCELEPORT is not set
# CONFIG_USB_SERIAL_EMPEG is not set
# CONFIG_USB_SERIAL_FTDI_SIO is not set
# CONFIG_USB_SERIAL_VISOR is not set
# CONFIG_USB_SERIAL_IR is not set
# CONFIG_USB_SERIAL_EDGEPORT is not set
# CONFIG_USB_SERIAL_KEYSPAN_PDA is not set
# CONFIG_USB_SERIAL_KEYSPAN is not set
# CONFIG_USB_SERIAL_KEYSPAN_USA28 is not set
# CONFIG_USB_SERIAL_KEYSPAN_USA28X is not set
# CONFIG_USB_SERIAL_KEYSPAN_USA28XA is not set
# CONFIG_USB_SERIAL_KEYSPAN_USA28XB is not set
# CONFIG_USB_SERIAL_KEYSPAN_USA19 is not set
# CONFIG_USB_SERIAL_KEYSPAN_USA18X is not set
# CONFIG_USB_SERIAL_KEYSPAN_USA19W is not set
# CONFIG_USB_SERIAL_KEYSPAN_USA49W is not set
# CONFIG_USB_SERIAL_MCT_U232 is not set
# CONFIG_USB_SERIAL_PL2303 is not set
# CONFIG_USB_SERIAL_CYBERJACK is not set
# CONFIG_USB_SERIAL_XIRCOM is not set
# CONFIG_USB_SERIAL_OMNINET is not set

#
# USB Miscellaneous drivers
#
# CONFIG_USB_RIO500 is not set

#
# Bluetooth support
#
# CONFIG_BLUEZ is not set

#
# Kernel hacking
#
# CONFIG_MAGIC_SYSRQ is not set
# CONFIG_KGDB is not set
# CONFIG_XMON is not set
#
# Automatically generated make config: don't edit
#
# CONFIG_UID16 is not set
# CONFIG_RWSEM_GENERIC_SPINLOCK is not set
CONFIG_RWSEM_XCHGADD_ALGORITHM=y

#
# Code maturity level options
#
CONFIG_EXPERIMENTAL=y

#
# Loadable module support
#
CONFIG_MODULES=y
# CONFIG_MODVERSIONS is not set
CONFIG_KMOD=y

#
# Platform support
#
CONFIG_PPC=y
CONFIG_PPC32=y
# CONFIG_6xx is not set
# CONFIG_4xx is not set
# CONFIG_POWER3 is not set
# CONFIG_POWER4 is not set
CONFIG_8xx=y
# CONFIG_PPC_STD_MMU is not set
CONFIG_SERIAL_CONSOLE=y
# CONFIG_RPXLITE is not set
# CONFIG_RPXCLASSIC is not set
# CONFIG_BSEIP is not set
# CONFIG_FADS is not set
# CONFIG_TQM823L is not set
# CONFIG_TQM850L is not set
# CONFIG_TQM855L is not set
# CONFIG_TQM860L is not set
# CONFIG_FPS850L is not set
# CONFIG_TQM860 is not set
CONFIG_SPD823TS=y
# CONFIG_IVMS8 is not set
# CONFIG_IVML24 is not set
# CONFIG_SM850 is not set
# CONFIG_MBX is not set
# CONFIG_WINCEPT is not set
# CONFIG_ALL_PPC is not set
# CONFIG_SMP is not set
CONFIG_MATH_EMULATION=y

#
# General setup
#
# CONFIG_HIGHMEM is not set
# CONFIG_ISA is not set
# CONFIG_EISA is not set
# CONFIG_SBUS is not set
# CONFIG_MCA is not set
# CONFIG_PCI_QSPAN is not set
# CONFIG_PCI is not set
CONFIG_NET=y
CONFIG_SYSCTL=y
CONFIG_SYSVIPC=y
# CONFIG_BSD_PROCESS_ACCT is not set
CONFIG_KCORE_ELF=y
CONFIG_BINFMT_ELF=y
CONFIG_KERNEL_ELF=y
# CONFIG_BINFMT_MISC is not set
# CONFIG_HOTPLUG is not set
# CONFIG_PCMCIA is not set

#
# Parallel port support
#
# CONFIG_PARPORT is not set
CONFIG_PPC_RTC=y
# CONFIG_CMDLINE_BOOL is not set

#
# Memory Technology Devices (MTD)
#
# CONFIG_MTD is not set

#
# Plug and Play configuration
#
# CONFIG_PNP is not set
# CONFIG_ISAPNP is not set

#
# Block devices
#
# CONFIG_BLK_DEV_FD is not set
# CONFIG_BLK_DEV_XD is not set
# CONFIG_PARIDE is not set
# CONFIG_BLK_CPQ_DA is not set
# CONFIG_BLK_CPQ_CISS_DA is not set
# CONFIG_BLK_DEV_DAC960 is not set
# CONFIG_BLK_DEV_LOOP is not set
# CONFIG_BLK_DEV_NBD is not set
# CONFIG_BLK_DEV_RAM is not set
# CONFIG_BLK_DEV_INITRD is not set

#
# Multi-device support (RAID and LVM)
#
# CONFIG_MD is not set
# CONFIG_BLK_DEV_MD is not set
# CONFIG_MD_LINEAR is not set
# CONFIG_MD_RAID0 is not set
# CONFIG_MD_RAID1 is not set
# CONFIG_MD_RAID5 is not set
# CONFIG_MD_MULTIPATH is not set
# CONFIG_BLK_DEV_LVM is not set

#
# Networking options
#
CONFIG_PACKET=y
# CONFIG_PACKET_MMAP is not set
CONFIG_NETLINK=y
# CONFIG_RTNETLINK is not set
# CONFIG_NETLINK_DEV is not set
# CONFIG_NETFILTER is not set
# CONFIG_FILTER is not set
CONFIG_UNIX=y
CONFIG_INET=y
# CONFIG_IP_MULTICAST is not set
# CONFIG_IP_ADVANCED_ROUTER is not set
CONFIG_IP_PNP=y
# CONFIG_IP_PNP_DHCP is not set
# CONFIG_IP_PNP_BOOTP is not set
# CONFIG_IP_PNP_RARP is not set
# CONFIG_NET_IPIP is not set
# CONFIG_NET_IPGRE is not set
# CONFIG_INET_ECN is not set
# CONFIG_SYN_COOKIES is not set
# CONFIG_IPV6 is not set
# CONFIG_KHTTPD is not set
# CONFIG_ATM is not set
# CONFIG_VLAN_8021Q is not set

#
#  
#
# CONFIG_IPX is not set
# CONFIG_ATALK is not set
# CONFIG_DECNET is not set
# CONFIG_BRIDGE is not set
# CONFIG_X25 is not set
# CONFIG_LAPB is not set
# CONFIG_LLC is not set
# CONFIG_NET_DIVERT is not set
# CONFIG_ECONET is not set
# CONFIG_WAN_ROUTER is not set
# CONFIG_NET_FASTROUTE is not set
# CONFIG_NET_HW_FLOWCONTROL is not set

#
# QoS and/or fair queueing
#
# CONFIG_NET_SCHED is not set

#
# ATA/IDE/MFM/RLL support
#
# CONFIG_IDE is not set
# CONFIG_BLK_DEV_IDE_MODES is not set
# CONFIG_BLK_DEV_HD is not set

#
# SCSI support
#
# CONFIG_SCSI is not set

#
# Network device support
#
CONFIG_NETDEVICES=y

#
# ARCnet devices
#
# CONFIG_ARCNET is not set
# CONFIG_DUMMY is not set
# CONFIG_BONDING is not set
# CONFIG_EQUALIZER is not set
# CONFIG_TUN is not set
# CONFIG_ETHERTAP is not set

#
# Ethernet (10 or 100Mbit)
#
CONFIG_NET_ETHERNET=y
# CONFIG_MACE is not set
# CONFIG_BMAC is not set
# CONFIG_GMAC is not set
# CONFIG_SUNLANCE is not set
# CONFIG_SUNBMAC is not set
# CONFIG_SUNQE is not set
# CONFIG_SUNLANCE is not set
# CONFIG_SUNGEM is not set
# CONFIG_NET_VENDOR_3COM is not set
# CONFIG_LANCE is not set
# CONFIG_NET_VENDOR_SMC is not set
# CONFIG_NET_VENDOR_RACAL is not set
# CONFIG_NET_ISA is not set
# CONFIG_NET_PCI is not set
# CONFIG_NET_POCKET is not set

#
# Ethernet (1000 Mbit)
#
# CONFIG_ACENIC is not set
# CONFIG_DL2K is not set
# CONFIG_MYRI_SBUS is not set
# CONFIG_NS83820 is not set
# CONFIG_HAMACHI is not set
# CONFIG_YELLOWFIN is not set
# CONFIG_SK98LIN is not set
# CONFIG_FDDI is not set
# CONFIG_HIPPI is not set
# CONFIG_PLIP is not set
# CONFIG_PPP is not set
# CONFIG_SLIP is not set

#
# Wireless LAN (non-hamradio)
#
# CONFIG_NET_RADIO is not set

#
# Token Ring devices
#
# CONFIG_TR is not set
# CONFIG_NET_FC is not set
# CONFIG_RCPCI is not set
# CONFIG_SHAPER is not set

#
# Wan interfaces
#
# CONFIG_WAN is not set

#
# Amateur Radio support
#
# CONFIG_HAMRADIO is not set

#
# IrDA (infrared) support
#
# CONFIG_IRDA is not set

#
# ISDN subsystem
#
# CONFIG_ISDN is not set

#
# Old CD-ROM drivers (not SCSI, not IDE)
#
# CONFIG_CD_NO_IDESCSI is not set

#
# Console drivers
#

#
# Frame-buffer support
#
# CONFIG_FB is not set

#
# Input core support
#
# CONFIG_INPUT is not set
# CONFIG_INPUT_KEYBDEV is not set
# CONFIG_INPUT_MOUSEDEV is not set
# CONFIG_INPUT_JOYDEV is not set
# CONFIG_INPUT_EVDEV is not set

#
# Macintosh device drivers
#

#
# Character devices
#
# CONFIG_VT is not set
# CONFIG_SERIAL is not set
# CONFIG_SERIAL_EXTENDED is not set
# CONFIG_SERIAL_NONSTANDARD is not set
CONFIG_UNIX98_PTYS=y
CONFIG_UNIX98_PTY_COUNT=32

#
# I2C support
#
# CONFIG_I2C is not set

#
# Mice
#
# CONFIG_BUSMOUSE is not set
# CONFIG_MOUSE is not set

#
# Joysticks
#
# CONFIG_INPUT_GAMEPORT is not set

#
# Input core support is needed for gameports
#

#
# Input core support is needed for joysticks
#
# CONFIG_QIC02_TAPE is not set

#
# Watchdog Cards
#
# CONFIG_WATCHDOG is not set
# CONFIG_INTEL_RNG is not set
# CONFIG_NVRAM is not set
# CONFIG_RTC is not set
# CONFIG_DTLK is not set
# CONFIG_R3964 is not set
# CONFIG_APPLICOM is not set

#
# Ftape, the floppy tape device driver
#
# CONFIG_FTAPE is not set
# CONFIG_AGP is not set
# CONFIG_DRM is not set

#
# Multimedia devices
#
# CONFIG_VIDEO_DEV is not set

#
# File systems
#
# CONFIG_QUOTA is not set
# CONFIG_AUTOFS_FS is not set
# CONFIG_AUTOFS4_FS is not set
# CONFIG_REISERFS_FS is not set
# CONFIG_REISERFS_CHECK is not set
# CONFIG_ADFS_FS is not set
# CONFIG_ADFS_FS_RW is not set
# CONFIG_AFFS_FS is not set
# CONFIG_HFS_FS is not set
# CONFIG_BFS_FS is not set
# CONFIG_FAT_FS is not set
# CONFIG_MSDOS_FS is not set
# CONFIG_UMSDOS_FS is not set
# CONFIG_VFAT_FS is not set
# CONFIG_EFS_FS is not set
# CONFIG_JFFS_FS is not set
# CONFIG_JFFS2_FS is not set
# CONFIG_CRAMFS is not set
CONFIG_TMPFS=y
# CONFIG_RAMFS is not set
# CONFIG_ISO9660_FS is not set
# CONFIG_JOLIET is not set
# CONFIG_MINIX_FS is not set
# CONFIG_VXFS_FS is not set
# CONFIG_NTFS_FS is not set
# CONFIG_NTFS_RW is not set
# CONFIG_HPFS_FS is not set
CONFIG_PROC_FS=y
# CONFIG_DEVFS_FS is not set
# CONFIG_DEVFS_MOUNT is not set
# CONFIG_DEVFS_DEBUG is not set
CONFIG_DEVPTS_FS=y
# CONFIG_QNX4FS_FS is not set
# CONFIG_QNX4FS_RW is not set
# CONFIG_ROMFS_FS is not set
# CONFIG_EXT2_FS is not set
# CONFIG_SYSV_FS is not set
# CONFIG_UDF_FS is not set
# CONFIG_UDF_RW is not set
# CONFIG_UFS_FS is not set
# CONFIG_UFS_FS_WRITE is not set

#
# Network File Systems
#
# CONFIG_CODA_FS is not set
CONFIG_NFS_FS=y
# CONFIG_NFS_V3 is not set
CONFIG_ROOT_NFS=y
# CONFIG_NFSD is not set
# CONFIG_NFSD_V3 is not set
CONFIG_SUNRPC=y
CONFIG_LOCKD=y
# CONFIG_SMB_FS is not set
# CONFIG_NCP_FS is not set
# CONFIG_NCPFS_PACKET_SIGNING is not set
# CONFIG_NCPFS_IOCTL_LOCKING is not set
# CONFIG_NCPFS_STRONG is not set
# CONFIG_NCPFS_NFS_NS is not set
# CONFIG_NCPFS_OS2_NS is not set
# CONFIG_NCPFS_SMALLDOS is not set
# CONFIG_NCPFS_NLS is not set
# CONFIG_NCPFS_EXTRAS is not set

#
# Partition Types
#
CONFIG_PARTITION_ADVANCED=y
# CONFIG_ACORN_PARTITION is not set
# CONFIG_OSF_PARTITION is not set
# CONFIG_AMIGA_PARTITION is not set
# CONFIG_ATARI_PARTITION is not set
# CONFIG_MAC_PARTITION is not set
# CONFIG_MSDOS_PARTITION is not set
# CONFIG_LDM_PARTITION is not set
# CONFIG_SGI_PARTITION is not set
# CONFIG_ULTRIX_PARTITION is not set
# CONFIG_SUN_PARTITION is not set
# CONFIG_SMB_NLS is not set
# CONFIG_NLS is not set

#
# Sound
#
# CONFIG_SOUND is not set

#
# MPC8xx CPM Options
#
CONFIG_SCC_ENET=y
# CONFIG_SCC1_ENET is not set
CONFIG_SCC2_ENET=y
# CONFIG_SCC3_ENET is not set
# CONFIG_FEC_ENET is not set
CONFIG_ENET_BIG_BUFFERS=y
CONFIG_SMC2_UART=y
CONFIG_ALTSMC2=y
# CONFIG_CONS_SMC2 is not set
# CONFIG_USE_SCC_IO is not set

#
# Generic MPC8xx Options
#
CONFIG_8xx_COPYBACK=y
# CONFIG_8xx_CPU6 is not set
# CONFIG_UCODE_PATCH is not set

#
# USB support
#
# CONFIG_USB is not set

#
# USB Controllers
#
# CONFIG_USB_UHCI is not set
# CONFIG_USB_UHCI_ALT is not set
# CONFIG_USB_OHCI is not set

#
# USB Device Class drivers
#
# CONFIG_USB_AUDIO is not set
# CONFIG_USB_BLUETOOTH is not set
# CONFIG_USB_STORAGE is not set
# CONFIG_USB_STORAGE_DEBUG is not set
# CONFIG_USB_STORAGE_DATAFAB is not set
# CONFIG_USB_STORAGE_FREECOM is not set
# CONFIG_USB_STORAGE_ISD200 is not set
# CONFIG_USB_STORAGE_DPCM is not set
# CONFIG_USB_STORAGE_HP8200e is not set
# CONFIG_USB_STORAGE_SDDR09 is not set
# CONFIG_USB_STORAGE_JUMPSHOT is not set
# CONFIG_USB_ACM is not set
# CONFIG_USB_PRINTER is not set

#
# USB Human Interface Devices (HID)
#

#
#   Input core support is needed for USB HID
#

#
# USB Imaging devices
#
# CONFIG_USB_DC2XX is not set
# CONFIG_USB_MDC800 is not set
# CONFIG_USB_SCANNER is not set
# CONFIG_USB_MICROTEK is not set
# CONFIG_USB_HPUSBSCSI is not set

#
# USB Multimedia devices
#

#
#   Video4Linux support is needed for USB Multimedia device support
#

#
# USB Network adaptors
#
# CONFIG_USB_PEGASUS is not set
# CONFIG_USB_KAWETH is not set
# CONFIG_USB_CATC is not set
# CONFIG_USB_CDCETHER is not set
# CONFIG_USB_USBNET is not set

#
# USB port drivers
#
# CONFIG_USB_USS720 is not set

#
# USB Serial Converter support
#
# CONFIG_USB_SERIAL is not set
# CONFIG_USB_SERIAL_GENERIC is not set
# CONFIG_USB_SERIAL_BELKIN is not set
# CONFIG_USB_SERIAL_WHITEHEAT is not set
# CONFIG_USB_SERIAL_DIGI_ACCELEPORT is not set
# CONFIG_USB_SERIAL_EMPEG is not set
# CONFIG_USB_SERIAL_FTDI_SIO is not set
# CONFIG_USB_SERIAL_VISOR is not set
# CONFIG_USB_SERIAL_IR is not set
# CONFIG_USB_SERIAL_EDGEPORT is not set
# CONFIG_USB_SERIAL_KEYSPAN_PDA is not set
# CONFIG_USB_SERIAL_KEYSPAN is not set
# CONFIG_USB_SERIAL_KEYSPAN_USA28 is not set
# CONFIG_USB_SERIAL_KEYSPAN_USA28X is not set
# CONFIG_USB_SERIAL_KEYSPAN_USA28XA is not set
# CONFIG_USB_SERIAL_KEYSPAN_USA28XB is not set
# CONFIG_USB_SERIAL_KEYSPAN_USA19 is not set
# CONFIG_USB_SERIAL_KEYSPAN_USA18X is not set
# CONFIG_USB_SERIAL_KEYSPAN_USA19W is not set
# CONFIG_USB_SERIAL_KEYSPAN_USA49W is not set
# CONFIG_USB_SERIAL_MCT_U232 is not set
# CONFIG_USB_SERIAL_PL2303 is not set
# CONFIG_USB_SERIAL_CYBERJACK is not set
# CONFIG_USB_SERIAL_XIRCOM is not set
# CONFIG_USB_SERIAL_OMNINET is not set

#
# USB Miscellaneous drivers
#
# CONFIG_USB_RIO500 is not set

#
# Bluetooth support
#
# CONFIG_BLUEZ is not set

#
# Kernel hacking
#
# CONFIG_MAGIC_SYSRQ is not set
# CONFIG_KGDB is not set
# CONFIG_XMON is not set
#
# Automatically generated make config: don't edit
#
# CONFIG_UID16 is not set
# CONFIG_RWSEM_GENERIC_SPINLOCK is not set
CONFIG_RWSEM_XCHGADD_ALGORITHM=y

#
# Code maturity level options
#
CONFIG_EXPERIMENTAL=y

#
# Loadable module support
#
CONFIG_MODULES=y
# CONFIG_MODVERSIONS is not set
CONFIG_KMOD=y

#
# Platform support
#
CONFIG_PPC=y
CONFIG_PPC32=y
# CONFIG_6xx is not set
# CONFIG_4xx is not set
# CONFIG_POWER3 is not set
# CONFIG_POWER4 is not set
CONFIG_8xx=y
# CONFIG_PPC_STD_MMU is not set
CONFIG_SERIAL_CONSOLE=y
# CONFIG_RPXLITE is not set
# CONFIG_RPXCLASSIC is not set
# CONFIG_BSEIP is not set
# CONFIG_FADS is not set
CONFIG_TQM823L=y
# CONFIG_TQM850L is not set
# CONFIG_TQM855L is not set
# CONFIG_TQM860L is not set
# CONFIG_FPS850L is not set
# CONFIG_TQM860 is not set
# CONFIG_SPD823TS is not set
# CONFIG_IVMS8 is not set
# CONFIG_IVML24 is not set
# CONFIG_SM850 is not set
# CONFIG_MBX is not set
# CONFIG_WINCEPT is not set
CONFIG_TQM8xxL=y
# CONFIG_ALL_PPC is not set
# CONFIG_SMP is not set
CONFIG_MATH_EMULATION=y

#
# General setup
#
# CONFIG_HIGHMEM is not set
# CONFIG_ISA is not set
# CONFIG_EISA is not set
# CONFIG_SBUS is not set
# CONFIG_MCA is not set
# CONFIG_PCI_QSPAN is not set
# CONFIG_PCI is not set
CONFIG_NET=y
CONFIG_SYSCTL=y
CONFIG_SYSVIPC=y
# CONFIG_BSD_PROCESS_ACCT is not set
CONFIG_KCORE_ELF=y
CONFIG_BINFMT_ELF=y
CONFIG_KERNEL_ELF=y
# CONFIG_BINFMT_MISC is not set
# CONFIG_HOTPLUG is not set
# CONFIG_PCMCIA is not set

#
# Parallel port support
#
# CONFIG_PARPORT is not set
CONFIG_PPC_RTC=y
# CONFIG_CMDLINE_BOOL is not set

#
# Memory Technology Devices (MTD)
#
# CONFIG_MTD is not set

#
# Plug and Play configuration
#
# CONFIG_PNP is not set
# CONFIG_ISAPNP is not set

#
# Block devices
#
# CONFIG_BLK_DEV_FD is not set
# CONFIG_BLK_DEV_XD is not set
# CONFIG_PARIDE is not set
# CONFIG_BLK_CPQ_DA is not set
# CONFIG_BLK_CPQ_CISS_DA is not set
# CONFIG_BLK_DEV_DAC960 is not set
# CONFIG_BLK_DEV_LOOP is not set
# CONFIG_BLK_DEV_NBD is not set
# CONFIG_BLK_DEV_RAM is not set
# CONFIG_BLK_DEV_INITRD is not set

#
# Multi-device support (RAID and LVM)
#
# CONFIG_MD is not set
# CONFIG_BLK_DEV_MD is not set
# CONFIG_MD_LINEAR is not set
# CONFIG_MD_RAID0 is not set
# CONFIG_MD_RAID1 is not set
# CONFIG_MD_RAID5 is not set
# CONFIG_MD_MULTIPATH is not set
# CONFIG_BLK_DEV_LVM is not set

#
# Networking options
#
CONFIG_PACKET=y
# CONFIG_PACKET_MMAP is not set
CONFIG_NETLINK=y
# CONFIG_RTNETLINK is not set
# CONFIG_NETLINK_DEV is not set
# CONFIG_NETFILTER is not set
# CONFIG_FILTER is not set
CONFIG_UNIX=y
CONFIG_INET=y
# CONFIG_IP_MULTICAST is not set
# CONFIG_IP_ADVANCED_ROUTER is not set
CONFIG_IP_PNP=y
# CONFIG_IP_PNP_DHCP is not set
# CONFIG_IP_PNP_BOOTP is not set
# CONFIG_IP_PNP_RARP is not set
# CONFIG_NET_IPIP is not set
# CONFIG_NET_IPGRE is not set
# CONFIG_INET_ECN is not set
# CONFIG_SYN_COOKIES is not set
# CONFIG_IPV6 is not set
# CONFIG_KHTTPD is not set
# CONFIG_ATM is not set
# CONFIG_VLAN_8021Q is not set

#
#  
#
# CONFIG_IPX is not set
# CONFIG_ATALK is not set
# CONFIG_DECNET is not set
# CONFIG_BRIDGE is not set
# CONFIG_X25 is not set
# CONFIG_LAPB is not set
# CONFIG_LLC is not set
# CONFIG_NET_DIVERT is not set
# CONFIG_ECONET is not set
# CONFIG_WAN_ROUTER is not set
# CONFIG_NET_FASTROUTE is not set
# CONFIG_NET_HW_FLOWCONTROL is not set

#
# QoS and/or fair queueing
#
# CONFIG_NET_SCHED is not set

#
# ATA/IDE/MFM/RLL support
#
# CONFIG_IDE is not set
# CONFIG_BLK_DEV_IDE_MODES is not set
# CONFIG_BLK_DEV_HD is not set

#
# SCSI support
#
# CONFIG_SCSI is not set

#
# Network device support
#
CONFIG_NETDEVICES=y

#
# ARCnet devices
#
# CONFIG_ARCNET is not set
# CONFIG_DUMMY is not set
# CONFIG_BONDING is not set
# CONFIG_EQUALIZER is not set
# CONFIG_TUN is not set
# CONFIG_ETHERTAP is not set

#
# Ethernet (10 or 100Mbit)
#
CONFIG_NET_ETHERNET=y
# CONFIG_MACE is not set
# CONFIG_BMAC is not set
# CONFIG_GMAC is not set
# CONFIG_SUNLANCE is not set
# CONFIG_SUNBMAC is not set
# CONFIG_SUNQE is not set
# CONFIG_SUNLANCE is not set
# CONFIG_SUNGEM is not set
# CONFIG_NET_VENDOR_3COM is not set
# CONFIG_LANCE is not set
# CONFIG_NET_VENDOR_SMC is not set
# CONFIG_NET_VENDOR_RACAL is not set
# CONFIG_NET_ISA is not set
# CONFIG_NET_PCI is not set
# CONFIG_NET_POCKET is not set

#
# Ethernet (1000 Mbit)
#
# CONFIG_ACENIC is not set
# CONFIG_DL2K is not set
# CONFIG_MYRI_SBUS is not set
# CONFIG_NS83820 is not set
# CONFIG_HAMACHI is not set
# CONFIG_YELLOWFIN is not set
# CONFIG_SK98LIN is not set
# CONFIG_FDDI is not set
# CONFIG_HIPPI is not set
# CONFIG_PLIP is not set
# CONFIG_PPP is not set
# CONFIG_SLIP is not set

#
# Wireless LAN (non-hamradio)
#
# CONFIG_NET_RADIO is not set

#
# Token Ring devices
#
# CONFIG_TR is not set
# CONFIG_NET_FC is not set
# CONFIG_RCPCI is not set
# CONFIG_SHAPER is not set

#
# Wan interfaces
#
# CONFIG_WAN is not set

#
# Amateur Radio support
#
# CONFIG_HAMRADIO is not set

#
# IrDA (infrared) support
#
# CONFIG_IRDA is not set

#
# ISDN subsystem
#
# CONFIG_ISDN is not set

#
# Old CD-ROM drivers (not SCSI, not IDE)
#
# CONFIG_CD_NO_IDESCSI is not set

#
# Console drivers
#

#
# Frame-buffer support
#
# CONFIG_FB is not set

#
# Input core support
#
# CONFIG_INPUT is not set
# CONFIG_INPUT_KEYBDEV is not set
# CONFIG_INPUT_MOUSEDEV is not set
# CONFIG_INPUT_JOYDEV is not set
# CONFIG_INPUT_EVDEV is not set

#
# Macintosh device drivers
#

#
# Character devices
#
# CONFIG_VT is not set
# CONFIG_SERIAL is not set
# CONFIG_SERIAL_EXTENDED is not set
# CONFIG_SERIAL_NONSTANDARD is not set
CONFIG_UNIX98_PTYS=y
CONFIG_UNIX98_PTY_COUNT=32

#
# I2C support
#
# CONFIG_I2C is not set

#
# Mice
#
# CONFIG_BUSMOUSE is not set
# CONFIG_MOUSE is not set

#
# Joysticks
#
# CONFIG_INPUT_GAMEPORT is not set

#
# Input core support is needed for gameports
#

#
# Input core support is needed for joysticks
#
# CONFIG_QIC02_TAPE is not set

#
# Watchdog Cards
#
# CONFIG_WATCHDOG is not set
# CONFIG_INTEL_RNG is not set
# CONFIG_NVRAM is not set
# CONFIG_RTC is not set
# CONFIG_DTLK is not set
# CONFIG_R3964 is not set
# CONFIG_APPLICOM is not set

#
# Ftape, the floppy tape device driver
#
# CONFIG_FTAPE is not set
# CONFIG_AGP is not set
# CONFIG_DRM is not set

#
# Multimedia devices
#
# CONFIG_VIDEO_DEV is not set

#
# File systems
#
# CONFIG_QUOTA is not set
# CONFIG_AUTOFS_FS is not set
# CONFIG_AUTOFS4_FS is not set
# CONFIG_REISERFS_FS is not set
# CONFIG_REISERFS_CHECK is not set
# CONFIG_ADFS_FS is not set
# CONFIG_ADFS_FS_RW is not set
# CONFIG_AFFS_FS is not set
# CONFIG_HFS_FS is not set
# CONFIG_BFS_FS is not set
# CONFIG_FAT_FS is not set
# CONFIG_MSDOS_FS is not set
# CONFIG_UMSDOS_FS is not set
# CONFIG_VFAT_FS is not set
# CONFIG_EFS_FS is not set
# CONFIG_JFFS_FS is not set
# CONFIG_JFFS2_FS is not set
# CONFIG_CRAMFS is not set
CONFIG_TMPFS=y
# CONFIG_RAMFS is not set
# CONFIG_ISO9660_FS is not set
# CONFIG_JOLIET is not set
# CONFIG_MINIX_FS is not set
# CONFIG_VXFS_FS is not set
# CONFIG_NTFS_FS is not set
# CONFIG_NTFS_RW is not set
# CONFIG_HPFS_FS is not set
CONFIG_PROC_FS=y
# CONFIG_DEVFS_FS is not set
# CONFIG_DEVFS_MOUNT is not set
# CONFIG_DEVFS_DEBUG is not set
CONFIG_DEVPTS_FS=y
# CONFIG_QNX4FS_FS is not set
# CONFIG_QNX4FS_RW is not set
# CONFIG_ROMFS_FS is not set
# CONFIG_EXT2_FS is not set
# CONFIG_SYSV_FS is not set
# CONFIG_UDF_FS is not set
# CONFIG_UDF_RW is not set
# CONFIG_UFS_FS is not set
# CONFIG_UFS_FS_WRITE is not set

#
# Network File Systems
#
# CONFIG_CODA_FS is not set
CONFIG_NFS_FS=y
# CONFIG_NFS_V3 is not set
CONFIG_ROOT_NFS=y
# CONFIG_NFSD is not set
# CONFIG_NFSD_V3 is not set
CONFIG_SUNRPC=y
CONFIG_LOCKD=y
# CONFIG_SMB_FS is not set
# CONFIG_NCP_FS is not set
# CONFIG_NCPFS_PACKET_SIGNING is not set
# CONFIG_NCPFS_IOCTL_LOCKING is not set
# CONFIG_NCPFS_STRONG is not set
# CONFIG_NCPFS_NFS_NS is not set
# CONFIG_NCPFS_OS2_NS is not set
# CONFIG_NCPFS_SMALLDOS is not set
# CONFIG_NCPFS_NLS is not set
# CONFIG_NCPFS_EXTRAS is not set

#
# Partition Types
#
CONFIG_PARTITION_ADVANCED=y
# CONFIG_ACORN_PARTITION is not set
# CONFIG_OSF_PARTITION is not set
# CONFIG_AMIGA_PARTITION is not set
# CONFIG_ATARI_PARTITION is not set
# CONFIG_MAC_PARTITION is not set
# CONFIG_MSDOS_PARTITION is not set
# CONFIG_LDM_PARTITION is not set
# CONFIG_SGI_PARTITION is not set
# CONFIG_ULTRIX_PARTITION is not set
# CONFIG_SUN_PARTITION is not set
# CONFIG_SMB_NLS is not set
# CONFIG_NLS is not set

#
# Sound
#
# CONFIG_SOUND is not set

#
# MPC8xx CPM Options
#
CONFIG_SCC_ENET=y
# CONFIG_SCC1_ENET is not set
CONFIG_SCC2_ENET=y
# CONFIG_SCC3_ENET is not set
# CONFIG_FEC_ENET is not set
CONFIG_ENET_BIG_BUFFERS=y
CONFIG_SMC2_UART=y
CONFIG_ALTSMC2=y
# CONFIG_CONS_SMC2 is not set
# CONFIG_USE_SCC_IO is not set

#
# Generic MPC8xx Options
#
CONFIG_8xx_COPYBACK=y
# CONFIG_8xx_CPU6 is not set
# CONFIG_UCODE_PATCH is not set

#
# USB support
#
# CONFIG_USB is not set

#
# USB Controllers
#
# CONFIG_USB_UHCI is not set
# CONFIG_USB_UHCI_ALT is not set
# CONFIG_USB_OHCI is not set

#
# USB Device Class drivers
#
# CONFIG_USB_AUDIO is not set
# CONFIG_USB_BLUETOOTH is not set
# CONFIG_USB_STORAGE is not set
# CONFIG_USB_STORAGE_DEBUG is not set
# CONFIG_USB_STORAGE_DATAFAB is not set
# CONFIG_USB_STORAGE_FREECOM is not set
# CONFIG_USB_STORAGE_ISD200 is not set
# CONFIG_USB_STORAGE_DPCM is not set
# CONFIG_USB_STORAGE_HP8200e is not set
# CONFIG_USB_STORAGE_SDDR09 is not set
# CONFIG_USB_STORAGE_JUMPSHOT is not set
# CONFIG_USB_ACM is not set
# CONFIG_USB_PRINTER is not set

#
# USB Human Interface Devices (HID)
#

#
#   Input core support is needed for USB HID
#

#
# USB Imaging devices
#
# CONFIG_USB_DC2XX is not set
# CONFIG_USB_MDC800 is not set
# CONFIG_USB_SCANNER is not set
# CONFIG_USB_MICROTEK is not set
# CONFIG_USB_HPUSBSCSI is not set

#
# USB Multimedia devices
#

#
#   Video4Linux support is needed for USB Multimedia device support
#

#
# USB Network adaptors
#
# CONFIG_USB_PEGASUS is not set
# CONFIG_USB_KAWETH is not set
# CONFIG_USB_CATC is not set
# CONFIG_USB_CDCETHER is not set
# CONFIG_USB_USBNET is not set

#
# USB port drivers
#
# CONFIG_USB_USS720 is not set

#
# USB Serial Converter support
#
# CONFIG_USB_SERIAL is not set
# CONFIG_USB_SERIAL_GENERIC is not set
# CONFIG_USB_SERIAL_BELKIN is not set
# CONFIG_USB_SERIAL_WHITEHEAT is not set
# CONFIG_USB_SERIAL_DIGI_ACCELEPORT is not set
# CONFIG_USB_SERIAL_EMPEG is not set
# CONFIG_USB_SERIAL_FTDI_SIO is not set
# CONFIG_USB_SERIAL_VISOR is not set
# CONFIG_USB_SERIAL_IR is not set
# CONFIG_USB_SERIAL_EDGEPORT is not set
# CONFIG_USB_SERIAL_KEYSPAN_PDA is not set
# CONFIG_USB_SERIAL_KEYSPAN is not set
# CONFIG_USB_SERIAL_KEYSPAN_USA28 is not set
# CONFIG_USB_SERIAL_KEYSPAN_USA28X is not set
# CONFIG_USB_SERIAL_KEYSPAN_USA28XA is not set
# CONFIG_USB_SERIAL_KEYSPAN_USA28XB is not set
# CONFIG_USB_SERIAL_KEYSPAN_USA19 is not set
# CONFIG_USB_SERIAL_KEYSPAN_USA18X is not set
# CONFIG_USB_SERIAL_KEYSPAN_USA19W is not set
# CONFIG_USB_SERIAL_KEYSPAN_USA49W is not set
# CONFIG_USB_SERIAL_MCT_U232 is not set
# CONFIG_USB_SERIAL_PL2303 is not set
# CONFIG_USB_SERIAL_CYBERJACK is not set
# CONFIG_USB_SERIAL_XIRCOM is not set
# CONFIG_USB_SERIAL_OMNINET is not set

#
# USB Miscellaneous drivers
#
# CONFIG_USB_RIO500 is not set

#
# Bluetooth support
#
# CONFIG_BLUEZ is not set

#
# Kernel hacking
#
# CONFIG_MAGIC_SYSRQ is not set
# CONFIG_KGDB is not set
# CONFIG_XMON is not set
#
# Automatically generated make config: don't edit
#
# CONFIG_UID16 is not set
# CONFIG_RWSEM_GENERIC_SPINLOCK is not set
CONFIG_RWSEM_XCHGADD_ALGORITHM=y

#
# Code maturity level options
#
CONFIG_EXPERIMENTAL=y

#
# Loadable module support
#
CONFIG_MODULES=y
# CONFIG_MODVERSIONS is not set
CONFIG_KMOD=y

#
# Platform support
#
CONFIG_PPC=y
CONFIG_PPC32=y
# CONFIG_6xx is not set
# CONFIG_4xx is not set
# CONFIG_POWER3 is not set
# CONFIG_POWER4 is not set
CONFIG_8xx=y
# CONFIG_PPC_STD_MMU is not set
CONFIG_SERIAL_CONSOLE=y
# CONFIG_RPXLITE is not set
# CONFIG_RPXCLASSIC is not set
# CONFIG_BSEIP is not set
# CONFIG_FADS is not set
# CONFIG_TQM823L is not set
CONFIG_TQM850L=y
# CONFIG_TQM855L is not set
# CONFIG_TQM860L is not set
# CONFIG_FPS850L is not set
# CONFIG_TQM860 is not set
# CONFIG_SPD823TS is not set
# CONFIG_IVMS8 is not set
# CONFIG_IVML24 is not set
# CONFIG_SM850 is not set
# CONFIG_MBX is not set
# CONFIG_WINCEPT is not set
CONFIG_TQM8xxL=y
# CONFIG_ALL_PPC is not set
# CONFIG_SMP is not set
CONFIG_MATH_EMULATION=y

#
# General setup
#
# CONFIG_HIGHMEM is not set
# CONFIG_ISA is not set
# CONFIG_EISA is not set
# CONFIG_SBUS is not set
# CONFIG_MCA is not set
# CONFIG_PCI_QSPAN is not set
# CONFIG_PCI is not set
CONFIG_NET=y
CONFIG_SYSCTL=y
CONFIG_SYSVIPC=y
# CONFIG_BSD_PROCESS_ACCT is not set
CONFIG_KCORE_ELF=y
CONFIG_BINFMT_ELF=y
CONFIG_KERNEL_ELF=y
# CONFIG_BINFMT_MISC is not set
# CONFIG_HOTPLUG is not set
# CONFIG_PCMCIA is not set

#
# Parallel port support
#
# CONFIG_PARPORT is not set
CONFIG_PPC_RTC=y
# CONFIG_CMDLINE_BOOL is not set

#
# Memory Technology Devices (MTD)
#
# CONFIG_MTD is not set

#
# Plug and Play configuration
#
# CONFIG_PNP is not set
# CONFIG_ISAPNP is not set

#
# Block devices
#
# CONFIG_BLK_DEV_FD is not set
# CONFIG_BLK_DEV_XD is not set
# CONFIG_PARIDE is not set
# CONFIG_BLK_CPQ_DA is not set
# CONFIG_BLK_CPQ_CISS_DA is not set
# CONFIG_BLK_DEV_DAC960 is not set
# CONFIG_BLK_DEV_LOOP is not set
# CONFIG_BLK_DEV_NBD is not set
# CONFIG_BLK_DEV_RAM is not set
# CONFIG_BLK_DEV_INITRD is not set

#
# Multi-device support (RAID and LVM)
#
# CONFIG_MD is not set
# CONFIG_BLK_DEV_MD is not set
# CONFIG_MD_LINEAR is not set
# CONFIG_MD_RAID0 is not set
# CONFIG_MD_RAID1 is not set
# CONFIG_MD_RAID5 is not set
# CONFIG_MD_MULTIPATH is not set
# CONFIG_BLK_DEV_LVM is not set

#
# Networking options
#
CONFIG_PACKET=y
# CONFIG_PACKET_MMAP is not set
CONFIG_NETLINK=y
# CONFIG_RTNETLINK is not set
# CONFIG_NETLINK_DEV is not set
# CONFIG_NETFILTER is not set
# CONFIG_FILTER is not set
CONFIG_UNIX=y
CONFIG_INET=y
# CONFIG_IP_MULTICAST is not set
# CONFIG_IP_ADVANCED_ROUTER is not set
CONFIG_IP_PNP=y
# CONFIG_IP_PNP_DHCP is not set
# CONFIG_IP_PNP_BOOTP is not set
# CONFIG_IP_PNP_RARP is not set
# CONFIG_NET_IPIP is not set
# CONFIG_NET_IPGRE is not set
# CONFIG_INET_ECN is not set
# CONFIG_SYN_COOKIES is not set
# CONFIG_IPV6 is not set
# CONFIG_KHTTPD is not set
# CONFIG_ATM is not set
# CONFIG_VLAN_8021Q is not set

#
#  
#
# CONFIG_IPX is not set
# CONFIG_ATALK is not set
# CONFIG_DECNET is not set
# CONFIG_BRIDGE is not set
# CONFIG_X25 is not set
# CONFIG_LAPB is not set
# CONFIG_LLC is not set
# CONFIG_NET_DIVERT is not set
# CONFIG_ECONET is not set
# CONFIG_WAN_ROUTER is not set
# CONFIG_NET_FASTROUTE is not set
# CONFIG_NET_HW_FLOWCONTROL is not set

#
# QoS and/or fair queueing
#
# CONFIG_NET_SCHED is not set

#
# ATA/IDE/MFM/RLL support
#
# CONFIG_IDE is not set
# CONFIG_BLK_DEV_IDE_MODES is not set
# CONFIG_BLK_DEV_HD is not set

#
# SCSI support
#
# CONFIG_SCSI is not set

#
# Network device support
#
CONFIG_NETDEVICES=y

#
# ARCnet devices
#
# CONFIG_ARCNET is not set
# CONFIG_DUMMY is not set
# CONFIG_BONDING is not set
# CONFIG_EQUALIZER is not set
# CONFIG_TUN is not set
# CONFIG_ETHERTAP is not set

#
# Ethernet (10 or 100Mbit)
#
CONFIG_NET_ETHERNET=y
# CONFIG_MACE is not set
# CONFIG_BMAC is not set
# CONFIG_GMAC is not set
# CONFIG_SUNLANCE is not set
# CONFIG_SUNBMAC is not set
# CONFIG_SUNQE is not set
# CONFIG_SUNLANCE is not set
# CONFIG_SUNGEM is not set
# CONFIG_NET_VENDOR_3COM is not set
# CONFIG_LANCE is not set
# CONFIG_NET_VENDOR_SMC is not set
# CONFIG_NET_VENDOR_RACAL is not set
# CONFIG_NET_ISA is not set
# CONFIG_NET_PCI is not set
# CONFIG_NET_POCKET is not set

#
# Ethernet (1000 Mbit)
#
# CONFIG_ACENIC is not set
# CONFIG_DL2K is not set
# CONFIG_MYRI_SBUS is not set
# CONFIG_NS83820 is not set
# CONFIG_HAMACHI is not set
# CONFIG_YELLOWFIN is not set
# CONFIG_SK98LIN is not set
# CONFIG_FDDI is not set
# CONFIG_HIPPI is not set
# CONFIG_PLIP is not set
# CONFIG_PPP is not set
# CONFIG_SLIP is not set

#
# Wireless LAN (non-hamradio)
#
# CONFIG_NET_RADIO is not set

#
# Token Ring devices
#
# CONFIG_TR is not set
# CONFIG_NET_FC is not set
# CONFIG_RCPCI is not set
# CONFIG_SHAPER is not set

#
# Wan interfaces
#
# CONFIG_WAN is not set

#
# Amateur Radio support
#
# CONFIG_HAMRADIO is not set

#
# IrDA (infrared) support
#
# CONFIG_IRDA is not set

#
# ISDN subsystem
#
# CONFIG_ISDN is not set

#
# Old CD-ROM drivers (not SCSI, not IDE)
#
# CONFIG_CD_NO_IDESCSI is not set

#
# Console drivers
#

#
# Frame-buffer support
#
# CONFIG_FB is not set

#
# Input core support
#
# CONFIG_INPUT is not set
# CONFIG_INPUT_KEYBDEV is not set
# CONFIG_INPUT_MOUSEDEV is not set
# CONFIG_INPUT_JOYDEV is not set
# CONFIG_INPUT_EVDEV is not set

#
# Macintosh device drivers
#

#
# Character devices
#
# CONFIG_VT is not set
# CONFIG_SERIAL is not set
# CONFIG_SERIAL_EXTENDED is not set
# CONFIG_SERIAL_NONSTANDARD is not set
CONFIG_UNIX98_PTYS=y
CONFIG_UNIX98_PTY_COUNT=32

#
# I2C support
#
# CONFIG_I2C is not set

#
# Mice
#
# CONFIG_BUSMOUSE is not set
# CONFIG_MOUSE is not set

#
# Joysticks
#
# CONFIG_INPUT_GAMEPORT is not set

#
# Input core support is needed for gameports
#

#
# Input core support is needed for joysticks
#
# CONFIG_QIC02_TAPE is not set

#
# Watchdog Cards
#
# CONFIG_WATCHDOG is not set
# CONFIG_INTEL_RNG is not set
# CONFIG_NVRAM is not set
# CONFIG_RTC is not set
# CONFIG_DTLK is not set
# CONFIG_R3964 is not set
# CONFIG_APPLICOM is not set

#
# Ftape, the floppy tape device driver
#
# CONFIG_FTAPE is not set
# CONFIG_AGP is not set
# CONFIG_DRM is not set

#
# Multimedia devices
#
# CONFIG_VIDEO_DEV is not set

#
# File systems
#
# CONFIG_QUOTA is not set
# CONFIG_AUTOFS_FS is not set
# CONFIG_AUTOFS4_FS is not set
# CONFIG_REISERFS_FS is not set
# CONFIG_REISERFS_CHECK is not set
# CONFIG_ADFS_FS is not set
# CONFIG_ADFS_FS_RW is not set
# CONFIG_AFFS_FS is not set
# CONFIG_HFS_FS is not set
# CONFIG_BFS_FS is not set
# CONFIG_FAT_FS is not set
# CONFIG_MSDOS_FS is not set
# CONFIG_UMSDOS_FS is not set
# CONFIG_VFAT_FS is not set
# CONFIG_EFS_FS is not set
# CONFIG_JFFS_FS is not set
# CONFIG_JFFS2_FS is not set
# CONFIG_CRAMFS is not set
CONFIG_TMPFS=y
# CONFIG_RAMFS is not set
# CONFIG_ISO9660_FS is not set
# CONFIG_JOLIET is not set
# CONFIG_MINIX_FS is not set
# CONFIG_VXFS_FS is not set
# CONFIG_NTFS_FS is not set
# CONFIG_NTFS_RW is not set
# CONFIG_HPFS_FS is not set
CONFIG_PROC_FS=y
# CONFIG_DEVFS_FS is not set
# CONFIG_DEVFS_MOUNT is not set
# CONFIG_DEVFS_DEBUG is not set
CONFIG_DEVPTS_FS=y
# CONFIG_QNX4FS_FS is not set
# CONFIG_QNX4FS_RW is not set
# CONFIG_ROMFS_FS is not set
# CONFIG_EXT2_FS is not set
# CONFIG_SYSV_FS is not set
# CONFIG_UDF_FS is not set
# CONFIG_UDF_RW is not set
# CONFIG_UFS_FS is not set
# CONFIG_UFS_FS_WRITE is not set

#
# Network File Systems
#
# CONFIG_CODA_FS is not set
CONFIG_NFS_FS=y
# CONFIG_NFS_V3 is not set
CONFIG_ROOT_NFS=y
# CONFIG_NFSD is not set
# CONFIG_NFSD_V3 is not set
CONFIG_SUNRPC=y
CONFIG_LOCKD=y
# CONFIG_SMB_FS is not set
# CONFIG_NCP_FS is not set
# CONFIG_NCPFS_PACKET_SIGNING is not set
# CONFIG_NCPFS_IOCTL_LOCKING is not set
# CONFIG_NCPFS_STRONG is not set
# CONFIG_NCPFS_NFS_NS is not set
# CONFIG_NCPFS_OS2_NS is not set
# CONFIG_NCPFS_SMALLDOS is not set
# CONFIG_NCPFS_NLS is not set
# CONFIG_NCPFS_EXTRAS is not set

#
# Partition Types
#
CONFIG_PARTITION_ADVANCED=y
# CONFIG_ACORN_PARTITION is not set
# CONFIG_OSF_PARTITION is not set
# CONFIG_AMIGA_PARTITION is not set
# CONFIG_ATARI_PARTITION is not set
# CONFIG_MAC_PARTITION is not set
# CONFIG_MSDOS_PARTITION is not set
# CONFIG_LDM_PARTITION is not set
# CONFIG_SGI_PARTITION is not set
# CONFIG_ULTRIX_PARTITION is not set
# CONFIG_SUN_PARTITION is not set
# CONFIG_SMB_NLS is not set
# CONFIG_NLS is not set

#
# Sound
#
# CONFIG_SOUND is not set

#
# MPC8xx CPM Options
#
CONFIG_SCC_ENET=y
# CONFIG_SCC1_ENET is not set
CONFIG_SCC2_ENET=y
# CONFIG_SCC3_ENET is not set
# CONFIG_FEC_ENET is not set
CONFIG_ENET_BIG_BUFFERS=y
CONFIG_SMC2_UART=y
CONFIG_ALTSMC2=y
# CONFIG_CONS_SMC2 is not set
# CONFIG_USE_SCC_IO is not set

#
# Generic MPC8xx Options
#
CONFIG_8xx_COPYBACK=y
CONFIG_8xx_CPU6=y
# CONFIG_UCODE_PATCH is not set

#
# USB support
#
# CONFIG_USB is not set

#
# USB Controllers
#
# CONFIG_USB_UHCI is not set
# CONFIG_USB_UHCI_ALT is not set
# CONFIG_USB_OHCI is not set

#
# USB Device Class drivers
#
# CONFIG_USB_AUDIO is not set
# CONFIG_USB_BLUETOOTH is not set
# CONFIG_USB_STORAGE is not set
# CONFIG_USB_STORAGE_DEBUG is not set
# CONFIG_USB_STORAGE_DATAFAB is not set
# CONFIG_USB_STORAGE_FREECOM is not set
# CONFIG_USB_STORAGE_ISD200 is not set
# CONFIG_USB_STORAGE_DPCM is not set
# CONFIG_USB_STORAGE_HP8200e is not set
# CONFIG_USB_STORAGE_SDDR09 is not set
# CONFIG_USB_STORAGE_JUMPSHOT is not set
# CONFIG_USB_ACM is not set
# CONFIG_USB_PRINTER is not set

#
# USB Human Interface Devices (HID)
#

#
#   Input core support is needed for USB HID
#

#
# USB Imaging devices
#
# CONFIG_USB_DC2XX is not set
# CONFIG_USB_MDC800 is not set
# CONFIG_USB_SCANNER is not set
# CONFIG_USB_MICROTEK is not set
# CONFIG_USB_HPUSBSCSI is not set

#
# USB Multimedia devices
#

#
#   Video4Linux support is needed for USB Multimedia device support
#

#
# USB Network adaptors
#
# CONFIG_USB_PEGASUS is not set
# CONFIG_USB_KAWETH is not set
# CONFIG_USB_CATC is not set
# CONFIG_USB_CDCETHER is not set
# CONFIG_USB_USBNET is not set

#
# USB port drivers
#
# CONFIG_USB_USS720 is not set

#
# USB Serial Converter support
#
# CONFIG_USB_SERIAL is not set
# CONFIG_USB_SERIAL_GENERIC is not set
# CONFIG_USB_SERIAL_BELKIN is not set
# CONFIG_USB_SERIAL_WHITEHEAT is not set
# CONFIG_USB_SERIAL_DIGI_ACCELEPORT is not set
# CONFIG_USB_SERIAL_EMPEG is not set
# CONFIG_USB_SERIAL_FTDI_SIO is not set
# CONFIG_USB_SERIAL_VISOR is not set
# CONFIG_USB_SERIAL_IR is not set
# CONFIG_USB_SERIAL_EDGEPORT is not set
# CONFIG_USB_SERIAL_KEYSPAN_PDA is not set
# CONFIG_USB_SERIAL_KEYSPAN is not set
# CONFIG_USB_SERIAL_KEYSPAN_USA28 is not set
# CONFIG_USB_SERIAL_KEYSPAN_USA28X is not set
# CONFIG_USB_SERIAL_KEYSPAN_USA28XA is not set
# CONFIG_USB_SERIAL_KEYSPAN_USA28XB is not set
# CONFIG_USB_SERIAL_KEYSPAN_USA19 is not set
# CONFIG_USB_SERIAL_KEYSPAN_USA18X is not set
# CONFIG_USB_SERIAL_KEYSPAN_USA19W is not set
# CONFIG_USB_SERIAL_KEYSPAN_USA49W is not set
# CONFIG_USB_SERIAL_MCT_U232 is not set
# CONFIG_USB_SERIAL_PL2303 is not set
# CONFIG_USB_SERIAL_CYBERJACK is not set
# CONFIG_USB_SERIAL_XIRCOM is not set
# CONFIG_USB_SERIAL_OMNINET is not set

#
# USB Miscellaneous drivers
#
# CONFIG_USB_RIO500 is not set

#
# Bluetooth support
#
# CONFIG_BLUEZ is not set

#
# Kernel hacking
#
# CONFIG_MAGIC_SYSRQ is not set
# CONFIG_KGDB is not set
# CONFIG_XMON is not set
#
# Automatically generated make config: don't edit
#
# CONFIG_UID16 is not set
# CONFIG_RWSEM_GENERIC_SPINLOCK is not set
CONFIG_RWSEM_XCHGADD_ALGORITHM=y

#
# Code maturity level options
#
CONFIG_EXPERIMENTAL=y

#
# Loadable module support
#
CONFIG_MODULES=y
# CONFIG_MODVERSIONS is not set
CONFIG_KMOD=y

#
# Platform support
#
CONFIG_PPC=y
CONFIG_PPC32=y
# CONFIG_6xx is not set
# CONFIG_4xx is not set
# CONFIG_POWER3 is not set
# CONFIG_POWER4 is not set
CONFIG_8xx=y
# CONFIG_PPC_STD_MMU is not set
CONFIG_SERIAL_CONSOLE=y
# CONFIG_RPXLITE is not set
# CONFIG_RPXCLASSIC is not set
# CONFIG_BSEIP is not set
# CONFIG_FADS is not set
# CONFIG_TQM823L is not set
# CONFIG_TQM850L is not set
# CONFIG_TQM855L is not set
CONFIG_TQM860L=y
# CONFIG_FPS850L is not set
# CONFIG_TQM860 is not set
# CONFIG_SPD823TS is not set
# CONFIG_IVMS8 is not set
# CONFIG_IVML24 is not set
# CONFIG_SM850 is not set
# CONFIG_MBX is not set
# CONFIG_WINCEPT is not set
CONFIG_TQM8xxL=y
# CONFIG_ALL_PPC is not set
# CONFIG_SMP is not set
CONFIG_MATH_EMULATION=y

#
# General setup
#
# CONFIG_HIGHMEM is not set
# CONFIG_ISA is not set
# CONFIG_EISA is not set
# CONFIG_SBUS is not set
# CONFIG_MCA is not set
# CONFIG_PCI_QSPAN is not set
# CONFIG_PCI is not set
CONFIG_NET=y
CONFIG_SYSCTL=y
CONFIG_SYSVIPC=y
# CONFIG_BSD_PROCESS_ACCT is not set
CONFIG_KCORE_ELF=y
CONFIG_BINFMT_ELF=y
CONFIG_KERNEL_ELF=y
# CONFIG_BINFMT_MISC is not set
# CONFIG_HOTPLUG is not set
# CONFIG_PCMCIA is not set

#
# Parallel port support
#
# CONFIG_PARPORT is not set
CONFIG_PPC_RTC=y
# CONFIG_CMDLINE_BOOL is not set

#
# Memory Technology Devices (MTD)
#
# CONFIG_MTD is not set

#
# Plug and Play configuration
#
# CONFIG_PNP is not set
# CONFIG_ISAPNP is not set

#
# Block devices
#
# CONFIG_BLK_DEV_FD is not set
# CONFIG_BLK_DEV_XD is not set
# CONFIG_PARIDE is not set
# CONFIG_BLK_CPQ_DA is not set
# CONFIG_BLK_CPQ_CISS_DA is not set
# CONFIG_BLK_DEV_DAC960 is not set
# CONFIG_BLK_DEV_LOOP is not set
# CONFIG_BLK_DEV_NBD is not set
# CONFIG_BLK_DEV_RAM is not set
# CONFIG_BLK_DEV_INITRD is not set

#
# Multi-device support (RAID and LVM)
#
# CONFIG_MD is not set
# CONFIG_BLK_DEV_MD is not set
# CONFIG_MD_LINEAR is not set
# CONFIG_MD_RAID0 is not set
# CONFIG_MD_RAID1 is not set
# CONFIG_MD_RAID5 is not set
# CONFIG_MD_MULTIPATH is not set
# CONFIG_BLK_DEV_LVM is not set

#
# Networking options
#
CONFIG_PACKET=y
# CONFIG_PACKET_MMAP is not set
CONFIG_NETLINK=y
# CONFIG_RTNETLINK is not set
# CONFIG_NETLINK_DEV is not set
# CONFIG_NETFILTER is not set
# CONFIG_FILTER is not set
CONFIG_UNIX=y
CONFIG_INET=y
# CONFIG_IP_MULTICAST is not set
# CONFIG_IP_ADVANCED_ROUTER is not set
CONFIG_IP_PNP=y
# CONFIG_IP_PNP_DHCP is not set
# CONFIG_IP_PNP_BOOTP is not set
# CONFIG_IP_PNP_RARP is not set
# CONFIG_NET_IPIP is not set
# CONFIG_NET_IPGRE is not set
# CONFIG_INET_ECN is not set
# CONFIG_SYN_COOKIES is not set
# CONFIG_IPV6 is not set
# CONFIG_KHTTPD is not set
# CONFIG_ATM is not set
# CONFIG_VLAN_8021Q is not set

#
#  
#
# CONFIG_IPX is not set
# CONFIG_ATALK is not set
# CONFIG_DECNET is not set
# CONFIG_BRIDGE is not set
# CONFIG_X25 is not set
# CONFIG_LAPB is not set
# CONFIG_LLC is not set
# CONFIG_NET_DIVERT is not set
# CONFIG_ECONET is not set
# CONFIG_WAN_ROUTER is not set
# CONFIG_NET_FASTROUTE is not set
# CONFIG_NET_HW_FLOWCONTROL is not set

#
# QoS and/or fair queueing
#
# CONFIG_NET_SCHED is not set

#
# ATA/IDE/MFM/RLL support
#
CONFIG_IDE=y

#
# IDE, ATA and ATAPI Block devices
#
CONFIG_BLK_DEV_IDE=y

#
# Please see Documentation/ide.txt for help/info on IDE drives
#
# CONFIG_BLK_DEV_HD_IDE is not set
# CONFIG_BLK_DEV_HD is not set
CONFIG_BLK_DEV_IDEDISK=y
# CONFIG_IDEDISK_MULTI_MODE is not set
# CONFIG_BLK_DEV_IDEDISK_VENDOR is not set
# CONFIG_BLK_DEV_IDEDISK_FUJITSU is not set
# CONFIG_BLK_DEV_IDEDISK_IBM is not set
# CONFIG_BLK_DEV_IDEDISK_MAXTOR is not set
# CONFIG_BLK_DEV_IDEDISK_QUANTUM is not set
# CONFIG_BLK_DEV_IDEDISK_SEAGATE is not set
# CONFIG_BLK_DEV_IDEDISK_WD is not set
# CONFIG_BLK_DEV_COMMERIAL is not set
# CONFIG_BLK_DEV_TIVO is not set
# CONFIG_BLK_DEV_IDECS is not set
# CONFIG_BLK_DEV_IDECD is not set
# CONFIG_BLK_DEV_IDETAPE is not set
# CONFIG_BLK_DEV_IDEFLOPPY is not set
# CONFIG_BLK_DEV_IDESCSI is not set

#
# IDE chipset support/bugfixes
#
# CONFIG_BLK_DEV_CMD640 is not set
# CONFIG_BLK_DEV_CMD640_ENHANCED is not set
# CONFIG_BLK_DEV_ISAPNP is not set
CONFIG_BLK_DEV_MPC8xx_IDE=y
CONFIG_IDE_8xx_PCCARD=y
# CONFIG_IDE_8xx_DIRECT is not set
# CONFIG_IDE_EXT_DIRECT is not set
# CONFIG_IDE_CHIPSETS is not set
# CONFIG_IDEDMA_AUTO is not set
# CONFIG_DMA_NONPCI is not set
CONFIG_BLK_DEV_IDE_MODES=y
# CONFIG_BLK_DEV_ATARAID is not set
# CONFIG_BLK_DEV_ATARAID_PDC is not set
# CONFIG_BLK_DEV_ATARAID_HPT is not set

#
# SCSI support
#
# CONFIG_SCSI is not set

#
# Network device support
#
CONFIG_NETDEVICES=y

#
# ARCnet devices
#
# CONFIG_ARCNET is not set
# CONFIG_DUMMY is not set
# CONFIG_BONDING is not set
# CONFIG_EQUALIZER is not set
# CONFIG_TUN is not set
# CONFIG_ETHERTAP is not set

#
# Ethernet (10 or 100Mbit)
#
CONFIG_NET_ETHERNET=y
# CONFIG_MACE is not set
# CONFIG_BMAC is not set
# CONFIG_GMAC is not set
# CONFIG_SUNLANCE is not set
# CONFIG_SUNBMAC is not set
# CONFIG_SUNQE is not set
# CONFIG_SUNLANCE is not set
# CONFIG_SUNGEM is not set
# CONFIG_NET_VENDOR_3COM is not set
# CONFIG_LANCE is not set
# CONFIG_NET_VENDOR_SMC is not set
# CONFIG_NET_VENDOR_RACAL is not set
# CONFIG_NET_ISA is not set
# CONFIG_NET_PCI is not set
# CONFIG_NET_POCKET is not set

#
# Ethernet (1000 Mbit)
#
# CONFIG_ACENIC is not set
# CONFIG_DL2K is not set
# CONFIG_MYRI_SBUS is not set
# CONFIG_NS83820 is not set
# CONFIG_HAMACHI is not set
# CONFIG_YELLOWFIN is not set
# CONFIG_SK98LIN is not set
# CONFIG_FDDI is not set
# CONFIG_HIPPI is not set
# CONFIG_PLIP is not set
# CONFIG_PPP is not set
# CONFIG_SLIP is not set

#
# Wireless LAN (non-hamradio)
#
# CONFIG_NET_RADIO is not set

#
# Token Ring devices
#
# CONFIG_TR is not set
# CONFIG_NET_FC is not set
# CONFIG_RCPCI is not set
# CONFIG_SHAPER is not set

#
# Wan interfaces
#
# CONFIG_WAN is not set

#
# Amateur Radio support
#
# CONFIG_HAMRADIO is not set

#
# IrDA (infrared) support
#
# CONFIG_IRDA is not set

#
# ISDN subsystem
#
# CONFIG_ISDN is not set

#
# Old CD-ROM drivers (not SCSI, not IDE)
#
# CONFIG_CD_NO_IDESCSI is not set

#
# Console drivers
#

#
# Frame-buffer support
#
# CONFIG_FB is not set

#
# Input core support
#
# CONFIG_INPUT is not set
# CONFIG_INPUT_KEYBDEV is not set
# CONFIG_INPUT_MOUSEDEV is not set
# CONFIG_INPUT_JOYDEV is not set
# CONFIG_INPUT_EVDEV is not set

#
# Macintosh device drivers
#

#
# Character devices
#
# CONFIG_VT is not set
# CONFIG_SERIAL is not set
# CONFIG_SERIAL_EXTENDED is not set
# CONFIG_SERIAL_NONSTANDARD is not set
CONFIG_UNIX98_PTYS=y
CONFIG_UNIX98_PTY_COUNT=32

#
# I2C support
#
# CONFIG_I2C is not set

#
# Mice
#
# CONFIG_BUSMOUSE is not set
# CONFIG_MOUSE is not set

#
# Joysticks
#
# CONFIG_INPUT_GAMEPORT is not set

#
# Input core support is needed for gameports
#

#
# Input core support is needed for joysticks
#
# CONFIG_QIC02_TAPE is not set

#
# Watchdog Cards
#
# CONFIG_WATCHDOG is not set
# CONFIG_INTEL_RNG is not set
# CONFIG_NVRAM is not set
# CONFIG_RTC is not set
# CONFIG_DTLK is not set
# CONFIG_R3964 is not set
# CONFIG_APPLICOM is not set

#
# Ftape, the floppy tape device driver
#
# CONFIG_FTAPE is not set
# CONFIG_AGP is not set
# CONFIG_DRM is not set

#
# Multimedia devices
#
# CONFIG_VIDEO_DEV is not set

#
# File systems
#
# CONFIG_QUOTA is not set
# CONFIG_AUTOFS_FS is not set
# CONFIG_AUTOFS4_FS is not set
# CONFIG_REISERFS_FS is not set
# CONFIG_REISERFS_CHECK is not set
# CONFIG_ADFS_FS is not set
# CONFIG_ADFS_FS_RW is not set
# CONFIG_AFFS_FS is not set
# CONFIG_HFS_FS is not set
# CONFIG_BFS_FS is not set
# CONFIG_FAT_FS is not set
# CONFIG_MSDOS_FS is not set
# CONFIG_UMSDOS_FS is not set
# CONFIG_VFAT_FS is not set
# CONFIG_EFS_FS is not set
# CONFIG_JFFS_FS is not set
# CONFIG_JFFS2_FS is not set
# CONFIG_CRAMFS is not set
CONFIG_TMPFS=y
# CONFIG_RAMFS is not set
# CONFIG_ISO9660_FS is not set
# CONFIG_JOLIET is not set
# CONFIG_MINIX_FS is not set
# CONFIG_VXFS_FS is not set
# CONFIG_NTFS_FS is not set
# CONFIG_NTFS_RW is not set
# CONFIG_HPFS_FS is not set
CONFIG_PROC_FS=y
# CONFIG_DEVFS_FS is not set
# CONFIG_DEVFS_MOUNT is not set
# CONFIG_DEVFS_DEBUG is not set
CONFIG_DEVPTS_FS=y
# CONFIG_QNX4FS_FS is not set
# CONFIG_QNX4FS_RW is not set
# CONFIG_ROMFS_FS is not set
CONFIG_EXT2_FS=y
# CONFIG_SYSV_FS is not set
# CONFIG_UDF_FS is not set
# CONFIG_UDF_RW is not set
# CONFIG_UFS_FS is not set
# CONFIG_UFS_FS_WRITE is not set

#
# Network File Systems
#
# CONFIG_CODA_FS is not set
CONFIG_NFS_FS=y
# CONFIG_NFS_V3 is not set
CONFIG_ROOT_NFS=y
# CONFIG_NFSD is not set
# CONFIG_NFSD_V3 is not set
CONFIG_SUNRPC=y
CONFIG_LOCKD=y
# CONFIG_SMB_FS is not set
# CONFIG_NCP_FS is not set
# CONFIG_NCPFS_PACKET_SIGNING is not set
# CONFIG_NCPFS_IOCTL_LOCKING is not set
# CONFIG_NCPFS_STRONG is not set
# CONFIG_NCPFS_NFS_NS is not set
# CONFIG_NCPFS_OS2_NS is not set
# CONFIG_NCPFS_SMALLDOS is not set
# CONFIG_NCPFS_NLS is not set
# CONFIG_NCPFS_EXTRAS is not set

#
# Partition Types
#
CONFIG_PARTITION_ADVANCED=y
# CONFIG_ACORN_PARTITION is not set
# CONFIG_OSF_PARTITION is not set
# CONFIG_AMIGA_PARTITION is not set
# CONFIG_ATARI_PARTITION is not set
CONFIG_MAC_PARTITION=y
CONFIG_MSDOS_PARTITION=y
# CONFIG_BSD_DISKLABEL is not set
# CONFIG_MINIX_SUBPARTITION is not set
# CONFIG_SOLARIS_X86_PARTITION is not set
# CONFIG_UNIXWARE_DISKLABEL is not set
# CONFIG_LDM_PARTITION is not set
# CONFIG_SGI_PARTITION is not set
# CONFIG_ULTRIX_PARTITION is not set
# CONFIG_SUN_PARTITION is not set
# CONFIG_SMB_NLS is not set
# CONFIG_NLS is not set

#
# Sound
#
# CONFIG_SOUND is not set

#
# MPC8xx CPM Options
#
CONFIG_SCC_ENET=y
CONFIG_SCC1_ENET=y
# CONFIG_SCC2_ENET is not set
# CONFIG_SCC3_ENET is not set
# CONFIG_FEC_ENET is not set
CONFIG_ENET_BIG_BUFFERS=y
CONFIG_SMC2_UART=y
# CONFIG_ALTSMC2 is not set
# CONFIG_CONS_SMC2 is not set
# CONFIG_USE_SCC_IO is not set

#
# Generic MPC8xx Options
#
CONFIG_8xx_COPYBACK=y
# CONFIG_8xx_CPU6 is not set
# CONFIG_UCODE_PATCH is not set

#
# USB support
#
# CONFIG_USB is not set

#
# USB Controllers
#
# CONFIG_USB_UHCI is not set
# CONFIG_USB_UHCI_ALT is not set
# CONFIG_USB_OHCI is not set

#
# USB Device Class drivers
#
# CONFIG_USB_AUDIO is not set
# CONFIG_USB_BLUETOOTH is not set
# CONFIG_USB_STORAGE is not set
# CONFIG_USB_STORAGE_DEBUG is not set
# CONFIG_USB_STORAGE_DATAFAB is not set
# CONFIG_USB_STORAGE_FREECOM is not set
# CONFIG_USB_STORAGE_ISD200 is not set
# CONFIG_USB_STORAGE_DPCM is not set
# CONFIG_USB_STORAGE_HP8200e is not set
# CONFIG_USB_STORAGE_SDDR09 is not set
# CONFIG_USB_STORAGE_JUMPSHOT is not set
# CONFIG_USB_ACM is not set
# CONFIG_USB_PRINTER is not set

#
# USB Human Interface Devices (HID)
#

#
#   Input core support is needed for USB HID
#

#
# USB Imaging devices
#
# CONFIG_USB_DC2XX is not set
# CONFIG_USB_MDC800 is not set
# CONFIG_USB_SCANNER is not set
# CONFIG_USB_MICROTEK is not set
# CONFIG_USB_HPUSBSCSI is not set

#
# USB Multimedia devices
#

#
#   Video4Linux support is needed for USB Multimedia device support
#

#
# USB Network adaptors
#
# CONFIG_USB_PEGASUS is not set
# CONFIG_USB_KAWETH is not set
# CONFIG_USB_CATC is not set
# CONFIG_USB_CDCETHER is not set
# CONFIG_USB_USBNET is not set

#
# USB port drivers
#
# CONFIG_USB_USS720 is not set

#
# USB Serial Converter support
#
# CONFIG_USB_SERIAL is not set
# CONFIG_USB_SERIAL_GENERIC is not set
# CONFIG_USB_SERIAL_BELKIN is not set
# CONFIG_USB_SERIAL_WHITEHEAT is not set
# CONFIG_USB_SERIAL_DIGI_ACCELEPORT is not set
# CONFIG_USB_SERIAL_EMPEG is not set
# CONFIG_USB_SERIAL_FTDI_SIO is not set
# CONFIG_USB_SERIAL_VISOR is not set
# CONFIG_USB_SERIAL_IR is not set
# CONFIG_USB_SERIAL_EDGEPORT is not set
# CONFIG_USB_SERIAL_KEYSPAN_PDA is not set
# CONFIG_USB_SERIAL_KEYSPAN is not set
# CONFIG_USB_SERIAL_KEYSPAN_USA28 is not set
# CONFIG_USB_SERIAL_KEYSPAN_USA28X is not set
# CONFIG_USB_SERIAL_KEYSPAN_USA28XA is not set
# CONFIG_USB_SERIAL_KEYSPAN_USA28XB is not set
# CONFIG_USB_SERIAL_KEYSPAN_USA19 is not set
# CONFIG_USB_SERIAL_KEYSPAN_USA18X is not set
# CONFIG_USB_SERIAL_KEYSPAN_USA19W is not set
# CONFIG_USB_SERIAL_KEYSPAN_USA49W is not set
# CONFIG_USB_SERIAL_MCT_U232 is not set
# CONFIG_USB_SERIAL_PL2303 is not set
# CONFIG_USB_SERIAL_CYBERJACK is not set
# CONFIG_USB_SERIAL_XIRCOM is not set
# CONFIG_USB_SERIAL_OMNINET is not set

#
# USB Miscellaneous drivers
#
# CONFIG_USB_RIO500 is not set

#
# Bluetooth support
#
# CONFIG_BLUEZ is not set

#
# Kernel hacking
#
# CONFIG_MAGIC_SYSRQ is not set
# CONFIG_KGDB is not set
# CONFIG_XMON is not set
#
# Automatically generated make config: don't edit
#
# CONFIG_UID16 is not set
# CONFIG_RWSEM_GENERIC_SPINLOCK is not set
CONFIG_RWSEM_XCHGADD_ALGORITHM=y
CONFIG_HAVE_DEC_LOCK=y

#
# Code maturity level options
#
CONFIG_EXPERIMENTAL=y

#
# Loadable module support
#
CONFIG_MODULES=y
# CONFIG_MODVERSIONS is not set
CONFIG_KMOD=y

#
# Platform support
#
CONFIG_PPC=y
CONFIG_PPC32=y
CONFIG_6xx=y
# CONFIG_4xx is not set
# CONFIG_POWER3 is not set
# CONFIG_POWER4 is not set
# CONFIG_8xx is not set
# CONFIG_8260 is not set
CONFIG_PPC_STD_MMU=y
# CONFIG_ALL_PPC is not set
# CONFIG_APUS is not set
CONFIG_GEMINI=y
# CONFIG_SMP is not set
CONFIG_ALTIVEC=y
CONFIG_TAU=y
# CONFIG_TAU_INT is not set
# CONFIG_TAU_AVERAGE is not set

#
# General setup
#
# CONFIG_HIGHMEM is not set
# CONFIG_ISA is not set
# CONFIG_EISA is not set
# CONFIG_SBUS is not set
# CONFIG_MCA is not set
CONFIG_PCI=y
CONFIG_NET=y
CONFIG_SYSCTL=y
CONFIG_SYSVIPC=y
# CONFIG_BSD_PROCESS_ACCT is not set
CONFIG_KCORE_ELF=y
CONFIG_BINFMT_ELF=y
CONFIG_KERNEL_ELF=y
# CONFIG_BINFMT_MISC is not set
CONFIG_PCI_NAMES=y
# CONFIG_HOTPLUG is not set
# CONFIG_PCMCIA is not set

#
# Parallel port support
#
# CONFIG_PARPORT is not set
# CONFIG_PPC_RTC is not set
# CONFIG_CMDLINE_BOOL is not set

#
# Memory Technology Devices (MTD)
#
# CONFIG_MTD is not set

#
# Plug and Play configuration
#
# CONFIG_PNP is not set
# CONFIG_ISAPNP is not set

#
# Block devices
#
# CONFIG_BLK_DEV_FD is not set
# CONFIG_BLK_DEV_XD is not set
# CONFIG_PARIDE is not set
# CONFIG_BLK_CPQ_DA is not set
# CONFIG_BLK_CPQ_CISS_DA is not set
# CONFIG_BLK_DEV_DAC960 is not set
# CONFIG_BLK_DEV_LOOP is not set
# CONFIG_BLK_DEV_NBD is not set
CONFIG_BLK_DEV_RAM=y
CONFIG_BLK_DEV_RAM_SIZE=4096
CONFIG_BLK_DEV_INITRD=y

#
# Multi-device support (RAID and LVM)
#
# CONFIG_MD is not set
# CONFIG_BLK_DEV_MD is not set
# CONFIG_MD_LINEAR is not set
# CONFIG_MD_RAID0 is not set
# CONFIG_MD_RAID1 is not set
# CONFIG_MD_RAID5 is not set
# CONFIG_MD_MULTIPATH is not set
# CONFIG_BLK_DEV_LVM is not set

#
# Networking options
#
CONFIG_PACKET=y
# CONFIG_PACKET_MMAP is not set
# CONFIG_NETLINK_DEV is not set
CONFIG_NETFILTER=y
# CONFIG_NETFILTER_DEBUG is not set
# CONFIG_FILTER is not set
CONFIG_UNIX=y
CONFIG_INET=y
# CONFIG_IP_MULTICAST is not set
# CONFIG_IP_ADVANCED_ROUTER is not set
# CONFIG_IP_PNP is not set
# CONFIG_NET_IPIP is not set
# CONFIG_NET_IPGRE is not set
# CONFIG_ARPD is not set
# CONFIG_INET_ECN is not set
# CONFIG_SYN_COOKIES is not set

#
#   IP: Netfilter Configuration
#
# CONFIG_IP_NF_CONNTRACK is not set
# CONFIG_IP_NF_QUEUE is not set
# CONFIG_IP_NF_IPTABLES is not set
# CONFIG_IP_NF_COMPAT_IPCHAINS is not set
# CONFIG_IP_NF_COMPAT_IPFWADM is not set
# CONFIG_IPV6 is not set
# CONFIG_KHTTPD is not set
# CONFIG_ATM is not set
# CONFIG_VLAN_8021Q is not set

#
#  
#
# CONFIG_IPX is not set
# CONFIG_ATALK is not set
# CONFIG_DECNET is not set
# CONFIG_BRIDGE is not set
# CONFIG_X25 is not set
# CONFIG_LAPB is not set
# CONFIG_LLC is not set
# CONFIG_NET_DIVERT is not set
# CONFIG_ECONET is not set
# CONFIG_WAN_ROUTER is not set
# CONFIG_NET_FASTROUTE is not set
# CONFIG_NET_HW_FLOWCONTROL is not set

#
# QoS and/or fair queueing
#
# CONFIG_NET_SCHED is not set

#
# ATA/IDE/MFM/RLL support
#
# CONFIG_IDE is not set
# CONFIG_BLK_DEV_IDE_MODES is not set
# CONFIG_BLK_DEV_HD is not set

#
# SCSI support
#
CONFIG_SCSI=y

#
# SCSI support type (disk, tape, CD-ROM)
#
CONFIG_BLK_DEV_SD=y
CONFIG_SD_EXTRA_DEVS=40
# CONFIG_CHR_DEV_ST is not set
# CONFIG_CHR_DEV_OSST is not set
CONFIG_BLK_DEV_SR=y
CONFIG_BLK_DEV_SR_VENDOR=y
CONFIG_SR_EXTRA_DEVS=2
CONFIG_CHR_DEV_SG=y

#
# Some SCSI devices (e.g. CD jukebox) support multiple LUNs
#
# CONFIG_SCSI_DEBUG_QUEUES is not set
# CONFIG_SCSI_MULTI_LUN is not set
CONFIG_SCSI_CONSTANTS=y
# CONFIG_SCSI_LOGGING is not set

#
# SCSI low-level drivers
#
# CONFIG_BLK_DEV_3W_XXXX_RAID is not set
# CONFIG_SCSI_7000FASST is not set
# CONFIG_SCSI_ACARD is not set
# CONFIG_SCSI_AHA152X is not set
# CONFIG_SCSI_AHA1542 is not set
# CONFIG_SCSI_AHA1740 is not set
# CONFIG_SCSI_AIC7XXX is not set
# CONFIG_SCSI_AIC7XXX_OLD is not set
# CONFIG_SCSI_DPT_I2O is not set
# CONFIG_SCSI_ADVANSYS is not set
# CONFIG_SCSI_IN2000 is not set
# CONFIG_SCSI_AM53C974 is not set
# CONFIG_SCSI_MEGARAID is not set
# CONFIG_SCSI_BUSLOGIC is not set
# CONFIG_SCSI_CPQFCTS is not set
# CONFIG_SCSI_DMX3191D is not set
# CONFIG_SCSI_DTC3280 is not set
# CONFIG_SCSI_EATA is not set
# CONFIG_SCSI_EATA_DMA is not set
# CONFIG_SCSI_EATA_PIO is not set
# CONFIG_SCSI_FUTURE_DOMAIN is not set
# CONFIG_SCSI_GDTH is not set
# CONFIG_SCSI_GENERIC_NCR5380 is not set
# CONFIG_SCSI_INITIO is not set
# CONFIG_SCSI_INIA100 is not set
# CONFIG_SCSI_NCR53C406A is not set
# CONFIG_SCSI_NCR53C7xx is not set
CONFIG_SCSI_SYM53C8XX_2=y
CONFIG_SCSI_SYM53C8XX_DMA_ADDRESSING_MODE=0
CONFIG_SCSI_SYM53C8XX_DEFAULT_TAGS=16
CONFIG_SCSI_SYM53C8XX_MAX_TAGS=64
# CONFIG_SCSI_SYM53C8XX_IOMAPPED is not set
# CONFIG_SCSI_PAS16 is not set
# CONFIG_SCSI_PCI2000 is not set
# CONFIG_SCSI_PCI2220I is not set
# CONFIG_SCSI_PSI240I is not set
# CONFIG_SCSI_QLOGIC_FAS is not set
# CONFIG_SCSI_QLOGIC_ISP is not set
# CONFIG_SCSI_QLOGIC_FC is not set
# CONFIG_SCSI_QLOGIC_1280 is not set
# CONFIG_SCSI_SIM710 is not set
# CONFIG_SCSI_SYM53C416 is not set
# CONFIG_SCSI_DC390T is not set
# CONFIG_SCSI_T128 is not set
# CONFIG_SCSI_U14_34F is not set
# CONFIG_SCSI_DEBUG is not set

#
# IEEE 1394 (FireWire) support (EXPERIMENTAL)
#
# CONFIG_IEEE1394 is not set

#
# Network device support
#
CONFIG_NETDEVICES=y

#
# ARCnet devices
#
# CONFIG_ARCNET is not set
# CONFIG_DUMMY is not set
# CONFIG_BONDING is not set
# CONFIG_EQUALIZER is not set
# CONFIG_TUN is not set
# CONFIG_ETHERTAP is not set

#
# Ethernet (10 or 100Mbit)
#
CONFIG_NET_ETHERNET=y
# CONFIG_MACE is not set
# CONFIG_BMAC is not set
# CONFIG_GMAC is not set
# CONFIG_SUNLANCE is not set
# CONFIG_HAPPYMEAL is not set
# CONFIG_SUNBMAC is not set
# CONFIG_SUNQE is not set
# CONFIG_SUNLANCE is not set
# CONFIG_SUNGEM is not set
# CONFIG_NET_VENDOR_3COM is not set
# CONFIG_LANCE is not set
# CONFIG_NET_VENDOR_SMC is not set
# CONFIG_NET_VENDOR_RACAL is not set
# CONFIG_HP100 is not set
# CONFIG_NET_ISA is not set
# CONFIG_NET_PCI is not set
# CONFIG_NET_POCKET is not set

#
# Ethernet (1000 Mbit)
#
# CONFIG_ACENIC is not set
# CONFIG_DL2K is not set
# CONFIG_MYRI_SBUS is not set
# CONFIG_NS83820 is not set
# CONFIG_HAMACHI is not set
# CONFIG_YELLOWFIN is not set
# CONFIG_SK98LIN is not set
# CONFIG_FDDI is not set
# CONFIG_HIPPI is not set
# CONFIG_PLIP is not set
# CONFIG_PPP is not set
# CONFIG_SLIP is not set

#
# Wireless LAN (non-hamradio)
#
# CONFIG_NET_RADIO is not set

#
# Token Ring devices
#
# CONFIG_TR is not set
# CONFIG_NET_FC is not set
# CONFIG_RCPCI is not set
# CONFIG_SHAPER is not set

#
# Wan interfaces
#
# CONFIG_WAN is not set

#
# Amateur Radio support
#
# CONFIG_HAMRADIO is not set

#
# IrDA (infrared) support
#
# CONFIG_IRDA is not set

#
# ISDN subsystem
#
# CONFIG_ISDN is not set

#
# Old CD-ROM drivers (not SCSI, not IDE)
#
# CONFIG_CD_NO_IDESCSI is not set

#
# Console drivers
#
# CONFIG_VGA_CONSOLE is not set

#
# Frame-buffer support
#
# CONFIG_FB is not set

#
# Input core support
#
# CONFIG_INPUT is not set
# CONFIG_INPUT_KEYBDEV is not set
# CONFIG_INPUT_MOUSEDEV is not set
# CONFIG_INPUT_JOYDEV is not set
# CONFIG_INPUT_EVDEV is not set

#
# Macintosh device drivers
#

#
# Character devices
#
CONFIG_VT=y
CONFIG_VT_CONSOLE=y
CONFIG_SERIAL=y
CONFIG_SERIAL_CONSOLE=y
# CONFIG_SERIAL_EXTENDED is not set
# CONFIG_SERIAL_NONSTANDARD is not set
CONFIG_UNIX98_PTYS=y
CONFIG_UNIX98_PTY_COUNT=256

#
# I2C support
#
# CONFIG_I2C is not set

#
# Mice
#
# CONFIG_BUSMOUSE is not set
# CONFIG_MOUSE is not set

#
# Joysticks
#
# CONFIG_INPUT_GAMEPORT is not set

#
# Input core support is needed for gameports
#

#
# Input core support is needed for joysticks
#
# CONFIG_QIC02_TAPE is not set

#
# Watchdog Cards
#
# CONFIG_WATCHDOG is not set
# CONFIG_INTEL_RNG is not set
# CONFIG_NVRAM is not set
# CONFIG_RTC is not set
# CONFIG_DTLK is not set
# CONFIG_R3964 is not set
# CONFIG_APPLICOM is not set

#
# Ftape, the floppy tape device driver
#
# CONFIG_FTAPE is not set
# CONFIG_AGP is not set
# CONFIG_DRM is not set

#
# Multimedia devices
#
# CONFIG_VIDEO_DEV is not set

#
# File systems
#
# CONFIG_QUOTA is not set
# CONFIG_AUTOFS_FS is not set
# CONFIG_AUTOFS4_FS is not set
# CONFIG_REISERFS_FS is not set
# CONFIG_REISERFS_CHECK is not set
# CONFIG_REISERFS_PROC_INFO is not set
# CONFIG_ADFS_FS is not set
# CONFIG_ADFS_FS_RW is not set
# CONFIG_AFFS_FS is not set
# CONFIG_HFS_FS is not set
# CONFIG_BFS_FS is not set
# CONFIG_EXT3_FS is not set
# CONFIG_JBD is not set
# CONFIG_JBD_DEBUG is not set
# CONFIG_FAT_FS is not set
# CONFIG_MSDOS_FS is not set
# CONFIG_UMSDOS_FS is not set
# CONFIG_VFAT_FS is not set
# CONFIG_EFS_FS is not set
# CONFIG_JFFS_FS is not set
# CONFIG_JFFS2_FS is not set
# CONFIG_CRAMFS is not set
CONFIG_TMPFS=y
# CONFIG_RAMFS is not set
CONFIG_ISO9660_FS=y
# CONFIG_JOLIET is not set
# CONFIG_ZISOFS is not set
# CONFIG_MINIX_FS is not set
# CONFIG_VXFS_FS is not set
# CONFIG_NTFS_FS is not set
# CONFIG_NTFS_RW is not set
# CONFIG_HPFS_FS is not set
CONFIG_PROC_FS=y
CONFIG_DEVFS_FS=y
# CONFIG_DEVFS_MOUNT is not set
# CONFIG_DEVFS_DEBUG is not set
CONFIG_DEVPTS_FS=y
# CONFIG_QNX4FS_FS is not set
# CONFIG_QNX4FS_RW is not set
# CONFIG_ROMFS_FS is not set
CONFIG_EXT2_FS=y
# CONFIG_SYSV_FS is not set
# CONFIG_UDF_FS is not set
# CONFIG_UDF_RW is not set
# CONFIG_UFS_FS is not set
# CONFIG_UFS_FS_WRITE is not set

#
# Network File Systems
#
# CONFIG_CODA_FS is not set
# CONFIG_INTERMEZZO_FS is not set
CONFIG_NFS_FS=y
# CONFIG_NFS_V3 is not set
# CONFIG_ROOT_NFS is not set
CONFIG_NFSD=y
# CONFIG_NFSD_V3 is not set
CONFIG_SUNRPC=y
CONFIG_LOCKD=y
# CONFIG_SMB_FS is not set
# CONFIG_NCP_FS is not set
# CONFIG_NCPFS_PACKET_SIGNING is not set
# CONFIG_NCPFS_IOCTL_LOCKING is not set
# CONFIG_NCPFS_STRONG is not set
# CONFIG_NCPFS_NFS_NS is not set
# CONFIG_NCPFS_OS2_NS is not set
# CONFIG_NCPFS_SMALLDOS is not set
# CONFIG_NCPFS_NLS is not set
# CONFIG_NCPFS_EXTRAS is not set
# CONFIG_ZISOFS_FS is not set
# CONFIG_ZLIB_FS_INFLATE is not set

#
# Partition Types
#
CONFIG_PARTITION_ADVANCED=y
# CONFIG_ACORN_PARTITION is not set
# CONFIG_OSF_PARTITION is not set
# CONFIG_AMIGA_PARTITION is not set
# CONFIG_ATARI_PARTITION is not set
# CONFIG_MAC_PARTITION is not set
CONFIG_MSDOS_PARTITION=y
# CONFIG_BSD_DISKLABEL is not set
# CONFIG_MINIX_SUBPARTITION is not set
CONFIG_SOLARIS_X86_PARTITION=y
# CONFIG_UNIXWARE_DISKLABEL is not set
# CONFIG_LDM_PARTITION is not set
# CONFIG_SGI_PARTITION is not set
# CONFIG_ULTRIX_PARTITION is not set
# CONFIG_SUN_PARTITION is not set
# CONFIG_SMB_NLS is not set
# CONFIG_NLS is not set

#
# Sound
#
# CONFIG_SOUND is not set

#
# USB support
#
# CONFIG_USB is not set

#
# USB Controllers
#
# CONFIG_USB_UHCI is not set
# CONFIG_USB_UHCI_ALT is not set
# CONFIG_USB_OHCI is not set

#
# USB Device Class drivers
#
# CONFIG_USB_AUDIO is not set
# CONFIG_USB_BLUETOOTH is not set
# CONFIG_USB_STORAGE is not set
# CONFIG_USB_STORAGE_DEBUG is not set
# CONFIG_USB_STORAGE_DATAFAB is not set
# CONFIG_USB_STORAGE_FREECOM is not set
# CONFIG_USB_STORAGE_ISD200 is not set
# CONFIG_USB_STORAGE_DPCM is not set
# CONFIG_USB_STORAGE_HP8200e is not set
# CONFIG_USB_STORAGE_SDDR09 is not set
# CONFIG_USB_STORAGE_JUMPSHOT is not set
# CONFIG_USB_ACM is not set
# CONFIG_USB_PRINTER is not set

#
# USB Human Interface Devices (HID)
#

#
#   Input core support is needed for USB HID
#

#
# USB Imaging devices
#
# CONFIG_USB_DC2XX is not set
# CONFIG_USB_MDC800 is not set
# CONFIG_USB_SCANNER is not set
# CONFIG_USB_MICROTEK is not set
# CONFIG_USB_HPUSBSCSI is not set

#
# USB Multimedia devices
#

#
#   Video4Linux support is needed for USB Multimedia device support
#

#
# USB Network adaptors
#
# CONFIG_USB_PEGASUS is not set
# CONFIG_USB_KAWETH is not set
# CONFIG_USB_CATC is not set
# CONFIG_USB_CDCETHER is not set
# CONFIG_USB_USBNET is not set

#
# USB port drivers
#
# CONFIG_USB_USS720 is not set

#
# USB Serial Converter support
#
# CONFIG_USB_SERIAL is not set
# CONFIG_USB_SERIAL_GENERIC is not set
# CONFIG_USB_SERIAL_BELKIN is not set
# CONFIG_USB_SERIAL_WHITEHEAT is not set
# CONFIG_USB_SERIAL_DIGI_ACCELEPORT is not set
# CONFIG_USB_SERIAL_EMPEG is not set
# CONFIG_USB_SERIAL_FTDI_SIO is not set
# CONFIG_USB_SERIAL_VISOR is not set
# CONFIG_USB_SERIAL_IR is not set
# CONFIG_USB_SERIAL_EDGEPORT is not set
# CONFIG_USB_SERIAL_KEYSPAN_PDA is not set
# CONFIG_USB_SERIAL_KEYSPAN is not set
# CONFIG_USB_SERIAL_KEYSPAN_USA28 is not set
# CONFIG_USB_SERIAL_KEYSPAN_USA28X is not set
# CONFIG_USB_SERIAL_KEYSPAN_USA28XA is not set
# CONFIG_USB_SERIAL_KEYSPAN_USA28XB is not set
# CONFIG_USB_SERIAL_KEYSPAN_USA19 is not set
# CONFIG_USB_SERIAL_KEYSPAN_USA18X is not set
# CONFIG_USB_SERIAL_KEYSPAN_USA19W is not set
# CONFIG_USB_SERIAL_KEYSPAN_USA49W is not set
# CONFIG_USB_SERIAL_MCT_U232 is not set
# CONFIG_USB_SERIAL_PL2303 is not set
# CONFIG_USB_SERIAL_CYBERJACK is not set
# CONFIG_USB_SERIAL_XIRCOM is not set
# CONFIG_USB_SERIAL_OMNINET is not set

#
# USB Miscellaneous drivers
#
# CONFIG_USB_RIO500 is not set

#
# Bluetooth support
#
# CONFIG_BLUEZ is not set

#
# Kernel hacking
#
CONFIG_MAGIC_SYSRQ=y
# CONFIG_KGDB is not set
CONFIG_XMON=y
#
# Automatically generated make config: don't edit
#
# CONFIG_UID16 is not set
# CONFIG_RWSEM_GENERIC_SPINLOCK is not set
CONFIG_RWSEM_XCHGADD_ALGORITHM=y
CONFIG_HAVE_DEC_LOCK=y

#
# Code maturity level options
#
CONFIG_EXPERIMENTAL=y

#
# Loadable module support
#
CONFIG_MODULES=y
CONFIG_MODVERSIONS=y
CONFIG_KMOD=y

#
# Platform support
#
CONFIG_PPC=y
CONFIG_PPC32=y
CONFIG_6xx=y
# CONFIG_4xx is not set
# CONFIG_POWER3 is not set
# CONFIG_POWER4 is not set
# CONFIG_8xx is not set
# CONFIG_8260 is not set
CONFIG_PPC_STD_MMU=y
CONFIG_ALL_PPC=y
# CONFIG_APUS is not set
# CONFIG_GEMINI is not set
# CONFIG_SMP is not set
CONFIG_ALTIVEC=y
CONFIG_TAU=y
# CONFIG_TAU_INT is not set
# CONFIG_TAU_AVERAGE is not set

#
# General setup
#
# CONFIG_HIGHMEM is not set
# CONFIG_ISA is not set
# CONFIG_EISA is not set
# CONFIG_SBUS is not set
# CONFIG_MCA is not set
CONFIG_PCI=y
CONFIG_NET=y
CONFIG_SYSCTL=y
CONFIG_SYSVIPC=y
# CONFIG_BSD_PROCESS_ACCT is not set
CONFIG_KCORE_ELF=y
CONFIG_BINFMT_ELF=y
CONFIG_KERNEL_ELF=y
CONFIG_BINFMT_MISC=m
CONFIG_PCI_NAMES=y
CONFIG_HOTPLUG=y

#
# PCMCIA/CardBus support
#
CONFIG_PCMCIA=m
CONFIG_CARDBUS=y
CONFIG_I82092=y
CONFIG_I82365=y
CONFIG_TCIC=y

#
# Parallel port support
#
# CONFIG_PARPORT is not set
CONFIG_PPC_RTC=y
CONFIG_PPC601_SYNC_FIX=y
CONFIG_PROC_DEVICETREE=y
CONFIG_PPC_RTAS=y
CONFIG_BOOTX_TEXT=y
# CONFIG_PREP_RESIDUAL is not set
# CONFIG_CMDLINE_BOOL is not set

#
# Memory Technology Devices (MTD)
#
# CONFIG_MTD is not set

#
# Plug and Play configuration
#
# CONFIG_PNP is not set
# CONFIG_ISAPNP is not set

#
# Block devices
#
CONFIG_BLK_DEV_FD=m
# CONFIG_BLK_DEV_XD is not set
# CONFIG_PARIDE is not set
# CONFIG_BLK_CPQ_DA is not set
# CONFIG_BLK_CPQ_CISS_DA is not set
# CONFIG_BLK_DEV_DAC960 is not set
CONFIG_BLK_DEV_LOOP=y
# CONFIG_BLK_DEV_NBD is not set
CONFIG_BLK_DEV_RAM=y
CONFIG_BLK_DEV_RAM_SIZE=4096
CONFIG_BLK_DEV_INITRD=y

#
# Multi-device support (RAID and LVM)
#
# CONFIG_MD is not set
# CONFIG_BLK_DEV_MD is not set
# CONFIG_MD_LINEAR is not set
# CONFIG_MD_RAID0 is not set
# CONFIG_MD_RAID1 is not set
# CONFIG_MD_RAID5 is not set
# CONFIG_MD_MULTIPATH is not set
# CONFIG_BLK_DEV_LVM is not set

#
# Networking options
#
CONFIG_PACKET=y
# CONFIG_PACKET_MMAP is not set
# CONFIG_NETLINK_DEV is not set
CONFIG_NETFILTER=y
# CONFIG_NETFILTER_DEBUG is not set
CONFIG_FILTER=y
CONFIG_UNIX=y
CONFIG_INET=y
CONFIG_IP_MULTICAST=y
# CONFIG_IP_ADVANCED_ROUTER is not set
# CONFIG_IP_PNP is not set
# CONFIG_NET_IPIP is not set
# CONFIG_NET_IPGRE is not set
# CONFIG_IP_MROUTE is not set
# CONFIG_ARPD is not set
# CONFIG_INET_ECN is not set
CONFIG_SYN_COOKIES=y

#
#   IP: Netfilter Configuration
#
CONFIG_IP_NF_CONNTRACK=m
CONFIG_IP_NF_FTP=m
CONFIG_IP_NF_IRC=m
# CONFIG_IP_NF_QUEUE is not set
CONFIG_IP_NF_IPTABLES=m
CONFIG_IP_NF_MATCH_LIMIT=m
CONFIG_IP_NF_MATCH_MAC=m
CONFIG_IP_NF_MATCH_MARK=m
CONFIG_IP_NF_MATCH_MULTIPORT=m
CONFIG_IP_NF_MATCH_TOS=m
CONFIG_IP_NF_MATCH_LENGTH=m
CONFIG_IP_NF_MATCH_TTL=m
CONFIG_IP_NF_MATCH_TCPMSS=m
CONFIG_IP_NF_MATCH_STATE=m
CONFIG_IP_NF_MATCH_UNCLEAN=m
CONFIG_IP_NF_MATCH_OWNER=m
CONFIG_IP_NF_FILTER=m
CONFIG_IP_NF_TARGET_REJECT=m
CONFIG_IP_NF_TARGET_MIRROR=m
CONFIG_IP_NF_NAT=m
CONFIG_IP_NF_NAT_NEEDED=y
CONFIG_IP_NF_TARGET_MASQUERADE=m
CONFIG_IP_NF_TARGET_REDIRECT=m
CONFIG_IP_NF_NAT_SNMP_BASIC=m
CONFIG_IP_NF_NAT_IRC=m
CONFIG_IP_NF_NAT_FTP=m
# CONFIG_IP_NF_MANGLE is not set
# CONFIG_IP_NF_TARGET_LOG is not set
CONFIG_IP_NF_TARGET_TCPMSS=m
CONFIG_IP_NF_COMPAT_IPCHAINS=m
CONFIG_IP_NF_NAT_NEEDED=y
# CONFIG_IP_NF_COMPAT_IPFWADM is not set
# CONFIG_IPV6 is not set
# CONFIG_KHTTPD is not set
# CONFIG_ATM is not set
# CONFIG_VLAN_8021Q is not set

#
#  
#
# CONFIG_IPX is not set
CONFIG_ATALK=m
# CONFIG_DECNET is not set
# CONFIG_BRIDGE is not set
# CONFIG_X25 is not set
# CONFIG_LAPB is not set
# CONFIG_LLC is not set
# CONFIG_NET_DIVERT is not set
# CONFIG_ECONET is not set
# CONFIG_WAN_ROUTER is not set
# CONFIG_NET_FASTROUTE is not set
# CONFIG_NET_HW_FLOWCONTROL is not set

#
# QoS and/or fair queueing
#
# CONFIG_NET_SCHED is not set

#
# ATA/IDE/MFM/RLL support
#
CONFIG_IDE=y

#
# IDE, ATA and ATAPI Block devices
#
CONFIG_BLK_DEV_IDE=y

#
# Please see Documentation/ide.txt for help/info on IDE drives
#
# CONFIG_BLK_DEV_HD_IDE is not set
# CONFIG_BLK_DEV_HD is not set
CONFIG_BLK_DEV_IDEDISK=y
# CONFIG_IDEDISK_MULTI_MODE is not set
# CONFIG_BLK_DEV_IDEDISK_VENDOR is not set
# CONFIG_BLK_DEV_IDEDISK_FUJITSU is not set
# CONFIG_BLK_DEV_IDEDISK_IBM is not set
# CONFIG_BLK_DEV_IDEDISK_MAXTOR is not set
# CONFIG_BLK_DEV_IDEDISK_QUANTUM is not set
# CONFIG_BLK_DEV_IDEDISK_SEAGATE is not set
# CONFIG_BLK_DEV_IDEDISK_WD is not set
# CONFIG_BLK_DEV_COMMERIAL is not set
# CONFIG_BLK_DEV_TIVO is not set
CONFIG_BLK_DEV_IDECS=m
CONFIG_BLK_DEV_IDECD=y
# CONFIG_BLK_DEV_IDETAPE is not set
CONFIG_BLK_DEV_IDEFLOPPY=y
CONFIG_BLK_DEV_IDESCSI=y

#
# IDE chipset support/bugfixes
#
# CONFIG_BLK_DEV_CMD640 is not set
# CONFIG_BLK_DEV_CMD640_ENHANCED is not set
# CONFIG_BLK_DEV_ISAPNP is not set
# CONFIG_BLK_DEV_RZ1000 is not set
CONFIG_BLK_DEV_IDEPCI=y
CONFIG_IDEPCI_SHARE_IRQ=y
CONFIG_BLK_DEV_IDEDMA_PCI=y
CONFIG_BLK_DEV_ADMA=y
# CONFIG_BLK_DEV_OFFBOARD is not set
CONFIG_IDEDMA_PCI_AUTO=y
CONFIG_BLK_DEV_IDEDMA=y
# CONFIG_IDEDMA_PCI_WIP is not set
# CONFIG_IDEDMA_NEW_DRIVE_LISTINGS is not set
# CONFIG_BLK_DEV_AEC62XX is not set
# CONFIG_AEC62XX_TUNING is not set
# CONFIG_BLK_DEV_ALI15X3 is not set
# CONFIG_WDC_ALI15X3 is not set
# CONFIG_BLK_DEV_AMD74XX is not set
# CONFIG_AMD74XX_OVERRIDE is not set
CONFIG_BLK_DEV_CMD64X=y
# CONFIG_BLK_DEV_CY82C693 is not set
# CONFIG_BLK_DEV_CS5530 is not set
# CONFIG_BLK_DEV_HPT34X is not set
# CONFIG_HPT34X_AUTODMA is not set
# CONFIG_BLK_DEV_HPT366 is not set
# CONFIG_BLK_DEV_NS87415 is not set
# CONFIG_BLK_DEV_OPTI621 is not set
# CONFIG_BLK_DEV_PDC202XX is not set
# CONFIG_PDC202XX_BURST is not set
# CONFIG_PDC202XX_FORCE is not set
# CONFIG_BLK_DEV_SVWKS is not set
# CONFIG_BLK_DEV_SIS5513 is not set
# CONFIG_BLK_DEV_SLC90E66 is not set
# CONFIG_BLK_DEV_TRM290 is not set
# CONFIG_BLK_DEV_VIA82CXXX is not set
CONFIG_BLK_DEV_SL82C105=y
CONFIG_BLK_DEV_IDE_PMAC=y
CONFIG_BLK_DEV_IDEDMA_PMAC=y
CONFIG_BLK_DEV_IDEDMA_PMAC_AUTO=y
CONFIG_BLK_DEV_IDEDMA=y
CONFIG_BLK_DEV_IDEPCI=y
# CONFIG_IDE_CHIPSETS is not set
CONFIG_IDEDMA_AUTO=y
# CONFIG_IDEDMA_IVB is not set
# CONFIG_DMA_NONPCI is not set
CONFIG_BLK_DEV_IDE_MODES=y
# CONFIG_BLK_DEV_ATARAID is not set
# CONFIG_BLK_DEV_ATARAID_PDC is not set
# CONFIG_BLK_DEV_ATARAID_HPT is not set

#
# SCSI support
#
CONFIG_SCSI=y

#
# SCSI support type (disk, tape, CD-ROM)
#
CONFIG_BLK_DEV_SD=y
CONFIG_SD_EXTRA_DEVS=40
CONFIG_CHR_DEV_ST=y
# CONFIG_CHR_DEV_OSST is not set
CONFIG_BLK_DEV_SR=y
CONFIG_BLK_DEV_SR_VENDOR=y
CONFIG_SR_EXTRA_DEVS=2
CONFIG_CHR_DEV_SG=y

#
# Some SCSI devices (e.g. CD jukebox) support multiple LUNs
#
# CONFIG_SCSI_DEBUG_QUEUES is not set
# CONFIG_SCSI_MULTI_LUN is not set
CONFIG_SCSI_CONSTANTS=y
# CONFIG_SCSI_LOGGING is not set

#
# SCSI low-level drivers
#
# CONFIG_BLK_DEV_3W_XXXX_RAID is not set
# CONFIG_SCSI_7000FASST is not set
# CONFIG_SCSI_ACARD is not set
# CONFIG_SCSI_AHA152X is not set
# CONFIG_SCSI_AHA1542 is not set
# CONFIG_SCSI_AHA1740 is not set
CONFIG_SCSI_AIC7XXX=m
CONFIG_AIC7XXX_CMDS_PER_DEVICE=253
CONFIG_AIC7XXX_RESET_DELAY_MS=15000
# CONFIG_AIC7XXX_BUILD_FIRMWARE is not set
CONFIG_SCSI_AIC7XXX_OLD=m
# CONFIG_AIC7XXX_OLD_TCQ_ON_BY_DEFAULT is not set
CONFIG_AIC7XXX_OLD_CMDS_PER_DEVICE=8
CONFIG_AIC7XXX_OLD_PROC_STATS=y
# CONFIG_SCSI_DPT_I2O is not set
CONFIG_SCSI_ADVANSYS=m
# CONFIG_SCSI_IN2000 is not set
# CONFIG_SCSI_AM53C974 is not set
# CONFIG_SCSI_MEGARAID is not set
# CONFIG_SCSI_BUSLOGIC is not set
# CONFIG_SCSI_CPQFCTS is not set
# CONFIG_SCSI_DMX3191D is not set
# CONFIG_SCSI_DTC3280 is not set
# CONFIG_SCSI_EATA is not set
# CONFIG_SCSI_EATA_DMA is not set
# CONFIG_SCSI_EATA_PIO is not set
# CONFIG_SCSI_FUTURE_DOMAIN is not set
# CONFIG_SCSI_GDTH is not set
# CONFIG_SCSI_GENERIC_NCR5380 is not set
# CONFIG_SCSI_INITIO is not set
# CONFIG_SCSI_INIA100 is not set
# CONFIG_SCSI_NCR53C406A is not set
# CONFIG_SCSI_NCR53C7xx is not set
CONFIG_SCSI_SYM53C8XX_2=y
CONFIG_SCSI_SYM53C8XX_DMA_ADDRESSING_MODE=0
CONFIG_SCSI_SYM53C8XX_DEFAULT_TAGS=16
CONFIG_SCSI_SYM53C8XX_MAX_TAGS=64
# CONFIG_SCSI_SYM53C8XX_IOMAPPED is not set
# CONFIG_SCSI_PAS16 is not set
# CONFIG_SCSI_PCI2000 is not set
# CONFIG_SCSI_PCI2220I is not set
# CONFIG_SCSI_PSI240I is not set
# CONFIG_SCSI_QLOGIC_FAS is not set
# CONFIG_SCSI_QLOGIC_ISP is not set
# CONFIG_SCSI_QLOGIC_FC is not set
# CONFIG_SCSI_QLOGIC_1280 is not set
# CONFIG_SCSI_SIM710 is not set
# CONFIG_SCSI_SYM53C416 is not set
# CONFIG_SCSI_DC390T is not set
# CONFIG_SCSI_T128 is not set
# CONFIG_SCSI_U14_34F is not set
# CONFIG_SCSI_DEBUG is not set
CONFIG_SCSI_MESH=y
CONFIG_SCSI_MESH_SYNC_RATE=5
CONFIG_SCSI_MAC53C94=y

#
# PCMCIA SCSI adapter support
#
# CONFIG_SCSI_PCMCIA is not set

#
# IEEE 1394 (FireWire) support (EXPERIMENTAL)
#
CONFIG_IEEE1394=m

#
# Device Drivers
#
CONFIG_IEEE1394_PCILYNX=m
# CONFIG_IEEE1394_PCILYNX_LOCALRAM is not set
# CONFIG_IEEE1394_PCILYNX_PORTS is not set
CONFIG_IEEE1394_OHCI1394=m

#
# Protocol Drivers
#
CONFIG_IEEE1394_VIDEO1394=m
CONFIG_IEEE1394_SBP2=m
CONFIG_IEEE1394_RAWIO=m
# CONFIG_IEEE1394_VERBOSEDEBUG is not set

#
# Network device support
#
CONFIG_NETDEVICES=y

#
# ARCnet devices
#
# CONFIG_ARCNET is not set

#
# Appletalk devices
#
# CONFIG_LTPC is not set
# CONFIG_COPS is not set
# CONFIG_IPDDP is not set
# CONFIG_DUMMY is not set
# CONFIG_BONDING is not set
# CONFIG_EQUALIZER is not set
# CONFIG_TUN is not set
# CONFIG_ETHERTAP is not set

#
# Ethernet (10 or 100Mbit)
#
CONFIG_NET_ETHERNET=y
CONFIG_MACE=y
# CONFIG_MACE_AAUI_PORT is not set
CONFIG_BMAC=y
# CONFIG_GMAC is not set
# CONFIG_SUNLANCE is not set
# CONFIG_HAPPYMEAL is not set
# CONFIG_SUNBMAC is not set
# CONFIG_SUNQE is not set
# CONFIG_SUNLANCE is not set
CONFIG_SUNGEM=y
# CONFIG_NET_VENDOR_3COM is not set
# CONFIG_LANCE is not set
# CONFIG_NET_VENDOR_SMC is not set
# CONFIG_NET_VENDOR_RACAL is not set
# CONFIG_HP100 is not set
# CONFIG_NET_ISA is not set
CONFIG_NET_PCI=y
CONFIG_PCNET32=y
# CONFIG_ADAPTEC_STARFIRE is not set
# CONFIG_APRICOT is not set
# CONFIG_CS89x0 is not set
CONFIG_TULIP=y
# CONFIG_TULIP_MWI is not set
CONFIG_TULIP_MMIO=y
CONFIG_DE4X5=m
# CONFIG_DGRS is not set
# CONFIG_DM9102 is not set
# CONFIG_EEPRO100 is not set
# CONFIG_LNE390 is not set
# CONFIG_FEALNX is not set
# CONFIG_NATSEMI is not set
# CONFIG_NE2K_PCI is not set
# CONFIG_NE3210 is not set
# CONFIG_ES3210 is not set
# CONFIG_8139CP is not set
# CONFIG_8139TOO is not set
# CONFIG_8139TOO_PIO is not set
# CONFIG_8139TOO_TUNE_TWISTER is not set
# CONFIG_8139TOO_8129 is not set
# CONFIG_SIS900 is not set
# CONFIG_EPIC100 is not set
# CONFIG_SUNDANCE is not set
# CONFIG_TLAN is not set
# CONFIG_VIA_RHINE is not set
# CONFIG_VIA_RHINE_MMIO is not set
# CONFIG_WINBOND_840 is not set
# CONFIG_NET_POCKET is not set

#
# Ethernet (1000 Mbit)
#
# CONFIG_ACENIC is not set
# CONFIG_DL2K is not set
# CONFIG_MYRI_SBUS is not set
# CONFIG_NS83820 is not set
# CONFIG_HAMACHI is not set
# CONFIG_YELLOWFIN is not set
# CONFIG_SK98LIN is not set
# CONFIG_FDDI is not set
# CONFIG_HIPPI is not set
# CONFIG_PLIP is not set
CONFIG_PPP=y
CONFIG_PPP_MULTILINK=y
# CONFIG_PPP_FILTER is not set
CONFIG_PPP_ASYNC=y
CONFIG_PPP_SYNC_TTY=m
CONFIG_PPP_DEFLATE=y
CONFIG_PPP_BSDCOMP=m
# CONFIG_PPPOE is not set
# CONFIG_SLIP is not set

#
# Wireless LAN (non-hamradio)
#
CONFIG_NET_RADIO=y
# CONFIG_STRIP is not set
# CONFIG_WAVELAN is not set
# CONFIG_ARLAN is not set
# CONFIG_AIRONET4500 is not set
# CONFIG_AIRONET4500_NONCS is not set
# CONFIG_AIRONET4500_PROC is not set
# CONFIG_AIRO is not set
CONFIG_HERMES=m
CONFIG_APPLE_AIRPORT=m
# CONFIG_PLX_HERMES is not set

#
# Wireless Pcmcia cards support
#
CONFIG_PCMCIA_HERMES=m
# CONFIG_AIRO_CS is not set
CONFIG_NET_WIRELESS=y

#
# Token Ring devices
#
# CONFIG_TR is not set
# CONFIG_NET_FC is not set
# CONFIG_RCPCI is not set
# CONFIG_SHAPER is not set

#
# Wan interfaces
#
# CONFIG_WAN is not set

#
# PCMCIA network device support
#
CONFIG_NET_PCMCIA=y
# CONFIG_PCMCIA_3C589 is not set
# CONFIG_PCMCIA_3C574 is not set
# CONFIG_PCMCIA_FMVJ18X is not set
# CONFIG_PCMCIA_PCNET is not set
# CONFIG_PCMCIA_AXNET is not set
# CONFIG_PCMCIA_NMCLAN is not set
# CONFIG_PCMCIA_SMC91C92 is not set
# CONFIG_PCMCIA_XIRC2PS is not set
# CONFIG_ARCNET_COM20020_CS is not set
# CONFIG_PCMCIA_IBMTR is not set
# CONFIG_PCMCIA_XIRCOM is not set
# CONFIG_PCMCIA_XIRTULIP is not set
CONFIG_NET_PCMCIA_RADIO=y
# CONFIG_PCMCIA_RAYCS is not set
# CONFIG_PCMCIA_NETWAVE is not set
# CONFIG_PCMCIA_WAVELAN is not set
# CONFIG_AIRONET4500_CS is not set

#
# Amateur Radio support
#
# CONFIG_HAMRADIO is not set

#
# IrDA (infrared) support
#
CONFIG_IRDA=m

#
# IrDA protocols
#
CONFIG_IRLAN=m
CONFIG_IRNET=m
CONFIG_IRCOMM=m
# CONFIG_IRDA_ULTRA is not set
# CONFIG_IRDA_OPTIONS is not set

#
# Infrared-port device drivers
#

#
# SIR device drivers
#
CONFIG_IRTTY_SIR=m
# CONFIG_IRPORT_SIR is not set

#
# Dongle support
#
# CONFIG_DONGLE is not set

#
# FIR device drivers
#
# CONFIG_USB_IRDA is not set
# CONFIG_NSC_FIR is not set
# CONFIG_WINBOND_FIR is not set
# CONFIG_TOSHIBA_FIR is not set
# CONFIG_SMC_IRCC_FIR is not set
# CONFIG_ALI_FIR is not set
# CONFIG_VLSI_FIR is not set

#
# ISDN subsystem
#
# CONFIG_ISDN is not set

#
# Old CD-ROM drivers (not SCSI, not IDE)
#
# CONFIG_CD_NO_IDESCSI is not set

#
# Console drivers
#
# CONFIG_VGA_CONSOLE is not set

#
# Frame-buffer support
#
CONFIG_FB=y
CONFIG_DUMMY_CONSOLE=y
# CONFIG_FB_RIVA is not set
# CONFIG_FB_CLGEN is not set
# CONFIG_FB_PM2 is not set
# CONFIG_FB_CYBER2000 is not set
CONFIG_FB_OF=y
CONFIG_FB_CONTROL=y
CONFIG_FB_PLATINUM=y
CONFIG_FB_VALKYRIE=y
CONFIG_FB_CT65550=y
CONFIG_FB_IMSTT=y
# CONFIG_FB_S3TRIO is not set
# CONFIG_FB_VGA16 is not set
CONFIG_FB_MATROX=y
CONFIG_FB_MATROX_MILLENIUM=y
CONFIG_FB_MATROX_MYSTIQUE=y
# CONFIG_FB_MATROX_G100 is not set
# CONFIG_FB_MATROX_I2C is not set
# CONFIG_FB_MATROX_G450 is not set
# CONFIG_FB_MATROX_MULTIHEAD is not set
CONFIG_FB_ATY=y
CONFIG_FB_ATY_GX=y
CONFIG_FB_ATY_CT=y
CONFIG_FB_RADEON=y
CONFIG_FB_ATY128=y
# CONFIG_FB_SIS is not set
CONFIG_FB_3DFX=y
# CONFIG_FB_VOODOO1 is not set
# CONFIG_FB_VIRTUAL is not set
# CONFIG_FBCON_ADVANCED is not set
CONFIG_FBCON_CFB8=y
CONFIG_FBCON_CFB16=y
CONFIG_FBCON_CFB24=y
CONFIG_FBCON_CFB32=y
# CONFIG_FBCON_FONTWIDTH8_ONLY is not set
CONFIG_FBCON_FONTS=y
# CONFIG_FONT_8x8 is not set
CONFIG_FONT_8x16=y
CONFIG_FONT_SUN8x16=y
CONFIG_FONT_SUN12x22=y
# CONFIG_FONT_6x11 is not set
# CONFIG_FONT_PEARL_8x8 is not set
# CONFIG_FONT_ACORN_8x8 is not set
CONFIG_FB_COMPAT_XPMAC=y

#
# Input core support
#
CONFIG_INPUT=y
CONFIG_INPUT_KEYBDEV=y
CONFIG_INPUT_MOUSEDEV=y
CONFIG_INPUT_MOUSEDEV_SCREEN_X=1024
CONFIG_INPUT_MOUSEDEV_SCREEN_Y=768
# CONFIG_INPUT_JOYDEV is not set
CONFIG_INPUT_EVDEV=y

#
# Macintosh device drivers
#
CONFIG_ADB_CUDA=y
CONFIG_ADB_PMU=y
CONFIG_PMAC_PBOOK=y
CONFIG_PM=y
CONFIG_PMAC_APM_EMU=y
CONFIG_PMAC_BACKLIGHT=y
CONFIG_MAC_FLOPPY=y
CONFIG_MAC_SERIAL=y
# CONFIG_SERIAL_CONSOLE is not set
CONFIG_ADB=y
CONFIG_ADB_MACIO=y
CONFIG_INPUT_ADBHID=y
CONFIG_MAC_ADBKEYCODES=y
CONFIG_MAC_EMUMOUSEBTN=y
CONFIG_MAC_HID=y
# CONFIG_ANSLCD is not set

#
# Character devices
#
CONFIG_VT=y
CONFIG_VT_CONSOLE=y
CONFIG_SERIAL=m
# CONFIG_SERIAL_EXTENDED is not set
# CONFIG_SERIAL_NONSTANDARD is not set
CONFIG_UNIX98_PTYS=y
CONFIG_UNIX98_PTY_COUNT=256

#
# I2C support
#
CONFIG_I2C=m
# CONFIG_I2C_ALGOBIT is not set
# CONFIG_I2C_ALGOPCF is not set
CONFIG_I2C_KEYWEST=m
CONFIG_I2C_CHARDEV=m
CONFIG_I2C_PROC=m

#
# Mice
#
CONFIG_BUSMOUSE=y
# CONFIG_ATIXL_BUSMOUSE is not set
# CONFIG_LOGIBUSMOUSE is not set
# CONFIG_MS_BUSMOUSE is not set
CONFIG_MOUSE=y
CONFIG_PSMOUSE=y
# CONFIG_82C710_MOUSE is not set
# CONFIG_PC110_PAD is not set

#
# Joysticks
#
# CONFIG_INPUT_GAMEPORT is not set
# CONFIG_INPUT_NS558 is not set
# CONFIG_INPUT_LIGHTNING is not set
# CONFIG_INPUT_PCIGAME is not set
# CONFIG_INPUT_CS461X is not set
# CONFIG_INPUT_EMU10K1 is not set
# CONFIG_INPUT_SERIO is not set
# CONFIG_INPUT_SERPORT is not set

#
# Joysticks
#
# CONFIG_INPUT_ANALOG is not set
# CONFIG_INPUT_A3D is not set
# CONFIG_INPUT_ADI is not set
# CONFIG_INPUT_COBRA is not set
# CONFIG_INPUT_GF2K is not set
# CONFIG_INPUT_GRIP is not set
# CONFIG_INPUT_INTERACT is not set
# CONFIG_INPUT_TMDC is not set
# CONFIG_INPUT_SIDEWINDER is not set
# CONFIG_INPUT_IFORCE_USB is not set
# CONFIG_INPUT_IFORCE_232 is not set
# CONFIG_INPUT_WARRIOR is not set
# CONFIG_INPUT_MAGELLAN is not set
# CONFIG_INPUT_SPACEORB is not set
# CONFIG_INPUT_SPACEBALL is not set
# CONFIG_INPUT_STINGER is not set
# CONFIG_INPUT_DB9 is not set
# CONFIG_INPUT_GAMECON is not set
# CONFIG_INPUT_TURBOGRAFX is not set
# CONFIG_QIC02_TAPE is not set

#
# Watchdog Cards
#
# CONFIG_WATCHDOG is not set
# CONFIG_INTEL_RNG is not set
CONFIG_NVRAM=y
# CONFIG_RTC is not set
# CONFIG_DTLK is not set
# CONFIG_R3964 is not set
# CONFIG_APPLICOM is not set

#
# Ftape, the floppy tape device driver
#
# CONFIG_FTAPE is not set
# CONFIG_AGP is not set
# CONFIG_DRM is not set

#
# PCMCIA character devices
#
# CONFIG_PCMCIA_SERIAL_CS is not set

#
# Multimedia devices
#
# CONFIG_VIDEO_DEV is not set

#
# File systems
#
# CONFIG_QUOTA is not set
# CONFIG_AUTOFS_FS is not set
# CONFIG_AUTOFS4_FS is not set
# CONFIG_REISERFS_FS is not set
# CONFIG_REISERFS_CHECK is not set
# CONFIG_REISERFS_PROC_INFO is not set
# CONFIG_ADFS_FS is not set
# CONFIG_ADFS_FS_RW is not set
# CONFIG_AFFS_FS is not set
CONFIG_HFS_FS=m
# CONFIG_BFS_FS is not set
CONFIG_EXT3_FS=y
CONFIG_JBD=y
# CONFIG_JBD_DEBUG is not set
CONFIG_FAT_FS=m
CONFIG_MSDOS_FS=m
# CONFIG_UMSDOS_FS is not set
CONFIG_VFAT_FS=m
# CONFIG_EFS_FS is not set
# CONFIG_JFFS_FS is not set
# CONFIG_JFFS2_FS is not set
# CONFIG_CRAMFS is not set
CONFIG_TMPFS=y
# CONFIG_RAMFS is not set
CONFIG_ISO9660_FS=y
# CONFIG_JOLIET is not set
# CONFIG_ZISOFS is not set
# CONFIG_MINIX_FS is not set
# CONFIG_VXFS_FS is not set
# CONFIG_NTFS_FS is not set
# CONFIG_NTFS_RW is not set
# CONFIG_HPFS_FS is not set
CONFIG_PROC_FS=y
CONFIG_DEVFS_FS=y
# CONFIG_DEVFS_MOUNT is not set
# CONFIG_DEVFS_DEBUG is not set
CONFIG_DEVPTS_FS=y
# CONFIG_QNX4FS_FS is not set
# CONFIG_QNX4FS_RW is not set
# CONFIG_ROMFS_FS is not set
CONFIG_EXT2_FS=y
# CONFIG_SYSV_FS is not set
# CONFIG_UDF_FS is not set
# CONFIG_UDF_RW is not set
# CONFIG_UFS_FS is not set
# CONFIG_UFS_FS_WRITE is not set

#
# Network File Systems
#
# CONFIG_CODA_FS is not set
# CONFIG_INTERMEZZO_FS is not set
CONFIG_NFS_FS=y
# CONFIG_NFS_V3 is not set
# CONFIG_ROOT_NFS is not set
CONFIG_NFSD=y
# CONFIG_NFSD_V3 is not set
CONFIG_SUNRPC=y
CONFIG_LOCKD=y
CONFIG_SMB_FS=m
# CONFIG_SMB_NLS_DEFAULT is not set
# CONFIG_NCP_FS is not set
# CONFIG_NCPFS_PACKET_SIGNING is not set
# CONFIG_NCPFS_IOCTL_LOCKING is not set
# CONFIG_NCPFS_STRONG is not set
# CONFIG_NCPFS_NFS_NS is not set
# CONFIG_NCPFS_OS2_NS is not set
# CONFIG_NCPFS_SMALLDOS is not set
# CONFIG_NCPFS_NLS is not set
# CONFIG_NCPFS_EXTRAS is not set
# CONFIG_ZISOFS_FS is not set
# CONFIG_ZLIB_FS_INFLATE is not set

#
# Partition Types
#
CONFIG_PARTITION_ADVANCED=y
# CONFIG_ACORN_PARTITION is not set
# CONFIG_OSF_PARTITION is not set
# CONFIG_AMIGA_PARTITION is not set
# CONFIG_ATARI_PARTITION is not set
CONFIG_MAC_PARTITION=y
CONFIG_MSDOS_PARTITION=y
# CONFIG_BSD_DISKLABEL is not set
# CONFIG_MINIX_SUBPARTITION is not set
# CONFIG_SOLARIS_X86_PARTITION is not set
# CONFIG_UNIXWARE_DISKLABEL is not set
# CONFIG_LDM_PARTITION is not set
# CONFIG_SGI_PARTITION is not set
# CONFIG_ULTRIX_PARTITION is not set
# CONFIG_SUN_PARTITION is not set
CONFIG_SMB_NLS=y
CONFIG_NLS=y

#
# Native Language Support
#
CONFIG_NLS_DEFAULT="iso8859-1"
# CONFIG_NLS_CODEPAGE_437 is not set
# CONFIG_NLS_CODEPAGE_737 is not set
# CONFIG_NLS_CODEPAGE_775 is not set
# CONFIG_NLS_CODEPAGE_850 is not set
# CONFIG_NLS_CODEPAGE_852 is not set
# CONFIG_NLS_CODEPAGE_855 is not set
# CONFIG_NLS_CODEPAGE_857 is not set
# CONFIG_NLS_CODEPAGE_860 is not set
# CONFIG_NLS_CODEPAGE_861 is not set
# CONFIG_NLS_CODEPAGE_862 is not set
# CONFIG_NLS_CODEPAGE_863 is not set
# CONFIG_NLS_CODEPAGE_864 is not set
# CONFIG_NLS_CODEPAGE_865 is not set
# CONFIG_NLS_CODEPAGE_866 is not set
# CONFIG_NLS_CODEPAGE_869 is not set
# CONFIG_NLS_CODEPAGE_936 is not set
# CONFIG_NLS_CODEPAGE_950 is not set
# CONFIG_NLS_CODEPAGE_932 is not set
# CONFIG_NLS_CODEPAGE_949 is not set
# CONFIG_NLS_CODEPAGE_874 is not set
# CONFIG_NLS_ISO8859_8 is not set
# CONFIG_NLS_CODEPAGE_1251 is not set
CONFIG_NLS_ISO8859_1=m
# CONFIG_NLS_ISO8859_2 is not set
# CONFIG_NLS_ISO8859_3 is not set
# CONFIG_NLS_ISO8859_4 is not set
# CONFIG_NLS_ISO8859_5 is not set
# CONFIG_NLS_ISO8859_6 is not set
# CONFIG_NLS_ISO8859_7 is not set
# CONFIG_NLS_ISO8859_9 is not set
# CONFIG_NLS_ISO8859_13 is not set
# CONFIG_NLS_ISO8859_14 is not set
# CONFIG_NLS_ISO8859_15 is not set
# CONFIG_NLS_KOI8_R is not set
# CONFIG_NLS_KOI8_U is not set
# CONFIG_NLS_UTF8 is not set

#
# Sound
#
CONFIG_SOUND=m
CONFIG_DMASOUND_PMAC=m
CONFIG_DMASOUND=m
CONFIG_I2C=m
CONFIG_I2C_KEYWEST=m
# CONFIG_SOUND_BT878 is not set
# CONFIG_SOUND_CMPCI is not set
# CONFIG_SOUND_EMU10K1 is not set
# CONFIG_MIDI_EMU10K1 is not set
# CONFIG_SOUND_FUSION is not set
# CONFIG_SOUND_CS4281 is not set
# CONFIG_SOUND_ES1370 is not set
# CONFIG_SOUND_ES1371 is not set
# CONFIG_SOUND_ESSSOLO1 is not set
# CONFIG_SOUND_MAESTRO is not set
# CONFIG_SOUND_MAESTRO3 is not set
# CONFIG_SOUND_ICH is not set
# CONFIG_SOUND_RME96XX is not set
# CONFIG_SOUND_SONICVIBES is not set
# CONFIG_SOUND_TRIDENT is not set
# CONFIG_SOUND_MSNDCLAS is not set
# CONFIG_SOUND_MSNDPIN is not set
# CONFIG_SOUND_VIA82CXXX is not set
# CONFIG_MIDI_VIA82CXXX is not set
# CONFIG_SOUND_OSS is not set
# CONFIG_SOUND_TVMIXER is not set

#
# USB support
#
CONFIG_USB=y
# CONFIG_USB_DEBUG is not set

#
# Miscellaneous USB options
#
CONFIG_USB_DEVICEFS=y
# CONFIG_USB_BANDWIDTH is not set
# CONFIG_USB_LONG_TIMEOUT is not set

#
# USB Controllers
#
# CONFIG_USB_UHCI is not set
# CONFIG_USB_UHCI_ALT is not set
CONFIG_USB_OHCI=y

#
# USB Device Class drivers
#
# CONFIG_USB_AUDIO is not set
# CONFIG_USB_BLUETOOTH is not set
# CONFIG_USB_STORAGE is not set
# CONFIG_USB_STORAGE_DEBUG is not set
# CONFIG_USB_STORAGE_DATAFAB is not set
# CONFIG_USB_STORAGE_FREECOM is not set
# CONFIG_USB_STORAGE_ISD200 is not set
# CONFIG_USB_STORAGE_DPCM is not set
# CONFIG_USB_STORAGE_HP8200e is not set
# CONFIG_USB_STORAGE_SDDR09 is not set
# CONFIG_USB_STORAGE_JUMPSHOT is not set
CONFIG_USB_ACM=m
CONFIG_USB_PRINTER=m

#
# USB Human Interface Devices (HID)
#
CONFIG_USB_HID=y
# CONFIG_USB_HIDDEV is not set
# CONFIG_USB_WACOM is not set

#
# USB Imaging devices
#
# CONFIG_USB_DC2XX is not set
# CONFIG_USB_MDC800 is not set
CONFIG_USB_SCANNER=m
# CONFIG_USB_MICROTEK is not set
# CONFIG_USB_HPUSBSCSI is not set

#
# USB Multimedia devices
#

#
#   Video4Linux support is needed for USB Multimedia device support
#

#
# USB Network adaptors
#
# CONFIG_USB_PEGASUS is not set
# CONFIG_USB_KAWETH is not set
# CONFIG_USB_CATC is not set
# CONFIG_USB_CDCETHER is not set
# CONFIG_USB_USBNET is not set

#
# USB port drivers
#
# CONFIG_USB_USS720 is not set

#
# USB Serial Converter support
#
CONFIG_USB_SERIAL=m
# CONFIG_USB_SERIAL_GENERIC is not set
# CONFIG_USB_SERIAL_BELKIN is not set
# CONFIG_USB_SERIAL_WHITEHEAT is not set
# CONFIG_USB_SERIAL_DIGI_ACCELEPORT is not set
# CONFIG_USB_SERIAL_EMPEG is not set
# CONFIG_USB_SERIAL_FTDI_SIO is not set
CONFIG_USB_SERIAL_VISOR=m
# CONFIG_USB_SERIAL_IR is not set
# CONFIG_USB_SERIAL_EDGEPORT is not set
# CONFIG_USB_SERIAL_KEYSPAN_PDA is not set
# CONFIG_USB_SERIAL_KEYSPAN is not set
# CONFIG_USB_SERIAL_KEYSPAN_USA28 is not set
# CONFIG_USB_SERIAL_KEYSPAN_USA28X is not set
# CONFIG_USB_SERIAL_KEYSPAN_USA28XA is not set
# CONFIG_USB_SERIAL_KEYSPAN_USA28XB is not set
# CONFIG_USB_SERIAL_KEYSPAN_USA19 is not set
# CONFIG_USB_SERIAL_KEYSPAN_USA18X is not set
# CONFIG_USB_SERIAL_KEYSPAN_USA19W is not set
# CONFIG_USB_SERIAL_KEYSPAN_USA49W is not set
# CONFIG_USB_SERIAL_MCT_U232 is not set
# CONFIG_USB_SERIAL_PL2303 is not set
# CONFIG_USB_SERIAL_CYBERJACK is not set
# CONFIG_USB_SERIAL_XIRCOM is not set
# CONFIG_USB_SERIAL_OMNINET is not set

#
# USB Miscellaneous drivers
#
# CONFIG_USB_RIO500 is not set

#
# Bluetooth support
#
# CONFIG_BLUEZ is not set

#
# Kernel hacking
#
CONFIG_MAGIC_SYSRQ=y
# CONFIG_KGDB is not set
CONFIG_XMON=y
# BK Id: SCCS/s.Makefile 1.5 05/21/01 00:48:24 cort
#
#
# Makefile for Linux arch/m68k/amiga source directory
#
# Note! Dependencies are done automagically by 'make dep', which also
# removes any old dependencies. DON'T put your own dependencies here
# unless it's something special (ie not a .c file).
#
# Note 2! The CFLAGS definitions are now in the main makefile...

O_TARGET := amiga.o

export-objs	:= amiga_ksyms.o

obj-y		:= config.o amiints.o cia.o time.o bootinfo.o amisound.o \
			chipram.o amiga_ksyms.o

obj-$(CONFIG_AMIGA_PCMCIA) += pcmcia.o

include $(TOPDIR)/Rules.make
/*
 * BK Id: SCCS/s.amiga_ksyms.c 1.5 05/17/01 18:14:20 cort
 */
#include "../../m68k/amiga/amiga_ksyms.c"
/*
 * BK Id: SCCS/s.amiints.c 1.8 05/21/01 00:48:24 cort
 */
/*
 * linux/arch/m68k/amiga/amiints.c -- Amiga Linux interrupt handling code
 *
 * This file is subject to the terms and conditions of the GNU General Public
 * License.  See the file COPYING in the main directory of this archive
 * for more details.
 *
 * 11/07/96: rewritten interrupt handling, irq lists are exists now only for
 *           this sources where it makes sense (VERTB/PORTS/EXTER) and you must
 *           be careful that dev_id for this sources is unique since this the
 *           only possibility to distinguish between different handlers for
 *           free_irq. irq lists also have different irq flags:
 *           - IRQ_FLG_FAST: handler is inserted at top of list (after other
 *                           fast handlers)
 *           - IRQ_FLG_SLOW: handler is inserted at bottom of list and before
 *                           they're executed irq level is set to the previous
 *                           one, but handlers don't need to be reentrant, if
 *                           reentrance occurred, slow handlers will be just
 *                           called again.
 *           The whole interrupt handling for CIAs is moved to cia.c
 *           /Roman Zippel
 *
 * 07/08/99: rewamp of the interrupt handling - we now have two types of
 *           interrupts, normal and fast handlers, fast handlers being
 *           marked with SA_INTERRUPT and runs with all other interrupts
 *           disabled. Normal interrupts disable their own source but
 *           run with all other interrupt sources enabled.
 *           PORTS and EXTER interrupts are always shared even if the
 *           drivers do not explicitly mark this when calling
 *           request_irq which they really should do.
 *           This is similar to the way interrupts are handled on all
 *           other architectures and makes a ton of sense besides
 *           having the advantage of making it easier to share
 *           drivers.
 *           /Jes
 */

#include <linux/config.h>
#include <linux/types.h>
#include <linux/kernel.h>
#include <linux/sched.h>
#include <linux/kernel_stat.h>
#include <linux/init.h>

#include <asm/system.h>
#include <asm/irq.h>
#include <asm/traps.h>
#include <asm/amigahw.h>
#include <asm/amigaints.h>
#include <asm/amipcmcia.h>

#ifdef CONFIG_APUS
#include <asm/amigappc.h>
#endif

extern int cia_request_irq(int irq,
                           void (*handler)(int, void *, struct pt_regs *),
                           unsigned long flags, const char *devname, void *dev_id);
extern void cia_free_irq(unsigned int irq, void *dev_id);
extern void cia_init_IRQ(struct ciabase *base);
extern int cia_get_irq_list(struct ciabase *base, char *buf);

/* irq node variables for amiga interrupt sources */
static irq_node_t *ami_irq_list[AMI_STD_IRQS];

unsigned short ami_intena_vals[AMI_STD_IRQS] = {
	IF_VERTB, IF_COPER, IF_AUD0, IF_AUD1, IF_AUD2, IF_AUD3, IF_BLIT,
	IF_DSKSYN, IF_DSKBLK, IF_RBF, IF_TBE, IF_SOFT, IF_PORTS, IF_EXTER
};
static const unsigned char ami_servers[AMI_STD_IRQS] = {
	1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1
};

static short ami_ablecount[AMI_IRQS];

static void ami_badint(int irq, void *dev_id, struct pt_regs *fp)
{
	num_spurious += 1;
}

/*
 * void amiga_init_IRQ(void)
 *
 * Parameters:	None
 *
 * Returns:	Nothing
 *
 * This function should be called during kernel startup to initialize
 * the amiga IRQ handling routines.
 */

__init
void amiga_init_IRQ(void)
{
	int i;

	/* initialize handlers */
	for (i = 0; i < AMI_STD_IRQS; i++) {
		if (ami_servers[i]) {
			ami_irq_list[i] = NULL;
		} else {
			ami_irq_list[i] = new_irq_node();
			ami_irq_list[i]->handler = ami_badint;
			ami_irq_list[i]->flags   = 0;
			ami_irq_list[i]->dev_id  = NULL;
			ami_irq_list[i]->devname = NULL;
			ami_irq_list[i]->next    = NULL;
		}
	}
	for (i = 0; i < AMI_IRQS; i++)
		ami_ablecount[i] = 0;

	/* turn off PCMCIA interrupts */
	if (AMIGAHW_PRESENT(PCMCIA))
		pcmcia_disable_irq();

	/* turn off all interrupts... */
	custom.intena = 0x7fff;
	custom.intreq = 0x7fff;

#ifdef CONFIG_APUS
	/* Clear any inter-CPU interrupt requests. Circumvents bug in
           Blizzard IPL emulation HW (or so it appears). */
	APUS_WRITE(APUS_INT_LVL, INTLVL_SETRESET | INTLVL_MASK);

	/* Init IPL emulation. */
	APUS_WRITE(APUS_REG_INT, REGINT_INTMASTER | REGINT_ENABLEIPL);
	APUS_WRITE(APUS_IPL_EMU, IPLEMU_DISABLEINT);
	APUS_WRITE(APUS_IPL_EMU, IPLEMU_SETRESET | IPLEMU_IPLMASK);
#endif
	/* ... and enable the master interrupt bit */
	custom.intena = IF_SETCLR | IF_INTEN;

	cia_init_IRQ(&ciaa_base);
	cia_init_IRQ(&ciab_base);
}

static inline int amiga_insert_irq(irq_node_t **list, irq_node_t *node)
{
	unsigned long flags;
	irq_node_t *cur;

	if (!node->dev_id)
		printk("%s: Warning: dev_id of %s is zero\n",
		       __FUNCTION__, node->devname);

	save_flags(flags);
	cli();

	cur = *list;

	if (node->flags & SA_INTERRUPT) {
		if (node->flags & SA_SHIRQ)
			return -EBUSY;
		/*
		 * There should never be more than one
		 */
		while (cur && cur->flags & SA_INTERRUPT) {
			list = &cur->next;
			cur = cur->next;
		}
	} else {
		while (cur) {
			list = &cur->next;
			cur = cur->next;
		}
	}

	node->next = cur;
	*list = node;

	restore_flags(flags);
	return 0;
}

static inline void amiga_delete_irq(irq_node_t **list, void *dev_id)
{
	unsigned long flags;
	irq_node_t *node;

	save_flags(flags);
	cli();

	for (node = *list; node; list = &node->next, node = *list) {
		if (node->dev_id == dev_id) {
			*list = node->next;
			/* Mark it as free. */
			node->handler = NULL;
			restore_flags(flags);
			return;
		}
	}
	restore_flags(flags);
	printk ("%s: tried to remove invalid irq\n", __FUNCTION__);
}

/*
 * amiga_request_irq : add an interrupt service routine for a particular
 *                     machine specific interrupt source.
 *                     If the addition was successful, it returns 0.
 */

int amiga_request_irq(unsigned int irq,
		      void (*handler)(int, void *, struct pt_regs *),
                      unsigned long flags, const char *devname, void *dev_id)
{
	irq_node_t *node;
	int error = 0;

	if (irq >= AMI_IRQS) {
		printk ("%s: Unknown IRQ %d from %s\n", __FUNCTION__,
			irq, devname);
		return -ENXIO;
	}

	if (irq >= IRQ_AMIGA_AUTO)
		return sys_request_irq(irq - IRQ_AMIGA_AUTO, handler,
		                       flags, devname, dev_id);

	if (irq >= IRQ_AMIGA_CIAA)
		return cia_request_irq(irq, handler, flags, devname, dev_id);

	/*
	 * IRQ_AMIGA_PORTS & IRQ_AMIGA_EXTER defaults to shared,
	 * we could add a check here for the SA_SHIRQ flag but all drivers
	 * should be aware of sharing anyway.
	 */
	if (ami_servers[irq]) {
		if (!(node = new_irq_node()))
			return -ENOMEM;
		node->handler = handler;
		node->flags   = flags;
		node->dev_id  = dev_id;
		node->devname = devname;
		node->next    = NULL;
		error = amiga_insert_irq(&ami_irq_list[irq], node);
	} else {
		ami_irq_list[irq]->handler = handler;
		ami_irq_list[irq]->flags   = flags;
		ami_irq_list[irq]->dev_id  = dev_id;
		ami_irq_list[irq]->devname = devname;
	}

	/* enable the interrupt */
	if (irq < IRQ_AMIGA_PORTS && !ami_ablecount[irq])
		custom.intena = IF_SETCLR | ami_intena_vals[irq];

	return error;
}

void amiga_free_irq(unsigned int irq, void *dev_id)
{
	if (irq >= AMI_IRQS) {
		printk ("%s: Unknown IRQ %d\n", __FUNCTION__, irq);
		return;
	}

	if (irq >= IRQ_AMIGA_AUTO) {
		sys_free_irq(irq - IRQ_AMIGA_AUTO, dev_id);
		return;
	}
	if (irq >= IRQ_AMIGA_CIAA) {
		cia_free_irq(irq, dev_id);
		return;
	}

	if (ami_servers[irq]) {
		amiga_delete_irq(&ami_irq_list[irq], dev_id);
		/* if server list empty, disable the interrupt */
		if (!ami_irq_list[irq] && irq < IRQ_AMIGA_PORTS)
			custom.intena = ami_intena_vals[irq];
	} else {
		if (ami_irq_list[irq]->dev_id != dev_id)
			printk("%s: removing probably wrong IRQ %d from %s\n",
			       __FUNCTION__, irq, ami_irq_list[irq]->devname);
		ami_irq_list[irq]->handler = ami_badint;
		ami_irq_list[irq]->flags   = 0;
		ami_irq_list[irq]->dev_id  = NULL;
		ami_irq_list[irq]->devname = NULL;
		custom.intena = ami_intena_vals[irq];
	}
}

/*
 * Enable/disable a particular machine specific interrupt source.
 * Note that this may affect other interrupts in case of a shared interrupt.
 * This function should only be called for a _very_ short time to change some
 * internal data, that may not be changed by the interrupt at the same time.
 * ami_(enable|disable)_irq calls may also be nested.
 */

void amiga_enable_irq(unsigned int irq)
{
	if (irq >= AMI_IRQS) {
		printk("%s: Unknown IRQ %d\n", __FUNCTION__, irq);
		return;
	}

	ami_ablecount[irq]--;
	if (ami_ablecount[irq]<0)
		ami_ablecount[irq]=0;
	else if (ami_ablecount[irq])
		return;

	/* No action for auto-vector interrupts */
	if (irq >= IRQ_AMIGA_AUTO){
		printk("%s: Trying to enable auto-vector IRQ %i\n",
		       __FUNCTION__, irq - IRQ_AMIGA_AUTO);
		return;
	}

	if (irq >= IRQ_AMIGA_CIAA) {
		cia_set_irq(irq, 0);
		cia_able_irq(irq, 1);
		return;
	}

	/* enable the interrupt */
	custom.intena = IF_SETCLR | ami_intena_vals[irq];
}

void amiga_disable_irq(unsigned int irq)
{
	if (irq >= AMI_IRQS) {
		printk("%s: Unknown IRQ %d\n", __FUNCTION__, irq);
		return;
	}

	if (ami_ablecount[irq]++)
		return;

	/* No action for auto-vector interrupts */
	if (irq >= IRQ_AMIGA_AUTO) {
		printk("%s: Trying to disable auto-vector IRQ %i\n",
		       __FUNCTION__, irq - IRQ_AMIGA_AUTO);
		return;
	}

	if (irq >= IRQ_AMIGA_CIAA) {
		cia_able_irq(irq, 0);
		return;
	}

	/* disable the interrupt */
	custom.intena = ami_intena_vals[irq];
}

inline void amiga_do_irq(int irq, struct pt_regs *fp)
{
	kstat.irqs[0][SYS_IRQS + irq]++;
	ami_irq_list[irq]->handler(irq, ami_irq_list[irq]->dev_id, fp);
}

void amiga_do_irq_list(int irq, struct pt_regs *fp)
{
	irq_node_t *node;

	kstat.irqs[0][SYS_IRQS + irq]++;

	custom.intreq = ami_intena_vals[irq];

	for (node = ami_irq_list[irq]; node; node = node->next)
		node->handler(irq, node->dev_id, fp);
}

/*
 * The builtin Amiga hardware interrupt handlers.
 */

static void ami_int1(int irq, void *dev_id, struct pt_regs *fp)
{
	unsigned short ints = custom.intreqr & custom.intenar;

	/* if serial transmit buffer empty, interrupt */
	if (ints & IF_TBE) {
		custom.intreq = IF_TBE;
		amiga_do_irq(IRQ_AMIGA_TBE, fp);
	}

	/* if floppy disk transfer complete, interrupt */
	if (ints & IF_DSKBLK) {
		custom.intreq = IF_DSKBLK;
		amiga_do_irq(IRQ_AMIGA_DSKBLK, fp);
	}

	/* if software interrupt set, interrupt */
	if (ints & IF_SOFT) {
		custom.intreq = IF_SOFT;
		amiga_do_irq(IRQ_AMIGA_SOFT, fp);
	}
}

static void ami_int3(int irq, void *dev_id, struct pt_regs *fp)
{
	unsigned short ints = custom.intreqr & custom.intenar;

	/* if a blitter interrupt */
	if (ints & IF_BLIT) {
		custom.intreq = IF_BLIT;
		amiga_do_irq(IRQ_AMIGA_BLIT, fp);
	}

	/* if a copper interrupt */
	if (ints & IF_COPER) {
		custom.intreq = IF_COPER;
		amiga_do_irq(IRQ_AMIGA_COPPER, fp);
	}

	/* if a vertical blank interrupt */
	if (ints & IF_VERTB)
		amiga_do_irq_list(IRQ_AMIGA_VERTB, fp);
}

static void ami_int4(int irq, void *dev_id, struct pt_regs *fp)
{
	unsigned short ints = custom.intreqr & custom.intenar;

	/* if audio 0 interrupt */
	if (ints & IF_AUD0) {
		custom.intreq = IF_AUD0;
		amiga_do_irq(IRQ_AMIGA_AUD0, fp);
	}

	/* if audio 1 interrupt */
	if (ints & IF_AUD1) {
		custom.intreq = IF_AUD1;
		amiga_do_irq(IRQ_AMIGA_AUD1, fp);
	}

	/* if audio 2 interrupt */
	if (ints & IF_AUD2) {
		custom.intreq = IF_AUD2;
		amiga_do_irq(IRQ_AMIGA_AUD2, fp);
	}

	/* if audio 3 interrupt */
	if (ints & IF_AUD3) {
		custom.intreq = IF_AUD3;
		amiga_do_irq(IRQ_AMIGA_AUD3, fp);
	}
}

static void ami_int5(int irq, void *dev_id, struct pt_regs *fp)
{
	unsigned short ints = custom.intreqr & custom.intenar;

	/* if serial receive buffer full interrupt */
	if (ints & IF_RBF) {
		/* acknowledge of IF_RBF must be done by the serial interrupt */
		amiga_do_irq(IRQ_AMIGA_RBF, fp);
	}

	/* if a disk sync interrupt */
	if (ints & IF_DSKSYN) {
		custom.intreq = IF_DSKSYN;
		amiga_do_irq(IRQ_AMIGA_DSKSYN, fp);
	}
}

static void ami_int7(int irq, void *dev_id, struct pt_regs *fp)
{
	panic ("level 7 interrupt received\n");
}

#ifdef CONFIG_APUS
/* The PPC irq handling links all handlers requested on the same vector
   and executes them in a loop. Having ami_badint at the end of the chain
   is a bad idea. */
void (*amiga_default_handler[SYS_IRQS])(int, void *, struct pt_regs *) = {
	NULL, ami_int1, NULL, ami_int3,
	ami_int4, ami_int5, NULL, ami_int7
};
#else
void (*amiga_default_handler[SYS_IRQS])(int, void *, struct pt_regs *) = {
	ami_badint, ami_int1, ami_badint, ami_int3,
	ami_int4, ami_int5, ami_badint, ami_int7
};
#endif

int amiga_get_irq_list(char *buf)
{
	int i, len = 0;
	irq_node_t *node;

	for (i = 0; i < AMI_STD_IRQS; i++) {
		if (!(node = ami_irq_list[i]))
			continue;
		len += sprintf(buf+len, "ami  %2d: %10u ", i,
		               kstat.irqs[0][SYS_IRQS + i]);
		do {
			if (node->flags & SA_INTERRUPT)
				len += sprintf(buf+len, "F ");
			else
				len += sprintf(buf+len, "  ");
			len += sprintf(buf+len, "%s\n", node->devname);
			if ((node = node->next))
				len += sprintf(buf+len, "                    ");
		} while (node);
	}

	len += cia_get_irq_list(&ciaa_base, buf+len);
	len += cia_get_irq_list(&ciab_base, buf+len);
	return len;
}
/*
 * BK Id: SCCS/s.amisound.c 1.5 05/17/01 18:14:20 cort
 */
#include "../../m68k/amiga/amisound.c"
/*
 * BK Id: SCCS/s.bootinfo.c 1.5 05/17/01 18:14:20 cort
 */
/*
 *  linux/arch/ppc/amiga/bootinfo.c
 *
 *  Extracted from arch/m68k/kernel/setup.c.
 *  Should be properly generalized and put somewhere else.
 *                              Jesper
 */

#include <linux/types.h>
#include <linux/kernel.h>
#include <linux/string.h>
#include <linux/init.h>

#include <asm/setup.h>
#include <asm/bootinfo.h>

extern char cmd_line[CL_SIZE];

extern int num_memory;
extern int m68k_realnum_memory;
extern struct mem_info memory[NUM_MEMINFO];
extern struct mem_info m68k_memory[NUM_MEMINFO];
extern struct mem_info ramdisk;

extern int amiga_parse_bootinfo(const struct bi_record *);
extern int atari_parse_bootinfo(const struct bi_record *);
extern int mac_parse_bootinfo(const struct bi_record *);

void __init parse_bootinfo(const struct bi_record *record)
{
    while (record->tag != BI_LAST) {
	int unknown = 0;
	const u_long *data = record->data;
	switch (record->tag) {
	    case BI_MACHTYPE:
	    case BI_CPUTYPE:
	    case BI_FPUTYPE:
	    case BI_MMUTYPE:
		/* Already set up by head.S */
		break;

	    case BI_MEMCHUNK:
		if (num_memory < NUM_MEMINFO) {
		    memory[num_memory].addr = data[0];
		    memory[num_memory].size = data[1];
		    num_memory++;

		    /* FIXME: duplicate for m68k drivers. */
		    m68k_memory[m68k_realnum_memory].addr = data[0];
		    m68k_memory[m68k_realnum_memory].size = data[1];
		    m68k_realnum_memory++;
		} else
		    printk("parse_bootinfo: too many memory chunks\n");
		break;

	    case BI_RAMDISK:
		ramdisk.addr = data[0];
		ramdisk.size = data[1];
		break;

	    case BI_COMMAND_LINE:
		strncpy(cmd_line, (const char *)data, CL_SIZE);
		cmd_line[CL_SIZE-1] = '\0';
		break;

	    default:
		if (MACH_IS_AMIGA)
		    unknown = amiga_parse_bootinfo(record);
		else if (MACH_IS_ATARI)
		    unknown = atari_parse_bootinfo(record);
		else if (MACH_IS_MAC)
		    unknown = mac_parse_bootinfo(record);
		else
		    unknown = 1;
	}
	if (unknown)
	    printk("parse_bootinfo: unknown tag 0x%04x ignored\n",
		   record->tag);
	record = (struct bi_record *)((u_long)record+record->size);
    }
}
/*
 * BK Id: SCCS/s.chipram.c 1.7 05/21/01 00:49:49 cort
 */
#include "../../m68k/amiga/chipram.c"
/*
 * BK Id: SCCS/s.cia.c 1.7 05/21/01 00:48:24 cort
 */
/*
 *  linux/arch/m68k/amiga/cia.c - CIA support
 *
 *  Copyright (C) 1996 Roman Zippel
 *
 *  The concept of some functions bases on the original Amiga OS function
 *
 * This file is subject to the terms and conditions of the GNU General Public
 * License.  See the file COPYING in the main directory of this archive
 * for more details.
 */

#include <linux/types.h>
#include <linux/kernel.h>
#include <linux/sched.h>
#include <linux/errno.h>
#include <linux/kernel_stat.h>
#include <linux/init.h>

#include <asm/irq.h>
#include <asm/amigahw.h>
#include <asm/amigaints.h>

struct ciabase {
	volatile struct CIA *cia;
	u_char icr_mask, icr_data;
	u_short int_mask;
	int handler_irq, cia_irq, server_irq;
	char *name;
	irq_handler_t irq_list[CIA_IRQS];
} ciaa_base = {
	&ciaa, 0, 0, IF_PORTS,
	IRQ_AMIGA_AUTO_2, IRQ_AMIGA_CIAA,
	IRQ_AMIGA_PORTS,
	"CIAA handler"
}, ciab_base = {
	&ciab, 0, 0, IF_EXTER,
	IRQ_AMIGA_AUTO_6, IRQ_AMIGA_CIAB,
	IRQ_AMIGA_EXTER,
	"CIAB handler"
};

#define CIA_SET_BASE_ADJUST_IRQ(base, irq)	\
do {						\
	if (irq >= IRQ_AMIGA_CIAB) {		\
		base = &ciab_base;		\
		irq -= IRQ_AMIGA_CIAB;		\
	} else {				\
		base = &ciaa_base;		\
		irq -= IRQ_AMIGA_CIAA;		\
	}					\
} while (0)

/*
 *  Cause or clear CIA interrupts, return old interrupt status.
 */

static unsigned char cia_set_irq_private(struct ciabase *base,
					 unsigned char mask)
{
	u_char old;

	old = (base->icr_data |= base->cia->icr);
	if (mask & CIA_ICR_SETCLR)
		base->icr_data |= mask;
	else
		base->icr_data &= ~mask;
	if (base->icr_data & base->icr_mask)
		custom.intreq = IF_SETCLR | base->int_mask;
	return old & base->icr_mask;
}

unsigned char cia_set_irq(unsigned int irq, int set)
{
	struct ciabase *base;
	unsigned char mask;

	if (irq >= IRQ_AMIGA_CIAB)
		mask = (1 << (irq - IRQ_AMIGA_CIAB));
	else
		mask = (1 << (irq - IRQ_AMIGA_CIAA));
	mask |= (set) ? CIA_ICR_SETCLR : 0;

	CIA_SET_BASE_ADJUST_IRQ(base, irq);

	return cia_set_irq_private(base, mask);
}

unsigned char cia_get_irq_mask(unsigned int irq)
{
	struct ciabase *base;

	CIA_SET_BASE_ADJUST_IRQ(base, irq);

	return base->cia->icr;
}

/*
 *  Enable or disable CIA interrupts, return old interrupt mask,
 *  interrupts will only be enabled if a handler exists
 */

static unsigned char cia_able_irq_private(struct ciabase *base,
					  unsigned char mask)
{
	u_char old, tmp;
	int i;

	old = base->icr_mask;
	base->icr_data |= base->cia->icr;
	base->cia->icr = mask;
	if (mask & CIA_ICR_SETCLR)
		base->icr_mask |= mask;
	else
		base->icr_mask &= ~mask;
	base->icr_mask &= CIA_ICR_ALL;
	for (i = 0, tmp = 1; i < CIA_IRQS; i++, tmp <<= 1) {
		if ((tmp & base->icr_mask) && !base->irq_list[i].handler) {
			base->icr_mask &= ~tmp;
			base->cia->icr = tmp;
		}
	}
	if (base->icr_data & base->icr_mask)
		custom.intreq = IF_SETCLR | base->int_mask;
	return old;
}

unsigned char cia_able_irq(unsigned int irq, int enable)
{
	struct ciabase *base;
	unsigned char mask;

	if (irq >= IRQ_AMIGA_CIAB)
		mask = (1 << (irq - IRQ_AMIGA_CIAB));
	else
		mask = (1 << (irq - IRQ_AMIGA_CIAA));
	mask |= (enable) ? CIA_ICR_SETCLR : 0;

	CIA_SET_BASE_ADJUST_IRQ(base, irq);

	return cia_able_irq_private(base, mask);
}

int cia_request_irq(unsigned int irq,
                    void (*handler)(int, void *, struct pt_regs *),
                    unsigned long flags, const char *devname, void *dev_id)
{
	u_char mask;
	struct ciabase *base;

	CIA_SET_BASE_ADJUST_IRQ(base, irq);

	base->irq_list[irq].handler = handler;
	base->irq_list[irq].flags   = flags;
	base->irq_list[irq].dev_id  = dev_id;
	base->irq_list[irq].devname = devname;

	/* enable the interrupt */
	mask = 1 << irq;
	cia_set_irq_private(base, mask);
	cia_able_irq_private(base, CIA_ICR_SETCLR | mask);
	return 0;
}

void cia_free_irq(unsigned int irq, void *dev_id)
{
	struct ciabase *base;

	CIA_SET_BASE_ADJUST_IRQ(base, irq);

	if (base->irq_list[irq].dev_id != dev_id)
		printk("%s: removing probably wrong IRQ %i from %s\n",
		       __FUNCTION__, base->cia_irq + irq,
		       base->irq_list[irq].devname);

	base->irq_list[irq].handler = NULL;
	base->irq_list[irq].flags   = 0;

	cia_able_irq_private(base, 1 << irq);
}

static void cia_handler(int irq, void *dev_id, struct pt_regs *fp)
{
	struct ciabase *base = (struct ciabase *)dev_id;
	int mach_irq, i;
	unsigned char ints;

	mach_irq = base->cia_irq;
	irq = SYS_IRQS + mach_irq;
	ints = cia_set_irq_private(base, CIA_ICR_ALL);
	custom.intreq = base->int_mask;
	for (i = 0; i < CIA_IRQS; i++, irq++, mach_irq++) {
		if (ints & 1) {
			kstat.irqs[0][irq]++;
			base->irq_list[i].handler(mach_irq, base->irq_list[i].dev_id, fp);
		}
		ints >>= 1;
	}
	amiga_do_irq_list(base->server_irq, fp);
}

void __init cia_init_IRQ(struct ciabase *base)
{
	int i;

	/* init isr handlers */
	for (i = 0; i < CIA_IRQS; i++) {
		base->irq_list[i].handler = NULL;
		base->irq_list[i].flags   = 0;
	}

	/* clear any pending interrupt and turn off all interrupts */
	cia_set_irq_private(base, CIA_ICR_ALL);
	cia_able_irq_private(base, CIA_ICR_ALL);

	/* install CIA handler */
	request_irq(base->handler_irq, cia_handler, 0, base->name, base);

	custom.intena = IF_SETCLR | base->int_mask;
}

int cia_get_irq_list(struct ciabase *base, char *buf)
{
	int i, j, len = 0;

	j = base->cia_irq;
	for (i = 0; i < CIA_IRQS; i++) {
		len += sprintf(buf+len, "cia  %2d: %10d ", j + i,
			       kstat.irqs[0][SYS_IRQS + j + i]);
			len += sprintf(buf+len, "  ");
		len += sprintf(buf+len, "%s\n", base->irq_list[i].devname);
	}
	return len;
}
/*
 * BK Id: SCCS/s.ints.c 1.5 05/17/01 18:14:20 cort
 */
/*
 *  linux/arch/ppc/amiga/ints.c
 *
 *  Linux/m68k general interrupt handling code from arch/m68k/kernel/ints.c
 *  Needed to drive the m68k emulating IRQ hardware on the PowerUp boards.
 */

#include <linux/types.h>
#include <linux/sched.h>
#include <linux/kernel_stat.h>
#include <linux/errno.h>
#include <linux/init.h>

#include <asm/setup.h>
#include <asm/system.h>
#include <asm/irq.h>
#include <asm/traps.h>
#include <asm/page.h>
#include <asm/machdep.h>

/* table for system interrupt handlers */
static irq_handler_t irq_list[SYS_IRQS];

static const char *default_names[SYS_IRQS] = {
	"spurious int", "int1 handler", "int2 handler", "int3 handler",
	"int4 handler", "int5 handler", "int6 handler", "int7 handler"
};

/* The number of spurious interrupts */
volatile unsigned int num_spurious;

#define NUM_IRQ_NODES 100
static irq_node_t nodes[NUM_IRQ_NODES];


/*
 * void init_IRQ(void)
 *
 * Parameters:	None
 *
 * Returns:	Nothing
 *
 * This function should be called during kernel startup to initialize
 * the IRQ handling routines.
 */

__init
void m68k_init_IRQ(void)
{
	int i;

	for (i = 0; i < SYS_IRQS; i++) {
		if (mach_default_handler)
			irq_list[i].handler = (*mach_default_handler)[i];
		irq_list[i].flags   = 0;
		irq_list[i].dev_id  = NULL;
		irq_list[i].devname = default_names[i];
	}

	for (i = 0; i < NUM_IRQ_NODES; i++)
		nodes[i].handler = NULL;

	mach_init_IRQ ();
}

irq_node_t *new_irq_node(void)
{
	irq_node_t *node;
	short i;

	for (node = nodes, i = NUM_IRQ_NODES-1; i >= 0; node++, i--)
		if (!node->handler)
			return node;

	printk ("new_irq_node: out of nodes\n");
	return NULL;
}

int sys_request_irq(unsigned int irq, 
                    void (*handler)(int, void *, struct pt_regs *), 
                    unsigned long flags, const char *devname, void *dev_id)
{
	if (irq < IRQ1 || irq > IRQ7) {
		printk("%s: Incorrect IRQ %d from %s\n",
		       __FUNCTION__, irq, devname);
		return -ENXIO;
	}

#if 0
	if (!(irq_list[irq].flags & IRQ_FLG_STD)) {
		if (irq_list[irq].flags & IRQ_FLG_LOCK) {
			printk("%s: IRQ %d from %s is not replaceable\n",
			       __FUNCTION__, irq, irq_list[irq].devname);
			return -EBUSY;
		}
		if (!(flags & IRQ_FLG_REPLACE)) {
			printk("%s: %s can't replace IRQ %d from %s\n",
			       __FUNCTION__, devname, irq, irq_list[irq].devname);
			return -EBUSY;
		}
	}
#endif

	irq_list[irq].handler = handler;
	irq_list[irq].flags   = flags;
	irq_list[irq].dev_id  = dev_id;
	irq_list[irq].devname = devname;
	return 0;
}

void sys_free_irq(unsigned int irq, void *dev_id)
{
	if (irq < IRQ1 || irq > IRQ7) {
		printk("%s: Incorrect IRQ %d\n", __FUNCTION__, irq);
		return;
	}

	if (irq_list[irq].dev_id != dev_id)
		printk("%s: Removing probably wrong IRQ %d from %s\n",
		       __FUNCTION__, irq, irq_list[irq].devname);

	irq_list[irq].handler = (*mach_default_handler)[irq];
	irq_list[irq].flags   = 0;
	irq_list[irq].dev_id  = NULL;
	irq_list[irq].devname = default_names[irq];
}

asmlinkage void process_int(unsigned long vec, struct pt_regs *fp)
{
	if (vec >= VEC_INT1 && vec <= VEC_INT7 && !MACH_IS_BVME6000) {
		vec -= VEC_SPUR;
		kstat.irqs[0][vec]++;
		irq_list[vec].handler(vec, irq_list[vec].dev_id, fp);
	} else {
		if (mach_process_int)
			mach_process_int(vec, fp);
		else
			panic("Can't process interrupt vector %ld\n", vec);
		return;
	}
}

int m68k_get_irq_list(char *buf)
{
	int i, len = 0;

	/* autovector interrupts */
	if (mach_default_handler) {
		for (i = 0; i < SYS_IRQS; i++) {
			len += sprintf(buf+len, "auto %2d: %10u ", i,
			               i ? kstat.irqs[0][i] : num_spurious);
				len += sprintf(buf+len, "  ");
			len += sprintf(buf+len, "%s\n", irq_list[i].devname);
		}
	}

	len += mach_get_irq_list(buf+len);
	return len;
}
/*
 * BK Id: SCCS/s.time.c 1.5 05/17/01 18:14:20 cort
 */
#include <linux/config.h> /* CONFIG_HEARTBEAT */
#include <linux/errno.h>
#include <linux/sched.h>
#include <linux/kernel.h>
#include <linux/param.h>
#include <linux/string.h>
#include <linux/mm.h>

#include <asm/machdep.h>
#include <asm/io.h>

#include <linux/timex.h>

unsigned long m68k_get_rtc_time(void)
{
	unsigned int year, mon, day, hour, min, sec;

	extern void arch_gettod(int *year, int *mon, int *day, int *hour,
				int *min, int *sec);

	arch_gettod (&year, &mon, &day, &hour, &min, &sec);

	if ((year += 1900) < 1970)
		year += 100;

	return mktime(year, mon, day, hour, min, sec);
}

int m68k_set_rtc_time(unsigned long nowtime)
{
  if (mach_set_clock_mmss)
    return mach_set_clock_mmss (nowtime);
  return -1;
}

void apus_heartbeat (void)
{
#ifdef CONFIG_HEARTBEAT
	static unsigned cnt = 0, period = 0, dist = 0;

	if (cnt == 0 || cnt == dist)
                mach_heartbeat( 1 );
	else if (cnt == 7 || cnt == dist+7)
                mach_heartbeat( 0 );

	if (++cnt > period) {
                cnt = 0;
                /* The hyperbolic function below modifies the heartbeat period
                 * length in dependency of the current (5min) load. It goes
                 * through the points f(0)=126, f(1)=86, f(5)=51,
                 * f(inf)->30. */
                period = ((672<<FSHIFT)/(5*avenrun[0]+(7<<FSHIFT))) + 30;
                dist = period / 4;
	}
#endif
	/* should be made smarter */
	ppc_md.heartbeat_count = 1;
}
/*
 * BK Id: SCCS/s.pcmcia.c 1.5 05/17/01 18:14:20 cort
 */
#include "../../m68k/amiga/pcmcia.c"
#
# MPC8260 Communication options
#
if [ "$CONFIG_NET_ETHERNET" = "y" ]; then
  mainmenu_option next_comment
  comment 'MPC8260 Communication Options'
  bool 'CPM SCC Ethernet' CONFIG_SCC_ENET
  if [ "$CONFIG_SCC_ENET" = "y" ]; then
  bool 'Ethernet on SCC1' CONFIG_SCC1_ENET
    if [ "$CONFIG_SCC1_ENET" != "y" ]; then
      bool 'Ethernet on SCC2' CONFIG_SCC2_ENET
    fi
  fi
#
#  CONFIG_FEC_ENET is only used to get netdevices to call our init
#    function.  Any combination of FCC1,2,3 are supported.
#
  bool 'FCC Ethernet' CONFIG_FEC_ENET
  if [ "$CONFIG_FEC_ENET" = "y" ]; then
    bool 'Ethernet on FCC1' CONFIG_FCC1_ENET
    bool 'Ethernet on FCC2' CONFIG_FCC2_ENET
    bool 'Ethernet on FCC3' CONFIG_FCC3_ENET
  fi
  endmenu
fi
# BK Id: SCCS/s.Makefile 1.3 05/17/01 18:14:19 cort
#
#
# Makefile for the linux MPC8xx ppc-specific parts of comm processor
#
# Note! Dependencies are done automagically by 'make dep', which also
# removes any old dependencies. DON'T put your own dependencies here
# unless it's something special (ie not a .c file).
#
# Note 2! The CFLAGS definition is now in the main makefile...

O_TARGET		:= 8260_io.o

obj-y			:= commproc.o uart.o

obj-$(CONFIG_FEC_ENET)	+= fcc_enet.o
obj-$(CONFIG_SCC_ENET)	+= enet.o

include $(TOPDIR)/Rules.make
/*
 * BK Id: SCCS/s.commproc.c 1.10 10/16/01 16:21:52 trini
 */

/*
 * General Purpose functions for the global management of the
 * 8260 Communication Processor Module.
 * Copyright (c) 1999 Dan Malek (dmalek@jlc.net)
 * Copyright (c) 2000 MontaVista Software, Inc (source@mvista.com)
 *	2.3.99 Updates
 *
 * In addition to the individual control of the communication
 * channels, there are a few functions that globally affect the
 * communication processor.
 *
 * Buffer descriptors must be allocated from the dual ported memory
 * space.  The allocator for that is here.  When the communication
 * process is reset, we reclaim the memory available.  There is
 * currently no deallocator for this memory.
 */
#include <linux/errno.h>
#include <linux/sched.h>
#include <linux/kernel.h>
#include <linux/param.h>
#include <linux/string.h>
#include <linux/mm.h>
#include <linux/interrupt.h>
#include <linux/bootmem.h>
#include <asm/irq.h>
#include <asm/mpc8260.h>
#include <asm/page.h>
#include <asm/pgtable.h>
#include <asm/immap_8260.h>
#include <asm/cpm_8260.h>

static	uint	dp_alloc_base;	/* Starting offset in DP ram */
static	uint	dp_alloc_top;	/* Max offset + 1 */
static	uint	host_buffer;	/* One page of host buffer */
static	uint	host_end;	/* end + 1 */
cpm8260_t	*cpmp;		/* Pointer to comm processor space */

/* We allocate this here because it is used almost exclusively for
 * the communication processor devices.
 */
immap_t		*immr;

void
m8260_cpm_reset(void)
{
	volatile immap_t	 *imp;
	volatile cpm8260_t	*commproc;
	uint			vpgaddr;

	immr = imp = (volatile immap_t *)IMAP_ADDR;
	commproc = &imp->im_cpm;

	/* Reclaim the DP memory for our use.
	*/
	dp_alloc_base = CPM_DATAONLY_BASE;
	dp_alloc_top = dp_alloc_base + CPM_DATAONLY_SIZE;

	/* Set the host page for allocation.
	*/
	host_buffer =
		(uint) alloc_bootmem_pages(PAGE_SIZE * NUM_CPM_HOST_PAGES);
	host_end = host_buffer + (PAGE_SIZE * NUM_CPM_HOST_PAGES);

	vpgaddr = host_buffer;

	/* Tell everyone where the comm processor resides.
	*/
	cpmp = (cpm8260_t *)commproc;
}

/* Allocate some memory from the dual ported ram.
 * To help protocols with object alignment restrictions, we do that
 * if they ask.
 */
uint
m8260_cpm_dpalloc(uint size, uint align)
{
	uint	retloc;
	uint	align_mask, off;
	uint	savebase;

	align_mask = align - 1;
	savebase = dp_alloc_base;

	if ((off = (dp_alloc_base & align_mask)) != 0)
		dp_alloc_base += (align - off);

	if ((dp_alloc_base + size) >= dp_alloc_top) {
		dp_alloc_base = savebase;
		return(CPM_DP_NOSPACE);
	}

	retloc = dp_alloc_base;
	dp_alloc_base += size;

	return(retloc);
}

/* We also own one page of host buffer space for the allocation of
 * UART "fifos" and the like.
 */
uint
m8260_cpm_hostalloc(uint size, uint align)
{
	uint	retloc;
	uint	align_mask, off;
	uint	savebase;

	align_mask = align - 1;
	savebase = host_buffer;

	if ((off = (host_buffer & align_mask)) != 0)
		host_buffer += (align - off);

	if ((host_buffer + size) >= host_end) {
		host_buffer = savebase;
		return(0);
	}

	retloc = host_buffer;
	host_buffer += size;

	return(retloc);
}

/* Set a baud rate generator.  This needs lots of work.  There are
 * eight BRGs, which can be connected to the CPM channels or output
 * as clocks.  The BRGs are in two different block of internal
 * memory mapped space.
 * The baud rate clock is the system clock divided by something.
 * It was set up long ago during the initial boot phase and is
 * is given to us.
 * Baud rate clocks are zero-based in the driver code (as that maps
 * to port numbers).  Documentation uses 1-based numbering.
 */
#define BRG_INT_CLK	(((bd_t *)__res)->bi_brgfreq)
#define BRG_UART_CLK	(BRG_INT_CLK/16)

/* This function is used by UARTS, or anything else that uses a 16x
 * oversampled clock.
 */
void
m8260_cpm_setbrg(uint brg, uint rate)
{
	volatile uint	*bp;

	/* This is good enough to get SMCs running.....
	*/
	if (brg < 4) {
		bp = (uint *)&immr->im_brgc1;
	}
	else {
		bp = (uint *)&immr->im_brgc5;
		brg -= 4;
	}
	bp += brg;
	*bp = ((BRG_UART_CLK / rate) << 1) | CPM_BRG_EN;
}

/* This function is used to set high speed synchronous baud rate
 * clocks.
 */
void
m8260_cpm_fastbrg(uint brg, uint rate, int div16)
{
	volatile uint	*bp;

	if (brg < 4) {
		bp = (uint *)&immr->im_brgc1;
	}
	else {
		bp = (uint *)&immr->im_brgc5;
		brg -= 4;
	}
	bp += brg;
	*bp = ((BRG_INT_CLK / rate) << 1) | CPM_BRG_EN;
	if (div16)
		*bp |= CPM_BRG_DIV16;
}
/*
 * BK Id: SCCS/s.enet.c 1.9 09/14/01 18:01:16 trini
 */
/*
 * Ethernet driver for Motorola MPC8260.
 * Copyright (c) 1999 Dan Malek (dmalek@jlc.net)
 * Copyright (c) 2000 MontaVista Software Inc. (source@mvista.com)
 *	2.3.99 Updates
 *
 * I copied this from the 8xx CPM Ethernet driver, so follow the
 * credits back through that.
 *
 * This version of the driver is somewhat selectable for the different
 * processor/board combinations.  It works for the boards I know about
 * now, and should be easily modified to include others.  Some of the
 * configuration information is contained in <asm/commproc.h> and the
 * remainder is here.
 *
 * Buffer descriptors are kept in the CPM dual port RAM, and the frame
 * buffers are in the host memory.
 *
 * Right now, I am very watseful with the buffers.  I allocate memory
 * pages and then divide them into 2K frame buffers.  This way I know I
 * have buffers large enough to hold one frame within one buffer descriptor.
 * Once I get this working, I will use 64 or 128 byte CPM buffers, which
 * will be much more memory efficient and will easily handle lots of
 * small packets.
 *
 */
#include <linux/kernel.h>
#include <linux/sched.h>
#include <linux/string.h>
#include <linux/ptrace.h>
#include <linux/errno.h>
#include <linux/ioport.h>
#include <linux/slab.h>
#include <linux/interrupt.h>
#include <linux/pci.h>
#include <linux/init.h>
#include <linux/delay.h>
#include <linux/netdevice.h>
#include <linux/etherdevice.h>
#include <linux/skbuff.h>
#include <linux/spinlock.h>

#include <asm/immap_8260.h>
#include <asm/pgtable.h>
#include <asm/mpc8260.h>
#include <asm/bitops.h>
#include <asm/uaccess.h>
#include <asm/cpm_8260.h>
#include <asm/irq.h>

/*
 *				Theory of Operation
 *
 * The MPC8260 CPM performs the Ethernet processing on an SCC.  It can use
 * an aribtrary number of buffers on byte boundaries, but must have at
 * least two receive buffers to prevent constant overrun conditions.
 *
 * The buffer descriptors are allocated from the CPM dual port memory
 * with the data buffers allocated from host memory, just like all other
 * serial communication protocols.  The host memory buffers are allocated
 * from the free page pool, and then divided into smaller receive and
 * transmit buffers.  The size of the buffers should be a power of two,
 * since that nicely divides the page.  This creates a ring buffer
 * structure similar to the LANCE and other controllers.
 *
 * Like the LANCE driver:
 * The driver runs as two independent, single-threaded flows of control.  One
 * is the send-packet routine, which enforces single-threaded use by the
 * cep->tx_busy flag.  The other thread is the interrupt handler, which is
 * single threaded by the hardware and other software.
 */

/* The transmitter timeout
 */
#define TX_TIMEOUT	(2*HZ)

/* The number of Tx and Rx buffers.  These are allocated from the page
 * pool.  The code may assume these are power of two, so it is best
 * to keep them that size.
 * We don't need to allocate pages for the transmitter.  We just use
 * the skbuffer directly.
 */
#define CPM_ENET_RX_PAGES	4
#define CPM_ENET_RX_FRSIZE	2048
#define CPM_ENET_RX_FRPPG	(PAGE_SIZE / CPM_ENET_RX_FRSIZE)
#define RX_RING_SIZE		(CPM_ENET_RX_FRPPG * CPM_ENET_RX_PAGES)
#define TX_RING_SIZE		8	/* Must be power of two */
#define TX_RING_MOD_MASK	7	/*   for this to work */

/* The CPM stores dest/src/type, data, and checksum for receive packets.
 */
#define PKT_MAXBUF_SIZE		1518
#define PKT_MINBUF_SIZE		64
#define PKT_MAXBLR_SIZE		1520

/* The CPM buffer descriptors track the ring buffers.  The rx_bd_base and
 * tx_bd_base always point to the base of the buffer descriptors.  The
 * cur_rx and cur_tx point to the currently available buffer.
 * The dirty_tx tracks the current buffer that is being sent by the
 * controller.  The cur_tx and dirty_tx are equal under both completely
 * empty and completely full conditions.  The empty/ready indicator in
 * the buffer descriptor determines the actual condition.
 */
struct scc_enet_private {
	/* The saved address of a sent-in-place packet/buffer, for skfree(). */
	struct	sk_buff* tx_skbuff[TX_RING_SIZE];
	ushort	skb_cur;
	ushort	skb_dirty;

	/* CPM dual port RAM relative addresses.
	*/
	cbd_t	*rx_bd_base;		/* Address of Rx and Tx buffers. */
	cbd_t	*tx_bd_base;
	cbd_t	*cur_rx, *cur_tx;		/* The next free ring entry */
	cbd_t	*dirty_tx;	/* The ring entries to be free()ed. */
	scc_t	*sccp;
	struct	net_device_stats stats;
	uint	tx_full;
	spinlock_t lock;
};

static int scc_enet_open(struct net_device *dev);
static int scc_enet_start_xmit(struct sk_buff *skb, struct net_device *dev);
static int scc_enet_rx(struct net_device *dev);
static void scc_enet_interrupt(int irq, void * dev_id, struct pt_regs * regs);
static int scc_enet_close(struct net_device *dev);
static struct net_device_stats *scc_enet_get_stats(struct net_device *dev);
static void set_multicast_list(struct net_device *dev);

/* These will be configurable for the SCC choice.
*/
#define CPM_ENET_BLOCK	CPM_CR_SCC1_SBLOCK
#define CPM_ENET_PAGE	CPM_CR_SCC1_PAGE
#define PROFF_ENET	PROFF_SCC1
#define SCC_ENET	0
#define SIU_INT_ENET	SIU_INT_SCC1

/* These are both board and SCC dependent....
*/
#define PD_ENET_RXD	((uint)0x00000001)
#define PD_ENET_TXD	((uint)0x00000002)
#define PD_ENET_TENA	((uint)0x00000004)
#define PC_ENET_RENA	((uint)0x00020000)
#define PC_ENET_CLSN	((uint)0x00000004)
#define PC_ENET_TXCLK	((uint)0x00000800)
#define PC_ENET_RXCLK	((uint)0x00000400)
#define CMX_CLK_ROUTE	((uint)0x25000000)
#define CMX_CLK_MASK	((uint)0xff000000)

/* Specific to a board.
*/
#define PC_EST8260_ENET_LOOPBACK	((uint)0x80000000)
#define PC_EST8260_ENET_SQE		((uint)0x40000000)
#define PC_EST8260_ENET_NOTFD		((uint)0x20000000)

static int
scc_enet_open(struct net_device *dev)
{

	/* I should reset the ring buffers here, but I don't yet know
	 * a simple way to do that.
	 */
	netif_start_queue(dev);
	return 0;					/* Always succeed */
}

static int
scc_enet_start_xmit(struct sk_buff *skb, struct net_device *dev)
{
	struct scc_enet_private *cep = (struct scc_enet_private *)dev->priv;
	volatile cbd_t	*bdp;


	/* Fill in a Tx ring entry */
	bdp = cep->cur_tx;

#ifndef final_version
	if (bdp->cbd_sc & BD_ENET_TX_READY) {
		/* Ooops.  All transmit buffers are full.  Bail out.
		 * This should not happen, since cep->tx_full should be set.
		 */
		printk("%s: tx queue full!.\n", dev->name);
		return 1;
	}
#endif

	/* Clear all of the status flags.
	 */
	bdp->cbd_sc &= ~BD_ENET_TX_STATS;

	/* If the frame is short, tell CPM to pad it.
	*/
	if (skb->len <= ETH_ZLEN)
		bdp->cbd_sc |= BD_ENET_TX_PAD;
	else
		bdp->cbd_sc &= ~BD_ENET_TX_PAD;

	/* Set buffer length and buffer pointer.
	*/
	bdp->cbd_datlen = skb->len;
	bdp->cbd_bufaddr = __pa(skb->data);

	/* Save skb pointer.
	*/
	cep->tx_skbuff[cep->skb_cur] = skb;

	cep->stats.tx_bytes += skb->len;
	cep->skb_cur = (cep->skb_cur+1) & TX_RING_MOD_MASK;
	
	spin_lock_irq(&cep->lock);

	/* Send it on its way.  Tell CPM its ready, interrupt when done,
	 * its the last BD of the frame, and to put the CRC on the end.
	 */
	bdp->cbd_sc |= (BD_ENET_TX_READY | BD_ENET_TX_INTR | BD_ENET_TX_LAST | BD_ENET_TX_TC);

	dev->trans_start = jiffies;

	/* If this was the last BD in the ring, start at the beginning again.
	*/
	if (bdp->cbd_sc & BD_ENET_TX_WRAP)
		bdp = cep->tx_bd_base;
	else
		bdp++;

	if (bdp->cbd_sc & BD_ENET_TX_READY) {
		netif_stop_queue(dev);
		cep->tx_full = 1;
	}

	cep->cur_tx = (cbd_t *)bdp;

	spin_unlock_irq(&cep->lock);

	return 0;
}

static void
scc_enet_timeout(struct net_device *dev)
{
	struct scc_enet_private *cep = (struct scc_enet_private *)dev->priv;

	printk("%s: transmit timed out.\n", dev->name);
	cep->stats.tx_errors++;
#ifndef final_version
	{
		int	i;
		cbd_t	*bdp;
		printk(" Ring data dump: cur_tx %p%s cur_rx %p.\n",
		       cep->cur_tx, cep->tx_full ? " (full)" : "",
		       cep->cur_rx);
		bdp = cep->tx_bd_base;
		printk(" Tx @base %p :\n", bdp);
		for (i = 0 ; i < TX_RING_SIZE; i++, bdp++)
			printk("%04x %04x %08x\n",
			       bdp->cbd_sc,
			       bdp->cbd_datlen,
			       bdp->cbd_bufaddr);
		bdp = cep->rx_bd_base;
		printk(" Rx @base %p :\n", bdp);
		for (i = 0 ; i < RX_RING_SIZE; i++, bdp++)
			printk("%04x %04x %08x\n",
			       bdp->cbd_sc,
			       bdp->cbd_datlen,
			       bdp->cbd_bufaddr);
	}
#endif
	if (!cep->tx_full)
		netif_wake_queue(dev);
}

/* The interrupt handler.
 * This is called from the CPM handler, not the MPC core interrupt.
 */
static void
scc_enet_interrupt(int irq, void * dev_id, struct pt_regs * regs)
{
	struct	net_device *dev = dev_id;
	volatile struct	scc_enet_private *cep;
	volatile cbd_t	*bdp;
	ushort	int_events;
	int	must_restart;

	cep = (struct scc_enet_private *)dev->priv;

	/* Get the interrupt events that caused us to be here.
	*/
	int_events = cep->sccp->scc_scce;
	cep->sccp->scc_scce = int_events;
	must_restart = 0;

	/* Handle receive event in its own function.
	*/
	if (int_events & SCCE_ENET_RXF)
		scc_enet_rx(dev_id);

	/* Check for a transmit error.  The manual is a little unclear
	 * about this, so the debug code until I get it figured out.  It
	 * appears that if TXE is set, then TXB is not set.  However,
	 * if carrier sense is lost during frame transmission, the TXE
	 * bit is set, "and continues the buffer transmission normally."
	 * I don't know if "normally" implies TXB is set when the buffer
	 * descriptor is closed.....trial and error :-).
	 */

	/* Transmit OK, or non-fatal error.  Update the buffer descriptors.
	*/
	if (int_events & (SCCE_ENET_TXE | SCCE_ENET_TXB)) {
	    spin_lock(&cep->lock);
	    bdp = cep->dirty_tx;
	    while ((bdp->cbd_sc&BD_ENET_TX_READY)==0) {
		if ((bdp==cep->cur_tx) && (cep->tx_full == 0))
		    break;

		if (bdp->cbd_sc & BD_ENET_TX_HB)	/* No heartbeat */
			cep->stats.tx_heartbeat_errors++;
		if (bdp->cbd_sc & BD_ENET_TX_LC)	/* Late collision */
			cep->stats.tx_window_errors++;
		if (bdp->cbd_sc & BD_ENET_TX_RL)	/* Retrans limit */
			cep->stats.tx_aborted_errors++;
		if (bdp->cbd_sc & BD_ENET_TX_UN)	/* Underrun */
			cep->stats.tx_fifo_errors++;
		if (bdp->cbd_sc & BD_ENET_TX_CSL)	/* Carrier lost */
			cep->stats.tx_carrier_errors++;


		/* No heartbeat or Lost carrier are not really bad errors.
		 * The others require a restart transmit command.
		 */
		if (bdp->cbd_sc &
		    (BD_ENET_TX_LC | BD_ENET_TX_RL | BD_ENET_TX_UN)) {
			must_restart = 1;
			cep->stats.tx_errors++;
		}

		cep->stats.tx_packets++;

		/* Deferred means some collisions occurred during transmit,
		 * but we eventually sent the packet OK.
		 */
		if (bdp->cbd_sc & BD_ENET_TX_DEF)
			cep->stats.collisions++;

		/* Free the sk buffer associated with this last transmit.
		*/
		dev_kfree_skb_irq(cep->tx_skbuff[cep->skb_dirty]);
		cep->skb_dirty = (cep->skb_dirty + 1) & TX_RING_MOD_MASK;

		/* Update pointer to next buffer descriptor to be transmitted.
		*/
		if (bdp->cbd_sc & BD_ENET_TX_WRAP)
			bdp = cep->tx_bd_base;
		else
			bdp++;

		/* I don't know if we can be held off from processing these
		 * interrupts for more than one frame time.  I really hope
		 * not.  In such a case, we would now want to check the
		 * currently available BD (cur_tx) and determine if any
		 * buffers between the dirty_tx and cur_tx have also been
		 * sent.  We would want to process anything in between that
		 * does not have BD_ENET_TX_READY set.
		 */

		/* Since we have freed up a buffer, the ring is no longer
		 * full.
		 */
		if (cep->tx_full) {
			cep->tx_full = 0;
			if (netif_queue_stopped(dev)) {
				netif_wake_queue(dev);
			}
		}

		cep->dirty_tx = (cbd_t *)bdp;
	    }

	    if (must_restart) {
		volatile cpm8260_t *cp;

		/* Some transmit errors cause the transmitter to shut
		 * down.  We now issue a restart transmit.  Since the
		 * errors close the BD and update the pointers, the restart
		 * _should_ pick up without having to reset any of our
		 * pointers either.
		 */

		cp = cpmp;
		cp->cp_cpcr =
		    mk_cr_cmd(CPM_ENET_PAGE, CPM_ENET_BLOCK, 0,
		    			CPM_CR_RESTART_TX) | CPM_CR_FLG;
		while (cp->cp_cpcr & CPM_CR_FLG);
	    }
	    spin_unlock(&cep->lock);
	}

	/* Check for receive busy, i.e. packets coming but no place to
	 * put them.  This "can't happen" because the receive interrupt
	 * is tossing previous frames.
	 */
	if (int_events & SCCE_ENET_BSY) {
		cep->stats.rx_dropped++;
		printk("SCC ENET: BSY can't happen.\n");
	}

	return;
}

/* During a receive, the cur_rx points to the current incoming buffer.
 * When we update through the ring, if the next incoming buffer has
 * not been given to the system, we just set the empty indicator,
 * effectively tossing the packet.
 */
static int
scc_enet_rx(struct net_device *dev)
{
	struct	scc_enet_private *cep;
	volatile cbd_t	*bdp;
	struct	sk_buff *skb;
	ushort	pkt_len;

	cep = (struct scc_enet_private *)dev->priv;

	/* First, grab all of the stats for the incoming packet.
	 * These get messed up if we get called due to a busy condition.
	 */
	bdp = cep->cur_rx;

for (;;) {
	if (bdp->cbd_sc & BD_ENET_RX_EMPTY)
		break;
		
#ifndef final_version
	/* Since we have allocated space to hold a complete frame, both
	 * the first and last indicators should be set.
	 */
	if ((bdp->cbd_sc & (BD_ENET_RX_FIRST | BD_ENET_RX_LAST)) !=
		(BD_ENET_RX_FIRST | BD_ENET_RX_LAST))
			printk("CPM ENET: rcv is not first+last\n");
#endif

	/* Frame too long or too short.
	*/
	if (bdp->cbd_sc & (BD_ENET_RX_LG | BD_ENET_RX_SH))
		cep->stats.rx_length_errors++;
	if (bdp->cbd_sc & BD_ENET_RX_NO)	/* Frame alignment */
		cep->stats.rx_frame_errors++;
	if (bdp->cbd_sc & BD_ENET_RX_CR)	/* CRC Error */
		cep->stats.rx_crc_errors++;
	if (bdp->cbd_sc & BD_ENET_RX_OV)	/* FIFO overrun */
		cep->stats.rx_crc_errors++;

	/* Report late collisions as a frame error.
	 * On this error, the BD is closed, but we don't know what we
	 * have in the buffer.  So, just drop this frame on the floor.
	 */
	if (bdp->cbd_sc & BD_ENET_RX_CL) {
		cep->stats.rx_frame_errors++;
	}
	else {

		/* Process the incoming frame.
		*/
		cep->stats.rx_packets++;
		pkt_len = bdp->cbd_datlen;
		cep->stats.rx_bytes += pkt_len;

		/* This does 16 byte alignment, much more than we need.
		 * The packet length includes FCS, but we don't want to
		 * include that when passing upstream as it messes up
		 * bridging applications.
		 */
		skb = dev_alloc_skb(pkt_len-4);

		if (skb == NULL) {
			printk("%s: Memory squeeze, dropping packet.\n", dev->name);
			cep->stats.rx_dropped++;
		}
		else {
			skb->dev = dev;
			skb_put(skb,pkt_len-4);	/* Make room */
			eth_copy_and_sum(skb,
				(unsigned char *)__va(bdp->cbd_bufaddr),
				pkt_len-4, 0);
			skb->protocol=eth_type_trans(skb,dev);
			netif_rx(skb);
		}
	}

	/* Clear the status flags for this buffer.
	*/
	bdp->cbd_sc &= ~BD_ENET_RX_STATS;

	/* Mark the buffer empty.
	*/
	bdp->cbd_sc |= BD_ENET_RX_EMPTY;

	/* Update BD pointer to next entry.
	*/
	if (bdp->cbd_sc & BD_ENET_RX_WRAP)
		bdp = cep->rx_bd_base;
	else
		bdp++;

   }
	cep->cur_rx = (cbd_t *)bdp;

	return 0;
}

static int
scc_enet_close(struct net_device *dev)
{
	/* Don't know what to do yet.
	*/
	netif_stop_queue(dev);

	return 0;
}

static struct net_device_stats *scc_enet_get_stats(struct net_device *dev)
{
	struct scc_enet_private *cep = (struct scc_enet_private *)dev->priv;

	return &cep->stats;
}

/* Set or clear the multicast filter for this adaptor.
 * Skeleton taken from sunlance driver.
 * The CPM Ethernet implementation allows Multicast as well as individual
 * MAC address filtering.  Some of the drivers check to make sure it is
 * a group multicast address, and discard those that are not.  I guess I
 * will do the same for now, but just remove the test if you want
 * individual filtering as well (do the upper net layers want or support
 * this kind of feature?).
 */

static void set_multicast_list(struct net_device *dev)
{
	struct	scc_enet_private *cep;
	struct	dev_mc_list *dmi;
	u_char	*mcptr, *tdptr;
	volatile scc_enet_t *ep;
	int	i, j;
	cep = (struct scc_enet_private *)dev->priv;

	/* Get pointer to SCC area in parameter RAM.
	*/
	ep = (scc_enet_t *)dev->base_addr;

	if (dev->flags&IFF_PROMISC) {
	  
		/* Log any net taps. */
		printk("%s: Promiscuous mode enabled.\n", dev->name);
		cep->sccp->scc_pmsr |= SCC_PSMR_PRO;
	} else {

		cep->sccp->scc_pmsr &= ~SCC_PSMR_PRO;

		if (dev->flags & IFF_ALLMULTI) {
			/* Catch all multicast addresses, so set the
			 * filter to all 1's.
			 */
			ep->sen_gaddr1 = 0xffff;
			ep->sen_gaddr2 = 0xffff;
			ep->sen_gaddr3 = 0xffff;
			ep->sen_gaddr4 = 0xffff;
		}
		else {
			/* Clear filter and add the addresses in the list.
			*/
			ep->sen_gaddr1 = 0;
			ep->sen_gaddr2 = 0;
			ep->sen_gaddr3 = 0;
			ep->sen_gaddr4 = 0;

			dmi = dev->mc_list;

			for (i=0; i<dev->mc_count; i++) {
				
				/* Only support group multicast for now.
				*/
				if (!(dmi->dmi_addr[0] & 1))
					continue;

				/* The address in dmi_addr is LSB first,
				 * and taddr is MSB first.  We have to
				 * copy bytes MSB first from dmi_addr.
				 */
				mcptr = (u_char *)dmi->dmi_addr + 5;
				tdptr = (u_char *)&ep->sen_taddrh;
				for (j=0; j<6; j++)
					*tdptr++ = *mcptr--;

				/* Ask CPM to run CRC and set bit in
				 * filter mask.
				 */
				cpmp->cp_cpcr = mk_cr_cmd(CPM_ENET_PAGE,
						CPM_ENET_BLOCK, 0,
						CPM_CR_SET_GADDR) | CPM_CR_FLG;
				/* this delay is necessary here -- Cort */
				udelay(10);
				while (cpmp->cp_cpcr & CPM_CR_FLG);
			}
		}
	}
}

/* Initialize the CPM Ethernet on SCC.
 */
int __init scc_enet_init(void)
{
	struct net_device *dev;
	struct scc_enet_private *cep;
	int i, j;
	unsigned char	*eap;
	unsigned long	mem_addr;
	bd_t		*bd;
	volatile	cbd_t		*bdp;
	volatile	cpm8260_t	*cp;
	volatile	scc_t		*sccp;
	volatile	scc_enet_t	*ep;
	volatile	immap_t		*immap;
	volatile	iop8260_t	*io;

	cp = cpmp;	/* Get pointer to Communication Processor */

	immap = (immap_t *)IMAP_ADDR;	/* and to internal registers */
	io = &immap->im_ioport;

	bd = (bd_t *)__res;

	/* Allocate some private information.
	*/
	cep = (struct scc_enet_private *)kmalloc(sizeof(*cep), GFP_KERNEL);
	if (cep == NULL)
		return -ENOMEM;

	__clear_user(cep,sizeof(*cep));
	spin_lock_init(&cep->lock);

	/* Create an Ethernet device instance.
	*/
	dev = init_etherdev(0, 0);

	/* Get pointer to SCC area in parameter RAM.
	*/
	ep = (scc_enet_t *)(&immap->im_dprambase[PROFF_ENET]);

	/* And another to the SCC register area.
	*/
	sccp = (volatile scc_t *)(&immap->im_scc[SCC_ENET]);
	cep->sccp = (scc_t *)sccp;		/* Keep the pointer handy */

	/* Disable receive and transmit in case someone left it running.
	*/
	sccp->scc_gsmrl &= ~(SCC_GSMRL_ENR | SCC_GSMRL_ENT);

	/* Configure port C and D pins for SCC Ethernet.  This
	 * won't work for all SCC possibilities....it will be
	 * board/port specific.
	 */
	io->iop_pparc |=
		(PC_ENET_RENA | PC_ENET_CLSN | PC_ENET_TXCLK | PC_ENET_RXCLK);
	io->iop_pdirc &=
		~(PC_ENET_RENA | PC_ENET_CLSN | PC_ENET_TXCLK | PC_ENET_RXCLK);
	io->iop_psorc &= 
		~(PC_ENET_RENA | PC_ENET_TXCLK | PC_ENET_RXCLK);
	io->iop_psorc |= PC_ENET_CLSN;

	io->iop_ppard |= (PD_ENET_RXD | PD_ENET_TXD | PD_ENET_TENA);
	io->iop_pdird |= (PD_ENET_TXD | PD_ENET_TENA);
	io->iop_pdird &= ~PD_ENET_RXD;
	io->iop_psord |= PD_ENET_TXD;
	io->iop_psord &= ~(PD_ENET_RXD | PD_ENET_TENA);

	/* Configure Serial Interface clock routing.
	 * First, clear all SCC bits to zero, then set the ones we want.
	 */
	immap->im_cpmux.cmx_scr &= ~CMX_CLK_MASK;
	immap->im_cpmux.cmx_scr |= CMX_CLK_ROUTE;

	/* Allocate space for the buffer descriptors in the DP ram.
	 * These are relative offsets in the DP ram address space.
	 * Initialize base addresses for the buffer descriptors.
	 */
	i = m8260_cpm_dpalloc(sizeof(cbd_t) * RX_RING_SIZE, 8);
	ep->sen_genscc.scc_rbase = i;
	cep->rx_bd_base = (cbd_t *)&immap->im_dprambase[i];

	i = m8260_cpm_dpalloc(sizeof(cbd_t) * TX_RING_SIZE, 8);
	ep->sen_genscc.scc_tbase = i;
	cep->tx_bd_base = (cbd_t *)&immap->im_dprambase[i];

	cep->dirty_tx = cep->cur_tx = cep->tx_bd_base;
	cep->cur_rx = cep->rx_bd_base;

	ep->sen_genscc.scc_rfcr = CPMFCR_GBL | CPMFCR_EB;
	ep->sen_genscc.scc_tfcr = CPMFCR_GBL | CPMFCR_EB;

	/* Set maximum bytes per receive buffer.
	 * This appears to be an Ethernet frame size, not the buffer
	 * fragment size.  It must be a multiple of four.
	 */
	ep->sen_genscc.scc_mrblr = PKT_MAXBLR_SIZE;

	/* Set CRC preset and mask.
	*/
	ep->sen_cpres = 0xffffffff;
	ep->sen_cmask = 0xdebb20e3;

	ep->sen_crcec = 0;	/* CRC Error counter */
	ep->sen_alec = 0;	/* alignment error counter */
	ep->sen_disfc = 0;	/* discard frame counter */

	ep->sen_pads = 0x8888;	/* Tx short frame pad character */
	ep->sen_retlim = 15;	/* Retry limit threshold */

	ep->sen_maxflr = PKT_MAXBUF_SIZE;   /* maximum frame length register */
	ep->sen_minflr = PKT_MINBUF_SIZE;  /* minimum frame length register */

	ep->sen_maxd1 = PKT_MAXBLR_SIZE;	/* maximum DMA1 length */
	ep->sen_maxd2 = PKT_MAXBLR_SIZE;	/* maximum DMA2 length */

	/* Clear hash tables.
	*/
	ep->sen_gaddr1 = 0;
	ep->sen_gaddr2 = 0;
	ep->sen_gaddr3 = 0;
	ep->sen_gaddr4 = 0;
	ep->sen_iaddr1 = 0;
	ep->sen_iaddr2 = 0;
	ep->sen_iaddr3 = 0;
	ep->sen_iaddr4 = 0;

	/* Set Ethernet station address.
	 *
	 * This is supplied in the board information structure, so we
	 * copy that into the controller.
	 */
	eap = (unsigned char *)&(ep->sen_paddrh);
	for (i=5; i>=0; i--)
		*eap++ = dev->dev_addr[i] = bd->bi_enetaddr[i];

	ep->sen_pper = 0;	/* 'cause the book says so */
	ep->sen_taddrl = 0;	/* temp address (LSB) */
	ep->sen_taddrm = 0;
	ep->sen_taddrh = 0;	/* temp address (MSB) */

	/* Now allocate the host memory pages and initialize the
	 * buffer descriptors.
	 */
	bdp = cep->tx_bd_base;
	for (i=0; i<TX_RING_SIZE; i++) {

		/* Initialize the BD for every fragment in the page.
		*/
		bdp->cbd_sc = 0;
		bdp->cbd_bufaddr = 0;
		bdp++;
	}

	/* Set the last buffer to wrap.
	*/
	bdp--;
	bdp->cbd_sc |= BD_SC_WRAP;

	bdp = cep->rx_bd_base;
	for (i=0; i<CPM_ENET_RX_PAGES; i++) {

		/* Allocate a page.
		*/
		mem_addr = __get_free_page(GFP_KERNEL);

		/* Initialize the BD for every fragment in the page.
		*/
		for (j=0; j<CPM_ENET_RX_FRPPG; j++) {
			bdp->cbd_sc = BD_ENET_RX_EMPTY | BD_ENET_RX_INTR;
			bdp->cbd_bufaddr = __pa(mem_addr);
			mem_addr += CPM_ENET_RX_FRSIZE;
			bdp++;
		}
	}

	/* Set the last buffer to wrap.
	*/
	bdp--;
	bdp->cbd_sc |= BD_SC_WRAP;

	/* Let's re-initialize the channel now.  We have to do it later
	 * than the manual describes because we have just now finished
	 * the BD initialization.
	 */
	cpmp->cp_cpcr = mk_cr_cmd(CPM_ENET_PAGE, CPM_ENET_BLOCK, 0,
			CPM_CR_INIT_TRX) | CPM_CR_FLG;
	while (cp->cp_cpcr & CPM_CR_FLG);

	cep->skb_cur = cep->skb_dirty = 0;

	sccp->scc_scce = 0xffff;	/* Clear any pending events */

	/* Enable interrupts for transmit error, complete frame
	 * received, and any transmit buffer we have also set the
	 * interrupt flag.
	 */
	sccp->scc_sccm = (SCCE_ENET_TXE | SCCE_ENET_RXF | SCCE_ENET_TXB);

	/* Install our interrupt handler.
	*/
	request_8xxirq(SIU_INT_ENET, scc_enet_interrupt, 0, "enet", dev);

	/* Set GSMR_H to enable all normal operating modes.
	 * Set GSMR_L to enable Ethernet to MC68160.
	 */
	sccp->scc_gsmrh = 0;
	sccp->scc_gsmrl = (SCC_GSMRL_TCI | SCC_GSMRL_TPL_48 | SCC_GSMRL_TPP_10 | SCC_GSMRL_MODE_ENET);

	/* Set sync/delimiters.
	*/
	sccp->scc_dsr = 0xd555;

	/* Set processing mode.  Use Ethernet CRC, catch broadcast, and
	 * start frame search 22 bit times after RENA.
	 */
	sccp->scc_pmsr = (SCC_PSMR_ENCRC | SCC_PSMR_NIB22);

	/* It is now OK to enable the Ethernet transmitter.
	 * Unfortunately, there are board implementation differences here.
	 */
	io->iop_pparc &= ~(PC_EST8260_ENET_LOOPBACK |
				PC_EST8260_ENET_SQE | PC_EST8260_ENET_NOTFD);
	io->iop_psorc &= ~(PC_EST8260_ENET_LOOPBACK |
				PC_EST8260_ENET_SQE | PC_EST8260_ENET_NOTFD);
	io->iop_pdirc |= (PC_EST8260_ENET_LOOPBACK |
				PC_EST8260_ENET_SQE | PC_EST8260_ENET_NOTFD);
	io->iop_pdatc &= ~(PC_EST8260_ENET_LOOPBACK | PC_EST8260_ENET_SQE);
	io->iop_pdatc |= PC_EST8260_ENET_NOTFD;

	dev->base_addr = (unsigned long)ep;
	dev->priv = cep;

	/* The CPM Ethernet specific entries in the device structure. */
	dev->open = scc_enet_open;
	dev->hard_start_xmit = scc_enet_start_xmit;
	dev->tx_timeout = scc_enet_timeout;
	dev->watchdog_timeo = TX_TIMEOUT;
	dev->stop = scc_enet_close;
	dev->get_stats = scc_enet_get_stats;
	dev->set_multicast_list = set_multicast_list;

	/* And last, enable the transmit and receive processing.
	*/
	sccp->scc_gsmrl |= (SCC_GSMRL_ENR | SCC_GSMRL_ENT);

	printk("%s: SCC ENET Version 0.1, ", dev->name);
	for (i=0; i<5; i++)
		printk("%02x:", dev->dev_addr[i]);
	printk("%02x\n", dev->dev_addr[5]);

	return 0;
}

/*
 * BK Id: SCCS/s.uart.c 1.13 12/29/01 14:50:03 trini
 */
/*
 *  UART driver for MPC8260 CPM SCC or SMC
 *  Copyright (c) 1999 Dan Malek (dmalek@jlc.net)
 *  Copyright (c) 2000 MontaVista Software, Inc. (source@mvista.com)
 *	2.3.99 updates
 *
 * I used the 8xx uart.c driver as the framework for this driver.
 * The original code was written for the EST8260 board.  I tried to make
 * it generic, but there may be some assumptions in the structures that
 * have to be fixed later.
 *
 * The 8xx and 8260 are similar, but not identical.  Over time we
 * could probably merge these two drivers.
 * To save porting time, I did not bother to change any object names
 * that are not accessed outside of this file.
 * It still needs lots of work........When it was easy, I included code
 * to support the SCCs.
 * Only the SCCs support modem control, so that is not complete either.
 *
 * This module exports the following rs232 io functions:
 *
 *	int rs_8xx_init(void);
 */

#include <linux/config.h>
#include <linux/module.h>
#include <linux/errno.h>
#include <linux/signal.h>
#include <linux/sched.h>
#include <linux/timer.h>
#include <linux/interrupt.h>
#include <linux/tty.h>
#include <linux/tty_flip.h>
#include <linux/serial.h>
#include <linux/serialP.h>
#include <linux/major.h>
#include <linux/string.h>
#include <linux/fcntl.h>
#include <linux/ptrace.h>
#include <linux/mm.h>
#include <linux/slab.h>
#include <linux/init.h>
#include <linux/delay.h>
#include <asm/uaccess.h>
#include <asm/immap_8260.h>
#include <asm/mpc8260.h>
#include <asm/cpm_8260.h>
#include <asm/irq.h>

#ifdef CONFIG_SERIAL_CONSOLE
#include <linux/console.h>

/* this defines the index into rs_table for the port to use
*/
#ifndef CONFIG_SERIAL_CONSOLE_PORT
#define CONFIG_SERIAL_CONSOLE_PORT	0
#endif
#endif

#define TX_WAKEUP	ASYNC_SHARE_IRQ

static char *serial_name = "CPM UART driver";
static char *serial_version = "0.01";

static DECLARE_TASK_QUEUE(tq_serial);

static struct tty_driver serial_driver, callout_driver;
static int serial_refcount;
static int serial_console_setup(struct console *co, char *options);

/*
 * Serial driver configuration section.  Here are the various options:
 */
#define SERIAL_PARANOIA_CHECK
#define CONFIG_SERIAL_NOPAUSE_IO
#define SERIAL_DO_RESTART

/* Set of debugging defines */

#undef SERIAL_DEBUG_INTR
#undef SERIAL_DEBUG_OPEN
#undef SERIAL_DEBUG_FLOW
#undef SERIAL_DEBUG_RS_WAIT_UNTIL_SENT

#define _INLINE_ inline
  
#define DBG_CNT(s)

/* We overload some of the items in the data structure to meet our
 * needs.  For example, the port address is the CPM parameter ram
 * offset for the SCC or SMC.  The maximum number of ports is 4 SCCs and
 * 2 SMCs.  The "hub6" field is used to indicate the channel number, with
 * 0 and 1 indicating the SMCs and 2, 3, 4, and 5 are the SCCs.
 * Since these ports are so versatile, I don't yet have a strategy for
 * their management.  For example, SCC1 is used for Ethernet.  Right
 * now, just don't put them in the table.  Of course, right now I just
 * want the SMC to work as a uart :-)..
 * The "type" field is currently set to 0, for PORT_UNKNOWN.  It is
 * not currently used.  I should probably use it to indicate the port
 * type of CMS or SCC.
 * The SMCs do not support any modem control signals.
 */
#define smc_scc_num	hub6

/* SMC2 is sometimes used for low performance TDM interfaces.  Define
 * this as 1 if you want SMC2 as a serial port UART managed by this driver.
 * Define this as 0 if you wish to use SMC2 for something else.
 */
#define USE_SMC2 1

/* Define SCC to ttySx mapping.
*/
#define SCC_NUM_BASE	(USE_SMC2 + 1)	/* SCC base tty "number" */

/* Define which SCC is the first one to use for a serial port.  These
 * are 0-based numbers, i.e. this assumes the first SCC (SCC1) is used
 * for Ethernet, and the first available SCC for serial UART is SCC2.
 * NOTE:  IF YOU CHANGE THIS, you have to change the PROFF_xxx and
 * interrupt vectors in the table below to match.
 */
#define SCC_IDX_BASE	1	/* table index */

static struct serial_state rs_table[] = {
	/* UART CLK   PORT          IRQ      FLAGS  NUM   */
	{ 0,     0, PROFF_SMC1, SIU_INT_SMC1,   0,    0 },    /* SMC1 ttyS0 */
#if USE_SMC2
	{ 0,     0, PROFF_SMC2, SIU_INT_SMC2,   0,    1 },    /* SMC2 ttyS1 */
#endif
	{ 0,     0, PROFF_SCC2, SIU_INT_SCC2,   0, SCC_NUM_BASE},    /* SCC2 ttyS2 */
	{ 0,     0, PROFF_SCC3, SIU_INT_SCC3,   0, SCC_NUM_BASE + 1},    /* SCC3 ttyS3 */
};

#define NR_PORTS	(sizeof(rs_table)/sizeof(struct serial_state))

static struct tty_struct *serial_table[NR_PORTS];
static struct termios *serial_termios[NR_PORTS];
static struct termios *serial_termios_locked[NR_PORTS];

/* The number of buffer descriptors and their sizes.
*/
#define RX_NUM_FIFO	4
#define RX_BUF_SIZE	32
#define TX_NUM_FIFO	4
#define TX_BUF_SIZE	32

#ifndef MIN
#define MIN(a,b)	((a) < (b) ? (a) : (b))
#endif

/* The async_struct in serial.h does not really give us what we
 * need, so define our own here.
 */
typedef struct serial_info {
	int			magic;
	int			flags;
	struct serial_state	*state;
	struct tty_struct 	*tty;
	int			read_status_mask;
	int			ignore_status_mask;
	int			timeout;
	int			line;
	int			x_char;	/* xon/xoff character */
	int			close_delay;
	unsigned short		closing_wait;
	unsigned short		closing_wait2;
	unsigned long		event;
	unsigned long		last_active;
	int			blocked_open; /* # of blocked opens */
	long			session; /* Session of opening process */
	long			pgrp; /* pgrp of opening process */
	struct tq_struct	tqueue;
	struct tq_struct	tqueue_hangup;
	wait_queue_head_t	open_wait;
	wait_queue_head_t	close_wait;

	/* CPM Buffer Descriptor pointers.
	*/
	cbd_t			*rx_bd_base;
	cbd_t			*rx_cur;
	cbd_t			*tx_bd_base;
	cbd_t			*tx_cur;
} ser_info_t;

static void change_speed(ser_info_t *info);
static void rs_8xx_wait_until_sent(struct tty_struct *tty, int timeout);

static inline int serial_paranoia_check(ser_info_t *info,
					kdev_t device, const char *routine)
{
#ifdef SERIAL_PARANOIA_CHECK
	static const char *badmagic =
		"Warning: bad magic number for serial struct (%s) in %s\n";
	static const char *badinfo =
		"Warning: null async_struct for (%s) in %s\n";

	if (!info) {
		printk(badinfo, kdevname(device), routine);
		return 1;
	}
	if (info->magic != SERIAL_MAGIC) {
		printk(badmagic, kdevname(device), routine);
		return 1;
	}
#endif
	return 0;
}

/*
 * This is used to figure out the divisor speeds and the timeouts,
 * indexed by the termio value.  The generic CPM functions are responsible
 * for setting and assigning baud rate generators for us.
 */
static int baud_table[] = {
	0, 50, 75, 110, 134, 150, 200, 300, 600, 1200, 1800, 2400, 4800,
	9600, 19200, 38400, 57600, 115200, 230400, 460800, 0 };


/*
 * ------------------------------------------------------------
 * rs_stop() and rs_start()
 *
 * This routines are called before setting or resetting tty->stopped.
 * They enable or disable transmitter interrupts, as necessary.
 * ------------------------------------------------------------
 */
static void rs_8xx_stop(struct tty_struct *tty)
{
	ser_info_t *info = (ser_info_t *)tty->driver_data;
	int	idx;
	unsigned long flags;
	volatile scc_t	*sccp;
	volatile smc_t	*smcp;

	if (serial_paranoia_check(info, tty->device, "rs_stop"))
		return;
	
	save_flags(flags); cli();
	if ((idx = info->state->smc_scc_num) < SCC_NUM_BASE) {
		smcp = &immr->im_smc[idx];
		smcp->smc_smcm &= ~SMCM_TX;
	}
	else {
		sccp = &immr->im_scc[idx - SCC_IDX_BASE];
		sccp->scc_sccm &= ~UART_SCCM_TX;
	}
	restore_flags(flags);
}

static void rs_8xx_start(struct tty_struct *tty)
{
	ser_info_t *info = (ser_info_t *)tty->driver_data;
	int	idx;
	unsigned long flags;
	volatile scc_t	*sccp;
	volatile smc_t	*smcp;

	if (serial_paranoia_check(info, tty->device, "rs_stop"))
		return;
	
	save_flags(flags); cli();
	if ((idx = info->state->smc_scc_num) < SCC_NUM_BASE) {
		smcp = &immr->im_smc[idx];
		smcp->smc_smcm |= SMCM_TX;
	}
	else {
		sccp = &immr->im_scc[idx - SCC_IDX_BASE];
		sccp->scc_sccm |= UART_SCCM_TX;
	}
	restore_flags(flags);
}

/*
 * ----------------------------------------------------------------------
 *
 * Here starts the interrupt handling routines.  All of the following
 * subroutines are declared as inline and are folded into
 * rs_interrupt().  They were separated out for readability's sake.
 *
 * Note: rs_interrupt() is a "fast" interrupt, which means that it
 * runs with interrupts turned off.  People who may want to modify
 * rs_interrupt() should try to keep the interrupt handler as fast as
 * possible.  After you are done making modifications, it is not a bad
 * idea to do:
 * 
 * gcc -S -DKERNEL -Wall -Wstrict-prototypes -O6 -fomit-frame-pointer serial.c
 *
 * and look at the resulting assemble code in serial.s.
 *
 * 				- Ted Ts'o (tytso@mit.edu), 7-Mar-93
 * -----------------------------------------------------------------------
 */

/*
 * This routine is used by the interrupt handler to schedule
 * processing in the software interrupt portion of the driver.
 */
static _INLINE_ void rs_sched_event(ser_info_t *info,
				  int event)
{
	info->event |= 1 << event;
	queue_task(&info->tqueue, &tq_serial);
	mark_bh(SERIAL_BH);
}

static _INLINE_ void receive_chars(ser_info_t *info)
{
	struct tty_struct *tty = info->tty;
	unsigned char ch, *cp;
	/*int	ignored = 0;*/
	int	i;
	ushort	status;
	struct	async_icount *icount;
	volatile cbd_t	*bdp;

	icount = &info->state->icount;

	/* Just loop through the closed BDs and copy the characters into
	 * the buffer.
	 */
	bdp = info->rx_cur;
	for (;;) {
		if (bdp->cbd_sc & BD_SC_EMPTY)	/* If this one is empty */
			break;			/*   we are all done */

		/* The read status mask tell us what we should do with
		 * incoming characters, especially if errors occur.
		 * One special case is the use of BD_SC_EMPTY.  If
		 * this is not set, we are supposed to be ignoring
		 * inputs.  In this case, just mark the buffer empty and
		 * continue.
		if (!(info->read_status_mask & BD_SC_EMPTY)) {
			bdp->cbd_sc |= BD_SC_EMPTY;
			bdp->cbd_sc &=
				~(BD_SC_BR | BD_SC_FR | BD_SC_PR | BD_SC_OV);

			if (bdp->cbd_sc & BD_SC_WRAP)
				bdp = info->rx_bd_base;
			else
				bdp++;
			continue;
		}
		 */

		/* Get the number of characters and the buffer pointer.
		*/
		i = bdp->cbd_datlen;
		cp = (unsigned char *)__va(bdp->cbd_bufaddr);
		status = bdp->cbd_sc;

		/* Check to see if there is room in the tty buffer for
		 * the characters in our BD buffer.  If not, we exit
		 * now, leaving the BD with the characters.  We'll pick
		 * them up again on the next receive interrupt (which could
		 * be a timeout).
		 */
		if ((tty->flip.count + i) >= TTY_FLIPBUF_SIZE)
			break;

		while (i-- > 0) {
			ch = *cp++;
			*tty->flip.char_buf_ptr = ch;
			icount->rx++;

#ifdef SERIAL_DEBUG_INTR
			printk("DR%02x:%02x...", ch, *status);
#endif
			*tty->flip.flag_buf_ptr = 0;
			if (status & (BD_SC_BR | BD_SC_FR |
				       BD_SC_PR | BD_SC_OV)) {
				/*
				 * For statistics only
				 */
				if (status & BD_SC_BR)
					icount->brk++;
				else if (status & BD_SC_PR)
					icount->parity++;
				else if (status & BD_SC_FR)
					icount->frame++;
				if (status & BD_SC_OV)
					icount->overrun++;

				/*
				 * Now check to see if character should be
				 * ignored, and mask off conditions which
				 * should be ignored.
				if (status & info->ignore_status_mask) {
					if (++ignored > 100)
						break;
					continue;
				}
				 */
				status &= info->read_status_mask;
		
				if (status & (BD_SC_BR)) {
#ifdef SERIAL_DEBUG_INTR
					printk("handling break....");
#endif
					*tty->flip.flag_buf_ptr = TTY_BREAK;
					if (info->flags & ASYNC_SAK)
						do_SAK(tty);
				} else if (status & BD_SC_PR)
					*tty->flip.flag_buf_ptr = TTY_PARITY;
				else if (status & BD_SC_FR)
					*tty->flip.flag_buf_ptr = TTY_FRAME;
				if (status & BD_SC_OV) {
					/*
					 * Overrun is special, since it's
					 * reported immediately, and doesn't
					 * affect the current character
					 */
					if (tty->flip.count < TTY_FLIPBUF_SIZE) {
						tty->flip.count++;
						tty->flip.flag_buf_ptr++;
						tty->flip.char_buf_ptr++;
						*tty->flip.flag_buf_ptr =
								TTY_OVERRUN;
					}
				}
			}
			if (tty->flip.count >= TTY_FLIPBUF_SIZE)
				break;

			tty->flip.flag_buf_ptr++;
			tty->flip.char_buf_ptr++;
			tty->flip.count++;
		}

		/* This BD is ready to be used again.  Clear status.
		 * Get next BD.
		 */
		bdp->cbd_sc |= BD_SC_EMPTY;
		bdp->cbd_sc &= ~(BD_SC_BR | BD_SC_FR | BD_SC_PR | BD_SC_OV);

		if (bdp->cbd_sc & BD_SC_WRAP)
			bdp = info->rx_bd_base;
		else
			bdp++;
	}

	info->rx_cur = (cbd_t *)bdp;

	queue_task(&tty->flip.tqueue, &tq_timer);
}

static _INLINE_ void transmit_chars(ser_info_t *info)
{
	
	if (info->flags & TX_WAKEUP) {
		rs_sched_event(info, RS_EVENT_WRITE_WAKEUP);
	}

#ifdef SERIAL_DEBUG_INTR
	printk("THRE...");
#endif
}

#ifdef notdef
	/* I need to do this for the SCCs, so it is left as a reminder.
	*/
static _INLINE_ void check_modem_status(struct async_struct *info)
{
	int	status;
	struct	async_icount *icount;
	
	status = serial_in(info, UART_MSR);

	if (status & UART_MSR_ANY_DELTA) {
		icount = &info->state->icount;
		/* update input line counters */
		if (status & UART_MSR_TERI)
			icount->rng++;
		if (status & UART_MSR_DDSR)
			icount->dsr++;
		if (status & UART_MSR_DDCD) {
			icount->dcd++;
#ifdef CONFIG_HARD_PPS
			if ((info->flags & ASYNC_HARDPPS_CD) &&
			    (status & UART_MSR_DCD))
				hardpps();
#endif
		}
		if (status & UART_MSR_DCTS)
			icount->cts++;
		wake_up_interruptible(&info->delta_msr_wait);
	}

	if ((info->flags & ASYNC_CHECK_CD) && (status & UART_MSR_DDCD)) {
#if (defined(SERIAL_DEBUG_OPEN) || defined(SERIAL_DEBUG_INTR))
		printk("ttys%d CD now %s...", info->line,
		       (status & UART_MSR_DCD) ? "on" : "off");
#endif		
		if (status & UART_MSR_DCD)
			wake_up_interruptible(&info->open_wait);
		else if (!((info->flags & ASYNC_CALLOUT_ACTIVE) &&
			   (info->flags & ASYNC_CALLOUT_NOHUP))) {
#ifdef SERIAL_DEBUG_OPEN
			printk("scheduling hangup...");
#endif
			MOD_INC_USE_COUNT;
			if (schedule_task(&info->tqueue_hangup) == 0)
				MOD_DEC_USE_COUNT;
		}
	}
	if (info->flags & ASYNC_CTS_FLOW) {
		if (info->tty->hw_stopped) {
			if (status & UART_MSR_CTS) {
#if (defined(SERIAL_DEBUG_INTR) || defined(SERIAL_DEBUG_FLOW))
				printk("CTS tx start...");
#endif
				info->tty->hw_stopped = 0;
				info->IER |= UART_IER_THRI;
				serial_out(info, UART_IER, info->IER);
				rs_sched_event(info, RS_EVENT_WRITE_WAKEUP);
				return;
			}
		} else {
			if (!(status & UART_MSR_CTS)) {
#if (defined(SERIAL_DEBUG_INTR) || defined(SERIAL_DEBUG_FLOW))
				printk("CTS tx stop...");
#endif
				info->tty->hw_stopped = 1;
				info->IER &= ~UART_IER_THRI;
				serial_out(info, UART_IER, info->IER);
			}
		}
	}
}
#endif

/*
 * This is the serial driver's interrupt routine for a single port
 */
static void rs_8xx_interrupt(int irq, void * dev_id, struct pt_regs * regs)
{
	u_char	events;
	int	idx;
	ser_info_t *info;
	volatile smc_t	*smcp;
	volatile scc_t	*sccp;
	
	info = (ser_info_t *)dev_id;

	if ((idx = info->state->smc_scc_num) < SCC_NUM_BASE) {
		smcp = &immr->im_smc[idx];
		events = smcp->smc_smce;
		if (events & SMCM_RX)
			receive_chars(info);
		if (events & SMCM_TX)
			transmit_chars(info);
		smcp->smc_smce = events;
	}
	else {
		sccp = &immr->im_scc[idx - SCC_IDX_BASE];
		events = sccp->scc_scce;
		if (events & SCCM_RX)
			receive_chars(info);
		if (events & SCCM_TX)
			transmit_chars(info);
		sccp->scc_scce = events;
	}
	
#ifdef SERIAL_DEBUG_INTR
	printk("rs_interrupt_single(%d, %x)...",
					info->state->smc_scc_num, events);
#endif
#ifdef modem_control
	check_modem_status(info);
#endif
	info->last_active = jiffies;
#ifdef SERIAL_DEBUG_INTR
	printk("end.\n");
#endif
}


/*
 * -------------------------------------------------------------------
 * Here ends the serial interrupt routines.
 * -------------------------------------------------------------------
 */

/*
 * This routine is used to handle the "bottom half" processing for the
 * serial driver, known also the "software interrupt" processing.
 * This processing is done at the kernel interrupt level, after the
 * rs_interrupt() has returned, BUT WITH INTERRUPTS TURNED ON.  This
 * is where time-consuming activities which can not be done in the
 * interrupt driver proper are done; the interrupt driver schedules
 * them using rs_sched_event(), and they get done here.
 */
static void do_serial_bh(void)
{
	run_task_queue(&tq_serial);
}

static void do_softint(void *private_)
{
	ser_info_t	*info = (ser_info_t *) private_;
	struct tty_struct	*tty;
	
	tty = info->tty;
	if (!tty)
		return;

	if (test_and_clear_bit(RS_EVENT_WRITE_WAKEUP, &info->event)) {
		if ((tty->flags & (1 << TTY_DO_WRITE_WAKEUP)) &&
		    tty->ldisc.write_wakeup)
			(tty->ldisc.write_wakeup)(tty);
		wake_up_interruptible(&tty->write_wait);
	}
}

/*
 * This routine is called from the scheduler tqueue when the interrupt
 * routine has signalled that a hangup has occurred.  The path of
 * hangup processing is:
 *
 * 	serial interrupt routine -> (scheduler tqueue) ->
 * 	do_serial_hangup() -> tty->hangup() -> rs_hangup()
 * 
 */
static void do_serial_hangup(void *private_)
{
	struct async_struct	*info = (struct async_struct *) private_;
	struct tty_struct	*tty;
	
	tty = info->tty;
	if (tty)
		tty_hangup(tty);
	MOD_DEC_USE_COUNT;
}

/*static void rs_8xx_timer(void)
{
	printk("rs_8xx_timer\n");
}*/


static int startup(ser_info_t *info)
{
	unsigned long flags;
	int	retval=0;
	int	idx;
	struct serial_state *state= info->state;
	volatile smc_t		*smcp;
	volatile scc_t		*sccp;
	volatile smc_uart_t	*up;
	volatile scc_uart_t	*scup;


	save_flags(flags); cli();

	if (info->flags & ASYNC_INITIALIZED) {
		goto errout;
	}

#ifdef maybe
	if (!state->port || !state->type) {
		if (info->tty)
			set_bit(TTY_IO_ERROR, &info->tty->flags);
		goto errout;
	}
#endif

#ifdef SERIAL_DEBUG_OPEN
	printk("starting up ttys%d (irq %d)...", info->line, state->irq);
#endif


#ifdef modem_control
	info->MCR = 0;
	if (info->tty->termios->c_cflag & CBAUD)
		info->MCR = UART_MCR_DTR | UART_MCR_RTS;
#endif
	
	if (info->tty)
		clear_bit(TTY_IO_ERROR, &info->tty->flags);

	/*
	 * and set the speed of the serial port
	 */
	change_speed(info);
	
	if ((idx = info->state->smc_scc_num) < SCC_NUM_BASE) {
		smcp = &immr->im_smc[idx];

		/* Enable interrupts and I/O.
		*/
		smcp->smc_smcm |= (SMCM_RX | SMCM_TX);
		smcp->smc_smcmr |= (SMCMR_REN | SMCMR_TEN);

		/* We can tune the buffer length and idle characters
		 * to take advantage of the entire incoming buffer size.
		 * If mrblr is something other than 1, maxidl has to be
		 * non-zero or we never get an interrupt.  The maxidl
		 * is the number of character times we wait after reception
		 * of the last character before we decide no more characters
		 * are coming.
		 */
		up = (smc_uart_t *)&immr->im_dprambase[state->port];
#if 0
		up->smc_mrblr = 1;	/* receive buffer length */
		up->smc_maxidl = 0;	/* wait forever for next char */
#else
		up->smc_mrblr = RX_BUF_SIZE;
		up->smc_maxidl = RX_BUF_SIZE;
#endif
		up->smc_brkcr = 1;	/* number of break chars */
	}
	else {
		sccp = &immr->im_scc[idx - SCC_IDX_BASE];
		scup = (scc_uart_t *)&immr->im_dprambase[state->port];
#if 0
		scup->scc_genscc.scc_mrblr = 1;	/* receive buffer length */
		scup->scc_maxidl = 0;	/* wait forever for next char */
#else
		scup->scc_genscc.scc_mrblr = RX_BUF_SIZE;
		scup->scc_maxidl = RX_BUF_SIZE;
#endif

		sccp->scc_sccm |= (UART_SCCM_TX | UART_SCCM_RX);
		sccp->scc_gsmrl |= (SCC_GSMRL_ENR | SCC_GSMRL_ENT);
	}

	info->flags |= ASYNC_INITIALIZED;
	restore_flags(flags);
	return 0;
	
errout:
	restore_flags(flags);
	return retval;
}

/*
 * This routine will shutdown a serial port; interrupts are disabled, and
 * DTR is dropped if the hangup on close termio flag is on.
 */
static void shutdown(ser_info_t * info)
{
	unsigned long	flags;
	struct serial_state *state;
	int		idx;
	volatile smc_t	*smcp;
	volatile scc_t	*sccp;

	if (!(info->flags & ASYNC_INITIALIZED))
		return;

	state = info->state;

#ifdef SERIAL_DEBUG_OPEN
	printk("Shutting down serial port %d (irq %d)....", info->line,
	       state->irq);
#endif
	
	save_flags(flags); cli(); /* Disable interrupts */

	if ((idx = info->state->smc_scc_num) < SCC_NUM_BASE) {
		smcp = &immr->im_smc[idx];

		/* Disable interrupts and I/O.
		*/
		smcp->smc_smcm &= ~(SMCM_RX | SMCM_TX);
#ifdef CONFIG_SERIAL_CONSOLE
		/* We can't disable the transmitter if this is the
		 * system console.
		 */
		if (idx != CONFIG_SERIAL_CONSOLE_PORT)
#endif
			smcp->smc_smcmr &= ~(SMCMR_REN | SMCMR_TEN);
	}
	else {
		sccp = &immr->im_scc[idx - SCC_IDX_BASE];
		sccp->scc_sccm &= ~(UART_SCCM_TX | UART_SCCM_RX);
		sccp->scc_gsmrl &= ~(SCC_GSMRL_ENR | SCC_GSMRL_ENT);
	}
	
	if (info->tty)
		set_bit(TTY_IO_ERROR, &info->tty->flags);

	info->flags &= ~ASYNC_INITIALIZED;
	restore_flags(flags);
}

/*
 * This routine is called to set the UART divisor registers to match
 * the specified baud rate for a serial port.
 */
static void change_speed(ser_info_t *info)
{
	int	baud_rate;
	unsigned cflag, cval, scval, prev_mode;
	int	i, bits, sbits, idx;
	unsigned long	flags;
	volatile smc_t	*smcp;
	volatile scc_t	*sccp;

	if (!info->tty || !info->tty->termios)
		return;
	cflag = info->tty->termios->c_cflag;

	/* Character length programmed into the mode register is the
	 * sum of: 1 start bit, number of data bits, 0 or 1 parity bit,
	 * 1 or 2 stop bits, minus 1.
	 * The value 'bits' counts this for us.
	 */
	cval = 0;
	scval = 0;

	/* byte size and parity */
	switch (cflag & CSIZE) {
	      case CS5: bits = 5; break;
	      case CS6: bits = 6; break;
	      case CS7: bits = 7; break;
	      case CS8: bits = 8; break;
	      /* Never happens, but GCC is too dumb to figure it out */
	      default:  bits = 8; break;
	}
	sbits = bits - 5;

	if (cflag & CSTOPB) {
		cval |= SMCMR_SL;	/* Two stops */
		scval |= SCU_PMSR_SL;
		bits++;
	}
	if (cflag & PARENB) {
		cval |= SMCMR_PEN;
		scval |= SCU_PMSR_PEN;
		bits++;
	}
	if (!(cflag & PARODD)) {
		cval |= SMCMR_PM_EVEN;
		scval |= (SCU_PMSR_REVP | SCU_PMSR_TEVP);
	}

	/* Determine divisor based on baud rate */
	i = cflag & CBAUD;
	if (i >= (sizeof(baud_table)/sizeof(int)))
		baud_rate = 9600;
	else
		baud_rate = baud_table[i];

	info->timeout = (TX_BUF_SIZE*HZ*bits);
	info->timeout += HZ/50;		/* Add .02 seconds of slop */

#ifdef modem_control
	/* CTS flow control flag and modem status interrupts */
	info->IER &= ~UART_IER_MSI;
	if (info->flags & ASYNC_HARDPPS_CD)
		info->IER |= UART_IER_MSI;
	if (cflag & CRTSCTS) {
		info->flags |= ASYNC_CTS_FLOW;
		info->IER |= UART_IER_MSI;
	} else
		info->flags &= ~ASYNC_CTS_FLOW;
	if (cflag & CLOCAL)
		info->flags &= ~ASYNC_CHECK_CD;
	else {
		info->flags |= ASYNC_CHECK_CD;
		info->IER |= UART_IER_MSI;
	}
	serial_out(info, UART_IER, info->IER);
#endif

	/*
	 * Set up parity check flag
	 */
#define RELEVANT_IFLAG(iflag) (iflag & (IGNBRK|BRKINT|IGNPAR|PARMRK|INPCK))

	info->read_status_mask = (BD_SC_EMPTY | BD_SC_OV);
	if (I_INPCK(info->tty))
		info->read_status_mask |= BD_SC_FR | BD_SC_PR;
	if (I_BRKINT(info->tty) || I_PARMRK(info->tty))
		info->read_status_mask |= BD_SC_BR;
	
	/*
	 * Characters to ignore
	 */
	info->ignore_status_mask = 0;
	if (I_IGNPAR(info->tty))
		info->ignore_status_mask |= BD_SC_PR | BD_SC_FR;
	if (I_IGNBRK(info->tty)) {
		info->ignore_status_mask |= BD_SC_BR;
		/*
		 * If we're ignore parity and break indicators, ignore 
		 * overruns too.  (For real raw support).
		 */
		if (I_IGNPAR(info->tty))
			info->ignore_status_mask |= BD_SC_OV;
	}
	/*
	 * !!! ignore all characters if CREAD is not set
	 */
	if ((cflag & CREAD) == 0)
		info->read_status_mask &= ~BD_SC_EMPTY;
	save_flags(flags); cli();

	/* Start bit has not been added (so don't, because we would just
	 * subtract it later), and we need to add one for the number of
	 * stops bits (there is always at least one).
	 */
	bits++;
	if ((idx = info->state->smc_scc_num) < SCC_NUM_BASE) {
		smcp = &immr->im_smc[idx];

		/* Set the mode register.  We want to keep a copy of the
		 * enables, because we want to put them back if they were
		 * present.
		 */
		prev_mode = smcp->smc_smcmr;
		smcp->smc_smcmr = smcr_mk_clen(bits) | cval |  SMCMR_SM_UART;
		smcp->smc_smcmr |= (prev_mode & (SMCMR_REN | SMCMR_TEN));
	}
	else {
		sccp = &immr->im_scc[idx - SCC_IDX_BASE];
		sccp->scc_pmsr = (sbits << 12) | scval;
	}

	m8260_cpm_setbrg(info->state->smc_scc_num, baud_rate);

	restore_flags(flags);
}

static void rs_8xx_put_char(struct tty_struct *tty, unsigned char ch)
{
	ser_info_t *info = (ser_info_t *)tty->driver_data;
	volatile cbd_t	*bdp;

	if (serial_paranoia_check(info, tty->device, "rs_put_char"))
		return;

	if (!tty)
		return;

	bdp = info->tx_cur;
	while (bdp->cbd_sc & BD_SC_READY);

	*((char *)__va(bdp->cbd_bufaddr)) = ch;
	bdp->cbd_datlen = 1;
	bdp->cbd_sc |= BD_SC_READY;

	/* Get next BD.
	*/
	if (bdp->cbd_sc & BD_SC_WRAP)
		bdp = info->tx_bd_base;
	else
		bdp++;

	info->tx_cur = (cbd_t *)bdp;

}

static int rs_8xx_write(struct tty_struct * tty, int from_user,
		    const unsigned char *buf, int count)
{
	int	c, ret = 0;
	ser_info_t *info = (ser_info_t *)tty->driver_data;
	volatile cbd_t *bdp;

	if (serial_paranoia_check(info, tty->device, "rs_write"))
		return 0;

	if (!tty) 
		return 0;

	bdp = info->tx_cur;

	while (1) {
		c = MIN(count, TX_BUF_SIZE);

		if (c <= 0)
			break;

		if (bdp->cbd_sc & BD_SC_READY) {
			info->flags |= TX_WAKEUP;
			break;
		}

		if (from_user) {
			if (copy_from_user(__va(bdp->cbd_bufaddr), buf, c)) {
				if (!ret)
					ret = -EFAULT;
				break;
			}
		} else {
			memcpy(__va(bdp->cbd_bufaddr), buf, c);
		}

		bdp->cbd_datlen = c;
		bdp->cbd_sc |= BD_SC_READY;

		buf += c;
		count -= c;
		ret += c;

		/* Get next BD.
		*/
		if (bdp->cbd_sc & BD_SC_WRAP)
			bdp = info->tx_bd_base;
		else
			bdp++;
		info->tx_cur = (cbd_t *)bdp;
	}
	return ret;
}

static int rs_8xx_write_room(struct tty_struct *tty)
{
	ser_info_t *info = (ser_info_t *)tty->driver_data;
	int	ret;

	if (serial_paranoia_check(info, tty->device, "rs_write_room"))
		return 0;

	if ((info->tx_cur->cbd_sc & BD_SC_READY) == 0) {
		info->flags &= ~TX_WAKEUP;
		ret = TX_BUF_SIZE;
	}
	else {
		info->flags |= TX_WAKEUP;
		ret = 0;
	}
	return ret;
}

/* I could track this with transmit counters....maybe later.
*/
static int rs_8xx_chars_in_buffer(struct tty_struct *tty)
{
	ser_info_t *info = (ser_info_t *)tty->driver_data;
				
	if (serial_paranoia_check(info, tty->device, "rs_chars_in_buffer"))
		return 0;
	return 0;
}

static void rs_8xx_flush_buffer(struct tty_struct *tty)
{
	ser_info_t *info = (ser_info_t *)tty->driver_data;
				
	if (serial_paranoia_check(info, tty->device, "rs_flush_buffer"))
		return;

	/* There is nothing to "flush", whatever we gave the CPM
	 * is on its way out.
	 */
	wake_up_interruptible(&tty->write_wait);
	if ((tty->flags & (1 << TTY_DO_WRITE_WAKEUP)) &&
	    tty->ldisc.write_wakeup)
		(tty->ldisc.write_wakeup)(tty);
	info->flags &= ~TX_WAKEUP;
}

/*
 * This function is used to send a high-priority XON/XOFF character to
 * the device
 */
static void rs_8xx_send_xchar(struct tty_struct *tty, char ch)
{
	volatile cbd_t	*bdp;

	ser_info_t *info = (ser_info_t *)tty->driver_data;

	if (serial_paranoia_check(info, tty->device, "rs_send_char"))
		return;

	bdp = info->tx_cur;
	while (bdp->cbd_sc & BD_SC_READY);

	*((char *)__va(bdp->cbd_bufaddr)) = ch;
	bdp->cbd_datlen = 1;
	bdp->cbd_sc |= BD_SC_READY;

	/* Get next BD.
	*/
	if (bdp->cbd_sc & BD_SC_WRAP)
		bdp = info->tx_bd_base;
	else
		bdp++;

	info->tx_cur = (cbd_t *)bdp;
}

/*
 * ------------------------------------------------------------
 * rs_throttle()
 * 
 * This routine is called by the upper-layer tty layer to signal that
 * incoming characters should be throttled.
 * ------------------------------------------------------------
 */
static void rs_8xx_throttle(struct tty_struct * tty)
{
	ser_info_t *info = (ser_info_t *)tty->driver_data;
#ifdef SERIAL_DEBUG_THROTTLE
	char	buf[64];
	
	printk("throttle %s: %d....\n", _tty_name(tty, buf),
	       tty->ldisc.chars_in_buffer(tty));
#endif

	if (serial_paranoia_check(info, tty->device, "rs_throttle"))
		return;
	
	if (I_IXOFF(tty))
		rs_8xx_send_xchar(tty, STOP_CHAR(tty));

#ifdef modem_control
	if (tty->termios->c_cflag & CRTSCTS)
		info->MCR &= ~UART_MCR_RTS;

	cli();
	serial_out(info, UART_MCR, info->MCR);
	sti();
#endif
}

static void rs_8xx_unthrottle(struct tty_struct * tty)
{
	ser_info_t *info = (ser_info_t *)tty->driver_data;
#ifdef SERIAL_DEBUG_THROTTLE
	char	buf[64];
	
	printk("unthrottle %s: %d....\n", _tty_name(tty, buf),
	       tty->ldisc.chars_in_buffer(tty));
#endif

	if (serial_paranoia_check(info, tty->device, "rs_unthrottle"))
		return;
	
	if (I_IXOFF(tty)) {
		if (info->x_char)
			info->x_char = 0;
		else
			rs_8xx_send_xchar(tty, START_CHAR(tty));
	}
#ifdef modem_control
	if (tty->termios->c_cflag & CRTSCTS)
		info->MCR |= UART_MCR_RTS;
	cli();
	serial_out(info, UART_MCR, info->MCR);
	sti();
#endif
}

/*
 * ------------------------------------------------------------
 * rs_ioctl() and friends
 * ------------------------------------------------------------
 */

#ifdef maybe
/*
 * get_lsr_info - get line status register info
 *
 * Purpose: Let user call ioctl() to get info when the UART physically
 * 	    is emptied.  On bus types like RS485, the transmitter must
 * 	    release the bus after transmitting. This must be done when
 * 	    the transmit shift register is empty, not be done when the
 * 	    transmit holding register is empty.  This functionality
 * 	    allows an RS485 driver to be written in user space. 
 */
static int get_lsr_info(struct async_struct * info, unsigned int *value)
{
	unsigned char status;
	unsigned int result;

	cli();
	status = serial_in(info, UART_LSR);
	sti();
	result = ((status & UART_LSR_TEMT) ? TIOCSER_TEMT : 0);
	return put_user(result,value);
}
#endif

static int get_modem_info(ser_info_t *info, unsigned int *value)
{
	unsigned int result = 0;
#ifdef modem_control
	unsigned char control, status;

	control = info->MCR;
	cli();
	status = serial_in(info, UART_MSR);
	sti();
	result =  ((control & UART_MCR_RTS) ? TIOCM_RTS : 0)
		| ((control & UART_MCR_DTR) ? TIOCM_DTR : 0)
#ifdef TIOCM_OUT1
		| ((control & UART_MCR_OUT1) ? TIOCM_OUT1 : 0)
		| ((control & UART_MCR_OUT2) ? TIOCM_OUT2 : 0)
#endif
		| ((status  & UART_MSR_DCD) ? TIOCM_CAR : 0)
		| ((status  & UART_MSR_RI) ? TIOCM_RNG : 0)
		| ((status  & UART_MSR_DSR) ? TIOCM_DSR : 0)
		| ((status  & UART_MSR_CTS) ? TIOCM_CTS : 0);
#endif
	return put_user(result,value);
}

static int set_modem_info(ser_info_t *info, unsigned int cmd,
			  unsigned int *value)
{
	int error;
	unsigned int arg;

	error = get_user(arg, value);
	if (error)
		return error;
#ifdef modem_control
	switch (cmd) {
	case TIOCMBIS: 
		if (arg & TIOCM_RTS)
			info->MCR |= UART_MCR_RTS;
		if (arg & TIOCM_DTR)
			info->MCR |= UART_MCR_DTR;
#ifdef TIOCM_OUT1
		if (arg & TIOCM_OUT1)
			info->MCR |= UART_MCR_OUT1;
		if (arg & TIOCM_OUT2)
			info->MCR |= UART_MCR_OUT2;
#endif
		break;
	case TIOCMBIC:
		if (arg & TIOCM_RTS)
			info->MCR &= ~UART_MCR_RTS;
		if (arg & TIOCM_DTR)
			info->MCR &= ~UART_MCR_DTR;
#ifdef TIOCM_OUT1
		if (arg & TIOCM_OUT1)
			info->MCR &= ~UART_MCR_OUT1;
		if (arg & TIOCM_OUT2)
			info->MCR &= ~UART_MCR_OUT2;
#endif
		break;
	case TIOCMSET:
		info->MCR = ((info->MCR & ~(UART_MCR_RTS |
#ifdef TIOCM_OUT1
					    UART_MCR_OUT1 |
					    UART_MCR_OUT2 |
#endif
					    UART_MCR_DTR))
			     | ((arg & TIOCM_RTS) ? UART_MCR_RTS : 0)
#ifdef TIOCM_OUT1
			     | ((arg & TIOCM_OUT1) ? UART_MCR_OUT1 : 0)
			     | ((arg & TIOCM_OUT2) ? UART_MCR_OUT2 : 0)
#endif
			     | ((arg & TIOCM_DTR) ? UART_MCR_DTR : 0));
		break;
	default:
		return -EINVAL;
	}
	cli();
	serial_out(info, UART_MCR, info->MCR);
	sti();
#endif
	return 0;
}

/* Sending a break is a two step process on the SMC/SCC.  It is accomplished
 * by sending a STOP TRANSMIT command followed by a RESTART TRANSMIT
 * command.  We take advantage of the begin/end functions to make this
 * happen.
 */
static void begin_break(ser_info_t *info)
{
	volatile cpm8260_t *cp;
	uint	page, sblock;
	ushort	num;

	cp = cpmp;

	if ((num = info->state->smc_scc_num) < SCC_NUM_BASE) {
		if (num == 0) {
			page = CPM_CR_SMC1_PAGE;
			sblock = CPM_CR_SMC1_SBLOCK;
		}
		else {
			page = CPM_CR_SMC2_PAGE;
			sblock = CPM_CR_SMC2_SBLOCK;
		}
	}
	else {
		num -= SCC_NUM_BASE;
		switch (num) {
		case 0:
			page = CPM_CR_SCC1_PAGE;
			sblock = CPM_CR_SCC1_SBLOCK;
			break;
		case 1:
			page = CPM_CR_SCC2_PAGE;
			sblock = CPM_CR_SCC2_SBLOCK;
			break;
		case 2:
			page = CPM_CR_SCC3_PAGE;
			sblock = CPM_CR_SCC3_SBLOCK;
			break;
		case 3:
			page = CPM_CR_SCC4_PAGE;
			sblock = CPM_CR_SCC4_SBLOCK;
			break;
		default: return;
		}
	}
	cp->cp_cpcr = mk_cr_cmd(page, sblock, 0, CPM_CR_STOP_TX) | CPM_CR_FLG;
	while (cp->cp_cpcr & CPM_CR_FLG);
}

static void end_break(ser_info_t *info)
{
	volatile cpm8260_t *cp;
	uint	page, sblock;
	ushort	num;

	cp = cpmp;

	if ((num = info->state->smc_scc_num) < SCC_NUM_BASE) {
		if (num == 0) {
			page = CPM_CR_SMC1_PAGE;
			sblock = CPM_CR_SMC1_SBLOCK;
		}
		else {
			page = CPM_CR_SMC2_PAGE;
			sblock = CPM_CR_SMC2_SBLOCK;
		}
	}
	else {
		num -= SCC_NUM_BASE;
		switch (num) {
		case 0:
			page = CPM_CR_SCC1_PAGE;
			sblock = CPM_CR_SCC1_SBLOCK;
			break;
		case 1:
			page = CPM_CR_SCC2_PAGE;
			sblock = CPM_CR_SCC2_SBLOCK;
			break;
		case 2:
			page = CPM_CR_SCC3_PAGE;
			sblock = CPM_CR_SCC3_SBLOCK;
			break;
		case 3:
			page = CPM_CR_SCC4_PAGE;
			sblock = CPM_CR_SCC4_SBLOCK;
			break;
		default: return;
		}
	}
	cp->cp_cpcr = mk_cr_cmd(page, sblock, 0, CPM_CR_RESTART_TX) | CPM_CR_FLG;
	while (cp->cp_cpcr & CPM_CR_FLG);
}

/*
 * This routine sends a break character out the serial port.
 */
static void send_break(ser_info_t *info, int duration)
{
	current->state = TASK_INTERRUPTIBLE;
#ifdef SERIAL_DEBUG_SEND_BREAK
	printk("rs_send_break(%d) jiff=%lu...", duration, jiffies);
#endif
	begin_break(info);
	schedule_timeout(duration);
	end_break(info);
#ifdef SERIAL_DEBUG_SEND_BREAK
	printk("done jiffies=%lu\n", jiffies);
#endif
}


static int rs_8xx_ioctl(struct tty_struct *tty, struct file * file,
		    unsigned int cmd, unsigned long arg)
{
	int error;
	ser_info_t *info = (ser_info_t *)tty->driver_data;
	int retval;
	struct async_icount cnow;	/* kernel counter temps */
	struct serial_icounter_struct *p_cuser;	/* user space */

	if (serial_paranoia_check(info, tty->device, "rs_ioctl"))
		return -ENODEV;

	if ((cmd != TIOCMIWAIT) && (cmd != TIOCGICOUNT)) {
		if (tty->flags & (1 << TTY_IO_ERROR))
		    return -EIO;
	}
	
	switch (cmd) {
		case TCSBRK:	/* SVID version: non-zero arg --> no break */
			retval = tty_check_change(tty);
			if (retval)
				return retval;
			tty_wait_until_sent(tty, 0);
			if (signal_pending(current))
				return -EINTR;
			if (!arg) {
				send_break(info, HZ/4);	/* 1/4 second */
				if (signal_pending(current))
					return -EINTR;
			}
			return 0;
		case TCSBRKP:	/* support for POSIX tcsendbreak() */
			retval = tty_check_change(tty);
			if (retval)
				return retval;
			tty_wait_until_sent(tty, 0);
			if (signal_pending(current))
				return -EINTR;
			send_break(info, arg ? arg*(HZ/10) : HZ/4);
			if (signal_pending(current))
				return -EINTR;
			return 0;
		case TIOCSBRK:
			retval = tty_check_change(tty);
			if (retval)
				return retval;
			tty_wait_until_sent(tty, 0);
			begin_break(info);
			return 0;
		case TIOCCBRK:
			retval = tty_check_change(tty);
			if (retval)
				return retval;
			end_break(info);
			return 0;
		case TIOCGSOFTCAR:
			return put_user(C_CLOCAL(tty) ? 1 : 0, (int *) arg);
		case TIOCSSOFTCAR:
			error = get_user(arg, (unsigned int *) arg);
			if (error)
				return error;
			tty->termios->c_cflag =
				((tty->termios->c_cflag & ~CLOCAL) |
				 (arg ? CLOCAL : 0));
			return 0;
		case TIOCMGET:
			return get_modem_info(info, (unsigned int *) arg);
		case TIOCMBIS:
		case TIOCMBIC:
		case TIOCMSET:
			return set_modem_info(info, cmd, (unsigned int *) arg);
#ifdef maybe
		case TIOCSERGETLSR: /* Get line status register */
			return get_lsr_info(info, (unsigned int *) arg);
#endif
		/*
		 * Wait for any of the 4 modem inputs (DCD,RI,DSR,CTS) to change
		 * - mask passed in arg for lines of interest
 		 *   (use |'ed TIOCM_RNG/DSR/CD/CTS for masking)
		 * Caller should use TIOCGICOUNT to see which one it was
		 */
		 case TIOCMIWAIT:
#ifdef modem_control
			cli();
			/* note the counters on entry */
			cprev = info->state->icount;
			sti();
			while (1) {
				interruptible_sleep_on(&info->delta_msr_wait);
				/* see if a signal did it */
				if (signal_pending(current))
					return -ERESTARTSYS;
				cli();
				cnow = info->state->icount; /* atomic copy */
				sti();
				if (cnow.rng == cprev.rng && cnow.dsr == cprev.dsr && 
				    cnow.dcd == cprev.dcd && cnow.cts == cprev.cts)
					return -EIO; /* no change => error */
				if ( ((arg & TIOCM_RNG) && (cnow.rng != cprev.rng)) ||
				     ((arg & TIOCM_DSR) && (cnow.dsr != cprev.dsr)) ||
				     ((arg & TIOCM_CD)  && (cnow.dcd != cprev.dcd)) ||
				     ((arg & TIOCM_CTS) && (cnow.cts != cprev.cts)) ) {
					return 0;
				}
				cprev = cnow;
			}
			/* NOTREACHED */
#else
			return 0;
#endif

		/* 
		 * Get counter of input serial line interrupts (DCD,RI,DSR,CTS)
		 * Return: write counters to the user passed counter struct
		 * NB: both 1->0 and 0->1 transitions are counted except for
		 *     RI where only 0->1 is counted.
		 */
		case TIOCGICOUNT:
			cli();
			cnow = info->state->icount;
			sti();
			p_cuser = (struct serial_icounter_struct *) arg;
			error = put_user(cnow.cts, &p_cuser->cts);
			if (error) return error;
			error = put_user(cnow.dsr, &p_cuser->dsr);
			if (error) return error;
			error = put_user(cnow.rng, &p_cuser->rng);
			if (error) return error;
			error = put_user(cnow.dcd, &p_cuser->dcd);
			if (error) return error;
			return 0;

		default:
			return -ENOIOCTLCMD;
		}
	return 0;
}

/* FIX UP modem control here someday......
*/
static void rs_8xx_set_termios(struct tty_struct *tty, struct termios *old_termios)
{
	ser_info_t *info = (ser_info_t *)tty->driver_data;

	if (   (tty->termios->c_cflag == old_termios->c_cflag)
	    && (   RELEVANT_IFLAG(tty->termios->c_iflag) 
		== RELEVANT_IFLAG(old_termios->c_iflag)))
	  return;

	change_speed(info);

#ifdef modem_control
	/* Handle transition to B0 status */
	if ((old_termios->c_cflag & CBAUD) &&
	    !(tty->termios->c_cflag & CBAUD)) {
		info->MCR &= ~(UART_MCR_DTR|UART_MCR_RTS);
		cli();
		serial_out(info, UART_MCR, info->MCR);
		sti();
	}
	
	/* Handle transition away from B0 status */
	if (!(old_termios->c_cflag & CBAUD) &&
	    (tty->termios->c_cflag & CBAUD)) {
		info->MCR |= UART_MCR_DTR;
		if (!tty->hw_stopped ||
		    !(tty->termios->c_cflag & CRTSCTS)) {
			info->MCR |= UART_MCR_RTS;
		}
		cli();
		serial_out(info, UART_MCR, info->MCR);
		sti();
	}
	
	/* Handle turning off CRTSCTS */
	if ((old_termios->c_cflag & CRTSCTS) &&
	    !(tty->termios->c_cflag & CRTSCTS)) {
		tty->hw_stopped = 0;
		rs_8xx_start(tty);
	}
#endif

#if 0
	/*
	 * No need to wake up processes in open wait, since they
	 * sample the CLOCAL flag once, and don't recheck it.
	 * XXX  It's not clear whether the current behavior is correct
	 * or not.  Hence, this may change.....
	 */
	if (!(old_termios->c_cflag & CLOCAL) &&
	    (tty->termios->c_cflag & CLOCAL))
		wake_up_interruptible(&info->open_wait);
#endif
}

/*
 * ------------------------------------------------------------
 * rs_close()
 * 
 * This routine is called when the serial port gets closed.  First, we
 * wait for the last remaining data to be sent.  Then, we unlink its
 * async structure from the interrupt chain if necessary, and we free
 * that IRQ if nothing is left in the chain.
 * ------------------------------------------------------------
 */
static void rs_8xx_close(struct tty_struct *tty, struct file * filp)
{
	ser_info_t *info = (ser_info_t *)tty->driver_data;
	struct serial_state *state;
	unsigned long	flags;
	int		idx;
	volatile smc_t	*smcp;
	volatile scc_t	*sccp;

	if (!info || serial_paranoia_check(info, tty->device, "rs_close"))
		return;

	state = info->state;
	
	save_flags(flags); cli();
	
	if (tty_hung_up_p(filp)) {
		DBG_CNT("before DEC-hung");
		MOD_DEC_USE_COUNT;
		restore_flags(flags);
		return;
	}
	
#ifdef SERIAL_DEBUG_OPEN
	printk("rs_close ttys%d, count = %d\n", info->line, state->count);
#endif
	if ((tty->count == 1) && (state->count != 1)) {
		/*
		 * Uh, oh.  tty->count is 1, which means that the tty
		 * structure will be freed.  state->count should always
		 * be one in these conditions.  If it's greater than
		 * one, we've got real problems, since it means the
		 * serial port won't be shutdown.
		 */
		printk("rs_close: bad serial port count; tty->count is 1, "
		       "state->count is %d\n", state->count);
		state->count = 1;
	}
	if (--state->count < 0) {
		printk("rs_close: bad serial port count for ttys%d: %d\n",
		       info->line, state->count);
		state->count = 0;
	}
	if (state->count) {
		DBG_CNT("before DEC-2");
		MOD_DEC_USE_COUNT;
		restore_flags(flags);
		return;
	}
	info->flags |= ASYNC_CLOSING;
	/*
	 * Save the termios structure, since this port may have
	 * separate termios for callout and dialin.
	 */
	if (info->flags & ASYNC_NORMAL_ACTIVE)
		info->state->normal_termios = *tty->termios;
	if (info->flags & ASYNC_CALLOUT_ACTIVE)
		info->state->callout_termios = *tty->termios;
	/*
	 * Now we wait for the transmit buffer to clear; and we notify 
	 * the line discipline to only process XON/XOFF characters.
	 */
	tty->closing = 1;
	if (info->closing_wait != ASYNC_CLOSING_WAIT_NONE)
		tty_wait_until_sent(tty, info->closing_wait);
	/*
	 * At this point we stop accepting input.  To do this, we
	 * disable the receive line status interrupts, and tell the
	 * interrupt driver to stop checking the data ready bit in the
	 * line status register.
	 */
	info->read_status_mask &= ~BD_SC_EMPTY;
	if (info->flags & ASYNC_INITIALIZED) {
		if ((idx = info->state->smc_scc_num) < SCC_NUM_BASE) {
			smcp = &immr->im_smc[idx];
			smcp->smc_smcm &= ~SMCM_RX;
			smcp->smc_smcmr &= ~SMCMR_REN;
		}
		else {
			sccp = &immr->im_scc[idx - SCC_IDX_BASE];
			sccp->scc_sccm &= ~UART_SCCM_RX;
			sccp->scc_gsmrl &= ~SCC_GSMRL_ENR;
		}
		/*
		 * Before we drop DTR, make sure the UART transmitter
		 * has completely drained; this is especially
		 * important if there is a transmit FIFO!
		 */
		rs_8xx_wait_until_sent(tty, info->timeout);
	}
	shutdown(info);
	if (tty->driver.flush_buffer)
		tty->driver.flush_buffer(tty);
	if (tty->ldisc.flush_buffer)
		tty->ldisc.flush_buffer(tty);
	tty->closing = 0;
	info->event = 0;
	info->tty = 0;
	if (info->blocked_open) {
		if (info->close_delay) {
			current->state = TASK_INTERRUPTIBLE;
			schedule_timeout(info->close_delay);
		}
		wake_up_interruptible(&info->open_wait);
	}
	info->flags &= ~(ASYNC_NORMAL_ACTIVE|ASYNC_CALLOUT_ACTIVE|
			 ASYNC_CLOSING);
	wake_up_interruptible(&info->close_wait);
	MOD_DEC_USE_COUNT;
	restore_flags(flags);
}

/*
 * rs_wait_until_sent() --- wait until the transmitter is empty
 */
static void rs_8xx_wait_until_sent(struct tty_struct *tty, int timeout)
{
	ser_info_t *info = (ser_info_t *)tty->driver_data;
	unsigned long orig_jiffies, char_time;
	/*int lsr;*/
	volatile cbd_t *bdp;
	
	if (serial_paranoia_check(info, tty->device, "rs_wait_until_sent"))
		return;

#ifdef maybe
	if (info->state->type == PORT_UNKNOWN)
		return;
#endif

	orig_jiffies = jiffies;
	/*
	 * Set the check interval to be 1/5 of the estimated time to
	 * send a single character, and make it at least 1.  The check
	 * interval should also be less than the timeout.
	 * 
	 * Note: we have to use pretty tight timings here to satisfy
	 * the NIST-PCTS.
	 */
	char_time = 1;
	if (timeout)
		char_time = MIN(char_time, timeout);
#ifdef SERIAL_DEBUG_RS_WAIT_UNTIL_SENT
	printk("In rs_wait_until_sent(%d) check=%lu...", timeout, char_time);
	printk("jiff=%lu...", jiffies);
#endif

	/* We go through the loop at least once because we can't tell
	 * exactly when the last character exits the shifter.  There can
	 * be at least two characters waiting to be sent after the buffers
	 * are empty.
	 */
	do {
#ifdef SERIAL_DEBUG_RS_WAIT_UNTIL_SENT
		printk("lsr = %d (jiff=%lu)...", lsr, jiffies);
#endif
		current->state = TASK_INTERRUPTIBLE;
/*		current->counter = 0;	 make us low-priority */
		schedule_timeout(char_time);
		if (signal_pending(current))
			break;
		if (timeout && time_after(jiffies, orig_jiffies + timeout))
			break;
		bdp = info->tx_cur;
	} while (bdp->cbd_sc & BD_SC_READY);
	current->state = TASK_RUNNING;
#ifdef SERIAL_DEBUG_RS_WAIT_UNTIL_SENT
	printk("lsr = %d (jiff=%lu)...done\n", lsr, jiffies);
#endif
}

/*
 * rs_hangup() --- called by tty_hangup() when a hangup is signaled.
 */
static void rs_8xx_hangup(struct tty_struct *tty)
{
	ser_info_t *info = (ser_info_t *)tty->driver_data;
	struct serial_state *state = info->state;
	
	if (serial_paranoia_check(info, tty->device, "rs_hangup"))
		return;

	state = info->state;
	
	rs_8xx_flush_buffer(tty);
	shutdown(info);
	info->event = 0;
	state->count = 0;
	info->flags &= ~(ASYNC_NORMAL_ACTIVE|ASYNC_CALLOUT_ACTIVE);
	info->tty = 0;
	wake_up_interruptible(&info->open_wait);
}

/*
 * ------------------------------------------------------------
 * rs_open() and friends
 * ------------------------------------------------------------
 */
static int block_til_ready(struct tty_struct *tty, struct file * filp,
			   ser_info_t *info)
{
#ifdef DO_THIS_LATER
	DECLARE_WAITQUEUE(wait, current);
#endif
	struct serial_state *state = info->state;
	int		retval;
	int		do_clocal = 0;

	/*
	 * If the device is in the middle of being closed, then block
	 * until it's done, and then try again.
	 */
	if (tty_hung_up_p(filp) ||
	    (info->flags & ASYNC_CLOSING)) {
		if (info->flags & ASYNC_CLOSING)
			interruptible_sleep_on(&info->close_wait);
#ifdef SERIAL_DO_RESTART
		if (info->flags & ASYNC_HUP_NOTIFY)
			return -EAGAIN;
		else
			return -ERESTARTSYS;
#else
		return -EAGAIN;
#endif
	}

	/*
	 * If this is a callout device, then just make sure the normal
	 * device isn't being used.
	 */
	if (tty->driver.subtype == SERIAL_TYPE_CALLOUT) {
		if (info->flags & ASYNC_NORMAL_ACTIVE)
			return -EBUSY;
		if ((info->flags & ASYNC_CALLOUT_ACTIVE) &&
		    (info->flags & ASYNC_SESSION_LOCKOUT) &&
		    (info->session != current->session))
		    return -EBUSY;
		if ((info->flags & ASYNC_CALLOUT_ACTIVE) &&
		    (info->flags & ASYNC_PGRP_LOCKOUT) &&
		    (info->pgrp != current->pgrp))
		    return -EBUSY;
		info->flags |= ASYNC_CALLOUT_ACTIVE;
		return 0;
	}
	
	/*
	 * If non-blocking mode is set, or the port is not enabled,
	 * then make the check up front and then exit.
	 * If this is an SMC port, we don't have modem control to wait
	 * for, so just get out here.
	 */
	if ((filp->f_flags & O_NONBLOCK) ||
	    (tty->flags & (1 << TTY_IO_ERROR)) ||
	    (info->state->smc_scc_num < SCC_NUM_BASE)) {
		if (info->flags & ASYNC_CALLOUT_ACTIVE)
			return -EBUSY;
		info->flags |= ASYNC_NORMAL_ACTIVE;
		return 0;
	}

	if (info->flags & ASYNC_CALLOUT_ACTIVE) {
		if (state->normal_termios.c_cflag & CLOCAL)
			do_clocal = 1;
	} else {
		if (tty->termios->c_cflag & CLOCAL)
			do_clocal = 1;
	}
	
	/*
	 * Block waiting for the carrier detect and the line to become
	 * free (i.e., not in use by the callout).  While we are in
	 * this loop, state->count is dropped by one, so that
	 * rs_close() knows when to free things.  We restore it upon
	 * exit, either normal or abnormal.
	 */
	retval = 0;
#ifdef DO_THIS_LATER
	add_wait_queue(&info->open_wait, &wait);
#ifdef SERIAL_DEBUG_OPEN
	printk("block_til_ready before block: ttys%d, count = %d\n",
	       state->line, state->count);
#endif
	cli();
	if (!tty_hung_up_p(filp)) 
		state->count--;
	sti();
	info->blocked_open++;
	while (1) {
		cli();
		if (!(info->flags & ASYNC_CALLOUT_ACTIVE) &&
		    (tty->termios->c_cflag & CBAUD))
			serial_out(info, UART_MCR,
				   serial_inp(info, UART_MCR) |
				   (UART_MCR_DTR | UART_MCR_RTS));
		sti();
		set_current_state(TASK_INTERRUPTIBLE);
		if (tty_hung_up_p(filp) ||
		    !(info->flags & ASYNC_INITIALIZED)) {
#ifdef SERIAL_DO_RESTART
			if (info->flags & ASYNC_HUP_NOTIFY)
				retval = -EAGAIN;
			else
				retval = -ERESTARTSYS;	
#else
			retval = -EAGAIN;
#endif
			break;
		}
		if (!(info->flags & ASYNC_CALLOUT_ACTIVE) &&
		    !(info->flags & ASYNC_CLOSING) &&
		    (do_clocal || (serial_in(info, UART_MSR) &
				   UART_MSR_DCD)))
			break;
		if (signal_pending(current)) {
			retval = -ERESTARTSYS;
			break;
		}
#ifdef SERIAL_DEBUG_OPEN
		printk("block_til_ready blocking: ttys%d, count = %d\n",
		       info->line, state->count);
#endif
		schedule();
	}
	current->state = TASK_RUNNING;
	remove_wait_queue(&info->open_wait, &wait);
	if (!tty_hung_up_p(filp))
		state->count++;
	info->blocked_open--;
#ifdef SERIAL_DEBUG_OPEN
	printk("block_til_ready after blocking: ttys%d, count = %d\n",
	       info->line, state->count);
#endif
#endif /* DO_THIS_LATER */
	if (retval)
		return retval;
	info->flags |= ASYNC_NORMAL_ACTIVE;
	return 0;
}

static int get_async_struct(int line, ser_info_t **ret_info)
{
	struct serial_state *sstate;

	sstate = rs_table + line;
	if (sstate->info) {
		sstate->count++;
		*ret_info = (ser_info_t *)sstate->info;
		return 0;
	}
	else {
		return -ENOMEM;
	}
}

/*
 * This routine is called whenever a serial port is opened.  It
 * enables interrupts for a serial port, linking in its async structure into
 * the IRQ chain.   It also performs the serial-specific
 * initialization for the tty structure.
 */
static int rs_8xx_open(struct tty_struct *tty, struct file * filp)
{
	ser_info_t	*info;
	int 		retval, line;

	line = MINOR(tty->device) - tty->driver.minor_start;
	if ((line < 0) || (line >= NR_PORTS))
		return -ENODEV;
	retval = get_async_struct(line, &info);
	if (retval)
		return retval;
	if (serial_paranoia_check(info, tty->device, "rs_open"))
		return -ENODEV;

#ifdef SERIAL_DEBUG_OPEN
	printk("rs_open %s%d, count = %d\n", tty->driver.name, info->line,
	       info->state->count);
#endif
	tty->driver_data = info;
	info->tty = tty;

	/*
	 * Start up serial port
	 */
	retval = startup(info);
	if (retval)
		return retval;

	MOD_INC_USE_COUNT;
	retval = block_til_ready(tty, filp, info);
	if (retval) {
#ifdef SERIAL_DEBUG_OPEN
		printk("rs_open returning after block_til_ready with %d\n",
		       retval);
#endif
		return retval;
	}

	if ((info->state->count == 1) &&
	    (info->flags & ASYNC_SPLIT_TERMIOS)) {
		if (tty->driver.subtype == SERIAL_TYPE_NORMAL)
			*tty->termios = info->state->normal_termios;
		else 
			*tty->termios = info->state->callout_termios;
		change_speed(info);
	}

	info->session = current->session;
	info->pgrp = current->pgrp;

#ifdef SERIAL_DEBUG_OPEN
	printk("rs_open ttys%d successful...", info->line);
#endif
	return 0;
}

/*
 * /proc fs routines....
 */

static int inline line_info(char *buf, struct serial_state *state)
{
#ifdef notdef
	struct async_struct *info = state->info, scr_info;
	char	stat_buf[30], control, status;
#endif
	int	ret;

	ret = sprintf(buf, "%d: uart:%s port:%X irq:%d",
		      state->line,
		      (state->smc_scc_num < SCC_NUM_BASE) ? "SMC" : "SCC",
		      state->port, state->irq);

	if (!state->port || (state->type == PORT_UNKNOWN)) {
		ret += sprintf(buf+ret, "\n");
		return ret;
	}

#ifdef notdef
	/*
	 * Figure out the current RS-232 lines
	 */
	if (!info) {
		info = &scr_info;	/* This is just for serial_{in,out} */

		info->magic = SERIAL_MAGIC;
		info->port = state->port;
		info->flags = state->flags;
		info->quot = 0;
		info->tty = 0;
	}
	cli();
	status = serial_in(info, UART_MSR);
	control = info ? info->MCR : serial_in(info, UART_MCR);
	sti();
	
	stat_buf[0] = 0;
	stat_buf[1] = 0;
	if (control & UART_MCR_RTS)
		strcat(stat_buf, "|RTS");
	if (status & UART_MSR_CTS)
		strcat(stat_buf, "|CTS");
	if (control & UART_MCR_DTR)
		strcat(stat_buf, "|DTR");
	if (status & UART_MSR_DSR)
		strcat(stat_buf, "|DSR");
	if (status & UART_MSR_DCD)
		strcat(stat_buf, "|CD");
	if (status & UART_MSR_RI)
		strcat(stat_buf, "|RI");

	if (info->quot) {
		ret += sprintf(buf+ret, " baud:%d",
			       state->baud_base / info->quot);
	}

	ret += sprintf(buf+ret, " tx:%d rx:%d",
		      state->icount.tx, state->icount.rx);

	if (state->icount.frame)
		ret += sprintf(buf+ret, " fe:%d", state->icount.frame);
	
	if (state->icount.parity)
		ret += sprintf(buf+ret, " pe:%d", state->icount.parity);
	
	if (state->icount.brk)
		ret += sprintf(buf+ret, " brk:%d", state->icount.brk);	

	if (state->icount.overrun)
		ret += sprintf(buf+ret, " oe:%d", state->icount.overrun);

	/*
	 * Last thing is the RS-232 status lines
	 */
	ret += sprintf(buf+ret, " %s\n", stat_buf+1);
#endif
	return ret;
}

int rs_8xx_read_proc(char *page, char **start, off_t off, int count,
		 int *eof, void *data)
{
	int i, len = 0;
	off_t	begin = 0;

	len += sprintf(page, "serinfo:1.0 driver:%s\n", serial_version);
	for (i = 0; i < NR_PORTS && len < 4000; i++) {
		len += line_info(page + len, &rs_table[i]);
		if (len+begin > off+count)
			goto done;
		if (len+begin < off) {
			begin += len;
			len = 0;
		}
	}
	*eof = 1;
done:
	if (off >= len+begin)
		return 0;
	*start = page + (begin-off);
	return ((count < begin+len-off) ? count : begin+len-off);
}

/*
 * ---------------------------------------------------------------------
 * rs_init() and friends
 *
 * rs_init() is called at boot-time to initialize the serial driver.
 * ---------------------------------------------------------------------
 */

/*
 * This routine prints out the appropriate serial driver version
 * number, and identifies which options were configured into this
 * driver.
 */
static _INLINE_ void show_serial_version(void)
{
 	printk(KERN_INFO "%s version %s\n", serial_name, serial_version);
}


/*
 * The serial console driver used during boot.  Note that these names
 * clash with those found in "serial.c", so we currently can't support
 * the 16xxx uarts and these at the same time.  I will fix this to become
 * an indirect function call from tty_io.c (or something).
 */

#ifdef CONFIG_SERIAL_CONSOLE

/*
 * Print a string to the serial port trying not to disturb any possible
 * real use of the port...
 */
static void serial_console_write(struct console *c, const char *s,
				unsigned count)
{
	struct		serial_state	*ser;
	ser_info_t			*info;
	unsigned			i;
	volatile	cbd_t		*bdp, *bdbase;
	volatile	smc_uart_t	*up;
	volatile	u_char		*cp;

	ser = rs_table + c->index;

	/* If the port has been initialized for general use, we have
	 * to use the buffer descriptors allocated there.  Otherwise,
	 * we simply use the single buffer allocated.
	 */
	if ((info = (ser_info_t *)ser->info) != NULL) {
		bdp = info->tx_cur;
		bdbase = info->tx_bd_base;
	}
	else {
		/* Pointer to UART in parameter ram.
		*/
		up = (smc_uart_t *)&immr->im_dprambase[ser->port];

		/* Get the address of the host memory buffer.
		 */
		bdp = bdbase = (cbd_t *)&immr->im_dprambase[up->smc_tbase];
	}

	/*
	 * We need to gracefully shut down the transmitter, disable
	 * interrupts, then send our bytes out.
	 */

	/*
	 * Now, do each character.  This is not as bad as it looks
	 * since this is a holding FIFO and not a transmitting FIFO.
	 * We could add the complexity of filling the entire transmit
	 * buffer, but we would just wait longer between accesses......
	 */
	for (i = 0; i < count; i++, s++) {
		/* Wait for transmitter fifo to empty.
		 * Ready indicates output is ready, and xmt is doing
		 * that, not that it is ready for us to send.
		 */
		while (bdp->cbd_sc & BD_SC_READY);
		/* Send the character out. */
		cp = __va(bdp->cbd_bufaddr);
		*cp = *s;
		
		bdp->cbd_datlen = 1;
		bdp->cbd_sc |= BD_SC_READY;

		if (bdp->cbd_sc & BD_SC_WRAP)
			bdp = bdbase;
		else
			bdp++;

		/* if a LF, also do CR... */
		if (*s == 10) {
			while (bdp->cbd_sc & BD_SC_READY);
			cp = __va(bdp->cbd_bufaddr);
			*cp = 13;
			bdp->cbd_datlen = 1;
			bdp->cbd_sc |= BD_SC_READY;

			if (bdp->cbd_sc & BD_SC_WRAP) {
				bdp = bdbase;
			}
			else {
				bdp++;
			}
		}
	}

	/*
	 * Finally, Wait for transmitter & holding register to empty
	 *  and restore the IER
	 */
	while (bdp->cbd_sc & BD_SC_READY);

	if (info)
		info->tx_cur = (cbd_t *)bdp;
}

/*
 * Receive character from the serial port.  This only works well
 * before the port is initialize for real use.
 */
static int serial_console_wait_key(struct console *co)
{
	struct serial_state		*ser;
	u_char				c, *cp;
	ser_info_t			*info;
	volatile	cbd_t		*bdp;
	volatile	smc_uart_t	*up;

	ser = rs_table + co->index;

	/* Pointer to UART in parameter ram.
	*/
	up = (smc_uart_t *)&immr->im_dprambase[ser->port];

	/* Get the address of the host memory buffer.
	 * If the port has been initialized for general use, we must
	 * use information from the port structure.
	 */
	if ((info = (ser_info_t *)ser->info))
		bdp = info->rx_cur;
	else
		bdp = (cbd_t *)&immr->im_dprambase[up->smc_rbase];

	/*
	 * We need to gracefully shut down the receiver, disable
	 * interrupts, then read the input.
	 */
	while (bdp->cbd_sc & BD_SC_EMPTY);	/* Wait for a character */
	cp = __va(bdp->cbd_bufaddr);

	if (info) {
		if (bdp->cbd_sc & BD_SC_WRAP) {
			bdp = info->rx_bd_base;
		}
		else {
			bdp++;
		}
		info->rx_cur = (cbd_t *)bdp;
	}

	c = *cp;
	return((int)c);
}

static kdev_t serial_console_device(struct console *c)
{
	return MKDEV(TTYAUX_MAJOR, 64 + c->index);
}


static struct console sercons = {
	name:		"ttyS",
	write:		serial_console_write,
	device:		serial_console_device,
	wait_key:	serial_console_wait_key,
	setup:		serial_console_setup,
	flags:		CON_PRINTBUFFER,
	index:		CONFIG_SERIAL_CONSOLE_PORT,
};

/*
 *	Register console.
 */
long __init console_8xx_init(long kmem_start, long kmem_end)
{
	register_console(&sercons);
	return kmem_start;
}

#endif

/* Default console baud rate as determined by the board information
 * structure.
 */
static	int	baud_idx;

/*
 * The serial driver boot-time initialization code!
 */
int __init rs_8xx_init(void)
{
	struct serial_state * state;
	ser_info_t	*info;
	uint		mem_addr, dp_addr;
	int		i, j, idx;
	uint		page, sblock;
	volatile	cbd_t		*bdp;
	volatile	cpm8260_t	*cp;
	volatile	smc_t		*sp;
	volatile	smc_uart_t	*up;
	volatile	scc_t		*scp;
	volatile	scc_uart_t	*sup;
	volatile	immap_t		*immap;
	volatile	iop8260_t	*io;
	
	init_bh(SERIAL_BH, do_serial_bh);

	show_serial_version();

	/* Initialize the tty_driver structure */
	
	/*memset(&serial_driver, 0, sizeof(struct tty_driver));*/
	__clear_user(&serial_driver,sizeof(struct tty_driver));
	serial_driver.magic = TTY_DRIVER_MAGIC;
	serial_driver.driver_name = "serial";
#ifdef CONFIG_DEVFS_FS
	serial_driver.name = "tts/%d";
#else
	serial_driver.name = "ttyS";
#endif
	serial_driver.major = TTY_MAJOR;
	serial_driver.minor_start = 64;
	serial_driver.num = NR_PORTS;
	serial_driver.type = TTY_DRIVER_TYPE_SERIAL;
	serial_driver.subtype = SERIAL_TYPE_NORMAL;
	serial_driver.init_termios = tty_std_termios;
	serial_driver.init_termios.c_cflag =
		baud_idx | CS8 | CREAD | HUPCL | CLOCAL;
	serial_driver.flags = TTY_DRIVER_REAL_RAW;
	serial_driver.refcount = &serial_refcount;
	serial_driver.table = serial_table;
	serial_driver.termios = serial_termios;
	serial_driver.termios_locked = serial_termios_locked;

	serial_driver.open = rs_8xx_open;
	serial_driver.close = rs_8xx_close;
	serial_driver.write = rs_8xx_write;
	serial_driver.put_char = rs_8xx_put_char;
	serial_driver.write_room = rs_8xx_write_room;
	serial_driver.chars_in_buffer = rs_8xx_chars_in_buffer;
	serial_driver.flush_buffer = rs_8xx_flush_buffer;
	serial_driver.ioctl = rs_8xx_ioctl;
	serial_driver.throttle = rs_8xx_throttle;
	serial_driver.unthrottle = rs_8xx_unthrottle;
	serial_driver.send_xchar = rs_8xx_send_xchar;
	serial_driver.set_termios = rs_8xx_set_termios;
	serial_driver.stop = rs_8xx_stop;
	serial_driver.start = rs_8xx_start;
	serial_driver.hangup = rs_8xx_hangup;
	serial_driver.wait_until_sent = rs_8xx_wait_until_sent;
	serial_driver.read_proc = rs_8xx_read_proc;
	
	/*
	 * The callout device is just like normal device except for
	 * major number and the subtype code.
	 */
	callout_driver = serial_driver;
#ifdef CONFIG_DEVFS_FS
	callout_driver.name = "cua/%d";
#else
	callout_driver.name = "cua";
#endif
	callout_driver.major = TTYAUX_MAJOR;
	callout_driver.subtype = SERIAL_TYPE_CALLOUT;
	callout_driver.read_proc = 0;
	callout_driver.proc_entry = 0;

	if (tty_register_driver(&serial_driver))
		panic("Couldn't register serial driver\n");
	if (tty_register_driver(&callout_driver))
		panic("Couldn't register callout driver\n");
	
	immap = immr;
	cp = &immap->im_cpm;
	io = &immap->im_ioport;

	/* This should have been done long ago by the early boot code,
	 * but do it again to make sure.
	 */
	*(ushort *)(&immap->im_dprambase[PROFF_SMC1_BASE]) = PROFF_SMC1;
	*(ushort *)(&immap->im_dprambase[PROFF_SMC2_BASE]) = PROFF_SMC2;

	/* Geeze, here we go....Picking I/O port bits....Lots of
	 * choices.  If you don't like mine, pick your own.
	 * Configure SMCs Tx/Rx.  SMC1 is only on Port D, SMC2 is
	 * only on Port A.  You either pick 'em, or not.
	 */
	io->iop_ppard |= 0x00c00000;
	io->iop_pdird |= 0x00400000;
	io->iop_pdird &= ~0x00800000;
	io->iop_psord &= ~0x00c00000;
#if USE_SMC2
	io->iop_ppara |= 0x00c00000;
	io->iop_pdira |= 0x00400000;
	io->iop_pdira &= ~0x00800000;
	io->iop_psora &= ~0x00c00000;
#endif

	/* Configure SCC2 and SCC3.  Be careful about the fine print.
	 * Secondary options are only available when you take away
	 * the primary option.  Unless the pins are used for something
	 * else, SCC2 and SCC3 are on Port B.
	 *	Port B,  8 - SCC3 TxD
	 *	Port B, 12 - SCC2 TxD
	 *	Port B, 14 - SCC3 RxD
	 *	Port B, 15 - SCC2 RxD
	 */
	io->iop_pparb |= 0x008b0000;
	io->iop_pdirb |= 0x00880000;
	io->iop_psorb |= 0x00880000;
	io->iop_pdirb &= ~0x00030000;
	io->iop_psorb &= ~0x00030000;

	/* Wire BRG1 to SMC1 and BRG2 to SMC2.
	*/
	immap->im_cpmux.cmx_smr = 0;

	/* Connect SCC2 and SCC3 to NMSI.  Connect BRG3 to SCC2 and
	 * BRG4 to SCC3.
	 */
	immap->im_cpmux.cmx_scr &= ~0x00ffff00;
	immap->im_cpmux.cmx_scr |= 0x00121b00;

	for (i = 0, state = rs_table; i < NR_PORTS; i++,state++) {
		state->magic = SSTATE_MAGIC;
		state->line = i;
		state->type = PORT_UNKNOWN;
		state->custom_divisor = 0;
		state->close_delay = 5*HZ/10;
		state->closing_wait = 30*HZ;
		state->callout_termios = callout_driver.init_termios;
		state->normal_termios = serial_driver.init_termios;
		state->icount.cts = state->icount.dsr = 
			state->icount.rng = state->icount.dcd = 0;
		state->icount.rx = state->icount.tx = 0;
		state->icount.frame = state->icount.parity = 0;
		state->icount.overrun = state->icount.brk = 0;
		printk(KERN_INFO "ttyS%02d at 0x%04x is a %s\n",
		       i, state->port,
		       (state->smc_scc_num < SCC_NUM_BASE) ? "SMC" : "SCC");
#ifdef CONFIG_SERIAL_CONSOLE
		/* If we just printed the message on the console port, and
		 * we are about to initialize it for general use, we have
		 * to wait a couple of character times for the CR/NL to
		 * make it out of the transmit buffer.
		 */
		if (i == CONFIG_SERIAL_CONSOLE_PORT)
			mdelay(2);
#endif
		info = kmalloc(sizeof(ser_info_t), GFP_KERNEL);
		if (info) {
			/*memset(info, 0, sizeof(ser_info_t));*/
			__clear_user(info,sizeof(ser_info_t));
			init_waitqueue_head(&info->open_wait);
			init_waitqueue_head(&info->close_wait);
			info->magic = SERIAL_MAGIC;
			info->flags = state->flags;
			info->tqueue.routine = do_softint;
			info->tqueue.data = info;
			info->tqueue_hangup.routine = do_serial_hangup;
			info->tqueue_hangup.data = info;
			info->line = i;
			info->state = state;
			state->info = (struct async_struct *)info;

			/* We need to allocate a transmit and receive buffer
			 * descriptors from dual port ram, and a character
			 * buffer area from host mem.
			 */
			dp_addr = m8260_cpm_dpalloc(sizeof(cbd_t) * RX_NUM_FIFO, 8);

			/* Allocate space for FIFOs in the host memory.
			*/
			mem_addr = m8260_cpm_hostalloc(RX_NUM_FIFO * RX_BUF_SIZE, 1);

			/* Set the physical address of the host memory
			 * buffers in the buffer descriptors, and the
			 * virtual address for us to work with.
			 */
			bdp = (cbd_t *)&immap->im_dprambase[dp_addr];
			info->rx_cur = info->rx_bd_base = (cbd_t *)bdp;

			for (j=0; j<(RX_NUM_FIFO-1); j++) {
				bdp->cbd_bufaddr = __pa(mem_addr);
				bdp->cbd_sc = BD_SC_EMPTY | BD_SC_INTRPT;
				mem_addr += RX_BUF_SIZE;
				bdp++;
			}
			bdp->cbd_bufaddr = __pa(mem_addr);
			bdp->cbd_sc = BD_SC_WRAP | BD_SC_EMPTY | BD_SC_INTRPT;

			if ((idx = state->smc_scc_num) < SCC_NUM_BASE) {
				sp = &immap->im_smc[idx];
				up = (smc_uart_t *)&immap->im_dprambase[state->port];
				up->smc_rbase = dp_addr;
			}
			else {
				scp = &immap->im_scc[idx - SCC_IDX_BASE];
				sup = (scc_uart_t *)&immap->im_dprambase[state->port];
				sup->scc_genscc.scc_rbase = dp_addr;
			}

			dp_addr = m8260_cpm_dpalloc(sizeof(cbd_t) * TX_NUM_FIFO, 8);

			/* Allocate space for FIFOs in the host memory.
			*/
			mem_addr = m8260_cpm_hostalloc(TX_NUM_FIFO * TX_BUF_SIZE, 1);

			/* Set the physical address of the host memory
			 * buffers in the buffer descriptors, and the
			 * virtual address for us to work with.
			 */
			bdp = (cbd_t *)&immap->im_dprambase[dp_addr];
			info->tx_cur = info->tx_bd_base = (cbd_t *)bdp;

			for (j=0; j<(TX_NUM_FIFO-1); j++) {
				bdp->cbd_bufaddr = __pa(mem_addr);
				bdp->cbd_sc = BD_SC_INTRPT;
				mem_addr += TX_BUF_SIZE;
				bdp++;
			}
			bdp->cbd_bufaddr = __pa(mem_addr);
			bdp->cbd_sc = (BD_SC_WRAP | BD_SC_INTRPT);

			if (idx < SCC_NUM_BASE) {
				up->smc_tbase = dp_addr;

				/* Set up the uart parameters in the
				 * parameter ram.
				 */
				up->smc_rfcr = CPMFCR_GBL | CPMFCR_EB;
				up->smc_tfcr = CPMFCR_GBL | CPMFCR_EB;

				/* Set this to 1 for now, so we get single
				 * character interrupts.  Using idle charater
				 * time requires some additional tuning.
				 */
				up->smc_mrblr = 1;
				up->smc_maxidl = 0;
				up->smc_brkcr = 1;

				/* Send the CPM an initialize command.
				*/
				if (state->smc_scc_num == 0) {
					page = CPM_CR_SMC1_PAGE;
					sblock = CPM_CR_SMC1_SBLOCK;
				}
				else {
					page = CPM_CR_SMC2_PAGE;
					sblock = CPM_CR_SMC2_SBLOCK;
				}

				cp->cp_cpcr = mk_cr_cmd(page, sblock, 0,
						CPM_CR_INIT_TRX) | CPM_CR_FLG;
				while (cp->cp_cpcr & CPM_CR_FLG);

				/* Set UART mode, 8 bit, no parity, one stop.
				 * Enable receive and transmit.
				 */
				sp->smc_smcmr = smcr_mk_clen(9) | SMCMR_SM_UART;

				/* Disable all interrupts and clear all pending
				 * events.
				 */
				sp->smc_smcm = 0;
				sp->smc_smce = 0xff;
			}
			else {
				sup->scc_genscc.scc_tbase = dp_addr;

				/* Set up the uart parameters in the
				 * parameter ram.
				 */
				sup->scc_genscc.scc_rfcr = CPMFCR_GBL | CPMFCR_EB;
				sup->scc_genscc.scc_tfcr = CPMFCR_GBL | CPMFCR_EB;

				/* Set this to 1 for now, so we get single
				 * character interrupts.  Using idle charater
				 * time requires some additional tuning.
				 */
				sup->scc_genscc.scc_mrblr = 1;
				sup->scc_maxidl = 0;
				sup->scc_brkcr = 1;
				sup->scc_parec = 0;
				sup->scc_frmec = 0;
				sup->scc_nosec = 0;
				sup->scc_brkec = 0;
				sup->scc_uaddr1 = 0;
				sup->scc_uaddr2 = 0;
				sup->scc_toseq = 0;
				sup->scc_char1 = 0x8000;
				sup->scc_char2 = 0x8000;
				sup->scc_char3 = 0x8000;
				sup->scc_char4 = 0x8000;
				sup->scc_char5 = 0x8000;
				sup->scc_char6 = 0x8000;
				sup->scc_char7 = 0x8000;
				sup->scc_char8 = 0x8000;
				sup->scc_rccm = 0xc0ff;

				/* Send the CPM an initialize command.
				*/
				if (state->smc_scc_num == 2) {
					page = CPM_CR_SCC2_PAGE;
					sblock = CPM_CR_SCC2_SBLOCK;
				}
				else {
					page = CPM_CR_SCC3_PAGE;
					sblock = CPM_CR_SCC3_SBLOCK;
				}

				cp->cp_cpcr = mk_cr_cmd(page, sblock, 0,
						CPM_CR_INIT_TRX) | CPM_CR_FLG;
				while (cp->cp_cpcr & CPM_CR_FLG);

				/* Set UART mode, 8 bit, no parity, one stop.
				 * Enable receive and transmit.
				 */
				scp->scc_gsmrh = 0;
				scp->scc_gsmrl = 
					(SCC_GSMRL_MODE_UART | SCC_GSMRL_TDCR_16 | SCC_GSMRL_RDCR_16);

				/* Disable all interrupts and clear all pending
				 * events.
				 */
				scp->scc_sccm = 0;
				scp->scc_scce = 0xffff;
				scp->scc_dsr = 0x7e7e;
				scp->scc_pmsr = 0x3000;
			}

			/* Install interrupt handler.
			*/
			request_8xxirq(state->irq, rs_8xx_interrupt, 0, "uart", info);

			/* Set up the baud rate generator.
			*/
			m8260_cpm_setbrg(state->smc_scc_num,
							baud_table[baud_idx]);

			/* If the port is the console, enable Rx and Tx.
			*/
#ifdef CONFIG_SERIAL_CONSOLE
			if (i == CONFIG_SERIAL_CONSOLE_PORT)
				sp->smc_smcmr |= SMCMR_REN | SMCMR_TEN;
#endif
		}
	}
	return 0;
}

/* This must always be called before the rs_8xx_init() function, otherwise
 * it blows away the port control information.
*/
static int __init serial_console_setup(struct console *co, char *options)
{
	struct		serial_state *ser;
	uint		mem_addr, dp_addr, bidx;
	volatile	cbd_t		*bdp;
	volatile	cpm8260_t	*cp;
	volatile	immap_t		*immap;
	volatile	smc_t		*sp;
	volatile	smc_uart_t	*up;
	volatile	iop8260_t	*io;
	bd_t				*bd;

	bd = (bd_t *)__res;

	for (bidx = 0; bidx < (sizeof(baud_table) / sizeof(int)); bidx++)
		if (bd->bi_baudrate == baud_table[bidx])
			break;

	co->cflag = CREAD|CLOCAL|bidx|CS8;
	baud_idx = bidx;

	ser = rs_table + co->index;

	
	immap = immr;
	cp = &immap->im_cpm;
	io = &immap->im_ioport;

	/* This should have been done long ago by the early boot code,
	 * but do it again to make sure.
	 */
	*(ushort *)(&immap->im_dprambase[PROFF_SMC1_BASE]) = PROFF_SMC1;
	*(ushort *)(&immap->im_dprambase[PROFF_SMC2_BASE]) = PROFF_SMC2;

	/* Right now, assume we are using SMCs.
	*/
	sp = &immap->im_smc[ser->smc_scc_num];

	/* When we get here, the CPM has been reset, so we need
	 * to configure the port.
	 * We need to allocate a transmit and receive buffer descriptor
	 * from dual port ram, and a character buffer area from host mem.
	 */
	up = (smc_uart_t *)&immap->im_dprambase[ser->port];

	/* Disable transmitter/receiver.
	*/
	sp->smc_smcmr &= ~(SMCMR_REN | SMCMR_TEN);

	/* Use Port D for SMC1 instead of other functions.
	*/
	io->iop_ppard |= 0x00c00000;
	io->iop_pdird |= 0x00400000;
	io->iop_pdird &= ~0x00800000;
	io->iop_psord &= ~0x00c00000;

	/* Allocate space for two buffer descriptors in the DP ram.
	*/
	dp_addr = m8260_cpm_dpalloc(sizeof(cbd_t) * 2, 8);

	/* Allocate space for two 2 byte FIFOs in the host memory.
	*/
	mem_addr = m8260_cpm_hostalloc(4, 1);

	/* Set the physical address of the host memory buffers in
	 * the buffer descriptors.
	 */
	bdp = (cbd_t *)&immap->im_dprambase[dp_addr];
	bdp->cbd_bufaddr = __pa(mem_addr);
	(bdp+1)->cbd_bufaddr = __pa(mem_addr+2);

	/* For the receive, set empty and wrap.
	 * For transmit, set wrap.
	 */
	bdp->cbd_sc = BD_SC_EMPTY | BD_SC_WRAP;
	(bdp+1)->cbd_sc = BD_SC_WRAP;

	/* Set up the uart parameters in the parameter ram.
	*/
	up->smc_rbase = dp_addr;	/* Base of receive buffer desc. */
	up->smc_tbase = dp_addr+sizeof(cbd_t);	/* Base of xmt buffer desc. */
	up->smc_rfcr = CPMFCR_GBL | CPMFCR_EB;
	up->smc_tfcr = CPMFCR_GBL | CPMFCR_EB;

	/* Set this to 1 for now, so we get single character interrupts.
	*/
	up->smc_mrblr = 1;		/* receive buffer length */
	up->smc_maxidl = 0;		/* wait forever for next char */

	/* Send the CPM an initialize command.
	*/
	cp->cp_cpcr = mk_cr_cmd(CPM_CR_SMC1_PAGE, CPM_CR_SMC1_SBLOCK, 0,
			CPM_CR_INIT_TRX) | CPM_CR_FLG;
	while (cp->cp_cpcr & CPM_CR_FLG);

	/* Set UART mode, 8 bit, no parity, one stop.
	 * Enable receive and transmit.
	 */
	sp->smc_smcmr = smcr_mk_clen(9) |  SMCMR_SM_UART;

	/* Set up the baud rate generator.
	*/
	m8260_cpm_setbrg(ser->smc_scc_num, bd->bi_baudrate);

	/* And finally, enable Rx and Tx.
	*/
	sp->smc_smcmr |= SMCMR_REN | SMCMR_TEN;

	return 0;
}
/*
 * BK Id: SCCS/s.fcc_enet.c 1.7 05/17/01 18:14:20 cort
 */
/*
 * Fast Ethernet Controller (FCC) driver for Motorola MPC8260.
 * Copyright (c) 2000 MontaVista Software, Inc.   Dan Malek (dmalek@jlc.net)
 *
 * This version of the driver is a combination of the 8xx fec and
 * 8260 SCC Ethernet drivers.  People seem to be choosing common I/O
 * configurations, so this driver will work on the EST8260 boards and
 * others yet to be announced.
 *
 * Right now, I am very watseful with the buffers.  I allocate memory
 * pages and then divide them into 2K frame buffers.  This way I know I
 * have buffers large enough to hold one frame within one buffer descriptor.
 * Once I get this working, I will use 64 or 128 byte CPM buffers, which
 * will be much more memory efficient and will easily handle lots of
 * small packets.
 *
 */

#include <linux/config.h>
#include <linux/kernel.h>
#include <linux/sched.h>
#include <linux/string.h>
#include <linux/ptrace.h>
#include <linux/errno.h>
#include <linux/ioport.h>
#include <linux/slab.h>
#include <linux/interrupt.h>
#include <linux/pci.h>
#include <linux/init.h>
#include <linux/delay.h>
#include <linux/netdevice.h>
#include <linux/etherdevice.h>
#include <linux/skbuff.h>
#include <linux/spinlock.h>

#include <asm/immap_8260.h>
#include <asm/pgtable.h>
#include <asm/mpc8260.h>
#include <asm/irq.h>
#include <asm/bitops.h>
#include <asm/uaccess.h>
#include <asm/cpm_8260.h>

/* The transmitter timeout
 */
#define TX_TIMEOUT	(2*HZ)

/* The number of Tx and Rx buffers.  These are allocated from the page
 * pool.  The code may assume these are power of two, so it is best
 * to keep them that size.
 * We don't need to allocate pages for the transmitter.  We just use
 * the skbuffer directly.
 */
#define FCC_ENET_RX_PAGES	16
#define FCC_ENET_RX_FRSIZE	2048
#define FCC_ENET_RX_FRPPG	(PAGE_SIZE / FCC_ENET_RX_FRSIZE)
#define RX_RING_SIZE		(FCC_ENET_RX_FRPPG * FCC_ENET_RX_PAGES)
#define TX_RING_SIZE		16	/* Must be power of two */
#define TX_RING_MOD_MASK	15	/*   for this to work */

/* The FCC stores dest/src/type, data, and checksum for receive packets.
 */
#define PKT_MAXBUF_SIZE		1518
#define PKT_MINBUF_SIZE		64

/* Maximum input DMA size.  Must be a should(?) be a multiple of 4.
*/
#define PKT_MAXDMA_SIZE		1520

/* Maximum input buffer size.  Must be a multiple of 32.
*/
#define PKT_MAXBLR_SIZE		1536

static int fcc_enet_open(struct net_device *dev);
static int fcc_enet_start_xmit(struct sk_buff *skb, struct net_device *dev);
static int fcc_enet_rx(struct net_device *dev);
static void fcc_enet_mii(struct net_device *dev);
static	void fcc_enet_interrupt(int irq, void * dev_id, struct pt_regs * regs);
static int fcc_enet_close(struct net_device *dev);
static struct net_device_stats *fcc_enet_get_stats(struct net_device *dev);
static void set_multicast_list(struct net_device *dev);
static void restart_fcc(struct net_device *dev);

/* These will be configurable for the FCC choice.
 * Multiple ports can be configured.  There is little choice among the
 * I/O pins to the PHY, except the clocks.  We will need some board
 * dependent clock selection.
 * Why in the hell did I put these inside #ifdef's?  I dunno, maybe to
 * help show what pins are used for each device.
 */

/* I/O Pin assignment for FCC1.  I don't yet know the best way to do this,
 * but there is little variation among the choices.
 */
#define PA1_COL		((uint)0x00000001)
#define PA1_CRS		((uint)0x00000002)
#define PA1_TXER	((uint)0x00000004)
#define PA1_TXEN	((uint)0x00000008)
#define PA1_RXDV	((uint)0x00000010)
#define PA1_RXER	((uint)0x00000020)
#define PA1_TXDAT	((uint)0x00003c00)
#define PA1_RXDAT	((uint)0x0003c000)
#define PA1_PSORA0	(PA1_RXDAT | PA1_TXDAT)
#define PA1_PSORA1	(PA1_COL | PA1_CRS | PA1_TXER | PA1_TXEN | \
				PA1_RXDV | PA1_RXER)
#define PA1_DIRA0	(PA1_RXDAT | PA1_CRS | PA1_COL | PA1_RXER | PA1_RXDV)
#define PA1_DIRA1	(PA1_TXDAT | PA1_TXEN | PA1_TXER)

/* CLK12 is receive, CLK11 is transmit.  These are board specific.
*/
#define PC_F1RXCLK	((uint)0x00000800)
#define PC_F1TXCLK	((uint)0x00000400)
#define CMX1_CLK_ROUTE	((uint)0x3e000000)
#define CMX1_CLK_MASK	((uint)0xff000000)

/* I/O Pin assignment for FCC2.  I don't yet know the best way to do this,
 * but there is little variation among the choices.
 */
#define PB2_TXER	((uint)0x00000001)
#define PB2_RXDV	((uint)0x00000002)
#define PB2_TXEN	((uint)0x00000004)
#define PB2_RXER	((uint)0x00000008)
#define PB2_COL		((uint)0x00000010)
#define PB2_CRS		((uint)0x00000020)
#define PB2_TXDAT	((uint)0x000003c0)
#define PB2_RXDAT	((uint)0x00003c00)
#define PB2_PSORB0	(PB2_RXDAT | PB2_TXDAT | PB2_CRS | PB2_COL | \
				PB2_RXER | PB2_RXDV | PB2_TXER)
#define PB2_PSORB1	(PB2_TXEN)
#define PB2_DIRB0	(PB2_RXDAT | PB2_CRS | PB2_COL | PB2_RXER | PB2_RXDV)
#define PB2_DIRB1	(PB2_TXDAT | PB2_TXEN | PB2_TXER)

/* CLK13 is receive, CLK14 is transmit.  These are board dependent.
*/
#define PC_F2RXCLK	((uint)0x00001000)
#define PC_F2TXCLK	((uint)0x00002000)
#define CMX2_CLK_ROUTE	((uint)0x00250000)
#define CMX2_CLK_MASK	((uint)0x00ff0000)

/* I/O Pin assignment for FCC3.  I don't yet know the best way to do this,
 * but there is little variation among the choices.
 */
#define PB3_RXDV	((uint)0x00004000)
#define PB3_RXER	((uint)0x00008000)
#define PB3_TXER	((uint)0x00010000)
#define PB3_TXEN	((uint)0x00020000)
#define PB3_COL		((uint)0x00040000)
#define PB3_CRS		((uint)0x00080000)
#define PB3_TXDAT	((uint)0x0f000000)
#define PB3_RXDAT	((uint)0x00f00000)
#define PB3_PSORB0	(PB3_RXDAT | PB3_TXDAT | PB3_CRS | PB3_COL | \
				PB3_RXER | PB3_RXDV | PB3_TXER | PB3_TXEN)
#define PB3_PSORB1	(0)
#define PB3_DIRB0	(PB3_RXDAT | PB3_CRS | PB3_COL | PB3_RXER | PB3_RXDV)
#define PB3_DIRB1	(PB3_TXDAT | PB3_TXEN | PB3_TXER)

/* CLK15 is receive, CLK16 is transmit.  These are board dependent.
*/
#define PC_F3RXCLK	((uint)0x00004000)
#define PC_F3TXCLK	((uint)0x00008000)
#define CMX3_CLK_ROUTE	((uint)0x00003700)
#define CMX3_CLK_MASK	((uint)0x0000ff00)

/* MII status/control serial interface.
*/
#define PC_MDIO		((uint)0x00400000)
#define PC_MDCK		((uint)0x00200000)

/* A table of information for supporting FCCs.  This does two things.
 * First, we know how many FCCs we have and they are always externally
 * numbered from zero.  Second, it holds control register and I/O
 * information that could be different among board designs.
 */
typedef struct fcc_info {
	uint	fc_fccnum;
	uint	fc_cpmblock;
	uint	fc_cpmpage;
	uint	fc_proff;
	uint	fc_interrupt;
	uint	fc_trxclocks;
	uint	fc_clockroute;
	uint	fc_clockmask;
	uint	fc_mdio;
	uint	fc_mdck;
} fcc_info_t;

static fcc_info_t fcc_ports[] = {
#ifdef CONFIG_FCC1_ENET
	{ 0, CPM_CR_FCC1_SBLOCK, CPM_CR_FCC1_PAGE, PROFF_FCC1, SIU_INT_FCC1,
		(PC_F1RXCLK | PC_F1TXCLK), CMX1_CLK_ROUTE, CMX1_CLK_MASK,
		PC_MDIO, PC_MDCK },
#endif
#ifdef CONFIG_FCC2_ENET
	{ 1, CPM_CR_FCC2_SBLOCK, CPM_CR_FCC2_PAGE, PROFF_FCC2, SIU_INT_FCC2,
		(PC_F2RXCLK | PC_F2TXCLK), CMX2_CLK_ROUTE, CMX2_CLK_MASK,
		PC_MDIO, PC_MDCK },
#endif
#ifdef CONFIG_FCC3_ENET
	{ 2, CPM_CR_FCC3_SBLOCK, CPM_CR_FCC3_PAGE, PROFF_FCC3, SIU_INT_FCC3,
		(PC_F3RXCLK | PC_F3TXCLK), CMX3_CLK_ROUTE, CMX3_CLK_MASK,
		PC_MDIO, PC_MDCK },
#endif
};

/* The FCC buffer descriptors track the ring buffers.  The rx_bd_base and
 * tx_bd_base always point to the base of the buffer descriptors.  The
 * cur_rx and cur_tx point to the currently available buffer.
 * The dirty_tx tracks the current buffer that is being sent by the
 * controller.  The cur_tx and dirty_tx are equal under both completely
 * empty and completely full conditions.  The empty/ready indicator in
 * the buffer descriptor determines the actual condition.
 */
struct fcc_enet_private {
	/* The saved address of a sent-in-place packet/buffer, for skfree(). */
	struct	sk_buff* tx_skbuff[TX_RING_SIZE];
	ushort	skb_cur;
	ushort	skb_dirty;

	/* CPM dual port RAM relative addresses.
	*/
	cbd_t	*rx_bd_base;		/* Address of Rx and Tx buffers. */
	cbd_t	*tx_bd_base;
	cbd_t	*cur_rx, *cur_tx;		/* The next free ring entry */
	cbd_t	*dirty_tx;	/* The ring entries to be free()ed. */
	volatile fcc_t	*fccp;
	volatile fcc_enet_t	*ep;
	struct	net_device_stats stats;
	uint	tx_full;
	spinlock_t lock;
	uint	phy_address;
	uint	phy_type;
	uint	phy_duplex;
	fcc_info_t	*fip;
};

static void init_fcc_shutdown(fcc_info_t *fip, struct fcc_enet_private *cep,
	volatile immap_t *immap);
static void init_fcc_startup(fcc_info_t *fip, struct net_device *dev);
static void init_fcc_ioports(fcc_info_t *fip, volatile iop8260_t *io,
	volatile immap_t *immap);
static void init_fcc_param(fcc_info_t *fip, struct net_device *dev,
	volatile immap_t *immap);

/* MII processing.  We keep this as simple as possible.  Requests are
 * placed on the list (if there is room).  When the request is finished
 * by the MII, an optional function may be called.
 */
typedef struct mii_list {
	uint	mii_regval;
	void	(*mii_func)(uint val, struct net_device *dev);
	struct	mii_list *mii_next;
} mii_list_t;

#define		NMII	20
mii_list_t	mii_cmds[NMII];
mii_list_t	*mii_free;
mii_list_t	*mii_head;
mii_list_t	*mii_tail;

static	int	phyaddr;
static	uint	phytype;

static int	mii_queue(int request, void (*func)(uint, struct net_device *));
static void	mii_startup_cmds(void);
static uint	mii_send_receive(fcc_info_t *fip, uint cmd);

/* Make MII read/write commands for the FCC.
*/

#define mk_mii_phyaddr(ADDR)	(0x60020000 | ((ADDR) << 23) | (2 << 18))

#define mk_mii_read(REG)	(0x60020000 | ((phyaddr << 23) | \
						(REG & 0x1f) << 18))

#define mk_mii_write(REG, VAL)	(0x50020000 | ((phyaddr << 23) | \
						(REG & 0x1f) << 18) | \
						(VAL & 0xffff))


static int
fcc_enet_open(struct net_device *dev)
{
	netif_start_queue(dev);
	return 0;					/* Always succeed */
}

static int
fcc_enet_start_xmit(struct sk_buff *skb, struct net_device *dev)
{
	struct fcc_enet_private *cep = (struct fcc_enet_private *)dev->priv;
	volatile cbd_t	*bdp;


	/* Fill in a Tx ring entry */
	bdp = cep->cur_tx;

#ifndef final_version
	if (bdp->cbd_sc & BD_ENET_TX_READY) {
		/* Ooops.  All transmit buffers are full.  Bail out.
		 * This should not happen, since cep->tx_full should be set.
		 */
		printk("%s: tx queue full!.\n", dev->name);
		return 1;
	}
#endif

	/* Clear all of the status flags.
	 */
	bdp->cbd_sc &= ~BD_ENET_TX_STATS;

	/* If the frame is short, tell CPM to pad it.
	*/
	if (skb->len <= ETH_ZLEN)
		bdp->cbd_sc |= BD_ENET_TX_PAD;
	else
		bdp->cbd_sc &= ~BD_ENET_TX_PAD;

	/* Set buffer length and buffer pointer.
	*/
	bdp->cbd_datlen = skb->len;
	bdp->cbd_bufaddr = __pa(skb->data);

	/* Save skb pointer.
	*/
	cep->tx_skbuff[cep->skb_cur] = skb;

	cep->stats.tx_bytes += skb->len;
	cep->skb_cur = (cep->skb_cur+1) & TX_RING_MOD_MASK;

	spin_lock_irq(&cep->lock);

	/* Send it on its way.  Tell CPM its ready, interrupt when done,
	 * its the last BD of the frame, and to put the CRC on the end.
	 */
	bdp->cbd_sc |= (BD_ENET_TX_READY | BD_ENET_TX_INTR | BD_ENET_TX_LAST | BD_ENET_TX_TC);

#if 0
	/* Errata says don't do this.
	*/
	cep->fccp->fcc_ftodr = 0x8000;
#endif
	dev->trans_start = jiffies;

	/* If this was the last BD in the ring, start at the beginning again.
	*/
	if (bdp->cbd_sc & BD_ENET_TX_WRAP)
		bdp = cep->tx_bd_base;
	else
		bdp++;

	if (bdp->cbd_sc & BD_ENET_TX_READY) {
		netif_stop_queue(dev);
		cep->tx_full = 1;
	}

	cep->cur_tx = (cbd_t *)bdp;

	spin_unlock_irq(&cep->lock);

	return 0;
}


static void
fcc_enet_timeout(struct net_device *dev)
{
	struct fcc_enet_private *cep = (struct fcc_enet_private *)dev->priv;

	printk("%s: transmit timed out.\n", dev->name);
	cep->stats.tx_errors++;
#ifndef final_version
	{
		int	i;
		cbd_t	*bdp;
		printk(" Ring data dump: cur_tx %p%s cur_rx %p.\n",
		       cep->cur_tx, cep->tx_full ? " (full)" : "",
		       cep->cur_rx);
		bdp = cep->tx_bd_base;
		printk(" Tx @base %p :\n", bdp);
		for (i = 0 ; i < TX_RING_SIZE; i++, bdp++)
			printk("%04x %04x %08x\n",
			       bdp->cbd_sc,
			       bdp->cbd_datlen,
			       bdp->cbd_bufaddr);
		bdp = cep->rx_bd_base;
		printk(" Rx @base %p :\n", bdp);
		for (i = 0 ; i < RX_RING_SIZE; i++, bdp++)
			printk("%04x %04x %08x\n",
			       bdp->cbd_sc,
			       bdp->cbd_datlen,
			       bdp->cbd_bufaddr);
	}
#endif
	if (!cep->tx_full)
		netif_wake_queue(dev);
}

/* The interrupt handler.
 */
static void
fcc_enet_interrupt(int irq, void * dev_id, struct pt_regs * regs)
{
	struct	net_device *dev = dev_id;
	volatile struct	fcc_enet_private *cep;
	volatile cbd_t	*bdp;
	ushort	int_events;
	int	must_restart;

	cep = (struct fcc_enet_private *)dev->priv;

	/* Get the interrupt events that caused us to be here.
	*/
	int_events = cep->fccp->fcc_fcce;
	cep->fccp->fcc_fcce = int_events;
	must_restart = 0;

	/* Handle receive event in its own function.
	*/
	if (int_events & FCC_ENET_RXF)
		fcc_enet_rx(dev_id);

	/* Check for a transmit error.  The manual is a little unclear
	 * about this, so the debug code until I get it figured out.  It
	 * appears that if TXE is set, then TXB is not set.  However,
	 * if carrier sense is lost during frame transmission, the TXE
	 * bit is set, "and continues the buffer transmission normally."
	 * I don't know if "normally" implies TXB is set when the buffer
	 * descriptor is closed.....trial and error :-).
	 */

	/* Transmit OK, or non-fatal error.  Update the buffer descriptors.
	*/
	if (int_events & (FCC_ENET_TXE | FCC_ENET_TXB)) {
	    spin_lock(&cep->lock);
	    bdp = cep->dirty_tx;
	    while ((bdp->cbd_sc&BD_ENET_TX_READY)==0) {
		if ((bdp==cep->cur_tx) && (cep->tx_full == 0))
		    break;

		if (bdp->cbd_sc & BD_ENET_TX_HB)	/* No heartbeat */
			cep->stats.tx_heartbeat_errors++;
		if (bdp->cbd_sc & BD_ENET_TX_LC)	/* Late collision */
			cep->stats.tx_window_errors++;
		if (bdp->cbd_sc & BD_ENET_TX_RL)	/* Retrans limit */
			cep->stats.tx_aborted_errors++;
		if (bdp->cbd_sc & BD_ENET_TX_UN)	/* Underrun */
			cep->stats.tx_fifo_errors++;
		if (bdp->cbd_sc & BD_ENET_TX_CSL)	/* Carrier lost */
			cep->stats.tx_carrier_errors++;


		/* No heartbeat or Lost carrier are not really bad errors.
		 * The others require a restart transmit command.
		 */
		if (bdp->cbd_sc &
		    (BD_ENET_TX_LC | BD_ENET_TX_RL | BD_ENET_TX_UN)) {
			must_restart = 1;
			cep->stats.tx_errors++;
		}

		cep->stats.tx_packets++;

		/* Deferred means some collisions occurred during transmit,
		 * but we eventually sent the packet OK.
		 */
		if (bdp->cbd_sc & BD_ENET_TX_DEF)
			cep->stats.collisions++;

		/* Free the sk buffer associated with this last transmit.
		*/
		dev_kfree_skb_irq(cep->tx_skbuff[cep->skb_dirty]);
		cep->skb_dirty = (cep->skb_dirty + 1) & TX_RING_MOD_MASK;

		/* Update pointer to next buffer descriptor to be transmitted.
		*/
		if (bdp->cbd_sc & BD_ENET_TX_WRAP)
			bdp = cep->tx_bd_base;
		else
			bdp++;

		/* I don't know if we can be held off from processing these
		 * interrupts for more than one frame time.  I really hope
		 * not.  In such a case, we would now want to check the
		 * currently available BD (cur_tx) and determine if any
		 * buffers between the dirty_tx and cur_tx have also been
		 * sent.  We would want to process anything in between that
		 * does not have BD_ENET_TX_READY set.
		 */

		/* Since we have freed up a buffer, the ring is no longer
		 * full.
		 */
		if (cep->tx_full) {
			cep->tx_full = 0;
			if (netif_queue_stopped(dev)) {
				netif_wake_queue(dev);
			}
		}

		cep->dirty_tx = (cbd_t *)bdp;
	    }

	    if (must_restart) {
		volatile cpm8260_t *cp;

		/* Some transmit errors cause the transmitter to shut
		 * down.  We now issue a restart transmit.  Since the
		 * errors close the BD and update the pointers, the restart
		 * _should_ pick up without having to reset any of our
		 * pointers either.
		 */

		cp = cpmp;
		cp->cp_cpcr =
		    mk_cr_cmd(cep->fip->fc_cpmpage, cep->fip->fc_cpmblock,
		    		0x0c, CPM_CR_RESTART_TX) | CPM_CR_FLG;
		while (cp->cp_cpcr & CPM_CR_FLG);
	    }
	    spin_unlock(&cep->lock);
	}

	/* Check for receive busy, i.e. packets coming but no place to
	 * put them.
	 */
	if (int_events & FCC_ENET_BSY) {
		cep->stats.rx_dropped++;
	}
	return;
}

/* During a receive, the cur_rx points to the current incoming buffer.
 * When we update through the ring, if the next incoming buffer has
 * not been given to the system, we just set the empty indicator,
 * effectively tossing the packet.
 */
static int
fcc_enet_rx(struct net_device *dev)
{
	struct	fcc_enet_private *cep;
	volatile cbd_t	*bdp;
	struct	sk_buff *skb;
	ushort	pkt_len;

	cep = (struct fcc_enet_private *)dev->priv;

	/* First, grab all of the stats for the incoming packet.
	 * These get messed up if we get called due to a busy condition.
	 */
	bdp = cep->cur_rx;

for (;;) {
	if (bdp->cbd_sc & BD_ENET_RX_EMPTY)
		break;
		
#ifndef final_version
	/* Since we have allocated space to hold a complete frame, both
	 * the first and last indicators should be set.
	 */
	if ((bdp->cbd_sc & (BD_ENET_RX_FIRST | BD_ENET_RX_LAST)) !=
		(BD_ENET_RX_FIRST | BD_ENET_RX_LAST))
			printk("CPM ENET: rcv is not first+last\n");
#endif

	/* Frame too long or too short.
	*/
	if (bdp->cbd_sc & (BD_ENET_RX_LG | BD_ENET_RX_SH))
		cep->stats.rx_length_errors++;
	if (bdp->cbd_sc & BD_ENET_RX_NO)	/* Frame alignment */
		cep->stats.rx_frame_errors++;
	if (bdp->cbd_sc & BD_ENET_RX_CR)	/* CRC Error */
		cep->stats.rx_crc_errors++;
	if (bdp->cbd_sc & BD_ENET_RX_OV)	/* FIFO overrun */
		cep->stats.rx_crc_errors++;

	/* Report late collisions as a frame error.
	 * On this error, the BD is closed, but we don't know what we
	 * have in the buffer.  So, just drop this frame on the floor.
	 */
	if (bdp->cbd_sc & BD_ENET_RX_CL) {
		cep->stats.rx_frame_errors++;
	}
	else {

		/* Process the incoming frame.
		*/
		cep->stats.rx_packets++;
		pkt_len = bdp->cbd_datlen;
		cep->stats.rx_bytes += pkt_len;

		/* This does 16 byte alignment, much more than we need.
		 * The packet length includes FCS, but we don't want to
		 * include that when passing upstream as it messes up
		 * bridging applications.
		 */
		skb = dev_alloc_skb(pkt_len-4);

		if (skb == NULL) {
			printk("%s: Memory squeeze, dropping packet.\n", dev->name);
			cep->stats.rx_dropped++;
		}
		else {
			skb->dev = dev;
			skb_put(skb,pkt_len-4);	/* Make room */
			eth_copy_and_sum(skb,
				(unsigned char *)__va(bdp->cbd_bufaddr),
				pkt_len-4, 0);
			skb->protocol=eth_type_trans(skb,dev);
			netif_rx(skb);
		}
	}

	/* Clear the status flags for this buffer.
	*/
	bdp->cbd_sc &= ~BD_ENET_RX_STATS;

	/* Mark the buffer empty.
	*/
	bdp->cbd_sc |= BD_ENET_RX_EMPTY;

	/* Update BD pointer to next entry.
	*/
	if (bdp->cbd_sc & BD_ENET_RX_WRAP)
		bdp = cep->rx_bd_base;
	else
		bdp++;

   }
	cep->cur_rx = (cbd_t *)bdp;

	return 0;
}

static int
fcc_enet_close(struct net_device *dev)
{
	/* Don't know what to do yet.
	*/
	netif_stop_queue(dev);

	return 0;
}

static struct net_device_stats *fcc_enet_get_stats(struct net_device *dev)
{
	struct fcc_enet_private *cep = (struct fcc_enet_private *)dev->priv;

	return &cep->stats;
}

/* The MII is simulated from the 8xx FEC implementation.  The FCC
 * is not responsible for the MII control/status interface.
 */
static void
fcc_enet_mii(struct net_device *dev)
{
	struct	fcc_enet_private *fep;
	mii_list_t	*mip;
	uint		mii_reg;

	fep = (struct fcc_enet_private *)dev->priv;
#if 0
	ep = &(((immap_t *)IMAP_ADDR)->im_cpm.cp_fec);
	mii_reg = ep->fec_mii_data;
#endif
	
	if ((mip = mii_head) == NULL) {
		printk("MII and no head!\n");
		return;
	}

	if (mip->mii_func != NULL)
		(*(mip->mii_func))(mii_reg, dev);

	mii_head = mip->mii_next;
	mip->mii_next = mii_free;
	mii_free = mip;

#if 0
	if ((mip = mii_head) != NULL)
		ep->fec_mii_data = mip->mii_regval;
#endif
}

static int
mii_queue(int regval, void (*func)(uint, struct net_device *))
{
	unsigned long	flags;
	mii_list_t	*mip;
	int		retval;

	retval = 0;

	save_flags(flags);
	cli();

	if ((mip = mii_free) != NULL) {
		mii_free = mip->mii_next;
		mip->mii_regval = regval;
		mip->mii_func = func;
		mip->mii_next = NULL;
		if (mii_head) {
			mii_tail->mii_next = mip;
			mii_tail = mip;
		}
		else {
			mii_head = mii_tail = mip;
#if 0
			(&(((immap_t *)IMAP_ADDR)->im_cpm.cp_fec))->fec_mii_data = regval;
#endif
		}
	}
	else {
		retval = 1;
	}

	restore_flags(flags);

	return(retval);
}

static	volatile uint	full_duplex;

static void
mii_status(uint mii_reg, struct net_device *dev)
{
	volatile uint	prev_duplex;

	if (((mii_reg >> 18) & 0x1f) == 1) {
		/* status register.
		*/
		printk("fec: ");
		if (mii_reg & 0x0004)
			printk("link up");
		else
			printk("link down");

		if (mii_reg & 0x0010)
			printk(",remote fault");
		if (mii_reg & 0x0020)
			printk(",auto complete");
		printk("\n");
	}
	if (((mii_reg >> 18) & 0x1f) == 0x14) {
		/* Extended chip status register.
		*/
		prev_duplex = full_duplex;
		printk("fec: ");
		if (mii_reg & 0x0800)
			printk("100 Mbps");
		else
			printk("10 Mbps");

		if (mii_reg & 0x1000) {
			printk(", Full-Duplex\n");
			full_duplex = 1;
		}
		else {
			printk(", Half-Duplex\n");
			full_duplex = 0;
		}
#if 0
		if (prev_duplex != full_duplex)
			restart_fec(dev);
#endif
	}
	if (((mii_reg >> 18) & 0x1f) == 31) {
		/* QS6612 PHY Control/Status.
		 * OK, now we have it all, so figure out what is going on.
		 */
		prev_duplex = full_duplex;
		printk("fec: ");

		mii_reg = (mii_reg >> 2) & 7;

		if (mii_reg & 1)
			printk("10 Mbps");
		else
			printk("100 Mbps");

		if (mii_reg > 4) {
			printk(", Full-Duplex\n");
			full_duplex = 1;
		}
		else {
			printk(", Half-Duplex\n");
			full_duplex = 0;
		}

#if 0
		if (prev_duplex != full_duplex)
			restart_fec(dev);
#endif
	}
}

static	uint	phyno;

static void
mii_discover_phy3(uint mii_reg, struct net_device *dev)
{
	phytype <<= 16;
	phytype |= (mii_reg & 0xffff);
	printk("fec: Phy @ 0x%x, type 0x%08x\n", phyno, phytype);
	mii_startup_cmds();
}

static void
mii_discover_phy(uint mii_reg, struct net_device *dev)
{
	if (phyno < 32) {
		if ((phytype = (mii_reg & 0xffff)) != 0xffff) {
			phyaddr = phyno;
			mii_queue(mk_mii_read(3), mii_discover_phy3);
		}
		else {
			phyno++;
			mii_queue(mk_mii_phyaddr(phyno), mii_discover_phy);
		}
	}
	else {
		printk("FEC: No PHY device found.\n");
	}
}

static void
mii_discover_phy_poll(fcc_info_t *fip)
{
	uint	rv;
	int	i;

	for (i=0; i<32; i++) {
		rv = mii_send_receive(fip, mk_mii_phyaddr(i));
		if ((phytype = (rv & 0xffff)) != 0xffff) {
			phyaddr = i;
			rv = mii_send_receive(fip, mk_mii_read(3));
			phytype <<= 16;
			phytype |= (rv & 0xffff);
			printk("fec: Phy @ 0x%x, type 0x%08x\n", phyaddr, phytype);
		}
	}
}

static	void
mii_startup_cmds(void)
{

#if 1
	/* Level One PHY.
	*/

	/* Read status registers to clear any pending interrupt.
	*/
	mii_queue(mk_mii_read(1), mii_status);
	mii_queue(mk_mii_read(18), mii_status);

	/* Read extended chip status register.
	*/
	mii_queue(mk_mii_read(0x14), mii_status);

	/* Set default operation of 100-TX....for some reason
	 * some of these bits are set on power up, which is wrong.
	 */
	mii_queue(mk_mii_write(0x13, 0), NULL);

	/* Enable Link status change interrupts.
	*/
	mii_queue(mk_mii_write(0x11, 0x0002), NULL);

	/* Don't advertize Full duplex.
	mii_queue(mk_mii_write(0x04, 0x0021), NULL);
	*/
#endif

}

/* This supports the mii_link interrupt below.
 * We should get called three times.  Once for register 1, once for
 * register 18, and once for register 20.
 */
static	uint mii_saved_reg1;

static void
mii_relink(uint mii_reg, struct net_device *dev)
{
	volatile uint	prev_duplex;
	unsigned long	flags;

	if (((mii_reg >> 18) & 0x1f) == 1) {
		/* Just save the status register and get out.
		*/
		mii_saved_reg1 = mii_reg;
		return;
	}
	if (((mii_reg >> 18) & 0x1f) == 18) {
		/* Not much here, but has to be read to clear the
		 * interrupt condition.
		 */
		if ((mii_reg & 0x8000) == 0)
			printk("fec: re-link and no IRQ?\n");
		if ((mii_reg & 0x4000) == 0)
			printk("fec: no PHY power?\n");
	}
	if (((mii_reg >> 18) & 0x1f) == 20) {
		/* Extended chip status register.
		 * OK, now we have it all, so figure out what is going on.
		 */
		prev_duplex = full_duplex;
		printk("fec: ");
		if (mii_saved_reg1 & 0x0004)
			printk("link up");
		else
			printk("link down");

		if (mii_saved_reg1 & 0x0010)
			printk(", remote fault");
		if (mii_saved_reg1 & 0x0020)
			printk(", auto complete");

		if (mii_reg & 0x0800)
			printk(", 100 Mbps");
		else
			printk(", 10 Mbps");

		if (mii_reg & 0x1000) {
			printk(", Full-Duplex\n");
			full_duplex = 1;
		}
		else {
			printk(", Half-Duplex\n");
			full_duplex = 0;
		}
		if (prev_duplex != full_duplex) {
			save_flags(flags);
			cli();
#if 0
			restart_fec(dev);
#endif
			restore_flags(flags);
		}
	}
	if (((mii_reg >> 18) & 0x1f) == 31) {
		/* QS6612 PHY Control/Status.
		 * OK, now we have it all, so figure out what is going on.
		 */
		prev_duplex = full_duplex;
		printk("fec: ");
		if (mii_saved_reg1 & 0x0004)
			printk("link up");
		else
			printk("link down");

		if (mii_saved_reg1 & 0x0010)
			printk(", remote fault");
		if (mii_saved_reg1 & 0x0020)
			printk(", auto complete");

		mii_reg = (mii_reg >> 2) & 7;

		if (mii_reg & 1)
			printk(", 10 Mbps");
		else
			printk(", 100 Mbps");

		if (mii_reg > 4) {
			printk(", Full-Duplex\n");
			full_duplex = 1;
		}
		else {
			printk(", Half-Duplex\n");
			full_duplex = 0;
		}

#if 0
		if (prev_duplex != full_duplex) {
			save_flags(flags);
			cli();
			restart_fec(dev);
			restore_flags(flags);
		}
#endif
	}
}

/* Set or clear the multicast filter for this adaptor.
 * Skeleton taken from sunlance driver.
 * The CPM Ethernet implementation allows Multicast as well as individual
 * MAC address filtering.  Some of the drivers check to make sure it is
 * a group multicast address, and discard those that are not.  I guess I
 * will do the same for now, but just remove the test if you want
 * individual filtering as well (do the upper net layers want or support
 * this kind of feature?).
 */
static void
set_multicast_list(struct net_device *dev)
{
	struct	fcc_enet_private *cep;
	struct	dev_mc_list *dmi;
	u_char	*mcptr, *tdptr;
	volatile fcc_enet_t *ep;
	int	i, j;

	cep = (struct fcc_enet_private *)dev->priv;

return;
	/* Get pointer to FCC area in parameter RAM.
	*/
	ep = (fcc_enet_t *)dev->base_addr;

	if (dev->flags&IFF_PROMISC) {
	  
		/* Log any net taps. */
		printk("%s: Promiscuous mode enabled.\n", dev->name);
		cep->fccp->fcc_fpsmr |= FCC_PSMR_PRO;
	} else {

		cep->fccp->fcc_fpsmr &= ~FCC_PSMR_PRO;

		if (dev->flags & IFF_ALLMULTI) {
			/* Catch all multicast addresses, so set the
			 * filter to all 1's.
			 */
			ep->fen_gaddrh = 0xffffffff;
			ep->fen_gaddrl = 0xffffffff;
		}
		else {
			/* Clear filter and add the addresses in the list.
			*/
			ep->fen_gaddrh = 0;
			ep->fen_gaddrl = 0;

			dmi = dev->mc_list;

			for (i=0; i<dev->mc_count; i++) {
				
				/* Only support group multicast for now.
				*/
				if (!(dmi->dmi_addr[0] & 1))
					continue;

				/* The address in dmi_addr is LSB first,
				 * and taddr is MSB first.  We have to
				 * copy bytes MSB first from dmi_addr.
				 */
				mcptr = (u_char *)dmi->dmi_addr + 5;
				tdptr = (u_char *)&ep->fen_taddrh;
				for (j=0; j<6; j++)
					*tdptr++ = *mcptr--;

				/* Ask CPM to run CRC and set bit in
				 * filter mask.
				 */
				cpmp->cp_cpcr = mk_cr_cmd(cep->fip->fc_cpmpage,
						cep->fip->fc_cpmblock, 0x0c,
						CPM_CR_SET_GADDR) | CPM_CR_FLG;
				udelay(10);
				while (cpmp->cp_cpcr & CPM_CR_FLG);
			}
		}
	}
}

/* Initialize the CPM Ethernet on FCC.
 */
int __init fec_enet_init(void)
{
	struct net_device *dev;
	struct fcc_enet_private *cep;
	fcc_info_t	*fip;
	int	i, np;
	volatile	immap_t		*immap;
	volatile	iop8260_t	*io;

	immap = (immap_t *)IMAP_ADDR;	/* and to internal registers */
	io = &immap->im_ioport;

	np = sizeof(fcc_ports) / sizeof(fcc_info_t);
	fip = fcc_ports;

	while (np-- > 0) {

		/* Allocate some private information.
		*/
		cep = (struct fcc_enet_private *)
					kmalloc(sizeof(*cep), GFP_KERNEL);
		if (cep == NULL)
			return -ENOMEM;

		__clear_user(cep,sizeof(*cep));
		spin_lock_init(&cep->lock);
		cep->fip = fip;

		/* Create an Ethernet device instance.
		*/
		dev = init_etherdev(0, 0);
		dev->priv = cep;

		init_fcc_shutdown(fip, cep, immap);
		init_fcc_ioports(fip, io, immap);
		init_fcc_param(fip, dev, immap);

		dev->base_addr = (unsigned long)(cep->ep);

		/* The CPM Ethernet specific entries in the device
		 * structure.
		 */
		dev->open = fcc_enet_open;
		dev->hard_start_xmit = fcc_enet_start_xmit;
		dev->tx_timeout = fcc_enet_timeout;
		dev->watchdog_timeo = TX_TIMEOUT;
		dev->stop = fcc_enet_close;
		dev->get_stats = fcc_enet_get_stats;
		dev->set_multicast_list = set_multicast_list;

		init_fcc_startup(fip, dev);

		printk("%s: FCC ENET Version 0.2, ", dev->name);
		for (i=0; i<5; i++)
			printk("%02x:", dev->dev_addr[i]);
		printk("%02x\n", dev->dev_addr[5]);

		/* This is just a hack for now that works only on the EST
		 * board, or anything else that has MDIO/CK configured.
		 * It is mainly to test the MII software clocking.
		 */
		mii_discover_phy_poll(fip);

		fip++;
	}

	return 0;
}

/* Make sure the device is shut down during initialization.
*/
static void __init
init_fcc_shutdown(fcc_info_t *fip, struct fcc_enet_private *cep,
						volatile immap_t *immap)
{
	volatile	fcc_enet_t	*ep;
	volatile	fcc_t		*fccp;

	/* Get pointer to FCC area in parameter RAM.
	*/
	ep = (fcc_enet_t *)(&immap->im_dprambase[fip->fc_proff]);

	/* And another to the FCC register area.
	*/
	fccp = (volatile fcc_t *)(&immap->im_fcc[fip->fc_fccnum]);
	cep->fccp = fccp;		/* Keep the pointers handy */
	cep->ep = ep;

	/* Disable receive and transmit in case someone left it running.
	*/
	fccp->fcc_gfmr &= ~(FCC_GFMR_ENR | FCC_GFMR_ENT);
}

/* Initialize the I/O pins for the FCC Ethernet.
*/
static void __init
init_fcc_ioports(fcc_info_t *fip, volatile iop8260_t *io,
						volatile immap_t *immap)
{

	/* FCC1 pins are on port A/C.  FCC2/3 are port B/C.
	*/
	if (fip->fc_proff == PROFF_FCC1) {
		/* Configure port A and C pins for FCC1 Ethernet.
		 */
		io->iop_pdira &= ~PA1_DIRA0;
		io->iop_pdira |= PA1_DIRA1;
		io->iop_psora &= ~PA1_PSORA0;
		io->iop_psora |= PA1_PSORA1;
		io->iop_ppara |= (PA1_DIRA0 | PA1_DIRA1);
	}
	if (fip->fc_proff == PROFF_FCC2) {
		/* Configure port B and C pins for FCC Ethernet.
		 */
		io->iop_pdirb &= ~PB2_DIRB0;
		io->iop_pdirb |= PB2_DIRB1;
		io->iop_psorb &= ~PB2_PSORB0;
		io->iop_psorb |= PB2_PSORB1;
		io->iop_pparb |= (PB2_DIRB0 | PB2_DIRB1);
	}
	if (fip->fc_proff == PROFF_FCC3) {
		/* Configure port B and C pins for FCC Ethernet.
		 */
		io->iop_pdirb &= ~PB3_DIRB0;
		io->iop_pdirb |= PB3_DIRB1;
		io->iop_psorb &= ~PB3_PSORB0;
		io->iop_psorb |= PB3_PSORB1;
		io->iop_pparb |= (PB3_DIRB0 | PB3_DIRB1);
	}

	/* Port C has clocks......
	*/
	io->iop_psorc &= ~(fip->fc_trxclocks);
	io->iop_pdirc &= ~(fip->fc_trxclocks);
	io->iop_pparc |= fip->fc_trxclocks;

	/* ....and the MII serial clock/data.
	*/
	io->iop_pdatc |= (fip->fc_mdio | fip->fc_mdck);
	io->iop_podrc |= fip->fc_mdio;
	io->iop_pdirc |= (fip->fc_mdio | fip->fc_mdck);
	io->iop_pparc &= ~(fip->fc_mdio | fip->fc_mdck);

	/* Configure Serial Interface clock routing.
	 * First, clear all FCC bits to zero,
	 * then set the ones we want.
	 */
	immap->im_cpmux.cmx_fcr &= ~(fip->fc_clockmask);
	immap->im_cpmux.cmx_fcr |= fip->fc_clockroute;
}

static void __init
init_fcc_param(fcc_info_t *fip, struct net_device *dev,
						volatile immap_t *immap)
{
	unsigned char	*eap;
	unsigned long	mem_addr;
	bd_t		*bd;
	int		i, j;
	struct		fcc_enet_private *cep;
	volatile	fcc_enet_t	*ep;
	volatile	cbd_t		*bdp;
	volatile	cpm8260_t	*cp;

	cep = (struct fcc_enet_private *)(dev->priv);
	ep = cep->ep;
	cp = cpmp;

	bd = (bd_t *)__res;

	/* Zero the whole thing.....I must have missed some individually.
	 * It works when I do this.
	 */
	memset((char *)ep, 0, sizeof(fcc_enet_t));

	/* Allocate space for the buffer descriptors in the DP ram.
	 * These are relative offsets in the DP ram address space.
	 * Initialize base addresses for the buffer descriptors.
	 */
#if 0
	/* I really want to do this, but for some reason it doesn't
	 * work with the data cache enabled, so I allocate from the
	 * main memory instead.
	 */
	i = m8260_cpm_dpalloc(sizeof(cbd_t) * RX_RING_SIZE, 8);
	ep->fen_genfcc.fcc_rbase = (uint)&immap->im_dprambase[i];
	cep->rx_bd_base = (cbd_t *)&immap->im_dprambase[i];

	i = m8260_cpm_dpalloc(sizeof(cbd_t) * TX_RING_SIZE, 8);
	ep->fen_genfcc.fcc_tbase = (uint)&immap->im_dprambase[i];
	cep->tx_bd_base = (cbd_t *)&immap->im_dprambase[i];
#else
	cep->rx_bd_base = (cbd_t *)m8260_cpm_hostalloc(sizeof(cbd_t) * RX_RING_SIZE, 8);
	ep->fen_genfcc.fcc_rbase = __pa(cep->rx_bd_base);
	cep->tx_bd_base = (cbd_t *)m8260_cpm_hostalloc(sizeof(cbd_t) * TX_RING_SIZE, 8);
	ep->fen_genfcc.fcc_tbase = __pa(cep->tx_bd_base);
#endif

	cep->dirty_tx = cep->cur_tx = cep->tx_bd_base;
	cep->cur_rx = cep->rx_bd_base;

	ep->fen_genfcc.fcc_rstate = (CPMFCR_GBL | CPMFCR_EB) << 24;
	ep->fen_genfcc.fcc_tstate = (CPMFCR_GBL | CPMFCR_EB) << 24;

	/* Set maximum bytes per receive buffer.
	 * It must be a multiple of 32.
	 */
	ep->fen_genfcc.fcc_mrblr = PKT_MAXBLR_SIZE;

	/* Allocate space in the reserved FCC area of DPRAM for the
	 * internal buffers.  No one uses this space (yet), so we
	 * can do this.  Later, we will add resource management for
	 * this area.
	 */
	mem_addr = CPM_FCC_SPECIAL_BASE + (fip->fc_fccnum * 128);
	ep->fen_genfcc.fcc_riptr = mem_addr;
	ep->fen_genfcc.fcc_tiptr = mem_addr+32;
	ep->fen_padptr = mem_addr+64;
	memset((char *)(&(immap->im_dprambase[(mem_addr+64)])), 0x88, 32);
	
	ep->fen_genfcc.fcc_rbptr = 0;
	ep->fen_genfcc.fcc_tbptr = 0;
	ep->fen_genfcc.fcc_rcrc = 0;
	ep->fen_genfcc.fcc_tcrc = 0;
	ep->fen_genfcc.fcc_res1 = 0;
	ep->fen_genfcc.fcc_res2 = 0;

	ep->fen_camptr = 0;	/* CAM isn't used in this driver */

	/* Set CRC preset and mask.
	*/
	ep->fen_cmask = 0xdebb20e3;
	ep->fen_cpres = 0xffffffff;

	ep->fen_crcec = 0;	/* CRC Error counter */
	ep->fen_alec = 0;	/* alignment error counter */
	ep->fen_disfc = 0;	/* discard frame counter */
	ep->fen_retlim = 15;	/* Retry limit threshold */
	ep->fen_pper = 0;	/* Normal persistence */

	/* Clear hash filter tables.
	*/
	ep->fen_gaddrh = 0;
	ep->fen_gaddrl = 0;
	ep->fen_iaddrh = 0;
	ep->fen_iaddrl = 0;

	/* Clear the Out-of-sequence TxBD.
	*/
	ep->fen_tfcstat = 0;
	ep->fen_tfclen = 0;
	ep->fen_tfcptr = 0;

	ep->fen_mflr = PKT_MAXBUF_SIZE;   /* maximum frame length register */
	ep->fen_minflr = PKT_MINBUF_SIZE;  /* minimum frame length register */

	/* Set Ethernet station address.
	 *
	 * This is supplied in the board information structure, so we
	 * copy that into the controller.
	 * So, far we have only been given one Ethernet address. We make
	 * it unique by setting a few bits in the upper byte of the
	 * non-static part of the address.
	 */
	eap = (unsigned char *)&(ep->fen_paddrh);
	for (i=5; i>=0; i--) {
		if (i == 3) {
			dev->dev_addr[i] = bd->bi_enetaddr[i];
			dev->dev_addr[i] |= (1 << (7 - fip->fc_fccnum));
			*eap++ = dev->dev_addr[i];
		}
		else {
			*eap++ = dev->dev_addr[i] = bd->bi_enetaddr[i];
		}
	}

	ep->fen_taddrh = 0;
	ep->fen_taddrm = 0;
	ep->fen_taddrl = 0;

	ep->fen_maxd1 = PKT_MAXDMA_SIZE;	/* maximum DMA1 length */
	ep->fen_maxd2 = PKT_MAXDMA_SIZE;	/* maximum DMA2 length */

	/* Clear stat counters, in case we ever enable RMON.
	*/
	ep->fen_octc = 0;
	ep->fen_colc = 0;
	ep->fen_broc = 0;
	ep->fen_mulc = 0;
	ep->fen_uspc = 0;
	ep->fen_frgc = 0;
	ep->fen_ospc = 0;
	ep->fen_jbrc = 0;
	ep->fen_p64c = 0;
	ep->fen_p65c = 0;
	ep->fen_p128c = 0;
	ep->fen_p256c = 0;
	ep->fen_p512c = 0;
	ep->fen_p1024c = 0;

	ep->fen_rfthr = 0;	/* Suggested by manual */
	ep->fen_rfcnt = 0;
	ep->fen_cftype = 0;

	/* Now allocate the host memory pages and initialize the
	 * buffer descriptors.
	 */
	bdp = cep->tx_bd_base;
	for (i=0; i<TX_RING_SIZE; i++) {

		/* Initialize the BD for every fragment in the page.
		*/
		bdp->cbd_sc = 0;
		bdp->cbd_datlen = 0;
		bdp->cbd_bufaddr = 0;
		bdp++;
	}

	/* Set the last buffer to wrap.
	*/
	bdp--;
	bdp->cbd_sc |= BD_SC_WRAP;

	bdp = cep->rx_bd_base;
	for (i=0; i<FCC_ENET_RX_PAGES; i++) {

		/* Allocate a page.
		*/
		mem_addr = __get_free_page(GFP_KERNEL);

		/* Initialize the BD for every fragment in the page.
		*/
		for (j=0; j<FCC_ENET_RX_FRPPG; j++) {
			bdp->cbd_sc = BD_ENET_RX_EMPTY | BD_ENET_RX_INTR;
			bdp->cbd_datlen = 0;
			bdp->cbd_bufaddr = __pa(mem_addr);
			mem_addr += FCC_ENET_RX_FRSIZE;
			bdp++;
		}
	}

	/* Set the last buffer to wrap.
	*/
	bdp--;
	bdp->cbd_sc |= BD_SC_WRAP;

	/* Let's re-initialize the channel now.  We have to do it later
	 * than the manual describes because we have just now finished
	 * the BD initialization.
	 */
	cp->cp_cpcr = mk_cr_cmd(fip->fc_cpmpage, fip->fc_cpmblock, 0x0c,
			CPM_CR_INIT_TRX) | CPM_CR_FLG;
	while (cp->cp_cpcr & CPM_CR_FLG);

	cep->skb_cur = cep->skb_dirty = 0;
}

/* Let 'er rip.
*/
static void __init
init_fcc_startup(fcc_info_t *fip, struct net_device *dev)
{
	volatile fcc_t	*fccp;
	struct fcc_enet_private *cep;

	cep = (struct fcc_enet_private *)(dev->priv);
	fccp = cep->fccp;

	fccp->fcc_fcce = 0xffff;	/* Clear any pending events */

	/* Enable interrupts for transmit error, complete frame
	 * received, and any transmit buffer we have also set the
	 * interrupt flag.
	 */
	fccp->fcc_fccm = (FCC_ENET_TXE | FCC_ENET_RXF | FCC_ENET_TXB);

	/* Install our interrupt handler.
	*/
	if (request_8xxirq(fip->fc_interrupt, fcc_enet_interrupt, 0,
							"fenet", dev) < 0)
		printk("Can't get FCC IRQ %d\n", fip->fc_interrupt);

	/* Set GFMR to enable Ethernet operating mode.
	 */
	fccp->fcc_gfmr = (FCC_GFMR_TCI | FCC_GFMR_MODE_ENET);

	/* Set sync/delimiters.
	*/
	fccp->fcc_fdsr = 0xd555;

	/* Set protocol specific processing mode for Ethernet.
	 * This has to be adjusted for Full Duplex operation after we can
	 * determine how to detect that.
	 */
	fccp->fcc_fpsmr = FCC_PSMR_ENCRC;

	/* And last, enable the transmit and receive processing.
	*/
	fccp->fcc_gfmr |= (FCC_GFMR_ENR | FCC_GFMR_ENT);
}

/* MII command/status interface.
 * I'm not going to describe all of the details.  You can find the
 * protocol definition in many other places, including the data sheet
 * of most PHY parts.
 * I wonder what "they" were thinking (maybe weren't) when they leave
 * the I2C in the CPM but I have to toggle these bits......
 */
static uint
mii_send_receive(fcc_info_t *fip, uint cmd)
{
	unsigned long	flags;
	uint		retval;
	int		read_op, i;
	volatile	immap_t		*immap;
	volatile	iop8260_t	*io;

	immap = (immap_t *)IMAP_ADDR;
	io = &immap->im_ioport;

	/* When we get here, both clock and data are high, outputs.
	 * Output is open drain.
	 * Data transitions on high->low clock, is valid on low->high clock.
	 * Spec says edge transitions no closer than 160 nSec, minimum clock
	 * cycle 400 nSec.  I could only manage about 500 nSec edges with
	 * an XOR loop, so I won't worry about delays yet.
	 * I disable interrupts during bit flipping to ensure atomic
	 * updates of the registers.  I do lots of interrupt disable/enable
	 * to ensure we don't hang out too long with interrupts disabled.
	 */
	
	/* First, crank out 32 1-bits as preamble.
	 * This is 64 transitions to clock the bits, with clock/data
	 * left high.
	 */
	save_flags(flags);
	cli();
	for (i=0; i<64; i++) {
		io->iop_pdatc ^= fip->fc_mdck;
		udelay(0);
	}
	restore_flags(flags);

	read_op = ((cmd & 0xf0000000) == 0x60000000);

	/* We return the command word on a write op, or the command portion
	 * plus the new data on a read op.  This is what the 8xx FEC does,
	 * and it allows the functions to simply look at the returned value
	 * and know the PHY/register as well.
	 */
	if (read_op)
		retval = cmd;
	else
		retval = (cmd >> 16);

	/* Clock out the first 16 MS bits of the command.
	*/
	save_flags(flags);
	cli();
	for (i=0; i<16; i++) {
		io->iop_pdatc &= ~(fip->fc_mdck);
		if (cmd & 0x80000000)
			io->iop_pdatc |= fip->fc_mdio;
		else
			io->iop_pdatc &= ~(fip->fc_mdio);
		cmd <<= 1;
		io->iop_pdatc |= fip->fc_mdck;
		udelay(0);
	}

	/* Do the turn-around.  If read op, we make the IO and input.
	 * If write op, do the 1/0 thing.
	 */
	io->iop_pdatc &= ~(fip->fc_mdck);
	if (read_op)
		io->iop_pdirc &= ~(fip->fc_mdio);
	else
		io->iop_pdatc |= fip->fc_mdio;
	io->iop_pdatc |= fip->fc_mdck;

	/* I do this mainly to get just a little delay.
	*/
	restore_flags(flags);
	save_flags(flags);
	cli();
	io->iop_pdatc &= ~(fip->fc_mdck);
	io->iop_pdirc &= ~(fip->fc_mdio);
	io->iop_pdatc |= fip->fc_mdck;

	restore_flags(flags);
	save_flags(flags);
	cli();

	/* For read, clock in 16 bits.  For write, clock out
	 * rest of command.
	 */
	if (read_op) {
		io->iop_pdatc &= ~(fip->fc_mdck);
		udelay(0);
		for (i=0; i<16; i++) {
			io->iop_pdatc |= fip->fc_mdck;
			udelay(0);
			retval <<= 1;
			if (io->iop_pdatc & fip->fc_mdio)
				retval |= 1;
			io->iop_pdatc &= ~(fip->fc_mdck);
			udelay(0);
		}
	}
	else {
		for (i=0; i<16; i++) {
			io->iop_pdatc &= ~(fip->fc_mdck);
			if (cmd & 0x80000000)
				io->iop_pdatc |= fip->fc_mdio;
			else
				io->iop_pdatc &= ~(fip->fc_mdio);
			cmd <<= 1;
			io->iop_pdatc |= fip->fc_mdck;
			udelay(0);
		}
		io->iop_pdatc &= ~(fip->fc_mdck);
	}
	restore_flags(flags);

	/* Some diagrams show two 1 bits for "idle".  I don't know if
	 * this is really necessary or if it was just to indicate nothing
	 * is going to happen for a while.
	 * Make the data pin an output, set the data high, and clock it.
	 */
	save_flags(flags);
	cli();
	io->iop_pdatc |= fip->fc_mdio;
	io->iop_pdirc |= fip->fc_mdio;
	for (i=0; i<3; i++)
		io->iop_pdatc ^= fip->fc_mdck;
	restore_flags(flags);

	/* We exit with the same conditions as entry.
	*/
	return(retval);
}
# BK Id: SCCS/s.Makefile 1.6 06/27/01 14:49:58 trini
#
# Makefile for xmon

O_TARGET	:= x.o

ifdef CONFIG_8xx
obj-y		:= start_8xx.o
else
obj-y		:= start.o
endif
obj-y		+= xmon.o ppc-dis.o ppc-opc.o subr_prf.o setjmp.o

include $(TOPDIR)/Rules.make
/*
 * BK Id: SCCS/s.adb.c 1.5 05/17/01 18:14:23 cort
 */
/*
 * Copyright (C) 1996 Paul Mackerras.
 */
#include "nonstdio.h"
#include "privinst.h"

#define scanhex	xmon_scanhex
#define skipbl	xmon_skipbl

#define ADB_B		(*(volatile unsigned char *)0xf3016000)
#define ADB_SR		(*(volatile unsigned char *)0xf3017400)
#define ADB_ACR		(*(volatile unsigned char *)0xf3017600)
#define ADB_IFR		(*(volatile unsigned char *)0xf3017a00)

static inline void eieio(void) { asm volatile ("eieio" : :); }

#define N_ADB_LOG	1000
struct adb_log {
    unsigned char b;
    unsigned char ifr;
    unsigned char acr;
    unsigned int time;
} adb_log[N_ADB_LOG];
int n_adb_log;

void
init_adb_log(void)
{
    adb_log[0].b = ADB_B;
    adb_log[0].ifr = ADB_IFR;
    adb_log[0].acr = ADB_ACR;
    adb_log[0].time = get_dec();
    n_adb_log = 0;
}

void
dump_adb_log(void)
{
    unsigned t, t0;
    struct adb_log *ap;
    int i;

    ap = adb_log;
    t0 = ap->time;
    for (i = 0; i <= n_adb_log; ++i, ++ap) {
	t = t0 - ap->time;
	printf("b=%x ifr=%x acr=%x at %d.%.7d\n", ap->b, ap->ifr, ap->acr,
	       t / 1000000000, (t % 1000000000) / 100);
    }
}

void
adb_chklog(void)
{
    struct adb_log *ap = &adb_log[n_adb_log + 1];

    ap->b = ADB_B;
    ap->ifr = ADB_IFR;
    ap->acr = ADB_ACR;
    if (ap->b != ap[-1].b || (ap->ifr & 4) != (ap[-1].ifr & 4)
	|| ap->acr != ap[-1].acr) {
	ap->time = get_dec();
	++n_adb_log;
    }
}

int
adb_bitwait(int bmask, int bval, int fmask, int fval)
{
    int i;
    struct adb_log *ap;

    for (i = 10000; i > 0; --i) {
	adb_chklog();
	ap = &adb_log[n_adb_log];
	if ((ap->b & bmask) == bval && (ap->ifr & fmask) == fval)
	    return 0;
    }
    return -1;
}

int
adb_wait(void)
{
    if (adb_bitwait(0, 0, 4, 4) < 0) {
	printf("adb: ready wait timeout\n");
	return -1;
    }
    return 0;
}

void
adb_readin(void)
{
    int i, j;
    unsigned char d[64];

    if (ADB_B & 8) {
	printf("ADB_B: %x\n", ADB_B);
	return;
    }
    i = 0;
    adb_wait();
    j = ADB_SR;
    eieio();
    ADB_B &= ~0x20;
    eieio();
    for (;;) {
	if (adb_wait() < 0)
	    break;
	d[i++] = ADB_SR;
	eieio();
	if (ADB_B & 8)
	    break;
	ADB_B ^= 0x10;
	eieio();
    }
    ADB_B |= 0x30;
    if (adb_wait() == 0)
	j = ADB_SR;
    for (j = 0; j < i; ++j)
	printf("%.2x ", d[j]);
    printf("\n");
}

int
adb_write(unsigned char *d, int i)
{
    int j;
    unsigned x;

    if ((ADB_B & 8) == 0) {
	printf("r: ");
	adb_readin();
    }
    for (;;) {
	ADB_ACR = 0x1c;
	eieio();
	ADB_SR = d[0];
	eieio();
	ADB_B &= ~0x20;
	eieio();
	if (ADB_B & 8)
	    break;
	ADB_ACR = 0xc;
	eieio();
	ADB_B |= 0x20;
	eieio();
	adb_readin();
    }
    adb_wait();
    for (j = 1; j < i; ++j) {
	ADB_SR = d[j];
	eieio();
	ADB_B ^= 0x10;
	eieio();
	if (adb_wait() < 0)
	    break;
    }
    ADB_ACR = 0xc;
    eieio();
    x = ADB_SR;
    eieio();
    ADB_B |= 0x30;
    return j;
}

void
adbcmds(void)
{
    char cmd;
    unsigned rtcu, rtcl, dec, pdec, x;
    int i, j;
    unsigned char d[64];

    cmd = skipbl();
    switch (cmd) {
    case 't':
	for (;;) {
	    rtcl = get_rtcl();
	    rtcu = get_rtcu();
	    dec = get_dec();
	    printf("rtc u=%u l=%u dec=%x (%d = %d.%.7d)\n",
		   rtcu, rtcl, dec, pdec - dec, (pdec - dec) / 1000000000,
		   ((pdec - dec) % 1000000000) / 100);
	    pdec = dec;
	    if (cmd == 'x')
		break;
	    while (xmon_read(stdin, &cmd, 1) != 1)
		;
	}
	break;
    case 'r':
	init_adb_log();
	while (adb_bitwait(8, 0, 0, 0) == 0)
	    adb_readin();
	break;
    case 'w':
	i = 0;
	while (scanhex(&x))
	    d[i++] = x;
	init_adb_log();
	j = adb_write(d, i);
	printf("sent %d bytes\n", j);
	while (adb_bitwait(8, 0, 0, 0) == 0)
	    adb_readin();
	break;
    case 'l':
	dump_adb_log();
	break;
    }
}
/*
 * BK Id: SCCS/s.ansidecl.h 1.5 05/17/01 18:14:23 cort
 */
/* ANSI and traditional C compatability macros
   Copyright 1991, 1992 Free Software Foundation, Inc.
   This file is part of the GNU C Library.

This program is free software; you can redistribute it and/or modify
it under the terms of the GNU General Public License as published by
the Free Software Foundation; either version 2 of the License, or
(at your option) any later version.

This program is distributed in the hope that it will be useful,
but WITHOUT ANY WARRANTY; without even the implied warranty of
MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
GNU General Public License for more details.

You should have received a copy of the GNU General Public License
along with this program; if not, write to the Free Software
Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA.  */

/* ANSI and traditional C compatibility macros

   ANSI C is assumed if __STDC__ is #defined.

   Macro	ANSI C definition	Traditional C definition
   -----	---- - ----------	----------- - ----------
   PTR		`void *'		`char *'
   LONG_DOUBLE	`long double'		`double'
   VOLATILE	`volatile'		`'
   SIGNED	`signed'		`'
   PTRCONST	`void *const'		`char *'
   ANSI_PROTOTYPES  1			not defined

   CONST is also defined, but is obsolete.  Just use const.

   DEFUN (name, arglist, args)

	Defines function NAME.

	ARGLIST lists the arguments, separated by commas and enclosed in
	parentheses.  ARGLIST becomes the argument list in traditional C.

	ARGS list the arguments with their types.  It becomes a prototype in
	ANSI C, and the type declarations in traditional C.  Arguments should
	be separated with `AND'.  For functions with a variable number of
	arguments, the last thing listed should be `DOTS'.

   DEFUN_VOID (name)

	Defines a function NAME, which takes no arguments.

   obsolete --     EXFUN (name, (prototype))	-- obsolete.

	Replaced by PARAMS.  Do not use; will disappear someday soon.
	Was used in external function declarations.
	In ANSI C it is `NAME PROTOTYPE' (so PROTOTYPE should be enclosed in
	parentheses).  In traditional C it is `NAME()'.
	For a function that takes no arguments, PROTOTYPE should be `(void)'.

    PARAMS ((args))

	We could use the EXFUN macro to handle prototype declarations, but
	the name is misleading and the result is ugly.  So we just define a
	simple macro to handle the parameter lists, as in:

	      static int foo PARAMS ((int, char));

	This produces:  `static int foo();' or `static int foo (int, char);'

	EXFUN would have done it like this:

	      static int EXFUN (foo, (int, char));

	but the function is not external...and it's hard to visually parse
	the function name out of the mess.   EXFUN should be considered
	obsolete; new code should be written to use PARAMS.

    For example:
	extern int printf PARAMS ((CONST char *format DOTS));
	int DEFUN(fprintf, (stream, format),
		  FILE *stream AND CONST char *format DOTS) { ... }
	void DEFUN_VOID(abort) { ... }
*/

#ifndef	_ANSIDECL_H

#define	_ANSIDECL_H	1


/* Every source file includes this file,
   so they will all get the switch for lint.  */
/* LINTLIBRARY */


#if defined (__STDC__) || defined (_AIX) || (defined (__mips) && defined (_SYSTYPE_SVR4)) || defined(WIN32)
/* All known AIX compilers implement these things (but don't always
   define __STDC__).  The RISC/OS MIPS compiler defines these things
   in SVR4 mode, but does not define __STDC__.  */

#define	PTR		void *
#define	PTRCONST	void *CONST
#define	LONG_DOUBLE	long double

#define	AND		,
#define	NOARGS		void
#define	CONST		const
#define	VOLATILE	volatile
#define	SIGNED		signed
#define	DOTS		, ...

#define	EXFUN(name, proto)		name proto
#define	DEFUN(name, arglist, args)	name(args)
#define	DEFUN_VOID(name)		name(void)

#define PROTO(type, name, arglist)	type name arglist
#define PARAMS(paramlist)		paramlist
#define ANSI_PROTOTYPES			1

#else	/* Not ANSI C.  */

#define	PTR		char *
#define	PTRCONST	PTR
#define	LONG_DOUBLE	double

#define	AND		;
#define	NOARGS
#define	CONST
#ifndef const /* some systems define it in header files for non-ansi mode */
#define	const
#endif
#define	VOLATILE
#define	SIGNED
#define	DOTS

#define	EXFUN(name, proto)		name()
#define	DEFUN(name, arglist, args)	name arglist args;
#define	DEFUN_VOID(name)		name()
#define PROTO(type, name, arglist) type name ()
#define PARAMS(paramlist)		()

#endif	/* ANSI C.  */

#endif	/* ansidecl.h	*/
/*
 * BK Id: SCCS/s.nonstdio.h 1.8 12/01/01 20:09:07 benh
 */
typedef int	FILE;
extern FILE *xmon_stdin, *xmon_stdout;
#define EOF	(-1)
#define stdin	xmon_stdin
#define stdout	xmon_stdout
#define printf	xmon_printf
#define fprintf	xmon_fprintf
#define fputs	xmon_fputs
#define fgets	xmon_fgets
#define putchar	xmon_putchar
#define getchar	xmon_getchar
#define putc	xmon_putc
#define getc	xmon_getc
#define fopen(n, m)	NULL
#define fflush(f)	do {} while (0)
#define fclose(f)	do {} while (0)
extern char *fgets(char *, int, void *);
extern void xmon_printf(const char *, ...);
extern void xmon_fprintf(void *, const char *, ...);
extern void xmon_sprintf(char *, const char *, ...);
extern void xmon_puts(char*);

#define perror(s)	printf("%s: no files!\n", (s))
/*
 * BK Id: SCCS/s.ppc-dis.c 1.5 05/17/01 18:14:23 cort
 */
/* ppc-dis.c -- Disassemble PowerPC instructions
   Copyright 1994 Free Software Foundation, Inc.
   Written by Ian Lance Taylor, Cygnus Support

This file is part of GDB, GAS, and the GNU binutils.

GDB, GAS, and the GNU binutils are free software; you can redistribute
them and/or modify them under the terms of the GNU General Public
License as published by the Free Software Foundation; either version
2, or (at your option) any later version.

GDB, GAS, and the GNU binutils are distributed in the hope that they
will be useful, but WITHOUT ANY WARRANTY; without even the implied
warranty of MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See
the GNU General Public License for more details.

You should have received a copy of the GNU General Public License
along with this file; see the file COPYING.  If not, write to the Free
Software Foundation, 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA.  */

#include "nonstdio.h"
#include "ansidecl.h"
#include "ppc.h"

static int print_insn_powerpc PARAMS ((FILE *, unsigned long insn,
				       unsigned memaddr, int dialect));

extern void print_address PARAMS((unsigned memaddr));

/* Print a big endian PowerPC instruction.  For convenience, also
   disassemble instructions supported by the Motorola PowerPC 601.  */

int
print_insn_big_powerpc (FILE *out, unsigned long insn, unsigned memaddr)
{
  return print_insn_powerpc (out, insn, memaddr,
			     PPC_OPCODE_PPC | PPC_OPCODE_601);
}

/* Print a PowerPC or POWER instruction.  */

static int
print_insn_powerpc (FILE *out, unsigned long insn, unsigned memaddr,
		    int dialect)
{
  const struct powerpc_opcode *opcode;
  const struct powerpc_opcode *opcode_end;
  unsigned long op;

  /* Get the major opcode of the instruction.  */
  op = PPC_OP (insn);

  /* Find the first match in the opcode table.  We could speed this up
     a bit by doing a binary search on the major opcode.  */
  opcode_end = powerpc_opcodes + powerpc_num_opcodes;
  for (opcode = powerpc_opcodes; opcode < opcode_end; opcode++)
    {
      unsigned long table_op;
      const unsigned char *opindex;
      const struct powerpc_operand *operand;
      int invalid;
      int need_comma;
      int need_paren;

      table_op = PPC_OP (opcode->opcode);
      if (op < table_op)
		break;
      if (op > table_op)
		continue;

      if ((insn & opcode->mask) != opcode->opcode
	  || (opcode->flags & dialect) == 0)
		continue;

      /* Make two passes over the operands.  First see if any of them
		 have extraction functions, and, if they do, make sure the
		 instruction is valid.  */
      invalid = 0;
      for (opindex = opcode->operands; *opindex != 0; opindex++)
		{
		  operand = powerpc_operands + *opindex;
		  if (operand->extract)
		    (*operand->extract) (insn, &invalid);
		}
      if (invalid)
		continue;

      /* The instruction is valid.  */
      fprintf(out, "%s", opcode->name);
      if (opcode->operands[0] != 0)
		fprintf(out, "\t");

      /* Now extract and print the operands.  */
      need_comma = 0;
      need_paren = 0;
      for (opindex = opcode->operands; *opindex != 0; opindex++)
		{
		  long value;

		  operand = powerpc_operands + *opindex;

		  /* Operands that are marked FAKE are simply ignored.  We
		     already made sure that the extract function considered
		     the instruction to be valid.  */
		  if ((operand->flags & PPC_OPERAND_FAKE) != 0)
		    continue;

		  /* Extract the value from the instruction.  */
		  if (operand->extract)
		    value = (*operand->extract) (insn, (int *) 0);
		  else
		    {
		      value = (insn >> operand->shift) & ((1 << operand->bits) - 1);
		      if ((operand->flags & PPC_OPERAND_SIGNED) != 0
			  && (value & (1 << (operand->bits - 1))) != 0)
			value -= 1 << operand->bits;
		    }

		  /* If the operand is optional, and the value is zero, don't
		     print anything.  */
		  if ((operand->flags & PPC_OPERAND_OPTIONAL) != 0
		      && (operand->flags & PPC_OPERAND_NEXT) == 0
		      && value == 0)
		    continue;

		  if (need_comma)
		    {
		      fprintf(out, ",");
		      need_comma = 0;
		    }

		  /* Print the operand as directed by the flags.  */
		  if ((operand->flags & PPC_OPERAND_GPR) != 0)
		    fprintf(out, "r%ld", value);
		  else if ((operand->flags & PPC_OPERAND_FPR) != 0)
		    fprintf(out, "f%ld", value);
		  else if ((operand->flags & PPC_OPERAND_RELATIVE) != 0)
		    print_address (memaddr + value);
		  else if ((operand->flags & PPC_OPERAND_ABSOLUTE) != 0)
		    print_address (value & 0xffffffff);
		  else if ((operand->flags & PPC_OPERAND_CR) == 0
			   || (dialect & PPC_OPCODE_PPC) == 0)
		    fprintf(out, "%ld", value);
		  else
		    {
		      if (operand->bits == 3)
				fprintf(out, "cr%d", value);
		      else
			{
			  static const char *cbnames[4] = { "lt", "gt", "eq", "so" };
			  int cr;
			  int cc;

			  cr = value >> 2;
			  if (cr != 0)
			    fprintf(out, "4*cr%d", cr);
			  cc = value & 3;
			  if (cc != 0)
			    {
			      if (cr != 0)
					fprintf(out, "+");
			      fprintf(out, "%s", cbnames[cc]);
			    }
			}
	    }

	  if (need_paren)
	    {
	      fprintf(out, ")");
	      need_paren = 0;
	    }

	  if ((operand->flags & PPC_OPERAND_PARENS) == 0)
	    need_comma = 1;
	  else
	    {
	      fprintf(out, "(");
	      need_paren = 1;
	    }
	}

      /* We have found and printed an instruction; return.  */
      return 4;
    }

  /* We could not find a match.  */
  fprintf(out, ".long 0x%lx", insn);

  return 4;
}
/*
 * BK Id: SCCS/s.ppc-opc.c 1.5 05/17/01 18:14:23 cort
 */
/* ppc-opc.c -- PowerPC opcode list
   Copyright 1994 Free Software Foundation, Inc.
   Written by Ian Lance Taylor, Cygnus Support

This file is part of GDB, GAS, and the GNU binutils.

GDB, GAS, and the GNU binutils are free software; you can redistribute
them and/or modify them under the terms of the GNU General Public
License as published by the Free Software Foundation; either version
2, or (at your option) any later version.

GDB, GAS, and the GNU binutils are distributed in the hope that they
will be useful, but WITHOUT ANY WARRANTY; without even the implied
warranty of MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See
the GNU General Public License for more details.

You should have received a copy of the GNU General Public License
along with this file; see the file COPYING.  If not, write to the Free
Software Foundation, 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA.  */

#include <linux/posix_types.h>
#include "ansidecl.h"
#include "ppc.h"

/* This file holds the PowerPC opcode table.  The opcode table
   includes almost all of the extended instruction mnemonics.  This
   permits the disassembler to use them, and simplifies the assembler
   logic, at the cost of increasing the table size.  The table is
   strictly constant data, so the compiler should be able to put it in
   the .text section.

   This file also holds the operand table.  All knowledge about
   inserting operands into instructions and vice-versa is kept in this
   file.  */

/* Local insertion and extraction functions.  */

static unsigned long insert_bat PARAMS ((unsigned long, long, const char **));
static long extract_bat PARAMS ((unsigned long, int *));
static unsigned long insert_bba PARAMS ((unsigned long, long, const char **));
static long extract_bba PARAMS ((unsigned long, int *));
static unsigned long insert_bd PARAMS ((unsigned long, long, const char **));
static long extract_bd PARAMS ((unsigned long, int *));
static unsigned long insert_bdm PARAMS ((unsigned long, long, const char **));
static long extract_bdm PARAMS ((unsigned long, int *));
static unsigned long insert_bdp PARAMS ((unsigned long, long, const char **));
static long extract_bdp PARAMS ((unsigned long, int *));
static unsigned long insert_bo PARAMS ((unsigned long, long, const char **));
static long extract_bo PARAMS ((unsigned long, int *));
static unsigned long insert_boe PARAMS ((unsigned long, long, const char **));
static long extract_boe PARAMS ((unsigned long, int *));
static unsigned long insert_ds PARAMS ((unsigned long, long, const char **));
static long extract_ds PARAMS ((unsigned long, int *));
static unsigned long insert_li PARAMS ((unsigned long, long, const char **));
static long extract_li PARAMS ((unsigned long, int *));
static unsigned long insert_mbe PARAMS ((unsigned long, long, const char **));
static long extract_mbe PARAMS ((unsigned long, int *));
static unsigned long insert_mb6 PARAMS ((unsigned long, long, const char **));
static long extract_mb6 PARAMS ((unsigned long, int *));
static unsigned long insert_nb PARAMS ((unsigned long, long, const char **));
static long extract_nb PARAMS ((unsigned long, int *));
static unsigned long insert_nsi PARAMS ((unsigned long, long, const char **));
static long extract_nsi PARAMS ((unsigned long, int *));
static unsigned long insert_ral PARAMS ((unsigned long, long, const char **));
static unsigned long insert_ram PARAMS ((unsigned long, long, const char **));
static unsigned long insert_ras PARAMS ((unsigned long, long, const char **));
static unsigned long insert_rbs PARAMS ((unsigned long, long, const char **));
static long extract_rbs PARAMS ((unsigned long, int *));
static unsigned long insert_sh6 PARAMS ((unsigned long, long, const char **));
static long extract_sh6 PARAMS ((unsigned long, int *));
static unsigned long insert_spr PARAMS ((unsigned long, long, const char **));
static long extract_spr PARAMS ((unsigned long, int *));
static unsigned long insert_tbr PARAMS ((unsigned long, long, const char **));
static long extract_tbr PARAMS ((unsigned long, int *));

/* The operands table.

   The fields are bits, shift, signed, insert, extract, flags.  */

const struct powerpc_operand powerpc_operands[] =
{
  /* The zero index is used to indicate the end of the list of
     operands.  */
#define UNUSED (0)
  { 0, 0, 0, 0, 0 },

  /* The BA field in an XL form instruction.  */
#define BA (1)
#define BA_MASK (0x1f << 16)
  { 5, 16, 0, 0, PPC_OPERAND_CR },

  /* The BA field in an XL form instruction when it must be the same
     as the BT field in the same instruction.  */
#define BAT (2)
  { 5, 16, insert_bat, extract_bat, PPC_OPERAND_FAKE },

  /* The BB field in an XL form instruction.  */
#define BB (3)
#define BB_MASK (0x1f << 11)
  { 5, 11, 0, 0, PPC_OPERAND_CR },

  /* The BB field in an XL form instruction when it must be the same
     as the BA field in the same instruction.  */
#define BBA (4)
  { 5, 11, insert_bba, extract_bba, PPC_OPERAND_FAKE },

  /* The BD field in a B form instruction.  The lower two bits are
     forced to zero.  */
#define BD (5)
  { 16, 0, insert_bd, extract_bd, PPC_OPERAND_RELATIVE | PPC_OPERAND_SIGNED },

  /* The BD field in a B form instruction when absolute addressing is
     used.  */
#define BDA (6)
  { 16, 0, insert_bd, extract_bd, PPC_OPERAND_ABSOLUTE | PPC_OPERAND_SIGNED },

  /* The BD field in a B form instruction when the - modifier is used.
     This sets the y bit of the BO field appropriately.  */
#define BDM (7)
  { 16, 0, insert_bdm, extract_bdm,
      PPC_OPERAND_RELATIVE | PPC_OPERAND_SIGNED },

  /* The BD field in a B form instruction when the - modifier is used
     and absolute address is used.  */
#define BDMA (8)
  { 16, 0, insert_bdm, extract_bdm,
      PPC_OPERAND_ABSOLUTE | PPC_OPERAND_SIGNED },

  /* The BD field in a B form instruction when the + modifier is used.
     This sets the y bit of the BO field appropriately.  */
#define BDP (9)
  { 16, 0, insert_bdp, extract_bdp,
      PPC_OPERAND_RELATIVE | PPC_OPERAND_SIGNED },

  /* The BD field in a B form instruction when the + modifier is used
     and absolute addressing is used.  */
#define BDPA (10)
  { 16, 0, insert_bdp, extract_bdp,
      PPC_OPERAND_ABSOLUTE | PPC_OPERAND_SIGNED },

  /* The BF field in an X or XL form instruction.  */
#define BF (11)
  { 3, 23, 0, 0, PPC_OPERAND_CR },

  /* An optional BF field.  This is used for comparison instructions,
     in which an omitted BF field is taken as zero.  */
#define OBF (12)
  { 3, 23, 0, 0, PPC_OPERAND_CR | PPC_OPERAND_OPTIONAL },

  /* The BFA field in an X or XL form instruction.  */
#define BFA (13)
  { 3, 18, 0, 0, PPC_OPERAND_CR },

  /* The BI field in a B form or XL form instruction.  */
#define BI (14)
#define BI_MASK (0x1f << 16)
  { 5, 16, 0, 0, PPC_OPERAND_CR },

  /* The BO field in a B form instruction.  Certain values are
     illegal.  */
#define BO (15)
#define BO_MASK (0x1f << 21)
  { 5, 21, insert_bo, extract_bo, 0 },

  /* The BO field in a B form instruction when the + or - modifier is
     used.  This is like the BO field, but it must be even.  */
#define BOE (16)
  { 5, 21, insert_boe, extract_boe, 0 },

  /* The BT field in an X or XL form instruction.  */
#define BT (17)
  { 5, 21, 0, 0, PPC_OPERAND_CR },

  /* The condition register number portion of the BI field in a B form
     or XL form instruction.  This is used for the extended
     conditional branch mnemonics, which set the lower two bits of the
     BI field.  This field is optional.  */
#define CR (18)
  { 3, 18, 0, 0, PPC_OPERAND_CR | PPC_OPERAND_OPTIONAL },

  /* The D field in a D form instruction.  This is a displacement off
     a register, and implies that the next operand is a register in
     parentheses.  */
#define D (19)
  { 16, 0, 0, 0, PPC_OPERAND_PARENS | PPC_OPERAND_SIGNED },

  /* The DS field in a DS form instruction.  This is like D, but the
     lower two bits are forced to zero.  */
#define DS (20)
  { 16, 0, insert_ds, extract_ds, PPC_OPERAND_PARENS | PPC_OPERAND_SIGNED },

  /* The FL1 field in a POWER SC form instruction.  */
#define FL1 (21)
  { 4, 12, 0, 0, 0 },

  /* The FL2 field in a POWER SC form instruction.  */
#define FL2 (22)
  { 3, 2, 0, 0, 0 },

  /* The FLM field in an XFL form instruction.  */
#define FLM (23)
  { 8, 17, 0, 0, 0 },

  /* The FRA field in an X or A form instruction.  */
#define FRA (24)
#define FRA_MASK (0x1f << 16)
  { 5, 16, 0, 0, PPC_OPERAND_FPR },

  /* The FRB field in an X or A form instruction.  */
#define FRB (25)
#define FRB_MASK (0x1f << 11)
  { 5, 11, 0, 0, PPC_OPERAND_FPR },

  /* The FRC field in an A form instruction.  */
#define FRC (26)
#define FRC_MASK (0x1f << 6)
  { 5, 6, 0, 0, PPC_OPERAND_FPR },

  /* The FRS field in an X form instruction or the FRT field in a D, X
     or A form instruction.  */
#define FRS (27)
#define FRT (FRS)
  { 5, 21, 0, 0, PPC_OPERAND_FPR },

  /* The FXM field in an XFX instruction.  */
#define FXM (28)
#define FXM_MASK (0xff << 12)
  { 8, 12, 0, 0, 0 },

  /* The L field in a D or X form instruction.  */
#define L (29)
  { 1, 21, 0, 0, PPC_OPERAND_OPTIONAL },

  /* The LEV field in a POWER SC form instruction.  */
#define LEV (30)
  { 7, 5, 0, 0, 0 },

  /* The LI field in an I form instruction.  The lower two bits are
     forced to zero.  */
#define LI (31)
  { 26, 0, insert_li, extract_li, PPC_OPERAND_RELATIVE | PPC_OPERAND_SIGNED },

  /* The LI field in an I form instruction when used as an absolute
     address.  */
#define LIA (32)
  { 26, 0, insert_li, extract_li, PPC_OPERAND_ABSOLUTE | PPC_OPERAND_SIGNED },

  /* The MB field in an M form instruction.  */
#define MB (33)
#define MB_MASK (0x1f << 6)
  { 5, 6, 0, 0, 0 },

  /* The ME field in an M form instruction.  */
#define ME (34)
#define ME_MASK (0x1f << 1)
  { 5, 1, 0, 0, 0 },

  /* The MB and ME fields in an M form instruction expressed a single
     operand which is a bitmask indicating which bits to select.  This
     is a two operand form using PPC_OPERAND_NEXT.  See the
     description in opcode/ppc.h for what this means.  */
#define MBE (35)
  { 5, 6, 0, 0, PPC_OPERAND_OPTIONAL | PPC_OPERAND_NEXT },
  { 32, 0, insert_mbe, extract_mbe, 0 },

  /* The MB or ME field in an MD or MDS form instruction.  The high
     bit is wrapped to the low end.  */
#define MB6 (37)
#define ME6 (MB6)
#define MB6_MASK (0x3f << 5)
  { 6, 5, insert_mb6, extract_mb6, 0 },

  /* The NB field in an X form instruction.  The value 32 is stored as
     0.  */
#define NB (38)
  { 6, 11, insert_nb, extract_nb, 0 },

  /* The NSI field in a D form instruction.  This is the same as the
     SI field, only negated.  */
#define NSI (39)
  { 16, 0, insert_nsi, extract_nsi,
      PPC_OPERAND_NEGATIVE | PPC_OPERAND_SIGNED },

  /* The RA field in an D, DS, X, XO, M, or MDS form instruction.  */
#define RA (40)
#define RA_MASK (0x1f << 16)
  { 5, 16, 0, 0, PPC_OPERAND_GPR },

  /* The RA field in a D or X form instruction which is an updating
     load, which means that the RA field may not be zero and may not
     equal the RT field.  */
#define RAL (41)
  { 5, 16, insert_ral, 0, PPC_OPERAND_GPR },

  /* The RA field in an lmw instruction, which has special value
     restrictions.  */
#define RAM (42)
  { 5, 16, insert_ram, 0, PPC_OPERAND_GPR },

  /* The RA field in a D or X form instruction which is an updating
     store or an updating floating point load, which means that the RA
     field may not be zero.  */
#define RAS (43)
  { 5, 16, insert_ras, 0, PPC_OPERAND_GPR },

  /* The RB field in an X, XO, M, or MDS form instruction.  */
#define RB (44)
#define RB_MASK (0x1f << 11)
  { 5, 11, 0, 0, PPC_OPERAND_GPR },

  /* The RB field in an X form instruction when it must be the same as
     the RS field in the instruction.  This is used for extended
     mnemonics like mr.  */
#define RBS (45)
  { 5, 1, insert_rbs, extract_rbs, PPC_OPERAND_FAKE },

  /* The RS field in a D, DS, X, XFX, XS, M, MD or MDS form
     instruction or the RT field in a D, DS, X, XFX or XO form
     instruction.  */
#define RS (46)
#define RT (RS)
#define RT_MASK (0x1f << 21)
  { 5, 21, 0, 0, PPC_OPERAND_GPR },

  /* The SH field in an X or M form instruction.  */
#define SH (47)
#define SH_MASK (0x1f << 11)
  { 5, 11, 0, 0, 0 },

  /* The SH field in an MD form instruction.  This is split.  */
#define SH6 (48)
#define SH6_MASK ((0x1f << 11) | (1 << 1))
  { 6, 1, insert_sh6, extract_sh6, 0 },

  /* The SI field in a D form instruction.  */
#define SI (49)
  { 16, 0, 0, 0, PPC_OPERAND_SIGNED },

  /* The SI field in a D form instruction when we accept a wide range
     of positive values.  */
#define SISIGNOPT (50)
  { 16, 0, 0, 0, PPC_OPERAND_SIGNED | PPC_OPERAND_SIGNOPT },

  /* The SPR field in an XFX form instruction.  This is flipped--the
     lower 5 bits are stored in the upper 5 and vice- versa.  */
#define SPR (51)
#define SPR_MASK (0x3ff << 11)
  { 10, 11, insert_spr, extract_spr, 0 },

  /* The BAT index number in an XFX form m[ft]ibat[lu] instruction.  */
#define SPRBAT (52)
#define SPRBAT_MASK (0x3 << 17)
  { 2, 17, 0, 0, 0 },

  /* The SPRG register number in an XFX form m[ft]sprg instruction.  */
#define SPRG (53)
#define SPRG_MASK (0x3 << 16)
  { 2, 16, 0, 0, 0 },

  /* The SR field in an X form instruction.  */
#define SR (54)
  { 4, 16, 0, 0, 0 },

  /* The SV field in a POWER SC form instruction.  */
#define SV (55)
  { 14, 2, 0, 0, 0 },

  /* The TBR field in an XFX form instruction.  This is like the SPR
     field, but it is optional.  */
#define TBR (56)
  { 10, 11, insert_tbr, extract_tbr, PPC_OPERAND_OPTIONAL },

  /* The TO field in a D or X form instruction.  */
#define TO (57)
#define TO_MASK (0x1f << 21)
  { 5, 21, 0, 0, 0 },

  /* The U field in an X form instruction.  */
#define U (58)
  { 4, 12, 0, 0, 0 },

  /* The UI field in a D form instruction.  */
#define UI (59)
  { 16, 0, 0, 0, 0 },
};

/* The functions used to insert and extract complicated operands.  */

/* The BA field in an XL form instruction when it must be the same as
   the BT field in the same instruction.  This operand is marked FAKE.
   The insertion function just copies the BT field into the BA field,
   and the extraction function just checks that the fields are the
   same.  */

/*ARGSUSED*/
static unsigned long 
insert_bat (insn, value, errmsg)
     unsigned long insn;
     long value;
     const char **errmsg;
{
  return insn | (((insn >> 21) & 0x1f) << 16);
}

static long
extract_bat (insn, invalid)
     unsigned long insn;
     int *invalid;
{
  if (invalid != (int *) NULL
      && ((insn >> 21) & 0x1f) != ((insn >> 16) & 0x1f))
    *invalid = 1;
  return 0;
}

/* The BB field in an XL form instruction when it must be the same as
   the BA field in the same instruction.  This operand is marked FAKE.
   The insertion function just copies the BA field into the BB field,
   and the extraction function just checks that the fields are the
   same.  */

/*ARGSUSED*/
static unsigned long
insert_bba (insn, value, errmsg)
     unsigned long insn;
     long value;
     const char **errmsg;
{
  return insn | (((insn >> 16) & 0x1f) << 11);
}

static long
extract_bba (insn, invalid)
     unsigned long insn;
     int *invalid;
{
  if (invalid != (int *) NULL
      && ((insn >> 16) & 0x1f) != ((insn >> 11) & 0x1f))
    *invalid = 1;
  return 0;
}

/* The BD field in a B form instruction.  The lower two bits are
   forced to zero.  */

/*ARGSUSED*/
static unsigned long
insert_bd (insn, value, errmsg)
     unsigned long insn;
     long value;
     const char **errmsg;
{
  return insn | (value & 0xfffc);
}

/*ARGSUSED*/
static long
extract_bd (insn, invalid)
     unsigned long insn;
     int *invalid;
{
  if ((insn & 0x8000) != 0)
    return (insn & 0xfffc) - 0x10000;
  else
    return insn & 0xfffc;
}

/* The BD field in a B form instruction when the - modifier is used.
   This modifier means that the branch is not expected to be taken.
   We must set the y bit of the BO field to 1 if the offset is
   negative.  When extracting, we require that the y bit be 1 and that
   the offset be positive, since if the y bit is 0 we just want to
   print the normal form of the instruction.  */

/*ARGSUSED*/
static unsigned long
insert_bdm (insn, value, errmsg)
     unsigned long insn;
     long value;
     const char **errmsg;
{
  if ((value & 0x8000) != 0)
    insn |= 1 << 21;
  return insn | (value & 0xfffc);
}

static long
extract_bdm (insn, invalid)
     unsigned long insn;
     int *invalid;
{
  if (invalid != (int *) NULL
      && ((insn & (1 << 21)) == 0
	  || (insn & (1 << 15)) == 0))
    *invalid = 1;
  if ((insn & 0x8000) != 0)
    return (insn & 0xfffc) - 0x10000;
  else
    return insn & 0xfffc;
}

/* The BD field in a B form instruction when the + modifier is used.
   This is like BDM, above, except that the branch is expected to be
   taken.  */

/*ARGSUSED*/
static unsigned long
insert_bdp (insn, value, errmsg)
     unsigned long insn;
     long value;
     const char **errmsg;
{
  if ((value & 0x8000) == 0)
    insn |= 1 << 21;
  return insn | (value & 0xfffc);
}

static long
extract_bdp (insn, invalid)
     unsigned long insn;
     int *invalid;
{
  if (invalid != (int *) NULL
      && ((insn & (1 << 21)) == 0
	  || (insn & (1 << 15)) != 0))
    *invalid = 1;
  if ((insn & 0x8000) != 0)
    return (insn & 0xfffc) - 0x10000;
  else
    return insn & 0xfffc;
}

/* Check for legal values of a BO field.  */

static int
valid_bo (long value)
{
  /* Certain encodings have bits that are required to be zero.  These
     are (z must be zero, y may be anything):
         001zy
	 011zy
	 1z00y
	 1z01y
	 1z1zz
     */
  switch (value & 0x14)
    {
    default:
    case 0:
      return 1;
    case 0x4:
      return (value & 0x2) == 0;
    case 0x10:
      return (value & 0x8) == 0;
    case 0x14:
      return value == 0x14;
    }
}

/* The BO field in a B form instruction.  Warn about attempts to set
   the field to an illegal value.  */

static unsigned long
insert_bo (insn, value, errmsg)
     unsigned long insn;
     long value;
     const char **errmsg;
{
  if (errmsg != (const char **) NULL
      && ! valid_bo (value))
    *errmsg = "invalid conditional option";
  return insn | ((value & 0x1f) << 21);
}

static long
extract_bo (insn, invalid)
     unsigned long insn;
     int *invalid;
{
  long value;

  value = (insn >> 21) & 0x1f;
  if (invalid != (int *) NULL
      && ! valid_bo (value))
    *invalid = 1;
  return value;
}

/* The BO field in a B form instruction when the + or - modifier is
   used.  This is like the BO field, but it must be even.  When
   extracting it, we force it to be even.  */

static unsigned long
insert_boe (insn, value, errmsg)
     unsigned long insn;
     long value;
     const char **errmsg;
{
  if (errmsg != (const char **) NULL)
    {
      if (! valid_bo (value))
	*errmsg = "invalid conditional option";
      else if ((value & 1) != 0)
	*errmsg = "attempt to set y bit when using + or - modifier";
    }
  return insn | ((value & 0x1f) << 21);
}

static long
extract_boe (insn, invalid)
     unsigned long insn;
     int *invalid;
{
  long value;

  value = (insn >> 21) & 0x1f;
  if (invalid != (int *) NULL
      && ! valid_bo (value))
    *invalid = 1;
  return value & 0x1e;
}

/* The DS field in a DS form instruction.  This is like D, but the
   lower two bits are forced to zero.  */

/*ARGSUSED*/
static unsigned long
insert_ds (insn, value, errmsg)
     unsigned long insn;
     long value;
     const char **errmsg;
{
  return insn | (value & 0xfffc);
}

/*ARGSUSED*/
static long
extract_ds (insn, invalid)
     unsigned long insn;
     int *invalid;
{
  if ((insn & 0x8000) != 0)
    return (insn & 0xfffc) - 0x10000;
  else
    return insn & 0xfffc;
}

/* The LI field in an I form instruction.  The lower two bits are
   forced to zero.  */

/*ARGSUSED*/
static unsigned long
insert_li (insn, value, errmsg)
     unsigned long insn;
     long value;
     const char **errmsg;
{
  return insn | (value & 0x3fffffc);
}

/*ARGSUSED*/
static long
extract_li (insn, invalid)
     unsigned long insn;
     int *invalid;
{
  if ((insn & 0x2000000) != 0)
    return (insn & 0x3fffffc) - 0x4000000;
  else
    return insn & 0x3fffffc;
}

/* The MB and ME fields in an M form instruction expressed as a single
   operand which is itself a bitmask.  The extraction function always
   marks it as invalid, since we never want to recognize an
   instruction which uses a field of this type.  */

static unsigned long
insert_mbe (insn, value, errmsg)
     unsigned long insn;
     long value;
     const char **errmsg;
{
  unsigned long uval;
  int mb, me;

  uval = value;

  if (uval == 0)
    {
      if (errmsg != (const char **) NULL)
	*errmsg = "illegal bitmask";
      return insn;
    }

  me = 31;
  while ((uval & 1) == 0)
    {
      uval >>= 1;
      --me;
    }

  mb = me;
  uval >>= 1;
  while ((uval & 1) != 0)
    {
      uval >>= 1;
      --mb;
    }

  if (uval != 0)
    {
      if (errmsg != (const char **) NULL)
	*errmsg = "illegal bitmask";
    }

  return insn | (mb << 6) | (me << 1);
}

static long
extract_mbe (insn, invalid)
     unsigned long insn;
     int *invalid;
{
  long ret;
  int mb, me;
  int i;

  if (invalid != (int *) NULL)
    *invalid = 1;

  ret = 0;
  mb = (insn >> 6) & 0x1f;
  me = (insn >> 1) & 0x1f;
  for (i = mb; i < me; i++)
    ret |= 1 << (31 - i);
  return ret;
}

/* The MB or ME field in an MD or MDS form instruction.  The high bit
   is wrapped to the low end.  */

/*ARGSUSED*/
static unsigned long
insert_mb6 (insn, value, errmsg)
     unsigned long insn;
     long value;
     const char **errmsg;
{
  return insn | ((value & 0x1f) << 6) | (value & 0x20);
}

/*ARGSUSED*/
static long
extract_mb6 (insn, invalid)
     unsigned long insn;
     int *invalid;
{
  return ((insn >> 6) & 0x1f) | (insn & 0x20);
}

/* The NB field in an X form instruction.  The value 32 is stored as
   0.  */

static unsigned long
insert_nb (insn, value, errmsg)
     unsigned long insn;
     long value;
     const char **errmsg;
{
  if (value < 0 || value > 32)
    *errmsg = "value out of range";
  if (value == 32)
    value = 0;
  return insn | ((value & 0x1f) << 11);
}

/*ARGSUSED*/
static long
extract_nb (insn, invalid)
     unsigned long insn;
     int *invalid;
{
  long ret;

  ret = (insn >> 11) & 0x1f;
  if (ret == 0)
    ret = 32;
  return ret;
}

/* The NSI field in a D form instruction.  This is the same as the SI
   field, only negated.  The extraction function always marks it as
   invalid, since we never want to recognize an instruction which uses
   a field of this type.  */

/*ARGSUSED*/
static unsigned long
insert_nsi (insn, value, errmsg)
     unsigned long insn;
     long value;
     const char **errmsg;
{
  return insn | ((- value) & 0xffff);
}

static long
extract_nsi (insn, invalid)
     unsigned long insn;
     int *invalid;
{
  if (invalid != (int *) NULL)
    *invalid = 1;
  if ((insn & 0x8000) != 0)
    return - ((insn & 0xffff) - 0x10000);
  else
    return - (insn & 0xffff);
}

/* The RA field in a D or X form instruction which is an updating
   load, which means that the RA field may not be zero and may not
   equal the RT field.  */

static unsigned long
insert_ral (insn, value, errmsg)
     unsigned long insn;
     long value;
     const char **errmsg;
{
  if (value == 0
      || value == ((insn >> 21) & 0x1f))
    *errmsg = "invalid register operand when updating";
  return insn | ((value & 0x1f) << 16);
}

/* The RA field in an lmw instruction, which has special value
   restrictions.  */

static unsigned long
insert_ram (insn, value, errmsg)
     unsigned long insn;
     long value;
     const char **errmsg;
{
  if (value >= ((insn >> 21) & 0x1f))
    *errmsg = "index register in load range";
  return insn | ((value & 0x1f) << 16);
}

/* The RA field in a D or X form instruction which is an updating
   store or an updating floating point load, which means that the RA
   field may not be zero.  */

static unsigned long
insert_ras (insn, value, errmsg)
     unsigned long insn;
     long value;
     const char **errmsg;
{
  if (value == 0)
    *errmsg = "invalid register operand when updating";
  return insn | ((value & 0x1f) << 16);
}

/* The RB field in an X form instruction when it must be the same as
   the RS field in the instruction.  This is used for extended
   mnemonics like mr.  This operand is marked FAKE.  The insertion
   function just copies the BT field into the BA field, and the
   extraction function just checks that the fields are the same.  */

/*ARGSUSED*/
static unsigned long 
insert_rbs (insn, value, errmsg)
     unsigned long insn;
     long value;
     const char **errmsg;
{
  return insn | (((insn >> 21) & 0x1f) << 11);
}

static long
extract_rbs (insn, invalid)
     unsigned long insn;
     int *invalid;
{
  if (invalid != (int *) NULL
      && ((insn >> 21) & 0x1f) != ((insn >> 11) & 0x1f))
    *invalid = 1;
  return 0;
}

/* The SH field in an MD form instruction.  This is split.  */

/*ARGSUSED*/
static unsigned long
insert_sh6 (insn, value, errmsg)
     unsigned long insn;
     long value;
     const char **errmsg;
{
  return insn | ((value & 0x1f) << 11) | ((value & 0x20) >> 4);
}

/*ARGSUSED*/
static long
extract_sh6 (insn, invalid)
     unsigned long insn;
     int *invalid;
{
  return ((insn >> 11) & 0x1f) | ((insn << 4) & 0x20);
}

/* The SPR field in an XFX form instruction.  This is flipped--the
   lower 5 bits are stored in the upper 5 and vice- versa.  */

static unsigned long
insert_spr (insn, value, errmsg)
     unsigned long insn;
     long value;
     const char **errmsg;
{
  return insn | ((value & 0x1f) << 16) | ((value & 0x3e0) << 6);
}

static long
extract_spr (insn, invalid)
     unsigned long insn;
     int *invalid;
{
  return ((insn >> 16) & 0x1f) | ((insn >> 6) & 0x3e0);
}

/* The TBR field in an XFX instruction.  This is just like SPR, but it
   is optional.  When TBR is omitted, it must be inserted as 268 (the
   magic number of the TB register).  These functions treat 0
   (indicating an omitted optional operand) as 268.  This means that
   ``mftb 4,0'' is not handled correctly.  This does not matter very
   much, since the architecture manual does not define mftb as
   accepting any values other than 268 or 269.  */

#define TB (268)

static unsigned long
insert_tbr (insn, value, errmsg)
     unsigned long insn;
     long value;
     const char **errmsg;
{
  if (value == 0)
    value = TB;
  return insn | ((value & 0x1f) << 16) | ((value & 0x3e0) << 6);
}

static long
extract_tbr (insn, invalid)
     unsigned long insn;
     int *invalid;
{
  long ret;

  ret = ((insn >> 16) & 0x1f) | ((insn >> 6) & 0x3e0);
  if (ret == TB)
    ret = 0;
  return ret;
}

/* Macros used to form opcodes.  */

/* The main opcode.  */
#define OP(x) (((x) & 0x3f) << 26)
#define OP_MASK OP (0x3f)

/* The main opcode combined with a trap code in the TO field of a D
   form instruction.  Used for extended mnemonics for the trap
   instructions.  */
#define OPTO(x,to) (OP (x) | (((to) & 0x1f) << 21))
#define OPTO_MASK (OP_MASK | TO_MASK)

/* The main opcode combined with a comparison size bit in the L field
   of a D form or X form instruction.  Used for extended mnemonics for
   the comparison instructions.  */
#define OPL(x,l) (OP (x) | (((l) & 1) << 21))
#define OPL_MASK OPL (0x3f,1)

/* An A form instruction.  */
#define A(op, xop, rc) (OP (op) | (((xop) & 0x1f) << 1) | ((rc) & 1))
#define A_MASK A (0x3f, 0x1f, 1)

/* An A_MASK with the FRB field fixed.  */
#define AFRB_MASK (A_MASK | FRB_MASK)

/* An A_MASK with the FRC field fixed.  */
#define AFRC_MASK (A_MASK | FRC_MASK)

/* An A_MASK with the FRA and FRC fields fixed.  */
#define AFRAFRC_MASK (A_MASK | FRA_MASK | FRC_MASK)

/* A B form instruction.  */
#define B(op, aa, lk) (OP (op) | (((aa) & 1) << 1) | ((lk) & 1))
#define B_MASK B (0x3f, 1, 1)

/* A B form instruction setting the BO field.  */
#define BBO(op, bo, aa, lk) (B ((op), (aa), (lk)) | (((bo) & 0x1f) << 21))
#define BBO_MASK BBO (0x3f, 0x1f, 1, 1)

/* A BBO_MASK with the y bit of the BO field removed.  This permits
   matching a conditional branch regardless of the setting of the y
   bit.  */
#define Y_MASK (1 << 21)
#define BBOY_MASK (BBO_MASK &~ Y_MASK)

/* A B form instruction setting the BO field and the condition bits of
   the BI field.  */
#define BBOCB(op, bo, cb, aa, lk) \
  (BBO ((op), (bo), (aa), (lk)) | (((cb) & 0x3) << 16))
#define BBOCB_MASK BBOCB (0x3f, 0x1f, 0x3, 1, 1)

/* A BBOCB_MASK with the y bit of the BO field removed.  */
#define BBOYCB_MASK (BBOCB_MASK &~ Y_MASK)

/* A BBOYCB_MASK in which the BI field is fixed.  */
#define BBOYBI_MASK (BBOYCB_MASK | BI_MASK)

/* The main opcode mask with the RA field clear.  */
#define DRA_MASK (OP_MASK | RA_MASK)

/* A DS form instruction.  */
#define DSO(op, xop) (OP (op) | ((xop) & 0x3))
#define DS_MASK DSO (0x3f, 3)

/* An M form instruction.  */
#define M(op, rc) (OP (op) | ((rc) & 1))
#define M_MASK M (0x3f, 1)

/* An M form instruction with the ME field specified.  */
#define MME(op, me, rc) (M ((op), (rc)) | (((me) & 0x1f) << 1))

/* An M_MASK with the MB and ME fields fixed.  */
#define MMBME_MASK (M_MASK | MB_MASK | ME_MASK)

/* An M_MASK with the SH and ME fields fixed.  */
#define MSHME_MASK (M_MASK | SH_MASK | ME_MASK)

/* An MD form instruction.  */
#define MD(op, xop, rc) (OP (op) | (((xop) & 0x7) << 2) | ((rc) & 1))
#define MD_MASK MD (0x3f, 0x7, 1)

/* An MD_MASK with the MB field fixed.  */
#define MDMB_MASK (MD_MASK | MB6_MASK)

/* An MD_MASK with the SH field fixed.  */
#define MDSH_MASK (MD_MASK | SH6_MASK)

/* An MDS form instruction.  */
#define MDS(op, xop, rc) (OP (op) | (((xop) & 0xf) << 1) | ((rc) & 1))
#define MDS_MASK MDS (0x3f, 0xf, 1)

/* An MDS_MASK with the MB field fixed.  */
#define MDSMB_MASK (MDS_MASK | MB6_MASK)

/* An SC form instruction.  */
#define SC(op, sa, lk) (OP (op) | (((sa) & 1) << 1) | ((lk) & 1))
#define SC_MASK (OP_MASK | (0x3ff << 16) | (1 << 1) | 1)

/* An X form instruction.  */
#define X(op, xop) (OP (op) | (((xop) & 0x3ff) << 1))

/* An X form instruction with the RC bit specified.  */
#define XRC(op, xop, rc) (X ((op), (xop)) | ((rc) & 1))

/* The mask for an X form instruction.  */
#define X_MASK XRC (0x3f, 0x3ff, 1)

/* An X_MASK with the RA field fixed.  */
#define XRA_MASK (X_MASK | RA_MASK)

/* An X_MASK with the RB field fixed.  */
#define XRB_MASK (X_MASK | RB_MASK)

/* An X_MASK with the RT field fixed.  */
#define XRT_MASK (X_MASK | RT_MASK)

/* An X_MASK with the RA and RB fields fixed.  */
#define XRARB_MASK (X_MASK | RA_MASK | RB_MASK)

/* An X_MASK with the RT and RA fields fixed.  */
#define XRTRA_MASK (X_MASK | RT_MASK | RA_MASK)

/* An X form comparison instruction.  */
#define XCMPL(op, xop, l) (X ((op), (xop)) | (((l) & 1) << 21))

/* The mask for an X form comparison instruction.  */
#define XCMP_MASK (X_MASK | (1 << 22))

/* The mask for an X form comparison instruction with the L field
   fixed.  */
#define XCMPL_MASK (XCMP_MASK | (1 << 21))

/* An X form trap instruction with the TO field specified.  */
#define XTO(op, xop, to) (X ((op), (xop)) | (((to) & 0x1f) << 21))
#define XTO_MASK (X_MASK | TO_MASK)

/* An XFL form instruction.  */
#define XFL(op, xop, rc) (OP (op) | (((xop) & 0x3ff) << 1) | ((rc) & 1))
#define XFL_MASK (XFL (0x3f, 0x3ff, 1) | (1 << 25) | (1 << 16))

/* An XL form instruction with the LK field set to 0.  */
#define XL(op, xop) (OP (op) | (((xop) & 0x3ff) << 1))

/* An XL form instruction which uses the LK field.  */
#define XLLK(op, xop, lk) (XL ((op), (xop)) | ((lk) & 1))

/* The mask for an XL form instruction.  */
#define XL_MASK XLLK (0x3f, 0x3ff, 1)

/* An XL form instruction which explicitly sets the BO field.  */
#define XLO(op, bo, xop, lk) \
  (XLLK ((op), (xop), (lk)) | (((bo) & 0x1f) << 21))
#define XLO_MASK (XL_MASK | BO_MASK)

/* An XL form instruction which explicitly sets the y bit of the BO
   field.  */
#define XLYLK(op, xop, y, lk) (XLLK ((op), (xop), (lk)) | (((y) & 1) << 21))
#define XLYLK_MASK (XL_MASK | Y_MASK)

/* An XL form instruction which sets the BO field and the condition
   bits of the BI field.  */
#define XLOCB(op, bo, cb, xop, lk) \
  (XLO ((op), (bo), (xop), (lk)) | (((cb) & 3) << 16))
#define XLOCB_MASK XLOCB (0x3f, 0x1f, 0x3, 0x3ff, 1)

/* An XL_MASK or XLYLK_MASK or XLOCB_MASK with the BB field fixed.  */
#define XLBB_MASK (XL_MASK | BB_MASK)
#define XLYBB_MASK (XLYLK_MASK | BB_MASK)
#define XLBOCBBB_MASK (XLOCB_MASK | BB_MASK)

/* An XL_MASK with the BO and BB fields fixed.  */
#define XLBOBB_MASK (XL_MASK | BO_MASK | BB_MASK)

/* An XL_MASK with the BO, BI and BB fields fixed.  */
#define XLBOBIBB_MASK (XL_MASK | BO_MASK | BI_MASK | BB_MASK)

/* An XO form instruction.  */
#define XO(op, xop, oe, rc) \
  (OP (op) | (((xop) & 0x1ff) << 1) | (((oe) & 1) << 10) | ((rc) & 1))
#define XO_MASK XO (0x3f, 0x1ff, 1, 1)

/* An XO_MASK with the RB field fixed.  */
#define XORB_MASK (XO_MASK | RB_MASK)

/* An XS form instruction.  */
#define XS(op, xop, rc) (OP (op) | (((xop) & 0x1ff) << 2) | ((rc) & 1))
#define XS_MASK XS (0x3f, 0x1ff, 1)

/* A mask for the FXM version of an XFX form instruction.  */
#define XFXFXM_MASK (X_MASK | (1 << 20) | (1 << 11))

/* An XFX form instruction with the FXM field filled in.  */
#define XFXM(op, xop, fxm) \
  (X ((op), (xop)) | (((fxm) & 0xff) << 12))

/* An XFX form instruction with the SPR field filled in.  */
#define XSPR(op, xop, spr) \
  (X ((op), (xop)) | (((spr) & 0x1f) << 16) | (((spr) & 0x3e0) << 6))
#define XSPR_MASK (X_MASK | SPR_MASK)

/* An XFX form instruction with the SPR field filled in except for the
   SPRBAT field.  */
#define XSPRBAT_MASK (XSPR_MASK &~ SPRBAT_MASK)

/* An XFX form instruction with the SPR field filled in except for the
   SPRG field.  */
#define XSPRG_MASK (XSPR_MASK &~ SPRG_MASK)

/* The BO encodings used in extended conditional branch mnemonics.  */
#define BODNZF	(0x0)
#define BODNZFP	(0x1)
#define BODZF	(0x2)
#define BODZFP	(0x3)
#define BOF	(0x4)
#define BOFP	(0x5)
#define BODNZT	(0x8)
#define BODNZTP	(0x9)
#define BODZT	(0xa)
#define BODZTP	(0xb)
#define BOT	(0xc)
#define BOTP	(0xd)
#define BODNZ	(0x10)
#define BODNZP	(0x11)
#define BODZ	(0x12)
#define BODZP	(0x13)
#define BOU	(0x14)

/* The BI condition bit encodings used in extended conditional branch
   mnemonics.  */
#define CBLT	(0)
#define CBGT	(1)
#define CBEQ	(2)
#define CBSO	(3)

/* The TO encodings used in extended trap mnemonics.  */
#define TOLGT	(0x1)
#define TOLLT	(0x2)
#define TOEQ	(0x4)
#define TOLGE	(0x5)
#define TOLNL	(0x5)
#define TOLLE	(0x6)
#define TOLNG	(0x6)
#define TOGT	(0x8)
#define TOGE	(0xc)
#define TONL	(0xc)
#define TOLT	(0x10)
#define TOLE	(0x14)
#define TONG	(0x14)
#define TONE	(0x18)
#define TOU	(0x1f)

/* Smaller names for the flags so each entry in the opcodes table will
   fit on a single line.  */
#undef PPC
#define PPC PPC_OPCODE_PPC
#define POWER PPC_OPCODE_POWER
#define POWER2 PPC_OPCODE_POWER2
#define B32 PPC_OPCODE_32
#define B64 PPC_OPCODE_64
#define M601 PPC_OPCODE_601

/* The opcode table.

   The format of the opcode table is:

   NAME	     OPCODE	MASK		FLAGS		{ OPERANDS }

   NAME is the name of the instruction.
   OPCODE is the instruction opcode.
   MASK is the opcode mask; this is used to tell the disassembler
     which bits in the actual opcode must match OPCODE.
   FLAGS are flags indicated what processors support the instruction.
   OPERANDS is the list of operands.

   The disassembler reads the table in order and prints the first
   instruction which matches, so this table is sorted to put more
   specific instructions before more general instructions.  It is also
   sorted by major opcode.  */

const struct powerpc_opcode powerpc_opcodes[] = {
{ "tdlgti",  OPTO(2,TOLGT), OPTO_MASK,	PPC|B64,	{ RA, SI } },
{ "tdllti",  OPTO(2,TOLLT), OPTO_MASK,	PPC|B64,	{ RA, SI } },
{ "tdeqi",   OPTO(2,TOEQ), OPTO_MASK,	PPC|B64,	{ RA, SI } },
{ "tdlgei",  OPTO(2,TOLGE), OPTO_MASK,	PPC|B64,	{ RA, SI } },
{ "tdlnli",  OPTO(2,TOLNL), OPTO_MASK,	PPC|B64,	{ RA, SI } },
{ "tdllei",  OPTO(2,TOLLE), OPTO_MASK,	PPC|B64,	{ RA, SI } },
{ "tdlngi",  OPTO(2,TOLNG), OPTO_MASK,	PPC|B64,	{ RA, SI } },
{ "tdgti",   OPTO(2,TOGT), OPTO_MASK,	PPC|B64,	{ RA, SI } },
{ "tdgei",   OPTO(2,TOGE), OPTO_MASK,	PPC|B64,	{ RA, SI } },
{ "tdnli",   OPTO(2,TONL), OPTO_MASK,	PPC|B64,	{ RA, SI } },
{ "tdlti",   OPTO(2,TOLT), OPTO_MASK,	PPC|B64,	{ RA, SI } },
{ "tdlei",   OPTO(2,TOLE), OPTO_MASK,	PPC|B64,	{ RA, SI } },
{ "tdngi",   OPTO(2,TONG), OPTO_MASK,	PPC|B64,	{ RA, SI } },
{ "tdnei",   OPTO(2,TONE), OPTO_MASK,	PPC|B64,	{ RA, SI } },
{ "tdi",     OP(2),	OP_MASK,	PPC|B64,	{ TO, RA, SI } },

{ "twlgti",  OPTO(3,TOLGT), OPTO_MASK,	PPC,		{ RA, SI } },
{ "tlgti",   OPTO(3,TOLGT), OPTO_MASK,	POWER,		{ RA, SI } },
{ "twllti",  OPTO(3,TOLLT), OPTO_MASK,	PPC,		{ RA, SI } },
{ "tllti",   OPTO(3,TOLLT), OPTO_MASK,	POWER,		{ RA, SI } },
{ "tweqi",   OPTO(3,TOEQ), OPTO_MASK,	PPC,		{ RA, SI } },
{ "teqi",    OPTO(3,TOEQ), OPTO_MASK,	POWER,		{ RA, SI } },
{ "twlgei",  OPTO(3,TOLGE), OPTO_MASK,	PPC,		{ RA, SI } },
{ "tlgei",   OPTO(3,TOLGE), OPTO_MASK,	POWER,		{ RA, SI } },
{ "twlnli",  OPTO(3,TOLNL), OPTO_MASK,	PPC,		{ RA, SI } },
{ "tlnli",   OPTO(3,TOLNL), OPTO_MASK,	POWER,		{ RA, SI } },
{ "twllei",  OPTO(3,TOLLE), OPTO_MASK,	PPC,		{ RA, SI } },
{ "tllei",   OPTO(3,TOLLE), OPTO_MASK,	POWER,		{ RA, SI } },
{ "twlngi",  OPTO(3,TOLNG), OPTO_MASK,	PPC,		{ RA, SI } },
{ "tlngi",   OPTO(3,TOLNG), OPTO_MASK,	POWER,		{ RA, SI } },
{ "twgti",   OPTO(3,TOGT), OPTO_MASK,	PPC,		{ RA, SI } },
{ "tgti",    OPTO(3,TOGT), OPTO_MASK,	POWER,		{ RA, SI } },
{ "twgei",   OPTO(3,TOGE), OPTO_MASK,	PPC,		{ RA, SI } },
{ "tgei",    OPTO(3,TOGE), OPTO_MASK,	POWER,		{ RA, SI } },
{ "twnli",   OPTO(3,TONL), OPTO_MASK,	PPC,		{ RA, SI } },
{ "tnli",    OPTO(3,TONL), OPTO_MASK,	POWER,		{ RA, SI } },
{ "twlti",   OPTO(3,TOLT), OPTO_MASK,	PPC,		{ RA, SI } },
{ "tlti",    OPTO(3,TOLT), OPTO_MASK,	POWER,		{ RA, SI } },
{ "twlei",   OPTO(3,TOLE), OPTO_MASK,	PPC,		{ RA, SI } },
{ "tlei",    OPTO(3,TOLE), OPTO_MASK,	POWER,		{ RA, SI } },
{ "twngi",   OPTO(3,TONG), OPTO_MASK,	PPC,		{ RA, SI } },
{ "tngi",    OPTO(3,TONG), OPTO_MASK,	POWER,		{ RA, SI } },
{ "twnei",   OPTO(3,TONE), OPTO_MASK,	PPC,		{ RA, SI } },
{ "tnei",    OPTO(3,TONE), OPTO_MASK,	POWER,		{ RA, SI } },
{ "twi",     OP(3),	OP_MASK,	PPC,		{ TO, RA, SI } },
{ "ti",      OP(3),	OP_MASK,	POWER,		{ TO, RA, SI } },

{ "mulli",   OP(7),	OP_MASK,	PPC,		{ RT, RA, SI } },
{ "muli",    OP(7),	OP_MASK,	POWER,		{ RT, RA, SI } },

{ "subfic",  OP(8),	OP_MASK,	PPC,		{ RT, RA, SI } },
{ "sfi",     OP(8),	OP_MASK,	POWER,		{ RT, RA, SI } },

{ "dozi",    OP(9),	OP_MASK,	POWER|M601,	{ RT, RA, SI } },

{ "cmplwi",  OPL(10,0),	OPL_MASK,	PPC,		{ OBF, RA, UI } },
{ "cmpldi",  OPL(10,1), OPL_MASK,	PPC|B64,	{ OBF, RA, UI } },
{ "cmpli",   OP(10),	OP_MASK,	PPC,		{ BF, L, RA, UI } },
{ "cmpli",   OP(10),	OP_MASK,	POWER,		{ BF, RA, UI } },

{ "cmpwi",   OPL(11,0),	OPL_MASK,	PPC,		{ OBF, RA, SI } },
{ "cmpdi",   OPL(11,1),	OPL_MASK,	PPC|B64,	{ OBF, RA, SI } },
{ "cmpi",    OP(11),	OP_MASK,	PPC,		{ BF, L, RA, SI } },
{ "cmpi",    OP(11),	OP_MASK,	POWER,		{ BF, RA, SI } },

{ "addic",   OP(12),	OP_MASK,	PPC,		{ RT, RA, SI } },
{ "ai",	     OP(12),	OP_MASK,	POWER,		{ RT, RA, SI } },
{ "subic",   OP(12),	OP_MASK,	PPC,		{ RT, RA, NSI } },

{ "addic.",  OP(13),	OP_MASK,	PPC,		{ RT, RA, SI } },
{ "ai.",     OP(13),	OP_MASK,	POWER,		{ RT, RA, SI } },
{ "subic.",  OP(13),	OP_MASK,	PPC,		{ RT, RA, NSI } },

{ "li",	     OP(14),	DRA_MASK,	PPC,		{ RT, SI } },
{ "lil",     OP(14),	DRA_MASK,	POWER,		{ RT, SI } },
{ "addi",    OP(14),	OP_MASK,	PPC,		{ RT, RA, SI } },
{ "cal",     OP(14),	OP_MASK,	POWER,		{ RT, D, RA } },
{ "subi",    OP(14),	OP_MASK,	PPC,		{ RT, RA, NSI } },
{ "la",	     OP(14),	OP_MASK,	PPC,		{ RT, D, RA } },

{ "lis",     OP(15),	DRA_MASK,	PPC,		{ RT, SISIGNOPT } },
{ "liu",     OP(15),	DRA_MASK,	POWER,		{ RT, SISIGNOPT } },
{ "addis",   OP(15),	OP_MASK,	PPC,		{ RT,RA,SISIGNOPT } },
{ "cau",     OP(15),	OP_MASK,	POWER,		{ RT,RA,SISIGNOPT } },
{ "subis",   OP(15),	OP_MASK,	PPC,		{ RT, RA, NSI } },

{ "bdnz-",   BBO(16,BODNZ,0,0), BBOYBI_MASK, PPC,	{ BDM } },
{ "bdnz+",   BBO(16,BODNZ,0,0), BBOYBI_MASK, PPC,	{ BDP } },
{ "bdnz",    BBO(16,BODNZ,0,0), BBOYBI_MASK, PPC,	{ BD } },
{ "bdn",     BBO(16,BODNZ,0,0), BBOYBI_MASK, POWER,	{ BD } },
{ "bdnzl-",  BBO(16,BODNZ,0,1), BBOYBI_MASK, PPC,	{ BDM } },
{ "bdnzl+",  BBO(16,BODNZ,0,1), BBOYBI_MASK, PPC,	{ BDP } },
{ "bdnzl",   BBO(16,BODNZ,0,1), BBOYBI_MASK, PPC,	{ BD } },
{ "bdnl",    BBO(16,BODNZ,0,1), BBOYBI_MASK, POWER,	{ BD } },
{ "bdnza-",  BBO(16,BODNZ,1,0), BBOYBI_MASK, PPC,	{ BDMA } },
{ "bdnza+",  BBO(16,BODNZ,1,0), BBOYBI_MASK, PPC,	{ BDPA } },
{ "bdnza",   BBO(16,BODNZ,1,0), BBOYBI_MASK, PPC,	{ BDA } },
{ "bdna",    BBO(16,BODNZ,1,0), BBOYBI_MASK, POWER,	{ BDA } },
{ "bdnzla-", BBO(16,BODNZ,1,1), BBOYBI_MASK, PPC,	{ BDMA } },
{ "bdnzla+", BBO(16,BODNZ,1,1), BBOYBI_MASK, PPC,	{ BDPA } },
{ "bdnzla",  BBO(16,BODNZ,1,1), BBOYBI_MASK, PPC,	{ BDA } },
{ "bdnla",   BBO(16,BODNZ,1,1), BBOYBI_MASK, POWER,	{ BDA } },
{ "bdz-",    BBO(16,BODZ,0,0), BBOYBI_MASK, PPC,	{ BDM } },
{ "bdz+",    BBO(16,BODZ,0,0), BBOYBI_MASK, PPC,	{ BDP } },
{ "bdz",     BBO(16,BODZ,0,0), BBOYBI_MASK, PPC|POWER,	{ BD } },
{ "bdzl-",   BBO(16,BODZ,0,1), BBOYBI_MASK, PPC,	{ BDM } },
{ "bdzl+",   BBO(16,BODZ,0,1), BBOYBI_MASK, PPC,	{ BDP } },
{ "bdzl",    BBO(16,BODZ,0,1), BBOYBI_MASK, PPC|POWER,	{ BD } },
{ "bdza-",   BBO(16,BODZ,1,0), BBOYBI_MASK, PPC,	{ BDMA } },
{ "bdza+",   BBO(16,BODZ,1,0), BBOYBI_MASK, PPC,	{ BDPA } },
{ "bdza",    BBO(16,BODZ,1,0), BBOYBI_MASK, PPC|POWER,	{ BDA } },
{ "bdzla-",  BBO(16,BODZ,1,1), BBOYBI_MASK, PPC,	{ BDMA } },
{ "bdzla+",  BBO(16,BODZ,1,1), BBOYBI_MASK, PPC,	{ BDPA } },
{ "bdzla",   BBO(16,BODZ,1,1), BBOYBI_MASK, PPC|POWER,	{ BDA } },
{ "blt-",    BBOCB(16,BOT,CBLT,0,0), BBOYCB_MASK, PPC,	{ CR, BDM } },
{ "blt+",    BBOCB(16,BOT,CBLT,0,0), BBOYCB_MASK, PPC,	{ CR, BDP } },
{ "blt",     BBOCB(16,BOT,CBLT,0,0), BBOYCB_MASK, PPC|POWER, { CR, BD } },
{ "bltl-",   BBOCB(16,BOT,CBLT,0,1), BBOYCB_MASK, PPC,	{ CR, BDM } },
{ "bltl+",   BBOCB(16,BOT,CBLT,0,1), BBOYCB_MASK, PPC,	{ CR, BDP } },
{ "bltl",    BBOCB(16,BOT,CBLT,0,1), BBOYCB_MASK, PPC|POWER, { CR, BD } },
{ "blta-",   BBOCB(16,BOT,CBLT,1,0), BBOYCB_MASK, PPC,	{ CR, BDMA } },
{ "blta+",   BBOCB(16,BOT,CBLT,1,0), BBOYCB_MASK, PPC,	{ CR, BDPA } },
{ "blta",    BBOCB(16,BOT,CBLT,1,0), BBOYCB_MASK, PPC|POWER, { CR, BDA } },
{ "bltla-",  BBOCB(16,BOT,CBLT,1,1), BBOYCB_MASK, PPC,	{ CR, BDMA } },
{ "bltla+",  BBOCB(16,BOT,CBLT,1,1), BBOYCB_MASK, PPC,	{ CR, BDPA } },
{ "bltla",   BBOCB(16,BOT,CBLT,1,1), BBOYCB_MASK, PPC|POWER, { CR, BDA } },
{ "bgt-",    BBOCB(16,BOT,CBGT,0,0), BBOYCB_MASK, PPC,	{ CR, BDM } },
{ "bgt+",    BBOCB(16,BOT,CBGT,0,0), BBOYCB_MASK, PPC,	{ CR, BDP } },
{ "bgt",     BBOCB(16,BOT,CBGT,0,0), BBOYCB_MASK, PPC|POWER, { CR, BD } },
{ "bgtl-",   BBOCB(16,BOT,CBGT,0,1), BBOYCB_MASK, PPC,	{ CR, BDM } },
{ "bgtl+",   BBOCB(16,BOT,CBGT,0,1), BBOYCB_MASK, PPC,	{ CR, BDP } },
{ "bgtl",    BBOCB(16,BOT,CBGT,0,1), BBOYCB_MASK, PPC|POWER, { CR, BD } },
{ "bgta-",   BBOCB(16,BOT,CBGT,1,0), BBOYCB_MASK, PPC,	{ CR, BDMA } },
{ "bgta+",   BBOCB(16,BOT,CBGT,1,0), BBOYCB_MASK, PPC,	{ CR, BDPA } },
{ "bgta",    BBOCB(16,BOT,CBGT,1,0), BBOYCB_MASK, PPC|POWER, { CR, BDA } },
{ "bgtla-",  BBOCB(16,BOT,CBGT,1,1), BBOYCB_MASK, PPC,	{ CR, BDMA } },
{ "bgtla+",  BBOCB(16,BOT,CBGT,1,1), BBOYCB_MASK, PPC,	{ CR, BDPA } },
{ "bgtla",   BBOCB(16,BOT,CBGT,1,1), BBOYCB_MASK, PPC|POWER, { CR, BDA } },
{ "beq-",    BBOCB(16,BOT,CBEQ,0,0), BBOYCB_MASK, PPC,	{ CR, BDM } },
{ "beq+",    BBOCB(16,BOT,CBEQ,0,0), BBOYCB_MASK, PPC,	{ CR, BDP } },
{ "beq",     BBOCB(16,BOT,CBEQ,0,0), BBOYCB_MASK, PPC|POWER, { CR, BD } },
{ "beql-",   BBOCB(16,BOT,CBEQ,0,1), BBOYCB_MASK, PPC,	{ CR, BDM } },
{ "beql+",   BBOCB(16,BOT,CBEQ,0,1), BBOYCB_MASK, PPC,	{ CR, BDP } },
{ "beql",    BBOCB(16,BOT,CBEQ,0,1), BBOYCB_MASK, PPC|POWER, { CR, BD } },
{ "beqa-",   BBOCB(16,BOT,CBEQ,1,0), BBOYCB_MASK, PPC,	{ CR, BDMA } },
{ "beqa+",   BBOCB(16,BOT,CBEQ,1,0), BBOYCB_MASK, PPC,	{ CR, BDPA } },
{ "beqa",    BBOCB(16,BOT,CBEQ,1,0), BBOYCB_MASK, PPC|POWER, { CR, BDA } },
{ "beqla-",  BBOCB(16,BOT,CBEQ,1,1), BBOYCB_MASK, PPC,	{ CR, BDMA } },
{ "beqla+",  BBOCB(16,BOT,CBEQ,1,1), BBOYCB_MASK, PPC,	{ CR, BDPA } },
{ "beqla",   BBOCB(16,BOT,CBEQ,1,1), BBOYCB_MASK, PPC|POWER, { CR, BDA } },
{ "bso-",    BBOCB(16,BOT,CBSO,0,0), BBOYCB_MASK, PPC,	{ CR, BDM } },
{ "bso+",    BBOCB(16,BOT,CBSO,0,0), BBOYCB_MASK, PPC,	{ CR, BDP } },
{ "bso",     BBOCB(16,BOT,CBSO,0,0), BBOYCB_MASK, PPC|POWER, { CR, BD } },
{ "bsol-",   BBOCB(16,BOT,CBSO,0,1), BBOYCB_MASK, PPC,	{ CR, BDM } },
{ "bsol+",   BBOCB(16,BOT,CBSO,0,1), BBOYCB_MASK, PPC,	{ CR, BDP } },
{ "bsol",    BBOCB(16,BOT,CBSO,0,1), BBOYCB_MASK, PPC|POWER, { CR, BD } },
{ "bsoa-",   BBOCB(16,BOT,CBSO,1,0), BBOYCB_MASK, PPC,	{ CR, BDMA } },
{ "bsoa+",   BBOCB(16,BOT,CBSO,1,0), BBOYCB_MASK, PPC,	{ CR, BDPA } },
{ "bsoa",    BBOCB(16,BOT,CBSO,1,0), BBOYCB_MASK, PPC|POWER, { CR, BDA } },
{ "bsola-",  BBOCB(16,BOT,CBSO,1,1), BBOYCB_MASK, PPC,	{ CR, BDMA } },
{ "bsola+",  BBOCB(16,BOT,CBSO,1,1), BBOYCB_MASK, PPC,	{ CR, BDPA } },
{ "bsola",   BBOCB(16,BOT,CBSO,1,1), BBOYCB_MASK, PPC|POWER, { CR, BDA } },
{ "bun-",    BBOCB(16,BOT,CBSO,0,0), BBOYCB_MASK, PPC,	{ CR, BDM } },
{ "bun+",    BBOCB(16,BOT,CBSO,0,0), BBOYCB_MASK, PPC,	{ CR, BDP } },
{ "bun",     BBOCB(16,BOT,CBSO,0,0), BBOYCB_MASK, PPC,	{ CR, BD } },
{ "bunl-",   BBOCB(16,BOT,CBSO,0,1), BBOYCB_MASK, PPC,	{ CR, BDM } },
{ "bunl+",   BBOCB(16,BOT,CBSO,0,1), BBOYCB_MASK, PPC,	{ CR, BDP } },
{ "bunl",    BBOCB(16,BOT,CBSO,0,1), BBOYCB_MASK, PPC,	{ CR, BD } },
{ "buna-",   BBOCB(16,BOT,CBSO,1,0), BBOYCB_MASK, PPC,	{ CR, BDMA } },
{ "buna+",   BBOCB(16,BOT,CBSO,1,0), BBOYCB_MASK, PPC,	{ CR, BDPA } },
{ "buna",    BBOCB(16,BOT,CBSO,1,0), BBOYCB_MASK, PPC,	{ CR, BDA } },
{ "bunla-",  BBOCB(16,BOT,CBSO,1,1), BBOYCB_MASK, PPC,	{ CR, BDMA } },
{ "bunla+",  BBOCB(16,BOT,CBSO,1,1), BBOYCB_MASK, PPC,	{ CR, BDPA } },
{ "bunla",   BBOCB(16,BOT,CBSO,1,1), BBOYCB_MASK, PPC,	{ CR, BDA } },
{ "bge-",    BBOCB(16,BOF,CBLT,0,0), BBOYCB_MASK, PPC,	{ CR, BDM } },
{ "bge+",    BBOCB(16,BOF,CBLT,0,0), BBOYCB_MASK, PPC,	{ CR, BDP } },
{ "bge",     BBOCB(16,BOF,CBLT,0,0), BBOYCB_MASK, PPC|POWER, { CR, BD } },
{ "bgel-",   BBOCB(16,BOF,CBLT,0,1), BBOYCB_MASK, PPC,	{ CR, BDM } },
{ "bgel+",   BBOCB(16,BOF,CBLT,0,1), BBOYCB_MASK, PPC,	{ CR, BDP } },
{ "bgel",    BBOCB(16,BOF,CBLT,0,1), BBOYCB_MASK, PPC|POWER, { CR, BD } },
{ "bgea-",   BBOCB(16,BOF,CBLT,1,0), BBOYCB_MASK, PPC,	{ CR, BDMA } },
{ "bgea+",   BBOCB(16,BOF,CBLT,1,0), BBOYCB_MASK, PPC,	{ CR, BDPA } },
{ "bgea",    BBOCB(16,BOF,CBLT,1,0), BBOYCB_MASK, PPC|POWER, { CR, BDA } },
{ "bgela-",  BBOCB(16,BOF,CBLT,1,1), BBOYCB_MASK, PPC,	{ CR, BDMA } },
{ "bgela+",  BBOCB(16,BOF,CBLT,1,1), BBOYCB_MASK, PPC,	{ CR, BDPA } },
{ "bgela",   BBOCB(16,BOF,CBLT,1,1), BBOYCB_MASK, PPC|POWER, { CR, BDA } },
{ "bnl-",    BBOCB(16,BOF,CBLT,0,0), BBOYCB_MASK, PPC,	{ CR, BDM } },
{ "bnl+",    BBOCB(16,BOF,CBLT,0,0), BBOYCB_MASK, PPC,	{ CR, BDP } },
{ "bnl",     BBOCB(16,BOF,CBLT,0,0), BBOYCB_MASK, PPC|POWER, { CR, BD } },
{ "bnll-",   BBOCB(16,BOF,CBLT,0,1), BBOYCB_MASK, PPC,	{ CR, BDM } },
{ "bnll+",   BBOCB(16,BOF,CBLT,0,1), BBOYCB_MASK, PPC,	{ CR, BDP } },
{ "bnll",    BBOCB(16,BOF,CBLT,0,1), BBOYCB_MASK, PPC|POWER, { CR, BD } },
{ "bnla-",   BBOCB(16,BOF,CBLT,1,0), BBOYCB_MASK, PPC,	{ CR, BDMA } },
{ "bnla+",   BBOCB(16,BOF,CBLT,1,0), BBOYCB_MASK, PPC,	{ CR, BDPA } },
{ "bnla",    BBOCB(16,BOF,CBLT,1,0), BBOYCB_MASK, PPC|POWER, { CR, BDA } },
{ "bnlla-",  BBOCB(16,BOF,CBLT,1,1), BBOYCB_MASK, PPC,	{ CR, BDMA } },
{ "bnlla+",  BBOCB(16,BOF,CBLT,1,1), BBOYCB_MASK, PPC,	{ CR, BDPA } },
{ "bnlla",   BBOCB(16,BOF,CBLT,1,1), BBOYCB_MASK, PPC|POWER, { CR, BDA } },
{ "ble-",    BBOCB(16,BOF,CBGT,0,0), BBOYCB_MASK, PPC,	{ CR, BDM } },
{ "ble+",    BBOCB(16,BOF,CBGT,0,0), BBOYCB_MASK, PPC,	{ CR, BDP } },
{ "ble",     BBOCB(16,BOF,CBGT,0,0), BBOYCB_MASK, PPC|POWER, { CR, BD } },
{ "blel-",   BBOCB(16,BOF,CBGT,0,1), BBOYCB_MASK, PPC,	{ CR, BDM } },
{ "blel+",   BBOCB(16,BOF,CBGT,0,1), BBOYCB_MASK, PPC,	{ CR, BDP } },
{ "blel",    BBOCB(16,BOF,CBGT,0,1), BBOYCB_MASK, PPC|POWER, { CR, BD } },
{ "blea-",   BBOCB(16,BOF,CBGT,1,0), BBOYCB_MASK, PPC,	{ CR, BDMA } },
{ "blea+",   BBOCB(16,BOF,CBGT,1,0), BBOYCB_MASK, PPC,	{ CR, BDPA } },
{ "blea",    BBOCB(16,BOF,CBGT,1,0), BBOYCB_MASK, PPC|POWER, { CR, BDA } },
{ "blela-",  BBOCB(16,BOF,CBGT,1,1), BBOYCB_MASK, PPC,	{ CR, BDMA } },
{ "blela+",  BBOCB(16,BOF,CBGT,1,1), BBOYCB_MASK, PPC,	{ CR, BDPA } },
{ "blela",   BBOCB(16,BOF,CBGT,1,1), BBOYCB_MASK, PPC|POWER, { CR, BDA } },
{ "bng-",    BBOCB(16,BOF,CBGT,0,0), BBOYCB_MASK, PPC,	{ CR, BDM } },
{ "bng+",    BBOCB(16,BOF,CBGT,0,0), BBOYCB_MASK, PPC,	{ CR, BDP } },
{ "bng",     BBOCB(16,BOF,CBGT,0,0), BBOYCB_MASK, PPC|POWER, { CR, BD } },
{ "bngl-",   BBOCB(16,BOF,CBGT,0,1), BBOYCB_MASK, PPC,	{ CR, BDM } },
{ "bngl+",   BBOCB(16,BOF,CBGT,0,1), BBOYCB_MASK, PPC,	{ CR, BDP } },
{ "bngl",    BBOCB(16,BOF,CBGT,0,1), BBOYCB_MASK, PPC|POWER, { CR, BD } },
{ "bnga-",   BBOCB(16,BOF,CBGT,1,0), BBOYCB_MASK, PPC,	{ CR, BDMA } },
{ "bnga+",   BBOCB(16,BOF,CBGT,1,0), BBOYCB_MASK, PPC,	{ CR, BDPA } },
{ "bnga",    BBOCB(16,BOF,CBGT,1,0), BBOYCB_MASK, PPC|POWER, { CR, BDA } },
{ "bngla-",  BBOCB(16,BOF,CBGT,1,1), BBOYCB_MASK, PPC,	{ CR, BDMA } },
{ "bngla+",  BBOCB(16,BOF,CBGT,1,1), BBOYCB_MASK, PPC,	{ CR, BDPA } },
{ "bngla",   BBOCB(16,BOF,CBGT,1,1), BBOYCB_MASK, PPC|POWER, { CR, BDA } },
{ "bne-",    BBOCB(16,BOF,CBEQ,0,0), BBOYCB_MASK, PPC,	{ CR, BDM } },
{ "bne+",    BBOCB(16,BOF,CBEQ,0,0), BBOYCB_MASK, PPC,	{ CR, BDP } },
{ "bne",     BBOCB(16,BOF,CBEQ,0,0), BBOYCB_MASK, PPC|POWER, { CR, BD } },
{ "bnel-",   BBOCB(16,BOF,CBEQ,0,1), BBOYCB_MASK, PPC,	{ CR, BDM } },
{ "bnel+",   BBOCB(16,BOF,CBEQ,0,1), BBOYCB_MASK, PPC,	{ CR, BDP } },
{ "bnel",    BBOCB(16,BOF,CBEQ,0,1), BBOYCB_MASK, PPC|POWER, { CR, BD } },
{ "bnea-",   BBOCB(16,BOF,CBEQ,1,0), BBOYCB_MASK, PPC,	{ CR, BDMA } },
{ "bnea+",   BBOCB(16,BOF,CBEQ,1,0), BBOYCB_MASK, PPC,	{ CR, BDPA } },
{ "bnea",    BBOCB(16,BOF,CBEQ,1,0), BBOYCB_MASK, PPC|POWER, { CR, BDA } },
{ "bnela-",  BBOCB(16,BOF,CBEQ,1,1), BBOYCB_MASK, PPC,	{ CR, BDMA } },
{ "bnela+",  BBOCB(16,BOF,CBEQ,1,1), BBOYCB_MASK, PPC,	{ CR, BDPA } },
{ "bnela",   BBOCB(16,BOF,CBEQ,1,1), BBOYCB_MASK, PPC|POWER, { CR, BDA } },
{ "bns-",    BBOCB(16,BOF,CBSO,0,0), BBOYCB_MASK, PPC,	{ CR, BDM } },
{ "bns+",    BBOCB(16,BOF,CBSO,0,0), BBOYCB_MASK, PPC,	{ CR, BDP } },
{ "bns",     BBOCB(16,BOF,CBSO,0,0), BBOYCB_MASK, PPC|POWER, { CR, BD } },
{ "bnsl-",   BBOCB(16,BOF,CBSO,0,1), BBOYCB_MASK, PPC,	{ CR, BDM } },
{ "bnsl+",   BBOCB(16,BOF,CBSO,0,1), BBOYCB_MASK, PPC,	{ CR, BDP } },
{ "bnsl",    BBOCB(16,BOF,CBSO,0,1), BBOYCB_MASK, PPC|POWER, { CR, BD } },
{ "bnsa-",   BBOCB(16,BOF,CBSO,1,0), BBOYCB_MASK, PPC,	{ CR, BDMA } },
{ "bnsa+",   BBOCB(16,BOF,CBSO,1,0), BBOYCB_MASK, PPC,	{ CR, BDPA } },
{ "bnsa",    BBOCB(16,BOF,CBSO,1,0), BBOYCB_MASK, PPC|POWER, { CR, BDA } },
{ "bnsla-",  BBOCB(16,BOF,CBSO,1,1), BBOYCB_MASK, PPC,	{ CR, BDMA } },
{ "bnsla+",  BBOCB(16,BOF,CBSO,1,1), BBOYCB_MASK, PPC,	{ CR, BDPA } },
{ "bnsla",   BBOCB(16,BOF,CBSO,1,1), BBOYCB_MASK, PPC|POWER, { CR, BDA } },
{ "bnu-",    BBOCB(16,BOF,CBSO,0,0), BBOYCB_MASK, PPC,	{ CR, BDM } },
{ "bnu+",    BBOCB(16,BOF,CBSO,0,0), BBOYCB_MASK, PPC,	{ CR, BDP } },
{ "bnu",     BBOCB(16,BOF,CBSO,0,0), BBOYCB_MASK, PPC,	{ CR, BD } },
{ "bnul-",   BBOCB(16,BOF,CBSO,0,1), BBOYCB_MASK, PPC,	{ CR, BDM } },
{ "bnul+",   BBOCB(16,BOF,CBSO,0,1), BBOYCB_MASK, PPC,	{ CR, BDP } },
{ "bnul",    BBOCB(16,BOF,CBSO,0,1), BBOYCB_MASK, PPC,	{ CR, BD } },
{ "bnua-",   BBOCB(16,BOF,CBSO,1,0), BBOYCB_MASK, PPC,	{ CR, BDMA } },
{ "bnua+",   BBOCB(16,BOF,CBSO,1,0), BBOYCB_MASK, PPC,	{ CR, BDPA } },
{ "bnua",    BBOCB(16,BOF,CBSO,1,0), BBOYCB_MASK, PPC,	{ CR, BDA } },
{ "bnula-",  BBOCB(16,BOF,CBSO,1,1), BBOYCB_MASK, PPC,	{ CR, BDMA } },
{ "bnula+",  BBOCB(16,BOF,CBSO,1,1), BBOYCB_MASK, PPC,	{ CR, BDPA } },
{ "bnula",   BBOCB(16,BOF,CBSO,1,1), BBOYCB_MASK, PPC,	{ CR, BDA } },
{ "bdnzt-",  BBO(16,BODNZT,0,0), BBOY_MASK, PPC,	{ BI, BDM } },
{ "bdnzt+",  BBO(16,BODNZT,0,0), BBOY_MASK, PPC,	{ BI, BDP } },
{ "bdnzt",   BBO(16,BODNZT,0,0), BBOY_MASK, PPC,	{ BI, BD } },
{ "bdnztl-", BBO(16,BODNZT,0,1), BBOY_MASK, PPC,	{ BI, BDM } },
{ "bdnztl+", BBO(16,BODNZT,0,1), BBOY_MASK, PPC,	{ BI, BDP } },
{ "bdnztl",  BBO(16,BODNZT,0,1), BBOY_MASK, PPC,	{ BI, BD } },
{ "bdnzta-", BBO(16,BODNZT,1,0), BBOY_MASK, PPC,	{ BI, BDMA } },
{ "bdnzta+", BBO(16,BODNZT,1,0), BBOY_MASK, PPC,	{ BI, BDPA } },
{ "bdnzta",  BBO(16,BODNZT,1,0), BBOY_MASK, PPC,	{ BI, BDA } },
{ "bdnztla-",BBO(16,BODNZT,1,1), BBOY_MASK, PPC,	{ BI, BDMA } },
{ "bdnztla+",BBO(16,BODNZT,1,1), BBOY_MASK, PPC,	{ BI, BDPA } },
{ "bdnztla", BBO(16,BODNZT,1,1), BBOY_MASK, PPC,	{ BI, BDA } },
{ "bdnzf-",  BBO(16,BODNZF,0,0), BBOY_MASK, PPC,	{ BI, BDM } },
{ "bdnzf+",  BBO(16,BODNZF,0,0), BBOY_MASK, PPC,	{ BI, BDP } },
{ "bdnzf",   BBO(16,BODNZF,0,0), BBOY_MASK, PPC,	{ BI, BD } },
{ "bdnzfl-", BBO(16,BODNZF,0,1), BBOY_MASK, PPC,	{ BI, BDM } },
{ "bdnzfl+", BBO(16,BODNZF,0,1), BBOY_MASK, PPC,	{ BI, BDP } },
{ "bdnzfl",  BBO(16,BODNZF,0,1), BBOY_MASK, PPC,	{ BI, BD } },
{ "bdnzfa-", BBO(16,BODNZF,1,0), BBOY_MASK, PPC,	{ BI, BDMA } },
{ "bdnzfa+", BBO(16,BODNZF,1,0), BBOY_MASK, PPC,	{ BI, BDPA } },
{ "bdnzfa",  BBO(16,BODNZF,1,0), BBOY_MASK, PPC,	{ BI, BDA } },
{ "bdnzfla-",BBO(16,BODNZF,1,1), BBOY_MASK, PPC,	{ BI, BDMA } },
{ "bdnzfla+",BBO(16,BODNZF,1,1), BBOY_MASK, PPC,	{ BI, BDPA } },
{ "bdnzfla", BBO(16,BODNZF,1,1), BBOY_MASK, PPC,	{ BI, BDA } },
{ "bt-",     BBO(16,BOT,0,0), BBOY_MASK, PPC,		{ BI, BDM } },
{ "bt+",     BBO(16,BOT,0,0), BBOY_MASK, PPC,		{ BI, BDP } },
{ "bt",	     BBO(16,BOT,0,0), BBOY_MASK, PPC,		{ BI, BD } },
{ "bbt",     BBO(16,BOT,0,0), BBOY_MASK, POWER,		{ BI, BD } },
{ "btl-",    BBO(16,BOT,0,1), BBOY_MASK, PPC,		{ BI, BDM } },
{ "btl+",    BBO(16,BOT,0,1), BBOY_MASK, PPC,		{ BI, BDP } },
{ "btl",     BBO(16,BOT,0,1), BBOY_MASK, PPC,		{ BI, BD } },
{ "bbtl",    BBO(16,BOT,0,1), BBOY_MASK, POWER,		{ BI, BD } },
{ "bta-",    BBO(16,BOT,1,0), BBOY_MASK, PPC,		{ BI, BDMA } },
{ "bta+",    BBO(16,BOT,1,0), BBOY_MASK, PPC,		{ BI, BDPA } },
{ "bta",     BBO(16,BOT,1,0), BBOY_MASK, PPC,		{ BI, BDA } },
{ "bbta",    BBO(16,BOT,1,0), BBOY_MASK, POWER,		{ BI, BDA } },
{ "btla-",   BBO(16,BOT,1,1), BBOY_MASK, PPC,		{ BI, BDMA } },
{ "btla+",   BBO(16,BOT,1,1), BBOY_MASK, PPC,		{ BI, BDPA } },
{ "btla",    BBO(16,BOT,1,1), BBOY_MASK, PPC,		{ BI, BDA } },
{ "bbtla",   BBO(16,BOT,1,1), BBOY_MASK, POWER,		{ BI, BDA } },
{ "bf-",     BBO(16,BOF,0,0), BBOY_MASK, PPC,		{ BI, BDM } },
{ "bf+",     BBO(16,BOF,0,0), BBOY_MASK, PPC,		{ BI, BDP } },
{ "bf",	     BBO(16,BOF,0,0), BBOY_MASK, PPC,		{ BI, BD } },
{ "bbf",     BBO(16,BOF,0,0), BBOY_MASK, POWER,		{ BI, BD } },
{ "bfl-",    BBO(16,BOF,0,1), BBOY_MASK, PPC,		{ BI, BDM } },
{ "bfl+",    BBO(16,BOF,0,1), BBOY_MASK, PPC,		{ BI, BDP } },
{ "bfl",     BBO(16,BOF,0,1), BBOY_MASK, PPC,		{ BI, BD } },
{ "bbfl",    BBO(16,BOF,0,1), BBOY_MASK, POWER,		{ BI, BD } },
{ "bfa-",    BBO(16,BOF,1,0), BBOY_MASK, PPC,		{ BI, BDMA } },
{ "bfa+",    BBO(16,BOF,1,0), BBOY_MASK, PPC,		{ BI, BDPA } },
{ "bfa",     BBO(16,BOF,1,0), BBOY_MASK, PPC,		{ BI, BDA } },
{ "bbfa",    BBO(16,BOF,1,0), BBOY_MASK, POWER,		{ BI, BDA } },
{ "bfla-",   BBO(16,BOF,1,1), BBOY_MASK, PPC,		{ BI, BDMA } },
{ "bfla+",   BBO(16,BOF,1,1), BBOY_MASK, PPC,		{ BI, BDPA } },
{ "bfla",    BBO(16,BOF,1,1), BBOY_MASK, PPC,		{ BI, BDA } },
{ "bbfla",   BBO(16,BOF,1,1), BBOY_MASK, POWER,		{ BI, BDA } },
{ "bdzt-",   BBO(16,BODZT,0,0), BBOY_MASK, PPC,		{ BI, BDM } },
{ "bdzt+",   BBO(16,BODZT,0,0), BBOY_MASK, PPC,		{ BI, BDP } },
{ "bdzt",    BBO(16,BODZT,0,0), BBOY_MASK, PPC,		{ BI, BD } },
{ "bdztl-",  BBO(16,BODZT,0,1), BBOY_MASK, PPC,		{ BI, BDM } },
{ "bdztl+",  BBO(16,BODZT,0,1), BBOY_MASK, PPC,		{ BI, BDP } },
{ "bdztl",   BBO(16,BODZT,0,1), BBOY_MASK, PPC,		{ BI, BD } },
{ "bdzta-",  BBO(16,BODZT,1,0), BBOY_MASK, PPC,		{ BI, BDMA } },
{ "bdzta+",  BBO(16,BODZT,1,0), BBOY_MASK, PPC,		{ BI, BDPA } },
{ "bdzta",   BBO(16,BODZT,1,0), BBOY_MASK, PPC,		{ BI, BDA } },
{ "bdztla-", BBO(16,BODZT,1,1), BBOY_MASK, PPC,		{ BI, BDMA } },
{ "bdztla+", BBO(16,BODZT,1,1), BBOY_MASK, PPC,		{ BI, BDPA } },
{ "bdztla",  BBO(16,BODZT,1,1), BBOY_MASK, PPC,		{ BI, BDA } },
{ "bdzf-",   BBO(16,BODZF,0,0), BBOY_MASK, PPC,		{ BI, BDM } },
{ "bdzf+",   BBO(16,BODZF,0,0), BBOY_MASK, PPC,		{ BI, BDP } },
{ "bdzf",    BBO(16,BODZF,0,0), BBOY_MASK, PPC,		{ BI, BD } },
{ "bdzfl-",  BBO(16,BODZF,0,1), BBOY_MASK, PPC,		{ BI, BDM } },
{ "bdzfl+",  BBO(16,BODZF,0,1), BBOY_MASK, PPC,		{ BI, BDP } },
{ "bdzfl",   BBO(16,BODZF,0,1), BBOY_MASK, PPC,		{ BI, BD } },
{ "bdzfa-",  BBO(16,BODZF,1,0), BBOY_MASK, PPC,		{ BI, BDMA } },
{ "bdzfa+",  BBO(16,BODZF,1,0), BBOY_MASK, PPC,		{ BI, BDPA } },
{ "bdzfa",   BBO(16,BODZF,1,0), BBOY_MASK, PPC,		{ BI, BDA } },
{ "bdzfla-", BBO(16,BODZF,1,1), BBOY_MASK, PPC,		{ BI, BDMA } },
{ "bdzfla+", BBO(16,BODZF,1,1), BBOY_MASK, PPC,		{ BI, BDPA } },
{ "bdzfla",  BBO(16,BODZF,1,1), BBOY_MASK, PPC,		{ BI, BDA } },
{ "bc-",     B(16,0,0),	B_MASK,		PPC,		{ BOE, BI, BDM } },
{ "bc+",     B(16,0,0),	B_MASK,		PPC,		{ BOE, BI, BDP } },
{ "bc",	     B(16,0,0),	B_MASK,		PPC|POWER,	{ BO, BI, BD } },
{ "bcl-",    B(16,0,1),	B_MASK,		PPC,		{ BOE, BI, BDM } },
{ "bcl+",    B(16,0,1),	B_MASK,		PPC,		{ BOE, BI, BDP } },
{ "bcl",     B(16,0,1),	B_MASK,		PPC|POWER,	{ BO, BI, BD } },
{ "bca-",    B(16,1,0),	B_MASK,		PPC,		{ BOE, BI, BDMA } },
{ "bca+",    B(16,1,0),	B_MASK,		PPC,		{ BOE, BI, BDPA } },
{ "bca",     B(16,1,0),	B_MASK,		PPC|POWER,	{ BO, BI, BDA } },
{ "bcla-",   B(16,1,1),	B_MASK,		PPC,		{ BOE, BI, BDMA } },
{ "bcla+",   B(16,1,1),	B_MASK,		PPC,		{ BOE, BI, BDPA } },
{ "bcla",    B(16,1,1),	B_MASK,		PPC|POWER,	{ BO, BI, BDA } },

{ "sc",      SC(17,1,0), 0xffffffff,	PPC,		{ 0 } },
{ "svc",     SC(17,0,0), SC_MASK,	POWER,		{ LEV, FL1, FL2 } },
{ "svcl",    SC(17,0,1), SC_MASK,	POWER,		{ LEV, FL1, FL2 } },
{ "svca",    SC(17,1,0), SC_MASK,	POWER,		{ SV } },
{ "svcla",   SC(17,1,1), SC_MASK,	POWER,		{ SV } },

{ "b",	     B(18,0,0),	B_MASK,		PPC|POWER,	{ LI } },
{ "bl",      B(18,0,1),	B_MASK,		PPC|POWER,	{ LI } },
{ "ba",      B(18,1,0),	B_MASK,		PPC|POWER,	{ LIA } },
{ "bla",     B(18,1,1),	B_MASK,		PPC|POWER,	{ LIA } },

{ "mcrf",    XL(19,0),	XLBB_MASK|(3<<21)|(3<<16), PPC|POWER, { BF, BFA } },

{ "blr",     XLO(19,BOU,16,0), XLBOBIBB_MASK, PPC,	{ 0 } },
{ "br",      XLO(19,BOU,16,0), XLBOBIBB_MASK, POWER,	{ 0 } },
{ "blrl",    XLO(19,BOU,16,1), XLBOBIBB_MASK, PPC,	{ 0 } },
{ "brl",     XLO(19,BOU,16,1), XLBOBIBB_MASK, POWER,	{ 0 } },
{ "bdnzlr",  XLO(19,BODNZ,16,0), XLBOBIBB_MASK, PPC,	{ 0 } },
{ "bdnzlr-", XLO(19,BODNZ,16,0), XLBOBIBB_MASK, PPC,	{ 0 } },
{ "bdnzlr+", XLO(19,BODNZP,16,0), XLBOBIBB_MASK, PPC,	{ 0 } },
{ "bdnzlrl", XLO(19,BODNZ,16,1), XLBOBIBB_MASK, PPC,	{ 0 } },
{ "bdnzlrl-",XLO(19,BODNZ,16,1), XLBOBIBB_MASK, PPC,	{ 0 } },
{ "bdnzlrl+",XLO(19,BODNZP,16,1), XLBOBIBB_MASK, PPC,	{ 0 } },
{ "bdzlr",   XLO(19,BODZ,16,0), XLBOBIBB_MASK, PPC,	{ 0 } },
{ "bdzlr-",  XLO(19,BODZ,16,0), XLBOBIBB_MASK, PPC,	{ 0 } },
{ "bdzlr+",  XLO(19,BODZP,16,0), XLBOBIBB_MASK, PPC,	{ 0 } },
{ "bdzlrl",  XLO(19,BODZ,16,1), XLBOBIBB_MASK, PPC,	{ 0 } },
{ "bdzlrl-", XLO(19,BODZ,16,1), XLBOBIBB_MASK, PPC,	{ 0 } },
{ "bdzlrl+", XLO(19,BODZP,16,1), XLBOBIBB_MASK, PPC,	{ 0 } },
{ "bltlr",   XLOCB(19,BOT,CBLT,16,0), XLBOCBBB_MASK, PPC, { CR } },
{ "bltlr-",  XLOCB(19,BOT,CBLT,16,0), XLBOCBBB_MASK, PPC, { CR } },
{ "bltlr+",  XLOCB(19,BOTP,CBLT,16,0), XLBOCBBB_MASK, PPC, { CR } },
{ "bltr",    XLOCB(19,BOT,CBLT,16,0), XLBOCBBB_MASK, POWER, { CR } },
{ "bltlrl",  XLOCB(19,BOT,CBLT,16,1), XLBOCBBB_MASK, PPC, { CR } },
{ "bltlrl-", XLOCB(19,BOT,CBLT,16,1), XLBOCBBB_MASK, PPC, { CR } },
{ "bltlrl+", XLOCB(19,BOTP,CBLT,16,1), XLBOCBBB_MASK, PPC, { CR } },
{ "bltrl",   XLOCB(19,BOT,CBLT,16,1), XLBOCBBB_MASK, POWER, { CR } },
{ "bgtlr",   XLOCB(19,BOT,CBGT,16,0), XLBOCBBB_MASK, PPC, { CR } },
{ "bgtlr-",  XLOCB(19,BOT,CBGT,16,0), XLBOCBBB_MASK, PPC, { CR } },
{ "bgtlr+",  XLOCB(19,BOTP,CBGT,16,0), XLBOCBBB_MASK, PPC, { CR } },
{ "bgtr",    XLOCB(19,BOT,CBGT,16,0), XLBOCBBB_MASK, POWER, { CR } },
{ "bgtlrl",  XLOCB(19,BOT,CBGT,16,1), XLBOCBBB_MASK, PPC, { CR } },
{ "bgtlrl-", XLOCB(19,BOT,CBGT,16,1), XLBOCBBB_MASK, PPC, { CR } },
{ "bgtlrl+", XLOCB(19,BOTP,CBGT,16,1), XLBOCBBB_MASK, PPC, { CR } },
{ "bgtrl",   XLOCB(19,BOT,CBGT,16,1), XLBOCBBB_MASK, POWER, { CR } },
{ "beqlr",   XLOCB(19,BOT,CBEQ,16,0), XLBOCBBB_MASK, PPC, { CR } },
{ "beqlr-",  XLOCB(19,BOT,CBEQ,16,0), XLBOCBBB_MASK, PPC, { CR } },
{ "beqlr+",  XLOCB(19,BOTP,CBEQ,16,0), XLBOCBBB_MASK, PPC, { CR } },
{ "beqr",    XLOCB(19,BOT,CBEQ,16,0), XLBOCBBB_MASK, POWER, { CR } },
{ "beqlrl",  XLOCB(19,BOT,CBEQ,16,1), XLBOCBBB_MASK, PPC, { CR } },
{ "beqlrl-", XLOCB(19,BOT,CBEQ,16,1), XLBOCBBB_MASK, PPC, { CR } },
{ "beqlrl+", XLOCB(19,BOTP,CBEQ,16,1), XLBOCBBB_MASK, PPC, { CR } },
{ "beqrl",   XLOCB(19,BOT,CBEQ,16,1), XLBOCBBB_MASK, POWER, { CR } },
{ "bsolr",   XLOCB(19,BOT,CBSO,16,0), XLBOCBBB_MASK, PPC, { CR } },
{ "bsolr-",  XLOCB(19,BOT,CBSO,16,0), XLBOCBBB_MASK, PPC, { CR } },
{ "bsolr+",  XLOCB(19,BOTP,CBSO,16,0), XLBOCBBB_MASK, PPC, { CR } },
{ "bsor",    XLOCB(19,BOT,CBSO,16,0), XLBOCBBB_MASK, POWER, { CR } },
{ "bsolrl",  XLOCB(19,BOT,CBSO,16,1), XLBOCBBB_MASK, PPC, { CR } },
{ "bsolrl-", XLOCB(19,BOT,CBSO,16,1), XLBOCBBB_MASK, PPC, { CR } },
{ "bsolrl+", XLOCB(19,BOTP,CBSO,16,1), XLBOCBBB_MASK, PPC, { CR } },
{ "bsorl",   XLOCB(19,BOT,CBSO,16,1), XLBOCBBB_MASK, POWER, { CR } },
{ "bunlr",   XLOCB(19,BOT,CBSO,16,0), XLBOCBBB_MASK, PPC, { CR } },
{ "bunlr-",  XLOCB(19,BOT,CBSO,16,0), XLBOCBBB_MASK, PPC, { CR } },
{ "bunlr+",  XLOCB(19,BOTP,CBSO,16,0), XLBOCBBB_MASK, PPC, { CR } },
{ "bunlrl",  XLOCB(19,BOT,CBSO,16,1), XLBOCBBB_MASK, PPC, { CR } },
{ "bunlrl-", XLOCB(19,BOT,CBSO,16,1), XLBOCBBB_MASK, PPC, { CR } },
{ "bunlrl+", XLOCB(19,BOTP,CBSO,16,1), XLBOCBBB_MASK, PPC, { CR } },
{ "bgelr",   XLOCB(19,BOF,CBLT,16,0), XLBOCBBB_MASK, PPC, { CR } },
{ "bgelr-",  XLOCB(19,BOF,CBLT,16,0), XLBOCBBB_MASK, PPC, { CR } },
{ "bgelr+",  XLOCB(19,BOFP,CBLT,16,0), XLBOCBBB_MASK, PPC, { CR } },
{ "bger",    XLOCB(19,BOF,CBLT,16,0), XLBOCBBB_MASK, POWER, { CR } },
{ "bgelrl",  XLOCB(19,BOF,CBLT,16,1), XLBOCBBB_MASK, PPC, { CR } },
{ "bgelrl-", XLOCB(19,BOF,CBLT,16,1), XLBOCBBB_MASK, PPC, { CR } },
{ "bgelrl+", XLOCB(19,BOFP,CBLT,16,1), XLBOCBBB_MASK, PPC, { CR } },
{ "bgerl",   XLOCB(19,BOF,CBLT,16,1), XLBOCBBB_MASK, POWER, { CR } },
{ "bnllr",   XLOCB(19,BOF,CBLT,16,0), XLBOCBBB_MASK, PPC, { CR } },
{ "bnllr-",  XLOCB(19,BOF,CBLT,16,0), XLBOCBBB_MASK, PPC, { CR } },
{ "bnllr+",  XLOCB(19,BOFP,CBLT,16,0), XLBOCBBB_MASK, PPC, { CR } },
{ "bnlr",    XLOCB(19,BOF,CBLT,16,0), XLBOCBBB_MASK, POWER, { CR } },
{ "bnllrl",  XLOCB(19,BOF,CBLT,16,1), XLBOCBBB_MASK, PPC, { CR } },
{ "bnllrl-", XLOCB(19,BOF,CBLT,16,1), XLBOCBBB_MASK, PPC, { CR } },
{ "bnllrl+", XLOCB(19,BOFP,CBLT,16,1), XLBOCBBB_MASK, PPC, { CR } },
{ "bnlrl",   XLOCB(19,BOF,CBLT,16,1), XLBOCBBB_MASK, POWER, { CR } },
{ "blelr",   XLOCB(19,BOF,CBGT,16,0), XLBOCBBB_MASK, PPC, { CR } },
{ "blelr-",  XLOCB(19,BOF,CBGT,16,0), XLBOCBBB_MASK, PPC, { CR } },
{ "blelr+",  XLOCB(19,BOFP,CBGT,16,0), XLBOCBBB_MASK, PPC, { CR } },
{ "bler",    XLOCB(19,BOF,CBGT,16,0), XLBOCBBB_MASK, POWER, { CR } },
{ "blelrl",  XLOCB(19,BOF,CBGT,16,1), XLBOCBBB_MASK, PPC, { CR } },
{ "blelrl-", XLOCB(19,BOF,CBGT,16,1), XLBOCBBB_MASK, PPC, { CR } },
{ "blelrl+", XLOCB(19,BOFP,CBGT,16,1), XLBOCBBB_MASK, PPC, { CR } },
{ "blerl",   XLOCB(19,BOF,CBGT,16,1), XLBOCBBB_MASK, POWER, { CR } },
{ "bnglr",   XLOCB(19,BOF,CBGT,16,0), XLBOCBBB_MASK, PPC, { CR } },
{ "bnglr-",  XLOCB(19,BOF,CBGT,16,0), XLBOCBBB_MASK, PPC, { CR } },
{ "bnglr+",  XLOCB(19,BOFP,CBGT,16,0), XLBOCBBB_MASK, PPC, { CR } },
{ "bngr",    XLOCB(19,BOF,CBGT,16,0), XLBOCBBB_MASK, POWER, { CR } },
{ "bnglrl",  XLOCB(19,BOF,CBGT,16,1), XLBOCBBB_MASK, PPC, { CR } },
{ "bnglrl-", XLOCB(19,BOF,CBGT,16,1), XLBOCBBB_MASK, PPC, { CR } },
{ "bnglrl+", XLOCB(19,BOFP,CBGT,16,1), XLBOCBBB_MASK, PPC, { CR } },
{ "bngrl",   XLOCB(19,BOF,CBGT,16,1), XLBOCBBB_MASK, POWER, { CR } },
{ "bnelr",   XLOCB(19,BOF,CBEQ,16,0), XLBOCBBB_MASK, PPC, { CR } },
{ "bnelr-",  XLOCB(19,BOF,CBEQ,16,0), XLBOCBBB_MASK, PPC, { CR } },
{ "bnelr+",  XLOCB(19,BOFP,CBEQ,16,0), XLBOCBBB_MASK, PPC, { CR } },
{ "bner",    XLOCB(19,BOF,CBEQ,16,0), XLBOCBBB_MASK, POWER, { CR } },
{ "bnelrl",  XLOCB(19,BOF,CBEQ,16,1), XLBOCBBB_MASK, PPC, { CR } },
{ "bnelrl-", XLOCB(19,BOF,CBEQ,16,1), XLBOCBBB_MASK, PPC, { CR } },
{ "bnelrl+", XLOCB(19,BOFP,CBEQ,16,1), XLBOCBBB_MASK, PPC, { CR } },
{ "bnerl",   XLOCB(19,BOF,CBEQ,16,1), XLBOCBBB_MASK, POWER, { CR } },
{ "bnslr",   XLOCB(19,BOF,CBSO,16,0), XLBOCBBB_MASK, PPC, { CR } },
{ "bnslr-",  XLOCB(19,BOF,CBSO,16,0), XLBOCBBB_MASK, PPC, { CR } },
{ "bnslr+",  XLOCB(19,BOFP,CBSO,16,0), XLBOCBBB_MASK, PPC, { CR } },
{ "bnsr",    XLOCB(19,BOF,CBSO,16,0), XLBOCBBB_MASK, POWER, { CR } },
{ "bnslrl",  XLOCB(19,BOF,CBSO,16,1), XLBOCBBB_MASK, PPC, { CR } },
{ "bnslrl-", XLOCB(19,BOF,CBSO,16,1), XLBOCBBB_MASK, PPC, { CR } },
{ "bnslrl+", XLOCB(19,BOFP,CBSO,16,1), XLBOCBBB_MASK, PPC, { CR } },
{ "bnsrl",   XLOCB(19,BOF,CBSO,16,1), XLBOCBBB_MASK, POWER, { CR } },
{ "bnulr",   XLOCB(19,BOF,CBSO,16,0), XLBOCBBB_MASK, PPC, { CR } },
{ "bnulr-",  XLOCB(19,BOF,CBSO,16,0), XLBOCBBB_MASK, PPC, { CR } },
{ "bnulr+",  XLOCB(19,BOFP,CBSO,16,0), XLBOCBBB_MASK, PPC, { CR } },
{ "bnulrl",  XLOCB(19,BOF,CBSO,16,1), XLBOCBBB_MASK, PPC, { CR } },
{ "bnulrl-", XLOCB(19,BOF,CBSO,16,1), XLBOCBBB_MASK, PPC, { CR } },
{ "bnulrl+", XLOCB(19,BOFP,CBSO,16,1), XLBOCBBB_MASK, PPC, { CR } },
{ "btlr",    XLO(19,BOT,16,0), XLBOBB_MASK, PPC,	{ BI } },
{ "btlr-",   XLO(19,BOT,16,0), XLBOBB_MASK, PPC,	{ BI } },
{ "btlr+",   XLO(19,BOTP,16,0), XLBOBB_MASK, PPC,	{ BI } },
{ "bbtr",    XLO(19,BOT,16,0), XLBOBB_MASK, POWER,	{ BI } },
{ "btlrl",   XLO(19,BOT,16,1), XLBOBB_MASK, PPC,	{ BI } },
{ "btlrl-",  XLO(19,BOT,16,1), XLBOBB_MASK, PPC,	{ BI } },
{ "btlrl+",  XLO(19,BOTP,16,1), XLBOBB_MASK, PPC,	{ BI } },
{ "bbtrl",   XLO(19,BOT,16,1), XLBOBB_MASK, POWER,	{ BI } },
{ "bflr",    XLO(19,BOF,16,0), XLBOBB_MASK, PPC,	{ BI } },
{ "bflr-",   XLO(19,BOF,16,0), XLBOBB_MASK, PPC,	{ BI } },
{ "bflr+",   XLO(19,BOFP,16,0), XLBOBB_MASK, PPC,	{ BI } },
{ "bbfr",    XLO(19,BOF,16,0), XLBOBB_MASK, POWER,	{ BI } },
{ "bflrl",   XLO(19,BOF,16,1), XLBOBB_MASK, PPC,	{ BI } },
{ "bflrl-",  XLO(19,BOF,16,1), XLBOBB_MASK, PPC,	{ BI } },
{ "bflrl+",  XLO(19,BOFP,16,1), XLBOBB_MASK, PPC,	{ BI } },
{ "bbfrl",   XLO(19,BOF,16,1), XLBOBB_MASK, POWER,	{ BI } },
{ "bdnztlr", XLO(19,BODNZT,16,0), XLBOBB_MASK, PPC,	{ BI } },
{ "bdnztlr-",XLO(19,BODNZT,16,0), XLBOBB_MASK, PPC,	{ BI } },
{ "bdnztlr+",XLO(19,BODNZTP,16,0), XLBOBB_MASK, PPC,	{ BI } },
{ "bdnztlrl",XLO(19,BODNZT,16,1), XLBOBB_MASK, PPC,	{ BI } },
{ "bdnztlrl-",XLO(19,BODNZT,16,1), XLBOBB_MASK, PPC,	{ BI } },
{ "bdnztlrl+",XLO(19,BODNZTP,16,1), XLBOBB_MASK, PPC,	{ BI } },
{ "bdnzflr", XLO(19,BODNZF,16,0), XLBOBB_MASK, PPC,	{ BI } },
{ "bdnzflr-",XLO(19,BODNZF,16,0), XLBOBB_MASK, PPC,	{ BI } },
{ "bdnzflr+",XLO(19,BODNZFP,16,0), XLBOBB_MASK, PPC,	{ BI } },
{ "bdnzflrl",XLO(19,BODNZF,16,1), XLBOBB_MASK, PPC,	{ BI } },
{ "bdnzflrl-",XLO(19,BODNZF,16,1), XLBOBB_MASK, PPC,	{ BI } },
{ "bdnzflrl+",XLO(19,BODNZFP,16,1), XLBOBB_MASK, PPC,	{ BI } },
{ "bdztlr",  XLO(19,BODZT,16,0), XLBOBB_MASK, PPC,	{ BI } },
{ "bdztlr-", XLO(19,BODZT,16,0), XLBOBB_MASK, PPC,	{ BI } },
{ "bdztlr+", XLO(19,BODZTP,16,0), XLBOBB_MASK, PPC,	{ BI } },
{ "bdztlrl", XLO(19,BODZT,16,1), XLBOBB_MASK, PPC,	{ BI } },
{ "bdztlrl-",XLO(19,BODZT,16,1), XLBOBB_MASK, PPC,	{ BI } },
{ "bdztlrl+",XLO(19,BODZTP,16,1), XLBOBB_MASK, PPC,	{ BI } },
{ "bdzflr",  XLO(19,BODZF,16,0), XLBOBB_MASK, PPC,	{ BI } },
{ "bdzflr-", XLO(19,BODZF,16,0), XLBOBB_MASK, PPC,	{ BI } },
{ "bdzflr+", XLO(19,BODZFP,16,0), XLBOBB_MASK, PPC,	{ BI } },
{ "bdzflrl", XLO(19,BODZF,16,1), XLBOBB_MASK, PPC,	{ BI } },
{ "bdzflrl-",XLO(19,BODZF,16,1), XLBOBB_MASK, PPC,	{ BI } },
{ "bdzflrl+",XLO(19,BODZFP,16,1), XLBOBB_MASK, PPC,	{ BI } },
{ "bclr",    XLLK(19,16,0), XLYBB_MASK,	PPC,		{ BO, BI } },
{ "bclrl",   XLLK(19,16,1), XLYBB_MASK,	PPC,		{ BO, BI } },
{ "bclr+",   XLYLK(19,16,1,0), XLYBB_MASK, PPC,		{ BOE, BI } },
{ "bclrl+",  XLYLK(19,16,1,1), XLYBB_MASK, PPC,		{ BOE, BI } },
{ "bclr-",   XLYLK(19,16,0,0), XLYBB_MASK, PPC,		{ BOE, BI } },
{ "bclrl-",  XLYLK(19,16,0,1), XLYBB_MASK, PPC,		{ BOE, BI } },
{ "bcr",     XLLK(19,16,0), XLBB_MASK,	POWER,		{ BO, BI } },
{ "bcrl",    XLLK(19,16,1), XLBB_MASK,	POWER,		{ BO, BI } },

{ "crnot",   XL(19,33), XL_MASK,	PPC,		{ BT, BA, BBA } },
{ "crnor",   XL(19,33),	XL_MASK,	PPC|POWER,	{ BT, BA, BB } },

{ "rfi",     XL(19,50),	0xffffffff,	PPC|POWER,	{ 0 } },
{ "rfci",    XL(19,51),	0xffffffff,	PPC,		{ 0 } },

{ "rfsvc",   XL(19,82),	0xffffffff,	POWER,		{ 0 } },

{ "crandc",  XL(19,129), XL_MASK,	PPC|POWER,	{ BT, BA, BB } },

{ "isync",   XL(19,150), 0xffffffff,	PPC,		{ 0 } },
{ "ics",     XL(19,150), 0xffffffff,	POWER,		{ 0 } },

{ "crclr",   XL(19,193), XL_MASK,	PPC,		{ BT, BAT, BBA } },
{ "crxor",   XL(19,193), XL_MASK,	PPC|POWER,	{ BT, BA, BB } },

{ "crnand",  XL(19,225), XL_MASK,	PPC|POWER,	{ BT, BA, BB } },

{ "crand",   XL(19,257), XL_MASK,	PPC|POWER,	{ BT, BA, BB } },

{ "crset",   XL(19,289), XL_MASK,	PPC,		{ BT, BAT, BBA } },
{ "creqv",   XL(19,289), XL_MASK,	PPC|POWER,	{ BT, BA, BB } },

{ "crorc",   XL(19,417), XL_MASK,	PPC|POWER,	{ BT, BA, BB } },

{ "crmove",  XL(19,449), XL_MASK,	PPC,		{ BT, BA, BBA } },
{ "cror",    XL(19,449), XL_MASK,	PPC|POWER,	{ BT, BA, BB } },

{ "bctr",    XLO(19,BOU,528,0), XLBOBIBB_MASK, PPC|POWER, { 0 } },
{ "bctrl",   XLO(19,BOU,528,1), XLBOBIBB_MASK, PPC|POWER, { 0 } },
{ "bltctr",  XLOCB(19,BOT,CBLT,528,0), XLBOCBBB_MASK, PPC, { CR } },
{ "bltctr-", XLOCB(19,BOT,CBLT,528,0), XLBOCBBB_MASK, PPC, { CR } },
{ "bltctr+", XLOCB(19,BOTP,CBLT,528,0), XLBOCBBB_MASK, PPC, { CR } },
{ "bltctrl", XLOCB(19,BOT,CBLT,528,1), XLBOCBBB_MASK, PPC, { CR } },
{ "bltctrl-",XLOCB(19,BOT,CBLT,528,1), XLBOCBBB_MASK, PPC, { CR } },
{ "bltctrl+",XLOCB(19,BOTP,CBLT,528,1), XLBOCBBB_MASK, PPC, { CR } },
{ "bgtctr",  XLOCB(19,BOT,CBGT,528,0), XLBOCBBB_MASK, PPC, { CR } },
{ "bgtctr-", XLOCB(19,BOT,CBGT,528,0), XLBOCBBB_MASK, PPC, { CR } },
{ "bgtctr+", XLOCB(19,BOTP,CBGT,528,0), XLBOCBBB_MASK, PPC, { CR } },
{ "bgtctrl", XLOCB(19,BOT,CBGT,528,1), XLBOCBBB_MASK, PPC, { CR } },
{ "bgtctrl-",XLOCB(19,BOT,CBGT,528,1), XLBOCBBB_MASK, PPC, { CR } },
{ "bgtctrl+",XLOCB(19,BOTP,CBGT,528,1), XLBOCBBB_MASK, PPC, { CR } },
{ "beqctr",  XLOCB(19,BOT,CBEQ,528,0), XLBOCBBB_MASK, PPC, { CR } },
{ "beqctr-", XLOCB(19,BOT,CBEQ,528,0), XLBOCBBB_MASK, PPC, { CR } },
{ "beqctr+", XLOCB(19,BOTP,CBEQ,528,0), XLBOCBBB_MASK, PPC, { CR } },
{ "beqctrl", XLOCB(19,BOT,CBEQ,528,1), XLBOCBBB_MASK, PPC, { CR } },
{ "beqctrl-",XLOCB(19,BOT,CBEQ,528,1), XLBOCBBB_MASK, PPC, { CR } },
{ "beqctrl+",XLOCB(19,BOTP,CBEQ,528,1), XLBOCBBB_MASK, PPC, { CR } },
{ "bsoctr",  XLOCB(19,BOT,CBSO,528,0), XLBOCBBB_MASK, PPC, { CR } },
{ "bsoctr-", XLOCB(19,BOT,CBSO,528,0), XLBOCBBB_MASK, PPC, { CR } },
{ "bsoctr+", XLOCB(19,BOTP,CBSO,528,0), XLBOCBBB_MASK, PPC, { CR } },
{ "bsoctrl", XLOCB(19,BOT,CBSO,528,1), XLBOCBBB_MASK, PPC, { CR } },
{ "bsoctrl-",XLOCB(19,BOT,CBSO,528,1), XLBOCBBB_MASK, PPC, { CR } },
{ "bsoctrl+",XLOCB(19,BOTP,CBSO,528,1), XLBOCBBB_MASK, PPC, { CR } },
{ "bunctr",  XLOCB(19,BOT,CBSO,528,0), XLBOCBBB_MASK, PPC, { CR } },
{ "bunctr-", XLOCB(19,BOT,CBSO,528,0), XLBOCBBB_MASK, PPC, { CR } },
{ "bunctr+", XLOCB(19,BOTP,CBSO,528,0), XLBOCBBB_MASK, PPC, { CR } },
{ "bunctrl", XLOCB(19,BOT,CBSO,528,1), XLBOCBBB_MASK, PPC, { CR } },
{ "bunctrl-",XLOCB(19,BOT,CBSO,528,1), XLBOCBBB_MASK, PPC, { CR } },
{ "bunctrl+",XLOCB(19,BOTP,CBSO,528,1), XLBOCBBB_MASK, PPC, { CR } },
{ "bgectr",  XLOCB(19,BOF,CBLT,528,0), XLBOCBBB_MASK, PPC, { CR } },
{ "bgectr-", XLOCB(19,BOF,CBLT,528,0), XLBOCBBB_MASK, PPC, { CR } },
{ "bgectr+", XLOCB(19,BOFP,CBLT,528,0), XLBOCBBB_MASK, PPC, { CR } },
{ "bgectrl", XLOCB(19,BOF,CBLT,528,1), XLBOCBBB_MASK, PPC, { CR } },
{ "bgectrl-",XLOCB(19,BOF,CBLT,528,1), XLBOCBBB_MASK, PPC, { CR } },
{ "bgectrl+",XLOCB(19,BOFP,CBLT,528,1), XLBOCBBB_MASK, PPC, { CR } },
{ "bnlctr",  XLOCB(19,BOF,CBLT,528,0), XLBOCBBB_MASK, PPC, { CR } },
{ "bnlctr-", XLOCB(19,BOF,CBLT,528,0), XLBOCBBB_MASK, PPC, { CR } },
{ "bnlctr+", XLOCB(19,BOFP,CBLT,528,0), XLBOCBBB_MASK, PPC, { CR } },
{ "bnlctrl", XLOCB(19,BOF,CBLT,528,1), XLBOCBBB_MASK, PPC, { CR } },
{ "bnlctrl-",XLOCB(19,BOF,CBLT,528,1), XLBOCBBB_MASK, PPC, { CR } },
{ "bnlctrl+",XLOCB(19,BOFP,CBLT,528,1), XLBOCBBB_MASK, PPC, { CR } },
{ "blectr",  XLOCB(19,BOF,CBGT,528,0), XLBOCBBB_MASK, PPC, { CR } },
{ "blectr-", XLOCB(19,BOF,CBGT,528,0), XLBOCBBB_MASK, PPC, { CR } },
{ "blectr+", XLOCB(19,BOFP,CBGT,528,0), XLBOCBBB_MASK, PPC, { CR } },
{ "blectrl", XLOCB(19,BOF,CBGT,528,1), XLBOCBBB_MASK, PPC, { CR } },
{ "blectrl-",XLOCB(19,BOF,CBGT,528,1), XLBOCBBB_MASK, PPC, { CR } },
{ "blectrl+",XLOCB(19,BOFP,CBGT,528,1), XLBOCBBB_MASK, PPC, { CR } },
{ "bngctr",  XLOCB(19,BOF,CBGT,528,0), XLBOCBBB_MASK, PPC, { CR } },
{ "bngctr-", XLOCB(19,BOF,CBGT,528,0), XLBOCBBB_MASK, PPC, { CR } },
{ "bngctr+", XLOCB(19,BOFP,CBGT,528,0), XLBOCBBB_MASK, PPC, { CR } },
{ "bngctrl", XLOCB(19,BOF,CBGT,528,1), XLBOCBBB_MASK, PPC, { CR } },
{ "bngctrl-",XLOCB(19,BOF,CBGT,528,1), XLBOCBBB_MASK, PPC, { CR } },
{ "bngctrl+",XLOCB(19,BOFP,CBGT,528,1), XLBOCBBB_MASK, PPC, { CR } },
{ "bnectr",  XLOCB(19,BOF,CBEQ,528,0), XLBOCBBB_MASK, PPC, { CR } },
{ "bnectr-", XLOCB(19,BOF,CBEQ,528,0), XLBOCBBB_MASK, PPC, { CR } },
{ "bnectr+", XLOCB(19,BOFP,CBEQ,528,0), XLBOCBBB_MASK, PPC, { CR } },
{ "bnectrl", XLOCB(19,BOF,CBEQ,528,1), XLBOCBBB_MASK, PPC, { CR } },
{ "bnectrl-",XLOCB(19,BOF,CBEQ,528,1), XLBOCBBB_MASK, PPC, { CR } },
{ "bnectrl+",XLOCB(19,BOFP,CBEQ,528,1), XLBOCBBB_MASK, PPC, { CR } },
{ "bnsctr",  XLOCB(19,BOF,CBSO,528,0), XLBOCBBB_MASK, PPC, { CR } },
{ "bnsctr-", XLOCB(19,BOF,CBSO,528,0), XLBOCBBB_MASK, PPC, { CR } },
{ "bnsctr+", XLOCB(19,BOFP,CBSO,528,0), XLBOCBBB_MASK, PPC, { CR } },
{ "bnsctrl", XLOCB(19,BOF,CBSO,528,1), XLBOCBBB_MASK, PPC, { CR } },
{ "bnsctrl-",XLOCB(19,BOF,CBSO,528,1), XLBOCBBB_MASK, PPC, { CR } },
{ "bnsctrl+",XLOCB(19,BOFP,CBSO,528,1), XLBOCBBB_MASK, PPC, { CR } },
{ "bnuctr",  XLOCB(19,BOF,CBSO,528,0), XLBOCBBB_MASK, PPC, { CR } },
{ "bnuctr-", XLOCB(19,BOF,CBSO,528,0), XLBOCBBB_MASK, PPC, { CR } },
{ "bnuctr+", XLOCB(19,BOFP,CBSO,528,0), XLBOCBBB_MASK, PPC, { CR } },
{ "bnuctrl", XLOCB(19,BOF,CBSO,528,1), XLBOCBBB_MASK, PPC, { CR } },
{ "bnuctrl-",XLOCB(19,BOF,CBSO,528,1), XLBOCBBB_MASK, PPC, { CR } },
{ "bnuctrl+",XLOCB(19,BOFP,CBSO,528,1), XLBOCBBB_MASK, PPC, { CR } },
{ "btctr",   XLO(19,BOT,528,0), XLBOBB_MASK, PPC,	{ BI } },
{ "btctr-",  XLO(19,BOT,528,0), XLBOBB_MASK, PPC,	{ BI } },
{ "btctr+",  XLO(19,BOTP,528,0), XLBOBB_MASK, PPC,	{ BI } },
{ "btctrl",  XLO(19,BOT,528,1), XLBOBB_MASK, PPC,	{ BI } },
{ "btctrl-", XLO(19,BOT,528,1), XLBOBB_MASK, PPC,	{ BI } },
{ "btctrl+", XLO(19,BOTP,528,1), XLBOBB_MASK, PPC,	{ BI } },
{ "bfctr",   XLO(19,BOF,528,0), XLBOBB_MASK, PPC,	{ BI } },
{ "bfctr-",  XLO(19,BOF,528,0), XLBOBB_MASK, PPC,	{ BI } },
{ "bfctr+",  XLO(19,BOFP,528,0), XLBOBB_MASK, PPC,	{ BI } },
{ "bfctrl",  XLO(19,BOF,528,1), XLBOBB_MASK, PPC,	{ BI } },
{ "bfctrl-", XLO(19,BOF,528,1), XLBOBB_MASK, PPC,	{ BI } },
{ "bfctrl+", XLO(19,BOFP,528,1), XLBOBB_MASK, PPC,	{ BI } },
{ "bcctr",   XLLK(19,528,0), XLYBB_MASK, PPC,		{ BO, BI } },
{ "bcctr-",  XLYLK(19,528,0,0), XLYBB_MASK, PPC,	{ BOE, BI } },
{ "bcctr+",  XLYLK(19,528,1,0), XLYBB_MASK, PPC,	{ BOE, BI } },
{ "bcctrl",  XLLK(19,528,1), XLYBB_MASK, PPC,		{ BO, BI } },
{ "bcctrl-", XLYLK(19,528,0,1), XLYBB_MASK, PPC,	{ BOE, BI } },
{ "bcctrl+", XLYLK(19,528,1,1), XLYBB_MASK, PPC,	{ BOE, BI } },
{ "bcc",     XLLK(19,528,0), XLBB_MASK,	POWER,		{ BO, BI } },
{ "bccl",    XLLK(19,528,1), XLBB_MASK,	POWER,		{ BO, BI } },

{ "rlwimi",  M(20,0),	M_MASK,		PPC,		{ RA,RS,SH,MBE,ME } },
{ "rlimi",   M(20,0),	M_MASK,		POWER,		{ RA,RS,SH,MBE,ME } },

{ "rlwimi.", M(20,1),	M_MASK,		PPC,		{ RA,RS,SH,MBE,ME } },
{ "rlimi.",  M(20,1),	M_MASK,		POWER,		{ RA,RS,SH,MBE,ME } },

{ "rotlwi",  MME(21,31,0), MMBME_MASK,	PPC,		{ RA, RS, SH } },
{ "clrlwi",  MME(21,31,0), MSHME_MASK,	PPC,		{ RA, RS, MB } },
{ "rlwinm",  M(21,0),	M_MASK,		PPC,		{ RA,RS,SH,MBE,ME } },
{ "rlinm",   M(21,0),	M_MASK,		POWER,		{ RA,RS,SH,MBE,ME } },
{ "rotlwi.", MME(21,31,1), MMBME_MASK,	PPC,		{ RA,RS,SH } },
{ "clrlwi.", MME(21,31,1), MSHME_MASK,	PPC,		{ RA, RS, MB } },
{ "rlwinm.", M(21,1),	M_MASK,		PPC,		{ RA,RS,SH,MBE,ME } },
{ "rlinm.",  M(21,1),	M_MASK,		POWER,		{ RA,RS,SH,MBE,ME } },

{ "rlmi",    M(22,0),	M_MASK,		POWER|M601,	{ RA,RS,RB,MBE,ME } },
{ "rlmi.",   M(22,1),	M_MASK,		POWER|M601,	{ RA,RS,RB,MBE,ME } },

{ "rotlw",   MME(23,31,0), MMBME_MASK,	PPC,		{ RA, RS, RB } },
{ "rlwnm",   M(23,0),	M_MASK,		PPC,		{ RA,RS,RB,MBE,ME } },
{ "rlnm",    M(23,0),	M_MASK,		POWER,		{ RA,RS,RB,MBE,ME } },
{ "rotlw.",  MME(23,31,1), MMBME_MASK,	PPC,		{ RA, RS, RB } },
{ "rlwnm.",  M(23,1),	M_MASK,		PPC,		{ RA,RS,RB,MBE,ME } },
{ "rlnm.",   M(23,1),	M_MASK,		POWER,		{ RA,RS,RB,MBE,ME } },

{ "nop",     OP(24),	0xffffffff,	PPC,		{ 0 } },
{ "ori",     OP(24),	OP_MASK,	PPC,		{ RA, RS, UI } },
{ "oril",    OP(24),	OP_MASK,	POWER,		{ RA, RS, UI } },

{ "oris",    OP(25),	OP_MASK,	PPC,		{ RA, RS, UI } },
{ "oriu",    OP(25),	OP_MASK,	POWER,		{ RA, RS, UI } },

{ "xori",    OP(26),	OP_MASK,	PPC,		{ RA, RS, UI } },
{ "xoril",   OP(26),	OP_MASK,	POWER,		{ RA, RS, UI } },

{ "xoris",   OP(27),	OP_MASK,	PPC,		{ RA, RS, UI } },
{ "xoriu",   OP(27),	OP_MASK,	POWER,		{ RA, RS, UI } },

{ "andi.",   OP(28),	OP_MASK,	PPC,		{ RA, RS, UI } },
{ "andil.",  OP(28),	OP_MASK,	POWER,		{ RA, RS, UI } },

{ "andis.",  OP(29),	OP_MASK,	PPC,		{ RA, RS, UI } },
{ "andiu.",  OP(29),	OP_MASK,	POWER,		{ RA, RS, UI } },

{ "rotldi",  MD(30,0,0), MDMB_MASK,	PPC|B64,	{ RA, RS, SH6 } },
{ "clrldi",  MD(30,0,0), MDSH_MASK,	PPC|B64,	{ RA, RS, MB6 } },
{ "rldicl",  MD(30,0,0), MD_MASK,	PPC|B64,	{ RA, RS, SH6, MB6 } },
{ "rotldi.", MD(30,0,1), MDMB_MASK,	PPC|B64,	{ RA, RS, SH6 } },
{ "clrldi.", MD(30,0,1), MDSH_MASK,	PPC|B64,	{ RA, RS, MB6 } },
{ "rldicl.", MD(30,0,1), MD_MASK,	PPC|B64,	{ RA, RS, SH6, MB6 } },

{ "rldicr",  MD(30,1,0), MD_MASK,	PPC|B64,	{ RA, RS, SH6, ME6 } },
{ "rldicr.", MD(30,1,1), MD_MASK,	PPC|B64,	{ RA, RS, SH6, ME6 } },

{ "rldic",   MD(30,2,0), MD_MASK,	PPC|B64,	{ RA, RS, SH6, MB6 } },
{ "rldic.",  MD(30,2,1), MD_MASK,	PPC|B64,	{ RA, RS, SH6, MB6 } },

{ "rldimi",  MD(30,3,0), MD_MASK,	PPC|B64,	{ RA, RS, SH6, MB6 } },
{ "rldimi.", MD(30,3,1), MD_MASK,	PPC|B64,	{ RA, RS, SH6, MB6 } },

{ "rotld",   MDS(30,8,0), MDSMB_MASK,	PPC|B64,	{ RA, RS, RB } },
{ "rldcl",   MDS(30,8,0), MDS_MASK,	PPC|B64,	{ RA, RS, RB, MB6 } },
{ "rotld.",  MDS(30,8,1), MDSMB_MASK,	PPC|B64,	{ RA, RS, RB } },
{ "rldcl.",  MDS(30,8,1), MDS_MASK,	PPC|B64,	{ RA, RS, RB, MB6 } },

{ "rldcr",   MDS(30,9,0), MDS_MASK,	PPC|B64,	{ RA, RS, RB, ME6 } },
{ "rldcr.",  MDS(30,9,1), MDS_MASK,	PPC|B64,	{ RA, RS, RB, ME6 } },

{ "cmpw",    XCMPL(31,0,0), XCMPL_MASK, PPC,		{ OBF, RA, RB } },
{ "cmpd",    XCMPL(31,0,1), XCMPL_MASK, PPC|B64,	{ OBF, RA, RB } },
{ "cmp",     X(31,0),	XCMP_MASK,	PPC,		{ BF, L, RA, RB } },
{ "cmp",     X(31,0),	XCMPL_MASK,	POWER,		{ BF, RA, RB } },

{ "twlgt",   XTO(31,4,TOLGT), XTO_MASK, PPC,		{ RA, RB } },
{ "tlgt",    XTO(31,4,TOLGT), XTO_MASK, POWER,		{ RA, RB } },
{ "twllt",   XTO(31,4,TOLLT), XTO_MASK, PPC,		{ RA, RB } },
{ "tllt",    XTO(31,4,TOLLT), XTO_MASK, POWER,		{ RA, RB } },
{ "tweq",    XTO(31,4,TOEQ), XTO_MASK,	PPC,		{ RA, RB } },
{ "teq",     XTO(31,4,TOEQ), XTO_MASK,	POWER,		{ RA, RB } },
{ "twlge",   XTO(31,4,TOLGE), XTO_MASK, PPC,		{ RA, RB } },
{ "tlge",    XTO(31,4,TOLGE), XTO_MASK, POWER,		{ RA, RB } },
{ "twlnl",   XTO(31,4,TOLNL), XTO_MASK, PPC,		{ RA, RB } },
{ "tlnl",    XTO(31,4,TOLNL), XTO_MASK, POWER,		{ RA, RB } },
{ "twlle",   XTO(31,4,TOLLE), XTO_MASK, PPC,		{ RA, RB } },
{ "tlle",    XTO(31,4,TOLLE), XTO_MASK, POWER,		{ RA, RB } },
{ "twlng",   XTO(31,4,TOLNG), XTO_MASK, PPC,		{ RA, RB } },
{ "tlng",    XTO(31,4,TOLNG), XTO_MASK, POWER,		{ RA, RB } },
{ "twgt",    XTO(31,4,TOGT), XTO_MASK,	PPC,		{ RA, RB } },
{ "tgt",     XTO(31,4,TOGT), XTO_MASK,	POWER,		{ RA, RB } },
{ "twge",    XTO(31,4,TOGE), XTO_MASK,	PPC,		{ RA, RB } },
{ "tge",     XTO(31,4,TOGE), XTO_MASK,	POWER,		{ RA, RB } },
{ "twnl",    XTO(31,4,TONL), XTO_MASK,	PPC,		{ RA, RB } },
{ "tnl",     XTO(31,4,TONL), XTO_MASK,	POWER,		{ RA, RB } },
{ "twlt",    XTO(31,4,TOLT), XTO_MASK,	PPC,		{ RA, RB } },
{ "tlt",     XTO(31,4,TOLT), XTO_MASK,	POWER,		{ RA, RB } },
{ "twle",    XTO(31,4,TOLE), XTO_MASK,	PPC,		{ RA, RB } },
{ "tle",     XTO(31,4,TOLE), XTO_MASK,	POWER,		{ RA, RB } },
{ "twng",    XTO(31,4,TONG), XTO_MASK,	PPC,		{ RA, RB } },
{ "tng",     XTO(31,4,TONG), XTO_MASK,	POWER,		{ RA, RB } },
{ "twne",    XTO(31,4,TONE), XTO_MASK,	PPC,		{ RA, RB } },
{ "tne",     XTO(31,4,TONE), XTO_MASK,	POWER,		{ RA, RB } },
{ "trap",    XTO(31,4,TOU), 0xffffffff,	PPC,		{ 0 } },
{ "tw",      X(31,4),	X_MASK,		PPC,		{ TO, RA, RB } },
{ "t",       X(31,4),	X_MASK,		POWER,		{ TO, RA, RB } },

{ "subfc",   XO(31,8,0,0), XO_MASK,	PPC,		{ RT, RA, RB } },
{ "sf",      XO(31,8,0,0), XO_MASK,	POWER,		{ RT, RA, RB } },
{ "subc",    XO(31,8,0,0), XO_MASK,	PPC,		{ RT, RB, RA } },
{ "subfc.",  XO(31,8,0,1), XO_MASK,	PPC,		{ RT, RA, RB } },
{ "sf.",     XO(31,8,0,1), XO_MASK,	POWER,		{ RT, RA, RB } },
{ "subc.",   XO(31,8,0,1), XO_MASK,	PPC,		{ RT, RB, RA } },
{ "subfco",  XO(31,8,1,0), XO_MASK,	PPC,		{ RT, RA, RB } },
{ "sfo",     XO(31,8,1,0), XO_MASK,	POWER,		{ RT, RA, RB } },
{ "subco",   XO(31,8,1,0), XO_MASK,	PPC,		{ RT, RB, RA } },
{ "subfco.", XO(31,8,1,1), XO_MASK,	PPC,		{ RT, RA, RB } },
{ "sfo.",    XO(31,8,1,1), XO_MASK,	POWER,		{ RT, RA, RB } },
{ "subco.",  XO(31,8,1,1), XO_MASK,	PPC,		{ RT, RB, RA } },

{ "mulhdu",  XO(31,9,0,0), XO_MASK,	PPC|B64,	{ RT, RA, RB } },
{ "mulhdu.", XO(31,9,0,1), XO_MASK,	PPC|B64,	{ RT, RA, RB } },

{ "addc",    XO(31,10,0,0), XO_MASK,	PPC,		{ RT, RA, RB } },
{ "a",       XO(31,10,0,0), XO_MASK,	POWER,		{ RT, RA, RB } },
{ "addc.",   XO(31,10,0,1), XO_MASK,	PPC,		{ RT, RA, RB } },
{ "a.",      XO(31,10,0,1), XO_MASK,	POWER,		{ RT, RA, RB } },
{ "addco",   XO(31,10,1,0), XO_MASK,	PPC,		{ RT, RA, RB } },
{ "ao",      XO(31,10,1,0), XO_MASK,	POWER,		{ RT, RA, RB } },
{ "addco.",  XO(31,10,1,1), XO_MASK,	PPC,		{ RT, RA, RB } },
{ "ao.",     XO(31,10,1,1), XO_MASK,	POWER,		{ RT, RA, RB } },

{ "mulhwu",  XO(31,11,0,0), XO_MASK,	PPC,		{ RT, RA, RB } },
{ "mulhwu.", XO(31,11,0,1), XO_MASK,	PPC,		{ RT, RA, RB } },

{ "mfcr",    X(31,19),	XRARB_MASK,	POWER|PPC,	{ RT } },

{ "lwarx",   X(31,20),	X_MASK,		PPC,		{ RT, RA, RB } },

{ "ldx",     X(31,21),	X_MASK,		PPC|B64,	{ RT, RA, RB } },

{ "lwzx",    X(31,23),	X_MASK,		PPC,		{ RT, RA, RB } },
{ "lx",      X(31,23),	X_MASK,		POWER,		{ RT, RA, RB } },

{ "slw",     XRC(31,24,0), X_MASK,	PPC,		{ RA, RS, RB } },
{ "sl",      XRC(31,24,0), X_MASK,	POWER,		{ RA, RS, RB } },
{ "slw.",    XRC(31,24,1), X_MASK,	PPC,		{ RA, RS, RB } },
{ "sl.",     XRC(31,24,1), X_MASK,	POWER,		{ RA, RS, RB } },

{ "cntlzw",  XRC(31,26,0), XRB_MASK,	PPC,		{ RA, RS } },
{ "cntlz",   XRC(31,26,0), XRB_MASK,	POWER,		{ RA, RS } },
{ "cntlzw.", XRC(31,26,1), XRB_MASK,	PPC,		{ RA, RS } },
{ "cntlz.",  XRC(31,26,1), XRB_MASK, 	POWER,		{ RA, RS } },

{ "sld",     XRC(31,27,0), X_MASK,	PPC|B64,	{ RA, RS, RB } },
{ "sld.",    XRC(31,27,1), X_MASK,	PPC|B64,	{ RA, RS, RB } },

{ "and",     XRC(31,28,0), X_MASK,	PPC|POWER,	{ RA, RS, RB } },
{ "and.",    XRC(31,28,1), X_MASK,	PPC|POWER,	{ RA, RS, RB } },

{ "maskg",   XRC(31,29,0), X_MASK,	POWER|M601,	{ RA, RS, RB } },
{ "maskg.",  XRC(31,29,1), X_MASK,	POWER|M601,	{ RA, RS, RB } },

{ "cmplw",   XCMPL(31,32,0), XCMPL_MASK, PPC,		{ OBF, RA, RB } },
{ "cmpld",   XCMPL(31,32,1), XCMPL_MASK, PPC|B64,	{ OBF, RA, RB } },
{ "cmpl",    X(31,32),	XCMP_MASK,	PPC,		{ BF, L, RA, RB } },
{ "cmpl",    X(31,32),	XCMPL_MASK,	POWER,		{ BF, RA, RB } },

{ "subf",    XO(31,40,0,0), XO_MASK,	PPC,		{ RT, RA, RB } },
{ "sub",     XO(31,40,0,0), XO_MASK,	PPC,		{ RT, RB, RA } },
{ "subf.",   XO(31,40,0,1), XO_MASK,	PPC,		{ RT, RA, RB } },
{ "sub.",    XO(31,40,0,1), XO_MASK,	PPC,		{ RT, RB, RA } },
{ "subfo",   XO(31,40,1,0), XO_MASK,	PPC,		{ RT, RA, RB } },
{ "subo",    XO(31,40,1,0), XO_MASK,	PPC,		{ RT, RB, RA } },
{ "subfo.",  XO(31,40,1,1), XO_MASK,	PPC,		{ RT, RA, RB } },
{ "subo.",   XO(31,40,1,1), XO_MASK,	PPC,		{ RT, RB, RA } },

{ "ldux",    X(31,53),	X_MASK,		PPC|B64,	{ RT, RAL, RB } },

{ "dcbst",   X(31,54),	XRT_MASK,	PPC,		{ RA, RB } },

{ "lwzux",   X(31,55),	X_MASK,		PPC,		{ RT, RAL, RB } },
{ "lux",     X(31,55),	X_MASK,		POWER,		{ RT, RA, RB } },

{ "cntlzd",  XRC(31,58,0), XRB_MASK,	PPC|B64,	{ RA, RS } },
{ "cntlzd.", XRC(31,58,1), XRB_MASK,	PPC|B64,	{ RA, RS } },

{ "andc",    XRC(31,60,0), X_MASK,	PPC|POWER,	{ RA, RS, RB } },
{ "andc.",   XRC(31,60,1), X_MASK,	PPC|POWER,	{ RA, RS, RB } },

{ "tdlgt",   XTO(31,68,TOLGT), XTO_MASK, PPC|B64,	{ RA, RB } },
{ "tdllt",   XTO(31,68,TOLLT), XTO_MASK, PPC|B64,	{ RA, RB } },
{ "tdeq",    XTO(31,68,TOEQ), XTO_MASK, PPC|B64,	{ RA, RB } },
{ "tdlge",   XTO(31,68,TOLGE), XTO_MASK, PPC|B64,	{ RA, RB } },
{ "tdlnl",   XTO(31,68,TOLNL), XTO_MASK, PPC|B64,	{ RA, RB } },
{ "tdlle",   XTO(31,68,TOLLE), XTO_MASK, PPC|B64,	{ RA, RB } },
{ "tdlng",   XTO(31,68,TOLNG), XTO_MASK, PPC|B64,	{ RA, RB } },
{ "tdgt",    XTO(31,68,TOGT), XTO_MASK, PPC|B64,	{ RA, RB } },
{ "tdge",    XTO(31,68,TOGE), XTO_MASK, PPC|B64,	{ RA, RB } },
{ "tdnl",    XTO(31,68,TONL), XTO_MASK, PPC|B64,	{ RA, RB } },
{ "tdlt",    XTO(31,68,TOLT), XTO_MASK, PPC|B64,	{ RA, RB } },
{ "tdle",    XTO(31,68,TOLE), XTO_MASK, PPC|B64,	{ RA, RB } },
{ "tdng",    XTO(31,68,TONG), XTO_MASK, PPC|B64,	{ RA, RB } },
{ "tdne",    XTO(31,68,TONE), XTO_MASK, PPC|B64,	{ RA, RB } },
{ "td",	     X(31,68),	X_MASK,		PPC|B64,	{ TO, RA, RB } },

{ "mulhd",   XO(31,73,0,0), XO_MASK,	PPC|B64,	{ RT, RA, RB } },
{ "mulhd.",  XO(31,73,0,1), XO_MASK,	PPC|B64,	{ RT, RA, RB } },

{ "mulhw",   XO(31,75,0,0), XO_MASK,	PPC,		{ RT, RA, RB } },
{ "mulhw.",  XO(31,75,0,1), XO_MASK,	PPC,		{ RT, RA, RB } },

{ "mfmsr",   X(31,83),	XRARB_MASK,	PPC|POWER,	{ RT } },

{ "ldarx",   X(31,84),	X_MASK,		PPC|B64,	{ RT, RA, RB } },

{ "dcbf",    X(31,86),	XRT_MASK,	PPC,		{ RA, RB } },

{ "lbzx",    X(31,87),	X_MASK,		PPC|POWER,	{ RT, RA, RB } },

{ "neg",     XO(31,104,0,0), XORB_MASK,	PPC|POWER,	{ RT, RA } },
{ "neg.",    XO(31,104,0,1), XORB_MASK,	PPC|POWER,	{ RT, RA } },
{ "nego",    XO(31,104,1,0), XORB_MASK,	PPC|POWER,	{ RT, RA } },
{ "nego.",   XO(31,104,1,1), XORB_MASK,	PPC|POWER,	{ RT, RA } },

{ "mul",     XO(31,107,0,0), XO_MASK,	POWER|M601,	{ RT, RA, RB } },
{ "mul.",    XO(31,107,0,1), XO_MASK,	POWER|M601,	{ RT, RA, RB } },
{ "mulo",    XO(31,107,1,0), XO_MASK,	POWER|M601,	{ RT, RA, RB } },
{ "mulo.",   XO(31,107,1,1), XO_MASK,	POWER|M601,	{ RT, RA, RB } },

{ "clf",     X(31,118), XRB_MASK,	POWER,		{ RT, RA } },

{ "lbzux",   X(31,119),	X_MASK,		PPC|POWER,	{ RT, RAL, RB } },

{ "not",     XRC(31,124,0), X_MASK,	PPC|POWER,	{ RA, RS, RBS } },
{ "nor",     XRC(31,124,0), X_MASK,	PPC|POWER,	{ RA, RS, RB } },
{ "not.",    XRC(31,124,1), X_MASK,	PPC|POWER,	{ RA, RS, RBS } },
{ "nor.",    XRC(31,124,1), X_MASK,	PPC|POWER,	{ RA, RS, RB } },

{ "subfe",   XO(31,136,0,0), XO_MASK,	PPC,		{ RT, RA, RB } },
{ "sfe",     XO(31,136,0,0), XO_MASK,	POWER,		{ RT, RA, RB } },
{ "subfe.",  XO(31,136,0,1), XO_MASK,	PPC,		{ RT, RA, RB } },
{ "sfe.",    XO(31,136,0,1), XO_MASK,	POWER,		{ RT, RA, RB } },
{ "subfeo",  XO(31,136,1,0), XO_MASK,	PPC,		{ RT, RA, RB } },
{ "sfeo",    XO(31,136,1,0), XO_MASK,	POWER,		{ RT, RA, RB } },
{ "subfeo.", XO(31,136,1,1), XO_MASK,	PPC,		{ RT, RA, RB } },
{ "sfeo.",   XO(31,136,1,1), XO_MASK,	POWER,		{ RT, RA, RB } },

{ "adde",    XO(31,138,0,0), XO_MASK,	PPC,		{ RT, RA, RB } },
{ "ae",      XO(31,138,0,0), XO_MASK,	POWER,		{ RT, RA, RB } },
{ "adde.",   XO(31,138,0,1), XO_MASK,	PPC,		{ RT, RA, RB } },
{ "ae.",     XO(31,138,0,1), XO_MASK,	POWER,		{ RT, RA, RB } },
{ "addeo",   XO(31,138,1,0), XO_MASK,	PPC,		{ RT, RA, RB } },
{ "aeo",     XO(31,138,1,0), XO_MASK,	POWER,		{ RT, RA, RB } },
{ "addeo.",  XO(31,138,1,1), XO_MASK,	PPC,		{ RT, RA, RB } },
{ "aeo.",    XO(31,138,1,1), XO_MASK,	POWER,		{ RT, RA, RB } },

{ "mtcr",    XFXM(31,144,0xff), XFXFXM_MASK|FXM_MASK, PPC|POWER, { RS }},
{ "mtcrf",   X(31,144),	XFXFXM_MASK,	PPC|POWER,	{ FXM, RS } },

{ "mtmsr",   X(31,146),	XRARB_MASK,	PPC|POWER,	{ RS } },

{ "stdx",    X(31,149), X_MASK,		PPC|B64,	{ RS, RA, RB } },

{ "stwcx.",  XRC(31,150,1), X_MASK,	PPC,		{ RS, RA, RB } },

{ "stwx",    X(31,151), X_MASK,		PPC,		{ RS, RA, RB } },
{ "stx",     X(31,151), X_MASK,		POWER,		{ RS, RA, RB } },

{ "slq",     XRC(31,152,0), X_MASK,	POWER|M601,	{ RA, RS, RB } },
{ "slq.",    XRC(31,152,1), X_MASK,	POWER|M601,	{ RA, RS, RB } },

{ "sle",     XRC(31,153,0), X_MASK,	POWER|M601,	{ RA, RS, RB } },
{ "sle.",    XRC(31,153,1), X_MASK,	POWER|M601,	{ RA, RS, RB } },

{ "stdux",   X(31,181),	X_MASK,		PPC|B64,	{ RS, RAS, RB } },

{ "stwux",   X(31,183),	X_MASK,		PPC,		{ RS, RAS, RB } },
{ "stux",    X(31,183),	X_MASK,		POWER,		{ RS, RA, RB } },

{ "sliq",    XRC(31,184,0), X_MASK,	POWER|M601,	{ RA, RS, SH } },
{ "sliq.",   XRC(31,184,1), X_MASK,	POWER|M601,	{ RA, RS, SH } },

{ "subfze",  XO(31,200,0,0), XORB_MASK, PPC,		{ RT, RA } },
{ "sfze",    XO(31,200,0,0), XORB_MASK, POWER,		{ RT, RA } },
{ "subfze.", XO(31,200,0,1), XORB_MASK, PPC,		{ RT, RA } },
{ "sfze.",   XO(31,200,0,1), XORB_MASK, POWER,		{ RT, RA } },
{ "subfzeo", XO(31,200,1,0), XORB_MASK, PPC,		{ RT, RA } },
{ "sfzeo",   XO(31,200,1,0), XORB_MASK, POWER,		{ RT, RA } },
{ "subfzeo.",XO(31,200,1,1), XORB_MASK, PPC,		{ RT, RA } },
{ "sfzeo.",  XO(31,200,1,1), XORB_MASK, POWER,		{ RT, RA } },

{ "addze",   XO(31,202,0,0), XORB_MASK, PPC,		{ RT, RA } },
{ "aze",     XO(31,202,0,0), XORB_MASK, POWER,		{ RT, RA } },
{ "addze.",  XO(31,202,0,1), XORB_MASK, PPC,		{ RT, RA } },
{ "aze.",    XO(31,202,0,1), XORB_MASK, POWER,		{ RT, RA } },
{ "addzeo",  XO(31,202,1,0), XORB_MASK, PPC,		{ RT, RA } },
{ "azeo",    XO(31,202,1,0), XORB_MASK, POWER,		{ RT, RA } },
{ "addzeo.", XO(31,202,1,1), XORB_MASK, PPC,		{ RT, RA } },
{ "azeo.",   XO(31,202,1,1), XORB_MASK, POWER,		{ RT, RA } },

{ "mtsr",    X(31,210),	XRB_MASK|(1<<20), PPC|POWER|B32, { SR, RS } },

{ "stdcx.",  XRC(31,214,1), X_MASK,	PPC|B64,	{ RS, RA, RB } },

{ "stbx",    X(31,215),	X_MASK,		PPC|POWER,	{ RS, RA, RB } },

{ "sllq",    XRC(31,216,0), X_MASK,	POWER|M601,	{ RA, RS, RB } },
{ "sllq.",   XRC(31,216,1), X_MASK,	POWER|M601,	{ RA, RS, RB } },

{ "sleq",    XRC(31,217,0), X_MASK,	POWER|M601,	{ RA, RS, RB } },
{ "sleq.",   XRC(31,217,1), X_MASK,	POWER|M601,	{ RA, RS, RB } },

{ "subfme",  XO(31,232,0,0), XORB_MASK, PPC,		{ RT, RA } },
{ "sfme",    XO(31,232,0,0), XORB_MASK, POWER,		{ RT, RA } },
{ "subfme.", XO(31,232,0,1), XORB_MASK, PPC,		{ RT, RA } },
{ "sfme.",   XO(31,232,0,1), XORB_MASK, POWER,		{ RT, RA } },
{ "subfmeo", XO(31,232,1,0), XORB_MASK, PPC,		{ RT, RA } },
{ "sfmeo",   XO(31,232,1,0), XORB_MASK, POWER,		{ RT, RA } },
{ "subfmeo.",XO(31,232,1,1), XORB_MASK, PPC,		{ RT, RA } },
{ "sfmeo.",  XO(31,232,1,1), XORB_MASK, POWER,		{ RT, RA } },

{ "mulld",   XO(31,233,0,0), XO_MASK,	PPC|B64,	{ RT, RA, RB } },
{ "mulld.",  XO(31,233,0,1), XO_MASK,	PPC|B64,	{ RT, RA, RB } },
{ "mulldo",  XO(31,233,1,0), XO_MASK,	PPC|B64,	{ RT, RA, RB } },
{ "mulldo.", XO(31,233,1,1), XO_MASK,	PPC|B64,	{ RT, RA, RB } },

{ "addme",   XO(31,234,0,0), XORB_MASK, PPC,		{ RT, RA } },
{ "ame",     XO(31,234,0,0), XORB_MASK, POWER,		{ RT, RA } },
{ "addme.",  XO(31,234,0,1), XORB_MASK, PPC,		{ RT, RA } },
{ "ame.",    XO(31,234,0,1), XORB_MASK, POWER,		{ RT, RA } },
{ "addmeo",  XO(31,234,1,0), XORB_MASK, PPC,		{ RT, RA } },
{ "ameo",    XO(31,234,1,0), XORB_MASK, POWER,		{ RT, RA } },
{ "addmeo.", XO(31,234,1,1), XORB_MASK, PPC,		{ RT, RA } },
{ "ameo.",   XO(31,234,1,1), XORB_MASK, POWER,		{ RT, RA } },

{ "mullw",   XO(31,235,0,0), XO_MASK,	PPC,		{ RT, RA, RB } },
{ "muls",    XO(31,235,0,0), XO_MASK,	POWER,		{ RT, RA, RB } },
{ "mullw.",  XO(31,235,0,1), XO_MASK,	PPC,		{ RT, RA, RB } },
{ "muls.",   XO(31,235,0,1), XO_MASK,	POWER,		{ RT, RA, RB } },
{ "mullwo",  XO(31,235,1,0), XO_MASK,	PPC,		{ RT, RA, RB } },
{ "mulso",   XO(31,235,1,0), XO_MASK,	POWER,		{ RT, RA, RB } },
{ "mullwo.", XO(31,235,1,1), XO_MASK,	PPC,		{ RT, RA, RB } },
{ "mulso.",  XO(31,235,1,1), XO_MASK,	POWER,		{ RT, RA, RB } },

{ "mtsrin",  X(31,242),	XRA_MASK,	PPC|B32,	{ RS, RB } },
{ "mtsri",   X(31,242),	XRA_MASK,	POWER|B32,	{ RS, RB } },

{ "dcbtst",  X(31,246),	XRT_MASK,	PPC,		{ RA, RB } },

{ "stbux",   X(31,247),	X_MASK,		PPC|POWER,	{ RS, RAS, RB } },

{ "slliq",   XRC(31,248,0), X_MASK,	POWER|M601,	{ RA, RS, SH } },
{ "slliq.",  XRC(31,248,1), X_MASK,	POWER|M601,	{ RA, RS, SH } },

{ "doz",     XO(31,264,0,0), XO_MASK,	POWER|M601,	{ RT, RA, RB } },
{ "doz.",    XO(31,264,0,1), XO_MASK,	POWER|M601,	{ RT, RA, RB } },
{ "dozo",    XO(31,264,1,0), XO_MASK,	POWER|M601,	{ RT, RA, RB } },
{ "dozo.",   XO(31,264,1,1), XO_MASK,	POWER|M601,	{ RT, RA, RB } },

{ "add",     XO(31,266,0,0), XO_MASK,	PPC,		{ RT, RA, RB } },
{ "cax",     XO(31,266,0,0), XO_MASK,	POWER,		{ RT, RA, RB } },
{ "add.",    XO(31,266,0,1), XO_MASK,	PPC,		{ RT, RA, RB } },
{ "cax.",    XO(31,266,0,1), XO_MASK,	POWER,		{ RT, RA, RB } },
{ "addo",    XO(31,266,1,0), XO_MASK,	PPC,		{ RT, RA, RB } },
{ "caxo",    XO(31,266,1,0), XO_MASK,	POWER,		{ RT, RA, RB } },
{ "addo.",   XO(31,266,1,1), XO_MASK,	PPC,		{ RT, RA, RB } },
{ "caxo.",   XO(31,266,1,1), XO_MASK,	POWER,		{ RT, RA, RB } },

{ "lscbx",   XRC(31,277,0), X_MASK,	POWER|M601,	{ RT, RA, RB } },
{ "lscbx.",  XRC(31,277,1), X_MASK,	POWER|M601,	{ RT, RA, RB } },

{ "dcbt",    X(31,278),	XRT_MASK,	PPC,		{ RA, RB } },

{ "lhzx",    X(31,279),	X_MASK,		PPC|POWER,	{ RT, RA, RB } },

{ "icbt",    X(31,262),	XRT_MASK,	PPC,		{ RA, RB } },

{ "eqv",     XRC(31,284,0), X_MASK,	PPC|POWER,	{ RA, RS, RB } },
{ "eqv.",    XRC(31,284,1), X_MASK,	PPC|POWER,	{ RA, RS, RB } },

{ "tlbie",   X(31,306),	XRTRA_MASK,	PPC,		{ RB } },
{ "tlbi",    X(31,306),	XRTRA_MASK,	POWER,		{ RB } },

{ "eciwx",   X(31,310), X_MASK,		PPC,		{ RT, RA, RB } },

{ "lhzux",   X(31,311),	X_MASK,		PPC|POWER,	{ RT, RAL, RB } },

{ "xor",     XRC(31,316,0), X_MASK,	PPC|POWER,	{ RA, RS, RB } },
{ "xor.",    XRC(31,316,1), X_MASK,	PPC|POWER,	{ RA, RS, RB } },

{ "mfdcr",   X(31,323),	X_MASK,		PPC,		{ RT, SPR } },

{ "div",     XO(31,331,0,0), XO_MASK,	POWER|M601,	{ RT, RA, RB } },
{ "div.",    XO(31,331,0,1), XO_MASK,	POWER|M601,	{ RT, RA, RB } },
{ "divo",    XO(31,331,1,0), XO_MASK,	POWER|M601,	{ RT, RA, RB } },
{ "divo.",   XO(31,331,1,1), XO_MASK,	POWER|M601,	{ RT, RA, RB } },

{ "mfmq",    XSPR(31,339,0), XSPR_MASK,	POWER|M601,	{ RT } },
{ "mfxer",   XSPR(31,339,1), XSPR_MASK,	PPC|POWER,	{ RT } },
{ "mfrtcu",  XSPR(31,339,4), XSPR_MASK, PPC|POWER,	{ RT } },
{ "mfrtcl",  XSPR(31,339,5), XSPR_MASK, PPC|POWER,	{ RT } },
{ "mfdec",   XSPR(31,339,6), XSPR_MASK, POWER|M601,	{ RT } },
{ "mflr",    XSPR(31,339,8), XSPR_MASK,	PPC|POWER,	{ RT } },
{ "mfctr",   XSPR(31,339,9), XSPR_MASK,	PPC|POWER,	{ RT } },
{ "mftid",   XSPR(31,339,17), XSPR_MASK, POWER,		{ RT } },
{ "mfdsisr", XSPR(31,339,18), XSPR_MASK, PPC|POWER,	{ RT } },
{ "mfdar",   XSPR(31,339,19), XSPR_MASK, PPC|POWER,	{ RT } },
{ "mfdec",   XSPR(31,339,22), XSPR_MASK, PPC,		{ RT } },
{ "mfsdr0",  XSPR(31,339,24), XSPR_MASK, POWER,		{ RT } },
{ "mfsdr1",  XSPR(31,339,25), XSPR_MASK, PPC|POWER,	{ RT } },
{ "mfsrr0",  XSPR(31,339,26), XSPR_MASK, PPC|POWER,	{ RT } },
{ "mfsrr1",  XSPR(31,339,27), XSPR_MASK, PPC|POWER,	{ RT } },
{ "mfsprg",  XSPR(31,339,272), XSPRG_MASK, PPC,		{ RT, SPRG } },
{ "mfasr",   XSPR(31,339,280), XSPR_MASK, PPC|B64,	{ RT } },
{ "mfear",   XSPR(31,339,282), XSPR_MASK, PPC,		{ RT } },
{ "mfpvr",   XSPR(31,339,287), XSPR_MASK, PPC,		{ RT } },
{ "mfibatu", XSPR(31,339,528), XSPRBAT_MASK, PPC,	{ RT, SPRBAT } },
{ "mfibatl", XSPR(31,339,529), XSPRBAT_MASK, PPC,	{ RT, SPRBAT } },
{ "mfdbatu", XSPR(31,339,536), XSPRBAT_MASK, PPC,	{ RT, SPRBAT } },
{ "mfdbatl", XSPR(31,339,537), XSPRBAT_MASK, PPC,	{ RT, SPRBAT } },
{ "mfspr",   X(31,339),	X_MASK,		PPC|POWER,	{ RT, SPR } },

{ "lwax",    X(31,341),	X_MASK,		PPC|B64,	{ RT, RA, RB } },

{ "lhax",    X(31,343),	X_MASK,		PPC|POWER,	{ RT, RA, RB } },

{ "dccci",   X(31,454),	XRT_MASK,	PPC,		{ RA, RB } },

{ "abs",     XO(31,360,0,0), XORB_MASK, POWER|M601,	{ RT, RA } },
{ "abs.",    XO(31,360,0,1), XORB_MASK, POWER|M601,	{ RT, RA } },
{ "abso",    XO(31,360,1,0), XORB_MASK, POWER|M601,	{ RT, RA } },
{ "abso.",   XO(31,360,1,1), XORB_MASK, POWER|M601,	{ RT, RA } },

{ "divs",    XO(31,363,0,0), XO_MASK,	POWER|M601,	{ RT, RA, RB } },
{ "divs.",   XO(31,363,0,1), XO_MASK,	POWER|M601,	{ RT, RA, RB } },
{ "divso",   XO(31,363,1,0), XO_MASK,	POWER|M601,	{ RT, RA, RB } },
{ "divso.",  XO(31,363,1,1), XO_MASK,	POWER|M601,	{ RT, RA, RB } },

{ "tlbia",   X(31,370),	0xffffffff,	PPC,		{ 0 } },

{ "mftbu",   XSPR(31,371,269), XSPR_MASK, PPC,		{ RT } },
{ "mftb",    X(31,371),	X_MASK,		PPC,		{ RT, TBR } },

{ "lwaux",   X(31,373),	X_MASK,		PPC|B64,	{ RT, RAL, RB } },

{ "lhaux",   X(31,375),	X_MASK,		PPC|POWER,	{ RT, RAL, RB } },

{ "sthx",    X(31,407),	X_MASK,		PPC|POWER,	{ RS, RA, RB } },

{ "lfqx",    X(31,791),	X_MASK,		POWER2,		{ FRT, RA, RB } },

{ "lfqux",   X(31,823),	X_MASK,		POWER2,		{ FRT, RA, RB } },

{ "stfqx",   X(31,919),	X_MASK,		POWER2,		{ FRS, RA, RB } },

{ "stfqux",  X(31,951),	X_MASK,		POWER2,		{ FRS, RA, RB } },

{ "orc",     XRC(31,412,0), X_MASK,	PPC|POWER,	{ RA, RS, RB } },
{ "orc.",    XRC(31,412,1), X_MASK,	PPC|POWER,	{ RA, RS, RB } },

{ "sradi",   XS(31,413,0), XS_MASK,	PPC|B64,	{ RA, RS, SH6 } },
{ "sradi.",  XS(31,413,1), XS_MASK,	PPC|B64,	{ RA, RS, SH6 } },

{ "slbie",   X(31,434),	XRTRA_MASK,	PPC|B64,	{ RB } },

{ "ecowx",   X(31,438),	X_MASK,		PPC,		{ RT, RA, RB } },

{ "sthux",   X(31,439),	X_MASK,		PPC|POWER,	{ RS, RAS, RB } },

{ "mr",	     XRC(31,444,0), X_MASK,	PPC|POWER,	{ RA, RS, RBS } },
{ "or",      XRC(31,444,0), X_MASK,	PPC|POWER,	{ RA, RS, RB } },
{ "mr.",     XRC(31,444,1), X_MASK,	PPC|POWER,	{ RA, RS, RBS } },
{ "or.",     XRC(31,444,1), X_MASK,	PPC|POWER,	{ RA, RS, RB } },

{ "mtdcr",   X(31,451),	X_MASK,		PPC,		{ SPR, RS } },

{ "divdu",   XO(31,457,0,0), XO_MASK,	PPC|B64,	{ RT, RA, RB } },
{ "divdu.",  XO(31,457,0,1), XO_MASK,	PPC|B64,	{ RT, RA, RB } },
{ "divduo",  XO(31,457,1,0), XO_MASK,	PPC|B64,	{ RT, RA, RB } },
{ "divduo.", XO(31,457,1,1), XO_MASK,	PPC|B64,	{ RT, RA, RB } },

{ "divwu",   XO(31,459,0,0), XO_MASK,	PPC,		{ RT, RA, RB } },
{ "divwu.",  XO(31,459,0,1), XO_MASK,	PPC,		{ RT, RA, RB } },
{ "divwuo",  XO(31,459,1,0), XO_MASK,	PPC,		{ RT, RA, RB } },
{ "divwuo.", XO(31,459,1,1), XO_MASK,	PPC,		{ RT, RA, RB } },

{ "mtmq",    XSPR(31,467,0), XSPR_MASK,	POWER|M601,	{ RS } },
{ "mtxer",   XSPR(31,467,1), XSPR_MASK,	PPC|POWER,	{ RS } },
{ "mtlr",    XSPR(31,467,8), XSPR_MASK,	PPC|POWER,	{ RS } },
{ "mtctr",   XSPR(31,467,9), XSPR_MASK,	PPC|POWER,	{ RS } },
{ "mttid",   XSPR(31,467,17), XSPR_MASK, POWER,		{ RS } },
{ "mtdsisr", XSPR(31,467,18), XSPR_MASK, PPC|POWER,	{ RS } },
{ "mtdar",   XSPR(31,467,19), XSPR_MASK, PPC|POWER,	{ RS } },
{ "mtrtcu",  XSPR(31,467,20), XSPR_MASK, PPC|POWER,	{ RS } },
{ "mtrtcl",  XSPR(31,467,21), XSPR_MASK, PPC|POWER,	{ RS } },
{ "mtdec",   XSPR(31,467,22), XSPR_MASK, PPC|POWER,	{ RS } },
{ "mtsdr0",  XSPR(31,467,24), XSPR_MASK, POWER,		{ RS } },
{ "mtsdr1",  XSPR(31,467,25), XSPR_MASK, PPC|POWER,	{ RS } },
{ "mtsrr0",  XSPR(31,467,26), XSPR_MASK, PPC|POWER,	{ RS } },
{ "mtsrr1",  XSPR(31,467,27), XSPR_MASK, PPC|POWER,	{ RS } },
{ "mtsprg",  XSPR(31,467,272), XSPRG_MASK, PPC,		{ SPRG, RS } },
{ "mtasr",   XSPR(31,467,280), XSPR_MASK, PPC|B64,	{ RS } },
{ "mtear",   XSPR(31,467,282), XSPR_MASK, PPC,		{ RS } },
{ "mttbl",   XSPR(31,467,284), XSPR_MASK, PPC,		{ RS } },
{ "mttbu",   XSPR(31,467,285), XSPR_MASK, PPC,		{ RS } },
{ "mtibatu", XSPR(31,467,528), XSPRBAT_MASK, PPC,	{ SPRBAT, RS } },
{ "mtibatl", XSPR(31,467,529), XSPRBAT_MASK, PPC,	{ SPRBAT, RS } },
{ "mtdbatu", XSPR(31,467,536), XSPRBAT_MASK, PPC,	{ SPRBAT, RS } },
{ "mtdbatl", XSPR(31,467,537), XSPRBAT_MASK, PPC,	{ SPRBAT, RS } },
{ "mtspr",   X(31,467),	X_MASK,		PPC|POWER,	{ SPR, RS } },

{ "dcbi",    X(31,470),	XRT_MASK,	PPC,		{ RA, RB } },

{ "nand",    XRC(31,476,0), X_MASK,	PPC|POWER,	{ RA, RS, RB } },
{ "nand.",   XRC(31,476,1), X_MASK,	PPC|POWER,	{ RA, RS, RB } },

{ "nabs",    XO(31,488,0,0), XORB_MASK, POWER|M601,	{ RT, RA } },
{ "nabs.",   XO(31,488,0,1), XORB_MASK, POWER|M601,	{ RT, RA } },
{ "nabso",   XO(31,488,1,0), XORB_MASK, POWER|M601,	{ RT, RA } },
{ "nabso.",  XO(31,488,1,1), XORB_MASK, POWER|M601,	{ RT, RA } },

{ "divd",    XO(31,489,0,0), XO_MASK,	PPC|B64,	{ RT, RA, RB } },
{ "divd.",   XO(31,489,0,1), XO_MASK,	PPC|B64,	{ RT, RA, RB } },
{ "divdo",   XO(31,489,1,0), XO_MASK,	PPC|B64,	{ RT, RA, RB } },
{ "divdo.",  XO(31,489,1,1), XO_MASK,	PPC|B64,	{ RT, RA, RB } },

{ "divw",    XO(31,491,0,0), XO_MASK,	PPC,		{ RT, RA, RB } },
{ "divw.",   XO(31,491,0,1), XO_MASK,	PPC,		{ RT, RA, RB } },
{ "divwo",   XO(31,491,1,0), XO_MASK,	PPC,		{ RT, RA, RB } },
{ "divwo.",  XO(31,491,1,1), XO_MASK,	PPC,		{ RT, RA, RB } },

{ "slbia",   X(31,498),	0xffffffff,	PPC|B64,	{ 0 } },

{ "cli",     X(31,502), XRB_MASK,	POWER,		{ RT, RA } },

{ "mcrxr",   X(31,512),	XRARB_MASK|(3<<21), PPC|POWER,	{ BF } },

{ "clcs",    X(31,531), XRB_MASK,	POWER|M601,	{ RT, RA } },

{ "lswx",    X(31,533),	X_MASK,		PPC,		{ RT, RA, RB } },
{ "lsx",     X(31,533),	X_MASK,		POWER,		{ RT, RA, RB } },

{ "lwbrx",   X(31,534),	X_MASK,		PPC,		{ RT, RA, RB } },
{ "lbrx",    X(31,534),	X_MASK,		POWER,		{ RT, RA, RB } },

{ "lfsx",    X(31,535),	X_MASK,		PPC|POWER,	{ FRT, RA, RB } },

{ "srw",     XRC(31,536,0), X_MASK,	PPC,		{ RA, RS, RB } },
{ "sr",      XRC(31,536,0), X_MASK,	POWER,		{ RA, RS, RB } },
{ "srw.",    XRC(31,536,1), X_MASK,	PPC,		{ RA, RS, RB } },
{ "sr.",     XRC(31,536,1), X_MASK,	POWER,		{ RA, RS, RB } },

{ "rrib",    XRC(31,537,0), X_MASK,	POWER|M601,	{ RA, RS, RB } },
{ "rrib.",   XRC(31,537,1), X_MASK,	POWER|M601,	{ RA, RS, RB } },

{ "srd",     XRC(31,539,0), X_MASK,	PPC|B64,	{ RA, RS, RB } },
{ "srd.",    XRC(31,539,1), X_MASK,	PPC|B64,	{ RA, RS, RB } },

{ "maskir",  XRC(31,541,0), X_MASK,	POWER|M601,	{ RA, RS, RB } },
{ "maskir.", XRC(31,541,1), X_MASK,	POWER|M601,	{ RA, RS, RB } },

{ "tlbsync", X(31,566),	0xffffffff,	PPC,		{ 0 } },

{ "lfsux",   X(31,567),	X_MASK,		PPC|POWER,	{ FRT, RAS, RB } },

{ "mfsr",    X(31,595),	XRB_MASK|(1<<20), PPC|POWER|B32, { RT, SR } },

{ "lswi",    X(31,597),	X_MASK,		PPC,		{ RT, RA, NB } },
{ "lsi",     X(31,597),	X_MASK,		POWER,		{ RT, RA, NB } },

{ "sync",    X(31,598), 0xffffffff,	PPC,		{ 0 } },
{ "dcs",     X(31,598), 0xffffffff,	POWER,		{ 0 } },

{ "lfdx",    X(31,599), X_MASK,		PPC|POWER,	{ FRT, RA, RB } },

{ "mfsri",   X(31,627), X_MASK,		POWER,		{ RT, RA, RB } },

{ "dclst",   X(31,630), XRB_MASK,	POWER,		{ RS, RA } },

{ "lfdux",   X(31,631), X_MASK,		PPC|POWER,	{ FRT, RAS, RB } },

{ "mfsrin",  X(31,659), XRA_MASK,	PPC|B32,	{ RT, RB } },

{ "stswx",   X(31,661), X_MASK,		PPC,		{ RS, RA, RB } },
{ "stsx",    X(31,661), X_MASK,		POWER,		{ RS, RA, RB } },

{ "stwbrx",  X(31,662), X_MASK,		PPC,		{ RS, RA, RB } },
{ "stbrx",   X(31,662), X_MASK,		POWER,		{ RS, RA, RB } },

{ "stfsx",   X(31,663), X_MASK,		PPC|POWER,	{ FRS, RA, RB } },

{ "srq",     XRC(31,664,0), X_MASK,	POWER|M601,	{ RA, RS, RB } },
{ "srq.",    XRC(31,664,1), X_MASK,	POWER|M601,	{ RA, RS, RB } },

{ "sre",     XRC(31,665,0), X_MASK,	POWER|M601,	{ RA, RS, RB } },
{ "sre.",    XRC(31,665,1), X_MASK,	POWER|M601,	{ RA, RS, RB } },

{ "stfsux",  X(31,695),	X_MASK,		PPC|POWER,	{ FRS, RAS, RB } },

{ "sriq",    XRC(31,696,0), X_MASK,	POWER|M601,	{ RA, RS, SH } },
{ "sriq.",   XRC(31,696,1), X_MASK,	POWER|M601,	{ RA, RS, SH } },

{ "stswi",   X(31,725),	X_MASK,		PPC,		{ RS, RA, NB } },
{ "stsi",    X(31,725),	X_MASK,		POWER,		{ RS, RA, NB } },

{ "stfdx",   X(31,727),	X_MASK,		PPC|POWER,	{ FRS, RA, RB } },

{ "srlq",    XRC(31,728,0), X_MASK,	POWER|M601,	{ RA, RS, RB } },
{ "srlq.",   XRC(31,728,1), X_MASK,	POWER|M601,	{ RA, RS, RB } },

{ "sreq",    XRC(31,729,0), X_MASK,	POWER|M601,	{ RA, RS, RB } },
{ "sreq.",   XRC(31,729,1), X_MASK,	POWER|M601,	{ RA, RS, RB } },

{ "stfdux",  X(31,759),	X_MASK,		PPC|POWER,	{ FRS, RAS, RB } },

{ "srliq",   XRC(31,760,0), X_MASK,	POWER|M601,	{ RA, RS, SH } },
{ "srliq.",  XRC(31,760,1), X_MASK,	POWER|M601,	{ RA, RS, SH } },

{ "lhbrx",   X(31,790),	X_MASK,		PPC|POWER,	{ RT, RA, RB } },

{ "sraw",    XRC(31,792,0), X_MASK,	PPC,		{ RA, RS, RB } },
{ "sra",     XRC(31,792,0), X_MASK,	POWER,		{ RA, RS, RB } },
{ "sraw.",   XRC(31,792,1), X_MASK,	PPC,		{ RA, RS, RB } },
{ "sra.",    XRC(31,792,1), X_MASK,	POWER,		{ RA, RS, RB } },

{ "srad",    XRC(31,794,0), X_MASK,	PPC|B64,	{ RA, RS, RB } },
{ "srad.",   XRC(31,794,1), X_MASK,	PPC|B64,	{ RA, RS, RB } },

{ "rac",     X(31,818),	X_MASK,		POWER,		{ RT, RA, RB } },

{ "srawi",   XRC(31,824,0), X_MASK,	PPC,		{ RA, RS, SH } },
{ "srai",    XRC(31,824,0), X_MASK,	POWER,		{ RA, RS, SH } },
{ "srawi.",  XRC(31,824,1), X_MASK,	PPC,		{ RA, RS, SH } },
{ "srai.",   XRC(31,824,1), X_MASK,	POWER,		{ RA, RS, SH } },

{ "eieio",   X(31,854),	0xffffffff,	PPC,		{ 0 } },

{ "sthbrx",  X(31,918),	X_MASK,		PPC|POWER,	{ RS, RA, RB } },

{ "sraq",    XRC(31,920,0), X_MASK,	POWER|M601,	{ RA, RS, RB } },
{ "sraq.",   XRC(31,920,1), X_MASK,	POWER|M601,	{ RA, RS, RB } },

{ "srea",    XRC(31,921,0), X_MASK,	POWER|M601,	{ RA, RS, RB } },
{ "srea.",   XRC(31,921,1), X_MASK,	POWER|M601,	{ RA, RS, RB } },

{ "extsh",   XRC(31,922,0), XRB_MASK,	PPC,		{ RA, RS } },
{ "exts",    XRC(31,922,0), XRB_MASK,	POWER,		{ RA, RS } },
{ "extsh.",  XRC(31,922,1), XRB_MASK,	PPC,		{ RA, RS } },
{ "exts.",   XRC(31,922,1), XRB_MASK,	POWER,		{ RA, RS } },

{ "sraiq",   XRC(31,952,0), X_MASK,	POWER|M601,	{ RA, RS, SH } },
{ "sraiq.",  XRC(31,952,1), X_MASK,	POWER|M601,	{ RA, RS, SH } },

{ "extsb",   XRC(31,954,0), XRB_MASK,	PPC,		{ RA, RS} },
{ "extsb.",  XRC(31,954,1), XRB_MASK,	PPC,		{ RA, RS} },

{ "iccci",   X(31,966),	XRT_MASK,	PPC,		{ RA, RB } },

{ "icbi",    X(31,982),	XRT_MASK,	PPC,		{ RA, RB } },

{ "stfiwx",  X(31,983),	X_MASK,		PPC,		{ FRS, RA, RB } },

{ "extsw",   XRC(31,986,0), XRB_MASK,	PPC,		{ RA, RS } },
{ "extsw.",  XRC(31,986,1), XRB_MASK,	PPC,		{ RA, RS } },

{ "dcbz",    X(31,1014), XRT_MASK,	PPC,		{ RA, RB } },
{ "dclz",    X(31,1014), XRT_MASK,	PPC,		{ RA, RB } },

{ "lwz",     OP(32),	OP_MASK,	PPC,		{ RT, D, RA } },
{ "l",	     OP(32),	OP_MASK,	POWER,		{ RT, D, RA } },

{ "lwzu",    OP(33),	OP_MASK,	PPC,		{ RT, D, RAL } },
{ "lu",      OP(33),	OP_MASK,	POWER,		{ RT, D, RA } },

{ "lbz",     OP(34),	OP_MASK,	PPC|POWER,	{ RT, D, RA } },

{ "lbzu",    OP(35),	OP_MASK,	PPC|POWER,	{ RT, D, RAL } },

{ "stw",     OP(36),	OP_MASK,	PPC,		{ RS, D, RA } },
{ "st",      OP(36),	OP_MASK,	POWER,		{ RS, D, RA } },

{ "stwu",    OP(37),	OP_MASK,	PPC,		{ RS, D, RAS } },
{ "stu",     OP(37),	OP_MASK,	POWER,		{ RS, D, RA } },

{ "stb",     OP(38),	OP_MASK,	PPC|POWER,	{ RS, D, RA } },

{ "stbu",    OP(39),	OP_MASK,	PPC|POWER,	{ RS, D, RAS } },

{ "lhz",     OP(40),	OP_MASK,	PPC|POWER,	{ RT, D, RA } },

{ "lhzu",    OP(41),	OP_MASK,	PPC|POWER,	{ RT, D, RAL } },

{ "lha",     OP(42),	OP_MASK,	PPC|POWER,	{ RT, D, RA } },

{ "lhau",    OP(43),	OP_MASK,	PPC|POWER,	{ RT, D, RAL } },

{ "sth",     OP(44),	OP_MASK,	PPC|POWER,	{ RS, D, RA } },

{ "sthu",    OP(45),	OP_MASK,	PPC|POWER,	{ RS, D, RAS } },

{ "lmw",     OP(46),	OP_MASK,	PPC,		{ RT, D, RAM } },
{ "lm",      OP(46),	OP_MASK,	POWER,		{ RT, D, RA } },

{ "stmw",    OP(47),	OP_MASK,	PPC,		{ RS, D, RA } },
{ "stm",     OP(47),	OP_MASK,	POWER,		{ RS, D, RA } },

{ "lfs",     OP(48),	OP_MASK,	PPC|POWER,	{ FRT, D, RA } },

{ "lfsu",    OP(49),	OP_MASK,	PPC|POWER,	{ FRT, D, RAS } },

{ "lfd",     OP(50),	OP_MASK,	PPC|POWER,	{ FRT, D, RA } },

{ "lfdu",    OP(51),	OP_MASK,	PPC|POWER,	{ FRT, D, RAS } },

{ "stfs",    OP(52),	OP_MASK,	PPC|POWER,	{ FRS, D, RA } },

{ "stfsu",   OP(53),	OP_MASK,	PPC|POWER,	{ FRS, D, RAS } },

{ "stfd",    OP(54),	OP_MASK,	PPC|POWER,	{ FRS, D, RA } },

{ "stfdu",   OP(55),	OP_MASK,	PPC|POWER,	{ FRS, D, RAS } },

{ "lfq",     OP(56),	OP_MASK,	POWER2,		{ FRT, D, RA } },

{ "lfqu",    OP(57),	OP_MASK,	POWER2,		{ FRT, D, RA } },

{ "ld",      DSO(58,0),	DS_MASK,	PPC|B64,	{ RT, DS, RA } },

{ "ldu",     DSO(58,1), DS_MASK,	PPC|B64,	{ RT, DS, RAL } },

{ "lwa",     DSO(58,2), DS_MASK,	PPC|B64,	{ RT, DS, RA } },

{ "fdivs",   A(59,18,0), AFRC_MASK,	PPC,		{ FRT, FRA, FRB } },
{ "fdivs.",  A(59,18,1), AFRC_MASK,	PPC,		{ FRT, FRA, FRB } },

{ "fsubs",   A(59,20,0), AFRC_MASK,	PPC,		{ FRT, FRA, FRB } },
{ "fsubs.",  A(59,20,1), AFRC_MASK,	PPC,		{ FRT, FRA, FRB } },

{ "fadds",   A(59,21,0), AFRC_MASK,	PPC,		{ FRT, FRA, FRB } },
{ "fadds.",  A(59,21,1), AFRC_MASK,	PPC,		{ FRT, FRA, FRB } },

{ "fsqrts",  A(59,22,0), AFRAFRC_MASK,	PPC,		{ FRT, FRB } },
{ "fsqrts.", A(59,22,1), AFRAFRC_MASK,	PPC,		{ FRT, FRB } },

{ "fres",    A(59,24,0), AFRAFRC_MASK,	PPC,		{ FRT, FRB } },
{ "fres.",   A(59,24,1), AFRAFRC_MASK,	PPC,		{ FRT, FRB } },

{ "fmuls",   A(59,25,0), AFRB_MASK,	PPC,		{ FRT, FRA, FRC } },
{ "fmuls.",  A(59,25,1), AFRB_MASK,	PPC,		{ FRT, FRA, FRC } },

{ "fmsubs",  A(59,28,0), A_MASK,	PPC,		{ FRT,FRA,FRC,FRB } },
{ "fmsubs.", A(59,28,1), A_MASK,	PPC,		{ FRT,FRA,FRC,FRB } },

{ "fmadds",  A(59,29,0), A_MASK,	PPC,		{ FRT,FRA,FRC,FRB } },
{ "fmadds.", A(59,29,1), A_MASK,	PPC,		{ FRT,FRA,FRC,FRB } },

{ "fnmsubs", A(59,30,0), A_MASK,	PPC,		{ FRT,FRA,FRC,FRB } },
{ "fnmsubs.",A(59,30,1), A_MASK,	PPC,		{ FRT,FRA,FRC,FRB } },

{ "fnmadds", A(59,31,0), A_MASK,	PPC,		{ FRT,FRA,FRC,FRB } },
{ "fnmadds.",A(59,31,1), A_MASK,	PPC,		{ FRT,FRA,FRC,FRB } },

{ "stfq",    OP(60),	OP_MASK,	POWER2,		{ FRS, D, RA } },

{ "stfqu",   OP(61),	OP_MASK,	POWER2,		{ FRS, D, RA } },

{ "std",     DSO(62,0),	DS_MASK,	PPC|B64,	{ RS, DS, RA } },

{ "stdu",    DSO(62,1),	DS_MASK,	PPC|B64,	{ RS, DS, RAS } },

{ "fcmpu",   X(63,0),	X_MASK|(3<<21),	PPC|POWER,	{ BF, FRA, FRB } },

{ "frsp",    XRC(63,12,0), XRA_MASK,	PPC|POWER,	{ FRT, FRB } },
{ "frsp.",   XRC(63,12,1), XRA_MASK,	PPC|POWER,	{ FRT, FRB } },

{ "fctiw",   XRC(63,14,0), XRA_MASK,	PPC,		{ FRT, FRB } },
{ "fcir",    XRC(63,14,0), XRA_MASK,	POWER2,		{ FRT, FRB } },
{ "fctiw.",  XRC(63,14,1), XRA_MASK,	PPC,		{ FRT, FRB } },
{ "fcir.",   XRC(63,14,1), XRA_MASK,	POWER2,		{ FRT, FRB } },

{ "fctiwz",  XRC(63,15,0), XRA_MASK,	PPC,		{ FRT, FRB } },
{ "fcirz",   XRC(63,15,0), XRA_MASK,	POWER2,		{ FRT, FRB } },
{ "fctiwz.", XRC(63,15,1), XRA_MASK,	PPC,		{ FRT, FRB } },
{ "fcirz.",  XRC(63,15,1), XRA_MASK,	POWER2,		{ FRT, FRB } },

{ "fdiv",    A(63,18,0), AFRC_MASK,	PPC,		{ FRT, FRA, FRB } },
{ "fd",      A(63,18,0), AFRC_MASK,	POWER,		{ FRT, FRA, FRB } },
{ "fdiv.",   A(63,18,1), AFRC_MASK,	PPC,		{ FRT, FRA, FRB } },
{ "fd.",     A(63,18,1), AFRC_MASK,	POWER,		{ FRT, FRA, FRB } },

{ "fsub",    A(63,20,0), AFRC_MASK,	PPC,		{ FRT, FRA, FRB } },
{ "fs",      A(63,20,0), AFRC_MASK,	POWER,		{ FRT, FRA, FRB } },
{ "fsub.",   A(63,20,1), AFRC_MASK,	PPC,		{ FRT, FRA, FRB } },
{ "fs.",     A(63,20,1), AFRC_MASK,	POWER,		{ FRT, FRA, FRB } },

{ "fadd",    A(63,21,0), AFRC_MASK,	PPC,		{ FRT, FRA, FRB } },
{ "fa",      A(63,21,0), AFRC_MASK,	POWER,		{ FRT, FRA, FRB } },
{ "fadd.",   A(63,21,1), AFRC_MASK,	PPC,		{ FRT, FRA, FRB } },
{ "fa.",     A(63,21,1), AFRC_MASK,	POWER,		{ FRT, FRA, FRB } },

{ "fsqrt",   A(63,22,0), AFRAFRC_MASK,	PPC|POWER2,	{ FRT, FRB } },
{ "fsqrt.",  A(63,22,1), AFRAFRC_MASK,	PPC|POWER2,	{ FRT, FRB } },

{ "fsel",    A(63,23,0), A_MASK,	PPC,		{ FRT,FRA,FRC,FRB } },
{ "fsel.",   A(63,23,1), A_MASK,	PPC,		{ FRT,FRA,FRC,FRB } },

{ "fmul",    A(63,25,0), AFRB_MASK,	PPC,		{ FRT, FRA, FRC } },
{ "fm",      A(63,25,0), AFRB_MASK,	POWER,		{ FRT, FRA, FRC } },
{ "fmul.",   A(63,25,1), AFRB_MASK,	PPC,		{ FRT, FRA, FRC } },
{ "fm.",     A(63,25,1), AFRB_MASK,	POWER,		{ FRT, FRA, FRC } },

{ "frsqrte", A(63,26,0), AFRAFRC_MASK,	PPC,		{ FRT, FRB } },
{ "frsqrte.",A(63,26,1), AFRAFRC_MASK,	PPC,		{ FRT, FRB } },

{ "fmsub",   A(63,28,0), A_MASK,	PPC,		{ FRT,FRA,FRC,FRB } },
{ "fms",     A(63,28,0), A_MASK,	POWER,		{ FRT,FRA,FRC,FRB } },
{ "fmsub.",  A(63,28,1), A_MASK,	PPC,		{ FRT,FRA,FRC,FRB } },
{ "fms.",    A(63,28,1), A_MASK,	POWER,		{ FRT,FRA,FRC,FRB } },

{ "fmadd",   A(63,29,0), A_MASK,	PPC,		{ FRT,FRA,FRC,FRB } },
{ "fma",     A(63,29,0), A_MASK,	POWER,		{ FRT,FRA,FRC,FRB } },
{ "fmadd.",  A(63,29,1), A_MASK,	PPC,		{ FRT,FRA,FRC,FRB } },
{ "fma.",    A(63,29,1), A_MASK,	POWER,		{ FRT,FRA,FRC,FRB } },

{ "fnmsub",  A(63,30,0), A_MASK,	PPC,		{ FRT,FRA,FRC,FRB } },
{ "fnms",    A(63,30,0), A_MASK,	POWER,		{ FRT,FRA,FRC,FRB } },
{ "fnmsub.", A(63,30,1), A_MASK,	PPC,		{ FRT,FRA,FRC,FRB } },
{ "fnms.",   A(63,30,1), A_MASK,	POWER,		{ FRT,FRA,FRC,FRB } },

{ "fnmadd",  A(63,31,0), A_MASK,	PPC,		{ FRT,FRA,FRC,FRB } },
{ "fnma",    A(63,31,0), A_MASK,	POWER,		{ FRT,FRA,FRC,FRB } },
{ "fnmadd.", A(63,31,1), A_MASK,	PPC,		{ FRT,FRA,FRC,FRB } },
{ "fnma.",   A(63,31,1), A_MASK,	POWER,		{ FRT,FRA,FRC,FRB } },

{ "fcmpo",   X(63,30),	X_MASK|(3<<21),	PPC|POWER,	{ BF, FRA, FRB } },

{ "mtfsb1",  XRC(63,38,0), XRARB_MASK,	PPC|POWER,	{ BT } },
{ "mtfsb1.", XRC(63,38,1), XRARB_MASK,	PPC|POWER,	{ BT } },

{ "fneg",    XRC(63,40,0), XRA_MASK,	PPC|POWER,	{ FRT, FRB } },
{ "fneg.",   XRC(63,40,1), XRA_MASK,	PPC|POWER,	{ FRT, FRB } },

{ "mcrfs",   X(63,64),	XRB_MASK|(3<<21)|(3<<16), PPC|POWER, { BF, BFA } },

{ "mtfsb0",  XRC(63,70,0), XRARB_MASK,	PPC|POWER,	{ BT } },
{ "mtfsb0.", XRC(63,70,1), XRARB_MASK,	PPC|POWER,	{ BT } },

{ "fmr",     XRC(63,72,0), XRA_MASK,	PPC|POWER,	{ FRT, FRB } },
{ "fmr.",    XRC(63,72,1), XRA_MASK,	PPC|POWER,	{ FRT, FRB } },

{ "mtfsfi",  XRC(63,134,0), XRA_MASK|(3<<21)|(1<<11), PPC|POWER, { BF, U } },
{ "mtfsfi.", XRC(63,134,1), XRA_MASK|(3<<21)|(1<<11), PPC|POWER, { BF, U } },

{ "fnabs",   XRC(63,136,0), XRA_MASK,	PPC|POWER,	{ FRT, FRB } },
{ "fnabs.",  XRC(63,136,1), XRA_MASK,	PPC|POWER,	{ FRT, FRB } },

{ "fabs",    XRC(63,264,0), XRA_MASK,	PPC|POWER,	{ FRT, FRB } },
{ "fabs.",   XRC(63,264,1), XRA_MASK,	PPC|POWER,	{ FRT, FRB } },

{ "mffs",    XRC(63,583,0), XRARB_MASK,	PPC|POWER,	{ FRT } },
{ "mffs.",   XRC(63,583,1), XRARB_MASK,	PPC|POWER,	{ FRT } },

{ "mtfsf",   XFL(63,711,0), XFL_MASK,	PPC|POWER,	{ FLM, FRB } },
{ "mtfsf.",  XFL(63,711,1), XFL_MASK,	PPC|POWER,	{ FLM, FRB } },

{ "fctid",   XRC(63,814,0), XRA_MASK,	PPC|B64,	{ FRT, FRB } },
{ "fctid.",  XRC(63,814,1), XRA_MASK,	PPC|B64,	{ FRT, FRB } },

{ "fctidz",  XRC(63,815,0), XRA_MASK,	PPC|B64,	{ FRT, FRB } },
{ "fctidz.", XRC(63,815,1), XRA_MASK,	PPC|B64,	{ FRT, FRB } },

{ "fcfid",   XRC(63,846,0), XRA_MASK,	PPC|B64,	{ FRT, FRB } },
{ "fcfid.",  XRC(63,846,1), XRA_MASK,	PPC|B64,	{ FRT, FRB } },

};

const int powerpc_num_opcodes =
  sizeof (powerpc_opcodes) / sizeof (powerpc_opcodes[0]);

/* The macro table.  This is only used by the assembler.  */

const struct powerpc_macro powerpc_macros[] = {
{ "extldi",  4,   PPC|B64,	"rldicr %0,%1,%3,(%2)-1" },
{ "extldi.", 4,   PPC|B64,	"rldicr. %0,%1,%3,(%2)-1" },
{ "extrdi",  4,   PPC|B64,	"rldicl %0,%1,(%2)+(%3),64-(%2)" },
{ "extrdi.", 4,   PPC|B64,	"rldicl. %0,%1,(%2)+(%3),64-(%2)" },
{ "insrdi",  4,   PPC|B64,	"rldimi %0,%1,64-((%2)+(%3)),%3" },
{ "insrdi.", 4,   PPC|B64,	"rldimi. %0,%1,64-((%2)+(%3)),%3" },
{ "rotrdi",  3,   PPC|B64,	"rldicl %0,%1,64-(%2),0" },
{ "rotrdi.", 3,   PPC|B64,	"rldicl. %0,%1,64-(%2),0" },
{ "sldi",    3,   PPC|B64,	"rldicr %0,%1,%2,63-(%2)" },
{ "sldi.",   3,   PPC|B64,	"rldicr. %0,%1,%2,63-(%2)" },
{ "srdi",    3,   PPC|B64,	"rldicl %0,%1,64-(%2),%2" },
{ "srdi.",   3,   PPC|B64,	"rldicl. %0,%1,64-(%2),%2" },
{ "clrrdi",  3,   PPC|B64,	"rldicr %0,%1,0,63-(%2)" },
{ "clrrdi.", 3,   PPC|B64,	"rldicr. %0,%1,0,63-(%2)" },
{ "clrlsldi",4,   PPC|B64,	"rldic %0,%1,%3,(%2)-(%3)" },
{ "clrlsldi.",4,  PPC|B64,	"rldic. %0,%1,%3,(%2)-(%3)" },

{ "extlwi",  4,   PPC,		"rlwinm %0,%1,%3,0,(%2)-1" },
{ "extlwi.", 4,   PPC,		"rlwinm. %0,%1,%3,0,(%2)-1" },
{ "extrwi",  4,   PPC,		"rlwinm %0,%1,(%2)+(%3),32-(%2),31" },
{ "extrwi.", 4,   PPC,		"rlwinm. %0,%1,(%2)+(%3),32-(%2),31" },
{ "inslwi",  4,   PPC,		"rlwimi %0,%1,32-(%3),%3,(%2)+(%3)-1" },
{ "inslwi.", 4,   PPC,		"rlwimi. %0,%1,32-(%3),%3,(%2)+(%3)-1" },
{ "insrwi",  4,   PPC,		"rlwimi %0,%1,32-((%2)+(%3)),%3,(%2)+(%3)-1" },
{ "insrwi.", 4,   PPC,		"rlwimi. %0,%1,32-((%2)+(%3)),%3,(%2)+(%3)-1"},
{ "rotrwi",  3,   PPC,		"rlwinm %0,%1,32-(%2),0,31" },
{ "rotrwi.", 3,   PPC,		"rlwinm. %0,%1,32-(%2),0,31" },
{ "slwi",    3,   PPC,		"rlwinm %0,%1,%2,0,31-(%2)" },
{ "sli",     3,   POWER,	"rlinm %0,%1,%2,0,31-(%2)" },
{ "slwi.",   3,   PPC,		"rlwinm. %0,%1,%2,0,31-(%2)" },
{ "sli.",    3,   POWER,	"rlinm. %0,%1,%2,0,31-(%2)" },
{ "srwi",    3,   PPC,		"rlwinm %0,%1,32-(%2),%2,31" },
{ "sri",     3,   POWER,	"rlinm %0,%1,32-(%2),%2,31" },
{ "srwi.",   3,   PPC,		"rlwinm. %0,%1,32-(%2),%2,31" },
{ "sri.",    3,   POWER,	"rlinm. %0,%1,32-(%2),%2,31" },
{ "clrrwi",  3,   PPC,		"rlwinm %0,%1,0,0,31-(%2)" },
{ "clrrwi.", 3,   PPC,		"rlwinm. %0,%1,0,0,31-(%2)" },
{ "clrlslwi",4,   PPC,		"rlwinm %0,%1,%3,(%2)-(%3),31-(%3)" },
{ "clrlslwi.",4,  PPC,		"rlwinm. %0,%1,%3,(%2)-(%3),31-(%3)" },

};

const int powerpc_num_macros =
  sizeof (powerpc_macros) / sizeof (powerpc_macros[0]);
/*
 * BK Id: SCCS/s.ppc.h 1.5 05/17/01 18:14:23 cort
 */
/* ppc.h -- Header file for PowerPC opcode table
   Copyright 1994 Free Software Foundation, Inc.
   Written by Ian Lance Taylor, Cygnus Support

This file is part of GDB, GAS, and the GNU binutils.

GDB, GAS, and the GNU binutils are free software; you can redistribute
them and/or modify them under the terms of the GNU General Public
License as published by the Free Software Foundation; either version
1, or (at your option) any later version.

GDB, GAS, and the GNU binutils are distributed in the hope that they
will be useful, but WITHOUT ANY WARRANTY; without even the implied
warranty of MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See
the GNU General Public License for more details.

You should have received a copy of the GNU General Public License
along with this file; see the file COPYING.  If not, write to the Free
Software Foundation, 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA.  */

#ifndef PPC_H
#define PPC_H

/* The opcode table is an array of struct powerpc_opcode.  */

struct powerpc_opcode
{
  /* The opcode name.  */
  const char *name;

  /* The opcode itself.  Those bits which will be filled in with
     operands are zeroes.  */
  unsigned long opcode;

  /* The opcode mask.  This is used by the disassembler.  This is a
     mask containing ones indicating those bits which must match the
     opcode field, and zeroes indicating those bits which need not
     match (and are presumably filled in by operands).  */
  unsigned long mask;

  /* One bit flags for the opcode.  These are used to indicate which
     specific processors support the instructions.  The defined values
     are listed below.  */
  unsigned long flags;

  /* An array of operand codes.  Each code is an index into the
     operand table.  They appear in the order which the operands must
     appear in assembly code, and are terminated by a zero.  */
  unsigned char operands[8];
};

/* The table itself is sorted by major opcode number, and is otherwise
   in the order in which the disassembler should consider
   instructions.  */
extern const struct powerpc_opcode powerpc_opcodes[];
extern const int powerpc_num_opcodes;

/* Values defined for the flags field of a struct powerpc_opcode.  */

/* Opcode is defined for the PowerPC architecture.  */
#define PPC_OPCODE_PPC (01)

/* Opcode is defined for the POWER (RS/6000) architecture.  */
#define PPC_OPCODE_POWER (02)

/* Opcode is defined for the POWER2 (Rios 2) architecture.  */
#define PPC_OPCODE_POWER2 (04)

/* Opcode is only defined on 32 bit architectures.  */
#define PPC_OPCODE_32 (010)

/* Opcode is only defined on 64 bit architectures.  */
#define PPC_OPCODE_64 (020)

/* Opcode is supported by the Motorola PowerPC 601 processor.  The 601
   is assumed to support all PowerPC (PPC_OPCODE_PPC) instructions,
   but it also supports many additional POWER instructions.  */
#define PPC_OPCODE_601 (040)

/* A macro to extract the major opcode from an instruction.  */
#define PPC_OP(i) (((i) >> 26) & 0x3f)

/* The operands table is an array of struct powerpc_operand.  */

struct powerpc_operand
{
  /* The number of bits in the operand.  */
  int bits;

  /* How far the operand is left shifted in the instruction.  */
  int shift;

  /* Insertion function.  This is used by the assembler.  To insert an
     operand value into an instruction, check this field.

     If it is NULL, execute
         i |= (op & ((1 << o->bits) - 1)) << o->shift;
     (i is the instruction which we are filling in, o is a pointer to
     this structure, and op is the opcode value; this assumes twos
     complement arithmetic).

     If this field is not NULL, then simply call it with the
     instruction and the operand value.  It will return the new value
     of the instruction.  If the ERRMSG argument is not NULL, then if
     the operand value is illegal, *ERRMSG will be set to a warning
     string (the operand will be inserted in any case).  If the
     operand value is legal, *ERRMSG will be unchanged (most operands
     can accept any value).  */
  unsigned long (*insert) PARAMS ((unsigned long instruction, long op,
				   const char **errmsg));

  /* Extraction function.  This is used by the disassembler.  To
     extract this operand type from an instruction, check this field.

     If it is NULL, compute
         op = ((i) >> o->shift) & ((1 << o->bits) - 1);
	 if ((o->flags & PPC_OPERAND_SIGNED) != 0
	     && (op & (1 << (o->bits - 1))) != 0)
	   op -= 1 << o->bits;
     (i is the instruction, o is a pointer to this structure, and op
     is the result; this assumes twos complement arithmetic).

     If this field is not NULL, then simply call it with the
     instruction value.  It will return the value of the operand.  If
     the INVALID argument is not NULL, *INVALID will be set to
     non-zero if this operand type can not actually be extracted from
     this operand (i.e., the instruction does not match).  If the
     operand is valid, *INVALID will not be changed.  */
  long (*extract) PARAMS ((unsigned long instruction, int *invalid));

  /* One bit syntax flags.  */
  unsigned long flags;
};

/* Elements in the table are retrieved by indexing with values from
   the operands field of the powerpc_opcodes table.  */

extern const struct powerpc_operand powerpc_operands[];

/* Values defined for the flags field of a struct powerpc_operand.  */

/* This operand takes signed values.  */
#define PPC_OPERAND_SIGNED (01)

/* This operand takes signed values, but also accepts a full positive
   range of values when running in 32 bit mode.  That is, if bits is
   16, it takes any value from -0x8000 to 0xffff.  In 64 bit mode,
   this flag is ignored.  */
#define PPC_OPERAND_SIGNOPT (02)

/* This operand does not actually exist in the assembler input.  This
   is used to support extended mnemonics such as mr, for which two
   operands fields are identical.  The assembler should call the
   insert function with any op value.  The disassembler should call
   the extract function, ignore the return value, and check the value
   placed in the valid argument.  */
#define PPC_OPERAND_FAKE (04)

/* The next operand should be wrapped in parentheses rather than
   separated from this one by a comma.  This is used for the load and
   store instructions which want their operands to look like
       reg,displacement(reg)
   */
#define PPC_OPERAND_PARENS (010)

/* This operand may use the symbolic names for the CR fields, which
   are
       lt  0	gt  1	eq  2	so  3	un  3
       cr0 0	cr1 1	cr2 2	cr3 3
       cr4 4	cr5 5	cr6 6	cr7 7
   These may be combined arithmetically, as in cr2*4+gt.  These are
   only supported on the PowerPC, not the POWER.  */
#define PPC_OPERAND_CR (020)

/* This operand names a register.  The disassembler uses this to print
   register names with a leading 'r'.  */
#define PPC_OPERAND_GPR (040)

/* This operand names a floating point register.  The disassembler
   prints these with a leading 'f'.  */
#define PPC_OPERAND_FPR (0100)

/* This operand is a relative branch displacement.  The disassembler
   prints these symbolically if possible.  */
#define PPC_OPERAND_RELATIVE (0200)

/* This operand is an absolute branch address.  The disassembler
   prints these symbolically if possible.  */
#define PPC_OPERAND_ABSOLUTE (0400)

/* This operand is optional, and is zero if omitted.  This is used for
   the optional BF and L fields in the comparison instructions.  The
   assembler must count the number of operands remaining on the line,
   and the number of operands remaining for the opcode, and decide
   whether this operand is present or not.  The disassembler should
   print this operand out only if it is not zero.  */
#define PPC_OPERAND_OPTIONAL (01000)

/* This flag is only used with PPC_OPERAND_OPTIONAL.  If this operand
   is omitted, then for the next operand use this operand value plus
   1, ignoring the next operand field for the opcode.  This wretched
   hack is needed because the Power rotate instructions can take
   either 4 or 5 operands.  The disassembler should print this operand
   out regardless of the PPC_OPERAND_OPTIONAL field.  */
#define PPC_OPERAND_NEXT (02000)

/* This operand should be regarded as a negative number for the
   purposes of overflow checking (i.e., the normal most negative
   number is disallowed and one more than the normal most positive
   number is allowed).  This flag will only be set for a signed
   operand.  */
#define PPC_OPERAND_NEGATIVE (04000)

/* The POWER and PowerPC assemblers use a few macros.  We keep them
   with the operands table for simplicity.  The macro table is an
   array of struct powerpc_macro.  */

struct powerpc_macro
{
  /* The macro name.  */
  const char *name;

  /* The number of operands the macro takes.  */
  unsigned int operands;

  /* One bit flags for the opcode.  These are used to indicate which
     specific processors support the instructions.  The values are the
     same as those for the struct powerpc_opcode flags field.  */
  unsigned long flags;

  /* A format string to turn the macro into a normal instruction.
     Each %N in the string is replaced with operand number N (zero
     based).  */
  const char *format;
};

extern const struct powerpc_macro powerpc_macros[];
extern const int powerpc_num_macros;

#endif /* PPC_H */
/*
 * BK Id: SCCS/s.privinst.h 1.5 05/17/01 18:14:23 cort
 */
/*
 * Copyright (C) 1996 Paul Mackerras.
 */
#include <linux/config.h>

#define GETREG(reg)		\
    static inline int get_ ## reg (void)	\
	{ int ret; asm volatile ("mf" #reg " %0" : "=r" (ret) :); return ret; }

#define SETREG(reg)		\
    static inline void set_ ## reg (int val)	\
	{ asm volatile ("mt" #reg " %0" : : "r" (val)); }

GETREG(msr)
SETREG(msr)
GETREG(cr)

#define GSETSPR(n, name)	\
    static inline int get_ ## name (void) \
	{ int ret; asm volatile ("mfspr %0," #n : "=r" (ret) : ); return ret; } \
    static inline void set_ ## name (int val) \
	{ asm volatile ("mtspr " #n ",%0" : : "r" (val)); }

GSETSPR(0, mq)
GSETSPR(1, xer)
GSETSPR(4, rtcu)
GSETSPR(5, rtcl)
GSETSPR(8, lr)
GSETSPR(9, ctr)
GSETSPR(18, dsisr)
GSETSPR(19, dar)
GSETSPR(22, dec)
GSETSPR(25, sdr1)
GSETSPR(26, srr0)
GSETSPR(27, srr1)
GSETSPR(272, sprg0)
GSETSPR(273, sprg1)
GSETSPR(274, sprg2)
GSETSPR(275, sprg3)
GSETSPR(282, ear)
GSETSPR(287, pvr)
#ifndef CONFIG_8xx
GSETSPR(528, bat0u)
GSETSPR(529, bat0l)
GSETSPR(530, bat1u)
GSETSPR(531, bat1l)
GSETSPR(532, bat2u)
GSETSPR(533, bat2l)
GSETSPR(534, bat3u)
GSETSPR(535, bat3l)
GSETSPR(1008, hid0)
GSETSPR(1009, hid1)
GSETSPR(1010, iabr)
GSETSPR(1013, dabr)
GSETSPR(1023, pir)
#else
GSETSPR(144, cmpa)
GSETSPR(145, cmpb)
GSETSPR(146, cmpc)
GSETSPR(147, cmpd)
GSETSPR(158, ictrl)
#endif

static inline int get_sr(int n)
{
    int ret;

    asm (" mfsrin %0,%1" : "=r" (ret) : "r" (n << 28));
    return ret;
}

static inline void set_sr(int n, int val)
{
    asm ("mtsrin %0,%1" : : "r" (val), "r" (n << 28));
}

static inline void store_inst(void *p)
{
    asm volatile ("dcbst 0,%0; sync; icbi 0,%0; isync" : : "r" (p));
}

static inline void cflush(void *p)
{
    asm volatile ("dcbf 0,%0; icbi 0,%0" : : "r" (p));
}

static inline void cinval(void *p)
{
    asm volatile ("dcbi 0,%0; icbi 0,%0" : : "r" (p));
}

/*
 * BK Id: SCCS/s.setjmp.c 1.5 05/17/01 18:14:23 cort
 */
/*
 * Copyright (C) 1996 Paul Mackerras.
 *
 * NB this file must be compiled with -O2.
 */

int
xmon_setjmp(long *buf)
{
    asm ("mflr 0; stw 0,0(%0);"
	 "stw 1,4(%0); stw 2,8(%0);"
	 "mfcr 0; stw 0,12(%0);"
	 "stmw 13,16(%0)"
	 : : "r" (buf));
    /* XXX should save fp regs as well */
    return 0;
}

void
xmon_longjmp(long *buf, int val)
{
    if (val == 0)
	val = 1;
    asm ("lmw 13,16(%0);"
	 "lwz 0,12(%0); mtcrf 0x38,0;"
	 "lwz 0,0(%0); lwz 1,4(%0); lwz 2,8(%0);"
	 "mtlr 0; mr 3,%1"
	 : : "r" (buf), "r" (val));
}
/*
 * BK Id: SCCS/s.start.c 1.18 12/01/01 20:09:07 benh
 */
/*
 * Copyright (C) 1996 Paul Mackerras.
 */
#include <linux/config.h>
#include <linux/string.h>
#include <asm/machdep.h>
#include <asm/io.h>
#include <asm/page.h>
#include <linux/adb.h>
#include <linux/pmu.h>
#include <linux/cuda.h>
#include <linux/kernel.h>
#include <linux/errno.h>
#include <asm/prom.h>
#include <asm/bootx.h>
#include <asm/machdep.h>
#include <asm/pmac_feature.h>
#include <asm/processor.h>
#include <asm/delay.h>
#include <asm/btext.h>
#ifdef CONFIG_SMP
#include <asm/bitops.h>
#endif

static volatile unsigned char *sccc, *sccd;
unsigned long TXRDY, RXRDY;
extern void xmon_printf(const char *fmt, ...);
static int xmon_expect(const char *str, unsigned int timeout);

static int console;
static int use_screen;
static int via_modem;
static int xmon_use_sccb;
static struct device_node *channel_node;

#define TB_SPEED	25000000

static inline unsigned int readtb(void)
{
	unsigned int ret;

	asm volatile("mftb %0" : "=r" (ret) :);
	return ret;
}

void buf_access(void)
{
	if ( _machine == _MACH_chrp )
		sccd[3] &= ~0x80;	/* reset DLAB */
}

extern int adb_init(void);

void
xmon_map_scc(void)
{
#ifdef CONFIG_ALL_PPC
	volatile unsigned char *base;

	use_screen = 0;
	
	if (_machine == _MACH_Pmac) {
		struct device_node *np;
		unsigned long addr;
#ifdef CONFIG_BOOTX_TEXT
		if (!machine_is_compatible("iMac")) {
			extern boot_infos_t *disp_bi;

			/* see if there is a keyboard in the device tree
			   with a parent of type "adb" */
			for (np = find_devices("keyboard"); np; np = np->next)
				if (np->parent && np->parent->type
				    && strcmp(np->parent->type, "adb") == 0)
					break;

			/* needs to be hacked if xmon_printk is to be used
			   from within find_via_pmu() */
#ifdef CONFIG_ADB_PMU
			if (np != NULL && disp_bi && find_via_pmu())
				use_screen = 1;
#endif
#ifdef CONFIG_ADB_CUDA
			if (np != NULL && disp_bi && find_via_cuda())
				use_screen = 1;
#endif
		}
		if (!use_screen && (np = find_devices("escc")) != NULL) {
			/*
			 * look for the device node for the serial port
			 * we're using and see if it says it has a modem
			 */
			char *name = xmon_use_sccb? "ch-b": "ch-a";
			char *slots;
			int l;

			np = np->child;
			while (np != NULL && strcmp(np->name, name) != 0)
				np = np->sibling;
			if (np != NULL) {
				/* XXX should parse this properly */
				channel_node = np;
				slots = get_property(np, "slot-names", &l);
				if (slots != NULL && l >= 10
				    && strcmp(slots+4, "Modem") == 0)
					via_modem = 1;
			}
		}
		btext_drawstring("xmon uses ");
		if (use_screen)
			btext_drawstring("screen and keyboard\n");
		else {
			if (via_modem)
				btext_drawstring("modem on ");
			btext_drawstring(xmon_use_sccb? "printer": "modem");
			btext_drawstring(" port\n");
		}

#endif /* CONFIG_BOOTX_TEXT */

#ifdef CHRP_ESCC
		addr = 0xc1013020;
#else
		addr = 0xf3013020;
#endif
		TXRDY = 4;
		RXRDY = 1;
		
		np = find_devices("mac-io");
		if (np && np->n_addrs)
			addr = np->addrs[0].address + 0x13020;
		base = (volatile unsigned char *) ioremap(addr & PAGE_MASK, PAGE_SIZE);
		sccc = base + (addr & ~PAGE_MASK);
		sccd = sccc + 0x10;
	}
	else
	{
		/* should already be mapped by the kernel boot */
		sccc = (volatile unsigned char *) (isa_io_base + 0x3fd);
		sccd = (volatile unsigned char *) (isa_io_base + 0x3f8);
		if (xmon_use_sccb) {
			sccc -= 0x100;
			sccd -= 0x100;
		}
		TXRDY = 0x20;
		RXRDY = 1;
	}
#elif defined(CONFIG_GEMINI)
	/* should already be mapped by the kernel boot */
	sccc = (volatile unsigned char *) 0xffeffb0d;
	sccd = (volatile unsigned char *) 0xffeffb08;
	TXRDY = 0x20;
	RXRDY = 1;
	console = 1;
#endif /* platform */
}

static int scc_initialized = 0;

void xmon_init_scc(void);
extern void pmu_poll(void);
extern void cuda_poll(void);

static inline void do_poll_adb(void)
{
#ifdef CONFIG_ADB_PMU
	if (sys_ctrler == SYS_CTRLER_PMU)
		pmu_poll();
#endif /* CONFIG_ADB_PMU */
#ifdef CONFIG_ADB_CUDA
	if (sys_ctrler == SYS_CTRLER_CUDA)
		cuda_poll();
#endif /* CONFIG_ADB_CUDA */
}

int
xmon_write(void *handle, void *ptr, int nb)
{
	char *p = ptr;
	int i, c, ct;

#ifdef CONFIG_SMP
	static unsigned long xmon_write_lock;
	int lock_wait = 1000000;
	int locked;

	while ((locked = test_and_set_bit(0, &xmon_write_lock)) != 0)
		if (--lock_wait == 0)
			break;
#endif

#ifdef CONFIG_BOOTX_TEXT
	if (use_screen) {
		/* write it on the screen */
		for (i = 0; i < nb; ++i)
			btext_drawchar(*p++);
		goto out;
	}
#endif
	if (!scc_initialized)
		xmon_init_scc();
	ct = 0;
	for (i = 0; i < nb; ++i) {
		while ((*sccc & TXRDY) == 0)
			do_poll_adb();
		c = p[i];
		if (c == '\n' && !ct) {
			c = '\r';
			ct = 1;
			--i;
		} else {
			if (console)
				printk("%c", c);
			ct = 0;
		}
		buf_access();
		*sccd = c;
		eieio();
	}

 out:
#ifdef CONFIG_SMP
	if (!locked)
		clear_bit(0, &xmon_write_lock);
#endif
	return nb;
}

int xmon_wants_key;
int xmon_adb_keycode;

#ifdef CONFIG_BOOTX_TEXT
static int xmon_adb_shiftstate;

static unsigned char xmon_keytab[128] =
	"asdfhgzxcv\000bqwer"				/* 0x00 - 0x0f */
	"yt123465=97-80]o"				/* 0x10 - 0x1f */
	"u[ip\rlj'k;\\,/nm."				/* 0x20 - 0x2f */
	"\t `\177\0\033\0\0\0\0\0\0\0\0\0\0"		/* 0x30 - 0x3f */
	"\0.\0*\0+\0\0\0\0\0/\r\0-\0"			/* 0x40 - 0x4f */
	"\0\0000123456789\0\0\0";			/* 0x50 - 0x5f */

static unsigned char xmon_shift_keytab[128] =
	"ASDFHGZXCV\000BQWER"				/* 0x00 - 0x0f */
	"YT!@#$^%+(&_*)}O"				/* 0x10 - 0x1f */
	"U{IP\rLJ\"K:|<?NM>"				/* 0x20 - 0x2f */
	"\t ~\177\0\033\0\0\0\0\0\0\0\0\0\0"		/* 0x30 - 0x3f */
	"\0.\0*\0+\0\0\0\0\0/\r\0-\0"			/* 0x40 - 0x4f */
	"\0\0000123456789\0\0\0";			/* 0x50 - 0x5f */

static int
xmon_get_adb_key(void)
{
	int k, t, on;

	xmon_wants_key = 1;
	for (;;) {
		xmon_adb_keycode = -1;
		t = 0;
		on = 0;
		do {
			if (--t < 0) {
				on = 1 - on;
				btext_drawchar(on? 0xdb: 0x20);
				btext_drawchar('\b');
				t = 200000;
			}
			do_poll_adb();
		} while (xmon_adb_keycode == -1);
		k = xmon_adb_keycode;
		if (on)
			btext_drawstring(" \b");

		/* test for shift keys */
		if ((k & 0x7f) == 0x38 || (k & 0x7f) == 0x7b) {
			xmon_adb_shiftstate = (k & 0x80) == 0;
			continue;
		}
		if (k >= 0x80)
			continue;	/* ignore up transitions */
		k = (xmon_adb_shiftstate? xmon_shift_keytab: xmon_keytab)[k];
		if (k != 0)
			break;
	}
	xmon_wants_key = 0;
	return k;
}
#endif /* CONFIG_BOOTX_TEXT */

int
xmon_read(void *handle, void *ptr, int nb)
{
    char *p = ptr;
    int i;

#ifdef CONFIG_BOOTX_TEXT
    if (use_screen) {
	for (i = 0; i < nb; ++i)
	    *p++ = xmon_get_adb_key();
	return i;
    }
#endif
    if (!scc_initialized)
	xmon_init_scc();
    for (i = 0; i < nb; ++i) {
	while ((*sccc & RXRDY) == 0)
	    do_poll_adb();
	buf_access();
	*p++ = *sccd;
    }
    return i;
}

int
xmon_read_poll(void)
{
	if ((*sccc & RXRDY) == 0) {
		do_poll_adb();
		return -1;
	}
	buf_access();
	return *sccd;
}

static unsigned char scc_inittab[] = {
    13, 0,		/* set baud rate divisor */
    12, 1,
    14, 1,		/* baud rate gen enable, src=rtxc */
    11, 0x50,		/* clocks = br gen */
    5,  0xea,		/* tx 8 bits, assert DTR & RTS */
    4,  0x46,		/* x16 clock, 1 stop */
    3,  0xc1,		/* rx enable, 8 bits */
};

void
xmon_init_scc()
{
	if ( _machine == _MACH_chrp )
	{
		sccd[3] = 0x83; eieio();	/* LCR = 8N1 + DLAB */
		sccd[0] = 12; eieio();		/* DLL = 9600 baud */
		sccd[1] = 0; eieio();
		sccd[2] = 0; eieio();		/* FCR = 0 */
		sccd[3] = 3; eieio();		/* LCR = 8N1 */
		sccd[1] = 0; eieio();		/* IER = 0 */
	}
	else if ( _machine == _MACH_Pmac )
	{
		int i, x;

		if (channel_node != 0)
			pmac_call_feature(
				PMAC_FTR_SCC_ENABLE,
				channel_node,
				PMAC_SCC_ASYNC | PMAC_SCC_FLAG_XMON, 1);
			printk(KERN_INFO "Serial port locked ON by debugger !\n");
		if (via_modem && channel_node != 0) {
			unsigned int t0;

			pmac_call_feature(
				PMAC_FTR_MODEM_ENABLE,
				channel_node, 0, 1);
			printk(KERN_INFO "Modem powered up by debugger !\n");
			t0 = readtb();
			while (readtb() - t0 < 3*TB_SPEED)
				eieio();
		}
		/* use the B channel if requested */
		if (xmon_use_sccb) {
			sccc = (volatile unsigned char *)
				((unsigned long)sccc & ~0x20);
			sccd = sccc + 0x10;
		}
		for (i = 20000; i != 0; --i) {
			x = *sccc; eieio();
		}
		*sccc = 9; eieio();		/* reset A or B side */
		*sccc = ((unsigned long)sccc & 0x20)? 0x80: 0x40; eieio();
		for (i = 0; i < sizeof(scc_inittab); ++i) {
			*sccc = scc_inittab[i];
			eieio();
		}
	}
	scc_initialized = 1;
	if (via_modem) {
		for (;;) {
			xmon_write(0, "ATE1V1\r", 7);
			if (xmon_expect("OK", 5)) {
				xmon_write(0, "ATA\r", 4);
				if (xmon_expect("CONNECT", 40))
					break;
			}
			xmon_write(0, "+++", 3);
			xmon_expect("OK", 3);
		}
	}
}

#if 0
extern int (*prom_entry)(void *);

int
xmon_exit(void)
{
    struct prom_args {
	char *service;
    } args;

    for (;;) {
	args.service = "exit";
	(*prom_entry)(&args);
    }
}
#endif

void *xmon_stdin;
void *xmon_stdout;
void *xmon_stderr;

void
xmon_init(void)
{
}

int
xmon_putc(int c, void *f)
{
    char ch = c;

    if (c == '\n')
	xmon_putc('\r', f);
    return xmon_write(f, &ch, 1) == 1? c: -1;
}

int
xmon_putchar(int c)
{
    return xmon_putc(c, xmon_stdout);
}

int
xmon_fputs(char *str, void *f)
{
    int n = strlen(str);

    return xmon_write(f, str, n) == n? 0: -1;
}

int
xmon_readchar(void)
{
    char ch;

    for (;;) {
	switch (xmon_read(xmon_stdin, &ch, 1)) {
	case 1:
	    return ch;
	case -1:
	    xmon_printf("read(stdin) returned -1\r\n", 0, 0);
	    return -1;
	}
    }
}

static char line[256];
static char *lineptr;
static int lineleft;

int xmon_expect(const char *str, unsigned int timeout)
{
	int c;
	unsigned int t0;

	timeout *= TB_SPEED;
	t0 = readtb();
	do {
		lineptr = line;
		for (;;) {
			c = xmon_read_poll();
			if (c == -1) {
				if (readtb() - t0 > timeout)
					return 0;
				continue;
			}
			if (c == '\n')
				break;
			if (c != '\r' && lineptr < &line[sizeof(line) - 1])
				*lineptr++ = c;
		}
		*lineptr = 0;
	} while (strstr(line, str) == NULL);
	return 1;
}

int
xmon_getchar(void)
{
    int c;

    if (lineleft == 0) {
	lineptr = line;
	for (;;) {
	    c = xmon_readchar();
	    if (c == -1 || c == 4)
		break;
	    if (c == '\r' || c == '\n') {
		*lineptr++ = '\n';
		xmon_putchar('\n');
		break;
	    }
	    switch (c) {
	    case 0177:
	    case '\b':
		if (lineptr > line) {
		    xmon_putchar('\b');
		    xmon_putchar(' ');
		    xmon_putchar('\b');
		    --lineptr;
		}
		break;
	    case 'U' & 0x1F:
		while (lineptr > line) {
		    xmon_putchar('\b');
		    xmon_putchar(' ');
		    xmon_putchar('\b');
		    --lineptr;
		}
		break;
	    default:
		if (lineptr >= &line[sizeof(line) - 1])
		    xmon_putchar('\a');
		else {
		    xmon_putchar(c);
		    *lineptr++ = c;
		}
	    }
	}
	lineleft = lineptr - line;
	lineptr = line;
    }
    if (lineleft == 0)
	return -1;
    --lineleft;
    return *lineptr++;
}

char *
xmon_fgets(char *str, int nb, void *f)
{
    char *p;
    int c;

    for (p = str; p < str + nb - 1; ) {
	c = xmon_getchar();
	if (c == -1) {
	    if (p == str)
		return 0;
	    break;
	}
	*p++ = c;
	if (c == '\n')
	    break;
    }
    *p = 0;
    return str;
}

void
xmon_enter(void)
{
#ifdef CONFIG_ADB_PMU
	if (_machine == _MACH_Pmac) {
		pmu_suspend();
	}
#endif
}

void
xmon_leave(void)
{
#ifdef CONFIG_ADB_PMU
	if (_machine == _MACH_Pmac) {
		pmu_resume();
	}
#endif
}
/*
 * BK Id: SCCS/s.subr_prf.c 1.8 12/01/01 20:09:07 benh
 */
/*
 * Written by Cort Dougan to replace the version originally used
 * by Paul Mackerras, which came from NetBSD and thus had copyright
 * conflicts with Linux.
 *
 * This file makes liberal use of the standard linux utility
 * routines to reduce the size of the binary.  We assume we can
 * trust some parts of Linux inside the debugger.
 *   -- Cort (cort@cs.nmt.edu)
 *
 * Copyright (C) 1999 Cort Dougan.
 */

#include <linux/kernel.h>
#include <linux/string.h>
#include <stdarg.h>
#include "nonstdio.h"

extern int xmon_write(void *, void *, int);

void
xmon_vfprintf(void *f, const char *fmt, va_list ap)
{
	static char xmon_buf[2048];
	int n;

	n = vsprintf(xmon_buf, fmt, ap);
	xmon_write(f, xmon_buf, n);
}

void
xmon_printf(const char *fmt, ...)
{
	va_list ap;

	va_start(ap, fmt);
	xmon_vfprintf(stdout, fmt, ap);
	va_end(ap);
}

void
xmon_fprintf(void *f, const char *fmt, ...)
{
	va_list ap;

	va_start(ap, fmt);
	xmon_vfprintf(f, fmt, ap);
	va_end(ap);
}

void
xmon_puts(char *s)
{
	xmon_write(stdout, s, strlen(s));
}
/*
 * BK Id: SCCS/s.xmon.c 1.18 12/01/01 20:09:07 benh
 */
/*
 * Routines providing a simple monitor for use on the PowerMac.
 *
 * Copyright (C) 1996 Paul Mackerras.
 */
#include <linux/config.h>
#include <linux/errno.h>
#include <linux/sched.h>
#include <linux/smp.h>
#include <asm/ptrace.h>
#include <asm/string.h>
#include <asm/prom.h>
#include <asm/bitops.h>
#include "nonstdio.h"
#include "privinst.h"

#define scanhex	xmon_scanhex
#define skipbl	xmon_skipbl

#ifdef CONFIG_SMP
static unsigned long cpus_in_xmon = 0;
static unsigned long got_xmon = 0;
static volatile int take_xmon = -1;
#endif /* CONFIG_SMP */

static unsigned adrs;
static int size = 1;
static unsigned ndump = 64;
static unsigned nidump = 16;
static unsigned ncsum = 4096;
static int termch;

static u_int bus_error_jmp[100];
#define setjmp xmon_setjmp
#define longjmp xmon_longjmp

/* Breakpoint stuff */
struct bpt {
	unsigned address;
	unsigned instr;
	unsigned count;
	unsigned char enabled;
};

#define NBPTS	16
static struct bpt bpts[NBPTS];
static struct bpt dabr;
static struct bpt iabr;
static unsigned bpinstr = 0x7fe00008;	/* trap */

/* Prototypes */
extern void (*debugger_fault_handler)(struct pt_regs *);
static int cmds(struct pt_regs *);
static int mread(unsigned, void *, int);
static int mwrite(unsigned, void *, int);
static void handle_fault(struct pt_regs *);
static void byterev(unsigned char *, int);
static void memex(void);
static int bsesc(void);
static void dump(void);
static void prdump(unsigned, int);
#ifdef __MWERKS__
static void prndump(unsigned, int);
static int nvreadb(unsigned);
#endif
static int ppc_inst_dump(unsigned, int);
void print_address(unsigned);
static int getsp(void);
static void dump_hash_table(void);
static void backtrace(struct pt_regs *);
static void excprint(struct pt_regs *);
static void prregs(struct pt_regs *);
static void memops(int);
static void memlocate(void);
static void memzcan(void);
static void memdiffs(unsigned char *, unsigned char *, unsigned, unsigned);
int skipbl(void);
int scanhex(unsigned *valp);
static void scannl(void);
static int hexdigit(int);
void getstring(char *, int);
static void flush_input(void);
static int inchar(void);
static void take_input(char *);
/* static void openforth(void); */
static unsigned read_spr(int);
static void write_spr(int, unsigned);
static void super_regs(void);
static void print_sysmap(void);
static void sysmap_lookup(void);
static void remove_bpts(void);
static void insert_bpts(void);
static struct bpt *at_breakpoint(unsigned pc);
static void bpt_cmds(void);
static void cacheflush(void);
#ifdef CONFIG_SMP
static void cpu_cmd(void);
#endif /* CONFIG_SMP */
static int pretty_print_addr(unsigned long addr);
static void csum(void);

extern int print_insn_big_powerpc(FILE *, unsigned long, unsigned);
extern void printf(const char *fmt, ...);
extern int putchar(int ch);
extern int setjmp(u_int *);
extern void longjmp(u_int *, int);

extern void xmon_enter(void);
extern void xmon_leave(void);
extern char* xmon_find_symbol(unsigned long addr, unsigned long* saddr);
extern unsigned long xmon_symbol_to_addr(char* symbol);

#define GETWORD(v)	(((v)[0] << 24) + ((v)[1] << 16) + ((v)[2] << 8) + (v)[3])

#define isxdigit(c)	(('0' <= (c) && (c) <= '9') \
			 || ('a' <= (c) && (c) <= 'f') \
			 || ('A' <= (c) && (c) <= 'F'))
#define isalnum(c)	(('0' <= (c) && (c) <= '9') \
			 || ('a' <= (c) && (c) <= 'z') \
			 || ('A' <= (c) && (c) <= 'Z'))
#define isspace(c)	(c == ' ' || c == '\t' || c == 10 || c == 13 || c == 0)

static char *help_string = "\
Commands:\n\
  d	dump bytes\n\
  di	dump instructions\n\
  df	dump float values\n\
  dd	dump double values\n\
  e	print exception information\n\
  h	dump hash table\n\
  m	examine/change memory\n\
  mm	move a block of memory\n\
  ms	set a block of memory\n\
  md	compare two blocks of memory\n\
  M	print System.map\n\
  r	print registers\n\
  S	print special registers\n\
  t	print backtrace\n\
  la	lookup address in system.map\n\
  ls	lookup symbol in system.map\n\
  x	exit monitor\n\
";

static int xmon_trace[NR_CPUS];
#define SSTEP	1		/* stepping because of 's' command */
#define BRSTEP	2		/* stepping over breakpoint */

static struct pt_regs *xmon_regs[NR_CPUS];

extern inline void sync(void)
{
	asm volatile("sync; isync");
}

extern inline void __delay(unsigned int loops)
{
	if (loops != 0)
		__asm__ __volatile__("mtctr %0; 1: bdnz 1b" : :
				     "r" (loops) : "ctr");
}


void
xmon(struct pt_regs *excp)
{
	struct pt_regs regs;
	int msr, cmd;

	if (excp == NULL) {
		asm volatile ("stw	0,0(%0)\n\
			lwz	0,0(1)\n\
			stw	0,4(%0)\n\
			stmw	2,8(%0)" : : "b" (&regs));
		regs.nip = regs.link = ((unsigned long *)regs.gpr[1])[1];
		regs.msr = get_msr();
		regs.ctr = get_ctr();
		regs.xer = get_xer();
		regs.ccr = get_cr();
		regs.trap = 0;
		excp = &regs;
	}

	msr = get_msr();
	set_msr(msr & ~0x8000);	/* disable interrupts */
	xmon_regs[smp_processor_id()] = excp;
	xmon_enter();
	excprint(excp);
#ifdef CONFIG_SMP
	if (test_and_set_bit(smp_processor_id(), &cpus_in_xmon))
		for (;;)
			;
	while (test_and_set_bit(0, &got_xmon)) {
		if (take_xmon == smp_processor_id()) {
			take_xmon = -1;
			break;
		}
	}
	/*
	 * XXX: breakpoints are removed while any cpu is in xmon
	 */
#endif /* CONFIG_SMP */
	remove_bpts();
	cmd = cmds(excp);
	if (cmd == 's') {
		xmon_trace[smp_processor_id()] = SSTEP;
		excp->msr |= 0x400;
	} else if (at_breakpoint(excp->nip)) {
		xmon_trace[smp_processor_id()] = BRSTEP;
		excp->msr |= 0x400;
	} else {
		xmon_trace[smp_processor_id()] = 0;
		insert_bpts();
	}
	xmon_leave();
	xmon_regs[smp_processor_id()] = 0;
#ifdef CONFIG_SMP
	clear_bit(0, &got_xmon);
	clear_bit(smp_processor_id(), &cpus_in_xmon);
#endif /* CONFIG_SMP */
	set_msr(msr);		/* restore interrupt enable */
}

void
xmon_irq(int irq, void *d, struct pt_regs *regs)
{
	unsigned long flags;
	__save_flags(flags);
	__cli();
	printf("Keyboard interrupt\n");
	xmon(regs);
	__restore_flags(flags);
}

int
xmon_bpt(struct pt_regs *regs)
{
	struct bpt *bp;

	bp = at_breakpoint(regs->nip);
	if (!bp)
		return 0;
	if (bp->count) {
		--bp->count;
		remove_bpts();
		excprint(regs);
		xmon_trace[smp_processor_id()] = BRSTEP;
		regs->msr |= 0x400;
	} else {
		xmon(regs);
	}
	return 1;
}

int
xmon_sstep(struct pt_regs *regs)
{
	if (!xmon_trace[smp_processor_id()])
		return 0;
	if (xmon_trace[smp_processor_id()] == BRSTEP) {
		xmon_trace[smp_processor_id()] = 0;
		insert_bpts();
	} else {
		xmon(regs);
	}
	return 1;
}

int
xmon_dabr_match(struct pt_regs *regs)
{
	if (dabr.enabled && dabr.count) {
		--dabr.count;
		remove_bpts();
		excprint(regs);
		xmon_trace[smp_processor_id()] = BRSTEP;
		regs->msr |= 0x400;
	} else {
		dabr.instr = regs->nip;
		xmon(regs);
	}
	return 1;
}

int
xmon_iabr_match(struct pt_regs *regs)
{
	if (iabr.enabled && iabr.count) {
		--iabr.count;
		remove_bpts();
		excprint(regs);
		xmon_trace[smp_processor_id()] = BRSTEP;
		regs->msr |= 0x400;
	} else {
		xmon(regs);
	}
	return 1;
}

static struct bpt *
at_breakpoint(unsigned pc)
{
	int i;
	struct bpt *bp;

	if (dabr.enabled && pc == dabr.instr)
		return &dabr;
	if (iabr.enabled && pc == iabr.address)
		return &iabr;
	bp = bpts;
	for (i = 0; i < NBPTS; ++i, ++bp)
		if (bp->enabled && pc == bp->address)
			return bp;
	return 0;
}

static void
insert_bpts()
{
	int i;
	struct bpt *bp;

	bp = bpts;
	for (i = 0; i < NBPTS; ++i, ++bp) {
		if (!bp->enabled)
			continue;
		if (mread(bp->address, &bp->instr, 4) != 4
		    || mwrite(bp->address, &bpinstr, 4) != 4) {
			printf("Couldn't insert breakpoint at %x, disabling\n",
			       bp->address);
			bp->enabled = 0;
		}
		store_inst((void *) bp->address);
	}
#if !defined(CONFIG_8xx) && !defined(CONFIG_POWER4)
	if (dabr.enabled)
		set_dabr(dabr.address);
	if (iabr.enabled)
		set_iabr(iabr.address);
#endif
}

static void
remove_bpts()
{
	int i;
	struct bpt *bp;
	unsigned instr;

#if !defined(CONFIG_8xx) && !defined(CONFIG_POWER4)
	set_dabr(0);
	set_iabr(0);
#endif
	bp = bpts;
	for (i = 0; i < NBPTS; ++i, ++bp) {
		if (!bp->enabled)
			continue;
		if (mread(bp->address, &instr, 4) == 4
		    && instr == bpinstr
		    && mwrite(bp->address, &bp->instr, 4) != 4)
			printf("Couldn't remove breakpoint at %x\n",
			       bp->address);
		store_inst((void *) bp->address);
	}
}

static char *last_cmd;

/* Command interpreting routine */
static int
cmds(struct pt_regs *excp)
{
	int cmd;

	last_cmd = NULL;
	for(;;) {
#ifdef CONFIG_SMP
		printf("%d:", smp_processor_id());
#endif /* CONFIG_SMP */
		printf("mon> ");
		fflush(stdout);
		flush_input();
		termch = 0;
		cmd = skipbl();
		if( cmd == '\n' ) {
			if (last_cmd == NULL)
				continue;
			take_input(last_cmd);
			last_cmd = NULL;
			cmd = inchar();
		}
		switch (cmd) {
		case 'm':
			cmd = inchar();
			switch (cmd) {
			case 'm':
			case 's':
			case 'd':
				memops(cmd);
				break;
			case 'l':
				memlocate();
				break;
			case 'z':
				memzcan();
				break;
			default:
				termch = cmd;
				memex();
			}
			break;
		case 'd':
			dump();
			break;
		case 'l':
			sysmap_lookup();
			break;
		case 'r':
			if (excp != NULL)
				prregs(excp);	/* print regs */
			break;
		case 'e':
			if (excp == NULL)
				printf("No exception information\n");
			else
				excprint(excp);
			break;
		case 'M':
			print_sysmap();
			break;
		case 'S':
			super_regs();
			break;
		case 't':
			backtrace(excp);
			break;
		case 'f':
			cacheflush();
			break;
		case 'h':
			dump_hash_table();
			break;
		case 's':
		case 'x':
		case EOF:
			return cmd;
		case '?':
			printf(help_string);
			break;
		default:
			printf("Unrecognized command: ");
			if( ' ' < cmd && cmd <= '~' )
				putchar(cmd);
			else
				printf("\\x%x", cmd);
			printf(" (type ? for help)\n");
			break;
		case 'b':
			bpt_cmds();
			break;
		case 'C':
			csum();
			break;
#ifdef CONFIG_SMP
		case 'c':
			cpu_cmd();
			break;
#endif /* CONFIG_SMP */
		}
	}
}

#ifdef CONFIG_SMP
static void cpu_cmd(void)
{
	unsigned cpu;
	int timeout;
	int cmd;

	cmd = inchar();
	if (cmd == 'i') {
		/* interrupt other cpu(s) */
		cpu = MSG_ALL_BUT_SELF;
		if (scanhex(&cpu))
			smp_send_xmon_break(cpu);
		return;
	}
	termch = cmd;
	if (!scanhex(&cpu)) {
		/* print cpus waiting or in xmon */
		printf("cpus stopped:");
		for (cpu = 0; cpu < NR_CPUS; ++cpu) {
			if (test_bit(cpu, &cpus_in_xmon)) {
				printf(" %d", cpu);
				if (cpu == smp_processor_id())
					printf("*", cpu);
			}
		}
		printf("\n");
		return;
	}
	/* try to switch to cpu specified */
	take_xmon = cpu;
	timeout = 10000000;
	while (take_xmon >= 0) {
		if (--timeout == 0) {
			/* yes there's a race here */
			take_xmon = -1;
			printf("cpu %u didn't take control\n", cpu);
			return;
		}
	}
	/* now have to wait to be given control back */
	while (test_and_set_bit(0, &got_xmon)) {
		if (take_xmon == smp_processor_id()) {
			take_xmon = -1;
			break;
		}
	}
}
#endif /* CONFIG_SMP */

static unsigned short fcstab[256] = {
	0x0000, 0x1189, 0x2312, 0x329b, 0x4624, 0x57ad, 0x6536, 0x74bf,
	0x8c48, 0x9dc1, 0xaf5a, 0xbed3, 0xca6c, 0xdbe5, 0xe97e, 0xf8f7,
	0x1081, 0x0108, 0x3393, 0x221a, 0x56a5, 0x472c, 0x75b7, 0x643e,
	0x9cc9, 0x8d40, 0xbfdb, 0xae52, 0xdaed, 0xcb64, 0xf9ff, 0xe876,
	0x2102, 0x308b, 0x0210, 0x1399, 0x6726, 0x76af, 0x4434, 0x55bd,
	0xad4a, 0xbcc3, 0x8e58, 0x9fd1, 0xeb6e, 0xfae7, 0xc87c, 0xd9f5,
	0x3183, 0x200a, 0x1291, 0x0318, 0x77a7, 0x662e, 0x54b5, 0x453c,
	0xbdcb, 0xac42, 0x9ed9, 0x8f50, 0xfbef, 0xea66, 0xd8fd, 0xc974,
	0x4204, 0x538d, 0x6116, 0x709f, 0x0420, 0x15a9, 0x2732, 0x36bb,
	0xce4c, 0xdfc5, 0xed5e, 0xfcd7, 0x8868, 0x99e1, 0xab7a, 0xbaf3,
	0x5285, 0x430c, 0x7197, 0x601e, 0x14a1, 0x0528, 0x37b3, 0x263a,
	0xdecd, 0xcf44, 0xfddf, 0xec56, 0x98e9, 0x8960, 0xbbfb, 0xaa72,
	0x6306, 0x728f, 0x4014, 0x519d, 0x2522, 0x34ab, 0x0630, 0x17b9,
	0xef4e, 0xfec7, 0xcc5c, 0xddd5, 0xa96a, 0xb8e3, 0x8a78, 0x9bf1,
	0x7387, 0x620e, 0x5095, 0x411c, 0x35a3, 0x242a, 0x16b1, 0x0738,
	0xffcf, 0xee46, 0xdcdd, 0xcd54, 0xb9eb, 0xa862, 0x9af9, 0x8b70,
	0x8408, 0x9581, 0xa71a, 0xb693, 0xc22c, 0xd3a5, 0xe13e, 0xf0b7,
	0x0840, 0x19c9, 0x2b52, 0x3adb, 0x4e64, 0x5fed, 0x6d76, 0x7cff,
	0x9489, 0x8500, 0xb79b, 0xa612, 0xd2ad, 0xc324, 0xf1bf, 0xe036,
	0x18c1, 0x0948, 0x3bd3, 0x2a5a, 0x5ee5, 0x4f6c, 0x7df7, 0x6c7e,
	0xa50a, 0xb483, 0x8618, 0x9791, 0xe32e, 0xf2a7, 0xc03c, 0xd1b5,
	0x2942, 0x38cb, 0x0a50, 0x1bd9, 0x6f66, 0x7eef, 0x4c74, 0x5dfd,
	0xb58b, 0xa402, 0x9699, 0x8710, 0xf3af, 0xe226, 0xd0bd, 0xc134,
	0x39c3, 0x284a, 0x1ad1, 0x0b58, 0x7fe7, 0x6e6e, 0x5cf5, 0x4d7c,
	0xc60c, 0xd785, 0xe51e, 0xf497, 0x8028, 0x91a1, 0xa33a, 0xb2b3,
	0x4a44, 0x5bcd, 0x6956, 0x78df, 0x0c60, 0x1de9, 0x2f72, 0x3efb,
	0xd68d, 0xc704, 0xf59f, 0xe416, 0x90a9, 0x8120, 0xb3bb, 0xa232,
	0x5ac5, 0x4b4c, 0x79d7, 0x685e, 0x1ce1, 0x0d68, 0x3ff3, 0x2e7a,
	0xe70e, 0xf687, 0xc41c, 0xd595, 0xa12a, 0xb0a3, 0x8238, 0x93b1,
	0x6b46, 0x7acf, 0x4854, 0x59dd, 0x2d62, 0x3ceb, 0x0e70, 0x1ff9,
	0xf78f, 0xe606, 0xd49d, 0xc514, 0xb1ab, 0xa022, 0x92b9, 0x8330,
	0x7bc7, 0x6a4e, 0x58d5, 0x495c, 0x3de3, 0x2c6a, 0x1ef1, 0x0f78
};

#define FCS(fcs, c)	(((fcs) >> 8) ^ fcstab[((fcs) ^ (c)) & 0xff])

static void
csum(void)
{
	unsigned int i;
	unsigned short fcs;
	unsigned char v;

	if (!scanhex(&adrs))
		return;
	if (!scanhex(&ncsum))
		return;
	fcs = 0xffff;
	for (i = 0; i < ncsum; ++i) {
		if (mread(adrs+i, &v, 1) == 0) {
			printf("csum stopped at %x\n", adrs+i);
			break;
		}
		fcs = FCS(fcs, v);
	}
	printf("%x\n", fcs);
}

static void
bpt_cmds(void)
{
	int cmd;
	unsigned a;
	int mode, i;
	struct bpt *bp;

	cmd = inchar();
	switch (cmd) {
#if !defined(CONFIG_8xx) && !defined(CONFIG_POWER4)
	case 'd':
		mode = 7;
		cmd = inchar();
		if (cmd == 'r')
			mode = 5;
		else if (cmd == 'w')
			mode = 6;
		else
			termch = cmd;
		cmd = inchar();
		if (cmd == 'p')
			mode &= ~4;
		else
			termch = cmd;
		dabr.address = 0;
		dabr.count = 0;
		dabr.enabled = scanhex(&dabr.address);
		scanhex(&dabr.count);
		if (dabr.enabled)
			dabr.address = (dabr.address & ~7) | mode;
		break;
	case 'i':
		cmd = inchar();
		if (cmd == 'p')
			mode = 2;
		else
			mode = 3;
		iabr.address = 0;
		iabr.count = 0;
		iabr.enabled = scanhex(&iabr.address);
		if (iabr.enabled)
			iabr.address |= mode;
		scanhex(&iabr.count);
		break;
#endif
	case 'c':
		if (!scanhex(&a)) {
			/* clear all breakpoints */
			for (i = 0; i < NBPTS; ++i)
				bpts[i].enabled = 0;
			iabr.enabled = 0;
			dabr.enabled = 0;
			printf("All breakpoints cleared\n");
		} else {
			bp = at_breakpoint(a);
			if (bp == 0) {
				printf("No breakpoint at %x\n", a);
			} else {
				bp->enabled = 0;
			}
		}
		break;
	default:
		termch = cmd;
		if (!scanhex(&a)) {
			/* print all breakpoints */
			printf("type  address   count\n");
			if (dabr.enabled) {
				printf("data %.8x %8x [", dabr.address & ~7,
				       dabr.count);
				if (dabr.address & 1)
					printf("r");
				if (dabr.address & 2)
					printf("w");
				if (dabr.address & 4)
					printf("p");
				printf("]\n");
			}
			if (iabr.enabled)
				printf("inst %.8x %8x\n", iabr.address & ~3,
				       iabr.count);
			for (bp = bpts; bp < &bpts[NBPTS]; ++bp)
				if (bp->enabled)
					printf("trap %.8x %8x\n", bp->address,
					       bp->count);
			break;
		}
		bp = at_breakpoint(a);
		if (bp == 0) {
			for (bp = bpts; bp < &bpts[NBPTS]; ++bp)
				if (!bp->enabled)
					break;
			if (bp >= &bpts[NBPTS]) {
				printf("Sorry, no free breakpoints\n");
				break;
			}
		}
		bp->enabled = 1;
		bp->address = a;
		bp->count = 0;
		scanhex(&bp->count);
		break;
	}
}

static void
backtrace(struct pt_regs *excp)
{
	unsigned sp;
	unsigned stack[2];
	struct pt_regs regs;
	extern char ret_from_intercept, ret_from_syscall_1, ret_from_syscall_2;
	extern char do_signal_ret, ret_from_except;

	printf("backtrace:\n");
	
	if (excp != NULL)
		sp = excp->gpr[1];
	else
		sp = getsp();
	scanhex(&sp);
	scannl();
	for (; sp != 0; sp = stack[0]) {
		if (mread(sp, stack, sizeof(stack)) != sizeof(stack))
			break;
		pretty_print_addr(stack[1]);
		printf(" ");
		if (stack[1] == (unsigned) &ret_from_intercept
		    || stack[1] == (unsigned) &ret_from_except
		    || stack[1] == (unsigned) &ret_from_syscall_1
		    || stack[1] == (unsigned) &ret_from_syscall_2
		    || stack[1] == (unsigned) &do_signal_ret) {
			if (mread(sp+16, &regs, sizeof(regs)) != sizeof(regs))
				break;
			printf("\nexception:%x [%x] %x ", regs.trap, sp+16,
			       regs.nip);
			sp = regs.gpr[1];
			if (mread(sp, stack, sizeof(stack)) != sizeof(stack))
				break;
		}
		printf("\n");
	}
}

int
getsp()
{
    int x;

    asm("mr %0,1" : "=r" (x) :);
    return x;
}

void
excprint(struct pt_regs *fp)
{
#ifdef CONFIG_SMP
	printf("cpu %d: ", smp_processor_id());
#endif /* CONFIG_SMP */
	printf("vector: %x at pc = ", fp->trap);
	pretty_print_addr(fp->nip);
	printf(", lr = ");
	pretty_print_addr(fp->link);
	printf("\nmsr = %x, sp = %x [%x]\n", fp->msr, fp->gpr[1], fp);
	if (fp->trap == 0x300 || fp->trap == 0x600)
		printf("dar = %x, dsisr = %x\n", fp->dar, fp->dsisr);
	if (current)
		printf("current = %x, pid = %d, comm = %s\n",
		       current, current->pid, current->comm);
}

void
prregs(struct pt_regs *fp)
{
	int n;
	unsigned base;

	if (scanhex(&base))
		fp = (struct pt_regs *) base;
	for (n = 0; n < 32; ++n)
		printf("R%.2d = %.8x%s", n, fp->gpr[n],
		       (n & 3) == 3? "\n": "   ");
	printf("pc  = %.8x   msr = %.8x   lr  = %.8x   cr  = %.8x\n",
	       fp->nip, fp->msr, fp->link, fp->ccr);
	printf("ctr = %.8x   xer = %.8x   trap = %4x\n",
	       fp->ctr, fp->xer, fp->trap);
}

void
cacheflush(void)
{
	int cmd;
	unsigned nflush;

	cmd = inchar();
	if (cmd != 'i')
		termch = cmd;
	scanhex(&adrs);
	if (termch != '\n')
		termch = 0;
	nflush = 1;
	scanhex(&nflush);
	nflush = (nflush + 31) / 32;
	if (cmd != 'i') {
		for (; nflush > 0; --nflush, adrs += 0x20)
			cflush((void *) adrs);
	} else {
		for (; nflush > 0; --nflush, adrs += 0x20)
			cinval((void *) adrs);
	}
}

unsigned int
read_spr(int n)
{
    unsigned int instrs[2];
    int (*code)(void);

    instrs[0] = 0x7c6002a6 + ((n & 0x1F) << 16) + ((n & 0x3e0) << 6);
    instrs[1] = 0x4e800020;
    store_inst(instrs);
    store_inst(instrs+1);
    code = (int (*)(void)) instrs;
    return code();
}

void
write_spr(int n, unsigned int val)
{
    unsigned int instrs[2];
    int (*code)(unsigned int);

    instrs[0] = 0x7c6003a6 + ((n & 0x1F) << 16) + ((n & 0x3e0) << 6);
    instrs[1] = 0x4e800020;
    store_inst(instrs);
    store_inst(instrs+1);
    code = (int (*)(unsigned int)) instrs;
    code(val);
}

static unsigned int regno;
extern char exc_prolog;
extern char dec_exc;

void
print_sysmap(void)
{
	extern char *sysmap;
	if ( sysmap ) {
		printf("System.map: \n");
		if( setjmp(bus_error_jmp) == 0 ) {
			debugger_fault_handler = handle_fault;
			sync();
			xmon_puts(sysmap);
			sync();
		}
		debugger_fault_handler = 0;
	}
	else
		printf("No System.map\n");
}

void
super_regs()
{
	int i, cmd;
	unsigned val;

	cmd = skipbl();
	if (cmd == '\n') {
		printf("msr = %x, pvr = %x\n", get_msr(), get_pvr());
		printf("sprg0-3 = %x %x %x %x\n", get_sprg0(), get_sprg1(),
		       get_sprg2(), get_sprg3());
		printf("srr0 = %x, srr1 = %x\n", get_srr0(), get_srr1());
#ifdef CONFIG_PPC_STD_MMU
		printf("sr0-15 =");
		for (i = 0; i < 16; ++i)
			printf(" %x", get_sr(i));
		printf("\n");
#endif
		asm("mr %0,1" : "=r" (i) :);
		printf("sp = %x ", i);
		asm("mr %0,2" : "=r" (i) :);
		printf("toc = %x\n", i);
		return;
	}

	scanhex(&regno);
	switch (cmd) {
	case 'w':
		val = read_spr(regno);
		scanhex(&val);
		write_spr(regno, val);
		/* fall through */
	case 'r':
		printf("spr %x = %x\n", regno, read_spr(regno));
		break;
	case 's':
		val = get_sr(regno);
		scanhex(&val);
		set_sr(regno, val);
		break;
	case 'm':
		val = get_msr();
		scanhex(&val);
		set_msr(val);
		break;
	}
	scannl();
}

#if 0
static void
openforth()
{
    int c;
    char *p;
    char cmd[1024];
    int args[5];
    extern int (*prom_entry)(int *);

    p = cmd;
    c = skipbl();
    while (c != '\n') {
	*p++ = c;
	c = inchar();
    }
    *p = 0;
    args[0] = (int) "interpret";
    args[1] = 1;
    args[2] = 1;
    args[3] = (int) cmd;
    (*prom_entry)(args);
    printf("\n");
    if (args[4] != 0)
	printf("error %x\n", args[4]);
}
#endif

#ifndef CONFIG_PPC64BRIDGE
static void
dump_hash_table_seg(unsigned seg, unsigned start, unsigned end)
{
	extern void *Hash;
	extern unsigned long Hash_size;
	unsigned *htab = Hash;
	unsigned hsize = Hash_size;
	unsigned v, hmask, va, last_va;
	int found, last_found, i;
	unsigned *hg, w1, last_w2, last_va0;

	last_found = 0;
	hmask = hsize / 64 - 1;
	va = start;
	start = (start >> 12) & 0xffff;
	end = (end >> 12) & 0xffff;
	for (v = start; v < end; ++v) {
		found = 0;
		hg = htab + (((v ^ seg) & hmask) * 16);
		w1 = 0x80000000 | (seg << 7) | (v >> 10);
		for (i = 0; i < 8; ++i, hg += 2) {
			if (*hg == w1) {
				found = 1;
				break;
			}
		}
		if (!found) {
			w1 ^= 0x40;
			hg = htab + ((~(v ^ seg) & hmask) * 16);
			for (i = 0; i < 8; ++i, hg += 2) {
				if (*hg == w1) {
					found = 1;
					break;
				}
			}
		}
		if (!(last_found && found && (hg[1] & ~0x180) == last_w2 + 4096)) {
			if (last_found) {
				if (last_va != last_va0)
					printf(" ... %x", last_va);
				printf("\n");
			}
			if (found) {
				printf("%x to %x", va, hg[1]);
				last_va0 = va;
			}
			last_found = found;
		}
		if (found) {
			last_w2 = hg[1] & ~0x180;
			last_va = va;
		}
		va += 4096;
	}
	if (last_found)
		printf(" ... %x\n", last_va);
}

#else /* CONFIG_PPC64BRIDGE */
static void
dump_hash_table_seg(unsigned seg, unsigned start, unsigned end)
{
	extern void *Hash;
	extern unsigned long Hash_size;
	unsigned *htab = Hash;
	unsigned hsize = Hash_size;
	unsigned v, hmask, va, last_va;
	int found, last_found, i;
	unsigned *hg, w1, last_w2, last_va0;

	last_found = 0;
	hmask = hsize / 128 - 1;
	va = start;
	start = (start >> 12) & 0xffff;
	end = (end >> 12) & 0xffff;
	for (v = start; v < end; ++v) {
		found = 0;
		hg = htab + (((v ^ seg) & hmask) * 32);
		w1 = 1 | (seg << 12) | ((v & 0xf800) >> 4);
		for (i = 0; i < 8; ++i, hg += 4) {
			if (hg[1] == w1) {
				found = 1;
				break;
			}
		}
		if (!found) {
			w1 ^= 2;
			hg = htab + ((~(v ^ seg) & hmask) * 32);
			for (i = 0; i < 8; ++i, hg += 4) {
				if (hg[1] == w1) {
					found = 1;
					break;
				}
			}
		}
		if (!(last_found && found && (hg[3] & ~0x180) == last_w2 + 4096)) {
			if (last_found) {
				if (last_va != last_va0)
					printf(" ... %x", last_va);
				printf("\n");
			}
			if (found) {
				printf("%x to %x", va, hg[3]);
				last_va0 = va;
			}
			last_found = found;
		}
		if (found) {
			last_w2 = hg[3] & ~0x180;
			last_va = va;
		}
		va += 4096;
	}
	if (last_found)
		printf(" ... %x\n", last_va);
}
#endif /* CONFIG_PPC64BRIDGE */

static unsigned hash_ctx;
static unsigned hash_start;
static unsigned hash_end;

static void
dump_hash_table()
{
	int seg;
	unsigned seg_start, seg_end;

	hash_ctx = 0;
	hash_start = 0;
	hash_end = 0xfffff000;
	scanhex(&hash_ctx);
	scanhex(&hash_start);
	scanhex(&hash_end);
	printf("Mappings for context %x\n", hash_ctx);
	seg_start = hash_start;
	for (seg = hash_start >> 28; seg <= hash_end >> 28; ++seg) {
		seg_end = (seg << 28) | 0x0ffff000;
		if (seg_end > hash_end)
			seg_end = hash_end;
		dump_hash_table_seg((hash_ctx << 4) + (seg * 0x111),
				    seg_start, seg_end);
		seg_start = seg_end + 0x1000;
	}
}

/*
 * Stuff for reading and writing memory safely
 */

int
mread(unsigned adrs, void *buf, int size)
{
	volatile int n;
	char *p, *q;

	n = 0;
	if( setjmp(bus_error_jmp) == 0 ){
		debugger_fault_handler = handle_fault;
		sync();
		p = (char *) adrs;
		q = (char *) buf;
		switch (size) {
		case 2: *(short *)q = *(short *)p;	break;
		case 4: *(int *)q = *(int *)p;		break;
		default:
			for( ; n < size; ++n ) {
				*q++ = *p++;
				sync();
			}
		}
		sync();
		/* wait a little while to see if we get a machine check */
		__delay(200);
		n = size;
	}
	debugger_fault_handler = 0;
	return n;
}

int
mwrite(unsigned adrs, void *buf, int size)
{
	volatile int n;
	char *p, *q;

	n = 0;
	if( setjmp(bus_error_jmp) == 0 ){
		debugger_fault_handler = handle_fault;
		sync();
		p = (char *) adrs;
		q = (char *) buf;
		switch (size) {
		case 2: *(short *)p = *(short *)q;	break;
		case 4: *(int *)p = *(int *)q;		break;
		default:
			for( ; n < size; ++n ) {
				*p++ = *q++;
				sync();
			}
		}
		sync();
		n = size;
	} else {
		printf("*** Error writing address %x\n", adrs + n);
	}
	debugger_fault_handler = 0;
	return n;
}

static int fault_type;
static char *fault_chars[] = { "--", "**", "##" };

static void
handle_fault(struct pt_regs *regs)
{
	fault_type = regs->trap == 0x200? 0: regs->trap == 0x300? 1: 2;
	longjmp(bus_error_jmp, 1);
}

#define SWAP(a, b, t)	((t) = (a), (a) = (b), (b) = (t))

void
byterev(unsigned char *val, int size)
{
	int t;
	
	switch (size) {
	case 2:
		SWAP(val[0], val[1], t);
		break;
	case 4:
		SWAP(val[0], val[3], t);
		SWAP(val[1], val[2], t);
		break;
	}
}

static int brev;
static int mnoread;

void
memex()
{
    int cmd, inc, i, nslash;
    unsigned n;
    unsigned char val[4];

    last_cmd = "m\n";
    scanhex(&adrs);
    while ((cmd = skipbl()) != '\n') {
	switch( cmd ){
	case 'b':	size = 1;	break;
	case 'w':	size = 2;	break;
	case 'l':	size = 4;	break;
	case 'r': 	brev = !brev;	break;
	case 'n':	mnoread = 1;	break;
	case '.':	mnoread = 0;	break;
	}
    }
    if( size <= 0 )
	size = 1;
    else if( size > 4 )
	size = 4;
    for(;;){
	if (!mnoread)
	    n = mread(adrs, val, size);
	printf("%.8x%c", adrs, brev? 'r': ' ');
	if (!mnoread) {
	    if (brev)
		byterev(val, size);
	    putchar(' ');
	    for (i = 0; i < n; ++i)
		printf("%.2x", val[i]);
	    for (; i < size; ++i)
		printf("%s", fault_chars[fault_type]);
	}
	putchar(' ');
	inc = size;
	nslash = 0;
	for(;;){
	    if( scanhex(&n) ){
		for (i = 0; i < size; ++i)
		    val[i] = n >> (i * 8);
		if (!brev)
		    byterev(val, size);
		mwrite(adrs, val, size);
		inc = size;
	    }
	    cmd = skipbl();
	    if (cmd == '\n')
		break;
	    inc = 0;
	    switch (cmd) {
	    case '\'':
		for(;;){
		    n = inchar();
		    if( n == '\\' )
			n = bsesc();
		    else if( n == '\'' )
			break;
		    for (i = 0; i < size; ++i)
			val[i] = n >> (i * 8);
		    if (!brev)
			byterev(val, size);
		    mwrite(adrs, val, size);
		    adrs += size;
		}
		adrs -= size;
		inc = size;
		break;
	    case ',':
		adrs += size;
		break;
	    case '.':
		mnoread = 0;
		break;
	    case ';':
		break;
	    case 'x':
	    case EOF:
		scannl();
		return;
	    case 'b':
	    case 'v':
		size = 1;
		break;
	    case 'w':
		size = 2;
		break;
	    case 'l':
		size = 4;
		break;
	    case '^':
		adrs -= size;
		break;
		break;
	    case '/':
		if (nslash > 0)
		    adrs -= 1 << nslash;
		else
		    nslash = 0;
		nslash += 4;
		adrs += 1 << nslash;
		break;
	    case '\\':
		if (nslash < 0)
		    adrs += 1 << -nslash;
		else
		    nslash = 0;
		nslash -= 4;
		adrs -= 1 << -nslash;
		break;
	    case 'm':
		scanhex(&adrs);
		break;
	    case 'n':
		mnoread = 1;
		break;
	    case 'r':
		brev = !brev;
		break;
	    case '<':
		n = size;
		scanhex(&n);
		adrs -= n;
		break;
	    case '>':
		n = size;
		scanhex(&n);
		adrs += n;
		break;
	    }
	}
	adrs += inc;
    }
}

int
bsesc()
{
	int c;

	c = inchar();
	switch( c ){
	case 'n':	c = '\n';	break;
	case 'r':	c = '\r';	break;
	case 'b':	c = '\b';	break;
	case 't':	c = '\t';	break;
	}
	return c;
}

void
dump()
{
	int c;

	c = inchar();
	if ((isxdigit(c) && c != 'f' && c != 'd') || c == '\n')
		termch = c;
	scanhex(&adrs);
	if( termch != '\n')
		termch = 0;
	if( c == 'i' ){
		scanhex(&nidump);
		if( nidump == 0 )
			nidump = 16;
		adrs += ppc_inst_dump(adrs, nidump);
		last_cmd = "di\n";
	} else {
		scanhex(&ndump);
		if( ndump == 0 )
			ndump = 64;
		prdump(adrs, ndump);
		adrs += ndump;
		last_cmd = "d\n";
	}
}

void
prdump(unsigned adrs, int ndump)
{
	register int n, m, c, r, nr;
	unsigned char temp[16];

	for( n = ndump; n > 0; ){
		printf("%.8x", adrs);
		putchar(' ');
		r = n < 16? n: 16;
		nr = mread(adrs, temp, r);
		adrs += nr;
		for( m = 0; m < r; ++m ){
			putchar((m & 3) == 0 && m > 0? '.': ' ');
			if( m < nr )
				printf("%.2x", temp[m]);
			else
				printf("%s", fault_chars[fault_type]);
		}
		for(; m < 16; ++m )
			printf("   ");
		printf("  |");
		for( m = 0; m < r; ++m ){
			if( m < nr ){
				c = temp[m];
				putchar(' ' <= c && c <= '~'? c: '.');
			} else
				putchar(' ');
		}
		n -= r;
		for(; m < 16; ++m )
			putchar(' ');
		printf("|\n");
		if( nr < r )
			break;
	}
}

int
ppc_inst_dump(unsigned adr, int count)
{
	int nr, dotted;
	unsigned first_adr;
	unsigned long inst, last_inst;
	unsigned char val[4];

	dotted = 0;
	for (first_adr = adr; count > 0; --count, adr += 4){
		nr = mread(adr, val, 4);
		if( nr == 0 ){
			const char *x = fault_chars[fault_type];
			printf("%.8x  %s%s%s%s\n", adr, x, x, x, x);
			break;
		}
		inst = GETWORD(val);
		if (adr > first_adr && inst == last_inst) {
			if (!dotted) {
				printf(" ...\n");
				dotted = 1;
			}
			continue;
		}
		dotted = 0;
		last_inst = inst;
		printf("%.8x  ", adr);
		printf("%.8x\t", inst);
		print_insn_big_powerpc(stdout, inst, adr);	/* always returns 4 */
		printf("\n");
	}
	return adr - first_adr;
}

void
print_address(addr)
unsigned addr;
{
	printf("0x%x", addr);
}

/*
 * Memory operations - move, set, print differences
 */
static unsigned mdest;		/* destination address */
static unsigned msrc;		/* source address */
static unsigned mval;		/* byte value to set memory to */
static unsigned mcount;		/* # bytes to affect */
static unsigned mdiffs;		/* max # differences to print */

void
memops(int cmd)
{
	scanhex(&mdest);
	if( termch != '\n' )
		termch = 0;
	scanhex(cmd == 's'? &mval: &msrc);
	if( termch != '\n' )
		termch = 0;
	scanhex(&mcount);
	switch( cmd ){
	case 'm':
		memmove((void *)mdest, (void *)msrc, mcount);
		break;
	case 's':
		memset((void *)mdest, mval, mcount);
		break;
	case 'd':
		if( termch != '\n' )
			termch = 0;
		scanhex(&mdiffs);
		memdiffs((unsigned char *)mdest, (unsigned char *)msrc, mcount, mdiffs);
		break;
	}
}

void
memdiffs(unsigned char *p1, unsigned char *p2, unsigned nb, unsigned maxpr)
{
	unsigned n, prt;

	prt = 0;
	for( n = nb; n > 0; --n )
		if( *p1++ != *p2++ )
			if( ++prt <= maxpr )
				printf("%.8x %.2x # %.8x %.2x\n", (unsigned)p1 - 1,
					p1[-1], (unsigned)p2 - 1, p2[-1]);
	if( prt > maxpr )
		printf("Total of %d differences\n", prt);
}

static unsigned mend;
static unsigned mask;

void
memlocate()
{
	unsigned a, n;
	unsigned char val[4];

	last_cmd = "ml";
	scanhex(&mdest);
	if (termch != '\n') {
		termch = 0;
		scanhex(&mend);
		if (termch != '\n') {
			termch = 0;
			scanhex(&mval);
			mask = ~0;
			if (termch != '\n') termch = 0;
			scanhex(&mask);
		}
	}
	n = 0;
	for (a = mdest; a < mend; a += 4) {
		if (mread(a, val, 4) == 4
			&& ((GETWORD(val) ^ mval) & mask) == 0) {
			printf("%.8x:  %.8x\n", a, GETWORD(val));
			if (++n >= 10)
				break;
		}
	}
}

static unsigned mskip = 0x1000;
static unsigned mlim = 0xffffffff;

void
memzcan()
{
	unsigned char v;
	unsigned a;
	int ok, ook;

	scanhex(&mdest);
	if (termch != '\n') termch = 0;
	scanhex(&mskip);
	if (termch != '\n') termch = 0;
	scanhex(&mlim);
	ook = 0;
	for (a = mdest; a < mlim; a += mskip) {
		ok = mread(a, &v, 1);
		if (ok && !ook) {
			printf("%.8x .. ", a);
			fflush(stdout);
		} else if (!ok && ook)
			printf("%.8x\n", a - mskip);
		ook = ok;
		if (a + mskip < a)
			break;
	}
	if (ook)
		printf("%.8x\n", a - mskip);
}

/* Input scanning routines */
int
skipbl()
{
	int c;

	if( termch != 0 ){
		c = termch;
		termch = 0;
	} else
		c = inchar();
	while( c == ' ' || c == '\t' )
		c = inchar();
	return c;
}

#define N_PTREGS	44
static char *regnames[N_PTREGS] = {
	"r0", "r1", "r2", "r3", "r4", "r5", "r6", "r7",
	"r8", "r9", "r10", "r11", "r12", "r13", "r14", "r15",
	"r16", "r17", "r18", "r19", "r20", "r21", "r22", "r23",
	"r24", "r25", "r26", "r27", "r28", "r29", "r30", "r31",
	"pc", "msr", "or3", "ctr", "lr", "xer", "ccr", "mq",
	"trap", "dar", "dsisr", "res"
};

int
scanhex(vp)
unsigned *vp;
{
	int c, d;
	unsigned v;

	c = skipbl();
	if (c == '%') {
		/* parse register name */
		char regname[8];
		int i;

		for (i = 0; i < sizeof(regname) - 1; ++i) {
			c = inchar();
			if (!isalnum(c)) {
				termch = c;
				break;
			}
			regname[i] = c;
		}
		regname[i] = 0;
		for (i = 0; i < N_PTREGS; ++i) {
			if (strcmp(regnames[i], regname) == 0) {
				unsigned *rp = (unsigned *)
					xmon_regs[smp_processor_id()];
				if (rp == NULL) {
					printf("regs not available\n");
					return 0;
				}
				*vp = rp[i];
				return 1;
			}
		}
		printf("invalid register name '%%%s'\n", regname);
		return 0;
	} else if (c == '$') {
		static char symname[64];
		int i;
		for (i=0; i<63; i++) {
			c = inchar();
			if (isspace(c)) {
				termch = c;
				break;
			}
			symname[i] = c;
		}
		symname[i++] = 0;
		*vp = xmon_symbol_to_addr(symname);
		if (!(*vp)) {
			printf("unknown symbol\n");
			return 0;
		}
		return 1;
	}

	d = hexdigit(c);
	if( d == EOF ){
		termch = c;
		return 0;
	}
	v = 0;
	do {
		v = (v << 4) + d;
		c = inchar();
		d = hexdigit(c);
	} while( d != EOF );
	termch = c;
	*vp = v;
	return 1;
}

void
scannl()
{
	int c;

	c = termch;
	termch = 0;
	while( c != '\n' )
		c = inchar();
}

int
hexdigit(c)
{
	if( '0' <= c && c <= '9' )
		return c - '0';
	if( 'A' <= c && c <= 'F' )
		return c - ('A' - 10);
	if( 'a' <= c && c <= 'f' )
		return c - ('a' - 10);
	return EOF;
}

void
getstring(char *s, int size)
{
	int c;

	c = skipbl();
	do {
		if( size > 1 ){
			*s++ = c;
			--size;
		}
		c = inchar();
	} while( c != ' ' && c != '\t' && c != '\n' );
	termch = c;
	*s = 0;
}

static char line[256];
static char *lineptr;

void
flush_input()
{
	lineptr = NULL;
}

int
inchar()
{
	if (lineptr == NULL || *lineptr == 0) {
		if (fgets(line, sizeof(line), stdin) == NULL) {
			lineptr = NULL;
			return EOF;
		}
		lineptr = line;
	}
	return *lineptr++;
}

void
take_input(str)
char *str;
{
	lineptr = str;
}

void
sysmap_lookup(void)
{
	int type = inchar();
	unsigned addr;
	static char tmp[64];
	char* cur;

	extern char *sysmap;
	extern unsigned long sysmap_size;
	if ( !sysmap || !sysmap_size )
		return;

	switch(type) {
		case 'a':
			if (scanhex(&addr)) {
				pretty_print_addr(addr);
				printf("\n");
			}
			termch = 0;
			break;
		case 's':
			getstring(tmp, 64);
			if( setjmp(bus_error_jmp) == 0 ) {
				debugger_fault_handler = handle_fault;
				sync();
				cur = sysmap;
				do {
					cur = strstr(cur, tmp);
					if (cur) {
						static char res[64];
						char *p, *d;
						p = cur;
						while(p > sysmap && *p != 10)
							p--;
						if (*p == 10) p++;
						d = res;
						while(*p && p < (sysmap + sysmap_size) && *p != 10)
							*(d++) = *(p++);
						*(d++) = 0;
						printf("%s\n", res);
						cur++;
					}
				} while (cur);
				sync();
			}
			debugger_fault_handler = 0;
			termch = 0;
			break;
	}
}

static int
pretty_print_addr(unsigned long addr)
{
	char *sym;
	unsigned long saddr;
	
	printf("%08x", addr);
	sym = xmon_find_symbol(addr, &saddr);
	if (sym)
		printf(" (%s+0x%x)", sym, addr-saddr);
	return (sym != 0);
}

char*
xmon_find_symbol(unsigned long addr, unsigned long* saddr)
{
	static char rbuffer[64];
	char *p, *ep, *limit;
	unsigned long prev, next;
	char* psym;

	extern char *sysmap;
	extern unsigned long sysmap_size;
	if ( !sysmap || !sysmap_size )
		return NULL;
	
	prev = 0;
	psym = NULL;
	p = sysmap;
	limit = p + sysmap_size;
	if( setjmp(bus_error_jmp) == 0 ) {
		debugger_fault_handler = handle_fault;
		sync();
		do {
			next = simple_strtoul(p, &p, 16);
			if (next > addr && prev <= addr) {
				if (!psym)
					goto bail;
				ep = rbuffer;
				p = psym;
				while(*p && p < limit && *p == 32)
					p++;
				while(*p && p < limit && *p != 10 && (ep - rbuffer) < 63)
					*(ep++) = *(p++);
				*(ep++) = 0;
				if (saddr)
					*saddr = prev;
				debugger_fault_handler = 0;
				return rbuffer;
			}
			prev = next;
			psym = p;
			while(*p && p < limit && *p != 10)
				p++;
			if (*p) p++;
		} while(*p && p < limit && next);
bail:
		sync();
	}
	debugger_fault_handler = 0;
	return NULL;
}

unsigned long
xmon_symbol_to_addr(char* symbol)
{
	char *p, *cur;
	char *match;
	int goodness = 0;
	int result = 0;
	
	extern char *sysmap;
	extern unsigned long sysmap_size;
	if ( !sysmap || !sysmap_size )
		return 0;

	if( setjmp(bus_error_jmp) == 0 ) {
		debugger_fault_handler = handle_fault;
		sync();
		cur = sysmap;
		while(cur) {
			cur = strstr(cur, symbol);
			if (cur) {
				int gd = 1;

				/* best match if equal, better match if
				 * begins with
				 */
				if (cur == sysmap || *(cur-1) == ' ') {
					gd++;
					if (cur[strlen(symbol)] == 10)
						gd++;
				}
				if (gd > goodness) {
					match = cur;
					goodness = gd;
					if (gd == 3)
						break;
				}
				cur++;
			}
		}	
		if (goodness) {
			p = match;
			while(p > sysmap && *p != 10)
				p--;
			if (*p == 10) p++;
			result = simple_strtoul(p, &p, 16);
		}
		sync();
	}
	debugger_fault_handler = 0;
	return result;
}		
/*
 * BK Id: SCCS/s.start_8xx.c 1.10 09/14/01 18:01:17 trini
 */
/*
 * Copyright (C) 1996 Paul Mackerras.
 * Copyright (C) 2000 Dan Malek.
 * Quick hack of Paul's code to make XMON work on 8xx processors.  Lots
 * of assumptions, like the SMC1 is used, it has been initialized by the
 * loader at some point, and we can just stuff and suck bytes.
 * We rely upon the 8xx uart driver to support us, as the interface
 * changes between boot up and operational phases of the kernel.
 */
#include <linux/string.h>
#include <asm/machdep.h>
#include <asm/io.h>
#include <asm/page.h>
#include <linux/kernel.h>
#include <asm/processor.h>
#include <asm/8xx_immap.h>
#include <asm/mpc8xx.h>
#include <asm/commproc.h>

extern void xmon_printf(const char *fmt, ...);
extern int xmon_8xx_write(char *str, int nb);
extern int xmon_8xx_read_poll(void);
extern int xmon_8xx_read_char(void);
void prom_drawhex(uint);
void prom_drawstring(const char *str);

static int use_screen = 1; /* default */

#define TB_SPEED	25000000

static inline unsigned int readtb(void)
{
	unsigned int ret;

	asm volatile("mftb %0" : "=r" (ret) :);
	return ret;
}

void buf_access(void)
{
}

void
xmon_map_scc(void)
{

	cpmp = (cpm8xx_t *)&(((immap_t *)IMAP_ADDR)->im_cpm);
	use_screen = 0;
	
	prom_drawstring("xmon uses serial port\n");
}

static int scc_initialized = 0;

void xmon_init_scc(void);

int
xmon_write(void *handle, void *ptr, int nb)
{
	char *p = ptr;
	int i, c, ct;

	if (!scc_initialized)
		xmon_init_scc();

	return(xmon_8xx_write(ptr, nb));
}

int xmon_wants_key;

int
xmon_read(void *handle, void *ptr, int nb)
{
	char *p = ptr;
	int i;

	if (!scc_initialized)
		xmon_init_scc();

	for (i = 0; i < nb; ++i) {
		*p++ = xmon_8xx_read_char();
	}
	return i;
}

int
xmon_read_poll(void)
{
	return(xmon_8xx_read_poll());
}

void
xmon_init_scc()
{
	scc_initialized = 1;
}

#if 0
extern int (*prom_entry)(void *);

int
xmon_exit(void)
{
    struct prom_args {
	char *service;
    } args;

    for (;;) {
	args.service = "exit";
	(*prom_entry)(&args);
    }
}
#endif

void *xmon_stdin;
void *xmon_stdout;
void *xmon_stderr;

void
xmon_init(void)
{
}

int
xmon_putc(int c, void *f)
{
    char ch = c;

    if (c == '\n')
	xmon_putc('\r', f);
    return xmon_write(f, &ch, 1) == 1? c: -1;
}

int
xmon_putchar(int c)
{
    return xmon_putc(c, xmon_stdout);
}

int
xmon_fputs(char *str, void *f)
{
    int n = strlen(str);

    return xmon_write(f, str, n) == n? 0: -1;
}

int
xmon_readchar(void)
{
    char ch;

    for (;;) {
	switch (xmon_read(xmon_stdin, &ch, 1)) {
	case 1:
	    return ch;
	case -1:
	    xmon_printf("read(stdin) returned -1\r\n", 0, 0);
	    return -1;
	}
    }
}

static char line[256];
static char *lineptr;
static int lineleft;

#if 0
int xmon_expect(const char *str, unsigned int timeout)
{
	int c;
	unsigned int t0;

	timeout *= TB_SPEED;
	t0 = readtb();
	do {
		lineptr = line;
		for (;;) {
			c = xmon_read_poll();
			if (c == -1) {
				if (readtb() - t0 > timeout)
					return 0;
				continue;
			}
			if (c == '\n')
				break;
			if (c != '\r' && lineptr < &line[sizeof(line) - 1])
				*lineptr++ = c;
		}
		*lineptr = 0;
	} while (strstr(line, str) == NULL);
	return 1;
}
#endif

int
xmon_getchar(void)
{
    int c;

    if (lineleft == 0) {
	lineptr = line;
	for (;;) {
	    c = xmon_readchar();
	    if (c == -1 || c == 4)
		break;
	    if (c == '\r' || c == '\n') {
		*lineptr++ = '\n';
		xmon_putchar('\n');
		break;
	    }
	    switch (c) {
	    case 0177:
	    case '\b':
		if (lineptr > line) {
		    xmon_putchar('\b');
		    xmon_putchar(' ');
		    xmon_putchar('\b');
		    --lineptr;
		}
		break;
	    case 'U' & 0x1F:
		while (lineptr > line) {
		    xmon_putchar('\b');
		    xmon_putchar(' ');
		    xmon_putchar('\b');
		    --lineptr;
		}
		break;
	    default:
		if (lineptr >= &line[sizeof(line) - 1])
		    xmon_putchar('\a');
		else {
		    xmon_putchar(c);
		    *lineptr++ = c;
		}
	    }
	}
	lineleft = lineptr - line;
	lineptr = line;
    }
    if (lineleft == 0)
	return -1;
    --lineleft;
    return *lineptr++;
}

char *
xmon_fgets(char *str, int nb, void *f)
{
    char *p;
    int c;

    for (p = str; p < str + nb - 1; ) {
	c = xmon_getchar();
	if (c == -1) {
	    if (p == str)
		return 0;
	    break;
	}
	*p++ = c;
	if (c == '\n')
	    break;
    }
    *p = 0;
    return str;
}

void
prom_drawhex(uint val)
{
	unsigned char buf[10];

	int i;
	for (i = 7;  i >= 0;  i--)
	{
		buf[i] = "0123456789abcdef"[val & 0x0f];
		val >>= 4;
	}
	buf[8] = '\0';
	xmon_fputs(buf, xmon_stdout);
}

void
prom_drawstring(const char *str)
{
	xmon_fputs(str, xmon_stdout);
}
# BK Id: SCCS/s.Makefile 1.3 05/17/01 18:14:22 cort
#
#
#
#

O_TARGET			:= math-emu.o

obj-y				:= math.o fmr.o lfd.o stfd.o

obj-$(CONFIG_MATH_EMULATION)	+= fabs.o fadd.o fadds.o fcmpo.o fcmpu.o \
					fctiw.o fctiwz.o fdiv.o fdivs.o \
					fmadd.o fmadds.o fmsub.o fmsubs.o \
					fmul.o fmuls.o fnabs.o fneg.o types.o \
					fnmadd.o fnmadds.o fnmsub.o fnmsubs.o \
					fres.o frsp.o frsqrte.o fsel.o lfs.o \
					fsqrt.o	fsqrts.o fsub.o fsubs.o \
					mcrfs.o mffs.o mtfsb0.o mtfsb1.o \
					mtfsf.o mtfsfi.o stfiwx.o stfs.o \
					udivmodti4.o

include $(TOPDIR)/Rules.make
/*
 * BK Id: SCCS/s.double.h 1.5 05/17/01 18:14:22 cort
 */
/*
 * Definitions for IEEE Double Precision
 */

#if _FP_W_TYPE_SIZE < 32
#error "Here's a nickel kid.  Go buy yourself a real computer."
#endif

#if _FP_W_TYPE_SIZE < 64
#define _FP_FRACTBITS_D		(2 * _FP_W_TYPE_SIZE)
#else
#define _FP_FRACTBITS_D		_FP_W_TYPE_SIZE
#endif

#define _FP_FRACBITS_D		53
#define _FP_FRACXBITS_D		(_FP_FRACTBITS_D - _FP_FRACBITS_D)
#define _FP_WFRACBITS_D		(_FP_WORKBITS + _FP_FRACBITS_D)
#define _FP_WFRACXBITS_D	(_FP_FRACTBITS_D - _FP_WFRACBITS_D)
#define _FP_EXPBITS_D		11
#define _FP_EXPBIAS_D		1023
#define _FP_EXPMAX_D		2047

#define _FP_QNANBIT_D		\
	((_FP_W_TYPE)1 << ((_FP_FRACBITS_D-2) % _FP_W_TYPE_SIZE))
#define _FP_IMPLBIT_D		\
	((_FP_W_TYPE)1 << ((_FP_FRACBITS_D-1) % _FP_W_TYPE_SIZE))
#define _FP_OVERFLOW_D		\
	((_FP_W_TYPE)1 << (_FP_WFRACBITS_D % _FP_W_TYPE_SIZE))

#if _FP_W_TYPE_SIZE < 64

union _FP_UNION_D
{
  double flt;
  struct {
#if __BYTE_ORDER == __BIG_ENDIAN
    unsigned sign  : 1;
    unsigned exp   : _FP_EXPBITS_D;
    unsigned frac1 : _FP_FRACBITS_D - (_FP_IMPLBIT_D != 0) - _FP_W_TYPE_SIZE;
    unsigned frac0 : _FP_W_TYPE_SIZE;
#else
    unsigned frac0 : _FP_W_TYPE_SIZE;
    unsigned frac1 : _FP_FRACBITS_D - (_FP_IMPLBIT_D != 0) - _FP_W_TYPE_SIZE;
    unsigned exp   : _FP_EXPBITS_D;
    unsigned sign  : 1;
#endif
  } bits __attribute__((packed));
};

#define FP_DECL_D(X)		_FP_DECL(2,X)
#define FP_UNPACK_RAW_D(X,val)	_FP_UNPACK_RAW_2(D,X,val)
#define FP_PACK_RAW_D(val,X)	_FP_PACK_RAW_2(D,val,X)

#define FP_UNPACK_D(X,val)		\
  do {					\
    _FP_UNPACK_RAW_2(D,X,val);		\
    _FP_UNPACK_CANONICAL(D,2,X);	\
  } while (0)

#define FP_PACK_D(val,X)		\
  do {					\
    _FP_PACK_CANONICAL(D,2,X);		\
    _FP_PACK_RAW_2(D,val,X);		\
  } while (0)

#define FP_NEG_D(R,X)		_FP_NEG(D,2,R,X)
#define FP_ADD_D(R,X,Y)		_FP_ADD(D,2,R,X,Y)
#define FP_SUB_D(R,X,Y)		_FP_SUB(D,2,R,X,Y)
#define FP_MUL_D(R,X,Y)		_FP_MUL(D,2,R,X,Y)
#define FP_DIV_D(R,X,Y)		_FP_DIV(D,2,R,X,Y)
#define FP_SQRT_D(R,X)		_FP_SQRT(D,2,R,X)

#define FP_CMP_D(r,X,Y,un)	_FP_CMP(D,2,r,X,Y,un)
#define FP_CMP_EQ_D(r,X,Y)	_FP_CMP_EQ(D,2,r,X,Y)

#define FP_TO_INT_D(r,X,rsz,rsg)  _FP_TO_INT(D,2,r,X,rsz,rsg)
#define FP_FROM_INT_D(X,r,rs,rt)  _FP_FROM_INT(D,2,X,r,rs,rt)

#else

union _FP_UNION_D
{
  double flt;
  struct {
#if __BYTE_ORDER == __BIG_ENDIAN
    unsigned sign : 1;
    unsigned exp  : _FP_EXPBITS_D;
    unsigned long frac : _FP_FRACBITS_D - (_FP_IMPLBIT_D != 0);
#else
    unsigned long frac : _FP_FRACBITS_D - (_FP_IMPLBIT_D != 0);
    unsigned exp  : _FP_EXPBITS_D;
    unsigned sign : 1;
#endif
  } bits __attribute__((packed));
};

#define FP_DECL_D(X)		_FP_DECL(1,X)
#define FP_UNPACK_RAW_D(X,val)	_FP_UNPACK_RAW_1(D,X,val)
#define FP_PACK_RAW_D(val,X)	_FP_PACK_RAW_1(D,val,X)

#define FP_UNPACK_D(X,val)		\
  do {					\
    _FP_UNPACK_RAW_1(D,X,val);		\
    _FP_UNPACK_CANONICAL(D,1,X);	\
  } while (0)

#define FP_PACK_D(val,X)		\
  do {					\
    _FP_PACK_CANONICAL(D,1,X);		\
    _FP_PACK_RAW_1(D,val,X);		\
  } while (0)

#define FP_NEG_D(R,X)		_FP_NEG(D,1,R,X)
#define FP_ADD_D(R,X,Y)		_FP_ADD(D,1,R,X,Y)
#define FP_SUB_D(R,X,Y)		_FP_SUB(D,1,R,X,Y)
#define FP_MUL_D(R,X,Y)		_FP_MUL(D,1,R,X,Y)
#define FP_DIV_D(R,X,Y)		_FP_DIV(D,1,R,X,Y)
#define FP_SQRT_D(R,X)		_FP_SQRT(D,1,R,X)

/* The implementation of _FP_MUL_D and _FP_DIV_D should be chosen by
   the target machine.  */

#define FP_CMP_D(r,X,Y,un)	_FP_CMP(D,1,r,X,Y,un)
#define FP_CMP_EQ_D(r,X,Y)	_FP_CMP_EQ(D,1,r,X,Y)

#define FP_TO_INT_D(r,X,rsz,rsg)  _FP_TO_INT(D,1,r,X,rsz,rsg)
#define FP_FROM_INT_D(X,r,rs,rt)  _FP_FROM_INT(D,1,X,r,rs,rt)

#endif /* W_TYPE_SIZE < 64 */
/*
 * BK Id: SCCS/s.fabs.c 1.6 05/17/01 18:14:22 cort
 */
#include <linux/types.h>
#include <linux/errno.h>
#include <asm/uaccess.h>

int
fabs(u32 *frD, u32 *frB)
{
	frD[0] = frB[0] & 0x7fffffff;
	frD[1] = frB[1];

#ifdef DEBUG
	printk("%s: D %p, B %p: ", __FUNCTION__, frD, frB);
	dump_double(frD);
	printk("\n");
#endif

	return 0;
}
/*
 * BK Id: SCCS/s.fadd.c 1.6 05/17/01 18:14:22 cort
 */
#include <linux/types.h>
#include <linux/errno.h>
#include <asm/uaccess.h>

#include "soft-fp.h"
#include "double.h"

int
fadd(void *frD, void *frA, void *frB)
{
	FP_DECL_D(A);
	FP_DECL_D(B);
	FP_DECL_D(R);
	int ret = 0;

#ifdef DEBUG
	printk("%s: %p %p %p\n", __FUNCTION__, frD, frA, frB);
#endif

	__FP_UNPACK_D(A, frA);
	__FP_UNPACK_D(B, frB);

#ifdef DEBUG
	printk("A: %ld %lu %lu %ld (%ld)\n", A_s, A_f1, A_f0, A_e, A_c);
	printk("B: %ld %lu %lu %ld (%ld)\n", B_s, B_f1, B_f0, B_e, B_c);
#endif

	if (A_s != B_s && A_c == FP_CLS_INF && B_c == FP_CLS_INF)
		ret |= EFLAG_VXISI;

	FP_ADD_D(R, A, B);

#ifdef DEBUG
	printk("D: %ld %lu %lu %ld (%ld)\n", R_s, R_f1, R_f0, R_e, R_c);
#endif

	return (ret | __FP_PACK_D(frD, R));
}
/*
 * BK Id: SCCS/s.fadds.c 1.6 05/17/01 18:14:22 cort
 */
#include <linux/types.h>
#include <linux/errno.h>
#include <asm/uaccess.h>

#include "soft-fp.h"
#include "double.h"
#include "single.h"

int
fadds(void *frD, void *frA, void *frB)
{
	FP_DECL_D(A);
	FP_DECL_D(B);
	FP_DECL_D(R);
	int ret = 0;

#ifdef DEBUG
	printk("%s: %p %p %p\n", __FUNCTION__, frD, frA, frB);
#endif

	__FP_UNPACK_D(A, frA);
	__FP_UNPACK_D(B, frB);

#ifdef DEBUG
	printk("A: %ld %lu %lu %ld (%ld)\n", A_s, A_f1, A_f0, A_e, A_c);
	printk("B: %ld %lu %lu %ld (%ld)\n", B_s, B_f1, B_f0, B_e, B_c);
#endif

	if (A_s != B_s && A_c == FP_CLS_INF && B_c == FP_CLS_INF)
		ret |= EFLAG_VXISI;

	FP_ADD_D(R, A, B);

#ifdef DEBUG
	printk("D: %ld %lu %lu %ld (%ld)\n", R_s, R_f1, R_f0, R_e, R_c);
#endif

	return (ret | __FP_PACK_DS(frD, R));
}
/*
 * BK Id: SCCS/s.fcmpo.c 1.6 05/17/01 18:14:22 cort
 */
#include <linux/types.h>
#include <linux/errno.h>
#include <asm/uaccess.h>

#include "soft-fp.h"
#include "double.h"

int
fcmpo(u32 *ccr, int crfD, void *frA, void *frB)
{
	FP_DECL_D(A);
	FP_DECL_D(B);
	int code[4] = { (1 << 3), (1 << 1), (1 << 2), (1 << 0) };
	long cmp;
	int ret = 0;

#ifdef DEBUG
	printk("%s: %p (%08x) %d %p %p\n", __FUNCTION__, ccr, *ccr, crfD, frA, frB);
#endif

	__FP_UNPACK_D(A, frA);
	__FP_UNPACK_D(B, frB);

#ifdef DEBUG
	printk("A: %ld %lu %lu %ld (%ld)\n", A_s, A_f1, A_f0, A_e, A_c);
	printk("B: %ld %lu %lu %ld (%ld)\n", B_s, B_f1, B_f0, B_e, B_c);
#endif

	if (A_c == FP_CLS_NAN || B_c == FP_CLS_NAN)
		ret |= EFLAG_VXVC;

	FP_CMP_D(cmp, A, B, 2);
	cmp = code[(cmp + 1) & 3];

	__FPU_FPSCR &= ~(0x1f000);
	__FPU_FPSCR |= (cmp << 12);

	*ccr &= ~(15 << ((7 - crfD) << 2));
	*ccr |= (cmp << ((7 - crfD) << 2));
 
#ifdef DEBUG
	printk("CR: %08x\n", *ccr);
#endif

	return ret;
}
/*
 * BK Id: SCCS/s.fcmpu.c 1.6 05/17/01 18:14:22 cort
 */
#include <linux/types.h>
#include <linux/errno.h>
#include <asm/uaccess.h>

#include "soft-fp.h"
#include "double.h"

int
fcmpu(u32 *ccr, int crfD, void *frA, void *frB)
{
	FP_DECL_D(A);
	FP_DECL_D(B);
	int code[4] = { (1 << 3), (1 << 1), (1 << 2), (1 << 0) };
	long cmp;

#ifdef DEBUG
	printk("%s: %p (%08x) %d %p %p\n", __FUNCTION__, ccr, *ccr, crfD, frA, frB);
#endif

	__FP_UNPACK_D(A, frA);
	__FP_UNPACK_D(B, frB);

#ifdef DEBUG
	printk("A: %ld %lu %lu %ld (%ld)\n", A_s, A_f1, A_f0, A_e, A_c);
	printk("B: %ld %lu %lu %ld (%ld)\n", B_s, B_f1, B_f0, B_e, B_c);
#endif

	FP_CMP_D(cmp, A, B, 2);
	cmp = code[(cmp + 1) & 3];

	__FPU_FPSCR &= ~(0x1f000);
	__FPU_FPSCR |= (cmp << 12);

	*ccr &= ~(15 << ((7 - crfD) << 2));
	*ccr |= (cmp << ((7 - crfD) << 2));

#ifdef DEBUG
	printk("CR: %08x\n", *ccr);
#endif

	return 0;
}
/*
 * BK Id: SCCS/s.fctiw.c 1.6 05/17/01 18:14:22 cort
 */
#include <linux/types.h>
#include <linux/errno.h>
#include <asm/uaccess.h>

#include "soft-fp.h"
#include "double.h"

int
fctiw(u32 *frD, void *frB)
{
	FP_DECL_D(B);
	unsigned int r;

	__FP_UNPACK_D(B, frB);
	FP_TO_INT_D(r, B, 32, 1);
	frD[1] = r;

#ifdef DEBUG
	printk("%s: D %p, B %p: ", __FUNCTION__, frD, frB);
	dump_double(frD);
	printk("\n");
#endif

	return 0;
}
/*
 * BK Id: SCCS/s.fctiwz.c 1.6 05/17/01 18:14:22 cort
 */
#include <linux/types.h>
#include <linux/errno.h>
#include <asm/uaccess.h>

#include "soft-fp.h"
#include "double.h"

int
fctiwz(u32 *frD, void *frB)
{
	FP_DECL_D(B);
	u32 fpscr;
	unsigned int r;

	fpscr = __FPU_FPSCR;
	__FPU_FPSCR &= ~(3);
	__FPU_FPSCR |= FP_RND_ZERO;

	__FP_UNPACK_D(B, frB);
	FP_TO_INT_D(r, B, 32, 1);
	frD[1] = r;

	__FPU_FPSCR = fpscr;

#ifdef DEBUG
	printk("%s: D %p, B %p: ", __FUNCTION__, frD, frB);
	dump_double(frD);
	printk("\n");
#endif

	return 0;
}
/*
 * BK Id: SCCS/s.fdiv.c 1.6 05/17/01 18:14:22 cort
 */
#include <linux/types.h>
#include <linux/errno.h>
#include <asm/uaccess.h>

#include "soft-fp.h"
#include "double.h"

int
fdiv(void *frD, void *frA, void *frB)
{
	FP_DECL_D(A);
	FP_DECL_D(B);
	FP_DECL_D(R);
	int ret = 0;

#ifdef DEBUG
	printk("%s: %p %p %p\n", __FUNCTION__, frD, frA, frB);
#endif

	__FP_UNPACK_D(A, frA);
	__FP_UNPACK_D(B, frB);

#ifdef DEBUG
	printk("A: %ld %lu %lu %ld (%ld)\n", A_s, A_f1, A_f0, A_e, A_c);
	printk("B: %ld %lu %lu %ld (%ld)\n", B_s, B_f1, B_f0, B_e, B_c);
#endif

	if (A_c == FP_CLS_ZERO && B_c == FP_CLS_ZERO) {
		ret |= EFLAG_VXZDZ;
#ifdef DEBUG
		printk("%s: FPSCR_VXZDZ raised\n", __FUNCTION__);
#endif
	}
	if (A_c == FP_CLS_INF && B_c == FP_CLS_INF) {
		ret |= EFLAG_VXIDI;
#ifdef DEBUG
		printk("%s: FPSCR_VXIDI raised\n", __FUNCTION__);
#endif
	}

	if (B_c == FP_CLS_ZERO && A_c != FP_CLS_ZERO) {
		ret |= EFLAG_DIVZERO;
		if (__FPU_TRAP_P(EFLAG_DIVZERO))
			return ret;
	}
	FP_DIV_D(R, A, B);

#ifdef DEBUG
	printk("D: %ld %lu %lu %ld (%ld)\n", R_s, R_f1, R_f0, R_e, R_c);
#endif

	return (ret | __FP_PACK_D(frD, R));
}
/*
 * BK Id: SCCS/s.fdivs.c 1.6 05/17/01 18:14:22 cort
 */
#include <linux/types.h>
#include <linux/errno.h>
#include <asm/uaccess.h>

#include "soft-fp.h"
#include "double.h"
#include "single.h"

int
fdivs(void *frD, void *frA, void *frB)
{
	FP_DECL_D(A);
	FP_DECL_D(B);
	FP_DECL_D(R);
	int ret = 0;

#ifdef DEBUG
	printk("%s: %p %p %p\n", __FUNCTION__, frD, frA, frB);
#endif

	__FP_UNPACK_D(A, frA);
	__FP_UNPACK_D(B, frB);

#ifdef DEBUG
	printk("A: %ld %lu %lu %ld (%ld)\n", A_s, A_f1, A_f0, A_e, A_c);
	printk("B: %ld %lu %lu %ld (%ld)\n", B_s, B_f1, B_f0, B_e, B_c);
#endif

	if (A_c == FP_CLS_ZERO && B_c == FP_CLS_ZERO) {
		ret |= EFLAG_VXZDZ;
#ifdef DEBUG
		printk("%s: FPSCR_VXZDZ raised\n", __FUNCTION__);
#endif
	}
	if (A_c == FP_CLS_INF && B_c == FP_CLS_INF) {
		ret |= EFLAG_VXIDI;
#ifdef DEBUG
		printk("%s: FPSCR_VXIDI raised\n", __FUNCTION__);
#endif
	}

	if (B_c == FP_CLS_ZERO && A_c != FP_CLS_ZERO) {
		ret |= EFLAG_DIVZERO;
		if (__FPU_TRAP_P(EFLAG_DIVZERO))
			return ret;
	}

	FP_DIV_D(R, A, B);

#ifdef DEBUG
	printk("D: %ld %lu %lu %ld (%ld)\n", R_s, R_f1, R_f0, R_e, R_c);
#endif

	return (ret | __FP_PACK_DS(frD, R));
}
/*
 * BK Id: SCCS/s.fmadd.c 1.6 05/17/01 18:14:22 cort
 */
#include <linux/types.h>
#include <linux/errno.h>
#include <asm/uaccess.h>

#include "soft-fp.h"
#include "double.h"

int
fmadd(void *frD, void *frA, void *frB, void *frC)
{
	FP_DECL_D(R);
	FP_DECL_D(A);
	FP_DECL_D(B);
	FP_DECL_D(C);
	FP_DECL_D(T);
	int ret = 0;

#ifdef DEBUG
	printk("%s: %p %p %p %p\n", __FUNCTION__, frD, frA, frB, frC);
#endif

	__FP_UNPACK_D(A, frA);
	__FP_UNPACK_D(B, frB);
	__FP_UNPACK_D(C, frC);

#ifdef DEBUG
	printk("A: %ld %lu %lu %ld (%ld)\n", A_s, A_f1, A_f0, A_e, A_c);
	printk("B: %ld %lu %lu %ld (%ld)\n", B_s, B_f1, B_f0, B_e, B_c);
	printk("C: %ld %lu %lu %ld (%ld)\n", C_s, C_f1, C_f0, C_e, C_c);
#endif

	if ((A_c == FP_CLS_INF && C_c == FP_CLS_ZERO) ||
	    (A_c == FP_CLS_ZERO && C_c == FP_CLS_INF))
                ret |= EFLAG_VXIMZ;

	FP_MUL_D(T, A, C);

	if (T_s != B_s && T_c == FP_CLS_INF && B_c == FP_CLS_INF)
		ret |= EFLAG_VXISI;

	FP_ADD_D(R, T, B);

#ifdef DEBUG
	printk("D: %ld %lu %lu %ld (%ld)\n", R_s, R_f1, R_f0, R_e, R_c);
#endif

	return (ret | __FP_PACK_D(frD, R));
}
/*
 * BK Id: SCCS/s.fmadds.c 1.6 05/17/01 18:14:22 cort
 */
#include <linux/types.h>
#include <linux/errno.h>
#include <asm/uaccess.h>

#include "soft-fp.h"
#include "double.h"
#include "single.h"

int
fmadds(void *frD, void *frA, void *frB, void *frC)
{
	FP_DECL_D(R);
	FP_DECL_D(A);
	FP_DECL_D(B);
	FP_DECL_D(C);
	FP_DECL_D(T);
	int ret = 0;

#ifdef DEBUG
	printk("%s: %p %p %p %p\n", __FUNCTION__, frD, frA, frB, frC);
#endif

	__FP_UNPACK_D(A, frA);
	__FP_UNPACK_D(B, frB);
	__FP_UNPACK_D(C, frC);

#ifdef DEBUG
	printk("A: %ld %lu %lu %ld (%ld)\n", A_s, A_f1, A_f0, A_e, A_c);
	printk("B: %ld %lu %lu %ld (%ld)\n", B_s, B_f1, B_f0, B_e, B_c);
	printk("C: %ld %lu %lu %ld (%ld)\n", C_s, C_f1, C_f0, C_e, C_c);
#endif

	if ((A_c == FP_CLS_INF && C_c == FP_CLS_ZERO) ||
	    (A_c == FP_CLS_ZERO && C_c == FP_CLS_INF))
                ret |= EFLAG_VXIMZ;

	FP_MUL_D(T, A, C);

	if (T_s != B_s && T_c == FP_CLS_INF && B_c == FP_CLS_INF)
		ret |= EFLAG_VXISI;

	FP_ADD_D(R, T, B);

#ifdef DEBUG
	printk("D: %ld %lu %lu %ld (%ld)\n", R_s, R_f1, R_f0, R_e, R_c);
#endif

	return (ret | __FP_PACK_DS(frD, R));
}
/*
 * BK Id: SCCS/s.fmr.c 1.6 05/17/01 18:14:22 cort
 */
#include <linux/types.h>
#include <linux/errno.h>
#include <asm/uaccess.h>

int
fmr(u32 *frD, u32 *frB)
{
	frD[0] = frB[0];
	frD[1] = frB[1];

#ifdef DEBUG
	printk("%s: D %p, B %p: ", __FUNCTION__, frD, frB);
	dump_double(frD);
	printk("\n");
#endif

	return 0;
}
/*
 * BK Id: SCCS/s.fmsub.c 1.6 05/17/01 18:14:22 cort
 */
#include <linux/types.h>
#include <linux/errno.h>
#include <asm/uaccess.h>

#include "soft-fp.h"
#include "double.h"

int
fmsub(void *frD, void *frA, void *frB, void *frC)
{
	FP_DECL_D(R);
	FP_DECL_D(A);
	FP_DECL_D(B);
	FP_DECL_D(C);
	FP_DECL_D(T);
	int ret = 0;

#ifdef DEBUG
	printk("%s: %p %p %p %p\n", __FUNCTION__, frD, frA, frB, frC);
#endif

	__FP_UNPACK_D(A, frA);
	__FP_UNPACK_D(B, frB);
	__FP_UNPACK_D(C, frC);

#ifdef DEBUG
	printk("A: %ld %lu %lu %ld (%ld)\n", A_s, A_f1, A_f0, A_e, A_c);
	printk("B: %ld %lu %lu %ld (%ld)\n", B_s, B_f1, B_f0, B_e, B_c);
	printk("C: %ld %lu %lu %ld (%ld)\n", C_s, C_f1, C_f0, C_e, C_c);
#endif

	if ((A_c == FP_CLS_INF && C_c == FP_CLS_ZERO) ||
	    (A_c == FP_CLS_ZERO && C_c == FP_CLS_INF))
		ret |= EFLAG_VXIMZ;

	FP_MUL_D(T, A, C);

	if (B_c != FP_CLS_NAN)
		B_s ^= 1;

	if (T_s != B_s && T_c == FP_CLS_INF && B_c == FP_CLS_INF)
		ret |= EFLAG_VXISI;

	FP_ADD_D(R, T, B);

#ifdef DEBUG
	printk("D: %ld %lu %lu %ld (%ld)\n", R_s, R_f1, R_f0, R_e, R_c);
#endif

	return (ret | __FP_PACK_D(frD, R));
}
/*
 * BK Id: SCCS/s.fmsubs.c 1.6 05/17/01 18:14:22 cort
 */
#include <linux/types.h>
#include <linux/errno.h>
#include <asm/uaccess.h>

#include "soft-fp.h"
#include "double.h"
#include "single.h"

int
fmsubs(void *frD, void *frA, void *frB, void *frC)
{
	FP_DECL_D(R);
	FP_DECL_D(A);
	FP_DECL_D(B);
	FP_DECL_D(C);
	FP_DECL_D(T);
	int ret = 0;

#ifdef DEBUG
	printk("%s: %p %p %p %p\n", __FUNCTION__, frD, frA, frB, frC);
#endif

	__FP_UNPACK_D(A, frA);
	__FP_UNPACK_D(B, frB);
	__FP_UNPACK_D(C, frC);

#ifdef DEBUG
	printk("A: %ld %lu %lu %ld (%ld)\n", A_s, A_f1, A_f0, A_e, A_c);
	printk("B: %ld %lu %lu %ld (%ld)\n", B_s, B_f1, B_f0, B_e, B_c);
	printk("C: %ld %lu %lu %ld (%ld)\n", C_s, C_f1, C_f0, C_e, C_c);
#endif

	if ((A_c == FP_CLS_INF && C_c == FP_CLS_ZERO) ||
	    (A_c == FP_CLS_ZERO && C_c == FP_CLS_INF))
		ret |= EFLAG_VXIMZ;

	FP_MUL_D(T, A, C);

	if (B_c != FP_CLS_NAN)
		B_s ^= 1;

	if (T_s != B_s && T_c == FP_CLS_INF && B_c == FP_CLS_INF)
		ret |= EFLAG_VXISI;

	FP_ADD_D(R, T, B);

#ifdef DEBUG
	printk("D: %ld %lu %lu %ld (%ld)\n", R_s, R_f1, R_f0, R_e, R_c);
#endif

	return (ret | __FP_PACK_DS(frD, R));
}
/*
 * BK Id: SCCS/s.fmul.c 1.6 05/17/01 18:14:22 cort
 */
#include <linux/types.h>
#include <linux/errno.h>
#include <asm/uaccess.h>

#include "soft-fp.h"
#include "double.h"

int
fmul(void *frD, void *frA, void *frB)
{
	FP_DECL_D(A);
	FP_DECL_D(B);
	FP_DECL_D(R);
	int ret = 0;

#ifdef DEBUG
	printk("%s: %p %p %p\n", __FUNCTION__, frD, frA, frB);
#endif

	__FP_UNPACK_D(A, frA);
	__FP_UNPACK_D(B, frB);

#ifdef DEBUG
	printk("A: %ld %lu %lu %ld (%ld) [%08lx.%08lx %lx]\n",
	       A_s, A_f1, A_f0, A_e, A_c, A_f1, A_f0, A_e + 1023);
	printk("B: %ld %lu %lu %ld (%ld) [%08lx.%08lx %lx]\n",
	       B_s, B_f1, B_f0, B_e, B_c, B_f1, B_f0, B_e + 1023);
#endif

	if ((A_c == FP_CLS_INF && B_c == FP_CLS_ZERO) ||
	    (A_c == FP_CLS_ZERO && B_c == FP_CLS_INF))
		ret |= EFLAG_VXIMZ;

	FP_MUL_D(R, A, B);

#ifdef DEBUG
	printk("D: %ld %lu %lu %ld (%ld) [%08lx.%08lx %lx]\n",
	       R_s, R_f1, R_f0, R_e, R_c, R_f1, R_f0, R_e + 1023);
#endif

	return (ret | __FP_PACK_D(frD, R));
}
/*
 * BK Id: SCCS/s.fmuls.c 1.6 05/17/01 18:14:22 cort
 */
#include <linux/types.h>
#include <linux/errno.h>
#include <asm/uaccess.h>

#include "soft-fp.h"
#include "double.h"
#include "single.h"

int
fmuls(void *frD, void *frA, void *frB)
{
	FP_DECL_D(A);
	FP_DECL_D(B);
	FP_DECL_D(R);
	int ret = 0;

#ifdef DEBUG
	printk("%s: %p %p %p\n", __FUNCTION__, frD, frA, frB);
#endif

	__FP_UNPACK_D(A, frA);
	__FP_UNPACK_D(B, frB);

#ifdef DEBUG
	printk("A: %ld %lu %lu %ld (%ld) [%08lx.%08lx %lx]\n",
	       A_s, A_f1, A_f0, A_e, A_c, A_f1, A_f0, A_e + 1023);
	printk("B: %ld %lu %lu %ld (%ld) [%08lx.%08lx %lx]\n",
	       B_s, B_f1, B_f0, B_e, B_c, B_f1, B_f0, B_e + 1023);
#endif

	if ((A_c == FP_CLS_INF && B_c == FP_CLS_ZERO) ||
	    (A_c == FP_CLS_ZERO && B_c == FP_CLS_INF))
		ret |= EFLAG_VXIMZ;

	FP_MUL_D(R, A, B);

#ifdef DEBUG
	printk("D: %ld %lu %lu %ld (%ld) [%08lx.%08lx %lx]\n",
	       R_s, R_f1, R_f0, R_e, R_c, R_f1, R_f0, R_e + 1023);
#endif

	return (ret | __FP_PACK_DS(frD, R));
}
/*
 * BK Id: SCCS/s.fnabs.c 1.6 05/17/01 18:14:22 cort
 */
#include <linux/types.h>
#include <linux/errno.h>
#include <asm/uaccess.h>

int
fnabs(u32 *frD, u32 *frB)
{
	frD[0] = frB[0] | 0x80000000;
	frD[1] = frB[1];

#ifdef DEBUG
	printk("%s: D %p, B %p: ", __FUNCTION__, frD, frB);
	dump_double(frD);
	printk("\n");
#endif

	return 0;
}
/*
 * BK Id: SCCS/s.fneg.c 1.6 05/17/01 18:14:22 cort
 */
#include <linux/types.h>
#include <linux/errno.h>
#include <asm/uaccess.h>

int
fneg(u32 *frD, u32 *frB)
{
	frD[0] = frB[0] ^ 0x80000000;
	frD[1] = frB[1];

#ifdef DEBUG
	printk("%s: D %p, B %p: ", __FUNCTION__, frD, frB);
	dump_double(frD);
	printk("\n");
#endif

	return 0;
}
/*
 * BK Id: SCCS/s.fnmadd.c 1.6 05/17/01 18:14:22 cort
 */
#include <linux/types.h>
#include <linux/errno.h>
#include <asm/uaccess.h>

#include "soft-fp.h"
#include "double.h"

int
fnmadd(void *frD, void *frA, void *frB, void *frC)
{
	FP_DECL_D(R);
	FP_DECL_D(A);
	FP_DECL_D(B);
	FP_DECL_D(C);
	FP_DECL_D(T);
	int ret = 0;

#ifdef DEBUG
	printk("%s: %p %p %p %p\n", __FUNCTION__, frD, frA, frB, frC);
#endif

	__FP_UNPACK_D(A, frA);
	__FP_UNPACK_D(B, frB);
	__FP_UNPACK_D(C, frC);

#ifdef DEBUG
	printk("A: %ld %lu %lu %ld (%ld)\n", A_s, A_f1, A_f0, A_e, A_c);
	printk("B: %ld %lu %lu %ld (%ld)\n", B_s, B_f1, B_f0, B_e, B_c);
	printk("C: %ld %lu %lu %ld (%ld)\n", C_s, C_f1, C_f0, C_e, C_c);
#endif

	if ((A_c == FP_CLS_INF && C_c == FP_CLS_ZERO) ||
	    (A_c == FP_CLS_ZERO && C_c == FP_CLS_INF))
                ret |= EFLAG_VXIMZ;

	FP_MUL_D(T, A, C);

	if (T_s != B_s && T_c == FP_CLS_INF && B_c == FP_CLS_INF)
		ret |= EFLAG_VXISI;

	FP_ADD_D(R, T, B);

	if (R_c != FP_CLS_NAN)
		R_s ^= 1;

#ifdef DEBUG
	printk("D: %ld %lu %lu %ld (%ld)\n", R_s, R_f1, R_f0, R_e, R_c);
#endif

	return (ret | __FP_PACK_D(frD, R));
}
/*
 * BK Id: SCCS/s.fnmadds.c 1.6 05/17/01 18:14:22 cort
 */
#include <linux/types.h>
#include <linux/errno.h>
#include <asm/uaccess.h>

#include "soft-fp.h"
#include "double.h"
#include "single.h"

int
fnmadds(void *frD, void *frA, void *frB, void *frC)
{
	FP_DECL_D(R);
	FP_DECL_D(A);
	FP_DECL_D(B);
	FP_DECL_D(C);
	FP_DECL_D(T);
	int ret = 0;

#ifdef DEBUG
	printk("%s: %p %p %p %p\n", __FUNCTION__, frD, frA, frB, frC);
#endif

	__FP_UNPACK_D(A, frA);
	__FP_UNPACK_D(B, frB);
	__FP_UNPACK_D(C, frC);

#ifdef DEBUG
	printk("A: %ld %lu %lu %ld (%ld)\n", A_s, A_f1, A_f0, A_e, A_c);
	printk("B: %ld %lu %lu %ld (%ld)\n", B_s, B_f1, B_f0, B_e, B_c);
	printk("C: %ld %lu %lu %ld (%ld)\n", C_s, C_f1, C_f0, C_e, C_c);
#endif

	if ((A_c == FP_CLS_INF && C_c == FP_CLS_ZERO) ||
	    (A_c == FP_CLS_ZERO && C_c == FP_CLS_INF))
                ret |= EFLAG_VXIMZ;

	FP_MUL_D(T, A, C);

	if (T_s != B_s && T_c == FP_CLS_INF && B_c == FP_CLS_INF)
		ret |= EFLAG_VXISI;

	FP_ADD_D(R, T, B);

	if (R_c != FP_CLS_NAN)
		R_s ^= 1;

#ifdef DEBUG
	printk("D: %ld %lu %lu %ld (%ld)\n", R_s, R_f1, R_f0, R_e, R_c);
#endif

	return (ret | __FP_PACK_DS(frD, R));
}
/*
 * BK Id: SCCS/s.fnmsub.c 1.6 05/17/01 18:14:22 cort
 */
#include <linux/types.h>
#include <linux/errno.h>
#include <asm/uaccess.h>

#include "soft-fp.h"
#include "double.h"

int
fnmsub(void *frD, void *frA, void *frB, void *frC)
{
	FP_DECL_D(R);
	FP_DECL_D(A);
	FP_DECL_D(B);
	FP_DECL_D(C);
	FP_DECL_D(T);
	int ret = 0;

#ifdef DEBUG
	printk("%s: %p %p %p %p\n", __FUNCTION__, frD, frA, frB, frC);
#endif

	__FP_UNPACK_D(A, frA);
	__FP_UNPACK_D(B, frB);
	__FP_UNPACK_D(C, frC);

#ifdef DEBUG
	printk("A: %ld %lu %lu %ld (%ld)\n", A_s, A_f1, A_f0, A_e, A_c);
	printk("B: %ld %lu %lu %ld (%ld)\n", B_s, B_f1, B_f0, B_e, B_c);
	printk("C: %ld %lu %lu %ld (%ld)\n", C_s, C_f1, C_f0, C_e, C_c);
#endif

	if ((A_c == FP_CLS_INF && C_c == FP_CLS_ZERO) ||
	    (A_c == FP_CLS_ZERO && C_c == FP_CLS_INF))
		ret |= EFLAG_VXIMZ;

	FP_MUL_D(T, A, C);

	if (B_c != FP_CLS_NAN)
		B_s ^= 1;

	if (T_s != B_s && T_c == FP_CLS_INF && B_c == FP_CLS_INF)
		ret |= EFLAG_VXISI;

	FP_ADD_D(R, T, B);

	if (R_c != FP_CLS_NAN)
		R_s ^= 1;

#ifdef DEBUG
	printk("D: %ld %lu %lu %ld (%ld)\n", R_s, R_f1, R_f0, R_e, R_c);
#endif

	return (ret | __FP_PACK_D(frD, R));
}
/*
 * BK Id: SCCS/s.fnmsubs.c 1.6 05/17/01 18:14:22 cort
 */
#include <linux/types.h>
#include <linux/errno.h>
#include <asm/uaccess.h>

#include "soft-fp.h"
#include "double.h"
#include "single.h"

int
fnmsubs(void *frD, void *frA, void *frB, void *frC)
{
	FP_DECL_D(R);
	FP_DECL_D(A);
	FP_DECL_D(B);
	FP_DECL_D(C);
	FP_DECL_D(T);
	int ret = 0;

#ifdef DEBUG
	printk("%s: %p %p %p %p\n", __FUNCTION__, frD, frA, frB, frC);
#endif

	__FP_UNPACK_D(A, frA);
	__FP_UNPACK_D(B, frB);
	__FP_UNPACK_D(C, frC);

#ifdef DEBUG
	printk("A: %ld %lu %lu %ld (%ld)\n", A_s, A_f1, A_f0, A_e, A_c);
	printk("B: %ld %lu %lu %ld (%ld)\n", B_s, B_f1, B_f0, B_e, B_c);
	printk("C: %ld %lu %lu %ld (%ld)\n", C_s, C_f1, C_f0, C_e, C_c);
#endif

	if ((A_c == FP_CLS_INF && C_c == FP_CLS_ZERO) ||
	    (A_c == FP_CLS_ZERO && C_c == FP_CLS_INF))
		ret |= EFLAG_VXIMZ;

	FP_MUL_D(T, A, C);

	if (B_c != FP_CLS_NAN)
		B_s ^= 1;

	if (T_s != B_s && T_c == FP_CLS_INF && B_c == FP_CLS_INF)
		ret |= EFLAG_VXISI;

	FP_ADD_D(R, T, B);

	if (R_c != FP_CLS_NAN)
		R_s ^= 1;

#ifdef DEBUG
	printk("D: %ld %lu %lu %ld (%ld)\n", R_s, R_f1, R_f0, R_e, R_c);
#endif

	return (ret | __FP_PACK_DS(frD, R));
}
/*
 * BK Id: SCCS/s.fres.c 1.6 05/17/01 18:14:22 cort
 */
#include <linux/types.h>
#include <linux/errno.h>
#include <asm/uaccess.h>

int
fres(void *frD, void *frB)
{
#ifdef DEBUG
	printk("%s: %p %p\n", __FUNCTION__, frD, frB);
#endif
	return -ENOSYS;
}
/*
 * BK Id: SCCS/s.frsp.c 1.6 05/17/01 18:14:22 cort
 */
#include <linux/types.h>
#include <linux/errno.h>
#include <asm/uaccess.h>

#include "soft-fp.h"
#include "double.h"
#include "single.h"

int
frsp(void *frD, void *frB)
{
	FP_DECL_D(B);

#ifdef DEBUG
	printk("%s: D %p, B %p\n", __FUNCTION__, frD, frB);
#endif

	__FP_UNPACK_D(B, frB);

#ifdef DEBUG
	printk("B: %ld %lu %lu %ld (%ld)\n", B_s, B_f1, B_f0, B_e, B_c);
#endif

	return __FP_PACK_DS(frD, B);
}
/*
 * BK Id: SCCS/s.frsqrte.c 1.6 05/17/01 18:14:22 cort
 */
#include <linux/types.h>
#include <linux/errno.h>
#include <asm/uaccess.h>

int
frsqrte(void *frD, void *frB)
{
#ifdef DEBUG
	printk("%s: %p %p\n", __FUNCTION__, frD, frB);
#endif
	return 0;
}
/*
 * BK Id: SCCS/s.fsel.c 1.6 05/17/01 18:14:22 cort
 */
#include <linux/types.h>
#include <linux/errno.h>
#include <asm/uaccess.h>

#include "soft-fp.h"
#include "double.h"

int
fsel(u32 *frD, void *frA, u32 *frB, u32 *frC)
{
	FP_DECL_D(A);

#ifdef DEBUG
	printk("%s: %p %p %p %p\n", __FUNCTION__, frD, frA, frB, frC);
#endif

	__FP_UNPACK_D(A, frA);

#ifdef DEBUG
	printk("A: %ld %lu %lu %ld (%ld)\n", A_s, A_f1, A_f0, A_e, A_c);
	printk("B: %08x %08x\n", frB[0], frB[1]);
	printk("C: %08x %08x\n", frC[0], frC[1]);
#endif

	if (A_c == FP_CLS_NAN || (A_c != FP_CLS_ZERO && A_s)) {
		frD[0] = frB[0];
		frD[1] = frB[1];
	} else {
		frD[0] = frC[0];
		frD[1] = frC[1];
	}

#ifdef DEBUG
	printk("D: %08x.%08x\n", frD[0], frD[1]);
#endif

	return 0;
}
/*
 * BK Id: SCCS/s.fsqrt.c 1.6 05/17/01 18:14:22 cort
 */
#include <linux/types.h>
#include <linux/errno.h>
#include <asm/uaccess.h>

#include "soft-fp.h"
#include "double.h"

int
fsqrt(void *frD, void *frB)
{
	FP_DECL_D(B);
	FP_DECL_D(R);
	int ret = 0;

#ifdef DEBUG
	printk("%s: %p %p %p %p\n", __FUNCTION__, frD, frB);
#endif

	__FP_UNPACK_D(B, frB);

#ifdef DEBUG
	printk("B: %ld %lu %lu %ld (%ld)\n", B_s, B_f1, B_f0, B_e, B_c);
#endif

	if (B_s && B_c != FP_CLS_ZERO)
		ret |= EFLAG_VXSQRT;
	if (B_c == FP_CLS_NAN)
		ret |= EFLAG_VXSNAN;

	FP_SQRT_D(R, B);

#ifdef DEBUG
	printk("R: %ld %lu %lu %ld (%ld)\n", R_s, R_f1, R_f0, R_e, R_c);
#endif

	return (ret | __FP_PACK_D(frD, R));
}
/*
 * BK Id: SCCS/s.fsqrts.c 1.6 05/17/01 18:14:22 cort
 */
#include <linux/types.h>
#include <linux/errno.h>
#include <asm/uaccess.h>

#include "soft-fp.h"
#include "double.h"
#include "single.h"

int
fsqrts(void *frD, void *frB)
{
	FP_DECL_D(B);
	FP_DECL_D(R);
	int ret = 0;

#ifdef DEBUG
	printk("%s: %p %p %p %p\n", __FUNCTION__, frD, frB);
#endif

	__FP_UNPACK_D(B, frB);

#ifdef DEBUG
	printk("B: %ld %lu %lu %ld (%ld)\n", B_s, B_f1, B_f0, B_e, B_c);
#endif

	if (B_s && B_c != FP_CLS_ZERO)
		ret |= EFLAG_VXSQRT;
	if (B_c == FP_CLS_NAN)
		ret |= EFLAG_VXSNAN;

	FP_SQRT_D(R, B);

#ifdef DEBUG
	printk("R: %ld %lu %lu %ld (%ld)\n", R_s, R_f1, R_f0, R_e, R_c);
#endif

	return (ret | __FP_PACK_DS(frD, R));
}
/*
 * BK Id: SCCS/s.fsub.c 1.6 05/17/01 18:14:22 cort
 */
#include <linux/types.h>
#include <linux/errno.h>
#include <asm/uaccess.h>

#include "soft-fp.h"
#include "double.h"

int
fsub(void *frD, void *frA, void *frB)
{
	FP_DECL_D(A);
	FP_DECL_D(B);
	FP_DECL_D(R);
	int ret = 0;

#ifdef DEBUG
	printk("%s: %p %p %p\n", __FUNCTION__, frD, frA, frB);
#endif

	__FP_UNPACK_D(A, frA);
	__FP_UNPACK_D(B, frB);

#ifdef DEBUG
	printk("A: %ld %lu %lu %ld (%ld)\n", A_s, A_f1, A_f0, A_e, A_c);
	printk("B: %ld %lu %lu %ld (%ld)\n", B_s, B_f1, B_f0, B_e, B_c);
#endif

	if (B_c != FP_CLS_NAN)
		B_s ^= 1;

	if (A_s != B_s && A_c == FP_CLS_INF && B_c == FP_CLS_INF)
		ret |= EFLAG_VXISI;

	FP_ADD_D(R, A, B);

#ifdef DEBUG
	printk("D: %ld %lu %lu %ld (%ld)\n", R_s, R_f1, R_f0, R_e, R_c);
#endif

	return (ret | __FP_PACK_D(frD, R));
}
/*
 * BK Id: SCCS/s.fsubs.c 1.6 05/17/01 18:14:22 cort
 */
#include <linux/types.h>
#include <linux/errno.h>
#include <asm/uaccess.h>

#include "soft-fp.h"
#include "double.h"
#include "single.h"

int
fsubs(void *frD, void *frA, void *frB)
{
	FP_DECL_D(A);
	FP_DECL_D(B);
	FP_DECL_D(R);
	int ret = 0;

#ifdef DEBUG
	printk("%s: %p %p %p\n", __FUNCTION__, frD, frA, frB);
#endif

	__FP_UNPACK_D(A, frA);
	__FP_UNPACK_D(B, frB);

#ifdef DEBUG
	printk("A: %ld %lu %lu %ld (%ld)\n", A_s, A_f1, A_f0, A_e, A_c);
	printk("B: %ld %lu %lu %ld (%ld)\n", B_s, B_f1, B_f0, B_e, B_c);
#endif

	if (B_c != FP_CLS_NAN)
		B_s ^= 1;

	if (A_s != B_s && A_c == FP_CLS_INF && B_c == FP_CLS_INF)
		ret |= EFLAG_VXISI;

	FP_ADD_D(R, A, B);

#ifdef DEBUG
	printk("D: %ld %lu %lu %ld (%ld)\n", R_s, R_f1, R_f0, R_e, R_c);
#endif

	return (ret | __FP_PACK_DS(frD, R));
}
/*
 * BK Id: SCCS/s.lfd.c 1.6 05/17/01 18:14:23 cort
 */
#include <linux/types.h>
#include <linux/errno.h>
#include <asm/uaccess.h>

#include "sfp-machine.h"
#include "double.h"

int
lfd(void *frD, void *ea)
{
	if (copy_from_user(frD, ea, sizeof(double)))
		return -EFAULT;
#ifdef DEBUG
	printk("%s: D %p, ea %p: ", __FUNCTION__, frD, ea);
	dump_double(frD);
	printk("\n");
#endif
	return 0;
}
/*
 * BK Id: SCCS/s.lfs.c 1.6 05/17/01 18:14:23 cort
 */
#include <linux/types.h>
#include <linux/errno.h>
#include <asm/uaccess.h>

#include "soft-fp.h"
#include "double.h"
#include "single.h"

int
lfs(void *frD, void *ea)
{
	FP_DECL_D(R);
	FP_DECL_S(A);
	float f;

#ifdef DEBUG
	printk("%s: D %p, ea %p\n", __FUNCTION__, frD, ea);
#endif

	if (copy_from_user(&f, ea, sizeof(float)))
		return -EFAULT;

	__FP_UNPACK_S(A, &f);

#ifdef DEBUG
	printk("A: %ld %lu %ld (%ld) [%08lx]\n", A_s, A_f, A_e, A_c,
	       *(unsigned long *)&f);
#endif

	FP_CONV(D, S, 2, 1, R, A);

#ifdef DEBUG
	printk("R: %ld %lu %lu %ld (%ld)\n", R_s, R_f1, R_f0, R_e, R_c);
#endif

	return __FP_PACK_D(frD, R);
}
/*
 * BK Id: SCCS/s.math.c 1.6 05/17/01 18:14:23 cort
 */
/*
 * arch/ppc/math-emu/math.c
 *
 * Copyright (C) 1999  Eddie C. Dost  (ecd@atecom.com)
 */

#include <linux/config.h>
#include <linux/types.h>
#include <linux/sched.h>

#include <asm/uaccess.h>
#include <asm/processor.h>

#include "sfp-machine.h"
#include "double.h"

#define FLOATFUNC(x)	extern int x(void *, void *, void *, void *)

FLOATFUNC(fadd);
FLOATFUNC(fadds);
FLOATFUNC(fdiv);
FLOATFUNC(fdivs);
FLOATFUNC(fmul);
FLOATFUNC(fmuls);
FLOATFUNC(fsub);
FLOATFUNC(fsubs);

FLOATFUNC(fmadd);
FLOATFUNC(fmadds);
FLOATFUNC(fmsub);
FLOATFUNC(fmsubs);
FLOATFUNC(fnmadd);
FLOATFUNC(fnmadds);
FLOATFUNC(fnmsub);
FLOATFUNC(fnmsubs);

FLOATFUNC(fctiw);
FLOATFUNC(fctiwz);
FLOATFUNC(frsp);

FLOATFUNC(fcmpo);
FLOATFUNC(fcmpu);

FLOATFUNC(mcrfs);
FLOATFUNC(mffs);
FLOATFUNC(mtfsb0);
FLOATFUNC(mtfsb1);
FLOATFUNC(mtfsf);
FLOATFUNC(mtfsfi);

FLOATFUNC(lfd);
FLOATFUNC(lfs);

FLOATFUNC(stfd);
FLOATFUNC(stfs);
FLOATFUNC(stfiwx);

FLOATFUNC(fabs);
FLOATFUNC(fmr);
FLOATFUNC(fnabs);
FLOATFUNC(fneg);

/* Optional */
FLOATFUNC(fres);
FLOATFUNC(frsqrte);
FLOATFUNC(fsel);
FLOATFUNC(fsqrt);
FLOATFUNC(fsqrts);


#define OP31		0x1f		/*   31 */
#define LFS		0x30		/*   48 */
#define LFSU		0x31		/*   49 */
#define LFD		0x32		/*   50 */
#define LFDU		0x33		/*   51 */
#define STFS		0x34		/*   52 */
#define STFSU		0x35		/*   53 */
#define STFD		0x36		/*   54 */
#define STFDU		0x37		/*   55 */
#define OP59		0x3b		/*   59 */
#define OP63		0x3f		/*   63 */

/* Opcode 31: */
/* X-Form: */
#define LFSX		0x217		/*  535 */
#define LFSUX		0x237		/*  567 */
#define LFDX		0x257		/*  599 */
#define LFDUX		0x277		/*  631 */
#define STFSX		0x297		/*  663 */
#define STFSUX		0x2b7		/*  695 */
#define STFDX		0x2d7		/*  727 */
#define STFDUX		0x2f7		/*  759 */
#define STFIWX		0x3d7		/*  983 */

/* Opcode 59: */
/* A-Form: */
#define FDIVS		0x012		/*   18 */
#define FSUBS		0x014		/*   20 */
#define FADDS		0x015		/*   21 */
#define FSQRTS		0x016		/*   22 */
#define FRES		0x018		/*   24 */
#define FMULS		0x019		/*   25 */
#define FMSUBS		0x01c		/*   28 */
#define FMADDS		0x01d		/*   29 */
#define FNMSUBS		0x01e		/*   30 */
#define FNMADDS		0x01f		/*   31 */

/* Opcode 63: */
/* A-Form: */
#define FDIV		0x012		/*   18 */
#define FSUB		0x014		/*   20 */
#define FADD		0x015		/*   21 */
#define FSQRT		0x016		/*   22 */
#define FSEL		0x017		/*   23 */
#define FMUL		0x019		/*   25 */
#define FRSQRTE		0x01a		/*   26 */
#define FMSUB		0x01c		/*   28 */
#define FMADD		0x01d		/*   29 */
#define FNMSUB		0x01e		/*   30 */
#define FNMADD		0x01f		/*   31 */

/* X-Form: */
#define FCMPU		0x000		/*    0	*/
#define FRSP		0x00c		/*   12 */
#define FCTIW		0x00e		/*   14 */
#define FCTIWZ		0x00f		/*   15 */
#define FCMPO		0x020		/*   32 */
#define MTFSB1		0x026		/*   38 */
#define FNEG		0x028		/*   40 */
#define MCRFS		0x040		/*   64 */
#define MTFSB0		0x046		/*   70 */
#define FMR		0x048		/*   72 */
#define MTFSFI		0x086		/*  134 */
#define FNABS		0x088		/*  136 */
#define FABS		0x108		/*  264 */
#define MFFS		0x247		/*  583 */
#define MTFSF		0x2c7		/*  711 */


#define AB	2
#define AC	3
#define ABC	4
#define D	5
#define DU	6
#define X	7
#define XA	8
#define XB	9
#define XCR	11
#define XCRB	12
#define XCRI	13
#define XCRL	16
#define XE	14
#define XEU	15
#define XFLB	10

#ifdef CONFIG_MATH_EMULATION
static int
record_exception(struct pt_regs *regs, int eflag)
{
	u32 fpscr;

	fpscr = __FPU_FPSCR;

	if (eflag) {
		fpscr |= FPSCR_FX;
		if (eflag & EFLAG_OVERFLOW)
			fpscr |= FPSCR_OX;
		if (eflag & EFLAG_UNDERFLOW)
			fpscr |= FPSCR_UX;
		if (eflag & EFLAG_DIVZERO)
			fpscr |= FPSCR_ZX;
		if (eflag & EFLAG_INEXACT)
			fpscr |= FPSCR_XX;
		if (eflag & EFLAG_VXSNAN)
			fpscr |= FPSCR_VXSNAN;
		if (eflag & EFLAG_VXISI)
			fpscr |= FPSCR_VXISI;
		if (eflag & EFLAG_VXIDI)
			fpscr |= FPSCR_VXIDI;
		if (eflag & EFLAG_VXZDZ)
			fpscr |= FPSCR_VXZDZ;
		if (eflag & EFLAG_VXIMZ)
			fpscr |= FPSCR_VXIMZ;
		if (eflag & EFLAG_VXVC)
			fpscr |= FPSCR_VXVC;
		if (eflag & EFLAG_VXSOFT)
			fpscr |= FPSCR_VXSOFT;
		if (eflag & EFLAG_VXSQRT)
			fpscr |= FPSCR_VXSQRT;
		if (eflag & EFLAG_VXCVI)
			fpscr |= FPSCR_VXCVI;
	}

	fpscr &= ~(FPSCR_VX);
	if (fpscr & (FPSCR_VXSNAN | FPSCR_VXISI | FPSCR_VXIDI |
		     FPSCR_VXZDZ | FPSCR_VXIMZ | FPSCR_VXVC |
		     FPSCR_VXSOFT | FPSCR_VXSQRT | FPSCR_VXCVI))
		fpscr |= FPSCR_VX;

	fpscr &= ~(FPSCR_FEX);
	if (((fpscr & FPSCR_VX) && (fpscr & FPSCR_VE)) ||
	    ((fpscr & FPSCR_OX) && (fpscr & FPSCR_OE)) ||
	    ((fpscr & FPSCR_UX) && (fpscr & FPSCR_UE)) ||
	    ((fpscr & FPSCR_ZX) && (fpscr & FPSCR_ZE)) ||
	    ((fpscr & FPSCR_XX) && (fpscr & FPSCR_XE)))
		fpscr |= FPSCR_FEX;

	__FPU_FPSCR = fpscr;

	return (fpscr & FPSCR_FEX) ? 1 : 0;
}
#endif /* CONFIG_MATH_EMULATION */

int
do_mathemu(struct pt_regs *regs)
{
	void *op0 = 0, *op1 = 0, *op2 = 0, *op3 = 0;
	unsigned long pc = regs->nip;
	signed short sdisp;
	u32 insn = 0;
	int idx = 0;
#ifdef CONFIG_MATH_EMULATION
	int (*func)(void *, void *, void *, void *);
	int type = 0;
	int eflag, trap;
#endif

	if (get_user(insn, (u32 *)pc))
		return -EFAULT;

#ifndef CONFIG_MATH_EMULATION
	switch (insn >> 26) {
	case LFD:
		idx = (insn >> 16) & 0x1f;
		sdisp = (insn & 0xffff);
		op0 = (void *)&current->thread.fpr[(insn >> 21) & 0x1f];
		op1 = (void *)((idx ? regs->gpr[idx] : 0) + sdisp);
		lfd(op0, op1, op2, op3);
		break;
	case LFDU:
		idx = (insn >> 16) & 0x1f;
		sdisp = (insn & 0xffff);
		op0 = (void *)&current->thread.fpr[(insn >> 21) & 0x1f];
		op1 = (void *)((idx ? regs->gpr[idx] : 0) + sdisp);
		lfd(op0, op1, op2, op3);
		regs->gpr[idx] = (unsigned long)op1;
		break;
	case STFD:
		idx = (insn >> 16) & 0x1f;
		sdisp = (insn & 0xffff);
		op0 = (void *)&current->thread.fpr[(insn >> 21) & 0x1f];
		op1 = (void *)((idx ? regs->gpr[idx] : 0) + sdisp);
		stfd(op0, op1, op2, op3);
		break;
	case STFDU:
		idx = (insn >> 16) & 0x1f;
		sdisp = (insn & 0xffff);
		op0 = (void *)&current->thread.fpr[(insn >> 21) & 0x1f];
		op1 = (void *)((idx ? regs->gpr[idx] : 0) + sdisp);
		stfd(op0, op1, op2, op3);
		regs->gpr[idx] = (unsigned long)op1;
		break;
	case OP63:
		op0 = (void *)&current->thread.fpr[(insn >> 21) & 0x1f];
		op1 = (void *)&current->thread.fpr[(insn >> 11) & 0x1f];
		fmr(op0, op1, op2, op3);
		break;
	default:
		goto illegal;
	}
#else /* CONFIG_MATH_EMULATION */
	switch (insn >> 26) {
	case LFS:	func = lfs;	type = D;	break;
	case LFSU:	func = lfs;	type = DU;	break;
	case LFD:	func = lfd;	type = D;	break;
	case LFDU:	func = lfd;	type = DU;	break;
	case STFS:	func = stfs;	type = D;	break;
	case STFSU:	func = stfs;	type = DU;	break;
	case STFD:	func = stfd;	type = D;	break;
	case STFDU:	func = stfd;	type = DU;	break;

	case OP31:
		switch ((insn >> 1) & 0x3ff) {
		case LFSX:	func = lfs;	type = XE;	break;
		case LFSUX:	func = lfs;	type = XEU;	break;
		case LFDX:	func = lfd;	type = XE;	break;
		case LFDUX:	func = lfd;	type = XEU;	break;
		case STFSX:	func = stfs;	type = XE;	break;
		case STFSUX:	func = stfs;	type = XEU;	break;
		case STFDX:	func = stfd;	type = XE;	break;
		case STFDUX:	func = stfd;	type = XEU;	break;
		case STFIWX:	func = stfiwx;	type = XE;	break;
		default:
			goto illegal;
		}
		break;

	case OP59:
		switch ((insn >> 1) & 0x1f) {
		case FDIVS:	func = fdivs;	type = AB;	break;
		case FSUBS:	func = fsubs;	type = AB;	break;
		case FADDS:	func = fadds;	type = AB;	break;
		case FSQRTS:	func = fsqrts;	type = AB;	break;
		case FRES:	func = fres;	type = AB;	break;
		case FMULS:	func = fmuls;	type = AC;	break;
		case FMSUBS:	func = fmsubs;	type = ABC;	break;
		case FMADDS:	func = fmadds;	type = ABC;	break;
		case FNMSUBS:	func = fnmsubs;	type = ABC;	break;
		case FNMADDS:	func = fnmadds;	type = ABC;	break;
		default:
			goto illegal;
		}
		break;

	case OP63:
		if (insn & 0x20) {
			switch ((insn >> 1) & 0x1f) {
			case FDIV:	func = fdiv;	type = AB;	break;
			case FSUB:	func = fsub;	type = AB;	break;
			case FADD:	func = fadd;	type = AB;	break;
			case FSQRT:	func = fsqrt;	type = AB;	break;
			case FSEL:	func = fsel;	type = ABC;	break;
			case FMUL:	func = fmul;	type = AC;	break;
			case FRSQRTE:	func = frsqrte;	type = AB;	break;
			case FMSUB:	func = fmsub;	type = ABC;	break;
			case FMADD:	func = fmadd;	type = ABC;	break;
			case FNMSUB:	func = fnmsub;	type = ABC;	break;
			case FNMADD:	func = fnmadd;	type = ABC;	break;
			default:
				goto illegal;
			}
			break;
		}

		switch ((insn >> 1) & 0x3ff) {
		case FCMPU:	func = fcmpu;	type = XCR;	break;
		case FRSP:	func = frsp;	type = XB;	break;
		case FCTIW:	func = fctiw;	type = XB;	break;
		case FCTIWZ:	func = fctiwz;	type = XB;	break;
		case FCMPO:	func = fcmpo;	type = XCR;	break;
		case MTFSB1:	func = mtfsb1;	type = XCRB;	break;
		case FNEG:	func = fneg;	type = XB;	break;
		case MCRFS:	func = mcrfs;	type = XCRL;	break;
		case MTFSB0:	func = mtfsb0;	type = XCRB;	break;
		case FMR:	func = fmr;	type = XB;	break;
		case MTFSFI:	func = mtfsfi;	type = XCRI;	break;
		case FNABS:	func = fnabs;	type = XB;	break;
		case FABS:	func = fabs;	type = XB;	break;
		case MFFS:	func = mffs;	type = X;	break;
		case MTFSF:	func = mtfsf;	type = XFLB;	break;
		default:
			goto illegal;
		}
		break;

	default:
		goto illegal;
	}

	switch (type) {
	case AB:
		op0 = (void *)&current->thread.fpr[(insn >> 21) & 0x1f];
		op1 = (void *)&current->thread.fpr[(insn >> 16) & 0x1f];
		op2 = (void *)&current->thread.fpr[(insn >> 11) & 0x1f];
		break;

	case AC:
		op0 = (void *)&current->thread.fpr[(insn >> 21) & 0x1f];
		op1 = (void *)&current->thread.fpr[(insn >> 16) & 0x1f];
		op2 = (void *)&current->thread.fpr[(insn >>  6) & 0x1f];
		break;

	case ABC:
		op0 = (void *)&current->thread.fpr[(insn >> 21) & 0x1f];
		op1 = (void *)&current->thread.fpr[(insn >> 16) & 0x1f];
		op2 = (void *)&current->thread.fpr[(insn >> 11) & 0x1f];
		op3 = (void *)&current->thread.fpr[(insn >>  6) & 0x1f];
		break;

	case D:
		idx = (insn >> 16) & 0x1f;
		sdisp = (insn & 0xffff);
		op0 = (void *)&current->thread.fpr[(insn >> 21) & 0x1f];
		op1 = (void *)((idx ? regs->gpr[idx] : 0) + sdisp);
		break;

	case DU:
		idx = (insn >> 16) & 0x1f;
		if (!idx)
			goto illegal;

		sdisp = (insn & 0xffff);
		op0 = (void *)&current->thread.fpr[(insn >> 21) & 0x1f];
		op1 = (void *)(regs->gpr[idx] + sdisp);
		break;

	case X:
		op0 = (void *)&current->thread.fpr[(insn >> 21) & 0x1f];
		break;

	case XA:
		op0 = (void *)&current->thread.fpr[(insn >> 21) & 0x1f];
		op1 = (void *)&current->thread.fpr[(insn >> 16) & 0x1f];
		break;

	case XB:
		op0 = (void *)&current->thread.fpr[(insn >> 21) & 0x1f];
		op1 = (void *)&current->thread.fpr[(insn >> 11) & 0x1f];
		break;

	case XE:
		idx = (insn >> 16) & 0x1f;
		if (!idx)
			goto illegal;

		op0 = (void *)&current->thread.fpr[(insn >> 21) & 0x1f];
		op1 = (void *)(regs->gpr[idx] + regs->gpr[(insn >> 11) & 0x1f]);
		break;

	case XEU:
		idx = (insn >> 16) & 0x1f;
		op0 = (void *)&current->thread.fpr[(insn >> 21) & 0x1f];
		op1 = (void *)((idx ? regs->gpr[idx] : 0)
				+ regs->gpr[(insn >> 11) & 0x1f]);
		break;

	case XCR:
		op0 = (void *)&regs->ccr;
		op1 = (void *)((insn >> 23) & 0x7);
		op2 = (void *)&current->thread.fpr[(insn >> 16) & 0x1f];
		op3 = (void *)&current->thread.fpr[(insn >> 11) & 0x1f];
		break;

	case XCRL:
		op0 = (void *)&regs->ccr;
		op1 = (void *)((insn >> 23) & 0x7);
		op2 = (void *)((insn >> 18) & 0x7);
		break;

	case XCRB:
		op0 = (void *)((insn >> 21) & 0x1f);
		break;

	case XCRI:
		op0 = (void *)((insn >> 23) & 0x7);
		op1 = (void *)((insn >> 12) & 0xf);
		break;

	case XFLB:
		op0 = (void *)((insn >> 17) & 0xff);
		op1 = (void *)&current->thread.fpr[(insn >> 11) & 0x1f];
		break;

	default:
		goto illegal;
	}

	eflag = func(op0, op1, op2, op3);

	if (insn & 1) {
		regs->ccr &= ~(0x0f000000);
		regs->ccr |= (__FPU_FPSCR >> 4) & 0x0f000000;
	}

	trap = record_exception(regs, eflag);
	if (trap)
		return 1;

	switch (type) {
	case DU:
	case XEU:
		regs->gpr[idx] = (unsigned long)op1;
		break;

	default:
		break;
	}
#endif /* CONFIG_MATH_EMULATION */

	regs->nip += 4;
	return 0;

illegal:
	return -ENOSYS;
}
/*
 * BK Id: SCCS/s.mcrfs.c 1.6 05/17/01 18:14:23 cort
 */
#include <linux/types.h>
#include <linux/errno.h>
#include <asm/uaccess.h>

#include "soft-fp.h"

int
mcrfs(u32 *ccr, u32 crfD, u32 crfS)
{
	u32 value, clear;

#ifdef DEBUG
	printk("%s: %p (%08x) %d %d\n", __FUNCTION__, ccr, *ccr, crfD, crfS);
#endif

	clear = 15 << ((7 - crfS) << 2);
	if (!crfS)
		clear = 0x90000000;

	value = (__FPU_FPSCR >> ((7 - crfS) << 2)) & 15;
	__FPU_FPSCR &= ~(clear);

	*ccr &= ~(15 << ((7 - crfD) << 2));
	*ccr |= (value << ((7 - crfD) << 2));

#ifdef DEBUG
	printk("CR: %08x\n", __FUNCTION__, *ccr);
#endif

	return 0;
}
/*
 * BK Id: SCCS/s.mffs.c 1.6 05/17/01 18:14:23 cort
 */
#include <linux/types.h>
#include <linux/errno.h>
#include <asm/uaccess.h>

#include "soft-fp.h"

int
mffs(u32 *frD)
{
	frD[1] = __FPU_FPSCR;

#ifdef DEBUG
	printk("%s: frD %p: %08x.%08x\n", __FUNCTION__, frD, frD[0], frD[1]);
#endif

	return 0;
}
/*
 * BK Id: SCCS/s.mtfsb0.c 1.6 05/17/01 18:14:23 cort
 */
#include <linux/types.h>
#include <linux/errno.h>
#include <asm/uaccess.h>

#include "soft-fp.h"

int
mtfsb0(int crbD)
{
	if ((crbD != 1) && (crbD != 2))
		__FPU_FPSCR &= ~(1 << (31 - crbD));

#ifdef DEBUG
	printk("%s: %d %08lx\n", __FUNCTION__, crbD, __FPU_FPSCR);
#endif

	return 0;
}
/*
 * BK Id: SCCS/s.mtfsb1.c 1.6 05/17/01 18:14:23 cort
 */
#include <linux/types.h>
#include <linux/errno.h>
#include <asm/uaccess.h>

#include "soft-fp.h"

int
mtfsb1(int crbD)
{
	if ((crbD != 1) && (crbD != 2))
		__FPU_FPSCR |= (1 << (31 - crbD));

#ifdef DEBUG
	printk("%s: %d %08lx\n", __FUNCTION__, crbD, __FPU_FPSCR);
#endif

	return 0;
}
/*
 * BK Id: SCCS/s.mtfsf.c 1.6 05/17/01 18:14:23 cort
 */
#include <linux/types.h>
#include <linux/errno.h>
#include <asm/uaccess.h>

#include "soft-fp.h"

int
mtfsf(unsigned int FM, u32 *frB)
{
	u32 mask;

	if (FM == 0)
		return 0;

	if (FM == 0xff)
		mask = 0x9fffffff;
	else {
		mask = 0;
		if (FM & (1 << 0))
			mask |= 0x90000000;
		if (FM & (1 << 1))
			mask |= 0x0f000000;
		if (FM & (1 << 2))
			mask |= 0x00f00000;
		if (FM & (1 << 3))
			mask |= 0x000f0000;
		if (FM & (1 << 4))
			mask |= 0x0000f000;
		if (FM & (1 << 5))
			mask |= 0x00000f00;
		if (FM & (1 << 6))
			mask |= 0x000000f0;
		if (FM & (1 << 7))
			mask |= 0x0000000f;
	}

	__FPU_FPSCR &= ~(mask);
	__FPU_FPSCR |= (frB[1] & mask);

#ifdef DEBUG
	printk("%s: %02x %p: %08lx\n", __FUNCTION__, FM, frB, __FPU_FPSCR);
#endif

	return 0;
}
/*
 * BK Id: SCCS/s.mtfsfi.c 1.6 05/17/01 18:14:23 cort
 */
#include <linux/types.h>
#include <linux/errno.h>
#include <asm/uaccess.h>

#include "soft-fp.h"

int
mtfsfi(unsigned int crfD, unsigned int IMM)
{
	u32 mask = 0xf;

	if (!crfD)
		mask = 9;

	__FPU_FPSCR &= ~(mask << ((7 - crfD) << 2));
	__FPU_FPSCR |= (IMM & 0xf) << ((7 - crfD) << 2);

#ifdef DEBUG
	printk("%s: %d %x: %08lx\n", __FUNCTION__, crfD, IMM, __FPU_FPSCR);
#endif

	return 0;
}
/*
 * BK Id: SCCS/s.op-1.h 1.5 05/17/01 18:14:23 cort
 */
/*
 * Basic one-word fraction declaration and manipulation.
 */

#define _FP_FRAC_DECL_1(X)	_FP_W_TYPE X##_f
#define _FP_FRAC_COPY_1(D,S)	(D##_f = S##_f)
#define _FP_FRAC_SET_1(X,I)	(X##_f = I)
#define _FP_FRAC_HIGH_1(X)	(X##_f)
#define _FP_FRAC_LOW_1(X)	(X##_f)
#define _FP_FRAC_WORD_1(X,w)	(X##_f)

#define _FP_FRAC_ADDI_1(X,I)	(X##_f += I)
#define _FP_FRAC_SLL_1(X,N)			\
  do {						\
    if (__builtin_constant_p(N) && (N) == 1)	\
      X##_f += X##_f;				\
    else					\
      X##_f <<= (N);				\
  } while (0)
#define _FP_FRAC_SRL_1(X,N)	(X##_f >>= N)

/* Right shift with sticky-lsb.  */
#define _FP_FRAC_SRS_1(X,N,sz)	__FP_FRAC_SRS_1(X##_f, N, sz)

#define __FP_FRAC_SRS_1(X,N,sz)						\
   (X = (X >> (N) | (__builtin_constant_p(N) && (N) == 1		\
		     ? X & 1 : (X << (_FP_W_TYPE_SIZE - (N))) != 0)))

#define _FP_FRAC_ADD_1(R,X,Y)	(R##_f = X##_f + Y##_f)
#define _FP_FRAC_SUB_1(R,X,Y)	(R##_f = X##_f - Y##_f)
#define _FP_FRAC_CLZ_1(z, X)	__FP_CLZ(z, X##_f)

/* Predicates */
#define _FP_FRAC_NEGP_1(X)	((_FP_WS_TYPE)X##_f < 0)
#define _FP_FRAC_ZEROP_1(X)	(X##_f == 0)
#define _FP_FRAC_OVERP_1(fs,X)	(X##_f & _FP_OVERFLOW_##fs)
#define _FP_FRAC_EQ_1(X, Y)	(X##_f == Y##_f)
#define _FP_FRAC_GE_1(X, Y)	(X##_f >= Y##_f)
#define _FP_FRAC_GT_1(X, Y)	(X##_f > Y##_f)

#define _FP_ZEROFRAC_1		0
#define _FP_MINFRAC_1		1

/*
 * Unpack the raw bits of a native fp value.  Do not classify or
 * normalize the data.
 */

#define _FP_UNPACK_RAW_1(fs, X, val)				\
  do {								\
    union _FP_UNION_##fs _flo; _flo.flt = (val);		\
								\
    X##_f = _flo.bits.frac;					\
    X##_e = _flo.bits.exp;					\
    X##_s = _flo.bits.sign;					\
  } while (0)


/*
 * Repack the raw bits of a native fp value.
 */

#define _FP_PACK_RAW_1(fs, val, X)				\
  do {								\
    union _FP_UNION_##fs _flo;					\
								\
    _flo.bits.frac = X##_f;					\
    _flo.bits.exp  = X##_e;					\
    _flo.bits.sign = X##_s;					\
								\
    (val) = _flo.flt;						\
  } while (0)


/*
 * Multiplication algorithms:
 */

/* Basic.  Assuming the host word size is >= 2*FRACBITS, we can do the
   multiplication immediately.  */

#define _FP_MUL_MEAT_1_imm(fs, R, X, Y)					\
  do {									\
    R##_f = X##_f * Y##_f;						\
    /* Normalize since we know where the msb of the multiplicands	\
       were (bit B), we know that the msb of the of the product is	\
       at either 2B or 2B-1.  */					\
    _FP_FRAC_SRS_1(R, _FP_WFRACBITS_##fs-1, 2*_FP_WFRACBITS_##fs);	\
  } while (0)

/* Given a 1W * 1W => 2W primitive, do the extended multiplication.  */

#define _FP_MUL_MEAT_1_wide(fs, R, X, Y, doit)				\
  do {									\
    _FP_W_TYPE _Z_f0, _Z_f1;						\
    doit(_Z_f1, _Z_f0, X##_f, Y##_f);					\
    /* Normalize since we know where the msb of the multiplicands	\
       were (bit B), we know that the msb of the of the product is	\
       at either 2B or 2B-1.  */					\
    _FP_FRAC_SRS_2(_Z, _FP_WFRACBITS_##fs-1, 2*_FP_WFRACBITS_##fs);	\
    R##_f = _Z_f0;							\
  } while (0)

/* Finally, a simple widening multiply algorithm.  What fun!  */

#define _FP_MUL_MEAT_1_hard(fs, R, X, Y)				\
  do {									\
    _FP_W_TYPE _xh, _xl, _yh, _yl, _z_f0, _z_f1, _a_f0, _a_f1;		\
									\
    /* split the words in half */					\
    _xh = X##_f >> (_FP_W_TYPE_SIZE/2);					\
    _xl = X##_f & (((_FP_W_TYPE)1 << (_FP_W_TYPE_SIZE/2)) - 1);		\
    _yh = Y##_f >> (_FP_W_TYPE_SIZE/2);					\
    _yl = Y##_f & (((_FP_W_TYPE)1 << (_FP_W_TYPE_SIZE/2)) - 1);		\
									\
    /* multiply the pieces */						\
    _z_f0 = _xl * _yl;							\
    _a_f0 = _xh * _yl;							\
    _a_f1 = _xl * _yh;							\
    _z_f1 = _xh * _yh;							\
									\
    /* reassemble into two full words */				\
    if ((_a_f0 += _a_f1) < _a_f1)					\
      _z_f1 += (_FP_W_TYPE)1 << (_FP_W_TYPE_SIZE/2);			\
    _a_f1 = _a_f0 >> (_FP_W_TYPE_SIZE/2);				\
    _a_f0 = _a_f0 << (_FP_W_TYPE_SIZE/2);				\
    _FP_FRAC_ADD_2(_z, _z, _a);						\
									\
    /* normalize */							\
    _FP_FRAC_SRS_2(_z, _FP_WFRACBITS_##fs - 1, 2*_FP_WFRACBITS_##fs);	\
    R##_f = _z_f0;							\
  } while (0)


/*
 * Division algorithms:
 */

/* Basic.  Assuming the host word size is >= 2*FRACBITS, we can do the
   division immediately.  Give this macro either _FP_DIV_HELP_imm for
   C primitives or _FP_DIV_HELP_ldiv for the ISO function.  Which you
   choose will depend on what the compiler does with divrem4.  */

#define _FP_DIV_MEAT_1_imm(fs, R, X, Y, doit)		\
  do {							\
    _FP_W_TYPE _q, _r;					\
    X##_f <<= (X##_f < Y##_f				\
	       ? R##_e--, _FP_WFRACBITS_##fs		\
	       : _FP_WFRACBITS_##fs - 1);		\
    doit(_q, _r, X##_f, Y##_f);				\
    R##_f = _q | (_r != 0);				\
  } while (0)

/* GCC's longlong.h defines a 2W / 1W => (1W,1W) primitive udiv_qrnnd
   that may be useful in this situation.  This first is for a primitive
   that requires normalization, the second for one that does not.  Look
   for UDIV_NEEDS_NORMALIZATION to tell which your machine needs.  */

#define _FP_DIV_MEAT_1_udiv_norm(fs, R, X, Y)				\
  do {									\
    _FP_W_TYPE _nh, _nl, _q, _r;					\
									\
    /* Normalize Y -- i.e. make the most significant bit set.  */	\
    Y##_f <<= _FP_WFRACXBITS_##fs - 1;					\
									\
    /* Shift X op correspondingly high, that is, up one full word.  */	\
    if (X##_f <= Y##_f)							\
      {									\
	_nl = 0;							\
	_nh = X##_f;							\
      }									\
    else								\
      {									\
	R##_e++;							\
	_nl = X##_f << (_FP_W_TYPE_SIZE-1);				\
	_nh = X##_f >> 1;						\
      }									\
    									\
    udiv_qrnnd(_q, _r, _nh, _nl, Y##_f);				\
    R##_f = _q | (_r != 0);						\
  } while (0)

#define _FP_DIV_MEAT_1_udiv(fs, R, X, Y)		\
  do {							\
    _FP_W_TYPE _nh, _nl, _q, _r;			\
    if (X##_f < Y##_f)					\
      {							\
	R##_e--;					\
	_nl = X##_f << _FP_WFRACBITS_##fs;		\
	_nh = X##_f >> _FP_WFRACXBITS_##fs;		\
      }							\
    else						\
      {							\
	_nl = X##_f << (_FP_WFRACBITS_##fs - 1);	\
	_nh = X##_f >> (_FP_WFRACXBITS_##fs + 1);	\
      }							\
    udiv_qrnnd(_q, _r, _nh, _nl, Y##_f);		\
    R##_f = _q | (_r != 0);				\
  } while (0)
  
  
/*
 * Square root algorithms:
 * We have just one right now, maybe Newton approximation
 * should be added for those machines where division is fast.
 */
 
#define _FP_SQRT_MEAT_1(R, S, T, X, q)			\
  do {							\
    while (q)						\
      {							\
        T##_f = S##_f + q;				\
        if (T##_f <= X##_f)				\
          {						\
            S##_f = T##_f + q;				\
            X##_f -= T##_f;				\
            R##_f += q;					\
          }						\
        _FP_FRAC_SLL_1(X, 1);				\
        q >>= 1;					\
      }							\
  } while (0)

/*
 * Assembly/disassembly for converting to/from integral types.  
 * No shifting or overflow handled here.
 */

#define _FP_FRAC_ASSEMBLE_1(r, X, rsize)	(r = X##_f)
#define _FP_FRAC_DISASSEMBLE_1(X, r, rsize)	(X##_f = r)


/*
 * Convert FP values between word sizes
 */

#define _FP_FRAC_CONV_1_1(dfs, sfs, D, S)				\
  do {									\
    D##_f = S##_f;							\
    if (_FP_WFRACBITS_##sfs > _FP_WFRACBITS_##dfs)			\
      _FP_FRAC_SRS_1(D, (_FP_WFRACBITS_##sfs-_FP_WFRACBITS_##dfs),	\
		     _FP_WFRACBITS_##sfs);				\
    else								\
      D##_f <<= _FP_WFRACBITS_##dfs - _FP_WFRACBITS_##sfs;		\
  } while (0)
/*
 * BK Id: SCCS/s.op-2.h 1.5 05/17/01 18:14:23 cort
 */
/*
 * Basic two-word fraction declaration and manipulation.
 */

#define _FP_FRAC_DECL_2(X)	_FP_W_TYPE X##_f0, X##_f1
#define _FP_FRAC_COPY_2(D,S)	(D##_f0 = S##_f0, D##_f1 = S##_f1)
#define _FP_FRAC_SET_2(X,I)	__FP_FRAC_SET_2(X, I)
#define _FP_FRAC_HIGH_2(X)	(X##_f1)
#define _FP_FRAC_LOW_2(X)	(X##_f0)
#define _FP_FRAC_WORD_2(X,w)	(X##_f##w)

#define _FP_FRAC_SLL_2(X,N)						\
  do {									\
    if ((N) < _FP_W_TYPE_SIZE)						\
      {									\
        if (__builtin_constant_p(N) && (N) == 1) 			\
          {								\
            X##_f1 = X##_f1 + X##_f1 + (((_FP_WS_TYPE)(X##_f0)) < 0);	\
            X##_f0 += X##_f0;						\
          }								\
        else								\
          {								\
	    X##_f1 = X##_f1 << (N) | X##_f0 >> (_FP_W_TYPE_SIZE - (N));	\
	    X##_f0 <<= (N);						\
	  }								\
      }									\
    else								\
      {									\
	X##_f1 = X##_f0 << ((N) - _FP_W_TYPE_SIZE);			\
	X##_f0 = 0;							\
      }									\
  } while (0)

#define _FP_FRAC_SRL_2(X,N)						\
  do {									\
    if ((N) < _FP_W_TYPE_SIZE)						\
      {									\
	X##_f0 = X##_f0 >> (N) | X##_f1 << (_FP_W_TYPE_SIZE - (N));	\
	X##_f1 >>= (N);							\
      }									\
    else								\
      {									\
	X##_f0 = X##_f1 >> ((N) - _FP_W_TYPE_SIZE);			\
	X##_f1 = 0;							\
      }									\
  } while (0)

/* Right shift with sticky-lsb.  */
#define _FP_FRAC_SRS_2(X,N,sz)						\
  do {									\
    if ((N) < _FP_W_TYPE_SIZE)						\
      {									\
	X##_f0 = (X##_f1 << (_FP_W_TYPE_SIZE - (N)) | X##_f0 >> (N) |	\
		  (__builtin_constant_p(N) && (N) == 1			\
		   ? X##_f0 & 1						\
		   : (X##_f0 << (_FP_W_TYPE_SIZE - (N))) != 0));	\
	X##_f1 >>= (N);							\
      }									\
    else								\
      {									\
	X##_f0 = (X##_f1 >> ((N) - _FP_W_TYPE_SIZE) |			\
	          (((X##_f1 << (sz - (N))) | X##_f0) != 0));		\
	X##_f1 = 0;							\
      }									\
  } while (0)

#define _FP_FRAC_ADDI_2(X,I) \
  __FP_FRAC_ADDI_2(X##_f1, X##_f0, I)

#define _FP_FRAC_ADD_2(R,X,Y) \
  __FP_FRAC_ADD_2(R##_f1, R##_f0, X##_f1, X##_f0, Y##_f1, Y##_f0)

#define _FP_FRAC_SUB_2(R,X,Y) \
  __FP_FRAC_SUB_2(R##_f1, R##_f0, X##_f1, X##_f0, Y##_f1, Y##_f0)

#define _FP_FRAC_CLZ_2(R,X)	\
  do {				\
    if (X##_f1)			\
      __FP_CLZ(R,X##_f1);	\
    else 			\
    {				\
      __FP_CLZ(R,X##_f0);	\
      R += _FP_W_TYPE_SIZE;	\
    }				\
  } while(0)

/* Predicates */
#define _FP_FRAC_NEGP_2(X)	((_FP_WS_TYPE)X##_f1 < 0)
#define _FP_FRAC_ZEROP_2(X)	((X##_f1 | X##_f0) == 0)
#define _FP_FRAC_OVERP_2(fs,X)	(X##_f1 & _FP_OVERFLOW_##fs)
#define _FP_FRAC_EQ_2(X, Y)	(X##_f1 == Y##_f1 && X##_f0 == Y##_f0)
#define _FP_FRAC_GT_2(X, Y)	\
  ((X##_f1 > Y##_f1) || (X##_f1 == Y##_f1 && X##_f0 > Y##_f0))
#define _FP_FRAC_GE_2(X, Y)	\
  ((X##_f1 > Y##_f1) || (X##_f1 == Y##_f1 && X##_f0 >= Y##_f0))

#define _FP_ZEROFRAC_2		0, 0
#define _FP_MINFRAC_2		0, 1

/*
 * Internals 
 */

#define __FP_FRAC_SET_2(X,I1,I0)	(X##_f0 = I0, X##_f1 = I1)

#define __FP_CLZ_2(R, xh, xl)	\
  do {				\
    if (xh)			\
      __FP_CLZ(R,xl);		\
    else 			\
    {				\
      __FP_CLZ(R,xl);		\
      R += _FP_W_TYPE_SIZE;	\
    }				\
  } while(0)

#if 0

#ifndef __FP_FRAC_ADDI_2
#define __FP_FRAC_ADDI_2(xh, xl, i) \
  (xh += ((xl += i) < i))
#endif
#ifndef __FP_FRAC_ADD_2
#define __FP_FRAC_ADD_2(rh, rl, xh, xl, yh, yl) \
  (rh = xh + yh + ((rl = xl + yl) < xl))
#endif
#ifndef __FP_FRAC_SUB_2
#define __FP_FRAC_SUB_2(rh, rl, xh, xl, yh, yl) \
  (rh = xh - yh - ((rl = xl - yl) > xl))
#endif

#else

#undef __FP_FRAC_ADDI_2
#define __FP_FRAC_ADDI_2(xh, xl, i)	add_ssaaaa(xh, xl, xh, xl, 0, i)
#undef __FP_FRAC_ADD_2
#define __FP_FRAC_ADD_2			add_ssaaaa
#undef __FP_FRAC_SUB_2
#define __FP_FRAC_SUB_2			sub_ddmmss

#endif

/*
 * Unpack the raw bits of a native fp value.  Do not classify or
 * normalize the data.
 */

#define _FP_UNPACK_RAW_2(fs, X, val)			\
  do {							\
    union _FP_UNION_##fs _flo; _flo.flt = (val);	\
							\
    X##_f0 = _flo.bits.frac0;				\
    X##_f1 = _flo.bits.frac1;				\
    X##_e  = _flo.bits.exp;				\
    X##_s  = _fl#define __ver_NCR_700_detect	smp_9504ee45
#define NCR_700_detect	_set_ver(NCR_700_detect)
#define __ver_NCR_700_release	smp_1eee0877
#define NCR_700_release	_set_ver(NCR_700_release)
#define __ver_NCR_700_intr	smp_20c3c72c
#define NCR_700_intr	_set_ver(NCR_700_intr)
3w-xxxx.o: 3w-xxxx.c \
   /home/me/kernel/linux/include/linux/module.h \
   /home/me/kernel/linux/include/linux/kernel.h \
   /home/me/kernel/linux/include/linux/pci.h \
   /home/me/kernel/linux/include/linux/time.h \
   /home/me/kernel/linux/include/linux/proc_fs.h \
   /home/me/kernel/linux/include/linux/sched.h \
   /home/me/kernel/linux/include/linux/ioport.h \
   /home/me/kernel/linux/include/linux/blk.h \
   /home/me/kernel/linux/include/linux/hdreg.h \
   /home/me/kernel/linux/include/linux/string.h \
   /home/me/kernel/linux/include/linux/delay.h \
   /home/me/kernel/linux/include/linux/smp.h \
   /home/me/kernel/linux/include/linux/reboot.h \
   /home/me/kernel/linux/include/linux/spinlock.h \
   /home/me/kernel/linux/include/asm/errno.h \
   /home/me/kernel/linux/include/asm/io.h \
   /home/me/kernel/linux/include/asm/irq.h \
   /home/me/kernel/linux/include/asm/uaccess.h \
   sd.h \
   scsi.h \
   hosts.h \
   3w-xxxx.h \
   scsi_module.c
3w-xxxx.h: \
   /home/me/kernel/linux/include/linux/version.h \
   /home/me/kernel/linux/include/linux/types.h \
   /home/me/kernel/linux/include/linux/kdev_t.h
	@touch 3w-xxxx.h
53c7,8xx.o: 53c7,8xx.c \
   $(wildcard /home/me/kernel/linux/include/config/scsi/ncr53c7xx/sync.h) \
   $(wildcard /home/me/kernel/linux/include/config/scsi/ncr53c7xx/disconnect.h) \
   /home/me/kernel/linux/include/linux/version.h \
   /home/me/kernel/linux/include/linux/module.h \
   /home/me/kernel/linux/include/asm/dma.h \
   /home/me/kernel/linux/include/asm/io.h \
   /home/me/kernel/linux/include/asm/system.h \
   /home/me/kernel/linux/include/linux/delay.h \
   /home/me/kernel/linux/include/linux/signal.h \
   /home/me/kernel/linux/include/linux/sched.h \
   /home/me/kernel/linux/include/linux/errno.h \
   /home/me/kernel/linux/include/linux/pci.h \
   /home/me/kernel/linux/include/linux/proc_fs.h \
   /home/me/kernel/linux/include/linux/string.h \
   /home/me/kernel/linux/include/linux/slab.h \
   /home/me/kernel/linux/include/linux/vmalloc.h \
   /home/me/kernel/linux/include/linux/mm.h \
   /home/me/kernel/linux/include/linux/ioport.h \
   /home/me/kernel/linux/include/linux/time.h \
   /home/me/kernel/linux/include/linux/blk.h \
   /home/me/kernel/linux/include/linux/init.h \
   /home/me/kernel/linux/include/linux/spinlock.h \
   scsi.h \
   hosts.h \
   53c7,8xx.h \
   constants.h \
   sd.h \
   /home/me/kernel/linux/include/linux/stat.h \
   /home/me/kernel/linux/include/linux/stddef.h \
   $(wildcard /home/me/kernel/linux/include/config/scsi/ncr53c7xx/fast.h) \
   53c8xx_d.h \
   53c8xx_u.h \
   scsi_module.c
53c7,8xx.h: \
   /home/me/kernel/linux/include/linux/version.h \
   /home/me/kernel/linux/include/scsi/scsicam.h
	@touch 53c7,8xx.h
53c700.o: 53c700.c \
   /home/me/kernel/linux/include/linux/version.h \
   /home/me/kernel/linux/include/linux/kernel.h \
   /home/me/kernel/linux/include/linux/types.h \
   /home/me/kernel/linux/include/linux/string.h \
   /home/me/kernel/linux/include/linux/ioport.h \
   /home/me/kernel/linux/include/linux/delay.h \
   /home/me/kernel/linux/include/linux/spinlock.h \
   /home/me/kernel/linux/include/linux/sched.h \
   /home/me/kernel/linux/include/linux/proc_fs.h \
   /home/me/kernel/linux/include/linux/init.h \
   /home/me/kernel/linux/include/linux/mca.h \
   /home/me/kernel/linux/include/asm/dma.h \
   /home/me/kernel/linux/include/asm/system.h \
   /home/me/kernel/linux/include/asm/io.h \
   /home/me/kernel/linux/include/asm/pgtable.h \
   /home/me/kernel/linux/include/asm/byteorder.h \
   /home/me/kernel/linux/include/linux/blk.h \
   /home/me/kernel/linux/include/linux/module.h \
   /home/me/kernel/linux/include/linux/pci.h \
   scsi.h \
   hosts.h \
   constants.h \
   53c700.h \
   $(wildcard /home/me/kernel/linux/include/config/53c700/use/consistent.h)
53c700.h: \
   $(wildcard /home/me/kernel/linux/include/config/53c700/io/mapped.h) \
   $(wildcard /home/me/kernel/linux/include/config/53c700/mem/mapped.h) \
   $(wildcard /home/me/kernel/linux/include/config/53c700/use/consistent.h) \
   $(wildcard /home/me/kernel/linux/include/config/53c700/le/on/be.h)
	@touch 53c700.h
53c7xx.o: 53c7xx.c \
   /home/me/kernel/linux/include/linux/module.h \
   /home/me/kernel/linux/include/linux/types.h \
   /home/me/kernel/linux/include/asm/setup.h \
   /home/me/kernel/linux/include/asm/dma.h \
   /home/me/kernel/linux/include/asm/io.h \
   /home/me/kernel/linux/include/asm/system.h \
   /home/me/kernel/linux/include/linux/delay.h \
   /home/me/kernel/linux/include/linux/signal.h \
   /home/me/kernel/linux/include/linux/sched.h \
   /home/me/kernel/linux/include/linux/errno.h \
   /home/me/kernel/linux/include/linux/string.h \
   /home/me/kernel/linux/include/linux/slab.h \
   /home/me/kernel/linux/include/linux/vmalloc.h \
   /home/me/kernel/linux/include/linux/mm.h \
   /home/me/kernel/linux/include/linux/ioport.h \
   /home/me/kernel/linux/include/linux/time.h \
   /home/me/kernel/linux/include/linux/blk.h \
   /home/me/kernel/linux/include/linux/spinlock.h \
   /home/me/kernel/linux/include/asm/pgtable.h \
   $(wildcard /home/me/kernel/linux/include/config/amiga.h) \
   /home/me/kernel/linux/include/asm/irq.h \
   $(wildcard /home/me/kernel/linux/include/config/mvme16x.h) \
   $(wildcard /home/me/kernel/linux/include/config/bvme6000.h) \
   scsi.h \
   hosts.h \
   53c7xx.h \
   constants.h \
   sd.h \
   /home/me/kernel/linux/include/linux/stat.h \
   /home/me/kernel/linux/include/linux/stddef.h \
   $(wildcard /home/me/kernel/linux/include/config/scsi/ncr53c7xx/fast.h)
AM53C974.o: AM53C974.c \
   /home/me/kernel/linux/include/linux/module.h \
   /home/me/kernel/linux/include/linux/delay.h \
   /home/me/kernel/linux/include/linux/signal.h \
   /home/me/kernel/linux/include/linux/sched.h \
   /home/me/kernel/linux/include/linux/errno.h \
   /home/me/kernel/linux/include/linux/pci.h \
   /home/me/kernel/linux/include/linux/string.h \
   /home/me/kernel/linux/include/linux/blk.h \
   /home/me/kernel/linux/include/linux/init.h \
   /home/me/kernel/linux/include/linux/spinlock.h \
   /home/me/kernel/linux/include/asm/io.h \
   /home/me/kernel/linux/include/asm/system.h \
   scsi.h \
   hosts.h \
   AM53C974.h \
   constants.h \
   sd.h \
   /home/me/kernel/linux/include/scsi/scsicam.h \
   scsi_module.c
AM53C974.h: \
   /home/me/kernel/linux/include/scsi/scsicam.h
	@touch AM53C974.h
BusLogic.o: BusLogic.c \
   /home/me/kernel/linux/include/linux/version.h \
   /home/me/kernel/linux/include/linux/module.h \
   /home/me/kernel/linux/include/linux/init.h \
   /home/me/kernel/linux/include/linux/types.h \
   /home/me/kernel/linux/include/linux/blk.h \
   /home/me/kernel/linux/include/linux/blkdev.h \
   /home/me/kernel/linux/include/linux/delay.h \
   /home/me/kernel/linux/include/linux/ioport.h \
   /home/me/kernel/linux/include/linux/mm.h \
   /home/me/kernel/linux/include/linux/sched.h \
   /home/me/kernel/linux/include/linux/stat.h \
   /home/me/kernel/linux/include/linux/pci.h \
   /home/me/kernel/linux/include/linux/spinlock.h \
   /home/me/kernel/linux/include/asm/dma.h \
   /home/me/kernel/linux/include/asm/io.h \
   /home/me/kernel/linux/include/asm/system.h \
   scsi.h \
   hosts.h \
   sd.h \
   BusLogic.h \
   FlashPoint.c \
   $(wildcard /home/me/kernel/linux/include/config/pci.h) \
   $(wildcard /home/me/kernel/linux/include/config/scsi/omit/flashpoint.h) \
   scsi_module.c
BusLogic.h: \
   $(wildcard /home/me/kernel/linux/include/config/pci.h) \
   $(wildcard /home/me/kernel/linux/include/config/scsi/omit/flashpoint.h)
	@touch BusLogic.h
FlashPoint.o: FlashPoint.c \
   $(wildcard /home/me/kernel/linux/include/config/scsi/omit/flashpoint.h)
NCR5380.o: NCR5380.c \
   /home/me/kernel/linux/include/linux/delay.h \
   /home/me/kernel/linux/include/linux/blk.h \
   /home/me/kernel/linux/include/linux/spinlock.h
NCR53C9x.o: NCR53C9x.c \
   /home/me/kernel/linux/include/linux/module.h \
   /home/me/kernel/linux/include/linux/kernel.h \
   /home/me/kernel/linux/include/linux/delay.h \
   /home/me/kernel/linux/include/linux/types.h \
   /home/me/kernel/linux/include/linux/string.h \
   /home/me/kernel/linux/include/linux/slab.h \
   /home/me/kernel/linux/include/linux/blk.�:	�1`F
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ifeq (-D__KERNEL__ -I/home/me/kernel/linux/include -Wall -Wstrict-prototypes -Wno-trigraphs -O2 -fomit-frame-pointer -fno-strict-aliasing -fno-common -pipe -mpreferred-stack-boundary=2 -march=i686,$(strip $(subst $(comma),:,$(CFLAGS) $(EXTRA_CFLAGS) $(CFLAGS_base.o))))
FILES_FLAGS_UP_TO_DATE += base.o
endif
o.bits.sign;				\
  } while (0)


/*
 * Repack the raw bits of a native fp value.
 */

#define _FP_PACK_RAW_2(fs, val, X)			\
  do {							\
    union _FP_UNION_##fs _flo;				\
							\
    _flo.bits.frac0 = X##_f0;				\
    _flo.bits.frac1 = X##_f1;				\
    _flo.bits.exp   = X##_e;				\
    _flo.bits.sign  = X##_s;				\
							\
    (val) = _flo.flt;					\
  } while (0)


/*
 * Multiplication algorithms:
 */

/* Given a 1W * 1W => 2W primitive, do the extended multiplication.  */

#define _FP_MUL_MEAT_2_wide(fs, R, X, Y, doit)				\
  do {									\
    _FP_FRAC_DECL_4(_z); _FP_FRAC_DECL_2(_b); _FP_FRAC_DECL_2(_c);	\
									\
    doit(_FP_FRAC_WORD_4(_z,1), _FP_FRAC_WORD_4(_z,0), X##_f0, Y##_f0); \
    doit(_b_f1, _b_f0, X##_f0, Y##_f1);					\
    doit(_c_f1, _c_f0, X##_f1, Y##_f0);					\
    doit(_FP_FRAC_WORD_4(_z,3), _FP_FRAC_WORD_4(_z,2), X##_f1, Y##_f1); \
									\
    __FP_FRAC_ADD_4(_FP_FRAC_WORD_4(_z,3),_FP_FRAC_WORD_4(_z,2),	\
		    _FP_FRAC_WORD_4(_z,1),_FP_FRAC_WORD_4(_z,0),	\
		    0, _b_f1, _b_f0, 0,					\
		    _FP_FRAC_WORD_4(_z,3),_FP_FRAC_WORD_4(_z,2),	\
		    _FP_FRAC_WORD_4(_z,1),_FP_FRAC_WORD_4(_z,0));	\
    __FP_FRAC_ADD_4(_FP_FRAC_WORD_4(_z,3),_FP_FRAC_WORD_4(_z,2),	\
		    _FP_FRAC_WORD_4(_z,1),_FP_FRAC_WORD_4(_z,0),	\
		    0, _c_f1, _c_f0, 0,					\
		    _FP_FRAC_WORD_4(_z,3),_FP_FRAC_WORD_4(_z,2),	\
		    _FP_FRAC_WORD_4(_z,1),_FP_FRAC_WORD_4(_z,0));	\
									\
    /* Normalize since we know where the msb of the multiplicands	\
       were (bit B), we know that the msb of the of the product is	\
       at either 2B or 2B-1.  */					\
    _FP_FRAC_SRS_4(_z, _FP_WFRACBITS_##fs-1, 2*_FP_WFRACBITS_##fs);	\
    R##_f0 = _FP_FRAC_WORD_4(_z,0);					\
    R##_f1 = _FP_FRAC_WORD_4(_z,1);					\
  } while (0)

/* This next macro appears to be totally broken. Fortunately nowhere
 * seems to use it :-> The problem is that we define _z[4] but
 * then use it in _FP_FRAC_SRS_4, which will attempt to access
 * _z_f[n] which will cause an error. The fix probably involves 
 * declaring it with _FP_FRAC_DECL_4, see previous macro. -- PMM 02/1998 
 */
#define _FP_MUL_MEAT_2_gmp(fs, R, X, Y)					\
  do {									\
    _FP_W_TYPE _x[2], _y[2], _z[4];					\
    _x[0] = X##_f0; _x[1] = X##_f1;					\
    _y[0] = Y##_f0; _y[1] = Y##_f1;					\
									\
    mpn_mul_n(_z, _x, _y, 2);						\
									\
    /* Normalize since we know where the msb of the multiplicands	\
       were (bit B), we know that the msb of the of the product is	\
       at either 2B or 2B-1.  */					\
    _FP_FRAC_SRS_4(_z, _FP_WFRACBITS##_fs-1, 2*_FP_WFRACBITS_##fs);	\
    R##_f0 = _z[0];							\
    R##_f1 = _z[1];							\
  } while (0)


/*
 * Division algorithms:
 * This seems to be giving me difficulties -- PMM 
 * Look, NetBSD seems to be able to comment algorithms. Can't you?
 * I've thrown printks at the problem.
 * This now appears to work, but I still don't really know why.
 * Also, I don't think the result is properly normalised...
 */

#define _FP_DIV_MEAT_2_udiv_64(fs, R, X, Y)				\
  do {									\
    extern void _fp_udivmodti4(_FP_W_TYPE q[2], _FP_W_TYPE r[2],	\
			       _FP_W_TYPE n1, _FP_W_TYPE n0,		\
			       _FP_W_TYPE d1, _FP_W_TYPE d0);		\
    _FP_W_TYPE _n_f3, _n_f2, _n_f1, _n_f0, _r_f1, _r_f0;		\
    _FP_W_TYPE _q_f1, _q_f0, _m_f1, _m_f0;				\
    _FP_W_TYPE _rmem[2], _qmem[2];					\
    /* I think this check is to ensure that the result is normalised.   \
     * Assuming X,Y normalised (ie in [1.0,2.0)) X/Y will be in         \
     * [0.5,2.0). Furthermore, it will be less than 1.0 iff X < Y.      \
     * In this case we tweak things. (this is based on comments in      \
     * the NetBSD FPU emulation code. )                                 \
     * We know X,Y are normalised because we ensure this as part of     \
     * the unpacking process. -- PMM                                    \
     */									\
    if (_FP_FRAC_GT_2(X, Y))						\
      {									\
/*	R##_e++; */							\
	_n_f3 = X##_f1 >> 1;						\
	_n_f2 = X##_f1 << (_FP_W_TYPE_SIZE - 1) | X##_f0 >> 1;		\
	_n_f1 = X##_f0 << (_FP_W_TYPE_SIZE - 1);			\
	_n_f0 = 0;							\
      }									\
    else								\
      {									\
	R##_e--;							\
	_n_f3 = X##_f1;							\
	_n_f2 = X##_f0;							\
	_n_f1 = _n_f0 = 0;						\
      }									\
									\
    /* Normalize, i.e. make the most significant bit of the 		\
       denominator set.  CHANGED: - 1 to nothing -- PMM */		\
    _FP_FRAC_SLL_2(Y, _FP_WFRACXBITS_##fs /* -1 */);			\
									\
    /* Do the 256/128 bit division given the 128-bit _fp_udivmodtf4 	\
       primitive snagged from libgcc2.c.  */				\
									\
    _fp_udivmodti4(_qmem, _rmem, _n_f3, _n_f2, 0, Y##_f1);		\
    _q_f1 = _qmem[0];							\
    umul_ppmm(_m_f1, _m_f0, _q_f1, Y##_f0);				\
    _r_f1 = _rmem[0];							\
    _r_f0 = _n_f1;							\
    if (_FP_FRAC_GT_2(_m, _r))						\
      {									\
	_q_f1--;							\
	_FP_FRAC_ADD_2(_r, _r, Y);					\
	if (_FP_FRAC_GE_2(_r, Y) && _FP_FRAC_GT_2(_m, _r))		\
	  {								\
	    _q_f1--;							\
	    _FP_FRAC_ADD_2(_r, _r, Y);					\
	  }								\
      }									\
    _FP_FRAC_SUB_2(_r, _r, _m);						\
									\
    _fp_udivmodti4(_qmem, _rmem, _r_f1, _r_f0, 0, Y##_f1);		\
    _q_f0 = _qmem[0];							\
    umul_ppmm(_m_f1, _m_f0, _q_f0, Y##_f0);				\
    _r_f1 = _rmem[0];							\
    _r_f0 = _n_f0;							\
    if (_FP_FRAC_GT_2(_m, _r))						\
      {									\
	_q_f0--;							\
	_FP_FRAC_ADD_2(_r, _r, Y);					\
	if (_FP_FRAC_GE_2(_r, Y) && _FP_FRAC_GT_2(_m, _r))		\
	  {								\
	    _q_f0--;							\
	    _FP_FRAC_ADD_2(_r, _r, Y);					\
	  }								\
      }									\
    _FP_FRAC_SUB_2(_r, _r, _m);						\
									\
    R##_f1 = _q_f1;							\
    R##_f0 = _q_f0 | ((_r_f1 | _r_f0) != 0);				\
    /* adjust so answer is normalized again. I'm not sure what the 	\
     * final sz param should be. In practice it's never used since      \
     * N is 1 which is always going to be < _FP_W_TYPE_SIZE...		\
     */									\
    /* _FP_FRAC_SRS_2(R,1,_FP_WFRACBITS_##fs);	*/			\
  } while (0)


#define _FP_DIV_MEAT_2_gmp(fs, R, X, Y)					\
  do {									\
    _FP_W_TYPE _x[4], _y[2], _z[4];					\
    _y[0] = Y##_f0; _y[1] = Y##_f1;					\
    _x[0] = _x[3] = 0;							\
    if (_FP_FRAC_GT_2(X, Y))						\
      {									\
	R##_e++;							\
	_x[1] = (X##_f0 << (_FP_WFRACBITS-1 - _FP_W_TYPE_SIZE) |	\
		 X##_f1 >> (_FP_W_TYPE_SIZE -				\
			    (_FP_WFRACBITS-1 - _FP_W_TYPE_SIZE)));	\
	_x[2] = X##_f1 << (_FP_WFRACBITS-1 - _FP_W_TYPE_SIZE);		\
      }									\
    else								\
      {									\
	_x[1] = (X##_f0 << (_FP_WFRACBITS - _FP_W_TYPE_SIZE) |		\
		 X##_f1 >> (_FP_W_TYPE_SIZE -				\
			    (_FP_WFRACBITS - _FP_W_TYPE_SIZE)));	\
	_x[2] = X##_f1 << (_FP_WFRACBITS - _FP_W_TYPE_SIZE);		\
      }									\
									\
    (void) mpn_divrem (_z, 0, _x, 4, _y, 2);				\
    R##_f1 = _z[1];							\
    R##_f0 = _z[0] | ((_x[0] | _x[1]) != 0);				\
  } while (0)


/*
 * Square root algorithms:
 * We have just one right now, maybe Newton approximation
 * should be added for those machines where division is fast.
 */
 
#define _FP_SQRT_MEAT_2(R, S, T, X, q)			\
  do {							\
    while (q)						\
      {							\
        T##_f1 = S##_f1 + q;				\
        if (T##_f1 <= X##_f1)				\
          {						\
            S##_f1 = T##_f1 + q;			\
            X##_f1 -= T##_f1;				\
            R##_f1 += q;				\
          }						\
        _FP_FRAC_SLL_2(X, 1);				\
        q >>= 1;					\
      }							\
    q = (_FP_W_TYPE)1 << (_FP_W_TYPE_SIZE - 1);		\
    while (q)						\
      {							\
        T##_f0 = S##_f0 + q;				\
        T##_f1 = S##_f1;				\
        if (T##_f1 < X##_f1 || 				\
            (T##_f1 == X##_f1 && T##_f0 < X##_f0))	\
          {						\
            S##_f0 = T##_f0 + q;			\
            if (((_FP_WS_TYPE)T##_f0) < 0 &&		\
                ((_FP_WS_TYPE)S##_f0) >= 0)		\
              S##_f1++;					\
            _FP_FRAC_SUB_2(X, X, T);			\
            R##_f0 += q;				\
          }						\
        _FP_FRAC_SLL_2(X, 1);				\
        q >>= 1;					\
      }							\
  } while (0)


/*
 * Assembly/disassembly for converting to/from integral types.  
 * No shifting or overflow handled here.
 */

#define _FP_FRAC_ASSEMBLE_2(r, X, rsize)	\
  do {						\
    if (rsize <= _FP_W_TYPE_SIZE)		\
      r = X##_f0;				\
    else					\
      {						\
	r = X##_f1;				\
	r <<= _FP_W_TYPE_SIZE;			\
	r += X##_f0;				\
      }						\
  } while (0)

#define _FP_FRAC_DISASSEMBLE_2(X, r, rsize)				\
  do {									\
    X##_f0 = r;								\
    X##_f1 = (rsize <= _FP_W_TYPE_SIZE ? 0 : r >> _FP_W_TYPE_SIZE);	\
  } while (0)

/*
 * Convert FP values between word sizes
 */

#define _FP_FRAC_CONV_1_2(dfs, sfs, D, S)				\
  do {									\
    _FP_FRAC_SRS_2(S, (_FP_WFRACBITS_##sfs - _FP_WFRACBITS_##dfs),	\
		   _FP_WFRACBITS_##sfs);				\
    D##_f = S##_f0;							\
  } while (0)

#define _FP_FRAC_CONV_2_1(dfs, sfs, D, S)				\
  do {									\
    D##_f0 = S##_f;							\
    D##_f1 = 0;								\
    _FP_FRAC_SLL_2(D, (_FP_WFRACBITS_##dfs - _FP_WFRACBITS_##sfs));	\
  } while (0)

/*
 * BK Id: SCCS/s.op-common.h 1.5 05/17/01 18:14:23 cort
 */

#define _FP_DECL(wc, X)			\
  _FP_I_TYPE X##_c, X##_s, X##_e;	\
  _FP_FRAC_DECL_##wc(X)

/*
 * Finish truely unpacking a native fp value by classifying the kind
 * of fp value and normalizing both the exponent and the fraction.
 */

#define _FP_UNPACK_CANONICAL(fs, wc, X)					\
do {									\
  switch (X##_e)							\
  {									\
  default:								\
    _FP_FRAC_HIGH_##wc(X) |= _FP_IMPLBIT_##fs;				\
    _FP_FRAC_SLL_##wc(X, _FP_WORKBITS);					\
    X##_e -= _FP_EXPBIAS_##fs;						\
    X##_c = FP_CLS_NORMAL;						\
    break;								\
									\
  case 0:								\
    if (_FP_FRAC_ZEROP_##wc(X))						\
      X##_c = FP_CLS_ZERO;						\
    else								\
      {									\
	/* a denormalized number */					\
	_FP_I_TYPE _shift;						\
	_FP_FRAC_CLZ_##wc(_shift, X);					\
	_shift -= _FP_FRACXBITS_##fs;					\
	_FP_FRAC_SLL_##wc(X, (_shift+_FP_WORKBITS));			\
	X##_e -= _FP_EXPBIAS_##fs - 1 + _shift;				\
	X##_c = FP_CLS_NORMAL;						\
      }									\
    break;								\
									\
  case _FP_EXPMAX_##fs:							\
    if (_FP_FRAC_ZEROP_##wc(X))						\
      X##_c = FP_CLS_INF;						\
    else								\
      /* we don't differentiate between signaling and quiet nans */	\
      X##_c = FP_CLS_NAN;						\
    break;								\
  }									\
} while (0)


/*
 * Before packing the bits back into the native fp result, take care
 * of such mundane things as rounding and overflow.  Also, for some
 * kinds of fp values, the original parts may not have been fully
 * extracted -- but that is ok, we can regenerate them now.
 */

#define _FP_PACK_CANONICAL(fs, wc, X)				\
({int __ret = 0;						\
  switch (X##_c)						\
  {								\
  case FP_CLS_NORMAL:						\
    X##_e += _FP_EXPBIAS_##fs;					\
    if (X##_e > 0)						\
      {								\
	__ret |= _FP_ROUND(wc, X);				\
	if (_FP_FRAC_OVERP_##wc(fs, X))				\
	  {							\
	    _FP_FRAC_SRL_##wc(X, (_FP_WORKBITS+1));		\
	    X##_e++;						\
	  }							\
	else							\
	  _FP_FRAC_SRL_##wc(X, _FP_WORKBITS);			\
	if (X##_e >= _FP_EXPMAX_##fs)				\
	  {							\
	    /* overflow to infinity */				\
	    X##_e = _FP_EXPMAX_##fs;				\
	    _FP_FRAC_SET_##wc(X, _FP_ZEROFRAC_##wc);		\
            __ret |= EFLAG_OVERFLOW;				\
	  }							\
      }								\
    else							\
      {								\
	/* we've got a denormalized number */			\
	X##_e = -X##_e + 1;					\
	if (X##_e <= _FP_WFRACBITS_##fs)			\
	  {							\
	    _FP_FRAC_SRS_##wc(X, X##_e, _FP_WFRACBITS_##fs);	\
	    __ret |= _FP_ROUND(wc, X);				\
	    _FP_FRAC_SLL_##wc(X, 1);				\
	    if (_FP_FRAC_OVERP_##wc(fs, X))			\
	      {							\
	        X##_e = 1;					\
	        _FP_FRAC_SET_##wc(X, _FP_ZEROFRAC_##wc);	\
	      }							\
	    else						\
	      {							\
		X##_e = 0;					\
		_FP_FRAC_SRL_##wc(X, _FP_WORKBITS+1);		\
                __ret |= EFLAG_UNDERFLOW;			\
	      }							\
	  }							\
	else							\
	  {							\
	    /* underflow to zero */				\
	    X##_e = 0;						\
	    _FP_FRAC_SET_##wc(X, _FP_ZEROFRAC_##wc);		\
            __ret |= EFLAG_UNDERFLOW;				\
	  }							\
      }								\
    break;							\
								\
  case FP_CLS_ZERO:						\
    X##_e = 0;							\
    _FP_FRAC_SET_##wc(X, _FP_ZEROFRAC_##wc);			\
    break;							\
								\
  case FP_CLS_INF:						\
    X##_e = _FP_EXPMAX_##fs;					\
    _FP_FRAC_SET_##wc(X, _FP_ZEROFRAC_##wc);			\
    break;							\
								\
  case FP_CLS_NAN:						\
    X##_e = _FP_EXPMAX_##fs;					\
    if (!_FP_KEEPNANFRACP)					\
      {								\
	_FP_FRAC_SET_##wc(X, _FP_NANFRAC_##fs);			\
	X##_s = 0;						\
      }								\
    else							\
      _FP_FRAC_HIGH_##wc(X) |= _FP_QNANBIT_##fs;		\
    break;							\
  }								\
  __ret;							\
})


/*
 * Main addition routine.  The input values should be cooked.
 */

#define _FP_ADD(fs, wc, R, X, Y)					     \
do {									     \
  switch (_FP_CLS_COMBINE(X##_c, Y##_c))				     \
  {									     \
  case _FP_CLS_COMBINE(FP_CLS_NORMAL,FP_CLS_NORMAL):			     \
    {									     \
      /* shift the smaller number so that its exponent matches the larger */ \
      _FP_I_TYPE diff = X##_e - Y##_e;					     \
									     \
      if (diff < 0)							     \
	{								     \
	  diff = -diff;							     \
	  if (diff <= _FP_WFRACBITS_##fs)				     \
	    _FP_FRAC_SRS_##wc(X, diff, _FP_WFRACBITS_##fs);		     \
	  else if (!_FP_FRAC_ZEROP_##wc(X))				     \
	    _FP_FRAC_SET_##wc(X, _FP_MINFRAC_##wc);			     \
	  else								     \
	    _FP_FRAC_SET_##wc(X, _FP_ZEROFRAC_##wc);			     \
	  R##_e = Y##_e;						     \
	}								     \
      else								     \
	{								     \
	  if (diff > 0)							     \
	    {								     \
	      if (diff <= _FP_WFRACBITS_##fs)				     \
	        _FP_FRAC_SRS_##wc(Y, diff, _FP_WFRACBITS_##fs);		     \
	      else if (!_FP_FRAC_ZEROP_##wc(Y))				     \
	        _FP_FRAC_SET_##wc(Y, _FP_MINFRAC_##wc);			     \
	      else							     \
	        _FP_FRAC_SET_##wc(Y, _FP_ZEROFRAC_##wc);		     \
	    }								     \
	  R##_e = X##_e;						     \
	}								     \
									     \
      R##_c = FP_CLS_NORMAL;						     \
									     \
      if (X##_s == Y##_s)						     \
	{								     \
	  R##_s = X##_s;						     \
	  _FP_FRAC_ADD_##wc(R, X, Y);					     \
	  if (_FP_FRAC_OVERP_##wc(fs, R))				     \
	    {								     \
	      _FP_FRAC_SRS_##wc(R, 1, _FP_WFRACBITS_##fs);		     \
	      R##_e++;							     \
	    }								     \
	}								     \
      else								     \
	{								     \
	  R##_s = X##_s;						     \
	  _FP_FRAC_SUB_##wc(R, X, Y);					     \
	  if (_FP_FRAC_ZEROP_##wc(R))					     \
	    {								     \
	      /* return an exact zero */				     \
	      if (FP_ROUNDMODE == FP_RND_MINF)				     \
		R##_s |= Y##_s;						     \
	      else							     \
		R##_s &= Y##_s;						     \
	      R##_c = FP_CLS_ZERO;					     \
	    }								     \
	  else								     \
	    {								     \
	      if (_FP_FRAC_NEGP_##wc(R))				     \
		{							     \
		  _FP_FRAC_SUB_##wc(R, Y, X);				     \
		  R##_s = Y##_s;					     \
		}							     \
									     \
	      /* renormalize after subtraction */			     \
	      _FP_FRAC_CLZ_##wc(diff, R);				     \
	      diff -= _FP_WFRACXBITS_##fs;				     \
	      if (diff)							     \
		{							     \
		  R##_e -= diff;					     \
		  _FP_FRAC_SLL_##wc(R, diff);				     \
		}							     \
	    }								     \
	}								     \
      break;								     \
    }									     \
									     \
  case _FP_CLS_COMBINE(FP_CLS_NAN,FP_CLS_NAN):				     \
    _FP_CHOOSENAN(fs, wc, R, X, Y);					     \
    break;								     \
									     \
  case _FP_CLS_COMBINE(FP_CLS_NORMAL,FP_CLS_ZERO):			     \
    R##_e = X##_e;							     \
  case _FP_CLS_COMBINE(FP_CLS_NAN,FP_CLS_NORMAL):			     \
  case _FP_CLS_COMBINE(FP_CLS_NAN,FP_CLS_INF):				     \
  case _FP_CLS_COMBINE(FP_CLS_NAN,FP_CLS_ZERO):				     \
    _FP_FRAC_COPY_##wc(R, X);						     \
    R##_s = X##_s;							     \
    R##_c = X##_c;							     \
    break;								     \
									     \
  case _FP_CLS_COMBINE(FP_CLS_ZERO,FP_CLS_NORMAL):			     \
    R##_e = Y##_e;							     \
  case _FP_CLS_COMBINE(FP_CLS_NORMAL,FP_CLS_NAN):			     \
  case _FP_CLS_COMBINE(FP_CLS_INF,FP_CLS_NAN):				     \
  case _FP_CLS_COMBINE(FP_CLS_ZERO,FP_CLS_NAN):				     \
    _FP_FRAC_COPY_##wc(R, Y);						     \
    R##_s = Y##_s;							     \
    R##_c = Y##_c;							     \
    break;								     \
									     \
  case _FP_CLS_COMBINE(FP_CLS_INF,FP_CLS_INF):				     \
    if (X##_s != Y##_s)							     \
      {									     \
	/* +INF + -INF => NAN */					     \
	_FP_FRAC_SET_##wc(R, _FP_NANFRAC_##fs);				     \
	R##_s = X##_s ^ Y##_s;						     \
	R##_c = FP_CLS_NAN;						     \
	break;								     \
      }									     \
    /* FALLTHRU */							     \
									     \
  case _FP_CLS_COMBINE(FP_CLS_INF,FP_CLS_NORMAL):			     \
  case _FP_CLS_COMBINE(FP_CLS_INF,FP_CLS_ZERO):				     \
    R##_s = X##_s;							     \
    R##_c = FP_CLS_INF;							     \
    break;								     \
									     \
  case _FP_CLS_COMBINE(FP_CLS_NORMAL,FP_CLS_INF):			     \
  case _FP_CLS_COMBINE(FP_CLS_ZERO,FP_CLS_INF):				     \
    R##_s = Y##_s;							     \
    R##_c = FP_CLS_INF;							     \
    break;								     \
									     \
  case _FP_CLS_COMBINE(FP_CLS_ZERO,FP_CLS_ZERO):			     \
    /* make sure the sign is correct */					     \
    if (FP_ROUNDMODE == FP_RND_MINF)					     \
      R##_s = X##_s | Y##_s;						     \
    else								     \
      R##_s = X##_s & Y##_s;						     \
    R##_c = FP_CLS_ZERO;						     \
    break;								     \
									     \
  default:								     \
    abort();								     \
  }									     \
} while (0)


/*
 * Main negation routine.  FIXME -- when we care about setting exception
 * bits reliably, this will not do.  We should examine all of the fp classes.
 */

#define _FP_NEG(fs, wc, R, X)		\
  do {					\
    _FP_FRAC_COPY_##wc(R, X);		\
    R##_c = X##_c;			\
    R##_e = X##_e;			\
    R##_s = 1 ^ X##_s;			\
  } while (0)


/*
 * Main multiplication routine.  The input values should be cooked.
 */

#define _FP_MUL(fs, wc, R, X, Y)			\
do {							\
  R##_s = X##_s ^ Y##_s;				\
  switch (_FP_CLS_COMBINE(X##_c, Y##_c))		\
  {							\
  case _FP_CLS_COMBINE(FP_CLS_NORMAL,FP_CLS_NORMAL):	\
    R##_c = FP_CLS_NORMAL;				\
    R##_e = X##_e + Y##_e + 1;				\
							\
    _FP_MUL_MEAT_##fs(R,X,Y);				\
							\
    if (_FP_FRAC_OVERP_##wc(fs, R))			\
      _FP_FRAC_SRS_##wc(R, 1, _FP_WFRACBITS_##fs);	\
    else						\
      R##_e--;						\
    break;						\
							\
  case _FP_CLS_COMBINE(FP_CLS_NAN,FP_CLS_NAN):		\
    _FP_CHOOSENAN(fs, wc, R, X, Y);			\
    break;						\
							\
  case _FP_CLS_COMBINE(FP_CLS_NAN,FP_CLS_NORMAL):	\
  case _FP_CLS_COMBINE(FP_CLS_NAN,FP_CLS_INF):		\
  case _FP_CLS_COMBINE(FP_CLS_NAN,FP_CLS_ZERO):		\
    R##_s = X##_s;					\
							\
  case _FP_CLS_COMBINE(FP_CLS_INF,FP_CLS_INF):		\
  case _FP_CLS_COMBINE(FP_CLS_INF,FP_CLS_NORMAL):	\
  case _FP_CLS_COMBINE(FP_CLS_ZERO,FP_CLS_NORMAL):	\
  case _FP_CLS_COMBINE(FP_CLS_ZERO,FP_CLS_ZERO):	\
    _FP_FRAC_COPY_##wc(R, X);				\
    R##_c = X##_c;					\
    break;						\
							\
  case _FP_CLS_COMBINE(FP_CLS_NORMAL,FP_CLS_NAN):	\
  case _FP_CLS_COMBINE(FP_CLS_INF,FP_CLS_NAN):		\
  case _FP_CLS_COMBINE(FP_CLS_ZERO,FP_CLS_NAN):		\
    R##_s = Y##_s;					\
							\
  case _FP_CLS_COMBINE(FP_CLS_NORMAL,FP_CLS_INF):	\
  case _FP_CLS_COMBINE(FP_CLS_NORMAL,FP_CLS_ZERO):	\
    _FP_FRAC_COPY_##wc(R, Y);				\
    R##_c = Y##_c;					\
    break;						\
							\
  case _FP_CLS_COMBINE(FP_CLS_INF,FP_CLS_ZERO):		\
  case _FP_CLS_COMBINE(FP_CLS_ZERO,FP_CLS_INF):		\
    R##_c = FP_CLS_NAN;					\
    _FP_FRAC_SET_##wc(R, _FP_NANFRAC_##fs);		\
    break;						\
							\
  default:						\
    abort();						\
  }							\
} while (0)


/*
 * Main division routine.  The input values should be cooked.
 */

#define _FP_DIV(fs, wc, R, X, Y)			\
do {							\
  R##_s = X##_s ^ Y##_s;				\
  switch (_FP_CLS_COMBINE(X##_c, Y##_c))		\
  {							\
  case _FP_CLS_COMBINE(FP_CLS_NORMAL,FP_CLS_NORMAL):	\
    R##_c = FP_CLS_NORMAL;				\
    R##_e = X##_e - Y##_e;				\
							\
    _FP_DIV_MEAT_##fs(R,X,Y);				\
    break;						\
							\
  case _FP_CLS_COMBINE(FP_CLS_NAN,FP_CLS_NAN):		\
    _FP_CHOOSENAN(fs, wc, R, X, Y);			\
    break;						\
							\
  case _FP_CLS_COMBINE(FP_CLS_NAN,FP_CLS_NORMAL):	\
  case _FP_CLS_COMBINE(FP_CLS_NAN,FP_CLS_INF):		\
  case _FP_CLS_COMBINE(FP_CLS_NAN,FP_CLS_ZERO):		\
    R##_s = X##_s;					\
    _FP_FRAC_COPY_##wc(R, X);				\
    R##_c = X##_c;					\
    break;						\
							\
  case _FP_CLS_COMBINE(FP_CLS_NORMAL,FP_CLS_NAN):	\
  case _FP_CLS_COMBINE(FP_CLS_INF,FP_CLS_NAN):		\
  case _FP_CLS_COMBINE(FP_CLS_ZERO,FP_CLS_NAN):		\
    R##_s = Y##_s;					\
    _FP_FRAC_COPY_##wc(R, Y);				\
    R##_c = Y##_c;					\
    break;						\
							\
  case _FP_CLS_COMBINE(FP_CLS_NORMAL,FP_CLS_INF):	\
  case _FP_CLS_COMBINE(FP_CLS_ZERO,FP_CLS_INF):		\
  case _FP_CLS_COMBINE(FP_CLS_ZERO,FP_CLS_NORMAL):	\
    R##_c = FP_CLS_ZERO;				\
    break;						\
							\
  case _FP_CLS_COMBINE(FP_CLS_NORMAL,FP_CLS_ZERO):	\
  case _FP_CLS_COMBINE(FP_CLS_INF,FP_CLS_ZERO):		\
  case _FP_CLS_COMBINE(FP_CLS_INF,FP_CLS_NORMAL):	\
    R##_c = FP_CLS_INF;					\
    break;						\
							\
  case _FP_CLS_COMBINE(FP_CLS_INF,FP_CLS_INF):		\
  case _FP_CLS_COMBINE(FP_CLS_ZERO,FP_CLS_ZERO):	\
    R##_c = FP_CLS_NAN;					\
    _FP_FRAC_SET_##wc(R, _FP_NANFRAC_##fs);		\
    break;						\
							\
  default:						\
    abort();						\
  }							\
} while (0)


/*
 * Main differential comparison routine.  The inputs should be raw not
 * cooked.  The return is -1,0,1 for normal values, 2 otherwise.
 */

#define _FP_CMP(fs, wc, ret, X, Y, un)					\
  do {									\
    /* NANs are unordered */						\
    if ((X##_e == _FP_EXPMAX_##fs && !_FP_FRAC_ZEROP_##wc(X))		\
	|| (Y##_e == _FP_EXPMAX_##fs && !_FP_FRAC_ZEROP_##wc(Y)))	\
      {									\
	ret = un;							\
      }									\
    else								\
      {									\
        int __x_zero = (!X##_e && _FP_FRAC_ZEROP_##wc(X)) ? 1 : 0;	\
        int __y_zero = (!Y##_e && _FP_FRAC_ZEROP_##wc(Y)) ? 1 : 0;	\
									\
	if (__x_zero && __y_zero)					\
	  ret = 0;							\
	else if (__x_zero)						\
	  ret = Y##_s ? 1 : -1;						\
	else if (__y_zero)						\
	  ret = X##_s ? -1 : 1;						\
	else if (X##_s != Y##_s)					\
	  ret = X##_s ? -1 : 1;						\
	else if (X##_e > Y##_e)						\
	  ret = X##_s ? -1 : 1;						\
	else if (X##_e < Y##_e)						\
	  ret = X##_s ? 1 : -1;						\
	else if (_FP_FRAC_GT_##wc(X, Y))				\
	  ret = X##_s ? -1 : 1;						\
	else if (_FP_FRAC_GT_##wc(Y, X))				\
	  ret = X##_s ? 1 : -1;						\
	else								\
	  ret = 0;							\
      }									\
  } while (0)


/* Simplification for strict equality.  */

#define _FP_CMP_EQ(fs, wc, ret, X, Y)					  \
  do {									  \
    /* NANs are unordered */						  \
    if ((X##_e == _FP_EXPMAX_##fs && !_FP_FRAC_ZEROP_##wc(X))		  \
	|| (Y##_e == _FP_EXPMAX_##fs && !_FP_FRAC_ZEROP_##wc(Y)))	  \
      {									  \
	ret = 1;							  \
      }									  \
    else								  \
      {									  \
	ret = !(X##_e == Y##_e						  \
		&& _FP_FRAC_EQ_##wc(X, Y)				  \
		&& (X##_s == Y##_s || !X##_e && _FP_FRAC_ZEROP_##wc(X))); \
      }									  \
  } while (0)

/*
 * Main square root routine.  The input value should be cooked.
 */

#define _FP_SQRT(fs, wc, R, X)						\
do {									\
    _FP_FRAC_DECL_##wc(T); _FP_FRAC_DECL_##wc(S);			\
    _FP_W_TYPE q;							\
    switch (X##_c)							\
    {									\
    case FP_CLS_NAN:							\
    	R##_s = 0;							\
    	R##_c = FP_CLS_NAN;						\
    	_FP_FRAC_SET_##wc(X, _FP_ZEROFRAC_##wc);			\
    	break;								\
    case FP_CLS_INF:							\
    	if (X##_s)							\
    	  {								\
    	    R##_s = 0;							\
	    R##_c = FP_CLS_NAN; /* sNAN */				\
    	  }								\
    	else								\
    	  {								\
    	    R##_s = 0;							\
    	    R##_c = FP_CLS_INF; /* sqrt(+inf) = +inf */			\
    	  }								\
    	break;								\
    case FP_CLS_ZERO:							\
	R##_s = X##_s;							\
    	R##_c = FP_CLS_ZERO; /* sqrt(+-0) = +-0 */			\
	break;								\
    case FP_CLS_NORMAL:							\
    	R##_s = 0;							\
        if (X##_s)							\
          {								\
	    R##_c = FP_CLS_NAN; /* sNAN */				\
	    break;							\
          }								\
    	R##_c = FP_CLS_NORMAL;						\
        if (X##_e & 1)							\
          _FP_FRAC_SLL_##wc(X, 1);					\
        R##_e = X##_e >> 1;						\
        _FP_FRAC_SET_##wc(S, _FP_ZEROFRAC_##wc);			\
        _FP_FRAC_SET_##wc(R, _FP_ZEROFRAC_##wc);			\
        q = _FP_OVERFLOW_##fs;						\
        _FP_FRAC_SLL_##wc(X, 1);					\
        _FP_SQRT_MEAT_##wc(R, S, T, X, q);				\
        _FP_FRAC_SRL_##wc(R, 1);					\
    }									\
  } while (0)

/*
 * Convert from FP to integer
 */

/* "When a NaN, infinity, large positive argument >= 2147483648.0, or 
 * large negative argument <= -2147483649.0 is converted to an integer,
 * the invalid_current bit...should be set and fp_exception_IEEE_754 should
 * be raised. If the floating point invalid trap is disabled, no trap occurs
 * and a numerical result is generated: if the sign bit of the operand
 * is 0, the result is 2147483647; if the sign bit of the operand is 1,
 * the result is -2147483648."
 * Similarly for conversion to extended ints, except that the boundaries
 * are >= 2^63, <= -(2^63 + 1), and the results are 2^63 + 1 for s=0 and
 * -2^63 for s=1.
 * -- SPARC Architecture Manual V9, Appendix B, which specifies how
 * SPARCs resolve implementation dependencies in the IEEE-754 spec.
 * I don't believe that the code below follows this. I'm not even sure
 * it's right! 
 * It doesn't cope with needing to convert to an n bit integer when there
 * is no n bit integer type. Fortunately gcc provides long long so this
 * isn't a problem for sparc32.
 * I have, however, fixed its NaN handling to conform as above.
 *         -- PMM 02/1998
 * NB: rsigned is not 'is r declared signed?' but 'should the value stored
 * in r be signed or unsigned?'. r is always(?) declared unsigned.
 * Comments below are mine, BTW -- PMM 
 */
#define _FP_TO_INT(fs, wc, r, X, rsize, rsigned)			\
  do {									\
    switch (X##_c)							\
      {									\
      case FP_CLS_NORMAL:						\
	if (X##_e < 0)							\
	  {								\
	  /* case FP_CLS_NAN: see above! */				\
	  case FP_CLS_ZERO:						\
	    r = 0;							\
	  }								\
	else if (X##_e >= rsize - (rsigned != 0))			\
	  {	/* overflow */						\
	  case FP_CLS_NAN:                                              \
          case FP_CLS_INF:						\
	    if (rsigned)						\
	      {								\
		r = 1;							\
		r <<= rsize - 1;					\
		r -= 1 - X##_s;						\
	      }								\
	    else							\
	      {								\
		r = 0;							\
		if (!X##_s)						\
		  r = ~r;						\
	      }								\
	  }								\
	else								\
	  {								\
	    if (_FP_W_TYPE_SIZE*wc < rsize)				\
	      {								\
		_FP_FRAC_ASSEMBLE_##wc(r, X, rsize);			\
		r <<= X##_e - _FP_WFRACBITS_##fs;			\
	      }								\
	    else							\
	      {								\
		if (X##_e >= _FP_WFRACBITS_##fs)			\
		  _FP_FRAC_SLL_##wc(X, (X##_e - _FP_WFRACBITS_##fs + 1));\
		else							\
		  _FP_FRAC_SRL_##wc(X, (_FP_WFRACBITS_##fs - X##_e - 1));\
		_FP_FRAC_ASSEMBLE_##wc(r, X, rsize);			\
	      }								\
	    if (rsigned && X##_s)					\
	      r = -r;							\
	  }								\
	break;								\
      }									\
  } while (0)

#define _FP_FROM_INT(fs, wc, X, r, rsize, rtype)			\
  do {									\
    if (r)								\
      {									\
	X##_c = FP_CLS_NORMAL;						\
									\
	if ((X##_s = (r < 0)))						\
	  r = -r;							\
	/* Note that `r' is now considered unsigned, so we don't have	\
	   to worry about the single signed overflow case.  */		\
									\
	if (rsize <= _FP_W_TYPE_SIZE)					\
	  __FP_CLZ(X##_e, r);						\
	else								\
	  __FP_CLZ_2(X##_e, (_FP_W_TYPE)(r >> _FP_W_TYPE_SIZE), 	\
		     (_FP_W_TYPE)r);					\
	if (rsize < _FP_W_TYPE_SIZE)					\
		X##_e -= (_FP_W_TYPE_SIZE - rsize);			\
	X##_e = rsize - X##_e - 1;					\
									\
	if (_FP_FRACBITS_##fs < rsize && _FP_WFRACBITS_##fs < X##_e)	\
	  __FP_FRAC_SRS_1(r, (X##_e - _FP_WFRACBITS_##fs), rsize);	\
	r &= ~((_FP_W_TYPE)1 << X##_e);					\
	_FP_FRAC_DISASSEMBLE_##wc(X, ((unsigned rtype)r), rsize);	\
	_FP_FRAC_SLL_##wc(X, (_FP_WFRACBITS_##fs - X##_e - 1));		\
      }									\
    else								\
      {									\
	X##_c = FP_CLS_ZERO, X##_s = 0;					\
      }									\
  } while (0)


#define FP_CONV(dfs,sfs,dwc,swc,D,S)			\
  do {							\
    _FP_FRAC_CONV_##dwc##_##swc(dfs, sfs, D, S);	\
    D##_e = S##_e;					\
    D##_c = S##_c;					\
    D##_s = S##_s;					\
  } while (0)

/*
 * Helper primitives.
 */

/* Count leading zeros in a word.  */

#ifndef __FP_CLZ
#if _FP_W_TYPE_SIZE < 64
/* this is just to shut the compiler up about shifts > word length -- PMM 02/1998 */
#define __FP_CLZ(r, x)				\
  do {						\
    _FP_W_TYPE _t = (x);			\
    r = _FP_W_TYPE_SIZE - 1;			\
    if (_t > 0xffff) r -= 16;			\
    if (_t > 0xffff) _t >>= 16;			\
    if (_t > 0xff) r -= 8;			\
    if (_t > 0xff) _t >>= 8;			\
    if (_t & 0xf0) r -= 4;			\
    if (_t & 0xf0) _t >>= 4;			\
    if (_t & 0xc) r -= 2;			\
    if (_t & 0xc) _t >>= 2;			\
    if (_t & 0x2) r -= 1;			\
  } while (0)
#else /* not _FP_W_TYPE_SIZE < 64 */
#define __FP_CLZ(r, x)				\
  do {						\
    _FP_W_TYPE _t = (x);			\
    r = _FP_W_TYPE_SIZE - 1;			\
    if (_t > 0xffffffff) r -= 32;		\
    if (_t > 0xffffffff) _t >>= 32;		\
    if (_t > 0xffff) r -= 16;			\
    if (_t > 0xffff) _t >>= 16;			\
    if (_t > 0xff) r -= 8;			\
    if (_t > 0xff) _t >>= 8;			\
    if (_t & 0xf0) r -= 4;			\
    if (_t & 0xf0) _t >>= 4;			\
    if (_t & 0xc) r -= 2;			\
    if (_t & 0xc) _t >>= 2;			\
    if (_t & 0x2) r -= 1;			\
  } while (0)
#endif /* not _FP_W_TYPE_SIZE < 64 */
#endif /* ndef __FP_CLZ */

#define _FP_DIV_HELP_imm(q, r, n, d)		\
  do {						\
    q = n / d, r = n % d;			\
  } while (0)

/*
 * BK Id: SCCS/s.sfp-machine.h 1.5 05/17/01 18:14:23 cort
 */
/* Machine-dependent software floating-point definitions.  PPC version.
   Copyright (C) 1997 Free Software Foundation, Inc.
   This file is part of the GNU C Library.

   The GNU C Library is free software; you can redistribute it and/or
   modify it under the terms of the GNU Library General Public License as
   published by the Free Software Foundation; either version 2 of the
   License, or (at your option) any later version.

   The GNU C Library is distributed in the hope that it will be useful,
   but WITHOUT ANY WARRANTY; without even the implied warranty of
   MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
   Library General Public License for more details.

   You should have received a copy of the GNU Library General Public
   License along with the GNU C Library; see the file COPYING.LIB.  If
   not, write to the Free Software Foundation, Inc.,
   59 Temple Place - Suite 330, Boston, MA 02111-1307, USA.  

   Actually, this is a PPC (32bit) version, written based on the
   i386, sparc, and sparc64 versions, by me, 
   Peter Maydell (pmaydell@chiark.greenend.org.uk).
   Comments are by and large also mine, although they may be inaccurate.

   In picking out asm fragments I've gone with the lowest common
   denominator, which also happens to be the hardware I have :->
   That is, a SPARC without hardware multiply and divide.
 */

/* basic word size definitions */
#define _FP_W_TYPE_SIZE		32
#define _FP_W_TYPE		unsigned long
#define _FP_WS_TYPE		signed long
#define _FP_I_TYPE		long

#define __ll_B			((UWtype) 1 << (W_TYPE_SIZE / 2))
#define __ll_lowpart(t)		((UWtype) (t) & (__ll_B - 1))
#define __ll_highpart(t)	((UWtype) (t) >> (W_TYPE_SIZE / 2))

/* You can optionally code some things like addition in asm. For
 * example, i386 defines __FP_FRAC_ADD_2 as asm. If you don't
 * then you get a fragment of C code [if you change an #ifdef 0
 * in op-2.h] or a call to add_ssaaaa (see below).
 * Good places to look for asm fragments to use are gcc and glibc.
 * gcc's longlong.h is useful.
 */

/* We need to know how to multiply and divide. If the host word size
 * is >= 2*fracbits you can use FP_MUL_MEAT_n_imm(t,R,X,Y) which
 * codes the multiply with whatever gcc does to 'a * b'.
 * _FP_MUL_MEAT_n_wide(t,R,X,Y,f) is used when you have an asm 
 * function that can multiply two 1W values and get a 2W result. 
 * Otherwise you're stuck with _FP_MUL_MEAT_n_hard(t,R,X,Y) which
 * does bitshifting to avoid overflow.
 * For division there is FP_DIV_MEAT_n_imm(t,R,X,Y,f) for word size
 * >= 2*fracbits, where f is either _FP_DIV_HELP_imm or 
 * _FP_DIV_HELP_ldiv (see op-1.h).
 * _FP_DIV_MEAT_udiv() is if you have asm to do 2W/1W => (1W, 1W).
 * [GCC and glibc have longlong.h which has the asm macro udiv_qrnnd
 * to do this.]
 * In general, 'n' is the number of words required to hold the type,
 * and 't' is either S, D or Q for single/double/quad.
 *           -- PMM
 */
/* Example: SPARC64:
 * #define _FP_MUL_MEAT_S(R,X,Y)	_FP_MUL_MEAT_1_imm(S,R,X,Y)
 * #define _FP_MUL_MEAT_D(R,X,Y)	_FP_MUL_MEAT_1_wide(D,R,X,Y,umul_ppmm)
 * #define _FP_MUL_MEAT_Q(R,X,Y)	_FP_MUL_MEAT_2_wide(Q,R,X,Y,umul_ppmm)
 *
 * #define _FP_DIV_MEAT_S(R,X,Y)	_FP_DIV_MEAT_1_imm(S,R,X,Y,_FP_DIV_HELP_imm)
 * #define _FP_DIV_MEAT_D(R,X,Y)	_FP_DIV_MEAT_1_udiv(D,R,X,Y)
 * #define _FP_DIV_MEAT_Q(R,X,Y)	_FP_DIV_MEAT_2_udiv_64(Q,R,X,Y)
 *
 * Example: i386:
 * #define _FP_MUL_MEAT_S(R,X,Y)   _FP_MUL_MEAT_1_wide(S,R,X,Y,_i386_mul_32_64)
 * #define _FP_MUL_MEAT_D(R,X,Y)   _FP_MUL_MEAT_2_wide(D,R,X,Y,_i386_mul_32_64)
 *
 * #define _FP_DIV_MEAT_S(R,X,Y)   _FP_DIV_MEAT_1_udiv(S,R,X,Y,_i386_div_64_32)
 * #define _FP_DIV_MEAT_D(R,X,Y)   _FP_DIV_MEAT_2_udiv_64(D,R,X,Y)
 */

#define _FP_MUL_MEAT_S(R,X,Y)   _FP_MUL_MEAT_1_wide(S,R,X,Y,umul_ppmm)
#define _FP_MUL_MEAT_D(R,X,Y)   _FP_MUL_MEAT_2_wide(D,R,X,Y,umul_ppmm)

#define _FP_DIV_MEAT_S(R,X,Y)   _FP_DIV_MEAT_1_udiv(S,R,X,Y)
#define _FP_DIV_MEAT_D(R,X,Y)   _FP_DIV_MEAT_2_udiv_64(D,R,X,Y)

/* These macros define what NaN looks like. They're supposed to expand to 
 * a comma-separated set of 32bit unsigned ints that encode NaN.
 */
#define _FP_NANFRAC_S		_FP_QNANBIT_S
#define _FP_NANFRAC_D		_FP_QNANBIT_D, 0
#define _FP_NANFRAC_Q           _FP_QNANBIT_Q, 0, 0, 0

#define _FP_KEEPNANFRACP 1

/* This macro appears to be called when both X and Y are NaNs, and 
 * has to choose one and copy it to R. i386 goes for the larger of the
 * two, sparc64 just picks Y. I don't understand this at all so I'll
 * go with sparc64 because it's shorter :->   -- PMM 
 */
#define _FP_CHOOSENAN(fs, wc, R, X, Y)			\
  do {							\
    R##_s = Y##_s;					\
    _FP_FRAC_COPY_##wc(R,Y);				\
    R##_c = FP_CLS_NAN;					\
  } while (0)
  

extern void fp_unpack_d(long *, unsigned long *, unsigned long *,
			long *, long *, void *);
extern int  fp_pack_d(void *, long, unsigned long, unsigned long, long, long);
extern int  fp_pack_ds(void *, long, unsigned long, unsigned long, long, long);

#define __FP_UNPACK_RAW_1(fs, X, val)			\
  do {							\
    union _FP_UNION_##fs *_flo =			\
    	(union _FP_UNION_##fs *)val;			\
							\
    X##_f = _flo->bits.frac;				\
    X##_e = _flo->bits.exp;				\
    X##_s = _flo->bits.sign;				\
  } while (0)

#define __FP_UNPACK_RAW_2(fs, X, val)			\
  do {							\
    union _FP_UNION_##fs *_flo =			\
    	(union _FP_UNION_##fs *)val;			\
							\
    X##_f0 = _flo->bits.frac0;				\
    X##_f1 = _flo->bits.frac1;				\
    X##_e  = _flo->bits.exp;				\
    X##_s  = _flo->bits.sign;				\
  } while (0)

#define __FP_UNPACK_S(X,val)		\
  do {					\
    __FP_UNPACK_RAW_1(S,X,val);		\
    _FP_UNPACK_CANONICAL(S,1,X);	\
  } while (0)

#define __FP_UNPACK_D(X,val)		\
	fp_unpack_d(&X##_s, &X##_f1, &X##_f0, &X##_e, &X##_c, val)

#define __FP_PACK_RAW_1(fs, val, X)			\
  do {							\
    union _FP_UNION_##fs *_flo =			\
    	(union _FP_UNION_##fs *)val;			\
							\
    _flo->bits.frac = X##_f;				\
    _flo->bits.exp  = X##_e;				\
    _flo->bits.sign = X##_s;				\
  } while (0)
  
#define __FP_PACK_RAW_2(fs, val, X)			\
  do {							\
    union _FP_UNION_##fs *_flo =			\
    	(union _FP_UNION_##fs *)val;			\
							\
    _flo->bits.frac0 = X##_f0;				\
    _flo->bits.frac1 = X##_f1;				\
    _flo->bits.exp   = X##_e;				\
    _flo->bits.sign  = X##_s;				\
  } while (0)

#include <linux/kernel.h>
#include <linux/sched.h>

#define __FPU_FPSCR	(current->thread.fpscr)

/* We only actually write to the destination register
 * if exceptions signalled (if any) will not trap.
 */
#define __FPU_ENABLED_EXC \
({						\
	(__FPU_FPSCR >> 3) & 0x1f;	\
})

#define __FPU_TRAP_P(bits) \
	((__FPU_ENABLED_EXC & (bits)) != 0)

#define __FP_PACK_S(val,X)			\
({  int __exc = _FP_PACK_CANONICAL(S,1,X);	\
    if(!__exc || !__FPU_TRAP_P(__exc))		\
        __FP_PACK_RAW_1(S,val,X);		\
    __exc;					\
})

#define __FP_PACK_D(val,X)			\
	fp_pack_d(val, X##_s, X##_f1, X##_f0, X##_e, X##_c)

#define __FP_PACK_DS(val,X)			\
	fp_pack_ds(val, X##_s, X##_f1, X##_f0, X##_e, X##_c)

/* Obtain the current rounding mode. */
#define FP_ROUNDMODE			\
({					\
	__FPU_FPSCR & 0x3;		\
})

/* the asm fragments go here: all these are taken from glibc-2.0.5's
 * stdlib/longlong.h
 */

#include <linux/types.h>
#include <asm/byteorder.h>

/* add_ssaaaa is used in op-2.h and should be equivalent to
 * #define add_ssaaaa(sh,sl,ah,al,bh,bl) (sh = ah+bh+ (( sl = al+bl) < al))
 * add_ssaaaa(high_sum, low_sum, high_addend_1, low_addend_1,
 * high_addend_2, low_addend_2) adds two UWtype integers, composed by
 * HIGH_ADDEND_1 and LOW_ADDEND_1, and HIGH_ADDEND_2 and LOW_ADDEND_2
 * respectively.  The result is placed in HIGH_SUM and LOW_SUM.  Overflow
 * (i.e. carry out) is not stored anywhere, and is lost.
 */
#define add_ssaaaa(sh, sl, ah, al, bh, bl)				\
  do {									\
    if (__builtin_constant_p (bh) && (bh) == 0)				\
      __asm__ ("{a%I4|add%I4c} %1,%3,%4\n\t{aze|addze} %0,%2"		\
	     : "=r" ((USItype)(sh)),					\
	       "=&r" ((USItype)(sl))					\
	     : "%r" ((USItype)(ah)),					\
	       "%r" ((USItype)(al)),					\
	       "rI" ((USItype)(bl)));					\
    else if (__builtin_constant_p (bh) && (bh) ==~(USItype) 0)		\
      __asm__ ("{a%I4|add%I4c} %1,%3,%4\n\t{ame|addme} %0,%2"		\
	     : "=r" ((USItype)(sh)),					\
	       "=&r" ((USItype)(sl))					\
	     : "%r" ((USItype)(ah)),					\
	       "%r" ((USItype)(al)),					\
	       "rI" ((USItype)(bl)));					\
    else								\
      __asm__ ("{a%I5|add%I5c} %1,%4,%5\n\t{ae|adde} %0,%2,%3"		\
	     : "=r" ((USItype)(sh)),					\
	       "=&r" ((USItype)(sl))					\
	     : "%r" ((USItype)(ah)),					\
	       "r" ((USItype)(bh)),					\
	       "%r" ((USItype)(al)),					\
	       "rI" ((USItype)(bl)));					\
  } while (0)

/* sub_ddmmss is used in op-2.h and udivmodti4.c and should be equivalent to
 * #define sub_ddmmss(sh, sl, ah, al, bh, bl) (sh = ah-bh - ((sl = al-bl) > al))
 * sub_ddmmss(high_difference, low_difference, high_minuend, low_minuend,
 * high_subtrahend, low_subtrahend) subtracts two two-word UWtype integers,
 * composed by HIGH_MINUEND_1 and LOW_MINUEND_1, and HIGH_SUBTRAHEND_2 and
 * LOW_SUBTRAHEND_2 respectively.  The result is placed in HIGH_DIFFERENCE
 * and LOW_DIFFERENCE.  Overflow (i.e. carry out) is not stored anywhere,
 * and is lost.
 */
#define sub_ddmmss(sh, sl, ah, al, bh, bl)				\
  do {									\
    if (__builtin_constant_p (ah) && (ah) == 0)				\
      __asm__ ("{sf%I3|subf%I3c} %1,%4,%3\n\t{sfze|subfze} %0,%2"	\
	       : "=r" ((USItype)(sh)),					\
		 "=&r" ((USItype)(sl))					\
	       : "r" ((USItype)(bh)),					\
		 "rI" ((USItype)(al)),					\
		 "r" ((USItype)(bl)));					\
    else if (__builtin_constant_p (ah) && (ah) ==~(USItype) 0)		\
      __asm__ ("{sf%I3|subf%I3c} %1,%4,%3\n\t{sfme|subfme} %0,%2"	\
	       : "=r" ((USItype)(sh)),					\
		 "=&r" ((USItype)(sl))					\
	       : "r" ((USItype)(bh)),					\
		 "rI" ((USItype)(al)),					\
		 "r" ((USItype)(bl)));					\
    else if (__builtin_constant_p (bh) && (bh) == 0)			\
      __asm__ ("{sf%I3|subf%I3c} %1,%4,%3\n\t{ame|addme} %0,%2"		\
	       : "=r" ((USItype)(sh)),					\
		 "=&r" ((USItype)(sl))					\
	       : "r" ((USItype)(ah)),					\
		 "rI" ((USItype)(al)),					\
		 "r" ((USItype)(bl)));					\
    else if (__builtin_constant_p (bh) && (bh) ==~(USItype) 0)		\
      __asm__ ("{sf%I3|subf%I3c} %1,%4,%3\n\t{aze|addze} %0,%2"		\
	       : "=r" ((USItype)(sh)),					\
		 "=&r" ((USItype)(sl))					\
	       : "r" ((USItype)(ah)),					\
		 "rI" ((USItype)(al)),					\
		 "r" ((USItype)(bl)));					\
    else								\
      __asm__ ("{sf%I4|subf%I4c} %1,%5,%4\n\t{sfe|subfe} %0,%3,%2"	\
	       : "=r" ((USItype)(sh)),					\
		 "=&r" ((USItype)(sl))					\
	       : "r" ((USItype)(ah)),					\
		 "r" ((USItype)(bh)),					\
		 "rI" ((USItype)(al)),					\
		 "r" ((USItype)(bl)));					\
  } while (0)

/* asm fragments for mul and div */	 

/* umul_ppmm(high_prod, low_prod, multipler, multiplicand) multiplies two
 * UWtype integers MULTIPLER and MULTIPLICAND, and generates a two UWtype
 * word product in HIGH_PROD and LOW_PROD.
 */
#define umul_ppmm(ph, pl, m0, m1)					\
  do {									\
    USItype __m0 = (m0), __m1 = (m1);					\
    __asm__ ("mulhwu %0,%1,%2"						\
	     : "=r" ((USItype)(ph))					\
	     : "%r" (__m0),						\
               "r" (__m1));						\
    (pl) = __m0 * __m1;							\
  } while (0)

/* udiv_qrnnd(quotient, remainder, high_numerator, low_numerator,
 * denominator) divides a UDWtype, composed by the UWtype integers
 * HIGH_NUMERATOR and LOW_NUMERATOR, by DENOMINATOR and places the quotient
 * in QUOTIENT and the remainder in REMAINDER.  HIGH_NUMERATOR must be less
 * than DENOMINATOR for correct operation.  If, in addition, the most
 * significant bit of DENOMINATOR must be 1, then the pre-processor symbol
 * UDIV_NEEDS_NORMALIZATION is defined to 1.
 */
#define udiv_qrnnd(q, r, n1, n0, d)					\
  do {									\
    UWtype __d1, __d0, __q1, __q0, __r1, __r0, __m;			\
    __d1 = __ll_highpart (d);						\
    __d0 = __ll_lowpart (d);						\
									\
    __r1 = (n1) % __d1;							\
    __q1 = (n1) / __d1;							\
    __m = (UWtype) __q1 * __d0;						\
    __r1 = __r1 * __ll_B | __ll_highpart (n0);				\
    if (__r1 < __m)							\
      {									\
	__q1--, __r1 += (d);						\
	if (__r1 >= (d)) /* we didn't get carry when adding to __r1 */	\
	  if (__r1 < __m)						\
	    __q1--, __r1 += (d);					\
      }									\
    __r1 -= __m;							\
									\
    __r0 = __r1 % __d1;							\
    __q0 = __r1 / __d1;							\
    __m = (UWtype) __q0 * __d0;						\
    __r0 = __r0 * __ll_B | __ll_lowpart (n0);				\
    if (__r0 < __m)							\
      {									\
	__q0--, __r0 += (d);						\
	if (__r0 >= (d))						\
	  if (__r0 < __m)						\
	    __q0--, __r0 += (d);					\
      }									\
    __r0 -= __m;							\
									\
    (q) = (UWtype) __q1 * __ll_B | __q0;				\
    (r) = __r0;								\
  } while (0)

#define UDIV_NEEDS_NORMALIZATION 1

#define abort()								\
	return 0

#ifdef __BIG_ENDIAN
#define __BYTE_ORDER __BIG_ENDIAN
#else
#define __BYTE_ORDER __LITTLE_ENDIAN
#endif

/* Exception flags. */
#define EFLAG_INVALID		(1 << (31 - 2))
#define EFLAG_OVERFLOW		(1 << (31 - 3))
#define EFLAG_UNDERFLOW		(1 << (31 - 4))
#define EFLAG_DIVZERO		(1 << (31 - 5))
#define EFLAG_INEXACT		(1 << (31 - 6))

#define EFLAG_VXSNAN		(1 << (31 - 7))
#define EFLAG_VXISI		(1 << (31 - 8))
#define EFLAG_VXIDI		(1 << (31 - 9))
#define EFLAG_VXZDZ		(1 << (31 - 10))
#define EFLAG_VXIMZ		(1 << (31 - 11))
#define EFLAG_VXVC		(1 << (31 - 12))
#define EFLAG_VXSOFT		(1 << (31 - 21))
#define EFLAG_VXSQRT		(1 << (31 - 22))
#define EFLAG_VXCVI		(1 << (31 - 23))
/*
 * BK Id: SCCS/s.single.h 1.5 05/17/01 18:14:23 cort
 */
/*
 * Definitions for IEEE Single Precision
 */

#if _FP_W_TYPE_SIZE < 32
#error "Here's a nickel kid.  Go buy yourself a real computer."
#endif

#define _FP_FRACBITS_S		24
#define _FP_FRACXBITS_S		(_FP_W_TYPE_SIZE - _FP_FRACBITS_S)
#define _FP_WFRACBITS_S		(_FP_WORKBITS + _FP_FRACBITS_S)
#define _FP_WFRACXBITS_S	(_FP_W_TYPE_SIZE - _FP_WFRACBITS_S)
#define _FP_EXPBITS_S		8
#define _FP_EXPBIAS_S		127
#define _FP_EXPMAX_S		255
#define _FP_QNANBIT_S		((_FP_W_TYPE)1 << (_FP_FRACBITS_S-2))
#define _FP_IMPLBIT_S		((_FP_W_TYPE)1 << (_FP_FRACBITS_S-1))
#define _FP_OVERFLOW_S		((_FP_W_TYPE)1 << (_FP_WFRACBITS_S))

/* The implementation of _FP_MUL_MEAT_S and _FP_DIV_MEAT_S should be
   chosen by the target machine.  */

union _FP_UNION_S
{
  float flt;
  struct {
#if __BYTE_ORDER == __BIG_ENDIAN
    unsigned sign : 1;
    unsigned exp  : _FP_EXPBITS_S;
    unsigned frac : _FP_FRACBITS_S - (_FP_IMPLBIT_S != 0);
#else
    unsigned frac : _FP_FRACBITS_S - (_FP_IMPLBIT_S != 0);
    unsigned exp  : _FP_EXPBITS_S;
    unsigned sign : 1;
#endif
  } bits __attribute__((packed));
};

#define FP_DECL_S(X)		_FP_DECL(1,X)
#define FP_UNPACK_RAW_S(X,val)	_FP_UNPACK_RAW_1(S,X,val)
#define FP_PACK_RAW_S(val,X)	_FP_PACK_RAW_1(S,val,X)

#define FP_UNPACK_S(X,val)		\
  do {					\
    _FP_UNPACK_RAW_1(S,X,val);		\
    _FP_UNPACK_CANONICAL(S,1,X);	\
  } while (0)

#define FP_PACK_S(val,X)		\
  do {					\
    _FP_PACK_CANONICAL(S,1,X);		\
    _FP_PACK_RAW_1(S,val,X);		\
  } while (0)

#define FP_NEG_S(R,X)		_FP_NEG(S,1,R,X)
#define FP_ADD_S(R,X,Y)		_FP_ADD(S,1,R,X,Y)
#define FP_SUB_S(R,X,Y)		_FP_SUB(S,1,R,X,Y)
#define FP_MUL_S(R,X,Y)		_FP_MUL(S,1,R,X,Y)
#define FP_DIV_S(R,X,Y)		_FP_DIV(S,1,R,X,Y)
#define FP_SQRT_S(R,X)		_FP_SQRT(S,1,R,X)

#define FP_CMP_S(r,X,Y,un)	_FP_CMP(S,1,r,X,Y,un)
#define FP_CMP_EQ_S(r,X,Y)	_FP_CMP_EQ(S,1,r,X,Y)

#define FP_TO_INT_S(r,X,rsz,rsg)  _FP_TO_INT(S,1,r,X,rsz,rsg)
#define FP_FROM_INT_S(X,r,rs,rt)  _FP_FROM_INT(S,1,X,r,rs,rt)
/*
 * BK Id: SCCS/s.soft-fp.h 1.5 05/17/01 18:14:23 cort
 */
#ifndef SOFT_FP_H
#define SOFT_FP_H

#include "sfp-machine.h"

#define _FP_WORKBITS		3
#define _FP_WORK_LSB		((_FP_W_TYPE)1 << 3)
#define _FP_WORK_ROUND		((_FP_W_TYPE)1 << 2)
#define _FP_WORK_GUARD		((_FP_W_TYPE)1 << 1)
#define _FP_WORK_STICKY		((_FP_W_TYPE)1 << 0)

#ifndef FP_RND_NEAREST
# define FP_RND_NEAREST		0
# define FP_RND_ZERO		1
# define FP_RND_PINF		2
# define FP_RND_MINF		3
#ifndef FP_ROUNDMODE
# define FP_ROUNDMODE		FP_RND_NEAREST
#endif
#endif

#define _FP_ROUND_NEAREST(wc, X)			\
({  int __ret = 0;					\
    int __frac = _FP_FRAC_LOW_##wc(X) & 15;		\
    if (__frac & 7) {					\
      __ret = EFLAG_INEXACT;				\
      if ((__frac & 7) != _FP_WORK_ROUND)		\
        _FP_FRAC_ADDI_##wc(X, _FP_WORK_ROUND);		\
      else if (__frac & _FP_WORK_LSB)			\
        _FP_FRAC_ADDI_##wc(X, _FP_WORK_ROUND);		\
    }							\
    __ret;						\
})

#define _FP_ROUND_ZERO(wc, X)				\
({  int __ret = 0;					\
    if (_FP_FRAC_LOW_##wc(X) & 7)			\
      __ret = EFLAG_INEXACT;				\
    __ret;						\
})

#define _FP_ROUND_PINF(wc, X)				\
({  int __ret = EFLAG_INEXACT;				\
    if (!X##_s && (_FP_FRAC_LOW_##wc(X) & 7))		\
      _FP_FRAC_ADDI_##wc(X, _FP_WORK_LSB);		\
    else __ret = 0;					\
    __ret;						\
})

#define _FP_ROUND_MINF(wc, X)				\
({  int __ret = EFLAG_INEXACT;				\
    if (X##_s && (_FP_FRAC_LOW_##wc(X) & 7))		\
      _FP_FRAC_ADDI_##wc(X, _FP_WORK_LSB);		\
    else __ret = 0;					\
    __ret;						\
})

#define _FP_ROUND(wc, X)			\
({	int __ret = 0;				\
	switch (FP_ROUNDMODE)			\
	{					\
	  case FP_RND_NEAREST:			\
	    __ret |= _FP_ROUND_NEAREST(wc,X);	\
	    break;				\
	  case FP_RND_ZERO:			\
	    __ret |= _FP_ROUND_ZERO(wc,X);	\
	    break;				\
	  case FP_RND_PINF:			\
	    __ret |= _FP_ROUND_PINF(wc,X);	\
	    break;				\
	  case FP_RND_MINF:			\
	    __ret |= _FP_ROUND_MINF(wc,X);	\
	    break;				\
	};					\
	__ret;					\
})

#define FP_CLS_NORMAL		0
#define FP_CLS_ZERO		1
#define FP_CLS_INF		2
#define FP_CLS_NAN		3

#define _FP_CLS_COMBINE(x,y)	(((x) << 2) | (y))

#include "op-1.h"
#include "op-2.h"
#include "op-4.h"
#include "op-common.h"

/* Sigh.  Silly things longlong.h needs.  */
#define UWtype		_FP_W_TYPE
#define W_TYPE_SIZE	_FP_W_TYPE_SIZE

typedef int SItype __attribute__((mode(SI)));
typedef int DItype __attribute__((mode(DI)));
typedef unsigned int USItype __attribute__((mode(SI)));
typedef unsigned int UDItype __attribute__((mode(DI)));
#if _FP_W_TYPE_SIZE == 32
typedef unsigned int UHWtype __attribute__((mode(HI)));
#elif _FP_W_TYPE_SIZE == 64
typedef USItype UHWtype;
#endif

#endif
/*
 * BK Id: SCCS/s.stfd.c 1.6 05/17/01 18:14:23 cort
 */
#include <linux/types.h>
#include <linux/errno.h>
#include <asm/uaccess.h>
 
int
stfd(void *frS, void *ea)
{
#if 0
#ifdef DEBUG
	printk("%s: S %p, ea %p: ", __FUNCTION__, frS, ea);
	dump_double(frS);
	printk("\n");
#endif
#endif

	if (copy_to_user(ea, frS, sizeof(double)))
		return -EFAULT;

	return 0;
}
/*
 * BK Id: SCCS/s.stfiwx.c 1.6 05/17/01 18:14:23 cort
 */
#include <linux/types.h>
#include <linux/errno.h>
#include <asm/uaccess.h>

int
stfiwx(u32 *frS, void *ea)
{
#ifdef DEBUG
	printk("%s: %p %p\n", __FUNCTION__, frS, ea);
#endif

	if (copy_to_user(ea, &frS[1], sizeof(frS[1])))
		return -EFAULT;

	return 0;
}
/*
 * BK Id: SCCS/s.stfs.c 1.6 05/17/01 18:14:23 cort
 */
#include <linux/types.h>
#include <linux/errno.h>
#include <asm/uaccess.h>

#include "soft-fp.h"
#include "double.h"
#include "single.h"

int
stfs(void *frS, void *ea)
{
	FP_DECL_D(A);
	FP_DECL_S(R);
	float f;
	int err;

#ifdef DEBUG
	printk("%s: S %p, ea %p\n", __FUNCTION__, frS, ea);
#endif

	__FP_UNPACK_D(A, frS);

#ifdef DEBUG
	printk("A: %ld %lu %lu %ld (%ld)\n", A_s, A_f1, A_f0, A_e, A_c);
#endif

	FP_CONV(S, D, 1, 2, R, A);

#ifdef DEBUG
	printk("R: %ld %lu %ld (%ld)\n", R_s, R_f, R_e, R_c);
#endif

	err = _FP_PACK_CANONICAL(S, 1, R);
	if (!err || !__FPU_TRAP_P(err)) {
		__FP_PACK_RAW_1(S, &f, R);
		if (copy_to_user(ea, &f, sizeof(float)))
			return -EFAULT;
	}

	return err;
}
/*
 * BK Id: SCCS/s.types.c 1.5 05/17/01 18:14:23 cort
 */

#include "soft-fp.h"
#include "double.h"
#include "single.h"

void
fp_unpack_d(long *_s, unsigned long *_f1, unsigned long *_f0,
	    long *_e, long *_c, void *val)
{
	FP_DECL_D(X);

	__FP_UNPACK_RAW_2(D, X, val);

	_FP_UNPACK_CANONICAL(D, 2, X);

	*_s = X_s;
	*_f1 = X_f1;
	*_f0 = X_f0;
	*_e = X_e;
	*_c = X_c;
}

int
fp_pack_d(void *val, long X_s, unsigned long X_f1,
	  unsigned long X_f0, long X_e, long X_c)
{
	int exc;

	exc = _FP_PACK_CANONICAL(D, 2, X);
	if (!exc || !__FPU_TRAP_P(exc))
		__FP_PACK_RAW_2(D, val, X);
	return exc;
}

int
fp_pack_ds(void *val, long X_s, unsigned long X_f1,
	   unsigned long X_f0, long X_e, long X_c)
{
	FP_DECL_S(__X);
	int exc;

	FP_CONV(S, D, 1, 2, __X, X);
	exc = _FP_PACK_CANONICAL(S, 1, __X);
	if (!exc || !__FPU_TRAP_P(exc)) {
		_FP_UNPACK_CANONICAL(S, 1, __X);
		FP_CONV(D, S, 2, 1, X, __X);
		exc |= _FP_PACK_CANONICAL(D, 2, X);
		if (!exc || !__FPU_TRAP_P(exc))
			__FP_PACK_RAW_2(D, val, X);
	}
	return exc;
}
/*
 * BK Id: SCCS/s.udivmodti4.c 1.5 05/17/01 18:14:23 cort
 */
/* This has so very few changes over libgcc2's __udivmoddi4 it isn't funny.  */

#include "soft-fp.h"

#undef count_leading_zeros
#define count_leading_zeros  __FP_CLZ

void
_fp_udivmodti4(_FP_W_TYPE q[2], _FP_W_TYPE r[2],
	       _FP_W_TYPE n1, _FP_W_TYPE n0,
	       _FP_W_TYPE d1, _FP_W_TYPE d0)
{
  _FP_W_TYPE q0, q1, r0, r1;
  _FP_I_TYPE b, bm;

  if (d1 == 0)
    {
#if !UDIV_NEEDS_NORMALIZATION
      if (d0 > n1)
	{
	  /* 0q = nn / 0D */

	  udiv_qrnnd (q0, n0, n1, n0, d0);
	  q1 = 0;

	  /* Remainder in n0.  */
	}
      else
	{
	  /* qq = NN / 0d */

	  if (d0 == 0)
	    d0 = 1 / d0;	/* Divide intentionally by zero.  */

	  udiv_qrnnd (q1, n1, 0, n1, d0);
	  udiv_qrnnd (q0, n0, n1, n0, d0);

	  /* Remainder in n0.  */
	}

      r0 = n0;
      r1 = 0;

#else /* UDIV_NEEDS_NORMALIZATION */

      if (d0 > n1)
	{
	  /* 0q = nn / 0D */

	  count_leading_zeros (bm, d0);

	  if (bm != 0)
	    {
	      /* Normalize, i.e. make the most significant bit of the
		 denominator set.  */

	      d0 = d0 << bm;
	      n1 = (n1 << bm) | (n0 >> (_FP_W_TYPE_SIZE - bm));
	      n0 = n0 << bm;
	    }

	  udiv_qrnnd (q0, n0, n1, n0, d0);
	  q1 = 0;

	  /* Remainder in n0 >> bm.  */
	}
      else
	{
	  /* qq = NN / 0d */

	  if (d0 == 0)
	    d0 = 1 / d0;	/* Divide intentionally by zero.  */

	  count_leading_zeros (bm, d0);

	  if (bm == 0)
	    {
	      /* From (n1 >= d0) /\ (the most significant bit of d0 is set),
		 conclude (the most significant bit of n1 is set) /\ (the
		 leading quotient digit q1 = 1).

		 This special case is necessary, not an optimization.
		 (Shifts counts of SI_TYPE_SIZE are undefined.)  */

	      n1 -= d0;
	      q1 = 1;
	    }
	  else
	    {
	      _FP_W_TYPE n2;

	      /* Normalize.  */

	      b = _FP_W_TYPE_SIZE - bm;

	      d0 = d0 << bm;
	      n2 = n1 >> b;
	      n1 = (n1 << bm) | (n0 >> b);
	      n0 = n0 << bm;

	      udiv_qrnnd (q1, n1, n2, n1, d0);
	    }

	  /* n1 != d0...  */

	  udiv_qrnnd (q0, n0, n1, n0, d0);

	  /* Remainder in n0 >> bm.  */
	}

      r0 = n0 >> bm;
      r1 = 0;
#endif /* UDIV_NEEDS_NORMALIZATION */
    }
  else
    {
      if (d1 > n1)
	{
	  /* 00 = nn / DD */

	  q0 = 0;
	  q1 = 0;

	  /* Remainder in n1n0.  */
	  r0 = n0;
	  r1 = n1;
	}
      else
	{
	  /* 0q = NN / dd */

	  count_leading_zeros (bm, d1);
	  if (bm == 0)
	    {
	      /* From (n1 >= d1) /\ (the most significant bit of d1 is set),
		 conclude (the most significant bit of n1 is set) /\ (the
		 quotient digit q0 = 0 or 1).

		 This special case is necessary, not an optimization.  */

	      /* The condition on the next line takes advantage of that
		 n1 >= d1 (true due to program flow).  */
	      if (n1 > d1 || n0 >= d0)
		{
		  q0 = 1;
		  sub_ddmmss (n1, n0, n1, n0, d1, d0);
		}
	      else
		q0 = 0;

	      q1 = 0;

	      r0 = n0;
	      r1 = n1;
	    }
	  else
	    {
	      _FP_W_TYPE m1, m0, n2;

	      /* Normalize.  */

	      b = _FP_W_TYPE_SIZE - bm;

	      d1 = (d1 << bm) | (d0 >> b);
	      d0 = d0 << bm;
	      n2 = n1 >> b;
	      n1 = (n1 << bm) | (n0 >> b);
	      n0 = n0 << bm;

	      udiv_qrnnd (q0, n1, n2, n1, d1);
	      umul_ppmm (m1, m0, q0, d0);

	      if (m1 > n1 || (m1 == n1 && m0 > n0))
		{
		  q0--;
		  sub_ddmmss (m1, m0, m1, m0, d1, d0);
		}

	      q1 = 0;

	      /* Remainder in (n1n0 - m1m0) >> bm.  */
	      sub_ddmmss (n1, n0, n1, n0, m1, m0);
	      r0 = (n1 << b) | (n0 >> bm);
	      r1 = n1 >> bm;
	    }
	}
    }

  q[0] = q0; q[1] = q1;
  r[0] = r0, r[1] = r1;
}
#
# m68k/Makefile
#
# This file is included by the global makefile so that you can add your own
# architecture-specific flags and dependencies. Remember to do have actions
# for "archclean" and "archdep" for cleaning up and making dependencies for
# this architecture
#
# This file is subject to the terms and conditions of the GNU General Public
# License.  See the file "COPYING" in the main directory of this archive
# for more details.
#
# Copyright (C) 1994 by Hamish Macdonald
#

# test for cross compiling
COMPILE_ARCH = $(shell uname -m)

# override top level makefile
AS += -m68020
LD += -m m68kelf
ifneq ($(COMPILE_ARCH),$(ARCH))
	# prefix for cross-compiling binaries
	CROSS_COMPILE = m68k-linux-
endif

ifndef CONFIG_SUN3
LINKFLAGS = -T $(TOPDIR)/arch/m68k/vmlinux.lds
else
LINKFLAGS = -T $(TOPDIR)/arch/m68k/vmlinux-sun3.lds -N
endif

# without -fno-strength-reduce the 53c7xx.c driver fails ;-(
CFLAGS += -pipe -fno-strength-reduce -ffixed-a2

# enable processor switch if compiled only for a single cpu
ifndef CONFIG_M68020
ifndef CONFIG_M68030

ifndef CONFIG_M68060
CFLAGS := $(CFLAGS) -m68040
endif

ifndef CONFIG_M68040
CFLAGS := $(CFLAGS) -m68060
endif

endif
endif

ifdef CONFIG_KGDB
# If configured for kgdb support, include debugging infos and keep the
# frame pointer
CFLAGS := $(subst -fomit-frame-pointer,,$(CFLAGS)) -g
endif

ifndef CONFIG_SUN3
HEAD := arch/m68k/kernel/head.o
else
HEAD := arch/m68k/kernel/sun3-head.o
endif 

SUBDIRS += arch/m68k/kernel arch/m68k/mm arch/m68k/lib
CORE_FILES := arch/m68k/kernel/kernel.o arch/m68k/mm/mm.o $(CORE_FILES)
LIBS += arch/m68k/lib/lib.a

ifdef CONFIG_Q40
CORE_FILES := $(CORE_FILES) arch/m68k/q40/q40.o
SUBDIRS := $(SUBDIRS) arch/m68k/q40
endif

ifdef CONFIG_AMIGA
CORE_FILES := $(CORE_FILES) arch/m68k/amiga/amiga.o
SUBDIRS := $(SUBDIRS) arch/m68k/amiga
endif

ifdef CONFIG_ATARI
CORE_FILES := $(CORE_FILES) arch/m68k/atari/atari.o
SUBDIRS := $(SUBDIRS) arch/m68k/atari
endif

ifdef CONFIG_MAC
CORE_FILES := $(CORE_FILES) arch/m68k/mac/mac.o
SUBDIRS := $(SUBDIRS) arch/m68k/mac
endif

ifdef CONFIG_HP300
CORE_FILES := $(CORE_FILES) arch/m68k/hp300/hp300.o
SUBDIRS := $(SUBDIRS) arch/m68k/hp300
endif

ifdef CONFIG_APOLLO
CORE_FILES := $(CORE_FILES) arch/m68k/apollo/apollo.o
SUBDIRS := $(SUBDIRS) arch/m68k/apollo
endif

ifdef CONFIG_MVME147
CORE_FILES := $(CORE_FILES) arch/m68k/mvme147/mvme147.o
SUBDIRS := $(SUBDIRS) arch/m68k/mvme147
endif

ifdef CONFIG_MVME16x
CORE_FILES := $(CORE_FILES) arch/m68k/mvme16x/mvme16x.o
SUBDIRS := $(SUBDIRS) arch/m68k/mvme16x
endif

ifdef CONFIG_BVME6000
CORE_FILES := $(CORE_FILES) arch/m68k/bvme6000/bvme6000.o
SUBDIRS := $(SUBDIRS) arch/m68k/bvme6000
endif

ifdef CONFIG_SUN3X
CORE_FILES := $(CORE_FILES) arch/m68k/sun3x/sun3x.o arch/m68k/sun3/sun3.o
SUBDIRS := $(SUBDIRS) arch/m68k/sun3x arch/m68k/sun3
endif

ifdef CONFIG_SUN3
CORE_FILES := $(CORE_FILES) arch/m68k/sun3/sun3.o arch/m68k/sun3/prom/promlib.a
SUBDIRS := $(SUBDIRS) arch/m68k/sun3 arch/m68k/sun3/prom
endif

ifdef CONFIG_M68040
CORE_FILES := $(CORE_FILES) arch/m68k/fpsp040/fpsp.o
SUBDIRS := $(SUBDIRS) arch/m68k/fpsp040
endif

ifdef CONFIG_M68060
CORE_FILES := $(CORE_FILES) arch/m68k/ifpsp060/ifpsp.o
SUBDIRS := $(SUBDIRS) arch/m68k/ifpsp060
endif

ifdef CONFIG_M68KFPU_EMU
CORE_FILES := $(CORE_FILES) arch/m68k/math-emu/mathemu.o
SUBDIRS := $(SUBDIRS) arch/m68k/math-emu
endif

lilo:	vmlinux
	if [ -f $(INSTALL_PATH)/vmlinux ]; then mv -f $(INSTALL_PATH)/vmlinux $(INSTALL_PATH)/vmlinux.old; fi
	if [ -f $(INSTALL_PATH)/System.map ]; then mv -f $(INSTALL_PATH)/System.map $(INSTALL_PATH)/System.old; fi
	cat vmlinux > $(INSTALL_PATH)/vmlinux
	cp System.map $(INSTALL_PATH)/System.map
	if [ -x /sbin/lilo ]; then /sbin/lilo; else /etc/lilo/install; fi

zImage compressed: vmlinux.gz

vmlinux.gz: vmlinux

ifndef CONFIG_KGDB
	cp vmlinux vmlinux.tmp
	$(STRIP) vmlinux.tmp
	gzip -9c vmlinux.tmp >vmlinux.gz
	rm vmlinux.tmp
else
	gzip -9c vmlinux >vmlinux.gz
endif

bzImage: vmlinux.bz2

vmlinux.bz2: vmlinux

ifndef CONFIG_KGDB
	cp vmlinux vmlinux.tmp
	$(STRIP) vmlinux.tmp
	bzip2 -1c vmlinux.tmp >vmlinux.bz2
	rm vmlinux.tmp
else
	bzip2 -1c vmlinux >vmlinux.bz2
endif

archclean:
	rm -f vmlinux.gz vmlinux.bz2
	rm -f arch/m68k/kernel/m68k_defs.h arch/m68k/kernel/m68k_defs.d

archmrproper:

archdep:
_USB_SERIAL_KEYSPAN_USA28XA is not set
# CONFIG_USB_SERIAL_KEYSPAN_USA28XB is not set
# CONFIG_USB_SERIAL_KEYSPAN_USA19 is not set
# CONFIG_USB_SERIAL_KEYSPAN_USA18X is not set
# CONFIG_USB_SERIAL_KEYSPAN_USA19W is not set
# CONFIG_USB_SERIAL_KEYSPAN_USA49W is not set
# CONFIG_USB_SERIAL_MCT_U232 is not set
# CONFIG_USB_SERIAL_KLSI is not set
# CONFIG_USB_SERIAL_PL2303 is not set
# CONFIG_USB_SERIAL_CYBERJACK is not set
# CONFIG_USB_SERIAL_XIRCOM is not set
# CONFIG_USB_SERIAL_OMNINET is not set

#
# USB Miscellaneous drivers
#
# CONFIG_USB_RIO500 is not set

#
# Input core support
#
# CONFIG_INPUT is not set
# CONFIG_INPUT_KEYBDEV is not set
# CONFIG_INPUT_MOUSEDEV is not set
# CONFIG_INPUT_JOYDEV is not set
# CONFIG_INPUT_EVDEV is not set

#
# Kernel hacking
#
CONFIG_CROSSCOMPILE=y
# CONFIG_REMOTE_DEBUG is not set
CONFIG_MAGIC_SYSRQ=y
CONFIG_MIPS_UNCACHED=y
#
# Automatically generated make config: don't edit
#
CONFIG_MIPS=y
CONFIG_MIPS64=y

#
# Code maturity level options
#
CONFIG_EXPERIMENTAL=y

#
# Machine selection
#
# CONFIG_MIPS_ATLAS is not set
CONFIG_MIPS_MALTA=y
# CONFIG_SGI_IP27 is not set
# CONFIG_SGI_IP22 is not set
# CONFIG_SGI_IP32 is not set
# CONFIG_SIBYTE_SB1250 is not set
CONFIG_RWSEM_GENERIC_SPINLOCK=y
# CONFIG_RWSEM_XCHGADD_ALGORITHM is not set
CONFIG_BOOT_ELF32=y
CONFIG_I8259=y
CONFIG_L1_CACHE_SHIFT=5
CONFIG_NONCOHERENT_IO=y
CONFIG_PCI=y
CONFIG_SWAP_IO_SPACE=y
# CONFIG_ISA is not set
# CONFIG_EISA is not set
# CONFIG_MCA is not set
# CONFIG_SBUS is not set

#
# CPU selection
#
# CONFIG_CPU_R4300 is not set
CONFIG_CPU_R4X00=y
# CONFIG_CPU_R5000 is not set
# CONFIG_CPU_NEVADA is not set
# CONFIG_CPU_R8000 is not set
# CONFIG_CPU_R10000 is not set
# CONFIG_CPU_SB1 is not set
CONFIG_CPU_HAS_LLSC=y
CONFIG_CPU_HAS_LLDSCD=y

#
# General setup
#
CONFIG_CPU_LITTLE_ENDIAN=y
# CONFIG_MIPS_FPU_EMULATOR is not set
CONFIG_NET=y
CONFIG_PCI_NAMES=y
# CONFIG_HOTPLUG is not set
# CONFIG_PCMCIA is not set
# CONFIG_HOTPLUG_PCI is not set
CONFIG_SYSVIPC=y
# CONFIG_BSD_PROCESS_ACCT is not set
# CONFIG_SYSCTL is not set
CONFIG_BINFMT_ELF=y
CONFIG_MIPS32_COMPAT=y
CONFIG_BINFMT_ELF32=y
# CONFIG_BINFMT_MISC is not set

#
# Loadable module support
#
# CONFIG_MODULES is not set
CONFIG_PCI_NAMES=y

#
# Memory Technology Devices (MTD)
#
# CONFIG_MTD is not set

#
# Parallel port support
#
# CONFIG_PARPORT is not set

#
# Block devices
#
CONFIG_BLK_DEV_FD=y
# CONFIG_BLK_DEV_XD is not set
# CONFIG_PARIDE is not set
# CONFIG_BLK_CPQ_DA is not set
# CONFIG_BLK_CPQ_CISS_DA is not set
# CONFIG_BLK_DEV_DAC960 is not set
# CONFIG_BLK_DEV_LOOP is not set
# CONFIG_BLK_DEV_NBD is not set
CONFIG_BLK_DEV_RAM=y
CONFIG_BLK_DEV_RAM_SIZE=4096
# CONFIG_BLK_DEV_INITRD is not set

#
# Multi-device support (RAID and LVM)
#
# CONFIG_MD is not set
# CONFIG_BLK_DEV_MD is not set
# CONFIG_MD_LINEAR is not set
# CONFIG_MD_RAID0 is not set
# CONFIG_MD_RAID1 is not set
# CONFIG_MD_RAID5 is not set
# CONFIG_MD_MULTIPATH is not set
# CONFIG_BLK_DEV_LVM is not set

#
# Networking options
#
# CONFIG_PACKET is not set
# CONFIG_NETLINK_DEV is not set
# CONFIG_NETFILTER is not set
# CONFIG_FILTER is not set
CONFIG_UNIX=y
CONFIG_INET=y
# CONFIG_IP_MULTICAST is not set
# CONFIG_IP_ADVANCED_ROUTER is not set
CONFIG_IP_PNP=y
# CONFIG_IP_PNP_DHCP is not set
# CONFIG_IP_PNP_BOOTP is not set
# CONFIG_IP_PNP_RARP is not set
# CONFIG_NET_IPIP is not set
# CONFIG_NET_IPGRE is not set
# CONFIG_ARPD is not set
# CONFIG_INET_ECN is not set
# CONFIG_SYN_COOKIES is not set
# CONFIG_IPV6 is not set
# CONFIG_KHTTPD is not set
# CONFIG_ATM is not set
# CONFIG_VLAN_8021Q is not set

#
#  
#
# CONFIG_IPX is not set
# CONFIG_ATALK is not set
# CONFIG_DECNET is not set
# CONFIG_BRIDGE is not set
# CONFIG_X25 is not set
# CONFIG_LAPB is not set
# CONFIG_LLC is not set
# CONFIG_NET_DIVERT is not set
# CONFIG_ECONET is not set
# CONFIG_WAN_ROUTER is not set
# CONFIG_NET_FASTROUTE is not set
# CONFIG_NET_HW_FLOWCONTROL is not set

#
# QoS and/or fair queueing
#
# CONFIG_NET_SCHED is not set

#
# Telephony Support
#
# CONFIG_PHONE is not set
# CONFIG_PHONE_IXJ is not set
# CONFIG_PHONE_IXJ_PCMCIA is not set

#
# ATA/IDE/MFM/RLL support
#
# CONFIG_IDE is not set
# CONFIG_BLK_DEV_IDE_MODES is not set
# CONFIG_BLK_DEV_HD is not set

#
# SCSI support
#
CONFIG_SCSI=y

#
# SCSI support type (disk, tape, CD-ROM)
#
CONFIG_BLK_DEV_SD=y
CONFIG_SD_EXTRA_DEVS=40
# CONFIG_CHR_DEV_ST is not set
# CONFIG_CHR_DEV_OSST is not set
# CONFIG_BLK_DEV_SR is not set
# CONFIG_CHR_DEV_SG is not set

#
# Some SCSI devices (e.g. CD jukebox) support multiple LUNs
#
# CONFIG_SCSI_DEBUG_QUEUES is not set
# CONFIG_SCSI_MULTI_LUN is not set
# CONFIG_SCSI_CONSTANTS is not set
# CONFIG_SCSI_LOGGING is not set

#
# SCSI low-level drivers
#
# CONFIG_BLK_DEV_3W_XXXX_RAID is not set
# CONFIG_SCSI_7000FASST is not set
# CONFIG_SCSI_ACARD is not set
# CONFIG_SCSI_AHA152X is not set
# CONFIG_SCSI_AHA1542 is not set
# CONFIG_SCSI_AHA1740 is not set
# CONFIG_SCSI_AACRAID is not set
# CONFIG_SCSI_AIC7XXX is not set
# CONFIG_SCSI_AIC7XXX_OLD is not set
# CONFIG_SCSI_DPT_I2O is not set
# CONFIG_SCSI_ADVANSYS is not set
# CONFIG_SCSI_IN2000 is not set
# CONFIG_SCSI_AM53C974 is not set
# CONFIG_SCSI_MEGARAID is not set
# CONFIG_SCSI_BUSLOGIC is not set
# CONFIG_SCSI_CPQFCTS is not set
# CONFIG_SCSI_DMX3191D is not set
# CONFIG_SCSI_DTC3280 is not set
# CONFIG_SCSI_EATA is not set
# CONFIG_SCSI_EATA_DMA is not set
# CONFIG_SCSI_EATA_PIO is not set
# CONFIG_SCSI_FUTURE_DOMAIN is not set
# CONFIG_SCSI_GDTH is not set
# CONFIG_SCSI_GENERIC_NCR5380 is not set
# CONFIG_SCSI_INITIO is not set
# CONFIG_SCSI_INIA100 is not set
# CONFIG_SCSI_NCR53C406A is not set
# CONFIG_SCSI_NCR53C7xx is not set
# CONFIG_SCSI_SYM53C8XX_2 is not set
# CONFIG_SCSI_NCR53C8XX is not set
# CONFIG_SCSI_SYM53C8XX is not set
# CONFIG_SCSI_PAS16 is not set
# CONFIG_SCSI_PCI2000 is not set
# CONFIG_SCSI_PCI2220I is not set
# CONFIG_SCSI_PSI240I is not set
# CONFIG_SCSI_QLOGIC_FAS is not set
# CONFIG_SCSI_QLOGIC_ISP is not set
# CONFIG_SCSI_QLOGIC_FC is not set
# CONFIG_SCSI_QLOGIC_1280 is not set
# CONFIG_SCSI_SIM710 is not set
# CONFIG_SCSI_SYM53C416 is not set
# CONFIG_SCSI_DC390T is not set
# CONFIG_SCSI_T128 is not set
# CONFIG_SCSI_U14_34F is not set
# CONFIG_SCSI_DEBUG is not set

#
# Network device support
#
CONFIG_NETDEVICES=y

#
# ARCnet devices
#
# CONFIG_ARCNET is not set
# CONFIG_DUMMY is not set
# CONFIG_BONDING is not set
# CONFIG_EQUALIZER is not set
# CONFIG_TUN is not set
# CONFIG_ETHERTAP is not set

#
# Ethernet (10 or 100Mbit)
#
CONFIG_NET_ETHERNET=y
# CONFIG_SUNLANCE is not set
# CONFIG_HAPPYMEAL is not set
# CONFIG_SUNBMAC is not set
# CONFIG_SUNQE is not set
# CONFIG_SUNGEM is not set
# CONFIG_NET_VENDOR_3COM is not set
# CONFIG_LANCE is not set
# CONFIG_NET_VENDOR_SMC is not set
# CONFIG_NET_VENDOR_RACAL is not set
# CONFIG_HP100 is not set
# CONFIG_NET_ISA is not set
# CONFIG_NET_PCI is not set
# CONFIG_NET_POCKET is not set

#
# Ethernet (1000 Mbit)
#
# CONFIG_ACENIC is not set
# CONFIG_DL2K is not set
# CONFIG_MYRI_SBUS is not set
# CONFIG_NS83820 is not set
# CONFIG_HAMACHI is not set
# CONFIG_YELLOWFIN is not set
# CONFIG_SK98LIN is not set
# CONFIG_FDDI is not set
# CONFIG_HIPPI is not set
# CONFIG_PLIP is not set
# CONFIG_PPP is not set
# CONFIG_SLIP is not set

#
# Wireless LAN (non-hamradio)
#
# CONFIG_NET_RADIO is not set

#
# Token Ring devices
#
# CONFIG_TR is not set
# CONFIG_NET_FC is not set
# CONFIG_RCPCI is not set
# CONFIG_SHAPER is not set

#
# Wan interfaces
#
# CONFIG_WAN is not set

#
# Amateur Radio support
#
# CONFIG_HAMRADIO is not set

#
# IrDA (infrared) support
#
# CONFIG_IRDA is not set

#
# ISDN subsystem
#
# CONFIG_ISDN is not set

#
# Old CD-ROM drivers (not SCSI, not IDE)
#
# CONFIG_CD_NO_IDESCSI is not set

#
# Character devices
#
# CONFIG_VT is not set
CONFIG_SERIAL=y
CONFIG_SERIAL_CONSOLE=y
# CONFIG_SERIAL_EXTENDED is not set
# CONFIG_SERIAL_NONSTANDARD is not set
CONFIG_UNIX98_PTYS=y
CONFIG_UNIX98_PTY_COUNT=256

#
# I2C support
#
# CONFIG_I2C is not set

#
# Mice
#
# CONFIG_BUSMOUSE is not set
# CONFIG_MOUSE is not set

#
# Joysticks
#
# CONFIG_INPUT_GAMEPORT is not set

#
# Input core support is needed for gameports
#

#
# Input core support is needed for joysticks
#
# CONFIG_QIC02_TAPE is not set

#
# Watchdog Cards
#
# CONFIG_WATCHDOG is not set
# CONFIG_INTEL_RNG is not set
# CONFIG_NVRAM is not set
CONFIG_RTC=y
# CONFIG_DTLK is not set
# CONFIG_R3964 is not set
# CONFIG_APPLICOM is not set

#
# Ftape, the floppy tape device driver
#
# CONFIG_FTAPE is not set
# CONFIG_AGP is not set
# CONFIG_DRM is not set

#
# Multimedia devices
#
# CONFIG_VIDEO_DEV is not set

#
# File systems
#
# CONFIG_QUOTA is not set
CONFIG_AUTOFS_FS=y
# CONFIG_AUTOFS4_FS is not set
# CONFIG_REISERFS_FS is not set
# CONFIG_REISERFS_CHECK is not set
# CONFIG_REISERFS_PROC_INFO is not set
# CONFIG_ADFS_FS is not set
# CONFIG_ADFS_FS_RW is not set
# CONFIG_AFFS_FS is not set
# CONFIG_HFS_FS is not set
# CONFIG_BFS_FS is not set
# CONFIG_EXT3_FS is not set
# CONFIG_JBD is not set
# CONFIG_JBD_DEBUG is not set
# CONFIG_FAT_FS is not set
# CONFIG_MSDOS_FS is not set
# CONFIG_UMSDOS_FS is not set
# CONFIG_VFAT_FS is not set
CONFIG_EFS_FS=y
# CONFIG_JFFS_FS is not set
# CONFIG_JFFS2_FS is not set
# CONFIG_CRAMFS is not set
# CONFIG_TMPFS is not set
# CONFIG_RAMFS is not set
# CONFIG_ISO9660_FS is not set
# CONFIG_JOLIET is not set
# CONFIG_ZISOFS is not set
# CONFIG_MINIX_FS is not set
# CONFIG_VXFS_FS is not set
# CONFIG_NTFS_FS is not set
# CONFIG_NTFS_RW is not set
# CONFIG_HPFS_FS is not set
CONFIG_PROC_FS=y
# CONFIG_DEVFS_FS is not set
# CONFIG_DEVFS_MOUNT is not set
# CONFIG_DEVFS_DEBUG is not set
CONFIG_DEVPTS_FS=y
# CONFIG_QNX4FS_FS is not set
# CONFIG_QNX4FS_RW is not set
# CONFIG_ROMFS_FS is not set
CONFIG_EXT2_FS=y
# CONFIG_SYSV_FS is not set
# CONFIG_UDF_FS is not set
# CONFIG_UDF_RW is not set
# CONFIG_UFS_FS is not set
# CONFIG_UFS_FS_WRITE is not set

#
# Network File Systems
#
# CONFIG_CODA_FS is not set
# CONFIG_INTERMEZZO_FS is not set
CONFIG_NFS_FS=y
# CONFIG_NFS_V3 is not set
CONFIG_ROOT_NFS=y
# CONFIG_NFSD is not set
# CONFIG_NFSD_V3 is not set
CONFIG_SUNRPC=y
CONFIG_LOCKD=y
# CONFIG_SMB_FS is not set
# CONFIG_NCP_FS is not set
# CONFIG_NCPFS_PACKET_SIGNING is not set
# CONFIG_NCPFS_IOCTL_LOCKING is not set
# CONFIG_NCPFS_STRONG is not set
# CONFIG_NCPFS_NFS_NS is not set
# CONFIG_NCPFS_OS2_NS is not set
# CONFIG_NCPFS_SMALLDOS is not set
# CONFIG_NCPFS_NLS is not set
# CONFIG_NCPFS_EXTRAS is not set
# CONFIG_ZISOFS_FS is not set
# CONFIG_ZLIB_FS_INFLATE is not set

#
# Partition Types
#
# CONFIG_PARTITION_ADVANCED is not set
CONFIG_MSDOS_PARTITION=y
# CONFIG_SMB_NLS is not set
# CONFIG_NLS is not set
CONFIG_KCORE_ELF=y

#
# Sound
#
# CONFIG_SOUND is not set

#
# USB support
#
# CONFIG_USB is not set

#
# USB Controllers
#
# CONFIG_USB_UHCI is not set
# CONFIG_USB_UHCI_ALT is not set
# CONFIG_USB_OHCI is not set

#
# USB Device Class drivers
#
# CONFIG_USB_AUDIO is not set
# CONFIG_USB_BLUETOOTH is not set
# CONFIG_USB_STORAGE is not set
# CONFIG_USB_STORAGE_DEBUG is not set
# CONFIG_USB_STORAGE_DATAFAB is not set
# CONFIG_USB_STORAGE_FREECOM is not set
# CONFIG_USB_STORAGE_ISD200 is not set
# CONFIG_USB_STORAGE_DPCM is not set
# CONFIG_USB_STORAGE_HP8200e is not set
# CONFIG_USB_STORAGE_SDDR09 is not set
# CONFIG_USB_STORAGE_JUMPSHOT is not set
# CONFIG_USB_ACM is not set
# CONFIG_USB_PRINTER is not set

#
# USB Human Interface Devices (HID)
#

#
#   Input core support is needed for USB HID
#

#
# USB Imaging devices
#
# CONFIG_USB_DC2XX is not set
# CONFIG_USB_MDC800 is not set
# CONFIG_USB_SCANNER is not set
# CONFIG_USB_MICROTEK is not set
# CONFIG_USB_HPUSBSCSI is not set

#
# USB Multimedia devices
#

#
#   Video4Linux support is needed for USB Multimedia device support
#

#
# USB Network adaptors
#
# CONFIG_USB_PEGASUS is not set
# CONFIG_USB_KAWETH is not set
# CONFIG_USB_CATC is not set
# CONFIG_USB_CDCETHER is not set
# CONFIG_USB_USBNET is not set

#
# USB port drivers
#
# CONFIG_USB_USS720 is not set

#
# USB Serial Converter support
#
# CONFIG_USB_SERIAL is not set
# CONFIG_USB_SERIAL_GENERIC is not set
# CONFIG_USB_SERIAL_BELKIN is not set
# CONFIG_USB_SERIAL_WHITEHEAT is not set
# CONFIG_USB_SERIAL_DIGI_ACCELEPORT is not set
# CONFIG_USB_SERIAL_EMPEG is not set
# CONFIG_USB_SERIAL_FTDI_SIO is not set
# CONFIG_USB_SERIAL_VISOR is not set
# CONFIG_USB_SERIAL_IPAQ is not set
# CONFIG_USB_SERIAL_IR is not set
# CONFIG_USB_SERIAL_EDGEPORT is not set
# CONFIG_USB_SERIAL_KEYSPAN_PDA is not set
# CONFIG_USB_SERIAL_KEYSPAN is not set
# CONFIG_USB_SERIAL_KEYSPAN_USA28 is not set
# CONFIG_USB_SERIAL_KEYSPAN_USA28X is not set
# CONFIG_USB_SERIAL_KEYSPAN_USA28XA is not set
# CONFIG_USB_SERIAL_KEYSPAN_USA28XB is not set
# CONFIG_USB_SERIAL_KEYSPAN_USA19 is not set
# CONFIG_USB_SERIAL_KEYSPAN_USA18X is not set
# CONFIG_USB_SERIAL_KEYSPAN_USA19W is not set
# CONFIG_USB_SERIAL_KEYSPAN_USA49W is not set
# CONFIG_USB_SERIAL_MCT_U232 is not set
# CONFIG_USB_SERIAL_KLSI is not set
# CONFIG_USB_SERIAL_PL2303 is not set
# CONFIG_USB_SERIAL_CYBERJACK is not set
# CONFIG_USB_SERIAL_XIRCOM is not set
# CONFIG_USB_SERIAL_OMNINET is not set

#
# USB Miscellaneous drivers
#
# CONFIG_USB_RIO500 is not set

#
# Input core support
#
# CONFIG_INPUT is not set
# CONFIG_INPUT_KEYBDEV is not set
# CONFIG_INPUT_MOUSEDEV is not set
# CONFIG_INPUT_JOYDEV is not set
# CONFIG_INPUT_EVDEV is not set

#
# Kernel hacking
#
CONFIG_CROSSCOMPILE=y
# CONFIG_REMOTE_DEBUG is not set
# CONFIG_MAGIC_SYSRQ is not set
# CONFIG_MIPS_UNCACHED is not set
#
# Makefile for Linux arch/m68k/amiga source directory
#
# Note! Dependencies are done automagically by 'make dep', which also
# removes any old dependencies. DON'T put your own dependencies here
# unless it's something special (ie not a .c file).
#
# Note 2! The CFLAGS definitions are now in the main makefile...

O_TARGET := amiga.o

export-objs	:= amiga_ksyms.o

obj-y		:= config.o amiints.o cia.o chipram.o amisound.o amiga_ksyms.o

obj-$(CONFIG_AMIGA_PCMCIA)	+= pcmcia.o

include $(TOPDIR)/Rules.make
/*
 * linux/arch/m68k/amiga/amiints.c -- Amiga Linux interrupt handling code
 *
 * This file is subject to the terms and conditions of the GNU General Public
 * License.  See the file COPYING in the main directory of this archive
 * for more details.
 *
 * 11/07/96: rewritten interrupt handling, irq lists are exists now only for
 *           this sources where it makes sense (VERTB/PORTS/EXTER) and you must
 *           be careful that dev_id for this sources is unique since this the
 *           only possibility to distinguish between different handlers for
 *           free_irq. irq lists also have different irq flags:
 *           - IRQ_FLG_FAST: handler is inserted at top of list (after other
 *                           fast handlers)
 *           - IRQ_FLG_SLOW: handler is inserted at bottom of list and before
 *                           they're executed irq level is set to the previous
 *                           one, but handlers don't need to be reentrant, if
 *                           reentrance occurred, slow handlers will be just
 *                           called again.
 *           The whole interrupt handling for CIAs is moved to cia.c
 *           /Roman Zippel
 *
 * 07/08/99: rewamp of the interrupt handling - we now have two types of
 *           interrupts, normal and fast handlers, fast handlers being
 *           marked with SA_INTERRUPT and runs with all other interrupts
 *           disabled. Normal interrupts disable their own source but
 *           run with all other interrupt sources enabled.
 *           PORTS and EXTER interrupts are always shared even if the
 *           drivers do not explicitly mark this when calling
 *           request_irq which they really should do.
 *           This is similar to the way interrupts are handled on all
 *           other architectures and makes a ton of sense besides
 *           having the advantage of making it easier to share
 *           drivers.
 *           /Jes
 */

#include <linux/types.h>
#include <linux/kernel.h>
#include <linux/sched.h>
#include <linux/kernel_stat.h>
#include <linux/init.h>

#include <asm/system.h>
#include <asm/irq.h>
#include <asm/traps.h>
#include <asm/amigahw.h>
#include <asm/amigaints.h>
#include <asm/amipcmcia.h>

extern int cia_request_irq(struct ciabase *base,int irq,
                           void (*handler)(int, void *, struct pt_regs *),
                           unsigned long flags, const char *devname, void *dev_id);
extern void cia_free_irq(struct ciabase *base, unsigned int irq, void *dev_id);
extern void cia_init_IRQ(struct ciabase *base);
extern int cia_get_irq_list(struct ciabase *base, char *buf);

/* irq node variables for amiga interrupt sources */
static irq_node_t *ami_irq_list[AMI_STD_IRQS];

static unsigned short amiga_intena_vals[AMI_STD_IRQS] = {
	IF_VERTB, IF_COPER, IF_AUD0, IF_AUD1, IF_AUD2, IF_AUD3, IF_BLIT,
	IF_DSKSYN, IF_DSKBLK, IF_RBF, IF_TBE, IF_SOFT, IF_PORTS, IF_EXTER
};
static const unsigned char ami_servers[AMI_STD_IRQS] = {
	1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1
};

static short ami_ablecount[AMI_IRQS];

static void ami_badint(int irq, void *dev_id, struct pt_regs *fp)
{
	num_spurious += 1;
}

/*
 * void amiga_init_IRQ(void)
 *
 * Parameters:	None
 *
 * Returns:	Nothing
 *
 * This function should be called during kernel startup to initialize
 * the amiga IRQ handling routines.
 */

void __init amiga_init_IRQ(void)
{
	int i;

	/* initialize handlers */
	for (i = 0; i < AMI_STD_IRQS; i++) {
		if (ami_servers[i]) {
			ami_irq_list[i] = NULL;
		} else {
			ami_irq_list[i] = new_irq_node();
			ami_irq_list[i]->handler = ami_badint;
			ami_irq_list[i]->flags   = 0;
			ami_irq_list[i]->dev_id  = NULL;
			ami_irq_list[i]->devname = NULL;
			ami_irq_list[i]->next    = NULL;
		}
	}
	for (i = 0; i < AMI_IRQS; i++)
		ami_ablecount[i] = 0;

	/* turn off PCMCIA interrupts */
	if (AMIGAHW_PRESENT(PCMCIA))
		gayle.inten = GAYLE_IRQ_IDE;

	/* turn off all interrupts and enable the master interrupt bit */
	custom.intena = 0x7fff;
	custom.intreq = 0x7fff;
	custom.intena = IF_SETCLR | IF_INTEN;

	cia_init_IRQ(&ciaa_base);
	cia_init_IRQ(&ciab_base);
}

static inline int amiga_insert_irq(irq_node_t **list, irq_node_t *node)
{
	unsigned long flags;
	irq_node_t *cur;

	if (!node->dev_id)
		printk("%s: Warning: dev_id of %s is zero\n",
		       __FUNCTION__, node->devname);

	save_flags(flags);
	cli();

	cur = *list;

	if (node->flags & SA_INTERRUPT) {
		if (node->flags & SA_SHIRQ)
			return -EBUSY;
		/*
		 * There should never be more than one
		 */
		while (cur && cur->flags & SA_INTERRUPT) {
			list = &cur->next;
			cur = cur->next;
		}
	} else {
		while (cur) {
			list = &cur->next;
			cur = cur->next;
		}
	}

	node->next = cur;
	*list = node;

	restore_flags(flags);
	return 0;
}

static inline void amiga_delete_irq(irq_node_t **list, void *dev_id)
{
	unsigned long flags;
	irq_node_t *node;

	save_flags(flags);
	cli();

	for (node = *list; node; list = &node->next, node = *list) {
		if (node->dev_id == dev_id) {
			*list = node->next;
			/* Mark it as free. */
			node->handler = NULL;
			restore_flags(flags);
			return;
		}
	}
	restore_flags(flags);
	printk ("%s: tried to remove invalid irq\n", __FUNCTION__);
}

/*
 * amiga_request_irq : add an interrupt service routine for a particular
 *                     machine specific interrupt source.
 *                     If the addition was successful, it returns 0.
 */

int amiga_request_irq(unsigned int irq,
		      void (*handler)(int, void *, struct pt_regs *),
                      unsigned long flags, const char *devname, void *dev_id)
{
	irq_node_t *node;
	int error = 0;

	if (irq >= AMI_IRQS) {
		printk ("%s: Unknown IRQ %d from %s\n", __FUNCTION__,
			irq, devname);
		return -ENXIO;
	}

	if (irq >= IRQ_AMIGA_AUTO)
		return sys_request_irq(irq - IRQ_AMIGA_AUTO, handler,
		                       flags, devname, dev_id);

	if (irq >= IRQ_AMIGA_CIAB)
		return cia_request_irq(&ciab_base, irq - IRQ_AMIGA_CIAB,
		                       handler, flags, devname, dev_id);

	if (irq >= IRQ_AMIGA_CIAA)
		return cia_request_irq(&ciaa_base, irq - IRQ_AMIGA_CIAA,
		                       handler, flags, devname, dev_id);

	/*
	 * IRQ_AMIGA_PORTS & IRQ_AMIGA_EXTER defaults to shared,
	 * we could add a check here for the SA_SHIRQ flag but all drivers
	 * should be aware of sharing anyway.
	 */
	if (ami_servers[irq]) {
		if (!(node = new_irq_node()))
			return -ENOMEM;
		node->handler = handler;
		node->flags   = flags;
		node->dev_id  = dev_id;
		node->devname = devname;
		node->next    = NULL;
		error = amiga_insert_irq(&ami_irq_list[irq], node);
	} else {
		ami_irq_list[irq]->handler = handler;
		ami_irq_list[irq]->flags   = flags;
		ami_irq_list[irq]->dev_id  = dev_id;
		ami_irq_list[irq]->devname = devname;
	}

	/* enable the interrupt */
	if (irq < IRQ_AMIGA_PORTS && !ami_ablecount[irq])
		custom.intena = IF_SETCLR | amiga_intena_vals[irq];

	return error;
}

void amiga_free_irq(unsigned int irq, void *dev_id)
{
	if (irq >= AMI_IRQS) {
		printk ("%s: Unknown IRQ %d\n", __FUNCTION__, irq);
		return;
	}

	if (irq >= IRQ_AMIGA_AUTO)
		sys_free_irq(irq - IRQ_AMIGA_AUTO, dev_id);

	if (irq >= IRQ_AMIGA_CIAB) {
		cia_free_irq(&ciab_base, irq - IRQ_AMIGA_CIAB, dev_id);
		return;
	}

	if (irq >= IRQ_AMIGA_CIAA) {
		cia_free_irq(&ciaa_base, irq - IRQ_AMIGA_CIAA, dev_id);
		return;
	}

	if (ami_servers[irq]) {
		amiga_delete_irq(&ami_irq_list[irq], dev_id);
		/* if server list empty, disable the interrupt */
		if (!ami_irq_list[irq] && irq < IRQ_AMIGA_PORTS)
			custom.intena = amiga_intena_vals[irq];
	} else {
		if (ami_irq_list[irq]->dev_id != dev_id)
			printk("%s: removing probably wrong IRQ %d from %s\n",
			       __FUNCTION__, irq, ami_irq_list[irq]->devname);
		ami_irq_list[irq]->handler = ami_badint;
		ami_irq_list[irq]->flags   = 0;
		ami_irq_list[irq]->dev_id  = NULL;
		ami_irq_list[irq]->devname = NULL;
		custom.intena = amiga_intena_vals[irq];
	}
}

/*
 * Enable/disable a particular machine specific interrupt source.
 * Note that this may affect other interrupts in case of a shared interrupt.
 * This function should only be called for a _very_ short time to change some
 * internal data, that may not be changed by the interrupt at the same time.
 * ami_(enable|disable)_irq calls may also be nested.
 */

void amiga_enable_irq(unsigned int irq)
{
	if (irq >= AMI_IRQS) {
		printk("%s: Unknown IRQ %d\n", __FUNCTION__, irq);
		return;
	}

	if (--ami_ablecount[irq])
		return;

	/* No action for auto-vector interrupts */
	if (irq >= IRQ_AMIGA_AUTO){
		printk("%s: Trying to enable auto-vector IRQ %i\n",
		       __FUNCTION__, irq - IRQ_AMIGA_AUTO);
		return;
	}

	if (irq >= IRQ_AMIGA_CIAB) {
		cia_set_irq(&ciab_base, (1 << (irq - IRQ_AMIGA_CIAB)));
		cia_able_irq(&ciab_base, CIA_ICR_SETCLR |
		             (1 << (irq - IRQ_AMIGA_CIAB)));
		return;
	}

	if (irq >= IRQ_AMIGA_CIAA) {
		cia_set_irq(&ciaa_base, (1 << (irq - IRQ_AMIGA_CIAA)));
		cia_able_irq(&ciaa_base, CIA_ICR_SETCLR |
		             (1 << (irq - IRQ_AMIGA_CIAA)));
		return;
	}

	/* enable the interrupt */
	custom.intena = IF_SETCLR | amiga_intena_vals[irq];
}

void amiga_disable_irq(unsigned int irq)
{
	if (irq >= AMI_IRQS) {
		printk("%s: Unknown IRQ %d\n", __FUNCTION__, irq);
		return;
	}

	if (ami_ablecount[irq]++)
		return;

	/* No action for auto-vector interrupts */
	if (irq >= IRQ_AMIGA_AUTO) {
		printk("%s: Trying to disable auto-vector IRQ %i\n",
		       __FUNCTION__, irq - IRQ_AMIGA_AUTO);
		return;
	}

	if (irq >= IRQ_AMIGA_CIAB) {
		cia_able_irq(&ciab_base, 1 << (irq - IRQ_AMIGA_CIAB));
		return;
	}

	if (irq >= IRQ_AMIGA_CIAA) {
		cia_able_irq(&ciaa_base, 1 << (irq - IRQ_AMIGA_CIAA));
		return;
	}

	/* disable the interrupt */
	custom.intena = amiga_intena_vals[irq];
}

inline void amiga_do_irq(int irq, struct pt_regs *fp)
{
	kstat.irqs[0][SYS_IRQS + irq]++;
	ami_irq_list[irq]->handler(irq, ami_irq_list[irq]->dev_id, fp);
}

void amiga_do_irq_list(int irq, struct pt_regs *fp)
{
	irq_node_t *node;

	kstat.irqs[0][SYS_IRQS + irq]++;

	custom.intreq = amiga_intena_vals[irq];

	for (node = ami_irq_list[irq]; node; node = node->next)
		node->handler(irq, node->dev_id, fp);
}

/*
 * The builtin Amiga hardware interrupt handlers.
 */

static void ami_int1(int irq, void *dev_id, struct pt_regs *fp)
{
	unsigned short ints = custom.intreqr & custom.intenar;

	/* if serial transmit buffer empty, interrupt */
	if (ints & IF_TBE) {
		custom.intreq = IF_TBE;
		amiga_do_irq(IRQ_AMIGA_TBE, fp);
	}

	/* if floppy disk transfer complete, interrupt */
	if (ints & IF_DSKBLK) {
		custom.intreq = IF_DSKBLK;
		amiga_do_irq(IRQ_AMIGA_DSKBLK, fp);
	}

	/* if software interrupt set, interrupt */
	if (ints & IF_SOFT) {
		custom.intreq = IF_SOFT;
		amiga_do_irq(IRQ_AMIGA_SOFT, fp);
	}
}

static void ami_int3(int irq, void *dev_id, struct pt_regs *fp)
{
	unsigned short ints = custom.intreqr & custom.intenar;

	/* if a blitter interrupt */
	if (ints & IF_BLIT) {
		custom.intreq = IF_BLIT;
		amiga_do_irq(IRQ_AMIGA_BLIT, fp);
	}

	/* if a copper interrupt */
	if (ints & IF_COPER) {
		custom.intreq = IF_COPER;
		amiga_do_irq(IRQ_AMIGA_COPPER, fp);
	}

	/* if a vertical blank interrupt */
	if (ints & IF_VERTB)
		amiga_do_irq_list(IRQ_AMIGA_VERTB, fp);
}

static void ami_int4(int irq, void *dev_id, struct pt_regs *fp)
{
	unsigned short ints = custom.intreqr & custom.intenar;

	/* if audio 0 interrupt */
	if (ints & IF_AUD0) {
		custom.intreq = IF_AUD0;
		amiga_do_irq(IRQ_AMIGA_AUD0, fp);
	}

	/* if audio 1 interrupt */
	if (ints & IF_AUD1) {
		custom.intreq = IF_AUD1;
		amiga_do_irq(IRQ_AMIGA_AUD1, fp);
	}

	/* if audio 2 interrupt */
	if (ints & IF_AUD2) {
		custom.intreq = IF_AUD2;
		amiga_do_irq(IRQ_AMIGA_AUD2, fp);
	}

	/* if audio 3 interrupt */
	if (ints & IF_AUD3) {
		custom.intreq = IF_AUD3;
		amiga_do_irq(IRQ_AMIGA_AUD3, fp);
	}
}

static void ami_int5(int irq, void *dev_id, struct pt_regs *fp)
{
	unsigned short ints = custom.intreqr & custom.intenar;

	/* if serial receive buffer full interrupt */
	if (ints & IF_RBF) {
		/* acknowledge of IF_RBF must be done by the serial interrupt */
		amiga_do_irq(IRQ_AMIGA_RBF, fp);
	}

	/* if a disk sync interrupt */
	if (ints & IF_DSKSYN) {
		custom.intreq = IF_DSKSYN;
		amiga_do_irq(IRQ_AMIGA_DSKSYN, fp);
	}
}

static void ami_int7(int irq, void *dev_id, struct pt_regs *fp)
{
	panic ("level 7 interrupt received\n");
}

void (*amiga_default_handler[SYS_IRQS])(int, void *, struct pt_regs *) = {
	ami_badint, ami_int1, ami_badint, ami_int3,
	ami_int4, ami_int5, ami_badint, ami_int7
};

int amiga_get_irq_list(char *buf)
{
	int i, len = 0;
	irq_node_t *node;

	for (i = 0; i < AMI_STD_IRQS; i++) {
		if (!(node = ami_irq_list[i]))
			continue;
		len += sprintf(buf+len, "ami  %2d: %10u ", i,
		               kstat.irqs[0][SYS_IRQS + i]);
		do {
			if (node->flags & SA_INTERRUPT)
				len += sprintf(buf+len, "F ");
			else
				len += sprintf(buf+len, "  ");
			len += sprintf(buf+len, "%s\n", node->devname);
			if ((node = node->next))
				len += sprintf(buf+len, "                    ");
		} while (node);
	}

	len += cia_get_irq_list(&ciaa_base, buf+len);
	len += cia_get_irq_list(&ciab_base, buf+len);
	return len;
}
/*
 *  linux/arch/m68k/amiga/cia.c - CIA support
 *
 *  Copyright (C) 1996 Roman Zippel
 *
 *  The concept of some functions bases on the original Amiga OS function
 *
 * This file is subject to the terms and conditions of the GNU General Public
 * License.  See the file COPYING in the main directory of this archive
 * for more details.
 */

#include <linux/types.h>
#include <linux/kernel.h>
#include <linux/sched.h>
#include <linux/errno.h>
#include <linux/kernel_stat.h>
#include <linux/init.h>

#include <asm/irq.h>
#include <asm/amigahw.h>
#include <asm/amigaints.h>

struct ciabase {
	volatile struct CIA *cia;
	unsigned char icr_mask, icr_data;
	unsigned short int_mask;
	int handler_irq, cia_irq, server_irq;
	char *name;
	irq_handler_t irq_list[CIA_IRQS];
} ciaa_base = {
	&ciaa, 0, 0, IF_PORTS,
	IRQ_AMIGA_AUTO_2, IRQ_AMIGA_CIAA,
	IRQ_AMIGA_PORTS,
	"CIAA handler"
}, ciab_base = {
	&ciab, 0, 0, IF_EXTER,
	IRQ_AMIGA_AUTO_6, IRQ_AMIGA_CIAB,
	IRQ_AMIGA_EXTER,
	"CIAB handler"
};

/*
 *  Cause or clear CIA interrupts, return old interrupt status.
 */

unsigned char cia_set_irq(struct ciabase *base, unsigned char mask)
{
	unsigned char old;

	old = (base->icr_data |= base->cia->icr);
	if (mask & CIA_ICR_SETCLR)
		base->icr_data |= mask;
	else
		base->icr_data &= ~mask;
	if (base->icr_data & base->icr_mask)
		custom.intreq = IF_SETCLR | base->int_mask;
	return old & base->icr_mask;
}

/*
 *  Enable or disable CIA interrupts, return old interrupt mask,
 *  interrupts will only be enabled if a handler exists
 */

unsigned char cia_able_irq(struct ciabase *base, unsigned char mask)
{
	unsigned char old, tmp;
	int i;

	old = base->icr_mask;
	base->icr_data |= base->cia->icr;
	base->cia->icr = mask;
	if (mask & CIA_ICR_SETCLR)
		base->icr_mask |= mask;
	else
		base->icr_mask &= ~mask;
	base->icr_mask &= CIA_ICR_ALL;
	for (i = 0, tmp = 1; i < CIA_IRQS; i++, tmp <<= 1) {
		if ((tmp & base->icr_mask) && !base->irq_list[i].handler) {
			base->icr_mask &= ~tmp;
			base->cia->icr = tmp;
		}
	}
	if (base->icr_data & base->icr_mask)
		custom.intreq = IF_SETCLR | base->int_mask;
	return old;
}

int cia_request_irq(struct ciabase *base, unsigned int irq,
                    void (*handler)(int, void *, struct pt_regs *),
                    unsigned long flags, const char *devname, void *dev_id)
{
	unsigned char mask;

	base->irq_list[irq].handler = handler;
	base->irq_list[irq].flags   = flags;
	base->irq_list[irq].dev_id  = dev_id;
	base->irq_list[irq].devname = devname;

	/* enable the interrupt */
	mask = 1 << irq;
	cia_set_irq(base, mask);
	cia_able_irq(base, CIA_ICR_SETCLR | mask);
	return 0;
}

void cia_free_irq(struct ciabase *base, unsigned int irq, void *dev_id)
{
	if (base->irq_list[irq].dev_id != dev_id)
		printk("%s: removing probably wrong IRQ %i from %s\n",
		       __FUNCTION__, base->cia_irq + irq,
		       base->irq_list[irq].devname);

	base->irq_list[irq].handler = NULL;
	base->irq_list[irq].flags   = 0;

	cia_able_irq(base, 1 << irq);
}

static void cia_handler(int irq, void *dev_id, struct pt_regs *fp)
{
	struct ciabase *base = (struct ciabase *)dev_id;
	int mach_irq, i;
	unsigned char ints;

	mach_irq = base->cia_irq;
	irq = SYS_IRQS + mach_irq;
	ints = cia_set_irq(base, CIA_ICR_ALL);
	custom.intreq = base->int_mask;
	for (i = 0; i < CIA_IRQS; i++, irq++, mach_irq++) {
		if (ints & 1) {
			kstat.irqs[0][irq]++;
			base->irq_list[i].handler(mach_irq, base->irq_list[i].dev_id, fp);
		}
		ints >>= 1;
	}
	amiga_do_irq_list(base->server_irq, fp);
}

void __init cia_init_IRQ(struct ciabase *base)
{
	int i;

	/* init isr handlers */
	for (i = 0; i < CIA_IRQS; i++) {
		base->irq_list[i].handler = NULL;
		base->irq_list[i].flags   = 0;
	}

	/* clear any pending interrupt and turn off all interrupts */
	cia_set_irq(base, CIA_ICR_ALL);
	cia_able_irq(base, CIA_ICR_ALL);

	/* install CIA handler */
	request_irq(base->handler_irq, cia_handler, 0, base->name, base);

	custom.intena = IF_SETCLR | base->int_mask;
}

int cia_get_irq_list(struct ciabase *base, char *buf)
{
	int i, j, len = 0;

	j = base->cia_irq;
	for (i = 0; i < CIA_IRQS; i++) {
		len += sprintf(buf+len, "cia  %2d: %10d ", j + i,
			       kstat.irqs[0][SYS_IRQS + j + i]);
			len += sprintf(buf+len, "  ");
		len += sprintf(buf+len, "%s\n", base->irq_list[i].devname);
	}
	return len;
}
#include <linux/config.h>
#include <linux/module.h>
#include <linux/types.h>
#include <asm/ptrace.h>
#include <asm/amigahw.h>
#include <asm/amigaints.h>
#include <asm/amipcmcia.h>

extern volatile u_short amiga_audio_min_period;
extern u_short amiga_audio_period;

/*
 * Add things here when you find the need for it.
 */
EXPORT_SYMBOL(amiga_model);
EXPORT_SYMBOL(amiga_chipset);
EXPORT_SYMBOL(amiga_hw_present);
EXPORT_SYMBOL(amiga_eclock);
EXPORT_SYMBOL(amiga_colorclock);
EXPORT_SYMBOL(amiga_chip_alloc);
EXPORT_SYMBOL(amiga_chip_free);
EXPORT_SYMBOL(amiga_chip_avail);
EXPORT_SYMBOL(amiga_chip_size);
EXPORT_SYMBOL(amiga_audio_period);
EXPORT_SYMBOL(amiga_audio_min_period);
EXPORT_SYMBOL(amiga_do_irq);
EXPORT_SYMBOL(amiga_do_irq_list);

#ifdef CONFIG_AMIGA_PCMCIA
  EXPORT_SYMBOL(pcmcia_reset);
  EXPORT_SYMBOL(pcmcia_copy_tuple);
  EXPORT_SYMBOL(pcmcia_program_voltage);
  EXPORT_SYMBOL(pcmcia_access_speed);
  EXPORT_SYMBOL(pcmcia_write_enable);
  EXPORT_SYMBOL(pcmcia_write_disable);
#endif
/*
 *  linux/arch/m68k/amiga/config.c
 *
 *  Copyright (C) 1993 Hamish Macdonald
 *
 * This file is subject to the terms and conditions of the GNU General Public
 * License.  See the file COPYING in the main directory of this archive
 * for more details.
 */

/*
 * Miscellaneous Amiga stuff
 */

#include <linux/config.h>
#include <linux/types.h>
#include <linux/kernel.h>
#include <linux/mm.h>
#include <linux/tty.h>
#include <linux/console.h>
#include <linux/init.h>
#ifdef CONFIG_ZORRO
#include <linux/zorro.h>
#endif

#include <asm/bootinfo.h>
#include <asm/setup.h>
#include <asm/system.h>
#include <asm/pgtable.h>
#include <asm/amigahw.h>
#include <asm/amigaints.h>
#include <asm/irq.h>
#include <asm/rtc.h>
#include <asm/keyboard.h>
#include <asm/machdep.h>
#include <asm/io.h>

unsigned long amiga_model;
unsigned long amiga_eclock;
unsigned long amiga_masterclock;
unsigned long amiga_colorclock;
unsigned long amiga_chipset;
unsigned char amiga_vblank;
unsigned char amiga_psfreq;
struct amiga_hw_present amiga_hw_present;

static char s_a500[] __initdata = "A500";
static char s_a500p[] __initdata = "A500+";
static char s_a600[] __initdata = "A600";
static char s_a1000[] __initdata = "A1000";
static char s_a1200[] __initdata = "A1200";
static char s_a2000[] __initdata = "A2000";
static char s_a2500[] __initdata = "A2500";
static char s_a3000[] __initdata = "A3000";
static char s_a3000t[] __initdata = "A3000T";
static char s_a3000p[] __initdata = "A3000+";
static char s_a4000[] __initdata = "A4000";
static char s_a4000t[] __initdata = "A4000T";
static char s_cdtv[] __initdata = "CDTV";
static char s_cd32[] __initdata = "CD32";
static char s_draco[] __initdata = "Draco";
static char *amiga_models[] __initdata = {
    s_a500, s_a500p, s_a600, s_a1000, s_a1200, s_a2000, s_a2500, s_a3000,
    s_a3000t, s_a3000p, s_a4000, s_a4000t, s_cdtv, s_cd32, s_draco,
};

static char amiga_model_name[13] = "Amiga ";

extern char m68k_debug_device[];

static void amiga_sched_init(void (*handler)(int, void *, struct pt_regs *));
/* amiga specific keyboard functions */
extern int amiga_keyb_init(void);
extern int amiga_kbdrate (struct kbd_repeat *);
extern int amiga_kbd_translate(unsigned char keycode, unsigned char *keycodep,
			       char raw_mode);
/* amiga specific irq functions */
extern void amiga_init_IRQ (void);
extern void (*amiga_default_handler[]) (int, void *, struct pt_regs *);
extern int amiga_request_irq (unsigned int irq,
			      void (*handler)(int, void *, struct pt_regs *),
                              unsigned long flags, const char *devname,
			      void *dev_id);
extern void amiga_free_irq (unsigned int irq, void *dev_id);
extern void amiga_enable_irq (unsigned int);
extern void amiga_disable_irq (unsigned int);
static void amiga_get_model(char *model);
static int amiga_get_hardware_list(char *buffer);
extern int amiga_get_irq_list (char *);
/* amiga specific timer functions */
static unsigned long amiga_gettimeoffset (void);
static void a3000_gettod (int *, int *, int *, int *, int *, int *);
static void a2000_gettod (int *, int *, int *, int *, int *, int *);
static int amiga_hwclk (int, struct hwclk_time *);
static int amiga_set_clock_mmss (unsigned long);
extern void amiga_mksound( unsigned int count, unsigned int ticks );
#ifdef CONFIG_AMIGA_FLOPPY
extern void amiga_floppy_setup(char *, int *);
#endif
static void amiga_reset (void);
static int amiga_wait_key (struct console *co);
extern void amiga_init_sound(void);
static void amiga_savekmsg_init(void);
static void amiga_mem_console_write(struct console *co, const char *b,
				    unsigned int count);
void amiga_serial_console_write(struct console *co, const char *s,
				unsigned int count);
static void amiga_debug_init(void);
#ifdef CONFIG_HEARTBEAT
static void amiga_heartbeat(int on);
#endif

static struct console amiga_console_driver = {
	name:		"debug",
	wait_key:	amiga_wait_key,
	flags:		CON_PRINTBUFFER,
	index:		-1,
};

#ifdef CONFIG_MAGIC_SYSRQ
static char amiga_sysrq_xlate[128] =
	"\0001234567890-=\\\000\000"					/* 0x00 - 0x0f */
	"qwertyuiop[]\000123"							/* 0x10 - 0x1f */
	"asdfghjkl;'\000\000456"						/* 0x20 - 0x2f */
	"\000zxcvbnm,./\000+789"						/* 0x30 - 0x3f */
	" \177\t\r\r\000\177\000\000\000-\000\000\000\000\000"	/* 0x40 - 0x4f */
	"\000\201\202\203\204\205\206\207\210\211()/*+\000"	/* 0x50 - 0x5f */
	"\000\000\000\000\000\000\000\000\000\000\000\000\000\000\000\000"	/* 0x60 - 0x6f */
	"\000\000\000\000\000\000\000\000\000\000\000\000\000\000\000\000";	/* 0x70 - 0x7f */
#endif

extern void (*kd_mksound)(unsigned int, unsigned int);


    /*
     *  Motherboard Resources present in all Amiga models
     */

static struct {
    struct resource _ciab, _ciaa, _custom, _kickstart;
} mb_resources = {
    _ciab:	{ "CIA B", 0x00bfd000, 0x00bfdfff },
    _ciaa:	{ "CIA A", 0x00bfe000, 0x00bfefff },
    _custom:	{ "Custom I/O", 0x00dff000, 0x00dfffff },
    _kickstart:	{ "Kickstart ROM", 0x00f80000, 0x00ffffff }
};

static struct resource rtc_resource = {
    NULL, 0x00dc0000, 0x00dcffff
};

static struct resource ram_resource[NUM_MEMINFO];


    /*
     *  Parse an Amiga-specific record in the bootinfo
     */

int amiga_parse_bootinfo(const struct bi_record *record)
{
    int unknown = 0;
    const unsigned long *data = record->data;

    switch (record->tag) {
	case BI_AMIGA_MODEL:
	    amiga_model = *data;
	    break;

	case BI_AMIGA_ECLOCK:
	    amiga_eclock = *data;
	    break;

	case BI_AMIGA_CHIPSET:
	    amiga_chipset = *data;
	    break;

	case BI_AMIGA_CHIP_SIZE:
	    amiga_chip_size = *(const int *)data;
	    break;

	case BI_AMIGA_VBLANK:
	    amiga_vblank = *(const unsigned char *)data;
	    break;

	case BI_AMIGA_PSFREQ:
	    amiga_psfreq = *(const unsigned char *)data;
	    break;

	case BI_AMIGA_AUTOCON:
#ifdef CONFIG_ZORRO
	    if (zorro_num_autocon < ZORRO_NUM_AUTO) {
		const struct ConfigDev *cd = (struct ConfigDev *)data;
		struct zorro_dev *dev = &zorro_autocon[zorro_num_autocon++];
		dev->rom = cd->cd_Rom;
		dev->slotaddr = cd->cd_SlotAddr;
		dev->slotsize = cd->cd_SlotSize;
		dev->resource.start = (unsigned long)cd->cd_BoardAddr;
		dev->resource.end = dev->resource.start+cd->cd_BoardSize-1;
	    } else
		printk("amiga_parse_bootinfo: too many AutoConfig devices\n");
#endif /* CONFIG_ZORRO */
	    break;

	case BI_AMIGA_SERPER:
	    /* serial port period: ignored here */
	    break;

	default:
	    unknown = 1;
    }
    return(unknown);
}

    /*
     *  Identify builtin hardware
     */

static void __init amiga_identify(void)
{
  /* Fill in some default values, if necessary */
  if (amiga_eclock == 0)
    amiga_eclock = 709379;

  memset(&amiga_hw_present, 0, sizeof(amiga_hw_present));

  printk("Amiga hardware found: ");
  if (amiga_model >= AMI_500 && amiga_model <= AMI_DRACO) {
    printk("[%s] ", amiga_models[amiga_model-AMI_500]);
    strcat(amiga_model_name, amiga_models[amiga_model-AMI_500]);
  }

  switch(amiga_model) {
  case AMI_UNKNOWN:
    goto Generic;

  case AMI_600:
  case AMI_1200:
    AMIGAHW_SET(A1200_IDE);
    AMIGAHW_SET(PCMCIA);
  case AMI_500:
  case AMI_500PLUS:
  case AMI_1000:
  case AMI_2000:
  case AMI_2500:
    AMIGAHW_SET(A2000_CLK);	/* Is this correct for all models? */
    goto Generic;

  case AMI_3000:
  case AMI_3000T:
    AMIGAHW_SET(AMBER_FF);
    AMIGAHW_SET(MAGIC_REKICK);
    /* fall through */
  case AMI_3000PLUS:
    AMIGAHW_SET(A3000_SCSI);
    AMIGAHW_SET(A3000_CLK);
    AMIGAHW_SET(ZORRO3);
    goto Generic;

  case AMI_4000T:
    AMIGAHW_SET(A4000_SCSI);
    /* fall through */
  case AMI_4000:
    AMIGAHW_SET(A4000_IDE);
    AMIGAHW_SET(A3000_CLK);
    AMIGAHW_SET(ZORRO3);
    goto Generic;

  case AMI_CDTV:
  case AMI_CD32:
    AMIGAHW_SET(CD_ROM);
    AMIGAHW_SET(A2000_CLK);             /* Is this correct? */
    goto Generic;

  Generic:
    AMIGAHW_SET(AMI_VIDEO);
    AMIGAHW_SET(AMI_BLITTER);
    AMIGAHW_SET(AMI_AUDIO);
    AMIGAHW_SET(AMI_FLOPPY);
    AMIGAHW_SET(AMI_KEYBOARD);
    AMIGAHW_SET(AMI_MOUSE);
    AMIGAHW_SET(AMI_SERIAL);
    AMIGAHW_SET(AMI_PARALLEL);
    AMIGAHW_SET(CHIP_RAM);
    AMIGAHW_SET(PAULA);

    switch(amiga_chipset) {
    case CS_OCS:
    case CS_ECS:
    case CS_AGA:
      switch (custom.deniseid & 0xf) {
      case 0x0c:
	AMIGAHW_SET(DENISE_HR);
	break;
      case 0x08:
	AMIGAHW_SET(LISA);
	break;
      }
      break;
    default:
      AMIGAHW_SET(DENISE);
      break;
    }
    switch ((custom.vposr>>8) & 0x7f) {
    case 0x00:
      AMIGAHW_SET(AGNUS_PAL);
      break;
    case 0x10:
      AMIGAHW_SET(AGNUS_NTSC);
      break;
    case 0x20:
    case 0x21:
      AMIGAHW_SET(AGNUS_HR_PAL);
      break;
    case 0x30:
    case 0x31:
      AMIGAHW_SET(AGNUS_HR_NTSC);
      break;
    case 0x22:
    case 0x23:
      AMIGAHW_SET(ALICE_PAL);
      break;
    case 0x32:
    case 0x33:
      AMIGAHW_SET(ALICE_NTSC);
      break;
    }
    AMIGAHW_SET(ZORRO);
    break;

  case AMI_DRACO:
    panic("No support for Draco yet");
 
  default:
    panic("Unknown Amiga Model");
  }

#define AMIGAHW_ANNOUNCE(name, str)			\
  if (AMIGAHW_PRESENT(name))				\
    printk(str)

  AMIGAHW_ANNOUNCE(AMI_VIDEO, "VIDEO ");
  AMIGAHW_ANNOUNCE(AMI_BLITTER, "BLITTER ");
  AMIGAHW_ANNOUNCE(AMBER_FF, "AMBER_FF ");
  AMIGAHW_ANNOUNCE(AMI_AUDIO, "AUDIO ");
  AMIGAHW_ANNOUNCE(AMI_FLOPPY, "FLOPPY ");
  AMIGAHW_ANNOUNCE(A3000_SCSI, "A3000_SCSI ");
  AMIGAHW_ANNOUNCE(A4000_SCSI, "A4000_SCSI ");
  AMIGAHW_ANNOUNCE(A1200_IDE, "A1200_IDE ");
  AMIGAHW_ANNOUNCE(A4000_IDE, "A4000_IDE ");
  AMIGAHW_ANNOUNCE(CD_ROM, "CD_ROM ");
  AMIGAHW_ANNOUNCE(AMI_KEYBOARD, "KEYBOARD ");
  AMIGAHW_ANNOUNCE(AMI_MOUSE, "MOUSE ");
  AMIGAHW_ANNOUNCE(AMI_SERIAL, "SERIAL ");
  AMIGAHW_ANNOUNCE(AMI_PARALLEL, "PARALLEL ");
  AMIGAHW_ANNOUNCE(A2000_CLK, "A2000_CLK ");
  AMIGAHW_ANNOUNCE(A3000_CLK, "A3000_CLK ");
  AMIGAHW_ANNOUNCE(CHIP_RAM, "CHIP_RAM ");
  AMIGAHW_ANNOUNCE(PAULA, "PAULA ");
  AMIGAHW_ANNOUNCE(DENISE, "DENISE ");
  AMIGAHW_ANNOUNCE(DENISE_HR, "DENISE_HR ");
  AMIGAHW_ANNOUNCE(LISA, "LISA ");
  AMIGAHW_ANNOUNCE(AGNUS_PAL, "AGNUS_PAL ");
  AMIGAHW_ANNOUNCE(AGNUS_NTSC, "AGNUS_NTSC ");
  AMIGAHW_ANNOUNCE(AGNUS_HR_PAL, "AGNUS_HR_PAL ");
  AMIGAHW_ANNOUNCE(AGNUS_HR_NTSC, "AGNUS_HR_NTSC ");
  AMIGAHW_ANNOUNCE(ALICE_PAL, "ALICE_PAL ");
  AMIGAHW_ANNOUNCE(ALICE_NTSC, "ALICE_NTSC ");
  AMIGAHW_ANNOUNCE(MAGIC_REKICK, "MAGIC_REKICK ");
  AMIGAHW_ANNOUNCE(PCMCIA, "PCMCIA ");
  if (AMIGAHW_PRESENT(ZORRO))
    printk("ZORRO%s ", AMIGAHW_PRESENT(ZORRO3) ? "3" : "");
  printk("\n");

#undef AMIGAHW_ANNOUNCE
}

    /*
     *  Setup the Amiga configuration info
     */

void __init config_amiga(void)
{
  int i;

  amiga_debug_init();
  amiga_identify();

  /* Yuk, we don't have PCI memory */
  iomem_resource.name = "Memory";
  for (i = 0; i < 4; i++)
    request_resource(&iomem_resource, &((struct resource *)&mb_resources)[i]);

  mach_sched_init      = amiga_sched_init;
  mach_keyb_init       = amiga_keyb_init;
  mach_kbdrate         = amiga_kbdrate;
  mach_kbd_translate   = amiga_kbd_translate;
  SYSRQ_KEY            = 0xff;
  mach_init_IRQ        = amiga_init_IRQ;
  mach_default_handler = &amiga_default_handler;
  mach_request_irq     = amiga_request_irq;
  mach_free_irq        = amiga_free_irq;
  enable_irq           = amiga_enable_irq;
  disable_irq          = amiga_disable_irq;
  mach_get_model       = amiga_get_model;
  mach_get_hardware_list = amiga_get_hardware_list;
  mach_get_irq_list    = amiga_get_irq_list;
  mach_gettimeoffset   = amiga_gettimeoffset;
  if (AMIGAHW_PRESENT(A3000_CLK)){
    mach_gettod  = a3000_gettod;
    rtc_resource.name = "A3000 RTC";
    request_resource(&iomem_resource, &rtc_resource);
  }
  else{ /* if (AMIGAHW_PRESENT(A2000_CLK)) */
    mach_gettod  = a2000_gettod;
    rtc_resource.name = "A2000 RTC";
    request_resource(&iomem_resource, &rtc_resource);
  }

  mach_max_dma_address = 0xffffffff; /*
				      * default MAX_DMA=0xffffffff
				      * on all machines. If we don't
				      * do so, the SCSI code will not
				      * be able to allocate any mem
				      * for transfers, unless we are
				      * dealing with a Z2 mem only
				      * system.                  /Jes
				      */

  mach_hwclk           = amiga_hwclk;
  mach_set_clock_mmss  = amiga_set_clock_mmss;
#ifdef CONFIG_AMIGA_FLOPPY
  mach_floppy_setup    = amiga_floppy_setup;
#endif
  mach_reset           = amiga_reset;
#ifdef CONFIG_DUMMY_CONSOLE
  conswitchp           = &dummy_con;
#endif
  kd_mksound           = amiga_mksound;
#ifdef CONFIG_MAGIC_SYSRQ
  mach_sysrq_key = 0x5f;	     /* HELP */
  mach_sysrq_shift_state = 0x03; /* SHIFT+ALTGR */
  mach_sysrq_shift_mask = 0xff;  /* all modifiers except CapsLock */
  mach_sysrq_xlate = amiga_sysrq_xlate;
#endif
#ifdef CONFIG_HEARTBEAT
  mach_heartbeat = amiga_heartbeat;
#endif

  /* Fill in the clock values (based on the 700 kHz E-Clock) */
  amiga_masterclock = 40*amiga_eclock;	/* 28 MHz */
  amiga_colorclock = 5*amiga_eclock;	/* 3.5 MHz */

  /* clear all DMA bits */
  custom.dmacon = DMAF_ALL;
  /* ensure that the DMA master bit is set */
  custom.dmacon = DMAF_SETCLR | DMAF_MASTER;

  /* don't use Z2 RAM as system memory on Z3 capable machines */
  if (AMIGAHW_PRESENT(ZORRO3)) {
    int i, j;
    u32 disabled_z2mem = 0;
    for (i = 0; i < m68k_num_memory; i++)
      if (m68k_memory[i].addr < 16*1024*1024) {
	if (i == 0) {
	  /* don't cut off the branch we're sitting on */
	  printk("Warning: kernel runs in Zorro II memory\n");
	  continue;
	}
	disabled_z2mem += m68k_memory[i].size;
	m68k_num_memory--;
	for (j = i; j < m68k_num_memory; j++)
	  m68k_memory[j] = m68k_memory[j+1];
	i--;
      }
    if (disabled_z2mem)
      printk("%dK of Zorro II memory will not be used as system memory\n",
	     disabled_z2mem>>10);
  }

  /* request all RAM */
  for (i = 0; i < m68k_num_memory; i++) {
    ram_resource[i].name =
      (m68k_memory[i].addr >= 0x01000000) ? "32-bit Fast RAM" :
      (m68k_memory[i].addr < 0x00c00000) ? "16-bit Fast RAM" :
      "16-bit Slow RAM";
    ram_resource[i].start = m68k_memory[i].addr;
    ram_resource[i].end = m68k_memory[i].addr+m68k_memory[i].size-1;
    request_resource(&iomem_resource, &ram_resource[i]);
  }

  /* initialize chipram allocator */
  amiga_chip_init ();

  /* debugging using chipram */
  if (!strcmp( m68k_debug_device, "mem" )){
	  if (!AMIGAHW_PRESENT(CHIP_RAM))
		  printk("Warning: no chipram present for debugging\n");
	  else {
		  amiga_savekmsg_init();
		  amiga_console_driver.write = amiga_mem_console_write;
		  register_console(&amiga_console_driver);
	  }
  }

  /* our beloved beeper */
  if (AMIGAHW_PRESENT(AMI_AUDIO))
	  amiga_init_sound();

  /*
   * if it is an A3000, set the magic bit that forces
   * a hard rekick
   */
  if (AMIGAHW_PRESENT(MAGIC_REKICK))
	  *(unsigned char *)ZTWO_VADDR(0xde0002) |= 0x80;
}

static unsigned short jiffy_ticks;

static void __init amiga_sched_init(void (*timer_routine)(int, void *,
							  struct pt_regs *))
{
	static struct resource sched_res = {
	    "timer", 0x00bfd400, 0x00bfd5ff,
	};
	jiffy_ticks = (amiga_eclock+HZ/2)/HZ;

	if (request_resource(&mb_resources._ciab, &sched_res))
	    printk("Cannot allocate ciab.ta{lo,hi}\n");
	ciab.cra &= 0xC0;   /* turn off timer A, continuous mode, from Eclk */
	ciab.talo = jiffy_ticks % 256;
	ciab.tahi = jiffy_ticks / 256;

	/* install interrupt service routine for CIAB Timer A
	 *
	 * Please don't change this to use ciaa, as it interferes with the
	 * SCSI code. We'll have to take a look at this later
	 */
	request_irq(IRQ_AMIGA_CIAB_TA, timer_routine, 0, "timer", NULL);
	/* start timer */
	ciab.cra |= 0x11;
}

#define TICK_SIZE 10000

/* This is always executed with interrupts disabled.  */
static unsigned long amiga_gettimeoffset (void)
{
	unsigned short hi, lo, hi2;
	unsigned long ticks, offset = 0;

	/* read CIA B timer A current value */
	hi  = ciab.tahi;
	lo  = ciab.talo;
	hi2 = ciab.tahi;

	if (hi != hi2) {
		lo = ciab.talo;
		hi = hi2;
	}

	ticks = hi << 8 | lo;

	if (ticks > jiffy_ticks / 2)
		/* check for pending interrupt */
		if (cia_set_irq(&ciab_base, 0) & CIA_ICR_TA)
			offset = 10000;

	ticks = jiffy_ticks - ticks;
	ticks = (10000 * ticks) / jiffy_ticks;

	return ticks + offset;
}

static void a3000_gettod (int *yearp, int *monp, int *dayp,
			  int *hourp, int *minp, int *secp)
{
	volatile struct tod3000 *tod = TOD_3000;

	tod->cntrl1 = TOD3000_CNTRL1_HOLD;

	*secp  = tod->second1 * 10 + tod->second2;
	*minp  = tod->minute1 * 10 + tod->minute2;
	*hourp = tod->hour1   * 10 + tod->hour2;
	*dayp  = tod->day1    * 10 + tod->day2;
	*monp  = tod->month1  * 10 + tod->month2;
	*yearp = tod->year1   * 10 + tod->year2;

	tod->cntrl1 = TOD3000_CNTRL1_FREE;
}

static void a2000_gettod (int *yearp, int *monp, int *dayp,
			  int *hourp, int *minp, int *secp)
{
	volatile struct tod2000 *tod = TOD_2000;

	tod->cntrl1 = TOD2000_CNTRL1_HOLD;

	while (tod->cntrl1 & TOD2000_CNTRL1_BUSY)
		;

	*secp  = tod->second1     * 10 + tod->second2;
	*minp  = tod->minute1     * 10 + tod->minute2;
	*hourp = (tod->hour1 & 3) * 10 + tod->hour2;
	*dayp  = tod->day1        * 10 + tod->day2;
	*monp  = tod->month1      * 10 + tod->month2;
	*yearp = tod->year1       * 10 + tod->year2;

	if (!(tod->cntrl3 & TOD2000_CNTRL3_24HMODE)){
		if (!(tod->hour1 & TOD2000_HOUR1_PM) && *hourp == 12)
			*hourp = 0;
		else if ((tod->hour1 & TOD2000_HOUR1_PM) && *hourp != 12)
			*hourp += 12;
	}

	tod->cntrl1 &= ~TOD2000_CNTRL1_HOLD;
}

static int amiga_hwclk(int op, struct hwclk_time *t)
{
	if (AMIGAHW_PRESENT(A3000_CLK)) {
		volatile struct tod3000 *tod = TOD_3000;

		tod->cntrl1 = TOD3000_CNTRL1_HOLD;

		if (!op) { /* read */
			t->sec  = tod->second1 * 10 + tod->second2;
			t->min  = tod->minute1 * 10 + tod->minute2;
			t->hour = tod->hour1   * 10 + tod->hour2;
			t->day  = tod->day1    * 10 + tod->day2;
			t->wday = tod->weekday;
			t->mon  = tod->month1  * 10 + tod->month2 - 1;
			t->year = tod->year1   * 10 + tod->year2;
			if (t->year <= 69)
				t->year += 100;
		} else {
			tod->second1 = t->sec / 10;
			tod->second2 = t->sec % 10;
			tod->minute1 = t->min / 10;
			tod->minute2 = t->min % 10;
			tod->hour1   = t->hour / 10;
			tod->hour2   = t->hour % 10;
			tod->day1    = t->day / 10;
			tod->day2    = t->day % 10;
			if (t->wday != -1)
				tod->weekday = t->wday;
			tod->month1  = (t->mon + 1) / 10;
			tod->month2  = (t->mon + 1) % 10;
			if (t->year >= 100)
				t->year -= 100;
			tod->year1   = t->year / 10;
			tod->year2   = t->year % 10;
		}

		tod->cntrl1 = TOD3000_CNTRL1_FREE;
	} else /* if (AMIGAHW_PRESENT(A2000_CLK)) */ {
		volatile struct tod2000 *tod = TOD_2000;

		tod->cntrl1 = TOD2000_CNTRL1_HOLD;
	    
		while (tod->cntrl1 & TOD2000_CNTRL1_BUSY)
			;

		if (!op) { /* read */
			t->sec  = tod->second1     * 10 + tod->second2;
			t->min  = tod->minute1     * 10 + tod->minute2;
			t->hour = (tod->hour1 & 3) * 10 + tod->hour2;
			t->day  = tod->day1        * 10 + tod->day2;
			t->wday = tod->weekday;
			t->mon  = tod->month1      * 10 + tod->month2 - 1;
			t->year = tod->year1       * 10 + tod->year2;
			if (t->year <= 69)
				t->year += 100;

			if (!(tod->cntrl3 & TOD2000_CNTRL3_24HMODE)){
				if (!(tod->hour1 & TOD2000_HOUR1_PM) && t->hour == 12)
					t->hour = 0;
				else if ((tod->hour1 & TOD2000_HOUR1_PM) && t->hour != 12)
					t->hour += 12;
			}
		} else {
			tod->second1 = t->sec / 10;
			tod->second2 = t->sec % 10;
			tod->minute1 = t->min / 10;
			tod->minute2 = t->min % 10;
			if (tod->cntrl3 & TOD2000_CNTRL3_24HMODE)
				tod->hour1 = t->hour / 10;
			else if (t->hour >= 12)
				tod->hour1 = TOD2000_HOUR1_PM +
					(t->hour - 12) / 10;
			else
				tod->hour1 = t->hour / 10;
			tod->hour2   = t->hour % 10;
			tod->day1    = t->day / 10;
			tod->day2    = t->day % 10;
			if (t->wday != -1)
				tod->weekday = t->wday;
			tod->month1  = (t->mon + 1) / 10;
			tod->month2  = (t->mon + 1) % 10;
			if (t->year >= 100)
				t->year -= 100;
			tod->year1   = t->year / 10;
			tod->year2   = t->year % 10;
		}

		tod->cntrl1 &= ~TOD2000_CNTRL1_HOLD;
	}

	return 0;
}

static int amiga_set_clock_mmss (unsigned long nowtime)
{
	short real_seconds = nowtime % 60, real_minutes = (nowtime / 60) % 60;

	if (AMIGAHW_PRESENT(A3000_CLK)) {
		volatile struct tod3000 *tod = TOD_3000;

		tod->cntrl1 = TOD3000_CNTRL1_HOLD;

		tod->second1 = real_seconds / 10;
		tod->second2 = real_seconds % 10;
		tod->minute1 = real_minutes / 10;
		tod->minute2 = real_minutes % 10;
		
		tod->cntrl1 = TOD3000_CNTRL1_FREE;
	} else /* if (AMIGAHW_PRESENT(A2000_CLK)) */ {
		volatile struct tod2000 *tod = TOD_2000;

		tod->cntrl1 = TOD2000_CNTRL1_HOLD;
	    
		while (tod->cntrl1 & TOD2000_CNTRL1_BUSY)
			;

		tod->second1 = real_seconds / 10;
		tod->second2 = real_seconds % 10;
		tod->minute1 = real_minutes / 10;
		tod->minute2 = real_minutes % 10;

		tod->cntrl1 &= ~TOD2000_CNTRL1_HOLD;
	}

	return 0;
}

static int amiga_wait_key (struct console *co)
{
    int i;

    while (1) {
	while (ciaa.pra & 0x40);

	/* debounce */
	for (i = 0; i < 1000; i++);

	if (!(ciaa.pra & 0x40))
	    break;
    }

    /* wait for button up */
    while (1) {
	while (!(ciaa.pra & 0x40));

	/* debounce */
	for (i = 0; i < 1000; i++);

	if (ciaa.pra & 0x40)
	    break;
    }
    return 0;
}

static NORET_TYPE void amiga_reset( void )
    ATTRIB_NORET;

static void amiga_reset (void)
{
  unsigned long jmp_addr040 = virt_to_phys(&&jmp_addr_label040);
  unsigned long jmp_addr = virt_to_phys(&&jmp_addr_label);

  cli();
  if (CPU_IS_040_OR_060)
    /* Setup transparent translation registers for mapping
     * of 16 MB kernel segment before disabling translation
     */
    __asm__ __volatile__
      ("movel    %0,%/d0\n\t"
       "andl     #0xff000000,%/d0\n\t"
       "orw      #0xe020,%/d0\n\t"   /* map 16 MB, enable, cacheable */
       ".chip    68040\n\t"
       "movec    %%d0,%%itt0\n\t"
       "movec    %%d0,%%dtt0\n\t"
       ".chip    68k\n\t"
       "jmp      %0@\n\t"
       : /* no outputs */
       : "a" (jmp_addr040));
  else
    /* for 680[23]0, just disable translation and jump to the physical
     * address of the label
     */
    __asm__ __volatile__
      ("pmove  %/tc,%@\n\t"
       "bclr   #7,%@\n\t"
       "pmove  %@,%/tc\n\t"
       "jmp    %0@\n\t"
       : /* no outputs */
       : "a" (jmp_addr));
 jmp_addr_label040:
  /* disable translation on '040 now */
  __asm__ __volatile__    
    ("moveq #0,%/d0\n\t"
     ".chip 68040\n\t"
     "movec %%d0,%%tc\n\t"	/* disable MMU */
     ".chip 68k\n\t"
     : /* no outputs */
     : /* no inputs */
     : "d0");

 jmp_addr_label:
  /* pickup reset address from AmigaOS ROM, reset devices and jump
   * to reset address
   */
  __asm__ __volatile__
    ("movew #0x2700,%/sr\n\t"
     "leal  0x01000000,%/a0\n\t"
     "subl  %/a0@(-0x14),%/a0\n\t"
     "movel %/a0@(4),%/a0\n\t"
     "subql #2,%/a0\n\t"
     "bra   1f\n\t"
     /* align on a longword boundary */
     __ALIGN_STR "\n"
     "1:\n\t"
     "reset\n\t"
     "jmp   %/a0@" : /* Just that gcc scans it for % escapes */ );
  
  for (;;);

}


    /*
     *  Debugging
     */

#define SAVEKMSG_MAXMEM		128*1024

#define SAVEKMSG_MAGIC1		0x53415645	/* 'SAVE' */
#define SAVEKMSG_MAGIC2		0x4B4D5347	/* 'KMSG' */

struct savekmsg {
    unsigned long magic1;		/* SAVEKMSG_MAGIC1 */
    unsigned long magic2;		/* SAVEKMSG_MAGIC2 */
    unsigned long magicptr;		/* address of magic1 */
    unsigned long size;
    char data[0];
};

static struct savekmsg *savekmsg = NULL;

static void amiga_mem_console_write(struct console *co, const char *s,
				    unsigned int count)
{
    if (savekmsg->size+count <= SAVEKMSG_MAXMEM-sizeof(struct savekmsg)) {
        memcpy(savekmsg->data+savekmsg->size, s, count);
        savekmsg->size += count;
    }
}

static void amiga_savekmsg_init(void)
{
    static struct resource debug_res = { "Debug" };

    savekmsg = amiga_chip_alloc_res(SAVEKMSG_MAXMEM, &debug_res);
    savekmsg->magic1 = SAVEKMSG_MAGIC1;
    savekmsg->magic2 = SAVEKMSG_MAGIC2;
    savekmsg->magicptr = virt_to_phys(savekmsg);
    savekmsg->size = 0;
}

static void amiga_serial_putc(char c)
{
    custom.serdat = (unsigned char)c | 0x100;
    while (!(custom.serdatr & 0x2000))
	;
}

void amiga_serial_console_write(struct console *co, const char *s,
				       unsigned int count)
{
    while (count--) {
	if (*s == '\n')
	    amiga_serial_putc('\r');
	amiga_serial_putc(*s++);
    }
}

#ifdef CONFIG_SERIAL_CONSOLE
void amiga_serial_puts(const char *s)
{
    amiga_serial_console_write(NULL, s, strlen(s));
}

int amiga_serial_console_wait_key(struct console *co)
{
    int ch;

    while (!(custom.intreqr & IF_RBF))
	barrier();
    ch = custom.serdatr & 0xff;
    /* clear the interrupt, so that another character can be read */
    custom.intreq = IF_RBF;
    return ch;
}

void amiga_serial_gets(struct console *co, char *s, int len)
{
    int ch, cnt = 0;

    while (1) {
	ch = amiga_serial_console_wait_key(co);

	/* Check for backspace. */
	if (ch == 8 || ch == 127) {
	    if (cnt == 0) {
		amiga_serial_putc('\007');
		continue;
	    }
	    cnt--;
	    amiga_serial_puts("\010 \010");
	    continue;
	}

	/* Check for enter. */
	if (ch == 10 || ch == 13)
	    break;

	/* See if line is too long. */
	if (cnt >= len + 1) {
	    amiga_serial_putc(7);
	    cnt--;
	    continue;
	}

	/* Store and echo character. */
	s[cnt++] = ch;
	amiga_serial_putc(ch);
    }
    /* Print enter. */
    amiga_serial_puts("\r\n");
    s[cnt] = 0;
}
#endif

static void __init amiga_debug_init(void)
{
	if (!strcmp( m68k_debug_device, "ser" )) {
		/* no initialization required (?) */
		amiga_console_driver.write = amiga_serial_console_write;
		register_console(&amiga_console_driver);
	}
}

#ifdef CONFIG_HEARTBEAT
static void amiga_heartbeat(int on)
{
    if (on)
	ciaa.pra &= ~2;
    else
	ciaa.pra |= 2;
}
#endif

    /*
     *  Amiga specific parts of /proc
     */

static void amiga_get_model(char *model)
{
    strcpy(model, amiga_model_name);
}


static int amiga_get_hardware_list(char *buffer)
{
    int len = 0;

    if (AMIGAHW_PRESENT(CHIP_RAM))
	len += sprintf(buffer+len, "Chip RAM:\t%ldK\n", amiga_chip_size>>10);
    len += sprintf(buffer+len, "PS Freq:\t%dHz\nEClock Freq:\t%ldHz\n",
		   amiga_psfreq, amiga_eclock);
    if (AMIGAHW_PRESENT(AMI_VIDEO)) {
	char *type;
	switch(amiga_chipset) {
	    case CS_OCS:
		type = "OCS";
		break;
	    case CS_ECS:
		type = "ECS";
		break;
	    case CS_AGA:
		type = "AGA";
		break;
	    default:
		type = "Old or Unknown";
		break;
	}
	len += sprintf(buffer+len, "Graphics:\t%s\n", type);
    }

#define AMIGAHW_ANNOUNCE(name, str)			\
    if (AMIGAHW_PRESENT(name))				\
	len += sprintf (buffer+len, "\t%s\n", str)

    len += sprintf (buffer + len, "Detected hardware:\n");

    AMIGAHW_ANNOUNCE(AMI_VIDEO, "Amiga Video");
    AMIGAHW_ANNOUNCE(AMI_BLITTER, "Blitter");
    AMIGAHW_ANNOUNCE(AMBER_FF, "Amber Flicker Fixer");
    AMIGAHW_ANNOUNCE(AMI_AUDIO, "Amiga Audio");
    AMIGAHW_ANNOUNCE(AMI_FLOPPY, "Floppy Controller");
    AMIGAHW_ANNOUNCE(A3000_SCSI, "SCSI Controller WD33C93 (A3000 style)");
    AMIGAHW_ANNOUNCE(A4000_SCSI, "SCSI Controller NCR53C710 (A4000T style)");
    AMIGAHW_ANNOUNCE(A1200_IDE, "IDE Interface (A1200 style)");
    AMIGAHW_ANNOUNCE(A4000_IDE, "IDE Interface (A4000 style)");
    AMIGAHW_ANNOUNCE(CD_ROM, "Internal CD ROM drive");
    AMIGAHW_ANNOUNCE(AMI_KEYBOARD, "Keyboard");
    AMIGAHW_ANNOUNCE(AMI_MOUSE, "Mouse Port");
    AMIGAHW_ANNOUNCE(AMI_SERIAL, "Serial Port");
    AMIGAHW_ANNOUNCE(AMI_PARALLEL, "Parallel Port");
    AMIGAHW_ANNOUNCE(A2000_CLK, "Hardware Clock (A2000 style)");
    AMIGAHW_ANNOUNCE(A3000_CLK, "Hardware Clock (A3000 style)");
    AMIGAHW_ANNOUNCE(CHIP_RAM, "Chip RAM");
    AMIGAHW_ANNOUNCE(PAULA, "Paula 8364");
    AMIGAHW_ANNOUNCE(DENISE, "Denise 8362");
    AMIGAHW_ANNOUNCE(DENISE_HR, "Denise 8373");
    AMIGAHW_ANNOUNCE(LISA, "Lisa 8375");
    AMIGAHW_ANNOUNCE(AGNUS_PAL, "Normal/Fat PAL Agnus 8367/8371");
    AMIGAHW_ANNOUNCE(AGNUS_NTSC, "Normal/Fat NTSC Agnus 8361/8370");
    AMIGAHW_ANNOUNCE(AGNUS_HR_PAL, "Fat Hires PAL Agnus 8372");
    AMIGAHW_ANNOUNCE(AGNUS_HR_NTSC, "Fat Hires NTSC Agnus 8372");
    AMIGAHW_ANNOUNCE(ALICE_PAL, "PAL Alice 8374");
    AMIGAHW_ANNOUNCE(ALICE_NTSC, "NTSC Alice 8374");
    AMIGAHW_ANNOUNCE(MAGIC_REKICK, "Magic Hard Rekick");
    AMIGAHW_ANNOUNCE(PCMCIA, "PCMCIA Slot");
#ifdef CONFIG_ZORRO
    if (AMIGAHW_PRESENT(ZORRO))
	len += sprintf(buffer+len, "\tZorro II%s AutoConfig: %d Expansion "
				   "Device%s\n",
		       AMIGAHW_PRESENT(ZORRO3) ? "I" : "",
		       zorro_num_autocon, zorro_num_autocon == 1 ? "" : "s");
#endif /* CONFIG_ZORRO */

#undef AMIGAHW_ANNOUNCE

    return(len);
}
/*
 * linux/arch/m68k/amiga/amisound.c
 *
 * amiga sound driver for Linux/m68k
 *
 * This file is subject to the terms and conditions of the GNU General Public
 * License.  See the file COPYING in the main directory of this archive
 * for more details.
 */

#include <linux/config.h>
#include <linux/sched.h>
#include <linux/timer.h>
#include <linux/init.h>

#include <asm/system.h>
#include <asm/amigahw.h>

static unsigned short *snd_data = NULL;
static const signed char sine_data[] = {
	0,  39,  75,  103,  121,  127,  121,  103,  75,  39,
	0, -39, -75, -103, -121, -127, -121, -103, -75, -39
};
#define DATA_SIZE	(sizeof(sine_data)/sizeof(sine_data[0]))

    /*
     * The minimum period for audio may be modified by the frame buffer
     * device since it depends on htotal (for OCS/ECS/AGA)
     */

volatile unsigned short amiga_audio_min_period = 124; /* Default for pre-OCS */

#define MAX_PERIOD	(65535)


    /*
     *	Current period (set by dmasound.c)
     */

unsigned short amiga_audio_period = MAX_PERIOD;

static unsigned long clock_constant;

void __init amiga_init_sound(void)
{
	static struct resource beep_res = { "Beep" };

	snd_data = amiga_chip_alloc_res(sizeof(sine_data), &beep_res);
	if (!snd_data) {
		printk (KERN_CRIT "amiga init_sound: failed to allocate chipmem\n");
		return;
	}
	memcpy (snd_data, sine_data, sizeof(sine_data));

	/* setup divisor */
	clock_constant = (amiga_colorclock+DATA_SIZE/2)/DATA_SIZE;

	/* without amifb, turn video off and enable high quality sound */
#ifndef CONFIG_FB_AMIGA
	amifb_video_off();
#endif
}

static void nosound( unsigned long ignored );
static struct timer_list sound_timer = { function: nosound };

void amiga_mksound( unsigned int hz, unsigned int ticks )
{
	unsigned long flags;

	if (!snd_data)
		return;

	save_flags(flags);
	cli();
	del_timer( &sound_timer );

	if (hz > 20 && hz < 32767) {
		unsigned long period = (clock_constant / hz);

		if (period < amiga_audio_min_period)
			period = amiga_audio_min_period;
		if (period > MAX_PERIOD)
			period = MAX_PERIOD;

		/* setup pointer to data, period, length and volume */
		custom.aud[2].audlc = snd_data;
		custom.aud[2].audlen = sizeof(sine_data)/2;
		custom.aud[2].audper = (unsigned short)period;
		custom.aud[2].audvol = 32; /* 50% of maxvol */
	
		if (ticks) {
			sound_timer.expires = jiffies + ticks;
			add_timer( &sound_timer );
		}

		/* turn on DMA for audio channel 2 */
		custom.dmacon = DMAF_SETCLR | DMAF_AUD2;

	} else
		nosound( 0 );

	restore_flags(flags);
}


static void nosound( unsigned long ignored )
{
	/* turn off DMA for audio channel 2 */
	custom.dmacon = DMAF_AUD2;
	/* restore period to previous value after beeping */
	custom.aud[2].audper = amiga_audio_period;
}
/*
**  linux/amiga/chipram.c
**
**      Modified 03-May-94 by Geert Uytterhoeven <geert@linux-m68k.org>
**          - 64-bit aligned allocations for full AGA compatibility
**
**	Rewritten 15/9/2000 by Geert to use resource management
*/

#include <linux/config.h>
#include <linux/types.h>
#include <linux/kernel.h>
#include <linux/init.h>
#include <linux/ioport.h>
#include <linux/slab.h>
#include <asm/amigahw.h>

unsigned long amiga_chip_size;

static struct resource chipram_res = { "Chip RAM", CHIP_PHYSADDR };
static unsigned long chipavail;


void __init amiga_chip_init(void)
{
    if (!AMIGAHW_PRESENT(CHIP_RAM))
	return;

#ifndef CONFIG_APUS_FAST_EXCEPT
    /*
     *  Remove the first 4 pages where PPC exception handlers will be located
     */
    amiga_chip_size -= 0x4000;
#endif
    chipram_res.end = amiga_chip_size-1;
    request_resource(&iomem_resource, &chipram_res);

    chipavail = amiga_chip_size;
}

    
void *amiga_chip_alloc(unsigned long size, const char *name)
{
    struct resource *res;

    /* round up */
    size = PAGE_ALIGN(size);

#ifdef DEBUG
    printk("amiga_chip_alloc: allocate %ld bytes\n", size);
#endif
    res = kmalloc(sizeof(struct resource), GFP_KERNEL);
    if (!res)
	return NULL;
    memset(res, 0, sizeof(struct resource));
    res->name = name;

    if (allocate_resource(&chipram_res, res, size, 0, UINT_MAX, PAGE_SIZE, NULL, NULL) < 0) {
	kfree(res);
	return NULL;
    }
    chipavail -= size;
#ifdef DEBUG
    printk("amiga_chip_alloc: returning %lx\n", res->start);
#endif
    return (void *)ZTWO_VADDR(res->start);
}


    /*
     *  Warning:
     *  amiga_chip_alloc_res is meant only for drivers that need to allocate
     *  Chip RAM before kmalloc() is functional. As a consequence, those
     *  drivers must not free that Chip RAM afterwards.
     */

void * __init amiga_chip_alloc_res(unsigned long size, struct resource *res)
{
    unsigned long start;

    /* round up */
    size = PAGE_ALIGN(size);
    /* dmesg into chipmem prefers memory at the safe end */
    start = CHIP_PHYSADDR + chipavail - size;

#ifdef DEBUG
    printk("amiga_chip_alloc_res: allocate %ld bytes\n", size);
#endif
    if (allocate_resource(&chipram_res, res, size, start, UINT_MAX, PAGE_SIZE, NULL, NULL) < 0) {
	printk("amiga_chip_alloc_res: first alloc failed!\n");
	if (allocate_resource(&chipram_res, res, size, 0, UINT_MAX, PAGE_SIZE, NULL, NULL) < 0)
	    return NULL;
    }
    chipavail -= size;
#ifdef DEBUG
    printk("amiga_chip_alloc_res: returning %lx\n", res->start);
#endif
    return (void *)ZTWO_VADDR(res->start);
}

void amiga_chip_free(void *ptr)
{
    unsigned long start = ZTWO_PADDR(ptr);
    struct resource **p, *res;
    unsigned long size;

    for (p = &chipram_res.child; (res = *p); p = &res->sibling) {
	if (res->start != start)
	    continue;
	*p = res->sibling;
	size = res->end-start;
#ifdef DEBUG
	printk("amiga_chip_free: free %ld bytes at %p\n", size, ptr);
#endif
	chipavail += size;
	kfree(res);
	return;
    }
    printk("amiga_chip_free: trying to free nonexistent region at %p\n", ptr);
}


unsigned long amiga_chip_avail(void)
{
#ifdef DEBUG
	printk("amiga_chip_avail : %ld bytes\n", chipavail);
#endif
	return chipavail;
}
/*
** asm-m68k/pcmcia.c -- Amiga Linux PCMCIA support
**                      most information was found by disassembling card.resource
**                      I'm still looking for an official doc !
**
** Copyright 1997 by Alain Malek
**
** This file is subject to the terms and conditions of the GNU General Public
** License.  See the file COPYING in the main directory of this archive
** for more details.
**
** Created: 12/10/97 by Alain Malek
*/

#include <linux/types.h>
#include <linux/sched.h>
#include <linux/timer.h>
#include <asm/amigayle.h>
#include <asm/amipcmcia.h>

/* gayle config byte for program voltage and access speed */
static unsigned char cfg_byte = GAYLE_CFG_0V|GAYLE_CFG_150NS;

void pcmcia_reset(void)
{
	unsigned long reset_start_time = jiffies;
	unsigned char b;

	gayle_reset = 0x00;
	while (time_before(jiffies, reset_start_time + 1*HZ/100));
	b = gayle_reset;
}


/* copy a tuple, including tuple header. return nb bytes copied */
/* be carefull as this may trigger a GAYLE_IRQ_WR interrupt ! */

int pcmcia_copy_tuple(unsigned char tuple_id, void *tuple, int max_len)
{
	unsigned char id, *dest;
	int cnt, pos, len;

	dest = tuple;
	pos = 0;

	id = gayle_attribute[pos];

	while((id != CISTPL_END) && (pos < 0x10000)) {
		len = (int)gayle_attribute[pos+2] + 2;
		if (id == tuple_id) {
			len = (len > max_len)?max_len:len;
			for (cnt = 0; cnt < len; cnt++) {
				*dest++ = gayle_attribute[pos+(cnt<<1)];
			}

			return len;
		}
		pos += len<<1;
		id = gayle_attribute[pos];
	}

	return 0;
}

void pcmcia_program_voltage(int voltage)
{
	unsigned char v;

	switch (voltage) {
	case PCMCIA_0V:
		v = GAYLE_CFG_0V;
		break;
	case PCMCIA_5V:
		v = GAYLE_CFG_5V;
		break;
	case PCMCIA_12V:
		v = GAYLE_CFG_12V;
		break;
	default:
		v = GAYLE_CFG_0V;
	}

	cfg_byte = (cfg_byte & 0xfc) | v;
	gayle.config = cfg_byte;

}

void pcmcia_access_speed(int speed)
{
	unsigned char s;

	if (speed <= PCMCIA_SPEED_100NS)
		s = GAYLE_CFG_100NS;
	else if (speed <= PCMCIA_SPEED_150NS)
		s = GAYLE_CFG_150NS;
	else if (speed <= PCMCIA_SPEED_250NS)
		s = GAYLE_CFG_250NS;
	else
		s = GAYLE_CFG_720NS;

	cfg_byte = (cfg_byte & 0xf3) | s;
	gayle.config = cfg_byte;
}

void pcmcia_write_enable(void)
{
	gayle.cardstatus = GAYLE_CS_WR|GAYLE_CS_DA;
}

void pcmcia_write_disable(void)
{
	gayle.cardstatus = 0;
}
#
# Makefile for Linux arch/m68k/atari source directory
#
# Note! Dependencies are done automagically by 'make dep', which also
# removes any old dependencies. DON'T put your own dependencies here
# unless it's something special (ie not a .c file).
#
# Note 2! The CFLAGS definitions are now in the main makefile...

O_TARGET := atari.o

export-objs	:= atari_ksyms.o

obj-y		:= config.o time.o debug.o atakeyb.o ataints.o stdma.o \
			atasound.o joystick.o stram.o atari_ksyms.o

ifdef CONFIG_PCI
obj-$(CONFIG_HADES)	+= hades-pci.o
endif

include $(TOPDIR)/Rules.make
#include <linux/module.h>

#include <asm/ptrace.h>
#include <asm/traps.h>
#include <asm/atarihw.h>
#include <asm/atariints.h>
#include <asm/atarikb.h>
#include <asm/atari_joystick.h>
#include <asm/atari_stdma.h>
#include <asm/atari_stram.h>

extern void atari_microwire_cmd( int cmd );
extern int atari_MFP_init_done;
extern int atari_SCC_init_done;
extern int atari_SCC_reset_done;

EXPORT_SYMBOL(atari_mch_cookie);
EXPORT_SYMBOL(atari_mch_type);
EXPORT_SYMBOL(atari_hw_present);
EXPORT_SYMBOL(atari_switches);
EXPORT_SYMBOL(atari_dont_touch_floppy_select);
EXPORT_SYMBOL(atari_register_vme_int);
EXPORT_SYMBOL(atari_unregister_vme_int);
EXPORT_SYMBOL(stdma_lock);
EXPORT_SYMBOL(stdma_release);
EXPORT_SYMBOL(stdma_others_waiting);
EXPORT_SYMBOL(stdma_islocked);
EXPORT_SYMBOL(atari_stram_alloc);
EXPORT_SYMBOL(atari_stram_free);

EXPORT_SYMBOL(atari_mouse_buttons);
EXPORT_SYMBOL(atari_mouse_interrupt_hook);
EXPORT_SYMBOL(atari_MIDI_interrupt_hook);
EXPORT_SYMBOL(atari_MFP_init_done);
EXPORT_SYMBOL(atari_SCC_init_done);
EXPORT_SYMBOL(atari_SCC_reset_done);
EXPORT_SYMBOL(ikbd_write);
EXPORT_SYMBOL(ikbd_mouse_y0_top);
EXPORT_SYMBOL(ikbd_mouse_thresh);
EXPORT_SYMBOL(ikbd_mouse_rel_pos);
EXPORT_SYMBOL(ikbd_mouse_disable);

EXPORT_SYMBOL(atari_microwire_cmd);
#
# Automatically generated make config: don't edit
#
CONFIG_MIPS=y
CONFIG_MIPS64=y

#
# Code maturity level options
#
# CONFIG_EXPERIMENTAL is not set

#
# Machine selection
#
# CONFIG_SGI_IP27 is not set
CONFIG_SIBYTE_SB1250=y
# CONFIG_PCI is not set
# CONFIG_SIBYTE_SB1250_PROF is not set
# CONFIG_BCM1250_TBPROF is not set
# CONFIG_REMOTE_DEBUG is not set
CONFIG_SIBYTE_SWARM=y
# CONFIG_SIMULATION is not set
# CONFIG_L3DEMO is not set
CONFIG_SIBYTE_SWARM_MAX_MEM_REGIONS=16
CONFIG_SMP=y
CONFIG_RWSEM_GENERIC_SPINLOCK=y
# CONFIG_RWSEM_XCHGADD_ALGORITHM is not set
CONFIG_BOOT_ELF32=y
CONFIG_SWAP_IO_SPACE=y
CONFIG_CFE=y
CONFIG_SIBYTE_SB1250=y
CONFIG_L1_CACHE_SHIFT=5
# CONFIG_ISA is not set
# CONFIG_EISA is not set
# CONFIG_PCI is not set
# CONFIG_MCA is not set
# CONFIG_SBUS is not set

#
# CPU selection
#
# CONFIG_CPU_R4300 is not set
# CONFIG_CPU_R4X00 is not set
# CONFIG_CPU_R5000 is not set
# CONFIG_CPU_NEVADA is not set
# CONFIG_CPU_R8000 is not set
# CONFIG_CPU_R10000 is not set
CONFIG_CPU_SB1=y
CONFIG_SB1_PASS_1_WORKAROUNDS=y
CONFIG_SB1_CACHE_ERROR=y
CONFIG_VTAG_ICACHE=y
CONFIG_CPU_HAS_LLSC=y
CONFIG_CPU_HAS_LLDSCD=y

#
# General setup
#
# CONFIG_CPU_LITTLE_ENDIAN is not set
CONFIG_NET=y
# CONFIG_HOTPLUG is not set
# CONFIG_PCMCIA is not set
# CONFIG_HOTPLUG_PCI is not set
# CONFIG_SYSVIPC is not set
# CONFIG_BSD_PROCESS_ACCT is not set
# CONFIG_SYSCTL is not set
CONFIG_BINFMT_ELF=y
CONFIG_MIPS32_COMPAT=y
CONFIG_BINFMT_ELF32=y
# CONFIG_BINFMT_MISC is not set

#
# Loadable module support
#
# CONFIG_MODULES is not set

#
# Memory Technology Devices (MTD)
#
# CONFIG_MTD is not set

#
# Parallel port support
#
# CONFIG_PARPORT is not set

#
# Block devices
#
# CONFIG_BLK_DEV_FD is not set
# CONFIG_BLK_DEV_XD is not set
# CONFIG_PARIDE is not set
# CONFIG_BLK_CPQ_DA is not set
# CONFIG_BLK_CPQ_CISS_DA is not set
# CONFIG_BLK_DEV_DAC960 is not set
# CONFIG_BLK_DEV_LOOP is not set
# CONFIG_BLK_DEV_NBD is not set
# CONFIG_BLK_DEV_RAM is not set
# CONFIG_BLK_DEV_INITRD is not set

#
# Multi-device support (RAID and LVM)
#
# CONFIG_MD is not set
# CONFIG_BLK_DEV_MD is not set
# CONFIG_MD_LINEAR is not set
# CONFIG_MD_RAID0 is not set
# CONFIG_MD_RAID1 is not set
# CONFIG_MD_RAID5 is not set
# CONFIG_MD_MULTIPATH is not set
# CONFIG_BLK_DEV_LVM is not set

#
# Networking options
#
# CONFIG_PACKET is not set
# CONFIG_NETLINK_DEV is not set
# CONFIG_NETFILTER is not set
# CONFIG_FILTER is not set
CONFIG_UNIX=y
CONFIG_INET=y
# CONFIG_IP_MULTICAST is not set
# CONFIG_IP_ADVANCED_ROUTER is not set
CONFIG_IP_PNP=y
CONFIG_IP_PNP_DHCP=y
CONFIG_IP_PNP_BOOTP=y
# CONFIG_IP_PNP_RARP is not set
# CONFIG_NET_IPIP is not set
# CONFIG_NET_IPGRE is not set
# CONFIG_INET_ECN is not set
# CONFIG_SYN_COOKIES is not set

#
#  
#
# CONFIG_IPX is not set
# CONFIG_ATALK is not set
# CONFIG_DECNET is not set
# CONFIG_BRIDGE is not set

#
# QoS and/or fair queueing
#
# CONFIG_NET_SCHED is not set

#
# Telephony Support
#
# CONFIG_PHONE is not set
# CONFIG_PHONE_IXJ is not set
# CONFIG_PHONE_IXJ_PCMCIA is not set

#
# ATA/IDE/MFM/RLL support
#
# CONFIG_IDE is not set
# CONFIG_BLK_DEV_IDE_MODES is not set
# CONFIG_BLK_DEV_HD is not set

#
# SCSI support
#
# CONFIG_SCSI is not set

#
# Network device support
#
CONFIG_NETDEVICES=y

#
# ARCnet devices
#
# CONFIG_ARCNET is not set
# CONFIG_DUMMY is not set
# CONFIG_BONDING is not set
# CONFIG_EQUALIZER is not set
# CONFIG_TUN is not set

#
# Ethernet (10 or 100Mbit)
#
CONFIG_NET_ETHERNET=y
CONFIG_NET_SB1250_MAC=y
# CONFIG_SUNLANCE is not set
# CONFIG_SUNBMAC is not set
# CONFIG_SUNQE is not set
# CONFIG_SUNGEM is not set
# CONFIG_NET_VENDOR_3COM is not set
# CONFIG_LANCE is not set
# CONFIG_NET_VENDOR_SMC is not set
# CONFIG_NET_VENDOR_RACAL is not set
# CONFIG_NET_ISA is not set
# CONFIG_NET_PCI is not set
# CONFIG_NET_POCKET is not set

#
# Ethernet (1000 Mbit)
#
# CONFIG_ACENIC is not set
# CONFIG_DL2K is not set
# CONFIG_MYRI_SBUS is not set
# CONFIG_NS83820 is not set
# CONFIG_HAMACHI is not set
# CONFIG_YELLOWFIN is not set
# CONFIG_SK98LIN is not set
# CONFIG_FDDI is not set
# CONFIG_PLIP is not set
# CONFIG_PPP is not set
# CONFIG_SLIP is not set

#
# Wireless LAN (non-hamradio)
#
# CONFIG_NET_RADIO is not set

#
# Token Ring devices
#
# CONFIG_TR is not set
# CONFIG_NET_FC is not set

#
# Wan interfaces
#
# CONFIG_WAN is not set

#
# Amateur Radio support
#
# CONFIG_HAMRADIO is not set

#
# IrDA (infrared) support
#
# CONFIG_IRDA is not set

#
# ISDN subsystem
#
# CONFIG_ISDN is not set

#
# Old CD-ROM drivers (not SCSI, not IDE)
#
# CONFIG_CD_NO_IDESCSI is not set

#
# Character devices
#
# CONFIG_VT is not set
# CONFIG_SERIAL is not set
# CONFIG_SERIAL_EXTENDED is not set
CONFIG_SERIAL_NONSTANDARD=y
# CONFIG_COMPUTONE is not set
# CONFIG_ROCKETPORT is not set
# CONFIG_CYCLADES is not set
# CONFIG_DIGIEPCA is not set
# CONFIG_DIGI is not set
# CONFIG_ESPSERIAL is not set
# CONFIG_MOXA_INTELLIO is not set
# CONFIG_MOXA_SMARTIO is not set
# CONFIG_SYNCLINK is not set
# CONFIG_N_HDLC is not set
# CONFIG_RISCOM8 is not set
# CONFIG_SPECIALIX is not set
# CONFIG_SX is not set
# CONFIG_RIO is not set
# CONFIG_STALDRV is not set
# CONFIG_SERIAL_TX3912 is not set
# CONFIG_SERIAL_TX3912_CONSOLE is not set
# CONFIG_AU1000_UART is not set
# CONFIG_TXX927_SERIAL is not set
CONFIG_SIBYTE_SB1250_DUART=y
CONFIG_SIBYTE_SB1250_DUART_CONSOLE=y
CONFIG_SERIAL_CONSOLE=y
CONFIG_SB1250_DUART_OUTPUT_BUF_SIZE=1024
# CONFIG_SIBYTE_SB1250_DUART_NO_PORT_1 is not set
# CONFIG_UNIX98_PTYS is not set

#
# I2C support
#
# CONFIG_I2C is not set

#
# Mice
#
# CONFIG_BUSMOUSE is not set
# CONFIG_MOUSE is not set

#
# Joysticks
#
# CONFIG_INPUT_GAMEPORT is not set

#
# Input core support is needed for gameports
#

#
# Input core support is needed for joysticks
#
# CONFIG_QIC02_TAPE is not set

#
# Watchdog Cards
#
# CONFIG_WATCHDOG is not set
# CONFIG_INTEL_RNG is not set
# CONFIG_NVRAM is not set
# CONFIG_RTC is not set
# CONFIG_DTLK is not set
# CONFIG_R3964 is not set
# CONFIG_APPLICOM is not set

#
# Ftape, the floppy tape device driver
#
# CONFIG_FTAPE is not set
# CONFIG_AGP is not set
# CONFIG_DRM is not set

#
# Multimedia devices
#
# CONFIG_VIDEO_DEV is not set

#
# File systems
#
# CONFIG_QUOTA is not set
# CONFIG_AUTOFS_FS is not set
# CONFIG_AUTOFS4_FS is not set
# CONFIG_REISERFS_FS is not set
# CONFIG_REISERFS_CHECK is not set
# CONFIG_REISERFS_PROC_INFO is not set
# CONFIG_ADFS_FS is not set
# CONFIG_ADFS_FS_RW is not set
# CONFIG_AFFS_FS is not set
# CONFIG_HFS_FS is not set
# CONFIG_BFS_FS is not set
# CONFIG_EXT3_FS is not set
# CONFIG_JBD is not set
# CONFIG_JBD_DEBUG is not set
# CONFIG_FAT_FS is not set
# CONFIG_MSDOS_FS is not set
# CONFIG_UMSDOS_FS is not set
# CONFIG_VFAT_FS is not set
# CONFIG_EFS_FS is not set
# CONFIG_JFFS_FS is not set
# CONFIG_JFFS2_FS is not set
# CONFIG_CRAMFS is not set
# CONFIG_TMPFS is not set
# CONFIG_RAMFS is not set
# CONFIG_ISO9660_FS is not set
# CONFIG_JOLIET is not set
# CONFIG_ZISOFS is not set
# CONFIG_MINIX_FS is not set
# CONFIG_VXFS_FS is not set
# CONFIG_NTFS_FS is not set
# CONFIG_NTFS_RW is not set
# CONFIG_HPFS_FS is not set
CONFIG_PROC_FS=y
# CONFIG_DEVFS_FS is not set
# CONFIG_DEVFS_MOUNT is not set
# CONFIG_DEVFS_DEBUG is not set
# CONFIG_DEVPTS_FS is not set
# CONFIG_QNX4FS_FS is not set
# CONFIG_QNX4FS_RW is not set
# CONFIG_ROMFS_FS is not set
CONFIG_EXT2_FS=y
# CONFIG_SYSV_FS is not set
# CONFIG_UDF_FS is not set
# CONFIG_UDF_RW is not set
# CONFIG_UFS_FS is not set
# CONFIG_UFS_FS_WRITE is not set

#
# Network File Systems
#
# CONFIG_CODA_FS is not set
# CONFIG_INTERMEZZO_FS is not set
CONFIG_NFS_FS=y
CONFIG_NFS_V3=y
CONFIG_ROOT_NFS=y
# CONFIG_NFSD is not set
# CONFIG_NFSD_V3 is not set
CONFIG_SUNRPC=y
CONFIG_LOCKD=y
CONFIG_LOCKD_V4=y
# CONFIG_SMB_FS is not set
# CONFIG_NCP_FS is not set
# CONFIG_NCPFS_PACKET_SIGNING is not set
# CONFIG_NCPFS_IOCTL_LOCKING is not set
# CONFIG_NCPFS_STRONG is not set
# CONFIG_NCPFS_NFS_NS is not set
# CONFIG_NCPFS_OS2_NS is not set
# CONFIG_NCPFS_SMALLDOS is not set
# CONFIG_NCPFS_NLS is not set
# CONFIG_NCPFS_EXTRAS is not set
# CONFIG_ZISOFS_FS is not set
# CONFIG_ZLIB_FS_INFLATE is not set

#
# Partition Types
#
CONFIG_PARTITION_ADVANCED=y
# CONFIG_ACORN_PARTITION is not set
# CONFIG_OSF_PARTITION is not set
# CONFIG_AMIGA_PARTITION is not set
# CONFIG_ATARI_PARTITION is not set
# CONFIG_MAC_PARTITION is not set
CONFIG_MSDOS_PARTITION=y
# CONFIG_BSD_DISKLABEL is not set
# CONFIG_MINIX_SUBPARTITION is not set
# CONFIG_SOLARIS_X86_PARTITION is not set
# CONFIG_UNIXWARE_DISKLABEL is not set
# CONFIG_LDM_PARTITION is not set
CONFIG_SGI_PARTITION=y
# CONFIG_ULTRIX_PARTITION is not set
# CONFIG_SUN_PARTITION is not set
# CONFIG_SMB_NLS is not set
# CONFIG_NLS is not set
CONFIG_KCORE_ELF=y

#
# Sound
#
# CONFIG_SOUND is not set

#
# USB support
#
# CONFIG_USB is not set

#
# USB Controllers
#
# CONFIG_USB_UHCI is not set
# CONFIG_USB_UHCI_ALT is not set
# CONFIG_USB_OHCI is not set

#
# USB Device Class drivers
#
# CONFIG_USB_AUDIO is not set
# CONFIG_USB_BLUETOOTH is not set

#
#   SCSI support is needed for USB Storage
#
# CONFIG_USB_STORAGE is not set
# CONFIG_USB_STORAGE_DEBUG is not set
# CONFIG_USB_STORAGE_DATAFAB is not set
# CONFIG_USB_STORAGE_FREECOM is not set
# CONFIG_USB_STORAGE_ISD200 is not set
# CONFIG_USB_STORAGE_DPCM is not set
# CONFIG_USB_STORAGE_HP8200e is not set
# CONFIG_USB_STORAGE_SDDR09 is not set
# CONFIG_USB_STORAGE_JUMPSHOT is not set
# CONFIG_USB_ACM is not set
# CONFIG_USB_PRINTER is not set

#
# USB Human Interface Devices (HID)
#

#
#   Input core support is needed for USB HID
#

#
# USB Imaging devices
#
# CONFIG_USB_DC2XX is not set
# CONFIG_USB_MDC800 is not set
# CONFIG_USB_SCANNER is not set
# CONFIG_USB_MICROTEK is not set
# CONFIG_USB_HPUSBSCSI is not set

#
# USB Multimedia devices
#

#
#   Video4Linux support is needed for USB Multimedia device support
#

#
# USB Network adaptors
#
# CONFIG_USB_PEGASUS is not set
# CONFIG_USB_KAWETH is not set
# CONFIG_USB_CATC is not set
# CONFIG_USB_CDCETHER is not set
# CONFIG_USB_USBNET is not set

#
# USB port drivers
#
# CONFIG_USB_USS720 is not set

#
# USB Serial Converter support
#
# CONFIG_USB_SERIAL is not set
# CONFIG_USB_SERIAL_GENERIC is not set
# CONFIG_USB_SERIAL_BELKIN is not set
# CONFIG_USB_SERIAL_WHITEHEAT is not set
# CONFIG_USB_SERIAL_DIGI_ACCELEPORT is not set
# CONFIG_USB_SERIAL_EMPEG is not set
# CONFIG_USB_SERIAL_FTDI_SIO is not set
# CONFIG_USB_SERIAL_VISOR is not set
# CONFIG_USB_SERIAL_IPAQ is not set
# CONFIG_USB_SERIAL_IR is not set
# CONFIG_USB_SERIAL_EDGEPORT is not set
# CONFIG_USB_SERIAL_KEYSPAN_PDA is not set
# CONFIG_USB_SERIAL_KEYSPAN is not set
# CONFIG_USB_SERIAL_KEYSPAN_USA28 is not set
# CONFIG_USB_SERIAL_KEYSPAN_USA28X is not set
# CONFIG_USB_SERIAL_KEYSPAN_USA28XA is not set
# CONFIG_USB_SERIAL_KEYSPAN_USA28XB is not set
# CONFIG_USB_SERIAL_KEYSPAN_USA19 is not set
# CONFIG_USB_SERIAL_KEYSPAN_USA18X is not set
# CONFIG_USB_SERIAL_KEYSPAN_USA19W is not set
# CONFIG_USB_SERIAL_KEYSPAN_USA49W is not set
# CONFIG_USB_SERIAL_MCT_U232 is not set
# CONFIG_USB_SERIAL_KLSI is not set
# CONFIG_USB_SERIAL_PL2303 is not set
# CONFIG_USB_SERIAL_CYBERJACK is not set
# CONFIG_USB_SERIAL_XIRCOM is not set
# CONFIG_USB_SERIAL_OMNINET is not set

#
# USB Miscellaneous drivers
#
# CONFIG_USB_RIO500 is not set

#
# Input core support
#
# CONFIG_INPUT is not set
# CONFIG_INPUT_KEYBDEV is not set
# CONFIG_INPUT_MOUSEDEV is not set
# CONFIG_INPUT_JOYDEV is not set
# CONFIG_INPUT_EVDEV is not set

#
# Kernel hacking
#
CONFIG_CROSSCOMPILE=y
# CONFIG_REMOTE_DEBUG is not set
# CONFIG_MAGIC_SYSRQ is not set
#
# Makefile for the Linux/MIPS kernel.
#
# Note! Dependencies are done automagically by 'make dep', which also
# removes any old dependencies. DON'T put your own dependencies here
# unless it's something special (ie not a .c file).
#

.S.o:
	$(CC) $(CFLAGS) $(CFLAGS_$@) -c $< -o $*.o

all:	kernel.o head.o init_task.o

O_TARGET := kernel.o

export-objs = irq.o mips64_ksyms.o pci-dma.o smp.o

obj-y	:= branch.o entry.o irq.o proc.o process.o ptrace.o r4k_cache.o \
	   r4k_fpu.o r4k_genex.o r4k_switch.o reset.o scall_64.o \
	   semaphore.o setup.o signal.o softfp.o syscall.o time.o traps.o \
	   unaligned.o

obj-$(CONFIG_I8259)		+= i8259.o
obj-$(CONFIG_IRQ_CPU)		+= irq_cpu.o

obj-$(CONFIG_MODULES)		+= mips64_ksyms.o
obj-$(CONFIG_MIPS32_COMPAT)	+= linux32.o scall_o32.o signal32.o ioctl32.o
obj-$(CONFIG_BINFMT_ELF32)	+= binfmt_elf32.o
obj-$(CONFIG_SMP)		+= smp.o

ifndef CONFIG_MAPPED_PCI_IO
obj-y				+= pci-dma.o
endif

CFLAGS_r4k_genex.o := -P

include $(TOPDIR)/Rules.make
/*
 * This file is subject to the terms and conditions of the GNU General Public
 * License.  See the file "COPYING" in the main directory of this archive
 * for more details.
 *
 * Branch and jump emulation.
 *
 * Copyright (C) 1996, 1997 by Ralf Baechle
 */
#include <linux/kernel.h>
#include <linux/sched.h>
#include <linux/signal.h>
#include <asm/branch.h>
#include <asm/cpu.h>
#include <asm/inst.h>
#include <asm/ptrace.h>
#include <asm/uaccess.h>

/*
 * Compute the return address and do emulate branch simulation, if required.
 */
int __compute_return_epc(struct pt_regs *regs)
{
	unsigned int *addr, bit, fcr31;
	long epc;
	union mips_instruction insn;

	epc = regs->cp0_epc;
	if (epc & 3) {
		printk("%s: unaligned epc - sending SIGBUS.\n", current->comm);
		force_sig(SIGBUS, current);
		return -EFAULT;
	}

	/*
	 * Read the instruction
	 */
	addr = (unsigned int *) epc;
	if (__get_user(insn.word, addr)) {
		force_sig(SIGSEGV, current);
		return -EFAULT;
	}

	regs->regs[0] = 0;
	switch (insn.i_format.opcode) {
	/*
	 * jr and jalr are in r_format format.
	 */
	case spec_op:
		switch (insn.r_format.func) {
		case jalr_op:
			regs->regs[insn.r_format.rd] = epc + 8;
			/* Fall through */
		case jr_op:
			regs->cp0_epc = regs->regs[insn.r_format.rs];
			break;
		}
		break;

	/*
	 * This group contains:
	 * bltz_op, bgez_op, bltzl_op, bgezl_op,
	 * bltzal_op, bgezal_op, bltzall_op, bgezall_op.
	 */
	case bcond_op:
		switch (insn.i_format.rt) {
	 	case bltz_op:
		case bltzl_op:
			if ((long)regs->regs[insn.i_format.rs] < 0)
				epc = epc + 4 + (insn.i_format.simmediate << 2);
			else
				epc += 8;
			regs->cp0_epc = epc;
			break;

		case bgez_op:
		case bgezl_op:
			if ((long)regs->regs[insn.i_format.rs] >= 0)
				epc = epc + 4 + (insn.i_format.simmediate << 2);
			else
				epc += 8;
			regs->cp0_epc = epc;
			break;

		case bltzal_op:
		case bltzall_op:
			regs->regs[31] = epc + 8;
			if ((long)regs->regs[insn.i_format.rs] < 0)
				epc = epc + 4 + (insn.i_format.simmediate << 2);
			else
				epc += 8;
			regs->cp0_epc = epc;
			break;

		case bgezal_op:
		case bgezall_op:
			regs->regs[31] = epc + 8;
			if ((long)regs->regs[insn.i_format.rs] >= 0)
				epc = epc + 4 + (insn.i_format.simmediate << 2);
			else
				epc += 8;
			regs->cp0_epc = epc;
			break;
		}
		break;

	/*
	 * These are unconditional and in j_format.
	 */
	case jal_op:
		regs->regs[31] = regs->cp0_epc + 8;
	case j_op:
		epc += 4;
		epc >>= 28;
		epc <<= 28;
		epc |= (insn.j_format.target << 2);
		regs->cp0_epc = epc;
		break;

	/*
	 * These are conditional and in i_format.
	 */
	case beq_op:
	case beql_op:
		if (regs->regs[insn.i_format.rs] ==
		    regs->regs[insn.i_format.rt])
			epc = epc + 4 + (insn.i_format.simmediate << 2);
		else
			epc += 8;
		regs->cp0_epc = epc;
		break;

	case bne_op:
	case bnel_op:
		if (regs->regs[insn.i_format.rs] !=
		    regs->regs[insn.i_format.rt])
			epc = epc + 4 + (insn.i_format.simmediate << 2);
		else
			epc += 8;
		regs->cp0_epc = epc;
		break;

	case blez_op: /* not really i_format */
	case blezl_op:
		/* rt field assumed to be zero */
		if ((long)regs->regs[insn.i_format.rs] <= 0)
			epc = epc + 4 + (insn.i_format.simmediate << 2);
		else
			epc += 8;
		regs->cp0_epc = epc;
		break;

	case bgtz_op:
	case bgtzl_op:
		/* rt field assumed to be zero */
		if ((long)regs->regs[insn.i_format.rs] > 0)
			epc = epc + 4 + (insn.i_format.simmediate << 2);
		else
			epc += 8;
		regs->cp0_epc = epc;
		break;

	/*
	 * And now the FPA/cp1 branch instructions.
	 */
	case cop1_op:
		if (!(mips_cpu.options & MIPS_CPU_FPU))
			fcr31 = current->thread.fpu.soft.sr;
		else
			asm("cfc1\t%0,$31":"=r" (fcr31));
		bit = (insn.i_format.rt >> 2);
		bit += (bit != 0);
		bit += 23;
		switch (insn.i_format.rt) {
		case 0:	/* bc1f */
		case 2:	/* bc1fl */
			if (~fcr31 & (1 << bit))
				epc = epc + 4 + (insn.i_format.simmediate << 2);
			else
				epc += 8;
			regs->cp0_epc = epc;
			break;

		case 1:	/* bc1t */
		case 3:	/* bc1tl */
			if (fcr31 & (1 << bit))
				epc = epc + 4 + (insn.i_format.simmediate << 2);
			else
				epc += 8;
			regs->cp0_epc/*
 * linux/atari/atakeyb.c
 *
 * Atari Keyboard driver for 680x0 Linux
 *
 * This file is subject to the terms and conditions of the GNU General Public
 * License.  See the file COPYING in the main directory of this archive
 * for more details.
 */

/*
 * Atari support by Robert de Vries
 * enhanced by Bjoern Brauel and Roman Hodek
 */

#include <linux/config.h>
#include <linux/sched.h>
#include <linux/kernel.h>
#include <linux/interrupt.h>
#include <linux/errno.h>
#include <linux/keyboard.h>
#include <linux/delay.h>
#include <linux/timer.h>
#include <linux/kd.h>
#include <linux/random.h>
#include <linux/init.h>
#include <linux/kbd_ll.h>
#include <linux/kbd_kern.h>

#include <asm/atariints.h>
#include <asm/atarihw.h>
#include <asm/atarikb.h>
#include <asm/atari_joystick.h>
#include <asm/irq.h>

static void atakeyb_rep( unsigned long ignore );
extern unsigned int keymap_count;

/* Hook for MIDI serial driver */
void (*atari_MIDI_interrupt_hook) (void);
/* Hook for mouse driver */
void (*atari_mouse_interrupt_hook) (char *);

/* variables for IKBD self test: */

/* state: 0: off; >0: in progress; >1: 0xf1 received */
static volatile int ikbd_self_test;
/* timestamp when last received a char */
static volatile unsigned long self_test_last_rcv;
/* bitmap of keys reported as broken */
static unsigned long broken_keys[128/(sizeof(unsigned long)*8)] = { 0, };

#define BREAK_MASK	(0x80)

/*
 * ++roman: The following changes were applied manually:
 *
 *  - The Alt (= Meta) key works in combination with Shift and
 *    Control, e.g. Alt+Shift+a sends Meta-A (0xc1), Alt+Control+A sends
 *    Meta-Ctrl-A (0x81) ...
 *
 *  - The parentheses on the keypad send '(' and ')' with all
 *    modifiers (as would do e.g. keypad '+'), but they cannot be used as
 *    application keys (i.e. sending Esc O c).
 *
 *  - HELP and UNDO are mapped to be F21 and F24, resp, that send the
 *    codes "\E[M" and "\E[P". (This is better than the old mapping to
 *    F11 and F12, because these codes are on Shift+F1/2 anyway.) This
 *    way, applications that allow their own keyboard mappings
 *    (e.g. tcsh, X Windows) can be configured to use them in the way
 *    the label suggests (providing help or undoing).
 *
 *  - Console switching is done with Alt+Fx (consoles 1..10) and
 *    Shift+Alt+Fx (consoles 11..20).
 *
 *  - The misc. special function implemented in the kernel are mapped
 *    to the following key combinations:
 *
 *      ClrHome          -> Home/Find
 *      Shift + ClrHome  -> End/Select
 *      Shift + Up       -> Page Up
 *      Shift + Down     -> Page Down
 *      Alt + Help       -> show system status
 *      Shift + Help     -> show memory info
 *      Ctrl + Help      -> show registers
 *      Ctrl + Alt + Del -> Reboot
 *      Alt + Undo       -> switch to last console
 *      Shift + Undo     -> send interrupt
 *      Alt + Insert     -> stop/start output (same as ^S/^Q)
 *      Alt + Up         -> Scroll back console (if implemented)
 *      Alt + Down       -> Scroll forward console (if implemented)
 *      Alt + CapsLock   -> NumLock
 *
 * ++Andreas:
 *
 *  - Help mapped to K_HELP
 *  - Undo mapped to K_UNDO (= K_F246)
 *  - Keypad Left/Right Parenthesis mapped to new K_PPAREN[LR]
 */

static u_short ataplain_map[NR_KEYS] __initdata = {
	0xf200, 0xf01b, 0xf031, 0xf032, 0xf033, 0xf034, 0xf035, 0xf036,
	0xf037, 0xf038, 0xf039, 0xf030, 0xf02d, 0xf03d, 0xf008, 0xf009,
	0xfb71, 0xfb77, 0xfb65, 0xfb72, 0xfb74, 0xfb79, 0xfb75, 0xfb69,
	0xfb6f, 0xfb70, 0xf05b, 0xf05d, 0xf201, 0xf702, 0xfb61, 0xfb73,
	0xfb64, 0xfb66, 0xfb67, 0xfb68, 0xfb6a, 0xfb6b, 0xfb6c, 0xf03b,
	0xf027, 0xf060, 0xf700, 0xf05c, 0xfb7a, 0xfb78, 0xfb63, 0xfb76,
	0xfb62, 0xfb6e, 0xfb6d, 0xf02c, 0xf02e, 0xf02f, 0xf700, 0xf200,
	0xf703, 0xf020, 0xf207, 0xf100, 0xf101, 0xf102, 0xf103, 0xf104,
	0xf105, 0xf106, 0xf107, 0xf108, 0xf109, 0xf200, 0xf200, 0xf114,
	0xf603, 0xf200, 0xf30b, 0xf601, 0xf200, 0xf602, 0xf30a, 0xf200,
	0xf600, 0xf200, 0xf115, 0xf07f, 0xf200, 0xf200, 0xf200, 0xf200,
	0xf200, 0xf200, 0xf200, 0xf200, 0xf200, 0xf200, 0xf200, 0xf200,
	0xf200, 0xf1ff, 0xf11b, 0xf312, 0xf313, 0xf30d, 0xf30c, 0xf307,
	0xf308, 0xf309, 0xf304, 0xf305, 0xf306, 0xf301, 0xf302, 0xf303,
	0xf300, 0xf310, 0xf30e, 0xf200, 0xf200, 0xf200, 0xf200, 0xf200,
	0xf200, 0xf200, 0xf200, 0xf200, 0xf200, 0xf200, 0xf200, 0xf200
};

static u_short atashift_map[NR_KEYS] __initdata = {
	0xf200, 0xf01b, 0xf021, 0xf040, 0xf023, 0xf024, 0xf025, 0xf05e,
	0xf026, 0xf02a, 0xf028, 0xf029, 0xf05f, 0xf02b, 0xf008, 0xf009,
	0xfb51, 0xfb57, 0xfb45, 0xfb52, 0xfb54, 0xfb59, 0xfb55, 0xfb49,
	0xfb4f, 0xfb50, 0xf07b, 0xf07d, 0xf201, 0xf702, 0xfb41, 0xfb53,
	0xfb44, 0xfb46, 0xfb47, 0xfb48, 0xfb4a, 0xfb4b, 0xfb4c, 0xf03a,
	0xf022, 0xf07e, 0xf700, 0xf07c, 0xfb5a, 0xfb58, 0xfb43, 0xfb56,
	0xfb42, 0xfb4e, 0xfb4d, 0xf03c, 0xf03e, 0xf03f, 0xf700, 0xf200,
	0xf703, 0xf020, 0xf207, 0xf10a, 0xf10b, 0xf10c, 0xf10d, 0xf10e,
	0xf10f, 0xf110, 0xf111, 0xf112, 0xf113, 0xf200, 0xf200, 0xf117,
	0xf118, 0xf200, 0xf30b, 0xf601, 0xf200, 0xf602, 0xf30a, 0xf200,
	0xf119, 0xf200, 0xf115, 0xf07f, 0xf200, 0xf200, 0xf200, 0xf200,
	0xf200, 0xf200, 0xf200, 0xf200, 0xf200, 0xf200, 0xf200, 0xf200,
	0xf200, 0xf205, 0xf203, 0xf312, 0xf313, 0xf30d, 0xf30c, 0xf307,
	0xf308, 0xf309, 0xf304, 0xf305, 0xf306, 0xf301, 0xf302, 0xf303,
	0xf300, 0xf310, 0xf30e, 0xf200, 0xf200, 0xf200, 0xf200, 0xf200,
	0xf200, 0xf200, 0xf200, 0xf200, 0xf200, 0xf200, 0xf200, 0xf200
};

static u_short atactrl_map[NR_KEYS] __initdata = {
	0xf200, 0xf200, 0xf200, 0xf000, 0xf01b, 0xf01c, 0xf01d, 0xf01e,
	0xf01f, 0xf07f, 0xf200, 0xf200, 0xf01f, 0xf200, 0xf008, 0xf200,
	0xf011, 0xf017, 0xf005, 0xf012, 0xf014, 0xf019, 0xf015, 0xf009,
	0xf00f, 0xf010, 0xf01b, 0xf01d, 0xf201, 0xf702, 0xf001, 0xf013,
	0xf004, 0xf006, 0xf007, 0xf008, 0xf00a, 0xf00b, 0xf00c, 0xf200,
	0xf007, 0xf000, 0xf700, 0xf01c, 0xf01a, 0xf018, 0xf003, 0xf016,
	0xf002, 0xf00e, 0xf00d, 0xf200, 0xf200, 0xf07f, 0xf700, 0xf200,
	0xf703, 0xf000, 0xf207, 0xf100, 0xf101, 0xf102, 0xf103, 0xf104,
	0xf105, 0xf106, 0xf107, 0xf108, 0xf109, 0xf200, 0xf200, 0xf114,
	0xf603, 0xf200, 0xf30b, 0xf601, 0xf200, 0xf602, 0xf30a, 0xf200,
	0xf600, 0xf200, 0xf115, 0xf07f, 0xf200, 0xf200, 0xf200, 0xf200,
	0xf200, 0xf200, 0xf200, 0xf200, 0xf200, 0xf200, 0xf200, 0xf200,
	0xf200, 0xf1ff, 0xf202, 0xf312, 0xf313, 0xf30d, 0xf30c, 0xf307,
	0xf308, 0xf309, 0xf304, 0xf305, 0xf306, 0xf301, 0xf302, 0xf303,
	0xf300, 0xf310, 0xf30e, 0xf200, 0xf200, 0xf200, 0xf200, 0xf200,
	0xf200, 0xf200, 0xf200, 0xf200, 0xf200, 0xf200, 0xf200, 0xf200
};

static u_short atashift_ctrl_map[NR_KEYS] __initdata = {
	0xf200, 0xf200, 0xf200, 0xf200, 0xf200, 0xf200, 0xf200, 0xf200,
	0xf200, 0xf200, 0xf200, 0xf200, 0xf01f, 0xf200, 0xf008, 0xf200,
	0xf011, 0xf017, 0xf005, 0xf012, 0xf014, 0xf019, 0xf015, 0xf009,
	0xf00f, 0xf010, 0xf200, 0xf200, 0xf201, 0xf702, 0xf001, 0xf013,
	0xf004, 0xf006, 0xf007, 0xf008, 0xf00a, 0xf00b, 0xf00c, 0xf200,
	0xf200, 0xf200, 0xf700, 0xf200, 0xf01a, 0xf018, 0xf003, 0xf016,
	0xf002, 0xf00e, 0xf00d, 0xf200, 0xf200, 0xf07f, 0xf700, 0xf200,
	0xf703, 0xf200, 0xf207, 0xf100, 0xf101, 0xf102, 0xf103, 0xf104,
	0xf105, 0xf106, 0xf107, 0xf108, 0xf109, 0xf200, 0xf200, 0xf117,
	0xf603, 0xf200, 0xf30b, 0xf601, 0xf200, 0xf602, 0xf30a, 0xf200,
	0xf600, 0xf200, 0xf115, 0xf07f, 0xf200, 0xf200, 0xf200, 0xf200,
	0xf200, 0xf200, 0xf200, 0xf200, 0xf200, 0xf200, 0xf200, 0xf200,
	0xf200, 0xf1ff, 0xf11b, 0xf312, 0xf313, 0xf30d, 0xf30c, 0xf307,
	0xf308, 0xf309, 0xf304, 0xf305, 0xf306, 0xf301, 0xf302, 0xf303,
	0xf300, 0xf310, 0xf30e, 0xf200, 0xf200, 0xf200, 0xf200, 0xf200,
	0xf200, 0xf200, 0xf200, 0xf200, 0xf200, 0xf200, 0xf200, 0xf200
};

static u_short ataalt_map[NR_KEYS] __initdata = {
	0xf200, 0xf81b, 0xf831, 0xf832, 0xf833, 0xf834, 0xf835, 0xf836,
	0xf837, 0xf838, 0xf839, 0xf830, 0xf82d, 0xf83d, 0xf808, 0xf809,
	0xf871, 0xf877, 0xf865, 0xf872, 0xf874, 0xf879, 0xf875, 0xf869,
	0xf86f, 0xf870, 0xf85b, 0xf85d, 0xf80d, 0xf702, 0xf861, 0xf873,
	0xf864, 0xf866, 0xf867, 0xf868, 0xf86a, 0xf86b, 0xf86c, 0xf83b,
	0xf827, 0xf860, 0xf700, 0xf85c, 0xf87a, 0xf878, 0xf863, 0xf876,
	0xf862, 0xf86e, 0xf86d, 0xf82c, 0xf82e, 0xf82f, 0xf700, 0xf200,
	0xf703, 0xf820, 0xf208, 0xf500, 0xf501, 0xf502, 0xf503, 0xf504,
	0xf505, 0xf506, 0xf507, 0xf508, 0xf509, 0xf200, 0xf200, 0xf114,
	0xf20b, 0xf200, 0xf30b, 0xf601, 0xf200, 0xf602, 0xf30a, 0xf200,
	0xf20a, 0xf200, 0xf209, 0xf87f, 0xf200, 0xf200, 0xf200, 0xf200,
	0xf200, 0xf200, 0xf200, 0xf200, 0xf200, 0xf200, 0xf200, 0xf200,
	0xf200, 0xf206, 0xf204, 0xf312, 0xf313, 0xf30d, 0xf30c, 0xf907,
	0xf908, 0xf909, 0xf904, 0xf905, 0xf906, 0xf901, 0xf902, 0xf903,
	0xf900, 0xf310, 0xf30e, 0xf200, 0xf200, 0xf200, 0xf200, 0xf200,
	0xf200, 0xf200, 0xf200, 0xf200, 0xf200, 0xf200, 0xf200, 0xf200
};

static u_short atashift_alt_map[NR_KEYS] __initdata = {
	0xf200, 0xf81b, 0xf821, 0xf840, 0xf823, 0xf824, 0xf825, 0xf85e,
	0xf826, 0xf82a, 0xf828, 0xf829, 0xf85f, 0xf82b, 0xf808, 0xf809,
	0xf851, 0xf857, 0xf845, 0xf852, 0xf854, 0xf859, 0xf855, 0xf849,
	0xf84f, 0xf850, 0xf87b, 0xf87d, 0xf201, 0xf702, 0xf841, 0xf853,
	0xf844, 0xf846, 0xf847, 0xf848, 0xf84a, 0xf84b, 0xf84c, 0xf83a,
	0xf822, 0xf87e, 0xf700, 0xf87c, 0xf85a, 0xf858, 0xf843, 0xf856,
	0xf842, 0xf84e, 0xf84d, 0xf83c, 0xf83e, 0xf83f, 0xf700, 0xf200,
	0xf703, 0xf820, 0xf207, 0xf50a, 0xf50b, 0xf50c, 0xf50d, 0xf50e,
	0xf50f, 0xf510, 0xf511, 0xf512, 0xf513, 0xf200, 0xf200, 0xf117,
	0xf118, 0xf200, 0xf30b, 0xf601, 0xf200, 0xf602, 0xf30a, 0xf200,
	0xf119, 0xf200, 0xf115, 0xf87f, 0xf200, 0xf200, 0xf200, 0xf200,
	0xf200, 0xf200, 0xf200, 0xf200, 0xf200, 0xf200, 0xf200, 0xf200,
	0xf200, 0xf1ff, 0xf11b, 0xf312, 0xf313, 0xf30d, 0xf30c, 0xf307,
	0xf308, 0xf309, 0xf304, 0xf305, 0xf306, 0xf301, 0xf302, 0xf303,
	0xf300, 0xf310, 0xf30e, 0xf200, 0xf200, 0xf200, 0xf200, 0xf200,
	0xf200, 0xf200, 0xf200, 0xf200, 0xf200, 0xf200, 0xf200, 0xf200
};

static u_short atactrl_alt_map[NR_KEYS] __initdata = {
	0xf200, 0xf200, 0xf200, 0xf800, 0xf81b, 0xf81c, 0xf81d, 0xf81e,
	0xf81f, 0xf87f, 0xf200, 0xf200, 0xf81f, 0xf200, 0xf808, 0xf200,
	0xf811, 0xf817, 0xf805, 0xf812, 0xf814, 0xf819, 0xf815, 0xf809,
	0xf80f, 0xf810, 0xf81b, 0xf81d, 0xf201, 0xf702, 0xf801, 0xf813,
	0xf804, 0xf806, 0xf807, 0xf808, 0xf80a, 0xf80b, 0xf80c, 0xf200,
	0xf807, 0xf800, 0xf700, 0xf81c, 0xf81a, 0xf818, 0xf803, 0xf816,
	0xf802, 0xf80e, 0xf80d, 0xf200, 0xf200, 0xf87f, 0xf700, 0xf200,
	0xf703, 0xf800, 0xf207, 0xf100, 0xf101, 0xf102, 0xf103, 0xf104,
	0xf105, 0xf106, 0xf107, 0xf108, 0xf109, 0xf200, 0xf200, 0xf114,
	0xf603, 0xf200, 0xf30b, 0xf601, 0xf200, 0xf602, 0xf30a, 0xf200,
	0xf600, 0xf200, 0xf115, 0xf87f, 0xf200, 0xf200, 0xf200, 0xf200,
	0xf200, 0xf200, 0xf200, 0xf200, 0xf200, 0xf200, 0xf200, 0xf200,
	0xf200, 0xf1ff, 0xf202, 0xf312, 0xf313, 0xf30d, 0xf30c, 0xf307,
	0xf308, 0xf309, 0xf304, 0xf305, 0xf306, 0xf301, 0xf302, 0xf303,
	0xf300, 0xf310, 0xf30e, 0xf200, 0xf200, 0xf200, 0xf200, 0xf200,
	0xf200, 0xf200, 0xf200, 0xf200, 0xf200, 0xf200, 0xf200, 0xf200
};

static u_short atashift_ctrl_alt_map[NR_KEYS] = {
	0xf200, 0xf200, 0xf200, 0xf200, 0xf200, 0xf200, 0xf200, 0xf200,
	0xf200, 0xf200, 0xf200, 0xf200, 0xf81f, 0xf200, 0xf808, 0xf200,
	0xf811, 0xf817, 0xf805, 0xf812, 0xf814, 0xf819, 0xf815, 0xf809,
	0xf80f, 0xf810, 0xf200, 0xf200, 0xf201, 0xf702, 0xf801, 0xf813,
	0xf804, 0xf806, 0xf807, 0xf808, 0xf80a, 0xf80b, 0xf80c, 0xf200,
	0xf200, 0xf200, 0xf700, 0xf200, 0xf81a, 0xf818, 0xf803, 0xf816,
	0xf802, 0xf80e, 0xf80d, 0xf200, 0xf200, 0xf87f, 0xf700, 0xf200,
	0xf703, 0xf200, 0xf207, 0xf100, 0xf101, 0xf102, 0xf103, 0xf104,
	0xf105, 0xf106, 0xf107, 0xf108, 0xf109, 0xf200, 0xf200, 0xf117,
	0xf603, 0xf200, 0xf30b, 0xf601, 0xf200, 0xf602, 0xf30a, 0xf200,
	0xf600, 0xf200, 0xf115, 0xf87f, 0xf200, 0xf200, 0xf200, 0xf200,
	0xf200, 0xf200, 0xf200, 0xf200, 0xf200, 0xf200, 0xf200, 0xf200,
	0xf200, 0xf1ff, 0xf11b, 0xf312, 0xf313, 0xf30d, 0xf30c, 0xf307,
	0xf308, 0xf309, 0xf304, 0xf305, 0xf306, 0xf301, 0xf302, 0xf303,
	0xf300, 0xf310, 0xf30e, 0xf200, 0xf200, 0xf200, 0xf200, 0xf200,
	0xf200, 0xf200, 0xf200, 0xf200, 0xf200, 0xf200, 0xf200, 0xf200
};

typedef enum kb_state_t
{
    KEYBOARD, AMOUSE, RMOUSE, JOYSTICK, CLOCK, RESYNC
} KB_STATE_T;

#define	IS_SYNC_CODE(sc)	((sc) >= 0x04 && (sc) <= 0xfb)

typedef struct keyboard_state
{
    unsigned char  buf[6];
    int 	   len;
    KB_STATE_T	   state;
} KEYBOARD_STATE;

KEYBOARD_STATE kb_state;

#define	DEFAULT_KEYB_REP_DELAY	(HZ/4)
#define	DEFAULT_KEYB_REP_RATE	(HZ/25)

/* These could be settable by some ioctl() in future... */
static unsigned int key_repeat_delay = DEFAULT_KEYB_REP_DELAY;
static unsigned int key_repeat_rate  = DEFAULT_KEYB_REP_RATE;

static unsigned char rep_scancode;
static struct timer_list atakeyb_rep_timer = { function: atakeyb_rep };

static void atakeyb_rep( unsigned long ignore )

{
	kbd_pt_regs = NULL;

	/* Disable keyboard for the time we call handle_scancode(), else a race
	 * in the keyboard tty queue may happen */
	atari_disable_irq( IRQ_MFP_ACIA );
	del_timer( &atakeyb_rep_timer );

	/* A keyboard int may have come in before we disabled the irq, so
	 * double-check whether rep_scancode is still != 0 */
	if (rep_scancode) {
		init_timer(&atakeyb_rep_timer);
		atakeyb_rep_timer.expires = jiffies + key_repeat_rate;
		add_timer( &atakeyb_rep_timer );

		handle_scancode(rep_scancode, 1);
	}

	atari_enable_irq( IRQ_MFP_ACIA );
}


/* ++roman: If a keyboard overrun happened, we can't tell in general how much
 * bytes have been lost and in which state of the packet structure we are now.
 * This usually causes keyboards bytes to be interpreted as mouse movements
 * and vice versa, which is very annoying. It seems better to throw away some
 * bytes (that are usually mouse bytes) than to misinterpret them. Therefor I
 * introduced the RESYNC state for IKBD data. In this state, the bytes up to
 * one that really looks like a key event (0x04..0xf2) or the start of a mouse
 * packet (0xf8..0xfb) are thrown away, but at most 2 bytes. This at least
 * speeds up the resynchronization of the event structure, even if maybe a
 * mouse movement is lost. However, nothing is perfect. For bytes 0x01..0x03,
 * it's really hard to decide whether they're mouse or keyboard bytes. Since
 * overruns usually occur when moving the Atari mouse rapidly, they're seen as
 * mouse bytes here. If this is wrong, only a make code of the keyboard gets
 * lost, which isn't too bad. Loosing a break code would be disastrous,
 * because then the keyboard repeat strikes...
 */

static void keyboard_interrupt(int irq, void *dummy, struct pt_regs *fp)
{
  u_char acia_stat;
  int scancode;
  int break_flag;

  /* save frame for register dump */
  kbd_pt_regs = fp;

 repeat:
  if (acia.mid_ctrl & ACIA_IRQ)
	if (atari_MIDI_interrupt_hook)
		atari_MIDI_interrupt_hook();
  acia_stat = acia.key_ctrl;
  /* check out if the interrupt came from this ACIA */
  if (!((acia_stat | acia.mid_ctrl) & ACIA_IRQ))
	return;

    if (acia_stat & ACIA_OVRN)
    {
	/* a very fast typist or a slow system, give a warning */
	/* ...happens often if interrupts were disabled for too long */
	printk( KERN_DEBUG "Keyboard overrun\n" );
	scancode = acia.key_data;
	/* Turn off autorepeating in case a break code has been lost */
	del_timer( &atakeyb_rep_timer );
	rep_scancode = 0;
	if (ikbd_self_test)
	    /* During self test, don't do resyncing, just process the code */
	    goto interpret_scancode;
	else if (IS_SYNC_CODE(scancode)) {
	    /* This code seem already to be the start of a new packet or a
	     * single scancode */
	    kb_state.state = KEYBOARD;
	    goto interpret_scancode;
	}
	else {
	    /* Go to RESYNC state and skip this byte */
	    kb_state.state = RESYNC;
	    kb_state.len = 1; /* skip max. 1 another byte */
	    goto repeat;
	}
    }

    if (acia_stat & ACIA_RDRF)	/* received a character */
    {
	scancode = acia.key_data;	/* get it or reset the ACIA, I'll get it! */
	tasklet_schedule(&keyboard_tasklet);
      interpret_scancode:
	switch (kb_state.state)
	{
	  case KEYBOARD:
	    switch (scancode)
	    {
	      case 0xF7:
		kb_state.state = AMOUSE;
		kb_state.len = 0;
		break;

	      case 0xF8:
	      case 0xF9:
     	      case 0xFA:
	      case 0xFB:
		kb_state.state = RMOUSE;
	    	kb_state.len = 1;
		kb_state.buf[0] = scancode;
		break;

	      case 0xFC:
		kb_state.state = CLOCK;
		kb_state.len = 0;
		break;

	      case 0xFE:
	      case 0xFF:
		kb_state.state = JOYSTICK;
		kb_state.len = 1;
		kb_state.buf[0] = scancode;
		break;

	      case 0xF1:
		/* during self-test, note that 0xf1 received */
		if (ikbd_self_test) {
		    ++ikbd_self_test;
		    self_test_last_rcv = jiffies;
		    break;
		}
		/* FALL THROUGH */
		
	      default:
		break_flag = scancode & BREAK_MASK;
		scancode &= ~BREAK_MASK;

		if (ikbd_self_test) {
		    /* Scancodes sent during the self-test stand for broken
		     * keys (keys being down). The code *should* be a break
		     * code, but nevertheless some AT keyboard interfaces send
		     * make codes instead. Therefore, simply ignore
		     * break_flag...
		     * */
		    int keyval = plain_map[scancode], keytyp;
		    
		    set_bit( scancode, broken_keys );
		    self_test_last_rcv = jiffies;
		    keyval = plain_map[scancode];
		    keytyp = KTYP(keyval) - 0xf0;
		    keyval = KVAL(keyval);

		    printk( KERN_WARNING "Key with scancode %d ", scancode );
		    if (keytyp == KT_LATIN || keytyp == KT_LETTER) {
			if (keyval < ' ')
			    printk( "('^%c') ", keyval + '@' );
			else
			    printk( "('%c') ", keyval );
		    }
		    printk( "is broken -- will be ignored.\n" );
		    break;
		}
		else if (test_bit( scancode, broken_keys ))
		    break;

		if (break_flag) {
		    del_timer( &atakeyb_rep_timer );
		    rep_scancode = 0;
		}
		else {
		    del_timer( &atakeyb_rep_timer );
		    rep_scancode = scancode;
		    atakeyb_rep_timer.expires = jiffies + key_repeat_delay;
		    add_timer( &atakeyb_rep_timer );
		}

		handle_scancode(scancode, !break_flag);
		break;
	    }
	    break;

	  case AMOUSE:
	    kb_state.buf[kb_state.len++] = scancode;
	    if (kb_state.len == 5)
	    {
		kb_state.state = KEYBOARD;
		/* not yet used */
		/* wake up someone waiting for this */
	    }
	    break;	

	  case RMOUSE:
	    kb_state.buf[kb_state.len++] = scancode;
	    if (kb_state.len == 3)
	    {
		kb_state.state = KEYBOARD;
		if (atari_mouse_interrupt_hook)
			atari_mouse_interrupt_hook(kb_state.buf);
	    }
	    break;

	  case JOYSTICK:
	    kb_state.buf[1] = scancode;
	    kb_state.state = KEYBOARD;
	    atari_joystick_interrupt(kb_state.buf);
	    break;

	  case CLOCK:
	    kb_state.buf[kb_state.len++] = scancode;
	    if (kb_state.len == 6)
	    {
		kb_state.state = KEYBOARD;
		/* wake up someone waiting for this.
		   But will this ever be used, as Linux keeps its own time.
		   Perhaps for synchronization purposes? */
		/* wake_up_interruptible(&clock_wait); */
	    }
	    break;

	  case RESYNC:
	    if (kb_state.len <= 0 || IS_SYNC_CODE(scancode)) {
		kb_state.state = KEYBOARD;
		goto interpret_scancode;
	    }
	    kb_state.len--;
	    break;
	}
    }

#if 0
    if (acia_stat & ACIA_CTS)
	/* cannot happen */;
#endif

    if (acia_stat & (ACIA_FE | ACIA_PE))
    {
	printk("Error in keyboard communication\n");
    }

    /* handle_scancode() can take a lot of time, so check again if
	 * some character arrived
	 */
    goto repeat;
}

/*
 * I write to the keyboard without using interrupts, I poll instead.
 * This takes for the maximum length string allowed (7) at 7812.5 baud
 * 8 data 1 start 1 stop bit: 9.0 ms
 * If this takes too long for normal operation, interrupt driven writing
 * is the solution. (I made a feeble attempt in that direction but I
 * kept it simple for now.)
 */
void ikbd_write(const char *str, int len)
{
    u_char acia_stat;

    if ((len < 1) || (len > 7))
	panic("ikbd: maximum string length exceeded");
    while (len)
    {
	acia_stat = acia.key_ctrl;
	if (acia_stat & ACIA_TDRE)
	{
	    acia.key_data = *str++;
	    len--;
	}
    }
}

/* Reset (without touching the clock) */
void ikbd_reset(void)
{
    static const char cmd[2] = { 0x80, 0x01 };
    
    ikbd_write(cmd, 2);

    /* if all's well code 0xF1 is returned, else the break codes of
       all keys making contact */
}

/* Set mouse button action */
void ikbd_mouse_button_action(int mode)
{
    char cmd[2] = { 0x07, mode };

    ikbd_write(cmd, 2);
}

/* Set relative mouse position reporting */
void ikbd_mouse_rel_pos(void)
{
    static const char cmd[1] = { 0x08 };

    ikbd_write(cmd, 1);
}

/* Set absolute mouse position reporting */
void ikbd_mouse_abs_pos(int xmax, int ymax)
{
    char cmd[5] = { 0x09, xmax>>8, xmax&0xFF, ymax>>8, ymax&0xFF };

    ikbd_write(cmd, 5);
}

/* Set mouse keycode mode */
void ikbd_mouse_kbd_mode(int dx, int dy)
{
    char cmd[3] = { 0x0A, dx, dy };

    ikbd_write(cmd, 3);
}

/* Set mouse threshold */
void ikbd_mouse_thresh(int x, int y)
{
    char cmd[3] = { 0x0B, x, y };

    ikbd_write(cmd, 3);
}

/* Set mouse scale */
void ikbd_mouse_scale(int x, int y)
{
    char cmd[3] = { 0x0C, x, y };

    ikbd_write(cmd, 3);
}

/* Interrogate mouse position */
void ikbd_mouse_pos_get(int *x, int *y)
{
    static const char cmd[1] = { 0x0D };

    ikbd_write(cmd, 1);

    /* wait for returning bytes */
}

/* Load mouse position */
void ikbd_mouse_pos_set(int x, int y)
{
    char cmd[6] = { 0x0E, 0x00, x>>8, x&0xFF, y>>8, y&0xFF };

    ikbd_write(cmd, 6);
}

/* Set Y=0 at bottom */
void ikbd_mouse_y0_bot(void)
{
    static const char cmd[1] = { 0x0F };

    ikbd_write(cmd, 1);
}

/* Set Y=0 at top */
void ikbd_mouse_y0_top(void)
{
    static const char cmd[1] = { 0x10 };

    ikbd_write(cmd, 1);
}

/* Resume */
void ikbd_resume(void)
{
    static const char cmd[1] = { 0x11 };

    ikbd_write(cmd, 1);
}

/* Disable mouse */
void ikbd_mouse_disable(void)
{
    static const char cmd[1] = { 0x12 };

    ikbd_write(cmd, 1);
}

/* Pause output */
void ikbd_pause(void)
{
    static const char cmd[1] = { 0x13 };

    ikbd_write(cmd, 1);
}

/* Set joystick event reporting */
void ikbd_joystick_event_on(void)
{
    static const char cmd[1] = { 0x14 };

    ikbd_write(cmd, 1);
}

/* Set joystick interrogation mode */
void ikbd_joystick_event_off(void)
{
    static const char cmd[1] = { 0x15 };

    ikbd_write(cmd, 1);
}

/* Joystick interrogation */
void ikbd_joystick_get_state(void)
{
    static const char cmd[1] = { 0x16 };

    ikbd_write(cmd, 1);
}

#if 0
/* This disables all other ikbd activities !!!! */
/* Set joystick monitoring */
void ikbd_joystick_monitor(int rate)
{
    static const char cmd[2] = { 0x17, rate };

    ikbd_write(cmd, 2);

    kb_state.state = JOYSTICK_MONITOR;
}
#endif

/* some joystick routines not in yet (0x18-0x19) */

/* Disable joysticks */
void ikbd_joystick_disable(void)
{
    static const char cmd[1] = { 0x1A };

    ikbd_write(cmd, 1);
}

/* Time-of-day clock set */
void ikbd_clock_set(int year, int month, int day, int hour, int minute, int second)
{
    char cmd[7] = { 0x1B, year, month, day, hour, minute, second };

    ikbd_write(cmd, 7);
}

/* Interrogate time-of-day clock */
void ikbd_clock_get(int *year, int *month, int *day, int *hour, int *minute, int second)
{
    static const char cmd[1] = { 0x1C };

    ikbd_write(cmd, 1);
}

/* Memory load */
void ikbd_mem_write(int address, int size, char *data)
{
    panic("Attempt to write data into keyboard memory");
}

/* Memory read */
void ikbd_mem_read(int address, char data[6])
{
    char cmd[3] = { 0x21, address>>8, address&0xFF };

    ikbd_write(cmd, 3);

    /* receive data and put it in data */
}

/* Controller execute */
void ikbd_exec(int address)
{
    char cmd[3] = { 0x22, address>>8, address&0xFF };

    ikbd_write(cmd, 3);
}

/* Status inquiries (0x87-0x9A) not yet implemented */

/* Set the state of the caps lock led. */
void atari_kbd_leds (unsigned int leds)
{
    char cmd[6] = {32, 0, 4, 1, 254 + ((leds & 4) != 0), 0};
    ikbd_write(cmd, 6);
}

/*
 * The original code sometimes left the interrupt line of 
 * the ACIAs low forever. I hope, it is fixed now.
 *
 * Martin Rogge, 20 Aug 1995
 */
 
int __init atari_keyb_init(void)
{
    /* setup key map */
    memcpy(key_maps[0], ataplain_map, sizeof(plain_map));
    memcpy(key_maps[1], atashift_map, sizeof(plain_map));
    memcpy(key_maps[4], atactrl_map, sizeof(plain_map));
    memcpy(key_maps[5], atashift_ctrl_map, sizeof(plain_map));
    memcpy(key_maps[8], ataalt_map, sizeof(plain_map));
    /* Atari doesn't have an altgr_map, so we can reuse its memory for
       atashift_alt_map */
    memcpy(key_maps[2], atashift_alt_map, sizeof(plain_map));
    key_maps[9]  = key_maps[2];
    key_maps[2]  = 0; /* ataaltgr_map */
    memcpy(key_maps[12], atactrl_alt_map, sizeof(plain_map));
    key_maps[13] = atashift_ctrl_alt_map;
    keymap_count = 8;

    /* say that we don't have an AltGr key */
    keyboard_type = KB_84;

    kb_state.state = KEYBOARD;
    kb_state.len = 0;

    request_irq(IRQ_MFP_ACIA, keyboard_interrupt, IRQ_TYPE_SLOW,
                "keyboard/mouse/MIDI", keyboard_interrupt);

    atari_turnoff_irq(IRQ_MFP_ACIA);
    do {
	/* reset IKBD ACIA */
	acia.key_ctrl = ACIA_RESET |
			(atari_switches & ATARI_SWITCH_IKBD) ? ACIA_RHTID : 0;
	(void)acia.key_ctrl;
	(void)acia.key_data;

	/* reset MIDI ACIA */
	acia.mid_ctrl = ACIA_RESET |
			(atari_switches & ATARI_SWITCH_MIDI) ? ACIA_RHTID : 0;
	(void)acia.mid_ctrl;
	(void)acia.mid_data;

	/* divide 500kHz by 64 gives 7812.5 baud */
	/* 8 data no parity 1 start 1 stop bit */
	/* receive interrupt enabled */
	/* RTS low (except if switch selected), transmit interrupt disabled */
	acia.key_ctrl = (ACIA_DIV64|ACIA_D8N1S|ACIA_RIE) |
			((atari_switches & ATARI_SWITCH_IKBD) ?
			 ACIA_RHTID : ACIA_RLTID);
	   
	acia.mid_ctrl = ACIA_DIV16 | ACIA_D8N1S |
			(atari_switches & ATARI_SWITCH_MIDI) ? ACIA_RHTID : 0;
    }
    /* make sure the interrupt line is up */
    while ((mfp.par_dt_reg & 0x10) == 0);

    /* enable ACIA Interrupts */ 
    mfp.active_edge &= ~0x10;
    atari_turnon_irq(IRQ_MFP_ACIA);

    ikbd_self_test = 1;
    ikbd_reset();
    /* wait for a period of inactivity (here: 0.25s), then assume the IKBD's
     * self-test is finished */
    self_test_last_rcv = jiffies;
    while (time_before(jiffies, self_test_last_rcv + HZ/4))
	barrier();
    /* if not incremented: no 0xf1 received */
    if (ikbd_self_test == 1)
	printk( KERN_ERR "WARNING: keyboard self test failed!\n" );
    ikbd_self_test = 0;
    
    ikbd_mouse_disable();
    ikbd_joystick_disable();

    atari_joystick_init();
  
    return 0;
}


int atari_kbdrate( struct kbd_repeat *k )

{
	if (k->delay > 0) {
		/* convert from msec to jiffies */
		key_repeat_delay = (k->delay * HZ + 500) / 1000;
		if (key_repeat_delay < 1)
			key_repeat_delay = 1;
	}
	if (k->rate > 0) {
		key_repeat_rate = (k->rate * HZ + 500) / 1000;
		if (key_repeat_rate < 1)
			key_repeat_rate = 1;
	}

	k->delay = key_repeat_delay * 1000 / HZ;
	k->rate  = key_repeat_rate  * 1000 / HZ;
	
	return( 0 );
}

int atari_kbd_translate(unsigned char keycode, unsigned char *keycodep, char raw_mode)
{
#ifdef CONFIG_MAGIC_SYSRQ
        /* ALT+HELP pressed? */
        if ((keycode == 98) && ((shift_state & 0xff) == 8))
                *keycodep = 0xff;
        else
#endif
                *keycodep = keycode;
        return 1;
}

/*
 * linux/arch/m68k/atari/atasound.c
 *
 * ++Geert: Moved almost all stuff to linux/drivers/sound/
 *
 * The author of atari_nosound, atari_mksound and atari_microwire_cmd is
 * unknown. (++roman: That's me... :-)
 *
 * This file is subject to the terms and conditions of the GNU General Public
 * License.  See the file COPYING in the main directory of this archive
 * for more details.
 *
 * 1998-05-31 ++andreas: atari_mksound rewritten to always use the envelope,
 *			 no timer, atari_nosound removed.
 *
 */


#include <linux/sched.h>
#include <linux/timer.h>
#include <linux/major.h>
#include <linux/fcntl.h>
#include <linux/errno.h>
#include <linux/mm.h>

#include <asm/atarihw.h>
#include <asm/system.h>
#include <asm/irq.h>
#include <asm/pgtable.h>
#include <asm/atariints.h>


/*
 * stuff from the old atasound.c
 */

void atari_microwire_cmd (int cmd)
{
	tt_microwire.mask = 0x7ff;
	tt_microwire.data = MW_LM1992_ADDR | cmd;

	/* Busy wait for data being completely sent :-( */
	while( tt_microwire.mask != 0x7ff)
		;
}


/* PSG base frequency */
#define	PSG_FREQ	125000
/* PSG envelope base frequency times 10 */
#define PSG_ENV_FREQ_10	78125

void atari_mksound (unsigned int hz, unsigned int ticks)
{
	/* Generates sound of some frequency for some number of clock
	   ticks.  */
	unsigned long flags;
	unsigned char tmp;
	int period;

	save_flags(flags);
	cli();


	/* Disable generator A in mixer control.  */
	sound_ym.rd_data_reg_sel = 7;
	tmp = sound_ym.rd_data_reg_sel;
	tmp |= 011;
	sound_ym.wd_data = tmp;

	if (hz) {
	    /* Convert from frequency value to PSG period value (base
	       frequency 125 kHz).  */
		
	    period = PSG_FREQ / hz;

	    if (period > 0xfff) period = 0xfff;

	/* Set generator A frequency to hz.  */
	sound_ym.rd_data_reg_sel = 0;
	sound_ym.wd_data = period & 0xff;
	sound_ym.rd_data_reg_sel = 1;
	sound_ym.wd_data = (period >> 8) & 0xf;
	if (ticks) {
		/* Set length of envelope (max 8 sec).  */
		int length = (ticks * PSG_ENV_FREQ_10) / HZ / 10;

		if (length > 0xffff) length = 0xffff;
		sound_ym.rd_data_reg_sel = 11;
		sound_ym.wd_data = length & 0xff;
		sound_ym.rd_data_reg_sel = 12;
		sound_ym.wd_data = length >> 8;
		/* Envelope form: max -> min single.  */
		sound_ym.rd_data_reg_sel = 13;
		sound_ym.wd_data = 0;
		/* Use envelope for generator A.  */
		sound_ym.rd_data_reg_sel = 8;
		sound_ym.wd_data = 0x10;
	} else {
		/* Set generator A level to maximum, no envelope.  */
		sound_ym.rd_data_reg_sel = 8;
		sound_ym.wd_data = 15;
	}
	/* Turn on generator A in mixer control.  */
	sound_ym.rd_data_reg_sel = 7;
	tmp &= ~1;
	sound_ym.wd_data = tmp;
	}
	restore_flags(flags);
}
/*
 *  linux/arch/m68k/atari/config.c
 *
 *  Copyright (C) 1994 Bjoern Brauel
 *
 *  5/2/94 Roman Hodek:
 *    Added setting of time_adj to get a better clock.
 *
 *  5/14/94 Roman Hodek:
 *    gettod() for TT 
 *
 *  5/15/94 Roman Hodek:
 *    hard_reset_now() for Atari (and others?)
 *
 *  94/12/30 Andreas Schwab:
 *    atari_sched_init fixed to get precise clock.
 *
 * This file is subject to the terms and conditions of the GNU General Public
 * License.  See the file COPYING in the main directory of this archive
 * for more details.
 */

/*
 * Miscellaneous atari stuff
 */

#include <linux/config.h>
#include <linux/types.h>
#include <linux/mm.h>
#include <linux/console.h>
#include <linux/init.h>
#include <linux/delay.h>
#include <linux/ioport.h>

#include <asm/bootinfo.h>
#include <asm/setup.h>
#include <asm/atarihw.h>
#include <asm/atariints.h>
#include <asm/atari_stram.h>
#include <asm/system.h>
#include <asm/machdep.h>
#include <asm/hwtest.h>
#include <asm/io.h>

u_long atari_mch_cookie;
u_long atari_mch_type = 0;
struct atari_hw_present atari_hw_present;
u_long atari_switches = 0;
int atari_dont_touch_floppy_select = 0;
int atari_rtc_year_offset;

/* local function prototypes */
static void atari_reset( void );
#ifdef CONFIG_ATARI_FLOPPY
extern void atari_floppy_setup(char *, int *);
#endif
static void atari_get_model(char *model);
static int atari_get_hardware_list(char *buffer);

/* atari specific keyboard functions */
extern int atari_keyb_init(void);
extern int atari_kbdrate (struct kbd_repeat *);
extern int atari_kbd_translate(unsigned char keycode, unsigned char *keycodep,
			       char raw_mode);
extern void atari_kbd_leds (unsigned int);
/* atari specific irq functions */
extern void atari_init_IRQ (void);
extern int atari_request_irq (unsigned int irq, void (*handler)(int, void *, struct pt_regs *),
                              unsigned long flags, const char *devname, void *dev_id);
extern void atari_free_irq (unsigned int irq, void *dev_id);
extern void atari_enable_irq (unsigned int);
extern void atari_disable_irq (unsigned int);
extern int atari_get_irq_list (char *buf);
extern void atari_mksound( unsigned int count, unsigned int ticks );
#ifdef CONFIG_HEARTBEAT
static void atari_heartbeat( int on );
#endif

/* atari specific timer functions (in time.c) */
extern void atari_sched_init(void (*)(int, void *, struct pt_regs *));
extern unsigned long atari_gettimeoffset (void);
extern void atari_mste_gettod (int *, int *, int *, int *, int *, int *);
extern void atari_tt_gettod (int *, int *, int *, int *, int *, int *);
extern int atari_mste_hwclk (int, struct hwclk_time *);
extern int atari_tt_hwclk (int, struct hwclk_time *);
extern int atari_mste_set_clock_mmss (unsigned long);
extern int atari_tt_set_clock_mmss (unsigned long);

/* atari specific debug functions (in debug.c) */
extern void atari_debug_init(void);

#ifdef CONFIG_MAGIC_SYSRQ
static char atari_sysrq_xlate[128] =
	"\000\0331234567890-=\177\t"					/* 0x00 - 0x0f */
	"qwertyuiop[]\r\000as"							/* 0x10 - 0x1f */
	"dfghjkl;'`\000\\zxcv"							/* 0x20 - 0x2f */
	"bnm,./\000\000\000 \000\201\202\203\204\205"	/* 0x30 - 0x3f */
	"\206\207\210\211\212\000\000\000\000\000-\000\000\000+\000"/* 0x40 - 0x4f */
	"\000\000\000\177\000\000\000\000\000\000\000\000\000\000\000\000" /* 0x50 - 0x5f */
	"\000\000\000()/*789456123"						/* 0x60 - 0x6f */
	"0.\r\000\000\000\000\000\000\000\000\000\000\000\000\000";	/* 0x70 - 0x7f */
#endif

extern void (*kd_mksound)(unsigned int, unsigned int);

/* I've moved hwreg_present() and hwreg_present_bywrite() out into
 * mm/hwtest.c, to avoid having multiple copies of the same routine
 * in the kernel [I wanted them in hp300 and they were already used
 * in the nubus code. NB: I don't have an Atari so this might (just
 * conceivably) break something.
 * I've preserved the #if 0 version of hwreg_present_bywrite() here
 * for posterity.
 *   -- Peter Maydell <pmaydell@chiark.greenend.org.uk>, 05/1998
 */
  
#if 0
static int __init
hwreg_present_bywrite(volatile void *regp, unsigned char val)
{
    int		ret;
    long	save_sp, save_vbr;
    static long tmp_vectors[3] = { 0, 0, (long)&&after_test };
	
    __asm__ __volatile__
	(	"movec	%/vbr,%2\n\t"	/* save vbr value            */
                "movec	%4,%/vbr\n\t"	/* set up temporary vectors  */
		"movel	%/sp,%1\n\t"	/* save sp                   */
		"moveq	#0,%0\n\t"	/* assume not present        */
		"moveb	%5,%3@\n\t"	/* write the hardware reg    */
		"cmpb	%3@,%5\n\t"	/* compare it                */
		"seq	%0"		/* comes here only if reg    */
                                        /* is present                */
		: "=d&" (ret), "=r&" (save_sp), "=r&" (save_vbr)
		: "a" (regp), "r" (tmp_vectors), "d" (val)
                );
  after_test:
    __asm__ __volatile__
      (	"movel	%0,%/sp\n\t"		/* restore sp                */
        "movec	%1,%/vbr"			/* restore vbr               */
        : : "r" (save_sp), "r" (save_vbr) : "sp"
	);

    return( ret );
}
#endif


/* ++roman: This is a more elaborate test for an SCC chip, since the plain
 * Medusa board generates DTACK at the SCC's standard addresses, but a SCC
 * board in the Medusa is possible. Also, the addresses where the ST_ESCC
 * resides generate DTACK without the chip, too.
 * The method is to write values into the interrupt vector register, that
 * should be readable without trouble (from channel A!).
 */

static int __init scc_test( volatile char *ctla )
{
	if (!hwreg_present( ctla ))
		return( 0 );
	MFPDELAY();

	*ctla = 2; MFPDELAY();
	*ctla = 0x40; MFPDELAY();
	
	*ctla = 2; MFPDELAY();
	if (*ctla != 0x40) return( 0 );
	MFPDELAY();

	*ctla = 2; MFPDELAY();
	*ctla = 0x60; MFPDELAY();
	
	*ctla = 2; MFPDELAY();
	if (*ctla != 0x60) return( 0 );

	return( 1 );
}


    /*
     *  Parse an Atari-specific record in the bootinfo
     */

int __init atari_parse_bootinfo(const struct bi_record *record)
{
    int unknown = 0;
    const u_long *data = record->data;

    switch (record->tag) {
	case BI_ATARI_MCH_COOKIE:
	    atari_mch_cookie = *data;
	    break;
	case BI_ATARI_MCH_TYPE:
	    atari_mch_type = *data;
	    break;
	default:
	    unknown = 1;
    }
    return(unknown);
}


/* Parse the Atari-specific switches= option. */
void __init atari_switches_setup( const char *str, unsigned len )
{
    char switches[len+1];
    char *p;
    int ovsc_shift;

    /* copy string to local array, strtok works destructively... */
    strncpy( switches, str, len );
    switches[len] = 0;
    atari_switches = 0;

    /* parse the options */
    for( p = strtok( switches, "," ); p; p = strtok( NULL, "," ) ) {
	ovsc_shift = 0;
	if (strncmp( p, "ov_", 3 ) == 0) {
	    p += 3;
	    ovsc_shift = ATARI_SWITCH_OVSC_SHIFT;
	}
	
	if (strcmp( p, "ikbd" ) == 0) {
	    /* RTS line of IKBD ACIA */
	    atari_switches |= ATARI_SWITCH_IKBD << ovsc_shift;
	}
	else if (strcmp( p, "midi" ) == 0) {
	    /* RTS line of MIDI ACIA */
	    atari_switches |= ATARI_SWITCH_MIDI << ovsc_shift;
	}
	else if (strcmp( p, "snd6" ) == 0) {
	    atari_switches |= ATARI_SWITCH_SND6 << ovsc_shift;
	}
	else if (strcmp( p, "snd7" ) == 0) {
	    atari_switches |= ATARI_SWITCH_SND7 << ovsc_shift;
	}
    }
}


    /*
     *  Setup the Atari configuration info
     */

void __init config_atari(void)
{
    unsigned short tos_version;

    memset(&atari_hw_present, 0, sizeof(atari_hw_present));

    atari_debug_init();

    ioport_resource.end  = 0xFFFFFFFF;  /* Change size of I/O space from 64KB
                                           to 4GB. */

    mach_sched_init      = atari_sched_init;
    mach_keyb_init       = atari_keyb_init;
    mach_kbdrate         = atari_kbdrate;
    mach_kbd_translate   = atari_kbd_translate;
    SYSRQ_KEY            = 0xff;
    mach_kbd_leds        = atari_kbd_leds;
    mach_init_IRQ        = atari_init_IRQ;
    mach_request_irq     = atari_request_irq;
    mach_free_irq        = atari_free_irq;
    enable_irq           = atari_enable_irq;
    disable_irq          = atari_disable_irq;
    mach_get_model	 = atari_get_model;
    mach_get_hardware_list = atari_get_hardware_list;
    mach_get_irq_list	 = atari_get_irq_list;
    mach_gettimeoffset   = atari_gettimeoffset;
    mach_reset           = atari_reset;
#ifdef CONFIG_ATARI_FLOPPY
    mach_floppy_setup	 = atari_floppy_setup;
#endif
#ifdef CONFIG_DUMMY_CONSOLE
    conswitchp	         = &dummy_con;
#endif
    mach_max_dma_address = 0xffffff;
    kd_mksound		 = atari_mksound;
#ifdef CONFIG_MAGIC_SYSRQ
    mach_sysrq_key = 98;          /* HELP */
    mach_sysrq_shift_state = 8;   /* Alt */
    mach_sysrq_shift_mask = 0xff; /* all modifiers except CapsLock */
    mach_sysrq_xlate = atari_sysrq_xlate;
#endif
#ifdef CONFIG_HEARTBEAT
    mach_heartbeat = atari_heartbeat;
#endif

    /* Set switches as requested by the user */
    if (atari_switches & ATARI_SWITCH_IKBD)
	acia.key_ctrl = ACIA_DIV64 | ACIA_D8N1S | ACIA_RHTID;
    if (atari_switches & ATARI_SWITCH_MIDI)
	acia.mid_ctrl = ACIA_DIV16 | ACIA_D8N1S | ACIA_RHTID;
    if (atari_switches & (ATARI_SWITCH_SND6|ATARI_SWITCH_SND7)) {
	sound_ym.rd_data_reg_sel = 14;
	sound_ym.wd_data = sound_ym.rd_data_reg_sel |
			   ((atari_switches&ATARI_SWITCH_SND6) ? 0x40 : 0) |
			   ((atari_switches&ATARI_SWITCH_SND7) ? 0x80 : 0);
    }
	
    /* ++bjoern: 
     * Determine hardware present
     */

    printk( "Atari hardware found: " );
    if (MACH_IS_MEDUSA || MACH_IS_HADES) {
        /* There's no Atari video hardware on the Medusa, but all the
         * addresses below generate a DTACK so no bus error occurs! */
    }
    else if (hwreg_present( f030_xreg )) {
	ATARIHW_SET(VIDEL_SHIFTER);
        printk( "VIDEL " );
        /* This is a temporary hack: If there is Falcon video
         * hardware, we assume that the ST-DMA serves SCSI instead of
         * ACSI. In the future, there should be a better method for
         * this...
         */
	ATARIHW_SET(ST_SCSI);
        printk( "STDMA-SCSI " );
    }
    else if (hwreg_present( tt_palette )) {
	ATARIHW_SET(TT_SHIFTER);
        printk( "TT_SHIFTER " );
    }
    else if (hwreg_present( &shifter.bas_hi )) {
        if (hwreg_present( &shifter.bas_lo ) &&
	    (shifter.bas_lo = 0x0aau, shifter.bas_lo == 0x0aau)) {
	    ATARIHW_SET(EXTD_SHIFTER);
            printk( "EXTD_SHIFTER " );
        }
        else {
	    ATARIHW_SET(STND_SHIFTER);
            printk( "STND_SHIFTER " );
        }
    }
    if (hwreg_present( &mfp.par_dt_reg )) {
	ATARIHW_SET(ST_MFP);
        printk( "ST_MFP " );
    }
    if (hwreg_present( &tt_mfp.par_dt_reg )) {
	ATARIHW_SET(TT_MFP);
        printk( "TT_MFP " );
    }
    if (hwreg_present( &tt_scsi_dma.dma_addr_hi )) {
	ATARIHW_SET(SCSI_DMA);
        printk( "TT_SCSI_DMA " );
    }
    if (!MACH_IS_HADES && hwreg_present( &st_dma.dma_hi )) {
	ATARIHW_SET(STND_DMA);
        printk( "STND_DMA " );
    }
    if (MACH_IS_MEDUSA || /* The ST-DMA address registers aren't readable
			   * on all Medusas, so the test below may fail */
        (hwreg_present( &st_dma.dma_vhi ) &&
         (st_dma.dma_vhi = 0x55) && (st_dma.dma_hi = 0xaa) &&
         st_dma.dma_vhi == 0x55 && st_dma.dma_hi == 0xaa &&
         (st_dma.dma_vhi = 0xaa) && (st_dma.dma_hi = 0x55) &&
         st_dma.dma_vhi == 0xaa && st_dma.dma_hi == 0x55)) {
	ATARIHW_SET(EXTD_DMA);
        printk( "EXTD_DMA " );
    }
    if (hwreg_present( &tt_scsi.scsi_data )) {
	ATARIHW_SET(TT_SCSI);
        printk( "TT_SCSI " );
    }
    if (hwreg_present( &sound_ym.rd_data_reg_sel )) {
	ATARIHW_SET(YM_2149);
        printk( "YM2149 " );
    }
    if (!MACH_IS_MEDUSA && !MACH_IS_HADES &&
	hwreg_present( &tt_dmasnd.ctrl )) {
	ATARIHW_SET(PCM_8BIT);
        printk( "PCM " );
    }
    if (!MACH_IS_HADES && hwreg_present( &codec.unused5 )) {
	ATARIHW_SET(CODEC);
        printk( "CODEC " );
    }
    if (hwreg_present( &dsp56k_host_interface.icr )) {
	ATARIHW_SET(DSP56K);
        printk( "DSP56K " );
    }
    if (hwreg_present( &tt_scc_dma.dma_ctrl ) &&
#if 0
	/* This test sucks! Who knows some better? */
	(tt_scc_dma.dma_ctrl = 0x01, (tt_scc_dma.dma_ctrl & 1) == 1) &&
	(tt_scc_dma.dma_ctrl = 0x00, (tt_scc_dma.dma_ctrl & 1) == 0)
#else
	!MACH_IS_MEDUSA && !MACH_IS_HADES
#endif
	) {
	ATARIHW_SET(SCC_DMA);
        printk( "SCC_DMA " );
    }
    if (scc_test( &scc.cha_a_ctrl )) {
	ATARIHW_SET(SCC);
        printk( "SCC " );
    }
    if (scc_test( &st_escc.cha_b_ctrl )) {
	ATARIHW_SET( ST_ESCC );
	printk( "ST_ESCC " );
    }
    if (MACH_IS_HADES)
    {
        ATARIHW_SET( VME );
        printk( "VME " );
    }
    else if (hwreg_present( &tt_scu.sys_mask )) {
	ATARIHW_SET(SCU);
	/* Assume a VME bus if there's a SCU */
	ATARIHW_SET( VME );
        printk( "VME SCU " );
    }
    if (hwreg_present( (void *)(0xffff9210) )) {
	ATARIHW_SET(ANALOG_JOY);
        printk( "ANALOG_JOY " );
    }
    if (!MACH_IS_HADES && hwreg_present( blitter.halftone )) {
	ATARIHW_SET(BLITTER);
        printk( "BLITTER " );
    }
    if (hwreg_present((void *)0xfff00039)) {
	ATARIHW_SET(IDE);
        printk( "IDE " );
    }
#if 1 /* This maybe wrong */
    if (!MACH_IS_MEDUSA && !MACH_IS_HADES &&
	hwreg_present( &tt_microwire.data ) &&
	hwreg_present( &tt_microwire.mask ) &&
	(tt_microwire.mask = 0x7ff,
	 udelay(1),
	 tt_microwire.data = MW_LM1992_PSG_HIGH | MW_LM1992_ADDR,
	 udelay(1),
	 tt_microwire.data != 0)) {
	ATARIHW_SET(MICROWIRE);
	while (tt_microwire.mask != 0x7ff) ;
        printk( "MICROWIRE " );
    }
#endif
    if (hwreg_present( &tt_rtc.regsel )) {
	ATARIHW_SET(TT_CLK);
        printk( "TT_CLK " );
        mach_gettod = atari_tt_gettod;
        mach_hwclk = atari_tt_hwclk;
        mach_set_clock_mmss = atari_tt_set_clock_mmss;
    }
    if (!MACH_IS_HADES && hwreg_present( &mste_rtc.sec_ones)) {
	ATARIHW_SET(MSTE_CLK);
        printk( "MSTE_CLK ");
        mach_gettod = atari_mste_gettod;
        mach_hwclk = atari_mste_hwclk;
        mach_set_clock_mmss = atari_mste_set_clock_mmss;
    }
    if (!MACH_IS_MEDUSA && !MACH_IS_HADES &&
	hwreg_present( &dma_wd.fdc_speed ) &&
	hwreg_write( &dma_wd.fdc_speed, 0 )) {
	    ATARIHW_SET(FDCSPEED);
	    printk( "FDC_SPEED ");
    }
    if (!MACH_IS_HADES && !ATARIHW_PRESENT(ST_SCSI)) {
	ATARIHW_SET(ACSI);
        printk( "ACSI " );
    }
    printk("\n");

    if (CPU_IS_040_OR_060)
        /* Now it seems to be safe to turn of the tt0 transparent
         * translation (the one that must not be turned off in
         * head.S...)
         */
        __asm__ volatile ("moveq #0,%/d0\n\t"
                          ".chip 68040\n\t"
			  "movec %%d0,%%itt0\n\t"
			  "movec %%d0,%%dtt0\n\t"
			  ".chip 68k"
						  : /* no outputs */
						  : /* no inputs */
						  : "d0");
	
    /* allocator for memory that must reside in st-ram */
    atari_stram_init ();

    /* Set up a mapping for the VMEbus address region:
     *
     * VME is either at phys. 0xfexxxxxx (TT) or 0xa00000..0xdfffff
     * (MegaSTE) In both cases, the whole 16 MB chunk is mapped at
     * 0xfe000000 virt., because this can be done with a single
     * transparent translation. On the 68040, lots of often unused
     * page tables would be needed otherwise. On a MegaSTE or similar,
     * the highest byte is stripped off by hardware due to the 24 bit
     * design of the bus.
     */

    if (CPU_IS_020_OR_030) {
        unsigned long	tt1_val;
        tt1_val = 0xfe008543;	/* Translate 0xfexxxxxx, enable, cache
                                 * inhibit, read and write, FDC mask = 3,
                                 * FDC val = 4 -> Supervisor only */
        __asm__ __volatile__ ( ".chip 68030\n\t"
				"pmove	%0@,%/tt1\n\t"
				".chip 68k"
				: : "a" (&tt1_val) );
    }
    else {
        __asm__ __volatile__
            ( "movel %0,%/d0\n\t"
	      ".chip 68040\n\t"
	      "movec %%d0,%%itt1\n\t"
	      "movec %%d0,%%dtt1\n\t"
	      ".chip 68k"
              :
              : "g" (0xfe00a040)	/* Translate 0xfexxxxxx, enable,
                                         * supervisor only, non-cacheable/
                                         * serialized, writable */
              : "d0" );

    }

    /* Fetch tos version at Physical 2 */
    /* We my not be able to access this address if the kernel is
       loaded to st ram, since the first page is unmapped.  On the
       Medusa this is always the case and there is nothing we can do
       about this, so we just assume the smaller offset.  For the TT
       we use the fact that in head.S we have set up a mapping
       0xFFxxxxxx -> 0x00xxxxxx, so that the first 16MB is accessible
       in the last 16MB of the address space. */
    tos_version = (MACH_IS_MEDUSA || MACH_IS_HADES) ?
		  0xfff : *(unsigned short *)0xff000002;
    atari_rtc_year_offset = (tos_version < 0x306) ? 70 : 68;
}

#ifdef CONFIG_HEARTBEAT
static void atari_heartbeat( int on )
{
    unsigned char tmp;
    unsigned long flags;

    if (atari_dont_touch_floppy_select)
	return;
    
    save_flags(flags);
    cli();
    sound_ym.rd_data_reg_sel = 14; /* Select PSG Port A */
    tmp = sound_ym.rd_data_reg_sel;
    sound_ym.wd_data = on ? (tmp & ~0x02) : (tmp | 0x02);
    restore_flags(flags);
}
#endif

/* ++roman:
 *
 * This function does a reset on machines that lack the ability to
 * assert the processor's _RESET signal somehow via hardware. It is
 * based on the fact that you can find the initial SP and PC values
 * after a reset at physical addresses 0 and 4. This works pretty well
 * for Atari machines, since the lowest 8 bytes of physical memory are
 * really ROM (mapped by hardware). For other 680x0 machines: don't
 * know if it works...
 *
 * To get the values at addresses 0 and 4, the MMU better is turned
 * off first. After that, we have to jump into physical address space
 * (the PC before the pmove statement points to the virtual address of
 * the code). Getting that physical address is not hard, but the code
 * becomes a bit complex since I've tried to ensure that the jump
 * statement after the pmove is in the cache already (otherwise the
 * processor can't fetch it!). For that, the code first jumps to the
 * jump statement with the (virtual) address of the pmove section in
 * an address register . The jump statement is surely in the cache
 * now. After that, that physical address of the reset code is loaded
 * into the same address register, pmove is done and the same jump
 * statements goes to the reset code. Since there are not many
 * statements between the two jumps, I hope it stays in the cache.
 *
 * The C code makes heavy use of the GCC features that you can get the
 * address of a C label. No hope to compile this with another compiler
 * than GCC!
 */
  
/* ++andreas: no need for complicated code, just depend on prefetch */

static void atari_reset (void)
{
    long tc_val = 0;
    long reset_addr;

    /* On the Medusa, phys. 0x4 may contain garbage because it's no
       ROM.  See above for explanation why we cannot use PTOV(4). */
    reset_addr = MACH_IS_HADES ? 0x7fe00030 :
                 MACH_IS_MEDUSA || MACH_IS_AB40 ? 0xe00030 :
		 *(unsigned long *) 0xff000004;

    /* reset ACIA for switch off OverScan, if it's active */
    if (atari_switches & ATARI_SWITCH_OVSC_IKBD)
	acia.key_ctrl = ACIA_RESET;
    if (atari_switches & ATARI_SWITCH_OVSC_MIDI)
	acia.mid_ctrl = ACIA_RESET;
    
    /* processor independent: turn off interrupts and reset the VBR;
     * the caches must be left enabled, else prefetching the final jump
     * instruction doesn't work. */
    cli();
    __asm__ __volatile__
	("moveq	#0,%/d0\n\t"
	 "movec	%/d0,%/vbr"
	 : : : "d0" );
    
    if (CPU_IS_040_OR_060) {
        unsigned long jmp_addr040 = virt_to_phys(&&jmp_addr_label040);
	if (CPU_IS_060) {
	    /* 68060: clear PCR to turn off superscalar operation */
	    __asm__ __volatile__
		("moveq	#0,%/d0\n\t"
		 ".chip 68060\n\t"
		 "movec %%d0,%%pcr\n\t"
		 ".chip 68k"
		 : : : "d0" );
	}
	    
        __asm__ __volatile__
            ("movel    %0,%/d0\n\t"
             "andl     #0xff000000,%/d0\n\t"
             "orw      #0xe020,%/d0\n\t"   /* map 16 MB, enable, cacheable */
             ".chip 68040\n\t"
	     "movec    %%d0,%%itt0\n\t"
             "movec    %%d0,%%dtt0\n\t"
	     ".chip 68k\n\t"
             "jmp   %0@\n\t"
             : /* no outputs */
             : "a" (jmp_addr040)
             : "d0" );
      jmp_addr_label040:
        __asm__ __volatile__
          ("moveq #0,%/d0\n\t"
	   "nop\n\t"
	   ".chip 68040\n\t"
	   "cinva %%bc\n\t"
	   "nop\n\t"
	   "pflusha\n\t"
	   "nop\n\t"
	   "movec %%d0,%%tc\n\t"
	   "nop\n\t"
	   /* the following setup of transparent translations is needed on the
	    * Afterburner040 to successfully reboot. Other machines shouldn't
	    * care about a different tt regs setup, they also didn't care in
	    * the past that the regs weren't turned off. */
	   "movel #0xffc000,%%d0\n\t" /* whole insn space cacheable */
	   "movec %%d0,%%itt0\n\t"
	   "movec %%d0,%%itt1\n\t"
	   "orw   #0x40,%/d0\n\t" /* whole data space non-cacheable/ser. */
	   "movec %%d0,%%dtt0\n\t"
	   "movec %%d0,%%dtt1\n\t"
	   ".chip 68k\n\t"
           "jmp %0@"
           : /* no outputs */
           : "a" (reset_addr)
           : "d0");
    }
    else
        __asm__ __volatile__
            ("pmove %0@,%/tc\n\t"
             "jmp %1@"
             : /* no outputs */
             : "a" (&tc_val), "a" (reset_addr));
}


static void atari_get_model(char *model)
{
    strcpy(model, "Atari ");
    switch (atari_mch_cookie >> 16) {
	case ATARI_MCH_ST:
	    if (ATARIHW_PRESENT(MSTE_CLK))
		strcat (model, "Mega ST");
	    else
		strcat (model, "ST");
	    break;
	case ATARI_MCH_STE:
	    if (MACH_IS_MSTE)
		strcat (model, "Mega STE");
	    else
		strcat (model, "STE");
	    break;
	case ATARI_MCH_TT:
	    if (MACH_IS_MEDUSA)
		/* Medusa has TT _MCH cookie */
		strcat (model, "Medusa");
	    else if (MACH_IS_HADES)
		strcat(model, "Hades");
	    else
		strcat (model, "TT");
	    break;
	case ATARI_MCH_FALCON:
	    strcat (model, "Falcon");
	    if (MACH_IS_AB40)
		strcat (model, " (with Afterburner040)");
	    break;
	default:
	    sprintf (model + strlen (model), "(unknown mach cookie 0x%lx)",
		     atari_mch_cookie);
	    break;
    }
}


static int atari_get_hardware_list(char *buffer)
{
    int len = 0, i;

    for (i = 0; i < m68k_num_memory; i++)
	len += sprintf (buffer+len, "\t%3ld MB at 0x%08lx (%s)\n",
			m68k_memory[i].size >> 20, m68k_memory[i].addr,
			(m68k_memory[i].addr & 0xff000000 ?
			 "alternate RAM" : "ST-RAM"));

#define ATARIHW_ANNOUNCE(name,str)				\
    if (ATARIHW_PRESENT(name))			\
	len += sprintf (buffer + len, "\t%s\n", str)

    len += sprintf (buffer + len, "Detected hardware:\n");
    ATARIHW_ANNOUNCE(STND_SHIFTER, "ST Shifter");
    ATARIHW_ANNOUNCE(EXTD_SHIFTER, "STe Shifter");
    ATARIHW_ANNOUNCE(TT_SHIFTER, "TT Shifter");
    ATARIHW_ANNOUNCE(VIDEL_SHIFTER, "Falcon Shifter");
    ATARIHW_ANNOUNCE(YM_2149, "Programmable Sound Generator");
    ATARIHW_ANNOUNCE(PCM_8BIT, "PCM 8 Bit Sound");
    ATARIHW_ANNOUNCE(CODEC, "CODEC Sound");
    ATARIHW_ANNOUNCE(TT_SCSI, "SCSI Controller NCR5380 (TT style)");
    ATARIHW_ANNOUNCE(ST_SCSI, "SCSI Controller NCR5380 (Falcon style)");
    ATARIHW_ANNOUNCE(ACSI, "ACSI Interface");
    ATARIHW_ANNOUNCE(IDE, "IDE Interface");
    ATARIHW_ANNOUNCE(FDCSPEED, "8/16 Mhz Switch for FDC");
    ATARIHW_ANNOUNCE(ST_MFP, "Multi Function Peripheral MFP 68901");
    ATARIHW_ANNOUNCE(TT_MFP, "Second Multi Function Peripheral MFP 68901");
    ATARIHW_ANNOUNCE(SCC, "Serial Communications Controller SCC 8530");
    ATARIHW_ANNOUNCE(ST_ESCC, "Extended Serial Communications Controller SCC 85230");
    ATARIHW_ANNOUNCE(ANALOG_JOY, "Paddle Interface");
    ATARIHW_ANNOUNCE(MICROWIRE, "MICROWIRE(tm) Interface");
    ATARIHW_ANNOUNCE(STND_DMA, "DMA Controller (24 bit)");
    ATARIHW_ANNOUNCE(EXTD_DMA, "DMA Controller (32 bit)");
    ATARIHW_ANNOUNCE(SCSI_DMA, "DMA Controller for NCR5380");
    ATARIHW_ANNOUNCE(SCC_DMA, "DMA Controller for SCC");
    ATARIHW_ANNOUNCE(TT_CLK, "Clock Chip MC146818A");
    ATARIHW_ANNOUNCE(MSTE_CLK, "Clock Chip RP5C15");
    ATARIHW_ANNOUNCE(SCU, "System Control Unit");
    ATARIHW_ANNOUNCE(BLITTER, "Blitter");
    ATARIHW_ANNOUNCE(VME, "VME Bus");
    ATARIHW_ANNOUNCE(DSP56K, "DSP56001 processor");

    return(len);
}

/*
 * Local variables:
 *  c-indent-level: 4
 *  tab-width: 8
 * End:
 */
/*
 * Atari Joystick Driver for Linux
 * by Robert de Vries (robert@and.nl) 19Jul93
 *
 * 16 Nov 1994 Andreas Schwab
 * Support for three button mouse (shamelessly stolen from MiNT)
 * third button wired to one of the joystick directions on joystick 1
 */

#include <linux/sched.h>
#include <linux/errno.h>
#include <linux/major.h>
#include <linux/poll.h>
#include <linux/init.h>
#include <linux/devfs_fs_kernel.h>
#include <linux/smp_lock.h>

#include <asm/atarikb.h>
#include <asm/atari_joystick.h>
#include <asm/uaccess.h>

#define MAJOR_NR    JOYSTICK_MAJOR

#define	ANALOG_JOY(n)	(!(n & 0x80))
#define	DIGITAL_JOY(n)	(n & 0x80)
#define	DEVICE_NR(n)	(MINOR(n) & 0x7f)


static struct joystick_status joystick[2];
int atari_mouse_buttons; /* for three-button mouse */

void atari_joystick_interrupt(char *buf)
{
    int j;
/*    ikbd_joystick_disable(); */

    j = buf[0] & 0x1;
    joystick[j].dir   = buf[1] & 0xF;
    joystick[j].fire  = (buf[1] & 0x80) >> 7;
    joystick[j].ready = 1;
    wake_up_interruptible(&joystick[j].wait);

    /* For three-button mouse emulation fake a mouse packet */
    if (atari_mouse_interrupt_hook &&
	j == 1 && (buf[1] & 1) != ((atari_mouse_buttons & 2) >> 1))
      {
	char faked_packet[3];

	atari_mouse_buttons = (atari_mouse_buttons & 5) | ((buf[1] & 1) << 1);
	faked_packet[0] = (atari_mouse_buttons & 1) | 
			  (atari_mouse_buttons & 4 ? 2 : 0);
	faked_packet[1] = 0;
	faked_packet[2] = 0;
	atari_mouse_interrupt_hook (faked_packet);
      }

/*    ikbd_joystick_event_on(); */
}

static int release_joystick(struct inode *inode, struct file *file)
{
    int minor = DEVICE_NR(inode->i_rdev);

    lock_kernel();
    joystick[minor].active = 0;
    joystick[minor].ready = 0;

    if ((joystick[0].active == 0) && (joystick[1].active == 0))
	ikbd_joystick_disable();
    unlock_kernel();
    return 0;
}

static int open_joystick(struct inode *inode, struct file *file)
{
    int minor = DEVICE_NR(inode->i_rdev);

    if (!DIGITAL_JOY(inode->i_rdev) || minor > 1)
	return -ENODEV;
    if (joystick[minor].active)
	return -EBUSY;
    joystick[minor].active = 1;
    joystick[minor].ready = 0;
    ikbd_joystick_event_on();
    return 0;
}

static ssize_t write_joystick(struct file *file, const char *buffer,
			      size_t count, loff_t *ppos)
{
    return -EINVAL;
}

static ssize_t read_joystick(struct file *file, char *buffer, size_t count,
			     loff_t *ppos)
{
    struct inode *inode = file->f_dentry->d_inode;
    int minor = DEVICE_NR(inode->i_rdev);

    if (count < 2)
	return -EINVAL;
    if (!joystick[minor].ready)
	return -EAGAIN;
    joystick[minor].ready = 0;
    if (put_user(joystick[minor].fire, buffer++) ||
	put_user(joystick[minor].dir, buffer++))
	return -EFAULT;
    if (count > 2)
	if (clear_user(buffer, count - 2))
	    return -EFAULT;
    return count;
}

static unsigned int joystick_poll(struct file *file, poll_table *wait)
{
    int minor = DEVICE_NR(file->f_dentry->d_inode->i_rdev);

    poll_wait(file, &joystick[minor].wait, wait);
    if (joystick[minor].ready)
	return POLLIN | POLLRDNORM;
    return 0;
}

struct file_operations atari_joystick_fops = {
	read:		read_joystick,
	write:		write_joystick,
	poll:		joystick_poll,
	open:		open_joystick,
	release:	release_joystick,
};

int __init atari_joystick_init(void)
{
    joystick[0].active = joystick[1].active = 0;
    joystick[0].ready = joystick[1].ready = 0;
    init_waitqueue_head(&joystick[0].wait);
    init_waitqueue_head(&joystick[1].wait);

    if (devfs_register_chrdev(MAJOR_NR, "Joystick", &atari_joystick_fops))
	printk("unable to get major %d for joystick devices\n", MAJOR_NR);
    devfs_register_series (NULL, "joysticks/digital%u", 2, DEVFS_FL_DEFAULT,
			   MAJOR_NR, 128, S_IFCHR | S_IRUSR | S_IWUSR,
			   &atari_joystick_fops, NULL);

    return 0;
}
/*
 *  linux/arch/m68k/atari/stmda.c
 *
 *  Copyright (C) 1994 Roman Hodek
 *
 *
 * This file is subject to the terms and conditions of the GNU General Public
 * License.  See the file COPYING in the main directory of this archive
 * for more details.
 */


/* This file contains some function for controlling the access to the  */
/* ST-DMA chip that may be shared between devices. Currently we have:  */
/*   TT:     Floppy and ACSI bus                                       */
/*   Falcon: Floppy and SCSI                                           */
/*                                                                     */
/* The controlling functions set up a wait queue for access to the     */
/* ST-DMA chip. Callers to stdma_lock() that cannot granted access are */
/* put onto a queue and waked up later if the owner calls              */
/* stdma_release(). Additionally, the caller gives his interrupt       */
/* service routine to stdma_lock().                                    */
/*                                                                     */
/* On the Falcon, the IDE bus uses just the ACSI/Floppy interrupt, but */
/* not the ST-DMA chip itself. So falhd.c needs not to lock the        */
/* chip. The interrupt is routed to falhd.c if IDE is configured, the  */
/* model is a Falcon and the interrupt was caused by the HD controller */
/* (can be determined by looking at its status register).              */


#include <linux/types.h>
#include <linux/kdev_t.h>
#include <linux/genhd.h>
#include <linux/sched.h>
#include <linux/init.h>

#include <asm/atari_stdma.h>
#include <asm/atariints.h>
#include <asm/atarihw.h>
#include <asm/io.h>
#include <asm/irq.h>

static int stdma_locked = 0;			/* the semaphore */
						/* int func to be called */
static void (*stdma_isr)(int, void *, struct pt_regs *) = NULL;
static void	*stdma_isr_data = NULL;		/* data passed to isr */
static DECLARE_WAIT_QUEUE_HEAD(stdma_wait);	/* wait queue for ST-DMA */




/***************************** Prototypes *****************************/

static void stdma_int (int irq, void *dummy, struct pt_regs *fp);

/************************* End of Prototypes **************************/



/*
 * Function: void stdma_lock( isrfunc isr, void *data )
 *
 * Purpose: Tries to get a lock on the ST-DMA chip that is used by more
 *   then one device driver. Waits on stdma_wait until lock is free.
 *   stdma_lock() may not be called from an interrupt! You have to
 *   get the lock in your main routine and release it when your
 *   request is finished.
 *
 * Inputs: A interrupt function that is called until the lock is
 *   released.
 *
 * Returns: nothing
 *
 */

void stdma_lock(void (*handler)(int, void *, struct pt_regs *), void *data)
{
	unsigned long	oldflags;

	save_flags(oldflags);
	cli();		/* protect lock */

	while(stdma_locked)
		/* Since the DMA is used for file system purposes, we
		 have to sleep uninterruptible (there may be locked
		 buffers) */
		sleep_on(&stdma_wait);

	stdma_locked   = 1;
	stdma_isr      = handler;
	stdma_isr_data = data;
	restore_flags(oldflags);
}


/*
 * Function: void stdma_release( void )
 *
 * Purpose: Releases the lock on the ST-DMA chip. 
 *
 * Inputs: none
 *
 * Returns: nothing
 *
 */

void stdma_release(void)
{
	unsigned long	oldflags;

	save_flags(oldflags);
	cli();
	
	stdma_locked   = 0;
	stdma_isr      = NULL;
	stdma_isr_data = NULL;
	wake_up(&stdma_wait);

	restore_flags(oldflags);
}


/*
 * Function: int stdma_others_waiting( void )
 *
 * Purpose: Check if someone waits for the ST-DMA lock.
 *
 * Inputs: none
 *
 * Returns: 0 if no one is waiting, != 0 otherwise
 *
 */

int stdma_others_waiting(void)
{
	return waitqueue_active(&stdma_wait);
}


/*
 * Function: int stdma_islocked( void )
 *
 * Purpose: Check if the ST-DMA is currently locked.
 * Note: Returned status is only valid if ints are disabled while calling and
 *       as long as they remain disabled.
 *       If called with ints enabled, status can change only from locked to
 *       unlocked, because ints may not lock the ST-DMA.
 *
 * Inputs: none
 *
 * Returns: != 0 if locked, 0 otherwise
 *
 */

int stdma_islocked(void)
{
	return stdma_locked;
}


/*
 * Function: void stdma_init( void )
 *
 * Purpose: Initialize the ST-DMA chip access controlling.
 *   It sets up the interrupt and its service routine. The int is registered
 *   as slow int, client devices have to live with that (no problem
 *   currently).
 *
 * Inputs: none
 *
 * Return: nothing
 *
 */

void __init stdma_init(void)
{
	stdma_isr = NULL;
	request_irq(IRQ_MFP_FDC, stdma_int, IRQ_TYPE_SLOW,
	            "ST-DMA: floppy/ACSI/IDE/Falcon-SCSI", stdma_int);
}


/*
 * Function: void stdma_int()
 *
 * Purpose: The interrupt routine for the ST-DMA. It calls the isr
 *   registered by stdma_lock().
 *
 */

static void stdma_int(int irq, void *dummy, struct pt_regs *fp)
{
  if (stdma_isr)
      (*stdma_isr)(irq, stdma_isr_data, fp);
}
 = epc;
			break;
		}
		break;
	}

	return 0;
}
/*
 * This file is subject to the terms and conditions of the GNU General Public
 * License.  See the file "COPYING" in the main directory of this archive
 * for more details.
 *
 * Low level exception handling
 *
 * Copyright (C) 1994 - 2000, 2001 Ralf Baechle
 * Copyright (C) 1999, 2000 Silicon Graphics
 * Copyright (C) 2001 MIPS Technologies, Inc.
 */
#include <linux/config.h>

#include <asm/asm.h>
#include <asm/regdef.h>
#include <asm/mipsregs.h>
#include <asm/stackframe.h>

/* This duplicates the definition from <linux/sched.h> */
#define PT_TRACESYS	0x00000002		/* tracing system calls */

#define KU_USER 0x10

		.text
		.align 4
FEXPORT(ret_from_fork)
		move	a0, v0			# prev
		jal	schedule_tail
		lw	t0, TASK_PTRACE($28)	# syscall tracing enabled?
		andi	t0, PT_TRACESYS
		bnez	t0, tracesys_exit
		j	ret_from_sys_call

tracesys_exit:
		jal	syscall_trace
		b	ret_from_sys_call

EXPORT(ret_from_irq)
EXPORT(ret_from_exception)
		lw	t0, PT_STATUS(sp)	# returning to kernel mode?
		andi	t0, t0, KU_USER
		bnez	t0, ret_from_sys_call
		j	restore_all

reschedule:	jal	schedule 

FEXPORT(ret_from_sys_call)
		mfc0	t0, CP0_STATUS	# need_resched and signals atomic test
		ori	t0, t0, 1
		xori	t0, t0, 1
		mtc0	t0, CP0_STATUS

		ld	v0, TASK_NEED_RESCHED($28)
		lw	v1, TASK_SIGPENDING($28)
		bnez	v0, reschedule
		bnez	v1, signal_return

restore_all:	.set	noat
		RESTORE_ALL
		eret
		.set	at

signal_return:	.type	signal_return, @function

		mfc0	t0, CP0_STATUS
		ori	t0, t0, 1
		mtc0	t0, CP0_STATUS

		move	a0, zero
		move	a1, sp
		jal	do_signal
		b	restore_all

/*
 * Common spurious interrupt handler.
 */
		.text
		.align  5
LEAF(spurious_interrupt)
		/*
		 * Someone tried to fool us by sending an interrupt but we
		 * couldn't find a cause for it.
		 */
		lui     t1, %hi(irq_err_count)
1:		ll      t0, %lo(irq_err_count)(t1)
		addiu   t0, 1
		sc      t0, %lo(irq_err_count)(t1)
		beqz	t0, 1b
		j	ret_from_irq
		END(spurious_interrupt)
 fault.
	 */
	switch (handle_mm_fault(mm, vma, address, write)) {
	case 1:
		tsk->min_flt++;
		break;
	case 2:
		tsk->maj_flt++;
		break;
	case 0:
		goto do_sigbus;
	default:
		goto out_of_memory;
	}

	up_read(&mm->mmap_sem);
	return;

/*
 * Something tried to access memory that isn't in our memory map..
 * Fix it, but check if it's kernel or user first..
 */
bad_area:
	up_read(&mm->mmap_sem);

	if (user_mode(regs)) {
		tsk->thread.cp0_badvaddr = address;
		tsk->thread.error_code = write;
#if 0
		printk("do_page_fault() #2: sending SIGSEGV to %s for illegal %s\n"
		       "%08lx (epc == %08lx, ra == %08lx)\n",
		       tsk->comm,
		       write ? "write access to" : "read access from",
		       address,
		       (unsigned long) regs->cp0_epc,
		       (unsigned long) regs->regs[31]);
while(1);
#endif
		info.si_signo = SIGSEGV;
		info.si_errno = 0;
		/* info.si_code has been set above */
		info.si_addr = (void *) address;
		force_sig_info(SIGSEGV, &info, tsk);
		return;
	}

no_context:
	/* Are we prepared to handle this kernel fault?  */
	fixup = search_exception_table(regs->cp0_epc);
	if (fixup) {
		long new_epc;

		tsk->thread.cp0_baduaddr = address;
		new_epc = fixup_exception(dpf_reg, fixup, regs->cp0_epc);
		if (development_version)
			printk(KERN_DEBUG "%s: Exception at [<%lx>] (%lx)\n",
			       tsk->comm, regs->cp0_epc, new_epc);
		regs->cp0_epc = new_epc;
		return;
	}

	/*
	 * Oops. The kernel tried to access some bad page. We'll have to
	 * terminate things with extreme prejudice.
	 */

	bust_spinlocks(1);

	printk(KERN_ALERT "Cpu %d Unable to handle kernel paging request at "
	       "address %016lx, epc == %016lx, ra == %016lx\n",
	       smp_processor_id(), address, regs->cp0_epc, regs->regs[31]);
	die("Oops", regs, write);

/*
 * We ran out of memory, or some other thing happened to us that made
 * us unable to handle the page fault gracefully.
 */
out_of_memory:
	up_read(&mm->mmap_sem);
	if (tsk->pid == 1) {
		tsk->policy |= SCHED_YIELD;
		schedule();
		down_read(&mm->mmap_sem);
		goto survive;
	}
	printk("VM: killing process %s\n", tsk->comm);
	if (user_mode(regs))
		do_exit(SIGKILL);
	goto no_context;

do_sigbus:
	up_read(&mm->mmap_sem);

	/*
	 * Send a sigbus, regardless of whether we were in kernel
	 * or user mode.
	 */
	tsk->thread.cp0_badvaddr = address;
	info.si_signo = SIGBUS;
	info.si_errno = 0;
	info.si_code = BUS_ADRERR;
	info.si_addr = (void *) address;
	force_sig_info(SIGBUS, &info, tsk);

	/* Kernel mode? Handle exceptions or die */
	if (!user_mode(regs))
		goto no_context;

	return;

vmalloc_fault:
	panic("Pagefault for kernel virtual memory");
}
h \
   /home/me/kernel/linux/include/linux/proc_fs.h \
   /home/me/kernel/linux/include/linux/stat.h \
   /home/me/kernel/linux/include/linux/init.h \
   scsi.h \
   hosts.h \
   NCR53C9x.h \
   /home/me/kernel/linux/include/asm/system.h \
   /home/me/kernel/linux/include/asm/ptrace.h \
   /home/me/kernel/linux/include/asm/pgtable.h \
   /home/me/kernel/linux/include/asm/io.h \
   /home/me/kernel/linux/include/asm/irq.h \
   $(wildcard /home/me/kernel/linux/include/config/scsi/mac/esp.h) \
   $(wildcard /home/me/kernel/linux/include/config/smp.h)
NCR53C9x.h: \
   $(wildcard /home/me/kernel/linux/include/config/mac.h) \
   $(wildcard /home/me/kernel/linux/include/config/oktagon/scsi.h) \
   $(wildcard /home/me/kernel/linux/include/config/oktagon/scsi/module.h) \
   $(wildcard /home/me/kernel/linux/include/config/blz1230/scsi.h) \
   $(wildcard /home/me/kernel/linux/include/config/blz1230/scsi/module.h) \
   $(wildcard /home/me/kernel/linux/include/config/blz2060/scsi.h) \
   $(wildcard /home/me/kernel/linux/include/config/blz2060/scsi/module.h) \
   $(wildcard /home/me/kernel/linux/include/config/cyberstorm/scsi.h) \
   $(wildcard /home/me/kernel/linux/include/config/cyberstorm/scsi/module.h) \
   $(wildcard /home/me/kernel/linux/include/config/cyberstormii/scsi.h) \
   $(wildcard /home/me/kernel/linux/include/config/cyberstormii/scsi/module.h) \
   $(wildcard /home/me/kernel/linux/include/config/fastlane/scsi.h) \
   $(wildcard /home/me/kernel/linux/include/config/fastlane/scsi/module.h) \
   $(wildcard /home/me/kernel/linux/include/config/jazz/esp.h) \
   $(wildcard /home/me/kernel/linux/include/config/cpu/has/wb.h)
	@touch NCR53C9x.h
NCR53c406a.o: NCR53c406a.c \
   /home/me/kernel/linux/include/linux/module.h \
   /home/me/kernel/linux/include/linux/errno.h \
   /home/me/kernel/linux/include/linux/ioport.h \
   /home/me/kernel/linux/include/linux/sched.h \
   /home/me/kernel/linux/include/linux/interrupt.h \
   /home/me/kernel/linux/include/linux/proc_fs.h \
   /home/me/kernel/linux/include/linux/stat.h \
   /home/me/kernel/linux/include/linux/init.h \
   /home/me/kernel/linux/include/asm/io.h \
   /home/me/kernel/linux/include/asm/dma.h \
   /home/me/kernel/linux/include/asm/bitops.h \
   /home/me/kernel/linux/include/asm/irq.h \
   /home/me/kernel/linux/include/linux/blk.h \
   /home/me/kernel/linux/include/linux/spinlock.h \
   scsi.h \
   hosts.h \
   sd.h \
   NCR53c406a.h \
   scsi_module.c
NCR_D700.o: NCR_D700.c \
   /home/me/kernel/linux/include/linux/version.h \
   /home/me/kernel/linux/include/linux/kernel.h \
   /home/me/kernel/linux/include/linux/types.h \
   /home/me/kernel/linux/include/linux/string.h \
   /home/me/kernel/linux/include/linux/spinlock.h \
   /home/me/kernel/linux/include/linux/ioport.h \
   /home/me/kernel/linux/include/linux/delay.h \
   /home/me/kernel/linux/include/linux/sched.h \
   /home/me/kernel/linux/include/linux/proc_fs.h \
   /home/me/kernel/linux/include/linux/init.h \
   /home/me/kernel/linux/include/linux/mca.h \
   /home/me/kernel/linux/include/asm/dma.h \
   /home/me/kernel/linux/include/asm/system.h \
   /home/me/kernel/linux/include/asm/io.h \
   /home/me/kernel/linux/include/asm/pgtable.h \
   /home/me/kernel/linux/include/asm/byteorder.h \
   /home/me/kernel/linux/include/linux/blk.h \
   /home/me/kernel/linux/include/linux/module.h \
   scsi.h \
   hosts.h \
   constants.h \
   53c700.h \
   NCR_D700.h \
   $(wildcard /home/me/kernel/linux/include/config/mca.h) \
   scsi_module.c
a2091.o: a2091.c \
   /home/me/kernel/linux/include/linux/types.h \
   /home/me/kernel/linux/include/linux/mm.h \
   /home/me/kernel/linux/include/linux/blk.h \
   /home/me/kernel/linux/include/linux/sched.h \
   /home/me/kernel/linux/include/linux/version.h \
   /home/me/kernel/linux/include/linux/init.h \
   /home/me/kernel/linux/include/asm/setup.h \
   /home/me/kernel/linux/include/asm/page.h \
   /home/me/kernel/linux/include/asm/pgtable.h \
   /home/me/kernel/linux/include/linux/zorro.h \
   /home/me/kernel/linux/include/asm/irq.h \
   /home/me/kernel/linux/include/linux/spinlock.h \
   scsi.h \
   hosts.h \
   wd33c93.h \
   a2091.h \
   /home/me/kernel/linux/include/linux/stat.h \
   scsi_module.c
a2091.h: \
   /home/me/kernel/linux/include/linux/types.h
	@touch a2091.h
a3000.o: a3000.c \
   /home/me/kernel/linux/include/linux/types.h \
   /home/me/kernel/linux/include/linux/mm.h \
   /home/me/kernel/linux/include/linux/blk.h \
   /home/me/kernel/linux/include/linux/sched.h \
   /home/me/kernel/linux/include/linux/version.h \
   /home/me/kernel/linux/include/linux/ioport.h \
   /home/me/kernel/linux/include/linux/init.h \
   /home/me/kernel/linux/include/linux/spinlock.h \
   /home/me/kernel/linux/include/asm/setup.h \
   /home/me/kernel/linux/include/asm/page.h \
   /home/me/kernel/linux/include/asm/pgtable.h \
   /home/me/kernel/linux/include/asm/irq.h \
   scsi.h \
   hosts.h \
   wd33c93.h \
   a3000.h \
   /home/me/kernel/linux/include/linux/stat.h \
   scsi_module.c
a3000.h: \
   /home/me/kernel/linux/include/linux/types.h
	@touch a3000.h
advansys.o: advansys.c \
   /home/me/kernel/linux/include/linux/version.h \
   /home/me/kernel/linux/include/linux/module.h \
   $(wildcard /home/me/kernel/linux/include/config/x86.h) \
   $(wildcard /home/me/kernel/linux/include/config/isa.h) \
   /home/me/kernel/linux/include/linux/string.h \
   /home/me/kernel/linux/include/linux/sched.h \
   /home/me/kernel/linux/include/linux/kernel.h \
   /home/me/kernel/linux/include/linux/types.h \
   /home/me/kernel/linux/include/linux/ioport.h \
   /home/me/kernel/linux/include/linux/delay.h \
   /home/me/kernel/linux/include/linux/slab.h \
   /home/me/kernel/linux/include/linux/mm.h \
   /home/me/kernel/linux/include/linux/proc_fs.h \
   /home/me/kernel/linux/include/linux/init.h \
   /home/me/kernel/linux/include/asm/io.h \
   /home/me/kernel/linux/include/asm/system.h \
   /home/me/kernel/linux/include/asm/dma.h \
   /home/me/kernel/linux/include/linux/blk.h \
   /home/me/kernel/linux/include/linux/stat.h \
   /home/me/kernel/linux/include/linux/spinlock.h \
   /home/me/kernel/linux/include/asm/spinlock.h \
   scsi.h \
   hosts.h \
   sd.h \
   advansys.h \
   $(wildcard /home/me/kernel/linux/include/config/pci.h) \
   /home/me/kernel/linux/include/linux/pci.h \
   $(wildcard /home/me/kernel/linux/include/config/proc/fs.h) \
   scsi_module.c
advansys.h: \
   /home/me/kernel/linux/include/linux/version.h \
   $(wildcard /home/me/kernel/linux/include/config/proc/fs.h)
	@touch advansys.h
aha152x.o: aha152x.c \
   /home/me/kernel/linux/include/linux/module.h \
   /home/me/kernel/linux/include/linux/sched.h \
   /home/me/kernel/linux/include/asm/io.h \
   /home/me/kernel/linux/include/linux/blk.h \
   scsi.h \
   sd.h \
   hosts.h \
   constants.h \
   /home/me/kernel/linux/include/asm/system.h \
   /home/me/kernel/linux/include/linux/errno.h \
   /home/me/kernel/linux/include/linux/string.h \
   /home/me/kernel/linux/include/linux/wait.h \
   /home/me/kernel/linux/include/linux/ioport.h \
   /home/me/kernel/linux/include/linux/delay.h \
   /home/me/kernel/linux/include/linux/proc_fs.h \
   /home/me/kernel/linux/include/linux/interrupt.h \
   /home/me/kernel/linux/include/linux/init.h \
   /home/me/kernel/linux/include/linux/kernel.h \
   /home/me/kernel/linux/include/linux/isapnp.h \
   /home/me/kernel/linux/include/asm/semaphore.h \
   /home/me/kernel/linux/include/linux/spinlock.h \
   aha152x.h \
   /home/me/kernel/linux/include/linux/stat.h \
   /home/me/kernel/linux/include/scsi/scsicam.h \
   scsi_module.c
aha152x.h: \
   /home/me/kernel/linux/include/linux/blk.h \
   scsi.h \
   /home/me/kernel/linux/include/asm/io.h \
   /home/me/kernel/linux/include/linux/version.h
	@touch aha152x.h
aha1542.o: aha1542.c \
   /home/me/kernel/linux/include/linux/module.h \
   /home/me/kernel/linux/include/linux/kernel.h \
   /home/me/kernel/linux/include/linux/types.h \
   /home/me/kernel/linux/include/linux/string.h \
   /home/me/kernel/linux/include/linux/ioport.h \
   /home/me/kernel/linux/include/linux/delay.h \
   /home/me/kernel/linux/include/linux/sched.h \
   /home/me/kernel/linux/include/linux/proc_fs.h \
   /home/me/ke/*
 * This file is subject to the terms and conditions of the GNU General Public
 * License.  See the file "COPYING" in the main directory of this archive
 * for more details.
 *
 * Copyright (C) 1996 David S. Miller (dm@engr.sgi.com)
 * Copyright (C) 1997, 1999 Ralf Baechle (ralf@gnu.org)
 * Copyright (C) 1999 Silicon Graphics, Inc.
 */
#include <linux/config.h>
#include <linux/init.h>
#include <linux/kernel.h>
#include <linux/sched.h>
#include <linux/mm.h>

#include <asm/page.h>
#include <asm/pgtable.h>
#include <asm/system.h>
#include <asm/bootinfo.h>
#include <asm/cpu.h>

/* memory functions */
void (*_clear_page)(void * page);
void (*_copy_page)(void * to, void * from);

/* Cache operations. */
void (*_flush_cache_all)(void);
void (*___flush_cache_all)(void);
void (*_flush_cache_mm)(struct mm_struct *mm);
void (*_flush_cache_range)(struct mm_struct *mm, unsigned long start,
                           unsigned long end);
void (*_flush_cache_page)(struct vm_area_struct *vma, unsigned long page);
void (*_flush_cache_sigtramp)(unsigned long addr);
void (*_flush_icache_range)(unsigned long start, unsigned long end);
void (*_flush_icache_page)(struct vm_area_struct *vma, struct page *page);
void (*_flush_page_to_ram)(struct page * page);
void (*_flush_icache_all)(void);

/* MIPS specific cache operations */
void (*_flush_cache_l2)(void);
void (*_flush_cache_l1)(void);


/* DMA cache operations. */
void (*_dma_cache_wback_inv)(unsigned long start, unsigned long size);
void (*_dma_cache_wback)(unsigned long start, unsigned long size);
void (*_dma_cache_inv)(unsigned long start, unsigned long size);

/* Miscellaneous. */
void (*_update_mmu_cache)(struct vm_area_struct * vma,
	unsigned long address, pte_t pte);

extern void ld_mmu_r4xx0(void);
extern void ld_mmu_andes(void);
extern void ld_mmu_sb1(void);
extern void sb1_tlb_init(void);

void __init load_mmu(void)
{
	switch(mips_cpu.cputype) {
#if defined (CONFIG_CPU_R4300)						\
    || defined (CONFIG_CPU_R4X00)					\
    || defined (CONFIG_CPU_R5000)					\
    || defined (CONFIG_CPU_NEVADA)
	case CPU_R4000PC:
	case CPU_R4000SC:
	case CPU_R4000MC:
	case CPU_R4200:
	case CPU_R4300:
	case CPU_R4400PC:
	case CPU_R4400SC:
	case CPU_R4400MC:
	case CPU_R4600:
	case CPU_R4640:
	case CPU_R4650:
	case CPU_R4700:
	case CPU_R5000:
	case CPU_R5000A:
	case CPU_NEVADA:
		printk("Loading R4000 MMU routines.\n");
		ld_mmu_r4xx0();
		break;
#endif
#ifdef CONFIG_CPU_R10000
	case CPU_R10000:
		printk("Loading R10000 MMU routines.\n");
		ld_mmu_andes();
		break;
#endif
#if defined CONFIG_CPU_SB1
	case CPU_SB1:
		printk("Loading SB1 MMU routines.\n");
		ld_mmu_sb1();
		sb1_tlb_init();
		break;
#endif

	default:
		/* XXX We need an generic routine in the MIPS port
		 * XXX to jabber stuff onto the screen on all machines
		 * XXX before the console is setup.  The ARCS prom
		 * XXX routines look good for this, but only the SGI
		 * XXX code has a full library for that at this time.
		 */
		panic("Yeee, unsupported mmu/cache architecture or "
		      "wrong compiletime kernel configuration.");
	}
}
/*
 * Copyright (C) 1996 David S. Miller (dm@engr.sgi.com)
 * Copyright (C) 1997, 2001 Ralf Baechle (ralf@gnu.org)
 * Copyright (C) 2000 Sibyte
 * 
 * Written by Justin Carlson (carlson@sibyte.com)
 *
 *
 * This program is free software; you can redistribute it and/or
 * modify it under the terms of the GNU General Public License
 * as published by the Free Software Foundation; either version 2
 * of the License, or (at your option) any later version.
 *
 * This program is distributed in the hope that it will be useful,
 * but WITHOUT ANY WARRANTY; without even the implied warranty of
 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
 * GNU General Public License for more details.
 * 
 * You should have received a copy of the GNU General Public License
 * along with this program; if not, write to the Free Software
 * Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA  02111-1307, USA.
 */ 
#include <linux/config.h>
#include <asm/page.h>

#ifdef CONFIG_SB1_PASS_1_WORKAROUNDS
#define SB1_PREF_LOAD_STREAMED_HINT "0"
#define SB1_PREF_STORE_STREAMED_HINT "1"
#else
#define SB1_PREF_LOAD_STREAMED_HINT "4"
#define SB1_PREF_STORE_STREAMED_HINT "5"
#endif

/* These are the functions hooked by the memory management function pointers */
void sb1_clear_page(void *page)
{
	/*
	 * JDCXXX - This should be bottlenecked by the write buffer, but these
	 * things tend to be mildly unpredictable...should check this on the
	 * performance model
	 *
	 * We prefetch 4 lines ahead.  We're also "cheating" slightly here...
	 * since we know we're on an SB1, we force the assembler to take 
	 * 64-bit operands to speed things up
	 */
	__asm__ __volatile__(
		".set push                  \n"
		".set noreorder             \n"
		".set noat                  \n"
		".set mips4                 \n"
		"     daddiu     $1, %0, %2  \n"  /* Calculate the end of the page to clear */
		"     pref       " SB1_PREF_STORE_STREAMED_HINT ",  0(%0)  \n"  /* Prefetch the first 4 lines */
		"     pref       " SB1_PREF_STORE_STREAMED_HINT ", 32(%0)  \n"  
		"     pref       " SB1_PREF_STORE_STREAMED_HINT ", 64(%0)  \n"  
		"     pref       " SB1_PREF_STORE_STREAMED_HINT ", 96(%0)  \n"  
		"1:   sd        $0,  0(%0)  \n"  /* Throw out a cacheline of 0's */
		"     sd        $0,  8(%0)  \n"
		"     sd        $0, 16(%0)  \n"
		"     sd        $0, 24(%0)  \n"
		"     pref       " SB1_PREF_STORE_STREAMED_HINT ",128(%0)  \n"  /* Prefetch 4 lines ahead     */
		"     bne       $1, %0, 1b  \n"
		"      daddiu     %0, %0, 32\n"  /* Next cacheline (This instruction better be short piped!) */
		".set pop                   \n"
		: "=r" (page)
		: "0" (page), "I" (PAGE_SIZE-32)
		: "memory");

}

void sb1_copy_page(void *to, void *from)
{
	/*
	 * This should be optimized in assembly...can't use ld/sd, though,
	 * because the top 32 bits could be nuked if we took an interrupt
	 * during the routine.	And this is not a good place to be cli()'ing 
	 *
	 * The pref's used here are using "streaming" hints, which cause the
	 * copied data to be kicked out of the cache sooner.  A page copy often
	 * ends up copying a lot more data than is commonly used, so this seems
	 * to make sense in terms of reducing cache pollution, but I've no real
	 * performance data to back this up
	 */

	__asm__ __volatile__(
		".set push                  \n"
		".set noreorder             \n"
		".set noat                  \n"
		".set mips4                 \n"
		"     daddiu     $1, %0, %4  \n"  /* Calculate the end of the page to copy */
		"     pref       " SB1_PREF_LOAD_STREAMED_HINT  ",  0(%0)  \n"  /* Prefetch the first 3 lines */
		"     pref       " SB1_PREF_STORE_STREAMED_HINT ",  0(%1)  \n"  
		"     pref       " SB1_PREF_LOAD_STREAMED_HINT  ",  32(%0) \n"
		"     pref       " SB1_PREF_STORE_STREAMED_HINT ",  32(%1) \n"  
		"     pref       " SB1_PREF_LOAD_STREAMED_HINT  ",  64(%0) \n"
		"     pref       " SB1_PREF_STORE_STREAMED_HINT ",  64(%1) \n"  
		"1:   lw        $2,  0(%0)  \n"  /* Block copy a cacheline */
		"     lw        $3,  4(%0)  \n"
		"     lw        $4,  8(%0)  \n"
		"     lw        $5, 12(%0)  \n"
		"     lw        $6, 16(%0)  \n"
		"     lw        $7, 20(%0)  \n"
		"     lw        $8, 24(%0)  \n"
		"     lw        $9, 28(%0)  \n"
		"     pref       " SB1_PREF_LOAD_STREAMED_HINT  ", 96(%0)  \n"  /* Prefetch ahead         */
		"     pref       " SB1_PREF_STORE_STREAMED_HINT ", 96(%1)  \n"
		"     sw        $2,  0(%1)  \n"  
		"     sw        $3,  4(%1)  \n"
		"     sw        $4,  8(%1)  \n"
		"     sw        $5, 12(%1)  \n"
		"     sw        $6, 16(%1)  \n"
		"     sw        $7, 20(%1)  \n"
		"     sw        $8, 24(%1)  \n"
		"     sw        $9, 28(%1)  \n"		
		"     daddiu     %1, %1, 32  \n"  /* Next cacheline */
		"     nop                   \n"  /* Force next add to short pipe */
		"     nop                   \n"  /* Force next add to short pipe */
		"     bne       $1, %0, 1b  \n"
		"     daddiu     %0, %0, 32  \n"  /* Next cacheline */
		".set pop                   \n" 
		: "=r" (to), "=r" (from)
		: "0" (from), "1" (to), "I" (PAGE_SIZE-32)
		: "$2","$3","$4","$5","$6","$7","$8","$9","memory");
}
/*
 * Minor numbers for the sound driver.
 *
 * Unfortunately Creative called the codec chip of SB as a DSP. For this
 * reason the /dev/dsp is reserved for digitized audio use. There is a
 * device for true DSP processors but it will be called something else.
 * In v3.0 it's /dev/sndproc but this could be a temporary solution.
 */

#define SND_NDEVS	256	/* Number of supported devices */
#define SND_DEV_CTL	0	/* Control port /dev/mixer */
#define SND_DEV_SEQ	1	/* Sequencer output /dev/sequencer (FM
				   synthesizer and MIDI output) */
#define SND_DEV_MIDIN	2	/* Raw midi access */
#define SND_DEV_DSP	3	/* Digitized voice /dev/dsp */
#define SND_DEV_AUDIO	4	/* Sparc compatible /dev/audio */
#define SND_DEV_DSP16	5	/* Like /dev/dsp but 16 bits/sample */
#define SND_DEV_STATUS	6	/* /dev/sndstat */
/* #7 not in use now. Was in 2.4. Free for use after v3.0. */
#define SND_DEV_SEQ2	8	/* /dev/sequencer, level 2 interface */
#define SND_DEV_SNDPROC 9	/* /dev/sndproc for programmable devices */
#define SND_DEV_PSS	SND_DEV_SNDPROC

#define DSP_DEFAULT_SPEED	8000

#define ON		1
#define OFF		0

#define MAX_AUDIO_DEV	5
#define MAX_MIXER_DEV	2
#define MAX_SYNTH_DEV	3
#define MAX_MIDI_DEV	6
#define MAX_TIMER_DEV	3
/*
 * This file is subject to the terms and conditions of the GNU General Public
 * License.  See the file "COPYING" in the main directory of this archive
 * for more details.
 *
 * r4xx0.c: R4000 processor variant specific MMU/Cache routines.
 *
 * Copyright (C) 1996 David S. Miller (dm@engr.sgi.com)
 * Copyright (C) 1997, 1998, 1999, 2000, 2001 Ralf Baechle (ralf@gnu.org)
 * Copyright (C) 1999, 2000 Silicon Graphics, Inc.
 */
#include <linux/init.h>
#include <linux/kernel.h>
#include <linux/sched.h>
#include <linux/mm.h>

#include <asm/bcache.h>
#include <asm/io.h>
#include <asm/page.h>
#include <asm/pgtable.h>
#include <asm/system.h>
#include <asm/bootinfo.h>
#include <asm/mmu_context.h>
#include <asm/cpu.h>

/* CP0 hazard avoidance. */
#define BARRIER __asm__ __volatile__(".set noreorder\n\t" \
				     "nop; nop; nop; nop; nop; nop;\n\t" \
				     ".set reorder\n\t")

/* Primary cache parameters. */
static int icache_size, dcache_size; /* Size in bytes */
static int ic_lsize, dc_lsize;       /* LineSize in bytes */

/* Secondary cache (if present) parameters. */
static unsigned int scache_size, sc_lsize;	/* Again, in bytes */

#include <asm/r4kcacheops.h>
#include <asm/r4kcache.h>

#undef DEBUG_CACHE


/*
 * Dummy cache handling routines for machines without boardcaches
 */
static void no_sc_noop(void) {}

static struct bcache_ops no_sc_ops = {
	(void *)no_sc_noop, (void *)no_sc_noop,
	(void *)no_sc_noop, (void *)no_sc_noop
};

struct bcache_ops *bcops = &no_sc_ops;

/*
 * On processors with QED R4600 style two set assosicative cache
 * this is the bit which selects the way in the cache for the
 * indexed cachops.
 */
#define icache_waybit (icache_size >> 1)
#define dcache_waybit (dcache_size >> 1)

/*
 * Zero an entire page.  Basically a simple unrolled loop should do the
 * job but we want more performance by saving memory bus bandwidth.  We
 * have five flavours of the routine available for:
 *
 * - 16byte cachelines and no second level cache
 * - 32byte cachelines second level cache
 * - a version which handles the buggy R4600 v1.x
 * - a version which handles the buggy R4600 v2.0
 * - Finally a last version without fancy cache games for the SC and MC
 *   versions of R4000 and R4400.
 */

static void r4k_clear_page_d16(void * page)
{
	__asm__ __volatile__(
		".set\tnoreorder\n\t"
		".set\tnoat\n\t"
		"daddiu\t$1,%0,%2\n"
		"1:\tcache\t%3,(%0)\n\t"
		"sd\t$0,(%0)\n\t"
		"sd\t$0,8(%0)\n\t"
		"cache\t%3,16(%0)\n\t"
		"sd\t$0,16(%0)\n\t"
		"sd\t$0,24(%0)\n\t"
		"daddiu\t%0,64\n\t"
		"cache\t%3,-32(%0)\n\t"
		"sd\t$0,-32(%0)\n\t"
		"sd\t$0,-24(%0)\n\t"
		"cache\t%3,-16(%0)\n\t"
		"sd\t$0,-16(%0)\n\t"
		"bne\t$1,%0,1b\n\t"
		"sd\t$0,-8(%0)\n\t"
		".set\tat\n\t"
		".set\treorder"
		: "=r" (page)
		: "0" (page), "I" (PAGE_SIZE), "i" (Create_Dirty_Excl_D)
		: "memory");
}

static void r4k_clear_page_d32(void * page)
{
	__asm__ __volatile__(
		".set\tnoreorder\n\t"
		".set\tnoat\n\t"
		"daddiu\t$1,%0,%2\n"
		"1:\tcache\t%3,(%0)\n\t"
		"sd\t$0,(%0)\n\t"
		"sd\t$0,8(%0)\n\t"
		"sd\t$0,16(%0)\n\t"
		"sd\t$0,24(%0)\n\t"
		"daddiu\t%0,64\n\t"
		"cache\t%3,-32(%0)\n\t"
		"sd\t$0,-32(%0)\n\t"
		"sd\t$0,-24(%0)\n\t"
		"sd\t$0,-16(%0)\n\t"
		"bne\t$1,%0,1b\n\t"
		"sd\t$0,-8(%0)\n\t"
		".set\tat\n\t"
		".set\treorder"
		: "=r" (page)
		: "0" (page), "I" (PAGE_SIZE), "i" (Create_Dirty_Excl_D)
		: "memory");
}


/*
 * This flavour of r4k_clear_page is for the R4600 V1.x.  Cite from the
 * IDT R4600 V1.7 errata:
 *
 *  18. The CACHE instructions Hit_Writeback_Invalidate_D, Hit_Writeback_D,
 *      Hit_Invalidate_D and Create_Dirty_Excl_D should only be
 *      executed if there is no other dcache activity. If the dcache is
 *      accessed for another instruction immeidately preceding when these
 *      cache instructions are executing, it is possible that the dcache 
 *      tag match outputs used by these cache instructions will be 
 *      incorrect. These cache instructions should be preceded by at least
 *      four instructions that are not any kind of load or store 
 *      instruction.
 *
 *      This is not allowed:    lw
 *                              nop
 *                              nop
 *                              nop
 *                              cache       Hit_Writeback_Invalidate_D
 *
 *      This is allowed:        lw
 *                              nop
 *                              nop
 *                              nop
 *                              nop
 *                              cache       Hit_Writeback_Invalidate_D
 */
static void r4k_clear_page_r4600_v1(void * page)
{
	__asm__ __volatile__(
		".set\tnoreorder\n\t"
		".set\tnoat\n\t"
		"daddiu\t$1,%0,%2\n"
		"1:\tnop\n\t"
		"nop\n\t"
		"nop\n\t"
		"nop\n\t"
		"cache\t%3,(%0)\n\t"
		"sd\t$0,(%0)\n\t"
		"sd\t$0,8(%0)\n\t"
		"sd\t$0,16(%0)\n\t"
		"sd\t$0,24(%0)\n\t"
		"daddiu\t%0,64\n\t"
		"nop\n\t"
		"nop\n\t"
		"nop\n\t"
		"cache\t%3,-32(%0)\n\t"
		"sd\t$0,-32(%0)\n\t"
		"sd\t$0,-24(%0)\n\t"
		"sd\t$0,-16(%0)\n\t"
		"bne\t$1,%0,1b\n\t"
		"sd\t$0,-8(%0)\n\t"
		".set\tat\n\t"
		".set\treorder"
		: "=r" (page)
		: "0" (page), "I" (PAGE_SIZE), "i" (Create_Dirty_Excl_D)
		: "memory");
}

/*
 * And this one is for the R4600 V2.0
 */
static void r4k_clear_page_r4600_v2(void * page)
{
	unsigned int flags;

	__save_and_cli(flags);
	*(volatile unsigned int *)KSEG1;
	__asm__ __volatile__(
		".set\tnoreorder\n\t"
		".set\tnoat\n\t"
		"daddiu\t$1,%0,%2\n"
		"1:\tcache\t%3,(%0)\n\t"
		"sd\t$0,(%0)\n\t"
		"sd\t$0,8(%0)\n\t"
		"sd\t$0,16(%0)\n\t"
		"sd\t$0,24(%0)\n\t"
		"daddiu\t%0,64\n\t"
		"cache\t%3,-32(%0)\n\t"
		"sd\t$0,-32(%0)\n\t"
		"sd\t$0,-24(%0)\n\t"
		"sd\t$0,-16(%0)\n\t"
		"bne\t$1,%0,1b\n\t"
		"sd\t$0,-8(%0)\n\t"
		".set\tat\n\t"
		".set\treorder"
		: "=r" (page)
		: "0" (page), "I" (PAGE_SIZE), "i" (Create_Dirty_Excl_D)
		: "memory");
	__restore_flags(flags);
}

/*
 * The next 4 versions are optimized for all possible scache configurations
 * of the SC / MC versions of R4000 and R4400 ...
 *
 * Todo: For even better performance we should have a routine optimized for
 * every legal combination of dcache / scache linesize.  When I (Ralf) tried
 * this the kernel crashed shortly after mounting the root filesystem.  CPU
 * bug?  Weirdo cache instruction semantics?
 */
static void r4k_clear_page_s16(void * page)
{
	__asm__ __volatile__(
		".set\tnoreorder\n\t"
		".set\tnoat\n\t"
		"daddiu\t$1,%0,%2\n"
		"1:\tcache\t%3,(%0)\n\t"
		"sd\t$0,(%0)\n\t"
		"sd\t$0,8(%0)\n\t"
		"cache\t%3,16(%0)\n\t"
		"sd\t$0,16(%0)\n\t"
		"sd\t$0,24(%0)\n\t"
		"daddiu\t%0,64\n\t"
		"cache\t%3,-32(%0)\n\t"
		"sd\t$0,-32(%0)\n\t"
		"sd\t$0,-24(%0)\n\t"
		"cache\t%3,-16(%0)\n\t"
		"sd\t$0,-16(%0)\n\t"
		"bne\t$1,%0,1b\n\t"
		"sd\t$0,-8(%0)\n\t"
		".set\tat\n\t"
		".set\treorder"
		: "=r" (page)
		: "0" (page), "I" (PAGE_SIZE), "i" (Create_Dirty_Excl_SD)
		: "memory");
}

static void r4k_clear_page_s32(void * page)
{
	__asm__ __volatile__(
		".set\tnoreorder\n\t"
		".set\tnoat\n\t"
		"daddiu\t$1,%0,%2\n"
		"1:\tcache\t%3,(%0)\n\t"
		"sd\t$0,(%0)\n\t"
		"sd\t$0,8(%0)\n\t"
		"sd\t$0,16(%0)\n\t"
		"sd\t$0,24(%0)\n\t"
		"daddiu\t%0,64\n\t"
		"cache\t%3,-32(%0)\n\t"
		"sd\t$0,-32(%0)\n\t"
		"sd\t$0,-24(%0)\n\t"
		"sd\t$0,-16(%0)\n\t"
		"bne\t$1,%0,1b\n\t"
		"sd\t$0,-8(%0)\n\t"
		".set\tat\n\t"
		".set\treorder"
		: "=r" (page)
		: "0" (page), "I" (PAGE_SIZE), "i" (Create_Dirty_Excl_SD)
		: "memory");
}

static void r4k_clear_page_s64(void * page)
{
	__asm__ __volatile__(
		".set\tnoreorder\n\t"
		".set\tnoat\n\t"
		"daddiu\t$1,%0,%2\n"
		"1:\tcache\t%3,(%0)\n\t"
		"sd\t$0,(%0)\n\t"
		"sd\t$0,8(%0)\n\t"
		"sd\t$0,16(%0)\n\t"
		"sd\t$0,24(%0)\n\t"
		"daddiu\t%0,64\n\t"
		"sd\t$0,-32(%0)\n\t"
		"sd\t$0,-24(%0)\n\t"
		"sd\t$0,-16(%0)\n\t"
		"bne\t$1,%0,1b\n\t"
		"sd\t$0,-8(%0)\n\t"
		".set\tat\n\t"
		".set\treorder"
		: "=r" (page)
		: "0" (page), "I" (PAGE_SIZE), "i" (Create_Dirty_Excl_SD)
		: "memory");
}

static void r4k_clear_page_s128(void * page)
{
	__asm__ __volatile__(
		".set\tnoreorder\n\t"
		".set\tnoat\n\t"
		"daddiu\t$1,%0,%2\n"
		"1:\tcache\t%3,(%0)\n\t"
		"sd\t$0,(%0)\n\t"
		"sd\t$0,8(%0)\n\t"
		"sd\t$0,16(%0)\n\t"
		"sd\t$0,24(%0)\n\t"
		"sd\t$0,32(%0)\n\t"
		"sd\t$0,40(%0)\n\t"
		"sd\t$0,48(%0)\n\t"
		"sd\t$0,56(%0)\n\t"
		"daddiu\t%0,128\n\t"
		"sd\t$0,-64(%0)\n\t"
		"sd\t$0,-56(%0)\n\t"
		"sd\t$0,-48(%0)\n\t"
		"sd\t$0,-40(%0)\n\t"
		"sd\t$0,-32(%0)\n\t"
		"sd\t$0,-24(%0)\n\t"
		"sd\t$0,-16(%0)\n\t"
		"bne\t$1,%0,1b\n\t"
		"sd\t$0,-8(%0)\n\t"
		".set\tat\n\t"
		".set\treorder"
		: "=r" (page)
		: "0" (page), "I" (PAGE_SIZE), "i" (Create_Dirty_Excl_SD)
		: "memory");
}


/*
 * This is still inefficient.  We only can do better if we know the
 * virtual address where the copy will be accessed.
 */

static void r4k_copy_page_d16(void * to, void * from)
{
	unsigned long dummy1, dummy2, reg1, reg2;

	__asm__ __volatile__(
		".set\tnoreorder\n\t"
		".set\tnoat\n\t"
		"daddiu\t$1,%0,%6\n"
		"1:\tcache\t%7,(%0)\n\t"
		"ld\t%2,(%1)\n\t"
		"ld\t%3,8(%1)\n\t"
		"sd\t%2,(%0)\n\t"
		"sd\t%3,8(%0)\n\t"
		"cache\t%7,16(%0)\n\t"
		"ld\t%2,16(%1)\n\t"
		"ld\t%3,24(%1)\n\t"
		"sd\t%2,16(%0)\n\t"
		"sd\t%3,24(%0)\n\t"
		"cache\t%7,32(%0)\n\t"
		"daddiu\t%0,64\n\t"
		"daddiu\t%1,64\n\t"
		"ld\t%2,-32(%1)\n\t"
		"ld\t%3,-24(%1)\n\t"
		"sd\t%2,-32(%0)\n\t"
		"sd\t%3,-24(%0)\n\t"
		"cache\t%7,-16(%0)\n\t"
		"ld\t%2,-16(%1)\n\t"
		"ld\t%3,-8(%1)\n\t"
		"sd\t%2,-16(%0)\n\t"
		"bne\t$1,%0,1b\n\t"
		" sd\t%3,-8(%0)\n\t"
		".set\tat\n\t"
		".set\treorder"
		:"=r" (dummy1), "=r" (dummy2), "=&r" (reg1), "=&r" (reg2)
		:"0" (to), "1" (from), "I" (PAGE_SIZE),
		 "i" (Create_Dirty_Excl_D));
}

static void r4k_copy_page_d32(void * to, void * from)
{
	unsigned long dummy1, dummy2, reg1, reg2;

	__asm__ __volatile__(
		".set\tnoreorder\n\t"
		".set\tnoat\n\t"
		"daddiu\t$1,%0,%6\n"
		"1:\tcache\t%7,(%0)\n\t"
		"ld\t%2,(%1)\n\t"
		"ld\t%3,8(%1)\n\t"
		"sd\t%2,(%0)\n\t"
		"sd\t%3,8(%0)\n\t"
		"ld\t%2,16(%1)\n\t"
		"ld\t%3,24(%1)\n\t"
		"sd\t%2,16(%0)\n\t"
		"sd\t%3,24(%0)\n\t"
		"cache\t%7,32(%0)\n\t"
		"daddiu\t%0,64\n\t"
		"daddiu\t%1,64\n\t"
		"ld\t%2,-32(%1)\n\t"
		"ld\t%3,-24(%1)\n\t"
		"sd\t%2,-32(%0)\n\t"
		"sd\t%3,-24(%0)\n\t"
		"ld\t%2,-16(%1)\n\t"
		"ld\t%3,-8(%1)\n\t"
		"sd\t%2,-16(%0)\n\t"
		"bne\t$1,%0,1b\n\t"
		" sd\t%3,-8(%0)\n\t"
		".set\tat\n\t"
		".set\treorder"
		:"=r" (dummy1), "=r" (dummy2), "=&r" (reg1), "=&r" (reg2)
		:"0" (to), "1" (from), "I" (PAGE_SIZE),
		 "i" (Create_Dirty_Excl_D));
}

/*
 * Again a special version for the R4600 V1.x
 */
static void r4k_copy_page_r4600_v1(void * to, void * from)
{
	unsigned long dummy1, dummy2, reg1, reg2;

	__asm__ __volatile__(
		".set\tnoreorder\n\t"
		".set\tnoat\n\t"
		"daddiu\t$1,%0,%6\n"
		"1:\tnop\n\t"
		"nop\n\t"
		"nop\n\t"
		"nop\n\t"
		"\tcache\t%7,(%0)\n\t"
		"ld\t%2,(%1)\n\t"
		"ld\t%3,8(%1)\n\t"
		"sd\t%2,(%0)\n\t"
		"sd\t%3,8(%0)\n\t"
		"ld\t%2,16(%1)\n\t"
		"ld\t%3,24(%1)\n\t"
		"sd\t%2,16(%0)\n\t"
		"sd\t%3,24(%0)\n\t"
		"nop\n\t"
		"nop\n\t"
		"nop\n\t"
		"nop\n\t"
		"cache\t%7,32(%0)\n\t"
		"daddiu\t%0,64\n\t"
		"daddiu\t%1,64\n\t"
		"ld\t%2,-32(%1)\n\t"
		"ld\t%3,-24(%1)\n\t"
		"sd\t%2,-32(%0)\n\t"
		"sd\t%3,-24(%0)\n\t"
		"ld\t%2,-16(%1)\n\t"
		"ld\t%3,-8(%1)\n\t"
		"sd\t%2,-16(%0)\n\t"
		"bne\t$1,%0,1b\n\t"
		" sd\t%3,-8(%0)\n\t"
		".set\tat\n\t"
		".set\treorder"
		:"=r" (dummy1), "=r" (dummy2), "=&r" (reg1), "=&r" (reg2)
		:"0" (to), "1" (from), "I" (PAGE_SIZE),
		 "i" (Create_Dirty_Excl_D));
}

static void r4k_copy_page_r4600_v2(void * to, void * from)
{
	unsigned long dummy1, dummy2, reg1, reg2;
	unsigned int flags;

	__save_and_cli(flags);
	__asm__ __volatile__(
		".set\tnoreorder\n\t"
		".set\tnoat\n\t"
		"daddiu\t$1,%0,%6\n"
		"1:\tnop\n\t"
		"nop\n\t"
		"nop\n\t"
		"nop\n\t"
		"\tcache\t%7,(%0)\n\t"
		"ld\t%2,(%1)\n\t"
		"ld\t%3,8(%1)\n\t"
		"sd\t%2,(%0)\n\t"
		"sd\t%3,8(%0)\n\t"
		"ld\t%2,16(%1)\n\t"
		"ld\t%3,24(%1)\n\t"
		"sd\t%2,16(%0)\n\t"
		"sd\t%3,24(%0)\n\t"
		"nop\n\t"
		"nop\n\t"
		"nop\n\t"
		"nop\n\t"
		"cache\t%7,32(%0)\n\t"
		"daddiu\t%0,64\n\t"
		"daddiu\t%1,64\n\t"
		"ld\t%2,-32(%1)\n\t"
		"ld\t%3,-24(%1)\n\t"
		"sd\t%2,-32(%0)\n\t"
		"sd\t%3,-24(%0)\n\t"
		"ld\t%2,-16(%1)\n\t"
		"ld\t%3,-8(%1)\n\t"
		"sd\t%2,-16(%0)\n\t"
		"bne\t$1,%0,1b\n\t"
		" sd\t%3,-8(%0)\n\t"
		".set\tat\n\t"
		".set\treorder"
		:"=r" (dummy1), "=r" (dummy2/*
 * linux/arch/m68k/atari/debug.c
 *
 * Atari debugging and serial console stuff
 *
 * Assembled of parts of former atari/config.c 97-12-18 by Roman Hodek
 *  
 * This file is subject to the terms and conditions of the GNU General Public
 * License.  See the file COPYING in the main directory of this archive
 * for more details.
 */

#include <linux/config.h>
#include <linux/types.h>
#include <linux/tty.h>
#include <linux/console.h>
#include <linux/init.h>
#include <linux/delay.h>

#include <asm/atarihw.h>
#include <asm/atariints.h>

extern char m68k_debug_device[];

/* Flag that Modem1 port is already initialized and used */
int atari_MFP_init_done = 0;
/* Flag that Modem1 port is already initialized and used */
int atari_SCC_init_done = 0;
/* Can be set somewhere, if a SCC master reset has already be done and should
 * not be repeated; used by kgdb */
int atari_SCC_reset_done = 0;

static struct console atari_console_driver = {
	name:		"debug",
	flags:		CON_PRINTBUFFER,
	index:		-1,
};


static inline void ata_mfp_out (char c)
{
    while (!(mfp.trn_stat & 0x80)) /* wait for tx buf empty */
	barrier ();
    mfp.usart_dta = c;
}

void atari_mfp_console_write (struct console *co, const char *str,
			      unsigned int count)
{
    while (count--) {
	if (*str == '\n')
	    ata_mfp_out( '\r' );
	ata_mfp_out( *str++ );
    }
}

static inline void ata_scc_out (char c)
{
    do {
	MFPDELAY();
    } while (!(scc.cha_b_ctrl & 0x04)); /* wait for tx buf empty */
    MFPDELAY();
    scc.cha_b_data = c;
}

void atari_scc_console_write (struct console *co, const char *str,
			      unsigned int count)
{
    while (count--) {
	if (*str == '\n')
	    ata_scc_out( '\r' );
	ata_scc_out( *str++ );
    }
}

static inline void ata_midi_out (char c)
{
    while (!(acia.mid_ctrl & ACIA_TDRE)) /* wait for tx buf empty */
	barrier ();
    acia.mid_data = c;
}

void atari_midi_console_write (struct console *co, const char *str,
			       unsigned int count)
{
    while (count--) {
	if (*str == '\n')
	    ata_midi_out( '\r' );
	ata_midi_out( *str++ );
    }
}

static int ata_par_out (char c)
{
    unsigned char tmp;
    /* This a some-seconds timeout in case no printer is connected */
    unsigned long i = loops_per_jiffy > 1 ? loops_per_jiffy : 10000000/HZ;

    while( (mfp.par_dt_reg & 1) && --i ) /* wait for BUSY == L */
	;
    if (!i) return( 0 );
    
    sound_ym.rd_data_reg_sel = 15;  /* select port B */
    sound_ym.wd_data = c;           /* put char onto port */
    sound_ym.rd_data_reg_sel = 14;  /* select port A */
    tmp = sound_ym.rd_data_reg_sel;
    sound_ym.wd_data = tmp & ~0x20; /* set strobe L */
    MFPDELAY();                     /* wait a bit */
    sound_ym.wd_data = tmp | 0x20;  /* set strobe H */
    return( 1 );
}

static void atari_par_console_write (struct console *co, const char *str,
				     unsigned int count)
{
    static int printer_present = 1;

    if (!printer_present)
	return;

    while (count--) {
	if (*str == '\n')
	    if (!ata_par_out( '\r' )) {
		printer_present = 0;
		return;
	    }
	if (!ata_par_out( *str++ )) {
	    printer_present = 0;
	    return;
	}
    }
}

#ifdef CONFIG_SERIAL_CONSOLE
int atari_mfp_console_wait_key(struct console *co)
{
    while( !(mfp.rcv_stat & 0x80) ) /* wait for rx buf filled */
	barrier();
    return( mfp.usart_dta );
}

int atari_scc_console_wait_key(struct console *co)
{
    do {
	MFPDELAY();
    } while( !(scc.cha_b_ctrl & 0x01) ); /* wait for rx buf filled */
    MFPDELAY();
    return( scc.cha_b_data );
}

int atari_midi_console_wait_key(struct console *co)
{
    while( !(acia.mid_ctrl & ACIA_RDRF) ) /* wait for rx buf filled */
	barrier();
    return( acia.mid_data );
}
#endif

/* The following two functions do a quick'n'dirty initialization of the MFP or
 * SCC serial ports. They're used by the debugging interface, kgdb, and the
 * serial console code. */
#ifndef CONFIG_SERIAL_CONSOLE
static void __init atari_init_mfp_port( int cflag )
#else
void atari_init_mfp_port( int cflag )
#endif
{
    /* timer values for 1200...115200 bps; > 38400 select 110, 134, or 150
     * bps, resp., and work only correct if there's a RSVE or RSSPEED */
    static int baud_table[9] = { 16, 11, 8, 4, 2, 1, 175, 143, 128 };
    int baud = cflag & CBAUD;
    int parity = (cflag & PARENB) ? ((cflag & PARODD) ? 0x04 : 0x06) : 0;
    int csize = ((cflag & CSIZE) == CS7) ? 0x20 : 0x00;

    if (cflag & CBAUDEX)
	baud += B38400;
    if (baud < B1200 || baud > B38400+2)
	baud = B9600; /* use default 9600bps for non-implemented rates */
    baud -= B1200; /* baud_table[] starts at 1200bps */
	
    mfp.trn_stat &= ~0x01; /* disable TX */
    mfp.usart_ctr = parity | csize | 0x88; /* 1:16 clk mode, 1 stop bit */
    mfp.tim_ct_cd &= 0x70;  /* stop timer D */
    mfp.tim_dt_d = baud_table[baud];
    mfp.tim_ct_cd |= 0x01;  /* start timer D, 1:4 */
    mfp.trn_stat |= 0x01;  /* enable TX */

    atari_MFP_init_done = 1;
}

#define SCC_WRITE(reg,val)				\
    do {						\
	scc.cha_b_ctrl = (reg);				\
	MFPDELAY();					\
	scc.cha_b_ctrl = (val);				\
	MFPDELAY();					\
    } while(0)

/* loops_per_jiffy isn't initialized yet, so we can't use udelay(). This does a
 * delay of ~ 60us. */
#define LONG_DELAY()				\
    do {					\
	int i;					\
	for( i = 100; i > 0; --i )		\
	    MFPDELAY();				\
    } while(0)
    
#ifndef CONFIG_SERIAL_CONSOLE
static void __init atari_init_scc_port( int cflag )
#else
void atari_init_scc_port( int cflag )
#endif
{
    extern int atari_SCC_reset_done;
    static int clksrc_table[9] =
	/* reg 11: 0x50 = BRG, 0x00 = RTxC, 0x28 = TRxC */
    	{ 0x50, 0x50, 0x50, 0x50, 0x50, 0x50, 0x50, 0x00, 0x00 };
    static int brgsrc_table[9] =
	/* reg 14: 0 = RTxC, 2 = PCLK */
    	{ 2, 2, 2, 2, 2, 2, 0, 2, 2 };
    static int clkmode_table[9] =
	/* reg 4: 0x40 = x16, 0x80 = x32, 0xc0 = x64 */
    	{ 0x40, 0x40, 0x40, 0x40, 0x40, 0x40, 0x40, 0xc0, 0x80 };
    static int div_table[9] =
	/* reg12 (BRG low) */
    	{ 208, 138, 103, 50, 24, 11, 1, 0, 0 };

    int baud = cflag & CBAUD;
    int clksrc, clkmode, div, reg3, reg5;
    
    if (cflag & CBAUDEX)
	baud += B38400;
    if (baud < B1200 || baud > B38400+2)
	baud = B9600; /* use default 9600bps for non-implemented rates */
    baud -= B1200; /* tables starts at 1200bps */

    clksrc  = clksrc_table[baud];
    clkmode = clkmode_table[baud];
    div     = div_table[baud];
    if (ATARIHW_PRESENT(TT_MFP) && baud >= 6) {
	/* special treatment for TT, where rates >= 38400 are done via TRxC */
	clksrc = 0x28; /* TRxC */
	clkmode = baud == 6 ? 0xc0 :
		  baud == 7 ? 0x80 : /* really 76800bps */
			      0x40;  /* really 153600bps */
	div = 0;
    }

    reg3 = (cflag & CSIZE) == CS8 ? 0xc0 : 0x40;
    reg5 = (cflag & CSIZE) == CS8 ? 0x60 : 0x20 | 0x82 /* assert DTR/RTS */;
    
    (void)scc.cha_b_ctrl;	/* reset reg pointer */
    SCC_WRITE( 9, 0xc0 );	/* reset */
    LONG_DELAY();		/* extra delay after WR9 access */
    SCC_WRITE( 4, (cflag & PARENB) ? ((cflag & PARODD) ? 0x01 : 0x03) : 0 |
		  0x04 /* 1 stopbit */ |
		  clkmode );
    SCC_WRITE( 3, reg3 );
    SCC_WRITE( 5, reg5 );
    SCC_WRITE( 9, 0 );		/* no interrupts */
    LONG_DELAY();		/* extra delay after WR9 access */
    SCC_WRITE( 10, 0 );		/* NRZ mode */
    SCC_WRITE( 11, clksrc );	/* main clock source */
    SCC_WRITE( 12, div );	/* BRG value */
    SCC_WRITE( 13, 0 );		/* BRG high byte */
    SCC_WRITE( 14, brgsrc_table[baud] );
    SCC_WRITE( 14, brgsrc_table[baud] | (div ? 1 : 0) );
    SCC_WRITE( 3, reg3 | 1 );
    SCC_WRITE( 5, reg5 | 8 );
    
    atari_SCC_reset_done = 1;
    atari_SCC_init_done = 1;
}

#ifndef CONFIG_SERIAL_CONSOLE 
static void __init atari_init_midi_port( int cflag )
#else
void atari_init_midi_port( int cflag )
#endif
{
    int baud = cflag & CBAUD;
    int csize = ((cflag & CSIZE) == CS8) ? 0x10 : 0x00;
    /* warning 7N1 isn't possible! (instead 7O2 is used...) */
    int parity = (cflag & PARENB) ? ((cflag & PARODD) ? 0x0c : 0x08) : 0x04;
    int div;

    /* 4800 selects 7812.5, 115200 selects 500000, all other (incl. 9600 as
     * default) the standard MIDI speed 31250. */
    if (cflag & CBAUDEX)
	baud += B38400;
    if (baud == B4800)
	div = ACIA_DIV64; /* really 7812.5 bps */
    else if (baud == B38400+2 /* 115200 */)
	div = ACIA_DIV1; /* really 500 kbps (does that work??) */
    else
	div = ACIA_DIV16; /* 31250 bps, standard for MIDI */

    /* RTS low, ints disabled */
    acia.mid_ctrl = div | csize | parity |
		    ((atari_switches & ATARI_SWITCH_MIDI) ?
		     ACIA_RHTID : ACIA_RLTID);
}

void __init atari_debug_init(void)
{
    if (!strcmp( m68k_debug_device, "ser" )) {
	/* defaults to ser2 for a Falcon and ser1 otherwise */
	strcpy( m68k_debug_device, MACH_IS_FALCON ? "ser2" : "ser1" );

    }

    if (!strcmp( m68k_debug_device, "ser1" )) {
	/* ST-MFP Modem1 serial port */
	atari_init_mfp_port( B9600|CS8 );
	atari_console_driver.write = atari_mfp_console_write;
    }
    else if (!strcmp( m68k_debug_device, "ser2" )) {
	/* SCC Modem2 serial port */
	atari_init_scc_port( B9600|CS8 );
	atari_console_driver.write = atari_scc_console_write;
    }
    else if (!strcmp( m68k_debug_device, "midi" )) {
	/* MIDI port */
	atari_init_midi_port( B9600|CS8 );
	atari_console_driver.write = atari_midi_console_write;
    }
    else if (!strcmp( m68k_debug_device, "par" )) {
	/* parallel printer */
	atari_turnoff_irq( IRQ_MFP_BUSY ); /* avoid ints */
	sound_ym.rd_data_reg_sel = 7;  /* select mixer control */
	sound_ym.wd_data = 0xff;       /* sound off, ports are output */
	sound_ym.rd_data_reg_sel = 15; /* select port B */
	sound_ym.wd_data = 0;          /* no char */
	sound_ym.rd_data_reg_sel = 14; /* select port A */
	sound_ym.wd_data = sound_ym.rd_data_reg_sel | 0x20; /* strobe H */
	atari_console_driver.write = atari_par_console_write;
    }
    if (atari_console_driver.write)
	register_console(&atari_console_driver);
}

/*
 * Local variables:
 *  c-indent-level: 4
 *  tab-width: 8
 * End:
 */
/*
 * hades-pci.c - Hardware specific PCI BIOS functions the Hades Atari clone.
 *
 * Written by Wout Klaren.
 */

#include <linux/config.h>
#include <linux/init.h>
#include <linux/kernel.h>
#include <asm/io.h>

#if 0
# define DBG_DEVS(args)		printk args
#else
# define DBG_DEVS(args)
#endif

#if defined(CONFIG_PCI) && defined(CONFIG_HADES)

#include <linux/slab.h>
#include <linux/mm.h>
#include <linux/pci.h>

#include <asm/atarihw.h>
#include <asm/atariints.h>
#include <asm/byteorder.h>
#include <asm/pci.h>

#define HADES_MEM_BASE		0x80000000
#define HADES_MEM_SIZE		0x20000000
#define HADES_CONFIG_BASE	0xA0000000
#define HADES_CONFIG_SIZE	0x10000000
#define HADES_IO_BASE		0xB0000000
#define HADES_IO_SIZE		0x10000000
#define HADES_VIRT_IO_SIZE	0x00010000	/* Only 64k is remapped and actually used. */

#define N_SLOTS				4			/* Number of PCI slots. */

static const char pci_mem_name[] = "PCI memory space";
static const char pci_io_name[] = "PCI I/O space";
static const char pci_config_name[] = "PCI config space";

static struct resource config_space = { pci_config_name, HADES_CONFIG_BASE,
										HADES_CONFIG_BASE + HADES_CONFIG_SIZE - 1 };
static struct resource io_space = { pci_io_name, HADES_IO_BASE, HADES_IO_BASE +
								    HADES_IO_SIZE - 1 };

static const unsigned long pci_conf_base_phys[] = { 0xA0080000, 0xA0040000,
												    0xA0020000, 0xA0010000 };
static unsigned long pci_conf_base_virt[N_SLOTS];
static unsigned long pci_io_base_virt;

/*
 * static void *mk_conf_addr(unsigned char bus, unsigned char device_fn,
 *			     unsigned char where)
 *
 * Calculate the address of the PCI configuration area of the given
 * device.
 *
 * BUG: boards with multiple functions are probably not correctly
 * supported.
 */

static void *mk_conf_addr(struct pci_dev *dev, int where)
{
	int device = dev->devfn >> 3, function = dev->devfn & 7;
	void *result;

	DBG_DEVS(("mk_conf_addr(bus=%d ,device_fn=0x%x, where=0x%x, pci_addr=0x%p)\n",
		  dev->bus->number, dev->devfn, where, pci_addr));

	if (device > 3)
	{
		DBG_DEVS(("mk_conf_addr: device (%d) > 3, returning NULL\n", device));
		return NULL;
	}

	if (dev->bus->number != 0)
	{
		DBG_DEVS(("mk_conf_addr: bus (%d) > 0, returning NULL\n", device));
		return NULL;
	}

	result = (void *) (pci_conf_base_virt[device] | (function << 8) | (where));
	DBG_DEVS(("mk_conf_addr: returning pci_addr 0x%lx\n", (unsigned long) result));
	return result;
}

static int hades_read_config_byte(struct pci_dev *dev, int where, u8 *value)
{
	volatile unsigned char *pci_addr;

	*value = 0xff;

	if ((pci_addr = (unsigned char *) mk_conf_addr(dev, where)) == NULL)
		return PCIBIOS_DEVICE_NOT_FOUND;

	*value = *pci_addr;

	return PCIBIOS_SUCCESSFUL;
}

static int hades_read_config_word(struct pci_dev *dev, int where, u16 *value)
{
	volatile unsigned short *pci_addr;

	*value = 0xffff;

	if (where & 0x1)
		return PCIBIOS_BAD_REGISTER_NUMBER;

	if ((pci_addr = (unsigned short *) mk_conf_addr(dev, where)) == NULL)
		return PCIBIOS_DEVICE_NOT_FOUND;

	*value = le16_to_cpu(*pci_addr);

	return PCIBIOS_SUCCESSFUL;
}

static int hades_read_config_dword(struct pci_dev *dev, int where, u32 *value)
{
	volatile unsigned int *pci_addr;
	unsigned char header_type;
	int result;

	*value = 0xffffffff;

	if (where & 0x3)
		return PCIBIOS_BAD_REGISTER_NUMBER;

	if ((pci_addr = (unsigned int *) mk_conf_addr(dev, where)) == NULL)
		return PCIBIOS_DEVICE_NOT_FOUND;

	*value = le32_to_cpu(*pci_addr);

	/*
	 * Check if the value is an address on the bus. If true, add the
	 * base address of the PCI memory or PCI I/O area on the Hades.
	 */

	if ((result = hades_read_config_byte(dev, PCI_HEADER_TYPE,
					     &header_type)) != PCIBIOS_SUCCESSFUL)
		return result;

	if (((where >= PCI_BASE_ADDRESS_0) && (where <= PCI_BASE_ADDRESS_1)) ||
	    ((header_type != PCI_HEADER_TYPE_BRIDGE) && ((where >= PCI_BASE_ADDRESS_2) &&
							 (where <= PCI_BASE_ADDRESS_5))))
	{
		if ((*value & PCI_BASE_ADDRESS_SPACE) == PCI_BASE_ADDRESS_SPACE_IO)
		{
			/*
			 * Base address register that contains an I/O address. If the
			 * address is valid on the Hades (0 <= *value < HADES_VIRT_IO_SIZE),
			 * add 'pci_io_base_virt' to the value.
			 */

			if (*value < HADES_VIRT_IO_SIZE)
				*value += pci_io_base_virt;
		}
		else
		{
			/*
			 * Base address register that contains an memory address. If the
			 * address is valid on the Hades (0 <= *value < HADES_MEM_SIZE),
			 * add HADES_MEM_BASE to the value.
			 */

			if (*value == 0)
			{
				/*
				 * Base address is 0. Test if this base
				 * address register is used.
				 */

				*pci_addr = 0xffffffff;
				if (*pci_addr != 0)
				{
					*pci_addr = *value;
					if (*value < HADES_MEM_SIZE)
						*value += HADES_MEM_BASE;
				}
			}
			else
			{
				if (*value < HADES_MEM_SIZE)
					*value += HADES_MEM_BASE;
			}
		}
	}

	return PCIBIOS_SUCCESSFUL;
}

static int hades_write_config_byte(struct pci_dev *dev, int where, u8 value)
{
	volatile unsigned char *pci_addr;

	if ((pci_addr = (unsigned char *) mk_conf_addr(dev, where)) == NULL)
		return PCIBIOS_DEVICE_NOT_FOUND;

	*pci_addr = value;

	return PCIBIOS_SUCCESSFUL;
}

static int hades_write_config_word(struct pci_dev *dev, int where, u16 value)
{
	volatile unsigned short *pci_addr;

	if ((pci_addr = (unsigned short *) mk_conf_addr(dev, where)) == NULL)
		return PCIBIOS_DEVICE_NOT_FOUND;

	*pci_addr = cpu_to_le16(value);

	return PCIBIOS_SUCCESSFUL;
}

static int hades_write_config_dword(struct pci_dev *dev, int where, u32 value)
{
	volatile unsigned int *pci_addr;
	unsigned char header_type;
	int result;

	if ((pci_addr = (unsigned int *) mk_conf_addr(dev, where)) == NULL)
		return PCIBIOS_DEVICE_NOT_FOUND;

	/*
	 * Check if the value is an address on the bus. If true, subtract the
	 * base address of the PCI memory or PCI I/O area on the Hades.
	 */

	if ((result = hades_read_config_byte(dev, PCI_HEADER_TYPE,
					     &header_type)) != PCIBIOS_SUCCESSFUL)
		return result;

	if (((where >= PCI_BASE_ADDRESS_0) && (where <= PCI_BASE_ADDRESS_1)) ||
	    ((header_type != PCI_HEADER_TYPE_BRIDGE) && ((where >= PCI_BASE_ADDRESS_2) &&
							 (where <= PCI_BASE_ADDRESS_5))))
	{
		if ((value & PCI_BASE_ADDRESS_SPACE) ==
		    PCI_BASE_ADDRESS_SPACE_IO)
		{
			/*
			 * I/O address. Check if the address is valid address on
			 * the Hades (pci_io_base_virt <= value < pci_io_base_virt +
			 * HADES_VIRT_IO_SIZE) or if the value is 0xffffffff. If not
			 * true do not write the base address register. If it is a
			 * valid base address subtract 'pci_io_base_virt' from the value.
			 */

			if ((value >= pci_io_base_virt) && (value < (pci_io_base_virt +
														 HADES_VIRT_IO_SIZE)))
				value -= pci_io_base_virt;
			else
			{
				if (value != 0xffffffff)
					return PCIBIOS_SET_FAILED;
			}
		}
		else
		{
			/*
			 * Memory address. Check if the address is valid address on
			 * the Hades (HADES_MEM_BASE <= value < HADES_MEM_BASE + HADES_MEM_SIZE) or
			 * if the value is 0xffffffff. If not true do not write
			 * the base address register. If it is a valid base address
			 * subtract HADES_MEM_BASE from the value.
			 */

			if ((value >= HADES_MEM_BASE) && (value < (HADES_MEM_BASE + HADES_MEM_SIZE)))
				value -= HADES_MEM_BASE;
			else
			{
				if (value != 0xffffffff)
					return PCIBIOS_SET_FAILED;
			}
		}
	}

	*pci_addr = cpu_to_le32(value);

	return PCIBIOS_SUCCESSFUL;
}

/*
 * static inline void hades_fixup(void)
 *
 * Assign IRQ numbers as used by Linux to the interrupt pins
 * of the PCI cards.
 */

static void __init hades_fixup(int pci_modify)
{
	char irq_tab[4] = {
			    IRQ_TT_MFP_IO0,	/* Slot 0. */
			    IRQ_TT_MFP_IO1,	/* Slot 1. */
			    IRQ_TT_MFP_SCC,	/* Slot 2. */
			    IRQ_TT_MFP_SCSIDMA	/* Slot 3. */
			  };
	struct pci_dev *dev;
	unsigned char slot;

	/*
	 * Go through all devices, fixing up irqs as we see fit:
	 */

	for (dev = pci_devices; dev; dev = dev->next)
	{
		if (dev->class >> 16 != PCI_BASE_CLASS_BRIDGE)
		{
			slot = PCI_SLOT(dev->devfn);	/* Determine slot number. */
			dev->irq = irq_tab[slot];
			if (pci_modify)
				pcibios_write_config_byte(dev->bus->number, dev->devfn,
							  PCI_INTERRUPT_LINE, dev->irq);
		}
	}
}

/*
 * static void hades_conf_device(unsigned char bus, unsigned char device_fn)
 *
 * Machine dependent Configure the given device.
 *
 * Parameters:
 *
 * bus		- bus number of the device.
 * device_fn	- device and function number of the device.
 */

static void __init hades_conf_device(unsigned char bus, unsigned char device_fn)
{
	pcibios_write_config_byte(bus, device_fn, PCI_CACHE_LINE_SIZE, 0);
}

static struct pci_ops hades_pci_ops = {
	read_byte:	hades_read_config_byte
	read_word:	hades_read_config_word
	read_dword:	hades_read_config_dword
	write_byte:	hades_write_config_byte
	write_word:	hades_write_config_word
	write_dword:	hades_write_config_dword
};

/*
 * struct pci_bus_info *init_hades_pci(void)
 *
 * Machine specific initialisation:
 *
 * - Allocate and initialise a 'pci_bus_info' structure
 * - Initialise hardware
 *
 * Result: pointer to 'pci_bus_info' structure.
 */

struct pci_bus_info * __init init_hades_pci(void)
{
	struct pci_bus_info *bus;
	int i;

	/*
	 * Remap I/O and configuration space.
	 */

	pci_io_base_virt = (unsigned long) ioremap(HADES_IO_BASE, HADES_VIRT_IO_SIZE);

	for (i = 0; i < N_SLOTS; i++)
		pci_conf_base_virt[i] = (unsigned long) ioremap(pci_conf_base_phys[i], 0x10000);

	/*
	 * Allocate memory for bus info structure.
	 */

	bus = kmalloc(sizeof(struct pci_bus_info), GFP_KERNEL);
	if (!bus)
		return NULL;
	memset(bus, 0, sizeof(struct pci_bus_info));

	/*
	 * Claim resources. The m68k has no seperate I/O space, both
	 * PCI memory space and PCI I/O space are in memory space. Therefore
	 * the I/O resources are requested in memory space as well.
	 */

	if (request_resource(&iomem_resource, &config_space) != 0)
	{
		kfree(bus);
		return NULL;
	}

	if (request_resource(&iomem_resource, &io_space) != 0)
	{
		release_resource(&config_space);
		kfree(bus);
		return NULL;
	}

	bus->mem_space.start = HADES_MEM_BASE;
	bus->mem_space.end = HADES_MEM_BASE + HADES_MEM_SIZE - 1;
	bus->mem_space.name = pci_mem_name;
#if 1
	if (request_resource(&iomem_resource, &bus->mem_space) != 0)
	{
		release_resource(&io_space);
		release_resource(&config_space);
		kfree(bus);
		return NULL;
	}
#endif
	bus->io_space.start = pci_io_base_virt;
	bus->io_space.end = pci_io_base_virt + HADES_VIRT_IO_SIZE - 1;
	bus->io_space.name = pci_io_name;
#if 1
	if (request_resource(&ioport_resource, &bus->io_space) != 0)
	{
		release_resource(&bus->mem_space);
		release_resource(&io_space);
		release_resource(&config_space);
		kfree(bus);
		return NULL;
	}
#endif
	/*
	 * Set hardware dependent functions.
	 */

	bus->m68k_pci_ops = &hades_pci_ops;
	bus->fixup = hades_fixup;
	bus->conf_device = hades_conf_device;

	/*
	 * Select high to low edge for PCI interrupts.
	 */

	tt_mfp.active_edge &= ~0x27;

	return bus;
}
#endif
#
# Automatically generated make config: don't edit
#
CONFIG_UID16=y

#
# Code maturity level options
#
CONFIG_EXPERIMENTAL=y

#
# Platform dependent setup
#
# CONFIG_ISA is not set
# CONFIG_PCMCIA is not set
CONFIG_AMIGA=y
# CONFIG_ATARI is not set
# CONFIG_HADES is not set
# CONFIG_PCI is not set
# CONFIG_MAC is not set
# CONFIG_APOLLO is not set
# CONFIG_VME is not set
# CONFIG_HP300 is not set
# CONFIG_SUN3X is not set
# CONFIG_SUN3 is not set
# CONFIG_Q40 is not set

#
# Processor type
#
CONFIG_M68020=y
CONFIG_M68030=y
CONFIG_M68040=y
# CONFIG_M68060 is not set
# CONFIG_M68KFPU_EMU is not set
# CONFIG_ADVANCED is not set

#
# General setup
#
CONFIG_NET=y
CONFIG_SYSVIPC=y
# CONFIG_BSD_PROCESS_ACCT is not set
CONFIG_SYSCTL=y
CONFIG_KCORE_ELF=y
# CONFIG_KCORE_AOUT is not set
CONFIG_BINFMT_AOUT=y
CONFIG_BINFMT_ELF=y
# CONFIG_BINFMT_MISC is not set
CONFIG_ZORRO=y
# CONFIG_AMIGA_PCMCIA is not set
# CONFIG_HEARTBEAT is not set
CONFIG_PROC_HARDWARE=y
# CONFIG_PARPORT is not set
# CONFIG_PRINTER is not set

#
# Loadable module support
#
# CONFIG_MODULES is not set

#
# Block devices
#
# CONFIG_BLK_DEV_FD is not set
CONFIG_AMIGA_FLOPPY=y
# CONFIG_AMIGA_Z2RAM is not set
# CONFIG_BLK_DEV_XD is not set
# CONFIG_PARIDE is not set
# CONFIG_BLK_DEV_LOOP is not set
# CONFIG_BLK_DEV_NBD is not set
# CONFIG_BLK_DEV_MD is not set
CONFIG_BLK_DEV_RAM=y
CONFIG_BLK_DEV_INITRD=y

#
# Networking options
#
CONFIG_PACKET=y
# CONFIG_PACKET_MMAP is not set
# CONFIG_NETLINK is not set
# CONFIG_NETFILTER is not set
# CONFIG_FILTER is not set
CONFIG_UNIX=y
CONFIG_INET=y
# CONFIG_IP_MULTICAST is not set
# CONFIG_IP_ADVANCED_ROUTER is not set
# CONFIG_IP_PNP is not set
# CONFIG_IP_ROUTER is not set
# CONFIG_NET_IPIP is not set
# CONFIG_NET_IPGRE is not set
# CONFIG_IP_ALIAS is not set
# CONFIG_SYN_COOKIES is not set

#
# (it is safe to leave these untouched)
#
# CONFIG_SKB_LARGE is not set
# CONFIG_IPV6 is not set
# CONFIG_KHTTPD is not set
# CONFIG_ATM is not set

#
#  
#
# CONFIG_IPX is not set
# CONFIG_ATALK is not set
# CONFIG_DECNET is not set
# CONFIG_X25 is not set
# CONFIG_LAPB is not set
# CONFIG_BRIDGE is not set
# CONFIG_LLC is not set
# CONFIG_ECONET is not set
# CONFIG_WAN_ROUTER is not set
# CONFIG_NET_FASTROUTE is not set
# CONFIG_NET_HW_FLOWCONTROL is not set

#
# QoS and/or fair queueing
#
# CONFIG_NET_SCHED is not set

#
# ATA/IDE/MFM/RLL support
#
# CONFIG_IDE is not set
# CONFIG_BLK_DEV_IDE_MODES is not set
# CONFIG_BLK_DEV_HD is not set

#
# SCSI support
#
CONFIG_SCSI=y

#
# SCSI support type (disk, tape, CD-ROM)
#
CONFIG_BLK_DEV_SD=y
CONFIG_SD_EXTRA_DEVS=40
CONFIG_CHR_DEV_ST=y
CONFIG_ST_EXTRA_DEVS=2
CONFIG_BLK_DEV_SR=y
# CONFIG_BLK_DEV_SR_VENDOR is not set
CONFIG_SR_EXTRA_DEVS=2
# CONFIG_CHR_DEV_SG is not set

#
# Some SCSI devices (e.g. CD jukebox) support multiple LUNs
#
# CONFIG_SCSI_MULTI_LUN is not set
CONFIG_SCSI_CONSTANTS=y
# CONFIG_SCSI_LOGGING is not set

#
# SCSI low-level drivers
#
CONFIG_A3000_SCSI=y
# CONFIG_A4000T_SCSI is not set
CONFIG_A2091_SCSI=y
CONFIG_GVP11_SCSI=y
# CONFIG_CYBERSTORM_SCSI is not set
# CONFIG_CYBERSTORMII_SCSI is not set
# CONFIG_BLZ2060_SCSI is not set
# CONFIG_BLZ1230_SCSI is not set
# CONFIG_FASTLANE_SCSI is not set
# CONFIG_A4091_SCSI is not set
# CONFIG_WARPENGINE_SCSI is not set
# CONFIG_BLZ603EPLUS_SCSI is not set
# CONFIG_OKTAGON_SCSI is not set

#
# Network device support
#
CONFIG_NETDEVICES=y
# CONFIG_DUMMY is not set
# CONFIG_SLIP is not set
# CONFIG_PPP is not set
# CONFIG_EQUALIZER is not set
# CONFIG_ARIADNE is not set
# CONFIG_ARIADNE2 is not set
# CONFIG_A2065 is not set
# CONFIG_HYDRA is not set

#
# Character devices
#
CONFIG_VT=y
CONFIG_VT_CONSOLE=y
CONFIG_AMIGAMOUSE=y
CONFIG_BUSMOUSE=y
CONFIG_AMIGA_BUILTIN_SERIAL=y
# CONFIG_GVPIOEXT is not set
# CONFIG_GVPIOEXT_LP is not set
# CONFIG_GVPIOEXT_PLIP is not set
# CONFIG_MULTIFACE_III_TTY is not set
# CONFIG_SUN3X_ZS is not set
# CONFIG_SUN_KEYBOARD is not set
# CONFIG_SUN_MOUSE is not set
# CONFIG_SBUS is not set
# CONFIG_SERIAL_CONSOLE is not set
# CONFIG_USERIAL is not set
# CONFIG_WATCHDOG is not set
CONFIG_UNIX98_PTYS=y
CONFIG_UNIX98_PTY_COUNT=256

#
# Sound support
#
# CONFIG_SOUND is not set

#
# File systems
#
# CONFIG_QUOTA is not set
# CONFIG_AUTOFS_FS is not set
# CONFIG_AUTOFS4_FS is not set
# CONFIG_ADFS_FS is not set
# CONFIG_AFFS_FS is not set
# CONFIG_HFS_FS is not set
# CONFIG_BFS_FS is not set
CONFIG_FAT_FS=y
CONFIG_MSDOS_FS=y
# CONFIG_UMSDOS_FS is not set
# CONFIG_VFAT_FS is not set
# CONFIG_EFS_FS is not set
# CONFIG_CRAMFS is not set
# CONFIG_ISO9660_FS is not set
# CONFIG_JOLIET is not set
CONFIG_MINIX_FS=y
# CONFIG_NTFS_FS is not set
# CONFIG_HPFS_FS is not set
CONFIG_PROC_FS=y
# CONFIG_DEVFS_FS is not set
# CONFIG_DEVFS_MOUNT is not set
# CONFIG_DEVFS_DEBUG is not set
CONFIG_DEVPTS_FS=y
# CONFIG_QNX4FS_FS is not set
# CONFIG_ROMFS_FS is not set
CONFIG_EXT2_FS=y
# CONFIG_SYSV_FS is not set
# CONFIG_UDF_FS is not set
# CONFIG_UFS_FS is not set

#
# Network File Systems
#
# CONFIG_CODA_FS is not set
CONFIG_NFS_FS=y
# CONFIG_ROOT_NFS is not set
# CONFIG_NFSD is not set
CONFIG_SUNRPC=y
CONFIG_LOCKD=y
# CONFIG_SMB_FS is not set
# CONFIG_NCP_FS is not set

#
# Partition Types
#
# CONFIG_PARTITION_ADVANCED is not set
CONFIG_AMIGA_PARTITION=y
CONFIG_NLS=y

#
# Native Language Support
#
CONFIG_NLS_CODEPAGE_437=y
# CONFIG_NLS_CODEPAGE_737 is not set
# CONFIG_NLS_CODEPAGE_775 is not set
# CONFIG_NLS_CODEPAGE_850 is not set
# CONFIG_NLS_CODEPAGE_852 is not set
# CONFIG_NLS_CODEPAGE_855 is not set
# CONFIG_NLS_CODEPAGE_857 is not set
# CONFIG_NLS_CODEPAGE_860 is not set
# CONFIG_NLS_CODEPAGE_861 is not set
# CONFIG_NLS_CODEPAGE_862 is not set
# CONFIG_NLS_CODEPAGE_863 is not set
# CONFIG_NLS_CODEPAGE_864 is not set
# CONFIG_NLS_CODEPAGE_865 is not set
# CONFIG_NLS_CODEPAGE_866 is not set
# CONFIG_NLS_CODEPAGE_869 is not set
# CONFIG_NLS_CODEPAGE_874 is not set
# CONFIG_NLS_ISO8859_1 is not set
# CONFIG_NLS_ISO8859_2 is not set
# CONFIG_NLS_ISO8859_3 is not set
# CONFIG_NLS_ISO8859_4 is not set
# CONFIG_NLS_ISO8859_5 is not set
# CONFIG_NLS_ISO8859_6 is not set
# CONFIG_NLS_ISO8859_7 is not set
# CONFIG_NLS_ISO8859_8 is not set
# CONFIG_NLS_ISO8859_9 is not set
# CONFIG_NLS_ISO8859_14 is not set
# CONFIG_NLS_ISO8859_15 is not set
# CONFIG_NLS_KOI8_R is not set

#
# Console drivers
#
CONFIG_FB=y

#
# Frame-buffer support
#
CONFIG_FB=y
CONFIG_DUMMY_CONSOLE=y
# CONFIG_FB_CLGEN is not set
# CONFIG_FB_PM2 is not set
CONFIG_FB_AMIGA=y
CONFIG_FB_AMIGA_OCS=y
CONFIG_FB_AMIGA_ECS=y
CONFIG_FB_AMIGA_AGA=y
# CONFIG_FB_CYBER is not set
# CONFIG_FB_VIRGE is not set
# CONFIG_FB_RETINAZ3 is not set
# CONFIG_FB_FM2 is not set
# CONFIG_FB_VIRTUAL is not set
# CONFIG_FBCON_ADVANCED is not set
CONFIG_FBCON_MFB=y
CONFIG_FBCON_AFB=y
CONFIG_FBCON_ILBM=y
# CONFIG_FBCON_FONTWIDTH8_ONLY is not set
# CONFIG_FBCON_FONTS is not set
CONFIG_FONT_8x8=y
CONFIG_FONT_8x16=y
CONFIG_FONT_PEARL_8x8=y

#
# Kernel hacking
#
# CONFIG_MAGIC_SYSRQ is not set
~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
MOTOROLA MICROPROCESSOR & MEMORY TECHNOLOGY GROUP
M68000 Hi-Performance Microprocessor Division
M68060 Software Package
Production Release P1.00 -- October 10, 1994

M68060 Software Package Copyright � 1993, 1994 Motorola Inc.  All rights reserved.
 
THE SOFTWARE is provided on an "AS IS" basis and without warranty.
To the maximum extent permitted by applicable law,
MOTOROLA DISCLAIMS ALL WARRANTIES WHETHER EXPRESS OR IMPLIED, 
INCLUDING IMPLIED WARRANTIES OF MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE
and any warranty against infringement with regard to the SOFTWARE
(INCLUDING ANY MODIFIED VERSIONS THEREOF) and any accompanying written materials.

To the maximum extent permitted by applicable law,
IN NO EVENT SHALL MOTOROLA BE LIABLE FOR ANY DAMAGES WHATSOEVER
(INCLUDING WITHOUT LIMITATION, DAMAGES FOR LOSS OF BUSINESS PROFITS,
BUSINESS INTERRUPTION, LOSS OF BUSINESS INFORMATION, OR OTHER PECUNIARY LOSS)
ARISING OF THE USE OR INABILITY TO USE THE SOFTWARE.
Motorola assumes no responsibility for the maintenance and support of the SOFTWARE.

You are hereby granted a copyright license to use, modify, and distribute the SOFTWARE
so long as this entire notice is retained without alteration in any modified and/or
redistributed versions, and that such modified versions are clearly identified as such.
No licenses are granted by implication, estoppel or otherwise under any patents
or trademarks of Motorola, Inc.
~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~

CHANGES SINCE LAST RELEASE:
---------------------------

1) "movep" emulation where data was being read from memory
was reading the intermediate bytes. Emulation now only 
reads the required bytes.

2) "flogn", "flog2", and "flog10" of "1" was setting the
Inexact FPSR bit. Emulation now does not set Inexact for
this case.

3) For an opclass three FP instruction where the effective addressing
mode was pre-decrement or post-increment and the address register
was A0 or A1, the address register was not being updated as a result
of the operation. This has been corrected.

4) Beta B.2 version had the following erratum:

	Scenario:
	---------
	If {i,d}mem_{read,write}_{byte,word,long}() returns
	a failing value to the 68060SP, the package ignores
	this return value and continues with program execution
	as if it never received a failing value.

	Effect:
	-------
	For example, if a user executed "fsin.x ADDR,fp0" where
	ADDR should cause a "segmentation violation", the memory read
	requested by the package should return a failing value
	to the package. Since the package currently ignores this 
	return value, the user program will continue to the
	next instruction, and the result created in fp0 will be
	undefined.

	Fix:
	----
	This has been fixed in the current release.

	Notes:
	------
	Upon receiving a non-zero (failing) return value from
	a {i,d}mem_{read,write}_{byte,word,long}() "call-out",
	the package creates a 16-byte access error stack frame
	from the current exception stack frame and exits
	through the "call-out" _real_access(). This is the process
	as described in the MC68060 User's Manual.

	For instruction read access errors, the info stacked is:
		SR 	= SR at time of exception
		PC 	= PC of instruction being emulated
		VOFF	= $4008 (stack frame format type)
		ADDRESS	= PC of instruction being emulated
		FSLW	= FAULT STATUS LONGWORD

	The valid FSLW bits are:
		bit 27 		= 1	(misaligned bit)
		bit 24 		= 1	(read)
		bit 23 		= 0	(write)
		bit 22:21	= 10	(SIZE = word)
		bit 20:19	= 00	(TT)
		bit 18:16	= x10	(TM; x = 1 for supervisor mode)
		bit 15		= 1	(IO)
		bit 0		= 1	(Software Emulation Error)

	all other bits are EQUAL TO ZERO and can be set by the _real_access()
	"call-out" stub by the user as appropriate. The MC68060 User's Manual
	stated that ONLY "bit 0" would be set. The 060SP attempts to set a few
	other bits.

	For data read/write access errors, the info stacked is:
		SR 	= SR at time of exception
		PC 	= PC of instruction being emulated
		VOFF	= $4008 (stack frame format type)
		ADDRESS	= Address of source or destination operand
		FSLW	= FAULT STATUS LONGWORD

	The valid FSLW bits are:
		bit 27 		= 0	(misaligned bit)
		bit 24 		= x	(read; 1 if read, 0 if write)
		bit 23		= x	(write; 1 if write, 0 if read)
		bit 22:21	= xx	(SIZE; see MC68060 User's Manual)
		bit 20:19	= 00	(TT)
		bit 18:16	= x01	(TM; x = 1 for supervisor mode)
		bit 15		= 0	(IO)
		bit 0		= 1	(Software Emulation Error)

	all other bits are EQUAL TO ZERO and can be set by the _real_access()
	"call-out" stub by the user as appropriate. The MC68060 User's Manual
	stated that ONLY "bit 0" would be set. The 060SP attempts to set a few
	other bits.
~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
MOTOROLA MICROPROCESSOR & MEMORY TECHNOLOGY GROUP
M68000 Hi-Performance Microprocessor Division
M68060 Software Package
Production Release P1.00 -- October 10, 1994

M68060 Software Package Copyright � 1993, 1994 Motorola Inc.  All rights reserved.
 
THE SOFTWARE is provided on an "AS IS" basis and without warranty.
To the maximum extent permitted by applicable law,
MOTOROLA DISCLAIMS ALL WARRANTIES WHETHER EXPRESS OR IMPLIED, 
INCLUDING IMPLIED WARRANTIES OF MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE
and any warranty against infringement with regard to the SOFTWARE
(INCLUDING ANY MODIFIED VERSIONS THEREOF) and any accompanying written materials.

To the maximum extent permitted by applicable law,
IN NO EVENT SHALL MOTOROLA BE LIABLE FOR ANY DAMAGES WHATSOEVER
(INCLUDING WITHOUT LIMITATION, DAMAGES FOR LOSS OF BUSINESS PROFITS,
BUSINESS INTERRUPTION, LOSS OF BUSINESS INFORMATION, OR OTHER PECUNIARY LOSS)
ARISING OF THE USE OR INABILITY TO USE THE SOFTWARE.
Motorola assumes no responsibility for the maintenance and support of the SOFTWARE.

You are hereby granted a copyright license to use, modify, and distribute the SOFTWARE
so long as this entire notice is retained without alteration in any modified and/or
redistributed versions, and that such modified versions are clearly identified as such.
No licenses are granted by implication, estoppel or otherwise under any patents
or trademarks of Motorola, Inc.
~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
RELEASE FILE VERSIONS:
-----------------------

fpsp.sa
----------
freal.s     : 2.4
hdr.fpu     : 2.4
x_fovfl.s   : 2.16
x_funfl.s   : 2.19
x_funsupp.s : 2.27
x_effadd.s  : 2.21
x_foperr.s  : 2.9
x_fsnan.s   : 2.12
x_finex.s   : 2.14
x_fdz.s     : 2.5
x_fline.s   : 2.5
x_funimp.s  : 2.27
fsin.s      : 2.6
ftan.s      : 2.6
fatan.s     : 2.3
fasin.s     : 2.3
facos.s     : 2.5
fetox.s     : 2.4
fgetem.s    : 2.5
fcosh.s     : 2.4
fsinh.s     : 2.5
ftanh.s     : 2.3
flogn.s     : 2.6
fatanh.s    : 2.4
flog2.s     : 2.4
ftwotox.s   : 2.4
fmovecr.s   : 2.5
fscale.s    : 2.5
frem_mod.s  : 2.6
fkern.s     : 2.6
fkern2.s    : 2.5
fgen_except.s: 2.7
foptbl.s    : 2.3
fmul.s      : 2.5
fin.s       : 2.4
fdiv.s      : 2.5
fneg.s      : 2.4
ftst.s      : 2.3
fint.s      : 2.3
fintrz.s    : 2.3
fabs.s      : 2.4
fcmp.s      : 2.4
fsglmul.s   : 2.5
fsgldiv.s   : 2.8
fadd.s      : 2.6
fsub.s      : 2.6
fsqrt.s     : 2.4
fmisc.s     : 2.3
fdbcc.s     : 2.8
ftrapcc.s   : 2.5
fscc.s      : 2.6
fmovm.s     : 2.15
fctrl.s     : 2.6
fcalc_ea.s  : 2.7
fmem.s      : 2.9
fout.s      : 2.9
ireg.s      : 2.6
fdenorm.s   : 2.3
fround.s    : 2.4
fnorm.s     : 2.3
foptag_set.s: 2.4
fresult.s   : 2.3
fpack.s     : 2.6
fdecbin.s   : 2.4
fbindec.s   : 2.5
fbinstr.s   : 2.3
faccess.s   : 2.3

pfpsp.sa
----------
freal.s     : 2.4
hdr.fpu     : 2.4
x_fovfl.s   : 2.16
x_funfl.s   : 2.19
x_funsupp.s : 2.27
x_effadd.s  : 2.21
x_foperr.s  : 2.9
x_fsnan.s   : 2.12
x_finex.s   : 2.14
x_fdz.s     : 2.5
x_fline2.s  : 2.3
fcalc_ea.s  : 2.7
foptbl2.s   : 2.4
fmovm.s     : 2.15
fctrl.s     : 2.6
fmisc.s     : 2.3
fdenorm.s   : 2.3
fround.s    : 2.4
fnorm.s     : 2.3
foptag_set.s: 2.4
fresult.s   : 2.3
fout.s      : 2.9
fmul.s      : 2.5
fin.s       : 2.4
fdiv.s      : 2.5
fneg.s      : 2.4
ftst.s      : 2.3
fint.s      : 2.3
fintrz.s    : 2.3
fabs.s      : 2.4
fcmp.s      : 2.4
fsglmul.s   : 2.5
fsgldiv.s   : 2.8
fadd.s      : 2.6
fsub.s      : 2.6
fsqrt.s     : 2.4
ireg.s      : 2.6
fpack.s     : 2.6
fdecbin.s   : 2.4
fbindec.s   : 2.5
fbinstr.s   : 2.3
faccess.s   : 2.3

fplsp.sa
----------
lfptop.s    : 2.3
hdr.fpu     : 2.4
fsin.s      : 2.6
ftan.s      : 2.6
fatan.s     : 2.3
fasin.s     : 2.3
facos.s     : 2.5
fetox.s     : 2.4
fgetem.s    : 2.5
fcosh.s     : 2.4
fsinh.s     : 2.5
ftanh.s     : 2.3
flogn.s     : 2.6
fatanh.s    : 2.4
flog2.s     : 2.4
ftwotox.s   : 2.4
fscale.s    : 2.5
frem_mod.s  : 2.6
l_support.s : 2.15
fnorm.s     : 2.3

isp.sa
----------
ireal.s     : 2.4
hdr.int     : 2.4
x_uieh.s    : 2.13
icalc_ea.s  : 2.11
imovep.s    : 2.8
ichk2cmp2.s : 2.6
idiv64.s    : 2.10
imul64.s    : 
icas2.s     : 2.11
icas.s      : 2.12
icas2_core.s: 2.6
icas_core.s : 2.6

ilsp.sa
----------
litop.s     : 2.2
l_idiv64.s  : 2.8
l_imul64.s  : 2.6
l_ichk2cmp2.s: 2.5

ex. files
----------
wrk/fskeleton.s: 2.2
wrk/iskeleton.s: 2.2
wrk/os.s    : 2.1

tests
----------
itest.s     : 2.2
ftest.s     : 2.1
# Makefile for 680x0 Linux 68060 integer/floating point support package
#
# This file is subject to the terms and conditions of the GNU General Public
# License.  See the file "README.legal" in the main directory of this archive
# for more details.

.S.o:
	$(CC) $(AFLAGS) -traditional -c -o $*.o $<

OS_TARGET := ifpsp.o

OS_OBJS	  := fskeleton.o iskeleton.o os.o

all:	$(OS_TARGET)

include $(TOPDIR)/Rules.make

$(OS_OBJS):

$(OS_TARGET): $(OS_OBJS)
	$(LD) -x -r -o $(OS_TARGET) $(OS_OBJS)
~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
MOTOROLA MICROPROCESSOR & MEMORY TECHNOLOGY GROUP
M68000 Hi-Performance Microprocessor Division
M68060 Software Package
Production Release P1.00 -- October 10, 1994

M68060 Software Package Copyright � 1993, 1994 Motorola Inc.  All rights reserved.
 
THE SOFTWARE is provided on an "AS IS" basis and without warranty.
To the maximum extent permitted by applicable law,
MOTOROLA DISCLAIMS ALL WARRANTIES WHETHER EXPRESS OR IMPLIED, 
INCLUDING IMPLIED WARRANTIES OF MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE
and any warranty against infringement with regard to the SOFTWARE
(INCLUDING ANY MODIFIED VERSIONS THEREOF) and any accompanying written materials.

To the maximum extent permitted by applicable law,
IN NO EVENT SHALL MOTOROLA BE LIABLE FOR ANY DAMAGES WHATSOEVER
(INCLUDING WITHOUT LIMITATION, DAMAGES FOR LOSS OF BUSINESS PROFITS,
BUSINESS INTERRUPTION, LOSS OF BUSINESS INFORMATION, OR OTHER PECUNIARY LOSS)
ARISING OF THE USE OR INABILITY TO USE THE SOFTWARE.
Motorola assumes no responsibility for the maintenance and support of the SOFTWARE.

You are hereby granted a copyright license to use, modify, and distribute the SOFTWARE
so long as this entire notice is retained without alteration in any modified and/or
redistributed versions, and that such modified versions are clearly identified as such.
No licenses are granted by implication, estoppel or otherwise under any patents
or trademarks of Motorola, Inc.
~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
Files in this directory:
-------------------------

fpsp.sa		Full FP Kernel Module - hex image
fpsp.s		Full FP Kernel Module - source code
fpsp.doc	Full FP Kernel Module - on-line documentation

pfpsp.sa	Partial FP Kernel Module - hex image
pfpsp.s		Partial FP Kernel Module - source code

fplsp.sa	FP Library Module - hex image
fplsp.s		FP Library Module - source code
fplsp.doc	FP Library Module - on-line documentation

isp.sa		Integer Unimplemented Kernel Module - hex image
isp.s		Integer Unimplemented Kernel Module - source code
isp.doc		Integer Unimplemented Kernel Module - on-line doc

ilsp.sa		Integer Unimplemented Library Module - hex image
ilsp.s		Integer Unimplemented Library Module - source code
ilsp.doc	Integer Unimplemented Library Module - on-line doc

fskeleton.s	Sample Call-outs needed by fpsp.sa and pfpsp.sa

iskeleton.s	Sample Call-outs needed by isp.sa

os.s		Sample Call-outs needed by fpsp.sa, pfpsp.sa, and isp.sa

ftest.sa	Simple test program to test that {p}fpsp.sa
		was connected properly; hex image
ftest.s		above test; source code

itest.sa	Simple test program to test that isp.sa was
		connected properly; hex image
itest.s		above test; source code

test.doc	on-line documentation for {i,f}test.sa

README		This file

ERRATA		Known errata for this release

MISC		Release file version numbers
rnel/linux/include/linux/init.h \
   /home/me/kernel/linux/include/linux/spinlock.h \
   /home/me/kernel/linux/include/linux/pci.h \
   /home/me/kernel/linux/include/linux/isapnp.h \
   /home/me/kernel/linux/include/asm/dma.h \
   /home/me/kernel/linux/include/asm/system.h \
   /home/me/kernel/linux/include/asm/io.h \
   /home/me/kernel/linux/include/linux/blk.h \
   /home/me/kernel/linux/include/linux/mca.h \
   scsi.h \
   hosts.h \
   aha1542.h \
   /home/me/kernel/linux/include/linux/stat.h \
   $(wildcard /home/me/kernel/linux/include/config/mca.h) \
   sd.h \
   scsi_module.c
aha1542.h: \
   /home/me/kernel/linux/include/linux/types.h \
   /home/me/kernel/linux/include/linux/kdev_t.h
	@touch aha1542.h
aha1740.o: aha1740.c \
   /home/me/kernel/linux/include/linux/module.h \
   /home/me/kernel/linux/include/linux/kernel.h \
   /home/me/kernel/linux/include/linux/types.h \
   /home/me/kernel/linux/include/linux/string.h \
   /home/me/kernel/linux/include/linux/ioport.h \
   /home/me/kernel/linux/include/linux/proc_fs.h \
   /home/me/kernel/linux/include/linux/sched.h \
   /home/me/kernel/linux/include/asm/dma.h \
   /home/me/kernel/linux/include/asm/system.h \
   /home/me/kernel/linux/include/asm/io.h \
   /home/me/kernel/linux/include/linux/blk.h \
   scsi.h \
   hosts.h \
   sd.h \
   aha1740.h \
   /home/me/kernel/linux/include/linux/stat.h \
   scsi_module.c
aha1740.h: \
   /home/me/kernel/linux/include/linux/types.h \
   /home/me/kernel/linux/include/linux/kdev_t.h
	@touch aha1740.h
aic7xxx_old.o: aic7xxx_old.c \
   /home/me/kernel/linux/include/linux/module.h \
   /home/me/kernel/linux/include/asm/io.h \
   /home/me/kernel/linux/include/asm/irq.h \
   /home/me/kernel/linux/include/asm/byteorder.h \
   /home/me/kernel/linux/include/linux/version.h \
   /home/me/kernel/linux/include/linux/string.h \
   /home/me/kernel/linux/include/linux/errno.h \
   /home/me/kernel/linux/include/linux/kernel.h \
   /home/me/kernel/linux/include/linux/ioport.h \
   /home/me/kernel/linux/include/linux/delay.h \
   /home/me/kernel/linux/include/linux/sched.h \
   /home/me/kernel/linux/include/linux/pci.h \
   /home/me/kernel/linux/include/linux/proc_fs.h \
   /home/me/kernel/linux/include/linux/blk.h \
   /home/me/kernel/linux/include/linux/tqueue.h \
   /home/me/kernel/linux/include/linux/init.h \
   /home/me/kernel/linux/include/linux/spinlock.h \
   /home/me/kernel/linux/include/linux/smp.h \
   /home/me/kernel/linux/include/linux/blk.h \
   sd.h \
   scsi.h \
   hosts.h \
   aic7xxx_old/aic7xxx.h \
   aic7xxx_old/sequencer.h \
   aic7xxx_old/scsi_message.h \
   aic7xxx_old/aic7xxx_reg.h \
   /home/me/kernel/linux/include/scsi/scsicam.h \
   /home/me/kernel/linux/include/linux/stat.h \
   /home/me/kernel/linux/include/linux/slab.h \
   $(wildcard /home/me/kernel/linux/include/config/aic7xxx/old/cmds/per/device.h) \
   $(wildcard /home/me/kernel/linux/include/config/aic7xxx/old/proc/stats.h) \
   $(wildcard /home/me/kernel/linux/include/config/aic7xxx/old/tcq/on/by/default.h) \
   aic7xxx_old/aic7xxx_seq.c \
   $(wildcard /home/me/kernel/linux/include/config/pci.h) \
   aic7xxx_old/aic7xxx_proc.c \
   scsi_module.c
amiga7xx.o: amiga7xx.c \
   /home/me/kernel/linux/include/linux/types.h \
   /home/me/kernel/linux/include/linux/mm.h \
   /home/me/kernel/linux/include/linux/blk.h \
   /home/me/kernel/linux/include/linux/sched.h \
   /home/me/kernel/linux/include/linux/version.h \
   /home/me/kernel/linux/include/linux/zorro.h \
   /home/me/kernel/linux/include/asm/setup.h \
   /home/me/kernel/linux/include/asm/page.h \
   /home/me/kernel/linux/include/asm/pgtable.h \
   /home/me/kernel/linux/include/asm/irq.h \
   scsi.h \
   hosts.h \
   53c7xx.h \
   amiga7xx.h \
   /home/me/kernel/linux/include/linux/stat.h \
   $(wildcard /home/me/kernel/linux/include/config/a4000t/scsi.h) \
   $(wildcard /home/me/kernel/linux/include/config/blz603eplus/scsi.h) \
   $(wildcard /home/me/kernel/linux/include/config/warpengine/scsi.h) \
   $(wildcard /home/me/kernel/linux/include/config/a4091/scsi.h) \
   $(wildcard /home/me/kernel/linux/include/config/gvp/turbo/scsi.h) \
   scsi_module.c
amiga7xx.h: \
   /home/me/kernel/linux/include/linux/types.h \
   /home/me/kernel/linux/include/scsi/scsicam.h
	@touch amiga7xx.h
atari_NCR5380.o: atari_NCR5380.c \
   /home/me/kernel/linux/include/linux/delay.h \
   /home/me/kernel/linux/include/linux/tqueue.h \
   /home/me/kernel/linux/include/linux/interrupt.h \
   $(wildcard /home/me/kernel/linux/include/config/atari/scsi/toshiba/delay.h)
atari_dma_emul.o: atari_dma_emul.c \
   /home/me/kernel/linux/include/asm/uaccess.h
atari_scsi.o: atari_scsi.c \
   /home/me/kernel/linux/include/linux/module.h \
   /home/me/kernel/linux/include/linux/types.h \
   /home/me/kernel/linux/include/linux/stddef.h \
   /home/me/kernel/linux/include/linux/ctype.h \
   /home/me/kernel/linux/include/linux/delay.h \
   /home/me/kernel/linux/include/linux/mm.h \
   /home/me/kernel/linux/include/linux/blk.h \
   /home/me/kernel/linux/include/linux/sched.h \
   /home/me/kernel/linux/include/linux/interrupt.h \
   /home/me/kernel/linux/include/linux/init.h \
   /home/me/kernel/linux/include/linux/nvram.h \
   /home/me/kernel/linux/include/asm/setup.h \
   /home/me/kernel/linux/include/asm/page.h \
   /home/me/kernel/linux/include/asm/pgtable.h \
   /home/me/kernel/linux/include/asm/irq.h \
   /home/me/kernel/linux/include/asm/bitops.h \
   scsi.h \
   hosts.h \
   atari_scsi.h \
   NCR5380.h \
   constants.h \
   /home/me/kernel/linux/include/asm/io.h \
   /home/me/kernel/linux/include/linux/stat.h \
   $(wildcard /home/me/kernel/linux/include/config/atari/scsi/toshiba/delay.h) \
   $(wildcard /home/me/kernel/linux/include/config/atari/scsi/reset/boot.h) \
   $(wildcard /home/me/kernel/linux/include/config/tt/dma/emul.h) \
   atari_dma_emul.c \
   atari_NCR5380.c \
   scsi_module.c
atp870u.o: atp870u.c \
   /home/me/kernel/linux/include/linux/module.h \
   /home/me/kernel/linux/include/linux/kernel.h \
   /home/me/kernel/linux/include/linux/types.h \
   /home/me/kernel/linux/include/linux/string.h \
   /home/me/kernel/linux/include/linux/ioport.h \
   /home/me/kernel/linux/include/linux/delay.h \
   /home/me/kernel/linux/include/linux/sched.h \
   /home/me/kernel/linux/include/linux/proc_fs.h \
   /home/me/kernel/linux/include/linux/spinlock.h \
   /home/me/kernel/linux/include/asm/system.h \
   /home/me/kernel/linux/include/asm/io.h \
   /home/me/kernel/linux/include/linux/pci.h \
   /home/me/kernel/linux/include/linux/blk.h \
   scsi.h \
   hosts.h \
   atp870u.h \
   /home/me/kernel/linux/include/linux/stat.h \
   sd.h \
   scsi_module.c
atp870u.h: \
   /home/me/kernel/linux/include/linux/types.h \
   /home/me/kernel/linux/include/linux/kdev_t.h
	@touch atp870u.h
blz1230.o: blz1230.c \
   /home/me/kernel/linux/include/linux/module.h \
   /home/me/kernel/linux/include/linux/init.h \
   /home/me/kernel/linux/include/linux/kernel.h \
   /home/me/kernel/linux/include/linux/delay.h \
   /home/me/kernel/linux/include/linux/types.h \
   /home/me/kernel/linux/include/linux/string.h \
   /home/me/kernel/linux/include/linux/slab.h \
   /home/me/kernel/linux/include/linux/blk.h \
   /home/me/kernel/linux/include/linux/proc_fs.h \
   /home/me/kernel/linux/include/linux/stat.h \
   scsi.h \
   hosts.h \
   NCR53C9x.h \
   blz1230.h \
   /home/me/kernel/linux/include/linux/zorro.h \
   /home/me/kernel/linux/include/asm/irq.h \
   /home/me/kernel/linux/include/asm/pgtable.h \
   blz1230.h \
   scsi_module.c
blz1230.h: \
   NCR53C9x.h
	@touch blz1230.h
blz2060.o: blz2060.c \
   /home/me/kernel/linux/include/linux/module.h \
   /home/me/kernel/linux/include/linux/init.h \
   /home/me/kernel/linux/include/linux/kernel.h \
   /home/me/kernel/linux/include/linux/delay.h \
   /home/me/kernel/linux/include/linux/types.h \
   /home/me/kernel/linux/include/linux/string.h \
   /home/me/kernel/linux/include/linux/slab.h \
   /home/me/kernel/linux/include/linux/blk.h \
   /home/me/kernel/linux/include/linux/proc_fs.h \
   /home/me/kernel/linux/include/linux/stat.h \
   scsi.h \
   hosts.h \
   NCR53C9x.h \
   blz2060.h \
   /home/me/kernel/linux/include/linux/zorro.h \
   /home/me/kernel/linux/include/asm/irq.h \
   /home/me/kernel/linux/include/asm/pgtable.h \
   blz2060.h \
   scsi_module.c
blz2060.h: \
   NCR53C9x.h
	@touch blz2060.h
bvme6000.o: bvme6000.c \
   /home/me/kernel/linux/include/linux/types.h \
   /home/me/kernel/linux/include/linux/mm.h \
   /home/me/kernel/linux/include/linux/blk.h \
   /home/me/kernel/linux/include/linux/sched.h \
   /home/me/kernel/linux/include/linux/version.h \
   /home/me/kernel/linux/include/linux/zorro.h \
   /home/me/kernel/linux/include/asm/setup.h \
   /home/me/kernel/linux/include/asm/page.h \
   /home/me/kernel/linux/include/asm/pgtable.h \
   /home/me/kernel/linux/include/asm/irq.h \
   scsi.h \
   hosts.h \
   53c7xx.h \
   bvme6000.h \
   /home/me/kernel/linux/include/linux/stat.h \
   scsi_module.c
bvme6000.h: \
   /home/me/kernel/linux/include/linux/types.h \
   /home/me/kernel/linux/include/scsi/scsicam.h
	@touch bvme6000.h
constants.o: constants.c \
   /home/me/kernel/linux/include/linux/module.h \
   /home/me/kernel/linux/include/linux/blk.h \
   /home/me/kernel/linux/include/linux/kernel.h \
   scsi.h \
   hosts.h \
   $(wildcard /home/me/kernel/linux/include/config/scsi/constants.h)
cpqfcTS.h: \
   cpqfcTSstructs.h
	@touch cpqfcTS.h
cpqfcTScontrol.o: cpqfcTScontrol.c \
   /home/me/kernel/linux/include/linux/blk.h \
   /home/me/kernel/linux/include/linux/kernel.h \
   /home/me/kernel/linux/include/linux/string.h \
   /home/me/kernel/linux/include/linux/ioport.h \
   /home/me/kernel/linux/include/linux/sched.h \
   /home/me/kernel/linux/include/linux/slab.h \
   /home/me/kernel/linux/include/linux/types.h \
   /home/me/kernel/linux/include/linux/pci.h \
   /home/me/kernel/linux/include/linux/delay.h \
   /home/me/kernel/linux/include/linux/unistd.h \
   /home/me/kernel/linux/include/asm/io.h \
   /home/me/kernel/linux/include/asm/irq.h \
   /home/me/kernel/linux/include/linux/spinlock.h \
   sd.h \
   hosts.h \
   cpqfcTSchip.h \
   cpqfcTSstructs.h
cpqfcTSi2c.o: cpqfcTSi2c.c \
   /home/me/kernel/linux/include/linux/types.h \
   /home/me/kernel/linux/include/linux/string.h \
   /home/me/kernel/linux/include/linux/pci.h \
   /home/me/kernel/linux/include/linux/delay.h \
   /home/me/kernel/linux/include/linux/sched.h \
   /home/me/kernel/linux/include/asm/io.h \
   cpqfcTSchip.h
cpqfcTSinit.o: cpqfcTSinit.c \
   /home/me/kernel/linux/include/linux/blk.h \
   /home/me/kernel/linux/include/linux/kernel.h \
   /home/me/kernel/linux/include/linux/string.h \
   /home/me/kernel/linux/include/linux/sched.h \
   /home/me/kernel/linux/include/linux/types.h \
   /home/me/kernel/linux/include/linux/pci.h \
   /home/me/kernel/linux/include/linux/delay.h \
   /home/me/kernel/linux/include/linux/timer.h \
   /home/me/kernel/linux/include/linux/ioport.h \
   /home/me/kernel/linux/include/linux/vmalloc.h \
   /home/me/kernel/linux/include/linux/completion.h \
   /home/me/kernel/linux/include/asm/unistd.h \
   /home/me/kernel/linux/include/asm/io.h \
   /home/me/kernel/linux/include/asm/uaccess.h \
   /home/me/kernel/linux/include/asm/irq.h \
   /home/me/kernel/linux/include/linux/spinlock.h \
   sd.h \
   /home/me/kernel/linux/include/scsi/scsi_ioctl.h \
   hosts.h \
   cpqfcTSchip.h \
   cpqfcTSstructs.h \
   cpqfcTStrigger.h \
   cpqfcTS.h \
   /home/me/kernel/linux/include/linux/module.h \
   /home/me/kernel/linux/include/linux/version.h \
   /home/me/kernel/linux/include/linux/slab.h \
   scsi_module.c
cpqfcTSstructs.h: \
   /home/me/kernel/linux/include/linux/timer.h \
   /home/me/kernel/linux/include/linux/tqueue.h \
   /home/me/kernel/linux/include/asm/atomic.h \
   cpqfcTSioctl.h
	@touch cpqfcTSstructs.h
cpqfcTStrigger.o: cpqfcTStrigger.c \
   cpqfcTStrigger.h \
   /home/me/kernel/linux/include/linux/kernel.h \
   /home/me/kernel/linux/include/linux/ioport.h \
   /home/me/kernel/linux/include/linux/types.h \
   /home/me/kernel/linux/include/linux/pci.h \
   /home/me/kernel/linux/include/asm/io.h
cpqfcTSworker.o: cpqfcTSworker.c \
   /home/me/kernel/linux/include/linux/sched.h \
   /home/me/kernel/linux/include/linux/timer.h \
   /home/me/kernel/linux/include/linux/string.h \
   /home/me/kernel/linux/include/linux/slab.h \
   /home/me/kernel/linux/include/linux/ioport.h \
   /home/me/kernel/linux/include/linux/kernel.h \
   /home/me/kernel/linux/include/linux/stat.h \
   /home/me/kernel/linux/include/linux/blk.h \
   /home/me/kernel/linux/include/linux/interrupt.h \
   /home/me/kernel/linux/include/linux/delay.h \
   /home/me/kernel/linux/include/linux/smp_lock.h \
   /home/me/kernel/linux/include/linux/unistd.h \
   /home/me/kernel/linux/include/asm/system.h \
   /home/me/kernel/linux/include/asm/irq.h \
   /home/me/kernel/linux/include/asm/dma.h \
   sd.h \
   hosts.h \
   cpqfcTSchip.h \
   cpqfcTSstructs.h \
   cpqfcTStrigger.h
cpqioctl.o: cpqioctl.c \
   /home/me/kernel/linux/include/linux/types.h \
   ../../include/scsi/scsi.h \
   cpqfcTSioctl.h
cyberstorm.o: cyberstorm.c \
   /home/me/kernel/linux/include/linux/module.h \
   /home/me/kernel/linux/include/linux/init.h \
   /home/me/kernel/linux/include/linux/kernel.h \
   /home/me/kernel/linux/include/linux/delay.h \
   /home/me/kernel/linux/include/linux/types.h \
   /home/me/kernel/linux/include/linux/string.h \
   /home/me/kernel/linux/include/linux/slab.h \
   /home/me/kernel/linux/include/linux/blk.h \
   /home/me/kernel/linux/include/linux/proc_fs.h \
   /home/me/kernel/linux/include/linux/stat.h \
   scsi.h \
   hosts.h \
   NCR53C9x.h \
   cyberstorm.h \
   /home/me/kernel/linux/include/linux/zorro.h \
   /home/me/kernel/linux/include/asm/irq.h \
   /home/me/kernel/linux/include/asm/pgtable.h \
   cyberstorm.h \
   scsi_module.c
cyberstorm.h: \
   NCR53C9x.h
	@touch cyberstorm.h
cyberstormII.o: cyberstormII.c \
   /home/me/kernel/linux/include/linux/module.h \
   /home/me/kernel/linux/include/linux/init.h \
   /home/me/kernel/linux/include/linux/kernel.h \
   /home/me/kernel/linux/include/linux/delay.h \
   /home/me/kernel/linux/include/linux/types.h \
   /home/me/kernel/linux/include/linux/string.h \
   /home/me/kernel/linux/include/linux/slab.h \
   /home/me/kernel/linux/include/linux/blk.h \
   /home/me/kernel/linux/include/linux/proc_fs.h \
   /home/me/kernel/linux/include/linux/stat.h \
   scsi.h \
   hosts.h \
   NCR53C9x.h \
   cyberstormII.h \
   /home/me/kernel/linux/include/linux/zorro.h \
   /home/me/kernel/linux/include/asm/irq.h \
   /home/me/kernel/linux/include/asm/pgtable.h \
   cyberstormII.h \
   scsi_module.c
cyberstormII.h: \
   NCR53C9x.h
	@touch cyberstormII.h
dc390.h: \
   /home/me/kernel/linux/include/linux/version.h
	@touch dc390.h
dec_esp.o: dec_esp.c \
   /home/me/kernel/linux/include/linux/kernel.h \
   /home/me/kernel/linux/include/linux/delay.h \
   /home/me/kernel/linux/include/linux/types.h \
   /home/me/kernel/linux/include/linux/string.h \
   /home/me/kernel/linux/include/linux/slab.h \
   /home/me/kernel/linux/include/linux/blk.h \
   /home/me/kernel/linux/include/linux/proc_fs.h \
   /home/me/kernel/linux/include/linux/stat.h \
   scsi.h \
   hosts.h \
   NCR53C9x.h \
   dec_esp.h \
   /home/me/kernel/linux/include/asm/irq.h \
   /home/me/kernel/linux/include/asm/dma.h \
   /home/me/kernel/linux/include/asm/pgtable.h \
   scsi_module.c
dec_esp.h: \
   NCR53C9x.h
	@touch dec_esp.h
dmx3191d.o: dmx3191d.c \
   /home/me/kernel/linux/include/asm/io.h \
   /home/me/kernel/linux/include/asm/system.h \
   /home/me/kernel/linux/include/linux/blk.h \
   /home/me/kernel/linux/include/linux/init.h \
   /home/me/kernel/linux/include/linux/ioport.h \
   /home/me/kernel/linux/include/linux/module.h \
   /home/me/kernel/linux/include/linux/pci.h \
   /home/me/kernel/linux/include/linux/sched.h \
   /home/me/kernel/linux/include/linux/signal.h \
   /home/me/kernel/linux/include/linux/stat.h \
   /home/me/kernel/linux/include/linux/version.h \
   scsi.h \
   hosts.h \
   constants.h \
   sd.h \
   dmx3191d.h \
   NCR5380.h \
   NCR5380.c \
   scsi_module.c
dpt_i2o.o: dpt_i2o.c \
   /home/me/kernel/linux/include/linux/version.h \
   /home/me/kernel/linux/include/linux/module.h \
   /home/me/kernel/linux/include/linux/ioctl.h \
   /home/me/kernel/linux/include/asm/uaccess.h \
   /home/me/kernel/linux/include/linux/stat.h \
   /home/me/kernel/linux/include/linux/slab.h \
   /home/me/kernel/linux/include/linux/pci.h \
   /home/me/kernel/linux/include/linux/proc_fs.h \
   /home/me/kernel/linux/include/linux/blk.h \
   /home/me/kernel/linux/include/linux/delay.h \
   /home/me/kernel/linux/include/linux/tqueue.h \
   /home/me/kernel/linux/include/linux/interrupt.h \
   /home/me/kernel/linux/include/linux/kernel.h \
   /home/me/kernel/linux/include/linux/sched.h \
   /home/me/kernel/linux/include/linux/reboot.h \
   /home/me/kernel/linux/include/linux/smp_lock.h \
   /home/me/kernel/linux/include/linux/timer.h \
   /home/me/kernel/linux/include/linux/string.h \
   /home/me/kernel/linux/include/linux/ioport.h \
   /home/me/kernel/linux/include/linux/stat.h \
   /home/me/kernel/linux/include/asm/processor.h \
   /home/me/kernel/linux/include/asm/pgtable.h \
   /home/me/kernel/linux/include/asm/io.h \
   scsi.h \
   hosts.h \
   sd.h \
   dpt/dptsig.h \
   dpti.h \
   scsi_module.c
dpti.h: \
   /home/me/kernel/linux/include/linux/version.h \
   dpt/sys_info.h \
   /home/me/kernel/linux/include/linux/wait.h \
   dpt/dpti_i2o.h \
   dpt/dpti_ioctl.h
	@touch dpti.h
dtc.o: dtc.c \
   /home/me/kernel/linux/include/asm/system.h \
   /home/me/kernel/linux/include/linux/module.h \
   /home/me/kernel/linux/include/linux/signal.h \
   /home/me/kernel/linux/include/linux/sched.h \
   /home/me/kernel/linux/include/linux/blk.h \
   /home/me/kernel/linux/include/asm/io.h \
   scsi.h \
   hosts.h \
   dtc.h \
   NCR5380.h \
   constants.h \
   sd.h \
   /home/me/kernel/linux/include/linux/stat.h \
   /home/me/kernel/linux/include/linux/string.h \
   /home/me/kernel/linux/include/linux/init.h \
   NCR5380.c \
   scsi_module.c
eata.o: eata.c \
   /home/me/kernel/linux/include/linux/version.h \
   /home/me/kernel/linux/include/linux/module.h \
   /home/me/kernel/linux/include/linux/string.h \
   /home/me/kernel/linux/include/linux/sched.h \
   /home/me/kernel/linux/include/linux/kernel.h \
   /home/me/kernel/linux/include/linux/ioport.h \
   /home/me/kernel/linux/include/linux/delay.h \
   /home/me/kernel/linux/include/asm/io.h \
   /home/me/kernel/linux/include/asm/system.h \
   /home/me/kernel/linux/include/asm/byteorder.h \
   /home/me/kernel/linux/include/linux/proc_fs.h \
   /home/me/kernel/linux/include/linux/blk.h \
   scsi.h \
   hosts.h \
   sd.h \
   /home/me/kernel/linux/include/asm/dma.h \
   /home/me/kernel/linux/include/asm/irq.h \
   eata.h \
   /home/me/kernel/linux/include/linux/stat.h \
   /home/me/kernel/linux/include/linux/pci.h \
   /home/me/kernel/linux/include/linux/init.h \
   /home/me/kernel/linux/include/linux/ctype.h \
   /home/me/kernel/linux/include/linux/spinlock.h \
   $(wildcard /home/me/kernel/linux/include/config/scsi/eata/tagged/queue.h) \
   $(wildcard /home/me/kernel/linux/include/config/scsi/eata/linked/commands.h) \
   $(wildcard /home/me/kernel/linux/include/config/scsi/eata/max/tags.h) \
   $(wildcard /home/me/kernel/linux/include/config/pci.h) \
   scsi_module.c
eata.h: \
   /home/me/kernel/linux/include/scsi/scsicam.h
	@touch eata.h
eata_dma.o: eata_dma.c \
   /home/me/kernel/linux/include/linux/module.h \
   /home/me/kernel/linux/include/linux/kernel.h \
   /home/me/kernel/linux/include/linux/sched.h \
   /home/me/kernel/linux/include/linux/string.h \
   /home/me/kernel/linux/include/linux/ioport.h \
   /home/me/kernel/linux/include/linux/slab.h \
   /home/me/kernel/linux/include/linux/in.h \
   /home/me/kernel/linux/include/linux/pci.h \
   /home/me/kernel/linux/include/linux/proc_fs.h \
   /home/me/kernel/linux/include/linux/delay.h \
   /home/me/kernel/linux/include/asm/byteorder.h \
   /home/me/kernel/linux/include/asm/types.h \
   /home/me/kernel/linux/include/asm/io.h \
   /home/me/kernel/linux/include/asm/dma.h \
   /home/me/kernel/linux/include/asm/pgtable.h \
   /home/me/kernel/linux/include/linux/spinlock.h \
   /home/me/kernel/linux/include/linux/blk.h \
   scsi.h \
   sd.h \
   hosts.h \
   eata_dma.h \
   eata_dma_proc.h \
   /home/me/kernel/linux/include/linux/stat.h \
   eata_dma_proc.c \
   $(wildcard /home/me/kernel/linux/include/config/pci.h) \
   scsi_module.c
eata_dma.h: \
   eata_generic.h \
   /home/me/kernel/linux/include/scsi/scsicam.h
	@touch eata_dma.h
eata_pio.o: eata_pio.c \
   /home/me/kernel/linux/include/linux/module.h \
   /home/me/kernel/linux/include/linux/kernel.h \
   /home/me/kernel/linux/include/linux/sched.h \
   /home/me/kernel/linux/include/linux/string.h \
   /home/me/kernel/linux/include/linux/ioport.h \
   /home/me/kernel/linux/include/linux/slab.h \
   /home/me/kernel/linux/include/linux/in.h \
   /home/me/kernel/linux/include/linux/pci.h \
   /home/me/kernel/linux/include/linux/proc_fs.h \
   /home/me/kernel/linux/include/asm/io.h \
   eata_pio.h \
   eata_dma_proc.h \
   scsi.h \
   sd.h \
   /home/me/kernel/linux/include/linux/stat.h \
   /home/me/kernel/linux/include/linux/blk.h \
   /home/me/kernel/linux/include/linux/spinlock.h \
   eata_pio_proc.c \
   $(wildcard /home/me/kernel/linux/include/config/pci.h) \
   scsi_module.c
eata_pio.h: \
   /home/me/kernel/linux/include/linux/blk.h \
   scsi.h \
   hosts.h \
   /home/me/kernel/linux/include/scsi/scsicam.h \
   eata_generic.h
	@touch eata_pio.h
esp.o: esp.c \
   /home/me/kernel/linux/include/linux/kernel.h \
   /home/me/kernel/linux/include/linux/delay.h \
   /home/me/kernel/linux/include/linux/types.h \
   /home/me/kernel/linux/include/linux/string.h \
   /home/me/kernel/linux/include/linux/slab.h \
   /home/me/kernel/linux/include/linux/blk.h \
   /home/me/kernel/linux/include/linux/proc_fs.h \
   /home/me/kernel/linux/include/linux/stat.h \
   /home/me/kernel/linux/include/linux/init.h \
   /home/me/kernel/linux/include/linux/spinlock.h \
   scsi.h \
   hosts.h \
   esp.h \
   /home/me/kernel/linux/include/asm/dma.h \
   /home/me/kernel/linux/include/asm/system.h \
   /home/me/kernel/linux/include/asm/ptrace.h \
   /home/me/kernel/linux/include/asm/pgtable.h \
   /home/me/kernel/linux/include/asm/io.h \
   /home/me/kernel/linux/include/asm/irq.h \
   /home/me/kernel/linux/include/linux/module.h \
   $(wildcard /home/me/kernel/linux/include/config/sun4.h) \
   $(wildcard /home/me/kernel/linux/include/config/pci.h) \
   scsi_module.c
esp.h: \
   /home/me/kernel/linux/include/asm/dma.h
	@touch esp.h
fastlane.o: fastlane.c \
   /home/me/kernel/linux/include/linux/module.h \
   /home/me/kernel/linux/include/linux/init.h \
   /home/me/kernel/linux/include/linux/kernel.h \
   /home/me/kernel/linux/include/linux/delay.h \
   /home/me/kernel/linux/include/linux/types.h \
   /home/me/kernel/linux/include/linux/string.h \
   /home/me/kernel/linux/include/linux/slab.h \
   /home/me/kernel/linux/include/linux/blk.h \
   /home/me/kernel/linux/include/linux/proc_fs.h \
   /home/me/kernel/linux/include/linux/stat.h \
   scsi.h \
   hosts.h \
   NCR53C9x.h \
   fastlane.h \
   /home/me/kernel/linux/include/linux/zorro.h \
   /home/me/kernel/linux/include/asm/irq.h \
   /home/me/kernel/linux/include/asm/pgtable.h \
   fastlane.h \
   scsi_module.c
fastlane.h: \
   NCR53C9x.h
	@touch fastlane.h
fcal.o: fcal.c \
   /home/me/kernel/linux/include/linux/kernel.h \
   /home/me/kernel/linux/include/linux/delay.h \
   /home/me/kernel/linux/include/linux/types.h \
   /home/me/kernel/linux/include/linux/string.h \
   /home/me/kernel/linux/include/linux/slab.h \
   /home/me/kernel/linux/include/linux/blk.h \
   /home/me/kernel/linux/include/linux/proc_fs.h \
   /home/me/kernel/linux/include/linux/stat.h \
   /home/me/kernel/linux/include/linux/init.h \
   $(wildcard /home/me/kernel/linux/include/config/kmod.h) \
   /home/me/kernel/linux/include/linux/kmod.h \
   /home/me/kernel/linux/include/asm/irq.h \
   scsi.h \
   hosts.h \
   ../fc4/fcp_impl.h \
   fcal.h \
   /home/me/kernel/linux/include/linux/module.h \
   $(wildcard /home/me/kernel/linux/include/config/fc4/socal/module.h) \
   scsi_module.c
fcal.h: \
   ../fc4/fcp_impl.h
	@touch fcal.h
fd_mcs.o: fd_mcs.c \
   /home/me/kernel/linux/include/linux/module.h \
   /home/me/kernel/linux/include/linux/sched.h \
   /home/me/kernel/linux/include/linux/blk.h \
   /home/me/kernel/linux/include/linux/errno.h \
   /home/me/kernel/linux/include/linux/string.h \
   /home/me/kernel/linux/include/linux/ioport.h \
   /home/me/kernel/linux/include/linux/proc_fs.h \
   /home/me/kernel/linux/include/linux/delay.h \
   /home/me/kernel/linux/include/linux/mca.h \
   /home/me/kernel/linux/include/linux/spinlock.h \
   /home/me/kernel/linux/include/asm/io.h \
   /home/me/kernel/linux/include/asm/system.h \
   scsi.h \
   hosts.h \
   fd_mcs.h \
   sd.h \
   /home/me/kernel/linux/include/scsi/scsi_ioctl.h \
   scsi_module.c
fdomain.o: fdomain.c \
   /home/me/kernel/linux/include/linux/module.h \
   /home/me/kernel/linux/include/linux/init.h \
   /home/me/kernel/linux/include/linux/sched.h \
   /home/me/kernel/linux/include/asm/io.h \
   /home/me/kernel/linux/include/linux/blk.h \
   scsi.h \
   hosts.h \
   fdomain.h \
   /home/me/kernel/linux/include/asm/system.h \
   /home/me/kernel/linux/include/linux/spinlock.h \
   /home/me/kernel/linux/include/linux/errno.h \
   /home/me/kernel/linux/include/linux/string.h \
   /home/me/kernel/linux/include/linux/ioport.h \
   /home/me/kernel/linux/include/linux/proc_fs.h \
   /home/me/kernel/linux/include/linux/pci.h \
   /home/me/kernel/linux/include/linux/stat.h \
   /home/me/kernel/linux/include/linux/delay.h \
   $(wildcard /home/me/kernel/linux/include/config/pci.h) \
   sd.h \
   /home/me/kernel/linux/include/scsi/scsi_ioctl.h \
   scsi_module.c
g_NCR5380.o: g_NCR5380.c \
   $(wildcard /home/me/kernel/linux/include/config/scsi/generic/ncr53c400.h) \
   $(wildcard /home/me/kernel/linux/include/config/scsi/g/ncr5380/port.h) \
   $(wildcard /home/me/kernel/linux/include/config/scsi/g/ncr5380/mem.h) \
   /home/me/kernel/linux/include/asm/system.h \
   /home/me/kernel/linux/include/asm/io.h \
   /home/me/kernel/linux/include/linux/signal.h \
   /home/me/kernel/linux/include/linux/sched.h \
   /home/me/kernel/linux/include/linux/blk.h \
   scsi.h \
   hosts.h \
   g_NCR5380.h \
   NCR5380.h \
   constants.h \
   sd.h \
   /home/me/kernel/linux/include/linux/stat.h \
   /home/me/kernel/linux/include/linux/init.h \
   /home/me/kernel/linux/include/linux/ioport.h \
   /home/me/kernel/linux/include/linux/isapnp.h \
   NCR5380.c \
   /home/me/kernel/linux/include/linux/module.h \
   scsi_module.c
g_NCR5380.h: \
   $(wildcard /home/me/kernel/linux/include/config/scsi/g/ncr5380/port.h)
	@touch g_NCR5380.h
gdth.o: gdth.c \
   /home/me/kernel/linux/include/linux/module.h \
   /home/me/kernel/linux/include/linux/version.h \
   /home/me/kernel/linux/include/linux/kernel.h \
   /home/me/kernel/linux/include/linux/types.h \
   /home/me/kernel/linux/include/linux/pci.h \
   /home/me/kernel/linux/include/linux/string.h \
   /home/me/kernel/linux/include/linux/ctype.h \
   /home/me/kernel/linux/include/linux/ioport.h \
   /home/me/kernel/linux/include/linux/delay.h \
   /home/me/kernel/linux/include/linux/sched.h \
   /home/me/kernel/linux/include/linux/in.h \
   /home/me/kernel/linux/include/linux/proc_fs.h \
   /home/me/kernel/linux/include/linux/time.h \
   /home/me/kernel/linux/include/linux/timer.h \
   /home/me/kernel/linux/include/linux/mc146818rtc.h \
   /home/me/kernel/linux/include/linux/reboot.h \
   /home/me/kernel/linux/include/asm/dma.h \
   /home/me/kernel/linux/include/asm/system.h \
   /home/me/kernel/linux/include/asm/io.h \
   /home/me/kernel/linux/include/linux/spinlock.h \
   /home/me/kernel/linux/include/asm/spinlock.h \
   /home/me/kernel/linux/include/linux/blk.h \
   scsi.h \
   hosts.h \
   sd.h \
   gdth.h \
   /home/me/kernel/linux/include/linux/init.h \
   /home/me/kernel/linux/include/linux/init.h \
   /home/me/kernel/linux/include/linux/stat.h \
   gdth_proc.h \
   gdth_proc.c \
   scsi_module.c
gdth.h: \
   /home/me/kernel/linux/include/linux/version.h \
   /home/me/kernel/linux/include/linux/types.h
	@touch gdth.h
gdth_proc.o: gdth_proc.c \
   gdth_ioctl.h \
   /home/me/kernel/linux/include/linux/completion.h
gvp11.o: gvp11.c \
   /home/me/kernel/linux/include/linux/types.h \
   /home/me/kernel/linux/include/linux/mm.h \
   /home/me/kernel/linux/include/linux/blk.h \
   /home/me/kernel/linux/include/linux/sched.h \
   /home/me/kernel/linux/include/linux/version.h \
   /home/me/kernel/linux/include/linux/init.h \
   /home/me/kernel/linux/include/asm/setup.h \
   /home/me/kernel/linux/include/asm/page.h \
   /home/me/kernel/linux/include/asm/pgtable.h \
   /home/me/kernel/linux/include/linux/zorro.h \
   /home/me/kernel/linux/include/asm/irq.h \
   /home/me/kernel/linux/include/linux/spinlock.h \
   scsi.h \
   hosts.h \
   wd33c93.h \
   gvp11.h \
   /home/me/kernel/linux/include/linux/stat.h \
   gvp11.h \
   scsi_module.c
gvp11.h: \
   /home/me/kernel/linux/include/linux/types.h
	@touch gvp11.h
hosts.o: hosts.c \
   /home/me/kernel/linux/include/linux/module.h \
   /home/me/kernel/linux/include/linux/blk.h \
   /home/me/kernel/linux/include/linux/kernel.h \
   /home/me/kernel/linux/include/linux/string.h \
   /home/me/kernel/linux/include/linux/mm.h \
   /home/me/kernel/linux/include/linux/proc_fs.h \
   /home/me/kernel/linux/include/linux/init.h \
   /home/me/kernel/linux/include/linux/unistd.h \
   scsi.h \
   hosts.h
hosts.h: \
   /home/me/kernel/linux/include/linux/proc_fs.h \
   /home/me/kernel/linux/include/linux/pci.h \
   $(wildcard /home/me/kernel/linux/include/config/sd/extra/devs.h) \
   $(wildcard /home/me/kernel/linux/include/config/sr/extra/devs.h)
	@touch hosts.h
i60uscsi.o: i60uscsi.c \
   /home/me/kernel/linux/include/linux/version.h \
   /home/me/kernel/linux/include/linux/sched.h \
   /home/me/kernel/linux/include/asm/io.h \
   i60uscsi.h
i60uscsi.h: \
   /home/me/kernel/linux/include/linux/types.h \
   $(wildcard /home/me/kernel/linux/include/config/adr.h)
	@touch i60uscsi.h
i91uscsi.o: i91uscsi.c \
   /home/me/kernel/linux/include/linux/version.h \
   /home/me/kernel/linux/include/linux/sched.h \
   /home/me/kernel/linux/include/linux/delay.h \
   /home/me/kernel/linux/include/linux/blk.h \
   /home/me/kernel/linux/include/asm/io.h \
   i91uscsi.h
i91uscsi.h: \
   /home/me/kernel/linux/include/linux/types.h \
   $(wildcard /home/me/kernel/linux/include/config/adr.h)
	@touch i91uscsi.h
ibmmca.o: ibmmca.c \
   /home/me/kernel/linux/include/linux/version.h \
   /home/me/kernel/linux/include/linux/module.h \
   /home/me/kernel/linux/include/linux/kernel.h \
   /home/me/kernel/linux/include/linux/types.h \
   /home/me/kernel/linux/include/linux/ctype.h \
   /home/me/kernel/linux/include/linux/string.h \
   /home/me/kernel/linux/include/linux/ioport.h \
   /home/me/kernel/linux/include/linux/delay.h \
   /home/me/kernel/linux/include/linux/sched.h \
   /home/me/kernel/linux/include/linux/blk.h \
   /home/me/kernel/linux/include/linux/proc_fs.h \
   /home/me/kernel/linux/include/linux/stat.h \
   /home/me/kernel/linux/include/linux/mca.h \
   /home/me/kernel/linux/include/asm/system.h \
   /home/me/kernel/linux/include/linux/spinlock.h \
   /home/me/kernel/linux/include/asm/io.h \
   /home/me/kernel/linux/include/linux/init.h \
   sd.h \
   scsi.h \
   hosts.h \
   ibmmca.h \
   $(wildcard /home/me/kernel/linux/include/config/ibmmca/scsi/order/standard.h) \
   $(wildcard /home/me/kernel/linux/include/config/ibmmca/scsi/dev/reset.h) \
   $(wildcard /home/me/kernel/linux/include/config/scsi/multi/lun.h) \
   scsi_module.c
ide-scsi.o: ide-scsi.c \
   /home/me/kernel/linux/include/linux/module.h \
   /home/me/kernel/linux/include/linux/types.h \
   /home/me/kernel/linux/include/linux/string.h \
   /home/me/kernel/linux/include/linux/kernel.h \
   /home/me/kernel/linux/include/linux/mm.h \
   /home/me/kernel/linux/include/linux/ioport.h \
   /home/me/kernel/linux/include/linux/blkdev.h \
   /home/me/kernel/linux/include/linux/errno.h \
   /home/me/kernel/linux/include/linux/hdreg.h \
   /home/me/kernel/linux/include/linux/slab.h \
   /home/me/kernel/linux/include/linux/ide.h \
   /home/me/kernel/linux/include/asm/io.h \
   /home/me/kernel/linux/include/asm/bitops.h \
   /home/me/kernel/linux/include/asm/uaccess.h \
   scsi.h \
   hosts.h \
   sd.h \
   ide-scsi.h \
   /home/me/kernel/linux/include/scsi/sg.h \
   $(wildcard /home/me/kernel/linux/include/config$2=K]m����sd.cgcc2_compiled.sd_templatesd_detectsd_initsd_finishsd_attachsd_detachsd_init_commandsd_ioctlrscsi_diskssd_devnamesd_find_queuerw_intrsd_opensd_sizessd_releasesd_fopscheck_scsidisk_media_changefop_revalidate_scsidisksd_gendisksd_gendiskssd_init_onedisksd_blocksizessd_hardsizessd_registeredsd_max_sectorssd_varyioinit_sdexit_sd__initcall_init_sd__exitcall_exit_sdscsi_block_when_processing_errorsscsicam_bios_paramsdblk_ioctlrevalidate_scsidiskscsi_ioctlsprintfprintkpaniccheck_disk_changeprint_sensescsi_io_completionscsi_allocate_requestscsi_mallocscsi_release_requestscsi_wait_reqjiffiesschedule_timeoutprint_req_sensescsi_freedevfs_register_blkdevkmallocblksize_sizehardsect_sizemax_sectorskfreedevfs_unregister_blkdevblk_devadd_gendiskregister_diskread_aheadblkdev_varyioinvalidate_devicegrok_partitionsdevfs_register_partitionsscsi_register_modulescsi_unregister_moduledel_gendiskblk_size+
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SCSI disk request error: invalid device.
<4>(sd_init_onedisk:) Request allocation failure.
<4>(sd_init_onedisk:) Memory allocation failure.
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ready
%s : READ CAPACITY failed.
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%s : unsupported sector size %d.
SCSI device %s: %d %d-byte hdwr sectors (%d MB)
%s: test WP failed, assume Write Enabled
onoff%s: Write Protect is %s
Unable to get major %d for SCSI disk
<4>scsi_devices corrupt (sd), nr_dev %d dev_max %d
removable Attached scsi %sdisk %s at scsi%d, channel %d, id %d, lun %d
Device busy for revalidation (usage=%d)
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"5KWlz����������ifeq (-D__KERNEL__ -I/home/me/kernel/linux/include -Wall -Wstrict-prototypes -Wno-trigraphs -O2 -fomit-frame-pointer -fno-strict-aliasing -fno-common -pipe -mpreferred-stack-boundary=2 -march=i686,$(strip $(subst $(comma),:,$(CFLAGS) $(EXTRA_CFLAGS) $(CFLAGS_sd.o))))
FILES_FLAGS_UP_TO_DATE += sd.o
endif
D
	if {($CONFIG_IDE != 0) && ($CONFIG_BLK_DEV_IDE == 1 || $CONFIG_BLK_DEV_IDE == 2 || $CONFIG_BLK_DEV_IDE == 4) && ($CONFIG_EXPERIMENTAL == 1 || $CONFIG_EXPERIMENTAL == 2 || $CONFIG_EXPERIMENTAL == 4)} then {write_tristate $cfg $autocfg CONFIG_BLK_DEV_ATARAID $CONFIG_BLK_DEV_ATARAID [list $CONFIG_BLK_DEV_IDE $CONFIG_EXPERIMENTAL] 2 }
	global CONFIG_BLK_DEV_ATARAID_PDC
	if {($CONFIG_IDE != 0) && ($CONFIG_BLK_DEV_IDE == 1 || $CONFIG_BLK_DEV_IDE == 2 || $CONFIG_BLK_DEV_IDE == 4) && ($CONFIG_EXPERIMENTAL == 1 || $CONFIG_EXPERIMENTAL == 2 || $CONFIG_EXPERIMENTAL == 4) && ($CONFIG_BLK_DEV_ATARAID == 1 || $CONFIG_BLK_DEV_ATARAID == 2 || $CONFIG_BLK_DEV_ATARAID == 4)} then {write_tristate $cfg $autocfg CONFIG_BLK_DEV_ATARAID_PDC $CONFIG_BLK_DEV_ATARAID_PDC [list $CONFIG_BLK_DEV_IDE $CONFIG_EXPERIMENTAL $CONFIG_BLK_DEV_ATARAID] 2 }
	global CONFIG_BLK_DEV_ATARAID_HPT
	if {($CONFIG_IDE != 0) && ($CONFIG_BLK_DEV_IDE == 1 || $CONFIG_BLK_DEV_IDE == 2 || $CONFIG_BLK_DEV_IDE == 4) && ($CONFIG_EXPERIMENTAL == 1 || $CONFIG_EXPERIMENTAL == 2 || $CONFIG_EXPERIMENTAL == 4) && ($CONFIG_BLK_DEV_ATARAID == 1 || $CONFIG_BLK_DEV_ATARAID == 2 || $CONFIG_BLK_DEV_ATARAID == 4)} then {write_tristate $cfg $autocfg CONFIG_BLK_DEV_ATARAID_HPT $CONFIG_BLK_DEV_ATARAID_HPT [list $CONFIG_BLK_DEV_IDE $CONFIG_EXPERIMENTAL $CONFIG_BLK_DEV_ATARAID] 2 }
	if {($CONFIG_IDE == 0)} then {write_tristate $cfg $autocfg CONFIG_BLK_DEV_IDE_MODES $CONSTANT_N [list $notmod] 2 }
	if {($CONFIG_IDE == 0)} then {write_tristate $cfg $autocfg CONFIG_BLK_DEV_HD $CONSTANT_N [list $notmod] 2 }
	write_comment $cfg $autocfg "SCSI support"
	write_tristate $cfg $autocfg CONFIG_SCSI $CONFIG_SCSI [list $notmod] 2
	if {($CONFIG_SCSI != 0)} then {write_comment $cfg $autocfg "SCSI support type (disk, tape, CD-ROM)"}
	global CONFIG_BLK_DEV_SD
	if {($CONFIG_SCSI != 0) && ($CONFIG_SCSI == 1 || $CONFIG_SCSI == 2 || $CONFIG_SCSI == 4)} then {write_tristate $cfg $autocfg CONFIG_BLK_DEV_SD $CONFIG_BLK_DEV_SD [list $CONFIG_SCSI] 2 }
	global CONFIG_SD_EXTRA_DEVS
	if {($CONFIG_SCSI != 0) && ($CONFIG_BLK_DEV_SD != 0)} then {write_int $cfg $autocfg CONFIG_SD_EXTRA_DEVS $CONFIG_SD_EXTRA_DEVS $notmod }
	global CONFIG_CHR_DEV_ST
	if {($CONFIG_SCSI != 0) && ($CONFIG_SCSI == 1 || $CONFIG_SCSI == 2 || $CONFIG_SCSI == 4)} then {write_tristate $cfg $autocfg CONFIG_CHR_DEV_ST $CONFIG_CHR_DEV_ST [list $CONFIG_SCSI] 2 }
	global CONFIG_CHR_DEV_OSST
	if {($CONFIG_SCSI != 0) && ($CONFIG_SCSI == 1 || $CONFIG_SCSI == 2 || $CONFIG_SCSI == 4)} then {write_tristate $cfg $autocfg CONFIG_CHR_DEV_OSST $CONFIG_CHR_DEV_OSST [list $CONFIG_SCSI] 2 }
	global CONFIG_BLK_DEV_SR
	if {($CONFIG_SCSI != 0) && ($CONFIG_SCSI == 1 || $CONFIG_SCSI == 2 || $CONFIG_SCSI == 4)} then {write_tristate $cfg $autocfg CONFIG_BLK_DEV_SR $CONFIG_BLK_DEV_SR [list $CONFIG_SCSI] 2 }
	global CONFIG_BLK_DEV_SR_VENDOR
	if {($CONFIG_SCSI != 0) && ($CONFIG_BLK_DEV_SR != 0)} then {write_tristate $cfg $autocfg CONFIG_BLK_DEV_SR_VENDOR $CONFIG_BLK_DEV_SR_VENDOR [list $notmod] 2 }
	global CONFIG_SR_EXTRA_DEVS
	if {($CONFIG_SCSI != 0) && ($CONFIG_BLK_DEV_SR != 0)} then {write_int $cfg $autocfg CONFIG_SR_EXTRA_DEVS $CONFIG_SR_EXTRA_DEVS $notmod }
	global CONFIG_CHR_DEV_SG
	if {($CONFIG_SCSI != 0) && ($CONFIG_SCSI == 1 || $CONFIG_SCSI == 2 || $CONFIG_SCSI == 4)} then {write_tristate $cfg $autocfg CONFIG_CHR_DEV_SG $CONFIG_CHR_DEV_SG [list $CONFIG_SCSI] 2 }
	if {($CONFIG_SCSI != 0)} then {write_comment $cfg $autocfg "Some SCSI devices (e.g. CD jukebox) support multiple LUNs"}
	global CONFIG_SCSI_DEBUG_QUEUES
	if {($CONFIG_SCSI != 0)} then {write_tristate $cfg $autocfg CONFIG_SCSI_DEBUG_QUEUES $CONFIG_SCSI_DEBUG_QUEUES [list $notmod] 2 }
	global CONFIG_SCSI_MULTI_LUN
	if {($CONFIG_SCSI != 0)} then {write_tristate $cfg $autocfg CONFIG_SCSI_MULTI_LUN $CONFIG_SCSI_MULTI_LUN [list $notmod] 2 }
	global CONFIG_SCSI_CONSTANTS
	if {($CONFIG_SCSI != 0)} then {write_tristate $cfg $autocfg CONFIG_SCSI_CONSTANTS $CONFIG_SCSI_CONSTANTS [list $notmod] 2 }
	global CONFIG_SCSI_LOGGING
	if {($CONFIG_SCSI != 0)} then {write_tristate $cfg $autocfg CONFIG_SCSI_LOGGING $CONFIG_SCSI_LOGGING [list $notmod] 2 }
	if {($CONFIG_SCSI != 0)} then {write_comment $cfg $autocfg "SCSI low-level drivers"}
	global CONFIG_BLK_DEV_3W_XXXX_RAID
	if {($CONFIG_SCSI != 0) && ($CONFIG_PCI == 1) && ($CONFIG_SCSI == 1 || $CONFIG_SCSI == 2 || $CONFIG_SCSI == 4)} then {write_tristate $cfg $autocfg CONFIG_BLK_DEV_3W_XXXX_RAID $CONFIG_BLK_DEV_3W_XXXX_RAID [list $CONFIG_SCSI] 2 }
	global CONFIG_SCSI_7000FASST
	if {($CONFIG_SCSI != 0) && ($CONFIG_SCSI == 1 || $CONFIG_SCSI == 2 || $CONFIG_SCSI == 4)} then {write_tristate $cfg $autocfg CONFIG_SCSI_7000FASST $CONFIG_SCSI_7000FASST [list $CONFIG_SCSI] 2 }
	global CONFIG_SCSI_ACARD
	if {($CONFIG_SCSI != 0) && ($CONFIG_SCSI == 1 || $CONFIG_SCSI == 2 || $CONFIG_SCSI == 4)} then {write_tristate $cfg $autocfg CONFIG_SCSI_ACARD $CONFIG_SCSI_ACARD [list $CONFIG_SCSI] 2 }
	global CONFIG_SCSI_AHA152X
	if {($CONFIG_SCSI != 0) && ($CONFIG_SCSI == 1 || $CONFIG_SCSI == 2 || $CONFIG_SCSI == 4)} then {write_tristate $cfg $autocfg CONFIG_SCSI_AHA152X $CONFIG_SCSI_AHA152X [list $CONFIG_SCSI] 2 }
	global CONFIG_SCSI_AHA1542
	if {($CONFIG_SCSI != 0) && ($CONFIG_SCSI == 1 || $CONFIG_SCSI == 2 || $CONFIG_SCSI == 4)} then {write_tristate $cfg $autocfg CONFIG_SCSI_AHA1542 $CONFIG_SCSI_AHA1542 [list $CONFIG_SCSI] 2 }
	global CONFIG_SCSI_AHA1740
	if {($CONFIG_SCSI != 0) && ($CONFIG_SCSI == 1 || $CONFIG_SCSI == 2 || $CONFIG_SCSI == 4)} then {write_tristate $cfg $autocfg CONFIG_SCSI_AHA1740 $CONFIG_SCSI_AHA1740 [list $CONFIG_SCSI] 2 }
	global CONFIG_SCSI_AACRAID
	if {($CONFIG_SCSI != 0) && ($CONFIG_EXPERIMENTAL == 1) && ($CONFIG_SCSI == 1 || $CONFIG_SCSI == 2 || $CONFIG_SCSI == 4) && ($CONFIG_PCI == 1 || $CONFIG_PCI == 2 || $CONFIG_PCI == 4)} then {write_tristate $cfg $autocfg CONFIG_SCSI_AACRAID $CONFIG_SCSI_AACRAID [list $CONFIG_SCSI $CONFIG_PCI] 2 }
	global CONFIG_SCSI_AIC7XXX
	global CONFIG_SCSI_AIC7XXX_OLD
	if {($CONFIG_SCSI != 0) && ($CONFIG_SCSI_AIC7XXX_OLD != 1) && ($CONFIG_SCSI == 1 || $CONFIG_SCSI == 2 || $CONFIG_SCSI == 4)} then {write_tristate $cfg $autocfg CONFIG_SCSI_AIC7XXX $CONFIG_SCSI_AIC7XXX [list $CONFIG_SCSI] 2 }
	global CONFIG_AIC7XXX_CMDS_PER_DEVICE
	if {($CONFIG_SCSI != 0) && ($CONFIG_SCSI_AIC7XXX_OLD != 1) && ($CONFIG_SCSI_AIC7XXX != 0)} then {write_int $cfg $autocfg CONFIG_AIC7XXX_CMDS_PER_DEVICE $CONFIG_AIC7XXX_CMDS_PER_DEVICE $notmod }
	global CONFIG_AIC7XXX_RESET_DELAY_MS
	if {($CONFIG_SCSI != 0) && ($CONFIG_SCSI_AIC7XXX_OLD != 1) && ($CONFIG_SCSI_AIC7XXX != 0)} then {write_int $cfg $autocfg CONFIG_AIC7XXX_RESET_DELAY_MS $CONFIG_AIC7XXX_RESET_DELAY_MS $notmod }
	global CONFIG_AIC7XXX_PROBE_EISA_VL
	if {($CONFIG_SCSI != 0) && ($CONFIG_SCSI_AIC7XXX_OLD != 1) && ($CONFIG_SCSI_AIC7XXX != 0)} then {write_tristate $cfg $autocfg CONFIG_AIC7XXX_PROBE_EISA_VL $CONFIG_AIC7XXX_PROBE_EISA_VL [list $notmod] 2 }
	global CONFIG_AIC7XXX_BUILD_FIRMWARE
	if {($CONFIG_SCSI != 0) && ($CONFIG_SCSI_AIC7XXX_OLD != 1) && ($CONFIG_SCSI_AIC7XXX != 0)} then {write_tristate $cfg $autocfg CONFIG_AIC7XXX_BUILD_FIRMWARE $CONFIG_AIC7XXX_BUILD_FIRMWARE [list $notmod] 2 }
	if {($CONFIG_SCSI != 0) && ($CONFIG_SCSI_AIC7XXX != 1) && ($CONFIG_SCSI == 1 || $CONFIG_SCSI == 2 || $CONFIG_SCSI == 4)} then {write_tristate $cfg $autocfg CONFIG_SCSI_AIC7XXX_OLD $CONFIG_SCSI_AIC7XXX_OLD [list $CONFIG_SCSI] 2 }
	global CONFIG_AIC7XXX_OLD_TCQ_ON_BY_DEFAULT
	if {($CONFIG_SCSI != 0) && ($CONFIG_SCSI_AIC7XXX != 1) && ($CONFIG_SCSI_AIC7XXX_OLD != 0)} then {write_tristate $cfg $autocfg CONFIG_AIC7XXX_OLD_TCQ_ON_BY_DEFAULT $CONFIG_AIC7XXX_OLD_TCQ_ON_BY_DEFAULT [list $notmod] 2 }
	global CONFIG_AIC7XXX_OLD_CMDS_PER_DEVICE
	if {($CONFIG_SCSI != 0) && ($CONFIG_SCSI_AIC7XXX != 1) && ($CONFIG_SCSI_AIC7XXX_OLD != 0)} then {write_int $cfg $autocfg CONFIG_AIC7XXX_OLD_CMDS_PER_DEVICE $CONFIG_AIC7XXX_OLD_CMDS_PER_DEVICE $notmod }
	global CONFIG_AIC7XXX_OLD_PROC_STATS
	if {($CONFIG_SCSI != 0) && ($CONFIG_SCSI_AIC7XXX != 1) && ($CONFIG_SCSI_AIC7XXX_OLD != 0)} then {write_tristate $cfg $autocfg CONFIG_AIC7XXX_OLD_PROC_STATS $CONFIG_AIC7XXX_OLD_PROC_STATS [list $notmod] 2 }
	global CONFIG_SCSI_DPT_I2O
	if {($CONFIG_SCSI != 0) && ($CONFIG_SCSI == 1 || $CONFIG_SCSI == 2 || $CONFIG_SCSI == 4)} then {write_tristate $cfg $autocfg CONFIG_SCSI_DPT_I2O $CONFIG_SCSI_DPT_I2O [list $CONFIG_SCSI] 2 }
	global CONFIG_SCSI_ADVANSYS
	if {($CONFIG_SCSI != 0) && ($CONFIG_SCSI == 1 || $CONFIG_SCSI == 2 || $CONFIG_SCSI == 4)} then {write_tristate $cfg $autocfg CONFIG_SCSI_ADVANSYS $CONFIG_SCSI_ADVANSYS [list $CONFIG_SCSI] 2 }
	global CONFIG_SCSI_IN2000
	if {($CONFIG_SCSI != 0) && ($CONFIG_SCSI == 1 || $CONFIG_SCSI == 2 || $CONFIG_SCSI == 4)} then {write_tristate $cfg $autocfg CONFIG_SCSI_IN2000 $CONFIG_SCSI_IN2000 [list $CONFIG_SCSI] 2 }
	global CONFIG_SCSI_AM53C974
	if {($CONFIG_SCSI != 0) && ($CONFIG_SCSI == 1 || $CONFIG_SCSI == 2 || $CONFIG_SCSI == 4) && ($CONFIG_PCI == 1 || $CONFIG_PCI == 2 || $CONFIG_PCI == 4)} then {write_tristate $cfg $autocfg CONFIG_SCSI_AM53C974 $CONFIG_SCSI_AM53C974 [list $CONFIG_SCSI $CONFIG_PCI] 2 }
	global CONFIG_SCSI_MEGARAID
	if {($CONFIG_SCSI != 0) && ($CONFIG_SCSI == 1 || $CONFIG_SCSI == 2 || $CONFIG_SCSI == 4)} then {write_tristate $cfg $autocfg CONFIG_SCSI_MEGARAID $CONFIG_SCSI_MEGARAID [list $CONFIG_SCSI] 2 }
	global CONFIG_SCSI_BUSLOGIC
	if {($CONFIG_SCSI != 0) && ($CONFIG_SCSI == 1 || $CONFIG_SCSI == 2 || $CONFIG_SCSI == 4)} then {write_tristate $cfg $autocfg CONFIG_SCSI_BUSLOGIC $CONFIG_SCSI_BUSLOGIC [list $CONFIG_SCSI] 2 }
	global CONFIG_SCSI_OMIT_FLASHPOINT
	if {($CONFIG_SCSI != 0) && ($CONFIG_SCSI_BUSLOGIC != 0)} then {write_tristate $cfg $autocfg CONFIG_SCSI_OMIT_FLASHPOINT $CONFIG_SCSI_OMIT_FLASHPOINT [list $notmod] 2 }
	global CONFIG_SCSI_CPQFCTS
	if {($CONFIG_SCSI != 0) && ($CONFIG_PCI == 1) && ($CONFIG_SCSI == 1 || $CONFIG_SCSI == 2 || $CONFIG_SCSI == 4)} then {write_tristate $cfg $autocfg CONFIG_SCSI_CPQFCTS $CONFIG_SCSI_CPQFCTS [list $CONFIG_SCSI] 2 }
	global CONFIG_SCSI_DMX3191D
	if {($CONFIG_SCSI != 0) && ($CONFIG_SCSI == 1 || $CONFIG_SCSI == 2 || $CONFIG_SCSI == 4) && ($CONFIG_PCI == 1 || $CONFIG_PCI == 2 || $CONFIG_PCI == 4)} then {write_tristate $cfg $autocfg CONFIG_SCSI_DMX3191D $CONFIG_SCSI_DMX3191D [list $CONFIG_SCSI $CONFIG_PCI] 2 }
	global CONFIG_SCSI_DTC3280
	if {($CONFIG_SCSI != 0) && ($CONFIG_SCSI == 1 || $CONFIG_SCSI == 2 || $CONFIG_SCSI == 4)} then {write_tristate $cfg $autocfg CONFIG_SCSI_DTC3280 $CONFIG_SCSI_DTC3280 [list $CONFIG_SCSI] 2 }
	global CONFIG_SCSI_EATA
	if {($CONFIG_SCSI != 0) && ($CONFIG_SCSI == 1 || $CONFIG_SCSI == 2 || $CONFIG_SCSI == 4)} then {write_tristate $cfg $autocfg CONFIG_SCSI_EATA $CONFIG_SCSI_EATA [list $CONFIG_SCSI] 2 }
	global CONFIG_SCSI_EATA_TAGGED_QUEUE
	if {($CONFIG_SCSI != 0) && ($CONFIG_SCSI_EATA != 0)} then {write_tristate $cfg $autocfg CONFIG_SCSI_EATA_TAGGED_QUEUE $CONFIG_SCSI_EATA_TAGGED_QUEUE [list $notmod] 2 }
	global CONFIG_SCSI_EATA_LINKED_COMMANDS
	if {($CONFIG_SCSI != 0) && ($CONFIG_SCSI_EATA != 0)} then {write_tristate $cfg $autocfg CONFIG_SCSI_EATA_LINKED_COMMANDS $CONFIG_SCSI_EATA_LINKED_COMMANDS [list $notmod] 2 }
	global CONFIG_SCSI_EATA_MAX_TAGS
	if {($CONFIG_SCSI != 0) && ($CONFIG_SCSI_EATA != 0)} then {write_int $cfg $autocfg CONFIG_SCSI_EATA_MAX_TAGS $CONFIG_SCSI_EATA_MAX_TAGS $notmod }
	global CONFIG_SCSI_EATA_DMA
	if {($CONFIG_SCSI != 0) && ($CONFIG_SCSI == 1 || $CONFIG_SCSI == 2 || $CONFIG_SCSI == 4)} then {write_tristate $cfg $autocfg CONFIG_SCSI_EATA_DMA $CONFIG_SCSI_EATA_DMA [list $CONFIG_SCSI] 2 }
	global CONFIG_SCSI_EATA_PIO
	if {($CONFIG_SCSI != 0) && ($CONFIG_SCSI == 1 || $CONFIG_SCSI == 2 || $CONFIG_SCSI == 4)} then {write_tristate $cfg $autocfg CONFIG_SCSI_EATA_PIO $CONFIG_SCSI_EATA_PIO [list $CONFIG_SCSI] 2 }
	global CONFIG_SCSI_FUTURE_DOMAIN
	if {($CONFIG_SCSI != 0) && ($CONFIG_SCSI == 1 || $CONFIG_SCSI == 2 || $CONFIG_SCSI == 4)} then {write_tristate $cfg $autocfg CONFIG_SCSI_FUTURE_DOMAIN $CONFIG_SCSI_FUTURE_DOMAIN [list $CONFIG_SCSI] 2 }
	global CONFIG_SCSI_FD_MCS
	if {($CONFIG_SCSI != 0) && ($CONFIG_MCA == 1) && ($CONFIG_SCSI == 1 || $CONFIG_SCSI == 2 || $CONFIG_SCSI == 4)} then {write_tristate $cfg $autocfg CONFIG_SCSI_FD_MCS $CONFIG_SCSI_FD_MCS [list $CONFIG_SCSI] 2 }
	global CONFIG_SCSI_GDTH
	if {($CONFIG_SCSI != 0) && ($CONFIG_SCSI == 1 || $CONFIG_~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
MOTOROLA MICROPROCESSOR & MEMORY TECHNOLOGY GROUP
M68000 Hi-Performance Microprocessor Division
M68060 Software Package
Production Release P1.00 -- October 10, 1994

M68060 Software Package Copyright � 1993, 1994 Motorola Inc.  All rights reserved.
 
THE SOFTWARE is provided on an "AS IS" basis and without warranty.
To the maximum extent permitted by applicable law,
MOTOROLA DISCLAIMS ALL WARRANTIES WHETHER EXPRESS OR IMPLIED, 
INCLUDING IMPLIED WARRANTIES OF MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE
and any warranty against infringement with regard to the SOFTWARE
(INCLUDING ANY MODIFIED VERSIONS THEREOF) and any accompanying written materials.

To the maximum extent permitted by applicable law,
IN NO EVENT SHALL MOTOROLA BE LIABLE FOR ANY DAMAGES WHATSOEVER
(INCLUDING WITHOUT LIMITATION, DAMAGES FOR LOSS OF BUSINESS PROFITS,
BUSINESS INTERRUPTION, LOSS OF BUSINESS INFORMATION, OR OTHER PECUNIARY LOSS)
ARISING OF THE USE OR INABILITY TO USE THE SOFTWARE.
Motorola assumes no responsibility for the maintenance and support of the SOFTWARE.

You are hereby granted a copyright license to use, modify, and distribute the SOFTWARE
so long as this entire notice is retained without alteration in any modified and/or
redistributed versions, and that such modified versions are clearly identified as such.
No licenses are granted by implication, estoppel or otherwise under any patents
or trademarks of Motorola, Inc.
~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
68060 SOFTWARE PACKAGE (Kernel version) SIMPLE TESTS
-----------------------------------------------------

The files itest.sa and ftest.sa contain simple tests to check
the state of the 68060ISP and 68060FPSP once they have been installed.

Release file format:
--------------------
The release files itest.sa and ftest.sa are essentially
hexadecimal images of the actual tests. This format is the
ONLY format that will be supported. The hex images were created
by assembling the source code and then converting the resulting
binary output images into ASCII text files. The hexadecimal
numbers are listed using the Motorola Assembly syntax assembler
directive "dc.l" (define constant longword). The files can be
converted to other assembly syntaxes by using any word processor
with a global search and replace function.

To assist in assembling and linking these modules with other modules,
the installer should add symbolic labels to the top of the files.
This will allow the calling routines to access the entry points
of these packages.

The source code itest.s and ftest.s have been included but only
for documentation purposes.

Release file structure:
-----------------------

(top of module)
	----------------- 
	|		| - 128 byte-sized section
   (1)  |   Call-Out	| - 4 bytes per entry (user fills these in)
	|		|
	-----------------
	|		| - 8 bytes per entry
   (2)  | Entry Point	| - user does "bsr" or "jsr" to this address
	|		|
	-----------------
	|		| - code section
   (3)  ~		~
	|		|
	-----------------
(bottom of module)

The first section of this module is the "Call-out" section. This section
is NOT INCLUDED in {i,f}test.sa (an example "Call-out" section is provided at
the end of this file). The purpose of this section is to allow the test
routines to reference external printing functions that must be provided 
by the host operating system. This section MUST be exactly 128 bytes in 
size. There are 32 fields, each 4 bytes in size. Each field corresponds
to a function required by the test packages (these functions and their
location are listed in "68060{ISP,FPSP}-TEST call-outs" below). Each field
entry should contain the address of the corresponding function RELATIVE to
the starting address of the "call-out" section. The "Call-out" section must
sit adjacent to the {i,f}test.sa image in memory. Since itest.sa and ftest.sa
are individual tests, they each require their own "Call-out" sections.

The second section, the "Entry-point" section, is used by external routines
to access the test routines. Since the {i,f}test.sa hex files contain
no symbol names, this section contains function entry points that are fixed
with respect to the top of the package. The currently defined entry-points
are listed in section "68060{ISP,FPSP}-TEST entry points" below. A calling
routine would simply execute a "bsr" or "jsr" that jumped to the selected
function entry-point.

For example, to run the 060ISP test, write a program that includes the
itest.sa data and execute something similar to:

	bsr	_060ISP_TEST+128+0

(_060ISP_TEST is the starting address of the "Call-out" section; the "Call-out"
section is 128 bytes long; and the 68060ISP test entry point is located
0 bytes from the top of the "Entry-point" section.)

The third section is the code section. After entering through an "Entry-point",
the entry code jumps to the appropriate test code within the code section.

68060ISP-TEST Call-outs:
------------------------
0x0: _print_string()
0x4: _print_number()

68060FPSP-TEST Call-outs:
-------------------------
0x0: _print_string()
0x4: _print_number()

The test packages call _print_string() and _print_number()
as subroutines and expect the main program to print a string
or a number to a file or to the screen.
In "C"-like fashion, the test program calls:

	print_string("Test passed");

		or

	print_number(20);

For _print_string(), the test programs pass a longword address
of the string on the stack. For _print_number(), the test programs pass
a longword number to be printed.

For debugging purposes, after the main program performs a "print"
for a test package, it should flush the output so that it's not
buffered. In this way, if the test program crashes, at least the previous
statements printed will be seen.

68060ISP-TEST Entry-points:
---------------------------
0x0: integer test

68060FPSP-TEST Entry-points:
----------------------------
0x00: main fp test
0x08: FP unimplemented test
0x10: FP enabled snan/operr/ovfl/unfl/dz/inex

The floating-point unit test has 3 entry points which will require
3 different calls to the package if each of the three following tests
is desired:

main fp test: tests (1) unimp effective address exception
		    (2) unsupported data type exceptions
		    (3) non-maskable overflow/underflow exceptions

FP unimplemented: tests FP unimplemented exception. this one is 
		  separate from the previous tests for systems that don't
		  want FP unimplemented instructions.

FP enabled: tests enabled snan/operr/ovfl/unfl/dz/inex.
	    basically, it enables each of these exceptions and forces
	    each using an implemented FP instruction. this process
	    exercises _fpsp_{snan,operr,ovfl,unfl,dz,inex}() and
	    _real_{snan,operr,ovfl,unfl,dz,inex}(). the test expects
	    _real_XXXX() to do nothing except clear the exception
	    and "rte". if a system's _real_XXXX() handler creates an
	    alternate result, the test will print "failed" but this
	    is acceptable.

Miscellaneous:
--------------
Again, itest.sa and ftest.sa are simple tests and do not thoroughly
test all 68060SP connections. For example, they do not test connections
to _real_access(), _real_trace(), _real_trap(), etc. because these
will be system-implemented several different ways and the test packages
must remain system independent.

Example test package set-up:
----------------------------
_print_str:
	.			# provided by system
	rts

_print_num:
	.			# provided by system
	rts

	.
	.
	bsr	_060FPSP_TEST+128+0
	.
	.
	rts

# beginning of "Call-out" section; provided by integrator.
# MUST be 128 bytes long.
_060FPSP_TEST:
	long	_print_str - _060FPSP_TEST	
	long	_print_num - _060FPSP_TEST
	space	120

# ftest.sa starts here; start of "Entry-point" section.
	long	0x60ff0000, 0x00002346
	long	0x60ff0000, 0x00018766
	long	0x60ff0000, 0x00023338
	long	0x24377299, 0xab2643ea
		.
		.
		.
~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
MOTOROLA MICROPROCESSOR & MEMORY TECHNOLOGY GROUP
M68000 Hi-Performance Microprocessor Division
M68060 Software Package
Production Release P1.00 -- October 10, 1994

M68060 Software Package Copyright � 1993, 1994 Motorola Inc.  All rights reserved.
 
THE SOFTWARE is provided on an "AS IS" basis and without warranty.
To the maximum extent permitted by applicable law,
MOTOROLA DISCLAIMS ALL WARRANTIES WHETHER EXPRESS OR IMPLIED, 
INCLUDING IMPLIED WARRANTIES OF MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE
and any warranty against infringement with regard to the SOFTWARE
(INCLUDING ANY MODIFIED VERSIONS THEREOF) and any accompanying written materials.

To the maximum extent permitted by applicable law,
IN NO EVENT SHALL MOTOROLA BE LIABLE FOR ANY DAMAGES WHATSOEVER
(INCLUDING WITHOUT LIMITATION, DAMAGES FOR LOSS OF BUSINESS PROFITS,
BUSINESS INTERRUPTION, LOSS OF BUSINESS INFORMATION, OR OTHER PECUNIARY LOSS)
ARISING OF THE USE OR INABILITY TO USE THE SOFTWARE.
Motorola assumes no responsibility for the maintenance and support of the SOFTWARE.

You are hereby granted a copyright license to use, modify, and distribute the SOFTWARE
so long as this entire notice is retained without alteration in any modified and/or
redistributed versions, and that such modified versions are clearly identified as such.
No licenses are granted by implication, estoppel or otherwise under any patents
or trademarks of Motorola, Inc.
~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~

68060 FLOATING-POINT SOFTWARE PACKAGE (Library version)
--------------------------------------------------------

The file fplsp.sa contains the "Library version" of the
68060SP Floating-Point Software Package. The routines
included in this module can be used to emulate the
FP instructions not implemented in 68060 hardware. These
instructions normally take exception vector #11 
"FP Unimplemented Instruction".

By re-compiling a program that uses these instructions, and
making subroutine calls in place of the unimplemented
instructions, a program can avoid the overhead associated
with taking the exception.

Release file format:
--------------------
The file fplsp.sa is essentially a hexadecimal image of the
release package. This is the ONLY format which will be supported.
The hex image was created by assembling the source code and
then converting the resulting binary output image into an
ASCII text file. The hexadecimal numbers are listed
using the Motorola Assembly Syntax assembler directive "dc.l"
(define constant longword). The file can be converted to other
assembly syntaxes by using any word processor with a global
search and replace function.

To assist in assembling and linking this module with other modules,
the installer should add a symbolic label to the top of the file.
This will allow calling routines to access the entry points
of this package.

The source code fplsp.s has also been included but only for
documentation purposes.

Release file structure:
-----------------------
The file fplsp.sa contains an "Entry-Point" section and a
code section. The FPLSP has no "Call-Out" section. The first section
is the "Entry-Point" section. In order to access a function in the
package, a program must "bsr" or "jsr" to the location listed
below in "68060FPLSP entry points" that corresponds to the desired
function. A branch instruction located at the selected entry point
within the package will then enter the correct emulation code routine.

The entry point addresses at the beginning of the package will remain
fixed so that a program calling the routines will not have to be
re-compiled with every new 68060FPLSP release.

There are 3 entry-points for each instruction type: single precision,
double precision, and extended precision.

As an example, the "fsin" library instruction can be passed an
extended precision operand if program executes:

# fsin.x fp0

	fmovm.x	&0x01,-(%sp)	# pass operand on stack
	bsr.l	_060FPLSP_TOP+0x1a8 # branch to fsin routine
	add.l	&0xc,%sp	# clear operand from stack

Upon return, fp0 holds the correct result. The FPSR is
set correctly. The FPCR is unchanged. The FPIAR is undefined.

Another example. This time, a dyadic operation:

# frem.s %fp1,%fp0

	fmov.s	%fp1,-(%sp)	# pass src operand
	fmov.s	%fp0,-(%sp)	# pass dst operand
	bsr.l	_060FPLSP_TOP+0x168 # branch to frem routine
	addq.l	&0x8,%sp	# clear operands from stack

Again, the result is returned in fp0. Note that BOTH operands
are passed in single precision format.

Exception reporting:
--------------------
The package takes exceptions according to the FPCR value upon subroutine
entry. If an exception should be reported, then the package forces
this exception using implemented floating-point instructions.
For example, if the instruction being emulated should cause a
floating-point Operand Error exception, then the library routine
executes an FMUL of a zero and an infinity to force the OPERR
exception. Although the FPIAR will be undefined for the enabled
Operand Error exception handler, the user will at least be able
to record that the event occurred.

Miscellaneous:
--------------
The package does not attempt to correctly emulate instructions
with Signalling NAN inputs. Use of SNANs should be avoided with
this package.

The fabs/fadd/fdiv/fint/fintrz/fmul/fneg/fsqrt/fsub entry points
are provided for the convenience of older compilers that make
subroutine calls for all fp instructions. The code does NOT emulate
the instruction but rather simply executes it.

68060FPLSP entry points:
------------------------
_060FPLSP_TOP:
0x000:	_060LSP__facoss_
0x008:	_060LSP__facosd_
0x010:	_060LSP__facosx_
0x018:	_060LSP__fasins_
0x020:	_060LSP__fasind_
0x028:	_060LSP__fasinx_
0x030:	_060LSP__fatans_
0x038:	_060LSP__fatand_
0x040:	_060LSP__fatanx_
0x048:	_060LSP__fatanhs_
0x050:	_060LSP__fatanhd_
0x058:	_060LSP__fatanhx_
0x060:	_060LSP__fcoss_
0x068:	_060LSP__fcosd_
0x070:	_060LSP__fcosx_
0x078:	_060LSP__fcoshs_
0x080:	_060LSP__fcoshd_
0x088:	_060LSP__fcoshx_
0x090:	_060LSP__fetoxs_
0x098:	_060LSP__fetoxd_
0x0a0:	_060LSP__fetoxx_
0x0a8:	_060LSP__fetoxm1s_
0x0b0:	_060LSP__fetoxm1d_
0x0b8:	_060LSP__fetoxm1x_
0x0c0:	_060LSP__fgetexps_
0x0c8:	_060LSP__fgetexpd_
0x0d0:	_060LSP__fgetexpx_
0x0d8:	_060LSP__fgetmans_
0x0e0:	_060LSP__fgetmand_
0x0e8:	_060LSP__fgetmanx_
0x0f0:	_060LSP__flog10s_
0x0f8:	_060LSP__flog10d_
0x100:	_060LSP__flog10x_
0x108:	_060LSP__flog2s_
0x110:	_060LSP__flog2d_
0x118:	_060LSP__flog2x_
0x120:	_060LSP__flogns_
0x128:	_060LSP__flognd_
0x130:	_060LSP__flognx_
0x138:	_060LSP__flognp1s_
0x140:	_060LSP__flognp1d_
0x148:	_060LSP__flognp1x_
0x150:	_060LSP__fmods_
0x158:	_060LSP__fmodd_
0x160:	_060LSP__fmodx_
0x168:	_060LSP__frems_
0x170:	_060LSP__fremd_
0x178:	_060LSP__fremx_
0x180:	_060LSP__fscales_
0x188:	_060LSP__fscaled_
0x190:	_060LSP__fscalex_
0x198:	_060LSP__fsins_
0x1a0:	_060LSP__fsind_
0x1a8:	_060LSP__fsinx_
0x1b0:	_060LSP__fsincoss_
0x1b8:	_060LSP__fsincosd_
0x1c0:	_060LSP__fsincosx_
0x1c8:	_060LSP__fsinhs_
0x1d0:	_060LSP__fsinhd_
0x1d8:	_060LSP__fsinhx_
0x1e0:	_060LSP__ftans_
0x1e8:	_060LSP__ftand_
0x1f0:	_060LSP__ftanx_
0x1f8:	_060LSP__ftanhs_
0x200:	_060LSP__ftanhd_
0x208:	_060LSP__ftanhx_
0x210:	_060LSP__ftentoxs_
0x218:	_060LSP__ftentoxd_
0x220:	_060LSP__ftentoxx_
0x228:	_060LSP__ftwotoxs_
0x230:	_060LSP__ftwotoxd_
0x238:	_060LSP__ftwotoxx_

0x240:	_060LSP__fabss_
0x248:	_060LSP__fabsd_
0x250:	_060LSP__fabsx_
0x258:	_060LSP__fadds_
0x260:	_060LSP__faddd_
0x268:	_060LSP__faddx_
0x270:	_060LSP__fdivs_
0x278:	_060LSP__fdivd_
0x280:	_060LSP__fdivx_
0x288:	_060LSP__fints_
0x290:	_060LSP__fintd_
0x298:	_060LSP__fintx_
0x2a0:	_060LSP__fintrzs_
0x2a8:	_060LSP__fintrzd_
0x2b0:	_060LSP__fintrzx_
0x2b8:	_060LSP__fmuls_
0x2c0:	_060LSP__fmuld_
0x2c8:	_060LSP__fmulx_
0x2d0:	_060LSP__fnegs_
0x2d8:	_060LSP__fnegd_
0x2e0:	_060LSP__fnegx_
0x2e8:	_060LSP__fsqrts_
0x2f0:	_060LSP__fsqrtd_
0x2f8:	_060LSP__fsqrtx_
0x300:	_060LSP__fsubs_
0x308:	_060LSP__fsubd_
0x310:	_060LSP__fsubx_
	dc.l	$60ff0000,$238e0000,$60ff0000,$24200000
	dc.l	$60ff0000,$24b60000,$60ff0000,$11060000
	dc.l	$60ff0000,$11980000,$60ff0000,$122e0000
	dc.l	$60ff0000,$0f160000,$60ff0000,$0fa80000
	dc.l	$60ff0000,$103e0000,$60ff0000,$12ae0000
	dc.l	$60ff0000,$13400000,$60ff0000,$13d60000
	dc.l	$60ff0000,$05ae0000,$60ff0000,$06400000
	dc.l	$60ff0000,$06d60000,$60ff0000,$213e0000
	dc.l	$60ff0000,$21d00000,$60ff0000,$22660000
	dc.l	$60ff0000,$16160000,$60ff0000,$16a80000
	dc.l	$60ff0000,$173e0000,$60ff0000,$0aee0000
	dc.l	$60ff0000,$0b800000,$60ff0000,$0c160000
	dc.l	$60ff0000,$24a60000,$60ff0000,$25380000
	dc.l	$60ff0000,$25ce0000,$60ff0000,$26660000
	dc.l	$60ff0000,$26f80000,$60ff0000,$278e0000
	dc.l	$60ff0000,$1d160000,$60ff0000,$1da80000
	dc.l	$60ff0000,$1e3e0000,$60ff0000,$1ed60000
	dc.l	$60ff0000,$1f680000,$60ff0000,$1ffe0000
	dc.l	$60ff0000,$1b0e0000,$60ff0000,$1ba00000
	dc.l	$60ff0000,$1c360000,$60ff0000,$08860000
	dc.l	$60ff0000,$09180000,$60ff0000,$09ae0000
	dc.l	$60ff0000,$2bf00000,$60ff0000,$2ca40000
	dc.l	$60ff0000,$2d580000,$60ff0000,$29980000
	dc.l	$60ff0000,$2a4c0000,$60ff0000,$2b000000
	dc.l	$60ff0000,$2e000000,$60ff0000,$2eb40000
	dc.l	$60ff0000,$2f680000,$60ff0000,$029e0000
	dc.l	$60ff0000,$03300000,$60ff0000,$03c60000
	dc.l	$60ff0000,$27660000,$60ff0000,$27fe0000
	dc.l	$60ff0000,$289a0000,$60ff0000,$061e0000
	dc.l	$60ff0000,$06b00000,$60ff0000,$07460000
	dc.l	$60ff0000,$12ee0000,$60ff0000,$13800000
	dc.l	$60ff0000,$14160000,$60ff0000,$0b760000
	dc.l	$60ff0000,$0c080000,$60ff0000,$0c9e0000
	dc.l	$60ff0000,$18460000,$60ff0000,$18d80000
	dc.l	$60ff0000,$196e0000,$60ff0000,$16560000
	dc.l	$60ff0000,$16e80000,$60ff0000,$177e0000
	dc.l	$60ff0000,$72fe0000,$60ff0000,$72fe0000
	dc.l	$60ff0000,$72fe0000,$60ff0000,$71be0000
	dc.l	$60ff0000,$71d40000,$60ff0000,$71ea0000
	dc.l	$60ff0000,$72840000,$60ff0000,$729a0000
	dc.l	$60ff0000,$72b00000,$60ff0000,$72fe0000
	dc.l	$60ff0000,$72fe0000,$60ff0000,$72fe0000
	dc.l	$60ff0000,$72fe0000,$60ff0000,$72fe0000
	dc.l	$60ff0000,$72fe0000,$60ff0000,$71f20000
	dc.l	$60ff0000,$72080000,$60ff0000,$721e0000
	dc.l	$60ff0000,$72860000,$60ff0000,$72860000
	dc.l	$60ff0000,$72860000,$60ff0000,$72860000
	dc.l	$60ff0000,$72860000,$60ff0000,$72860000
	dc.l	$60ff0000,$71600000,$60ff0000,$71760000
	dc.l	$60ff0000,$718c0000,$51fc51fc,$51fc51fc
	dc.l	$51fc51fc,$51fc51fc,$51fc51fc,$51fc51fc
	dc.l	$51fc51fc,$51fc51fc,$51fc51fc,$51fc51fc
	dc.l	$51fc51fc,$51fc51fc,$51fc51fc,$51fc51fc
	dc.l	$51fc51fc,$51fc51fc,$51fc51fc,$51fc51fc
	dc.l	$51fc51fc,$51fc51fc,$51fc51fc,$51fc51fc
	dc.l	$51fc51fc,$51fc51fc,$51fc51fc,$51fc51fc
	dc.l	$51fc51fc,$51fc51fc,$51fc51fc,$51fc51fc
	dc.l	$51fc51fc,$51fc51fc,$51fc51fc,$51fc51fc
	dc.l	$51fc51fc,$51fc51fc,$51fc51fc,$51fc51fc
	dc.l	$51fc51fc,$51fc51fc,$51fc51fc,$51fc51fc
	dc.l	$51fc51fc,$51fc51fc,$51fc51fc,$51fc51fc
	dc.l	$51fc51fc,$51fc51fc,$51fc51fc,$51fc51fc
	dc.l	$51fc51fc,$51fc51fc,$51fc51fc,$51fc51fc
	dc.l	$51fc51fc,$51fc51fc,$51fc51fc,$51fc51fc
	dc.l	$40c62d38,$d3d64634,$3d6f90ae,$b1e75cc7
	dc.l	$40000000,$c90fdaa2,$2168c235,$00000000
	dc.l	$3fff0000,$c90fdaa2,$2168c235,$00000000
	dc.l	$3fe45f30,$6dc9c883,$4e56ff40,$48ee0303
	dc.l	$ff9cf22e,$b800ff60,$f22ef0c0,$ffdcf23c
	dc.l	$90000000,$0000f22e,$44000008,$f22e6800
	dc.l	$ff6c41ee,$ff6c61ff,$00006c76,$1d40ff4e
	dc.l	$120002ae,$00ff00ff,$ff644280,$102eff63
	dc.l	$4a016608,$61ff0000,$2ddc6030,$0c010001
	dc.l	$660861ff,$00007124,$60220c01,$00026608
	dc.l	$61ff0000,$6d226014,$0c010003,$660861ff
	dc.l	$00006f4c,$600661ff,$00002f8e,$4cee0303
	dc.l	$ff9cf22e,$9800ff60,$f22ed040,$ffe84e5e
	dc.l	$4e754e56,$ff4048ee,$0303ff9c,$f22eb800
	dc.l	$ff60f22e,$f0c0ffdc,$f23c9000,$00000000
	dc.l	$f22e5400,$0008f22e,$6800ff6c,$41eeff6c
	dc.l	$61ff0000,$6bdc1d40,$ff4e1200,$02ae00ff
	dc.l	$00ffff64,$4280102e,$ff631d41,$ff4e4a01
	dc.l	$660861ff,$00002d3e,$60300c01,$00016608
	dc.l	$61ff0000,$70866022,$0c010002,$660861ff
	dc.l	$00006c84,$60140c01,$00036608,$61ff0000
	dc.l	$6eae6006,$61ff0000,$2ef04cee,$0303ff9c
	dc.l	$f22e9800,$ff60f22e,$d040ffe8,$4e5e4e75
	dc.l	$4e56ff40,$48ee0303,$ff9cf22e,$b800ff60
	dc.l	$f22ef0c0,$ffdcf23c,$90000000,$000041ee
	dc.l	$ff6c216e,$00080000,$216e000c,$0004216e
	dc.l	$00100008,$61ff0000,$6b381d40,$ff4e1200
	dc.l	$02ae00ff,$00ffff64,$4280102e,$ff634a01
	dc.l	$660861ff,$00002c9e,$60300c01,$00016608
	dc.l	$61ff0000,$6fe66022,$0c010002,$660861ff
	dc.l	$00006be4,$60140c01,$00036608,$61ff0000
	dc.l	$6e0e6006,$61ff0000,$2e504cee,$0303ff9c
	dc.l	$f22e9800,$ff60f22e,$d040ffe8,$4e5e4e75
	dc.l	$4e56ff40,$48ee0303,$ff9cf22e,$b800ff60
	dc.l	$f22ef0c0,$ffdcf23c,$90000000,$0000f22e
	dc.l	$44000008,$f22e6800,$ff6c41ee,$ff6c61ff
	dc.l	$00006a9e,$1d40ff4e,$120002ae,$00ff00ff
	dc.l	$ff644280,$102eff63,$4a016608,$61ff0000
	dc.l	$2c0e6030,$0c010001,$660861ff,$00006fc8
	dc.l	$60220c01,$00026608,$61ff0000,$6b4a6014
	dc.l	$0c010003,$660861ff,$00006d74,$600661ff
	dc.l	$00002dbc,$4cee0303,$ff9cf22e,$9800ff60
	dc.l	$f22ed040,$ffe84e5e,$4e754e56,$ff4048ee
	dc.l	$0303ff9c,$f22eb800,$ff60f22e,$f0c0ffdc
	dc.l	$f23c9000,$00000000,$f22e5400,$0008f22e
	dc.l	$6800ff6c,$41eeff6c,$61ff0000,$6a041d40
	dc.l	$ff4e1200,$02ae00ff,$00ffff64,$4280102e
	dc.l	$ff631d41,$ff4e4a01,$660861ff,$00002b70
	dc.l	$60300c01,$00016608,$61ff0000,$6f2a6022
	dc.l	$0c010002,$660861ff,$00006aac,$60140c01
	dc.l	$00036608,$61ff0000,$6cd66006,$61ff0000
	dc.l	$2d1e4cee,$0303ff9c,$f22e9800,$ff60f22e
	dc.l	$d040ffe8,$4e5e4e75,$4e56ff40,$48ee0303
	dc.l	$ff9cf22e,$b800ff60,$f22ef0c0,$ffdcf23c
	dc.l	$90000000,$000041ee,$ff6c216e,$00080000
	dc.l	$216e000c,$0004216e,$00100008,$61ff0000
	dc.l	$69601d40,$ff4e1200,$02ae00ff,$00ffff64
	dc.l	$4280102e,$ff634a01,$660861ff,$00002ad0
	dc.l	$60300c01,$00016608,$61ff0000,$6e8a6022
	dc.l	$0c010002,$660861ff,$00006a0c,$60140c01
	dc.l	$00036608,$61ff0000,$6c366006,$61ff0000
	dc.l	$2c7e4cee,$0303ff9c,$f22e9800,$ff60f22e
	dc.l	$d040ffe8,$4e5e4e75,$4e56ff40,$48ee0303
	dc.l	$ff9cf22e,$b800ff60,$f22ef0c0,$ffdcf23c
	dc.l	$90000000,$0000f22e,$44000008,$f22e6800
	dc.l	$ff6c41ee,$ff6c61ff,$000068c6,$1d40ff4e
	dc.l	$120002ae,$00ff00ff,$ff644280,$102eff63
	dc.l	$4a016608,$61ff0000,$4e686030,$0c010001
	dc.l	$660861ff,$00006d74,$60220c01,$00026608
	dc.l	$61ff0000,$6d946014,$0c010003,$660861ff
	dc.l	$00006b9c,$600661ff,$00004f14,$4cee0303
	dc.l	$ff9cf22e,$9800ff60,$f22ed040,$ffe84e5e
	dc.l	$4e754e56,$ff4048ee,$0303ff9c,$f22eb800
	dc.l	$ff60f22e,$f0c0ffdc,$f23c9000,$00000000
	dc.l	$f22e5400,$0008f22e,$6800ff6c,$41eeff6c
	dc.l	$61ff0000,$682c1d40,$ff4e1200,$02ae00ff
	dc.l	$00ffff64,$4280102e,$ff631d41,$ff4e4a01
	dc.l	$660861ff,$00004dca,$60300c01,$00016608
	dc.l	$61ff0000,$6cd66022,$0c010002,$660861ff
	dc.l	$00006cf6,$60140c01,$00036608,$61ff0000
	dc.l	$6afe6006,$61ff0000,$4e764cee,$0303ff9c
	dc.l	$f22e9800,$ff60f22e,$d040ffe8,$4e5e4e75
	dc.l	$4e56ff40,$48ee0303,$ff9cf22e,$b800ff60
	dc.l	$f22ef0c0,$ffdcf23c,$90000000,$000041ee
	dc.l	$ff6c216e,$00080000,$216e000c,$0004216e
	dc.l	$00100008,$61ff0000,$67881d40,$ff4e1200
	dc.l	$02ae00ff,$00ffff64,$4280102e,$ff634a01
	dc.l	$660861ff,$00004d2a,$60300c01,$00016608
	dc.l	$61ff0000,$6c366022,$0c010002,$660861ff
	dc.l	$00006c56,$60140c01,$00036608,$61ff0000
	dc.l	$6a5e6006,$61ff0000,$4dd64cee,$0303ff9c
	dc.l	$f22e9800,$ff60f22e,$d040ffe8,$4e5e4e75
	dc.l	$4e56ff40,$48ee0303,$ff9cf22e,$b800ff60
	dc.l	$f22ef0c0,$ffdcf23c,$90000000,$0000f22e
	dc.l	$44000008,$f22e6800,$ff6c41ee,$ff6c61ff
	dc.l	$000066ee,$1d40ff4e,$120002ae,$00ff00ff
	dc.l	$ff644280,$102eff63,$4a016608,$61ff0000
	dc.l	$59b26030,$0c010001,$660861ff,$00006b9c
	dc.l	$60220c01,$00026608,$61ff0000,$6bf26014
	dc.l	$0c010003,$660861ff,$000069c4,$600661ff
	dc.l	$00005ad4,$4cee0303,$ff9cf22e,$9800ff60
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	dc.l	$000442a8,$00080268,$80000000,$103c0004
	dc.l	$4e750268,$80000000,$103c0001,$4e7551fc
~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
MOTOROLA MICROPROCESSOR & MEMORY TECHNOLOGY GROUP
M68000 Hi-Performance Microprocessor Division
M68060 Software Package
Production Release P1.00 -- October 10, 1994

M68060 Software Package Copyright � 1993, 1994 Motorola Inc.  All rights reserved.
 
THE SOFTWARE is provided on an "AS IS" basis and without warranty.
To the maximum extent permitted by applicable law,
MOTOROLA DISCLAIMS ALL WARRANTIES WHETHER EXPRESS OR IMPLIED, 
INCLUDING IMPLIED WARRANTIES OF MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE
and any warranty against infringement with regard to the SOFTWARE
(INCLUDING ANY MODIFIED VERSIONS THEREOF) and any accompanying written materials.

To the maximum extent permitted by applicable law,
IN NO EVENT SHALL MOTOROLA BE LIABLE FOR ANY DAMAGES WHATSOEVER
(INCLUDING WITHOUT LIMITATION, DAMAGES FOR LOSS OF BUSINESS PROFITS,
BUSINESS INTERRUPTION, LOSS OF BUSINESS INFORMATION, OR OTHER PECUNIARY LOSS)
ARISING OF THE USE OR INABILITY TO USE THE SOFTWARE.
Motorola assumes no responsibility for the maintenance and support of the SOFTWARE.

You are hereby granted a copyright license to use, modify, and distribute the SOFTWARE
so long as this entire notice is retained without alteration in any modified and/or
redistributed versions, and that such modified versions are clearly identified as such.
No licenses are granted by implication, estoppel or otherwise under any patents
or trademarks of Motorola, Inc.
~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
68060 FLOATING-POINT SOFTWARE PACKAGE (Kernel version)
-------------------------------------------------------

The file fpsp.sa contains the 68060 Floating-Point Software
Package. This package is essentially a set of exception handlers
that can be integrated into an operating system. 
These exception handlers emulate Unimplemented FP instructions,
instructions using unimplemented data types, and instructions
using unimplemented addressing modes. In addition, this package
includes exception handlers to provide full IEEE-754 compliant
exception handling.

Release file format:
--------------------
The file fpsp.sa is essentially a hexadecimal image of the
release package. This is the ONLY format which will be supported.
The hex image was created by assembling the source code and
then converting the resulting binary output image into an
ASCII text file. The hexadecimal numbers are listed
using the Motorola Assembly Syntax assembler directive "dc.l"
(define constant longword). The file can be converted to other
assembly syntaxes by using any word processor with a global
search and replace function.

To assist in assembling and linking this module with other modules,
the installer should add a symbolic label to the top of the file.
This will allow calling routines to access the entry points
of this package.

The source code fpsp.s has also been included but only for
documentation purposes.

Release file structure:
-----------------------

(top of module)
	----------------- 
	|		| - 128 byte-sized section
   (1)  |   Call-Out	| - 4 bytes per entry (user fills these in)
	|		| - example routines in fskeleton.s
	-----------------
	|		| - 8 bytes per entry
   (2)  | Entry Point	| - user does "bra" or "jmp" to this address
	|		| 
	-----------------
	|		| - code section
   (3)  ~		~
	|		|
	-----------------
(bottom of module)

The first section of this module is the "Call-out" section. This section
is NOT INCLUDED in fpsp.sa (an example "Call-out" section is provided at
the end of the file fskeleton.s). The purpose of this section is to allow 
the FPSP routines to reference external functions that must be provided 
by the host operating system. This section MUST be exactly 128 bytes in 
size. There are 32 fields, each 4 bytes in size. Each field corresponds
to a function required by the FPSP (these functions and their location are
listed in "68060FPSP call-outs" below). Each field entry should contain
the address of the corresponding function RELATIVE to the starting address
of the "call-out" section. The "Call-out" section must sit adjacent to the 
fpsp.sa image in memory.

The second section, the "Entry-point" section, is used by external routines
to access the functions within the FPSP. Since the fpsp.sa hex file contains
no symbol names, this section contains function entry points that are fixed
with respect to the top of the package. The currently defined entry-points
are listed in section "68060 FPSP entry points" below. A calling routine
would simply execute a "bra" or "jmp" that jumped to the selected function
entry-point.

For example, if the 68060 hardware took a "Line-F Emulator" exception 
(vector #11), the operating system should execute something similar to:

	bra	_060FPSP_TOP+128+48

(_060FPSP_TOP is the starting address of the "Call-out" section; the "Call-out"
section is 128 bytes long; and the F-Line FPSP handler entry point is located
48 bytes from the top of the "Entry-point" section.)

The third section is the code section. After entering through an "Entry-point",
the entry code jumps to the appropriate emulation code within the code section.

68060FPSP call-outs: (details in fskeleton.s)
--------------------
0x000:	_060_real_bsun
0x004:	_060_real_snan
0x008:	_060_real_operr
0x00c:	_060_real_ovfl
0x010:	_060_real_unfl
0x014:	_060_real_dz
0x018:	_060_real_inex
0x01c:	_060_real_fline
0x020:	_060_real_fpu_disabled
0x024:	_060_real_trap
0x028:	_060_real_trace
0x02c:	_060_real_access
0x030:	_060_fpsp_done

0x034:	(Motorola reserved)
0x038:	(Motorola reserved)
0x03c:	(Motorola reserved)

0x040:	_060_imem_read
0x044:	_060_dmem_read
0x048:	_060_dmem_write
0x04c:	_060_imem_read_word
0x050:	_060_imem_read_long
0x054:	_060_dmem_read_byte
0x058:	_060_dmem_read_word
0x05c:	_060_dmem_read_long
0x060:	_060_dmem_write_byte
0x064:	_060_dmem_write_word
0x068:	_060_dmem_write_long

0x06c:	(Motorola reserved)
0x070:	(Motorola reserved)
0x074:	(Motorola reserved)
0x078:	(Motorola reserved)
0x07c:	(Motorola reserved)

68060FPSP entry points:
-----------------------
0x000:	_060_fpsp_snan
0x008:	_060_fpsp_operr
0x010:	_060_fpsp_ovfl
0x018:	_060_fpsp_unfl
0x020:	_060_fpsp_dz
0x028:	_060_fpsp_inex
0x030:	_060_fpsp_fline
0x038:	_060_fpsp_unsupp
0x040:	_060_fpsp_effadd



Miscellaneous:
--------------

_060_fpsp_snan:
----------------
- documented in 3.5 of 060SP spec.
- Basic flow:
	exception taken ---> enter _060_fpsp_snan --|
						    |
            always exits through _060_real_snan <----

_060_fpsp_operr:
----------------
- documented in 3.5 of 060SP spec.
- Basic flow:
	exception taken ---> enter _060_fpsp_operr --|
						     |
           always exits through _060_real_operr <-----

_060_fpsp_dz:
----------------
- documented in 3.7 of 060SP spec.
- Basic flow:
	exception taken ---> enter _060_fpsp_dz   --|
						    |
            always exits through _060_real_dz   <----

_060_fpsp_inex:
----------------
- documented in 3.6 of 060SP spec.
- Basic flow:
	exception taken ---> enter _060_fpsp_inex --|
						    |
            always exits through _060_real_inex <----


_060_fpsp_ovfl:
----------------
- documented in 3.4 of 060SP spec.
- Basic flow:
	exception taken ---> enter _060_fpsp_ovfl --|
						    |
            may exit through _060_real_inex     <---|
						 or |
            may exit through _060_real_ovfl     <---|
						 or |
            may exit through _060_fpsp_done     <---|

_060_fpsp_unfl:
----------------
- documented in 3.4 of 060SP spec.
- Basic flow:
	exception taken ---> enter _060_fpsp_unfl --|
						    |
            may exit through _060_real_inex     <---|
						 or |
            may exit through _060_real_unfl     <---|
						 or |
            may exit through _060_fpsp_done     <---|


_060_fpsp_fline:
-----------------
- not fully documented in 060SP spec.
- Basic flow:
	exception taken ---> enter _060_fpsp_fline --|
						     |
            -------------------------------------------
            |               |                     |
            v               v                     v
   (unimplemented   (fpu disabled)       (possible F-line illegal)
     stack frame)           |                     v
            |               v               special case "fmovecr"?
            |         exit through                    |
            |     _060_real_fpu_disabled        -------------
            |                                   |           |
            |               ^                   v           v
            |               |                 (yes)        (no)
            |               |                   v           v
            |               |             fpu disabled?   exit through
            |               |                   |         _060_real_fline
            v               |             -------------
            |               |             |           |
            |               |             v           v
            |               |-----------(yes)        (no)
            |                                         |
            |----<------------------------------------|
            |
            |
            |----> may exit through _060_real_trace
            |
            |----> may exit through _060_real_trap
            |
            |----> may exit through _060_real_bsun
            |
            |----> may exit through _060_fpsp_done


_060_fpsp_unsupp:
------------------
- documented in 3.1 of 060SP spec.
- Basic flow:
	exception taken ---> enter _060_fpsp_unsupp --|
						      |
						      |
            may exit through _060_real_snan      <----|
						  or  |
            may exit through _060_real_operr     <----|
						  or  |
            may exit through _060_real_ovfl      <----|
						  or  |
            may exit through _060_real_unfl      <----|
						  or  |
            may exit through _060_real_inex      <----|
						  or  |
            may exit through _060_real_trace     <----|
						  or  |
            may exit through _060_fpsp_done      <----|


_060_fpsp_effadd:
------------------
- documented in 3.3 of 060 spec.
- Basic flow:
	exception taken ---> enter _060_fpsp_effadd --|
						      |
						      |
            may exit through _060_real_trace     <----|
						  or  |
     may exit through _060_real_fpu_disabled     <----|
						  or  |
            may exit through _060_fpsp_done      <----|
	.long	0x60ff0000,0x17400000,0x60ff0000,0x15f40000
	.long	0x60ff0000,0x02b60000,0x60ff0000,0x04700000
	.long	0x60ff0000,0x1b100000,0x60ff0000,0x19aa0000
	.long	0x60ff0000,0x1b5a0000,0x60ff0000,0x062e0000
	.long	0x60ff0000,0x102c0000,0x51fc51fc,0x51fc51fc
	.long	0x51fc51fc,0x51fc51fc,0x51fc51fc,0x51fc51fc
	.long	0x51fc51fc,0x51fc51fc,0x51fc51fc,0x51fc51fc
	.long	0x51fc51fc,0x51fc51fc,0x51fc51fc,0x51fc51fc
	.long	0x2f00203a,0xff2c487b,0x0930ffff,0xfef8202f
	.long	0x00044e74,0x00042f00,0x203afef2,0x487b0930
	.long	0xfffffee2,0x202f0004,0x4e740004,0x2f00203a
	.long	0xfee0487b,0x0930ffff,0xfecc202f,0x00044e74
	.long	0x00042f00,0x203afed2,0x487b0930,0xfffffeb6
	.long	0x202f0004,0x4e740004,0x2f00203a,0xfea4487b
	.long	0x0930ffff,0xfea0202f,0x00044e74,0x00042f00
	.long	0x203afe96,0x487b0930,0xfffffe8a,0x202f0004
	.long	0x4e740004,0x2f00203a,0xfe7c487b,0x0930ffff
	.long	0xfe74202f,0x00044e74,0x00042f00,0x203afe76
	.long	0x487b0930,0xfffffe5e,0x202f0004,0x4e740004
	.long	0x2f00203a,0xfe68487b,0x0930ffff,0xfe48202f
	.long	0x00044e74,0x00042f00,0x203afe56,0x487b0930
	.long	0xfffffe32,0x202f0004,0x4e740004,0x2f00203a
	.long	0xfe44487b,0x0930ffff,0xfe1c202f,0x00044e74
	.long	0x00042f00,0x203afe32,0x487b0930,0xfffffe06
	.long	0x202f0004,0x4e740004,0x2f00203a,0xfe20487b
	.long	0x0930ffff,0xfdf0202f,0x00044e74,0x00042f00
	.long	0x203afe1e,0x487b0930,0xfffffdda,0x202f0004
	.long	0x4e740004,0x2f00203a,0xfe0c487b,0x0930ffff
	.long	0xfdc4202f,0x00044e74,0x00042f00,0x203afdfa
	.long	0x487b0930,0xfffffdae,0x202f0004,0x4e740004
	.long	0x2f00203a,0xfde8487b,0x0930ffff,0xfd98202f
	.long	0x00044e74,0x00042f00,0x203afdd6,0x487b0930
	.long	0xfffffd82,0x202f0004,0x4e740004,0x2f00203a
	.long	0xfdc4487b,0x0930ffff,0xfd6c202f,0x00044e74
	.long	0x00042f00,0x203afdb2,0x487b0930,0xfffffd56
	.long	0x202f0004,0x4e740004,0x2f00203a,0xfda0487b
	.long	0x0930ffff,0xfd40202f,0x00044e74,0x00042f00
	.long	0x203afd8e,0x487b0930,0xfffffd2a,0x202f0004
	.long	0x4e740004,0x2f00203a,0xfd7c487b,0x0930ffff
	.long	0xfd14202f,0x00044e74,0x00042f00,0x203afd6a
	.long	0x487b0930,0xfffffcfe,0x202f0004,0x4e740004
	.long	0x40c62d38,0xd3d64634,0x3d6f90ae,0xb1e75cc7
	.long	0x40000000,0xc90fdaa2,0x2168c235,0x00000000
	.long	0x3fff0000,0xc90fdaa2,0x2168c235,0x00000000
	.long	0x3fe45f30,0x6dc9c883,0x4e56ff40,0xf32eff6c
	.long	0x48ee0303,0xff9cf22e,0xbc00ff60,0xf22ef0c0
	.long	0xffdc2d6e,0xff68ff44,0x206eff44,0x58aeff44
	.long	0x61ffffff,0xff042d40,0xff40082e,0x0005ff42
	.long	0x66000116,0x41eeff6c,0x61ff0000,0x051c41ee
	.long	0xff6c61ff,0x0000c1dc,0x1d40ff4e,0x082e0005
	.long	0xff436726,0xe9ee0183,0xff4261ff,0x0000bd22
	.long	0x41eeff78,0x61ff0000,0xc1ba0c00,0x00066606
	.long	0x61ff0000,0xc11e1d40,0xff4f4280,0x102eff63
	.long	0x122eff43,0x0241007f,0x02ae00ff,0x01ffff64
	.long	0xf23c9000,0x00000000,0xf23c8800,0x00000000
	.long	0x41eeff6c,0x43eeff78,0x223b1530,0x00007112
	.long	0x4ebb1930,0x0000710a,0xe9ee0183,0xff4261ff
	.long	0x0000bd4e,0x082e0004,0xff626622,0x082e0001
	.long	0xff626644,0xf22ed0c0,0xffdcf22e,0x9c00ff60
	.long	0x4cee0303,0xff9c4e5e,0x60ffffff,0xfcc6f22e
	.long	0xf040ff6c,0x3d7ce005,0xff6ef22e,0xd0c0ffdc
	.long	0xf22e9c00,0xff604cee,0x0303ff9c,0xf36eff6c
	.long	0x4e5e60ff,0xfffffcb2,0xf22ef040,0xff6c1d7c
	.long	0x00c4000b,0x3d7ce001,0xff6ef22e,0xd0c0ffdc
	.long	0xf22e9c00,0xff604cee,0x0303ff9c,0xf36eff6c
	.long	0x4e5e60ff,0xfffffcae,0x1d7c0000,0xff4e4280
	.long	0x102eff63,0x02aeffff,0x00ffff64,0xf23c9000
	.long	0x00000000,0xf23c8800,0x00000000,0x41eeff6c
	.long	0x61ff0000,0xb2ce082e,0x0004ff62,0x6600ff70
	.long	0x082e0001,0xff626600,0xff90f22e,0xd0c0ffdc
	.long	0xf22e9c00,0xff604cee,0x0303ff9c,0x4e5e0817
	.long	0x000767ff,0xfffffc0c,0xf22fa400,0x00083f7c
	.long	0x20240006,0x60ffffff,0xfcec4e56,0xff40f32e
	.long	0xff6c48ee,0x0303ff9c,0xf22ebc00,0xff60f22e
	.long	0xf0c0ffdc,0x2d6eff68,0xff44206e,0xff4458ae
	.long	0xff4461ff,0xfffffd42,0x2d40ff40,0x082e0005
	.long	0xff426600,0x013241ee,0xff6c61ff,0x0000035a
	.long	0x41eeff6c,0x61ff0000,0xc01a1d40,0xff4e082e
	.long	0x0005ff43,0x672e082e,0x0004ff43,0x6626e9ee
	.long	0x0183ff42,0x61ff0000,0xbb5841ee,0xff7861ff
	.long	0x0000bff0,0x0c000006,0x660661ff,0x0000bf54
	.long	0x1d40ff4f,0x4280102e,0xff63122e,0xff430241
	.long	0x007f02ae,0x00ff01ff,0xff64f23c,0x90000000
	.long	0x0000f23c,0x88000000,0x000041ee,0xff6c43ee
	.long	0xff78223b,0x15300000,0x6f484ebb,0x19300000
	.long	0x6f40e9ee,0x0183ff42,0x61ff0000,0xbb84082e
	.long	0x0003ff62,0x6622082e,0x0001ff62,0x664ef22e
	.long	0xd0c0ffdc,0xf22e9c00,0xff604cee,0x0303ff9c
	.long	0x4e5e60ff,0xfffffafc,0x082e0003,0xff666700
	.long	0xffd6f22e,0xf040ff6c,0x3d7ce003,0xff6ef22e
	.long	0xd0c0ffdc,0xf22e9c00,0xff604cee,0x0303ff9c
	.long	0xf36eff6c,0x4e5e60ff,0xfffffaf4,0x082e0001
	.long	0xff666700,0xffaaf22e,0xf040ff6c,0x1d7c00c4
	.long	0x000b3d7c,0xe001ff6e,0xf22ed0c0,0xffdcf22e
	.long	0x9c00ff60,0x4cee0303,0xff9cf36e,0xff6c4e5e
	.long	0x60ffffff,0xfad01d7c,0x0000ff4e,0x4280102e
	.long	0xff6302ae,0xffff00ff,0xff64f23c,0x90000000
	.long	0x0000f23c,0x88000000,0x000041ee,0xff6c61ff
	.long	0x0000b0f0,0x082e0003,0xff626600,0xff66082e
	.long	0x0001ff62,0x6600ff90,0xf22ed0c0,0xffdcf22e
	.long	0x9c00ff60,0x4cee0303,0xff9c4e5e,0x08170007
	.long	0x67ffffff,0xfa2ef22f,0xa4000008,0x3f7c2024
	.long	0x000660ff,0xfffffb0e,0x4e56ff40,0xf32eff6c
	.long	0x48ee0303,0xff9cf22e,0xbc00ff60,0xf22ef0c0
	.long	0xffdc082e,0x00050004,0x66084e68,0x2d48ffd8
	.long	0x600841ee,0x00102d48,0xffd82d6e,0xff68ff44
	.long	0x206eff44,0x58aeff44,0x61ffffff,0xfb4c2d40
	.long	0xff40422e,0xff4a082e,0x0005ff42,0x66000208
	.long	0xe9ee0006,0xff420c00,0x00136700,0x049e02ae
	.long	0x00ff00ff,0xff64f23c,0x90000000,0x0000f23c
	.long	0x88000000,0x000041ee,0xff6c61ff,0x0000013a
	.long	0x41eeff6c,0x61ff0000,0xbdfa0c00,0x00066606
	.long	0x61ff0000,0xbd5e1d40,0xff4ee9ee,0x0183ff42
	.long	0x082e0005,0xff436728,0x0c2e003a,0xff436720
	.long	0x61ff0000,0xb92c41ee,0xff7861ff,0x0000bdc4
	.long	0x0c000006,0x660661ff,0x0000bd28,0x1d40ff4f
	.long	0x4280102e,0xff63e9ee,0x1047ff43,0x41eeff6c
	.long	0x43eeff78,0x223b1d30,0x00006d36,0x4ebb1930
	.long	0x00006d2e,0x102eff62,0x6634102e,0xff430200
	.long	0x00380c00,0x0038670c,0xe9ee0183,0xff4261ff
	.long	0x0000b95e,0xf22ed0c0,0xffdcf22e,0x9c00ff60
	.long	0x4cee0303,0xff9c4e5e,0x60ffffff,0xf8e6c02e
	.long	0xff66edc0,0x06086614,0x082e0004,0xff6667ba
	.long	0x082e0001,0xff6267b2,0x60000066,0x04800000
	.long	0x00180c00,0x00066614,0x082e0003,0xff666600
	.long	0x004a082e,0x0004ff66,0x66000046,0x2f0061ff
	.long	0x000007e0,0x201f3d7b,0x0222ff6e,0xf22ed0c0
	.long	0xffdcf22e,0x9c00ff60,0x4cee0303,0xff9cf36e
	.long	0xff6c4e5e,0x60ffffff,0xf87ae000,0xe006e004
	.long	0xe005e003,0xe002e001,0xe001303c,0x000460bc
	.long	0x303c0003,0x60b6e9ee,0x0006ff42,0x0c000011
	.long	0x67080c00,0x00156750,0x4e753028,0x00000240
	.long	0x7fff0c40,0x3f806708,0x0c40407f,0x672c4e75
	.long	0x02a87fff,0xffff0004,0x671861ff,0x0000bbbc
	.long	0x44400640,0x3f810268,0x80000000,0x81680000
	.long	0x4e750268,0x80000000,0x4e750228,0x007f0004
	.long	0x00687fff,0x00004e75,0x30280000,0x02407fff
	.long	0x0c403c00,0x67080c40,0x43ff67de,0x4e7502a8
	.long	0x7fffffff,0x00046606,0x4aa80008,0x67c461ff
	.long	0x0000bb68,0x44400640,0x3c010268,0x80000000
	.long	0x81680000,0x4e75e9ee,0x00c3ff42,0x0c000003
	.long	0x670004a2,0x0c000007,0x6700049a,0x02aeffff
	.long	0x00ffff64,0xf23c9000,0x00000000,0xf23c8800
	.long	0x00000000,0x302eff6c,0x02407fff,0x671041ee
	.long	0xff6c61ff,0x0000bb5c,0x1d40ff4e,0x60061d7c
	.long	0x0004ff4e,0x4280102e,0xff6341ee,0xff6c2d56
	.long	0xffd461ff,0x0000adec,0x102eff62,0x66000086
	.long	0x2caeffd4,0x082e0005,0x00046626,0x206effd8
	.long	0x4e60f22e,0xd0c0ffdc,0xf22e9c00,0xff604cee
	.long	0x0303ff9c,0x4e5e0817,0x0007667a,0x60ffffff
	.long	0xf7220c2e,0x0008ff4a,0x66d8f22e,0xf080ff6c
	.long	0xf22ed0c0,0xffdcf22e,0x9c00ff60,0x4cee0303
	.long	0xff9c2c56,0x2f6f00c4,0x00b82f6f,0x00c800bc
	.long	0x2f6f002c,0x00c42f6f,0x003000c8,0x2f6f0034
	.long	0x00ccdffc,0x000000b8,0x08170007,0x662860ff
	.long	0xfffff6d0,0xc02eff66,0xedc00608,0x662a082e
	.long	0x0004ff66,0x6700ff6a,0x082e0001,0xff626700
	.long	0xff606000,0x01663f7c,0x20240006,0xf22fa400
	.long	0x000860ff,0xfffff78e,0x04800000,0x0018303b
	.long	0x020a4efb,0x00064afc,0x00080000,0x0000003a
	.long	0x00640094,0x00000140,0x0000f22e,0xd0c0ffdc
	.long	0xf22e9c00,0xff604cee,0x0303ff9c,0x3d7c30d8
	.long	0x000a3d7c,0xe006ff6e,0xf36eff6c,0x4e5e60ff
	.long	0xfffff6d4,0xf22ed0c0,0xffdcf22e,0x9c00ff60
	.long	0x4cee0303,0xff9c3d7c,0x30d0000a,0x3d7ce004
	.long	0xff6ef36e,0xff6c4e5e,0x60ffffff,0xf694f22e
	.long	0xf040ff6c,0xf22ed0c0,0xffdcf22e,0x9c00ff60
	.long	0x4cee0303,0xff9c3d7c,0x30d4000a,0x3d7ce005
	.long	0xff6ef36e,0xff6c4e5e,0x60ffffff,0xf60c2cae
	.long	0xffd4082e,0x00050004,0x66000038,0x206effd8
	.long	0x4e60f22e,0xf040ff6c,0xf22ed0c0,0xffdcf22e
	.long	0x9c00ff60,0x4cee0303,0xff9c3d7c,0x30cc000a
	.long	0x3d7ce003,0xff6ef36e,0xff6c4e5e,0x60ffffff
	.long	0xf5de0c2e,0x0008ff4a,0x66c8f22e,0xf080ff6c
	.long	0xf22ef040,0xff78f22e,0xd0c0ffdc,0xf22e9c00
	.long	0xff604cee,0x0303ff9c,0x3d7c30cc,0x000a3d7c
	.long	0xe003ff7a,0xf36eff78,0x2c562f6f,0x00c400b8
	.long	0x2f6f00c8,0x00bc2f6f,0x00cc00c0,0x2f6f002c
	.long	0x00c42f6f,0x003000c8,0x2f6f0034,0x00ccdffc
	.long	0x000000b8,0x60ffffff,0xf576f22e,0xf040ff6c
	.long	0xf22ed0c0,0xffdcf22e,0x9c00ff60,0x4cee0303
	.long	0xff9c3d7c,0x30c4000a,0x3d7ce001,0xff6ef36e
	.long	0xff6c4e5e,0x60ffffff,0xf55c02ae,0x00ff00ff
	.long	0xff64f23c,0x90000000,0x0000f23c,0x88000000
	.long	0x000061ff,0x0000bdba,0x41eeff6c,0x61ff0000
	.long	0xb9621d40,0xff4ee9ee,0x0183ff42,0x082e0005
	.long	0xff436728,0x0c2e003a,0xff436720,0x61ff0000
	.long	0xb4a041ee,0xff7861ff,0x0000b938,0x0c000006
	.long	0x660661ff,0x0000b89c,0x1d40ff4f,0x4280102e
	.long	0xff63e9ee,0x1047ff43,0x41eeff6c,0x43eeff78
	.long	0x223b1d30,0x000068aa,0x4ebb1930,0x000068a2
	.long	0x102eff62,0x6600008a,0x102eff43,0x02000038
	.long	0x0c000038,0x670ce9ee,0x0183ff42,0x61ff0000
	.long	0xb4d0082e,0x00050004,0x6600002a,0x206effd8
	.long	0x4e60f22e,0xd0c0ffdc,0xf22e9c00,0xff604cee
	.long	0x0303ff9c,0x4e5e0817,0x00076600,0x012660ff
	.long	0xfffff440,0x082e0002,0xff4a67d6,0xf22ed0c0
	.long	0xffdcf22e,0x9c00ff60,0x4cee0303,0xff9c4e5e
	.long	0x2f6f0004,0x00102f6f,0x0000000c,0xdffc0000
	.long	0x000c0817,0x00076600,0x00ea60ff,0xfffff404
	.long	0xc02eff66,0xedc00608,0x6618082e,0x0004ff66
	.long	0x6700ff66,0x082e0001,0xff626700,0xff5c6000
	.long	0x006e0480,0x00000018,0x0c000006,0x6d14082e
	.long	0x0003ff66,0x66000060,0x082e0004,0xff666600
	.long	0x004e082e,0x00050004,0x66000054,0x206effd8
	.long	0x4e603d7b,0x022aff6e,0xf22ed0c0,0xffdcf22e
	.long	0x9c00ff60,0x4cee0303,0xff9cf36e,0xff6c4e5e
	.long	0x08170007,0x6600006c,0x60ffffff,0xf386e000
	.long	0xe006e004,0xe005e003,0xe002e001,0xe001303c
	.long	0x00036000,0xffae303c,0x00046000,0xffa6082e
	.long	0x0002ff4a,0x67ac3d7b,0x02d6ff6e,0xf22ed0c0
	.long	0xffdcf22e,0x9c00ff60,0x4cee0303,0xff9cf36e
	.long	0xff6c4e5e,0x2f6f0004,0x00102f6f,0x0000000c
	.long	0xdffc0000,0x000c0817,0x00076606,0x60ffffff
	.long	0xf3223f7c,0x20240006,0xf22fa400,0x000860ff
	.long	0xfffff402,0x02aeffff,0x00ffff64,0xf23c9000
	.long	0x00000000,0xf23c8800,0x00000000,0xe9ee0183
	.long	0xff4261ff,0x0000b22a,0x41eeff6c,0x61ff0000
	.long	0xb7520c00,0x00066606,0x61ff0000,0xb6b61d40
	.long	0xff4e4280,0x102eff63,0x41eeff6c,0x2d56ffd4
	.long	0x61ff0000,0xa94e102e,0xff626600,0x00842cae
	.long	0xffd4082e,0x00050004,0x6628206e,0xffd84e60
	.long	0xf22ed0c0,0xffdcf22e,0x9c00ff60,0x4cee0303
	.long	0xff9c4e5e,0x08170007,0x6600ff68,0x60ffffff
	.long	0xf282082e,0x0003ff4a,0x67d6f22e,0xd0c0ffdc
	.long	0xf22e9c00,0xff604cee,0x0303ff9c,0x2c562f6f
	.long	0x00c400b8,0x2f6f00c8,0x00bc2f6f,0x003800c4
	.long	0x2f6f003c,0x00c82f6f,0x004000cc,0xdffc0000
	.long	0x00b80817,0x00076600,0xff1a60ff,0xfffff234
	.long	0xc02eff66,0xedc00608,0x6700ff74,0x2caeffd4
	.long	0x0c00001a,0x6e0000e8,0x67000072,0x082e0005
	.long	0x0004660a,0x206effd8,0x4e606000,0xfb8e0c2e
	.long	0x0008ff4a,0x6600fb84,0xf22ed0c0,0xffdcf22e
	.long	0x9c00ff60,0x4cee0303,0xff9c3d7c,0x30d8000a
	.long	0x3d7ce006,0xff6ef36e,0xff6c2c56,0x2f6f00c4
	.long	0x00b82f6f,0x00c800bc,0x2f6f00cc,0x00c02f6f
	.long	0x003800c4,0x2f6f003c,0x00c82f6f,0x004000cc
	.long	0xdffc0000,0x00b860ff,0xfffff22c,0x082e0005
	.long	0x00046600,0x000c206e,0xffd84e60,0x6000fb46
	.long	0x0c2e0008,0xff4a6600,0xfb3cf22e,0xd0c0ffdc
	.long	0xf22e9c00,0xff604cee,0x0303ff9c,0x3d7c30d0
	.long	0x000a3d7c,0xe004ff6e,0xf36eff6c,0x2c562f6f
	.long	0x00c400b8,0x2f6f00c8,0x00bc2f6f,0x00cc00c0
	.long	0x2f6f0038,0x00c42f6f,0x003c00c8,0x2f6f0040
	.long	0x00ccdffc,0x000000b8,0x60ffffff,0xf1a4082e
	.long	0x00050004,0x6600000c,0x206effd8,0x4e606000
	.long	0xfbda0c2e,0x0008ff4a,0x6600fbd0,0xf22ed0c0
	.long	0xffdcf22e,0x9c00ff60,0x4cee0303,0xff9c3d7c
	.long	0x30c4000a,0x3d7ce001,0xff6ef36e,0xff6c2c56
	.long	0x2f6f00c4,0x00b82f6f,0x00c800bc,0x2f6f00cc
	.long	0x00c02f6f,0x003800c4,0x2f6f003c,0x00c82f6f
	.long	0x004000cc,0xdffc0000,0x00b860ff,0xfffff106
	.long	0xe9ee00c3,0xff420c00,0x00016708,0x0c000005
	.long	0x67344e75,0x302eff6c,0x02407fff,0x67260c40
	.long	0x3f806e20,0x44400640,0x3f81222e,0xff70e0a9
	.long	0x08c1001f,0x2d41ff70,0x026e8000,0xff6c006e
	.long	0x3f80ff6c,0x4e75302e,0xff6c0240,0x7fff673a
	.long	0x0c403c00,0x6e344a2e,0xff6c5bee,0xff6e3d40
	.long	0xff6c4280,0x41eeff6c,0x323c3c01,0x61ff0000
	.long	0xb156303c,0x3c004a2e,0xff6e6704,0x08c0000f
	.long	0x08ee0007,0xff703d40,0xff6c4e75,0x082e0005
	.long	0x000467ff,0xfffff176,0x2d680000,0xff782d68
	.long	0x0004ff7c,0x2d680008,0xff804281,0x4e752f00
	.long	0x4e7a0808,0x08000001,0x66000460,0x201f4e56
	.long	0xff4048ee,0x0303ff9c,0xf22ebc00,0xff60f22e
	.long	0xf0c0ffdc,0x2d6e0006,0xff44206e,0xff4458ae
	.long	0xff4461ff,0xfffff152,0x2d40ff40,0x4a406b00
	.long	0x020e02ae,0x00ff00ff,0xff640800,0x000a6618
	.long	0x206eff44,0x43eeff6c,0x700c61ff,0xfffff0d2
	.long	0x4a816600,0x04926048,0x206eff44,0x43eeff6c
	.long	0x700c61ff,0xfffff0ba,0x4a816600,0x047ae9ee
	.long	0x004fff6c,0x0c407fff,0x6726102e,0xff6f0200
	.long	0x000f660c,0x4aaeff70,0x66064aae,0xff746710
	.long	0x41eeff6c,0x61ff0000,0xb88cf22e,0xf080ff6c
	.long	0x06ae0000,0x000cff44,0x41eeff6c,0x61ff0000
	.long	0xb3c21d40,0xff4e0c00,0x0006660a,0x61ff0000
	.long	0xb3221d40,0xff4e422e,0xff53082e,0x0005ff43
	.long	0x6748082e,0x0004ff43,0x662ce9ee,0x0183ff42
	.long	0x61ff0000,0xaeec41ee,0xff7861ff,0x0000b384
	.long	0x1d40ff4f,0x0c000006,0x662061ff,0x0000b2e4
	.long	0x1d40ff4f,0x6014082e,0x0003ff43,0x670c50ee
	.long	0xff53082e,0x0001ff43,0x67c04280,0x102eff63
	.long	0x122eff43,0x0241007f,0xf23c9000,0x00000000
	.long	0xf23c8800,0x00000000,0x41eeff6c,0x43eeff78
	.long	0x223b1530,0x000062ca,0x4ebb1930,0x000062c2
	.long	0x102eff62,0x66404a2e,0xff53660c,0xe9ee0183
	.long	0xff4261ff,0x0000aefa,0x2d6e0006,0xff682d6e
	.long	0xff440006,0xf22ed0c0,0xffdcf22e,0x9c00ff60
	.long	0x4cee0303,0xff9c4e5e,0x08170007,0x66000096
	.long	0x60ffffff,0xee6ec02e,0xff66edc0,0x06086612
	.long	0x082e0004,0xff6667ae,0x082e0001,0xff6267ac
	.long	0x60340480,0x00000018,0x0c000006,0x6610082e
	.long	0x0004ff66,0x6620082e,0x0003ff66,0x66203d7b
	.long	0x0206ff6e,0x601ee002,0xe006e004,0xe005e003
	.long	0xe002e001,0xe0013d7c,0xe005ff6e,0x60063d7c
	.long	0xe003ff6e,0x2d6e0006,0xff682d6e,0xff440006
	.long	0xf22ed0c0,0xffdcf22e,0x9c00ff60,0x4cee0303
	.long	0xff9cf36e,0xff6c4e5e,0x08170007,0x660660ff
	.long	0xffffede0,0x2f173f6f,0x00080004,0x3f7c2024
	.long	0x0006f22f,0xa4000008,0x60ffffff,0xeeb80800
	.long	0x000e6700,0x01c2082e,0x00050004,0x66164e68
	.long	0x2d48ffd8,0x61ff0000,0x9564206e,0xffd84e60
	.long	0x600001aa,0x422eff4a,0x41ee000c,0x2d48ffd8
	.long	0x61ff0000,0x95480c2e,0x0008ff4a,0x67000086
	.long	0x0c2e0004,0xff4a6600,0x0184082e,0x00070004
	.long	0x66363dae,0x00040804,0x2daeff44,0x08063dbc
	.long	0x00f0080a,0x41f60804,0x2d480004,0xf22ed0c0
	.long	0xffdcf22e,0x9c00ff60,0x4cee0303,0xff9c4e5e
	.long	0x2e5f60ff,0xffffed3c,0x3dae0004,0x08002dae
	.long	0xff440802,0x3dbc2024,0x08062dae,0x00060808
	.long	0x41f60800,0x2d480004,0xf22ed0c0,0xffdcf22e
	.long	0x9c00ff60,0x4cee0303,0xff9c4e5e,0x2e5f60ff
	.long	0xffffedf2,0x1d41000a,0x1d40000b,0xf22ed0c0
	.long	0xffdcf22e,0x9c00ff60,0x4cee0303,0xff9c2f16
	.long	0x2f002f01,0x2f2eff44,0x4280102e,0x000b4480
	.long	0x082e0007,0x0004671c,0x3dae0004,0x08002dae
	.long	0x00060808,0x2d9f0802,0x3dbc2024,0x08064876
	.long	0x08006014,0x3dae0004,0x08042d9f,0x08063dbc
	.long	0x00f0080a,0x48760804,0x4281122e,0x000a4a01
	.long	0x6a0cf236,0xf080080c,0x06800000,0x000ce309
	.long	0x6a0cf236,0xf040080c,0x06800000,0x000ce309
	.long	0x6a0cf236,0xf020080c,0x06800000,0x000ce309
	.long	0x6a0cf236,0xf010080c,0x06800000,0x000ce309
	.long	0x6a0cf236,0xf008080c,0x06800000,0x000ce309
	.long	0x6a0cf236,0xf004080c,0x06800000,0x000ce309
	.long	0x6a0cf236,0xf002080c,0x06800000,0x000ce309
	.long	0x6a06f236,0xf001080c,0x222f0004,0x202f0008
	.long	0x2c6f000c,0x2e5f0817,0x000767ff,0xffffec04
	.long	0x60ffffff,0xecf061ff,0x00009bda,0xf22ed0c0
	.long	0xffdcf22e,0x9c00ff60,0x4cee0303,0xff9c082e
	.long	0x00070004,0x660e2d6e,0xff440006,0x4e5e60ff
	.long	0xffffebd0,0x2c563f6f,0x00c400c0,0x2f6f00c6
	.long	0x00c82f6f,0x000400c2,0x3f7c2024,0x00c6dffc
	.long	0x000000c0,0x60ffffff,0xec9c201f,0x4e56ff40
	.long	0x48ee0303,0xff9c2d6e,0x0006ff44,0x206eff44
	.long	0x58aeff44,0x61ffffff,0xed002d40,0xff404a40
	.long	0x6b047010,0x60260800,0x000e6610,0xe9c014c3
	.long	0x700c0c01,0x00076614,0x58806010,0x428061ff
	.long	0x0000967c,0x202eff44,0x90ae0006,0x3d40000a
	.long	0x4cee0303,0xff9c4e5e,0x518f2f00,0x3f6f000c
	.long	0x00042f6f,0x000e0006,0x4280302f,0x00122f6f
	.long	0x00060010,0xd1af0006,0x3f7c402c,0x000a201f
	.long	0x60ffffff,0xebe44e7a,0x08080800,0x0001660c
	.long	0xf22e9c00,0xff60f22e,0xd0c0ffdc,0x4cee0303
	.long	0xff9c4e5e,0x514f2eaf,0x00083f6f,0x000c0004
	.long	0x3f7c4008,0x00062f6f,0x00020008,0x2f7c0942
	.long	0x8001000c,0x08170005,0x670608ef,0x0002000d
	.long	0x60ffffff,0xebd64fee,0xff404e7a,0x18080801
	.long	0x0001660c,0xf22ed0c0,0xffdcf22f,0x9c000020
	.long	0x2c562f6f,0x00c400bc,0x3f6f00c8,0x00c03f7c
	.long	0x400800c2,0x2f4800c4,0x3f4000c8,0x3f7c0001
	.long	0x00ca4cef,0x0303005c,0xdefc00bc,0x60a64e56
	.long	0xff40f32e,0xff6c48ee,0x0303ff9c,0xf22ebc00
	.long	0xff60f22e,0xf0c0ffdc,0x2d6eff68,0xff44206e
	.long	0xff4458ae,0xff4461ff,0xffffebce,0x2d40ff40
	.long	0x0800000d,0x662841ee,0xff6c61ff,0xfffff1ea
	.long	0xf22ed0c0,0xffdcf22e,0x9c00ff60,0x4cee0303
	.long	0xff9cf36e,0xff6c4e5e,0x60ffffff,0xea94322e
	.long	0xff6c0241,0x7fff0c41,0x7fff661a,0x4aaeff74
	.long	0x660c222e,0xff700281,0x7fffffff,0x67082d6e
	.long	0xff70ff54,0x6012223c,0x7fffffff,0x4a2eff6c
	.long	0x6a025281,0x2d41ff54,0xe9c004c3,0x122eff41
	.long	0x307b0206,0x4efb8802,0x006c0000,0x0000ff98
	.long	0x003e0000,0x00100000,0x102eff54,0x0c010007
	.long	0x6f16206e,0x000c61ff,0xffffeb86,0x4a8166ff
	.long	0x0000bca8,0x6000ff6a,0x02410007,0x61ff0000
	.long	0xa8046000,0xff5c302e,0xff540c01,0x00076f16
	.long	0x206e000c,0x61ffffff,0xeb6e4a81,0x66ff0000
	.long	0xbc886000,0xff3c0241,0x000761ff,0x0000a79a
	.long	0x6000ff2e,0x202eff54,0x0c010007,0x6f16206e
	.long	0x000c61ff,0xffffeb56,0x4a8166ff,0x0000bc68
	.long	0x6000ff0e,0x02410007,0x61ff0000,0xa7306000
	.long	0xff004e56,0xff40f32e,0xff6c48ee,0x0303ff9c
	.long	0xf22ebc00,0xff60f22e,0xf0c0ffdc,0x2d6eff68
	.long	0xff44206e,0xff4458ae,0xff4461ff,0xffffea8a
	.long	0x2d40ff40,0x0800000d,0x6600002a,0x41eeff6c
	.long	0x61ffffff,0xf0a4f22e,0xd0c0ffdc,0xf22e9c00
	.long	0xff604cee,0x0303ff9c,0xf36eff6c,0x4e5e60ff
	.long	0xffffe964,0xe9c004c3,0x122eff41,0x307b0206
	.long	0x4efb8802,0x007400a6,0x015a0000,0x00420104
	.long	0x00100000,0x102eff70,0x08c00006,0x0c010007
	.long	0x6f16206e,0x000c61ff,0xffffea76,0x4a8166ff
	.long	0x0000bb98,0x6000ffa0,0x02410007,0x61ff0000
	.long	0xa6f46000,0xff92302e,0xff7008c0,0x000e0c01
	.long	0x00076f16,0x206e000c,0x61ffffff,0xea5a4a81
	.long	0x66ff0000,0xbb746000,0xff6e0241,0x000761ff
	.long	0x0000a686,0x6000ff60,0x202eff70,0x08c0001e
	.long	0x0c010007,0x6f16206e,0x000c61ff,0xffffea3e
	.long	0x4a8166ff,0x0000bb50,0x6000ff3c,0x02410007
	.long	0x61ff0000,0xa6186000,0xff2e0c01,0x00076f2e
	.long	0x202eff6c,0x02808000,0x00000080,0x7fc00000
	.long	0x222eff70,0xe0898081,0x206e000c,0x61ffffff
	.long	0xe9fc4a81,0x66ff0000,0xbb0e6000,0xfefa202e
	.long	0xff6c0280,0x80000000,0x00807fc0,0x00002f01
	.long	0x222eff70,0xe0898081,0x221f0241,0x000761ff
	.long	0x0000a5ba,0x6000fed0,0x202eff6c,0x02808000
	.long	0x00000080,0x7ff80000,0x222eff70,0x2d40ff84
	.long	0x700be0a9,0x83aeff84,0x222eff70,0x02810000
	.long	0x07ffe0b9,0x2d41ff88,0x222eff74,0xe0a983ae
	.long	0xff8841ee,0xff84226e,0x000c7008,0x61ffffff
	.long	0xe8cc4a81,0x66ff0000,0xba9c6000,0xfe7a422e
	.long	0xff4a3d6e,0xff6cff84,0x426eff86,0x202eff70
	.long	0x08c0001e,0x2d40ff88,0x2d6eff74,0xff8c082e
	.long	0x00050004,0x66384e68,0x2d48ffd8,0x2d56ffd4
	.long	0x61ff0000,0x98922248,0x2d48000c,0x206effd8
	.long	0x4e602cae,0xffd441ee,0xff84700c,0x61ffffff
	.long	0xe86c4a81,0x66ff0000,0xba4a6000,0xfe1a2d56
	.long	0xffd461ff,0x00009860,0x22482d48,0x000c2cae
	.long	0xffd40c2e,0x0008ff4a,0x66ccf22e,0xd0c0ffdc
	.long	0xf22e9c00,0xff604cee,0x0303ff9c,0xf36eff6c
	.long	0x2c6effd4,0x2f6f00c4,0x00b82f6f,0x00c800bc
	.long	0x2f6f00cc,0x00c02f6f,0x004400c4,0x2f6f0048
	.long	0x00c82f6f,0x004c00cc,0xdffc0000,0x00b860ff
	.long	0xffffe734,0x4e56ff40,0xf32eff6c,0x48ee0303
	.long	0xff9cf22e,0xbc00ff60,0xf22ef0c0,0xffdc2d6e
	.long	0xff68ff44,0x206eff44,0x58aeff44,0x61ffffff
	.long	0xe7f82d40,0xff400800,0x000d6600,0x0106e9c0
	.long	0x04c36622,0x0c6e401e,0xff6c661a,0xf23c9000
	.long	0x00000000,0xf22e4000,0xff70f22e,0x6800ff6c
	.long	0x3d7ce001,0xff6e41ee,0xff6c61ff,0xffffedea
	.long	0x02ae00ff,0x01ffff64,0xf23c9000,0x00000000
	.long	0xf23c8800,0x00000000,0xe9ee1006,0xff420c01
	.long	0x00176700,0x009641ee,0xff6c61ff,0x0000aa84
	.long	0x1d40ff4e,0x082e0005,0xff43672e,0x082e0004
	.long	0xff436626,0xe9ee0183,0xff4261ff,0x0000a5c2
	.long	0x41eeff78,0x61ff0000,0xaa5a0c00,0x00066606
	.long	0x61ff0000,0xa9be1d40,0xff4f4280,0x102eff63
	.long	0x122eff43,0x0241007f,0x41eeff6c,0x43eeff78
	.long	0x223b1530,0x000059ca,0x4ebb1930,0x000059c2
	.long	0xe9ee0183,0xff4261ff,0x0000a606,0xf22ed0c0
	.long	0xffdcf22e,0x9c00ff60,0x4cee0303,0xff9cf36e
	.long	0xff6c4e5e,0x60ffffff,0xe5cc4280,0x102eff63
	.long	0x122eff43,0x02810000,0x007f61ff,0x000043ce
	.long	0x60be1d7c,0x0000ff4e,0x4280102e,0xff6302ae
	.long	0xffff00ff,0xff6441ee,0xff6c61ff,0x00009be4
	.long	0x60aa4e56,0xff40f32e,0xff6c48ee,0x0303ff9c
	.long	0xf22ebc00,0xff60f22e,0xf0c0ffdc,0x2d6eff68
	.long	0xff44206e,0xff4458ae,0xff4461ff,0xffffe69a
	.long	0x2d40ff40,0x41eeff6c,0x61ffffff,0xecbcf22e
	.long	0xd0c0ffdc,0xf22e9c00,0xff604cee,0x0303ff9c
	.long	0xf36eff6c,0x4e5e60ff,0xffffe592,0x0c6f202c
	.long	0x000667ff,0x000000aa,0x0c6f402c,0x000667ff
	.long	0xffffe5a6,0x4e56ff40,0x48ee0303,0xff9c2d6e
	.long	0x0006ff44,0x206eff44,0x58aeff44,0x61ffffff
	.long	0xe638e9c0,0x100a0c41,0x03c86664,0xe9c01406
	.long	0x0c010017,0x665a4e7a,0x08080800,0x0001672a
	.long	0x4cee0303,0xff9c4e5e,0x518f3eaf,0x00082f6f
	.long	0x000a0002,0x3f7c402c,0x00062f6f,0x0002000c
	.long	0x58af0002,0x60ffffff,0xe5404cee,0x0303ff9c
	.long	0x4e5ef22f,0x84000002,0x58af0002,0x2f172f6f
	.long	0x00080004,0x1f7c0020,0x000660ff,0x00000012
	.long	0x4cee0303,0xff9c4e5e,0x60ffffff,0xe4f64e56
	.long	0xff4048ee,0x0303ff9c,0xf22ebc00,0xff60f22e
	.long	0xf0c0ffdc,0x082e0005,0x00046608,0x4e682d48
	.long	0xffd8600c,0x41ee0010,0x2d48ffd8,0x2d48ffd4
	.long	0x2d6eff68,0xff44206e,0xff4458ae,0xff4461ff
	.long	0xffffe576,0x2d40ff40,0xf23c9000,0x00000000
	.long	0xf23c8800,0x00000000,0x422eff4a,0x08000016
	.long	0x66000182,0x422eff53,0x02ae00ff,0x00ffff64
	.long	0xe9c01406,0x0c010017,0x670000be,0x61ff0000
	.long	0x95fc4280,0x102eff63,0x122eff43,0x0241003f
	.long	0xe749822e,0xff4e43ee,0xff7841ee,0xff6c323b
	.long	0x132002b2,0x4ebb1120,0x02ac102e,0xff626600
	.long	0x00a2e9ee,0x0183ff42,0x61ff0000,0xa3e4f22e
	.long	0xd0c0ffdc,0xf22e9c00,0xff604cee,0x0303ff9c
	.long	0x0c2e0004,0xff4a672a,0x0c2e0008,0xff4a6722
	.long	0x4e5e0817,0x000767ff,0xffffe358,0xf327f22f
	.long	0xa4000014,0xf35f3f7c,0x20240006,0x60ffffff
	.long	0xe434082e,0x00050004,0x660c2f08,0x206effd8
	.long	0x4e60205f,0x60ca2f00,0x202effd8,0x90aeffd4
	.long	0x2dae0008,0x08082dae,0x00040804,0x3d400004
	.long	0x201f4e5e,0xded760aa,0x4280102e,0xff63122e
	.long	0xff430281,0x0000007f,0x61ff0000,0x41506000
	.long	0xff5ac02e,0xff66edc0,0x06086616,0x082e0004
	.long	0xff666700,0xff4e082e,0x0001ff62,0x6700ff44
	.long	0x603e0480,0x00000018,0x0c000006,0x6610082e
	.long	0x0004ff66,0x662a082e,0x0003ff66,0x66302f00
	.long	0x61ffffff,0xf1ee201f,0x3d7b0206,0xff6e602a
	.long	0xe002e006,0xe004e005,0xe003e002,0xe001e001
	.long	0x61ffffff,0xf1ce3d7c,0xe005ff6e,0x600c61ff
	.long	0xfffff1c0,0x3d7ce003,0xff6ef22e,0xd0c0ffdc
	.long	0xf22e9c00,0xff604cee,0x0303ff9c,0xf36eff6c
	.long	0x6000feee,0xe9c01283,0x0c010001,0x67000056
	.long	0x0c010007,0x66000078,0xe9c01343,0x0c010002
	.long	0x6d00006c,0x61ff0000,0x82780c2e,0x0002ff4a
	.long	0x670000d2,0x0c2e0001,0xff4a6600,0x01002d6e
	.long	0xff68000c,0x3d7c201c,0x000af22e,0xd0c0ffdc
	.long	0xf22e9c00,0xff604cee,0x0303ff9c,0x4e5e60ff
	.long	0xffffe2dc,0x206eff44,0x54aeff44,0x61ffffff
	.long	0xe3524a81,0x6600047c,0x48c061ff,0x00007e60
	.long	0x0c2e0002,0xff4a6700,0x007c6000,0x00b061ff
	.long	0x00008562,0x0c2e0002,0xff4a6700,0x0068082e
	.long	0x00050004,0x660a206e,0xffd84e60,0x6000008e
	.long	0x0c2e0008,0xff4a6600,0x0084f22e,0xd0c0ffdc
	.long	0xf22e9c00,0xff604cee,0x0303ff9c,0x4e5e0817
	.long	0x00076612,0x558f2eaf,0x00022f6f,0x00060004
	.long	0x60ffffff,0xe17e558f,0x2eaf0002,0x3f6f0006
	.long	0x00043f7c,0x20240006,0xf22fa400,0x000860ff
	.long	0xffffe252,0x3d7c00c0,0x000e2d6e,0xff68000a
	.long	0x3d6e0004,0x00083d7c,0xe000ff6e,0xf22ed0c0
	.long	0xffdcf22e,0x9c00ff60,0x4cee0303,0xff9cf36e
	.long	0xff6c4e5e,0x588f60ff,0xffffe180,0xf22ed0c0
	.long	0xffdcf22e,0x9c00ff60,0x4cee0303,0xff9c4e5e
	.long	0x08170007,0x660660ff,0xffffe108,0xf22fa400
	.long	0x00081f7c,0x00240007,0x60ffffff,0xe1e84afc
	.long	0x01c00000,0x00000000,0x00000000,0x00000000
	.long	0x00000000,0x00000000,0x00000000,0x00000000
	.long	0x000028a4,0x4b1e4b4c,0x4f4c2982,0x4f3c0000
	.long	0x00000000,0x00000000,0x00000000,0x00000000
	.long	0x00000000,0x00000000,0x00000000,0x00000000
	.long	0x00000000,0x00000000,0x00000000,0x00000000
	.long	0x000035c6,0x4b1e4b82,0x4f4c371a,0x4f3c0000
	.long	0x00000000,0x00000000,0x00000000,0x00000000
	.long	0x000024b0,0x4b1e4b8c,0x4f4c2766,0x4f3c0000
	.long	0x00002988,0x4b1e4b94,0x4f4c2af0,0x4f3c0000
	.long	0x00001ab8,0x4b1e4bd0,0x4f4c1cf6,0x4f3c0000
	.long	0x00000000,0x00000000,0x00000000,0x00000000
	.long	0x00001cfc,0x4b1e4744,0x4f4c1daa,0x4f3c0000
	.long	0x00003720,0x4b1e4744,0x4f4c37a2,0x4f3c0000
	.long	0x00000468,0x4b1e4744,0x4f4c064c,0x4f3c0000
	.long	0x00000f2a,0x4b1e4744,0x4f4c108e,0x4f3c0000
	.long	0x000022e0,0x4b9a4b7a,0x4f4c248c,0x4f3c0000
	.long	0x00003d02,0x4b9a4b7a,0x4f4c3ddc,0x4f3c0000
	.long	0x00003dfa,0x4b9a4b7a,0x4f4c3f2a,0x4f3c0000
	.long	0x00000000,0x00000000,0x00000000,0x00000000
	.long	0x00003386,0x47324b82,0x4f4c3538,0x4f3c0000
	.long	0x000037c8,0x47324b82,0x4f4c37f8,0x4f3c0000
	.long	0x00003818,0x47324b82,0x4f4c3872,0x4f3c0000
	.long	0x00000000,0x00000000,0x00000000,0x00000000
	.long	0x00000000,0x00000000,0x00000000,0x00000000
	.long	0x000027e6,0x4b9a4b52,0x4f4c288a,0x4f3c0000
	.long	0x00000000,0x00000000,0x00000000,0x00000000
	.long	0x00000000,0x00000000,0x00000000,0x00000000
	.long	0x00001db0,0x4bd64744,0x4f4c1e40,0x4f3c0000
	.long	0x00000472,0x4b9a4744,0x4f4c0652,0x4f3c0000
	.long	0x0000276c,0x4b1e4744,0x4f4c2788,0x4f3c0000
	.long	0x000027a0,0x4b1e4744,0x4f4c27ce,0x4f3c0000
	.long	0x00000000,0x00000000,0x00000000,0x00000000
	.long	0x00004ca4,0x4cda4d12,0x4ee24ca4,0x4ef40000
	.long	0x00000000,0x00000000,0x00000000,0x00000000
	.long	0x00000000,0x00000000,0x00000000,0x00000000
	.long	0x00000000,0x00000000,0x00000000,0x00000000
	.long	0x00004dac,0x4de24e1a,0x4ee24dac,0x4ef40000
	.long	0x00004e4e,0x4e864ebe,0x4ee24e4e,0x4ef40000
	.long	0x00000000,0x00000000,0x00000000,0x00000000
	.long	0x00000000,0x00000000,0x00000000,0x00000000
	.long	0x00000000,0x00000000,0x00000000,0x00000000
	.long	0x00000000,0x00000000,0x00000000,0x00000000
	.long	0x00000000,0x00000000,0x00000000,0x00000000
	.long	0x00000000,0x00000000,0x00000000,0x00000000
	.long	0x00000000,0x00000000,0x00000000,0x00000000
	.long	0x00000000,0x00000000,0x00000000,0x00000000
	.long	0x00000000,0x00000000,0x00000000,0x00000000
	.long	0x00000660,0x4bf24c20,0x4c3008f6,0x4c400000
	.long	0x00000660,0x4bf24c20,0x4c3008f6,0x4c400000
	.long	0x00000660,0x4bf24c20,0x4c3008f6,0x4c400000
	.long	0x00000660,0x4bf24c20,0x4c3008f6,0x4c400000
	.long	0x00000660,0x4bf24c20,0x4c3008f6,0x4c400000
	.long	0x00000660,0x4bf24c20,0x4c3008f6,0x4c400000
	.long	0x00000660,0x4bf24c20,0x4c3008f6,0x4c400000
	.long	0x00000660,0x4bf24c20,0x4c3008f6,0x4c400000
	.long	0x00004cee,0x0303ff9c,0xf22e9c00,0xff60f22e
	.long	0xd0c0ffdc,0x2d6eff68,0x00064e5e,0x2f173f6f
	.long	0x00080004,0x3f7c4008,0x00062f6f,0x00020008
	.long	0x2f7c0942,0x8001000c,0x08170005,0x670608ef
	.long	0x0002000d,0x60ffffff,0xde32bd6a,0xaa77ccc9
	.long	0x94f53de6,0x12097aae,0x8da1be5a,0xe6452a11
	.long	0x8ae43ec7,0x1de3a534,0x1531bf2a,0x01a01a01
	.long	0x8b590000,0x00000000,0x00003ff8,0x00008888
	.long	0x88888888,0x59af0000,0x0000bffc,0x0000aaaa
	.long	0xaaaaaaaa,0xaa990000,0x00003d2a,0xc4d0d601
	.long	0x1ee3bda9,0x396f9f45,0xac193e21,0xeed90612
	.long	0xc972be92,0x7e4fb79d,0x9fcf3efa,0x01a01a01
	.long	0xd4230000,0x00000000,0x0000bff5,0x0000b60b
	.long	0x60b60b61,0xd4380000,0x00003ffa,0x0000aaaa
	.long	0xaaaaaaaa,0xab5ebf00,0x00002d7c,0x00000000
	.long	0xff5c6008,0x2d7c0000,0x0001ff5c,0xf2104800
	.long	0xf22e6800,0xff842210,0x32280004,0x02817fff
	.long	0xffff0c81,0x3fd78000,0x6c046000,0x01780c81
	.long	0x4004bc7e,0x6d046000,0x0468f200,0x0080f23a
	.long	0x54a3de7e,0x43fb0170,0x00000866,0xf22e6080
	.long	0xff58222e,0xff58e981,0xd3c1f219,0x4828f211
	.long	0x4428222e,0xff58d2ae,0xff5ce299,0x0c810000
	.long	0x00006d00,0x0088f227,0xe00cf22e,0x6800ff84
	.long	0xf2000023,0xf23a5580,0xfed2f23a,0x5500fed4
	.long	0xf2000080,0xf20004a3,0xe2990281,0x80000000
	.long	0xb3aeff84,0xf20005a3,0xf2000523,0xf23a55a2
	.long	0xfebaf23a,0x5522febc,0xf20005a3,0xf2000523
	.long	0xf23a55a2,0xfeb6f23a,0x4922fec0,0xf2000ca3
	.long	0xf2000123,0xf23a48a2,0xfec2f22e,0x4823ff84
	.long	0xf20008a2,0xf2000423,0xf21fd030,0xf2009000
	.long	0xf22e4822,0xff8460ff,0x00004364,0xf227e00c
	.long	0xf2000023,0xf23a5500,0xfea2f23a,0x5580fea4
	.long	0xf2000080,0xf20004a3,0xf22e6800,0xff84e299
	.long	0x02818000,0x0000f200,0x0523b3ae,0xff840281
	.long	0x80000000,0xf20005a3,0x00813f80,0x00002d41
	.long	0xff54f23a,0x5522fe74,0xf23a55a2,0xfe76f200
	.long	0x0523f200,0x05a3f23a,0x5522fe70,0xf23a49a2
	.long	0xfe7af200,0x0523f200,0x0ca3f23a,0x4922fe7c
	.long	0xf23a44a2,0xfe82f200,0x0823f200,0x0422f22e
	.long	0x4823ff84,0xf21fd030,0xf2009000,0xf22e4422
	.long	0xff5460ff,0x000042c8,0x0c813fff,0x80006eff
	.long	0x00000300,0x222eff5c,0x0c810000,0x00006e14
	.long	0xf2009000,0x123c0003,0xf22e4800,0xff8460ff
	.long	0x0000428e,0xf23c4400,0x3f800000,0xf2009000
	.long	0xf23c4422,0x80800000,0x60ff0000,0x428a60ff
	.long	0x00004110,0xf23c4400,0x3f800000,0x60ff0000
	.long	0x42762d7c,0x00000004,0xff5cf210,0x4800f22e
	.long	0x6800ff84,0x22103228,0x00040281,0x7fffffff
	.long	0x0c813fd7,0x80006c04,0x60000240,0x0c814004
	.long	0xbc7e6d04,0x6000027a,0xf2000080,0xf23a54a3
	.long	0xdc9043fb,0x01700000,0x0678f22e,0x6080ff58
	.long	0x222eff58,0xe981d3c1,0xf2194828,0xf2114428
	.long	0x222eff58,0xe2990c81,0x00000000,0x6c000106
	.long	0xf227e004,0xf22e6800,0xff84f200,0x0023f23a
	.long	0x5480fce8,0xf23a5500,0xfd32f200,0x00a3f200
	.long	0x01232f02,0x2401e29a,0x02828000,0x0000b382
	.long	0x02828000,0x0000f23a,0x54a2fcc8,0xf23a5522
	.long	0xfd12f200,0x00a3b5ae,0xff84241f,0xf2000123
	.long	0xe2990281,0x80000000,0x2d7c3f80,0x0000ff54
	.long	0xb3aeff54,0xf23a54a2,0xfca2f23a,0x5522fcec
	.long	0xf20000a3,0xf2000123,0xf22e6800,0xff90f23a
	.long	0x54a2fc90,0xb3aeff90,0xf23a5522,0xfcd6f200
	.long	0x00a3f200,0x0123f23a,0x54a2fc80,0xf23a5522
	.long	0xfccaf200,0x00a3f200,0x0123f23a,0x48a2fc7c
	.long	0xf23a4922,0xfcc6f200,0x00a3f200,0x0123f23a
	.long	0x48a2fc78,0xf23a4922,0xfcc2f200,0x00a3f200
	.long	0x0823f22e,0x48a3ff84,0xf23a4422,0xfcbaf22e
	.long	0x4823ff90,0xf21fd020,0xf2009000,0xf22e48a2
	.long	0xff8461ff,0x0000448e,0xf22e4422,0xff5460ff
	.long	0x000040fc,0xf227e004,0xf22e6800,0xff84f200
	.long	0x0023f23a,0x5480fc34,0xf23a5500,0xfbdef200
	.long	0x00a3f22e,0x6800ff90,0xf2000123,0xe2990281
	.long	0x80000000,0xf23a54a2,0xfc1af23a,0x5522fbc4
	.long	0xb3aeff84,0xb3aeff90,0xf20000a3,0x00813f80
	.long	0x00002d41,0xff54f200,0x0123f23a,0x54a2fbfc
	.long	0xf23a5522,0xfba6f200,0x00a3f200,0x0123f23a
	.long	0x54a2fbf0,0xf23a5522,0xfb9af200,0x00a3f200
	.long	0x0123f23a,0x54a2fbe4,0xf23a5522,0xfb8ef200
	.long	0x00a3f200,0x0123f23a,0x48a2fbe0,0xf23a4922
	.long	0xfb8af200,0x00a3f200,0x0123f23a,0x48a2fbdc
	.long	0xf23a4922,0xfb86f200,0x00a3f200,0x0823f23a
	.long	0x44a2fbd4,0xf22e4823,0xff84f22e,0x48a3ff90
	.long	0xf21fd020,0xf2009000,0xf22e44a2,0xff5461ff
	.long	0x000043a2,0xf22e4822,0xff8460ff,0x00004010
	.long	0x0c813fff,0x80006e00,0x0048f23c,0x44803f80
	.long	0x0000f200,0x9000f23c,0x44a80080,0x000061ff
	.long	0x00004372,0xf200b000,0x123c0003,0xf22e4800
	.long	0xff8460ff,0x00003fca,0x2f00f23c,0x44803f80
	.long	0x000061ff,0x0000434e,0x201f60ff,0x00003e54
	.long	0xf227e03c,0x2f02f23c,0x44800000,0x00000c81
	.long	0x7ffeffff,0x66523d7c,0x7ffeff84,0x2d7cc90f
	.long	0xdaa2ff88,0x42aeff8c,0x3d7c7fdc,0xff902d7c
	.long	0x85a308d3,0xff9442ae,0xff98f200,0x003af294
	.long	0x000e002e,0x0080ff84,0x002e0080,0xff90f22e
	.long	0x4822ff84,0xf2000080,0xf22e4822,0xff90f200
	.long	0x00a8f22e,0x48a2ff90,0xf22e6800,0xff84322e
	.long	0xff842241,0x02810000,0x7fff0481,0x00003fff
	.long	0x0c810000,0x001c6f0e,0x04810000,0x001b1d7c
	.long	0x0000ff58,0x60084281,0x1d7c0001,0xff58243c
	.long	0x00003ffe,0x94812d7c,0xa2f9836e,0xff882d7c
	.long	0x4e44152a,0xff8c3d42,0xff84f200,0x0100f22e
	.long	0x4923ff84,0x24094842,0x02828000,0x00000082
	.long	0x5f000000,0x2d42ff54,0xf22e4522,0xff54f22e
	.long	0x4528ff54,0x24010682,0x00003fff,0x3d42ff84
	.long	0x2d7cc90f,0xdaa2ff88,0x42aeff8c,0x06810000
	.long	0x3fdd3d41,0xff902d7c,0x85a308d3,0xff9442ae
	.long	0xff98122e,0xff58f200,0x0a00f22e,0x4a23ff84
	.long	0xf2000a80,0xf22e4aa3,0xff90f200,0x1180f200
	.long	0x15a2f200,0x0e28f200,0x0c28f200,0x1622f200
	.long	0x0180f200,0x10a8f200,0x04220c01,0x00006e00
	.long	0x000ef200,0x01a8f200,0x0ca26000,0xff0cf22e
	.long	0x6100ff58,0x241ff21f,0xd03c222e,0xff5c0c81
	.long	0x00000004,0x6d00fa4c,0x6000fc36,0x3ea0b759
	.long	0xf50f8688,0xbef2baa5,0xa8924f04,0xbf346f59
	.long	0xb39ba65f,0x00000000,0x00000000,0x3ff60000
	.long	0xe073d3fc,0x199c4a00,0x00000000,0x3ff90000
	.long	0xd23cd684,0x15d95fa1,0x00000000,0xbffc0000
	.long	0x8895a6c5,0xfb423bca,0x00000000,0xbffd0000
	.long	0xeef57e0d,0xa84bc8ce,0x00000000,0x3ffc0000
	.long	0xa2f9836e,0x4e44152a,0x00000000,0x40010000
	.long	0xc90fdaa2,0x00000000,0x00000000,0x3fdf0000
	.long	0x85a308d4,0x00000000,0x00000000,0xc0040000
	.long	0xc90fdaa2,0x2168c235,0x21800000,0xc0040000
	.long	0xc2c75bcd,0x105d7c23,0xa0d00000,0xc0040000
	.long	0xbc7edcf7,0xff523611,0xa1e80000,0xc0040000
	.long	0xb6365e22,0xee46f000,0x21480000,0xc0040000
	.long	0xafeddf4d,0xdd3ba9ee,0xa1200000,0xc0040000
	.long	0xa9a56078,0xcc3063dd,0x21fc0000,0xc0040000
	.long	0xa35ce1a3,0xbb251dcb,0x21100000,0xc0040000
	.long	0x9d1462ce,0xaa19d7b9,0xa1580000,0xc0040000
	.long	0x96cbe3f9,0x990e91a8,0x21e00000,0xc0040000
	.long	0x90836524,0x88034b96,0x20b00000,0xc0040000
	.long	0x8a3ae64f,0x76f80584,0xa1880000,0xc0040000
	.long	0x83f2677a,0x65ecbf73,0x21c40000,0xc0030000
	.long	0xfb53d14a,0xa9c2f2c2,0x20000000,0xc0030000
	.long	0xeec2d3a0,0x87ac669f,0x21380000,0xc0030000
	.long	0xe231d5f6,0x6595da7b,0xa1300000,0xc0030000
	.long	0xd5a0d84c,0x437f4e58,0x9fc00000,0xc0030000
	.long	0xc90fdaa2,0x2168c235,0x21000000,0xc0030000
	.long	0xbc7edcf7,0xff523611,0xa1680000,0xc0030000
	.long	0xafeddf4d,0xdd3ba9ee,0xa0a00000,0xc0030000
	.long	0xa35ce1a3,0xbb251dcb,0x20900000,0xc0030000
	.long	0x96cbe3f9,0x990e91a8,0x21600000,0xc0030000
	.long	0x8a3ae64f,0x76f80584,0xa1080000,0xc0020000
	.long	0xfb53d14a,0xa9c2f2c2,0x1f800000,0xc0020000
	.long	0xe231d5f6,0x6595da7b,0xa0b00000,0xc0020000
	.long	0xc90fdaa2,0x2168c235,0x20800000,0xc0020000
	.long	0xafeddf4d,0xdd3ba9ee,0xa0200000,0xc0020000
	.long	0x96cbe3f9,0x990e91a8,0x20e00000,0xc0010000
	.long	0xfb53d14a,0xa9c2f2c2,0x1f000000,0xc0010000
	.long	0xc90fdaa2,0x2168c235,0x20000000,0xc0010000
	.long	0x96cbe3f9,0x990e91a8,0x20600000,0xc0000000
	.long	0xc90fdaa2,0x2168c235,0x1f800000,0xbfff0000
	.long	0xc90fdaa2,0x2168c235,0x1f000000,0x00000000
	.long	0x00000000,0x00000000,0x00000000,0x3fff0000
	.long	0xc90fdaa2,0x2168c235,0x9f000000,0x40000000
	.long	0xc90fdaa2,0x2168c235,0x9f800000,0x40010000
	.long	0x96cbe3f9,0x990e91a8,0xa0600000,0x40010000
	.long	0xc90fdaa2,0x2168c235,0xa0000000,0x40010000
	.long	0xfb53d14a,0xa9c2f2c2,0x9f000000,0x40020000
	.long	0x96cbe3f9,0x990e91a8,0xa0e00000,0x40020000
	.long	0xafeddf4d,0xdd3ba9ee,0x20200000,0x40020000
	.long	0xc90fdaa2,0x2168c235,0xa0800000,0x40020000
	.long	0xe231d5f6,0x6595da7b,0x20b00000,0x40020000
	.long	0xfb53d14a,0xa9c2f2c2,0x9f800000,0x40030000
	.long	0x8a3ae64f,0x76f80584,0x21080000,0x40030000
	.long	0x96cbe3f9,0x990e91a8,0xa1600000,0x40030000
	.long	0xa35ce1a3,0xbb251dcb,0xa0900000,0x40030000
	.long	0xafeddf4d,0xdd3ba9ee,0x20a00000,0x40030000
	.long	0xbc7edcf7,0xff523611,0x21680000,0x40030000
	.long	0xc90fdaa2,0x2168c235,0xa1000000,0x40030000
	.long	0xd5a0d84c,0x437f4e58,0x1fc00000,0x40030000
	.long	0xe231d5f6,0x6595da7b,0x21300000,0x40030000
	.long	0xeec2d3a0,0x87ac669f,0xa1380000,0x40030000
	.long	0xfb53d14a,0xa9c2f2c2,0xa0000000,0x40040000
	.long	0x83f2677a,0x65ecbf73,0xa1c40000,0x40040000
	.long	0x8a3ae64f,0x76f80584,0x21880000,0x40040000
	.long	0x90836524,0x88034b96,0xa0b00000,0x40040000
	.long	0x96cbe3f9,0x990e91a8,0xa1e00000,0x40040000
	.long	0x9d1462ce,0xaa19d7b9,0x21580000,0x40040000
	.long	0xa35ce1a3,0xbb251dcb,0xa1100000,0x40040000
	.long	0xa9a56078,0xcc3063dd,0xa1fc0000,0x40040000
	.long	0xafeddf4d,0xdd3ba9ee,0x21200000,0x40040000
	.long	0xb6365e22,0xee46f000,0xa1480000,0x40040000
	.long	0xbc7edcf7,0xff523611,0x21e80000,0x40040000
	.long	0xc2c75bcd,0x105d7c23,0x20d00000,0x40040000
	.long	0xc90fdaa2,0x2168c235,0xa1800000,0xf2104800
	.long	0x22103228,0x00040281,0x7fffffff,0x0c813fd7
	.long	0x80006c04,0x60000134,0x0c814004,0xbc7e6d04
	.long	0x60000144,0xf2000080,0xf23a54a3,0xd3d443fa
	.long	0xfdbcf201,0x6080e981,0xd3c1f219,0x4828f211
	.long	0x4428ea99,0x02818000,0x0000f227,0xe00c0c81
	.long	0x00000000,0x6d000072,0xf2000080,0xf20004a3
	.long	0xf23a5580,0xfaf8f23a,0x5500fafa,0xf20005a3
	.long	0xf2000523,0xf23a55a2,0xfaf4f23a,0x4922fafe
	.long	0xf20005a3,0xf2000523,0xf23a49a2,0xfb00f23a
	.long	0x4922fb0a,0xf20005a3,0xf2000523,0xf23a49a2
	.long	0xfb0cf200,0x0123f200,0x0ca3f200,0x0822f23c
	.long	0x44a23f80,0x0000f21f,0xd030f200,0x9000f200
	.long	0x042060ff,0x000038d8,0xf2000080,0xf2000023
	.long	0xf23a5580,0xfa88f23a,0x5500fa8a,0xf20001a3
	.long	0xf2000123,0xf23a55a2,0xfa84f23a,0x4922fa8e
	.long	0xf20001a3,0xf2000123,0xf23a49a2,0xfa90f23a
	.long	0x4922fa9a,0xf20001a3,0xf2000123,0xf23a49a2
	.long	0xfa9cf200,0x0523f200,0x0c23f200,0x08a2f23c
	.long	0x44223f80,0x0000f21f,0xd030f227,0x68800a97
	.long	0x80000000,0xf2009000,0xf21f4820,0x60ff0000
	.long	0x385e0c81,0x3fff8000,0x6e1cf227,0x6800f200
	.long	0x9000123c,0x0003f21f,0x480060ff,0x00003832
	.long	0x60ff0000,0x36cef227,0xe03c2f02,0xf23c4480
	.long	0x00000000,0x0c817ffe,0xffff6652,0x3d7c7ffe
	.long	0xff842d7c,0xc90fdaa2,0xff8842ae,0xff8c3d7c
	.long	0x7fdcff90,0x2d7c85a3,0x08d3ff94,0x42aeff98
	.long	0xf200003a,0xf294000e,0x002e0080,0xff84002e
	.long	0x0080ff90,0xf22e4822,0xff84f200,0x0080f22e
	.long	0x4822ff90,0xf20000a8,0xf22e48a2,0xff90f22e
	.long	0x6800ff84,0x322eff84,0x22410281,0x00007fff
	.long	0x04810000,0x3fff0c81,0x0000001c,0x6f0e0481
	.long	0x0000001b,0x1d7c0000,0xff586008,0x42811d7c
	.long	0x0001ff58,0x243c0000,0x3ffe9481,0x2d7ca2f9
	.long	0x836eff88,0x2d7c4e44,0x152aff8c,0x3d42ff84
	.long	0xf2000100,0xf22e4923,0xff842409,0x48420282
	.long	0x80000000,0x00825f00,0x00002d42,0xff54f22e
	.long	0x4522ff54,0xf22e4528,0xff542401,0x06820000
	.long	0x3fff3d42,0xff842d7c,0xc90fdaa2,0xff8842ae
	.long	0xff8c0681,0x00003fdd,0x3d41ff90,0x2d7c85a3
	.long	0x08d3ff94,0x42aeff98,0x122eff58,0xf2000a00
	.long	0xf22e4a23,0xff84f200,0x0a80f22e,0x4aa3ff90
	.long	0xf2001180,0xf20015a2,0xf2000e28,0xf2000c28
	.long	0xf2001622,0xf2000180,0xf20010a8,0xf2000422
	.long	0x0c010000,0x6e00000e,0xf20001a8,0xf2000ca2
	.long	0x6000ff0c,0xf22e6100,0xff54241f,0xf21fd03c
	.long	0x222eff54,0xe2996000,0xfd72bff6,0x687e3149
	.long	0x87d84002,0xac6934a2,0x6db3bfc2,0x476f4e1d
	.long	0xa28e3fb3,0x44447f87,0x6989bfb7,0x44ee7faf
	.long	0x45db3fbc,0x71c64694,0x0220bfc2,0x49249218
	.long	0x72f93fc9,0x99999999,0x8fa9bfd5,0x55555555
	.long	0x5555bfb7,0x0bf39853,0x9e6a3fbc,0x7187962d
	.long	0x1d7dbfc2,0x49248271,0x07b83fc9,0x99999996
	.long	0x263ebfd5,0x55555555,0x55363fff,0x0000c90f
	.long	0xdaa22168,0xc2350000,0x0000bfff,0x0000c90f
	.long	0xdaa22168,0xc2350000,0x00000001,0x00008000
	.long	0x00000000,0x00000000,0x00008001,0x00008000
	.long	0x00000000,0x00000000,0x00003ffb,0x000083d1
	.long	0x52c5060b,0x7a510000,0x00003ffb,0x00008bc8
	.long	0x54456549,0x8b8b0000,0x00003ffb,0x000093be
	.long	0x40601762,0x6b0d0000,0x00003ffb,0x00009bb3
	.long	0x078d35ae,0xc2020000,0x00003ffb,0x0000a3a6
	.long	0x9a525ddc,0xe7de0000,0x00003ffb,0x0000ab98
	.long	0xe9436276,0x56190000,0x00003ffb,0x0000b389
	.long	0xe502f9c5,0x98620000,0x00003ffb,0x0000bb79
	.long	0x7e436b09,0xe6fb0000,0x00003ffb,0x0000c367
	.long	0xa5c739e5,0xf4460000,0x00003ffb,0x0000cb54
	.long	0x4c61cff7,0xd5c60000,0x00003ffb,0x0000d33f
	.long	0x62f82488,0x533e0000,0x00003ffb,0x0000db28
	.long	0xda816240,0x4c770000,0x00003ffb,0x0000e310
	.long	0xa4078ad3,0x4f180000,0x00003ffb,0x0000eaf6
	.long	0xb0a8188e,0xe1eb0000,0x00003ffb,0x0000f2da
	.long	0xf1949dbe,0x79d50000,0x00003ffb,0x0000fabd
	.long	0x581361d4,0x7e3e0000,0x00003ffc,0x00008346
	.long	0xac210959,0xecc40000,0x00003ffc,0x00008b23
	.long	0x2a083042,0x82d80000,0x00003ffc,0x000092fb
	.long	0x70b8d29a,0xe2f90000,0x00003ffc,0x00009acf
	.long	0x476f5ccd,0x1cb40000,0x00003ffc,0x0000a29e
	.long	0x76304954,0xf23f0000,0x00003ffc,0x0000aa68
	.long	0xc5d08ab8,0x52300000,0x00003ffc,0x0000b22d
	.long	0xfffd9d53,0x9f830000,0x00003ffc,0x0000b9ed
	.long	0xef453e90,0x0ea50000,0x00003ffc,0x0000c1a8
	.long	0x5f1cc75e,0x3ea50000,0x00003ffc,0x0000c95d
	.long	0x1be82813,0x8de60000,0x00003ffc,0x0000d10b
	.long	0xf300840d,0x2de40000,0x00003ffc,0x0000d8b4
	.long	0xb2ba6bc0,0x5e7a0000,0x00003ffc,0x0000e057
	.long	0x2a6bb423,0x35f60000,0x00003ffc,0x0000e7f3
	.long	0x2a70ea9c,0xaa8f0000,0x00003ffc,0x0000ef88
	.long	0x843264ec,0xefaa0000,0x00003ffc,0x0000f717
	.long	0x0a28ecc0,0x66660000,0x00003ffd,0x0000812f
	.long	0xd288332d,0xad320000,0x00003ffd,0x000088a8
	.long	0xd1b1218e,0x4d640000,0x00003ffd,0x00009012
	.long	0xab3f23e4,0xaee80000,0x00003ffd,0x0000976c
	.long	0xc3d411e7,0xf1b90000,0x00003ffd,0x00009eb6
	.long	0x89493889,0xa2270000,0x00003ffd,0x0000a5ef
	.long	0x72c34487,0x361b0000,0x00003ffd,0x0000ad17
	.long	0x00baf07a,0x72270000,0x00003ffd,0x0000b42c
	.long	0xbcfafd37,0xefb70000,0x00003ffd,0x0000bb30
	.long	0x3a940ba8,0x0f890000,0x00003ffd,0x0000c221
	.long	0x15c6fcae,0xbbaf0000,0x00003ffd,0x0000c8fe
	.long	0xf3e68633,0x12210000,0x00003ffd,0x0000cfc9
	.long	0x8330b400,0x0c700000,0x00003ffd,0x0000d680
	.long	0x7aa1102c,0x5bf90000,0x00003ffd,0x0000dd23
	.long	0x99bc3125,0x2aa30000,0x00003ffd,0x0000e3b2
	.long	0xa8556b8f,0xc5170000,0x00003ffd,0x0000ea2d
	.long	0x764f6431,0x59890000,0x00003ffd,0x0000f3bf
	.long	0x5bf8bad1,0xa21d0000,0x00003ffe,0x0000801c
	.long	0xe39e0d20,0x5c9a0000,0x00003ffe,0x00008630
	.long	0xa2dada1e,0xd0660000,0x00003ffe,0x00008c1a
	.long	0xd445f3e0,0x9b8c0000,0x00003ffe,0x000091db
	.long	0x8f1664f3,0x50e20000,0x00003ffe,0x00009773
	.long	0x1420365e,0x538c0000,0x00003ffe,0x00009ce1
	.long	0xc8e6a0b8,0xcdba0000,0x00003ffe,0x0000a228
	.long	0x32dbcada,0xae090000,0x00003ffe,0x0000a746
	.long	0xf2ddb760,0x22940000,0x00003ffe,0x0000ac3e
	.long	0xc0fb997d,0xd6a20000,0x00003ffe,0x0000b110
	.long	0x688aebdc,0x6f6a0000,0x00003ffe,0x0000b5bc
	.long	0xc49059ec,0xc4b00000,0x00003ffe,0x0000ba44
	.long	0xbc7dd470,0x782f0000,0x00003ffe,0x0000bea9
	.long	0x4144fd04,0x9aac0000,0x00003ffe,0x0000c2eb
	.long	0x4abb6616,0x28b60000,0x00003ffe,0x0000c70b
	.long	0xd54ce602,0xee140000,0x00003ffe,0x0000cd00
	.long	0x0549adec,0x71590000,0x00003ffe,0x0000d484
	.long	0x57d2d8ea,0x4ea30000,0x00003ffe,0x0000db94
	.long	0x8da712de,0xce3b0000,0x00003ffe,0x0000e238
	.long	0x55f969e8,0x096a0000,0x00003ffe,0x0000e877
	.long	0x1129c435,0x32590000,0x00003ffe,0x0000ee57
	.long	0xc16e0d37,0x9c0d0000,0x00003ffe,0x0000f3e1
	.long	0x0211a87c,0x37790000,0x00003ffe,0x0000f919
	.long	0x039d758b,0x8d410000,0x00003ffe,0x0000fe05
	.long	0x8b8f6493,0x5fb30000,0x00003fff,0x00008155
	.long	0xfb497b68,0x5d040000,0x00003fff,0x00008388
	.long	0x9e3549d1,0x08e10000,0x00003fff,0x0000859c
	.long	0xfa76511d,0x724b0000,0x00003fff,0x00008795
	.long	0x2ecfff81,0x31e70000,0x00003fff,0x00008973
	.long	0x2fd19557,0x641b0000,0x00003fff,0x00008b38
	.long	0xcad10193,0x2a350000,0x00003fff,0x00008ce7
	.long	0xa8d8301e,0xe6b50000,0x00003fff,0x00008f46
	.long	0xa39e2eae,0x52810000,0x00003fff,0x0000922d
	.long	0xa7d79188,0x84870000,0x00003fff,0x000094d1
	.long	0x9fcbdedf,0x52410000,0x00003fff,0x0000973a
	.long	0xb94419d2,0xa08b0000,0x00003fff,0x0000996f
	.long	0xf00e08e1,0x0b960000,0x00003fff,0x00009b77
	.long	0x3f951232,0x1da70000,0x00003fff,0x00009d55
	.long	0xcc320f93,0x56240000,0x00003fff,0x00009f10
	.long	0x0575006c,0xc5710000,0x00003fff,0x0000a0a9
	.long	0xc290d97c,0xc06c0000,0x00003fff,0x0000a226
	.long	0x59ebebc0,0x630a0000,0x00003fff,0x0000a388
	.long	0xb4aff6ef,0x0ec90000,0x00003fff,0x0000a4d3
	.long	0x5f1061d2,0x92c40000,0x00003fff,0x0000a608
	.long	0x95dcfbe3,0x187e0000,0x00003fff,0x0000a72a
	.long	0x51dc7367,0xbeac0000,0x00003fff,0x0000a83a
	.long	0x51530956,0x168f0000,0x00003fff,0x0000a93a
	.long	0x20077539,0x546e0000,0x00003fff,0x0000aa9e
	.long	0x7245023b,0x26050000,0x00003fff,0x0000ac4c
	.long	0x84ba6fe4,0xd58f0000,0x00003fff,0x0000adce
	.long	0x4a4a606b,0x97120000,0x00003fff,0x0000af2a
	.long	0x2dcd8d26,0x3c9c0000,0x00003fff,0x0000b065
	.long	0x6f81f222,0x65c70000,0x00003fff,0x0000b184
	.long	0x65150f71,0x496a0000,0x00003fff,0x0000b28a
	.long	0xaa156f9a,0xda350000,0x00003fff,0x0000b37b
	.long	0x44ff3766,0xb8950000,0x00003fff,0x0000b458
	.long	0xc3dce963,0x04330000,0x00003fff,0x0000b525
	.long	0x529d5622,0x46bd0000,0x00003fff,0x0000b5e2
	.long	0xcca95f9d,0x88cc0000,0x00003fff,0x0000b692
	.long	0xcada7aca,0x1ada0000,0x00003fff,0x0000b736
	.long	0xaea7a692,0x58380000,0x00003fff,0x0000b7cf
	.long	0xab287e9f,0x7b360000,0x00003fff,0x0000b85e
	.long	0xcc66cb21,0x98350000,0x00003fff,0x0000b8e4
	.long	0xfd5a20a5,0x93da0000,0x00003fff,0x0000b99f
	.long	0x41f64aff,0x9bb50000,0x00003fff,0x0000ba7f
	.long	0x1e17842b,0xbe7b0000,0x00003fff,0x0000bb47
	.long	0x12857637,0xe17d0000,0x00003fff,0x0000bbfa
	.long	0xbe8a4788,0xdf6f0000,0x00003fff,0x0000bc9d
	.long	0x0fad2b68,0x9d790000,0x00003fff,0x0000bd30
	.long	0x6a39471e,0xcd860000,0x00003fff,0x0000bdb6
	.long	0xc731856a,0xf18a0000,0x00003fff,0x0000be31
	.long	0xcac502e8,0x0d700000,0x00003fff,0x0000bea2
	.long	0xd55ce331,0x94e20000,0x00003fff,0x0000bf0b
	.long	0x10b7c031,0x28f00000,0x00003fff,0x0000bf6b
	.long	0x7a18dacb,0x778d0000,0x00003fff,0x0000bfc4
	.long	0xea4663fa,0x18f60000,0x00003fff,0x0000c018
	.long	0x1bde8b89,0xa4540000,0x00003fff,0x0000c065
	.long	0xb066cfbf,0x64390000,0x00003fff,0x0000c0ae
	.long	0x345f5634,0x0ae60000,0x00003fff,0x0000c0f2
	.long	0x22919cb9,0xe6a70000,0x0000f210,0x48002210
	.long	0x32280004,0xf22e6800,0xff840281,0x7fffffff
	.long	0x0c813ffb,0x80006c04,0x600000d0,0x0c814002
	.long	0xffff6f04,0x6000014c,0x02aef800,0x0000ff88
	.long	0x00ae0400,0x0000ff88,0x2d7c0000,0x0000ff8c
	.long	0xf2000080,0xf22e48a3,0xff84f22e,0x4828ff84
	.long	0xf23c44a2,0x3f800000,0xf2000420,0x2f022401
	.long	0x02810000,0x78000282,0x7fff0000,0x04823ffb
	.long	0x0000e282,0xd282ee81,0x43faf780,0xd3c12d59
	.long	0xff902d59,0xff942d59,0xff98222e,0xff840281
	.long	0x80000000,0x83aeff90,0x241ff227,0xe004f200
	.long	0x0080f200,0x04a3f23a,0x5500f6a0,0xf2000522
	.long	0xf2000523,0xf20000a3,0xf23a5522,0xf696f23a
	.long	0x54a3f698,0xf20008a3,0xf2000422,0xf21fd020
	.long	0xf2009000,0xf22e4822,0xff9060ff,0x00002d30
	.long	0x0c813fff,0x80006e00,0x008a0c81,0x3fd78000
	.long	0x6d00006c,0xf227e00c,0xf2000023,0xf2000080
	.long	0xf20004a3,0xf23a5500,0xf65af23a,0x5580f65c
	.long	0xf2000523,0xf20005a3,0xf23a5522,0xf656f23a
	.long	0x55a2f658,0xf2000523,0xf2000ca3,0xf23a5522
	.long	0xf652f23a,0x54a2f654,0xf2000123,0xf22e4823
	.long	0xff84f200,0x08a2f200,0x0423f21f,0xd030f200
	.long	0x9000f22e,0x4822ff84,0x60ff0000,0x2cb2f200
	.long	0x9000123c,0x0003f22e,0x4800ff84,0x60ff0000
	.long	0x2c900c81,0x40638000,0x6e00008e,0xf227e00c
	.long	0xf23c4480,0xbf800000,0xf20000a0,0xf2000400
	.long	0xf2000023,0xf22e6880,0xff84f200,0x0080f200
	.long	0x04a3f23a,0x5580f5ec,0xf23a5500,0xf5eef200
	.long	0x05a3f200,0x0523f23a,0x55a2f5e8,0xf23a5522
	.long	0xf5eaf200,0x0ca3f200,0x0123f23a,0x54a2f5e4
	.long	0xf22e4823,0xff84f200,0x08a2f200,0x0423f22e
	.long	0x4822ff84,0xf21fd030,0xf2009000,0x4a106a0c
	.long	0xf23a4822,0xf5d660ff,0x00002c24,0xf23a4822
	.long	0xf5ba60ff,0x00002c10,0x4a106a16,0xf23a4800
	.long	0xf5baf200,0x9000f23a,0x4822f5c0,0x60ff0000
	.long	0x2bfef23a,0x4800f594,0xf2009000,0xf23a4822
	.long	0xf5ba60ff,0x00002be0,0x60ff0000,0x2a66f210
	.long	0x48002210,0x32280004,0x02817fff,0xffff0c81
	.long	0x3fff8000,0x6c4e0c81,0x3fd78000,0x6d00007c
	.long	0xf23c4480,0x3f800000,0xf20000a8,0xf227e004
	.long	0xf23c4500,0x3f800000,0xf2000122,0xf20008a3
	.long	0xf21fd020,0xf2000484,0xf2000420,0xf227e001
	.long	0x41d761ff,0xfffffd66,0xdffc0000,0x000c60ff
	.long	0x00002b6c,0xf2000018,0xf23c4438,0x3f800000
	.long	0xf2d20000,0x29d4f23a,0x4800c5a6,0x22100281
	.long	0x80000000,0x00813f80,0x00002f01,0xf2009000
	.long	0xf21f4423,0x60ff0000,0x2b36f200,0x9000123c
	.long	0x0003f210,0x480060ff,0x00002b16,0x60ff0000
	.long	0x29b2f210,0x48002210,0x32280004,0x02817fff
	.long	0xffff0c81,0x3fff8000,0x6c44f23c,0x44803f80
	.long	0x0000f200,0x00a2f200,0x001af23c,0x44223f80
	.long	0x0000f200,0x0420f200,0x00042f00,0x4280f227
	.long	0xe00141d7,0x61ffffff,0xfcc4dffc,0x0000000c
	.long	0xf21f9000,0xf2000022,0x60ff0000,0x2acaf200
	.long	0x0018f23c,0x44383f80,0x0000f2d2,0x0000292a
	.long	0x4a106a18,0xf23a4800,0xc4e8f200,0x9000f23c
	.long	0x44220080,0x000060ff,0x00002a9c,0x60ff0000
	.long	0x2ce8f200,0x9000f23a,0x4800c4d6,0x60ff0000
	.long	0x2a863fdc,0x000082e3,0x08654361,0xc4c60000
	.long	0x00003fa5,0x55555555,0x4cc13fc5,0x55555555
	.long	0x4a543f81,0x11111117,0x43853fa5,0x55555555
	.long	0x4f5a3fc5,0x55555555,0x55550000,0x00000000
	.long	0x00003ec7,0x1de3a577,0x46823efa,0x01a019d7
	.long	0xcb683f2a,0x01a01a01,0x9df33f56,0xc16c16c1
	.long	0x70e23f81,0x11111111,0x11113fa5,0x55555555
	.long	0x55553ffc,0x0000aaaa,0xaaaaaaaa,0xaaab0000
	.long	0x000048b0,0x00000000,0x00003730,0x00000000
	.long	0x00003fff,0x00008000,0x00000000,0x00000000
	.long	0x00003fff,0x00008164,0xd1f3bc03,0x07749f84
	.long	0x1a9b3fff,0x000082cd,0x8698ac2b,0xa1d89fc1
	.long	0xd5b93fff,0x0000843a,0x28c3acde,0x4048a072
	.long	0x83693fff,0x000085aa,0xc367cc48,0x7b141fc5
	.long	0xc95c3fff,0x0000871f,0x61969e8d,0x10101ee8
	.long	0x5c9f3fff,0x00008898,0x0e8092da,0x85289fa2
	.long	0x07293fff,0x00008a14,0xd575496e,0xfd9ca07b
	.long	0xf9af3fff,0x00008b95,0xc1e3ea8b,0xd6e8a002
	.long	0x0dcf3fff,0x00008d1a,0xdf5b7e5b,0xa9e4205a
	.long	0x63da3fff,0x00008ea4,0x398b45cd,0x53c01eb7
	.long	0x00513fff,0x00009031,0xdc431466,0xb1dc1f6e
	.long	0xb0293fff,0x000091c3,0xd373ab11,0xc338a078
	.long	0x14943fff,0x0000935a,0x2b2f13e6,0xe92c9eb3
	.long	0x19b03fff,0x000094f4,0xefa8fef7,0x09602017
	.long	0x457d3fff,0x00009694,0x2d372018,0x5a001f11
	.long	0xd5373fff,0x00009837,0xf0518db8,0xa9709fb9
	.long	0x52dd3fff,0x000099e0,0x459320b7,0xfa641fe4
	.long	0x30873fff,0x00009b8d,0x39b9d54e,0x55381fa2
	.long	0xa8183fff,0x00009d3e,0xd9a72cff,0xb7501fde
	.long	0x494d3fff,0x00009ef5,0x326091a1,0x11ac2050
	.long	0x48903fff,0x0000a0b0,0x510fb971,0x4fc4a073
	.long	0x691c3fff,0x0000a270,0x43030c49,0x68181f9b
	.long	0x7a053fff,0x0000a435,0x15ae09e6,0x80a0a079
	.long	0x71263fff,0x0000a5fe,0xd6a9b151,0x38eca071
	.long	0xa1403fff,0x0000a7cd,0x93b4e965,0x3568204f
	.long	0x62da3fff,0x0000a9a1,0x5ab4ea7c,0x0ef81f28
	.long	0x3c4a3fff,0x0000ab7a,0x39b5a93e,0xd3389f9a
	.long	0x7fdc3fff,0x0000ad58,0x3eea42a1,0x4ac8a05b
	.long	0x3fac3fff,0x0000af3b,0x78ad690a,0x43741fdf
	.long	0x26103fff,0x0000b123,0xf581d2ac,0x25909f70
	.long	0x5f903fff,0x0000b311,0xc412a911,0x2488201f
	.long	0x678a3fff,0x0000b504,0xf333f9de,0x64841f32
	.long	0xfb133fff,0x0000b6fd,0x91e328d1,0x77902003
	.long	0x8b303fff,0x0000b8fb,0xaf4762fb,0x9ee8200d
	.long	0xc3cc3fff,0x0000baff,0x5ab2133e,0x45fc9f8b
	.long	0x2ae63fff,0x0000bd08,0xa39f580c,0x36c0a02b
	.long	0xbf703fff,0x0000bf17,0x99b67a73,0x1084a00b
	.long	0xf5183fff,0x0000c12c,0x4cca6670,0x9458a041
	.long	0xdd413fff,0x0000c346,0xccda2497,0x64089fdf
	.long	0x137b3fff,0x0000c567,0x2a115506,0xdadc201f
	.long	0x15683fff,0x0000c78d,0x74c8abb9,0xb15c1fc1
	.long	0x3a2e3fff,0x0000c9b9,0xbd866e2f,0x27a4a03f
	.long	0x8f033fff,0x0000cbec,0x14fef272,0x7c5c1ff4
	.long	0x907d3fff,0x0000ce24,0x8c151f84,0x80e49e6e
	.long	0x53e43fff,0x0000d063,0x33daef2b,0x25941fd6
	.long	0xd45c3fff,0x0000d2a8,0x1d91f12a,0xe45ca076
	.long	0xedb93fff,0x0000d4f3,0x5aabcfed,0xfa209fa6
	.long	0xde213fff,0x0000d744,0xfccad69d,0x6af41ee6
	.long	0x9a2f3fff,0x0000d99d,0x15c278af,0xd7b4207f
	.long	0x439f3fff,0x0000dbfb,0xb797daf2,0x3754201e
	.long	0xc2073fff,0x0000de60,0xf4825e0e,0x91249e8b
	.long	0xe1753fff,0x0000e0cc,0xdeec2a94,0xe1102003
	.long	0x2c4b3fff,0x0000e33f,0x8972be8a,0x5a502004
	.long	0xdff53fff,0x0000e5b9,0x06e77c83,0x48a81e72
	.long	0xf47a3fff,0x0000e839,0x6a503c4b,0xdc681f72
	.long	0x2f223fff,0x0000eac0,0xc6e7dd24,0x3930a017
	.long	0xe9453fff,0x0000ed4f,0x301ed994,0x2b841f40
	.long	0x1a5b3fff,0x0000efe4,0xb99bdcda,0xf5cc9fb9
	.long	0xa9e33fff,0x0000f281,0x773c59ff,0xb1382074
	.long	0x4c053fff,0x0000f525,0x7d152486,0xcc2c1f77
	.long	0x3a193fff,0x0000f7d0,0xdf730ad1,0x3bb81ffe
	.long	0x90d53fff,0x0000fa83,0xb2db722a,0x033ca041
	.long	0xed223fff,0x0000fd3e,0x0c0cf486,0xc1741f85
	.long	0x3f3a2210,0x02817fff,0x00000c81,0x3fbe0000
	.long	0x6c0660ff,0x00000108,0x32280004,0x0c81400c
	.long	0xb1676d06,0x60ff0000,0x010cf210,0x4800f200
	.long	0x0080f23c,0x442342b8,0xaa3bf227,0xe00c2d7c
	.long	0x00000000,0xff58f201,0x600043fa,0xfbb6f201
	.long	0x40002d41,0xff540281,0x0000003f,0xe989d3c1
	.long	0x222eff54,0xec810641,0x3fff3d7a,0xfb06ff54
	.long	0xf2000100,0xf23c4423,0xbc317218,0xf23a4923
	.long	0xfaf2f200,0x0422f200,0x0822f200,0x0080f200
	.long	0x04a3f23c,0x45003ab6,0x0b70f200,0x0523f200
	.long	0x0580f23c,0x45a33c08,0x8895f23a,0x5522fad4
	.long	0xf23a55a2,0xfad6f200,0x05233d41,0xff842d7c
	.long	0x80000000,0xff8842ae,0xff8cf200,0x05a3f23c
	.long	0x45223f00,0x0000f200,0x01a3f200,0x0523f200
	.long	0x0c22f219,0x4880f200,0x0822f200,0x0423f21f
	.long	0xd030f211,0x4422f200,0x0422222e,0xff584a81
	.long	0x6706f22e,0x4823ff90,0xf2009000,0x123c0000
	.long	0xf22e4823,0xff8460ff,0x000024c6,0xf210d080
	.long	0xf2009000,0xf23c4422,0x3f800000,0x60ff0000
	.long	0x24c60c81,0x400cb27c,0x6e66f210,0x4800f200
	.long	0x0080f23c,0x442342b8,0xaa3bf227,0xe00c2d7c
	.long	0x00000001,0xff58f201,0x600043fa,0xfaa6f201
	.long	0x40002d41,0xff540281,0x0000003f,0xe989d3c1
	.long	0x222eff54,0xec812d41,0xff54e281,0x93aeff54
	.long	0x06413fff,0x3d41ff90,0x2d7c8000,0x0000ff94
	.long	0x42aeff98,0x222eff54,0x06413fff,0x6000fed2
	.long	0x4a106bff,0x00002370,0x60ff0000,0x24122f10
	.long	0x02978000,0x00000097,0x00800000,0xf23c4400
	.long	0x3f800000,0xf2009000,0xf21f4422,0x60ff0000
	.long	0x24262210,0x02817fff,0x00000c81,0x3ffd0000
	.long	0x6c0660ff,0x0000015e,0x32280004,0x0c814004
	.long	0xc2156f06,0x60ff0000,0x026cf210,0x4800f200
	.long	0x0080f23c,0x442342b8,0xaa3bf227,0xe00cf201
	.long	0x600043fa,0xf9eef201,0x40002d41,0xff540281
	.long	0x0000003f,0xe989d3c1,0x222eff54,0xec812d41
	.long	0xff54f200,0x0100f23c,0x4423bc31,0x7218f23a
	.long	0x4923f930,0xf2000422,0xf2000822,0x06413fff
	.long	0xf2000080,0xf20004a3,0xf23c4500,0x3950097b
	.long	0xf2000523,0xf2000580,0xf23c45a3,0x3ab60b6a
	.long	0xf23a5522,0xf91ef23a,0x55a2f920,0x3d41ff84
	.long	0x2d7c8000,0x0000ff88,0x42aeff8c,0xf2000523
	.long	0x222eff54,0x4441f200,0x05a30641,0x3ffff23a
	.long	0x5522f900,0xf23c45a2,0x3f000000,0xf2000523
	.long	0x00418000,0x3d41ff90,0x2d7c8000,0x0000ff94
	.long	0x42aeff98,0xf2000ca3,0xf2000123,0xf2000422
	.long	0xf2000822,0xf21fd030,0xf2114823,0x222eff54
	.long	0x0c810000,0x003f6f1a,0xf2294480,0x000cf22e
	.long	0x48a2ff90,0xf2000422,0xf2114822,0x60ff0000
	.long	0x00340c81,0xfffffffd,0x6c16f229,0x4422000c
	.long	0xf2114822,0xf22e4822,0xff9060ff,0x00000016
	.long	0xf2194880,0xf2114422,0xf22e48a2,0xff90f200
	.long	0x0422f200,0x9000f22e,0x4823ff84,0x60ff0000
	.long	0x22ae0c81,0x3fbe0000,0x6c6c0c81,0x00330000
	.long	0x6d2c2d7c,0x80010000,0xff842d7c,0x80000000
	.long	0xff8842ae,0xff8cf210,0x4800f200,0x9000123c
	.long	0x0002f22e,0x4822ff84,0x60ff0000,0x2264f210
	.long	0x4800f23a,0x5423f86c,0x2d7c8001,0x0000ff84
	.long	0x2d7c8000,0x0000ff88,0x42aeff8c,0xf22e4822
	.long	0xff84f200,0x9000123c,0x0000f23a,0x5423f84c
	.long	0x60ff0000,0x222cf210,0x4800f200,0x0023f227
	.long	0xe00cf23c,0x44802f30,0xcaa8f200,0x00a3f23c
	.long	0x4500310f,0x8290f23c,0x44a232d7,0x3220f200
	.long	0x0123f200,0x00a3f23c,0x45223493,0xf281f23a
	.long	0x54a2f7c0,0xf2000123,0xf20000a3,0xf23a5522
	.long	0xf7baf23a,0x54a2f7bc,0xf2000123,0xf20000a3
	.long	0xf23a5522,0xf7b6f23a,0x54a2f7b8,0xf2000123
	.long	0xf20000a3,0xf23a5522,0xf7b2f23a,0x48a2f7b4
	.long	0xf2000123,0xf20000a3,0xf2000123,0xf21048a3
	.long	0xf23c4423,0x3f000000,0xf20008a2,0xf21fd030
	.long	0xf2000422,0xf2009000,0xf2104822,0x60ff0000
	.long	0x218e2210,0x0c810000,0x00006e00,0xfbacf23c
	.long	0x4400bf80,0x0000f200,0x9000f23c,0x44220080
	.long	0x000060ff,0x00002178,0x60ff0000,0x1ff63028
	.long	0x00000880,0x000f0440,0x3ffff200,0x50006d02
	.long	0x4e751d7c,0x0008ff64,0x4e7561ff,0x00007cfc
	.long	0x44400440,0x3ffff200,0x50001d7c,0x0008ff64
	.long	0x4e753028,0x00000040,0x7fff0880,0x000e2d68
	.long	0x0004ff88,0x2d680008,0xff8c3d40,0xff84f22e
	.long	0x4800ff84,0x6b024e75,0x1d7c0008,0xff644e75
	.long	0x61ff0000,0x7cb660ca,0x7ffb0000,0x80000000
	.long	0x00000000,0x00000000,0xf2104800,0x22103228
	.long	0x00040281,0x7fffffff,0x0c81400c,0xb1676e42
	.long	0xf2000018,0x2f004280,0xf227e001,0x41d761ff
	.long	0xfffffad2,0xdffc0000,0x000cf23c,0x44233f00
	.long	0x0000201f,0xf23c4480,0x3e800000,0xf20000a0
	.long	0xf2009000,0x123c0002,0xf2000422,0x60ff0000
	.long	0x20800c81,0x400cb2b3,0x6e3cf200,0x0018f23a
	.long	0x5428baae,0xf23a5428,0xbab02f00,0x4280f227
	.long	0xe00141d7,0x61ffffff,0xfa7cdffc,0x0000000c
	.long	0x201ff200,0x9000123c,0x0000f23a,0x4823ff5a
	.long	0x60ff0000,0x203c60ff,0x00002014,0xf23c4400
	.long	0x3f800000,0xf2009000,0xf23c4422,0x00800000
	.long	0x60ff0000,0x2032f210,0x48002210,0x32280004
	.long	0x22410281,0x7fffffff,0x0c81400c,0xb1676e62
	.long	0xf2000018,0x48e78040,0xf227e001,0x41d74280
	.long	0x61ffffff,0xfbe0dffc,0x0000000c,0xf23c9000
	.long	0x00000000,0x4cdf0201,0xf2000080,0xf23c44a2
	.long	0x3f800000,0xf2276800,0xf2000420,0x22090281
	.long	0x80000000,0x00813f00,0x0000f21f,0x48222f01
	.long	0xf2009000,0x123c0000,0xf21f4423,0x60ff0000
	.long	0x1fa00c81,0x400cb2b3,0x6eff0000,0x1f4cf200
	.long	0x0018f23a,0x5428b9ca,0x2f3c0000,0x00002f3c
	.long	0x80000000,0x22090281,0x80000000,0x00817ffb
	.long	0x00002f01,0xf23a5428,0xb9b02f00,0x4280f227
	.long	0xe00141d7,0x61ffffff,0xf97cdffc,0x0000000c
	.long	0x201ff200,0x9000123c,0x0000f21f,0x482360ff
	.long	0x00001f3e,0x60ff0000,0x1ddaf210,0x4800f22e
	.long	0x6800ff84,0x22103228,0x00042d41,0xff840281
	.long	0x7fffffff,0x0c813fd7,0x80006d00,0x00740c81
	.long	0x3fffddce,0x6e00006a,0x222eff84,0x2d41ff5c
	.long	0x02817fff,0x00000681,0x00010000,0x2d41ff84
	.long	0x02ae8000,0x0000ff5c,0xf22e4800,0xff842f00
	.long	0x4280f227,0xe00141d7,0x61ffffff,0xfac8dffc
	.long	0x0000000c,0x201ff200,0x0080f23c,0x44a24000
	.long	0x0000222e,0xff5cf22e,0x6880ff84,0xb3aeff84
	.long	0xf2009000,0xf22e4820,0xff8460ff,0x00001eb0
	.long	0x0c813fff,0x80006d00,0x00880c81,0x40048aa1
	.long	0x6e000092,0x222eff84,0x2d41ff5c,0x02817fff
	.long	0x00000681,0x00010000,0x2d41ff84,0x02ae8000
	.long	0x0000ff5c,0x222eff5c,0xf22e4800,0xff842f00
	.long	0x4280f227,0xe00141d7,0x61ffffff,0xf878dffc
	.long	0x0000000c,0x201f222e,0xff5cf23c,0x44223f80
	.long	0x00000a81,0xc0000000,0xf2014480,0xf20000a0
	.long	0x222eff5c,0x00813f80,0x0000f201,0x4400f200
	.long	0x9000123c,0x0002f200,0x042260ff,0x00001e20
	.long	0xf2009000,0x123c0003,0xf22e4800,0xff8460ff
	.long	0x00001dfe,0x222eff84,0x02818000,0x00000081
	.long	0x3f800000,0xf2014400,0x02818000,0x00000a81
	.long	0x80800000,0xf2009000,0xf2014422,0x60ff0000
	.long	0x1dde60ff,0x00001c6c,0x3ffe0000,0xb17217f7
	.long	0xd1cf79ac,0x00000000,0x3f800000,0x00000000
	.long	0x7f800000,0xbf800000,0x3fc2499a,0xb5e4040b
	.long	0xbfc555b5,0x848cb7db,0x3fc99999,0x987d8730
	.long	0xbfcfffff,0xff6f7e97,0x3fd55555,0x555555a4
	.long	0xbfe00000,0x00000008,0x3f175496,0xadd7dad6
	.long	0x3f3c71c2,0xfe80c7e0,0x3f624924,0x928bccff
	.long	0x3f899999,0x999995ec,0x3fb55555,0x55555555
	.long	0x40000000,0x00000000,0x3f990000,0x80000000
	.long	0x00000000,0x00000000,0x3ffe0000,0xfe03f80f
	.long	0xe03f80fe,0x00000000,0x3ff70000,0xff015358
	.long	0x833c47e2,0x00000000,0x3ffe0000,0xfa232cf2
	.long	0x52138ac0,0x00000000,0x3ff90000,0xbdc8d83e
	.long	0xad88d549,0x00000000,0x3ffe0000,0xf6603d98
	.long	0x0f6603da,0x00000000,0x3ffa0000,0x9cf43dcf
	.long	0xf5eafd48,0x00000000,0x3ffe0000,0xf2b9d648
	.long	0x0f2b9d65,0x00000000,0x3ffa0000,0xda16eb88
	.long	0xcb8df614,0x00000000,0x3ffe0000,0xef2eb71f
	.long	0xc4345238,0x00000000,0x3ffb0000,0x8b29b775
	.long	0x1bd70743,0x00000000,0x3ffe0000,0xebbdb2a5
	.long	0xc1619c8c,0x00000000,0x3ffb0000,0xa8d839f8
	.long	0x30c1fb49,0x00000000,0x3ffe0000,0xe865ac7b
	.long	0x7603a197,0x00000000,0x3ffb0000,0xc61a2eb1
	.long	0x8cd907ad,0x00000000,0x3ffe0000,0xe525982a
	.long	0xf70c880e,0x00000000,0x3ffb0000,0xe2f2a47a
	.long	0xde3a18af,0x00000000,0x3ffe0000,0xe1fc780e
	.long	0x1fc780e2,0x00000000,0x3ffb0000,0xff64898e
	.long	0xdf55d551,0x00000000,0x3ffe0000,0xdee95c4c
	.long	0xa037ba57,0x00000000,0x3ffc0000,0x8db956a9
	.long	0x7b3d0148,0x00000000,0x3ffe0000,0xdbeb61ee
	.long	0xd19c5958,0x00000000,0x3ffc0000,0x9b8fe100
	.long	0xf47ba1de,0x00000000,0x3ffe0000,0xd901b203
	.long	0x6406c80e,0x00000000,0x3ffc0000,0xa9372f1d
	.long	0x0da1bd17,0x00000000,0x3ffe0000,0xd62b80d6
	.long	0x2b80d62c,0x00000000,0x3ffc0000,0xb6b07f38
	.long	0xce90e46b,0x00000000,0x3ffe0000,0xd3680d36
	.long	0x80d3680d,0x00000000,0x3ffc0000,0xc3fd0329
	.long	0x06488481,0x00000000,0x3ffe0000,0xd0b69fcb
	.long	0xd2580d0b,0x00000000,0x3ffc0000,0xd11de0ff
	.long	0x15ab18ca,0x00000000,0x3ffe0000,0xce168a77
	.long	0x25080ce1,0x00000000,0x3ffc0000,0xde1433a1
	.long	0x6c66b150,0x00000000,0x3ffe0000,0xcb8727c0
	.long	0x65c393e0,0x00000000,0x3ffc0000,0xeae10b5a
	.long	0x7ddc8add,0x00000000,0x3ffe0000,0xc907da4e
	.long	0x871146ad,0x00000000,0x3ffc0000,0xf7856e5e
	.long	0xe2c9b291,0x00000000,0x3ffe0000,0xc6980c69
	.long	0x80c6980c,0x00000000,0x3ffd0000,0x82012ca5
	.long	0xa68206d7,0x00000000,0x3ffe0000,0xc4372f85
	.long	0x5d824ca6,0x00000000,0x3ffd0000,0x882c5fcd
	.long	0x7256a8c5,0x00000000,0x3ffe0000,0xc1e4bbd5
	.long	0x95f6e947,0x00000000,0x3ffd0000,0x8e44c60b
	.long	0x4ccfd7de,0x00000000,0x3ffe0000,0xbfa02fe8
	.long	0x0bfa02ff,0x00000000,0x3ffd0000,0x944ad09e
	.long	0xf4351af6,0x00000000,0x3ffe0000,0xbd691047
	.long	0x07661aa3,0x00000000,0x3ffd0000,0x9a3eecd4
	.long	0xc3eaa6b2,0x00000000,0x3ffe0000,0xbb3ee721
	.long	0xa54d880c,0x00000000,0x3ffd0000,0xa0218434
	.long	0x353f1de8,0x00000000,0x3ffe0000,0xb92143fa
	.long	0x36f5e02e,0x00000000,0x3ffd0000,0xa5f2fcab
	.long	0xbbc506da,0x00000000,0x3ffe0000,0xb70fbb5a
	.long	0x19be3659,0x00000000,0x3ffd0000,0xabb3b8ba
	.long	0x2ad362a5,0x00000000,0x3ffe0000,0xb509e68a
	.long	0x9b94821f,0x00000000,0x3ffd0000,0xb1641795
	.long	0xce3ca97b,0x00000000,0x3ffe0000,0xb30f6352
	.long	0x8917c80b,0x00000000,0x3ffd0000,0xb7047551
	.long	0x5d0f1c61,0x00000000,0x3ffe0000,0xb11fd3b8
	.long	0x0b11fd3c,0x00000000,0x3ffd0000,0xbc952afe
	.long	0xea3d13e1,0x00000000,0x3ffe0000,0xaf3addc6
	.long	0x80af3ade,0x00000000,0x3ffd0000,0xc2168ed0
	.long	0xf458ba4a,0x00000000,0x3ffe0000,0xad602b58
	.long	0x0ad602b6,0x00000000,0x3ffd0000,0xc788f439
	.long	0xb3163bf1,0x00000000,0x3ffe0000,0xab8f69e2
	.long	0x8359cd11,0x00000000,0x3ffd0000,0xccecac08
	.long	0xbf04565d,0x00000000,0x3ffe0000,0xa9c84a47
	.long	0xa07f5638,0x00000000,0x3ffd0000,0xd2420487
	.long	0x2dd85160,0x00000000,0x3ffe0000,0xa80a80a8
	.long	0x0a80a80b,0x00000000,0x3ffd0000,0xd7894992
	.long	0x3bc3588a,0x00000000,0x3ffe0000,0xa655c439
	.long	0x2d7b73a8,0x00000000,0x3ffd0000,0xdcc2c4b4
	.long	0x9887dacc,0x00000000,0x3ffe0000,0xa4a9cf1d
	.long	0x96833751,0x00000000,0x3ffd0000,0xe1eebd3e
	.long	0x6d6a6b9e,0x00000000,0x3ffe0000,0xa3065e3f
	.long	0xae7cd0e0,0x00000000,0x3ffd0000,0xe70d785c
	.long	0x2f9f5bdc,0x00000000,0x3ffe0000,0xa16b312e
	.long	0xa8fc377d,0x00000000,0x3ffd0000,0xec1f392c
	.long	0x5179f283,0x00000000,0x3ffe0000,0x9fd809fd
	.long	0x809fd80a,0x00000000,0x3ffd0000,0xf12440d3
	.long	0xe36130e6,0x00000000,0x3ffe0000,0x9e4cad23
	.long	0xdd5f3a20,0x00000000,0x3ffd0000,0xf61cce92
	.long	0x346600bb,0x00000000,0x3ffe0000,0x9cc8e160
	.long	0xc3fb19b9,0x00000000,0x3ffd0000,0xfb091fd3
	.long	0x8145630a,0x00000000,0x3ffe0000,0x9b4c6f9e
	.long	0xf03a3caa,0x00000000,0x3ffd0000,0xffe97042
	.long	0xbfa4c2ad,0x00000000,0x3ffe0000,0x99d722da
	.long	0xbde58f06,0x00000000,0x3ffe0000,0x825efced
	.long	0x49369330,0x00000000,0x3ffe0000,0x9868c809
	.long	0x868c8098,0x00000000,0x3ffe0000,0x84c37a7a
	.long	0xb9a905c9,0x00000000,0x3ffe0000,0x97012e02
	.long	0x5c04b809,0x00000000,0x3ffe0000,0x87224c2e
	.long	0x8e645fb7,0x00000000,0x3ffe0000,0x95a02568
	.long	0x095a0257,0x00000000,0x3ffe0000,0x897b8cac
	.long	0x9f7de298,0x00000000,0x3ffe0000,0x94458094
	.long	0x45809446,0x00000000,0x3ffe0000,0x8bcf55de
	.long	0xc4cd05fe,0x00000000,0x3ffe0000,0x92f11384
	.long	0x0497889c,0x00000000,0x3ffe0000,0x8e1dc0fb
	.long	0x89e125e5,0x00000000,0x3ffe0000,0x91a2b3c4
	.long	0xd5e6f809,0x00000000,0x3ffe0000,0x9066e68c
	.long	0x955b6c9b,0x00000000,0x3ffe0000,0x905a3863
	.long	0x3e06c43b,0x00000000,0x3ffe0000,0x92aade74
	.long	0xc7be59e0,0x00000000,0x3ffe0000,0x8f1779d9
	.long	0xfdc3a219,0x00000000,0x3ffe0000,0x94e9bff6
	.long	0x15845643,0x00000000,0x3ffe0000,0x8dda5202
	.long	0x37694809,0x00000000,0x3ffe0000,0x9723a1b7
	.long	0x20134203,0x00000000,0x3ffe0000,0x8ca29c04
	.long	0x6514e023,0x00000000,0x3ffe0000,0x995899c8
	.long	0x90eb8990,0x00000000,0x3ffe0000,0x8b70344a
	.long	0x139bc75a,0x00000000,0x3ffe0000,0x9b88bdaa
	.long	0x3a3dae2f,0x00000000,0x3ffe0000,0x8a42f870
	.long	0x5669db46,0x00000000,0x3ffe0000,0x9db4224f
	.long	0xffe1157c,0x00000000,0x3ffe0000,0x891ac73a
	.long	0xe9819b50,0x00000000,0x3ffe0000,0x9fdadc26
	.long	0x8b7a12da,0x00000000,0x3ffe0000,0x87f78087
	.long	0xf78087f8,0x00000000,0x3ffe0000,0xa1fcff17
	.long	0xce733bd4,0x00000000,0x3ffe0000,0x86d90544
	.long	0x7a34acc6,0x00000000,0x3ffe0000,0xa41a9e8f
	.long	0x5446fb9f,0x00000000,0x3ffe0000,0x85bf3761
	.long	0x2cee3c9b,0x00000000,0x3ffe0000,0xa633cd7e
	.long	0x6771cd8b,0x00000000,0x3ffe0000,0x84a9f9c8
	.long	0x084a9f9d,0x00000000,0x3ffe0000,0xa8489e60
	.long	0x0b435a5e,0x00000000,0x3ffe0000,0x83993052
	.long	0x3fbe3368,0x00000000,0x3ffe0000,0xaa59233c
	.long	0xcca4bd49,0x00000000,0x3ffe0000,0x828cbfbe
	.long	0xb9a020a3,0x00000000,0x3ffe0000,0xac656dae
	.long	0x6bcc4985,0x00000000,0x3ffe0000,0x81848da8
	.long	0xfaf0d277,0x00000000,0x3ffe0000,0xae6d8ee3
	.long	0x60bb2468,0x00000000,0x3ffe0000,0x80808080
	.long	0x80808081,0x00000000,0x3ffe0000,0xb07197a2
	.long	0x3c46c654,0x00000000,0xf2104800,0x2d7c0000
	.long	0x0000ff54,0x22103228,0x00042d50,0xff842d68
	.long	0x0004ff88,0x2d680008,0xff8c0c81,0x00000000
	.long	0x6d000182,0x0c813ffe,0xf07d6d0a,0x0c813fff
	.long	0x88416f00,0x00e2e081,0xe0810481,0x00003fff
	.long	0xd2aeff54,0x41faf7b2,0xf2014080,0x2d7c3fff
	.long	0x0000ff84,0x2d6eff88,0xff9402ae,0xfe000000
	.long	0xff9400ae,0x01000000,0xff94222e,0xff940281
	.long	0x7e000000,0xe081e081,0xe881d1c1,0xf22e4800
	.long	0xff842d7c,0x3fff0000,0xff9042ae,0xff98f22e
	.long	0x4828ff90,0xf227e00c,0xf2104823,0xf23a48a3
	.long	0xf6c8f200,0x0100f200,0x0923f22e,0x6880ff84
	.long	0xf2000980,0xf2000880,0xf23a54a3,0xf6ccf23a
	.long	0x5523f6ce,0xf23a54a2,0xf6d0f23a,0x5522f6d2
	.long	0xf2000ca3,0xf2000d23,0xf23a54a2,0xf6ccf23a
	.long	0x5522f6ce,0xf2000ca3,0xd1fc0000,0x0010f200
	.long	0x0d23f200,0x00a3f200,0x0822f210,0x48a2f21f
	.long	0xd030f200,0x0422f200,0x9000f22e,0x4822ff84
	.long	0x60ff0000,0x142af23c,0x58380001,0xf2c10000
	.long	0x1678f200,0x0080f23a,0x44a8f64e,0xf23a4422
	.long	0xf648f200,0x04a2f200,0x00a0f227,0xe00cf200
	.long	0x0400f200,0x0023f22e,0x6880ff84,0xf2000080
	.long	0xf20004a3,0xf23a5580,0xf660f23a,0x5500f662
	.long	0xf20005a3,0xf2000523,0xf23a55a2,0xf65cf23a
	.long	0x5522f65e,0xf2000ca3,0xf2000123,0xf23a54a2
	.long	0xf658f22e,0x4823ff84,0xf20008a2,0xf21fd030
	.long	0xf2000423,0xf2009000,0xf22e4822,0xff8460ff
	.long	0x0000139c,0x60ff0000,0x12102d7c,0xffffff9c
	.long	0xff5448e7,0x3f002610,0x28280004,0x2a280008
	.long	0x42824a84,0x66342805,0x42857420,0x4286edc4
	.long	0x6000edac,0xd4862d43,0xff842d44,0xff882d45
	.long	0xff8c4482,0x2d42ff54,0xf22e4800,0xff844cdf
	.long	0x00fc41ee,0xff846000,0xfe0c4286,0xedc46000
	.long	0x2406edac,0x2e05edad,0x44860686,0x00000020
	.long	0xecaf8887,0x2d43ff84,0x2d44ff88,0x2d45ff8c
	.long	0x44822d42,0xff54f22e,0x4800ff84,0x4cdf00fc
	.long	0x41eeff84,0x6000fdce,0xf2104800,0xf2000018
	.long	0xf23a4838,0xf5a4f292,0x0014f200,0x9000123c
	.long	0x0003f210,0x480060ff,0x000012d6,0xf2104800
	.long	0x2d7c0000,0x0000ff54,0xf2000080,0xf23a4422
	.long	0xf508f22e,0x6800ff84,0x3d6eff88,0xff86222e
	.long	0xff840c81,0x00000000,0x6f0000da,0x0c813ffe
	.long	0x80006d00,0xfda20c81,0x3fffc000,0x6e00fd98
	.long	0x0c813ffe,0xf07d6d00,0x001a0c81,0x3fff8841
	.long	0x6e000010,0xf20004a2,0xf23a4422,0xf4bc6000
	.long	0xfe762d6e,0xff88ff94,0x02aefe00,0x0000ff94
	.long	0x00ae0100,0x0000ff94,0x0c813fff,0x80006c44
	.long	0xf23a4400,0xf4fc2d7c,0x3fff0000,0xff9042ae
	.long	0xff98f22e,0x4828ff90,0x222eff94,0x02817e00
	.long	0x0000e081,0xe081e881,0xf20004a2,0xf227e00c
	.long	0xf2000422,0x41faf4e2,0xd1c1f23a,0x4480f466
	.long	0x6000fd76,0xf23a4400,0xf4502d7c,0x3fff0000
	.long	0xff9042ae,0xff98f22e,0x4828ff90,0x222eff94
	.long	0x02817e00,0x0000e081,0xe081e881,0xf2000422
	.long	0xf227e00c,0x41faf4a2,0xd1c1f23a,0x4480f41e
	.long	0x6000fd36,0x0c810000,0x00006d10,0xf23a4400
	.long	0xf414f200,0x900060ff,0x00001014,0xf23a4400
	.long	0xf3fcf200,0x900060ff,0x0000102e,0x60ff0000
	.long	0x10422210,0x32280004,0x02817fff,0xffff0c81
	.long	0x3fff8000,0x6c56f210,0x4818f200,0x0080f200
	.long	0x049af200,0x0022f23c,0x44a23f80,0x0000f200
	.long	0x04202210,0x02818000,0x00000081,0x3f000000
	.long	0x2f012f00,0x4280f227,0xe00141d7,0x61ffffff
	.long	0xfe5adffc,0x0000000c,0x201ff200,0x9000123c
	.long	0x0000f21f,0x442360ff,0x00001136,0xf2104818
	.long	0xf23c4438,0x3f800000,0xf2d20000,0x0fac60ff
	.long	0x00000f7c,0x60ff0000,0x0fba3ffd,0x0000de5b
	.long	0xd8a93728,0x71950000,0x00003fff,0x0000b8aa
	.long	0x3b295c17,0xf0bc0000,0x0000f23c,0x58000001
	.long	0xf2104838,0xf2c10000,0x13502210,0x6d000090
	.long	0x2f004280,0x61ffffff,0xfba2f21f,0x9000f23a
	.long	0x4823ffb8,0x60ff0000,0x10d62210,0x6d000070
	.long	0x2f004280,0x61ffffff,0xfd34f21f,0x9000f23a
	.long	0x4823ff98,0x60ff0000,0x10c62210,0x6d000050
	.long	0x22280008,0x662e2228,0x00040281,0x7fffffff
	.long	0x66223210,0x02810000,0x7fff0481,0x00003fff
	.long	0x67ff0000,0x12e4f200,0x9000f201,0x400060ff
	.long	0x0000107c,0x2f004280,0x61ffffff,0xfb2ef21f
	.long	0x9000f23a,0x4823ff54,0x60ff0000,0x106260ff
	.long	0x00000ed6,0x22106d00,0xfff62f00,0x428061ff
	.long	0xfffffcba,0xf21f9000,0xf23a4823,0xff2e60ff
	.long	0x0000104c,0x406a934f,0x0979a371,0x3f734413
	.long	0x509f8000,0xbfcd0000,0xc0219dc1,0xda994fd2
	.long	0x00000000,0x40000000,0x935d8ddd,0xaaa8ac17
	.long	0x00000000,0x3ffe0000,0xb17217f7,0xd1cf79ac
	.long	0x00000000,0x3f56c16d,0x6f7bd0b2,0x3f811112
	.long	0x302c712c,0x3fa55555,0x55554cc1,0x3fc55555
	.long	0x55554a54,0x3fe00000,0x00000000,0x00000000
	.long	0x00000000,0x3fff0000,0x80000000,0x00000000
	.long	0x3f738000,0x3fff0000,0x8164d1f3,0xbc030773
	.long	0x3fbef7ca,0x3fff0000,0x82cd8698,0xac2ba1d7
	.long	0x3fbdf8a9,0x3fff0000,0x843a28c3,0xacde4046
	.long	0x3fbcd7c9,0x3fff0000,0x85aac367,0xcc487b15
	.long	0xbfbde8da,0x3fff0000,0x871f6196,0x9e8d1010
	.long	0x3fbde85c,0x3fff0000,0x88980e80,0x92da8527
	.long	0x3fbebbf1,0x3fff0000,0x8a14d575,0x496efd9a
	.long	0x3fbb80ca,0x3fff0000,0x8b95c1e3,0xea8bd6e7
	.long	0xbfba8373,0x3fff0000,0x8d1adf5b,0x7e5ba9e6
	.long	0xbfbe9670,0x3fff0000,0x8ea4398b,0x45cd53c0
	.long	0x3fbdb700,0x3fff0000,0x9031dc43,0x1466b1dc
	.long	0x3fbeeeb0,0x3fff0000,0x91c3d373,0xab11c336
	.long	0x3fbbfd6d,0x3fff0000,0x935a2b2f,0x13e6e92c
	.long	0xbfbdb319,0x3fff0000,0x94f4efa8,0xfef70961
	.long	0x3fbdba2b,0x3fff0000,0x96942d37,0x20185a00
	.long	0x3fbe91d5,0x3fff0000,0x9837f051,0x8db8a96f
	.long	0x3fbe8d5a,0x3fff0000,0x99e04593,0x20b7fa65
	.long	0xbfbcde7b,0x3fff0000,0x9b8d39b9,0xd54e5539
	.long	0xbfbebaaf,0x3fff0000,0x9d3ed9a7,0x2cffb751
	.long	0xbfbd86da,0x3fff0000,0x9ef53260,0x91a111ae
	.long	0xbfbebedd,0x3fff0000,0xa0b0510f,0xb9714fc2
	.long	0x3fbcc96e,0x3fff0000,0xa2704303,0x0c496819
	.long	0xbfbec90b,0x3fff0000,0xa43515ae,0x09e6809e
	.long	0x3fbbd1db,0x3fff0000,0xa5fed6a9,0xb15138ea
	.long	0x3fbce5eb,0x3fff0000,0xa7cd93b4,0xe965356a
	.long	0xbfbec274,0x3fff0000,0xa9a15ab4,0xea7c0ef8
	.long	0x3fbea83c,0x3fff0000,0xab7a39b5,0xa93ed337
	.long	0x3fbecb00,0x3fff0000,0xad583eea,0x42a14ac6
	.long	0x3fbe9301,0x3fff0000,0xaf3b78ad,0x690a4375
	.long	0xbfbd8367,0x3fff0000,0xb123f581,0xd2ac2590
	.long	0xbfbef05f,0x3fff0000,0xb311c412,0xa9112489
	.long	0x3fbdfb3c,0x3fff0000,0xb504f333,0xf9de6484
	.long	0x3fbeb2fb,0x3fff0000,0xb6fd91e3,0x28d17791
	.long	0x3fbae2cb,0x3fff0000,0xb8fbaf47,0x62fb9ee9
	.long	0x3fbcdc3c,0x3fff0000,0xbaff5ab2,0x133e45fb
	.long	0x3fbee9aa,0x3fff0000,0xbd08a39f,0x580c36bf
	.long	0xbfbeaefd,0x3fff0000,0xbf1799b6,0x7a731083
	.long	0xbfbcbf51,0x3fff0000,0xc12c4cca,0x66709456
	.long	0x3fbef88a,0x3fff0000,0xc346ccda,0x24976407
	.long	0x3fbd83b2,0x3fff0000,0xc5672a11,0x5506dadd
	.long	0x3fbdf8ab,0x3fff0000,0xc78d74c8,0xabb9b15d
	.long	0xbfbdfb17,0x3fff0000,0xc9b9bd86,0x6e2f27a3
	.long	0xbfbefe3c,0x3fff0000,0xcbec14fe,0xf2727c5d
	.long	0xbfbbb6f8,0x3fff0000,0xce248c15,0x1f8480e4
	.long	0xbfbcee53,0x3fff0000,0xd06333da,0xef2b2595
	.long	0xbfbda4ae,0x3fff0000,0xd2a81d91,0xf12ae45a
	.long	0x3fbc9124,0x3fff0000,0xd4f35aab,0xcfedfa1f
	.long	0x3fbeb243,0x3fff0000,0xd744fcca,0xd69d6af4
	.long	0x3fbde69a,0x3fff0000,0xd99d15c2,0x78afd7b6
	.long	0xbfb8bc61,0x3fff0000,0xdbfbb797,0xdaf23755
	.long	0x3fbdf610,0x3fff0000,0xde60f482,0x5e0e9124
	.long	0xbfbd8be1,0x3fff0000,0xe0ccdeec,0x2a94e111
	.long	0x3fbacb12,0x3fff0000,0xe33f8972,0xbe8a5a51
	.long	0x3fbb9bfe,0x3fff0000,0xe5b906e7,0x7c8348a8
	.long	0x3fbcf2f4,0x3fff0000,0xe8396a50,0x3c4bdc68
	.long	0x3fbef22f,0x3fff0000,0xeac0c6e7,0xdd24392f
	.long	0xbfbdbf4a,0x3fff0000,0xed4f301e,0xd9942b84
	.long	0x3fbec01a,0x3fff0000,0xefe4b99b,0xdcdaf5cb
	.long	0x3fbe8cac,0x3fff0000,0xf281773c,0x59ffb13a
	.long	0xbfbcbb3f,0x3fff0000,0xf5257d15,0x2486cc2c
	.long	0x3fbef73a,0x3fff0000,0xf7d0df73,0x0ad13bb9
	.long	0xbfb8b795,0x3fff0000,0xfa83b2db,0x722a033a
	.long	0x3fbef84b,0x3fff0000,0xfd3e0c0c,0xf486c175
	.long	0xbfbef581,0xf210d080,0x22103228,0x0004f22e
	.long	0x6800ff84,0x02817fff,0xffff0c81,0x3fb98000
	.long	0x6c046000,0x00880c81,0x400d80c0,0x6f046000
	.long	0x007cf200,0x0080f23c,0x44a34280,0x0000f22e
	.long	0x6080ff54,0x2f0243fa,0xfbbcf22e,0x4080ff54
	.long	0x222eff54,0x24010281,0x0000003f,0xe981d3c1
	.long	0xec822202,0xe2819481,0x06820000,0x3ffff227
	.long	0xe00cf23c,0x44a33c80,0x00002d59,0xff842d59
	.long	0xff882d59,0xff8c3d59,0xff90f200,0x04283d59
	.long	0xff94426e,0xff9642ae,0xff98d36e,0xff84f23a
	.long	0x4823fb22,0xd36eff90,0x60000100,0x0c813fff
	.long	0x80006e12,0xf2009000,0xf23c4422,0x3f800000
	.long	0x60ff0000,0x0b12222e,0xff840c81,0x00000000
	.long	0x6d0660ff,0x00000ac8,0x60ff0000,0x0a1af200
	.long	0x9000f23c,0x44003f80,0x00002210,0x00810080
	.long	0x0001f201,0x442260ff,0x00000adc,0xf210d080
	.long	0x22103228,0x0004f22e,0x6800ff84,0x02817fff
	.long	0xffff0c81,0x3fb98000,0x6c046000,0xff900c81
	.long	0x400b9b07,0x6f046000,0xff84f200,0x0080f23a
	.long	0x54a3fa62,0xf22e6080,0xff542f02,0x43fafac6
	.long	0xf22e4080,0xff54222e,0xff542401,0x02810000
	.long	0x003fe981,0xd3c1ec82,0x2202e281,0x94810682
	.long	0x00003fff,0xf227e00c,0xf2000500,0xf23a54a3
	.long	0xfa2c2d59,0xff84f23a,0x4923fa2a,0x2d59ff88
	.long	0x2d59ff8c,0xf2000428,0x3d59ff90,0xf2000828
	.long	0x3d59ff94,0x426eff96,0x42aeff98,0xf23a4823
	.long	0xfa14d36e,0xff84d36e,0xff90f200,0x0080f200
	.long	0x04a3f23a,0x5500fa1e,0xf23a5580,0xfa20f200
	.long	0x0523f200,0x05a3f23a,0x5522fa1a,0xf23a55a2
	.long	0xfa1cf200,0x0523f200,0x05a3f23a,0x5522fa16
	.long	0xf20001a3,0xf2000523,0xf2000c22,0xf2000822
	.long	0xf21fd030,0xf22e4823,0xff84f22e,0x4822ff90
	.long	0xf22e4822,0xff84f200,0x90003d42,0xff84241f
	.long	0x2d7c8000,0x0000ff88,0x42aeff8c,0x123c0000
	.long	0xf22e4823,0xff8460ff,0x00000996,0xf2009000
	.long	0xf23c4400,0x3f800000,0x22100081,0x00800001
	.long	0xf2014422,0x60ff0000,0x098e2f01,0xe8082200
	.long	0x02410003,0x0240000c,0x48403001,0x221f4a01
	.long	0x671e0c01,0x000a6f12,0x0c01000e,0x6f3c0c01
	.long	0x002f6f06,0x0c01003f,0x6f6260ff,0x00000baa
	.long	0x4a00660c,0x41fb0170,0x000000d6,0x60000086
	.long	0x0c000003,0x670a41fb,0x01700000,0x00d06074
	.long	0x41fb0170,0x000000d2,0x606a0401,0x000b4a00
	.long	0x661041fb,0x01700000,0x00cc0c01,0x00026f54
	.long	0x605a0c00,0x0003670a,0x41fb0170,0x000000f2
	.long	0x60e841fb,0x01700000,0x012460de,0x04010030
	.long	0x4a006616,0x41fb0170,0x0000014e,0x0c010001
	.long	0x6f220c01,0x00076f24,0x601a0c00,0x0003670a
	.long	0x41fb0170,0x000001f2,0x60e241fb,0x01700000
	.long	0x02a860d8,0x00ae0000,0x0208ff64,0xc2fc000c
	.long	0x48404a00,0x6608f230,0xd0801000,0x4e754840
	.long	0x3d701000,0xff902d70,0x1004ff94,0x2d701008
	.long	0xff982200,0x428041ee,0xff904268,0x000261ff
	.long	0x000062c6,0xf210d080,0x4e7551fc,0x40000000
	.long	0xc90fdaa2,0x2168c235,0x40000000,0xc90fdaa2
	.long	0x2168c234,0x40000000,0xc90fdaa2,0x2168c235
	.long	0x3ffd0000,0x9a209a84,0xfbcff798,0x40000000
	.long	0xadf85458,0xa2bb4a9a,0x3fff0000,0xb8aa3b29
	.long	0x5c17f0bc,0x3ffd0000,0xde5bd8a9,0x37287195
	.long	0x00000000,0x00000000,0x00000000,0x3ffd0000
	.long	0x9a209a84,0xfbcff798,0x40000000,0xadf85458
	.long	0xa2bb4a9a,0x3fff0000,0xb8aa3b29,0x5c17f0bb
	.long	0x3ffd0000,0xde5bd8a9,0x37287195,0x00000000
	.long	0x00000000,0x00000000,0x3ffd0000,0x9a209a84
	.long	0xfbcff799,0x40000000,0xadf85458,0xa2bb4a9b
	.long	0x3fff0000,0xb8aa3b29,0x5c17f0bc,0x3ffd0000
	.long	0xde5bd8a9,0x37287195,0x00000000,0x00000000
	.long	0x00000000,0x3ffe0000,0xb17217f7,0xd1cf79ac
	.long	0x40000000,0x935d8ddd,0xaaa8ac17,0x3fff0000
	.long	0x80000000,0x00000000,0x40020000,0xa0000000
	.long	0x00000000,0x40050000,0xc8000000,0x00000000
	.long	0x400c0000,0x9c400000,0x00000000,0x40190000
	.long	0xbebc2000,0x00000000,0x40340000,0x8e1bc9bf
	.long	0x04000000,0x40690000,0x9dc5ada8,0x2b70b59e
	.long	0x40d30000,0xc2781f49,0xffcfa6d5,0x41a80000
	.long	0x93ba47c9,0x80e98ce0,0x43510000,0xaa7eebfb
	.long	0x9df9de8e,0x46a30000,0xe319a0ae,0xa60e91c7
	.long	0x4d480000,0xc9767586,0x81750c17,0x5a920000
	.long	0x9e8b3b5d,0xc53d5de5,0x75250000,0xc4605202
	.long	0x8a20979b,0x3ffe0000,0xb17217f7,0xd1cf79ab
	.long	0x40000000,0x935d8ddd,0xaaa8ac16,0x3fff0000
	.long	0x80000000,0x00000000,0x40020000,0xa0000000
	.long	0x00000000,0x40050000,0xc8000000,0x00000000
	.long	0x400c0000,0x9c400000,0x00000000,0x40190000
	.long	0xbebc2000,0x00000000,0x40340000,0x8e1bc9bf
	.long	0x04000000,0x40690000,0x9dc5ada8,0x2b70b59d
	.long	0x40d30000,0xc2781f49,0xffcfa6d5,0x41a80000
	.long	0x93ba47c9,0x80e98cdf,0x43510000,0xaa7eebfb
	.long	0x9df9de8d,0x46a30000,0xe319a0ae,0xa60e91c6
	.long	0x4d480000,0xc9767586,0x81750c17,0x5a920000
	.long	0x9e8b3b5d,0xc53d5de4,0x75250000,0xc4605202
	.long	0x8a20979a,0x3ffe0000,0xb17217f7,0xd1cf79ac
	.long	0x40000000,0x935d8ddd,0xaaa8ac17,0x3fff0000
	.long	0x80000000,0x00000000,0x40020000,0xa0000000
	.long	0x00000000,0x40050000,0xc8000000,0x00000000
	.long	0x400c0000,0x9c400000,0x00000000,0x40190000
	.long	0xbebc2000,0x00000000,0x40340000,0x8e1bc9bf
	.long	0x04000000,0x40690000,0x9dc5ada8,0x2b70b59e
	.long	0x40d30000,0xc2781f49,0xffcfa6d6,0x41a80000
	.long	0x93ba47c9,0x80e98ce0,0x43510000,0xaa7eebfb
	.long	0x9df9de8e,0x46a30000,0xe319a0ae,0xa60e91c7
	.long	0x4d480000,0xc9767586,0x81750c18,0x5a920000
	.long	0x9e8b3b5d,0xc53d5de5,0x75250000,0xc4605202
	.long	0x8a20979b,0x2f003229,0x00005bee,0xff540281
	.long	0x00007fff,0x30280000,0x02407fff,0x0c403fff
	.long	0x6d0000c0,0x0c40400c,0x6e0000a4,0xf2284803
	.long	0x0000f200,0x6000f23c,0x88000000,0x00004a29
	.long	0x00046b5e,0x2f003d69,0x0000ff84,0x2d690004
	.long	0xff882d69,0x0008ff8c,0x41eeff84,0x61ff0000
	.long	0x60ba4480,0xd09ff22e,0xd080ff84,0x0c40c001
	.long	0x6c36f21f,0x9000223c,0x80000000,0x0480ffff
	.long	0xc0014480,0x0c000020,0x6c0ae0a9,0x42a72f01
	.long	0x42a76028,0x04000020,0xe0a92f01,0x42a742a7
	.long	0x601af229,0xd0800000,0xf21f9000,0x06403fff
	.long	0x484042a7,0x2f3c8000,0x00002f00,0xf200b000
	.long	0x123c0000,0xf21f4823,0x60ff0000,0x04ce201f
	.long	0xc1494a29,0x00006bff,0x0000038c,0x60ff0000
	.long	0x03c44a29,0x00046a16,0x201ff200,0x9000123c
	.long	0x0003f229,0x48000000,0x60ff0000,0x049e201f
	.long	0x204960ff,0x000002e2,0x00010000,0x80000000
	.long	0x00000000,0x00000000,0x422eff65,0x2f00422e
	.long	0xff5c600c,0x422eff65,0x2f001d7c,0x0001ff5c
	.long	0x48e73f00,0x36280000,0x3d43ff58,0x02830000
	.long	0x7fff2828,0x00042a28,0x00084a83,0x663c263c
	.long	0x00003ffe,0x4a846616,0x28054285,0x04830000
	.long	0x00204286,0xedc46000,0xedac9686,0x60224286
	.long	0xedc46000,0x9686edac,0x2e05edad,0x44860686
	.long	0x00000020,0xecaf8887,0x60060683,0x00003ffe
	.long	0x30290000,0x3d40ff5a,0x322eff58,0xb1810281
	.long	0x00008000,0x3d41ff5e,0x02800000,0x7fff2229
	.long	0x00042429,0x00084a80,0x663c203c,0x00003ffe
	.long	0x4a816616,0x22024282,0x04800000,0x00204286
	.long	0xedc16000,0xeda99086,0x60224286,0xedc16000
	.long	0x9086eda9,0x2e02edaa,0x44860686,0x00000020
	.long	0xecaf8287,0x60060680,0x00003ffe,0x2d43ff54
	.long	0x2f009083,0x42864283,0x227c0000,0x00004a80
	.long	0x6c06201f,0x6000006a,0x588f4a86,0x6e0eb284
	.long	0x6608b485,0x66046000,0x01366508,0x94859384
	.long	0x42865283,0x4a80670e,0xd683d482,0xe39155c6
	.long	0x52895380,0x60d4202e,0xff544a81,0x66162202
	.long	0x42820480,0x00000020,0x4286edc1,0x6000eda9
	.long	0x9086601c,0x4286edc1,0x60006b14,0x9086eda9
	.long	0x2e02edaa,0x44860686,0x00000020,0xecaf8287
	.long	0x0c800000,0x41fe6c2a,0x3d40ff90,0x2d41ff94
	.long	0x2d42ff98,0x2c2eff54,0x3d46ff84,0x2d44ff88
	.long	0x2d45ff8c,0xf22e4800,0xff901d7c,0x0001ff5d
	.long	0x60362d41,0xff942d42,0xff980480,0x00003ffe
	.long	0x3d40ff90,0x2c2eff54,0x04860000,0x3ffe2d46
	.long	0xff54f22e,0x4800ff90,0x3d46ff84,0x2d44ff88
	.long	0x2d45ff8c,0x422eff5d,0x4a2eff5c,0x67222c2e
	.long	0xff545386,0xb0866d18,0x6e0eb284,0x6608b485
	.long	0x66046000,0x007a6508,0xf22e4828,0xff845283
	.long	0x3c2eff5a,0x6c04f200,0x001a4286,0x3c2eff5e
	.long	0x7e08eeae,0x02830000,0x007f8686,0x1d43ff65
	.long	0x4cdf00fc,0x201ff200,0x90004a2e,0xff5d6710
	.long	0x123c0000,0xf23a4823,0xfdc060ff,0x0000024c
	.long	0x123c0003,0xf2000000,0x60ff0000,0x023e5283
	.long	0x0c800000,0x00086c04,0xe1ab6002,0x4283f23c
	.long	0x44000000,0x0000422e,0xff5d6000,0xff942c03
	.long	0x02860000,0x00014a86,0x6700ff86,0x52833c2e
	.long	0xff5a0a86,0x00008000,0x3d46ff5a,0x6000ff72
	.long	0x7fff0000,0xffffffff,0xffffffff,0x4a280000
	.long	0x6b12f23c,0x44007f80,0x000000ae,0x02000410
	.long	0xff644e75,0xf23c4400,0xff800000,0x00ae0a00
	.long	0x0410ff64,0x4e7500ae,0x01002080,0xff64f23a
	.long	0xd080ffbe,0x4e7500ae,0x00000800,0xff646008
	.long	0x00ae0000,0x0a28ff64,0x22482200,0x020100c0
	.long	0x660e4a28,0x00006a18,0x08ee0003,0xff646010
	.long	0x2f094a28,0x00005bc1,0x61ff0000,0x0196225f
	.long	0xf210d080,0x102eff62,0x0200000a,0x66024e75
	.long	0x3d690000,0xff842d69,0x0004ff88,0x2d690008
	.long	0xff8c41ee,0xff8461ff,0x00005cd0,0x06800000
	.long	0x6000026e,0x8000ff84,0x816eff84,0xf22ed040
	.long	0xff844e75,0x00ae0000,0x0a28ff64,0x4a105bc1
	.long	0x61ff0000,0x013ef210,0xd080f23c,0x44800000
	.long	0x00004e75,0x00ae0000,0x0a28ff64,0x51c161ff
	.long	0x00000120,0xf210d080,0xf23c4480,0x00000000
	.long	0x4e7500ae,0x00001048,0xff641200,0x020100c0
	.long	0x675c4a28,0x00046b24,0x3d680000,0xff842d68
	.long	0x0004ff88,0x2d680008,0xff8c41ee,0xff8448e7
	.long	0xc08061ff,0x00005c44,0x4cdf0103,0x0c010040
	.long	0x660e4aa8,0x00086614,0x4a280007,0x660e601e
	.long	0x22280008,0x02810000,0x07ff6712,0x00ae0000
	.long	0x0200ff64,0x600800ae,0x00001248,0xff644a28
	.long	0x00005bc1,0x61ff0000,0x5f261d40,0xff64f210
	.long	0xd080f23c,0x44800000,0x00004e75,0x00ae0000
	.long	0x1248ff64,0x51c161ff,0x00005f04,0x1d40ff64
	.long	0xf210d080,0xf23c4480,0x00000000,0x4e75f327
	.long	0x4a2f0002,0x6b2edffc,0x0000000c,0xf294000e
	.long	0xf2810014,0x006e0208,0xff664e75,0x00ae0800
	.long	0x0208ff64,0x4e751d7c,0x0004ff64,0x006e0208
	.long	0xff664e75,0x006e0208,0xff6661ff,0x00000bae
	.long	0xdffc0000,0x000c4e75,0xf3274a2f,0x00026bea
	.long	0xdffc0000,0x000cf200,0xa80081ae,0xff644e75
	.long	0x00ae0000,0x0a28ff64,0x02410010,0xe8080200
	.long	0x000f8001,0x2200e309,0x1d7b000a,0xff6441fb
	.long	0x16204e75,0x04040400,0x04040400,0x04040400
	.long	0x00000000,0x0c0c080c,0x0c0c080c,0x0c0c080c
	.long	0x00000000,0x00000000,0x00000000,0x00000000
	.long	0x00000000,0x00000000,0x00000000,0x00000000
	.long	0x00000000,0x00000000,0x00000000,0x00000000
	.long	0x00000000,0x00000000,0x00000001,0x00000000
	.long	0x3f810000,0x00000000,0x00000000,0x00000000
	.long	0x3f810000,0x00000000,0x00000000,0x00000000
	.long	0x3f810000,0x00000000,0x00000000,0x00000000
	.long	0x3f810000,0x00000100,0x00000000,0x00000000
	.long	0x3c010000,0x00000000,0x00000000,0x00000000
	.long	0x3c010000,0x00000000,0x00000000,0x00000000
	.long	0x3c010000,0x00000000,0x00000000,0x00000000
	.long	0x3c010000,0x00000000,0x00000800,0x00000000
	.long	0x00000000,0x00000000,0x00000000,0x00000000
	.long	0x00000000,0x00000000,0x00000000,0x00000000
	.long	0x00000000,0x00000000,0x00000000,0x00000000
	.long	0x00000000,0x00000000,0x00000000,0x00000000
	.long	0x80000000,0x00000000,0x00000000,0x00000000
	.long	0x80000000,0x00000000,0x00000000,0x00000000
	.long	0x80000000,0x00000000,0x00000001,0x00000000
	.long	0x80000000,0x00000000,0x00000000,0x00000000
	.long	0xbf810000,0x00000000,0x00000000,0x00000000
	.long	0xbf810000,0x00000000,0x00000000,0x00000000
	.long	0xbf810000,0x00000100,0x00000000,0x00000000
	.long	0xbf810000,0x00000000,0x00000000,0x00000000
	.long	0xbc010000,0x00000000,0x00000000,0x00000000
	.long	0xbc010000,0x00000000,0x00000000,0x00000000
	.long	0xbc010000,0x00000000,0x00000800,0x00000000
	.long	0xbc010000,0x00000000,0x00000000,0x00000000
	.long	0x4a280000,0x6b10f23c,0x44000000,0x00001d7c
	.long	0x0004ff64,0x4e75f23c,0x44008000,0x00001d7c
	.long	0x000cff64,0x4e754a29,0x00006bea,0x60d84a28
	.long	0x00006b10,0xf23c4400,0x7f800000,0x1d7c0002
	.long	0xff644e75,0xf23c4400,0xff800000,0x1d7c000a
	.long	0xff644e75,0x4a290000,0x6bea60d8,0x4a280000
	.long	0x6ba460d0,0x4a280000,0x6b00fbbc,0x60c64a28
	.long	0x00006b16,0x60be4a28,0x00006b0e,0xf23c4400
	.long	0x3f800000,0x422eff64,0x4e75f23c,0x4400bf80
	.long	0x00001d7c,0x0008ff64,0x4e753fff,0x0000c90f
	.long	0xdaa22168,0xc235bfff,0x0000c90f,0xdaa22168
	.long	0xc2354a28,0x00006b0e,0xf2009000,0xf23a4800
	.long	0xffda6000,0xfcf0f200,0x9000f23a,0x4800ffd8
	.long	0x6000fcea,0xf23c4480,0x3f800000,0x4a280000
	.long	0x6a10f23c,0x44008000,0x00001d7c,0x000cff64
	.long	0x6040f23c,0x44000000,0x00001d7c,0x0004ff64
	.long	0x6030f23a,0x4880faea,0x61ff0000,0x00286000
	.long	0xfb16f228,0x48800000,0x61ff0000,0x00186000
	.long	0x030ef228,0x48800000,0x61ff0000,0x00086000
	.long	0x02ee102e,0xff430240,0x0007303b,0x02064efb
	.long	0x00020010,0x00180020,0x0026002c,0x00320038
	.long	0x003ef22e,0xf040ffdc,0x4e75f22e,0xf040ffe8
	.long	0x4e75f200,0x05004e75,0xf2000580,0x4e75f200
	.long	0x06004e75,0xf2000680,0x4e75f200,0x07004e75
	.long	0xf2000780,0x4e75122e,0xff4f67ff,0xfffff7dc
	.long	0x0c010001,0x67000096,0x0c010002,0x67ffffff
	.long	0xfa880c01,0x000467ff,0xfffff7c0,0x0c010005
	.long	0x67ff0000,0x024060ff,0x0000024a,0x122eff4f
	.long	0x67ffffff,0xfa640c01,0x000167ff,0xfffffa5a
	.long	0x0c010002,0x67ffffff,0xfa500c01,0x000467ff
	.long	0xfffffa46,0x0c010003,0x67ff0000,0x021860ff
	.long	0x00000202,0x122eff4f,0x67ff0000,0x004e0c01
	.long	0x000167ff,0x00000028,0x0c010002,0x67ffffff
	.long	0xfa180c01,0x000467ff,0x00000030,0x0c010003
	.long	0x67ff0000,0x01e060ff,0x000001ca,0x12280000
	.long	0x10290000,0xb1010201,0x00801d41,0xff654a00
	.long	0x6a00fdc4,0x6000fdd0,0x422eff65,0x2f001228
	.long	0x00001029,0x0000b101,0x02010080,0x1d41ff65
	.long	0x0c2e0004,0xff4f660c,0x41e90000,0x201f60ff
	.long	0xfffff9c6,0xf21f9000,0xf2294800,0x00004a29
	.long	0x00006b02,0x4e751d7c,0x0008ff64,0x4e75122e
	.long	0xff4f67ff,0xfffff6e0,0x0c010001,0x6700ff8e
	.long	0x0c010002,0x67ffffff,0xf9800c01,0x000467ff
	.long	0xfffff6c4,0x0c010003,0x67ff0000,0x014860ff
	.long	0x00000132,0x122eff4f,0x67ffffff,0xf95c0c01
	.long	0x000167ff,0xfffff952,0x0c010002,0x67ffffff
	.long	0xf9480c01,0x000467ff,0xfffff93e,0x0c010003
	.long	0x67ff0000,0x011060ff,0x000000fa,0x122eff4f
	.long	0x6700ff46,0x0c010001,0x6700ff22,0x0c010002
	.long	0x67ffffff,0xf9140c01,0x000467ff,0xffffff2c
	.long	0x0c010003,0x67ff0000,0x00dc60ff,0x000000c6
	.long	0x122eff4f,0x67ffffff,0xf51e0c01,0x000167ff
	.long	0xfffffce6,0x0c010002,0x67ffffff,0xfd0a0c01
	.long	0x000467ff,0xfffff500,0x0c010003,0x67ff0000
	.long	0x00a460ff,0x0000008e,0x122eff4f,0x67ffffff
	.long	0xf4e60c01,0x000167ff,0xfffffcae,0x0c010002
	.long	0x67ffffff,0xfcd20c01,0x000467ff,0xfffff4c8
	.long	0x0c010003,0x67ff0000,0x006c60ff,0x00000056
	.long	0x122eff4f,0x67ffffff,0xf8800c01,0x000367ff
	.long	0x00000052,0x0c010005,0x67ff0000,0x003860ff
	.long	0xfffff866,0x122eff4f,0x0c010003,0x67340c01
	.long	0x0005671e,0x6058122e,0xff4f0c01,0x00036708
	.long	0x0c010005,0x670c6036,0x00ae0100,0x4080ff64
	.long	0x6010f229,0x48000000,0xf200a800,0x81aeff64
	.long	0x4e75f229,0x48000000,0x4a290000,0x6b081d7c
	.long	0x0001ff64,0x4e751d7c,0x0009ff64,0x4e75f228
	.long	0x48000000,0xf200a800,0x81aeff64,0x4e75f228
	.long	0x48000000,0x4a280000,0x6bdc1d7c,0x0001ff64
	.long	0x4e751d7c,0x0009ff64,0x4e75122e,0xff4e67ff
	.long	0xffffd936,0x0c010001,0x67ffffff,0xfba60c01
	.long	0x000267ff,0xfffffbca,0x0c010004,0x67ffffff
	.long	0xd9f60c01,0x000367ff,0xffffffb6,0x60ffffff
	.long	0xffa0122e,0xff4e67ff,0xffffe620,0x0c010001
	.long	0x67ffffff,0xfb6e0c01,0x000267ff,0xfffffbc8
	.long	0x0c010004,0x67ffffff,0xe7560c01,0x000367ff
	.long	0xffffff7e,0x60ffffff,0xff68122e,0xff4e67ff
	.long	0xffffd4d2,0x0c010001,0x67ffffff,0xfb360c01
	.long	0x000267ff,0xfffffb9a,0x0c010004,0x67ffffff
	.long	0xd76a0c01,0x000367ff,0xffffff46,0x60ffffff
	.long	0xff30122e,0xff4e67ff,0xffffd972,0x0c010001
	.long	0x67ffffff,0xfafe0c01,0x000267ff,0xfffffb6a
	.long	0x0c010004,0x67ffffff,0xdabc0c01,0x000367ff
	.long	0xffffff0e,0x60ffffff,0xfef8122e,0xff4e67ff
	.long	0xffffca6a,0x0c010001,0x67ffffff,0xfac60c01
	.long	0x000267ff,0xfffffb6e,0x0c010004,0x67ffffff
	.long	0xcc8a0c01,0x000367ff,0xfffffed6,0x60ffffff
	.long	0xfec0122e,0xff4e67ff,0xffffcc76,0x0c010001
	.long	0x67ffffff,0xfa8e0c01,0x000267ff,0xfffff6aa
	.long	0x0c010004,0x67ffffff,0xcd060c01,0x000367ff
	.long	0xfffffe9e,0x60ffffff,0xfe88122e,0xff4e67ff
	.long	0xffffe662,0x0c010001,0x67ffffff,0xfa560c01
	.long	0x000267ff,0xfffff672,0x0c010004,0x67ffffff
	.long	0xe6c60c01,0x000367ff,0xfffffe66,0x60ffffff
	.long	0xfe50122e,0xff4e67ff,0xffffb372,0x0c010001
	.long	0x67ffffff,0xfa1e0c01,0x000267ff,0xfffff63a
	.long	0x0c010004,0x67ffffff,0xb5380c01,0x000367ff
	.long	0xfffffe2e,0x60ffffff,0xfe18122e,0xff4e67ff
	.long	0xffffbdfc,0x0c010001,0x67ffffff,0xf9e60c01
	.long	0x000267ff,0xfffff602,0x0c010004,0x67ffffff
	.long	0xbf420c01,0x000367ff,0xfffffdf6,0x60ffffff
	.long	0xfde0122e,0xff4e67ff,0xffffd17a,0x0c010001
	.long	0x67ffffff,0xfa2a0c01,0x000267ff,0xfffffa00
	.long	0x0c010004,0x67ffffff,0xd3080c01,0x000367ff
	.long	0xfffffdbe,0x60ffffff,0xfda8122e,0xff4e67ff
	.long	0xffffeb64,0x0c010001,0x67ffffff,0xf9f20c01
	.long	0x000267ff,0xfffff9c8,0x0c010004,0x67ffffff
	.long	0xec200c01,0x000367ff,0xfffffd86,0x60ffffff
	.long	0xfd70122e,0xff4e67ff,0xffffec24,0x0c010001
	.long	0x67ffffff,0xf9ba0c01,0x000267ff,0xfffff990
	.long	0x0c010004,0x67ffffff,0xed360c01,0x000367ff
	.long	0xfffffd4e,0x60ffffff,0xfd38122e,0xff4e67ff
	.long	0xffffe178,0x0c010001,0x67ffffff,0xf51a0c01
	.long	0x000267ff,0xfffff960,0x0c010004,0x67ffffff
	.long	0xe30c0c01,0x000367ff,0xfffffd16,0x60ffffff
	.long	0xfd00122e,0xff4e67ff,0xffffe582,0x0c010001
	.long	0x67ffffff,0xf4e20c01,0x000267ff,0xfffff928
	.long	0x0c010004,0x67ffffff,0xe5940c01,0x000367ff
	.long	0xfffffcde,0x60ffffff,0xfcc8122e,0xff4e67ff
	.long	0xffffe59a,0x0c010001,0x67ffffff,0xf4aa0c01
	.long	0x000267ff,0xfffff8f0,0x0c010004,0x67ffffff
	.long	0xe5d60c01,0x000367ff,0xfffffca6,0x60ffffff
	.long	0xfc90122e,0xff4e67ff,0xffffd530,0x0c010001
	.long	0x67ffffff,0xf8da0c01,0x000267ff,0xfffff888
	.long	0x0c010004,0x67ffffff,0xd5b60c01,0x000367ff
	.long	0xfffffc6e,0x60ffffff,0xfc58122e,0xff4e67ff
	.long	0xffffcac2,0x0c010001,0x67ffffff,0xf8de0c01
	.long	0x000267ff,0xfffff442,0x0c010004,0x67ffffff
	.long	0xcb340c01,0x000367ff,0xfffffc36,0x60ffffff
	.long	0xfc20122e,0xff4e67ff,0xffffb14c,0x0c010001
	.long	0x67ffffff,0xf86a0c01,0x000267ff,0xfffff40a
	.long	0x0c010004,0x67ffffff,0xb30e0c01,0x000367ff
	.long	0xfffffbfe,0x60ffffff,0xfbe8122e,0xff4e67ff
	.long	0xffffd40e,0x0c010001,0x67ffffff,0xf7b60c01
	.long	0x000267ff,0xfffff3d2,0x0c010004,0x67ffffff
	.long	0xd40c0c01,0x000367ff,0xfffffbc6,0x60ffffff
	.long	0xfbb0122e,0xff4e67ff,0xffffd40a,0x0c010001
	.long	0x67ffffff,0xf77e0c01,0x000267ff,0xfffff39a
	.long	0x0c010004,0x67ffffff,0xd41a0c01,0x000367ff
	.long	0xfffffb8e,0x60ffffff,0xfb78122e,0xff4e67ff
	.long	0xffffb292,0x0c010001,0x67ffffff,0xf81a0c01
	.long	0x000267ff,0xfffff83e,0x0c010004,0x67ffffff
	.long	0xb50a0c01,0x000367ff,0xfffff83a,0x60ffffff
	.long	0xf844122e,0xff4e67ff,0xfffff89e,0x0c010001
	.long	0x67ffffff,0xf8ca0c01,0x000267ff,0xfffff8f8
	.long	0x0c010004,0x67ffffff,0xf8800c01,0x000367ff
	.long	0xfffffab4,0x60ffffff,0xfac0122e,0xff4e67ff
	.long	0xfffff96e,0x0c010001,0x67ffffff,0xf99a0c01
	.long	0x000267ff,0xfffff9c8,0x0c010004,0x67ffffff
	.long	0xf9500c01,0x000367ff,0xfffffa7c,0x60ffffff
	.long	0xfa88122e,0xff4e67ff,0xfffff9d8,0x0c010001
	.long	0x67ffffff,0xfa060c01,0x000267ff,0xfffffa34
	.long	0x0c010004,0x67ffffff,0xf9ba0c01,0x000367ff
	.long	0xfffffa44,0x60ffffff,0xfa500c2f,0x00070003
	.long	0x673e1d7c,0x0000ff4e,0x1d7c0000,0xff4ff22e
	.long	0xf080ff78,0x41ef0004,0x43eeff78,0x0c010003
	.long	0x67160c01,0x00026708,0x61ff0000,0x02004e75
	.long	0x61ff0000,0x1b9e4e75,0x61ff0000,0x05e44e75
	.long	0x1d7c0004,0xff4e60c0,0x4afc006d,0x000005d2
	.long	0x00000fc8,0xfffffa6e,0x0000106c,0x00002314
	.long	0x00000000,0xfffffaa6,0x00000000,0xfffffade
	.long	0xfffffb16,0xfffffb4e,0x00000000,0xfffffb86
	.long	0xfffffbbe,0xfffffbf6,0xfffffc2e,0xfffffc66
	.long	0xfffffc9e,0xfffffcd6,0x00000000,0xfffffd0e
	.long	0xfffffd46,0xfffffd7e,0x00000000,0x00001112
	.long	0xfffffdb6,0x00000ca8,0x00000000,0xfffffdee
	.long	0xfffffe26,0xfffffe5e,0xfffffe96,0x0000089e
	.long	0xffffff06,0x00001b84,0x000001de,0x00001854
	.long	0xffffff3e,0xffffff76,0x00001512,0x00001f4c
	.long	0x00000000,0x00000000,0x00000000,0x00000000
	.long	0x00000000,0x00000000,0x00000000,0xfffffece
	.long	0xfffffece,0xfffffece,0xfffffece,0xfffffece
	.long	0xfffffece,0xfffffece,0xfffffece,0x000013b0
	.long	0x00000000,0x00000f56,0x00000000,0x00000000
	.long	0x00000000,0x00000000,0x00000000,0x000005c0
	.long	0x00002302,0x00000000,0x00000000,0x000005ca
	.long	0x0000230c,0x00000000,0x00000000,0x00000000
	.long	0x00000000,0x00000000,0x00000000,0x00000000
	.long	0x00000000,0x00000000,0x00000000,0x00000000
	.long	0x00000000,0x00000000,0x00000000,0x00000000
	.long	0x00000000,0x00000000,0x00000000,0x00001100
	.long	0x00000000,0x00000c96,0x00000000,0x0000110a
	.long	0x00000000,0x00000ca0,0x00000000,0x0000088c
	.long	0x00000000,0x00001b72,0x000001cc,0x00000896
	.long	0x00000000,0x00001b7c,0x000001d6,0x00001f3a
	.long	0x00000000,0x00000000,0x00000000,0x00001f44
	.long	0xffffc001,0xffffff81,0xfffffc01,0x00004000
	.long	0x0000007f,0x000003ff,0x02000030,0x00000040
	.long	0x60080200,0x00300000,0x00802d40,0xff5c4241
	.long	0x122eff4f,0xe709822e,0xff4e6600,0x02e43d69
	.long	0x0000ff90,0x2d690004,0xff942d69,0x0008ff98
	.long	0x3d680000,0xff842d68,0x0004ff88,0x2d680008
	.long	0xff8c61ff,0x000024ce,0x2f0061ff,0x00002572
	.long	0xd197322e,0xff5eec09,0x201fb0bb,0x14846700
	.long	0x011e6d00,0x0062b0bb,0x14846700,0x021a6e00
	.long	0x014af22e,0xd080ff90,0xf22e9000,0xff5cf23c
	.long	0x88000000,0x0000f22e,0x4823ff84,0xf201a800
	.long	0xf23c9000,0x00000000,0x83aeff64,0xf22ef080
	.long	0xff842f02,0x322eff84,0x24010281,0x00007fff
	.long	0x02428000,0x92808242,0x3d41ff84,0x241ff22e
	.long	0xd080ff84,0x4e75f22e,0xd080ff90,0xf22e9000
	.long	0xff5cf23c,0x88000000,0x0000f22e,0x4823ff84
	.long	0xf201a800,0xf23c9000,0x00000000,0x83aeff64
	.long	0x00ae0000,0x1048ff64,0x122eff62,0x02010013
	.long	0x661c082e,0x0003ff64,0x56c1202e,0xff5c61ff
	.long	0x00004fcc,0x812eff64,0xf210d080,0x4e75222e
	.long	0xff5c0201,0x00c06634,0xf22ef080,0xff842f02
	.long	0x322eff84,0x34010281,0x00007fff,0x92800481
	.long	0x00006000,0x02417fff,0x02428000,0x82423d41
	.long	0xff84241f,0xf22ed040,0xff8460a6,0xf22ed080
	.long	0xff90222e,0xff5c0201,0x0030f201,0x9000f22e
	.long	0x4823ff84,0xf23c9000,0x00000000,0x60aaf22e
	.long	0xd080ff90,0xf22e9000,0xff5cf23c,0x88000000
	.long	0x0000f22e,0x4823ff84,0xf201a800,0xf23c9000
	.long	0x00000000,0x83aeff64,0xf2000098,0xf23c58b8
	.long	0x0002f293,0xff3c6000,0xfee408ee,0x0003ff66
	.long	0xf22ed080,0xff90f23c,0x90000000,0x0010f23c
	.long	0x88000000,0x0000f22e,0x4823ff84,0xf201a800
	.long	0xf23c9000,0x00000000,0x83aeff64,0x122eff62
	.long	0x0201000b,0x6620f22e,0xf080ff84,0x41eeff84
	.long	0x222eff5c,0x61ff0000,0x4dd8812e,0xff64f22e
	.long	0xd080ff84,0x4e75f22e,0xd040ff90,0x222eff5c
	.long	0x020100c0,0x6652f22e,0x9000ff5c,0xf23c8800
	.long	0x00000000,0xf22e48a3,0xff84f23c,0x90000000
	.long	0x0000f22e,0xf040ff84,0x2f02322e,0xff842401
	.long	0x02810000,0x7fff0242,0x80009280,0x06810000
	.long	0x60000241,0x7fff8242,0x3d41ff84,0x241ff22e
	.long	0xd040ff84,0x6000ff80,0x222eff5c,0x02010030
	.long	0xf2019000,0x60a6f22e,0xd080ff90,0xf22e9000
	.long	0xff5cf23c,0x88000000,0x0000f22e,0x4823ff84
	.long	0xf201a800,0xf23c9000,0x00000000,0x83aeff64
	.long	0xf2000098,0xf23c58b8,0x0002f292,0xfde0f294
	.long	0xfefaf22e,0xd040ff90,0x222eff5c,0x020100c0
	.long	0x00010010,0xf2019000,0xf23c8800,0x00000000
	.long	0xf22e48a3,0xff84f23c,0x90000000,0x0000f200
	.long	0x0498f23c,0x58b80002,0xf293fda2,0x6000febc
	.long	0x323b120a,0x4efb1006,0x4afc0030,0xfd120072
	.long	0x00cc006c,0xfd120066,0x00000000,0x00720072
	.long	0x0060006c,0x00720066,0x00000000,0x009e0060
	.long	0x009e006c,0x009e0066,0x00000000,0x006c006c
	.long	0x006c006c,0x006c0066,0x00000000,0xfd120072
	.long	0x00cc006c,0xfd120066,0x00000000,0x00660066
	.long	0x00660066,0x00660066,0x00000000,0x60ff0000
	.long	0x230e60ff,0x00002284,0x60ff0000,0x227e1028
	.long	0x00001229,0x0000b101,0x6a10f23c,0x44008000
	.long	0x00001d7c,0x000cff64,0x4e75f23c,0x44000000
	.long	0x00001d7c,0x0004ff64,0x4e75f229,0xd0800000
	.long	0x10280000,0x12290000,0xb1016a10,0xf2000018
	.long	0xf200001a,0x1d7c000a,0xff644e75,0xf2000018
	.long	0x1d7c0002,0xff644e75,0xf228d080,0x00001028
	.long	0x00001229,0x0000b101,0x6ae260d0,0x02000030
	.long	0x00000040,0x60080200,0x00300000,0x00802d40
	.long	0xff5c122e,0xff4e6600,0x02620200,0x00c06600
	.long	0x007c4a28,0x00006a06,0x08ee0003,0xff64f228
	.long	0xd0800000,0x4e750200,0x00c06600,0x006008ee
	.long	0x0003ff66,0x4a280000,0x6a0608ee,0x0003ff64
	.long	0xf228d080,0x0000082e,0x0003ff62,0x66024e75
	.long	0x3d680000,0xff842d68,0x0004ff88,0x2d680008
	.long	0xff8c41ee,0xff8461ff,0x00004950,0x44400640
	.long	0x6000322e,0xff840241,0x80000240,0x7fff8041
	.long	0x3d40ff84,0xf22ed040,0xff844e75,0x0c000040
	.long	0x667e3d68,0x0000ff84,0x2d680004,0xff882d68
	.long	0x0008ff8c,0x61ff0000,0x206c0c80,0x0000007f
	.long	0x6c000092,0x0c80ffff,0xff816700,0x01786d00
	.long	0x00f4f23c,0x88000000,0x0000f22e,0x9000ff5c
	.long	0xf22e4800,0xff84f201,0xa800f23c,0x90000000
	.long	0x000083ae,0xff642f02,0xf22ef080,0xff84322e
	.long	0xff843401,0x02810000,0x7fff9280,0x02428000
	.long	0x84413d42,0xff84241f,0xf22ed080,0xff844e75
	.long	0x3d680000,0xff842d68,0x0004ff88,0x2d680008
	.long	0xff8c61ff,0x00001fee,0x0c800000,0x03ff6c00
	.long	0x00140c80,0xfffffc01,0x670000fa,0x6d000076
	.long	0x6000ff80,0x08ee0003,0xff664a2e,0xff846a06
	.long	0x08ee0003,0xff64122e,0xff620201,0x000b661a
	.long	0x41eeff84,0x222eff5c,0x61ff0000,0x4a74812e
	.long	0xff64f22e,0xd080ff84,0x4e752d6e,0xff88ff94
	.long	0x2d6eff8c,0xff98322e,0xff842f02,0x34010281
	.long	0x00007fff,0x92800242,0x80000681,0x00006000
	.long	0x02417fff,0x84413d42,0xff90f22e,0xd040ff90
	.long	0x241f60ac,0xf23c8800,0x00000000,0xf22e9000
	.long	0xff5cf22e,0x4800ff84,0xf23c9000,0x00000000
	.long	0xf201a800,0x83aeff64,0x00ae0000,0x1048ff64
	.long	0x122eff62,0x02010013,0x661c082e,0x0003ff64
	.long	0x56c1202e,0xff5c61ff,0x00004ae4,0x812eff64
	.long	0xf210d080,0x4e752f02,0x322eff84,0x24010281
	.long	0x00007fff,0x02428000,0x92800481,0x00006000
	.long	0x02417fff,0x82423d41,0xff84241f,0xf22ed040
	.long	0xff8460b6,0xf23c8800,0x00000000,0xf22e9000
	.long	0xff5cf22e,0x4800ff84,0xf201a800,0xf23c9000
	.long	0x00000000,0x83aeff64,0xf2000098,0xf23c58b8
	.long	0x0002f293,0xff746000,0xfe7e0c01,0x00046700
	.long	0xfdb60c01,0x000567ff,0x00001f98,0x0c010003
	.long	0x67ff0000,0x1fa2f228,0x48000000,0xf200a800
	.long	0xe1981d40,0xff644e75,0x51fc51fc,0x51fc51fc
	.long	0x00003fff,0x0000007e,0x000003fe,0xffffc001
	.long	0xffffff81,0xfffffc01,0x02000030,0x00000040
	.long	0x60080200,0x00300000,0x00802d40,0xff5c4241
	.long	0x122eff4f,0xe709822e,0xff4e6600,0x02d63d69
	.long	0x0000ff90,0x2d690004,0xff942d69,0x0008ff98
	.long	0x3d680000,0xff842d68,0x0004ff88,0x2d680008
	.long	0xff8c61ff,0x00001e0e,0x2f0061ff,0x00001eb2
	.long	0x4497d197,0x322eff5e,0xec09201f,0xb0bb148e
	.long	0x6f000074,0xb0bb1520,0xff7a6700,0x020c6e00
	.long	0x013cf22e,0xd080ff90,0xf22e9000,0xff5cf23c
	.long	0x88000000,0x0000f22e,0x4820ff84,0xf201a800
	.long	0xf23c9000,0x00000000,0x83aeff64,0xf22ef080
	.long	0xff842f02,0x322eff84,0x24010281,0x00007fff
	.long	0x02428000,0x92808242,0x3d41ff84,0x241ff22e
	.long	0xd080ff84,0x4e750000,0x7fff0000,0x407f0000
	.long	0x43ff201f,0x60c62f00,0xf22ed080,0xff90f22e
	.long	0x9000ff5c,0xf23c8800,0x00000000,0xf22e4820
	.long	0xff84f200,0xa800f23c,0x90000000,0x000081ae
	.long	0xff64f227,0xe0013017,0xdffc0000,0x000c0280
	.long	0x00007fff,0x9097b0bb,0x14ae6db6,0x201f00ae
	.long	0x00001048,0xff64122e,0xff620201,0x0013661c
	.long	0x082e0003,0xff6456c1,0x202eff5c,0x61ff0000
	.long	0x48de812e,0xff64f210,0xd0804e75,0x222eff5c
	.long	0x020100c0,0x6634f22e,0xf080ff84,0x2f02322e
	.long	0xff843401,0x02810000,0x7fff9280,0x04810000
	.long	0x60000241,0x7fff0242,0x80008242,0x3d41ff84
	.long	0x241ff22e,0xd040ff84,0x60a6f22e,0xd080ff90
	.long	0x222eff5c,0x02010030,0xf2019000,0xf22e4820
	.long	0xff84f23c,0x90000000,0x000060aa,0x08ee0003
	.long	0xff66f22e,0xd080ff90,0xf23c9000,0x00000010
	.long	0xf23c8800,0x00000000,0xf22e4820,0xff84f201
	.long	0xa800f23c,0x90000000,0x000083ae,0xff64122e
	.long	0xff620201,0x000b6620,0xf22ef080,0xff8441ee
	.long	0xff84222e,0xff5c61ff,0x00004726,0x812eff64
	.long	0xf22ed080,0xff844e75,0xf22ed040,0xff90222e
	.long	0xff5c0201,0x00c06652,0xf22e9000,0xff5cf23c
	.long	0x88000000,0x0000f22e,0x48a0ff84,0xf23c9000
	.long	0x00000000,0xf22ef040,0xff842f02,0x322eff84
	.long	0x24010281,0x00007fff,0x02428000,0x92800681
	.long	0x00006000,0x02417fff,0x82423d41,0xff84241f
	.long	0xf22ed040,0xff846000,0xff80222e,0xff5c0201
	.long	0x0030f201,0x900060a6,0xf22ed080,0xff90f22e
	.long	0x9000ff5c,0xf23c8800,0x00000000,0xf22e4820
	.long	0xff84f201,0xa800f23c,0x90000000,0x000083ae
	.long	0xff64f200,0x0098f23c,0x58b80001,0xf292fdee
	.long	0xf294fefa,0xf22ed040,0xff90222e,0xff5c0201
	.long	0x00c00001,0x0010f201,0x9000f23c,0x88000000
	.long	0x0000f22e,0x48a0ff84,0xf23c9000,0x00000000
	.long	0xf2000498,0xf23c58b8,0x0001f293,0xfdb06000
	.long	0xfebc323b,0x120a4efb,0x10064afc,0x0030fd20
	.long	0x009e0072,0x0060fd20,0x00660000,0x00000072
	.long	0x006c0072,0x00600072,0x00660000,0x000000d0
	.long	0x00d0006c,0x006000d0,0x00660000,0x00000060
	.long	0x00600060,0x00600060,0x00660000,0x0000fd20
	.long	0x009e0072,0x0060fd20,0x00660000,0x00000066
	.long	0x00660066,0x00660066,0x00660000,0x000060ff
	.long	0x00001bd8,0x60ff0000,0x1bd260ff,0x00001c50
	.long	0x10280000,0x12290000,0xb1016a10,0xf23c4400
	.long	0x80000000,0x1d7c000c,0xff644e75,0xf23c4400
	.long	0x00000000,0x1d7c0004,0xff644e75,0x006e0410
	.long	0xff661028,0x00001229,0x0000b101,0x6a10f23c
	.long	0x4400ff80,0x00001d7c,0x000aff64,0x4e75f23c
	.long	0x44007f80,0x00001d7c,0x0002ff64,0x4e751029
	.long	0x00001228,0x0000b101,0x6a16f229,0xd0800000
	.long	0xf2000018,0xf200001a,0x1d7c000a,0xff644e75
	.long	0xf229d080,0x0000f200,0x00181d7c,0x0002ff64
	.long	0x4e750200,0x00300000,0x00406008,0x02000030
	.long	0x00000080,0x2d40ff5c,0x122eff4e,0x66000276
	.long	0x020000c0,0x66000090,0x2d680004,0xff882d68
	.long	0x0008ff8c,0x30280000,0x0a408000,0x6a061d7c
	.long	0x0008ff64,0x3d40ff84,0xf22ed080,0xff844e75
	.long	0x020000c0,0x666008ee,0x0003ff66,0x2d680004
	.long	0xff882d68,0x0008ff8c,0x30280000,0x0a408000
	.long	0x6a061d7c,0x0008ff64,0x3d40ff84,0xf22ed080
	.long	0xff84082e,0x0003ff62,0x66024e75,0x41eeff84
	.long	0x61ff0000,0x42664440,0x06406000,0x322eff84
	.long	0x02418000,0x02407fff,0x80413d40,0xff84f22e
	.long	0xd040ff84,0x4e750c00,0x0040667e,0x3d680000
	.long	0xff842d68,0x0004ff88,0x2d680008,0xff8c61ff
	.long	0x00001982,0x0c800000,0x007f6c00,0x00900c80
	.long	0xffffff81,0x67000178,0x6d0000f4,0xf23c8800
	.long	0x00000000,0xf22e9000,0xff5cf22e,0x481aff84
	.long	0xf201a800,0xf23c9000,0x00000000,0x83aeff64
	.long	0x2f02f22e,0xf080ff84,0x322eff84,0x34010281
	.long	0x00007fff,0x92800242,0x80008441,0x3d42ff84
	.long	0x241ff22e,0xd080ff84,0x4e753d68,0x0000ff84
	.long	0x2d680004,0xff882d68,0x0008ff8c,0x61ff0000
	.long	0x19040c80,0x000003ff,0x6c120c80,0xfffffc01
	.long	0x670000fc,0x6d000078,0x6000ff82,0x08ee0003
	.long	0xff660a2e,0x0080ff84,0x6a0608ee,0x0003ff64
	.long	0x122eff62,0x0201000b,0x661a41ee,0xff84222e
	.long	0xff5c61ff,0x0000438a,0x812eff64,0xf22ed080
	.long	0xff844e75,0x2d6eff88,0xff942d6e,0xff8cff98
	.long	0x322eff84,0x2f022401,0x02810000,0x7fff0242
	.long	0x80009280,0x06810000,0x60000241,0x7fff8242
	.long	0x3d41ff90,0xf22ed040,0xff90241f,0x60acf23c
	.long	0x88000000,0x0000f22e,0x9000ff5c,0xf22e481a
	.long	0xff84f23c,0x90000000,0x0000f201,0xa80083ae
	.long	0xff6400ae,0x00001048,0xff64122e,0xff620201
	.long	0x0013661c,0x082e0003,0xff6456c1,0x202eff5c
	.long	0x61ff0000,0x43fa812e,0xff64f210,0xd0804e75
	.long	0x2f02322e,0xff842401,0x02810000,0x7fff0242
	.long	0x80009280,0x04810000,0x60000241,0x7fff8242
	.long	0x3d41ff84,0xf22ed040,0xff84241f,0x60b6f23c
	.long	0x88000000,0x0000f22e,0x9000ff5c,0xf22e481a
	.long	0xff84f201,0xa800f23c,0x90000000,0x000083ae
	.long	0xff64f200,0x0098f23c,0x58b80002,0xf293ff74
	.long	0x6000fe7e,0x0c010004,0x6700fdb6,0x0c010005
	.long	0x67ff0000,0x18ae0c01,0x000367ff,0x000018b8
	.long	0xf228481a,0x0000f200,0xa800e198,0x1d40ff64
	.long	0x4e75122e,0xff4e6610,0x4a280000,0x6b024e75
	.long	0x1d7c0008,0xff644e75,0x0c010001,0x67400c01
	.long	0x00026724,0x0c010005,0x67ff0000,0x18660c01
	.long	0x000367ff,0x00001870,0x4a280000,0x6b024e75
	.long	0x1d7c0008,0xff644e75,0x4a280000,0x6b081d7c
	.long	0x0002ff64,0x4e751d7c,0x000aff64,0x4e754a28
	.long	0x00006b08,0x1d7c0004,0xff644e75,0x1d7c000c
	.long	0xff644e75,0x122eff4e,0x66280200,0x0030f200
	.long	0x9000f23c,0x88000000,0x0000f228,0x48010000
	.long	0xf23c9000,0x00000000,0xf200a800,0x81aeff64
	.long	0x4e750c01,0x0001672e,0x0c010002,0x674e0c01
	.long	0x00046710,0x0c010005,0x67ff0000,0x17d660ff
	.long	0x000017e4,0x3d680000,0xff841d7c,0x0080ff88
	.long	0x41eeff84,0x60a44a28,0x00006b10,0xf23c4400
	.long	0x00000000,0x1d7c0004,0xff644e75,0xf23c4400
	.long	0x80000000,0x1d7c000c,0xff644e75,0xf228d080
	.long	0x00004a28,0x00006b08,0x1d7c0002,0xff644e75
	.long	0x1d7c000a,0xff644e75,0x122eff4e,0x6618f23c
	.long	0x88000000,0x0000f228,0x48030000,0xf200a800
	.long	0x81aeff64,0x4e750c01,0x0001672e,0x0c010002
	.long	0x674e0c01,0x00046710,0x0c010005,0x67ff0000
	.long	0x174260ff,0x00001750,0x3d680000,0xff841d7c
	.long	0x0080ff88,0x41eeff84,0x60b44a28,0x00006b10
	.long	0xf23c4400,0x00000000,0x1d7c0004,0xff644e75
	.long	0xf23c4400,0x80000000,0x1d7c000c,0xff644e75
	.long	0xf228d080,0x00004a28,0x00006b08,0x1d7c0002
	.long	0xff644e75,0x1d7c000a,0xff644e75,0x02000030
	.long	0x00000040,0x60080200,0x00300000,0x00802d40
	.long	0xff5c122e,0xff4e6600,0x025c0200,0x00c0667e
	.long	0x2d680004,0xff882d68,0x0008ff8c,0x32280000
	.long	0x0881000f,0x3d41ff84,0xf22ed080,0xff844e75
	.long	0x020000c0,0x665808ee,0x0003ff66,0x2d680004
	.long	0xff882d68,0x0008ff8c,0x30280000,0x0880000f
	.long	0x3d40ff84,0xf22ed080,0xff84082e,0x0003ff62
	.long	0x66024e75,0x41eeff84,0x61ff0000,0x3e0e4440
	.long	0x06406000,0x322eff84,0x02418000,0x02407fff
	.long	0x80413d40,0xff84f22e,0xd040ff84,0x4e750c00
	.long	0x0040667e,0x3d680000,0xff842d68,0x0004ff88
	.long	0x2d680008,0xff8c61ff,0x0000152a,0x0c800000
	.long	0x007f6c00,0x00900c80,0xffffff81,0x67000170
	.long	0x6d0000ec,0xf23c8800,0x00000000,0xf22e9000
	.long	0xff5cf22e,0x4818ff84,0xf201a800,0xf23c9000
	.long	0x00000000,0x83aeff64,0x2f02f22e,0xf080ff84
	.long	0x322eff84,0x24010281,0x00007fff,0x92800242
	.long	0x80008441,0x3d42ff84,0x241ff22e,0xd080ff84
	.long	0x4e753d68,0x0000ff84,0x2d680004,0xff882d68
	.long	0x0008ff8c,0x61ff0000,0x14ac0c80,0x000003ff
	.long	0x6c120c80,0xfffffc01,0x670000f4,0x6d000070
	.long	0x6000ff82,0x08ee0003,0xff6608ae,0x0007ff84
	.long	0x122eff62,0x0201000b,0x661a41ee,0xff84222e
	.long	0xff5c61ff,0x00003f3a,0x812eff64,0xf22ed080
	.long	0xff844e75,0x2d6eff88,0xff942d6e,0xff8cff98
	.long	0x322eff84,0x2f022401,0x02810000,0x7fff0242
	.long	0x80009280,0x06810000,0x60000241,0x7fff8242
	.long	0x3d41ff90,0xf22ed040,0xff90241f,0x60acf23c
	.long	0x88000000,0x0000f22e,0x9000ff5c,0xf22e4818
	.long	0xff84f23c,0x90000000,0x0000f201,0xa80083ae
	.long	0xff6400ae,0x00001048,0xff64122e,0xff620201
	.long	0x0013661c,0x082e0003,0xff6456c1,0x202eff5c
	.long	0x61ff0000,0x3faa812e,0xff64f210,0xd0804e75
	.long	0x2f02322e,0xff842401,0x02810000,0x7fff0242
	.long	0x80009280,0x04810000,0x60000241,0x7fff8242
	.long	0x3d41ff84,0xf22ed040,0xff84241f,0x60b6f23c
	.long	0x88000000,0x0000f22e,0x9000ff5c,0xf22e4818
	.long	0xff84f201,0xa800f23c,0x90000000,0x000083ae
	.long	0xff64f200,0x0098f23c,0x58b80002,0xf293ff74
	.long	0x6000fe86,0x0c010004,0x6700fdc6,0x0c010005
	.long	0x67ff0000,0x145e0c01,0x000367ff,0x00001468
	.long	0xf2284818,0x00000c01,0x00026708,0x1d7c0004
	.long	0xff644e75,0x1d7c0002,0xff644e75,0x4241122e
	.long	0xff4fe709,0x822eff4e,0x6618f229,0xd0800000
	.long	0xf2284838,0x0000f200,0xa800e198,0x1d40ff64
	.long	0x4e75323b,0x120a4efb,0x10064afc,0x0030ffdc
	.long	0xffdcffdc,0x006000f8,0x006e0000,0x0000ffdc
	.long	0xffdcffdc,0x0060007c,0x006e0000,0x0000ffdc
	.long	0xffdcffdc,0x0060007c,0x006e0000,0x00000060
	.long	0x00600060,0x00600060,0x006e0000,0x00000114
	.long	0x009c009c,0x006000bc,0x006e0000,0x0000006e
	.long	0x006e006e,0x006e006e,0x006e0000,0x000061ff
	.long	0x00001388,0x022e00f7,0xff644e75,0x61ff0000
	.long	0x137a022e,0x00f7ff64,0x4e753d68,0x0000ff84
	.long	0x20280004,0x08c0001f,0x2d40ff88,0x2d680008
	.long	0xff8c41ee,0xff846000,0xff422d69,0x0000ff84
	.long	0x20290004,0x08c0001f,0x2d40ff88,0x2d690008
	.long	0xff8c43ee,0xff846000,0xff223d69,0x0000ff90
	.long	0x3d680000,0xff842029,0x000408c0,0x001f2d40
	.long	0xff942028,0x000408c0,0x001f2d40,0xff882d69
	.long	0x0008ff98,0x2d680008,0xff8c43ee,0xff9041ee
	.long	0xff846000,0xfee61028,0x00001229,0x0000b101
	.long	0x6b00ff78,0x4a006b02,0x4e751d7c,0x0008ff64
	.long	0x4e751028,0x00001229,0x0000b101,0x6b00ff7c
	.long	0x4a006a02,0x4e751d7c,0x0008ff64,0x4e752d40
	.long	0xff5c4241,0x122eff4f,0xe709822e,0xff4e6600
	.long	0x02a03d69,0x0000ff90,0x2d690004,0xff942d69
	.long	0x0008ff98,0x3d680000,0xff842d68,0x0004ff88
	.long	0x2d680008,0xff8c61ff,0x0000119a,0x2f0061ff
	.long	0x0000123e,0xd09f0c80,0xffffc001,0x670000f8
	.long	0x6d000064,0x0c800000,0x40006700,0x01da6e00
	.long	0x0122f22e,0xd080ff90,0xf22e9000,0xff5cf23c
	.long	0x88000000,0x0000f22e,0x4827ff84,0xf201a800
	.long	0xf23c9000,0x00000000,0x83aeff64,0xf22ef080
	.long	0xff842f02,0x322eff84,0x24010281,0x00007fff
	.long	0x02428000,0x92808242,0x3d41ff84,0x241ff22e
	.long	0xd080ff84,0x4e75f22e,0xd080ff90,0xf22e9000
	.long	0xff5cf23c,0x88000000,0x0000f22e,0x4827ff84
	.long	0xf201a800,0xf23c9000,0x00000000,0x83aeff64
	.long	0x00ae0000,0x1048ff64,0x122eff62,0x02010013
	.long	0x6620082e,0x0003ff64,0x56c1202e,0xff5c0200
	.long	0x003061ff,0x00003c98,0x812eff64,0xf210d080
	.long	0x4e75f22e,0xf080ff84,0x2f02322e,0xff842401
	.long	0x02810000,0x7fff9280,0x04810000,0x60000241
	.long	0x7fff0242,0x80008242,0x3d41ff84,0x241ff22e
	.long	0xd040ff84,0x60acf22e,0xd080ff90,0xf22e9000
	.long	0xff5cf23c,0x88000000,0x0000f22e,0x4827ff84
	.long	0xf201a800,0xf23c9000,0x00000000,0x83aeff64
	.long	0xf2000098,0xf23c58b8,0x0002f293,0xff646000
	.long	0xff0c08ee,0x0003ff66,0xf22ed080,0xff90f23c
	.long	0x90000000,0x0010f23c,0x88000000,0x0000f22e
	.long	0x4827ff84,0xf201a800,0xf23c9000,0x00000000
	.long	0x83aeff64,0x122eff62,0x0201000b,0x6620f22e
	.long	0xf080ff84,0x41eeff84,0x222eff5c,0x61ff0000
	.long	0x3b56812e,0xff64f22e,0xd080ff84,0x4e75f22e
	.long	0xd040ff90,0xf22e9000,0xff5cf23c,0x88000000
	.long	0x0000f22e,0x48a7ff84,0xf23c9000,0x00000000
	.long	0xf22ef040,0xff842f02,0x322eff84,0x24010281
	.long	0x00007fff,0x02428000,0x92800681,0x00006000
	.long	0x02417fff,0x82423d41,0xff84241f,0xf22ed040
	.long	0xff846000,0xff8af22e,0xd080ff90,0xf22e9000
	.long	0xff5cf23c,0x88000000,0x0000f22e,0x4827ff84
	.long	0xf201a800,0xf23c9000,0x00000000,0x83aeff64
	.long	0xf2000098,0xf23c58b8,0x0002f292,0xfe20f294
	.long	0xff12f22e,0xd040ff90,0x222eff5c,0x020100c0
	.long	0x00010010,0xf2019000,0xf23c8800,0x00000000
	.long	0xf22e48a7,0xff84f23c,0x90000000,0x0000f200
	.long	0x0498f23c,0x58b80002,0xf293fde2,0x6000fed4
	.long	0x323b120a,0x4efb1006,0x4afc0030,0xfd560072
	.long	0x0078006c,0xfd560066,0x00000000,0x00720072
	.long	0x0060006c,0x00720066,0x00000000,0x007e0060
	.long	0x007e006c,0x007e0066,0x00000000,0x006c006c
	.long	0x006c006c,0x006c0066,0x00000000,0xfd560072
	.long	0x0078006c,0xfd560066,0x00000000,0x00660066
	.long	0x00660066,0x00660066,0x00000000,0x60ff0000
	.long	0x101e60ff,0x00000f94,0x60ff0000,0x0f8e60ff
	.long	0xffffed0e,0x60ffffff,0xed6260ff,0xffffed2e
	.long	0x2d40ff5c,0x4241122e,0xff4fe709,0x822eff4e
	.long	0x6600027c,0x3d690000,0xff902d69,0x0004ff94
	.long	0x2d690008,0xff983d68,0x0000ff84,0x2d680004
	.long	0xff882d68,0x0008ff8c,0x61ff0000,0x0e582f00
	.long	0x61ff0000,0x0efc4497,0xd197322e,0xff5eec09
	.long	0x201f0c80,0xffffc001,0x6f000064,0x0c800000
	.long	0x3fff6700,0x01b66e00,0x0100f22e,0xd080ff90
	.long	0xf22e9000,0xff5cf23c,0x88000000,0x0000f22e
	.long	0x4824ff84,0xf201a800,0xf23c9000,0x00000000
	.long	0x83aeff64,0xf22ef080,0xff842f02,0x322eff84
	.long	0x24010281,0x00007fff,0x02428000,0x92808242
	.long	0x3d41ff84,0x241ff22e,0xd080ff84,0x4e75f22e
	.long	0xd080ff90,0xf22e9000,0xff5cf23c,0x88000000
	.long	0x0000f22e,0x4824ff84,0xf201a800,0xf23c9000
	.long	0x00000000,0x83aeff64,0xf227e001,0x3217dffc
	.long	0x0000000c,0x02810000,0x7fff9280,0x0c810000
	.long	0x7fff6d90,0x006e1048,0xff66122e,0xff620201
	.long	0x00136620,0x082e0003,0xff6456c1,0x202eff5c
	.long	0x02000030,0x61ff0000,0x3936812e,0xff64f210
	.long	0xd0804e75,0xf22ef080,0xff842f02,0x322eff84
	.long	0x24010281,0x00007fff,0x02428000,0x92800481
	.long	0x00006000,0x02417fff,0x82423d41,0xff84241f
	.long	0xf22ed040,0xff8460ac,0x08ee0003,0xff66f22e
	.long	0xd080ff90,0xf23c9000,0x00000010,0xf23c8800
	.long	0x00000000,0xf22e4824,0xff84f201,0xa800f23c
	.long	0x90000000,0x000083ae,0xff64122e,0xff620201
	.long	0x000b6620,0xf22ef080,0xff8441ee,0xff84222e
	.long	0xff5c61ff,0x00003830,0x812eff64,0xf22ed080
	.long	0xff844e75,0xf22ed040,0xff90f22e,0x9000ff5c
	.long	0xf23c8800,0x00000000,0xf22e48a4,0xff84f23c
	.long	0x90000000,0x0000f22e,0xf040ff84,0x2f02322e
	.long	0xff842401,0x02810000,0x7fff0242,0x80009280
	.long	0x06810000,0x60000241,0x7fff8242,0x3d41ff84
	.long	0x241ff22e,0xd040ff84,0x608af22e,0xd080ff90
	.long	0xf22e9000,0xff5cf23c,0x88000000,0x0000f22e
	.long	0x4824ff84,0xf201a800,0xf23c9000,0x00000000
	.long	0x83aeff64,0xf2000098,0xf23c58b8,0x0001f292
	.long	0xfe44f294,0xff14f22e,0xd040ff90,0x42810001
	.long	0x0010f201,0x9000f23c,0x88000000,0x0000f22e
	.long	0x48a4ff84,0xf23c9000,0x00000000,0xf2000498
	.long	0xf23c58b8,0x0001f293,0xfe0c6000,0xfedc323b
	.long	0x120a4efb,0x10064afc,0x0030fd7a,0x00720078
	.long	0x0060fd7a,0x00660000,0x00000078,0x006c0078
	.long	0x00600078,0x00660000,0x0000007e,0x007e006c
	.long	0x0060007e,0x00660000,0x00000060,0x00600060
	.long	0x00600060,0x00660000,0x0000fd7a,0x00720078
	.long	0x0060fd7a,0x00660000,0x00000066,0x00660066
	.long	0x00660066,0x00660000,0x000060ff,0x00000c7c
	.long	0x60ff0000,0x0c7660ff,0x00000cf4,0x60ffffff
	.long	0xf0ce60ff,0xfffff09c,0x60ffffff,0xf0f40200
	.long	0x00300000,0x00406008,0x02000030,0x00000080
	.long	0x2d40ff5c,0x4241122e,0xff4fe709,0x822eff4e
	.long	0x6600024c,0x61ff0000,0x0a5cf22e,0xd080ff90
	.long	0xf23c8800,0x00000000,0xf22e9000,0xff5cf22e
	.long	0x4822ff84,0xf23c9000,0x00000000,0xf201a800
	.long	0x83aeff64,0xf281003c,0x2f02f227,0xe001322e
	.long	0xff5eec09,0x34170282,0x00007fff,0x9480b4bb
	.long	0x14246c38,0xb4bb142a,0x6d0000b8,0x67000184
	.long	0x32170241,0x80008242,0x3e81f21f,0xd080241f
	.long	0x4e754e75,0x00007fff,0x0000407f,0x000043ff
	.long	0x00000000,0x00003f81,0x00003c01,0x00ae0000
	.long	0x1048ff64,0x122eff62,0x02010013,0x6624dffc
	.long	0x0000000c,0x082e0003,0xff6456c1,0x202eff5c
	.long	0x61ff0000,0x366a812e,0xff64f210,0xd080241f
	.long	0x4e75122e,0xff5c0201,0x00c0661a,0x32170241
	.long	0x80000482,0x00006000,0x02427fff,0x82423e81
	.long	0xf21fd040,0x60bef22e,0xd080ff90,0x222eff5c
	.long	0x02010030,0xf2019000,0xf22e4822,0xff84f23c
	.long	0x90000000,0x0000dffc,0x0000000c,0xf227e001
	.long	0x60ba08ee,0x0003ff66,0xdffc0000,0x000cf22e
	.long	0xd080ff90,0xf23c9000,0x00000010,0xf23c8800
	.long	0x00000000,0xf22e4822,0xff84f23c,0x90000000
	.long	0x0000f201,0xa80083ae,0xff64122e,0xff620201
	.long	0x000b6622,0xf22ef080,0xff8441ee,0xff84222e
	.long	0xff5c61ff,0x000034ba,0x812eff64,0xf22ed080
	.long	0xff84241f,0x4e75f22e,0xd040ff90,0x222eff5c
	.long	0x020100c0,0x664ef22e,0x9000ff5c,0xf23c8800
	.long	0x00000000,0xf22e48a2,0xff84f23c,0x90000000
	.long	0x0000f22e,0xf040ff84,0x322eff84,0x24010281
	.long	0x00007fff,0x02428000,0x92800681,0x00006000
	.long	0x02417fff,0x82423d41,0xff84f22e,0xd040ff84
	.long	0x6000ff82,0x222eff5c,0x02010030,0xf2019000
	.long	0x60aa222e,0xff5c0201,0x00c06700,0xfe74222f
	.long	0x00040c81,0x80000000,0x6600fe66,0x4aaf0008
	.long	0x6600fe5e,0x082e0001,0xff666700,0xfe54f22e
	.long	0xd040ff90,0x222eff5c,0x020100c0,0x00010010
	.long	0xf2019000,0xf23c8800,0x00000000,0xf22e48a2
	.long	0xff84f23c,0x90000000,0x0000f200,0x0018f200
	.long	0x0498f200,0x0438f292,0xfeca6000,0xfe14323b
	.long	0x120a4efb,0x10064afc,0x0030fdaa,0x00e4011c
	.long	0x0060fdaa,0x00660000,0x000000bc,0x006c011c
	.long	0x006000bc,0x00660000,0x00000130,0x0130010c
	.long	0x00600130,0x00660000,0x00000060,0x00600060
	.long	0x00600060,0x00660000,0x0000fdaa,0x00e4011c
	.long	0x0060fdaa,0x00660000,0x00000066,0x00660066
	.long	0x00660066,0x00660000,0x000060ff,0x0000097c
	.long	0x60ff0000,0x09761028,0x00001229,0x0000b101
	.long	0x6b000016,0x4a006b2e,0xf23c4400,0x00000000
	.long	0x1d7c0004,0xff644e75,0x122eff5f,0x02010030
	.long	0x0c010020,0x6710f23c,0x44000000,0x00001d7c
	.long	0x0004ff64,0x4e75f23c,0x44008000,0x00001d7c
	.long	0x000cff64,0x4e753d68,0x0000ff84,0x2d680004
	.long	0xff882d68,0x0008ff8c,0x61ff0000,0x0828426e
	.long	0xff9042ae,0xff9442ae,0xff986000,0xfcce3d69
	.long	0x0000ff90,0x2d690004,0xff942d69,0x0008ff98
	.long	0x61ff0000,0x08ac426e,0xff8442ae,0xff8842ae
	.long	0xff8c6000,0xfca61028,0x00001229,0x0000b300
	.long	0x6bff0000,0x094af228,0xd0800000,0x4a280000
	.long	0x6a1c1d7c,0x000aff64,0x4e75f229,0xd0800000
	.long	0x4a290000,0x6a081d7c,0x000aff64,0x4e751d7c
	.long	0x0002ff64,0x4e750200,0x00300000,0x00406008
	.long	0x02000030,0x00000080,0x2d40ff5c,0x4241122e
	.long	0xff4fe709,0x822eff4e,0x6600024c,0x61ff0000
	.long	0x0694f22e,0xd080ff90,0xf23c8800,0x00000000
	.long	0xf22e9000,0xff5cf22e,0x4828ff84,0xf23c9000
	.long	0x00000000,0xf201a800,0x83aeff64,0xf281003c
	.long	0x2f02f227,0xe001322e,0xff5eec09,0x34170282
	.long	0x00007fff,0x9480b4bb,0x14246c38,0xb4bb142a
	.long	0x6d0000b8,0x67000184,0x32170241,0x80008242
	.long	0x3e81f21f,0xd080241f,0x4e754e75,0x00007fff
	.long	0x0000407f,0x000043ff,0x00000000,0x00003f81
	.long	0x00003c01,0x00ae0000,0x1048ff64,0x122eff62
	.long	0x02010013,0x6624dffc,0x0000000c,0x082e0003
	.long	0xff6456c1,0x202eff5c,0x61ff0000,0x32a2812e
	.long	0xff64f210,0xd080241f,0x4e75122e,0xff5c0201
	.long	0x00c0661a,0x32170241,0x80000482,0x00006000
	.long	0x02427fff,0x82423e81,0xf21fd040,0x60bef22e
	.long	0xd080ff90,0x222eff5c,0x02010030,0xf2019000
	.long	0xf22e4828,0xff84f23c,0x90000000,0x0000dffc
	.long	0x0000000c,0xf227e001,0x60ba08ee,0x0003ff66
	.long	0xdffc0000,0x000cf22e,0xd080ff90,0xf23c9000
	.long	0x00000010,0xf23c8800,0x00000000,0xf22e4828
	.long	0xff84f23c,0x90000000,0x0000f201,0xa80083ae
	.long	0xff64122e,0xff620201,0x000b6622,0xf22ef080
	.long	0xff8441ee,0xff84222e,0xff5c61ff,0x000030f2
	.long	0x812eff64,0xf22ed080,0xff84241f,0x4e75f22e
	.long	0xd040ff90,0x222eff5c,0x020100c0,0x664ef22e
	.long	0x9000ff5c,0xf23c8800,0x00000000,0xf22e48a8
	.long	0xff84f23c,0x90000000,0x0000f22e,0xf040ff84
	.long	0x322eff84,0x24010281,0x00007fff,0x02428000
	.long	0x92800681,0x00006000,0x02417fff,0x82423d41
	.long	0xff84f22e,0xd040ff84,0x6000ff82,0x222eff5c
	.long	0x02010030,0xf2019000,0x60aa222e,0xff5c0201
	.long	0x00c06700,0xfe74222f,0x00040c81,0x80000000
	.long	0x6600fe66,0x4aaf0008,0x6600fe5e,0x082e0001
	.long	0xff666700,0xfe54f22e,0xd040ff90,0x222eff5c
	.long	0x020100c0,0x00010010,0xf2019000,0xf23c8800
	.long	0x00000000,0xf22e48a8,0xff84f23c,0x90000000
	.long	0x0000f200,0x0018f200,0x0498f200,0x0438f292
	.long	0xfeca6000,0xfe14323b,0x120a4efb,0x10064afc
	.long	0x0030fdaa,0x00e2011a,0x0060fdaa,0x00660000
	.long	0x000000ba,0x006c011a,0x006000ba,0x00660000
	.long	0x00000130,0x0130010a,0x00600130,0x00660000
	.long	0x00000060,0x00600060,0x00600060,0x00660000
	.long	0x0000fdaa,0x00e2011a,0x0060fdaa,0x00660000
	.long	0x00000066,0x00660066,0x00660066,0x00660000
	.long	0x000060ff,0x000005b4,0x60ff0000,0x05ae1028
	.long	0x00001229,0x0000b300,0x6a144a00,0x6b2ef23c
	.long	0x44000000,0x00001d7c,0x0004ff64,0x4e75122e
	.long	0xff5f0201,0x00300c01,0x00206710,0xf23c4400
	.long	0x00000000,0x1d7c0004,0xff644e75,0xf23c4400
	.long	0x80000000,0x1d7c000c,0xff644e75,0x3d680000
	.long	0xff842d68,0x0004ff88,0x2d680008,0xff8c61ff
	.long	0x00000462,0x426eff90,0x42aeff94,0x42aeff98
	.long	0x6000fcd0,0x3d690000,0xff902d69,0x0004ff94
	.long	0x2d690008,0xff9861ff,0x000004e6,0x426eff84
	.long	0x42aeff88,0x42aeff8c,0x6000fca8,0x10280000
	.long	0x12290000,0xb3006aff,0x00000584,0xf228d080
	.long	0x0000f200,0x001af293,0x001e1d7c,0x000aff64
	.long	0x4e75f229,0xd0800000,0x4a290000,0x6a081d7c
	.long	0x000aff64,0x4e751d7c,0x0002ff64,0x4e750200
	.long	0x00300000,0x00406008,0x02000030,0x00000080
	.long	0x2d40ff5c,0x4241122e,0xff4e6600,0x02744a28
	.long	0x00006bff,0x00000528,0x020000c0,0x6648f22e
	.long	0x9000ff5c,0xf23c8800,0x00000000,0xf2104804
	.long	0xf201a800,0x83aeff64,0x4e754a28,0x00006bff
	.long	0x000004fc,0x020000c0,0x661c3d68,0x0000ff84
	.long	0x2d680004,0xff882d68,0x0008ff8c,0x61ff0000
	.long	0x03ae6000,0x003e0c00,0x00406600,0x00843d68
	.long	0x0000ff84,0x2d680004,0xff882d68,0x0008ff8c
	.long	0x61ff0000,0x038a0c80,0x0000007e,0x67000098
	.long	0x6e00009e,0x0c80ffff,0xff806700,0x01a46d00
	.long	0x0120f23c,0x88000000,0x0000f22e,0x9000ff5c
	.long	0xf22e4804,0xff84f201,0xa800f23c,0x90000000
	.long	0x000083ae,0xff642f02,0xf22ef080,0xff84322e
	.long	0xff842401,0x02810000,0x7fff9280,0x02428000
	.long	0x84413d42,0xff84241f,0xf22ed080,0xff844e75
	.long	0x3d680000,0xff842d68,0x0004ff88,0x2d680008
	.long	0xff8c61ff,0x00000308,0x0c800000,0x03fe6700
	.long	0x00166e1c,0x0c80ffff,0xfc006700,0x01246d00
	.long	0x00a06000,0xff7e082e,0x0000ff85,0x6600ff74
	.long	0x08ee0003,0xff66f23c,0x90000000,0x0010f23c
	.long	0x88000000,0x0000f22e,0x4804ff84,0xf201a800
	.long	0xf23c9000,0x00000000,0x83aeff64,0x122eff62
	.long	0x0201000b,0x6620f22e,0xf080ff84,0x41eeff84
	.long	0x222eff5c,0x61ff0000,0x2d28812e,0xff64f22e
	.long	0xd080ff84,0x4e752d6e,0xff88ff94,0x2d6eff8c
	.long	0xff98322e,0xff842f02,0x24010281,0x00007fff
	.long	0x02428000,0x92800681,0x00006000,0x02417fff
	.long	0x82423d41,0xff90f22e,0xd040ff90,0x241f60a6
	.long	0xf23c8800,0x00000000,0xf22e9000,0xff5cf22e
	.long	0x4804ff84,0xf23c9000,0x00000000,0xf201a800
	.long	0x83aeff64,0x00ae0000,0x1048ff64,0x122eff62
	.long	0x02010013,0x661c082e,0x0003ff64,0x56c1202e
	.long	0xff5c61ff,0x00002d98,0x812eff64,0xf210d080
	.long	0x4e752f02,0x322eff84,0x24010281,0x00007fff
	.long	0x02428000,0x92800481,0x00006000,0x02417fff
	.long	0x82423d41,0xff84f22e,0xd040ff84,0x241f60b6
	.long	0x082e0000,0xff856600,0xff78f23c,0x88000000
	.long	0x0000f22e,0x9000ff5c,0xf22e4804,0xff84f201
	.long	0xa800f23c,0x90000000,0x000083ae,0xff64f200
	.long	0x0080f23c,0x58b80001,0xf293ff6a,0x6000fe48
	.long	0x0c010004,0x6700fdb4,0x0c010001,0x67160c01
	.long	0x00026736,0x0c010005,0x67ff0000,0x023660ff
	.long	0x00000244,0x4a280000,0x6b10f23c,0x44000000
	.long	0x00001d7c,0x0004ff64,0x4e75f23c,0x44008000
	.long	0x00001d7c,0x000cff64,0x4e754a28,0x00006bff
	.long	0x0000026c,0xf228d080,0x00001d7c,0x0002ff64
	.long	0x4e752d68,0x0004ff88,0x2d690004,0xff942d68
	.long	0x0008ff8c,0x2d690008,0xff983028,0x00003229
	.long	0x00003d40,0xff843d41,0xff900240,0x7fff0241
	.long	0x7fff3d40,0xff543d41,0xff56b041,0x6cff0000
	.long	0x005c61ff,0x0000015a,0x2f000c2e,0x0004ff4e
	.long	0x661041ee,0xff8461ff,0x00002940,0x44403d40
	.long	0xff54302e,0xff560440,0x0042b06e,0xff546c1a
	.long	0x302eff54,0xd06f0002,0x322eff84,0x02418000
	.long	0x80413d40,0xff84201f,0x4e75026e,0x8000ff84
	.long	0x08ee0000,0xff85201f,0x4e7561ff,0x00000056
	.long	0x2f000c2e,0x0004ff4f,0x661041ee,0xff9061ff
	.long	0x000028e8,0x44403d40,0xff56302e,0xff540440
	.long	0x0042b06e,0xff566c1a,0x302eff56,0xd06f0002
	.long	0x322eff90,0x02418000,0x80413d40,0xff90201f
	.long	0x4e75026e,0x8000ff90,0x08ee0000,0xff91201f
	.long	0x4e75322e,0xff843001,0x02810000,0x7fff0240
	.long	0x80000040,0x3fff3d40,0xff840c2e,0x0004ff4e
	.long	0x670a203c,0x00003fff,0x90814e75,0x41eeff84
	.long	0x61ff0000,0x28764480,0x220060e6,0x0c2e0004
	.long	0xff4e673a,0x322eff84,0x02810000,0x7fff026e
	.long	0x8000ff84,0x08010000,0x6712006e,0x3fffff84
	.long	0x203c0000,0x3fff9081,0xe2804e75,0x006e3ffe
	.long	0xff84203c,0x00003ffe,0x9081e280,0x4e7541ee
	.long	0xff8461ff,0x00002824,0x08000000,0x6710006e
	.long	0x3fffff84,0x06800000,0x3fffe280,0x4e75006e
	.long	0x3ffeff84,0x06800000,0x3ffee280,0x4e75322e
	.long	0xff903001,0x02810000,0x7fff0240,0x80000040
	.long	0x3fff3d40,0xff900c2e,0x0004ff4f,0x670a203c
	.long	0x00003fff,0x90814e75,0x41eeff90,0x61ff0000
	.long	0x27ca4480,0x220060e6,0x0c2e0005,0xff4f6732
	.long	0x0c2e0003,0xff4f673e,0x0c2e0003,0xff4e6714
	.long	0x08ee0006,0xff7000ae,0x01004080,0xff6441ee
	.long	0xff6c6042,0x00ae0100,0x0000ff64,0x41eeff6c
	.long	0x603400ae,0x01004080,0xff6408ee,0x0006ff7c
	.long	0x41eeff78,0x602041ee,0xff780c2e,0x0005ff4e
	.long	0x66ff0000,0x000c00ae,0x00004080,0xff6400ae
	.long	0x01000000,0xff640828,0x00070000,0x670800ae
	.long	0x08000000,0xff64f210,0xd0804e75,0x00ae0100
	.long	0x2080ff64,0xf23bd080,0x01700000,0x00084e75
	.long	0x7fff0000,0xffffffff,0xffffffff,0x2d40ff54
	.long	0x302eff42,0x4281122e,0xff64e099,0xf2018800
	.long	0x323b0206,0x4efb1002,0x02340040,0x02f8030c
	.long	0x03200334,0x0348035c,0x03660352,0x033e032a
	.long	0x03160302,0x004a0238,0x023a0276,0x0054009e
	.long	0x0102014c,0x01b201fc,0x021801d8,0x018c0128
	.long	0x00de007a,0x02b6025a,0xf2810006,0x6000032a
	.long	0x4e75f28e,0x00066000,0x03204e75,0xf2920022
	.long	0x082e0000,0xff646700,0x031000ae,0x00008080
	.long	0xff64082e,0x0007ff62,0x6600032c,0x600002fa
	.long	0x4e75f29d,0x00066000,0x02f0082e,0x0000ff64
	.long	0x671200ae,0x00008080,0xff64082e,0x0007ff62
	.long	0x66000304,0x4e75f293,0x0022082e,0x0000ff64
	.long	0x670002c6,0x00ae0000,0x8080ff64,0x082e0007
	.long	0xff626600,0x02e26000,0x02b0082e,0x0000ff64
	.long	0x671200ae,0x00008080,0xff64082e,0x0007ff62
	.long	0x660002c4,0x4e75f29c,0x00066000,0x028c082e
	.long	0x0000ff64,0x671200ae,0x00008080,0xff64082e
	.long	0x0007ff62,0x660002a0,0x4e75f294,0x0022082e
	.long	0x0000ff64,0x67000262,0x00ae0000,0x8080ff64
	.long	0x082e0007,0xff626600,0x027e6000,0x024c4e75
	.long	0xf29b0006,0x60000242,0x082e0000,0xff646712
	.long	0x00ae0000,0x8080ff64,0x082e0007,0xff626600
	.long	0x02564e75,0xf2950022,0x082e0000,0xff646700
	.long	0x021800ae,0x00008080,0xff64082e,0x0007ff62
	.long	0x66000234,0x60000202,0x082e0000,0xff646712
	.long	0x00ae0000,0x8080ff64,0x082e0007,0xff626600
	.long	0x02164e75,0xf29a0006,0x600001de,0x082e0000
	.long	0xff646700,0x001400ae,0x00008080,0xff64082e
	.long	0x0007ff62,0x660001f0,0x4e75f296,0x0022082e
	.long	0x0000ff64,0x670001b2,0x00ae0000,0x8080ff64
	.long	0x082e0007,0xff626600,0x01ce6000,0x019c4e75
	.long	0xf2990006,0x60000192,0x082e0000,0xff646712
	.long	0x00ae0000,0x8080ff64,0x082e0007,0xff626600
	.long	0x01a64e75,0xf2970018,0x00ae0000,0x8080ff64
	.long	0x082e0007,0xff626600,0x018e6000,0x015c4e75
	.long	0xf2980006,0x60000152,0x00ae0000,0x8080ff64
	.long	0x082e0007,0xff626600,0x016e4e75,0x6000013a
	.long	0x4e75082e,0x0000ff64,0x6700012e,0x00ae0000
	.long	0x8080ff64,0x082e0007,0xff626600,0x014a6000
	.long	0x0118082e,0x0000ff64,0x671200ae,0x00008080
	.long	0xff64082e,0x0007ff62,0x6600012c,0x4e75f291
	.long	0x0022082e,0x0000ff64,0x670000ee,0x00ae0000
	.long	0x8080ff64,0x082e0007,0xff626600,0x010a6000
	.long	0x00d8082e,0x0000ff64,0x671200ae,0x00008080
	.long	0xff64082e,0x0007ff62,0x660000ec,0x4e75f29e
	.long	0x0022082e,0x0000ff64,0x670000ae,0x00ae0000
	.long	0x8080ff64,0x082e0007,0xff626600,0x00ca6000
	.long	0x0098082e,0x0000ff64,0x67000014,0x00ae0000
	.long	0x8080ff64,0x082e0007,0xff626600,0x00aa4e75
	.long	0xf2820006,0x60000072,0x4e75f28d,0x00066000
	.long	0x00684e75,0xf2830006,0x6000005e,0x4e75f28c
	.long	0x00066000,0x00544e75,0xf2840006,0x6000004a
	.long	0x4e75f28b,0x00066000,0x00404e75,0xf2850006
	.long	0x60000036,0x4e75f28a,0x00066000,0x002c4e75
	.long	0xf2860006,0x60000022,0x4e75f289,0x00066000
	.long	0x00184e75,0xf2870006,0x6000000e,0x4e75f288
	.long	0x00066000,0x00044e75,0x122eff41,0x02410007
	.long	0x61ff0000,0x1d665340,0x61ff0000,0x1dd00c40
	.long	0xffff6602,0x4e75202e,0xff54d0ae,0xff685880
	.long	0x2d400006,0x4e751d7c,0x0002ff4a,0x4e75302e
	.long	0xff424281,0x122eff64,0xe099f201,0x8800323b
	.long	0x02064efb,0x1002021e,0x004002e4,0x02f002fc
	.long	0x03080314,0x03200326,0x031a030e,0x030202f6
	.long	0x02ea0046,0x02200224,0x0260004c,0x009200f8
	.long	0x013e01a4,0x01ea0202,0x01c4017e,0x011800d2
	.long	0x006c02a2,0x0240f281,0x02ea4e75,0xf28e02e4
	.long	0x4e75f292,0x02de082e,0x0000ff64,0x671200ae
	.long	0x00008080,0xff64082e,0x0007ff62,0x660002cc
	.long	0x4e75f29d,0x00044e75,0x082e0000,0xff646700
	.long	0x02b200ae,0x00008080,0xff64082e,0x0007ff62
	.long	0x660002a8,0x6000029c,0xf293001e,0x082e0000
	.long	0xff646712,0x00ae0000,0x8080ff64,0x082e0007
	.long	0xff626600,0x02864e75,0x082e0000,0xff646700
	.long	0x027200ae,0x00008080,0xff64082e,0x0007ff62
	.long	0x66000268,0x6000025c,0xf29c0004,0x4e75082e
	.long	0x0000ff64,0x6700024c,0x00ae0000,0x8080ff64
	.long	0x082e0007,0xff626600,0x02426000,0x0236f294
	.long	0x0232082e,0x0000ff64,0x671200ae,0x00008080
	.long	0xff64082e,0x0007ff62,0x66000220,0x4e75f29b
	.long	0x00044e75,0x082e0000,0xff646700,0x020600ae
	.long	0x00008080,0xff64082e,0x0007ff62,0x660001fc
	.long	0x600001f0,0xf295001e,0x082e0000,0xff646712
	.long	0x00ae0000,0x8080ff64,0x082e0007,0xff626600
	.long	0x01da4e75,0x082e0000,0xff646700,0x01c600ae
	.long	0x00008080,0xff64082e,0x0007ff62,0x660001bc
	.long	0x600001b0,0xf29a0004,0x4e75082e,0x0000ff64
	.long	0x670001a0,0x00ae0000,0x8080ff64,0x082e0007
	.long	0xff626600,0x01966000,0x018af296,0x0186082e
	.long	0x0000ff64,0x671200ae,0x00008080,0xff64082e
	.long	0x0007ff62,0x66000174,0x4e75f299,0x00044e75
	.long	0x082e0000,0xff646700,0x015a00ae,0x00008080
	.long	0xff64082e,0x0007ff62,0x66000150,0x60000144
	.long	0xf2970140,0x00ae0000,0x8080ff64,0x082e0007
	.long	0xff626600,0x01364e75,0xf2980004,0x4e7500ae
	.long	0x00008080,0xff64082e,0x0007ff62,0x6600011c
	.long	0x60000110,0x4e756000,0x010a082e,0x0000ff64
	.long	0x671200ae,0x00008080,0xff64082e,0x0007ff62
	.long	0x660000f8,0x4e75082e,0x0000ff64,0x670000e4
	.long	0x00ae0000,0x8080ff64,0x082e0007,0xff626600
	.long	0x00da6000,0x00cef291,0x0020082e,0x0000ff64
	.long	0x67000014,0x00ae0000,0x8080ff64,0x082e0007
	.long	0xff626600,0x00b64e75,0x082e0000,0xff646700
	.long	0x00a200ae,0x00008080,0xff64082e,0x0007ff62
	.long	0x66000098,0x6000008c,0xf29e0020,0x082e0000
	.long	0xff646700,0x001400ae,0x00008080,0xff64082e
	.long	0x0007ff62,0x66000074,0x4e75082e,0x0000ff64
	.long	0x67000060,0x00ae0000,0x8080ff64,0x082e0007
	.long	0xff626600,0x00566000,0x004af282,0x00464e75
	.long	0xf28d0040,0x4e75f283,0x003a4e75,0xf28c0034
	.long	0x4e75f284,0x002e4e75,0xf28b0028,0x4e75f285
	.long	0x00224e75,0xf28a001c,0x4e75f286,0x00164e75
	.long	0xf2890010,0x4e75f287,0x000a4e75,0xf2880004
	.long	0x4e751d7c,0x0001ff4a,0x4e751d7c,0x0002ff4a
	.long	0x4e75302e,0xff424281,0x122eff64,0xe099f201
	.long	0x8800323b,0x02064efb,0x10020208,0x004002ac
	.long	0x02cc02ec,0x030c032c,0x034c035c,0x033c031c
	.long	0x02fc02dc,0x02bc0050,0x020e0214,0x02440060
	.long	0x00a400fa,0x013e0194,0x01d801f0,0x01b60172
	.long	0x011c00d8,0x00820278,0x022cf281,0x00084200
	.long	0x6000032e,0x50c06000,0x0328f28e,0x00084200
	.long	0x6000031e,0x50c06000,0x0318f292,0x001a4200
	.long	0x082e0000,0xff646700,0x030800ae,0x00008080
	.long	0xff646000,0x02f250c0,0x600002f6,0xf29d0008
	.long	0x42006000,0x02ec50c0,0x082e0000,0xff646700
	.long	0x02e000ae,0x00008080,0xff646000,0x02caf293
	.long	0x001a4200,0x082e0000,0xff646700,0x02c400ae
	.long	0x00008080,0xff646000,0x02ae50c0,0x082e0000
	.long	0xff646700,0x02ac00ae,0x00008080,0xff646000
	.long	0x0296f29c,0x00084200,0x60000296,0x50c0082e
	.long	0x0000ff64,0x6700028a,0x00ae0000,0x8080ff64
	.long	0x60000274,0xf294001a,0x4200082e,0x0000ff64
	.long	0x6700026e,0x00ae0000,0x8080ff64,0x60000258
	.long	0x50c06000,0x025cf29b,0x00084200,0x60000252
	.long	0x50c0082e,0x0000ff64,0x67000246,0x00ae0000
	.long	0x8080ff64,0x60000230,0xf295001a,0x4200082e
	.long	0x0000ff64,0x6700022a,0x00ae0000,0x8080ff64
	.long	0x60000214,0x50c0082e,0x0000ff64,0x67000212
	.long	0x00ae0000,0x8080ff64,0x600001fc,0xf29a0008
	.long	0x42006000,0x01fc50c0,0x082e0000,0xff646700
	.long	0x01f000ae,0x00008080,0xff646000,0x01daf296
	.long	0x001a4200,0x082e0000,0xff646700,0x01d400ae
	.long	0x00008080,0xff646000,0x01be50c0,0x600001c2
	.long	0xf2990008,0x42006000,0x01b850c0,0x082e0000
	.long	0xff646700,0x01ac00ae,0x00008080,0xff646000
	.long	0x0196f297,0x00104200,0x00ae0000,0x8080ff64
	.long	0x60000184,0x50c06000,0x0188f298,0x00084200
	.long	0x6000017e,0x50c000ae,0x00008080,0xff646000
	.long	0x01664200,0x6000016a,0x50c06000,0x01644200
	.long	0x082e0000,0xff646700,0x015800ae,0x00008080
	.long	0xff646000,0x014250c0,0x082e0000,0xff646700
	.long	0x014000ae,0x00008080,0xff646000,0x012af291
	.long	0x001a4200,0x082e0000,0xff646700,0x012400ae
	.long	0x00008080,0xff646000,0x010e50c0,0x082e0000
	.long	0xff646700,0x010c00ae,0x00008080,0xff646000
	.long	0x00f6f29e,0x001a4200,0x082e0000,0xff646700
	.long	0x00f000ae,0x00008080,0xff646000,0x00da50c0
	.long	0x082e0000,0xff646700,0x00d800ae,0x00008080
	.long	0xff646000,0x00c2f282,0x00084200,0x600000c2
	.long	0x50c06000,0x00bcf28d,0x00084200,0x600000b2
	.long	0x50c06000,0x00acf283,0x00084200,0x600000a2
	.long	0x50c06000,0x009cf28c,0x00084200,0x60000092
	.long	0x50c06000,0x008cf284,0x00084200,0x60000082
	.long	0x50c06000,0x007cf28b,0x00084200,0x60000072
	.long	0x50c06000,0x006cf285,0x00084200,0x60000062
	.long	0x50c06000,0x005cf28a,0x00084200,0x60000052
	.long	0x50c06000,0x004cf286,0x00084200,0x60000042
	.long	0x50c06000,0x003cf289,0x00084200,0x60000032
	.long	0x50c06000,0x002cf287,0x00084200,0x60000022
	.long	0x50c06000,0x001cf288,0x00084200,0x60000012
	.long	0x50c06000,0x000c082e,0x0007ff62,0x66000088
	.long	0x2040122e,0xff412001,0x02010038,0x66102200
	.long	0x02410007,0x200861ff,0x0000172a,0x4e750c01
	.long	0x0018671a,0x0c010020,0x67382008,0x206e000c
	.long	0x61ffffff,0x5a7c4a81,0x66000054,0x4e752008
	.long	0x206e000c,0x61ffffff,0x5a684a81,0x66000040
	.long	0x122eff41,0x02410007,0x700161ff,0x00001722
	.long	0x4e752008,0x206e000c,0x61ffffff,0x5a444a81
	.long	0x6600001c,0x122eff41,0x02410007,0x700161ff
	.long	0x0000174e,0x4e751d7c,0x0002ff4a,0x4e753d7c
	.long	0x00a1000a,0x60ff0000,0x2b86122e,0xff430241
	.long	0x0070e809,0x61ff0000,0x15b20280,0x000000ff
	.long	0x2f00103b,0x09200148,0x2f0061ff,0x00000340
	.long	0x201f221f,0x67000134,0x082e0005,0xff426700
	.long	0x00b8082e,0x0004ff42,0x6600001a,0x123b1120
	.long	0x021e082e,0x00050004,0x670a0c2e,0x0008ff4a
	.long	0x66024e75,0x22489fc0,0x41d74a01,0x6a0c20ee
	.long	0xffdc20ee,0xffe020ee,0xffe4e309,0x6a0c20ee
	.long	0xffe820ee,0xffec20ee,0xfff0e309,0x6a0af210
	.long	0xf020d1fc,0x0000000c,0xe3096a0a,0xf210f010
	.long	0xd1fc0000,0x000ce309,0x6a0af210,0xf008d1fc
	.long	0x0000000c,0xe3096a0a,0xf210f004,0xd1fc0000
	.long	0x000ce309,0x6a0af210,0xf002d1fc,0x0000000c
	.long	0xe3096a0a,0xf210f001,0xd1fc0000,0x000c2d49
	.long	0xff5441d7,0x2f0061ff,0xffff58b2,0x201fdfc0
	.long	0x4a816600,0x071e4e75,0x2d48ff54,0x9fc043d7
	.long	0x2f012f00,0x61ffffff,0x587e201f,0x4a816600
	.long	0x070e221f,0x41d74a01,0x6a0c2d58,0xffdc2d58
	.long	0xffe02d58,0xffe4e309,0x6a0c2d58,0xffe82d58
	.long	0xffec2d58,0xfff0e309,0x6a04f218,0xd020e309
	.long	0x6a04f218,0xd010e309,0x6a04f218,0xd008e309
	.long	0x6a04f218,0xd004e309,0x6a04f218,0xd002e309
	.long	0x6a04f218,0xd001dfc0,0x4e754e75,0x000c0c18
	.long	0x0c181824,0x0c181824,0x18242430,0x0c181824
	.long	0x18242430,0x18242430,0x2430303c,0x0c181824
	.long	0x18242430,0x18242430,0x2430303c,0x18242430
	.long	0x2430303c,0x2430303c,0x303c3c48,0x0c181824
	.long	0x18242430,0x18242430,0x2430303c,0x18242430
	.long	0x2430303c,0x2430303c,0x303c3c48,0x18242430
	.long	0x2430303c,0x2430303c,0x303c3c48,0x2430303c
	.long	0x303c3c48,0x303c3c48,0x3c484854,0x0c181824
	.long	0x18242430,0x18242430,0x2430303c,0x18242430
	.long	0x2430303c,0x2430303c,0x303c3c48,0x18242430
	.long	0x2430303c,0x2430303c,0x303c3c48,0x2430303c
	.long	0x303c3c48,0x303c3c48,0x3c484854,0x18242430
	.long	0x2430303c,0x2430303c,0x303c3c48,0x2430303c
	.long	0x303c3c48,0x303c3c48,0x3c484854,0x2430303c
	.long	0x303c3c48,0x303c3c48,0x3c484854,0x303c3c48
	.long	0x3c484854,0x3c484854,0x48545460,0x008040c0
	.long	0x20a060e0,0x109050d0,0x30b070f0,0x088848c8
	.long	0x28a868e8,0x189858d8,0x38b878f8,0x048444c4
	.long	0x24a464e4,0x149454d4,0x34b474f4,0x0c8c4ccc
	.long	0x2cac6cec,0x1c9c5cdc,0x3cbc7cfc,0x028242c2
	.long	0x22a262e2,0x129252d2,0x32b272f2,0x0a8a4aca
	.long	0x2aaa6aea,0x1a9a5ada,0x3aba7afa,0x068646c6
	.long	0x26a666e6,0x169656d6,0x36b676f6,0x0e8e4ece
	.long	0x2eae6eee,0x1e9e5ede,0x3ebe7efe,0x018141c1
	.long	0x21a161e1,0x119151d1,0x31b171f1,0x098949c9
	.long	0x29a969e9,0x199959d9,0x39b979f9,0x058545c5
	.long	0x25a565e5,0x159555d5,0x35b575f5,0x0d8d4dcd
	.long	0x2dad6ded,0x1d9d5ddd,0x3dbd7dfd,0x038343c3
	.long	0x23a363e3,0x139353d3,0x33b373f3,0x0b8b4bcb
	.long	0x2bab6beb,0x1b9b5bdb,0x3bbb7bfb,0x078747c7
	.long	0x27a767e7,0x179757d7,0x37b777f7,0x0f8f4fcf
	.long	0x2faf6fef,0x1f9f5fdf,0x3fbf7fff,0x2040302e
	.long	0xff403200,0x0240003f,0x02810000,0x0007303b
	.long	0x020a4efb,0x00064afc,0x00400000,0x00000000
	.long	0x00000000,0x00000000,0x00000000,0x00000000
	.long	0x00000000,0x00000000,0x00000080,0x0086008c
	.long	0x00900094,0x0098009c,0x00a000a6,0x00b600c6
	.long	0x00d200de,0x00ea00f6,0x01020118,0x01260134
	.long	0x013e0148,0x0152015c,0x0166017a,0x019801b6
	.long	0x01d201ee,0x020a0226,0x02420260,0x02600260
	.long	0x02600260,0x02600260,0x026002c0,0x02da02f4
	.long	0x03140000,0x00000000,0x0000206e,0xffa44e75
	.long	0x206effa8,0x4e75204a,0x4e75204b,0x4e75204c
	.long	0x4e75204d,0x4e752056,0x4e75206e,0xffd84e75
	.long	0x202effa4,0x2200d288,0x2d41ffa4,0x20404e75
	.long	0x202effa8,0x2200d288,0x2d41ffa8,0x20404e75
	.long	0x200a2200,0xd2882441,0x20404e75,0x200b2200
	.long	0xd2882641,0x20404e75,0x200c2200,0xd2882841
	.long	0x20404e75,0x200d2200,0xd2882a41,0x20404e75
	.long	0x20162200,0xd2882c81,0x20404e75,0x1d7c0004
	.long	0xff4a202e,0xffd82200,0xd2882d41,0xffd82040
	.long	0x4e75202e,0xffa49088,0x2d40ffa4,0x20404e75
	.long	0x202effa8,0x90882d40,0xffa82040,0x4e75200a
	.long	0x90882440,0x20404e75,0x200b9088,0x26402040
	.long	0x4e75200c,0x90882840,0x20404e75,0x200d9088
	.long	0x2a402040,0x4e752016,0x90882c80,0x20404e75
	.long	0x1d7c0008,0xff4a202e,0xffd89088,0x2d40ffd8
	.long	0x20404e75,0x206eff44,0x54aeff44,0x61ffffff
	.long	0x54a24a81,0x66ffffff,0x68203040,0xd1eeffa4
	.long	0x4e75206e,0xff4454ae,0xff4461ff,0xffff5484
	.long	0x4a8166ff,0xffff6802,0x3040d1ee,0xffa84e75
	.long	0x206eff44,0x54aeff44,0x61ffffff,0x54664a81
	.long	0x66ffffff,0x67e43040,0xd1ca4e75,0x206eff44
	.long	0x54aeff44,0x61ffffff,0x544a4a81,0x66ffffff
	.long	0x67c83040,0xd1cb4e75,0x206eff44,0x54aeff44
	.long	0x61ffffff,0x542e4a81,0x66ffffff,0x67ac3040
	.long	0xd1cc4e75,0x206eff44,0x54aeff44,0x61ffffff
	.long	0x54124a81,0x66ffffff,0x67903040,0xd1cd4e75
	.long	0x206eff44,0x54aeff44,0x61ffffff,0x53f64a81
	.long	0x66ffffff,0x67743040,0xd1d64e75,0x206eff44
	.long	0x54aeff44,0x61ffffff,0x53da4a81,0x66ffffff
	.long	0x67583040,0xd1eeffd8,0x4e755081,0x61ff0000
	.long	0x0fda2f00,0x206eff44,0x54aeff44,0x61ffffff
	.long	0x53b24a81,0x66ffffff,0x6730205f,0x08000008
	.long	0x660000e6,0x2d40ff54,0x2200e959,0x0241000f
	.long	0x61ff0000,0x0fa62f02,0x242eff54,0x0802000b
	.long	0x660248c0,0x2202ef59,0x02810000,0x0003e3a8
	.long	0x49c2d082,0xd1c0241f,0x4e75206e,0xff4454ae
	.long	0xff4461ff,0xffff535c,0x4a8166ff,0xffff66da
	.long	0x30404e75,0x206eff44,0x58aeff44,0x61ffffff
	.long	0x53584a81,0x66ffffff,0x66c02040,0x4e75206e
	.long	0xff4454ae,0xff4461ff,0xffff5328,0x4a8166ff
	.long	0xffff66a6,0x3040d1ee,0xff445588,0x4e75206e
	.long	0xff4454ae,0xff4461ff,0xffff5308,0x4a8166ff
	.long	0xffff6686,0x206eff44,0x55880800,0x00086600
	.long	0x00382d40,0xff542200,0xe9590241,0x000f61ff
	.long	0x00000ef8,0x2f02242e,0xff540802,0x000b6602
	.long	0x48c02202,0xef590281,0x00000003,0xe3a849c2
	.long	0xd082d1c0,0x241f4e75,0x08000006,0x670c48e7
	.long	0x3c002a00,0x26084282,0x60282d40,0xff54e9c0
	.long	0x140461ff,0x00000eb4,0x48e73c00,0x24002a2e
	.long	0xff542608,0x0805000b,0x660248c2,0xe9c50542
	.long	0xe1aa0805,0x00076702,0x4283e9c5,0x06820c00
	.long	0x00026d34,0x6718206e,0xff4458ae,0xff4461ff
	.long	0xffff5276,0x4a8166ff,0x000000b0,0x6018206e
	.long	0xff4454ae,0xff4461ff,0xffff5248,0x4a8166ff
	.long	0x00000098,0x48c0d680,0xe9c50782,0x6700006e
	.long	0x0c000002,0x6d346718,0x206eff44,0x58aeff44
	.long	0x61ffffff,0x52344a81,0x66ff0000,0x006e601c
	.long	0x206eff44,0x54aeff44,0x61ffffff,0x52064a81
	.long	0x66ff0000,0x005648c0,0x60024280,0x28000805
	.long	0x00026714,0x204361ff,0xffff5240,0x4a816600
	.long	0x0028d082,0xd0846018,0xd6822043,0x61ffffff
	.long	0x522a4a81,0x66000012,0xd0846004,0xd6822003
	.long	0x20404cdf,0x003c4e75,0x20434cdf,0x003c303c
	.long	0x010160ff,0xffff6582,0x4cdf003c,0x60ffffff
	.long	0x652861ff,0x000023c6,0x303c00e1,0x600a61ff
	.long	0x000023ba,0x303c0161,0x206eff54,0x60ffffff
	.long	0x6558102e,0xff420c00,0x009c6700,0x00b20c00
	.long	0x00986700,0x00740c00,0x00946736,0x206eff44
	.long	0x58aeff44,0x61ffffff,0x51704a81,0x66ffffff
	.long	0x64d82d40,0xff64206e,0xff4458ae,0xff4461ff
	.long	0xffff5156,0x4a8166ff,0xffff64be,0x2d40ff68
	.long	0x4e75206e,0xff4458ae,0xff4461ff,0xffff513a
	.long	0x4a8166ff,0xffff64a2,0x2d40ff60,0x206eff44
	.long	0x58aeff44,0x61ffffff,0x51204a81,0x66ffffff
	.long	0x64882d40,0xff684e75,0x206eff44,0x58aeff44
	.long	0x61ffffff,0x51044a81,0x66ffffff,0x646c2d40
	.long	0xff60206e,0xff4458ae,0xff4461ff,0xffff50ea
	.long	0x4a8166ff,0xffff6452,0x2d40ff64,0x4e75206e
	.long	0xff4458ae,0xff4461ff,0xffff50ce,0x4a8166ff
	.long	0xffff6436,0x2d40ff60,0x206eff44,0x58aeff44
	.long	0x61ffffff,0x50b44a81,0x66ffffff,0x641c2d40
	.long	0xff64206e,0xff4458ae,0xff4461ff,0xffff509a
	.long	0x4a8166ff,0xffff6402,0x2d40ff68,0x4e752040
	.long	0x102eff41,0x22000240,0x00380281,0x00000007
	.long	0x0c000018,0x67240c00,0x0020672c,0x80410c00
	.long	0x003c6706,0x206e000c,0x4e751d7c,0x0080ff4a
	.long	0x41f60162,0xff680004,0x4e752008,0x61ff0000
	.long	0x0d70206e,0x000c4e75,0x200861ff,0x00000db2
	.long	0x206e000c,0x0c00000c,0x67024e75,0x51882d48
	.long	0x000c4e75,0x102eff41,0x22000240,0x00380281
	.long	0x00000007,0x0c000018,0x670e0c00,0x00206700
	.long	0x0076206e,0x000c4e75,0x323b120e,0x206e000c
	.long	0x4efb1006,0x4afc0008,0x0010001a,0x0024002c
	.long	0x0034003c,0x0044004e,0x06ae0000,0x000cffa4
	.long	0x4e7506ae,0x0000000c,0xffa84e75,0xd5fc0000
	.long	0x000c4e75,0xd7fc0000,0x000c4e75,0xd9fc0000
	.long	0x000c4e75,0xdbfc0000,0x000c4e75,0x06ae0000
	.long	0x000cffd4,0x4e751d7c,0x0004ff4a,0x06ae0000
	.long	0x000cffd8,0x4e75323b,0x1214206e,0x000c5188
	.long	0x51ae000c,0x4efb1006,0x4afc0008,0x00100016
	.long	0x001c0020,0x00240028,0x002c0032,0x2d48ffa4
	.long	0x4e752d48,0xffa84e75,0x24484e75,0x26484e75
	.long	0x28484e75,0x2a484e75,0x2d48ffd4,0x4e752d48
	.long	0xffd81d7c,0x0008ff4a,0x4e75082e,0x0006ff42
	.long	0x6664102e,0xff430800,0x0005672c,0x08000004
	.long	0x670a0240,0x007f0c40,0x0038661c,0xe9ee0183
	.long	0xff4261ff,0x00000d6a,0x61ff0000,0x12060c00
	.long	0x00066722,0x1d40ff4f,0xe9ee00c3,0xff4261ff
	.long	0x00000cbe,0x61ff0000,0x11ea0c00,0x0006670e
	.long	0x1d40ff4e,0x4e7561ff,0x00001148,0x60d661ff
	.long	0x00001140,0x60ea302e,0xff420800,0x0005672c
	.long	0x08000004,0x670a0240,0x007f0c40,0x0038661c
	.long	0xe9ee0183,0xff4261ff,0x00000d06,0x61ff0000
	.long	0x11a20c00,0x00066726,0x1d40ff4f,0xe9ee00c3
	.long	0xff42e9ee,0x1283ff40,0x660000be,0x422eff4e
	.long	0xe9ee1343,0xff40303b,0x02124efb,0x000e61ff
	.long	0x000010e0,0x60d24afc,0x00080010,0x006a0000
	.long	0x0000002e,0x0000004c,0x000061ff,0x00000a5c
	.long	0xf2004000,0xf22ef080,0xff6cf281,0x00044e75
	.long	0x1d7c0001,0xff4e4e75,0x61ff0000,0x0a3ef200
	.long	0x5000f22e,0xf080ff6c,0xf2810004,0x4e751d7c
	.long	0x0001ff4e,0x4e7561ff,0x00000a20,0xf2005800
	.long	0xf22ef080,0xff6cf281,0x00044e75,0x1d7c0001
	.long	0xff4e4e75,0x61ff0000,0x0a022d40,0xff5441ee
	.long	0xff5461ff,0x000011de,0x1d40ff4e,0x0c000005
	.long	0x670001a4,0x0c000004,0x6700015e,0xf2104400
	.long	0xf22ef080,0xff6c4e75,0x422eff4e,0x303b020a
	.long	0x4efb0006,0x4afc0008,0x001000e2,0x027202b0
	.long	0x005601a0,0x009c0000,0x700461ff,0xfffffd22
	.long	0x0c2e0080,0xff4a6726,0x61ffffff,0x4dde4a81
	.long	0x66ff0000,0x1eecf200,0x4000f22e,0xf080ff6c
	.long	0xf2810004,0x4e751d7c,0x0001ff4e,0x4e7561ff
	.long	0xffff4d76,0x4a8166ff,0xffff6e8a,0x60d87002
	.long	0x61ffffff,0xfcdc0c2e,0x0080ff4a,0x672661ff
	.long	0xffff4d82,0x4a8166ff,0x00001e98,0xf2005000
	.long	0xf22ef080,0xff6cf281,0x00044e75,0x1d7c0001
	.long	0xff4e4e75,0x61ffffff,0x4d1a4a81,0x66ffffff
	.long	0x6e4460d8,0x700161ff,0xfffffc96,0x0c2e0080
	.long	0xff4a6726,0x61ffffff,0x4d264a81,0x66ff0000
	.long	0x1e42f200,0x5800f22e,0xf080ff6c,0xf2810004
	.long	0x4e751d7c,0x0001ff4e,0x4e7561ff,0xffff4cd4
	.long	0x4a8166ff,0xffff6dfe,0x60d87004,0x61ffffff
	.long	0xfc500c2e,0x0080ff4a,0x673e61ff,0xffff4d0c
	.long	0x2d40ff54,0x4a8166ff,0x00001e16,0x41eeff54
	.long	0x61ff0000,0x10a01d40,0xff4e0c00,0x00046700
	.long	0x00280c00,0x00056700,0x005ef22e,0x4400ff54
	.long	0xf22ef080,0xff6c4e75,0x61ffffff,0x4c8c4a81
	.long	0x66ffffff,0x6da060c4,0x426eff6c,0xe9d00257
	.long	0xe1882d40,0xff7042ae,0xff74426e,0xff6c0810
	.long	0x00076706,0x08ee0007,0xff6c41ee,0xff6c61ff
	.long	0x00000e78,0x323c3f81,0x9240836e,0xff6c1d7c
	.long	0x0000ff4e,0x4e753d7c,0x7fffff6c,0xe9d00257
	.long	0xe1882d40,0xff7042ae,0xff740810,0x00076706
	.long	0x08ee0007,0xff6c4e75,0x700861ff,0xfffffb92
	.long	0x0c2e0080,0xff4a6740,0x43eeff54,0x700861ff
	.long	0xffff4bc4,0x4a8166ff,0x00001d64,0x41eeff54
	.long	0x61ff0000,0x0f701d40,0xff4e0c00,0x00046700
	.long	0x002e0c00,0x00056700,0x0068f22e,0x5400ff54
	.long	0xf22ef080,0xff6c4e75,0x43eeff54,0x700861ff
	.long	0xffff4b6e,0x4a8166ff,0xffff6cda,0x60be426e
	.long	0xff6ce9d0,0x031f2d40,0xff70e9e8,0x02d50004
	.long	0x720be3a8,0x2d40ff74,0x08100007,0x670608ee
	.long	0x0007ff6c,0x41eeff6c,0x61ff0000,0x0dae323c
	.long	0x3c019240,0x836eff6c,0x1d7c0000,0xff4e4e75
	.long	0x3d7c7fff,0xff6ce9d0,0x031f2d40,0xff70e9e8
	.long	0x02d50004,0x720be3a8,0x2d40ff74,0x08100007
	.long	0x670608ee,0x0007ff6c,0x4e75700c,0x61ffffff
	.long	0xfac043ee,0xff6c700c,0x61ffffff,0x4afa4a81
	.long	0x66ff0000,0x1ca841ee,0xff6c61ff,0x00000e24
	.long	0x0c000006,0x67061d40,0xff4e4e75,0x61ff0000
	.long	0x0d821d40,0xff4e4e75,0x61ff0000,0x125441ee
	.long	0xff6c61ff,0x00000dfc,0x0c000006,0x67061d40
	.long	0xff4e4e75,0x61ff0000,0x0d5a1d40,0xff4e4e75
	.long	0xe9ee10c3,0xff42327b,0x120a4efb,0x98064afc
	.long	0x000800e0,0x01e00148,0x06200078,0x041a0010
	.long	0x06204a2e,0xff4e664c,0xf228d080,0x0000f200
	.long	0x9000f200,0x7800f23c,0x90000000,0x0000f201
	.long	0xa800836e,0xff66122e,0xff410201,0x00386714
	.long	0x206e000c,0x61ffffff,0x4ae84a81,0x66ff0000
	.long	0x1c0a4e75,0x122eff41,0x02410007,0x61ff0000
	.long	0x07644e75,0x22280000,0x02818000,0x00000081
	.long	0x00800000,0xf2014400,0x60a44a2e,0xff4e664c
	.long	0xf228d080,0x0000f200,0x9000f200,0x7000f23c
	.long	0x90000000,0x0000f201,0xa800836e,0xff66122e
	.long	0xff410201,0x00386714,0x206e000c,0x61ffffff
	.long	0x4a964a81,0x66ff0000,0x1bb04e75,0x122eff41
	.long	0x02410007,0x61ff0000,0x06c04e75,0x22280000
	.long	0x02818000,0x00000081,0x00800000,0xf2014400
	.long	0x60a44a2e,0xff4e664c,0xf228d080,0x0000f200
	.long	0x9000f200,0x6000f23c,0x90000000,0x0000f201
	.long	0xa800836e,0xff66122e,0xff410201,0x00386714
	.long	0x206e000c,0x61ffffff,0x4a444a81,0x66ff0000
	.long	0x1b564e75,0x122eff41,0x02410007,0x61ff0000
	.long	0x061c4e75,0x22280000,0x02818000,0x00000081
	.long	0x00800000,0xf2014400,0x60a43d68,0x0000ff84
	.long	0x426eff86,0x2d680004,0xff882d68,0x0008ff8c
	.long	0xf228d080,0x000061ff,0xfffff94c,0x224841ee
	.long	0xff84700c,0x0c2e0008,0xff4a6726,0x61ffffff
	.long	0x492c4a81,0x66000052,0x4a2eff4e,0x66024e75
	.long	0x08ee0003,0xff66102e,0xff620200,0x000a6616
	.long	0x4e7561ff,0xffff5788,0x4a816600,0x002c4a2e
	.long	0xff4e66dc,0x4e7541ee,0xff8461ff,0x00000b3c
	.long	0x44400240,0x7fff026e,0x8000ff84,0x816eff84
	.long	0xf22ed040,0xff844e75,0x2caeffd4,0x60ff0000
	.long	0x1ab20200,0x00300000,0x00402d40,0xff5c3028
	.long	0x00000240,0x7fff0c40,0x407e6e00,0x00e66700
	.long	0x01520c40,0x3f816d00,0x0058f228,0xd0800000
	.long	0xf22e9000,0xff5cf23c,0x88000000,0x0000f200
	.long	0x6400f23c,0x90000000,0x0000f201,0xa800836e
	.long	0xff66122e,0xff410201,0x00386714,0x206e000c
	.long	0x61ffffff,0x49184a81,0x66ff0000,0x1a2a4e75
	.long	0x122eff41,0x02410007,0x61ff0000,0x04f04e75
	.long	0x08ee0003,0xff663d68,0x0000ff84,0x2d680004
	.long	0xff882d68,0x0008ff8c,0x2f084280,0x0c2e0004
	.long	0xff4e660a,0x41eeff84,0x61ff0000,0x0a6e41ee
	.long	0xff84222e,0xff5c61ff,0x00000c86,0x41eeff84
	.long	0x61ff0000,0x034c122e,0xff410201,0x00386714
	.long	0x206e000c,0x61ffffff,0x48a44a81,0x66ff0000
	.long	0x19b6600e,0x122eff41,0x02410007,0x61ff0000
	.long	0x047c122e,0xff620201,0x000a6600,0x00b8588f
	.long	0x4e754a28,0x0007660e,0x4aa80008,0x6608006e
	.long	0x1048ff66,0x6006006e,0x1248ff66,0x2f084a28
	.long	0x00005bc1,0x202eff5c,0x61ff0000,0x0d12f210
	.long	0xd080f200,0x6400122e,0xff410201,0x00386714
	.long	0x206e000c,0x61ffffff,0x48344a81,0x66ff0000
	.long	0x1946600e,0x122eff41,0x02410007,0x61ff0000
	.long	0x040c122e,0xff620201,0x000a6600,0x007c588f
	.long	0x4e753228,0x00000241,0x80000041,0x3fff3d41
	.long	0xff842d68,0x0004ff88,0x2d680008,0xff8cf22e
	.long	0x9000ff5c,0xf22e4800,0xff84f23c,0x90000000
	.long	0x0000f200,0x0018f23c,0x58380002,0xf294fe7c
	.long	0x6000ff50,0x205f3d68,0x0000ff84,0x2d680004
	.long	0xff882d68,0x0008ff8c,0x0c2e0004,0xff4e662c
	.long	0x41eeff84,0x61ff0000,0x09424480,0x02407fff
	.long	0xefee004f,0xff846014,0x205f3d68,0x0000ff84
	.long	0x2d680004,0xff882d68,0x0008ff8c,0x08ae0007
	.long	0xff8456ee,0xff8641ee,0xff84122e,0xff5fe809
	.long	0x0241000c,0x4841122e,0xff5fe809,0x02410003
	.long	0x428061ff,0x00000782,0x4a2eff86,0x670608ee
	.long	0x0007ff84,0xf22ed040,0xff844e75,0x02000030
	.long	0x00000080,0x2d40ff5c,0x30280000,0x02407fff
	.long	0x0c4043fe,0x6e0000c8,0x67000120,0x0c403c01
	.long	0x6d000046,0xf228d080,0x0000f22e,0x9000ff5c
	.long	0xf23c8800,0x00000000,0xf22e7400,0xff54f23c
	.long	0x90000000,0x0000f200,0xa800816e,0xff66226e
	.long	0x000c41ee,0xff547008,0x61ffffff,0x46304a81
	.long	0x66ff0000,0x18004e75,0x08ee0003,0xff663d68
	.long	0x0000ff84,0x2d680004,0xff882d68,0x0008ff8c
	.long	0x2f084280,0x0c2e0004,0xff4e660a,0x41eeff84
	.long	0x61ff0000,0x084641ee,0xff84222e,0xff5c61ff
	.long	0x00000a5e,0x41eeff84,0x61ff0000,0x00d22d40
	.long	0xff542d41,0xff58226e,0x000c41ee,0xff547008
	.long	0x61ffffff,0x45c84a81,0x66ff0000,0x1798122e
	.long	0xff620201,0x000a6600,0xfe9c588f,0x4e753028
	.long	0x000a0240,0x07ff6608,0x006e1048,0xff666006
	.long	0x006e1248,0xff662f08,0x4a280000,0x5bc1202e
	.long	0xff5c61ff,0x00000af8,0xf210d080,0xf22e7400
	.long	0xff54226e,0x000c41ee,0xff547008,0x61ffffff
	.long	0x456c4a81,0x66ff0000,0x173c122e,0xff620201
	.long	0x000a6600,0xfe74588f,0x4e753228,0x00000241
	.long	0x80000041,0x3fff3d41,0xff842d68,0x0004ff88
	.long	0x2d680008,0xff8cf22e,0x9000ff5c,0xf22e4800
	.long	0xff84f23c,0x90000000,0x0000f200,0x0018f23c
	.long	0x58380002,0xf294feae,0x6000ff64,0x42803028
	.long	0x00000440,0x3fff0640,0x03ff4a28,0x00046b02
	.long	0x53404840,0xe9884a28,0x00006a04,0x08c0001f
	.long	0x22280004,0xe9c11054,0x80812d40,0xff542228
	.long	0x00047015,0xe1a92d41,0xff582228,0x0008e9c1
	.long	0x0015222e,0xff588280,0x202eff54,0x4e754280
	.long	0x30280000,0x04403fff,0x0640007f,0x4a280004
	.long	0x6b025340,0x4840ef88,0x4a280000,0x6a0408c0
	.long	0x001f2228,0x00040281,0x7fffff00,0xe0898081
	.long	0x4e7561ff,0xfffff490,0x2f08102e,0xff4e6600
	.long	0x0082082e,0x0004ff42,0x6712122e,0xff43e809
	.long	0x02410007,0x61ff0000,0x00926004,0x102eff43
	.long	0xebc00647,0x2f0041ee,0xff6c61ff,0x00000ed0
	.long	0x02aecfff,0xf00fff84,0x201f4a2e,0xff876616
	.long	0x4aaeff88,0x66104aae,0xff8c660a,0x4a806606
	.long	0x026ef000,0xff8441ee,0xff84225f,0x700c0c2e
	.long	0x0008ff4a,0x670e61ff,0xffff4412,0x4a816600
	.long	0xfb384e75,0x61ffffff,0x52864a81,0x6600fb2a
	.long	0x4e750c00,0x00046700,0xff7a41ee,0xff6c426e
	.long	0xff6e0c00,0x00056702,0x60c0006e,0x4080ff66
	.long	0x08ee0006,0xff7060b2,0x303b1206,0x4efb0002
	.long	0x00200026,0x002c0030,0x00340038,0x003c0040
	.long	0x0044004a,0x00500054,0x0058005c,0x00600064
	.long	0x202eff9c,0x4e75202e,0xffa04e75,0x20024e75
	.long	0x20034e75,0x20044e75,0x20054e75,0x20064e75
	.long	0x20074e75,0x202effa4,0x4e75202e,0xffa84e75
	.long	0x200a4e75,0x200b4e75,0x200c4e75,0x200d4e75
	.long	0x20164e75,0x202effd8,0x4e75323b,0x12064efb
	.long	0x10020010,0x0016001c,0x00200024,0x0028002c
	.long	0x00302d40,0xff9c4e75,0x2d40ffa0,0x4e752400
	.long	0x4e752600,0x4e752800,0x4e752a00,0x4e752c00
	.long	0x4e752e00,0x4e75323b,0x12064efb,0x10020010
	.long	0x0016001c,0x00200024,0x0028002c,0x00303d40
	.long	0xff9e4e75,0x3d40ffa2,0x4e753400,0x4e753600
	.long	0x4e753800,0x4e753a00,0x4e753c00,0x4e753e00
	.long	0x4e75323b,0x12064efb,0x10020010,0x0016001c
	.long	0x00200024,0x0028002c,0x00301d40,0xff9f4e75
	.long	0x1d40ffa3,0x4e751400,0x4e751600,0x4e751800
	.long	0x4e751a00,0x4e751c00,0x4e751e00,0x4e75323b
	.long	0x12064efb,0x10020010,0x0016001c,0x00200024
	.long	0x0028002c,0x0030d1ae,0xffa44e75,0xd1aeffa8
	.long	0x4e75d5c0,0x4e75d7c0,0x4e75d9c0,0x4e75dbc0
	.long	0x4e75d196,0x4e751d7c,0x0004ff4a,0x0c000001
	.long	0x6706d1ae,0xffd84e75,0x54aeffd8,0x4e75323b
	.long	0x12064efb,0x10020010,0x0016001c,0x00200024
	.long	0x0028002c,0x003091ae,0xffa44e75,0x91aeffa8
	.long	0x4e7595c0,0x4e7597c0,0x4e7599c0,0x4e759bc0
	.long	0x4e759196,0x4e751d7c,0x0008ff4a,0x0c000001
	.long	0x670691ae,0xffd84e75,0x55aeffd8,0x4e75303b
	.long	0x02064efb,0x00020010,0x00280040,0x004c0058
	.long	0x00640070,0x007c2d6e,0xffdcff6c,0x2d6effe0
	.long	0xff702d6e,0xffe4ff74,0x41eeff6c,0x4e752d6e
	.long	0xffe8ff6c,0x2d6effec,0xff702d6e,0xfff0ff74
	.long	0x41eeff6c,0x4e75f22e,0xf020ff6c,0x41eeff6c
	.long	0x4e75f22e,0xf010ff6c,0x41eeff6c,0x4e75f22e
	.long	0xf008ff6c,0x41eeff6c,0x4e75f22e,0xf004ff6c
	.long	0x41eeff6c,0x4e75f22e,0xf002ff6c,0x41eeff6c
	.long	0x4e75f22e,0xf001ff6c,0x41eeff6c,0x4e75303b
	.long	0x02064efb,0x00020010,0x00280040,0x004c0058
	.long	0x00640070,0x007c2d6e,0xffdcff78,0x2d6effe0
	.long	0xff7c2d6e,0xffe4ff80,0x41eeff78,0x4e752d6e
	.long	0xffe8ff78,0x2d6effec,0xff7c2d6e,0xfff0ff80
	.long	0x41eeff78,0x4e75f22e,0xf020ff78,0x41eeff78
	.long	0x4e75f22e,0xf010ff78,0x41eeff78,0x4e75f22e
	.long	0xf008ff78,0x41eeff78,0x4e75f22e,0xf004ff78
	.long	0x41eeff78,0x4e75f22e,0xf002ff78,0x41eeff78
	.long	0x4e75f22e,0xf001ff78,0x41eeff78,0x4e75303b
	.long	0x02064efb,0x00020010,0x00180020,0x002a0034
	.long	0x003e0048,0x0052f22e,0xf080ffdc,0x4e75f22e
	.long	0xf080ffe8,0x4e75f227,0xe001f21f,0xd0204e75
	.long	0xf227e001,0xf21fd010,0x4e75f227,0xe001f21f
	.long	0xd0084e75,0xf227e001,0xf21fd004,0x4e75f227
	.long	0xe001f21f,0xd0024e75,0xf227e001,0xf21fd001
	.long	0x4e750000,0x3f813c01,0xe408323b,0x02f63001
	.long	0x90680000,0x0c400042,0x6a164280,0x082e0001
	.long	0xff666704,0x08c0001d,0x61ff0000,0x001a4e75
	.long	0x203c2000,0x00003141,0x000042a8,0x000442a8
	.long	0x00084e75,0x2d680008,0xff542d40,0xff582001
	.long	0x92680000,0x6f100c41,0x00206d10,0x0c410040
	.long	0x6d506000,0x009a202e,0xff584e75,0x2f023140
	.long	0x00007020,0x90410c41,0x001d6d08,0x142eff58
	.long	0x852eff57,0xe9e82020,0x0004e9e8,0x18000004
	.long	0xe9ee0800,0xff542142,0x00042141,0x0008e8c0
	.long	0x009e6704,0x08c0001d,0x0280e000,0x0000241f
	.long	0x4e752f02,0x31400000,0x04410020,0x70209041
	.long	0x142eff58,0x852eff57,0xe9e82020,0x0004e9e8
	.long	0x18000004,0xe8c1009e,0x660ce8ee,0x081fff54
	.long	0x66042001,0x60062001,0x08c0001d,0x42a80004
	.long	0x21420008,0x0280e000,0x0000241f,0x4e753140
	.long	0x00000c41,0x00416d12,0x672442a8,0x000442a8
	.long	0x0008203c,0x20000000,0x4e752028,0x00042200
	.long	0x0280c000,0x00000281,0x3fffffff,0x60122028
	.long	0x00040280,0x80000000,0xe2880281,0x7fffffff
	.long	0x66164aa8,0x00086610,0x4a2eff58,0x660a42a8
	.long	0x000442a8,0x00084e75,0x08c0001d,0x42a80004
	.long	0x42a80008,0x4e7561ff,0x00000110,0x4a806700
	.long	0x00fa006e,0x0208ff66,0x327b1206,0x4efb9802
	.long	0x004000ea,0x00240008,0x4a280002,0x6b0000dc
	.long	0x70ff4841,0x0c010004,0x6700003e,0x6e000094
	.long	0x60000064,0x4a280002,0x6a0000c0,0x70ff4841
	.long	0x0c010004,0x67000022,0x6e000078,0x60000048
	.long	0xe3806400,0x00a64841,0x0c010004,0x6700000a
	.long	0x6e000060,0x60000030,0x06a80000,0x01000004
	.long	0x640ce4e8,0x0004e4e8,0x00065268,0x00004a80
	.long	0x66060268,0xfe000006,0x02a8ffff,0xff000004
	.long	0x42a80008,0x4e7552a8,0x0008641a,0x52a80004
	.long	0x6414e4e8,0x0004e4e8,0x0006e4e8,0x0008e4e8
	.long	0x000a5268,0x00004a80,0x66060228,0x00fe000b
	.long	0x4e7506a8,0x00000800,0x0008641a,0x52a80004
	.long	0x6414e4e8,0x0004e4e8,0x0006e4e8,0x0008e4e8
	.long	0x000a5268,0x00004a80,0x66060268,0xf000000a
	.long	0x02a8ffff,0xf8000008,0x4e754841,0x0c010004
	.long	0x6700ff86,0x6eea4e75,0x48414a01,0x66044841
	.long	0x4e7548e7,0x30000c01,0x00046622,0xe9e83602
	.long	0x0004741e,0xe5ab2428,0x00040282,0x0000003f
	.long	0x66284aa8,0x00086622,0x4a80661e,0x6020e9e8
	.long	0x35420008,0x741ee5ab,0x24280008,0x02820000
	.long	0x01ff6606,0x4a806602,0x600408c3,0x001d2003
	.long	0x4cdf000c,0x48414e75,0x2f022f03,0x20280004
	.long	0x22280008,0xedc02000,0x671ae5a8,0xe9c13022
	.long	0x8083e5a9,0x21400004,0x21410008,0x2002261f
	.long	0x241f4e75,0xedc12000,0xe5a90682,0x00000020
	.long	0x21410004,0x42a80008,0x2002261f,0x241f4e75
	.long	0xede80000,0x0004660e,0xede80000,0x00086700
	.long	0x00740640,0x00204281,0x32280000,0x02417fff
	.long	0xb0416e1c,0x92403028,0x00000240,0x80008240
	.long	0x31410000,0x61ffffff,0xff82103c,0x00004e75
	.long	0x0c010020,0x6e20e9e8,0x08400004,0x21400004
	.long	0x20280008,0xe3a82140,0x00080268,0x80000000
	.long	0x103c0004,0x4e750441,0x00202028,0x0008e3a8
	.long	0x21400004,0x42a80008,0x02688000,0x0000103c
	.long	0x00044e75,0x02688000,0x0000103c,0x00014e75
	.long	0x30280000,0x02407fff,0x0c407fff,0x67480828
	.long	0x00070004,0x6706103c,0x00004e75,0x4a406618
	.long	0x4aa80004,0x660c4aa8,0x00086606,0x103c0001
	.long	0x4e75103c,0x00044e75,0x4aa80004,0x66124aa8
	.long	0x0008660c,0x02688000,0x0000103c,0x00014e75
	.long	0x103c0006,0x4e754aa8,0x00086612,0x20280004
	.long	0x02807fff,0xffff6606,0x103c0002,0x4e750828
	.long	0x00060004,0x6706103c,0x00034e75,0x103c0005
	.long	0x4e752028,0x00002200,0x02807ff0,0x0000670e
	.long	0x0c807ff0,0x00006728,0x103c0000,0x4e750281
	.long	0x000fffff,0x66ff0000,0x00144aa8,0x000466ff
	.long	0x0000000a,0x103c0001,0x4e75103c,0x00044e75
	.long	0x0281000f,0xffff66ff,0x00000014,0x4aa80004
	.long	0x66ff0000,0x000a103c,0x00024e75,0x08010013
	.long	0x66ff0000,0x000a103c,0x00054e75,0x103c0003
	.long	0x4e752028,0x00002200,0x02807f80,0x0000670e
	.long	0x0c807f80,0x0000671e,0x103c0000,0x4e750281
	.long	0x007fffff,0x66ff0000,0x000a103c,0x00014e75
	.long	0x103c0004,0x4e750281,0x007fffff,0x66ff0000
	.long	0x000a103c,0x00024e75,0x08010016,0x66ff0000
	.long	0x000a103c,0x00054e75,0x103c0003,0x4e752f01
	.long	0x08280007,0x000056e8,0x00023228,0x00000241
	.long	0x7fff9240,0x31410000,0x2f08202f,0x00040240
	.long	0x00c0e848,0x61ffffff,0xfae22057,0x322f0006
	.long	0x024100c0,0xe8494841,0x322f0006,0x02410030
	.long	0xe84961ff,0xfffffc22,0x205f08a8,0x00070000
	.long	0x4a280002,0x670a08e8,0x00070000,0x42280002
	.long	0x42804aa8,0x0004660a,0x4aa80008,0x660408c0
	.long	0x0002082e,0x0001ff66,0x670608ee,0x0005ff67
	.long	0x588f4e75,0x2f010828,0x00070000,0x56e80002
	.long	0x32280000,0x02417fff,0x92403141,0x00002f08
	.long	0x428061ff,0xfffffa64,0x2057323c,0x00044841
	.long	0x322f0006,0x02410030,0xe84961ff,0xfffffbaa
	.long	0x205f08a8,0x00070000,0x4a280002,0x670a08e8
	.long	0x00070000,0x42280002,0x42804aa8,0x0004660a
	.long	0x4aa80008,0x660408c0,0x0002082e,0x0001ff66
	.long	0x670608ee,0x0005ff67,0x588f4e75,0x02410010
	.long	0xe8088200,0x3001e309,0x600e0241,0x00108200
	.long	0x48408200,0x3001e309,0x103b0008,0x41fb1620
	.long	0x4e750200,0x00020200,0x00020200,0x00020000
	.long	0x00000a08,0x0a080a08,0x0a080a08,0x0a087fff
	.long	0x00000000,0x00000000,0x00000000,0x00007ffe
	.long	0x0000ffff,0xffffffff,0xffff0000,0x00007ffe
	.long	0x0000ffff,0xffffffff,0xffff0000,0x00007fff
	.long	0x00000000,0x00000000,0x00000000,0x00007fff
	.long	0x00000000,0x00000000,0x00000000,0x0000407e
	.long	0x0000ffff,0xff000000,0x00000000,0x0000407e
	.long	0x0000ffff,0xff000000,0x00000000,0x00007fff
	.long	0x00000000,0x00000000,0x00000000,0x00007fff
	.long	0x00000000,0x00000000,0x00000000,0x000043fe
	.long	0x0000ffff,0xffffffff,0xf8000000,0x000043fe
	.long	0x0000ffff,0xffffffff,0xf8000000,0x00007fff
	.long	0x00000000,0x00000000,0x00000000,0x00000000
	.long	0x00000000,0x00000000,0x00000000,0x00000000
	.long	0x00000000,0x00000000,0x00000000,0x00000000
	.long	0x00000000,0x00000000,0x00000000,0x00000000
	.long	0x00000000,0x00000000,0x00000000,0x0000ffff
	.long	0x00000000,0x00000000,0x00000000,0x0000fffe
	.long	0x0000ffff,0xffffffff,0xffff0000,0x0000ffff
	.long	0x00000000,0x00000000,0x00000000,0x0000fffe
	.long	0x0000ffff,0xffffffff,0xffff0000,0x0000ffff
	.long	0x00000000,0x00000000,0x00000000,0x0000c07e
	.long	0x0000ffff,0xff000000,0x00000000,0x0000ffff
	.long	0x00000000,0x00000000,0x00000000,0x0000c07e
	.long	0x0000ffff,0xff000000,0x00000000,0x0000ffff
	.long	0x00000000,0x00000000,0x00000000,0x0000c3fe
	.long	0x0000ffff,0xffffffff,0xf8000000,0x0000ffff
	.long	0x00000000,0x00000000,0x00000000,0x0000c3fe
	.long	0x0000ffff,0xffffffff,0xf8000000,0x0000700c
	.long	0x61ffffff,0xe82c43ee,0xff6c700c,0x61ffffff
	.long	0x38664a81,0x66ff0000,0x0a14e9ee,0x004fff6c
	.long	0x0c407fff,0x66024e75,0x102eff6f,0x0200000f
	.long	0x660e4aae,0xff706608,0x4aaeff74,0x66024e75
	.long	0x41eeff6c,0x61ff0000,0x001cf22e,0xf080ff6c
	.long	0x4e750000,0x00000203,0x02030203,0x03020302
	.long	0x02032d68,0x0000ff84,0x2d680004,0xff882d68
	.long	0x0008ff8c,0x41eeff84,0x48e73c00,0xf227e001
	.long	0x74027604,0x28104281,0x4c3c1001,0x0000000a
	.long	0xe9c408c4,0xd2805803,0x51caffee,0x0804001e
	.long	0x67024481,0x04810000,0x00106c0e,0x44810084
	.long	0x40000000,0x00904000,0x00002f01,0x7201f23c
	.long	0x44000000,0x0000e9d0,0x0704f200,0x58222830
	.long	0x1c007600,0x7407f23c,0x44234120,0x0000e9c4
	.long	0x08c4f200,0x58225803,0x51caffec,0x52810c81
	.long	0x00000002,0x6fd80810,0x001f6704,0xf200001a
	.long	0x22170c81,0x0000001b,0x6f0000e4,0x0810001e
	.long	0x66744281,0x2810e9c4,0x07046624,0x52817a01
	.long	0x28305c00,0x66085081,0x52852830,0x5c004283
	.long	0x7407e9c4,0x08c46608,0x58835281,0x51cafff4
	.long	0x20012217,0x92806c10,0x44812810,0x00844000
	.long	0x00000090,0x40000000,0x43fb0170,0x00000666
	.long	0x4283f23c,0x44803f80,0x00007403,0xe2806406
	.long	0xf23148a3,0x38000683,0x0000000c,0x4a8066ec
	.long	0xf2000423,0x60684281,0x7a022830,0x5c006608
	.long	0x53855081,0x28305c00,0x761c7407,0xe9c408c4
	.long	0x66085983,0x528151ca,0xfff42001,0x22179280
	.long	0x6e104481,0x28100284,0xbfffffff,0x0290bfff
	.long	0xffff43fb,0x01700000,0x05fc4283,0xf23c4480
	.long	0x3f800000,0x7403e280,0x6406f231,0x48a33800
	.long	0x06830000,0x000c4a80,0x66ecf200,0x0420262e
	.long	0xff60e9c3,0x26822810,0xe582e9c4,0x0002d480
	.long	0x43fafe50,0x10312800,0x4283efc3,0x0682f203
	.long	0x9000e280,0x640a43fb,0x01700000,0x06446016
	.long	0xe280640a,0x43fb0170,0x000006d2,0x600843fb
	.long	0x01700000,0x05902001,0x6a084480,0x00904000
	.long	0x00004283,0xf23c4480,0x3f800000,0xe2806406
	.long	0xf23148a3,0x38000683,0x0000000c,0x4a8066ec
	.long	0x0810001e,0x6706f200,0x04206004,0xf2000423
	.long	0xf200a800,0x08800009,0x6706006e,0x0108ff66
	.long	0x588ff21f,0xd0404cdf,0x003cf23c,0x90000000
	.long	0x0000f23c,0x88000000,0x00004e75,0x3ffd0000
	.long	0x9a209a84,0xfbcff798,0x00000000,0x3ffd0000
	.long	0x9a209a84,0xfbcff799,0x00000000,0x3f800000
	.long	0x00000000,0x00000000,0x00000000,0x40000000
	.long	0x00000000,0x00000000,0x00000000,0x41200000
	.long	0x00000000,0x00000000,0x00000000,0x459a2800
	.long	0x00000000,0x00000000,0x00000000,0x00000000
	.long	0x03030202,0x03020203,0x02030302,0x48e73f20
	.long	0xf227e007,0xf23c9000,0x00000020,0x2d50ff58
	.long	0x2e00422e,0xff500c2e,0x0004ff4e,0x66000030
	.long	0x30100240,0x7fff2228,0x00042428,0x00085340
	.long	0xe38ae391,0x4a816cf6,0x4a406e04,0x50eeff50
	.long	0x02407fff,0x30802141,0x00042142,0x00082d50
	.long	0xff902d68,0x0004ff94,0x2d680008,0xff9802ae
	.long	0x7fffffff,0xff904a2e,0xff506708,0x2c3cffff
	.long	0xecbb6038,0x302eff90,0x3d7c3fff,0xff90f22e
	.long	0x4800ff90,0x04403fff,0xf2005022,0xf23a4428
	.long	0xff1cf293,0x000ef23a,0x4823ff02,0xf2066000
	.long	0x600af23a,0x4823fee6,0xf2066000,0xf23c8800
	.long	0x00000000,0x42454a87,0x6f042807,0x60062806
	.long	0x98875284,0x4a846f18,0x0c840000,0x00116f12
	.long	0x78114a87,0x6f0c00ae,0x00002080,0xff646002
	.long	0x78014a87,0x6e06be86,0x6d022c07,0x20065280
	.long	0x90844845,0x42454242,0x4a806c14,0x52450c80
	.long	0xffffecd4,0x6e080680,0x00000018,0x74184480
	.long	0xf23a4480,0xfe98e9ee,0x1682ff60,0xe349d245
	.long	0xe3494aae,0xff586c02,0x528145fa,0xfec01632
	.long	0x1800e98b,0xf2039000,0xe88b4a03,0x660a43fb
	.long	0x01700000,0x03706016,0xe20b640a,0x43fb0170
	.long	0x000003fe,0x600843fb,0x01700000,0x04904283
	.long	0xe2886406,0xf23148a3,0x38000683,0x0000000c
	.long	0x4a8066ec,0xf23c8800,0x00000000,0xf23c9000
	.long	0x00000010,0xf2104800,0xf2000018,0x4a456608
	.long	0xf2000420,0x6000008e,0x4a2eff50,0x67000072
	.long	0xf227e002,0x36170243,0x7fff0050,0x8000d650
	.long	0x04433fff,0xd6690024,0x04433fff,0xd6690030
	.long	0x04433fff,0x6b000048,0x02578000,0x87570250
	.long	0x7fff2f28,0x00082f28,0x00042f3c,0x3fff0000
	.long	0xf21fd080,0xf21f4823,0x2f29002c,0x2f290028
	.long	0x2f3c3fff,0x00002f29,0x00382f29,0x00342f3c
	.long	0x3fff0000,0xf21f4823,0xf21f4823,0x601660fe
	.long	0x4a42670c,0xf2294823,0x0024f229,0x48230030
	.long	0xf2000423,0xf200a800,0xf22e6800,0xff9045ee
	.long	0xff900800,0x0009670e,0x00aa0000,0x00010008
	.long	0xf22e4800,0xff902d6e,0xff60ff54,0x02ae0000
	.long	0x0030ff60,0x48e7c0c0,0x2f2eff54,0x2f2eff58
	.long	0x41eeff90,0xf2106800,0x4aaeff58,0x6c060090
	.long	0x80000000,0x2f2eff64,0xf22e9000,0xff60f23c
	.long	0x88000000,0x0000f22e,0x4801ff90,0xf200a800
	.long	0x816eff66,0x1d57ff64,0x588f2d5f,0xff582d5f
	.long	0xff544cdf,0x03032d6e,0xff58ff90,0x2d6eff54
	.long	0xff604845,0x4a4566ff,0x00000086,0xf23a4500
	.long	0xfcec2004,0x53804283,0xe2886406,0xf2314923
	.long	0x38000683,0x0000000c,0x4a8066ec,0x4a2eff50
	.long	0x670af200,0x001860ff,0x00000028,0xf2000018
	.long	0xf2000838,0xf293001a,0x53863a3c,0x0001f23c
	.long	0x90000000,0x0020f23a,0x4523fcc2,0x6000fda8
	.long	0xf23a4523,0xfcb8f200,0x0838f294,0x005cf292
	.long	0x000cf23a,0x4420fca6,0x5286604c,0x52863a3c
	.long	0x0001f23c,0x90000000,0x00206000,0xfd7af23a
	.long	0x4500fc6a,0x20044283,0xe2886406,0xf2314923
	.long	0x38000683,0x0000000c,0x4a8066ec,0xf2000018
	.long	0xf2000838,0xf28e0012,0xf23a4420,0xfc605286
	.long	0x5284f23a,0x4523fc56,0xf23c9000,0x00000010
	.long	0xf2000820,0x41eeff84,0xf2106800,0x24280004
	.long	0x26280008,0x42a80004,0x42a80008,0x20104840
	.long	0x67140480,0x00003ffd,0x4a806e0a,0x4480e28a
	.long	0xe29351c8,0xfffa4a82,0x66044a83,0x67104281
	.long	0x06830000,0x0080d581,0x0283ffff,0xff802004
	.long	0x568861ff,0x000002b0,0x4a2eff50,0x6728f200
	.long	0x003af281,0x000cf206,0x4000f200,0x0018602e
	.long	0x4a876d08,0xf23a4400,0xfbe46022,0xf2064000
	.long	0xf2000018,0x6018f200,0x003af28e,0x000af23a
	.long	0x4400fb9a,0x6008f206,0x4000f200,0x0018f229
	.long	0x48200018,0xf22e6800,0xff90242a,0x0004262a
	.long	0x00083012,0x670e0440,0x3ffd4440,0xe28ae293
	.long	0x51c8fffa,0x42810683,0x00000080,0xd5810283
	.long	0xffffff80,0x700441ee,0xff5461ff,0x00000228
	.long	0x202eff54,0x720ce2a8,0xefee010c,0xff84e2a8
	.long	0xefee0404,0xff844a00,0x670800ae,0x00002080
	.long	0xff644280,0x022e000f,0xff844aae,0xff586c02
	.long	0x70024a86,0x6c025280,0xefee0002,0xff84f23c
	.long	0x88000000,0x0000f21f,0xd0e04cdf,0x04fc4e75
	.long	0x40020000,0xa0000000,0x00000000,0x40050000
	.long	0xc8000000,0x00000000,0x400c0000,0x9c400000
	.long	0x00000000,0x40190000,0xbebc2000,0x00000000
	.long	0x40340000,0x8e1bc9bf,0x04000000,0x40690000
	.long	0x9dc5ada8,0x2b70b59e,0x40d30000,0xc2781f49
	.long	0xffcfa6d5,0x41a80000,0x93ba47c9,0x80e98ce0
	.long	0x43510000,0xaa7eebfb,0x9df9de8e,0x46a30000
	.long	0xe319a0ae,0xa60e91c7,0x4d480000,0xc9767586
	.long	0x81750c17,0x5a920000,0x9e8b3b5d,0xc53d5de5
	.long	0x75250000,0xc4605202,0x8a20979b,0x40020000
	.long	0xa0000000,0x00000000,0x40050000,0xc8000000
	.long	0x00000000,0x400c0000,0x9c400000,0x00000000
	.long	0x40190000,0xbebc2000,0x00000000,0x40340000
	.long	0x8e1bc9bf,0x04000000,0x40690000,0x9dc5ada8
	.long	0x2b70b59e,0x40d30000,0xc2781f49,0xffcfa6d6
	.long	0x41a80000,0x93ba47c9,0x80e98ce0,0x43510000
	.long	0xaa7eebfb,0x9df9de8e,0x46a30000,0xe319a0ae
	.long	0xa60e91c7,0x4d480000,0xc9767586,0x81750c18
	.long	0x5a920000,0x9e8b3b5d,0xc53d5de5,0x75250000
	.long	0xc4605202,0x8a20979b,0x40020000,0xa0000000
	.long	0x00000000,0x40050000,0xc8000000,0x00000000
	.long	0x400c0000,0x9c400000,0x00000000,0x40190000
	.long	0xbebc2000,0x00000000,0x40340000,0x8e1bc9bf
	.long	0x04000000,0x40690000,0x9dc5ada8,0x2b70b59d
	.long	0x40d30000,0xc2781f49,0xffcfa6d5,0x41a80000
	.long	0x93ba47c9,0x80e98cdf,0x43510000,0xaa7eebfb
	.long	0x9df9de8d,0x46a30000,0xe319a0ae,0xa60e91c6
	.long	0x4d480000,0xc9767586,0x81750c17,0x5a920000
	.long	0x9e8b3b5d,0xc53d5de4,0x75250000,0xc4605202
	.long	0x8a20979a,0x48e7ff00,0x7e015380,0x28022a03
	.long	0xe9c21003,0xe782e9c3,0x6003e783,0x8486e385
	.long	0xe3944846,0xd346d685,0x4e71d584,0x4e71d346
	.long	0x48464a47,0x67124847,0xe947de41,0x10c74847
	.long	0x424751c8,0xffc86012,0x48473e01,0x48475247
	.long	0x51c8ffba,0x4847e94f,0x10c74cdf,0x00ff4e75
	.long	0x70016100,0x00d63d7c,0x0121000a,0x6000007e
	.long	0x70026100,0x00c63d7c,0x0141000a,0x606e7004
	.long	0x610000b8,0x3d7c0101,0x000a6060,0x70086100
	.long	0x00aa3d7c,0x0161000a,0x6052700c,0x6100009c
	.long	0x3d7c0161,0x000a6044,0x70016100,0x008e3d7c
	.long	0x00a1000a,0x60367002,0x61000080,0x3d7c00c1
	.long	0x000a6028,0x70046100,0x00723d7c,0x0081000a
	.long	0x601a7008,0x61000064,0x3d7c00e1,0x000a600c
	.long	0x700c6100,0x00563d7c,0x00e1000a,0x2d6eff68
	.long	0x0006f22e,0xd0c0ffdc,0xf22e9c00,0xff604cee
	.long	0x0303ff9c,0x4e5e2f17,0x2f6f0008,0x00042f6f
	.long	0x000c0008,0x2f7c0000,0x0001000c,0x3f6f0006
	.long	0x000c3f7c,0x40080006,0x08170005,0x670608ef
	.long	0x0002000d,0x60ffffff,0x2d82122e,0xff410201
	.long	0x00380c01,0x00186700,0x000c0c01,0x00206700
	.long	0x00604e75,0x122eff41,0x02410007,0x323b1206
	.long	0x4efb1002,0x00100016,0x001c0020,0x00240028
	.long	0x002c0030,0x91aeffa4,0x4e7591ae,0xffa84e75
	.long	0x95c04e75,0x97c04e75,0x99c04e75,0x9bc04e75
	.long	0x91964e75,0x0c2e0030,0x000a6612,0x082e0005
	.long	0x0004660a,0x4e7a8800,0x91c04e7b,0x88004e75
	.long	0x448060a0,0x00000000,0x00000000,0x00000000
|~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
|MOTOROLA MICROPROCESSOR & MEMORY TECHNOLOGY GROUP
|M68000 Hi-Performance Microprocessor Division
|M68060 Software Package
|Production Release P1.00 -- October 10, 1994
|
|M68060 Software Package Copyright � 1993, 1994 Motorola Inc.  All rights reserved.
| 
|THE SOFTWARE is provided on an "AS IS" basis and without warranty.
|To the maximum extent permitted by applicable law,
|MOTOROLA DISCLAIMS ALL WARRANTIES WHETHER EXPRESS OR IMPLIED, 
|INCLUDING IMPLIED WARRANTIES OF MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE
|and any warranty against infringement with regard to the SOFTWARE
|(INCLUDING ANY MODIFIED VERSIONS THEREOF) and any accompanying written materials.
|
|To the maximum extent permitted by applicable law,
|IN NO EVENT SHALL MOTOROLA BE LIABLE FOR ANY DAMAGES WHATSOEVER
|(INCLUDING WITHOUT LIMITATION, DAMAGES FOR LOSS OF BUSINESS PROFITS,
|BUSINESS INTERRUPTION, LOSS OF BUSINESS INFORMATION, OR OTHER PECUNIARY LOSS)
|ARISING OF THE USE OR INABILITY TO USE THE SOFTWARE.
|Motorola assumes no responsibility for the maintenance and support of the SOFTWARE.
|
|You are hereby granted a copyright license to use, modify, and distribute the SOFTWARE
|so long as this entire notice is retained without alteration in any modified and/or
|redistributed versions, and that such modified versions are clearly identified as such.
|No licenses are granted by implication, estoppel or otherwise under any patents
|or trademarks of Motorola, Inc.
|~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
| fskeleton.s
|
| This file contains:
|	(1) example "Call-out"s
|	(2) example package entry code
|	(3) example "Call-out" table
|

#include <linux/linkage.h>

|################################
| (1) EXAMPLE CALL-OUTS		#
|				#
| _060_fpsp_done()		#
| _060_real_ovfl()		#
| _060_real_unfl()		#
| _060_real_operr()		#
| _060_real_snan()		#
| _060_real_dz()		#
| _060_real_inex()		#
| _060_real_bsun()		#
| _060_real_fline()		#
| _060_real_fpu_disabled()	#
| _060_real_trap()		#
|################################

|
| _060_fpsp_done():
|
| This is the main exit point for the 68060 Floating-Point
| Software Package. For a normal exit, all 060FPSP routines call this
| routine. The operating system can do system dependent clean-up or
| simply execute an "rte" as with the sample code below.
|
	.global		_060_fpsp_done
_060_fpsp_done:
	bral	 _060_isp_done	| do the same as isp_done

|
| _060_real_ovfl():
|
| This is the exit point for the 060FPSP when an enabled overflow exception
| is present. The routine below should point to the operating system handler 
| for enabled overflow conditions. The exception stack frame is an overflow
| stack frame. The FP state frame holds the EXCEPTIONAL OPERAND.
|
| The sample routine below simply clears the exception status bit and
| does an "rte".
|
	.global		_060_real_ovfl
_060_real_ovfl:
	fsave		-(%sp)
	move.w		#0x6000,0x2(%sp)
	frestore	(%sp)+
	bral		SYMBOL_NAME(trap)	| jump to trap handler


|
| _060_real_unfl():
|
| This is the exit point for the 060FPSP when an enabled underflow exception
| is present. The routine below should point to the operating system handler 
| for enabled underflow conditions. The exception stack frame is an underflow
| stack frame. The FP state frame holds the EXCEPTIONAL OPERAND.
|
| The sample routine below simply clears the exception status bit and
| does an "rte".
|
	.global		_060_real_unfl
_060_real_unfl:
	fsave		-(%sp)
	move.w		#0x6000,0x2(%sp)
	frestore	(%sp)+
	bral		SYMBOL_NAME(trap)	| jump to trap handler

|
| _060_real_operr():
|
| This is the exit point for the 060FPSP when an enabled operand error exception
| is present. The routine below should point to the operating system handler 
| for enabled operand error exceptions. The exception stack frame is an operand error
| stack frame. The FP state frame holds the source operand of the faulting
| instruction.
|
| The sample routine below simply clears the exception status bit and
| does an "rte".
|
	.global		_060_real_operr
_060_real_operr:
	fsave		-(%sp)
	move.w		#0x6000,0x2(%sp)
	frestore	(%sp)+
	bral		SYMBOL_NAME(trap)	| jump to trap handler

|
| _060_real_snan():
|
| This is the exit point for the 060FPSP when an enabled signalling NaN exception
| is present. The routine below should point to the operating system handler 
| for enabled signalling NaN exceptions. The exception stack frame is a signalling NaN
| stack frame. The FP state frame holds the source operand of the faulting
| instruction.
|
| The sample routine below simply clears the exception status bit and
| does an "rte".
|
	.global		_060_real_snan
_060_real_snan:
	fsave		-(%sp)
	move.w		#0x6000,0x2(%sp)
	frestore	(%sp)+
	bral		SYMBOL_NAME(trap)	| jump to trap handler

|
| _060_real_dz():
|
| This is the exit point for the 060FPSP when an enabled divide-by-zero exception
| is present. The routine below should point to the operating system handler 
| for enabled divide-by-zero exceptions. The exception stack frame is a divide-by-zero
| stack frame. The FP state frame holds the source operand of the faulting
| instruction.
|
| The sample routine below simply clears the exception status bit and
| does an "rte".
|
	.global		_060_real_dz
_060_real_dz:
	fsave		-(%sp)
	move.w		#0x6000,0x2(%sp)
	frestore	(%sp)+
	bral		SYMBOL_NAME(trap)	| jump to trap handler

|
| _060_real_inex():
|
| This is the exit point for the 060FPSP when an enabled inexact exception
| is present. The routine below should point to the operating system handler 
| for enabled inexact exceptions. The exception stack frame is an inexact
| stack frame. The FP state frame holds the source operand of the faulting
| instruction.
|
| The sample routine below simply clears the exception status bit and
| does an "rte".
|
	.global		_060_real_inex
_060_real_inex:
	fsave		-(%sp)
	move.w		#0x6000,0x2(%sp)
	frestore	(%sp)+
	bral		SYMBOL_NAME(trap)	| jump to trap handler

|
| _060_real_bsun():
|
| This is the exit point for the 060FPSP when an enabled bsun exception
| is present. The routine below should point to the operating system handler 
| for enabled bsun exceptions. The exception stack frame is a bsun
| stack frame.
|
| The sample routine below clears the exception status bit, clears the NaN
| bit in the FPSR, and does an "rte". The instruction that caused the 
| bsun will now be re-executed but with the NaN FPSR bit cleared.
|
	.global		_060_real_bsun
_060_real_bsun:
|	fsave		-(%sp)

	fmove.l		%fpsr,-(%sp)
	andi.b		#0xfe,(%sp)
	fmove.l		(%sp)+,%fpsr

	bral		SYMBOL_NAME(trap)	| jump to trap handler

|
| _060_real_fline():
|
| This is the exit point for the 060FPSP when an F-Line Illegal exception is 
| encountered. Three different types of exceptions can enter the F-Line exception
| vector number 11: FP Unimplemented Instructions, FP implemented instructions when
| the FPU is disabled, and F-Line Illegal instructions. The 060FPSP module
| _fpsp_fline() distinguishes between the three and acts appropriately. F-Line
| Illegals branch here.
| 
	.global		_060_real_fline
_060_real_fline:
	bral		SYMBOL_NAME(trap)	| jump to trap handler

|
| _060_real_fpu_disabled():
|
| This is the exit point for the 060FPSP when an FPU disabled exception is 
| encountered. Three different types of exceptions can enter the F-Line exception
| vector number 11: FP Unimplemented Instructions, FP implemented instructions when
| the FPU is disabled, and F-Line Illegal instructions. The 060FPSP module
| _fpsp_fline() distinguishes between the three and acts appropriately. FPU disabled
| exceptions branch here.
|
| The sample code below enables the FPU, sets the PC field in the exception stack
| frame to the PC of the instruction causing the exception, and does an "rte".
| The execution of the instruction then proceeds with an enabled floating-point
| unit.
|
	.global		_060_real_fpu_disabled
_060_real_fpu_disabled:
	move.l		%d0,-(%sp)		| enabled the fpu
	.long	0x4E7A0808			|movec		pcr,%d0
	bclr		#0x1,%d0
	.long	0x4E7B0808			|movec		%d0,pcr
	move.l		(%sp)+,%d0

	move.l		0xc(%sp),0x2(%sp)	| set "Current PC"
	rte

|
| _060_real_trap():
|
| This is the exit point for the 060FPSP when an emulated "ftrapcc" instruction
| discovers that the trap condition is true and it should branch to the operating
| system handler for the trap exception vector number 7.
|
| The sample code below simply executes an "rte".
|
	.global		_060_real_trap
_060_real_trap:
	bral		SYMBOL_NAME(trap)	| jump to trap handler

|############################################################################

|#################################
| (2) EXAMPLE PACKAGE ENTRY CODE #
|#################################

	.global		_060_fpsp_snan
_060_fpsp_snan:
	bra.l		_FP_CALL_TOP+0x80+0x00

	.global		_060_fpsp_operr
_060_fpsp_operr:
	bra.l		_FP_CALL_TOP+0x80+0x08

	.global		_060_fpsp_ovfl
_060_fpsp_ovfl:
	bra.l		_FP_CALL_TOP+0x80+0x10

	.global		_060_fpsp_unfl
_060_fpsp_unfl:
	bra.l		_FP_CALL_TOP+0x80+0x18

	.global		_060_fpsp_dz
_060_fpsp_dz:
	bra.l		_FP_CALL_TOP+0x80+0x20

	.global		_060_fpsp_inex
_060_fpsp_inex:
	bra.l		_FP_CALL_TOP+0x80+0x28

	.global		_060_fpsp_fline
_060_fpsp_fline:
	bra.l		_FP_CALL_TOP+0x80+0x30

	.global		_060_fpsp_unsupp
_060_fpsp_unsupp:
	bra.l		_FP_CALL_TOP+0x80+0x38

	.global		_060_fpsp_effadd
_060_fpsp_effadd:
	bra.l		_FP_CALL_TOP+0x80+0x40

|############################################################################

|###############################
| (3) EXAMPLE CALL-OUT SECTION #
|###############################

| The size of this section MUST be 128 bytes!!!

	.global	_FP_CALL_TOP
_FP_CALL_TOP:
	.long	_060_real_bsun		- _FP_CALL_TOP
	.long	_060_real_snan		- _FP_CALL_TOP
	.long	_060_real_operr		- _FP_CALL_TOP
	.long	_060_real_ovfl		- _FP_CALL_TOP
	.long	_060_real_unfl		- _FP_CALL_TOP
	.long	_060_real_dz		- _FP_CALL_TOP
	.long	_060_real_inex		- _FP_CALL_TOP
	.long	_060_real_fline		- _FP_CALL_TOP
	.long	_060_real_fpu_disabled	- _FP_CALL_TOP
	.long	_060_real_trap		- _FP_CALL_TOP
	.long	_060_real_trace		- _FP_CALL_TOP
	.long	_060_real_access	- _FP_CALL_TOP
	.long	_060_fpsp_done		- _FP_CALL_TOP

	.long	0x00000000, 0x00000000, 0x00000000

	.long	_060_imem_read		- _FP_CALL_TOP
	.long	_060_dmem_read		- _FP_CALL_TOP
	.long	_060_dmem_write		- _FP_CALL_TOP
	.long	_060_imem_read_word	- _FP_CALL_TOP
	.long	_060_imem_read_long	- _FP_CALL_TOP
	.long	_060_dmem_read_byte	- _FP_CALL_TOP
	.long	_060_dmem_read_word	- _FP_CALL_TOP
	.long	_060_dmem_read_long	- _FP_CALL_TOP
	.long	_060_dmem_write_byte	- _FP_CALL_TOP
	.long	_060_dmem_write_word	- _FP_CALL_TOP
	.long	_060_dmem_write_long	- _FP_CALL_TOP

	.long	0x00000000

	.long	0x00000000, 0x00000000, 0x00000000, 0x00000000

|############################################################################

| 060 FPSP KERNEL PACKAGE NEEDS TO GO HERE!!!

	.include "fpsp.sa"
	dc.l	$60ff0000,$00d40000,$60ff0000,$016c0000
	dc.l	$60ff0000,$01a80000,$54657374,$696e6720
	dc.l	$36383036,$30204650,$53502073,$74617274
	dc.l	$65643a0a,$00546573,$74696e67,$20363830
	dc.l	$36302046,$50535020,$756e696d,$706c656d
	dc.l	$656e7465,$6420696e,$73747275,$6374696f
	dc.l	$6e207374,$61727465,$643a0a00,$54657374
	dc.l	$696e6720,$36383036,$30204650,$53502065
	dc.l	$78636570,$74696f6e,$20656e61,$626c6564
	dc.l	$20737461,$72746564,$3a0a0070,$61737365
	dc.l	$640a0020,$6661696c,$65640a00,$4a80660e
	dc.l	$487affe9,$61ff0000,$1642588f,$4e752f01
	dc.l	$61ff0000,$164c588f,$487affd9,$61ff0000
	dc.l	$162a588f,$4e754e56,$fe8048e7,$3f3cf227
	dc.l	$e0ff487a,$ff3461ff,$00001610,$588f42ae
	dc.l	$fea0487b,$01700000,$058061ff,$000015fc
	dc.l	$588f61ff,$00000588,$61ffffff,$ffa242ae
	dc.l	$fea0487b,$01700000,$126c61ff,$000015dc
	dc.l	$588f61ff,$00001280,$61ffffff,$ff8242ae
	dc.l	$fea0487b,$01700000,$0b6461ff,$000015bc
	dc.l	$61ff0000,$0b7261ff,$ffffff64,$42aefea0
	dc.l	$487b0170,$00000de2,$61ff0000,$159e61ff
	dc.l	$00000df0,$61ffffff,$ff464cdf,$3cfcf21f
	dc.l	$d0ff4e5e,$4e754e56,$fe8048e7,$3f3cf227
	dc.l	$e0ff487a,$feb161ff,$00001570,$588f42ae
	dc.l	$fea0487b,$01700000,$00fe61ff,$0000155c
	dc.l	$588f61ff,$00000110,$61ffffff,$ff024cdf
	dc.l	$3cfcf21f,$d0ff4e5e,$4e754e56,$fe8048e7
	dc.l	$3f3cf227,$e0ff487a,$fea461ff,$0000152c
	dc.l	$588f42ae,$fea0487b,$01700000,$0f1461ff
	dc.l	$00001518,$61ff0000,$0f1a61ff,$fffffec0
	dc.l	$42aefea0,$487b0170,$00000fd2,$61ff0000
	dc.l	$14fa61ff,$00000fd8,$61ffffff,$fea242ae
	dc.l	$fea0487b,$01700000,$0b6061ff,$000014dc
	dc.l	$61ff0000,$0b6a61ff,$fffffe84,$42aefea0
	dc.l	$487b0170,$00000c22,$61ff0000,$14be61ff
	dc.l	$00000c2c,$61ffffff,$fe6642ae,$fea0487b
	dc.l	$01700000,$105661ff,$000014a0,$61ff0000
	dc.l	$105a61ff,$fffffe48,$42aefea0,$487b0170
	dc.l	$00000da2,$61ff0000,$148261ff,$00000da8
	dc.l	$61ffffff,$fe2a4cdf,$3cfcf21f,$d0ff4e5e
	dc.l	$4e750955,$6e696d70,$6c656d65,$6e746564
	dc.l	$20465020,$696e7374,$72756374,$696f6e73
	dc.l	$2e2e2e00,$52aefea0,$4cfb3fff,$01700000
	dc.l	$1390f23b,$d0ff0170,$000013c6,$f23b9c00
	dc.l	$01700000,$141c3d7c,$0000fea6,$48ee7fff
	dc.l	$ff80f22e,$f0ffff20,$f22ebc00,$feb42d7c
	dc.l	$40000000,$fe802d7c,$c90fdaa2,$fe842d7c
	dc.l	$2168c235,$fe8844fc,$0000f22e,$480efe80
	dc.l	$42eefea4,$48ee7fff,$ffc0f22e,$f0fffec0
	dc.l	$f22ebc00,$fea82d7c,$bfbf0000,$ff202d7c
	dc.l	$80000000,$ff242d7c,$00000000,$ff282d7c
	dc.l	$08000208,$feb841fa,$ffc22d48,$febc61ff
	dc.l	$00001288,$4a0066ff,$000012ae,$61ff0000
	dc.l	$12b04a00,$66ff0000,$12a052ae,$fea04cfb
	dc.l	$3fff0170,$000012da,$f23bd0ff,$01700000
	dc.l	$1310f23b,$9c000170,$00001366,$3d7c0000
	dc.l	$fea648ee,$7fffff80,$f22ef0ff,$ff20f22e
	dc.l	$bc00feb4,$2d7c3ffe,$0000fe80,$2d7cc90f
	dc.l	$daa2fe84,$2d7c2168,$c235fe88,$44fc0000
	dc.l	$f22e480f,$fe8042ee,$fea448ee,$7fffffc0
	dc.l	$f22ef0ff,$fec0f22e,$bc00fea8,$2d7c3fff
	dc.l	$0000ff20,$2d7c8000,$0000ff24,$2d7c0000
	dc.l	$0000ff28,$2d7c0000,$0208feb8,$41faffc2
	dc.l	$2d48febc,$61ff0000,$11d24a00,$66ff0000
	dc.l	$11f861ff,$000011fa,$4a0066ff,$000011ea
	dc.l	$52aefea0,$4cfb3fff,$01700000,$1224f23b
	dc.l	$d0ff0170,$0000125a,$f23b9c00,$01700000
	dc.l	$12b03d7c,$0000fea6,$48ee7fff,$ff80f22e
	dc.l	$f0ffff20,$f22ebc00,$feb444fc,$0000f200
	dc.l	$5c3142ee,$fea448ee,$7fffffc0,$f22ef0ff
	dc.l	$fec0f22e,$bc00fea8,$2d7c4000,$0000ff20
	dc.l	$2d7c935d,$8dddff24,$2d7caaa8,$ac17ff28
	dc.l	$2d7c0000,$0208feb8,$41faffc4,$2d48febc
	dc.l	$61ff0000,$11364a00,$66ff0000,$115c61ff
	dc.l	$0000115e,$4a0066ff,$0000114e,$52aefea0
	dc.l	$4cfb3fff,$01700000,$1188f23b,$d0ff0170
	dc.l	$000011be,$f23b9c00,$01700000,$1214f23c
	dc.l	$88000f00,$00007e00,$3d7c0000,$fea648ee
	dc.l	$7fffff80,$f22ef0ff,$ff20f22e,$bc00feb4
	dc.l	$44fc0000,$f2470012,$42eefea4,$48ee7fff
	dc.l	$ffc0f22e,$f0fffec0,$f22ebc00,$fea82d7c
	dc.l	$0f008080,$feb841fa,$ffdc2d48,$febc61ff
	dc.l	$000010a8,$4a0066ff,$000010ce,$61ff0000
	dc.l	$10d04a00,$66ff0000,$10c052ae,$fea04cfb
	dc.l	$3fff0170,$000010fa,$f23bd0ff,$01700000
	dc.l	$1130f23b,$9c000170,$00001186,$f23c8800
	dc.l	$0f000000,$7e023d7c,$0000fea6,$48ee7fff
	dc.l	$ff80f22e,$f0ffff20,$f22ebc00,$feb444fc
	dc.l	$0000f24f,$0012fffc,$42eefea4,$48ee7fff
	dc.l	$ffc0f22e,$f0fffec0,$f22ebc00,$fea83d7c
	dc.l	$ffffff9e,$2d7c0f00,$8080feb8,$41faffd4
	dc.l	$2d48febc,$61ff0000,$10124a00,$66ff0000
	dc.l	$103861ff,$0000103a,$4a0066ff,$0000102a
	dc.l	$52aefea0,$4cfb3fff,$01700000,$1064f23b
	dc.l	$d0ff0170,$0000109a,$f23b9c00,$01700000
	dc.l	$10f0f23c,$88000f00,$00003d7c,$0000fea6
	dc.l	$48ee7fff,$ff80f22e,$f0ffff20,$f22ebc00
	dc.l	$feb444fc,$0000f27b,$0012abcd,$ef0142ee
	dc.l	$fea448ee,$7fffffc0,$f22ef0ff,$fec0f22e
	dc.l	$bc00fea8,$2d7c0f00,$8080feb8,$41faffd8
	dc.l	$2d48febc,$61ff0000,$0f824a00,$66ff0000
	dc.l	$0fa861ff,$00000faa,$4a0066ff,$00000f9a
	dc.l	$42804e75,$09556e69,$6d706c65,$6d656e74
	dc.l	$6564203c,$65613e2e,$2e2e0000,$52aefea0
	dc.l	$4cfb3fff,$01700000,$0fb8f23b,$d0ff0170
	dc.l	$00000fee,$f23b9c00,$01700000,$10443d7c
	dc.l	$0000fea6,$48ee7fff,$ff80f22e,$f0ffff20
	dc.l	$f22ebc00,$feb4f23c,$58000002,$44fc0000
	dc.l	$f23c4823,$c0000000,$80000000,$00000000
	dc.l	$42eefea4,$48ee7fff,$ffc0f22e,$f0fffec0
	dc.l	$f22ebc00,$fea82d7c,$c0010000,$ff202d7c
	dc.l	$80000000,$ff242d7c,$00000000,$ff282d7c
	dc.l	$08000000,$feb841fa,$ffb82d48,$febc61ff
	dc.l	$00000eb8,$4a0066ff,$00000ede,$61ff0000
	dc.l	$0ee04a00,$66ff0000,$0ed052ae,$fea04cfb
	dc.l	$3fff0170,$00000f0a,$f23bd0ff,$01700000
	dc.l	$0f40f23b,$9c000170,$00000f96,$3d7c0000
	dc.l	$fea648ee,$7fffff80,$f22ef0ff,$ff20f22e
	dc.l	$bc00feb4,$44fc0000,$f23c4c18,$c1230001
	dc.l	$23456789,$12345678,$42eefea4,$48ee7fff
	dc.l	$ffc0f22e,$f0fffec0,$f22ebc00,$fea82d7c
	dc.l	$3e660000,$ff202d7c,$d0ed23e8,$ff242d7c
	dc.l	$d14035bc,$ff282d7c,$00000108,$feb841fa
	dc.l	$ffb82d48,$febc61ff,$00000e10,$4a0066ff
	dc.l	$00000e36,$61ff0000,$0e384a00,$66ff0000
	dc.l	$0e2852ae,$fea04cfb,$3fff0170,$00000e62
	dc.l	$f23bd0ff,$01700000,$0e98f23b,$9c000170
	dc.l	$00000eee,$3d7c0000,$fea644fc,$000048ee
	dc.l	$7fffff80,$f22ef0ff,$ff20f22e,$bc00feb4
	dc.l	$f23c9800,$ffffffff,$ffffffff,$42eefea4
	dc.l	$48ee7fff,$ffc0f22e,$f0fffec0,$f22ebc00
	dc.l	$fea82d7c,$0000fff0,$feb42d7c,$0ffffff8
	dc.l	$feb861ff,$00000d84,$4a0066ff,$00000daa
	dc.l	$61ff0000,$0dac4a00,$66ff0000,$0d9c52ae
	dc.l	$fea04cfb,$3fff0170,$00000dd6,$f23bd0ff
	dc.l	$01700000,$0e0cf23b,$9c000170,$00000e62
	dc.l	$3d7c0000,$fea644fc,$000048ee,$7fffff80
	dc.l	$f22ef0ff,$ff20f22e,$bc00feb4,$f23c9400
	dc.l	$ffffffff,$ffffffff,$42eefea4,$48ee7fff
	dc.l	$ffc0f22e,$f0fffec0,$f22ebc00,$fea82d7c
	dc.l	$0000fff0,$feb42d7c,$ffffffff,$febc61ff
	dc.l	$00000cf8,$4a0066ff,$00000d1e,$61ff0000
	dc.l	$0d204a00,$66ff0000,$0d1052ae,$fea04cfb
	dc.l	$3fff0170,$00000d4a,$f23bd0ff,$01700000
	dc.l	$0d80f23b,$9c000170,$00000dd6,$3d7c0000
	dc.l	$fea644fc,$000048ee,$7fffff80,$f22ef0ff
	dc.l	$ff20f22e,$bc00feb4,$f23c8c00,$ffffffff
	dc.l	$ffffffff,$42eefea4,$48ee7fff,$ffc0f22e
	dc.l	$f0fffec0,$f22ebc00,$fea82d7c,$0ffffff8
	dc.l	$feb82d7c,$ffffffff,$febc61ff,$00000c6c
	dc.l	$4a0066ff,$00000c92,$61ff0000,$0c944a00
	dc.l	$66ff0000,$0c8452ae,$fea04cfb,$3fff0170
	dc.l	$00000cbe,$f23bd0ff,$01700000,$0cf4f23b
	dc.l	$9c000170,$00000d4a,$3d7c0000,$fea644fc
	dc.l	$000048ee,$7fffff80,$f22ef0ff,$ff20f22e
	dc.l	$bc00feb4,$f23c9c00,$ffffffff,$ffffffff
	dc.l	$ffffffff,$42eefea4,$48ee7fff,$ffc0f22e
	dc.l	$f0fffec0,$f22ebc00,$fea82d7c,$0000fff0
	dc.l	$feb42d7c,$0ffffff8,$feb82d7c,$ffffffff
	dc.l	$febc61ff,$00000bd4,$4a0066ff,$00000bfa
	dc.l	$61ff0000,$0bfc4a00,$66ff0000,$0bec52ae
	dc.l	$fea04cfb,$3fff0170,$00000c26,$f23bd0ff
	dc.l	$01700000,$0c5cf23b,$9c000170,$00000cb2
	dc.l	$f23c5800,$0001f23c,$58800002,$f23c5900
	dc.l	$0003f23c,$59800004,$f23c5a00,$0005f23c
	dc.l	$5a800006,$f23c5b00,$0007f23c,$5b800008
	dc.l	$f23c8400,$00000000,$70aa3d7c,$0000fea6
	dc.l	$48eeffff,$ff80f22e,$bc00feb4,$f22ef0ff
	dc.l	$ff2044fc,$0000f227,$e80042ee,$fea4f22e
	dc.l	$bc00fea8,$f23c4480,$7f800000,$f23c4580
	dc.l	$7f800000,$f23c4680,$7f800000,$f23c4780
	dc.l	$7f800000,$f21f4880,$f21f4980,$f21f4a80
	dc.l	$f21f4b80,$48eeffff,$ffc0f22e,$f0fffec0
	dc.l	$61ff0000,$0af64a00,$66ff0000,$0b1c61ff
	dc.l	$00000b1e,$4a0066ff,$00000b0e,$52aefea0
	dc.l	$4cfb3fff,$01700000,$0b48f23b,$d0ff0170
	dc.l	$00000b7e,$f23b9c00,$01700000,$0bd4f23c
	dc.l	$58000001,$f23c5880,$0002f23c,$59000003
	dc.l	$f23c5980,$0004f23c,$5a000005,$f23c5a80
	dc.l	$0006f23c,$5b000007,$f23c5b80,$0008f227
	dc.l	$6b00f227,$6a00f227,$6900f227,$6800f22e
	dc.l	$f0ffff20,$f23c4700,$7f800000,$f23c4600
	dc.l	$7f800000,$f23c4500,$7f800000,$f23c4400
	dc.l	$7f800000,$f23c8400,$00000000,$f23c8800
	dc.l	$00000000,$70aa3d7c,$0000fea6,$48eeffff
	dc.l	$ff80f22e,$bc00feb4,$44fc0000,$f21fd800
	dc.l	$42eefea4,$f22ebc00,$fea848ee,$ffffffc0
	dc.l	$f22ef0ff,$fec061ff,$00000a10,$4a0066ff
	dc.l	$00000a36,$61ff0000,$0a384a00,$66ff0000
	dc.l	$0a2852ae,$fea04cfb,$3fff0170,$00000a62
	dc.l	$f23bd0ff,$01700000,$0a98f23b,$9c000170
	dc.l	$00000aee,$f23c5800,$0001f23c,$58800002
	dc.l	$f23c5900,$0003f23c,$59800004,$f23c5a00
	dc.l	$0005f23c,$5a800006,$f23c5b00,$0007f23c
	dc.l	$5b800008,$f23c8400,$00000000,$203cffff
	dc.l	$ff003d7c,$0000fea6,$48eeffff,$ff80f22e
	dc.l	$bc00feb4,$f22ef0ff,$ff2044fc,$0000f227
	dc.l	$e80042ee,$fea4f22e,$bc00fea8,$48eeffff
	dc.l	$ffc0f22e,$f0fffec0,$61ff0000,$095e4a00
	dc.l	$66ff0000,$098461ff,$00000986,$4a0066ff
	dc.l	$00000976,$42804e75,$094e6f6e,$2d6d6173
	dc.l	$6b61626c,$65206f76,$6572666c,$6f772e2e
	dc.l	$2e0051fc,$52aefea0,$4cfb3fff,$01700000
	dc.l	$0990f23b,$d0ff0170,$000009c6,$f23b9c00
	dc.l	$01700000,$0a1c3d7c,$0000fea6,$48ee7fff
	dc.l	$ff80f22e,$f0ffff20,$f22ebc00,$feb4f23c
	dc.l	$58000002,$2d7c7ffe,$0000fe80,$2d7c8000
	dc.l	$0000fe84,$2d7c0000,$0000fe88,$44fc0000
	dc.l	$f22e4823,$fe8042ee,$fea448ee,$7fffffc0
	dc.l	$f22ef0ff,$fec0f22e,$bc00fea8,$2d7c7fff
	dc.l	$0000ff20,$2d7c0000,$0000ff24,$2d7c0000
	dc.l	$0000ff28,$2d7c0200,$1048feb8,$41faffc2
	dc.l	$2d48febc,$61ff0000,$08824a00,$66ff0000
	dc.l	$08a861ff,$000008aa,$4a0066ff,$0000089a
	dc.l	$42804e75,$09456e61,$626c6564,$206f7665
	dc.l	$72666c6f,$772e2e2e,$000051fc,$52aefea0
	dc.l	$4cfb3fff,$01700000,$08b8f23b,$d0ff0170
	dc.l	$000008ee,$f23b9c00,$01700000,$09443d7c
	dc.l	$0000fea6,$48ee7fff,$ff80f22e,$f0ffff20
	dc.l	$f23c9000,$00001000,$f22ebc00,$feb4f23c
	dc.l	$58000002,$2d7c7ffe,$0000fe80,$2d7c8000
	dc.l	$0000fe84,$2d7c0000,$0000fe88,$44fc0000
	dc.l	$f22e4823,$fe8042ee,$fea448ee,$7fffffc0
	dc.l	$f22ef0ff,$fec0f22e,$bc00fea8,$2d7c7fff
	dc.l	$0000ff20,$2d7c0000,$0000ff24,$2d7c0000
	dc.l	$0000ff28,$2d7c0200,$1048feb8,$41faffc2
	dc.l	$2d48febc,$61ff0000,$07a24a00,$66ff0000
	dc.l	$07c861ff,$000007ca,$4a0066ff,$000007ba
	dc.l	$42804e75,$09456e61,$626c6564,$20756e64
	dc.l	$6572666c,$6f772e2e,$2e0051fc,$52aefea0
	dc.l	$4cfb3fff,$01700000,$07d8f23b,$d0ff0170
	dc.l	$0000080e,$f23b9c00,$01700000,$08643d7c
	dc.l	$0000fea6,$48ee7fff,$ff80f22e,$f0ffff20
	dc.l	$f23c9000,$00000800,$f22ebc00,$feb42d7c
	dc.l	$00000000,$fe802d7c,$80000000,$fe842d7c
	dc.l	$00000000,$fe88f22e,$d080fe80,$44fc0000
	dc.l	$f23c5820,$000242ee,$fea448ee,$7fffffc0
	dc.l	$f22ef0ff,$fec0f22e,$bc00fea8,$2d7c0000
	dc.l	$0000ff20,$2d7c4000,$0000ff24,$2d7c0000
	dc.l	$0000ff28,$2d7c0000,$0800feb8,$41faffc2
	dc.l	$2d48febc,$61ff0000,$06c24a00,$66ff0000
	dc.l	$06e861ff,$000006ea,$4a0066ff,$000006da
	dc.l	$42804e75,$094e6f6e,$2d6d6173,$6b61626c
	dc.l	$6520756e,$64657266,$6c6f772e,$2e2e0000
	dc.l	$52aefea0,$4cfb3fff,$01700000,$06f4f23b
	dc.l	$d0ff0170,$0000072a,$f23b9c00,$01700000
	dc.l	$07803d7c,$0000fea6,$48ee7fff,$ff80f22e
	dc.l	$f0ffff20,$f22ebc00,$feb42d7c,$00000000
	dc.l	$fe802d7c,$80000000,$fe842d7c,$00000000
	dc.l	$fe88f22e,$d080fe80,$44fc0000,$f23c5820
	dc.l	$000242ee,$fea448ee,$7fffffc0,$f22ef0ff
	dc.l	$fec0f22e,$bc00fea8,$2d7c0000,$0000ff20
	dc.l	$2d7c4000,$0000ff24,$2d7c0000,$0000ff28
	dc.l	$2d7c0000,$0800feb8,$41faffc2,$2d48febc
	dc.l	$61ff0000,$05e64a00,$66ff0000,$060c61ff
	dc.l	$0000060e,$4a0066ff,$000005fe,$42804e75
	dc.l	$09456e61,$626c6564,$20696e65,$78616374
	dc.l	$2e2e2e00,$52aefea0,$4cfb3fff,$01700000
	dc.l	$0620f23b,$d0ff0170,$00000656,$f23b9c00
	dc.l	$01700000,$06ac3d7c,$0000fea6,$48ee7fff
	dc.l	$ff80f22e,$f0ffff20,$f23c9000,$00000200
	dc.l	$f22ebc00,$feb42d7c,$50000000,$fe802d7c
	dc.l	$80000000,$fe842d7c,$00000000,$fe88f22e
	dc.l	$d080fe80,$44fc0000,$f23c5822,$000242ee
	dc.l	$fea448ee,$7fffffc0,$f22ef0ff,$fec0f22e
	dc.l	$bc00fea8,$2d7c5000,$0000ff20,$2d7c8000
	dc.l	$0000ff24,$2d7c0000,$0000ff28,$2d7c0000
	dc.l	$0208feb8,$41faffc2,$2d48febc,$61ff0000
	dc.l	$050a4a00,$66ff0000,$053061ff,$00000532
	dc.l	$4a0066ff,$00000522,$42804e75,$09456e61
	dc.l	$626c6564,$20534e41,$4e2e2e2e,$000051fc
	dc.l	$52aefea0,$4cfb3fff,$01700000,$0544f23b
	dc.l	$d0ff0170,$0000057a,$f23b9c00,$01700000
	dc.l	$05d03d7c,$0000fea6,$48ee7fff,$ff80f22e
	dc.l	$f0ffff20,$f23c9000,$00004000,$f22ebc00
	dc.l	$feb42d7c,$ffff0000,$fe802d7c,$00000000
	dc.l	$fe842d7c,$00000001,$fe88f22e,$d080fe80
	dc.l	$44fc0000,$f23c5822,$000242ee,$fea448ee
	dc.l	$7fffffc0,$f22ef0ff,$fec0f22e,$bc00fea8
	dc.l	$2d7cffff,$0000ff20,$2d7c0000,$0000ff24
	dc.l	$2d7c0000,$0001ff28,$2d7c0900,$4080feb8
	dc.l	$41faffc2,$2d48febc,$61ff0000,$042e4a00
	dc.l	$66ff0000,$045461ff,$00000456,$4a0066ff
	dc.l	$00000446,$42804e75,$09456e61,$626c6564
	dc.l	$204f5045,$52522e2e,$2e0051fc,$52aefea0
	dc.l	$4cfb3fff,$01700000,$0468f23b,$d0ff0170
	dc.l	$0000049e,$f23b9c00,$01700000,$04f43d7c
	dc.l	$0000fea6,$48ee7fff,$ff80f22e,$f0ffff20
	dc.l	$f23c9000,$00002000,$f22ebc00,$feb42d7c
	dc.l	$ffff0000,$fe802d7c,$00000000,$fe842d7c
	dc.l	$00000000,$fe88f22e,$d080fe80,$44fc0000
	dc.l	$f23c4422,$7f800000,$42eefea4,$48ee7fff
	dc.l	$ffc0f22e,$f0fffec0,$f22ebc00,$fea82d7c
	dc.l	$ffff0000,$ff202d7c,$00000000,$ff242d7c
	dc.l	$00000000,$ff282d7c,$01002080,$feb841fa
	dc.l	$ffc02d48,$febc61ff,$00000350,$4a0066ff
	dc.l	$00000376,$61ff0000,$03784a00,$66ff0000
	dc.l	$03684280,$4e750945,$6e61626c,$65642044
	dc.l	$5a2e2e2e,$000051fc,$52aefea0,$4cfb3fff
	dc.l	$01700000,$038cf23b,$d0ff0170,$000003c2
	dc.l	$f23b9c00,$01700000,$04183d7c,$0000fea6
	dc.l	$48ee7fff,$ff80f22e,$f0ffff20,$f23c9000
	dc.l	$00000400,$f22ebc00,$feb42d7c,$40000000
	dc.l	$fe802d7c,$80000000,$fe842d7c,$00000000
	dc.l	$fe88f22e,$d080fe80,$44fc0000,$f23c5820
	dc.l	$000042ee,$fea448ee,$7fffffc0,$f22ef0ff
	dc.l	$fec0f22e,$bc00fea8,$2d7c4000,$0000ff20
	dc.l	$2d7c8000,$0000ff24,$2d7c0000,$0000ff28
	dc.l	$2d7c0200,$0410feb8,$41faffc2,$2d48febc
	dc.l	$61ff0000,$02764a00,$66ff0000,$029c61ff
	dc.l	$0000029e,$4a0066ff,$0000028e,$42804e75
	dc.l	$09556e69,$6d706c65,$6d656e74,$65642064
	dc.l	$61746120,$74797065,$2f666f72,$6d61742e
	dc.l	$2e2e0000,$52aefea0,$4cfb3fff,$01700000
	dc.l	$02a0f23b,$d0ff0170,$000002d6,$f23b9c00
	dc.l	$01700000,$032c3d7c,$0000fea6,$48ee7fff
	dc.l	$ff80f22e,$f0ffff20,$f22ebc00,$feb42d7c
	dc.l	$c03f0000,$fe802d7c,$00000000,$fe842d7c
	dc.l	$00000001,$fe88f23c,$58000002,$44fc0000
	dc.l	$f22e4823,$fe8042ee,$fea448ee,$7fffffc0
	dc.l	$f22ef0ff,$fec0f22e,$bc00fea8,$2d7cc001
	dc.l	$0000ff20,$2d7c8000,$0000ff24,$2d7c0000
	dc.l	$0000ff28,$2d7c0800,$0000feb8,$41faffc2
	dc.l	$2d48febc,$61ff0000,$01924a00,$66ff0000
	dc.l	$01b861ff,$000001ba,$4a0066ff,$000001aa
	dc.l	$52aefea0,$4cfb3fff,$01700000,$01e4f23b
	dc.l	$d0ff0170,$0000021a,$f23b9c00,$01700000
	dc.l	$02703d7c,$0000fea6,$48ee7fff,$ff80f22e
	dc.l	$f0ffff20,$f22ebc00,$feb42d7c,$80000000
	dc.l	$fe802d7c,$01000000,$fe842d7c,$00000000
	dc.l	$fe88f23c,$40007fff,$ffff44fc,$0000f22e
	dc.l	$4823fe80,$42eefea4,$48ee7fff,$ffc0f22e
	dc.l	$f0fffec0,$f22ebc00,$fea82d7c,$80170000
	dc.l	$ff202d7c,$fffffffe,$ff242d7c,$00000000
	dc.l	$ff282d7c,$08000000,$feb841fa,$ffc22d48
	dc.l	$febc61ff,$000000d4,$4a0066ff,$000000fa
	dc.l	$61ff0000,$00fc4a00,$66ff0000,$00ec52ae
	dc.l	$fea04cfb,$3fff0170,$00000126,$f23bd0ff
	dc.l	$01700000,$015cf23b,$9c000170,$000001b2
	dc.l	$3d7c0000,$fea648ee,$7fffff80,$f22ef0ff
	dc.l	$ff20f22e,$bc00feb4,$2d7cc123,$0001fe80
	dc.l	$2d7c2345,$6789fe84,$2d7c1234,$5678fe88
	dc.l	$44fc0000,$f22e4c18,$fe8042ee,$fea448ee
	dc.l	$7fffffc0,$f22ef0ff,$fec0f22e,$bc00fea8
	dc.l	$2d7c3e66,$0000ff20,$2d7cd0ed,$23e8ff24
	dc.l	$2d7cd140,$35bcff28,$2d7c0000,$0108feb8
	dc.l	$41faffc2,$2d48febc,$61ff0000,$001e4a00
	dc.l	$66ff0000,$004461ff,$00000046,$4a0066ff
	dc.l	$00000036,$42804e75,$41eeff80,$43eeffc0
	dc.l	$700eb189,$66ff0000,$001c51c8,$fff6302e
	dc.l	$fea6322e,$fea4b041,$66ff0000,$00084280
	dc.l	$4e757001,$4e75222e,$fea07001,$4e7541ee
	dc.l	$ff2043ee,$fec07017,$b18966ff,$0000002c
	dc.l	$51c8fff6,$41eefeb4,$43eefea8,$b18966ff
	dc.l	$00000018,$b18966ff,$00000010,$b18966ff
	dc.l	$00000008,$42804e75,$70014e75,$acacacac
	dc.l	$acacacac,$acacacac,$acacacac,$acacacac
	dc.l	$acacacac,$acacacac,$acacacac,$acacacac
	dc.l	$acacacac,$acacacac,$acacacac,$acacacac
	dc.l	$acacacac,$acacacac,$acacacac,$7fff0000
	dc.l	$ffffffff,$ffffffff,$7fff0000,$ffffffff
	dc.l	$ffffffff,$7fff0000,$ffffffff,$ffffffff
	dc.l	$7fff0000,$ffffffff,$ffffffff,$7fff0000
	dc.l	$ffffffff,$ffffffff,$7fff0000,$ffffffff
	dc.l	$ffffffff,$7fff0000,$ffffffff,$ffffffff
	dc.l	$7fff0000,$ffffffff,$ffffffff,$00000000
	dc.l	$00000000,$00000000,$2f00203a,$e884487b
	dc.l	$0930ffff,$e880202f,$00044e74,$00042f00
	dc.l	$203ae872,$487b0930,$ffffe86a,$202f0004
	dc.l	$4e740004,$00000000,$00000000,$00000000
~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
MOTOROLA MICROPROCESSOR & MEMORY TECHNOLOGY GROUP
M68000 Hi-Performance Microprocessor Division
M68060 Software Package
Production Release P1.00 -- October 10, 1994

M68060 Software Package Copyright � 1993, 1994 Motorola Inc.  All rights reserved.
 
THE SOFTWARE is provided on an "AS IS" basis and without warranty.
To the maximum extent permitted by applicable law,
MOTOROLA DISCLAIMS ALL WARRANTIES WHETHER EXPRESS OR IMPLIED, 
INCLUDING IMPLIED WARRANTIES OF MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE
and any warranty against infringement with regard to the SOFTWARE
(INCLUDING ANY MODIFIED VERSIONS THEREOF) and any accompanying written materials.

To the maximum extent permitted by applicable law,
IN NO EVENT SHALL MOTOROLA BE LIABLE FOR ANY DAMAGES WHATSOEVER
(INCLUDING WITHOUT LIMITATION, DAMAGES FOR LOSS OF BUSINESS PROFITS,
BUSINESS INTERRUPTION, LOSS OF BUSINESS INFORMATION, OR OTHER PECUNIARY LOSS)
ARISING OF THE USE OR INABILITY TO USE THE SOFTWARE.
Motorola assumes no responsibility for the maintenance and support of the SOFTWARE.

You are hereby granted a copyright license to use, modify, and distribute the SOFTWARE
so long as this entire notice is retained without alteration in any modified and/or
redistributed versions, and that such modified versions are clearly identified as such.
No licenses are granted by implication, estoppel or otherwise under any patents
or trademarks of Motorola, Inc.
~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
68060 INTEGER SOFTWARE PACKAGE (Library version)
-------------------------------------------------

The file ilsp.s contains the "Library version" of the
68060 Integer Software Package. Routines included in this
module can be used to emulate 64-bit divide and multiply,
and the "cmp2" instruction. These instructions are not 
implemented in hardware on the 68060 and normally take 
exception vector #61 "Unimplemented Integer Instruction".

By re-compiling a program that uses these instructions, and 
making subroutine calls in place of the unimplemented
instructions, a program can avoid the overhead associated with
taking the exception.

Release file format:
--------------------
The file ilsp.sa is essentially a hexadecimal image of the
release package. This is the ONLY format which will be supported.
The hex image was created by assembling the source code and
then converting the resulting binary output image into an
ASCII text file. The hexadecimal numbers are listed
using the Motorola Assembly Syntax assembler directive "dc.l"
(define constant longword). The file can be converted to other
assembly syntaxes by using any word processor with a global
search and replace function.

To assist in assembling and linking this module with other modules,
the installer should add a symbolic label to the top of the file.
This will allow calling routines to access the entry points
of this package.

The source code ilsp.s has also been included but only for
documentation purposes.

Release file structure:
-----------------------
The file ilsp.sa contains an "Entry-Point" section and a 
code section. The ILSP has no "Call-Out" section. The first section
is the "Entry-Point" section. In order to access a function in the
package, a program must "bsr" or "jsr" to the location listed
below in "68060ILSP Entry Points" that corresponds to the desired
function. A branch instruction located at the selected entry point
within the package will then enter the correct emulation code routine.

The entry point addresses at the beginning of the package will remain
fixed so that a program calling the routines will not have to be
re-compiled with every new 68060ILSP release.

For example, to use a 64-bit multiply instruction,
do a "bsr" or "jsr" to the entry point defined by
the 060ILSP entry table. A compiler generated code sequence 
for unsigned multiply could look like:

# mulu.l <ea>,Dh:Dl
# mulu.l _multiplier,%d1:%d0

	subq.l	&0x8,%sp	# make room for result on stack
	pea	(%sp)		# pass: result addr on stack
	mov.l	%d0,-(%sp)	# pass: multiplicand on stack
	mov.l	_multiplier,-(%sp) # pass: multiplier on stack
	bsr.l	_060LISP_TOP+0x18 # branch to multiply routine
	add.l	&0xc,%sp	# clear arguments from stack
	mov.l	(%sp)+,%d1	# load result[63:32]
	mov.l	(%sp)+,%d0	# load result[31:0]

For a divide:

# divu.l <ea>,Dr:Dq
# divu.l _divisor,%d1:%d0

	subq.l	&0x8,%sp	# make room for result on stack
	pea	(%sp)		# pass: result addr on stack
	mov.l	%d0,-(%sp)	# pass: dividend hi on stack
	mov.l	%d1,-(%sp)	# pass: dividend hi on stack
	mov.l	_divisor,-(%sp) # pass: divisor on stack
	bsr.l	_060LISP_TOP+0x08 # branch to divide routine
	add.l	&0xc,%sp	# clear arguments from stack
	mov.l	(%sp)+,%d1	# load remainder
	mov.l	(%sp)+,%d0	# load quotient

The library routines also return the correct condition code 
register value. If this is important, then the caller of the library
routine must make sure that the value isn't lost while popping
other items off of the stack.

An example of using the "cmp2" instruction is as follows:

# cmp2.l <ea>,Rn
# cmp2.l _bounds,%d0

	pea	_bounds		# pass ptr to bounds
	mov.l	%d0,-(%sp)	# pass Rn
	bsr.l	_060LSP_TOP_+0x48 # branch to "cmp2" routine
	mov.w	%cc,_tmp	# save off condition codes
	addq.l	&0x8,%sp	# clear arguments from stack

Exception reporting:
--------------------
If the instruction being emulated is a divide and the source
operand is a zero, then the library routine, as its last
instruction, executes an implemented divide using a zero
source operand so that an "Integer Divide-by-Zero" exception
will be taken. Although the exception stack frame will not
point to the correct instruction, the user will at least be able
to record that such an event occurred if desired.

68060ILSP entry points:
-----------------------
_060ILSP_TOP:
0x000:	_060LSP__idivs64_
0x008:	_060LSP__idivu64_

0x010:	_060LSP__imuls64_
0x018:	_060LSP__imulu64_

0x020:	_060LSP__cmp2_Ab_
0x028:	_060LSP__cmp2_Aw_
0x030:	_060LSP__cmp2_Al_
0x038:	_060LSP__cmp2_Db_
0x040:	_060LSP__cmp2_Dw_
0x048:	_060LSP__cmp2_Dl_
	dc.l	$60ff0000,$01fe0000,$60ff0000,$02080000
	dc.l	$60ff0000,$04900000,$60ff0000,$04080000
	dc.l	$60ff0000,$051e0000,$60ff0000,$053c0000
	dc.l	$60ff0000,$055a0000,$60ff0000,$05740000
	dc.l	$60ff0000,$05940000,$60ff0000,$05b40000
	dc.l	$51fc51fc,$51fc51fc,$51fc51fc,$51fc51fc
	dc.l	$51fc51fc,$51fc51fc,$51fc51fc,$51fc51fc
	dc.l	$51fc51fc,$51fc51fc,$51fc51fc,$51fc51fc
	dc.l	$51fc51fc,$51fc51fc,$51fc51fc,$51fc51fc
	dc.l	$51fc51fc,$51fc51fc,$51fc51fc,$51fc51fc
	dc.l	$51fc51fc,$51fc51fc,$51fc51fc,$51fc51fc
	dc.l	$51fc51fc,$51fc51fc,$51fc51fc,$51fc51fc
	dc.l	$51fc51fc,$51fc51fc,$51fc51fc,$51fc51fc
	dc.l	$51fc51fc,$51fc51fc,$51fc51fc,$51fc51fc
	dc.l	$51fc51fc,$51fc51fc,$51fc51fc,$51fc51fc
	dc.l	$51fc51fc,$51fc51fc,$51fc51fc,$51fc51fc
	dc.l	$51fc51fc,$51fc51fc,$51fc51fc,$51fc51fc
	dc.l	$51fc51fc,$51fc51fc,$51fc51fc,$51fc51fc
	dc.l	$51fc51fc,$51fc51fc,$51fc51fc,$51fc51fc
	dc.l	$51fc51fc,$51fc51fc,$51fc51fc,$51fc51fc
	dc.l	$51fc51fc,$51fc51fc,$51fc51fc,$51fc51fc
	dc.l	$51fc51fc,$51fc51fc,$51fc51fc,$51fc51fc
	dc.l	$51fc51fc,$51fc51fc,$51fc51fc,$51fc51fc
	dc.l	$51fc51fc,$51fc51fc,$51fc51fc,$51fc51fc
	dc.l	$51fc51fc,$51fc51fc,$51fc51fc,$51fc51fc
	dc.l	$51fc51fc,$51fc51fc,$51fc51fc,$51fc51fc
	dc.l	$51fc51fc,$51fc51fc,$51fc51fc,$51fc51fc
	dc.l	$51fc51fc,$51fc51fc,$51fc51fc,$51fc51fc
	dc.l	$51fc51fc,$51fc51fc,$51fc51fc,$51fc51fc
	dc.l	$51fc51fc,$51fc51fc,$51fc51fc,$51fc51fc
	dc.l	$51fc51fc,$51fc51fc,$51fc51fc,$51fc51fc
	dc.l	$51fc51fc,$51fc51fc,$51fc51fc,$51fc51fc
	dc.l	$4e56fff0,$48e73f00,$42eefff0,$50eeffff
	dc.l	$60104e56,$fff048e7,$3f0042ee,$fff051ee
	dc.l	$ffff2e2e,$00086700,$00ae2a2e,$000c2c2e
	dc.l	$00104a2e,$ffff671a,$4a875dee,$fffe6a02
	dc.l	$44874a85,$5deefffd,$6a0844fc,$00004086
	dc.l	$40854a85,$66164a86,$67000046,$be866306
	dc.l	$cb466000,$00124c47,$6005600a,$be85634c
	dc.l	$61ff0000,$00864a2e,$ffff6724,$4a2efffd
	dc.l	$67024485,$102efffe,$b12efffd,$670c0c86
	dc.l	$80000000,$62264486,$60060806,$001f661c
	dc.l	$026e0010,$fff044ee,$fff04a86,$48f60060
	dc.l	$01610014,$4cdf00fc,$4e5e4e75,$2a2e000c
	dc.l	$2c2e0010,$026e001c,$fff0006e,$0002fff0
	dc.l	$44eefff0,$60d62dae,$000c0161,$00142dae
	dc.l	$00100162,$00140004,$44eefff0,$4cdf00fc
	dc.l	$4e5e80fc,$00004e75,$0c870000,$ffff621e
	dc.l	$42814845,$48463a06,$8ac73205,$48463a06
	dc.l	$8ac74841,$32054245,$48452c01,$4e7542ae
	dc.l	$fff8422e,$fffc4281,$0807001f,$660e52ae
	dc.l	$fff8e38f,$e38ee395,$6000ffee,$26072405
	dc.l	$48424843,$b4436606,$323cffff,$600a2205
	dc.l	$82c30281,$0000ffff,$2f064246,$48462607
	dc.l	$2401c4c7,$4843c6c1,$28059883,$48443004
	dc.l	$38064a40,$6600000a,$b4846304,$538160de
	dc.l	$2f052c01,$48462a07,$61ff0000,$006a2405
	dc.l	$26062a1f,$2c1f9c83,$9b8264ff,$0000001a
	dc.l	$53814282,$26074843,$4243dc83,$db822607
	dc.l	$42434843,$da834a2e,$fffc6616,$3d41fff4
	dc.l	$42814845,$48463a06,$424650ee,$fffc6000
	dc.l	$ff6c3d41,$fff63c05,$48464845,$2e2efff8
	dc.l	$670a5387,$e28de296,$51cffffa,$2a062c2e
	dc.l	$fff44e75,$24062606,$28054843,$4844ccc5
	dc.l	$cac3c4c4,$c6c44284,$4846dc45,$d744dc42
	dc.l	$d7444846,$42454242,$48454842,$da82da83
	dc.l	$4e754e56,$fffc48e7,$380042ee,$fffc202e
	dc.l	$00086700,$005a222e,$000c6700,$00522400
	dc.l	$26002801,$48434844,$c0c1c2c3,$c4c4c6c4
	dc.l	$42844840,$d041d784,$d042d784,$48404241
	dc.l	$42424841,$4842d282,$d283382e,$fffc0204
	dc.l	$00104a81,$6a040004,$000844c4,$c34048f6
	dc.l	$00030161,$00104cdf,$001c4e5e,$4e754280
	dc.l	$4281382e,$fffc0204,$00100004,$000444c4
	dc.l	$60da4e56,$fffc48e7,$3c0042ee,$fffc202e
	dc.l	$000867da,$222e000c,$67d44205,$4a806c06
	dc.l	$44800005,$00014a81,$6c064481,$0a050001
	dc.l	$24002600,$28014843,$4844c0c1,$c2c3c4c4
	dc.l	$c6c44284,$4840d041,$d784d042,$d7844840
	dc.l	$42414242,$48414842,$d282d283,$4a056708
	dc.l	$46804681,$5280d384,$382efffc,$02040010
	dc.l	$4a816a04,$00040008,$44c4c340,$48f60003
	dc.l	$01610010,$4cdf003c,$4e5e4e75,$42804281
	dc.l	$382efffc,$02040010,$00040004,$44c460da
	dc.l	$4e56fffc,$48e73800,$42eefffc,$242e0008
	dc.l	$10360161,$000c1236,$0162000c,$000149c0
	dc.l	$49c16000,$00b84e56,$fffc48e7,$380042ee
	dc.l	$fffc242e,$00083036,$0161000c,$32360162
	dc.l	$000c0002,$48c048c1,$60000092,$4e56fffc
	dc.l	$48e73800,$42eefffc,$242e0008,$20360161
	dc.l	$000c2236,$0162000c,$00046000,$00704e56
	dc.l	$fffc48e7,$380042ee,$fffc242e,$00081036
	dc.l	$0161000c,$12360162,$000c0001,$49c049c1
	dc.l	$49c26000,$00484e56,$fffc48e7,$380042ee
	dc.l	$fffc242e,$00083036,$0161000c,$32360162
	dc.l	$000c0002,$48c048c1,$48c26000,$00204e56
	dc.l	$fffc48e7,$380042ee,$fffc242e,$00082036
	dc.l	$0161000c,$22360162,$000c0004,$948042c3
	dc.l	$02030004,$9280b282,$42c48604,$02030005
	dc.l	$382efffc,$0204001a,$880344c4,$4cdf001c
	dc.l	$4e5e4e75,$00000000,$00000000,$00000000
|~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
|MOTOROLA MICROPROCESSOR & MEMORY TECHNOLOGY GROUP
|M68000 Hi-Performance Microprocessor Division
|M68060 Software Package
|Production Release P1.00 -- October 10, 1994
|
|M68060 Software Package Copyright � 1993, 1994 Motorola Inc.  All rights reserved.
| 
|THE SOFTWARE is provided on an "AS IS" basis and without warranty.
|To the maximum extent permitted by applicable law,
|MOTOROLA DISCLAIMS ALL WARRANTIES WHETHER EXPRESS OR IMPLIED, 
|INCLUDING IMPLIED WARRANTIES OF MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE
|and any warranty against infringement with regard to the SOFTWARE
|(INCLUDING ANY MODIFIED VERSIONS THEREOF) and any accompanying written materials.
|
|To the maximum extent permitted by applicable law,
|IN NO EVENT SHALL MOTOROLA BE LIABLE FOR ANY DAMAGES WHATSOEVER
|(INCLUDING WITHOUT LIMITATION, DAMAGES FOR LOSS OF BUSINESS PROFITS,
|BUSINESS INTERRUPTION, LOSS OF BUSINESS INFORMATION, OR OTHER PECUNIARY LOSS)
|ARISING OF THE USE OR INABILITY TO USE THE SOFTWARE.
|Motorola assumes no responsibility for the maintenance and support of the SOFTWARE.
|
|You are hereby granted a copyright license to use, modify, and distribute the SOFTWARE
|so long as this entire notice is retained without alteration in any modified and/or
|redistributed versions, and that such modified versions are clearly identified as such.
|No licenses are granted by implication, estoppel or otherwise under any patents
|or trademarks of Motorola, Inc.
|~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
| iskeleton.s
|
| This file contains:
|	(1) example "Call-out"s
|	(2) example package entry code
|	(3) example "Call-out" table
|

#include <linux/linkage.h>
#include <asm/entry.h>
#include "../kernel/m68k_defs.h"


|################################
| (1) EXAMPLE CALL-OUTS 	#
|				#
| _060_isp_done()		#
| _060_real_chk()		#
| _060_real_divbyzero()		#
|				#
| _060_real_cas()		#
| _060_real_cas2()		#
| _060_real_lock_page()		#
| _060_real_unlock_page()	#
|################################

|
| _060_isp_done():
|
| This is and example main exit point for the Unimplemented Integer
| Instruction exception handler. For a normal exit, the 
| _isp_unimp() branches to here so that the operating system
| can do any clean-up desired. The stack frame is the
| Unimplemented Integer Instruction stack frame with
| the PC pointing to the instruction following the instruction
| just emulated.
| To simply continue execution at the next instruction, just
| do an "rte".
|
| Linux/68k: If returning to user space, check for needed reselections.

	.global		_060_isp_done
_060_isp_done:
	btst	#0x5,%sp@		| supervisor bit set in saved SR?
	beq	.Lnotkern
	rte
.Lnotkern:
	SAVE_ALL_INT
	GET_CURRENT(%d0)
	tstl	%curptr@(TASK_NEEDRESCHED)
	jne	SYMBOL_NAME(ret_from_exception)	| deliver signals,
						| reschedule etc..
	RESTORE_ALL

|
| _060_real_chk():
|
| This is an alternate exit point for the Unimplemented Integer
| Instruction exception handler. If the instruction was a "chk2"
| and the operand was out of bounds, then _isp_unimp() creates
| a CHK exception stack frame from the Unimplemented Integer Instrcution
| stack frame and branches to this routine.
|
| Linux/68k: commented out test for tracing

	.global		_060_real_chk
_060_real_chk:
|	tst.b		(%sp)			| is tracing enabled?
|	bpls		real_chk_end		| no

|
|	    CHK FRAME		   TRACE FRAME
|	*****************	*****************
|	*   Current PC	*	*   Current PC	*
|	*****************	*****************
|	* 0x2 *  0x018	*	* 0x2 *  0x024	*
|	*****************	*****************
|	*     Next	*	*     Next	*
|	*      PC	*	*      PC	*
|	*****************	*****************
|	*      SR	*	*      SR	*
|	*****************	*****************
|
|	move.b		#0x24,0x7(%sp)		| set trace vecno
|	bral		_060_real_trace

real_chk_end:
	bral		SYMBOL_NAME(trap)	| jump to trap handler

|
| _060_real_divbyzero:
|
| This is an alternate exit point for the Unimplemented Integer 
| Instruction exception handler isp_unimp(). If the instruction is a 64-bit
| integer divide where the source operand is a zero, then the _isp_unimp() 
| creates a Divide-by-zero exception stack frame from the Unimplemented
| Integer Instruction stack frame and branches to this routine.
|
| Remember that a trace exception may be pending. The code below performs
| no action associated with the "chk" exception. If tracing is enabled,
| then it create a Trace exception stack frame from the "chk" exception
| stack frame and branches to the _real_trace() entry point.
| 
| Linux/68k: commented out test for tracing

	.global		_060_real_divbyzero
_060_real_divbyzero:
|	tst.b		(%sp)			| is tracing enabled?
|	bpls		real_divbyzero_end	| no

|
|	 DIVBYZERO FRAME	   TRACE FRAME
|	*****************	*****************
|	*   Current PC	*	*   Current PC	*
|	*****************	*****************
|	* 0x2 *  0x014	*	* 0x2 *  0x024	*
|	*****************	*****************
|	*     Next	*	*     Next	*
|	*      PC	*	*      PC	*
|	*****************	*****************
|	*      SR	*	*      SR	*
|	*****************	*****************
|
|	move.b		#0x24,0x7(%sp)		| set trace vecno
|	bral		_060_real_trace

real_divbyzero_end:
	bral		SYMBOL_NAME(trap)	| jump to trap handler

|##########################

|
| _060_real_cas():
|
| Entry point for the selected cas emulation code implementation.
| If the implementation provided by the 68060ISP is sufficient,
| then this routine simply re-enters the package through _isp_cas.
|
	.global		_060_real_cas
_060_real_cas:
	bral		_I_CALL_TOP+0x80+0x08

|
| _060_real_cas2():
|
| Entry point for the selected cas2 emulation code implementation.
| If the implementation provided by the 68060ISP is sufficient,
| then this routine simply re-enters the package through _isp_cas2.
|
	.global		_060_real_cas2
_060_real_cas2:
	bral		_I_CALL_TOP+0x80+0x10

|
| _060_lock_page():
|
| Entry point for the operating system`s routine to "lock" a page
| from being paged out. This routine is needed by the cas/cas2
| algorithms so that no page faults occur within the "core" code
| region. Note: the routine must lock two pages if the operand 
| spans two pages.
| NOTE: THE ROUTINE SHOULD RETURN AN FSLW VALUE IN D0 ON FAILURE
| SO THAT THE 060SP CAN CREATE A PROPER ACCESS ERROR FRAME.
| Arguments:
|	a0 = operand address
|	d0 = `xxxxxxff -> supervisor; `xxxxxx00 -> user
|	d1 = `xxxxxxff -> longword; `xxxxxx00 -> word
| Expected outputs:
|	d0 = 0 -> success; non-zero -> failure
|
| Linux/68k: As long as ints are disabled, no swapping out should
| occur (hopefully...)
|
	.global		_060_real_lock_page
_060_real_lock_page:
	clr.l		%d0
	rts

|
| _060_unlock_page():
|
| Entry point for the operating system`s routine to "unlock" a
| page that has been "locked" previously with _real_lock_page.
| Note: the routine must unlock two pages if the operand spans
| two pages.
| Arguments:
| 	a0 = operand address
|	d0 = `xxxxxxff -> supervisor; `xxxxxx00 -> user
|	d1 = `xxxxxxff -> longword; `xxxxxx00 -> word
|
| Linux/68k: As we do no special locking operation, also no unlocking
| is needed...

	.global		_060_real_unlock_page
_060_real_unlock_page:
	clr.l		%d0
	rts

|###########################################################################

|#################################
| (2) EXAMPLE PACKAGE ENTRY CODE #
|#################################

	.global		_060_isp_unimp
_060_isp_unimp:
	bral		_I_CALL_TOP+0x80+0x00

	.global		_060_isp_cas
_060_isp_cas:
	bral		_I_CALL_TOP+0x80+0x08

	.global		_060_isp_cas2
_060_isp_cas2:
	bral		_I_CALL_TOP+0x80+0x10

	.global		_060_isp_cas_finish
_060_isp_cas_finish:
	bra.l		_I_CALL_TOP+0x80+0x18

	.global		_060_isp_cas2_finish
_060_isp_cas2_finish:
	bral		_I_CALL_TOP+0x80+0x20

	.global		_060_isp_cas_inrange
_060_isp_cas_inrange:
	bral		_I_CALL_TOP+0x80+0x28

	.global		_060_isp_cas_terminate
_060_isp_cas_terminate:
	bral		_I_CALL_TOP+0x80+0x30

	.global		_060_isp_cas_restart
_060_isp_cas_restart:
	bral		_I_CALL_TOP+0x80+0x38

|###########################################################################

|###############################
| (3) EXAMPLE CALL-OUT SECTION #
|###############################

| The size of this section MUST be 128 bytes!!!

	.global	_I_CALL_TOP
_I_CALL_TOP:
	.long	_060_real_chk		- _I_CALL_TOP
	.long	_060_real_divbyzero	- _I_CALL_TOP
	.long	_060_real_trace		- _I_CALL_TOP
	.long	_060_real_access	- _I_CALL_TOP
	.long	_060_isp_done		- _I_CALL_TOP

	.long	_060_real_cas		- _I_CALL_TOP
	.long	_060_real_cas2		- _I_CALL_TOP
	.long	_060_real_lock_page	- _I_CALL_TOP
	.long	_060_real_unlock_page	- _I_CALL_TOP

	.long	0x00000000, 0x00000000, 0x00000000, 0x00000000
	.long	0x00000000, 0x00000000, 0x00000000

	.long	_060_imem_read		- _I_CALL_TOP
	.long	_060_dmem_read		- _I_CALL_TOP
	.long	_060_dmem_write		- _I_CALL_TOP
	.long	_060_imem_read_word	- _I_CALL_TOP
	.long	_060_imem_read_long	- _I_CALL_TOP
	.long	_060_dmem_read_byte	- _I_CALL_TOP
	.long	_060_dmem_read_word	- _I_CALL_TOP
	.long	_060_dmem_read_long	- _I_CALL_TOP
	.long	_060_dmem_write_byte	- _I_CALL_TOP
	.long	_060_dmem_write_word	- _I_CALL_TOP
	.long	_060_dmem_write_long	- _I_CALL_TOP

	.long	0x00000000
	.long	0x00000000, 0x00000000, 0x00000000, 0x00000000

|###########################################################################

| 060 INTEGER KERNEL PACKAGE MUST GO HERE!!!
	.include "isp.sa"
~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
MOTOROLA MICROPROCESSOR & MEMORY TECHNOLOGY GROUP
M68000 Hi-Performance Microprocessor Division
M68060 Software Package
Production Release P1.00 -- October 10, 1994

M68060 Software Package Copyright � 1993, 1994 Motorola Inc.  All rights reserved.
 
THE SOFTWARE is provided on an "AS IS" basis and without warranty.
To the maximum extent permitted by applicable law,
MOTOROLA DISCLAIMS ALL WARRANTIES WHETHER EXPRESS OR IMPLIED, 
INCLUDING IMPLIED WARRANTIES OF MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE
and any warranty against infringement with regard to the SOFTWARE
(INCLUDING ANY MODIFIED VERSIONS THEREOF) and any accompanying written materials.

To the maximum extent permitted by applicable law,
IN NO EVENT SHALL MOTOROLA BE LIABLE FOR ANY DAMAGES WHATSOEVER
(INCLUDING WITHOUT LIMITATION, DAMAGES FOR LOSS OF BUSINESS PROFITS,
BUSINESS INTERRUPTION, LOSS OF BUSINESS INFORMATION, OR OTHER PECUNIARY LOSS)
ARISING OF THE USE OR INABILITY TO USE THE SOFTWARE.
Motorola assumes no responsibility for the maintenance and support of the SOFTWARE.

You are hereby granted a copyright license to use, modify, and distribute the SOFTWARE
so long as this entire notice is retained without alteration in any modified and/or
redistributed versions, and that such modified versions are clearly identified as such.
No licenses are granted by implication, estoppel or otherwise under any patents
or trademarks of Motorola, Inc.
~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
68060 INTEGER SOFTWARE PACKAGE (Kernel version)
------------------------------------------------

The file isp.sa contains the 68060 Integer Software Package.
This package is essentially an exception handler that can be
integrated into an operating system to handle the "Unimplemented
Integer Instruction" exception vector #61.
This exception is taken when any of the integer instructions
not hardware implemented on the 68060 are encountered. The
isp.sa provides full emulation support for these instructions.

The unimplemented integer instructions are:
	64-bit divide
	64-bit multiply
	movep
	cmp2
	chk2
	cas (w/ a misaligned effective address)
	cas2

Release file format:
--------------------
The file isp.sa is essentially a hexadecimal image of the
release package. This is the ONLY format which will be supported.
The hex image was created by assembling the source code and
then converting the resulting binary output image into an
ASCII text file. The hexadecimal numbers are listed
using the Motorola Assembly Syntax assembler directive "dc.l"
(define constant longword). The file can be converted to other
assembly syntaxes by using any word processor with a global
search and replace function.

To assist in assembling and linking this module with other modules,
the installer should add a symbolic label to the top of the file.
This will allow calling routines to access the entry points
of this package.

The source code isp.s has also been included but only for
documentation purposes.

Release file structure:
-----------------------

(top of module)
	-----------------
	|		| - 128 byte-sized section
   (1)  |   Call-Out    | - 4 bytes per entry (user fills these in)
	|		| - example routines in iskeleton.s
	-----------------
	|		| - 8 bytes per entry
   (2)  | Entry Point   | - user does a "bra" or "jmp" to this address
	|               | 
	-----------------
	|		| - code section
   (3)  ~		~
	|		|
	-----------------
(bottom of module)

The first section of this module is the "Call-out" section. This section
is NOT INCLUDED in isp.sa (an example "Call-out" section is provided at
the end of the file iskeleton.s). The purpose of this section is to allow 
the ISP routines to reference external functions that must be provided 
by the host operating system. This section MUST be exactly 128 bytes in 
size. There are 32 fields, each 4 bytes in size. Each field corresponds
to a function required by the ISP (these functions and their location are
listed in "68060ISP call-outs" below). Each field entry should contain
the address of the corresponding function RELATIVE to the starting address
of the "call-out" section. The "Call-out" section must sit adjacent to the 
isp.sa image in memory.

The second section, the "Entry-point" section, is used by external routines
to access the functions within the ISP. Since the isp.sa hex file contains
no symbol names, this section contains function entry points that are fixed
with respect to the top of the package. The currently defined entry-points
are listed in section "68060 ISP entry points" below. A calling routine
would simply execute a "bra" or "jmp" that jumped to the selected function
entry-point.

For example, if the 68060 hardware took a "Unimplemented Integer Instruction"
exception (vector #61), the operating system should execute something
similar to:

	bra	_060ISP_TOP+128+0

(_060ISP_TOP is the starting address of the "Call-out" section; the "Call-out"
section is 128 bytes long; and the Unimplemented Integer ISP handler entry 
point is located 0 bytes from the top of the "Entry-point" section.)

The third section is the code section. After entering through an "Entry-point",
the entry code jumps to the appropriate emulation code within the code section.

68060ISP call-outs: (details in iskeleton.s)
--------------------
0x000:	_060_real_chk
0x004:	_060_real_divbyzero
0x008:	_060_real_trace
0x00c:	_060_real_access
0x010:	_060_isp_done

0x014:	_060_real_cas
0x018:	_060_real_cas2
0x01c:	_060_real_lock_page
0x020:	_060_real_unlock_page

0x024:	(Motorola reserved)
0x028:	(Motorola reserved)
0x02c:	(Motorola reserved)
0x030:	(Motorola reserved)
0x034:	(Motorola reserved)
0x038:	(Motorola reserved)
0x03c:	(Motorola reserved)

0x040:	_060_imem_read
0x044:	_060_dmem_read
0x048:	_060_dmem_write
0x04c:	_060_imem_read_word
0x050:	_060_imem_read_long
0x054:	_060_dmem_read_byte
0x058:	_060_dmem_read_word
0x05c:	_060_dmem_read_long
0x060:	_060_dmem_write_byte
0x064:	_060_dmem_write_word
0x068:	_060_dmem_write_long

0x06c:	(Motorola reserved)
0x070:	(Motorola reserved)
0x074:	(Motorola reserved)
0x078:	(Motorola reserved)
0x07c:	(Motorola reserved)

68060ISP entry points:
-----------------------
0x000:	_060_isp_unimp

0x008:	_060_isp_cas
0x010:	_060_isp_cas2
0x018:	_060_isp_cas_finish
0x020:	_060_isp_cas2_finish
0x028:	_060_isp_cas_inrange
0x030:	_060_isp_cas_terminate
0x038:	_060_isp_cas_restart

Integrating cas/cas2:
---------------------
The instructions "cas2" and "cas" (when used with a misaligned effective
address) take the Unimplemented Integer Instruction exception. When the
060ISP is installed properly, these instructions will enter through the
_060_isp_unimp() entry point of the ISP.

After the 060ISP decodes the instruction type and fetches the appropriate
data registers, and BEFORE the actual emulated transfers occur, the 
package calls either the "Call-out" _060_real_cas() or _060_real_cas2().
If the emulation code provided by the 060ISP is sufficient for the
host system (see isp.s source code), then these "Call-out"s should be
made, by the system integrator, to point directly back into the package
through the "Entry-point"s _060_isp_cas() or _060_isp_cas2().

One other necessary action by the integrator is to supply the routines
_060_real_lock_page() and _060_real_unlock_page(). These functions are
defined further in iskeleton.s and the 68060 Software Package Specification.

If the "core" emulation routines of either "cas" or "cas2" perform some
actions which are too system-specific, then the system integrator must
supply new emulation code. This new emulation code should reside within
the functions _060_real_cas() or _060_real_cas2(). When this new emulation
code has completed, then it should re-enter the 060ISP package through the
"Entry-point" _060_isp_cas_finish() or _060_isp_cas2_finish().
To see what the register state is upon entering _060_real_cas() or
_060_real_cas2() and what it should be upon return to the package through
_060_isp_cas_finish() or _060_isp_cas2_finish(), please refer to the
source code in isp.s.

Miscellaneous:
--------------

_060_isp_unimp:
----------------
- documented in 2.2 in spec.
- Basic flow:
	exception taken ---> enter _060_isp_unimp   --|
						      |
						      |
            may exit through _060_real_itrace    <----|
						  or  |
            may exit through _060_real_chk       <----|
						  or  |
            may exit through _060_real_divbyzero <----|
						  or  |
            may exit through _060_isp_done       <----|
	.long	0x60ff0000,0x02360000,0x60ff0000,0x16260000
	.long	0x60ff0000,0x12dc0000,0x60ff0000,0x11ea0000
	.long	0x60ff0000,0x10de0000,0x60ff0000,0x12a40000
	.long	0x60ff0000,0x12560000,0x60ff0000,0x122a0000
	.long	0x51fc51fc,0x51fc51fc,0x51fc51fc,0x51fc51fc
	.long	0x51fc51fc,0x51fc51fc,0x51fc51fc,0x51fc51fc
	.long	0x51fc51fc,0x51fc51fc,0x51fc51fc,0x51fc51fc
	.long	0x51fc51fc,0x51fc51fc,0x51fc51fc,0x51fc51fc
	.long	0x2f00203a,0xfefc487b,0x0930ffff,0xfef8202f
	.long	0x00044e74,0x00042f00,0x203afeea,0x487b0930
	.long	0xfffffee2,0x202f0004,0x4e740004,0x2f00203a
	.long	0xfed8487b,0x0930ffff,0xfecc202f,0x00044e74
	.long	0x00042f00,0x203afec6,0x487b0930,0xfffffeb6
	.long	0x202f0004,0x4e740004,0x2f00203a,0xfeb4487b
	.long	0x0930ffff,0xfea0202f,0x00044e74,0x00042f00
	.long	0x203afea2,0x487b0930,0xfffffe8a,0x202f0004
	.long	0x4e740004,0x2f00203a,0xfe90487b,0x0930ffff
	.long	0xfe74202f,0x00044e74,0x00042f00,0x203afe7e
	.long	0x487b0930,0xfffffe5e,0x202f0004,0x4e740004
	.long	0x2f00203a,0xfe6c487b,0x0930ffff,0xfe48202f
	.long	0x00044e74,0x00042f00,0x203afe76,0x487b0930
	.long	0xfffffe32,0x202f0004,0x4e740004,0x2f00203a
	.long	0xfe64487b,0x0930ffff,0xfe1c202f,0x00044e74
	.long	0x00042f00,0x203afe52,0x487b0930,0xfffffe06
	.long	0x202f0004,0x4e740004,0x2f00203a,0xfe40487b
	.long	0x0930ffff,0xfdf0202f,0x00044e74,0x00042f00
	.long	0x203afe2e,0x487b0930,0xfffffdda,0x202f0004
	.long	0x4e740004,0x2f00203a,0xfe1c487b,0x0930ffff
	.long	0xfdc4202f,0x00044e74,0x00042f00,0x203afe0a
	.long	0x487b0930,0xfffffdae,0x202f0004,0x4e740004
	.long	0x2f00203a,0xfdf8487b,0x0930ffff,0xfd98202f
	.long	0x00044e74,0x00042f00,0x203afde6,0x487b0930
	.long	0xfffffd82,0x202f0004,0x4e740004,0x2f00203a
	.long	0xfdd4487b,0x0930ffff,0xfd6c202f,0x00044e74
	.long	0x00042f00,0x203afdc2,0x487b0930,0xfffffd56
	.long	0x202f0004,0x4e740004,0x4e56ffa0,0x48ee3fff
	.long	0xffc02d56,0xfff8082e,0x00050004,0x66084e68
	.long	0x2d48fffc,0x600841ee,0x000c2d48,0xfffc422e
	.long	0xffaa3d6e,0x0004ffa8,0x2d6e0006,0xffa4206e
	.long	0xffa458ae,0xffa461ff,0xffffff26,0x2d40ffa0
	.long	0x0800001e,0x67680800,0x00166628,0x61ff0000
	.long	0x0cb0082e,0x00050004,0x670000ac,0x082e0002
	.long	0xffaa6700,0x00a2082e,0x00070004,0x66000186
	.long	0x600001b0,0x61ff0000,0x0a28082e,0x0002ffaa
	.long	0x660e082e,0x0005ffaa,0x6600010a,0x60000078
	.long	0x082e0005,0x000467ea,0x082e0005,0xffaa6600
	.long	0x01264a2e,0x00046b00,0x014c6000,0x01760800
	.long	0x0018670a,0x61ff0000,0x07ae6000,0x004a0800
	.long	0x001b6730,0x48400c00,0x00fc670a,0x61ff0000
	.long	0x0e926000,0x0032206e,0xffa454ae,0xffa461ff
	.long	0xfffffe68,0x4a816600,0x019861ff,0x00000d20
	.long	0x60000014,0x61ff0000,0x08c40c2e,0x0010ffaa
	.long	0x66000004,0x605c1d6e,0xffa90005,0x082e0005
	.long	0x00046606,0x206efffc,0x4e604cee,0x3fffffc0
	.long	0x082e0007,0x00046612,0x2d6effa4,0x00062cae
	.long	0xfff84e5e,0x60ffffff,0xfd622d6e,0xfff8fffc
	.long	0x3d6e0004,0x00002d6e,0x00060008,0x2d6effa4
	.long	0x00023d7c,0x20240006,0x598e4e5e,0x60ffffff
	.long	0xfd0e1d6e,0xffa90005,0x4cee3fff,0xffc03cae
	.long	0x00042d6e,0x00060008,0x2d6effa4,0x00023d7c
	.long	0x20180006,0x2c6efff8,0xdffc0000,0x006060ff
	.long	0xfffffcb0,0x1d6effa9,0x00054cee,0x3fffffc0
	.long	0x3cae0004,0x2d6e0006,0x00082d6e,0xffa40002
	.long	0x3d7c2014,0x00062c6e,0xfff8dffc,0x00000060
	.long	0x60ffffff,0xfc941d6e,0xffa90005,0x4cee3fff
	.long	0xffc02d6e,0x0006000c,0x3d7c2014,0x000a2d6e
	.long	0xffa40006,0x2c6efff8,0xdffc0000,0x006460ff
	.long	0xfffffc66,0x1d6effa9,0x00054cee,0x3fffffc0
	.long	0x2d6e0006,0x000c3d7c,0x2024000a,0x2d6effa4
	.long	0x00062c6e,0xfff8dffc,0x00000064,0x60ffffff
	.long	0xfc4e1d6e,0xffa90005,0x4cee3fff,0xffc03d7c
	.long	0x00f4000e,0x2d6effa4,0x000a3d6e,0x00040008
	.long	0x2c6efff8,0xdffc0000,0x006860ff,0xfffffc4c
	.long	0x2c882d40,0xfffc4fee,0xffc04cdf,0x7fff2f2f
	.long	0x000c2f6f,0x00040010,0x2f6f000c,0x00042f6f
	.long	0x0008000c,0x2f5f0004,0x3f7c4008,0x00066028
	.long	0x4cee3fff,0xffc04e5e,0x514f2eaf,0x00083f6f
	.long	0x000c0004,0x3f7c4008,0x00062f6f,0x00020008
	.long	0x2f7c0942,0x8001000c,0x08170005,0x670608ef
	.long	0x0002000d,0x60ffffff,0xfbcc0c2e,0x0040ffaa
	.long	0x660c4280,0x102effab,0x2daeffac,0x0ce04e75
	.long	0x2040302e,0xffa03200,0x0240003f,0x02810000
	.long	0x0007303b,0x020a4efb,0x00064afc,0x00400000
	.long	0x00000000,0x00000000,0x00000000,0x00000000
	.long	0x00000000,0x00000000,0x00000000,0x00000080
	.long	0x0086008c,0x00920098,0x009e00a4,0x00aa00b0
	.long	0x00ce00ec,0x010a0128,0x01460164,0x01820196
	.long	0x01b401d2,0x01f0020e,0x022c024a,0x0268027c
	.long	0x029a02b8,0x02d602f4,0x03120330,0x034e036c
	.long	0x036c036c,0x036c036c,0x036c036c,0x036c03d6
	.long	0x03f0040a,0x042a03ca,0x00000000,0x0000206e
	.long	0xffe04e75,0x206effe4,0x4e75206e,0xffe84e75
	.long	0x206effec,0x4e75206e,0xfff04e75,0x206efff4
	.long	0x4e75206e,0xfff84e75,0x206efffc,0x4e752008
	.long	0x206effe0,0xd0882d40,0xffe02d48,0xffac1d7c
	.long	0x0000ffab,0x1d7c0040,0xffaa4e75,0x2008206e
	.long	0xffe4d088,0x2d40ffe4,0x2d48ffac,0x1d7c0001
	.long	0xffab1d7c,0x0040ffaa,0x4e752008,0x206effe8
	.long	0xd0882d40,0xffe82d48,0xffac1d7c,0x0002ffab
	.long	0x1d7c0040,0xffaa4e75,0x2008206e,0xffecd088
	.long	0x2d40ffec,0x2d48ffac,0x1d7c0003,0xffab1d7c
	.long	0x0040ffaa,0x4e752008,0x206efff0,0xd0882d40
	.long	0xfff02d48,0xffac1d7c,0x0004ffab,0x1d7c0040
	.long	0xffaa4e75,0x2008206e,0xfff4d088,0x2d40fff4
	.long	0x2d48ffac,0x1d7c0005,0xffab1d7c,0x0040ffaa
	.long	0x4e752008,0x206efff8,0xd0882d40,0xfff82d48
	.long	0xffac1d7c,0x0006ffab,0x1d7c0040,0xffaa4e75
	.long	0x1d7c0004,0xffaa2008,0x206efffc,0xd0882d40
	.long	0xfffc4e75,0x202effe0,0x2d40ffac,0x90882d40
	.long	0xffe02040,0x1d7c0000,0xffab1d7c,0x0040ffaa
	.long	0x4e75202e,0xffe42d40,0xffac9088,0x2d40ffe4
	.long	0x20401d7c,0x0001ffab,0x1d7c0040,0xffaa4e75
	.long	0x202effe8,0x2d40ffac,0x90882d40,0xffe82040
	.long	0x1d7c0002,0xffab1d7c,0x0040ffaa,0x4e75202e
	.long	0xffec2d40,0xffac9088,0x2d40ffec,0x20401d7c
	.long	0x0003ffab,0x1d7c0040,0xffaa4e75,0x202efff0
	.long	0x2d40ffac,0x90882d40,0xfff02040,0x1d7c0004
	.long	0xffab1d7c,0x0040ffaa,0x4e75202e,0xfff42d40
	.long	0xffac9088,0x2d40fff4,0x20401d7c,0x0005ffab
	.long	0x1d7c0040,0xffaa4e75,0x202efff8,0x2d40ffac
	.long	0x90882d40,0xfff82040,0x1d7c0006,0xffab1d7c
	.long	0x0040ffaa,0x4e751d7c,0x0008ffaa,0x202efffc
	.long	0x90882d40,0xfffc2040,0x4e75206e,0xffa454ae
	.long	0xffa461ff,0xfffff9d4,0x4a8166ff,0xfffffd04
	.long	0x3040d1ee,0xffe04e75,0x206effa4,0x54aeffa4
	.long	0x61ffffff,0xf9b64a81,0x66ffffff,0xfce63040
	.long	0xd1eeffe4,0x4e75206e,0xffa454ae,0xffa461ff
	.long	0xfffff998,0x4a8166ff,0xfffffcc8,0x3040d1ee
	.long	0xffe84e75,0x206effa4,0x54aeffa4,0x61ffffff
	.long	0xf97a4a81,0x66ffffff,0xfcaa3040,0xd1eeffec
	.long	0x4e75206e,0xffa454ae,0xffa461ff,0xfffff95c
	.long	0x4a8166ff,0xfffffc8c,0x3040d1ee,0xfff04e75
	.long	0x206effa4,0x54aeffa4,0x61ffffff,0xf93e4a81
	.long	0x66ffffff,0xfc6e3040,0xd1eefff4,0x4e75206e
	.long	0xffa454ae,0xffa461ff,0xfffff920,0x4a8166ff
	.long	0xfffffc50,0x3040d1ee,0xfff84e75,0x206effa4
	.long	0x54aeffa4,0x61ffffff,0xf9024a81,0x66ffffff
	.long	0xfc323040,0xd1eefffc,0x4e752f01,0x206effa4
	.long	0x54aeffa4,0x61ffffff,0xf8e24a81,0x66ffffff
	.long	0xfc12221f,0x207614e0,0x08000008,0x670e48e7
	.long	0x3c002a00,0x260860ff,0x000000ec,0x2f022200
	.long	0xe9590241,0x000f2236,0x14c00800,0x000b6602
	.long	0x48c12400,0xef5a0282,0x00000003,0xe5a949c0
	.long	0xd081d1c0,0x241f4e75,0x1d7c0080,0xffaa206e
	.long	0xffa44e75,0x206effa4,0x54aeffa4,0x61ffffff
	.long	0xf87a4a81,0x66ffffff,0xfbaa3040,0x4e75206e
	.long	0xffa458ae,0xffa461ff,0xfffff876,0x4a8166ff
	.long	0xfffffb90,0x20404e75,0x206effa4,0x54aeffa4
	.long	0x61ffffff,0xf8464a81,0x66ffffff,0xfb763040
	.long	0xd1eeffa4,0x55884e75,0x206effa4,0x54aeffa4
	.long	0x61ffffff,0xf8264a81,0x66ffffff,0xfb56206e
	.long	0xffa45588,0x08000008,0x670e48e7,0x3c002a00
	.long	0x260860ff,0x00000030,0x2f022200,0xe9590241
	.long	0x000f2236,0x14c00800,0x000b6602,0x48c12400
	.long	0xef5a0282,0x00000003,0xe5a949c0,0xd081d1c0
	.long	0x241f4e75,0x08050006,0x67044282,0x6016e9c5
	.long	0x24042436,0x24c00805,0x000b6602,0x48c2e9c5
	.long	0x0542e1aa,0x08050007,0x67024283,0xe9c50682
	.long	0x0c000002,0x6d346718,0x206effa4,0x58aeffa4
	.long	0x61ffffff,0xf7ac4a81,0x66ffffff,0xfac66018
	.long	0x206effa4,0x54aeffa4,0x61ffffff,0xf77e4a81
	.long	0x66ffffff,0xfaae48c0,0xd680e9c5,0x07826700
	.long	0x006a0c00,0x00026d34,0x6718206e,0xffa458ae
	.long	0xffa461ff,0xfffff76a,0x4a8166ff,0xfffffa84
	.long	0x601c206e,0xffa454ae,0xffa461ff,0xfffff73c
	.long	0x4a8166ff,0xfffffa6c,0x48c06002,0x42802800
	.long	0x08050002,0x67122043,0x61ffffff,0xf7764a81
	.long	0x6624d082,0xd0846016,0xd6822043,0x61ffffff
	.long	0xf7624a81,0x6610d084,0x6004d682,0x20032040
	.long	0x4cdf003c,0x4e752043,0x203c0101,0x000160ff
	.long	0xfffff9f0,0x322effa0,0x10010240,0x00072076
	.long	0x04e0d0ee,0xffa20801,0x00076700,0x008c3001
	.long	0xef580240,0x00072036,0x04c00801,0x00066752
	.long	0x24002448,0xe19a2002,0x61ffffff,0xf71c4a81
	.long	0x660000fc,0x544a204a,0xe19a2002,0x61ffffff
	.long	0xf7084a81,0x660000e8,0x544a204a,0xe19a2002
	.long	0x61ffffff,0xf6f44a81,0x660000d4,0x544a204a
	.long	0xe19a2002,0x61ffffff,0xf6e04a81,0x660000c0
	.long	0x4e752400,0x2448e048,0x61ffffff,0xf6cc4a81
	.long	0x660000ac,0x544a204a,0x200261ff,0xfffff6ba
	.long	0x4a816600,0x009a4e75,0x08010006,0x675c2448
	.long	0x61ffffff,0xf6624a81,0x66000092,0x2400544a
	.long	0x204a61ff,0xfffff650,0x4a816600,0x0080e14a
	.long	0x1400544a,0x204a61ff,0xfffff63c,0x4a816600
	.long	0x006ce18a,0x1400544a,0x204a61ff,0xfffff628
	.long	0x4a816600,0x0058e18a,0x1400122e,0xffa0e209
	.long	0x02410007,0x2d8214c0,0x4e752448,0x61ffffff
	.long	0xf6064a81,0x66000036,0x2400544a,0x204a61ff
	.long	0xfffff5f4,0x4a816600,0x0024e14a,0x1400122e
	.long	0xffa0e209,0x02410007,0x3d8214c2,0x4e75204a
	.long	0x203c00a1,0x000160ff,0xfffff8a8,0x204a203c
	.long	0x01210001,0x60ffffff,0xf89a61ff,0xfffff914
	.long	0x102effa2,0xe9180240,0x000f2436,0x04c00c2e
	.long	0x0002ffa0,0x6d506728,0x244861ff,0xfffff5c4
	.long	0x4a816600,0x009e2600,0x588a204a,0x61ffffff
	.long	0xf5b24a81,0x6600008c,0x22002003,0x60000048
	.long	0x244861ff,0xfffff59c,0x4a816600,0x00763200
	.long	0x484048c0,0x48c1082e,0x0007ffa2,0x66000028
	.long	0x48c26000,0x00222448,0x61ffffff,0xf5604a81
	.long	0x6600005e,0x1200e048,0x49c049c1,0x082e0007
	.long	0xffa26602,0x49c29480,0x42c30203,0x00049280
	.long	0xb28242c4,0x86040203,0x0005382e,0xffa80204
	.long	0x001a8803,0x3d44ffa8,0x082e0003,0xffa26602
	.long	0x4e750804,0x00006602,0x4e751d7c,0x0010ffaa
	.long	0x4e75204a,0x203c0101,0x000160ff,0xfffff7c4
	.long	0x204a203c,0x01410001,0x60ffffff,0xf7b6102e
	.long	0xffa10200,0x00386600,0x0208102e,0xffa10240
	.long	0x00072e36,0x04c06700,0x00c0102e,0xffa3122e
	.long	0xffa20240,0x0007e809,0x02410007,0x3d40ffb2
	.long	0x3d41ffb4,0x2a3604c0,0x2c3614c0,0x082e0003
	.long	0xffa2671a,0x4a875dee,0xffb06a02,0x44874a85
	.long	0x5deeffb1,0x6a0844fc,0x00004086,0x40854a85
	.long	0x66164a86,0x67000048,0xbe866306,0xcb466000
	.long	0x00124c47,0x6005600a,0xbe85634e,0x61ff0000
	.long	0x0068082e,0x0003ffa2,0x67244a2e,0xffb16702
	.long	0x4485102e,0xffb0b12e,0xffb1670c,0x0c868000
	.long	0x00006226,0x44866006,0x0806001f,0x661c44ee
	.long	0xffa84a86,0x42eeffa8,0x302effb2,0x322effb4
	.long	0x2d8504c0,0x2d8614c0,0x4e7508ee,0x0001ffa9
	.long	0x08ae0000,0xffa94e75,0x022e001e,0xffa9002e
	.long	0x0020ffaa,0x4e750c87,0x0000ffff,0x621e4281
	.long	0x48454846,0x3a068ac7,0x32054846,0x3a068ac7
	.long	0x48413205,0x42454845,0x2c014e75,0x42aeffbc
	.long	0x422effb6,0x42810807,0x001f660e,0x52aeffbc
	.long	0xe38fe38e,0xe3956000,0xffee2607,0x24054842
	.long	0x4843b443,0x6606323c,0xffff600a,0x220582c3
	.long	0x02810000,0xffff2f06,0x42464846,0x26072401
	.long	0xc4c74843,0xc6c12805,0x98834844,0x30043806
	.long	0x4a406600,0x000ab484,0x63045381,0x60de2f05
	.long	0x2c014846,0x2a0761ff,0x0000006a,0x24052606
	.long	0x2a1f2c1f,0x9c839b82,0x64ff0000,0x001a5381
	.long	0x42822607,0x48434243,0xdc83db82,0x26074243
	.long	0x4843da83,0x4a2effb6,0x66163d41,0xffb84281
	.long	0x48454846,0x3a064246,0x50eeffb6,0x6000ff6c
	.long	0x3d41ffba,0x3c054846,0x48452e2e,0xffbc670a
	.long	0x5387e28d,0xe29651cf,0xfffa2a06,0x2c2effb8
	.long	0x4e752406,0x26062805,0x48434844,0xccc5cac3
	.long	0xc4c4c6c4,0x42844846,0xdc45d744,0xdc42d744
	.long	0x48464245,0x42424845,0x4842da82,0xda834e75
	.long	0x700461ff,0xfffff61c,0x0c2e0080,0xffaa6712
	.long	0x244861ff,0xfffff2dc,0x4a81661e,0x2e006000
	.long	0xfde658ae,0xffa461ff,0xfffff286,0x4a8166ff
	.long	0xfffff5a0,0x2e006000,0xfdce61ff,0xfffff5ce
	.long	0x204a203c,0x01010001,0x60ffffff,0xf556102e
	.long	0xffa10c00,0x00076e00,0x00b40240,0x00072636
	.long	0x04c0342e,0xffa24241,0x1202e95a,0x02420007
	.long	0x283624c0,0x4a846700,0x00884a83,0x67000082
	.long	0x422effb0,0x082e0003,0xffa26718,0x4a836c08
	.long	0x4483002e,0x0001ffb0,0x4a846c08,0x44840a2e
	.long	0x0001ffb0,0x2a032c03,0x2e044846,0x4847c6c4
	.long	0xc8c6cac7,0xccc74287,0x4843d644,0xdd87d645
	.long	0xdd874843,0x42444245,0x48444845,0xd885d886
	.long	0x4a2effb0,0x67084683,0x46845283,0xd9872d83
	.long	0x24c044fc,0x00002d84,0x14c042c7,0x02070008
	.long	0x1c2effa9,0x02060010,0x8c071d46,0xffa94e75
	.long	0x42b624c0,0x42b614c0,0x7e0460e4,0x700461ff
	.long	0xfffff510,0x0c2e0080,0xffaa6714,0x244861ff
	.long	0xfffff1d0,0x4a816600,0x00202600,0x6000ff34
	.long	0x58aeffa4,0x61ffffff,0xf1784a81,0x66ffffff
	.long	0xf4922600,0x6000ff1c,0x61ffffff,0xf4c0204a
	.long	0x203c0101,0x000160ff,0xfffff448,0x2d40ffb4
	.long	0x2200e958,0x0240000f,0x227604c0,0x2d49ffb0
	.long	0x2001ec49,0x02410007,0x2a3614c0,0x02400007
	.long	0x263604c0,0x3d40ffba,0x302effa2,0x2200e958
	.long	0x0240000f,0x207604c0,0x2d48ffbc,0x2001ec49
	.long	0x02410007,0x283614c0,0x02400007,0x243604c0
	.long	0x3d40ffb8,0x082e0001,0xffa056c7,0x082e0005
	.long	0x000456c6,0x24482649,0x22072006,0x61ffffff
	.long	0xf05c204a,0x4a8066ff,0x000001c8,0x22072006
	.long	0x204b61ff,0xfffff046,0x204b4a80,0x660a204a
	.long	0x224b60ff,0xfffff020,0x2f002207,0x2006204a
	.long	0x61ffffff,0xf03e201f,0x204b60ff,0x00000194
	.long	0x082e0001,0xffa06648,0x44eeffa8,0xb0426602
	.long	0xb24342ee,0xffa84a04,0x6610362e,0xffba3d81
	.long	0x34c2342e,0xffb83d80,0x24c2082e,0x00050004
	.long	0x56c22002,0x51c1206e,0xffbc61ff,0xffffeff4
	.long	0x200251c1,0x206effb0,0x61ffffff,0xefe64e75
	.long	0x44eeffa8,0xb0826602,0xb28342ee,0xffa84a04
	.long	0x6610362e,0xffba2d81,0x34c0342e,0xffb82d80
	.long	0x24c0082e,0x00050004,0x56c22002,0x50c1206e
	.long	0xffbc61ff,0xffffefac,0x200250c1,0x206effb0
	.long	0x61ffffff,0xef9e4e75,0x202effb4,0x6000feae
	.long	0x082e0001,0xffa06610,0x700261ff,0xfffff364
	.long	0x2d48ffb4,0x51c7600e,0x700461ff,0xfffff354
	.long	0x2d48ffb4,0x50c7302e,0xffa22200,0xec480240
	.long	0x00072436,0x04c00241,0x00072836,0x14c03d41
	.long	0xffb8082e,0x00050004,0x56c62448,0x22072006
	.long	0x61ffffff,0xef284a80,0x66000096,0x204a60ff
	.long	0xffffeeee,0x082e0001,0xffa0662c,0x44eeffa8
	.long	0xb04442ee,0xffa84a01,0x6608362e,0xffb83d80
	.long	0x34c2206e,0xffb451c1,0x082e0005,0x000456c0
	.long	0x61ffffff,0xeefe4e75,0x44eeffa8,0xb08442ee
	.long	0xffa84a01,0x6608362e,0xffb82d80,0x34c0206e
	.long	0xffb450c1,0x082e0005,0x000456c0,0x61ffffff
	.long	0xeed24e75,0x4e7b6000,0x4e7b6001,0x0c2e00fc
	.long	0xffa167ff,0xffffff24,0x206effb4,0x082e0001
	.long	0xffa056c7,0x6000ff40,0x4e7b6000,0x4e7b6001
	.long	0x24482f00,0x61ffffff,0xf264201f,0x588f518f
	.long	0x518e721a,0x41ef0008,0x43ef0000,0x22d851c9
	.long	0xfffc3d7c,0x4008000a,0x2d4a000c,0x2d400010
	.long	0x4cee3fff,0xffc04e5e,0x60ffffff,0xedf84280
	.long	0x43fb0170,0x000005ae,0xb3c86d0e,0x43fb0170
	.long	0x00000010,0xb1c96d02,0x4e7570ff,0x4e754a06
	.long	0x66047001,0x60027005,0x4a076700,0x01e42448
	.long	0x26492848,0x2a49568c,0x568d220a,0x40c7007c
	.long	0x07004e7a,0x60004e7b,0x00004e7b,0x0001f58a
	.long	0xf58cf58b,0xf58df46a,0xf46cf46b,0xf46d2441
	.long	0x56812841,0xf5caf5cc,0x247c8000,0x0000267c
	.long	0xa0000000,0x287c0000,0x00002008,0x02000003
	.long	0x671c0c00,0x00026700,0x00966000,0x010251fc
	.long	0x4e7ba008,0x0e911000,0x0e900000,0x6002600e
	.long	0xb082661c,0xb2836618,0x0e915800,0x6002600e
	.long	0x4e7bb008,0x0e904800,0x4e7bc008,0x6034600e
	.long	0x4e7bb008,0x0e900800,0x4e7bc008,0x6012600e
	.long	0x4e714e71,0x4e714e71,0x4e714e71,0x4e7160b0
	.long	0x4e7b6000,0x4e7b6001,0x46c751c4,0x60ffffff
	.long	0xfd424e7b,0x60004e7b,0x600146c7,0x50c460ff
	.long	0xfffffd30,0x51fc51fc,0x51fc51fc,0x51fc51fc
	.long	0x4e7ba008,0x0e911000,0x0e900000,0x6002600e
	.long	0xb082662c,0xb2836628,0x0e915800,0x6002600e
	.long	0x48440e58,0x48004e7b,0xb0084844,0x6002600e
	.long	0x0e504800,0x4e7bc008,0x6000ffa8,0x4e71600e
	.long	0x48400e58,0x08004e7b,0xb0084840,0x6002600e
	.long	0x0e500800,0x4e7bc008,0x6000ff76,0x4e71600e
	.long	0x4e714e71,0x4e714e71,0x4e714e71,0x4e716090
	.long	0x4e7ba008,0x0e911000,0x0e900000,0x6002600e
	.long	0xb082663c,0xb2836638,0x0e915800,0x6002600e
	.long	0xe19c0e18,0x48004844,0x0e584800,0x6002600e
	.long	0xe19c4e7b,0xb0080e10,0x48006004,0x4e71600e
	.long	0x4e7bc008,0x6000ff2c,0x4e714e71,0x4e71600e
	.long	0xe1980e18,0x08004840,0x0e580800,0x6002600e
	.long	0xe1984e7b,0xb0080e10,0x08006004,0x4e71600e
	.long	0x4e7bc008,0x6000feea,0x4e714e71,0x4e71600c
	.long	0x4e714e71,0x4e714e71,0x4e714e71,0x6000ff72
	.long	0x24482649,0x28482a49,0x528c528d,0x220a40c7
	.long	0x007c0700,0x4e7a6000,0x4e7b0000,0x4e7b0001
	.long	0xf58af58c,0xf58bf58d,0xf46af46c,0xf46bf46d
	.long	0x24415681,0x2841f5ca,0xf5cc247c,0x80000000
	.long	0x267ca000,0x0000287c,0x00000000,0x20080800
	.long	0x00006600,0x009a6016,0x51fc51fc,0x51fc51fc
	.long	0x4e7ba008,0x0e511000,0x0e500000,0x6002600e
	.long	0xb042661c,0xb2436618,0x0e515800,0x6002600e
	.long	0x4e7bb008,0x0e504800,0x4e7bc008,0x6034600e
	.long	0x4e7bb008,0x0e500800,0x4e7bc008,0x6012600e
	.long	0x4e714e71,0x4e714e71,0x4e714e71,0x4e7160b0
	.long	0x4e7b6000,0x4e7b6001,0x46c751c4,0x60ffffff
	.long	0xfb624e7b,0x60004e7b,0x600146c7,0x50c460ff
	.long	0xfffffb50,0x51fc51fc,0x51fc51fc,0x51fc51fc
	.long	0x4e7ba008,0x0e511000,0x0e500000,0x6002600e
	.long	0xb042662c,0xb2436628,0x0e515800,0x6002600e
	.long	0xe09c0e18,0x48004e7b,0xb008e19c,0x6002600e
	.long	0x0e104800,0x4e7bc008,0x6000ffa8,0x4e71600e
	.long	0xe0980e18,0x08004e7b,0xb008e198,0x6002600e
	.long	0x0e100800,0x4e7bc008,0x6000ff76,0x4e71600e
	.long	0x4e714e71,0x4e714e71,0x4e714e71,0x4e716090
	.long	0x4a066604,0x70016002,0x70054a07,0x660000c6
	.long	0x22482448,0x528a2602,0xe04a40c7,0x007c0700
	.long	0x4e7a6000,0x4e7b0000,0x4e7b0001,0xf589f58a
	.long	0xf469f46a,0x227c8000,0x0000247c,0xa0000000
	.long	0x267c0000,0x00006016,0x51fc51fc,0x51fc51fc
	.long	0x4e7b9008,0x0e500000,0xb0446624,0x6002600e
	.long	0x0e182800,0x4e7ba008,0x0e103800,0x6002600e
	.long	0x4e7bb008,0x604c4e71,0x4e714e71,0x4e71600e
	.long	0xe0980e18,0x08004e7b,0xa008e198,0x6002600e
	.long	0x0e100800,0x4e7bb008,0x60164e71,0x4e71600e
	.long	0x4e714e71,0x4e714e71,0x4e714e71,0x4e7160a0
	.long	0x4e7b6000,0x4e7b6001,0x46c751c1,0x60ffffff
	.long	0xfb164e7b,0x60004e7b,0x600146c7,0x50c160ff
	.long	0xfffffb04,0x22482448,0x568a2208,0x08010000
	.long	0x660000c2,0x26024842,0x40c7007c,0x07004e7a
	.long	0x60004e7b,0x00004e7b,0x0001f589,0xf58af469
	.long	0xf46a227c,0x80000000,0x247ca000,0x0000267c
	.long	0x00000000,0x601851fc,0x51fc51fc,0x51fc51fc
	.long	0x4e7b9008,0x0e900000,0xb0846624,0x6002600e
	.long	0x0e582800,0x4e7ba008,0x0e503800,0x6002600e
	.long	0x4e7bb008,0x604c4e71,0x4e714e71,0x4e71600e
	.long	0x48400e58,0x08004840,0x4e7ba008,0x6002600e
	.long	0x0e500800,0x4e7bb008,0x60164e71,0x4e71600e
	.long	0x4e714e71,0x4e714e71,0x4e714e71,0x4e7160a0
	.long	0x4e7b6000,0x4e7b6001,0x46c751c1,0x60ffffff
	.long	0xfa464e7b,0x60004e7b,0x600146c7,0x50c160ff
	.long	0xfffffa34,0x2a02e08a,0x26024842,0x40c7007c
	.long	0x07004e7a,0x60004e7b,0x00004e7b,0x0001f589
	.long	0xf58af469,0xf46a227c,0x80000000,0x247ca000
	.long	0x0000267c,0x00000000,0x601451fc,0x51fc51fc
	.long	0x4e7b9008,0x0e900000,0xb0846624,0x6002600e
	.long	0x0e182800,0x0e583800,0x4e7ba008,0x6002600e
	.long	0x0e105800,0x4e7bb008,0x6000ff88,0x4e71600e
	.long	0xe1980e18,0x08004840,0x0e580800,0x6002600e
	.long	0xe1984e7b,0xa0080e10,0x08006004,0x4e71600e
	.long	0x4e7bb008,0x6000ff4a,0x4e714e71,0x4e71600e
	.long	0x4e714e71,0x4e714e71,0x4e714e71,0x4e716090
	dc.l	$60ff0000,$005c5465,$7374696e,$67203638
	dc.l	$30363020,$49535020,$73746172,$7465643a
	dc.l	$0a007061,$73736564,$0a002066,$61696c65
	dc.l	$640a0000,$4a80660e,$487affe8,$61ff0000
	dc.l	$4f9a588f,$4e752f01,$61ff0000,$4fa4588f
	dc.l	$487affd8,$61ff0000,$4f82588f,$4e754e56
	dc.l	$ff6048e7,$3f3c487a,$ff9e61ff,$00004f6c
	dc.l	$588f42ae,$ff78487b,$01700000,$00ea61ff
	dc.l	$00004f58,$588f61ff,$000000f0,$61ffffff
	dc.l	$ffa642ae,$ff78487b,$01700000,$0af661ff
	dc.l	$00004f38,$588f61ff,$00000af8,$61ffffff
	dc.l	$ff8642ae,$ff78487b,$01700000,$179c61ff
	dc.l	$00004f18,$588f61ff,$0000179c,$61ffffff
	dc.l	$ff6642ae,$ff78487b,$01700000,$038661ff
	dc.l	$00004ef8,$588f61ff,$00000380,$61ffffff
	dc.l	$ff4642ae,$ff78487b,$01700000,$202c61ff
	dc.l	$00004ed8,$588f2d7c,$00000002,$ff7461ff
	dc.l	$0000202c,$61ffffff,$ff1e42ae,$ff78487b
	dc.l	$01700000,$0d7c61ff,$00004eb0,$588f61ff
	dc.l	$00000d74,$61ffffff,$fefe42ae,$ff78487b
	dc.l	$01700000,$0f8e61ff,$00004e90,$588f61ff
	dc.l	$00000f88,$61ffffff,$fede4cdf,$3cfc4e5e
	dc.l	$4e750936,$342d6269,$74206d75,$6c746970
	dc.l	$6c792e2e,$2e0051fc,$52aeff78,$4cfb3fff
	dc.l	$01700000,$4e184281,$243c9999,$9999263c
	dc.l	$88888888,$3d7c0004,$ff7c44fc,$000048ee
	dc.l	$7fffff80,$4c013402,$42eeff7e,$48ee7fff
	dc.l	$ffc042ae,$ff8842ae,$ff8c61ff,$00004da6
	dc.l	$4a0066ff,$00004dcc,$52aeff78,$4cfb3fff
	dc.l	$01700000,$4dc8223c,$77777777,$243c9999
	dc.l	$99997600,$3d7c0004,$ff7c44fc,$000048ee
	dc.l	$7fffff80,$4c013402,$42eeff7e,$48ee7fff
	dc.l	$ffc042ae,$ff8842ae,$ff8c61ff,$00004d56
	dc.l	$4a0066ff,$00004d7c,$52aeff78,$4cfb3fff
	dc.l	$01700000,$4d787210,$243c6666,$66663d7c
	dc.l	$0000ff7c,$44fc0000,$48ee7fff,$ff804c01
	dc.l	$240242ee,$ff7e48ee,$7fffffc0,$2d7c0000
	dc.l	$0006ff88,$61ff0000,$4d0c4a00,$66ff0000
	dc.l	$4d3252ae,$ff784cfb,$3fff0170,$00004d2e
	dc.l	$223c5555,$55557400,$76033d7c,$0000ff7c
	dc.l	$44fc0000,$48ee7fff,$ff804c01,$340242ee
	dc.l	$ff7e48ee,$7fffffc0,$2d7c0000,$0000ff88
	dc.l	$2d7cffff,$ffffff8c,$61ff0000,$4cb84a00
	dc.l	$66ff0000,$4cde52ae,$ff784cfb,$3fff0170
	dc.l	$00004cda,$223c4000,$00007400,$76043d7c
	dc.l	$0000ff7c,$44fc0000,$48ee7fff,$ff804c01
	dc.l	$340242ee,$ff7e48ee,$7fffffc0,$2d7c0000
	dc.l	$0001ff88,$2d7c0000,$0000ff8c,$61ff0000
	dc.l	$4c644a00,$66ff0000,$4c8a52ae,$ff784cfb
	dc.l	$3fff0170,$00004c86,$72ff7400,$76ff3d7c
	dc.l	$0008ff7c,$44fc0000,$48ee7fff,$ff804c01
	dc.l	$340242ee,$ff7e48ee,$7fffffc0,$2d7cffff
	dc.l	$fffeff88,$2d7c0000,$0001ff8c,$61ff0000
	dc.l	$4c144a00,$66ff0000,$4c3a52ae,$ff784cfb
	dc.l	$3fff0170,$00004c36,$223c8000,$00007400
	dc.l	$76ff3d7c,$0000ff7c,$44fc0000,$48ee7fff
	dc.l	$ff804c01,$3c0242ee,$ff7e48ee,$7fffffc0
	dc.l	$2d7c0000,$0000ff88,$2d7c8000,$0000ff8c
	dc.l	$61ff0000,$4bc04a00,$66ff0000,$4be652ae
	dc.l	$ff784cfb,$3fff0170,$00004be2,$223c8000
	dc.l	$00007400,$76013d7c,$0008ff7c,$44fc0000
	dc.l	$48ee7fff,$ff804c01,$3c0242ee,$ff7e48ee
	dc.l	$7fffffc0,$2d7cffff,$ffffff88,$2d7c8000
	dc.l	$0000ff8c,$61ff0000,$4b6c4a00,$66ff0000
	dc.l	$4b9252ae,$ff784cfb,$3fff0170,$00004b8e
	dc.l	$72017400,$263c8000,$00003d7c,$0008ff7c
	dc.l	$44fc0000,$48ee7fff,$ff804c01,$3c0242ee
	dc.l	$ff7e48ee,$7fffffc0,$2d7cffff,$ffffff88
	dc.l	$2d7c8000,$0000ff8c,$61ff0000,$4b184a00
	dc.l	$66ff0000,$4b3e222e,$ff784280,$4e75096d
	dc.l	$6f766570,$2e2e2e00,$52aeff78,$4cfb3fff
	dc.l	$01700000,$4b2841ee,$ff60303c,$aaaa4228
	dc.l	$00004228,$00023d7c,$001fff7c,$44fc001f
	dc.l	$48ee7fff,$ff800188,$000042ee,$ff7e48ee
	dc.l	$7fffffc0,$12280002,$e1491228,$0000b041
	dc.l	$66ff0000,$4ade61ff,$00004aaa,$4a0066ff
	dc.l	$00004ad0,$52aeff78,$4cfb3fff,$01700000
	dc.l	$4acc41ee,$ff64303c,$aaaa42a8,$fffc4290
	dc.l	$42a80004,$3d7c001f,$ff7c44fc,$001f48ee
	dc.l	$7fffff80,$01880000,$42eeff7e,$48ee7fff
	dc.l	$ffc04aa8,$fffc66ff,$00004a88,$4aa80004
	dc.l	$66ff0000,$4a7e0c90,$aa00aa00,$66ff0000
	dc.l	$4a7261ff,$00004a3e,$4a0066ff,$00004a64
	dc.l	$52aeff78,$4cfb3fff,$01700000,$4a6041ee
	dc.l	$ff60303c,$aaaa4228,$00004228,$00023d7c
	dc.l	$0000ff7c,$44fc0000,$48ee7fff,$ff800188
	dc.l	$000042ee,$ff7e48ee,$7fffffc0,$12280002
	dc.l	$e1491228,$0000b041,$66ff0000,$4a1661ff
	dc.l	$000049e2,$4a0066ff,$00004a08,$52aeff78
	dc.l	$4cfb3fff,$01700000,$4a0441ee,$ff60117c
	dc.l	$00aa0000,$117c00aa,$00023d7c,$001fff7c
	dc.l	$44fc001f,$48ee7fff,$ff800108,$000042ee
	dc.l	$ff7e48ee,$7fffffc0,$3d7caaaa,$ff82323c
	dc.l	$aaaab041,$66ff0000,$49ba61ff,$00004986
	dc.l	$4a0066ff,$000049ac,$52aeff78,$4cfb3fff
	dc.l	$01700000,$49a841ee,$ff60203c,$aaaaaaaa
	dc.l	$42280000,$42280002,$42280004,$42280006
	dc.l	$3d7c001f,$ff7c44fc,$001f48ee,$7fffff80
	dc.l	$01c80000,$42eeff7e,$48ee7fff,$ffc01228
	dc.l	$0006e189,$12280004,$e1891228,$0002e189
	dc.l	$12280000,$b08166ff,$00004948,$61ff0000
	dc.l	$49144a00,$66ff0000,$493a52ae,$ff784cfb
	dc.l	$3fff0170,$00004936,$41eeff64,$203caaaa
	dc.l	$aaaa42a8,$fffc4290,$42a80004,$42a80008
	dc.l	$3d7c001f,$ff7c44fc,$001f48ee,$7fffff80
	dc.l	$01c80000,$42eeff7e,$48ee7fff,$ffc04aa8
	dc.l	$fffc66ff,$000048ec,$4aa80008,$66ff0000
	dc.l	$48e20c90,$aa00aa00,$66ff0000,$48d60ca8
	dc.l	$aa00aa00,$000466ff,$000048c8,$61ff0000
	dc.l	$48944a00,$66ff0000,$48ba52ae,$ff784cfb
	dc.l	$3fff0170,$000048b6,$41eeff60,$117c00aa
	dc.l	$0000117c,$00aa0002,$117c00aa,$0004117c
	dc.l	$00aa0006,$3d7c001f,$ff7c44fc,$001f48ee
	dc.l	$7fffff80,$01480000,$42eeff7e,$48ee7fff
	dc.l	$ffc02d7c,$aaaaaaaa,$ff80223c,$aaaaaaaa
	dc.l	$b08166ff,$0000485c,$61ff0000,$48284a00
	dc.l	$66ff0000,$484e52ae,$ff784cfb,$3fff0170
	dc.l	$0000484a,$41eeff60,$3e3caaaa,$42280000
	dc.l	$42280002,$3d7c001f,$ff7c44fc,$001f48ee
	dc.l	$7fffff80,$0f880000,$42eeff7e,$48ee7fff
	dc.l	$ffc01228,$0002e149,$12280000,$be4166ff
	dc.l	$00004800,$61ff0000,$47cc4a00,$66ff0000
	dc.l	$47f252ae,$ff784cfb,$3fff0170,$000047ee
	dc.l	$41eeff60,$117c00aa,$0000117c,$00aa0002
	dc.l	$3d7c001f,$ff7c44fc,$001f48ee,$7fffff80
	dc.l	$0f080000,$42eeff7e,$48ee7fff,$ffc03d7c
	dc.l	$aaaaff9e,$323caaaa,$be4166ff,$000047a4
	dc.l	$61ff0000,$47704a00,$66ff0000,$479652ae
	dc.l	$ff784cfb,$3fff0170,$00004792,$41eeff60
	dc.l	$303caaaa,$42280000,$42280002,$3d7c001f
	dc.l	$ff7c44fc,$001f48ee,$7fffff80,$01880000
	dc.l	$42eeff7e,$48ee7fff,$ffc01228,$0002e149
	dc.l	$12280000,$b04166ff,$00004748,$61ff0000
	dc.l	$47144a00,$66ff0000,$473a52ae,$ff784cfb
	dc.l	$3fff0170,$00004736,$41eeff60,$303caaaa
	dc.l	$42280008,$4228000a,$3d7c001f,$ff7c44fc
	dc.l	$001f48ee,$7fffff80,$01880008,$42eeff7e
	dc.l	$48ee7fff,$ffc01228,$000ae149,$12280008
	dc.l	$b04166ff,$000046ec,$61ff0000,$46b84a00
	dc.l	$66ff0000,$46de52ae,$ff784cfb,$3fff0170
	dc.l	$000046da,$41eeff60,$117c00aa,$0008117c
	dc.l	$00aa000a,$3d7c001f,$ff7c44fc,$001f48ee
	dc.l	$7fffff80,$01080008,$42eeff7e,$48ee7fff
	dc.l	$ffc03d7c,$aaaaff82,$323caaaa,$b04166ff
	dc.l	$00004690,$61ff0000,$465c4a00,$66ff0000
	dc.l	$468252ae,$ff784cfb,$3fff0170,$0000467e
	dc.l	$41eeff60,$203caaaa,$aaaa4228,$00084228
	dc.l	$000a4228,$000c4228,$000e3d7c,$001fff7c
	dc.l	$44fc001f,$48ee7fff,$ff8001c8,$000842ee
	dc.l	$ff7e48ee,$7fffffc0,$1228000e,$e1891228
	dc.l	$000ce189,$1228000a,$e1891228,$0008b081
	dc.l	$66ff0000,$461e61ff,$000045ea,$4a0066ff
	dc.l	$00004610,$52aeff78,$4cfb3fff,$01700000
	dc.l	$460c41ee,$ff60117c,$00aa0008,$117c00aa
	dc.l	$000a117c,$00aa000c,$117c00aa,$000e3d7c
	dc.l	$001fff7c,$44fc001f,$48ee7fff,$ff800148
	dc.l	$000842ee,$ff7e48ee,$7fffffc0,$2d7caaaa
	dc.l	$aaaaff80,$223caaaa,$aaaab081,$66ff0000
	dc.l	$45b261ff,$0000457e,$4a0066ff,$000045a4
	dc.l	$52aeff78,$4cfb3fff,$01700000,$45a041ee
	dc.l	$ff68303c,$aaaa4228,$fff84228,$fffa3d7c
	dc.l	$001fff7c,$44fc001f,$48ee7fff,$ff800188
	dc.l	$fff842ee,$ff7e48ee,$7fffffc0,$1228fffa
	dc.l	$e1491228,$fff8b041,$66ff0000,$455661ff
	dc.l	$00004522,$4a0066ff,$00004548,$52aeff78
	dc.l	$4cfb3fff,$01700000,$454441ee,$ff68117c
	dc.l	$00aafff8,$117c00aa,$fffa3d7c,$001fff7c
	dc.l	$44fc001f,$48ee7fff,$ff800108,$fff842ee
	dc.l	$ff7e48ee,$7fffffc0,$3d7caaaa,$ff82323c
	dc.l	$aaaab041,$66ff0000,$44fa61ff,$000044c6
	dc.l	$4a0066ff,$000044ec,$52aeff78,$4cfb3fff
	dc.l	$01700000,$44e841ee,$ff68203c,$aaaaaaaa
	dc.l	$4228fff8,$4228fffa,$4228fffc,$42280000
	dc.l	$3d7c001f,$ff7c44fc,$001f48ee,$7fffff80
	dc.l	$01c8fff8,$42eeff7e,$48ee7fff,$ffc01228
	dc.l	$fffee189,$1228fffc,$e1891228,$fffae189
	dc.l	$1228fff8,$b08166ff,$00004488,$61ff0000
	dc.l	$44544a00,$66ff0000,$447a52ae,$ff784cfb
	dc.l	$3fff0170,$00004476,$41eeff68,$117c00aa
	dc.l	$fff8117c,$00aafffa,$117c00aa,$fffc117c
	dc.l	$00aa0000,$3d7c001f,$ff7c44fc,$001f48ee
	dc.l	$7fffff80,$0148fff8,$42eeff7e,$48ee7fff
	dc.l	$ffc02d7c,$aaaaaaaa,$ff80223c,$aaaaaaaa
	dc.l	$b08166ff,$0000441c,$61ff0000,$43e84a00
	dc.l	$66ff0000,$440e222e,$ff784280,$4e750936
	dc.l	$342d6269,$74206469,$76696465,$2e2e2e00
	dc.l	$52aeff78,$52aeff78,$4cfb3fff,$01700000
	dc.l	$43ec7201,$74007600,$3d7c0014,$ff7c44fc
	dc.l	$001f48ee,$7fffff80,$4c413402,$42eeff7e
	dc.l	$48ee7fff,$ffc061ff,$0000438a,$4a0066ff
	dc.l	$000043b0,$52aeff78,$4cfb3fff,$01700000
	dc.l	$43ac223c,$44444444,$7400263c,$55555555
	dc.l	$3d7c0010,$ff7c44fc,$001f48ee,$7fffff80
	dc.l	$4c413402,$42eeff7e,$48ee7fff,$ffc02d7c
	dc.l	$11111111,$ff882d7c,$00000001,$ff8c61ff
	dc.l	$00004332,$4a0066ff,$00004358,$52aeff78
	dc.l	$4cfb3fff,$01700000,$4354223c,$55555555
	dc.l	$7400263c,$44444444,$3d7c0014,$ff7c44fc
	dc.l	$001f48ee,$7fffff80,$4c413402,$42eeff7e
	dc.l	$48ee7fff,$ffc02d7c,$44444444,$ff882d7c
	dc.l	$00000000,$ff8c61ff,$000042da,$4a0066ff
	dc.l	$00004300,$52aeff78,$4cfb3fff,$01700000
	dc.l	$42fc223c,$11111111,$243c4444,$4444263c
	dc.l	$44444444,$3d7c001e,$ff7c44fc,$001d48ee
	dc.l	$7fffff80,$4c413402,$42eeff7e,$48ee7fff
	dc.l	$ffc061ff,$0000428e,$4a0066ff,$000042b4
	dc.l	$52aeff78,$4cfb3fff,$01700000,$42b072fe
	dc.l	$74017602,$3d7c001e,$ff7c44fc,$001d48ee
	dc.l	$7fffff80,$4c413c02,$42eeff7e,$48ee7fff
	dc.l	$ffc061ff,$0000424e,$4a0066ff,$00004274
	dc.l	$52aeff78,$4cfb3fff,$01700000,$427072fe
	dc.l	$74017600,$3d7c0018,$ff7c44fc,$001d48ee
	dc.l	$7fffff80,$4c413c02,$42eeff7e,$48ee7fff
	dc.l	$ffc02d7c,$00000000,$ff882d7c,$80000000
	dc.l	$ff8c61ff,$000041fe,$4a0066ff,$00004224
	dc.l	$52aeff78,$4cfb3fff,$01700000,$42207202
	dc.l	$74017600,$3d7c001e,$ff7c44fc,$001d48ee
	dc.l	$7fffff80,$4c413c02,$42eeff7e,$48ee7fff
	dc.l	$ffc061ff,$000041be,$4a0066ff,$000041e4
	dc.l	$52aeff78,$4cfb3fff,$01700000,$41e072ff
	dc.l	$74fe76ff,$3d7c0008,$ff7c44fc,$000048ee
	dc.l	$7fffff80,$4c413402,$42eeff7e,$48ee7fff
	dc.l	$ffc061ff,$0000417e,$4a0066ff,$000041a4
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	dc.l	$48eeffff,$ff804c3b,$34024522,$ff801000
	dc.l	$42eeff7e,$48eeffff,$ffc02d7c,$00000004
	dc.l	$ff8c61ff,$000008ae,$4a0066ff,$000008d4
	dc.l	$52aeff78,$4cfb3fff,$01700000,$08d04282
	dc.l	$760247fa,$ef7449fa,$ff70288b,$78fe3d7c
	dc.l	$0000ff7c,$44fc0000,$48eeffff,$ff804c3b
	dc.l	$34024722,$ff801000,$42eeff7e,$48eeffff
	dc.l	$ffc02d7c,$00000004,$ff8c61ff,$00000856
	dc.l	$4a0066ff,$0000087c,$52aeff78,$4cfb3fff
	dc.l	$01700000,$08784282,$760247fa,$ef7449fa
	dc.l	$ff70288b,$78f03d7c,$0000ff7c,$44fc0000
	dc.l	$48eeffff,$ff804c3b,$34024922,$ff801000
	dc.l	$42eeff7e,$48eeffff,$ffc02d7c,$00000004
	dc.l	$ff8c61ff,$000007fe,$4a0066ff,$00000824
	dc.l	$52aeff78,$4cfb3fff,$01700000,$08204282
	dc.l	$760247fa,$ef7449fa,$ff70288b,$78f83d7c
	dc.l	$0000ff7c,$44fc0000,$48eeffff,$ff804c3b
	dc.l	$34024b22,$ff801000,$42eeff7e,$48eeffff
	dc.l	$ffc02d7c,$00000004,$ff8c61ff,$000007a6
	dc.l	$4a0066ff,$000007cc,$52aeff78,$4cfb3fff
	dc.l	$01700000,$07c84282,$760247fa,$ef7449fa
	dc.l	$ff70288b,$78fc3d7c,$0000ff7c,$44fc0000
	dc.l	$48eeffff,$ff804c3b,$34024d22,$ff801000
	dc.l	$42eeff7e,$48eeffff,$ffc02d7c,$00000004
	dc.l	$ff8c61ff,$0000074e,$4a0066ff,$00000774
	dc.l	$52aeff78,$4cfb3fff,$01700000,$07704282
	dc.l	$760247fa,$ef7449fa,$ff70288b,$78fe3d7c
	dc.l	$0000ff7c,$44fc0000,$48eeffff,$ff804c3b
	dc.l	$34024f22,$ff801000,$42eeff7e,$48eeffff
	dc.l	$ffc02d7c,$00000004,$ff8c61ff,$000006f6
	dc.l	$4a0066ff,$0000071c,$52aeff78,$4cfb3fff
	dc.l	$01700000,$07184282,$760247fa,$ef7449fa
	dc.l	$ff70288b,$78fe3d7c,$0000ff7c,$44fc0000
	dc.l	$48eeffff,$ff804c3b,$34024f33,$ffffff80
	dc.l	$00001000,$42eeff7e,$48eeffff,$ffc02d7c
	dc.l	$00000004,$ff8c61ff,$0000069a,$4a0066ff
	dc.l	$000006c0,$52aeff78,$4cfb3fff,$01700000
	dc.l	$06bc4282,$760247fa,$ef7449fa,$ff70288b
	dc.l	$78fe3d7c,$0000ff7c,$44fc0000,$48eeffff
	dc.l	$ff804c3b,$34020773,$ffffff70,$00001000
	dc.l	$42eeff7e,$48eeffff,$ffc02d7c,$00000004
	dc.l	$ff8c61ff,$0000063e,$4a0066ff,$00000664
	dc.l	$52aeff78,$4cfb3fff,$01700000,$06604282
	dc.l	$760247fa,$ef7449fa,$ff70288b,$280c3d7c
	dc.l	$0000ff7c,$44fc0000,$48eeffff,$ff804c30
	dc.l	$34024993,$00001000,$42eeff7e,$48eeffff
	dc.l	$ffc02d7c,$00000004,$ff8c61ff,$000005e6
	dc.l	$4a0066ff,$0000060c,$52aeff78,$4cfb3fff
	dc.l	$01700000,$06084282,$760247fa,$ef7449fa
	dc.l	$ff70288b,$78f0d88c,$3d7c0000,$ff7c44fc
	dc.l	$000048ee,$ffffff80,$4c303402,$49b30000
	dc.l	$00100000,$100042ee,$ff7e48ee,$ffffffc0
	dc.l	$2d7c0000,$0004ff8c,$61ff0000,$05884a00
	dc.l	$66ff0000,$05ae52ae,$ff784282,$760247fa
	dc.l	$ff7449fa,$ff70288b,$78f03d7c,$0000ff7c
	dc.l	$44fc0000,$48eeffff,$ff804c30,$340201f1
	dc.l	$ffffff70,$42eeff7e,$48eeffff,$ffc02d7c
	dc.l	$00000004,$ff8c61ff,$0000053a,$4a0066ff
	dc.l	$00000560,$52aeff78,$4cfb3fff,$01700000
	dc.l	$055c4282,$760247fa,$0f7449fa,$ff70288b
	dc.l	$2c7c0000,$00023d7c,$0000ff7c,$44fc0000
	dc.l	$48eeffff,$ff804c3b,$3402ef22,$ff60f000
	dc.l	$42eeff7e,$48eeffff,$ffc02d7c,$00000004
	dc.l	$ff8c61ff,$000004de,$4a0066ff,$00000504
	dc.l	$52aeff78,$4cfb3fff,$01700000,$0500204f
	dc.l	$42827602,$47fa0f74,$49faff70,$288b2e7c
	dc.l	$00000002,$3d7c0000,$ff7c44fc,$000048ee
	dc.l	$ffffff80,$4c3b3402,$ff22ff60,$f00042ee
	dc.l	$ff7e48ee,$ffffffc0,$2d7c0000,$0004ff8c
	dc.l	$2e4861ff,$0000047e,$4a0066ff,$000004a4
	dc.l	$52aeff78,$4cfb3fff,$01700000,$04a04282
	dc.l	$760247fa,$ff5449fa,$ff70288b,$99fc0000
	dc.l	$00107810,$3d7c0000,$ff7c44fc,$000048ee
	dc.l	$ffffff80,$4c3b3402,$4126ff70,$001042ee
	dc.l	$ff7e48ee,$ffffffc0,$2d7c0000,$0004ff8c
	dc.l	$61ff0000,$04204a00,$66ff0000,$044652ae
	dc.l	$ff784cfb,$3fff0170,$00000442,$42827602
	dc.l	$47faff54,$49faff70,$288b99fc,$00000010
	dc.l	$78083d7c,$0000ff7c,$44fc0000,$48eeffff
	dc.l	$ff804c3b,$34024326,$ff700010,$42eeff7e
	dc.l	$48eeffff,$ffc02d7c,$00000004,$ff8c61ff
	dc.l	$000003c2,$4a0066ff,$000003e8,$52aeff78
	dc.l	$4cfb3fff,$01700000,$03e44282,$760247fa
	dc.l	$ff5449fa,$ff70288b,$99fc0000,$00107804
	dc.l	$3d7c0000,$ff7c44fc,$000048ee,$ffffff80
	dc.l	$4c3b3402,$4526ff70,$001042ee,$ff7e48ee
	dc.l	$ffffffc0,$2d7c0000,$0004ff8c,$61ff0000
	dc.l	$03644a00,$66ff0000,$038a52ae,$ff784cfb
	dc.l	$3fff0170,$00000386,$42827602,$47faff54
	dc.l	$49faff70,$288b99fc,$00000010,$78023d7c
	dc.l	$0000ff7c,$44fc0000,$48eeffff,$ff804c3b
	dc.l	$34024726,$ff700010,$42eeff7e,$48eeffff
	dc.l	$ffc02d7c,$00000004,$ff8c61ff,$00000306
	dc.l	$4a0066ff,$0000032c,$52aeff78,$4cfb3fff
	dc.l	$01700000,$03284282,$760247fa,$ff5449fa
	dc.l	$ff70288b,$99fc0000,$00107810,$3d7c0000
	dc.l	$ff7c44fc,$000048ee,$ffffff80,$4c3b3402
	dc.l	$4926ff70,$001042ee,$ff7e48ee,$ffffffc0
	dc.l	$2d7c0000,$0004ff8c,$61ff0000,$02a84a00
	dc.l	$66ff0000,$02ce52ae,$ff784cfb,$3fff0170
	dc.l	$000002ca,$42827602,$47faff54,$49faff70
	dc.l	$288b99fc,$00000010,$78083d7c,$0000ff7c
	dc.l	$44fc0000,$48eeffff,$ff804c3b,$34024326
	dc.l	$ff700010,$42eeff7e,$48eeffff,$ffc02d7c
	dc.l	$00000004,$ff8c61ff,$0000024a,$4a0066ff
	dc.l	$00000270,$52aeff78,$4cfb3fff,$01700000
	dc.l	$026c4282,$760247fa,$ff5449fa,$ff70288b
	dc.l	$99fc0000,$00107804,$3d7c0000,$ff7c44fc
	dc.l	$000048ee,$ffffff80,$4c3b3402,$4d26ff70
	dc.l	$001042ee,$ff7e48ee,$ffffffc0,$2d7c0000
	dc.l	$0004ff8c,$61ff0000,$01ec4a00,$66ff0000
	dc.l	$021252ae,$ff784cfb,$3fff0170,$0000020e
	dc.l	$42827602,$47faff54,$49faff70,$288b99fc
	dc.l	$00000010,$78023d7c,$0000ff7c,$44fc0000
	dc.l	$48eeffff,$ff804c3b,$34024f26,$ff700010
	dc.l	$42eeff7e,$48eeffff,$ffc02d7c,$00000004
	dc.l	$ff8c61ff,$0000018e,$4a0066ff,$000001b4
	dc.l	$52aeff78,$4cfb3fff,$01700000,$01b04282
	dc.l	$760247fa,$ff5449fa,$ff70288b,$99fc0000
	dc.l	$00107802,$3d7c0000,$ff7c44fc,$000048ee
	dc.l	$ffffff80,$4c3b3402,$4f37ffff,$ff700000
	dc.l	$001042ee,$ff7e48ee,$ffffffc0,$2d7c0000
	dc.l	$0004ff8c,$61ff0000,$012c4a00,$66ff0000
	dc.l	$015252ae,$ff784cfb,$3fff0170,$0000014e
	dc.l	$42827602,$47faff54,$49faff70,$288b7802
	dc.l	$3d7c0000,$ff7c44fc,$000048ee,$ffffff80
	dc.l	$4c3b3402,$0773ffff,$ff700000,$002042ee
	dc.l	$ff7e48ee,$ffffffc0,$2d7c0000,$0004ff8c
	dc.l	$61ff0000,$00d04a00,$66ff0000,$00f652ae
	dc.l	$ff784cfb,$3fff0170,$000000f2,$42827602
	dc.l	$47faff54,$49faff70,$288b7804,$3d7c0000
	dc.l	$ff7c44fc,$000048ee,$ffffff80,$4c303402
	dc.l	$4fb5ffff,$ff7042ee,$ff7e48ee,$ffffffc0
	dc.l	$2d7c0000,$0004ff8c,$61ff0000,$00784a00
	dc.l	$66ff0000,$009e52ae,$ff784cfb,$3fff0170
	dc.l	$0000009a,$204f4282,$760247fa,$ff744dfa
	dc.l	$ff702c8b,$ddfc0000,$00102e7c,$fffffffe
	dc.l	$3d7c0000,$ff7c44fc,$000048ee,$ffffff80
	dc.l	$4c3b3402,$ff27ff70,$00000010,$42eeff7e
	dc.l	$48eeffff,$ffc02d7c,$00000004,$ff8c2e48
	dc.l	$61ff0000,$00104a00,$66ff0000,$00364280
	dc.l	$4e7541ee,$ff8043ee,$ffc0700e,$b18966ff
	dc.l	$0000001c,$51c8fff6,$302eff7c,$322eff7e
	dc.l	$b04166ff,$00000008,$42804e75,$70014e75
	dc.l	$222eff78,$70014e75,$acacacac,$acacacac
	dc.l	$acacacac,$acacacac,$acacacac,$acacacac
	dc.l	$acacacac,$acacacac,$acacacac,$acacacac
	dc.l	$acacacac,$acacacac,$acacacac,$acacacac
	dc.l	$acacacac,$acacacac,$2f00203a,$afa4487b
	dc.l	$0930ffff,$afa0202f,$00044e74,$00042f00
	dc.l	$203aaf92,$487b0930,$ffffaf8a,$202f0004
	dc.l	$4e740004,$00000000,$00000000,$00000000
|~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
|MOTOROLA MICROPROCESSOR & MEMORY TECHNOLOGY GROUP
|M68000 Hi-Performance Microprocessor Division
|M68060 Software Package
|Production Release P1.00 -- October 10, 1994
|
|M68060 Software Package Copyright � 1993, 1994 Motorola Inc.  All rights reserved.
| 
|THE SOFTWARE is provided on an "AS IS" basis and without warranty.
|To the maximum extent permitted by applicable law,
|MOTOROLA DISCLAIMS ALL WARRANTIES WHETHER EXPRESS OR IMPLIED, 
|INCLUDING IMPLIED WARRANTIES OF MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE
|and any warranty against infringement with regard to the SOFTWARE
|(INCLUDING ANY MODIFIED VERSIONS THEREOF) and any accompanying written materials.
|
|To the maximum extent permitted by applicable law,
|IN NO EVENT SHALL MOTOROLA BE LIABLE FOR ANY DAMAGES WHATSOEVER
|(INCLUDING WITHOUT LIMITATION, DAMAGES FOR LOSS OF BUSINESS PROFITS,
|BUSINESS INTERRUPTION, LOSS OF BUSINESS INFORMATION, OR OTHER PECUNIARY LOSS)
|ARISING OF THE USE OR INABILITY TO USE THE SOFTWARE.
|Motorola assumes no responsibility for the maintenance and support of the SOFTWARE.
|
|You are hereby granted a copyright license to use, modify, and distribute the SOFTWARE
|so long as this entire notice is retained without alteration in any modified and/or
|redistributed versions, and that such modified versions are clearly identified as such.
|No licenses are granted by implication, estoppel or otherwise under any patents
|or trademarks of Motorola, Inc.
|~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
| os.s
|
| This file contains:
|	- example "Call-Out"s required by both the ISP and FPSP.
|

#include <linux/linkage.h>

|################################
| EXAMPLE CALL-OUTS 		#
| 				#
| _060_dmem_write()		#
| _060_dmem_read()		#
| _060_imem_read()		#
| _060_dmem_read_byte()		#
| _060_dmem_read_word()		#
| _060_dmem_read_long()		#
| _060_imem_read_word()		#
| _060_imem_read_long()		#
| _060_dmem_write_byte()	#
| _060_dmem_write_word()	#
| _060_dmem_write_long()	#
|				#
| _060_real_trace()		#
| _060_real_access()		#
|################################

| 
| Each IO routine checks to see if the memory write/read is to/from user
| or supervisor application space. The examples below use simple "move"
| instructions for supervisor mode applications and call _copyin()/_copyout()
| for user mode applications.
| When installing the 060SP, the _copyin()/_copyout() equivalents for a 
| given operating system should be substituted.
|
| The addresses within the 060SP are guaranteed to be on the stack.
| The result is that Unix processes are allowed to sleep as a consequence
| of a page fault during a _copyout.
|
| Linux/68k: The _060_[id]mem_{read,write}_{byte,word,long} functions
| (i.e. all the known length <= 4) are implemented by single moves
| statements instead of (more expensive) copy{in,out} calls, if
| working in user space

|
| _060_dmem_write():
|
| Writes to data memory while in supervisor mode.
|
| INPUTS:
|	a0 - supervisor source address	
|	a1 - user destination address
|	d0 - number of bytes to write	
| 	0x4(%a6),bit5 - 1 = supervisor mode, 0 = user mode
| OUTPUTS:
|	d1 - 0 = success, !0 = failure
|
	.global		_060_dmem_write
_060_dmem_write:
	subq.l		#1,%d0
	btst		#0x5,0x4(%a6)		| check for supervisor state
	beqs		user_write
super_write:
	move.b		(%a0)+,(%a1)+		| copy 1 byte
	dbra		%d0,super_write		| quit if --ctr < 0
	clr.l		%d1			| return success
	rts
user_write:
	move.b		(%a0)+,%d1		| copy 1 byte
copyoutae:
	movs.b		%d1,(%a1)+
	dbra		%d0,user_write		| quit if --ctr < 0
	clr.l		%d1			| return success
	rts

|
| _060_imem_read(), _060_dmem_read():
|
| Reads from data/instruction memory while in supervisor mode.
|
| INPUTS:
|	a0 - user source address
|	a1 - supervisor destination address
|	d0 - number of bytes to read
| 	0x4(%a6),bit5 - 1 = supervisor mode, 0 = user mode
| OUTPUTS:
|	d1 - 0 = success, !0 = failure
|
	.global 		_060_imem_read
	.global		_060_dmem_read
_060_imem_read:
_060_dmem_read:
	subq.l		#1,%d0
	btst		#0x5,0x4(%a6)		| check for supervisor state
	beqs		user_read
super_read:
	move.b		(%a0)+,(%a1)+		| copy 1 byte
	dbra		%d0,super_read		| quit if --ctr < 0
	clr.l		%d1			| return success
	rts
user_read:
copyinae:
	movs.b		(%a0)+,%d1
	move.b		%d1,(%a1)+		| copy 1 byte
	dbra		%d0,user_read		| quit if --ctr < 0
	clr.l		%d1			| return success
	rts

|
| _060_dmem_read_byte():
| 
| Read a data byte from user memory.
|
| INPUTS:
|	a0 - user source address
| 	0x4(%a6),bit5 - 1 = supervisor mode, 0 = user mode
| OUTPUTS:
|	d0 - data byte in d0
|	d1 - 0 = success, !0 = failure
|
	.global 		_060_dmem_read_byte
_060_dmem_read_byte:
	clr.l		%d0			| clear whole longword
	clr.l		%d1			| assume success
	btst		#0x5,0x4(%a6)		| check for supervisor state
	bnes		dmrbs			| supervisor
dmrbuae:movs.b		(%a0),%d0		| fetch user byte
	rts
dmrbs:	move.b		(%a0),%d0		| fetch super byte
	rts

|
| _060_dmem_read_word():
| 
| Read a data word from user memory.
|
| INPUTS:
|	a0 - user source address
| 	0x4(%a6),bit5 - 1 = supervisor mode, 0 = user mode
| OUTPUTS:
|	d0 - data word in d0
|	d1 - 0 = success, !0 = failure
|
| _060_imem_read_word():
| 
| Read an instruction word from user memory.
|
| INPUTS:
|	a0 - user source address
| 	0x4(%a6),bit5 - 1 = supervisor mode, 0 = user mode
| OUTPUTS:
|	d0 - instruction word in d0
|	d1 - 0 = success, !0 = failure
|
	.global 		_060_dmem_read_word
	.global 		_060_imem_read_word
_060_dmem_read_word:
_060_imem_read_word:
	clr.l		%d1			| assume success
	clr.l		%d0			| clear whole longword
	btst		#0x5,0x4(%a6)		| check for supervisor state
	bnes		dmrws			| supervisor
dmrwuae:movs.w		(%a0), %d0		| fetch user word
	rts
dmrws:	move.w		(%a0), %d0		| fetch super word
	rts

|
| _060_dmem_read_long():
| 

|
| INPUTS:
|	a0 - user source address
| 	0x4(%a6),bit5 - 1 = supervisor mode, 0 = user mode
| OUTPUTS:
|	d0 - data longword in d0
|	d1 - 0 = success, !0 = failure
|
| _060_imem_read_long():
| 
| Read an instruction longword from user memory.
|
| INPUTS:
|	a0 - user source address
| 	0x4(%a6),bit5 - 1 = supervisor mode, 0 = user mode
| OUTPUTS:
|	d0 - instruction longword in d0
|	d1 - 0 = success, !0 = failure
|
	.global 		_060_dmem_read_long
	.global 		_060_imem_read_long
_060_dmem_read_long:
_060_imem_read_long:
	clr.l		%d1			| assume success
	btst		#0x5,0x4(%a6)		| check for supervisor state
	bnes		dmrls			| supervisor
dmrluae:movs.l		(%a0),%d0		| fetch user longword
	rts
dmrls:	move.l		(%a0),%d0		| fetch super longword
	rts

|
| _060_dmem_write_byte():
|
| Write a data byte to user memory.
|
| INPUTS:
|	a0 - user destination address
| 	d0 - data byte in d0
| 	0x4(%a6),bit5 - 1 = supervisor mode, 0 = user mode
| OUTPUTS:
|	d1 - 0 = success, !0 = failure
|
	.global 		_060_dmem_write_byte
_060_dmem_write_byte:
	clr.l		%d1			| assume success
	btst		#0x5,0x4(%a6)		| check for supervisor state
	bnes		dmwbs			| supervisor
dmwbuae:movs.b		%d0,(%a0)		| store user byte
	rts
dmwbs:	move.b		%d0,(%a0)		| store super byte
	rts

|
| _060_dmem_write_word():
|
| Write a data word to user memory.
|
| INPUTS:
|	a0 - user destination address
| 	d0 - data word in d0
| 	0x4(%a6),bit5 - 1 = supervisor mode, 0 = user mode
| OUTPUTS:
|	d1 - 0 = success, !0 = failure
|
	.global 		_060_dmem_write_word
_060_dmem_write_word:
	clr.l		%d1			| assume success
	btst		#0x5,0x4(%a6)		| check for supervisor state
	bnes		dmwws			| supervisor
dmwwu:
dmwwuae:movs.w		%d0,(%a0)		| store user word
	bras		dmwwr
dmwws:	move.w		%d0,(%a0)		| store super word
dmwwr:	clr.l		%d1			| return success
	rts

|
| _060_dmem_write_long():
|
| Write a data longword to user memory.
|
| INPUTS:
|	a0 - user destination address
| 	d0 - data longword in d0
| 	0x4(%a6),bit5 - 1 = supervisor mode, 0 = user mode
| OUTPUTS:
|	d1 - 0 = success, !0 = failure
|
	.global 		_060_dmem_write_long
_060_dmem_write_long:
	clr.l		%d1			| assume success
	btst		#0x5,0x4(%a6)		| check for supervisor state
	bnes		dmwls			| supervisor
dmwluae:movs.l		%d0,(%a0)		| store user longword
	rts
dmwls:	move.l		%d0,(%a0)		| store super longword
	rts


#if 0
|###############################################

|
| Use these routines if your kernel doesn't have _copyout/_copyin equivalents.
| Assumes that D0/D1/A0/A1 are scratch registers. The _copyin/_copyout
| below assume that the SFC/DFC have been set previously.
|
| Linux/68k: These are basically non-inlined versions of
| memcpy_{to,from}fs, but without long-transfer optimization
| Note: Assumed that SFC/DFC are pointing correctly to user data
| space... Should be right, or are there any exceptions?

|
| int _copyout(supervisor_addr, user_addr, nbytes)
|
	.global 		_copyout
_copyout:
	move.l		4(%sp),%a0		| source
	move.l		8(%sp),%a1		| destination
	move.l		12(%sp),%d0		| count
	subq.l		#1,%d0
moreout:
	move.b		(%a0)+,%d1		| fetch supervisor byte
copyoutae:
	movs.b		%d1,(%a1)+		| store user byte
	dbra		%d0,moreout		| are we through yet?
	moveq		#0,%d0			| return success
	rts

|
| int _copyin(user_addr, supervisor_addr, nbytes)
|
	.global 		_copyin
_copyin:
	move.l		4(%sp),%a0		| source
	move.l		8(%sp),%a1		| destination
	move.l		12(%sp),%d0		| count
    subq.l      #1,%d0
morein:
copyinae:	
	movs.b		(%a0)+,%d1		| fetch user byte
	move.b		%d1,(%a1)+		| write supervisor byte
	dbra		%d0,morein		| are we through yet?
	moveq		#0,%d0			| return success
	rts
#endif

|###########################################################################

|
| _060_real_trace():
|
| This is the exit point for the 060FPSP when an instruction is being traced
| and there are no other higher priority exceptions pending for this instruction
| or they have already been processed.
|
| The sample code below simply executes an "rte".
|
	.global		_060_real_trace
_060_real_trace:
	bral	SYMBOL_NAME(trap)

|
| _060_real_access():
|
| This is the exit point for the 060FPSP when an access error exception
| is encountered. The routine below should point to the operating system
| handler for access error exceptions. The exception stack frame is an
| 8-word access error frame.
|
| The sample routine below simply executes an "rte" instruction which
| is most likely the incorrect thing to do and could put the system
| into an infinite loop.
|
	.global		_060_real_access
_060_real_access:
	bral	SYMBOL_NAME(buserr)



| Execption handling for movs access to illegal memory	
	.section .fixup,#alloc,#execinstr
	.even
1:	moveq		#-1,%d1
	rts
.section __ex_table,#alloc
	.align 4
	.long	dmrbuae,1b
	.long	dmrwuae,1b
	.long	dmrluae,1b
	.long	dmwbuae,1b
	.long	dmwwuae,1b
	.long	dmwluae,1b
	.long	copyoutae,1b
	.long	copyinae,1b
	.text
	dc.l	$60ff0000,$17400000,$60ff0000,$15f40000
	dc.l	$60ff0000,$02b60000,$60ff0000,$04700000
	dc.l	$60ff0000,$1b100000,$60ff0000,$19aa0000
	dc.l	$60ff0000,$1b5a0000,$60ff0000,$062e0000
	dc.l	$60ff0000,$102c0000,$51fc51fc,$51fc51fc
	dc.l	$51fc51fc,$51fc51fc,$51fc51fc,$51fc51fc
	dc.l	$51fc51fc,$51fc51fc,$51fc51fc,$51fc51fc
	dc.l	$51fc51fc,$51fc51fc,$51fc51fc,$51fc51fc
	dc.l	$2f00203a,$ff2c487b,$0930ffff,$fef8202f
	dc.l	$00044e74,$00042f00,$203afef2,$487b0930
	dc.l	$fffffee2,$202f0004,$4e740004,$2f00203a
	dc.l	$fee0487b,$0930ffff,$fecc202f,$00044e74
	dc.l	$00042f00,$203afed2,$487b0930,$fffffeb6
	dc.l	$202f0004,$4e740004,$2f00203a,$fea4487b
	dc.l	$0930ffff,$fea0202f,$00044e74,$00042f00
	dc.l	$203afe96,$487b0930,$fffffe8a,$202f0004
	dc.l	$4e740004,$2f00203a,$fe7c487b,$0930ffff
	dc.l	$fe74202f,$00044e74,$00042f00,$203afe76
	dc.l	$487b0930,$fffffe5e,$202f0004,$4e740004
	dc.l	$2f00203a,$fe68487b,$0930ffff,$fe48202f
	dc.l	$00044e74,$00042f00,$203afe56,$487b0930
	dc.l	$fffffe32,$202f0004,$4e740004,$2f00203a
	dc.l	$fe44487b,$0930ffff,$fe1c202f,$00044e74
	dc.l	$00042f00,$203afe32,$487b0930,$fffffe06
	dc.l	$202f0004,$4e740004,$2f00203a,$fe20487b
	dc.l	$0930ffff,$fdf0202f,$00044e74,$00042f00
	dc.l	$203afe1e,$487b0930,$fffffdda,$202f0004
	dc.l	$4e740004,$2f00203a,$fe0c487b,$0930ffff
	dc.l	$fdc4202f,$00044e74,$00042f00,$203afdfa
	dc.l	$487b0930,$fffffdae,$202f0004,$4e740004
	dc.l	$2f00203a,$fde8487b,$0930ffff,$fd98202f
	dc.l	$00044e74,$00042f00,$203afdd6,$487b0930
	dc.l	$fffffd82,$202f0004,$4e740004,$2f00203a
	dc.l	$fdc4487b,$0930ffff,$fd6c202f,$00044e74
	dc.l	$00042f00,$203afdb2,$487b0930,$fffffd56
	dc.l	$202f0004,$4e740004,$2f00203a,$fda0487b
	dc.l	$0930ffff,$fd40202f,$00044e74,$00042f00
	dc.l	$203afd8e,$487b0930,$fffffd2a,$202f0004
	dc.l	$4e740004,$2f00203a,$fd7c487b,$0930ffff
	dc.l	$fd14202f,$00044e74,$00042f00,$203afd6a
	dc.l	$487b0930,$fffffcfe,$202f0004,$4e740004
	dc.l	$40c62d38,$d3d64634,$3d6f90ae,$b1e75cc7
	dc.l	$40000000,$c90fdaa2,$2168c235,$00000000
	dc.l	$3fff0000,$c90fdaa2,$2168c235,$00000000
	dc.l	$3fe45f30,$6dc9c883,$4e56ff40,$f32eff6c
	dc.l	$48ee0303,$ff9cf22e,$bc00ff60,$f22ef0c0
	dc.l	$ffdc2d6e,$ff68ff44,$206eff44,$58aeff44
	dc.l	$61ffffff,$ff042d40,$ff40082e,$0005ff42
	dc.l	$66000116,$41eeff6c,$61ff0000,$051c41ee
	dc.l	$ff6c61ff,$00002aec,$1d40ff4e,$082e0005
	dc.l	$ff436726,$e9ee0183,$ff4261ff,$00005cac
	dc.l	$41eeff78,$61ff0000,$2aca0c00,$00066606
	dc.l	$61ff0000,$2a2e1d40,$ff4f4280,$102eff63
	dc.l	$122eff43,$0241007f,$02ae00ff,$01ffff64
	dc.l	$f23c9000,$00000000,$f23c8800,$00000000
	dc.l	$41eeff6c,$43eeff78,$223b1530,$00001974
	dc.l	$4ebb1930,$0000196c,$e9ee0183,$ff4261ff
	dc.l	$00005cd8,$082e0004,$ff626622,$082e0001
	dc.l	$ff626644,$f22ed0c0,$ffdcf22e,$9c00ff60
	dc.l	$4cee0303,$ff9c4e5e,$60ffffff,$fcc6f22e
	dc.l	$f040ff6c,$3d7ce005,$ff6ef22e,$d0c0ffdc
	dc.l	$f22e9c00,$ff604cee,$0303ff9c,$f36eff6c
	dc.l	$4e5e60ff,$fffffcb2,$f22ef040,$ff6c1d7c
	dc.l	$00c4000b,$3d7ce001,$ff6ef22e,$d0c0ffdc
	dc.l	$f22e9c00,$ff604cee,$0303ff9c,$f36eff6c
	dc.l	$4e5e60ff,$fffffcae,$1d7c0000,$ff4e4280
	dc.l	$102eff63,$02aeffff,$00ffff64,$f23c9000
	dc.l	$00000000,$f23c8800,$00000000,$41eeff6c
	dc.l	$61ff0000,$2e0c082e,$0004ff62,$6600ff70
	dc.l	$082e0001,$ff626600,$ff90f22e,$d0c0ffdc
	dc.l	$f22e9c00,$ff604cee,$0303ff9c,$4e5e0817
	dc.l	$000767ff,$fffffc0c,$f22fa400,$00083f7c
	dc.l	$20240006,$60ffffff,$fcec4e56,$ff40f32e
	dc.l	$ff6c48ee,$0303ff9c,$f22ebc00,$ff60f22e
	dc.l	$f0c0ffdc,$2d6eff68,$ff44206e,$ff4458ae
	dc.l	$ff4461ff,$fffffd42,$2d40ff40,$082e0005
	dc.l	$ff426600,$013241ee,$ff6c61ff,$0000035a
	dc.l	$41eeff6c,$61ff0000,$292a1d40,$ff4e082e
	dc.l	$0005ff43,$672e082e,$0004ff43,$6626e9ee
	dc.l	$0183ff42,$61ff0000,$5ae241ee,$ff7861ff
	dc.l	$00002900,$0c000006,$660661ff,$00002864
	dc.l	$1d40ff4f,$4280102e,$ff63122e,$ff430241
	dc.l	$007f02ae,$00ff01ff,$ff64f23c,$90000000
	dc.l	$0000f23c,$88000000,$000041ee,$ff6c43ee
	dc.l	$ff78223b,$15300000,$17aa4ebb,$19300000
	dc.l	$17a2e9ee,$0183ff42,$61ff0000,$5b0e082e
	dc.l	$0003ff62,$6622082e,$0001ff62,$664ef22e
	dc.l	$d0c0ffdc,$f22e9c00,$ff604cee,$0303ff9c
	dc.l	$4e5e60ff,$fffffafc,$082e0003,$ff666700
	dc.l	$ffd6f22e,$f040ff6c,$3d7ce003,$ff6ef22e
	dc.l	$d0c0ffdc,$f22e9c00,$ff604cee,$0303ff9c
	dc.l	$f36eff6c,$4e5e60ff,$fffffaf4,$082e0001
	dc.l	$ff666700,$ffaaf22e,$f040ff6c,$1d7c00c4
	dc.l	$000b3d7c,$e001ff6e,$f22ed0c0,$ffdcf22e
	dc.l	$9c00ff60,$4cee0303,$ff9cf36e,$ff6c4e5e
	dc.l	$60ffffff,$fad01d7c,$0000ff4e,$4280102e
	dc.l	$ff6302ae,$ffff00ff,$ff64f23c,$90000000
	dc.l	$0000f23c,$88000000,$000041ee,$ff6c61ff
	dc.l	$00002c2e,$082e0003,$ff626600,$ff66082e
	dc.l	$0001ff62,$6600ff90,$f22ed0c0,$ffdcf22e
	dc.l	$9c00ff60,$4cee0303,$ff9c4e5e,$08170007
	dc.l	$67ffffff,$fa2ef22f,$a4000008,$3f7c2024
	dc.l	$000660ff,$fffffb0e,$4e56ff40,$f32eff6c
	dc.l	$48ee0303,$ff9cf22e,$bc00ff60,$f22ef0c0
	dc.l	$ffdc082e,$00050004,$66084e68,$2d48ffd8
	dc.l	$600841ee,$00102d48,$ffd82d6e,$ff68ff44
	dc.l	$206eff44,$58aeff44,$61ffffff,$fb4c2d40
	dc.l	$ff40422e,$ff4a082e,$0005ff42,$66000208
	dc.l	$e9ee0006,$ff420c00,$00136700,$049e02ae
	dc.l	$00ff00ff,$ff64f23c,$90000000,$0000f23c
	dc.l	$88000000,$000041ee,$ff6c61ff,$0000013a
	dc.l	$41eeff6c,$61ff0000,$270a0c00,$00066606
	dc.l	$61ff0000,$266e1d40,$ff4ee9ee,$0183ff42
	dc.l	$082e0005,$ff436728,$0c2e003a,$ff436720
	dc.l	$61ff0000,$58b641ee,$ff7861ff,$000026d4
	dc.l	$0c000006,$660661ff,$00002638,$1d40ff4f
	dc.l	$4280102e,$ff63e9ee,$1047ff43,$41eeff6c
	dc.l	$43eeff78,$223b1d30,$00001598,$4ebb1930
	dc.l	$00001590,$102eff62,$6634102e,$ff430200
	dc.l	$00380c00,$0038670c,$e9ee0183,$ff4261ff
	dc.l	$000058e8,$f22ed0c0,$ffdcf22e,$9c00ff60
	dc.l	$4cee0303,$ff9c4e5e,$60ffffff,$f8e6c02e
	dc.l	$ff66edc0,$06086614,$082e0004,$ff6667ba
	dc.l	$082e0001,$ff6267b2,$60000066,$04800000
	dc.l	$00180c00,$00066614,$082e0003,$ff666600
	dc.l	$004a082e,$0004ff66,$66000046,$2f0061ff
	dc.l	$000007e0,$201f3d7b,$0222ff6e,$f22ed0c0
	dc.l	$ffdcf22e,$9c00ff60,$4cee0303,$ff9cf36e
	dc.l	$ff6c4e5e,$60ffffff,$f87ae000,$e006e004
	dc.l	$e005e003,$e002e001,$e001303c,$000460bc
	dc.l	$303c0003,$60b6e9ee,$0006ff42,$0c000011
	dc.l	$67080c00,$00156750,$4e753028,$00000240
	dc.l	$7fff0c40,$3f806708,$0c40407f,$672c4e75
	dc.l	$02a87fff,$ffff0004,$671861ff,$000024cc
	dc.l	$44400640,$3f810268,$80000000,$81680000
	dc.l	$4e750268,$80000000,$4e750228,$007f0004
	dc.l	$00687fff,$00004e75,$30280000,$02407fff
	dc.l	$0c403c00,$67080c40,$43ff67de,$4e7502a8
	dc.l	$7fffffff,$00046606,$4aa80008,$67c461ff
	dc.l	$00002478,$44400640,$3c010268,$80000000
	dc.l	$81680000,$4e75e9ee,$00c3ff42,$0c000003
	dc.l	$670004a2,$0c000007,$6700049a,$02aeffff
	dc.l	$00ffff64,$f23c9000,$00000000,$f23c8800
	dc.l	$00000000,$302eff6c,$02407fff,$671041ee
	dc.l	$ff6c61ff,$0000246c,$1d40ff4e,$60061d7c
	dc.l	$0004ff4e,$4280102e,$ff6341ee,$ff6c2d56
	dc.l	$ffd461ff,$0000292a,$102eff62,$66000086
	dc.l	$2caeffd4,$082e0005,$00046626,$206effd8
	dc.l	$4e60f22e,$d0c0ffdc,$f22e9c00,$ff604cee
	dc.l	$0303ff9c,$4e5e0817,$0007667a,$60ffffff
	dc.l	$f7220c2e,$0008ff4a,$66d8f22e,$f080ff6c
	dc.l	$f22ed0c0,$ffdcf22e,$9c00ff60,$4cee0303
	dc.l	$ff9c2c56,$2f6f00c4,$00b82f6f,$00c800bc
	dc.l	$2f6f002c,$00c42f6f,$003000c8,$2f6f0034
	dc.l	$00ccdffc,$000000b8,$08170007,$662860ff
	dc.l	$fffff6d0,$c02eff66,$edc00608,$662a082e
	dc.l	$0004ff66,$6700ff6a,$082e0001,$ff626700
	dc.l	$ff606000,$01663f7c,$20240006,$f22fa400
	dc.l	$000860ff,$fffff78e,$04800000,$0018303b
	dc.l	$020a4efb,$00064afc,$00080000,$0000003a
	dc.l	$00640094,$00000140,$0000f22e,$d0c0ffdc
	dc.l	$f22e9c00,$ff604cee,$0303ff9c,$3d7c30d8
	dc.l	$000a3d7c,$e006ff6e,$f36eff6c,$4e5e60ff
	dc.l	$fffff6d4,$f22ed0c0,$ffdcf22e,$9c00ff60
	dc.l	$4cee0303,$ff9c3d7c,$30d0000a,$3d7ce004
	dc.l	$ff6ef36e,$ff6c4e5e,$60ffffff,$f694f22e
	dc.l	$f040ff6c,$f22ed0c0,$ffdcf22e,$9c00ff60
	dc.l	$4cee0303,$ff9c3d7c,$30d4000a,$3d7ce005
	dc.l	$ff6ef36e,$ff6c4e5e,$60ffffff,$f60c2cae
	dc.l	$ffd4082e,$00050004,$66000038,$206effd8
	dc.l	$4e60f22e,$f040ff6c,$f22ed0c0,$ffdcf22e
	dc.l	$9c00ff60,$4cee0303,$ff9c3d7c,$30cc000a
	dc.l	$3d7ce003,$ff6ef36e,$ff6c4e5e,$60ffffff
	dc.l	$f5de0c2e,$0008ff4a,$66c8f22e,$f080ff6c
	dc.l	$f22ef040,$ff78f22e,$d0c0ffdc,$f22e9c00
	dc.l	$ff604cee,$0303ff9c,$3d7c30cc,$000a3d7c
	dc.l	$e003ff7a,$f36eff78,$2c562f6f,$00c400b8
	dc.l	$2f6f00c8,$00bc2f6f,$00cc00c0,$2f6f002c
	dc.l	$00c42f6f,$003000c8,$2f6f0034,$00ccdffc
	dc.l	$000000b8,$60ffffff,$f576f22e,$f040ff6c
	dc.l	$f22ed0c0,$ffdcf22e,$9c00ff60,$4cee0303
	dc.l	$ff9c3d7c,$30c4000a,$3d7ce001,$ff6ef36e
	dc.l	$ff6c4e5e,$60ffffff,$f55c02ae,$00ff00ff
	dc.l	$ff64f23c,$90000000,$0000f23c,$88000000
	dc.l	$000061ff,$00005548,$41eeff6c,$61ff0000
	dc.l	$22721d40,$ff4ee9ee,$0183ff42,$082e0005
	dc.l	$ff436728,$0c2e003a,$ff436720,$61ff0000
	dc.l	$542a41ee,$ff7861ff,$00002248,$0c000006
	dc.l	$660661ff,$000021ac,$1d40ff4f,$4280102e
	dc.l	$ff63e9ee,$1047ff43,$41eeff6c,$43eeff78
	dc.l	$223b1d30,$0000110c,$4ebb1930,$00001104
	dc.l	$102eff62,$6600008a,$102eff43,$02000038
	dc.l	$0c000038,$670ce9ee,$0183ff42,$61ff0000
	dc.l	$545a082e,$00050004,$6600002a,$206effd8
	dc.l	$4e60f22e,$d0c0ffdc,$f22e9c00,$ff604cee
	dc.l	$0303ff9c,$4e5e0817,$00076600,$012660ff
	dc.l	$fffff440,$082e0002,$ff4a67d6,$f22ed0c0
	dc.l	$ffdcf22e,$9c00ff60,$4cee0303,$ff9c4e5e
	dc.l	$2f6f0004,$00102f6f,$0000000c,$dffc0000
	dc.l	$000c0817,$00076600,$00ea60ff,$fffff404
	dc.l	$c02eff66,$edc00608,$6618082e,$0004ff66
	dc.l	$6700ff66,$082e0001,$ff626700,$ff5c6000
	dc.l	$006e0480,$00000018,$0c000006,$6d14082e
	dc.l	$0003ff66,$66000060,$082e0004,$ff666600
	dc.l	$004e082e,$00050004,$66000054,$206effd8
	dc.l	$4e603d7b,$022aff6e,$f22ed0c0,$ffdcf22e
	dc.l	$9c00ff60,$4cee0303,$ff9cf36e,$ff6c4e5e
	dc.l	$08170007,$6600006c,$60ffffff,$f386e000
	dc.l	$e006e004,$e005e003,$e002e001,$e001303c
	dc.l	$00036000,$ffae303c,$00046000,$ffa6082e
	dc.l	$0002ff4a,$67ac3d7b,$02d6ff6e,$f22ed0c0
	dc.l	$ffdcf22e,$9c00ff60,$4cee0303,$ff9cf36e
	dc.l	$ff6c4e5e,$2f6f0004,$00102f6f,$0000000c
	dc.l	$dffc0000,$000c0817,$00076606,$60ffffff
	dc.l	$f3223f7c,$20240006,$f22fa400,$000860ff
	dc.l	$fffff402,$02aeffff,$00ffff64,$f23c9000
	dc.l	$00000000,$f23c8800,$00000000,$e9ee0183
	dc.l	$ff4261ff,$000051b4,$41eeff6c,$61ff0000
	dc.l	$20620c00,$00066606,$61ff0000,$1fc61d40
	dc.l	$ff4e4280,$102eff63,$41eeff6c,$2d56ffd4
	dc.l	$61ff0000,$248c102e,$ff626600,$00842cae
	dc.l	$ffd4082e,$00050004,$6628206e,$ffd84e60
	dc.l	$f22ed0c0,$ffdcf22e,$9c00ff60,$4cee0303
	dc.l	$ff9c4e5e,$08170007,$6600ff68,$60ffffff
	dc.l	$f282082e,$0003ff4a,$67d6f22e,$d0c0ffdc
	dc.l	$f22e9c00,$ff604cee,$0303ff9c,$2c562f6f
	dc.l	$00c400b8,$2f6f00c8,$00bc2f6f,$003800c4
	dc.l	$2f6f003c,$00c82f6f,$004000cc,$dffc0000
	dc.l	$00b80817,$00076600,$ff1a60ff,$fffff234
	dc.l	$c02eff66,$edc00608,$6700ff74,$2caeffd4
	dc.l	$0c00001a,$6e0000e8,$67000072,$082e0005
	dc.l	$0004660a,$206effd8,$4e606000,$fb8e0c2e
	dc.l	$0008ff4a,$6600fb84,$f22ed0c0,$ffdcf22e
	dc.l	$9c00ff60,$4cee0303,$ff9c3d7c,$30d8000a
	dc.l	$3d7ce006,$ff6ef36e,$ff6c2c56,$2f6f00c4
	dc.l	$00b82f6f,$00c800bc,$2f6f00cc,$00c02f6f
	dc.l	$003800c4,$2f6f003c,$00c82f6f,$004000cc
	dc.l	$dffc0000,$00b860ff,$fffff22c,$082e0005
	dc.l	$00046600,$000c206e,$ffd84e60,$6000fb46
	dc.l	$0c2e0008,$ff4a6600,$fb3cf22e,$d0c0ffdc
	dc.l	$f22e9c00,$ff604cee,$0303ff9c,$3d7c30d0
	dc.l	$000a3d7c,$e004ff6e,$f36eff6c,$2c562f6f
	dc.l	$00c400b8,$2f6f00c8,$00bc2f6f,$00cc00c0
	dc.l	$2f6f0038,$00c42f6f,$003c00c8,$2f6f0040
	dc.l	$00ccdffc,$000000b8,$60ffffff,$f1a4082e
	dc.l	$00050004,$6600000c,$206effd8,$4e606000
	dc.l	$fbda0c2e,$0008ff4a,$6600fbd0,$f22ed0c0
	dc.l	$ffdcf22e,$9c00ff60,$4cee0303,$ff9c3d7c
	dc.l	$30c4000a,$3d7ce001,$ff6ef36e,$ff6c2c56
	dc.l	$2f6f00c4,$00b82f6f,$00c800bc,$2f6f00cc
	dc.l	$00c02f6f,$003800c4,$2f6f003c,$00c82f6f
	dc.l	$004000cc,$dffc0000,$00b860ff,$fffff106
	dc.l	$e9ee00c3,$ff420c00,$00016708,$0c000005
	dc.l	$67344e75,$302eff6c,$02407fff,$67260c40
	dc.l	$3f806e20,$44400640,$3f81222e,$ff70e0a9
	dc.l	$08c1001f,$2d41ff70,$026e8000,$ff6c006e
	dc.l	$3f80ff6c,$4e75302e,$ff6c0240,$7fff673a
	dc.l	$0c403c00,$6e344a2e,$ff6c5bee,$ff6e3d40
	dc.l	$ff6c4280,$41eeff6c,$323c3c01,$61ff0000
	dc.l	$1a66303c,$3c004a2e,$ff6e6704,$08c0000f
	dc.l	$08ee0007,$ff703d40,$ff6c4e75,$082e0005
	dc.l	$000467ff,$fffff176,$2d680000,$ff782d68
	dc.l	$0004ff7c,$2d680008,$ff804281,$4e752f00
	dc.l	$4e7a0808,$08000001,$66000460,$201f4e56
	dc.l	$ff4048ee,$0303ff9c,$f22ebc00,$ff60f22e
	dc.l	$f0c0ffdc,$2d6e0006,$ff44206e,$ff4458ae
	dc.l	$ff4461ff,$fffff152,$2d40ff40,$4a406b00
	dc.l	$020e02ae,$00ff00ff,$ff640800,$000a6618
	dc.l	$206eff44,$43eeff6c,$700c61ff,$fffff0d2
	dc.l	$4a816600,$04926048,$206eff44,$43eeff6c
	dc.l	$700c61ff,$fffff0ba,$4a816600,$047ae9ee
	dc.l	$004fff6c,$0c407fff,$6726102e,$ff6f0200
	dc.l	$000f660c,$4aaeff70,$66064aae,$ff746710
	dc.l	$41eeff6c,$61ff0000,$501af22e,$f080ff6c
	dc.l	$06ae0000,$000cff44,$41eeff6c,$61ff0000
	dc.l	$1cd21d40,$ff4e0c00,$0006660a,$61ff0000
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	dc.l	$1c004e75,$1e004e75,$323b1206,$4efb1002
	dc.l	$00100016,$001c0020,$00240028,$002c0030
	dc.l	$d1aeffa4,$4e75d1ae,$ffa84e75,$d5c04e75
	dc.l	$d7c04e75,$d9c04e75,$dbc04e75,$d1964e75
	dc.l	$1d7c0004,$ff4a0c00,$00016706,$d1aeffd8
	dc.l	$4e7554ae,$ffd84e75,$323b1206,$4efb1002
	dc.l	$00100016,$001c0020,$00240028,$002c0030
	dc.l	$91aeffa4,$4e7591ae,$ffa84e75,$95c04e75
	dc.l	$97c04e75,$99c04e75,$9bc04e75,$91964e75
	dc.l	$1d7c0008,$ff4a0c00,$00016706,$91aeffd8
	dc.l	$4e7555ae,$ffd84e75,$303b0206,$4efb0002
	dc.l	$00100028,$0040004c,$00580064,$0070007c
	dc.l	$2d6effdc,$ff6c2d6e,$ffe0ff70,$2d6effe4
	dc.l	$ff7441ee,$ff6c4e75,$2d6effe8,$ff6c2d6e
	dc.l	$ffecff70,$2d6efff0,$ff7441ee,$ff6c4e75
	dc.l	$f22ef020,$ff6c41ee,$ff6c4e75,$f22ef010
	dc.l	$ff6c41ee,$ff6c4e75,$f22ef008,$ff6c41ee
	dc.l	$ff6c4e75,$f22ef004,$ff6c41ee,$ff6c4e75
	dc.l	$f22ef002,$ff6c41ee,$ff6c4e75,$f22ef001
	dc.l	$ff6c41ee,$ff6c4e75,$303b0206,$4efb0002
	dc.l	$00100028,$0040004c,$00580064,$0070007c
	dc.l	$2d6effdc,$ff782d6e,$ffe0ff7c,$2d6effe4
	dc.l	$ff8041ee,$ff784e75,$2d6effe8,$ff782d6e
	dc.l	$ffecff7c,$2d6efff0,$ff8041ee,$ff784e75
	dc.l	$f22ef020,$ff7841ee,$ff784e75,$f22ef010
	dc.l	$ff7841ee,$ff784e75,$f22ef008,$ff7841ee
	dc.l	$ff784e75,$f22ef004,$ff7841ee,$ff784e75
	dc.l	$f22ef002,$ff7841ee,$ff784e75,$f22ef001
	dc.l	$ff7841ee,$ff784e75,$303b0206,$4efb0002
	dc.l	$00100018,$0020002a,$0034003e,$00480052
	dc.l	$f22ef080,$ffdc4e75,$f22ef080,$ffe84e75
	dc.l	$f227e001,$f21fd020,$4e75f227,$e001f21f
	dc.l	$d0104e75,$f227e001,$f21fd008,$4e75f227
	dc.l	$e001f21f,$d0044e75,$f227e001,$f21fd002
	dc.l	$4e75f227,$e001f21f,$d0014e75,$700c61ff
	dc.l	$ffffbace,$43eeff6c,$700c61ff,$ffffa0d8
	dc.l	$4a8166ff,$00000a14,$e9ee004f,$ff6c0c40
	dc.l	$7fff6602,$4e75102e,$ff6f0200,$000f660e
	dc.l	$4aaeff70,$66084aae,$ff746602,$4e7541ee
	dc.l	$ff6c61ff,$0000001c,$f22ef080,$ff6c4e75
	dc.l	$00000000,$02030203,$02030302,$03020203
	dc.l	$2d680000,$ff842d68,$0004ff88,$2d680008
	dc.l	$ff8c41ee,$ff8448e7,$3c00f227,$e0017402
	dc.l	$76042810,$42814c3c,$10010000,$000ae9c4
	dc.l	$08c4d280,$580351ca,$ffee0804,$001e6702
	dc.l	$44810481,$00000010,$6c0e4481,$00844000
	dc.l	$00000090,$40000000,$2f017201,$f23c4400
	dc.l	$00000000,$e9d00704,$f2005822,$28301c00
	dc.l	$76007407,$f23c4423,$41200000,$e9c408c4
	dc.l	$f2005822,$580351ca,$ffec5281,$0c810000
	dc.l	$00026fd8,$0810001f,$6704f200,$001a2217
	dc.l	$0c810000,$001b6f00,$00e40810,$001e6674
	dc.l	$42812810,$e9c40704,$66245281,$7a012830
	dc.l	$5c006608,$50815285,$28305c00,$42837407
	dc.l	$e9c408c4,$66085883,$528151ca,$fff42001
	dc.l	$22179280,$6c104481,$28100084,$40000000
	dc.l	$00904000,$000043fb,$01700000,$06664283
	dc.l	$f23c4480,$3f800000,$7403e280,$6406f231
	dc.l	$48a33800,$06830000,$000c4a80,$66ecf200
	dc.l	$04236068,$42817a02,$28305c00,$66085385
	dc.l	$50812830,$5c00761c,$7407e9c4,$08c46608
	dc.l	$59835281,$51cafff4,$20012217,$92806e10
	dc.l	$44812810,$0284bfff,$ffff0290,$bfffffff
	dc.l	$43fb0170,$000005fc,$4283f23c,$44803f80
	dc.l	$00007403,$e2806406,$f23148a3,$38000683
	dc.l	$0000000c,$4a8066ec,$f2000420,$262eff60
	dc.l	$e9c32682,$2810e582,$e9c40002,$d48043fa
	dc.l	$fe501031,$28004283,$efc30682,$f2039000
	dc.l	$e280640a,$43fb0170,$00000644,$6016e280
	dc.l	$640a43fb,$01700000,$06d26008,$43fb0170
	dc.l	$00000590,$20016a08,$44800090,$40000000
	dc.l	$4283f23c,$44803f80,$0000e280,$6406f231
	dc.l	$48a33800,$06830000,$000c4a80,$66ec0810
	dc.l	$001e6706,$f2000420,$6004f200,$0423f200
	dc.l	$a8000880,$00096706,$006e0108,$ff66588f
	dc.l	$f21fd040,$4cdf003c,$f23c9000,$00000000
	dc.l	$f23c8800,$00000000,$4e753ffd,$00009a20
	dc.l	$9a84fbcf,$f7980000,$00003ffd,$00009a20
	dc.l	$9a84fbcf,$f7990000,$00003f80,$00000000
	dc.l	$00000000,$00000000,$00004000,$00000000
	dc.l	$00000000,$00000000,$00004120,$00000000
	dc.l	$00000000,$00000000,$0000459a,$28000000
	dc.l	$00000000,$00000000,$00000000,$00000303
	dc.l	$02020302,$02030203,$030248e7,$3f20f227
	dc.l	$e007f23c,$90000000,$00202d50,$ff582e00
	dc.l	$422eff50,$0c2e0004,$ff4e6600,$00303010
	dc.l	$02407fff,$22280004,$24280008,$5340e38a
	dc.l	$e3914a81,$6cf64a40,$6e0450ee,$ff500240
	dc.l	$7fff3080,$21410004,$21420008,$2d50ff90
	dc.l	$2d680004,$ff942d68,$0008ff98,$02ae7fff
	dc.l	$ffffff90,$4a2eff50,$67082c3c,$ffffecbb
	dc.l	$6038302e,$ff903d7c,$3fffff90,$f22e4800
	dc.l	$ff900440,$3ffff200,$5022f23a,$4428ff1c
	dc.l	$f293000e,$f23a4823,$ff02f206,$6000600a
	dc.l	$f23a4823,$fee6f206,$6000f23c,$88000000
	dc.l	$00004245,$4a876f04,$28076006,$28069887
	dc.l	$52844a84,$6f180c84,$00000011,$6f127811
	dc.l	$4a876f0c,$00ae0000,$2080ff64,$60027801
	dc.l	$4a876e06,$be866d02,$2c072006,$52809084
	dc.l	$48454245,$42424a80,$6c145245,$0c80ffff
	dc.l	$ecd46e08,$06800000,$00187418,$4480f23a
	dc.l	$4480fe98,$e9ee1682,$ff60e349,$d245e349
	dc.l	$4aaeff58,$6c025281,$45fafec0,$16321800
	dc.l	$e98bf203,$9000e88b,$4a03660a,$43fb0170
	dc.l	$00000370,$6016e20b,$640a43fb,$01700000
	dc.l	$03fe6008,$43fb0170,$00000490,$4283e288
	dc.l	$6406f231,$48a33800,$06830000,$000c4a80
	dc.l	$66ecf23c,$88000000,$0000f23c,$90000000
	dc.l	$0010f210,$4800f200,$00184a45,$6608f200
	dc.l	$04206000,$008e4a2e,$ff506700,$0072f227
	dc.l	$e0023617,$02437fff,$00508000,$d6500443
	dc.l	$3fffd669,$00240443,$3fffd669,$00300443
	dc.l	$3fff6b00,$00480257,$80008757,$02507fff
	dc.l	$2f280008,$2f280004,$2f3c3fff,$0000f21f
	dc.l	$d080f21f,$48232f29,$002c2f29,$00282f3c
	dc.l	$3fff0000,$2f290038,$2f290034,$2f3c3fff
	dc.l	$0000f21f,$4823f21f,$48236016,$60fe4a42
	dc.l	$670cf229,$48230024,$f2294823,$0030f200
	dc.l	$0423f200,$a800f22e,$6800ff90,$45eeff90
	dc.l	$08000009,$670e00aa,$00000001,$0008f22e
	dc.l	$4800ff90,$2d6eff60,$ff5402ae,$00000030
	dc.l	$ff6048e7,$c0c02f2e,$ff542f2e,$ff5841ee
	dc.l	$ff90f210,$68004aae,$ff586c06,$00908000
	dc.l	$00002f2e,$ff64f22e,$9000ff60,$f23c8800
	dc.l	$00000000,$f22e4801,$ff90f200,$a800816e
	dc.l	$ff661d57,$ff64588f,$2d5fff58,$2d5fff54
	dc.l	$4cdf0303,$2d6eff58,$ff902d6e,$ff54ff60
	dc.l	$48454a45,$66ff0000,$0086f23a,$4500fcec
	dc.l	$20045380,$4283e288,$6406f231,$49233800
	dc.l	$06830000,$000c4a80,$66ec4a2e,$ff50670a
	dc.l	$f2000018,$60ff0000,$0028f200,$0018f200
	dc.l	$0838f293,$001a5386,$3a3c0001,$f23c9000
	dc.l	$00000020,$f23a4523,$fcc26000,$fda8f23a
	dc.l	$4523fcb8,$f2000838,$f294005c,$f292000c
	dc.l	$f23a4420,$fca65286,$604c5286,$3a3c0001
	dc.l	$f23c9000,$00000020,$6000fd7a,$f23a4500
	dc.l	$fc6a2004,$4283e288,$6406f231,$49233800
	dc.l	$06830000,$000c4a80,$66ecf200,$0018f200
	dc.l	$0838f28e,$0012f23a,$4420fc60,$52865284
	dc.l	$f23a4523,$fc56f23c,$90000000,$0010f200
	dc.l	$082041ee,$ff84f210,$68002428,$00042628
	dc.l	$000842a8,$000442a8,$00082010,$48406714
	dc.l	$04800000,$3ffd4a80,$6e0a4480,$e28ae293
	dc.l	$51c8fffa,$4a826604,$4a836710,$42810683
	dc.l	$00000080,$d5810283,$ffffff80,$20045688
	dc.l	$61ff0000,$02b04a2e,$ff506728,$f200003a
	dc.l	$f281000c,$f2064000,$f2000018,$602e4a87
	dc.l	$6d08f23a,$4400fbe4,$6022f206,$4000f200
	dc.l	$00186018,$f200003a,$f28e000a,$f23a4400
	dc.l	$fb9a6008,$f2064000,$f2000018,$f2294820
	dc.l	$0018f22e,$6800ff90,$242a0004,$262a0008
	dc.l	$3012670e,$04403ffd,$4440e28a,$e29351c8
	dc.l	$fffa4281,$06830000,$0080d581,$0283ffff
	dc.l	$ff807004,$41eeff54,$61ff0000,$0228202e
	dc.l	$ff54720c,$e2a8efee,$010cff84,$e2a8efee
	dc.l	$0404ff84,$4a006708,$00ae0000,$2080ff64
	dc.l	$4280022e,$000fff84,$4aaeff58,$6c027002
	dc.l	$4a866c02,$5280efee,$0002ff84,$f23c8800
	dc.l	$00000000,$f21fd0e0,$4cdf04fc,$4e754002
	dc.l	$0000a000,$00000000,$00004005,$0000c800
	dc.l	$00000000,$0000400c,$00009c40,$00000000
	dc.l	$00004019,$0000bebc,$20000000,$00004034
	dc.l	$00008e1b,$c9bf0400,$00004069,$00009dc5
	dc.l	$ada82b70,$b59e40d3,$0000c278,$1f49ffcf
	dc.l	$a6d541a8,$000093ba,$47c980e9,$8ce04351
	dc.l	$0000aa7e,$ebfb9df9,$de8e46a3,$0000e319
	dc.l	$a0aea60e,$91c74d48,$0000c976,$75868175
	dc.l	$0c175a92,$00009e8b,$3b5dc53d,$5de57525
	dc.l	$0000c460,$52028a20,$979b4002,$0000a000
	dc.l	$00000000,$00004005,$0000c800,$00000000
	dc.l	$0000400c,$00009c40,$00000000,$00004019
	dc.l	$0000bebc,$20000000,$00004034,$00008e1b
	dc.l	$c9bf0400,$00004069,$00009dc5,$ada82b70
	dc.l	$b59e40d3,$0000c278,$1f49ffcf,$a6d641a8
	dc.l	$000093ba,$47c980e9,$8ce04351,$0000aa7e
	dc.l	$ebfb9df9,$de8e46a3,$0000e319,$a0aea60e
	dc.l	$91c74d48,$0000c976,$75868175,$0c185a92
	dc.l	$00009e8b,$3b5dc53d,$5de57525,$0000c460
	dc.l	$52028a20,$979b4002,$0000a000,$00000000
	dc.l	$00004005,$0000c800,$00000000,$0000400c
	dc.l	$00009c40,$00000000,$00004019,$0000bebc
	dc.l	$20000000,$00004034,$00008e1b,$c9bf0400
	dc.l	$00004069,$00009dc5,$ada82b70,$b59d40d3
	dc.l	$0000c278,$1f49ffcf,$a6d541a8,$000093ba
	dc.l	$47c980e9,$8cdf4351,$0000aa7e,$ebfb9df9
	dc.l	$de8d46a3,$0000e319,$a0aea60e,$91c64d48
	dc.l	$0000c976,$75868175,$0c175a92,$00009e8b
	dc.l	$3b5dc53d,$5de47525,$0000c460,$52028a20
	dc.l	$979a48e7,$ff007e01,$53802802,$2a03e9c2
	dc.l	$1003e782,$e9c36003,$e7838486,$e385e394
	dc.l	$4846d346,$d6854e71,$d5844e71,$d3464846
	dc.l	$4a476712,$4847e947,$de4110c7,$48474247
	dc.l	$51c8ffc8,$60124847,$3e014847,$524751c8
	dc.l	$ffba4847,$e94f10c7,$4cdf00ff,$4e757001
	dc.l	$610000d6,$3d7c0121,$000a6000,$007e7002
	dc.l	$610000c6,$3d7c0141,$000a606e,$70046100
	dc.l	$00b83d7c,$0101000a,$60607008,$610000aa
	dc.l	$3d7c0161,$000a6052,$700c6100,$009c3d7c
	dc.l	$0161000a,$60447001,$6100008e,$3d7c00a1
	dc.l	$000a6036,$70026100,$00803d7c,$00c1000a
	dc.l	$60287004,$61000072,$3d7c0081,$000a601a
	dc.l	$70086100,$00643d7c,$00e1000a,$600c700c
	dc.l	$61000056,$3d7c00e1,$000a2d6e,$ff680006
	dc.l	$f22ed0c0,$ffdcf22e,$9c00ff60,$4cee0303
	dc.l	$ff9c4e5e,$2f172f6f,$00080004,$2f6f000c
	dc.l	$00082f7c,$00000001,$000c3f6f,$0006000c
	dc.l	$3f7c4008,$00060817,$00056706,$08ef0002
	dc.l	$000d60ff,$ffff95f4,$122eff41,$02010038
	dc.l	$0c010018,$6700000c,$0c010020,$67000060
	dc.l	$4e75122e,$ff410241,$0007323b,$12064efb
	dc.l	$10020010,$0016001c,$00200024,$0028002c
	dc.l	$003091ae,$ffa44e75,$91aeffa8,$4e7595c0
	dc.l	$4e7597c0,$4e7599c0,$4e759bc0,$4e759196
	dc.l	$4e750c2e,$0030000a,$6612082e,$00050004
	dc.l	$660a4e7a,$880091c0,$4e7b8800,$4e754480
	dc.l	$60a051fc,$00000000,$00000000,$00000000
This is the original source code from Motorola for the 68060 processor
support code, providing emulation for rarely used m68k instructions
not implemented in the 68060 silicon.

The code provided here will not assemble out of the box using the GNU
assembler, however it is being included in order to comply with the
GNU General Public License.

You don't need to actually assemble these files in order to compile a
workin m68k kernel, the precompiled .sa files in arch/m68k/ifpsp060
are sufficient and were generated from these source files by
Motorola.
~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
MOTOROLA MICROPROCESSOR & MEMORY TECHNOLOGY GROUP
M68000 Hi-Performance Microprocessor Division
M68060 Software Package
Production Release P1.00 -- October 10, 1994

M68060 Software Package Copyright � 1993, 1994 Motorola Inc.  All rights reserved.
 
THE SOFTWARE is provided on an "AS IS" basis and without warranty.
To the maximum extent permitted by applicable law,
MOTOROLA DISCLAIMS ALL WARRANTIES WHETHER EXPRESS OR IMPLIED, 
INCLUDING IMPLIED WARRANTIES OF MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE
and any warranty against infringement with regard to the SOFTWARE
(INCLUDING ANY MODIFIED VERSIONS THEREOF) and any accompanying written materials.

To the maximum extent permitted by applicable law,
IN NO EVENT SHALL MOTOROLA BE LIABLE FOR ANY DAMAGES WHATSOEVER
(INCLUDING WITHOUT LIMITATION, DAMAGES FOR LOSS OF BUSINESS PROFITS,
BUSINESS INTERRUPTION, LOSS OF BUSINESS INFORMATION, OR OTHER PECUNIARY LOSS)
ARISING OF THE USE OR INABILITY TO USE THE SOFTWARE.
Motorola assumes no responsibility for the maintenance and support of the SOFTWARE.

You are hereby granted a copyright license to use, modify, and distribute the SOFTWARE
so long as this entire notice is retained without alteration in any modified and/or
redistributed versions, and that such modified versions are clearly identified as such.
No licenses are granted by implication, estoppel or otherwise under any patents
or trademarks of Motorola, Inc.
~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
#
# lfptop.s:
#	This file is appended to the top of the 060ILSP package
# and contains the entry points into the package. The user, in
# effect, branches to one of the branch table entries located here.
#

	bra.l	_facoss_
	short	0x0000
	bra.l	_facosd_
	short	0x0000
	bra.l	_facosx_
	short	0x0000

	bra.l	_fasins_
	short	0x0000
	bra.l	_fasind_
	short	0x0000
	bra.l	_fasinx_
	short	0x0000

	bra.l	_fatans_
	short	0x0000
	bra.l	_fatand_
	short	0x0000
	bra.l	_fatanx_
	short	0x0000

	bra.l	_fatanhs_
	short	0x0000
	bra.l	_fatanhd_
	short	0x0000
	bra.l	_fatanhx_
	short	0x0000

	bra.l	_fcoss_
	short	0x0000
	bra.l	_fcosd_
	short	0x0000
	bra.l	_fcosx_
	short	0x0000

	bra.l	_fcoshs_
	short	0x0000
	bra.l	_fcoshd_
	short	0x0000
	bra.l	_fcoshx_
	short	0x0000

	bra.l	_fetoxs_
	short	0x0000
	bra.l	_fetoxd_
	short	0x0000
	bra.l	_fetoxx_
	short	0x0000

	bra.l	_fetoxm1s_
	short	0x0000
	bra.l	_fetoxm1d_
	short	0x0000
	bra.l	_fetoxm1x_
	short	0x0000

	bra.l	_fgetexps_
	short	0x0000
	bra.l	_fgetexpd_
	short	0x0000
	bra.l	_fgetexpx_
	short	0x0000

	bra.l	_fgetmans_
	short	0x0000
	bra.l	_fgetmand_
	short	0x0000
	bra.l	_fgetmanx_
	short	0x0000

	bra.l	_flog10s_
	short	0x0000
	bra.l	_flog10d_
	short	0x0000
	bra.l	_flog10x_
	short	0x0000

	bra.l	_flog2s_
	short	0x0000
	bra.l	_flog2d_
	short	0x0000
	bra.l	_flog2x_
	short	0x0000

	bra.l	_flogns_
	short	0x0000
	bra.l	_flognd_
	short	0x0000
	bra.l	_flognx_
	short	0x0000

	bra.l	_flognp1s_
	short	0x0000
	bra.l	_flognp1d_
	short	0x0000
	bra.l	_flognp1x_
	short	0x0000

	bra.l	_fmods_
	short	0x0000
	bra.l	_fmodd_
	short	0x0000
	bra.l	_fmodx_
	short	0x0000

	bra.l	_frems_
	short	0x0000
	bra.l	_fremd_
	short	0x0000
	bra.l	_fremx_
	short	0x0000

	bra.l	_fscales_
	short	0x0000
	bra.l	_fscaled_
	short	0x0000
	bra.l	_fscalex_
	short	0x0000

	bra.l	_fsins_
	short	0x0000
	bra.l	_fsind_
	short	0x0000
	bra.l	_fsinx_
	short	0x0000

	bra.l	_fsincoss_
	short	0x0000
	bra.l	_fsincosd_
	short	0x0000
	bra.l	_fsincosx_
	short	0x0000

	bra.l	_fsinhs_
	short	0x0000
	bra.l	_fsinhd_
	short	0x0000
	bra.l	_fsinhx_
	short	0x0000

	bra.l	_ftans_
	short	0x0000
	bra.l	_ftand_
	short	0x0000
	bra.l	_ftanx_
	short	0x0000

	bra.l	_ftanhs_
	short	0x0000
	bra.l	_ftanhd_
	short	0x0000
	bra.l	_ftanhx_
	short	0x0000

	bra.l	_ftentoxs_
	short	0x0000
	bra.l	_ftentoxd_
	short	0x0000
	bra.l	_ftentoxx_
	short	0x0000

	bra.l	_ftwotoxs_
	short	0x0000
	bra.l	_ftwotoxd_
	short	0x0000
	bra.l	_ftwotoxx_
	short	0x0000

	bra.l	_fabss_
	short	0x0000
	bra.l	_fabsd_
	short	0x0000
	bra.l	_fabsx_
	short	0x0000

	bra.l	_fadds_
	short	0x0000
	bra.l	_faddd_
	short	0x0000
	bra.l	_faddx_
	short	0x0000

	bra.l	_fdivs_
	short	0x0000
	bra.l	_fdivd_
	short	0x0000
	bra.l	_fdivx_
	short	0x0000

	bra.l	_fints_
	short	0x0000
	bra.l	_fintd_
	short	0x0000
	bra.l	_fintx_
	short	0x0000

	bra.l	_fintrzs_
	short	0x0000
	bra.l	_fintrzd_
	short	0x0000
	bra.l	_fintrzx_
	short	0x0000

	bra.l	_fmuls_
	short	0x0000
	bra.l	_fmuld_
	short	0x0000
	bra.l	_fmulx_
	short	0x0000

	bra.l	_fnegs_
	short	0x0000
	bra.l	_fnegd_
	short	0x0000
	bra.l	_fnegx_
	short	0x0000

	bra.l	_fsqrts_
	short	0x0000
	bra.l	_fsqrtd_
	short	0x0000
	bra.l	_fsqrtx_
	short	0x0000

	bra.l	_fsubs_
	short	0x0000
	bra.l	_fsubd_
	short	0x0000
	bra.l	_fsubx_
	short	0x0000

# leave room for future possible additions
	align	0x400

#
# This file contains a set of define statements for constants
# in order to promote readability within the corecode itself.
#

set LOCAL_SIZE,		192			# stack frame size(bytes)
set LV,			-LOCAL_SIZE		# stack offset

set EXC_SR,		0x4			# stack status register
set EXC_PC,		0x6			# stack pc
set EXC_VOFF,		0xa			# stacked vector offset
set EXC_EA,		0xc			# stacked <ea>

set EXC_FP,		0x0			# frame pointer

set EXC_AREGS,		-68			# offset of all address regs
set EXC_DREGS,		-100			# offset of all data regs
set EXC_FPREGS,		-36			# offset of all fp regs

set EXC_A7,		EXC_AREGS+(7*4)		# offset of saved a7
set OLD_A7,		EXC_AREGS+(6*4)		# extra copy of saved a7
set EXC_A6,		EXC_AREGS+(6*4)		# offset of saved a6
set EXC_A5,		EXC_AREGS+(5*4)
set EXC_A4,		EXC_AREGS+(4*4)
set EXC_A3,		EXC_AREGS+(3*4)
set EXC_A2,		EXC_AREGS+(2*4)
set EXC_A1,		EXC_AREGS+(1*4)
set EXC_A0,		EXC_AREGS+(0*4)
set EXC_D7,		EXC_DREGS+(7*4)
set EXC_D6,		EXC_DREGS+(6*4)
set EXC_D5,		EXC_DREGS+(5*4)
set EXC_D4,		EXC_DREGS+(4*4)
set EXC_D3,		EXC_DREGS+(3*4)
set EXC_D2,		EXC_DREGS+(2*4)
set EXC_D1,		EXC_DREGS+(1*4)
set EXC_D0,		EXC_DREGS+(0*4)

set EXC_FP0, 		EXC_FPREGS+(0*12)	# offset of saved fp0
set EXC_FP1, 		EXC_FPREGS+(1*12)	# offset of saved fp1
set EXC_FP2, 		EXC_FPREGS+(2*12)	# offset of saved fp2 (not used)

set FP_SCR1, 		LV+80			# fp scratch 1
set FP_SCR1_EX, 	FP_SCR1+0
set FP_SCR1_SGN,	FP_SCR1+2
set FP_SCR1_HI, 	FP_SCR1+4
set FP_SCR1_LO, 	FP_SCR1+8

set FP_SCR0, 		LV+68			# fp scratch 0
set FP_SCR0_EX, 	FP_SCR0+0
set FP_SCR0_SGN,	FP_SCR0+2
set FP_SCR0_HI, 	FP_SCR0+4
set FP_SCR0_LO, 	FP_SCR0+8

set FP_DST, 		LV+56			# fp destination operand
set FP_DST_EX, 		FP_DST+0
set FP_DST_SGN,		FP_DST+2
set FP_DST_HI, 		FP_DST+4
set FP_DST_LO, 		FP_DST+8

set FP_SRC, 		LV+44			# fp source operand
set FP_SRC_EX, 		FP_SRC+0
set FP_SRC_SGN,		FP_SRC+2
set FP_SRC_HI, 		FP_SRC+4
set FP_SRC_LO, 		FP_SRC+8

set USER_FPIAR,		LV+40			# FP instr address register

set USER_FPSR,		LV+36			# FP status register
set FPSR_CC,		USER_FPSR+0		# FPSR condition codes
set FPSR_QBYTE,		USER_FPSR+1		# FPSR qoutient byte
set FPSR_EXCEPT,	USER_FPSR+2		# FPSR exception status byte
set FPSR_AEXCEPT,	USER_FPSR+3		# FPSR accrued exception byte

set USER_FPCR,		LV+32			# FP control register
set FPCR_ENABLE,	USER_FPCR+2		# FPCR exception enable
set FPCR_MODE,		USER_FPCR+3		# FPCR rounding mode control

set L_SCR3,		LV+28			# integer scratch 3
set L_SCR2,		LV+24			# integer scratch 2
set L_SCR1,		LV+20			# integer scratch 1

set STORE_FLG,		LV+19			# flag: operand store (ie. not fcmp/ftst)

set EXC_TEMP2,		LV+24			# temporary space
set EXC_TEMP,		LV+16			# temporary space

set DTAG,		LV+15			# destination operand type
set STAG, 		LV+14			# source operand type

set SPCOND_FLG,		LV+10			# flag: special case (see below)

set EXC_CC,		LV+8			# saved condition codes
set EXC_EXTWPTR,	LV+4			# saved current PC (active)
set EXC_EXTWORD,	LV+2			# saved extension word
set EXC_CMDREG,		LV+2			# saved extension word
set EXC_OPWORD,		LV+0			# saved operation word

################################

# Helpful macros

set FTEMP,		0			# offsets within an
set FTEMP_EX, 		0			# extended precision
set FTEMP_SGN,		2			# value saved in memory.
set FTEMP_HI, 		4
set FTEMP_LO, 		8
set FTEMP_GRS,		12

set LOCAL,		0			# offsets within an
set LOCAL_EX, 		0			# extended precision 
set LOCAL_SGN,		2			# value saved in memory.
set LOCAL_HI, 		4
set LOCAL_LO, 		8
set LOCAL_GRS,		12

set DST,		0			# offsets within an
set DST_EX,		0			# extended precision
set DST_HI,		4			# value saved in memory.
set DST_LO,		8

set SRC,		0			# offsets within an
set SRC_EX,		0			# extended precision
set SRC_HI,		4			# value saved in memory.
set SRC_LO,		8

set SGL_LO,		0x3f81			# min sgl prec exponent
set SGL_HI,		0x407e			# max sgl prec exponent
set DBL_LO,		0x3c01			# min dbl prec exponent
set DBL_HI,		0x43fe			# max dbl prec exponent
set EXT_LO,		0x0			# min ext prec exponent
set EXT_HI,		0x7ffe			# max ext prec exponent

set EXT_BIAS,		0x3fff			# extended precision bias
set SGL_BIAS,		0x007f			# single precision bias
set DBL_BIAS,		0x03ff			# double precision bias

set NORM,		0x00			# operand type for STAG/DTAG
set ZERO,		0x01			# operand type for STAG/DTAG
set INF,		0x02			# operand type for STAG/DTAG
set QNAN,		0x03			# operand type for STAG/DTAG
set DENORM,		0x04			# operand type for STAG/DTAG
set SNAN,		0x05			# operand type for STAG/DTAG
set UNNORM,		0x06			# operand type for STAG/DTAG

##################
# FPSR/FPCR bits #
##################
set neg_bit,		0x3			# negative result
set z_bit,		0x2			# zero result
set inf_bit,		0x1			# infinite result
set nan_bit,		0x0			# NAN result

set q_sn_bit,		0x7			# sign bit of quotient byte

set bsun_bit,		7			# branch on unordered
set snan_bit,		6			# signalling NAN
set operr_bit,		5			# operand error
set ovfl_bit,		4			# overflow
set unfl_bit,		3			# underflow
set dz_bit,		2			# divide by zero
set inex2_bit,		1			# inexact result 2
set inex1_bit,		0			# inexact result 1

set aiop_bit,		7			# accrued inexact operation bit
set aovfl_bit,		6			# accrued overflow bit
set aunfl_bit,		5			# accrued underflow bit
set adz_bit,		4			# accrued dz bit
set ainex_bit,		3			# accrued inexact bit

#############################
# FPSR individual bit masks #
#############################
set neg_mask,		0x08000000		# negative bit mask (lw)
set inf_mask,		0x02000000		# infinity bit mask (lw)
set z_mask,		0x04000000		# zero bit mask (lw)
set nan_mask,		0x01000000		# nan bit mask (lw)

set neg_bmask,		0x08			# negative bit mask (byte)
set inf_bmask,		0x02			# infinity bit mask (byte)
set z_bmask,		0x04			# zero bit mask (byte)
set nan_bmask,		0x01			# nan bit mask (byte)

set bsun_mask,		0x00008000		# bsun exception mask
set snan_mask,		0x00004000		# snan exception mask
set operr_mask,		0x00002000		# operr exception mask
set ovfl_mask,		0x00001000		# overflow exception mask
set unfl_mask,		0x00000800		# underflow exception mask
set dz_mask,		0x00000400		# dz exception mask
set inex2_mask,		0x00000200		# inex2 exception mask
set inex1_mask,		0x00000100		# inex1 exception mask

set aiop_mask,		0x00000080		# accrued illegal operation
set aovfl_mask,		0x00000040		# accrued overflow
set aunfl_mask,		0x00000020		# accrued underflow
set adz_mask,		0x00000010		# accrued divide by zero
set ainex_mask,		0x00000008		# accrued inexact

######################################
# FPSR combinations used in the FPSP #
######################################
set dzinf_mask,		inf_mask+dz_mask+adz_mask
set opnan_mask,		nan_mask+operr_mask+aiop_mask
set nzi_mask,		0x01ffffff 		#clears N, Z, and I
set unfinx_mask,	unfl_mask+inex2_mask+aunfl_mask+ainex_mask
set unf2inx_mask,	unfl_mask+inex2_mask+ainex_mask
set ovfinx_mask,	ovfl_mask+inex2_mask+aovfl_mask+ainex_mask
set inx1a_mask,		inex1_mask+ainex_mask
set inx2a_mask,		inex2_mask+ainex_mask
set snaniop_mask, 	nan_mask+snan_mask+aiop_mask
set snaniop2_mask,	snan_mask+aiop_mask
set naniop_mask,	nan_mask+aiop_mask
set neginf_mask,	neg_mask+inf_mask
set infaiop_mask, 	inf_mask+aiop_mask
set negz_mask,		neg_mask+z_mask
set opaop_mask,		operr_mask+aiop_mask
set unfl_inx_mask,	unfl_mask+aunfl_mask+ainex_mask
set ovfl_inx_mask,	ovfl_mask+aovfl_mask+ainex_mask

#########
# misc. #
#########
set rnd_stky_bit,	29			# stky bit pos in longword

set sign_bit,		0x7			# sign bit
set signan_bit,		0x6			# signalling nan bit

set sgl_thresh,		0x3f81			# minimum sgl exponent
set dbl_thresh,		0x3c01			# minimum dbl exponent

set x_mode,		0x0			# extended precision
set s_mode,		0x4			# single precision
set d_mode,		0x8			# double precision

set rn_mode,		0x0			# round-to-nearest
set rz_mode,		0x1			# round-to-zero
set rm_mode,		0x2			# round-tp-minus-infinity
set rp_mode,		0x3			# round-to-plus-infinity

set mantissalen,	64			# length of mantissa in bits

set BYTE,		1			# len(byte) == 1 byte
set WORD, 		2			# len(word) == 2 bytes
set LONG, 		4			# len(longword) == 2 bytes

set BSUN_VEC,		0xc0			# bsun    vector offset
set INEX_VEC,		0xc4			# inexact vector offset
set DZ_VEC,		0xc8			# dz      vector offset
set UNFL_VEC,		0xcc			# unfl    vector offset
set OPERR_VEC,		0xd0			# operr   vector offset
set OVFL_VEC,		0xd4			# ovfl    vector offset
set SNAN_VEC,		0xd8			# snan    vector offset

###########################
# SPecial CONDition FLaGs #
###########################
set ftrapcc_flg,	0x01			# flag bit: ftrapcc exception
set fbsun_flg,		0x02			# flag bit: bsun exception
set mia7_flg,		0x04			# flag bit: (a7)+ <ea>
set mda7_flg,		0x08			# flag bit: -(a7) <ea>
set fmovm_flg,		0x40			# flag bit: fmovm instruction
set immed_flg,		0x80			# flag bit: &<data> <ea>

set ftrapcc_bit,	0x0
set fbsun_bit,		0x1
set mia7_bit,		0x2
set mda7_bit,		0x3
set immed_bit,		0x7

##################################
# TRANSCENDENTAL "LAST-OP" FLAGS #
##################################
set FMUL_OP,		0x0			# fmul instr performed last
set FDIV_OP,		0x1			# fdiv performed last
set FADD_OP,		0x2			# fadd performed last
set FMOV_OP,		0x3			# fmov performed last

#############
# CONSTANTS #
#############
T1:	long		0x40C62D38,0xD3D64634	# 16381 LOG2 LEAD
T2:	long		0x3D6F90AE,0xB1E75CC7	# 16381 LOG2 TRAIL

PI:	long		0x40000000,0xC90FDAA2,0x2168C235,0x00000000
PIBY2:	long		0x3FFF0000,0xC90FDAA2,0x2168C235,0x00000000

TWOBYPI:
	long		0x3FE45F30,0x6DC9C883

#########################################################################
# MONADIC TEMPLATE							#
#########################################################################
	global		_fsins_
_fsins_:
	link		%a6,&-LOCAL_SIZE

	movm.l		&0x0303,EXC_DREGS(%a6)	# save d0-d1/a0-a1
	fmovm.l		%fpcr,%fpsr,USER_FPCR(%a6) # save ctrl regs
	fmovm.x		&0xc0,EXC_FP0(%a6)	# save fp0/fp1

	fmov.l		&0x0,%fpcr		# zero FPCR

#
#	copy, convert, and tag input argument
#
	fmov.s		0x8(%a6),%fp0		# load sgl input
	fmov.x		%fp0,FP_SRC(%a6)
	lea		FP_SRC(%a6),%a0
	bsr.l		tag			# fetch operand type
	mov.b		%d0,STAG(%a6)
	mov.b		%d0,%d1

	andi.l		&0x00ff00ff,USER_FPSR(%a6)

	clr.l		%d0
	mov.b		FPCR_MODE(%a6),%d0	# pass rnd mode,prec

	tst.b		%d1
	bne.b		_L0_2s
	bsr.l		ssin			# operand is a NORM
	bra.b		_L0_6s
_L0_2s:
	cmpi.b		%d1,&ZERO		# is operand a ZERO?
	bne.b		_L0_3s			# no
	bsr.l		src_zero			# yes
	bra.b		_L0_6s
_L0_3s:
	cmpi.b		%d1,&INF		# is operand an INF?
	bne.b		_L0_4s			# no
	bsr.l		t_operr			# yes
	bra.b		_L0_6s
_L0_4s:
	cmpi.b		%d1,&QNAN		# is operand a QNAN?
	bne.b		_L0_5s			# no
	bsr.l		src_qnan			# yes
	bra.b		_L0_6s
_L0_5s:
	bsr.l		ssind			# operand is a DENORM
_L0_6s:

#
#	Result is now in FP0
#
	movm.l		EXC_DREGS(%a6),&0x0303	# restore d0-d1/a0-a1
	fmovm.l		USER_FPCR(%a6),%fpcr,%fpsr # restore ctrl regs
	fmovm.x		EXC_FP1(%a6),&0x40	# restore fp1
	unlk		%a6
	rts

	global		_fsind_
_fsind_:
	link		%a6,&-LOCAL_SIZE

	movm.l		&0x0303,EXC_DREGS(%a6)	# save d0-d1/a0-a1
	fmovm.l		%fpcr,%fpsr,USER_FPCR(%a6) # save ctrl regs
	fmovm.x		&0xc0,EXC_FP0(%a6)	# save fp0/fp1

	fmov.l		&0x0,%fpcr		# zero FPCR

#
#	copy, convert, and tag input argument
#
	fmov.d		0x8(%a6),%fp0		# load dbl input
	fmov.x		%fp0,FP_SRC(%a6)
	lea		FP_SRC(%a6),%a0
	bsr.l		tag			# fetch operand type
	mov.b		%d0,STAG(%a6)
	mov.b		%d0,%d1

	andi.l		&0x00ff00ff,USER_FPSR(%a6)

	clr.l		%d0
	mov.b		FPCR_MODE(%a6),%d0	# pass rnd mode,prec

	mov.b		%d1,STAG(%a6)
	tst.b		%d1
	bne.b		_L0_2d
	bsr.l		ssin			# operand is a NORM
	bra.b		_L0_6d
_L0_2d:
	cmpi.b		%d1,&ZERO		# is operand a ZERO?
	bne.b		_L0_3d			# no
	bsr.l		src_zero			# yes
	bra.b		_L0_6d
_L0_3d:
	cmpi.b		%d1,&INF		# is operand an INF?
	bne.b		_L0_4d			# no
	bsr.l		t_operr			# yes
	bra.b		_L0_6d
_L0_4d:
	cmpi.b		%d1,&QNAN		# is operand a QNAN?
	bne.b		_L0_5d			# no
	bsr.l		src_qnan			# yes
	bra.b		_L0_6d
_L0_5d:
	bsr.l		ssind			# operand is a DENORM
_L0_6d:

#
#	Result is now in FP0
#
	movm.l		EXC_DREGS(%a6),&0x0303	# restore d0-d1/a0-a1
	fmovm.l		USER_FPCR(%a6),%fpcr,%fpsr # restore ctrl regs
	fmovm.x		EXC_FP1(%a6),&0x40	# restore fp1
	unlk		%a6
	rts

	global		_fsinx_
_fsinx_:
	link		%a6,&-LOCAL_SIZE

	movm.l		&0x0303,EXC_DREGS(%a6)	# save d0-d1/a0-a1
	fmovm.l		%fpcr,%fpsr,USER_FPCR(%a6) # save ctrl regs
	fmovm.x		&0xc0,EXC_FP0(%a6)	# save fp0/fp1

	fmov.l		&0x0,%fpcr		# zero FPCR

#
#	copy, convert, and tag input argument
#
	lea		FP_SRC(%a6),%a0
	mov.l		0x8+0x0(%a6),0x0(%a0)	# load ext input
	mov.l		0x8+0x4(%a6),0x4(%a0)
	mov.l		0x8+0x8(%a6),0x8(%a0)
	bsr.l		tag			# fetch operand type
	mov.b		%d0,STAG(%a6)
	mov.b		%d0,%d1

	andi.l		&0x00ff00ff,USER_FPSR(%a6)

	clr.l		%d0
	mov.b		FPCR_MODE(%a6),%d0	# pass rnd mode,prec

	tst.b		%d1
	bne.b		_L0_2x
	bsr.l		ssin			# operand is a NORM
	bra.b		_L0_6x
_L0_2x:
	cmpi.b		%d1,&ZERO		# is operand a ZERO?
	bne.b		_L0_3x			# no
	bsr.l		src_zero			# yes
	bra.b		_L0_6x
_L0_3x:
	cmpi.b		%d1,&INF		# is operand an INF?
	bne.b		_L0_4x			# no
	bsr.l		t_operr			# yes
	bra.b		_L0_6x
_L0_4x:
	cmpi.b		%d1,&QNAN		# is operand a QNAN?
	bne.b		_L0_5x			# no
	bsr.l		src_qnan			# yes
	bra.b		_L0_6x
_L0_5x:
	bsr.l		ssind			# operand is a DENORM
_L0_6x:

#
#	Result is now in FP0
#
	movm.l		EXC_DREGS(%a6),&0x0303	# restore d0-d1/a0-a1
	fmovm.l		USER_FPCR(%a6),%fpcr,%fpsr # restore ctrl regs
	fmovm.x		EXC_FP1(%a6),&0x40	# restore fp1
	unlk		%a6
	rts


#########################################################################
# MONADIC TEMPLATE							#
#########################################################################
	global		_fcoss_
_fcoss_:
	link		%a6,&-LOCAL_SIZE

	movm.l		&0x0303,EXC_DREGS(%a6)	# save d0-d1/a0-a1
	fmovm.l		%fpcr,%fpsr,USER_FPCR(%a6) # save ctrl regs
	fmovm.x		&0xc0,EXC_FP0(%a6)	# save fp0/fp1

	fmov.l		&0x0,%fpcr		# zero FPCR

#
#	copy, convert, and tag input argument
#
	fmov.s		0x8(%a6),%fp0		# load sgl input
	fmov.x		%fp0,FP_SRC(%a6)
	lea		FP_SRC(%a6),%a0
	bsr.l		tag			# fetch operand type
	mov.b		%d0,STAG(%a6)
	mov.b		%d0,%d1

	andi.l		&0x00ff00ff,USER_FPSR(%a6)

	clr.l		%d0
	mov.b		FPCR_MODE(%a6),%d0	# pass rnd mode,prec

	tst.b		%d1
	bne.b		_L1_2s
	bsr.l		scos			# operand is a NORM
	bra.b		_L1_6s
_L1_2s:
	cmpi.b		%d1,&ZERO		# is operand a ZERO?
	bne.b		_L1_3s			# no
	bsr.l		ld_pone			# yes
	bra.b		_L1_6s
_L1_3s:
	cmpi.b		%d1,&INF		# is operand an INF?
	bne.b		_L1_4s			# no
	bsr.l		t_operr			# yes
	bra.b		_L1_6s
_L1_4s:
	cmpi.b		%d1,&QNAN		# is operand a QNAN?
	bne.b		_L1_5s			# no
	bsr.l		src_qnan			# yes
	bra.b		_L1_6s
_L1_5s:
	bsr.l		scosd			# operand is a DENORM
_L1_6s:

#
#	Result is now in FP0
#
	movm.l		EXC_DREGS(%a6),&0x0303	# restore d0-d1/a0-a1
	fmovm.l		USER_FPCR(%a6),%fpcr,%fpsr # restore ctrl regs
	fmovm.x		EXC_FP1(%a6),&0x40	# restore fp1
	unlk		%a6
	rts

	global		_fcosd_
_fcosd_:
	link		%a6,&-LOCAL_SIZE

	movm.l		&0x0303,EXC_DREGS(%a6)	# save d0-d1/a0-a1
	fmovm.l		%fpcr,%fpsr,USER_FPCR(%a6) # save ctrl regs
	fmovm.x		&0xc0,EXC_FP0(%a6)	# save fp0/fp1

	fmov.l		&0x0,%fpcr		# zero FPCR

#
#	copy, convert, and tag input argument
#
	fmov.d		0x8(%a6),%fp0		# load dbl input
	fmov.x		%fp0,FP_SRC(%a6)
	lea		FP_SRC(%a6),%a0
	bsr.l		tag			# fetch operand type
	mov.b		%d0,STAG(%a6)
	mov.b		%d0,%d1

	andi.l		&0x00ff00ff,USER_FPSR(%a6)

	clr.l		%d0
	mov.b		FPCR_MODE(%a6),%d0	# pass rnd mode,prec

	mov.b		%d1,STAG(%a6)
	tst.b		%d1
	bne.b		_L1_2d
	bsr.l		scos			# operand is a NORM
	bra.b		_L1_6d
_L1_2d:
	cmpi.b		%d1,&ZERO		# is operand a ZERO?
	bne.b		_L1_3d			# no
	bsr.l		ld_pone			# yes
	bra.b		_L1_6d
_L1_3d:
	cmpi.b		%d1,&INF		# is operand an INF?
	bne.b		_L1_4d			# no
	bsr.l		t_operr			# yes
	bra.b		_L1_6d
_L1_4d:
	cmpi.b		%d1,&QNAN		# is operand a QNAN?
	bne.b		_L1_5d			# no
	bsr.l		src_qnan			# yes
	bra.b		_L1_6d
_L1_5d:
	bsr.l		scosd			# operand is a DENORM
_L1_6d:

#
#	Result is now in FP0
#
	movm.l		EXC_DREGS(%a6),&0x0303	# restore d0-d1/a0-a1
	fmovm.l		USER_FPCR(%a6),%fpcr,%fpsr # restore ctrl regs
	fmovm.x		EXC_FP1(%a6),&0x40	# restore fp1
	unlk		%a6
	rts

	global		_fcosx_
_fcosx_:
	link		%a6,&-LOCAL_SIZE

	movm.l		&0x0303,EXC_DREGS(%a6)	# save d0-d1/a0-a1
	fmovm.l		%fpcr,%fpsr,USER_FPCR(%a6) # save ctrl regs
	fmovm.x		&0xc0,EXC_FP0(%a6)	# save fp0/fp1

	fmov.l		&0x0,%fpcr		# zero FPCR

#
#	copy, convert, and tag input argument
#
	lea		FP_SRC(%a6),%a0
	mov.l		0x8+0x0(%a6),0x0(%a0)	# load ext input
	mov.l		0x8+0x4(%a6),0x4(%a0)
	mov.l		0x8+0x8(%a6),0x8(%a0)
	bsr.l		tag			# fetch operand type
	mov.b		%d0,STAG(%a6)
	mov.b		%d0,%d1

	andi.l		&0x00ff00ff,USER_FPSR(%a6)

	clr.l		%d0
	mov.b		FPCR_MODE(%a6),%d0	# pass rnd mode,prec

	tst.b		%d1
	bne.b		_L1_2x
	bsr.l		scos			# operand is a NORM
	bra.b		_L1_6x
_L1_2x:
	cmpi.b		%d1,&ZERO		# is operand a ZERO?
	bne.b		_L1_3x			# no
	bsr.l		ld_pone			# yes
	bra.b		_L1_6x
_L1_3x:
	cmpi.b		%d1,&INF		# is operand an INF?
	bne.b		_L1_4x			# no
	bsr.l		t_operr			# yes
	bra.b		_L1_6x
_L1_4x:
	cmpi.b		%d1,&QNAN		# is operand a QNAN?
	bne.b		_L1_5x			# no
	bsr.l		src_qnan			# yes
	bra.b		_L1_6x
_L1_5x:
	bsr.l		scosd			# operand is a DENORM
_L1_6x:

#
#	Result is now in FP0
#
	movm.l		EXC_DREGS(%a6),&0x0303	# restore d0-d1/a0-a1
	fmovm.l		USER_FPCR(%a6),%fpcr,%fpsr # restore ctrl regs
	fmovm.x		EXC_FP1(%a6),&0x40	# restore fp1
	unlk		%a6
	rts


#########################################################################
# MONADIC TEMPLATE							#
#########################################################################
	global		_fsinhs_
_fsinhs_:
	link		%a6,&-LOCAL_SIZE

	movm.l		&0x0303,EXC_DREGS(%a6)	# save d0-d1/a0-a1
	fmovm.l		%fpcr,%fpsr,USER_FPCR(%a6) # save ctrl regs
	fmovm.x		&0xc0,EXC_FP0(%a6)	# save fp0/fp1

	fmov.l		&0x0,%fpcr		# zero FPCR

#
#	copy, convert, and tag input argument
#
	fmov.s		0x8(%a6),%fp0		# load sgl input
	fmov.x		%fp0,FP_SRC(%a6)
	lea		FP_SRC(%a6),%a0
	bsr.l		tag			# fetch operand type
	mov.b		%d0,STAG(%a6)
	mov.b		%d0,%d1

	andi.l		&0x00ff00ff,USER_FPSR(%a6)

	clr.l		%d0
	mov.b		FPCR_MODE(%a6),%d0	# pass rnd mode,prec

	tst.b		%d1
	bne.b		_L2_2s
	bsr.l		ssinh			# operand is a NORM
	bra.b		_L2_6s
_L2_2s:
	cmpi.b		%d1,&ZERO		# is operand a ZERO?
	bne.b		_L2_3s			# no
	bsr.l		src_zero			# yes
	bra.b		_L2_6s
_L2_3s:
	cmpi.b		%d1,&INF		# is operand an INF?
	bne.b		_L2_4s			# no
	bsr.l		src_inf			# yes
	bra.b		_L2_6s
_L2_4s:
	cmpi.b		%d1,&QNAN		# is operand a QNAN?
	bne.b		_L2_5s			# no
	bsr.l		src_qnan			# yes
	bra.b		_L2_6s
_L2_5s:
	bsr.l		ssinhd			# operand is a DENORM
_L2_6s:

#
#	Result is now in FP0
#
	movm.l		EXC_DREGS(%a6),&0x0303	# restore d0-d1/a0-a1
	fmovm.l		USER_FPCR(%a6),%fpcr,%fpsr # restore ctrl regs
	fmovm.x		EXC_FP1(%a6),&0x40	# restore fp1
	unlk		%a6
	rts

	global		_fsinhd_
_fsinhd_:
	link		%a6,&-LOCAL_SIZE

	movm.l		&0x0303,EXC_DREGS(%a6)	# save d0-d1/a0-a1
	fmovm.l		%fpcr,%fpsr,USER_FPCR(%a6) # save ctrl regs
	fmovm.x		&0xc0,EXC_FP0(%a6)	# save fp0/fp1

	fmov.l		&0x0,%fpcr		# zero FPCR

#
#	copy, convert, and tag input argument
#
	fmov.d		0x8(%a6),%fp0		# load dbl input
	fmov.x		%fp0,FP_SRC(%a6)
	lea		FP_SRC(%a6),%a0
	bsr.l		tag			# fetch operand type
	mov.b		%d0,STAG(%a6)
	mov.b		%d0,%d1

	andi.l		&0x00ff00ff,USER_FPSR(%a6)

	clr.l		%d0
	mov.b		FPCR_MODE(%a6),%d0	# pass rnd mode,prec

	mov.b		%d1,STAG(%a6)
	tst.b		%d1
	bne.b		_L2_2d
	bsr.l		ssinh			# operand is a NORM
	bra.b		_L2_6d
_L2_2d:
	cmpi.b		%d1,&ZERO		# is operand a ZERO?
	bne.b		_L2_3d			# no
	bsr.l		src_zero			# yes
	bra.b		_L2_6d
_L2_3d:
	cmpi.b		%d1,&INF		# is operand an INF?
	bne.b		_L2_4d			# no
	bsr.l		src_inf			# yes
	bra.b		_L2_6d
_L2_4d:
	cmpi.b		%d1,&QNAN		# is operand a QNAN?
	bne.b		_L2_5d			# no
	bsr.l		src_qnan			# yes
	bra.b		_L2_6d
_L2_5d:
	bsr.l		ssinhd			# operand is a DENORM
_L2_6d:

#
#	Result is now in FP0
#
	movm.l		EXC_DREGS(%a6),&0x0303	# restore d0-d1/a0-a1
	fmovm.l		USER_FPCR(%a6),%fpcr,%fpsr # restore ctrl regs
	fmovm.x		EXC_FP1(%a6),&0x40	# restore fp1
	unlk		%a6
	rts

	global		_fsinhx_
_fsinhx_:
	link		%a6,&-LOCAL_SIZE

	movm.l		&0x0303,EXC_DREGS(%a6)	# save d0-d1/a0-a1
	fmovm.l		%fpcr,%fpsr,USER_FPCR(%a6) # save ctrl regs
	fmovm.x		&0xc0,EXC_FP0(%a6)	# save fp0/fp1

	fmov.l		&0x0,%fpcr		# zero FPCR

#
#	copy, convert, and tag input argument
#
	lea		FP_SRC(%a6),%a0
	mov.l		0x8+0x0(%a6),0x0(%a0)	# load ext input
	mov.l		0x8+0x4(%a6),0x4(%a0)
	mov.l		0x8+0x8(%a6),0x8(%a0)
	bsr.l		tag			# fetch operand type
	mov.b		%d0,STAG(%a6)
	mov.b		%d0,%d1

	andi.l		&0x00ff00ff,USER_FPSR(%a6)

	clr.l		%d0
	mov.b		FPCR_MODE(%a6),%d0	# pass rnd mode,prec

	tst.b		%d1
	bne.b		_L2_2x
	bsr.l		ssinh			# operand is a NORM
	bra.b		_L2_6x
_L2_2x:
	cmpi.b		%d1,&ZERO		# is operand a ZERO?
	bne.b		_L2_3x			# no
	bsr.l		src_zero			# yes
	bra.b		_L2_6x
_L2_3x:
	cmpi.b		%d1,&INF		# is operand an INF?
	bne.b		_L2_4x			# no
	bsr.l		src_inf			# yes
	bra.b		_L2_6x
_L2_4x:
	cmpi.b		%d1,&QNAN		# is operand a QNAN?
	bne.b		_L2_5x			# no
	bsr.l		src_qnan			# yes
	bra.b		_L2_6x
_L2_5x:
	bsr.l		ssinhd			# operand is a DENORM
_L2_6x:

#
#	Result is now in FP0
#
	movm.l		EXC_DREGS(%a6),&0x0303	# restore d0-d1/a0-a1
	fmovm.l		USER_FPCR(%a6),%fpcr,%fpsr # restore ctrl regs
	fmovm.x		EXC_FP1(%a6),&0x40	# restore fp1
	unlk		%a6
	rts


#########################################################################
# MONADIC TEMPLATE							#
#########################################################################
	global		_flognp1s_
_flognp1s_:
	link		%a6,&-LOCAL_SIZE

	movm.l		&0x0303,EXC_DREGS(%a6)	# save d0-d1/a0-a1
	fmovm.l		%fpcr,%fpsr,USER_FPCR(%a6) # save ctrl regs
	fmovm.x		&0xc0,EXC_FP0(%a6)	# save fp0/fp1

	fmov.l		&0x0,%fpcr		# zero FPCR

#
#	copy, convert, and tag input argument
#
	fmov.s		0x8(%a6),%fp0		# load sgl input
	fmov.x		%fp0,FP_SRC(%a6)
	lea		FP_SRC(%a6),%a0
	bsr.l		tag			# fetch operand type
	mov.b		%d0,STAG(%a6)
	mov.b		%d0,%d1

	andi.l		&0x00ff00ff,USER_FPSR(%a6)

	clr.l		%d0
	mov.b		FPCR_MODE(%a6),%d0	# pass rnd mode,prec

	tst.b		%d1
	bne.b		_L3_2s
	bsr.l		slognp1			# operand is a NORM
	bra.b		_L3_6s
_L3_2s:
	cmpi.b		%d1,&ZERO		# is operand a ZERO?
	bne.b		_L3_3s			# no
	bsr.l		src_zero			# yes
	bra.b		_L3_6s
_L3_3s:
	cmpi.b		%d1,&INF		# is operand an INF?
	bne.b		_L3_4s			# no
	bsr.l		sopr_inf			# yes
	bra.b		_L3_6s
_L3_4s:
	cmpi.b		%d1,&QNAN		# is operand a QNAN?
	bne.b		_L3_5s			# no
	bsr.l		src_qnan			# yes
	bra.b		_L3_6s
_L3_5s:
	bsr.l		slognp1d			# operand is a DENORM
_L3_6s:

#
#	Result is now in FP0
#
	movm.l		EXC_DREGS(%a6),&0x0303	# restore d0-d1/a0-a1
	fmovm.l		USER_FPCR(%a6),%fpcr,%fpsr # restore ctrl regs
	fmovm.x		EXC_FP1(%a6),&0x40	# restore fp1
	unlk		%a6
	rts

	global		_flognp1d_
_flognp1d_:
	link		%a6,&-LOCAL_SIZE

	movm.l		&0x0303,EXC_DREGS(%a6)	# save d0-d1/a0-a1
	fmovm.l		%fpcr,%fpsr,USER_FPCR(%a6) # save ctrl regs
	fmovm.x		&0xc0,EXC_FP0(%a6)	# save fp0/fp1

	fmov.l		&0x0,%fpcr		# zero FPCR

#
#	copy, convert, and tag input argument
#
	fmov.d		0x8(%a6),%fp0		# load dbl input
	fmov.x		%fp0,FP_SRC(%a6)
	lea		FP_SRC(%a6),%a0
	bsr.l		tag			# fetch operand type
	mov.b		%d0,STAG(%a6)
	mov.b		%d0,%d1

	andi.l		&0x00ff00ff,USER_FPSR(%a6)

	clr.l		%d0
	mov.b		FPCR_MODE(%a6),%d0	# pass rnd mode,prec

	mov.b		%d1,STAG(%a6)
	tst.b		%d1
	bne.b		_L3_2d
	bsr.l		slognp1			# operand is a NORM
	bra.b		_L3_6d
_L3_2d:
	cmpi.b		%d1,&ZERO		# is operand a ZERO?
	bne.b		_L3_3d			# no
	bsr.l		src_zero			# yes
	bra.b		_L3_6d
_L3_3d:
	cmpi.b		%d1,&INF		# is operand an INF?
	bne.b		_L3_4d			# no
	bsr.l		sopr_inf			# yes
	bra.b		_L3_6d
_L3_4d:
	cmpi.b		%d1,&QNAN		# is operand a QNAN?
	bne.b		_L3_5d			# no
	bsr.l		src_qnan			# yes
	bra.b		_L3_6d
_L3_5d:
	bsr.l		slognp1d			# operand is a DENORM
_L3_6d:

#
#	Result is now in FP0
#
	movm.l		EXC_DREGS(%a6),&0x0303	# restore d0-d1/a0-a1
	fmovm.l		USER_FPCR(%a6),%fpcr,%fpsr # restore ctrl regs
	fmovm.x		EXC_FP1(%a6),&0x40	# restore fp1
	unlk		%a6
	rts

	global		_flognp1x_
_flognp1x_:
	link		%a6,&-LOCAL_SIZE

	movm.l		&0x0303,EXC_DREGS(%a6)	# save d0-d1/a0-a1
	fmovm.l		%fpcr,%fpsr,USER_FPCR(%a6) # save ctrl regs
	fmovm.x		&0xc0,EXC_FP0(%a6)	# save fp0/fp1

	fmov.l		&0x0,%fpcr		# zero FPCR

#
#	copy, convert, and tag input argument
#
	lea		FP_SRC(%a6),%a0
	mov.l		0x8+0x0(%a6),0x0(%a0)	# load ext input
	mov.l		0x8+0x4(%a6),0x4(%a0)
	mov.l		0x8+0x8(%a6),0x8(%a0)
	bsr.l		tag			# fetch operand type
	mov.b		%d0,STAG(%a6)
	mov.b		%d0,%d1

	andi.l		&0x00ff00ff,USER_FPSR(%a6)

	clr.l		%d0
	mov.b		FPCR_MODE(%a6),%d0	# pass rnd mode,prec

	tst.b		%d1
	bne.b		_L3_2x
	bsr.l		slognp1			# operand is a NORM
	bra.b		_L3_6x
_L3_2x:
	cmpi.b		%d1,&ZERO		# is operand a ZERO?
	bne.b		_L3_3x			# no
	bsr.l		src_zero			# yes
	bra.b		_L3_6x
_L3_3x:
	cmpi.b		%d1,&INF		# is operand an INF?
	bne.b		_L3_4x			# no
	bsr.l		sopr_inf			# yes
	bra.b		_L3_6x
_L3_4x:
	cmpi.b		%d1,&QNAN		# is operand a QNAN?
	bne.b		_L3_5x			# no
	bsr.l		src_qnan			# yes
	bra.b		_L3_6x
_L3_5x:
	bsr.l		slognp1d			# operand is a DENORM
_L3_6x:

#
#	Result is now in FP0
#
	movm.l		EXC_DREGS(%a6),&0x0303	# restore d0-d1/a0-a1
	fmovm.l		USER_FPCR(%a6),%fpcr,%fpsr # restore ctrl regs
	fmovm.x		EXC_FP1(%a6),&0x40	# restore fp1
	unlk		%a6
	rts


#########################################################################
# MONADIC TEMPLATE							#
#########################################################################
	global		_fetoxm1s_
_fetoxm1s_:
	link		%a6,&-LOCAL_SIZE

	movm.l		&0x0303,EXC_DREGS(%a6)	# save d0-d1/a0-a1
	fmovm.l		%fpcr,%fpsr,USER_FPCR(%a6) # save ctrl regs
	fmovm.x		&0xc0,EXC_FP0(%a6)	# save fp0/fp1

	fmov.l		&0x0,%fpcr		# zero FPCR

#
#	copy, convert, and tag input argument
#
	fmov.s		0x8(%a6),%fp0		# load sgl input
	fmov.x		%fp0,FP_SRC(%a6)
	lea		FP_SRC(%a6),%a0
	bsr.l		tag			# fetch operand type
	mov.b		%d0,STAG(%a6)
	mov.b		%d0,%d1

	andi.l		&0x00ff00ff,USER_FPSR(%a6)

	clr.l		%d0
	mov.b		FPCR_MODE(%a6),%d0	# pass rnd mode,prec

	tst.b		%d1
	bne.b		_L4_2s
	bsr.l		setoxm1			# operand is a NORM
	bra.b		_L4_6s
_L4_2s:
	cmpi.b		%d1,&ZERO		# is operand a ZERO?
	bne.b		_L4_3s			# no
	bsr.l		src_zero			# yes
	bra.b		_L4_6s
_L4_3s:
	cmpi.b		%d1,&INF		# is operand an INF?
	bne.b		_L4_4s			# no
	bsr.l		setoxm1i			# yes
	bra.b		_L4_6s
_L4_4s:
	cmpi.b		%d1,&QNAN		# is operand a QNAN?
	bne.b		_L4_5s			# no
	bsr.l		src_qnan			# yes
	bra.b		_L4_6s
_L4_5s:
	bsr.l		setoxm1d			# operand is a DENORM
_L4_6s:

#
#	Result is now in FP0
#
	movm.l		EXC_DREGS(%a6),&0x0303	# restore d0-d1/a0-a1
	fmovm.l		USER_FPCR(%a6),%fpcr,%fpsr # restore ctrl regs
	fmovm.x		EXC_FP1(%a6),&0x40	# restore fp1
	unlk		%a6
	rts

	global		_fetoxm1d_
_fetoxm1d_:
	link		%a6,&-LOCAL_SIZE

	movm.l		&0x0303,EXC_DREGS(%a6)	# save d0-d1/a0-a1
	fmovm.l		%fpcr,%fpsr,USER_FPCR(%a6) # save ctrl regs
	fmovm.x		&0xc0,EXC_FP0(%a6)	# save fp0/fp1

	fmov.l		&0x0,%fpcr		# zero FPCR

#
#	copy, convert, and tag input argument
#
	fmov.d		0x8(%a6),%fp0		# load dbl input
	fmov.x		%fp0,FP_SRC(%a6)
	lea		FP_SRC(%a6),%a0
	bsr.l		tag			# fetch operand type
	mov.b		%d0,STAG(%a6)
	mov.b		%d0,%d1

	andi.l		&0x00ff00ff,USER_FPSR(%a6)

	clr.l		%d0
	mov.b		FPCR_MODE(%a6),%d0	# pass rnd mode,prec

	mov.b		%d1,STAG(%a6)
	tst.b		%d1
	bne.b		_L4_2d
	bsr.l		setoxm1			# operand is a NORM
	bra.b		_L4_6d
_L4_2d:
	cmpi.b		%d1,&ZERO		# is operand a ZERO?
	bne.b		_L4_3d			# no
	bsr.l		src_zero			# yes
	bra.b		_L4_6d
_L4_3d:
	cmpi.b		%d1,&INF		# is operand an INF?
	bne.b		_L4_4d			# no
	bsr.l		setoxm1i			# yes
	bra.b		_L4_6d
_L4_4d:
	cmpi.b		%d1,&QNAN		# is operand a QNAN?
	bne.b		_L4_5d			# no
	bsr.l		src_qnan			# yes
	bra.b		_L4_6d
_L4_5d:
	bsr.l		setoxm1d			# operand is a DENORM
_L4_6d:

#
#	Result is now in FP0
#
	movm.l		EXC_DREGS(%a6),&0x0303	# restore d0-d1/a0-a1
	fmovm.l		USER_FPCR(%a6),%fpcr,%fpsr # restore ctrl regs
	fmovm.x		EXC_FP1(%a6),&0x40	# restore fp1
	unlk		%a6
	rts

	global		_fetoxm1x_
_fetoxm1x_:
	link		%a6,&-LOCAL_SIZE

	movm.l		&0x0303,EXC_DREGS(%a6)	# save d0-d1/a0-a1
	fmovm.l		%fpcr,%fpsr,USER_FPCR(%a6) # save ctrl regs
	fmovm.x		&0xc0,EXC_FP0(%a6)	# save fp0/fp1

	fmov.l		&0x0,%fpcr		# zero FPCR

#
#	copy, convert, and tag input argument
#
	lea		FP_SRC(%a6),%a0
	mov.l		0x8+0x0(%a6),0x0(%a0)	# load ext input
	mov.l		0x8+0x4(%a6),0x4(%a0)
	mov.l		0x8+0x8(%a6),0x8(%a0)
	bsr.l		tag			# fetch operand type
	mov.b		%d0,STAG(%a6)
	mov.b		%d0,%d1

	andi.l		&0x00ff00ff,USER_FPSR(%a6)

	clr.l		%d0
	mov.b		FPCR_MODE(%a6),%d0	# pass rnd mode,prec

	tst.b		%d1
	bne.b		_L4_2x
	bsr.l		setoxm1			# operand is a NORM
	bra.b		_L4_6x
_L4_2x:
	cmpi.b		%d1,&ZERO		# is operand a ZERO?
	bne.b		_L4_3x			# no
	bsr.l		src_zero			# yes
	bra.b		_L4_6x
_L4_3x:
	cmpi.b		%d1,&INF		# is operand an INF?
	bne.b		_L4_4x			# no
	bsr.l		setoxm1i			# yes
	bra.b		_L4_6x
_L4_4x:
	cmpi.b		%d1,&QNAN		# is operand a QNAN?
	bne.b		_L4_5x			# no
	bsr.l		src_qnan			# yes
	bra.b		_L4_6x
_L4_5x:
	bsr.l		setoxm1d			# operand is a DENORM
_L4_6x:

#
#	Result is now in FP0
#
	movm.l		EXC_DREGS(%a6),&0x0303	# restore d0-d1/a0-a1
	fmovm.l		USER_FPCR(%a6),%fpcr,%fpsr # restore ctrl regs
	fmovm.x		EXC_FP1(%a6),&0x40	# restore fp1
	unlk		%a6
	rts


#########################################################################
# MONADIC TEMPLATE							#
#########################################################################
	global		_ftanhs_
_ftanhs_:
	link		%a6,&-LOCAL_SIZE

	movm.l		&0x0303,EXC_DREGS(%a6)	# save d0-d1/a0-a1
	fmovm.l		%fpcr,%fpsr,USER_FPCR(%a6) # save ctrl regs
	fmovm.x		&0xc0,EXC_FP0(%a6)	# save fp0/fp1

	fmov.l		&0x0,%fpcr		# zero FPCR

#
#	copy, convert, and tag input argument
#
	fmov.s		0x8(%a6),%fp0		# load sgl input
	fmov.x		%fp0,FP_SRC(%a6)
	lea		FP_SRC(%a6),%a0
	bsr.l		tag			# fetch operand type
	mov.b		%d0,STAG(%a6)
	mov.b		%d0,%d1

	andi.l		&0x00ff00ff,USER_FPSR(%a6)

	clr.l		%d0
	mov.b		FPCR_MODE(%a6),%d0	# pass rnd mode,prec

	tst.b		%d1
	bne.b		_L5_2s
	bsr.l		stanh			# operand is a NORM
	bra.b		_L5_6s
_L5_2s:
	cmpi.b		%d1,&ZERO		# is operand a ZERO?
	bne.b		_L5_3s			# no
	bsr.l		src_zero			# yes
	bra.b		_L5_6s
_L5_3s:
	cmpi.b		%d1,&INF		# is operand an INF?
	bne.b		_L5_4s			# no
	bsr.l		src_one			# yes
	bra.b		_L5_6s
_L5_4s:
	cmpi.b		%d1,&QNAN		# is operand a QNAN?
	bne.b		_L5_5s			# no
	bsr.l		src_qnan			# yes
	bra.b		_L5_6s
_L5_5s:
	bsr.l		stanhd			# operand is a DENORM
_L5_6s:

#
#	Result is now in FP0
#
	movm.l		EXC_DREGS(%a6),&0x0303	# restore d0-d1/a0-a1
	fmovm.l		USER_FPCR(%a6),%fpcr,%fpsr # restore ctrl regs
	fmovm.x		EXC_FP1(%a6),&0x40	# restore fp1
	unlk		%a6
	rts

	global		_ftanhd_
_ftanhd_:
	link		%a6,&-LOCAL_SIZE

	movm.l		&0x0303,EXC_DREGS(%a6)	# save d0-d1/a0-a1
	fmovm.l		%fpcr,%fpsr,USER_FPCR(%a6) # save ctrl regs
	fmovm.x		&0xc0,EXC_FP0(%a6)	# save fp0/fp1

	fmov.l		&0x0,%fpcr		# zero FPCR

#
#	copy, convert, and tag input argument
#
	fmov.d		0x8(%a6),%fp0		# load dbl input
	fmov.x		%fp0,FP_SRC(%a6)
	lea		FP_SRC(%a6),%a0
	bsr.l		tag			# fetch operand type
	mov.b		%d0,STAG(%a6)
	mov.b		%d0,%d1

	andi.l		&0x00ff00ff,USER_FPSR(%a6)

	clr.l		%d0
	mov.b		FPCR_MODE(%a6),%d0	# pass rnd mode,prec

	mov.b		%d1,STAG(%a6)
	tst.b		%d1
	bne.b		_L5_2d
	bsr.l		stanh			# operand is a NORM
	bra.b		_L5_6d
_L5_2d:
	cmpi.b		%d1,&ZERO		# is operand a ZERO?
	bne.b		_L5_3d			# no
	bsr.l		src_zero			# yes
	bra.b		_L5_6d
_L5_3d:
	cmpi.b		%d1,&INF		# is operand an INF?
	bne.b		_L5_4d			# no
	bsr.l		src_one			# yes
	bra.b		_L5_6d
_L5_4d:
	cmpi.b		%d1,&QNAN		# is operand a QNAN?
	bne.b		_L5_5d			# no
	bsr.l		src_qnan			# yes
	bra.b		_L5_6d
_L5_5d:
	bsr.l		stanhd			# operand is a DENORM
_L5_6d:

#
#	Result is now in FP0
#
	movm.l		EXC_DREGS(%a6),&0x0303	# restore d0-d1/a0-a1
	fmovm.l		USER_FPCR(%a6),%fpcr,%fpsr # restore ctrl regs
	fmovm.x		EXC_FP1(%a6),&0x40	# restore fp1
	unlk		%a6
	rts

	global		_ftanhx_
_ftanhx_:
	link		%a6,&-LOCAL_SIZE

	movm.l		&0x0303,EXC_DREGS(%a6)	# save d0-d1/a0-a1
	fmovm.l		%fpcr,%fpsr,USER_FPCR(%a6) # save ctrl regs
	fmovm.x		&0xc0,EXC_FP0(%a6)	# save fp0/fp1

	fmov.l		&0x0,%fpcr		# zero FPCR

#
#	copy, convert, and tag input argument
#
	lea		FP_SRC(%a6),%a0
	mov.l		0x8+0x0(%a6),0x0(%a0)	# load ext input
	mov.l		0x8+0x4(%a6),0x4(%a0)
	mov.l		0x8+0x8(%a6),0x8(%a0)
	bsr.l		tag			# fetch operand type
	mov.b		%d0,STAG(%a6)
	mov.b		%d0,%d1

	andi.l		&0x00ff00ff,USER_FPSR(%a6)

	clr.l		%d0
	mov.b		FPCR_MODE(%a6),%d0	# pass rnd mode,prec

	tst.b		%d1
	bne.b		_L5_2x
	bsr.l		stanh			# operand is a NORM
	bra.b		_L5_6x
_L5_2x:
	cmpi.b		%d1,&ZERO		# is operand a ZERO?
	bne.b		_L5_3x			# no
	bsr.l		src_zero			# yes
	bra.b		_L5_6x
_L5_3x:
	cmpi.b		%d1,&INF		# is operand an INF?
	bne.b		_L5_4x			# no
	bsr.l		src_one			# yes
	bra.b		_L5_6x
_L5_4x:
	cmpi.b		%d1,&QNAN		# is operand a QNAN?
	bne.b		_L5_5x			# no
	bsr.l		src_qnan			# yes
	bra.b		_L5_6x
_L5_5x:
	bsr.l		stanhd			# operand is a DENORM
_L5_6x:

#
#	Result is now in FP0
#
	movm.l		EXC_DREGS(%a6),&0x0303	# restore d0-d1/a0-a1
	fmovm.l		USER_FPCR(%a6),%fpcr,%fpsr # restore ctrl regs
	fmovm.x		EXC_FP1(%a6),&0x40	# restore fp1
	unlk		%a6
	rts


#########################################################################
# MONADIC TEMPLATE							#
#########################################################################
	global		_fatans_
_fatans_:
	link		%a6,&-LOCAL_SIZE

	movm.l		&0x0303,EXC_DREGS(%a6)	# save d0-d1/a0-a1
	fmovm.l		%fpcr,%fpsr,USER_FPCR(%a6) # save ctrl regs
	fmovm.x		&0xc0,EXC_FP0(%a6)	# save fp0/fp1

	fmov.l		&0x0,%fpcr		# zero FPCR

#
#	copy, convert, and tag input argument
#
	fmov.s		0x8(%a6),%fp0		# load sgl input
	fmov.x		%fp0,FP_SRC(%a6)
	lea		FP_SRC(%a6),%a0
	bsr.l		tag			# fetch operand type
	mov.b		%d0,STAG(%a6)
	mov.b		%d0,%d1

	andi.l		&0x00ff00ff,USER_FPSR(%a6)

	clr.l		%d0
	mov.b		FPCR_MODE(%a6),%d0	# pass rnd mode,prec

	tst.b		%d1
	bne.b		_L6_2s
	bsr.l		satan			# operand is a NORM
	bra.b		_L6_6s
_L6_2s:
	cmpi.b		%d1,&ZERO		# is operand a ZERO?
	bne.b		_L6_3s			# no
	bsr.l		src_zero			# yes
	bra.b		_L6_6s
_L6_3s:
	cmpi.b		%d1,&INF		# is operand an INF?
	bne.b		_L6_4s			# no
	bsr.l		spi_2			# yes
	bra.b		_L6_6s
_L6_4s:
	cmpi.b		%d1,&QNAN		# is operand a QNAN?
	bne.b		_L6_5s			# no
	bsr.l		src_qnan			# yes
	bra.b		_L6_6s
_L6_5s:
	bsr.l		satand			# operand is a DENORM
_L6_6s:

#
#	Result is now in FP0
#
	movm.l		EXC_DREGS(%a6),&0x0303	# restore d0-d1/a0-a1
	fmovm.l		USER_FPCR(%a6),%fpcr,%fpsr # restore ctrl regs
	fmovm.x		EXC_FP1(%a6),&0x40	# restore fp1
	unlk		%a6
	rts

	global		_fatand_
_fatand_:
	link		%a6,&-LOCAL_SIZE

	movm.l		&0x0303,EXC_DREGS(%a6)	# save d0-d1/a0-a1
	fmovm.l		%fpcr,%fpsr,USER_FPCR(%a6) # save ctrl regs
	fmovm.x		&0xc0,EXC_FP0(%a6)	# save fp0/fp1

	fmov.l		&0x0,%fpcr		# zero FPCR

#
#	copy, convert, and tag input argument
#
	fmov.d		0x8(%a6),%fp0		# load dbl input
	fmov.x		%fp0,FP_SRC(%a6)
	lea		FP_SRC(%a6),%a0
	bsr.l		tag			# fetch operand type
	mov.b		%d0,STAG(%a6)
	mov.b		%d0,%d1

	andi.l		&0x00ff00ff,USER_FPSR(%a6)

	clr.l		%d0
	mov.b		FPCR_MODE(%a6),%d0	# pass rnd mode,prec

	mov.b		%d1,STAG(%a6)
	tst.b		%d1
	bne.b		_L6_2d
	bsr.l		satan			# operand is a NORM
	bra.b		_L6_6d
_L6_2d:
	cmpi.b		%d1,&ZERO		# is operand a ZERO?
	bne.b		_L6_3d			# no
	bsr.l		src_zero			# yes
	bra.b		_L6_6d
_L6_3d:
	cmpi.b		%d1,&INF		# is operand an INF?
	bne.b		_L6_4d			# no
	bsr.l		spi_2			# yes
	bra.b		_L6_6d
_L6_4d:
	cmpi.b		%d1,&QNAN		# is operand a QNAN?
	bne.b		_L6_5d			# no
	bsr.l		src_qnan			# yes
	bra.b		_L6_6d
_L6_5d:
	bsr.l		satand			# operand is a DENORM
_L6_6d:

#
#	Result is now in FP0
#
	movm.l		EXC_DREGS(%a6),&0x0303	# restore d0-d1/a0-a1
	fmovm.l		USER_FPCR(%a6),%fpcr,%fpsr # restore ctrl regs
	fmovm.x		EXC_FP1(%a6),&0x40	# restore fp1
	unlk		%a6
	rts

	global		_fatanx_
_fatanx_:
	link		%a6,&-LOCAL_SIZE

	movm.l		&0x0303,EXC_DREGS(%a6)	# save d0-d1/a0-a1
	fmovm.l		%fpcr,%fpsr,USER_FPCR(%a6) # save ctrl regs
	fmovm.x		&0xc0,EXC_FP0(%a6)	# save fp0/fp1

	fmov.l		&0x0,%fpcr		# zero FPCR

#
#	copy, convert, and tag input argument
#
	lea		FP_SRC(%a6),%a0
	mov.l		0x8+0x0(%a6),0x0(%a0)	# load ext input
	mov.l		0x8+0x4(%a6),0x4(%a0)
	mov.l		0x8+0x8(%a6),0x8(%a0)
	bsr.l		tag			# fetch operand type
	mov.b		%d0,STAG(%a6)
	mov.b		%d0,%d1

	andi.l		&0x00ff00ff,USER_FPSR(%a6)

	clr.l		%d0
	mov.b		FPCR_MODE(%a6),%d0	# pass rnd mode,prec

	tst.b		%d1
	bne.b		_L6_2x
	bsr.l		satan			# operand is a NORM
	bra.b		_L6_6x
_L6_2x:
	cmpi.b		%d1,&ZERO		# is operand a ZERO?
	bne.b		_L6_3x			# no
	bsr.l		src_zero			# yes
	bra.b		_L6_6x
_L6_3x:
	cmpi.b		%d1,&INF		# is operand an INF?
	bne.b		_L6_4x			# no
	bsr.l		spi_2			# yes
	bra.b		_L6_6x
_L6_4x:
	cmpi.b		%d1,&QNAN		# is operand a QNAN?
	bne.b		_L6_5x			# no
	bsr.l		src_qnan			# yes
	bra.b		_L6_6x
_L6_5x:
	bsr.l		satand			# operand is a DENORM
_L6_6x:

#
#	Result is now in FP0
#
	movm.l		EXC_DREGS(%a6),&0x0303	# restore d0-d1/a0-a1
	fmovm.l		USER_FPCR(%a6),%fpcr,%fpsr # restore ctrl regs
	fmovm.x		EXC_FP1(%a6),&0x40	# restore fp1
	unlk		%a6
	rts


#########################################################################
# MONADIC TEMPLATE							#
#########################################################################
	global		_fasins_
_fasins_:
	link		%a6,&-LOCAL_SIZE

	movm.l		&0x0303,EXC_DREGS(%a6)	# save d0-d1/a0-a1
	fmovm.l		%fpcr,%fpsr,USER_FPCR(%a6) # save ctrl regs
	fmovm.x		&0xc0,EXC_FP0(%a6)	# save fp0/fp1

	fmov.l		&0x0,%fpcr		# zero FPCR

#
#	copy, convert, and tag input argument
#
	fmov.s		0x8(%a6),%fp0		# load sgl input
	fmov.x		%fp0,FP_SRC(%a6)
	lea		FP_SRC(%a6),%a0
	bsr.l		tag			# fetch operand type
	mov.b		%d0,STAG(%a6)
	mov.b		%d0,%d1

	andi.l		&0x00ff00ff,USER_FPSR(%a6)

	clr.l		%d0
	mov.b		FPCR_MODE(%a6),%d0	# pass rnd mode,prec

	tst.b		%d1
	bne.b		_L7_2s
	bsr.l		sasin			# operand is a NORM
	bra.b		_L7_6s
_L7_2s:
	cmpi.b		%d1,&ZERO		# is operand a ZERO?
	bne.b		_L7_3s			# no
	bsr.l		src_zero			# yes
	bra.b		_L7_6s
_L7_3s:
	cmpi.b		%d1,&INF		# is operand an INF?
	bne.b		_L7_4s			# no
	bsr.l		t_operr			# yes
	bra.b		_L7_6s
_L7_4s:
	cmpi.b		%d1,&QNAN		# is operand a QNAN?
	bne.b		_L7_5s			# no
	bsr.l		src_qnan			# yes
	bra.b		_L7_6s
_L7_5s:
	bsr.l		sasind			# operand is a DENORM
_L7_6s:

#
#	Result is now in FP0
#
	movm.l		EXC_DREGS(%a6),&0x0303	# restore d0-d1/a0-a1
	fmovm.l		USER_FPCR(%a6),%fpcr,%fpsr # restore ctrl regs
	fmovm.x		EXC_FP1(%a6),&0x40	# restore fp1
	unlk		%a6
	rts

	global		_fasind_
_fasind_:
	link		%a6,&-LOCAL_SIZE

	movm.l		&0x0303,EXC_DREGS(%a6)	# save d0-d1/a0-a1
	fmovm.l		%fpcr,%fpsr,USER_FPCR(%a6) # save ctrl regs
	fmovm.x		&0xc0,EXC_FP0(%a6)	# save fp0/fp1

	fmov.l		&0x0,%fpcr		# zero FPCR

#
#	copy, convert, and tag input argument
#
	fmov.d		0x8(%a6),%fp0		# load dbl input
	fmov.x		%fp0,FP_SRC(%a6)
	lea		FP_SRC(%a6),%a0
	bsr.l		tag			# fetch operand type
	mov.b		%d0,STAG(%a6)
	mov.b		%d0,%d1

	andi.l		&0x00ff00ff,USER_FPSR(%a6)

	clr.l		%d0
	mov.b		FPCR_MODE(%a6),%d0	# pass rnd mode,prec

	mov.b		%d1,STAG(%a6)
	tst.b		%d1
	bne.b		_L7_2d
	bsr.l		sasin			# operand is a NORM
	bra.b		_L7_6d
_L7_2d:
	cmpi.b		%d1,&ZERO		# is operand a ZERO?
	bne.b		_L7_3d			# no
	bsr.l		src_zero			# yes
	bra.b		_L7_6d
_L7_3d:
	cmpi.b		%d1,&INF		# is operand an INF?
	bne.b		_L7_4d			# no
	bsr.l		t_operr			# yes
	bra.b		_L7_6d
_L7_4d:
	cmpi.b		%d1,&QNAN		# is operand a QNAN?
	bne.b		_L7_5d			# no
	bsr.l		src_qnan			# yes
	bra.b		_L7_6d
_L7_5d:
	bsr.l		sasind			# operand is a DENORM
_L7_6d:

#
#	Result is now in FP0
#
	movm.l		EXC_DREGS(%a6),&0x0303	# restore d0-d1/a0-a1
	fmovm.l		USER_FPCR(%a6),%fpcr,%fpsr # restore ctrl regs
	fmovm.x		EXC_FP1(%a6),&0x40	# restore fp1
	unlk		%a6
	rts

	global		_fasinx_
_fasinx_:
	link		%a6,&-LOCAL_SIZE

	movm.l		&0x0303,EXC_DREGS(%a6)	# save d0-d1/a0-a1
	fmovm.l		%fpcr,%fpsr,USER_FPCR(%a6) # save ctrl regs
	fmovm.x		&0xc0,EXC_FP0(%a6)	# save fp0/fp1

	fmov.l		&0x0,%fpcr		# zero FPCR

#
#	copy, convert, and tag input argument
#
	lea		FP_SRC(%a6),%a0
	mov.l		0x8+0x0(%a6),0x0(%a0)	# load ext input
	mov.l		0x8+0x4(%a6),0x4(%a0)
	mov.l		0x8+0x8(%a6),0x8(%a0)
	bsr.l		tag			# fetch operand type
	mov.b		%d0,STAG(%a6)
	mov.b		%d0,%d1

	andi.l		&0x00ff00ff,USER_FPSR(%a6)

	clr.l		%d0
	mov.b		FPCR_MODE(%a6),%d0	# pass rnd mode,prec

	tst.b		%d1
	bne.b		_L7_2x
	bsr.l		sasin			# operand is a NORM
	bra.b		_L7_6x
_L7_2x:
	cmpi.b		%d1,&ZERO		# is operand a ZERO?
	bne.b		_L7_3x			# no
	bsr.l		src_zero			# yes
	bra.b		_L7_6x
_L7_3x:
	cmpi.b		%d1,&INF		# is operand an INF?
	bne.b		_L7_4x			# no
	bsr.l		t_operr			# yes
	bra.b		_L7_6x
_L7_4x:
	cmpi.b		%d1,&QNAN		# is operand a QNAN?
	bne.b		_L7_5x			# no
	bsr.l		src_qnan			# yes
	bra.b		_L7_6x
_L7_5x:
	bsr.l		sasind			# operand is a DENORM
_L7_6x:

#
#	Result is now in FP0
#
	movm.l		EXC_DREGS(%a6),&0x0303	# restore d0-d1/a0-a1
	fmovm.l		USER_FPCR(%a6),%fpcr,%fpsr # restore ctrl regs
	fmovm.x		EXC_FP1(%a6),&0x40	# restore fp1
	unlk		%a6
	rts


#########################################################################
# MONADIC TEMPLATE							#
#########################################################################
	global		_fatanhs_
_fatanhs_:
	link		%a6,&-LOCAL_SIZE

	movm.l		&0x0303,EXC_DREGS(%a6)	# save d0-d1/a0-a1
	fmovm.l		%fpcr,%fpsr,USER_FPCR(%a6) # save ctrl regs
	fmovm.x		&0xc0,EXC_FP0(%a6)	# save fp0/fp1

	fmov.l		&0x0,%fpcr		# zero FPCR

#
#	copy, convert, and tag input argument
#
	fmov.s		0x8(%a6),%fp0		# load sgl input
	fmov.x		%fp0,FP_SRC(%a6)
	lea		FP_SRC(%a6),%a0
	bsr.l		tag			# fetch operand type
	mov.b		%d0,STAG(%a6)
	mov.b		%d0,%d1

	andi.l		&0x00ff00ff,USER_FPSR(%a6)

	clr.l		%d0
	mov.b		FPCR_MODE(%a6),%d0	# pass rnd mode,prec

	tst.b		%d1
	bne.b		_L8_2s
	bsr.l		satanh			# operand is a NORM
	bra.b		_L8_6s
_L8_2s:
	cmpi.b		%d1,&ZERO		# is operand a ZERO?
	bne.b		_L8_3s			# no
	bsr.l		src_zero			# yes
	bra.b		_L8_6s
_L8_3s:
	cmpi.b		%d1,&INF		# is operand an INF?
	bne.b		_L8_4s			# no
	bsr.l		t_operr			# yes
	bra.b		_L8_6s
_L8_4s:
	cmpi.b		%d1,&QNAN		# is operand a QNAN?
	bne.b		_L8_5s			# no
	bsr.l		src_qnan			# yes
	bra.b		_L8_6s
_L8_5s:
	bsr.l		satanhd			# operand is a DENORM
_L8_6s:

#
#	Result is now in FP0
#
	movm.l		EXC_DREGS(%a6),&0x0303	# restore d0-d1/a0-a1
	fmovm.l		USER_FPCR(%a6),%fpcr,%fpsr # restore ctrl regs
	fmovm.x		EXC_FP1(%a6),&0x40	# restore fp1
	unlk		%a6
	rts

	global		_fatanhd_
_fatanhd_:
	link		%a6,&-LOCAL_SIZE

	movm.l		&0x0303,EXC_DREGS(%a6)	# save d0-d1/a0-a1
	fmovm.l		%fpcr,%fpsr,USER_FPCR(%a6) # save ctrl regs
	fmovm.x		&0xc0,EXC_FP0(%a6)	# save fp0/fp1

	fmov.l		&0x0,%fpcr		# zero FPCR

#
#	copy, convert, and tag input argument
#
	fmov.d		0x8(%a6),%fp0		# load dbl input
	fmov.x		%fp0,FP_SRC(%a6)
	lea		FP_SRC(%a6),%a0
	bsr.l		tag			# fetch operand type
	mov.b		%d0,STAG(%a6)
	mov.b		%d0,%d1

	andi.l		&0x00ff00ff,USER_FPSR(%a6)

	clr.l		%d0
	mov.b		FPCR_MODE(%a6),%d0	# pass rnd mode,prec

	mov.b		%d1,STAG(%a6)
	tst.b		%d1
	bne.b		_L8_2d
	bsr.l		satanh			# operand is a NORM
	bra.b		_L8_6d
_L8_2d:
	cmpi.b		%d1,&ZERO		# is operand a ZERO?
	bne.b		_L8_3d			# no
	bsr.l		src_zero			# yes
	bra.b		_L8_6d
_L8_3d:
	cmpi.b		%d1,&INF		# is operand an INF?
	bne.b		_L8_4d			# no
	bsr.l		t_operr			# yes
	bra.b		_L8_6d
_L8_4d:
	cmpi.b		%d1,&QNAN		# is operand a QNAN?
	bne.b		_L8_5d			# no
	bsr.l		src_qnan			# yes
	bra.b		_L8_6d
_L8_5d:
	bsr.l		satanhd			# operand is a DENORM
_L8_6d:

#
#	Result is now in FP0
#
	movm.l		EXC_DREGS(%a6),&0x0303	# restore d0-d1/a0-a1
	fmovm.l		USER_FPCR(%a6),%fpcr,%fpsr # restore ctrl regs
	fmovm.x		EXC_FP1(%a6),&0x40	# restore fp1
	unlk		%a6
	rts

	global		_fatanhx_
_fatanhx_:
	link		%a6,&-LOCAL_SIZE

	movm.l		&0x0303,EXC_DREGS(%a6)	# save d0-d1/a0-a1
	fmovm.l		%fpcr,%fpsr,USER_FPCR(%a6) # save ctrl regs
	fmovm.x		&0xc0,EXC_FP0(%a6)	# save fp0/fp1

	fmov.l		&0x0,%fpcr		# zero FPCR

#
#	copy, convert, and tag input argument
#
	lea		FP_SRC(%a6),%a0
	mov.l		0x8+0x0(%a6),0x0(%a0)	# load ext input
	mov.l		0x8+0x4(%a6),0x4(%a0)
	mov.l		0x8+0x8(%a6),0x8(%a0)
	bsr.l		tag			# fetch operand type
	mov.b		%d0,STAG(%a6)
	mov.b		%d0,%d1

	andi.l		&0x00ff00ff,USER_FPSR(%a6)

	clr.l		%d0
	mov.b		FPCR_MODE(%a6),%d0	# pass rnd mode,prec

	tst.b		%d1
	bne.b		_L8_2x
	bsr.l		satanh			# operand is a NORM
	bra.b		_L8_6x
_L8_2x:
	cmpi.b		%d1,&ZERO		# is operand a ZERO?
	bne.b		_L8_3x			# no
	bsr.l		src_zero			# yes
	bra.b		_L8_6x
_L8_3x:
	cmpi.b		%d1,&INF		# is operand an INF?
	bne.b		_L8_4x			# no
	bsr.l		t_operr			# yes
	bra.b		_L8_6x
_L8_4x:
	cmpi.b		%d1,&QNAN		# is operand a QNAN?
	bne.b		_L8_5x			# no
	bsr.l		src_qnan			# yes
	bra.b		_L8_6x
_L8_5x:
	bsr.l		satanhd			# operand is a DENORM
_L8_6x:

#
#	Result is now in FP0
#
	movm.l		EXC_DREGS(%a6),&0x0303	# restore d0-d1/a0-a1
	fmovm.l		USER_FPCR(%a6),%fpcr,%fpsr # restore ctrl regs
	fmovm.x		EXC_FP1(%a6),&0x40	# restore fp1
	unlk		%a6
	rts


#########################################################################
# MONADIC TEMPLATE							#
#########################################################################
	global		_ftans_
_ftans_:
	link		%a6,&-LOCAL_SIZE

	movm.l		&0x0303,EXC_DREGS(%a6)	# save d0-d1/a0-a1
	fmovm.l		%fpcr,%fpsr,USER_FPCR(%a6) # save ctrl regs
	fmovm.x		&0xc0,EXC_FP0(%a6)	# save fp0/fp1

	fmov.l		&0x0,%fpcr		# zero FPCR

#
#	copy, convert, and tag input argument
#
	fmov.s		0x8(%a6),%fp0		# load sgl input
	fmov.x		%fp0,FP_SRC(%a6)
	lea		FP_SRC(%a6),%a0
	bsr.l		tag			# fetch operand type
	mov.b		%d0,STAG(%a6)
	mov.b		%d0,%d1

	andi.l		&0x00ff00ff,USER_FPSR(%a6)

	clr.l		%d0
	mov.b		FPCR_MODE(%a6),%d0	# pass rnd mode,prec

	tst.b		%d1
	bne.b		_L9_2s
	bsr.l		stan			# operand is a NORM
	bra.b		_L9_6s
_L9_2s:
	cmpi.b		%d1,&ZERO		# is operand a ZERO?
	bne.b		_L9_3s			# no
	bsr.l		src_zero			# yes
	bra.b		_L9_6s
_L9_3s:
	cmpi.b		%d1,&INF		# is operand an INF?
	bne.b		_L9_4s			# no
	bsr.l		t_operr			# yes
	bra.b		_L9_6s
_L9_4s:
	cmpi.b		%d1,&QNAN		# is operand a QNAN?
	bne.b		_L9_5s			# no
	bsr.l		src_qnan			# yes
	bra.b		_L9_6s
_L9_5s:
	bsr.l		stand			# operand is a DENORM
_L9_6s:

#
#	Result is now in FP0
#
	movm.l		EXC_DREGS(%a6),&0x0303	# restore d0-d1/a0-a1
	fmovm.l		USER_FPCR(%a6),%fpcr,%fpsr # restore ctrl regs
	fmovm.x		EXC_FP1(%a6),&0x40	# restore fp1
	unlk		%a6
	rts

	global		_ftand_
_ftand_:
	link		%a6,&-LOCAL_SIZE

	movm.l		&0x0303,EXC_DREGS(%a6)	# save d0-d1/a0-a1
	fmovm.l		%fpcr,%fpsr,USER_FPCR(%a6) # save ctrl regs
	fmovm.x		&0xc0,EXC_FP0(%a6)	# save fp0/fp1

	fmov.l		&0x0,%fpcr		# zero FPCR

#
#	copy, convert, and tag input argument
#
	fmov.d		0x8(%a6),%fp0		# load dbl input
	fmov.x		%fp0,FP_SRC(%a6)
	lea		FP_SRC(%a6),%a0
	bsr.l		tag			# fetch operand type
	mov.b		%d0,STAG(%a6)
	mov.b		%d0,%d1

	andi.l		&0x00ff00ff,USER_FPSR(%a6)

	clr.l		%d0
	mov.b		FPCR_MODE(%a6),%d0	# pass rnd mode,prec

	mov.b		%d1,STAG(%a6)
	tst.b		%d1
	bne.b		_L9_2d
	bsr.l		stan			# operand is a NORM
	bra.b		_L9_6d
_L9_2d:
	cmpi.b		%d1,&ZERO		# is operand a ZERO?
	bne.b		_L9_3d			# no
	bsr.l		src_zero			# yes
	bra.b		_L9_6d
_L9_3d:
	cmpi.b		%d1,&INF		# is operand an INF?
	bne.b		_L9_4d			# no
	bsr.l		t_operr			# yes
	bra.b		_L9_6d
_L9_4d:
	cmpi.b		%d1,&QNAN		# is operand a QNAN?
	bne.b		_L9_5d			# no
	bsr.l		src_qnan			# yes
	bra.b		_L9_6d
_L9_5d:
	bsr.l		stand			# operand is a DENORM
_L9_6d:

#
#	Result is now in FP0
#
	movm.l		EXC_DREGS(%a6),&0x0303	# restore d0-d1/a0-a1
	fmovm.l		USER_FPCR(%a6),%fpcr,%fpsr # restore ctrl regs
	fmovm.x		EXC_FP1(%a6),&0x40	# restore fp1
	unlk		%a6
	rts

	global		_ftanx_
_ftanx_:
	link		%a6,&-LOCAL_SIZE

	movm.l		&0x0303,EXC_DREGS(%a6)	# save d0-d1/a0-a1
	fmovm.l		%fpcr,%fpsr,USER_FPCR(%a6) # save ctrl regs
	fmovm.x		&0xc0,EXC_FP0(%a6)	# save fp0/fp1

	fmov.l		&0x0,%fpcr		# zero FPCR

#
#	copy, convert, and tag input argument
#
	lea		FP_SRC(%a6),%a0
	mov.l		0x8+0x0(%a6),0x0(%a0)	# load ext input
	mov.l		0x8+0x4(%a6),0x4(%a0)
	mov.l		0x8+0x8(%a6),0x8(%a0)
	bsr.l		tag			# fetch operand type
	mov.b		%d0,STAG(%a6)
	mov.b		%d0,%d1

	andi.l		&0x00ff00ff,USER_FPSR(%a6)

	clr.l		%d0
	mov.b		FPCR_MODE(%a6),%d0	# pass rnd mode,prec

	tst.b		%d1
	bne.b		_L9_2x
	bsr.l		stan			# operand is a NORM
	bra.b		_L9_6x
_L9_2x:
	cmpi.b		%d1,&ZERO		# is operand a ZERO?
	bne.b		_L9_3x			# no
	bsr.l		src_zero			# yes
	bra.b		_L9_6x
_L9_3x:
	cmpi.b		%d1,&INF		# is operand an INF?
	bne.b		_L9_4x			# no
	bsr.l		t_operr			# yes
	bra.b		_L9_6x
_L9_4x:
	cmpi.b		%d1,&QNAN		# is operand a QNAN?
	bne.b		_L9_5x			# no
	bsr.l		src_qnan			# yes
	bra.b		_L9_6x
_L9_5x:
	bsr.l		stand			# operand is a DENORM
_L9_6x:

#
#	Result is now in FP0
#
	movm.l		EXC_DREGS(%a6),&0x0303	# restore d0-d1/a0-a1
	fmovm.l		USER_FPCR(%a6),%fpcr,%fpsr # restore ctrl regs
	fmovm.x		EXC_FP1(%a6),&0x40	# restore fp1
	unlk		%a6
	rts


#########################################################################
# MONADIC TEMPLATE							#
#########################################################################
	global		_fetoxs_
_fetoxs_:
	link		%a6,&-LOCAL_SIZE

	movm.l		&0x0303,EXC_DREGS(%a6)	# save d0-d1/a0-a1
	fmovm.l		%fpcr,%fpsr,USER_FPCR(%a6) # save ctrl regs
	fmovm.x		&0xc0,EXC_FP0(%a6)	# save fp0/fp1

	fmov.l		&0x0,%fpcr		# zero FPCR

#
#	copy, convert, and tag input argument
#
	fmov.s		0x8(%a6),%fp0		# load sgl input
	fmov.x		%fp0,FP_SRC(%a6)
	lea		FP_SRC(%a6),%a0
	bsr.l		tag			# fetch operand type
	mov.b		%d0,STAG(%a6)
	mov.b		%d0,%d1

	andi.l		&0x00ff00ff,USER_FPSR(%a6)

	clr.l		%d0
	mov.b		FPCR_MODE(%a6),%d0	# pass rnd mode,prec

	tst.b		%d1
	bne.b		_L10_2s
	bsr.l		setox			# operand is a NORM
	bra.b		_L10_6s
_L10_2s:
	cmpi.b		%d1,&ZERO		# is operand a ZERO?
	bne.b		_L10_3s			# no
	bsr.l		ld_pone			# yes
	bra.b		_L10_6s
_L10_3s:
	cmpi.b		%d1,&INF		# is operand an INF?
	bne.b		_L10_4s			# no
	bsr.l		szr_inf			# yes
	bra.b		_L10_6s
_L10_4s:
	cmpi.b		%d1,&QNAN		# is operand a QNAN?
	bne.b		_L10_5s			# no
	bsr.l		src_qnan			# yes
	bra.b		_L10_6s
_L10_5s:
	bsr.l		setoxd			# operand is a DENORM
_L10_6s:

#
#	Result is now in FP0
#
	movm.l		EXC_DREGS(%a6),&0x0303	# restore d0-d1/a0-a1
	fmovm.l		USER_FPCR(%a6),%fpcr,%fpsr # restore ctrl regs
	fmovm.x		EXC_FP1(%a6),&0x40	# restore fp1
	unlk		%a6
	rts

	global		_fetoxd_
_fetoxd_:
	link		%a6,&-LOCAL_SIZE

	movm.l		&0x0303,EXC_DREGS(%a6)	# save d0-d1/a0-a1
	fmovm.l		%fpcr,%fpsr,USER_FPCR(%a6) # save ctrl regs
	fmovm.x		&0xc0,EXC_FP0(%a6)	# save fp0/fp1

	fmov.l		&0x0,%fpcr		# zero FPCR

#
#	copy, convert, and tag input argument
#
	fmov.d		0x8(%a6),%fp0		# load dbl input
	fmov.x		%fp0,FP_SRC(%a6)
	lea		FP_SRC(%a6),%a0
	bsr.l		tag			# fetch operand type
	mov.b		%d0,STAG(%a6)
	mov.b		%d0,%d1

	andi.l		&0x00ff00ff,USER_FPSR(%a6)

	clr.l		%d0
	mov.b		FPCR_MODE(%a6),%d0	# pass rnd mode,prec

	mov.b		%d1,STAG(%a6)
	tst.b		%d1
	bne.b		_L10_2d
	bsr.l		setox			# operand is a NORM
	bra.b		_L10_6d
_L10_2d:
	cmpi.b		%d1,&ZERO		# is operand a ZERO?
	bne.b		_L10_3d			# no
	bsr.l		ld_pone			# yes
	bra.b		_L10_6d
_L10_3d:
	cmpi.b		%d1,&INF		# is operand an INF?
	bne.b		_L10_4d			# no
	bsr.l		szr_inf			# yes
	bra.b		_L10_6d
_L10_4d:
	cmpi.b		%d1,&QNAN		# is operand a QNAN?
	bne.b		_L10_5d			# no
	bsr.l		src_qnan			# yes
	bra.b		_L10_6d
_L10_5d:
	bsr.l		setoxd			# operand is a DENORM
_L10_6d:

#
#	Result is now in FP0
#
	movm.l		EXC_DREGS(%a6),&0x0303	# restore d0-d1/a0-a1
	fmovm.l		USER_FPCR(%a6),%fpcr,%fpsr # restore ctrl regs
	fmovm.x		EXC_FP1(%a6),&0x40	# restore fp1
	unlk		%a6
	rts

	global		_fetoxx_
_fetoxx_:
	link		%a6,&-LOCAL_SIZE

	movm.l		&0x0303,EXC_DREGS(%a6)	# save d0-d1/a0-a1
	fmovm.l		%fpcr,%fpsr,USER_FPCR(%a6) # save ctrl regs
	fmovm.x		&0xc0,EXC_FP0(%a6)	# save fp0/fp1

	fmov.l		&0x0,%fpcr		# zero FPCR

#
#	copy, convert, and tag input argument
#
	lea		FP_SRC(%a6),%a0
	mov.l		0x8+0x0(%a6),0x0(%a0)	# load ext input
	mov.l		0x8+0x4(%a6),0x4(%a0)
	mov.l		0x8+0x8(%a6),0x8(%a0)
	bsr.l		tag			# fetch operand type
	mov.b		%d0,STAG(%a6)
	mov.b		%d0,%d1

	andi.l		&0x00ff00ff,USER_FPSR(%a6)

	clr.l		%d0
	mov.b		FPCR_MODE(%a6),%d0	# pass rnd mode,prec

	tst.b		%d1
	bne.b		_L10_2x
	bsr.l		setox			# operand is a NORM
	bra.b		_L10_6x
_L10_2x:
	cmpi.b		%d1,&ZERO		# is operand a ZERO?
	bne.b		_L10_3x			# no
	bsr.l		ld_pone			# yes
	bra.b		_L10_6x
_L10_3x:
	cmpi.b		%d1,&INF		# is operand an INF?
	bne.b		_L10_4x			# no
	bsr.l		szr_inf			# yes
	bra.b		_L10_6x
_L10_4x:
	cmpi.b		%d1,&QNAN		# is operand a QNAN?
	bne.b		_L10_5x			# no
	bsr.l		src_qnan			# yes
	bra.b		_L10_6x
_L10_5x:
	bsr.l		setoxd			# operand is a DENORM
_L10_6x:

#
#	Result is now in FP0
#
	movm.l		EXC_DREGS(%a6),&0x0303	# restore d0-d1/a0-a1
	fmovm.l		USER_FPCR(%a6),%fpcr,%fpsr # restore ctrl regs
	fmovm.x		EXC_FP1(%a6),&0x40	# restore fp1
	unlk		%a6
	rts


#########################################################################
# MONADIC TEMPLATE							#
#########################################################################
	global		_ftwotoxs_
_ftwotoxs_:
	link		%a6,&-LOCAL_SIZE

	movm.l		&0x0303,EXC_DREGS(%a6)	# save d0-d1/a0-a1
	fmovm.l		%fpcr,%fpsr,USER_FPCR(%a6) # save ctrl regs
	fmovm.x		&0xc0,EXC_FP0(%a6)	# save fp0/fp1

	fmov.l		&0x0,%fpcr		# zero FPCR

#
#	copy, convert, and tag input argument
#
	fmov.s		0x8(%a6),%fp0		# load sgl input
	fmov.x		%fp0,FP_SRC(%a6)
	lea		FP_SRC(%a6),%a0
	bsr.l		tag			# fetch operand type
	mov.b		%d0,STAG(%a6)
	mov.b		%d0,%d1

	andi.l		&0x00ff00ff,USER_FPSR(%a6)

	clr.l		%d0
	mov.b		FPCR_MODE(%a6),%d0	# pass rnd mode,prec

	tst.b		%d1
	bne.b		_L11_2s
	bsr.l		stwotox			# operand is a NORM
	bra.b		_L11_6s
_L11_2s:
	cmpi.b		%d1,&ZERO		# is operand a ZERO?
	bne.b		_L11_3s			# no
	bsr.l		ld_pone			# yes
	bra.b		_L11_6s
_L11_3s:
	cmpi.b		%d1,&INF		# is operand an INF?
	bne.b		_L11_4s			# no
	bsr.l		szr_inf			# yes
	bra.b		_L11_6s
_L11_4s:
	cmpi.b		%d1,&QNAN		# is operand a QNAN?
	bne.b		_L11_5s			# no
	bsr.l		src_qnan			# yes
	bra.b		_L11_6s
_L11_5s:
	bsr.l		stwotoxd			# operand is a DENORM
_L11_6s:

#
#	Result is now in FP0
#
	movm.l		EXC_DREGS(%a6),&0x0303	# restore d0-d1/a0-a1
	fmovm.l		USER_FPCR(%a6),%fpcr,%fpsr # restore ctrl regs
	fmovm.x		EXC_FP1(%a6),&0x40	# restore fp1
	unlk		%a6
	rts

	global		_ftwotoxd_
_ftwotoxd_:
	link		%a6,&-LOCAL_SIZE

	movm.l		&0x0303,EXC_DREGS(%a6)	# save d0-d1/a0-a1
	fmovm.l		%fpcr,%fpsr,USER_FPCR(%a6) # save ctrl regs
	fmovm.x		&0xc0,EXC_FP0(%a6)	# save fp0/fp1

	fmov.l		&0x0,%fpcr		# zero FPCR

#
#	copy, convert, and tag input argument
#
	fmov.d		0x8(%a6),%fp0		# load dbl input
	fmov.x		%fp0,FP_SRC(%a6)
	lea		FP_SRC(%a6),%a0
	bsr.l		tag			# fetch operand type
	mov.b		%d0,STAG(%a6)
	mov.b		%d0,%d1

	andi.l		&0x00ff00ff,USER_FPSR(%a6)

	clr.l		%d0
	mov.b		FPCR_MODE(%a6),%d0	# pass rnd mode,prec

	mov.b		%d1,STAG(%a6)
	tst.b		%d1
	bne.b		_L11_2d
	bsr.l		stwotox			# operand is a NORM
	bra.b		_L11_6d
_L11_2d:
	cmpi.b		%d1,&ZERO		# is operand a ZERO?
	bne.b		_L11_3d			# no
	bsr.l		ld_pone			# yes
	bra.b		_L11_6d
_L11_3d:
	cmpi.b		%d1,&INF		# is operand an INF?
	bne.b		_L11_4d			# no
	bsr.l		szr_inf			# yes
	bra.b		_L11_6d
_L11_4d:
	cmpi.b		%d1,&QNAN		# is operand a QNAN?
	bne.b		_L11_5d			# no
	bsr.l		src_qnan			# yes
	bra.b		_L11_6d
_L11_5d:
	bsr.l		stwotoxd			# operand is a DENORM
_L11_6d:

#
#	Result is now in FP0
#
	movm.l		EXC_DREGS(%a6),&0x0303	# restore d0-d1/a0-a1
	fmovm.l		USER_FPCR(%a6),%fpcr,%fpsr # restore ctrl regs
	fmovm.x		EXC_FP1(%a6),&0x40	# restore fp1
	unlk		%a6
	rts

	global		_ftwotoxx_
_ftwotoxx_:
	link		%a6,&-LOCAL_SIZE

	movm.l		&0x0303,EXC_DREGS(%a6)	# save d0-d1/a0-a1
	fmovm.l		%fpcr,%fpsr,USER_FPCR(%a6) # save ctrl regs
	fmovm.x		&0xc0,EXC_FP0(%a6)	# save fp0/fp1

	fmov.l		&0x0,%fpcr		# zero FPCR

#
#	copy, convert, and tag input argument
#
	lea		FP_SRC(%a6),%a0
	mov.l		0x8+0x0(%a6),0x0(%a0)	# load ext input
	mov.l		0x8+0x4(%a6),0x4(%a0)
	mov.l		0x8+0x8(%a6),0x8(%a0)
	bsr.l		tag			# fetch operand type
	mov.b		%d0,STAG(%a6)
	mov.b		%d0,%d1

	andi.l		&0x00ff00ff,USER_FPSR(%a6)

	clr.l		%d0
	mov.b		FPCR_MODE(%a6),%d0	# pass rnd mode,prec

	tst.b		%d1
	bne.b		_L11_2x
	bsr.l		stwotox			# operand is a NORM
	bra.b		_L11_6x
_L11_2x:
	cmpi.b		%d1,&ZERO		# is operand a ZERO?
	bne.b		_L11_3x			# no
	bsr.l		ld_pone			# yes
	bra.b		_L11_6x
_L11_3x:
	cmpi.b		%d1,&INF		# is operand an INF?
	bne.b		_L11_4x			# no
	bsr.l		szr_inf			# yes
	bra.b		_L11_6x
_L11_4x:
	cmpi.b		%d1,&QNAN		# is operand a QNAN?
	bne.b		_L11_5x			# no
	bsr.l		src_qnan			# yes
	bra.b		_L11_6x
_L11_5x:
	bsr.l		stwotoxd			# operand is a DENORM
_L11_6x:

#
#	Result is now in FP0
#
	movm.l		EXC_DREGS(%a6),&0x0303	# restore d0-d1/a0-a1
	fmovm.l		USER_FPCR(%a6),%fpcr,%fpsr # restore ctrl regs
	fmovm.x		EXC_FP1(%a6),&0x40	# restore fp1
	unlk		%a6
	rts


#########################################################################
# MONADIC TEMPLATE							#
#########################################################################
	global		_ftentoxs_
_ftentoxs_:
	link		%a6,&-LOCAL_SIZE

	movm.l		&0x0303,EXC_DREGS(%a6)	# save d0-d1/a0-a1
	fmovm.l		%fpcr,%fpsr,USER_FPCR(%a6) # save ctrl regs
	fmovm.x		&0xc0,EXC_FP0(%a6)	# save fp0/fp1

	fmov.l		&0x0,%fpcr		# zero FPCR

#
#	copy, convert, and tag input argument
#
	fmov.s		0x8(%a6),%fp0		# load sgl input
	fmov.x		%fp0,FP_SRC(%a6)
	lea		FP_SRC(%a6),%a0
	bsr.l		tag			# fetch operand type
	mov.b		%d0,STAG(%a6)
	mov.b		%d0,%d1

	andi.l		&0x00ff00ff,USER_FPSR(%a6)

	clr.l		%d0
	mov.b		FPCR_MODE(%a6),%d0	# pass rnd mode,prec

	tst.b		%d1
	bne.b		_L12_2s
	bsr.l		stentox			# operand is a NORM
	bra.b		_L12_6s
_L12_2s:
	cmpi.b		%d1,&ZERO		# is operand a ZERO?
	bne.b		_L12_3s			# no
	bsr.l		ld_pone			# yes
	bra.b		_L12_6s
_L12_3s:
	cmpi.b		%d1,&INF		# is operand an INF?
	bne.b		_L12_4s			# no
	bsr.l		szr_inf			# yes
	bra.b		_L12_6s
_L12_4s:
	cmpi.b		%d1,&QNAN		# is operand a QNAN?
	bne.b		_L12_5s			# no
	bsr.l		src_qnan			# yes
	bra.b		_L12_6s
_L12_5s:
	bsr.l		stentoxd			# operand is a DENORM
_L12_6s:

#
#	Result is now in FP0
#
	movm.l		EXC_DREGS(%a6),&0x0303	# restore d0-d1/a0-a1
	fmovm.l		USER_FPCR(%a6),%fpcr,%fpsr # restore ctrl regs
	fmovm.x		EXC_FP1(%a6),&0x40	# restore fp1
	unlk		%a6
	rts

	global		_ftentoxd_
_ftentoxd_:
	link		%a6,&-LOCAL_SIZE

	movm.l		&0x0303,EXC_DREGS(%a6)	# save d0-d1/a0-a1
	fmovm.l		%fpcr,%fpsr,USER_FPCR(%a6) # save ctrl regs
	fmovm.x		&0xc0,EXC_FP0(%a6)	# save fp0/fp1

	fmov.l		&0x0,%fpcr		# zero FPCR

#
#	copy, convert, and tag input argument
#
	fmov.d		0x8(%a6),%fp0		# load dbl input
	fmov.x		%fp0,FP_SRC(%a6)
	lea		FP_SRC(%a6),%a0
	bsr.l		tag			# fetch operand type
	mov.b		%d0,STAG(%a6)
	mov.b		%d0,%d1

	andi.l		&0x00ff00ff,USER_FPSR(%a6)

	clr.l		%d0
	mov.b		FPCR_MODE(%a6),%d0	# pass rnd mode,prec

	mov.b		%d1,STAG(%a6)
	tst.b		%d1
	bne.b		_L12_2d
	bsr.l		stentox			# operand is a NORM
	bra.b		_L12_6d
_L12_2d:
	cmpi.b		%d1,&ZERO		# is operand a ZERO?
	bne.b		_L12_3d			# no
	bsr.l		ld_pone			# yes
	bra.b		_L12_6d
_L12_3d:
	cmpi.b		%d1,&INF		# is operand an INF?
	bne.b		_L12_4d			# no
	bsr.l		szr_inf			# yes
	bra.b		_L12_6d
_L12_4d:
	cmpi.b		%d1,&QNAN		# is operand a QNAN?
	bne.b		_L12_5d			# no
	bsr.l		src_qnan			# yes
	bra.b		_L12_6d
_L12_5d:
	bsr.l		stentoxd			# operand is a DENORM
_L12_6d:

#
#	Result is now in FP0
#
	movm.l		EXC_DREGS(%a6),&0x0303	# restore d0-d1/a0-a1
	fmovm.l		USER_FPCR(%a6),%fpcr,%fpsr # restore ctrl regs
	fmovm.x		EXC_FP1(%a6),&0x40	# restore fp1
	unlk		%a6
	rts

	global		_ftentoxx_
_ftentoxx_:
	link		%a6,&-LOCAL_SIZE

	movm.l		&0x0303,EXC_DREGS(%a6)	# save d0-d1/a0-a1
	fmovm.l		%fpcr,%fpsr,USER_FPCR(%a6) # save ctrl regs
	fmovm.x		&0xc0,EXC_FP0(%a6)	# save fp0/fp1

	fmov.l		&0x0,%fpcr		# zero FPCR

#
#	copy, convert, and tag input argument
#
	lea		FP_SRC(%a6),%a0
	mov.l		0x8+0x0(%a6),0x0(%a0)	# load ext input
	mov.l		0x8+0x4(%a6),0x4(%a0)
	mov.l		0x8+0x8(%a6),0x8(%a0)
	bsr.l		tag			# fetch operand type
	mov.b		%d0,STAG(%a6)
	mov.b		%d0,%d1

	andi.l		&0x00ff00ff,USER_FPSR(%a6)

	clr.l		%d0
	mov.b		FPCR_MODE(%a6),%d0	# pass rnd mode,prec

	tst.b		%d1
	bne.b		_L12_2x
	bsr.l		stentox			# operand is a NORM
	bra.b		_L12_6x
_L12_2x:
	cmpi.b		%d1,&ZERO		# is operand a ZERO?
	bne.b		_L12_3x			# no
	bsr.l		ld_pone			# yes
	bra.b		_L12_6x
_L12_3x:
	cmpi.b		%d1,&INF		# is operand an INF?
	bne.b		_L12_4x			# no
	bsr.l		szr_inf			# yes
	bra.b		_L12_6x
_L12_4x:
	cmpi.b		%d1,&QNAN		# is operand a QNAN?
	bne.b		_L12_5x			# no
	bsr.l		src_qnan			# yes
	bra.b		_L12_6x
_L12_5x:
	bsr.l		stentoxd			# operand is a DENORM
_L12_6x:

#
#	Result is now in FP0
#
	movm.l		EXC_DREGS(%a6),&0x0303	# restore d0-d1/a0-a1
	fmovm.l		USER_FPCR(%a6),%fpcr,%fpsr # restore ctrl regs
	fmovm.x		EXC_FP1(%a6),&0x40	# restore fp1
	unlk		%a6
	rts


#########################################################################
# MONADIC TEMPLATE							#
#########################################################################
	global		_flogns_
_flogns_:
	link		%a6,&-LOCAL_SIZE

	movm.l		&0x0303,EXC_DREGS(%a6)	# save d0-d1/a0-a1
	fmovm.l		%fpcr,%fpsr,USER_FPCR(%a6) # save ctrl regs
	fmovm.x		&0xc0,EXC_FP0(%a6)	# save fp0/fp1

	fmov.l		&0x0,%fpcr		# zero FPCR

#
#	copy, convert, and tag input argument
#
	fmov.s		0x8(%a6),%fp0		# load sgl input
	fmov.x		%fp0,FP_SRC(%a6)
	lea		FP_SRC(%a6),%a0
	bsr.l		tag			# fetch operand type
	mov.b		%d0,STAG(%a6)
	mov.b		%d0,%d1

	andi.l		&0x00ff00ff,USER_FPSR(%a6)

	clr.l		%d0
	mov.b		FPCR_MODE(%a6),%d0	# pass rnd mode,prec

	tst.b		%d1
	bne.b		_L13_2s
	bsr.l		slogn			# operand is a NORM
	bra.b		_L13_6s
_L13_2s:
	cmpi.b		%d1,&ZERO		# is operand a ZERO?
	bne.b		_L13_3s			# no
	bsr.l		t_dz2			# yes
	bra.b		_L13_6s
_L13_3s:
	cmpi.b		%d1,&INF		# is operand an INF?
	bne.b		_L13_4s			# no
	bsr.l		sopr_inf			# yes
	bra.b		_L13_6s
_L13_4s:
	cmpi.b		%d1,&QNAN		# is operand a QNAN?
	bne.b		_L13_5s			# no
	bsr.l		src_qnan			# yes
	bra.b		_L13_6s
_L13_5s:
	bsr.l		slognd			# operand is a DENORM
_L13_6s:

#
#	Result is now in FP0
#
	movm.l		EXC_DREGS(%a6),&0x0303	# restore d0-d1/a0-a1
	fmovm.l		USER_FPCR(%a6),%fpcr,%fpsr # restore ctrl regs
	fmovm.x		EXC_FP1(%a6),&0x40	# restore fp1
	unlk		%a6
	rts

	global		_flognd_
_flognd_:
	link		%a6,&-LOCAL_SIZE

	movm.l		&0x0303,EXC_DREGS(%a6)	# save d0-d1/a0-a1
	fmovm.l		%fpcr,%fpsr,USER_FPCR(%a6) # save ctrl regs
	fmovm.x		&0xc0,EXC_FP0(%a6)	# save fp0/fp1

	fmov.l		&0x0,%fpcr		# zero FPCR

#
#	copy, convert, and tag input argument
#
	fmov.d		0x8(%a6),%fp0		# load dbl input
	fmov.x		%fp0,FP_SRC(%a6)
	lea		FP_SRC(%a6),%a0
	bsr.l		tag			# fetch operand type
	mov.b		%d0,STAG(%a6)
	mov.b		%d0,%d1

	andi.l		&0x00ff00ff,USER_FPSR(%a6)

	clr.l		%d0
	mov.b		FPCR_MODE(%a6),%d0	# pass rnd mode,prec

	mov.b		%d1,STAG(%a6)
	tst.b		%d1
	bne.b		_L13_2d
	bsr.l		slogn			# operand is a NORM
	bra.b		_L13_6d
_L13_2d:
	cmpi.b		%d1,&ZERO		# is operand a ZERO?
	bne.b		_L13_3d			# no
	bsr.l		t_dz2			# yes
	bra.b		_L13_6d
_L13_3d:
	cmpi.b		%d1,&INF		# is operand an INF?
	bne.b		_L13_4d			# no
	bsr.l		sopr_inf			# yes
	bra.b		_L13_6d
_L13_4d:
	cmpi.b		%d1,&QNAN		# is operand a QNAN?
	bne.b		_L13_5d			# no
	bsr.l		src_qnan			# yes
	bra.b		_L13_6d
_L13_5d:
	bsr.l		slognd			# operand is a DENORM
_L13_6d:

#
#	Result is now in FP0
#
	movm.l		EXC_DREGS(%a6),&0x0303	# restore d0-d1/a0-a1
	fmovm.l		USER_FPCR(%a6),%fpcr,%fpsr # restore ctrl regs
	fmovm.x		EXC_FP1(%a6),&0x40	# restore fp1
	unlk		%a6
	rts

	global		_flognx_
_flognx_:
	link		%a6,&-LOCAL_SIZE

	movm.l		&0x0303,EXC_DREGS(%a6)	# save d0-d1/a0-a1
	fmovm.l		%fpcr,%fpsr,USER_FPCR(%a6) # save ctrl regs
	fmovm.x		&0xc0,EXC_FP0(%a6)	# save fp0/fp1

	fmov.l		&0x0,%fpcr		# zero FPCR

#
#	copy, convert, and tag input argument
#
	lea		FP_SRC(%a6),%a0
	mov.l		0x8+0x0(%a6),0x0(%a0)	# load ext input
	mov.l		0x8+0x4(%a6),0x4(%a0)
	mov.l		0x8+0x8(%a6),0x8(%a0)
	bsr.l		tag			# fetch operand type
	mov.b		%d0,STAG(%a6)
	mov.b		%d0,%d1

	andi.l		&0x00ff00ff,USER_FPSR(%a6)

	clr.l		%d0
	mov.b		FPCR_MODE(%a6),%d0	# pass rnd mode,prec

	tst.b		%d1
	bne.b		_L13_2x
	bsr.l		slogn			# operand is a NORM
	bra.b		_L13_6x
_L13_2x:
	cmpi.b		%d1,&ZERO		# is operand a ZERO?
	bne.b		_L13_3x			# no
	bsr.l		t_dz2			# yes
	bra.b		_L13_6x
_L13_3x:
	cmpi.b		%d1,&INF		# is operand an INF?
	bne.b		_L13_4x			# no
	bsr.l		sopr_inf			# yes
	bra.b		_L13_6x
_L13_4x:
	cmpi.b		%d1,&QNAN		# is operand a QNAN?
	bne.b		_L13_5x			# no
	bsr.l		src_qnan			# yes
	bra.b		_L13_6x
_L13_5x:
	bsr.l		slognd			# operand is a DENORM
_L13_6x:

#
#	Result is now in FP0
#
	movm.l		EXC_DREGS(%a6),&0x0303	# restore d0-d1/a0-a1
	fmovm.l		USER_FPCR(%a6),%fpcr,%fpsr # restore ctrl regs
	fmovm.x		EXC_FP1(%a6),&0x40	# restore fp1
	unlk		%a6
	rts


#########################################################################
# MONADIC TEMPLATE							#
#########################################################################
	global		_flog10s_
_flog10s_:
	link		%a6,&-LOCAL_SIZE

	movm.l		&0x0303,EXC_DREGS(%a6)	# save d0-d1/a0-a1
	fmovm.l		%fpcr,%fpsr,USER_FPCR(%a6) # save ctrl regs
	fmovm.x		&0xc0,EXC_FP0(%a6)	# save fp0/fp1

	fmov.l		&0x0,%fpcr		# zero FPCR

#
#	copy, convert, and tag input argument
#
	fmov.s		0x8(%a6),%fp0		# load sgl input
	fmov.x		%fp0,FP_SRC(%a6)
	lea		FP_SRC(%a6),%a0
	bsr.l		tag			# fetch operand type
	mov.b		%d0,STAG(%a6)
	mov.b		%d0,%d1

	andi.l		&0x00ff00ff,USER_FPSR(%a6)

	clr.l		%d0
	mov.b		FPCR_MODE(%a6),%d0	# pass rnd mode,prec

	tst.b		%d1
	bne.b		_L14_2s
	bsr.l		slog10			# operand is a NORM
	bra.b		_L14_6s
_L14_2s:
	cmpi.b		%d1,&ZERO		# is operand a ZERO?
	bne.b		_L14_3s			# no
	bsr.l		t_dz2			# yes
	bra.b		_L14_6s
_L14_3s:
	cmpi.b		%d1,&INF		# is operand an INF?
	bne.b		_L14_4s			# no
	bsr.l		sopr_inf			# yes
	bra.b		_L14_6s
_L14_4s:
	cmpi.b		%d1,&QNAN		# is operand a QNAN?
	bne.b		_L14_5s			# no
	bsr.l		src_qnan			# yes
	bra.b		_L14_6s
_L14_5s:
	bsr.l		slog10d			# operand is a DENORM
_L14_6s:

#
#	Result is now in FP0
#
	movm.l		EXC_DREGS(%a6),&0x0303	# restore d0-d1/a0-a1
	fmovm.l		USER_FPCR(%a6),%fpcr,%fpsr # restore ctrl regs
	fmovm.x		EXC_FP1(%a6),&0x40	# restore fp1
	unlk		%a6
	rts

	global		_flog10d_
_flog10d_:
	link		%a6,&-LOCAL_SIZE

	movm.l		&0x0303,EXC_DREGS(%a6)	# save d0-d1/a0-a1
	fmovm.l		%fpcr,%fpsr,USER_FPCR(%a6) # save ctrl regs
	fmovm.x		&0xc0,EXC_FP0(%a6)	# save fp0/fp1

	fmov.l		&0x0,%fpcr		# zero FPCR

#
#	copy, convert, and tag input argument
#
	fmov.d		0x8(%a6),%fp0		# load dbl input
	fmov.x		%fp0,FP_SRC(%a6)
	lea		FP_SRC(%a6),%a0
	bsr.l		tag			# fetch operand type
	mov.b		%d0,STAG(%a6)
	mov.b		%d0,%d1

	andi.l		&0x00ff00ff,USER_FPSR(%a6)

	clr.l		%d0
	mov.b		FPCR_MODE(%a6),%d0	# pass rnd mode,prec

	mov.b		%d1,STAG(%a6)
	tst.b		%d1
	bne.b		_L14_2d
	bsr.l		slog10			# operand is a NORM
	bra.b		_L14_6d
_L14_2d:
	cmpi.b		%d1,&ZERO		# is operand a ZERO?
	bne.b		_L14_3d			# no
	bsr.l		t_dz2			# yes
	bra.b		_L14_6d
_L14_3d:
	cmpi.b		%d1,&INF		# is operand an INF?
	bne.b		_L14_4d			# no
	bsr.l		sopr_inf			# yes
	bra.b		_L14_6d
_L14_4d:
	cmpi.b		%d1,&QNAN		# is operand a QNAN?
	bne.b		_L14_5d			# no
	bsr.l		src_qnan			# yes
	bra.b		_L14_6d
_L14_5d:
	bsr.l		slog10d			# operand is a DENORM
_L14_6d:

#
#	Result is now in FP0
#
	movm.l		EXC_DREGS(%a6),&0x0303	# restore d0-d1/a0-a1
	fmovm.l		USER_FPCR(%a6),%fpcr,%fpsr # restore ctrl regs
	fmovm.x		EXC_FP1(%a6),&0x40	# restore fp1
	unlk		%a6
	rts

	global		_flog10x_
_flog10x_:
	link		%a6,&-LOCAL_SIZE

	movm.l		&0x0303,EXC_DREGS(%a6)	# save d0-d1/a0-a1
	fmovm.l		%fpcr,%fpsr,USER_FPCR(%a6) # save ctrl regs
	fmovm.x		&0xc0,EXC_FP0(%a6)	# save fp0/fp1

	fmov.l		&0x0,%fpcr		# zero FPCR

#
#	copy, convert, and tag input argument
#
	lea		FP_SRC(%a6),%a0
	mov.l		0x8+0x0(%a6),0x0(%a0)	# load ext input
	mov.l		0x8+0x4(%a6),0x4(%a0)
	mov.l		0x8+0x8(%a6),0x8(%a0)
	bsr.l		tag			# fetch operand type
	mov.b		%d0,STAG(%a6)
	mov.b		%d0,%d1

	andi.l		&0x00ff00ff,USER_FPSR(%a6)

	clr.l		%d0
	mov.b		FPCR_MODE(%a6),%d0	# pass rnd mode,prec

	tst.b		%d1
	bne.b		_L14_2x
	bsr.l		slog10			# operand is a NORM
	bra.b		_L14_6x
_L14_2x:
	cmpi.b		%d1,&ZERO		# is operand a ZERO?
	bne.b		_L14_3x			# no
	bsr.l		t_dz2			# yes
	bra.b		_L14_6x
_L14_3x:
	cmpi.b		%d1,&INF		# is operand an INF?
	bne.b		_L14_4x			# no
	bsr.l		sopr_inf			# yes
	bra.b		_L14_6x
_L14_4x:
	cmpi.b		%d1,&QNAN		# is operand a QNAN?
	bne.b		_L14_5x			# no
	bsr.l		src_qnan			# yes
	bra.b		_L14_6x
_L14_5x:
	bsr.l		slog10d			# operand is a DENORM
_L14_6x:

#
#	Result is now in FP0
#
	movm.l		EXC_DREGS(%a6),&0x0303	# restore d0-d1/a0-a1
	fmovm.l		USER_FPCR(%a6),%fpcr,%fpsr # restore ctrl regs
	fmovm.x		EXC_FP1(%a6),&0x40	# restore fp1
	unlk		%a6
	rts


#########################################################################
# MONADIC TEMPLATE							#
#########################################################################
	global		_flog2s_
_flog2s_:
	link		%a6,&-LOCAL_SIZE

	movm.l		&0x0303,EXC_DREGS(%a6)	# save d0-d1/a0-a1
	fmovm.l		%fpcr,%fpsr,USER_FPCR(%a6) # save ctrl regs
	fmovm.x		&0xc0,EXC_FP0(%a6)	# save fp0/fp1

	fmov.l		&0x0,%fpcr		# zero FPCR

#
#	copy, convert, and tag input argument
#
	fmov.s		0x8(%a6),%fp0		# load sgl input
	fmov.x		%fp0,FP_SRC(%a6)
	lea		FP_SRC(%a6),%a0
	bsr.l		tag			# fetch operand type
	mov.b		%d0,STAG(%a6)
	mov.b		%d0,%d1

	andi.l		&0x00ff00ff,USER_FPSR(%a6)

	clr.l		%d0
	mov.b		FPCR_MODE(%a6),%d0	# pass rnd mode,prec

	tst.b		%d1
	bne.b		_L15_2s
	bsr.l		slog2			# operand is a NORM
	bra.b		_L15_6s
_L15_2s:
	cmpi.b		%d1,&ZERO		# is operand a ZERO?
	bne.b		_L15_3s			# no
	bsr.l		t_dz2			# yes
	bra.b		_L15_6s
_L15_3s:
	cmpi.b		%d1,&INF		# is operand an INF?
	bne.b		_L15_4s			# no
	bsr.l		sopr_inf			# yes
	bra.b		_L15_6s
_L15_4s:
	cmpi.b		%d1,&QNAN		# is operand a QNAN?
	bne.b		_L15_5s			# no
	bsr.l		src_qnan			# yes
	bra.b		_L15_6s
_L15_5s:
	bsr.l		slog2d			# operand is a DENORM
_L15_6s:

#
#	Result is now in FP0
#
	movm.l		EXC_DREGS(%a6),&0x0303	# restore d0-d1/a0-a1
	fmovm.l		USER_FPCR(%a6),%fpcr,%fpsr # restore ctrl regs
	fmovm.x		EXC_FP1(%a6),&0x40	# restore fp1
	unlk		%a6
	rts

	global		_flog2d_
_flog2d_:
	link		%a6,&-LOCAL_SIZE

	movm.l		&0x0303,EXC_DREGS(%a6)	# save d0-d1/a0-a1
	fmovm.l		%fpcr,%fpsr,USER_FPCR(%a6) # save ctrl regs
	fmovm.x		&0xc0,EXC_FP0(%a6)	# save fp0/fp1

	fmov.l		&0x0,%fpcr		# zero FPCR

#
#	copy, convert, and tag input argument
#
	fmov.d		0x8(%a6),%fp0		# load dbl input
	fmov.x		%fp0,FP_SRC(%a6)
	lea		FP_SRC(%a6),%a0
	bsr.l		tag			# fetch operand type
	mov.b		%d0,STAG(%a6)
	mov.b		%d0,%d1

	andi.l		&0x00ff00ff,USER_FPSR(%a6)

	clr.l		%d0
	mov.b		FPCR_MODE(%a6),%d0	# pass rnd mode,prec

	mov.b		%d1,STAG(%a6)
	tst.b		%d1
	bne.b		_L15_2d
	bsr.l		slog2			# operand is a NORM
	bra.b		_L15_6d
_L15_2d:
	cmpi.b		%d1,&ZERO		# is operand a ZERO?
	bne.b		_L15_3d			# no
	bsr.l		t_dz2			# yes
	bra.b		_L15_6d
_L15_3d:
	cmpi.b		%d1,&INF		# is operand an INF?
	bne.b		_L15_4d			# no
	bsr.l		sopr_inf			# yes
	bra.b		_L15_6d
_L15_4d:
	cmpi.b		%d1,&QNAN		# is operand a QNAN?
	bne.b		_L15_5d			# no
	bsr.l		src_qnan			# yes
	bra.b		_L15_6d
_L15_5d:
	bsr.l		slog2d			# operand is a DENORM
_L15_6d:

#
#	Result is now in FP0
#
	movm.l		EXC_DREGS(%a6),&0x0303	# restore d0-d1/a0-a1
	fmovm.l		USER_FPCR(%a6),%fpcr,%fpsr # restore ctrl regs
	fmovm.x		EXC_FP1(%a6),&0x40	# restore fp1
	unlk		%a6
	rts

	global		_flog2x_
_flog2x_:
	link		%a6,&-LOCAL_SIZE

	movm.l		&0x0303,EXC_DREGS(%a6)	# save d0-d1/a0-a1
	fmovm.l		%fpcr,%fpsr,USER_FPCR(%a6) # save ctrl regs
	fmovm.x		&0xc0,EXC_FP0(%a6)	# save fp0/fp1

	fmov.l		&0x0,%fpcr		# zero FPCR

#
#	copy, convert, and tag input argument
#
	lea		FP_SRC(%a6),%a0
	mov.l		0x8+0x0(%a6),0x0(%a0)	# load ext input
	mov.l		0x8+0x4(%a6),0x4(%a0)
	mov.l		0x8+0x8(%a6),0x8(%a0)
	bsr.l		tag			# fetch operand type
	mov.b		%d0,STAG(%a6)
	mov.b		%d0,%d1

	andi.l		&0x00ff00ff,USER_FPSR(%a6)

	clr.l		%d0
	mov.b		FPCR_MODE(%a6),%d0	# pass rnd mode,prec

	tst.b		%d1
	bne.b		_L15_2x
	bsr.l		slog2			# operand is a NORM
	bra.b		_L15_6x
_L15_2x:
	cmpi.b		%d1,&ZERO		# is operand a ZERO?
	bne.b		_L15_3x			# no
	bsr.l		t_dz2			# yes
	bra.b		_L15_6x
_L15_3x:
	cmpi.b		%d1,&INF		# is operand an INF?
	bne.b		_L15_4x			# no
	bsr.l		sopr_inf			# yes
	bra.b		_L15_6x
_L15_4x:
	cmpi.b		%d1,&QNAN		# is operand a QNAN?
	bne.b		_L15_5x			# no
	bsr.l		src_qnan			# yes
	bra.b		_L15_6x
_L15_5x:
	bsr.l		slog2d			# operand is a DENORM
_L15_6x:

#
#	Result is now in FP0
#
	movm.l		EXC_DREGS(%a6),&0x0303	# restore d0-d1/a0-a1
	fmovm.l		USER_FPCR(%a6),%fpcr,%fpsr # restore ctrl regs
	fmovm.x		EXC_FP1(%a6),&0x40	# restore fp1
	unlk		%a6
	rts


#########################################################################
# MONADIC TEMPLATE							#
#########################################################################
	global		_fcoshs_
_fcoshs_:
	link		%a6,&-LOCAL_SIZE

	movm.l		&0x0303,EXC_DREGS(%a6)	# save d0-d1/a0-a1
	fmovm.l		%fpcr,%fpsr,USER_FPCR(%a6) # save ctrl regs
	fmovm.x		&0xc0,EXC_FP0(%a6)	# save fp0/fp1

	fmov.l		&0x0,%fpcr		# zero FPCR

#
#	copy, convert, and tag input argument
#
	fmov.s		0x8(%a6),%fp0		# load sgl input
	fmov.x		%fp0,FP_SRC(%a6)
	lea		FP_SRC(%a6),%a0
	bsr.l		tag			# fetch operand type
	mov.b		%d0,STAG(%a6)
	mov.b		%d0,%d1

	andi.l		&0x00ff00ff,USER_FPSR(%a6)

	clr.l		%d0
	mov.b		FPCR_MODE(%a6),%d0	# pass rnd mode,prec

	tst.b		%d1
	bne.b		_L16_2s
	bsr.l		scosh			# operand is a NORM
	bra.b		_L16_6s
_L16_2s:
	cmpi.b		%d1,&ZERO		# is operand a ZERO?
	bne.b		_L16_3s			# no
	bsr.l		ld_pone			# yes
	bra.b		_L16_6s
_L16_3s:
	cmpi.b		%d1,&INF		# is operand an INF?
	bne.b		_L16_4s			# no
	bsr.l		ld_pinf			# yes
	bra.b		_L16_6s
_L16_4s:
	cmpi.b		%d1,&QNAN		# is operand a QNAN?
	bne.b		_L16_5s			# no
	bsr.l		src_qnan			# yes
	bra.b		_L16_6s
_L16_5s:
	bsr.l		scoshd			# operand is a DENORM
_L16_6s:

#
#	Result is now in FP0
#
	movm.l		EXC_DREGS(%a6),&0x0303	# restore d0-d1/a0-a1
	fmovm.l		USER_FPCR(%a6),%fpcr,%fpsr # restore ctrl regs
	fmovm.x		EXC_FP1(%a6),&0x40	# restore fp1
	unlk		%a6
	rts

	global		_fcoshd_
_fcoshd_:
	link		%a6,&-LOCAL_SIZE

	movm.l		&0x0303,EXC_DREGS(%a6)	# save d0-d1/a0-a1
	fmovm.l		%fpcr,%fpsr,USER_FPCR(%a6) # save ctrl regs
	fmovm.x		&0xc0,EXC_FP0(%a6)	# save fp0/fp1

	fmov.l		&0x0,%fpcr		# zero FPCR

#
#	copy, convert, and tag input argument
#
	fmov.d		0x8(%a6),%fp0		# load dbl input
	fmov.x		%fp0,FP_SRC(%a6)
	lea		FP_SRC(%a6),%a0
	bsr.l		tag			# fetch operand type
	mov.b		%d0,STAG(%a6)
	mov.b		%d0,%d1

	andi.l		&0x00ff00ff,USER_FPSR(%a6)

	clr.l		%d0
	mov.b		FPCR_MODE(%a6),%d0	# pass rnd mode,prec

	mov.b		%d1,STAG(%a6)
	tst.b		%d1
	bne.b		_L16_2d
	bsr.l		scosh			# operand is a NORM
	bra.b		_L16_6d
_L16_2d:
	cmpi.b		%d1,&ZERO		# is operand a ZERO?
	bne.b		_L16_3d			# no
	bsr.l		ld_pone			# yes
	bra.b		_L16_6d
_L16_3d:
	cmpi.b		%d1,&INF		# is operand an INF?
	bne.b		_L16_4d			# no
	bsr.l		ld_pinf			# yes
	bra.b		_L16_6d
_L16_4d:
	cmpi.b		%d1,&QNAN		# is operand a QNAN?
	bne.b		_L16_5d			# no
	bsr.l		src_qnan			# yes
	bra.b		_L16_6d
_L16_5d:
	bsr.l		scoshd			# operand is a DENORM
_L16_6d:

#
#	Result is now in FP0
#
	movm.l		EXC_DREGS(%a6),&0x0303	# restore d0-d1/a0-a1
	fmovm.l		USER_FPCR(%a6),%fpcr,%fpsr # restore ctrl regs
	fmovm.x		EXC_FP1(%a6),&0x40	# restore fp1
	unlk		%a6
	rts

	global		_fcoshx_
_fcoshx_:
	link		%a6,&-LOCAL_SIZE

	movm.l		&0x0303,EXC_DREGS(%a6)	# save d0-d1/a0-a1
	fmovm.l		%fpcr,%fpsr,USER_FPCR(%a6) # save ctrl regs
	fmovm.x		&0xc0,EXC_FP0(%a6)	# save fp0/fp1

	fmov.l		&0x0,%fpcr		# zero FPCR

#
#	copy, convert, and tag input argument
#
	lea		FP_SRC(%a6),%a0
	mov.l		0x8+0x0(%a6),0x0(%a0)	# load ext input
	mov.l		0x8+0x4(%a6),0x4(%a0)
	mov.l		0x8+0x8(%a6),0x8(%a0)
	bsr.l		tag			# fetch operand type
	mov.b		%d0,STAG(%a6)
	mov.b		%d0,%d1

	andi.l		&0x00ff00ff,USER_FPSR(%a6)

	clr.l		%d0
	mov.b		FPCR_MODE(%a6),%d0	# pass rnd mode,prec

	tst.b		%d1
	bne.b		_L16_2x
	bsr.l		scosh			# operand is a NORM
	bra.b		_L16_6x
_L16_2x:
	cmpi.b		%d1,&ZERO		# is operand a ZERO?
	bne.b		_L16_3x			# no
	bsr.l		ld_pone			# yes
	bra.b		_L16_6x
_L16_3x:
	cmpi.b		%d1,&INF		# is operand an INF?
	bne.b		_L16_4x			# no
	bsr.l		ld_pinf			# yes
	bra.b		_L16_6x
_L16_4x:
	cmpi.b		%d1,&QNAN		# is operand a QNAN?
	bne.b		_L16_5x			# no
	bsr.l		src_qnan			# yes
	bra.b		_L16_6x
_L16_5x:
	bsr.l		scoshd			# operand is a DENORM
_L16_6x:

#
#	Result is now in FP0
#
	movm.l		EXC_DREGS(%a6),&0x0303	# restore d0-d1/a0-a1
	fmovm.l		USER_FPCR(%a6),%fpcr,%fpsr # restore ctrl regs
	fmovm.x		EXC_FP1(%a6),&0x40	# restore fp1
	unlk		%a6
	rts


#########################################################################
# MONADIC TEMPLATE							#
#########################################################################
	global		_facoss_
_facoss_:
	link		%a6,&-LOCAL_SIZE

	movm.l		&0x0303,EXC_DREGS(%a6)	# save d0-d1/a0-a1
	fmovm.l		%fpcr,%fpsr,USER_FPCR(%a6) # save ctrl regs
	fmovm.x		&0xc0,EXC_FP0(%a6)	# save fp0/fp1

	fmov.l		&0x0,%fpcr		# zero FPCR

#
#	copy, convert, and tag input argument
#
	fmov.s		0x8(%a6),%fp0		# load sgl input
	fmov.x		%fp0,FP_SRC(%a6)
	lea		FP_SRC(%a6),%a0
	bsr.l		tag			# fetch operand type
	mov.b		%d0,STAG(%a6)
	mov.b		%d0,%d1

	andi.l		&0x00ff00ff,USER_FPSR(%a6)

	clr.l		%d0
	mov.b		FPCR_MODE(%a6),%d0	# pass rnd mode,prec

	tst.b		%d1
	bne.b		_L17_2s
	bsr.l		sacos			# operand is a NORM
	bra.b		_L17_6s
_L17_2s:
	cmpi.b		%d1,&ZERO		# is operand a ZERO?
	bne.b		_L17_3s			# no
	bsr.l		ld_ppi2			# yes
	bra.b		_L17_6s
_L17_3s:
	cmpi.b		%d1,&INF		# is operand an INF?
	bne.b		_L17_4s			# no
	bsr.l		t_operr			# yes
	bra.b		_L17_6s
_L17_4s:
	cmpi.b		%d1,&QNAN		# is operand a QNAN?
	bne.b		_L17_5s			# no
	bsr.l		src_qnan			# yes
	bra.b		_L17_6s
_L17_5s:
	bsr.l		sacosd			# operand is a DENORM
_L17_6s:

#
#	Result is now in FP0
#
	movm.l		EXC_DREGS(%a6),&0x0303	# restore d0-d1/a0-a1
	fmovm.l		USER_FPCR(%a6),%fpcr,%fpsr # restore ctrl regs
	fmovm.x		EXC_FP1(%a6),&0x40	# restore fp1
	unlk		%a6
	rts

	global		_facosd_
_facosd_:
	link		%a6,&-LOCAL_SIZE

	movm.l		&0x0303,EXC_DREGS(%a6)	# save d0-d1/a0-a1
	fmovm.l		%fpcr,%fpsr,USER_FPCR(%a6) # save ctrl regs
	fmovm.x		&0xc0,EXC_FP0(%a6)	# save fp0/fp1

	fmov.l		&0x0,%fpcr		# zero FPCR

#
#	copy, convert, and tag input argument
#
	fmov.d		0x8(%a6),%fp0		# load dbl input
	fmov.x		%fp0,FP_SRC(%a6)
	lea		FP_SRC(%a6),%a0
	bsr.l		tag			# fetch operand type
	mov.b		%d0,STAG(%a6)
	mov.b		%d0,%d1

	andi.l		&0x00ff00ff,USER_FPSR(%a6)

	clr.l		%d0
	mov.b		FPCR_MODE(%a6),%d0	# pass rnd mode,prec

	mov.b		%d1,STAG(%a6)
	tst.b		%d1
	bne.b		_L17_2d
	bsr.l		sacos			# operand is a NORM
	bra.b		_L17_6d
_L17_2d:
	cmpi.b		%d1,&ZERO		# is operand a ZERO?
	bne.b		_L17_3d			# no
	bsr.l		ld_ppi2			# yes
	bra.b		_L17_6d
_L17_3d:
	cmpi.b		%d1,&INF		# is operand an INF?
	bne.b		_L17_4d			# no
	bsr.l		t_operr			# yes
	bra.b		_L17_6d
_L17_4d:
	cmpi.b		%d1,&QNAN		# is operand a QNAN?
	bne.b		_L17_5d			# no
	bsr.l		src_qnan			# yes
	bra.b		_L17_6d
_L17_5d:
	bsr.l		sacosd			# operand is a DENORM
_L17_6d:

#
#	Result is now in FP0
#
	movm.l		EXC_DREGS(%a6),&0x0303	# restore d0-d1/a0-a1
	fmovm.l		USER_FPCR(%a6),%fpcr,%fpsr # restore ctrl regs
	fmovm.x		EXC_FP1(%a6),&0x40	# restore fp1
	unlk		%a6
	rts

	global		_facosx_
_facosx_:
	link		%a6,&-LOCAL_SIZE

	movm.l		&0x0303,EXC_DREGS(%a6)	# save d0-d1/a0-a1
	fmovm.l		%fpcr,%fpsr,USER_FPCR(%a6) # save ctrl regs
	fmovm.x		&0xc0,EXC_FP0(%a6)	# save fp0/fp1

	fmov.l		&0x0,%fpcr		# zero FPCR

#
#	copy, convert, and tag input argument
#
	lea		FP_SRC(%a6),%a0
	mov.l		0x8+0x0(%a6),0x0(%a0)	# load ext input
	mov.l		0x8+0x4(%a6),0x4(%a0)
	mov.l		0x8+0x8(%a6),0x8(%a0)
	bsr.l		tag			# fetch operand type
	mov.b		%d0,STAG(%a6)
	mov.b		%d0,%d1

	andi.l		&0x00ff00ff,USER_FPSR(%a6)

	clr.l		%d0
	mov.b		FPCR_MODE(%a6),%d0	# pass rnd mode,prec

	tst.b		%d1
	bne.b		_L17_2x
	bsr.l		sacos			# operand is a NORM
	bra.b		_L17_6x
_L17_2x:
	cmpi.b		%d1,&ZERO		# is operand a ZERO?
	bne.b		_L17_3x			# no
	bsr.l		ld_ppi2			# yes
	bra.b		_L17_6x
_L17_3x:
	cmpi.b		%d1,&INF		# is operand an INF?
	bne.b		_L17_4x			# no
	bsr.l		t_operr			# yes
	bra.b		_L17_6x
_L17_4x:
	cmpi.b		%d1,&QNAN		# is operand a QNAN?
	bne.b		_L17_5x			# no
	bsr.l		src_qnan			# yes
	bra.b		_L17_6x
_L17_5x:
	bsr.l		sacosd			# operand is a DENORM
_L17_6x:

#
#	Result is now in FP0
#
	movm.l		EXC_DREGS(%a6),&0x0303	# restore d0-d1/a0-a1
	fmovm.l		USER_FPCR(%a6),%fpcr,%fpsr # restore ctrl regs
	fmovm.x		EXC_FP1(%a6),&0x40	# restore fp1
	unlk		%a6
	rts


#########################################################################
# MONADIC TEMPLATE							#
#########################################################################
	global		_fgetexps_
_fgetexps_:
	link		%a6,&-LOCAL_SIZE

	movm.l		&0x0303,EXC_DREGS(%a6)	# save d0-d1/a0-a1
	fmovm.l		%fpcr,%fpsr,USER_FPCR(%a6) # save ctrl regs
	fmovm.x		&0xc0,EXC_FP0(%a6)	# save fp0/fp1

	fmov.l		&0x0,%fpcr		# zero FPCR

#
#	copy, convert, and tag input argument
#
	fmov.s		0x8(%a6),%fp0		# load sgl input
	fmov.x		%fp0,FP_SRC(%a6)
	lea		FP_SRC(%a6),%a0
	bsr.l		tag			# fetch operand type
	mov.b		%d0,STAG(%a6)
	mov.b		%d0,%d1

	andi.l		&0x00ff00ff,USER_FPSR(%a6)

	clr.l		%d0
	mov.b		FPCR_MODE(%a6),%d0	# pass rnd mode,prec

	tst.b		%d1
	bne.b		_L18_2s
	bsr.l		sgetexp			# operand is a NORM
	bra.b		_L18_6s
_L18_2s:
	cmpi.b		%d1,&ZERO		# is operand a ZERO?
	bne.b		_L18_3s			# no
	bsr.l		src_zero			# yes
	bra.b		_L18_6s
_L18_3s:
	cmpi.b		%d1,&INF		# is operand an INF?
	bne.b		_L18_4s			# no
	bsr.l		t_operr			# yes
	bra.b		_L18_6s
_L18_4s:
	cmpi.b		%d1,&QNAN		# is operand a QNAN?
	bne.b		_L18_5s			# no
	bsr.l		src_qnan			# yes
	bra.b		_L18_6s
_L18_5s:
	bsr.l		sgetexpd			# operand is a DENORM
_L18_6s:

#
#	Result is now in FP0
#
	movm.l		EXC_DREGS(%a6),&0x0303	# restore d0-d1/a0-a1
	fmovm.l		USER_FPCR(%a6),%fpcr,%fpsr # restore ctrl regs
	fmovm.x		EXC_FP1(%a6),&0x40	# restore fp1
	unlk		%a6
	rts

	global		_fgetexpd_
_fgetexpd_:
	link		%a6,&-LOCAL_SIZE

	movm.l		&0x0303,EXC_DREGS(%a6)	# save d0-d1/a0-a1
	fmovm.l		%fpcr,%fpsr,USER_FPCR(%a6) # save ctrl regs
	fmovm.x		&0xc0,EXC_FP0(%a6)	# save fp0/fp1

	fmov.l		&0x0,%fpcr		# zero FPCR

#
#	copy, convert, and tag input argument
#
	fmov.d		0x8(%a6),%fp0		# load dbl input
	fmov.x		%fp0,FP_SRC(%a6)
	lea		FP_SRC(%a6),%a0
	bsr.l		tag			# fetch operand type
	mov.b		%d0,STAG(%a6)
	mov.b		%d0,%d1

	andi.l		&0x00ff00ff,USER_FPSR(%a6)

	clr.l		%d0
	mov.b		FPCR_MODE(%a6),%d0	# pass rnd mode,prec

	mov.b		%d1,STAG(%a6)
	tst.b		%d1
	bne.b		_L18_2d
	bsr.l		sgetexp			# operand is a NORM
	bra.b		_L18_6d
_L18_2d:
	cmpi.b		%d1,&ZERO		# is operand a ZERO?
	bne.b		_L18_3d			# no
	bsr.l		src_zero			# yes
	bra.b		_L18_6d
_L18_3d:
	cmpi.b		%d1,&INF		# is operand an INF?
	bne.b		_L18_4d			# no
	bsr.l		t_operr			# yes
	bra.b		_L18_6d
_L18_4d:
	cmpi.b		%d1,&QNAN		# is operand a QNAN?
	bne.b		_L18_5d			# no
	bsr.l		src_qnan			# yes
	bra.b		_L18_6d
_L18_5d:
	bsr.l		sgetexpd			# operand is a DENORM
_L18_6d:

#
#	Result is now in FP0
#
	movm.l		EXC_DREGS(%a6),&0x0303	# restore d0-d1/a0-a1
	fmovm.l		USER_FPCR(%a6),%fpcr,%fpsr # restore ctrl regs
	fmovm.x		EXC_FP1(%a6),&0x40	# restore fp1
	unlk		%a6
	rts

	global		_fgetexpx_
_fgetexpx_:
	link		%a6,&-LOCAL_SIZE

	movm.l		&0x0303,EXC_DREGS(%a6)	# save d0-d1/a0-a1
	fmovm.l		%fpcr,%fpsr,USER_FPCR(%a6) # save ctrl regs
	fmovm.x		&0xc0,EXC_FP0(%a6)	# save fp0/fp1

	fmov.l		&0x0,%fpcr		# zero FPCR

#
#	copy, convert, and tag input argument
#
	lea		FP_SRC(%a6),%a0
	mov.l		0x8+0x0(%a6),0x0(%a0)	# load ext input
	mov.l		0x8+0x4(%a6),0x4(%a0)
	mov.l		0x8+0x8(%a6),0x8(%a0)
	bsr.l		tag			# fetch operand type
	mov.b		%d0,STAG(%a6)
	mov.b		%d0,%d1

	andi.l		&0x00ff00ff,USER_FPSR(%a6)

	clr.l		%d0
	mov.b		FPCR_MODE(%a6),%d0	# pass rnd mode,prec

	tst.b		%d1
	bne.b		_L18_2x
	bsr.l		sgetexp			# operand is a NORM
	bra.b		_L18_6x
_L18_2x:
	cmpi.b		%d1,&ZERO		# is operand a ZERO?
	bne.b		_L18_3x			# no
	bsr.l		src_zero			# yes
	bra.b		_L18_6x
_L18_3x:
	cmpi.b		%d1,&INF		# is operand an INF?
	bne.b		_L18_4x			# no
	bsr.l		t_operr			# yes
	bra.b		_L18_6x
_L18_4x:
	cmpi.b		%d1,&QNAN		# is operand a QNAN?
	bne.b		_L18_5x			# no
	bsr.l		src_qnan			# yes
	bra.b		_L18_6x
_L18_5x:
	bsr.l		sgetexpd			# operand is a DENORM
_L18_6x:

#
#	Result is now in FP0
#
	movm.l		EXC_DREGS(%a6),&0x0303	# restore d0-d1/a0-a1
	fmovm.l		USER_FPCR(%a6),%fpcr,%fpsr # restore ctrl regs
	fmovm.x		EXC_FP1(%a6),&0x40	# restore fp1
	unlk		%a6
	rts


#########################################################################
# MONADIC TEMPLATE							#
#########################################################################
	global		_fgetmans_
_fgetmans_:
	link		%a6,&-LOCAL_SIZE

	movm.l		&0x0303,EXC_DREGS(%a6)	# save d0-d1/a0-a1
	fmovm.l		%fpcr,%fpsr,USER_FPCR(%a6) # save ctrl regs
	fmovm.x		&0xc0,EXC_FP0(%a6)	# save fp0/fp1

	fmov.l		&0x0,%fpcr		# zero FPCR

#
#	copy, convert, and tag input argument
#
	fmov.s		0x8(%a6),%fp0		# load sgl input
	fmov.x		%fp0,FP_SRC(%a6)
	lea		FP_SRC(%a6),%a0
	bsr.l		tag			# fetch operand type
	mov.b		%d0,STAG(%a6)
	mov.b		%d0,%d1

	andi.l		&0x00ff00ff,USER_FPSR(%a6)

	clr.l		%d0
	mov.b		FPCR_MODE(%a6),%d0	# pass rnd mode,prec

	tst.b		%d1
	bne.b		_L19_2s
	bsr.l		sgetman			# operand is a NORM
	bra.b		_L19_6s
_L19_2s:
	cmpi.b		%d1,&ZERO		# is operand a ZERO?
	bne.b		_L19_3s			# no
	bsr.l		src_zero			# yes
	bra.b		_L19_6s
_L19_3s:
	cmpi.b		%d1,&INF		# is operand an INF?
	bne.b		_L19_4s			# no
	bsr.l		t_operr			# yes
	bra.b		_L19_6s
_L19_4s:
	cmpi.b		%d1,&QNAN		# is operand a QNAN?
	bne.b		_L19_5s			# no
	bsr.l		src_qnan			# yes
	bra.b		_L19_6s
_L19_5s:
	bsr.l		sgetmand			# operand is a DENORM
_L19_6s:

#
#	Result is now in FP0
#
	movm.l		EXC_DREGS(%a6),&0x0303	# restore d0-d1/a0-a1
	fmovm.l		USER_FPCR(%a6),%fpcr,%fpsr # restore ctrl regs
	fmovm.x		EXC_FP1(%a6),&0x40	# restore fp1
	unlk		%a6
	rts

	global		_fgetmand_
_fgetmand_:
	link		%a6,&-LOCAL_SIZE

	movm.l		&0x0303,EXC_DREGS(%a6)	# save d0-d1/a0-a1
	fmovm.l		%fpcr,%fpsr,USER_FPCR(%a6) # save ctrl regs
	fmovm.x		&0xc0,EXC_FP0(%a6)	# save fp0/fp1

	fmov.l		&0x0,%fpcr		# zero FPCR

#
#	copy, convert, and tag input argument
#
	fmov.d		0x8(%a6),%fp0		# load dbl input
	fmov.x		%fp0,FP_SRC(%a6)
	lea		FP_SRC(%a6),%a0
	bsr.l		tag			# fetch operand type
	mov.b		%d0,STAG(%a6)
	mov.b		%d0,%d1

	andi.l		&0x00ff00ff,USER_FPSR(%a6)

	clr.l		%d0
	mov.b		FPCR_MODE(%a6),%d0	# pass rnd mode,prec

	mov.b		%d1,STAG(%a6)
	tst.b		%d1
	bne.b		_L19_2d
	bsr.l		sgetman			# operand is a NORM
	bra.b		_L19_6d
_L19_2d:
	cmpi.b		%d1,&ZERO		# is operand a ZERO?
	bne.b		_L19_3d			# no
	bsr.l		src_zero			# yes
	bra.b		_L19_6d
_L19_3d:
	cmpi.b		%d1,&INF		# is operand an INF?
	bne.b		_L19_4d			# no
	bsr.l		t_operr			# yes
	bra.b		_L19_6d
_L19_4d:
	cmpi.b		%d1,&QNAN		# is operand a QNAN?
	bne.b		_L19_5d			# no
	bsr.l		src_qnan			# yes
	bra.b		_L19_6d
_L19_5d:
	bsr.l		sgetmand			# operand is a DENORM
_L19_6d:

#
#	Result is now in FP0
#
	movm.l		EXC_DREGS(%a6),&0x0303	# restore d0-d1/a0-a1
	fmovm.l		USER_FPCR(%a6),%fpcr,%fpsr # restore ctrl regs
	fmovm.x		EXC_FP1(%a6),&0x40	# restore fp1
	unlk		%a6
	rts

	global		_fgetmanx_
_fgetmanx_:
	link		%a6,&-LOCAL_SIZE

	movm.l		&0x0303,EXC_DREGS(%a6)	# save d0-d1/a0-a1
	fmovm.l		%fpcr,%fpsr,USER_FPCR(%a6) # save ctrl regs
	fmovm.x		&0xc0,EXC_FP0(%a6)	# save fp0/fp1

	fmov.l		&0x0,%fpcr		# zero FPCR

#
#	copy, convert, and tag input argument
#
	lea		FP_SRC(%a6),%a0
	mov.l		0x8+0x0(%a6),0x0(%a0)	# load ext input
	mov.l		0x8+0x4(%a6),0x4(%a0)
	mov.l		0x8+0x8(%a6),0x8(%a0)
	bsr.l		tag			# fetch operand type
	mov.b		%d0,STAG(%a6)
	mov.b		%d0,%d1

	andi.l		&0x00ff00ff,USER_FPSR(%a6)

	clr.l		%d0
	mov.b		FPCR_MODE(%a6),%d0	# pass rnd mode,prec

	tst.b		%d1
	bne.b		_L19_2x
	bsr.l		sgetman			# operand is a NORM
	bra.b		_L19_6x
_L19_2x:
	cmpi.b		%d1,&ZERO		# is operand a ZERO?
	bne.b		_L19_3x			# no
	bsr.l		src_zero			# yes
	bra.b		_L19_6x
_L19_3x:
	cmpi.b		%d1,&INF		# is operand an INF?
	bne.b		_L19_4x			# no
	bsr.l		t_operr			# yes
	bra.b		_L19_6x
_L19_4x:
	cmpi.b		%d1,&QNAN		# is operand a QNAN?
	bne.b		_L19_5x			# no
	bsr.l		src_qnan			# yes
	bra.b		_L19_6x
_L19_5x:
	bsr.l		sgetmand			# operand is a DENORM
_L19_6x:

#
#	Result is now in FP0
#
	movm.l		EXC_DREGS(%a6),&0x0303	# restore d0-d1/a0-a1
	fmovm.l		USER_FPCR(%a6),%fpcr,%fpsr # restore ctrl regs
	fmovm.x		EXC_FP1(%a6),&0x40	# restore fp1
	unlk		%a6
	rts


#########################################################################
# MONADIC TEMPLATE							#
#########################################################################
	global		_fsincoss_
_fsincoss_:
	link		%a6,&-LOCAL_SIZE

	movm.l		&0x0303,EXC_DREGS(%a6)	# save d0-d1/a0-a1
	fmovm.l		%fpcr,%fpsr,USER_FPCR(%a6) # save ctrl regs
	fmovm.x		&0xc0,EXC_FP0(%a6)	# save fp0/fp1

	fmov.l		&0x0,%fpcr		# zero FPCR

#
#	copy, convert, and tag input argument
#
	fmov.s		0x8(%a6),%fp0		# load sgl input
	fmov.x		%fp0,FP_SRC(%a6)
	lea		FP_SRC(%a6),%a0
	bsr.l		tag			# fetch operand type
	mov.b		%d0,STAG(%a6)
	mov.b		%d0,%d1

	andi.l		&0x00ff00ff,USER_FPSR(%a6)

	clr.l		%d0
	mov.b		FPCR_MODE(%a6),%d0	# pass rnd mode,prec

	tst.b		%d1
	bne.b		_L20_2s
	bsr.l		ssincos			# operand is a NORM
	bra.b		_L20_6s
_L20_2s:
	cmpi.b		%d1,&ZERO		# is operand a ZERO?
	bne.b		_L20_3s			# no
	bsr.l		ssincosz			# yes
	bra.b		_L20_6s
_L20_3s:
	cmpi.b		%d1,&INF		# is operand an INF?
	bne.b		_L20_4s			# no
	bsr.l		ssincosi			# yes
	bra.b		_L20_6s
_L20_4s:
	cmpi.b		%d1,&QNAN		# is operand a QNAN?
	bne.b		_L20_5s			# no
	bsr.l		ssincosqnan			# yes
	bra.b		_L20_6s
_L20_5s:
	bsr.l		ssincosd			# operand is a DENORM
_L20_6s:

#
#	Result is now in FP0
#
	movm.l		EXC_DREGS(%a6),&0x0303	# restore d0-d1/a0-a1
	fmovm.l		USER_FPCR(%a6),%fpcr,%fpsr # restore ctrl regs
	fmovm.x		&0x03,-(%sp)		# store off fp0/fp1
	fmovm.x		(%sp)+,&0x40		# fp0 now in fp1
	fmovm.x		(%sp)+,&0x80		# fp1 now in fp0
	unlk		%a6
	rts

	global		_fsincosd_
_fsincosd_:
	link		%a6,&-LOCAL_SIZE

	movm.l		&0x0303,EXC_DREGS(%a6)	# save d0-d1/a0-a1
	fmovm.l		%fpcr,%fpsr,USER_FPCR(%a6) # save ctrl regs
	fmovm.x		&0xc0,EXC_FP0(%a6)	# save fp0/fp1

	fmov.l		&0x0,%fpcr		# zero FPCR

#
#	copy, convert, and tag input argument
#
	fmov.d		0x8(%a6),%fp0		# load dbl input
	fmov.x		%fp0,FP_SRC(%a6)
	lea		FP_SRC(%a6),%a0
	bsr.l		tag			# fetch operand type
	mov.b		%d0,STAG(%a6)
	mov.b		%d0,%d1

	andi.l		&0x00ff00ff,USER_FPSR(%a6)

	clr.l		%d0
	mov.b		FPCR_MODE(%a6),%d0	# pass rnd mode,prec

	mov.b		%d1,STAG(%a6)
	tst.b		%d1
	bne.b		_L20_2d
	bsr.l		ssincos			# operand is a NORM
	bra.b		_L20_6d
_L20_2d:
	cmpi.b		%d1,&ZERO		# is operand a ZERO?
	bne.b		_L20_3d			# no
	bsr.l		ssincosz			# yes
	bra.b		_L20_6d
_L20_3d:
	cmpi.b		%d1,&INF		# is operand an INF?
	bne.b		_L20_4d			# no
	bsr.l		ssincosi			# yes
	bra.b		_L20_6d
_L20_4d:
	cmpi.b		%d1,&QNAN		# is operand a QNAN?
	bne.b		_L20_5d			# no
	bsr.l		ssincosqnan			# yes
	bra.b		_L20_6d
_L20_5d:
	bsr.l		ssincosd			# operand is a DENORM
_L20_6d:

#
#	Result is now in FP0
#
	movm.l		EXC_DREGS(%a6),&0x0303	# restore d0-d1/a0-a1
	fmovm.l		USER_FPCR(%a6),%fpcr,%fpsr # restore ctrl regs
	fmovm.x		&0x03,-(%sp)		# store off fp0/fp1
	fmovm.x		(%sp)+,&0x40		# fp0 now in fp1
	fmovm.x		(%sp)+,&0x80		# fp1 now in fp0
	unlk		%a6
	rts

	global		_fsincosx_
_fsincosx_:
	link		%a6,&-LOCAL_SIZE

	movm.l		&0x0303,EXC_DREGS(%a6)	# save d0-d1/a0-a1
	fmovm.l		%fpcr,%fpsr,USER_FPCR(%a6) # save ctrl regs
	fmovm.x		&0xc0,EXC_FP0(%a6)	# save fp0/fp1

	fmov.l		&0x0,%fpcr		# zero FPCR

#
#	copy, convert, and tag input argument
#
	lea		FP_SRC(%a6),%a0
	mov.l		0x8+0x0(%a6),0x0(%a0)	# load ext input
	mov.l		0x8+0x4(%a6),0x4(%a0)
	mov.l		0x8+0x8(%a6),0x8(%a0)
	bsr.l		tag			# fetch operand type
	mov.b		%d0,STAG(%a6)
	mov.b		%d0,%d1

	andi.l		&0x00ff00ff,USER_FPSR(%a6)

	clr.l		%d0
	mov.b		FPCR_MODE(%a6),%d0	# pass rnd mode,prec

	tst.b		%d1
	bne.b		_L20_2x
	bsr.l		ssincos			# operand is a NORM
	bra.b		_L20_6x
_L20_2x:
	cmpi.b		%d1,&ZERO		# is operand a ZERO?
	bne.b		_L20_3x			# no
	bsr.l		ssincosz			# yes
	bra.b		_L20_6x
_L20_3x:
	cmpi.b		%d1,&INF		# is operand an INF?
	bne.b		_L20_4x			# no
	bsr.l		ssincosi			# yes
	bra.b		_L20_6x
_L20_4x:
	cmpi.b		%d1,&QNAN		# is operand a QNAN?
	bne.b		_L20_5x			# no
	bsr.l		ssincosqnan			# yes
	bra.b		_L20_6x
_L20_5x:
	bsr.l		ssincosd			# operand is a DENORM
_L20_6x:

#
#	Result is now in FP0
#
	movm.l		EXC_DREGS(%a6),&0x0303	# restore d0-d1/a0-a1
	fmovm.l		USER_FPCR(%a6),%fpcr,%fpsr # restore ctrl regs
	fmovm.x		&0x03,-(%sp)		# store off fp0/fp1
	fmovm.x		(%sp)+,&0x40		# fp0 now in fp1
	fmovm.x		(%sp)+,&0x80		# fp1 now in fp0
	unlk		%a6
	rts


#########################################################################
# DYADIC TEMPLATE							#
#########################################################################
	global		_frems_
_frems_:
	link		%a6,&-LOCAL_SIZE

	movm.l		&0x0303,EXC_DREGS(%a6)	# save d0-d1/a0-a1
	fmovm.l		%fpcr,%fpsr,USER_FPCR(%a6) # save ctrl regs
	fmovm.x		&0xc0,EXC_FP0(%a6)	# save fp0/fp1

	fmov.l		&0x0,%fpcr		# zero FPCR

#
#	copy, convert, and tag input argument
#
	fmov.s		0x8(%a6),%fp0		# load sgl dst
	fmov.x		%fp0,FP_DST(%a6)
	lea		FP_DST(%a6),%a0
	bsr.l		tag			# fetch operand type
	mov.b		%d0,DTAG(%a6)

	fmov.s		0xc(%a6),%fp0		# load sgl src
	fmov.x		%fp0,FP_SRC(%a6)
	lea		FP_SRC(%a6),%a0
	bsr.l		tag			# fetch operand type
	mov.b		%d0,STAG(%a6)
	mov.l		%d0,%d1

	andi.l		&0x00ff00ff,USER_FPSR(%a6)

	clr.l		%d0
	mov.b		FPCR_MODE(%a6),%d0	# pass rnd mode,prec

	lea		FP_SRC(%a6),%a0		# pass ptr to src
	lea		FP_DST(%a6),%a1		# pass ptr to dst

	tst.b		%d1
	bne.b		_L21_2s
	bsr.l		srem_snorm			# operand is a NORM
	bra.b		_L21_6s
_L21_2s:
	cmpi.b		%d1,&ZERO		# is operand a ZERO?
	bne.b		_L21_3s			# no
	bsr.l		srem_szero			# yes
	bra.b		_L21_6s
_L21_3s:
	cmpi.b		%d1,&INF		# is operand an INF?
	bne.b		_L21_4s			# no
	bsr.l		srem_sinf			# yes
	bra.b		_L21_6s
_L21_4s:
	cmpi.b		%d1,&QNAN		# is operand a QNAN?
	bne.b		_L21_5s			# no
	bsr.l		sop_sqnan			# yes
	bra.b		_L21_6s
_L21_5s:
	bsr.l		srem_sdnrm			# operand is a DENORM
_L21_6s:

#
#	Result is now in FP0
#
	movm.l		EXC_DREGS(%a6),&0x0303	# restore d0-d1/a0-a1
	fmovm.l		USER_FPCR(%a6),%fpcr,%fpsr # restore ctrl regs
	fmovm.x		EXC_FP1(%a6),&0x40	# restore fp1
	unlk		%a6
	rts

	global		_fremd_
_fremd_:
	link		%a6,&-LOCAL_SIZE

	movm.l		&0x0303,EXC_DREGS(%a6)	# save d0-d1/a0-a1
	fmovm.l		%fpcr,%fpsr,USER_FPCR(%a6) # save ctrl regs
	fmovm.x		&0xc0,EXC_FP0(%a6)	# save fp0/fp1

	fmov.l		&0x0,%fpcr		# zero FPCR

#
#	copy, convert, and tag input argument
#
	fmov.d		0x8(%a6),%fp0		# load dbl dst
	fmov.x		%fp0,FP_DST(%a6)
	lea		FP_DST(%a6),%a0
	bsr.l		tag			# fetch operand type
	mov.b		%d0,DTAG(%a6)

	fmov.d		0x10(%a6),%fp0		# load dbl src
	fmov.x		%fp0,FP_SRC(%a6)
	lea		FP_SRC(%a6),%a0
	bsr.l		tag			# fetch operand type
	mov.b		%d0,STAG(%a6)
	mov.l		%d0,%d1

	andi.l		&0x00ff00ff,USER_FPSR(%a6)

	clr.l		%d0
	mov.b		FPCR_MODE(%a6),%d0	# pass rnd mode,prec

	lea		FP_SRC(%a6),%a0		# pass ptr to src
	lea		FP_DST(%a6),%a1		# pass ptr to dst

	tst.b		%d1
	bne.b		_L21_2d
	bsr.l		srem_snorm			# operand is a NORM
	bra.b		_L21_6d
_L21_2d:
	cmpi.b		%d1,&ZERO		# is operand a ZERO?
	bne.b		_L21_3d			# no
	bsr.l		srem_szero			# yes
	bra.b		_L21_6d
_L21_3d:
	cmpi.b		%d1,&INF		# is operand an INF?
	bne.b		_L21_4d			# no
	bsr.l		srem_sinf			# yes
	bra.b		_L21_6d
_L21_4d:
	cmpi.b		%d1,&QNAN		# is operand a QNAN?
	bne.b		_L21_5d			# no
	bsr.l		sop_sqnan			# yes
	bra.b		_L21_6d
_L21_5d:
	bsr.l		srem_sdnrm			# operand is a DENORM
_L21_6d:

#
#	Result is now in FP0
#
	movm.l		EXC_DREGS(%a6),&0x0303	# restore d0-d1/a0-a1
	fmovm.l		USER_FPCR(%a6),%fpcr,%fpsr # restore ctrl regs
	fmovm.x		EXC_FP1(%a6),&0x40	# restore fp1
	unlk		%a6
	rts

	global		_fremx_
_fremx_:
	link		%a6,&-LOCAL_SIZE

	movm.l		&0x0303,EXC_DREGS(%a6)	# save d0-d1/a0-a1
	fmovm.l		%fpcr,%fpsr,USER_FPCR(%a6) # save ctrl regs
	fmovm.x		&0xc0,EXC_FP0(%a6)	# save fp0/fp1

	fmov.l		&0x0,%fpcr		# zero FPCR

#
#	copy, convert, and tag input argument
#
	lea		FP_DST(%a6),%a0
	mov.l		0x8+0x0(%a6),0x0(%a0)	# load ext dst
	mov.l		0x8+0x4(%a6),0x4(%a0)
	mov.l		0x8+0x8(%a6),0x8(%a0)
	bsr.l		tag			# fetch operand type
	mov.b		%d0,DTAG(%a6)

	lea		FP_SRC(%a6),%a0
	mov.l		0x14+0x0(%a6),0x0(%a0)	# load ext src
	mov.l		0x14+0x4(%a6),0x4(%a0)
	mov.l		0x14+0x8(%a6),0x8(%a0)
	bsr.l		tag			# fetch operand type
	mov.b		%d0,STAG(%a6)
	mov.l		%d0,%d1

	andi.l		&0x00ff00ff,USER_FPSR(%a6)

	clr.l		%d0
	mov.b		FPCR_MODE(%a6),%d0	# pass rnd mode,prec

	lea		FP_SRC(%a6),%a0		# pass ptr to src
	lea		FP_DST(%a6),%a1		# pass ptr to dst

	tst.b		%d1
	bne.b		_L21_2x
	bsr.l		srem_snorm			# operand is a NORM
	bra.b		_L21_6x
_L21_2x:
	cmpi.b		%d1,&ZERO		# is operand a ZERO?
	bne.b		_L21_3x			# no
	bsr.l		srem_szero			# yes
	bra.b		_L21_6x
_L21_3x:
	cmpi.b		%d1,&INF		# is operand an INF?
	bne.b		_L21_4x			# no
	bsr.l		srem_sinf			# yes
	bra.b		_L21_6x
_L21_4x:
	cmpi.b		%d1,&QNAN		# is operand a QNAN?
	bne.b		_L21_5x			# no
	bsr.l		sop_sqnan			# yes
	bra.b		_L21_6x
_L21_5x:
	bsr.l		srem_sdnrm			# operand is a DENORM
_L21_6x:

#
#	Result is now in FP0
#
	movm.l		EXC_DREGS(%a6),&0x0303	# restore d0-d1/a0-a1
	fmovm.l		USER_FPCR(%a6),%fpcr,%fpsr # restore ctrl regs
	fmovm.x		EXC_FP1(%a6),&0x40	# restore fp1
	unlk		%a6
	rts


#########################################################################
# DYADIC TEMPLATE							#
#########################################################################
	global		_fmods_
_fmods_:
	link		%a6,&-LOCAL_SIZE

	movm.l		&0x0303,EXC_DREGS(%a6)	# save d0-d1/a0-a1
	fmovm.l		%fpcr,%fpsr,USER_FPCR(%a6) # save ctrl regs
	fmovm.x		&0xc0,EXC_FP0(%a6)	# save fp0/fp1

	fmov.l		&0x0,%fpcr		# zero FPCR

#
#	copy, convert, and tag input argument
#
	fmov.s		0x8(%a6),%fp0		# load sgl dst
	fmov.x		%fp0,FP_DST(%a6)
	lea		FP_DST(%a6),%a0
	bsr.l		tag			# fetch operand type
	mov.b		%d0,DTAG(%a6)

	fmov.s		0xc(%a6),%fp0		# load sgl src
	fmov.x		%fp0,FP_SRC(%a6)
	lea		FP_SRC(%a6),%a0
	bsr.l		tag			# fetch operand type
	mov.b		%d0,STAG(%a6)
	mov.l		%d0,%d1

	andi.l		&0x00ff00ff,USER_FPSR(%a6)

	clr.l		%d0
	mov.b		FPCR_MODE(%a6),%d0	# pass rnd mode,prec

	lea		FP_SRC(%a6),%a0		# pass ptr to src
	lea		FP_DST(%a6),%a1		# pass ptr to dst

	tst.b		%d1
	bne.b		_L22_2s
	bsr.l		smod_snorm			# operand is a NORM
	bra.b		_L22_6s
_L22_2s:
	cmpi.b		%d1,&ZERO		# is operand a ZERO?
	bne.b		_L22_3s			# no
	bsr.l		smod_szero			# yes
	bra.b		_L22_6s
_L22_3s:
	cmpi.b		%d1,&INF		# is operand an INF?
	bne.b		_L22_4s			# no
	bsr.l		smod_sinf			# yes
	bra.b		_L22_6s
_L22_4s:
	cmpi.b		%d1,&QNAN		# is operand a QNAN?
	bne.b		_L22_5s			# no
	bsr.l		sop_sqnan			# yes
	bra.b		_L22_6s
_L22_5s:
	bsr.l		smod_sdnrm			# operand is a DENORM
_L22_6s:

#
#	Result is now in FP0
#
	movm.l		EXC_DREGS(%a6),&0x0303	# restore d0-d1/a0-a1
	fmovm.l		USER_FPCR(%a6),%fpcr,%fpsr # restore ctrl regs
	fmovm.x		EXC_FP1(%a6),&0x40	# restore fp1
	unlk		%a6
	rts

	global		_fmodd_
_fmodd_:
	link		%a6,&-LOCAL_SIZE

	movm.l		&0x0303,EXC_DREGS(%a6)	# save d0-d1/a0-a1
	fmovm.l		%fpcr,%fpsr,USER_FPCR(%a6) # save ctrl regs
	fmovm.x		&0xc0,EXC_FP0(%a6)	# save fp0/fp1

	fmov.l		&0x0,%fpcr		# zero FPCR

#
#	copy, convert, and tag input argument
#
	fmov.d		0x8(%a6),%fp0		# load dbl dst
	fmov.x		%fp0,FP_DST(%a6)
	lea		FP_DST(%a6),%a0
	bsr.l		tag			# fetch operand type
	mov.b		%d0,DTAG(%a6)

	fmov.d		0x10(%a6),%fp0		# load dbl src
	fmov.x		%fp0,FP_SRC(%a6)
	lea		FP_SRC(%a6),%a0
	bsr.l		tag			# fetch operand type
	mov.b		%d0,STAG(%a6)
	mov.l		%d0,%d1

	andi.l		&0x00ff00ff,USER_FPSR(%a6)

	clr.l		%d0
	mov.b		FPCR_MODE(%a6),%d0	# pass rnd mode,prec

	lea		FP_SRC(%a6),%a0		# pass ptr to src
	lea		FP_DST(%a6),%a1		# pass ptr to dst

	tst.b		%d1
	bne.b		_L22_2d
	bsr.l		smod_snorm			# operand is a NORM
	bra.b		_L22_6d
_L22_2d:
	cmpi.b		%d1,&ZERO		# is operand a ZERO?
	bne.b		_L22_3d			# no
	bsr.l		smod_szero			# yes
	bra.b		_L22_6d
_L22_3d:
	cmpi.b		%d1,&INF		# is operand an INF?
	bne.b		_L22_4d			# no
	bsr.l		smod_sinf			# yes
	bra.b		_L22_6d
_L22_4d:
	cmpi.b		%d1,&QNAN		# is operand a QNAN?
	bne.b		_L22_5d			# no
	bsr.l		sop_sqnan			# yes
	bra.b		_L22_6d
_L22_5d:
	bsr.l		smod_sdnrm			# operand is a DENORM
_L22_6d:

#
#	Result is now in FP0
#
	movm.l		EXC_DREGS(%a6),&0x0303	# restore d0-d1/a0-a1
	fmovm.l		USER_FPCR(%a6),%fpcr,%fpsr # restore ctrl regs
	fmovm.x		EXC_FP1(%a6),&0x40	# restore fp1
	unlk		%a6
	rts

	global		_fmodx_
_fmodx_:
	link		%a6,&-LOCAL_SIZE

	movm.l		&0x0303,EXC_DREGS(%a6)	# save d0-d1/a0-a1
	fmovm.l		%fpcr,%fpsr,USER_FPCR(%a6) # save ctrl regs
	fmovm.x		&0xc0,EXC_FP0(%a6)	# save fp0/fp1

	fmov.l		&0x0,%fpcr		# zero FPCR

#
#	copy, convert, and tag input argument
#
	lea		FP_DST(%a6),%a0
	mov.l		0x8+0x0(%a6),0x0(%a0)	# load ext dst
	mov.l		0x8+0x4(%a6),0x4(%a0)
	mov.l		0x8+0x8(%a6),0x8(%a0)
	bsr.l		tag			# fetch operand type
	mov.b		%d0,DTAG(%a6)

	lea		FP_SRC(%a6),%a0
	mov.l		0x14+0x0(%a6),0x0(%a0)	# load ext src
	mov.l		0x14+0x4(%a6),0x4(%a0)
	mov.l		0x14+0x8(%a6),0x8(%a0)
	bsr.l		tag			# fetch operand type
	mov.b		%d0,STAG(%a6)
	mov.l		%d0,%d1

	andi.l		&0x00ff00ff,USER_FPSR(%a6)

	clr.l		%d0
	mov.b		FPCR_MODE(%a6),%d0	# pass rnd mode,prec

	lea		FP_SRC(%a6),%a0		# pass ptr to src
	lea		FP_DST(%a6),%a1		# pass ptr to dst

	tst.b		%d1
	bne.b		_L22_2x
	bsr.l		smod_snorm			# operand is a NORM
	bra.b		_L22_6x
_L22_2x:
	cmpi.b		%d1,&ZERO		# is operand a ZERO?
	bne.b		_L22_3x			# no
	bsr.l		smod_szero			# yes
	bra.b		_L22_6x
_L22_3x:
	cmpi.b		%d1,&INF		# is operand an INF?
	bne.b		_L22_4x			# no
	bsr.l		smod_sinf			# yes
	bra.b		_L22_6x
_L22_4x:
	cmpi.b		%d1,&QNAN		# is operand a QNAN?
	bne.b		_L22_5x			# no
	bsr.l		sop_sqnan			# yes
	bra.b		_L22_6x
_L22_5x:
	bsr.l		smod_sdnrm			# operand is a DENORM
_L22_6x:

#
#	Result is now in FP0
#
	movm.l		EXC_DREGS(%a6),&0x0303	# restore d0-d1/a0-a1
	fmovm.l		USER_FPCR(%a6),%fpcr,%fpsr # restore ctrl regs
	fmovm.x		EXC_FP1(%a6),&0x40	# restore fp1
	unlk		%a6
	rts


#########################################################################
# DYADIC TEMPLATE							#
#########################################################################
	global		_fscales_
_fscales_:
	link		%a6,&-LOCAL_SIZE

	movm.l		&0x0303,EXC_DREGS(%a6)	# save d0-d1/a0-a1
	fmovm.l		%fpcr,%fpsr,USER_FPCR(%a6) # save ctrl regs
	fmovm.x		&0xc0,EXC_FP0(%a6)	# save fp0/fp1

	fmov.l		&0x0,%fpcr		# zero FPCR

#
#	copy, convert, and tag input argument
#
	fmov.s		0x8(%a6),%fp0		# load sgl dst
	fmov.x		%fp0,FP_DST(%a6)
	lea		FP_DST(%a6),%a0
	bsr.l		tag			# fetch operand type
	mov.b		%d0,DTAG(%a6)

	fmov.s		0xc(%a6),%fp0		# load sgl src
	fmov.x		%fp0,FP_SRC(%a6)
	lea		FP_SRC(%a6),%a0
	bsr.l		tag			# fetch operand type
	mov.b		%d0,STAG(%a6)
	mov.l		%d0,%d1

	andi.l		&0x00ff00ff,USER_FPSR(%a6)

	clr.l		%d0
	mov.b		FPCR_MODE(%a6),%d0	# pass rnd mode,prec

	lea		FP_SRC(%a6),%a0		# pass ptr to src
	lea		FP_DST(%a6),%a1		# pass ptr to dst

	tst.b		%d1
	bne.b		_L23_2s
	bsr.l		sscale_snorm			# operand is a NORM
	bra.b		_L23_6s
_L23_2s:
	cmpi.b		%d1,&ZERO		# is operand a ZERO?
	bne.b		_L23_3s			# no
	bsr.l		sscale_szero			# yes
	bra.b		_L23_6s
_L23_3s:
	cmpi.b		%d1,&INF		# is operand an INF?
	bne.b		_L23_4s			# no
	bsr.l		sscale_sinf			# yes
	bra.b		_L23_6s
_L23_4s:
	cmpi.b		%d1,&QNAN		# is operand a QNAN?
	bne.b		_L23_5s			# no
	bsr.l		sop_sqnan			# yes
	bra.b		_L23_6s
_L23_5s:
	bsr.l		sscale_sdnrm			# operand is a DENORM
_L23_6s:

#
#	Result is now in FP0
#
	movm.l		EXC_DREGS(%a6),&0x0303	# restore d0-d1/a0-a1
	fmovm.l		USER_FPCR(%a6),%fpcr,%fpsr # restore ctrl regs
	fmovm.x		EXC_FP1(%a6),&0x40	# restore fp1
	unlk		%a6
	rts

	global		_fscaled_
_fscaled_:
	link		%a6,&-LOCAL_SIZE

	movm.l		&0x0303,EXC_DREGS(%a6)	# save d0-d1/a0-a1
	fmovm.l		%fpcr,%fpsr,USER_FPCR(%a6) # save ctrl regs
	fmovm.x		&0xc0,EXC_FP0(%a6)	# save fp0/fp1

	fmov.l		&0x0,%fpcr		# zero FPCR

#
#	copy, convert, and tag input argument
#
	fmov.d		0x8(%a6),%fp0		# load dbl dst
	fmov.x		%fp0,FP_DST(%a6)
	lea		FP_DST(%a6),%a0
	bsr.l		tag			# fetch operand type
	mov.b		%d0,DTAG(%a6)

	fmov.d		0x10(%a6),%fp0		# load dbl src
	fmov.x		%fp0,FP_SRC(%a6)
	lea		FP_SRC(%a6),%a0
	bsr.l		tag			# fetch operand type
	mov.b		%d0,STAG(%a6)
	mov.l		%d0,%d1

	andi.l		&0x00ff00ff,USER_FPSR(%a6)

	clr.l		%d0
	mov.b		FPCR_MODE(%a6),%d0	# pass rnd mode,prec

	lea		FP_SRC(%a6),%a0		# pass ptr to src
	lea		FP_DST(%a6),%a1		# pass ptr to dst

	tst.b		%d1
	bne.b		_L23_2d
	bsr.l		sscale_snorm			# operand is a NORM
	bra.b		_L23_6d
_L23_2d:
	cmpi.b		%d1,&ZERO		# is operand a ZERO?
	bne.b		_L23_3d			# no
	bsr.l		sscale_szero			# yes
	bra.b		_L23_6d
_L23_3d:
	cmpi.b		%d1,&INF		# is operand an INF?
	bne.b		_L23_4d			# no
	bsr.l		sscale_sinf			# yes
	bra.b		_L23_6d
_L23_4d:
	cmpi.b		%d1,&QNAN		# is operand a QNAN?
	bne.b		_L23_5d			# no
	bsr.l		sop_sqnan			# yes
	bra.b		_L23_6d
_L23_5d:
	bsr.l		sscale_sdnrm			# operand is a DENORM
_L23_6d:

#
#	Result is now in FP0
#
	movm.l		EXC_DREGS(%a6),&0x0303	# restore d0-d1/a0-a1
	fmovm.l		USER_FPCR(%a6),%fpcr,%fpsr # restore ctrl regs
	fmovm.x		EXC_FP1(%a6),&0x40	# restore fp1
	unlk		%a6
	rts

	global		_fscalex_
_fscalex_:
	link		%a6,&-LOCAL_SIZE

	movm.l		&0x0303,EXC_DREGS(%a6)	# save d0-d1/a0-a1
	fmovm.l		%fpcr,%fpsr,USER_FPCR(%a6) # save ctrl regs
	fmovm.x		&0xc0,EXC_FP0(%a6)	# save fp0/fp1

	fmov.l		&0x0,%fpcr		# zero FPCR

#
#	copy, convert, and tag input argument
#
	lea		FP_DST(%a6),%a0
	mov.l		0x8+0x0(%a6),0x0(%a0)	# load ext dst
	mov.l		0x8+0x4(%a6),0x4(%a0)
	mov.l		0x8+0x8(%a6),0x8(%a0)
	bsr.l		tag			# fetch operand type
	mov.b		%d0,DTAG(%a6)

	lea		FP_SRC(%a6),%a0
	mov.l		0x14+0x0(%a6),0x0(%a0)	# load ext src
	mov.l		0x14+0x4(%a6),0x4(%a0)
	mov.l		0x14+0x8(%a6),0x8(%a0)
	bsr.l		tag			# fetch operand type
	mov.b		%d0,STAG(%a6)
	mov.l		%d0,%d1

	andi.l		&0x00ff00ff,USER_FPSR(%a6)

	clr.l		%d0
	mov.b		FPCR_MODE(%a6),%d0	# pass rnd mode,prec

	lea		FP_SRC(%a6),%a0		# pass ptr to src
	lea		FP_DST(%a6),%a1		# pass ptr to dst

	tst.b		%d1
	bne.b		_L23_2x
	bsr.l		sscale_snorm			# operand is a NORM
	bra.b		_L23_6x
_L23_2x:
	cmpi.b		%d1,&ZERO		# is operand a ZERO?
	bne.b		_L23_3x			# no
	bsr.l		sscale_szero			# yes
	bra.b		_L23_6x
_L23_3x:
	cmpi.b		%d1,&INF		# is operand an INF?
	bne.b		_L23_4x			# no
	bsr.l		sscale_sinf			# yes
	bra.b		_L23_6x
_L23_4x:
	cmpi.b		%d1,&QNAN		# is operand a QNAN?
	bne.b		_L23_5x			# no
	bsr.l		sop_sqnan			# yes
	bra.b		_L23_6x
_L23_5x:
	bsr.l		sscale_sdnrm			# operand is a DENORM
_L23_6x:

#
#	Result is now in FP0
#
	movm.l		EXC_DREGS(%a6),&0x0303	# restore d0-d1/a0-a1
	fmovm.l		USER_FPCR(%a6),%fpcr,%fpsr # restore ctrl regs
	fmovm.x		EXC_FP1(%a6),&0x40	# restore fp1
	unlk		%a6
	rts


#########################################################################
# ssin():     computes the sine of a normalized input			#
# ssind():    computes the sine of a denormalized input			#
# scos():     computes the cosine of a normalized input			#
# scosd():    computes the cosine of a denormalized input		#
# ssincos():  computes the sine and cosine of a normalized input	#
# ssincosd(): computes the sine and cosine of a denormalized input	#
#									#
# INPUT *************************************************************** #
#	a0 = pointer to extended precision input			#
#	d0 = round precision,mode					#
#									#
# OUTPUT ************************************************************** #
#	fp0 = sin(X) or cos(X) 						#
#									#
#    For ssincos(X):							#
#	fp0 = sin(X)							#
#	fp1 = cos(X)							#
#									#
# ACCURACY and MONOTONICITY ******************************************* #
#	The returned result is within 1 ulp in 64 significant bit, i.e.	#
#	within 0.5001 ulp to 53 bits if the result is subsequently 	#
#	rounded to double precision. The result is provably monotonic	#
#	in double precision.						#
#									#
# ALGORITHM ***********************************************************	#
#									#
#	SIN and COS:							#
#	1. If SIN is invoked, set AdjN := 0; otherwise, set AdjN := 1.	#
#									#
#	2. If |X| >= 15Pi or |X| < 2**(-40), go to 7.			#
#									#
#	3. Decompose X as X = N(Pi/2) + r where |r| <= Pi/4. Let	#
#		k = N mod 4, so in particular, k = 0,1,2,or 3.		#
#		Overwrite k by k := k + AdjN.				#
#									#
#	4. If k is even, go to 6.					#
#									#
#	5. (k is odd) Set j := (k-1)/2, sgn := (-1)**j. 		#
#		Return sgn*cos(r) where cos(r) is approximated by an 	#
#		even polynomial in r, 1 + r*r*(B1+s*(B2+ ... + s*B8)),	#
#		s = r*r.						#
#		Exit.							#
#									#
#	6. (k is even) Set j := k/2, sgn := (-1)**j. Return sgn*sin(r)	#
#		where sin(r) is approximated by an odd polynomial in r	#
#		r + r*s*(A1+s*(A2+ ... + s*A7)),	s = r*r.	#
#		Exit.							#
#									#
#	7. If |X| > 1, go to 9.						#
#									#
#	8. (|X|<2**(-40)) If SIN is invoked, return X; 			#
#		otherwise return 1.					#
#									#
#	9. Overwrite X by X := X rem 2Pi. Now that |X| <= Pi, 		#
#		go back to 3.						#
#									#
#	SINCOS:								#
#	1. If |X| >= 15Pi or |X| < 2**(-40), go to 6.			#
#									#
#	2. Decompose X as X = N(Pi/2) + r where |r| <= Pi/4. Let	#
#		k = N mod 4, so in particular, k = 0,1,2,or 3.		#
#									#
#	3. If k is even, go to 5.					#
#									#
#	4. (k is odd) Set j1 := (k-1)/2, j2 := j1 (EOR) (k mod 2), ie.	#
#		j1 exclusive or with the l.s.b. of k.			#
#		sgn1 := (-1)**j1, sgn2 := (-1)**j2.			#
#		SIN(X) = sgn1 * cos(r) and COS(X) = sgn2*sin(r) where	#
#		sin(r) and cos(r) are computed as odd and even 		#
#		polynomials in r, respectively. Exit			#
#									#
#	5. (k is even) Set j1 := k/2, sgn1 := (-1)**j1.			#
#		SIN(X) = sgn1 * sin(r) and COS(X) = sgn1*cos(r) where	#
#		sin(r) and cos(r) are computed as odd and even 		#
#		polynomials in r, respectively. Exit			#
#									#
#	6. If |X| > 1, go to 8.						#
#									#
#	7. (|X|<2**(-40)) SIN(X) = X and COS(X) = 1. Exit.		#
#									#
#	8. Overwrite X by X := X rem 2Pi. Now that |X| <= Pi, 		#
#		go back to 2.						#
#									#
#########################################################################

SINA7:	long		0xBD6AAA77,0xCCC994F5
SINA6:	long		0x3DE61209,0x7AAE8DA1
SINA5:	long		0xBE5AE645,0x2A118AE4
SINA4:	long		0x3EC71DE3,0xA5341531
SINA3:	long		0xBF2A01A0,0x1A018B59,0x00000000,0x00000000
SINA2:	long		0x3FF80000,0x88888888,0x888859AF,0x00000000
SINA1:	long		0xBFFC0000,0xAAAAAAAA,0xAAAAAA99,0x00000000

COSB8:	long		0x3D2AC4D0,0xD6011EE3
COSB7:	long		0xBDA9396F,0x9F45AC19
COSB6:	long		0x3E21EED9,0x0612C972
COSB5:	long		0xBE927E4F,0xB79D9FCF
COSB4:	long		0x3EFA01A0,0x1A01D423,0x00000000,0x00000000
COSB3:	long		0xBFF50000,0xB60B60B6,0x0B61D438,0x00000000
COSB2:	long		0x3FFA0000,0xAAAAAAAA,0xAAAAAB5E
COSB1:	long		0xBF000000

	set		INARG,FP_SCR0

	set		X,FP_SCR0
#	set		XDCARE,X+2
	set		XFRAC,X+4

	set		RPRIME,FP_SCR0
	set		SPRIME,FP_SCR1

	set		POSNEG1,L_SCR1
	set		TWOTO63,L_SCR1

	set		ENDFLAG,L_SCR2
	set		INT,L_SCR2

	set		ADJN,L_SCR3

############################################
	global		ssin
ssin:
	mov.l		&0,ADJN(%a6)		# yes; SET ADJN TO 0
	bra.b		SINBGN

############################################
	global		scos
scos:
	mov.l		&1,ADJN(%a6)		# yes; SET ADJN TO 1

############################################
SINBGN:
#--SAVE FPCR, FP1. CHECK IF |X| IS TOO SMALL OR LARGE

	fmov.x		(%a0),%fp0		# LOAD INPUT
	fmov.x		%fp0,X(%a6)		# save input at X

# "COMPACTIFY" X
	mov.l		(%a0),%d1		# put exp in hi word
	mov.w		4(%a0),%d1		# fetch hi(man)
	and.l		&0x7FFFFFFF,%d1		# strip sign

	cmpi.l		%d1,&0x3FD78000		# is |X| >= 2**(-40)?
	bge.b		SOK1			# no
	bra.w		SINSM			# yes; input is very small

SOK1:
	cmp.l		%d1,&0x4004BC7E		# is |X| < 15 PI?
	blt.b		SINMAIN			# no
	bra.w		SREDUCEX		# yes; input is very large

#--THIS IS THE USUAL CASE, |X| <= 15 PI.
#--THE ARGUMENT REDUCTION IS DONE BY TABLE LOOK UP.
SINMAIN:
	fmov.x		%fp0,%fp1
	fmul.d		TWOBYPI(%pc),%fp1 	# X*2/PI

	lea		PITBL+0x200(%pc),%a1 	# TABLE OF N*PI/2, N = -32,...,32

	fmov.l		%fp1,INT(%a6)		# CONVERT TO INTEGER

	mov.l		INT(%a6),%d1		# make a copy of N
	asl.l		&4,%d1			# N *= 16
	add.l		%d1,%a1			# tbl_addr = a1 + (N*16)

# A1 IS THE ADDRESS OF N*PIBY2
# ...WHICH IS IN TWO PIECES Y1 & Y2
	fsub.x		(%a1)+,%fp0 		# X-Y1
	fsub.s		(%a1),%fp0 		# fp0 = R = (X-Y1)-Y2

SINCONT:
#--continuation from REDUCEX

#--GET N+ADJN AND SEE IF SIN(R) OR COS(R) IS NEEDED
	mov.l		INT(%a6),%d1
	add.l		ADJN(%a6),%d1		# SEE IF D0 IS ODD OR EVEN
	ror.l		&1,%d1			# D0 WAS ODD IFF D0 IS NEGATIVE
	cmp.l		%d1,&0
	blt.w		COSPOLY

#--LET J BE THE LEAST SIG. BIT OF D0, LET SGN := (-1)**J.
#--THEN WE RETURN	SGN*SIN(R). SGN*SIN(R) IS COMPUTED BY
#--R' + R'*S*(A1 + S(A2 + S(A3 + S(A4 + ... + SA7)))), WHERE
#--R' = SGN*R, S=R*R. THIS CAN BE REWRITTEN AS
#--R' + R'*S*( [A1+T(A3+T(A5+TA7))] + [S(A2+T(A4+TA6))])
#--WHERE T=S*S.
#--NOTE THAT A3 THROUGH A7 ARE STORED IN DOUBLE PRECISION
#--WHILE A1 AND A2 ARE IN DOUBLE-EXTENDED FORMAT.
SINPOLY:
	fmovm.x		&0x0c,-(%sp)		# save fp2/fp3

	fmov.x		%fp0,X(%a6)		# X IS R
	fmul.x		%fp0,%fp0		# FP0 IS S

	fmov.d		SINA7(%pc),%fp3
	fmov.d		SINA6(%pc),%fp2

	fmov.x		%fp0,%fp1
	fmul.x		%fp1,%fp1		# FP1 IS T

	ror.l		&1,%d1
	and.l		&0x80000000,%d1
# ...LEAST SIG. BIT OF D0 IN SIGN POSITION
	eor.l		%d1,X(%a6)		# X IS NOW R'= SGN*R

	fmul.x		%fp1,%fp3		# TA7
	fmul.x		%fp1,%fp2		# TA6

	fadd.d		SINA5(%pc),%fp3		# A5+TA7
	fadd.d		SINA4(%pc),%fp2		# A4+TA6

	fmul.x		%fp1,%fp3		# T(A5+TA7)
	fmul.x		%fp1,%fp2		# T(A4+TA6)

	fadd.d		SINA3(%pc),%fp3		# A3+T(A5+TA7)
	fadd.x		SINA2(%pc),%fp2		# A2+T(A4+TA6)

	fmul.x		%fp3,%fp1		# T(A3+T(A5+TA7))

	fmul.x		%fp0,%fp2		# S(A2+T(A4+TA6))
	fadd.x		SINA1(%pc),%fp1		# A1+T(A3+T(A5+TA7))
	fmul.x		X(%a6),%fp0		# R'*S

	fadd.x		%fp2,%fp1		# [A1+T(A3+T(A5+TA7))]+[S(A2+T(A4+TA6))]

	fmul.x		%fp1,%fp0		# SIN(R')-R'

	fmovm.x		(%sp)+,&0x30		# restore fp2/fp3

	fmov.l		%d0,%fpcr		# restore users round mode,prec
	fadd.x		X(%a6),%fp0		# last inst - possible exception set
	bra		t_inx2

#--LET J BE THE LEAST SIG. BIT OF D0, LET SGN := (-1)**J.
#--THEN WE RETURN	SGN*COS(R). SGN*COS(R) IS COMPUTED BY
#--SGN + S'*(B1 + S(B2 + S(B3 + S(B4 + ... + SB8)))), WHERE
#--S=R*R AND S'=SGN*S. THIS CAN BE REWRITTEN AS
#--SGN + S'*([B1+T(B3+T(B5+TB7))] + [S(B2+T(B4+T(B6+TB8)))])
#--WHERE T=S*S.
#--NOTE THAT B4 THROUGH B8 ARE STORED IN DOUBLE PRECISION
#--WHILE B2 AND B3 ARE IN DOUBLE-EXTENDED FORMAT, B1 IS -1/2
#--AND IS THEREFORE STORED AS SINGLE PRECISION.
COSPOLY:
	fmovm.x		&0x0c,-(%sp)		# save fp2/fp3

	fmul.x		%fp0,%fp0		# FP0 IS S

	fmov.d		COSB8(%pc),%fp2
	fmov.d		COSB7(%pc),%fp3

	fmov.x		%fp0,%fp1
	fmul.x		%fp1,%fp1		# FP1 IS T

	fmov.x		%fp0,X(%a6)		# X IS S
	ror.l		&1,%d1
	and.l		&0x80000000,%d1
# ...LEAST SIG. BIT OF D0 IN SIGN POSITION

	fmul.x		%fp1,%fp2		# TB8

	eor.l		%d1,X(%a6)		# X IS NOW S'= SGN*S
	and.l		&0x80000000,%d1

	fmul.x		%fp1,%fp3		# TB7

	or.l		&0x3F800000,%d1		# D0 IS SGN IN SINGLE
	mov.l		%d1,POSNEG1(%a6)

	fadd.d		COSB6(%pc),%fp2		# B6+TB8
	fadd.d		COSB5(%pc),%fp3		# B5+TB7

	fmul.x		%fp1,%fp2		# T(B6+TB8)
	fmul.x		%fp1,%fp3		# T(B5+TB7)

	fadd.d		COSB4(%pc),%fp2		# B4+T(B6+TB8)
	fadd.x		COSB3(%pc),%fp3		# B3+T(B5+TB7)

	fmul.x		%fp1,%fp2		# T(B4+T(B6+TB8))
	fmul.x		%fp3,%fp1		# T(B3+T(B5+TB7))

	fadd.x		COSB2(%pc),%fp2		# B2+T(B4+T(B6+TB8))
	fadd.s		COSB1(%pc),%fp1		# B1+T(B3+T(B5+TB7))

	fmul.x		%fp2,%fp0		# S(B2+T(B4+T(B6+TB8)))

	fadd.x		%fp1,%fp0

	fmul.x		X(%a6),%fp0

	fmovm.x		(%sp)+,&0x30		# restore fp2/fp3

	fmov.l		%d0,%fpcr		# restore users round mode,prec
	fadd.s		POSNEG1(%a6),%fp0	# last inst - possible exception set
	bra		t_inx2

##############################################

# SINe: Big OR Small?
#--IF |X| > 15PI, WE USE THE GENERAL ARGUMENT REDUCTION.
#--IF |X| < 2**(-40), RETURN X OR 1.
SINBORS:
	cmp.l		%d1,&0x3FFF8000
	bgt.l		SREDUCEX

SINSM:
	mov.l		ADJN(%a6),%d1
	cmp.l		%d1,&0
	bgt.b		COSTINY

# here, the operation may underflow iff the precision is sgl or dbl.
# extended denorms are handled through another entry point.
SINTINY:
#	mov.w		&0x0000,XDCARE(%a6)	# JUST IN CASE

	fmov.l		%d0,%fpcr		# restore users round mode,prec
	mov.b		&FMOV_OP,%d1		# last inst is MOVE
	fmov.x		X(%a6),%fp0		# last inst - possible exception set
	bra		t_catch

COSTINY:
	fmov.s		&0x3F800000,%fp0	# fp0 = 1.0
	fmov.l		%d0,%fpcr		# restore users round mode,prec
	fadd.s 		&0x80800000,%fp0	# last inst - possible exception set
	bra		t_pinx2

################################################
	global		ssind
#--SIN(X) = X FOR DENORMALIZED X
ssind:
	bra		t_extdnrm

############################################
	global		scosd
#--COS(X) = 1 FOR DENORMALIZED X
scosd:
	fmov.s		&0x3F800000,%fp0	# fp0 = 1.0
	bra		t_pinx2

##################################################

	global		ssincos
ssincos:
#--SET ADJN TO 4
	mov.l		&4,ADJN(%a6)

	fmov.x		(%a0),%fp0		# LOAD INPUT
	fmov.x		%fp0,X(%a6)

	mov.l		(%a0),%d1
	mov.w		4(%a0),%d1
	and.l		&0x7FFFFFFF,%d1		# COMPACTIFY X

	cmp.l		%d1,&0x3FD78000		# |X| >= 2**(-40)?
	bge.b		SCOK1
	bra.w		SCSM

SCOK1:
	cmp.l		%d1,&0x4004BC7E		# |X| < 15 PI?
	blt.b		SCMAIN
	bra.w		SREDUCEX


#--THIS IS THE USUAL CASE, |X| <= 15 PI.
#--THE ARGUMENT REDUCTION IS DONE BY TABLE LOOK UP.
SCMAIN:
	fmov.x		%fp0,%fp1

	fmul.d		TWOBYPI(%pc),%fp1	# X*2/PI

	lea		PITBL+0x200(%pc),%a1	# TABLE OF N*PI/2, N = -32,...,32

	fmov.l		%fp1,INT(%a6)		# CONVERT TO INTEGER

	mov.l		INT(%a6),%d1
	asl.l		&4,%d1
	add.l		%d1,%a1			# ADDRESS OF N*PIBY2, IN Y1, Y2

	fsub.x		(%a1)+,%fp0		# X-Y1
	fsub.s		(%a1),%fp0		# FP0 IS R = (X-Y1)-Y2

SCCONT:
#--continuation point from REDUCEX

	mov.l		INT(%a6),%d1
	ror.l		&1,%d1
	cmp.l		%d1,&0			# D0 < 0 IFF N IS ODD
	bge.w		NEVEN

SNODD:
#--REGISTERS SAVED SO FAR: D0, A0, FP2.
	fmovm.x		&0x04,-(%sp)		# save fp2

	fmov.x		%fp0,RPRIME(%a6)
	fmul.x		%fp0,%fp0		# FP0 IS S = R*R
	fmov.d		SINA7(%pc),%fp1		# A7
	fmov.d		COSB8(%pc),%fp2		# B8
	fmul.x		%fp0,%fp1		# SA7
	fmul.x		%fp0,%fp2		# SB8

	mov.l		%d2,-(%sp)
	mov.l		%d1,%d2
	ror.l		&1,%d2
	and.l		&0x80000000,%d2
	eor.l		%d1,%d2
	and.l		&0x80000000,%d2

	fadd.d		SINA6(%pc),%fp1		# A6+SA7
	fadd.d		COSB7(%pc),%fp2		# B7+SB8

	fmul.x		%fp0,%fp1		# S(A6+SA7)
	eor.l		%d2,RPRIME(%a6)
	mov.l		(%sp)+,%d2
	fmul.x		%fp0,%fp2		# S(B7+SB8)
	ror.l		&1,%d1
	and.l		&0x80000000,%d1
	mov.l		&0x3F800000,POSNEG1(%a6)
	eor.l		%d1,POSNEG1(%a6)

	fadd.d		SINA5(%pc),%fp1		# A5+S(A6+SA7)
	fadd.d		COSB6(%pc),%fp2		# B6+S(B7+SB8)

	fmul.x		%fp0,%fp1		# S(A5+S(A6+SA7))
	fmul.x		%fp0,%fp2		# S(B6+S(B7+SB8))
	fmov.x		%fp0,SPRIME(%a6)

	fadd.d		SINA4(%pc),%fp1		# A4+S(A5+S(A6+SA7))
	eor.l		%d1,SPRIME(%a6)
	fadd.d		COSB5(%pc),%fp2		# B5+S(B6+S(B7+SB8))

	fmul.x		%fp0,%fp1		# S(A4+...)
	fmul.x		%fp0,%fp2		# S(B5+...)

	fadd.d		SINA3(%pc),%fp1		# A3+S(A4+...)
	fadd.d		COSB4(%pc),%fp2		# B4+S(B5+...)

	fmul.x		%fp0,%fp1		# S(A3+...)
	fmul.x		%fp0,%fp2		# S(B4+...)

	fadd.x		SINA2(%pc),%fp1		# A2+S(A3+...)
	fadd.x		COSB3(%pc),%fp2		# B3+S(B4+...)

	fmul.x		%fp0,%fp1		# S(A2+...)
	fmul.x		%fp0,%fp2		# S(B3+...)

	fadd.x		SINA1(%pc),%fp1		# A1+S(A2+...)
	fadd.x		COSB2(%pc),%fp2		# B2+S(B3+...)

	fmul.x		%fp0,%fp1		# S(A1+...)
	fmul.x		%fp2,%fp0		# S(B2+...)

	fmul.x		RPRIME(%a6),%fp1	# R'S(A1+...)
	fadd.s		COSB1(%pc),%fp0		# B1+S(B2...)
	fmul.x		SPRIME(%a6),%fp0	# S'(B1+S(B2+...))

	fmovm.x		(%sp)+,&0x20		# restore fp2

	fmov.l		%d0,%fpcr
	fadd.x		RPRIME(%a6),%fp1	# COS(X)
	bsr		sto_cos			# store cosine result
	fadd.s		POSNEG1(%a6),%fp0	# SIN(X)
	bra		t_inx2

NEVEN:
#--REGISTERS SAVED SO FAR: FP2.
	fmovm.x		&0x04,-(%sp)		# save fp2

	fmov.x		%fp0,RPRIME(%a6)
	fmul.x		%fp0,%fp0		# FP0 IS S = R*R

	fmov.d		COSB8(%pc),%fp1		# B8
	fmov.d		SINA7(%pc),%fp2		# A7

	fmul.x		%fp0,%fp1		# SB8
	fmov.x		%fp0,SPRIME(%a6)
	fmul.x		%fp0,%fp2		# SA7

	ror.l		&1,%d1
	and.l		&0x80000000,%d1

	fadd.d		COSB7(%pc),%fp1		# B7+SB8
	fadd.d		SINA6(%pc),%fp2		# A6+SA7

	eor.l		%d1,RPRIME(%a6)
	eor.l		%d1,SPRIME(%a6)

	fmul.x		%fp0,%fp1		# S(B7+SB8)

	or.l		&0x3F800000,%d1
	mov.l		%d1,POSNEG1(%a6)

	fmul.x		%fp0,%fp2		# S(A6+SA7)

	fadd.d		COSB6(%pc),%fp1		# B6+S(B7+SB8)
	fadd.d		SINA5(%pc),%fp2		# A5+S(A6+SA7)

	fmul.x		%fp0,%fp1		# S(B6+S(B7+SB8))
	fmul.x		%fp0,%fp2		# S(A5+S(A6+SA7))

	fadd.d		COSB5(%pc),%fp1		# B5+S(B6+S(B7+SB8))
	fadd.d		SINA4(%pc),%fp2		# A4+S(A5+S(A6+SA7))

	fmul.x		%fp0,%fp1		# S(B5+...)
	fmul.x		%fp0,%fp2		# S(A4+...)

	fadd.d		COSB4(%pc),%fp1		# B4+S(B5+...)
	fadd.d		SINA3(%pc),%fp2		# A3+S(A4+...)

	fmul.x		%fp0,%fp1		# S(B4+...)
	fmul.x		%fp0,%fp2		# S(A3+...)

	fadd.x		COSB3(%pc),%fp1		# B3+S(B4+...)
	fadd.x		SINA2(%pc),%fp2		# A2+S(A3+...)

	fmul.x		%fp0,%fp1		# S(B3+...)
	fmul.x		%fp0,%fp2		# S(A2+...)

	fadd.x		COSB2(%pc),%fp1		# B2+S(B3+...)
	fadd.x		SINA1(%pc),%fp2		# A1+S(A2+...)

	fmul.x		%fp0,%fp1		# S(B2+...)
	fmul.x		%fp2,%fp0		# s(a1+...)


	fadd.s		COSB1(%pc),%fp1		# B1+S(B2...)
	fmul.x		RPRIME(%a6),%fp0	# R'S(A1+...)
	fmul.x		SPRIME(%a6),%fp1	# S'(B1+S(B2+...))

	fmovm.x		(%sp)+,&0x20		# restore fp2

	fmov.l		%d0,%fpcr
	fadd.s		POSNEG1(%a6),%fp1	# COS(X)
	bsr		sto_cos			# store cosine result
	fadd.x		RPRIME(%a6),%fp0	# SIN(X)
	bra		t_inx2

################################################

SCBORS:
	cmp.l		%d1,&0x3FFF8000
	bgt.w		SREDUCEX

################################################

SCSM:
#	mov.w		&0x0000,XDCARE(%a6)
	fmov.s		&0x3F800000,%fp1

	fmov.l		%d0,%fpcr
	fsub.s		&0x00800000,%fp1
	bsr		sto_cos			# store cosine result
	fmov.l		%fpcr,%d0		# d0 must have fpcr,too
	mov.b		&FMOV_OP,%d1		# last inst is MOVE
	fmov.x		X(%a6),%fp0
	bra		t_catch

##############################################

	global		ssincosd
#--SIN AND COS OF X FOR DENORMALIZED X
ssincosd:
	mov.l		%d0,-(%sp)		# save d0
	fmov.s		&0x3F800000,%fp1
	bsr		sto_cos			# store cosine result
	mov.l		(%sp)+,%d0		# restore d0
	bra		t_extdnrm

############################################

#--WHEN REDUCEX IS USED, THE CODE WILL INEVITABLY BE SLOW.
#--THIS REDUCTION METHOD, HOWEVER, IS MUCH FASTER THAN USING
#--THE REMAINDER INSTRUCTION WHICH IS NOW IN SOFTWARE.
SREDUCEX:
	fmovm.x		&0x3c,-(%sp)		# save {fp2-fp5}
	mov.l		%d2,-(%sp)		# save d2
	fmov.s		&0x00000000,%fp1	# fp1 = 0

#--If compact form of abs(arg) in d0=$7ffeffff, argument is so large that
#--there is a danger of unwanted overflow in first LOOP iteration.  In this
#--case, reduce argument by one remainder step to make subsequent reduction
#--safe.
	cmp.l		%d1,&0x7ffeffff		# is arg dangerously large?
	bne.b		SLOOP			# no

# yes; create 2**16383*PI/2
	mov.w		&0x7ffe,FP_SCR0_EX(%a6)
	mov.l		&0xc90fdaa2,FP_SCR0_HI(%a6)
	clr.l		FP_SCR0_LO(%a6)

# create low half of 2**16383*PI/2 at FP_SCR1
	mov.w		&0x7fdc,FP_SCR1_EX(%a6)
	mov.l		&0x85a308d3,FP_SCR1_HI(%a6)
	clr.l		FP_SCR1_LO(%a6)

	ftest.x		%fp0			# test sign of argument
	fblt.w		sred_neg

	or.b		&0x80,FP_SCR0_EX(%a6)	# positive arg
	or.b		&0x80,FP_SCR1_EX(%a6)
sred_neg:
	fadd.x		FP_SCR0(%a6),%fp0	# high part of reduction is exact
	fmov.x		%fp0,%fp1		# save high result in fp1
	fadd.x		FP_SCR1(%a6),%fp0	# low part of reduction
	fsub.x		%fp0,%fp1		# determine low component of result
	fadd.x		FP_SCR1(%a6),%fp1	# fp0/fp1 are reduced argument.

#--ON ENTRY, FP0 IS X, ON RETURN, FP0 IS X REM PI/2, |X| <= PI/4.
#--integer quotient will be stored in N
#--Intermeditate remainder is 66-bit long; (R,r) in (FP0,FP1)
SLOOP:
	fmov.x		%fp0,INARG(%a6)		# +-2**K * F, 1 <= F < 2
	mov.w		INARG(%a6),%d1
	mov.l		%d1,%a1			# save a copy of D0
	and.l		&0x00007FFF,%d1
	sub.l		&0x00003FFF,%d1		# d0 = K
	cmp.l		%d1,&28
	ble.b		SLASTLOOP
SCONTLOOP:
	sub.l		&27,%d1			# d0 = L := K-27
	mov.b		&0,ENDFLAG(%a6)
	bra.b		SWORK
SLASTLOOP:
	clr.l		%d1			# d0 = L := 0
	mov.b		&1,ENDFLAG(%a6)

SWORK:
#--FIND THE REMAINDER OF (R,r) W.R.T.	2**L * (PI/2). L IS SO CHOSEN
#--THAT	INT( X * (2/PI) / 2**(L) ) < 2**29.

#--CREATE 2**(-L) * (2/PI), SIGN(INARG)*2**(63),
#--2**L * (PIby2_1), 2**L * (PIby2_2)

	mov.l		&0x00003FFE,%d2		# BIASED EXP OF 2/PI
	sub.l		%d1,%d2			# BIASED EXP OF 2**(-L)*(2/PI)

	mov.l		&0xA2F9836E,FP_SCR0_HI(%a6)
	mov.l		&0x4E44152A,FP_SCR0_LO(%a6)
	mov.w		%d2,FP_SCR0_EX(%a6)	# FP_SCR0 = 2**(-L)*(2/PI)

	fmov.x		%fp0,%fp2
	fmul.x		FP_SCR0(%a6),%fp2	# fp2 = X * 2**(-L)*(2/PI)

#--WE MUST NOW FIND INT(FP2). SINCE WE NEED THIS VALUE IN
#--FLOATING POINT FORMAT, THE TWO FMOVE'S	FMOVE.L FP <--> N
#--WILL BE TOO INEFFICIENT. THE WAY AROUND IT IS THAT
#--(SIGN(INARG)*2**63	+	FP2) - SIGN(INARG)*2**63 WILL GIVE
#--US THE DESIRED VALUE IN FLOATING POINT.
	mov.l		%a1,%d2
	swap		%d2
	and.l		&0x80000000,%d2
	or.l		&0x5F000000,%d2		# d2 = SIGN(INARG)*2**63 IN SGL
	mov.l		%d2,TWOTO63(%a6)
	fadd.s		TWOTO63(%a6),%fp2	# THE FRACTIONAL PART OF FP1 IS ROUNDED
	fsub.s		TWOTO63(%a6),%fp2	# fp2 = N
#	fint.x		%fp2

#--CREATING 2**(L)*Piby2_1 and 2**(L)*Piby2_2
	mov.l		%d1,%d2			# d2 = L

	add.l		&0x00003FFF,%d2		# BIASED EXP OF 2**L * (PI/2)
	mov.w		%d2,FP_SCR0_EX(%a6)
	mov.l		&0xC90FDAA2,FP_SCR0_HI(%a6)
	clr.l		FP_SCR0_LO(%a6)		# FP_SCR0 = 2**(L) * Piby2_1

	add.l		&0x00003FDD,%d1
	mov.w		%d1,FP_SCR1_EX(%a6)
	mov.l		&0x85A308D3,FP_SCR1_HI(%a6)
	clr.l		FP_SCR1_LO(%a6)		# FP_SCR1 = 2**(L) * Piby2_2

	mov.b		ENDFLAG(%a6),%d1

#--We are now ready to perform (R+r) - N*P1 - N*P2, P1 = 2**(L) * Piby2_1 and
#--P2 = 2**(L) * Piby2_2
	fmov.x		%fp2,%fp4		# fp4 = N
	fmul.x		FP_SCR0(%a6),%fp4	# fp4 = W = N*P1
	fmov.x		%fp2,%fp5		# fp5 = N
	fmul.x		FP_SCR1(%a6),%fp5	# fp5 = w = N*P2
	fmov.x		%fp4,%fp3		# fp3 = W = N*P1

#--we want P+p = W+w  but  |p| <= half ulp of P
#--Then, we need to compute  A := R-P   and  a := r-p
	fadd.x		%fp5,%fp3		# fp3 = P
	fsub.x		%fp3,%fp4		# fp4 = W-P

	fsub.x		%fp3,%fp0		# fp0 = A := R - P
	fadd.x		%fp5,%fp4		# fp4 = p = (W-P)+w

	fmov.x		%fp0,%fp3		# fp3 = A
	fsub.x		%fp4,%fp1		# fp1 = a := r - p

#--Now we need to normalize (A,a) to  "new (R,r)" where R+r = A+a but
#--|r| <= half ulp of R.
	fadd.x		%fp1,%fp0		# fp0 = R := A+a
#--No need to calculate r if this is the last loop
	cmp.b		%d1,&0
	bgt.w		SRESTORE

#--Need to calculate r
	fsub.x		%fp0,%fp3		# fp3 = A-R
	fadd.x		%fp3,%fp1		# fp1 = r := (A-R)+a
	bra.w		SLOOP

SRESTORE:
	fmov.l		%fp2,INT(%a6)
	mov.l		(%sp)+,%d2		# restore d2
	fmovm.x		(%sp)+,&0x3c		# restore {fp2-fp5}

	mov.l		ADJN(%a6),%d1
	cmp.l		%d1,&4

	blt.w		SINCONT
	bra.w		SCCONT

#########################################################################
# stan():  computes the tangent of a normalized input			#
# stand(): computes the tangent of a denormalized input			#
#									#
# INPUT *************************************************************** #
#	a0 = pointer to extended precision input			#
#	d0 = round precision,mode					#
#									#
# OUTPUT ************************************************************** #
#	fp0 = tan(X)							#
#									#
# ACCURACY and MONOTONICITY ******************************************* #
#	The returned result is within 3 ulp in 64 significant bit, i.e. #
#	within 0.5001 ulp to 53 bits if the result is subsequently	#
#	rounded to double precision. The result is provably monotonic	#
#	in double precision.						#
#									#
# ALGORITHM *********************************************************** #
#									#
#	1. If |X| >= 15Pi or |X| < 2**(-40), go to 6.			#
#									#
#	2. Decompose X as X = N(Pi/2) + r where |r| <= Pi/4. Let	#
#		k = N mod 2, so in particular, k = 0 or 1.		#
#									#
#	3. If k is odd, go to 5.					#
#									#
#	4. (k is even) Tan(X) = tan(r) and tan(r) is approximated by a	#
#		rational function U/V where				#
#		U = r + r*s*(P1 + s*(P2 + s*P3)), and			#
#		V = 1 + s*(Q1 + s*(Q2 + s*(Q3 + s*Q4))),  s = r*r.	#
#		Exit.							#
#									#
#	4. (k is odd) Tan(X) = -cot(r). Since tan(r) is approximated by #
#		a rational function U/V where				#
#		U = r + r*s*(P1 + s*(P2 + s*P3)), and			#
#		V = 1 + s*(Q1 + s*(Q2 + s*(Q3 + s*Q4))), s = r*r,	#
#		-Cot(r) = -V/U. Exit.					#
#									#
#	6. If |X| > 1, go to 8.						#
#									#
#	7. (|X|<2**(-40)) Tan(X) = X. Exit.				#
#									#
#	8. Overwrite X by X := X rem 2Pi. Now that |X| <= Pi, go back 	#
#		to 2.							#
#									#
#########################################################################

TANQ4:
	long		0x3EA0B759,0xF50F8688
TANP3:
	long		0xBEF2BAA5,0xA8924F04

TANQ3:
	long		0xBF346F59,0xB39BA65F,0x00000000,0x00000000

TANP2:
	long		0x3FF60000,0xE073D3FC,0x199C4A00,0x00000000

TANQ2:
	long		0x3FF90000,0xD23CD684,0x15D95FA1,0x00000000

TANP1:
	long		0xBFFC0000,0x8895A6C5,0xFB423BCA,0x00000000

TANQ1:
	long		0xBFFD0000,0xEEF57E0D,0xA84BC8CE,0x00000000

INVTWOPI:
	long		0x3FFC0000,0xA2F9836E,0x4E44152A,0x00000000

TWOPI1:
	long		0x40010000,0xC90FDAA2,0x00000000,0x00000000
TWOPI2:
	long		0x3FDF0000,0x85A308D4,0x00000000,0x00000000

#--N*PI/2, -32 <= N <= 32, IN A LEADING TERM IN EXT. AND TRAILING
#--TERM IN SGL. NOTE THAT PI IS 64-BIT LONG, THUS N*PI/2 IS AT
#--MOST 69 BITS LONG.
#	global		PITBL
PITBL:
	long		0xC0040000,0xC90FDAA2,0x2168C235,0x21800000
	long		0xC0040000,0xC2C75BCD,0x105D7C23,0xA0D00000
	long		0xC0040000,0xBC7EDCF7,0xFF523611,0xA1E80000
	long		0xC0040000,0xB6365E22,0xEE46F000,0x21480000
	long		0xC0040000,0xAFEDDF4D,0xDD3BA9EE,0xA1200000
	long		0xC0040000,0xA9A56078,0xCC3063DD,0x21FC0000
	long		0xC0040000,0xA35CE1A3,0xBB251DCB,0x21100000
	long		0xC0040000,0x9D1462CE,0xAA19D7B9,0xA1580000
	long		0xC0040000,0x96CBE3F9,0x990E91A8,0x21E00000
	long		0xC0040000,0x90836524,0x88034B96,0x20B00000
	long		0xC0040000,0x8A3AE64F,0x76F80584,0xA1880000
	long		0xC0040000,0x83F2677A,0x65ECBF73,0x21C40000
	long		0xC0030000,0xFB53D14A,0xA9C2F2C2,0x20000000
	long		0xC0030000,0xEEC2D3A0,0x87AC669F,0x21380000
	long		0xC0030000,0xE231D5F6,0x6595DA7B,0xA1300000
	long		0xC0030000,0xD5A0D84C,0x437F4E58,0x9FC00000
	long		0xC0030000,0xC90FDAA2,0x2168C235,0x21000000
	long		0xC0030000,0xBC7EDCF7,0xFF523611,0xA1680000
	long		0xC0030000,0xAFEDDF4D,0xDD3BA9EE,0xA0A00000
	long		0xC0030000,0xA35CE1A3,0xBB251DCB,0x20900000
	long		0xC0030000,0x96CBE3F9,0x990E91A8,0x21600000
	long		0xC0030000,0x8A3AE64F,0x76F80584,0xA1080000
	long		0xC0020000,0xFB53D14A,0xA9C2F2C2,0x1F800000
	long		0xC0020000,0xE231D5F6,0x6595DA7B,0xA0B00000
	long		0xC0020000,0xC90FDAA2,0x2168C235,0x20800000
	long		0xC0020000,0xAFEDDF4D,0xDD3BA9EE,0xA0200000
	long		0xC0020000,0x96CBE3F9,0x990E91A8,0x20E00000
	long		0xC0010000,0xFB53D14A,0xA9C2F2C2,0x1F000000
	long		0xC0010000,0xC90FDAA2,0x2168C235,0x20000000
	long		0xC0010000,0x96CBE3F9,0x990E91A8,0x20600000
	long		0xC0000000,0xC90FDAA2,0x2168C235,0x1F800000
	long		0xBFFF0000,0xC90FDAA2,0x2168C235,0x1F000000
	long		0x00000000,0x00000000,0x00000000,0x00000000
	long		0x3FFF0000,0xC90FDAA2,0x2168C235,0x9F000000
	long		0x40000000,0xC90FDAA2,0x2168C235,0x9F800000
	long		0x40010000,0x96CBE3F9,0x990E91A8,0xA0600000
	long		0x40010000,0xC90FDAA2,0x2168C235,0xA0000000
	long		0x40010000,0xFB53D14A,0xA9C2F2C2,0x9F000000
	long		0x40020000,0x96CBE3F9,0x990E91A8,0xA0E00000
	long		0x40020000,0xAFEDDF4D,0xDD3BA9EE,0x20200000
	long		0x40020000,0xC90FDAA2,0x2168C235,0xA0800000
	long		0x40020000,0xE231D5F6,0x6595DA7B,0x20B00000
	long		0x40020000,0xFB53D14A,0xA9C2F2C2,0x9F800000
	long		0x40030000,0x8A3AE64F,0x76F80584,0x21080000
	long		0x40030000,0x96CBE3F9,0x990E91A8,0xA1600000
	long		0x40030000,0xA35CE1A3,0xBB251DCB,0xA0900000
	long		0x40030000,0xAFEDDF4D,0xDD3BA9EE,0x20A00000
	long		0x40030000,0xBC7EDCF7,0xFF523611,0x21680000
	long		0x40030000,0xC90FDAA2,0x2168C235,0xA1000000
	long		0x40030000,0xD5A0D84C,0x437F4E58,0x1FC00000
	long		0x40030000,0xE231D5F6,0x6595DA7B,0x21300000
	long		0x40030000,0xEEC2D3A0,0x87AC669F,0xA1380000
	long		0x40030000,0xFB53D14A,0xA9C2F2C2,0xA0000000
	long		0x40040000,0x83F2677A,0x65ECBF73,0xA1C40000
	long		0x40040000,0x8A3AE64F,0x76F80584,0x21880000
	long		0x40040000,0x90836524,0x88034B96,0xA0B00000
	long		0x40040000,0x96CBE3F9,0x990E91A8,0xA1E00000
	long		0x40040000,0x9D1462CE,0xAA19D7B9,0x21580000
	long		0x40040000,0xA35CE1A3,0xBB251DCB,0xA1100000
	long		0x40040000,0xA9A56078,0xCC3063DD,0xA1FC0000
	long		0x40040000,0xAFEDDF4D,0xDD3BA9EE,0x21200000
	long		0x40040000,0xB6365E22,0xEE46F000,0xA1480000
	long		0x40040000,0xBC7EDCF7,0xFF523611,0x21E80000
	long		0x40040000,0xC2C75BCD,0x105D7C23,0x20D00000
	long		0x40040000,0xC90FDAA2,0x2168C235,0xA1800000

	set		INARG,FP_SCR0

	set		TWOTO63,L_SCR1
	set		INT,L_SCR1
	set		ENDFLAG,L_SCR2

	global		stan
stan:
	fmov.x		(%a0),%fp0		# LOAD INPUT

	mov.l		(%a0),%d1
	mov.w		4(%a0),%d1
	and.l		&0x7FFFFFFF,%d1

	cmp.l		%d1,&0x3FD78000		# |X| >= 2**(-40)?
	bge.b		TANOK1
	bra.w		TANSM
TANOK1:
	cmp.l		%d1,&0x4004BC7E		# |X| < 15 PI?
	blt.b		TANMAIN
	bra.w		REDUCEX

TANMAIN:
#--THIS IS THE USUAL CASE, |X| <= 15 PI.
#--THE ARGUMENT REDUCTION IS DONE BY TABLE LOOK UP.
	fmov.x		%fp0,%fp1
	fmul.d		TWOBYPI(%pc),%fp1	# X*2/PI

	lea.l		PITBL+0x200(%pc),%a1	# TABLE OF N*PI/2, N = -32,...,32

	fmov.l		%fp1,%d1		# CONVERT TO INTEGER

	asl.l		&4,%d1
	add.l		%d1,%a1			# ADDRESS N*PIBY2 IN Y1, Y2

	fsub.x		(%a1)+,%fp0		# X-Y1

	fsub.s		(%a1),%fp0		# FP0 IS R = (X-Y1)-Y2

	ror.l		&5,%d1
	and.l		&0x80000000,%d1		# D0 WAS ODD IFF D0 < 0

TANCONT:
	fmovm.x		&0x0c,-(%sp)		# save fp2,fp3

	cmp.l		%d1,&0
	blt.w		NODD

	fmov.x		%fp0,%fp1
	fmul.x		%fp1,%fp1		# S = R*R

	fmov.d		TANQ4(%pc),%fp3
	fmov.d		TANP3(%pc),%fp2

	fmul.x		%fp1,%fp3		# SQ4
	fmul.x		%fp1,%fp2		# SP3

	fadd.d		TANQ3(%pc),%fp3		# Q3+SQ4
	fadd.x		TANP2(%pc),%fp2		# P2+SP3

	fmul.x		%fp1,%fp3		# S(Q3+SQ4)
	fmul.x		%fp1,%fp2		# S(P2+SP3)

	fadd.x		TANQ2(%pc),%fp3		# Q2+S(Q3+SQ4)
	fadd.x		TANP1(%pc),%fp2		# P1+S(P2+SP3)

	fmul.x		%fp1,%fp3		# S(Q2+S(Q3+SQ4))
	fmul.x		%fp1,%fp2		# S(P1+S(P2+SP3))

	fadd.x		TANQ1(%pc),%fp3		# Q1+S(Q2+S(Q3+SQ4))
	fmul.x		%fp0,%fp2		# RS(P1+S(P2+SP3))

	fmul.x		%fp3,%fp1		# S(Q1+S(Q2+S(Q3+SQ4)))

	fadd.x		%fp2,%fp0		# R+RS(P1+S(P2+SP3))

	fadd.s		&0x3F800000,%fp1	# 1+S(Q1+...)

	fmovm.x		(%sp)+,&0x30		# restore fp2,fp3

	fmov.l		%d0,%fpcr		# restore users round mode,prec
	fdiv.x		%fp1,%fp0		# last inst - possible exception set
	bra		t_inx2

NODD:
	fmov.x		%fp0,%fp1
	fmul.x		%fp0,%fp0		# S = R*R

	fmov.d		TANQ4(%pc),%fp3
	fmov.d		TANP3(%pc),%fp2

	fmul.x		%fp0,%fp3		# SQ4
	fmul.x		%fp0,%fp2		# SP3

	fadd.d		TANQ3(%pc),%fp3		# Q3+SQ4
	fadd.x		TANP2(%pc),%fp2		# P2+SP3

	fmul.x		%fp0,%fp3		# S(Q3+SQ4)
	fmul.x		%fp0,%fp2		# S(P2+SP3)

	fadd.x		TANQ2(%pc),%fp3		# Q2+S(Q3+SQ4)
	fadd.x		TANP1(%pc),%fp2		# P1+S(P2+SP3)

	fmul.x		%fp0,%fp3		# S(Q2+S(Q3+SQ4))
	fmul.x		%fp0,%fp2		# S(P1+S(P2+SP3))

	fadd.x		TANQ1(%pc),%fp3		# Q1+S(Q2+S(Q3+SQ4))
	fmul.x		%fp1,%fp2		# RS(P1+S(P2+SP3))

	fmul.x		%fp3,%fp0		# S(Q1+S(Q2+S(Q3+SQ4)))

	fadd.x		%fp2,%fp1		# R+RS(P1+S(P2+SP3))
	fadd.s		&0x3F800000,%fp0	# 1+S(Q1+...)

	fmovm.x		(%sp)+,&0x30		# restore fp2,fp3

	fmov.x		%fp1,-(%sp)
	eor.l		&0x80000000,(%sp)

	fmov.l		%d0,%fpcr		# restore users round mode,prec
	fdiv.x		(%sp)+,%fp0		# last inst - possible exception set
	bra		t_inx2

TANBORS:
#--IF |X| > 15PI, WE USE THE GENERAL ARGUMENT REDUCTION.
#--IF |X| < 2**(-40), RETURN X OR 1.
	cmp.l		%d1,&0x3FFF8000
	bgt.b		REDUCEX

TANSM:
	fmov.x		%fp0,-(%sp)
	fmov.l		%d0,%fpcr		# restore users round mode,prec
	mov.b		&FMOV_OP,%d1		# last inst is MOVE
	fmov.x		(%sp)+,%fp0		# last inst - posibble exception set
	bra		t_catch

	global		stand
#--TAN(X) = X FOR DENORMALIZED X
stand:
	bra		t_extdnrm

#--WHEN REDUCEX IS USED, THE CODE WILL INEVITABLY BE SLOW.
#--THIS REDUCTION METHOD, HOWEVER, IS MUCH FASTER THAN USING
#--THE REMAINDER INSTRUCTION WHICH IS NOW IN SOFTWARE.
REDUCEX:
	fmovm.x		&0x3c,-(%sp)		# save {fp2-fp5}
	mov.l		%d2,-(%sp)		# save d2
	fmov.s		&0x00000000,%fp1	# fp1 = 0

#--If compact form of abs(arg) in d0=$7ffeffff, argument is so large that
#--there is a danger of unwanted overflow in first LOOP iteration.  In this
#--case, reduce argument by one remainder step to make subsequent reduction
#--safe.
	cmp.l		%d1,&0x7ffeffff		# is arg dangerously large?
	bne.b		LOOP			# no

# yes; create 2**16383*PI/2
	mov.w		&0x7ffe,FP_SCR0_EX(%a6)
	mov.l		&0xc90fdaa2,FP_SCR0_HI(%a6)
	clr.l		FP_SCR0_LO(%a6)

# create low half of 2**16383*PI/2 at FP_SCR1
	mov.w		&0x7fdc,FP_SCR1_EX(%a6)
	mov.l		&0x85a308d3,FP_SCR1_HI(%a6)
	clr.l		FP_SCR1_LO(%a6)

	ftest.x		%fp0			# test sign of argument
	fblt.w		red_neg

	or.b		&0x80,FP_SCR0_EX(%a6)	# positive arg
	or.b		&0x80,FP_SCR1_EX(%a6)
red_neg:
	fadd.x		FP_SCR0(%a6),%fp0	# high part of reduction is exact
	fmov.x		%fp0,%fp1		# save high result in fp1
	fadd.x		FP_SCR1(%a6),%fp0	# low part of reduction
	fsub.x		%fp0,%fp1		# determine low component of result
	fadd.x		FP_SCR1(%a6),%fp1	# fp0/fp1 are reduced argument.

#--ON ENTRY, FP0 IS X, ON RETURN, FP0 IS X REM PI/2, |X| <= PI/4.
#--integer quotient will be stored in N
#--Intermeditate remainder is 66-bit long; (R,r) in (FP0,FP1)
LOOP:
	fmov.x		%fp0,INARG(%a6)		# +-2**K * F, 1 <= F < 2
	mov.w		INARG(%a6),%d1
	mov.l		%d1,%a1			# save a copy of D0
	and.l		&0x00007FFF,%d1
	sub.l		&0x00003FFF,%d1		# d0 = K
	cmp.l		%d1,&28
	ble.b		LASTLOOP
CONTLOOP:
	sub.l		&27,%d1			# d0 = L := K-27
	mov.b		&0,ENDFLAG(%a6)
	bra.b		WORK
LASTLOOP:
	clr.l		%d1			# d0 = L := 0
	mov.b		&1,ENDFLAG(%a6)

WORK:
#--FIND THE REMAINDER OF (R,r) W.R.T.	2**L * (PI/2). L IS SO CHOSEN
#--THAT	INT( X * (2/PI) / 2**(L) ) < 2**29.

#--CREATE 2**(-L) * (2/PI), SIGN(INARG)*2**(63),
#--2**L * (PIby2_1), 2**L * (PIby2_2)

	mov.l		&0x00003FFE,%d2		# BIASED EXP OF 2/PI
	sub.l		%d1,%d2			# BIASED EXP OF 2**(-L)*(2/PI)

	mov.l		&0xA2F9836E,FP_SCR0_HI(%a6)
	mov.l		&0x4E44152A,FP_SCR0_LO(%a6)
	mov.w		%d2,FP_SCR0_EX(%a6)	# FP_SCR0 = 2**(-L)*(2/PI)

	fmov.x		%fp0,%fp2
	fmul.x		FP_SCR0(%a6),%fp2	# fp2 = X * 2**(-L)*(2/PI)

#--WE MUST NOW FIND INT(FP2). SINCE WE NEED THIS VALUE IN
#--FLOATING POINT FORMAT, THE TWO FMOVE'S	FMOVE.L FP <--> N
#--WILL BE TOO INEFFICIENT. THE WAY AROUND IT IS THAT
#--(SIGN(INARG)*2**63	+	FP2) - SIGN(INARG)*2**63 WILL GIVE
#--US THE DESIRED VALUE IN FLOATING POINT.
	mov.l		%a1,%d2
	swap		%d2
	and.l		&0x80000000,%d2
	or.l		&0x5F000000,%d2		# d2 = SIGN(INARG)*2**63 IN SGL
	mov.l		%d2,TWOTO63(%a6)
	fadd.s		TWOTO63(%a6),%fp2	# THE FRACTIONAL PART OF FP1 IS ROUNDED
	fsub.s		TWOTO63(%a6),%fp2	# fp2 = N
#	fintrz.x	%fp2,%fp2

#--CREATING 2**(L)*Piby2_1 and 2**(L)*Piby2_2
	mov.l		%d1,%d2			# d2 = L

	add.l		&0x00003FFF,%d2		# BIASED EXP OF 2**L * (PI/2)
	mov.w		%d2,FP_SCR0_EX(%a6)
	mov.l		&0xC90FDAA2,FP_SCR0_HI(%a6)
	clr.l		FP_SCR0_LO(%a6)		# FP_SCR0 = 2**(L) * Piby2_1

	add.l		&0x00003FDD,%d1
	mov.w		%d1,FP_SCR1_EX(%a6)
	mov.l		&0x85A308D3,FP_SCR1_HI(%a6)
	clr.l		FP_SCR1_LO(%a6)		# FP_SCR1 = 2**(L) * Piby2_2

	mov.b		ENDFLAG(%a6),%d1

#--We are now ready to perform (R+r) - N*P1 - N*P2, P1 = 2**(L) * Piby2_1 and
#--P2 = 2**(L) * Piby2_2
	fmov.x		%fp2,%fp4		# fp4 = N
	fmul.x		FP_SCR0(%a6),%fp4	# fp4 = W = N*P1
	fmov.x		%fp2,%fp5		# fp5 = N
	fmul.x		FP_SCR1(%a6),%fp5	# fp5 = w = N*P2
	fmov.x		%fp4,%fp3		# fp3 = W = N*P1

#--we want P+p = W+w  but  |p| <= half ulp of P
#--Then, we need to compute  A := R-P   and  a := r-p
	fadd.x		%fp5,%fp3		# fp3 = P
	fsub.x		%fp3,%fp4		# fp4 = W-P

	fsub.x		%fp3,%fp0		# fp0 = A := R - P
	fadd.x		%fp5,%fp4		# fp4 = p = (W-P)+w

	fmov.x		%fp0,%fp3		# fp3 = A
	fsub.x		%fp4,%fp1		# fp1 = a := r - p

#--Now we need to normalize (A,a) to  "new (R,r)" where R+r = A+a but
#--|r| <= half ulp of R.
	fadd.x		%fp1,%fp0		# fp0 = R := A+a
#--No need to calculate r if this is the last loop
	cmp.b		%d1,&0
	bgt.w		RESTORE

#--Need to calculate r
	fsub.x		%fp0,%fp3		# fp3 = A-R
	fadd.x		%fp3,%fp1		# fp1 = r := (A-R)+a
	bra.w		LOOP

RESTORE:
	fmov.l		%fp2,INT(%a6)
	mov.l		(%sp)+,%d2		# restore d2
	fmovm.x		(%sp)+,&0x3c		# restore {fp2-fp5}

	mov.l		INT(%a6),%d1
	ror.l		&1,%d1

	bra.w		TANCONT

#########################################################################
# satan():  computes the arctangent of a normalized number		#
# satand(): computes the arctangent of a denormalized number		#
#									#
# INPUT	*************************************************************** #
#	a0 = pointer to extended precision input			#
#	d0 = round precision,mode					#
#									#
# OUTPUT ************************************************************** #
#	fp0 = arctan(X)							#
#									#
# ACCURACY and MONOTONICITY ******************************************* #
#	The returned result is within 2 ulps in	64 significant bit,	#
#	i.e. within 0.5001 ulp to 53 bits if the result is subsequently	#
#	rounded to double precision. The result is provably monotonic	#
#	in double precision. 						#
#									#
# ALGORITHM *********************************************************** #
#	Step 1. If |X| >= 16 or |X| < 1/16, go to Step 5.		#
#									#
#	Step 2. Let X = sgn * 2**k * 1.xxxxxxxx...x. 			#
#		Note that k = -4, -3,..., or 3.				#
#		Define F = sgn * 2**k * 1.xxxx1, i.e. the first 5 	#
#		significant bits of X with a bit-1 attached at the 6-th	#
#		bit position. Define u to be u = (X-F) / (1 + X*F).	#
#									#
#	Step 3. Approximate arctan(u) by a polynomial poly.		#
#									#
#	Step 4. Return arctan(F) + poly, arctan(F) is fetched from a 	#
#		table of values calculated beforehand. Exit.		#
#									#
#	Step 5. If |X| >= 16, go to Step 7.				#
#									#
#	Step 6. Approximate arctan(X) by an odd polynomial in X. Exit.	#
#									#
#	Step 7. Define X' = -1/X. Approximate arctan(X') by an odd 	#
#		polynomial in X'.					#
#		Arctan(X) = sign(X)*Pi/2 + arctan(X'). Exit.		#
#									#
#########################################################################

ATANA3:	long		0xBFF6687E,0x314987D8
ATANA2:	long		0x4002AC69,0x34A26DB3
ATANA1:	long		0xBFC2476F,0x4E1DA28E

ATANB6:	long		0x3FB34444,0x7F876989
ATANB5:	long		0xBFB744EE,0x7FAF45DB
ATANB4:	long		0x3FBC71C6,0x46940220
ATANB3:	long		0xBFC24924,0x921872F9
ATANB2:	long		0x3FC99999,0x99998FA9
ATANB1:	long		0xBFD55555,0x55555555

ATANC5:	long		0xBFB70BF3,0x98539E6A
ATANC4:	long		0x3FBC7187,0x962D1D7D
ATANC3:	long		0xBFC24924,0x827107B8
ATANC2:	long		0x3FC99999,0x9996263E
ATANC1:	long		0xBFD55555,0x55555536

PPIBY2:	long		0x3FFF0000,0xC90FDAA2,0x2168C235,0x00000000
NPIBY2:	long		0xBFFF0000,0xC90FDAA2,0x2168C235,0x00000000

PTINY:	long		0x00010000,0x80000000,0x00000000,0x00000000
NTINY:	long		0x80010000,0x80000000,0x00000000,0x00000000

ATANTBL:
	long		0x3FFB0000,0x83D152C5,0x060B7A51,0x00000000
	long		0x3FFB0000,0x8BC85445,0x65498B8B,0x00000000
	long		0x3FFB0000,0x93BE4060,0x17626B0D,0x00000000
	long		0x3FFB0000,0x9BB3078D,0x35AEC202,0x00000000
	long		0x3FFB0000,0xA3A69A52,0x5DDCE7DE,0x00000000
	long		0x3FFB0000,0xAB98E943,0x62765619,0x00000000
	long		0x3FFB0000,0xB389E502,0xF9C59862,0x00000000
	long		0x3FFB0000,0xBB797E43,0x6B09E6FB,0x00000000
	long		0x3FFB0000,0xC367A5C7,0x39E5F446,0x00000000
	long		0x3FFB0000,0xCB544C61,0xCFF7D5C6,0x00000000
	long		0x3FFB0000,0xD33F62F8,0x2488533E,0x00000000
	long		0x3FFB0000,0xDB28DA81,0x62404C77,0x00000000
	long		0x3FFB0000,0xE310A407,0x8AD34F18,0x00000000
	long		0x3FFB0000,0xEAF6B0A8,0x188EE1EB,0x00000000
	long		0x3FFB0000,0xF2DAF194,0x9DBE79D5,0x00000000
	long		0x3FFB0000,0xFABD5813,0x61D47E3E,0x00000000
	long		0x3FFC0000,0x8346AC21,0x0959ECC4,0x00000000
	long		0x3FFC0000,0x8B232A08,0x304282D8,0x00000000
	long		0x3FFC0000,0x92FB70B8,0xD29AE2F9,0x00000000
	long		0x3FFC0000,0x9ACF476F,0x5CCD1CB4,0x00000000
	long		0x3FFC0000,0xA29E7630,0x4954F23F,0x00000000
	long		0x3FFC0000,0xAA68C5D0,0x8AB85230,0x00000000
	long		0x3FFC0000,0xB22DFFFD,0x9D539F83,0x00000000
	long		0x3FFC0000,0xB9EDEF45,0x3E900EA5,0x00000000
	long		0x3FFC0000,0xC1A85F1C,0xC75E3EA5,0x00000000
	long		0x3FFC0000,0xC95D1BE8,0x28138DE6,0x00000000
	long		0x3FFC0000,0xD10BF300,0x840D2DE4,0x00000000
	long		0x3FFC0000,0xD8B4B2BA,0x6BC05E7A,0x00000000
	long		0x3FFC0000,0xE0572A6B,0xB42335F6,0x00000000
	long		0x3FFC0000,0xE7F32A70,0xEA9CAA8F,0x00000000
	long		0x3FFC0000,0xEF888432,0x64ECEFAA,0x00000000
	long		0x3FFC0000,0xF7170A28,0xECC06666,0x00000000
	long		0x3FFD0000,0x812FD288,0x332DAD32,0x00000000
	long		0x3FFD0000,0x88A8D1B1,0x218E4D64,0x00000000
	long		0x3FFD0000,0x9012AB3F,0x23E4AEE8,0x00000000
	long		0x3FFD0000,0x976CC3D4,0x11E7F1B9,0x00000000
	long		0x3FFD0000,0x9EB68949,0x3889A227,0x00000000
	long		0x3FFD0000,0xA5EF72C3,0x4487361B,0x00000000
	long		0x3FFD0000,0xAD1700BA,0xF07A7227,0x00000000
	long		0x3FFD0000,0xB42CBCFA,0xFD37EFB7,0x00000000
	long		0x3FFD0000,0xBB303A94,0x0BA80F89,0x00000000
	long		0x3FFD0000,0xC22115C6,0xFCAEBBAF,0x00000000
	long		0x3FFD0000,0xC8FEF3E6,0x86331221,0x00000000
	long		0x3FFD0000,0xCFC98330,0xB4000C70,0x00000000
	long		0x3FFD0000,0xD6807AA1,0x102C5BF9,0x00000000
	long		0x3FFD0000,0xDD2399BC,0x31252AA3,0x00000000
	long		0x3FFD0000,0xE3B2A855,0x6B8FC517,0x00000000
	long		0x3FFD0000,0xEA2D764F,0x64315989,0x00000000
	long		0x3FFD0000,0xF3BF5BF8,0xBAD1A21D,0x00000000
	long		0x3FFE0000,0x801CE39E,0x0D205C9A,0x00000000
	long		0x3FFE0000,0x8630A2DA,0xDA1ED066,0x00000000
	long		0x3FFE0000,0x8C1AD445,0xF3E09B8C,0x00000000
	long		0x3FFE0000,0x91DB8F16,0x64F350E2,0x00000000
	long		0x3FFE0000,0x97731420,0x365E538C,0x00000000
	long		0x3FFE0000,0x9CE1C8E6,0xA0B8CDBA,0x00000000
	long		0x3FFE0000,0xA22832DB,0xCADAAE09,0x00000000
	long		0x3FFE0000,0xA746F2DD,0xB7602294,0x00000000
	long		0x3FFE0000,0xAC3EC0FB,0x997DD6A2,0x00000000
	long		0x3FFE0000,0xB110688A,0xEBDC6F6A,0x00000000
	long		0x3FFE0000,0xB5BCC490,0x59ECC4B0,0x00000000
	long		0x3FFE0000,0xBA44BC7D,0xD470782F,0x00000000
	long		0x3FFE0000,0xBEA94144,0xFD049AAC,0x00000000
	long		0x3FFE0000,0xC2EB4ABB,0x661628B6,0x00000000
	long		0x3FFE0000,0xC70BD54C,0xE602EE14,0x00000000
	long		0x3FFE0000,0xCD000549,0xADEC7159,0x00000000
	long		0x3FFE0000,0xD48457D2,0xD8EA4EA3,0x00000000
	long		0x3FFE0000,0xDB948DA7,0x12DECE3B,0x00000000
	long		0x3FFE0000,0xE23855F9,0x69E8096A,0x00000000
	long		0x3FFE0000,0xE8771129,0xC4353259,0x00000000
	long		0x3FFE0000,0xEE57C16E,0x0D379C0D,0x00000000
	long		0x3FFE0000,0xF3E10211,0xA87C3779,0x00000000
	long		0x3FFE0000,0xF919039D,0x758B8D41,0x00000000
	long		0x3FFE0000,0xFE058B8F,0x64935FB3,0x00000000
	long		0x3FFF0000,0x8155FB49,0x7B685D04,0x00000000
	long		0x3FFF0000,0x83889E35,0x49D108E1,0x00000000
	long		0x3FFF0000,0x859CFA76,0x511D724B,0x00000000
	long		0x3FFF0000,0x87952ECF,0xFF8131E7,0x00000000
	long		0x3FFF0000,0x89732FD1,0x9557641B,0x00000000
	long		0x3FFF0000,0x8B38CAD1,0x01932A35,0x00000000
	long		0x3FFF0000,0x8CE7A8D8,0x301EE6B5,0x00000000
	long		0x3FFF0000,0x8F46A39E,0x2EAE5281,0x00000000
	long		0x3FFF0000,0x922DA7D7,0x91888487,0x00000000
	long		0x3FFF0000,0x94D19FCB,0xDEDF5241,0x00000000
	long		0x3FFF0000,0x973AB944,0x19D2A08B,0x00000000
	long		0x3FFF0000,0x996FF00E,0x08E10B96,0x00000000
	long		0x3FFF0000,0x9B773F95,0x12321DA7,0x00000000
	long		0x3FFF0000,0x9D55CC32,0x0F935624,0x00000000
	long		0x3FFF0000,0x9F100575,0x006CC571,0x00000000
	long		0x3FFF0000,0xA0A9C290,0xD97CC06C,0x00000000
	long		0x3FFF0000,0xA22659EB,0xEBC0630A,0x00000000
	long		0x3FFF0000,0xA388B4AF,0xF6EF0EC9,0x00000000
	long		0x3FFF0000,0xA4D35F10,0x61D292C4,0x00000000
	long		0x3FFF0000,0xA60895DC,0xFBE3187E,0x00000000
	long		0x3FFF0000,0xA72A51DC,0x7367BEAC,0x00000000
	long		0x3FFF0000,0xA83A5153,0x0956168F,0x00000000
	long		0x3FFF0000,0xA93A2007,0x7539546E,0x00000000
	long		0x3FFF0000,0xAA9E7245,0x023B2605,0x00000000
	long		0x3FFF0000,0xAC4C84BA,0x6FE4D58F,0x00000000
	long		0x3FFF0000,0xADCE4A4A,0x606B9712,0x00000000
	long		0x3FFF0000,0xAF2A2DCD,0x8D263C9C,0x00000000
	long		0x3FFF0000,0xB0656F81,0xF22265C7,0x00000000
	long		0x3FFF0000,0xB1846515,0x0F71496A,0x00000000
	long		0x3FFF0000,0xB28AAA15,0x6F9ADA35,0x00000000
	long		0x3FFF0000,0xB37B44FF,0x3766B895,0x00000000
	long		0x3FFF0000,0xB458C3DC,0xE9630433,0x00000000
	long		0x3FFF0000,0xB525529D,0x562246BD,0x00000000
	long		0x3FFF0000,0xB5E2CCA9,0x5F9D88CC,0x00000000
	long		0x3FFF0000,0xB692CADA,0x7ACA1ADA,0x00000000
	long		0x3FFF0000,0xB736AEA7,0xA6925838,0x00000000
	long		0x3FFF0000,0xB7CFAB28,0x7E9F7B36,0x00000000
	long		0x3FFF0000,0xB85ECC66,0xCB219835,0x00000000
	long		0x3FFF0000,0xB8E4FD5A,0x20A593DA,0x00000000
	long		0x3FFF0000,0xB99F41F6,0x4AFF9BB5,0x00000000
	long		0x3FFF0000,0xBA7F1E17,0x842BBE7B,0x00000000
	long		0x3FFF0000,0xBB471285,0x7637E17D,0x00000000
	long		0x3FFF0000,0xBBFABE8A,0x4788DF6F,0x00000000
	long		0x3FFF0000,0xBC9D0FAD,0x2B689D79,0x00000000
	long		0x3FFF0000,0xBD306A39,0x471ECD86,0x00000000
	long		0x3FFF0000,0xBDB6C731,0x856AF18A,0x00000000
	long		0x3FFF0000,0xBE31CAC5,0x02E80D70,0x00000000
	long		0x3FFF0000,0xBEA2D55C,0xE33194E2,0x00000000
	long		0x3FFF0000,0xBF0B10B7,0xC03128F0,0x00000000
	long		0x3FFF0000,0xBF6B7A18,0xDACB778D,0x00000000
	long		0x3FFF0000,0xBFC4EA46,0x63FA18F6,0x00000000
	long		0x3FFF0000,0xC0181BDE,0x8B89A454,0x00000000
	long		0x3FFF0000,0xC065B066,0xCFBF6439,0x00000000
	long		0x3FFF0000,0xC0AE345F,0x56340AE6,0x00000000
	long		0x3FFF0000,0xC0F22291,0x9CB9E6A7,0x00000000

	set		X,FP_SCR0
	set		XDCARE,X+2
	set		XFRAC,X+4
	set		XFRACLO,X+8

	set		ATANF,FP_SCR1
	set		ATANFHI,ATANF+4
	set		ATANFLO,ATANF+8

	global		satan
#--ENTRY POINT FOR ATAN(X), HERE X IS FINITE, NON-ZERO, AND NOT NAN'S
satan:
	fmov.x		(%a0),%fp0		# LOAD INPUT

	mov.l		(%a0),%d1
	mov.w		4(%a0),%d1
	fmov.x		%fp0,X(%a6)
	and.l		&0x7FFFFFFF,%d1

	cmp.l		%d1,&0x3FFB8000		# |X| >= 1/16?
	bge.b		ATANOK1
	bra.w		ATANSM

ATANOK1:
	cmp.l		%d1,&0x4002FFFF		# |X| < 16 ?
	ble.b		ATANMAIN
	bra.w		ATANBIG

#--THE MOST LIKELY CASE, |X| IN [1/16, 16). WE USE TABLE TECHNIQUE
#--THE IDEA IS ATAN(X) = ATAN(F) + ATAN( [X-F] / [1+XF] ).
#--SO IF F IS CHOSEN TO BE CLOSE TO X AND ATAN(F) IS STORED IN
#--A TABLE, ALL WE NEED IS TO APPROXIMATE ATAN(U) WHERE
#--U = (X-F)/(1+XF) IS SMALL (REMEMBER F IS CLOSE TO X). IT IS
#--TRUE THAT A DIVIDE IS NOW NEEDED, BUT THE APPROXIMATION FOR
#--ATAN(U) IS A VERY SHORT POLYNOMIAL AND THE INDEXING TO
#--FETCH F AND SAVING OF REGISTERS CAN BE ALL HIDED UNDER THE
#--DIVIDE. IN THE END THIS METHOD IS MUCH FASTER THAN A TRADITIONAL
#--ONE. NOTE ALSO THAT THE TRADITIONAL SCHEME THAT APPROXIMATE
#--ATAN(X) DIRECTLY WILL NEED TO USE A RATIONAL APPROXIMATION
#--(DIVISION NEEDED) ANYWAY BECAUSE A POLYNOMIAL APPROXIMATION
#--WILL INVOLVE A VERY LONG POLYNOMIAL.

#--NOW WE SEE X AS +-2^K * 1.BBBBBBB....B <- 1. + 63 BITS
#--WE CHOSE F TO BE +-2^K * 1.BBBB1
#--THAT IS IT MATCHES THE EXPONENT AND FIRST 5 BITS OF X, THE
#--SIXTH BITS IS SET TO BE 1. SINCE K = -4, -3, ..., 3, THERE
#--ARE ONLY 8 TIMES 16 = 2^7 = 128 |F|'S. SINCE ATAN(-|F|) IS
#-- -ATAN(|F|), WE NEED TO STORE ONLY ATAN(|F|).

ATANMAIN:

	and.l		&0xF8000000,XFRAC(%a6)	# FIRST 5 BITS
	or.l		&0x04000000,XFRAC(%a6)	# SET 6-TH BIT TO 1
	mov.l		&0x00000000,XFRACLO(%a6) # LOCATION OF X IS NOW F

	fmov.x		%fp0,%fp1		# FP1 IS X
	fmul.x		X(%a6),%fp1		# FP1 IS X*F, NOTE THAT X*F > 0
	fsub.x		X(%a6),%fp0		# FP0 IS X-F
	fadd.s		&0x3F800000,%fp1	# FP1 IS 1 + X*F
	fdiv.x		%fp1,%fp0		# FP0 IS U = (X-F)/(1+X*F)

#--WHILE THE DIVISION IS TAKING ITS TIME, WE FETCH ATAN(|F|)
#--CREATE ATAN(F) AND STORE IT IN ATANF, AND
#--SAVE REGISTERS FP2.

	mov.l		%d2,-(%sp)		# SAVE d2 TEMPORARILY
	mov.l		%d1,%d2			# THE EXP AND 16 BITS OF X
	and.l		&0x00007800,%d1		# 4 VARYING BITS OF F'S FRACTION
	and.l		&0x7FFF0000,%d2		# EXPONENT OF F
	sub.l		&0x3FFB0000,%d2		# K+4
	asr.l		&1,%d2
	add.l		%d2,%d1			# THE 7 BITS IDENTIFYING F
	asr.l		&7,%d1			# INDEX INTO TBL OF ATAN(|F|)
	lea		ATANTBL(%pc),%a1
	add.l		%d1,%a1			# ADDRESS OF ATAN(|F|)
	mov.l		(%a1)+,ATANF(%a6)
	mov.l		(%a1)+,ATANFHI(%a6)
	mov.l		(%a1)+,ATANFLO(%a6)	# ATANF IS NOW ATAN(|F|)
	mov.l		X(%a6),%d1		# LOAD SIGN AND EXPO. AGAIN
	and.l		&0x80000000,%d1		# SIGN(F)
	or.l		%d1,ATANF(%a6)		# ATANF IS NOW SIGN(F)*ATAN(|F|)
	mov.l		(%sp)+,%d2		# RESTORE d2

#--THAT'S ALL I HAVE TO DO FOR NOW,
#--BUT ALAS, THE DIVIDE IS STILL CRANKING!

#--U IN FP0, WE ARE NOW READY TO COMPUTE ATAN(U) AS
#--U + A1*U*V*(A2 + V*(A3 + V)), V = U*U
#--THE POLYNOMIAL MAY LOOK STRANGE, BUT IS NEVERTHELESS CORRECT.
#--THE NATURAL FORM IS U + U*V*(A1 + V*(A2 + V*A3))
#--WHAT WE HAVE HERE IS MERELY	A1 = A3, A2 = A1/A3, A3 = A2/A3.
#--THE REASON FOR THIS REARRANGEMENT IS TO MAKE THE INDEPENDENT
#--PARTS A1*U*V AND (A2 + ... STUFF) MORE LOAD-BALANCED

	fmovm.x		&0x04,-(%sp)		# save fp2

	fmov.x		%fp0,%fp1
	fmul.x		%fp1,%fp1
	fmov.d		ATANA3(%pc),%fp2
	fadd.x		%fp1,%fp2		# A3+V
	fmul.x		%fp1,%fp2		# V*(A3+V)
	fmul.x		%fp0,%fp1		# U*V
	fadd.d		ATANA2(%pc),%fp2	# A2+V*(A3+V)
	fmul.d		ATANA1(%pc),%fp1	# A1*U*V
	fmul.x		%fp2,%fp1		# A1*U*V*(A2+V*(A3+V))
	fadd.x		%fp1,%fp0		# ATAN(U), FP1 RELEASED

	fmovm.x 	(%sp)+,&0x20		# restore fp2

	fmov.l		%d0,%fpcr		# restore users rnd mode,prec
	fadd.x		ATANF(%a6),%fp0		# ATAN(X)
	bra		t_inx2

ATANBORS:
#--|X| IS IN d0 IN COMPACT FORM. FP1, d0 SAVED.
#--FP0 IS X AND |X| <= 1/16 OR |X| >= 16.
	cmp.l		%d1,&0x3FFF8000
	bgt.w		ATANBIG			# I.E. |X| >= 16

ATANSM:
#--|X| <= 1/16
#--IF |X| < 2^(-40), RETURN X AS ANSWER. OTHERWISE, APPROXIMATE
#--ATAN(X) BY X + X*Y*(B1+Y*(B2+Y*(B3+Y*(B4+Y*(B5+Y*B6)))))
#--WHICH IS X + X*Y*( [B1+Z*(B3+Z*B5)] + [Y*(B2+Z*(B4+Z*B6)] )
#--WHERE Y = X*X, AND Z = Y*Y.

	cmp.l		%d1,&0x3FD78000
	blt.w		ATANTINY

#--COMPUTE POLYNOMIAL
	fmovm.x		&0x0c,-(%sp)		# save fp2/fp3

	fmul.x		%fp0,%fp0		# FPO IS Y = X*X

	fmov.x		%fp0,%fp1
	fmul.x		%fp1,%fp1		# FP1 IS Z = Y*Y

	fmov.d		ATANB6(%pc),%fp2
	fmov.d		ATANB5(%pc),%fp3

	fmul.x		%fp1,%fp2		# Z*B6
	fmul.x		%fp1,%fp3		# Z*B5

	fadd.d		ATANB4(%pc),%fp2	# B4+Z*B6
	fadd.d		ATANB3(%pc),%fp3	# B3+Z*B5

	fmul.x		%fp1,%fp2		# Z*(B4+Z*B6)
	fmul.x		%fp3,%fp1		# Z*(B3+Z*B5)

	fadd.d		ATANB2(%pc),%fp2	# B2+Z*(B4+Z*B6)
	fadd.d		ATANB1(%pc),%fp1	# B1+Z*(B3+Z*B5)

	fmul.x		%fp0,%fp2		# Y*(B2+Z*(B4+Z*B6))
	fmul.x		X(%a6),%fp0		# X*Y

	fadd.x		%fp2,%fp1		# [B1+Z*(B3+Z*B5)]+[Y*(B2+Z*(B4+Z*B6))]

	fmul.x		%fp1,%fp0		# X*Y*([B1+Z*(B3+Z*B5)]+[Y*(B2+Z*(B4+Z*B6))])

	fmovm.x		(%sp)+,&0x30		# restore fp2/fp3

	fmov.l		%d0,%fpcr		# restore users rnd mode,prec
	fadd.x		X(%a6),%fp0
	bra		t_inx2

ATANTINY:
#--|X| < 2^(-40), ATAN(X) = X

	fmov.l		%d0,%fpcr		# restore users rnd mode,prec
	mov.b		&FMOV_OP,%d1		# last inst is MOVE
	fmov.x		X(%a6),%fp0		# last inst - possible exception set

	bra		t_catch

ATANBIG:
#--IF |X| > 2^(100), RETURN	SIGN(X)*(PI/2 - TINY). OTHERWISE,
#--RETURN SIGN(X)*PI/2 + ATAN(-1/X).
	cmp.l		%d1,&0x40638000
	bgt.w		ATANHUGE

#--APPROXIMATE ATAN(-1/X) BY
#--X'+X'*Y*(C1+Y*(C2+Y*(C3+Y*(C4+Y*C5)))), X' = -1/X, Y = X'*X'
#--THIS CAN BE RE-WRITTEN AS
#--X'+X'*Y*( [C1+Z*(C3+Z*C5)] + [Y*(C2+Z*C4)] ), Z = Y*Y.

	fmovm.x		&0x0c,-(%sp)		# save fp2/fp3

	fmov.s		&0xBF800000,%fp1	# LOAD -1
	fdiv.x		%fp0,%fp1		# FP1 IS -1/X

#--DIVIDE IS STILL CRANKING

	fmov.x		%fp1,%fp0		# FP0 IS X'
	fmul.x		%fp0,%fp0		# FP0 IS Y = X'*X'
	fmov.x		%fp1,X(%a6)		# X IS REALLY X'

	fmov.x		%fp0,%fp1
	fmul.x		%fp1,%fp1		# FP1 IS Z = Y*Y

	fmov.d		ATANC5(%pc),%fp3
	fmov.d		ATANC4(%pc),%fp2

	fmul.x		%fp1,%fp3		# Z*C5
	fmul.x		%fp1,%fp2		# Z*B4

	fadd.d		ATANC3(%pc),%fp3	# C3+Z*C5
	fadd.d		ATANC2(%pc),%fp2	# C2+Z*C4

	fmul.x		%fp3,%fp1		# Z*(C3+Z*C5), FP3 RELEASED
	fmul.x		%fp0,%fp2		# Y*(C2+Z*C4)

	fadd.d		ATANC1(%pc),%fp1	# C1+Z*(C3+Z*C5)
	fmul.x		X(%a6),%fp0		# X'*Y

	fadd.x		%fp2,%fp1		# [Y*(C2+Z*C4)]+[C1+Z*(C3+Z*C5)]

	fmul.x		%fp1,%fp0		# X'*Y*([B1+Z*(B3+Z*B5)]
#					...	+[Y*(B2+Z*(B4+Z*B6))])
	fadd.x		X(%a6),%fp0

	fmovm.x		(%sp)+,&0x30		# restore fp2/fp3

	fmov.l		%d0,%fpcr		# restore users rnd mode,prec
	tst.b		(%a0)
	bpl.b		pos_big

neg_big:
	fadd.x		NPIBY2(%pc),%fp0
	bra		t_minx2

pos_big:
	fadd.x		PPIBY2(%pc),%fp0
	bra		t_pinx2

ATANHUGE:
#--RETURN SIGN(X)*(PIBY2 - TINY) = SIGN(X)*PIBY2 - SIGN(X)*TINY
	tst.b		(%a0)
	bpl.b		pos_huge

neg_huge:
	fmov.x		NPIBY2(%pc),%fp0
	fmov.l		%d0,%fpcr
	fadd.x		PTINY(%pc),%fp0
	bra		t_minx2

pos_huge:
	fmov.x		PPIBY2(%pc),%fp0
	fmov.l		%d0,%fpcr
	fadd.x		NTINY(%pc),%fp0
	bra		t_pinx2

	global		satand
#--ENTRY POINT FOR ATAN(X) FOR DENORMALIZED ARGUMENT
satand:
	bra		t_extdnrm

#########################################################################
# sasin():  computes the inverse sine of a normalized input		#
# sasind(): computes the inverse sine of a denormalized input		#
#									#
# INPUT ***************************************************************	#
#	a0 = pointer to extended precision input			#
#	d0 = round precision,mode					#
#									#
# OUTPUT **************************************************************	# 
#	fp0 = arcsin(X)							#
#									#
# ACCURACY and MONOTONICITY *******************************************	#
#	The returned result is within 3 ulps in	64 significant bit,	#
#	i.e. within 0.5001 ulp to 53 bits if the result is subsequently	#
#	rounded to double precision. The result is provably monotonic	#
#	in double precision.						#
#									#
# ALGORITHM ***********************************************************	#
#									#
#	ASIN								#
#	1. If |X| >= 1, go to 3.					#
#									#
#	2. (|X| < 1) Calculate asin(X) by				#
#		z := sqrt( [1-X][1+X] )					#
#		asin(X) = atan( x / z ).				#
#		Exit.							#
#									#
#	3. If |X| > 1, go to 5.						#
#									#
#	4. (|X| = 1) sgn := sign(X), return asin(X) := sgn * Pi/2. Exit.#
#									#
#	5. (|X| > 1) Generate an invalid operation by 0 * infinity.	#
#		Exit.							#
#									#
#########################################################################

	global		sasin
sasin:
	fmov.x		(%a0),%fp0		# LOAD INPUT

	mov.l		(%a0),%d1
	mov.w		4(%a0),%d1
	and.l		&0x7FFFFFFF,%d1
	cmp.l		%d1,&0x3FFF8000
	bge.b		ASINBIG

# This catch is added here for the '060 QSP. Originally, the call to
# satan() would handle this case by causing the exception which would
# not be caught until gen_except(). Now, with the exceptions being 
# detected inside of satan(), the exception would have been handled there
# instead of inside sasin() as expected.
	cmp.l		%d1,&0x3FD78000
	blt.w		ASINTINY

#--THIS IS THE USUAL CASE, |X| < 1
#--ASIN(X) = ATAN( X / SQRT( (1-X)(1+X) ) )

ASINMAIN:
	fmov.s		&0x3F800000,%fp1
	fsub.x		%fp0,%fp1		# 1-X
	fmovm.x		&0x4,-(%sp)		#  {fp2}
	fmov.s		&0x3F800000,%fp2
	fadd.x		%fp0,%fp2		# 1+X
	fmul.x		%fp2,%fp1		# (1+X)(1-X)
	fmovm.x		(%sp)+,&0x20		#  {fp2}
	fsqrt.x		%fp1			# SQRT([1-X][1+X])
	fdiv.x		%fp1,%fp0		# X/SQRT([1-X][1+X])
	fmovm.x		&0x01,-(%sp)		# save X/SQRT(...)
	lea		(%sp),%a0		# pass ptr to X/SQRT(...)
	bsr		satan
	add.l		&0xc,%sp		# clear X/SQRT(...) from stack
	bra		t_inx2

ASINBIG:
	fabs.x		%fp0			# |X|
	fcmp.s		%fp0,&0x3F800000
	fbgt		t_operr			# cause an operr exception

#--|X| = 1, ASIN(X) = +- PI/2.
ASINONE:
	fmov.x		PIBY2(%pc),%fp0
	mov.l		(%a0),%d1
	and.l		&0x80000000,%d1		# SIGN BIT OF X
	or.l		&0x3F800000,%d1		# +-1 IN SGL FORMAT
	mov.l		%d1,-(%sp)		# push SIGN(X) IN SGL-FMT
	fmov.l		%d0,%fpcr
	fmul.s		(%sp)+,%fp0
	bra		t_inx2

#--|X| < 2^(-40), ATAN(X) = X
ASINTINY:
	fmov.l		%d0,%fpcr		# restore users rnd mode,prec
	mov.b		&FMOV_OP,%d1		# last inst is MOVE
	fmov.x		(%a0),%fp0		# last inst - possible exception
	bra		t_catch

	global		sasind
#--ASIN(X) = X FOR DENORMALIZED X
sasind:
	bra		t_extdnrm

#########################################################################
# sacos():  computes the inverse cosine of a normalized input		#
# sacosd(): computes the inverse cosine of a denormalized input		#
#									#
# INPUT ***************************************************************	#
#	a0 = pointer to extended precision input			#
#	d0 = round precision,mode					#
#									#
# OUTPUT ************************************************************** #
#	fp0 = arccos(X)							#
#									#
# ACCURACY and MONOTONICITY *******************************************	#
#	The returned result is within 3 ulps in	64 significant bit,	#
#	i.e. within 0.5001 ulp to 53 bits if the result is subsequently	#
#	rounded to double precision. The result is provably monotonic	#
#	in double precision.						#
#									#
# ALGORITHM *********************************************************** #
#									#
#	ACOS								#
#	1. If |X| >= 1, go to 3.					#
#									#
#	2. (|X| < 1) Calculate acos(X) by				#
#		z := (1-X) / (1+X)					#
#		acos(X) = 2 * atan( sqrt(z) ).				#
#		Exit.							#
#									#
#	3. If |X| > 1, go to 5.						#
#									#
#	4. (|X| = 1) If X > 0, return 0. Otherwise, return Pi. Exit.	#
#									#
#	5. (|X| > 1) Generate an invalid operation by 0 * infinity.	#
#		Exit.							#
#									#
#########################################################################

	global		sacos
sacos:
	fmov.x		(%a0),%fp0		# LOAD INPUT

	mov.l		(%a0),%d1		# pack exp w/ upper 16 fraction
	mov.w		4(%a0),%d1
	and.l		&0x7FFFFFFF,%d1
	cmp.l		%d1,&0x3FFF8000
	bge.b		ACOSBIG

#--THIS IS THE USUAL CASE, |X| < 1
#--ACOS(X) = 2 * ATAN(	SQRT( (1-X)/(1+X) ) )

ACOSMAIN:
	fmov.s		&0x3F800000,%fp1
	fadd.x		%fp0,%fp1		# 1+X
	fneg.x		%fp0			# -X
	fadd.s		&0x3F800000,%fp0	# 1-X
	fdiv.x		%fp1,%fp0		# (1-X)/(1+X)
	fsqrt.x		%fp0			# SQRT((1-X)/(1+X))
	mov.l		%d0,-(%sp)		# save original users fpcr
	clr.l		%d0
	fmovm.x		&0x01,-(%sp)		# save SQRT(...) to stack
	lea		(%sp),%a0		# pass ptr to sqrt
	bsr		satan			# ATAN(SQRT([1-X]/[1+X]))
	add.l		&0xc,%sp		# clear SQRT(...) from stack

	fmov.l		(%sp)+,%fpcr		# restore users round prec,mode
	fadd.x		%fp0,%fp0		# 2 * ATAN( STUFF )
	bra		t_pinx2

ACOSBIG:
	fabs.x		%fp0
	fcmp.s		%fp0,&0x3F800000
	fbgt		t_operr			# cause an operr exception

#--|X| = 1, ACOS(X) = 0 OR PI
	tst.b		(%a0)			# is X positive or negative?
	bpl.b		ACOSP1

#--X = -1
#Returns PI and inexact exception
ACOSM1:
	fmov.x		PI(%pc),%fp0		# load PI
	fmov.l		%d0,%fpcr		# load round mode,prec
	fadd.s		&0x00800000,%fp0	# add a small value
	bra		t_pinx2

ACOSP1:
	bra		ld_pzero		# answer is positive zero

	global		sacosd
#--ACOS(X) = PI/2 FOR DENORMALIZED X
sacosd:
	fmov.l		%d0,%fpcr		# load user's rnd mode/prec
	fmov.x		PIBY2(%pc),%fp0
	bra		t_pinx2

#########################################################################
# setox():    computes the exponential for a normalized input		#
# setoxd():   computes the exponential for a denormalized input		# 
# setoxm1():  computes the exponential minus 1 for a normalized input	#
# setoxm1d(): computes the exponential minus 1 for a denormalized input	#
#									#
# INPUT	*************************************************************** #
#	a0 = pointer to extended precision input			#
#	d0 = round precision,mode					#
#									#
# OUTPUT ************************************************************** #
#	fp0 = exp(X) or exp(X)-1					#
#									#
# ACCURACY and MONOTONICITY ******************************************* #
#	The returned result is within 0.85 ulps in 64 significant bit, 	#
#	i.e. within 0.5001 ulp to 53 bits if the result is subsequently #
#	rounded to double precision. The result is provably monotonic 	#
#	in double precision.						#
#									#
# ALGORITHM and IMPLEMENTATION **************************************** #
#									#
#	setoxd								#
#	------								#
#	Step 1.	Set ans := 1.0						#
#									#
#	Step 2.	Return	ans := ans + sign(X)*2^(-126). Exit.		#
#	Notes:	This will always generate one exception -- inexact.	#
#									#
#									#
#	setox								#
#	-----								#
#									#
#	Step 1.	Filter out extreme cases of input argument.		#
#		1.1	If |X| >= 2^(-65), go to Step 1.3.		#
#		1.2	Go to Step 7.					#
#		1.3	If |X| < 16380 log(2), go to Step 2.		#
#		1.4	Go to Step 8.					#
#	Notes:	The usual case should take the branches 1.1 -> 1.3 -> 2.#
#		To avoid the use of floating-point comparisons, a	#
#		compact representation of |X| is used. This format is a	#
#		32-bit integer, the upper (more significant) 16 bits 	#
#		are the sign and biased exponent field of |X|; the 	#
#		lower 16 bits are the 16 most significant fraction	#
#		(including the explicit bit) bits of |X|. Consequently,	#
#		the comparisons in Steps 1.1 and 1.3 can be performed	#
#		by integer comparison. Note also that the constant	#
#		16380 log(2) used in Step 1.3 is also in the compact	#
#		form. Thus taking the branch to Step 2 guarantees 	#
#		|X| < 16380 log(2). There is no harm to have a small	#
#		number of cases where |X| is less than,	but close to,	#
#		16380 log(2) and the branch to Step 9 is taken.		#
#									#
#	Step 2.	Calculate N = round-to-nearest-int( X * 64/log2 ).	#
#		2.1	Set AdjFlag := 0 (indicates the branch 1.3 -> 2 #
#			was taken)					#
#		2.2	N := round-to-nearest-integer( X * 64/log2 ).	#
#		2.3	Calculate	J = N mod 64; so J = 0,1,2,..., #
#			or 63.						#
#		2.4	Calculate	M = (N - J)/64; so N = 64M + J.	#
#		2.5	Calculate the address of the stored value of 	#
#			2^(J/64).					#
#		2.6	Create the value Scale = 2^M.			#
#	Notes:	The calculation in 2.2 is really performed by		#
#			Z := X * constant				#
#			N := round-to-nearest-integer(Z)		#
#		where							#
#			constant := single-precision( 64/log 2 ).	#
#									#
#		Using a single-precision constant avoids memory 	#
#		access. Another effect of using a single-precision	#
#		"constant" is that the calculated value Z is 		#
#									#
#			Z = X*(64/log2)*(1+eps), |eps| <= 2^(-24).	#
#									#
#		This error has to be considered later in Steps 3 and 4.	#
#									#
#	Step 3.	Calculate X - N*log2/64.				#
#		3.1	R := X + N*L1, 					#
#				where L1 := single-precision(-log2/64).	#
#		3.2	R := R + N*L2, 					#
#				L2 := extended-precision(-log2/64 - L1).#
#	Notes:	a) The way L1 and L2 are chosen ensures L1+L2 		#
#		approximate the value -log2/64 to 88 bits of accuracy.	#
#		b) N*L1 is exact because N is no longer than 22 bits	#
#		and L1 is no longer than 24 bits.			#
#		c) The calculation X+N*L1 is also exact due to 		#
#		cancellation. Thus, R is practically X+N(L1+L2) to full	#
#		64 bits. 						#
#		d) It is important to estimate how large can |R| be	#
#		after Step 3.2.						#
#									#
#		N = rnd-to-int( X*64/log2 (1+eps) ), |eps|<=2^(-24)	#
#		X*64/log2 (1+eps)	=	N + f,	|f| <= 0.5	#
#		X*64/log2 - N	=	f - eps*X 64/log2		#
#		X - N*log2/64	=	f*log2/64 - eps*X		#
#									#
#									#
#		Now |X| <= 16446 log2, thus				#
#									#
#			|X - N*log2/64| <= (0.5 + 16446/2^(18))*log2/64	#
#					<= 0.57 log2/64.		#
#		 This bound will be used in Step 4.			#
#									#
#	Step 4.	Approximate exp(R)-1 by a polynomial			#
#		p = R + R*R*(A1 + R*(A2 + R*(A3 + R*(A4 + R*A5))))	#
#	Notes:	a) In order to reduce memory access, the coefficients 	#
#		are made as "short" as possible: A1 (which is 1/2), A4	#
#		and A5 are single precision; A2 and A3 are double	#
#		precision. 						#
#		b) Even with the restrictions above, 			#
#		   |p - (exp(R)-1)| < 2^(-68.8) for all |R| <= 0.0062.	#
#		Note that 0.0062 is slightly bigger than 0.57 log2/64.	#
#		c) To fully utilize the pipeline, p is separated into	#
#		two independent pieces of roughly equal complexities	#
#			p = [ R + R*S*(A2 + S*A4) ]	+		#
#				[ S*(A1 + S*(A3 + S*A5)) ]		#
#		where S = R*R.						#
#									#
#	Step 5.	Compute 2^(J/64)*exp(R) = 2^(J/64)*(1+p) by		#
#				ans := T + ( T*p + t)			#
#		where T and t are the stored values for 2^(J/64).	#
#	Notes:	2^(J/64) is stored as T and t where T+t approximates	#
#		2^(J/64) to roughly 85 bits; T is in extended precision	#
#		and t is in single precision. Note also that T is 	#
#		rounded to 62 bits so that the last two bits of T are 	#
#		zero. The reason for such a special form is that T-1, 	#
#		T-2, and T-8 will all be exact --- a property that will	#
#		give much more accurate computation of the function 	#
#		EXPM1.							#
#									#
#	Step 6.	Reconstruction of exp(X)				#
#			exp(X) = 2^M * 2^(J/64) * exp(R).		#
#		6.1	If AdjFlag = 0, go to 6.3			#
#		6.2	ans := ans * AdjScale				#
#		6.3	Restore the user FPCR				#
#		6.4	Return ans := ans * Scale. Exit.		#
#	Notes:	If AdjFlag = 0, we have X = Mlog2 + Jlog2/64 + R,	#
#		|M| <= 16380, and Scale = 2^M. Moreover, exp(X) will	#
#		neither overflow nor underflow. If AdjFlag = 1, that	#
#		means that						#
#			X = (M1+M)log2 + Jlog2/64 + R, |M1+M| >= 16380.	#
#		Hence, exp(X) may overflow or underflow or neither.	#
#		When that is the case, AdjScale = 2^(M1) where M1 is	#
#		approximately M. Thus 6.2 will never cause 		#
#		over/underflow. Possible exception in 6.4 is overflow	#
#		or underflow. The inexact exception is not generated in	#
#		6.4. Although one can argue that the inexact flag	#
#		should always be raised, to simulate that exception 	#
#		cost to much than the flag is worth in practical uses.	#
#									#
#	Step 7.	Return 1 + X.						#
#		7.1	ans := X					#
#		7.2	Restore user FPCR.				#
#		7.3	Return ans := 1 + ans. Exit			#
#	Notes:	For non-zero X, the inexact exception will always be	#
#		raised by 7.3. That is the only exception raised by 7.3.#
#		Note also that we use the FMOVEM instruction to move X	#
#		in Step 7.1 to avoid unnecessary trapping. (Although	#
#		the FMOVEM may not seem relevant since X is normalized,	#
#		the precaution will be useful in the library version of	#
#		this code where the separate entry for denormalized 	#
#		inputs will be done away with.)				#
#									#
#	Step 8.	Handle exp(X) where |X| >= 16380log2.			#
#		8.1	If |X| > 16480 log2, go to Step 9.		#
#		(mimic 2.2 - 2.6)					#
#		8.2	N := round-to-integer( X * 64/log2 )		#
#		8.3	Calculate J = N mod 64, J = 0,1,...,63		#
#		8.4	K := (N-J)/64, M1 := truncate(K/2), M = K-M1, 	#
#			AdjFlag := 1.					#
#		8.5	Calculate the address of the stored value 	#
#			2^(J/64).					#
#		8.6	Create the values Scale = 2^M, AdjScale = 2^M1.	#
#		8.7	Go to Step 3.					#
#	Notes:	Refer to notes for 2.2 - 2.6.				#
#									#
#	Step 9.	Handle exp(X), |X| > 16480 log2.			#
#		9.1	If X < 0, go to 9.3				#
#		9.2	ans := Huge, go to 9.4				#
#		9.3	ans := Tiny.					#
#		9.4	Restore user FPCR.				#
#		9.5	Return ans := ans * ans. Exit.			#
#	Notes:	Exp(X) will surely overflow or underflow, depending on	#
#		X's sign. "Huge" and "Tiny" are respectively large/tiny	#
#		extended-precision numbers whose square over/underflow	#
#		with an inexact result. Thus, 9.5 always raises the	#
#		inexact together with either overflow or underflow.	#
#									#
#	setoxm1d							#
#	--------							#
#									#
#	Step 1.	Set ans := 0						#
#									#
#	Step 2.	Return	ans := X + ans. Exit.				#
#	Notes:	This will return X with the appropriate rounding	#
#		 precision prescribed by the user FPCR.			#
#									#
#	setoxm1								#
#	-------								#
#									#
#	Step 1.	Check |X|						#
#		1.1	If |X| >= 1/4, go to Step 1.3.			#
#		1.2	Go to Step 7.					#
#		1.3	If |X| < 70 log(2), go to Step 2.		#
#		1.4	Go to Step 10.					#
#	Notes:	The usual case should take the branches 1.1 -> 1.3 -> 2.#
#		However, it is conceivable |X| can be small very often	#
#		because EXPM1 is intended to evaluate exp(X)-1 		#
#		accurately when |X| is small. For further details on 	#
#		the comparisons, see the notes on Step 1 of setox.	#
#									#
#	Step 2.	Calculate N = round-to-nearest-int( X * 64/log2 ).	#
#		2.1	N := round-to-nearest-integer( X * 64/log2 ).	#
#		2.2	Calculate	J = N mod 64; so J = 0,1,2,..., #
#			or 63.						#
#		2.3	Calculate	M = (N - J)/64; so N = 64M + J.	#
#		2.4	Calculate the address of the stored value of 	#
#			2^(J/64).					#
#		2.5	Create the values Sc = 2^M and 			#
#			OnebySc := -2^(-M).				#
#	Notes:	See the notes on Step 2 of setox.			#
#									#
#	Step 3.	Calculate X - N*log2/64.				#
#		3.1	R := X + N*L1, 					#
#				where L1 := single-precision(-log2/64).	#
#		3.2	R := R + N*L2, 					#
#				L2 := extended-precision(-log2/64 - L1).#
#	Notes:	Applying the analysis of Step 3 of setox in this case	#
#		shows that |R| <= 0.0055 (note that |X| <= 70 log2 in	#
#		this case).						#
#									#
#	Step 4.	Approximate exp(R)-1 by a polynomial			#
#			p = R+R*R*(A1+R*(A2+R*(A3+R*(A4+R*(A5+R*A6)))))	#
#	Notes:	a) In order to reduce memory access, the coefficients 	#
#		are made as "short" as possible: A1 (which is 1/2), A5 	#
#		and A6 are single precision; A2, A3 and A4 are double 	#
#		precision. 						#
#		b) Even with the restriction above,			#
#			|p - (exp(R)-1)| <	|R| * 2^(-72.7)		#
#		for all |R| <= 0.0055.					#
#		c) To fully utilize the pipeline, p is separated into	#
#		two independent pieces of roughly equal complexity	#
#			p = [ R*S*(A2 + S*(A4 + S*A6)) ]	+	#
#				[ R + S*(A1 + S*(A3 + S*A5)) ]		#
#		where S = R*R.						#
#									#
#	Step 5.	Compute 2^(J/64)*p by					#
#				p := T*p				#
#		where T and t are the stored values for 2^(J/64).	#
#	Notes:	2^(J/64) is stored as T and t where T+t approximates	#
#		2^(J/64) to roughly 85 bits; T is in extended precision	#
#		and t is in single precision. Note also that T is 	#
#		rounded to 62 bits so that the last two bits of T are 	#
#		zero. The reason for such a special form is that T-1, 	#
#		T-2, and T-8 will all be exact --- a property that will	#
#		be exploited in Step 6 below. The total relative error	#
#		in p is no bigger than 2^(-67.7) compared to the final	#
#		result.							#
#									#
#	Step 6.	Reconstruction of exp(X)-1				#
#			exp(X)-1 = 2^M * ( 2^(J/64) + p - 2^(-M) ).	#
#		6.1	If M <= 63, go to Step 6.3.			#
#		6.2	ans := T + (p + (t + OnebySc)). Go to 6.6	#
#		6.3	If M >= -3, go to 6.5.				#
#		6.4	ans := (T + (p + t)) + OnebySc. Go to 6.6	#
#		6.5	ans := (T + OnebySc) + (p + t).			#
#		6.6	Restore user FPCR.				#
#		6.7	Return ans := Sc * ans. Exit.			#
#	Notes:	The various arrangements of the expressions give 	#
#		accurate evaluations.					#
#									#
#	Step 7.	exp(X)-1 for |X| < 1/4.					#
#		7.1	If |X| >= 2^(-65), go to Step 9.		#
#		7.2	Go to Step 8.					#
#									#
#	Step 8.	Calculate exp(X)-1, |X| < 2^(-65).			#
#		8.1	If |X| < 2^(-16312), goto 8.3			#
#		8.2	Restore FPCR; return ans := X - 2^(-16382).	#
#			Exit.						#
#		8.3	X := X * 2^(140).				#
#		8.4	Restore FPCR; ans := ans - 2^(-16382).		#
#		 Return ans := ans*2^(140). Exit			#
#	Notes:	The idea is to return "X - tiny" under the user		#
#		precision and rounding modes. To avoid unnecessary	#
#		inefficiency, we stay away from denormalized numbers 	#
#		the best we can. For |X| >= 2^(-16312), the 		#
#		straightforward 8.2 generates the inexact exception as	#
#		the case warrants.					#
#									#
#	Step 9.	Calculate exp(X)-1, |X| < 1/4, by a polynomial		#
#			p = X + X*X*(B1 + X*(B2 + ... + X*B12))		#
#	Notes:	a) In order to reduce memory access, the coefficients	#
#		are made as "short" as possible: B1 (which is 1/2), B9	#
#		to B12 are single precision; B3 to B8 are double 	#
#		precision; and B2 is double extended.			#
#		b) Even with the restriction above,			#
#			|p - (exp(X)-1)| < |X| 2^(-70.6)		#
#		for all |X| <= 0.251.					#
#		Note that 0.251 is slightly bigger than 1/4.		#
#		c) To fully preserve accuracy, the polynomial is 	#
#		computed as						#
#			X + ( S*B1 +	Q ) where S = X*X and		#
#			Q	=	X*S*(B2 + X*(B3 + ... + X*B12))	#
#		d) To fully utilize the pipeline, Q is separated into	#
#		two independent pieces of roughly equal complexity	#
#			Q = [ X*S*(B2 + S*(B4 + ... + S*B12)) ] +	#
#				[ S*S*(B3 + S*(B5 + ... + S*B11)) ]	#
#									#
#	Step 10. Calculate exp(X)-1 for |X| >= 70 log 2.		#
#		10.1 If X >= 70log2 , exp(X) - 1 = exp(X) for all 	#
#		practical purposes. Therefore, go to Step 1 of setox.	#
#		10.2 If X <= -70log2, exp(X) - 1 = -1 for all practical	#
#		purposes. 						#
#		ans := -1 						#
#		Restore user FPCR					#
#		Return ans := ans + 2^(-126). Exit.			#
#	Notes:	10.2 will always create an inexact and return -1 + tiny	#
#		in the user rounding precision and mode.		#
#									#
#########################################################################

L2:	long		0x3FDC0000,0x82E30865,0x4361C4C6,0x00000000

EEXPA3:	long		0x3FA55555,0x55554CC1
EEXPA2:	long		0x3FC55555,0x55554A54

EM1A4:	long		0x3F811111,0x11174385
EM1A3:	long		0x3FA55555,0x55554F5A

EM1A2:	long		0x3FC55555,0x55555555,0x00000000,0x00000000

EM1B8:	long		0x3EC71DE3,0xA5774682
EM1B7:	long		0x3EFA01A0,0x19D7CB68

EM1B6:	long		0x3F2A01A0,0x1A019DF3
EM1B5:	long		0x3F56C16C,0x16C170E2

EM1B4:	long		0x3F811111,0x11111111
EM1B3:	long		0x3FA55555,0x55555555

EM1B2:	long		0x3FFC0000,0xAAAAAAAA,0xAAAAAAAB
	long		0x00000000

TWO140:	long		0x48B00000,0x00000000
TWON140:
	long		0x37300000,0x00000000

EEXPTBL:
	long		0x3FFF0000,0x80000000,0x00000000,0x00000000
	long		0x3FFF0000,0x8164D1F3,0xBC030774,0x9F841A9B
	long		0x3FFF0000,0x82CD8698,0xAC2BA1D8,0x9FC1D5B9
	long		0x3FFF0000,0x843A28C3,0xACDE4048,0xA0728369
	long		0x3FFF0000,0x85AAC367,0xCC487B14,0x1FC5C95C
	long		0x3FFF0000,0x871F6196,0x9E8D1010,0x1EE85C9F
	long		0x3FFF0000,0x88980E80,0x92DA8528,0x9FA20729
	long		0x3FFF0000,0x8A14D575,0x496EFD9C,0xA07BF9AF
	long		0x3FFF0000,0x8B95C1E3,0xEA8BD6E8,0xA0020DCF
	long		0x3FFF0000,0x8D1ADF5B,0x7E5BA9E4,0x205A63DA
	long		0x3FFF0000,0x8EA4398B,0x45CD53C0,0x1EB70051
	long		0x3FFF0000,0x9031DC43,0x1466B1DC,0x1F6EB029
	long		0x3FFF0000,0x91C3D373,0xAB11C338,0xA0781494
	long		0x3FFF0000,0x935A2B2F,0x13E6E92C,0x9EB319B0
	long		0x3FFF0000,0x94F4EFA8,0xFEF70960,0x2017457D
	long		0x3FFF0000,0x96942D37,0x20185A00,0x1F11D537
	long		0x3FFF0000,0x9837F051,0x8DB8A970,0x9FB952DD
	long		0x3FFF0000,0x99E04593,0x20B7FA64,0x1FE43087
	long		0x3FFF0000,0x9B8D39B9,0xD54E5538,0x1FA2A818
	long		0x3FFF0000,0x9D3ED9A7,0x2CFFB750,0x1FDE494D
	long		0x3FFF0000,0x9EF53260,0x91A111AC,0x20504890
	long		0x3FFF0000,0xA0B0510F,0xB9714FC4,0xA073691C
	long		0x3FFF0000,0xA2704303,0x0C496818,0x1F9B7A05
	long		0x3FFF0000,0xA43515AE,0x09E680A0,0xA0797126
	long		0x3FFF0000,0xA5FED6A9,0xB15138EC,0xA071A140
	long		0x3FFF0000,0xA7CD93B4,0xE9653568,0x204F62DA
	long		0x3FFF0000,0xA9A15AB4,0xEA7C0EF8,0x1F283C4A
	long		0x3FFF0000,0xAB7A39B5,0xA93ED338,0x9F9A7FDC
	long		0x3FFF0000,0xAD583EEA,0x42A14AC8,0xA05B3FAC
	long		0x3FFF0000,0xAF3B78AD,0x690A4374,0x1FDF2610
	long		0x3FFF0000,0xB123F581,0xD2AC2590,0x9F705F90
	long		0x3FFF0000,0xB311C412,0xA9112488,0x201F678A
	long		0x3FFF0000,0xB504F333,0xF9DE6484,0x1F32FB13
	long		0x3FFF0000,0xB6FD91E3,0x28D17790,0x20038B30
	long		0x3FFF0000,0xB8FBAF47,0x62FB9EE8,0x200DC3CC
	long		0x3FFF0000,0xBAFF5AB2,0x133E45FC,0x9F8B2AE6
	long		0x3FFF0000,0xBD08A39F,0x580C36C0,0xA02BBF70
	long		0x3FFF0000,0xBF1799B6,0x7A731084,0xA00BF518
	long		0x3FFF0000,0xC12C4CCA,0x66709458,0xA041DD41
	long		0x3FFF0000,0xC346CCDA,0x24976408,0x9FDF137B
	long		0x3FFF0000,0xC5672A11,0x5506DADC,0x201F1568
	long		0x3FFF0000,0xC78D74C8,0xABB9B15C,0x1FC13A2E
	long		0x3FFF0000,0xC9B9BD86,0x6E2F27A4,0xA03F8F03
	long		0x3FFF0000,0xCBEC14FE,0xF2727C5C,0x1FF4907D
	long		0x3FFF0000,0xCE248C15,0x1F8480E4,0x9E6E53E4
	long		0x3FFF0000,0xD06333DA,0xEF2B2594,0x1FD6D45C
	long		0x3FFF0000,0xD2A81D91,0xF12AE45C,0xA076EDB9
	long		0x3FFF0000,0xD4F35AAB,0xCFEDFA20,0x9FA6DE21
	long		0x3FFF0000,0xD744FCCA,0xD69D6AF4,0x1EE69A2F
	long		0x3FFF0000,0xD99D15C2,0x78AFD7B4,0x207F439F
	long		0x3FFF0000,0xDBFBB797,0xDAF23754,0x201EC207
	long		0x3FFF0000,0xDE60F482,0x5E0E9124,0x9E8BE175
	long		0x3FFF0000,0xE0CCDEEC,0x2A94E110,0x20032C4B
	long		0x3FFF0000,0xE33F8972,0xBE8A5A50,0x2004DFF5
	long		0x3FFF0000,0xE5B906E7,0x7C8348A8,0x1E72F47A
	long		0x3FFF0000,0xE8396A50,0x3C4BDC68,0x1F722F22
	long		0x3FFF0000,0xEAC0C6E7,0xDD243930,0xA017E945
	long		0x3FFF0000,0xED4F301E,0xD9942B84,0x1F401A5B
	long		0x3FFF0000,0xEFE4B99B,0xDCDAF5CC,0x9FB9A9E3
	long		0x3FFF0000,0xF281773C,0x59FFB138,0x20744C05
	long		0x3FFF0000,0xF5257D15,0x2486CC2C,0x1F773A19
	long		0x3FFF0000,0xF7D0DF73,0x0AD13BB8,0x1FFE90D5
	long		0x3FFF0000,0xFA83B2DB,0x722A033C,0xA041ED22
	long		0x3FFF0000,0xFD3E0C0C,0xF486C174,0x1F853F3A

	set		ADJFLAG,L_SCR2
	set		SCALE,FP_SCR0
	set		ADJSCALE,FP_SCR1
	set		SC,FP_SCR0
	set		ONEBYSC,FP_SCR1

	global		setox
setox:
#--entry point for EXP(X), here X is finite, non-zero, and not NaN's

#--Step 1.
	mov.l		(%a0),%d1		# load part of input X
	and.l		&0x7FFF0000,%d1		# biased expo. of X
	cmp.l		%d1,&0x3FBE0000		# 2^(-65)
	bge.b		EXPC1			# normal case
	bra		EXPSM

EXPC1:
#--The case |X| >= 2^(-65)
	mov.w		4(%a0),%d1		# expo. and partial sig. of |X|
	cmp.l		%d1,&0x400CB167		# 16380 log2 trunc. 16 bits
	blt.b		EXPMAIN			# normal case
	bra		EEXPBIG

EXPMAIN:
#--Step 2.
#--This is the normal branch:	2^(-65) <= |X| < 16380 log2.
	fmov.x		(%a0),%fp0		# load input from (a0)

	fmov.x		%fp0,%fp1
	fmul.s		&0x42B8AA3B,%fp0	# 64/log2 * X
	fmovm.x		&0xc,-(%sp)		# save fp2 {%fp2/%fp3}
	mov.l		&0,ADJFLAG(%a6)
	fmov.l		%fp0,%d1		# N = int( X * 64/log2 )
	lea		EEXPTBL(%pc),%a1
	fmov.l		%d1,%fp0		# convert to floating-format

	mov.l		%d1,L_SCR1(%a6)		# save N temporarily
	and.l		&0x3F,%d1		# D0 is J = N mod 64
	lsl.l		&4,%d1
	add.l		%d1,%a1			# address of 2^(J/64)
	mov.l		L_SCR1(%a6),%d1
	asr.l		&6,%d1			# D0 is M
	add.w		&0x3FFF,%d1		# biased expo. of 2^(M)
	mov.w		L2(%pc),L_SCR1(%a6)	# prefetch L2, no need in CB

EXPCONT1:
#--Step 3.
#--fp1,fp2 saved on the stack. fp0 is N, fp1 is X,
#--a0 points to 2^(J/64), D0 is biased expo. of 2^(M)
	fmov.x		%fp0,%fp2
	fmul.s		&0xBC317218,%fp0	# N * L1, L1 = lead(-log2/64)
	fmul.x		L2(%pc),%fp2		# N * L2, L1+L2 = -log2/64
	fadd.x		%fp1,%fp0		# X + N*L1
	fadd.x		%fp2,%fp0		# fp0 is R, reduced arg.

#--Step 4.
#--WE NOW COMPUTE EXP(R)-1 BY A POLYNOMIAL
#-- R + R*R*(A1 + R*(A2 + R*(A3 + R*(A4 + R*A5))))
#--TO FULLY UTILIZE THE PIPELINE, WE COMPUTE S = R*R
#--[R+R*S*(A2+S*A4)] + [S*(A1+S*(A3+S*A5))]

	fmov.x		%fp0,%fp1
	fmul.x		%fp1,%fp1		# fp1 IS S = R*R

	fmov.s		&0x3AB60B70,%fp2	# fp2 IS A5

	fmul.x		%fp1,%fp2		# fp2 IS S*A5
	fmov.x		%fp1,%fp3
	fmul.s		&0x3C088895,%fp3	# fp3 IS S*A4

	fadd.d		EEXPA3(%pc),%fp2	# fp2 IS A3+S*A5
	fadd.d		EEXPA2(%pc),%fp3	# fp3 IS A2+S*A4

	fmul.x		%fp1,%fp2		# fp2 IS S*(A3+S*A5)
	mov.w		%d1,SCALE(%a6)		# SCALE is 2^(M) in extended
	mov.l		&0x80000000,SCALE+4(%a6)
	clr.l		SCALE+8(%a6)

	fmul.x		%fp1,%fp3		# fp3 IS S*(A2+S*A4)

	fadd.s		&0x3F000000,%fp2	# fp2 IS A1+S*(A3+S*A5)
	fmul.x		%fp0,%fp3		# fp3 IS R*S*(A2+S*A4)

	fmul.x		%fp1,%fp2		# fp2 IS S*(A1+S*(A3+S*A5))
	fadd.x		%fp3,%fp0		# fp0 IS R+R*S*(A2+S*A4),

	fmov.x		(%a1)+,%fp1		# fp1 is lead. pt. of 2^(J/64)
	fadd.x		%fp2,%fp0		# fp0 is EXP(R) - 1

#--Step 5
#--final reconstruction process
#--EXP(X) = 2^M * ( 2^(J/64) + 2^(J/64)*(EXP(R)-1) )

	fmul.x		%fp1,%fp0		# 2^(J/64)*(Exp(R)-1)
	fmovm.x		(%sp)+,&0x30		# fp2 restored {%fp2/%fp3}
	fadd.s		(%a1),%fp0		# accurate 2^(J/64)

	fadd.x		%fp1,%fp0		# 2^(J/64) + 2^(J/64)*...
	mov.l		ADJFLAG(%a6),%d1

#--Step 6
	tst.l		%d1
	beq.b		NORMAL
ADJUST:
	fmul.x		ADJSCALE(%a6),%fp0
NORMAL:
	fmov.l		%d0,%fpcr		# restore user FPCR
	mov.b		&FMUL_OP,%d1		# last inst is MUL
	fmul.x		SCALE(%a6),%fp0		# multiply 2^(M)
	bra		t_catch

EXPSM:
#--Step 7
	fmovm.x		(%a0),&0x80		# load X
	fmov.l		%d0,%fpcr
	fadd.s		&0x3F800000,%fp0	# 1+X in user mode
	bra		t_pinx2

EEXPBIG:
#--Step 8
	cmp.l		%d1,&0x400CB27C		# 16480 log2
	bgt.b		EXP2BIG
#--Steps 8.2 -- 8.6
	fmov.x		(%a0),%fp0		# load input from (a0)

	fmov.x		%fp0,%fp1
	fmul.s		&0x42B8AA3B,%fp0	# 64/log2 * X
	fmovm.x		&0xc,-(%sp)		# save fp2 {%fp2/%fp3}
	mov.l		&1,ADJFLAG(%a6)
	fmov.l		%fp0,%d1		# N = int( X * 64/log2 )
	lea		EEXPTBL(%pc),%a1
	fmov.l		%d1,%fp0		# convert to floating-format
	mov.l		%d1,L_SCR1(%a6)		# save N temporarily
	and.l		&0x3F,%d1		# D0 is J = N mod 64
	lsl.l		&4,%d1
	add.l		%d1,%a1			# address of 2^(J/64)
	mov.l		L_SCR1(%a6),%d1
	asr.l		&6,%d1			# D0 is K
	mov.l		%d1,L_SCR1(%a6)		# save K temporarily
	asr.l		&1,%d1			# D0 is M1
	sub.l		%d1,L_SCR1(%a6)		# a1 is M
	add.w		&0x3FFF,%d1		# biased expo. of 2^(M1)
	mov.w		%d1,ADJSCALE(%a6)	# ADJSCALE := 2^(M1)
	mov.l		&0x80000000,ADJSCALE+4(%a6)
	clr.l		ADJSCALE+8(%a6)
	mov.l		L_SCR1(%a6),%d1		# D0 is M
	add.w		&0x3FFF,%d1		# biased expo. of 2^(M)
	bra.w		EXPCONT1		# go back to Step 3

EXP2BIG:
#--Step 9
	tst.b		(%a0)			# is X positive or negative?
	bmi		t_unfl2
	bra		t_ovfl2

	global		setoxd
setoxd:
#--entry point for EXP(X), X is denormalized
	mov.l		(%a0),-(%sp)
	andi.l		&0x80000000,(%sp)
	ori.l		&0x00800000,(%sp)	# sign(X)*2^(-126)

	fmov.s		&0x3F800000,%fp0

	fmov.l		%d0,%fpcr
	fadd.s		(%sp)+,%fp0
	bra		t_pinx2

	global		setoxm1
setoxm1:
#--entry point for EXPM1(X), here X is finite, non-zero, non-NaN

#--Step 1.
#--Step 1.1
	mov.l		(%a0),%d1		# load part of input X
	and.l		&0x7FFF0000,%d1		# biased expo. of X
	cmp.l		%d1,&0x3FFD0000		# 1/4
	bge.b		EM1CON1			# |X| >= 1/4
	bra		EM1SM

EM1CON1:
#--Step 1.3
#--The case |X| >= 1/4
	mov.w		4(%a0),%d1		# expo. and partial sig. of |X|
	cmp.l		%d1,&0x4004C215		# 70log2 rounded up to 16 bits
	ble.b		EM1MAIN			# 1/4 <= |X| <= 70log2
	bra		EM1BIG

EM1MAIN:
#--Step 2.
#--This is the case:	1/4 <= |X| <= 70 log2.
	fmov.x		(%a0),%fp0		# load input from (a0)

	fmov.x		%fp0,%fp1
	fmul.s		&0x42B8AA3B,%fp0	# 64/log2 * X
	fmovm.x		&0xc,-(%sp)		# save fp2 {%fp2/%fp3}
	fmov.l		%fp0,%d1		# N = int( X * 64/log2 )
	lea		EEXPTBL(%pc),%a1
	fmov.l		%d1,%fp0		# convert to floating-format

	mov.l		%d1,L_SCR1(%a6)		# save N temporarily
	and.l		&0x3F,%d1		# D0 is J = N mod 64
	lsl.l		&4,%d1
	add.l		%d1,%a1			# address of 2^(J/64)
	mov.l		L_SCR1(%a6),%d1
	asr.l		&6,%d1			# D0 is M
	mov.l		%d1,L_SCR1(%a6)		# save a copy of M

#--Step 3.
#--fp1,fp2 saved on the stack. fp0 is N, fp1 is X,
#--a0 points to 2^(J/64), D0 and a1 both contain M
	fmov.x		%fp0,%fp2
	fmul.s		&0xBC317218,%fp0	# N * L1, L1 = lead(-log2/64)
	fmul.x		L2(%pc),%fp2		# N * L2, L1+L2 = -log2/64
	fadd.x		%fp1,%fp0		# X + N*L1
	fadd.x		%fp2,%fp0		# fp0 is R, reduced arg.
	add.w		&0x3FFF,%d1		# D0 is biased expo. of 2^M

#--Step 4.
#--WE NOW COMPUTE EXP(R)-1 BY A POLYNOMIAL
#-- R + R*R*(A1 + R*(A2 + R*(A3 + R*(A4 + R*(A5 + R*A6)))))
#--TO FULLY UTILIZE THE PIPELINE, WE COMPUTE S = R*R
#--[R*S*(A2+S*(A4+S*A6))] + [R+S*(A1+S*(A3+S*A5))]

	fmov.x		%fp0,%fp1
	fmul.x		%fp1,%fp1		# fp1 IS S = R*R

	fmov.s		&0x3950097B,%fp2	# fp2 IS a6

	fmul.x		%fp1,%fp2		# fp2 IS S*A6
	fmov.x		%fp1,%fp3
	fmul.s		&0x3AB60B6A,%fp3	# fp3 IS S*A5

	fadd.d		EM1A4(%pc),%fp2		# fp2 IS A4+S*A6
	fadd.d		EM1A3(%pc),%fp3		# fp3 IS A3+S*A5
	mov.w		%d1,SC(%a6)		# SC is 2^(M) in extended
	mov.l		&0x80000000,SC+4(%a6)
	clr.l		SC+8(%a6)

	fmul.x		%fp1,%fp2		# fp2 IS S*(A4+S*A6)
	mov.l		L_SCR1(%a6),%d1		# D0 is	M
	neg.w		%d1			# D0 is -M
	fmul.x		%fp1,%fp3		# fp3 IS S*(A3+S*A5)
	add.w		&0x3FFF,%d1		# biased expo. of 2^(-M)
	fadd.d		EM1A2(%pc),%fp2		# fp2 IS A2+S*(A4+S*A6)
	fadd.s		&0x3F000000,%fp3	# fp3 IS A1+S*(A3+S*A5)

	fmul.x		%fp1,%fp2		# fp2 IS S*(A2+S*(A4+S*A6))
	or.w		&0x8000,%d1		# signed/expo. of -2^(-M)
	mov.w		%d1,ONEBYSC(%a6)	# OnebySc is -2^(-M)
	mov.l		&0x80000000,ONEBYSC+4(%a6)
	clr.l		ONEBYSC+8(%a6)
	fmul.x		%fp3,%fp1		# fp1 IS S*(A1+S*(A3+S*A5))

	fmul.x		%fp0,%fp2		# fp2 IS R*S*(A2+S*(A4+S*A6))
	fadd.x		%fp1,%fp0		# fp0 IS R+S*(A1+S*(A3+S*A5))

	fadd.x		%fp2,%fp0		# fp0 IS EXP(R)-1

	fmovm.x		(%sp)+,&0x30		# fp2 restored {%fp2/%fp3}

#--Step 5
#--Compute 2^(J/64)*p

	fmul.x		(%a1),%fp0		# 2^(J/64)*(Exp(R)-1)

#--Step 6
#--Step 6.1
	mov.l		L_SCR1(%a6),%d1		# retrieve M
	cmp.l		%d1,&63
	ble.b		MLE63
#--Step 6.2	M >= 64
	fmov.s		12(%a1),%fp1		# fp1 is t
	fadd.x		ONEBYSC(%a6),%fp1	# fp1 is t+OnebySc
	fadd.x		%fp1,%fp0		# p+(t+OnebySc), fp1 released
	fadd.x		(%a1),%fp0		# T+(p+(t+OnebySc))
	bra		EM1SCALE
MLE63:
#--Step 6.3	M <= 63
	cmp.l		%d1,&-3
	bge.b		MGEN3
MLTN3:
#--Step 6.4	M <= -4
	fadd.s		12(%a1),%fp0		# p+t
	fadd.x		(%a1),%fp0		# T+(p+t)
	fadd.x		ONEBYSC(%a6),%fp0	# OnebySc + (T+(p+t))
	bra		EM1SCALE
MGEN3:
#--Step 6.5	-3 <= M <= 63
	fmov.x		(%a1)+,%fp1		# fp1 is T
	fadd.s		(%a1),%fp0		# fp0 is p+t
	fadd.x		ONEBYSC(%a6),%fp1	# fp1 is T+OnebySc
	fadd.x		%fp1,%fp0		# (T+OnebySc)+(p+t)

EM1SCALE:
#--Step 6.6
	fmov.l		%d0,%fpcr
	fmul.x		SC(%a6),%fp0
	bra		t_inx2

EM1SM:
#--Step 7	|X| < 1/4.
	cmp.l		%d1,&0x3FBE0000		# 2^(-65)
	bge.b		EM1POLY

EM1TINY:
#--Step 8	|X| < 2^(-65)
	cmp.l		%d1,&0x00330000		# 2^(-16312)
	blt.b		EM12TINY
#--Step 8.2
	mov.l		&0x80010000,SC(%a6)	# SC is -2^(-16382)
	mov.l		&0x80000000,SC+4(%a6)
	clr.l		SC+8(%a6)
	fmov.x		(%a0),%fp0
	fmov.l		%d0,%fpcr
	mov.b		&FADD_OP,%d1		# last inst is ADD
	fadd.x		SC(%a6),%fp0
	bra		t_catch

EM12TINY:
#--Step 8.3
	fmov.x		(%a0),%fp0
	fmul.d		TWO140(%pc),%fp0
	mov.l		&0x80010000,SC(%a6)
	mov.l		&0x80000000,SC+4(%a6)
	clr.l		SC+8(%a6)
	fadd.x		SC(%a6),%fp0
	fmov.l		%d0,%fpcr
	mov.b		&FMUL_OP,%d1		# last inst is MUL
	fmul.d		TWON140(%pc),%fp0
	bra		t_catch

EM1POLY:
#--Step 9	exp(X)-1 by a simple polynomial
	fmov.x		(%a0),%fp0		# fp0 is X
	fmul.x		%fp0,%fp0		# fp0 is S := X*X
	fmovm.x		&0xc,-(%sp)		# save fp2 {%fp2/%fp3}
	fmov.s		&0x2F30CAA8,%fp1	# fp1 is B12
	fmul.x		%fp0,%fp1		# fp1 is S*B12
	fmov.s		&0x310F8290,%fp2	# fp2 is B11
	fadd.s		&0x32D73220,%fp1	# fp1 is B10+S*B12

	fmul.x		%fp0,%fp2		# fp2 is S*B11
	fmul.x		%fp0,%fp1		# fp1 is S*(B10 + ...

	fadd.s		&0x3493F281,%fp2	# fp2 is B9+S*...
	fadd.d		EM1B8(%pc),%fp1		# fp1 is B8+S*...

	fmul.x		%fp0,%fp2		# fp2 is S*(B9+...
	fmul.x		%fp0,%fp1		# fp1 is S*(B8+...

	fadd.d		EM1B7(%pc),%fp2		# fp2 is B7+S*...
	fadd.d		EM1B6(%pc),%fp1		# fp1 is B6+S*...

	fmul.x		%fp0,%fp2		# fp2 is S*(B7+...
	fmul.x		%fp0,%fp1		# fp1 is S*(B6+...

	fadd.d		EM1B5(%pc),%fp2		# fp2 is B5+S*...
	fadd.d		EM1B4(%pc),%fp1		# fp1 is B4+S*...

	fmul.x		%fp0,%fp2		# fp2 is S*(B5+...
	fmul.x		%fp0,%fp1		# fp1 is S*(B4+...

	fadd.d		EM1B3(%pc),%fp2		# fp2 is B3+S*...
	fadd.x		EM1B2(%pc),%fp1		# fp1 is B2+S*...

	fmul.x		%fp0,%fp2		# fp2 is S*(B3+...
	fmul.x		%fp0,%fp1		# fp1 is S*(B2+...

	fmul.x		%fp0,%fp2		# fp2 is S*S*(B3+...)
	fmul.x		(%a0),%fp1		# fp1 is X*S*(B2...

	fmul.s		&0x3F000000,%fp0	# fp0 is S*B1
	fadd.x		%fp2,%fp1		# fp1 is Q

	fmovm.x		(%sp)+,&0x30		# fp2 restored {%fp2/%fp3}

	fadd.x		%fp1,%fp0		# fp0 is S*B1+Q

	fmov.l		%d0,%fpcr
	fadd.x		(%a0),%fp0
	bra		t_inx2

EM1BIG:
#--Step 10	|X| > 70 log2
	mov.l		(%a0),%d1
	cmp.l		%d1,&0
	bgt.w		EXPC1
#--Step 10.2
	fmov.s		&0xBF800000,%fp0	# fp0 is -1
	fmov.l		%d0,%fpcr
	fadd.s		&0x00800000,%fp0	# -1 + 2^(-126)
	bra		t_minx2

	global		setoxm1d
setoxm1d:
#--entry point for EXPM1(X), here X is denormalized
#--Step 0.
	bra		t_extdnrm

#########################################################################
# sgetexp():  returns the exponent portion of the input argument.	#
#	      The exponent bias is removed and the exponent value is	#
#	      returned as an extended precision number in fp0.		#
# sgetexpd(): handles denormalized numbers. 				#
#									#
# sgetman():  extracts the mantissa of the input argument. The 		#
#	      mantissa is converted to an extended precision number w/ 	#
#	      an exponent of $3fff and is returned in fp0. The range of #
#	      the result is [1.0 - 2.0).				#
# sgetmand(): handles denormalized numbers.				#
#									#
# INPUT *************************************************************** #
#	a0  = pointer to extended precision input			#
#									#
# OUTPUT ************************************************************** #
#	fp0 = exponent(X) or mantissa(X)				#
#									#
#########################################################################

	global		sgetexp
sgetexp:
	mov.w		SRC_EX(%a0),%d0		# get the exponent
	bclr		&0xf,%d0		# clear the sign bit
	subi.w		&0x3fff,%d0		# subtract off the bias
	fmov.w		%d0,%fp0		# return exp in fp0
	blt.b		sgetexpn		# it's negative
	rts

sgetexpn:
	mov.b		&neg_bmask,FPSR_CC(%a6)	# set 'N' ccode bit
	rts

	global		sgetexpd
sgetexpd:
	bsr.l		norm			# normalize
	neg.w		%d0			# new exp = -(shft amt)
	subi.w		&0x3fff,%d0		# subtract off the bias
	fmov.w		%d0,%fp0		# return exp in fp0
	mov.b		&neg_bmask,FPSR_CC(%a6)	# set 'N' ccode bit
	rts

	global		sgetman
sgetman:
	mov.w		SRC_EX(%a0),%d0		# get the exp
	ori.w		&0x7fff,%d0		# clear old exp
	bclr		&0xe,%d0		# make it the new exp +-3fff

# here, we build the result in a tmp location so as not to disturb the input
	mov.l		SRC_HI(%a0),FP_SCR0_HI(%a6) # copy to tmp loc
	mov.l		SRC_LO(%a0),FP_SCR0_LO(%a6) # copy to tmp loc
	mov.w		%d0,FP_SCR0_EX(%a6)	# insert new exponent
	fmov.x		FP_SCR0(%a6),%fp0	# put new value back in fp0
	bmi.b		sgetmann		# it's negative
	rts

sgetmann:
	mov.b		&neg_bmask,FPSR_CC(%a6)	# set 'N' ccode bit
	rts

#
# For denormalized numbers, shift the mantissa until the j-bit = 1,
# then load the exponent with +/1 $3fff.
#
	global		sgetmand
sgetmand:
	bsr.l		norm			# normalize exponent
	bra.b		sgetman

#########################################################################
# scosh():  computes the hyperbolic cosine of a normalized input	#
# scoshd(): computes the hyperbolic cosine of a denormalized input	#
#									#
# INPUT ***************************************************************	#
#	a0 = pointer to extended precision input			#
#	d0 = round precision,mode					#
#									#
# OUTPUT **************************************************************	#
#	fp0 = cosh(X)							#
#									#
# ACCURACY and MONOTONICITY *******************************************	#
#	The returned result is within 3 ulps in 64 significant bit, 	#
#	i.e. within 0.5001 ulp to 53 bits if the result is subsequently	#
#	rounded to double precision. The result is provably monotonic 	#
#	in double precision.						#
#									#
# ALGORITHM ***********************************************************	#
#									#
#	COSH								#
#	1. If |X| > 16380 log2, go to 3.				#
#									#
#	2. (|X| <= 16380 log2) Cosh(X) is obtained by the formulae	#
#		y = |X|, z = exp(Y), and				#
#		cosh(X) = (1/2)*( z + 1/z ).				#
#		Exit.							#
#									#
#	3. (|X| > 16380 log2). If |X| > 16480 log2, go to 5.		#
#									#
#	4. (16380 log2 < |X| <= 16480 log2)				#
#		cosh(X) = sign(X) * exp(|X|)/2.				#
#		However, invoking exp(|X|) may cause premature 		#
#		overflow. Thus, we calculate sinh(X) as follows:	#
#		Y	:= |X|						#
#		Fact	:=	2**(16380)				#
#		Y'	:= Y - 16381 log2				#
#		cosh(X) := Fact * exp(Y').				#
#		Exit.							#
#									#
#	5. (|X| > 16480 log2) sinh(X) must overflow. Return		#
#		Huge*Huge to generate overflow and an infinity with	#
#		the appropriate sign. Huge is the largest finite number	#
#		in extended format. Exit.				#
#									#
#########################################################################

TWO16380:
	long		0x7FFB0000,0x80000000,0x00000000,0x00000000

	global		scosh
scosh:
	fmov.x		(%a0),%fp0		# LOAD INPUT

	mov.l		(%a0),%d1
	mov.w		4(%a0),%d1
	and.l		&0x7FFFFFFF,%d1
	cmp.l		%d1,&0x400CB167
	bgt.b		COSHBIG

#--THIS IS THE USUAL CASE, |X| < 16380 LOG2
#--COSH(X) = (1/2) * ( EXP(X) + 1/EXP(X) )

	fabs.x		%fp0			# |X|

	mov.l		%d0,-(%sp)
	clr.l		%d0
	fmovm.x		&0x01,-(%sp)		# save |X| to stack
	lea		(%sp),%a0		# pass ptr to |X|
	bsr		setox			# FP0 IS EXP(|X|)
	add.l		&0xc,%sp		# erase |X| from stack
	fmul.s		&0x3F000000,%fp0	# (1/2)EXP(|X|)
	mov.l		(%sp)+,%d0

	fmov.s		&0x3E800000,%fp1	# (1/4)
	fdiv.x		%fp0,%fp1		# 1/(2 EXP(|X|))

	fmov.l		%d0,%fpcr
	mov.b		&FADD_OP,%d1		# last inst is ADD
	fadd.x		%fp1,%fp0
	bra		t_catch

COSHBIG:
	cmp.l		%d1,&0x400CB2B3
	bgt.b		COSHHUGE

	fabs.x		%fp0
	fsub.d		T1(%pc),%fp0		# (|X|-16381LOG2_LEAD)
	fsub.d		T2(%pc),%fp0		# |X| - 16381 LOG2, ACCURATE

	mov.l		%d0,-(%sp)
	clr.l		%d0
	fmovm.x		&0x01,-(%sp)		# save fp0 to stack
	lea		(%sp),%a0		# pass ptr to fp0
	bsr		setox
	add.l		&0xc,%sp		# clear fp0 from stack
	mov.l		(%sp)+,%d0

	fmov.l		%d0,%fpcr
	mov.b		&FMUL_OP,%d1		# last inst is MUL
	fmul.x		TWO16380(%pc),%fp0
	bra		t_catch

COSHHUGE:
	bra		t_ovfl2

	global		scoshd
#--COSH(X) = 1 FOR DENORMALIZED X
scoshd:
	fmov.s		&0x3F800000,%fp0

	fmov.l		%d0,%fpcr
	fadd.s		&0x00800000,%fp0
	bra		t_pinx2

#########################################################################
# ssinh():  computes the hyperbolic sine of a normalized input		#
# ssinhd(): computes the hyperbolic sine of a denormalized input	#
#									#
# INPUT *************************************************************** #
#	a0 = pointer to extended precision input			#
#	d0 = round precision,mode					#
#									#
# OUTPUT ************************************************************** #
#	fp0 = sinh(X)							#
#									#
# ACCURACY and MONOTONICITY *******************************************	#
#	The returned result is within 3 ulps in 64 significant bit, 	#
#	i.e. within 0.5001 ulp to 53 bits if the result is subsequently #
#	rounded to double precision. The result is provably monotonic	#
#	in double precision.						#
#									#
# ALGORITHM *********************************************************** #
#									#
#       SINH								#
#       1. If |X| > 16380 log2, go to 3.				#
#									#
#       2. (|X| <= 16380 log2) Sinh(X) is obtained by the formula	#
#               y = |X|, sgn = sign(X), and z = expm1(Y),		#
#               sinh(X) = sgn*(1/2)*( z + z/(1+z) ).			#
#          Exit.							#
#									#
#       3. If |X| > 16480 log2, go to 5.				#
#									#
#       4. (16380 log2 < |X| <= 16480 log2)				#
#               sinh(X) = sign(X) * exp(|X|)/2.				#
#          However, invoking exp(|X|) may cause premature overflow.	#
#          Thus, we calculate sinh(X) as follows:			#
#             Y       := |X|						#
#             sgn     := sign(X)					#
#             sgnFact := sgn * 2**(16380)				#
#             Y'      := Y - 16381 log2					#
#             sinh(X) := sgnFact * exp(Y').				#
#          Exit.							#
#									#
#       5. (|X| > 16480 log2) sinh(X) must overflow. Return		#
#          sign(X)*Huge*Huge to generate overflow and an infinity with	#
#          the appropriate sign. Huge is the largest finite number in	#
#          extended format. Exit.					#
#									#
#########################################################################

	global		ssinh
ssinh:
	fmov.x		(%a0),%fp0		# LOAD INPUT

	mov.l		(%a0),%d1
	mov.w		4(%a0),%d1
	mov.l		%d1,%a1			# save (compacted) operand
	and.l		&0x7FFFFFFF,%d1
	cmp.l		%d1,&0x400CB167
	bgt.b		SINHBIG

#--THIS IS THE USUAL CASE, |X| < 16380 LOG2
#--Y = |X|, Z = EXPM1(Y), SINH(X) = SIGN(X)*(1/2)*( Z + Z/(1+Z) )

	fabs.x		%fp0			# Y = |X|

	movm.l		&0x8040,-(%sp)		# {a1/d0}
	fmovm.x		&0x01,-(%sp)		# save Y on stack
	lea		(%sp),%a0		# pass ptr to Y
	clr.l		%d0
	bsr		setoxm1			# FP0 IS Z = EXPM1(Y)
	add.l		&0xc,%sp		# clear Y from stack
	fmov.l		&0,%fpcr
	movm.l		(%sp)+,&0x0201		# {a1/d0}

	fmov.x		%fp0,%fp1
	fadd.s		&0x3F800000,%fp1	# 1+Z
	fmov.x		%fp0,-(%sp)
	fdiv.x		%fp1,%fp0		# Z/(1+Z)
	mov.l		%a1,%d1
	and.l		&0x80000000,%d1
	or.l		&0x3F000000,%d1
	fadd.x		(%sp)+,%fp0
	mov.l		%d1,-(%sp)

	fmov.l		%d0,%fpcr
	mov.b		&FMUL_OP,%d1		# last inst is MUL
	fmul.s		(%sp)+,%fp0		# last fp inst - possible exceptions set
	bra		t_catch

SINHBIG:
	cmp.l		%d1,&0x400CB2B3
	bgt		t_ovfl
	fabs.x		%fp0
	fsub.d		T1(%pc),%fp0		# (|X|-16381LOG2_LEAD)
	mov.l		&0,-(%sp)
	mov.l		&0x80000000,-(%sp)
	mov.l		%a1,%d1
	and.l		&0x80000000,%d1
	or.l		&0x7FFB0000,%d1
	mov.l		%d1,-(%sp)		# EXTENDED FMT
	fsub.d		T2(%pc),%fp0		# |X| - 16381 LOG2, ACCURATE

	mov.l		%d0,-(%sp)
	clr.l		%d0
	fmovm.x		&0x01,-(%sp)		# save fp0 on stack
	lea		(%sp),%a0		# pass ptr to fp0
	bsr		setox
	add.l		&0xc,%sp		# clear fp0 from stack

	mov.l		(%sp)+,%d0
	fmov.l		%d0,%fpcr
	mov.b		&FMUL_OP,%d1		# last inst is MUL
	fmul.x		(%sp)+,%fp0		# possible exception
	bra		t_catch

	global		ssinhd
#--SINH(X) = X FOR DENORMALIZED X
ssinhd:
	bra		t_extdnrm

#########################################################################
# stanh():  computes the hyperbolic tangent of a normalized input	#
# stanhd(): computes the hyperbolic tangent of a denormalized input	#
#									#
# INPUT ***************************************************************	#
#	a0 = pointer to extended precision input			#
#	d0 = round precision,mode					#
#									#
# OUTPUT **************************************************************	#
#	fp0 = tanh(X)							#
#									#
# ACCURACY and MONOTONICITY *******************************************	#
#	The returned result is within 3 ulps in 64 significant bit, 	#
#	i.e. within 0.5001 ulp to 53 bits if the result is subsequently #
#	rounded to double precision. The result is provably monotonic	#
#	in double precision.						#
#									#
# ALGORITHM ***********************************************************	#
#									#
#	TANH								#
#	1. If |X| >= (5/2) log2 or |X| <= 2**(-40), go to 3.		#
#									#
#	2. (2**(-40) < |X| < (5/2) log2) Calculate tanh(X) by		#
#		sgn := sign(X), y := 2|X|, z := expm1(Y), and		#
#		tanh(X) = sgn*( z/(2+z) ).				#
#		Exit.							#
#									#
#	3. (|X| <= 2**(-40) or |X| >= (5/2) log2). If |X| < 1,		#
#		go to 7.						#
#									#
#	4. (|X| >= (5/2) log2) If |X| >= 50 log2, go to 6.		#
#									#
#	5. ((5/2) log2 <= |X| < 50 log2) Calculate tanh(X) by		#
#		sgn := sign(X), y := 2|X|, z := exp(Y),			#
#		tanh(X) = sgn - [ sgn*2/(1+z) ].			#
#		Exit.							#
#									#
#	6. (|X| >= 50 log2) Tanh(X) = +-1 (round to nearest). Thus, we	#
#		calculate Tanh(X) by					#
#		sgn := sign(X), Tiny := 2**(-126),			#
#		tanh(X) := sgn - sgn*Tiny.				#
#		Exit.							#
#									#
#	7. (|X| < 2**(-40)). Tanh(X) = X.	Exit.			#
#									#
#########################################################################

	set		X,FP_SCR0
	set		XFRAC,X+4

	set		SGN,L_SCR3

	set		V,FP_SCR0

	global		stanh
stanh:
	fmov.x		(%a0),%fp0		# LOAD INPUT

	fmov.x		%fp0,X(%a6)
	mov.l		(%a0),%d1
	mov.w		4(%a0),%d1
	mov.l		%d1,X(%a6)
	and.l		&0x7FFFFFFF,%d1
	cmp.l		%d1, &0x3fd78000	# is |X| < 2^(-40)?
	blt.w		TANHBORS		# yes
	cmp.l		%d1, &0x3fffddce	# is |X| > (5/2)LOG2?
	bgt.w		TANHBORS		# yes

#--THIS IS THE USUAL CASE
#--Y = 2|X|, Z = EXPM1(Y), TANH(X) = SIGN(X) * Z / (Z+2).

	mov.l		X(%a6),%d1
	mov.l		%d1,SGN(%a6)
	and.l		&0x7FFF0000,%d1
	add.l		&0x00010000,%d1		# EXPONENT OF 2|X|
	mov.l		%d1,X(%a6)
	and.l		&0x80000000,SGN(%a6)
	fmov.x		X(%a6),%fp0		# FP0 IS Y = 2|X|

	mov.l		%d0,-(%sp)
	clr.l		%d0
	fmovm.x		&0x1,-(%sp)		# save Y on stack
	lea		(%sp),%a0		# pass ptr to Y
	bsr		setoxm1			# FP0 IS Z = EXPM1(Y)
	add.l		&0xc,%sp		# clear Y from stack
	mov.l		(%sp)+,%d0

	fmov.x		%fp0,%fp1
	fadd.s		&0x40000000,%fp1	# Z+2
	mov.l		SGN(%a6),%d1
	fmov.x		%fp1,V(%a6)
	eor.l		%d1,V(%a6)

	fmov.l		%d0,%fpcr		# restore users round prec,mode
	fdiv.x		V(%a6),%fp0
	bra		t_inx2

TANHBORS:
	cmp.l		%d1,&0x3FFF8000
	blt.w		TANHSM

	cmp.l		%d1,&0x40048AA1
	bgt.w		TANHHUGE

#-- (5/2) LOG2 < |X| < 50 LOG2,
#--TANH(X) = 1 - (2/[EXP(2X)+1]). LET Y = 2|X|, SGN = SIGN(X),
#--TANH(X) = SGN -	SGN*2/[EXP(Y)+1].

	mov.l		X(%a6),%d1
	mov.l		%d1,SGN(%a6)
	and.l		&0x7FFF0000,%d1
	add.l		&0x00010000,%d1		# EXPO OF 2|X|
	mov.l		%d1,X(%a6)		# Y = 2|X|
	and.l		&0x80000000,SGN(%a6)
	mov.l		SGN(%a6),%d1
	fmov.x		X(%a6),%fp0		# Y = 2|X|

	mov.l		%d0,-(%sp)
	clr.l		%d0
	fmovm.x		&0x01,-(%sp)		# save Y on stack
	lea		(%sp),%a0		# pass ptr to Y
	bsr		setox			# Fa		t_dz

LP1NEG:
	fmov.s		zero(%pc),%fp0

	fmov.l		%d0,%fpcr
	bra		t_operr

	global		slognp1d
#--ENTRY POINT FOR LOG(1+Z) FOR DENORMALIZED INPUT
# Simply return the denorm
slognp1d:
	bra		t_extdnrm

#########################################################################
# satanh():  computes the inverse hyperbolic tangent of a norm input	#
# satanhd(): computes the inverse hyperbolic tangent of a denorm input	#
#									#
# INPUT ***************************************************************	#
#	a0 = pointer to extended precision input			#
#	d0 = round precision,mode					#
#									#
# OUTPUT **************************************************************	# 
#	fp0 = arctanh(X)						#
#									#
# ACCURACY and MONOTONICITY *******************************************	#
#	The returned result is within 3 ulps in	64 significant bit,	#
#	i.e. within 0.5001 ulp to 53 bits if the result is subsequently	#
#	rounded to double precision. The result is provably monotonic	#
#	in double precision.						#
#									#
# ALGORITHM ***********************************************************	#
#									#
#	ATANH								#
#	1. If |X| >= 1, go to 3.					#
#									#
#	2. (|X| < 1) Calculate atanh(X) by				#
#		sgn := sign(X)						#
#		y := |X|						#
#		z := 2y/(1-y)						#
#		atanh(X) := sgn * (1/2) * logp1(z)			#
#		Exit.							#
#									#
#	3. If |X| > 1, go to 5.						#
#									#
#	4. (|X| = 1) Generate infinity with an appropriate sign and	#
#		divide-by-zero by					#
#		sgn := sign(X)						#
#		atan(X) := sgn / (+0).					#
#		Exit.							#
#									#
#	5. (|X| > 1) Generate an invalid operation by 0 * infinity.	#
#		Exit.							#
#									#
#########################################################################

	global		satanh
satanh:
	mov.l		(%a0),%d1
	mov.w		4(%a0),%d1
	and.l		&0x7FFFFFFF,%d1
	cmp.l		%d1,&0x3FFF8000
	bge.b		ATANHBIG

#--THIS IS THE USUAL CASE, |X| < 1
#--Y = |X|, Z = 2Y/(1-Y), ATANH(X) = SIGN(X) * (1/2) * LOG1P(Z).

	fabs.x		(%a0),%fp0		# Y = |X|
	fmov.x		%fp0,%fp1
	fneg.x		%fp1			# -Y
	fadd.x		%fp0,%fp0		# 2Y
	fadd.s		&0x3F800000,%fp1	# 1-Y
	fdiv.x		%fp1,%fp0		# 2Y/(1-Y)
	mov.l		(%a0),%d1
	and.l		&0x80000000,%d1
	or.l		&0x3F000000,%d1		# SIGN(X)*HALF
	mov.l		%d1,-(%sp)

	mov.l		%d0,-(%sp)		# save rnd prec,mode
	clr.l		%d0			# pass ext prec,RN
	fmovm.x		&0x01,-(%sp)		# save Z on stack
	lea		(%sp),%a0		# pass ptr to Z
	bsr		slognp1			# LOG1P(Z)
	add.l		&0xc,%sp		# clear Z from stack

	mov.l		(%sp)+,%d0		# fetch old prec,mode
	fmov.l		%d0,%fpcr		# load it
	mov.b		&FMUL_OP,%d1		# last inst is MUL
	fmul.s		(%sp)+,%fp0
	bra		t_catch

ATANHBIG:
	fabs.x		(%a0),%fp0		# |X|
	fcmp.s		%fp0,&0x3F800000
	fbgt		t_operr
	bra		t_dz

	global		satanhd
#--ATANH(X) = X FOR DENORMALIZED X
satanhd:
	bra		t_extdnrm

#########################################################################
# slog10():  computes the base-10 logarithm of a normalized input	#
# slog10d(): computes the base-10 logarithm of a denormalized input	#
# slog2():   computes the base-2 logarithm of a normalized input	#
# slog2d():  computes the base-2 logarithm of a denormalized input	#
#									#
# INPUT *************************************************************** #
#	a0 = pointer to extended precision input			#
#	d0 = round precision,mode					#
#									#
# OUTPUT **************************************************************	#
#	fp0 = log_10(X) or log_2(X)					#
#									#
# ACCURACY and MONOTONICITY *******************************************	#
#	The returned result is within 1.7 ulps in 64 significant bit,	#
#	i.e. within 0.5003 ulp to 53 bits if the result is subsequently	#
#	rounded to double precision. The result is provably monotonic	#
#	in double precision.						#
#									#
# ALGORITHM ***********************************************************	#
#									#
#       slog10d:							#
#									#
#       Step 0.	If X < 0, create a NaN and raise the invalid operation	#
#               flag. Otherwise, save FPCR in D1; set FpCR to default.	#
#       Notes:  Default means round-to-nearest mode, no floating-point	#
#               traps, and precision control = double extended.		#
#									#
#       Step 1. Call slognd to obtain Y = log(X), the natural log of X.	#
#       Notes:  Even if X is denormalized, log(X) is always normalized.	#
#									#
#       Step 2.  Compute log_10(X) = log(X) * (1/log(10)).		#
#            2.1 Restore the user FPCR					#
#            2.2 Return ans := Y * INV_L10.				#
#									#
#       slog10: 							#
#									#
#       Step 0. If X < 0, create a NaN and raise the invalid operation	#
#               flag. Otherwise, save FPCR in D1; set FpCR to default.	#
#       Notes:  Default means round-to-nearest mode, no floating-point	#
#               traps, and precision control = double extended.		#
#									#
#       Step 1. Call sLogN to obtain Y = log(X), the natural log of X.	#
#									#
#       Step 2.   Compute log_10(X) = log(X) * (1/log(10)).		#
#            2.1  Restore the user FPCR					#
#            2.2  Return ans := Y * INV_L10.				#
#									#
#       sLog2d:								#
#									#
#       Step 0. If X < 0, create a NaN and raise the invalid operation	#
#               flag. Otherwise, save FPCR in D1; set FpCR to default.	#
#       Notes:  Default means round-to-nearest mode, no floating-point	#
#               traps, and precision control = double extended.		#
#									#
#       Step 1. Call slognd to obtain Y = log(X), the natural log of X.	#
#       Notes:  Even if X is denormalized, log(X) is always normalized.	#
#									#
#       Step 2.   Compute log_10(X) = log(X) * (1/log(2)).		#
#            2.1  Restore the user FPCR					#
#            2.2  Return ans := Y * INV_L2.				#
#									#
#       sLog2:								#
#									#
#       Step 0. If X < 0, create a NaN and raise the invalid operation	#
#               flag. Otherwise, save FPCR in D1; set FpCR to default.	#
#       Notes:  Default means round-to-nearest mode, no floating-point	#
#               traps, and precision control = double extended.		#
#									#
#       Step 1. If X is not an integer power of two, i.e., X != 2^k,	#
#               go to Step 3.						#
#									#
#       Step 2.   Return k.						#
#            2.1  Get integer k, X = 2^k.				#
#            2.2  Restore the user FPCR.				#
#            2.3  Return ans := convert-to-double-extended(k).		#
#									#
#       Step 3. Call sLogN to obtain Y = log(X), the natural log of X.	#
#									#
#       Step 4.   Compute log_2(X) = log(X) * (1/log(2)).		#
#            4.1  Restore the user FPCR					#
#            4.2  Return ans := Y * INV_L2.				#
#									#
#########################################################################

INV_L10:
	long		0x3FFD0000,0xDE5BD8A9,0x37287195,0x00000000

INV_L2:
	long		0x3FFF0000,0xB8AA3B29,0x5C17F0BC,0x00000000

	global		slog10
#--entry point for Log10(X), X is normalized
slog10:
	fmov.b		&0x1,%fp0
	fcmp.x		%fp0,(%a0)		# if operand == 1,
	fbeq.l		ld_pzero		# return an EXACT zero

	mov.l		(%a0),%d1
	blt.w		invalid
	mov.l		%d0,-(%sp)
	clr.l		%d0
	bsr		slogn			# log(X), X normal.
	fmov.l		(%sp)+,%fpcr
	fmul.x		INV_L10(%pc),%fp0
	bra		t_inx2

	global		slog10d
#--entry point for Log10(X), X is denormalized
slog10d:
	mov.l		(%a0),%d1
	blt.w		invalid
	mov.l		%d0,-(%sp)
	clr.l		%d0
	bsr		slognd			# log(X), X denorm.
	fmov.l		(%sp)+,%fpcr
	fmul.x		INV_L10(%pc),%fp0
	bra		t_minx2

	global		slog2
#--entry point for Log2(X), X is normalized
slog2:
	mov.l		(%a0),%d1
	blt.w		invalid

	mov.l		8(%a0),%d1
	bne.b		continue		# X is not 2^k

	mov.l		4(%a0),%d1
	and.l		&0x7FFFFFFF,%d1
	bne.b		continue

#--X = 2^k.
	mov.w		(%a0),%d1
	and.l		&0x00007FFF,%d1
	sub.l		&0x3FFF,%d1
	beq.l		ld_pzero
	fmov.l		%d0,%fpcr
	fmov.l		%d1,%fp0
	bra		t_inx2

continue:
	mov.l		%d0,-(%sp)
	clr.l		%d0
	bsr		slogn			# log(X), X normal.
	fmov.l		(%sp)+,%fpcr
	fmul.x		INV_L2(%pc),%fp0
	bra		t_inx2

invalid:
	bra		t_operr

	global		slog2d
#--entry point for Log2(X), X is denormalized
slog2d:
	mov.l		(%a0),%d1
	blt.w		invalid
	mov.l		%d0,-(%sp)
	clr.l		%d0
	bsr		slognd			# log(X), X denorm.
	fmov.l		(%sp)+,%fpcr
	fmul.x		INV_L2(%pc),%fp0
	bra		t_minx2

#########################################################################
# stwotox():  computes 2**X for a normalized input			#
# stwotoxd(): computes 2**X for a denormalized input			#
# stentox():  computes 10**X for a normalized input			#
# stentoxd(): computes 10**X for a denormalized input			#
#									#
# INPUT ***************************************************************	#
#	a0 = pointer to extended precision input			#
#	d0 = round precision,mode					#
#									#
# OUTPUT **************************************************************	#
#	fp0 = 2**X or 10**X						#
#									#
# ACCURACY and MONOTONICITY *******************************************	#
#	The returned result is within 2 ulps in 64 significant bit, 	#
#	i.e. within 0.5001 ulp to 53 bits if the result is subsequently	#
#	rounded to double precision. The result is provably monotonic	#
#	in double precision.						#
#									#
# ALGORITHM ***********************************************************	#
#									#
#	twotox								#
#	1. If |X| > 16480, go to ExpBig.				#
#									#
#	2. If |X| < 2**(-70), go to ExpSm.				#
#									#
#	3. Decompose X as X = N/64 + r where |r| <= 1/128. Furthermore	#
#		decompose N as						#
#		 N = 64(M + M') + j,  j = 0,1,2,...,63.			#
#									#
#	4. Overwrite r := r * log2. Then				#
#		2**X = 2**(M') * 2**(M) * 2**(j/64) * exp(r).		#
#		Go to expr to compute that expression.			#
#									#
#	tentox								#
#	1. If |X| > 16480*log_10(2) (base 10 log of 2), go to ExpBig.	#
#									#
#	2. If |X| < 2**(-70), go to ExpSm.				#
#									#
#	3. Set y := X*log_2(10)*64 (base 2 log of 10). Set		#
#		N := round-to-int(y). Decompose N as			#
#		 N = 64(M + M') + j,  j = 0,1,2,...,63.			#
#									#
#	4. Define r as							#
#		r := ((X - N*L1)-N*L2) * L10				#
#		where L1, L2 are the leading and trailing parts of 	#
#		log_10(2)/64 and L10 is the natural log of 10. Then	#
#		10**X = 2**(M') * 2**(M) * 2**(j/64) * exp(r).		#
#		Go to expr to compute that expression.			#
#									#
#	expr								#
#	1. Fetch 2**(j/64) from table as Fact1 and Fact2.		#
#									#
#	2. Overwrite Fact1 and Fact2 by					#
#		Fact1 := 2**(M) * Fact1					#
#		Fact2 := 2**(M) * Fact2					#
#		Thus Fact1 + Fact2 = 2**(M) * 2**(j/64).		#
#									#
#	3. Calculate P where 1 + P approximates exp(r):			#
#		P = r + r*r*(A1+r*(A2+...+r*A5)).			#
#									#
#	4. Let AdjFact := 2**(M'). Return				#
#		AdjFact * ( Fact1 + ((Fact1*P) + Fact2) ).		#
#		Exit.							#
#									#
#	ExpBig								#
#	1. Generate overflow by Huge * Huge if X > 0; otherwise, 	#
#	        generate underflow by Tiny * Tiny.			#
#									#
#	ExpSm								#
#	1. Return 1 + X.						#
#									#
#########################################################################

L2TEN64:
	long		0x406A934F,0x0979A371	# 64LOG10/LOG2
L10TWO1:
	long		0x3F734413,0x509F8000	# LOG2/64LOG10

L10TWO2:
	long		0xBFCD0000,0xC0219DC1,0xDA994FD2,0x00000000

LOG10:	long		0x40000000,0x935D8DDD,0xAAA8AC17,0x00000000

LOG2:	long		0x3FFE0000,0xB17217F7,0xD1CF79AC,0x00000000

EXPA5:	long		0x3F56C16D,0x6F7BD0B2
EXPA4:	long		0x3F811112,0x302C712C
EXPA3:	long		0x3FA55555,0x55554CC1
EXPA2:	long		0x3FC55555,0x55554A54
EXPA1:	long		0x3FE00000,0x00000000,0x00000000,0x00000000

TEXPTBL:
	long		0x3FFF0000,0x80000000,0x00000000,0x3F738000
	long		0x3FFF0000,0x8164D1F3,0xBC030773,0x3FBEF7CA
	long		0x3FFF0000,0x82CD8698,0xAC2BA1D7,0x3FBDF8A9
	long		0x3FFF0000,0x843A28C3,0xACDE4046,0x3FBCD7C9
	long		0x3FFF0000,0x85AAC367,0xCC487B15,0xBFBDE8DA
	long		0x3FFF0000,0x871F6196,0x9E8D1010,0x3FBDE85C
	long		0x3FFF0000,0x88980E80,0x92DA8527,0x3FBEBBF1
	long		0x3FFF0000,0x8A14D575,0x496EFD9A,0x3FBB80CA
	long		0x3FFF0000,0x8B95C1E3,0xEA8BD6E7,0xBFBA8373
	long		0x3FFF0000,0x8D1ADF5B,0x7E5BA9E6,0xBFBE9670
	long		0x3FFF0000,0x8EA4398B,0x45CD53C0,0x3FBDB700
	long		0x3FFF0000,0x9031DC43,0x1466B1DC,0x3FBEEEB0
	long		0x3FFF0000,0x91C3D373,0xAB11C336,0x3FBBFD6D
	long		0x3FFF0000,0x935A2B2F,0x13E6E92C,0xBFBDB319
	long		0x3FFF0000,0x94F4EFA8,0xFEF70961,0x3FBDBA2B
	long		0x3FFF0000,0x96942D37,0x20185A00,0x3FBE91D5
	long		0x3FFF0000,0x9837F051,0x8DB8A96F,0x3FBE8D5A
	long		0x3FFF0000,0x99E04593,0x20B7FA65,0xBFBCDE7B
	long		0x3FFF0000,0x9B8D39B9,0xD54E5539,0xBFBEBAAF
	long		0x3FFF0000,0x9D3ED9A7,0x2CFFB751,0xBFBD86DA
	long		0x3FFF0000,0x9EF53260,0x91A111AE,0xBFBEBEDD
	long		0x3FFF0000,0xA0B0510F,0xB9714FC2,0x3FBCC96E
	long		0x3FFF0000,0xA2704303,0x0C496819,0xBFBEC90B
	long		0x3FFF0000,0xA43515AE,0x09E6809E,0x3FBBD1DB
	long		0x3FFF0000,0xA5FED6A9,0xB15138EA,0x3FBCE5EB
	long		0x3FFF0000,0xA7CD93B4,0xE965356A,0xBFBEC274
	long		0x3FFF0000,0xA9A15AB4,0xEA7C0EF8,0x3FBEA83C
	long		0x3FFF0000,0xAB7A39B5,0xA93ED337,0x3FBECB00
	long		0x3FFF0000,0xAD583EEA,0x42A14AC6,0x3FBE9301
	long		0x3FFF0000,0xAF3B78AD,0x690A4375,0xBFBD8367
	long		0x3FFF0000,0xB123F581,0xD2AC2590,0xBFBEF05F
	long		0x3FFF0000,0xB311C412,0xA9112489,0x3FBDFB3C
	long		0x3FFF0000,0xB504F333,0xF9DE6484,0x3FBEB2FB
	long		0x3FFF0000,0xB6FD91E3,0x28D17791,0x3FBAE2CB
	long		0x3FFF0000,0xB8FBAF47,0x62FB9EE9,0x3FBCDC3C
	long		0x3FFF0000,0xBAFF5AB2,0x133E45FB,0x3FBEE9AA
	long		0x3FFF0000,0xBD08A39F,0x580C36BF,0xBFBEAEFD
	long		0x3FFF0000,0xBF1799B6,0x7A731083,0xBFBCBF51
	long		0x3FFF0000,0xC12C4CCA,0x66709456,0x3FBEF88A
	long		0x3FFF0000,0xC346CCDA,0x24976407,0x3FBD83B2
	long		0x3FFF0000,0xC5672A11,0x5506DADD,0x3FBDF8AB
	long		0x3FFF0000,0xC78D74C8,0xABB9B15D,0xBFBDFB17
	long		0x3FFF0000,0xC9B9BD86,0x6E2F27A3,0xBFBEFE3C
	long		0x3FFF0000,0xCBEC14FE,0xF2727C5D,0xBFBBB6F8
	long		0x3FFF0000,0xCE248C15,0x1F8480E4,0xBFBCEE53
	long		0x3FFF0000,0xD06333DA,0xEF2B2595,0xBFBDA4AE
	long		0x3FFF0000,0xD2A81D91,0xF12AE45A,0x3FBC9124
	long		0x3FFF0000,0xD4F35AAB,0xCFEDFA1F,0x3FBEB243
	long		0x3FFF0000,0xD744FCCA,0xD69D6AF4,0x3FBDE69A
	long		0x3FFF0000,0xD99D15C2,0x78AFD7B6,0xBFB8BC61
	long		0x3FFF0000,0xDBFBB797,0xDAF23755,0x3FBDF610
	long		0x3FFF0000,0xDE60F482,0x5E0E9124,0xBFBD8BE1
	long		0x3FFF0000,0xE0CCDEEC,0x2A94E111,0x3FBACB12
	long		0x3FFF0000,0xE33F8972,0xBE8A5A51,0x3FBB9BFE
	long		0x3FFF0000,0xE5B906E7,0x7C8348A8,0x3FBCF2F4
	long		0x3FFF0000,0xE8396A50,0x3C4BDC68,0x3FBEF22F
	long		0x3FFF0000,0xEAC0C6E7,0xDD24392F,0xBFBDBF4A
	long		0x3FFF0000,0xED4F301E,0xD9942B84,0x3FBEC01A
	long		0x3FFF0000,0xEFE4B99B,0xDCDAF5CB,0x3FBE8CAC
	long		0x3FFF0000,0xF281773C,0x59FFB13A,0xBFBCBB3F
	long		0x3FFF0000,0xF5257D15,0x2486CC2C,0x3FBEF73A
	long		0x3FFF0000,0xF7D0DF73,0x0AD13BB9,0xBFB8B795
	long		0x3FFF0000,0xFA83B2DB,0x722A033A,0x3FBEF84B
	long		0x3FFF0000,0xFD3E0C0C,0xF486C175,0xBFBEF581

	set		INT,L_SCR1

	set		X,FP_SCR0
	set		XDCARE,X+2
	set		XFRAC,X+4

	set		ADJFACT,FP_SCR0

	set		FACT1,FP_SCR0
	set		FACT1HI,FACT1+4
	set		FACT1LOW,FACT1+8

	set		FACT2,FP_SCR1
	set		FACT2HI,FACT2+4
	set		FACT2LOW,FACT2+8

	global		stwotox
#--ENTRY POINT FOR 2**(X), HERE X IS FINITE, NON-ZERO, AND NOT NAN'S
stwotox:
	fmovm.x		(%a0),&0x80		# LOAD INPUT

	mov.l		(%a0),%d1
	mov.w		4(%a0),%d1
	fmov.x		%fp0,X(%a6)
	and.l		&0x7FFFFFFF,%d1

	cmp.l		%d1,&0x3FB98000		# |X| >= 2**(-70)?
	bge.b		TWOOK1
	bra.w		EXPBORS

TWOOK1:
	cmp.l		%d1,&0x400D80C0		# |X| > 16480?
	ble.b		TWOMAIN
	bra.w		EXPBORS

TWOMAIN:
#--USUAL CASE, 2^(-70) <= |X| <= 16480

	fmov.x		%fp0,%fp1
	fmul.s		&0x42800000,%fp1	# 64 * X
	fmov.l		%fp1,INT(%a6)		# N = ROUND-TO-INT(64 X)
	mov.l		%d2,-(%sp)
	lea		TEXPTBL(%pc),%a1	# LOAD ADDRESS OF TABLE OF 2^(J/64)
	fmov.l		INT(%a6),%fp1		# N --> FLOATING FMT
	mov.l		INT(%a6),%d1
	mov.l		%d1,%d2
	and.l		&0x3F,%d1		# D0 IS J
	asl.l		&4,%d1			# DISPLACEMENT FOR 2^(J/64)
	add.l		%d1,%a1			# ADDRESS FOR 2^(J/64)
	asr.l		&6,%d2			# d2 IS L, N = 64L + J
	mov.l		%d2,%d1
	asr.l		&1,%d1			# D0 IS M
	sub.l		%d1,%d2			# d2 IS M', N = 64(M+M') + J
	add.l		&0x3FFF,%d2

#--SUMMARY: a1 IS ADDRESS FOR THE LEADING PORTION OF 2^(J/64),
#--D0 IS M WHERE N = 64(M+M') + J. NOTE THAT |M| <= 16140 BY DESIGN.
#--ADJFACT = 2^(M').
#--REGISTERS SAVED SO FAR ARE (IN ORDER) FPCR, D0, FP1, a1, AND FP2.

	fmovm.x		&0x0c,-(%sp)		# save fp2/fp3

	fmul.s		&0x3C800000,%fp1	# (1/64)*N
	mov.l		(%a1)+,FACT1(%a6)
	mov.l		(%a1)+,FACT1HI(%a6)
	mov.l		(%a1)+,FACT1LOW(%a6)
	mov.w		(%a1)+,FACT2(%a6)

	fsub.x		%fp1,%fp0		# X - (1/64)*INT(64 X)

	mov.w		(%a1)+,FACT2HI(%a6)
	clr.w		FACT2HI+2(%a6)
	clr.l		FACT2LOW(%a6)
	add.w		%d1,FACT1(%a6)
	fmul.x		LOG2(%pc),%fp0		# FP0 IS R
	add.w		%d1,FACT2(%a6)

	bra.w		expr

EXPBORS:
#--FPCR, D0 SAVED
	cmp.l		%d1,&0x3FFF8000
	bgt.b		TEXPBIG

#--|X| IS SMALL, RETURN 1 + X

	fmov.l		%d0,%fpcr		# restore users round prec,mode
	fadd.s		&0x3F800000,%fp0	# RETURN 1 + X
	bra		t_pinx2

TEXPBIG:
#--|X| IS LARGE, GENERATE OVERFLOW IF X > 0; ELSE GENERATE UNDERFLOW
#--REGISTERS SAVE SO FAR ARE FPCR AND  D0
	mov.l		X(%a6),%d1
	cmp.l		%d1,&0
	blt.b		EXPNEG

	bra		t_ovfl2			# t_ovfl expects positive value

EXPNEG:
	bra		t_unfl2			# t_unfl expects positive value

	global		stwotoxd
stwotoxd:
#--ENTRY POINT FOR 2**(X) FOR DENORMALIZED ARGUMENT

	fmov.l		%d0,%fpcr		# set user's rounding mode/precision
	fmov.s		&0x3F800000,%fp0	# RETURN 1 + X
	mov.l		(%a0),%d1
	or.l		&0x00800001,%d1
	fadd.s		%d1,%fp0
	bra		t_pinx2

	global		stentox
#--ENTRY POINT FOR 10**(X), HERE X IS FINITE, NON-ZERO, AND NOT NAN'S
stentox:
	fmovm.x		(%a0),&0x80		# LOAD INPUT

	mov.l		(%a0),%d1
	mov.w		4(%a0),%d1
	fmov.x		%fp0,X(%a6)
	and.l		&0x7FFFFFFF,%d1

	cmp.l		%d1,&0x3FB98000		# |X| >= 2**(-70)?
	bge.b		TENOK1
	bra.w		EXPBORS

TENOK1:
	cmp.l		%d1,&0x400B9B07		# |X| <= 16480*log2/log10 ?
	ble.b		TENMAIN
	bra.w		EXPBORS

TENMAIN:
#--USUAL CASE, 2^(-70) <= |X| <= 16480 LOG 2 / LOG 10

	fmov.x		%fp0,%fp1
	fmul.d		L2TEN64(%pc),%fp1	# X*64*LOG10/LOG2
	fmov.l		%fp1,INT(%a6)		# N=INT(X*64*LOG10/LOG2)
	mov.l		%d2,-(%sp)
	lea		TEXPTBL(%pc),%a1	# LOAD ADDRESS OF TABLE OF 2^(J/64)
	fmov.l		INT(%a6),%fp1		# N --> FLOATING FMT
	mov.l		INT(%a6),%d1
	mov.l		%d1,%d2
	and.l		&0x3F,%d1		# D0 IS J
	asl.l		&4,%d1			# DISPLACEMENT FOR 2^(J/64)
	add.l		%d1,%a1			# ADDRESS FOR 2^(J/64)
	asr.l		&6,%d2			# d2 IS L, N = 64L + J
	mov.l		%d2,%d1
	asr.l		&1,%d1			# D0 IS M
	sub.l		%d1,%d2			# d2 IS M', N = 64(M+M') + J
	add.l		&0x3FFF,%d2

#--SUMMARY: a1 IS ADDRESS FOR THE LEADING PORTION OF 2^(J/64),
#--D0 IS M WHERE N = 64(M+M') + J. NOTE THAT |M| <= 16140 BY DESIGN.
#--ADJFACT = 2^(M').
#--REGISTERS SAVED SO FAR ARE (IN ORDER) FPCR, D0, FP1, a1, AND FP2.
	fmovm.x		&0x0c,-(%sp)		# save fp2/fp3

	fmov.x		%fp1,%fp2

	fmul.d		L10TWO1(%pc),%fp1	# N*(LOG2/64LOG10)_LEAD
	mov.l		(%a1)+,FACT1(%a6)

	fmul.x		L10TWO2(%pc),%fp2	# N*(LOG2/64LOG10)_TRAIL

	mov.l		(%a1)+,FACT1HI(%a6)
	mov.l		(%a1)+,FACT1LOW(%a6)
	fsub.x		%fp1,%fp0		# X - N L_LEAD
	mov.w		(%a1)+,FACT2(%a6)

	fsub.x		%fp2,%fp0		# X - N L_TRAIL

	mov.w		(%a1)+,FACT2HI(%a6)
	clr.w		FACT2HI+2(%a6)
	clr.l		FACT2LOW(%a6)

	fmul.x		LOG10(%pc),%fp0		# FP0 IS R
	add.w		%d1,FACT1(%a6)
	add.w		%d1,FACT2(%a6)

expr:
#--FPCR, FP2, FP3 ARE SAVED IN ORDER AS SHOWN.
#--ADJFACT CONTAINS 2**(M'), FACT1 + FACT2 = 2**(M) * 2**(J/64).
#--FP0 IS R. THE FOLLOWING CODE COMPUTES
#--	2**(M'+M) * 2**(J/64) * EXP(R)

	fmov.x		%fp0,%fp1
	fmul.x		%fp1,%fp1		# FP1 IS S = R*R

	fmov.d		EXPA5(%pc),%fp2		# FP2 IS A5
	fmov.d		EXPA4(%pc),%fp3		# FP3 IS A4

	fmul.x		%fp1,%fp2		# FP2 IS S*A5
	fmul.x		%fp1,%fp3		# FP3 IS S*A4

	fadd.d		EXPA3(%pc),%fp2		# FP2 IS A3+S*A5
	fadd.d		EXPA2(%pc),%fp3		# FP3 IS A2+S*A4

	fmul.x		%fp1,%fp2		# FP2 IS S*(A3+S*A5)
	fmul.x		%fp1,%fp3		# FP3 IS S*(A2+S*A4)

	fadd.d		EXPA1(%pc),%fp2		# FP2 IS A1+S*(A3+S*A5)
	fmul.x		%fp0,%fp3		# FP3 IS R*S*(A2+S*A4)

	fmul.x		%fp1,%fp2		# FP2 IS S*(A1+S*(A3+S*A5))
	fadd.x		%fp3,%fp0		# FP0 IS R+R*S*(A2+S*A4)
	fadd.x		%fp2,%fp0		# FP0 IS EXP(R) - 1

	fmovm.x		(%sp)+,&0x30		# restore fp2/fp3

#--FINAL RECONSTRUCTION PROCESS
#--EXP(X) = 2^M*2^(J/64) + 2^M*2^(J/64)*(EXP(R)-1)  -  (1 OR 0)

	fmul.x		FACT1(%a6),%fp0
	fadd.x		FACT2(%a6),%fp0
	fadd.x		FACT1(%a6),%fp0

	fmov.l		%d0,%fpcr		# restore users round prec,mode
	mov.w		%d2,ADJFACT(%a6)	# INSERT EXPONENT
	mov.l		(%sp)+,%d2
	mov.l		&0x80000000,ADJFACT+4(%a6)
	clr.l		ADJFACT+8(%a6)
	mov.b		&FMUL_OP,%d1		# last inst is MUL
	fmul.x		ADJFACT(%a6),%fp0	# FINAL ADJUSTMENT
	bra		t_catch

	global		stentoxd
stentoxd:
#--ENTRY POINT FOR 10**(X) FOR DENORMALIZED ARGUMENT

	fmov.l		%d0,%fpcr		# set user's rounding mode/precision
	fmov.s		&0x3F800000,%fp0	# RETURN 1 + X
	mov.l		(%a0),%d1
	or.l		&0x00800001,%d1
	fadd.s		%d1,%fp0
	bra		t_pinx2

#########################################################################
# sscale(): computes the destination operand scaled by the source	#
#	    operand. If the absoulute value of the source operand is 	#
#	    >= 2^14, an overflow or underflow is returned.		#
#									#
# INPUT *************************************************************** #
#	a0  = pointer to double-extended source operand X		#
#	a1  = pointer to double-extended destination operand Y		#
#									#
# OUTPUT ************************************************************** #
#	fp0 =  scale(X,Y)						#
#									#
#########################################################################

set	SIGN,		L_SCR1

	global		sscale
sscale:
	mov.l		%d0,-(%sp)		# store off ctrl bits for now

	mov.w		DST_EX(%a1),%d1		# get dst exponent
	smi.b		SIGN(%a6)		# use SIGN to hold dst sign
	andi.l		&0x00007fff,%d1		# strip sign from dst exp

	mov.w		SRC_EX(%a0),%d0		# check src bounds
	andi.w		&0x7fff,%d0		# clr src sign bit
	cmpi.w		%d0,&0x3fff		# is src ~ ZERO?
	blt.w		src_small		# yes
	cmpi.w		%d0,&0x400c		# no; is src too big?
	bgt.w		src_out			# yes

#
# Source is within 2^14 range.
#
src_ok:
	fintrz.x	SRC(%a0),%fp0		# calc int of src
	fmov.l		%fp0,%d0		# int src to d0
# don't want any accrued bits from the fintrz showing up later since
# we may need to read the fpsr for the last fp op in t_catch2().
	fmov.l		&0x0,%fpsr

	tst.b		DST_HI(%a1)		# is dst denormalized?
	bmi.b		sok_norm

# the dst is a DENORM. normalize the DENORM and add the adjustment to
# the src value. then, jump to the norm part of the routine.
sok_dnrm:
	mov.l		%d0,-(%sp)		# save src for now

	mov.w		DST_EX(%a1),FP_SCR0_EX(%a6) # make a copy
	mov.l		DST_HI(%a1),FP_SCR0_HI(%a6)
	mov.l		DST_LO(%a1),FP_SCR0_LO(%a6)

	lea		FP_SCR0(%a6),%a0	# pass ptr to DENORM
	bsr.l		norm			# normalize the DENORM
	neg.l		%d0
	add.l		(%sp)+,%d0		# add adjustment to src

	fmovm.x		FP_SCR0(%a6),&0x80	# load normalized DENORM

	cmpi.w		%d0,&-0x3fff		# is the shft amt really low?
	bge.b		sok_norm2		# thank goodness no

# the multiply factor that we're trying to create should be a denorm
# for the multiply to work. therefore, we're going to actually do a 
# multiply with a denorm which will cause an unimplemented data type
# exception to be put into the machine which will be caught and corrected
# later. we don't do this with the DENORMs above because this method
# is slower. but, don't fret, I don't see it being used much either.
	fmov.l		(%sp)+,%fpcr		# restore user fpcr
	mov.l		&0x80000000,%d1		# load normalized mantissa
	subi.l		&-0x3fff,%d0		# how many should we shift?
	neg.l		%d0			# make it positive
	cmpi.b		%d0,&0x20		# is it > 32?
	bge.b		sok_dnrm_32		# yes
	lsr.l		%d0,%d1			# no; bit stays in upper lw
	clr.l		-(%sp)			# insert zero low mantissa
	mov.l		%d1,-(%sp)		# insert new high mantissa
	clr.l		-(%sp)			# make zero exponent
	bra.b		sok_norm_cont	
sok_dnrm_32:
	subi.b		&0x20,%d0		# get shift count
	lsr.l		%d0,%d1			# make low mantissa longword
	mov.l		%d1,-(%sp)		# insert new low mantissa
	clr.l		-(%sp)			# insert zero high mantissa
	clr.l		-(%sp)			# make zero exponent
	bra.b		sok_norm_cont
	
# the src will force the dst to a DENORM value or worse. so, let's
# create an fp multiply that will create the result.
sok_norm:
	fmovm.x		DST(%a1),&0x80		# load fp0 with normalized src
sok_norm2:
	fmov.l		(%sp)+,%fpcr		# restore user fpcr

	addi.w		&0x3fff,%d0		# turn src amt into exp value
	swap		%d0			# put exponent in high word
	clr.l		-(%sp)			# insert new exponent
	mov.l		&0x80000000,-(%sp)	# insert new high mantissa
	mov.l		%d0,-(%sp)		# insert new lo mantissa

sok_norm_cont:
	fmov.l		%fpcr,%d0		# d0 needs fpcr for t_catch2
	mov.b		&FMUL_OP,%d1		# last inst is MUL
	fmul.x		(%sp)+,%fp0		# do the multiply
	bra		t_catch2		# catch any exceptions

#
# Source is outside of 2^14 range.  Test the sign and branch
# to the appropriate exception handler.
#
src_out:
	mov.l		(%sp)+,%d0		# restore ctrl bits
	exg		%a0,%a1			# swap src,dst ptrs
	tst.b		SRC_EX(%a1)		# is src negative?
	bmi		t_unfl			# yes; underflow
	bra		t_ovfl_sc		# no; overflow

#
# The source input is below 1, so we check for denormalized numbers
# and set unfl.
#
src_small:
	tst.b		DST_HI(%a1)		# is dst denormalized?
	bpl.b		ssmall_done		# yes

	mov.l		(%sp)+,%d0
	fmov.l		%d0,%fpcr		# no; load control bits
	mov.b		&FMOV_OP,%d1		# last inst is MOVE
	fmov.x		DST(%a1),%fp0		# simply return dest
	bra		t_catch2
ssmall_done:
	mov.l		(%sp)+,%d0		# load control bits into d1
	mov.l		%a1,%a0			# pass ptr to dst
	bra		t_resdnrm

#########################################################################
# smod(): computes the fp MOD of the input values X,Y.			#
# srem(): computes the fp (IEEE) REM of the input values X,Y.		#
#									#
# INPUT *************************************************************** #
#	a0 = pointer to extended precision input X			#
#	a1 = pointer to extended precision input Y			#
#	d0 = round precision,mode					#
#									#
# 	The input operands X and Y can be either normalized or 		#
#	denormalized.							#
#									#
# OUTPUT ************************************************************** #
#      fp0 = FREM(X,Y) or FMOD(X,Y)					#
#									#
# ALGORITHM *********************************************************** #
#									#
#       Step 1.  Save and strip signs of X and Y: signX := sign(X),	#
#                signY := sign(Y), X := |X|, Y := |Y|, 			#
#                signQ := signX EOR signY. Record whether MOD or REM	#
#                is requested.						#
#									#
#       Step 2.  Set L := expo(X)-expo(Y), k := 0, Q := 0.		#
#                If (L < 0) then					#
#                   R := X, go to Step 4.				#
#                else							#
#                   R := 2^(-L)X, j := L.				#
#                endif							#
#									#
#       Step 3.  Perform MOD(X,Y)					#
#            3.1 If R = Y, go to Step 9.				#
#            3.2 If R > Y, then { R := R - Y, Q := Q + 1}		#
#            3.3 If j = 0, go to Step 4.				#
#            3.4 k := k + 1, j := j - 1, Q := 2Q, R := 2R. Go to	#
#                Step 3.1.						#
#									#
#       Step 4.  At this point, R = X - QY = MOD(X,Y). Set		#
#                Last_Subtract := false (used in Step 7 below). If	#
#                MOD is requested, go to Step 6. 			#
#									#
#       Step 5.  R = MOD(X,Y), but REM(X,Y) is requested.		#
#            5.1 If R < Y/2, then R = MOD(X,Y) = REM(X,Y). Go to	#
#                Step 6.						#
#            5.2 If R > Y/2, then { set Last_Subtract := true,		#
#                Q := Q + 1, Y := signY*Y }. Go to Step 6.		#
#            5.3 This is the tricky case of R = Y/2. If Q is odd,	#
#                then { Q := Q + 1, signX := -signX }.			#
#									#
#       Step 6.  R := signX*R.						#
#									#
#       Step 7.  If Last_Subtract = true, R := R - Y.			#
#									#
#       Step 8.  Return signQ, last 7 bits of Q, and R as required.	#
#									#
#       Step 9.  At this point, R = 2^(-j)*X - Q Y = Y. Thus,		#
#                X = 2^(j)*(Q+1)Y. set Q := 2^(j)*(Q+1),		#
#                R := 0. Return signQ, last 7 bits of Q, and R.		#
#									#
#########################################################################

	set		Mod_Flag,L_SCR3
	set		Sc_Flag,L_SCR3+1

	set		SignY,L_SCR2
	set		SignX,L_SCR2+2
	set		SignQ,L_SCR3+2

	set		Y,FP_SCR0
	set		Y_Hi,Y+4
	set		Y_Lo,Y+8

	set		R,FP_SCR1
	set		R_Hi,R+4
	set		R_Lo,R+8

Scale:
	long		0x00010000,0x80000000,0x00000000,0x00000000

	global		smod
smod:
	clr.b		FPSR_QBYTE(%a6)
	mov.l		%d0,-(%sp)		# save ctrl bits
	clr.b		Mod_Flag(%a6)
	bra.b		Mod_Rem

	global		srem
srem:
	clr.b		FPSR_QBYTE(%a6)
	mov.l		%d0,-(%sp)		# save ctrl bits
	mov.b		&0x1,Mod_Flag(%a6)

Mod_Rem:
#..Save sign of X and Y
	movm.l		&0x3f00,-(%sp)		# save data registers
	mov.w		SRC_EX(%a0),%d3
	mov.w		%d3,SignY(%a6)
	and.l		&0x00007FFF,%d3		# Y := |Y|

#
	mov.l		SRC_HI(%a0),%d4
	mov.l		SRC_LO(%a0),%d5		# (D3,D4,D5) is |Y|

	tst.l		%d3
	bne.b		Y_Normal

	mov.l		&0x00003FFE,%d3		# $3FFD + 1
	tst.l		%d4
	bne.b		HiY_not0

HiY_0:
	mov.l		%d5,%d4
	clr.l		%d5
	sub.l		&32,%d3
	clr.l		%d6
	bfffo		%d4{&0:&32},%d6
	lsl.l		%d6,%d4
	sub.l		%d6,%d3			# (D3,D4,D5) is normalized
#	                                        ...with bias $7FFD
	bra.b		Chk_X

HiY_not0:
	clr.l		%d6
	bfffo		%d4{&0:&32},%d6
	sub.l		%d6,%d3
	lsl.l		%d6,%d4
	mov.l		%d5,%d7			# a copy of D5
	lsl.l		%d6,%d5
	neg.l		%d6
	add.l		&32,%d6
	lsr.l		%d6,%d7
	or.l		%d7,%d4			# (D3,D4,D5) normalized
#                                       ...with bias $7FFD
	bra.b		Chk_X

Y_Normal:
	add.l		&0x00003FFE,%d3		# (D3,D4,D5) normalized
#                                       ...with bias $7FFD

Chk_X:
	mov.w		DST_EX(%a1),%d0
	mov.w		%d0,SignX(%a6)
	mov.w		SignY(%a6),%d1
	eor.l		%d0,%d1
	and.l		&0x00008000,%d1
	mov.w		%d1,SignQ(%a6)		# sign(Q) obtained
	and.l		&0x00007FFF,%d0
	mov.l		DST_HI(%a1),%d1
	mov.l		DST_LO(%a1),%d2		# (D0,D1,D2) is |X|
	tst.l		%d0
	bne.b		X_Normal
	mov.l		&0x00003FFE,%d0
	tst.l		%d1
	bne.b		HiX_not0

HiX_0:
	mov.l		%d2,%d1
	clr.l		%d2
	sub.l		&32,%d0
	clr.l		%d6
	bfffo		%d1{&0:&32},%d6
	lsl.l		%d6,%d1
	sub.l		%d6,%d0			# (D0,D1,D2) is normalized
#                                       ...with bias $7FFD
	bra.b		Init

HiX_not0:
	clr.l		%d6
	bfffo		%d1{&0:&32},%d6
	sub.l		%d6,%d0
	lsl.l		%d6,%d1
	mov.l		%d2,%d7			# a copy of D2
	lsl.l		%d6,%d2
	neg.l		%d6
	add.l		&32,%d6
	lsr.l		%d6,%d7
	or.l		%d7,%d1			# (D0,D1,D2) normalized
#                                       ...with bias $7FFD
	bra.b		Init

X_Normal:
	add.l		&0x00003FFE,%d0		# (D0,D1,D2) normalized
#                                       ...with bias $7FFD

Init:
#
	mov.l		%d3,L_SCR1(%a6)		# save biased exp(Y)
	mov.l		%d0,-(%sp)		# save biased exp(X)
	sub.l		%d3,%d0			# L := expo(X)-expo(Y)

	clr.l		%d6			# D6 := carry <- 0
	clr.l		%d3			# D3 is Q
	mov.l		&0,%a1			# A1 is k; j+k=L, Q=0

#..(Carry,D1,D2) is R
	tst.l		%d0
	bge.b		Mod_Loop_pre

#..expo(X) < expo(Y). Thus X = mod(X,Y)
#
	mov.l		(%sp)+,%d0		# restore d0
	bra.w		Get_Mod

Mod_Loop_pre:
	addq.l		&0x4,%sp		# erase exp(X)
#..At this point  R = 2^(-L)X; Q = 0; k = 0; and  k+j = L
Mod_Loop:
	tst.l		%d6			# test carry bit
	bgt.b		R_GT_Y

#..At this point carry = 0, R = (D1,D2), Y = (D4,D5)
	cmp.l		%d1,%d4			# compare hi(R) and hi(Y)
	bne.b		R_NE_Y
	cmp.l		%d2,%d5			# compare lo(R) and lo(Y)
	bne.b		R_NE_Y

#..At this point, R = Y
	bra.w		Rem_is_0

R_NE_Y:
#..use the borrow of the previous compare
	bcs.b		R_LT_Y			# borrow is set iff R < Y

R_GT_Y:
#..If Carry is set, then Y < (Carry,D1,D2) < 2Y. Otherwise, Carry = 0
#..and Y < (D1,D2) < 2Y. Either way, perform R - Y
	sub.l		%d5,%d2			# lo(R) - lo(Y)
	subx.l		%d4,%d1			# hi(R) - hi(Y)
	clr.l		%d6			# clear carry
	addq.l		&1,%d3			# Q := Q + 1

R_LT_Y:
#..At this point, Carry=0, R < Y. R = 2^(k-L)X - QY; k+j = L; j >= 0.
	tst.l		%d0			# see if j = 0.
	beq.b		PostLoop

	add.l		%d3,%d3			# Q := 2Q
	add.l		%d2,%d2			# lo(R) = 2lo(R)
	roxl.l		&1,%d1			# hi(R) = 2hi(R) + carry
	scs		%d6			# set Carry if 2(R) overflows
	addq.l		&1,%a1			# k := k+1
	subq.l		&1,%d0			# j := j - 1
#..At this point, R=(Carry,D1,D2) = 2^(k-L)X - QY, j+k=L, j >= 0, R < 2Y.

	bra.b		Mod_Loop

PostLoop:
#..k = L, j = 0, Carry = 0, R = (D1,D2) = X - QY, R < Y.

#..normalize R.
	mov.l		L_SCR1(%a6),%d0		# new biased expo of R
	tst.l		%d1
	bne.b		HiR_not0

HiR_0:
	mov.l		%d2,%d1
	clr.l		%d2
	sub.l		&32,%d0
	clr.l		%d6
	bfffo		%d1{&0:&32},%d6
	lsl.l		%d6,%d1
	sub.l		%d6,%d0			# (D0,D1,D2) is normalized
#                                       ...with bias $7FFD
	bra.b		Get_Mod

HiR_not0:
	clr.l		%d6
	bfffo		%d1{&0:&32},%d6
	bmi.b		Get_Mod			# already normalized
	sub.l		%d6,%d0
	lsl.l		%d6,%d1
	mov.l		%d2,%d7			# a copy of D2
	lsl.l		%d6,%d2
	neg.l		%d6
	add.l		&32,%d6
	lsr.l		%d6,%d7
	or.l		%d7,%d1			# (D0,D1,D2) normalized

#
Get_Mod:
	cmp.l		%d0,&0x000041FE
	bge.b		No_Scale
Do_Scale:
	mov.w		%d0,R(%a6)
	mov.l		%d1,R_Hi(%a6)
	mov.l		%d2,R_Lo(%a6)
	mov.l		L_SCR1(%a6),%d6
	mov.w		%d6,Y(%a6)
	mov.l		%d4,Y_Hi(%a6)
	mov.l		%d5,Y_Lo(%a6)
	fmov.x		R(%a6),%fp0		# no exception
	mov.b		&1,Sc_Flag(%a6)
	bra.b		ModOrRem
No_Scale:
	mov.l		%d1,R_Hi(%a6)
	mov.l		%d2,R_Lo(%a6)
	sub.l		&0x3FFE,%d0
	mov.w		%d0,R(%a6)
	mov.l		L_SCR1(%a6),%d6
	sub.l		&0x3FFE,%d6
	mov.l		%d6,L_SCR1(%a6)
	fmov.x		R(%a6),%fp0
	mov.w		%d6,Y(%a6)
	mov.l		%d4,Y_Hi(%a6)
	mov.l		%d5,Y_Lo(%a6)
	clr.b		Sc_Flag(%a6)

#
ModOrRem:
	tst.b		Mod_Flag(%a6)
	beq.b		Fix_Sign

	mov.l		L_SCR1(%a6),%d6		# new biased expo(Y)
	subq.l		&1,%d6			# biased expo(Y/2)
	cmp.l		%d0,%d6
	blt.b		Fix_Sign
	bgt.b		Last_Sub

	cmp.l		%d1,%d4
	bne.b		Not_EQ
	cmp.l		%d2,%d5
	bne.b		Not_EQ
	bra.w		Tie_Case

Not_EQ:
	bcs.b		Fix_Sign

Last_Sub:
#
	fsub.x		Y(%a6),%fp0		# no exceptions
	addq.l		&1,%d3			# Q := Q + 1

#
Fix_Sign:
#..Get sign of X
	mov.w		SignX(%a6),%d6
	bge.b		Get_Q
	fneg.x		%fp0

#..Get Q
#
Get_Q:
	clr.l		%d6
	mov.w		SignQ(%a6),%d6		# D6 is sign(Q)
	mov.l		&8,%d7
	lsr.l		%d7,%d6
	and.l		&0x0000007F,%d3		# 7 bits of Q
	or.l		%d6,%d3			# sign and bits of Q
#	swap		%d3
#	fmov.l		%fpsr,%d6
#	and.l		&0xFF00FFFF,%d6
#	or.l		%d3,%d6
#	fmov.l		%d6,%fpsr		# put Q in fpsr
	mov.b		%d3,FPSR_QBYTE(%a6)	# put Q in fpsr

#
Restore:
	movm.l		(%sp)+,&0xfc		#  {%d2-%d7}
	mov.l		(%sp)+,%d0
	fmov.l		%d0,%fpcr
	tst.b		Sc_Flag(%a6)
	beq.b		Finish
	mov.b		&FMUL_OP,%d1		# last inst is MUL
	fmul.x		Scale(%pc),%fp0		# may cause underflow
	bra		t_catch2
# the '040 package did this apparently to see if the dst operand for the 
# preceding fmul was a denorm. but, it better not have been since the 
# algorithm just got done playing with fp0 and expected no exceptions
# as a result. trust me...
#	bra		t_avoid_unsupp		# check for denorm as a
#						;result of the scaling

Finish:
	mov.b		&FMOV_OP,%d1		# last inst is MOVE
	fmov.x		%fp0,%fp0		# capture exceptions & round
	bra		t_catch2

Rem_is_0:
#..R = 2^(-j)X - Q Y = Y, thus R = 0 and quotient = 2^j (Q+1)
	addq.l		&1,%d3
	cmp.l		%d0,&8			# D0 is j 
	bge.b		Q_Big

	lsl.l		%d0,%d3
	bra.b		Set_R_0

Q_Big:
	clr.l		%d3

Set_R_0:
	fmov.s		&0x00000000,%fp0
	clr.b		Sc_Flag(%a6)
	bra.w		Fix_Sign

Tie_Case:
#..Check parity of Q
	mov.l		%d3,%d6
	and.l		&0x00000001,%d6
	tst.l		%d6
	beq.w		Fix_Sign		# Q is even

#..Q is odd, Q := Q + 1, signX := -signX
	addq.l		&1,%d3
	mov.w		SignX(%a6),%d6
	eor.l		&0x00008000,%d6
	mov.w		%d6,SignX(%a6)
	bra.w		Fix_Sign

#########################################################################
# XDEF ****************************************************************	#
# 	tag(): return the optype of the input ext fp number		#
#									#
#	This routine is used by the 060FPLSP.				#
#									#
# XREF ****************************************************************	#
#	None								#
#									#
# INPUT ***************************************************************	#
#	a0 = pointer to extended precision operand			#
# 									#
# OUTPUT **************************************************************	#
#	d0 = value of type tag						#
# 		one of: NORM, INF, QNAN, SNAN, DENORM, ZERO		#
#									#
# ALGORITHM ***********************************************************	#
#	Simply test the exponent, j-bit, and mantissa values to 	#
# determine the type of operand.					#
#	If it's an unnormalized zero, alter the operand and force it	#
# to be a normal zero.							#
#									#
#########################################################################

	global		tag
tag:
	mov.w		FTEMP_EX(%a0), %d0	# extract exponent
	andi.w		&0x7fff, %d0		# strip off sign
	cmpi.w		%d0, &0x7fff		# is (EXP == MAX)?
	beq.b		inf_or_nan_x
not_inf_or_nan_x:
	btst		&0x7,FTEMP_HI(%a0)
	beq.b		not_norm_x
is_norm_x:
	mov.b		&NORM, %d0
	rts
not_norm_x:
	tst.w		%d0			# is exponent = 0?
	bne.b		is_unnorm_x
not_unnorm_x:
	tst.l		FTEMP_HI(%a0)
	bne.b		is_denorm_x
	tst.l		FTEMP_LO(%a0)
	bne.b		is_denorm_x
is_zero_x:
	mov.b		&ZERO, %d0
	rts
is_denorm_x:
	mov.b		&DENORM, %d0
	rts
is_unnorm_x:
	bsr.l		unnorm_fix		# convert to norm,denorm,or zero
	rts
is_unnorm_reg_x:
	mov.b		&UNNORM, %d0
	rts
inf_or_nan_x:
	tst.l		FTEMP_LO(%a0)
	bne.b		is_nan_x
	mov.l		FTEMP_HI(%a0), %d0
	and.l		&0x7fffffff, %d0	# msb is a don't care!
	bne.b		is_nan_x
is_inf_x:
	mov.b		&INF, %d0
	rts
is_nan_x:
	mov.b		&QNAN, %d0
	rts

#############################################################

qnan:	long		0x7fff0000, 0xffffffff, 0xffffffff

#########################################################################
# XDEF ****************************************************************	#
#	t_dz(): Handle 060FPLSP dz exception for "flogn" emulation.	#
#	t_dz2(): Handle 060FPLSP dz exception for "fatanh" emulation.	#
#									#
#	These rouitnes are used by the 060FPLSP package.		#
#									#
# XREF ****************************************************************	#
#	None								#
#									#
# INPUT ***************************************************************	#
#	a0 = pointer to extended precision source operand.		#
# 									#
# OUTPUT **************************************************************	#
#	fp0 = default DZ result.					#
#									#
# ALGORITHM ***********************************************************	#
#	Transcendental emulation for the 060FPLSP has detected that 	#
# a DZ exception should occur for the instruction. If DZ is disabled,	#
# return the default result.						#
# 	If DZ is enabled, the dst operand should be returned unscathed	#
# in fp0 while fp1 is used to create a DZ exception so that the		#
# operating system can log that such an event occurred.			#
#									#
#########################################################################

	global		t_dz
t_dz:
	tst.b		SRC_EX(%a0)		# check sign for neg or pos
	bpl.b		dz_pinf			# branch if pos sign

	global		t_dz2
t_dz2:
	ori.l		&dzinf_mask+neg_mask,USER_FPSR(%a6) # set N/I/DZ/ADZ

	btst		&dz_bit,FPCR_ENABLE(%a6)
	bne.b		dz_minf_ena

# dz is disabled. return a -INF.
	fmov.s		&0xff800000,%fp0	# return -INF
	rts

# dz is enabled. create a dz exception so the user can record it
# but use fp1 instead. return the dst operand unscathed in fp0.
dz_minf_ena:
	fmovm.x		EXC_FP0(%a6),&0x80	# return fp0 unscathed
	fmov.l		USER_FPCR(%a6),%fpcr
	fmov.s		&0xbf800000,%fp1	# load -1
	fdiv.s		&0x00000000,%fp1	# -1 / 0
	rts

dz_pinf:
	ori.l		&dzinf_mask,USER_FPSR(%a6) # set I/DZ/ADZ

	btst		&dz_bit,FPCR_ENABLE(%a6)
	bne.b		dz_pinf_ena

# dz is disabled. return a +INF.
	fmov.s		&0x7f800000,%fp0	# return +INF
	rts

# dz is enabled. create a dz exception so the user can record it
# but use fp1 instead. return the dst operand unscathed in fp0.
dz_pinf_ena:
	fmovm.x		EXC_FP0(%a6),&0x80	# return fp0 unscathed
	fmov.l		USER_FPCR(%a6),%fpcr
	fmov.s		&0x3f800000,%fp1	# load +1
	fdiv.s		&0x00000000,%fp1	# +1 / 0
	rts

#########################################################################
# XDEF ****************************************************************	#
#	t_operr(): Handle 060FPLSP OPERR exception during emulation.	#
#									#
#	This routine is used by the 060FPLSP package.			#
#									#
# XREF ****************************************************************	#
#	None.								#
#									#
# INPUT ***************************************************************	#
#	fp1 = source operand						#
# 									#
# OUTPUT **************************************************************	#
#	fp0 = default result						#
#	fp1 = unchanged							#
#									#
# ALGORITHM ***********************************************************	#
#	An operand error should occur as the result of transcendental	#
# emulation in the 060FPLSP. If OPERR is disabled, just return a NAN	#
# in fp0. If OPERR is enabled, return the dst operand unscathed in fp0	#
# and the source operand in fp1. Use fp2 to create an OPERR exception	#
# so that the operating system can log the event.			#
#									#
#########################################################################

	global		t_operr
t_operr:
	ori.l		&opnan_mask,USER_FPSR(%a6) # set NAN/OPERR/AIOP

	btst		&operr_bit,FPCR_ENABLE(%a6)
	bne.b		operr_ena

# operr is disabled. return a QNAN in fp0
	fmovm.x		qnan(%pc),&0x80		# return QNAN
	rts

# operr is enabled. create an operr exception so the user can record it
# but use fp2 instead. return the dst operand unscathed in fp0.
operr_ena:
	fmovm.x		EXC_FP0(%a6),&0x80	# return fp0 unscathed
	fmov.l		USER_FPCR(%a6),%fpcr	
	fmovm.x		&0x04,-(%sp)		# save fp2
	fmov.s		&0x7f800000,%fp2	# load +INF
	fmul.s		&0x00000000,%fp2	# +INF x 0
	fmovm.x		(%sp)+,&0x20		# restore fp2
	rts

pls_huge:
	long		0x7ffe0000,0xffffffff,0xffffffff
mns_huge:
	long		0xfffe0000,0xffffffff,0xffffffff
pls_tiny:
	long		0x00000000,0x80000000,0x00000000
mns_tiny:
	long		0x80000000,0x80000000,0x00000000

#########################################################################
# XDEF ****************************************************************	#
#	t_unfl(): Handle 060FPLSP underflow exception during emulation.	#
#	t_unfl2(): Handle 060FPLSP underflow exception during		#
#	           emulation. result always positive.			#
#									#
#	This routine is used by the 060FPLSP package.			#
#									#
# XREF ****************************************************************	#
#	None.								#
#									#
# INPUT ***************************************************************	#
#	a0 = pointer to extended precision source operand		#
# 									#
# OUTPUT **************************************************************	#
#	fp0 = default underflow result					#
#									#
# ALGORITHM ***********************************************************	#
#	An underflow should occur as the result of transcendental	#
# emulation in the 060FPLSP. Create an underflow by using "fmul"	#
# and two very small numbers of appropriate sign so the operating	#
# system can log the event.						#
#									#
#########################################################################

	global		t_unfl
t_unfl:
	tst.b		SRC_EX(%a0)
	bpl.b		unf_pos

	global		t_unfl2
t_unfl2:
	ori.l		&unfinx_mask+neg_mask,USER_FPSR(%a6) # set N/UNFL/INEX2/AUNFL/AINEX

	fmov.l		USER_FPCR(%a6),%fpcr
	fmovm.x		mns_tiny(%pc),&0x80
	fmul.x		pls_tiny(%pc),%fp0

	fmov.l		%fpsr,%d0
	rol.l		&0x8,%d0
	mov.b		%d0,FPSR_CC(%a6)
	rts
unf_pos:
	ori.w		&unfinx_mask,FPSR_EXCEPT(%a6) # set UNFL/INEX2/AUNFL/AINEX

	fmov.l		USER_FPCR(%a6),%fpcr
	fmovm.x		pls_tiny(%pc),&0x80
	fmul.x		%fp0,%fp0

	fmov.l		%fpsr,%d0
	rol.l		&0x8,%d0
	mov.b		%d0,FPSR_CC(%a6)
	rts

#########################################################################
# XDEF ****************************************************************	#
#	t_ovfl(): Handle 060FPLSP overflow exception during emulation.	#
#		  (monadic)						#
#	t_ovfl2(): Handle 060FPLSP overflow exception during		#
#	           emulation. result always positive. (dyadic)		#
#	t_ovfl_sc(): Handle 060FPLSP overflow exception during 		#
#	             emulation for "fscale". 				#
#									#
#	This routine is used by the 060FPLSP package.			#
#									#
# XREF ****************************************************************	#
#	None.								#
#									#
# INPUT ***************************************************************	#
#	a0 = pointer to extended precision source operand		#
# 									#
# OUTPUT **************************************************************	#
#	fp0 = default underflow result					#
#									#
# ALGORITHM ***********************************************************	#
#	An overflow should occur as the result of transcendental	#
# emulation in the 060FPLSP. Create an overflow by using "fmul"		#
# and two very lareg numbers of appropriate sign so the operating	#
# system can log the event.						#
#	For t_ovfl_sc() we take special care not to lose the INEX2 bit.	#
#									#
#########################################################################

	global		t_ovfl_sc
t_ovfl_sc:
	ori.l		&ovfl_inx_mask,USER_FPSR(%a6) # set OVFL/AOVFL/AINEX

	mov.b		%d0,%d1			# fetch rnd prec,mode
	andi.b		&0xc0,%d1		# extract prec
	beq.w		ovfl_work

# dst op is a DENORM. we have to normalize the mantissa to see if the
# result would be inexact for the given precision. make a copy of the
# dst so we don't screw up the version passed to us.
	mov.w		LOCAL_EX(%a0),FP_SCR0_EX(%a6)
	mov.l		LOCAL_HI(%a0),FP_SCR0_HI(%a6)
	mov.l		LOCAL_LO(%a0),FP_SCR0_LO(%a6)
	lea		FP_SCR0(%a6),%a0	# pass ptr to FP_SCR0
	movm.l		&0xc080,-(%sp)		# save d0-d1/a0
	bsr.l		norm			# normalize mantissa
	movm.l		(%sp)+,&0x0103		# restore d0-d1/a0

	cmpi.b		%d1,&0x40		# is precision sgl?
	bne.b		ovfl_sc_dbl		# no; dbl
ovfl_sc_sgl:
	tst.l		LOCAL_LO(%a0)		# is lo lw of sgl set?
	bne.b		ovfl_sc_inx		# yes
	tst.b		3+LOCAL_HI(%a0)		# is lo byte of hi lw set?
	bne.b		ovfl_sc_inx		# yes
	bra.w		ovfl_work		# don't set INEX2
ovfl_sc_dbl:
	mov.l		LOCAL_LO(%a0),%d1	# are any of lo 11 bits of
	andi.l		&0x7ff,%d1		# dbl mantissa set?
	beq.w		ovfl_work		# no; don't set INEX2
ovfl_sc_inx:
	ori.l		&inex2_mask,USER_FPSR(%a6) # set INEX2
	bra.b		ovfl_work		# continue

	global		t_ovfl
t_ovfl:
	ori.w		&ovfinx_mask,FPSR_EXCEPT(%a6) # set OVFL/INEX2/AOVFL/AINEX
ovfl_work:
	tst.b		SRC_EX(%a0)
	bpl.b		ovfl_p
ovfl_m:
	fmov.l		USER_FPCR(%a6),%fpcr
	fmovm.x		mns_huge(%pc),&0x80
	fmul.x		pls_huge(%pc),%fp0

	fmov.l		%fpsr,%d0
	rol.l		&0x8,%d0
	ori.b		&neg_mask,%d0
	mov.b		%d0,FPSR_CC(%a6)
	rts
ovfl_p:
	fmov.l		USER_FPCR(%a6),%fpcr
	fmovm.x		pls_huge(%pc),&0x80
	fmul.x		pls_huge(%pc),%fp0

	fmov.l		%fpsr,%d0
	rol.l		&0x8,%d0
	mov.b		%d0,FPSR_CC(%a6)
	rts

	global		t_ovfl2
t_ovfl2:
	ori.w		&ovfinx_mask,FPSR_EXCEPT(%a6) # set OVFL/INEX2/AOVFL/AINEX
	fmov.l		USER_FPCR(%a6),%fpcr
	fmovm.x		pls_huge(%pc),&0x80
	fmul.x		pls_huge(%pc),%fp0

	fmov.l		%fpsr,%d0
	rol.l		&0x8,%d0
	mov.b		%d0,FPSR_CC(%a6)
	rts

#########################################################################
# XDEF ****************************************************************	#
#	t_catch(): Handle 060FPLSP OVFL,UNFL,or INEX2 exception during	#
#		   emulation.						#
#	t_catch2(): Handle 060FPLSP OVFL,UNFL,or INEX2 exception during	#
#		    emulation.						#
#									#
#	These routines are used by the 060FPLSP package.		#
#									#
# XREF ****************************************************************	#
#	None.								#
#									#
# INPUT ***************************************************************	#
#	fp0 = default underflow or overflow result			#
# 									#
# OUTPUT **************************************************************	#
#	fp0 = default result						#
#									#
# ALGORITHM ***********************************************************	#
# 	If an overflow or underflow occurred during the last 		#
# instruction of transcendental 060FPLSP emulation, then it has already	#
# occurred and has been logged. Now we need to see if an inexact	#
# exception should occur.						#
#									#
#########################################################################

	global		t_catch2
t_catch2:
	fmov.l		%fpsr,%d0
	or.l		%d0,USER_FPSR(%a6)
	bra.b		inx2_work

	global		t_catch
t_catch:
	fmov.l		%fpsr,%d0
	or.l		%d0,USER_FPSR(%a6)

#########################################################################
# XDEF ****************************************************************	#
#	t_inx2(): Handle inexact 060FPLSP exception during emulation.	#
#	t_pinx2(): Handle inexact 060FPLSP exception for "+" results.	#
#	t_minx2(): Handle inexact 060FPLSP exception for "-" results.	#
#									#
# XREF ****************************************************************	#
#	None.								#
#									#
# INPUT ***************************************************************	#
#	fp0 = default result						#
# 									#
# OUTPUT **************************************************************	#
#	fp0 = default result						#
#									#
# ALGORITHM ***********************************************************	#
# 	The last instruction of transcendental emulation for the 	#
# 060FPLSP should be inexact. So, if inexact is enabled, then we create	#
# the event here by adding a large and very small number together	#
# so that the operating system can log the event.			#
# 	Must check, too, if the result was zero, in which case we just	#
# set the FPSR bits and return.						#
#									#
#########################################################################

	global		t_inx2
t_inx2:
	fblt.w		t_minx2
	fbeq.w		inx2_zero

	global		t_pinx2
t_pinx2:
	ori.w		&inx2a_mask,FPSR_EXCEPT(%a6) # set INEX2/AINEX
	bra.b		inx2_work

	global		t_minx2
t_minx2:
	ori.l		&inx2a_mask+neg_mask,USER_FPSR(%a6)

inx2_work:
	btst		&inex2_bit,FPCR_ENABLE(%a6) # is inexact enabled?
	bne.b		inx2_work_ena		# yes
	rts	
inx2_work_ena:
	fmov.l		USER_FPCR(%a6),%fpcr	# insert user's exceptions
	fmov.s		&0x3f800000,%fp1	# load +1
	fadd.x		pls_tiny(%pc),%fp1	# cause exception
	rts

inx2_zero:
	mov.b		&z_bmask,FPSR_CC(%a6)
	ori.w		&inx2a_mask,2+USER_FPSR(%a6) # set INEX/AINEX
	rts

#########################################################################
# XDEF ****************************************************************	#
#	t_extdnrm(): Handle DENORM inputs in 060FPLSP.			#
#	t_resdnrm(): Handle DENORM inputs in 060FPLSP for "fscale".	#
#									#
#	This routine is used by the 060FPLSP package.			#
#									#
# XREF ****************************************************************	#
#	None.								#
#									#
# INPUT ***************************************************************	#
#	a0 = pointer to extended precision input operand		#
# 									#
# OUTPUT **************************************************************	#
#	fp0 = default result						#
#									#
# ALGORITHM ***********************************************************	#
#	For all functions that have a denormalized input and that	#
# f(x)=x, this is the entry point.					#
#	DENORM value is moved using "fmove" which triggers an exception	#
# if enabled so the operating system can log the event.			#
#									#
#########################################################################

	global		t_extdnrm
t_extdnrm:
	fmov.l		USER_FPCR(%a6),%fpcr
	fmov.x		SRC_EX(%a0),%fp0
	fmov.l		%fpsr,%d0
	ori.l		&unfinx_mask,%d0
	or.l		%d0,USER_FPSR(%a6)
	rts

	global		t_resdnrm
t_resdnrm:
	fmov.l		USER_FPCR(%a6),%fpcr
	fmov.x		SRC_EX(%a0),%fp0
	fmov.l		%fpsr,%d0
	or.l		%d0,USER_FPSR(%a6)
	rts

##########################################

#
# sto_cos:
# 	This is used by fsincos library emulation. The correct
# values are already in fp0 and fp1 so we do nothing here.
#
	global		sto_cos
sto_cos:
	rts

##########################################

#
#	dst_qnan --- force result when destination is a NaN
#
	global		dst_qnan
dst_qnan:
	fmov.x		DST(%a1),%fp0
	tst.b		DST_EX(%a1)
	bmi.b		dst_qnan_m
dst_qnan_p:
	mov.b		&nan_bmask,FPSR_CC(%a6)
	rts
dst_qnan_m:
	mov.b		&nan_bmask+neg_bmask,FPSR_CC(%a6)
	rts

#
#	src_qnan --- force result when source is a NaN
#
	global		src_qnan
src_qnan:
	fmov.x		SRC(%a0),%fp0
	tst.b		SRC_EX(%a0)
	bmi.b		src_qnan_m
src_qnan_p:
	mov.b		&nan_bmask,FPSR_CC(%a6)
	rts
src_qnan_m:
	mov.b		&nan_bmask+neg_bmask,FPSR_CC(%a6)
	rts

##########################################

#
#	Native instruction support
#
#	Some systems may need entry points even for 68060 native
#	instructions.  These routines are provided for
#	convenience.
#
	global		_fadds_
_fadds_:
	fmov.l		%fpcr,-(%sp)		# save fpcr
	fmov.l		&0x00000000,%fpcr	# clear fpcr for load
	fmov.s		0x8(%sp),%fp0		# load sgl dst
	fmov.l		(%sp)+,%fpcr		# restore fpcr
	fadd.s		0x8(%sp),%fp0		# fadd w/ sgl src
	rts

	global		_faddd_
_faddd_:
	fmov.l		%fpcr,-(%sp)		# save fpcr
	fmov.l		&0x00000000,%fpcr	# clear fpcr for load
	fmov.d		0x8(%sp),%fp0		# load dbl dst
	fmov.l		(%sp)+,%fpcr		# restore fpcr
	fadd.d		0xc(%sp),%fp0		# fadd w/ dbl src
	rts

	global		_faddx_
_faddx_:
	fmovm.x		0x4(%sp),&0x80		# load ext dst
	fadd.x		0x10(%sp),%fp0		# fadd w/ ext src
	rts

	global		_fsubs_
_fsubs_:
	fmov.l		%fpcr,-(%sp)		# save fpcr
	fmov.l		&0x00000000,%fpcr	# clear fpcr for load
	fmov.s		0x8(%sp),%fp0		# load sgl dst
	fmov.l		(%sp)+,%fpcr		# restore fpcr
	fsub.s		0x8(%sp),%fp0		# fsub w/ sgl src
	rts

	global		_fsubd_
_fsubd_:
	fmov.l		%fpcr,-(%sp)		# save fpcr
	fmov.l		&0x00000000,%fpcr	# clear fpcr for load
	fmov.d		0x8(%sp),%fp0		# load dbl dst
	fmov.l		(%sp)+,%fpcr		# restore fpcr
	fsub.d		0xc(%sp),%fp0		# fsub w/ dbl src
	rts

	global		_fsubx_
_fsubx_:
	fmovm.x		0x4(%sp),&0x80		# load ext dst
	fsub.x		0x10(%sp),%fp0		# fsub w/ ext src
	rts

	global		_fmuls_
_fmuls_:
	fmov.l		%fpcr,-(%sp)		# save fpcr
	fmov.l		&0x00000000,%fpcr	# clear fpcr for load
	fmov.s		0x8(%sp),%fp0		# load sgl dst
	fmov.l		(%sp)+,%fpcr		# restore fpcr
	fmul.s		0x8(%sp),%fp0		# fmul w/ sgl src
	rts

	global		_fmuld_
_fmuld_:
	fmov.l		%fpcr,-(%sp)		# save fpcr
	fmov.l		&0x00000000,%fpcr	# clear fpcr for load
	fmov.d		0x8(%sp),%fp0		# load dbl dst
	fmov.l		(%sp)+,%fpcr		# restore fpcr
	fmul.d		0xc(%sp),%fp0		# fmul w/ dbl src
	rts

	global		_fmulx_
_fmulx_:
	fmovm.x		0x4(%sp),&0x80		# load ext dst
	fmul.x		0x10(%sp),%fp0		# fmul w/ ext src
	rts

	global		_fdivs_
_fdivs_:
	fmov.l		%fpcr,-(%sp)		# save fpcr
	fmov.l		&0x00000000,%fpcr	# clear fpcr for load
	fmov.s		0x8(%sp),%fp0		# load sgl dst
	fmov.l		(%sp)+,%fpcr		# restore fpcr
	fdiv.s		0x8(%sp),%fp0		# fdiv w/ sgl src
	rts

	global		_fdivd_
_fdivd_:
	fmov.l		%fpcr,-(%sp)		# save fpcr
	fmov.l		&0x00000000,%fpcr	# clear fpcr for load
	fmov.d		0x8(%sp),%fp0		# load dbl dst
	fmov.l		(%sp)+,%fpcr		# restore fpcr
	fdiv.d		0xc(%sp),%fp0		# fdiv w/ dbl src
	rts

	global		_fdivx_
_fdivx_:
	fmovm.x		0x4(%sp),&0x80		# load ext dst
	fdiv.x		0x10(%sp),%fp0		# fdiv w/ ext src
	rts

	global		_fabss_
_fabss_:
	fabs.s		0x4(%sp),%fp0		# fabs w/ sgl src
	rts

	global		_fabsd_
_fabsd_:
	fabs.d		0x4(%sp),%fp0		# fabs w/ dbl src
	rts

	global		_fabsx_
_fabsx_:
	fabs.x		0x4(%sp),%fp0		# fabs w/ ext src
	rts

	global		_fnegs_
_fnegs_:
	fneg.s		0x4(%sp),%fp0		# fneg w/ sgl src
	rts

	global		_fnegd_
_fnegd_:
	fneg.d		0x4(%sp),%fp0		# fneg w/ dbl src
	rts

	global		_fnegx_
_fnegx_:
	fneg.x		0x4(%sp),%fp0		# fneg w/ ext src
	rts

	global		_fsqrts_
_fsqrts_:
	fsqrt.s		0x4(%sp),%fp0		# fsqrt w/ sgl src
	rts

	global		_fsqrtd_
_fsqrtd_:
	fsqrt.d		0x4(%sp),%fp0		# fsqrt w/ dbl src
	rts

	global		_fsqrtx_
_fsqrtx_:
	fsqrt.x		0x4(%sp),%fp0		# fsqrt w/ ext src
	rts

	global		_fints_
_fints_:
	fint.s		0x4(%sp),%fp0		# fint w/ sgl src
	rts

	global		_fintd_
_fintd_:
	fint.d		0x4(%sp),%fp0		# fint w/ dbl src
	rts

	global		_fintx_
_fintx_:
	fint.x		0x4(%sp),%fp0		# fint w/ ext src
	rts

	global		_fintrzs_
_fintrzs_:
	fintrz.s	0x4(%sp),%fp0		# fintrz w/ sgl src
	rts

	global		_fintrzd_
_fintrzd_:
	fintrz.d	0x4(%sp),%fp0		# fintrx w/ dbl src
	rts

	global		_fintrzx_
_fintrzx_:
	fintrz.x	0x4(%sp),%fp0		# fintrz w/ ext src
	rts

########################################################################

#########################################################################
# src_zero(): Return signed zero according to sign of src operand.	#
#########################################################################
	global		src_zero
src_zero:
	tst.b		SRC_EX(%a0)		# get sign of src operand
	bmi.b		ld_mzero		# if neg, load neg zero

#
# ld_pzero(): return a positive zero.
#
	global		ld_pzero
ld_pzero:
	fmov.s		&0x00000000,%fp0	# load +0
	mov.b		&z_bmask,FPSR_CC(%a6)	# set 'Z' ccode bit
	rts

# ld_mzero(): return a negative zero.
	global		ld_mzero
ld_mzero:
	fmov.s		&0x80000000,%fp0	# load -0
	mov.b		&neg_bmask+z_bmask,FPSR_CC(%a6) # set 'N','Z' ccode bits
	rts

#########################################################################
# dst_zero(): Return signed zero according to sign of dst operand.	#
#########################################################################
	global		dst_zero
dst_zero:
	tst.b		DST_EX(%a1) 		# get sign of dst operand
	bmi.b		ld_mzero		# if neg, load neg zero
	bra.b		ld_pzero		# load positive zero

#########################################################################
# src_inf(): Return signed inf according to sign of src operand.	#
#########################################################################
	global		src_inf
src_inf:
	tst.b		SRC_EX(%a0) 		# get sign of src operand
	bmi.b		ld_minf			# if negative branch

#
# ld_pinf(): return a positive infinity.
#
	global		ld_pinf
ld_pinf:
	fmov.s		&0x7f800000,%fp0	# load +INF
	mov.b		&inf_bmask,FPSR_CC(%a6)	# set 'INF' ccode bit
	rts

#
# ld_minf():return a negative infinity.
#
	global		ld_minf
ld_minf:
	fmov.s		&0xff800000,%fp0	# load -INF
	mov.b		&neg_bmask+inf_bmask,FPSR_CC(%a6) # set 'N','I' ccode bits
	rts

#########################################################################
# dst_inf(): Return signed inf according to sign of dst operand.	#
#########################################################################
	global		dst_inf
dst_inf:
	tst.b		DST_EX(%a1) 		# get sign of dst operand
	bmi.b		ld_minf			# if negative branch
	bra.b		ld_pinf

	global		szr_inf
#################################################################
# szr_inf(): Return +ZERO for a negative src operand or		#
#	            +INF for a positive src operand.		#
#	     Routine used for fetox, ftwotox, and ftentox.	#
#################################################################
szr_inf:
	tst.b		SRC_EX(%a0)		# check sign of source
	bmi.b		ld_pzero
	bra.b		ld_pinf

#########################################################################
# sopr_inf(): Return +INF for a positive src operand or			#
#	      jump to operand error routine for a negative src operand.	#
#	      Routine used for flogn, flognp1, flog10, and flog2.	#
#########################################################################
	global		sopr_inf
sopr_inf:
	tst.b		SRC_EX(%a0)		# check sign of source
	bmi.w		t_operr
	bra.b		ld_pinf

#################################################################
# setoxm1i(): Return minus one for a negative src operand or	#
#	      positive infinity for a positive src operand.	#
#	      Routine used for fetoxm1.				#
#################################################################
	global		setoxm1i
setoxm1i:
	tst.b		SRC_EX(%a0)		# check sign of source
	bmi.b		ld_mone
	bra.b		ld_pinf

#########################################################################
# src_one(): Return signed one according to sign of src operand.	#
#########################################################################
	global		src_one
src_one:
	tst.b		SRC_EX(%a0) 		# check sign of source
	bmi.b		ld_mone

#
# ld_pone(): return positive one.
#
	global		ld_pone
ld_pone:
	fmov.s		&0x3f800000,%fp0	# load +1
	clr.b		FPSR_CC(%a6)
	rts

#
# ld_mone(): return negative one.
#
	global		ld_mone
ld_mone:
	fmov.s		&0xbf800000,%fp0	# load -1
	mov.b		&neg_bmask,FPSR_CC(%a6)	# set 'N' ccode bit
	rts

ppiby2:	long		0x3fff0000, 0xc90fdaa2, 0x2168c235
mpiby2:	long		0xbfff0000, 0xc90fdaa2, 0x2168c235

#################################################################
# spi_2(): Return signed PI/2 according to sign of src operand.	#
#################################################################
	global		spi_2
spi_2:
	tst.b		SRC_EX(%a0) 		# check sign of source
	bmi.b		ld_mpi2

#
# ld_ppi2(): return positive PI/2.
#
	global		ld_ppi2
ld_ppi2:
	fmov.l		%d0,%fpcr
	fmov.x		ppiby2(%pc),%fp0	# load +pi/2
	bra.w		t_pinx2			# set INEX2

#
# ld_mpi2(): return negative PI/2.
#
	global		ld_mpi2
ld_mpi2:
	fmov.l		%d0,%fpcr
	fmov.x		mpiby2(%pc),%fp0	# load -pi/2
	bra.w		t_minx2			# set INEX2

####################################################
# The following routines give support for fsincos. #
####################################################

#
# ssincosz(): When the src operand is ZERO, store a one in the
# 	      cosine register and return a ZERO in fp0 w/ the same sign
#	      as the src operand.
#
	global		ssincosz
ssincosz:
	fmov.s		&0x3f800000,%fp1
	tst.b		SRC_EX(%a0)		# test sign
	bpl.b		sincoszp
	fmov.s		&0x80000000,%fp0	# return sin result in fp0
	mov.b		&z_bmask+neg_bmask,FPSR_CC(%a6)
	rts
sincoszp:
	fmov.s		&0x00000000,%fp0	# return sin result in fp0
	mov.b		&z_bmask,FPSR_CC(%a6)
	rts

#
# ssincosi(): When the src operand is INF, store a QNAN in the cosine
#	      register and jump to the operand error routine for negative
#	      src operands.
#
	global		ssincosi
ssincosi:
	fmov.x		qnan(%pc),%fp1		# load NAN
	bra.w		t_operr

#
# ssincosqnan(): When the src operand is a QNAN, store the QNAN in the cosine
# 		 register and branch to the src QNAN routine.
#
	global		ssincosqnan
ssincosqnan:
	fmov.x		LOCAL_EX(%a0),%fp1
	bra.w		src_qnan

########################################################################

	global		smod_sdnrm
	global		smod_snorm
smod_sdnrm:
smod_snorm:
	mov.b		DTAG(%a6),%d1
	beq.l		smod
	cmpi.b		%d1,&ZERO
	beq.w		smod_zro
	cmpi.b		%d1,&INF
	beq.l		t_operr
	cmpi.b		%d1,&DENORM
	beq.l		smod
	bra.l		dst_qnan

	global		smod_szero
smod_szero:
	mov.b		DTAG(%a6),%d1
	beq.l		t_operr
	cmpi.b		%d1,&ZERO
	beq.l		t_operr
	cmpi.b		%d1,&INF
	beq.l		t_operr
	cmpi.b		%d1,&DENORM
	beq.l		t_operr
	bra.l		dst_qnan

	global		smod_sinf
smod_sinf:
	mov.b		DTAG(%a6),%d1
	beq.l		smod_fpn
	cmpi.b		%d1,&ZERO
	beq.l		smod_zro
	cmpi.b		%d1,&INF
	beq.l		t_operr
	cmpi.b		%d1,&DENORM
	beq.l		smod_fpn
	bra.l		dst_qnan

smod_zro:
srem_zro:
	mov.b		SRC_EX(%a0),%d1		# get src sign
	mov.b		DST_EX(%a1),%d0		# get dst sign
	eor.b		%d0,%d1			# get qbyte sign
	andi.b		&0x80,%d1
	mov.b		%d1,FPSR_QBYTE(%a6)
	tst.b		%d0
	bpl.w		ld_pzero
	bra.w		ld_mzero

smod_fpn:
srem_fpn:
	clr.b		FPSR_QBYTE(%a6)
	mov.l		%d0,-(%sp)
	mov.b		SRC_EX(%a0),%d1		# get src sign
	mov.b		DST_EX(%a1),%d0		# get dst sign
	eor.b		%d0,%d1			# get qbyte sign
	andi.b		&0x80,%d1
	mov.b		%d1,FPSR_QBYTE(%a6)
	cmpi.b		DTAG(%a6),&DENORM
	bne.b		smod_nrm
	lea		DST(%a1),%a0
	mov.l		(%sp)+,%d0
	bra		t_resdnrm
smod_nrm:
	fmov.l		(%sp)+,%fpcr
	fmov.x		DST(%a1),%fp0
	tst.b		DST_EX(%a1)
	bmi.b		smod_nrm_neg
	rts

smod_nrm_neg:
	mov.b		&neg_bmask,FPSR_CC(%a6)	# set 'N' code
	rts

#########################################################################
	global		srem_snorm
	global		srem_sdnrm
srem_sdnrm:
srem_snorm:
	mov.b		DTAG(%a6),%d1
	beq.l		srem
	cmpi.b		%d1,&ZERO
	beq.w		srem_zro
	cmpi.b		%d1,&INF
	beq.l		t_operr
	cmpi.b		%d1,&DENORM
	beq.l		srem
	bra.l		dst_qnan

	global		srem_szero
srem_szero:
	mov.b		DTAG(%a6),%d1
	beq.l		t_operr
	cmpi.b		%d1,&ZERO
	beq.l		t_operr
	cmpi.b		%d1,&INF
	beq.l		t_operr
	cmpi.b		%d1,&DENORM
	beq.l		t_operr
	bra.l		dst_qnan

	global		srem_sinf
srem_sinf:
	mov.b		DTAG(%a6),%d1
	beq.w		srem_fpn
	cmpi.b		%d1,&ZERO
	beq.w		srem_zro
	cmpi.b		%d1,&INF
	beq.l		t_operr
	cmpi.b		%d1,&DENORM
	beq.l		srem_fpn
	bra.l		dst_qnan

#########################################################################

	global		sscale_snorm
	global		sscale_sdnrm
sscale_snorm:
sscale_sdnrm:
	mov.b		DTAG(%a6),%d1
	beq.l		sscale
	cmpi.b		%d1,&ZERO
	beq.l		dst_zero
	cmpi.b		%d1,&INF
	beq.l		dst_inf
	cmpi.b		%d1,&DENORM
	beq.l		sscale
	bra.l		dst_qnan

	global		sscale_szero
sscale_szero:
	mov.b		DTAG(%a6),%d1
	beq.l		sscale
	cmpi.b		%d1,&ZERO
	beq.l		dst_zero
	cmpi.b		%d1,&INF
	beq.l		dst_inf
	cmpi.b		%d1,&DENORM
	beq.l		sscale
	bra.l		dst_qnan

	global		sscale_sinf
sscale_sinf:
	mov.b		DTAG(%a6),%d1
	beq.l		t_operr
	cmpi.b		%d1,&QNAN
	beq.l		dst_qnan
	bra.l		t_operr

########################################################################

	global		sop_sqnan
sop_sqnan:
	mov.b		DTAG(%a6),%d1
	cmpi.b		%d1,&QNAN
	beq.l		dst_qnan
	bra.l		src_qnan

#########################################################################
# norm(): normalize the mantissa of an extended precision input. the	#
#	  input operand should not be normalized already.		#
#									#
# XDEF ****************************************************************	#
#	norm()								#
#									#
# XREF **************************************************************** #
#	none								#
#									#
# INPUT *************************************************************** #
#	a0 = pointer fp extended precision operand to normalize		#
#									#
# OUTPUT ************************************************************** #
# 	d0 = number of bit positions the mantissa was shifted		#
#	a0 = the input operand's mantissa is normalized; the exponent	#
#	     is unchanged.						#
#									#
#########################################################################
	global		norm
norm:
	mov.l		%d2, -(%sp)		# create some temp regs
	mov.l		%d3, -(%sp)

	mov.l		FTEMP_HI(%a0), %d0	# load hi(mantissa)
	mov.l		FTEMP_LO(%a0), %d1	# load lo(mantissa)

	bfffo		%d0{&0:&32}, %d2	# how many places to shift?
	beq.b		norm_lo			# hi(man) is all zeroes!

norm_hi:
	lsl.l		%d2, %d0		# left shift hi(man)
	bfextu		%d1{&0:%d2}, %d3	# extract lo bits

	or.l		%d3, %d0		# create hi(man)
	lsl.l		%d2, %d1		# create lo(man)

	mov.l		%d0, FTEMP_HI(%a0)	# store new hi(man)
	mov.l		%d1, FTEMP_LO(%a0)	# store new lo(man)

	mov.l		%d2, %d0		# return shift amount
	
	mov.l		(%sp)+, %d3		# restore temp regs
	mov.l		(%sp)+, %d2

	rts

norm_lo:
	bfffo		%d1{&0:&32}, %d2	# how many places to shift?
	lsl.l		%d2, %d1		# shift lo(man)
	add.l		&32, %d2		# add 32 to shft amount

	mov.l		%d1, FTEMP_HI(%a0)	# store hi(man)
	clr.l		FTEMP_LO(%a0)		# lo(man) is now zero

	mov.l		%d2, %d0		# return shift amount
	
	mov.l		(%sp)+, %d3		# restore temp regs
	mov.l		(%sp)+, %d2

	rts

#########################################################################
# unnorm_fix(): - changes an UNNORM to one of NORM, DENORM, or ZERO	#
#		- returns corresponding optype tag			#
#									#
# XDEF ****************************************************************	#
#	unnorm_fix()							#
#									#
# XREF **************************************************************** #
#	norm() - normalize the mantissa					#
#									#
# INPUT *************************************************************** #
#	a0 = pointer to unnormalized extended precision number		#
#									#
# OUTPUT ************************************************************** #
#	d0 = optype tag - is corrected to one of NORM, DENORM, or ZERO	#
#	a0 = input operand has been converted to a norm, denorm, or	#
#	     zero; both the exponent and mantissa are changed.		#
#									#
#########################################################################

	global		unnorm_fix
unnorm_fix:
	bfffo		FTEMP_HI(%a0){&0:&32}, %d0 # how many shifts are needed?
	bne.b		unnorm_shift		# hi(man) is not all zeroes

#
# hi(man) is all zeroes so see if any bits in lo(man) are set
#
unnorm_chk_lo:
	bfffo		FTEMP_LO(%a0){&0:&32}, %d0 # is operand really a zero?
	beq.w		unnorm_zero		# yes

	add.w		&32, %d0		# no; fix shift distance

#
# d0 = # shifts needed for complete normalization
#
unnorm_shift:
	clr.l		%d1			# clear top word
	mov.w		FTEMP_EX(%a0), %d1	# extract exponent
	and.w		&0x7fff, %d1		# strip off sgn

	cmp.w		%d0, %d1		# will denorm push exp < 0?
	bgt.b		unnorm_nrm_zero		# yes; denorm only until exp = 0

#
# exponent would not go < 0. therefore, number stays normalized
#
	sub.w		%d0, %d1		# shift exponent value
	mov.w		FTEMP_EX(%a0), %d0	# load old exponent
	and.w		&0x8000, %d0		# save old sign
	or.w		%d0, %d1		# {sgn,new exp}
	mov.w		%d1, FTEMP_EX(%a0)	# insert new exponent

	bsr.l		norm			# normalize UNNORM

	mov.b		&NORM, %d0		# return new optype tag
	rts

#
# exponent would go < 0, so only denormalize until exp = 0
#
unnorm_nrm_zero:
	cmp.b		%d1, &32		# is exp <= 32?
	bgt.b		unnorm_nrm_zero_lrg	# no; go handle large exponent

	bfextu		FTEMP_HI(%a0){%d1:&32}, %d0 # extract new hi(man)
	mov.l		%d0, FTEMP_HI(%a0)	# save new hi(man)

	mov.l		FTEMP_LO(%a0), %d0	# fetch old lo(man)
	lsl.l		%d1, %d0		# extract new lo(man)
	mov.l		%d0, FTEMP_LO(%a0)	# save new lo(man)

	and.w		&0x8000, FTEMP_EX(%a0)	# set exp = 0

	mov.b		&DENORM, %d0		# return new optype tag
	rts

#
# only mantissa bits set are in lo(man)
#
unnorm_nrm_zero_lrg:
	sub.w		&32, %d1		# adjust shft amt by 32

	mov.l		FTEMP_LO(%a0), %d0	# fetch old lo(man)
	lsl.l		%d1, %d0		# left shift lo(man)

	mov.l		%d0, FTEMP_HI(%a0)	# store new hi(man)
	clr.l		FTEMP_LO(%a0)		# lo(man) = 0

	and.w		&0x8000, FTEMP_EX(%a0)	# set exp = 0

	mov.b		&DENORM, %d0		# return new optype tag
	rts

#
# whole mantissa is zero so this UNNORM is actually a zero
#
unnorm_zero:
	and.w		&0x8000, FTEMP_EX(%a0) 	# force exponent to zero

	mov.b		&ZERO, %d0		# fix optype tag
	rts
~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
MOTOROLA MICROPROCESSOR & MEMORY TECHNOLOGY GROUP
M68000 Hi-Performance Microprocessor Division
M68060 Software Package
Production Release P1.00 -- October 10, 1994

M68060 Software Package Copyright � 1993, 1994 Motorola Inc.  All rights reserved.
 
THE SOFTWARE is provided on an "AS IS" basis and without warranty.
To the maximum extent permitted by applicable law,
MOTOROLA DISCLAIMS ALL WARRANTIES WHETHER EXPRESS OR IMPLIED, 
INCLUDING IMPLIED WARRANTIES OF MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE
and any warranty against infringement with regard to the SOFTWARE
(INCLUDING ANY MODIFIED VERSIONS THEREOF) and any accompanying written materials.

To the maximum extent permitted by applicable law,
IN NO EVENT SHALL MOTOROLA BE LIABLE FOR ANY DAMAGES WHATSOEVER
(INCLUDING WITHOUT LIMITATION, DAMAGES FOR LOSS OF BUSINESS PROFITS,
BUSINESS INTERRUPTION, LOSS OF BUSINESS INFORMATION, OR OTHER PECUNIARY LOSS)
ARISING OF THE USE OR INABILITY TO USE THE SOFTWARE.
Motorola assumes no responsibility for the maintenance and support of the SOFTWARE.

You are hereby granted a copyright license to use, modify, and distribute the SOFTWARE
so long as this entire notice is retained without alteration in any modified and/or
redistributed versions, and that such modified versions are clearly identified as such.
No licenses are granted by implication, estoppel or otherwise under any patents
or trademarks of Motorola, Inc.
~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
#
# freal.s:
#	This file is appended to the top of the 060FPSP package
# and contains the entry points into the package. The user, in
# effect, branches to one of the branch table entries located
# after _060FPSP_TABLE.
#	Also, subroutine stubs exist in this file (_fpsp_done for
# example) that are referenced by the FPSP package itself in order
# to call a given routine. The stub routine actually performs the
# callout. The FPSP code does a "bsr" to the stub routine. This
# extra layer of hierarchy adds a slight performance penalty but
# it makes the FPSP code easier to read and more mainatinable.
#

set	_off_bsun,	0x00
set	_off_snan,	0x04
set	_off_operr,	0x08
set	_off_ovfl,	0x0c
set	_off_unfl,	0x10
set	_off_dz,	0x14
set	_off_inex,	0x18
set	_off_fline,	0x1c
set	_off_fpu_dis,	0x20
set	_off_trap,	0x24
set	_off_trace,	0x28
set	_off_access,	0x2c
set	_off_done,	0x30

set	_off_imr,	0x40
set	_off_dmr,	0x44
set	_off_dmw,	0x48
set	_off_irw,	0x4c
set	_off_irl,	0x50
set	_off_drb,	0x54
set	_off_drw,	0x58
set	_off_drl,	0x5c
set	_off_dwb,	0x60
set	_off_dww,	0x64
set	_off_dwl,	0x68

_060FPSP_TABLE:

###############################################################

# Here's the table of ENTRY POINTS for those linking the package.
	bra.l		_fpsp_snan
	short		0x0000
	bra.l		_fpsp_operr
	short		0x0000
	bra.l		_fpsp_ovfl
	short		0x0000
	bra.l		_fpsp_unfl
	short		0x0000
	bra.l		_fpsp_dz
	short		0x0000
	bra.l		_fpsp_inex
	short		0x0000
	bra.l		_fpsp_fline
	short		0x0000
	bra.l		_fpsp_unsupp
	short		0x0000
	bra.l		_fpsp_effadd
	short		0x0000

	space 		56

###############################################################
	global		_fpsp_done
_fpsp_done:
	mov.l		%d0,-(%sp)
	mov.l		(_060FPSP_TABLE-0x80+_off_done,%pc),%d0
	pea.l		(_060FPSP_TABLE-0x80,%pc,%d0)
	mov.l		0x4(%sp),%d0
	rtd		&0x4

	global		_real_ovfl
_real_ovfl:
	mov.l		%d0,-(%sp)
	mov.l		(_060FPSP_TABLE-0x80+_off_ovfl,%pc),%d0
	pea.l		(_060FPSP_TABLE-0x80,%pc,%d0)
	mov.l		0x4(%sp),%d0
	rtd		&0x4

	global		_real_unfl
_real_unfl:
	mov.l		%d0,-(%sp)
	mov.l		(_060FPSP_TABLE-0x80+_off_unfl,%pc),%d0
	pea.l		(_060FPSP_TABLE-0x80,%pc,%d0)
	mov.l		0x4(%sp),%d0
	rtd		&0x4

	global		_real_inex
_real_inex:
	mov.l		%d0,-(%sp)
	mov.l		(_060FPSP_TABLE-0x80+_off_inex,%pc),%d0
	pea.l		(_060FPSP_TABLE-0x80,%pc,%d0)
	mov.l		0x4(%sp),%d0
	rtd		&0x4

	global		_real_bsun
_real_bsun:
	mov.l		%d0,-(%sp)
	mov.l		(_060FPSP_TABLE-0x80+_off_bsun,%pc),%d0
	pea.l		(_060FPSP_TABLE-0x80,%pc,%d0)
	mov.l		0x4(%sp),%d0
	rtd		&0x4

	global		_real_operr
_real_operr:
	mov.l		%d0,-(%sp)
	mov.l		(_060FPSP_TABLE-0x80+_off_operr,%pc),%d0
	pea.l		(_060FPSP_TABLE-0x80,%pc,%d0)
	mov.l		0x4(%sp),%d0
	rtd		&0x4

	global		_real_snan
_real_snan:
	mov.l		%d0,-(%sp)
	mov.l		(_060FPSP_TABLE-0x80+_off_snan,%pc),%d0
	pea.l		(_060FPSP_TABLE-0x80,%pc,%d0)
	mov.l		0x4(%sp),%d0
	rtd		&0x4

	global		_real_dz
_real_dz:
	mov.l		%d0,-(%sp)
	mov.l		(_060FPSP_TABLE-0x80+_off_dz,%pc),%d0
	pea.l		(_060FPSP_TABLE-0x80,%pc,%d0)
	mov.l		0x4(%sp),%d0
	rtd		&0x4

	global		_real_fline
_real_fline:
	mov.l		%d0,-(%sp)
	mov.l		(_060FPSP_TABLE-0x80+_off_fline,%pc),%d0
	pea.l		(_060FPSP_TABLE-0x80,%pc,%d0)
	mov.l		0x4(%sp),%d0
	rtd		&0x4

	global		_real_fpu_disabled
_real_fpu_disabled:
	mov.l		%d0,-(%sp)
	mov.l		(_060FPSP_TABLE-0x80+_off_fpu_dis,%pc),%d0
	pea.l		(_060FPSP_TABLE-0x80,%pc,%d0)
	mov.l		0x4(%sp),%d0
	rtd		&0x4

	global		_real_trap
_real_trap:
	mov.l		%d0,-(%sp)
	mov.l		(_060FPSP_TABLE-0x80+_off_trap,%pc),%d0
	pea.l		(_060FPSP_TABLE-0x80,%pc,%d0)
	mov.l		0x4(%sp),%d0
	rtd		&0x4

	global		_real_trace
_real_trace:
	mov.l		%d0,-(%sp)
	mov.l		(_060FPSP_TABLE-0x80+_off_trace,%pc),%d0
	pea.l		(_060FPSP_TABLE-0x80,%pc,%d0)
	mov.l		0x4(%sp),%d0
	rtd		&0x4

	global		_real_access
_real_access:
	mov.l		%d0,-(%sp)
	mov.l		(_060FPSP_TABLE-0x80+_off_access,%pc),%d0
	pea.l		(_060FPSP_TABLE-0x80,%pc,%d0)
	mov.l		0x4(%sp),%d0
	rtd		&0x4

#######################################

	global		_imem_read
_imem_read:
	mov.l		%d0,-(%sp)
	mov.l		(_060FPSP_TABLE-0x80+_off_imr,%pc),%d0
	pea.l		(_060FPSP_TABLE-0x80,%pc,%d0)
	mov.l		0x4(%sp),%d0
	rtd		&0x4

	global		_dmem_read
_dmem_read:
	mov.l		%d0,-(%sp)
	mov.l		(_060FPSP_TABLE-0x80+_off_dmr,%pc),%d0
	pea.l		(_060FPSP_TABLE-0x80,%pc,%d0)
	mov.l		0x4(%sp),%d0
	rtd		&0x4

	global		_dmem_write
_dmem_write:
	mov.l		%d0,-(%sp)
	mov.l		(_060FPSP_TABLE-0x80+_off_dmw,%pc),%d0
	pea.l		(_060FPSP_TABLE-0x80,%pc,%d0)
	mov.l		0x4(%sp),%d0
	rtd		&0x4

	global		_imem_read_word
_imem_read_word:
	mov.l		%d0,-(%sp)
	mov.l		(_060FPSP_TABLE-0x80+_off_irw,%pc),%d0
	pea.l		(_060FPSP_TABLE-0x80,%pc,%d0)
	mov.l		0x4(%sp),%d0
	rtd		&0x4

	global		_imem_read_long
_imem_read_long:
	mov.l		%d0,-(%sp)
	mov.l		(_060FPSP_TABLE-0x80+_off_irl,%pc),%d0
	pea.l		(_060FPSP_TABLE-0x80,%pc,%d0)
	mov.l		0x4(%sp),%d0
	rtd		&0x4

	global		_dmem_read_byte
_dmem_read_byte:
	mov.l		%d0,-(%sp)
	mov.l		(_060FPSP_TABLE-0x80+_off_drb,%pc),%d0
	pea.l		(_060FPSP_TABLE-0x80,%pc,%d0)
	mov.l		0x4(%sp),%d0
	rtd		&0x4

	global		_dmem_read_word
_dmem_read_word:
	mov.l		%d0,-(%sp)
	mov.l		(_060FPSP_TABLE-0x80+_off_drw,%pc),%d0
	pea.l		(_060FPSP_TABLE-0x80,%pc,%d0)
	mov.l		0x4(%sp),%d0
	rtd		&0x4

	global		_dmem_read_long
_dmem_read_long:
	mov.l		%d0,-(%sp)
	mov.l		(_060FPSP_TABLE-0x80+_off_drl,%pc),%d0
	pea.l		(_060FPSP_TABLE-0x80,%pc,%d0)
	mov.l		0x4(%sp),%d0
	rtd		&0x4

	global		_dmem_write_byte
_dmem_write_byte:
	mov.l		%d0,-(%sp)
	mov.l		(_060FPSP_TABLE-0x80+_off_dwb,%pc),%d0
	pea.l		(_060FPSP_TABLE-0x80,%pc,%d0)
	mov.l		0x4(%sp),%d0
	rtd		&0x4

	global		_dmem_write_word
_dmem_write_word:
	mov.l		%d0,-(%sp)
	mov.l		(_060FPSP_TABLE-0x80+_off_dww,%pc),%d0
	pea.l		(_060FPSP_TABLE-0x80,%pc,%d0)
	mov.l		0x4(%sp),%d0
	rtd		&0x4

	global		_dmem_write_long
_dmem_write_long:
	mov.l		%d0,-(%sp)
	mov.l		(_060FPSP_TABLE-0x80+_off_dwl,%pc),%d0
	pea.l		(_060FPSP_TABLE-0x80,%pc,%d0)
	mov.l		0x4(%sp),%d0
	rtd		&0x4

#
# This file contains a set of define statements for constants
# in order to promote readability within the corecode itself.
#

set LOCAL_SIZE,		192			# stack frame size(bytes)
set LV,			-LOCAL_SIZE		# stack offset

set EXC_SR,		0x4			# stack status register
set EXC_PC,		0x6			# stack pc
set EXC_VOFF,		0xa			# stacked vector offset
set EXC_EA,		0xc			# stacked <ea>

set EXC_FP,		0x0			# frame pointer

set EXC_AREGS,		-68			# offset of all address regs
set EXC_DREGS,		-100			# offset of all data regs
set EXC_FPREGS,		-36			# offset of all fp regs

set EXC_A7,		EXC_AREGS+(7*4)		# offset of saved a7
set OLD_A7,		EXC_AREGS+(6*4)		# extra copy of saved a7
set EXC_A6,		EXC_AREGS+(6*4)		# offset of saved a6
set EXC_A5,		EXC_AREGS+(5*4)
set EXC_A4,		EXC_AREGS+(4*4)
set EXC_A3,		EXC_AREGS+(3*4)
set EXC_A2,		EXC_AREGS+(2*4)
set EXC_A1,		EXC_AREGS+(1*4)
set EXC_A0,		EXC_AREGS+(0*4)
set EXC_D7,		EXC_DREGS+(7*4)
set EXC_D6,		EXC_DREGS+(6*4)
set EXC_D5,		EXC_DREGS+(5*4)
set EXC_D4,		EXC_DREGS+(4*4)
set EXC_D3,		EXC_DREGS+(3*4)
set EXC_D2,		EXC_DREGS+(2*4)
set EXC_D1,		EXC_DREGS+(1*4)
set EXC_D0,		EXC_DREGS+(0*4)

set EXC_FP0, 		EXC_FPREGS+(0*12)	# offset of saved fp0
set EXC_FP1, 		EXC_FPREGS+(1*12)	# offset of saved fp1
set EXC_FP2, 		EXC_FPREGS+(2*12)	# offset of saved fp2 (not used)

set FP_SCR1, 		LV+80			# fp scratch 1
set FP_SCR1_EX, 	FP_SCR1+0
set FP_SCR1_SGN,	FP_SCR1+2
set FP_SCR1_HI, 	FP_SCR1+4
set FP_SCR1_LO, 	FP_SCR1+8

set FP_SCR0, 		LV+68			# fp scratch 0
set FP_SCR0_EX, 	FP_SCR0+0
set FP_SCR0_SGN,	FP_SCR0+2
set FP_SCR0_HI, 	FP_SCR0+4
set FP_SCR0_LO, 	FP_SCR0+8

set FP_DST, 		LV+56			# fp destination operand
set FP_DST_EX, 		FP_DST+0
set FP_DST_SGN,		FP_DST+2
set FP_DST_HI, 		FP_DST+4
set FP_DST_LO, 		FP_DST+8

set FP_SRC, 		LV+44			# fp source operand
set FP_SRC_EX, 		FP_SRC+0
set FP_SRC_SGN,		FP_SRC+2
set FP_SRC_HI, 		FP_SRC+4
set FP_SRC_LO, 		FP_SRC+8

set USER_FPIAR,		LV+40			# FP instr address register

set USER_FPSR,		LV+36			# FP status register
set FPSR_CC,		USER_FPSR+0		# FPSR condition codes
set FPSR_QBYTE,		USER_FPSR+1		# FPSR qoutient byte
set FPSR_EXCEPT,	USER_FPSR+2		# FPSR exception status byte
set FPSR_AEXCEPT,	USER_FPSR+3		# FPSR accrued exception byte

set USER_FPCR,		LV+32			# FP control register
set FPCR_ENABLE,	USER_FPCR+2		# FPCR exception enable
set FPCR_MODE,		USER_FPCR+3		# FPCR rounding mode control

set L_SCR3,		LV+28			# integer scratch 3
set L_SCR2,		LV+24			# integer scratch 2
set L_SCR1,		LV+20			# integer scratch 1

set STORE_FLG,		LV+19			# flag: operand store (ie. not fcmp/ftst)

set EXC_TEMP2,		LV+24			# temporary space
set EXC_TEMP,		LV+16			# temporary space

set DTAG,		LV+15			# destination operand type
set STAG, 		LV+14			# source operand type

set SPCOND_FLG,		LV+10			# flag: special case (see below)

set EXC_CC,		LV+8			# saved condition codes
set EXC_EXTWPTR,	LV+4			# saved current PC (active)
set EXC_EXTWORD,	LV+2			# saved extension word
set EXC_CMDREG,		LV+2			# saved extension word
set EXC_OPWORD,		LV+0			# saved operation word

################################

# Helpful macros

set FTEMP,		0			# offsets within an
set FTEMP_EX, 		0			# extended precision
set FTEMP_SGN,		2			# value saved in memory.
set FTEMP_HI, 		4
set FTEMP_LO, 		8
set FTEMP_GRS,		12

set LOCAL,		0			# offsets within an
set LOCAL_EX, 		0			# extended precision 
set LOCAL_SGN,		2			# value saved in memory.
set LOCAL_HI, 		4
set LOCAL_LO, 		8
set LOCAL_GRS,		12

set DST,		0			# offsets within an
set DST_EX,		0			# extended precision
set DST_HI,		4			# value saved in memory.
set DST_LO,		8

set SRC,		0			# offsets within an
set SRC_EX,		0			# extended precision
set SRC_HI,		4			# value saved in memory.
set SRC_LO,		8

set SGL_LO,		0x3f81			# min sgl prec exponent
set SGL_HI,		0x407e			# max sgl prec exponent
set DBL_LO,		0x3c01			# min dbl prec exponent
set DBL_HI,		0x43fe			# max dbl prec exponent
set EXT_LO,		0x0			# min ext prec exponent
set EXT_HI,		0x7ffe			# max ext prec exponent

set EXT_BIAS,		0x3fff			# extended precision bias
set SGL_BIAS,		0x007f			# single precision bias
set DBL_BIAS,		0x03ff			# double precision bias

set NORM,		0x00			# operand type for STAG/DTAG
set ZERO,		0x01			# operand type for STAG/DTAG
set INF,		0x02			# operand type for STAG/DTAG
set QNAN,		0x03			# operand type for STAG/DTAG
set DENORM,		0x04			# operand type for STAG/DTAG
set SNAN,		0x05			# operand type for STAG/DTAG
set UNNORM,		0x06			# operand type for STAG/DTAG

##################
# FPSR/FPCR bits #
##################
set neg_bit,		0x3			# negative result
set z_bit,		0x2			# zero result
set inf_bit,		0x1			# infinite result
set nan_bit,		0x0			# NAN result

set q_sn_bit,		0x7			# sign bit of quotient byte

set bsun_bit,		7			# branch on unordered
set snan_bit,		6			# signalling NAN
set operr_bit,		5			# operand error
set ovfl_bit,		4			# overflow
set unfl_bit,		3			# underflow
set dz_bit,		2			# divide by zero
set inex2_bit,		1			# inexact result 2
set inex1_bit,		0			# inexact result 1

set aiop_bit,		7			# accrued inexact operation bit
set aovfl_bit,		6			# accrued overflow bit
set aunfl_bit,		5			# accrued underflow bit
set adz_bit,		4			# accrued dz bit
set ainex_bit,		3			# accrued inexact bit

#############################
# FPSR individual bit masks #
#############################
set neg_mask,		0x08000000		# negative bit mask (lw)
set inf_mask,		0x02000000		# infinity bit mask (lw)
set z_mask,		0x04000000		# zero bit mask (lw)
set nan_mask,		0x01000000		# nan bit mask (lw)

set neg_bmask,		0x08			# negative bit mask (byte)
set inf_bmask,		0x02			# infinity bit mask (byte)
set z_bmask,		0x04			# zero bit mask (byte)
set nan_bmask,		0x01			# nan bit mask (byte)

set bsun_mask,		0x00008000		# bsun exception mask
set snan_mask,		0x00004000		# snan exception mask
set operr_mask,		0x00002000		# operr exception mask
set ovfl_mask,		0x00001000		# overflow exception mask
set unfl_mask,		0x00000800		# underflow exception mask
set dz_mask,		0x00000400		# dz exception mask
set inex2_mask,		0x00000200		# inex2 exception mask
set inex1_mask,		0x00000100		# inex1 exception mask

set aiop_mask,		0x00000080		# accrued illegal operation
set aovfl_mask,		0x00000040		# accrued overflow
set aunfl_mask,		0x00000020		# accrued underflow
set adz_mask,		0x00000010		# accrued divide by zero
set ainex_mask,		0x00000008		# accrued inexact

######################################
# FPSR combinations used in the FPSP #
######################################
set dzinf_mask,		inf_mask+dz_mask+adz_mask
set opnan_mask,		nan_mask+operr_mask+aiop_mask
set nzi_mask,		0x01ffffff 		#clears N, Z, and I
set unfinx_mask,	unfl_mask+inex2_mask+aunfl_mask+ainex_mask
set unf2inx_mask,	unfl_mask+inex2_mask+ainex_mask
set ovfinx_mask,	ovfl_mask+inex2_mask+aovfl_mask+ainex_mask
set inx1a_mask,		inex1_mask+ainex_mask
set inx2a_mask,		inex2_mask+ainex_mask
set snaniop_mask, 	nan_mask+snan_mask+aiop_mask
set snaniop2_mask,	snan_mask+aiop_mask
set naniop_mask,	nan_mask+aiop_mask
set neginf_mask,	neg_mask+inf_mask
set infaiop_mask, 	inf_mask+aiop_mask
set negz_mask,		neg_mask+z_mask
set opaop_mask,		operr_mask+aiop_mask
set unfl_inx_mask,	unfl_mask+aunfl_mask+ainex_mask
set ovfl_inx_mask,	ovfl_mask+aovfl_mask+ainex_mask

#########
# misc. #
#########
set rnd_stky_bit,	29			# stky bit pos in longword

set sign_bit,		0x7			# sign bit
set signan_bit,		0x6			# signalling nan bit

set sgl_thresh,		0x3f81			# minimum sgl exponent
set dbl_thresh,		0x3c01			# minimum dbl exponent

set x_mode,		0x0			# extended precision
set s_mode,		0x4			# single precision
set d_mode,		0x8			# double precision

set rn_mode,		0x0			# round-to-nearest
set rz_mode,		0x1			# round-to-zero
set rm_mode,		0x2			# round-tp-minus-infinity
set rp_mode,		0x3			# round-to-plus-infinity

set mantissalen,	64			# length of mantissa in bits

set BYTE,		1			# len(byte) == 1 byte
set WORD, 		2			# len(word) == 2 bytes
set LONG, 		4			# len(longword) == 2 bytes

set BSUN_VEC,		0xc0			# bsun    vector offset
set INEX_VEC,		0xc4			# inexact vector offset
set DZ_VEC,		0xc8			# dz      vector offset
set UNFL_VEC,		0xcc			# unfl    vector offset
set OPERR_VEC,		0xd0			# operr   vector offset
set OVFL_VEC,		0xd4			# ovfl    vector offset
set SNAN_VEC,		0xd8			# snan    vector offset

###########################
# SPecial CONDition FLaGs #
###########################
set ftrapcc_flg,	0x01			# flag bit: ftrapcc exception
set fbsun_flg,		0x02			# flag bit: bsun exception
set mia7_flg,		0x04			# flag bit: (a7)+ <ea>
set mda7_flg,		0x08			# flag bit: -(a7) <ea>
set fmovm_flg,		0x40			# flag bit: fmovm instruction
set immed_flg,		0x80			# flag bit: &<data> <ea>

set ftrapcc_bit,	0x0
set fbsun_bit,		0x1
set mia7_bit,		0x2
set mda7_bit,		0x3
set immed_bit,		0x7

##################################
# TRANSCENDENTAL "LAST-OP" FLAGS #
##################################
set FMUL_OP,		0x0			# fmul instr performed last
set FDIV_OP,		0x1			# fdiv performed last
set FADD_OP,		0x2			# fadd performed last
set FMOV_OP,		0x3			# fmov performed last

#############
# CONSTANTS #
#############
T1:	long		0x40C62D38,0xD3D64634	# 16381 LOG2 LEAD
T2:	long		0x3D6F90AE,0xB1E75CC7	# 16381 LOG2 TRAIL

PI:	long		0x40000000,0xC90FDAA2,0x2168C235,0x00000000
PIBY2:	long		0x3FFF0000,0xC90FDAA2,0x2168C235,0x00000000

TWOBYPI:
	long		0x3FE45F30,0x6DC9C883

#########################################################################
# XDEF ****************************************************************	#
#	_fpsp_ovfl(): 060FPSP entry point for FP Overflow exception.	#
#									#
#	This handler should be the first code executed upon taking the	#
#	FP Overflow exception in an operating system.			#
#									#
# XREF ****************************************************************	#
#	_imem_read_long() - read instruction longword			#
#	fix_skewed_ops() - adjust src operand in fsave frame		#
#	set_tag_x() - determine optype of src/dst operands		#
#	store_fpreg() - store opclass 0 or 2 result to FP regfile	#
#	unnorm_fix() - change UNNORM operands to NORM or ZERO		#
#	load_fpn2() - load dst operand from FP regfile			#
#	fout() - emulate an opclass 3 instruction			#
#	tbl_unsupp - add of table of emulation routines for opclass 0,2	#
#	_fpsp_done() - "callout" for 060FPSP exit (all work done!)	#
#	_real_ovfl() - "callout" for Overflow exception enabled code	#
#	_real_inex() - "callout" for Inexact exception enabled code	#
#	_real_trace() - "callout" for Trace exception code		#
#									#
# INPUT ***************************************************************	#
#	- The system stack contains the FP Ovfl exception stack frame	#
#	- The fsave frame contains the source operand			#
# 									#
# OUTPUT **************************************************************	#
#	Overflow Exception enabled:					#
#	- The system stack is unchanged					#
#	- The fsave frame contains the adjusted src op for opclass 0,2	#
#	Overflow Exception disabled:					#
#	- The system stack is unchanged					#
#	- The "exception present" flag in the fsave frame is cleared	#
#									#
# ALGORITHM ***********************************************************	#
#	On the 060, if an FP overflow is present as the result of any	#
# instruction, the 060 will take an overflow exception whether the 	#
# exception is enabled or disabled in the FPCR. For the disabled case, 	#
# This handler emulates the instruction to determine what the correct	#
# default result should be for the operation. This default result is	#
# then stored in either the FP regfile, data regfile, or memory. 	#
# Finally, the handler exits through the "callout" _fpsp_done() 	#
# denoting that no exceptional conditions exist within the machine.	#
# 	If the exception is enabled, then this handler must create the	#
# exceptional operand and plave it in the fsave state frame, and store	#
# the default result (only if the instruction is opclass 3). For 	#
# exceptions enabled, this handler must exit through the "callout" 	#
# _real_ovfl() so that the operating system enabled overflow handler	#
# can handle this case.							#
#	Two other conditions exist. First, if overflow was disabled 	#
# but the inexact exception was enabled, this handler must exit 	#
# through the "callout" _real_inex() regardless of whether the result	#
# was inexact.								#
#	Also, in the case of an opclass three instruction where 	#
# overflow was disabled and the trace exception was enabled, this	#
# handler must exit through the "callout" _real_trace().		#
#									#
#########################################################################

	global		_fpsp_ovfl
_fpsp_ovfl:

#$#	sub.l		&24,%sp			# make room for src/dst

	link.w		%a6,&-LOCAL_SIZE	# init stack frame

	fsave		FP_SRC(%a6)		# grab the "busy" frame

 	movm.l		&0x0303,EXC_DREGS(%a6)	# save d0-d1/a0-a1
	fmovm.l		%fpcr,%fpsr,%fpiar,USER_FPCR(%a6) # save ctrl regs
 	fmovm.x		&0xc0,EXC_FPREGS(%a6)	# save fp0-fp1 on stack

# the FPIAR holds the "current PC" of the faulting instruction
	mov.l		USER_FPIAR(%a6),EXC_EXTWPTR(%a6)
	mov.l		EXC_EXTWPTR(%a6),%a0	# fetch instruction addr
	addq.l		&0x4,EXC_EXTWPTR(%a6)	# incr instruction ptr
	bsr.l		_imem_read_long		# fetch the instruction words
	mov.l		%d0,EXC_OPWORD(%a6)

##############################################################################

	btst		&0x5,EXC_CMDREG(%a6)	# is instr an fmove out?
	bne.w		fovfl_out


	lea		FP_SRC(%a6),%a0		# pass: ptr to src op
	bsr.l		fix_skewed_ops		# fix src op

# since, I believe, only NORMs and DENORMs can come through here,
# maybe we can avoid the subroutine call.
	lea		FP_SRC(%a6),%a0		# pass: ptr to src op
	bsr.l		set_tag_x		# tag the operand type
	mov.b		%d0,STAG(%a6)		# maybe NORM,DENORM

# bit five of the fp extension word separates the monadic and dyadic operations 
# that can pass through fpsp_ovfl(). remember that fcmp, ftst, and fsincos
# will never take this exception.
	btst		&0x5,1+EXC_CMDREG(%a6)	# is operation monadic or dyadic?
	beq.b		fovfl_extract		# monadic

	bfextu		EXC_CMDREG(%a6){&6:&3},%d0 # dyadic; load dst reg
	bsr.l		load_fpn2		# load dst into FP_DST

	lea		FP_DST(%a6),%a0		# pass: ptr to dst op
	bsr.l		set_tag_x		# tag the operand type
	cmpi.b		%d0,&UNNORM		# is operand an UNNORM?
	bne.b		fovfl_op2_done		# no
	bsr.l		unnorm_fix		# yes; convert to NORM,DENORM,or ZERO
fovfl_op2_done:
	mov.b		%d0,DTAG(%a6)		# save dst optype tag

fovfl_extract:

#$#	mov.l		FP_SRC_EX(%a6),TRAP_SRCOP_EX(%a6)
#$#	mov.l		FP_SRC_HI(%a6),TRAP_SRCOP_HI(%a6)
#$#	mov.l		FP_SRC_LO(%a6),TRAP_SRCOP_LO(%a6)
#$#	mov.l		FP_DST_EX(%a6),TRAP_DSTOP_EX(%a6)
#$#	mov.l		FP_DST_HI(%a6),TRAP_DSTOP_HI(%a6)
#$#	mov.l		FP_DST_LO(%a6),TRAP_DSTOP_LO(%a6)

	clr.l		%d0
	mov.b		FPCR_MODE(%a6),%d0	# pass rnd prec/mode

	mov.b		1+EXC_CMDREG(%a6),%d1
	andi.w		&0x007f,%d1		# extract extension

	andi.l		&0x00ff01ff,USER_FPSR(%a6) # zero all but accured field

	fmov.l		&0x0,%fpcr		# zero current control regs
	fmov.l		&0x0,%fpsr

	lea		FP_SRC(%a6),%a0
	lea		FP_DST(%a6),%a1

# maybe we can make these entry points ONLY the OVFL entry points of each routine.
	mov.l		(tbl_unsupp.l,%pc,%d1.w*4),%d1 # fetch routine addr
	jsr		(tbl_unsupp.l,%pc,%d1.l*1)

# the operation has been emulated. the result is in fp0.
# the EXOP, if an exception occurred, is in fp1.
# we must save the default result regardless of whether
# traps are enabled or disabled.
	bfextu		EXC_CMDREG(%a6){&6:&3},%d0
	bsr.l		store_fpreg

# the exceptional possibilities we have left ourselves with are ONLY overflow
# and inexact. and, the inexact is such that overflow occurred and was disabled
# but inexact was enabled.
	btst		&ovfl_bit,FPCR_ENABLE(%a6)
	bne.b		fovfl_ovfl_on

	btst		&inex2_bit,FPCR_ENABLE(%a6)
	bne.b		fovfl_inex_on

	fmovm.x		EXC_FPREGS(%a6),&0xc0	# restore fp0-fp1
	fmovm.l		USER_FPCR(%a6),%fpcr,%fpsr,%fpiar # restore ctrl regs
	movm.l		EXC_DREGS(%a6),&0x0303	# restore d0-d1/a0-a1

	unlk		%a6
#$#	add.l		&24,%sp
	bra.l		_fpsp_done

# overflow is enabled AND overflow, of course, occurred. so, we have the EXOP
# in fp1. now, simply jump to _real_ovfl()!
fovfl_ovfl_on:
	fmovm.x		&0x40,FP_SRC(%a6)	# save EXOP (fp1) to stack

	mov.w		&0xe005,2+FP_SRC(%a6) 	# save exc status

	fmovm.x		EXC_FPREGS(%a6),&0xc0	# restore fp0-fp1
	fmovm.l		USER_FPCR(%a6),%fpcr,%fpsr,%fpiar # restore ctrl regs
	movm.l		EXC_DREGS(%a6),&0x0303	# restore d0-d1/a0-a1

	frestore	FP_SRC(%a6)		# do this after fmovm,other f<op>s!

	unlk		%a6

	bra.l		_real_ovfl

# overflow occurred but is disabled. meanwhile, inexact is enabled. therefore,
# we must jump to real_inex().
fovfl_inex_on:

	fmovm.x		&0x40,FP_SRC(%a6) 	# save EXOP (fp1) to stack

	mov.b		&0xc4,1+EXC_VOFF(%a6)	# vector offset = 0xc4
	mov.w		&0xe001,2+FP_SRC(%a6) 	# save exc status

	fmovm.x		EXC_FPREGS(%a6),&0xc0	# restore fp0-fp1
	fmovm.l		USER_FPCR(%a6),%fpcr,%fpsr,%fpiar # restore ctrl regs
	movm.l		EXC_DREGS(%a6),&0x0303	# restore d0-d1/a0-a1

	frestore	FP_SRC(%a6)		# do this after fmovm,other f<op>s!

	unlk		%a6

	bra.l		_real_inex

########################################################################
fovfl_out:


#$#	mov.l		FP_SRC_EX(%a6),TRAP_SRCOP_EX(%a6)
#$#	mov.l		FP_SRC_HI(%a6),TRAP_SRCOP_HI(%a6)
#$#	mov.l		FP_SRC_LO(%a6),TRAP_SRCOP_LO(%a6)

# the src operand is definitely a NORM(!), so tag it as such
	mov.b		&NORM,STAG(%a6)		# set src optype tag

	clr.l		%d0
	mov.b		FPCR_MODE(%a6),%d0	# pass rnd prec/mode

	and.l		&0xffff00ff,USER_FPSR(%a6) # zero all but accured field

	fmov.l		&0x0,%fpcr		# zero current control regs
	fmov.l		&0x0,%fpsr

	lea		FP_SRC(%a6),%a0		# pass ptr to src operand

	bsr.l		fout

	btst		&ovfl_bit,FPCR_ENABLE(%a6)
	bne.w		fovfl_ovfl_on

	btst		&inex2_bit,FPCR_ENABLE(%a6)
	bne.w		fovfl_inex_on

	fmovm.x		EXC_FPREGS(%a6),&0xc0	# restore fp0-fp1
	fmovm.l		USER_FPCR(%a6),%fpcr,%fpsr,%fpiar # restore ctrl regs
	movm.l		EXC_DREGS(%a6),&0x0303	# restore d0-d1/a0-a1

	unlk		%a6
#$#	add.l		&24,%sp

	btst		&0x7,(%sp)		# is trace on?
	beq.l		_fpsp_done		# no

	fmov.l		%fpiar,0x8(%sp)		# "Current PC" is in FPIAR	
	mov.w		&0x2024,0x6(%sp)	# stk fmt = 0x2; voff = 0x024
	bra.l		_real_trace

#########################################################################
# XDEF ****************************************************************	#
#	_fpsp_unfl(): 060FPSP entry point for FP Underflow exception.	#
#									#
#	This handler should be the first code executed upon taking the	#
#	FP Underflow exception in an operating system.			#
#									#
# XREF ****************************************************************	#
#	_imem_read_long() - read instruction longword			#
#	fix_skewed_ops() - adjust src operand in fsave frame		#
#	set_tag_x() - determine optype of src/dst operands		#
#	store_fpreg() - store opclass 0 or 2 result to FP regfile	#
#	unnorm_fix() - change UNNORM operands to NORM or ZERO		#
#	load_fpn2() - load dst operand from FP regfile			#
#	fout() - emulate an opclass 3 instruction			#
#	tbl_unsupp - add of table of emulation routines for opclass 0,2	#
#	_fpsp_done() - "callout" for 060FPSP exit (all work done!)	#
#	_real_ovfl() - "callout" for Overflow exception enabled code	#
#	_real_inex() - "callout" for Inexact exception enabled code	#
#	_real_trace() - "callout" for Trace exception code		#
#									#
# INPUT ***************************************************************	#
#	- The system stack contains the FP Unfl exception stack frame	#
#	- The fsave frame contains the source operand			#
# 									#
# OUTPUT **************************************************************	#
#	Underflow Exception enabled:					#
#	- The system stack is unchanged					#
#	- The fsave frame contains the adjusted src op for opclass 0,2	#
#	Underflow Exception disabled:					#
#	- The system stack is unchanged					#
#	- The "exception present" flag in the fsave frame is cleared	#
#									#
# ALGORITHM ***********************************************************	#
#	On the 060, if an FP underflow is present as the result of any	#
# instruction, the 060 will take an underflow exception whether the 	#
# exception is enabled or disabled in the FPCR. For the disabled case, 	#
# This handler emulates the instruction to determine what the correct	#
# default result should be for the operation. This default result is	#
# then stored in either the FP regfile, data regfile, or memory. 	#
# Finally, the handler exits through the "callout" _fpsp_done() 	#
# denoting that no exceptional conditions exist within the machine.	#
# 	If the exception is enabled, then this handler must create the	#
# exceptional operand and plave it in the fsave state frame, and store	#
# the default result (only if the instruction is opclass 3). For 	#
# exceptions enabled, this handler must exit through the "callout" 	#
# _real_unfl() so that the operating system enabled overflow handler	#
# can handle this case.							#
#	Two other conditions exist. First, if underflow was disabled 	#
# but the inexact exception was enabled and the result was inexact, 	#
# this handler must exit through the "callout" _real_inex().		#
# was inexact.								#
#	Also, in the case of an opclass three instruction where 	#
# underflow was disabled and the trace exception was enabled, this	#
# handler must exit through the "callout" _real_trace().		#
#									#
#########################################################################

	global		_fpsp_unfl
_fpsp_unfl:

#$#	sub.l		&24,%sp			# make room for src/dst

	link.w		%a6,&-LOCAL_SIZE	# init stack frame

	fsave		FP_SRC(%a6)		# grab the "busy" frame

 	movm.l		&0x0303,EXC_DREGS(%a6)	# save d0-d1/a0-a1
	fmovm.l		%fpcr,%fpsr,%fpiar,USER_FPCR(%a6) # save ctrl regs
 	fmovm.x		&0xc0,EXC_FPREGS(%a6)	# save fp0-fp1 on stack

# the FPIAR holds the "current PC" of the faulting instruction
	mov.l		USER_FPIAR(%a6),EXC_EXTWPTR(%a6)	
	mov.l		EXC_EXTWPTR(%a6),%a0	# fetch instruction addr
	addq.l		&0x4,EXC_EXTWPTR(%a6)	# incr instruction ptr
	bsr.l		_imem_read_long		# fetch the instruction words
	mov.l		%d0,EXC_OPWORD(%a6)

##############################################################################

	btst		&0x5,EXC_CMDREG(%a6)	# is instr an fmove out?
	bne.w		funfl_out


	lea		FP_SRC(%a6),%a0		# pass: ptr to src op
	bsr.l		fix_skewed_ops		# fix src op

	lea		FP_SRC(%a6),%a0		# pass: ptr to src op
	bsr.l		set_tag_x		# tag the operand type
	mov.b		%d0,STAG(%a6)		# maybe NORM,DENORM

# bit five of the fp ext word separates the monadic and dyadic operations 
# that can pass through fpsp_unfl(). remember that fcmp, and ftst
# will never take this exception.
	btst		&0x5,1+EXC_CMDREG(%a6)	# is op monadic or dyadic?
	beq.b		funfl_extract		# monadic

# now, what's left that's not dyadic is fsincos. we can distinguish it 
# from all dyadics by the '0110xxx pattern
	btst		&0x4,1+EXC_CMDREG(%a6)	# is op an fsincos?
	bne.b		funfl_extract		# yes

	bfextu		EXC_CMDREG(%a6){&6:&3},%d0 # dyadic; load dst reg
	bsr.l		load_fpn2		# load dst into FP_DST

	lea		FP_DST(%a6),%a0		# pass: ptr to dst op
	bsr.l		set_tag_x		# tag the operand type
	cmpi.b		%d0,&UNNORM		# is operand an UNNORM?
	bne.b		funfl_op2_done		# no
	bsr.l		unnorm_fix		# yes; convert to NORM,DENORM,or ZERO
funfl_op2_done:
	mov.b		%d0,DTAG(%a6)		# save dst optype tag

funfl_extract:

#$#	mov.l		FP_SRC_EX(%a6),TRAP_SRCOP_EX(%a6)
#$#	mov.l		FP_SRC_HI(%a6),TRAP_SRCOP_HI(%a6)
#$#	mov.l		FP_SRC_LO(%a6),TRAP_SRCOP_LO(%a6)
#$#	mov.l		FP_DST_EX(%a6),TRAP_DSTOP_EX(%a6)
#$#	mov.l		FP_DST_HI(%a6),TRAP_DSTOP_HI(%a6)
#$#	mov.l		FP_DST_LO(%a6),TRAP_DSTOP_LO(%a6)

	clr.l		%d0
	mov.b		FPCR_MODE(%a6),%d0	# pass rnd prec/mode

	mov.b		1+EXC_CMDREG(%a6),%d1
	andi.w		&0x007f,%d1		# extract extension

	andi.l		&0x00ff01ff,USER_FPSR(%a6)

	fmov.l		&0x0,%fpcr		# zero current control regs
	fmov.l		&0x0,%fpsr

	lea		FP_SRC(%a6),%a0
	lea		FP_DST(%a6),%a1

# maybe we can make these entry points ONLY the OVFL entry points of each routine.
	mov.l		(tbl_unsupp.l,%pc,%d1.w*4),%d1 # fetch routine addr
	jsr		(tbl_unsupp.l,%pc,%d1.l*1)

	bfextu		EXC_CMDREG(%a6){&6:&3},%d0
	bsr.l		store_fpreg

# The `060 FPU multiplier hardware is such that if the result of a
# multiply operation is the smallest possible normalized number
# (0x00000000_80000000_00000000), then the machine will take an
# underflow exception. Since this is incorrect, we need to check
# if our emulation, after re-doing the operation, decided that
# no underflow was called for. We do these checks only in 
# funfl_{unfl,inex}_on() because w/ both exceptions disabled, this
# special case will simply exit gracefully with the correct result.

# the exceptional possibilities we have left ourselves with are ONLY overflow
# and inexact. and, the inexact is such that overflow occurred and was disabled
# but inexact was enabled.
	btst		&unfl_bit,FPCR_ENABLE(%a6)
	bne.b		funfl_unfl_on

funfl_chkinex:
	btst		&inex2_bit,FPCR_ENABLE(%a6)
	bne.b		funfl_inex_on

funfl_exit:
	fmovm.x		EXC_FPREGS(%a6),&0xc0	# restore fp0-fp1
	fmovm.l		USER_FPCR(%a6),%fpcr,%fpsr,%fpiar # restore ctrl regs
	movm.l		EXC_DREGS(%a6),&0x0303	# restore d0-d1/a0-a1

	unlk		%a6
#$#	add.l		&24,%sp
	bra.l		_fpsp_done

# overflow is enabled AND overflow, of course, occurred. so, we have the EXOP
# in fp1 (don't forget to save fp0). what to do now?
# well, we simply have to get to go to _real_unfl()!
funfl_unfl_on:

# The `060 FPU multiplier hardware is such that if the result of a
# multiply operation is the smallest possible normalized number
# (0x00000000_80000000_00000000), then the machine will take an
# underflow exception. Since this is incorrect, we check here to see
# if our emulation, after re-doing the operation, decided that
# no underflow was called for.
	btst		&unfl_bit,FPSR_EXCEPT(%a6)
	beq.w		funfl_chkinex

funfl_unfl_on2:
	fmovm.x		&0x40,FP_SRC(%a6)	# save EXOP (fp1) to stack

	mov.w		&0xe003,2+FP_SRC(%a6) 	# save exc status

	fmovm.x		EXC_FPREGS(%a6),&0xc0	# restore fp0-fp1
	fmovm.l		USER_FPCR(%a6),%fpcr,%fpsr,%fpiar # restore ctrl regs
	movm.l		EXC_DREGS(%a6),&0x0303	# restore d0-d1/a0-a1

	frestore	FP_SRC(%a6)		# do this after fmovm,other f<op>s!

	unlk		%a6

	bra.l		_real_unfl

# undeflow occurred but is disabled. meanwhile, inexact is enabled. therefore,
# we must jump to real_inex().
funfl_inex_on:

# The `060 FPU multiplier hardware is such that if the result of a
# multiply operation is the smallest possible normalized number
# (0x00000000_80000000_00000000), then the machine will take an
# underflow exception. 
# But, whether bogus or not, if inexact is enabled AND it occurred,
# then we have to branch to real_inex.

	btst		&inex2_bit,FPSR_EXCEPT(%a6)
	beq.w		funfl_exit

funfl_inex_on2:

	fmovm.x		&0x40,FP_SRC(%a6) 	# save EXOP to stack

	mov.b		&0xc4,1+EXC_VOFF(%a6)	# vector offset = 0xc4
	mov.w		&0xe001,2+FP_SRC(%a6) 	# save exc status

	fmovm.x		EXC_FPREGS(%a6),&0xc0	# restore fp0-fp1
	fmovm.l		USER_FPCR(%a6),%fpcr,%fpsr,%fpiar # restore ctrl regs
	movm.l		EXC_DREGS(%a6),&0x0303	# restore d0-d1/a0-a1

	frestore	FP_SRC(%a6)		# do this after fmovm,other f<op>s!

	unlk		%a6

	bra.l		_real_inex

#######################################################################
funfl_out:


#$#	mov.l		FP_SRC_EX(%a6),TRAP_SRCOP_EX(%a6)
#$#	mov.l		FP_SRC_HI(%a6),TRAP_SRCOP_HI(%a6)
#$#	mov.l		FP_SRC_LO(%a6),TRAP_SRCOP_LO(%a6)

# the src operand is definitely a NORM(!), so tag it as such
	mov.b		&NORM,STAG(%a6)		# set src optype tag

	clr.l		%d0
	mov.b		FPCR_MODE(%a6),%d0	# pass rnd prec/mode

	and.l		&0xffff00ff,USER_FPSR(%a6) # zero all but accured field

	fmov.l		&0x0,%fpcr		# zero current control regs
	fmov.l		&0x0,%fpsr

	lea		FP_SRC(%a6),%a0		# pass ptr to src operand

	bsr.l		fout

	btst		&unfl_bit,FPCR_ENABLE(%a6)
	bne.w		funfl_unfl_on2

	btst		&inex2_bit,FPCR_ENABLE(%a6)
	bne.w		funfl_inex_on2

	fmovm.x		EXC_FPREGS(%a6),&0xc0	# restore fp0-fp1
	fmovm.l		USER_FPCR(%a6),%fpcr,%fpsr,%fpiar # restore ctrl regs
	movm.l		EXC_DREGS(%a6),&0x0303	# restore d0-d1/a0-a1

	unlk		%a6
#$#	add.l		&24,%sp

	btst		&0x7,(%sp)		# is trace on?
	beq.l		_fpsp_done		# no

	fmov.l		%fpiar,0x8(%sp)		# "Current PC" is in FPIAR
	mov.w		&0x2024,0x6(%sp)	# stk fmt = 0x2; voff = 0x024
	bra.l		_real_trace

#########################################################################
# XDEF ****************************************************************	#
#	_fpsp_unsupp(): 060FPSP entry point for FP "Unimplemented	#
#		        Data Type" exception.				#
#									#
#	This handler should be the first code executed upon taking the	#
#	FP Unimplemented Data Type exception in an operating system.	#
#									#
# XREF ****************************************************************	#
#	_imem_read_{word,long}() - read instruction word/longword	#
#	fix_skewed_ops() - adjust src operand in fsave frame		#
#	set_tag_x() - determine optype of src/dst operands		#
#	store_fpreg() - store opclass 0 or 2 result to FP regfile	#
#	unnorm_fix() - change UNNORM operands to NORM or ZERO		#
#	load_fpn2() - load dst operand from FP regfile			#
#	load_fpn1() - load src operand from FP regfile			#
#	fout() - emulate an opclass 3 instruction			#
#	tbl_unsupp - add of table of emulation routines for opclass 0,2	#
#	_real_inex() - "callout" to operating system inexact handler	#
#	_fpsp_done() - "callout" for exit; work all done		#
#	_real_trace() - "callout" for Trace enabled exception		#
#	funimp_skew() - adjust fsave src ops to "incorrect" value	#
#	_real_snan() - "callout" for SNAN exception			#
#	_real_operr() - "callout" for OPERR exception			#
#	_real_ovfl() - "callout" for OVFL exception			#
#	_real_unfl() - "callout" for UNFL exception			#
#	get_packed() - fetch packed operand from memory			#
#									#
# INPUT ***************************************************************	#
#	- The system stack contains the "Unimp Data Type" stk frame	#
#	- The fsave frame contains the ssrc op (for UNNORM/DENORM)	#
# 									#
# OUTPUT **************************************************************	#
#	If Inexact exception (opclass 3):				#
#	- The system stack is changed to an Inexact exception stk frame	#
#	If SNAN exception (opclass 3):					#
#	- The system stack is changed to an SNAN exception stk frame	#
#	If OPERR exception (opclass 3):					#
#	- The system stack is changed to an OPERR exception stk frame	#
#	If OVFL exception (opclass 3):					#
#	- The system stack is changed to an OVFL exception stk frame	#
#	If UNFL exception (opclass 3):					#
#	- The system stack is changed to an UNFL exception stack frame	#
#	If Trace exception enabled:					#
#	- The system stack is changed to a Trace exception stack frame	#
#	Else: (normal case)						#
#	- Correct result has been stored as appropriate			#
#									#
# ALGORITHM ***********************************************************	#
#	Two main instruction types can enter here: (1) DENORM or UNNORM	#
# unimplemented data types. These can be either opclass 0,2 or 3 	#
# instructions, and (2) PACKED unimplemented data format instructions	#
# also of opclasses 0,2, or 3.						#
#	For UNNORM/DENORM opclass 0 and 2, the handler fetches the src	#
# operand from the fsave state frame and the dst operand (if dyadic)	#
# from the FP register file. The instruction is then emulated by 	#
# choosing an emulation routine from a table of routines indexed by	#
# instruction type. Once the instruction has been emulated and result	#
# saved, then we check to see if any enabled exceptions resulted from	#
# instruction emulation. If none, then we exit through the "callout"	#
# _fpsp_done(). If there is an enabled FP exception, then we insert	#
# this exception into the FPU in the fsave state frame and then exit	#
# through _fpsp_done().							#
#	PACKED opclass 0 and 2 is similar in how the instruction is	#
# emulated and exceptions handled. The differences occur in how the	#
# handler loads the packed op (by calling get_packed() routine) and	#
# by the fact that a Trace exception could be pending for PACKED ops.	#
# If a Trace exception is pending, then the current exception stack	#
# frame is changed to a Trace exception stack frame and an exit is	#
# made through _real_trace().						#
#	For UNNORM/DENORM opclass 3, the actual move out to memory is	#
# performed by calling the routine fout(). If no exception should occur	#
# as the result of emulation, then an exit either occurs through	#
# _fpsp_done() or through _real_trace() if a Trace exception is pending	#
# (a Trace stack frame must be created here, too). If an FP exception	#
# should occur, then we must create an exception stack frame of that	#
# type and jump to either _real_snan(), _real_operr(), _real_inex(),	#
# _real_unfl(), or _real_ovfl() as appropriate. PACKED opclass 3 	#
# emulation is performed in a similar manner.				#
#									#
#########################################################################

#
# (1) DENORM and UNNORM (unimplemented) data types:
#
#				post-instruction
#				*****************
#				*      EA	*
#	 pre-instruction	*		*
# 	*****************	*****************
#	* 0x0 *  0x0dc  *	* 0x3 *  0x0dc  *
#	*****************	*****************
#	*     Next	*	*     Next	*
#	*      PC	*	*      PC	*
#	*****************	*****************
#	*      SR	*	*      SR	*
#	*****************	*****************
#
# (2) PACKED format (unsupported) opclasses two and three:
#	*****************
#	*      EA	*
#	*		*
#	*****************
#	* 0x2 *  0x0dc	*
#	*****************
#	*     Next	*
#	*      PC	*
#	*****************
#	*      SR	*
#	*****************
#
	global		_fpsp_unsupp
_fpsp_unsupp:

	link.w		%a6,&-LOCAL_SIZE	# init stack frame

	fsave		FP_SRC(%a6)		# save fp state

 	movm.l		&0x0303,EXC_DREGS(%a6)	# save d0-d1/a0-a1
	fmovm.l		%fpcr,%fpsr,%fpiar,USER_FPCR(%a6) # save ctrl regs
 	fmovm.x		&0xc0,EXC_FPREGS(%a6)	# save fp0-fp1 on stack

	btst		&0x5,EXC_SR(%a6)	# user or supervisor mode?
	bne.b		fu_s
fu_u:
	mov.l		%usp,%a0		# fetch user stack pointer
	mov.l		%a0,EXC_A7(%a6)		# save on stack
	bra.b		fu_cont
# if the exception is an opclass zero or two unimplemented data type
# exception, then the a7' calculated here is wrong since it doesn't
# stack an ea. however, we don't need an a7' for this case anyways.
fu_s:
	lea		0x4+EXC_EA(%a6),%a0	# load old a7'
	mov.l		%a0,EXC_A7(%a6)		# save on stack

fu_cont:

# the FPIAR holds the "current PC" of the faulting instruction
# the FPIAR should be set correctly for ALL exceptions passing through
# this point.
	mov.l		USER_FPIAR(%a6),EXC_EXTWPTR(%a6)
	mov.l		EXC_EXTWPTR(%a6),%a0	# fetch instruction addr
	addq.l		&0x4,EXC_EXTWPTR(%a6)	# incr instruction ptr
	bsr.l		_imem_read_long		# fetch the instruction words
	mov.l		%d0,EXC_OPWORD(%a6)	# store OPWORD and EXTWORD

############################

	clr.b		SPCOND_FLG(%a6)		# clear special condition flag

# Separate opclass three (fpn-to-mem) ops since they have a different
# stack frame and protocol.
	btst		&0x5,EXC_CMDREG(%a6)	# is it an fmove out?
	bne.w		fu_out			# yes

# Separate packed opclass two instructions.
	bfextu		EXC_CMDREG(%a6){&0:&6},%d0
	cmpi.b		%d0,&0x13
	beq.w		fu_in_pack


# I'm not sure at this point what FPSR bits are valid for this instruction.
# so, since the emulation routines re-create them anyways, zero exception field
	andi.l		&0x00ff00ff,USER_FPSR(%a6) # zero exception field

	fmov.l		&0x0,%fpcr		# zero current control regs
	fmov.l		&0x0,%fpsr

# Opclass two w/ memory-to-fpn operation will have an incorrect extended
# precision format if the src format was single or double and the 
# source data type was an INF, NAN, DENORM, or UNNORM
	lea		FP_SRC(%a6),%a0		# pass ptr to input
	bsr.l		fix_skewed_ops

# we don't know whether the src operand or the dst operand (or both) is the
# UNNORM or DENORM. call the function that tags the operand type. if the
# input is an UNNORM, then convert it to a NORM, DENORM, or ZERO.
	lea		FP_SRC(%a6),%a0		# pass: ptr to src op
	bsr.l		set_tag_x		# tag the operand type
	cmpi.b		%d0,&UNNORM		# is operand an UNNORM?
	bne.b		fu_op2			# no
	bsr.l		unnorm_fix		# yes; convert to NORM,DENORM,or ZERO

fu_op2:
	mov.b		%d0,STAG(%a6)		# save src optype tag

	bfextu		EXC_CMDREG(%a6){&6:&3},%d0 # dyadic; load dst reg

# bit five of the fp extension word separates the monadic and dyadic operations 
# at this point
	btst		&0x5,1+EXC_CMDREG(%a6)	# is operation monadic or dyadic?
	beq.b		fu_extract		# monadic
	cmpi.b		1+EXC_CMDREG(%a6),&0x3a	# is operation an ftst?
	beq.b		fu_extract		# yes, so it's monadic, too

	bsr.l		load_fpn2		# load dst into FP_DST

	lea		FP_DST(%a6),%a0		# pass: ptr to dst op
	bsr.l		set_tag_x		# tag the operand type
	cmpi.b		%d0,&UNNORM		# is operand an UNNORM?
	bne.b		fu_op2_done		# no
	bsr.l		unnorm_fix		# yes; convert to NORM,DENORM,or ZERO
fu_op2_done:
	mov.b		%d0,DTAG(%a6)		# save dst optype tag

fu_extract:
	clr.l		%d0
	mov.b		FPCR_MODE(%a6),%d0	# fetch rnd mode/prec

	bfextu		1+EXC_CMDREG(%a6){&1:&7},%d1 # extract extension

	lea		FP_SRC(%a6),%a0
	lea		FP_DST(%a6),%a1

	mov.l		(tbl_unsupp.l,%pc,%d1.l*4),%d1 # fetch routine addr
	jsr		(tbl_unsupp.l,%pc,%d1.l*1)

#
# Exceptions in order of precedence:
# 	BSUN	: none
#	SNAN	: all dyadic ops
#	OPERR	: fsqrt(-NORM)
#	OVFL	: all except ftst,fcmp
#	UNFL	: all except ftst,fcmp
#	DZ	: fdiv
# 	INEX2	: all except ftst,fcmp
#	INEX1	: none (packed doesn't go through here)
#

# we determine the highest priority exception(if any) set by the
# emulation routine that has also been enabled by the user.
	mov.b		FPCR_ENABLE(%a6),%d0	# fetch exceptions set
	bne.b		fu_in_ena		# some are enabled

fu_in_cont:
# fcmp and ftst do not store any result.
	mov.b		1+EXC_CMDREG(%a6),%d0	# fetch extension
	andi.b		&0x38,%d0		# extract bits 3-5
	cmpi.b		%d0,&0x38		# is instr fcmp or ftst?
	beq.b		fu_in_exit		# yes

	bfextu		EXC_CMDREG(%a6){&6:&3},%d0 # dyadic; load dst reg
	bsr.l		store_fpreg		# store the result

fu_in_exit:

	fmovm.x		EXC_FPREGS(%a6),&0xc0	# restore fp0/fp1
	fmovm.l		USER_FPCR(%a6),%fpcr,%fpsr,%fpiar # restore ctrl regs
	movm.l		EXC_DREGS(%a6),&0x0303	# restore d0-d1/a0-a1

	unlk		%a6

	bra.l		_fpsp_done

fu_in_ena:
	and.b		FPSR_EXCEPT(%a6),%d0	# keep only ones enabled
	bfffo		%d0{&24:&8},%d0		# find highest priority exception
	bne.b		fu_in_exc		# there is at least one set

#
# No exceptions occurred that were also enabled. Now:
#
#   	if (OVFL && ovfl_disabled && inexact_enabled) {
#	    branch to _real_inex() (even if the result was exact!);
#     	} else {
#	    save the result in the proper fp reg (unless the op is fcmp or ftst);
#	    return;
#     	}
#
	btst		&ovfl_bit,FPSR_EXCEPT(%a6) # was overflow set?
	beq.b		fu_in_cont		# no
	
fu_in_ovflchk:
	btst		&inex2_bit,FPCR_ENABLE(%a6) # was inexact enabled?
	beq.b		fu_in_cont		# no
	bra.w		fu_in_exc_ovfl		# go insert overflow frame

#
# An exception occurred and that exception was enabled:
#
#	shift enabled exception field into lo byte of d0;
#	if (((INEX2 || INEX1) && inex_enabled && OVFL && ovfl_disabled) ||
#	    ((INEX2 || INEX1) && inex_enabled && UNFL && unfl_disabled)) {
#		/*
#		 * this is the case where we must call _real_inex() now or else
#		 * there will be no other way to pass it the exceptional operand
#		 */
#		call _real_inex();
#	} else {
#		restore exc state (SNAN||OPERR||OVFL||UNFL||DZ||INEX) into the FPU;
#	}
#	    		
fu_in_exc:
	subi.l		&24,%d0			# fix offset to be 0-8
	cmpi.b		%d0,&0x6		# is exception INEX? (6)
	bne.b		fu_in_exc_exit		# no

# the enabled exception was inexact
	btst		&unfl_bit,FPSR_EXCEPT(%a6) # did disabled underflow occur?
	bne.w		fu_in_exc_unfl		# yes
	btst		&ovfl_bit,FPSR_EXCEPT(%a6) # did disabled overflow occur?
	bne.w		fu_in_exc_ovfl		# yes

# here, we insert the correct fsave status value into the fsave frame for the
# corresponding exception. the operand in the fsave frame should be the original 
# src operand.
fu_in_exc_exit:
	mov.l		%d0,-(%sp)		# save d0
	bsr.l		funimp_skew		# skew sgl or dbl inputs
	mov.l		(%sp)+,%d0		# restore d0

	mov.w		(tbl_except.b,%pc,%d0.w*2),2+FP_SRC(%a6) # create exc status

	fmovm.x		EXC_FPREGS(%a6),&0xc0	# restore fp0/fp1
	fmovm.l		USER_FPCR(%a6),%fpcr,%fpsr,%fpiar # restore ctrl regs
	movm.l		EXC_DREGS(%a6),&0x0303	# restore d0-d1/a0-a1

	frestore	FP_SRC(%a6)		# restore src op

	unlk		%a6

	bra.l		_fpsp_done

tbl_except:
	short		0xe000,0xe006,0xe004,0xe005
	short		0xe003,0xe002,0xe001,0xe001

fu_in_exc_unfl:
	mov.w		&0x4,%d0
	bra.b		fu_in_exc_exit
fu_in_exc_ovfl:
	mov.w		&0x03,%d0
	bra.b		fu_in_exc_exit

# If the input operand to this operation was opclass two and a single
# or double precision denorm, inf, or nan, the operand needs to be 
# "corrected" in order to have the proper equivalent extended precision 
# number.
	global		fix_skewed_ops
fix_skewed_ops:
	bfextu		EXC_CMDREG(%a6){&0:&6},%d0 # extract opclass,src fmt
	cmpi.b		%d0,&0x11		# is class = 2 & fmt = sgl?
	beq.b		fso_sgl			# yes
	cmpi.b		%d0,&0x15		# is class = 2 & fmt = dbl?
	beq.b		fso_dbl			# yes
	rts					# no

fso_sgl:
	mov.w		LOCAL_EX(%a0),%d0	# fetch src exponent
	andi.w		&0x7fff,%d0		# strip sign
	cmpi.w		%d0,&0x3f80		# is |exp| == $3f80?
	beq.b		fso_sgl_dnrm_zero	# yes
	cmpi.w		%d0,&0x407f		# no; is |exp| == $407f?
	beq.b		fso_infnan		# yes
	rts					# no

fso_sgl_dnrm_zero:
	andi.l		&0x7fffffff,LOCAL_HI(%a0) # clear j-bit
	beq.b		fso_zero		# it's a skewed zero
fso_sgl_dnrm:
# here, we count on norm not to alter a0...
	bsr.l		norm			# normalize mantissa
	neg.w		%d0			# -shft amt
	addi.w		&0x3f81,%d0		# adjust new exponent
	andi.w		&0x8000,LOCAL_EX(%a0) 	# clear old exponent
	or.w		%d0,LOCAL_EX(%a0)	# insert new exponent
	rts

fso_zero:
	andi.w		&0x8000,LOCAL_EX(%a0)	# clear bogus exponent
	rts

fso_infnan:
	andi.b		&0x7f,LOCAL_HI(%a0) 	# clear j-bit
	ori.w		&0x7fff,LOCAL_EX(%a0)	# make exponent = $7fff
	rts

fso_dbl:
	mov.w		LOCAL_EX(%a0),%d0	# fetch src exponent
	andi.w		&0x7fff,%d0		# strip sign
	cmpi.w		%d0,&0x3c00		# is |exp| == $3c00?
	beq.b		fso_dbl_dnrm_zero	# yes
	cmpi.w		%d0,&0x43ff		# no; is |exp| == $43ff?
	beq.b		fso_infnan		# yes
	rts					# no

fso_dbl_dnrm_zero:
	andi.l		&0x7fffffff,LOCAL_HI(%a0) # clear j-bit
	bne.b		fso_dbl_dnrm		# it's a skewed denorm
	tst.l		LOCAL_LO(%a0)		# is it a zero?
	beq.b		fso_zero		# yes
fso_dbl_dnrm:
# here, we count on norm not to alter a0...
	bsr.l		norm			# normalize mantissa
	neg.w		%d0			# -shft amt
	addi.w		&0x3c01,%d0		# adjust new exponent
	andi.w		&0x8000,LOCAL_EX(%a0) 	# clear old exponent
	or.w		%d0,LOCAL_EX(%a0)	# insert new exponent
	rts

#################################################################

# fmove out took an unimplemented data type exception.
# the src operand is in FP_SRC. Call _fout() to write out the result and
# to determine which exceptions, if any, to take.
fu_out:

# Separate packed move outs from the UNNORM and DENORM move outs.
	bfextu		EXC_CMDREG(%a6){&3:&3},%d0
	cmpi.b		%d0,&0x3
	beq.w		fu_out_pack
	cmpi.b		%d0,&0x7
	beq.w		fu_out_pack


# I'm not sure at this point what FPSR bits are valid for this instruction.
# so, since the emulation routines re-create them anyways, zero exception field.
# fmove out doesn't affect ccodes.
	and.l		&0xffff00ff,USER_FPSR(%a6) # zero exception field

	fmov.l		&0x0,%fpcr		# zero current control regs
	fmov.l		&0x0,%fpsr

# the src can ONLY be a DENORM or an UNNORM! so, don't make any big subroutine
# call here. just figure out what it is...
	mov.w		FP_SRC_EX(%a6),%d0	# get exponent
	andi.w		&0x7fff,%d0		# strip sign
	beq.b		fu_out_denorm		# it's a DENORM

	lea		FP_SRC(%a6),%a0
	bsr.l		unnorm_fix		# yes; fix it

	mov.b		%d0,STAG(%a6)

	bra.b		fu_out_cont
fu_out_denorm:
	mov.b		&DENORM,STAG(%a6)
fu_out_cont:

	clr.l		%d0
	mov.b		FPCR_MODE(%a6),%d0	# fetch rnd mode/prec

	lea		FP_SRC(%a6),%a0		# pass ptr to src operand

	mov.l		(%a6),EXC_A6(%a6)	# in case a6 changes
	bsr.l		fout			# call fmove out routine

# Exceptions in order of precedence:
# 	BSUN	: none
#	SNAN	: none
#	OPERR	: fmove.{b,w,l} out of large UNNORM
#	OVFL	: fmove.{s,d}
#	UNFL	: fmove.{s,d,x}
#	DZ	: none
# 	INEX2	: all
#	INEX1	: none (packed doesn't travel through here)

# determine the highest priority exception(if any) set by the
# emulation routine that has also been enabled by the user.
	mov.b		FPCR_ENABLE(%a6),%d0	# fetch exceptions enabled
	bne.w		fu_out_ena		# some are enabled

fu_out_done:

	mov.l		EXC_A6(%a6),(%a6)	# in case a6 changed

# on extended precision opclass three instructions using pre-decrement or 
# post-increment addressing mode, the address register is not updated. is the
# address register was the stack pointer used from user mode, then let's update
# it here. if it was used from supervisor mode, then we have to handle this
# as a special case.
	btst		&0x5,EXC_SR(%a6)
	bne.b		fu_out_done_s

	mov.l		EXC_A7(%a6),%a0		# restore a7
	mov.l		%a0,%usp

fu_out_done_cont:
	fmovm.x		EXC_FPREGS(%a6),&0xc0	# restore fp0/fp1
	fmovm.l		USER_FPCR(%a6),%fpcr,%fpsr,%fpiar # restore ctrl regs
	movm.l		EXC_DREGS(%a6),&0x0303	# restore d0-d1/a0-a1

	unlk		%a6

	btst		&0x7,(%sp)		# is trace on?
	bne.b		fu_out_trace		# yes

	bra.l		_fpsp_done

# is the ea mode pre-decrement of the stack pointer from supervisor mode?
# ("fmov.x fpm,-(a7)") if so, 
fu_out_done_s:
	cmpi.b		SPCOND_FLG(%a6),&mda7_flg
	bne.b		fu_out_done_cont

# the extended precision result is still in fp0. but, we need to save it
# somewhere on the stack until we can copy it to its final resting place.
# here, we're counting on the top of the stack to be the old place-holders
# for fp0/fp1 which have already been restored. that way, we can write
# over those destinations with the shifted stack frame.
	fmovm.x		&0x80,FP_SRC(%a6)	# put answer on stack

	fmovm.x		EXC_FPREGS(%a6),&0xc0	# restore fp0/fp1
	fmovm.l		USER_FPCR(%a6),%fpcr,%fpsr,%fpiar # restore ctrl regs
	movm.l		EXC_DREGS(%a6),&0x0303	# restore d0-d1/a0-a1

	mov.l		(%a6),%a6		# restore frame pointer

	mov.l		LOCAL_SIZE+EXC_SR(%sp),LOCAL_SIZE+EXC_SR-0xc(%sp)
	mov.l		LOCAL_SIZE+2+EXC_PC(%sp),LOCAL_SIZE+2+EXC_PC-0xc(%sp)

# now, copy the result to the proper place on the stack
	mov.l		LOCAL_SIZE+FP_SRC_EX(%sp),LOCAL_SIZE+EXC_SR+0x0(%sp)
	mov.l		LOCAL_SIZE+FP_SRC_HI(%sp),LOCAL_SIZE+EXC_SR+0x4(%sp)
	mov.l		LOCAL_SIZE+FP_SRC_LO(%sp),LOCAL_SIZE+EXC_SR+0x8(%sp)

	add.l		&LOCAL_SIZE-0x8,%sp

	btst		&0x7,(%sp)
	bne.b		fu_out_trace

	bra.l		_fpsp_done

fu_out_ena:
	and.b		FPSR_EXCEPT(%a6),%d0	# keep only ones enabled
	bfffo		%d0{&24:&8},%d0		# find highest priority exception
	bne.b		fu_out_exc		# there is at least one set

# no exceptions were set. 
# if a disabled overflow occurred and inexact was enabled but the result
# was exact, then a branch to _real_inex() is made.
	btst		&ovfl_bit,FPSR_EXCEPT(%a6) # was overflow set?
	beq.w		fu_out_done		# no

fu_out_ovflchk:
	btst		&inex2_bit,FPCR_ENABLE(%a6) # was inexact enabled?
	beq.w		fu_out_done		# no
	bra.w		fu_inex			# yes

#
# The fp move out that took the "Unimplemented Data Type" exception was
# being traced. Since the stack frames are similar, get the "current" PC
# from FPIAR and put it in the trace stack frame then jump to _real_trace().
#
#		  UNSUPP FRAME		   TRACE FRAME
# 		*****************	*****************
#		*      EA	*	*    Current	*
#		*		*	*      PC	*
#		*****************	*****************
#		* 0x3 *  0x0dc	*	* 0x2 *  0x024	*
#		*****************	*****************
#		*     Next	*	*     Next	*
#		*      PC	*	*      PC	*
#		*****************	*****************
#		*      SR	*	*      SR	*
#		*****************	*****************
#
fu_out_trace:
	mov.w		&0x2024,0x6(%sp)
	fmov.l		%fpiar,0x8(%sp)
	bra.l		_real_trace

# an exception occurred and that exception was enabled. 	
fu_out_exc:
	subi.l		&24,%d0			# fix offset to be 0-8

# we don't mess with the existing fsave frame. just re-insert it and
# jump to the "_real_{}()" handler...
	mov.w		(tbl_fu_out.b,%pc,%d0.w*2),%d0
	jmp		(tbl_fu_out.b,%pc,%d0.w*1)

	swbeg		&0x8
tbl_fu_out:
	short		tbl_fu_out	- tbl_fu_out	# BSUN can't happen
	short		tbl_fu_out 	- tbl_fu_out	# SNAN can't happen
	short		fu_operr	- tbl_fu_out	# OPERR
	short		fu_ovfl 	- tbl_fu_out	# OVFL
	short		fu_unfl 	- tbl_fu_out	# UNFL
	short		tbl_fu_out	- tbl_fu_out	# DZ can't happen
	short		fu_inex 	- tbl_fu_out	# INEX2
	short		tbl_fu_out	- tbl_fu_out	# INEX1 won't make it here

# for snan,operr,ovfl,unfl, src op is still in FP_SRC so just 
# frestore it.
fu_snan:
	fmovm.x		EXC_FPREGS(%a6),&0xc0	# restore fp0/fp1
	fmovm.l		USER_FPCR(%a6),%fpcr,%fpsr,%fpiar # restore ctrl regs
	movm.l		EXC_DREGS(%a6),&0x0303	# restore d0-d1/a0-a1

	mov.w		&0x30d8,EXC_VOFF(%a6)	# vector offset = 0xd8
	mov.w		&0xe006,2+FP_SRC(%a6)

	frestore	FP_SRC(%a6)

	unlk		%a6


	bra.l		_real_snan

fu_operr:
	fmovm.x		EXC_FPREGS(%a6),&0xc0	# restore fp0/fp1
	fmovm.l		USER_FPCR(%a6),%fpcr,%fpsr,%fpiar # restore ctrl regs
	movm.l		EXC_DREGS(%a6),&0x0303	# restore d0-d1/a0-a1

	mov.w		&0x30d0,EXC_VOFF(%a6)	# vector offset = 0xd0
	mov.w		&0xe004,2+FP_SRC(%a6)

	frestore	FP_SRC(%a6)

	unlk		%a6


	bra.l		_real_operr

fu_ovfl:
	fmovm.x		&0x40,FP_SRC(%a6)	# save EXOP to the stack

	fmovm.x		EXC_FPREGS(%a6),&0xc0	# restore fp0/fp1
	fmovm.l		USER_FPCR(%a6),%fpcr,%fpsr,%fpiar # restore ctrl regs
	movm.l		EXC_DREGS(%a6),&0x0303	# restore d0-d1/a0-a1

	mov.w		&0x30d4,EXC_VOFF(%a6)	# vector offset = 0xd4
	mov.w		&0xe005,2+FP_SRC(%a6)

	frestore	FP_SRC(%a6)		# restore EXOP

	unlk		%a6

	bra.l		_real_ovfl

# underflow can happen for extended precision. extended precision opclass
# three instruction exceptions don't update the stack pointer. so, if the
# exception occurred from user mode, then simply update a7 and exit normally.
# if the exception occurred from supervisor mode, check if 
fu_unfl:
	mov.l		EXC_A6(%a6),(%a6)	# restore a6

	btst		&0x5,EXC_SR(%a6)
	bne.w		fu_unfl_s

	mov.l		EXC_A7(%a6),%a0		# restore a7 whether we need
	mov.l		%a0,%usp		# to or not...
	
fu_unfl_cont:
	fmovm.x		&0x40,FP_SRC(%a6)	# save EXOP to the stack

	fmovm.x		EXC_FPREGS(%a6),&0xc0	# restore fp0/fp1
	fmovm.l		USER_FPCR(%a6),%fpcr,%fpsr,%fpiar # restore ctrl regs
	movm.l		EXC_DREGS(%a6),&0x0303	# restore d0-d1/a0-a1

	mov.w		&0x30cc,EXC_VOFF(%a6)	# vector offset = 0xcc
	mov.w		&0xe003,2+FP_SRC(%a6)

	frestore	FP_SRC(%a6)		# restore EXOP

	unlk		%a6

	bra.l		_real_unfl

fu_unfl_s:
	cmpi.b		SPCOND_FLG(%a6),&mda7_flg # was the <ea> mode -(sp)?
	bne.b		fu_unfl_cont

# the extended precision result is still in fp0. but, we need to save it
# somewhere on the stack until we can copy it to its final resting place
# (where the exc frame is currently). make sure it's not at the top of the
# frame or it will get overwritten when the exc stack frame is shifted "down".
	fmovm.x		&0x80,FP_SRC(%a6)	# put answer on stack
	fmovm.x		&0x40,FP_DST(%a6)	# put EXOP on stack

	fmovm.x		EXC_FPREGS(%a6),&0xc0	# restore fp0/fp1
	fmovm.l		USER_FPCR(%a6),%fpcr,%fpsr,%fpiar # restore ctrl regs
	movm.l		EXC_DREGS(%a6),&0x0303	# restore d0-d1/a0-a1

	mov.w		&0x30cc,EXC_VOFF(%a6)	# vector offset = 0xcc
	mov.w		&0xe003,2+FP_DST(%a6)

	frestore	FP_DST(%a6)		# restore EXOP

	mov.l		(%a6),%a6		# restore frame pointer

	mov.l		LOCAL_SIZE+EXC_SR(%sp),LOCAL_SIZE+EXC_SR-0xc(%sp)
	mov.l		LOCAL_SIZE+2+EXC_PC(%sp),LOCAL_SIZE+2+EXC_PC-0xc(%sp)
	mov.l		LOCAL_SIZE+EXC_EA(%sp),LOCAL_SIZE+EXC_EA-0xc(%sp)

# now, copy the result to the proper place on the stack
	mov.l		LOCAL_SIZE+FP_SRC_EX(%sp),LOCAL_SIZE+EXC_SR+0x0(%sp)
	mov.l		LOCAL_SIZE+FP_SRC_HI(%sp),LOCAL_SIZE+EXC_SR+0x4(%sp)
	mov.l		LOCAL_SIZE+FP_SRC_LO(%sp),LOCAL_SIZE+EXC_SR+0x8(%sp)

	add.l		&LOCAL_SIZE-0x8,%sp

	bra.l		_real_unfl

# fmove in and out enter here.
fu_inex:
	fmovm.x		&0x40,FP_SRC(%a6)	# save EXOP to the stack

	fmovm.x		EXC_FPREGS(%a6),&0xc0	# restore fp0/fp1
	fmovm.l		USER_FPCR(%a6),%fpcr,%fpsr,%fpiar # restore ctrl regs
	movm.l		EXC_DREGS(%a6),&0x0303	# restore d0-d1/a0-a1

	mov.w		&0x30c4,EXC_VOFF(%a6)	# vector offset = 0xc4
	mov.w		&0xe001,2+FP_SRC(%a6)

	frestore	FP_SRC(%a6)		# restore EXOP

	unlk		%a6


	bra.l		_real_inex

#########################################################################
#########################################################################
fu_in_pack:


# I'm not sure at this point what FPSR bits are valid for this instruction.
# so, since the emulation routines re-create them anyways, zero exception field
	andi.l		&0x0ff00ff,USER_FPSR(%a6) # zero exception field

	fmov.l		&0x0,%fpcr		# zero current control regs
	fmov.l		&0x0,%fpsr

	bsr.l		get_packed		# fetch packed src operand

	lea		FP_SRC(%a6),%a0		# pass ptr to src
	bsr.l		set_tag_x		# set src optype tag

	mov.b		%d0,STAG(%a6)		# save src optype tag

	bfextu		EXC_CMDREG(%a6){&6:&3},%d0 # dyadic; load dst reg

# bit five of the fp extension word separates the monadic and dyadic operations 
# at this point
	btst		&0x5,1+EXC_CMDREG(%a6)	# is operation monadic or dyadic?
	beq.b		fu_extract_p		# monadic
	cmpi.b		1+EXC_CMDREG(%a6),&0x3a	# is operation an ftst?
	beq.b		fu_extract_p		# yes, so it's monadic, too

	bsr.l		load_fpn2		# load dst into FP_DST

	lea		FP_DST(%a6),%a0		# pass: ptr to dst op
	bsr.l		set_tag_x		# tag the operand type
	cmpi.b		%d0,&UNNORM		# is operand an UNNORM?
	bne.b		fu_op2_done_p		# no
	bsr.l		unnorm_fix		# yes; convert to NORM,DENORM,or ZERO
fu_op2_done_p:
	mov.b		%d0,DTAG(%a6)		# save dst optype tag

fu_extract_p:
	clr.l		%d0
	mov.b		FPCR_MODE(%a6),%d0	# fetch rnd mode/prec

	bfextu		1+EXC_CMDREG(%a6){&1:&7},%d1 # extract extension

	lea		FP_SRC(%a6),%a0
	lea		FP_DST(%a6),%a1

	mov.l		(tbl_unsupp.l,%pc,%d1.l*4),%d1 # fetch routine addr
	jsr		(tbl_unsupp.l,%pc,%d1.l*1)

#
# Exceptions in order of precedence:
# 	BSUN	: none
#	SNAN	: all dyadic ops
#	OPERR	: fsqrt(-NORM)
#	OVFL	: all except ftst,fcmp
#	UNFL	: all except ftst,fcmp
#	DZ	: fdiv
# 	INEX2	: all except ftst,fcmp
#	INEX1	: all
#

# we determine the highest priority exception(if any) set by the
# emulation routine that has also been enabled by the user.
	mov.b		FPCR_ENABLE(%a6),%d0	# fetch exceptions enabled
	bne.w		fu_in_ena_p		# some are enabled

fu_in_cont_p:
# fcmp and ftst do not store any result.
	mov.b		1+EXC_CMDREG(%a6),%d0	# fetch extension
	andi.b		&0x38,%d0		# extract bits 3-5
	cmpi.b		%d0,&0x38		# is instr fcmp or ftst?
	beq.b		fu_in_exit_p		# yes

	bfextu		EXC_CMDREG(%a6){&6:&3},%d0 # dyadic; load dst reg
	bsr.l		store_fpreg		# store the result

fu_in_exit_p:

	btst		&0x5,EXC_SR(%a6)	# user or supervisor?
	bne.w		fu_in_exit_s_p		# supervisor

	mov.l		EXC_A7(%a6),%a0		# update user a7
	mov.l		%a0,%usp

fu_in_exit_cont_p:
	fmovm.x		EXC_FPREGS(%a6),&0xc0	# restore fp0/fp1
	fmovm.l		USER_FPCR(%a6),%fpcr,%fpsr,%fpiar # restore ctrl regs
	movm.l		EXC_DREGS(%a6),&0x0303	# restore d0-d1/a0-a1

	unlk		%a6			# unravel stack frame

	btst		&0x7,(%sp)		# is trace on?
	bne.w		fu_trace_p		# yes

	bra.l		_fpsp_done		# exit to os

# the exception occurred in supervisor mode. check to see if the
# addressing mode was (a7)+. if so, we'll need to shift the
# stack frame "up".
fu_in_exit_s_p:
	btst		&mia7_bit,SPCOND_FLG(%a6) # was ea mode (a7)+
	beq.b		fu_in_exit_cont_p	# no

	fmovm.x		EXC_FPREGS(%a6),&0xc0	# restore fp0/fp1
	fmovm.l		USER_FPCR(%a6),%fpcr,%fpsr,%fpiar # restore ctrl regs
	movm.l		EXC_DREGS(%a6),&0x0303	# restore d0-d1/a0-a1

	unlk		%a6			# unravel stack frame

# shift the stack frame "up". we don't really care about the <ea> field.
	mov.l		0x4(%sp),0x10(%sp)
	mov.l		0x0(%sp),0xc(%sp)
	add.l		&0xc,%sp

	btst		&0x7,(%sp)		# is trace on?
	bne.w		fu_trace_p		# yes

	bra.l		_fpsp_done		# exit to os

fu_in_ena_p:
	and.b		FPSR_EXCEPT(%a6),%d0	# keep only ones enabled & set
	bfffo		%d0{&24:&8},%d0		# find highest priority exception
	bne.b		fu_in_exc_p		# at least one was set

#
# No exceptions occurred that were also enabled. Now:
#
#   	if (OVFL && ovfl_disabled && inexact_enabled) {
#	    branch to _real_inex() (even if the result was exact!);
#     	} else {
#	    save the result in the proper fp reg (unless the op is fcmp or ftst);
#	    return;
#     	}
#
	btst		&ovfl_bit,FPSR_EXCEPT(%a6) # was overflow set?
	beq.w		fu_in_cont_p		# no
	
fu_in_ovflchk_p:
	btst		&inex2_bit,FPCR_ENABLE(%a6) # was inexact enabled?
	beq.w		fu_in_cont_p		# no
	bra.w		fu_in_exc_ovfl_p	# do _real_inex() now

#
# An exception occurred and that exception was enabled:
#
#	shift enabled exception field into lo byte of d0;
#	if (((INEX2 || INEX1) && inex_enabled && OVFL && ovfl_disabled) ||
#	    ((INEX2 || INEX1) && inex_enabled && UNFL && unfl_disabled)) {
#		/*
#		 * this is the case where we must call _real_inex() now or else
#		 * there will be no other way to pass it the exceptional operand
#		 */
#		call _real_inex();
#	} else {
#		restore exc state (SNAN||OPERR||OVFL||UNFL||DZ||INEX) into the FPU;
#	}
#	    		
fu_in_exc_p:
	subi.l		&24,%d0			# fix offset to be 0-8
	cmpi.b		%d0,&0x6		# is exception INEX? (6 or 7)
	blt.b		fu_in_exc_exit_p	# no

# the enabled exception was inexact
	btst		&unfl_bit,FPSR_EXCEPT(%a6) # did disabled underflow occur?
	bne.w		fu_in_exc_unfl_p	# yes
	btst		&ovfl_bit,FPSR_EXCEPT(%a6) # did disabled overflow occur?
	bne.w		fu_in_exc_ovfl_p	# yes

# here, we insert the correct fsave status value into the fsave frame for the
# corresponding exception. the operand in the fsave frame should be the original 
# src operand.
# as a reminder for future predicted pain and agony, we are passing in fsave the
# "non-skewed" operand for cases of sgl and dbl src INFs,NANs, and DENORMs.
# this is INCORRECT for enabled SNAN which would give to the user the skewed SNAN!!!
fu_in_exc_exit_p:
	btst		&0x5,EXC_SR(%a6)	# user or supervisor?
	bne.w		fu_in_exc_exit_s_p	# supervisor

	mov.l		EXC_A7(%a6),%a0		# update user a7
	mov.l		%a0,%usp

fu_in_exc_exit_cont_p:
	mov.w		(tbl_except_p.b,%pc,%d0.w*2),2+FP_SRC(%a6)

	fmovm.x		EXC_FPREGS(%a6),&0xc0	# restore fp0/fp1
	fmovm.l		USER_FPCR(%a6),%fpcr,%fpsr,%fpiar # restore ctrl regs
	movm.l		EXC_DREGS(%a6),&0x0303	# restore d0-d1/a0-a1

	frestore	FP_SRC(%a6)		# restore src op

	unlk		%a6

	btst		&0x7,(%sp)		# is trace enabled?
	bne.w		fu_trace_p		# yes

	bra.l		_fpsp_done

tbl_except_p:
	short		0xe000,0xe006,0xe004,0xe005
	short		0xe003,0xe002,0xe001,0xe001

fu_in_exc_ovfl_p:
	mov.w		&0x3,%d0
	bra.w		fu_in_exc_exit_p

fu_in_exc_unfl_p:
	mov.w		&0x4,%d0
	bra.w		fu_in_exc_exit_p

fu_in_exc_exit_s_p:
	btst		&mia7_bit,SPCOND_FLG(%a6)
	beq.b		fu_in_exc_exit_cont_p

	mov.w		(tbl_except_p.b,%pc,%d0.w*2),2+FP_SRC(%a6)

	fmovm.x		EXC_FPREGS(%a6),&0xc0	# restore fp0/fp1
	fmovm.l		USER_FPCR(%a6),%fpcr,%fpsr,%fpiar # restore ctrl regs
	movm.l		EXC_DREGS(%a6),&0x0303	# restore d0-d1/a0-a1

	frestore	FP_SRC(%a6)		# restore src op

	unlk		%a6			# unravel stack frame

# shift stack frame "up". who cares about <ea> field.
	mov.l		0x4(%sp),0x10(%sp)
	mov.l		0x0(%sp),0xc(%sp)
	add.l		&0xc,%sp

	btst		&0x7,(%sp)		# is trace on?
	bne.b		fu_trace_p		# yes

	bra.l		_fpsp_done		# exit to os
	
#
# The opclass two PACKED instruction that took an "Unimplemented Data Type" 
# exception was being traced. Make the "current" PC the FPIAR and put it in the 
# trace stack frame then jump to _real_trace().
#					
#		  UNSUPP FRAME		   TRACE FRAME
#		*****************	*****************
#		*      EA	*	*    Current	*
#		*		*	*      PC	*
#		*****************	*****************
#		* 0x2 *	0x0dc	* 	* 0x2 *  0x024	*
#		*****************	*****************
#		*     Next	*	*     Next	*
#		*      PC	*      	*      PC	*
#		*****************	*****************
#		*      SR	*	*      SR	*
#		*****************	*****************
fu_trace_p:
	mov.w		&0x2024,0x6(%sp)
	fmov.l		%fpiar,0x8(%sp)

	bra.l		_real_trace

#########################################################
#########################################################
fu_out_pack:


# I'm not sure at this point what FPSR bits are valid for this instruction.
# so, since the emulation routines re-create them anyways, zero exception field.
# fmove out doesn't affect ccodes.
	and.l		&0xffff00ff,USER_FPSR(%a6) # zero exception field

	fmov.l		&0x0,%fpcr		# zero current control regs
	fmov.l		&0x0,%fpsr

	bfextu		EXC_CMDREG(%a6){&6:&3},%d0
	bsr.l		load_fpn1

# unlike other opclass 3, unimplemented data type exceptions, packed must be
# able to detect all operand types.
	lea		FP_SRC(%a6),%a0
	bsr.l		set_tag_x		# tag the operand type
	cmpi.b		%d0,&UNNORM		# is operand an UNNORM?
	bne.b		fu_op2_p		# no
	bsr.l		unnorm_fix		# yes; convert to NORM,DENORM,or ZERO

fu_op2_p:
	mov.b		%d0,STAG(%a6)		# save src optype tag

	clr.l		%d0
	mov.b		FPCR_MODE(%a6),%d0	# fetch rnd mode/prec

	lea		FP_SRC(%a6),%a0		# pass ptr to src operand

	mov.l		(%a6),EXC_A6(%a6)	# in case a6 changes
	bsr.l		fout			# call fmove out routine

# Exceptions in order of precedence:
# 	BSUN	: no
#	SNAN	: yes
#	OPERR	: if ((k_factor > +17) || (dec. exp exceeds 3 digits))
#	OVFL	: no
#	UNFL	: no
#	DZ	: no
# 	INEX2	: yes
#	INEX1	: no

# determine the highest priority exception(if any) set by the
# emulation routine that has also been enabled by the user.
	mov.b		FPCR_ENABLE(%a6),%d0	# fetch exceptions enabled
	bne.w		fu_out_ena_p		# some are enabled

fu_out_exit_p:
	mov.l		EXC_A6(%a6),(%a6)	# restore a6

	btst		&0x5,EXC_SR(%a6)	# user or supervisor?
	bne.b		fu_out_exit_s_p		# supervisor

	mov.l		EXC_A7(%a6),%a0		# update user a7
	mov.l		%a0,%usp

fu_out_exit_cont_p:
	fmovm.x		EXC_FPREGS(%a6),&0xc0	# restore fp0/fp1
	fmovm.l		USER_FPCR(%a6),%fpcr,%fpsr,%fpiar # restore ctrl regs
	movm.l		EXC_DREGS(%a6),&0x0303	# restore d0-d1/a0-a1

	unlk		%a6			# unravel stack frame

	btst		&0x7,(%sp)		# is trace on?
	bne.w		fu_trace_p		# yes

	bra.l		_fpsp_done		# exit to os

# the exception occurred in supervisor mode. check to see if the
# addressing mode was -(a7). if so, we'll need to shift the
# stack frame "down".
fu_out_exit_s_p:
	btst		&mda7_bit,SPCOND_FLG(%a6) # was ea mode -(a7)
	beq.b		fu_out_exit_cont_p	# no

	fmovm.x		EXC_FPREGS(%a6),&0xc0	# restore fp0/fp1
	fmovm.l		USER_FPCR(%a6),%fpcr,%fpsr,%fpiar # restore ctrl regs
	movm.l		EXC_DREGS(%a6),&0x0303	# restore d0-d1/a0-a1

	mov.l		(%a6),%a6		# restore frame pointer

	mov.l		LOCAL_SIZE+EXC_SR(%sp),LOCAL_SIZE+EXC_SR-0xc(%sp)
	mov.l		LOCAL_SIZE+2+EXC_PC(%sp),LOCAL_SIZE+2+EXC_PC-0xc(%sp)

# now, copy the result to the proper place on the stack
	mov.l		LOCAL_SIZE+FP_DST_EX(%sp),LOCAL_SIZE+EXC_SR+0x0(%sp)
	mov.l		LOCAL_SIZE+FP_DST_HI(%sp),LOCAL_SIZE+EXC_SR+0x4(%sp)
	mov.l		LOCAL_SIZE+FP_DST_LO(%sp),LOCAL_SIZE+EXC_SR+0x8(%sp)

	add.l		&LOCAL_SIZE-0x8,%sp

	btst		&0x7,(%sp)
	bne.w		fu_trace_p

	bra.l		_fpsp_done

fu_out_ena_p:
	and.b		FPSR_EXCEPT(%a6),%d0	# keep only ones enabled
	bfffo		%d0{&24:&8},%d0		# find highest priority exception
	beq.w		fu_out_exit_p

	mov.l		EXC_A6(%a6),(%a6)	# restore a6

# an exception occurred and that exception was enabled. 	
# the only exception possible on packed move out are INEX, OPERR, and SNAN.
fu_out_exc_p:
	cmpi.b		%d0,&0x1a
	bgt.w		fu_inex_p2
	beq.w		fu_operr_p

fu_snan_p:
	btst		&0x5,EXC_SR(%a6)
	bne.b		fu_snan_s_p

	mov.l		EXC_A7(%a6),%a0
	mov.l		%a0,%usp
	bra.w		fu_snan

fu_snan_s_p:
	cmpi.b		SPCOND_FLG(%a6),&mda7_flg
	bne.w		fu_snan

# the instruction was "fmove.p fpn,-(a7)" from supervisor mode.
# the strategy is to move the exception frame "down" 12 bytes. then, we
# can store the default result where the exception frame was.
	fmovm.x		EXC_FPREGS(%a6),&0xc0	# restore fp0/fp1
	fmovm.l		USER_FPCR(%a6),%fpcr,%fpsr,%fpiar # restore ctrl regs
	movm.l		EXC_DREGS(%a6),&0x0303	# restore d0-d1/a0-a1

	mov.w		&0x30d8,EXC_VOFF(%a6)	# vector offset = 0xd0
	mov.w		&0xe006,2+FP_SRC(%a6) 	# set fsave status

	frestore	FP_SRC(%a6)		# restore src operand

	mov.l		(%a6),%a6		# restore frame pointer

	mov.l		LOCAL_SIZE+EXC_SR(%sp),LOCAL_SIZE+EXC_SR-0xc(%sp)
	mov.l		LOCAL_SIZE+2+EXC_PC(%sp),LOCAL_SIZE+2+EXC_PC-0xc(%sp)
	mov.l		LOCAL_SIZE+EXC_EA(%sp),LOCAL_SIZE+EXC_EA-0xc(%sp)

# now, we copy the default result to it's proper location
	mov.l		LOCAL_SIZE+FP_DST_EX(%sp),LOCAL_SIZE+0x4(%sp)
	mov.l		LOCAL_SIZE+FP_DST_HI(%sp),LOCAL_SIZE+0x8(%sp)
	mov.l		LOCAL_SIZE+FP_DST_LO(%sp),LOCAL_SIZE+0xc(%sp)

	add.l		&LOCAL_SIZE-0x8,%sp


	bra.l		_real_snan

fu_operr_p:
	btst		&0x5,EXC_SR(%a6)
	bne.w		fu_operr_p_s

	mov.l		EXC_A7(%a6),%a0
	mov.l		%a0,%usp
	bra.w		fu_operr

fu_operr_p_s:
	cmpi.b		SPCOND_FLG(%a6),&mda7_flg
	bne.w		fu_operr

# the instruction was "fmove.p fpn,-(a7)" from supervisor mode.
# the strategy is to move the exception frame "down" 12 bytes. then, we
# can store the default result where the exception frame was.
	fmovm.x		EXC_FPREGS(%a6),&0xc0	# restore fp0/fp1
	fmovm.l		USER_FPCR(%a6),%fpcr,%fpsr,%fpiar # restore ctrl regs
	movm.l		EXC_DREGS(%a6),&0x0303	# restore d0-d1/a0-a1

	mov.w		&0x30d0,EXC_VOFF(%a6)	# vector offset = 0xd0
	mov.w		&0xe004,2+FP_SRC(%a6) 	# set fsave status

	frestore	FP_SRC(%a6)		# restore src operand

	mov.l		(%a6),%a6		# restore frame pointer

	mov.l		LOCAL_SIZE+EXC_SR(%sp),LOCAL_SIZE+EXC_SR-0xc(%sp)
	mov.l		LOCAL_SIZE+2+EXC_PC(%sp),LOCAL_SIZE+2+EXC_PC-0xc(%sp)
	mov.l		LOCAL_SIZE+EXC_EA(%sp),LOCAL_SIZE+EXC_EA-0xc(%sp)

# now, we copy the default result to it's proper location
	mov.l		LOCAL_SIZE+FP_DST_EX(%sp),LOCAL_SIZE+0x4(%sp)
	mov.l		LOCAL_SIZE+FP_DST_HI(%sp),LOCAL_SIZE+0x8(%sp)
	mov.l		LOCAL_SIZE+FP_DST_LO(%sp),LOCAL_SIZE+0xc(%sp)

	add.l		&LOCAL_SIZE-0x8,%sp


	bra.l		_real_operr

fu_inex_p2:
	btst		&0x5,EXC_SR(%a6)
	bne.w		fu_inex_s_p2

	mov.l		EXC_A7(%a6),%a0
	mov.l		%a0,%usp
	bra.w		fu_inex

fu_inex_s_p2:
	cmpi.b		SPCOND_FLG(%a6),&mda7_flg
	bne.w		fu_inex

# the instruction was "fmove.p fpn,-(a7)" from supervisor mode.
# the strategy is to move the exception frame "down" 12 bytes. then, we
# can store the default result where the exception frame was.
	fmovm.x		EXC_FPREGS(%a6),&0xc0	# restore fp0/fp1
	fmovm.l		USER_FPCR(%a6),%fpcr,%fpsr,%fpiar # restore ctrl regs
	movm.l		EXC_DREGS(%a6),&0x0303	# restore d0-d1/a0-a1

	mov.w		&0x30c4,EXC_VOFF(%a6) 	# vector offset = 0xc4
	mov.w		&0xe001,2+FP_SRC(%a6) 	# set fsave status

	frestore	FP_SRC(%a6)		# restore src operand

	mov.l		(%a6),%a6		# restore frame pointer

	mov.l		LOCAL_SIZE+EXC_SR(%sp),LOCAL_SIZE+EXC_SR-0xc(%sp)
	mov.l		LOCAL_SIZE+2+EXC_PC(%sp),LOCAL_SIZE+2+EXC_PC-0xc(%sp)
	mov.l		LOCAL_SIZE+EXC_EA(%sp),LOCAL_SIZE+EXC_EA-0xc(%sp)

# now, we copy the default result to it's proper location
	mov.l		LOCAL_SIZE+FP_DST_EX(%sp),LOCAL_SIZE+0x4(%sp)
	mov.l		LOCAL_SIZE+FP_DST_HI(%sp),LOCAL_SIZE+0x8(%sp)
	mov.l		LOCAL_SIZE+FP_DST_LO(%sp),LOCAL_SIZE+0xc(%sp)

	add.l		&LOCAL_SIZE-0x8,%sp


	bra.l		_real_inex

#########################################################################

#
# if we're stuffing a source operand back into an fsave frame then we
# have to make sure that for single or double source operands that the
# format stuffed is as weird as the hardware usually makes it.
#
	global		funimp_skew
funimp_skew:
	bfextu		EXC_EXTWORD(%a6){&3:&3},%d0 # extract src specifier
	cmpi.b		%d0,&0x1		# was src sgl?
	beq.b		funimp_skew_sgl		# yes
	cmpi.b		%d0,&0x5		# was src dbl?
	beq.b		funimp_skew_dbl		# yes
	rts

funimp_skew_sgl:
	mov.w		FP_SRC_EX(%a6),%d0	# fetch DENORM exponent
	andi.w		&0x7fff,%d0		# strip sign
	beq.b		funimp_skew_sgl_not
	cmpi.w		%d0,&0x3f80
	bgt.b		funimp_skew_sgl_not		
	neg.w		%d0			# make exponent negative
	addi.w		&0x3f81,%d0		# find amt to shift
	mov.l		FP_SRC_HI(%a6),%d1	# fetch DENORM hi(man)
	lsr.l		%d0,%d1			# shift it
	bset		&31,%d1			# set j-bit
	mov.l		%d1,FP_SRC_HI(%a6)	# insert new hi(man)
	andi.w		&0x8000,FP_SRC_EX(%a6)	# clear old exponent
	ori.w		&0x3f80,FP_SRC_EX(%a6)	# insert new "skewed" exponent
funimp_skew_sgl_not:
	rts

funimp_skew_dbl:
	mov.w		FP_SRC_EX(%a6),%d0	# fetch DENORM exponent
	andi.w		&0x7fff,%d0		# strip sign
	beq.b		funimp_skew_dbl_not
	cmpi.w		%d0,&0x3c00
	bgt.b		funimp_skew_dbl_not		

	tst.b		FP_SRC_EX(%a6)		# make "internal format"
	smi.b		0x2+FP_SRC(%a6)
	mov.w		%d0,FP_SRC_EX(%a6)	# insert exponent with cleared sign
	clr.l		%d0			# clear g,r,s
	lea		FP_SRC(%a6),%a0		# pass ptr to src op
	mov.w		&0x3c01,%d1		# pass denorm threshold
	bsr.l		dnrm_lp			# denorm it
	mov.w		&0x3c00,%d0		# new exponent
	tst.b		0x2+FP_SRC(%a6)		# is sign set?
	beq.b		fss_dbl_denorm_done	# no
	bset		&15,%d0			# set sign
fss_dbl_denorm_done:
	bset		&0x7,FP_SRC_HI(%a6)	# set j-bit
	mov.w		%d0,FP_SRC_EX(%a6)	# insert new exponent
funimp_skew_dbl_not:
	rts

#########################################################################
	global		_mem_write2
_mem_write2:
	btst		&0x5,EXC_SR(%a6)
	beq.l		_dmem_write
	mov.l		0x0(%a0),FP_DST_EX(%a6)
	mov.l		0x4(%a0),FP_DST_HI(%a6)
	mov.l		0x8(%a0),FP_DST_LO(%a6)
	clr.l		%d1
	rts

#########################################################################
# XDEF ****************************************************************	#
#	_fpsp_effadd(): 060FPSP entry point for FP "Unimplemented	#
#		     	effective address" exception.			#
#									#
#	This handler should be the first code executed upon taking the	#
#	FP Unimplemented Effective Address exception in an operating	#
#	system.								#
#									#
# XREF ****************************************************************	#
#	_imem_read_long() - read instruction longword			#
#	fix_skewed_ops() - adjust src operand in fsave frame		#
#	set_tag_x() - determine optype of src/dst operands		#
#	store_fpreg() - store opclass 0 or 2 result to FP regfile	#
#	unnorm_fix() - change UNNORM operands to NORM or ZERO		#
#	load_fpn2() - load dst operand from FP regfile			#
#	tbl_unsupp - add of table of emulation routines for opclass 0,2	#
#	decbin() - convert packed data to FP binary data		#
#	_real_fpu_disabled() - "callout" for "FPU disabled" exception	#
#	_real_access() - "callout" for access error exception		#
#	_mem_read() - read extended immediate operand from memory	#
#	_fpsp_done() - "callout" for exit; work all done		#
#	_real_trace() - "callout" for Trace enabled exception		#
#	fmovm_dynamic() - emulate dynamic fmovm instruction		#
#	fmovm_ctrl() - emulate fmovm control instruction		#
#									#
# INPUT ***************************************************************	#
#	- The system stack contains the "Unimplemented <ea>" stk frame	#
# 									#
# OUTPUT **************************************************************	#
#	If access error:						#
#	- The system stack is changed to an access error stack frame	#
#	If FPU disabled:						#
#	- The system stack is changed to an FPU disabled stack frame	#
#	If Trace exception enabled:					#
#	- The system stack is changed to a Trace exception stack frame	#
#	Else: (normal case)						#
#	- None (correct result has been stored as appropriate)		#
#									#
# ALGORITHM ***********************************************************	#
#	This exception handles 3 types of operations:			#
# (1) FP Instructions using extended precision or packed immediate	#
#     addressing mode.							#
# (2) The "fmovm.x" instruction w/ dynamic register specification.	#
# (3) The "fmovm.l" instruction w/ 2 or 3 control registers.		#
#									#
#	For immediate data operations, the data is read in w/ a		#
# _mem_read() "callout", converted to FP binary (if packed), and used	#
# as the source operand to the instruction specified by the instruction	#
# word. If no FP exception should be reported ads a result of the 	#
# emulation, then the result is stored to the destination register and	#
# the handler exits through _fpsp_done(). If an enabled exc has been	#
# signalled as a result of emulation, then an fsave state frame		#
# corresponding to the FP exception type must be entered into the 060	#
# FPU before exiting. In either the enabled or disabled cases, we 	#
# must also check if a Trace exception is pending, in which case, we	#
# must create a Trace exception stack frame from the current exception	#
# stack frame. If no Trace is pending, we simply exit through		#
# _fpsp_done().								#
#	For "fmovm.x", call the routine fmovm_dynamic() which will 	#
# decode and emulate the instruction. No FP exceptions can be pending	#
# as a result of this operation emulation. A Trace exception can be	#
# pending, though, which means the current stack frame must be changed	#
# to a Trace stack frame and an exit made through _real_trace().	#
# For the case of "fmovm.x Dn,-(a7)", where the offending instruction	#
# was executed from supervisor mode, this handler must store the FP	#
# register file values to the system stack by itself since		#
# fmovm_dynamic() can't handle this. A normal exit is made through	#
# fpsp_done().								#
#	For "fmovm.l", fmovm_ctrl() is used to emulate the instruction.	#
# Again, a Trace exception may be pending and an exit made through	#
# _real_trace(). Else, a normal exit is made through _fpsp_done().	#
#									#
#	Before any of the above is attempted, it must be checked to	#
# see if the FPU is disabled. Since the "Unimp <ea>" exception is taken	#
# before the "FPU disabled" exception, but the "FPU disabled" exception	#
# has higher priority, we check the disabled bit in the PCR. If set,	#
# then we must create an 8 word "FPU disabled" exception stack frame	#
# from the current 4 word exception stack frame. This includes 		#
# reproducing the effective address of the instruction to put on the 	#
# new stack frame.							#
#									#
# 	In the process of all emulation work, if a _mem_read()		#
# "callout" returns a failing result indicating an access error, then	#
# we must create an access error stack frame from the current stack	#
# frame. This information includes a faulting address and a fault-	#
# status-longword. These are created within this handler.		#
#									#
#########################################################################

	global		_fpsp_effadd
_fpsp_effadd:

# This exception type takes priority over the "Line F Emulator"
# exception. Therefore, the FPU could be disabled when entering here.
# So, we must check to see if it's disabled and handle that case separately.
	mov.l		%d0,-(%sp)		# save d0
	movc		%pcr,%d0		# load proc cr
	btst		&0x1,%d0		# is FPU disabled?
	bne.w		iea_disabled		# yes
	mov.l		(%sp)+,%d0		# restore d0

	link		%a6,&-LOCAL_SIZE	# init stack frame

	movm.l		&0x0303,EXC_DREGS(%a6)	# save d0-d1/a0-a1
	fmovm.l		%fpcr,%fpsr,%fpiar,USER_FPCR(%a6) # save ctrl regs
	fmovm.x		&0xc0,EXC_FPREGS(%a6)	# save fp0-fp1 on stack

# PC of instruction that took the exception is the PC in the frame
	mov.l		EXC_PC(%a6),EXC_EXTWPTR(%a6)

	mov.l		EXC_EXTWPTR(%a6),%a0	# fetch instruction addr
	addq.l		&0x4,EXC_EXTWPTR(%a6)	# incr instruction ptr
	bsr.l		_imem_read_long		# fetch the instruction words
	mov.l		%d0,EXC_OPWORD(%a6)	# store OPWORD and EXTWORD

#########################################################################

	tst.w		%d0			# is operation fmovem?
	bmi.w		iea_fmovm		# yes

#
# here, we will have:
# 	fabs	fdabs	fsabs		facos		fmod
#	fadd	fdadd	fsadd		fasin		frem
# 	fcmp				fatan		fscale
#	fdiv	fddiv	fsdiv		fatanh		fsin
#	fint				fcos		fsincos
#	fintrz				fcosh		fsinh
#	fmove	fdmove	fsmove		fetox		ftan
# 	fmul	fdmul	fsmul		fetoxm1		ftanh
#	fneg	fdneg	fsneg		fgetexp		ftentox
#	fsgldiv				fgetman		ftwotox
# 	fsglmul				flog10
# 	fsqrt				flog2
#	fsub	fdsub	fssub		flogn
#	ftst				flognp1
# which can all use f<op>.{x,p}
# so, now it's immediate data extended precision AND PACKED FORMAT!
#
iea_op:
	andi.l		&0x00ff00ff,USER_FPSR(%a6)

	btst		&0xa,%d0		# is src fmt x or p?
	bne.b		iea_op_pack		# packed


	mov.l		EXC_EXTWPTR(%a6),%a0	# pass: ptr to #<data>
	lea		FP_SRC(%a6),%a1		# pass: ptr to super addr
	mov.l		&0xc,%d0		# pass: 12 bytes
	bsr.l		_imem_read		# read extended immediate

	tst.l		%d1			# did ifetch fail?
	bne.w		iea_iacc		# yes

	bra.b		iea_op_setsrc

iea_op_pack:

	mov.l		EXC_EXTWPTR(%a6),%a0	# pass: ptr to #<data>
	lea		FP_SRC(%a6),%a1		# pass: ptr to super dst
	mov.l		&0xc,%d0		# pass: 12 bytes
	bsr.l		_imem_read		# read packed operand

	tst.l		%d1			# did ifetch fail?
	bne.w		iea_iacc		# yes

# The packed operand is an INF or a NAN if the exponent field is all ones.
	bfextu		FP_SRC(%a6){&1:&15},%d0	# get exp
	cmpi.w		%d0,&0x7fff		# INF or NAN?
	beq.b		iea_op_setsrc		# operand is an INF or NAN

# The packed operand is a zero if the mantissa is all zero, else it's
# a normal packed op.
	mov.b		3+FP_SRC(%a6),%d0	# get byte 4
	andi.b		&0x0f,%d0		# clear all but last nybble
	bne.b		iea_op_gp_not_spec	# not a zero
	tst.l		FP_SRC_HI(%a6)		# is lw 2 zero?
	bne.b		iea_op_gp_not_spec	# not a zero
	tst.l		FP_SRC_LO(%a6)		# is lw 3 zero?
	beq.b		iea_op_setsrc		# operand is a ZERO
iea_op_gp_not_spec:
	lea		FP_SRC(%a6),%a0		# pass: ptr to packed op
	bsr.l		decbin			# convert to extended
	fmovm.x		&0x80,FP_SRC(%a6)	# make this the srcop

iea_op_setsrc:
	addi.l		&0xc,EXC_EXTWPTR(%a6)	# update extension word pointer

# FP_SRC now holds the src operand.
	lea		FP_SRC(%a6),%a0		# pass: ptr to src op
	bsr.l		set_tag_x		# tag the operand type
	mov.b		%d0,STAG(%a6)		# could be ANYTHING!!!
	cmpi.b		%d0,&UNNORM		# is operand an UNNORM?
	bne.b		iea_op_getdst		# no
	bsr.l		unnorm_fix		# yes; convert to NORM/DENORM/ZERO
	mov.b		%d0,STAG(%a6)		# set new optype tag
iea_op_getdst:
	clr.b		STORE_FLG(%a6)		# clear "store result" boolean

	btst		&0x5,1+EXC_CMDREG(%a6)	# is operation monadic or dyadic?
	beq.b		iea_op_extract		# monadic
	btst		&0x4,1+EXC_CMDREG(%a6)	# is operation fsincos,ftst,fcmp?
	bne.b		iea_op_spec		# yes

iea_op_loaddst:
	bfextu		EXC_CMDREG(%a6){&6:&3},%d0 # fetch dst regno
	bsr.l		load_fpn2		# load dst operand

	lea		FP_DST(%a6),%a0		# pass: ptr to dst op
	bsr.l		set_tag_x		# tag the operand type
	mov.b		%d0,DTAG(%a6)		# could be ANYTHING!!!
	cmpi.b		%d0,&UNNORM		# is operand an UNNORM?
	bne.b		iea_op_extract		# no
	bsr.l		unnorm_fix		# yes; convert to NORM/DENORM/ZERO
	mov.b		%d0,DTAG(%a6)		# set new optype tag
	bra.b		iea_op_extract

# the operation is fsincos, ftst, or fcmp. only fcmp is dyadic
iea_op_spec:
	btst		&0x3,1+EXC_CMDREG(%a6)	# is operation fsincos?
	beq.b		iea_op_extract		# yes
# now, we're left with ftst and fcmp. so, first let's tag them so that they don't
# store a result. then, only fcmp will branch back and pick up a dst operand.
	st		STORE_FLG(%a6)		# don't store a final result
	btst		&0x1,1+EXC_CMDREG(%a6)	# is operation fcmp?
	beq.b		iea_op_loaddst		# yes	
	
iea_op_extract:
	clr.l		%d0
	mov.b		FPCR_MODE(%a6),%d0	# pass: rnd mode,prec

	mov.b		1+EXC_CMDREG(%a6),%d1
	andi.w		&0x007f,%d1		# extract extension

	fmov.l		&0x0,%fpcr
	fmov.l		&0x0,%fpsr

	lea		FP_SRC(%a6),%a0
	lea		FP_DST(%a6),%a1

	mov.l		(tbl_unsupp.l,%pc,%d1.w*4),%d1 # fetch routine addr
	jsr		(tbl_unsupp.l,%pc,%d1.l*1)

#
# Exceptions in order of precedence:
#	BSUN	: none
#	SNAN	: all operations
#	OPERR	: all reg-reg or mem-reg operations that can normally operr
#	OVFL	: same as OPERR
#	UNFL	: same as OPERR
#	DZ	: same as OPERR
#	INEX2	: same as OPERR
#	INEX1	: all packed immediate operations
#

# we determine the highest priority exception(if any) set by the
# emulation routine that has also been enabled by the user.
	mov.b		FPCR_ENABLE(%a6),%d0	# fetch exceptions enabled
	bne.b		iea_op_ena		# some are enabled

# now, we save the result, unless, of course, the operation was ftst or fcmp.
# these don't save results.
iea_op_save:
	tst.b		STORE_FLG(%a6)		# does this op store a result?
	bne.b		iea_op_exit1		# exit with no frestore

iea_op_store:
	bfextu		EXC_CMDREG(%a6){&6:&3},%d0 # fetch dst regno
	bsr.l		store_fpreg		# store the result

iea_op_exit1:
	mov.l		EXC_PC(%a6),USER_FPIAR(%a6) # set FPIAR to "Current PC"
	mov.l		EXC_EXTWPTR(%a6),EXC_PC(%a6) # set "Next PC" in exc frame

	fmovm.x		EXC_FPREGS(%a6),&0xc0	# restore fp0-fp1
	fmovm.l		USER_FPCR(%a6),%fpcr,%fpsr,%fpiar # restore ctrl regs
	movm.l		EXC_DREGS(%a6),&0x0303	# restore d0-d1/a0-a1

	unlk		%a6			# unravel the frame

	btst		&0x7,(%sp)		# is trace on?
	bne.w		iea_op_trace		# yes

	bra.l		_fpsp_done		# exit to os

iea_op_ena:
	and.b		FPSR_EXCEPT(%a6),%d0	# keep only ones enable and set
	bfffo		%d0{&24:&8},%d0		# find highest priority exception
	bne.b		iea_op_exc		# at least one was set

# no exception occurred. now, did a disabled, exact overflow occur with inexact
# enabled? if so, then we have to stuff an overflow frame into the FPU.
	btst		&ovfl_bit,FPSR_EXCEPT(%a6) # did overflow occur?
	beq.b		iea_op_save

iea_op_ovfl:
	btst		&inex2_bit,FPCR_ENABLE(%a6) # is inexact enabled?
	beq.b		iea_op_store		# no
	bra.b		iea_op_exc_ovfl		# yes
	
# an enabled exception occurred. we have to insert the exception type back into
# the machine.
iea_op_exc:
	subi.l		&24,%d0			# fix offset to be 0-8
	cmpi.b		%d0,&0x6		# is exception INEX?
	bne.b		iea_op_exc_force	# no

# the enabled exception was inexact. so, if it occurs with an overflow
# or underflow that was disabled, then we have to force an overflow or
# underflow frame.
	btst		&ovfl_bit,FPSR_EXCEPT(%a6) # did overflow occur?
	bne.b		iea_op_exc_ovfl		# yes
	btst		&unfl_bit,FPSR_EXCEPT(%a6) # did underflow occur?
	bne.b		iea_op_exc_unfl		# yes

iea_op_exc_force:
	mov.w		(tbl_iea_except.b,%pc,%d0.w*2),2+FP_SRC(%a6)
	bra.b		iea_op_exit2		# exit with frestore

tbl_iea_except:
	short		0xe002, 0xe006, 0xe004, 0xe005
	short		0xe003, 0xe002, 0xe001, 0xe001

iea_op_exc_ovfl:
	mov.w		&0xe005,2+FP_SRC(%a6)
	bra.b		iea_op_exit2

iea_op_exc_unfl:
	mov.w		&0xe003,2+FP_SRC(%a6)

iea_op_exit2:
	mov.l		EXC_PC(%a6),USER_FPIAR(%a6) # set FPIAR to "Current PC"
	mov.l		EXC_EXTWPTR(%a6),EXC_PC(%a6) # set "Next PC" in exc frame

	fmovm.x		EXC_FPREGS(%a6),&0xc0	# restore fp0-fp1
	fmovm.l		USER_FPCR(%a6),%fpcr,%fpsr,%fpiar # restore ctrl regs
	movm.l		EXC_DREGS(%a6),&0x0303	# restore d0-d1/a0-a1

	frestore 	FP_SRC(%a6)		# restore exceptional state

	unlk		%a6			# unravel the frame

	btst		&0x7,(%sp)		# is trace on?
	bne.b		iea_op_trace		# yes

	bra.l		_fpsp_done		# exit to os
	
#
# The opclass two instruction that took an "Unimplemented Effective Address"
# exception was being traced. Make the "current" PC the FPIAR and put it in
# the trace stack frame then jump to _real_trace().
#					
#		 UNIMP EA FRAME		   TRACE FRAME
#		*****************	*****************
#		* 0x0 *  0x0f0	*	*    Current	*
#		*****************	*      PC	*
#		*    Current	*	*****************
#		*      PC	*	* 0x2 *  0x024	*
#		*****************	*****************
#		*      SR	*	*     Next	*
#		*****************	*      PC	*
#					*****************
#					*      SR	*
#					*****************
iea_op_trace:
	mov.l		(%sp),-(%sp)		# shift stack frame "down"
	mov.w		0x8(%sp),0x4(%sp)
	mov.w		&0x2024,0x6(%sp)	# stk fmt = 0x2; voff = 0x024
	fmov.l		%fpiar,0x8(%sp)		# "Current PC" is in FPIAR

	bra.l		_real_trace

#########################################################################
iea_fmovm:
	btst		&14,%d0			# ctrl or data reg
	beq.w		iea_fmovm_ctrl

iea_fmovm_data:

	btst		&0x5,EXC_SR(%a6)	# user or supervisor mode
	bne.b		iea_fmovm_data_s

iea_fmovm_data_u:
	mov.l		%usp,%a0
	mov.l		%a0,EXC_A7(%a6)		# store current a7	
	bsr.l		fmovm_dynamic		# do dynamic fmovm
	mov.l		EXC_A7(%a6),%a0		# load possibly new a7
	mov.l		%a0,%usp		# update usp
	bra.w		iea_fmovm_exit

iea_fmovm_data_s:
	clr.b		SPCOND_FLG(%a6)
	lea		0x2+EXC_VOFF(%a6),%a0
	mov.l		%a0,EXC_A7(%a6)
	bsr.l		fmovm_dynamic		# do dynamic fmovm

	cmpi.b		SPCOND_FLG(%a6),&mda7_flg
	beq.w		iea_fmovm_data_predec
	cmpi.b		SPCOND_FLG(%a6),&mia7_flg
	bne.w		iea_fmovm_exit

# right now, d0 = the size.
# the data has been fetched from the supervisor stack, but we have not
# incremented the stack pointer by the appropriate number of bytes.
# do it here.
iea_fmovm_data_postinc:
	btst		&0x7,EXC_SR(%a6)
	bne.b		iea_fmovm_data_pi_trace

	mov.w		EXC_SR(%a6),(EXC_SR,%a6,%d0)
	mov.l		EXC_EXTWPTR(%a6),(EXC_PC,%a6,%d0)
	mov.w		&0x00f0,(EXC_VOFF,%a6,%d0)

	lea		(EXC_SR,%a6,%d0),%a0
	mov.l		%a0,EXC_SR(%a6)
	
	fmovm.x		EXC_FP0(%a6),&0xc0	# restore fp0-fp1
	fmovm.l		USER_FPCR(%a6),%fpcr,%fpsr,%fpiar # restore ctrl regs
 	movm.l		EXC_DREGS(%a6),&0x0303 	# restore d0-d1/a0-a1

	unlk		%a6
	mov.l		(%sp)+,%sp
	bra.l		_fpsp_done

iea_fmovm_data_pi_trace:
	mov.w		EXC_SR(%a6),(EXC_SR-0x4,%a6,%d0)
	mov.l		EXC_EXTWPTR(%a6),(EXC_PC-0x4,%a6,%d0)
	mov.w		&0x2024,(EXC_VOFF-0x4,%a6,%d0)
	mov.l		EXC_PC(%a6),(EXC_VOFF+0x2-0x4,%a6,%d0)

	lea		(EXC_SR-0x4,%a6,%d0),%a0
	mov.l		%a0,EXC_SR(%a6)
	
	fmovm.x		EXC_FP0(%a6),&0xc0	# restore fp0-fp1
	fmovm.l		USER_FPCR(%a6),%fpcr,%fpsr,%fpiar # restore ctrl regs
 	movm.l		EXC_DREGS(%a6),&0x0303 	# restore d0-d1/a0-a1

	unlk		%a6
	mov.l		(%sp)+,%sp
	bra.l		_real_trace
	
# right now, d1 = size and d0 = the strg.
iea_fmovm_data_predec:
	mov.b		%d1,EXC_VOFF(%a6)	# store strg
	mov.b		%d0,0x1+EXC_VOFF(%a6)	# store size

	fmovm.x		EXC_FP0(%a6),&0xc0	# restore fp0-fp1
	fmovm.l		USER_FPCR(%a6),%fpcr,%fpsr,%fpiar # restore ctrl regs
 	movm.l		EXC_DREGS(%a6),&0x0303 	# restore d0-d1/a0-a1

	mov.l		(%a6),-(%sp)		# make a copy of a6
	mov.l		%d0,-(%sp)		# save d0
	mov.l		%d1,-(%sp)		# save d1
	mov.l		EXC_EXTWPTR(%a6),-(%sp)	# make a copy of Next PC

	clr.l		%d0
	mov.b		0x1+EXC_VOFF(%a6),%d0	# fetch size
	neg.l		%d0			# get negative of size

	btst		&0x7,EXC_SR(%a6)	# is trace enabled?
	beq.b		iea_fmovm_data_p2

	mov.w		EXC_SR(%a6),(EXC_SR-0x4,%a6,%d0)
	mov.l		EXC_PC(%a6),(EXC_VOFF-0x2,%a6,%d0)
	mov.l		(%sp)+,(EXC_PC-0x4,%a6,%d0)
	mov.w		&0x2024,(EXC_VOFF-0x4,%a6,%d0)

	pea		(%a6,%d0)		# create final sp
	bra.b		iea_fmovm_data_p3

iea_fmovm_data_p2:
	mov.w		EXC_SR(%a6),(EXC_SR,%a6,%d0)
	mov.l		(%sp)+,(EXC_PC,%a6,%d0)
	mov.w		&0x00f0,(EXC_VOFF,%a6,%d0)

	pea		(0x4,%a6,%d0)		# create final sp

iea_fmovm_data_p3:
	clr.l		%d1
	mov.b		EXC_VOFF(%a6),%d1	# fetch strg

	tst.b		%d1
	bpl.b		fm_1
	fmovm.x		&0x80,(0x4+0x8,%a6,%d0)
	addi.l		&0xc,%d0
fm_1:
	lsl.b		&0x1,%d1
	bpl.b		fm_2
	fmovm.x		&0x40,(0x4+0x8,%a6,%d0)
	addi.l		&0xc,%d0
fm_2:
	lsl.b		&0x1,%d1
	bpl.b		fm_3
	fmovm.x		&0x20,(0x4+0x8,%a6,%d0)
	addi.l		&0xc,%d0
fm_3:
	lsl.b		&0x1,%d1
	bpl.b		fm_4
	fmovm.x		&0x10,(0x4+0x8,%a6,%d0)
	addi.l		&0xc,%d0
fm_4:
	lsl.b		&0x1,%d1
	bpl.b		fm_5
	fmovm.x		&0x08,(0x4+0x8,%a6,%d0)
	addi.l		&0xc,%d0
fm_5:
	lsl.b		&0x1,%d1
	bpl.b		fm_6
	fmovm.x		&0x04,(0x4+0x8,%a6,%d0)
	addi.l		&0xc,%d0
fm_6:
	lsl.b		&0x1,%d1
	bpl.b		fm_7
	fmovm.x		&0x02,(0x4+0x8,%a6,%d0)
	addi.l		&0xc,%d0
fm_7:
	lsl.b		&0x1,%d1
	bpl.b		fm_end
	fmovm.x		&0x01,(0x4+0x8,%a6,%d0)
fm_end:
	mov.l		0x4(%sp),%d1
	mov.l		0x8(%sp),%d0
	mov.l		0xc(%sp),%a6
	mov.l		(%sp)+,%sp

	btst		&0x7,(%sp)		# is trace enabled?
	beq.l		_fpsp_done
	bra.l		_real_trace

#########################################################################
iea_fmovm_ctrl:

	bsr.l		fmovm_ctrl		# load ctrl regs

iea_fmovm_exit:
	fmovm.x		EXC_FPREGS(%a6),&0xc0	# restore fp0-fp1
	fmovm.l		USER_FPCR(%a6),%fpcr,%fpsr,%fpiar # restore ctrl regs
	movm.l		EXC_DREGS(%a6),&0x0303	# restore d0-d1/a0-a1

	btst		&0x7,EXC_SR(%a6)	# is trace on?
	bne.b		iea_fmovm_trace		# yes

	mov.l		EXC_EXTWPTR(%a6),EXC_PC(%a6) # set Next PC

	unlk		%a6			# unravel the frame

	bra.l		_fpsp_done		# exit to os

#
# The control reg instruction that took an "Unimplemented Effective Address"
# exception was being traced. The "Current PC" for the trace frame is the 
# PC stacked for Unimp EA. The "Next PC" is in EXC_EXTWPTR.
# After fixing the stack frame, jump to _real_trace().
#					
#		 UNIMP EA FRAME		   TRACE FRAME
#		*****************	*****************
#		* 0x0 *  0x0f0	*	*    Current	*
#		*****************	*      PC	*
#		*    Current	*	*****************
#		*      PC	*	* 0x2 *  0x024	*
#		*****************	*****************
#		*      SR	*	*     Next	*
#		*****************	*      PC	*
#					*****************
#					*      SR	*
#					*****************
# this ain't a pretty solution, but it works:
# -restore a6 (not with unlk)
# -shift stack frame down over where old a6 used to be
# -add LOCAL_SIZE to stack pointer
iea_fmovm_trace:
	mov.l		(%a6),%a6		# restore frame pointer
	mov.w		EXC_SR+LOCAL_SIZE(%sp),0x0+LOCAL_SIZE(%sp)
	mov.l		EXC_PC+LOCAL_SIZE(%sp),0x8+LOCAL_SIZE(%sp)
	mov.l		EXC_EXTWPTR+LOCAL_SIZE(%sp),0x2+LOCAL_SIZE(%sp)
	mov.w		&0x2024,0x6+LOCAL_SIZE(%sp) # stk fmt = 0x2; voff = 0x024
	add.l		&LOCAL_SIZE,%sp		# clear stack frame

	bra.l		_real_trace

#########################################################################
# The FPU is disabled and so we should really have taken the "Line
# F Emulator" exception. So, here we create an 8-word stack frame
# from our 4-word stack frame. This means we must calculate the length
# the faulting instruction to get the "next PC". This is trivial for
# immediate operands but requires some extra work for fmovm dynamic
# which can use most addressing modes.
iea_disabled:
	mov.l		(%sp)+,%d0		# restore d0

	link		%a6,&-LOCAL_SIZE	# init stack frame

	movm.l		&0x0303,EXC_DREGS(%a6)	# save d0-d1/a0-a1

# PC of instruction that took the exception is the PC in the frame
	mov.l		EXC_PC(%a6),EXC_EXTWPTR(%a6)
	mov.l		EXC_EXTWPTR(%a6),%a0	# fetch instruction addr
	addq.l		&0x4,EXC_EXTWPTR(%a6)	# incr instruction ptr
	bsr.l		_imem_read_long		# fetch the instruction words
	mov.l		%d0,EXC_OPWORD(%a6)	# store OPWORD and EXTWORD

	tst.w		%d0			# is instr fmovm?
	bmi.b		iea_dis_fmovm		# yes
# instruction is using an extended precision immediate operand. therefore,
# the total instruction length is 16 bytes.
iea_dis_immed:
	mov.l		&0x10,%d0		# 16 bytes of instruction
	bra.b		iea_dis_cont
iea_dis_fmovm:
	btst		&0xe,%d0		# is instr fmovm ctrl
	bne.b		iea_dis_fmovm_data	# no
# the instruction is a fmovm.l with 2 or 3 registers.
	bfextu		%d0{&19:&3},%d1
	mov.l		&0xc,%d0
	cmpi.b		%d1,&0x7		# move all regs?
	bne.b		iea_dis_cont
	addq.l		&0x4,%d0
	bra.b		iea_dis_cont
# the instruction is an fmovm.x dynamic which can use many addressing
# modes and thus can have several different total instruction lengths.
# call fmovm_calc_ea which will go through the ea calc process and,
# as a by-product, will tell us how long the instruction is.
iea_dis_fmovm_data:
	clr.l		%d0
	bsr.l		fmovm_calc_ea
	mov.l		EXC_EXTWPTR(%a6),%d0
	sub.l		EXC_PC(%a6),%d0
iea_dis_cont:
	mov.w		%d0,EXC_VOFF(%a6)	# store stack shift value

	movm.l		EXC_DREGS(%a6),&0x0303	# restore d0-d1/a0-a1

	unlk		%a6

# here, we actually create the 8-word frame from the 4-word frame,
# with the "next PC" as additional info.
# the <ea> field is let as undefined.
	subq.l		&0x8,%sp		# make room for new stack
	mov.l		%d0,-(%sp)		# save d0
	mov.w		0xc(%sp),0x4(%sp)	# move SR
	mov.l		0xe(%sp),0x6(%sp)	# move Current PC
	clr.l		%d0
	mov.w		0x12(%sp),%d0
	mov.l		0x6(%sp),0x10(%sp)	# move Current PC
	add.l		%d0,0x6(%sp)		# make Next PC
	mov.w		&0x402c,0xa(%sp)	# insert offset,frame format
	mov.l		(%sp)+,%d0		# restore d0

	bra.l		_real_fpu_disabled

##########

iea_iacc:
	movc		%pcr,%d0
	btst		&0x1,%d0
	bne.b		iea_iacc_cont
	fmovm.l		USER_FPCR(%a6),%fpcr,%fpsr,%fpiar # restore ctrl regs
	fmovm.x		EXC_FPREGS(%a6),&0xc0	# restore fp0-fp1 on stack
iea_iacc_cont:
	movm.l		EXC_DREGS(%a6),&0x0303	# restore d0-d1/a0-a1

	unlk		%a6

	subq.w		&0x8,%sp		# make stack frame bigger
	mov.l		0x8(%sp),(%sp)		# store SR,hi(PC)
	mov.w		0xc(%sp),0x4(%sp)	# store lo(PC)
	mov.w		&0x4008,0x6(%sp)	# store voff
	mov.l		0x2(%sp),0x8(%sp)	# store ea
	mov.l		&0x09428001,0xc(%sp)	# store fslw

iea_acc_done:
	btst		&0x5,(%sp)		# user or supervisor mode?
	beq.b		iea_acc_done2		# user
	bset		&0x2,0xd(%sp)		# set supervisor TM bit

iea_acc_done2:
	bra.l		_real_access

iea_dacc:
	lea		-LOCAL_SIZE(%a6),%sp

	movc		%pcr,%d1
	btst		&0x1,%d1
	bne.b		iea_dacc_cont
	fmovm.x		EXC_FPREGS(%a6),&0xc0	# restore fp0-fp1 on stack
	fmovm.l		LOCAL_SIZE+USER_FPCR(%sp),%fpcr,%fpsr,%fpiar # restore ctrl regs
iea_dacc_cont:
	mov.l		(%a6),%a6

	mov.l		0x4+LOCAL_SIZE(%sp),-0x8+0x4+LOCAL_SIZE(%sp)
	mov.w		0x8+LOCAL_SIZE(%sp),-0x8+0x8+LOCAL_SIZE(%sp)
	mov.w		&0x4008,-0x8+0xa+LOCAL_SIZE(%sp)
	mov.l		%a0,-0x8+0xc+LOCAL_SIZE(%sp)
	mov.w		%d0,-0x8+0x10+LOCAL_SIZE(%sp)
	mov.w		&0x0001,-0x8+0x12+LOCAL_SIZE(%sp)

	movm.l		LOCAL_SIZE+EXC_DREGS(%sp),&0x0303 # restore d0-d1/a0-a1
	add.w		&LOCAL_SIZE-0x4,%sp

	bra.b		iea_acc_done

#########################################################################
# XDEF ****************************************************************	#
#	_fpsp_operr(): 060FPSP entry point for FP Operr exception.	#
#									#
#	This handler should be the first code executed upon taking the	#
# 	FP Operand Error exception in an operating system.		#
#									#
# XREF ****************************************************************	#
#	_imem_read_long() - read instruction longword			#
#	fix_skewed_ops() - adjust src operand in fsave frame		#
#	_real_operr() - "callout" to operating system operr handler	#
#	_dmem_write_{byte,word,long}() - store data to mem (opclass 3)	#
#	store_dreg_{b,w,l}() - store data to data regfile (opclass 3)	#
#	facc_out_{b,w,l}() - store to memory took access error (opcl 3)	#
#									#
# INPUT ***************************************************************	#
#	- The system stack contains the FP Operr exception frame	#
#	- The fsave frame contains the source operand			#
# 									#
# OUTPUT **************************************************************	#
#	No access error:						#
#	- The system stack is unchanged					#
#	- The fsave frame contains the adjusted src op for opclass 0,2	#
#									#
# ALGORITHM ***********************************************************	#
#	In a system where the FP Operr exception is enabled, the goal	#
# is to get to the handler specified at _real_operr(). But, on the 060,	#
# for opclass zero and two instruction taking this exception, the 	#
# input operand in the fsave frame may be incorrect for some cases	#
# and needs to be corrected. This handler calls fix_skewed_ops() to	#
# do just this and then exits through _real_operr().			#
#	For opclass 3 instructions, the 060 doesn't store the default	#
# operr result out to memory or data register file as it should.	#
# This code must emulate the move out before finally exiting through	#
# _real_inex(). The move out, if to memory, is performed using 		#
# _mem_write() "callout" routines that may return a failing result.	#
# In this special case, the handler must exit through facc_out() 	#
# which creates an access error stack frame from the current operr	#
# stack frame.								#
#									#
#########################################################################

	global		_fpsp_operr
_fpsp_operr:

	link.w		%a6,&-LOCAL_SIZE	# init stack frame

	fsave		FP_SRC(%a6)		# grab the "busy" frame

 	movm.l		&0x0303,EXC_DREGS(%a6)	# save d0-d1/a0-a1
	fmovm.l		%fpcr,%fpsr,%fpiar,USER_FPCR(%a6) # save ctrl regs
 	fmovm.x		&0xc0,EXC_FPREGS(%a6)	# save fp0-fp1 on stack

# the FPIAR holds the "current PC" of the faulting instruction
	mov.l		USER_FPIAR(%a6),EXC_EXTWPTR(%a6)
	
	mov.l		EXC_EXTWPTR(%a6),%a0	# fetch instruction addr
	addq.l		&0x4,EXC_EXTWPTR(%a6)	# incr instruction ptr
	bsr.l		_imem_read_long		# fetch the instruction words
	mov.l		%d0,EXC_OPWORD(%a6)

##############################################################################

	btst		&13,%d0			# is instr an fmove out?
	bne.b		foperr_out		# fmove out


# here, we simply see if the operand in the fsave frame needs to be "unskewed".
# this would be the case for opclass two operations with a source infinity or
# denorm operand in the sgl or dbl format. NANs also become skewed, but can't 
# cause an operr so we don't need to check for them here.
	lea		FP_SRC(%a6),%a0		# pass: ptr to src op
	bsr.l		fix_skewed_ops		# fix src op

foperr_exit:
	fmovm.x		EXC_FPREGS(%a6),&0xc0	# restore fp0-fp1
	fmovm.l		USER_FPCR(%a6),%fpcr,%fpsr,%fpiar # restore ctrl regs
	movm.l		EXC_DREGS(%a6),&0x0303	# restore d0-d1/a0-a1

	frestore	FP_SRC(%a6)

	unlk		%a6
	bra.l		_real_operr

########################################################################

#
# the hardware does not save the default result to memory on enabled
# operand error exceptions. we do this here before passing control to
# the user operand error handler.
#
# byte, word, and long destination format operations can pass
# through here. we simply need to test the sign of the src
# operand and save the appropriate minimum or maximum integer value
# to the effective address as pointed to by the stacked effective address.
#
# although packed opclass three operations can take operand error
# exceptions, they won't pass through here since they are caught
# first by the unsupported data format exception handler. that handler
# sends them directly to _real_operr() if necessary.
#
foperr_out:

	mov.w		FP_SRC_EX(%a6),%d1	# fetch exponent
	andi.w		&0x7fff,%d1
	cmpi.w		%d1,&0x7fff
	bne.b		foperr_out_not_qnan
# the operand is either an infinity or a QNAN.
	tst.l		FP_SRC_LO(%a6)
	bne.b		foperr_out_qnan
	mov.l		FP_SRC_HI(%a6),%d1
	andi.l		&0x7fffffff,%d1
	beq.b		foperr_out_not_qnan
foperr_out_qnan:
	mov.l		FP_SRC_HI(%a6),L_SCR1(%a6)
	bra.b		foperr_out_jmp

foperr_out_not_qnan:
	mov.l		&0x7fffffff,%d1
	tst.b		FP_SRC_EX(%a6)
	bpl.b		foperr_out_not_qnan2
	addq.l		&0x1,%d1
foperr_out_not_qnan2:
	mov.l		%d1,L_SCR1(%a6)

foperr_out_jmp:
	bfextu		%d0{&19:&3},%d0		# extract dst format field
	mov.b		1+EXC_OPWORD(%a6),%d1	# extract <ea> mode,reg
	mov.w		(tbl_operr.b,%pc,%d0.w*2),%a0
	jmp		(tbl_operr.b,%pc,%a0)

tbl_operr:
	short		foperr_out_l - tbl_operr # long word integer
	short		tbl_operr    - tbl_operr # sgl prec shouldn't happen
	short		tbl_operr    - tbl_operr # ext prec shouldn't happen
	short		foperr_exit  - tbl_operr # packed won't enter here
	short		foperr_out_w - tbl_operr # word integer
	short		tbl_operr    - tbl_operr # dbl prec shouldn't happen
	short		foperr_out_b - tbl_operr # byte integer
	short		tbl_operr    - tbl_operr # packed won't enter here
	
foperr_out_b:
	mov.b		L_SCR1(%a6),%d0		# load positive default result
	cmpi.b		%d1,&0x7		# is <ea> mode a data reg?
	ble.b		foperr_out_b_save_dn	# yes
	mov.l		EXC_EA(%a6),%a0		# pass: <ea> of default result
	bsr.l		_dmem_write_byte	# write the default result

	tst.l		%d1			# did dstore fail?
	bne.l		facc_out_b		# yes

	bra.w		foperr_exit
foperr_out_b_save_dn:
	andi.w		&0x0007,%d1
	bsr.l		store_dreg_b		# store result to regfile
	bra.w		foperr_exit

foperr_out_w:
	mov.w		L_SCR1(%a6),%d0		# load positive default result
	cmpi.b		%d1,&0x7		# is <ea> mode a data reg?
	ble.b		foperr_out_w_save_dn	# yes
	mov.l		EXC_EA(%a6),%a0		# pass: <ea> of default result
	bsr.l		_dmem_write_word	# write the default result

	tst.l		%d1			# did dstore fail?
	bne.l		facc_out_w		# yes

	bra.w		foperr_exit
foperr_out_w_save_dn:
	andi.w		&0x0007,%d1
	bsr.l		store_dreg_w		# store result to regfile
	bra.w		foperr_exit

foperr_out_l:
	mov.l		L_SCR1(%a6),%d0		# load positive default result
	cmpi.b		%d1,&0x7		# is <ea> mode a data reg?
	ble.b		foperr_out_l_save_dn	# yes
	mov.l		EXC_EA(%a6),%a0		# pass: <ea> of default result
	bsr.l		_dmem_write_long	# write the default result

	tst.l		%d1			# did dstore fail?
	bne.l		facc_out_l		# yes

	bra.w		foperr_exit
foperr_out_l_save_dn:
	andi.w		&0x0007,%d1
	bsr.l		store_dreg_l		# store result to regfile
	bra.w		foperr_exit

#########################################################################
# XDEF ****************************************************************	#
#	_fpsp_snan(): 060FPSP entry point for FP SNAN exception.	#
#									#
#	This handler should be the first code executed upon taking the	#
# 	FP Signalling NAN exception in an operating system.		#
#									#
# XREF ****************************************************************	#
#	_imem_read_long() - read instruction longword			#
#	fix_skewed_ops() - adjust src operand in fsave frame		#
#	_real_snan() - "callout" to operating system SNAN handler	#
#	_dmem_write_{byte,word,long}() - store data to mem (opclass 3)	#
#	store_dreg_{b,w,l}() - store data to data regfile (opclass 3)	#
#	facc_out_{b,w,l,d,x}() - store to mem took acc error (opcl 3)	#
#	_calc_ea_fout() - fix An if <ea> is -() or ()+; also get <ea>	#
#									#
# INPUT ***************************************************************	#
#	- The system stack contains the FP SNAN exception frame		#
#	- The fsave frame contains the source operand			#
# 									#
# OUTPUT **************************************************************	#
#	No access error:						#
#	- The system stack is unchanged					#
#	- The fsave frame contains the adjusted src op for opclass 0,2	#
#									#
# ALGORITHM ***********************************************************	#
#	In a system where the FP SNAN exception is enabled, the goal	#
# is to get to the handler specified at _real_snan(). But, on the 060,	#
# for opclass zero and two instructions taking this exception, the 	#
# input operand in the fsave frame may be incorrect for some cases	#
# and needs to be corrected. This handler calls fix_skewed_ops() to	#
# do just this and then exits through _real_snan().			#
#	For opclass 3 instructions, the 060 doesn't store the default	#
# SNAN result out to memory or data register file as it should.		#
# This code must emulate the move out before finally exiting through	#
# _real_snan(). The move out, if to memory, is performed using 		#
# _mem_write() "callout" routines that may return a failing result.	#
# In this special case, the handler must exit through facc_out() 	#
# which creates an access error stack frame from the current SNAN	#
# stack frame.								#
#	For the case of an extended precision opclass 3 instruction,	#
# if the effective addressing mode was -() or ()+, then the address	#
# register must get updated by calling _calc_ea_fout(). If the <ea>	#
# was -(a7) from supervisor mode, then the exception frame currently	#
# on the system stack must be carefully moved "down" to make room	#
# for the operand being moved.						#
#									#
#########################################################################

	global		_fpsp_snan
_fpsp_snan:

	link.w		%a6,&-LOCAL_SIZE	# init stack frame

	fsave		FP_SRC(%a6)		# grab the "busy" frame

 	movm.l		&0x0303,EXC_DREGS(%a6)	# save d0-d1/a0-a1
	fmovm.l		%fpcr,%fpsr,%fpiar,USER_FPCR(%a6) # save ctrl regs
 	fmovm.x		&0xc0,EXC_FPREGS(%a6)	# save fp0-fp1 on stack

# the FPIAR holds the "current PC" of the faulting instruction
	mov.l		USER_FPIAR(%a6),EXC_EXTWPTR(%a6)
	
	mov.l		EXC_EXTWPTR(%a6),%a0	# fetch instruction addr
	addq.l		&0x4,EXC_EXTWPTR(%a6)	# incr instruction ptr
	bsr.l		_imem_read_long		# fetch the instruction words
	mov.l		%d0,EXC_OPWORD(%a6)

##############################################################################

	btst		&13,%d0			# is instr an fmove out?
	bne.w		fsnan_out		# fmove out


# here, we simply see if the operand in the fsave frame needs to be "unskewed".
# this would be the case for opclass two operations with a source infinity or
# denorm operand in the sgl or dbl format. NANs also become skewed and must be
# fixed here.
	lea		FP_SRC(%a6),%a0		# pass: ptr to src op
	bsr.l		fix_skewed_ops		# fix src op

fsnan_exit:
	fmovm.x		EXC_FPREGS(%a6),&0xc0	# restore fp0-fp1
	fmovm.l		USER_FPCR(%a6),%fpcr,%fpsr,%fpiar # restore ctrl regs
	movm.l		EXC_DREGS(%a6),&0x0303	# restore d0-d1/a0-a1

	frestore	FP_SRC(%a6)

	unlk		%a6
	bra.l		_real_snan
		
########################################################################

#
# the hardware does not save the default result to memory on enabled
# snan exceptions. we do this here before passing control to
# the user snan handler.
#
# byte, word, long, and packed destination format operations can pass
# through here. since packed format operations already were handled by
# fpsp_unsupp(), then we need to do nothing else for them here. 
# for byte, word, and long, we simply need to test the sign of the src
# operand and save the appropriate minimum or maximum integer value
# to the effective address as pointed to by the stacked effective address.
#
fsnan_out:

	bfextu		%d0{&19:&3},%d0		# extract dst format field
	mov.b		1+EXC_OPWORD(%a6),%d1	# extract <ea> mode,reg
	mov.w		(tbl_snan.b,%pc,%d0.w*2),%a0
	jmp		(tbl_snan.b,%pc,%a0)

tbl_snan:
	short		fsnan_out_l - tbl_snan # long word integer
	short		fsnan_out_s - tbl_snan # sgl prec shouldn't happen
	short		fsnan_out_x - tbl_snan # ext prec shouldn't happen
	short		tbl_snan    - tbl_snan # packed needs no help
	short		fsnan_out_w - tbl_snan # word integer
	short		fsnan_out_d - tbl_snan # dbl prec shouldn't happen
	short		fsnan_out_b - tbl_snan # byte integer
	short		tbl_snan    - tbl_snan # packed needs no help
	
fsnan_out_b:
	mov.b		FP_SRC_HI(%a6),%d0	# load upper byte of SNAN
	bset		&6,%d0			# set SNAN bit
	cmpi.b		%d1,&0x7		# is <ea> mode a data reg?
	ble.b		fsnan_out_b_dn		# yes
	mov.l		EXC_EA(%a6),%a0		# pass: <ea> of default result
	bsr.l		_dmem_write_byte	# write the default result

	tst.l		%d1			# did dstore fail?
	bne.l		facc_out_b		# yes

	bra.w		fsnan_exit
fsnan_out_b_dn:
	andi.w		&0x0007,%d1
	bsr.l		store_dreg_b		# store result to regfile
	bra.w		fsnan_exit

fsnan_out_w:
	mov.w		FP_SRC_HI(%a6),%d0	# load upper word of SNAN
	bset		&14,%d0			# set SNAN bit
	cmpi.b		%d1,&0x7		# is <ea> mode a data reg?
	ble.b		fsnan_out_w_dn		# yes
	mov.l		EXC_EA(%a6),%a0		# pass: <ea> of default result
	bsr.l		_dmem_write_word	# write the default result

	tst.l		%d1			# did dstore fail?
	bne.l		facc_out_w		# yes

	bra.w		fsnan_exit
fsnan_out_w_dn:
	andi.w		&0x0007,%d1
	bsr.l		store_dreg_w		# store result to regfile
	bra.w		fsnan_exit

fsnan_out_l:
	mov.l		FP_SRC_HI(%a6),%d0	# load upper longword of SNAN
	bset		&30,%d0			# set SNAN bit
	cmpi.b		%d1,&0x7		# is <ea> mode a data reg?
	ble.b		fsnan_out_l_dn		# yes
	mov.l		EXC_EA(%a6),%a0		# pass: <ea> of default result
	bsr.l		_dmem_write_long	# write the default result

	tst.l		%d1			# did dstore fail?
	bne.l		facc_out_l		# yes

	bra.w		fsnan_exit
fsnan_out_l_dn:
	andi.w		&0x0007,%d1
	bsr.l		store_dreg_l		# store result to regfile
	bra.w		fsnan_exit

fsnan_out_s:
	cmpi.b		%d1,&0x7		# is <ea> mode a data reg?
	ble.b		fsnan_out_d_dn		# yes
	mov.l		FP_SRC_EX(%a6),%d0	# fetch SNAN sign
	andi.l		&0x80000000,%d0		# keep sign
	ori.l		&0x7fc00000,%d0		# insert new exponent,SNAN bit
	mov.l		FP_SRC_HI(%a6),%d1	# load mantissa
	lsr.l		&0x8,%d1		# shift mantissa for sgl
	or.l		%d1,%d0			# create sgl SNAN
	mov.l		EXC_EA(%a6),%a0		# pass: <ea> of default result
	bsr.l		_dmem_write_long	# write the default result

	tst.l		%d1			# did dstore fail?
	bne.l		facc_out_l		# yes

	bra.w		fsnan_exit
fsnan_out_d_dn:
	mov.l		FP_SRC_EX(%a6),%d0	# fetch SNAN sign
	andi.l		&0x80000000,%d0		# keep sign
	ori.l		&0x7fc00000,%d0		# insert new exponent,SNAN bit
	mov.l		%d1,-(%sp)
	mov.l		FP_SRC_HI(%a6),%d1	# load mantissa
	lsr.l		&0x8,%d1		# shift mantissa for sgl
	or.l		%d1,%d0			# create sgl SNAN
	mov.l		(%sp)+,%d1
	andi.w		&0x0007,%d1
	bsr.l		store_dreg_l		# store result to regfile
	bra.w		fsnan_exit

fsnan_out_d:
	mov.l		FP_SRC_EX(%a6),%d0	# fetch SNAN sign
	andi.l		&0x80000000,%d0		# keep sign
	ori.l		&0x7ff80000,%d0		# insert new exponent,SNAN bit
	mov.l		FP_SRC_HI(%a6),%d1	# load hi mantissa
	mov.l		%d0,FP_SCR0_EX(%a6)	# store to temp space
	mov.l		&11,%d0			# load shift amt
	lsr.l		%d0,%d1
	or.l		%d1,FP_SCR0_EX(%a6)	# create dbl hi
	mov.l		FP_SRC_HI(%a6),%d1	# load hi mantissa
	andi.l		&0x000007ff,%d1
	ror.l		%d0,%d1
	mov.l		%d1,FP_SCR0_HI(%a6)	# store to temp space
	mov.l		FP_SRC_LO(%a6),%d1	# load lo mantissa
	lsr.l		%d0,%d1
	or.l		%d1,FP_SCR0_HI(%a6)	# create dbl lo
	lea		FP_SCR0(%a6),%a0	# pass: ptr to operand
	mov.l		EXC_EA(%a6),%a1		# pass: dst addr
	movq.l		&0x8,%d0		# pass: size of 8 bytes
	bsr.l		_dmem_write		# write the default result

	tst.l		%d1			# did dstore fail?
	bne.l		facc_out_d		# yes

	bra.w		fsnan_exit

# for extended precision, if the addressing mode is pre-decrement or
# post-increment, then the address register did not get updated.
# in addition, for pre-decrement, the stacked <ea> is incorrect.
fsnan_out_x:
	clr.b		SPCOND_FLG(%a6)		# clear special case flag

	mov.w		FP_SRC_EX(%a6),FP_SCR0_EX(%a6)
	clr.w		2+FP_SCR0(%a6)
	mov.l		FP_SRC_HI(%a6),%d0
	bset		&30,%d0
	mov.l		%d0,FP_SCR0_HI(%a6)
	mov.l		FP_SRC_LO(%a6),FP_SCR0_LO(%a6)

	btst		&0x5,EXC_SR(%a6)	# supervisor mode exception?
	bne.b		fsnan_out_x_s		# yes

	mov.l		%usp,%a0		# fetch user stack pointer
	mov.l		%a0,EXC_A7(%a6)		# save on stack for calc_ea()
	mov.l		(%a6),EXC_A6(%a6)
	
	bsr.l		_calc_ea_fout		# find the correct ea,update An
	mov.l		%a0,%a1
	mov.l		%a0,EXC_EA(%a6)		# stack correct <ea>

	mov.l		EXC_A7(%a6),%a0
	mov.l		%a0,%usp		# restore user stack pointer
	mov.l		EXC_A6(%a6),(%a6)

fsnan_out_x_save:
	lea		FP_SCR0(%a6),%a0	# pass: ptr to operand
	movq.l		&0xc,%d0		# pass: size of extended
	bsr.l		_dmem_write		# write the default result

	tst.l		%d1			# did dstore fail?
	bne.l		facc_out_x		# yes

	bra.w		fsnan_exit

fsnan_out_x_s:
	mov.l		(%a6),EXC_A6(%a6)

	bsr.l		_calc_ea_fout		# find the correct ea,update An
	mov.l		%a0,%a1
	mov.l		%a0,EXC_EA(%a6)		# stack correct <ea>

	mov.l		EXC_A6(%a6),(%a6)

	cmpi.b		SPCOND_FLG(%a6),&mda7_flg # is <ea> mode -(a7)?
	bne.b		fsnan_out_x_save	# no

# the operation was "fmove.x SNAN,-(a7)" from supervisor mode.
	fmovm.x		EXC_FPREGS(%a6),&0xc0	# restore fp0-fp1
	fmovm.l		USER_FPCR(%a6),%fpcr,%fpsr,%fpiar # restore ctrl regs
	movm.l		EXC_DREGS(%a6),&0x0303	# restore d0-d1/a0-a1

	frestore	FP_SRC(%a6)

	mov.l		EXC_A6(%a6),%a6		# restore frame pointer

	mov.l		LOCAL_SIZE+EXC_SR(%sp),LOCAL_SIZE+EXC_SR-0xc(%sp)
	mov.l		LOCAL_SIZE+EXC_PC+0x2(%sp),LOCAL_SIZE+EXC_PC+0x2-0xc(%sp)
	mov.l		LOCAL_SIZE+EXC_EA(%sp),LOCAL_SIZE+EXC_EA-0xc(%sp)

	mov.l		LOCAL_SIZE+FP_SCR0_EX(%sp),LOCAL_SIZE+EXC_SR(%sp)
	mov.l		LOCAL_SIZE+FP_SCR0_HI(%sp),LOCAL_SIZE+EXC_PC+0x2(%sp)
	mov.l		LOCAL_SIZE+FP_SCR0_LO(%sp),LOCAL_SIZE+EXC_EA(%sp)

	add.l		&LOCAL_SIZE-0x8,%sp
	
	bra.l		_real_snan

#########################################################################
# XDEF ****************************************************************	#
#	_fpsp_inex(): 060FPSP entry point for FP Inexact exception.	#
#									#
#	This handler should be the first code executed upon taking the	#
# 	FP Inexact exception in an operating system.			#
#									#
# XREF ****************************************************************	#
#	_imem_read_long() - read instruction longword			#
#	fix_skewed_ops() - adjust src operand in fsave frame		#
#	set_tag_x() - determine optype of src/dst operands		#
#	store_fpreg() - store opclass 0 or 2 result to FP regfile	#
#	unnorm_fix() - change UNNORM operands to NORM or ZERO		#
#	load_fpn2() - load dst operand from FP regfile			#
#	smovcr() - emulate an "fmovcr" instruction			#
#	fout() - emulate an opclass 3 instruction			#
#	tbl_unsupp - add of table of emulation routines for opclass 0,2	#
#	_real_inex() - "callout" to operating system inexact handler	#
#									#
# INPUT ***************************************************************	#
#	- The system stack contains the FP Inexact exception frame	#
#	- The fsave frame contains the source operand			#
# 									#
# OUTPUT **************************************************************	#
#	- The system stack is unchanged					#
#	- The fsave frame contains the adjusted src op for opclass 0,2	#
#									#
# ALGORITHM ***********************************************************	#
#	In a system where the FP Inexact exception is enabled, the goal	#
# is to get to the handler specified at _real_inex(). But, on the 060,	#
# for opclass zero and two instruction taking this exception, the 	#
# hardware doesn't store the correct result to the destination FP	#
# register as did the '040 and '881/2. This handler must emulate the 	#
# instruction in order to get this value and then store it to the 	#
# correct register before calling _real_inex().				#
#	For opclass 3 instructions, the 060 doesn't store the default	#
# inexact result out to memory or data register file as it should.	#
# This code must emulate the move out by calling fout() before finally	#
# exiting through _real_inex().						#
#									#
#########################################################################

	global		_fpsp_inex
_fpsp_inex:

	link.w		%a6,&-LOCAL_SIZE	# init stack frame

	fsave		FP_SRC(%a6)		# grab the "busy" frame

 	movm.l		&0x0303,EXC_DREGS(%a6)	# save d0-d1/a0-a1
	fmovm.l		%fpcr,%fpsr,%fpiar,USER_FPCR(%a6) # save ctrl regs
 	fmovm.x		&0xc0,EXC_FPREGS(%a6)	# save fp0-fp1 on stack

# the FPIAR holds the "current PC" of the faulting instruction
	mov.l		USER_FPIAR(%a6),EXC_EXTWPTR(%a6)
	
	mov.l		EXC_EXTWPTR(%a6),%a0	# fetch instruction addr
	addq.l		&0x4,EXC_EXTWPTR(%a6)	# incr instruction ptr
	bsr.l		_imem_read_long		# fetch the instruction words
	mov.l		%d0,EXC_OPWORD(%a6)

##############################################################################

	btst		&13,%d0			# is instr an fmove out?
	bne.w		finex_out		# fmove out


# the hardware, for "fabs" and "fneg" w/ a long source format, puts the 
# longword integer directly into the upper longword of the mantissa along
# w/ an exponent value of 0x401e. we convert this to extended precision here.
	bfextu		%d0{&19:&3},%d0		# fetch instr size
	bne.b		finex_cont		# instr size is not long
	cmpi.w		FP_SRC_EX(%a6),&0x401e	# is exponent 0x401e?
	bne.b		finex_cont		# no
	fmov.l		&0x0,%fpcr
	fmov.l		FP_SRC_HI(%a6),%fp0	# load integer src
	fmov.x		%fp0,FP_SRC(%a6)	# store integer as extended precision
	mov.w		&0xe001,0x2+FP_SRC(%a6)

finex_cont:
	lea		FP_SRC(%a6),%a0		# pass: ptr to src op
	bsr.l		fix_skewed_ops		# fix src op

# Here, we zero the ccode and exception byte field since we're going to
# emulate the whole instruction. Notice, though, that we don't kill the
# INEX1 bit. This is because a packed op has long since been converted
# to extended before arriving here. Therefore, we need to retain the
# INEX1 bit from when the operand was first converted.
	andi.l		&0x00ff01ff,USER_FPSR(%a6) # zero all but accured field

	fmov.l		&0x0,%fpcr		# zero current control regs
	fmov.l		&0x0,%fpsr

	bfextu		EXC_EXTWORD(%a6){&0:&6},%d1 # extract upper 6 of cmdreg
	cmpi.b		%d1,&0x17		# is op an fmovecr?
	beq.w		finex_fmovcr		# yes

	lea		FP_SRC(%a6),%a0		# pass: ptr to src op
	bsr.l		set_tag_x		# tag the operand type
	mov.b		%d0,STAG(%a6)		# maybe NORM,DENORM

# bits four and five of the fp extension word separate the monadic and dyadic
# operations that can pass through fpsp_inex(). remember that fcmp and ftst
# will never take this exception, but fsincos will.
	btst		&0x5,1+EXC_CMDREG(%a6)	# is operation monadic or dyadic?
	beq.b		finex_extract		# monadic

	btst		&0x4,1+EXC_CMDREG(%a6)	# is operation an fsincos?
	bne.b		finex_extract		# yes

	bfextu		EXC_CMDREG(%a6){&6:&3},%d0 # dyadic; load dst reg
	bsr.l		load_fpn2		# load dst into FP_DST

	lea		FP_DST(%a6),%a0		# pass: ptr to dst op
	bsr.l		set_tag_x		# tag the operand type
	cmpi.b		%d0,&UNNORM		# is operand an UNNORM?
	bne.b		finex_op2_done		# no
	bsr.l		unnorm_fix		# yes; convert to NORM,DENORM,or ZERO
finex_op2_done:
	mov.b		%d0,DTAG(%a6)		# save dst optype tag

finex_extract:
	clr.l		%d0
	mov.b		FPCR_MODE(%a6),%d0	# pass rnd prec/mode

	mov.b		1+EXC_CMDREG(%a6),%d1
	andi.w		&0x007f,%d1		# extract extension

	lea		FP_SRC(%a6),%a0
	lea		FP_DST(%a6),%a1

	mov.l		(tbl_unsupp.l,%pc,%d1.w*4),%d1 # fetch routine addr
	jsr		(tbl_unsupp.l,%pc,%d1.l*1)

# the operation has been emulated. the result is in fp0.
finex_save:
	bfextu		EXC_CMDREG(%a6){&6:&3},%d0
	bsr.l		store_fpreg

finex_exit:
	fmovm.x		EXC_FPREGS(%a6),&0xc0	# restore fp0-fp1
	fmovm.l		USER_FPCR(%a6),%fpcr,%fpsr,%fpiar # restore ctrl regs
	movm.l		EXC_DREGS(%a6),&0x0303	# restore d0-d1/a0-a1

	frestore	FP_SRC(%a6)

	unlk		%a6
	bra.l		_real_inex

finex_fmovcr:
	clr.l		%d0
	mov.b		FPCR_MODE(%a6),%d0	# pass rnd prec,mode
	mov.b		1+EXC_CMDREG(%a6),%d1
	andi.l		&0x0000007f,%d1		# pass rom offset
	bsr.l		smovcr
	bra.b		finex_save

########################################################################

#
# the hardware does not save the default result to memory on enabled
# inexact exceptions. we do this here before passing control to
# the user inexact handler.
#
# byte, word, and long destination format operations can pass
# through here. so can double and single precision.
# although packed opclass three operations can take inexact
# exceptions, they won't pass through here since they are caught
# first by the unsupported data format exception handler. that handler
# sends them directly to _real_inex() if necessary.
#
finex_out:

	mov.b		&NORM,STAG(%a6)		# src is a NORM

	clr.l		%d0
	mov.b		FPCR_MODE(%a6),%d0	# pass rnd prec,mode

	andi.l		&0xffff00ff,USER_FPSR(%a6) # zero exception field

	lea		FP_SRC(%a6),%a0		# pass ptr to src operand

	bsr.l		fout			# store the default result

	bra.b		finex_exit

#########################################################################
# XDEF ****************************************************************	#
#	_fpsp_dz(): 060FPSP entry point for FP DZ exception.		#
#									#
#	This handler should be the first code executed upon taking	#
#	the FP DZ exception in an operating system.			#
#									#
# XREF ****************************************************************	#
#	_imem_read_long() - read instruction longword from memory	#
#	fix_skewed_ops() - adjust fsave operand				#
#	_real_dz() - "callout" exit point from FP DZ handler		#
#									#
# INPUT ***************************************************************	#
#	- The system stack contains the FP DZ exception stack.		#
#	- The fsave frame contains the source operand.			#
# 									#
# OUTPUT **************************************************************	#
#	- The system stack contains the FP DZ exception stack.		#
#	- The fsave frame contains the adjusted source operand.		#
#									#
# ALGORITHM ***********************************************************	#
#	In a system where the DZ exception is enabled, the goal is to	#
# get to the handler specified at _real_dz(). But, on the 060, when the	#
# exception is taken, the input operand in the fsave state frame may	#
# be incorrect for some cases and need to be adjusted. So, this package	#
# adjusts the operand using fix_skewed_ops() and then branches to	#
# _real_dz(). 								#
#									#
#########################################################################

	global		_fpsp_dz
_fpsp_dz:

	link.w		%a6,&-LOCAL_SIZE	# init stack frame

	fsave		FP_SRC(%a6)		# grab the "busy" frame

 	movm.l		&0x0303,EXC_DREGS(%a6)	# save d0-d1/a0-a1
	fmovm.l		%fpcr,%fpsr,%fpiar,USER_FPCR(%a6) # save ctrl regs
 	fmovm.x		&0xc0,EXC_FPREGS(%a6)	# save fp0-fp1 on stack

# the FPIAR holds the "current PC" of the faulting instruction
	mov.l		USER_FPIAR(%a6),EXC_EXTWPTR(%a6)
	
	mov.l		EXC_EXTWPTR(%a6),%a0	# fetch instruction addr
	addq.l		&0x4,EXC_EXTWPTR(%a6)	# incr instruction ptr
	bsr.l		_imem_read_long		# fetch the instruction words
	mov.l		%d0,EXC_OPWORD(%a6)

##############################################################################


# here, we simply see if the operand in the fsave frame needs to be "unskewed".
# this would be the case for opclass two operations with a source zero
# in the sgl or dbl format.
	lea		FP_SRC(%a6),%a0		# pass: ptr to src op
	bsr.l		fix_skewed_ops		# fix src op

fdz_exit:
	fmovm.x		EXC_FPREGS(%a6),&0xc0	# restore fp0-fp1
	fmovm.l		USER_FPCR(%a6),%fpcr,%fpsr,%fpiar # restore ctrl regs
	movm.l		EXC_DREGS(%a6),&0x0303	# restore d0-d1/a0-a1

	frestore	FP_SRC(%a6)

	unlk		%a6
	bra.l		_real_dz

#########################################################################
# XDEF ****************************************************************	#
#	_fpsp_fline(): 060FPSP entry point for "Line F emulator" exc.	#
#									#
#	This handler should be the first code executed upon taking the	#
#	"Line F Emulator" exception in an operating system.		#
#									#
# XREF ****************************************************************	#
#	_fpsp_unimp() - handle "FP Unimplemented" exceptions		#
#	_real_fpu_disabled() - handle "FPU disabled" exceptions		#
#	_real_fline() - handle "FLINE" exceptions			#
#	_imem_read_long() - read instruction longword			#
#									#
# INPUT ***************************************************************	#
#	- The system stack contains a "Line F Emulator" exception	#
#	  stack frame.							#
# 									#
# OUTPUT **************************************************************	#
#	- The system stack is unchanged					#
#									#
# ALGORITHM ***********************************************************	#
#	When a "Line F Emulator" exception occurs, there are 3 possible	#
# exception types, denoted by the exception stack frame format number:	#
#	(1) FPU unimplemented instruction (6 word stack frame)		#
#	(2) FPU disabled (8 word stack frame)				#
#	(3) Line F (4 word stack frame)					#
#									#
#	This module determines which and forks the flow off to the 	#
# appropriate "callout" (for "disabled" and "Line F") or to the		#
# correct emulation code (for "FPU unimplemented").			#
#	This code also must check for "fmovecr" instructions w/ a	#
# non-zero <ea> field. These may get flagged as "Line F" but should	#
# really be flagged as "FPU Unimplemented". (This is a "feature" on	#
# the '060.								#
#									#
#########################################################################

	global		_fpsp_fline
_fpsp_fline:

# check to see if this exception is a "FP Unimplemented Instruction"
# exception. if so, branch directly to that handler's entry point.
	cmpi.w		0x6(%sp),&0x202c
	beq.l		_fpsp_unimp

# check to see if the FPU is disabled. if so, jump to the OS entry
# point for that condition.
	cmpi.w		0x6(%sp),&0x402c
	beq.l		_real_fpu_disabled

# the exception was an "F-Line Illegal" exception. we check to see
# if the F-Line instruction is an "fmovecr" w/ a non-zero <ea>. if
# so, convert the F-Line exception stack frame to an FP Unimplemented
# Instruction exception stack frame else branch to the OS entry
# point for the F-Line exception handler.
	link.w		%a6,&-LOCAL_SIZE	# init stack frame

	movm.l		&0x0303,EXC_DREGS(%a6)	# save d0-d1/a0-a1

	mov.l		EXC_PC(%a6),EXC_EXTWPTR(%a6)
	mov.l		EXC_EXTWPTR(%a6),%a0	# fetch instruction addr
	addq.l		&0x4,EXC_EXTWPTR(%a6)	# incr instruction ptr
	bsr.l		_imem_read_long		# fetch instruction words

	bfextu		%d0{&0:&10},%d1		# is it an fmovecr?
	cmpi.w		%d1,&0x03c8
	bne.b		fline_fline		# no

	bfextu		%d0{&16:&6},%d1		# is it an fmovecr?
	cmpi.b		%d1,&0x17
	bne.b		fline_fline		# no

# it's an fmovecr w/ a non-zero <ea> that has entered through
# the F-Line Illegal exception.
# so, we need to convert the F-Line exception stack frame into an
# FP Unimplemented Instruction stack frame and jump to that entry
# point.
#
# but, if the FPU is disabled, then we need to jump to the FPU diabled
# entry point.
	movc		%pcr,%d0
	btst		&0x1,%d0
	beq.b		fline_fmovcr

	movm.l		EXC_DREGS(%a6),&0x0303	# restore d0-d1/a0-a1

	unlk		%a6

	sub.l		&0x8,%sp		# make room for "Next PC", <ea>
	mov.w		0x8(%sp),(%sp)
	mov.l		0xa(%sp),0x2(%sp)	# move "Current PC"
	mov.w		&0x402c,0x6(%sp)
	mov.l		0x2(%sp),0xc(%sp)
	addq.l		&0x4,0x2(%sp)		# set "Next PC"

	bra.l		_real_fpu_disabled

fline_fmovcr:
	movm.l		EXC_DREGS(%a6),&0x0303	# restore d0-d1/a0-a1

	unlk		%a6

	fmov.l		0x2(%sp),%fpiar		# set current PC
	addq.l		&0x4,0x2(%sp)		# set Next PC

	mov.l		(%sp),-(%sp)
	mov.l		0x8(%sp),0x4(%sp)
	mov.b		&0x20,0x6(%sp)

	bra.l		_fpsp_unimp

fline_fline:
	movm.l		EXC_DREGS(%a6),&0x0303	# restore d0-d1/a0-a1

	unlk		%a6

	bra.l		_real_fline

#########################################################################
# XDEF ****************************************************************	#
#	_fpsp_unimp(): 060FPSP entry point for FP "Unimplemented	#
#		       Instruction" exception.				#
#									#
#	This handler should be the first code executed upon taking the	#
#	FP Unimplemented Instruction exception in an operating system.	#
#									#
# XREF ****************************************************************	#
#	_imem_read_{word,long}() - read instruction word/longword	#
#	load_fop() - load src/dst ops from memory and/or FP regfile	#
#	store_fpreg() - store opclass 0 or 2 result to FP regfile	#
#	tbl_trans - addr of table of emulation routines for trnscndls	#
#	_real_access() - "callout" for access error exception		#
#	_fpsp_done() - "callout" for exit; work all done		#
#	_real_trace() - "callout" for Trace enabled exception		#
#	smovcr() - emulate "fmovecr" instruction			#
#	funimp_skew() - adjust fsave src ops to "incorrect" value	#
#	_ftrapcc() - emulate an "ftrapcc" instruction			#
#	_fdbcc() - emulate an "fdbcc" instruction			#
#	_fscc() - emulate an "fscc" instruction				#
#	_real_trap() - "callout" for Trap exception			#
# 	_real_bsun() - "callout" for enabled Bsun exception		#
#									#
# INPUT ***************************************************************	#
#	- The system stack contains the "Unimplemented Instr" stk frame	#
# 									#
# OUTPUT **************************************************************	#
#	If access error:						#
#	- The system stack is changed to an access error stack frame	#
#	If Trace exception enabled:					#
#	- The system stack is changed to a Trace exception stack frame	#
#	Else: (normal case)						#
#	- Correct result has been stored as appropriate			#
#									#
# ALGORITHM ***********************************************************	#
#	There are two main cases of instructions that may enter here to	#
# be emulated: (1) the FPgen instructions, most of which were also	#
# unimplemented on the 040, and (2) "ftrapcc", "fscc", and "fdbcc".	#
#	For the first set, this handler calls the routine load_fop()	#
# to load the source and destination (for dyadic) operands to be used	#
# for instruction emulation. The correct emulation routine is then 	#
# chosen by decoding the instruction type and indexing into an 		#
# emulation subroutine index table. After emulation returns, this 	#
# handler checks to see if an exception should occur as a result of the #
# FP instruction emulation. If so, then an FP exception of the correct	#
# type is inserted into the FPU state frame using the "frestore"	#
# instruction before exiting through _fpsp_done(). In either the 	#
# exceptional or non-exceptional cases, we must check to see if the	#
# Trace exception is enabled. If so, then we must create a Trace	#
# exception frame from the current exception frame and exit through	#
# _real_trace().							#
# 	For "fdbcc", "ftrapcc", and "fscc", the emulation subroutines	#
# _fdbcc(), _ftrapcc(), and _fscc() respectively are used. All three	#
# may flag that a BSUN exception should be taken. If so, then the 	#
# current exception stack frame is converted into a BSUN exception 	#
# stack frame and an exit is made through _real_bsun(). If the		#
# instruction was "ftrapcc" and a Trap exception should result, a Trap	#
# exception stack frame is created from the current frame and an exit	#
# is made through _real_trap(). If a Trace exception is pending, then	#
# a Trace exception frame is created from the current frame and a jump	#
# is made to _real_trace(). Finally, if none of these conditions exist,	#
# then the handler exits though the callout _fpsp_done().		#
#									#
# 	In any of the above scenarios, if a _mem_read() or _mem_write()	#
# "callout" returns a failing value, then an access error stack frame	#
# is created from the current stack frame and an exit is made through	#
# _real_access().							#
#									#
#########################################################################

#
# FP UNIMPLEMENTED INSTRUCTION STACK FRAME:
#
#	*****************
#	*		* => <ea> of fp unimp instr.
#	-      EA	-
#	*		*
#	*****************
#	* 0x2 *  0x02c	* => frame format and vector offset(vector #11)
#	*****************
#	*		*
#	-    Next PC	- => PC of instr to execute after exc handling
#	*		*
#	*****************
#	*      SR	* => SR at the time the exception was taken
#	*****************
#
# Note: the !NULL bit does not get set in the fsave frame when the
# machine encounters an fp unimp exception. Therefore, it must be set
# before leaving this handler.
#
	global		_fpsp_unimp
_fpsp_unimp:

	link.w		%a6,&-LOCAL_SIZE	# init stack frame

	movm.l		&0x0303,EXC_DREGS(%a6)	# save d0-d1/a0-a1
	fmovm.l		%fpcr,%fpsr,%fpiar,USER_FPCR(%a6) # save ctrl regs
	fmovm.x		&0xc0,EXC_FPREGS(%a6)	# save fp0-fp1

	btst		&0x5,EXC_SR(%a6)	# user mode exception?
	bne.b		funimp_s		# no; supervisor mode

# save the value of the user stack pointer onto the stack frame
funimp_u:
	mov.l		%usp,%a0		# fetch user stack pointer
	mov.l		%a0,EXC_A7(%a6)		# store in stack frame
	bra.b		funimp_cont

# store the value of the supervisor stack pointer BEFORE the exc occurred.
# old_sp is address just above stacked effective address.
funimp_s:
	lea		4+EXC_EA(%a6),%a0	# load old a7'
	mov.l		%a0,EXC_A7(%a6)		# store a7'
	mov.l		%a0,OLD_A7(%a6)		# make a copy

funimp_cont:

# the FPIAR holds the "current PC" of the faulting instruction.
	mov.l		USER_FPIAR(%a6),EXC_EXTWPTR(%a6)

	mov.l		EXC_EXTWPTR(%a6),%a0	# fetch instruction addr
	addq.l		&0x4,EXC_EXTWPTR(%a6)	# incr instruction ptr
	bsr.l		_imem_read_long		# fetch the instruction words
	mov.l		%d0,EXC_OPWORD(%a6)

############################################################################

	fmov.l		&0x0,%fpcr		# clear FPCR
	fmov.l		&0x0,%fpsr		# clear FPSR

	clr.b		SPCOND_FLG(%a6)		# clear "special case" flag

# Divide the fp instructions into 8 types based on the TYPE field in
# bits 6-8 of the opword(classes 6,7 are undefined).
# (for the '060, only two types  can take this exception)
#	bftst		%d0{&7:&3}		# test TYPE
	btst		&22,%d0			# type 0 or 1 ?
	bne.w		funimp_misc		# type 1

#########################################
# TYPE == 0: General instructions	#
#########################################
funimp_gen:

	clr.b		STORE_FLG(%a6)		# clear "store result" flag

# clear the ccode byte and exception status byte
	andi.l		&0x00ff00ff,USER_FPSR(%a6)

	bfextu		%d0{&16:&6},%d1		# extract upper 6 of cmdreg
	cmpi.b		%d1,&0x17		# is op an fmovecr?
	beq.w		funimp_fmovcr		# yes

funimp_gen_op:
	bsr.l		_load_fop		# load 

	clr.l		%d0
	mov.b		FPCR_MODE(%a6),%d0	# fetch rnd mode

	mov.b		1+EXC_CMDREG(%a6),%d1
	andi.w		&0x003f,%d1		# extract extension bits
	lsl.w		&0x3,%d1		# shift right 3 bits
	or.b		STAG(%a6),%d1		# insert src optag bits

	lea		FP_DST(%a6),%a1		# pass dst ptr in a1
	lea		FP_SRC(%a6),%a0		# pass src ptr in a0

	mov.w		(tbl_trans.w,%pc,%d1.w*2),%d1
	jsr		(tbl_trans.w,%pc,%d1.w*1) # emulate

funimp_fsave:
	mov.b		FPCR_ENABLE(%a6),%d0	# fetch exceptions enabled
	bne.w		funimp_ena		# some are enabled

funimp_store:
	bfextu		EXC_CMDREG(%a6){&6:&3},%d0 # fetch Dn
	bsr.l		store_fpreg		# store result to fp regfile

funimp_gen_exit:
	fmovm.x		EXC_FP0(%a6),&0xc0	# restore fp0-fp1
	fmovm.l		USER_FPCR(%a6),%fpcr,%fpsr,%fpiar # restore ctrl regs
 	movm.l		EXC_DREGS(%a6),&0x0303 	# restore d0-d1/a0-a1

funimp_gen_exit_cmp:
	cmpi.b		SPCOND_FLG(%a6),&mia7_flg # was the ea mode (sp)+ ?
	beq.b		funimp_gen_exit_a7	# yes

	cmpi.b		SPCOND_FLG(%a6),&mda7_flg # was the ea mode -(sp) ?
	beq.b		funimp_gen_exit_a7	# yes

funimp_gen_exit_cont:
	unlk		%a6

funimp_gen_exit_cont2:
	btst		&0x7,(%sp)		# is trace on?
	beq.l		_fpsp_done		# no

# this catches a problem with the case where an exception will be re-inserted
# into the machine. the frestore has already been executed...so, the fmov.l
# alone of the control register would trigger an unwanted exception.
# until I feel like fixing this, we'll sidestep the exception.
	fsave		-(%sp)
	fmov.l		%fpiar,0x14(%sp)	# "Current PC" is in FPIAR
	frestore	(%sp)+
	mov.w		&0x2024,0x6(%sp)	# stk fmt = 0x2; voff = 0x24
	bra.l		_real_trace
	
funimp_gen_exit_a7:
	btst		&0x5,EXC_SR(%a6)	# supervisor or user mode?
	bne.b		funimp_gen_exit_a7_s	# supervisor

	mov.l		%a0,-(%sp)
	mov.l		EXC_A7(%a6),%a0
	mov.l		%a0,%usp
	mov.l		(%sp)+,%a0
	bra.b		funimp_gen_exit_cont

# if the instruction was executed from supervisor mode and the addressing
# mode was (a7)+, then the stack frame for the rte must be shifted "up"
# "n" bytes where "n" is the size of the src operand type.
# f<op>.{b,w,l,s,d,x,p}
funimp_gen_exit_a7_s:
	mov.l		%d0,-(%sp)		# save d0
	mov.l		EXC_A7(%a6),%d0		# load new a7'
	sub.l		OLD_A7(%a6),%d0		# subtract old a7'
	mov.l		0x2+EXC_PC(%a6),(0x2+EXC_PC,%a6,%d0) # shift stack frame
	mov.l		EXC_SR(%a6),(EXC_SR,%a6,%d0) # shift stack frame
	mov.w		%d0,EXC_SR(%a6)		# store incr number
	mov.l		(%sp)+,%d0		# restore d0

	unlk		%a6

	add.w		(%sp),%sp		# stack frame shifted
	bra.b		funimp_gen_exit_cont2		

######################
# fmovecr.x #ccc,fpn #
######################
funimp_fmovcr:
	clr.l		%d0
	mov.b		FPCR_MODE(%a6),%d0
	mov.b		1+EXC_CMDREG(%a6),%d1
	andi.l		&0x0000007f,%d1		# pass rom offset in d1
	bsr.l		smovcr
	bra.w		funimp_fsave

#########################################################################

#
# the user has enabled some exceptions. we figure not to see this too
# often so that's why it gets lower priority.
#
funimp_ena:

# was an exception set that was also enabled?
	and.b		FPSR_EXCEPT(%a6),%d0	# keep only ones enabled and set
	bfffo		%d0{&24:&8},%d0		# find highest priority exception
	bne.b		funimp_exc		# at least one was set

# no exception that was enabled was set BUT if we got an exact overflow
# and overflow wasn't enabled but inexact was (yech!) then this is
# an inexact exception; otherwise, return to normal non-exception flow.
	btst		&ovfl_bit,FPSR_EXCEPT(%a6) # did overflow occur?
	beq.w		funimp_store		# no; return to normal flow

# the overflow w/ exact result happened but was inexact set in the FPCR?
funimp_ovfl:
	btst		&inex2_bit,FPCR_ENABLE(%a6) # is inexact enabled?
	beq.w		funimp_store		# no; return to normal flow
	bra.b		funimp_exc_ovfl		# yes

# some exception happened that was actually enabled.
# we'll insert this new exception into the FPU and then return.
funimp_exc:
	subi.l		&24,%d0			# fix offset to be 0-8
	cmpi.b		%d0,&0x6		# is exception INEX?
	bne.b		funimp_exc_force	# no

# the enabled exception was inexact. so, if it occurs with an overflow
# or underflow that was disabled, then we have to force an overflow or
# underflow frame. the eventual overflow or underflow handler will see that
# it's actually an inexact and act appropriately. this is the only easy
# way to have the EXOP available for the enabled inexact handler when
# a disabled overflow or underflow has also happened.
	btst		&ovfl_bit,FPSR_EXCEPT(%a6) # did overflow occur?
	bne.b		funimp_exc_ovfl		# yes
	btst		&unfl_bit,FPSR_EXCEPT(%a6) # did underflow occur?
	bne.b		funimp_exc_unfl		# yes

# force the fsave exception status bits to signal an exception of the 
# appropriate type. don't forget to "skew" the source operand in case we
# "unskewed" the one the hardware initially gave us.
funimp_exc_force:
	mov.l		%d0,-(%sp)		# save d0
	bsr.l		funimp_skew		# check for special case
	mov.l		(%sp)+,%d0		# restore d0
	mov.w		(tbl_funimp_except.b,%pc,%d0.w*2),2+FP_SRC(%a6)
	bra.b		funimp_gen_exit2	# exit with frestore

tbl_funimp_except:
	short		0xe002, 0xe006, 0xe004, 0xe005
	short		0xe003, 0xe002, 0xe001, 0xe001

# insert an overflow frame
funimp_exc_ovfl:
	bsr.l		funimp_skew		# check for special case
	mov.w		&0xe005,2+FP_SRC(%a6)
	bra.b		funimp_gen_exit2

# insert an underflow frame
funimp_exc_unfl:
	bsr.l		funimp_skew		# check for special case
	mov.w		&0xe003,2+FP_SRC(%a6)

# this is the general exit point for an enabled exception that will be
# restored into the machine for the instruction just emulated.
funimp_gen_exit2:
	fmovm.x		EXC_FP0(%a6),&0xc0	# restore fp0-fp1
	fmovm.l		USER_FPCR(%a6),%fpcr,%fpsr,%fpiar # restore ctrl regs
 	movm.l		EXC_DREGS(%a6),&0x0303 	# restore d0-d1/a0-a1

	frestore	FP_SRC(%a6)		# insert exceptional status

	bra.w		funimp_gen_exit_cmp

############################################################################

#
# TYPE == 1: FDB<cc>, FS<cc>, FTRAP<cc>
#
# These instructions were implemented on the '881/2 and '040 in hardware but
# are emulated in software on the '060.
#
funimp_misc:
	bfextu		%d0{&10:&3},%d1		# extract mode field
	cmpi.b		%d1,&0x1		# is it an fdb<cc>?
	beq.w		funimp_fdbcc		# yes
	cmpi.b		%d1,&0x7		# is it an fs<cc>?
	bne.w		funimp_fscc		# yes
	bfextu		%d0{&13:&3},%d1	
	cmpi.b		%d1,&0x2		# is it an fs<cc>?
	blt.w		funimp_fscc		# yes

#########################
# ftrap<cc>		#
# ftrap<cc>.w #<data>	#
# ftrap<cc>.l #<data>	#
#########################
funimp_ftrapcc:

	bsr.l		_ftrapcc		# FTRAP<cc>()

	cmpi.b		SPCOND_FLG(%a6),&fbsun_flg # is enabled bsun occurring?
	beq.w		funimp_bsun		# yes

	cmpi.b		SPCOND_FLG(%a6),&ftrapcc_flg # should a trap occur?
	bne.w		funimp_done		# no

#	 FP UNIMP FRAME		   TRAP  FRAME
#	*****************	*****************
#	**    <EA>     **	**  Current PC **
#	*****************	*****************
#	* 0x2 *  0x02c	*	* 0x2 *  0x01c  *
#	*****************	*****************
#	**   Next PC   **	**   Next PC   **
#	*****************	*****************
#	*      SR	*	*      SR	*
#	*****************	*****************
#	    (6 words)		    (6 words)
#
# the ftrapcc instruction should take a trap. so, here we must create a
# trap stack frame from an unimplemented fp instruction stack frame and
# jump to the user supplied entry point for the trap exception
funimp_ftrapcc_tp:
	mov.l		USER_FPIAR(%a6),EXC_EA(%a6) # Address = Current PC
	mov.w		&0x201c,EXC_VOFF(%a6)	# Vector Offset = 0x01c

	fmovm.x		EXC_FP0(%a6),&0xc0	# restore fp0-fp1
	fmovm.l		USER_FPCR(%a6),%fpcr,%fpsr,%fpiar # restore ctrl regs
 	movm.l		EXC_DREGS(%a6),&0x0303 	# restore d0-d1/a0-a1

	unlk		%a6
	bra.l		_real_trap

#########################
# fdb<cc> Dn,<label>	#
#########################
funimp_fdbcc:

	mov.l		EXC_EXTWPTR(%a6),%a0	# fetch instruction addr
	addq.l		&0x2,EXC_EXTWPTR(%a6)	# incr instruction ptr
	bsr.l		_imem_read_word		# read displacement

	tst.l		%d1			# did ifetch fail?
	bne.w		funimp_iacc		# yes

	ext.l		%d0			# sign extend displacement

	bsr.l		_fdbcc			# FDB<cc>()

	cmpi.b		SPCOND_FLG(%a6),&fbsun_flg # is enabled bsun occurring?
	beq.w		funimp_bsun

	bra.w		funimp_done		# branch to finish

#################
# fs<cc>.b <ea>	#
#################
funimp_fscc:

	bsr.l		_fscc			# FS<cc>()

# I am assuming here that an "fs<cc>.b -(An)" or "fs<cc>.b (An)+" instruction
# does not need to update "An" before taking a bsun exception.
	cmpi.b		SPCOND_FLG(%a6),&fbsun_flg # is enabled bsun occurring?
	beq.w		funimp_bsun

	btst		&0x5,EXC_SR(%a6)	# yes; is it a user mode exception?
	bne.b		funimp_fscc_s		# no

funimp_fscc_u:
	mov.l		EXC_A7(%a6),%a0		# yes; set new USP
	mov.l		%a0,%usp
	bra.w		funimp_done		# branch to finish	

# remember, I'm assuming that post-increment is bogus...(it IS!!!)
# so, the least significant WORD of the stacked effective address got
# overwritten by the "fs<cc> -(An)". We must shift the stack frame "down"
# so that the rte will work correctly without destroying the result.
# even though the operation size is byte, the stack ptr is decr by 2.
#
# remember, also, this instruction may be traced.
funimp_fscc_s:
	cmpi.b		SPCOND_FLG(%a6),&mda7_flg # was a7 modified?
	bne.w		funimp_done		# no

	fmovm.x		EXC_FP0(%a6),&0xc0	# restore fp0-fp1
	fmovm.l		USER_FPCR(%a6),%fpcr,%fpsr,%fpiar # restore ctrl regs
 	movm.l		EXC_DREGS(%a6),&0x0303 	# restore d0-d1/a0-a1

	unlk		%a6

	btst		&0x7,(%sp)		# is trace enabled?
	bne.b		funimp_fscc_s_trace	# yes

	subq.l		&0x2,%sp
	mov.l		0x2(%sp),(%sp)		# shift SR,hi(PC) "down"
	mov.l		0x6(%sp),0x4(%sp)	# shift lo(PC),voff "down"
	bra.l		_fpsp_done

funimp_fscc_s_trace:
	subq.l		&0x2,%sp
	mov.l		0x2(%sp),(%sp)		# shift SR,hi(PC) "down"
	mov.w		0x6(%sp),0x4(%sp)	# shift lo(PC)
	mov.w		&0x2024,0x6(%sp)	# fmt/voff = $2024
	fmov.l		%fpiar,0x8(%sp)		# insert "current PC"

	bra.l		_real_trace
		
#
# The ftrap<cc>, fs<cc>, or fdb<cc> is to take an enabled bsun. we must convert
# the fp unimplemented instruction exception stack frame into a bsun stack frame,
# restore a bsun exception into the machine, and branch to the user
# supplied bsun hook.
#
#	 FP UNIMP FRAME		   BSUN FRAME
#	*****************	*****************
#	**    <EA>     **	* 0x0 * 0x0c0	*
#	*****************	*****************
#	* 0x2 *  0x02c  *	** Current PC  **
#	*****************	*****************
#	**   Next PC   **	*      SR	*
#	*****************	*****************
#	*      SR	*	    (4 words)
#	*****************
#	    (6 words)
#
funimp_bsun:
	mov.w		&0x00c0,2+EXC_EA(%a6)	# Fmt = 0x0; Vector Offset = 0x0c0
	mov.l		USER_FPIAR(%a6),EXC_VOFF(%a6) # PC = Current PC
	mov.w		EXC_SR(%a6),2+EXC_PC(%a6) # shift SR "up"

	mov.w		&0xe000,2+FP_SRC(%a6)	# bsun exception enabled

	fmovm.x		EXC_FP0(%a6),&0xc0	# restore fp0-fp1
	fmovm.l		USER_FPCR(%a6),%fpcr,%fpsr,%fpiar # restore ctrl regs
 	movm.l		EXC_DREGS(%a6),&0x0303 	# restore d0-d1/a0-a1

	frestore	FP_SRC(%a6)		# restore bsun exception

	unlk		%a6

	addq.l		&0x4,%sp		# erase sludge

	bra.l		_real_bsun		# branch to user bsun hook

#
# all ftrapcc/fscc/fdbcc processing has been completed. unwind the stack frame
# and return.
#
# as usual, we have to check for trace mode being on here. since instructions
# modifying the supervisor stack frame don't pass through here, this is a 
# relatively easy task.
#
funimp_done:
	fmovm.x		EXC_FP0(%a6),&0xc0	# restore fp0-fp1
	fmovm.l		USER_FPCR(%a6),%fpcr,%fpsr,%fpiar # restore ctrl regs
 	movm.l		EXC_DREGS(%a6),&0x0303 	# restore d0-d1/a0-a1

	unlk		%a6

	btst		&0x7,(%sp)		# is trace enabled?
	bne.b		funimp_trace		# yes

	bra.l		_fpsp_done

#	 FP UNIMP FRAME		  TRACE  FRAME
#	*****************	*****************
#	**    <EA>     **	**  Current PC **
#	*****************	*****************
#	* 0x2 *  0x02c	*	* 0x2 *  0x024  *
#	*****************	*****************
#	**   Next PC   **	**   Next PC   **
#	*****************	*****************
#	*      SR	*	*      SR	*
#	*****************	*****************
#	    (6 words)		    (6 words)
#
# the fscc instruction should take a trace trap. so, here we must create a
# trace stack frame from an unimplemented fp instruction stack frame and
# jump to the user supplied entry point for the trace exception
funimp_trace:
	fmov.l		%fpiar,0x8(%sp)		# current PC is in fpiar
	mov.b		&0x24,0x7(%sp)		# vector offset = 0x024

	bra.l		_real_trace

################################################################

	global		tbl_trans
	swbeg		&0x1c0
tbl_trans:
	short 		tbl_trans - tbl_trans	# $00-0 fmovecr all
	short 		tbl_trans - tbl_trans	# $00-1 fmovecr all
	short 		tbl_trans - tbl_trans	# $00-2 fmovecr all
	short 		tbl_trans - tbl_trans	# $00-3 fmovecr all
	short 		tbl_trans - tbl_trans	# $00-4 fmovecr all
	short 		tbl_trans - tbl_trans	# $00-5 fmovecr all
	short 		tbl_trans - tbl_trans	# $00-6 fmovecr all
	short 		tbl_trans - tbl_trans	# $00-7 fmovecr all

	short 		tbl_trans - tbl_trans	# $01-0 fint norm
	short		tbl_trans - tbl_trans	# $01-1 fint zero
	short		tbl_trans - tbl_trans	# $01-2 fint inf
	short		tbl_trans - tbl_trans	# $01-3 fint qnan
	short		tbl_trans - tbl_trans	# $01-5 fint denorm
	short		tbl_trans - tbl_trans	# $01-4 fint snan
	short		tbl_trans - tbl_trans	# $01-6 fint unnorm
	short		tbl_trans - tbl_trans	# $01-7 ERROR

	short		ssinh	 - tbl_trans	# $02-0 fsinh norm
	short		src_zero - tbl_trans	# $02-1 fsinh zero
	short		src_inf	 - tbl_trans	# $02-2 fsinh inf
	short		src_qnan - tbl_trans	# $02-3 fsinh qnan
	short		ssinhd	 - tbl_trans	# $02-5 fsinh denorm
	short		src_snan - tbl_trans	# $02-4 fsinh snan
	short		tbl_trans - tbl_trans	# $02-6 fsinh unnorm
	short		tbl_trans - tbl_trans	# $02-7 ERROR

	short		tbl_trans - tbl_trans	# $03-0 fintrz norm
	short		tbl_trans - tbl_trans	# $03-1 fintrz zero
	short		tbl_trans - tbl_trans	# $03-2 fintrz inf
	short		tbl_trans - tbl_trans	# $03-3 fintrz qnan
	short		tbl_trans - tbl_trans	# $03-5 fintrz denorm
	short		tbl_trans - tbl_trans	# $03-4 fintrz snan
	short		tbl_trans - tbl_trans	# $03-6 fintrz unnorm
	short		tbl_trans - tbl_trans	# $03-7 ERROR

	short		tbl_trans - tbl_trans	# $04-0 fsqrt norm
	short		tbl_trans - tbl_trans	# $04-1 fsqrt zero
	short		tbl_trans - tbl_trans	# $04-2 fsqrt inf
	short		tbl_trans - tbl_trans	# $04-3 fsqrt qnan
	short		tbl_trans - tbl_trans	# $04-5 fsqrt denorm
	short		tbl_trans - tbl_trans	# $04-4 fsqrt snan
	short		tbl_trans - tbl_trans	# $04-6 fsqrt unnorm
	short		tbl_trans - tbl_trans	# $04-7 ERROR

	short		tbl_trans - tbl_trans	# $05-0 ERROR
	short		tbl_trans - tbl_trans	# $05-1 ERROR
	short		tbl_trans - tbl_trans	# $05-2 ERROR
	short		tbl_trans - tbl_trans	# $05-3 ERROR
	short		tbl_trans - tbl_trans	# $05-4 ERROR
	short		tbl_trans - tbl_trans	# $05-5 ERROR
	short		tbl_trans - tbl_trans	# $05-6 ERROR
	short		tbl_trans - tbl_trans	# $05-7 ERROR

	short		slognp1	 - tbl_trans	# $06-0 flognp1 norm
	short		src_zero - tbl_trans	# $06-1 flognp1 zero
	short		sopr_inf - tbl_trans	# $06-2 flognp1 inf
	short		src_qnan - tbl_trans	# $06-3 flognp1 qnan
	short		slognp1d - tbl_trans	# $06-5 flognp1 denorm
	short		src_snan - tbl_trans	# $06-4 flognp1 snan
	short		tbl_trans - tbl_trans	# $06-6 flognp1 unnorm
	short		tbl_trans - tbl_trans	# $06-7 ERROR

	short		tbl_trans - tbl_trans	# $07-0 ERROR
	short		tbl_trans - tbl_trans	# $07-1 ERROR
	short		tbl_trans - tbl_trans	# $07-2 ERROR
	short		tbl_trans - tbl_trans	# $07-3 ERROR
	short		tbl_trans - tbl_trans	# $07-4 ERROR
	short		tbl_trans - tbl_trans	# $07-5 ERROR
	short		tbl_trans - tbl_trans	# $07-6 ERROR
	short		tbl_trans - tbl_trans	# $07-7 ERROR

	short		setoxm1	 - tbl_trans	# $08-0 fetoxm1 norm
	short		src_zero - tbl_trans	# $08-1 fetoxm1 zero
	short		setoxm1i - tbl_trans	# $08-2 fetoxm1 inf
	short		src_qnan - tbl_trans	# $08-3 fetoxm1 qnan
	short		setoxm1d - tbl_trans	# $08-5 fetoxm1 denorm
	short		src_snan - tbl_trans	# $08-4 fetoxm1 snan
	short		tbl_trans - tbl_trans	# $08-6 fetoxm1 unnorm
	short		tbl_trans - tbl_trans	# $08-7 ERROR

	short		stanh	 - tbl_trans	# $09-0 ftanh norm
	short		src_zero - tbl_trans	# $09-1 ftanh zero
	short		src_one	 - tbl_trans	# $09-2 ftanh inf
	short		src_qnan - tbl_trans	# $09-3 ftanh qnan
	short		stanhd	 - tbl_trans	# $09-5 ftanh denorm
	short		src_snan - tbl_trans	# $09-4 ftanh snan
	short		tbl_trans - tbl_trans	# $09-6 ftanh unnorm
	short		tbl_trans - tbl_trans	# $09-7 ERROR

	short		satan	 - tbl_trans	# $0a-0 fatan norm
	short		src_zero - tbl_trans	# $0a-1 fatan zero
	short		spi_2	 - tbl_trans	# $0a-2 fatan inf
	short		src_qnan - tbl_trans	# $0a-3 fatan qnan
	short		satand	 - tbl_trans	# $0a-5 fatan denorm
	short		src_snan - tbl_trans	# $0a-4 fatan snan
	short		tbl_trans - tbl_trans	# $0a-6 fatan unnorm
	short		tbl_trans - tbl_trans	# $0a-7 ERROR

	short		tbl_trans - tbl_trans	# $0b-0 ERROR
	short		tbl_trans - tbl_trans	# $0b-1 ERROR
	short		tbl_trans - tbl_trans	# $0b-2 ERROR
	short		tbl_trans - tbl_trans	# $0b-3 ERROR
	short		tbl_trans - tbl_trans	# $0b-4 ERROR
	short		tbl_trans - tbl_trans	# $0b-5 ERROR
	short		tbl_trans - tbl_trans	# $0b-6 ERROR
	short		tbl_trans - tbl_trans	# $0b-7 ERROR

	short		sasin	 - tbl_trans	# $0c-0 fasin norm
	short		src_zero - tbl_trans	# $0c-1 fasin zero
	short		t_operr	 - tbl_trans	# $0c-2 fasin inf
	short		src_qnan - tbl_trans	# $0c-3 fasin qnan
	short		sasind	 - tbl_trans	# $0c-5 fasin denorm
	short		src_snan - tbl_trans	# $0c-4 fasin snan
	short		tbl_trans - tbl_trans	# $0c-6 fasin unnorm
	short		tbl_trans - tbl_trans	# $0c-7 ERROR

	short		satanh	 - tbl_trans	# $0d-0 fatanh norm
	short		src_zero - tbl_trans	# $0d-1 fatanh zero
	short		t_operr	 - tbl_trans	# $0d-2 fatanh inf
	short		src_qnan - tbl_trans	# $0d-3 fatanh qnan
	short		satanhd	 - tbl_trans	# $0d-5 fatanh denorm
	short		src_snan - tbl_trans	# $0d-4 fatanh snan
	short		tbl_trans - tbl_trans	# $0d-6 fatanh unnorm
	short		tbl_trans - tbl_trans	# $0d-7 ERROR

	short		ssin	 - tbl_trans	# $0e-0 fsin norm
	short		src_zero - tbl_trans	# $0e-1 fsin zero
	short		t_operr	 - tbl_trans	# $0e-2 fsin inf
	short		src_qnan - tbl_trans	# $0e-3 fsin qnan
	short		ssind	 - tbl_trans	# $0e-5 fsin denorm
	short		src_snan - tbl_trans	# $0e-4 fsin snan
	short		tbl_trans - tbl_trans	# $0e-6 fsin unnorm
	short		tbl_trans - tbl_trans	# $0e-7 ERROR
	
	short		stan	 - tbl_trans	# $0f-0 ftan norm
	short		src_zero - tbl_trans	# $0f-1 ftan zero
	short		t_operr	 - tbl_trans	# $0f-2 ftan inf
	short		src_qnan - tbl_trans	# $0f-3 ftan qnan
	short		stand	 - tbl_trans	# $0f-5 ftan denorm
	short		src_snan - tbl_trans	# $0f-4 ftan snan
	short		tbl_trans - tbl_trans	# $0f-6 ftan unnorm
	short		tbl_trans - tbl_trans	# $0f-7 ERROR

	short		setox	 - tbl_trans	# $10-0 fetox norm
	short		ld_pone	 - tbl_trans	# $10-1 fetox zero
	short		szr_inf	 - tbl_trans	# $10-2 fetox inf
	short		src_qnan - tbl_trans	# $10-3 fetox qnan
	short		setoxd	 - tbl_trans	# $10-5 fetox denorm
	short		src_snan - tbl_trans	# $10-4 fetox snan
	short		tbl_trans - tbl_trans	# $10-6 fetox unnorm
	short		tbl_trans - tbl_trans	# $10-7 ERROR

	short		stwotox	 - tbl_trans	# $11-0 ftwotox norm
	short		ld_pone	 - tbl_trans	# $11-1 ftwotox zero
	short		szr_inf	 - tbl_trans	# $11-2 ftwotox inf
	short		src_qnan - tbl_trans	# $11-3 ftwotox qnan
	short		stwotoxd - tbl_trans	# $11-5 ftwotox denorm
	short		src_snan - tbl_trans	# $11-4 ftwotox snan
	short		tbl_trans - tbl_trans	# $11-6 ftwotox unnorm
	short		tbl_trans - tbl_trans	# $11-7 ERROR

	short		stentox	 - tbl_trans	# $12-0 ftentox norm
	short		ld_pone	 - tbl_trans	# $12-1 ftentox zero
	short		szr_inf	 - tbl_trans	# $12-2 ftentox inf
	short		src_qnan - tbl_trans	# $12-3 ftentox qnan
	short		stentoxd - tbl_trans	# $12-5 ftentox denorm
	short		src_snan - tbl_trans	# $12-4 ftentox snan
	short		tbl_trans - tbl_trans	# $12-6 ftentox unnorm
	short		tbl_trans - tbl_trans	# $12-7 ERROR

	short		tbl_trans - tbl_trans	# $13-0 ERROR
	short		tbl_trans - tbl_trans	# $13-1 ERROR
	short		tbl_trans - tbl_trans	# $13-2 ERROR
	short		tbl_trans - tbl_trans	# $13-3 ERROR
	short		tbl_trans - tbl_trans	# $13-4 ERROR
	short		tbl_trans - tbl_trans	# $13-5 ERROR
	short		tbl_trans - tbl_trans	# $13-6 ERROR
	short		tbl_trans - tbl_trans	# $13-7 ERROR

	short		slogn	 - tbl_trans	# $14-0 flogn norm
	short		t_dz2	 - tbl_trans	# $14-1 flogn zero
	short		sopr_inf - tbl_trans	# $14-2 flogn inf
	short		src_qnan - tbl_trans	# $14-3 flogn qnan
	short		slognd	 - tbl_trans	# $14-5 flogn denorm
	short		src_snan - tbl_trans	# $14-4 flogn snan
	short		tbl_trans - tbl_trans	# $14-6 flogn unnorm
	short		tbl_trans - tbl_trans	# $14-7 ERROR

	short		slog10	 - tbl_trans	# $15-0 flog10 norm
	short		t_dz2	 - tbl_trans	# $15-1 flog10 zero
	short		sopr_inf - tbl_trans	# $15-2 flog10 inf
	short		src_qnan - tbl_trans	# $15-3 flog10 qnan
	short		slog10d	 - tbl_trans	# $15-5 flog10 denorm
	short		src_snan - tbl_trans	# $15-4 flog10 snan
	short		tbl_trans - tbl_trans	# $15-6 flog10 unnorm
	short		tbl_trans - tbl_trans	# $15-7 ERROR

	short		slog2	 - tbl_trans	# $16-0 flog2 norm
	short		t_dz2	 - tbl_trans	# $16-1 flog2 zero
	short		sopr_inf - tbl_trans	# $16-2 flog2 inf
	short		src_qnan - tbl_trans	# $16-3 flog2 qnan
	short		slog2d	 - tbl_trans	# $16-5 flog2 denorm
	short		src_snan - tbl_trans	# $16-4 flog2 snan
	short		tbl_trans - tbl_trans	# $16-6 flog2 unnorm
	short		tbl_trans - tbl_trans	# $16-7 ERROR

	short		tbl_trans - tbl_trans	# $17-0 ERROR
	short		tbl_trans - tbl_trans	# $17-1 ERROR
	short		tbl_trans - tbl_trans	# $17-2 ERROR
	short		tbl_trans - tbl_trans	# $17-3 ERROR
	short		tbl_trans - tbl_trans	# $17-4 ERROR
	short		tbl_trans - tbl_trans	# $17-5 ERROR
	short		tbl_trans - tbl_trans	# $17-6 ERROR
	short		tbl_trans - tbl_trans	# $17-7 ERROR

	short		tbl_trans - tbl_trans	# $18-0 fabs norm
	short		tbl_trans - tbl_trans	# $18-1 fabs zero
	short		tbl_trans - tbl_trans	# $18-2 fabs inf
	short		tbl_trans - tbl_trans	# $18-3 fabs qnan
	short		tbl_trans - tbl_trans	# $18-5 fabs denorm
	short		tbl_trans - tbl_trans	# $18-4 fabs snan
	short		tbl_trans - tbl_trans	# $18-6 fabs unnorm
	short		tbl_trans - tbl_trans	# $18-7 ERROR

	short		scosh	 - tbl_trans	# $19-0 fcosh norm
	short		ld_pone	 - tbl_trans	# $19-1 fcosh zero
	short		ld_pinf	 - tbl_trans	# $19-2 fcosh inf
	short		src_qnan - tbl_trans	# $19-3 fcosh qnan
	short		scoshd	 - tbl_trans	# $19-5 fcosh denorm
	short		src_snan - tbl_trans	# $19-4 fcosh snan
	short		tbl_trans - tbl_trans	# $19-6 fcosh unnorm
	short		tbl_trans - tbl_trans	# $19-7 ERROR

	short		tbl_trans - tbl_trans	# $1a-0 fneg norm
	short		tbl_trans - tbl_trans	# $1a-1 fneg zero
	short		tbl_trans - tbl_trans	# $1a-2 fneg inf
	short		tbl_trans - tbl_trans	# $1a-3 fneg qnan
	short		tbl_trans - tbl_trans	# $1a-5 fneg denorm
	short		tbl_trans - tbl_trans	# $1a-4 fneg snan
	short		tbl_trans - tbl_trans	# $1a-6 fneg unnorm
	short		tbl_trans - tbl_trans	# $1a-7 ERROR

	short		tbl_trans - tbl_trans	# $1b-0 ERROR
	short		tbl_trans - tbl_trans	# $1b-1 ERROR
	short		tbl_trans - tbl_trans	# $1b-2 ERROR
	short		tbl_trans - tbl_trans	# $1b-3 ERROR
	short		tbl_trans - tbl_trans	# $1b-4 ERROR
	short		tbl_trans - tbl_trans	# $1b-5 ERROR
	short		tbl_trans - tbl_trans	# $1b-6 ERROR
	short		tbl_trans - tbl_trans	# $1b-7 ERROR

	short		sacos	 - tbl_trans	# $1c-0 facos norm
	short		ld_ppi2	 - tbl_trans	# $1c-1 facos zero
	short		t_operr	 - tbl_trans	# $1c-2 facos inf
	short		src_qnan - tbl_trans	# $1c-3 facos qnan
	short		sacosd	 - tbl_trans	# $1c-5 facos denorm
	short		src_snan - tbl_trans	# $1c-4 facos snan
	short		tbl_trans - tbl_trans	# $1c-6 facos unnorm
	short		tbl_trans - tbl_trans	# $1c-7 ERROR

	short		scos	 - tbl_trans	# $1d-0 fcos norm
	short		ld_pone	 - tbl_trans	# $1d-1 fcos zero
	short		t_operr	 - tbl_trans	# $1d-2 fcos inf
	short		src_qnan - tbl_trans	# $1d-3 fcos qnan
	short		scosd	 - tbl_trans	# $1d-5 fcos denorm
	short		src_snan - tbl_trans	# $1d-4 fcos snan
	short		tbl_trans - tbl_trans	# $1d-6 fcos unnorm
	short		tbl_trans - tbl_trans	# $1d-7 ERROR

	short		sgetexp	 - tbl_trans	# $1e-0 fgetexp norm
	short		src_zero - tbl_trans	# $1e-1 fgetexp zero
	short		t_operr	 - tbl_trans	# $1e-2 fgetexp inf
	short		src_qnan - tbl_trans	# $1e-3 fgetexp qnan
	short		sgetexpd - tbl_trans	# $1e-5 fgetexp denorm
	short		src_snan - tbl_trans	# $1e-4 fgetexp snan
	short		tbl_trans - tbl_trans	# $1e-6 fgetexp unnorm
	short		tbl_trans - tbl_trans	# $1e-7 ERROR

	short		sgetman	 - tbl_trans	# $1f-0 fgetman norm
	short		src_zero - tbl_trans	# $1f-1 fgetman zero
	short		t_operr	 - tbl_trans	# $1f-2 fgetman inf
	short		src_qnan - tbl_trans	# $1f-3 fgetman qnan
	short		sgetmand - tbl_trans	# $1f-5 fgetman denorm
	short		src_snan - tbl_trans	# $1f-4 fgetman snan
	short		tbl_trans - tbl_trans	# $1f-6 fgetman unnorm
	short		tbl_trans - tbl_trans	# $1f-7 ERROR

	short		tbl_trans - tbl_trans	# $20-0 fdiv norm
	short		tbl_trans - tbl_trans	# $20-1 fdiv zero
	short		tbl_trans - tbl_trans	# $20-2 fdiv inf
	short		tbl_trans - tbl_trans	# $20-3 fdiv qnan
	short		tbl_trans - tbl_trans	# $20-5 fdiv denorm
	short		tbl_trans - tbl_trans	# $20-4 fdiv snan
	short		tbl_trans - tbl_trans	# $20-6 fdiv unnorm
	short		tbl_trans - tbl_trans	# $20-7 ERROR

	short		smod_snorm - tbl_trans	# $21-0 fmod norm
	short		smod_szero - tbl_trans	# $21-1 fmod zero
	short		smod_sinf - tbl_trans	# $21-2 fmod inf
	short		sop_sqnan - tbl_trans	# $21-3 fmod qnan
	short		smod_sdnrm - tbl_trans	# $21-5 fmod denorm
	short		sop_ssnan - tbl_trans	# $21-4 fmod snan
	short		tbl_trans - tbl_trans	# $21-6 fmod unnorm
	short		tbl_trans - tbl_trans	# $21-7 ERROR

	short		tbl_trans - tbl_trans	# $22-0 fadd norm
	short		tbl_trans - tbl_trans	# $22-1 fadd zero
	short		tbl_trans - tbl_trans	# $22-2 fadd inf
	short		tbl_trans - tbl_trans	# $22-3 fadd qnan
	short		tbl_trans - tbl_trans	# $22-5 fadd denorm
	short		tbl_trans - tbl_trans	# $22-4 fadd snan
	short		tbl_trans - tbl_trans	# $22-6 fadd unnorm
	short		tbl_trans - tbl_trans	# $22-7 ERROR

	short		tbl_trans - tbl_trans	# $23-0 fmul norm
	short		tbl_trans - tbl_trans	# $23-1 fmul zero
	short		tbl_trans - tbl_trans	# $23-2 fmul inf
	short		tbl_trans - tbl_trans	# $23-3 fmul qnan
	short		tbl_trans - tbl_trans	# $23-5 fmul denorm
	short		tbl_trans - tbl_trans	# $23-4 fmul snan
	short		tbl_trans - tbl_trans	# $23-6 fmul unnorm
	short		tbl_trans - tbl_trans	# $23-7 ERROR

	short		tbl_trans - tbl_trans	# $24-0 fsgldiv norm
	short		tbl_trans - tbl_trans	# $24-1 fsgldiv zero
	short		tbl_trans - tbl_trans	# $24-2 fsgldiv inf
	short		tbl_trans - tbl_trans	# $24-3 fsgldiv qnan
	short		tbl_trans - tbl_trans	# $24-5 fsgldiv denorm
	short		tbl_trans - tbl_trans	# $24-4 fsgldiv snan
	short		tbl_trans - tbl_trans	# $24-6 fsgldiv unnorm
	short		tbl_trans - tbl_trans	# $24-7 ERROR

	short		srem_snorm - tbl_trans	# $25-0 frem norm
	short		srem_szero - tbl_trans	# $25-1 frem zero
	short		srem_sinf - tbl_trans	# $25-2 frem inf
	short		sop_sqnan - tbl_trans	# $25-3 frem qnan
	short		srem_sdnrm - tbl_trans	# $25-5 frem denorm
	short		sop_ssnan - tbl_trans	# $25-4 frem snan
	short		tbl_trans - tbl_trans	# $25-6 frem unnorm
	short		tbl_trans - tbl_trans	# $25-7 ERROR

	short		sscale_snorm - tbl_trans # $26-0 fscale norm
	short		sscale_szero - tbl_trans # $26-1 fscale zero
	short		sscale_sinf - tbl_trans	# $26-2 fscale inf
	short		sop_sqnan - tbl_trans	# $26-3 fscale qnan
	short		sscale_sdnrm - tbl_trans # $26-5 fscale denorm
	short		sop_ssnan - tbl_trans	# $26-4 fscale snan
	short		tbl_trans - tbl_trans	# $26-6 fscale unnorm
	short		tbl_trans - tbl_trans	# $26-7 ERROR

	short		tbl_trans - tbl_trans	# $27-0 fsglmul norm
	short		tbl_trans - tbl_trans	# $27-1 fsglmul zero
	short		tbl_trans - tbl_trans	# $27-2 fsglmul inf
	short		tbl_trans - tbl_trans	# $27-3 fsglmul qnan
	short		tbl_trans - tbl_trans	# $27-5 fsglmul denorm
	short		tbl_trans - tbl_trans	# $27-4 fsglmul snan
	short		tbl_trans - tbl_trans	# $27-6 fsglmul unnorm
	short		tbl_trans - tbl_trans	# $27-7 ERROR

	short		tbl_trans - tbl_trans	# $28-0 fsub norm
	short		tbl_trans - tbl_trans	# $28-1 fsub zero
	short		tbl_trans - tbl_trans	# $28-2 fsub inf
	short		tbl_trans - tbl_trans	# $28-3 fsub qnan
	short		tbl_trans - tbl_trans	# $28-5 fsub denorm
	short		tbl_trans - tbl_trans	# $28-4 fsub snan
	short		tbl_trans - tbl_trans	# $28-6 fsub unnorm
	short		tbl_trans - tbl_trans	# $28-7 ERROR

	short		tbl_trans - tbl_trans	# $29-0 ERROR
	short		tbl_trans - tbl_trans	# $29-1 ERROR
	short		tbl_trans - tbl_trans	# $29-2 ERROR
	short		tbl_trans - tbl_trans	# $29-3 ERROR
	short		tbl_trans - tbl_trans	# $29-4 ERROR
	short		tbl_trans - tbl_trans	# $29-5 ERROR
	short		tbl_trans - tbl_trans	# $29-6 ERROR
	short		tbl_trans - tbl_trans	# $29-7 ERROR

	short		tbl_trans - tbl_trans	# $2a-0 ERROR
	short		tbl_trans - tbl_trans	# $2a-1 ERROR
	short		tbl_trans - tbl_trans	# $2a-2 ERROR
	short		tbl_trans - tbl_trans	# $2a-3 ERROR
	short		tbl_trans - tbl_trans	# $2a-4 ERROR
	short		tbl_trans - tbl_trans	# $2a-5 ERROR
	short		tbl_trans - tbl_trans	# $2a-6 ERROR
	short		tbl_trans - tbl_trans	# $2a-7 ERROR

	short		tbl_trans - tbl_trans	# $2b-0 ERROR
	short		tbl_trans - tbl_trans	# $2b-1 ERROR
	short		tbl_trans - tbl_trans	# $2b-2 ERROR
	short		tbl_trans - tbl_trans	# $2b-3 ERROR
	short		tbl_trans - tbl_trans	# $2b-4 ERROR
	short		tbl_trans - tbl_trans	# $2b-5 ERROR
	short		tbl_trans - tbl_trans	# $2b-6 ERROR
	short		tbl_trans - tbl_trans	# $2b-7 ERROR

	short		tbl_trans - tbl_trans	# $2c-0 ERROR
	short		tbl_trans - tbl_trans	# $2c-1 ERROR
	short		tbl_trans - tbl_trans	# $2c-2 ERROR
	short		tbl_trans - tbl_trans	# $2c-3 ERROR
	short		tbl_trans - tbl_trans	# $2c-4 ERROR
	short		tbl_trans - tbl_trans	# $2c-5 ERROR
	short		tbl_trans - tbl_trans	# $2c-6 ERROR
	short		tbl_trans - tbl_trans	# $2c-7 ERROR

	short		tbl_trans - tbl_trans	# $2d-0 ERROR
	short		tbl_trans - tbl_trans	# $2d-1 ERROR
	short		tbl_trans - tbl_trans	# $2d-2 ERROR
	short		tbl_trans - tbl_trans	# $2d-3 ERROR
	short		tbl_trans - tbl_trans	# $2d-4 ERROR
	short		tbl_trans - tbl_trans	# $2d-5 ERROR
	short		tbl_trans - tbl_trans	# $2d-6 ERROR
	short		tbl_trans - tbl_trans	# $2d-7 ERROR

	short		tbl_trans - tbl_trans	# $2e-0 ERROR
	short		tbl_trans - tbl_trans	# $2e-1 ERROR
	short		tbl_trans - tbl_trans	# $2e-2 ERROR
	short		tbl_trans - tbl_trans	# $2e-3 ERROR
	short		tbl_trans - tbl_trans	# $2e-4 ERROR
	short		tbl_trans - tbl_trans	# $2e-5 ERROR
	short		tbl_trans - tbl_trans	# $2e-6 ERROR
	short		tbl_trans - tbl_trans	# $2e-7 ERROR

	short		tbl_trans - tbl_trans	# $2f-0 ERROR
	short		tbl_trans - tbl_trans	# $2f-1 ERROR
	short		tbl_trans - tbl_trans	# $2f-2 ERROR
	short		tbl_trans - tbl_trans	# $2f-3 ERROR
	short		tbl_trans - tbl_trans	# $2f-4 ERROR
	short		tbl_trans - tbl_trans	# $2f-5 ERROR
	short		tbl_trans - tbl_trans	# $2f-6 ERROR
	short		tbl_trans - tbl_trans	# $2f-7 ERROR

	short		ssincos	 - tbl_trans	# $30-0 fsincos norm
	short		ssincosz - tbl_trans	# $30-1 fsincos zero
	short		ssincosi - tbl_trans	# $30-2 fsincos inf
	short		ssincosqnan - tbl_trans	# $30-3 fsincos qnan
	short		ssincosd - tbl_trans	# $30-5 fsincos denorm
	short		ssincossnan - tbl_trans	# $30-4 fsincos snan
	short		tbl_trans - tbl_trans	# $30-6 fsincos unnorm
	short		tbl_trans - tbl_trans	# $30-7 ERROR

	short		ssincos	 - tbl_trans	# $31-0 fsincos norm
	short		ssincosz - tbl_trans	# $31-1 fsincos zero
	short		ssincosi - tbl_trans	# $31-2 fsincos inf
	short		ssincosqnan - tbl_trans	# $31-3 fsincos qnan
	short		ssincosd - tbl_trans	# $31-5 fsincos denorm
	short		ssincossnan - tbl_trans	# $31-4 fsincos snan
	short		tbl_trans - tbl_trans	# $31-6 fsincos unnorm
	short		tbl_trans - tbl_trans	# $31-7 ERROR

	short		ssincos	 - tbl_trans	# $32-0 fsincos norm
	short		ssincosz - tbl_trans	# $32-1 fsincos zero
	short		ssincosi - tbl_trans	# $32-2 fsincos inf
	short		ssincosqnan - tbl_trans	# $32-3 fsincos qnan
	short		ssincosd - tbl_trans	# $32-5 fsincos denorm
	short		ssincossnan - tbl_trans	# $32-4 fsincos snan
	short		tbl_trans - tbl_trans	# $32-6 fsincos unnorm
	short		tbl_trans - tbl_trans	# $32-7 ERROR

	short		ssincos	 - tbl_trans	# $33-0 fsincos norm
	short		ssincosz - tbl_trans	# $33-1 fsincos zero
	short		ssincosi - tbl_trans	# $33-2 fsincos inf
	short		ssincosqnan - tbl_trans	# $33-3 fsincos qnan
	short		ssincosd - tbl_trans	# $33-5 fsincos denorm
	short		ssincossnan - tbl_trans	# $33-4 fsincos snan
	short		tbl_trans - tbl_trans	# $33-6 fsincos unnorm
	short		tbl_trans - tbl_trans	# $33-7 ERROR

	short		ssincos	 - tbl_trans	# $34-0 fsincos norm
	short		ssincosz - tbl_trans	# $34-1 fsincos zero
	short		ssincosi - tbl_trans	# $34-2 fsincos inf
	short		ssincosqnan - tbl_trans	# $34-3 fsincos qnan
	short		ssincosd - tbl_trans	# $34-5 fsincos denorm
	short		ssincossnan - tbl_trans	# $34-4 fsincos snan
	short		tbl_trans - tbl_trans	# $34-6 fsincos unnorm
	short		tbl_trans - tbl_trans	# $34-7 ERROR

	short		ssincos	 - tbl_trans	# $35-0 fsincos norm
	short		ssincosz - tbl_trans	# $35-1 fsincos zero
	short		ssincosi - tbl_trans	# $35-2 fsincos inf
	short		ssincosqnan - tbl_trans	# $35-3 fsincos qnan
	short		ssincosd - tbl_trans	# $35-5 fsincos denorm
	short		ssincossnan - tbl_trans	# $35-4 fsincos snan
	short		tbl_trans - tbl_trans	# $35-6 fsincos unnorm
	short		tbl_trans - tbl_trans	# $35-7 ERROR

	short		ssincos	 - tbl_trans	# $36-0 fsincos norm
	short		ssincosz - tbl_trans	# $36-1 fsincos zero
	short		ssincosi - tbl_trans	# $36-2 fsincos inf
	short		ssincosqnan - tbl_trans	# $36-3 fsincos qnan
	short		ssincosd - tbl_trans	# $36-5 fsincos denorm
	short		ssincossnan - tbl_trans	# $36-4 fsincos snan
	short		tbl_trans - tbl_trans	# $36-6 fsincos unnorm
	short		tbl_trans - tbl_trans	# $36-7 ERROR

	short		ssincos	 - tbl_trans	# $37-0 fsincos norm
	short		ssincosz - tbl_trans	# $37-1 fsincos zero
	short		ssincosi - tbl_trans	# $37-2 fsincos inf
	short		ssincosqnan - tbl_trans	# $37-3 fsincos qnan
	short		ssincosd - tbl_trans	# $37-5 fsincos denorm
	short		ssincossnan - tbl_trans	# $37-4 fsincos snan
	short		tbl_trans - tbl_trans	# $37-6 fsincos unnorm
	short		tbl_trans - tbl_trans	# $37-7 ERROR

##########

# the instruction fetch access for the displacement word for the
# fdbcc emulation failed. here, we create an access error frame
# from the current frame and branch to _real_access().
funimp_iacc:
	movm.l		EXC_DREGS(%a6),&0x0303	# restore d0-d1/a0-a1
	fmovm.l		USER_FPCR(%a6),%fpcr,%fpsr,%fpiar # restore ctrl regs
	fmovm.x		EXC_FPREGS(%a6),&0xc0	# restore fp0-fp1

	mov.l		USER_FPIAR(%a6),EXC_PC(%a6) # store current PC

	unlk		%a6

	mov.l		(%sp),-(%sp)		# store SR,hi(PC)
	mov.w		0x8(%sp),0x4(%sp)	# store lo(PC)
	mov.w		&0x4008,0x6(%sp)	# store voff
	mov.l		0x2(%sp),0x8(%sp)	# store EA
	mov.l		&0x09428001,0xc(%sp)	# store FSLW

	btst		&0x5,(%sp)		# user or supervisor mode?
	beq.b		funimp_iacc_end		# user
	bset		&0x2,0xd(%sp)		# set supervisor TM bit

funimp_iacc_end:
	bra.l		_real_access

#########################################################################
# ssin():     computes the sine of a normalized input			#
# ssind():    computes the sine of a denormalized input			#
# scos():     computes the cosine of a normalized input			#
# scosd():    computes the cosine of a denormalized input		#
# ssincos():  computes the sine and cosine of a normalized input	#
# ssincosd(): computes the sine and cosine of a denormalized input	#
#									#
# INPUT *************************************************************** #
#	a0 = pointer to extended precision input			#
#	d0 = round precision,mode					#
#									#
# OUTPUT ************************************************************** #
#	fp0 = sin(X) or cos(X) 						#
#									#
#    For ssincos(X):							#
#	fp0 = sin(X)							#
#	fp1 = cos(X)							#
#									#
# ACCURACY and MONOTONICITY ******************************************* #
#	The returned result is within 1 ulp in 64 significant bit, i.e.	#
#	within 0.5001 ulp to 53 bits if the result is subsequently 	#
#	rounded to double precision. The result is provably monotonic	#
#	in double precision.						#
#									#
# ALGORITHM ***********************************************************	#
#									#
#	SIN and COS:							#
#	1. If SIN is invoked, set AdjN := 0; otherwise, set AdjN := 1.	#
#									#
#	2. If |X| >= 15Pi or |X| < 2**(-40), go to 7.			#
#									#
#	3. Decompose X as X = N(Pi/2) + r where |r| <= Pi/4. Let	#
#		k = N mod 4, so in particular, k = 0,1,2,or 3.		#
#		Overwrite k by k := k + AdjN.				#
#									#
#	4. If k is even, go to 6.					#
#									#
#	5. (k is odd) Set j := (k-1)/2, sgn := (-1)**j. 		#
#		Return sgn*cos(r) where cos(r) is approximated by an 	#
#		even polynomial in r, 1 + r*r*(B1+s*(B2+ ... + s*B8)),	#
#		s = r*r.						#
#		Exit.							#
#									#
#	6. (k is even) Set j := k/2, sgn := (-1)**j. Return sgn*sin(r)	#
#		where sin(r) is approximated by an odd polynomial in r	#
#		r + r*s*(A1+s*(A2+ ... + s*A7)),	s = r*r.	#
#		Exit.							#
#									#
#	7. If |X| > 1, go to 9.						#
#									#
#	8. (|X|<2**(-40)) If SIN is invoked, return X; 			#
#		otherwise return 1.					#
#									#
#	9. Overwrite X by X := X rem 2Pi. Now that |X| <= Pi, 		#
#		go back to 3.						#
#									#
#	SINCOS:								#
#	1. If |X| >= 15Pi or |X| < 2**(-40), go to 6.			#
#									#
#	2. Decompose X as X = N(Pi/2) + r where |r| <= Pi/4. Let	#
#		k = N mod 4, so in particular, k = 0,1,2,or 3.		#
#									#
#	3. If k is even, go to 5.					#
#									#
#	4. (k is odd) Set j1 := (k-1)/2, j2 := j1 (EOR) (k mod 2), ie.	#
#		j1 exclusive or with the l.s.b. of k.			#
#		sgn1 := (-1)**j1, sgn2 := (-1)**j2.			#
#		SIN(X) = sgn1 * cos(r) and COS(X) = sgn2*sin(r) where	#
#		sin(r) and cos(r) are computed as odd and even 		#
#		polynomials in r, respectively. Exit			#
#									#
#	5. (k is even) Set j1 := k/2, sgn1 := (-1)**j1.			#
#		SIN(X) = sgn1 * sin(r) and COS(X) = sgn1*cos(r) where	#
#		sin(r) and cos(r) are computed as odd and even 		#
#		polynomials in r, respectively. Exit			#
#									#
#	6. If |X| > 1, go to 8.						#
#									#
#	7. (|X|<2**(-40)) SIN(X) = X and COS(X) = 1. Exit.		#
#									#
#	8. Overwrite X by X := X rem 2Pi. Now that |X| <= Pi, 		#
#		go back to 2.						#
#									#
#########################################################################

SINA7:	long		0xBD6AAA77,0xCCC994F5
SINA6:	long		0x3DE61209,0x7AAE8DA1
SINA5:	long		0xBE5AE645,0x2A118AE4
SINA4:	long		0x3EC71DE3,0xA5341531
SINA3:	long		0xBF2A01A0,0x1A018B59,0x00000000,0x00000000
SINA2:	long		0x3FF80000,0x88888888,0x888859AF,0x00000000
SINA1:	long		0xBFFC0000,0xAAAAAAAA,0xAAAAAA99,0x00000000

COSB8:	long		0x3D2AC4D0,0xD6011EE3
COSB7:	long		0xBDA9396F,0x9F45AC19
COSB6:	long		0x3E21EED9,0x0612C972
COSB5:	long		0xBE927E4F,0xB79D9FCF
COSB4:	long		0x3EFA01A0,0x1A01D423,0x00000000,0x00000000
COSB3:	long		0xBFF50000,0xB60B60B6,0x0B61D438,0x00000000
COSB2:	long		0x3FFA0000,0xAAAAAAAA,0xAAAAAB5E
COSB1:	long		0xBF000000

	set		INARG,FP_SCR0

	set		X,FP_SCR0
#	set		XDCARE,X+2
	set		XFRAC,X+4

	set		RPRIME,FP_SCR0
	set		SPRIME,FP_SCR1

	set		POSNEG1,L_SCR1
	set		TWOTO63,L_SCR1

	set		ENDFLAG,L_SCR2
	set		INT,L_SCR2

	set		ADJN,L_SCR3

############################################
	global		ssin
ssin:
	mov.l		&0,ADJN(%a6)		# yes; SET ADJN TO 0
	bra.b		SINBGN

############################################
	global		scos
scos:
	mov.l		&1,ADJN(%a6)		# yes; SET ADJN TO 1

############################################
SINBGN:
#--SAVE FPCR, FP1. CHECK IF |X| IS TOO SMALL OR LARGE

	fmov.x		(%a0),%fp0		# LOAD INPUT
	fmov.x		%fp0,X(%a6)		# save input at X

# "COMPACTIFY" X
	mov.l		(%a0),%d1		# put exp in hi word
	mov.w		4(%a0),%d1		# fetch hi(man)
	and.l		&0x7FFFFFFF,%d1		# strip sign

	cmpi.l		%d1,&0x3FD78000		# is |X| >= 2**(-40)?
	bge.b		SOK1			# no
	bra.w		SINSM			# yes; input is very small

SOK1:
	cmp.l		%d1,&0x4004BC7E		# is |X| < 15 PI?
	blt.b		SINMAIN			# no
	bra.w		SREDUCEX		# yes; input is very large

#--THIS IS THE USUAL CASE, |X| <= 15 PI.
#--THE ARGUMENT REDUCTION IS DONE BY TABLE LOOK UP.
SINMAIN:
	fmov.x		%fp0,%fp1
	fmul.d		TWOBYPI(%pc),%fp1 	# X*2/PI

	lea		PITBL+0x200(%pc),%a1 	# TABLE OF N*PI/2, N = -32,...,32

	fmov.l		%fp1,INT(%a6)		# CONVERT TO INTEGER

	mov.l		INT(%a6),%d1		# make a copy of N
	asl.l		&4,%d1			# N *= 16
	add.l		%d1,%a1			# tbl_addr = a1 + (N*16)

# A1 IS THE ADDRESS OF N*PIBY2
# ...WHICH IS IN TWO PIECES Y1 & Y2
	fsub.x		(%a1)+,%fp0 		# X-Y1
	fsub.s		(%a1),%fp0 		# fp0 = R = (X-Y1)-Y2

SINCONT:
#--continuation from REDUCEX

#--GET N+ADJN AND SEE IF SIN(R) OR COS(R) IS NEEDED
	mov.l		INT(%a6),%d1
	add.l		ADJN(%a6),%d1		# SEE IF D0 IS ODD OR EVEN
	ror.l		&1,%d1			# D0 WAS ODD IFF D0 IS NEGATIVE
	cmp.l		%d1,&0
	blt.w		COSPOLY

#--LET J BE THE LEAST SIG. BIT OF D0, LET SGN := (-1)**J.
#--THEN WE RETURN	SGN*SIN(R). SGN*SIN(R) IS COMPUTED BY
#--R' + R'*S*(A1 + S(A2 + S(A3 + S(A4 + ... + SA7)))), WHERE
#--R' = SGN*R, S=R*R. THIS CAN BE REWRITTEN AS
#--R' + R'*S*( [A1+T(A3+T(A5+TA7))] + [S(A2+T(A4+TA6))])
#--WHERE T=S*S.
#--NOTE THAT A3 THROUGH A7 ARE STORED IN DOUBLE PRECISION
#--WHILE A1 AND A2 ARE IN DOUBLE-EXTENDED FORMAT.
SINPOLY:
	fmovm.x		&0x0c,-(%sp)		# save fp2/fp3

	fmov.x		%fp0,X(%a6)		# X IS R
	fmul.x		%fp0,%fp0		# FP0 IS S

	fmov.d		SINA7(%pc),%fp3
	fmov.d		SINA6(%pc),%fp2

	fmov.x		%fp0,%fp1
	fmul.x		%fp1,%fp1		# FP1 IS T

	ror.l		&1,%d1
	and.l		&0x80000000,%d1
# ...LEAST SIG. BIT OF D0 IN SIGN POSITION
	eor.l		%d1,X(%a6)		# X IS NOW R'= SGN*R

	fmul.x		%fp1,%fp3		# TA7
	fmul.x		%fp1,%fp2		# TA6

	fadd.d		SINA5(%pc),%fp3		# A5+TA7
	fadd.d		SINA4(%pc),%fp2		# A4+TA6

	fmul.x		%fp1,%fp3		# T(A5+TA7)
	fmul.x		%fp1,%fp2		# T(A4+TA6)

	fadd.d		SINA3(%pc),%fp3		# A3+T(A5+TA7)
	fadd.x		SINA2(%pc),%fp2		# A2+T(A4+TA6)

	fmul.x		%fp3,%fp1		# T(A3+T(A5+TA7))

	fmul.x		%fp0,%fp2		# S(A2+T(A4+TA6))
	fadd.x		SINA1(%pc),%fp1		# A1+T(A3+T(A5+TA7))
	fmul.x		X(%a6),%fp0		# R'*S

	fadd.x		%fp2,%fp1		# [A1+T(A3+T(A5+TA7))]+[S(A2+T(A4+TA6))]

	fmul.x		%fp1,%fp0		# SIN(R')-R'

	fmovm.x		(%sp)+,&0x30		# restore fp2/fp3

	fmov.l		%d0,%fpcr		# restore users round mode,prec
	fadd.x		X(%a6),%fp0		# last inst - possible exception set
	bra		t_inx2

#--LET J BE THE LEAST SIG. BIT OF D0, LET SGN := (-1)**J.
#--THEN WE RETURN	SGN*COS(R). SGN*COS(R) IS COMPUTED BY
#--SGN + S'*(B1 + S(B2 + S(B3 + S(B4 + ... + SB8)))), WHERE
#--S=R*R AND S'=SGN*S. THIS CAN BE REWRITTEN AS
#--SGN + S'*([B1+T(B3+T(B5+TB7))] + [S(B2+T(B4+T(B6+TB8)))])
#--WHERE T=S*S.
#--NOTE THAT B4 THROUGH B8 ARE STORED IN DOUBLE PRECISION
#--WHILE B2 AND B3 ARE IN DOUBLE-EXTENDED FORMAT, B1 IS -1/2
#--AND IS THEREFORE STORED AS SINGLE PRECISION.
COSPOLY:
	fmovm.x		&0x0c,-(%sp)		# save fp2/fp3

	fmul.x		%fp0,%fp0		# FP0 IS S

	fmov.d		COSB8(%pc),%fp2
	fmov.d		COSB7(%pc),%fp3

	fmov.x		%fp0,%fp1
	fmul.x		%fp1,%fp1		# FP1 IS T

	fmov.x		%fp0,X(%a6)		# X IS S
	ror.l		&1,%d1
	and.l		&0x80000000,%d1
# ...LEAST SIG. BIT OF D0 IN SIGN POSITION

	fmul.x		%fp1,%fp2		# TB8

	eor.l		%d1,X(%a6)		# X IS NOW S'= SGN*S
	and.l		&0x80000000,%d1

	fmul.x		%fp1,%fp3		# TB7

	or.l		&0x3F800000,%d1		# D0 IS SGN IN SINGLE
	mov.l		%d1,POSNEG1(%a6)

	fadd.d		COSB6(%pc),%fp2		# B6+TB8
	fadd.d		COSB5(%pc),%fp3		# B5+TB7

	fmul.x		%fp1,%fp2		# T(B6+TB8)
	fmul.x		%fp1,%fp3		# T(B5+TB7)

	fadd.d		COSB4(%pc),%fp2		# B4+T(B6+TB8)
	fadd.x		COSB3(%pc),%fp3		# B3+T(B5+TB7)

	fmul.x		%fp1,%fp2		# T(B4+T(B6+TB8))
	fmul.x		%fp3,%fp1		# T(B3+T(B5+TB7))

	fadd.x		COSB2(%pc),%fp2		# B2+T(B4+T(B6+TB8))
	fadd.s		COSB1(%pc),%fp1		# B1+T(B3+T(B5+TB7))

	fmul.x		%fp2,%fp0		# S(B2+T(B4+T(B6+TB8)))

	fadd.x		%fp1,%fp0

	fmul.x		X(%a6),%fp0

	fmovm.x		(%sp)+,&0x30		# restore fp2/fp3

	fmov.l		%d0,%fpcr		# restore users round mode,prec
	fadd.s		POSNEG1(%a6),%fp0	# last inst - possible exception set
	bra		t_inx2

##############################################

# SINe: Big OR Small?
#--IF |X| > 15PI, WE USE THE GENERAL ARGUMENT REDUCTION.
#--IF |X| < 2**(-40), RETURN X OR 1.
SINBORS:
	cmp.l		%d1,&0x3FFF8000
	bgt.l		SREDUCEX

SINSM:
	mov.l		ADJN(%a6),%d1
	cmp.l		%d1,&0
	bgt.b		COSTINY

# here, the operation may underflow iff the precision is sgl or dbl.
# extended denorms are handled through another entry point.
SINTINY:
#	mov.w		&0x0000,XDCARE(%a6)	# JUST IN CASE

	fmov.l		%d0,%fpcr		# restore users round mode,prec
	mov.b		&FMOV_OP,%d1		# last inst is MOVE
	fmov.x		X(%a6),%fp0		# last inst - possible exception set
	bra		t_catch

COSTINY:
	fmov.s		&0x3F800000,%fp0	# fp0 = 1.0
	fmov.l		%d0,%fpcr		# restore users round mode,prec
	fadd.s 		&0x80800000,%fp0	# last inst - possible exception set
	bra		t_pinx2

################################################
	global		ssind
#--SIN(X) = X FOR DENORMALIZED X
ssind:
	bra		t_extdnrm

############################################
	global		scosd
#--COS(X) = 1 FOR DENORMALIZED X
scosd:
	fmov.s		&0x3F800000,%fp0	# fp0 = 1.0
	bra		t_pinx2

##################################################

	global		ssincos
ssincos:
#--SET ADJN TO 4
	mov.l		&4,ADJN(%a6)

	fmov.x		(%a0),%fp0		# LOAD INPUT
	fmov.x		%fp0,X(%a6)

	mov.l		(%a0),%d1
	mov.w		4(%a0),%d1
	and.l		&0x7FFFFFFF,%d1		# COMPACTIFY X

	cmp.l		%d1,&0x3FD78000		# |X| >= 2**(-40)?
	bge.b		SCOK1
	bra.w		SCSM

SCOK1:
	cmp.l		%d1,&0x4004BC7E		# |X| < 15 PI?
	blt.b		SCMAIN
	bra.w		SREDUCEX


#--THIS IS THE USUAL CASE, |X| <= 15 PI.
#--THE ARGUMENT REDUCTION IS DONE BY TABLE LOOK UP.
SCMAIN:
	fmov.x		%fp0,%fp1

	fmul.d		TWOBYPI(%pc),%fp1	# X*2/PI

	lea		PITBL+0x200(%pc),%a1	# TABLE OF N*PI/2, N = -32,...,32

	fmov.l		%fp1,INT(%a6)		# CONVERT TO INTEGER

	mov.l		INT(%a6),%d1
	asl.l		&4,%d1
	add.l		%d1,%a1			# ADDRESS OF N*PIBY2, IN Y1, Y2

	fsub.x		(%a1)+,%fp0		# X-Y1
	fsub.s		(%a1),%fp0		# FP0 IS R = (X-Y1)-Y2

SCCONT:
#--continuation point from REDUCEX

	mov.l		INT(%a6),%d1
	ror.l		&1,%d1
	cmp.l		%d1,&0			# D0 < 0 IFF N IS ODD
	bge.w		NEVEN

SNODD:
#--REGISTERS SAVED SO FAR: D0, A0, FP2.
	fmovm.x		&0x04,-(%sp)		# save fp2

	fmov.x		%fp0,RPRIME(%a6)
	fmul.x		%fp0,%fp0		# FP0 IS S = R*R
	fmov.d		SINA7(%pc),%fp1		# A7
	fmov.d		COSB8(%pc),%fp2		# B8
	fmul.x		%fp0,%fp1		# SA7
	fmul.x		%fp0,%fp2		# SB8

	mov.l		%d2,-(%sp)
	mov.l		%d1,%d2
	ror.l		&1,%d2
	and.l		&0x80000000,%d2
	eor.l		%d1,%d2
	and.l		&0x80000000,%d2

	fadd.d		SINA6(%pc),%fp1		# A6+SA7
	fadd.d		COSB7(%pc),%fp2		# B7+SB8

	fmul.x		%fp0,%fp1		# S(A6+SA7)
	eor.l		%d2,RPRIME(%a6)
	mov.l		(%sp)+,%d2
	fmul.x		%fp0,%fp2		# S(B7+SB8)
	ror.l		&1,%d1
	and.l		&0x80000000,%d1
	mov.l		&0x3F800000,POSNEG1(%a6)
	eor.l		%d1,POSNEG1(%a6)

	fadd.d		SINA5(%pc),%fp1		# A5+S(A6+SA7)
	fadd.d		COSB6(%pc),%fp2		# B6+S(B7+SB8)

	fmul.x		%fp0,%fp1		# S(A5+S(A6+SA7))
	fmul.x		%fp0,%fp2		# S(B6+S(B7+SB8))
	fmov.x		%fp0,SPRIME(%a6)

	fadd.d		SINA4(%pc),%fp1		# A4+S(A5+S(A6+SA7))
	eor.l		%d1,SPRIME(%a6)
	fadd.d		COSB5(%pc),%fp2		# B5+S(B6+S(B7+SB8))

	fmul.x		%fp0,%fp1		# S(A4+...)
	fmul.x		%fp0,%fp2		# S(B5+...)

	fadd.d		SINA3(%pc),%fp1		# A3+S(A4+...)
	fadd.d		COSB4(%pc),%fp2		# B4+S(B5+...)

	fmul.x		%fp0,%fp1		# S(A3+...)
	fmul.x		%fp0,%fp2		# S(B4+...)

	fadd.x		SINA2(%pc),%fp1		# A2+S(A3+...)
	fadd.x		COSB3(%pc),%fp2		# B3+S(B4+...)

	fmul.x		%fp0,%fp1		# S(A2+...)
	fmul.x		%fp0,%fp2		# S(B3+...)

	fadd.x		SINA1(%pc),%fp1		# A1+S(A2+...)
	fadd.x		COSB2(%pc),%fp2		# B2+S(B3+...)

	fmul.x		%fp0,%fp1		# S(A1+...)
	fmul.x		%fp2,%fp0		# S(B2+...)

	fmul.x		RPRIME(%a6),%fp1	# R'S(A1+...)
	fadd.s		COSB1(%pc),%fp0		# B1+S(B2...)
	fmul.x		SPRIME(%a6),%fp0	# S'(B1+S(B2+...))

	fmovm.x		(%sp)+,&0x20		# restore fp2

	fmov.l		%d0,%fpcr
	fadd.x		RPRIME(%a6),%fp1	# COS(X)
	bsr		sto_cos			# store cosine result
	fadd.s		POSNEG1(%a6),%fp0	# SIN(X)
	bra		t_inx2

NEVEN:
#--REGISTERS SAVED SO FAR: FP2.
	fmovm.x		&0x04,-(%sp)		# save fp2

	fmov.x		%fp0,RPRIME(%a6)
	fmul.x		%fp0,%fp0		# FP0 IS S = R*R

	fmov.d		COSB8(%pc),%fp1		# B8
	fmov.d		SINA7(%pc),%fp2		# A7

	fmul.x		%fp0,%fp1		# SB8
	fmov.x		%fp0,SPRIME(%a6)
	fmul.x		%fp0,%fp2		# SA7

	ror.l		&1,%d1
	and.l		&0x80000000,%d1

	fadd.d		COSB7(%pc),%fp1		# B7+SB8
	fadd.d		SINA6(%pc),%fp2		# A6+SA7

	eor.l		%d1,RPRIME(%a6)
	eor.l		%d1,SPRIME(%a6)

	fmul.x		%fp0,%fp1		# S(B7+SB8)

	or.l		&0x3F800000,%d1
	mov.l		%d1,POSNEG1(%a6)

	fmul.x		%fp0,%fp2		# S(A6+SA7)

	fadd.d		COSB6(%pc),%fp1		# B6+S(B7+SB8)
	fadd.d		SINA5(%pc),%fp2		# A5+S(A6+SA7)

	fmul.x		%fp0,%fp1		# S(B6+S(B7+SB8))
	fmul.x		%fp0,%fp2		# S(A5+S(A6+SA7))

	fadd.d		COSB5(%pc),%fp1		# B5+S(B6+S(B7+SB8))
	fadd.d		SINA4(%pc),%fp2		# A4+S(A5+S(A6+SA7))

	fmul.x		%fp0,%fp1		# S(B5+...)
	fmul.x		%fp0,%fp2		# S(A4+...)

	fadd.d		COSB4(%pc),%fp1		# B4+S(B5+...)
	fadd.d		SINA3(%pc),%fp2		# A3+S(A4+...)

	fmul.x		%fp0,%fp1		# S(B4+...)
	fmul.x		%fp0,%fp2		# S(A3+...)

	fadd.x		COSB3(%pc),%fp1		# B3+S(B4+...)
	fadd.x		SINA2(%pc),%fp2		# A2+S(A3+...)

	fmul.x		%fp0,%fp1		# S(B3+...)
	fmul.x		%fp0,%fp2		# S(A2+...)

	fadd.x		COSB2(%pc),%fp1		# B2+S(B3+...)
	fadd.x		SINA1(%pc),%fp2		# A1+S(A2+...)

	fmul.x		%fp0,%fp1		# S(B2+...)
	fmul.x		%fp2,%fp0		# s(a1+...)


	fadd.s		COSB1(%pc),%fp1		# B1+S(B2...)
	fmul.x		RPRIME(%a6),%fp0	# R'S(A1+...)
	fmul.x		SPRIME(%a6),%fp1	# S'(B1+S(B2+...))

	fmovm.x		(%sp)+,&0x20		# restore fp2

	fmov.l		%d0,%fpcr
	fadd.s		POSNEG1(%a6),%fp1	# COS(X)
	bsr		sto_cos			# store cosine result
	fadd.x		RPRIME(%a6),%fp0	# SIN(X)
	bra		t_inx2

################################################

SCBORS:
	cmp.l		%d1,&0x3FFF8000
	bgt.w		SREDUCEX

################################################

SCSM:
#	mov.w		&0x0000,XDCARE(%a6)
	fmov.s		&0x3F800000,%fp1

	fmov.l		%d0,%fpcr
	fsub.s		&0x00800000,%fp1
	bsr		sto_cos			# store cosine result
	fmov.l		%fpcr,%d0		# d0 must have fpcr,too
	mov.b		&FMOV_OP,%d1		# last inst is MOVE
	fmov.x		X(%a6),%fp0
	bra		t_catch

##############################################

	global		ssincosd
#--SIN AND COS OF X FOR DENORMALIZED X
ssincosd:
	mov.l		%d0,-(%sp)		# save d0
	fmov.s		&0x3F800000,%fp1
	bsr		sto_cos			# store cosine result
	mov.l		(%sp)+,%d0		# restore d0
	bra		t_extdnrm

############################################

#--WHEN REDUCEX IS USED, THE CODE WILL INEVITABLY BE SLOW.
#--THIS REDUCTION METHOD, HOWEVER, IS MUCH FASTER THAN USING
#--THE REMAINDER INSTRUCTION WHICH IS NOW IN SOFTWARE.
SREDUCEX:
	fmovm.x		&0x3c,-(%sp)		# save {fp2-fp5}
	mov.l		%d2,-(%sp)		# save d2
	fmov.s		&0x00000000,%fp1	# fp1 = 0

#--If compact form of abs(arg) in d0=$7ffeffff, argument is so large that
#--there is a danger of unwanted overflow in first LOOP iteration.  In this
#--case, reduce argument by one remainder step to make subsequent reduction
#--safe.
	cmp.l		%d1,&0x7ffeffff		# is arg dangerously large?
	bne.b		SLOOP			# no

# yes; create 2**16383*PI/2
	mov.w		&0x7ffe,FP_SCR0_EX(%a6)
	mov.l		&0xc90fdaa2,FP_SCR0_HI(%a6)
	clr.l		FP_SCR0_LO(%a6)

# create low half of 2**16383*PI/2 at FP_SCR1
	mov.w		&0x7fdc,FP_SCR1_EX(%a6)
	mov.l		&0x85a308d3,FP_SCR1_HI(%a6)
	clr.l		FP_SCR1_LO(%a6)

	ftest.x		%fp0			# test sign of argument
	fblt.w		sred_neg

	or.b		&0x80,FP_SCR0_EX(%a6)	# positive arg
	or.b		&0x80,FP_SCR1_EX(%a6)
sred_neg:
	fadd.x		FP_SCR0(%a6),%fp0	# high part of reduction is exact
	fmov.x		%fp0,%fp1		# save high result in fp1
	fadd.x		FP_SCR1(%a6),%fp0	# low part of reduction
	fsub.x		%fp0,%fp1		# determine low component of result
	fadd.x		FP_SCR1(%a6),%fp1	# fp0/fp1 are reduced argument.

#--ON ENTRY, FP0 IS X, ON RETURN, FP0 IS X REM PI/2, |X| <= PI/4.
#--integer quotient will be stored in N
#--Intermeditate remainder is 66-bit long; (R,r) in (FP0,FP1)
SLOOP:
	fmov.x		%fp0,INARG(%a6)		# +-2**K * F, 1 <= F < 2
	mov.w		INARG(%a6),%d1
	mov.l		%d1,%a1			# save a copy of D0
	and.l		&0x00007FFF,%d1
	sub.l		&0x00003FFF,%d1		# d0 = K
	cmp.l		%d1,&28
	ble.b		SLASTLOOP
SCONTLOOP:
	sub.l		&27,%d1			# d0 = L := K-27
	mov.b		&0,ENDFLAG(%a6)
	bra.b		SWORK
SLASTLOOP:
	clr.l		%d1			# d0 = L := 0
	mov.b		&1,ENDFLAG(%a6)

SWORK:
#--FIND THE REMAINDER OF (R,r) W.R.T.	2**L * (PI/2). L IS SO CHOSEN
#--THAT	INT( X * (2/PI) / 2**(L) ) < 2**29.

#--CREATE 2**(-L) * (2/PI), SIGN(INARG)*2**(63),
#--2**L * (PIby2_1), 2**L * (PIby2_2)

	mov.l		&0x00003FFE,%d2		# BIASED EXP OF 2/PI
	sub.l		%d1,%d2			# BIASED EXP OF 2**(-L)*(2/PI)

	mov.l		&0xA2F9836E,FP_SCR0_HI(%a6)
	mov.l		&0x4E44152A,FP_SCR0_LO(%a6)
	mov.w		%d2,FP_SCR0_EX(%a6)	# FP_SCR0 = 2**(-L)*(2/PI)

	fmov.x		%fp0,%fp2
	fmul.x		FP_SCR0(%a6),%fp2	# fp2 = X * 2**(-L)*(2/PI)

#--WE MUST NOW FIND INT(FP2). SINCE WE NEED THIS VALUE IN
#--FLOATING POINT FORMAT, THE TWO FMOVE'S	FMOVE.L FP <--> N
#--WILL BE TOO INEFFICIENT. THE WAY AROUND IT IS THAT
#--(SIGN(INARG)*2**63	+	FP2) - SIGN(INARG)*2**63 WILL GIVE
#--US THE DESIRED VALUE IN FLOATING POINT.
	mov.l		%a1,%d2
	swap		%d2
	and.l		&0x80000000,%d2
	or.l		&0x5F000000,%d2		# d2 = SIGN(INARG)*2**63 IN SGL
	mov.l		%d2,TWOTO63(%a6)
	fadd.s		TWOTO63(%a6),%fp2	# THE FRACTIONAL PART OF FP1 IS ROUNDED
	fsub.s		TWOTO63(%a6),%fp2	# fp2 = N
#	fint.x		%fp2

#--CREATING 2**(L)*Piby2_1 and 2**(L)*Piby2_2
	mov.l		%d1,%d2			# d2 = L

	add.l		&0x00003FFF,%d2		# BIASED EXP OF 2**L * (PI/2)
	mov.w		%d2,FP_SCR0_EX(%a6)
	mov.l		&0xC90FDAA2,FP_SCR0_HI(%a6)
	clr.l		FP_SCR0_LO(%a6)		# FP_SCR0 = 2**(L) * Piby2_1

	add.l		&0x00003FDD,%d1
	mov.w		%d1,FP_SCR1_EX(%a6)
	mov.l		&0x85A308D3,FP_SCR1_HI(%a6)
	clr.l		FP_SCR1_LO(%a6)		# FP_SCR1 = 2**(L) * Piby2_2

	mov.b		ENDFLAG(%a6),%d1

#--We are now ready to perform (R+r) - N*P1 - N*P2, P1 = 2**(L) * Piby2_1 and
#--P2 = 2**(L) * Piby2_2
	fmov.x		%fp2,%fp4		# fp4 = N
	fmul.x		FP_SCR0(%a6),%fp4	# fp4 = W = N*P1
	fmov.x		%fp2,%fp5		# fp5 = N
	fmul.x		FP_SCR1(%a6),%fp5	# fp5 = w = N*P2
	fmov.x		%fp4,%fp3		# fp3 = W = N*P1

#--we want P+p = W+w  but  |p| <= half ulp of P
#--Then, we need to compute  A := R-P   and  a := r-p
	fadd.x		%fp5,%fp3		# fp3 = P
	fsub.x		%fp3,%fp4		# fp4 = W-P

	fsub.x		%fp3,%fp0		# fp0 = A := R - P
	fadd.x		%fp5,%fp4		# fp4 = p = (W-P)+w

	fmov.x		%fp0,%fp3		# fp3 = A
	fsub.x		%fp4,%fp1		# fp1 = a := r - p

#--Now we need to normalize (A,a) to  "new (R,r)" where R+r = A+a but
#--|r| <= half ulp of R.
	fadd.x		%fp1,%fp0		# fp0 = R := A+a
#--No need to calculate r if this is the last loop
	cmp.b		%d1,&0
	bgt.w		SRESTORE

#--Need to calculate r
	fsub.x		%fp0,%fp3		# fp3 = A-R
	fadd.x		%fp3,%fp1		# fp1 = r := (A-R)+a
	bra.w		SLOOP

SRESTORE:
	fmov.l		%fp2,INT(%a6)
	mov.l		(%sp)+,%d2		# restore d2
	fmovm.x		(%sp)+,&0x3c		# restore {fp2-fp5}

	mov.l		ADJN(%a6),%d1
	cmp.l		%d1,&4

	blt.w		SINCONT
	bra.w		SCCONT

#########################################################################
# stan():  computes the tangent of a normalized input			#
# stand(): computes the tangent of a denormalized input			#
#									#
# INPUT *************************************************************** #
#	a0 = pointer to extended precision input			#
#	d0 = round precision,mode					#
#									#
# OUTPUT ************************************************************** #
#	fp0 = tan(X)							#
#									#
# ACCURACY and MONOTONICITY ******************************************* #
#	The returned result is within 3 ulp in 64 significant bit, i.e. #
#	within 0.5001 ulp to 53 bits if the result is subsequently	#
#	rounded to double precision. The result is provably monotonic	#
#	in double precision.						#
#									#
# ALGORITHM *********************************************************** #
#									#
#	1. If |X| >= 15Pi or |X| < 2**(-40), go to 6.			#
#									#
#	2. Decompose X as X = N(Pi/2) + r where |r| <= Pi/4. Let	#
#		k = N mod 2, so in particular, k = 0 or 1.		#
#									#
#	3. If k is odd, go to 5.					#
#									#
#	4. (k is even) Tan(X) = tan(r) and tan(r) is approximated by a	#
#		rational function U/V where				#
#		U = r + r*s*(P1 + s*(P2 + s*P3)), and			#
#		V = 1 + s*(Q1 + s*(Q2 + s*(Q3 + s*Q4))),  s = r*r.	#
#		Exit.							#
#									#
#	4. (k is odd) Tan(X) = -cot(r). Since tan(r) is approximated by #
#		a rational function U/V where				#
#		U = r + r*s*(P1 + s*(P2 + s*P3)), and			#
#		V = 1 + s*(Q1 + s*(Q2 + s*(Q3 + s*Q4))), s = r*r,	#
#		-Cot(r) = -V/U. Exit.					#
#									#
#	6. If |X| > 1, go to 8.						#
#									#
#	7. (|X|<2**(-40)) Tan(X) = X. Exit.				#
#									#
#	8. Overwrite X by X := X rem 2Pi. Now that |X| <= Pi, go back 	#
#		to 2.							#
#									#
#########################################################################

TANQ4:
	long		0x3EA0B759,0xF50F8688
TANP3:
	long		0xBEF2BAA5,0xA8924F04

TANQ3:
	long		0xBF346F59,0xB39BA65F,0x00000000,0x00000000

TANP2:
	long		0x3FF60000,0xE073D3FC,0x199C4A00,0x00000000

TANQ2:
	long		0x3FF90000,0xD23CD684,0x15D95FA1,0x00000000

TANP1:
	long		0xBFFC0000,0x8895A6C5,0xFB423BCA,0x00000000

TANQ1:
	long		0xBFFD0000,0xEEF57E0D,0xA84BC8CE,0x00000000

INVTWOPI:
	long		0x3FFC0000,0xA2F9836E,0x4E44152A,0x00000000

TWOPI1:
	long		0x40010000,0xC90FDAA2,0x00000000,0x00000000
TWOPI2:
	long		0x3FDF0000,0x85A308D4,0x00000000,0x00000000

#--N*PI/2, -32 <= N <= 32, IN A LEADING TERM IN EXT. AND TRAILING
#--TERM IN SGL. NOTE THAT PI IS 64-BIT LONG, THUS N*PI/2 IS AT
#--MOST 69 BITS LONG.
#	global		PITBL
PITBL:
	long		0xC0040000,0xC90FDAA2,0x2168C235,0x21800000
	long		0xC0040000,0xC2C75BCD,0x105D7C23,0xA0D00000
	long		0xC0040000,0xBC7EDCF7,0xFF523611,0xA1E80000
	long		0xC0040000,0xB6365E22,0xEE46F000,0x21480000
	long		0xC0040000,0xAFEDDF4D,0xDD3BA9EE,0xA1200000
	long		0xC0040000,0xA9A56078,0xCC3063DD,0x21FC0000
	long		0xC0040000,0xA35CE1A3,0xBB251DCB,0x21100000
	long		0xC0040000,0x9D1462CE,0xAA19D7B9,0xA1580000
	long		0xC0040000,0x96CBE3F9,0x990E91A8,0x21E00000
	long		0xC0040000,0x90836524,0x88034B96,0x20B00000
	long		0xC0040000,0x8A3AE64F,0x76F80584,0xA1880000
	long		0xC0040000,0x83F2677A,0x65ECBF73,0x21C40000
	long		0xC0030000,0xFB53D14A,0xA9C2F2C2,0x20000000
	long		0xC0030000,0xEEC2D3A0,0x87AC669F,0x21380000
	long		0xC0030000,0xE231D5F6,0x6595DA7B,0xA1300000
	long		0xC0030000,0xD5A0D84C,0x437F4E58,0x9FC00000
	long		0xC0030000,0xC90FDAA2,0x2168C235,0x21000000
	long		0xC0030000,0xBC7EDCF7,0xFF523611,0xA1680000
	long		0xC0030000,0xAFEDDF4D,0xDD3BA9EE,0xA0A00000
	long		0xC0030000,0xA35CE1A3,0xBB251DCB,0x20900000
	long		0xC0030000,0x96CBE3F9,0x990E91A8,0x21600000
	long		0xC0030000,0x8A3AE64F,0x76F80584,0xA1080000
	long		0xC0020000,0xFB53D14A,0xA9C2F2C2,0x1F800000
	long		0xC0020000,0xE231D5F6,0x6595DA7B,0xA0B00000
	long		0xC0020000,0xC90FDAA2,0x2168C235,0x20800000
	long		0xC0020000,0xAFEDDF4D,0xDD3BA9EE,0xA0200000
	long		0xC0020000,0x96CBE3F9,0x990E91A8,0x20E00000
	long		0xC0010000,0xFB53D14A,0xA9C2F2C2,0x1F000000
	long		0xC0010000,0xC90FDAA2,0x2168C235,0x20000000
	long		0xC0010000,0x96CBE3F9,0x990E91A8,0x20600000
	long		0xC0000000,0xC90FDAA2,0x2168C235,0x1F800000
	long		0xBFFF0000,0xC90FDAA2,0x2168C235,0x1F000000
	long		0x00000000,0x00000000,0x00000000,0x00000000
	long		0x3FFF0000,0xC90FDAA2,0x2168C235,0x9F000000
	long		0x40000000,0xC90FDAA2,0x2168C235,0x9F800000
	long		0x40010000,0x96CBE3F9,0x990E91A8,0xA0600000
	long		0x40010000,0xC90FDAA2,0x2168C235,0xA0000000
	long		0x40010000,0xFB53D14A,0xA9C2F2C2,0x9F000000
	long		0x40020000,0x96CBE3F9,0x990E91A8,0xA0E00000
	long		0x40020000,0xAFEDDF4D,0xDD3BA9EE,0x20200000
	long		0x40020000,0xC90FDAA2,0x2168C235,0xA0800000
	long		0x40020000,0xE231D5F6,0x6595DA7B,0x20B00000
	long		0x40020000,0xFB53D14A,0xA9C2F2C2,0x9F800000
	long		0x40030000,0x8A3AE64F,0x76F80584,0x21080000
	long		0x40030000,0x96CBE3F9,0x990E91A8,0xA1600000
	long		0x40030000,0xA35CE1A3,0xBB251DCB,0xA0900000
	long		0x40030000,0xAFEDDF4D,0xDD3BA9EE,0x20A00000
	long		0x40030000,0xBC7EDCF7,0xFF523611,0x21680000
	long		0x40030000,0xC90FDAA2,0x2168C235,0xA1000000
	long		0x40030000,0xD5A0D84C,0x437F4E58,0x1FC00000
	long		0x40030000,0xE231D5F6,0x6595DA7B,0x21300000
	long		0x40030000,0xEEC2D3A0,0x87AC669F,0xA1380000
	long		0x40030000,0xFB53D14A,0xA9C2F2C2,0xA0000000
	long		0x40040000,0x83F2677A,0x65ECBF73,0xA1C40000
	long		0x40040000,0x8A3AE64F,0x76F80584,0x21880000
	long		0x40040000,0x90836524,0x88034B96,0xA0B00000
	long		0x40040000,0x96CBE3F9,0x990E91A8,0xA1E00000
	long		0x40040000,0x9D1462CE,0xAA19D7B9,0x21580000
	long		0x40040000,0xA35CE1A3,0xBB251DCB,0xA1100000
	long		0x40040000,0xA9A56078,0xCC3063DD,0xA1FC0000
	long		0x40040000,0xAFEDDF4D,0xDD3BA9EE,0x21200000
	long		0x40040000,0xB6365E22,0xEE46F000,0xA1480000
	long		0x40040000,0xBC7EDCF7,0xFF523611,0x21E80000
	long		0x40040000,0xC2C75BCD,0x105D7C23,0x20D00000
	long		0x40040000,0xC90FDAA2,0x2168C235,0xA1800000

	set		INARG,FP_SCR0

	set		TWOTO63,L_SCR1
	set		INT,L_SCR1
	set		ENDFLAG,L_SCR2

	global		stan
stan:
	fmov.x		(%a0),%fp0		# LOAD INPUT

	mov.l		(%a0),%d1
	mov.w		4(%a0),%d1
	and.l		&0x7FFFFFFF,%d1

	cmp.l		%d1,&0x3FD78000		# |X| >= 2**(-40)?
	bge.b		TANOK1
	bra.w		TANSM
TANOK1:
	cmp.l		%d1,&0x4004BC7E		# |X| < 15 PI?
	blt.b		TANMAIN
	bra.w		REDUCEX

TANMAIN:
#--THIS IS THE USUAL CASE, |X| <= 15 PI.
#--THE ARGUMENT REDUCTION IS DONE BY TABLE LOOK UP.
	fmov.x		%fp0,%fp1
	fmul.d		TWOBYPI(%pc),%fp1	# X*2/PI

	lea.l		PITBL+0x200(%pc),%a1	# TABLE OF N*PI/2, N = -32,...,32

	fmov.l		%fp1,%d1		# CONVERT TO INTEGER

	asl.l		&4,%d1
	add.l		%d1,%a1			# ADDRESS N*PIBY2 IN Y1, Y2

	fsub.x		(%a1)+,%fp0		# X-Y1

	fsub.s		(%a1),%fp0		# FP0 IS R = (X-Y1)-Y2

	ror.l		&5,%d1
	and.l		&0x80000000,%d1		# D0 WAS ODD IFF D0 < 0

TANCONT:
	fmovm.x		&0x0c,-(%sp)		# save fp2,fp3

	cmp.l		%d1,&0
	blt.w		NODD

	fmov.x		%fp0,%fp1
	fmul.x		%fp1,%fp1		# S = R*R

	fmov.d		TANQ4(%pc),%fp3
	fmov.d		TANP3(%pc),%fp2

	fmul.x		%fp1,%fp3		# SQ4
	fmul.x		%fp1,%fp2		# SP3

	fadd.d		TANQ3(%pc),%fp3		# Q3+SQ4
	fadd.x		TANP2(%pc),%fp2		# P2+SP3

	fmul.x		%fp1,%fp3		# S(Q3+SQ4)
	fmul.x		%fp1,%fp2		# S(P2+SP3)

	fadd.x		TANQ2(%pc),%fp3		# Q2+S(Q3+SQ4)
	fadd.x		TANP1(%pc),%fp2		# P1+S(P2+SP3)

	fmul.x		%fp1,%fp3		# S(Q2+S(Q3+SQ4))
	fmul.x		%fp1,%fp2		# S(P1+S(P2+SP3))

	fadd.x		TANQ1(%pc),%fp3		# Q1+S(Q2+S(Q3+SQ4))
	fmul.x		%fp0,%fp2		# RS(P1+S(P2+SP3))

	fmul.x		%fp3,%fp1		# S(Q1+S(Q2+S(Q3+SQ4)))

	fadd.x		%fp2,%fp0		# R+RS(P1+S(P2+SP3))

	fadd.s		&0x3F800000,%fp1	# 1+S(Q1+...)

	fmovm.x		(%sp)+,&0x30		# restore fp2,fp3

	fmov.l		%d0,%fpcr		# restore users round mode,prec
	fdiv.x		%fp1,%fp0		# last inst - possible exception set
	bra		t_inx2

NODD:
	fmov.x		%fp0,%fp1
	fmul.x		%fp0,%fp0		# S = R*R

	fmov.d		TANQ4(%pc),%fp3
	fmov.d		TANP3(%pc),%fp2

	fmul.x		%fp0,%fp3		# SQ4
	fmul.x		%fp0,%fp2		# SP3

	fadd.d		TANQ3(%pc),%fp3		# Q3+SQ4
	fadd.x		TANP2(%pc),%fp2		# P2+SP3

	fmul.x		%fp0,%fp3		# S(Q3+SQ4)
	fmul.x		%fp0,%fp2		# S(P2+SP3)

	fadd.x		TANQ2(%pc),%fp3		# Q2+S(Q3+SQ4)
	fadd.x		TANP1(%pc),%fp2		# P1+S(P2+SP3)

	fmul.x		%fp0,%fp3		# S(Q2+S(Q3+SQ4))
	fmul.x		%fp0,%fp2		# S(P1+S(P2+SP3))

	fadd.x		TANQ1(%pc),%fp3		# Q1+S(Q2+S(Q3+SQ4))
	fmul.x		%fp1,%fp2		# RS(P1+S(P2+SP3))

	fmul.x		%fp3,%fp0		# S(Q1+S(Q2+S(Q3+SQ4)))

	fadd.x		%fp2,%fp1		# R+RS(P1+S(P2+SP3))
	fadd.s		&0x3F800000,%fp0	# 1+S(Q1+...)

	fmovm.x		(%sp)+,&0x30		# restore fp2,fp3

	fmov.x		%fp1,-(%sp)
	eor.l		&0x80000000,(%sp)

	fmov.l		%d0,%fpcr		# restore users round mode,prec
	fdiv.x		(%sp)+,%fp0		# last inst - possible exception set
	bra		t_inx2

TANBORS:
#--IF |X| > 15PI, WE USE THE GENERAL ARGUMENT REDUCTION.
#--IF |X| < 2**(-40), RETURN X OR 1.
	cmp.l		%d1,&0x3FFF8000
	bgt.b		REDUCEX

TANSM:
	fmov.x		%fp0,-(%sp)
	fmov.l		%d0,%fpcr		# restore users round mode,prec
	mov.b		&FMOV_OP,%d1		# last inst is MOVE
	fmov.x		(%sp)+,%fp0		# last inst - posibble exception set
	bra		t_catch

	global		stand
#--TAN(X) = X FOR DENORMALIZED X
stand:
	bra		t_extdnrm

#--WHEN REDUCEX IS USED, THE CODE WILL INEVITABLY BE SLOW.
#--THIS REDUCTION METHOD, HOWEVER, IS MUCH FASTER THAN USING
#--THE REMAINDER INSTRUCTION WHICH IS NOW IN SOFTWARE.
REDUCEX:
	fmovm.x		&0x3c,-(%sp)		# save {fp2-fp5}
	mov.l		%d2,-(%sp)		# save d2
	fmov.s		&0x00000000,%fp1	# fp1 = 0

#--If compact form of abs(arg) in d0=$7ffeffff, argument is so large that
#--there is a danger of unwanted overflow in first LOOP iteration.  In this
#--case, reduce argument by one remainder step to make subsequent reduction
#--safe.
	cmp.l		%d1,&0x7ffeffff		# is arg dangerously large?
	bne.b		LOOP			# no

# yes; create 2**16383*PI/2
	mov.w		&0x7ffe,FP_SCR0_EX(%a6)
	mov.l		&0xc90fdaa2,FP_SCR0_HI(%a6)
	clr.l		FP_SCR0_LO(%a6)

# create low half of 2**16383*PI/2 at FP_SCR1
	mov.w		&0x7fdc,FP_SCR1_EX(%a6)
	mov.l		&0x85a308d3,FP_SCR1_HI(%a6)
	clr.l		FP_SCR1_LO(%a6)

	ftest.x		%fp0			# test sign of argument
	fblt.w		red_neg

	or.b		&0x80,FP_SCR0_EX(%a6)	# positive arg
	or.b		&0x80,FP_SCR1_EX(%a6)
red_neg:
	fadd.x		FP_SCR0(%a6),%fp0	# high part of reduction is exact
	fmov.x		%fp0,%fp1		# save high result in fp1
	fadd.x		FP_SCR1(%a6),%fp0	# low part of reduction
	fsub.x		%fp0,%fp1		# determine low component of result
	fadd.x		FP_SCR1(%a6),%fp1	# fp0/fp1 are reduced argument.

#--ON ENTRY, FP0 IS X, ON RETURN, FP0 IS X REM PI/2, |X| <= PI/4.
#--integer quotient will be stored in N
#--Intermeditate remainder is 66-bit long; (R,r) in (FP0,FP1)
LOOP:
	fmov.x		%fp0,INARG(%a6)		# +-2**K * F, 1 <= F < 2
	mov.w		INARG(%a6),%d1
	mov.l		%d1,%a1			# save a copy of D0
	and.l		&0x00007FFF,%d1
	sub.l		&0x00003FFF,%d1		# d0 = K
	cmp.l		%d1,&28
	ble.b		LASTLOOP
CONTLOOP:
	sub.l		&27,%d1			# d0 = L := K-27
	mov.b		&0,ENDFLAG(%a6)
	bra.b		WORK
LASTLOOP:
	clr.l		%d1			# d0 = L := 0
	mov.b		&1,ENDFLAG(%a6)

WORK:
#--FIND THE REMAINDER OF (R,r) W.R.T.	2**L * (PI/2). L IS SO CHOSEN
#--THAT	INT( X * (2/PI) / 2**(L) ) < 2**29.

#--CREATE 2**(-L) * (2/PI), SIGN(INARG)*2**(63),
#--2**L * (PIby2_1), 2**L * (PIby2_2)

	mov.l		&0x00003FFE,%d2		# BIASED EXP OF 2/PI
	sub.l		%d1,%d2			# BIASED EXP OF 2**(-L)*(2/PI)

	mov.l		&0xA2F9836E,FP_SCR0_HI(%a6)
	mov.l		&0x4E44152A,FP_SCR0_LO(%a6)
	mov.w		%d2,FP_SCR0_EX(%a6)	# FP_SCR0 = 2**(-L)*(2/PI)

	fmov.x		%fp0,%fp2
	fmul.x		FP_SCR0(%a6),%fp2	# fp2 = X * 2**(-L)*(2/PI)

#--WE MUST NOW FIND INT(FP2). SINCE WE NEED THIS VALUE IN
#--FLOATING POINT FORMAT, THE TWO FMOVE'S	FMOVE.L FP <--> N
#--WILL BE TOO INEFFICIENT. THE WAY AROUND IT IS THAT
#--(SIGN(INARG)*2**63	+	FP2) - SIGN(INARG)*2**63 WILL GIVE
#--US THE DESIRED VALUE IN FLOATING POINT.
	mov.l		%a1,%d2
	swap		%d2
	and.l		&0x80000000,%d2
	or.l		&0x5F000000,%d2		# d2 = SIGN(INARG)*2**63 IN SGL
	mov.l		%d2,TWOTO63(%a6)
	fadd.s		TWOTO63(%a6),%fp2	# THE FRACTIONAL PART OF FP1 IS ROUNDED
	fsub.s		TWOTO63(%a6),%fp2	# fp2 = N
#	fintrz.x	%fp2,%fp2

#--CREATING 2**(L)*Piby2_1 and 2**(L)*Piby2_2
	mov.l		%d1,%d2			# d2 = L

	add.l		&0x00003FFF,%d2		# BIASED EXP OF 2**L * (PI/2)
	mov.w		%d2,FP_SCR0_EX(%a6)
	mov.l		&0xC90FDAA2,FP_SCR0_HI(%a6)
	clr.l		FP_SCR0_LO(%a6)		# FP_SCR0 = 2**(L) * Piby2_1

	add.l		&0x00003FDD,%d1
	mov.w		%d1,FP_SCR1_EX(%a6)
	mov.l		&0x85A308D3,FP_SCR1_HI(%a6)
	clr.l		FP_SCR1_LO(%a6)		# FP_SCR1 = 2**(L) * Piby2_2

	mov.b		ENDFLAG(%a6),%d1

#--We are now ready to perform (R+r) - N*P1 - N*P2, P1 = 2**(L) * Piby2_1 and
#--P2 = 2**(L) * Piby2_2
	fmov.x		%fp2,%fp4		# fp4 = N
	fmul.x		FP_SCR0(%a6),%fp4	# fp4 = W = N*P1
	fmov.x		%fp2,%fp5		# fp5 = N
	fmul.x		FP_SCR1(%a6),%fp5	# fp5 = w = N*P2
	fmov.x		%fp4,%fp3		# fp3 = W = N*P1

#--we want P+p = W+w  but  |p| <= half ulp of P
#--Then, we need to compute  A := R-P   and  a := r-p
	fadd.x		%fp5,%fp3		# fp3 = P
	fsub.x		%fp3,%fp4		# fp4 = W-P

	fsub.x		%fp3,%fp0		# fp0 = A := R - P
	fadd.x		%fp5,%fp4		# fp4 = p = (W-P)+w

	fmov.x		%fp0,%fp3		# fp3 = A
	fsub.x		%fp4,%fp1		# fp1 = a := r - p

#--Now we need to normalize (A,a) to  "new (R,r)" where R+r = A+a but
#--|r| <= half ulp of R.
	fadd.x		%fp1,%fp0		# fp0 = R := A+a
#--No need to calculate r if this is the last loop
	cmp.b		%d1,&0
	bgt.w		RESTORE

#--Need to calculate r
	fsub.x		%fp0,%fp3		# fp3 = A-R
	fadd.x		%fp3,%fp1		# fp1 = r := (A-R)+a
	bra.w		LOOP

RESTORE:
	fmov.l		%fp2,INT(%a6)
	mov.l		(%sp)+,%d2		# restore d2
	fmovm.x		(%sp)+,&0x3c		# restore {fp2-fp5}

	mov.l		INT(%a6),%d1
	ror.l		&1,%d1

	bra.w		TANCONT

#########################################################################
# satan():  computes the arctangent of a normalized number		#
# satand(): computes the arctangent of a denormalized number		#
#									#
# INPUT	*************************************************************** #
#	a0 = pointer to extended precision input			#
#	d0 = round precision,mode					#
#									#
# OUTPUT ************************************************************** #
#	fp0 = arctan(X)							#
#									#
# ACCURACY and MONOTONICITY ******************************************* #
#	The returned result is within 2 ulps in	64 significant bit,	#
#	i.e. within 0.5001 ulp to 53 bits if the result is subsequently	#
#	rounded to double precision. The result is provably monotonic	#
#	in double precision. 						#
#									#
# ALGORITHM *********************************************************** #
#	Step 1. If |X| >= 16 or |X| < 1/16, go to Step 5.		#
#									#
#	Step 2. Let X = sgn * 2**k * 1.xxxxxxxx...x. 			#
#		Note that k = -4, -3,..., or 3.				#
#		Define F = sgn * 2**k * 1.xxxx1, i.e. the first 5 	#
#		significant bits of X with a bit-1 attached at the 6-th	#
#		bit position. Define u to be u = (X-F) / (1 + X*F).	#
#									#
#	Step 3. Approximate arctan(u) by a polynomial poly.		#
#									#
#	Step 4. Return arctan(F) + poly, arctan(F) is fetched from a 	#
#		table of values calculated beforehand. Exit.		#
#									#
#	Step 5. If |X| >= 16, go to Step 7.				#
#									#
#	Step 6. Approximate arctan(X) by an odd polynomial in X. Exit.	#
#									#
#	Step 7. Define X' = -1/X. Approximate arctan(X') by an odd 	#
#		polynomial in X'.					#
#		Arctan(X) = sign(X)*Pi/2 + arctan(X'). Exit.		#
#									#
#########################################################################

ATANA3:	long		0xBFF6687E,0x314987D8
ATANA2:	long		0x4002AC69,0x34A26DB3
ATANA1:	long		0xBFC2476F,0x4E1DA28E

ATANB6:	long		0x3FB34444,0x7F876989
ATANB5:	long		0xBFB744EE,0x7FAF45DB
ATANB4:	long		0x3FBC71C6,0x46940220
ATANB3:	long		0xBFC24924,0x921872F9
ATANB2:	long		0x3FC99999,0x99998FA9
ATANB1:	long		0xBFD55555,0x55555555

ATANC5:	long		0xBFB70BF3,0x98539E6A
ATANC4:	long		0x3FBC7187,0x962D1D7D
ATANC3:	long		0xBFC24924,0x827107B8
ATANC2:	long		0x3FC99999,0x9996263E
ATANC1:	long		0xBFD55555,0x55555536

PPIBY2:	long		0x3FFF0000,0xC90FDAA2,0x2168C235,0x00000000
NPIBY2:	long		0xBFFF0000,0xC90FDAA2,0x2168C235,0x00000000

PTINY:	long		0x00010000,0x80000000,0x00000000,0x00000000
NTINY:	long		0x80010000,0x80000000,0x00000000,0x00000000

ATANTBL:
	long		0x3FFB0000,0x83D152C5,0x060B7A51,0x00000000
	long		0x3FFB0000,0x8BC85445,0x65498B8B,0x00000000
	long		0x3FFB0000,0x93BE4060,0x17626B0D,0x00000000
	long		0x3FFB0000,0x9BB3078D,0x35AEC202,0x00000000
	long		0x3FFB0000,0xA3A69A52,0x5DDCE7DE,0x00000000
	long		0x3FFB0000,0xAB98E943,0x62765619,0x00000000
	long		0x3FFB0000,0xB389E502,0xF9C59862,0x00000000
	long		0x3FFB0000,0xBB797E43,0x6B09E6FB,0x00000000
	long		0x3FFB0000,0xC367A5C7,0x39E5F446,0x00000000
	long		0x3FFB0000,0xCB544C61,0xCFF7D5C6,0x00000000
	long		0x3FFB0000,0xD33F62F8,0x2488533E,0x00000000
	long		0x3FFB0000,0xDB28DA81,0x62404C77,0x00000000
	long		0x3FFB0000,0xE310A407,0x8AD34F18,0x00000000
	long		0x3FFB0000,0xEAF6B0A8,0x188EE1EB,0x00000000
	long		0x3FFB0000,0xF2DAF194,0x9DBE79D5,0x00000000
	long		0x3FFB0000,0xFABD5813,0x61D47E3E,0x00000000
	long		0x3FFC0000,0x8346AC21,0x0959ECC4,0x00000000
	long		0x3FFC0000,0x8B232A08,0x304282D8,0x00000000
	long		0x3FFC0000,0x92FB70B8,0xD29AE2F9,0x00000000
	long		0x3FFC0000,0x9ACF476F,0x5CCD1CB4,0x00000000
	long		0x3FFC0000,0xA29E7630,0x4954F23F,0x00000000
	long		0x3FFC0000,0xAA68C5D0,0x8AB85230,0x00000000
	long		0x3FFC0000,0xB22DFFFD,0x9D539F83,0x00000000
	long		0x3FFC0000,0xB9EDEF45,0x3E900EA5,0x00000000
	long		0x3FFC0000,0xC1A85F1C,0xC75E3EA5,0x00000000
	long		0x3FFC0000,0xC95D1BE8,0x28138DE6,0x00000000
	long		0x3FFC0000,0xD10BF300,0x840D2DE4,0x00000000
	long		0x3FFC0000,0xD8B4B2BA,0x6BC05E7A,0x00000000
	long		0x3FFC0000,0xE0572A6B,0xB42335F6,0x00000000
	long		0x3FFC0000,0xE7F32A70,0xEA9CAA8F,0x00000000
	long		0x3FFC0000,0xEF888432,0x64ECEFAA,0x00000000
	long		0x3FFC0000,0xF7170A28,0xECC06666,0x00000000
	long		0x3FFD0000,0x812FD288,0x332DAD32,0x00000000
	long		0x3FFD0000,0x88A8D1B1,0x218E4D64,0x00000000
	long		0x3FFD0000,0x9012AB3F,0x23E4AEE8,0x00000000
	long		0x3FFD0000,0x976CC3D4,0x11E7F1B9,0x00000000
	long		0x3FFD0000,0x9EB68949,0x3889A227,0x00000000
	long		0x3FFD0000,0xA5EF72C3,0x4487361B,0x00000000
	long		0x3FFD0000,0xAD1700BA,0xF07A7227,0x00000000
	long		0x3FFD0000,0xB42CBCFA,0xFD37EFB7,0x00000000
	long		0x3FFD0000,0xBB303A94,0x0BA80F89,0x00000000
	long		0x3FFD0000,0xC22115C6,0xFCAEBBAF,0x00000000
	long		0x3FFD0000,0xC8FEF3E6,0x86331221,0x00000000
	long		0x3FFD0000,0xCFC98330,0xB4000C70,0x00000000
	long		0x3FFD0000,0xD6807AA1,0x102C5BF9,0x00000000
	long		0x3FFD0000,0xDD2399BC,0x31252AA3,0x00000000
	long		0x3FFD0000,0xE3B2A855,0x6B8FC517,0x00000000
	long		0x3FFD0000,0xEA2D764F,0x64315989,0x00000000
	long		0x3FFD0000,0xF3BF5BF8,0xBAD1A21D,0x00000000
	long		0x3FFE0000,0x801CE39E,0x0D205C9A,0x00000000
	long		0x3FFE0000,0x8630A2DA,0xDA1ED066,0x00000000
	long		0x3FFE0000,0x8C1AD445,0xF3E09B8C,0x00000000
	long		0x3FFE0000,0x91DB8F16,0x64F350E2,0x00000000
	long		0x3FFE0000,0x97731420,0x365E538C,0x00000000
	long		0x3FFE0000,0x9CE1C8E6,0xA0B8CDBA,0x00000000
	long		0x3FFE0000,0xA22832DB,0xCADAAE09,0x00000000
	long		0x3FFE0000,0xA746F2DD,0xB7602294,0x00000000
	long		0x3FFE0000,0xAC3EC0FB,0x997DD6A2,0x00000000
	long		0x3FFE0000,0xB110688A,0xEBDC6F6A,0x00000000
	long		0x3FFE0000,0xB5BCC490,0x59ECC4B0,0x00000000
	long		0x3FFE0000,0xBA44BC7D,0xD470782F,0x00000000
	long		0x3FFE0000,0xBEA94144,0xFD049AAC,0x00000000
	long		0x3FFE0000,0xC2EB4ABB,0x661628B6,0x00000000
	long		0x3FFE0000,0xC70BD54C,0xE602EE14,0x00000000
	long		0x3FFE0000,0xCD000549,0xADEC7159,0x00000000
	long		0x3FFE0000,0xD48457D2,0xD8EA4EA3,0x00000000
	long		0x3FFE0000,0xDB948DA7,0x12DECE3B,0x00000000
	long		0x3FFE0000,0xE23855F9,0x69E8096A,0x00000000
	long		0x3FFE0000,0xE8771129,0xC4353259,0x00000000
	long		0x3FFE0000,0xEE57C16E,0x0D379C0D,0x00000000
	long		0x3FFE0000,0xF3E10211,0xA87C3779,0x00000000
	long		0x3FFE0000,0xF919039D,0x758B8D41,0x00000000
	long		0x3FFE0000,0xFE058B8F,0x64935FB3,0x00000000
	long		0x3FFF0000,0x8155FB49,0x7B685D04,0x00000000
	long		0x3FFF0000,0x83889E35,0x49D108E1,0x00000000
	long		0x3FFF0000,0x859CFA76,0x511D724B,0x00000000
	long		0x3FFF0000,0x87952ECF,0xFF8131E7,0x00000000
	long		0x3FFF0000,0x89732FD1,0x9557641B,0x00000000
	long		0x3FFF0000,0x8B38CAD1,0x01932A35,0x00000000
	long		0x3FFF0000,0x8CE7A8D8,0x301EE6B5,0x00000000
	long		0x3FFF0000,0x8F46A39E,0x2EAE5281,0x00000000
	long		0x3FFF0000,0x922DA7D7,0x91888487,0x00000000
	long		0x3FFF0000,0x94D19FCB,0xDEDF5241,0x00000000
	long		0x3FFF0000,0x973AB944,0x19D2A08B,0x00000000
	long		0x3FFF0000,0x996FF00E,0x08E10B96,0x00000000
	long		0x3FFF0000,0x9B773F95,0x12321DA7,0x00000000
	long		0x3FFF0000,0x9D55CC32,0x0F935624,0x00000000
	long		0x3FFF0000,0x9F100575,0x006CC571,0x00000000
	long		0x3FFF0000,0xA0A9C290,0xD97CC06C,0x00000000
	long		0x3FFF0000,0xA22659EB,0xEBC0630A,0x00000000
	long		0x3FFF0000,0xA388B4AF,0xF6EF0EC9,0x00000000
	long		0x3FFF0000,0xA4D35F10,0x61D292C4,0x00000000
	long		0x3FFF0000,0xA60895DC,0xFBE3187E,0x00000000
	long		0x3FFF0000,0xA72A51DC,0x7367BEAC,0x00000000
	long		0x3FFF0000,0xA83A5153,0x0956168F,0x00000000
	long		0x3FFF0000,0xA93A2007,0x7539546E,0x00000000
	long		0x3FFF0000,0xAA9E7245,0x023B2605,0x00000000
	long		0x3FFF0000,0xAC4C84BA,0x6FE4D58F,0x00000000
	long		0x3FFF0000,0xADCE4A4A,0x606B9712,0x00000000
	long		0x3FFF0000,0xAF2A2DCD,0x8D263C9C,0x00000000
	long		0x3FFF0000,0xB0656F81,0xF22265C7,0x00000000
	long		0x3FFF0000,0xB1846515,0x0F71496A,0x00000000
	long		0x3FFF0000,0xB28AAA15,0x6F9ADA35,0x00000000
	long		0x3FFF0000,0xB37B44FF,0x3766B895,0x00000000
	long		0x3FFF0000,0xB458C3DC,0xE9630433,0x00000000
	long		0x3FFF0000,0xB525529D,0x562246BD,0x00000000
	long		0x3FFF0000,0xB5E2CCA9,0x5F9D88CC,0x00000000
	long		0x3FFF0000,0xB692CADA,0x7ACA1ADA,0x00000000
	long		0x3FFF0000,0xB736AEA7,0xA6925838,0x00000000
	long		0x3FFF0000,0xB7CFAB28,0x7E9F7B36,0x00000000
	long		0x3FFF0000,0xB85ECC66,0xCB219835,0x00000000
	long		0x3FFF0000,0xB8E4FD5A,0x20A593DA,0x00000000
	long		0x3FFF0000,0xB99F41F6,0x4AFF9BB5,0x00000000
	long		0x3FFF0000,0xBA7F1E17,0x842BBE7B,0x00000000
	long		0x3FFF0000,0xBB471285,0x7637E17D,0x00000000
	long		0x3FFF0000,0xBBFABE8A,0x4788DF6F,0x00000000
	long		0x3FFF0000,0xBC9D0FAD,0x2B689D79,0x00000000
	long		0x3FFF0000,0xBD306A39,0x471ECD86,0x00000000
	long		0x3FFF0000,0xBDB6C731,0x856AF18A,0x00000000
	long		0x3FFF0000,0xBE31CAC5,0x02E80D70,0x00000000
	long		0x3FFF0000,0xBEA2D55C,0xE33194E2,0x00000000
	long		0x3FFF0000,0xBF0B10B7,0xC03128F0,0x00000000
	long		0x3FFF0000,0xBF6B7A18,0xDACB778D,0x00000000
	long		0x3FFF0000,0xBFC4EA46,0x63FA18F6,0x00000000
	long		0x3FFF0000,0xC0181BDE,0x8B89A454,0x00000000
	long		0x3FFF0000,0xC065B066,0xCFBF6439,0x00000000
	long		0x3FFF0000,0xC0AE345F,0x56340AE6,0x00000000
	long		0x3FFF0000,0xC0F22291,0x9CB9E6A7,0x00000000

	set		X,FP_SCR0
	set		XDCARE,X+2
	set		XFRAC,X+4
	set		XFRACLO,X+8

	set		ATANF,FP_SCR1
	set		ATANFHI,ATANF+4
	set		ATANFLO,ATANF+8

	global		satan
#--ENTRY POINT FOR ATAN(X), HERE X IS FINITE, NON-ZERO, AND NOT NAN'S
satan:
	fmov.x		(%a0),%fp0		# LOAD INPUT

	mov.l		(%a0),%d1
	mov.w		4(%a0),%d1
	fmov.x		%fp0,X(%a6)
	and.l		&0x7FFFFFFF,%d1

	cmp.l		%d1,&0x3FFB8000		# |X| >= 1/16?
	bge.b		ATANOK1
	bra.w		ATANSM

ATANOK1:
	cmp.l		%d1,&0x4002FFFF		# |X| < 16 ?
	ble.b		ATANMAIN
	bra.w		ATANBIG

#--THE MOST LIKELY CASE, |X| IN [1/16, 16). WE USE TABLE TECHNIQUE
#--THE IDEA IS ATAN(X) = ATAN(F) + ATAN( [X-F] / [1+XF] ).
#--SO IF F IS CHOSEN TO BE CLOSE TO X AND ATAN(F) IS STORED IN
#--A TABLE, ALL WE NEED IS TO APPROXIMATE ATAN(U) WHERE
#--U = (X-F)/(1+XF) IS SMALL (REMEMBER F IS CLOSE TO X). IT IS
#--TRUE THAT A DIVIDE IS NOW NEEDED, BUT THE APPROXIMATION FOR
#--ATAN(U) IS A VERY SHORT POLYNOMIAL AND THE INDEXING TO
#--FETCH F AND SAVING OF REGISTERS CAN BE ALL HIDED UNDER THE
#--DIVIDE. IN THE END THIS METHOD IS MUCH FASTER THAN A TRADITIONAL
#--ONE. NOTE ALSO THAT THE TRADITIONAL SCHEME THAT APPROXIMATE
#--ATAN(X) DIRECTLY WILL NEED TO USE A RATIONAL APPROXIMATION
#--(DIVISION NEEDED) ANYWAY BECAUSE A POLYNOMIAL APPROXIMATION
#--WILL INVOLVE A VERY LONG POLYNOMIAL.

#--NOW WE SEE X AS +-2^K * 1.BBBBBBB....B <- 1. + 63 BITS
#--WE CHOSE F TO BE +-2^K * 1.BBBB1
#--THAT IS IT MATCHES THE EXPONENT AND FIRST 5 BITS OF X, THE
#--SIXTH BITS IS SET TO BE 1. SINCE K = -4, -3, ..., 3, THERE
#--ARE ONLY 8 TIMES 16 = 2^7 = 128 |F|'S. SINCE ATAN(-|F|) IS
#-- -ATAN(|F|), WE NEED TO STORE ONLY ATAN(|F|).

ATANMAIN:

	and.l		&0xF8000000,XFRAC(%a6)	# FIRST 5 BITS
	or.l		&0x04000000,XFRAC(%a6)	# SET 6-TH BIT TO 1
	mov.l		&0x00000000,XFRACLO(%a6) # LOCATION OF X IS NOW F

	fmov.x		%fp0,%fp1		# FP1 IS X
	fmul.x		X(%a6),%fp1		# FP1 IS X*F, NOTE THAT X*F > 0
	fsub.x		X(%a6),%fp0		# FP0 IS X-F
	fadd.s		&0x3F800000,%fp1	# FP1 IS 1 + X*F
	fdiv.x		%fp1,%fp0		# FP0 IS U = (X-F)/(1+X*F)

#--WHILE THE DIVISION IS TAKING ITS TIME, WE FETCH ATAN(|F|)
#--CREATE ATAN(F) AND STORE IT IN ATANF, AND
#--SAVE REGISTERS FP2.

	mov.l		%d2,-(%sp)		# SAVE d2 TEMPORARILY
	mov.l		%d1,%d2			# THE EXP AND 16 BITS OF X
	and.l		&0x00007800,%d1		# 4 VARYING BITS OF F'S FRACTION
	and.l		&0x7FFF0000,%d2		# EXPONENT OF F
	sub.l		&0x3FFB0000,%d2		# K+4
	asr.l		&1,%d2
	add.l		%d2,%d1			# THE 7 BITS IDENTIFYING F
	asr.l		&7,%d1			# INDEX INTO TBL OF ATAN(|F|)
	lea		ATANTBL(%pc),%a1
	add.l		%d1,%a1			# ADDRESS OF ATAN(|F|)
	mov.l		(%a1)+,ATANF(%a6)
	mov.l		(%a1)+,ATANFHI(%a6)
	mov.l		(%a1)+,ATANFLO(%a6)	# ATANF IS NOW ATAN(|F|)
	mov.l		X(%a6),%d1		# LOAD SIGN AND EXPO. AGAIN
	and.l		&0x80000000,%d1		# SIGN(F)
	or.l		%d1,ATANF(%a6)		# ATANF IS NOW SIGN(F)*ATAN(|F|)
	mov.l		(%sp)+,%d2		# RESTORE d2

#--THAT'S ALL I HAVE TO DO FOR NOW,
#--BUT ALAS, THE DIVIDE IS STILL CRANKING!

#--U IN FP0, WE ARE NOW READY TO COMPUTE ATAN(U) AS
#--U + A1*U*V*(A2 + V*(A3 + V)), V = U*U
#--THE POLYNOMIAL MAY LOOK STRANGE, BUT IS NEVERTHELESS CORRECT.
#--THE NATURAL FORM IS U + U*V*(A1 + V*(A2 + V*A3))
#--WHAT WE HAVE HERE IS MERELY	A1 = A3, A2 = A1/A3, A3 = A2/A3.
#--THE REASON FOR THIS REARRANGEMENT IS TO MAKE THE INDEPENDENT
#--PARTS A1*U*V AND (A2 + ... STUFF) MORE LOAD-BALANCED

	fmovm.x		&0x04,-(%sp)		# save fp2

	fmov.x		%fp0,%fp1
	fmul.x		%fp1,%fp1
	fmov.d		ATANA3(%pc),%fp2
	fadd.x		%fp1,%fp2		# A3+V
	fmul.x		%fp1,%fp2		# V*(A3+V)
	fmul.x		%fp0,%fp1		# U*V
	fadd.d		ATANA2(%pc),%fp2	# A2+V*(A3+V)
	fmul.d		ATANA1(%pc),%fp1	# A1*U*V
	fmul.x		%fp2,%fp1		# A1*U*V*(A2+V*(A3+V))
	fadd.x		%fp1,%fp0		# ATAN(U), FP1 RELEASED

	fmovm.x 	(%sp)+,&0x20		# restore fp2

	fmov.l		%d0,%fpcr		# restore users rnd mode,prec
	fadd.x		ATANF(%a6),%fp0		# ATAN(X)
	bra		t_inx2

ATANBORS:
#--|X| IS IN d0 IN COMPACT FORM. FP1, d0 SAVED.
#--FP0 IS X AND |X| <= 1/16 OR |X| >= 16.
	cmp.l		%d1,&0x3FFF8000
	bgt.w		ATANBIG			# I.E. |X| >= 16

ATANSM:
#--|X| <= 1/16
#--IF |X| < 2^(-40), RETURN X AS ANSWER. OTHERWISE, APPROXIMATE
#--ATAN(X) BY X + X*Y*(B1+Y*(B2+Y*(B3+Y*(B4+Y*(B5+Y*B6)))))
#--WHICH IS X + X*Y*( [B1+Z*(B3+Z*B5)] + [Y*(B2+Z*(B4+Z*B6)] )
#--WHERE Y = X*X, AND Z = Y*Y.

	cmp.l		%d1,&0x3FD78000
	blt.w		ATANTINY

#--COMPUTE POLYNOMIAL
	fmovm.x		&0x0c,-(%sp)		# save fp2/fp3

	fmul.x		%fp0,%fp0		# FPO IS Y = X*X

	fmov.x		%fp0,%fp1
	fmul.x		%fp1,%fp1		# FP1 IS Z = Y*Y

	fmov.d		ATANB6(%pc),%fp2
	fmov.d		ATANB5(%pc),%fp3

	fmul.x		%fp1,%fp2		# Z*B6
	fmul.x		%fp1,%fp3		# Z*B5

	fadd.d		ATANB4(%pc),%fp2	# B4+Z*B6
	fadd.d		ATANB3(%pc),%fp3	# B3+Z*B5

	fmul.x		%fp1,%fp2		# Z*(B4+Z*B6)
	fmul.x		%fp3,%fp1		# Z*(B3+Z*B5)

	fadd.d		ATANB2(%pc),%fp2	# B2+Z*(B4+Z*B6)
	fadd.d		ATANB1(%pc),%fp1	# B1+Z*(B3+Z*B5)

	fmul.x		%fp0,%fp2		# Y*(B2+Z*(B4+Z*B6))
	fmul.x		X(%a6),%fp0		# X*Y

	fadd.x		%fp2,%fp1		# [B1+Z*(B3+Z*B5)]+[Y*(B2+Z*(B4+Z*B6))]

	fmul.x		%fp1,%fp0		# X*Y*([B1+Z*(B3+Z*B5)]+[Y*(B2+Z*(B4+Z*B6))])

	fmovm.x		(%sp)+,&0x30		# restore fp2/fp3

	fmov.l		%d0,%fpcr		# restore users rnd mode,prec
	fadd.x		X(%a6),%fp0
	bra		t_inx2

ATANTINY:
#--|X| < 2^(-40), ATAN(X) = X

	fmov.l		%d0,%fpcr		# restore users rnd mode,prec
	mov.b		&FMOV_OP,%d1		# last inst is MOVE
	fmov.x		X(%a6),%fp0		# last inst - possible exception set

	bra		t_catch

ATANBIG:
#--IF |X| > 2^(100), RETURN	SIGN(X)*(PI/2 - TINY). OTHERWISE,
#--RETURN SIGN(X)*PI/2 + ATAN(-1/X).
	cmp.l		%d1,&0x40638000
	bgt.w		ATANHUGE

#--APPROXIMATE ATAN(-1/X) BY
#--X'+X'*Y*(C1+Y*(C2+Y*(C3+Y*(C4+Y*C5)))), X' = -1/X, Y = X'*X'
#--THIS CAN BE RE-WRITTEN AS
#--X'+X'*Y*( [C1+Z*(C3+Z*C5)] + [Y*(C2+Z*C4)] ), Z = Y*Y.

	fmovm.x		&0x0c,-(%sp)		# save fp2/fp3

	fmov.s		&0xBF800000,%fp1	# LOAD -1
	fdiv.x		%fp0,%fp1		# FP1 IS -1/X

#--DIVIDE IS STILL CRANKING

	fmov.x		%fp1,%fp0		# FP0 IS X'
	fmul.x		%fp0,%fp0		# FP0 IS Y = X'*X'
	fmov.x		%fp1,X(%a6)		# X IS REALLY X'

	fmov.x		%fp0,%fp1
	fmul.x		%fp1,%fp1		# FP1 IS Z = Y*Y

	fmov.d		ATANC5(%pc),%fp3
	fmov.d		ATANC4(%pc),%fp2

	fmul.x		%fp1,%fp3		# Z*C5
	fmul.x		%fp1,%fp2		# Z*B4

	fadd.d		ATANC3(%pc),%fp3	# C3+Z*C5
	fadd.d		ATANC2(%pc),%fp2	# C2+Z*C4

	fmul.x		%fp3,%fp1		# Z*(C3+Z*C5), FP3 RELEASED
	fmul.x		%fp0,%fp2		# Y*(C2+Z*C4)

	fadd.d		ATANC1(%pc),%fp1	# C1+Z*(C3+Z*C5)
	fmul.x		X(%a6),%fp0		# X'*Y

	fadd.x		%fp2,%fp1		# [Y*(C2+Z*C4)]+[C1+Z*(C3+Z*C5)]

	fmul.x		%fp1,%fp0		# X'*Y*([B1+Z*(B3+Z*B5)]
#					...	+[Y*(B2+Z*(B4+Z*B6))])
	fadd.x		X(%a6),%fp0

	fmovm.x		(%sp)+,&0x30		# restore fp2/fp3

	fmov.l		%d0,%fpcr		# restore users rnd mode,prec
	tst.b		(%a0)
	bpl.b		pos_big

neg_big:
	fadd.x		NPIBY2(%pc),%fp0
	bra		t_minx2

pos_big:
	fadd.x		PPIBY2(%pc),%fp0
	bra		t_pinx2

ATANHUGE:
#--RETURN SIGN(X)*(PIBY2 - TINY) = SIGN(X)*PIBY2 - SIGN(X)*TINY
	tst.b		(%a0)
	bpl.b		pos_huge

neg_huge:
	fmov.x		NPIBY2(%pc),%fp0
	fmov.l		%d0,%fpcr
	fadd.x		PTINY(%pc),%fp0
	bra		t_minx2

pos_huge:
	fmov.x		PPIBY2(%pc),%fp0
	fmov.l		%d0,%fpcr
	fadd.x		NTINY(%pc),%fp0
	bra		t_pinx2

	global		satand
#--ENTRY POINT FOR ATAN(X) FOR DENORMALIZED ARGUMENT
satand:
	bra		t_extdnrm

#########################################################################
# sasin():  computes the inverse sine of a normalized input		#
# sasind(): computes the inverse sine of a denormalized input		#
#									#
# INPUT ***************************************************************	#
#	a0 = pointer to extended precision input			#
#	d0 = round precision,mode					#
#									#
# OUTPUT **************************************************************	# 
#	fp0 = arcsin(X)							#
#									#
# ACCURACY and MONOTONICITY *******************************************	#
#	The returned result is within 3 ulps in	64 significant bit,	#
#	i.e. within 0.5001 ulp to 53 bits if the result is subsequently	#
#	rounded to double precision. The result is provably monotonic	#
#	in double precision.						#
#									#
# ALGORITHM ***********************************************************	#
#									#
#	ASIN								#
#	1. If |X| >= 1, go to 3.					#
#									#
#	2. (|X| < 1) Calculate asin(X) by				#
#		z := sqrt( [1-X][1+X] )					#
#		asin(X) = atan( x / z ).				#
#		Exit.							#
#									#
#	3. If |X| > 1, go to 5.						#
#									#
#	4. (|X| = 1) sgn := sign(X), return asin(X) := sgn * Pi/2. Exit.#
#									#
#	5. (|X| > 1) Generate an invalid operation by 0 * infinity.	#
#		Exit.							#
#									#
#########################################################################

	global		sasin
sasin:
	fmov.x		(%a0),%fp0		# LOAD INPUT

	mov.l		(%a0),%d1
	mov.w		4(%a0),%d1
	and.l		&0x7FFFFFFF,%d1
	cmp.l		%d1,&0x3FFF8000
	bge.b		ASINBIG

# This catch is added here for the '060 QSP. Originally, the call to
# satan() would handle this case by causing the exception which would
# not be caught until gen_except(). Now, with the exceptions being 
# detected inside of satan(), the exception would have been handled there
# instead of inside sasin() as expected.
	cmp.l		%d1,&0x3FD78000
	blt.w		ASINTINY

#--THIS IS THE USUAL CASE, |X| < 1
#--ASIN(X) = ATAN( X / SQRT( (1-X)(1+X) ) )

ASINMAIN:
	fmov.s		&0x3F800000,%fp1
	fsub.x		%fp0,%fp1		# 1-X
	fmovm.x		&0x4,-(%sp)		#  {fp2}
	fmov.s		&0x3F800000,%fp2
	fadd.x		%fp0,%fp2		# 1+X
	fmul.x		%fp2,%fp1		# (1+X)(1-X)
	fmovm.x		(%sp)+,&0x20		#  {fp2}
	fsqrt.x		%fp1			# SQRT([1-X][1+X])
	fdiv.x		%fp1,%fp0		# X/SQRT([1-X][1+X])
	fmovm.x		&0x01,-(%sp)		# save X/SQRT(...)
	lea		(%sp),%a0		# pass ptr to X/SQRT(...)
	bsr		satan
	add.l		&0xc,%sp		# clear X/SQRT(...) from stack
	bra		t_inx2

ASINBIG:
	fabs.x		%fp0			# |X|
	fcmp.s		%fp0,&0x3F800000
	fbgt		t_operr			# cause an operr exception

#--|X| = 1, ASIN(X) = +- PI/2.
ASINONE:
	fmov.x		PIBY2(%pc),%fp0
	mov.l		(%a0),%d1
	and.l		&0x80000000,%d1		# SIGN BIT OF X
	or.l		&0x3F800000,%d1		# +-1 IN SGL FORMAT
	mov.l		%d1,-(%sp)		# push SIGN(X) IN SGL-FMT
	fmov.l		%d0,%fpcr
	fmul.s		(%sp)+,%fp0
	bra		t_inx2

#--|X| < 2^(-40), ATAN(X) = X
ASINTINY:
	fmov.l		%d0,%fpcr		# restore users rnd mode,prec
	mov.b		&FMOV_OP,%d1		# last inst is MOVE
	fmov.x		(%a0),%fp0		# last inst - possible exception
	bra		t_catch

	global		sasind
#--ASIN(X) = X FOR DENORMALIZED X
sasind:
	bra		t_extdnrm

#########################################################################
# sacos():  computes the inverse cosine of a normalized input		#
# sacosd(): computes the inverse cosine of a denormalized input		#
#									#
# INPUT ***************************************************************	#
#	a0 = pointer to extended precision input			#
#	d0 = round precision,mode					#
#									#
# OUTPUT ************************************************************** #
#	fp0 = arccos(X)							#
#									#
# ACCURACY and MONOTONICITY *******************************************	#
#	The returned result is within 3 ulps in	64 significant bit,	#
#	i.e. within 0.5001 ulp to 53 bits if the result is subsequently	#
#	rounded to double precision. The result is provably monotonic	#
#	in double precision.						#
#									#
# ALGORITHM *********************************************************** #
#									#
#	ACOS								#
#	1. If |X| >= 1, go to 3.					#
#									#
#	2. (|X| < 1) Calculate acos(X) by				#
#		z := (1-X) / (1+X)					#
#		acos(X) = 2 * atan( sqrt(z) ).				#
#		Exit.							#
#									#
#	3. If |X| > 1, go to 5.						#
#									#
#	4. (|X| = 1) If X > 0, return 0. Otherwise, return Pi. Exit.	#
#									#
#	5. (|X| > 1) Generate an invalid operation by 0 * infinity.	#
#		Exit.							#
#									#
#########################################################################

	global		sacos
sacos:
	fmov.x		(%a0),%fp0		# LOAD INPUT

	mov.l		(%a0),%d1		# pack exp w/ upper 16 fraction
	mov.w		4(%a0),%d1
	and.l		&0x7FFFFFFF,%d1
	cmp.l		%d1,&0x3FFF8000
	bge.b		ACOSBIG

#--THIS IS THE USUAL CASE, |X| < 1
#--ACOS(X) = 2 * ATAN(	SQRT( (1-X)/(1+X) ) )

ACOSMAIN:
	fmov.s		&0x3F800000,%fp1
	fadd.x		%fp0,%fp1		# 1+X
	fneg.x		%fp0			# -X
	fadd.s		&0x3F800000,%fp0	# 1-X
	fdiv.x		%fp1,%fp0		# (1-X)/(1+X)
	fsqrt.x		%fp0			# SQRT((1-X)/(1+X))
	mov.l		%d0,-(%sp)		# save original users fpcr
	clr.l		%d0
	fmovm.x		&0x01,-(%sp)		# save SQRT(...) to stack
	lea		(%sp),%a0		# pass ptr to sqrt
	bsr		satan			# ATAN(SQRT([1-X]/[1+X]))
	add.l		&0xc,%sp		# clear SQRT(...) from stack

	fmov.l		(%sp)+,%fpcr		# restore users round prec,mode
	fadd.x		%fp0,%fp0		# 2 * ATAN( STUFF )
	bra		t_pinx2

ACOSBIG:
	fabs.x		%fp0
	fcmp.s		%fp0,&0x3F800000
	fbgt		t_operr			# cause an operr exception

#--|X| = 1, ACOS(X) = 0 OR PI
	tst.b		(%a0)			# is X positive or negative?
	bpl.b		ACOSP1

#--X = -1
#Returns PI and inexact exception
ACOSM1:
	fmov.x		PI(%pc),%fp0		# load PI
	fmov.l		%d0,%fpcr		# load round mode,prec
	fadd.s		&0x00800000,%fp0	# add a small value
	bra		t_pinx2

ACOSP1:
	bra		ld_pzero		# answer is positive zero

	global		sacosd
#--ACOS(X) = PI/2 FOR DENORMALIZED X
sacosd:
	fmov.l		%d0,%fpcr		# load user's rnd mode/prec
	fmov.x		PIBY2(%pc),%fp0
	bra		t_pinx2

#########################################################################
# setox():    computes the exponential for a normalized input		#
# setoxd():   computes the exponential for a denormalized input		# 
# setoxm1():  computes the exponential minus 1 for a normalized input	#
# setoxm1d(): computes the exponential minus 1 for a denormalized input	#
#									#
# INPUT	*************************************************************** #
#	a0 = pointer to extended precision input			#
#	d0 = round precision,mode					#
#									#
# OUTPUT ************************************************************** #
#	fp0 = exp(X) or exp(X)-1					#
#									#
# ACCURACY and MONOTONICITY ******************************************* #
#	The returned result is within 0.85 ulps in 64 significant bit, 	#
#	i.e. within 0.5001 ulp to 53 bits if the result is subsequently #
#	rounded to double precision. The result is provably monotonic 	#
#	in double precision.						#
#									#
# ALGORITHM and IMPLEMENTATION **************************************** #
#									#
#	setoxd								#
#	------								#
#	Step 1.	Set ans := 1.0						#
#									#
#	Step 2.	Return	ans := ans + sign(X)*2^(-126). Exit.		#
#	Notes:	This will always generate one exception -- inexact.	#
#									#
#									#
#	setox								#
#	-----								#
#									#
#	Step 1.	Filter out extreme cases of input argument.		#
#		1.1	If |X| >= 2^(-65), go to Step 1.3.		#
#		1.2	Go to Step 7.					#
#		1.3	If |X| < 16380 log(2), go to Step 2.		#
#		1.4	Go to Step 8.					#
#	Notes:	The usual case should take the branches 1.1 -> 1.3 -> 2.#
#		To avoid the use of floating-point comparisons, a	#
#		compact representation of |X| is used. This format is a	#
#		32-bit integer, the upper (more significant) 16 bits 	#
#		are the sign and biased exponent field of |X|; the 	#
#		lower 16 bits are the 16 most significant fraction	#
#		(including the explicit bit) bits of |X|. Consequently,	#
#		the comparisons in Steps 1.1 and 1.3 can be performed	#
#		by integer comparison. Note also that the constant	#
#		16380 log(2) used in Step 1.3 is also in the compact	#
#		form. Thus taking the branch to Step 2 guarantees 	#
#		|X| < 16380 log(2). There is no harm to have a small	#
#		number of cases where |X| is less than,	but close to,	#
#		16380 log(2) and the branch to Step 9 is taken.		#
#									#
#	Step 2.	Calculate N = round-to-nearest-int( X * 64/log2 ).	#
#		2.1	Set AdjFlag := 0 (indicates the branch 1.3 -> 2 #
#			was taken)					#
#		2.2	N := round-to-nearest-integer( X * 64/log2 ).	#
#		2.3	Calculate	J = N mod 64; so J = 0,1,2,..., #
#			or 63.						#
#		2.4	Calculate	M = (N - J)/64; so N = 64M + J.	#
#		2.5	Calculate the address of the stored value of 	#
#			2^(J/64).					#
#		2.6	Create the value Scale = 2^M.			#
#	Notes:	The calculation in 2.2 is really performed by		#
#			Z := X * constant				#
#			N := round-to-nearest-integer(Z)		#
#		where							#
#			constant := single-precision( 64/log 2 ).	#
#									#
#		Using a single-precision constant avoids memory 	#
#		access. Another effect of using a single-precision	#
#		"constant" is that the calculated value Z is 		#
#									#
#			Z = X*(64/log2)*(1+eps), |eps| <= 2^(-24).	#
#									#
#		This error has to be considered later in Steps 3 and 4.	#
#									#
#	Step 3.	Calculate X - N*log2/64.				#
#		3.1	R := X + N*L1, 					#
#				where L1 := single-precision(-log2/64).	#
#		3.2	R := R + N*L2, 					#
#				L2 := extended-precision(-log2/64 - L1).#
#	Notes:	a) The way L1 and L2 are chosen ensures L1+L2 		#
#		approximate the value -log2/64 to 88 bits of accuracy.	#
#		b) N*L1 is exact because N is no longer than 22 bits	#
#		and L1 is no longer than 24 bits.			#
#		c) The calculation X+N*L1 is also exact due to 		#
#		cancellation. Thus, R is practically X+N(L1+L2) to full	#
#		64 bits. 						#
#		d) It is important to estimate how large can |R| be	#
#		after Step 3.2.						#
#									#
#		N = rnd-to-int( X*64/log2 (1+eps) ), |eps|<=2^(-24)	#
#		X*64/log2 (1+eps)	=	N + f,	|f| <= 0.5	#
#		X*64/log2 - N	=	f - eps*X 64/log2		#
#		X - N*log2/64	=	f*log2/64 - eps*X		#
#									#
#									#
#		Now |X| <= 16446 log2, thus				#
#									#
#			|X - N*log2/64| <= (0.5 + 16446/2^(18))*log2/64	#
#					<= 0.57 log2/64.		#
#		 This bound will be used in Step 4.			#
#									#
#	Step 4.	Approximate exp(R)-1 by a polynomial			#
#		p = R + R*R*(A1 + R*(A2 + R*(A3 + R*(A4 + R*A5))))	#
#	Notes:	a) In order to reduce memory access, the coefficients 	#
#		are made as "short" as possible: A1 (which is 1/2), A4	#
#		and A5 are single precision; A2 and A3 are double	#
#		precision. 						#
#		b) Even with the restrictions above, 			#
#		   |p - (exp(R)-1)| < 2^(-68.8) for all |R| <= 0.0062.	#
#		Note that 0.0062 is slightly bigger than 0.57 log2/64.	#
#		c) To fully utilize the pipeline, p is separated into	#
#		two independent pieces of roughly equal complexities	#
#			p = [ R + R*S*(A2 + S*A4) ]	+		#
#				[ S*(A1 + S*(A3 + S*A5)) ]		#
#		where S = R*R.						#
#									#
#	Step 5.	Compute 2^(J/64)*exp(R) = 2^(J/64)*(1+p) by		#
#				ans := T + ( T*p + t)			#
#		where T and t are the stored values for 2^(J/64).	#
#	Notes:	2^(J/64) is stored as T and t where T+t approximates	#
#		2^(J/64) to roughly 85 bits; T is in extended precision	#
#		and t is in single precision. Note also that T is 	#
#		rounded to 62 bits so that the last two bits of T are 	#
#		zero. The reason for such a special form is that T-1, 	#
#		T-2, and T-8 will all be exact --- a property that will	#
#		give much more accurate computation of the function 	#
#		EXPM1.							#
#									#
#	Step 6.	Reconstruction of exp(X)				#
#			exp(X) = 2^M * 2^(J/64) * exp(R).		#
#		6.1	If AdjFlag = 0, go to 6.3			#
#		6.2	ans := ans * AdjScale				#
#		6.3	Restore the user FPCR				#
#		6.4	Return ans := ans * Scale. Exit.		#
#	Notes:	If AdjFlag = 0, we have X = Mlog2 + Jlog2/64 + R,	#
#		|M| <= 16380, and Scale = 2^M. Moreover, exp(X) will	#
#		neither overflow nor underflow. If AdjFlag = 1, that	#
#		means that						#
#			X = (M1+M)log2 + Jlog2/64 + R, |M1+M| >= 16380.	#
#		Hence, exp(X) may overflow or underflow or neither.	#
#		When that is the case, AdjScale = 2^(M1) where M1 is	#
#		approximately M. Thus 6.2 will never cause 		#
#		over/underflow. Possible exception in 6.4 is overflow	#
#		or underflow. The inexact exception is not generated in	#
#		6.4. Although one can argue that the inexact flag	#
#		should always be raised, to simulate that exception 	#
#		cost to much than the flag is worth in practical uses.	#
#									#
#	Step 7.	Return 1 + X.						#
#		7.1	ans := X					#
#		7.2	Restore user FPCR.				#
#		7.3	Return ans := 1 + ans. Exit			#
#	Notes:	For non-zero X, the inexact exception will always be	#
#		raised by 7.3. That is the only exception raised by 7.3.#
#		Note also that we use the FMOVEM instruction to move X	#
#		in Step 7.1 to avoid unnecessary trapping. (Although	#
#		the FMOVEM may not seem relevant since X is normalized,	#
#		the precaution will be useful in the library version of	#
#		this code where the separate entry for denormalized 	#
#		inputs will be done away with.)				#
#									#
#	Step 8.	Handle exp(X) where |X| >= 16380log2.			#
#		8.1	If |X| > 16480 log2, go to Step 9.		#
#		(mimic 2.2 - 2.6)					#
#		8.2	N := round-to-integer( X * 64/log2 )		#
#		8.3	Calculate J = N mod 64, J = 0,1,...,63		#
#		8.4	K := (N-J)/64, M1 := truncate(K/2), M = K-M1, 	#
#			AdjFlag := 1.					#
#		8.5	Calculate the address of the stored value 	#
#			2^(J/64).					#
#		8.6	Create the values Scale = 2^M, AdjScale = 2^M1.	#
#		8.7	Go to Step 3.					#
#	Notes:	Refer to notes for 2.2 - 2.6.				#
#									#
#	Step 9.	Handle exp(X), |X| > 16480 log2.			#
#		9.1	If X < 0, go to 9.3				#
#		9.2	ans := Huge, go to 9.4				#
#		9.3	ans := Tiny.					#
#		9.4	Restore user FPCR.				#
#		9.5	Return ans := ans * ans. Exit.			#
#	Notes:	Exp(X) will surely overflow or underflow, depending on	#
#		X's sign. "Huge" and "Tiny" are respectively large/tiny	#
#		extended-precision numbers whose square over/underflow	#
#		with an inexact result. Thus, 9.5 always raises the	#
#		inexact together with either overflow or underflow.	#
#									#
#	setoxm1d							#
#	--------							#
#									#
#	Step 1.	Set ans := 0						#
#									#
#	Step 2.	Return	ans := X + ans. Exit.				#
#	Notes:	This will return X with the appropriate rounding	#
#		 precision prescribed by the user FPCR.			#
#									#
#	setoxm1								#
#	-------								#
#									#
#	Step 1.	Check |X|						#
#		1.1	If |X| >= 1/4, go to Step 1.3.			#
#		1.2	Go to Step 7.					#
#		1.3	If |X| < 70 log(2), go to Step 2.		#
#		1.4	Go to Step 10.					#
#	Notes:	The usual case should take the branches 1.1 -> 1.3 -> 2.#
#		However, it is conceivable |X| can be small very often	#
#		because EXPM1 is intended to evaluate exp(X)-1 		#
#		accurately when |X| is small. For further details on 	#
#		the comparisons, see the notes on Step 1 of setox.	#
#									#
#	Step 2.	Calculate N = round-to-nearest-int( X * 64/log2 ).	#
#		2.1	N := round-to-nearest-integer( X * 64/log2 ).	#
#		2.2	Calculate	J = N mod 64; so J = 0,1,2,..., #
#			or 63.						#
#		2.3	Calculate	M = (N - J)/64; so N = 64M + J.	#
#		2.4	Calculate the address of the stored value of 	#
#			2^(J/64).					#
#		2.5	Create the values Sc = 2^M and 			#
#			OnebySc := -2^(-M).				#
#	Notes:	See the notes on Step 2 of setox.			#
#									#
#	Step 3.	Calculate X - N*log2/64.				#
#		3.1	R := X + N*L1, 					#
#				where L1 := single-precision(-log2/64).	#
#		3.2	R := R + N*L2, 					#
#				L2 := extended-precision(-log2/64 - L1).#
#	Notes:	Applying the analysis of Step 3 of setox in this case	#
#		shows that |R| <= 0.0055 (note that |X| <= 70 log2 in	#
#		this case).						#
#									#
#	Step 4.	Approximate exp(R)-1 by a polynomial			#
#			p = R+R*R*(A1+R*(A2+R*(A3+R*(A4+R*(A5+R*A6)))))	#
#	Notes:	a) In order to reduce memory access, the coefficients 	#
#		are made as "short" as possible: A1 (which is 1/2), A5 	#
#		and A6 are single precision; A2, A3 and A4 are double 	#
#		precision. 						#
#		b) Even with the restriction above,			#
#			|p - (exp(R)-1)| <	|R| * 2^(-72.7)		#
#		for all |R| <= 0.0055.					#
#		c) To fully utilize the pipeline, p is separated into	#
#		two independent pieces of roughly equal complexity	#
#			p = [ R*S*(A2 + S*(A4 + S*A6)) ]	+	#
#				[ R + S*(A1 + S*(A3 + S*A5)) ]		#
#		where S = R*R.						#
#									#
#	Step 5.	Compute 2^(J/64)*p by					#
#				p := T*p				#
#		where T and t are the stored values for 2^(J/64).	#
#	Notes:	2^(J/64) is stored as T and t where T+t approximates	#
#		2^(J/64) to roughly 85 bits; T is in extended precision	#
#		and t is in single precision. Note also that T is 	#
#		rounded to 62 bits so that the last two bits of T are 	#
#		zero. The reason for such a special form is that T-1, 	#
#		T-2, and T-8 will all be exact --- a property that will	#
#		be exploited in Step 6 below. The total relative error	#
#		in p is no bigger than 2^(-67.7) compared to the final	#
#		result.							#
#									#
#	Step 6.	Reconstruction of exp(X)-1				#
#			exp(X)-1 = 2^M * ( 2^(J/64) + p - 2^(-M) ).	#
#		6.1	If M <= 63, go to Step 6.3.			#
#		6.2	ans := T + (p + (t + OnebySc)). Go to 6.6	#
#		6.3	If M >= -3, go to 6.5.				#
#		6.4	ans := (T + (p + t)) + OnebySc. Go to 6.6	#
#		6.5	ans := (T + OnebySc) + (p + t).			#
#		6.6	Restore user FPCR.				#
#		6.7	Return ans := Sc * ans. Exit.			#
#	Notes:	The various arrangements of the expressions give 	#
#		accurate evaluations.					#
#									#
#	Step 7.	exp(X)-1 for |X| < 1/4.					#
#		7.1	If |X| >= 2^(-65), go to Step 9.		#
#		7.2	Go to Step 8.					#
#									#
#	Step 8.	Calculate exp(X)-1, |X| < 2^(-65).			#
#		8.1	If |X| < 2^(-16312), goto 8.3			#
#		8.2	Restore FPCR; return ans := X - 2^(-16382).	#
#			Exit.						#
#		8.3	X := X * 2^(140).				#
#		8.4	Restore FPCR; ans := ans - 2^(-16382).		#
#		 Return ans := ans*2^(140). Exit			#
#	Notes:	The idea is to return "X - tiny" under the user		#
#		precision and rounding modes. To avoid unnecessary	#
#		inefficiency, we stay away from denormalized numbers 	#
#		the best we can. For |X| >= 2^(-16312), the 		#
#		straightforward 8.2 generates the inexact exception as	#
#		the case warrants.					#
#									#
#	Step 9.	Calculate exp(X)-1, |X| < 1/4, by a polynomial		#
#			p = X + X*X*(B1 + X*(B2 + ... + X*B12))		#
#	Notes:	a) In order to reduce memory access, the coefficients	#
#		are made as "short" as possible: B1 (which is 1/2), B9	#
#		to B12 are single precision; B3 to B8 are double 	#
#		precision; and B2 is double extended.			#
#		b) Even with the restriction above,			#
#			|p - (exp(X)-1)| < |X| 2^(-70.6)		#
#		for all |X| <= 0.251.					#
#		Note that 0.251 is slightly bigger than 1/4.		#
#		c) To fully preserve accuracy, the polynomial is 	#
#		computed as						#
#			X + ( S*B1 +	Q ) where S = X*X and		#
#			Q	=	X*S*(B2 + X*(B3 + ... + X*B12))	#
#		d) To fully utilize the pipeline, Q is separated into	#
#		two independent pieces of roughly equal complexity	#
#			Q = [ X*S*(B2 + S*(B4 + ... + S*B12)) ] +	#
#				[ S*S*(B3 + S*(B5 + ... + S*B11)) ]	#
#									#
#	Step 10. Calculate exp(X)-1 for |X| >= 70 log 2.		#
#		10.1 If X >= 70log2 , exp(X) - 1 = exp(X) for all 	#
#		practical purposes. Therefore, go to Step 1 of setox.	#
#		10.2 If X <= -70log2, exp(X) - 1 = -1 for all practical	#
#		purposes. 						#
#		ans := -1 						#
#		Restore user FPCR					#
#		Return ans := ans + 2^(-126). Exit.			#
#	Notes:	10.2 will always create an inexact and return -1 + tiny	#
#		in the user rounding precision and mode.		#
#									#
#########################################################################

L2:	long		0x3FDC0000,0x82E30865,0x4361C4C6,0x00000000

EEXPA3:	long		0x3FA55555,0x55554CC1
EEXPA2:	long		0x3FC55555,0x55554A54

EM1A4:	long		0x3F811111,0x11174385
EM1A3:	long		0x3FA55555,0x55554F5A

EM1A2:	long		0x3FC55555,0x55555555,0x00000000,0x00000000

EM1B8:	long		0x3EC71DE3,0xA5774682
EM1B7:	long		0x3EFA01A0,0x19D7CB68

EM1B6:	long		0x3F2A01A0,0x1A019DF3
EM1B5:	long		0x3F56C16C,0x16C170E2

EM1B4:	long		0x3F811111,0x11111111
EM1B3:	long		0x3FA55555,0x55555555

EM1B2:	long		0x3FFC0000,0xAAAAAAAA,0xAAAAAAAB
	long		0x00000000

TWO140:	long		0x48B00000,0x00000000
TWON140:
	long		0x37300000,0x00000000

EEXPTBL:
	long		0x3FFF0000,0x80000000,0x00000000,0x00000000
	long		0x3FFF0000,0x8164D1F3,0xBC030774,0x9F841A9B
	long		0x3FFF0000,0x82CD8698,0xAC2BA1D8,0x9FC1D5B9
	long		0x3FFF0000,0x843A28C3,0xACDE4048,0xA0728369
	long		0x3FFF0000,0x85AAC367,0xCC487B14,0x1FC5C95C
	long		0x3FFF0000,0x871F6196,0x9E8D1010,0x1EE85C9F
	long		0x3FFF0000,0x88980E80,0x92DA8528,0x9FA20729
	long		0x3FFF0000,0x8A14D575,0x496EFD9C,0xA07BF9AF
	long		0x3FFF0000,0x8B95C1E3,0xEA8BD6E8,0xA0020DCF
	long		0x3FFF0000,0x8D1ADF5B,0x7E5BA9E4,0x205A63DA
	long		0x3FFF0000,0x8EA4398B,0x45CD53C0,0x1EB70051
	long		0x3FFF0000,0x9031DC43,0x1466B1DC,0x1F6EB029
	long		0x3FFF0000,0x91C3D373,0xAB11C338,0xA0781494
	long		0x3FFF0000,0x935A2B2F,0x13E6E92C,0x9EB319B0
	long		0x3FFF0000,0x94F4EFA8,0xFEF70960,0x2017457D
	long		0x3FFF0000,0x96942D37,0x20185A00,0x1F11D537
	long		0x3FFF0000,0x9837F051,0x8DB8A970,0x9FB952DD
	long		0x3FFF0000,0x99E04593,0x20B7FA64,0x1FE43087
	long		0x3FFF0000,0x9B8D39B9,0xD54E5538,0x1FA2A818
	long		0x3FFF0000,0x9D3ED9A7,0x2CFFB750,0x1FDE494D
	long		0x3FFF0000,0x9EF53260,0x91A111AC,0x20504890
	long		0x3FFF0000,0xA0B0510F,0xB9714FC4,0xA073691C
	long		0x3FFF0000,0xA2704303,0x0C496818,0x1F9B7A05
	long		0x3FFF0000,0xA43515AE,0x09E680A0,0xA0797126
	long		0x3FFF0000,0xA5FED6A9,0xB15138EC,0xA071A140
	long		0x3FFF0000,0xA7CD93B4,0xE9653568,0x204F62DA
	long		0x3FFF0000,0xA9A15AB4,0xEA7C0EF8,0x1F283C4A
	long		0x3FFF0000,0xAB7A39B5,0xA93ED338,0x9F9A7FDC
	long		0x3FFF0000,0xAD583EEA,0x42A14AC8,0xA05B3FAC
	long		0x3FFF0000,0xAF3B78AD,0x690A4374,0x1FDF2610
	long		0x3FFF0000,0xB123F581,0xD2AC2590,0x9F705F90
	long		0x3FFF0000,0xB311C412,0xA9112488,0x201F678A
	long		0x3FFF0000,0xB504F333,0xF9DE6484,0x1F32FB13
	long		0x3FFF0000,0xB6FD91E3,0x28D17790,0x20038B30
	long		0x3FFF0000,0xB8FBAF47,0x62FB9EE8,0x200DC3CC
	long		0x3FFF0000,0xBAFF5AB2,0x133E45FC,0x9F8B2AE6
	long		0x3FFF0000,0xBD08A39F,0x580C36C0,0xA02BBF70
	long		0x3FFF0000,0xBF1799B6,0x7A731084,0xA00BF518
	long		0x3FFF0000,0xC12C4CCA,0x66709458,0xA041DD41
	long		0x3FFF0000,0xC346CCDA,0x24976408,0x9FDF137B
	long		0x3FFF0000,0xC5672A11,0x5506DADC,0x201F1568
	long		0x3FFF0000,0xC78D74C8,0xABB9B15C,0x1FC13A2E
	long		0x3FFF0000,0xC9B9BD86,0x6E2F27A4,0xA03F8F03
	long		0x3FFF0000,0xCBEC14FE,0xF2727C5C,0x1FF4907D
	long		0x3FFF0000,0xCE248C15,0x1F8480E4,0x9E6E53E4
	long		0x3FFF0000,0xD06333DA,0xEF2B2594,0x1FD6D45C
	long		0x3FFF0000,0xD2A81D91,0xF12AE45C,0xA076EDB9
	long		0x3FFF0000,0xD4F35AAB,0xCFEDFA20,0x9FA6DE21
	long		0x3FFF0000,0xD744FCCA,0xD69D6AF4,0x1EE69A2F
	long		0x3FFF0000,0xD99D15C2,0x78AFD7B4,0x207F439F
	long		0x3FFF0000,0xDBFBB797,0xDAF23754,0x201EC207
	long		0x3FFF0000,0xDE60F482,0x5E0E9124,0x9E8BE175
	long		0x3FFF0000,0xE0CCDEEC,0x2A94E110,0x20032C4B
	long		0x3FFF0000,0xE33F8972,0xBE8A5A50,0x2004DFF5
	long		0x3FFF0000,0xE5B906E7,0x7C8348A8,0x1E72F47A
	long		0x3FFF0000,0xE8396A50,0x3C4BDC68,0x1F722F22
	long		0x3FFF0000,0xEAC0C6E7,0xDD243930,0xA017E945
	long		0x3FFF0000,0xED4F301E,0xD9942B84,0x1F401A5B
	long		0x3FFF0000,0xEFE4B99B,0xDCDAF5CC,0x9FB9A9E3
	long		0x3FFF0000,0xF281773C,0x59FFB138,0x20744C05
	long		0x3FFF0000,0xF5257D15,0x2486CC2C,0x1F773A19
	long		0x3FFF0000,0xF7D0DF73,0x0AD13BB8,0x1FFE90D5
	long		0x3FFF0000,0xFA83B2DB,0x722A033C,0xA041ED22
	long		0x3FFF0000,0xFD3E0C0C,0xF486C174,0x1F853F3A

	set		ADJFLAG,L_SCR2
	set		SCALE,FP_SCR0
	set		ADJSCALE,FP_SCR1
	set		SC,FP_SCR0
	set		ONEBYSC,FP_SCR1

	global		setox
setox:
#--entry point for EXP(X), here X is finite, non-zero, and not NaN's

#--Step 1.
	mov.l		(%a0),%d1		# load part of input X
	and.l		&0x7FFF0000,%d1		# biased expo. of X
	cmp.l		%d1,&0x3FBE0000		# 2^(-65)
	bge.b		EXPC1			# normal case
	bra		EXPSM

EXPC1:
#--The case |X| >= 2^(-65)
	mov.w		4(%a0),%d1		# expo. and partial sig. of |X|
	cmp.l		%d1,&0x400CB167		# 16380 log2 trunc. 16 bits
	blt.b		EXPMAIN			# normal case
	bra		EEXPBIG

EXPMAIN:
#--Step 2.
#--This is the normal branch:	2^(-65) <= |X| < 16380 log2.
	fmov.x		(%a0),%fp0		# load input from (a0)

	fmov.x		%fp0,%fp1
	fmul.s		&0x42B8AA3B,%fp0	# 64/log2 * X
	fmovm.x		&0xc,-(%sp)		# save fp2 {%fp2/%fp3}
	mov.l		&0,ADJFLAG(%a6)
	fmov.l		%fp0,%d1		# N = int( X * 64/log2 )
	lea		EEXPTBL(%pc),%a1
	fmov.l		%d1,%fp0		# convert to floating-format

	mov.l		%d1,L_SCR1(%a6)		# save N temporarily
	and.l		&0x3F,%d1		# D0 is J = N mod 64
	lsl.l		&4,%d1
	add.l		%d1,%a1			# address of 2^(J/64)
	mov.l		L_SCR1(%a6),%d1
	asr.l		&6,%d1			# D0 is M
	add.w		&0x3FFF,%d1		# biased expo. of 2^(M)
	mov.w		L2(%pc),L_SCR1(%a6)	# prefetch L2, no need in CB

EXPCONT1:
#--Step 3.
#--fp1,fp2 saved on the stack. fp0 is N, fp1 is X,
#--a0 points to 2^(J/64), D0 is biased expo. of 2^(M)
	fmov.x		%fp0,%fp2
	fmul.s		&0xBC317218,%fp0	# N * L1, L1 = lead(-log2/64)
	fmul.x		L2(%pc),%fp2		# N * L2, L1+L2 = -log2/64
	fadd.x		%fp1,%fp0		# X + N*L1
	fadd.x		%fp2,%fp0		# fp0 is R, reduced arg.

#--Step 4.
#--WE NOW COMPUTE EXP(R)-1 BY A POLYNOMIAL
#-- R + R*R*(A1 + R*(A2 + R*(A3 + R*(A4 + R*A5))))
#--TO FULLY UTILIZE THE PIPELINE, WE COMPUTE S = R*R
#--[R+R*S*(A2+S*A4)] + [S*(A1+S*(A3+S*A5))]

	fmov.x		%fp0,%fp1
	fmul.x		%fp1,%fp1		# fp1 IS S = R*R

	fmov.s		&0x3AB60B70,%fp2	# fp2 IS A5

	fmul.x		%fp1,%fp2		# fp2 IS S*A5
	fmov.x		%fp1,%fp3
	fmul.s		&0x3C088895,%fp3	# fp3 IS S*A4

	fadd.d		EEXPA3(%pc),%fp2	# fp2 IS A3+S*A5
	fadd.d		EEXPA2(%pc),%fp3	# fp3 IS A2+S*A4

	fmul.x		%fp1,%fp2		# fp2 IS S*(A3+S*A5)
	mov.w		%d1,SCALE(%a6)		# SCALE is 2^(M) in extended
	mov.l		&0x80000000,SCALE+4(%a6)
	clr.l		SCALE+8(%a6)

	fmul.x		%fp1,%fp3		# fp3 IS S*(A2+S*A4)

	fadd.s		&0x3F000000,%fp2	# fp2 IS A1+S*(A3+S*A5)
	fmul.x		%fp0,%fp3		# fp3 IS R*S*(A2+S*A4)

	fmul.x		%fp1,%fp2		# fp2 IS S*(A1+S*(A3+S*A5))
	fadd.x		%fp3,%fp0		# fp0 IS R+R*S*(A2+S*A4),

	fmov.x		(%a1)+,%fp1		# fp1 is lead. pt. of 2^(J/64)
	fadd.x		%fp2,%fp0		# fp0 is EXP(R) - 1

#--Step 5
#--final reconstruction process
#--EXP(X) = 2^M * ( 2^(J/64) + 2^(J/64)*(EXP(R)-1) )

	fmul.x		%fp1,%fp0		# 2^(J/64)*(Exp(R)-1)
	fmovm.x		(%sp)+,&0x30		# fp2 restored {%fp2/%fp3}
	fadd.s		(%a1),%fp0		# accurate 2^(J/64)

	fadd.x		%fp1,%fp0		# 2^(J/64) + 2^(J/64)*...
	mov.l		ADJFLAG(%a6),%d1

#--Step 6
	tst.l		%d1
	beq.b		NORMAL
ADJUST:
	fmul.x		ADJSCALE(%a6),%fp0
NORMAL:
	fmov.l		%d0,%fpcr		# restore user FPCR
	mov.b		&FMUL_OP,%d1		# last inst is MUL
	fmul.x		SCALE(%a6),%fp0		# multiply 2^(M)
	bra		t_catch

EXPSM:
#--Step 7
	fmovm.x		(%a0),&0x80		# load X
	fmov.l		%d0,%fpcr
	fadd.s		&0x3F800000,%fp0	# 1+X in user mode
	bra		t_pinx2

EEXPBIG:
#--Step 8
	cmp.l		%d1,&0x400CB27C		# 16480 log2
	bgt.b		EXP2BIG
#--Steps 8.2 -- 8.6
	fmov.x		(%a0),%fp0		# load input from (a0)

	fmov.x		%fp0,%fp1
	fmul.s		&0x42B8AA3B,%fp0	# 64/log2 * X
	fmovm.x		&0xc,-(%sp)		# save fp2 {%fp2/%fp3}
	mov.l		&1,ADJFLAG(%a6)
	fmov.l		%fp0,%d1		# N = int( X * 64/log2 )
	lea		EEXPTBL(%pc),%a1
	fmov.l		%d1,%fp0		# convert to floating-format
	mov.l		%d1,L_SCR1(%a6)		# save N temporarily
	and.l		&0x3F,%d1		# D0 is J = N mod 64
	lsl.l		&4,%d1
	add.l		%d1,%a1			# address of 2^(J/64)
	mov.l		L_SCR1(%a6),%d1
	asr.l		&6,%d1			# D0 is K
	mov.l		%d1,L_SCR1(%a6)		# save K temporarily
	asr.l		&1,%d1			# D0 is M1
	sub.l		%d1,L_SCR1(%a6)		# a1 is M
	add.w		&0x3FFF,%d1		# biased expo. of 2^(M1)
	mov.w		%d1,ADJSCALE(%a6)	# ADJSCALE := 2^(M1)
	mov.l		&0x80000000,ADJSCALE+4(%a6)
	clr.l		ADJSCALE+8(%a6)
	mov.l		L_SCR1(%a6),%d1		# D0 is M
	add.w		&0x3FFF,%d1		# biased expo. of 2^(M)
	bra.w		EXPCONT1		# go back to Step 3

EXP2BIG:
#--Step 9
	tst.b		(%a0)			# is X positive or negative?
	bmi		t_unfl2
	bra		t_ovfl2

	global		setoxd
setoxd:
#--entry point for EXP(X), X is denormalized
	mov.l		(%a0),-(%sp)
	andi.l		&0x80000000,(%sp)
	ori.l		&0x00800000,(%sp)	# sign(X)*2^(-126)

	fmov.s		&0x3F800000,%fp0

	fmov.l		%d0,%fpcr
	fadd.s		(%sp)+,%fp0
	bra		t_pinx2

	global		setoxm1
setoxm1:
#--entry point for EXPM1(X), here X is finite, non-zero, non-NaN

#--Step 1.
#--Step 1.1
	mov.l		(%a0),%d1		# load part of input X
	and.l		&0x7FFF0000,%d1		# biased expo. of X
	cmp.l		%d1,&0x3FFD0000		# 1/4
	bge.b		EM1CON1			# |X| >= 1/4
	bra		EM1SM

EM1CON1:
#--Step 1.3
#--The case |X| >= 1/4
	mov.w		4(%a0),%d1		# expo. and partial sig. of |X|
	cmp.l		%d1,&0x4004C215		# 70log2 rounded up to 16 bits
	ble.b		EM1MAIN			# 1/4 <= |X| <= 70log2
	bra		EM1BIG

EM1MAIN:
#--Step 2.
#--This is the case:	1/4 <= |X| <= 70 log2.
	fmov.x		(%a0),%fp0		# load input from (a0)

	fmov.x		%fp0,%fp1
	fmul.s		&0x42B8AA3B,%fp0	# 64/log2 * X
	fmovm.x		&0xc,-(%sp)		# save fp2 {%fp2/%fp3}
	fmov.l		%fp0,%d1		# N = int( X * 64/log2 )
	lea		EEXPTBL(%pc),%a1
	fmov.l		%d1,%fp0		# convert to floating-format

	mov.l		%d1,L_SCR1(%a6)		# save N temporarily
	and.l		&0x3F,%d1		# D0 is J = N mod 64
	lsl.l		&4,%d1
	add.l		%d1,%a1			# address of 2^(J/64)
	mov.l		L_SCR1(%a6),%d1
	asr.l		&6,%d1			# D0 is M
	mov.l		%d1,L_SCR1(%a6)		# save a copy of M

#--Step 3.
#--fp1,fp2 saved on the stack. fp0 is N, fp1 is X,
#--a0 points to 2^(J/64), D0 and a1 both contain M
	fmov.x		%fp0,%fp2
	fmul.s		&0xBC317218,%fp0	# N * L1, L1 = lead(-log2/64)
	fmul.x		L2(%pc),%fp2		# N * L2, L1+L2 = -log2/64
	fadd.x		%fp1,%fp0		# X + N*L1
	fadd.x		%fp2,%fp0		# fp0 is R, reduced arg.
	add.w		&0x3FFF,%d1		# D0 is biased expo. of 2^M

#--Step 4.
#--WE NOW COMPUTE EXP(R)-1 BY A POLYNOMIAL
#-- R + R*R*(A1 + R*(A2 + R*(A3 + R*(A4 + R*(A5 + R*A6)))))
#--TO FULLY UTILIZE THE PIPELINE, WE COMPUTE S = R*R
#--[R*S*(A2+S*(A4+S*A6))] + [R+S*(A1+S*(A3+S*A5))]

	fmov.x		%fp0,%fp1
	fmul.x		%fp1,%fp1		# fp1 IS S = R*R

	fmov.s		&0x3950097B,%fp2	# fp2 IS a6

	fmul.x		%fp1,%fp2		# fp2 IS S*A6
	fmov.x		%fp1,%fp3
	fmul.s		&0x3AB60B6A,%fp3	# fp3 IS S*A5

	fadd.d		EM1A4(%pc),%fp2		# fp2 IS A4+S*A6
	fadd.d		EM1A3(%pc),%fp3		# fp3 IS A3+S*A5
	mov.w		%d1,SC(%a6)		# SC is 2^(M) in extended
	mov.l		&0x80000000,SC+4(%a6)
	clr.l		SC+8(%a6)

	fmul.x		%fp1,%fp2		# fp2 IS S*(A4+S*A6)
	mov.l		L_SCR1(%a6),%d1		# D0 is	M
	neg.w		%d1			# D0 is -M
	fmul.x		%fp1,%fp3		# fp3 IS S*(A3+S*A5)
	add.w		&0x3FFF,%d1		# biased expo. of 2^(-M)
	fadd.d		EM1A2(%pc),%fp2		# fp2 IS A2+S*(A4+S*A6)
	fadd.s		&0x3F000000,%fp3	# fp3 IS A1+S*(A3+S*A5)

	fmul.x		%fp1,%fp2		# fp2 IS S*(A2+S*(A4+S*A6))
	or.w		&0x8000,%d1		# signed/expo. of -2^(-M)
	mov.w		%d1,ONEBYSC(%a6)	# OnebySc is -2^(-M)
	mov.l		&0x80000000,ONEBYSC+4(%a6)
	clr.l		ONEBYSC+8(%a6)
	fmul.x		%fp3,%fp1		# fp1 IS S*(A1+S*(A3+S*A5))

	fmul.x		%fp0,%fp2		# fp2 IS R*S*(A2+S*(A4+S*A6))
	fadd.x		%fp1,%fp0		# fp0 IS R+S*(A1+S*(A3+S*A5))

	fadd.x		%fp2,%fp0		# fp0 IS EXP(R)-1

	fmovm.x		(%sp)+,&0x30		# fp2 restored {%fp2/%fp3}

#--Step 5
#--Compute 2^(J/64)*p

	fmul.x		(%a1),%fp0		# 2^(J/64)*(Exp(R)-1)

#--Step 6
#--Step 6.1
	mov.l		L_SCR1(%a6),%d1		# retrieve M
	cmp.l		%d1,&63
	ble.b		MLE63
#--Step 6.2	M >= 64
	fmov.s		12(%a1),%fp1		# fp1 is t
	fadd.x		ONEBYSC(%a6),%fp1	# fp1 is t+OnebySc
	fadd.x		%fp1,%fp0		# p+(t+OnebySc), fp1 released
	fadd.x		(%a1),%fp0		# T+(p+(t+OnebySc))
	bra		EM1SCALE
MLE63:
#--Step 6.3	M <= 63
	cmp.l		%d1,&-3
	bge.b		MGEN3
MLTN3:
#--Step 6.4	M <= -4
	fadd.s		12(%a1),%fp0		# p+t
	fadd.x		(%a1),%fp0		# T+(p+t)
	fadd.x		ONEBYSC(%a6),%fp0	# OnebySc + (T+(p+t))
	bra		EM1SCALE
MGEN3:
#--Step 6.5	-3 <= M <= 63
	fmov.x		(%a1)+,%fp1		# fp1 is T
	fadd.s		(%a1),%fp0		# fp0 is p+t
	fadd.x		ONEBYSC(%a6),%fp1	# fp1 is T+OnebySc
	fadd.x		%fp1,%fp0		# (T+OnebySc)+(p+t)

EM1SCALE:
#--Step 6.6
	fmov.l		%d0,%fpcr
	fmul.x		SC(%a6),%fp0
	bra		t_inx2

EM1SM:
#--Step 7	|X| < 1/4.
	cmp.l		%d1,&0x3FBE0000		# 2^(-65)
	bge.b		EM1POLY

EM1TINY:
#--Step 8	|X| < 2^(-65)
	cmp.l		%d1,&0x00330000		# 2^(-16312)
	blt.b		EM12TINY
#--Step 8.2
	mov.l		&0x80010000,SC(%a6)	# SC is -2^(-16382)
	mov.l		&0x80000000,SC+4(%a6)
	clr.l		SC+8(%a6)
	fmov.x		(%a0),%fp0
	fmov.l		%d0,%fpcr
	mov.b		&FADD_OP,%d1		# last inst is ADD
	fadd.x		SC(%a6),%fp0
	bra		t_catch

EM12TINY:
#--Step 8.3
	fmov.x		(%a0),%fp0
	fmul.d		TWO140(%pc),%fp0
	mov.l		&0x80010000,SC(%a6)
	mov.l		&0x80000000,SC+4(%a6)
	clr.l		SC+8(%a6)
	fadd.x		SC(%a6),%fp0
	fmov.l		%d0,%fpcr
	mov.b		&FMUL_OP,%d1		# last inst is MUL
	fmul.d		TWON140(%pc),%fp0
	bra		t_catch

EM1POLY:
#--Step 9	exp(X)-1 by a simple polynomial
	fmov.x		(%a0),%fp0		# fp0 is X
	fmul.x		%fp0,%fp0		# fp0 is S := X*X
	fmovm.x		&0xc,-(%sp)		# save fp2 {%fp2/%fp3}
	fmov.s		&0x2F30CAA8,%fp1	# fp1 is B12
	fmul.x		%fp0,%fp1		# fp1 is S*B12
	fmov.s		&0x310F8290,%fp2	# fp2 is B11
	fadd.s		&0x32D73220,%fp1	# fp1 is B10+S*B12

	fmul.x		%fp0,%fp2		# fp2 is S*B11
	fmul.x		%fp0,%fp1		# fp1 is S*(B10 + ...

	fadd.s		&0x3493F281,%fp2	# fp2 is B9+S*...
	fadd.d		EM1B8(%pc),%fp1		# fp1 is B8+S*...

	fmul.x		%fp0,%fp2		# fp2 is S*(B9+...
	fmul.x		%fp0,%fp1		# fp1 is S*(B8+...

	fadd.d		EM1B7(%pc),%fp2		# fp2 is B7+S*...
	fadd.d		EM1B6(%pc),%fp1		# fp1 is B6+S*...

	fmul.x		%fp0,%fp2		# fp2 is S*(B7+...
	fmul.x		%fp0,%fp1		# fp1 is S*(B6+...

	fadd.d		EM1B5(%pc),%fp2		# fp2 is B5+S*...
	fadd.d		EM1B4(%pc),%fp1		# fp1 is B4+S*...

	fmul.x		%fp0,%fp2		# fp2 is S*(B5+...
	fmul.x		%fp0,%fp1		# fp1 is S*(B4+...

	fadd.d		EM1B3(%pc),%fp2		# fp2 is B3+S*...
	fadd.x		EM1B2(%pc),%fp1		# fp1 is B2+S*...

	fmul.x		%fp0,%fp2		# fp2 is S*(B3+...
	fmul.x		%fp0,%fp1		# fp1 is S*(B2+...

	fmul.x		%fp0,%fp2		# fp2 is S*S*(B3+...)
	fmul.x		(%a0),%fp1		# fp1 is X*S*(B2...

	fmul.s		&0x3F000000,%fp0	# fp0 is S*B1
	fadd.x		%fp2,%fp1		# fp1 is Q

	fmovm.x		(%sp)+,&0x30		# fp2 restored {%fp2/%fp3}

	fadd.x		%fp1,%fp0		# fp0 is S*B1+Q

	fmov.l		%d0,%fpcr
	fadd.x		(%a0),%fp0
	bra		t_inx2

EM1BIG:
#--Step 10	|X| > 70 log2
	mov.l		(%a0),%d1
	cmp.l		%d1,&0
	bgt.w		EXPC1
#--Step 10.2
	fmov.s		&0xBF800000,%fp0	# fp0 is -1
	fmov.l		%d0,%fpcr
	fadd.s		&0x00800000,%fp0	# -1 + 2^(-126)
	bra		t_minx2

	global		setoxm1d
setoxm1d:
#--entry point for EXPM1(X), here X is denormalized
#--Step 0.
	bra		t_extdnrm

#########################################################################
# sgetexp():  returns the exponent portion of the input argument.	#
#	      The exponent bias is removed and the exponent value is	#
#	      returned as an extended precision number in fp0.		#
# sgetexpd(): handles denormalized numbers. 				#
#									#
# sgetman():  extracts the mantissa of the input argument. The 		#
#	      mantissa is converted to an extended precision number w/ 	#
#	      an exponent of $3fff and is returned in fp0. The range of #
#	      the result is [1.0 - 2.0).				#
# sgetmand(): handles denormalized numbers.				#
#									#
# INPUT *************************************************************** #
#	a0  = pointer to extended precision input			#
#									#
# OUTPUT ************************************************************** #
#	fp0 = exponent(X) or mantissa(X)				#
#									#
#########################################################################

	global		sgetexp
sgetexp:
	mov.w		SRC_EX(%a0),%d0		# get the exponent
	bclr		&0xf,%d0		# clear the sign bit
	subi.w		&0x3fff,%d0		# subtract off the bias
	fmov.w		%d0,%fp0		# return exp in fp0
	blt.b		sgetexpn		# it's negative
	rts

sgetexpn:
	mov.b		&neg_bmask,FPSR_CC(%a6)	# set 'N' ccode bit
	rts

	global		sgetexpd
sgetexpd:
	bsr.l		norm			# normalize
	neg.w		%d0			# new exp = -(shft amt)
	subi.w		&0x3fff,%d0		# subtract off the bias
	fmov.w		%d0,%fp0		# return exp in fp0
	mov.b		&neg_bmask,FPSR_CC(%a6)	# set 'N' ccode bit
	rts

	global		sgetman
sgetman:
	mov.w		SRC_EX(%a0),%d0		# get the exp
	ori.w		&0x7fff,%d0		# clear old exp
	bclr		&0xe,%d0		# make it the new exp +-3fff

# here, we build the result in a tmp location so as not to disturb the input
	mov.l		SRC_HI(%a0),FP_SCR0_HI(%a6) # copy to tmp loc
	mov.l		SRC_LO(%a0),FP_SCR0_LO(%a6) # copy to tmp loc
	mov.w		%d0,FP_SCR0_EX(%a6)	# insert new exponent
	fmov.x		FP_SCR0(%a6),%fp0	# put new value back in fp0
	bmi.b		sgetmann		# it's negative
	rts

sgetmann:
	mov.b		&neg_bmask,FPSR_CC(%a6)	# set 'N' ccode bit
	rts

#
# For denormalized numbers, shift the mantissa until the j-bit = 1,
# then load the exponent with +/1 $3fff.
#
	global		sgetmand
sgetmand:
	bsr.l		norm			# normalize exponent
	bra.b		sgetman

#########################################################################
# scosh():  computes the hyperbolic cosine of a normalized input	#
# scoshd(): computes the hyperbolic cosine of a denormalized input	#
#									#
# INPUT ***************************************************************	#
#	a0 = pointer to extended precision input			#
#	d0 = round precision,mode					#
#									#
# OUTPUT **************************************************************	#
#	fp0 = cosh(X)							#
#									#
# ACCURACY and MONOTONICITY *******************************************	#
#	The returned result is within 3 ulps in 64 significant bit, 	#
#	i.e. within 0.5001 ulp to 53 bits if the result is subsequently	#
#	rounded to double precision. The result is provably monotonic 	#
#	in double precision.						#
#									#
# ALGORITHM ***********************************************************	#
#									#
#	COSH								#
#	1. If |X| > 16380 log2, go to 3.				#
#									#
#	2. (|X| <= 16380 log2) Cosh(X) is obtained by the formulae	#
#		y = |X|, z = exp(Y), and				#
#		cosh(X) = (1/2)*( z + 1/z ).				#
#		Exit.							#
#									#
#	3. (|X| > 16380 log2). If |X| > 16480 log2, go to 5.		#
#									#
#	4. (16380 log2 < |X| <= 16480 log2)				#
#		cosh(X) = sign(X) * exp(|X|)/2.				#
#		However, invoking exp(|X|) may cause premature 		#
#		overflow. Thus, we calculate sinh(X) as follows:	#
#		Y	:= |X|						#
#		Fact	:=	2**(16380)				#
#		Y'	:= Y - 16381 log2				#
#		cosh(X) := Fact * exp(Y').				#
#		Exit.							#
#									#
#	5. (|X| > 16480 log2) sinh(X) must overflow. Return		#
#		Huge*Huge to generate overflow and an infinity with	#
#		the appropriate sign. Huge is the largest finite number	#
#		in extended format. Exit.				#
#									#
#########################################################################

TWO16380:
	long		0x7FFB0000,0x80000000,0x00000000,0x00000000

	global		scosh
scosh:
	fmov.x		(%a0),%fp0		# LOAD INPUT

	mov.l		(%a0),%d1
	mov.w		4(%a0),%d1
	and.l		&0x7FFFFFFF,%d1
	cmp.l		%d1,&0x400CB167
	bgt.b		COSHBIG

#--THIS IS THE USUAL CASE, |X| < 16380 LOG2
#--COSH(X) = (1/2) * ( EXP(X) + 1/EXP(X) )

	fabs.x		%fp0			# |X|

	mov.l		%d0,-(%sp)
	clr.l		%d0
	fmovm.x		&0x01,-(%sp)		# save |X| to stack
	lea		(%sp),%a0		# pass ptr to |X|
	bsr		setox			# FP0 IS EXP(|X|)
	add.l		&0xc,%sp		# erase |X| from stack
	fmul.s		&0x3F000000,%fp0	# (1/2)EXP(|X|)
	mov.l		(%sp)+,%d0

	fmov.s		&0x3E800000,%fp1	# (1/4)
	fdiv.x		%fp0,%fp1		# 1/(2 EXP(|X|))

	fmov.l		%d0,%fpcr
	mov.b		&FADD_OP,%d1		# last inst is ADD
	fadd.x		%fp1,%fp0
	bra		t_catch

COSHBIG:
	cmp.l		%d1,&0x400CB2B3
	bgt.b		COSHHUGE

	fabs.x		%fp0
	fsub.d		T1(%pc),%fp0		# (|X|-16381LOG2_LEAD)
	fsub.d		T2(%pc),%fp0		# |X| - 16381 LOG2, ACCURATE

	mov.l		%d0,-(%sp)
	clr.l		%d0
	fmovm.x		&0x01,-(%sp)		# save fp0 to stack
	lea		(%sp),%a0		# pass ptr to fp0
	bsr		setox
	add.l		&0xc,%sp		# clear fp0 from stack
	mov.l		(%sp)+,%d0

	fmov.l		%d0,%fpcr
	mov.b		&FMUL_OP,%d1		# last inst is MUL
	fmul.x		TWO16380(%pc),%fp0
	bra		t_catch

COSHHUGE:
	bra		t_ovfl2

	global		scoshd
#--COSH(X) = 1 FOR DENORMALIZED X
scoshd:
	fmov.s		&0x3F800000,%fp0

	fmov.l		%d0,%fpcr
	fadd.s		&0x00800000,%fp0
	bra		t_pinx2

#########################################################################
# ssinh():  computes the hyperbolic sine of a normalized input		#
# ssinhd(): computes the hyperbolic sine of a denormalized input	#
#									#
# INPUT *************************************************************** #
#	a0 = pointer to extended precision input			#
#	d0 = round precision,mode					#
#									#
# OUTPUT ************************************************************** #
#	fp0 = sinh(X)							#
#									#
# ACCURACY and MONOTONICITY *******************************************	#
#	The returned result is within 3 ulps in 64 significant bit, 	#
#	i.e. within 0.5001 ulp to 53 bits if the result is subsequently #
#	rounded to double precision. The result is provably monotonic	#
#	in double precision.						#
#									#
# ALGORITHM *********************************************************** #
#									#
#       SINH								#
#       1. If |X| > 16380 log2, go to 3.				#
#									#
#       2. (|X| <= 16380 log2) Sinh(X) is obtained by the formula	#
#               y = |X|, sgn = sign(X), and z = expm1(Y),		#
#               sinh(X) = sgn*(1/2)*( z + z/(1+z) ).			#
#          Exit.							#
#									#
#       3. If |X| > 16480 log2, go to 5.				#
#									#
#       4. (16380 log2 < |X| <= 16480 log2)				#
#               sinh(X) = sign(X) * exp(|X|)/2.				#
#          However, invoking exp(|X|) may cause premature overflow.	#
#          Thus, we calculate sinh(X) as follows:			#
#             Y       := |X|						#
#             sgn     := sign(X)					#
#             sgnFact := sgn * 2**(16380)				#
#             Y'      := Y - 16381 log2					#
#             sinh(X) := sgnFact * exp(Y').				#
#          Exit.							#
#									#
#       5. (|X| > 16480 log2) sinh(X) must overflow. Return		#
#          sign(X)*Huge*Huge to generate overflow and an infinity with	#
#          the appropriate sign. Huge is the largest finite number in	#
#          extended format. Exit.					#
#									#
#########################################################################

	global		ssinh
ssinh:
	fmov.x		(%a0),%fp0		# LOAD INPUT

	mov.l		(%a0),%d1
	mov.w		4(%a0),%d1
	mov.l		%d1,%a1			# save (compacted) operand
	and.l		&0x7FFFFFFF,%d1
	cmp.l		%d1,&0x400CB167
	bgt.b		SINHBIG

#--THIS IS THE USUAL CASE, |X| < 16380 LOG2
#--Y = |X|, Z = EXPM1(Y), SINH(X) = SIGN(X)*(1/2)*( Z + Z/(1+Z) )

	fabs.x		%fp0			# Y = |X|

	movm.l		&0x8040,-(%sp)		# {a1/d0}
	fmovm.x		&0x01,-(%sp)		# save Y on stack
	lea		(%sp),%a0		# pass ptr to Y
	clr.l		%d0
	bsr		setoxm1			# FP0 IS Z = EXPM1(Y)
	add.l		&0xc,%sp		# clear Y from stack
	fmov.l		&0,%fpcr
	movm.l		(%sp)+,&0x0201		# {a1/d0}

	fmov.x		%fp0,%fp1
	fadd.s		&0x3F800000,%fp1	# 1+Z
	fmov.x		%fp0,-(%sp)
	fdiv.x		%fp1,%fp0		# Z/(1+Z)
	mov.l		%a1,%d1
	and.l		&0x80000000,%d1
	or.l		&0x3F000000,%d1
	fadd.x		(%sp)+,%fp0
	mov.l		%d1,-(%sp)

	fmov.l		%d0,%fpcr
	mov.b		&FMUL_OP,%d1		# last inst is MUL
	fmul.s		(%sp)+,%fp0		# last fp inst - possible exceptions set
	bra		t_catch

SINHBIG:
	cmp.l		%d1,&0x400CB2B3
	bgt		t_ovfl
	fabs.x		%fp0
	fsub.d		T1(%pc),%fp0		# (|X|-16381LOG2_LEAD)
	mov.l		&0,-(%sp)
	mov.l		&0x80000000,-(%sp)
	mov.l		%a1,%d1
	and.l		&0x80000000,%d1
	or.l		&0x7FFB0000,%d1
	mov.l		%d1,-(%sp)		# EXTENDED FMT
	fsub.d		T2(%pc),%fp0		# |X| - 16381 LOG2, ACCURATE

	mov.l		%d0,-(%sp)
	clr.l		%d0
	fmovm.x		&0x01,-(%sp)		# save fp0 on stack
	lea		(%sp),%a0		# pass ptr to fp0
	bsr		setox
	add.l		&0xc,%sp		# clear fp0 from stack

	mov.l		(%sp)+,%d0
	fmov.l		%d0,%fpcr
	mov.b		&FMUL_OP,%d1		# last inst is MUL
	fmul.x		(%sp)+,%fp0		# possible exception
	bra		t_catch

	global		ssinhd
#--SINH(X) = X FOR DENORMALIZED X
ssinhd:
	bra		t_extdnrm

#########################################################################
# stanh():  computes the hyperbolic tangent of a normalized input	#
# stanhd(): computes the hyperbolic tangent of a denormalized input	#
#									#
# INPUT ***************************************************************	#
#	a0 = pointer to extended precision input			#
#	d0 = round precision,mode					#
#									#
# OUTPUT **************************************************************	#
#	fp0 = tanh(X)							#
#									#
# ACCURACY and MONOTONICITY *******************************************	#
#	The returned result is within 3 ulps in 64 significant bit, 	#
#	i.e. within 0.5001 ulp to 53 bits if the result is subsequently #
#	rounded to double precision. The result is provably monotonic	#
#	in double precision.						#
#									#
# ALGORITHM ***********************************************************	#
#									#
#	TANH								#
#	1. If |X| >= (5/2) log2 or |X| <= 2**(-40), go to 3.		#
#									#
#	2. (2**(-40) < |X| < (5/2) log2) Calculate tanh(X) by		#
#		sgn := sign(X), y := 2|X|, z := expm1(Y), and		#
#		tanh(X) = sgn*( z/(2+z) ).				#
#		Exit.							#
#									#
#	3. (|X| <= 2**(-40) or |X| >= (5/2) log2). If |X| < 1,		#
#		go to 7.						#
#									#
#	4. (|X| >= (5/2) log2) If |X| >= 50 log2, go to 6.		#
#									#
#	5. ((5/2) log2 <= |X| < 50 log2) Calculate tanh(X) by		#
#		sgn := sign(X), y := 2|X|, z := exp(Y),			#
#		tanh(X) = sgn - [ sgn*2/(1+z) ].			#
#		Exit.							#
#									#
#	6. (|X| >= 50 log2) Tanh(X) = +-1 (round to nearest). Thus, we	#
#		calculate Tanh(X) by					#
#		sgn := sign(X), Tiny := 2**(-126),			#
#		tanh(X) := sgn - sgn*Tiny.				#
#		Exit.							#
#									#
#	7. (|X| < 2**(-40)). Tanh(X) = X.	Exit.			#
#									#
#########################################################################

	set		X,FP_SCR0
	set		XFRAC,X+4

	set		SGN,L_SCR3

	set		V,FP_SCR0

	global		stanh
stanh:
	fmov.x		(%a0),%fp0		# LOAD INPUT

	fmov.x		%fp0,X(%a6)
	mov.l		(%a0),%d1
	mov.w		4(%a0),%d1
	mov.l		%d1,X(%a6)
	and.l		&0x7FFFFFFF,%d1
	cmp.l		%d1, &0x3fd78000	# is |X| < 2^(-40)?
	blt.w		TANHBORS		# yes
	cmp.l		%d1, &0x3fffddce	# is |X| > (5/2)LOG2?
	bgt.w		TANHBORS		# yes

#--THIS IS THE USUAL CASE
#--Y = 2|X|, Z = EXPM1(Y), TANH(X) = SIGN(X) * Z / (Z+2).

	mov.l		X(%a6),%d1
	mov.l		%d1,SGN(%a6)
	and.l		&0x7FFF0000,%d1
	add.l		&0x00010000,%d1		# EXPONENT OF 2|X|
	mov.l		%d1,X(%a6)
	and.l		&0x80000000,SGN(%a6)
	fmov.x		X(%a6),%fp0		# FP0 IS Y = 2|X|

	mov.l		%d0,-(%sp)
	clr.l		%d0
	fmovm.x		&0x1,-(%sp)		# save Y on stack
	lea		(%sp),%a0		# pass ptr to Y
	bsr		setoxm1			# FP0 IS Z = EXPM1(Y)
	add.l		&0xc,%sp		# clear Y from stack
	mov.l		(%sp)+,%d0

	fmov.x		%fp0,%fp1
	fadd.s		&0x40000000,%fp1	# Z+2
	mov.l		SGN(%a6),%d1
	fmov.x		%fp1,V(%a6)
	eor.l		%d1,V(%a6)

	fmov.l		%d0,%fpcr		# restore users round prec,mode
	fdiv.x		V(%a6),%fp0
	bra		t_inx2

TANHBORS:
	cmp.l		%d1,&0x3FFF8000
	blt.w		TANHSM

	cmp.l		%d1,&0x40048AA1
	bgt.w		TANHHUGE

#-- (5/2) LOG2 < |X| < 50 LOG2,
#--TANH(X) = 1 - (2/[EXP(2X)+1]). LET Y = 2|X|, SGN = SIGN(X),
#--TANH(X) = SGN -	SGN*2/[EXP(Y)+1].

	mov.l		X(%a6),%d1
	mov.l		%d1,SGN(%a6)
	and.l		&0x7FFF0000,%d1
	add.l		&0x00010000,%d1		# EXPO OF 2|X|
	mov.l		%d1,X(%a6)		# Y = 2|X|
	and.l		&0x80000000,SGN(%a6)
	mov.l		SGN(%a6),%d1
	fmov.x		X(%a6),%fp0		# Y = 2|X|

	mov.l		%d0,-(%sp)
	clr.l		%d0
	fmovm.x		&0x01,-(%sp)		# save Y on stack
	lea		(%sp),%a0		# pass ptr to Y
	bsSCSI == 2 || $CONFIG_SCSI == 4)} then {write_tristate $cfg $autocfg CONFIG_SCSI_GDTH $CONFIG_SCSI_GDTH [list $CONFIG_SCSI] 2 }
	global CONFIG_SCSI_GENERIC_NCR5380
	if {($CONFIG_SCSI != 0) && ($CONFIG_SCSI == 1 || $CONFIG_SCSI == 2 || $CONFIG_SCSI == 4)} then {write_tristate $cfg $autocfg CONFIG_SCSI_GENERIC_NCR5380 $CONFIG_SCSI_GENERIC_NCR5380 [list $CONFIG_SCSI] 2 }
	global CONFIG_SCSI_GENERIC_NCR53C400
	if {($CONFIG_SCSI != 0) && ($CONFIG_SCSI_GENERIC_NCR5380 != 0)} then {write_tristate $cfg $autocfg CONFIG_SCSI_GENERIC_NCR53C400 $CONFIG_SCSI_GENERIC_NCR53C400 [list $notmod] 2 }
	global tmpvar_8
	if {($CONFIG_SCSI != 0) && ($CONFIG_SCSI_GENERIC_NCR5380 != 0)} then {
	if { $tmpvar_8 == "Port" } then { write_tristate $cfg $autocfg CONFIG_SCSI_G_NCR5380_PORT 1 [list $notmod] 2 } else { write_tristate $cfg $autocfg CONFIG_SCSI_G_NCR5380_PORT 0 [list $notmod] 2 }
	if { $tmpvar_8 == "Memory" } then { write_tristate $cfg $autocfg CONFIG_SCSI_G_NCR5380_MEM 1 [list $notmod] 2 } else { write_tristate $cfg $autocfg CONFIG_SCSI_G_NCR5380_MEM 0 [list $notmod] 2 }}
	global CONFIG_SCSI_IBMMCA
	if {($CONFIG_SCSI != 0) && ($CONFIG_MCA == 1) && ($CONFIG_SCSI == 1 || $CONFIG_SCSI == 2 || $CONFIG_SCSI == 4)} then {write_tristate $cfg $autocfg CONFIG_SCSI_IBMMCA $CONFIG_SCSI_IBMMCA [list $CONFIG_SCSI] 2 }
	global CONFIG_IBMMCA_SCSI_ORDER_STANDARD
	if {($CONFIG_SCSI != 0) && ($CONFIG_MCA == 1) && ($CONFIG_SCSI_IBMMCA != 0)} then {write_tristate $cfg $autocfg CONFIG_IBMMCA_SCSI_ORDER_STANDARD $CONFIG_IBMMCA_SCSI_ORDER_STANDARD [list $notmod] 2 }
	global CONFIG_IBMMCA_SCSI_DEV_RESET
	if {($CONFIG_SCSI != 0) && ($CONFIG_MCA == 1) && ($CONFIG_SCSI_IBMMCA != 0)} then {write_tristate $cfg $autocfg CONFIG_IBMMCA_SCSI_DEV_RESET $CONFIG_IBMMCA_SCSI_DEV_RESET [list $notmod] 2 }
	global CONFIG_SCSI_IPS
	if {($CONFIG_SCSI != 0) && ($CONFIG_X86 == 1) && ($CONFIG_SCSI == 1 || $CONFIG_SCSI == 2 || $CONFIG_SCSI == 4) && ($CONFIG_PCI == 1 || $CONFIG_PCI == 2 || $CONFIG_PCI == 4)} then {write_tristate $cfg $autocfg CONFIG_SCSI_IPS $CONFIG_SCSI_IPS [list $CONFIG_SCSI $CONFIG_PCI] 2 }
	global CONFIG_SCSI_INITIO
	if {($CONFIG_SCSI != 0) && ($CONFIG_SCSI == 1 || $CONFIG_SCSI == 2 || $CONFIG_SCSI == 4) && ($CONFIG_PCI == 1 || $CONFIG_PCI == 2 || $CONFIG_PCI == 4)} then {write_tristate $cfg $autocfg CONFIG_SCSI_INITIO $CONFIG_SCSI_INITIO [list $CONFIG_SCSI $CONFIG_PCI] 2 }
	global CONFIG_SCSI_INIA100
	if {($CONFIG_SCSI != 0) && ($CONFIG_SCSI == 1 || $CONFIG_SCSI == 2 || $CONFIG_SCSI == 4) && ($CONFIG_PCI == 1 || $CONFIG_PCI == 2 || $CONFIG_PCI == 4)} then {write_tristate $cfg $autocfg CONFIG_SCSI_INIA100 $CONFIG_SCSI_INIA100 [list $CONFIG_SCSI $CONFIG_PCI] 2 }
	global CONFIG_SCSI_PPA
	if {($CONFIG_SCSI != 0) && ($CONFIG_PARPORT != 0) && ($CONFIG_SCSI == 1 || $CONFIG_SCSI == 2 || $CONFIG_SCSI == 4) && ($CONFIG_PARPORT == 1 || $CONFIG_PARPORT == 2 || $CONFIG_PARPORT == 4)} then {write_tristate $cfg $autocfg CONFIG_SCSI_PPA $CONFIG_SCSI_PPA [list $CONFIG_SCSI $CONFIG_PARPORT] 2 }
	global CONFIG_SCSI_IMM
	if {($CONFIG_SCSI != 0) && ($CONFIG_PARPORT != 0) && ($CONFIG_SCSI == 1 || $CONFIG_SCSI == 2 || $CONFIG_SCSI == 4) && ($CONFIG_PARPORT == 1 || $CONFIG_PARPORT == 2 || $CONFIG_PARPORT == 4)} then {write_tristate $cfg $autocfg CONFIG_SCSI_IMM $CONFIG_SCSI_IMM [list $CONFIG_SCSI $CONFIG_PARPORT] 2 }
	global CONFIG_SCSI_IZIP_EPP16
	if {($CONFIG_SCSI != 0) && ($CONFIG_PARPORT != 0) && ($CONFIG_SCSI_PPA != 0 || $CONFIG_SCSI_IMM != 0)} then {write_tristate $cfg $autocfg CONFIG_SCSI_IZIP_EPP16 $CONFIG_SCSI_IZIP_EPP16 [list $notmod] 2 }
	global CONFIG_SCSI_IZIP_SLOW_CTR
	if {($CONFIG_SCSI != 0) && ($CONFIG_PARPORT != 0) && ($CONFIG_SCSI_PPA != 0 || $CONFIG_SCSI_IMM != 0)} then {write_tristate $cfg $autocfg CONFIG_SCSI_IZIP_SLOW_CTR $CONFIG_SCSI_IZIP_SLOW_CTR [list $notmod] 2 }
	global CONFIG_SCSI_NCR53C406A
	if {($CONFIG_SCSI != 0) && ($CONFIG_SCSI == 1 || $CONFIG_SCSI == 2 || $CONFIG_SCSI == 4)} then {write_tristate $cfg $autocfg CONFIG_SCSI_NCR53C406A $CONFIG_SCSI_NCR53C406A [list $CONFIG_SCSI] 2 }
	global CONFIG_SCSI_NCR_D700
	if {($CONFIG_SCSI != 0) && ($CONFIG_MCA == 1) && ($CONFIG_SCSI == 1 || $CONFIG_SCSI == 2 || $CONFIG_SCSI == 4)} then {write_tristate $cfg $autocfg CONFIG_SCSI_NCR_D700 $CONFIG_SCSI_NCR_D700 [list $CONFIG_SCSI] 2 }
	global CONFIG_53C700_IO_MAPPED
	if {($CONFIG_SCSI != 0) && ($CONFIG_MCA == 1) && ($CONFIG_SCSI_NCR_D700 != 0)} then {write_tristate $cfg $autocfg CONFIG_53C700_IO_MAPPED $CONSTANT_Y [list $notmod] 2 }
	global CONFIG_SCSI_NCR53C7xx
	if {($CONFIG_SCSI != 0) && ($CONFIG_SCSI == 1 || $CONFIG_SCSI == 2 || $CONFIG_SCSI == 4) && ($CONFIG_PCI == 1 || $CONFIG_PCI == 2 || $CONFIG_PCI == 4)} then {write_tristate $cfg $autocfg CONFIG_SCSI_NCR53C7xx $CONFIG_SCSI_NCR53C7xx [list $CONFIG_SCSI $CONFIG_PCI] 2 }
	global CONFIG_SCSI_NCR53C7xx_sync
	if {($CONFIG_SCSI != 0) && ($CONFIG_SCSI_NCR53C7xx != 0)} then {write_tristate $cfg $autocfg CONFIG_SCSI_NCR53C7xx_sync $CONFIG_SCSI_NCR53C7xx_sync [list $notmod] 2 }
	global CONFIG_SCSI_NCR53C7xx_FAST
	if {($CONFIG_SCSI != 0) && ($CONFIG_SCSI_NCR53C7xx != 0)} then {write_tristate $cfg $autocfg CONFIG_SCSI_NCR53C7xx_FAST $CONFIG_SCSI_NCR53C7xx_FAST [list $notmod] 2 }
	global CONFIG_SCSI_NCR53C7xx_DISCONNECT
	if {($CONFIG_SCSI != 0) && ($CONFIG_SCSI_NCR53C7xx != 0)} then {write_tristate $cfg $autocfg CONFIG_SCSI_NCR53C7xx_DISCONNECT $CONFIG_SCSI_NCR53C7xx_DISCONNECT [list $notmod] 2 }
	global CONFIG_SCSI_SYM53C8XX_2
	if {($CONFIG_SCSI != 0) && ($CONFIG_PCI == 1) && ($CONFIG_SCSI == 1 || $CONFIG_SCSI == 2 || $CONFIG_SCSI == 4)} then {write_tristate $cfg $autocfg CONFIG_SCSI_SYM53C8XX_2 $CONFIG_SCSI_SYM53C8XX_2 [list $CONFIG_SCSI] 2 }
	global CONFIG_SCSI_SYM53C8XX_DMA_ADDRESSING_MODE
	if {($CONFIG_SCSI != 0) && ($CONFIG_PCI == 1) && ($CONFIG_SCSI_SYM53C8XX_2 != 0)} then {write_int $cfg $autocfg CONFIG_SCSI_SYM53C8XX_DMA_ADDRESSING_MODE $CONFIG_SCSI_SYM53C8XX_DMA_ADDRESSING_MODE $notmod }
	global CONFIG_SCSI_SYM53C8XX_DEFAULT_TAGS
	if {($CONFIG_SCSI != 0) && ($CONFIG_PCI == 1) && ($CONFIG_SCSI_SYM53C8XX_2 != 0)} then {write_int $cfg $autocfg CONFIG_SCSI_SYM53C8XX_DEFAULT_TAGS $CONFIG_SCSI_SYM53C8XX_DEFAULT_TAGS $notmod }
	global CONFIG_SCSI_SYM53C8XX_MAX_TAGS
	if {($CONFIG_SCSI != 0) && ($CONFIG_PCI == 1) && ($CONFIG_SCSI_SYM53C8XX_2 != 0)} then {write_int $cfg $autocfg CONFIG_SCSI_SYM53C8XX_MAX_TAGS $CONFIG_SCSI_SYM53C8XX_MAX_TAGS $notmod }
	global CONFIG_SCSI_SYM53C8XX_IOMAPPED
	if {($CONFIG_SCSI != 0) && ($CONFIG_PCI == 1) && ($CONFIG_SCSI_SYM53C8XX_2 != 0)} then {write_tristate $cfg $autocfg CONFIG_SCSI_SYM53C8XX_IOMAPPED $CONFIG_SCSI_SYM53C8XX_IOMAPPED [list $notmod] 2 }
	global CONFIG_SCSI_NCR53C8XX
	if {($CONFIG_SCSI != 0) && ($CONFIG_PCI == 1 && $CONFIG_SCSI_SYM53C8XX_2 != 1) && ($CONFIG_SCSI == 1 || $CONFIG_SCSI == 2 || $CONFIG_SCSI == 4)} then {write_tristate $cfg $autocfg CONFIG_SCSI_NCR53C8XX $CONFIG_SCSI_NCR53C8XX [list $CONFIG_SCSI] 2 }
	global CONFIG_SCSI_SYM53C8XX
	if {($CONFIG_SCSI != 0) && ($CONFIG_PCI == 1 && $CONFIG_SCSI_SYM53C8XX_2 != 1) && ($CONFIG_SCSI == 1 || $CONFIG_SCSI == 2 || $CONFIG_SCSI == 4)} then {write_tristate $cfg $autocfg CONFIG_SCSI_SYM53C8XX $CONFIG_SCSI_SYM53C8XX [list $CONFIG_SCSI] 2 }
	global CONFIG_SCSI_NCR53C8XX_DEFAULT_TAGS
	if {($CONFIG_SCSI != 0) && ($CONFIG_PCI == 1 && $CONFIG_SCSI_SYM53C8XX_2 != 1) && ($CONFIG_SCSI_NCR53C8XX != 0 || $CONFIG_SCSI_SYM53C8XX != 0)} then {write_int $cfg $autocfg CONFIG_SCSI_NCR53C8XX_DEFAULT_TAGS $CONFIG_SCSI_NCR53C8XX_DEFAULT_TAGS $notmod }
	global CONFIG_SCSI_NCR53C8XX_MAX_TAGS
	if {($CONFIG_SCSI != 0) && ($CONFIG_PCI == 1 && $CONFIG_SCSI_SYM53C8XX_2 != 1) && ($CONFIG_SCSI_NCR53C8XX != 0 || $CONFIG_SCSI_SYM53C8XX != 0)} then {write_int $cfg $autocfg CONFIG_SCSI_NCR53C8XX_MAX_TAGS $CONFIG_SCSI_NCR53C8XX_MAX_TAGS $notmod }
	global CONFIG_SCSI_NCR53C8XX_SYNC
	if {($CONFIG_SCSI != 0) && ($CONFIG_PCI == 1 && $CONFIG_SCSI_SYM53C8XX_2 != 1) && ($CONFIG_SCSI_NCR53C8XX != 0 || $CONFIG_SCSI_SYM53C8XX != 0)} then {write_int $cfg $autocfg CONFIG_SCSI_NCR53C8XX_SYNC $CONFIG_SCSI_NCR53C8XX_SYNC $notmod }
	global CONFIG_SCSI_NCR53C8XX_PROFILE
	if {($CONFIG_SCSI != 0) && ($CONFIG_PCI == 1 && $CONFIG_SCSI_SYM53C8XX_2 != 1) && ($CONFIG_SCSI_NCR53C8XX != 0 || $CONFIG_SCSI_SYM53C8XX != 0)} then {write_tristate $cfg $autocfg CONFIG_SCSI_NCR53C8XX_PROFILE $CONFIG_SCSI_NCR53C8XX_PROFILE [list $notmod] 2 }
	global CONFIG_SCSI_NCR53C8XX_IOMAPPED
	if {($CONFIG_SCSI != 0) && ($CONFIG_PCI == 1 && $CONFIG_SCSI_SYM53C8XX_2 != 1) && ($CONFIG_SCSI_NCR53C8XX != 0 || $CONFIG_SCSI_SYM53C8XX != 0)} then {write_tristate $cfg $autocfg CONFIG_SCSI_NCR53C8XX_IOMAPPED $CONFIG_SCSI_NCR53C8XX_IOMAPPED [list $notmod] 2 }
	global CONFIG_SCSI_NCR53C8XX_PQS_PDS
	if {($CONFIG_SCSI != 0) && ($CONFIG_PCI == 1 && $CONFIG_SCSI_SYM53C8XX_2 != 1) && ($CONFIG_SCSI_NCR53C8XX != 0 || $CONFIG_SCSI_SYM53C8XX != 0) && ($CONFIG_SCSI_SYM53C8XX != 0)} then {write_tristate $cfg $autocfg CONFIG_SCSI_NCR53C8XX_PQS_PDS $CONFIG_SCSI_NCR53C8XX_PQS_PDS [list $notmod] 2 }
	global CONFIG_SCSI_NCR53C8XX_NO_DISCONNECT
	if {($CONFIG_SCSI != 0) && ($CONFIG_PCI == 1 && $CONFIG_SCSI_SYM53C8XX_2 != 1) && ($CONFIG_SCSI_NCR53C8XX != 0 || $CONFIG_SCSI_SYM53C8XX != 0) && ($CONFIG_SCSI_NCR53C8XX_DEFAULT_TAGS == "0")} then {write_tristate $cfg $autocfg CONFIG_SCSI_NCR53C8XX_NO_DISCONNECT $CONFIG_SCSI_NCR53C8XX_NO_DISCONNECT [list $notmod] 2 }
	global CONFIG_SCSI_NCR53C8XX_SYMBIOS_COMPAT
	if {($CONFIG_SCSI != 0) && ($CONFIG_PCI == 1 && $CONFIG_SCSI_SYM53C8XX_2 != 1) && ($CONFIG_SCSI_NCR53C8XX != 0 || $CONFIG_SCSI_SYM53C8XX != 0) && ($CONFIG_EXPERIMENTAL == 1)} then {write_tristate $cfg $autocfg CONFIG_SCSI_NCR53C8XX_SYMBIOS_COMPAT $CONFIG_SCSI_NCR53C8XX_SYMBIOS_COMPAT [list $notmod] 2 }
	global CONFIG_SCSI_MCA_53C9X
	if {($CONFIG_SCSI != 0) && ($CONFIG_MCA == 1) && ($CONFIG_SCSI == 1 || $CONFIG_SCSI == 2 || $CONFIG_SCSI == 4)} then {write_tristate $cfg $autocfg CONFIG_SCSI_MCA_53C9X $CONFIG_SCSI_MCA_53C9X [list $CONFIG_SCSI] 2 }
	global CONFIG_SCSI_PAS16
	if {($CONFIG_SCSI != 0) && ($CONFIG_SCSI == 1 || $CONFIG_SCSI == 2 || $CONFIG_SCSI == 4)} then {write_tristate $cfg $autocfg CONFIG_SCSI_PAS16 $CONFIG_SCSI_PAS16 [list $CONFIG_SCSI] 2 }
	global CONFIG_SCSI_PCI2000
	if {($CONFIG_SCSI != 0) && ($CONFIG_SCSI == 1 || $CONFIG_SCSI == 2 || $CONFIG_SCSI == 4)} then {write_tristate $cfg $autocfg CONFIG_SCSI_PCI2000 $CONFIG_SCSI_PCI2000 [list $CONFIG_SCSI] 2 }
	global CONFIG_SCSI_PCI2220I
	if {($CONFIG_SCSI != 0) && ($CONFIG_SCSI == 1 || $CONFIG_SCSI == 2 || $CONFIG_SCSI == 4)} then {write_tristate $cfg $autocfg CONFIG_SCSI_PCI2220I $CONFIG_SCSI_PCI2220I [list $CONFIG_SCSI] 2 }
	global CONFIG_SCSI_PSI240I
	if {($CONFIG_SCSI != 0) && ($CONFIG_SCSI == 1 || $CONFIG_SCSI == 2 || $CONFIG_SCSI == 4)} then {write_tristate $cfg $autocfg CONFIG_SCSI_PSI240I $CONFIG_SCSI_PSI240I [list $CONFIG_SCSI] 2 }
	global CONFIG_SCSI_QLOGIC_FAS
	if {($CONFIG_SCSI != 0) && ($CONFIG_SCSI == 1 || $CONFIG_SCSI == 2 || $CONFIG_SCSI == 4)} then {write_tristate $cfg $autocfg CONFIG_SCSI_QLOGIC_FAS $CONFIG_SCSI_QLOGIC_FAS [list $CONFIG_SCSI] 2 }
	global CONFIG_SCSI_QLOGIC_ISP
	if {($CONFIG_SCSI != 0) && ($CONFIG_PCI == 1) && ($CONFIG_SCSI == 1 || $CONFIG_SCSI == 2 || $CONFIG_SCSI == 4)} then {write_tristate $cfg $autocfg CONFIG_SCSI_QLOGIC_ISP $CONFIG_SCSI_QLOGIC_ISP [list $CONFIG_SCSI] 2 }
	global CONFIG_SCSI_QLOGIC_FC
	if {($CONFIG_SCSI != 0) && ($CONFIG_PCI == 1) && ($CONFIG_SCSI == 1 || $CONFIG_SCSI == 2 || $CONFIG_SCSI == 4)} then {write_tristate $cfg $autocfg CONFIG_SCSI_QLOGIC_FC $CONFIG_SCSI_QLOGIC_FC [list $CONFIG_SCSI] 2 }
	global CONFIG_SCSI_QLOGIC_FC_FIRMWARE
	if {($CONFIG_SCSI != 0) && ($CONFIG_PCI == 1) && ($CONFIG_SCSI_QLOGIC_FC != 0)} then {write_tristate $cfg $autocfg CONFIG_SCSI_QLOGIC_FC_FIRMWARE $CONFIG_SCSI_QLOGIC_FC_FIRMWARE [list $notmod] 2 }
	global CONFIG_SCSI_QLOGIC_1280
	if {($CONFIG_SCSI != 0) && ($CONFIG_PCI == 1) && ($CONFIG_SCSI == 1 || $CONFIG_SCSI == 2 || $CONFIG_SCSI == 4)} then {write_tristate $cfg $autocfg CONFIG_SCSI_QLOGIC_1280 $CONFIG_SCSI_QLOGIC_1280 [list $CONFIG_SCSI] 2 }
	global CONFIG_SCSI_SEAGATE
	if {($CONFIG_SCSI != 0) && ($CONFIG_X86 == 1) && ($CONFIG_SCSI == 1 || $CONFIG_SCSI == 2 || $CONFIG_SCSI == 4)} then {write_tristate $cfg $autocfg CONFIG_SCSI_SEAGATE $CONFIG_SCSI_SEAGATE [list $CONFIG_SCSI] 2 }
	global CONFIG_SCSI_SIM710
	if {($CONFIG_SCSI != 0) && ($CONFIG_SCSI == 1 || $CONFIG_SCSI == 2 || $CONFIG_SCSI == 4)} then {write_tristate $cfg $autocfg CONFIG_SCSI_SIM710 $CONFIG_SCSI_SIM710 [list $CONFIG_SCSI] 2 }
	global CONFIG_SCSI_SYM53C416
	if {($CONFIG_SCSI != 0) && ($CONFIG_SCSI == 1 || $CONFIG_SCSI == 2 || $CONFIG_SCSI == 4)} then {write_tristate $cfg $autocfg CONFIG_SCSI_SYM53C416 $CONFIG_SCSI_SYM53C416 [list $CONFIG_SCSI] 2 }
	global CONFIG_SCSI_DC390T
	if {($CONFIG_SCSI != 0) && ($CONFIG_PCI == 1) && ($CONFIG_SCSI == 1 || $CONFIG_SCSI == 2 || $CONFIG_SCSI == 4)} then {write_tristate $cfg $autocfg CONFIG_SCSI_DC390T $CONFIG_SCSI_DC390T [list $CONFIG_SCSI] 2 }
	global CONFIG_SCSI_DC390T_NOGENSUPP
	if {($CONFIG_SCSI != 0) && ($CONFIG_PCI == 1) && ($CONFIG_SCSI_DC390T != 0)} then {write_tristate $cfg $autocfg CONFIG_SCSI_DC390T_NOGENSUPP $CONFIG_SCSI_DC390T_NOGENSUPP [list $notmod] 2 }
	global CONFIG_SCSI_T128
	if {($CONFIG_SCSI != 0) && ($CONFIG_SCSI == 1 || $CONFIG_SCSI == 2 || $CONFIG_SCSI == 4)} then {write_tristate $cfg $autocfg CONFIG_SCSI_T128 $CONFIG_SCSI_T128 [list $CONFIG_SCSI] 2 }
	global CONFIG_SCSI_U14_34F
	if {($CONFIG_SCSI != 0) && ($CONFIG_SCSI == 1 || $CONFIG_SCSI == 2 || $CONFIG_SCSI == 4)} then {write_tristate $cfg $autocfg CONFIG_SCSI_U14_34F $CONFIG_SCSI_U14_34F [list $CONFIG_SCSI] 2 }
	global CONFIG_SCSI_U14_34F_LINKED_COMMANDS
	if {($CONFIG_SCSI != 0) && ($CONFIG_SCSI_U14_34F != 0)} then {write_tristate $cfg $autocfg CONFIG_SCSI_U14_34F_LINKED_COMMANDS $CONFIG_SCSI_U14_34F_LINKED_COMMANDS [list $notmod] 2 }
	global CONFIG_SCSI_U14_34F_MAX_TAGS
	if {($CONFIG_SCSI != 0) && ($CONFIG_SCSI_U14_34F != 0)} then {write_int $cfg $autocfg CONFIG_SCSI_U14_34F_MAX_TAGS $CONFIG_SCSI_U14_34F_MAX_TAGS $notmod }
	global CONFIG_SCSI_ULTRASTOR
	if {($CONFIG_SCSI != 0) && ($CONFIG_X86 == 1) && ($CONFIG_SCSI == 1 || $CONFIG_SCSI == 2 || $CONFIG_SCSI == 4)} then {write_tristate $cfg $autocfg CONFIG_SCSI_ULTRASTOR $CONFIG_SCSI_ULTRASTOR [list $CONFIG_SCSI] 2 }
	global CONFIG_SCSI_DEBUG
	if {($CONFIG_SCSI != 0) && ($CONFIG_EXPERIMENTAL == 1) && ($CONFIG_SCSI == 1 || $CONFIG_SCSI == 2 || $CONFIG_SCSI == 4)} then {write_tristate $cfg $autocfg CONFIG_SCSI_DEBUG $CONFIG_SCSI_DEBUG [list $CONFIG_SCSI] 2 }
	if {($CONFIG_SCSI != 0) && ($CONFIG_HOTPLUG == 1 && $CONFIG_PCMCIA != 0)} then {write_comment $cfg $autocfg "PCMCIA SCSI adapter support"}
	global CONFIG_SCSI_PCMCIA
	if {($CONFIG_SCSI != 0) && ($CONFIG_HOTPLUG == 1 && $CONFIG_PCMCIA != 0)} then {write_tristate $cfg $autocfg CONFIG_SCSI_PCMCIA $CONFIG_SCSI_PCMCIA [list $notmod] 2 }
	global CONFIG_PCMCIA_AHA152X
	if {($CONFIG_SCSI != 0) && ($CONFIG_HOTPLUG == 1 && $CONFIG_PCMCIA != 0) && ($CONFIG_SCSI_PCMCIA == 1)} then {write_tristate $cfg $autocfg CONFIG_PCMCIA_AHA152X $CONFIG_PCMCIA_AHA152X [list $CONSTANT_M] 2 }
	global CONFIG_PCMCIA_FDOMAIN
	if {($CONFIG_SCSI != 0) && ($CONFIG_HOTPLUG == 1 && $CONFIG_PCMCIA != 0) && ($CONFIG_SCSI_PCMCIA == 1)} then {write_tristate $cfg $autocfg CONFIG_PCMCIA_FDOMAIN $CONFIG_PCMCIA_FDOMAIN [list $CONSTANT_M] 2 }
	global CONFIG_PCMCIA_NINJA_SCSI
	if {($CONFIG_SCSI != 0) && ($CONFIG_HOTPLUG == 1 && $CONFIG_PCMCIA != 0) && ($CONFIG_SCSI_PCMCIA == 1)} then {write_tristate $cfg $autocfg CONFIG_PCMCIA_NINJA_SCSI $CONFIG_PCMCIA_NINJA_SCSI [list $CONSTANT_M] 2 }
	global CONFIG_PCMCIA_QLOGIC
	if {($CONFIG_SCSI != 0) && ($CONFIG_HOTPLUG == 1 && $CONFIG_PCMCIA != 0) && ($CONFIG_SCSI_PCMCIA == 1)} then {write_tristate $cfg $autocfg CONFIG_PCMCIA_QLOGIC $CONFIG_PCMCIA_QLOGIC [list $CONSTANT_M] 2 }
	global CONFIG_PCMCIA_SCSICARD
	if {($CONFIG_SCSI != 0) && ($CONFIG_HOTPLUG == 1 && $CONFIG_PCMCIA != 0) && ($CONFIG_PCMCIA_QLOGIC == 1 || $CONFIG_PCMCIA_AHA152X == 1 || $CONFIG_PCMCIA_FDOMAIN == 1 || $CONFIG_PCMCIA_NINJA_SCSI == 1)} then {write_tristate $cfg $autocfg CONFIG_PCMCIA_SCSICARD $CONSTANT_Y [list $notmod] 2 }
	write_comment $cfg $autocfg "Fusion MPT device support"
	global CONFIG_FUSION
	if {($CONFIG_SCSI == 1 || $CONFIG_SCSI == 2 || $CONFIG_SCSI == 4) && ($CONFIG_BLK_DEV_SD == 1 || $CONFIG_BLK_DEV_SD == 2 || $CONFIG_BLK_DEV_SD == 4)} then {write_tristate $cfg $autocfg CONFIG_FUSION $CONFIG_FUSION [list $CONFIG_SCSI $CONFIG_BLK_DEV_SD] 2 }
	global CONFIG_FUSION_BOOT
	if {($CONFIG_FUSION == 1 || $CONFIG_FUSION == 2) && ($CONFIG_BLK_DEV_SD == 1 && $CONFIG_FUSION == 1)} then {write_tristate $cfg $autocfg CONFIG_FUSION_BOOT $CONSTANT_Y [list $notmod] 2 }
	if {($CONFIG_FUSION == 1 || $CONFIG_FUSION == 2) && ($CONFIG_BLK_DEV_SD != 1 || $CONFIG_FUSION != 1)} then {write_tristate $cfg $autocfg CONFIG_FUSION_BOOT $CONSTANT_N [list $notmod] 2 }
	global CONFIG_FUSION_ISENSE
	if {($CONFIG_FUSION == 1 || $CONFIG_FUSION == 2) && ($CONFIG_MODULES == 1) && ($CONFIG_FUSION == 1 || $CONFIG_FUSION == 2 || $CONFIG_FUSION == 4)} then {write_tristate $cfg $autocfg CONFIG_FUSION_ISENSE $CONFIG_FUSION_ISENSE [list $CONFIG_FUSION $CONSTANT_M] 2 }
	global CONFIG_FUSION_CTL
	if {($CONFIG_FUSION == 1 || $CONFIG_FUSION == 2) && ($CONFIG_MODULES == 1) && ($CONFIG_FUSION == 1 || $CONFIG_FUSION == 2 || $CONFIG_FUSION == 4)} then {write_tristate $cfg $autocfg CONFIG_FUSION_CTL $CONFIG_FUSION_CTL [list $CONFIG_FUSION $CONSTANT_M] 2 }
	global CONFIG_FUSION_LAN
	if {($CONFIG_FUSION == 1 || $CONFIG_FUSION == 2) && ($CONFIG_FUSION == 1 || $CONFIG_FUSION == 2 || $CONFIG_FUSION == 4) && ($CONFIG_NET == 1 || $CONFIG_NET == 2 || $CONFIG_NET == 4)} then {write_tristate $cfg $autocfg CONFIG_FUSION_LAN $CONFIG_FUSION_LAN [list $CONFIG_FUSION $CONFIG_NET] 2 }
	global CONFIG_NET_FC
	if {($CONFIG_FUSION == 1 || $CONFIG_FUSION == 2) && ($CONFIG_FUSION_LAN != 0)} then {write_tristate $cfg $autocfg CONFIG_NET_FC $CONSTANT_Y [list $notmod] 2 }
	if {($CONFIG_FUSION != 1 && $CONFIG_FUSION != 2)} then {write_tristate $cfg $autocfg CONFIG_FUSION_BOOT $CONSTANT_N [list $notmod] 2 }
	if {($CONFIG_FUSION != 1 && $CONFIG_FUSION != 2)} then {write_tristate $cfg $autocfg CONFIG_FUSION_ISENSE $CONSTANT_N [list $notmod] 2 }
	if {($CONFIG_FUSION != 1 && $CONFIG_FUSION != 2)} then {write_tristate $cfg $autocfg CONFIG_FUSION_CTL $CONSTANT_N [list $notmod] 2 }
	if {($CONFIG_FUSION != 1 && $CONFIG_FUSION != 2)} then {write_tristate $cfg $autocfg CONFIG_FUSION_LAN $CONSTANT_N [list $notmod] 2 }
	if {($CONFIG_PCI == 1 && $CONFIG_EXPERIMENTAL == 1)} then {write_comment $cfg $autocfg "IEEE 1394 (FireWire) support (EXPERIMENTAL)"}
	global CONFIG_IEEE1394
	if {($CONFIG_PCI == 1 && $CONFIG_EXPERIMENTAL == 1) && ($CONFIG_PCI == 1 || $CONFIG_PCI == 2 || $CONFIG_PCI == 4)} then {write_tristate $cfg $autocfg CONFIG_IEEE1394 $CONFIG_IEEE1394 [list $CONFIG_PCI] 2 }
	if {($CONFIG_PCI == 1 && $CONFIG_EXPERIMENTAL == 1) && ($CONFIG_IEEE1394 != 0)} then {write_comment $cfg $autocfg "Device Drivers"}
	global CONFIG_IEEE1394_PCILYNX
	if {($CONFIG_PCI == 1 && $CONFIG_EXPERIMENTAL == 1) && ($CONFIG_IEEE1394 != 0) && ($CONFIG_IEEE1394 == 1 || $CONFIG_IEEE1394 == 2 || $CONFIG_IEEE1394 == 4)} then {write_tristate $cfg $autocfg CONFIG_IEEE1394_PCILYNX $CONFIG_IEEE1394_PCILYNX [list $CONFIG_IEEE1394] 2 }
	global CONFIG_IEEE1394_PCILYNX_LOCALRAM
	if {($CONFIG_PCI == 1 && $CONFIG_EXPERIMENTAL == 1) && ($CONFIG_IEEE1394 != 0) && ($CONFIG_IEEE1394_PCILYNX != 0)} then {write_tristate $cfg $autocfg CONFIG_IEEE1394_PCILYNX_LOCALRAM $CONFIG_IEEE1394_PCILYNX_LOCALRAM [list $notmod] 2 }
	global CONFIG_IEEE1394_PCILYNX_PORTS
	if {($CONFIG_PCI == 1 && $CONFIG_EXPERIMENTAL == 1) && ($CONFIG_IEEE1394 != 0) && ($CONFIG_IEEE1394_PCILYNX != 0)} then {write_tristate $cfg $autocfg CONFIG_IEEE1394_PCILYNX_PORTS $CONFIG_IEEE1394_PCILYNX_PORTS [list $notmod] 2 }
	global CONFIG_IEEE1394_OHCI1394
	if {($CONFIG_PCI == 1 && $CONFIG_EXPERIMENTAL == 1) && ($CONFIG_IEEE1394 != 0) && ($CONFIG_IEEE1394 == 1 || $CONFIG_IEEE1394 == 2 || $CONFIG_IEEE1394 == 4)} then {write_tristate $cfg $autocfg CONFIG_IEEE1394_OHCI1394 $CONFIG_IEEE1394_OHCI1394 [list $CONFIG_IEEE1394] 2 }
	if {($CONFIG_PCI == 1 && $CONFIG_EXPERIMENTAL == 1) && ($CONFIG_IEEE1394 != 0)} then {write_comment $cfg $autocfg "Protocol Drivers"}
	global CONFIG_IEEE1394_VIDEO1394
	if {($CONFIG_PCI == 1 && $CONFIG_EXPERIMENTAL == 1) && ($CONFIG_IEEE1394 != 0) && ($CONFIG_IEEE1394_OHCI1394 == 1 || $CONFIG_IEEE1394_OHCI1394 == 2 || $CONFIG_IEEE1394_OHCI1394 == 4)} then {write_tristate $cfg $autocfg CONFIG_IEEE1394_VIDEO1394 $CONFIG_IEEE1394_VIDEO1394 [list $CONFIG_IEEE1394_OHCI1394] 2 }
	global CONFIG_IEEE1394_SBP2
	if {($CONFIG_PCI == 1 && $CONFIG_EXPERIMENTAL == 1) && ($CONFIG_IEEE1394 != 0) && ($CONFIG_SCSI == 1 || $CONFIG_SCSI == 2 || $CONFIG_SCSI == 4) && ($CONFIG_IEEE1394 == 1 || $CONFIG_IEEE1394 == 2 || $CONFIG_IEEE1394 == 4)} then {write_tristate $cfg $autocfg CONFIG_IEEE1394_SBP2 $CONFIG_IEEE1394_SBP2 [list $CONFIG_SCSI $CONFIG_IEEE1394] 2 }
	global CONFIG_IEEE1394_ETH1394
	if {($CONFIG_PCI == 1 && $CONFIG_EXPERIMENTAL == 1) && ($CONFIG_IEEE1394 != 0) && ($CONFIG_IEEE1394 == 1 || $CONFIG_IEEE1394 == 2 || $CONFIG_IEEE1394 == 4)} then {write_tristate $cfg $autocfg CONFIG_IEEE1394_ETH1394 $CONFIG_IEEE1394_ETH1394 [list $CONFIG_IEEE1394] 2 }
	global CONFIG_IEEE1394_DV1394
	if {($CONFIG_PCI == 1 && $CONFIG_EXPERIMENTAL == 1) && ($CONFIG_IEEE1394 != 0) && ($CONFIG_IEEE1394_OHCI1394 == 1 || $CONFIG_IEEE1394_OHCI1394 == 2 || $CONFIG_IEEE1394_OHCI1394 == 4)} then {write_tristate $cfg $autocfg CONFIG_IEEE1394_DV1394 $CONFIG_IEEE1394_DV1394 [list $CONFIG_IEEE1394_OHCI1394] 2 }
	global CONFIG_IEEE1394_RAWIO
	if {($CONFIG_PCI == 1 && $CONFIG_EXPERIMENTAL == 1) && ($CONFIG_IEEE1394 != 0) && ($CONFIG_IEEE1394 == 1 || $CONFIG_IEEE1394 == 2 || $CONFIG_IEEE1394 == 4)} then {write_tristate $cfg $autocfg CONFIG_IEEE1394_RAWIO $CONFIG_IEEE1394_RAWIO [list $CONFIG_IEEE1394] 2 }
	global CONFIG_IEEE1394_CMP
	if {($CONFIG_PCI == 1 && $CONFIG_EXPERIMENTAL == 1) && ($CONFIG_IEEE1394 != 0) && ($CONFIG_IEEE1394 == 1 || $CONFIG_IEEE1394 == 2 || $CONFIG_IEEE1394 == 4)} then {write_tristate $cfg $autocfg CONFIG_IEEE1394_CMP $CONFIG_IEEE1394_CMP [list $CONFIG_IEEE1394] 2 }
	global CONFIG_IEEE1394_AMDTP
	if {($CONFIG_PCI == 1 && $CONFIG_EXPERIMENTAL == 1) && ($CONFIG_IEEE1394 != 0) && ($CONFIG_IEEE1394_PCILYNX != 0) && ($CONFIG_IEEE1394_OHCI1394 == 1 || $CONFIG_IEEE1394_OHCI1394 == 2 || $CONFIG_IEEE1394_OHCI1394 == 4) && ($CONFIG_IEEE1394_CMP == 1 || $CONFIG_IEEE1394_CMP == 2 || $CONFIG_IEEE1394_CMP == 4)} then {write_tristate $cfg $autocfg CONFIG_IEEE1394_AMDTP $CONFIG_IEEE1394_AMDTP [list $CONFIG_IEEE1394_OHCI1394 $CONFIG_IEEE1394_CMP] 2 }
	global CONFIG_IEEE1394_VERBOSEDEBUG
	if {($CONFIG_PCI == 1 && $CONFIG_EXPERIMENTAL == 1) && ($CONFIG_IEEE1394 != 0)} then {write_tristate $cfg $autocfg CONFIG_IEEE1394_VERBOSEDEBUG $CONFIG_IEEE1394_VERBOSEDEBUG [list $notmod] 2 }
	write_comment $cfg $autocfg "I2O device support"
	global CONFIG_I2O
	write_tristate $cfg $autocfg CONFIG_I2O $CONFIG_I2O [list $notmod] 2
	global CONFIG_I2O_PCI
	if {($CONFIG_PCI == 1) && ($CONFIG_I2O == 1 || $CONFIG_I2O == 2 || $CONFIG_I2O == 4)} then {write_tristate $cfg $autocfg CONFIG_I2O_PCI $CONFIG_I2O_PCI [list $CONFIG_I2O] 2 }
	global CONFIG_I2O_BLOCK
	if {($CONFIG_I2O == 1 || $CONFIG_I2O == 2 || $CONFIG_I2O == 4)} then {write_tristate $cfg $autocfg CONFIG_I2O_BLOCK $CONFIG_I2O_BLOCK [list $CONFIG_I2O] 2 }
	global CONFIG_I2O_LAN
	if {($CONFIG_NET == 1) && ($CONFIG_I2O == 1 || $CONFIG_I2O == 2 || $CONFIG_I2O == 4)} then {write_tristate $cfg $autocfg CONFIG_I2O_LAN $CONFIG_I2O_LAN [list $CONFIG_I2O] 2 }
	global CONFIG_I2O_SCSI
	if {($CONFIG_I2O == 1 || $CONFIG_I2O == 2 || $CONFIG_I2O == 4) && ($CONFIG_SCSI == 1 || $CONFIG_SCSI == 2 || $CONFIG_SCSI == 4)} then {write_tristate $cfg $autocfg CONFIG_I2O_SCSI $CONFIG_I2O_SCSI [list $CONFIG_I2O $CONFIG_SCSI] 2 }
	global CONFIG_I2O_PROC
	if {($CONFIG_I2O == 1 || $CONFIG_I2O == 2 || $CONFIG_I2O == 4)} then {write_tristate $cfg $autocfg CONFIG_I2O_PROC $CONFIG_I2O_PROC [list $CONFIG_I2O] 2 }
	if {($CONFIG_NET == 1)} then {write_comment $cfg $autocfg "Network device support"}
	global CONFIG_NETDEVICES
	if {($CONFIG_NET == 1)} then {write_tristate $cfg $autocfg CONFIG_NETDEVICES $CONFIG_NETDEVICES [list $notmod] 2 }
	if {($CONFIG_NET == 1) && ($CONFIG_NETDEVICES == 1)} then {write_comment $cfg $autocfg "ARCnet devices"}
	global CONFIG_ARCNET
	if {($CONFIG_NET == 1) && ($CONFIG_NETDEVICES == 1)} then {write_tristate $cfg $autocfg CONFIG_ARCNET $CONFIG_ARCNET [list $notmod] 2 }
	global CONFIG_ARCNET_1201
	if {($CONFIG_NET == 1) && ($CONFIG_NETDEVICES == 1) && ($CONFIG_ARCNET != 0) && ($CONFIG_ARCNET == 1 || $CONFIG_ARCNET == 2 || $CONFIG_ARCNET == 4)} then {write_tristate $cfg $autocfg CONFIG_ARCNET_1201 $CONFIG_ARCNET_1201 [list $CONFIG_ARCNET] 2 }
	global CONFIG_ARCNET_1051
	if {($CONFIG_NET == 1) && ($CONFIG_NETDEVICES == 1) && ($CONFIG_ARCNET != 0) && ($CONFIG_ARCNET == 1 || $CONFIG_ARCNET == 2 || $CONFIG_ARCNET == 4)} then {write_tristate $cfg $autocfg CONFIG_ARCNET_1051 $CONFIG_ARCNET_1051 [list $CONFIG_ARCNET] 2 }
	global CONFIG_ARCNET_RAW
	if {($CONFIG_NET == 1) && ($CONFIG_NETDEVICES == 1) && ($CONFIG_ARCNET != 0) && ($CONFIG_ARCNET == 1 || $CONFIG_ARCNET == 2 || $CONFIG_ARCNET == 4)} then {write_tristate $cfg $autocfg CONFIG_ARCNET_RAW $CONFIG_ARCNET_RAW [list $CONFIG_ARCNET] 2 }
	global CONFIG_ARCNET_COM90xx
	if {($CONFIG_NET == 1) && ($CONFIG_NETDEVICES == 1) && ($CONFIG_ARCNET != 0) && ($CONFIG_ARCNET == 1 || $CONFIG_ARCNET == 2 || $CONFIG_ARCNET == 4)} then {write_tristate $cfg $autocfg CONFIG_ARCNET_COM90xx $CONFIG_ARCNET_COM90xx [list $CONFIG_ARCNET] 2 }
	global CONFIG_ARCNET_COM90xxIO
	if {($CONFIG_NET == 1) && ($CONFIG_NETDEVICES == 1) && ($CONFIG_ARCNET != 0) && ($CONFIG_ARCNET == 1 || $CONFIG_ARCNET == 2 || $CONFIG_ARCNET == 4)} then {write_tristate $cfg $autocfg CONFIG_ARCNET_COM90xxIO $CONFIG_ARCNET_COM90xxIO [list $CONFIG_ARCNET] 2 }
	global CONFIG_ARCNET_RIM_I
	if {($CONFIG_NET == 1) && ($CONFIG_NETDEVICES == 1) && ($CONFIG_ARCNET != 0) && ($CONFIG_ARCNET == 1 || $CONFIG_ARCNET == 2 || $CONFIG_ARCNET == 4)} then {write_tristate $cfg $autocfg CONFIG_ARCNET_RIM_I $CONFIG_ARCNET_RIM_I [list $CONFIG_ARCNET] 2 }
	global CONFIG_ARCNET_COM20020
	if {($CONFIG_NET == 1) && ($CONFIG_NETDEVICES == 1) && ($CONFIG_ARCNET != 0) && ($CONFIG_ARCNET == 1 || $CONFIG_ARCNET == 2 || $CONFIG_ARCNET == 4)} then {write_tristate $cfg $autocfg CONFIG_ARCNET_COM20020 $CONFIG_ARCNET_COM20020 [list $CONFIG_ARCNET] 2 }
	global CONFIG_ARCNET_COM20020_ISA
	if {($CONFIG_NET == 1) && ($CONFIG_NETDEVICES == 1) && ($CONFIG_ARCNET != 0) && ($CONFIG_ARCNET_COM20020 == 1 || $CONFIG_ARCNET_COM20020 == 2 || $CONFIG_ARCNET_COM20020 == 4) && ($CONFIG_ISA == 1 || $CONFIG_ISA == 2 || $CONFIG_ISA == 4)} then {write_tristate $cfg $autocfg CONFIG_ARCNET_COM20020_ISA $CONFIG_ARCNET_COM20020_ISA [list $CONFIG_ARCNET_COM20020 $CONFIG_ISA] 2 }
	global CONFIG_ARCNET_COM20020_PCI
	if {($CONFIG_NET == 1) && ($CONFIG_NETDEVICES == 1) && ($CONFIG_ARCNET != 0) && ($CONFIG_ARCNET_COM20020 == 1 || $CONFIG_ARCNET_COM20020 == 2 || $CONFIG_ARCNET_COM20020 == 4) && ($CONFIG_PCI == 1 || $CONFIG_PCI == 2 || $CONFIG_PCI == 4)} then {write_tristate $cfg $autocfg CONFIG_ARCNET_COM20020_PCI $CONFIG_ARCNET_COM20020_PCI [list $CONFIG_ARCNET_COM20020 $CONFIG_PCI] 2 }
	if {($CONFIG_NET == 1) && ($CONFIG_NETDEVICES == 1) && ($CONFIG_ATALK != 0)} then {write_comment $cfg $autocfg "Appletalk devices"}
	global CONFIG_APPLETALK
	if {($CONFIG_NET == 1) && ($CONFIG_NETDEVICES == 1) && ($CONFIG_ATALK != 0)} then {write_tristate $cfg $autocfg CONFIG_APPLETALK $CONFIG_APPLETALK [list $notmod] 2 }
	global CONFIG_LTPC
	global CONFIG_DEV_APPLETALK
	if {($CONFIG_NET == 1) && ($CONFIG_NETDEVICES == 1) && ($CONFIG_ATALK != 0) && ($CONFIG_DEV_APPLETALK == 1 || $CONFIG_DEV_APPLETALK == 2 || $CONFIG_DEV_APPLETALK == 4)} then {write_tristate $cfg $autocfg CONFIG_LTPC $CONFIG_LTPC [list $CONFIG_DEV_APPLETALK] 2 }
	global CONFIG_COPS
	if {($CONFIG_NET == 1) && ($CONFIG_NETDEVICES == 1) && ($CONFIG_ATALK != 0) && ($CONFIG_DEV_APPLETALK == 1 || $CONFIG_DEV_APPLETALK == 2 || $CONFIG_DEV_APPLETALK == 4)} then {write_tristate $cfg $autocfg CONFIG_COPS $CONFIG_COPS [list $CONFIG_DEV_APPLETALK] 2 }
	global CONFIG_COPS_DAYNA
	if {($CONFIG_NET == 1) && ($CONFIG_NETDEVICES == 1) && ($CONFIG_ATALK != 0) && ($CONFIG_COPS != 0)} then {write_tristate $cfg $autocfg CONFIG_COPS_DAYNA $CONFIG_COPS_DAYNA [list $notmod] 2 }
	global CONFIG_COPS_TANGENT
	if {($CONFIG_NET == 1) && ($CONFIG_NETDEVICES == 1) && ($CONFIG_ATALK != 0) && ($CONFIG_COPS != 0)} then {write_tristate $cfg $autocfg CONFIG_COPS_TANGENT $CONFIG_COPS_TANGENT [list $notmod] 2 }
	global CONFIG_IPDDP
	if {($CONFIG_NET == 1) && ($CONFIG_NETDEVICES == 1) && ($CONFIG_ATALK != 0) && ($CONFIG_DEV_APPLETALK == 1 || $CONFIG_DEV_APPLETALK == 2 || $CONFIG_DEV_APPLETALK == 4)} then {write_tristate $cfg $autocfg CONFIG_IPDDP $CONFIG_IPDDP [list $CONFIG_DEV_APPLETALK] 2 }
	global CONFIG_IPDDP_ENCAP
	if {($CONFIG_NET == 1) && ($CONFIG_NETDEVICES == 1) && ($CONFIG_ATALK != 0) && ($CONFIG_IPDDP != 0)} then {write_tristate $cfg $autocfg CONFIG_IPDDP_ENCAP $CONFIG_IPDDP_ENCAP [list $notmod] 2 }
	global CONFIG_IPDDP_DECAP
	if {($CONFIG_NET == 1) && ($CONFIG_NETDEVICES == 1) && ($CONFIG_ATALK != 0) && ($CONFIG_IPDDP != 0)} then {write_tristate $cfg $autocfg CONFIG_IPDDP_DECAP $CONFIG_IPDDP_DECAP [list $notmod] 2 }
	global CONFIG_DUMMY
	if {($CONFIG_NET == 1) && ($CONFIG_NETDEVICES == 1)} then {write_tristate $cfg $autocfg CONFIG_DUMMY $CONFIG_DUMMY [list $notmod] 2 }
	global CONFIG_BONDING
	if {($CONFIG_NET == 1) && ($CONFIG_NETDEVICES == 1)} then {write_tristate $cfg $autocfg CONFIG_BONDING $CONFIG_BONDING [list $notmod] 2 }
	global CONFIG_EQUALIZER
	if {($CONFIG_NET == 1) && ($CONFIG_NETDEVICES == 1)} then {write_tristate $cfg $autocfg CONFIG_EQUALIZER $CONFIG_EQUALIZER [list $notmod] 2 }
	global CONFIG_TUN
	if {($CONFIG_NET == 1) && ($CONFIG_NETDEVICES == 1)} then {write_tristate $cfg $autocfg CONFIG_TUN $CONFIG_TUN [list $notmod] 2 }
	global CONFIG_NET_RANDOM
	if {($CONFIG_NET == 1) && ($CONFIG_NETDEVICES == 1)} then {write_tristate $cfg $autocfg CONFIG_NET_RANDOM $CONFIG_NET_RANDOM [list $notmod] 2 }
	global CONFIG_ETHERTAP
	if {($CONFIG_NET == 1) && ($CONFIG_NETDEVICES == 1) && ($CONFIG_EXPERIMENTAL == 1)} then {write_tristate $cfg $autocfg CONFIG_ETHERTAP $CONFIG_ETHERTAP [list $notmod] 2 }
	global CONFIG_NET_SB1000
	if {($CONFIG_NET == 1) && ($CONFIG_NETDEVICES == 1) && ($CONFIG_ISAPNP == 1 || $CONFIG_ISAPNP == 2) && ($CONFIG_ISAPNP == 1 || $CONFIG_ISAPNP == 2 || $CONFIG_ISAPNP == 4)} then {write_tristate $cfg $autocfg CONFIG_NET_SB1000 $CONFIG_NET_SB1000 [list $CONFIG_ISAPNP] 2 }
	if {($CONFIG_NET == 1) && ($CONFIG_NETDEVICES == 1)} then {write_comment $cfg $autocfg "Ethernet (10 or 100Mbit)"}
	global CONFIG_NET_ETHERNET
	if {($CONFIG_NET == 1) && ($CONFIG_NETDEVICES == 1)} then {write_tristate $cfg $autocfg CONFIG_NET_ETHERNET $CONFIG_NET_ETHERNET [list $notmod] 2 }
	global CONFIG_SUNLANCE
	if {($CONFIG_NET == 1) && ($CONFIG_NETDEVICES == 1) && ($CONFIG_NET_ETHERNET == 1) && ($CONFIG_SBUS == 1 || $CONFIG_SBUS == 2 || $CONFIG_SBUS == 4)} then {write_tristate $cfg $autocfg CONFIG_SUNLANCE $CONFIG_SUNLANCE [list $CONFIG_SBUS] 2 }
	global CONFIG_HAPPYMEAL
	if {($CONFIG_NET == 1) && ($CONFIG_NETDEVICES == 1) && ($CONFIG_NET_ETHERNET == 1) && ($CONFIG_SBUS == 1 || $CONFIG_PCI == 1)} then {write_tristate $cfg $autocfg CONFIG_HAPPYMEAL $CONFIG_HAPPYMEAL [list $notmod] 2 }
	global CONFIG_SUNBMAC
	if {($CONFIG_NET == 1) && ($CONFIG_NETDEVICES == 1) && ($CONFIG_NET_ETHERNET == 1) && ($CONFIG_SBUS == 1 || $CONFIG_SBUS == 2 || $CONFIG_SBUS == 4) && ($CONFIG_EXPERIMENTAL == 1 || $CONFIG_EXPERIMENTAL == 2 || $CONFIG_EXPERIMENTAL == 4)} then {write_tristate $cfg $autocfg CONFIG_SUNBMAC $CONFIG_SUNBMAC [list $CONFIG_SBUS $CONFIG_EXPERIMENTAL] 2 }
	global CONFIG_SUNQE
	if {($CONFIG_NET == 1) && ($CONFIG_NETDEVICES == 1) && ($CONFIG_NET_ETHERNET == 1) && ($CONFIG_SBUS == 1 || $CONFIG_SBUS == 2 || $CONFIG_SBUS == 4)} then {write_tristate $cfg $autocfg CONFIG_SUNQE $CONFIG_SUNQE [list $CONFIG_SBUS] 2 }
	global CONFIG_SUNGEM
	if {($CONFIG_NET == 1) && ($CONFIG_NETDEVICES == 1) && ($CONFIG_NET_ETHERNET == 1) && ($CONFIG_PCI == 1 || $CONFIG_PCI == 2 || $CONFIG_PCI == 4)} then {write_tristate $cfg $autocfg CONFIG_SUNGEM $CONFIG_SUNGEM [list $CONFIG_PCI] 2 }
	global CONFIG_NET_VENDOR_3COM
	if {($CONFIG_NET == 1) && ($CONFIG_NETDEVICES == 1) && ($CONFIG_NET_ETHERNET == 1)} then {write_tristate $cfg $autocfg CONFIG_NET_VENDOR_3COM $CONFIG_NET_VENDOR_3COM [list $notmod] 2 }
	global CONFIG_EL1
	if {($CONFIG_NET == 1) && ($CONFIG_NETDEVICES == 1) && ($CONFIG_NET_ETHERNET == 1) && ($CONFIG_NET_r		setox			# FP0 IS EXP(Y)
	add.l		&0xc,%sp		# clear Y from stack
	mov.l		(%sp)+,%d0
	mov.l		SGN(%a6),%d1
	fadd.s		&0x3F800000,%fp0	# EXP(Y)+1

	eor.l		&0xC0000000,%d1		# -SIGN(X)*2
	fmov.s		%d1,%fp1		# -SIGN(X)*2 IN SGL FMT
	fdiv.x		%fp0,%fp1		# -SIGN(X)2 / [EXP(Y)+1 ]

	mov.l		SGN(%a6),%d1
	or.l		&0x3F800000,%d1		# SGN
	fmov.s		%d1,%fp0		# SGN IN SGL FMT

	fmov.l		%d0,%fpcr		# restore users round prec,mode
	mov.b		&FADD_OP,%d1		# last inst is ADD
	fadd.x		%fp1,%fp0
	bra		t_inx2

TANHSM:
	fmov.l		%d0,%fpcr		# restore users round prec,mode
	mov.b		&FMOV_OP,%d1		# last inst is MOVE
	fmov.x		X(%a6),%fp0		# last inst - possible exception set
	bra		t_catch

#---RETURN SGN(X) - SGN(X)EPS
TANHHUGE:
	mov.l		X(%a6),%d1
	and.l		&0x80000000,%d1
	or.l		&0x3F800000,%d1
	fmov.s		%d1,%fp0
	and.l		&0x80000000,%d1
	eor.l		&0x80800000,%d1		# -SIGN(X)*EPS

	fmov.l		%d0,%fpcr		# restore users round prec,mode
	fadd.s		%d1,%fp0
	bra		t_inx2

	global		stanhd
#--TANH(X) = X FOR DENORMALIZED X
stanhd:
	bra		t_extdnrm

#########################################################################
# slogn():    computes the natural logarithm of a normalized input	#
# slognd():   computes the natural logarithm of a denormalized input	#
# slognp1():  computes the log(1+X) of a normalized input		#
# slognp1d(): computes the log(1+X) of a denormalized input		#
#									#
# INPUT ***************************************************************	#
#	a0 = pointer to extended precision input			#
#	d0 = round precision,mode					#
#									#
# OUTPUT **************************************************************	#
#	fp0 = log(X) or log(1+X)					#
#									#
# ACCURACY and MONOTONICITY *******************************************	#
#	The returned result is within 2 ulps in 64 significant bit, 	#
#	i.e. within 0.5001 ulp to 53 bits if the result is subsequently	#
#	rounded to double precision. The result is provably monotonic	#
#	in double precision.						#
#									#
# ALGORITHM ***********************************************************	#
#	LOGN:								#
#	Step 1. If |X-1| < 1/16, approximate log(X) by an odd 		#
#		polynomial in u, where u = 2(X-1)/(X+1). Otherwise, 	#
#		move on to Step 2.					#
#									#
#	Step 2. X = 2**k * Y where 1 <= Y < 2. Define F to be the first	#
#		seven significant bits of Y plus 2**(-7), i.e. 		#
#		F = 1.xxxxxx1 in base 2 where the six "x" match those 	#
#		of Y. Note that |Y-F| <= 2**(-7).			#
#									#
#	Step 3. Define u = (Y-F)/F. Approximate log(1+u) by a 		#
#		polynomial in u, log(1+u) = poly.			#
#									#
#	Step 4. Reconstruct 						#
#		log(X) = log( 2**k * Y ) = k*log(2) + log(F) + log(1+u)	#
#		by k*log(2) + (log(F) + poly). The values of log(F) are	#
#		calculated beforehand and stored in the program.	#
#									#
#	lognp1:								#
#	Step 1: If |X| < 1/16, approximate log(1+X) by an odd 		#
#		polynomial in u where u = 2X/(2+X). Otherwise, move on	#
#		to Step 2.						#
#									#
#	Step 2: Let 1+X = 2**k * Y, where 1 <= Y < 2. Define F as done	#
#		in Step 2 of the algorithm for LOGN and compute 	#
#		log(1+X) as k*log(2) + log(F) + poly where poly 	#
#		approximates log(1+u), u = (Y-F)/F. 			#
#									#
#	Implementation Notes:						#
#	Note 1. There are 64 different possible values for F, thus 64 	#
#		log(F)'s need to be tabulated. Moreover, the values of	#
#		1/F are also tabulated so that the division in (Y-F)/F	#
#		can be performed by a multiplication.			#
#									#
#	Note 2. In Step 2 of lognp1, in order to preserved accuracy, 	#
#		the value Y-F has to be calculated carefully when 	#
#		1/2 <= X < 3/2. 					#
#									#
#	Note 3. To fully exploit the pipeline, polynomials are usually 	#
#		separated into two parts evaluated independently before	#
#		being added up.						#
#									#
#########################################################################
LOGOF2:
	long		0x3FFE0000,0xB17217F7,0xD1CF79AC,0x00000000

one:
	long		0x3F800000
zero:
	long		0x00000000
infty:
	long		0x7F800000
negone:
	long		0xBF800000

LOGA6:
	long		0x3FC2499A,0xB5E4040B
LOGA5:
	long		0xBFC555B5,0x848CB7DB

LOGA4:
	long		0x3FC99999,0x987D8730
LOGA3:
	long		0xBFCFFFFF,0xFF6F7E97

LOGA2:
	long		0x3FD55555,0x555555A4
LOGA1:
	long		0xBFE00000,0x00000008

LOGB5:
	long		0x3F175496,0xADD7DAD6
LOGB4:
	long		0x3F3C71C2,0xFE80C7E0

LOGB3:
	long		0x3F624924,0x928BCCFF
LOGB2:
	long		0x3F899999,0x999995EC

LOGB1:
	long		0x3FB55555,0x55555555
TWO:
	long		0x40000000,0x00000000

LTHOLD:
	long		0x3f990000,0x80000000,0x00000000,0x00000000

LOGTBL:
	long		0x3FFE0000,0xFE03F80F,0xE03F80FE,0x00000000
	long		0x3FF70000,0xFF015358,0x833C47E2,0x00000000
	long		0x3FFE0000,0xFA232CF2,0x52138AC0,0x00000000
	long		0x3FF90000,0xBDC8D83E,0xAD88D549,0x00000000
	long		0x3FFE0000,0xF6603D98,0x0F6603DA,0x00000000
	long		0x3FFA0000,0x9CF43DCF,0xF5EAFD48,0x00000000
	long		0x3FFE0000,0xF2B9D648,0x0F2B9D65,0x00000000
	long		0x3FFA0000,0xDA16EB88,0xCB8DF614,0x00000000
	long		0x3FFE0000,0xEF2EB71F,0xC4345238,0x00000000
	long		0x3FFB0000,0x8B29B775,0x1BD70743,0x00000000
	long		0x3FFE0000,0xEBBDB2A5,0xC1619C8C,0x00000000
	long		0x3FFB0000,0xA8D839F8,0x30C1FB49,0x00000000
	long		0x3FFE0000,0xE865AC7B,0x7603A197,0x00000000
	long		0x3FFB0000,0xC61A2EB1,0x8CD907AD,0x00000000
	long		0x3FFE0000,0xE525982A,0xF70C880E,0x00000000
	long		0x3FFB0000,0xE2F2A47A,0xDE3A18AF,0x00000000
	long		0x3FFE0000,0xE1FC780E,0x1FC780E2,0x00000000
	long		0x3FFB0000,0xFF64898E,0xDF55D551,0x00000000
	long		0x3FFE0000,0xDEE95C4C,0xA037BA57,0x00000000
	long		0x3FFC0000,0x8DB956A9,0x7B3D0148,0x00000000
	long		0x3FFE0000,0xDBEB61EE,0xD19C5958,0x00000000
	long		0x3FFC0000,0x9B8FE100,0xF47BA1DE,0x00000000
	long		0x3FFE0000,0xD901B203,0x6406C80E,0x00000000
	long		0x3FFC0000,0xA9372F1D,0x0DA1BD17,0x00000000
	long		0x3FFE0000,0xD62B80D6,0x2B80D62C,0x00000000
	long		0x3FFC0000,0xB6B07F38,0xCE90E46B,0x00000000
	long		0x3FFE0000,0xD3680D36,0x80D3680D,0x00000000
	long		0x3FFC0000,0xC3FD0329,0x06488481,0x00000000
	long		0x3FFE0000,0xD0B69FCB,0xD2580D0B,0x00000000
	long		0x3FFC0000,0xD11DE0FF,0x15AB18CA,0x00000000
	long		0x3FFE0000,0xCE168A77,0x25080CE1,0x00000000
	long		0x3FFC0000,0xDE1433A1,0x6C66B150,0x00000000
	long		0x3FFE0000,0xCB8727C0,0x65C393E0,0x00000000
	long		0x3FFC0000,0xEAE10B5A,0x7DDC8ADD,0x00000000
	long		0x3FFE0000,0xC907DA4E,0x871146AD,0x00000000
	long		0x3FFC0000,0xF7856E5E,0xE2C9B291,0x00000000
	long		0x3FFE0000,0xC6980C69,0x80C6980C,0x00000000
	long		0x3FFD0000,0x82012CA5,0xA68206D7,0x00000000
	long		0x3FFE0000,0xC4372F85,0x5D824CA6,0x00000000
	long		0x3FFD0000,0x882C5FCD,0x7256A8C5,0x00000000
	long		0x3FFE0000,0xC1E4BBD5,0x95F6E947,0x00000000
	long		0x3FFD0000,0x8E44C60B,0x4CCFD7DE,0x00000000
	long		0x3FFE0000,0xBFA02FE8,0x0BFA02FF,0x00000000
	long		0x3FFD0000,0x944AD09E,0xF4351AF6,0x00000000
	long		0x3FFE0000,0xBD691047,0x07661AA3,0x00000000
	long		0x3FFD0000,0x9A3EECD4,0xC3EAA6B2,0x00000000
	long		0x3FFE0000,0xBB3EE721,0xA54D880C,0x00000000
	long		0x3FFD0000,0xA0218434,0x353F1DE8,0x00000000
	long		0x3FFE0000,0xB92143FA,0x36F5E02E,0x00000000
	long		0x3FFD0000,0xA5F2FCAB,0xBBC506DA,0x00000000
	long		0x3FFE0000,0xB70FBB5A,0x19BE3659,0x00000000
	long		0x3FFD0000,0xABB3B8BA,0x2AD362A5,0x00000000
	long		0x3FFE0000,0xB509E68A,0x9B94821F,0x00000000
	long		0x3FFD0000,0xB1641795,0xCE3CA97B,0x00000000
	long		0x3FFE0000,0xB30F6352,0x8917C80B,0x00000000
	long		0x3FFD0000,0xB7047551,0x5D0F1C61,0x00000000
	long		0x3FFE0000,0xB11FD3B8,0x0B11FD3C,0x00000000
	long		0x3FFD0000,0xBC952AFE,0xEA3D13E1,0x00000000
	long		0x3FFE0000,0xAF3ADDC6,0x80AF3ADE,0x00000000
	long		0x3FFD0000,0xC2168ED0,0xF458BA4A,0x00000000
	long		0x3FFE0000,0xAD602B58,0x0AD602B6,0x00000000
	long		0x3FFD0000,0xC788F439,0xB3163BF1,0x00000000
	long		0x3FFE0000,0xAB8F69E2,0x8359CD11,0x00000000
	long		0x3FFD0000,0xCCECAC08,0xBF04565D,0x00000000
	long		0x3FFE0000,0xA9C84A47,0xA07F5638,0x00000000
	long		0x3FFD0000,0xD2420487,0x2DD85160,0x00000000
	long		0x3FFE0000,0xA80A80A8,0x0A80A80B,0x00000000
	long		0x3FFD0000,0xD7894992,0x3BC3588A,0x00000000
	long		0x3FFE0000,0xA655C439,0x2D7B73A8,0x00000000
	long		0x3FFD0000,0xDCC2C4B4,0x9887DACC,0x00000000
	long		0x3FFE0000,0xA4A9CF1D,0x96833751,0x00000000
	long		0x3FFD0000,0xE1EEBD3E,0x6D6A6B9E,0x00000000
	long		0x3FFE0000,0xA3065E3F,0xAE7CD0E0,0x00000000
	long		0x3FFD0000,0xE70D785C,0x2F9F5BDC,0x00000000
	long		0x3FFE0000,0xA16B312E,0xA8FC377D,0x00000000
	long		0x3FFD0000,0xEC1F392C,0x5179F283,0x00000000
	long		0x3FFE0000,0x9FD809FD,0x809FD80A,0x00000000
	long		0x3FFD0000,0xF12440D3,0xE36130E6,0x00000000
	long		0x3FFE0000,0x9E4CAD23,0xDD5F3A20,0x00000000
	long		0x3FFD0000,0xF61CCE92,0x346600BB,0x00000000
	long		0x3FFE0000,0x9CC8E160,0xC3FB19B9,0x00000000
	long		0x3FFD0000,0xFB091FD3,0x8145630A,0x00000000
	long		0x3FFE0000,0x9B4C6F9E,0xF03A3CAA,0x00000000
	long		0x3FFD0000,0xFFE97042,0xBFA4C2AD,0x00000000
	long		0x3FFE0000,0x99D722DA,0xBDE58F06,0x00000000
	long		0x3FFE0000,0x825EFCED,0x49369330,0x00000000
	long		0x3FFE0000,0x9868C809,0x868C8098,0x00000000
	long		0x3FFE0000,0x84C37A7A,0xB9A905C9,0x00000000
	long		0x3FFE0000,0x97012E02,0x5C04B809,0x00000000
	long		0x3FFE0000,0x87224C2E,0x8E645FB7,0x00000000
	long		0x3FFE0000,0x95A02568,0x095A0257,0x00000000
	long		0x3FFE0000,0x897B8CAC,0x9F7DE298,0x00000000
	long		0x3FFE0000,0x94458094,0x45809446,0x00000000
	long		0x3FFE0000,0x8BCF55DE,0xC4CD05FE,0x00000000
	long		0x3FFE0000,0x92F11384,0x0497889C,0x00000000
	long		0x3FFE0000,0x8E1DC0FB,0x89E125E5,0x00000000
	long		0x3FFE0000,0x91A2B3C4,0xD5E6F809,0x00000000
	long		0x3FFE0000,0x9066E68C,0x955B6C9B,0x00000000
	long		0x3FFE0000,0x905A3863,0x3E06C43B,0x00000000
	long		0x3FFE0000,0x92AADE74,0xC7BE59E0,0x00000000
	long		0x3FFE0000,0x8F1779D9,0xFDC3A219,0x00000000
	long		0x3FFE0000,0x94E9BFF6,0x15845643,0x00000000
	long		0x3FFE0000,0x8DDA5202,0x37694809,0x00000000
	long		0x3FFE0000,0x9723A1B7,0x20134203,0x00000000
	long		0x3FFE0000,0x8CA29C04,0x6514E023,0x00000000
	long		0x3FFE0000,0x995899C8,0x90EB8990,0x00000000
	long		0x3FFE0000,0x8B70344A,0x139BC75A,0x00000000
	long		0x3FFE0000,0x9B88BDAA,0x3A3DAE2F,0x00000000
	long		0x3FFE0000,0x8A42F870,0x5669DB46,0x00000000
	long		0x3FFE0000,0x9DB4224F,0xFFE1157C,0x00000000
	long		0x3FFE0000,0x891AC73A,0xE9819B50,0x00000000
	long		0x3FFE0000,0x9FDADC26,0x8B7A12DA,0x00000000
	long		0x3FFE0000,0x87F78087,0xF78087F8,0x00000000
	long		0x3FFE0000,0xA1FCFF17,0xCE733BD4,0x00000000
	long		0x3FFE0000,0x86D90544,0x7A34ACC6,0x00000000
	long		0x3FFE0000,0xA41A9E8F,0x5446FB9F,0x00000000
	long		0x3FFE0000,0x85BF3761,0x2CEE3C9B,0x00000000
	long		0x3FFE0000,0xA633CD7E,0x6771CD8B,0x00000000
	long		0x3FFE0000,0x84A9F9C8,0x084A9F9D,0x00000000
	long		0x3FFE0000,0xA8489E60,0x0B435A5E,0x00000000
	long		0x3FFE0000,0x83993052,0x3FBE3368,0x00000000
	long		0x3FFE0000,0xAA59233C,0xCCA4BD49,0x00000000
	long		0x3FFE0000,0x828CBFBE,0xB9A020A3,0x00000000
	long		0x3FFE0000,0xAC656DAE,0x6BCC4985,0x00000000
	long		0x3FFE0000,0x81848DA8,0xFAF0D277,0x00000000
	long		0x3FFE0000,0xAE6D8EE3,0x60BB2468,0x00000000
	long		0x3FFE0000,0x80808080,0x80808081,0x00000000
	long		0x3FFE0000,0xB07197A2,0x3C46C654,0x00000000

	set		ADJK,L_SCR1

	set		X,FP_SCR0
	set		XDCARE,X+2
	set		XFRAC,X+4

	set		F,FP_SCR1
	set		FFRAC,F+4

	set		KLOG2,FP_SCR0

	set		SAVEU,FP_SCR0

	global		slogn
#--ENTRY POINT FOR LOG(X) FOR X FINITE, NON-ZERO, NOT NAN'S
slogn:
	fmov.x		(%a0),%fp0		# LOAD INPUT
	mov.l		&0x00000000,ADJK(%a6)

LOGBGN:
#--FPCR SAVED AND CLEARED, INPUT IS 2^(ADJK)*FP0, FP0 CONTAINS
#--A FINITE, NON-ZERO, NORMALIZED NUMBER.

	mov.l		(%a0),%d1
	mov.w		4(%a0),%d1

	mov.l		(%a0),X(%a6)
	mov.l		4(%a0),X+4(%a6)
	mov.l		8(%a0),X+8(%a6)

	cmp.l		%d1,&0			# CHECK IF X IS NEGATIVE
	blt.w		LOGNEG			# LOG OF NEGATIVE ARGUMENT IS INVALID
# X IS POSITIVE, CHECK IF X IS NEAR 1
	cmp.l		%d1,&0x3ffef07d 	# IS X < 15/16?
	blt.b		LOGMAIN			# YES
	cmp.l		%d1,&0x3fff8841 	# IS X > 17/16?
	ble.w		LOGNEAR1		# NO

LOGMAIN:
#--THIS SHOULD BE THE USUAL CASE, X NOT VERY CLOSE TO 1

#--X = 2^(K) * Y, 1 <= Y < 2. THUS, Y = 1.XXXXXXXX....XX IN BINARY.
#--WE DEFINE F = 1.XXXXXX1, I.E. FIRST 7 BITS OF Y AND ATTACH A 1.
#--THE IDEA IS THAT LOG(X) = K*LOG2 + LOG(Y)
#--			 = K*LOG2 + LOG(F) + LOG(1 + (Y-F)/F).
#--NOTE THAT U = (Y-F)/F IS VERY SMALL AND THUS APPROXIMATING
#--LOG(1+U) CAN BE VERY EFFICIENT.
#--ALSO NOTE THAT THE VALUE 1/F IS STORED IN A TABLE SO THAT NO
#--DIVISION IS NEEDED TO CALCULATE (Y-F)/F. 

#--GET K, Y, F, AND ADDRESS OF 1/F.
	asr.l		&8,%d1
	asr.l		&8,%d1			# SHIFTED 16 BITS, BIASED EXPO. OF X
	sub.l		&0x3FFF,%d1		# THIS IS K
	add.l		ADJK(%a6),%d1		# ADJUST K, ORIGINAL INPUT MAY BE  DENORM.
	lea		LOGTBL(%pc),%a0		# BASE ADDRESS OF 1/F AND LOG(F)
	fmov.l		%d1,%fp1		# CONVERT K TO FLOATING-POINT FORMAT

#--WHILE THE CONVERSION IS GOING ON, WE GET F AND ADDRESS OF 1/F
	mov.l		&0x3FFF0000,X(%a6)	# X IS NOW Y, I.E. 2^(-K)*X
	mov.l		XFRAC(%a6),FFRAC(%a6)
	and.l		&0xFE000000,FFRAC(%a6)	# FIRST 7 BITS OF Y
	or.l		&0x01000000,FFRAC(%a6)	# GET F: ATTACH A 1 AT THE EIGHTH BIT
	mov.l		FFRAC(%a6),%d1	# READY TO GET ADDRESS OF 1/F
	and.l		&0x7E000000,%d1
	asr.l		&8,%d1
	asr.l		&8,%d1
	asr.l		&4,%d1			# SHIFTED 20, D0 IS THE DISPLACEMENT
	add.l		%d1,%a0			# A0 IS THE ADDRESS FOR 1/F

	fmov.x		X(%a6),%fp0
	mov.l		&0x3fff0000,F(%a6)
	clr.l		F+8(%a6)
	fsub.x		F(%a6),%fp0		# Y-F
	fmovm.x		&0xc,-(%sp)		# SAVE FP2-3 WHILE FP0 IS NOT READY
#--SUMMARY: FP0 IS Y-F, A0 IS ADDRESS OF 1/F, FP1 IS K
#--REGISTERS SAVED: FPCR, FP1, FP2

LP1CONT1:
#--AN RE-ENTRY POINT FOR LOGNP1
	fmul.x		(%a0),%fp0		# FP0 IS U = (Y-F)/F
	fmul.x		LOGOF2(%pc),%fp1	# GET K*LOG2 WHILE FP0 IS NOT READY
	fmov.x		%fp0,%fp2
	fmul.x		%fp2,%fp2		# FP2 IS V=U*U
	fmov.x		%fp1,KLOG2(%a6)		# PUT K*LOG2 IN MEMEORY, FREE FP1

#--LOG(1+U) IS APPROXIMATED BY
#--U + V*(A1+U*(A2+U*(A3+U*(A4+U*(A5+U*A6))))) WHICH IS
#--[U + V*(A1+V*(A3+V*A5))]  +  [U*V*(A2+V*(A4+V*A6))]

	fmov.x		%fp2,%fp3
	fmov.x		%fp2,%fp1

	fmul.d		LOGA6(%pc),%fp1		# V*A6
	fmul.d		LOGA5(%pc),%fp2		# V*A5

	fadd.d		LOGA4(%pc),%fp1		# A4+V*A6
	fadd.d		LOGA3(%pc),%fp2		# A3+V*A5

	fmul.x		%fp3,%fp1		# V*(A4+V*A6)
	fmul.x		%fp3,%fp2		# V*(A3+V*A5)

	fadd.d		LOGA2(%pc),%fp1		# A2+V*(A4+V*A6)
	fadd.d		LOGA1(%pc),%fp2		# A1+V*(A3+V*A5)

	fmul.x		%fp3,%fp1		# V*(A2+V*(A4+V*A6))
	add.l		&16,%a0			# ADDRESS OF LOG(F)
	fmul.x		%fp3,%fp2		# V*(A1+V*(A3+V*A5))

	fmul.x		%fp0,%fp1		# U*V*(A2+V*(A4+V*A6))
	fadd.x		%fp2,%fp0		# U+V*(A1+V*(A3+V*A5))

	fadd.x		(%a0),%fp1		# LOG(F)+U*V*(A2+V*(A4+V*A6))
	fmovm.x		(%sp)+,&0x30		# RESTORE FP2-3
	fadd.x		%fp1,%fp0		# FP0 IS LOG(F) + LOG(1+U)

	fmov.l		%d0,%fpcr
	fadd.x		KLOG2(%a6),%fp0		# FINAL ADD
	bra		t_inx2


LOGNEAR1:

# if the input is exactly equal to one, then exit through ld_pzero.
# if these 2 lines weren't here, the correct answer would be returned
# but the INEX2 bit would be set.
	fcmp.b		%fp0,&0x1		# is it equal to one?
	fbeq.l		ld_pzero		# yes

#--REGISTERS SAVED: FPCR, FP1. FP0 CONTAINS THE INPUT.
	fmov.x		%fp0,%fp1
	fsub.s		one(%pc),%fp1		# FP1 IS X-1
	fadd.s		one(%pc),%fp0		# FP0 IS X+1
	fadd.x		%fp1,%fp1		# FP1 IS 2(X-1)
#--LOG(X) = LOG(1+U/2)-LOG(1-U/2) WHICH IS AN ODD POLYNOMIAL
#--IN U, U = 2(X-1)/(X+1) = FP1/FP0

LP1CONT2:
#--THIS IS AN RE-ENTRY POINT FOR LOGNP1
	fdiv.x		%fp0,%fp1		# FP1 IS U
	fmovm.x		&0xc,-(%sp)		# SAVE FP2-3
#--REGISTERS SAVED ARE NOW FPCR,FP1,FP2,FP3
#--LET V=U*U, W=V*V, CALCULATE
#--U + U*V*(B1 + V*(B2 + V*(B3 + V*(B4 + V*B5)))) BY
#--U + U*V*(  [B1 + W*(B3 + W*B5)]  +  [V*(B2 + W*B4)]  )
	fmov.x		%fp1,%fp0
	fmul.x		%fp0,%fp0		# FP0 IS V
	fmov.x		%fp1,SAVEU(%a6)		# STORE U IN MEMORY, FREE FP1
	fmov.x		%fp0,%fp1
	fmul.x		%fp1,%fp1		# FP1 IS W

	fmov.d		LOGB5(%pc),%fp3
	fmov.d		LOGB4(%pc),%fp2

	fmul.x		%fp1,%fp3		# W*B5
	fmul.x		%fp1,%fp2		# W*B4

	fadd.d		LOGB3(%pc),%fp3		# B3+W*B5
	fadd.d		LOGB2(%pc),%fp2		# B2+W*B4

	fmul.x		%fp3,%fp1		# W*(B3+W*B5), FP3 RELEASED

	fmul.x		%fp0,%fp2		# V*(B2+W*B4)

	fadd.d		LOGB1(%pc),%fp1		# B1+W*(B3+W*B5)
	fmul.x		SAVEU(%a6),%fp0		# FP0 IS U*V

	fadd.x		%fp2,%fp1		# B1+W*(B3+W*B5) + V*(B2+W*B4), FP2 RELEASED
	fmovm.x		(%sp)+,&0x30		# FP2-3 RESTORED

	fmul.x		%fp1,%fp0		# U*V*( [B1+W*(B3+W*B5)] + [V*(B2+W*B4)] )

	fmov.l		%d0,%fpcr
	fadd.x		SAVEU(%a6),%fp0
	bra		t_inx2

#--REGISTERS SAVED FPCR. LOG(-VE) IS INVALID
LOGNEG:
	bra		t_operr

	global		slognd
slognd:
#--ENTRY POINT FOR LOG(X) FOR DENORMALIZED INPUT

	mov.l		&-100,ADJK(%a6)		# INPUT = 2^(ADJK) * FP0

#----normalize the input value by left shifting k bits (k to be determined
#----below), adjusting exponent and storing -k to  ADJK
#----the value TWOTO100 is no longer needed.
#----Note that this code assumes the denormalized input is NON-ZERO.

	movm.l		&0x3f00,-(%sp)		# save some registers  {d2-d7}
	mov.l		(%a0),%d3		# D3 is exponent of smallest norm. #
	mov.l		4(%a0),%d4
	mov.l		8(%a0),%d5		# (D4,D5) is (Hi_X,Lo_X)
	clr.l		%d2			# D2 used for holding K

	tst.l		%d4
	bne.b		Hi_not0

Hi_0:
	mov.l		%d5,%d4
	clr.l		%d5
	mov.l		&32,%d2
	clr.l		%d6
	bfffo		%d4{&0:&32},%d6
	lsl.l		%d6,%d4
	add.l		%d6,%d2			# (D3,D4,D5) is normalized

	mov.l		%d3,X(%a6)
	mov.l		%d4,XFRAC(%a6)
	mov.l		%d5,XFRAC+4(%a6)
	neg.l		%d2
	mov.l		%d2,ADJK(%a6)
	fmov.x		X(%a6),%fp0
	movm.l		(%sp)+,&0xfc		# restore registers {d2-d7}
	lea		X(%a6),%a0
	bra.w		LOGBGN			# begin regular log(X)

Hi_not0:
	clr.l		%d6
	bfffo		%d4{&0:&32},%d6		# find first 1
	mov.l		%d6,%d2			# get k
	lsl.l		%d6,%d4
	mov.l		%d5,%d7			# a copy of D5
	lsl.l		%d6,%d5
	neg.l		%d6
	add.l		&32,%d6
	lsr.l		%d6,%d7
	or.l		%d7,%d4			# (D3,D4,D5) normalized

	mov.l		%d3,X(%a6)
	mov.l		%d4,XFRAC(%a6)
	mov.l		%d5,XFRAC+4(%a6)
	neg.l		%d2
	mov.l		%d2,ADJK(%a6)
	fmov.x		X(%a6),%fp0
	movm.l		(%sp)+,&0xfc		# restore registers {d2-d7}
	lea		X(%a6),%a0
	bra.w		LOGBGN			# begin regular log(X)

	global		slognp1
#--ENTRY POINT FOR LOG(1+X) FOR X FINITE, NON-ZERO, NOT NAN'S
slognp1:
	fmov.x		(%a0),%fp0		# LOAD INPUT
	fabs.x		%fp0			# test magnitude
	fcmp.x		%fp0,LTHOLD(%pc)	# compare with min threshold
	fbgt.w		LP1REAL			# if greater, continue
	fmov.l		%d0,%fpcr
	mov.b		&FMOV_OP,%d1		# last inst is MOVE
	fmov.x		(%a0),%fp0		# return signed argument
	bra		t_catch

LP1REAL:
	fmov.x		(%a0),%fp0		# LOAD INPUT
	mov.l		&0x00000000,ADJK(%a6)
	fmov.x		%fp0,%fp1		# FP1 IS INPUT Z
	fadd.s		one(%pc),%fp0		# X := ROUND(1+Z)
	fmov.x		%fp0,X(%a6)
	mov.w		XFRAC(%a6),XDCARE(%a6)
	mov.l		X(%a6),%d1
	cmp.l		%d1,&0
	ble.w		LP1NEG0			# LOG OF ZERO OR -VE
	cmp.l		%d1,&0x3ffe8000 	# IS BOUNDS [1/2,3/2]?
	blt.w		LOGMAIN
	cmp.l		%d1,&0x3fffc000
	bgt.w		LOGMAIN 
#--IF 1+Z > 3/2 OR 1+Z < 1/2, THEN X, WHICH IS ROUNDING 1+Z,
#--CONTAINS AT LEAST 63 BITS OF INFORMATION OF Z. IN THAT CASE,
#--SIMPLY INVOKE LOG(X) FOR LOG(1+Z).

LP1NEAR1:
#--NEXT SEE IF EXP(-1/16) < X < EXP(1/16)
	cmp.l		%d1,&0x3ffef07d
	blt.w		LP1CARE
	cmp.l		%d1,&0x3fff8841
	bgt.w		LP1CARE

LP1ONE16:
#--EXP(-1/16) < X < EXP(1/16). LOG(1+Z) = LOG(1+U/2) - LOG(1-U/2)
#--WHERE U = 2Z/(2+Z) = 2Z/(1+X).
	fadd.x		%fp1,%fp1		# FP1 IS 2Z
	fadd.s		one(%pc),%fp0		# FP0 IS 1+X
#--U = FP1/FP0
	bra.w		LP1CONT2

LP1CARE:
#--HERE WE USE THE USUAL TABLE DRIVEN APPROACH. CARE HAS TO BE
#--TAKEN BECAUSE 1+Z CAN HAVE 67 BITS OF INFORMATION AND WE MUST
#--PRESERVE ALL THE INFORMATION. BECAUSE 1+Z IS IN [1/2,3/2],
#--THERE ARE ONLY TWO CASES.
#--CASE 1: 1+Z < 1, THEN K = -1 AND Y-F = (2-F) + 2Z
#--CASE 2: 1+Z > 1, THEN K = 0  AND Y-F = (1-F) + Z
#--ON RETURNING TO LP1CONT1, WE MUST HAVE K IN FP1, ADDRESS OF
#--(1/F) IN A0, Y-F IN FP0, AND FP2 SAVED.

	mov.l		XFRAC(%a6),FFRAC(%a6)
	and.l		&0xFE000000,FFRAC(%a6)
	or.l		&0x01000000,FFRAC(%a6)	# F OBTAINED
	cmp.l		%d1,&0x3FFF8000		# SEE IF 1+Z > 1
	bge.b		KISZERO

KISNEG1:
	fmov.s		TWO(%pc),%fp0
	mov.l		&0x3fff0000,F(%a6)
	clr.l		F+8(%a6)
	fsub.x		F(%a6),%fp0		# 2-F
	mov.l		FFRAC(%a6),%d1
	and.l		&0x7E000000,%d1
	asr.l		&8,%d1
	asr.l		&8,%d1
	asr.l		&4,%d1			# D0 CONTAINS DISPLACEMENT FOR 1/F
	fadd.x		%fp1,%fp1		# GET 2Z
	fmovm.x		&0xc,-(%sp)		# SAVE FP2  {%fp2/%fp3}
	fadd.x		%fp1,%fp0		# FP0 IS Y-F = (2-F)+2Z
	lea		LOGTBL(%pc),%a0		# A0 IS ADDRESS OF 1/F
	add.l		%d1,%a0
	fmov.s		negone(%pc),%fp1	# FP1 IS K = -1
	bra.w		LP1CONT1

KISZERO:
	fmov.s		one(%pc),%fp0
	mov.l		&0x3fff0000,F(%a6)
	clr.l		F+8(%a6)
	fsub.x		F(%a6),%fp0		# 1-F
	mov.l		FFRAC(%a6),%d1
	and.l		&0x7E000000,%d1
	asr.l		&8,%d1
	asr.l		&8,%d1
	asr.l		&4,%d1
	fadd.x		%fp1,%fp0		# FP0 IS Y-F
	fmovm.x		&0xc,-(%sp)		# FP2 SAVED {%fp2/%fp3}
	lea		LOGTBL(%pc),%a0
	add.l		%d1,%a0			# A0 IS ADDRESS OF 1/F
	fmov.s		zero(%pc),%fp1		# FP1 IS K = 0
	bra.w		LP1CONT1

LP1NEG0:
#--FPCR SAVED. D0 IS X IN COMPACT FORM.
	cmp.l		%d1,&0
	blt.b		LP1NEG
LP1ZERO:
	fmov.s		negone(%pc),%fp0

	fmov.l		%d0,%fpcr
	bra		t_dz

LP1NEG:
	fmov.s		zero(%pc),%fp0

	fmov.l		%d0,%fpcr
	bra		t_operr

	global		slognp1d
#--ENTRY POINT FOR LOG(1+Z) FOR DENORMALIZED INPUT
# Simply return the denorm
slognp1d:
	bra		t_extdnrm

#########################################################################
# satanh():  computes the inverse hyperbolic tangent of a norm input	#
# satanhd(): computes the inverse hyperbolic tangent of a denorm input	#
#									#
# INPUT ***************************************************************	#
#	a0 = pointer to extended precision input			#
#	d0 = round precision,mode					#
#									#
# OUTPUT **************************************************************	# 
#	fp0 = arctanh(X)						#
#									#
# ACCURACY and MONOTONICITY *******************************************	#
#	The returned result is within 3 ulps in	64 significant bit,	#
#	i.e. within 0.5001 ulp to 53 bits if the result is subsequently	#
#	rounded to double precision. The result is provably monotonic	#
#	in double precision.						#
#									#
# ALGORITHM ***********************************************************	#
#									#
#	ATANH								#
#	1. If |X| >= 1, go to 3.					#
#									#
#	2. (|X| < 1) Calculate atanh(X) by				#
#		sgn := sign(X)						#
#		y := |X|						#
#		z := 2y/(1-y)						#
#		atanh(X) := sgn * (1/2) * logp1(z)			#
#		Exit.							#
#									#
#	3. If |X| > 1, go to 5.						#
#									#
#	4. (|X| = 1) Generate infinity with an appropriate sign and	#
#		divide-by-zero by					#
#		sgn := sign(X)						#
#		atan(X) := sgn / (+0).					#
#		Exit.							#
#									#
#	5. (|X| > 1) Generate an invalid operation by 0 * infinity.	#
#		Exit.							#
#									#
#########################################################################

	global		satanh
satanh:
	mov.l		(%a0),%d1
	mov.w		4(%a0),%d1
	and.l		&0x7FFFFFFF,%d1
	cmp.l		%d1,&0x3FFF8000
	bge.b		ATANHBIG

#--THIS IS THE USUAL CASE, |X| < 1
#--Y = |X|, Z = 2Y/(1-Y), ATANH(X) = SIGN(X) * (1/2) * LOG1P(Z).

	fabs.x		(%a0),%fp0		# Y = |X|
	fmov.x		%fp0,%fp1
	fneg.x		%fp1			# -Y
	fadd.x		%fp0,%fp0		# 2Y
	fadd.s		&0x3F800000,%fp1	# 1-Y
	fdiv.x		%fp1,%fp0		# 2Y/(1-Y)
	mov.l		(%a0),%d1
	and.l		&0x80000000,%d1
	or.l		&0x3F000000,%d1		# SIGN(X)*HALF
	mov.l		%d1,-(%sp)

	mov.l		%d0,-(%sp)		# save rnd prec,mode
	clr.l		%d0			# pass ext prec,RN
	fmovm.x		&0x01,-(%sp)		# save Z on stack
	lea		(%sp),%a0		# pass ptr to Z
	bsr		slognp1			# LOG1P(Z)
	add.l		&0xc,%sp		# clear Z from stack

	mov.l		(%sp)+,%d0		# fetch old prec,mode
	fmov.l		%d0,%fpcr		# load it
	mov.b		&FMUL_OP,%d1		# last inst is MUL
	fmul.s		(%sp)+,%fp0
	bra		t_catch

ATANHBIG:
	fabs.x		(%a0),%fp0		# |X|
	fcmp.s		%fp0,&0x3F800000
	fbgt		t_operr
	bra		t_dz

	global		satanhd
#--ATANH(X) = X FOR DENORMALIZED X
satanhd:
	bra		t_extdnrm

#########################################################################
# slog10():  computes the base-10 logarithm of a normalized input	#
# slog10d(): computes the base-10 logarithm of a denormalized input	#
# slog2():   computes the base-2 logarithm of a normalized input	#
# slog2d():  computes the base-2 logarithm of a denormalized input	#
#									#
# INPUT *************************************************************** #
#	a0 = pointer to extended precision input			#
#	d0 = round precision,mode					#
#									#
# OUTPUT **************************************************************	#
#	fp0 = log_10(X) or log_2(X)					#
#									#
# ACCURACY and MONOTONICITY *******************************************	#
#	The returned result is within 1.7 ulps in 64 significant bit,	#
#	i.e. within 0.5003 ulp to 53 bits if the result is subsequently	#
#	rounded to double precision. The result is provably monotonic	#
#	in double precision.						#
#									#
# ALGORITHM ***********************************************************	#
#									#
#       slog10d:							#
#									#
#       Step 0.	If X < 0, create a NaN and raise the invalid operation	#
#               flag. Otherwise, save FPCR in D1; set FpCR to default.	#
#       Notes:  Default means round-to-nearest mode, no floating-point	#
#               traps, and precision control = double extended.		#
#									#
#       Step 1. Call slognd to obtain Y = log(X), the natural log of X.	#
#       Notes:  Even if X is denormalized, log(X) is always normalized.	#
#									#
#       Step 2.  Compute log_10(X) = log(X) * (1/log(10)).		#
#            2.1 Restore the user FPCR					#
#            2.2 Return ans := Y * INV_L10.				#
#									#
#       slog10: 							#
#									#
#       Step 0. If X < 0, create a NaN and raise the invalid operation	#
#               flag. Otherwise, save FPCR in D1; set FpCR to default.	#
#       Notes:  Default means round-to-nearest mode, no floating-point	#
#               traps, and precision control = double extended.		#
#									#
#       Step 1. Call sLogN to obtain Y = log(X), the natural log of X.	#
#									#
#       Step 2.   Compute log_10(X) = log(X) * (1/log(10)).		#
#            2.1  Restore the user FPCR					#
#            2.2  Return ans := Y * INV_L10.				#
#									#
#       sLog2d:								#
#									#
#       Step 0. If X < 0, create a NaN and raise the invalid operation	#
#               flag. Otherwise, save FPCR in D1; set FpCR to default.	#
#       Notes:  Default means round-to-nearest mode, no floating-point	#
#               traps, and precision control = double extended.		#
#									#
#       Step 1. Call slognd to obtain Y = log(X), the natural log of X.	#
#       Notes:  Even if X is denormalized, log(X) is always normalized.	#
#									#
#       Step 2.   Compute log_10(X) = log(X) * (1/log(2)).		#
#            2.1  Restore the user FPCR					#
#            2.2  Return ans := Y * INV_L2.				#
#									#
#       sLog2:								#
#									#
#       Step 0. If X < 0, create a NaN and raise the invalid operation	#
#               flag. Otherwise, save FPCR in D1; set FpCR to default.	#
#       Notes:  Default means round-to-nearest mode, no floating-point	#
#               traps, and precision control = double extended.		#
#									#
#       Step 1. If X is not an integer power of two, i.e., X != 2^k,	#
#               go to Step 3.						#
#									#
#       Step 2.   Return k.						#
#            2.1  Get integer k, X = 2^k.				#
#            2.2  Restore the user FPCR.				#
#            2.3  Return ans := convert-to-double-extended(k).		#
#									#
#       Step 3. Call sLogN to obtain Y = log(X), the natural log of X.	#
#									#
#       Step 4.   Compute log_2(X) = log(X) * (1/log(2)).		#
#            4.1  Restore the user FPCR					#
#            4.2  Return ans := Y * INV_L2.				#
#									#
#########################################################################

INV_L10:
	long		0x3FFD0000,0xDE5BD8A9,0x37287195,0x00000000

INV_L2:
	long		0x3FFF0000,0xB8AA3B29,0x5C17F0BC,0x00000000

	global		slog10
#--entry point for Log10(X), X is normalized
slog10:
	fmov.b		&0x1,%fp0
	fcmp.x		%fp0,(%a0)		# if operand == 1,
	fbeq.l		ld_pzero		# return an EXACT zero

	mov.l		(%a0),%d1
	blt.w		invalid
	mov.l		%d0,-(%sp)
	clr.l		%d0
	bsr		slogn			# log(X), X normal.
	fmov.l		(%sp)+,%fpcr
	fmul.x		INV_L10(%pc),%fp0
	bra		t_inx2

	global		slog10d
#--entry point for Log10(X), X is denormalized
slog10d:
	mov.l		(%a0),%d1
	blt.w		invalid
	mov.l		%d0,-(%sp)
	clr.l		%d0
	bsr		slognd			# log(X), X denorm.
	fmov.l		(%sp)+,%fpcr
	fmul.x		INV_L10(%pc),%fp0
	bra		t_minx2

	global		slog2
#--entry point for Log2(X), X is normalized
slog2:
	mov.l		(%a0),%d1
	blt.w		invalid

	mov.l		8(%a0),%d1
	bne.b		continue		# X is not 2^k

	mov.l		4(%a0),%d1
	and.l		&0x7FFFFFFF,%d1
	bne.b		continue

#--X = 2^k.
	mov.w		(%a0),%d1
	and.l		&0x00007FFF,%d1
	sub.l		&0x3FFF,%d1
	beq.l		ld_pzero
	fmov.l		%d0,%fpcr
	fmov.l		%d1,%fp0
	bra		t_inx2

continue:
	mov.l		%d0,-(%sp)
	clr.l		%d0
	bsr		slogn			# log(X), X normal.
	fmov.l		(%sp)+,%fpcr
	fmul.x		INV_L2(%pc),%fp0
	bra		t_inx2

invalid:
	bra		t_operr

	global		slog2d
#--entry point for Log2(X), X is denormalized
slog2d:
	mov.l		(%a0),%d1
	blt.w		invalid
	mov.l		%d0,-(%sp)
	clr.l		%d0
	bsr		slognd			# log(X), X denorm.
	fmov.l		(%sp)+,%fpcr
	fmul.x		INV_L2(%pc),%fp0
	bra		t_minx2

#########################################################################
# stwotox():  computes 2**X for a normalized input			#
# stwotoxd(): computes 2**X for a denormalized input			#
# stentox():  computes 10**X for a normalized input			#
# stentoxd(): computes 10**X for a denormalized input			#
#									#
# INPUT ***************************************************************	#
#	a0 = pointer to extended precision input			#
#	d0 = round precision,mode					#
#									#
# OUTPUT **************************************************************	#
#	fp0 = 2**X or 10**X						#
#									#
# ACCURACY and MONOTONICITY *******************************************	#
#	The returned result is within 2 ulps in 64 significant bit, 	#
#	i.e. within 0.5001 ulp to 53 bits if the result is subsequently	#
#	rounded to double precision. The result is provably monotonic	#
#	in double precision.						#
#									#
# ALGORITHM ***********************************************************	#
#									#
#	twotox								#
#	1. If |X| > 16480, go to ExpBig.				#
#									#
#	2. If |X| < 2**(-70), go to ExpSm.				#
#									#
#	3. Decompose X as X = N/64 + r where |r| <= 1/128. Furthermore	#
#		decompose N as						#
#		 N = 64(M + M') + j,  j = 0,1,2,...,63.			#
#									#
#	4. Overwrite r := r * log2. Then				#
#		2**X = 2**(M') * 2**(M) * 2**(j/64) * exp(r).		#
#		Go to expr to compute that expression.			#
#									#
#	tentox								#
#	1. If |X| > 16480*log_10(2) (base 10 log of 2), go to ExpBig.	#
#									#
#	2. If |X| < 2**(-70), go to ExpSm.				#
#									#
#	3. Set y := X*log_2(10)*64 (base 2 log of 10). Set		#
#		N := round-to-int(y). Decompose N as			#
#		 N = 64(M + M') + j,  j = 0,1,2,...,63.			#
#									#
#	4. Define r as							#
#		r := ((X - N*L1)-N*L2) * L10				#
#		where L1, L2 are the leading and trailing parts of 	#
#		log_10(2)/64 and L10 is the natural log of 10. Then	#
#		10**X = 2**(M') * 2**(M) * 2**(j/64) * exp(r).		#
#		Go to expr to compute that expression.			#
#									#
#	expr								#
#	1. Fetch 2**(j/64) from table as Fact1 and Fact2.		#
#									#
#	2. Overwrite Fact1 and Fact2 by					#
#		Fact1 := 2**(M) * Fact1					#
#		Fact2 := 2**(M) * Fact2					#
#		Thus Fact1 + Fact2 = 2**(M) * 2**(j/64).		#
#									#
#	3. Calculate P where 1 + P approximates exp(r):			#
#		P = r + r*r*(A1+r*(A2+...+r*A5)).			#
#									#
#	4. Let AdjFact := 2**(M'). Return				#
#		AdjFact * ( Fact1 + ((Fact1*P) + Fact2) ).		#
#		Exit.							#
#									#
#	ExpBig								#
#	1. Generate overflow by Huge * Huge if X > 0; otherwise, 	#
#	        generate underflow by Tiny * Tiny.			#
#									#
#	ExpSm								#
#	1. Return 1 + X.						#
#									#
#########################################################################

L2TEN64:
	long		0x406A934F,0x0979A371	# 64LOG10/LOG2
L10TWO1:
	long		0x3F734413,0x509F8000	# LOG2/64LOG10

L10TWO2:
	long		0xBFCD0000,0xC0219DC1,0xDA994FD2,0x00000000

LOG10:	long		0x40000000,0x935D8DDD,0xAAA8AC17,0x00000000

LOG2:	long		0x3FFE0000,0xB17217F7,0xD1CF79AC,0x00000000

EXPA5:	long		0x3F56C16D,0x6F7BD0B2
EXPA4:	long		0x3F811112,0x302C712C
EXPA3:	long		0x3FA55555,0x55554CC1
EXPA2:	long		0x3FC55555,0x55554A54
EXPA1:	long		0x3FE00000,0x00000000,0x00000000,0x00000000

TEXPTBL:
	long		0x3FFF0000,0x80000000,0x00000000,0x3F738000
	long		0x3FFF0000,0x8164D1F3,0xBC030773,0x3FBEF7CA
	long		0x3FFF0000,0x82CD8698,0xAC2BA1D7,0x3FBDF8A9
	long		0x3FFF0000,0x843A28C3,0xACDE4046,0x3FBCD7C9
	long		0x3FFF0000,0x85AAC367,0xCC487B15,0xBFBDE8DA
	long		0x3FFF0000,0x871F6196,0x9E8D1010,0x3FBDE85C
	long		0x3FFF0000,0x88980E80,0x92DA8527,0x3FBEBBF1
	long		0x3FFF0000,0x8A14D575,0x496EFD9A,0x3FBB80CA
	long		0x3FFF0000,0x8B95C1E3,0xEA8BD6E7,0xBFBA8373
	long		0x3FFF0000,0x8D1ADF5B,0x7E5BA9E6,0xBFBE9670
	long		0x3FFF0000,0x8EA4398B,0x45CD53C0,0x3FBDB700
	long		0x3FFF0000,0x9031DC43,0x1466B1DC,0x3FBEEEB0
	long		0x3FFF0000,0x91C3D373,0xAB11C336,0x3FBBFD6D
	long		0x3FFF0000,0x935A2B2F,0x13E6E92C,0xBFBDB319
	long		0x3FFF0000,0x94F4EFA8,0xFEF70961,0x3FBDBA2B
	long		0x3FFF0000,0x96942D37,0x20185A00,0x3FBE91D5
	long		0x3FFF0000,0x9837F051,0x8DB8A96F,0x3FBE8D5A
	long		0x3FFF0000,0x99E04593,0x20B7FA65,0xBFBCDE7B
	long		0x3FFF0000,0x9B8D39B9,0xD54E5539,0xBFBEBAAF
	long		0x3FFF0000,0x9D3ED9A7,0x2CFFB751,0xBFBD86DA
	long		0x3FFF0000,0x9EF53260,0x91A111AE,0xBFBEBEDD
	long		0x3FFF0000,0xA0B0510F,0xB9714FC2,0x3FBCC96E
	long		0x3FFF0000,0xA2704303,0x0C496819,0xBFBEC90B
	long		0x3FFF0000,0xA43515AE,0x09E6809E,0x3FBBD1DB
	long		0x3FFF0000,0xA5FED6A9,0xB15138EA,0x3FBCE5EB
	long		0x3FFF0000,0xA7CD93B4,0xE965356A,0xBFBEC274
	long		0x3FFF0000,0xA9A15AB4,0xEA7C0EF8,0x3FBEA83C
	long		0x3FFF0000,0xAB7A39B5,0xA93ED337,0x3FBECB00
	long		0x3FFF0000,0xAD583EEA,0x42A14AC6,0x3FBE9301
	long		0x3FFF0000,0xAF3B78AD,0x690A4375,0xBFBD8367
	long		0x3FFF0000,0xB123F581,0xD2AC2590,0xBFBEF05F
	long		0x3FFF0000,0xB311C412,0xA9112489,0x3FBDFB3C
	long		0x3FFF0000,0xB504F333,0xF9DE6484,0x3FBEB2FB
	long		0x3FFF0000,0xB6FD91E3,0x28D17791,0x3FBAE2CB
	long		0x3FFF0000,0xB8FBAF47,0x62FB9EE9,0x3FBCDC3C
	long		0x3FFF0000,0xBAFF5AB2,0x133E45FB,0x3FBEE9AA
	long		0x3FFF0000,0xBD08A39F,0x580C36BF,0xBFBEAEFD
	long		0x3FFF0000,0xBF1799B6,0x7A731083,0xBFBCBF51
	long		0x3FFF0000,0xC12C4CCA,0x66709456,0x3FBEF88A
	long		0x3FFF0000,0xC346CCDA,0x24976407,0x3FBD83B2
	long		0x3FFF0000,0xC5672A11,0x5506DADD,0x3FBDF8AB
	long		0x3FFF0000,0xC78D74C8,0xABB9B15D,0xBFBDFB17
	long		0x3FFF0000,0xC9B9BD86,0x6E2F27A3,0xBFBEFE3C
	long		0x3FFF0000,0xCBEC14FE,0xF2727C5D,0xBFBBB6F8
	long		0x3FFF0000,0xCE248C15,0x1F8480E4,0xBFBCEE53
	long		0x3FFF0000,0xD06333DA,0xEF2B2595,0xBFBDA4AE
	long		0x3FFF0000,0xD2A81D91,0xF12AE45A,0x3FBC9124
	long		0x3FFF0000,0xD4F35AAB,0xCFEDFA1F,0x3FBEB243
	long		0x3FFF0000,0xD744FCCA,0xD69D6AF4,0x3FBDE69A
	long		0x3FFF0000,0xD99D15C2,0x78AFD7B6,0xBFB8BC61
	long		0x3FFF0000,0xDBFBB797,0xDAF23755,0x3FBDF610
	long		0x3FFF0000,0xDE60F482,0x5E0E9124,0xBFBD8BE1
	long		0x3FFF0000,0xE0CCDEEC,0x2A94E111,0x3FBACB12
	long		0x3FFF0000,0xE33F8972,0xBE8A5A51,0x3FBB9BFE
	long		0x3FFF0000,0xE5B906E7,0x7C8348A8,0x3FBCF2F4
	long		0x3FFF0000,0xE8396A50,0x3C4BDC68,0x3FBEF22F
	long		0x3FFF0000,0xEAC0C6E7,0xDD24392F,0xBFBDBF4A
	long		0x3FFF0000,0xED4F301E,0xD9942B84,0x3FBEC01A
	long		0x3FFF0000,0xEFE4B99B,0xDCDAF5CB,0x3FBE8CAC
	long		0x3FFF0000,0xF281773C,0x59FFB13A,0xBFBCBB3F
	long		0x3FFF0000,0xF5257D15,0x2486CC2C,0x3FBEF73A
	long		0x3FFF0000,0xF7D0DF73,0x0AD13BB9,0xBFB8B795
	long		0x3FFF0000,0xFA83B2DB,0x722A033A,0x3FBEF84B
	long		0x3FFF0000,0xFD3E0C0C,0xF486C175,0xBFBEF581

	set		INT,L_SCR1

	set		X,FP_SCR0
	set		XDCARE,X+2
	set		XFRAC,X+4

	set		ADJFACT,FP_SCR0

	set		FACT1,FP_SCR0
	set		FACT1HI,FACT1+4
	set		FACT1LOW,FACT1+8

	set		FACT2,FP_SCR1
	set		FACT2HI,FACT2+4
	set		FACT2LOW,FACT2+8

	global		stwotox
#--ENTRY POINT FOR 2**(X), HERE X IS FINITE, NON-ZERO, AND NOT NAN'S
stwotox:
	fmovm.x		(%a0),&0x80		# LOAD INPUT

	mov.l		(%a0),%d1
	mov.w		4(%a0),%d1
	fmov.x		%fp0,X(%a6)
	and.l		&0x7FFFFFFF,%d1

	cmp.l		%d1,&0x3FB98000		# |X| >= 2**(-70)?
	bge.b		TWOOK1
	bra.w		EXPBORS

TWOOK1:
	cmp.l		%d1,&0x400D80C0		# |X| > 16480?
	ble.b		TWOMAIN
	bra.w		EXPBORS

TWOMAIN:
#--USUAL CASE, 2^(-70) <= |X| <= 16480

	fmov.x		%fp0,%fp1
	fmul.s		&0x42800000,%fp1	# 64 * X
	fmov.l		%fp1,INT(%a6)		# N = ROUND-TO-INT(64 X)
	mov.l		%d2,-(%sp)
	lea		TEXPTBL(%pc),%a1	# LOAD ADDRESS OF TABLE OF 2^(J/64)
	fmov.l		INT(%a6),%fp1		# N --> FLOATING FMT
	mov.l		INT(%a6),%d1
	mov.l		%d1,%d2
	and.l		&0x3F,%d1		# D0 IS J
	asl.l		&4,%d1			# DISPLACEMENT FOR 2^(J/64)
	add.l		%d1,%a1			# ADDRESS FOR 2^(J/64)
	asr.l		&6,%d2			# d2 IS L, N = 64L + J
	mov.l		%d2,%d1
	asr.l		&1,%d1			# D0 IS M
	sub.l		%d1,%d2			# d2 IS M', N = 64(M+M') + J
	add.l		&0x3FFF,%d2

#--SUMMARY: a1 IS ADDRESS FOR THE LEADING PORTION OF 2^(J/64),
#--D0 IS M WHERE N = 64(M+M') + J. NOTE THAT |M| <= 16140 BY DESIGN.
#--ADJFACT = 2^(M').
#--REGISTERS SAVED SO FAR ARE (IN ORDER) FPCR, D0, FP1, a1, AND FP2.

	fmovm.x		&0x0c,-(%sp)		# save fp2/fp3

	fmul.s		&0x3C800000,%fp1	# (1/64)*N
	mov.l		(%a1)+,FACT1(%a6)
	mov.l		(%a1)+,FACT1HI(%a6)
	mov.l		(%a1)+,FACT1LOW(%a6)
	mov.w		(%a1)+,FACT2(%a6)

	fsub.x		%fp1,%fp0		# X - (1/64)*INT(64 X)

	mov.w		(%a1)+,FACT2HI(%a6)
	clr.w		FACT2HI+2(%a6)
	clr.l		FACT2LOW(%a6)
	add.w		%d1,FACT1(%a6)
	fmul.x		LOG2(%pc),%fp0		# FP0 IS R
	add.w		%d1,FACT2(%a6)

	bra.w		expr

EXPBORS:
#--FPCR, D0 SAVED
	cmp.l		%d1,&0x3FFF8000
	bgt.b		TEXPBIG

#--|X| IS SMALL, RETURN 1 + X

	fmov.l		%d0,%fpcr		# restore users round prec,mode
	fadd.s		&0x3F800000,%fp0	# RETURN 1 + X
	bra		t_pinx2

TEXPBIG:
#--|X| IS LARGE, GENERATE OVERFLOW IF X > 0; ELSE GENERATE UNDERFLOW
#--REGISTERS SAVE SO FAR ARE FPCR AND  D0
	mov.l		X(%a6),%d1
	cmp.l		%d1,&0
	blt.b		EXPNEG

	bra		t_ovfl2			# t_ovfl expects positive value

EXPNEG:
	bra		t_unfl2			# t_unfl expects positive value

	global		stwotoxd
stwotoxd:
#--ENTRY POINT FOR 2**(X) FOR DENORMALIZED ARGUMENT

	fmov.l		%d0,%fpcr		# set user's rounding mode/precision
	fmov.s		&0x3F800000,%fp0	# RETURN 1 + X
	mov.l		(%a0),%d1
	or.l		&0x00800001,%d1
	fadd.s		%d1,%fp0
	bra		t_pinx2

	global		stentox
#--ENTRY POINT FOR 10**(X), HERE X IS FINITE, NON-ZERO, AND NOT NAN'S
stentox:
	fmovm.x		(%a0),&0x80		# LOAD INPUT

	mov.l		(%a0),%d1
	mov.w		4(%a0),%d1
	fmov.x		%fp0,X(%a6)
	and.l		&0x7FFFFFFF,%d1

	cmp.l		%d1,&0x3FB98000		# |X| >= 2**(-70)?
	bge.b		TENOK1
	bra.w		EXPBORS

TENOK1:
	cmp.l		%d1,&0x400B9B07		# |X| <= 16480*log2/log10 ?
	ble.b		TENMAIN
	bra.w		EXPBORS

TENMAIN:
#--USUAL CASE, 2^(-70) <= |X| <= 16480 LOG 2 / LOG 10

	fmov.x		%fp0,%fp1
	fmul.d		L2TEN64(%pc),%fp1	# X*64*LOG10/LOG2
	fmov.l		%fp1,INT(%a6)		# N=INT(X*64*LOG10/LOG2)
	mov.l		%d2,-(%sp)
	lea		TEXPTBL(%pc),%a1	# LOAD ADDRESS OF TABLE OF 2^(J/64)
	fmov.l		INT(%a6),%fp1		# N --> FLOATING FMT
	mov.l		INT(%a6),%d1
	mov.l		%d1,%d2
	and.l		&0x3F,%d1		# D0 IS J
	asl.l		&4,%d1			# DISPLACEMENT FOR 2^(J/64)
	add.l		%d1,%a1			# ADDRESS FOR 2^(J/64)
	asr.l		&6,%d2			# d2 IS L, N = 64L + J
	mov.l		%d2,%d1
	asr.l		&1,%d1			# D0 IS M
	sub.l		%d1,%d2			# d2 IS M', N = 64(M+M') + J
	add.l		&0x3FFF,%d2

#--SUMMARY: a1 IS ADDRESS FOR THE LEADING PORTION OF 2^(J/64),
#--D0 IS M WHERE N = 64(M+M') + J. NOTE THAT |M| <= 16140 BY DESIGN.
#--ADJFACT = 2^(M').
#--REGISTERS SAVED SO FAR ARE (IN ORDER) FPCR, D0, FP1, a1, AND FP2.
	fmovm.x		&0x0c,-(%sp)		# save fp2/fp3

	fmov.x		%fp1,%fp2

	fmul.d		L10TWO1(%pc),%fp1	# N*(LOG2/64LOG10)_LEAD
	mov.l		(%a1)+,FACT1(%a6)

	fmul.x		L10TWO2(%pc),%fp2	# N*(LOG2/64LOG10)_TRAIL

	mov.l		(%a1)+,FACT1HI(%a6)
	mov.l		(%a1)+,FACT1LOW(%a6)
	fsub.x		%fp1,%fp0		# X - N L_LEAD
	mov.w		(%a1)+,FACT2(%a6)

	fsub.x		%fp2,%fp0		# X - N L_TRAIL

	mov.w		(%a1)+,FACT2HI(%a6)
	clr.w		FACT2HI+2(%a6)
	clr.l		FACT2LOW(%a6)

	fmul.x		LOG10(%pc),%fp0		# FP0 IS R
	add.w		%d1,FACT1(%a6)
	add.w		%d1,FACT2(%a6)

expr:
#--FPCR, FP2, FP3 ARE SAVED IN ORDER AS SHOWN.
#--ADJFACT CONTAINS 2**(M'), FACT1 + FACT2 = 2**(M) * 2**(J/64).
#--FP0 IS R. THE FOLLOWING CODE COMPUTES
#--	2**(M'+M) * 2**(J/64) * EXP(R)

	fmov.x		%fp0,%fp1
	fmul.x		%fp1,%fp1		# FP1 IS S = R*R

	fmov.d		EXPA5(%pc),%fp2		# FP2 IS A5
	fmov.d		EXPA4(%pc),%fp3		# FP3 IS A4

	fmul.x		%fp1,%fp2		# FP2 IS S*A5
	fmul.x		%fp1,%fp3		# FP3 IS S*A4

	fadd.d		EXPA3(%pc),%fp2		# FP2 IS A3+S*A5
	fadd.d		EXPA2(%pc),%fp3		# FP3 IS A2+S*A4

	fmul.x		%fp1,%fp2		# FP2 IS S*(A3+S*A5)
	fmul.x		%fp1,%fp3		# FP3 IS S*(A2+S*A4)

	fadd.d		EXPA1(%pc),%fp2		# FP2 IS A1+S*(A3+S*A5)
	fmul.x		%fp0,%fp3		# FP3 IS R*S*(A2+S*A4)

	fmul.x		%fp1,%fp2		# FP2 IS S*(A1+S*(A3+S*A5))
	fadd.x		%fp3,%fp0		# FP0 IS R+R*S*(A2+S*A4)
	fadd.x		%fp2,%fp0		# FP0 IS EXP(R) - 1

	fmovm.x		(%sp)+,&0x30		# restore fp2/fp3

#--FINAL RECONSTRUCTION PROCESS
#--EXP(X) = 2^M*2^(J/64) + 2^M*2^(J/64)*(EXP(R)-1)  -  (1 OR 0)

	fmul.x		FACT1(%a6),%fp0
	fadd.x		FACT2(%a6),%fp0
	fadd.x		FACT1(%a6),%fp0

	fmov.l		%d0,%fpcr		# restore users round prec,mode
	mov.w		%d2,ADJFACT(%a6)	# INSERT EXPONENT
	mov.l		(%sp)+,%d2
	mov.l		&0x80000000,ADJFACT+4(%a6)
	clr.l		ADJFACT+8(%a6)
	mov.b		&FMUL_OP,%d1		# last inst is MUL
	fmul.x		ADJFACT(%a6),%fp0	# FINAL ADJUSTMENT
	bra		t_catch

	global		stentoxd
stentoxd:
#--ENTRY POINT FOR 10**(X) FOR DENORMALIZED ARGUMENT

	fmov.l		%d0,%fpcr		# set user's rounding mode/precision
	fmov.s		&0x3F800000,%fp0	# RETURN 1 + X
	mov.l		(%a0),%d1
	or.l		&0x00800001,%d1
	fadd.s		%d1,%fp0
	bra		t_pinx2

#########################################################################
# smovcr(): returns the ROM constant at the offset specified in d1	#
#	    rounded to the mode and precision specified in d0. 		#
#									#
# INPUT	***************************************************************	#
# 	d0 = rnd prec,mode						#
#	d1 = ROM offset							#
#									#
# OUTPUT **************************************************************	#
#	fp0 = the ROM constant rounded to the user's rounding mode,prec	#
#									#
#########################################################################

	global		smovcr
smovcr:
	mov.l		%d1,-(%sp)		# save rom offset for a sec

	lsr.b		&0x4,%d0		# shift ctrl bits to lo
	mov.l		%d0,%d1			# make a copy 
	andi.w		&0x3,%d1		# extract rnd mode
	andi.w		&0xc,%d0		# extract rnd prec
	swap		%d0			# put rnd prec in hi
	mov.w		%d1,%d0			# put rnd mode in lo

	mov.l		(%sp)+,%d1		# get rom offset

#
# check range of offset
#
	tst.b		%d1			# if zero, offset is to pi
	beq.b		pi_tbl			# it is pi
	cmpi.b		%d1,&0x0a		# check range $01 - $0a
	ble.b		z_val			# if in this range, return zero
	cmpi.b		%d1,&0x0e		# check range $0b - $0e
	ble.b		sm_tbl			# valid constants in this range
	cmpi.b		%d1,&0x2f		# check range $10 - $2f
	ble.b		z_val			# if in this range, return zero 
	cmpi.b		%d1,&0x3f		# check range $30 - $3f
	ble.b		bg_tbl			# valid constants in this range

z_val:
	bra.l		ld_pzero		# return a zero

#
# the answer is PI rounded to the proper precision.
#
# fetch a pointer to the answer table relating to the proper rounding
# precision.
#
pi_tbl:
	tst.b		%d0			# is rmode RN?
	bne.b		pi_not_rn		# no
pi_rn:
	lea.l		PIRN(%pc),%a0		# yes; load PI RN table addr
	bra.w		set_finx
pi_not_rn:
	cmpi.b		%d0,&rp_mode		# is rmode RP?
	beq.b		pi_rp			# yes
pi_rzrm:
	lea.l		PIRZRM(%pc),%a0		# no; load PI RZ,RM table addr
	bra.b		set_finx
pi_rp:
	lea.l		PIRP(%pc),%a0		# load PI RP table addr
	bra.b		set_finx

#
# the answer is one of:
#	$0B	log10(2)	(inexact)
#	$0C	e		(inexact)
#	$0D	log2(e)		(inexact)
#	$0E	log10(e)	(exact)
# 
# fetch a pointer to the answer table relating to the proper rounding
# precision.
#
sm_tbl:
	subi.b		&0xb,%d1		# make offset in 0-4 range
	tst.b		%d0			# is rmode RN?
	bne.b		sm_not_rn		# no
sm_rn:
	lea.l		SMALRN(%pc),%a0		# yes; load RN table addr
sm_tbl_cont:
	cmpi.b		%d1,&0x2		# is result log10(e)?
	ble.b		set_finx		# no; answer is inexact
	bra.b		no_finx			# yes; answer is exact
sm_not_rn:
	cmpi.b		%d0,&rp_mode		# is rmode RP?
	beq.b		sm_rp			# yes
sm_rzrm:
	lea.l		SMALRZRM(%pc),%a0	# no; load RZ,RM table addr
	bra.b		sm_tbl_cont
sm_rp:
	lea.l		SMALRP(%pc),%a0		# load RP table addr
	bra.b		sm_tbl_cont

#
# the answer is one of:
#	$30	ln(2)		(inexact)
#	$31	ln(10)		(inexact)
#	$32	10^0		(exact)
#	$33	10^1		(exact)
#	$34	10^2		(exact)
#	$35	10^4		(exact)
#	$36	10^8		(exact)
#	$37	10^16		(exact)
#	$38	10^32		(inexact)
#	$39	10^64		(inexact)
#	$3A	10^128		(inexact)
#	$3B	10^256		(inexact)
#	$3C	10^512		(inexact)
#	$3D	10^1024		(inexact)
#	$3E	10^2048		(inexact)
#	$3F	10^4096		(inexact)
#
# fetch a pointer to the answer table relating to the proper rounding
# precision.
#
bg_tbl:
	subi.b		&0x30,%d1		# make offset in 0-f range
	tst.b		%d0			# is rmode RN?
	bne.b		bg_not_rn		# no
bg_rn:
	lea.l		BIGRN(%pc),%a0		# yes; load RN table addr
bg_tbl_cont:
	cmpi.b		%d1,&0x1		# is offset <= $31?
	ble.b		set_finx		# yes; answer is inexact
	cmpi.b		%d1,&0x7		# is $32 <= offset <= $37?
	ble.b		no_finx			# yes; answer is exact
	bra.b		set_finx		# no; answer is inexact
bg_not_rn:
	cmpi.b		%d0,&rp_mode		# is rmode RP?
	beq.b		bg_rp			# yes
bg_rzrm:
	lea.l		BIGRZRM(%pc),%a0	# no; load RZ,RM table addr
	bra.b		bg_tbl_cont
bg_rp:
	lea.l		BIGRP(%pc),%a0		# load RP table addr
	bra.b		bg_tbl_cont

# answer is inexact, so set INEX2 and AINEX in the user's FPSR.
set_finx:
	ori.l		&inx2a_mask,USER_FPSR(%a6) # set INEX2/AINEX
no_finx:
	mulu.w		&0xc,%d1		# offset points into tables
	swap		%d0			# put rnd prec in lo word
	tst.b		%d0			# is precision extended?

	bne.b		not_ext			# if xprec, do not call round

# Precision is extended
	fmovm.x		(%a0,%d1.w),&0x80	# return result in fp0
	rts

# Precision is single or double
not_ext:
	swap		%d0			# rnd prec in upper word

# call round() to round the answer to the proper precision.
# exponents out of range for single or double DO NOT cause underflow 
# or overflow.
	mov.w		0x0(%a0,%d1.w),FP_SCR1_EX(%a6) # load first word
	mov.l		0x4(%a0,%d1.w),FP_SCR1_HI(%a6) # load second word
	mov.l		0x8(%a0,%d1.w),FP_SCR1_LO(%a6) # load third word
	mov.l		%d0,%d1
	clr.l		%d0			# clear g,r,s
	lea		FP_SCR1(%a6),%a0	# pass ptr to answer
	clr.w		LOCAL_SGN(%a0)		# sign always positive
	bsr.l		_round			# round the mantissa

	fmovm.x		(%a0),&0x80		# return rounded result in fp0
	rts

	align		0x4

PIRN:	long		0x40000000,0xc90fdaa2,0x2168c235	# pi
PIRZRM:	long		0x40000000,0xc90fdaa2,0x2168c234	# pi
PIRP:	long		0x40000000,0xc90fdaa2,0x2168c235	# pi

SMALRN:	long		0x3ffd0000,0x9a209a84,0xfbcff798	# log10(2)
	long		0x40000000,0xadf85458,0xa2bb4a9a	# e
	long		0x3fff0000,0xb8aa3b29,0x5c17f0bc	# log2(e)
	long		0x3ffd0000,0xde5bd8a9,0x37287195	# log10(e)
	long		0x00000000,0x00000000,0x00000000	# 0.0

SMALRZRM:
	long		0x3ffd0000,0x9a209a84,0xfbcff798	# log10(2)
	long		0x40000000,0xadf85458,0xa2bb4a9a	# e
	long		0x3fff0000,0xb8aa3b29,0x5c17f0bb	# log2(e)
	long		0x3ffd0000,0xde5bd8a9,0x37287195	# log10(e)
	long		0x00000000,0x00000000,0x00000000	# 0.0

SMALRP:	long		0x3ffd0000,0x9a209a84,0xfbcff799	# log10(2)
	long		0x40000000,0xadf85458,0xa2bb4a9b	# e
	long		0x3fff0000,0xb8aa3b29,0x5c17f0bc	# log2(e)
	long		0x3ffd0000,0xde5bd8a9,0x37287195	# log10(e)
	long		0x00000000,0x00000000,0x00000000	# 0.0

BIGRN:	long		0x3ffe0000,0xb17217f7,0xd1cf79ac	# ln(2)
	long		0x40000000,0x935d8ddd,0xaaa8ac17	# ln(10)

	long		0x3fff0000,0x80000000,0x00000000	# 10 ^ 0
	long		0x40020000,0xA0000000,0x00000000	# 10 ^ 1
	long		0x40050000,0xC8000000,0x00000000	# 10 ^ 2
	long		0x400C0000,0x9C400000,0x00000000	# 10 ^ 4
	long		0x40190000,0xBEBC2000,0x00000000	# 10 ^ 8
	long		0x40340000,0x8E1BC9BF,0x04000000	# 10 ^ 16
	long		0x40690000,0x9DC5ADA8,0x2B70B59E	# 10 ^ 32
	long		0x40D30000,0xC2781F49,0xFFCFA6D5	# 10 ^ 64
	long		0x41A80000,0x93BA47C9,0x80E98CE0	# 10 ^ 128
	long		0x43510000,0xAA7EEBFB,0x9DF9DE8E	# 10 ^ 256
	long		0x46A30000,0xE319A0AE,0xA60E91C7	# 10 ^ 512
	long		0x4D480000,0xC9767586,0x81750C17	# 10 ^ 1024
	long		0x5A920000,0x9E8B3B5D,0xC53D5DE5	# 10 ^ 2048
	long		0x75250000,0xC4605202,0x8A20979B	# 10 ^ 4096

BIGRZRM:
	long		0x3ffe0000,0xb17217f7,0xd1cf79ab	# ln(2)
	long		0x40000000,0x935d8ddd,0xaaa8ac16	# ln(10)

	long		0x3fff0000,0x80000000,0x00000000	# 10 ^ 0
	long		0x40020000,0xA0000000,0x00000000	# 10 ^ 1
	long		0x40050000,0xC8000000,0x00000000	# 10 ^ 2
	long		0x400C0000,0x9C400000,0x00000000	# 10 ^ 4
	long		0x40190000,0xBEBC2000,0x00000000	# 10 ^ 8
	long		0x40340000,0x8E1BC9BF,0x04000000	# 10 ^ 16
	long		0x40690000,0x9DC5ADA8,0x2B70B59D	# 10 ^ 32
	long		0x40D30000,0xC2781F49,0xFFCFA6D5	# 10 ^ 64
	long		0x41A80000,0x93BA47C9,0x80E98CDF	# 10 ^ 128
	long		0x43510000,0xAA7EEBFB,0x9DF9DE8D	# 10 ^ 256
	long		0x46A30000,0xE319A0AE,0xA60E91C6	# 10 ^ 512
	long		0x4D480000,0xC9767586,0x81750C17	# 10 ^ 1024
	long		0x5A920000,0x9E8B3B5D,0xC53D5DE4	# 10 ^ 2048
	long		0x75250000,0xC4605202,0x8A20979A	# 10 ^ 4096

BIGRP:
	long		0x3ffe0000,0xb17217f7,0xd1cf79ac	# ln(2)
	long		0x40000000,0x935d8ddd,0xaaa8ac17	# ln(10)

	long		0x3fff0000,0x80000000,0x00000000	# 10 ^ 0
	long		0x40020000,0xA0000000,0x00000000	# 10 ^ 1
	long		0x40050000,0xC8000000,0x00000000	# 10 ^ 2
	long		0x400C0000,0x9C400000,0x00000000	# 10 ^ 4
	long		0x40190000,0xBEBC2000,0x00000000	# 10 ^ 8
	long		0x40340000,0x8E1BC9BF,0x04000000	# 10 ^ 16
	long		0x40690000,0x9DC5ADA8,0x2B70B59E	# 10 ^ 32
	long		0x40D30000,0xC2781F49,0xFFCFA6D6	# 10 ^ 64
	long		0x41A80000,0x93BA47C9,0x80E98CE0	# 10 ^ 128
	long		0x43510000,0xAA7EEBFB,0x9DF9DE8E	# 10 ^ 256
	long		0x46A30000,0xE319A0AE,0xA60E91C7	# 10 ^ 512
	long		0x4D480000,0xC9767586,0x81750C18	# 10 ^ 1024
	long		0x5A920000,0x9E8B3B5D,0xC53D5DE5	# 10 ^ 2048
	long		0x75250000,0xC4605202,0x8A20979B	# 10 ^ 4096

#########################################################################
# sscale(): computes the destination operand scaled by the source	#
#	    operand. If the absoulute value of the source operand is 	#
#	    >= 2^14, an overflow or underflow is returned.		#
#									#
# INPUT *************************************************************** #
#	a0  = pointer to double-extended source operand X		#
#	a1  = pointer to double-extended destination operand Y		#
#									#
# OUTPUT ************************************************************** #
#	fp0 =  scale(X,Y)						#
#									#
#########################################################################

set	SIGN,		L_SCR1

	global		sscale
sscale:
	mov.l		%d0,-(%sp)		# store off ctrl bits for now

	mov.w		DST_EX(%a1),%d1		# get dst exponent
	smi.b		SIGN(%a6)		# use SIGN to hold dst sign
	andi.l		&0x00007fff,%d1		# strip sign from dst exp

	mov.w		SRC_EX(%a0),%d0		# check src bounds
	andi.w		&0x7fff,%d0		# clr src sign bit
	cmpi.w		%d0,&0x3fff		# is src ~ ZERO?
	blt.w		src_small		# yes
	cmpi.w		%d0,&0x400c		# no; is src too big?
	bgt.w		src_out			# yes

#
# Source is within 2^14 range.
#
src_ok:
	fintrz.x	SRC(%a0),%fp0		# calc int of src
	fmov.l		%fp0,%d0		# int src to d0
# don't want any accrued bits from the fintrz showing up later since
# we may need to read the fpsr for the last fp op in t_catch2().
	fmov.l		&0x0,%fpsr

	tst.b		DST_HI(%a1)		# is dst denormalized?
	bmi.b		sok_norm

# the dst is a DENORM. normalize the DENORM and add the adjustment to
# the src value. then, jump to the norm part of the routine.
sok_dnrm:
	mov.l		%d0,-(%sp)		# save src for now

	mov.w		DST_EX(%a1),FP_SCR0_EX(%a6) # make a copy
	mov.l		DST_HI(%a1),FP_SCR0_HI(%a6)
	mov.l		DST_LO(%a1),FP_SCR0_LO(%a6)

	lea		FP_SCR0(%a6),%a0	# pass ptr to DENORM
	bsr.l		norm			# normalize the DENORM
	neg.l		%d0
	add.l		(%sp)+,%d0		# add adjustment to src

	fmovm.x		FP_SCR0(%a6),&0x80	# load normalized DENORM

	cmpi.w		%d0,&-0x3fff		# is the shft amt really low?
	bge.b		sok_norm2		# thank goodness no

# the multiply factor that we're trying to create should be a denorm
# for the multiply to work. therefore, we're going to actually do a 
# multiply with a denorm which will cause an unimplemented data type
# exception to be put into the machine which will be caught and corrected
# later. we don't do this with the DENORMs above because this method
# is slower. but, don't fret, I don't see it being used much either.
	fmov.l		(%sp)+,%fpcr		# restore user fpcr
	mov.l		&0x80000000,%d1		# load normalized mantissa
	subi.l		&-0x3fff,%d0		# how many should we shift?
	neg.l		%d0			# make it positive
	cmpi.b		%d0,&0x20		# is it > 32?
	bge.b		sok_dnrm_32		# yes
	lsr.l		%d0,%d1			# no; bit stays in upper lw
	clr.l		-(%sp)			# insert zero low mantissa
	mov.l		%d1,-(%sp)		# insert new high mantissa
	clr.l		-(%sp)			# make zero exponent
	bra.b		sok_norm_cont	
sok_dnrm_32:
	subi.b		&0x20,%d0		# get shift count
	lsr.l		%d0,%d1			# make low mantissa longword
	mov.l		%d1,-(%sp)		# insert new low mantissa
	clr.l		-(%sp)			# insert zero high mantissa
	clr.l		-(%sp)			# make zero exponent
	bra.b		sok_norm_cont
	
# the src will force the dst to a DENORM value or worse. so, let's
# create an fp multiply that will create the result.
sok_norm:
	fmovm.x		DST(%a1),&0x80		# load fp0 with normalized src
sok_norm2:
	fmov.l		(%sp)+,%fpcr		# restore user fpcr

	addi.w		&0x3fff,%d0		# turn src amt into exp value
	swap		%d0			# put exponent in high word
	clr.l		-(%sp)			# insert new exponent
	mov.l		&0x80000000,-(%sp)	# insert new high mantissa
	mov.l		%d0,-(%sp)		# insert new lo mantissa

sok_norm_cont:
	fmov.l		%fpcr,%d0		# d0 needs fpcr for t_catch2
	mov.b		&FMUL_OP,%d1		# last inst is MUL
	fmul.x		(%sp)+,%fp0		# do the multiply
	bra		t_catch2		# catch any exceptions

#
# Source is outside of 2^14 range.  Test the sign and branch
# to the appropriate exception handler.
#
src_out:
	mov.l		(%sp)+,%d0		# restore ctrl bits
	exg		%a0,%a1			# swap src,dst ptrs
	tst.b		SRC_EX(%a1)		# is src negative?
	bmi		t_unfl			# yes; underflow
	bra		t_ovfl_sc		# no; overflow

#
# The source input is below 1, so we check for denormalized numbers
# and set unfl.
#
src_small:
	tst.b		DST_HI(%a1)		# is dst denormalized?
	bpl.b		ssmall_done		# yes

	mov.l		(%sp)+,%d0
	fmov.l		%d0,%fpcr		# no; load control bits
	mov.b		&FMOV_OP,%d1		# last inst is MOVE
	fmov.x		DST(%a1),%fp0		# simply return dest
	bra		t_catch2
ssmall_done:
	mov.l		(%sp)+,%d0		# load control bits into d1
	mov.l		%a1,%a0			# pass ptr to dst
	bra		t_resdnrm

#########################################################################
# smod(): computes the fp MOD of the input values X,Y.			#
# srem(): computes the fp (IEEE) REM of the input values X,Y.		#
#									#
# INPUT *************************************************************** #
#	a0 = pointer to extended precision input X			#
#	a1 = pointer to extended precision input Y			#
#	d0 = round precision,mode					#
#									#
# 	The input operands X and Y can be either normalized or 		#
#	denormalized.							#
#									#
# OUTPUT ************************************************************** #
#      fp0 = FREM(X,Y) or FMOD(X,Y)					#
#									#
# ALGORITHM *********************************************************** #
#									#
#       Step 1.  Save and strip signs of X and Y: signX := sign(X),	#
#                signY := sign(Y), X := |X|, Y := |Y|, 			#
#                signQ := signX EOR signY. Record whether MOD or REM	#
#                is requested.						#
#									#
#       Step 2.  Set L := expo(X)-expo(Y), k := 0, Q := 0.		#
#                If (L < 0) then					#
#                   R := X, go to Step 4.				#
#                else							#
#                   R := 2^(-L)X, j := L.				#
#                endif							#
#									#
#       Step 3.  Perform MOD(X,Y)					#
#            3.1 If R = Y, go to Step 9.				#
#            3.2 If R > Y, then { R := R - Y, Q := Q + 1}		#
#            3.3 If j = 0, go to Step 4.				#
#            3.4 k := k + 1, j := j - 1, Q := 2Q, R := 2R. Go to	#
#                Step 3.1.						#
#									#
#       Step 4.  At this point, R = X - QY = MOD(X,Y). Set		#
#                Last_Subtract := false (used in Step 7 below). If	#
#                MOD is requested, go to Step 6. 			#
#									#
#       Step 5.  R = MOD(X,Y), but REM(X,Y) is requested.		#
#            5.1 If R < Y/2, then R = MOD(X,Y) = REM(X,Y). Go to	#
#                Step 6.						#
#            5.2 If R > Y/2, then { set Last_Subtract := true,		#
#                Q := Q + 1, Y := signY*Y }. Go to Step 6.		#
#            5.3 This is the tricky case of R = Y/2. If Q is odd,	#
#                then { Q := Q + 1, signX := -signX }.			#
#									#
#       Step 6.  R := signX*R.						#
#									#
#       Step 7.  If Last_Subtract = true, R := R - Y.			#
#									#
#       Step 8.  Return signQ, last 7 bits of Q, and R as required.	#
#									#
#       Step 9.  At this point, R = 2^(-j)*X - Q Y = Y. Thus,		#
#                X = 2^(j)*(Q+1)Y. set Q := 2^(j)*(Q+1),		#
#                R := 0. Return signQ, last 7 bits of Q, and R.		#
#									#
#########################################################################

	set		Mod_Flag,L_SCR3
	set		Sc_Flag,L_SCR3+1

	set		SignY,L_SCR2
	set		SignX,L_SCR2+2
	set		SignQ,L_SCR3+2

	set		Y,FP_SCR0
	set		Y_Hi,Y+4
	set		Y_Lo,Y+8

	set		R,FP_SCR1
	set		R_Hi,R+4
	set		R_Lo,R+8

Scale:
	long		0x00010000,0x80000000,0x00000000,0x00000000

	global		smod
smod:
	clr.b		FPSR_QBYTE(%a6)
	mov.l		%d0,-(%sp)		# save ctrl bits
	clr.b		Mod_Flag(%a6)
	bra.b		Mod_Rem

	global		srem
srem:
	clr.b		FPSR_QBYTE(%a6)
	mov.l		%d0,-(%sp)		# save ctrl bits
	mov.b		&0x1,Mod_Flag(%a6)

Mod_Rem:
#..Save sign of X and Y
	movm.l		&0x3f00,-(%sp)		# save data registers
	mov.w		SRC_EX(%a0),%d3
	mov.w		%d3,SignY(%a6)
	and.l		&0x00007FFF,%d3		# Y := |Y|

#
	mov.l		SRC_HI(%a0),%d4
	mov.l		SRC_LO(%a0),%d5		# (D3,D4,D5) is |Y|

	tst.l		%d3
	bne.b		Y_Normal

	mov.l		&0x00003FFE,%d3		# $3FFD + 1
	tst.l		%d4
	bne.b		HiY_not0

HiY_0:
	mov.l		%d5,%d4
	clr.l		%d5
	sub.l		&32,%d3
	clr.l		%d6
	bfffo		%d4{&0:&32},%d6
	lsl.l		%d6,%d4
	sub.l		%d6,%d3			# (D3,D4,D5) is normalized
#	                                        ...with bias $7FFD
	bra.b		Chk_X

HiY_not0:
	clr.l		%d6
	bfffo		%d4{&0:&32},%d6
	sub.l		%d6,%d3
	lsl.l		%d6,%d4
	mov.l		%d5,%d7			# a copy of D5
	lsl.l		%d6,%d5
	neg.l		%d6
	add.l		&32,%d6
	lsr.l		%d6,%d7
	or.l		%d7,%d4			# (D3,D4,D5) normalized
#                                       ...with bias $7FFD
	bra.b		Chk_X

Y_Normal:
	add.l		&0x00003FFE,%d3		# (D3,D4,D5) normalized
#                                       ...with bias $7FFD

Chk_X:
	mov.w		DST_EX(%a1),%d0
	mov.w		%d0,SignX(%a6)
	mov.w		SignY(%a6),%d1
	eor.l		%d0,%d1
	and.l		&0x00008000,%d1
	mov.w		%d1,SignQ(%a6)		# sign(Q) obtained
	and.l		&0x00007FFF,%d0
	mov.l		DST_HI(%a1),%d1
	mov.l		DST_LO(%a1),%d2		# (D0,D1,D2) is |X|
	tst.l		%d0
	bne.b		X_Normal
	mov.l		&0x00003FFE,%d0
	tst.l		%d1
	bne.b		HiX_not0

HiX_0:
	mov.l		%d2,%d1
	clr.l		%d2
	sub.l		&32,%d0
	clr.l		%d6
	bfffo		%d1{&0:&32},%d6
	lsl.l		%d6,%d1
	sub.l		%d6,%d0			# (D0,D1,D2) is normalized
#                                       ...with bias $7FFD
	bra.b		Init

HiX_not0:
	clr.l		%d6
	bfffo		%d1{&0:&32},%d6
	sub.l		%d6,%d0
	lsl.l		%d6,%d1
	mov.l		%d2,%d7			# a copy of D2
	lsl.l		%d6,%d2
	neg.l		%d6
	add.l		&32,%d6
	lsr.l		%d6,%d7
	or.l		%d7,%d1			# (D0,D1,D2) normalized
#                                       ...with bias $7FFD
	bra.b		Init

X_Normal:
	add.l		&0x00003FFE,%d0		# (D0,D1,D2) normalized
#                                       ...with bias $7FFD

Init:
#
	mov.l		%d3,L_SCR1(%a6)		# save biased exp(Y)
	mov.l		%d0,-(%sp)		# save biased exp(X)
	sub.l		%d3,%d0			# L := expo(X)-expo(Y)

	clr.l		%d6			# D6 := carry <- 0
	clr.l		%d3			# D3 is Q
	mov.l		&0,%a1			# A1 is k; j+k=L, Q=0

#..(Carry,D1,D2) is R
	tst.l		%d0
	bge.b		Mod_Loop_pre

#..expo(X) < expo(Y). Thus X = mod(X,Y)
#
	mov.l		(%sp)+,%d0		# restore d0
	bra.w		Get_Mod

Mod_Loop_pre:
	addq.l		&0x4,%sp		# erase exp(X)
#..At this point  R = 2^(-L)X; Q = 0; k = 0; and  k+j = L
Mod_Loop:
	tst.l		%d6			# test carry bit
	bgt.b		R_GT_Y

#..At this point carry = 0, R = (D1,D2), Y = (D4,D5)
	cmp.l		%d1,%d4			# compare hi(R) and hi(Y)
	bne.b		R_NE_Y
	cmp.l		%d2,%d5			# compare lo(R) and lo(Y)
	bne.b		R_NE_Y

#..At this point, R = Y
	bra.w		Rem_is_0

R_NE_Y:
#..use the borrow of the previous compare
	bcs.b		R_LT_Y			# borrow is set iff R < Y

R_GT_Y:
#..If Carry is set, then Y < (Carry,D1,D2) < 2Y. Otherwise, Carry = 0
#..and Y < (D1,D2) < 2Y. Either way, perform R - Y
	sub.l		%d5,%d2			# lo(R) - lo(Y)
	subx.l		%d4,%d1			# hi(R) - hi(Y)
	clr.l		%d6			# clear carry
	addq.l		&1,%d3			# Q := Q + 1

R_LT_Y:
#..At this point, Carry=0, R < Y. R = 2^(k-L)X - QY; k+j = L; j >= 0.
	tst.l		%d0			# see if j = 0.
	beq.b		PostLoop

	add.l		%d3,%d3			# Q := 2Q
	add.l		%d2,%d2			# lo(R) = 2lo(R)
	roxl.l		&1,%d1			# hi(R) = 2hi(R) + carry
	scs		%d6			# set Carry if 2(R) overflows
	addq.l		&1,%a1			# k := k+1
	subq.l		&1,%d0			# j := j - 1
#..At this point, R=(Carry,D1,D2) = 2^(k-L)X - QY, j+k=L, j >= 0, R < 2Y.

	bra.b		Mod_Loop

PostLoop:
#..k = L, j = 0, Carry = 0, R = (D1,D2) = X - QY, R < Y.

#..normalize R.
	mov.l		L_SCR1(%a6),%d0		# new biased expo of R
	tst.l		%d1
	bne.b		HiR_not0

HiR_0:
	mov.l		%d2,%d1
	clr.l		%d2
	sub.l		&32,%d0
	clr.l		%d6
	bfffo		%d1{&0:&32},%d6
	lsl.l		%d6,%d1
	sub.l		%d6,%d0			# (D0,D1,D2) is normalized
#                                       ...with bias $7FFD
	bra.b		Get_Mod

HiR_not0:
	clr.l		%d6
	bfffo		%d1{&0:&32},%d6
	bmi.b		Get_Mod			# already normalized
	sub.l		%d6,%d0
	lsl.l		%d6,%d1
	mov.l		%d2,%d7			# a copy of D2
	lsl.l		%d6,%d2
	neg.l		%d6
	add.l		&32,%d6
	lsr.l		%d6,%d7
	or.l		%d7,%d1			# (D0,D1,D2) normalized

#
Get_Mod:
	cmp.l		%d0,&0x000041FE
	bge.b		No_Scale
Do_Scale:
	mov.w		%d0,R(%a6)
	mov.l		%d1,R_Hi(%a6)
	mov.l		%d2,R_Lo(%a6)
	mov.l		L_SCR1(%a6),%d6
	mov.w		%d6,Y(%a6)
	mov.l		%d4,Y_Hi(%a6)
	mov.l		%d5,Y_Lo(%a6)
	fmov.x		R(%a6),%fp0		# no exception
	mov.b		&1,Sc_Flag(%a6)
	bra.b		ModOrRem
No_Scale:
	mov.l		%d1,R_Hi(%a6)
	mov.l		%d2,R_Lo(%a6)
	sub.l		&0x3FFE,%d0
	mov.w		%d0,R(%a6)
	mov.l		L_SCR1(%a6),%d6
	sub.l		&0x3FFE,%d6
	mov.l		%d6,L_SCR1(%a6)
	fmov.x		R(%a6),%fp0
	mov.w		%d6,Y(%a6)
	mov.l		%d4,Y_Hi(%a6)
	mov.l		%d5,Y_Lo(%a6)
	clr.b		Sc_Flag(%a6)

#
ModOrRem:
	tst.b		Mod_Flag(%a6)
	beq.b		Fix_Sign

	mov.l		L_SCR1(%a6),%d6		# new biased expo(Y)
	subq.l		&1,%d6			# biased expo(Y/2)
	cmp.l		%d0,%d6
	blt.b		Fix_Sign
	bgt.b		Last_Sub

	cmp.l		%d1,%d4
	bne.b		Not_EQ
	cmp.l		%d2,%d5
	bne.b		Not_EQ
	bra.w		Tie_Case

Not_EQ:
	bcs.b		Fix_Sign

Last_Sub:
#
	fsub.x		Y(%a6),%fp0		# no exceptions
	addq.l		&1,%d3			# Q := Q + 1

#
Fix_Sign:
#..Get sign of X
	mov.w		SignX(%a6),%d6
	bge.b		Get_Q
	fneg.x		%fp0

#..Get Q
#
Get_Q:
	clr.l		%d6
	mov.w		SignQ(%a6),%d6		# D6 is sign(Q)
	mov.l		&8,%d7
	lsr.l		%d7,%d6
	and.l		&0x0000007F,%d3		# 7 bits of Q
	or.l		%d6,%d3			# sign and bits of Q
#	swap		%d3
#	fmov.l		%fpsr,%d6
#	and.l		&0xFF00FFFF,%d6
#	or.l		%d3,%d6
#	fmov.l		%d6,%fpsr		# put Q in fpsr
	mov.b		%d3,FPSR_QBYTE(%a6)	# put Q in fpsr

#
Restore:
	movm.l		(%sp)+,&0xfc		#  {%d2-%d7}
	mov.l		(%sp)+,%d0
	fmov.l		%d0,%fpcr
	tst.b		Sc_Flag(%a6)
	beq.b		Finish
	mov.b		&FMUL_OP,%d1		# last inst is MUL
	fmul.x		Scale(%pc),%fp0		# may cause underflow
	bra		t_catch2
# the '040 package did this apparently to see if the dst operand for the 
# preceding fmul was a denorm. but, it better not have been since the 
# algorithm just got done playing with fp0 and expected no exceptions
# as a result. trust me...
#	bra		t_avoid_unsupp		# check for denorm as a
#						;result of the scaling

Finish:
	mov.b		&FMOV_OP,%d1		# last inst is MOVE
	fmov.x		%fp0,%fp0		# capture exceptions & round
	bra		t_catch2

Rem_is_0:
#..R = 2^(-j)X - Q Y = Y, thus R = 0 and quotient = 2^j (Q+1)
	addq.l		&1,%d3
	cmp.l		%d0,&8			# D0 is j 
	bge.b		Q_Big

	lsl.l		%d0,%d3
	bra.b		Set_R_0

Q_Big:
	clr.l		%d3

Set_R_0:
	fmov.s		&0x00000000,%fp0
	clr.b		Sc_Flag(%a6)
	bra.w		Fix_Sign

Tie_Case:
#..Check parity of Q
	mov.l		%d3,%d6
	and.l		&0x00000001,%d6
	tst.l		%d6
	beq.w		Fix_Sign		# Q is even

#..Q is odd, Q := Q + 1, signX := -signX
	addq.l		&1,%d3
	mov.w		SignX(%a6),%d6
	eor.l		&0x00008000,%d6
	mov.w		%d6,SignX(%a6)
	bra.w		Fix_Sign

qnan:	long		0x7fff0000, 0xffffffff, 0xffffffff

#########################################################################
# XDEF ****************************************************************	#
#	t_dz(): Handle DZ exception during transcendental emulation.	#
#	        Sets N bit according to sign of source operand.		#
#	t_dz2(): Handle DZ exception during transcendental emulation.	#
#		 Sets N bit always.					#
#									#
# XREF ****************************************************************	#
#	None								#
#									#
# INPUT ***************************************************************	#
#	a0 = pointer to source operand					#
# 									#
# OUTPUT **************************************************************	#
#	fp0 = default result						#
#									#
# ALGORITHM ***********************************************************	#
#	- Store properly signed INF into fp0.				#
#	- Set FPSR exception status dz bit, ccode inf bit, and 		#
#	  accrued dz bit.						#
#									#
#########################################################################

	global		t_dz
t_dz:
	tst.b		SRC_EX(%a0) 		# no; is src negative?
	bmi.b		t_dz2			# yes

dz_pinf:
	fmov.s		&0x7f800000,%fp0	# return +INF in fp0
	ori.l		&dzinf_mask,USER_FPSR(%a6) # set I/DZ/ADZ
	rts

	global		t_dz2
t_dz2:
	fmov.s		&0xff800000,%fp0	# return -INF in fp0
	ori.l		&dzinf_mask+neg_mask,USER_FPSR(%a6) # set N/I/DZ/ADZ
	rts

#################################################################
# OPERR exception:						#
#	- set FPSR exception status operr bit, condition code 	#
#	  nan bit; Store default NAN into fp0			#
#################################################################
	global		t_operr
t_operr:
	ori.l		&opnan_mask,USER_FPSR(%a6) # set NaN/OPERR/AIOP
	fmovm.x		qnan(%pc),&0x80		# return default NAN in fp0
	rts

#################################################################
# Extended DENORM:						#
# 	- For all functions that have a denormalized input and	#
#	  that f(x)=x, this is the entry point.			#
#	- we only return the EXOP here if either underflow or	#
#	  inexact is enabled.					#
#################################################################

# Entry point for scale w/ extended denorm. The function does
# NOT set INEX2/AUNFL/AINEX.
	global		t_resdnrm
t_resdnrm:
	ori.l		&unfl_mask,USER_FPSR(%a6) # set UNFL
	bra.b		xdnrm_con

	global		t_extdnrm
t_extdnrm:
	ori.l		&unfinx_mask,USER_FPSR(%a6) # set UNFL/INEX2/AUNFL/AINEX

xdnrm_con:
	mov.l		%a0,%a1			# make copy of src ptr
	mov.l		%d0,%d1			# make copy of rnd prec,mode
	andi.b		&0xc0,%d1		# extended precision?
	bne.b		xdnrm_sd		# no

# result precision is extended.
	tst.b		LOCAL_EX(%a0)		# is denorm negative?
	bpl.b		xdnrm_exit		# no

	bset		&neg_bit,FPSR_CC(%a6)	# yes; set 'N' ccode bit
	bra.b		xdnrm_exit

# result precision is single or double
xdnrm_sd:
	mov.l		%a1,-(%sp)
	tst.b		LOCAL_EX(%a0)		# is denorm pos or neg?
	smi.b		%d1			# set d0 accodingly
	bsr.l		unf_sub
	mov.l		(%sp)+,%a1
xdnrm_exit:
	fmovm.x		(%a0),&0x80		# return default result in fp0

	mov.b		FPCR_ENABLE(%a6),%d0
	andi.b		&0x0a,%d0		# is UNFL or INEX enabled?
	bne.b		xdnrm_ena		# yes
	rts

################
# unfl enabled #
################
# we have a DENORM that needs to be converted into an EXOP.
# so, normalize the mantissa, add 0x6000 to the new exponent,
# and return the result in fp1.
xdnrm_ena:
	mov.w		LOCAL_EX(%a1),FP_SCR0_EX(%a6)
	mov.l		LOCAL_HI(%a1),FP_SCR0_HI(%a6)
	mov.l		LOCAL_LO(%a1),FP_SCR0_LO(%a6)

	lea		FP_SCR0(%a6),%a0
	bsr.l		norm			# normalize mantissa
	addi.l		&0x6000,%d0		# add extra bias
	andi.w		&0x8000,FP_SCR0_EX(%a6)	# keep old sign
	or.w		%d0,FP_SCR0_EX(%a6)	# insert new exponent

	fmovm.x		FP_SCR0(%a6),&0x40	# return EXOP in fp1
	rts

#################################################################
# UNFL exception:						#
# 	- This routine is for cases where even an EXOP isn't	#
#  	  large enough to hold the range of this result.	#
#	  In such a case, the EXOP equals zero.			#
#  	- Return the default result to the proper precision 	#
#	  with the sign of this result being the same as that	#
#	  of the src operand.					#
# 	- t_unfl2() is provided to force the result sign to 	#
#	  positive which is the desired result for fetox().	#
#################################################################
	global		t_unfl
t_unfl:
	ori.l		&unfinx_mask,USER_FPSR(%a6) # set UNFL/INEX2/AUNFL/AINEX

	tst.b		(%a0)			# is result pos or neg?
	smi.b		%d1			# set d1 accordingly
	bsr.l		unf_sub			# calc default unfl result
	fmovm.x		(%a0),&0x80		# return default result in fp0

	fmov.s		&0x00000000,%fp1	# return EXOP in fp1
	rts

# t_unfl2 ALWAYS tells unf_sub to create a positive result
	global		t_unfl2
t_unfl2:
	ori.l		&unfinx_mask,USER_FPSR(%a6) # set UNFL/INEX2/AUNFL/AINEX

	sf.b		%d1			# set d0 to represent positive
	bsr.l		unf_sub			# calc default unfl result
	fmovm.x		(%a0),&0x80		# return default result in fp0

	fmov.s		&0x0000000,%fp1		# return EXOP in fp1
	rts

#################################################################
# OVFL exception:						#
# 	- This routine is for cases where even an EXOP isn't	#
#  	  large enough to hold the range of this result.	#
# 	- Return the default result to the proper precision 	#
#	  with the sign of this result being the same as that 	#
#	  of the src operand.					#
# 	- t_ovfl2() is provided to force the result sign to 	#
#	  positive which is the desired result for fcosh().	#
# 	- t_ovfl_sc() is provided for scale() which only sets 	#
#	  the inexact bits if the number is inexact for the 	#
#	  precision indicated.					#
#################################################################

	global		t_ovfl_sc
t_ovfl_sc:
	ori.l		&ovfl_inx_mask,USER_FPSR(%a6) # set OVFL/AOVFL/AINEX

	mov.b		%d0,%d1			# fetch rnd mode/prec
	andi.b		&0xc0,%d1		# extract rnd prec
	beq.b		ovfl_work		# prec is extended

	tst.b		LOCAL_HI(%a0)		# is dst a DENORM?
	bmi.b		ovfl_sc_norm		# no

# dst op is a DENORM. we have to normalize the mantissa to see if the
# result would be inexact for the given precision. make a copy of the
# dst so we don't screw up the version passed to us.
	mov.w		LOCAL_EX(%a0),FP_SCR0_EX(%a6)
	mov.l		LOCAL_HI(%a0),FP_SCR0_HI(%a6)
	mov.l		LOCAL_LO(%a0),FP_SCR0_LO(%a6)
	lea		FP_SCR0(%a6),%a0	# pass ptr to FP_SCR0
	movm.l		&0xc080,-(%sp)		# save d0-d1/a0
	bsr.l		norm			# normalize mantissa
	movm.l		(%sp)+,&0x0103		# restore d0-d1/a0

ovfl_sc_norm:
	cmpi.b		%d1,&0x40		# is prec dbl?
	bne.b		ovfl_sc_dbl		# no; sgl
ovfl_sc_sgl:
	tst.l		LOCAL_LO(%a0)		# is lo lw of sgl set?
	bne.b		ovfl_sc_inx		# yes
	tst.b		3+LOCAL_HI(%a0)		# is lo byte of hi lw set?
	bne.b		ovfl_sc_inx		# yes
	bra.b		ovfl_work		# don't set INEX2
ovfl_sc_dbl:
	mov.l		LOCAL_LO(%a0),%d1	# are any of lo 11 bits of
	andi.l		&0x7ff,%d1		# dbl mantissa set?
	beq.b		ovfl_work		# no; don't set INEX2
ovfl_sc_inx:
	ori.l		&inex2_mask,USER_FPSR(%a6) # set INEX2
	bra.b		ovfl_work		# continue

	global		t_ovfl
t_ovfl:
	ori.l		&ovfinx_mask,USER_FPSR(%a6) # set OVFL/INEX2/AOVFL/AINEX

ovfl_work:
	tst.b		LOCAL_EX(%a0)		# what is the sign?
	smi.b		%d1			# set d1 accordingly
	bsr.l		ovf_res			# calc default ovfl result
	mov.b		%d0,FPSR_CC(%a6)	# insert new ccodes
	fmovm.x		(%a0),&0x80		# return default result in fp0

	fmov.s		&0x00000000,%fp1	# return EXOP in fp1
	rts

# t_ovfl2 ALWAYS tells ovf_res to create a positive result
	global		t_ovfl2
t_ovfl2:
	ori.l		&ovfinx_mask,USER_FPSR(%a6) # set OVFL/INEX2/AOVFL/AINEX

	sf.b		%d1			# clear sign flag for positive
	bsr.l		ovf_res			# calc default ovfl result
	mov.b		%d0,FPSR_CC(%a6)	# insert new ccodes
	fmovm.x		(%a0),&0x80		# return default result in fp0

	fmov.s		&0x00000000,%fp1	# return EXOP in fp1
	rts

#################################################################
# t_catch(): 							#
#	- the last operation of a transcendental emulation	#
# 	  routine may have caused an underflow or overflow. 	#
# 	  we find out if this occurred by doing an fsave and 	#
#	  checking the exception bit. if one did occur, then we	#
#	  jump to fgen_except() which creates the default	#
#	  result and EXOP for us.				#
#################################################################
	global		t_catch
t_catch:

	fsave		-(%sp)
	tst.b		0x2(%sp)
	bmi.b		catch
	add.l		&0xc,%sp

#################################################################
# INEX2 exception:						#
#	- The inex2 and ainex bits are set.			#
#################################################################
	global		t_inx2
t_inx2:
	fblt.w		t_minx2
	fbeq.w		inx2_zero

	global		t_pinx2
t_pinx2:
	ori.w		&inx2a_mask,2+USER_FPSR(%a6) # set INEX2/AINEX
	rts

	global		t_minx2
t_minx2:
	ori.l		&inx2a_mask+neg_mask,USER_FPSR(%a6) # set N/INEX2/AINEX
	rts

inx2_zero:
	mov.b		&z_bmask,FPSR_CC(%a6)
	ori.w		&inx2a_mask,2+USER_FPSR(%a6) # set INEX2/AINEX
	rts

# an underflow or overflow exception occurred.
# we must set INEX/AINEX since the fmul/fdiv/fmov emulation may not!
catch:
	ori.w		&inx2a_mask,FPSR_EXCEPT(%a6)
catch2:
	bsr.l		fgen_except
	add.l		&0xc,%sp
	rts

	global		t_catch2
t_catch2:

	fsave		-(%sp)

	tst.b		0x2(%sp)
	bmi.b		catch2
	add.l		&0xc,%sp

	fmov.l		%fpsr,%d0
	or.l		%d0,USER_FPSR(%a6)

	rts

#########################################################################

#########################################################################
# unf_res(): underflow default result calculation for transcendentals	#
#									#
# INPUT:								#
# 	d0   : rnd mode,precision					#
# 	d1.b : sign bit of result ('11111111 = (-) ; '00000000 = (+))	#
# OUTPUT:								#
#	a0   : points to result (in instruction memory)			#
#########################################################################
unf_sub:
	ori.l		&unfinx_mask,USER_FPSR(%a6)

	andi.w		&0x10,%d1		# keep sign bit in 4th spot

	lsr.b		&0x4,%d0		# shift rnd prec,mode to lo bits
	andi.b		&0xf,%d0		# strip hi rnd mode bit
	or.b		%d1,%d0			# concat {sgn,mode,prec}

	mov.l		%d0,%d1			# make a copy
	lsl.b		&0x1,%d1		# mult index 2 by 2

	mov.b		(tbl_unf_cc.b,%pc,%d0.w*1),FPSR_CC(%a6) # insert ccode bits
	lea		(tbl_unf_result.b,%pc,%d1.w*8),%a0 # grab result ptr
	rts

tbl_unf_cc:
	byte		0x4, 0x4, 0x4, 0x0
	byte		0x4, 0x4, 0x4, 0x0
	byte		0x4, 0x4, 0x4, 0x0
	byte		0x0, 0x0, 0x0, 0x0
	byte		0x8+0x4, 0x8+0x4, 0x8, 0x8+0x4
	byte		0x8+0x4, 0x8+0x4, 0x8, 0x8+0x4
	byte		0x8+0x4, 0x8+0x4, 0x8, 0x8+0x4

tbl_unf_result:
	long		0x00000000, 0x00000000, 0x00000000, 0x0 # ZERO;ext
	long		0x00000000, 0x00000000, 0x00000000, 0x0 # ZERO;ext
	long		0x00000000, 0x00000000, 0x00000000, 0x0 # ZERO;ext
	long		0x00000000, 0x00000000, 0x00000001, 0x0 # MIN; ext

	long		0x3f810000, 0x00000000, 0x00000000, 0x0 # ZERO;sgl
	long		0x3f810000, 0x00000000, 0x00000000, 0x0 # ZERO;sgl
	long		0x3f810000, 0x00000000, 0x00000000, 0x0 # ZERO;sgl
	long		0x3f810000, 0x00000100, 0x00000000, 0x0 # MIN; sgl

	long		0x3c010000, 0x00000000, 0x00000000, 0x0 # ZERO;dbl
	long		0x3c010000, 0x00000000, 0x00000000, 0x0 # ZER0;dbl
	long		0x3c010000, 0x00000000, 0x00000000, 0x0 # ZERO;dbl
	long		0x3c010000, 0x00000000, 0x00000800, 0x0 # MIN; dbl

	long		0x0,0x0,0x0,0x0
	long		0x0,0x0,0x0,0x0
	long		0x0,0x0,0x0,0x0
	long		0x0,0x0,0x0,0x0
	
	long		0x80000000, 0x00000000, 0x00000000, 0x0 # ZERO;ext
	long		0x80000000, 0x00000000, 0x00000000, 0x0 # ZERO;ext
	long		0x80000000, 0x00000000, 0x00000001, 0x0 # MIN; ext
	long		0x80000000, 0x00000000, 0x00000000, 0x0 # ZERO;ext

	long		0xbf810000, 0x00000000, 0x00000000, 0x0 # ZERO;sgl
	long		0xbf810000, 0x00000000, 0x00000000, 0x0 # ZERO;sgl
	long		0xbf810000, 0x00000100, 0x00000000, 0x0 # MIN; sgl
	long		0xbf810000, 0x00000000, 0x00000000, 0x0 # ZERO;sgl

	long		0xbc010000, 0x00000000, 0x00000000, 0x0 # ZERO;dbl
	long		0xbc010000, 0x00000000, 0x00000000, 0x0 # ZERO;dbl
	long		0xbc010000, 0x00000000, 0x00000800, 0x0 # MIN; dbl
	long		0xbc010000, 0x00000000, 0x00000000, 0x0 # ZERO;dbl

############################################################

#########################################################################
# src_zero(): Return signed zero according to sign of src operand.	#
#########################################################################
	global		src_zero
src_zero:
	tst.b		SRC_EX(%a0)		# get sign of src operand
	bmi.b		ld_mzero		# if neg, load neg zero

#
# ld_pzero(): return a positive zero.
#
	global		ld_pzero
ld_pzero:
	fmov.s		&0x00000000,%fp0	# load +0
	mov.b		&z_bmask,FPSR_CC(%a6)	# set 'Z' ccode bit
	rts

# ld_mzero(): return a negative zero.
	global		ld_mzero
ld_mzero:
	fmov.s		&0x80000000,%fp0	# load -0
	mov.b		&neg_bmask+z_bmask,FPSR_CC(%a6) # set 'N','Z' ccode bits
	rts

#########################################################################
# dst_zero(): Return signed zero according to sign of dst operand.	#
#########################################################################
	global		dst_zero
dst_zero:
	tst.b		DST_EX(%a1) 		# get sign of dst operand
	bmi.b		ld_mzero		# if neg, load neg zero
	bra.b		ld_pzero		# load positive zero

#########################################################################
# src_inf(): Return signed inf according to sign of src operand.	#
#########################################################################
	global		src_inf
src_inf:
	tst.b		SRC_EX(%a0) 		# get sign of src operand
	bmi.b		ld_minf			# if negative branch

#
# ld_pinf(): return a positive infinity.
#
	global		ld_pinf
ld_pinf:
	fmov.s		&0x7f800000,%fp0	# load +INF
	mov.b		&inf_bmask,FPSR_CC(%a6)	# set 'INF' ccode bit
	rts

#
# ld_minf():return a negative infinity.
#
	global		ld_minf
ld_minf:
	fmov.s		&0xff800000,%fp0	# load -INF
	mov.b		&neg_bmask+inf_bmask,FPSR_CC(%a6) # set 'N','I' ccode bits
	rts

#########################################################################
# dst_inf(): Return signed inf according to sign of dst operand.	#
#########################################################################
	global		dst_inf
dst_inf:
	tst.b		DST_EX(%a1) 		# get sign of dst operand
	bmi.b		ld_minf			# if negative branch
	bra.b		ld_pinf

	global		szr_inf
#################################################################
# szr_inf(): Return +ZERO for a negative src operand or		#
#	            +INF for a positive src operand.		#
#	     Routine used for fetox, ftwotox, and ftentox.	#
#################################################################
szr_inf:
	tst.b		SRC_EX(%a0)		# check sign of source
	bmi.b		ld_pzero
	bra.b		ld_pinf

#########################################################################
# sopr_inf(): Return +INF for a positive src operand or			#
#	      jump to operand error routine for a negative src operand.	#
#	      Routine used for flogn, flognp1, flog10, and flog2.	#
#########################################################################
	global		sopr_inf
sopr_inf:
	tst.b		SRC_EX(%a0)		# check sign of source
	bmi.w		t_operr
	bra.b		ld_pinf

#################################################################
# setoxm1i(): Return minus one for a negative src operand or	#
#	      positive infinity for a positive src operand.	#
#	      Routine used for fetoxm1.				#
#################################################################
	global		setoxm1i
setoxm1i:
	tst.b		SRC_EX(%a0)		# check sign of source
	bmi.b		ld_mone
	bra.b		ld_pinf

#########################################################################
# src_one(): Return signed one according to sign of src operand.	#
#########################################################################
	global		src_one
src_one:
	tst.b		SRC_EX(%a0) 		# check sign of source
	bmi.b		ld_mone

#
# ld_pone(): return positive one.
#
	global		ld_pone
ld_pone:
	fmov.s		&0x3f800000,%fp0	# load +1
	clr.b		FPSR_CC(%a6)
	rts

#
# ld_mone(): return negative one.
#
	global		ld_mone
ld_mone:
	fmov.s		&0xbf800000,%fp0	# load -1
	mov.b		&neg_bmask,FPSR_CC(%a6)	# set 'N' ccode bit
	rts

ppiby2:	long		0x3fff0000, 0xc90fdaa2, 0x2168c235
mpiby2:	long		0xbfff0000, 0xc90fdaa2, 0x2168c235

#################################################################
# spi_2(): Return signed PI/2 according to sign of src operand.	#
#################################################################
	global		spi_2
spi_2:
	tst.b		SRC_EX(%a0) 		# check sign of source
	bmi.b		ld_mpi2

#
# ld_ppi2(): return positive PI/2.
#
	global		ld_ppi2
ld_ppi2:
	fmov.l		%d0,%fpcr
	fmov.x		ppiby2(%pc),%fp0	# load +pi/2
	bra.w		t_pinx2			# set INEX2

#
# ld_mpi2(): return negative PI/2.
#
	global		ld_mpi2
ld_mpi2:
	fmov.l		%d0,%fpcr
	fmov.x		mpiby2(%pc),%fp0	# load -pi/2
	bra.w		t_minx2			# set INEX2

####################################################
# The following routines give support for fsincos. #
####################################################

#
# ssincosz(): When the src operand is ZERO, store a one in the
# 	      cosine register and return a ZERO in fp0 w/ the same sign
#	      as the src operand.
#
	global		ssincosz
ssincosz:
	fmov.s		&0x3f800000,%fp1
	tst.b		SRC_EX(%a0)		# test sign
	bpl.b		sincoszp
	fmov.s		&0x80000000,%fp0	# return sin result in fp0
	mov.b		&z_bmask+neg_bmask,FPSR_CC(%a6)
	bra.b		sto_cos			# store cosine result
sincoszp:
	fmov.s		&0x00000000,%fp0	# return sin result in fp0
	mov.b		&z_bmask,FPSR_CC(%a6)
	bra.b		sto_cos			# store cosine result

#
# ssincosi(): When the src operand is INF, store a QNAN in the cosine
#	      register and jump to the operand error routine for negative
#	      src operands.
#
	global		ssincosi
ssincosi:
	fmov.x		qnan(%pc),%fp1		# load NAN
	bsr.l		sto_cos			# store cosine result
	bra.w		t_operr

#
# ssincosqnan(): When the src operand is a QNAN, store the QNAN in the cosine
# 		 register and branch to the src QNAN routine.
#
	global		ssincosqnan
ssincosqnan:
	fmov.x		LOCAL_EX(%a0),%fp1
	bsr.l		sto_cos
	bra.w		src_qnan

#
# ssincossnan(): When the src operand is an SNAN, store the SNAN w/ the SNAN bit set
#		 in the cosine register and branch to the src SNAN routine.
#
	global		ssincossnan
ssincossnan:
	fmov.x		LOCAL_EX(%a0),%fp1
	bsr.l		sto_cos
	bra.w		src_snan

########################################################################

#########################################################################
# sto_cos(): store fp1 to the fpreg designated by the CMDREG dst field.	#
#	     fp1 holds the result of the cosine portion of ssincos().	#
#	     the value in fp1 will not take any exceptions when moved.	#
# INPUT:								#
#	fp1 : fp value to store						#
# MODIFIED:								#
#	d0								#
#########################################################################
	global		sto_cos
sto_cos:
	mov.b		1+EXC_CMDREG(%a6),%d0
	andi.w		&0x7,%d0
	mov.w		(tbl_sto_cos.b,%pc,%d0.w*2),%d0
	jmp		(tbl_sto_cos.b,%pc,%d0.w*1)

tbl_sto_cos:
	short		sto_cos_0 - tbl_sto_cos
	short		sto_cos_1 - tbl_sto_cos
	short		sto_cos_2 - tbl_sto_cos
	short		sto_cos_3 - tbl_sto_cos
	short		sto_cos_4 - tbl_sto_cos
	short		sto_cos_5 - tbl_sto_cos
	short		sto_cos_6 - tbl_sto_cos
	short		sto_cos_7 - tbl_sto_cos

sto_cos_0:
	fmovm.x		&0x40,EXC_FP0(%a6)
	rts
sto_cos_1:
	fmovm.x		&0x40,EXC_FP1(%a6)
	rts
sto_cos_2:
	fmov.x 		%fp1,%fp2
	rts
sto_cos_3:
	fmov.x		%fp1,%fp3
	rts
sto_cos_4:
	fmov.x		%fp1,%fp4
	rts
sto_cos_5:
	fmov.x		%fp1,%fp5
	rts
sto_cos_6:
	fmov.x		%fp1,%fp6
	rts
sto_cos_7:
	fmov.x		%fp1,%fp7
	rts

##################################################################
	global		smod_sdnrm
	global		smod_snorm
smod_sdnrm:
smod_snorm:
	mov.b		DTAG(%a6),%d1
	beq.l		smod
	cmpi.b		%d1,&ZERO
	beq.w		smod_zro
	cmpi.b		%d1,&INF
	beq.l		t_operr
	cmpi.b		%d1,&DENORM
	beq.l		smod
	cmpi.b		%d1,&SNAN
	beq.l		dst_snan
	bra.l		dst_qnan

	global		smod_szero
smod_szero:
	mov.b		DTAG(%a6),%d1
	beq.l		t_operr
	cmpi.b		%d1,&ZERO
	beq.l		t_operr
	cmpi.b		%d1,&INF
	beq.l		t_operr
	cmpi.b		%d1,&DENORM
	beq.l		t_operr
	cmpi.b		%d1,&QNAN
	beq.l		dst_qnan
	bra.l		dst_snan

	global		smod_sinf
smod_sinf:
	mov.b		DTAG(%a6),%d1
	beq.l		smod_fpn
	cmpi.b		%d1,&ZERO
	beq.l		smod_zro
	cmpi.b		%d1,&INF
	beq.l		t_operr
	cmpi.b		%d1,&DENORM
	beq.l		smod_fpn
	cmpi.b		%d1,&QNAN
	beq.l		dst_qnan
	bra.l		dst_snan

smod_zro:
srem_zro:
	mov.b		SRC_EX(%a0),%d1		# get src sign
	mov.b		DST_EX(%a1),%d0		# get dst sign
	eor.b		%d0,%d1			# get qbyte sign
	andi.b		&0x80,%d1
	mov.b		%d1,FPSR_QBYTE(%a6)
	tst.b		%d0
	bpl.w		ld_pzero
	bra.w		ld_mzero

smod_fpn:
srem_fpn:
	clr.b		FPSR_QBYTE(%a6)
	mov.l		%d0,-(%sp)
	mov.b		SRC_EX(%a0),%d1		# get src sign
	mov.b		DST_EX(%a1),%d0		# get dst sign
	eor.b		%d0,%d1			# get qbyte sign
	andi.b		&0x80,%d1
	mov.b		%d1,FPSR_QBYTE(%a6)
	cmpi.b		DTAG(%a6),&DENORM
	bne.b		smod_nrm
	lea		DST(%a1),%a0
	mov.l		(%sp)+,%d0
	bra		t_resdnrm
smod_nrm:
	fmov.l		(%sp)+,%fpcr
	fmov.x		DST(%a1),%fp0
	tst.b		DST_EX(%a1)
	bmi.b		smod_nrm_neg
	rts

smod_nrm_neg:
	mov.b		&neg_bmask,FPSR_CC(%a6)	# set 'N' ccode
	rts

#########################################################################
	global		srem_snorm
	global		srem_sdnrm
srem_sdnrm:
srem_snorm:
	mov.b		DTAG(%a6),%d1
	beq.l		srem
	cmpi.b		%d1,&ZERO
	beq.w		srem_zro
	cmpi.b		%d1,&INF
	beq.l		t_operr
	cmpi.b		%d1,&DENORM
	beq.l		srem
	cmpi.b		%d1,&QNAN
	beq.l		dst_qnan
	bra.l		dst_snan

	global		srem_szero
srem_szero:
	mov.b		DTAG(%a6),%d1
	beq.l		t_operr
	cmpi.b		%d1,&ZERO
	beq.l		t_operr
	cmpi.b		%d1,&INF
	beq.l		t_operr
	cmpi.b		%d1,&DENORM
	beq.l		t_operr
	cmpi.b		%d1,&QNAN
	beq.l		dst_qnan
	bra.l		dst_snan

	global		srem_sinf
srem_sinf:
	mov.b		DTAG(%a6),%d1
	beq.w		srem_fpn
	cmpi.b		%d1,&ZERO
	beq.w		srem_zro
	cmpi.b		%d1,&INF
	beq.l		t_operr
	cmpi.b		%d1,&DENORM
	beq.l		srem_fpn
	cmpi.b		%d1,&QNAN
	beq.l		dst_qnan
	bra.l		dst_snan

#########################################################################
	global		sscale_snorm
	global		sscale_sdnrm
sscale_snorm:
sscale_sdnrm:
	mov.b		DTAG(%a6),%d1
	beq.l		sscale
	cmpi.b		%d1,&ZERO
	beq.l		dst_zero
	cmpi.b		%d1,&INF
	beq.l		dst_inf
	cmpi.b		%d1,&DENORM
	beq.l		sscale
	cmpi.b		%d1,&QNAN
	beq.l		dst_qnan
	bra.l		dst_snan

	global		sscale_szero
sscale_szero:
	mov.b		DTAG(%a6),%d1
	beq.l		sscale
	cmpi.b		%d1,&ZERO
	beq.l		dst_zero
	cmpi.b		%d1,&INF
	beq.l		dst_inf
	cmpi.b		%d1,&DENORM
	beq.l		sscale
	cmpi.b		%d1,&QNAN
	beq.l		dst_qnan
	bra.l		dst_snan

	global		sscale_sinf
sscale_sinf:
	mov.b		DTAG(%a6),%d1
	beq.l		t_operr
	cmpi.b		%d1,&QNAN
	beq.l		dst_qnan
	cmpi.b		%d1,&SNAN
	beq.l		dst_snan
	bra.l		t_operr

########################################################################

#
# sop_sqnan(): The src op for frem/fmod/fscale was a QNAN.
#
	global		sop_sqnan
sop_sqnan:
	mov.b		DTAG(%a6),%d1
	cmpi.b		%d1,&QNAN
	beq.b		dst_qnan
	cmpi.b		%d1,&SNAN
	beq.b		dst_snan
	bra.b		src_qnan

#
# sop_ssnan(): The src op for frem/fmod/fscale was an SNAN.
#
	global		sop_ssnan
sop_ssnan:
	mov.b		DTAG(%a6),%d1
	cmpi.b		%d1,&QNAN
	beq.b		dst_qnan_src_snan
	cmpi.b		%d1,&SNAN
	beq.b		dst_snan
	bra.b		src_snan

dst_qnan_src_snan:
	ori.l		&snaniop_mask,USER_FPSR(%a6) # set NAN/SNAN/AIOP
	bra.b		dst_qnan

#
# dst_qnan(): Return the dst SNAN w/ the SNAN bit set.
#
	global		dst_snan
dst_snan:
	fmov.x		DST(%a1),%fp0		# the fmove sets the SNAN bit
	fmov.l		%fpsr,%d0		# catch resulting status
	or.l		%d0,USER_FPSR(%a6)	# store status
	rts

#
# dst_qnan(): Return the dst QNAN.
#
	global		dst_qnan
dst_qnan:
	fmov.x		DST(%a1),%fp0		# return the non-signalling nan
	tst.b		DST_EX(%a1)		# set ccodes according to QNAN sign
	bmi.b		dst_qnan_m
dst_qnan_p:
	mov.b		&nan_bmask,FPSR_CC(%a6)
	rts
dst_qnan_m:
	mov.b		&neg_bmask+nan_bmask,FPSR_CC(%a6)
	rts

#
# src_snan(): Return the src SNAN w/ the SNAN bit set.
#
	global		src_snan
src_snan:
	fmov.x		SRC(%a0),%fp0		# the fmove sets the SNAN bit
	fmov.l		%fpsr,%d0		# catch resulting status
	or.l		%d0,USER_FPSR(%a6)	# store status
	rts

#
# src_qnan(): Return the src QNAN.
#
	global		src_qnan
src_qnan:
	fmov.x		SRC(%a0),%fp0		# return the non-signalling nan
	tst.b		SRC_EX(%a0)		# set ccodes according to QNAN sign
	bmi.b		dst_qnan_m
src_qnan_p:
	mov.b		&nan_bmask,FPSR_CC(%a6)
	rts
src_qnan_m:
	mov.b		&neg_bmask+nan_bmask,FPSR_CC(%a6)
	rts

#
# fkern2.s:
#	These entry points are used by the exception handler
# routines where an instruction is selected by an index into
# a large jump table corresponding to a given instruction which 
# has been decoded. Flow continues here where we now decode 
# further accoding to the source operand type.
#

	global		fsinh
fsinh:
	mov.b		STAG(%a6),%d1
	beq.l		ssinh
	cmpi.b		%d1,&ZERO
	beq.l		src_zero
	cmpi.b		%d1,&INF
	beq.l		src_inf
	cmpi.b		%d1,&DENORM
	beq.l		ssinhd
	cmpi.b		%d1,&QNAN
	beq.l		src_qnan
	bra.l		src_snan

	global		flognp1
flognp1:
	mov.b		STAG(%a6),%d1
	beq.l		slognp1
	cmpi.b		%d1,&ZERO
	beq.l		src_zero
	cmpi.b		%d1,&INF
	beq.l		sopr_inf
	cmpi.b		%d1,&DENORM
	beq.l		slognp1d
	cmpi.b		%d1,&QNAN
	beq.l		src_qnan
	bra.l		src_snan

	global		fetoxm1
fetoxm1:
	mov.b		STAG(%a6),%d1
	beq.l		setoxm1
	cmpi.b		%d1,&ZERO
	beq.l		src_zero
	cmpi.b		%d1,&INF
	beq.l		setoxm1i
	cmpi.b		%d1,&DENORM
	beq.l		setoxm1d
	cmpi.b		%d1,&QNAN
	beq.l		src_qnan
	bra.l		src_snan

	global		ftanh
ftanh:
	mov.b		STAG(%a6),%d1
	beq.l		stanh
	cmpi.b		%d1,&ZERO
	beq.l		src_zero
	cmpi.b		%d1,&INF
	beq.l		src_one
	cmpi.b		%d1,&DENORM
	beq.l		stanhd
	cmpi.b		%d1,&QNAN
	beq.l		src_qnan
	bra.l		src_snan

	global		fatan
fatan:
	mov.b		STAG(%a6),%d1
	beq.l		satan
	cmpi.b		%d1,&ZERO
	beq.l		src_zero
	cmpi.b		%d1,&INF
	beq.l		spi_2
	cmpi.b		%d1,&DENORM
	beq.l		satand
	cmpi.b		%d1,&QNAN
	beq.l		src_qnan
	bra.l		src_snan

	global		fasin
fasin:
	mov.b		STAG(%a6),%d1
	beq.l		sasin
	cmpi.b		%d1,&ZERO
	beq.l		src_zero
	cmpi.b		%d1,&INF
	beq.l		t_operr
	cmpi.b		%d1,&DENORM
	beq.l		sasind
	cmpi.b		%d1,&QNAN
	beq.l		src_qnan
	bra.l		src_snan

	global		fatanh
fatanh:
	mov.b		STAG(%a6),%d1
	beq.l		satanh
	cmpi.b		%d1,&ZERO
	beq.l		src_zero
	cmpi.b		%d1,&INF
	beq.l		t_operr
	cmpi.b		%d1,&DENORM
	beq.l		satanhd
	cmpi.b		%d1,&QNAN
	beq.l		src_qnan
	bra.l		src_snan

	global		fsine
fsine:
	mov.b		STAG(%a6),%d1
	beq.l		ssin
	cmpi.b		%d1,&ZERO
	beq.l		src_zero
	cmpi.b		%d1,&INF
	beq.l		t_operr
	cmpi.b		%d1,&DENORM
	beq.l		ssind
	cmpi.b		%d1,&QNAN
	beq.l		src_qnan
	bra.l		src_snan

	global		ftan
ftan:
	mov.b		STAG(%a6),%d1
	beq.l		stan
	cmpi.b		%d1,&ZERO
	beq.l		src_zero
	cmpi.b		%d1,&INF
	beq.l		t_operr
	cmpi.b		%d1,&DENORM
	beq.l		stand
	cmpi.b		%d1,&QNAN
	beq.l		src_qnan
	bra.l		src_snan

	global		fetox
fetox:
	mov.b		STAG(%a6),%d1
	beq.l		setox
	cmpi.b		%d1,&ZERO
	beq.l		ld_pone
	cmpi.b		%d1,&INF
	beq.l		szr_inf
	cmpi.b		%d1,&DENORM
	beq.l		setoxd
	cmpi.b		%d1,&QNAN
	beq.l		src_qnan
	bra.l		src_snan

	global		ftwotox
ftwotox:
	mov.b		STAG(%a6),%d1
	beq.l		stwotox
	cmpi.b		%d1,&ZERO
	beq.l		ld_pone
	cmpi.b		%d1,&INF
	beq.l		szr_inf
	cmpi.b		%d1,&DENORM
	beq.l		stwotoxd
	cmpi.b		%d1,&QNAN
	beq.l		src_qnan
	bra.l		src_snan

	global		ftentox
ftentox:
	mov.b		STAG(%a6),%d1
	beq.l		stentox
	cmpi.b		%d1,&ZERO
	beq.l		ld_pone
	cmpi.b		%d1,&INF
	beq.l		szr_inf
	cmpi.b		%d1,&DENORM
	beq.l		stentoxd
	cmpi.b		%d1,&QNAN
	beq.l		src_qnan
	bra.l		src_snan

	global		flogn
flogn:
	mov.b		STAG(%a6),%d1
	beq.l		slogn
	cmpi.b		%d1,&ZERO
	beq.l		t_dz2
	cmpi.b		%d1,&INF
	beq.l		sopr_inf
	cmpi.b		%d1,&DENORM
	beq.l		slognd
	cmpi.b		%d1,&QNAN
	beq.l		src_qnan
	bra.l		src_snan

	global		flog10
flog10:
	mov.b		STAG(%a6),%d1
	beq.l		slog10
	cmpi.b		%d1,&ZERO
	beq.l		t_dz2
	cmpi.b		%d1,&INF
	beq.l		sopr_inf
	cmpi.b		%d1,&DENORM
	beq.l		slog10d
	cmpi.b		%d1,&QNAN
	beq.l		src_qnan
	bra.l		src_snan

	global		flog2
flog2:
	mov.b		STAG(%a6),%d1
	beq.l		slog2
	cmpi.b		%d1,&ZERO
	beq.l		t_dz2
	cmpi.b		%d1,&INF
	beq.l		sopr_inf
	cmpi.b		%d1,&DENORM
	beq.l		slog2d
	cmpi.b		%d1,&QNAN
	beq.l		src_qnan
	bra.l		src_snan

	global		fcosh
fcosh:
	mov.b		STAG(%a6),%d1
	beq.l		scosh
	cmpi.b		%d1,&ZERO
	beq.l		ld_pone
	cmpi.b		%d1,&INF
	beq.l		ld_pinf
	cmpi.b		%d1,&DENORM
	beq.l		scoshd
	cmpi.b		%d1,&QNAN
	beq.l		src_qnan
	bra.l		src_snan

	global		facos
facos:
	mov.b		STAG(%a6),%d1
	beq.l		sacos
	cmpi.b		%d1,&ZERO
	beq.l		ld_ppi2
	cmpi.b		%d1,&INF
	beq.l		t_operr
	cmpi.b		%d1,&DENORM
	beq.l		sacosd
	cmpi.b		%d1,&QNAN
	beq.l		src_qnan
	bra.l		src_snan

	global		fcos
fcos:
	mov.b		STAG(%a6),%d1
	beq.l		scos
	cmpi.b		%d1,&ZERO
	beq.l		ld_pone
	cmpi.b		%d1,&INF
	beq.l		t_operr
	cmpi.b		%d1,&DENORM
	beq.l		scosd
	cmpi.b		%d1,&QNAN
	beq.l		src_qnan
	bra.l		src_snan

	global		fgetexp
fgetexp:
	mov.b		STAG(%a6),%d1
	beq.l		sgetexp
	cmpi.b		%d1,&ZERO
	beq.l		src_zero
	cmpi.b		%d1,&INF
	beq.l		t_operr
	cmpi.b		%d1,&DENORM
	beq.l		sgetexpd
	cmpi.b		%d1,&QNAN
	beq.l		src_qnan
	bra.l		src_snan

	global		fgetman
fgetman:
	mov.b		STAG(%a6),%d1
	beq.l		sgetman
	cmpi.b		%d1,&ZERO
	beq.l		src_zero
	cmpi.b		%d1,&INF
	beq.l		t_operr
	cmpi.b		%d1,&DENORM
	beq.l		sgetmand
	cmpi.b		%d1,&QNAN
	beq.l		src_qnan
	bra.l		src_snan

	global		fsincos
fsincos:
	mov.b		STAG(%a6),%d1
	beq.l		ssincos
	cmpi.b		%d1,&ZERO
	beq.l		ssincosz
	cmpi.b		%d1,&INF
	beq.l		ssincosi
	cmpi.b		%d1,&DENORM
	beq.l		ssincosd
	cmpi.b		%d1,&QNAN
	beq.l		ssincosqnan
	bra.l		ssincossnan

	global		fmod
fmod:
	mov.b		STAG(%a6),%d1
	beq.l		smod_snorm
	cmpi.b		%d1,&ZERO
	beq.l		smod_szero
	cmpi.b		%d1,&INF
	beq.l		smod_sinf
	cmpi.b		%d1,&DENORM
	beq.l		smod_sdnrm
	cmpi.b		%d1,&QNAN
	beq.l		sop_sqnan
	bra.l		sop_ssnan

	global		frem
frem:
	mov.b		STAG(%a6),%d1
	beq.l		srem_snorm
	cmpi.b		%d1,&ZERO
	beq.l		srem_szero
	cmpi.b		%d1,&INF
	beq.l		srem_sinf
	cmpi.b		%d1,&DENORM
	beq.l		srem_sdnrm
	cmpi.b		%d1,&QNAN
	beq.l		sop_sqnan
	bra.l		sop_ssnan

	global		fscale
fscale:
	mov.b		STAG(%a6),%d1
	beq.l		sscale_snorm
	cmpi.b		%d1,&ZERO
	beq.l		sscale_szero
	cmpi.b		%d1,&INF
	beq.l		sscale_sinf
	cmpi.b		%d1,&DENORM
	beq.l		sscale_sdnrm
	cmpi.b		%d1,&QNAN
	beq.l		sop_sqnan
	bra.l		sop_ssnan

#########################################################################
# XDEF ****************************************************************	#
# 	fgen_except(): catch an exception during transcendental 	#
#		       emulation					#
#									#
# XREF ****************************************************************	#
#	fmul() - emulate a multiply instruction				# 
#	fadd() - emulate an add instruction				#
#	fin() - emulate an fmove instruction				#
#									#
# INPUT ***************************************************************	#
#	fp0 = destination operand					#
#	d0  = type of instruction that took exception			#
#	fsave frame = source operand					#
# 									#
# OUTPUT **************************************************************	#
#	fp0 = result							#
#	fp1 = EXOP							#
#									#
# ALGORITHM ***********************************************************	#
# 	An exception occurred on the last instruction of the 		#
# transcendental emulation. hopefully, this won't be happening much 	#
# because it will be VERY slow.						#
# 	The only exceptions capable of passing through here are		#
# Overflow, Underflow, and Unsupported Data Type.			#
#									#
#########################################################################

	global		fgen_except
fgen_except:
	cmpi.b		0x3(%sp),&0x7		# is exception UNSUPP?
	beq.b		fge_unsupp		# yes

	mov.b		&NORM,STAG(%a6)

fge_cont:
	mov.b		&NORM,DTAG(%a6)

# ok, I have a problem with putting the dst op at FP_DST. the emulation
# routines aren't supposed to alter the operands but we've just squashed
# FP_DST here...

# 8/17/93 - this turns out to be more of a "cleanliness" standpoint
# then a potential bug. to begin with, only the dyadic functions
# frem,fmod, and fscale would get the dst trashed here. But, for
# the 060SP, the FP_DST is never used again anyways.
	fmovm.x		&0x80,FP_DST(%a6)	# dst op is in fp0

	lea		0x4(%sp),%a0		# pass: ptr to src op
	lea		FP_DST(%a6),%a1		# pass: ptr to dst op

	cmpi.b		%d1,&FMOV_OP
	beq.b		fge_fin			# it was an "fmov"
	cmpi.b		%d1,&FADD_OP
	beq.b		fge_fadd		# it was an "fadd"
fge_fmul:
	bsr.l		fmul
	rts
fge_fadd:
	bsr.l		fadd
	rts
fge_fin:
	bsr.l		fin
	rts

fge_unsupp:
	mov.b		&DENORM,STAG(%a6)
	bra.b		fge_cont

#
# This table holds the offsets of the emulation routines for each individual
# math operation relative to the address of this table. Included are
# routines like fadd/fmul/fabs as well as the transcendentals.
# The location within the table is determined by the extension bits of the
# operation longword.
#

	swbeg		&109
tbl_unsupp:
	long		fin	 	- tbl_unsupp	# 00: fmove
	long		fint	 	- tbl_unsupp	# 01: fint
	long		fsinh	 	- tbl_unsupp	# 02: fsinh
	long		fintrz	 	- tbl_unsupp	# 03: fintrz
	long		fsqrt	 	- tbl_unsupp	# 04: fsqrt
	long		tbl_unsupp	- tbl_unsupp
	long		flognp1		- tbl_unsupp	# 06: flognp1
	long		tbl_unsupp	- tbl_unsupp
	long		fetoxm1		- tbl_unsupp	# 08: fetoxm1
	long		ftanh		- tbl_unsupp	# 09: ftanh
	long		fatan		- tbl_unsupp	# 0a: fatan
	long		tbl_unsupp	- tbl_unsupp
	long		fasin		- tbl_unsupp	# 0c: fasin
	long		fatanh		- tbl_unsupp	# 0d: fatanh
	long		fsine		- tbl_unsupp	# 0e: fsin
	long		ftan		- tbl_unsupp	# 0f: ftan
	long		fetox		- tbl_unsupp	# 10: fetox
	long		ftwotox		- tbl_unsupp	# 11: ftwotox
	long		ftentox		- tbl_unsupp	# 12: ftentox
	long		tbl_unsupp	- tbl_unsupp
	long		flogn		- tbl_unsupp	# 14: flogn
	long		flog10		- tbl_unsupp	# 15: flog10
	long		flog2		- tbl_unsupp	# 16: flog2
	long		tbl_unsupp	- tbl_unsupp
	long		fabs		- tbl_unsupp 	# 18: fabs
	long		fcosh		- tbl_unsupp	# 19: fcosh
	long		fneg		- tbl_unsupp 	# 1a: fneg
	long		tbl_unsupp	- tbl_unsupp
	long		facos		- tbl_unsupp	# 1c: facos
	long		fcos		- tbl_unsupp	# 1d: fcos
	long		fgetexp		- tbl_unsupp	# 1e: fgetexp
	long		fgetman		- tbl_unsupp	# 1f: fgetman
	long		fdiv		- tbl_unsupp 	# 20: fdiv
	long		fmod		- tbl_unsupp	# 21: fmod
	long		fadd		- tbl_unsupp 	# 22: fadd
	long		fmul		- tbl_unsupp 	# 23: fmul
	long		fsgldiv		- tbl_unsupp 	# 24: fsgldiv
	long		frem		- tbl_unsupp	# 25: frem
	long		fscale		- tbl_unsupp	# 26: fscale
	long		fsglmul		- tbl_unsupp 	# 27: fsglmul
	long		fsub		- tbl_unsupp 	# 28: fsub
	long		tbl_unsupp	- tbl_unsupp
	long		tbl_unsupp	- tbl_unsupp
	long		tbl_unsupp	- tbl_unsupp
	long		tbl_unsupp	- tbl_unsupp
	long		tbl_unsupp	- tbl_unsupp
	long		tbl_unsupp	- tbl_unsupp
	long		tbl_unsupp	- tbl_unsupp
	long		fsincos		- tbl_unsupp	# 30: fsincos
	long		fsincos		- tbl_unsupp	# 31: fsincos
	long		fsincos		- tbl_unsupp	# 32: fsincos
	long		fsincos		- tbl_unsupp	# 33: fsincos
	long		fsincos		- tbl_unsupp	# 34: fsincos
	long		fsincos		- tbl_unsupp	# 35: fsincos
	long		fsincos		- tbl_unsupp	# 36: fsincos
	long		fsincos		- tbl_unsupp	# 37: fsincos
	long		fcmp		- tbl_unsupp 	# 38: fcmp
	long		tbl_unsupp	- tbl_unsupp
	long		ftst		- tbl_unsupp 	# 3a: ftst
	long		tbl_unsupp	- tbl_unsupp
	long		tbl_unsupp	- tbl_unsupp
	long		tbl_unsupp	- tbl_unsupp
	long		tbl_unsupp	- tbl_unsupp
	long		tbl_unsupp	- tbl_unsupp
	long		fsin		- tbl_unsupp 	# 40: fsmove
	long		fssqrt		- tbl_unsupp 	# 41: fssqrt
	long		tbl_unsupp	- tbl_unsupp
	long		tbl_unsupp	- tbl_unsupp
	long		fdin		- tbl_unsupp	# 44: fdmove
	long		fdsqrt		- tbl_unsupp 	# 45: fdsqrt
	long		tbl_unsupp	- tbl_unsupp
	long		tbl_unsupp	- tbl_unsupp
	long		tbl_unsupp	- tbl_unsupp
	long		tbl_unsupp	- tbl_unsupp
	long		tbl_unsupp	- tbl_unsupp
	long		tbl_unsupp	- tbl_unsupp
	long		tbl_unsupp	- tbl_unsupp
	long		tbl_unsupp	- tbl_unsupp
	long		tbl_unsupp	- tbl_unsupp
	long		tbl_unsupp	- tbl_unsupp
	long		tbl_unsupp	- tbl_unsupp
	long		tbl_unsupp	- tbl_unsupp
	long		tbl_unsupp	- tbl_unsupp
	long		tbl_unsupp	- tbl_unsupp
	long		tbl_unsupp	- tbl_unsupp
	long		tbl_unsupp	- tbl_unsupp
	long		tbl_unsupp	- tbl_unsupp
	long		tbl_unsupp	- tbl_unsupp
	long		fsabs		- tbl_unsupp 	# 58: fsabs
	long		tbl_unsupp	- tbl_unsupp
	long		fsneg		- tbl_unsupp 	# 5a: fsneg
	long		tbl_unsupp	- tbl_unsupp
	long		fdabs		- tbl_unsupp	# 5c: fdabs
	long		tbl_unsupp	- tbl_unsupp
	long		fdneg		- tbl_unsupp 	# 5e: fdneg
	long		tbl_unsupp	- tbl_unsupp
	long		fsdiv		- tbl_unsupp	# 60: fsdiv
	long		tbl_unsupp	- tbl_unsupp
	long		fsadd		- tbl_unsupp	# 62: fsadd
	long		fsmul		- tbl_unsupp	# 63: fsmul
	long		fddiv		- tbl_unsupp 	# 64: fddiv
	long		tbl_unsupp	- tbl_unsupp
	long		fdadd		- tbl_unsupp	# 66: fdadd
	long		fdmul		- tbl_unsupp 	# 67: fdmul
	long		fssub		- tbl_unsupp	# 68: fssub
	long		tbl_unsupp	- tbl_unsupp
	long		tbl_unsupp	- tbl_unsupp
	long		tbl_unsupp	- tbl_unsupp
	long		fdsub		- tbl_unsupp 	# 6c: fdsub

#########################################################################
# XDEF ****************************************************************	#
# 	fmul(): emulates the fmul instruction				#
#	fsmul(): emulates the fsmul instruction				#
#	fdmul(): emulates the fdmul instruction				#
#									#
# XREF ****************************************************************	#
#	scale_to_zero_src() - scale src exponent to zero		#
#	scale_to_zero_dst() - scale dst exponent to zero		#
#	unf_res() - return default underflow result			#
#	ovf_res() - return default overflow result			#
# 	res_qnan() - return QNAN result					#
# 	res_snan() - return SNAN result					#
#									#
# INPUT ***************************************************************	#
#	a0 = pointer to extended precision source operand		#
#	a1 = pointer to extended precision destination operand		#
#	d0  rnd prec,mode						#
#									#
# OUTPUT **************************************************************	#
#	fp0 = result							#
#	fp1 = EXOP (if exception occurred)				#
#									#
# ALGORITHM ***********************************************************	#
#	Handle NANs, infinities, and zeroes as special cases. Divide	#
# norms/denorms into ext/sgl/dbl precision.				#
#	For norms/denorms, scale the exponents such that a multiply	#
# instruction won't cause an exception. Use the regular fmul to		#
# compute a result. Check if the regular operands would have taken	#
# an exception. If so, return the default overflow/underflow result	#
# and return the EXOP if exceptions are enabled. Else, scale the 	#
# result operand to the proper exponent.				#
#									#
#########################################################################

	align 		0x10
tbl_fmul_ovfl:
	long		0x3fff - 0x7ffe		# ext_max
	long		0x3fff - 0x407e		# sgl_max
	long		0x3fff - 0x43fe		# dbl_max
tbl_fmul_unfl:
	long		0x3fff + 0x0001		# ext_unfl
	long		0x3fff - 0x3f80		# sgl_unfl
	long		0x3fff - 0x3c00		# dbl_unfl

	global		fsmul
fsmul:
	andi.b		&0x30,%d0		# clear rnd prec
	ori.b		&s_mode*0x10,%d0	# insert sgl prec
	bra.b		fmul

	global		fdmul
fdmul:
	andi.b		&0x30,%d0
	ori.b		&d_mode*0x10,%d0	# insert dbl prec

	global		fmul
fmul:
	mov.l		%d0,L_SCR3(%a6)		# store rnd info

	clr.w		%d1
	mov.b		DTAG(%a6),%d1
	lsl.b		&0x3,%d1
	or.b		STAG(%a6),%d1		# combine src tags
	bne.w		fmul_not_norm		# optimize on non-norm input

fmul_norm:
	mov.w		DST_EX(%a1),FP_SCR1_EX(%a6)
	mov.l		DST_HI(%a1),FP_SCR1_HI(%a6)
	mov.l		DST_LO(%a1),FP_SCR1_LO(%a6)

	mov.w		SRC_EX(%a0),FP_SCR0_EX(%a6)
	mov.l		SRC_HI(%a0),FP_SCR0_HI(%a6)
	mov.l		SRC_LO(%a0),FP_SCR0_LO(%a6)

	bsr.l		scale_to_zero_src	# scale src exponent
	mov.l		%d0,-(%sp)		# save scale factor 1

	bsr.l		scale_to_zero_dst	# scale dst exponent

	add.l		%d0,(%sp)		# SCALE_FACTOR = scale1 + scale2

	mov.w		2+L_SCR3(%a6),%d1	# fetch precision
	lsr.b		&0x6,%d1		# shift to lo bits
	mov.l		(%sp)+,%d0		# load S.F.
	cmp.l		%d0,(tbl_fmul_ovfl.w,%pc,%d1.w*4) # would result ovfl?
	beq.w		fmul_may_ovfl		# result may rnd to overflow
	blt.w		fmul_ovfl		# result will overflow

	cmp.l		%d0,(tbl_fmul_unfl.w,%pc,%d1.w*4) # would result unfl?
	beq.w		fmul_may_unfl		# result may rnd to no unfl
	bgt.w		fmul_unfl		# result will underflow

#
# NORMAL:
# - the result of the multiply operation will neither overflow nor underflow.
# - do the multiply to the proper precision and rounding mode. 
# - scale the result exponent using the scale factor. if both operands were
# normalized then we really don't need to go through this scaling. but for now,
# this will do.
#
fmul_normal:
	fmovm.x		FP_SCR1(%a6),&0x80	# load dst operand

	fmov.l		L_SCR3(%a6),%fpcr	# set FPCR
	fmov.l		&0x0,%fpsr		# clear FPSR

	fmul.x		FP_SCR0(%a6),%fp0	# execute multiply	

	fmov.l		%fpsr,%d1		# save status
	fmov.l		&0x0,%fpcr		# clear FPCR

	or.l		%d1,USER_FPSR(%a6)	# save INEX2,N

fmul_normal_exit:
	fmovm.x		&0x80,FP_SCR0(%a6)	# store out result
	mov.l		%d2,-(%sp)		# save d2
	mov.w		FP_SCR0_EX(%a6),%d1	# load {sgn,exp}
	mov.l		%d1,%d2			# make a copy
	andi.l		&0x7fff,%d1		# strip sign
	andi.w		&0x8000,%d2		# keep old sign
	sub.l		%d0,%d1			# add scale factor
	or.w		%d2,%d1			# concat old sign,new exp
	mov.w		%d1,FP_SCR0_EX(%a6)	# insert new exponent
	mov.l		(%sp)+,%d2		# restore d2
	fmovm.x		FP_SCR0(%a6),&0x80	# return default result in fp0
	rts

#
# OVERFLOW:
# - the result of the multiply operation is an overflow.
# - do the multiply to the proper precision and rounding mode in order to
# set the inexact bits.
# - calculate the default result and return it in fp0.
# - if overflow or inexact is enabled, we need a multiply result rounded to
# extended precision. if the original operation was extended, then we have this
# result. if the original operation was single or double, we have to do another
# multiply using extended precision and the correct rounding mode. the result
# of this operation then has its exponent scaled by -0x6000 to create the
# exceptional operand.
#
fmul_ovfl:
	fmovm.x		FP_SCR1(%a6),&0x80	# load dst operand

	fmov.l		L_SCR3(%a6),%fpcr	# set FPCR
	fmov.l		&0x0,%fpsr		# clear FPSR

	fmul.x		FP_SCR0(%a6),%fp0	# execute multiply	

	fmov.l		%fpsr,%d1		# save status
	fmov.l		&0x0,%fpcr		# clear FPCR

	or.l		%d1,USER_FPSR(%a6)	# save INEX2,N

# save setting this until now because this is where fmul_may_ovfl may jump in
fmul_ovfl_tst:
	or.l		&ovfl_inx_mask,USER_FPSR(%a6) # set ovfl/aovfl/ainex

	mov.b		FPCR_ENABLE(%a6),%d1
	andi.b		&0x13,%d1		# is OVFL or INEX enabled?
	bne.b		fmul_ovfl_ena		# yes

# calculate the default result
fmul_ovfl_dis:
	btst		&neg_bit,FPSR_CC(%a6)	# is result negative?
	sne		%d1			# set sign param accordingly
	mov.l		L_SCR3(%a6),%d0		# pass rnd prec,mode
	bsr.l		ovf_res			# calculate default result
	or.b		%d0,FPSR_CC(%a6)	# set INF,N if applicable
	fmovm.x		(%a0),&0x80		# return default result in fp0
	rts

#
# OVFL is enabled; Create EXOP:
# - if precision is extended, then we have the EXOP. simply bias the exponent
# with an extra -0x6000. if the precision is single or double, we need to
# calculate a result rounded to extended precision.
#
fmul_ovfl_ena:
	mov.l		L_SCR3(%a6),%d1
	andi.b		&0xc0,%d1		# test the rnd prec
	bne.b		fmul_ovfl_ena_sd	# it's sgl or dbl

fmul_ovfl_ena_cont:
	fmovm.x		&0x80,FP_SCR0(%a6)	# move result to stack

	mov.l		%d2,-(%sp)		# save d2
	mov.w		FP_SCR0_EX(%a6),%d1	# fetch {sgn,exp}
	mov.w		%d1,%d2			# make a copy
	andi.l		&0x7fff,%d1		# strip sign
	sub.l		%d0,%d1			# add scale factor
	subi.l		&0x6000,%d1		# subtract bias
	andi.w		&0x7fff,%d1		# clear sign bit
	andi.w		&0x8000,%d2		# keep old sign
	or.w		%d2,%d1			# concat old sign,new exp
	mov.w		%d1,FP_SCR0_EX(%a6)	# insert new exponent
	mov.l		(%sp)+,%d2		# restore d2
	fmovm.x		FP_SCR0(%a6),&0x40	# return EXOP in fp1
	bra.b		fmul_ovfl_dis

fmul_ovfl_ena_sd:
	fmovm.x		FP_SCR1(%a6),&0x80	# load dst operand

	mov.l		L_SCR3(%a6),%d1
	andi.b		&0x30,%d1		# keep rnd mode only
	fmov.l		%d1,%fpcr		# set FPCR

	fmul.x		FP_SCR0(%a6),%fp0	# execute multiply

	fmov.l		&0x0,%fpcr		# clear FPCR
	bra.b		fmul_ovfl_ena_cont

#
# may OVERFLOW:
# - the result of the multiply operation MAY overflow.
# - do the multiply to the proper precision and rounding mode in order to
# set the inexact bits.
# - calculate the default result and return it in fp0.
#
fmul_may_ovfl:
	fmovm.x		FP_SCR1(%a6),&0x80	# load dst op

	fmov.l		L_SCR3(%a6),%fpcr	# set FPCR
	fmov.l		&0x0,%fpsr		# clear FPSR

	fmul.x		FP_SCR0(%a6),%fp0	# execute multiply
	
	fmov.l		%fpsr,%d1		# save status
	fmov.l		&0x0,%fpcr		# clear FPCR

	or.l		%d1,USER_FPSR(%a6)	# save INEX2,N

	fabs.x		%fp0,%fp1		# make a copy of result
	fcmp.b		%fp1,&0x2		# is |result| >= 2.b?
	fbge.w		fmul_ovfl_tst		# yes; overflow has occurred
	
# no, it didn't overflow; we have correct result
	bra.w		fmul_normal_exit

#
# UNDERFLOW:
# - the result of the multiply operation is an underflow.
# - do the multiply to the proper precision and rounding mode in order to
# set the inexact bits.
# - calculate the default result and return it in fp0.
# - if overflow or inexact is enabled, we need a multiply result rounded to
# extended precision. if the original operation was extended, then we have this
# result. if the original operation was single or double, we have to do another
# multiply using extended precision and the correct rounding mode. the result
# of this operation then has its exponent scaled by -0x6000 to create the
# exceptional operand.
#
fmul_unfl:	
	bset		&unfl_bit,FPSR_EXCEPT(%a6) # set unfl exc bit

# for fun, let's use only extended precision, round to zero. then, let
# the unf_res() routine figure out all the rest.
# will we get the correct answer.
	fmovm.x		FP_SCR1(%a6),&0x80	# load dst operand

	fmov.l		&rz_mode*0x10,%fpcr	# set FPCR
	fmov.l		&0x0,%fpsr		# clear FPSR

	fmul.x		FP_SCR0(%a6),%fp0	# execute multiply

	fmov.l		%fpsr,%d1		# save status
	fmov.l		&0x0,%fpcr		# clear FPCR

	or.l		%d1,USER_FPSR(%a6)	# save INEX2,N

	mov.b		FPCR_ENABLE(%a6),%d1
	andi.b		&0x0b,%d1		# is UNFL or INEX enabled?
	bne.b		fmul_unfl_ena		# yes

fmul_unfl_dis:
	fmovm.x		&0x80,FP_SCR0(%a6)	# store out result

	lea		FP_SCR0(%a6),%a0	# pass: result addr
	mov.l		L_SCR3(%a6),%d1		# pass: rnd prec,mode
	bsr.l		unf_res			# calculate default result
	or.b		%d0,FPSR_CC(%a6)	# unf_res2 may have set 'Z'
	fmovm.x		FP_SCR0(%a6),&0x80	# return default result in fp0
	rts

#
# UNFL is enabled. 
#
fmul_unfl_ena:
	fmovm.x		FP_SCR1(%a6),&0x40	# load dst op

	mov.l		L_SCR3(%a6),%d1
	andi.b		&0xc0,%d1		# is precision extended?
	bne.b		fmul_unfl_ena_sd	# no, sgl or dbl

# if the rnd mode is anything but RZ, then we have to re-do the above
# multiplication becuase we used RZ for all.
	fmov.l		L_SCR3(%a6),%fpcr	# set FPCR

fmul_unfl_ena_cont:
	fmov.l		&0x0,%fpsr		# clear FPSR

	fmul.x		FP_SCR0(%a6),%fp1	# execute multiply	

	fmov.l		&0x0,%fpcr		# clear FPCR

	fmovm.x		&0x40,FP_SCR0(%a6)	# save result to stack
	mov.l		%d2,-(%sp)		# save d2
	mov.w		FP_SCR0_EX(%a6),%d1	# fetch {sgn,exp}
	mov.l		%d1,%d2			# make a copy
	andi.l		&0x7fff,%d1		# strip sign
	andi.w		&0x8000,%d2		# keep old sign
	sub.l		%d0,%d1			# add scale factor
	addi.l		&0x6000,%d1		# add bias
	andi.w		&0x7fff,%d1
	or.w		%d2,%d1			# concat old sign,new exp
	mov.w		%d1,FP_SCR0_EX(%a6)	# insert new exponent
	mov.l		(%sp)+,%d2		# restore d2
	fmovm.x		FP_SCR0(%a6),&0x40	# return EXOP in fp1
	bra.w		fmul_unfl_dis

fmul_unfl_ena_sd:
	mov.l		L_SCR3(%a6),%d1
	andi.b		&0x30,%d1		# use only rnd mode
	fmov.l		%d1,%fpcr		# set FPCR

	bra.b		fmul_unfl_ena_cont

# MAY UNDERFLOW:
# -use the correct rounding mode and precision. this code favors operations
# that do not underflow.
fmul_may_unfl:
	fmovm.x		FP_SCR1(%a6),&0x80	# load dst operand

	fmov.l		L_SCR3(%a6),%fpcr	# set FPCR
	fmov.l		&0x0,%fpsr		# clear FPSR

	fmul.x		FP_SCR0(%a6),%fp0	# execute multiply	

	fmov.l		%fpsr,%d1		# save status
	fmov.l		&0x0,%fpcr		# clear FPCR

	or.l		%d1,USER_FPSR(%a6)	# save INEX2,N

	fabs.x		%fp0,%fp1		# make a copy of result
	fcmp.b		%fp1,&0x2		# is |result| > 2.b?
	fbgt.w		fmul_normal_exit	# no; no underflow occurred
	fblt.w		fmul_unfl		# yes; underflow occurred

#
# we still don't know if underflow occurred. result is ~ equal to 2. but,
# we don't know if the result was an underflow that rounded up to a 2 or
# a normalized number that rounded down to a 2. so, redo the entire operation
# using RZ as the rounding mode to see what the pre-rounded result is.
# this case should be relatively rare.
#
	fmovm.x		FP_SCR1(%a6),&0x40	# load dst operand

	mov.l		L_SCR3(%a6),%d1
	andi.b		&0xc0,%d1		# keep rnd prec
	ori.b		&rz_mode*0x10,%d1	# insert RZ
	
	fmov.l		%d1,%fpcr		# set FPCR
	fmov.l		&0x0,%fpsr		# clear FPSR

	fmul.x		FP_SCR0(%a6),%fp1	# execute multiply	

	fmov.l		&0x0,%fpcr		# clear FPCR
	fabs.x		%fp1			# make absolute value
	fcmp.b		%fp1,&0x2		# is |result| < 2.b?
	fbge.w		fmul_normal_exit	# no; no underflow occurred
	bra.w		fmul_unfl		# yes, underflow occurred

################################################################################

#
# Multiply: inputs are not both normalized; what are they?
#
fmul_not_norm:
	mov.w		(tbl_fmul_op.b,%pc,%d1.w*2),%d1
	jmp		(tbl_fmul_op.b,%pc,%d1.w)

	swbeg		&48
tbl_fmul_op:
	short		fmul_norm	- tbl_fmul_op # NORM x NORM
	short		fmul_zero	- tbl_fmul_op # NORM x ZERO
	short		fmul_inf_src	- tbl_fmul_op # NORM x INF
	short		fmul_res_qnan	- tbl_fmul_op # NORM x QNAN
	short		fmul_norm	- tbl_fmul_op # NORM x DENORM
	short		fmul_res_snan	- tbl_fmul_op # NORM x SNAN
	short		tbl_fmul_op	- tbl_fmul_op #
	short		tbl_fmul_op	- tbl_fmul_op #

	short		fmul_zero	- tbl_fmul_op # ZERO x NORM
	short		fmul_zero	- tbl_fmul_op # ZERO x ZERO
	short		fmul_res_operr	- tbl_fmul_op # ZERO x INF
	short		fmul_res_qnan	- tbl_fmul_op # ZERO x QNAN
	short		fmul_zero	- tbl_fmul_op # ZERO x DENORM
	short		fmul_res_snan	- tbl_fmul_op # ZERO x SNAN
	short		tbl_fmul_op	- tbl_fmul_op #
	short		tbl_fmul_op	- tbl_fmul_op #

	short		fmul_inf_dst	- tbl_fmul_op # INF x NORM
	short		fmul_res_operr	- tbl_fmul_op # INF x ZERO
	short		fmul_inf_dst	- tbl_fmul_op # INF x INF
	short		fmul_res_qnan	- tbl_fmul_op # INF x QNAN
	short		fmul_inf_dst	- tbl_fmul_op # INF x DENORM
	short		fmul_res_snan	- tbl_fmul_op # INF x SNAN
	short		tbl_fmul_op	- tbl_fmul_op #
	short		tbl_fmul_op	- tbl_fmul_op #

	short		fmul_res_qnan	- tbl_fmul_op # QNAN x NORM
	short		fmul_res_qnan	- tbl_fmul_op # QNAN x ZERO
	short		fmul_res_qnan	- tbl_fmul_op # QNAN x INF
	short		fmul_res_qnan	- tbl_fmul_op # QNAN x QNAN
	short		fmul_res_qnan	- tbl_fmul_op # QNAN x DENORM
	short		fmul_res_snan	- tbl_fmul_op # QNAN x SNAN
	short		tbl_fmul_op	- tbl_fmul_op #
	short		tbl_fmul_op	- tbl_fmul_op #

	short		fmul_norm	- tbl_fmul_op # NORM x NORM
	short		fmul_zero	- tbl_fmul_op # NORM x ZERO
	short		fmul_inf_src	- tbl_fmul_op # NORM x INF
	short		fmul_res_qnan	- tbl_fmul_op # NORM x QNAN
	short		fmul_norm	- tbl_fmul_op # NORM x DENORM
	short		fmul_res_snan	- tbl_fmul_op # NORM x SNAN
	short		tbl_fmul_op	- tbl_fmul_op #
	short		tbl_fmul_op	- tbl_fmul_op #

	short		fmul_res_snan	- tbl_fmul_op # SNAN x NORM
	short		fmul_res_snan	- tbl_fmul_op # SNAN x ZERO
	short		fmul_res_snan	- tbl_fmul_op # SNAN x INF
	short		fmul_res_snan	- tbl_fmul_op # SNAN x QNAN
	short		fmul_res_snan	- tbl_fmul_op # SNAN x DENORM
	short		fmul_res_snan	- tbl_fmul_op # SNAN x SNAN
	short		tbl_fmul_op	- tbl_fmul_op #
	short		tbl_fmul_op	- tbl_fmul_op #

fmul_res_operr:
	bra.l		res_operr
fmul_res_snan:
	bra.l		res_snan
fmul_res_qnan:
	bra.l		res_qnan

#
# Multiply: (Zero x Zero) || (Zero x norm) || (Zero x denorm)
#
	global		fmul_zero		# global for fsglmul
fmul_zero:
	mov.b		SRC_EX(%a0),%d0		# exclusive or the signs
	mov.b		DST_EX(%a1),%d1
	eor.b		%d0,%d1
	bpl.b		fmul_zero_p		# result ZERO is pos.
fmul_zero_n:
	fmov.s		&0x80000000,%fp0	# load -ZERO
	mov.b		&z_bmask+neg_bmask,FPSR_CC(%a6) # set Z/N
	rts
fmul_zero_p:
	fmov.s		&0x00000000,%fp0	# load +ZERO
	mov.b		&z_bmask,FPSR_CC(%a6)	# set Z
	rts

#
# Multiply: (inf x inf) || (inf x norm) || (inf x denorm)
#
# Note: The j-bit for an infinity is a don't-care. However, to be
# strictly compatible w/ the 68881/882, we make sure to return an
# INF w/ the j-bit set if the input INF j-bit was set. Destination
# INFs take priority.
#
	global		fmul_inf_dst		# global for fsglmul
fmul_inf_dst:
	fmovm.x		DST(%a1),&0x80		# return INF result in fp0
	mov.b		SRC_EX(%a0),%d0		# exclusive or the signs
	mov.b		DST_EX(%a1),%d1
	eor.b		%d0,%d1
	bpl.b		fmul_inf_dst_p		# result INF is pos.
fmul_inf_dst_n:
	fabs.x		%fp0			# clear result sign
	fneg.x		%fp0			# set result sign
	mov.b		&inf_bmask+neg_bmask,FPSR_CC(%a6) # set INF/N
	rts
fmul_inf_dst_p:
	fabs.x		%fp0			# clear result sign
	mov.b		&inf_bmask,FPSR_CC(%a6)	# set INF
	rts

	global		fmul_inf_src		# global for fsglmul
fmul_inf_src:
	fmovm.x		SRC(%a0),&0x80		# return INF result in fp0
	mov.b		SRC_EX(%a0),%d0		# exclusive or the signs
	mov.b		DST_EX(%a1),%d1
	eor.b		%d0,%d1
	bpl.b		fmul_inf_dst_p		# result INF is pos.
	bra.b		fmul_inf_dst_n

#########################################################################
# XDEF ****************************************************************	#
#	fin(): emulates the fmove instruction				#
#	fsin(): emulates the fsmove instruction				#
#	fdin(): emulates the fdmove instruction				#
#									#
# XREF ****************************************************************	#
#	norm() - normalize mantissa for EXOP on denorm			#
#	scale_to_zero_src() - scale src exponent to zero		#
#	ovf_res() - return default overflow result			#
# 	unf_res() - return default underflow result			#
#	res_qnan_1op() - return QNAN result				#
#	res_snan_1op() - return SNAN result				#
#									#
# INPUT ***************************************************************	#
#	a0 = pointer to extended precision source operand		#
#	d0 = round prec/mode						#
# 									#
# OUTPUT **************************************************************	#
#	fp0 = result							#
#	fp1 = EXOP (if exception occurred)				#
#									#
# ALGORITHM ***********************************************************	#
# 	Handle NANs, infinities, and zeroes as special cases. Divide	#
# norms into extended, single, and double precision.			#
# 	Norms can be emulated w/ a regular fmove instruction. For	#
# sgl/dbl, must scale exponent and perform an "fmove". Check to see	#
# if the result would have overflowed/underflowed. If so, use unf_res()	#
# or ovf_res() to return the default result. Also return EXOP if	#
# exception is enabled. If no exception, return the default result.	#
#	Unnorms don't pass through here.				#
#									#
#########################################################################

	global		fsin
fsin:
	andi.b		&0x30,%d0		# clear rnd prec
	ori.b		&s_mode*0x10,%d0	# insert sgl precision
	bra.b		fin

	global		fdin
fdin:
	andi.b		&0x30,%d0		# clear rnd prec
	ori.b		&d_mode*0x10,%d0	# insert dbl precision

	global		fin
fin:
	mov.l		%d0,L_SCR3(%a6)		# store rnd info

	mov.b		STAG(%a6),%d1		# fetch src optype tag
	bne.w		fin_not_norm		# optimize on non-norm input
		
#
# FP MOVE IN: NORMs and DENORMs ONLY!
#
fin_norm:
	andi.b		&0xc0,%d0		# is precision extended?
	bne.w		fin_not_ext		# no, so go handle dbl or sgl

#
# precision selected is extended. so...we cannot get an underflow
# or overflow because of rounding to the correct precision. so...
# skip the scaling and unscaling...
#
	tst.b		SRC_EX(%a0)		# is the operand negative?
	bpl.b		fin_norm_done		# no
	bset		&neg_bit,FPSR_CC(%a6)	# yes, so set 'N' ccode bit
fin_norm_done:
	fmovm.x		SRC(%a0),&0x80		# return result in fp0
	rts

#
# for an extended precision DENORM, the UNFL exception bit is set
# the accrued bit is NOT set in this instance(no inexactness!)
#
fin_denorm:
	andi.b		&0xc0,%d0		# is precision extended?
	bne.w		fin_not_ext		# no, so go handle dbl or sgl

	bset		&unfl_bit,FPSR_EXCEPT(%a6) # set unfl exc bit
	tst.b		SRC_EX(%a0)		# is the operand negative?
	bpl.b		fin_denorm_done		# no
	bset		&neg_bit,FPSR_CC(%a6)	# yes, so set 'N' ccode bit
fin_denorm_done:
	fmovm.x		SRC(%a0),&0x80		# return result in fp0
	btst		&unfl_bit,FPCR_ENABLE(%a6) # is UNFL enabled?
	bne.b		fin_denorm_unfl_ena	# yes
	rts

#
# the input is an extended DENORM and underflow is enabled in the FPCR.
# normalize the mantissa and add the bias of 0x6000 to the resulting negative
# exponent and insert back into the operand.
#
fin_denorm_unfl_ena:
	mov.w		SRC_EX(%a0),FP_SCR0_EX(%a6)
	mov.l		SRC_HI(%a0),FP_SCR0_HI(%a6)
	mov.l		SRC_LO(%a0),FP_SCR0_LO(%a6)
	lea		FP_SCR0(%a6),%a0	# pass: ptr to operand
	bsr.l		norm			# normalize result
	neg.w		%d0			# new exponent = -(shft val)
	addi.w		&0x6000,%d0		# add new bias to exponent
	mov.w		FP_SCR0_EX(%a6),%d1	# fetch old sign,exp
	andi.w		&0x8000,%d1		# keep old sign
	andi.w		&0x7fff,%d0		# clear sign position
	or.w		%d1,%d0			# concat new exo,old sign
	mov.w		%d0,FP_SCR0_EX(%a6)	# insert new exponent
	fmovm.x		FP_SCR0(%a6),&0x40	# return EXOP in fp1
	rts

#
# operand is to be rounded to single or double precision
#	
fin_not_ext:
	cmpi.b		%d0,&s_mode*0x10 	# separate sgl/dbl prec
	bne.b		fin_dbl

#
# operand is to be rounded to single precision
#
fin_sgl:
	mov.w		SRC_EX(%a0),FP_SCR0_EX(%a6)
	mov.l		SRC_HI(%a0),FP_SCR0_HI(%a6)
	mov.l		SRC_LO(%a0),FP_SCR0_LO(%a6)
	bsr.l		scale_to_zero_src	# calculate scale factor

	cmpi.l		%d0,&0x3fff-0x3f80	# will move in underflow?
	bge.w		fin_sd_unfl		# yes; go handle underflow
	cmpi.l		%d0,&0x3fff-0x407e	# will move in overflow?
	beq.w		fin_sd_may_ovfl		# maybe; go check
	blt.w		fin_sd_ovfl		# yes; go handle overflow

#
# operand will NOT overflow or underflow when moved into the fp reg file
#
fin_sd_normal:
	fmov.l		&0x0,%fpsr		# clear FPSR
	fmov.l		L_SCR3(%a6),%fpcr	# set FPCR

	fmov.x		FP_SCR0(%a6),%fp0	# perform move

	fmov.l		%fpsr,%d1		# save FPSR
	fmov.l		&0x0,%fpcr		# clear FPCR

	or.l		%d1,USER_FPSR(%a6)	# save INEX2,N

fin_sd_normal_exit:
	mov.l		%d2,-(%sp)		# save d2
	fmovm.x		&0x80,FP_SCR0(%a6)	# store out result
	mov.w		FP_SCR0_EX(%a6),%d1	# load {sgn,exp}
	mov.w		%d1,%d2			# make a copy
	andi.l		&0x7fff,%d1		# strip sign
	sub.l		%d0,%d1			# add scale factor
	andi.w		&0x8000,%d2		# keep old sign
	or.w		%d1,%d2			# concat old sign,new exponent
	mov.w		%d2,FP_SCR0_EX(%a6)	# insert new exponent
	mov.l		(%sp)+,%d2		# restore d2
	fmovm.x		FP_SCR0(%a6),&0x80	# return result in fp0
	rts

#
# operand is to be rounded to double precision
#
fin_dbl:
	mov.w		SRC_EX(%a0),FP_SCR0_EX(%a6)
	mov.l		SRC_HI(%a0),FP_SCR0_HI(%a6)
	mov.l		SRC_LO(%a0),FP_SCR0_LO(%a6)
	bsr.l		scale_to_zero_src	# calculate scale factor

	cmpi.l		%d0,&0x3fff-0x3c00	# will move in underflow?
	bge.w		fin_sd_unfl		# yes; go handle underflow
	cmpi.l		%d0,&0x3fff-0x43fe	# will move in overflow?
	beq.w		fin_sd_may_ovfl		# maybe; go check
	blt.w		fin_sd_ovfl		# yes; go handle overflow
	bra.w		fin_sd_normal		# no; ho handle normalized op

#
# operand WILL underflow when moved in to the fp register file
#
fin_sd_unfl:
	bset		&unfl_bit,FPSR_EXCEPT(%a6) # set unfl exc bit

	tst.b		FP_SCR0_EX(%a6)		# is operand negative?
	bpl.b		fin_sd_unfl_tst
	bset		&neg_bit,FPSR_CC(%a6)	# set 'N' ccode bit

# if underflow or inexact is enabled, then go calculate the EXOP first.
fin_sd_unfl_tst:
	mov.b		FPCR_ENABLE(%a6),%d1
	andi.b		&0x0b,%d1		# is UNFL or INEX enabled?
	bne.b		fin_sd_unfl_ena		# yes

fin_sd_unfl_dis:
	lea		FP_SCR0(%a6),%a0	# pass: result addr
	mov.l		L_SCR3(%a6),%d1		# pass: rnd prec,mode
	bsr.l		unf_res			# calculate default result
	or.b		%d0,FPSR_CC(%a6)	# unf_res may have set 'Z'
	fmovm.x		FP_SCR0(%a6),&0x80	# return default result in fp0
	rts	

#
# operand will underflow AND underflow or inexact is enabled. 
# therefore, we must return the result rounded to extended precision.
#
fin_sd_unfl_ena:
	mov.l		FP_SCR0_HI(%a6),FP_SCR1_HI(%a6)
	mov.l		FP_SCR0_LO(%a6),FP_SCR1_LO(%a6)
	mov.w		FP_SCR0_EX(%a6),%d1	# load current exponent

	mov.l		%d2,-(%sp)		# save d2
	mov.w		%d1,%d2			# make a copy
	andi.l		&0x7fff,%d1		# strip sign
	sub.l		%d0,%d1			# subtract scale factor
	andi.w		&0x8000,%d2		# extract old sign
	addi.l		&0x6000,%d1		# add new bias
	andi.w		&0x7fff,%d1
	or.w		%d1,%d2			# concat old sign,new exp
	mov.w		%d2,FP_SCR1_EX(%a6)	# insert new exponent
	fmovm.x		FP_SCR1(%a6),&0x40	# return EXOP in fp1
	mov.l		(%sp)+,%d2		# restore d2
	bra.b		fin_sd_unfl_dis

#
# operand WILL overflow.
#
fin_sd_ovfl:
	fmov.l		&0x0,%fpsr		# clear FPSR
	fmov.l		L_SCR3(%a6),%fpcr	# set FPCR

	fmov.x		FP_SCR0(%a6),%fp0	# perform move

	fmov.l		&0x0,%fpcr		# clear FPCR
	fmov.l		%fpsr,%d1		# save FPSR

	or.l		%d1,USER_FPSR(%a6)	# save INEX2,N

fin_sd_ovfl_tst:
	or.l		&ovfl_inx_mask,USER_FPSR(%a6) # set ovfl/aovfl/ainex

	mov.b		FPCR_ENABLE(%a6),%d1
	andi.b		&0x13,%d1		# is OVFL or INEX enabled?
	bne.b		fin_sd_ovfl_ena		# yes

#
# OVFL is not enabled; therefore, we must create the default result by
# calling ovf_res().
#
fin_sd_ovfl_dis:
	btst		&neg_bit,FPSR_CC(%a6)	# is result negative?
	sne		%d1			# set sign param accordingly
	mov.l		L_SCR3(%a6),%d0		# pass: prec,mode
	bsr.l		ovf_res			# calculate default result
	or.b		%d0,FPSR_CC(%a6)	# set INF,N if applicable
	fmovm.x		(%a0),&0x80		# return default result in fp0
	rts

#
# OVFL is enabled.
# the INEX2 bit has already been updated by the round to the correct precision.
# now, round to extended(and don't alter the FPSR).
#
fin_sd_ovfl_ena:
	mov.l		%d2,-(%sp)		# save d2
	mov.w		FP_SCR0_EX(%a6),%d1	# fetch {sgn,exp}
	mov.l		%d1,%d2			# make a copy
	andi.l		&0x7fff,%d1		# strip sign
	andi.w		&0x8000,%d2		# keep old sign
	sub.l		%d0,%d1			# add scale factor
	sub.l		&0x6000,%d1		# subtract bias
	andi.w		&0x7fff,%d1
	or.w		%d2,%d1
	mov.w		%d1,FP_SCR0_EX(%a6)	# insert new exponent
	mov.l		(%sp)+,%d2		# restore d2
	fmovm.x		FP_SCR0(%a6),&0x40	# return EXOP in fp1
	bra.b		fin_sd_ovfl_dis

#
# the move in MAY overflow. so...
#
fin_sd_may_ovfl:
	fmov.l		&0x0,%fpsr		# clear FPSR
	fmov.l		L_SCR3(%a6),%fpcr	# set FPCR

	fmov.x		FP_SCR0(%a6),%fp0	# perform the move

	fmov.l		%fpsr,%d1		# save status
	fmov.l		&0x0,%fpcr		# clear FPCR

	or.l		%d1,USER_FPSR(%a6)	# save INEX2,N

	fabs.x		%fp0,%fp1		# make a copy of result
	fcmp.b		%fp1,&0x2		# is |result| >= 2.b?
	fbge.w		fin_sd_ovfl_tst		# yes; overflow has occurred

# no, it didn't overflow; we have correct result
	bra.w		fin_sd_normal_exit

##########################################################################

#
# operand is not a NORM: check its optype and branch accordingly
#
fin_not_norm:
	cmpi.b		%d1,&DENORM		# weed out DENORM
	beq.w		fin_denorm
	cmpi.b		%d1,&SNAN		# weed out SNANs
	beq.l		res_snan_1op
	cmpi.b		%d1,&QNAN		# weed out QNANs
	beq.l		res_qnan_1op

#
# do the fmove in; at this point, only possible ops are ZERO and INF.
# use fmov to determine ccodes.
# prec:mode should be zero at this point but it won't affect answer anyways.
#
	fmov.x		SRC(%a0),%fp0		# do fmove in
	fmov.l		%fpsr,%d0		# no exceptions possible
	rol.l		&0x8,%d0		# put ccodes in lo byte
	mov.b		%d0,FPSR_CC(%a6)	# insert correct ccodes
	rts

#########################################################################
# XDEF ****************************************************************	#
# 	fdiv(): emulates the fdiv instruction				#
#	fsdiv(): emulates the fsdiv instruction				#
#	fddiv(): emulates the fddiv instruction				#
#									#
# XREF ****************************************************************	#
#	scale_to_zero_src() - scale src exponent to zero		#
#	scale_to_zero_dst() - scale dst exponent to zero		#
#	unf_res() - return default underflow result			#
#	ovf_res() - return default overflow result			#
# 	res_qnan() - return QNAN result					#
# 	res_snan() - return SNAN result					#
#									#
# INPUT ***************************************************************	#
#	a0 = pointer to extended precision source operand		#
#	a1 = pointer to extended precision destination operand		#
#	d0  rnd prec,mode						#
#									#
# OUTPUT **************************************************************	#
#	fp0 = result							#
#	fp1 = EXOP (if exception occurred)				#
#									#
# ALGORITHM ***********************************************************	#
#	Handle NANs, infinities, and zeroes as special cases. Divide	#
# norms/denorms into ext/sgl/dbl precision.				#
#	For norms/denorms, scale the exponents such that a divide	#
# instruction won't cause an exception. Use the regular fdiv to		#
# compute a result. Check if the regular operands would have taken	#
# an exception. If so, return the default overflow/underflow result	#
# and return the EXOP if exceptions are enabled. Else, scale the 	#
# result operand to the proper exponent.				#
#									#
#########################################################################

	align		0x10
tbl_fdiv_unfl:
	long		0x3fff - 0x0000		# ext_unfl
	long		0x3fff - 0x3f81		# sgl_unfl
	long		0x3fff - 0x3c01		# dbl_unfl

tbl_fdiv_ovfl:
	long		0x3fff - 0x7ffe		# ext overflow exponent
	long		0x3fff - 0x407e		# sgl overflow exponent
	long		0x3fff - 0x43fe		# dbl overflow exponent

	global		fsdiv
fsdiv:
	andi.b		&0x30,%d0		# clear rnd prec
	ori.b		&s_mode*0x10,%d0	# insert sgl prec
	bra.b		fdiv

	global		fddiv
fddiv:
	andi.b		&0x30,%d0		# clear rnd prec
	ori.b		&d_mode*0x10,%d0	# insert dbl prec

	global		fdiv
fdiv:
	mov.l		%d0,L_SCR3(%a6)		# store rnd info

	clr.w		%d1
	mov.b		DTAG(%a6),%d1
	lsl.b		&0x3,%d1
	or.b		STAG(%a6),%d1		# combine src tags

	bne.w		fdiv_not_norm		# optimize on non-norm input
		
#
# DIVIDE: NORMs and DENORMs ONLY!
#
fdiv_norm:
	mov.w		DST_EX(%a1),FP_SCR1_EX(%a6)
	mov.l		DST_HI(%a1),FP_SCR1_HI(%a6)
	mov.l		DST_LO(%a1),FP_SCR1_LO(%a6)

	mov.w		SRC_EX(%a0),FP_SCR0_EX(%a6)
	mov.l		SRC_HI(%a0),FP_SCR0_HI(%a6)
	mov.l		SRC_LO(%a0),FP_SCR0_LO(%a6)

	bsr.l		scale_to_zero_src	# scale src exponent
	mov.l		%d0,-(%sp)		# save scale factor 1

	bsr.l		scale_to_zero_dst	# scale dst exponent

	neg.l		(%sp)			# SCALE FACTOR = scale1 - scale2
	add.l		%d0,(%sp)

	mov.w		2+L_SCR3(%a6),%d1	# fetch precision
	lsr.b		&0x6,%d1		# shift to lo bits
	mov.l		(%sp)+,%d0		# load S.F.
	cmp.l		%d0,(tbl_fdiv_ovfl.b,%pc,%d1.w*4) # will result overflow?
	ble.w		fdiv_may_ovfl		# result will overflow

	cmp.l		%d0,(tbl_fdiv_unfl.w,%pc,%d1.w*4) # will result underflow?
	beq.w		fdiv_may_unfl		# maybe
	bgt.w		fdiv_unfl		# yes; go handle underflow

fdiv_normal:
	fmovm.x		FP_SCR1(%a6),&0x80	# load dst op

	fmov.l		L_SCR3(%a6),%fpcr	# save FPCR
	fmov.l		&0x0,%fpsr		# clear FPSR

	fdiv.x		FP_SCR0(%a6),%fp0	# perform divide

	fmov.l		%fpsr,%d1		# save FPSR
	fmov.l		&0x0,%fpcr		# clear FPCR

	or.l		%d1,USER_FPSR(%a6)	# save INEX2,N

fdiv_normal_exit:
	fmovm.x		&0x80,FP_SCR0(%a6)	# store result on stack
	mov.l		%d2,-(%sp)		# store d2
	mov.w		FP_SCR0_EX(%a6),%d1	# load {sgn,exp}
	mov.l		%d1,%d2			# make a copy
	andi.l		&0x7fff,%d1		# strip sign
	andi.w		&0x8000,%d2		# keep old sign
	sub.l		%d0,%d1			# add scale factor
	or.w		%d2,%d1			# concat old sign,new exp
	mov.w		%d1,FP_SCR0_EX(%a6)	# insert new exponent
	mov.l		(%sp)+,%d2		# restore d2
	fmovm.x		FP_SCR0(%a6),&0x80	# return result in fp0
	rts

tbl_fdiv_ovfl2:
	long		0x7fff
	long		0x407f
	long		0x43ff

fdiv_no_ovfl:
	mov.l		(%sp)+,%d0		# restore scale factor
	bra.b		fdiv_normal_exit
	
fdiv_may_ovfl:
	mov.l		%d0,-(%sp)		# save scale factor

	fmovm.x		FP_SCR1(%a6),&0x80	# load dst op

	fmov.l		L_SCR3(%a6),%fpcr	# set FPCR
	fmov.l		&0x0,%fpsr		# set FPSR

	fdiv.x		FP_SCR0(%a6),%fp0	# execute divide

	fmov.l		%fpsr,%d0
	fmov.l		&0x0,%fpcr

	or.l		%d0,USER_FPSR(%a6)	# save INEX,N

	fmovm.x		&0x01,-(%sp)		# save result to stack
	mov.w		(%sp),%d0		# fetch new exponent
	add.l		&0xc,%sp		# clear result from stack
	andi.l		&0x7fff,%d0		# strip sign
	sub.l		(%sp),%d0		# add scale factor
	cmp.l		%d0,(tbl_fdiv_ovfl2.b,%pc,%d1.w*4)
	blt.b		fdiv_no_ovfl
	mov.l		(%sp)+,%d0

fdiv_ovfl_tst:
	or.l		&ovfl_inx_mask,USER_FPSR(%a6) # set ovfl/aovfl/ainex

	mov.b		FPCR_ENABLE(%a6),%d1
	andi.b		&0x13,%d1		# is OVFL or INEX enabled?
	bne.b		fdiv_ovfl_ena		# yes

fdiv_ovfl_dis:
	btst		&neg_bit,FPSR_CC(%a6) 	# is result negative?
	sne		%d1			# set sign param accordingly
	mov.l		L_SCR3(%a6),%d0		# pass prec:rnd
	bsr.l		ovf_res			# calculate default result
	or.b		%d0,FPSR_CC(%a6)	# set INF if applicable
	fmovm.x		(%a0),&0x80		# return default result in fp0
	rts

fdiv_ovfl_ena:
	mov.l		L_SCR3(%a6),%d1
	andi.b		&0xc0,%d1		# is precision extended?
	bne.b		fdiv_ovfl_ena_sd	# no, do sgl or dbl

fdiv_ovfl_ena_cont:
	fmovm.x		&0x80,FP_SCR0(%a6)	# move result to stack

	mov.l		%d2,-(%sp)		# save d2
	mov.w		FP_SCR0_EX(%a6),%d1	# fetch {sgn,exp}
	mov.w		%d1,%d2			# make a copy
	andi.l		&0x7fff,%d1		# strip sign
	sub.l		%d0,%d1			# add scale factor
	subi.l		&0x6000,%d1		# subtract bias
	andi.w		&0x7fff,%d1		# clear sign bit
	andi.w		&0x8000,%d2		# keep old sign
	or.w		%d2,%d1			# concat old sign,new exp
	mov.w		%d1,FP_SCR0_EX(%a6)	# insert new exponent
	mov.l		(%sp)+,%d2		# restore d2
	fmovm.x		FP_SCR0(%a6),&0x40	# return EXOP in fp1
	bra.b		fdiv_ovfl_dis

fdiv_ovfl_ena_sd:
	fmovm.x		FP_SCR1(%a6),&0x80	# load dst operand

	mov.l		L_SCR3(%a6),%d1
	andi.b		&0x30,%d1		# keep rnd mode
	fmov.l		%d1,%fpcr		# set FPCR

	fdiv.x		FP_SCR0(%a6),%fp0	# execute divide

	fmov.l		&0x0,%fpcr		# clear FPCR
	bra.b		fdiv_ovfl_ena_cont

fdiv_unfl:
	bset		&unfl_bit,FPSR_EXCEPT(%a6) # set unfl exc bit

	fmovm.x		FP_SCR1(%a6),&0x80	# load dst op

	fmov.l		&rz_mode*0x10,%fpcr	# set FPCR
	fmov.l		&0x0,%fpsr		# clear FPSR

	fdiv.x		FP_SCR0(%a6),%fp0	# execute divide

	fmov.l		%fpsr,%d1		# save status
	fmov.l		&0x0,%fpcr		# clear FPCR

	or.l		%d1,USER_FPSR(%a6)	# save INEX2,N

	mov.b		FPCR_ENABLE(%a6),%d1
	andi.b		&0x0b,%d1		# is UNFL or INEX enabled?
	bne.b		fdiv_unfl_ena		# yes

fdiv_unfl_dis:
	fmovm.x		&0x80,FP_SCR0(%a6)	# store out result

	lea		FP_SCR0(%a6),%a0	# pass: result addr
	mov.l		L_SCR3(%a6),%d1		# pass: rnd prec,mode
	bsr.l		unf_res			# calculate default result
	or.b		%d0,FPSR_CC(%a6)	# 'Z' may have been set
	fmovm.x		FP_SCR0(%a6),&0x80	# return default result in fp0
	rts

#
# UNFL is enabled. 
#
fdiv_unfl_ena:
	fmovm.x		FP_SCR1(%a6),&0x40	# load dst op

	mov.l		L_SCR3(%a6),%d1
	andi.b		&0xc0,%d1		# is precision extended?
	bne.b		fdiv_unfl_ena_sd	# no, sgl or dbl

	fmov.l		L_SCR3(%a6),%fpcr	# set FPCR

fdiv_unfl_ena_cont:
	fmov.l		&0x0,%fpsr		# clear FPSR

	fdiv.x		FP_SCR0(%a6),%fp1	# execute divide

	fmov.l		&0x0,%fpcr		# clear FPCR

	fmovm.x		&0x40,FP_SCR0(%a6)	# save result to stack
	mov.l		%d2,-(%sp)		# save d2
	mov.w		FP_SCR0_EX(%a6),%d1	# fetch {sgn,exp}
	mov.l		%d1,%d2			# make a copy
	andi.l		&0x7fff,%d1		# strip sign
	andi.w		&0x8000,%d2		# keep old sign
	sub.l		%d0,%d1			# add scale factoer
	addi.l		&0x6000,%d1		# add bias
	andi.w		&0x7fff,%d1
	or.w		%d2,%d1			# concat old sign,new exp
	mov.w		%d1,FP_SCR0_EX(%a6)	# insert new exp
	mov.l		(%sp)+,%d2		# restore d2
	fmovm.x		FP_SCR0(%a6),&0x40	# return EXOP in fp1
	bra.w		fdiv_unfl_dis

fdiv_unfl_ena_sd:
	mov.l		L_SCR3(%a6),%d1
	andi.b		&0x30,%d1		# use only rnd mode
	fmov.l		%d1,%fpcr		# set FPCR

	bra.b		fdiv_unfl_ena_cont

#
# the divide operation MAY underflow:
#
fdiv_may_unfl:
	fmovm.x		FP_SCR1(%a6),&0x80	# load dst op

	fmov.l		L_SCR3(%a6),%fpcr	# set FPCR
	fmov.l		&0x0,%fpsr		# clear FPSR

	fdiv.x		FP_SCR0(%a6),%fp0	# execute divide

	fmov.l		%fpsr,%d1		# save status
	fmov.l		&0x0,%fpcr		# clear FPCR

	or.l		%d1,USER_FPSR(%a6)	# save INEX2,N

	fabs.x		%fp0,%fp1		# make a copy of result
	fcmp.b		%fp1,&0x1		# is |result| > 1.b?
	fbgt.w		fdiv_normal_exit	# no; no underflow occurred
	fblt.w		fdiv_unfl		# yes; underflow occurred

#
# we still don't know if underflow occurred. result is ~ equal to 1. but,
# we don't know if the result was an underflow that rounded up to a 1
# or a normalized number that rounded down to a 1. so, redo the entire 
# operation using RZ as the rounding mode to see what the pre-rounded 
# result is. this case should be relatively rare.
#
	fmovm.x		FP_SCR1(%a6),&0x40	# load dst op into fp1

	mov.l		L_SCR3(%a6),%d1
	andi.b		&0xc0,%d1		# keep rnd prec
	ori.b		&rz_mode*0x10,%d1	# insert RZ

	fmov.l		%d1,%fpcr		# set FPCR
	fmov.l		&0x0,%fpsr		# clear FPSR

	fdiv.x		FP_SCR0(%a6),%fp1	# execute divide

	fmov.l		&0x0,%fpcr		# clear FPCR
	fabs.x		%fp1			# make absolute value
	fcmp.b		%fp1,&0x1		# is |result| < 1.b?
	fbge.w		fdiv_normal_exit	# no; no underflow occurred
	bra.w		fdiv_unfl		# yes; underflow occurred

############################################################################

#
# Divide: inputs are not both normalized; what are they?
#
fdiv_not_norm:
	mov.w		(tbl_fdiv_op.b,%pc,%d1.w*2),%d1
	jmp		(tbl_fdiv_op.b,%pc,%d1.w*1)

	swbeg		&48
tbl_fdiv_op:
	short		fdiv_norm	- tbl_fdiv_op # NORM / NORM
	short		fdiv_inf_load	- tbl_fdiv_op # NORM / ZERO
	short		fdiv_zero_load	- tbl_fdiv_op # NORM / INF
	short		fdiv_res_qnan	- tbl_fdiv_op # NORM / QNAN
	short		fdiv_norm	- tbl_fdiv_op # NORM / DENORM
	short		fdiv_res_snan	- tbl_fdiv_op # NORM / SNAN
	short		tbl_fdiv_op	- tbl_fdiv_op #
	short		tbl_fdiv_op	- tbl_fdiv_op #

	short		fdiv_zero_load	- tbl_fdiv_op # ZERO / NORM
	short		fdiv_res_operr	- tbl_fdiv_op # ZERO / ZERO
	short		fdiv_zero_load	- tbl_fdiv_op # ZERO / INF
	short		fdiv_res_qnan	- tbl_fdiv_op # ZERO / QNAN
	short		fdiv_zero_load	- tbl_fdiv_op # ZERO / DENORM
	short		fdiv_res_snan	- tbl_fdiv_op # ZERO / SNAN
	short		tbl_fdiv_op	- tbl_fdiv_op #
	short		tbl_fdiv_op	- tbl_fdiv_op #

	short		fdiv_inf_dst	- tbl_fdiv_op # INF / NORM
	short		fdiv_inf_dst	- tbl_fdiv_op # INF / ZERO
	short		fdiv_res_operr	- tbl_fdiv_op # INF / INF
	short		fdiv_res_qnan	- tbl_fdiv_op # INF / QNAN
	short		fdiv_inf_dst	- tbl_fdiv_op # INF / DENORM
	short		fdiv_res_snan	- tbl_fdiv_op # INF / SNAN
	short		tbl_fdiv_op	- tbl_fdiv_op #
	short		tbl_fdiv_op	- tbl_fdiv_op #

	short		fdiv_res_qnan	- tbl_fdiv_op # QNAN / NORM
	short		fdiv_res_qnan	- tbl_fdiv_op # QNAN / ZERO
	short		fdiv_res_qnan	- tbl_fdiv_op # QNAN / INF
	short		fdiv_res_qnan	- tbl_fdiv_op # QNAN / QNAN
	short		fdiv_res_qnan	- tbl_fdiv_op # QNAN / DENORM
	short		fdiv_res_snan	- tbl_fdiv_op # QNAN / SNAN
	short		tbl_fdiv_op	- tbl_fdiv_op #
	short		tbl_fdiv_op	- tbl_fdiv_op #

	short		fdiv_norm	- tbl_fdiv_op # DENORM / NORM
	short		fdiv_inf_load	- tbl_fdiv_op # DENORM / ZERO
	short		fdiv_zero_load	- tbl_fdiv_op # DENORM / INF
	short		fdiv_res_qnan	- tbl_fdiv_op # DENORM / QNAN
	short		fdiv_norm	- tbl_fdiv_op # DENORM / DENORM
	short		fdiv_res_snan	- tbl_fdiv_op # DENORM / SNAN
	short		tbl_fdiv_op	- tbl_fdiv_op #
	short		tbl_fdiv_op	- tbl_fdiv_op #

	short		fdiv_res_snan	- tbl_fdiv_op # SNAN / NORM
	short		fdiv_res_snan	- tbl_fdiv_op # SNAN / ZERO
	short		fdiv_res_snan	- tbl_fdiv_op # SNAN / INF
	short		fdiv_res_snan	- tbl_fdiv_op # SNAN / QNAN
	short		fdiv_res_snan	- tbl_fdiv_op # SNAN / DENORM
	short		fdiv_res_snan	- tbl_fdiv_op # SNAN / SNAN
	short		tbl_fdiv_op	- tbl_fdiv_op #
	short		tbl_fdiv_op	- tbl_fdiv_op #

fdiv_res_qnan:
	bra.l		res_qnan
fdiv_res_snan:
	bra.l		res_snan
fdiv_res_operr:
	bra.l		res_operr

	global		fdiv_zero_load		# global for fsgldiv
fdiv_zero_load:
	mov.b		SRC_EX(%a0),%d0		# result sign is exclusive
	mov.b		DST_EX(%a1),%d1		# or of input signs.
	eor.b		%d0,%d1
	bpl.b		fdiv_zero_load_p	# result is positive
	fmov.s		&0x80000000,%fp0	# load a -ZERO
	mov.b		&z_bmask+neg_bmask,FPSR_CC(%a6)	# set Z/N
	rts
fdiv_zero_load_p:
	fmov.s		&0x00000000,%fp0	# load a +ZERO
	mov.b		&z_bmask,FPSR_CC(%a6)	# set Z
	rts

#
# The destination was In Range and the source was a ZERO. The result,
# therefore, is an INF w/ the proper sign.
# So, determine the sign and return a new INF (w/ the j-bit cleared).
#
	global		fdiv_inf_load		# global for fsgldiv
fdiv_inf_load:
	ori.w		&dz_mask+adz_mask,2+USER_FPSR(%a6) # no; set DZ/ADZ
	mov.b		SRC_EX(%a0),%d0		# load both signs
	mov.b		DST_EX(%a1),%d1
	eor.b		%d0,%d1
	bpl.b		fdiv_inf_load_p		# result is positive
	fmov.s		&0xff800000,%fp0	# make result -INF
	mov.b		&inf_bmask+neg_bmask,FPSR_CC(%a6) # set INF/N
	rts
fdiv_inf_load_p:
	fmov.s		&0x7f800000,%fp0	# make result +INF
	mov.b		&inf_bmask,FPSR_CC(%a6)	# set INF
	rts

#
# The destination was an INF w/ an In Range or ZERO source, the result is 
# an INF w/ the proper sign. 
# The 68881/882 returns the destination INF w/ the new sign(if the j-bit of the
# dst INF is set, then then j-bit of the result INF is also set).
#
	global		fdiv_inf_dst		# global for fsgldiv
fdiv_inf_dst:
	mov.b		DST_EX(%a1),%d0		# load both signs
	mov.b		SRC_EX(%a0),%d1
	eor.b		%d0,%d1
	bpl.b		fdiv_inf_dst_p		# result is positive

	fmovm.x		DST(%a1),&0x80		# return result in fp0
	fabs.x		%fp0			# clear sign bit
	fneg.x		%fp0			# set sign bit
	mov.b		&inf_bmask+neg_bmask,FPSR_CC(%a6) # set INF/NEG
	rts

fdiv_inf_dst_p:
	fmovm.x		DST(%a1),&0x80		# return result in fp0
	fabs.x		%fp0			# return positive INF
	mov.b		&inf_bmask,FPSR_CC(%a6) # set INF
	rts

#########################################################################
# XDEF ****************************************************************	#
#	fneg(): emulates the fneg instruction				#
#	fsneg(): emulates the fsneg instruction				#
#	fdneg(): emulates the fdneg instruction				#
#									#
# XREF ****************************************************************	#
# 	norm() - normalize a denorm to provide EXOP			#
#	scale_to_zero_src() - scale sgl/dbl source exponent		#
#	ovf_res() - return default overflow result			#
#	unf_res() - return default underflow result			#
# 	res_qnan_1op() - return QNAN result				#
#	res_snan_1op() - return SNAN result				#
#									#
# INPUT ***************************************************************	#
#	a0 = pointer to extended precision source operand		#
#	d0 = rnd prec,mode						#
#									#
# OUTPUT **************************************************************	#
#	fp0 = result							#
#	fp1 = EXOP (if exception occurred)				#
#									#
# ALGORITHM ***********************************************************	#
#	Handle NANs, zeroes, and infinities as special cases. Separate	#
# norms/denorms into ext/sgl/dbl precisions. Extended precision can be	#
# emulated by simply setting sign bit. Sgl/dbl operands must be scaled	#
# and an actual fneg performed to see if overflow/underflow would have	#
# occurred. If so, return default underflow/overflow result. Else,	#
# scale the result exponent and return result. FPSR gets set based on	#
# the result value.							#
#									#
#########################################################################

	global		fsneg
fsneg:
	andi.b		&0x30,%d0		# clear rnd prec
	ori.b		&s_mode*0x10,%d0	# insert sgl precision
	bra.b		fneg

	global		fdneg
fdneg:
	andi.b		&0x30,%d0		# clear rnd prec
	ori.b		&d_mode*0x10,%d0	# insert dbl prec

	global		fneg
fneg:
	mov.l		%d0,L_SCR3(%a6)		# store rnd info
	mov.b		STAG(%a6),%d1
	bne.w		fneg_not_norm		# optimize on non-norm input
		
#
# NEGATE SIGN : norms and denorms ONLY!
#
fneg_norm:
	andi.b		&0xc0,%d0		# is precision extended?
	bne.w		fneg_not_ext		# no; go handle sgl or dbl

#
# precision selected is extended. so...we can not get an underflow
# or overflow because of rounding to the correct precision. so...
# skip the scaling and unscaling...
#
	mov.l		SRC_HI(%a0),FP_SCR0_HI(%a6)
	mov.l		SRC_LO(%a0),FP_SCR0_LO(%a6)
	mov.w		SRC_EX(%a0),%d0
	eori.w		&0x8000,%d0		# negate sign
	bpl.b		fneg_norm_load		# sign is positive
	mov.b		&neg_bmask,FPSR_CC(%a6)	# set 'N' ccode bit
fneg_norm_load:
	mov.w		%d0,FP_SCR0_EX(%a6)
	fmovm.x		FP_SCR0(%a6),&0x80	# return result in fp0
	rts

#
# for an extended precision DENORM, the UNFL exception bit is set
# the accrued bit is NOT set in this instance(no inexactness!)
#
fneg_denorm:
	andi.b		&0xc0,%d0		# is precision extended?
	bne.b		fneg_not_ext		# no; go handle sgl or dbl

	bset		&unfl_bit,FPSR_EXCEPT(%a6) # set unfl exc bit

	mov.l		SRC_HI(%a0),FP_SCR0_HI(%a6)
	mov.l		SRC_LO(%a0),FP_SCR0_LO(%a6)
	mov.w		SRC_EX(%a0),%d0
	eori.w		&0x8000,%d0		# negate sign
	bpl.b		fneg_denorm_done	# no
	mov.b		&neg_bmask,FPSR_CC(%a6)	# yes, set 'N' ccode bit
fneg_denorm_done:
	mov.w		%d0,FP_SCR0_EX(%a6)
	fmovm.x		FP_SCR0(%a6),&0x80	# return default result in fp0

	btst		&unfl_bit,FPCR_ENABLE(%a6) # is UNFL enabled?
	bne.b		fneg_ext_unfl_ena	# yes
	rts

#
# the input is an extended DENORM and underflow is enabled in the FPCR.
# normalize the mantissa and add the bias of 0x6000 to the resulting negative
# exponent and insert back into the operand.
#
fneg_ext_unfl_ena:
	lea		FP_SCR0(%a6),%a0	# pass: ptr to operand
	bsr.l		norm			# normalize result
	neg.w		%d0			# new exponent = -(shft val)
	addi.w		&0x6000,%d0		# add new bias to exponent
	mov.w		FP_SCR0_EX(%a6),%d1	# fetch old sign,exp
	andi.w		&0x8000,%d1	 	# keep old sign
	andi.w		&0x7fff,%d0		# clear sign position
	or.w		%d1,%d0			# concat old sign, new exponent
	mov.w		%d0,FP_SCR0_EX(%a6)	# insert new exponent
	fmovm.x		FP_SCR0(%a6),&0x40	# return EXOP in fp1
	rts

#
# operand is either single or double
#
fneg_not_ext:
	cmpi.b		%d0,&s_mode*0x10	# separate sgl/dbl prec
	bne.b		fneg_dbl

#
# operand is to be rounded to single precision
#
fneg_sgl:
	mov.w		SRC_EX(%a0),FP_SCR0_EX(%a6)
	mov.l		SRC_HI(%a0),FP_SCR0_HI(%a6)
	mov.l		SRC_LO(%a0),FP_SCR0_LO(%a6)
	bsr.l		scale_to_zero_src	# calculate scale factor

	cmpi.l		%d0,&0x3fff-0x3f80	# will move in underflow?
	bge.w		fneg_sd_unfl		# yes; go handle underflow
	cmpi.l		%d0,&0x3fff-0x407e	# will move in overflow?
	beq.w		fneg_sd_may_ovfl	# maybe; go check
	blt.w		fneg_sd_ovfl		# yes; go handle overflow

#
# operand will NOT overflow or underflow when moved in to the fp reg file
#
fneg_sd_normal:
	fmov.l		&0x0,%fpsr		# clear FPSR
	fmov.l		L_SCR3(%a6),%fpcr	# set FPCR

	fneg.x		FP_SCR0(%a6),%fp0	# perform negation

	fmov.l		%fpsr,%d1		# save FPSR
	fmov.l		&0x0,%fpcr		# clear FPCR

	or.l		%d1,USER_FPSR(%a6)	# save INEX2,N

fneg_sd_normal_exit:
	mov.l		%d2,-(%sp)		# save d2
	fmovm.x		&0x80,FP_SCR0(%a6)	# store out result
	mov.w		FP_SCR0_EX(%a6),%d1	# load sgn,exp
	mov.w		%d1,%d2			# make a copy
	andi.l		&0x7fff,%d1		# strip sign
	sub.l		%d0,%d1			# add scale factor
	andi.w		&0x8000,%d2		# keep old sign
	or.w		%d1,%d2			# concat old sign,new exp
	mov.w		%d2,FP_SCR0_EX(%a6)	# insert new exponent
	mov.l		(%sp)+,%d2		# restore d2
	fmovm.x		FP_SCR0(%a6),&0x80	# return result in fp0
	rts

#
# operand is to be rounded to double precision
#
fneg_dbl:
	mov.w		SRC_EX(%a0),FP_SCR0_EX(%a6)
	mov.l		SRC_HI(%a0),FP_SCR0_HI(%a6)
	mov.l		SRC_LO(%a0),FP_SCR0_LO(%a6)
	bsr.l		scale_to_zero_src	# calculate scale factor

	cmpi.l		%d0,&0x3fff-0x3c00	# will move in underflow?
	bge.b		fneg_sd_unfl		# yes; go handle underflow
	cmpi.l		%d0,&0x3fff-0x43fe	# will move in overflow?
	beq.w		fneg_sd_may_ovfl	# maybe; go check
	blt.w		fneg_sd_ovfl		# yes; go handle overflow
	bra.w		fneg_sd_normal		# no; ho handle normalized op

#
# operand WILL underflow when moved in to the fp register file
#
fneg_sd_unfl:
	bset		&unfl_bit,FPSR_EXCEPT(%a6) # set unfl exc bit

	eori.b		&0x80,FP_SCR0_EX(%a6)	# negate sign	
	bpl.b		fneg_sd_unfl_tst
	bset		&neg_bit,FPSR_CC(%a6)	# set 'N' ccode bit

# if underflow or inexact is enabled, go calculate EXOP first.
fneg_sd_unfl_tst:
	mov.b		FPCR_ENABLE(%a6),%d1
	andi.b		&0x0b,%d1		# is UNFL or INEX enabled?
	bne.b		fneg_sd_unfl_ena	# yes

fneg_sd_unfl_dis:
	lea		FP_SCR0(%a6),%a0	# pass: result addr
	mov.l		L_SCR3(%a6),%d1		# pass: rnd prec,mode
	bsr.l		unf_res			# calculate default result
	or.b		%d0,FPSR_CC(%a6)	# unf_res may have set 'Z'
	fmovm.x		FP_SCR0(%a6),&0x80	# return default result in fp0
	rts	

#
# operand will underflow AND underflow is enabled. 
# therefore, we must return the result rounded to extended precision.
#
fneg_sd_unfl_ena:
	mov.l		FP_SCR0_HI(%a6),FP_SCR1_HI(%a6)
	mov.l		FP_SCR0_LO(%a6),FP_SCR1_LO(%a6)
	mov.w		FP_SCR0_EX(%a6),%d1	# load current exponent

	mov.l		%d2,-(%sp)		# save d2
	mov.l		%d1,%d2			# make a copy
	andi.l		&0x7fff,%d1		# strip sign
	andi.w		&0x8000,%d2		# keep old sign
	sub.l		%d0,%d1			# subtract scale factor
	addi.l		&0x6000,%d1		# add new bias
	andi.w		&0x7fff,%d1
	or.w		%d2,%d1			# concat new sign,new exp
	mov.w		%d1,FP_SCR1_EX(%a6)	# insert new exp
	fmovm.x		FP_SCR1(%a6),&0x40	# return EXOP in fp1
	mov.l		(%sp)+,%d2		# restore d2
	bra.b		fneg_sd_unfl_dis

#
# operand WILL overflow.
#
fneg_sd_ovfl:
	fmov.l		&0x0,%fpsr		# clear FPSR
	fmov.l		L_SCR3(%a6),%fpcr	# set FPCR

	fneg.x		FP_SCR0(%a6),%fp0	# perform negation

	fmov.l		&0x0,%fpcr		# clear FPCR
	fmov.l		%fpsr,%d1		# save FPSR

	or.l		%d1,USER_FPSR(%a6)	# save INEX2,N

fneg_sd_ovfl_tst:
	or.l		&ovfl_inx_mask,USER_FPSR(%a6) # set ovfl/aovfl/ainex

	mov.b		FPCR_ENABLE(%a6),%d1
	andi.b		&0x13,%d1		# is OVFL or INEX enabled?
	bne.b		fneg_sd_ovfl_ena	# yes

#
# OVFL is not enabled; therefore, we must create the default result by
# calling ovf_res().
#
fneg_sd_ovfl_dis:
	btst		&neg_bit,FPSR_CC(%a6)	# is result negative?
	sne		%d1			# set sign param accordingly
	mov.l		L_SCR3(%a6),%d0		# pass: prec,mode
	bsr.l		ovf_res			# calculate default result
	or.b		%d0,FPSR_CC(%a6)	# set INF,N if applicable
	fmovm.x		(%a0),&0x80		# return default result in fp0
	rts

#
# OVFL is enabled.
# the INEX2 bit has already been updated by the round to the correct precision.
# now, round to extended(and don't alter the FPSR).
#
fneg_sd_ovfl_ena:
	mov.l		%d2,-(%sp)		# save d2
	mov.w		FP_SCR0_EX(%a6),%d1	# fetch {sgn,exp}
	mov.l		%d1,%d2			# make a copy
	andi.l		&0x7fff,%d1		# strip sign
	andi.w		&0x8000,%d2		# keep old sign
	sub.l		%d0,%d1			# add scale factor
	subi.l		&0x6000,%d1		# subtract bias
	andi.w		&0x7fff,%d1
	or.w		%d2,%d1			# concat sign,exp
	mov.w		%d1,FP_SCR0_EX(%a6)	# insert new exponent
	fmovm.x		FP_SCR0(%a6),&0x40	# return EXOP in fp1
	mov.l		(%sp)+,%d2		# restore d2
	bra.b		fneg_sd_ovfl_dis

#
# the move in MAY underflow. so...
#
fneg_sd_may_ovfl:
	fmov.l		&0x0,%fpsr		# clear FPSR
	fmov.l		L_SCR3(%a6),%fpcr	# set FPCR

	fneg.x		FP_SCR0(%a6),%fp0	# perform negation

	fmov.l		%fpsr,%d1		# save status
	fmov.l		&0x0,%fpcr		# clear FPCR

	or.l		%d1,USER_FPSR(%a6)	# save INEX2,N

	fabs.x		%fp0,%fp1		# make a copy of result
	fcmp.b		%fp1,&0x2		# is |result| >= 2.b?
	fbge.w		fneg_sd_ovfl_tst	# yes; overflow has occurred

# no, it didn't overflow; we have correct result
	bra.w		fneg_sd_normal_exit

##########################################################################

#
# input is not normalized; what is it?
#
fneg_not_norm:
	cmpi.b		%d1,&DENORM		# weed out DENORM
	beq.w		fneg_denorm
	cmpi.b		%d1,&SNAN		# weed out SNAN
	beq.l		res_snan_1op
	cmpi.b		%d1,&QNAN		# weed out QNAN
	beq.l		res_qnan_1op

#
# do the fneg; at this point, only possible ops are ZERO and INF.
# use fneg to determine ccodes.
# prec:mode should be zero at this point but it won't affect answer anyways.
#
	fneg.x		SRC_EX(%a0),%fp0	# do fneg
	fmov.l		%fpsr,%d0
	rol.l		&0x8,%d0		# put ccodes in lo byte
	mov.b		%d0,FPSR_CC(%a6)	# insert correct ccodes
	rts

#########################################################################
# XDEF ****************************************************************	#
# 	ftst(): emulates the ftest instruction				#
#									#
# XREF ****************************************************************	#
# 	res{s,q}nan_1op() - set NAN result for monadic instruction	#
#									#
# INPUT ***************************************************************	#
# 	a0 = pointer to extended precision source operand		#
#									#
# OUTPUT **************************************************************	#
#	none								#
#									#
# ALGORITHM ***********************************************************	#
# 	Check the source operand tag (STAG) and set the FPCR according	#
# to the operand type and sign.						#
#									#
#########################################################################

	global		ftst
ftst:
	mov.b		STAG(%a6),%d1
	bne.b		ftst_not_norm		# optimize on non-norm input
		
#
# Norm:
#
ftst_norm:
	tst.b		SRC_EX(%a0)		# is operand negative?
	bmi.b		ftst_norm_m		# yes
	rts
ftst_norm_m:
	mov.b		&neg_bmask,FPSR_CC(%a6)	# set 'N' ccode bit
	rts

#
# input is not normalized; what is it?
#
ftst_not_norm:
	cmpi.b		%d1,&ZERO		# weed out ZERO
	beq.b		ftst_zero
	cmpi.b		%d1,&INF		# weed out INF
	beq.b		ftst_inf
	cmpi.b		%d1,&SNAN		# weed out SNAN
	beq.l		res_snan_1op
	cmpi.b		%d1,&QNAN		# weed out QNAN
	beq.l		res_qnan_1op

#
# Denorm:
#
ftst_denorm:
	tst.b		SRC_EX(%a0)		# is operand negative?
	bmi.b		ftst_denorm_m		# yes
	rts
ftst_denorm_m:
	mov.b		&neg_bmask,FPSR_CC(%a6)	# set 'N' ccode bit
	rts

#
# Infinity:
#
ftst_inf:
	tst.b		SRC_EX(%a0)		# is operand negative?
	bmi.b		ftst_inf_m		# yes
ftst_inf_p:
	mov.b		&inf_bmask,FPSR_CC(%a6)	# set 'I' ccode bit
	rts
ftst_inf_m:
	mov.b		&inf_bmask+neg_bmask,FPSR_CC(%a6) # set 'I','N' ccode bits
	rts
	
#
# Zero:
#
ftst_zero:
	tst.b		SRC_EX(%a0)		# is operand negative?
	bmi.b		ftst_zero_m		# yes
ftst_zero_p:
	mov.b		&z_bmask,FPSR_CC(%a6)	# set 'N' ccode bit
	rts
ftst_zero_m:
	mov.b		&z_bmask+neg_bmask,FPSR_CC(%a6)	# set 'Z','N' ccode bits
	rts

#########################################################################
# XDEF ****************************************************************	#
#	fint(): emulates the fint instruction				#
#									#
# XREF ****************************************************************	#
#	res_{s,q}nan_1op() - set NAN result for monadic operation	#
#									#
# INPUT ***************************************************************	#
#	a0 = pointer to extended precision source operand		#
#	d0 = round precision/mode					#
#									#
# OUTPUT **************************************************************	#
#	fp0 = result							#
#									#
# ALGORITHM ***********************************************************	#
# 	Separate according to operand type. Unnorms don't pass through 	#
# here. For norms, load the rounding mode/prec, execute a "fint", then 	#
# store the resulting FPSR bits.					#
# 	For denorms, force the j-bit to a one and do the same as for	#
# norms. Denorms are so low that the answer will either be a zero or a 	#
# one.									#
# 	For zeroes/infs/NANs, return the same while setting the FPSR	#
# as appropriate.							#
#									#
#########################################################################

	global		fint
fint:
	mov.b		STAG(%a6),%d1
	bne.b		fint_not_norm		# optimize on non-norm input
		
#
# Norm:
#
fint_norm:
	andi.b		&0x30,%d0		# set prec = ext

	fmov.l		%d0,%fpcr		# set FPCR
	fmov.l		&0x0,%fpsr		# clear FPSR

	fint.x 		SRC(%a0),%fp0		# execute fint

	fmov.l		&0x0,%fpcr		# clear FPCR
	fmov.l		%fpsr,%d0		# save FPSR
	or.l		%d0,USER_FPSR(%a6)	# set exception bits

	rts

#
# input is not normalized; what is it?
#
fint_not_norm:
	cmpi.b		%d1,&ZERO		# weed out ZERO
	beq.b		fint_zero
	cmpi.b		%d1,&INF		# weed out INF
	beq.b		fint_inf
	cmpi.b		%d1,&DENORM		# weed out DENORM
	beq.b		fint_denorm
	cmpi.b		%d1,&SNAN		# weed out SNAN
	beq.l		res_snan_1op
	bra.l		res_qnan_1op		# weed out QNAN

#
# Denorm:
#
# for DENORMs, the result will be either (+/-)ZERO or (+/-)1.
# also, the INEX2 and AINEX exception bits will be set.
# so, we could either set these manually or force the DENORM
# to a very small NORM and ship it to the NORM routine.
# I do the latter.
#
fint_denorm:
	mov.w		SRC_EX(%a0),FP_SCR0_EX(%a6) # copy sign, zero exp
	mov.b		&0x80,FP_SCR0_HI(%a6)	# force DENORM ==> small NORM
	lea		FP_SCR0(%a6),%a0
	bra.b		fint_norm

#
# Zero:
#
fint_zero:
	tst.b		SRC_EX(%a0)		# is ZERO negative?
	bmi.b		fint_zero_m		# yes
fint_zero_p:
	fmov.s		&0x00000000,%fp0	# return +ZERO in fp0
	mov.b		&z_bmask,FPSR_CC(%a6)	# set 'Z' ccode bit
	rts
fint_zero_m:
	fmov.s		&0x80000000,%fp0	# return -ZERO in fp0
	mov.b		&z_bmask+neg_bmask,FPSR_CC(%a6) # set 'Z','N' ccode bits
	rts

#
# Infinity:
#
fint_inf:
	fmovm.x		SRC(%a0),&0x80		# return result in fp0
	tst.b		SRC_EX(%a0)		# is INF negative?
	bmi.b		fint_inf_m		# yes
fint_inf_p:
	mov.b		&inf_bmask,FPSR_CC(%a6)	# set 'I' ccode bit
	rts
fint_inf_m:
	mov.b		&inf_bmask+neg_bmask,FPSR_CC(%a6) # set 'N','I' ccode bits
	rts

#########################################################################
# XDEF ****************************************************************	#
#	fintrz(): emulates the fintrz instruction			#
#									#
# XREF ****************************************************************	#
#	res_{s,q}nan_1op() - set NAN result for monadic operation	#
#									#
# INPUT ***************************************************************	#
#	a0 = pointer to extended precision source operand		#
#	d0 = round precision/mode					#
#									#
# OUTPUT **************************************************************	#
# 	fp0 = result							#
#									#
# ALGORITHM ***********************************************************	#
#	Separate according to operand type. Unnorms don't pass through	#
# here. For norms, load the rounding mode/prec, execute a "fintrz", 	#
# then store the resulting FPSR bits.					#
# 	For denorms, force the j-bit to a one and do the same as for	#
# norms. Denorms are so low that the answer will either be a zero or a	#
# one.									#
# 	For zeroes/infs/NANs, return the same while setting the FPSR	#
# as appropriate.							#
#									#
#########################################################################

	global		fintrz
fintrz:
	mov.b		STAG(%a6),%d1
	bne.b		fintrz_not_norm		# optimize on non-norm input
		
#
# Norm:
#
fintrz_norm:
	fmov.l		&0x0,%fpsr		# clear FPSR

	fintrz.x	SRC(%a0),%fp0		# execute fintrz

	fmov.l		%fpsr,%d0		# save FPSR
	or.l		%d0,USER_FPSR(%a6)	# set exception bits

	rts

#
# input is not normalized; what is it?
#
fintrz_not_norm:
	cmpi.b		%d1,&ZERO		# weed out ZERO
	beq.b		fintrz_zero
	cmpi.b		%d1,&INF		# weed out INF
	beq.b		fintrz_inf
	cmpi.b		%d1,&DENORM		# weed out DENORM
	beq.b		fintrz_denorm
	cmpi.b		%d1,&SNAN		# weed out SNAN
	beq.l		res_snan_1op
	bra.l		res_qnan_1op		# weed out QNAN

#
# Denorm:
#
# for DENORMs, the result will be (+/-)ZERO.
# also, the INEX2 and AINEX exception bits will be set.
# so, we could either set these manually or force the DENORM
# to a very small NORM and ship it to the NORM routine.
# I do the latter.
#
fintrz_denorm:
	mov.w		SRC_EX(%a0),FP_SCR0_EX(%a6) # copy sign, zero exp
	mov.b		&0x80,FP_SCR0_HI(%a6)	# force DENORM ==> small NORM
	lea		FP_SCR0(%a6),%a0
	bra.b		fintrz_norm

#
# Zero:
#
fintrz_zero:
	tst.b		SRC_EX(%a0)		# is ZERO negative?
	bmi.b		fintrz_zero_m		# yes
fintrz_zero_p:
	fmov.s		&0x00000000,%fp0	# return +ZERO in fp0
	mov.b		&z_bmask,FPSR_CC(%a6)	# set 'Z' ccode bit
	rts
fintrz_zero_m:
	fmov.s		&0x80000000,%fp0	# return -ZERO in fp0
	mov.b		&z_bmask+neg_bmask,FPSR_CC(%a6) # set 'Z','N' ccode bits
	rts

#
# Infinity:
#
fintrz_inf:
	fmovm.x		SRC(%a0),&0x80		# return result in fp0
	tst.b		SRC_EX(%a0)		# is INF negative?
	bmi.b		fintrz_inf_m		# yes
fintrz_inf_p:
	mov.b		&inf_bmask,FPSR_CC(%a6)	# set 'I' ccode bit
	rts
fintrz_inf_m:
	mov.b		&inf_bmask+neg_bmask,FPSR_CC(%a6) # set 'N','I' ccode bits
	rts

#########################################################################
# XDEF ****************************************************************	#
#	fabs():  emulates the fabs instruction				#
#	fsabs(): emulates the fsabs instruction				#
#	fdabs(): emulates the fdabs instruction				#
#									#
# XREF **************************************************************** #
#	norm() - normalize denorm mantissa to provide EXOP		#
#	scale_to_zero_src() - make exponent. = 0; get scale factor	#
#	unf_res() - calculate underflow result				#
#	ovf_res() - calculate overflow result				#
#	res_{s,q}nan_1op() - set NAN result for monadic operation	#
#									#
# INPUT *************************************************************** #
#	a0 = pointer to extended precision source operand		#
#	d0 = rnd precision/mode						#
#									#
# OUTPUT ************************************************************** #
#	fp0 = result							#
#	fp1 = EXOP (if exception occurred)				#
#									#
# ALGORITHM ***********************************************************	#
#	Handle NANs, infinities, and zeroes as special cases. Divide	#
# norms into extended, single, and double precision. 			#
# 	Simply clear sign for extended precision norm. Ext prec denorm	#
# gets an EXOP created for it since it's an underflow.			#
#	Double and single precision can overflow and underflow. First,	#
# scale the operand such that the exponent is zero. Perform an "fabs"	#
# using the correct rnd mode/prec. Check to see if the original 	#
# exponent would take an exception. If so, use unf_res() or ovf_res()	#
# to calculate the default result. Also, create the EXOP for the	#
# exceptional case. If no exception should occur, insert the correct 	#
# result exponent and return.						#
# 	Unnorms don't pass through here.				#
#									#
#########################################################################

	global		fsabs
fsabs:
	andi.b		&0x30,%d0		# clear rnd prec
	ori.b		&s_mode*0x10,%d0	# insert sgl precision
	bra.b		fabs

	global		fdabs
fdabs:
	andi.b		&0x30,%d0		# clear rnd prec
	ori.b		&d_mode*0x10,%d0	# insert dbl precision

	global		fabs
fabs:
	mov.l		%d0,L_SCR3(%a6)		# store rnd info
	mov.b		STAG(%a6),%d1
	bne.w		fabs_not_norm		# optimize on non-norm input
		
#
# ABSOLUTE VALUE: norms and denorms ONLY!
#
fabs_norm:
	andi.b		&0xc0,%d0		# is precision extended?
	bne.b		fabs_not_ext		# no; go handle sgl or dbl

#
# precision selected is extended. so...we can not get an underflow
# or overflow because of rounding to the correct precision. so...
# skip the scaling and unscaling...
#
	mov.l		SRC_HI(%a0),FP_SCR0_HI(%a6)
	mov.l		SRC_LO(%a0),FP_SCR0_LO(%a6)
	mov.w		SRC_EX(%a0),%d1
	bclr		&15,%d1			# force absolute value
	mov.w		%d1,FP_SCR0_EX(%a6)	# insert exponent
	fmovm.x		FP_SCR0(%a6),&0x80	# return result in fp0
	rts

#
# for an extended precision DENORM, the UNFL exception bit is set
# the accrued bit is NOT set in this instance(no inexactness!)
#
fabs_denorm:
	andi.b		&0xc0,%d0		# is precision extended?
	bne.b		fabs_not_ext		# no

	bset		&unfl_bit,FPSR_EXCEPT(%a6) # set unfl exc bit

	mov.l		SRC_HI(%a0),FP_SCR0_HI(%a6)
	mov.l		SRC_LO(%a0),FP_SCR0_LO(%a6)
	mov.w		SRC_EX(%a0),%d0
	bclr		&15,%d0			# clear sign
	mov.w		%d0,FP_SCR0_EX(%a6)	# insert exponent

	fmovm.x		FP_SCR0(%a6),&0x80	# return default result in fp0

	btst		&unfl_bit,FPCR_ENABLE(%a6) # is UNFL enabled?
	bne.b		fabs_ext_unfl_ena
	rts

#
# the input is an extended DENORM and underflow is enabled in the FPCR.
# normalize the mantissa and add the bias of 0x6000 to the resulting negative
# exponent and insert back into the operand.
#
fabs_ext_unfl_ena:
	lea		FP_SCR0(%a6),%a0	# pass: ptr to operand
	bsr.l		norm			# normalize result
	neg.w		%d0			# new exponent = -(shft val)
	addi.w		&0x6000,%d0		# add new bias to exponent
	mov.w		FP_SCR0_EX(%a6),%d1	# fetch old sign,exp
	andi.w		&0x8000,%d1		# keep old sign
	andi.w		&0x7fff,%d0		# clear sign position
	or.w		%d1,%d0			# concat old sign, new exponent
	mov.w		%d0,FP_SCR0_EX(%a6)	# insert new exponent
	fmovm.x		FP_SCR0(%a6),&0x40	# return EXOP in fp1
	rts

#
# operand is either single or double
#
fabs_not_ext:
	cmpi.b		%d0,&s_mode*0x10	# separate sgl/dbl prec
	bne.b		fabs_dbl

#
# operand is to be rounded to single precision
#
fabs_sgl:
	mov.w		SRC_EX(%a0),FP_SCR0_EX(%a6)
	mov.l		SRC_HI(%a0),FP_SCR0_HI(%a6)
	mov.l		SRC_LO(%a0),FP_SCR0_LO(%a6)
	bsr.l		scale_to_zero_src	# calculate scale factor

	cmpi.l		%d0,&0x3fff-0x3f80	# will move in underflow?
	bge.w		fabs_sd_unfl		# yes; go handle underflow
	cmpi.l		%d0,&0x3fff-0x407e	# will move in overflow?
	beq.w		fabs_sd_may_ovfl	# maybe; go check
	blt.w		fabs_sd_ovfl		# yes; go handle overflow

#
# operand will NOT overflow or underflow when moved in to the fp reg file
#
fabs_sd_normal:
	fmov.l		&0x0,%fpsr		# clear FPSR
	fmov.l		L_SCR3(%a6),%fpcr	# set FPCR

	fabs.x		FP_SCR0(%a6),%fp0	# perform absolute

	fmov.l		%fpsr,%d1		# save FPSR
	fmov.l		&0x0,%fpcr		# clear FPCR

	or.l		%d1,USER_FPSR(%a6)	# save INEX2,N

fabs_sd_normal_exit:
	mov.l		%d2,-(%sp)		# save d2
	fmovm.x		&0x80,FP_SCR0(%a6)	# store out result
	mov.w		FP_SCR0_EX(%a6),%d1	# load sgn,exp
	mov.l		%d1,%d2			# make a copy
	andi.l		&0x7fff,%d1		# strip sign
	sub.l		%d0,%d1			# add scale factor
	andi.w		&0x8000,%d2		# keep old sign
	or.w		%d1,%d2			# concat old sign,new exp
	mov.w		%d2,FP_SCR0_EX(%a6)	# insert new exponent
	mov.l		(%sp)+,%d2		# restore d2
	fmovm.x		FP_SCR0(%a6),&0x80	# return result in fp0
	rts

#
# operand is to be rounded to double precision
#
fabs_dbl:
	mov.w		SRC_EX(%a0),FP_SCR0_EX(%a6)
	mov.l		SRC_HI(%a0),FP_SCR0_HI(%a6)
	mov.l		SRC_LO(%a0),FP_SCR0_LO(%a6)
	bsr.l		scale_to_zero_src	# calculate scale factor

	cmpi.l		%d0,&0x3fff-0x3c00	# will move in underflow?
	bge.b		fabs_sd_unfl		# yes; go handle underflow
	cmpi.l		%d0,&0x3fff-0x43fe	# will move in overflow?
	beq.w		fabs_sd_may_ovfl	# maybe; go check
	blt.w		fabs_sd_ovfl		# yes; go handle overflow
	bra.w		fabs_sd_normal		# no; ho handle normalized op

#
# operand WILL underflow when moved in to the fp register file
#
fabs_sd_unfl:
	bset		&unfl_bit,FPSR_EXCEPT(%a6) # set unfl exc bit

	bclr		&0x7,FP_SCR0_EX(%a6)	# force absolute value

# if underflow or inexact is enabled, go calculate EXOP first.
	mov.b		FPCR_ENABLE(%a6),%d1
	andi.b		&0x0b,%d1		# is UNFL or INEX enabled?
	bne.b		fabs_sd_unfl_ena	# yes

fabs_sd_unfl_dis:
	lea		FP_SCR0(%a6),%a0	# pass: result addr
	mov.l		L_SCR3(%a6),%d1		# pass: rnd prec,mode
	bsr.l		unf_res			# calculate default result
	or.b		%d0,FPSR_CC(%a6)	# set possible 'Z' ccode
	fmovm.x		FP_SCR0(%a6),&0x80	# return default result in fp0
	rts	

#
# operand will underflow AND underflow is enabled. 
# therefore, we must return the result rounded to extended precision.
#
fabs_sd_unfl_ena:
	mov.l		FP_SCR0_HI(%a6),FP_SCR1_HI(%a6)
	mov.l		FP_SCR0_LO(%a6),FP_SCR1_LO(%a6)
	mov.w		FP_SCR0_EX(%a6),%d1	# load current exponent

	mov.l		%d2,-(%sp)		# save d2
	mov.l		%d1,%d2			# make a copy
	andi.l		&0x7fff,%d1		# strip sign
	andi.w		&0x8000,%d2		# keep old sign
	sub.l		%d0,%d1			# subtract scale factor
	addi.l		&0x6000,%d1		# add new bias
	andi.w		&0x7fff,%d1
	or.w		%d2,%d1			# concat new sign,new exp
	mov.w		%d1,FP_SCR1_EX(%a6)	# insert new exp
	fmovm.x		FP_SCR1(%a6),&0x40	# return EXOP in fp1
	mov.l		(%sp)+,%d2		# restore d2
	bra.b		fabs_sd_unfl_dis

#
# operand WILL overflow.
#
fabs_sd_ovfl:
	fmov.l		&0x0,%fpsr		# clear FPSR
	fmov.l		L_SCR3(%a6),%fpcr	# set FPCR

	fabs.x		FP_SCR0(%a6),%fp0	# perform absolute

	fmov.l		&0x0,%fpcr		# clear FPCR
	fmov.l		%fpsr,%d1		# save FPSR

	or.l		%d1,USER_FPSR(%a6)	# save INEX2,N

fabs_sd_ovfl_tst:
	or.l		&ovfl_inx_mask,USER_FPSR(%a6) # set ovfl/aovfl/ainex

	mov.b		FPCR_ENABLE(%a6),%d1
	andi.b		&0x13,%d1		# is OVFL or INEX enabled?
	bne.b		fabs_sd_ovfl_ena	# yes

#
# OVFL is not enabled; therefore, we must create the default result by
# calling ovf_res().
#
fabs_sd_ovfl_dis:
	btst		&neg_bit,FPSR_CC(%a6)	# is result negative?
	sne		%d1			# set sign param accordingly
	mov.l		L_SCR3(%a6),%d0		# pass: prec,mode
	bsr.l		ovf_res			# calculate default result
	or.b		%d0,FPSR_CC(%a6)	# set INF,N if applicable
	fmovm.x		(%a0),&0x80		# return default result in fp0
	rts

#
# OVFL is enabled.
# the INEX2 bit has already been updated by the round to the correct precision.
# now, round to extended(and don't alter the FPSR).
#
fabs_sd_ovfl_ena:
	mov.l		%d2,-(%sp)		# save d2
	mov.w		FP_SCR0_EX(%a6),%d1	# fetch {sgn,exp}
	mov.l		%d1,%d2			# make a copy
	andi.l		&0x7fff,%d1		# strip sign
	andi.w		&0x8000,%d2		# keep old sign
	sub.l		%d0,%d1			# add scale factor
	subi.l		&0x6000,%d1		# subtract bias
	andi.w		&0x7fff,%d1
	or.w		%d2,%d1			# concat sign,exp
	mov.w		%d1,FP_SCR0_EX(%a6)	# insert new exponent
	fmovm.x		FP_SCR0(%a6),&0x40	# return EXOP in fp1
	mov.l		(%sp)+,%d2		# restore d2
	bra.b		fabs_sd_ovfl_dis

#
# the move in MAY underflow. so...
#
fabs_sd_may_ovfl:
	fmov.l		&0x0,%fpsr		# clear FPSR
	fmov.l		L_SCR3(%a6),%fpcr	# set FPCR

	fabs.x		FP_SCR0(%a6),%fp0	# perform absolute

	fmov.l		%fpsr,%d1		# save status
	fmov.l		&0x0,%fpcr		# clear FPCR

	or.l		%d1,USER_FPSR(%a6)	# save INEX2,N

	fabs.x		%fp0,%fp1		# make a copy of result
	fcmp.b		%fp1,&0x2		# is |result| >= 2.b?
	fbge.w		fabs_sd_ovfl_tst	# yes; overflow has occurred

# no, it didn't overflow; we have correct result
	bra.w		fabs_sd_normal_exit

##########################################################################

#
# input is not normalized; what is it?
#
fabs_not_norm:
	cmpi.b		%d1,&DENORM		# weed out DENORM
	beq.w		fabs_denorm
	cmpi.b		%d1,&SNAN		# weed out SNAN
	beq.l		res_snan_1op
	cmpi.b		%d1,&QNAN		# weed out QNAN
	beq.l		res_qnan_1op

	fabs.x		SRC(%a0),%fp0		# force absolute value

	cmpi.b		%d1,&INF		# weed out INF
	beq.b		fabs_inf
fabs_zero:
	mov.b		&z_bmask,FPSR_CC(%a6)	# set 'Z' ccode bit
	rts
fabs_inf:
	mov.b		&inf_bmask,FPSR_CC(%a6)	# set 'I' ccode bit
	rts

#########################################################################
# XDEF ****************************************************************	#
# 	fcmp(): fp compare op routine					#
#									#
# XREF ****************************************************************	#
# 	res_qnan() - return QNAN result					#
#	res_snan() - return SNAN result					#
#									#
# INPUT ***************************************************************	#
#	a0 = pointer to extended precision source operand		#
#	a1 = pointer to extended precision destination operand		#
#	d0 = round prec/mode						#
#									#
# OUTPUT ************************************************************** #
#	None								#
#									#
# ALGORITHM ***********************************************************	#
# 	Handle NANs and denorms as special cases. For everything else,	#
# just use the actual fcmp instruction to produce the correct condition	#
# codes.								#
#									#
#########################################################################

	global		fcmp
fcmp:
	clr.w		%d1
	mov.b		DTAG(%a6),%d1
	lsl.b		&0x3,%d1
	or.b		STAG(%a6),%d1
	bne.b		fcmp_not_norm		# optimize on non-norm input
		
#
# COMPARE FP OPs : NORMs, ZEROs, INFs, and "corrected" DENORMs
#
fcmp_norm:
	fmovm.x		DST(%a1),&0x80		# load dst op

	fcmp.x 		%fp0,SRC(%a0)		# do compare

	fmov.l		%fpsr,%d0		# save FPSR
	rol.l		&0x8,%d0		# extract ccode bits
	mov.b		%d0,FPSR_CC(%a6)	# set ccode bits(no exc bits are set)

	rts

#
# fcmp: inputs are not both normalized; what are they?
#
fcmp_not_norm:
	mov.w		(tbl_fcmp_op.b,%pc,%d1.w*2),%d1
	jmp		(tbl_fcmp_op.b,%pc,%d1.w*1)

	swbeg		&48
tbl_fcmp_op:
	short		fcmp_norm	- tbl_fcmp_op # NORM - NORM
	short		fcmp_norm	- tbl_fcmp_op # NORM - ZERO
	short		fcmp_norm	- tbl_fcmp_op # NORM - INF
	short		fcmp_res_qnan	- tbl_fcmp_op # NORM - QNAN
	short		fcmp_nrm_dnrm 	- tbl_fcmp_op # NORM - DENORM
	short		fcmp_res_snan	- tbl_fcmp_op # NORM - SNAN
	short		tbl_fcmp_op	- tbl_fcmp_op #
	short		tbl_fcmp_op	- tbl_fcmp_op #

	short		fcmp_norm	- tbl_fcmp_op # ZERO - NORM
	short		fcmp_norm	- tbl_fcmp_op # ZERO - ZERO
	short		fcmp_norm	- tbl_fcmp_op # ZERO - INF
	short		fcmp_res_qnan	- tbl_fcmp_op # ZERO - QNAN
	short		fcmp_dnrm_s	- tbl_fcmp_op # ZERO - DENORM
	short		fcmp_res_snan	- tbl_fcmp_op # ZERO - SNAN
	short		tbl_fcmp_op	- tbl_fcmp_op #
	short		tbl_fcmp_op	- tbl_fcmp_op #

	short		fcmp_norm	- tbl_fcmp_op # INF - NORM
	short		fcmp_norm	- tbl_fcmp_op # INF - ZERO
	short		fcmp_norm	- tbl_fcmp_op # INF - INF
	short		fcmp_res_qnan	- tbl_fcmp_op # INF - QNAN
	short		fcmp_dnrm_s	- tbl_fcmp_op # INF - DENORM
	short		fcmp_res_snan	- tbl_fcmp_op # INF - SNAN
	short		tbl_fcmp_op	- tbl_fcmp_op #
	short		tbl_fcmp_op	- tbl_fcmp_op #

	short		fcmp_res_qnan	- tbl_fcmp_op # QNAN - NORM
	short		fcmp_res_qnan	- tbl_fcmp_op # QNAN - ZERO
	short		fcmp_res_qnan	- tbl_fcmp_op # QNAN - INF
	short		fcmp_res_qnan	- tbl_fcmp_op # QNAN - QNAN
	short		fcmp_res_qnan	- tbl_fcmp_op # QNAN - DENORM
	short		fcmp_res_snan	- tbl_fcmp_op # QNAN - SNAN
	short		tbl_fcmp_op	- tbl_fcmp_op #
	short		tbl_fcmp_op	- tbl_fcmp_op #

	short		fcmp_dnrm_nrm	- tbl_fcmp_op # DENORM - NORM
	short		fcmp_dnrm_d	- tbl_fcmp_op # DENORM - ZERO
	short		fcmp_dnrm_d	- tbl_fcmp_op # DENORM - INF
	short		fcmp_res_qnan	- tbl_fcmp_op # DENORM - QNAN
	short		fcmp_dnrm_sd	- tbl_fcmp_op # DENORM - DENORM
	short		fcmp_res_snan	- tbl_fcmp_op # DENORM - SNAN
	short		tbl_fcmp_op	- tbl_fcmp_op #
	short		tbl_fcmp_op	- tbl_fcmp_op #

	short		fcmp_res_snan	- tbl_fcmp_op # SNAN - NORM
	short		fcmp_res_snan	- tbl_fcmp_op # SNAN - ZERO
	short		fcmp_res_snan	- tbl_fcmp_op # SNAN - INF
	short		fcmp_res_snan	- tbl_fcmp_op # SNAN - QNAN
	short		fcmp_res_snan	- tbl_fcmp_op # SNAN - DENORM
	short		fcmp_res_snan	- tbl_fcmp_op # SNAN - SNAN
	short		tbl_fcmp_op	- tbl_fcmp_op #
	short		tbl_fcmp_op	- tbl_fcmp_op #

# unlike all other functions for QNAN and SNAN, fcmp does NOT set the
# 'N' bit for a negative QNAN or SNAN input so we must squelch it here.
fcmp_res_qnan:
	bsr.l		res_qnan
	andi.b		&0xf7,FPSR_CC(%a6)
	rts
fcmp_res_snan:
	bsr.l		res_snan
	andi.b		&0xf7,FPSR_CC(%a6)
	rts

#
# DENORMs are a little more difficult. 
# If you have a 2 DENORMs, then you can just force the j-bit to a one 
# and use the fcmp_norm routine.
# If you have a DENORM and an INF or ZERO, just force the DENORM's j-bit to a one
# and use the fcmp_norm routine.
# If you have a DENORM and a NORM with opposite signs, then use fcmp_norm, also.
# But with a DENORM and a NORM of the same sign, the neg bit is set if the
# (1) signs are (+) and the DENORM is the dst or
# (2) signs are (-) and the DENORM is the src
#

fcmp_dnrm_s:
	mov.w		SRC_EX(%a0),FP_SCR0_EX(%a6)
	mov.l		SRC_HI(%a0),%d0
	bset		&31,%d0			# DENORM src; make into small norm
	mov.l		%d0,FP_SCR0_HI(%a6)
	mov.l		SRC_LO(%a0),FP_SCR0_LO(%a6)
	lea		FP_SCR0(%a6),%a0
	bra.w		fcmp_norm

fcmp_dnrm_d:
	mov.l		DST_EX(%a1),FP_SCR0_EX(%a6)
	mov.l		DST_HI(%a1),%d0
	bset		&31,%d0			# DENORM src; make into small norm
	mov.l		%d0,FP_SCR0_HI(%a6)
	mov.l		DST_LO(%a1),FP_SCR0_LO(%a6)
	lea		FP_SCR0(%a6),%a1
	bra.w		fcmp_norm

fcmp_dnrm_sd:
	mov.w		DST_EX(%a1),FP_SCR1_EX(%a6)
	mov.w		SRC_EX(%a0),FP_SCR0_EX(%a6)
	mov.l		DST_HI(%a1),%d0
	bset		&31,%d0			# DENORM dst; make into small norm
	mov.l		%d0,FP_SCR1_HI(%a6)
	mov.l		SRC_HI(%a0),%d0
	bset		&31,%d0			# DENORM dst; make into small norm
	mov.l		%d0,FP_SCR0_HI(%a6)
	mov.l		DST_LO(%a1),FP_SCR1_LO(%a6)
	mov.l		SRC_LO(%a0),FP_SCR0_LO(%a6)
	lea		FP_SCR1(%a6),%a1
	lea		FP_SCR0(%a6),%a0
	bra.w		fcmp_norm	

fcmp_nrm_dnrm:
	mov.b		SRC_EX(%a0),%d0		# determine if like signs
	mov.b		DST_EX(%a1),%d1
	eor.b		%d0,%d1
	bmi.w		fcmp_dnrm_s

# signs are the same, so must determine the answer ourselves.
	tst.b		%d0			# is src op negative?
	bmi.b		fcmp_nrm_dnrm_m		# yes
	rts
fcmp_nrm_dnrm_m:
	mov.b		&neg_bmask,FPSR_CC(%a6)	# set 'Z' ccode bit
	rts

fcmp_dnrm_nrm:
	mov.b		SRC_EX(%a0),%d0		# determine if like signs
	mov.b		DST_EX(%a1),%d1
	eor.b		%d0,%d1
	bmi.w		fcmp_dnrm_d

# signs are the same, so must determine the answer ourselves.
	tst.b		%d0			# is src op negative?
	bpl.b		fcmp_dnrm_nrm_m		# no
	rts
fcmp_dnrm_nrm_m:
	mov.b		&neg_bmask,FPSR_CC(%a6)	# set 'Z' ccode bit
	rts

#########################################################################
# XDEF ****************************************************************	#
# 	fsglmul(): emulates the fsglmul instruction			#
#									#
# XREF ****************************************************************	#
#	scale_to_zero_src() - scale src exponent to zero		#
#	scale_to_zero_dst() - scale dst exponent to zero		#
#	unf_res4() - return default underflow result for sglop		#
#	ovf_res() - return default overflow result			#
# 	res_qnan() - return QNAN result					#
# 	res_snan() - return SNAN result					#
#									#
# INPUT ***************************************************************	#
#	a0 = pointer to extended precision source operand		#
#	a1 = pointer to extended precision destination operand		#
#	d0  rnd prec,mode						#
#									#
# OUTPUT **************************************************************	#
#	fp0 = result							#
#	fp1 = EXOP (if exception occurred)				#
#									#
# ALGORITHM ***********************************************************	#
#	Handle NANs, infinities, and zeroes as special cases. Divide	#
# norms/denorms into ext/sgl/dbl precision.				#
#	For norms/denorms, scale the exponents such that a multiply	#
# instruction won't cause an exception. Use the regular fsglmul to	#
# compute a result. Check if the regular operands would have taken	#
# an exception. If so, return the default overflow/underflow result	#
# and return the EXOP if exceptions are enabled. Else, scale the 	#
# result operand to the proper exponent.				#
#									#
#########################################################################

	global		fsglmul
fsglmul:
	mov.l		%d0,L_SCR3(%a6)		# store rnd info

	clr.w		%d1
	mov.b		DTAG(%a6),%d1
	lsl.b		&0x3,%d1
	or.b		STAG(%a6),%d1

	bne.w		fsglmul_not_norm	# optimize on non-norm input

fsglmul_norm:
	mov.w		DST_EX(%a1),FP_SCR1_EX(%a6)
	mov.l		DST_HI(%a1),FP_SCR1_HI(%a6)
	mov.l		DST_LO(%a1),FP_SCR1_LO(%a6)

	mov.w		SRC_EX(%a0),FP_SCR0_EX(%a6)
	mov.l		SRC_HI(%a0),FP_SCR0_HI(%a6)
	mov.l		SRC_LO(%a0),FP_SCR0_LO(%a6)

	bsr.l		scale_to_zero_src	# scale exponent
	mov.l		%d0,-(%sp)		# save scale factor 1

	bsr.l		scale_to_zero_dst	# scale dst exponent

	add.l		(%sp)+,%d0		# SCALE_FACTOR = scale1 + scale2

	cmpi.l		%d0,&0x3fff-0x7ffe 	# would result ovfl?
	beq.w		fsglmul_may_ovfl	# result may rnd to overflow
	blt.w		fsglmul_ovfl		# result will overflow

	cmpi.l		%d0,&0x3fff+0x0001 	# would result unfl?
	beq.w		fsglmul_may_unfl	# result may rnd to no unfl
	bgt.w		fsglmul_unfl		# result will underflow

fsglmul_normal:
	fmovm.x		FP_SCR1(%a6),&0x80	# load dst op

	fmov.l		L_SCR3(%a6),%fpcr	# set FPCR
	fmov.l		&0x0,%fpsr		# clear FPSR

	fsglmul.x	FP_SCR0(%a6),%fp0	# execute sgl multiply

	fmov.l		%fpsr,%d1		# save status
	fmov.l		&0x0,%fpcr		# clear FPCR

	or.l		%d1,USER_FPSR(%a6)	# save INEX2,N

fsglmul_normal_exit:
	fmovm.x		&0x80,FP_SCR0(%a6)	# store out result
	mov.l		%d2,-(%sp)		# save d2
	mov.w		FP_SCR0_EX(%a6),%d1	# load {sgn,exp}
	mov.l		%d1,%d2			# make a copy
	andi.l		&0x7fff,%d1		# strip sign
	andi.w		&0x8000,%d2		# keep old sign
	sub.l		%d0,%d1			# add scale factor
	or.w		%d2,%d1			# concat old sign,new exp
	mov.w		%d1,FP_SCR0_EX(%a6)	# insert new exponent
	mov.l		(%sp)+,%d2		# restore d2
	fmovm.x		FP_SCR0(%a6),&0x80	# return result in fp0
	rts

fsglmul_ovfl:
	fmovm.x		FP_SCR1(%a6),&0x80	# load dst op

	fmov.l		L_SCR3(%a6),%fpcr	# set FPCR
	fmov.l		&0x0,%fpsr		# clear FPSR

	fsglmul.x	FP_SCR0(%a6),%fp0	# execute sgl multiply

	fmov.l		%fpsr,%d1		# save status
	fmov.l		&0x0,%fpcr		# clear FPCR

	or.l		%d1,USER_FPSR(%a6)	# save INEX2,N

fsglmul_ovfl_tst:

# save setting this until now because this is where fsglmul_may_ovfl may jump in
	or.l		&ovfl_inx_mask, USER_FPSR(%a6) # set ovfl/aovfl/ainex

	mov.b		FPCR_ENABLE(%a6),%d1
	andi.b		&0x13,%d1		# is OVFL or INEX enabled?
	bne.b		fsglmul_ovfl_ena	# yes

fsglmul_ovfl_dis:
	btst		&neg_bit,FPSR_CC(%a6)	# is result negative?
	sne		%d1			# set sign param accordingly
	mov.l		L_SCR3(%a6),%d0		# pass prec:rnd
	andi.b		&0x30,%d0		# force prec = ext
	bsr.l		ovf_res			# calculate default result
	or.b		%d0,FPSR_CC(%a6)	# set INF,N if applicable
	fmovm.x		(%a0),&0x80		# return default result in fp0
	rts

fsglmul_ovfl_ena:
	fmovm.x		&0x80,FP_SCR0(%a6)	# move result to stack

	mov.l		%d2,-(%sp)		# save d2
	mov.w		FP_SCR0_EX(%a6),%d1	# fetch {sgn,exp}
	mov.l		%d1,%d2			# make a copy
	andi.l		&0x7fff,%d1		# strip sign
	sub.l		%d0,%d1			# add scale factor
	subi.l		&0x6000,%d1		# subtract bias
	andi.w		&0x7fff,%d1
	andi.w		&0x8000,%d2		# keep old sign
	or.w		%d2,%d1			# concat old sign,new exp
	mov.w		%d1,FP_SCR0_EX(%a6)	# insert new exponent
	mov.l		(%sp)+,%d2		# restore d2
	fmovm.x		FP_SCR0(%a6),&0x40	# return EXOP in fp1
	bra.b		fsglmul_ovfl_dis

fsglmul_may_ovfl:
	fmovm.x		FP_SCR1(%a6),&0x80	# load dst op

	fmov.l		L_SCR3(%a6),%fpcr	# set FPCR
	fmov.l		&0x0,%fpsr		# clear FPSR

	fsglmul.x	FP_SCR0(%a6),%fp0	# execute sgl multiply
	
	fmov.l		%fpsr,%d1		# save status
	fmov.l		&0x0,%fpcr		# clear FPCR

	or.l		%d1,USER_FPSR(%a6)	# save INEX2,N

	fabs.x		%fp0,%fp1		# make a copy of result
	fcmp.b		%fp1,&0x2		# is |result| >= 2.b?
	fbge.w		fsglmul_ovfl_tst	# yes; overflow has occurred
	
# no, it didn't overflow; we have correct result
	bra.w		fsglmul_normal_exit

fsglmul_unfl:
	bset		&unfl_bit,FPSR_EXCEPT(%a6) # set unfl exc bit

	fmovm.x		FP_SCR1(%a6),&0x80	# load dst op

	fmov.l		&rz_mode*0x10,%fpcr	# set FPCR
	fmov.l		&0x0,%fpsr		# clear FPSR

	fsglmul.x	FP_SCR0(%a6),%fp0	# execute sgl multiply

	fmov.l		%fpsr,%d1		# save status
	fmov.l		&0x0,%fpcr		# clear FPCR

	or.l		%d1,USER_FPSR(%a6)	# save INEX2,N

	mov.b		FPCR_ENABLE(%a6),%d1
	andi.b		&0x0b,%d1		# is UNFL or INEX enabled?
	bne.b		fsglmul_unfl_ena	# yes

fsglmul_unfl_dis:
	fmovm.x		&0x80,FP_SCR0(%a6)	# store out result

	lea		FP_SCR0(%a6),%a0	# pass: result addr
	mov.l		L_SCR3(%a6),%d1		# pass: rnd prec,mode
	bsr.l		unf_res4		# calculate default result
	or.b		%d0,FPSR_CC(%a6)	# 'Z' bit may have been set
	fmovm.x		FP_SCR0(%a6),&0x80	# return default result in fp0
	rts

#
# UNFL is enabled. 
#
fsglmul_unfl_ena:
	fmovm.x		FP_SCR1(%a6),&0x40	# load dst op

	fmov.l		L_SCR3(%a6),%fpcr	# set FPCR
	fmov.l		&0x0,%fpsr		# clear FPSR

	fsglmul.x	FP_SCR0(%a6),%fp1	# execute sgl multiply	

	fmov.l		&0x0,%fpcr		# clear FPCR

	fmovm.x		&0x40,FP_SCR0(%a6)	# save result to stack
	mov.l		%d2,-(%sp)		# save d2
	mov.w		FP_SCR0_EX(%a6),%d1	# fetch {sgn,exp}
	mov.l		%d1,%d2			# make a copy
	andi.l		&0x7fff,%d1		# strip sign
	andi.w		&0x8000,%d2		# keep old sign
	sub.l		%d0,%d1			# add scale factor
	addi.l		&0x6000,%d1		# add bias
	andi.w		&0x7fff,%d1
	or.w		%d2,%d1			# concat old sign,new exp
	mov.w		%d1,FP_SCR0_EX(%a6)	# insert new exponent
	mov.l		(%sp)+,%d2		# restore d2
	fmovm.x		FP_SCR0(%a6),&0x40	# return EXOP in fp1
	bra.w		fsglmul_unfl_dis

fsglmul_may_unfl:
	fmovm.x		FP_SCR1(%a6),&0x80	# load dst op

	fmov.l		L_SCR3(%a6),%fpcr	# set FPCR
	fmov.l		&0x0,%fpsr		# clear FPSR

	fsglmul.x	FP_SCR0(%a6),%fp0	# execute sgl multiply	

	fmov.l		%fpsr,%d1		# save status
	fmov.l		&0x0,%fpcr		# clear FPCR

	or.l		%d1,USER_FPSR(%a6)	# save INEX2,N

	fabs.x		%fp0,%fp1		# make a copy of result
	fcmp.b		%fp1,&0x2		# is |result| > 2.b?
	fbgt.w		fsglmul_normal_exit	# no; no underflow occurred
	fblt.w		fsglmul_unfl		# yes; underflow occurred

#
# we still don't know if underflow occurred. result is ~ equal to 2. but,
# we don't know if the result was an underflow that rounded up to a 2 or
# a normalized number that rounded down to a 2. so, redo the entire operation
# using RZ as the rounding mode to see what the pre-rounded result is.
# this case should be relatively rare.
#
	fmovm.x		FP_SCR1(%a6),&0x40	# load dst op into fp1

	mov.l		L_SCR3(%a6),%d1
	andi.b		&0xc0,%d1		# keep rnd prec
	ori.b		&rz_mode*0x10,%d1	# insert RZ
	
	fmov.l		%d1,%fpcr		# set FPCR
	fmov.l		&0x0,%fpsr		# clear FPSR

	fsglmul.x	FP_SCR0(%a6),%fp1	# execute sgl multiply	

	fmov.l		&0x0,%fpcr		# clear FPCR
	fabs.x		%fp1			# make absolute value
	fcmp.b		%fp1,&0x2		# is |result| < 2.b?
	fbge.w		fsglmul_normal_exit	# no; no underflow occurred
	bra.w		fsglmul_unfl		# yes, underflow occurred

##############################################################################

#
# Single Precision Multiply: inputs are not both normalized; what are they?
#
fsglmul_not_norm:
	mov.w		(tbl_fsglmul_op.b,%pc,%d1.w*2),%d1
	jmp		(tbl_fsglmul_op.b,%pc,%d1.w*1)

	swbeg		&48
tbl_fsglmul_op:
	short		fsglmul_norm		- tbl_fsglmul_op # NORM x NORM
	short		fsglmul_zero		- tbl_fsglmul_op # NORM x ZERO
	short		fsglmul_inf_src		- tbl_fsglmul_op # NORM x INF
	short		fsglmul_res_qnan	- tbl_fsglmul_op # NORM x QNAN
	short		fsglmul_norm		- tbl_fsglmul_op # NORM x DENORM
	short		fsglmul_res_snan	- tbl_fsglmul_op # NORM x SNAN
	short		tbl_fsglmul_op		- tbl_fsglmul_op #
	short		tbl_fsglmul_op		- tbl_fsglmul_op #

	short		fsglmul_zero		- tbl_fsglmul_op # ZERO x NORM
	short		fsglmul_zero		- tbl_fsglmul_op # ZERO x ZERO
	short		fsglmul_res_operr	- tbl_fsglmul_op # ZERO x INF
	short		fsglmul_res_qnan	- tbl_fsglmul_op # ZERO x QNAN
	short		fsglmul_zero		- tbl_fsglmul_op # ZERO x DENORM
	short		fsglmul_res_snan	- tbl_fsglmul_op # ZERO x SNAN
	short		tbl_fsglmul_op		- tbl_fsglmul_op #
	short		tbl_fsglmul_op		- tbl_fsglmul_op #

	short		fsglmul_inf_dst		- tbl_fsglmul_op # INF x NORM
	short		fsglmul_res_operr	- tbl_fsglmul_op # INF x ZERO
	short		fsglmul_inf_dst		- tbl_fsglmul_op # INF x INF
	short		fsglmul_res_qnan	- tbl_fsglmul_op # INF x QNAN
	short		fsglmul_inf_dst		- tbl_fsglmul_op # INF x DENORM
	short		fsglmul_res_snan	- tbl_fsglmul_op # INF x SNAN
	short		tbl_fsglmul_op		- tbl_fsglmul_op #
	short		tbl_fsglmul_op		- tbl_fsglmul_op #

	short		fsglmul_res_qnan	- tbl_fsglmul_op # QNAN x NORM
	short		fsglmul_res_qnan	- tbl_fsglmul_op # QNAN x ZERO
	short		fsglmul_res_qnan	- tbl_fsglmul_op # QNAN x INF
	short		fsglmul_res_qnan	- tbl_fsglmul_op # QNAN x QNAN
	short		fsglmul_res_qnan	- tbl_fsglmul_op # QNAN x DENORM
	short		fsglmul_res_snan	- tbl_fsglmul_op # QNAN x SNAN
	short		tbl_fsglmul_op		- tbl_fsglmul_op #
	short		tbl_fsglmul_op		- tbl_fsglmul_op #

	short		fsglmul_norm		- tbl_fsglmul_op # NORM x NORM
	short		fsglmul_zero		- tbl_fsglmul_op # NORM x ZERO
	short		fsglmul_inf_src		- tbl_fsglmul_op # NORM x INF
	short		fsglmul_res_qnan	- tbl_fsglmul_op # NORM x QNAN
	short		fsglmul_norm		- tbl_fsglmul_op # NORM x DENORM
	short		fsglmul_res_snan	- tbl_fsglmul_op # NORM x SNAN
	short		tbl_fsglmul_op		- tbl_fsglmul_op #
	short		tbl_fsglmul_op		- tbl_fsglmul_op #

	short		fsglmul_res_snan	- tbl_fsglmul_op # SNAN x NORM
	short		fsglmul_res_snan	- tbl_fsglmul_op # SNAN x ZERO
	short		fsglmul_res_snan	- tbl_fsglmul_op # SNAN x INF
	short		fsglmul_res_snan	- tbl_fsglmul_op # SNAN x QNAN
	short		fsglmul_res_snan	- tbl_fsglmul_op # SNAN x DENORM
	short		fsglmul_res_snan	- tbl_fsglmul_op # SNAN x SNAN
	short		tbl_fsglmul_op		- tbl_fsglmul_op #
	short		tbl_fsglmul_op		- tbl_fsglmul_op #

fsglmul_res_operr:
	bra.l		res_operr
fsglmul_res_snan:
	bra.l		res_snan
fsglmul_res_qnan:
	bra.l		res_qnan
fsglmul_zero:
	bra.l		fmul_zero
fsglmul_inf_src:
	bra.l		fmul_inf_src
fsglmul_inf_dst:
	bra.l		fmul_inf_dst

#########################################################################
# XDEF ****************************************************************	#
# 	fsgldiv(): emulates the fsgldiv instruction			#
#									#
# XREF ****************************************************************	#
#	scale_to_zero_src() - scale src exponent to zero		#
#	scale_to_zero_dst() - scale dst exponent to zero		#
#	unf_res4() - return default underflow result for sglop		#
#	ovf_res() - return default overflow result			#
# 	res_qnan() - return QNAN result					#
# 	res_snan() - return SNAN result					#
#									#
# INPUT ***************************************************************	#
#	a0 = pointer to extended precision source operand		#
#	a1 = pointer to extended precision destination operand		#
#	d0  rnd prec,mode						#
#									#
# OUTPUT **************************************************************	#
#	fp0 = result							#
#	fp1 = EXOP (if exception occurred)				#
#									#
# ALGORITHM ***********************************************************	#
#	Handle NANs, infinities, and zeroes as special cases. Divide	#
# norms/denorms into ext/sgl/dbl precision.				#
#	For norms/denorms, scale the exponents such that a divide	#
# instruction won't cause an exception. Use the regular fsgldiv to	#
# compute a result. Check if the regular operands would have taken	#
# an exception. If so, return the default overflow/underflow result	#
# and return the EXOP if exceptions are enabled. Else, scale the 	#
# result operand to the proper exponent.				#
#									#
#########################################################################

	global		fsgldiv
fsgldiv:
	mov.l		%d0,L_SCR3(%a6)		# store rnd info

	clr.w		%d1
	mov.b		DTAG(%a6),%d1
	lsl.b		&0x3,%d1
	or.b		STAG(%a6),%d1		# combine src tags

	bne.w		fsgldiv_not_norm	# optimize on non-norm input
		
#
# DIVIDE: NORMs and DENORMs ONLY!
#
fsgldiv_norm:
	mov.w		DST_EX(%a1),FP_SCR1_EX(%a6)
	mov.l		DST_HI(%a1),FP_SCR1_HI(%a6)
	mov.l		DST_LO(%a1),FP_SCR1_LO(%a6)

	mov.w		SRC_EX(%a0),FP_SCR0_EX(%a6)
	mov.l		SRC_HI(%a0),FP_SCR0_HI(%a6)
	mov.l		SRC_LO(%a0),FP_SCR0_LO(%a6)

	bsr.l		scale_to_zero_src	# calculate scale factor 1
	mov.l		%d0,-(%sp)		# save scale factor 1

	bsr.l		scale_to_zero_dst	# calculate scale factor 2

	neg.l		(%sp)			# S.F. = scale1 - scale2
	add.l		%d0,(%sp)

	mov.w		2+L_SCR3(%a6),%d1	# fetch precision,mode
	lsr.b		&0x6,%d1
	mov.l		(%sp)+,%d0
	cmpi.l		%d0,&0x3fff-0x7ffe
	ble.w		fsgldiv_may_ovfl

	cmpi.l		%d0,&0x3fff-0x0000 	# will result underflow?
	beq.w		fsgldiv_may_unfl	# maybe
	bgt.w		fsgldiv_unfl		# yes; go handle underflow

fsgldiv_normal:
	fmovm.x		FP_SCR1(%a6),&0x80	# load dst op

	fmov.l		L_SCR3(%a6),%fpcr	# save FPCR
	fmov.l		&0x0,%fpsr		# clear FPSR

	fsgldiv.x	FP_SCR0(%a6),%fp0	# perform sgl divide

	fmov.l		%fpsr,%d1		# save FPSR
	fmov.l		&0x0,%fpcr		# clear FPCR

	or.l		%d1,USER_FPSR(%a6)	# save INEX2,N

fsgldiv_normal_exit:
	fmovm.x		&0x80,FP_SCR0(%a6)	# store result on stack
	mov.l		%d2,-(%sp)		# save d2
	mov.w		FP_SCR0_EX(%a6),%d1	# load {sgn,exp}
	mov.l		%d1,%d2			# make a copy
	andi.l		&0x7fff,%d1		# strip sign
	andi.w		&0x8000,%d2		# keep old sign
	sub.l		%d0,%d1			# add scale factor
	or.w		%d2,%d1			# concat old sign,new exp
	mov.w		%d1,FP_SCR0_EX(%a6)	# insert new exponent
	mov.l		(%sp)+,%d2		# restore d2
	fmovm.x		FP_SCR0(%a6),&0x80	# return result in fp0
	rts

fsgldiv_may_ovfl:
	fmovm.x		FP_SCR1(%a6),&0x80	# load dst op

	fmov.l		L_SCR3(%a6),%fpcr	# set FPCR
	fmov.l		&0x0,%fpsr		# set FPSR

	fsgldiv.x	FP_SCR0(%a6),%fp0	# execute divide

	fmov.l		%fpsr,%d1
	fmov.l		&0x0,%fpcr

	or.l		%d1,USER_FPSR(%a6)	# save INEX,N

	fmovm.x		&0x01,-(%sp)		# save result to stack
	mov.w		(%sp),%d1		# fetch new exponent
	add.l		&0xc,%sp		# clear result
	andi.l		&0x7fff,%d1		# strip sign
	sub.l		%d0,%d1			# add scale factor
	cmp.l		%d1,&0x7fff		# did divide overflow?
	blt.b		fsgldiv_normal_exit

fsgldiv_ovfl_tst:
	or.w		&ovfl_inx_mask,2+USER_FPSR(%a6) # set ovfl/aovfl/ainex

	mov.b		FPCR_ENABLE(%a6),%d1
	andi.b		&0x13,%d1		# is OVFL or INEX enabled?
	bne.b		fsgldiv_ovfl_ena	# yes

fsgldiv_ovfl_dis:
	btst		&neg_bit,FPSR_CC(%a6) 	# is result negative
	sne		%d1			# set sign param accordingly
	mov.l		L_SCR3(%a6),%d0		# pass prec:rnd
	andi.b		&0x30,%d0		# kill precision
	bsr.l		ovf_res			# calculate default result
	or.b		%d0,FPSR_CC(%a6)	# set INF if applicable
	fmovm.x		(%a0),&0x80		# return default result in fp0
	rts

fsgldiv_ovfl_ena:
	fmovm.x		&0x80,FP_SCR0(%a6)	# move result to stack

	mov.l		%d2,-(%sp)		# save d2
	mov.w		FP_SCR0_EX(%a6),%d1	# fetch {sgn,exp}
	mov.l		%d1,%d2			# make a copy
	andi.l		&0x7fff,%d1		# strip sign
	andi.w		&0x8000,%d2		# keep old sign
	sub.l		%d0,%d1			# add scale factor
	subi.l		&0x6000,%d1		# subtract new bias
	andi.w		&0x7fff,%d1		# clear ms bit
	or.w		%d2,%d1			# concat old sign,new exp
	mov.w		%d1,FP_SCR0_EX(%a6)	# insert new exponent
	mov.l		(%sp)+,%d2		# restore d2
	fmovm.x		FP_SCR0(%a6),&0x40	# return EXOP in fp1
	bra.b		fsgldiv_ovfl_dis

fsgldiv_unfl:
	bset		&unfl_bit,FPSR_EXCEPT(%a6) # set unfl exc bit

	fmovm.x		FP_SCR1(%a6),&0x80	# load dst op

	fmov.l		&rz_mode*0x10,%fpcr	# set FPCR
	fmov.l		&0x0,%fpsr		# clear FPSR

	fsgldiv.x	FP_SCR0(%a6),%fp0	# execute sgl divide

	fmov.l		%fpsr,%d1		# save status
	fmov.l		&0x0,%fpcr		# clear FPCR

	or.l		%d1,USER_FPSR(%a6)	# save INEX2,N

	mov.b		FPCR_ENABLE(%a6),%d1
	andi.b		&0x0b,%d1		# is UNFL or INEX enabled?
	bne.b		fsgldiv_unfl_ena	# yes

fsgldiv_unfl_dis:
	fmovm.x		&0x80,FP_SCR0(%a6)	# store out result

	lea		FP_SCR0(%a6),%a0	# pass: result addr
	mov.l		L_SCR3(%a6),%d1		# pass: rnd prec,mode
	bsr.l		unf_res4		# calculate default result
	or.b		%d0,FPSR_CC(%a6)	# 'Z' bit may have been set
	fmovm.x		FP_SCR0(%a6),&0x80	# return default result in fp0
	rts

#
# UNFL is enabled. 
#
fsgldiv_unfl_ena:
	fmovm.x		FP_SCR1(%a6),&0x40	# load dst op

	fmov.l		L_SCR3(%a6),%fpcr	# set FPCR
	fmov.l		&0x0,%fpsr		# clear FPSR

	fsgldiv.x	FP_SCR0(%a6),%fp1	# execute sgl divide

	fmov.l		&0x0,%fpcr		# clear FPCR

	fmovm.x		&0x40,FP_SCR0(%a6)	# save result to stack
	mov.l		%d2,-(%sp)		# save d2
	mov.w		FP_SCR0_EX(%a6),%d1	# fetch {sgn,exp}
	mov.l		%d1,%d2			# make a copy
	andi.l		&0x7fff,%d1		# strip sign
	andi.w		&0x8000,%d2		# keep old sign
	sub.l		%d0,%d1			# add scale factor
	addi.l		&0x6000,%d1		# add bias
	andi.w		&0x7fff,%d1		# clear top bit
	or.w		%d2,%d1			# concat old sign, new exp
	mov.w		%d1,FP_SCR0_EX(%a6)	# insert new exponent
	mov.l		(%sp)+,%d2		# restore d2
	fmovm.x		FP_SCR0(%a6),&0x40	# return EXOP in fp1
	bra.b		fsgldiv_unfl_dis

#
# the divide operation MAY underflow:
#
fsgldiv_may_unfl:
	fmovm.x		FP_SCR1(%a6),&0x80	# load dst op

	fmov.l		L_SCR3(%a6),%fpcr	# set FPCR
	fmov.l		&0x0,%fpsr		# clear FPSR

	fsgldiv.x	FP_SCR0(%a6),%fp0	# execute sgl divide

	fmov.l		%fpsr,%d1		# save status
	fmov.l		&0x0,%fpcr		# clear FPCR

	or.l		%d1,USER_FPSR(%a6)	# save INEX2,N

	fabs.x		%fp0,%fp1		# make a copy of result
	fcmp.b		%fp1,&0x1		# is |result| > 1.b?
	fbgt.w		fsgldiv_normal_exit	# no; no underflow occurred
	fblt.w		fsgldiv_unfl		# yes; underflow occurred

#
# we still don't know if underflow occurred. result is ~ equal to 1. but,
# we don't know if the result was an underflow that rounded up to a 1
# or a normalized number that rounded down to a 1. so, redo the entire 
# operation using RZ as the rounding mode to see what the pre-rounded 
# result is. this case should be relatively rare.
#
	fmovm.x		FP_SCR1(%a6),&0x40	# load dst op into %fp1

	clr.l		%d1			# clear scratch register
	ori.b		&rz_mode*0x10,%d1	# force RZ rnd mode

	fmov.l		%d1,%fpcr		# set FPCR
	fmov.l		&0x0,%fpsr		# clear FPSR

	fsgldiv.x	FP_SCR0(%a6),%fp1	# execute sgl divide

	fmov.l		&0x0,%fpcr		# clear FPCR
	fabs.x		%fp1			# make absolute value
	fcmp.b		%fp1,&0x1		# is |result| < 1.b?
	fbge.w		fsgldiv_normal_exit	# no; no underflow occurred
	bra.w		fsgldiv_unfl		# yes; underflow occurred

############################################################################

#
# Divide: inputs are not both normalized; what are they?
#
fsgldiv_not_norm:
	mov.w		(tbl_fsgldiv_op.b,%pc,%d1.w*2),%d1
	jmp		(tbl_fsgldiv_op.b,%pc,%d1.w*1)

	swbeg		&48
tbl_fsgldiv_op:
	short		fsgldiv_norm		- tbl_fsgldiv_op # NORM / NORM
	short		fsgldiv_inf_load	- tbl_fsgldiv_op # NORM / ZERO
	short		fsgldiv_zero_load	- tbl_fsgldiv_op # NORM / INF
	short		fsgldiv_res_qnan	- tbl_fsgldiv_op # NORM / QNAN
	short		fsgldiv_norm		- tbl_fsgldiv_op # NORM / DENORM
	short		fsgldiv_res_snan	- tbl_fsgldiv_op # NORM / SNAN
	short		tbl_fsgldiv_op		- tbl_fsgldiv_op #
	short		tbl_fsgldiv_op		- tbl_fsgldiv_op #

	short		fsgldiv_zero_load	- tbl_fsgldiv_op # ZERO / NORM
	short		fsgldiv_res_operr	- tbl_fsgldiv_op # ZERO / ZERO
	short		fsgldiv_zero_load	- tbl_fsgldiv_op # ZERO / INF
	short		fsgldiv_res_qnan	- tbl_fsgldiv_op # ZERO / QNAN
	short		fsgldiv_zero_load	- tbl_fsgldiv_op # ZERO / DENORM
	short		fsgldiv_res_snan	- tbl_fsgldiv_op # ZERO / SNAN
	short		tbl_fsgldiv_op		- tbl_fsgldiv_op #
	short		tbl_fsgldiv_op		- tbl_fsgldiv_op #

	short		fsgldiv_inf_dst		- tbl_fsgldiv_op # INF / NORM
	short		fsgldiv_inf_dst		- tbl_fsgldiv_op # INF / ZERO
	short		fsgldiv_res_operr	- tbl_fsgldiv_op # INF / INF
	short		fsgldiv_res_qnan	- tbl_fsgldiv_op # INF / QNAN
	short		fsgldiv_inf_dst		- tbl_fsgldiv_op # INF / DENORM
	short		fsgldiv_res_snan	- tbl_fsgldiv_op # INF / SNAN
	short		tbl_fsgldiv_op		- tbl_fsgldiv_op #
	short		tbl_fsgldiv_op		- tbl_fsgldiv_op #

	short		fsgldiv_res_qnan	- tbl_fsgldiv_op # QNAN / NORM
	short		fsgldiv_res_qnan	- tbl_fsgldiv_op # QNAN / ZERO
	short		fsgldiv_res_qnan	- tbl_fsgldiv_op # QNAN / INF
	short		fsgldiv_res_qnan	- tbl_fsgldiv_op # QNAN / QNAN
	short		fsgldiv_res_qnan	- tbl_fsgldiv_op # QNAN / DENORM
	short		fsgldiv_res_snan	- tbl_fsgldiv_op # QNAN / SNAN
	short		tbl_fsgldiv_op		- tbl_fsgldiv_op #
	short		tbl_fsgldiv_op		- tbl_fsgldiv_op #

	short		fsgldiv_norm		- tbl_fsgldiv_op # DENORM / NORM
	short		fsgldiv_inf_load	- tbl_fsgldiv_op # DENORM / ZERO
	short		fsgldiv_zero_load	- tbl_fsgldiv_op # DENORM / INF
	short		fsgldiv_res_qnan	- tbl_fsgldiv_op # DENORM / QNAN
	short		fsgldiv_norm		- tbl_fsgldiv_op # DENORM / DENORM
	short		fsgldiv_res_snan	- tbl_fsgldiv_op # DENORM / SNAN
	short		tbl_fsgldiv_op		- tbl_fsgldiv_op #
	short		tbl_fsgldiv_op		- tbl_fsgldiv_op #

	short		fsgldiv_res_snan	- tbl_fsgldiv_op # SNAN / NORM
	short		fsgldiv_res_snan	- tbl_fsgldiv_op # SNAN / ZERO
	short		fsgldiv_res_snan	- tbl_fsgldiv_op # SNAN / INF
	short		fsgldiv_res_snan	- tbl_fsgldiv_op # SNAN / QNAN
	short		fsgldiv_res_snan	- tbl_fsgldiv_op # SNAN / DENORM
	short		fsgldiv_res_snan	- tbl_fsgldiv_op # SNAN / SNAN
	short		tbl_fsgldiv_op		- tbl_fsgldiv_op #
	short		tbl_fsgldiv_op		- tbl_fsgldiv_op #

fsgldiv_res_qnan:
	bra.l		res_qnan
fsgldiv_res_snan:
	bra.l		res_snan
fsgldiv_res_operr:
	bra.l		res_operr
fsgldiv_inf_load:
	bra.l		fdiv_inf_load
fsgldiv_zero_load:
	bra.l		fdiv_zero_load
fsgldiv_inf_dst:
	bra.l		fdiv_inf_dst

#########################################################################
# XDEF ****************************************************************	#
#	fadd(): emulates the fadd instruction				#
#	fsadd(): emulates the fadd instruction				#
#	fdadd(): emulates the fdadd instruction				#
#									#
# XREF ****************************************************************	#
# 	addsub_scaler2() - scale the operands so they won't take exc	#
#	ovf_res() - return default overflow result			#
#	unf_res() - return default underflow result			#
#	res_qnan() - set QNAN result					#
# 	res_snan() - set SNAN result					#
#	res_operr() - set OPERR result					#
#	scale_to_zero_src() - set src operand exponent equal to zero	#
#	scale_to_zero_dst() - set dst operand exponent equal to zero	#
#									#
# INPUT ***************************************************************	#
#	a0 = pointer to extended precision source operand		#
# 	a1 = pointer to extended precision destination operand		#
#									#
# OUTPUT **************************************************************	#
#	fp0 = result							#
#	fp1 = EXOP (if exception occurred)				#
#									#
# ALGORITHM ***********************************************************	#
# 	Handle NANs, infinities, and zeroes as special cases. Divide	#
# norms into extended, single, and double precision.			#
#	Do addition after scaling exponents such that exception won't	#
# occur. Then, check result exponent to see if exception would have	#
# occurred. If so, return default result and maybe EXOP. Else, insert	#
# the correct result exponent and return. Set FPSR bits as appropriate.	#
#									#
#########################################################################

	global		fsadd
fsadd:
	andi.b		&0x30,%d0		# clear rnd prec
	ori.b		&s_mode*0x10,%d0	# insert sgl prec
	bra.b		fadd

	global		fdadd
fdadd:
	andi.b		&0x30,%d0		# clear rnd prec
	ori.b		&d_mode*0x10,%d0	# insert dbl prec

	global		fadd
fadd:
	mov.l		%d0,L_SCR3(%a6)		# store rnd info

	clr.w		%d1
	mov.b		DTAG(%a6),%d1
	lsl.b		&0x3,%d1
	or.b		STAG(%a6),%d1		# combine src tags

	bne.w		fadd_not_norm		# optimize on non-norm input

#
# ADD: norms and denorms
#
fadd_norm:
	bsr.l		addsub_scaler2		# scale exponents

fadd_zero_entry:
	fmovm.x		FP_SCR1(%a6),&0x80	# load dst op

	fmov.l		&0x0,%fpsr		# clear FPSR
	fmov.l		L_SCR3(%a6),%fpcr	# set FPCR

	fadd.x		FP_SCR0(%a6),%fp0	# execute add

	fmov.l		&0x0,%fpcr		# clear FPCR
	fmov.l		%fpsr,%d1		# fetch INEX2,N,Z

	or.l		%d1,USER_FPSR(%a6)	# save exc and ccode bits

	fbeq.w		fadd_zero_exit		# if result is zero, end now

	mov.l		%d2,-(%sp)		# save d2

	fmovm.x		&0x01,-(%sp)		# save result to stack

	mov.w		2+L_SCR3(%a6),%d1
	lsr.b		&0x6,%d1

	mov.w		(%sp),%d2		# fetch new sign, exp
	andi.l		&0x7fff,%d2		# strip sign
	sub.l		%d0,%d2			# add scale factor

	cmp.l		%d2,(tbl_fadd_ovfl.b,%pc,%d1.w*4) # is it an overflow?
	bge.b		fadd_ovfl		# yes

	cmp.l		%d2,(tbl_fadd_unfl.b,%pc,%d1.w*4) # is it an underflow?
	blt.w		fadd_unfl		# yes
	beq.w		fadd_may_unfl		# maybe; go find out

fadd_normal:
	mov.w		(%sp),%d1
	andi.w		&0x8000,%d1		# keep sign
	or.w		%d2,%d1			# concat sign,new exp
	mov.w		%d1,(%sp)		# insert new exponent

	fmovm.x		(%sp)+,&0x80		# return result in fp0

	mov.l		(%sp)+,%d2		# restore d2
	rts

fadd_zero_exit:
#	fmov.s		&0x00000000,%fp0	# return zero in fp0
	rts

tbl_fadd_ovfl:
	long		0x7fff			# ext ovfl
	long		0x407f			# sgl ovfl
	long		0x43ff			# dbl ovfl

tbl_fadd_unfl:
	long	        0x0000			# ext unfl
	long		0x3f81			# sgl unfl
	long		0x3c01			# dbl unfl

fadd_ovfl:
	or.l		&ovfl_inx_mask,USER_FPSR(%a6) # set ovfl/aovfl/ainex

	mov.b		FPCR_ENABLE(%a6),%d1
	andi.b		&0x13,%d1		# is OVFL or INEX enabled?
	bne.b		fadd_ovfl_ena		# yes

	add.l		&0xc,%sp
fadd_ovfl_dis:
	btst		&neg_bit,FPSR_CC(%a6)	# is result negative?
	sne		%d1			# set sign param accordingly
	mov.l		L_SCR3(%a6),%d0		# pass prec:rnd
	bsr.l		ovf_res			# calculate default result
	or.b		%d0,FPSR_CC(%a6)	# set INF,N if applicable
	fmovm.x		(%a0),&0x80		# return default result in fp0
	mov.l		(%sp)+,%d2		# restore d2
	rts

fadd_ovfl_ena:
	mov.b		L_SCR3(%a6),%d1
	andi.b		&0xc0,%d1		# is precision extended?
	bne.b		fadd_ovfl_ena_sd	# no; prec = sgl or dbl

fadd_ovfl_ena_cont:
	mov.w		(%sp),%d1
	andi.w		&0x8000,%d1		# keep sign
	subi.l		&0x6000,%d2		# add extra bias
	andi.w		&0x7fff,%d2
	or.w		%d2,%d1			# concat sign,new exp
	mov.w		%d1,(%sp)		# insert new exponent

	fmovm.x		(%sp)+,&0x40		# return EXOP in fp1
	bra.b		fadd_ovfl_dis

fadd_ovfl_ena_sd:
	fmovm.x		FP_SCR1(%a6),&0x80	# load dst op

	mov.l		L_SCR3(%a6),%d1
	andi.b		&0x30,%d1		# keep rnd mode
	fmov.l		%d1,%fpcr		# set FPCR

	fadd.x		FP_SCR0(%a6),%fp0	# execute add

	fmov.l		&0x0,%fpcr		# clear FPCR

	add.l		&0xc,%sp
	fmovm.x		&0x01,-(%sp)
	bra.b		fadd_ovfl_ena_cont

fadd_unfl:
	bset		&unfl_bit,FPSR_EXCEPT(%a6) # set unfl exc bit

	add.l		&0xc,%sp

	fmovm.x		FP_SCR1(%a6),&0x80	# load dst op

	fmov.l		&rz_mode*0x10,%fpcr	# set FPCR
	fmov.l		&0x0,%fpsr		# clear FPSR

	fadd.x		FP_SCR0(%a6),%fp0	# execute add

	fmov.l		&0x0,%fpcr		# clear FPCR
	fmov.l		%fpsr,%d1		# save status

	or.l		%d1,USER_FPSR(%a6)	# save INEX,N

	mov.b		FPCR_ENABLE(%a6),%d1
	andi.b		&0x0b,%d1		# is UNFL or INEX enabled?
	bne.b		fadd_unfl_ena		# yes

fadd_unfl_dis:
	fmovm.x		&0x80,FP_SCR0(%a6)	# store out result

	lea		FP_SCR0(%a6),%a0	# pass: result addr
	mov.l		L_SCR3(%a6),%d1		# pass: rnd prec,mode
	bsr.l		unf_res			# calculate default result
	or.b		%d0,FPSR_CC(%a6)	# 'Z' bit may have been set
	fmovm.x		FP_SCR0(%a6),&0x80	# return default result in fp0
	mov.l		(%sp)+,%d2		# restore d2
	rts

fadd_unfl_ena:
	fmovm.x		FP_SCR1(%a6),&0x40	# load dst op

	mov.l		L_SCR3(%a6),%d1
	andi.b		&0xc0,%d1		# is precision extended?
	bne.b		fadd_unfl_ena_sd	# no; sgl or dbl

	fmov.l		L_SCR3(%a6),%fpcr	# set FPCR

fadd_unfl_ena_cont:
	fmov.l		&0x0,%fpsr		# clear FPSR

	fadd.x		FP_SCR0(%a6),%fp1	# execute multiply

	fmov.l		&0x0,%fpcr		# clear FPCR

	fmovm.x		&0x40,FP_SCR0(%a6)	# save result to stack
	mov.w		FP_SCR0_EX(%a6),%d1	# fetch {sgn,exp}
	mov.l		%d1,%d2			# make a copy
	andi.l		&0x7fff,%d1		# strip sign
	andi.w		&0x8000,%d2		# keep old sign
	sub.l		%d0,%d1			# add scale factor
	addi.l		&0x6000,%d1		# add new bias
	andi.w		&0x7fff,%d1		# clear top bit
	or.w		%d2,%d1			# concat sign,new exp
	mov.w		%d1,FP_SCR0_EX(%a6)	# insert new exponent
	fmovm.x		FP_SCR0(%a6),&0x40	# return EXOP in fp1
	bra.w		fadd_unfl_dis

fadd_unfl_ena_sd:
	mov.l		L_SCR3(%a6),%d1
	andi.b		&0x30,%d1		# use only rnd mode
	fmov.l		%d1,%fpcr		# set FPCR

	bra.b		fadd_unfl_ena_cont

#
# result is equal to the smallest normalized number in the selected precision
# if the precision is extended, this result could not have come from an 
# underflow that rounded up.
#
fadd_may_unfl:
	mov.l		L_SCR3(%a6),%d1
	andi.b		&0xc0,%d1
	beq.w		fadd_normal		# yes; no underflow occurred

	mov.l		0x4(%sp),%d1		# extract hi(man)
	cmpi.l		%d1,&0x80000000		# is hi(man) = 0x80000000?
	bne.w		fadd_normal		# no; no underflow occurred

	tst.l		0x8(%sp)		# is lo(man) = 0x0?
	bne.w		fadd_normal		# no; no underflow occurred

	btst		&inex2_bit,FPSR_EXCEPT(%a6) # is INEX2 set?
	beq.w		fadd_normal		# no; no underflow occurred

#
# ok, so now the result has a exponent equal to the smallest normalized
# exponent for the selected precision. also, the mantissa is equal to
# 0x8000000000000000 and this mantissa is the result of rounding non-zero
# g,r,s. 
# now, we must determine whether the pre-rounded result was an underflow
# rounded "up" or a normalized number rounded "down".
# so, we do this be re-executing the add using RZ as the rounding mode and
# seeing if the new result is smaller or equal to the current result.
#
	fmovm.x		FP_SCR1(%a6),&0x40	# load dst op into fp1

	mov.l		L_SCR3(%a6),%d1
	andi.b		&0xc0,%d1		# keep rnd prec
	ori.b		&rz_mode*0x10,%d1	# insert rnd mode
	fmov.l		%d1,%fpcr		# set FPCR
	fmov.l		&0x0,%fpsr		# clear FPSR

	fadd.x		FP_SCR0(%a6),%fp1	# execute add

	fmov.l		&0x0,%fpcr		# clear FPCR

	fabs.x		%fp0			# compare absolute values
	fabs.x		%fp1
	fcmp.x		%fp0,%fp1		# is first result > second?

	fbgt.w		fadd_unfl		# yes; it's an underflow
	bra.w		fadd_normal		# no; it's not an underflow

##########################################################################

#
# Add: inputs are not both normalized; what are they?
#
fadd_not_norm:
	mov.w		(tbl_fadd_op.b,%pc,%d1.w*2),%d1
	jmp		(tbl_fadd_op.b,%pc,%d1.w*1)

	swbeg		&48
tbl_fadd_op:
	short		fadd_norm	- tbl_fadd_op # NORM + NORM
	short		fadd_zero_src	- tbl_fadd_op # NORM + ZERO
	short		fadd_inf_src	- tbl_fadd_op # NORM + INF
	short		fadd_res_qnan	- tbl_fadd_op # NORM + QNAN
	short		fadd_norm	- tbl_fadd_op # NORM + DENORM
	short		fadd_res_snan	- tbl_fadd_op # NORM + SNAN
	short		tbl_fadd_op	- tbl_fadd_op #
	short		tbl_fadd_op	- tbl_fadd_op #

	short		fadd_zero_dst	- tbl_fadd_op # ZERO + NORM
	short		fadd_zero_2	- tbl_fadd_op # ZERO + ZERO
	short		fadd_inf_src	- tbl_fadd_op # ZERO + INF
	short		fadd_res_qnan	- tbl_fadd_op # NORM + QNAN
	short		fadd_zero_dst	- tbl_fadd_op # ZERO + DENORM
	short		fadd_res_snan	- tbl_fadd_op # NORM + SNAN
	short		tbl_fadd_op	- tbl_fadd_op #
	short		tbl_fadd_op	- tbl_fadd_op #

	short		fadd_inf_dst	- tbl_fadd_op # INF + NORM
	short		fadd_inf_dst	- tbl_fadd_op # INF + ZERO
	short		fadd_inf_2	- tbl_fadd_op # INF + INF
	short		fadd_res_qnan	- tbl_fadd_op # NORM + QNAN
	short		fadd_inf_dst	- tbl_fadd_op # INF + DENORM
	short		fadd_res_snan	- tbl_fadd_op # NORM + SNAN
	short		tbl_fadd_op	- tbl_fadd_op #
	short		tbl_fadd_op	- tbl_fadd_op #

	short		fadd_res_qnan	- tbl_fadd_op # QNAN + NORM
	short		fadd_res_qnan	- tbl_fadd_op # QNAN + ZERO
	short		fadd_res_qnan	- tbl_fadd_op # QNAN + INF
	short		fadd_res_qnan	- tbl_fadd_op # QNAN + QNAN
	short		fadd_res_qnan	- tbl_fadd_op # QNAN + DENORM
	short		fadd_res_snan	- tbl_fadd_op # QNAN + SNAN
	short		tbl_fadd_op	- tbl_fadd_op #
	short		tbl_fadd_op	- tbl_fadd_op #

	short		fadd_norm	- tbl_fadd_op # DENORM + NORM
	short		fadd_zero_src	- tbl_fadd_op # DENORM + ZERO
	short		fadd_inf_src	- tbl_fadd_op # DENORM + INF
	short		fadd_res_qnan	- tbl_fadd_op # NORM + QNAN
	short		fadd_norm	- tbl_fadd_op # DENORM + DENORM
	short		fadd_res_snan	- tbl_fadd_op # NORM + SNAN
	short		tbl_fadd_op	- tbl_fadd_op #
	short		tbl_fadd_op	- tbl_fadd_op #

	short		fadd_res_snan	- tbl_fadd_op # SNAN + NORM
	short		fadd_res_snan	- tbl_fadd_op # SNAN + ZERO
	short		fadd_res_snan	- tbl_fadd_op # SNAN + INF
	short		fadd_res_snan	- tbl_fadd_op # SNAN + QNAN
	short		fadd_res_snan	- tbl_fadd_op # SNAN + DENORM
	short		fadd_res_snan	- tbl_fadd_op # SNAN + SNAN
	short		tbl_fadd_op	- tbl_fadd_op #
	short		tbl_fadd_op	- tbl_fadd_op #

fadd_res_qnan:
	bra.l		res_qnan
fadd_res_snan:
	bra.l		res_snan

#
# both operands are ZEROes
#
fadd_zero_2:
	mov.b		SRC_EX(%a0),%d0		# are the signs opposite
	mov.b		DST_EX(%a1),%d1
	eor.b		%d0,%d1
	bmi.w		fadd_zero_2_chk_rm	# weed out (-ZERO)+(+ZERO)

# the signs are the same. so determine whether they are positive or negative
# and return the appropriately signed zero.
	tst.b		%d0			# are ZEROes positive or negative?
	bmi.b		fadd_zero_rm		# negative
	fmov.s		&0x00000000,%fp0	# return +ZERO
	mov.b		&z_bmask,FPSR_CC(%a6)	# set Z
	rts
	
#
# the ZEROes have opposite signs:
# - therefore, we return +ZERO if the rounding modes are RN,RZ, or RP.
# - -ZERO is returned in the case of RM.
#
fadd_zero_2_chk_rm:
	mov.b		3+L_SCR3(%a6),%d1
	andi.b		&0x30,%d1		# extract rnd mode
	cmpi.b		%d1,&rm_mode*0x10	# is rnd mode == RM?
	beq.b		fadd_zero_rm		# yes
	fmov.s		&0x00000000,%fp0	# return +ZERO
	mov.b		&z_bmask,FPSR_CC(%a6)	# set Z
	rts

fadd_zero_rm:
	fmov.s		&0x80000000,%fp0	# return -ZERO
	mov.b		&neg_bmask+z_bmask,FPSR_CC(%a6) # set NEG/Z
	rts

#
# one operand is a ZERO and the other is a DENORM or NORM. scale
# the DENORM or NORM and jump to the regular fadd routine.
#
fadd_zero_dst:
	mov.w		SRC_EX(%a0),FP_SCR0_EX(%a6)
	mov.l		SRC_HI(%a0),FP_SCR0_HI(%a6)
	mov.l		SRC_LO(%a0),FP_SCR0_LO(%a6)
	bsr.l		scale_to_zero_src	# scale the operand
	clr.w		FP_SCR1_EX(%a6)
	clr.l		FP_SCR1_HI(%a6)
	clr.l		FP_SCR1_LO(%a6)
	bra.w		fadd_zero_entry		# go execute fadd

fadd_zero_src:
	mov.w		DST_EX(%a1),FP_SCR1_EX(%a6)
	mov.l		DST_HI(%a1),FP_SCR1_HI(%a6)
	mov.l		DST_LO(%a1),FP_SCR1_LO(%a6)
	bsr.l		scale_to_zero_dst	# scale the operand
	clr.w		FP_SCR0_EX(%a6)
	clr.l		FP_SCR0_HI(%a6)
	clr.l		FP_SCR0_LO(%a6)
	bra.w		fadd_zero_entry		# go execute fadd

#
# both operands are INFs. an OPERR will result if the INFs have
# different signs. else, an INF of the same sign is returned
#
fadd_inf_2:
	mov.b		SRC_EX(%a0),%d0		# exclusive or the signs
	mov.b		DST_EX(%a1),%d1
	eor.b		%d1,%d0
	bmi.l		res_operr		# weed out (-INF)+(+INF)

# ok, so it's not an OPERR. but, we do have to remember to return the 
# src INF since that's where the 881/882 gets the j-bit from...

#
# operands are INF and one of {ZERO, INF, DENORM, NORM}
#
fadd_inf_src:
	fmovm.x		SRC(%a0),&0x80		# return src INF
	tst.b		SRC_EX(%a0)		# is INF positive?
	bpl.b		fadd_inf_done		# yes; we're done
	mov.b		&neg_bmask+inf_bmask,FPSR_CC(%a6) # set INF/NEG
	rts

#
# operands are INF and one of {ZERO, INF, DENORM, NORM}
#
fadd_inf_dst:
	fmovm.x		DST(%a1),&0x80		# return dst INF
	tst.b		DST_EX(%a1)		# is INF positive?
	bpl.b		fadd_inf_done		# yes; we're done
	mov.b		&neg_bmask+inf_bmask,FPSR_CC(%a6) # set INF/NEG
	rts

fadd_inf_done:
	mov.b		&inf_bmask,FPSR_CC(%a6) # set INF
	rts

#########################################################################
# XDEF ****************************************************************	#
#	fsub(): emulates the fsub instruction				#
#	fssub(): emulates the fssub instruction				#
#	fdsub(): emulates the fdsub instruction				#
#									#
# XREF ****************************************************************	#
# 	addsub_scaler2() - scale the operands so they won't take exc	#
#	ovf_res() - return default overflow result			#
#	unf_res() - return default underflow result			#
#	res_qnan() - set QNAN result					#
# 	res_snan() - set SNAN result					#
#	res_operr() - set OPERR result					#
#	scale_to_zero_src() - set src operand exponent equal to zero	#
#	scale_to_zero_dst() - set dst operand exponent equal to zero	#
#									#
# INPUT ***************************************************************	#
#	a0 = pointer to extended precision source operand		#
# 	a1 = pointer to extended precision destination operand		#
#									#
# OUTPUT **************************************************************	#
#	fp0 = result							#
#	fp1 = EXOP (if exception occurred)				#
#									#
# ALGORITHM ***********************************************************	#
# 	Handle NANs, infinities, and zeroes as special cases. Divide	#
# norms into extended, single, and double precision.			#
#	Do subtraction after scaling exponents such that exception won't#
# occur. Then, check result exponent to see if exception would have	#
# occurred. If so, return default result and maybe EXOP. Else, insert	#
# the correct result exponent and return. Set FPSR bits as appropriate.	#
#									#
#########################################################################

	global		fssub
fssub:
	andi.b		&0x30,%d0		# clear rnd prec
	ori.b		&s_mode*0x10,%d0	# insert sgl prec
	bra.b		fsub

	global		fdsub
fdsub:
	andi.b		&0x30,%d0		# clear rnd prec
	ori.b		&d_mode*0x10,%d0	# insert dbl prec

	global		fsub
fsub:
	mov.l		%d0,L_SCR3(%a6)		# store rnd info

	clr.w		%d1
	mov.b		DTAG(%a6),%d1
	lsl.b		&0x3,%d1
	or.b		STAG(%a6),%d1		# combine src tags

	bne.w		fsub_not_norm		# optimize on non-norm input

#
# SUB: norms and denorms
#
fsub_norm:
	bsr.l		addsub_scaler2		# scale exponents

fsub_zero_entry:
	fmovm.x		FP_SCR1(%a6),&0x80	# load dst op

	fmov.l		&0x0,%fpsr		# clear FPSR
	fmov.l		L_SCR3(%a6),%fpcr	# set FPCR

	fsub.x		FP_SCR0(%a6),%fp0	# execute subtract

	fmov.l		&0x0,%fpcr		# clear FPCR
	fmov.l		%fpsr,%d1		# fetch INEX2, N, Z

	or.l		%d1,USER_FPSR(%a6)	# save exc and ccode bits

	fbeq.w		fsub_zero_exit		# if result zero, end now

	mov.l		%d2,-(%sp)		# save d2

	fmovm.x		&0x01,-(%sp)		# save result to stack

	mov.w		2+L_SCR3(%a6),%d1
	lsr.b		&0x6,%d1

	mov.w		(%sp),%d2		# fetch new exponent
	andi.l		&0x7fff,%d2		# strip sign
	sub.l		%d0,%d2			# add scale factor

	cmp.l		%d2,(tbl_fsub_ovfl.b,%pc,%d1.w*4) # is it an overflow?
	bge.b		fsub_ovfl		# yes

	cmp.l		%d2,(tbl_fsub_unfl.b,%pc,%d1.w*4) # is it an underflow?
	blt.w		fsub_unfl		# yes
	beq.w		fsub_may_unfl		# maybe; go find out

fsub_normal:
	mov.w		(%sp),%d1
	andi.w		&0x8000,%d1		# keep sign
	or.w		%d2,%d1			# insert new exponent
	mov.w		%d1,(%sp)		# insert new exponent

	fmovm.x		(%sp)+,&0x80		# return result in fp0

	mov.l		(%sp)+,%d2		# restore d2
	rts

fsub_zero_exit:
#	fmov.s		&0x00000000,%fp0	# return zero in fp0
	rts

tbl_fsub_ovfl:
	long		0x7fff			# ext ovfl
	long		0x407f			# sgl ovfl
	long		0x43ff			# dbl ovfl

tbl_fsub_unfl:
	long	        0x0000			# ext unfl
	long		0x3f81			# sgl unfl
	long		0x3c01			# dbl unfl

fsub_ovfl:
	or.l		&ovfl_inx_mask,USER_FPSR(%a6) # set ovfl/aovfl/ainex

	mov.b		FPCR_ENABLE(%a6),%d1
	andi.b		&0x13,%d1		# is OVFL or INEX enabled?
	bne.b		fsub_ovfl_ena		# yes

	add.l		&0xc,%sp
fsub_ovfl_dis:
	btst		&neg_bit,FPSR_CC(%a6)	# is result negative?
	sne		%d1			# set sign param accordingly
	mov.l		L_SCR3(%a6),%d0		# pass prec:rnd
	bsr.l		ovf_res			# calculate default result
	or.b		%d0,FPSR_CC(%a6)	# set INF,N if applicable
	fmovm.x		(%a0),&0x80		# return default result in fp0
	mov.l		(%sp)+,%d2		# restore d2
	rts

fsub_ovfl_ena:
	mov.b		L_SCR3(%a6),%d1
	andi.b		&0xc0,%d1		# is precision extended?
	bne.b		fsub_ovfl_ena_sd	# no

fsub_ovfl_ena_cont:
	mov.w		(%sp),%d1		# fetch {sgn,exp}
	andi.w		&0x8000,%d1		# keep sign
	subi.l		&0x6000,%d2		# subtract new bias
	andi.w		&0x7fff,%d2		# clear top bit
	or.w		%d2,%d1			# concat sign,exp
	mov.w		%d1,(%sp)		# insert new exponent

	fmovm.x		(%sp)+,&0x40		# return EXOP in fp1
	bra.b		fsub_ovfl_dis

fsub_ovfl_ena_sd:
	fmovm.x		FP_SCR1(%a6),&0x80	# load dst op

	mov.l		L_SCR3(%a6),%d1
	andi.b		&0x30,%d1		# clear rnd prec
	fmov.l		%d1,%fpcr		# set FPCR

	fsub.x		FP_SCR0(%a6),%fp0	# execute subtract

	fmov.l		&0x0,%fpcr		# clear FPCR

	add.l		&0xc,%sp
	fmovm.x		&0x01,-(%sp)
	bra.b		fsub_ovfl_ena_cont

fsub_unfl:
	bset		&unfl_bit,FPSR_EXCEPT(%a6) # set unfl exc bit

	add.l		&0xc,%sp

	fmovm.x		FP_SCR1(%a6),&0x80	# load dst op
	
	fmov.l		&rz_mode*0x10,%fpcr	# set FPCR
	fmov.l		&0x0,%fpsr		# clear FPSR

	fsub.x		FP_SCR0(%a6),%fp0	# execute subtract

	fmov.l		&0x0,%fpcr		# clear FPCR
	fmov.l		%fpsr,%d1		# save status

	or.l		%d1,USER_FPSR(%a6)

	mov.b		FPCR_ENABLE(%a6),%d1
	andi.b		&0x0b,%d1		# is UNFL or INEX enabled?
	bne.b		fsub_unfl_ena		# yes

fsub_unfl_dis:
	fmovm.x		&0x80,FP_SCR0(%a6)	# store out result

	lea		FP_SCR0(%a6),%a0	# pass: result addr
	mov.l		L_SCR3(%a6),%d1		# pass: rnd prec,mode
	bsr.l		unf_res			# calculate default result
	or.b		%d0,FPSR_CC(%a6)	# 'Z' may have been set
	fmovm.x		FP_SCR0(%a6),&0x80	# return default result in fp0
	mov.l		(%sp)+,%d2		# restore d2
	rts

fsub_unfl_ena:
	fmovm.x		FP_SCR1(%a6),&0x40

	mov.l		L_SCR3(%a6),%d1
	andi.b		&0xc0,%d1		# is precision extended?
	bne.b		fsub_unfl_ena_sd	# no

	fmov.l		L_SCR3(%a6),%fpcr	# set FPCR

fsub_unfl_ena_cont:
	fmov.l		&0x0,%fpsr		# clear FPSR

	fsub.x		FP_SCR0(%a6),%fp1	# execute subtract

	fmov.l		&0x0,%fpcr		# clear FPCR

	fmovm.x		&0x40,FP_SCR0(%a6)	# store result to stack
	mov.w		FP_SCR0_EX(%a6),%d1	# fetch {sgn,exp}
	mov.l		%d1,%d2			# make a copy
	andi.l		&0x7fff,%d1		# strip sign
	andi.w		&0x8000,%d2		# keep old sign
	sub.l		%d0,%d1			# add scale factor
	addi.l		&0x6000,%d1		# subtract new bias
	andi.w		&0x7fff,%d1		# clear top bit
	or.w		%d2,%d1			# concat sgn,exp
	mov.w		%d1,FP_SCR0_EX(%a6)	# insert new exponent
	fmovm.x		FP_SCR0(%a6),&0x40	# return EXOP in fp1
	bra.w		fsub_unfl_dis

fsub_unfl_ena_sd:
	mov.l		L_SCR3(%a6),%d1
	andi.b		&0x30,%d1		# clear rnd prec
	fmov.l		%d1,%fpcr		# set FPCR

	bra.b		fsub_unfl_ena_cont

#
# result is equal to the smallest normalized number in the selected precision
# if the precision is extended, this result could not have come from an 
# underflow that rounded up.
#
fsub_may_unfl:
	mov.l		L_SCR3(%a6),%d1
	andi.b		&0xc0,%d1		# fetch rnd prec
	beq.w		fsub_normal		# yes; no underflow occurred

	mov.l		0x4(%sp),%d1
	cmpi.l		%d1,&0x80000000		# is hi(man) = 0x80000000?
	bne.w		fsub_normal		# no; no underflow occurred

	tst.l		0x8(%sp)		# is lo(man) = 0x0?
	bne.w		fsub_normal		# no; no underflow occurred

	btst		&inex2_bit,FPSR_EXCEPT(%a6) # is INEX2 set?
	beq.w		fsub_normal		# no; no underflow occurred

#
# ok, so now the result has a exponent equal to the smallest normalized
# exponent for the selected precision. also, the mantissa is equal to
# 0x8000000000000000 and this mantissa is the result of rounding non-zero
# g,r,s. 
# now, we must determine whether the pre-rounded result was an underflow
# rounded "up" or a normalized number rounded "down".
# so, we do this be re-executing the add using RZ as the rounding mode and
# seeing if the new result is smaller or equal to the current result.
#
	fmovm.x		FP_SCR1(%a6),&0x40	# load dst op into fp1

	mov.l		L_SCR3(%a6),%d1
	andi.b		&0xc0,%d1		# keep rnd prec
	ori.b		&rz_mode*0x10,%d1	# insert rnd mode
	fmov.l		%d1,%fpcr		# set FPCR
	fmov.l		&0x0,%fpsr		# clear FPSR

	fsub.x		FP_SCR0(%a6),%fp1	# execute subtract

	fmov.l		&0x0,%fpcr		# clear FPCR

	fabs.x		%fp0			# compare absolute values
	fabs.x		%fp1
	fcmp.x		%fp0,%fp1		# is first result > second?

	fbgt.w		fsub_unfl		# yes; it's an underflow
	bra.w		fsub_normal		# no; it's not an underflow

##########################################################################

#
# Sub: inputs are not both normalized; what are they?
#
fsub_not_norm:
	mov.w		(tbl_fsub_op.b,%pc,%d1.w*2),%d1
	jmp		(tbl_fsub_op.b,%pc,%d1.w*1)

	swbeg		&48
tbl_fsub_op:
	short		fsub_norm	- tbl_fsub_op # NORM - NORM
	short		fsub_zero_src	- tbl_fsub_op # NORM - ZERO
	short		fsub_inf_src	- tbl_fsub_op # NORM - INF
	short		fsub_res_qnan	- tbl_fsub_op # NORM - QNAN
	short		fsub_norm	- tbl_fsub_op # NORM - DENORM
	short		fsub_res_snan	- tbl_fsub_op # NORM - SNAN
	short		tbl_fsub_op	- tbl_fsub_op #
	short		tbl_fsub_op	- tbl_fsub_op #

	short		fsub_zero_dst	- tbl_fsub_op # ZERO - NORM
	short		fsub_zero_2	- tbl_fsub_op # ZERO - ZERO
	short		fsub_inf_src	- tbl_fsub_op # ZERO - INF
	short		fsub_res_qnan	- tbl_fsub_op # NORM - QNAN
	short		fsub_zero_dst	- tbl_fsub_op # ZERO - DENORM
	short		fsub_res_snan	- tbl_fsub_op # NORM - SNAN
	short		tbl_fsub_op	- tbl_fsub_op #
	short		tbl_fsub_op	- tbl_fsub_op #

	short		fsub_inf_dst	- tbl_fsub_op # INF - NORM
	short		fsub_inf_dst	- tbl_fsub_op # INF - ZERO
	short		fsub_inf_2	- tbl_fsub_op # INF - INF
	short		fsub_res_qnan	- tbl_fsub_op # NORM - QNAN
	short		fsub_inf_dst	- tbl_fsub_op # INF - DENORM
	short		fsub_res_snan	- tbl_fsub_op # NORM - SNAN
	short		tbl_fsub_op	- tbl_fsub_op #
	short		tbl_fsub_op	- tbl_fsub_op #

	short		fsub_res_qnan	- tbl_fsub_op # QNAN - NORM
	short		fsub_res_qnan	- tbl_fsub_op # QNAN - ZERO
	short		fsub_res_qnan	- tbl_fsub_op # QNAN - INF
	short		fsub_res_qnan	- tbl_fsub_op # QNAN - QNAN
	short		fsub_res_qnan	- tbl_fsub_op # QNAN - DENORM
	short		fsub_res_snan	- tbl_fsub_op # QNAN - SNAN
	short		tbl_fsub_op	- tbl_fsub_op #
	short		tbl_fsub_op	- tbl_fsub_op #

	short		fsub_norm	- tbl_fsub_op # DENORM - NORM
	short		fsub_zero_src	- tbl_fsub_op # DENORM - ZERO
	short		fsub_inf_src	- tbl_fsub_op # DENORM - INF
	short		fsub_res_qnan	- tbl_fsub_op # NORM - QNAN
	short		fsub_norm	- tbl_fsub_op # DENORM - DENORM
	short		fsub_res_snan	- tbl_fsub_op # NORM - SNAN
	short		tbl_fsub_op	- tbl_fsub_op #
	short		tbl_fsub_op	- tbl_fsub_op #

	short		fsub_res_snan	- tbl_fsub_op # SNAN - NORM
	short		fsub_res_snan	- tbl_fsub_op # SNAN - ZERO
	short		fsub_res_snan	- tbl_fsub_op # SNAN - INF
	short		fsub_res_snan	- tbl_fsub_op # SNAN - QNAN
	short		fsub_res_snan	- tbl_fsub_op # SNAN - DENORM
	short		fsub_res_snan	- tbl_fsub_op # SNAN - SNAN
	short		tbl_fsub_op	- tbl_fsub_op #
	short		tbl_fsub_op	- tbl_fsub_op #

fsub_res_qnan:
	bra.l		res_qnan
fsub_res_snan:
	bra.l		res_snan

#
# both operands are ZEROes
#
fsub_zero_2:
	mov.b		SRC_EX(%a0),%d0
	mov.b		DST_EX(%a1),%d1
	eor.b		%d1,%d0
	bpl.b		fsub_zero_2_chk_rm

# the signs are opposite, so, return a ZERO w/ the sign of the dst ZERO
	tst.b		%d0			# is dst negative?
	bmi.b		fsub_zero_2_rm		# yes
	fmov.s		&0x00000000,%fp0	# no; return +ZERO
	mov.b		&z_bmask,FPSR_CC(%a6)	# set Z
	rts

#
# the ZEROes have the same signs:
# - therefore, we return +ZERO if the rounding mode is RN,RZ, or RP
# - -ZERO is returned in the case of RM.
#
fsub_zero_2_chk_rm:
	mov.b		3+L_SCR3(%a6),%d1
	andi.b		&0x30,%d1		# extract rnd mode
	cmpi.b		%d1,&rm_mode*0x10	# is rnd mode = RM?
	beq.b		fsub_zero_2_rm		# yes
	fmov.s		&0x00000000,%fp0	# no; return +ZERO
	mov.b		&z_bmask,FPSR_CC(%a6)	# set Z
	rts

fsub_zero_2_rm:
	fmov.s		&0x80000000,%fp0	# return -ZERO
	mov.b		&z_bmask+neg_bmask,FPSR_CC(%a6)	# set Z/NEG
	rts

#
# one operand is a ZERO and the other is a DENORM or a NORM.
# scale the DENORM or NORM and jump to the regular fsub routine.
#
fsub_zero_dst:
	mov.w		SRC_EX(%a0),FP_SCR0_EX(%a6)
	mov.l		SRC_HI(%a0),FP_SCR0_HI(%a6)
	mov.l		SRC_LO(%a0),FP_SCR0_LO(%a6)
	bsr.l		scale_to_zero_src	# scale the operand
	clr.w		FP_SCR1_EX(%a6)
	clr.l		FP_SCR1_HI(%a6)
	clr.l		FP_SCR1_LO(%a6)
	bra.w		fsub_zero_entry		# go execute fsub

fsub_zero_src:
	mov.w		DST_EX(%a1),FP_SCR1_EX(%a6)
	mov.l		DST_HI(%a1),FP_SCR1_HI(%a6)
	mov.l		DST_LO(%a1),FP_SCR1_LO(%a6)
	bsr.l		scale_to_zero_dst	# scale the operand
	clr.w		FP_SCR0_EX(%a6)
	clr.l		FP_SCR0_HI(%a6)
	clr.l		FP_SCR0_LO(%a6)
	bra.w		fsub_zero_entry		# go execute fsub

#
# both operands are INFs. an OPERR will result if the INFs have the
# same signs. else, 
#
fsub_inf_2:
	mov.b		SRC_EX(%a0),%d0		# exclusive or the signs
	mov.b		DST_EX(%a1),%d1
	eor.b		%d1,%d0
	bpl.l		res_operr		# weed out (-INF)+(+INF)

# ok, so it's not an OPERR. but we do have to remember to return
# the src INF since that's where the 881/882 gets the j-bit.

fsub_inf_src:
	fmovm.x		SRC(%a0),&0x80		# return src INF
	fneg.x		%fp0			# invert sign
	fbge.w		fsub_inf_done		# sign is now positive
	mov.b		&neg_bmask+inf_bmask,FPSR_CC(%a6) # set INF/NEG	
	rts

fsub_inf_dst:
	fmovm.x		DST(%a1),&0x80		# return dst INF
	tst.b		DST_EX(%a1)		# is INF negative?
	bpl.b		fsub_inf_done		# no
	mov.b		&neg_bmask+inf_bmask,FPSR_CC(%a6) # set INF/NEG
	rts

fsub_inf_done:
	mov.b		&inf_bmask,FPSR_CC(%a6)	# set INF
	rts

#########################################################################
# XDEF ****************************************************************	#
# 	fsqrt(): emulates the fsqrt instruction				#
#	fssqrt(): emulates the fssqrt instruction			#
#	fdsqrt(): emulates the fdsqrt instruction			#
#									#
# XREF ****************************************************************	#
#	scale_sqrt() - scale the source operand				#
#	unf_res() - return default underflow result			#
#	ovf_res() - return default overflow result			#
# 	res_qnan_1op() - return QNAN result				#
# 	res_snan_1op() - return SNAN result				#
#									#
# INPUT ***************************************************************	#
#	a0 = pointer to extended precision source operand		#
#	d0  rnd prec,mode						#
#									#
# OUTPUT **************************************************************	#
#	fp0 = result							#
#	fp1 = EXOP (if exception occurred)				#
#									#
# ALGORITHM ***********************************************************	#
#	Handle NANs, infinities, and zeroes as special cases. Divide	#
# norms/denorms into ext/sgl/dbl precision.				#
#	For norms/denorms, scale the exponents such that a sqrt		#
# instruction won't cause an exception. Use the regular fsqrt to	#
# compute a result. Check if the regular operands would have taken	#
# an exception. If so, return the default overflow/underflow result	#
# and return the EXOP if exceptions are enabled. Else, scale the 	#
# result operand to the proper exponent.				#
#									#
#########################################################################

	global		fssqrt
fssqrt:
	andi.b		&0x30,%d0		# clear rnd prec
	ori.b		&s_mode*0x10,%d0	# insert sgl precision
	bra.b		fsqrt

	global		fdsqrt
fdsqrt:
	andi.b		&0x30,%d0		# clear rnd prec
	ori.b		&d_mode*0x10,%d0	# insert dbl precision

	global		fsqrt
fsqrt:
	mov.l		%d0,L_SCR3(%a6)		# store rnd info
	clr.w		%d1
	mov.b		STAG(%a6),%d1
	bne.w		fsqrt_not_norm		# optimize on non-norm input
		
#
# SQUARE ROOT: norms and denorms ONLY!
#
fsqrt_norm:
	tst.b		SRC_EX(%a0)		# is operand negative?
	bmi.l		res_operr		# yes

	andi.b		&0xc0,%d0		# is precision extended?
	bne.b		fsqrt_not_ext		# no; go handle sgl or dbl

	fmov.l		L_SCR3(%a6),%fpcr	# set FPCR
	fmov.l		&0x0,%fpsr		# clear FPSR

	fsqrt.x		(%a0),%fp0		# execute square root

	fmov.l		%fpsr,%d1
	or.l		%d1,USER_FPSR(%a6)	# set N,INEX

	rts

fsqrt_denorm:
	tst.b		SRC_EX(%a0)		# is operand negative?
	bmi.l		res_operr		# yes

	andi.b		&0xc0,%d0		# is precision extended?
	bne.b		fsqrt_not_ext		# no; go handle sgl or dbl

	mov.w		SRC_EX(%a0),FP_SCR0_EX(%a6)
	mov.l		SRC_HI(%a0),FP_SCR0_HI(%a6)
	mov.l		SRC_LO(%a0),FP_SCR0_LO(%a6)

	bsr.l		scale_sqrt		# calculate scale factor

	bra.w		fsqrt_sd_normal

#
# operand is either single or double
#
fsqrt_not_ext:
	cmpi.b		%d0,&s_mode*0x10	# separate sgl/dbl prec
	bne.w		fsqrt_dbl

#
# operand is to be rounded to single precision
#
fsqrt_sgl:
	mov.w		SRC_EX(%a0),FP_SCR0_EX(%a6)
	mov.l		SRC_HI(%a0),FP_SCR0_HI(%a6)
	mov.l		SRC_LO(%a0),FP_SCR0_LO(%a6)

	bsr.l		scale_sqrt		# calculate scale factor

	cmpi.l		%d0,&0x3fff-0x3f81	# will move in underflow?
	beq.w		fsqrt_sd_may_unfl
	bgt.w		fsqrt_sd_unfl		# yes; go handle underflow
	cmpi.l		%d0,&0x3fff-0x407f	# will move in overflow?
	beq.w		fsqrt_sd_may_ovfl	# maybe; go check
	blt.w		fsqrt_sd_ovfl		# yes; go handle overflow

#
# operand will NOT overflow or underflow when moved in to the fp reg file
#
fsqrt_sd_normal:
	fmov.l		&0x0,%fpsr		# clear FPSR
	fmov.l		L_SCR3(%a6),%fpcr	# set FPCR

	fsqrt.x		FP_SCR0(%a6),%fp0	# perform absolute

	fmov.l		%fpsr,%d1		# save FPSR
	fmov.l		&0x0,%fpcr		# clear FPCR

	or.l		%d1,USER_FPSR(%a6)	# save INEX2,N

fsqrt_sd_normal_exit:
	mov.l		%d2,-(%sp)		# save d2
	fmovm.x		&0x80,FP_SCR0(%a6)	# store out result
	mov.w		FP_SCR0_EX(%a6),%d1	# load sgn,exp
	mov.l		%d1,%d2			# make a copy
	andi.l		&0x7fff,%d1		# strip sign
	sub.l		%d0,%d1			# add scale factor
	andi.w		&0x8000,%d2		# keep old sign
	or.w		%d1,%d2			# concat old sign,new exp
	mov.w		%d2,FP_SCR0_EX(%a6)	# insert new exponent
	mov.l		(%sp)+,%d2		# restore d2
	fmovm.x		FP_SCR0(%a6),&0x80	# return result in fp0
	rts

#
# operand is to be rounded to double precision
#
fsqrt_dbl:
	mov.w		SRC_EX(%a0),FP_SCR0_EX(%a6)
	mov.l		SRC_HI(%a0),FP_SCR0_HI(%a6)
	mov.l		SRC_LO(%a0),FP_SCR0_LO(%a6)

	bsr.l		scale_sqrt		# calculate scale factor

	cmpi.l		%d0,&0x3fff-0x3c01	# will move in underflow?
	beq.w		fsqrt_sd_may_unfl
	bgt.b		fsqrt_sd_unfl		# yes; go handle underflow
	cmpi.l		%d0,&0x3fff-0x43ff	# will move in overflow?
	beq.w		fsqrt_sd_may_ovfl	# maybe; go check
	blt.w		fsqrt_sd_ovfl		# yes; go handle overflow
	bra.w		fsqrt_sd_normal		# no; ho handle normalized op

# we're on the line here and the distinguising characteristic is whether
# the exponent is 3fff or 3ffe. if it's 3ffe, then it's a safe number
# elsewise fall through to underflow.
fsqrt_sd_may_unfl:
	btst		&0x0,1+FP_SCR0_EX(%a6)	# is exponent 0x3fff?
	bne.w		fsqrt_sd_normal		# yes, so no underflow

#
# operand WILL underflow when moved in to the fp register file
#
fsqrt_sd_unfl:
	bset		&unfl_bit,FPSR_EXCEPT(%a6) # set unfl exc bit

	fmov.l		&rz_mode*0x10,%fpcr	# set FPCR
	fmov.l		&0x0,%fpsr		# clear FPSR

	fsqrt.x 	FP_SCR0(%a6),%fp0	# execute square root

	fmov.l		%fpsr,%d1		# save status
	fmov.l		&0x0,%fpcr		# clear FPCR

	or.l		%d1,USER_FPSR(%a6)	# save INEX2,N

# if underflow or inexact is enabled, go calculate EXOP first.
	mov.b		FPCR_ENABLE(%a6),%d1
	andi.b		&0x0b,%d1		# is UNFL or INEX enabled?
	bne.b		fsqrt_sd_unfl_ena	# yes

fsqrt_sd_unfl_dis:
	fmovm.x		&0x80,FP_SCR0(%a6)	# store out result

	lea		FP_SCR0(%a6),%a0	# pass: result addr
	mov.l		L_SCR3(%a6),%d1		# pass: rnd prec,mode
	bsr.l		unf_res			# calculate default result
	or.b		%d0,FPSR_CC(%a6)	# set possible 'Z' ccode
	fmovm.x		FP_SCR0(%a6),&0x80	# return default result in fp0
	rts	

#
# operand will underflow AND underflow is enabled. 
# therefore, we must return the result rounded to extended precision.
#
fsqrt_sd_unfl_ena:
	mov.l		FP_SCR0_HI(%a6),FP_SCR1_HI(%a6)
	mov.l		FP_SCR0_LO(%a6),FP_SCR1_LO(%a6)
	mov.w		FP_SCR0_EX(%a6),%d1	# load current exponent

	mov.l		%d2,-(%sp)		# save d2
	mov.l		%d1,%d2			# make a copy
	andi.l		&0x7fff,%d1		# strip sign
	andi.w		&0x8000,%d2		# keep old sign
	sub.l		%d0,%d1			# subtract scale factor
	addi.l		&0x6000,%d1		# add new bias
	andi.w		&0x7fff,%d1
	or.w		%d2,%d1			# concat new sign,new exp
	mov.w		%d1,FP_SCR1_EX(%a6)	# insert new exp
	fmovm.x		FP_SCR1(%a6),&0x40	# return EXOP in fp1
	mov.l		(%sp)+,%d2		# restore d2
	bra.b		fsqrt_sd_unfl_dis

#
# operand WILL overflow.
#
fsqrt_sd_ovfl:
	fmov.l		&0x0,%fpsr		# clear FPSR
	fmov.l		L_SCR3(%a6),%fpcr	# set FPCR

	fsqrt.x		FP_SCR0(%a6),%fp0	# perform square root

	fmov.l		&0x0,%fpcr		# clear FPCR
	fmov.l		%fpsr,%d1		# save FPSR

	or.l		%d1,USER_FPSR(%a6)	# save INEX2,N

fsqrt_sd_ovfl_tst:
	or.l		&ovfl_inx_mask,USER_FPSR(%a6) # set ovfl/aovfl/ainex

	mov.b		FPCR_ENABLE(%a6),%d1
	andi.b		&0x13,%d1		# is OVFL or INEX enabled?
	bne.b		fsqrt_sd_ovfl_ena	# yes

#
# OVFL is not enabled; therefore, we must create the default result by
# calling ovf_res().
#
fsqrt_sd_ovfl_dis:
	btst		&neg_bit,FPSR_CC(%a6)	# is result negative?
	sne		%d1			# set sign param accordingly
	mov.l		L_SCR3(%a6),%d0		# pass: prec,mode
	bsr.l		ovf_res			# calculate default result
	or.b		%d0,FPSR_CC(%a6)	# set INF,N if applicable
	fmovm.x		(%a0),&0x80		# return default result in fp0
	rts

#
# OVFL is enabled.
# the INEX2 bit has already been updated by the round to the correct precision.
# now, round to extended(and don't alter the FPSR).
#
fsqrt_sd_ovfl_ena:
	mov.l		%d2,-(%sp)		# save d2
	mov.w		FP_SCR0_EX(%a6),%d1	# fetch {sgn,exp}
	mov.l		%d1,%d2			# make a copy
	andi.l		&0x7fff,%d1		# strip sign
	andi.w		&0x8000,%d2		# keep old sign
	sub.l		%d0,%d1			# add scale factor
	subi.l		&0x6000,%d1		# subtract bias
	andi.w		&0x7fff,%d1
	or.w		%d2,%d1			# concat sign,exp
	mov.w		%d1,FP_SCR0_EX(%a6)	# insert new exponent
	fmovm.x		FP_SCR0(%a6),&0x40	# return EXOP in fp1
	mov.l		(%sp)+,%d2		# restore d2
	bra.b		fsqrt_sd_ovfl_dis

#
# the move in MAY underflow. so...
#
fsqrt_sd_may_ovfl:
	btst		&0x0,1+FP_SCR0_EX(%a6)	# is exponent 0x3fff?
	bne.w		fsqrt_sd_ovfl		# yes, so overflow

	fmov.l		&0x0,%fpsr		# clear FPSR
	fmov.l		L_SCR3(%a6),%fpcr	# set FPCR

	fsqrt.x		FP_SCR0(%a6),%fp0	# perform absolute

	fmov.l		%fpsr,%d1		# save status
	fmov.l		&0x0,%fpcr		# clear FPCR

	or.l		%d1,USER_FPSR(%a6)	# save INEX2,N

	fmov.x		%fp0,%fp1		# make a copy of result
	fcmp.b		%fp1,&0x1		# is |result| >= 1.b?
	fbge.w		fsqrt_sd_ovfl_tst	# yes; overflow has occurred

# no, it didn't overflow; we have correct result
	bra.w		fsqrt_sd_normal_exit

##########################################################################

#
# input is not normalized; what is it?
#
fsqrt_not_norm:
	cmpi.b		%d1,&DENORM		# weed out DENORM
	beq.w		fsqrt_denorm
	cmpi.b		%d1,&ZERO		# weed out ZERO
	beq.b		fsqrt_zero
	cmpi.b		%d1,&INF		# weed out INF
	beq.b		fsqrt_inf
	cmpi.b		%d1,&SNAN		# weed out SNAN
	beq.l		res_snan_1op
	bra.l		res_qnan_1op

#
# 	fsqrt(+0) = +0
# 	fsqrt(-0) = -0
#	fsqrt(+INF) = +INF
# 	fsqrt(-INF) = OPERR
#
fsqrt_zero:
	tst.b		SRC_EX(%a0)		# is ZERO positive or negative?
	bmi.b		fsqrt_zero_m		# negative
fsqrt_zero_p:	
	fmov.s		&0x00000000,%fp0	# return +ZERO
	mov.b		&z_bmask,FPSR_CC(%a6)	# set 'Z' ccode bit
	rts
fsqrt_zero_m:
	fmov.s		&0x80000000,%fp0	# return -ZERO
	mov.b		&z_bmask+neg_bmask,FPSR_CC(%a6)	# set 'Z','N' ccode bits
	rts

fsqrt_inf:
	tst.b		SRC_EX(%a0)		# is INF positive or negative?
	bmi.l		res_operr		# negative
fsqrt_inf_p:
	fmovm.x		SRC(%a0),&0x80		# return +INF in fp0
	mov.b		&inf_bmask,FPSR_CC(%a6)	# set 'I' ccode bit
	rts

##########################################################################

#########################################################################
# XDEF ****************************************************************	#
#	addsub_scaler2(): scale inputs to fadd/fsub such that no	#
#			  OVFL/UNFL exceptions will result		#
#									#
# XREF ****************************************************************	#
#	norm() - normalize mantissa after adjusting exponent		#
#									#
# INPUT ***************************************************************	#
#	FP_SRC(a6) = fp op1(src)					#
#	FP_DST(a6) = fp op2(dst)					#
# 									#
# OUTPUT **************************************************************	#
#	FP_SRC(a6) = fp op1 scaled(src)					#
#	FP_DST(a6) = fp op2 scaled(dst)					#
#	d0         = scale amount					#
#									#
# ALGORITHM ***********************************************************	#
# 	If the DST exponent is > the SRC exponent, set the DST exponent	#
# equal to 0x3fff and scale the SRC exponent by the value that the	#
# DST exponent was scaled by. If the SRC exponent is greater or equal,	#
# do the opposite. Return this scale factor in d0.			#
#	If the two exponents differ by > the number of mantissa bits	#
# plus two, then set the smallest exponent to a very small value as a	#
# quick shortcut.							#
#									#
#########################################################################

	global		addsub_scaler2
addsub_scaler2:
	mov.l		SRC_HI(%a0),FP_SCR0_HI(%a6)
	mov.l		DST_HI(%a1),FP_SCR1_HI(%a6)
	mov.l		SRC_LO(%a0),FP_SCR0_LO(%a6)
	mov.l		DST_LO(%a1),FP_SCR1_LO(%a6)
	mov.w		SRC_EX(%a0),%d0
	mov.w		DST_EX(%a1),%d1
	mov.w		%d0,FP_SCR0_EX(%a6)
	mov.w		%d1,FP_SCR1_EX(%a6)

	andi.w		&0x7fff,%d0
	andi.w		&0x7fff,%d1
	mov.w		%d0,L_SCR1(%a6)		# store src exponent
	mov.w		%d1,2+L_SCR1(%a6)	# store dst exponent

	cmp.w		%d0, %d1		# is src exp >= dst exp?
	bge.l		src_exp_ge2

# dst exp is >  src exp; scale dst to exp = 0x3fff
dst_exp_gt2:
	bsr.l		scale_to_zero_dst
	mov.l		%d0,-(%sp)		# save scale factor

	cmpi.b		STAG(%a6),&DENORM	# is dst denormalized?
	bne.b		cmpexp12

	lea		FP_SCR0(%a6),%a0
	bsr.l		norm			# normalize the denorm; result is new exp
	neg.w		%d0			# new exp = -(shft val)
	mov.w		%d0,L_SCR1(%a6)		# inset new exp

cmpexp12:
	mov.w		2+L_SCR1(%a6),%d0
	subi.w		&mantissalen+2,%d0	# subtract mantissalen+2 from larger exp

	cmp.w		%d0,L_SCR1(%a6)		# is difference >= len(mantissa)+2?
	bge.b		quick_scale12

	mov.w		L_SCR1(%a6),%d0
	add.w		0x2(%sp),%d0		# scale src exponent by scale factor
	mov.w		FP_SCR0_EX(%a6),%d1
	and.w		&0x8000,%d1
	or.w		%d1,%d0			# concat {sgn,new exp}
	mov.w		%d0,FP_SCR0_EX(%a6)	# insert new dst exponent

	mov.l		(%sp)+,%d0		# return SCALE factor
	rts

quick_scale12:
	andi.w		&0x8000,FP_SCR0_EX(%a6)	# zero src exponent
	bset		&0x0,1+FP_SCR0_EX(%a6)	# set exp = 1

	mov.l		(%sp)+,%d0		# return SCALE factor	
	rts

# src exp is >= dst exp; scale src to exp = 0x3fff
src_exp_ge2:
	bsr.l		scale_to_zero_src
	mov.l		%d0,-(%sp)		# save scale factor

	cmpi.b		DTAG(%a6),&DENORM	# is dst denormalized?
	bne.b		cmpexp22
	lea		FP_SCR1(%a6),%a0
	bsr.l		norm			# normalize the denorm; result is new exp
	neg.w		%d0			# new exp = -(shft val)
	mov.w		%d0,2+L_SCR1(%a6)	# inset new exp

cmpexp22:
	mov.w		L_SCR1(%a6),%d0
	subi.w		&mantissalen+2,%d0	# subtract mantissalen+2 from larger exp

	cmp.w		%d0,2+L_SCR1(%a6)	# is difference >= len(mantissa)+2?
	bge.b		quick_scale22

	mov.w		2+L_SCR1(%a6),%d0
	add.w		0x2(%sp),%d0		# scale dst exponent by scale factor
	mov.w		FP_SCR1_EX(%a6),%d1
	andi.w		&0x8000,%d1
	or.w		%d1,%d0			# concat {sgn,new exp}
	mov.w		%d0,FP_SCR1_EX(%a6)	# insert new dst exponent

	mov.l		(%sp)+,%d0		# return SCALE factor
	rts

quick_scale22:
	andi.w		&0x8000,FP_SCR1_EX(%a6)	# zero dst exponent
	bset		&0x0,1+FP_SCR1_EX(%a6)	# set exp = 1

	mov.l		(%sp)+,%d0		# return SCALE factor	
	rts

##########################################################################

#########################################################################
# XDEF ****************************************************************	#
#	scale_to_zero_src(): scale the exponent of extended precision	#
#			     value at FP_SCR0(a6).			#
#									#
# XREF ****************************************************************	#
#	norm() - normalize the mantissa if the operand was a DENORM	#
#									#
# INPUT ***************************************************************	#
#	FP_SCR0(a6) = extended precision operand to be scaled		#
# 									#
# OUTPUT **************************************************************	#
#	FP_SCR0(a6) = scaled extended precision operand			#
#	d0	    = scale value					#
#									#
# ALGORITHM ***********************************************************	#
# 	Set the exponent of the input operand to 0x3fff. Save the value	#
# of the difference between the original and new exponent. Then, 	#
# normalize the operand if it was a DENORM. Add this normalization	#
# value to the previous value. Return the result.			#
#									#
#########################################################################

	global		scale_to_zero_src
scale_to_zero_src:
	mov.w		FP_SCR0_EX(%a6),%d1	# extract operand's {sgn,exp}
	mov.w		%d1,%d0			# make a copy

	andi.l		&0x7fff,%d1		# extract operand's exponent

	andi.w		&0x8000,%d0		# extract operand's sgn
	or.w		&0x3fff,%d0		# insert new operand's exponent(=0)

	mov.w		%d0,FP_SCR0_EX(%a6)	# insert biased exponent

	cmpi.b		STAG(%a6),&DENORM	# is operand normalized?
	beq.b		stzs_denorm		# normalize the DENORM

stzs_norm:
	mov.l		&0x3fff,%d0
	sub.l		%d1,%d0			# scale = BIAS + (-exp)

	rts

stzs_denorm:
	lea		FP_SCR0(%a6),%a0	# pass ptr to src op
	bsr.l		norm			# normalize denorm
	neg.l		%d0			# new exponent = -(shft val)
	mov.l		%d0,%d1			# prepare for op_norm call
	bra.b		stzs_norm		# finish scaling

###

#########################################################################
# XDEF ****************************************************************	#
#	scale_sqrt(): scale the input operand exponent so a subsequent	#
#		      fsqrt operation won't take an exception.		#
#									#
# XREF ****************************************************************	#
#	norm() - normalize the mantissa if the operand was a DENORM	#
#									#
# INPUT ***************************************************************	#
#	FP_SCR0(a6) = extended precision operand to be scaled		#
# 									#
# OUTPUT **************************************************************	#
#	FP_SCR0(a6) = scaled extended precision operand			#
#	d0	    = scale value					#
#									#
# ALGORITHM ***********************************************************	#
#	If the input operand is a DENORM, normalize it.			#
# 	If the exponent of the input operand is even, set the exponent	#
# to 0x3ffe and return a scale factor of "(exp-0x3ffe)/2". If the 	#
# exponent of the input operand is off, set the exponent to ox3fff and	#
# return a scale factor of "(exp-0x3fff)/2". 				#
#									#
#########################################################################

	global		scale_sqrt
scale_sqrt:
	cmpi.b		STAG(%a6),&DENORM	# is operand normalized?
	beq.b		ss_denorm		# normalize the DENORM

	mov.w		FP_SCR0_EX(%a6),%d1	# extract operand's {sgn,exp}
	andi.l		&0x7fff,%d1		# extract operand's exponent

	andi.w		&0x8000,FP_SCR0_EX(%a6)	# extract operand's sgn

	btst		&0x0,%d1		# is exp even or odd?
	beq.b		ss_norm_even

	ori.w		&0x3fff,FP_SCR0_EX(%a6)	# insert new operand's exponent(=0)

	mov.l		&0x3fff,%d0
	sub.l		%d1,%d0			# scale = BIAS + (-exp)
	asr.l		&0x1,%d0		# divide scale factor by 2
	rts

ss_norm_even:
	ori.w		&0x3ffe,FP_SCR0_EX(%a6)	# insert new operand's exponent(=0)

	mov.l		&0x3ffe,%d0
	sub.l		%d1,%d0			# scale = BIAS + (-exp)
	asr.l		&0x1,%d0		# divide scale factor by 2
	rts

ss_denorm:
	lea		FP_SCR0(%a6),%a0	# pass ptr to src op
	bsr.l		norm			# normalize denorm

	btst		&0x0,%d0		# is exp even or odd?
	beq.b		ss_denorm_even

	ori.w		&0x3fff,FP_SCR0_EX(%a6)	# insert new operand's exponent(=0)

	add.l		&0x3fff,%d0
	asr.l		&0x1,%d0		# divide scale factor by 2
	rts

ss_denorm_even:
	ori.w		&0x3ffe,FP_SCR0_EX(%a6)	# insert new operand's exponent(=0)

	add.l		&0x3ffe,%d0
	asr.l		&0x1,%d0		# divide scale factor by 2
	rts

###

#########################################################################
# XDEF ****************************************************************	#
#	scale_to_zero_dst(): scale the exponent of extended precision	#
#			     value at FP_SCR1(a6).			#
#									#
# XREF ****************************************************************	#
#	norm() - normalize the mantissa if the operand was a DENORM	#
#									#
# INPUT ***************************************************************	#
#	FP_SCR1(a6) = extended precision operand to be scaled		#
# 									#
# OUTPUT **************************************************************	#
#	FP_SCR1(a6) = scaled extended precision operand			#
#	d0	    = scale value					#
#									#
# ALGORITHM ***********************************************************	#
# 	Set the exponent of the input operand to 0x3fff. Save the value	#
# of the difference between the original and new exponent. Then, 	#
# normalize the operand if it was a DENORM. Add this normalization	#
# value to the previous value. Return the result.			#
#									#
#########################################################################

	global		scale_to_zero_dst
scale_to_zero_dst:
	mov.w		FP_SCR1_EX(%a6),%d1	# extract operand's {sgn,exp}
	mov.w		%d1,%d0			# make a copy

	andi.l		&0x7fff,%d1		# extract operand's exponent

	andi.w		&0x8000,%d0		# extract operand's sgn
	or.w		&0x3fff,%d0		# insert new operand's exponent(=0)

	mov.w		%d0,FP_SCR1_EX(%a6)	# insert biased exponent

	cmpi.b		DTAG(%a6),&DENORM	# is operand normalized?
	beq.b		stzd_denorm		# normalize the DENORM

stzd_norm:
	mov.l		&0x3fff,%d0
	sub.l		%d1,%d0			# scale = BIAS + (-exp)
	rts

stzd_denorm:
	lea		FP_SCR1(%a6),%a0	# pass ptr to dst op
	bsr.l		norm			# normalize denorm
	neg.l		%d0			# new exponent = -(shft val)
	mov.l		%d0,%d1			# prepare for op_norm call
	bra.b		stzd_norm		# finish scaling

##########################################################################

#########################################################################
# XDEF ****************************************************************	#
#	res_qnan(): return default result w/ QNAN operand for dyadic	#
#	res_snan(): return default result w/ SNAN operand for dyadic	#
#	res_qnan_1op(): return dflt result w/ QNAN operand for monadic	#
#	res_snan_1op(): return dflt result w/ SNAN operand for monadic	#
#									#
# XREF ****************************************************************	#
#	None								#
#									#
# INPUT ***************************************************************	#
#	FP_SRC(a6) = pointer to extended precision src operand		#
#	FP_DST(a6) = pointer to extended precision dst operand		#
# 									#
# OUTPUT **************************************************************	#
#	fp0 = default result						#
#									#
# ALGORITHM ***********************************************************	#
# 	If either operand (but not both operands) of an operation is a	#
# nonsignalling NAN, then that NAN is returned as the result. If both	#
# operands are nonsignalling NANs, then the destination operand 	#
# nonsignalling NAN is returned as the result.				#
# 	If either operand to an operation is a signalling NAN (SNAN),	#
# then, the SNAN bit is set in the FPSR EXC byte. If the SNAN trap	#
# enable bit is set in the FPCR, then the trap is taken and the 	#
# destination is not modified. If the SNAN trap enable bit is not set,	#
# then the SNAN is converted to a nonsignalling NAN (by setting the 	#
# SNAN bit in the operand to one), and the operation continues as 	#
# described in the preceding paragraph, for nonsignalling NANs.		#
#	Make sure the appropriate FPSR bits are set before exiting.	#
#									#
#########################################################################

	global		res_qnan
	global		res_snan
res_qnan:
res_snan:
	cmp.b		DTAG(%a6), &SNAN	# is the dst an SNAN?
	beq.b		dst_snan2
	cmp.b		DTAG(%a6), &QNAN	# is the dst a  QNAN?
	beq.b		dst_qnan2
src_nan:
	cmp.b		STAG(%a6), &QNAN
	beq.b		src_qnan2
	global		res_snan_1op
res_snan_1op:
src_snan2:
	bset		&0x6, FP_SRC_HI(%a6)	# set SNAN bit
	or.l		&nan_mask+aiop_mask+snan_mask, USER_FPSR(%a6)
	lea		FP_SRC(%a6), %a0
	bra.b		nan_comp
	global		res_qnan_1op
res_qnan_1op:
src_qnan2:
	or.l		&nan_mask, USER_FPSR(%a6)
	lea		FP_SRC(%a6), %a0
	bra.b		nan_comp
dst_snan2:
	or.l		&nan_mask+aiop_mask+snan_mask, USER_FPSR(%a6)
	bset		&0x6, FP_DST_HI(%a6)	# set SNAN bit
	lea		FP_DST(%a6), %a0
	bra.b		nan_comp
dst_qnan2:
	lea		FP_DST(%a6), %a0
	cmp.b		STAG(%a6), &SNAN
	bne		nan_done
	or.l		&aiop_mask+snan_mask, USER_FPSR(%a6)	
nan_done:
	or.l		&nan_mask, USER_FPSR(%a6)
nan_comp:
	btst		&0x7, FTEMP_EX(%a0)	# is NAN neg?
	beq.b		nan_not_neg
	or.l		&neg_mask, USER_FPSR(%a6)
nan_not_neg:
	fmovm.x		(%a0), &0x80
	rts

#########################################################################
# XDEF ****************************************************************	#
# 	res_operr(): return default result during operand error		#
#									#
# XREF ****************************************************************	#
#	None								#
#									#
# INPUT ***************************************************************	#
#	None								#
# 									#
# OUTPUT **************************************************************	#
#	fp0 = default operand error result				#
#									#
# ALGORITHM ***********************************************************	#
#	An nonsignalling NAN is returned as the default result when	#
# an operand error occurs for the following cases:			#
#									#
# 	Multiply: (Infinity x Zero)					#
# 	Divide  : (Zero / Zero) || (Infinity / Infinity)		#
#									#
#########################################################################

	global		res_operr
res_operr:
	or.l		&nan_mask+operr_mask+aiop_mask, USER_FPSR(%a6)
	fmovm.x		nan_return(%pc), &0x80
	rts

nan_return:	
	long		0x7fff0000, 0xffffffff, 0xffffffff

#########################################################################
# fdbcc(): routine to emulate the fdbcc instruction			#
#									#
# XDEF **************************************************************** #
#	_fdbcc()							#
#									#
# XREF **************************************************************** #
#	fetch_dreg() - fetch Dn value					#
#	store_dreg_l() - store updated Dn value				#
#									#
# INPUT ***************************************************************	#
#	d0 = displacement						#
#									#
# OUTPUT ************************************************************** #
#	none								#
#									#
# ALGORITHM ***********************************************************	#
#	This routine checks which conditional predicate is specified by	#
# the stacked fdbcc instruction opcode and then branches to a routine	#
# for that predicate. The corresponding fbcc instruction is then used	#
# to see whether the condition (specified by the stacked FPSR) is true	#
# or false.								#
#	If a BSUN exception should be indicated, the BSUN and ABSUN	#
# bits are set in the stacked FPSR. If the BSUN exception is enabled,	#
# the fbsun_flg is set in the SPCOND_FLG location on the stack. If an 	#
# enabled BSUN should not be flagged and the predicate is true, then	#
# Dn is fetched and decremented by one. If Dn is not equal to -1, add	#
# the displacement value to the stacked PC so that when an "rte" is	#
# finally executed, the branch occurs.					#
#									#
#########################################################################
	global		_fdbcc
_fdbcc:
	mov.l		%d0,L_SCR1(%a6)		# save displacement

	mov.w		EXC_CMDREG(%a6),%d0	# fetch predicate

	clr.l		%d1			# clear scratch reg
	mov.b		FPSR_CC(%a6),%d1	# fetch fp ccodes
	ror.l		&0x8,%d1		# rotate to top byte
	fmov.l		%d1,%fpsr		# insert into FPSR

	mov.w		(tbl_fdbcc.b,%pc,%d0.w*2),%d1 # load table 
	jmp		(tbl_fdbcc.b,%pc,%d1.w) # jump to fdbcc routine

tbl_fdbcc:
	short		fdbcc_f		-	tbl_fdbcc	# 00
	short		fdbcc_eq	-	tbl_fdbcc	# 01
	short		fdbcc_ogt	-	tbl_fdbcc	# 02
	short		fdbcc_oge	-	tbl_fdbcc	# 03
	short		fdbcc_olt	-	tbl_fdbcc	# 04
	short		fdbcc_ole	-	tbl_fdbcc	# 05
	short		fdbcc_ogl	-	tbl_fdbcc	# 06
	short		fdbcc_or	-	tbl_fdbcc	# 07
	short		fdbcc_un	-	tbl_fdbcc	# 08
	short		fdbcc_ueq	-	tbl_fdbcc	# 09
	short		fdbcc_ugt	-	tbl_fdbcc	# 10
	short		fdbcc_uge	-	tbl_fdbcc	# 11
	short		fdbcc_ult	-	tbl_fdbcc	# 12
	short		fdbcc_ule	-	tbl_fdbcc	# 13
	short		fdbcc_neq	-	tbl_fdbcc	# 14
	short		fdbcc_t		-	tbl_fdbcc	# 15
	short		fdbcc_sf	-	tbl_fdbcc	# 16
	short		fdbcc_seq	-	tbl_fdbcc	# 17
	short		fdbcc_gt	-	tbl_fdbcc	# 18
	short		fdbcc_ge	-	tbl_fdbcc	# 19
	short		fdbcc_lt	-	tbl_fdbcc	# 20
	short		fdbcc_le	-	tbl_fdbcc	# 21
	short		fdbcc_gl	-	tbl_fdbcc	# 22
	short		fdbcc_gle	-	tbl_fdbcc	# 23
	short		fdbcc_ngle	-	tbl_fdbcc	# 24
	short		fdbcc_ngl	-	tbl_fdbcc	# 25
	short		fdbcc_nle	-	tbl_fdbcc	# 26
	short		fdbcc_nlt	-	tbl_fdbcc	# 27
	short		fdbcc_nge	-	tbl_fdbcc	# 28
	short		fdbcc_ngt	-	tbl_fdbcc	# 29
	short		fdbcc_sneq	-	tbl_fdbcc	# 30
	short		fdbcc_st	-	tbl_fdbcc	# 31

#########################################################################
#									#
# IEEE Nonaware tests							#
#									#
# For the IEEE nonaware tests, only the false branch changes the 	#
# counter. However, the true branch may set bsun so we check to see	#
# if the NAN bit is set, in which case BSUN and AIOP will be set.	#
#									#
# The cases EQ and NE are shared by the Aware and Nonaware groups	#
# and are incapable of setting the BSUN exception bit.			#
#									#
# Typically, only one of the two possible branch directions could	#
# have the NAN bit set.							#
# (This is assuming the mutual exclusiveness of FPSR cc bit groupings	#
#  is preserved.)							#
#									#
#########################################################################

#
# equal:
#
#	Z
#
fdbcc_eq:
	fbeq.w		fdbcc_eq_yes		# equal?
fdbcc_eq_no:
	bra.w		fdbcc_false		# no; go handle counter
fdbcc_eq_yes:
	rts

#
# not equal:
#	_
#	Z
#
fdbcc_neq:
	fbneq.w		fdbcc_neq_yes		# not equal?
fdbcc_neq_no:
	bra.w		fdbcc_false		# no; go handle counter
fdbcc_neq_yes:
	rts

#
# greater than:
#	_______
#	NANvZvN
#
fdbcc_gt:
	fbgt.w		fdbcc_gt_yes		# greater than?
	btst		&nan_bit, FPSR_CC(%a6)	# is NAN set in cc?
	beq.w		fdbcc_false		# no;go handle counter
	ori.l		&bsun_mask+aiop_mask, USER_FPSR(%a6) # set BSUN exc bit
	btst		&bsun_bit, FPCR_ENABLE(%a6) # is BSUN enabled?
	bne.w		fdbcc_bsun		# yes; we have an exception	
	bra.w		fdbcc_false		# no; go handle counter
fdbcc_gt_yes:
	rts					# do nothing

#
# not greater than:
#
#	NANvZvN	
#
fdbcc_ngt:
	fbngt.w		fdbcc_ngt_yes		# not greater than?
fdbcc_ngt_no:
	bra.w		fdbcc_false		# no; go handle counter
fdbcc_ngt_yes:
	btst		&nan_bit, FPSR_CC(%a6)	# is NAN set in cc?
	beq.b		fdbcc_ngt_done		# no;go finish
	ori.l		&bsun_mask+aiop_mask, USER_FPSR(%a6) # set BSUN exc bit
	btst		&bsun_bit, FPCR_ENABLE(%a6) # is BSUN enabled?
	bne.w		fdbcc_bsun		# yes; we have an exception	
fdbcc_ngt_done:
	rts					# no; do nothing

#
# greater than or equal:
#	   _____
#	Zv(NANvN)
#
fdbcc_ge:
	fbge.w		fdbcc_ge_yes		# greater than or equal?
fdbcc_ge_no:
	btst		&nan_bit, FPSR_CC(%a6)	# is NAN set in cc?
	beq.w		fdbcc_false		# no;go handle counter
	ori.l		&bsun_mask+aiop_mask, USER_FPSR(%a6) # set BSUN exc bit
	btst		&bsun_bit, FPCR_ENABLE(%a6) # is BSUN enabled?
	bne.w		fdbcc_bsun		# yes; we have an exception	
	bra.w		fdbcc_false		# no; go handle counter
fdbcc_ge_yes:
	btst		&nan_bit, FPSR_CC(%a6)	# is NAN set in cc?
	beq.b		fdbcc_ge_yes_done	# no;go do nothing
	ori.l		&bsun_mask+aiop_mask, USER_FPSR(%a6) # set BSUN exc bit
	btst		&bsun_bit, FPCR_ENABLE(%a6) # is BSUN enabled?
	bne.w		fdbcc_bsun		# yes; we have an exception	
fdbcc_ge_yes_done:
	rts					# do nothing

#
# not (greater than or equal):
#	       _
#	NANv(N^Z)
#
fdbcc_nge:
	fbnge.w		fdbcc_nge_yes		# not (greater than or equal)?
fdbcc_nge_no:
	bra.w		fdbcc_false		# no; go handle counter
fdbcc_nge_yes:
	btst		&nan_bit, FPSR_CC(%a6)	# is NAN set in cc?
	beq.b		fdbcc_nge_done		# no;go finish
	ori.l		&bsun_mask+aiop_mask, USER_FPSR(%a6) # set BSUN exc bit
	btst		&bsun_bit, FPCR_ENABLE(%a6) # is BSUN enabled?
	bne.w		fdbcc_bsun		# yes; we have an exception	
fdbcc_nge_done:
	rts					# no; do nothing

#
# less than:
#	   _____
#	N^(NANvZ)
#
fdbcc_lt:
	fblt.w		fdbcc_lt_yes		# less than?
fdbcc_lt_no:
	btst		&nan_bit, FPSR_CC(%a6)	# is NAN set in cc?
	beq.w		fdbcc_false		# no; go handle counter
	ori.l		&bsun_mask+aiop_mask, USER_FPSR(%a6) # set BSUN exc bit
	btst		&bsun_bit, FPCR_ENABLE(%a6) # is BSUN enabled?
	bne.w		fdbcc_bsun		# yes; we have an exception	
	bra.w		fdbcc_false		# no; go handle counter
fdbcc_lt_yes:
	rts					# do nothing

#
# not less than:
#	       _
#	NANv(ZvN)
#
fdbcc_nlt:
	fbnlt.w		fdbcc_nlt_yes		# not less than?
fdbcc_nlt_no:
	bra.w		fdbcc_false		# no; go handle counter
fdbcc_nlt_yes:
	btst		&nan_bit, FPSR_CC(%a6)	# is NAN set in cc?
	beq.b		fdbcc_nlt_done		# no;go finish
	ori.l		&bsun_mask+aiop_mask, USER_FPSR(%a6) # set BSUN exc bit
	btst		&bsun_bit, FPCR_ENABLE(%a6) # is BSUN enabled?
	bne.w		fdbcc_bsun		# yes; we have an exception	
fdbcc_nlt_done:
	rts					# no; do nothing

#
# less than or equal:
#	     ___
#	Zv(N^NAN)
#
fdbcc_le:
	fble.w		fdbcc_le_yes		# less than or equal?
fdbcc_le_no:
	btst		&nan_bit, FPSR_CC(%a6)	# is NAN set in cc?
	beq.w		fdbcc_false		# no; go handle counter
	ori.l		&bsun_mask+aiop_mask, USER_FPSR(%a6) # set BSUN exc bit
	btst		&bsun_bit, FPCR_ENABLE(%a6) # is BSUN enabled?
	bne.w		fdbcc_bsun		# yes; we have an exception	
	bra.w		fdbcc_false		# no; go handle counter
fdbcc_le_yes:
	btst		&nan_bit, FPSR_CC(%a6)	# is NAN set in cc?
	beq.b		fdbcc_le_yes_done	# no; go do nothing
	ori.l		&bsun_mask+aiop_mask, USER_FPSR(%a6) # set BSUN exc bit
	btst		&bsun_bit, FPCR_ENABLE(%a6) # is BSUN enabled?
	bne.w		fdbcc_bsun		# yes; we have an exception	
fdbcc_le_yes_done:
	rts					# do nothing

#
# not (less than or equal):
#	     ___
#	NANv(NvZ)
#
fdbcc_nle:
	fbnle.w		fdbcc_nle_yes		# not (less than or equal)?
fdbcc_nle_no:
	bra.w		fdbcc_false		# no; go handle counter
fdbcc_nle_yes:
	btst		&nan_bit, FPSR_CC(%a6)	# is NAN set in cc?
	beq.w		fdbcc_nle_done		# no; go finish
	ori.l		&bsun_mask+aiop_mask, USER_FPSR(%a6) # set BSUN exc bit
	btst		&bsun_bit, FPCR_ENABLE(%a6) # is BSUN enabled?
	bne.w		fdbcc_bsun		# yes; we have an exception
fdbcc_nle_done:
	rts					# no; do nothing

#
# greater or less than:
#	_____
#	NANvZ
#
fdbcc_gl:
	fbgl.w		fdbcc_gl_yes		# greater or less than?
fdbcc_gl_no:
	btst		&nan_bit, FPSR_CC(%a6)	# is NAN set in cc?
	beq.w		fdbcc_false		# no; handle counter
	ori.l		&bsun_mask+aiop_mask, USER_FPSR(%a6) # set BSUN exc bit
	btst		&bsun_bit, FPCR_ENABLE(%a6) # is BSUN enabled?
	bne.w		fdbcc_bsun		# yes; we have an exception
	bra.w		fdbcc_false		# no; go handle counter
fdbcc_gl_yes:
	rts					# do nothing

#
# not (greater or less than):
#
#	NANvZ
#
fdbcc_ngl:
	fbngl.w		fdbcc_ngl_yes		# not (greater or less than)?
fdbcc_ngl_no:
	bra.w		fdbcc_false		# no; go handle counter
fdbcc_ngl_yes:
	btst		&nan_bit, FPSR_CC(%a6)	# is NAN set in cc?
	beq.b		fdbcc_ngl_done		# no; go finish
	ori.l		&bsun_mask+aiop_mask, USER_FPSR(%a6) # set BSUN exc bit
	btst		&bsun_bit, FPCR_ENABLE(%a6) # is BSUN enabled?
	bne.w		fdbcc_bsun		# yes; we have an exception
fdbcc_ngl_done:
	rts					# no; do nothing

#
# greater, less, or equal:
#	___
#	NAN
#
fdbcc_gle:
	fbgle.w		fdbcc_gle_yes		# greater, less, or equal?
fdbcc_gle_no:
	ori.l		&bsun_mask+aiop_mask, USER_FPSR(%a6) # set BSUN exc bit
	btst		&bsun_bit, FPCR_ENABLE(%a6) # is BSUN enabled?
	bne.w		fdbcc_bsun		# yes; we have an exception
	bra.w		fdbcc_false		# no; go handle counter
fdbcc_gle_yes:
	rts					# do nothing

#
# not (greater, less, or equal):
#
#	NAN
#
fdbcc_ngle:
	fbngle.w	fdbcc_ngle_yes		# not (greater, less, or equal)?
fdbcc_ngle_no:
	bra.w		fdbcc_false		# no; go handle counter
fdbcc_ngle_yes:
	ori.l		&bsun_mask+aiop_mask, USER_FPSR(%a6) # set BSUN exc bit
	btst		&bsun_bit, FPCR_ENABLE(%a6) # is BSUN enabled?
	bne.w		fdbcc_bsun		# yes; we have an exception
	rts					# no; do nothing

#########################################################################
#									#
# Miscellaneous tests							#
#									#
# For the IEEE miscellaneous tests, all but fdbf and fdbt can set bsun. #
#									#
#########################################################################

#
# false:
#
#	False
#
fdbcc_f:					# no bsun possible
	bra.w		fdbcc_false		# go handle counter

#
# true:
#
#	True
#
fdbcc_t:					# no bsun possible
	rts					# do nothing

#
# signalling false:
#
#	False
#
fdbcc_sf:
	btst		&nan_bit, FPSR_CC(%a6) 	# is NAN set?
	beq.w		fdbcc_false		# no;go handle counter
	ori.l		&bsun_mask+aiop_mask, USER_FPSR(%a6) # set BSUN exc bit
	btst		&bsun_bit, FPCR_ENABLE(%a6) # is BSUN enabled?
	bne.w		fdbcc_bsun		# yes; we have an exception
	bra.w		fdbcc_false		# go handle counter

#
# signalling true:
#
#	True
#
fdbcc_st:
	btst		&nan_bit, FPSR_CC(%a6) 	# is NAN set?
	beq.b		fdbcc_st_done		# no;go finish
	ori.l		&bsun_mask+aiop_mask, USER_FPSR(%a6) # set BSUN exc bit
	btst		&bsun_bit, FPCR_ENABLE(%a6) # is BSUN enabled?
	bne.w		fdbcc_bsun		# yes; we have an exception
fdbcc_st_done:
	rts

#
# signalling equal:
#
#	Z
#
fdbcc_seq:
	fbseq.w		fdbcc_seq_yes		# signalling equal?
fdbcc_seq_no:
	btst		&nan_bit, FPSR_CC(%a6) 	# is NAN set?
	beq.w		fdbcc_false		# no;go handle counter
	ori.l		&bsun_mask+aiop_mask, USER_FPSR(%a6) # set BSUN exc bit
	btst		&bsun_bit, FPCR_ENABLE(%a6) # is BSUN enabled?
	bne.w		fdbcc_bsun		# yes; we have an exception
	bra.w		fdbcc_false		# go handle counter
fdbcc_seq_yes:
	btst		&nan_bit, FPSR_CC(%a6) 	# is NAN set?
	beq.b		fdbcc_seq_yes_done	# no;go do nothing
	ori.l		&bsun_mask+aiop_mask, USER_FPSR(%a6) # set BSUN exc bit
	btst		&bsun_bit, FPCR_ENABLE(%a6) # is BSUN enabled?
	bne.w		fdbcc_bsun		# yes; we have an exception
fdbcc_seq_yes_done:
	rts					# yes; do nothing

#
# signalling not equal:
#	_
#	Z
#
fdbcc_sneq:
	fbsneq.w	fdbcc_sneq_yes		# signalling not equal?
fdbcc_sneq_no:
	btst		&nan_bit, FPSR_CC(%a6) 	# is NAN set?
	beq.w		fdbcc_false		# no;go handle counter
	ori.l		&bsun_mask+aiop_mask, USER_FPSR(%a6) # set BSUN exc bit
	btst		&bsun_bit, FPCR_ENABLE(%a6) # is BSUN enabled?
	bne.w		fdbcc_bsun		# yes; we have an exception
	bra.w		fdbcc_false		# go handle counter
fdbcc_sneq_yes:
	btst		&nan_bit, FPSR_CC(%a6) 	# set BSUN exc bit
	beq.w		fdbcc_sneq_done		# no;go finish
	ori.l		&bsun_mask+aiop_mask, USER_FPSR(%a6) # set BSUN exc bit
	btst		&bsun_bit, FPCR_ENABLE(%a6) # is BSUN enabled?
	bne.w		fdbcc_bsun		# yes; we have an exception
fdbcc_sneq_done:
	rts

#########################################################################
#									#
# IEEE Aware tests							#
#									#
# For the IEEE aware tests, action is only taken if the result is false.#
# Therefore, the opposite branch type is used to jump to the decrement	#
# routine. 								#
# The BSUN exception will not be set for any of these tests.		#
#									#
#########################################################################

#
# ordered greater than:
#	_______
#	NANvZvN
#
fdbcc_ogt:
	fbogt.w		fdbcc_ogt_yes		# ordered greater than?
fdbcc_ogt_no:
	bra.w		fdbcc_false		# no; go handle counter
fdbcc_ogt_yes:
	rts					# yes; do nothing

#
# unordered or less or equal:
#	_______
#	NANvZvN
#
fdbcc_ule:
	fbule.w		fdbcc_ule_yes		# unordered or less or equal?
fdbcc_ule_no:
	bra.w		fdbcc_false		# no; go handle counter
fdbcc_ule_yes:
	rts					# yes; do nothing

#
# ordered greater than or equal:
#	   _____
#	Zv(NANvN)
#
fdbcc_oge:
	fboge.w		fdbcc_oge_yes		# ordered greater than or equal?
fdbcc_oge_no:
	bra.w		fdbcc_false		# no; go handle counter
fdbcc_oge_yes:
	rts					# yes; do nothing

#
# unordered or less than:
#	       _
#	NANv(N^Z)
#
fdbcc_ult:
	fbult.w		fdbcc_ult_yes		# unordered or less than?
fdbcc_ult_no:
	bra.w		fdbcc_false		# no; go handle counter
fdbcc_ult_yes:
	rts					# yes; do nothing

#
# ordered less than:
#	   _____
#	N^(NANvZ)
#
fdbcc_olt:
	fbolt.w		fdbcc_olt_yes		# ordered less than?
fdbcc_olt_no:
	bra.w		fdbcc_false		# no; go handle counter
fdbcc_olt_yes:
	rts					# yes; do nothing

#
# unordered or greater or equal:
#
#	NANvZvN
#
fdbcc_uge:
	fbuge.w		fdbcc_uge_yes		# unordered or greater than?
fdbcc_uge_no:
	bra.w		fdbcc_false		# no; go handle counter
fdbcc_uge_yes:
	rts					# yes; do nothing

#
# ordered less than or equal:
#	     ___
#	Zv(N^NAN)
#
fdbcc_ole:
	fbole.w		fdbcc_ole_yes		# ordered greater or less than?
fdbcc_ole_no:
	bra.w		fdbcc_false		# no; go handle counter
fdbcc_ole_yes:
	rts					# yes; do nothing

#
# unordered or greater than:
#	     ___
#	NANv(NvZ)
#
fdbcc_ugt:
	fbugt.w		fdbcc_ugt_yes		# unordered or greater than?
fdbcc_ugt_no:
	bra.w		fdbcc_false		# no; go handle counter
fdbcc_ugt_yes:
	rts					# yes; do nothing

#
# ordered greater or less than:
#	_____
#	NANvZ
#
fdbcc_ogl:
	fbogl.w		fdbcc_ogl_yes		# ordered greater or less than?
fdbcc_ogl_no:
	bra.w		fdbcc_false		# no; go handle counter
fdbcc_ogl_yes:
	rts					# yes; do nothing

#
# unordered or equal:
#
#	NANvZ
#
fdbcc_ueq:
	fbueq.w		fdbcc_ueq_yes		# unordered or equal?
fdbcc_ueq_no:
	bra.w		fdbcc_false		# no; go handle counter
fdbcc_ueq_yes:
	rts					# yes; do nothing

#
# ordered:
#	___
#	NAN
#
fdbcc_or:
	fbor.w		fdbcc_or_yes		# ordered?
fdbcc_or_no:
	bra.w		fdbcc_false		# no; go handle counter
fdbcc_or_yes:
	rts					# yes; do nothing

#
# unordered:
#
#	NAN
#
fdbcc_un:
	fbun.w		fdbcc_un_yes		# unordered?
fdbcc_un_no:
	bra.w		fdbcc_false		# no; go handle counter
fdbcc_un_yes:
	rts					# yes; do nothing

#######################################################################

#
# the bsun exception bit was not set.
#
# (1) subtract 1 from the count register
# (2) if (cr == -1) then
#	pc = pc of next instruction
#     else
#	pc += sign_ext(16-bit displacement)
#
fdbcc_false:
	mov.b		1+EXC_OPWORD(%a6), %d1	# fetch lo opword 
	andi.w		&0x7, %d1		# extract count register

	bsr.l		fetch_dreg		# fetch count value
# make sure that d0 isn't corrupted between calls...

	subq.w		&0x1, %d0		# Dn - 1 -> Dn

	bsr.l		store_dreg_l		# store new count value

	cmpi.w		%d0, &-0x1		# is (Dn == -1)?
	bne.b		fdbcc_false_cont	# no; 
	rts

fdbcc_false_cont:
	mov.l		L_SCR1(%a6),%d0		# fetch displacement
	add.l		USER_FPIAR(%a6),%d0	# add instruction PC
	addq.l		&0x4,%d0		# add instruction length
	mov.l		%d0,EXC_PC(%a6)		# set new PC
	rts

# the emulation routine set bsun and BSUN was enabled. have to
# fix stack and jump to the bsun handler.
# let the caller of this routine shift the stack frame up to
# eliminate the effective address field.
fdbcc_bsun:
	mov.b		&fbsun_flg,SPCOND_FLG(%a6)
	rts

#########################################################################
# ftrapcc(): routine to emulate the ftrapcc instruction			#
#									#
# XDEF ****************************************************************	#
#	_ftrapcc()							#
#									#
# XREF ****************************************************************	#
#	none								#
#									#
# INPUT *************************************************************** #
#	none								#
#									#
# OUTPUT ************************************************************** #
#	none								#
#									#
# ALGORITHM *********************************************************** #
#	This routine checks which conditional predicate is specified by	#
# the stacked ftrapcc instruction opcode and then branches to a routine	#
# for that predicate. The corresponding fbcc instruction is then used	#
# to see whether the condition (specified by the stacked FPSR) is true	#
# or false.								#
#	If a BSUN exception should be indicated, the BSUN and ABSUN	#
# bits are set in the stacked FPSR. If the BSUN exception is enabled,	#
# the fbsun_flg is set in the SPCOND_FLG location on the stack. If an 	#
# enabled BSUN should not be flagged and the predicate is true, then	#
# the ftrapcc_flg is set in the SPCOND_FLG location. These special	#
# flags indicate to the calling routine to emulate the exceptional	#
# condition.								#
#									#
#########################################################################

	global		_ftrapcc
_ftrapcc:
	mov.w		EXC_CMDREG(%a6),%d0	# fetch predicate

	clr.l		%d1			# clear scratch reg
	mov.b		FPSR_CC(%a6),%d1	# fetch fp ccodes
	ror.l		&0x8,%d1		# rotate to top byte
	fmov.l		%d1,%fpsr		# insert into FPSR

	mov.w		(tbl_ftrapcc.b,%pc,%d0.w*2), %d1 # load table 
	jmp		(tbl_ftrapcc.b,%pc,%d1.w) # jump to ftrapcc routine

tbl_ftrapcc:
	short		ftrapcc_f	-	tbl_ftrapcc	# 00
	short		ftrapcc_eq	-	tbl_ftrapcc	# 01
	short		ftrapcc_ogt	-	tbl_ftrapcc	# 02
	short		ftrapcc_oge	-	tbl_ftrapcc	# 03
	short		ftrapcc_olt	-	tbl_ftrapcc	# 04
	short		ftrapcc_ole	-	tbl_ftrapcc	# 05
	short		ftrapcc_ogl	-	tbl_ftrapcc	# 06
	short		ftrapcc_or	-	tbl_ftrapcc	# 07
	short		ftrapcc_un	-	tbl_ftrapcc	# 08
	short		ftrapcc_ueq	-	tbl_ftrapcc	# 09
	short		ftrapcc_ugt	-	tbl_ftrapcc	# 10
	short		ftrapcc_uge	-	tbl_ftrapcc	# 11
	short		ftrapcc_ult	-	tbl_ftrapcc	# 12
	short		ftrapcc_ule	-	tbl_ftrapcc	# 13
	short		ftrapcc_neq	-	tbl_ftrapcc	# 14
	short		ftrapcc_t	-	tbl_ftrapcc	# 15
	short		ftrapcc_sf	-	tbl_ftrapcc	# 16
	short		ftrapcc_seq	-	tbl_ftrapcc	# 17
	short		ftrapcc_gt	-	tbl_ftrapcc	# 18
	short		ftrapcc_ge	-	tbl_ftrapcc	# 19
	short		ftrapcc_lt	-	tbl_ftrapcc	# 20
	short		ftrapcc_le	-	tbl_ftrapcc	# 21
	short		ftrapcc_gl	-	tbl_ftrapcc	# 22
	short		ftrapcc_gle	-	tbl_ftrapcc	# 23
	short		ftrapcc_ngle	-	tbl_ftrapcc	# 24
	short		ftrapcc_ngl	-	tbl_ftrapcc	# 25
	short		ftrapcc_nle	-	tbl_ftrapcc	# 26
	short		ftrapcc_nlt	-	tbl_ftrapcc	# 27
	short		ftrapcc_nge	-	tbl_ftrapcc	# 28
	short		ftrapcc_ngt	-	tbl_ftrapcc	# 29
	short		ftrapcc_sneq	-	tbl_ftrapcc	# 30
	short		ftrapcc_st	-	tbl_ftrapcc	# 31

#########################################################################
#									#
# IEEE Nonaware tests							#
#									#
# For the IEEE nonaware tests, we set the result based on the		#
# floating point condition codes. In addition, we check to see		#
# if the NAN bit is set, in which case BSUN and AIOP will be set.	#
#									#
# The cases EQ and NE are shared by the Aware and Nonaware groups	#
# and are incapable of setting the BSUN exception bit.			#
#									#
# Typically, only one of the two possible branch directions could	#
# have the NAN bit set.							#
#									#
#########################################################################

#
# equal:
#
#	Z
#
ftrapcc_eq:
	fbeq.w		ftrapcc_trap		# equal?
ftrapcc_eq_no:
	rts					# do nothing

#
# not equal:
#	_
#	Z
#
ftrapcc_neq:
	fbneq.w		ftrapcc_trap		# not equal?
ftrapcc_neq_no:
	rts					# do nothing

#
# greater than:
#	_______
#	NANvZvN
#
ftrapcc_gt:
	fbgt.w		ftrapcc_trap		# greater than?
ftrapcc_gt_no:
	btst		&nan_bit, FPSR_CC(%a6)	# is NAN set in cc?
	beq.b		ftrapcc_gt_done		# no
	ori.l		&bsun_mask+aiop_mask, USER_FPSR(%a6) # set BSUN exc bit
	btst		&bsun_bit, FPCR_ENABLE(%a6) # was BSUN set?
	bne.w		ftrapcc_bsun		# yes
ftrapcc_gt_done:
	rts					# no; do nothing

#
# not greater than:
#
#	NANvZvN	
#
ftrapcc_ngt:
	fbngt.w		ftrapcc_ngt_yes		# not greater than?
ftrapcc_ngt_no:
	rts					# do nothing
ftrapcc_ngt_yes:
	btst		&nan_bit, FPSR_CC(%a6)	# is NAN set in cc?
	beq.w		ftrapcc_trap		# no; go take trap
	ori.l		&bsun_mask+aiop_mask, USER_FPSR(%a6) # set BSUN exc bit
	btst		&bsun_bit, FPCR_ENABLE(%a6) # was BSUN set?
	bne.w		ftrapcc_bsun		# yes
	bra.w		ftrapcc_trap		# no; go take trap

#
# greater than or equal:
#	   _____
#	Zv(NANvN)
#
ftrapcc_ge:
	fbge.w		ftrapcc_ge_yes		# greater than or equal?
ftrapcc_ge_no:
	btst		&nan_bit, FPSR_CC(%a6)	# is NAN set in cc?
	beq.b		ftrapcc_ge_done		# no; go finish
	ori.l		&bsun_mask+aiop_mask, USER_FPSR(%a6) # set BSUN exc bit
	btst		&bsun_bit, FPCR_ENABLE(%a6) # was BSUN set?
	bne.w		ftrapcc_bsun		# yes
ftrapcc_ge_done:
	rts					# no; do nothing
ftrapcc_ge_yes:
	btst		&nan_bit, FPSR_CC(%a6)	# is NAN set in cc?
	beq.w		ftrapcc_trap		# no; go take trap
	ori.l		&bsun_mask+aiop_mask, USER_FPSR(%a6) # set BSUN exc bit
	btst		&bsun_bit, FPCR_ENABLE(%a6) # was BSUN set?
	bne.w		ftrapcc_bsun		# yes
	bra.w		ftrapcc_trap		# no; go take trap

#
# not (greater than or equal):
#	       _
#	NANv(N^Z)
#
ftrapcc_nge:
	fbnge.w		ftrapcc_nge_yes		# not (greater than or equal)?
ftrapcc_nge_no:
	rts					# do nothing
ftrapcc_nge_yes:
	btst		&nan_bit, FPSR_CC(%a6)	# is NAN set in cc?
	beq.w		ftrapcc_trap		# no; go take trap
	ori.l		&bsun_mask+aiop_mask, USER_FPSR(%a6) # set BSUN exc bit
	btst		&bsun_bit, FPCR_ENABLE(%a6) # was BSUN set?
	bne.w		ftrapcc_bsun		# yes
	bra.w		ftrapcc_trap		# no; go take trap

#
# less than:
#	   _____
#	N^(NANvZ)
#
ftrapcc_lt:
	fblt.w		ftrapcc_trap		# less than?
ftrapcc_lt_no:
	btst		&nan_bit, FPSR_CC(%a6)	# is NAN set in cc?
	beq.b		ftrapcc_lt_done		# no; go finish
	ori.l		&bsun_mask+aiop_mask, USER_FPSR(%a6) # set BSUN exc bit
	btst		&bsun_bit, FPCR_ENABLE(%a6) # was BSUN set?
	bne.w		ftrapcc_bsun		# yes
ftrapcc_lt_done:
	rts					# no; do nothing

#
# not less than:
#	       _
#	NANv(ZvN)
#
ftrapcc_nlt:
	fbnlt.w		ftrapcc_nlt_yes		# not less than?
ftrapcc_nlt_no:
	rts					# do nothing
ftrapcc_nlt_yes:
	btst		&nan_bit, FPSR_CC(%a6)	# is NAN set in cc?
	beq.w		ftrapcc_trap		# no; go take trap
	ori.l		&bsun_mask+aiop_mask, USER_FPSR(%a6) # set BSUN exc bit
	btst		&bsun_bit, FPCR_ENABLE(%a6) # was BSUN set?
	bne.w		ftrapcc_bsun		# yes
	bra.w		ftrapcc_trap		# no; go take trap

#
# less than or equal:
#	     ___
#	Zv(N^NAN)
#
ftrapcc_le:
	fble.w		ftrapcc_le_yes		# less than or equal?
ftrapcc_le_no:
	btst		&nan_bit, FPSR_CC(%a6)	# is NAN set in cc?
	beq.b		ftrapcc_le_done		# no; go finish
	ori.l		&bsun_mask+aiop_mask, USER_FPSR(%a6) # set BSUN exc bit
	btst		&bsun_bit, FPCR_ENABLE(%a6) # was BSUN set?
	bne.w		ftrapcc_bsun		# yes
ftrapcc_le_done:
	rts					# no; do nothing
ftrapcc_le_yes:
	btst		&nan_bit, FPSR_CC(%a6)	# is NAN set in cc?
	beq.w		ftrapcc_trap		# no; go take trap
	ori.l		&bsun_mask+aiop_mask, USER_FPSR(%a6) # set BSUN exc bit
	btst		&bsun_bit, FPCR_ENABLE(%a6) # was BSUN set?
	bne.w		ftrapcc_bsun		# yes
	bra.w		ftrapcc_trap		# no; go take trap

#
# not (less than or equal):
#	     ___
#	NANv(NvZ)
#
ftrapcc_nle:
	fbnle.w		ftrapcc_nle_yes		# not (less than or equal)?
ftrapcc_nle_no:
	rts					# do nothing
ftrapcc_nle_yes:
	btst		&nan_bit, FPSR_CC(%a6)	# is NAN set in cc?
	beq.w		ftrapcc_trap		# no; go take trap
	ori.l		&bsun_mask+aiop_mask, USER_FPSR(%a6) # set BSUN exc bit
	btst		&bsun_bit, FPCR_ENABLE(%a6) # was BSUN set?
	bne.w		ftrapcc_bsun		# yes
	bra.w		ftrapcc_trap		# no; go take trap

#
# greater or less than:
#	_____
#	NANvZ
#
ftrapcc_gl:
	fbgl.w		ftrapcc_trap		# greater or less than?
ftrapcc_gl_no:
	btst		&nan_bit, FPSR_CC(%a6)	# is NAN set in cc?
	beq.b		ftrapcc_gl_done		# no; go finish
	ori.l		&bsun_mask+aiop_mask, USER_FPSR(%a6) # set BSUN exc bit
	btst		&bsun_bit, FPCR_ENABLE(%a6) # was BSUN set?
	bne.w		ftrapcc_bsun		# yes
ftrapcc_gl_done:
	rts					# no; do nothing

#
# not (greater or less than):
#
#	NANvZ
#
ftrapcc_ngl:
	fbngl.w		ftrapcc_ngl_yes		# not (greater or less than)?
ftrapcc_ngl_no:
	rts					# do nothing
ftrapcc_ngl_yes:
	btst		&nan_bit, FPSR_CC(%a6)	# is NAN set in cc?
	beq.w		ftrapcc_trap		# no; go take trap
	ori.l		&bsun_mask+aiop_mask, USER_FPSR(%a6) # set BSUN exc bit
	btst		&bsun_bit, FPCR_ENABLE(%a6) # was BSUN set?
	bne.w		ftrapcc_bsun		# yes
	bra.w		ftrapcc_trap		# no; go take trap

#
# greater, less, or equal:
#	___
#	NAN
#
ftrapcc_gle:
	fbgle.w		ftrapcc_trap		# greater, less, or equal?
ftrapcc_gle_no:
	ori.l		&bsun_mask+aiop_mask, USER_FPSR(%a6) # set BSUN exc bit
	btst		&bsun_bit, FPCR_ENABLE(%a6) # was BSUN set?
	bne.w		ftrapcc_bsun		# yes
	rts					# no; do nothing

#
# not (greater, less, or equal):
#
#	NAN
#
ftrapcc_ngle:
	fbngle.w	ftrapcc_ngle_yes	# not (greater, less, or equal)?
ftrapcc_ngle_no:
	rts					# do nothing
ftrapcc_ngle_yes:
	ori.l		&bsun_mask+aiop_mask, USER_FPSR(%a6) # set BSUN exc bit
	btst		&bsun_bit, FPCR_ENABLE(%a6) # was BSUN set?
	bne.w		ftrapcc_bsun		# yes
	bra.w		ftrapcc_trap		# no; go take trap

#########################################################################
#									#
# Miscellaneous tests							#
#									#
# For the IEEE aware tests, we only have to set the result based on the	#
# floating point condition codes. The BSUN exception will not be	#
# set for any of these tests.						#
#									#
#########################################################################

#
# false:
#
#	False
#
ftrapcc_f:
	rts					# do nothing

#
# true:
#
#	True
#
ftrapcc_t:
	bra.w		ftrapcc_trap		# go take trap

#
# signalling false:
#
#	False
#
ftrapcc_sf:
	btst		&nan_bit, FPSR_CC(%a6) 	# set BSUN exc bit
	beq.b		ftrapcc_sf_done		# no; go finish
	ori.l		&bsun_mask+aiop_mask, USER_FPSR(%a6) # set BSUN exc bit
	btst		&bsun_bit, FPCR_ENABLE(%a6) # was BSUN set?
	bne.w		ftrapcc_bsun		# yes
ftrapcc_sf_done:
	rts					# no; do nothing

#
# signalling true:
#
#	True
#
ftrapcc_st:
	btst		&nan_bit, FPSR_CC(%a6) 	# set BSUN exc bit
	beq.w		ftrapcc_trap		# no; go take trap
	ori.l		&bsun_mask+aiop_mask, USER_FPSR(%a6) # set BSUN exc bit
	btst		&bsun_bit, FPCR_ENABLE(%a6) # was BSUN set?
	bne.w		ftrapcc_bsun		# yes
	bra.w		ftrapcc_trap		# no; go take trap

#
# signalling equal:
#
#	Z
#
ftrapcc_seq:
	fbseq.w		ftrapcc_seq_yes		# signalling equal?
ftrapcc_seq_no:
	btst		&nan_bit, FPSR_CC(%a6) 	# set BSUN exc bit
	beq.w		ftrapcc_seq_done	# no; go finish
	ori.l		&bsun_mask+aiop_mask, USER_FPSR(%a6) # set BSUN exc bit
	btst		&bsun_bit, FPCR_ENABLE(%a6) # was BSUN set?
	bne.w		ftrapcc_bsun		# yes
ftrapcc_seq_done:
	rts					# no; do nothing
ftrapcc_seq_yes:
	btst		&nan_bit, FPSR_CC(%a6) 	# set BSUN exc bit
	beq.w		ftrapcc_trap		# no; go take trap
	ori.l		&bsun_mask+aiop_mask, USER_FPSR(%a6) # set BSUN exc bit
	btst		&bsun_bit, FPCR_ENABLE(%a6) # was BSUN set?
	bne.w		ftrapcc_bsun		# yes
	bra.w		ftrapcc_trap		# no; go take trap

#
# signalling not equal:
#	_
#	Z
#
ftrapcc_sneq:
	fbsneq.w	ftrapcc_sneq_yes	# signalling equal?
ftrapcc_sneq_no:
	btst		&nan_bit, FPSR_CC(%a6) 	# set BSUN exc bit
	beq.w		ftrapcc_sneq_no_done	# no; go finish
	ori.l		&bsun_mask+aiop_mask, USER_FPSR(%a6) # set BSUN exc bit
	btst		&bsun_bit, FPCR_ENABLE(%a6) # was BSUN set?
	bne.w		ftrapcc_bsun		# yes
ftrapcc_sneq_no_done:
	rts					# do nothing
ftrapcc_sneq_yes:
	btst		&nan_bit, FPSR_CC(%a6) 	# set BSUN exc bit
	beq.w		ftrapcc_trap		# no; go take trap
	ori.l		&bsun_mask+aiop_mask, USER_FPSR(%a6) # set BSUN exc bit
	btst		&bsun_bit, FPCR_ENABLE(%a6) # was BSUN set?
	bne.w		ftrapcc_bsun		# yes
	bra.w		ftrapcc_trap		# no; go take trap

#########################################################################
#									#
# IEEE Aware tests							#
#									#
# For the IEEE aware tests, we only have to set the result based on the	#
# floating point condition codes. The BSUN exception will not be	#
# set for any of these tests.						#
#									#
#########################################################################

#
# ordered greater than:
#	_______
#	NANvZvN
#
ftrapcc_ogt:
	fbogt.w		ftrapcc_trap		# ordered greater than?
ftrapcc_ogt_no:
	rts					# do nothing

#
# unordered or less or equal:
#	_______
#	NANvZvN
#
ftrapcc_ule:
	fbule.w		ftrapcc_trap		# unordered or less or equal?
ftrapcc_ule_no:
	rts					# do nothing

#
# ordered greater than or equal:
#	   _____
#	Zv(NANvN)
#
ftrapcc_oge:
	fboge.w		ftrapcc_trap		# ordered greater than or equal?
ftrapcc_oge_no:
	rts					# do nothing

#
# unordered or less than:
#	       _
#	NANv(N^Z)
#
ftrapcc_ult:
	fbult.w		ftrapcc_trap		# unordered or less than?
ftrapcc_ult_no:
	rts					# do nothing

#
# ordered less than:
#	   _____
#	N^(NANvZ)
#
ftrapcc_olt:
	fbolt.w		ftrapcc_trap		# ordered less than?
ftrapcc_olt_no:
	rts					# do nothing

#
# unordered or greater or equal:
#
#	NANvZvN
#
ftrapcc_uge:
	fbuge.w		ftrapcc_trap		# unordered or greater than?
ftrapcc_uge_no:
	rts					# do nothing

#
# ordered less than or equal:
#	     ___
#	Zv(N^NAN)
#
ftrapcc_ole:
	fbole.w		ftrapcc_trap		# ordered greater or less than?
ftrapcc_ole_no:
	rts					# do nothing

#
# unordered or greater than:
#	     ___
#	NANv(NvZ)
#
ftrapcc_ugt:
	fbugt.w		ftrapcc_trap		# unordered or greater than?
ftrapcc_ugt_no:
	rts					# do nothing

#
# ordered greater or less than:
#	_____
#	NANvZ
#
ftrapcc_ogl:
	fbogl.w		ftrapcc_trap		# ordered greater or less than?
ftrapcc_ogl_no:
	rts					# do nothing

#
# unordered or equal:
#
#	NANvZ
#
ftrapcc_ueq:
	fbueq.w		ftrapcc_trap		# unordered or equal?
ftrapcc_ueq_no:
	rts					# do nothing

#
# ordered:
#	___
#	NAN
#
ftrapcc_or:
	fbor.w		ftrapcc_trap		# ordered?
ftrapcc_or_no:
	rts					# do nothing

#
# unordered:
#
#	NAN
#
ftrapcc_un:
	fbun.w		ftrapcc_trap		# unordered?
ftrapcc_un_no:
	rts					# do nothing

#######################################################################

# the bsun exception bit was not set.
# we will need to jump to the ftrapcc vector. the stack frame
# is the same size as that of the fp unimp instruction. the
# only difference is that the <ea> field should hold the PC
# of the ftrapcc instruction and the vector offset field
# should denote the ftrapcc trap.
ftrapcc_trap:
	mov.b		&ftrapcc_flg,SPCOND_FLG(%a6)
	rts

# the emulation routine set bsun and BSUN was enabled. have to
# fix stack and jump to the bsun handler.
# let the caller of this routine shift the stack frame up to
# eliminate the effective address field.
ftrapcc_bsun:
	mov.b		&fbsun_flg,SPCOND_FLG(%a6)
	rts

#########################################################################
# fscc(): routine to emulate the fscc instruction			#
#									#
# XDEF **************************************************************** #
#	_fscc()								#
#									#
# XREF **************************************************************** #
#	store_dreg_b() - store result to data register file		#
#	dec_areg() - decrement an areg for -(an) mode			#
#	inc_areg() - increment an areg for (an)+ mode			#
#	_dmem_write_byte() - store result to memory			#
#									#
# INPUT ***************************************************************	#
#	none								#
#									#
# OUTPUT ************************************************************** #
#	none								#
#									#
# ALGORITHM ***********************************************************	#
#	This routine checks which conditional predicate is specified by	#
# the stacked fscc instruction opcode and then branches to a routine	#
# for that predicate. The corresponding fbcc instruction is then used	#
# to see whether the condition (specified by the stacked FPSR) is true	#
# or false.								#
#	If a BSUN exception should be indicated, the BSUN and ABSUN	#
# bits are set in the stacked FPSR. If the BSUN exception is enabled,	#
# the fbsun_flg is set in the SPCOND_FLG location on the stack. If an 	#
# enabled BSUN should not be flagged and the predicate is true, then	#
# the result is stored to the data register file or memory		#
#									#
#########################################################################

	global		_fscc
_fscc:
	mov.w		EXC_CMDREG(%a6),%d0	# fetch predicate

	clr.l		%d1			# clear scratch reg
	mov.b		FPSR_CC(%a6),%d1	# fetch fp ccodes
	ror.l		&0x8,%d1		# rotate to top byte
	fmov.l		%d1,%fpsr		# insert into FPSR

	mov.w		(tbl_fscc.b,%pc,%d0.w*2),%d1 # load table 
	jmp		(tbl_fscc.b,%pc,%d1.w) 	# jump to fscc routine

tbl_fscc:
	short		fscc_f		-	tbl_fscc	# 00
	short		fscc_eq		-	tbl_fscc	# 01
	short		fscc_ogt	-	tbl_fscc	# 02
	short		fscc_oge	-	tbl_fscc	# 03
	short		fscc_olt	-	tbl_fscc	# 04
	short		fscc_ole	-	tbl_fscc	# 05
	short		fscc_ogl	-	tbl_fscc	# 06
	short		fscc_or		-	tbl_fscc	# 07
	short		fscc_un		-	tbl_fscc	# 08
	short		fscc_ueq	-	tbl_fscc	# 09
	short		fscc_ugt	-	tbl_fscc	# 10
	short		fscc_uge	-	tbl_fscc	# 11
	short		fscc_ult	-	tbl_fscc	# 12
	short		fscc_ule	-	tbl_fscc	# 13
	short		fscc_neq	-	tbl_fscc	# 14
	short		fscc_t		-	tbl_fscc	# 15
	short		fscc_sf		-	tbl_fscc	# 16
	short		fscc_seq	-	tbl_fscc	# 17
	short		fscc_gt		-	tbl_fscc	# 18
	short		fscc_ge		-	tbl_fscc	# 19
	short		fscc_lt		-	tbl_fscc	# 20
	short		fscc_le		-	tbl_fscc	# 21
	short		fscc_gl		-	tbl_fscc	# 22
	short		fscc_gle	-	tbl_fscc	# 23
	short		fscc_ngle	-	tbl_fscc	# 24
	short		fscc_ngl	-	tbl_fscc	# 25
	short		fscc_nle	-	tbl_fscc	# 26
	short		fscc_nlt	-	tbl_fscc	# 27
	short		fscc_nge	-	tbl_fscc	# 28
	short		fscc_ngt	-	tbl_fscc	# 29
	short		fscc_sneq	-	tbl_fscc	# 30
	short		fscc_st		-	tbl_fscc	# 31

#########################################################################
#									#
# IEEE Nonaware tests							#
#									#
# For the IEEE nonaware tests, we set the result based on the		#
# floating point condition codes. In addition, we check to see		#
# if the NAN bit is set, in which case BSUN and AIOP will be set.	#
#									#
# The cases EQ and NE are shared by the Aware and Nonaware groups	#
# and are incapable of setting the BSUN exception bit.			#
#									#
# Typically, only one of the two possible branch directions could	#
# have the NAN bit set.							#
#									#
#########################################################################

#
# equal:
#
#	Z
#
fscc_eq:
	fbeq.w		fscc_eq_yes		# equal?
fscc_eq_no:
	clr.b		%d0			# set false
	bra.w		fscc_done		# go finish
fscc_eq_yes:
	st		%d0			# set true
	bra.w		fscc_done		# go finish

#
# not equal:
#	_
#	Z
#
fscc_neq:
	fbneq.w		fscc_neq_yes		# not equal?
fscc_neq_no:
	clr.b		%d0			# set false
	bra.w		fscc_done		# go finish
fscc_neq_yes:
	st		%d0			# set true
	bra.w		fscc_done		# go finish

#
# greater than:
#	_______
#	NANvZvN
#
fscc_gt:
	fbgt.w		fscc_gt_yes		# greater than?
fscc_gt_no:
	clr.b		%d0			# set false
	btst		&nan_bit, FPSR_CC(%a6)	# is NAN set in cc?
	beq.w		fscc_done		# no;go finish
	ori.l		&bsun_mask+aiop_mask, USER_FPSR(%a6) # set BSUN exc bit
	bra.w		fscc_chk_bsun		# go finish
fscc_gt_yes:
	st		%d0			# set true
	bra.w		fscc_done		# go finish

#
# not greater than:
#
#	NANvZvN	
#
fscc_ngt:
	fbngt.w		fscc_ngt_yes		# not greater than?
fscc_ngt_no:
	clr.b		%d0			# set false
	bra.w		fscc_done		# go finish
fscc_ngt_yes:
	st		%d0			# set true
	btst		&nan_bit, FPSR_CC(%a6)	# is NAN set in cc?
	beq.w		fscc_done		# no;go finish
	ori.l		&bsun_mask+aiop_mask, USER_FPSR(%a6) # set BSUN exc bit
	bra.w		fscc_chk_bsun		# go finish

#
# greater than or equal:
#	   _____
#	Zv(NANvN)
#
fscc_ge:
	fbge.w		fscc_ge_yes		# greater than or equal?
fscc_ge_no:
	clr.b		%d0			# set false
	btst		&nan_bit, FPSR_CC(%a6)	# is NAN set in cc?
	beq.w		fscc_done		# no;go finish
	ori.l		&bsun_mask+aiop_mask, USER_FPSR(%a6) # set BSUN exc bit
	bra.w		fscc_chk_bsun		# go finish
fscc_ge_yes:
	st		%d0			# set true	
	btst		&nan_bit, FPSR_CC(%a6)	# is NAN set in cc?
	beq.w		fscc_done		# no;go finish
	ori.l		&bsun_mask+aiop_mask, USER_FPSR(%a6) # set BSUN exc bit
	bra.w		fscc_chk_bsun		# go finish

#
# not (greater than or equal):
#	       _
#	NANv(N^Z)
#
fscc_nge:
	fbnge.w		fscc_nge_yes		# not (greater than or equal)?
fscc_nge_no:
	clr.b		%d0			# set false
	bra.w		fscc_done		# go finish
fscc_nge_yes:
	st		%d0			# set true
	btst		&nan_bit, FPSR_CC(%a6)	# is NAN set in cc?
	beq.w		fscc_done		# no;go finish
	ori.l		&bsun_mask+aiop_mask, USER_FPSR(%a6) # set BSUN exc bit
	bra.w		fscc_chk_bsun		# go finish

#
# less than:
#	   _____
#	N^(NANvZ)
#
fscc_lt:
	fblt.w		fscc_lt_yes		# less than?
fscc_lt_no:
	clr.b		%d0			# set false
	btst		&nan_bit, FPSR_CC(%a6)	# is NAN set in cc?
	beq.w		fscc_done		# no;go finish
	ori.l		&bsun_mask+aiop_mask, USER_FPSR(%a6) # set BSUN exc bit
	bra.w		fscc_chk_bsun		# go finish
fscc_lt_yes:
	st		%d0			# set true
	bra.w		fscc_done		# go finish

#
# not less than:
#	       _
#	NANv(ZvN)
#
fscc_nlt:
	fbnlt.w		fscc_nlt_yes		# not less than?
fscc_nlt_no:
	clr.b		%d0			# set false
	bra.w		fscc_done		# go finish
fscc_nlt_yes:
	st		%d0			# set true
	btst		&nan_bit, FPSR_CC(%a6)	# is NAN set in cc?
	beq.w		fscc_done		# no;go finish
	ori.l		&bsun_mask+aiop_mask, USER_FPSR(%a6) # set BSUN exc bit
	bra.w		fscc_chk_bsun		# go finish

#
# less than or equal:
#	     ___
#	Zv(N^NAN)
#
fscc_le:
	fble.w		fscc_le_yes		# less than or equal?
fscc_le_no:
	clr.b		%d0			# set false
	btst		&nan_bit, FPSR_CC(%a6)	# is NAN set in cc?
	beq.w		fscc_done		# no;go finish
	ori.l		&bsun_mask+aiop_mask, USER_FPSR(%a6) # set BSUN exc bit
	bra.w		fscc_chk_bsun		# go finish
fscc_le_yes:
	st		%d0			# set true
	btst		&nan_bit, FPSR_CC(%a6)	# is NAN set in cc?
	beq.w		fscc_done		# no;go finish
	ori.l		&bsun_mask+aiop_mask, USER_FPSR(%a6) # set BSUN exc bit
	bra.w		fscc_chk_bsun		# go finish

#
# not (less than or equal):
#	     ___
#	NANv(NvZ)
#
fscc_nle:
	fbnle.w		fscc_nle_yes		# not (less than or equal)?
fscc_nle_no:
	clr.b		%d0			# set false
	bra.w		fscc_done		# go finish
fscc_nle_yes:
	st		%d0			# set true
	btst		&nan_bit, FPSR_CC(%a6)	# is NAN set in cc?
	beq.w		fscc_done		# no;go finish
	ori.l		&bsun_mask+aiop_mask, USER_FPSR(%a6) # set BSUN exc bit
	bra.w		fscc_chk_bsun		# go finish

#
# greater or less than:
#	_____
#	NANvZ
#
fscc_gl:
	fbgl.w		fscc_gl_yes		# greater or less than?
fscc_gl_no:
	clr.b		%d0			# set false
	btst		&nan_bit, FPSR_CC(%a6)	# is NAN set in cc?
	beq.w		fscc_done		# no;go finish
	ori.l		&bsun_mask+aiop_mask, USER_FPSR(%a6) # set BSUN exc bit
	bra.w		fscc_chk_bsun		# go finish
fscc_gl_yes:
	st		%d0			# set true
	bra.w		fscc_done		# go finish

#
# not (greater or less than):
#
#	NANvZ
#
fscc_ngl:
	fbngl.w		fscc_ngl_yes		# not (greater or less than)?
fscc_ngl_no:
	clr.b		%d0			# set false
	bra.w		fscc_done		# go finish
fscc_ngl_yes:
	st		%d0			# set true
	btst		&nan_bit, FPSR_CC(%a6)	# is NAN set in cc?
	beq.w		fscc_done		# no;go finish
	ori.l		&bsun_mask+aiop_mask, USER_FPSR(%a6) # set BSUN exc bit
	bra.w		fscc_chk_bsun		# go finish

#
# greater, less, or equal:
#	___
#	NAN
#
fscc_gle:
	fbgle.w		fscc_gle_yes		# greater, less, or equal?
fscc_gle_no:
	clr.b		%d0			# set false
	ori.l		&bsun_mask+aiop_mask, USER_FPSR(%a6) # set BSUN exc bit
	bra.w		fscc_chk_bsun		# go finish
fscc_gle_yes:
	st		%d0			# set true
	bra.w		fscc_done		# go finish

#
# not (greater, less, or equal):
#
#	NAN
#
fscc_ngle:
	fbngle.w		fscc_ngle_yes	# not (greater, less, or equal)?
fscc_ngle_no:
	clr.b		%d0			# set false
	bra.w		fscc_done		# go finish
fscc_ngle_yes:
	st		%d0			# set true
	ori.l		&bsun_mask+aiop_mask, USER_FPSR(%a6) # set BSUN exc bit
	bra.w		fscc_chk_bsun		# go finish

#########################################################################
#									#
# Miscellaneous tests							#
#									#
# For the IEEE aware tests, we only have to set the result based on the	#
# floating point condition codes. The BSUN exception will not be	#
# set for any of these tests.						#
#									#
#########################################################################

#
# false:
#
#	False
#
fscc_f:
	clr.b		%d0			# set false
	bra.w		fscc_done		# go finish

#
# true:
#
#	True
#
fscc_t:
	st		%d0			# set true
	bra.w		fscc_done		# go finish

#
# signalling false:
#
#	False
#
fscc_sf:
	clr.b		%d0			# set false
	btst		&nan_bit, FPSR_CC(%a6) 	# set BSUN exc bit
	beq.w		fscc_done		# no;go finish
	ori.l		&bsun_mask+aiop_mask, USER_FPSR(%a6) # set BSUN exc bit
	bra.w		fscc_chk_bsun		# go finish

#
# signalling true:
#
#	True
#
fscc_st:
	st		%d0			# set false
	btst		&nan_bit, FPSR_CC(%a6) 	# set BSUN exc bit
	beq.w		fscc_done		# no;go finish
	ori.l		&bsun_mask+aiop_mask, USER_FPSR(%a6) # set BSUN exc bit
	bra.w		fscc_chk_bsun		# go finish

#
# signalling equal:
#
#	Z
#
fscc_seq:
	fbseq.w		fscc_seq_yes		# signalling equal?
fscc_seq_no:
	clr.b		%d0			# set false
	btst		&nan_bit, FPSR_CC(%a6) 	# set BSUN exc bit
	beq.w		fscc_done		# no;go finish
	ori.l		&bsun_mask+aiop_mask, USER_FPSR(%a6) # set BSUN exc bit
	bra.w		fscc_chk_bsun		# go finish
fscc_seq_yes:
	st		%d0			# set true
	btst		&nan_bit, FPSR_CC(%a6) 	# set BSUN exc bit
	beq.w		fscc_done		# no;go finish
	ori.l		&bsun_mask+aiop_mask, USER_FPSR(%a6) # set BSUN exc bit
	bra.w		fscc_chk_bsun		# go finish

#
# signalling not equal:
#	_
#	Z
#
fscc_sneq:
	fbsneq.w	fscc_sneq_yes		# signalling equal?
fscc_sneq_no:
	clr.b		%d0			# set false
	btst		&nan_bit, FPSR_CC(%a6) 	# set BSUN exc bit
	beq.w		fscc_done		# no;go finish
	ori.l		&bsun_mask+aiop_mask, USER_FPSR(%a6) # set BSUN exc bit
	bra.w		fscc_chk_bsun		# go finish
fscc_sneq_yes:
	st		%d0			# set true
	btst		&nan_bit, FPSR_CC(%a6) 	# set BSUN exc bit
	beq.w		fscc_done		# no;go finish
	ori.l		&bsun_mask+aiop_mask, USER_FPSR(%a6) # set BSUN exc bit
	bra.w		fscc_chk_bsun		# go finish

#########################################################################
#									#
# IEEE Aware tests							#
#									#
# For the IEEE aware tests, we only have to set the result based on the	#
# floating point condition codes. The BSUN exception will not be	#
# set for any of these tests.						#
#									#
#########################################################################

#
# ordered greater than:
#	_______
#	NANvZvN
#
fscc_ogt:
	fbogt.w		fscc_ogt_yes		# ordered greater than?
fscc_ogt_no:
	clr.b		%d0			# set false
	bra.w		fscc_done		# go finish
fscc_ogt_yes:
	st		%d0			# set true
	bra.w		fscc_done		# go finish

#
# unordered or less or equal:
#	_______
#	NANvZvN
#
fscc_ule:
	fbule.w		fscc_ule_yes		# unordered or less or equal?
fscc_ule_no:
	clr.b		%d0			# set false
	bra.w		fscc_done		# go finish
fscc_ule_yes:
	st		%d0			# set true
	bra.w		fscc_done		# go finish

#
# ordered greater than or equal:
#	   _____
#	Zv(NANvN)
#
fscc_oge:
	fboge.w		fscc_oge_yes		# ordered greater than or equal?
fscc_oge_no:
	clr.b		%d0			# set false
	bra.w		fscc_done		# go finish
fscc_oge_yes:
	st		%d0			# set true
	bra.w		fscc_done		# go finish

#
# unordered or less than:
#	       _
#	NANv(N^Z)
#
fscc_ult:
	fbult.w		fscc_ult_yes		# unordered or less than?
fscc_ult_no:
	clr.b		%d0			# set false
	bra.w		fscc_done		# go finish
fscc_ult_yes:
	st		%d0			# set true
	bra.w		fscc_done		# go finish

#
# ordered less than:
#	   _____
#	N^(NANvZ)
#
fscc_olt:
	fbolt.w		fscc_olt_yes		# ordered less than?
fscc_olt_no:
	clr.b		%d0			# set false
	bra.w		fscc_done		# go finish
fscc_olt_yes:
	st		%d0			# set true
	bra.w		fscc_done		# go finish

#
# unordered or greater or equal:
#
#	NANvZvN
#
fscc_uge:
	fbuge.w		fscc_uge_yes		# unordered or greater than?
fscc_uge_no:
	clr.b		%d0			# set false
	bra.w		fscc_done		# go finish
fscc_uge_yes:
	st		%d0			# set true
	bra.w		fscc_done		# go finish

#
# ordered less than or equal:
#	     ___
#	Zv(N^NAN)
#
fscc_ole:
	fbole.w		fscc_ole_yes		# ordered greater or less than?
fscc_ole_no:
	clr.b		%d0			# set false
	bra.w		fscc_done		# go finish
fscc_ole_yes:
	st		%d0			# set true
	bra.w		fscc_done		# go finish

#
# unordered or greater than:
#	     ___
#	NANv(NvZ)
#
fscc_ugt:
	fbugt.w		fscc_ugt_yes		# unordered or greater than?
fscc_ugt_no:
	clr.b		%d0			# set false
	bra.w		fscc_done		# go finish
fscc_ugt_yes:
	st		%d0			# set true
	bra.w		fscc_done		# go finish

#
# ordered greater or less than:
#	_____
#	NANvZ
#
fscc_ogl:
	fbogl.w		fscc_ogl_yes		# ordered greater or less than?
fscc_ogl_no:
	clr.b		%d0			# set false
	bra.w		fscc_done		# go finish
fscc_ogl_yes:
	st		%d0			# set true
	bra.w		fscc_done		# go finish

#
# unordered or equal:
#
#	NANvZ
#
fscc_ueq:
	fbueq.w		fscc_ueq_yes		# unordered or equal?
fscc_ueq_no:
	clr.b		%d0			# set false
	bra.w		fscc_done		# go finish
fscc_ueq_yes:
	st		%d0			# set true
	bra.w		fscc_done		# go finish

#
# ordered:
#	___
#	NAN
#
fscc_or:
	fbor.w		fscc_or_yes		# ordered?
fscc_or_no:
	clr.b		%d0			# set false
	bra.w		fscc_done		# go finish
fscc_or_yes:
	st		%d0			# set true
	bra.w		fscc_done		# go finish

#
# unordered:
#
#	NAN
#
fscc_un:
	fbun.w		fscc_un_yes		# unordered?
fscc_un_no:
	clr.b		%d0			# set false
	bra.w		fscc_done		# go finish
fscc_un_yes:
	st		%d0			# set true
	bra.w		fscc_done		# go finish

#######################################################################

#
# the bsun exception bit was set. now, check to see is BSUN 
# is enabled. if so, don't store result and correct stack frame
# for a bsun exception.
#
fscc_chk_bsun:
	btst		&bsun_bit,FPCR_ENABLE(%a6) # was BSUN set?
	bne.w		fscc_bsun

#
# the bsun exception bit was not set.
# the result has been selected.
# now, check to see if the result is to be stored in the data register
# file or in memory.
#
fscc_done:
	mov.l		%d0,%a0			# save result for a moment

	mov.b		1+EXC_OPWORD(%a6),%d1	# fetch lo opword 
	mov.l		%d1,%d0			# make a copy
	andi.b		&0x38,%d1		# extract src mode

	bne.b		fscc_mem_op		# it's a memory operation

	mov.l		%d0,%d1
	andi.w		&0x7,%d1		# pass index in d1
	mov.l		%a0,%d0			# pass result in d0
	bsr.l		store_dreg_b		# save result in regfile
	rts

#
# the stacked <ea> is correct with the exception of:
# 	-> Dn : <ea> is garbage
#
# if the addressing mode is post-increment or pre-decrement,
# then the address registers have not been updated.
#
fscc_mem_op:
	cmpi.b		%d1,&0x18		# is <ea> (An)+ ?
	beq.b		fscc_mem_inc		# yes
	cmpi.b		%d1,&0x20		# is <ea> -(An) ?
	beq.b		fscc_mem_dec		# yes

	mov.l		%a0,%d0			# pass result in d0
	mov.l		EXC_EA(%a6),%a0		# fetch <ea>
	bsr.l		_dmem_write_byte	# write result byte	

	tst.l		%d1			# did dstore fail?
	bne.w		fscc_err		# yes

	rts

# addresing mode is post-increment. write the result byte. if the write
# fails then don't update the address register. if write passes then
# call inc_areg() to update the address register.
fscc_mem_inc:
	mov.l		%a0,%d0			# pass result in d0
	mov.l		EXC_EA(%a6),%a0		# fetch <ea>
	bsr.l		_dmem_write_byte	# write result byte

	tst.l		%d1			# did dstore fail?
	bne.w		fscc_err		# yes

	mov.b		0x1+EXC_OPWORD(%a6),%d1	# fetch opword
	andi.w		&0x7,%d1		# pass index in d1
	movq.l		&0x1,%d0		# pass amt to inc by
	bsr.l		inc_areg		# increment address register

	rts

# addressing mode is pre-decrement. write the result byte. if the write
# fails then don't update the address register. if the write passes then
# call dec_areg() to update the address register.
fscc_mem_dec:
	mov.l		%a0,%d0			# pass result in d0
	mov.l		EXC_EA(%a6),%a0		# fetch <ea>
	bsr.l		_dmem_write_byte	# write result byte

	tst.l		%d1			# did dstore fail?
	bne.w		fscc_err		# yes

	mov.b		0x1+EXC_OPWORD(%a6),%d1	# fetch opword
	andi.w		&0x7,%d1		# pass index in d1
	movq.l		&0x1,%d0		# pass amt to dec by
	bsr.l		dec_areg		# decrement address register

	rts

# the emulation routine set bsun and BSUN was enabled. have to
# fix stack and jump to the bsun handler.
# let the caller of this routine shift the stack frame up to
# eliminate the effective address field.
fscc_bsun:
	mov.b		&fbsun_flg,SPCOND_FLG(%a6)
	rts

# the byte write to memory has failed. pass the failing effective address
# and a FSLW to funimp_dacc().
fscc_err:
	mov.w		&0x00a1,EXC_VOFF(%a6)
	bra.l		facc_finish

#########################################################################
# XDEF ****************************************************************	#
#	fmovm_dynamic(): emulate "fmovm" dynamic instruction		#
#									#
# XREF ****************************************************************	#
#	fetch_dreg() - fetch data register				#
#	{i,d,}mem_read() - fetch data from memory			#
#	_mem_write() - write data to memory				#
#	iea_iacc() - instruction memory access error occurred		#
#	iea_dacc() - data memory access error occurred			#
#	restore() - restore An index regs if access error occurred	#
#									#
# INPUT ***************************************************************	#
#	None								#
# 									#
# OUTPUT **************************************************************	#
#	If instr is "fmovm Dn,-(A7)" from supervisor mode,		#
#		d0 = size of dump					#
#		d1 = Dn							#
#	Else if instruction access error,				#
#		d0 = FSLW						#
#	Else if data access error,					#
#		d0 = FSLW						#
#		a0 = address of fault					#
#	Else								#
#		none.							#
#									#
# ALGORITHM ***********************************************************	#
#	The effective address must be calculated since this is entered	#
# from an "Unimplemented Effective Address" exception handler. So, we	#
# have our own fcalc_ea() routine here. If an access error is flagged	#
# by a _{i,d,}mem_read() call, we must exit through the special		#
# handler.								#
#	The data register is determined and its value loaded to get the	#
# string of FP registers affected. This value is used as an index into	#
# a lookup table such that we can determine the number of bytes		#
# involved. 								#
#	If the instruction is "fmovm.x <ea>,Dn", a _mem_read() is used	#
# to read in all FP values. Again, _mem_read() may fail and require a	#
# special exit. 							#
#	If the instruction is "fmovm.x DN,<ea>", a _mem_write() is used	#
# to write all FP values. _mem_write() may also fail.			#
# 	If the instruction is "fmovm.x DN,-(a7)" from supervisor mode,	#
# then we return the size of the dump and the string to the caller	#
# so that the move can occur outside of this routine. This special	#
# case is required so that moves to the system stack are handled	#
# correctly.								#
#									#
# DYNAMIC:								#
# 	fmovm.x	dn, <ea>						#
# 	fmovm.x	<ea>, dn						#
#									#
#	      <WORD 1>		      <WORD2>				#
#	1111 0010 00 |<ea>|	11@& 1000 0$$$ 0000			#
#					  				#
#	& = (0): predecrement addressing mode				#
#	    (1): postincrement or control addressing mode		#
#	@ = (0): move listed regs from memory to the FPU		#
#	    (1): move listed regs from the FPU to memory		#
#	$$$    : index of data register holding reg select mask		#
#									#
# NOTES:								#
#	If the data register holds a zero, then the			#
#	instruction is a nop.						#
#									#
#########################################################################

	global		fmovm_dynamic
fmovm_dynamic:

# extract the data register in which the bit string resides...
	mov.b		1+EXC_EXTWORD(%a6),%d1	# fetch extword
	andi.w		&0x70,%d1		# extract reg bits
	lsr.b		&0x4,%d1		# shift into lo bits

# fetch the bit string into d0...
	bsr.l		fetch_dreg		# fetch reg string

	andi.l		&0x000000ff,%d0		# keep only lo byte

	mov.l		%d0,-(%sp)		# save strg
	mov.b		(tbl_fmovm_size.w,%pc,%d0),%d0
	mov.l		%d0,-(%sp)		# save size
	bsr.l		fmovm_calc_ea		# calculate <ea>
	mov.l		(%sp)+,%d0		# restore size
	mov.l		(%sp)+,%d1		# restore strg

# if the bit string is a zero, then the operation is a no-op
# but, make sure that we've calculated ea and advanced the opword pointer
	beq.w		fmovm_data_done

# separate move ins from move outs...
	btst		&0x5,EXC_EXTWORD(%a6)	# is it a move in or out?
	beq.w		fmovm_data_in		# it's a move out

#############
# MOVE OUT: #
#############
fmovm_data_out:
	btst		&0x4,EXC_EXTWORD(%a6)	# control or predecrement?
	bne.w		fmovm_out_ctrl		# control

############################
fmovm_out_predec:
# for predecrement mode, the bit string is the opposite of both control
# operations and postincrement mode. (bit7 = FP7 ... bit0 = FP0)
# here, we convert it to be just like the others...
	mov.b		(tbl_fmovm_convert.w,%pc,%d1.w*1),%d1

	btst		&0x5,EXC_SR(%a6)	# user or supervisor mode?
	beq.b		fmovm_out_ctrl		# user

fmovm_out_predec_s:
	cmpi.b		SPCOND_FLG(%a6),&mda7_flg # is <ea> mode -(a7)?
	bne.b		fmovm_out_ctrl

# the operation was unfortunately an: fmovm.x dn,-(sp)
# called from supervisor mode.
# we're also passing "size" and "strg" back to the calling routine
	rts

############################
fmovm_out_ctrl:
	mov.l		%a0,%a1			# move <ea> to a1

	sub.l		%d0,%sp			# subtract size of dump
	lea		(%sp),%a0

	tst.b		%d1			# should FP0 be moved?
	bpl.b		fmovm_out_ctrl_fp1	# no

	mov.l		0x0+EXC_FP0(%a6),(%a0)+	# yes
	mov.l		0x4+EXC_FP0(%a6),(%a0)+
	mov.l		0x8+EXC_FP0(%a6),(%a0)+

fmovm_out_ctrl_fp1:
	lsl.b		&0x1,%d1		# should FP1 be moved?
	bpl.b		fmovm_out_ctrl_fp2	# no

	mov.l		0x0+EXC_FP1(%a6),(%a0)+	# yes
	mov.l		0x4+EXC_FP1(%a6),(%a0)+
	mov.l		0x8+EXC_FP1(%a6),(%a0)+

fmovm_out_ctrl_fp2:
	lsl.b		&0x1,%d1		# should FP2 be moved?
	bpl.b		fmovm_out_ctrl_fp3	# no

	fmovm.x		&0x20,(%a0)		# yes
	add.l		&0xc,%a0

fmovm_out_ctrl_fp3:
	lsl.b		&0x1,%d1		# should FP3 be moved?
	bpl.b		fmovm_out_ctrl_fp4	# no

	fmovm.x		&0x10,(%a0)		# yes
	add.l		&0xc,%a0

fmovm_out_ctrl_fp4:
	lsl.b		&0x1,%d1		# should FP4 be moved?
	bpl.b		fmovm_out_ctrl_fp5	# no

	fmovm.x		&0x08,(%a0)		# yes
	add.l		&0xc,%a0

fmovm_out_ctrl_fp5:
	lsl.b		&0x1,%d1		# should FP5 be moved?
	bpl.b		fmovm_out_ctrl_fp6	# no

	fmovm.x		&0x04,(%a0)		# yes
	add.l		&0xc,%a0

fmovm_out_ctrl_fp6:
	lsl.b		&0x1,%d1		# should FP6 be moved?
	bpl.b		fmovm_out_ctrl_fp7	# no

	fmovm.x		&0x02,(%a0)		# yes
	add.l		&0xc,%a0

fmovm_out_ctrl_fp7:
	lsl.b		&0x1,%d1		# should FP7 be moved?
	bpl.b		fmovm_out_ctrl_done	# no

	fmovm.x		&0x01,(%a0)		# yes
	add.l		&0xc,%a0

fmovm_out_ctrl_done:
	mov.l		%a1,L_SCR1(%a6)

	lea		(%sp),%a0		# pass: supervisor src
	mov.l		%d0,-(%sp)		# save size
	bsr.l		_dmem_write		# copy data to user mem

	mov.l		(%sp)+,%d0
	add.l		%d0,%sp			# clear fpreg data from stack

	tst.l		%d1			# did dstore err?
	bne.w		fmovm_out_err		# yes

	rts

############
# MOVE IN: #
############
fmovm_data_in:
	mov.l		%a0,L_SCR1(%a6)

	sub.l		%d0,%sp			# make room for fpregs
	lea		(%sp),%a1

	mov.l		%d1,-(%sp)		# save bit string for later
	mov.l		%d0,-(%sp)		# save # of bytes

	bsr.l		_dmem_read		# copy data from user mem

	mov.l		(%sp)+,%d0		# retrieve # of bytes

	tst.l		%d1			# did dfetch fail?
	bne.w		fmovm_in_err		# yes

	mov.l		(%sp)+,%d1		# load bit string

	lea		(%sp),%a0		# addr of stack

	tst.b		%d1			# should FP0 be moved?
	bpl.b		fmovm_data_in_fp1	# no

	mov.l		(%a0)+,0x0+EXC_FP0(%a6)	# yes
	mov.l		(%a0)+,0x4+EXC_FP0(%a6)
	mov.l		(%a0)+,0x8+EXC_FP0(%a6)

fmovm_data_in_fp1:
	lsl.b		&0x1,%d1		# should FP1 be moved?
	bpl.b		fmovm_data_in_fp2	# no

	mov.l		(%a0)+,0x0+EXC_FP1(%a6)	# yes
	mov.l		(%a0)+,0x4+EXC_FP1(%a6)
	mov.l		(%a0)+,0x8+EXC_FP1(%a6)

fmovm_data_in_fp2:
	lsl.b		&0x1,%d1		# should FP2 be moved?
	bpl.b		fmovm_data_in_fp3	# no

	fmovm.x		(%a0)+,&0x20		# yes

fmovm_data_in_fp3:
	lsl.b		&0x1,%d1		# should FP3 be moved?
	bpl.b		fmovm_data_in_fp4	# no

	fmovm.x		(%a0)+,&0x10		# yes

fmovm_data_in_fp4:
	lsl.b		&0x1,%d1		# should FP4 be moved?
	bpl.b		fmovm_data_in_fp5	# no

	fmovm.x		(%a0)+,&0x08		# yes

fmovm_data_in_fp5:
	lsl.b		&0x1,%d1		# should FP5 be moved?
	bpl.b		fmovm_data_in_fp6	# no

	fmovm.x		(%a0)+,&0x04		# yes

fmovm_data_in_fp6:
	lsl.b		&0x1,%d1		# should FP6 be moved?
	bpl.b		fmovm_data_in_fp7	# no

	fmovm.x		(%a0)+,&0x02		# yes

fmovm_data_in_fp7:
	lsl.b		&0x1,%d1		# should FP7 be moved?
	bpl.b		fmovm_data_in_done	# no

	fmovm.x		(%a0)+,&0x01		# yes

fmovm_data_in_done:
	add.l		%d0,%sp			# remove fpregs from stack
	rts

#####################################

fmovm_data_done:
	rts

##############################################################################

#
# table indexed by the operation's bit string that gives the number
# of bytes that will be moved.
#
# number of bytes = (# of 1's in bit string) * 12(bytes/fpreg)
#
tbl_fmovm_size:
	byte	0x00,0x0c,0x0c,0x18,0x0c,0x18,0x18,0x24
	byte	0x0c,0x18,0x18,0x24,0x18,0x24,0x24,0x30
	byte	0x0c,0x18,0x18,0x24,0x18,0x24,0x24,0x30
	byte	0x18,0x24,0x24,0x30,0x24,0x30,0x30,0x3c
	byte	0x0c,0x18,0x18,0x24,0x18,0x24,0x24,0x30
	byte	0x18,0x24,0x24,0x30,0x24,0x30,0x30,0x3c
	byte	0x18,0x24,0x24,0x30,0x24,0x30,0x30,0x3c
	byte	0x24,0x30,0x30,0x3c,0x30,0x3c,0x3c,0x48
	byte	0x0c,0x18,0x18,0x24,0x18,0x24,0x24,0x30
	byte	0x18,0x24,0x24,0x30,0x24,0x30,0x30,0x3c
	byte	0x18,0x24,0x24,0x30,0x24,0x30,0x30,0x3c
	byte	0x24,0x30,0x30,0x3c,0x30,0x3c,0x3c,0x48
	byte	0x18,0x24,0x24,0x30,0x24,0x30,0x30,0x3c
	byte	0x24,0x30,0x30,0x3c,0x30,0x3c,0x3c,0x48
	byte	0x24,0x30,0x30,0x3c,0x30,0x3c,0x3c,0x48
	byte	0x30,0x3c,0x3c,0x48,0x3c,0x48,0x48,0x54
	byte	0x0c,0x18,0x18,0x24,0x18,0x24,0x24,0x30
	byte	0x18,0x24,0x24,0x30,0x24,0x30,0x30,0x3c
	byte	0x18,0x24,0x24,0x30,0x24,0x30,0x30,0x3c
	byte	0x24,0x30,0x30,0x3c,0x30,0x3c,0x3c,0x48
	byte	0x18,0x24,0x24,0x30,0x24,0x30,0x30,0x3c
	byte	0x24,0x30,0x30,0x3c,0x30,0x3c,0x3c,0x48
	byte	0x24,0x30,0x30,0x3c,0x30,0x3c,0x3c,0x48
	byte	0x30,0x3c,0x3c,0x48,0x3c,0x48,0x48,0x54
	byte	0x18,0x24,0x24,0x30,0x24,0x30,0x30,0x3c
	byte	0x24,0x30,0x30,0x3c,0x30,0x3c,0x3c,0x48
	byte	0x24,0x30,0x30,0x3c,0x30,0x3c,0x3c,0x48
	byte	0x30,0x3c,0x3c,0x48,0x3c,0x48,0x48,0x54
	byte	0x24,0x30,0x30,0x3c,0x30,0x3c,0x3c,0x48
	byte	0x30,0x3c,0x3c,0x48,0x3c,0x48,0x48,0x54
	byte	0x30,0x3c,0x3c,0x48,0x3c,0x48,0x48,0x54
	byte	0x3c,0x48,0x48,0x54,0x48,0x54,0x54,0x60	

#
# table to convert a pre-decrement bit string into a post-increment
# or control bit string.
# ex: 	0x00	==>	0x00
#	0x01	==>	0x80
#	0x02	==>	0x40
#		.
#		.
#	0xfd	==>	0xbf
#	0xfe	==>	0x7f
#	0xff	==>	0xff
#
tbl_fmovm_convert:
	byte	0x00,0x80,0x40,0xc0,0x20,0xa0,0x60,0xe0
	byte	0x10,0x90,0x50,0xd0,0x30,0xb0,0x70,0xf0
	byte	0x08,0x88,0x48,0xc8,0x28,0xa8,0x68,0xe8
	byte	0x18,0x98,0x58,0xd8,0x38,0xb8,0x78,0xf8
	byte	0x04,0x84,0x44,0xc4,0x24,0xa4,0x64,0xe4
	byte	0x14,0x94,0x54,0xd4,0x34,0xb4,0x74,0xf4
	byte	0x0c,0x8c,0x4c,0xcc,0x2c,0xac,0x6c,0xec
	byte	0x1c,0x9c,0x5c,0xdc,0x3c,0xbc,0x7c,0xfc
	byte	0x02,0x82,0x42,0xc2,0x22,0xa2,0x62,0xe2
	byte	0x12,0x92,0x52,0xd2,0x32,0xb2,0x72,0xf2
	byte	0x0a,0x8a,0x4a,0xca,0x2a,0xaa,0x6a,0xea
	byte	0x1a,0x9a,0x5a,0xda,0x3a,0xba,0x7a,0xfa
	byte	0x06,0x86,0x46,0xc6,0x26,0xa6,0x66,0xe6
	byte	0x16,0x96,0x56,0xd6,0x36,0xb6,0x76,0xf6
	byte	0x0e,0x8e,0x4e,0xce,0x2e,0xae,0x6e,0xee
	byte	0x1e,0x9e,0x5e,0xde,0x3e,0xbe,0x7e,0xfe
	byte	0x01,0x81,0x41,0xc1,0x21,0xa1,0x61,0xe1
	byte	0x11,0x91,0x51,0xd1,0x31,0xb1,0x71,0xf1
	byte	0x09,0x89,0x49,0xc9,0x29,0xa9,0x69,0xe9
	byte	0x19,0x99,0x59,0xd9,0x39,0xb9,0x79,0xf9
	byte	0x05,0x85,0x45,0xc5,0x25,0xa5,0x65,0xe5
	byte	0x15,0x95,0x55,0xd5,0x35,0xb5,0x75,0xf5
	byte	0x0d,0x8d,0x4d,0xcd,0x2d,0xad,0x6d,0xed
	byte	0x1d,0x9d,0x5d,0xdd,0x3d,0xbd,0x7d,0xfd
	byte	0x03,0x83,0x43,0xc3,0x23,0xa3,0x63,0xe3
	byte	0x13,0x93,0x53,0xd3,0x33,0xb3,0x73,0xf3
	byte	0x0b,0x8b,0x4b,0xcb,0x2b,0xab,0x6b,0xeb
	byte	0x1b,0x9b,0x5b,0xdb,0x3b,0xbb,0x7b,0xfb
	byte	0x07,0x87,0x47,0xc7,0x27,0xa7,0x67,0xe7
	byte	0x17,0x97,0x57,0xd7,0x37,0xb7,0x77,0xf7
	byte	0x0f,0x8f,0x4f,0xcf,0x2f,0xaf,0x6f,0xef
	byte	0x1f,0x9f,0x5f,0xdf,0x3f,0xbf,0x7f,0xff

	global		fmovm_calc_ea
###############################################
# _fmovm_calc_ea: calculate effective address #
###############################################
fmovm_calc_ea:
	mov.l		%d0,%a0			# move # bytes to a0

# currently, MODE and REG are taken from the EXC_OPWORD. this could be
# easily changed if they were inputs passed in registers.
	mov.w		EXC_OPWORD(%a6),%d0	# fetch opcode word
	mov.w		%d0,%d1			# make a copy

	andi.w		&0x3f,%d0		# extract mode field
	andi.l		&0x7,%d1		# extract reg  field

# jump to the corresponding function for each {MODE,REG} pair.
	mov.w		(tbl_fea_mode.b,%pc,%d0.w*2),%d0 # fetch jmp distance
	jmp		(tbl_fea_mode.b,%pc,%d0.w*1) # jmp to correct ea mode

	swbeg		&64
tbl_fea_mode:
	short		tbl_fea_mode	-	tbl_fea_mode
	short		tbl_fea_mode	-	tbl_fea_mode
	short		tbl_fea_mode	-	tbl_fea_mode
	short		tbl_fea_mode	-	tbl_fea_mode
	short		tbl_fea_mode	-	tbl_fea_mode
	short		tbl_fea_mode	-	tbl_fea_mode
	short		tbl_fea_mode	-	tbl_fea_mode
	short		tbl_fea_mode	-	tbl_fea_mode

	short		tbl_fea_mode	-	tbl_fea_mode
	short		tbl_fea_mode	-	tbl_fea_mode
	short		tbl_fea_mode	-	tbl_fea_mode
	short		tbl_fea_mode	-	tbl_fea_mode
	short		tbl_fea_mode	-	tbl_fea_mode
	short		tbl_fea_mode	-	tbl_fea_mode
	short		tbl_fea_mode	-	tbl_fea_mode
	short		tbl_fea_mode	-	tbl_fea_mode

	short		faddr_ind_a0	- 	tbl_fea_mode
	short		faddr_ind_a1	- 	tbl_fea_mode
	short		faddr_ind_a2	- 	tbl_fea_mode
	short		faddr_ind_a3 	- 	tbl_fea_mode
	short		faddr_ind_a4 	- 	tbl_fea_mode
	short		faddr_ind_a5 	- 	tbl_fea_mode
	short		faddr_ind_a6 	- 	tbl_fea_mode
	short		faddr_ind_a7 	- 	tbl_fea_mode

	short		faddr_ind_p_a0	- 	tbl_fea_mode
	short		faddr_ind_p_a1 	- 	tbl_fea_mode
	short		faddr_ind_p_a2 	- 	tbl_fea_mode
	short		faddr_ind_p_a3 	- 	tbl_fea_mode
	short		faddr_ind_p_a4 	- 	tbl_fea_mode
	short		faddr_ind_p_a5 	- 	tbl_fea_mode
	short		faddr_ind_p_a6 	- 	tbl_fea_mode
	short		faddr_ind_p_a7 	- 	tbl_fea_mode

	short		faddr_ind_m_a0 	- 	tbl_fea_mode
	short		faddr_ind_m_a1 	- 	tbl_fea_mode
	short		faddr_ind_m_a2 	- 	tbl_fea_mode
	short		faddr_ind_m_a3 	- 	tbl_fea_mode
	short		faddr_ind_m_a4 	- 	tbl_fea_mode
	short		faddr_ind_m_a5 	- 	tbl_fea_mode
	short		faddr_ind_m_a6 	- 	tbl_fea_mode
	short		faddr_ind_m_a7 	- 	tbl_fea_mode

	short		faddr_ind_disp_a0	- 	tbl_fea_mode
	short		faddr_ind_disp_a1 	- 	tbl_fea_mode
	short		faddr_ind_disp_a2 	- 	tbl_fea_mode
	short		faddr_ind_disp_a3 	- 	tbl_fea_mode
	short		faddr_ind_disp_a4 	- 	tbl_fea_mode
	short		faddr_ind_disp_a5 	- 	tbl_fea_mode
	short		faddr_ind_disp_a6 	- 	tbl_fea_mode
	short		faddr_ind_disp_a7	-	tbl_fea_mode

	short		faddr_ind_ext 	- 	tbl_fea_mode
	short		faddr_ind_ext 	- 	tbl_fea_mode
	short		faddr_ind_ext 	- 	tbl_fea_mode
	short		faddr_ind_ext 	- 	tbl_fea_mode
	short		faddr_ind_ext 	- 	tbl_fea_mode
	short		faddr_ind_ext 	- 	tbl_fea_mode
	short		faddr_ind_ext 	- 	tbl_fea_mode
	short		faddr_ind_ext 	- 	tbl_fea_mode

	short		fabs_short	- 	tbl_fea_mode
	short		fabs_long	- 	tbl_fea_mode
	short		fpc_ind		- 	tbl_fea_mode
	short		fpc_ind_ext	- 	tbl_fea_mode
	short		tbl_fea_mode	- 	tbl_fea_mode
	short		tbl_fea_mode	- 	tbl_fea_mode
	short		tbl_fea_mode	- 	tbl_fea_mode
	short		tbl_fea_mode	- 	tbl_fea_mode

###################################
# Address register indirect: (An) #
###################################
faddr_ind_a0:
	mov.l		EXC_DREGS+0x8(%a6),%a0	# Get current a0
	rts

faddr_ind_a1:
	mov.l		EXC_DREGS+0xc(%a6),%a0	# Get current a1
	rts

faddr_ind_a2:
	mov.l		%a2,%a0			# Get current a2
	rts

faddr_ind_a3:
	mov.l		%a3,%a0			# Get current a3
	rts

faddr_ind_a4:
	mov.l		%a4,%a0			# Get current a4
	rts

faddr_ind_a5:
	mov.l		%a5,%a0			# Get current a5
	rts

faddr_ind_a6:
	mov.l		(%a6),%a0		# Get current a6
	rts

faddr_ind_a7:
	mov.l		EXC_A7(%a6),%a0		# Get current a7
	rts

#####################################################
# Address register indirect w/ postincrement: (An)+ #
#####################################################
faddr_ind_p_a0:
	mov.l		EXC_DREGS+0x8(%a6),%d0	# Get current a0
	mov.l		%d0,%d1
	add.l		%a0,%d1			# Increment
	mov.l		%d1,EXC_DREGS+0x8(%a6)	# Save incr value
	mov.l		%d0,%a0
	rts

faddr_ind_p_a1:
	mov.l		EXC_DREGS+0xc(%a6),%d0	# Get current a1
	mov.l		%d0,%d1
	add.l		%a0,%d1			# Increment
	mov.l		%d1,EXC_DREGS+0xc(%a6)	# Save incr value
	mov.l		%d0,%a0
	rts

faddr_ind_p_a2:
	mov.l		%a2,%d0			# Get current a2
	mov.l		%d0,%d1
	add.l		%a0,%d1			# Increment
	mov.l		%d1,%a2			# Save incr value
	mov.l		%d0,%a0
	rts

faddr_ind_p_a3:
	mov.l		%a3,%d0			# Get current a3
	mov.l		%d0,%d1
	add.l		%a0,%d1			# Increment
	mov.l		%d1,%a3			# Save incr value
	mov.l		%d0,%a0
	rts

faddr_ind_p_a4:
	mov.l		%a4,%d0			# Get current a4
	mov.l		%d0,%d1
	add.l		%a0,%d1			# Increment
	mov.l		%d1,%a4			# Save incr value
	mov.l		%d0,%a0
	rts

faddr_ind_p_a5:
	mov.l		%a5,%d0			# Get current a5
	mov.l		%d0,%d1
	add.l		%a0,%d1			# Increment
	mov.l		%d1,%a5			# Save incr value
	mov.l		%d0,%a0
	rts

faddr_ind_p_a6:
	mov.l		(%a6),%d0		# Get current a6
	mov.l		%d0,%d1
	add.l		%a0,%d1			# Increment
	mov.l		%d1,(%a6)		# Save incr value
	mov.l		%d0,%a0
	rts

faddr_ind_p_a7:
	mov.b		&mia7_flg,SPCOND_FLG(%a6) # set "special case" flag

	mov.l		EXC_A7(%a6),%d0		# Get current a7
	mov.l		%d0,%d1
	add.l		%a0,%d1			# Increment
	mov.l		%d1,EXC_A7(%a6)		# Save incr value
	mov.l		%d0,%a0
	rts

####################################################
# Address register indirect w/ predecrement: -(An) #
####################################################
faddr_ind_m_a0:
	mov.l		EXC_DREGS+0x8(%a6),%d0	# Get current a0
	sub.l		%a0,%d0			# Decrement
	mov.l		%d0,EXC_DREGS+0x8(%a6)	# Save decr value
	mov.l		%d0,%a0
	rts

faddr_ind_m_a1:
	mov.l		EXC_DREGS+0xc(%a6),%d0	# Get current a1
	sub.l		%a0,%d0			# Decrement
	mov.l		%d0,EXC_DREGS+0xc(%a6)	# Save decr value
	mov.l		%d0,%a0
	rts

faddr_ind_m_a2:
	mov.l		%a2,%d0			# Get current a2
	sub.l		%a0,%d0			# Decrement
	mov.l		%d0,%a2			# Save decr value
	mov.l		%d0,%a0
	rts

faddr_ind_m_a3:
	mov.l		%a3,%d0			# Get current a3
	sub.l		%a0,%d0			# Decrement
	mov.l		%d0,%a3			# Save decr value
	mov.l		%d0,%a0
	rts

faddr_ind_m_a4:
	mov.l		%a4,%d0			# Get current a4
	sub.l		%a0,%d0			# Decrement
	mov.l		%d0,%a4			# Save decr value
	mov.l		%d0,%a0
	rts

faddr_ind_m_a5:
	mov.l		%a5,%d0			# Get current a5
	sub.l		%a0,%d0			# Decrement
	mov.l		%d0,%a5			# Save decr value
	mov.l		%d0,%a0
	rts

faddr_ind_m_a6:
	mov.l		(%a6),%d0		# Get current a6
	sub.l		%a0,%d0			# Decrement
	mov.l		%d0,(%a6)		# Save decr value
	mov.l		%d0,%a0
	rts

faddr_ind_m_a7:
	mov.b		&mda7_flg,SPCOND_FLG(%a6) # set "special case" flag

	mov.l		EXC_A7(%a6),%d0		# Get current a7
	sub.l		%a0,%d0			# Decrement
	mov.l		%d0,EXC_A7(%a6)		# Save decr value
	mov.l		%d0,%a0
	rts

########################################################
# Address register indirect w/ displacement: (d16, An) #
########################################################
faddr_ind_disp_a0:
	mov.l		EXC_EXTWPTR(%a6),%a0	# fetch instruction addr
	addq.l		&0x2,EXC_EXTWPTR(%a6)	# incr instruction ptr
	bsr.l		_imem_read_word

	tst.l		%d1			# did ifetch fail?
	bne.l		iea_iacc		# yes

	mov.w		%d0,%a0			# sign extend displacement

	add.l		EXC_DREGS+0x8(%a6),%a0	# a0 + d16
	rts

faddr_ind_disp_a1:
	mov.l		EXC_EXTWPTR(%a6),%a0	# fetch instruction addr
	addq.l		&0x2,EXC_EXTWPTR(%a6)	# incr instruction ptr
	bsr.l		_imem_read_word

	tst.l		%d1			# did ifetch fail?
	bne.l		iea_iacc		# yes

	mov.w		%d0,%a0			# sign extend displacement

	add.l		EXC_DREGS+0xc(%a6),%a0	# a1 + d16
	rts

faddr_ind_disp_a2:
	mov.l		EXC_EXTWPTR(%a6),%a0	# fetch instruction addr
	addq.l		&0x2,EXC_EXTWPTR(%a6)	# incr instruction ptr
	bsr.l		_imem_read_word

	tst.l		%d1			# did ifetch fail?
	bne.l		iea_iacc		# yes

	mov.w		%d0,%a0			# sign extend displacement

	add.l		%a2,%a0			# a2 + d16
	rts

faddr_ind_disp_a3:
	mov.l		EXC_EXTWPTR(%a6),%a0	# fetch instruction addr
	addq.l		&0x2,EXC_EXTWPTR(%a6)	# incr instruction ptr
	bsr.l		_imem_read_word

	tst.l		%d1			# did ifetch fail?
	bne.l		iea_iacc		# yes

	mov.w		%d0,%a0			# sign extend displacement

	add.l		%a3,%a0			# a3 + d16
	rts

faddr_ind_disp_a4:
	mov.l		EXC_EXTWPTR(%a6),%a0	# fetch instruction addr
	addq.l		&0x2,EXC_EXTWPTR(%a6)	# incr instruction ptr
	bsr.l		_imem_read_word

	tst.l		%d1			# did ifetch fail?
	bne.l		iea_iacc		# yes

	mov.w		%d0,%a0			# sign extend displacement

	add.l		%a4,%a0			# a4 + d16
	rts

faddr_ind_disp_a5:
	mov.l		EXC_EXTWPTR(%a6),%a0	# fetch instruction addr
	addq.l		&0x2,EXC_EXTWPTR(%a6)	# incr instruction ptr
	bsr.l		_imem_read_word

	tst.l		%d1			# did ifetch fail?
	bne.l		iea_iacc		# yes

	mov.w		%d0,%a0			# sign extend displacement

	add.l		%a5,%a0			# a5 + d16
	rts

faddr_ind_disp_a6:
	mov.l		EXC_EXTWPTR(%a6),%a0	# fetch instruction addr
	addq.l		&0x2,EXC_EXTWPTR(%a6)	# incr instruction ptr
	bsr.l		_imem_read_word

	tst.l		%d1			# did ifetch fail?
	bne.l		iea_iacc		# yes

	mov.w		%d0,%a0			# sign extend displacement

	add.l		(%a6),%a0		# a6 + d16
	rts

faddr_ind_disp_a7:
	mov.l		EXC_EXTWPTR(%a6),%a0	# fetch instruction addr
	addq.l		&0x2,EXC_EXTWPTR(%a6)	# incr instruction ptr
	bsr.l		_imem_read_word

	tst.l		%d1			# did ifetch fail?
	bne.l		iea_iacc		# yes

	mov.w		%d0,%a0			# sign extend displacement

	add.l		EXC_A7(%a6),%a0		# a7 + d16
	rts

########################################################################
# Address register indirect w/ index(8-bit displacement): (d8, An, Xn) #
#    "       "         "    w/   "  (base displacement): (bd, An, Xn)  #
# Memory indirect postindexed: ([bd, An], Xn, od)		       #
# Memory indirect preindexed: ([bd, An, Xn], od)		       #
########################################################################
faddr_ind_ext:
	addq.l		&0x8,%d1
	bsr.l		fetch_dreg		# fetch base areg
	mov.l		%d0,-(%sp)

	mov.l		EXC_EXTWPTR(%a6),%a0	# fetch instruction addr
	addq.l		&0x2,EXC_EXTWPTR(%a6)	# incr instruction ptr
	bsr.l		_imem_read_word		# fetch extword in d0

	tst.l		%d1			# did ifetch fail?
	bne.l		iea_iacc		# yes

	mov.l		(%sp)+,%a0

	btst		&0x8,%d0
	bne.w		fcalc_mem_ind
	
	mov.l		%d0,L_SCR1(%a6)		# hold opword

	mov.l		%d0,%d1
	rol.w		&0x4,%d1
	andi.w		&0xf,%d1		# extract index regno

# count on fetch_dreg() not to alter a0...
	bsr.l		fetch_dreg		# fetch index

	mov.l		%d2,-(%sp)		# save d2
	mov.l		L_SCR1(%a6),%d2		# fetch opword

	btst		&0xb,%d2		# is it word or long?
	bne.b		faii8_long
	ext.l		%d0			# sign extend word index
faii8_long:
	mov.l		%d2,%d1
	rol.w		&0x7,%d1
	andi.l		&0x3,%d1		# extract scale value

	lsl.l		%d1,%d0			# shift index by scale

	extb.l		%d2			# sign extend displacement
	add.l		%d2,%d0			# index + disp
	add.l		%d0,%a0			# An + (index + disp)

	mov.l		(%sp)+,%d2		# restore old d2
	rts

###########################
# Absolute short: (XXX).W #
###########################
fabs_short:
	mov.l		EXC_EXTWPTR(%a6),%a0	# fetch instruction addr
	addq.l		&0x2,EXC_EXTWPTR(%a6)	# incr instruction ptr
	bsr.l		_imem_read_word		# fetch short address

	tst.l		%d1			# did ifetch fail?
	bne.l		iea_iacc		# yes

	mov.w		%d0,%a0			# return <ea> in a0
	rts

##########################
# Absolute long: (XXX).L #
##########################
fabs_long:
	mov.l		EXC_EXTWPTR(%a6),%a0	# fetch instruction addr
	addq.l		&0x4,EXC_EXTWPTR(%a6)	# incr instruction ptr
	bsr.l		_imem_read_long		# fetch long address

	tst.l		%d1			# did ifetch fail?
	bne.l		iea_iacc		# yes

	mov.l		%d0,%a0			# return <ea> in a0
	rts

#######################################################
# Program counter indirect w/ displacement: (d16, PC) #
#######################################################
fpc_ind:
	mov.l		EXC_EXTWPTR(%a6),%a0	# fetch instruction addr
	addq.l		&0x2,EXC_EXTWPTR(%a6)	# incr instruction ptr
	bsr.l		_imem_read_word		# fetch word displacement

	tst.l		%d1			# did ifetch fail?
	bne.l		iea_iacc		# yes

	mov.w		%d0,%a0			# sign extend displacement

	add.l		EXC_EXTWPTR(%a6),%a0	# pc + d16

# _imem_read_word() increased the extwptr by 2. need to adjust here.
	subq.l		&0x2,%a0		# adjust <ea>
	rts

##########################################################
# PC indirect w/ index(8-bit displacement): (d8, PC, An) #
# "     "     w/   "  (base displacement): (bd, PC, An)  #
# PC memory indirect postindexed: ([bd, PC], Xn, od)     #
# PC memory indirect preindexed: ([bd, PC, Xn], od)      #
##########################################################
fpc_ind_ext:
	mov.l		EXC_EXTWPTR(%a6),%a0	# fetch instruction addr
	addq.l		&0x2,EXC_EXTWPTR(%a6)	# incr instruction ptr
	bsr.l		_imem_read_word		# fetch ext word

	tst.l		%d1			# did ifetch fail?
	bne.l		iea_iacc		# yes

	mov.l		EXC_EXTWPTR(%a6),%a0	# put base in a0
	subq.l		&0x2,%a0		# adjust base

	btst		&0x8,%d0		# is disp only 8 bits?
	bne.w		fcalc_mem_ind		# calc memory indirect
	
	mov.l		%d0,L_SCR1(%a6)		# store opword

	mov.l		%d0,%d1			# make extword copy
	rol.w		&0x4,%d1		# rotate reg num into place
	andi.w		&0xf,%d1		# extract register number

# count on fetch_dreg() not to alter a0...
	bsr.l		fetch_dreg		# fetch index

	mov.l		%d2,-(%sp)		# save d2
	mov.l		L_SCR1(%a6),%d2		# fetch opword

	btst		&0xb,%d2		# is index word or long?
	bne.b		fpii8_long		# long
	ext.l		%d0			# sign extend word index
fpii8_long:
	mov.l		%d2,%d1
	rol.w		&0x7,%d1		# rotate scale value into place
	andi.l		&0x3,%d1		# extract scale value

	lsl.l		%d1,%d0			# shift index by scale

	extb.l		%d2			# sign extend displacement
	add.l		%d2,%d0			# disp + index
	add.l		%d0,%a0			# An + (index + disp)

	mov.l		(%sp)+,%d2		# restore temp register
	rts

# d2 = index
# d3 = base
# d4 = od
# d5 = extword
fcalc_mem_ind:
	btst		&0x6,%d0		# is the index suppressed?
	beq.b		fcalc_index

	movm.l		&0x3c00,-(%sp)		# save d2-d5

	mov.l		%d0,%d5			# put extword in d5
	mov.l		%a0,%d3			# put base in d3

	clr.l		%d2			# yes, so index = 0
	bra.b		fbase_supp_ck

# index:
fcalc_index:
	mov.l		%d0,L_SCR1(%a6)		# save d0 (opword)
	bfextu		%d0{&16:&4},%d1		# fetch dreg index
	bsr.l		fetch_dreg

	movm.l		&0x3c00,-(%sp)		# save d2-d5
	mov.l		%d0,%d2			# put index in d2
	mov.l		L_SCR1(%a6),%d5
	mov.l		%a0,%d3

	btst		&0xb,%d5		# is index word or long?
	bne.b		fno_ext
	ext.l		%d2

fno_ext:
	bfextu		%d5{&21:&2},%d0
	lsl.l		%d0,%d2

# base address (passed as parameter in d3):
# we clear the value here if it should actually be suppressed.
fbase_supp_ck:
	btst		&0x7,%d5		# is the bd suppressed?
	beq.b		fno_base_sup
	clr.l		%d3

# base displacement:
fno_base_sup:
	bfextu		%d5{&26:&2},%d0		# get bd size
#	beq.l		fmovm_error		# if (size == 0) it's reserved

	cmpi.b	 	%d0,&0x2
	blt.b		fno_bd
	beq.b		fget_word_bd

	mov.l		EXC_EXTWPTR(%a6),%a0	# fetch instruction addr
	addq.l		&0x4,EXC_EXTWPTR(%a6)	# incr instruction ptr
	bsr.l		_imem_read_long

	tst.l		%d1			# did ifetch fail?
	bne.l		fcea_iacc		# yes

	bra.b		fchk_ind

fget_word_bd:
	mov.l		EXC_EXTWPTR(%a6),%a0	# fetch instruction addr
	addq.l		&0x2,EXC_EXTWPTR(%a6)	# incr instruction ptr
	bsr.l		_imem_read_word

	tst.l		%d1			# did ifetch fail?
	bne.l		fcea_iacc		# yes

	ext.l		%d0			# sign extend bd
	
fchk_ind:
	add.l		%d0,%d3			# base += bd

# outer displacement:
fno_bd:
	bfextu		%d5{&30:&2},%d0		# is od suppressed?
	beq.w		faii_bd

	cmpi.b	 	%d0,&0x2
	blt.b		fnull_od
	beq.b		fword_od
	
	mov.l		EXC_EXTWPTR(%a6),%a0	# fetch instruction addr
	addq.l		&0x4,EXC_EXTWPTR(%a6)	# incr instruction ptr
	bsr.l		_imem_read_long

	tst.l		%d1			# did ifetch fail?
	bne.l		fcea_iacc		# yes

	bra.b 		fadd_them

fword_od:
	mov.l		EXC_EXTWPTR(%a6),%a0	# fetch instruction addr
	addq.l		&0x2,EXC_EXTWPTR(%a6)	# incr instruction ptr
	bsr.l		_imem_read_word

	tst.l		%d1			# did ifetch fail?
	bne.l		fcea_iacc		# yes

	ext.l		%d0			# sign extend od
	bra.b		fadd_them

fnull_od:
	clr.l		%d0

fadd_them:
	mov.l		%d0,%d4

	btst		&0x2,%d5		# pre or post indexing?
	beq.b		fpre_indexed

	mov.l		%d3,%a0
	bsr.l		_dmem_read_long

	tst.l		%d1			# did dfetch fail?
	bne.w		fcea_err		# yes

	add.l		%d2,%d0			# <ea> += index
	add.l		%d4,%d0			# <ea> += od
	bra.b		fdone_ea

fpre_indexed:
	add.l		%d2,%d3			# preindexing
	mov.l		%d3,%a0
	bsr.l		_dmem_read_long

	tst.l		%d1			# did dfetch fail?
	bne.w		fcea_err		# yes

	add.l		%d4,%d0			# ea += od
	bra.b		fdone_ea

faii_bd:
	add.l		%d2,%d3			# ea = (base + bd) + index
	mov.l		%d3,%d0
fdone_ea:
	mov.l		%d0,%a0

	movm.l		(%sp)+,&0x003c		# restore d2-d5
	rts

#########################################################
fcea_err:	
	mov.l		%d3,%a0

	movm.l		(%sp)+,&0x003c		# restore d2-d5
	mov.w		&0x0101,%d0
	bra.l		iea_dacc

fcea_iacc:
	movm.l		(%sp)+,&0x003c		# restore d2-d5
	bra.l		iea_iacc
	
fmovm_out_err:
	bsr.l		restore
	mov.w		&0x00e1,%d0
	bra.b		fmovm_err

fmovm_in_err:
	bsr.l		restore
	mov.w		&0x0161,%d0

fmovm_err:
	mov.l		L_SCR1(%a6),%a0
	bra.l		iea_dacc

#########################################################################
# XDEF ****************************************************************	#
# 	fmovm_ctrl(): emulate fmovm.l of control registers instr	#
#									#
# XREF ****************************************************************	#
#	_imem_read_long() - read longword from memory			#
#	iea_iacc() - _imem_read_long() failed; error recovery		#
#									#
# INPUT ***************************************************************	#
#	None								#
# 									#
# OUTPUT **************************************************************	#
#	If _imem_read_long() doesn't fail:				#
#		USER_FPCR(a6)  = new FPCR value				#
#		USER_FPSR(a6)  = new FPSR value				#
#		USER_FPIAR(a6) = new FPIAR value			#
#									#
# ALGORITHM ***********************************************************	#
# 	Decode the instruction type by looking at the extension word 	#
# in order to see how many control registers to fetch from memory.	#
# Fetch them using _imem_read_long(). If this fetch fails, exit through	#
# the special access error exit handler iea_iacc().			#
#									#
# Instruction word decoding:						#
#									#
# 	fmovem.l #<data>, {FPIAR&|FPCR&|FPSR}				#
#									#
#		WORD1			WORD2				#
#	1111 0010 00 111100	100$ $$00 0000 0000			#
#									#
#	$$$ (100): FPCR							#
#	    (010): FPSR							#
#	    (001): FPIAR						#
#	    (000): FPIAR						#
#									#
#########################################################################

	global		fmovm_ctrl
fmovm_ctrl:
	mov.b		EXC_EXTWORD(%a6),%d0	# fetch reg select bits
	cmpi.b		%d0,&0x9c		# fpcr & fpsr & fpiar ?
	beq.w		fctrl_in_7		# yes
	cmpi.b		%d0,&0x98		# fpcr & fpsr ?
	beq.w		fctrl_in_6		# yes
	cmpi.b		%d0,&0x94		# fpcr & fpiar ?
	beq.b		fctrl_in_5		# yes
	
# fmovem.l #<data>, fpsr/fpiar
fctrl_in_3:
	mov.l		EXC_EXTWPTR(%a6),%a0	# fetch instruction addr
	addq.l		&0x4,EXC_EXTWPTR(%a6)	# incr instruction ptr
	bsr.l		_imem_read_long		# fetch FPSR from mem

	tst.l		%d1			# did ifetch fail?
	bne.l		iea_iacc		# yes

	mov.l		%d0,USER_FPSR(%a6)	# store new FPSR to stack
	mov.l		EXC_EXTWPTR(%a6),%a0	# fetch instruction addr
	addq.l		&0x4,EXC_EXTWPTR(%a6)	# incr instruction ptr
	bsr.l		_imem_read_long		# fetch FPIAR from mem

	tst.l		%d1			# did ifetch fail?
	bne.l		iea_iacc		# yes

	mov.l		%d0,USER_FPIAR(%a6)	# store new FPIAR to stack
	rts

# fmovem.l #<data>, fpcr/fpiar
fctrl_in_5:
	mov.l		EXC_EXTWPTR(%a6),%a0	# fetch instruction addr
	addq.l		&0x4,EXC_EXTWPTR(%a6)	# incr instruction ptr
	bsr.l		_imem_read_long		# fetch FPCR from mem

	tst.l		%d1			# did ifetch fail?
	bne.l		iea_iacc		# yes

	mov.l		%d0,USER_FPCR(%a6)	# store new FPCR to stack
	mov.l		EXC_EXTWPTR(%a6),%a0	# fetch instruction addr
	addq.l		&0x4,EXC_EXTWPTR(%a6)	# incr instruction ptr
	bsr.l		_imem_read_long		# fetch FPIAR from mem

	tst.l		%d1			# did ifetch fail?
	bne.l		iea_iacc		# yes

	mov.l		%d0,USER_FPIAR(%a6)	# store new FPIAR to stack
	rts

# fmovem.l #<data>, fpcr/fpsr
fctrl_in_6:
	mov.l		EXC_EXTWPTR(%a6),%a0	# fetch instruction addr
	addq.l		&0x4,EXC_EXTWPTR(%a6)	# incr instruction ptr
	bsr.l		_imem_read_long		# fetch FPCR from mem

	tst.l		%d1			# did ifetch fail?
	bne.l		iea_iacc		# yes

	mov.l		%d0,USER_FPCR(%a6)	# store new FPCR to mem
	mov.l		EXC_EXTWPTR(%a6),%a0	# fetch instruction addr
	addq.l		&0x4,EXC_EXTWPTR(%a6)	# incr instruction ptr
	bsr.l		_imem_read_long		# fetch FPSR from mem

	tst.l		%d1			# did ifetch fail?
	bne.l		iea_iacc		# yes

	mov.l		%d0,USER_FPSR(%a6)	# store new FPSR to mem
	rts

# fmovem.l #<data>, fpcr/fpsr/fpiar
fctrl_in_7:
	mov.l		EXC_EXTWPTR(%a6),%a0	# fetch instruction addr
	addq.l		&0x4,EXC_EXTWPTR(%a6)	# incr instruction ptr
	bsr.l		_imem_read_long		# fetch FPCR from mem

	tst.l		%d1			# did ifetch fail?
	bne.l		iea_iacc		# yes

	mov.l		%d0,USER_FPCR(%a6)	# store new FPCR to mem
	mov.l		EXC_EXTWPTR(%a6),%a0	# fetch instruction addr
	addq.l		&0x4,EXC_EXTWPTR(%a6)	# incr instruction ptr
	bsr.l		_imem_read_long		# fetch FPSR from mem

	tst.l		%d1			# did ifetch fail?
	bne.l		iea_iacc		# yes

	mov.l		%d0,USER_FPSR(%a6)	# store new FPSR to mem
	mov.l		EXC_EXTWPTR(%a6),%a0	# fetch instruction addr
	addq.l		&0x4,EXC_EXTWPTR(%a6)	# incr instruction ptr
	bsr.l		_imem_read_long		# fetch FPIAR from mem

	tst.l		%d1			# did ifetch fail?
	bne.l		iea_iacc		# yes

	mov.l		%d0,USER_FPIAR(%a6)	# store new FPIAR to mem
	rts

#########################################################################
# XDEF ****************************************************************	#
#	_dcalc_ea(): calc correct <ea> from <ea> stacked on exception	#
#									#
# XREF ****************************************************************	#
#	inc_areg() - increment an address register			#
#	dec_areg() - decrement an address register			#
#									#
# INPUT ***************************************************************	#
#	d0 = number of bytes to adjust <ea> by				#
# 									#
# OUTPUT **************************************************************	#
#	None								#
#									#
# ALGORITHM ***********************************************************	#
# "Dummy" CALCulate Effective Address:					#
# 	The stacked <ea> for FP unimplemented instructions and opclass	#
#	two packed instructions is correct with the exception of...	#
#									#
#	1) -(An)   : The register is not updated regardless of size.	#
#		     Also, for extended precision and packed, the 	#
#		     stacked <ea> value is 8 bytes too big		#
#	2) (An)+   : The register is not updated.			#
#	3) #<data> : The upper longword of the immediate operand is 	#
#		     stacked b,w,l and s sizes are completely stacked. 	#
#		     d,x, and p are not.				#
#									#
#########################################################################

	global		_dcalc_ea
_dcalc_ea:
	mov.l		%d0, %a0		# move # bytes to %a0

	mov.b		1+EXC_OPWORD(%a6), %d0	# fetch opcode word
	mov.l		%d0, %d1		# make a copy

	andi.w		&0x38, %d0		# extract mode field
	andi.l		&0x7, %d1		# extract reg  field

	cmpi.b		%d0,&0x18		# is mode (An)+ ?
	beq.b		dcea_pi			# yes

	cmpi.b		%d0,&0x20		# is mode -(An) ?
	beq.b		dcea_pd			# yes

	or.w		%d1,%d0			# concat mode,reg
	cmpi.b		%d0,&0x3c		# is mode #<data>?

	beq.b		dcea_imm		# yes

	mov.l		EXC_EA(%a6),%a0		# return <ea>
	rts

# need to set immediate data flag here since we'll need to do
# an imem_read to fetch this later.
dcea_imm:
	mov.b		&immed_flg,SPCOND_FLG(%a6)
	lea		([USER_FPIAR,%a6],0x4),%a0 # no; return <ea>
	rts

# here, the <ea> is stacked correctly. however, we must update the 
# address register...	
dcea_pi:
	mov.l		%a0,%d0			# pass amt to inc by
	bsr.l		inc_areg		# inc addr register

	mov.l		EXC_EA(%a6),%a0		# stacked <ea> is correct
	rts

# the <ea> is stacked correctly for all but extended and packed which 
# the <ea>s are 8 bytes too large.
# it would make no sense to have a pre-decrement to a7 in supervisor
# mode so we don't even worry about this tricky case here : )
dcea_pd:
	mov.l		%a0,%d0			# pass amt to dec by
	bsr.l		dec_areg		# dec addr register

	mov.l		EXC_EA(%a6),%a0		# stacked <ea> is correct

	cmpi.b		%d0,&0xc		# is opsize ext or packed?
	beq.b		dcea_pd2		# yes
	rts
dcea_pd2:
	sub.l		&0x8,%a0		# correct <ea>
	mov.l		%a0,EXC_EA(%a6)		# put correct <ea> on stack
	rts

#########################################################################
# XDEF ****************************************************************	#
# 	_calc_ea_fout(): calculate correct stacked <ea> for extended	#
#			 and packed data opclass 3 operations.		#
#									#
# XREF ****************************************************************	#
#	None								#
#									#
# INPUT ***************************************************************	#
#	None								#
# 									#
# OUTPUT **************************************************************	#
#	a0 = return correct effective address				#
#									#
# ALGORITHM ***********************************************************	#
#	For opclass 3 extended and packed data operations, the <ea>	#
# stacked for the exception is incorrect for -(an) and (an)+ addressing	#
# modes. Also, while we're at it, the index register itself must get 	#
# updated.								#
# 	So, for -(an), we must subtract 8 off of the stacked <ea> value	#
# and return that value as the correct <ea> and store that value in An.	#
# For (an)+, the stacked <ea> is correct but we must adjust An by +12.	#
#									#
#########################################################################

# This calc_ea is currently used to retrieve the correct <ea> 
# for fmove outs of type extended and packed.
	global		_calc_ea_fout
_calc_ea_fout:
	mov.b		1+EXC_OPWORD(%a6),%d0	# fetch opcode word
	mov.l		%d0,%d1			# make a copy

	andi.w		&0x38,%d0		# extract mode field
	andi.l		&0x7,%d1		# extract reg  field

	cmpi.b		%d0,&0x18		# is mode (An)+ ?
	beq.b		ceaf_pi			# yes

	cmpi.b		%d0,&0x20		# is mode -(An) ?
	beq.w		ceaf_pd			# yes

	mov.l		EXC_EA(%a6),%a0		# stacked <ea> is correct
	rts

# (An)+ : extended and packed fmove out
#	: stacked <ea> is correct
#	: "An" not updated 
ceaf_pi:
	mov.w		(tbl_ceaf_pi.b,%pc,%d1.w*2),%d1
	mov.l		EXC_EA(%a6),%a0
	jmp		(tbl_ceaf_pi.b,%pc,%d1.w*1)

	swbeg		&0x8
tbl_ceaf_pi:
	short		ceaf_pi0 - tbl_ceaf_pi
	short		ceaf_pi1 - tbl_ceaf_pi
	short		ceaf_pi2 - tbl_ceaf_pi
	short		ceaf_pi3 - tbl_ceaf_pi
	short		ceaf_pi4 - tbl_ceaf_pi
	short		ceaf_pi5 - tbl_ceaf_pi
	short		ceaf_pi6 - tbl_ceaf_pi
	short		ceaf_pi7 - tbl_ceaf_pi

ceaf_pi0:
	addi.l		&0xc,EXC_DREGS+0x8(%a6)
	rts
ceaf_pi1:
	addi.l		&0xc,EXC_DREGS+0xc(%a6)
	rts
ceaf_pi2:
	add.l		&0xc,%a2
	rts
ceaf_pi3:
	add.l		&0xc,%a3
	rts
ceaf_pi4:
	add.l		&0xc,%a4
	rts
ceaf_pi5:
	add.l		&0xc,%a5
	rts
ceaf_pi6:
	addi.l		&0xc,EXC_A6(%a6)
	rts
ceaf_pi7:
	mov.b		&mia7_flg,SPCOND_FLG(%a6)
	addi.l		&0xc,EXC_A7(%a6)
	rts

# -(An) : extended and packed fmove out
#	: stacked <ea> = actual <ea> + 8
#	: "An" not updated
ceaf_pd:
	mov.w		(tbl_ceaf_pd.b,%pc,%d1.w*2),%d1
	mov.l		EXC_EA(%a6),%a0
	sub.l		&0x8,%a0
	sub.l		&0x8,EXC_EA(%a6)
	jmp		(tbl_ceaf_pd.b,%pc,%d1.w*1)

	swbeg		&0x8
tbl_ceaf_pd:
	short		ceaf_pd0 - tbl_ceaf_pd
	short		ceaf_pd1 - tbl_ceaf_pd
	short		ceaf_pd2 - tbl_ceaf_pd
	short		ceaf_pd3 - tbl_ceaf_pd
	short		ceaf_pd4 - tbl_ceaf_pd
	short		ceaf_pd5 - tbl_ceaf_pd
	short		ceaf_pd6 - tbl_ceaf_pd
	short		ceaf_pd7 - tbl_ceaf_pd

ceaf_pd0:
	mov.l		%a0,EXC_DREGS+0x8(%a6)
	rts
ceaf_pd1:
	mov.l		%a0,EXC_DREGS+0xc(%a6)
	rts
ceaf_pd2:
	mov.l		%a0,%a2
	rts
ceaf_pd3:
	mov.l		%a0,%a3
	rts
ceaf_pd4:
	mov.l		%a0,%a4
	rts
ceaf_pd5:
	mov.l		%a0,%a5
	rts
ceaf_pd6:
	mov.l		%a0,EXC_A6(%a6)
	rts
ceaf_pd7:
	mov.l		%a0,EXC_A7(%a6)
	mov.b		&mda7_flg,SPCOND_FLG(%a6)
	rts

#########################################################################
# XDEF ****************************************************************	#
#	_load_fop(): load operand for unimplemented FP exception	#
#									#
# XREF ****************************************************************	#
#	set_tag_x() - determine ext prec optype tag			#
#	set_tag_s() - determine sgl prec optype tag			#
#	set_tag_d() - determine dbl prec optype tag			#
#	unnorm_fix() - convert normalized number to denorm or zero	#
#	norm() - normalize a denormalized number			#
#	get_packed() - fetch a packed operand from memory		#
#	_dcalc_ea() - calculate <ea>, fixing An in process		#
#									#
#	_imem_read_{word,long}() - read from instruction memory		#
#	_dmem_read() - read from data memory				#
#	_dmem_read_{byte,word,long}() - read from data memory		#
#									#
#	facc_in_{b,w,l,d,x}() - mem read failed; special exit point	#
#									#
# INPUT ***************************************************************	#
#	None								#
# 									#
# OUTPUT **************************************************************	#
#	If memory access doesn't fail:					#
#		FP_SRC(a6) = source operand in extended precision	#
# 		FP_DST(a6) = destination operand in extended precision	#
#									#
# ALGORITHM ***********************************************************	#
# 	This is called from the Unimplemented FP exception handler in	#
# order to load the source and maybe destination operand into		#
# FP_SRC(a6) and FP_DST(a6). If the instruction was opclass zero, load	#
# the source and destination from the FP register file. Set the optype	#
# tags for both if dyadic, one for monadic. If a number is an UNNORM,	#
# convert it to a DENORM or a ZERO.					#
# 	If the instruction is opclass two (memory->reg), then fetch	#
# the destination from the register file and the source operand from 	#
# memory. Tag and fix both as above w/ opclass zero instructions.	#
# 	If the source operand is byte,word,long, or single, it may be	#
# in the data register file. If it's actually out in memory, use one of	#
# the mem_read() routines to fetch it. If the mem_read() access returns	#
# a failing value, exit through the special facc_in() routine which	#
# will create an access error exception frame from the current exception #
# frame.								#
# 	Immediate data and regular data accesses are separated because 	#
# if an immediate data access fails, the resulting fault status		#
# longword stacked for the access error exception must have the 	#
# instruction bit set.							#
#									#
#########################################################################

	global		_load_fop
_load_fop:

#  15     13 12 10  9 7  6       0
# /        \ /   \ /  \ /         \
# ---------------------------------
# | opclass | RX  | RY | EXTENSION |  (2nd word of general FP instruction)
# ---------------------------------
#

#	bfextu		EXC_CMDREG(%a6){&0:&3}, %d0 # extract opclass
#	cmpi.b		%d0, &0x2		# which class is it? ('000,'010,'011)
#	beq.w		op010			# handle <ea> -> fpn
#	bgt.w		op011			# handle fpn -> <ea>

# we're not using op011 for now...
	btst		&0x6,EXC_CMDREG(%a6)
	bne.b		op010

############################
# OPCLASS '000: reg -> reg #
############################
op000:
	mov.b		1+EXC_CMDREG(%a6),%d0	# fetch extension word lo
	btst		&0x5,%d0		# testing extension bits
	beq.b		op000_src		# (bit 5 == 0) => monadic
	btst		&0x4,%d0		# (bit 5 == 1)
	beq.b		op000_dst		# (bit 4 == 0) => dyadic
	and.w		&0x007f,%d0		# extract extension bits {6:0}
	cmpi.w		%d0,&0x0038		# is it an fcmp (dyadic) ?
	bne.b		op000_src		# it's an fcmp

op000_dst:
	bfextu		EXC_CMDREG(%a6){&6:&3}, %d0 # extract dst field
	bsr.l		load_fpn2		# fetch dst fpreg into FP_DST

	bsr.l		set_tag_x		# get dst optype tag

	cmpi.b		%d0, &UNNORM		# is dst fpreg an UNNORM?
	beq.b		op000_dst_unnorm	# yes
op000_dst_cont:
	mov.b 		%d0, DTAG(%a6)		# store the dst optype tag

op000_src:
	bfextu		EXC_CMDREG(%a6){&3:&3}, %d0 # extract src field
	bsr.l		load_fpn1		# fetch src fpreg into FP_SRC

	bsr.l		set_tag_x		# get src optype tag

	cmpi.b		%d0, &UNNORM		# is src fpreg an UNNORM?
	beq.b		op000_src_unnorm	# yes
op000_src_cont:
	mov.b		%d0, STAG(%a6)		# store the src optype tag
	rts

op000_dst_unnorm:
	bsr.l		unnorm_fix		# fix the dst UNNORM
	bra.b		op000_dst_cont
op000_src_unnorm:
	bsr.l		unnorm_fix		# fix the src UNNORM
	bra.b		op000_src_cont

#############################
# OPCLASS '010: <ea> -> reg #
#############################
op010:
	mov.w		EXC_CMDREG(%a6),%d0	# fetch extension word
	btst		&0x5,%d0		# testing extension bits
	beq.b		op010_src		# (bit 5 == 0) => monadic
	btst		&0x4,%d0		# (bit 5 == 1)
	beq.b		op010_dst		# (bit 4 == 0) => dyadic
	and.w		&0x007f,%d0		# extract extension bits {6:0}
	cmpi.w		%d0,&0x0038		# is it an fcmp (dyadic) ?
	bne.b		op010_src		# it's an fcmp

op010_dst:
	bfextu		EXC_CMDREG(%a6){&6:&3}, %d0 # extract dst field
	bsr.l		load_fpn2		# fetch dst fpreg ptr

	bsr.l		set_tag_x		# get dst type tag

	cmpi.b		%d0, &UNNORM		# is dst fpreg an UNNORM?
	beq.b		op010_dst_unnorm	# yes
op010_dst_cont:
	mov.b		%d0, DTAG(%a6)		# store the dst optype tag

op010_src:
	bfextu		EXC_CMDREG(%a6){&3:&3}, %d0 # extract src type field

	bfextu		EXC_OPWORD(%a6){&10:&3}, %d1 # extract <ea> mode field
	bne.w		fetch_from_mem		# src op is in memory

op010_dreg:
	clr.b		STAG(%a6)		# either NORM or ZERO
	bfextu		EXC_OPWORD(%a6){&13:&3}, %d1 # extract src reg field

	mov.w		(tbl_op010_dreg.b,%pc,%d0.w*2), %d0 # jmp based on optype
	jmp		(tbl_op010_dreg.b,%pc,%d0.w*1) # fetch src from dreg

op010_dst_unnorm:
	bsr.l		unnorm_fix		# fix the dst UNNORM
	bra.b		op010_dst_cont

	swbeg		&0x8
tbl_op010_dreg:
	short		opd_long	- tbl_op010_dreg
	short		opd_sgl 	- tbl_op010_dreg
	short		tbl_op010_dreg	- tbl_op010_dreg
	short		tbl_op010_dreg	- tbl_op010_dreg
	short		opd_word	- tbl_op010_dreg
	short		tbl_op010_dreg	- tbl_op010_dreg
	short		opd_byte	- tbl_op010_dreg
	short		tbl_op010_dreg	- tbl_op010_dreg

#
# LONG: can be either NORM or ZERO...
#
opd_long:
	bsr.l		fetch_dreg		# fetch long in d0
	fmov.l		%d0, %fp0 		# load a long
	fmovm.x		&0x80, FP_SRC(%a6)	# return src op in FP_SRC
	fbeq.w		opd_long_zero		# long is a ZERO
	rts
opd_long_zero:
	mov.b		&ZERO, STAG(%a6)	# set ZERO optype flag
	rts

#
# WORD: can be either NORM or ZERO...
#
opd_word:
	bsr.l		fetch_dreg		# fetch word in d0
	fmov.w		%d0, %fp0 		# load a word
	fmovm.x		&0x80, FP_SRC(%a6)	# return src op in FP_SRC
	fbeq.w		opd_word_zero		# WORD is a ZERO
	rts
opd_word_zero:
	mov.b		&ZERO, STAG(%a6)	# set ZERO optype flag
	rts

#
# BYTE: can be either NORM or ZERO...
#
opd_byte:
	bsr.l		fetch_dreg		# fetch word in d0
	fmov.b		%d0, %fp0 		# load a byte
	fmovm.x		&0x80, FP_SRC(%a6)	# return src op in FP_SRC
	fbeq.w		opd_byte_zero		# byte is a ZERO
	rts
opd_byte_zero:
	mov.b		&ZERO, STAG(%a6)	# set ZERO optype flag
	rts

#
# SGL: can be either NORM, DENORM, ZERO, INF, QNAN or SNAN but not UNNORM
#
# separate SNANs and DENORMs so they can be loaded w/ special care.
# all others can simply be moved "in" using fmove.
#
opd_sgl:
	bsr.l		fetch_dreg		# fetch sgl in d0
	mov.l		%d0,L_SCR1(%a6)

	lea		L_SCR1(%a6), %a0 	# pass: ptr to the sgl
	bsr.l		set_tag_s		# determine sgl type
	mov.b		%d0, STAG(%a6)		# save the src tag

	cmpi.b		%d0, &SNAN		# is it an SNAN?
	beq.w		get_sgl_snan		# yes

	cmpi.b		%d0, &DENORM		# is it a DENORM?
	beq.w		get_sgl_denorm		# yes

	fmov.s		(%a0), %fp0		# no, so can load it regular
	fmovm.x		&0x80, FP_SRC(%a6)	# return src op in FP_SRC
	rts

##############################################################################

#########################################################################
# fetch_from_mem():							#
# - src is out in memory. must:						#
#	(1) calc ea - must read AFTER you know the src type since	#
#		      if the ea is -() or ()+, need to know # of bytes.	#
#	(2) read it in from either user or supervisor space		#
#	(3) if (b || w || l) then simply read in			#
#	    if (s || d || x) then check for SNAN,UNNORM,DENORM		#
#	    if (packed) then punt for now				#
# INPUT:								#
#	%d0 : src type field						#
#########################################################################
fetch_from_mem:
	clr.b		STAG(%a6)		# either NORM or ZERO

	mov.w		(tbl_fp_type.b,%pc,%d0.w*2), %d0 # index by src type field
	jmp		(tbl_fp_type.b,%pc,%d0.w*1)

	swbeg		&0x8
tbl_fp_type:
	short		load_long	- tbl_fp_type
	short		load_sgl	- tbl_fp_type
	short		load_ext	- tbl_fp_type
	short		load_packed	- tbl_fp_type
	short		load_word	- tbl_fp_type
	short		load_dbl	- tbl_fp_type
	short		load_byte	- tbl_fp_type
	short		tbl_fp_type	- tbl_fp_type

#########################################
# load a LONG into %fp0:		#
# 	-number can't fault		#
#	(1) calc ea			#
#	(2) read 4 bytes into L_SCR1	#
#	(3) fmov.l into %fp0		#
#########################################
load_long:
	movq.l		&0x4, %d0		# pass: 4 (bytes)
	bsr.l		_dcalc_ea		# calc <ea>; <ea> in %a0

	cmpi.b		SPCOND_FLG(%a6),&immed_flg
	beq.b		load_long_immed

	bsr.l		_dmem_read_long		# fetch src operand from memory

	tst.l		%d1			# did dfetch fail?
	bne.l		facc_in_l		# yes

load_long_cont:
	fmov.l		%d0, %fp0		# read into %fp0;convert to xprec
	fmovm.x		&0x80, FP_SRC(%a6)	# return src op in FP_SRC

	fbeq.w		load_long_zero		# src op is a ZERO
	rts
load_long_zero:
	mov.b		&ZERO, STAG(%a6)	# set optype tag to ZERO
	rts

load_long_immed:
	bsr.l		_imem_read_long		# fetch src operand immed data

	tst.l		%d1			# did ifetch fail?
	bne.l		funimp_iacc		# yes
	bra.b		load_long_cont

#########################################
# load a WORD into %fp0:		#
# 	-number can't fault		#
#	(1) calc ea			#
#	(2) read 2 bytes into L_SCR1	#
#	(3) fmov.w into %fp0		#
#########################################
load_word:
	movq.l		&0x2, %d0		# pass: 2 (bytes)
	bsr.l		_dcalc_ea		# calc <ea>; <ea> in %a0

	cmpi.b		SPCOND_FLG(%a6),&immed_flg
	beq.b		load_word_immed

	bsr.l		_dmem_read_word		# fetch src operand from memory

	tst.l		%d1			# did dfetch fail?
	bne.l		facc_in_w		# yes

load_word_cont:
	fmov.w		%d0, %fp0		# read into %fp0;convert to xprec
	fmovm.x		&0x80, FP_SRC(%a6)	# return src op in FP_SRC

	fbeq.w		load_word_zero		# src op is a ZERO
	rts
load_word_zero:
	mov.b		&ZERO, STAG(%a6)	# set optype tag to ZERO
	rts

load_word_immed:
	bsr.l		_imem_read_word		# fetch src operand immed data

	tst.l		%d1			# did ifetch fail?
	bne.l		funimp_iacc		# yes
	bra.b		load_word_cont

#########################################
# load a BYTE into %fp0:		#
# 	-number can't fault		#
#	(1) calc ea			#
#	(2) read 1 byte into L_SCR1	#
#	(3) fmov.b into %fp0		#
#########################################
load_byte:
	movq.l		&0x1, %d0		# pass: 1 (byte)
	bsr.l		_dcalc_ea		# calc <ea>; <ea> in %a0

	cmpi.b		SPCOND_FLG(%a6),&immed_flg
	beq.b		load_byte_immed

	bsr.l		_dmem_read_byte		# fetch src operand from memory

	tst.l		%d1			# did dfetch fail?
	bne.l		facc_in_b		# yes

load_byte_cont:
	fmov.b		%d0, %fp0		# read into %fp0;convert to xprec
	fmovm.x		&0x80, FP_SRC(%a6)	# return src op in FP_SRC

	fbeq.w		load_byte_zero		# src op is a ZERO
	rts
load_byte_zero:
	mov.b		&ZERO, STAG(%a6)	# set optype tag to ZERO
	rts

load_byte_immed:
	bsr.l		_imem_read_word		# fetch src operand immed data

	tst.l		%d1			# did ifetch fail?
	bne.l		funimp_iacc		# yes
	bra.b		load_byte_cont

#########################################
# load a SGL into %fp0:			#
# 	-number can't fault		#
#	(1) calc ea			#
#	(2) read 4 bytes into L_SCR1	#
#	(3) fmov.s into %fp0		#
#########################################
load_sgl:
	movq.l		&0x4, %d0		# pass: 4 (bytes)
	bsr.l		_dcalc_ea		# calc <ea>; <ea> in %a0

	cmpi.b		SPCOND_FLG(%a6),&immed_flg
	beq.b		load_sgl_immed

	bsr.l		_dmem_read_long		# fetch src operand from memory
	mov.l		%d0, L_SCR1(%a6)	# store src op on stack

	tst.l		%d1			# did dfetch fail?
	bne.l		facc_in_l		# yes

load_sgl_cont:
	lea		L_SCR1(%a6), %a0	# pass: ptr to sgl src op
	bsr.l		set_tag_s		# determine src type tag
	mov.b		%d0, STAG(%a6)		# save src optype tag on stack

	cmpi.b		%d0, &DENORM		# is it a sgl DENORM?
	beq.w		get_sgl_denorm		# yes

	cmpi.b		%d0, &SNAN		# is it a sgl SNAN?
	beq.w		get_sgl_snan		# yes

	fmov.s		L_SCR1(%a6), %fp0	# read into %fp0;convert to xprec
	fmovm.x		&0x80, FP_SRC(%a6)	# return src op in FP_SRC
	rts

load_sgl_immed:
	bsr.l		_imem_read_long		# fetch src operand immed data

	tst.l		%d1			# did ifetch fail?
	bne.l		funimp_iacc		# yes
	bra.b		load_sgl_cont

# must convert sgl denorm format to an Xprec denorm fmt suitable for 
# normalization...
# %a0 : points to sgl denorm
get_sgl_denorm:
	clr.w		FP_SRC_EX(%a6)
	bfextu		(%a0){&9:&23}, %d0	# fetch sgl hi(_mantissa)
	lsl.l		&0x8, %d0
	mov.l		%d0, FP_SRC_HI(%a6)	# set ext hi(_mantissa)
	clr.l		FP_SRC_LO(%a6)		# set ext lo(_mantissa)

	clr.w		FP_SRC_EX(%a6)
	btst		&0x7, (%a0)		# is sgn bit set?
	beq.b		sgl_dnrm_norm
	bset		&0x7, FP_SRC_EX(%a6)	# set sgn of xprec value

sgl_dnrm_norm:
	lea		FP_SRC(%a6), %a0
	bsr.l		norm			# normalize number
	mov.w		&0x3f81, %d1		# xprec exp = 0x3f81
	sub.w		%d0, %d1		# exp = 0x3f81 - shft amt.
	or.w		%d1, FP_SRC_EX(%a6)	# {sgn,exp}

	mov.b		&NORM, STAG(%a6)	# fix src type tag
	rts

# convert sgl to ext SNAN
# %a0 : points to sgl SNAN
get_sgl_snan:
	mov.w		&0x7fff, FP_SRC_EX(%a6) # set exp of SNAN
	bfextu		(%a0){&9:&23}, %d0
	lsl.l		&0x8, %d0		# extract and insert hi(man)
	mov.l		%d0, FP_SRC_HI(%a6)
	clr.l		FP_SRC_LO(%a6)

	btst		&0x7, (%a0)		# see if sign of SNAN is set
	beq.b		no_sgl_snan_sgn
	bset		&0x7, FP_SRC_EX(%a6)
no_sgl_snan_sgn:
	rts

#########################################
# load a DBL into %fp0:			#
# 	-number can't fault		#
#	(1) calc ea			#
#	(2) read 8 bytes into L_SCR(1,2)#
#	(3) fmov.d into %fp0		#
#########################################
load_dbl:
	movq.l		&0x8, %d0		# pass: 8 (bytes)
	bsr.l		_dcalc_ea		# calc <ea>; <ea> in %a0

	cmpi.b		SPCOND_FLG(%a6),&immed_flg
	beq.b		load_dbl_immed

	lea		L_SCR1(%a6), %a1	# pass: ptr to input dbl tmp space
	movq.l		&0x8, %d0		# pass: # bytes to read
	bsr.l		_dmem_read		# fetch src operand from memory

	tst.l		%d1			# did dfetch fail?
	bne.l		facc_in_d		# yes

load_dbl_cont:
	lea		L_SCR1(%a6), %a0	# pass: ptr to input dbl
	bsr.l		set_tag_d		# determine src type tag
	mov.b		%d0, STAG(%a6)		# set src optype tag

	cmpi.b		%d0, &DENORM		# is it a dbl DENORM?
	beq.w		get_dbl_denorm		# yes

	cmpi.b		%d0, &SNAN		# is it a dbl SNAN?
	beq.w		get_dbl_snan		# yes

	fmov.d		L_SCR1(%a6), %fp0	# read into %fp0;convert to xprec
	fmovm.x		&0x80, FP_SRC(%a6)	# return src op in FP_SRC
	rts

load_dbl_immed:
	lea		L_SCR1(%a6), %a1	# pass: ptr to input dbl tmp space
	movq.l		&0x8, %d0		# pass: # bytes to read
	bsr.l		_imem_read		# fetch src operand from memory

	tst.l		%d1			# did ifetch fail?
	bne.l		funimp_iacc		# yes
	bra.b		load_dbl_cont

# must convert dbl denorm format to an Xprec denorm fmt suitable for 
# normalization...
# %a0 : loc. of dbl denorm
get_dbl_denorm:
	clr.w		FP_SRC_EX(%a6)
	bfextu		(%a0){&12:&31}, %d0	# fetch hi(_mantissa)
	mov.l		%d0, FP_SRC_HI(%a6)
	bfextu		4(%a0){&11:&21}, %d0	# fetch lo(_mantissa)
	mov.l		&0xb, %d1
	lsl.l		%d1, %d0
	mov.l		%d0, FP_SRC_LO(%a6)

	btst		&0x7, (%a0)		# is sgn bit set?
	beq.b		dbl_dnrm_norm
	bset		&0x7, FP_SRC_EX(%a6)	# set sgn of xprec value

dbl_dnrm_norm:
	lea		FP_SRC(%a6), %a0
	bsr.l		norm			# normalize number
	mov.w		&0x3c01, %d1		# xprec exp = 0x3c01
	sub.w		%d0, %d1		# exp = 0x3c01 - shft amt.
	or.w		%d1, FP_SRC_EX(%a6)	# {sgn,exp}

	mov.b		&NORM, STAG(%a6)	# fix src type tag
	rts

# convert dbl to ext SNAN
# %a0 : points to dbl SNAN
get_dbl_snan:
	mov.w		&0x7fff, FP_SRC_EX(%a6) # set exp of SNAN

	bfextu		(%a0){&12:&31}, %d0	# fetch hi(_mantissa)
	mov.l		%d0, FP_SRC_HI(%a6)
	bfextu		4(%a0){&11:&21}, %d0	# fetch lo(_mantissa)
	mov.l		&0xb, %d1
	lsl.l		%d1, %d0
	mov.l		%d0, FP_SRC_LO(%a6)

	btst		&0x7, (%a0)		# see if sign of SNAN is set
	beq.b		no_dbl_snan_sgn
	bset		&0x7, FP_SRC_EX(%a6)
no_dbl_snan_sgn:
	rts

#################################################
# load a Xprec into %fp0:			#
# 	-number can't fault			#
#	(1) calc ea				#
#	(2) read 12 bytes into L_SCR(1,2)	#
#	(3) fmov.x into %fp0			#
#################################################
load_ext:
	mov.l		&0xc, %d0		# pass: 12 (bytes)
	bsr.l		_dcalc_ea		# calc <ea>

	lea		FP_SRC(%a6), %a1	# pass: ptr to input ext tmp space
	mov.l		&0xc, %d0		# pass: # of bytes to read
	bsr.l		_dmem_read		# fetch src operand from memory

	tst.l		%d1			# did dfetch fail?
	bne.l		facc_in_x		# yes

	lea		FP_SRC(%a6), %a0	# pass: ptr to src op
	bsr.l		set_tag_x		# determine src type tag

	cmpi.b		%d0, &UNNORM		# is the src op an UNNORM?
	beq.b		load_ext_unnorm		# yes

	mov.b		%d0, STAG(%a6)		# store the src optype tag
	rts

load_ext_unnorm:
	bsr.l		unnorm_fix		# fix the src UNNORM
	mov.b		%d0, STAG(%a6)		# store the src optype tag
	rts

#################################################
# load a packed into %fp0:			#
# 	-number can't fault			#
#	(1) calc ea				#
#	(2) read 12 bytes into L_SCR(1,2,3)	#
#	(3) fmov.x into %fp0			#
#################################################
load_packed:
	bsr.l		get_packed

	lea		FP_SRC(%a6),%a0		# pass ptr to src op
	bsr.l		set_tag_x		# determine src type tag
	cmpi.b		%d0,&UNNORM		# is the src op an UNNORM ZERO?
	beq.b		load_packed_unnorm	# yes

	mov.b		%d0,STAG(%a6)		# store the src optype tag
	rts

load_packed_unnorm:
	bsr.l		unnorm_fix		# fix the UNNORM ZERO
	mov.b		%d0,STAG(%a6)		# store the src optype tag
	rts	

#########################################################################
# XDEF ****************************************************************	#
# 	fout(): move from fp register to memory or data register	#
#									#
# XREF ****************************************************************	#
#	_round() - needed to create EXOP for sgl/dbl precision		#
#	norm() - needed to create EXOP for extended precision		#
#	ovf_res() - create default overflow result for sgl/dbl precision#
#	unf_res() - create default underflow result for sgl/dbl prec.	#
#	dst_dbl() - create rounded dbl precision result.		#
#	dst_sgl() - create rounded sgl precision result.		#
#	fetch_dreg() - fetch dynamic k-factor reg for packed.		#
#	bindec() - convert FP binary number to packed number.		#
#	_mem_write() - write data to memory.				#
#	_mem_write2() - write data to memory unless supv mode -(a7) exc.#
#	_dmem_write_{byte,word,long}() - write data to memory.		#
#	store_dreg_{b,w,l}() - store data to data register file.	#
#	facc_out_{b,w,l,d,x}() - data access error occurred.		#
#									#
# INPUT ***************************************************************	#
#	a0 = pointer to extended precision source operand		#
#	d0 = round prec,mode						#
# 									#
# OUTPUT **************************************************************	#
#	fp0 : intermediate underflow or overflow result if		#
#	      OVFL/UNFL occurred for a sgl or dbl operand		#
#									#
# ALGORITHM ***********************************************************	#
#	This routine is accessed by many handlers that need to do an	#
# opclass three move of an operand out to memory.			#
#	Decode an fmove out (opclass 3) instruction to determine if	#
# it's b,w,l,s,d,x, or p in size. b,w,l can be stored to either a data	#
# register or memory. The algorithm uses a standard "fmove" to create	#
# the rounded result. Also, since exceptions are disabled, this also	#
# create the correct OPERR default result if appropriate.		#
#	For sgl or dbl precision, overflow or underflow can occur. If	#
# either occurs and is enabled, the EXOP.				#
#	For extended precision, the stacked <ea> must be fixed along	#
# w/ the address index register as appropriate w/ _calc_ea_fout(). If	#
# the source is a denorm and if underflow is enabled, an EXOP must be	#
# created.								#
# 	For packed, the k-factor must be fetched from the instruction	#
# word or a data register. The <ea> must be fixed as w/ extended 	#
# precision. Then, bindec() is called to create the appropriate 	#
# packed result.							#
#	If at any time an access error is flagged by one of the move-	#
# to-memory routines, then a special exit must be made so that the	#
# access error can be handled properly.					#
#									#
#########################################################################

	global		fout
fout:
	bfextu		EXC_CMDREG(%a6){&3:&3},%d1 # extract dst fmt
	mov.w		(tbl_fout.b,%pc,%d1.w*2),%a1 # use as index
	jmp		(tbl_fout.b,%pc,%a1)	# jump to routine

	swbeg		&0x8
tbl_fout:
	short		fout_long	-	tbl_fout
	short		fout_sgl	-	tbl_fout
	short		fout_ext	-	tbl_fout
	short		fout_pack	-	tbl_fout
	short		fout_word	-	tbl_fout
	short		fout_dbl	-	tbl_fout
	short		fout_byte	-	tbl_fout
	short		fout_pack	-	tbl_fout

#################################################################
# fmove.b out ###################################################
#################################################################

# Only "Unimplemented Data Type" exceptions enter here. The operand
# is either a DENORM or a NORM.
fout_byte:
	tst.b		STAG(%a6)		# is operand normalized?
	bne.b		fout_byte_denorm	# no

	fmovm.x		SRC(%a0),&0x80		# load value

fout_byte_norm:
	fmov.l		%d0,%fpcr		# insert rnd prec,mode

	fmov.b		%fp0,%d0		# exec move out w/ correct rnd mode

	fmov.l		&0x0,%fpcr		# clear FPCR
	fmov.l		%fpsr,%d1		# fetch FPSR
	or.w		%d1,2+USER_FPSR(%a6)	# save new exc,accrued bits

	mov.b		1+EXC_OPWORD(%a6),%d1	# extract dst mode
	andi.b		&0x38,%d1		# is mode == 0? (Dreg dst)
	beq.b		fout_byte_dn		# must save to integer regfile

	mov.l		EXC_EA(%a6),%a0		# stacked <ea> is correct
	bsr.l		_dmem_write_byte	# write byte

	tst.l		%d1			# did dstore fail?
	bne.l		facc_out_b		# yes

	rts

fout_byte_dn:
	mov.b		1+EXC_OPWORD(%a6),%d1	# extract Dn
	andi.w		&0x7,%d1
	bsr.l		store_dreg_b
	rts

fout_byte_denorm:
	mov.l		SRC_EX(%a0),%d1
	andi.l		&0x80000000,%d1		# keep DENORM sign
	ori.l		&0x00800000,%d1		# make smallest sgl
	fmov.s		%d1,%fp0
	bra.b		fout_byte_norm

#################################################################
# fmove.w out ###################################################
#################################################################

# Only "Unimplemented Data Type" exceptions enter here. The operand
# is either a DENORM or a NORM.
fout_word:
	tst.b		STAG(%a6)		# is operand normalized?
	bne.b		fout_word_denorm	# no

	fmovm.x		SRC(%a0),&0x80		# load value

fout_word_norm:
	fmov.l		%d0,%fpcr		# insert rnd prec:mode

	fmov.w		%fp0,%d0		# exec move out w/ correct rnd mode

	fmov.l		&0x0,%fpcr		# clear FPCR
	fmov.l		%fpsr,%d1		# fetch FPSR
	or.w		%d1,2+USER_FPSR(%a6)	# save new exc,accrued bits

	mov.b		1+EXC_OPWORD(%a6),%d1	# extract dst mode
	andi.b		&0x38,%d1		# is mode == 0? (Dreg dst)
	beq.b		fout_word_dn		# must save to integer regfile

	mov.l		EXC_EA(%a6),%a0		# stacked <ea> is correct
	bsr.l		_dmem_write_word	# write word

	tst.l		%d1			# did dstore fail?
	bne.l		facc_out_w		# yes

	rts

fout_word_dn:
	mov.b		1+EXC_OPWORD(%a6),%d1	# extract Dn
	andi.w		&0x7,%d1
	bsr.l		store_dreg_w
	rts

fout_word_denorm:
	mov.l		SRC_EX(%a0),%d1
	andi.l		&0x80000000,%d1		# keep DENORM sign
	ori.l		&0x00800000,%d1		# make smallest sgl
	fmov.s		%d1,%fp0
	bra.b		fout_word_norm
	
#################################################################
# fmove.l out ###################################################
#################################################################

# Only "Unimplemented Data Type" exceptions enter here. The operand
# is either a DENORM or a NORM.
fout_long:
	tst.b		STAG(%a6)		# is operand normalized?
	bne.b		fout_long_denorm	# no

	fmovm.x		SRC(%a0),&0x80		# load value

fout_long_norm:
	fmov.l		%d0,%fpcr		# insert rnd prec:mode

	fmov.l		%fp0,%d0		# exec move out w/ correct rnd mode

	fmov.l		&0x0,%fpcr		# clear FPCR
	fmov.l		%fpsr,%d1		# fetch FPSR
	or.w		%d1,2+USER_FPSR(%a6)	# save new exc,accrued bits

fout_long_write:
	mov.b		1+EXC_OPWORD(%a6),%d1	# extract dst mode
	andi.b		&0x38,%d1		# is mode == 0? (Dreg dst)
	beq.b		fout_long_dn		# must save to integer regfile

	mov.l		EXC_EA(%a6),%a0		# stacked <ea> is correct
	bsr.l		_dmem_write_long	# write long

	tst.l		%d1			# did dstore fail?
	bne.l		facc_out_l		# yes

	rts

fout_long_dn:
	mov.b		1+EXC_OPWORD(%a6),%d1	# extract Dn
	andi.w		&0x7,%d1
	bsr.l		store_dreg_l
	rts

fout_long_denorm:
	mov.l		SRC_EX(%a0),%d1
	andi.l		&0x80000000,%d1		# keep DENORM sign
	ori.l		&0x00800000,%d1		# make smallest sgl
	fmov.s		%d1,%fp0
	bra.b		fout_long_norm

#################################################################
# fmove.x out ###################################################
#################################################################

# Only "Unimplemented Data Type" exceptions enter here. The operand
# is either a DENORM or a NORM.
# The DENORM causes an Underflow exception.
fout_ext:

# we copy the extended precision result to FP_SCR0 so that the reserved
# 16-bit field gets zeroed. we do this since we promise not to disturb
# what's at SRC(a0).
	mov.w		SRC_EX(%a0),FP_SCR0_EX(%a6)
	clr.w		2+FP_SCR0_EX(%a6)	# clear reserved field
	mov.l		SRC_HI(%a0),FP_SCR0_HI(%a6)
	mov.l		SRC_LO(%a0),FP_SCR0_LO(%a6)

	fmovm.x		SRC(%a0),&0x80		# return result

	bsr.l		_calc_ea_fout		# fix stacked <ea>

	mov.l		%a0,%a1			# pass: dst addr
	lea		FP_SCR0(%a6),%a0	# pass: src addr
	mov.l		&0xc,%d0		# pass: opsize is 12 bytes

# we must not yet write the extended precision data to the stack
# in the pre-decrement case from supervisor mode or else we'll corrupt 
# the stack frame. so, leave it in FP_SRC for now and deal with it later...
	cmpi.b		SPCOND_FLG(%a6),&mda7_flg
	beq.b		fout_ext_a7

	bsr.l		_dmem_write		# write ext prec number to memory

	tst.l		%d1			# did dstore fail?
	bne.w		fout_ext_err		# yes

	tst.b		STAG(%a6)		# is operand normalized?
	bne.b		fout_ext_denorm		# no
	rts

# the number is a DENORM. must set the underflow exception bit
fout_ext_denorm:
	bset		&unfl_bit,FPSR_EXCEPT(%a6) # set underflow exc bit

	mov.b		FPCR_ENABLE(%a6),%d0
	andi.b		&0x0a,%d0		# is UNFL or INEX enabled?
	bne.b		fout_ext_exc		# yes
	rts

# we don't want to do the write if the exception occurred in supervisor mode
# so _mem_write2() handles this for us.
fout_ext_a7:
	bsr.l		_mem_write2		# write ext prec number to memory

	tst.l		%d1			# did dstore fail?
	bne.w		fout_ext_err		# yes

	tst.b		STAG(%a6)		# is operand normalized?
	bne.b		fout_ext_denorm		# no
	rts

fout_ext_exc:
	lea		FP_SCR0(%a6),%a0
	bsr.l		norm			# normalize the mantissa
	neg.w		%d0			# new exp = -(shft amt)
	andi.w		&0x7fff,%d0
	andi.w		&0x8000,FP_SCR0_EX(%a6)	# keep only old sign
	or.w		%d0,FP_SCR0_EX(%a6)	# insert new exponent
	fmovm.x		FP_SCR0(%a6),&0x40	# return EXOP in fp1
	rts

fout_ext_err:
	mov.l		EXC_A6(%a6),(%a6)	# fix stacked a6
	bra.l		facc_out_x

#########################################################################
# fmove.s out ###########################################################
#########################################################################
fout_sgl:
	andi.b		&0x30,%d0		# clear rnd prec
	ori.b		&s_mode*0x10,%d0	# insert sgl prec
	mov.l		%d0,L_SCR3(%a6)		# save rnd prec,mode on stack

#
# operand is a normalized number. first, we check to see if the move out
# would cause either an underflow or overflow. these cases are handled
# separately. otherwise, set the FPCR to the proper rounding mode and
# execute the move.
#
	mov.w		SRC_EX(%a0),%d0		# extract exponent
	andi.w		&0x7fff,%d0		# strip sign

	cmpi.w		%d0,&SGL_HI		# will operand overflow?
	bgt.w		fout_sgl_ovfl		# yes; go handle OVFL
	beq.w		fout_sgl_may_ovfl	# maybe; go handle possible OVFL
	cmpi.w		%d0,&SGL_LO		# will operand underflow?
	blt.w		fout_sgl_unfl		# yes; go handle underflow

#
# NORMs(in range) can be stored out by a simple "fmov.s"
# Unnormalized inputs can come through this point.
#
fout_sgl_exg:
	fmovm.x		SRC(%a0),&0x80		# fetch fop from stack

	fmov.l		L_SCR3(%a6),%fpcr	# set FPCR
	fmov.l		&0x0,%fpsr		# clear FPSR

	fmov.s		%fp0,%d0		# store does convert and round

	fmov.l		&0x0,%fpcr		# clear FPCR
	fmov.l		%fpsr,%d1		# save FPSR

	or.w		%d1,2+USER_FPSR(%a6) 	# set possible inex2/ainex

fout_sgl_exg_write:
	mov.b		1+EXC_OPWORD(%a6),%d1	# extract dst mode
	andi.b		&0x38,%d1		# is mode == 0? (Dreg dst)
	beq.b		fout_sgl_exg_write_dn	# must save to integer regfile

	mov.l		EXC_EA(%a6),%a0		# stacked <ea> is correct
	bsr.l		_dmem_write_long	# write long

	tst.l		%d1			# did dstore fail?
	bne.l		facc_out_l		# yes

	rts

fout_sgl_exg_write_dn:
	mov.b		1+EXC_OPWORD(%a6),%d1	# extract Dn
	andi.w		&0x7,%d1
	bsr.l		store_dreg_l
	rts

#
# here, we know that the operand would UNFL if moved out to single prec,
# so, denorm and round and then use generic store single routine to
# write the value to memory.
#
fout_sgl_unfl:
	bset		&unfl_bit,FPSR_EXCEPT(%a6) # set UNFL

	mov.w		SRC_EX(%a0),FP_SCR0_EX(%a6)
	mov.l		SRC_HI(%a0),FP_SCR0_HI(%a6)
	mov.l		SRC_LO(%a0),FP_SCR0_LO(%a6)
	mov.l		%a0,-(%sp)

	clr.l		%d0			# pass: S.F. = 0

	cmpi.b		STAG(%a6),&DENORM	# fetch src optype tag
	bne.b		fout_sgl_unfl_cont	# let DENORMs fall through

	lea		FP_SCR0(%a6),%a0
	bsr.l		norm			# normalize the DENORM
	
fout_sgl_unfl_cont:
	lea		FP_SCR0(%a6),%a0	# pass: ptr to operand
	mov.l		L_SCR3(%a6),%d1		# pass: rnd prec,mode
	bsr.l		unf_res			# calc default underflow result

	lea		FP_SCR0(%a6),%a0	# pass: ptr to fop
	bsr.l		dst_sgl			# convert to single prec

	mov.b		1+EXC_OPWORD(%a6),%d1	# extract dst mode
	andi.b		&0x38,%d1		# is mode == 0? (Dreg dst)
	beq.b		fout_sgl_unfl_dn	# must save to integer regfile

	mov.l		EXC_EA(%a6),%a0		# stacked <ea> is correct
	bsr.l		_dmem_write_long	# write long

	tst.l		%d1			# did dstore fail?
	bne.l		facc_out_l		# yes

	bra.b		fout_sgl_unfl_chkexc

fout_sgl_unfl_dn:
	mov.b		1+EXC_OPWORD(%a6),%d1	# extract Dn
	andi.w		&0x7,%d1
	bsr.l		store_dreg_l

fout_sgl_unfl_chkexc:
	mov.b		FPCR_ENABLE(%a6),%d1
	andi.b		&0x0a,%d1		# is UNFL or INEX enabled?
	bne.w		fout_sd_exc_unfl	# yes
	addq.l		&0x4,%sp
	rts

#
# it's definitely an overflow so call ovf_res to get the correct answer
#
fout_sgl_ovfl:
	tst.b		3+SRC_HI(%a0)		# is result inexact?
	bne.b		fout_sgl_ovfl_inex2
	tst.l		SRC_LO(%a0)		# is result inexact?
	bne.b		fout_sgl_ovfl_inex2
	ori.w		&ovfl_inx_mask,2+USER_FPSR(%a6) # set ovfl/aovfl/ainex
	bra.b		fout_sgl_ovfl_cont
fout_sgl_ovfl_inex2:
	ori.w		&ovfinx_mask,2+USER_FPSR(%a6) # set ovfl/aovfl/ainex/inex2

fout_sgl_ovfl_cont:
	mov.l		%a0,-(%sp)

# call ovf_res() w/ sgl prec and the correct rnd mode to create the default
# overflow result. DON'T save the returned ccodes from ovf_res() since
# fmove out doesn't alter them. 
	tst.b		SRC_EX(%a0)		# is operand negative?
	smi		%d1			# set if so
	mov.l		L_SCR3(%a6),%d0		# pass: sgl prec,rnd mode
	bsr.l		ovf_res			# calc OVFL result
	fmovm.x		(%a0),&0x80		# load default overflow result
	fmov.s		%fp0,%d0		# store to single

	mov.b		1+EXC_OPWORD(%a6),%d1	# extract dst mode
	andi.b		&0x38,%d1		# is mode == 0? (Dreg dst)
	beq.b		fout_sgl_ovfl_dn	# must save to integer regfile

	mov.l		EXC_EA(%a6),%a0		# stacked <ea> is correct
	bsr.l		_dmem_write_long	# write long

	tst.l		%d1			# did dstore fail?
	bne.l		facc_out_l		# yes

	bra.b		fout_sgl_ovfl_chkexc

fout_sgl_ovfl_dn:
	mov.b		1+EXC_OPWORD(%a6),%d1	# extract Dn
	andi.w		&0x7,%d1
	bsr.l		store_dreg_l

fout_sgl_ovfl_chkexc:
	mov.b		FPCR_ENABLE(%a6),%d1
	andi.b		&0x0a,%d1		# is UNFL or INEX enabled?
	bne.w		fout_sd_exc_ovfl	# yes
	addq.l		&0x4,%sp
	rts

#
# move out MAY overflow:
# (1) force the exp to 0x3fff
# (2) do a move w/ appropriate rnd mode
# (3) if exp still equals zero, then insert original exponent
#	for the correct result.
#     if exp now equals one, then it overflowed so call ovf_res.
#
fout_sgl_may_ovfl:
	mov.w		SRC_EX(%a0),%d1		# fetch current sign
	andi.w		&0x8000,%d1		# keep it,clear exp
	ori.w		&0x3fff,%d1		# insert exp = 0
	mov.w		%d1,FP_SCR0_EX(%a6)	# insert scaled exp
	mov.l		SRC_HI(%a0),FP_SCR0_HI(%a6) # copy hi(man)
	mov.l		SRC_LO(%a0),FP_SCR0_LO(%a6) # copy lo(man)

	fmov.l		L_SCR3(%a6),%fpcr	# set FPCR

	fmov.x		FP_SCR0(%a6),%fp0	# force fop to be rounded
	fmov.l		&0x0,%fpcr		# clear FPCR

	fabs.x		%fp0			# need absolute value
	fcmp.b		%fp0,&0x2		# did exponent increase?
	fblt.w		fout_sgl_exg		# no; go finish NORM	
	bra.w		fout_sgl_ovfl		# yes; go handle overflow

################

fout_sd_exc_unfl:
	mov.l		(%sp)+,%a0

	mov.w		SRC_EX(%a0),FP_SCR0_EX(%a6)
	mov.l		SRC_HI(%a0),FP_SCR0_HI(%a6)
	mov.l		SRC_LO(%a0),FP_SCR0_LO(%a6)

	cmpi.b		STAG(%a6),&DENORM	# was src a DENORM?
	bne.b		fout_sd_exc_cont	# no

	lea		FP_SCR0(%a6),%a0
	bsr.l		norm
	neg.l		%d0
	andi.w		&0x7fff,%d0
	bfins		%d0,FP_SCR0_EX(%a6){&1:&15}
	bra.b		fout_sd_exc_cont

fout_sd_exc:
fout_sd_exc_ovfl:
	mov.l		(%sp)+,%a0		# restore a0

	mov.w		SRC_EX(%a0),FP_SCR0_EX(%a6)
	mov.l		SRC_HI(%a0),FP_SCR0_HI(%a6)
	mov.l		SRC_LO(%a0),FP_SCR0_LO(%a6)

fout_sd_exc_cont:
	bclr		&0x7,FP_SCR0_EX(%a6)	# clear sign bit
	sne.b		2+FP_SCR0_EX(%a6)	# set internal sign bit
	lea		FP_SCR0(%a6),%a0	# pass: ptr to DENORM

	mov.b		3+L_SCR3(%a6),%d1
	lsr.b		&0x4,%d1
	andi.w		&0x0c,%d1
	swap		%d1
	mov.b		3+L_SCR3(%a6),%d1
	lsr.b		&0x4,%d1
	andi.w		&0x03,%d1
	clr.l		%d0			# pass: zero g,r,s
	bsr.l		_round			# round the DENORM

	tst.b		2+FP_SCR0_EX(%a6)	# is EXOP negative?
	beq.b		fout_sd_exc_done	# no
	bset		&0x7,FP_SCR0_EX(%a6)	# yes

fout_sd_exc_done:
	fmovm.x		FP_SCR0(%a6),&0x40	# return EXOP in fp1
	rts

#################################################################
# fmove.d out ###################################################
#################################################################
fout_dbl:
	andi.b		&0x30,%d0		# clear rnd prec
	ori.b		&d_mode*0x10,%d0	# insert dbl prec
	mov.l		%d0,L_SCR3(%a6)		# save rnd prec,mode on stack

#
# operand is a normalized number. first, we check to see if the move out
# would cause either an underflow or overflow. these cases are handled
# separately. otherwise, set the FPCR to the proper rounding mode and
# execute the move.
#
	mov.w		SRC_EX(%a0),%d0		# extract exponent
	andi.w		&0x7fff,%d0		# strip sign

	cmpi.w		%d0,&DBL_HI		# will operand overflow?
	bgt.w		fout_dbl_ovfl		# yes; go handle OVFL
	beq.w		fout_dbl_may_ovfl	# maybe; go handle possible OVFL
	cmpi.w		%d0,&DBL_LO		# will operand underflow?
	blt.w		fout_dbl_unfl		# yes; go handle underflow

#
# NORMs(in range) can be stored out by a simple "fmov.d"
# Unnormalized inputs can come through this point.
#
fout_dbl_exg:
	fmovm.x		SRC(%a0),&0x80		# fetch fop from stack

	fmov.l		L_SCR3(%a6),%fpcr	# set FPCR
	fmov.l		&0x0,%fpsr		# clear FPSR

	fmov.d		%fp0,L_SCR1(%a6)	# store does convert and round

	fmov.l		&0x0,%fpcr		# clear FPCR
	fmov.l		%fpsr,%d0		# save FPSR

	or.w		%d0,2+USER_FPSR(%a6) 	# set possible inex2/ainex

	mov.l		EXC_EA(%a6),%a1		# pass: dst addr
	lea		L_SCR1(%a6),%a0		# pass: src addr
	movq.l		&0x8,%d0		# pass: opsize is 8 bytes
	bsr.l		_dmem_write		# store dbl fop to memory

	tst.l		%d1			# did dstore fail?
	bne.l		facc_out_d		# yes

	rts					# no; so we're finished	

#
# here, we know that the operand would UNFL if moved out to double prec,
# so, denorm and round and then use generic store double routine to
# write the value to memory.
#
fout_dbl_unfl:
	bset		&unfl_bit,FPSR_EXCEPT(%a6) # set UNFL

	mov.w		SRC_EX(%a0),FP_SCR0_EX(%a6)
	mov.l		SRC_HI(%a0),FP_SCR0_HI(%a6)
	mov.l		SRC_LO(%a0),FP_SCR0_LO(%a6)
	mov.l		%a0,-(%sp)

	clr.l		%d0			# pass: S.F. = 0

	cmpi.b		STAG(%a6),&DENORM	# fetch src optype tag
	bne.b		fout_dbl_unfl_cont	# let DENORMs fall through

	lea		FP_SCR0(%a6),%a0
	bsr.l		norm			# normalize the DENORM
	
fout_dbl_unfl_cont:
	lea		FP_SCR0(%a6),%a0	# pass: ptr to operand
	mov.l		L_SCR3(%a6),%d1		# pass: rnd prec,mode
	bsr.l		unf_res			# calc default underflow result

	lea		FP_SCR0(%a6),%a0	# pass: ptr to fop
	bsr.l		dst_dbl			# convert to single prec
	mov.l		%d0,L_SCR1(%a6)
	mov.l		%d1,L_SCR2(%a6)

	mov.l		EXC_EA(%a6),%a1		# pass: dst addr
	lea		L_SCR1(%a6),%a0		# pass: src addr
	movq.l		&0x8,%d0		# pass: opsize is 8 bytes
	bsr.l		_dmem_write		# store dbl fop to memory

	tst.l		%d1			# did dstore fail?
	bne.l		facc_out_d		# yes

	mov.b		FPCR_ENABLE(%a6),%d1
	andi.b		&0x0a,%d1		# is UNFL or INEX enabled?
	bne.w		fout_sd_exc_unfl	# yes
	addq.l		&0x4,%sp
	rts

#
# it's definitely an overflow so call ovf_res to get the correct answer
#
fout_dbl_ovfl:
	mov.w		2+SRC_LO(%a0),%d0
	andi.w		&0x7ff,%d0
	bne.b		fout_dbl_ovfl_inex2

	ori.w		&ovfl_inx_mask,2+USER_FPSR(%a6) # set ovfl/aovfl/ainex
	bra.b		fout_dbl_ovfl_cont
fout_dbl_ovfl_inex2:
	ori.w		&ovfinx_mask,2+USER_FPSR(%a6) # set ovfl/aovfl/ainex/inex2

fout_dbl_ovfl_cont:
	mov.l		%a0,-(%sp)

# call ovf_res() w/ dbl prec and the correct rnd mode to create the default
# overflow result. DON'T save the returned ccodes from ovf_res() since
# fmove out doesn't alter them. 
	tst.b		SRC_EX(%a0)		# is operand negative?
	smi		%d1			# set if so
	mov.l		L_SCR3(%a6),%d0		# pass: dbl prec,rnd mode
	bsr.l		ovf_res			# calc OVFL result
	fmovm.x		(%a0),&0x80		# load default overflow result
	fmov.d		%fp0,L_SCR1(%a6)	# store to double

	mov.l		EXC_EA(%a6),%a1		# pass: dst addr
	lea		L_SCR1(%a6),%a0		# pass: src addr
	movq.l		&0x8,%d0		# pass: opsize is 8 bytes
	bsr.l		_dmem_write		# store dbl fop to memory

	tst.l		%d1			# did dstore fail?
	bne.l		facc_out_d		# yes

	mov.b		FPCR_ENABLE(%a6),%d1
	andi.b		&0x0a,%d1		# is UNFL or INEX enabled?
	bne.w		fout_sd_exc_ovfl	# yes
	addq.l		&0x4,%sp
	rts

#
# move out MAY overflow:
# (1) force the exp to 0x3fff
# (2) do a move w/ appropriate rnd mode
# (3) if exp still equals zero, then insert original exponent
#	for the correct result.
#     if exp now equals one, then it overflowed so call ovf_res.
#
fout_dbl_may_ovfl:
	mov.w		SRC_EX(%a0),%d1		# fetch current sign
	andi.w		&0x8000,%d1		# keep it,clear exp
	ori.w		&0x3fff,%d1		# insert exp = 0
	mov.w		%d1,FP_SCR0_EX(%a6)	# insert scaled exp
	mov.l		SRC_HI(%a0),FP_SCR0_HI(%a6) # copy hi(man)
	mov.l		SRC_LO(%a0),FP_SCR0_LO(%a6) # copy lo(man)

	fmov.l		L_SCR3(%a6),%fpcr	# set FPCR

	fmov.x		FP_SCR0(%a6),%fp0	# force fop to be rounded
	fmov.l		&0x0,%fpcr		# clear FPCR

	fabs.x		%fp0			# need absolute value
	fcmp.b		%fp0,&0x2		# did exponent increase?
	fblt.w		fout_dbl_exg		# no; go finish NORM	
	bra.w		fout_dbl_ovfl		# yes; go handle overflow

#########################################################################
# XDEF ****************************************************************	#
# 	dst_dbl(): create double precision value from extended prec.	#
#									#
# XREF ****************************************************************	#
#	None								#
#									#
# INPUT ***************************************************************	#
#	a0 = pointer to source operand in extended precision		#
# 									#
# OUTPUT **************************************************************	#
#	d0 = hi(double precision result)				#
#	d1 = lo(double precision result)				#
#									#
# ALGORITHM ***********************************************************	#
#									#
#  Changes extended precision to double precision.			#
#  Note: no attempt is made to round the extended value to double.	#
#	dbl_sign = ext_sign						#
#	dbl_exp = ext_exp - $3fff(ext bias) + $7ff(dbl bias)		#
#	get rid of ext integer bit					#
#	dbl_mant = ext_mant{62:12}					#
#									#
#	    	---------------   ---------------    ---------------	#
#  extended ->  |s|    exp    |   |1| ms mant   |    | ls mant     |	#
#	    	---------------   ---------------    ---------------	#
#	   	 95	    64    63 62	      32      31     11	  0	#
#				     |			     |		#
#				     |			     |		#
#				     |			     |		#
#		 	             v   		     v		#
#	    		      ---------------   ---------------		#
#  double   ->  	      |s|exp| mant  |   |  mant       |		#
#	    		      ---------------   ---------------		#
#	   	 	      63     51   32   31	       0	#
#									#
#########################################################################

dst_dbl:
	clr.l		%d0			# clear d0
	mov.w		FTEMP_EX(%a0),%d0	# get exponent
	subi.w		&EXT_BIAS,%d0		# subtract extended precision bias
	addi.w		&DBL_BIAS,%d0		# add double precision bias
	tst.b		FTEMP_HI(%a0)		# is number a denorm?
	bmi.b		dst_get_dupper		# no
	subq.w		&0x1,%d0		# yes; denorm bias = DBL_BIAS - 1
dst_get_dupper:
	swap		%d0			# d0 now in upper word
	lsl.l		&0x4,%d0		# d0 in proper place for dbl prec exp
	tst.b		FTEMP_EX(%a0)		# test sign
	bpl.b		dst_get_dman		# if postive, go process mantissa
	bset		&0x1f,%d0		# if negative, set sign
dst_get_dman:
	mov.l		FTEMP_HI(%a0),%d1	# get ms mantissa
	bfextu		%d1{&1:&20},%d1		# get upper 20 bits of ms
	or.l		%d1,%d0			# put these bits in ms word of double
	mov.l		%d0,L_SCR1(%a6)		# put the new exp back on the stack
	mov.l		FTEMP_HI(%a0),%d1	# get ms mantissa
	mov.l		&21,%d0			# load shift count
	lsl.l		%d0,%d1			# put lower 11 bits in upper bits
	mov.l		%d1,L_SCR2(%a6)		# build lower lword in memory
	mov.l		FTEMP_LO(%a0),%d1	# get ls mantissa
	bfextu		%d1{&0:&21},%d0		# get ls 21 bits of double
	mov.l		L_SCR2(%a6),%d1
	or.l		%d0,%d1			# put them in double result
	mov.l		L_SCR1(%a6),%d0
	rts

#########################################################################
# XDEF ****************************************************************	#
# 	dst_sgl(): create single precision value from extended prec	#
#									#
# XREF ****************************************************************	#
#									#
# INPUT ***************************************************************	#
#	a0 = pointer to source operand in extended precision		#
# 									#
# OUTPUT **************************************************************	#
#	d0 = single precision result					#
#									#
# ALGORITHM ***********************************************************	#
#									#
# Changes extended precision to single precision.			#
#	sgl_sign = ext_sign						#
#	sgl_exp = ext_exp - $3fff(ext bias) + $7f(sgl bias)		#
#	get rid of ext integer bit					#
#	sgl_mant = ext_mant{62:12}					#
#									#
#	    	---------------   ---------------    ---------------	#
#  extended ->  |s|    exp    |   |1| ms mant   |    | ls mant     |	#
#	    	---------------   ---------------    ---------------	#
#	   	 95	    64    63 62	   40 32      31     12	  0	#
#				     |	   |				#
#				     |	   |				#
#				     |	   |				#
#		 	             v     v				#
#	    		      ---------------				#
#  single   ->  	      |s|exp| mant  |				#
#	    		      ---------------				#
#	   	 	      31     22     0				#
#									#
#########################################################################

dst_sgl:
	clr.l		%d0
	mov.w		FTEMP_EX(%a0),%d0	# get exponent
	subi.w		&EXT_BIAS,%d0		# subtract extended precision bias
	addi.w		&SGL_BIAS,%d0		# add single precision bias
	tst.b		FTEMP_HI(%a0)		# is number a denorm?
	bmi.b		dst_get_supper		# no
	subq.w		&0x1,%d0		# yes; denorm bias = SGL_BIAS - 1
dst_get_supper:
	swap		%d0			# put exp in upper word of d0
	lsl.l		&0x7,%d0		# shift it into single exp bits
	tst.b		FTEMP_EX(%a0)		# test sign
	bpl.b		dst_get_sman		# if positive, continue
	bset		&0x1f,%d0		# if negative, put in sign first
dst_get_sman:
	mov.l		FTEMP_HI(%a0),%d1	# get ms mantissa
	andi.l		&0x7fffff00,%d1		# get upper 23 bits of ms
	lsr.l		&0x8,%d1		# and put them flush right
	or.l		%d1,%d0			# put these bits in ms word of single
	rts

##############################################################################
fout_pack:
	bsr.l		_calc_ea_fout		# fetch the <ea>
	mov.l		%a0,-(%sp)

	mov.b		STAG(%a6),%d0		# fetch input type
	bne.w		fout_pack_not_norm	# input is not NORM

fout_pack_norm:
	btst		&0x4,EXC_CMDREG(%a6)	# static or dynamic?
	beq.b		fout_pack_s		# static

fout_pack_d:
	mov.b		1+EXC_CMDREG(%a6),%d1	# fetch dynamic reg
	lsr.b		&0x4,%d1
	andi.w		&0x7,%d1

	bsr.l		fetch_dreg		# fetch Dn w/ k-factor

	bra.b		fout_pack_type
fout_pack_s:
	mov.b		1+EXC_CMDREG(%a6),%d0	# fetch static field

fout_pack_type:
	bfexts		%d0{&25:&7},%d0		# extract k-factor
	mov.l	%d0,-(%sp)

	lea		FP_SRC(%a6),%a0		# pass: ptr to input

# bindec is currently scrambling FP_SRC for denorm inputs.
# we'll have to change this, but for now, tough luck!!!
	bsr.l		bindec			# convert xprec to packed

#	andi.l		&0xcfff000f,FP_SCR0(%a6) # clear unused fields
	andi.l		&0xcffff00f,FP_SCR0(%a6) # clear unused fields

	mov.l	(%sp)+,%d0

	tst.b		3+FP_SCR0_EX(%a6)
	bne.b		fout_pack_set
	tst.l		FP_SCR0_HI(%a6)
	bne.b		fout_pack_set
	tst.l		FP_SCR0_LO(%a6)
	bne.b		fout_pack_set

# add the extra condition that only if the k-factor was zero, too, should
# we zero the exponent
	tst.l		%d0
	bne.b		fout_pack_set	
# "mantissa" is all zero which means that the answer is zero. but, the '040
# algorithm allows the exponent to be non-zero. the 881/2 do not. therefore,
# if the mantissa is zero, I will zero the exponent, too.
# the question now is whether the exponents sign bit is allowed to be non-zero
# for a zero, also...
	andi.w		&0xf000,FP_SCR0(%a6)

fout_pack_set:

	lea		FP_SCR0(%a6),%a0	# pass: src addr

fout_pack_write:
	mov.l		(%sp)+,%a1		# pass: dst addr
	mov.l		&0xc,%d0		# pass: opsize is 12 bytes

	cmpi.b		SPCOND_FLG(%a6),&mda7_flg
	beq.b		fout_pack_a7

	bsr.l		_dmem_write		# write ext prec number to memory

	tst.l		%d1			# did dstore fail?
	bne.w		fout_ext_err		# yes

	rts

# we don't want to do the write if the exception occurred in supervisor mode
# so _mem_write2() handles this for us.
fout_pack_a7:
	bsr.l		_mem_write2		# write ext prec number to memory

	tst.l		%d1			# did dstore fail?
	bne.w		fout_ext_err		# yes

	rts

fout_pack_not_norm:
	cmpi.b		%d0,&DENORM		# is it a DENORM?
	beq.w		fout_pack_norm		# yes
	lea		FP_SRC(%a6),%a0
	clr.w		2+FP_SRC_EX(%a6)
	cmpi.b		%d0,&SNAN		# is it an SNAN?
	beq.b		fout_pack_snan		# yes
	bra.b		fout_pack_write		# no

fout_pack_snan:
	ori.w		&snaniop2_mask,FPSR_EXCEPT(%a6) # set SNAN/AIOP
	bset		&0x6,FP_SRC_HI(%a6)	# set snan bit
	bra.b		fout_pack_write

#########################################################################
# XDEF ****************************************************************	#
#	fetch_dreg(): fetch register according to index in d1		#
#									#
# XREF ****************************************************************	#
#	None								#
#									#
# INPUT ***************************************************************	#
#	d1 = index of register to fetch from				#
# 									#
# OUTPUT **************************************************************	#
#	d0 = value of register fetched					#
#									#
# ALGORITHM ***********************************************************	#
#	According to the index value in d1 which can range from zero 	#
# to fifteen, load the corresponding register file value (where 	#
# address register indexes start at 8). D0/D1/A0/A1/A6/A7 are on the	#
# stack. The rest should still be in their original places.		#
#									#
#########################################################################

# this routine leaves d1 intact for subsequent store_dreg calls.
	global		fetch_dreg
fetch_dreg:
	mov.w		(tbl_fdreg.b,%pc,%d1.w*2),%d0
	jmp		(tbl_fdreg.b,%pc,%d0.w*1)

tbl_fdreg:
	short		fdreg0 - tbl_fdreg
	short		fdreg1 - tbl_fdreg
	short		fdreg2 - tbl_fdreg
	short		fdreg3 - tbl_fdreg
	short		fdreg4 - tbl_fdreg
	short		fdreg5 - tbl_fdreg
	short		fdreg6 - tbl_fdreg
	short		fdreg7 - tbl_fdreg
	short		fdreg8 - tbl_fdreg
	short		fdreg9 - tbl_fdreg
	short		fdrega - tbl_fdreg
	short		fdregb - tbl_fdreg
	short		fdregc - tbl_fdreg
	short		fdregd - tbl_fdreg
	short		fdrege - tbl_fdreg
	short		fdregf - tbl_fdreg

fdreg0:
	mov.l		EXC_DREGS+0x0(%a6),%d0
	rts
fdreg1:
	mov.l		EXC_DREGS+0x4(%a6),%d0
	rts
fdreg2:
	mov.l		%d2,%d0
	rts
fdreg3:
	mov.l		%d3,%d0
	rts
fdreg4:
	mov.l		%d4,%d0
	rts
fdreg5:
	mov.l		%d5,%d0
	rts
fdreg6:
	mov.l		%d6,%d0
	rts
fdreg7:
	mov.l		%d7,%d0
	rts
fdreg8:
	mov.l		EXC_DREGS+0x8(%a6),%d0
	rts
fdreg9:
	mov.l		EXC_DREGS+0xc(%a6),%d0
	rts
fdrega:
	mov.l		%a2,%d0
	rts
fdregb:
	mov.l		%a3,%d0
	rts
fdregc:
	mov.l		%a4,%d0
	rts
fdregd:
	mov.l		%a5,%d0
	rts
fdrege:
	mov.l		(%a6),%d0
	rts
fdregf:
	mov.l		EXC_A7(%a6),%d0
	rts

#########################################################################
# XDEF ****************************************************************	#
#	store_dreg_l(): store longword to data register specified by d1	#
#									#
# XREF ****************************************************************	#
#	None								#
#									#
# INPUT ***************************************************************	#
#	d0 = longowrd value to store					#
#	d1 = index of register to fetch from				#
# 									#
# OUTPUT **************************************************************	#
#	(data register is updated)					#
#									#
# ALGORITHM ***********************************************************	#
#	According to the index value in d1, store the longword value	#
# in d0 to the corresponding data register. D0/D1 are on the stack	#
# while the rest are in their initial places.				#
#									#
#########################################################################

	global		store_dreg_l
store_dreg_l:
	mov.w		(tbl_sdregl.b,%pc,%d1.w*2),%d1
	jmp		(tbl_sdregl.b,%pc,%d1.w*1)

tbl_sdregl:
	short		sdregl0 - tbl_sdregl
	short		sdregl1 - tbl_sdregl
	short		sdregl2 - tbl_sdregl
	short		sdregl3 - tbl_sdregl
	short		sdregl4 - tbl_sdregl
	short		sdregl5 - tbl_sdregl
	short		sdregl6 - tbl_sdregl
	short		sdregl7 - tbl_sdregl

sdregl0:
	mov.l		%d0,EXC_DREGS+0x0(%a6)
	rts
sdregl1:
	mov.l		%d0,EXC_DREGS+0x4(%a6)
	rts
sdregl2:
	mov.l		%d0,%d2
	rts
sdregl3:
	mov.l		%d0,%d3
	rts
sdregl4:
	mov.l		%d0,%d4
	rts
sdregl5:
	mov.l		%d0,%d5
	rts
sdregl6:
	mov.l		%d0,%d6
	rts
sdregl7:
	mov.l		%d0,%d7
	rts

#########################################################################
# XDEF ****************************************************************	#
#	store_dreg_w(): store word to data register specified by d1	#
#									#
# XREF ****************************************************************	#
#	None								#
#									#
# INPUT ***************************************************************	#
#	d0 = word value to store					#
#	d1 = index of register to fetch from				#
# 									#
# OUTPUT **************************************************************	#
#	(data register is updated)					#
#									#
# ALGORITHM ***********************************************************	#
#	According to the index value in d1, store the word value	#
# in d0 to the corresponding data register. D0/D1 are on the stack	#
# while the rest are in their initial places.				#
#									#
#########################################################################

	global		store_dreg_w
store_dreg_w:
	mov.w		(tbl_sdregw.b,%pc,%d1.w*2),%d1
	jmp		(tbl_sdregw.b,%pc,%d1.w*1)

tbl_sdregw:
	short		sdregw0 - tbl_sdregw
	short		sdregw1 - tbl_sdregw
	short		sdregw2 - tbl_sdregw
	short		sdregw3 - tbl_sdregw
	short		sdregw4 - tbl_sdregw
	short		sdregw5 - tbl_sdregw
	short		sdregw6 - tbl_sdregw
	short		sdregw7 - tbl_sdregw

sdregw0:
	mov.w		%d0,2+EXC_DREGS+0x0(%a6)
	rts
sdregw1:
	mov.w		%d0,2+EXC_DREGS+0x4(%a6)
	rts
sdregw2:
	mov.w		%d0,%d2
	rts
sdregw3:
	mov.w		%d0,%d3
	rts
sdregw4:
	mov.w		%d0,%d4
	rts
sdregw5:
	mov.w		%d0,%d5
	rts
sdregw6:
	mov.w		%d0,%d6
	rts
sdregw7:
	mov.w		%d0,%d7
	rts

#########################################################################
# XDEF ****************************************************************	#
#	store_dreg_b(): store byte to data register specified by d1	#
#									#
# XREF ****************************************************************	#
#	None								#
#									#
# INPUT ***************************************************************	#
#	d0 = byte value to store					#
#	d1 = index of register to fetch from				#
# 									#
# OUTPUT **************************************************************	#
#	(data register is updated)					#
#									#
# ALGORITHM ***********************************************************	#
#	According to the index value in d1, store the byte value	#
# in d0 to the corresponding data register. D0/D1 are on the stack	#
# while the rest are in their initial places.				#
#									#
#########################################################################

	global		store_dreg_b
store_dreg_b:
	mov.w		(tbl_sdregb.b,%pc,%d1.w*2),%d1
	jmp		(tbl_sdregb.b,%pc,%d1.w*1)

tbl_sdregb:
	short		sdregb0 - tbl_sdregb
	short		sdregb1 - tbl_sdregb
	short		sdregb2 - tbl_sdregb
	short		sdregb3 - tbl_sdregb
	short		sdregb4 - tbl_sdregb
	short		sdregb5 - tbl_sdregb
	short		sdregb6 - tbl_sdregb
	short		sdregb7 - tbl_sdregb

sdregb0:
	mov.b		%d0,3+EXC_DREGS+0x0(%a6)
	rts
sdregb1:
	mov.b		%d0,3+EXC_DREGS+0x4(%a6)
	rts
sdregb2:
	mov.b		%d0,%d2
	rts
sdregb3:
	mov.b		%d0,%d3
	rts
sdregb4:
	mov.b		%d0,%d4
	rts
sdregb5:
	mov.b		%d0,%d5
	rts
sdregb6:
	mov.b		%d0,%d6
	rts
sdregb7:
	mov.b		%d0,%d7
	rts

#########################################################################
# XDEF ****************************************************************	#
#	inc_areg(): increment an address register by the value in d0	#
#									#
# XREF ****************************************************************	#
#	None								#
#									#
# INPUT ***************************************************************	#
#	d0 = amount to increment by					#
#	d1 = index of address register to increment			#
# 									#
# OUTPUT **************************************************************	#
#	(address register is updated)					#
#									#
# ALGORITHM ***********************************************************	#
# 	Typically used for an instruction w/ a post-increment <ea>, 	#
# this routine adds the increment value in d0 to the address register	#
# specified by d1. A0/A1/A6/A7 reside on the stack. The rest reside	#
# in their original places.						#
# 	For a7, if the increment amount is one, then we have to 	#
# increment by two. For any a7 update, set the mia7_flag so that if	#
# an access error exception occurs later in emulation, this address	#
# register update can be undone.					#
#									#
#########################################################################

	global		inc_areg
inc_areg:
	mov.w		(tbl_iareg.b,%pc,%d1.w*2),%d1
	jmp		(tbl_iareg.b,%pc,%d1.w*1)

tbl_iareg:
	short		iareg0 - tbl_iareg
	short		iareg1 - tbl_iareg
	short		iareg2 - tbl_iareg
	short		iareg3 - tbl_iareg
	short		iareg4 - tbl_iareg
	short		iareg5 - tbl_iareg
	short		iareg6 - tbl_iareg
	short		iareg7 - tbl_iareg

iareg0:	add.l		%d0,EXC_DREGS+0x8(%a6)
	rts
iareg1:	add.l		%d0,EXC_DREGS+0xc(%a6)
	rts
iareg2:	add.l		%d0,%a2
	rts
iareg3:	add.l		%d0,%a3
	rts
iareg4:	add.l		%d0,%a4
	rts
iareg5:	add.l		%d0,%a5
	rts
iareg6:	add.l		%d0,(%a6)
	rts
iareg7:	mov.b		&mia7_flg,SPCOND_FLG(%a6)
	cmpi.b		%d0,&0x1
	beq.b		iareg7b
	add.l		%d0,EXC_A7(%a6)
	rts
iareg7b:
	addq.l		&0x2,EXC_A7(%a6)
	rts

#########################################################################
# XDEF ****************************************************************	#
#	dec_areg(): decrement an address register by the value in d0	#
#									#
# XREF ****************************************************************	#
#	None								#
#									#
# INPUT ***************************************************************	#
#	d0 = amount to decrement by					#
#	d1 = index of address register to decrement			#
# 									#
# OUTPUT **************************************************************	#
#	(address register is updated)					#
#									#
# ALGORITHM ***********************************************************	#
# 	Typically used for an instruction w/ a pre-decrement <ea>, 	#
# this routine adds the decrement value in d0 to the address register	#
# specified by d1. A0/A1/A6/A7 reside on the stack. The rest reside	#
# in their original places.						#
# 	For a7, if the decrement amount is one, then we have to 	#
# decrement by two. For any a7 update, set the mda7_flag so that if	#
# an access error exception occurs later in emulation, this address	#
# register update can be undone.					#
#									#
#########################################################################

	global		dec_areg
dec_areg:
	mov.w		(tbl_dareg.b,%pc,%d1.w*2),%d1
	jmp		(tbl_dareg.b,%pc,%d1.w*1)

tbl_dareg:
	short		dareg0 - tbl_dareg
	short		dareg1 - tbl_dareg
	short		dareg2 - tbl_dareg
	short		dareg3 - tbl_dareg
	short		dareg4 - tbl_dareg
	short		dareg5 - tbl_dareg
	short		dareg6 - tbl_dareg
	short		dareg7 - tbl_dareg

dareg0:	sub.l		%d0,EXC_DREGS+0x8(%a6)
	rts
dareg1:	sub.l		%d0,EXC_DREGS+0xc(%a6)
	rts
dareg2:	sub.l		%d0,%a2
	rts
dareg3:	sub.l		%d0,%a3
	rts
dareg4:	sub.l		%d0,%a4
	rts
dareg5:	sub.l		%d0,%a5
	rts
dareg6:	sub.l		%d0,(%a6)
	rts
dareg7:	mov.b		&mda7_flg,SPCOND_FLG(%a6)
	cmpi.b		%d0,&0x1
	beq.b		dareg7b
	sub.l		%d0,EXC_A7(%a6)
	rts
dareg7b:
	subq.l		&0x2,EXC_A7(%a6)
	rts

##############################################################################

#########################################################################
# XDEF ****************************************************************	#
#	load_fpn1(): load FP register value into FP_SRC(a6).		#
#									#
# XREF ****************************************************************	#
#	None								#
#									#
# INPUT ***************************************************************	#
#	d0 = index of FP register to load				#
# 									#
# OUTPUT **************************************************************	#
#	FP_SRC(a6) = value loaded from FP register file			#
#									#
# ALGORITHM ***********************************************************	#
#	Using the index in d0, load FP_SRC(a6) with a number from the 	#
# FP register file.							#
#									#
#########################################################################

	global 		load_fpn1
load_fpn1:
	mov.w		(tbl_load_fpn1.b,%pc,%d0.w*2), %d0
	jmp		(tbl_load_fpn1.b,%pc,%d0.w*1)

tbl_load_fpn1:
	short		load_fpn1_0 - tbl_load_fpn1
	short		load_fpn1_1 - tbl_load_fpn1
	short		load_fpn1_2 - tbl_load_fpn1
	short		load_fpn1_3 - tbl_load_fpn1
	short		load_fpn1_4 - tbl_load_fpn1
	short		load_fpn1_5 - tbl_load_fpn1
	short		load_fpn1_6 - tbl_load_fpn1
	short		load_fpn1_7 - tbl_load_fpn1

load_fpn1_0:
	mov.l		0+EXC_FP0(%a6), 0+FP_SRC(%a6)
	mov.l		4+EXC_FP0(%a6), 4+FP_SRC(%a6)
	mov.l		8+EXC_FP0(%a6), 8+FP_SRC(%a6)
	lea		FP_SRC(%a6), %a0
	rts
load_fpn1_1:
	mov.l		0+EXC_FP1(%a6), 0+FP_SRC(%a6)
	mov.l		4+EXC_FP1(%a6), 4+FP_SRC(%a6)
	mov.l		8+EXC_FP1(%a6), 8+FP_SRC(%a6)
	lea		FP_SRC(%a6), %a0
	rts
load_fpn1_2:
	fmovm.x		&0x20, FP_SRC(%a6)
	lea		FP_SRC(%a6), %a0
	rts
load_fpn1_3:
	fmovm.x		&0x10, FP_SRC(%a6)
	lea		FP_SRC(%a6), %a0
	rts
load_fpn1_4:
	fmovm.x		&0x08, FP_SRC(%a6)
	lea		FP_SRC(%a6), %a0
	rts
load_fpn1_5:
	fmovm.x		&0x04, FP_SRC(%a6)
	lea		FP_SRC(%a6), %a0
	rts
load_fpn1_6:
	fmovm.x		&0x02, FP_SRC(%a6)
	lea		FP_SRC(%a6), %a0
	rts
load_fpn1_7:
	fmovm.x		&0x01, FP_SRC(%a6)
	lea		FP_SRC(%a6), %a0
	rts

#############################################################################

#########################################################################
# XDEF ****************************************************************	#
#	load_fpn2(): load FP register value into FP_DST(a6).		#
#									#
# XREF ****************************************************************	#
#	None								#
#									#
# INPUT ***************************************************************	#
#	d0 = index of FP register to load				#
# 									#
# OUTPUT **************************************************************	#
#	FP_DST(a6) = value loaded from FP register file			#
#									#
# ALGORITHM ***********************************************************	#
#	Using the index in d0, load FP_DST(a6) with a number from the 	#
# FP register file.							#
#									#
#########################################################################

	global		load_fpn2
load_fpn2:
	mov.w		(tbl_load_fpn2.b,%pc,%d0.w*2), %d0
	jmp		(tbl_load_fpn2.b,%pc,%d0.w*1)

tbl_load_fpn2:
	short		load_fpn2_0 - tbl_load_fpn2
	short		load_fpn2_1 - tbl_load_fpn2
	short		load_fpn2_2 - tbl_load_fpn2
	short		load_fpn2_3 - tbl_load_fpn2
	short		load_fpn2_4 - tbl_load_fpn2
	short		load_fpn2_5 - tbl_load_fpn2
	short		load_fpn2_6 - tbl_load_fpn2
	short		load_fpn2_7 - tbl_load_fpn2

load_fpn2_0:
	mov.l		0+EXC_FP0(%a6), 0+FP_DST(%a6)
	mov.l		4+EXC_FP0(%a6), 4+FP_DST(%a6)
	mov.l		8+EXC_FP0(%a6), 8+FP_DST(%a6)
	lea		FP_DST(%a6), %a0
	rts
load_fpn2_1:
	mov.l		0+EXC_FP1(%a6), 0+FP_DST(%a6)
	mov.l		4+EXC_FP1(%a6), 4+FP_DST(%a6)
	mov.l		8+EXC_FP1(%a6), 8+FP_DST(%a6)
	lea		FP_DST(%a6), %a0
	rts
load_fpn2_2:
	fmovm.x		&0x20, FP_DST(%a6)
	lea		FP_DST(%a6), %a0
	rts
load_fpn2_3:
	fmovm.x		&0x10, FP_DST(%a6)
	lea		FP_DST(%a6), %a0
	rts
load_fpn2_4:
	fmovm.x		&0x08, FP_DST(%a6)
	lea		FP_DST(%a6), %a0
	rts
load_fpn2_5:
	fmovm.x		&0x04, FP_DST(%a6)
	lea		FP_DST(%a6), %a0
	rts
load_fpn2_6:
	fmovm.x		&0x02, FP_DST(%a6)
	lea		FP_DST(%a6), %a0
	rts
load_fpn2_7:
	fmovm.x		&0x01, FP_DST(%a6)
	lea		FP_DST(%a6), %a0
	rts

#############################################################################

#########################################################################
# XDEF ****************************************************************	#
# 	store_fpreg(): store an fp value to the fpreg designated d0.	#
#									#
# XREF ****************************************************************	#
#	None								#
#									#
# INPUT ***************************************************************	#
#	fp0 = extended precision value to store				#
#	d0  = index of floating-point register				#
# 									#
# OUTPUT **************************************************************	#
#	None								#
#									#
# ALGORITHM ***********************************************************	#
#	Store the value in fp0 to the FP register designated by the	#
# value in d0. The FP number can be DENORM or SNAN so we have to be	#
# careful that we don't take an exception here.				#
#									#
#########################################################################

	global		store_fpreg
store_fpreg:
	mov.w		(tbl_store_fpreg.b,%pc,%d0.w*2), %d0
	jmp		(tbl_store_fpreg.b,%pc,%d0.w*1)

tbl_store_fpreg:
	short		store_fpreg_0 - tbl_store_fpreg
	short		store_fpreg_1 - tbl_store_fpreg
	short		store_fpreg_2 - tbl_store_fpreg
	short		store_fpreg_3 - tbl_store_fpreg
	short		store_fpreg_4 - tbl_store_fpreg
	short		store_fpreg_5 - tbl_store_fpreg
	short		store_fpreg_6 - tbl_store_fpreg
	short		store_fpreg_7 - tbl_store_fpreg

store_fpreg_0:
	fmovm.x		&0x80, EXC_FP0(%a6)
	rts
store_fpreg_1:
	fmovm.x		&0x80, EXC_FP1(%a6)
	rts
store_fpreg_2:
	fmovm.x 	&0x01, -(%sp)
	fmovm.x		(%sp)+, &0x20
	rts
store_fpreg_3:
	fmovm.x 	&0x01, -(%sp)
	fmovm.x		(%sp)+, &0x10
	rts
store_fpreg_4:
	fmovm.x 	&0x01, -(%sp)
	fmovm.x		(%sp)+, &0x08
	rts
store_fpreg_5:
	fmovm.x 	&0x01, -(%sp)
	fmovm.x		(%sp)+, &0x04
	rts
store_fpreg_6:
	fmovm.x 	&0x01, -(%sp)
	fmovm.x		(%sp)+, &0x02
	rts
store_fpreg_7:
	fmovm.x 	&0x01, -(%sp)
	fmovm.x		(%sp)+, &0x01
	rts

#########################################################################
# XDEF ****************************************************************	#
# 	_denorm(): denormalize an intermediate result			#
#									#
# XREF ****************************************************************	#
#	None								#
#									#
# INPUT *************************************************************** #
#	a0 = points to the operand to be denormalized			#
#		(in the internal extended format)			#
#		 							#
#	d0 = rounding precision						#
#									#
# OUTPUT **************************************************************	#
#	a0 = pointer to the denormalized result				#
#		(in the internal extended format)			#
#									#
#	d0 = guard,round,sticky						#
#									#
# ALGORITHM ***********************************************************	#
# 	According to the exponent underflow threshold for the given	#
# precision, shift the mantissa bits to the right in order raise the	#
# exponent of the operand to the threshold value. While shifting the 	#
# mantissa bits right, maintain the value of the guard, round, and 	#
# sticky bits.								#
# other notes:								#
#	(1) _denorm() is called by the underflow routines		#
#	(2) _denorm() does NOT affect the status register		#
#									#
#########################################################################

#
# table of exponent threshold values for each precision
#
tbl_thresh:
	short		0x0
	short		sgl_thresh
	short		dbl_thresh

	global		_denorm
_denorm:
#
# Load the exponent threshold for the precision selected and check
# to see if (threshold - exponent) is > 65 in which case we can 
# simply calculate the sticky bit and zero the mantissa. otherwise
# we have to call the denormalization routine.
#
	lsr.b		&0x2, %d0		# shift prec to lo bits
	mov.w		(tbl_thresh.b,%pc,%d0.w*2), %d1 # load prec threshold
	mov.w		%d1, %d0		# copy d1 into d0
	sub.w		FTEMP_EX(%a0), %d0	# diff = threshold - exp
	cmpi.w		%d0, &66		# is diff > 65? (mant + g,r bits)
	bpl.b		denorm_set_stky		# yes; just calc sticky

	clr.l		%d0			# clear g,r,s
	btst		&inex2_bit, FPSR_EXCEPT(%a6) # yes; was INEX2 set?
	beq.b		denorm_call		# no; don't change anything
	bset		&29, %d0		# yes; set sticky bit

denorm_call:
	bsr.l		dnrm_lp			# denormalize the number
	rts

#
# all bit would have been shifted off during the denorm so simply
# calculate if the sticky should be set and clear the entire mantissa.
#
denorm_set_stky:
	mov.l		&0x20000000, %d0	# set sticky bit in return value
	mov.w		%d1, FTEMP_EX(%a0)	# load exp with threshold
	clr.l		FTEMP_HI(%a0)		# set d1 = 0 (ms mantissa)
	clr.l		FTEMP_LO(%a0)		# set d2 = 0 (ms mantissa)
	rts

#									#
# dnrm_lp(): normalize exponent/mantissa to specified threshhold	#
#									#
# INPUT:								#
#	%a0	   : points to the operand to be denormalized		#
#	%d0{31:29} : initial guard,round,sticky				#
#	%d1{15:0}  : denormalization threshold				#
# OUTPUT:								#
#	%a0	   : points to the denormalized operand		 	#
#	%d0{31:29} : final guard,round,sticky				#
#									#

# *** Local Equates *** #
set	GRS,		L_SCR2			# g,r,s temp storage
set	FTEMP_LO2,	L_SCR1			# FTEMP_LO copy

	global		dnrm_lp
dnrm_lp:

#
# make a copy of FTEMP_LO and place the g,r,s bits directly after it
# in memory so as to make the bitfield extraction for denormalization easier.
#
	mov.l		FTEMP_LO(%a0), FTEMP_LO2(%a6) # make FTEMP_LO copy
	mov.l		%d0, GRS(%a6)		# place g,r,s after it

#
# check to see how much less than the underflow threshold the operand
# exponent is. 
#
	mov.l		%d1, %d0		# copy the denorm threshold
	sub.w		FTEMP_EX(%a0), %d1	# d1 = threshold - uns exponent
	ble.b		dnrm_no_lp		# d1 <= 0
	cmpi.w		%d1, &0x20		# is ( 0 <= d1 < 32) ?
	blt.b		case_1			# yes
	cmpi.w		%d1, &0x40		# is (32 <= d1 < 64) ?
	blt.b		case_2			# yes
	bra.w		case_3			# (d1 >= 64)

#
# No normalization necessary
#
dnrm_no_lp:
	mov.l		GRS(%a6), %d0 		# restore original g,r,s
	rts

#
# case (0<d1<32)
#
# %d0 = denorm threshold
# %d1 = "n" = amt to shift
#
#	---------------------------------------------------------
#	|     FTEMP_HI	  |    	FTEMP_LO     |grs000.........000|
#	---------------------------------------------------------
#	<-(32 - n)-><-(n)-><-(32 - n)-><-(n)-><-(32 - n)-><-(n)->
#	\	   \		      \			 \
#	 \	    \		       \		  \
#	  \	     \			\		   \
#	   \	      \			 \		    \
#	    \	       \		  \		     \
#	     \		\		   \		      \
#	      \		 \		    \		       \
#	       \	  \		     \			\
#	<-(n)-><-(32 - n)-><------(32)-------><------(32)------->	
#	---------------------------------------------------------
#	|0.....0| NEW_HI  |  NEW_FTEMP_LO     |grs		|
#	---------------------------------------------------------
#
case_1:
	mov.l		%d2, -(%sp)		# create temp storage

	mov.w		%d0, FTEMP_EX(%a0)	# exponent = denorm threshold
	mov.l		&32, %d0
	sub.w		%d1, %d0		# %d0 = 32 - %d1

	cmpi.w		%d1, &29		# is shft amt >= 29
	blt.b		case1_extract		# no; no fix needed
	mov.b		GRS(%a6), %d2
	or.b		%d2, 3+FTEMP_LO2(%a6)

case1_extract:
	bfextu		FTEMP_HI(%a0){&0:%d0}, %d2 # %d2 = new FTEMP_HI
	bfextu		FTEMP_HI(%a0){%d0:&32}, %d1 # %d1 = new FTEMP_LO
	bfextu		FTEMP_LO2(%a6){%d0:&32}, %d0 # %d0 = new G,R,S

	mov.l		%d2, FTEMP_HI(%a0)	# store new FTEMP_HI
	mov.l		%d1, FTEMP_LO(%a0)	# store new FTEMP_LO

	bftst		%d0{&2:&30}		# were bits shifted off?
	beq.b		case1_sticky_clear	# no; go finish
	bset		&rnd_stky_bit, %d0	# yes; set sticky bit

case1_sticky_clear:
	and.l		&0xe0000000, %d0	# clear all but G,R,S
	mov.l		(%sp)+, %d2		# restore temp register
	rts

#
# case (32<=d1<64)
#
# %d0 = denorm threshold
# %d1 = "n" = amt to shift
#
#	---------------------------------------------------------
#	|     FTEMP_HI	  |    	FTEMP_LO     |grs000.........000|
#	---------------------------------------------------------
#	<-(32 - n)-><-(n)-><-(32 - n)-><-(n)-><-(32 - n)-><-(n)->
#	\	   \		      \
#	 \	    \		       \
#	  \	     \			-------------------
#	   \	      --------------------		   \
#	    -------------------	  	  \		    \
#	     		       \	   \		     \
#	      		 	\     	    \		      \
#	       		  	 \	     \		       \
#	<-------(32)------><-(n)-><-(32 - n)-><------(32)------->
#	---------------------------------------------------------
#	|0...............0|0....0| NEW_LO     |grs		|
#	---------------------------------------------------------
#
case_2:
	mov.l		%d2, -(%sp)		# create temp storage

	mov.w		%d0, FTEMP_EX(%a0)	# exponent = denorm threshold
	subi.w		&0x20, %d1		# %d1 now between 0 and 32
	mov.l		&0x20, %d0
	sub.w		%d1, %d0		# %d0 = 32 - %d1

# subtle step here; or in the g,r,s at the bottom of FTEMP_LO to minimize
# the number of bits to check for the sticky detect.
# it only plays a role in shift amounts of 61-63.
	mov.b		GRS(%a6), %d2
	or.b		%d2, 3+FTEMP_LO2(%a6)

	bfextu		FTEMP_HI(%a0){&0:%d0}, %d2 # %d2 = new FTEMP_LO
	bfextu		FTEMP_HI(%a0){%d0:&32}, %d1 # %d1 = new G,R,S

	bftst		%d1{&2:&30}		# were any bits shifted off?
	bne.b		case2_set_sticky	# yes; set sticky bit
	bftst		FTEMP_LO2(%a6){%d0:&31}	# were any bits shifted off?
	bne.b		case2_set_sticky	# yes; set sticky bit

	mov.l		%d1, %d0		# move new G,R,S to %d0
	bra.b		case2_end

case2_set_sticky:
	mov.l		%d1, %d0		# move new G,R,S to %d0
	bset		&rnd_stky_bit, %d0	# set sticky bit

case2_end:
	clr.l		FTEMP_HI(%a0)		# store FTEMP_HI = 0
	mov.l		%d2, FTEMP_LO(%a0)	# store FTEMP_LO
	and.l		&0xe0000000, %d0	# clear all but G,R,S

	mov.l		(%sp)+,%d2		# restore temp register
	rts

#
# case (d1>=64)
#
# %d0 = denorm threshold
# %d1 = amt to shift
#
case_3:
	mov.w		%d0, FTEMP_EX(%a0)	# insert denorm threshold

	cmpi.w		%d1, &65		# is shift amt > 65?
	blt.b		case3_64		# no; it's == 64
	beq.b		case3_65		# no; it's == 65

#
# case (d1>65)
#
# Shift value is > 65 and out of range. All bits are shifted off.
# Return a zero mantissa with the sticky bit set
#
	clr.l		FTEMP_HI(%a0)		# clear hi(mantissa)
	clr.l		FTEMP_LO(%a0)		# clear lo(mantissa)
	mov.l		&0x20000000, %d0	# set sticky bit
	rts

#
# case (d1 == 64)
#
#	---------------------------------------------------------
#	|     FTEMP_HI	  |    	FTEMP_LO     |grs000.........000|
#	---------------------------------------------------------
#	<-------(32)------>
#	\	   	   \
#	 \	    	    \
#	  \	     	     \
#	   \	      	      ------------------------------
#	    -------------------------------		    \
#	     		       		   \		     \
#	      		 	     	    \		      \
#	       		  	 	     \		       \
#					      <-------(32)------>
#	---------------------------------------------------------
#	|0...............0|0................0|grs		|
#	---------------------------------------------------------
#
case3_64:
	mov.l		FTEMP_HI(%a0), %d0	# fetch hi(mantissa)
	mov.l		%d0, %d1		# make a copy
	and.l		&0xc0000000, %d0	# extract G,R
	and.l		&0x3fffffff, %d1	# extract other bits

	bra.b		case3_complete

#
# case (d1 == 65)
#
#	---------------------------------------------------------
#	|     FTEMP_HI	  |    	FTEMP_LO     |grs000.........000|
#	---------------------------------------------------------
#	<-------(32)------>
#	\	   	   \
#	 \	    	    \
#	  \	     	     \
#	   \	      	      ------------------------------
#	    --------------------------------		    \
#	     		       		    \		     \
#	      		 	     	     \		      \
#	       		  	 	      \		       \
#					       <-------(31)----->
#	---------------------------------------------------------
#	|0...............0|0................0|0rs		|
#	---------------------------------------------------------
#
case3_65:
	mov.l		FTEMP_HI(%a0), %d0	# fetch hi(mantissa)
	and.l		&0x80000000, %d0	# extract R bit
	lsr.l		&0x1, %d0		# shift high bit into R bit
	and.l		&0x7fffffff, %d1	# extract other bits

case3_complete:
# last operation done was an "and" of the bits shifted off so the condition
# codes are already set so branch accordingly.
	bne.b		case3_set_sticky	# yes; go set new sticky
	tst.l		FTEMP_LO(%a0)		# were any bits shifted off?
	bne.b		case3_set_sticky	# yes; go set new sticky
	tst.b		GRS(%a6)		# were any bits shifted off?
	bne.b		case3_set_sticky	# yes; go set new sticky

#
# no bits were shifted off so don't set the sticky bit.
# the guard and
# the entire mantissa is zero.
#
	clr.l		FTEMP_HI(%a0)		# clear hi(mantissa)
	clr.l		FTEMP_LO(%a0)		# clear lo(mantissa)
	rts

#
# some bits were shifted off so set the sticky bit.
# the entire mantissa is zero.
#
case3_set_sticky:
	bset		&rnd_stky_bit,%d0	# set new sticky bit
	clr.l		FTEMP_HI(%a0)		# clear hi(mantissa)
	clr.l		FTEMP_LO(%a0)		# clear lo(mantissa)
	rts

#########################################################################
# XDEF ****************************************************************	#
#	_round(): round result according to precision/mode		#
#									#
# XREF ****************************************************************	#
#	None								#
#									#
# INPUT ***************************************************************	#
#	a0	  = ptr to input operand in internal extended format 	#
#	d1(hi)    = contains rounding precision:			#
#			ext = $0000xxxx					#
#			sgl = $0004xxxx					#
#			dbl = $0008xxxx					#
#	d1(lo)	  = contains rounding mode:				#
#			RN  = $xxxx0000					#
#			RZ  = $xxxx0001					#
#			RM  = $xxxx0002					#
#			RP  = $xxxx0003					#
#	d0{31:29} = contains the g,r,s bits (extended)			#
#									#
# OUTPUT **************************************************************	#
#	a0 = pointer to rounded result					#
#									#
# ALGORITHM ***********************************************************	#
#	On return the value pointed to by a0 is correctly rounded,	#
#	a0 is preserved and the g-r-s bits in d0 are cleared.		#
#	The result is not typed - the tag field is invalid.  The	#
#	result is still in the internal extended format.		#
#									#
#	The INEX bit of USER_FPSR will be set if the rounded result was	#
#	inexact (i.e. if any of the g-r-s bits were set).		#
#									#
#########################################################################

	global		_round
_round:
#
# ext_grs() looks at the rounding precision and sets the appropriate
# G,R,S bits.
# If (G,R,S == 0) then result is exact and round is done, else set 
# the inex flag in status reg and continue.
#
	bsr.l		ext_grs			# extract G,R,S

	tst.l		%d0			# are G,R,S zero?
	beq.w		truncate		# yes; round is complete

	or.w		&inx2a_mask, 2+USER_FPSR(%a6) # set inex2/ainex

#
# Use rounding mode as an index into a jump table for these modes.
# All of the following assumes grs != 0.
#
	mov.w		(tbl_mode.b,%pc,%d1.w*2), %a1 # load jump offset
	jmp		(tbl_mode.b,%pc,%a1)	# jmp to rnd mode handler

tbl_mode:
	short		rnd_near - tbl_mode
	short		truncate - tbl_mode	# RZ always truncates
	short		rnd_mnus - tbl_mode
	short		rnd_plus - tbl_mode

#################################################################
#	ROUND PLUS INFINITY					#
#								#
#	If sign of fp number = 0 (positive), then add 1 to l.	#
#################################################################
rnd_plus:
	tst.b		FTEMP_SGN(%a0)		# check for sign
	bmi.w		truncate		# if positive then truncate

	mov.l		&0xffffffff, %d0	# force g,r,s to be all f's
	swap		%d1			# set up d1 for round prec.

	cmpi.b		%d1, &s_mode		# is prec = sgl?
	beq.w		add_sgl			# yes
	bgt.w		add_dbl			# no; it's dbl
	bra.w		add_ext			# no; it's ext

#################################################################
#	ROUND MINUS INFINITY					#
#								#
#	If sign of fp number = 1 (negative), then add 1 to l.	#
#################################################################
rnd_mnus:
	tst.b		FTEMP_SGN(%a0)		# check for sign	
	bpl.w		truncate		# if negative then truncate

	mov.l		&0xffffffff, %d0	# force g,r,s to be all f's
	swap		%d1			# set up d1 for round prec.

	cmpi.b		%d1, &s_mode		# is prec = sgl?
	beq.w		add_sgl			# yes
	bgt.w		add_dbl			# no; it's dbl
	bra.w		add_ext			# no; it's ext

#################################################################
#	ROUND NEAREST						#
#								#
#	If (g=1), then add 1 to l and if (r=s=0), then clear l	#
#	Note that this will round to even in case of a tie.	#
#################################################################
rnd_near:
	asl.l		&0x1, %d0		# shift g-bit to c-bit
	bcc.w		truncate		# if (g=1) then

	swap		%d1			# set up d1 for round prec.

	cmpi.b		%d1, &s_mode		# is prec = sgl?
	beq.w		add_sgl			# yes
	bgt.w		add_dbl			# no; it's dbl
	bra.w		add_ext			# no; it's ext

# *** LOCAL EQUATES ***
set	ad_1_sgl,	0x00000100	# constant to add 1 to l-bit in sgl prec
set	ad_1_dbl,	0x00000800	# constant to add 1 to l-bit in dbl prec

#########################
#	ADD SINGLE	#
#########################
add_sgl:
	add.l		&ad_1_sgl, FTEMP_HI(%a0)
	bcc.b		scc_clr			# no mantissa overflow
	roxr.w		FTEMP_HI(%a0)		# shift v-bit back in
	roxr.w		FTEMP_HI+2(%a0)		# shift v-bit back in
	add.w		&0x1, FTEMP_EX(%a0)	# and incr exponent
scc_clr:
	tst.l		%d0			# test for rs = 0
	bne.b		sgl_done
	and.w		&0xfe00, FTEMP_HI+2(%a0) # clear the l-bit
sgl_done:
	and.l		&0xffffff00, FTEMP_HI(%a0) # truncate bits beyond sgl limit
	clr.l		FTEMP_LO(%a0)		# clear d2
	rts

#########################
#	ADD EXTENDED	#
#########################
add_ext:
	addq.l		&1,FTEMP_LO(%a0)	# add 1 to l-bit
	bcc.b		xcc_clr			# test for carry out
	addq.l		&1,FTEMP_HI(%a0)	# propogate carry
	bcc.b		xcc_clr
	roxr.w		FTEMP_HI(%a0)		# mant is 0 so restore v-bit
	roxr.w		FTEMP_HI+2(%a0)		# mant is 0 so restore v-bit
	roxr.w		FTEMP_LO(%a0)
	roxr.w		FTEMP_LO+2(%a0)
	add.w		&0x1,FTEMP_EX(%a0)	# and inc exp
xcc_clr:
	tst.l		%d0			# test rs = 0
	bne.b		add_ext_done
	and.b		&0xfe,FTEMP_LO+3(%a0)	# clear the l bit
add_ext_done:
	rts

#########################
#	ADD DOUBLE	#
#########################
add_dbl:
	add.l		&ad_1_dbl, FTEMP_LO(%a0) # add 1 to lsb
	bcc.b		dcc_clr			# no carry
	addq.l		&0x1, FTEMP_HI(%a0)	# propogate carry
	bcc.b		dcc_clr			# no carry

	roxr.w		FTEMP_HI(%a0)		# mant is 0 so restore v-bit
	roxr.w		FTEMP_HI+2(%a0)		# mant is 0 so restore v-bit
	roxr.w		FTEMP_LO(%a0)
	roxr.w		FTEMP_LO+2(%a0)
	addq.w		&0x1, FTEMP_EX(%a0)	# incr exponent
dcc_clr:
	tst.l		%d0			# test for rs = 0
	bne.b		dbl_done
	and.w		&0xf000, FTEMP_LO+2(%a0) # clear the l-bit

dbl_done:
	and.l		&0xfffff800,FTEMP_LO(%a0) # truncate bits beyond dbl limit
	rts

###########################
# Truncate all other bits #
###########################
truncate:
	swap		%d1			# select rnd prec

	cmpi.b		%d1, &s_mode		# is prec sgl?
	beq.w		sgl_done		# yes
	bgt.b		dbl_done		# no; it's dbl
	rts					# no; it's ext


#
# ext_grs(): extract guard, round and sticky bits according to
#	     rounding precision.
#
# INPUT
#	d0	   = extended precision g,r,s (in d0{31:29})
#	d1 	   = {PREC,ROUND}
# OUTPUT
#	d0{31:29}  = guard, round, sticky
#
# The ext_grs extract the guard/round/sticky bits according to the
# selected rounding precision. It is called by the round subroutine
# only.  All registers except d0 are kept intact. d0 becomes an
# updated guard,round,sticky in d0{31:29}
#
# Notes: the ext_grs uses the round PREC, and therefore has to swap d1
#	 prior to usage, and needs to restore d1 to original. this
#	 routine is tightly tied to the round routine and not meant to
#	 uphold standard subroutine calling practices.
#

ext_grs:
	swap		%d1			# have d1.w point to round precision
	tst.b		%d1			# is rnd prec = extended?
	bne.b		ext_grs_not_ext		# no; go handle sgl or dbl

#
# %d0 actually already hold g,r,s since _round() had it before calling
# this function. so, as long as we don't disturb it, we are "returning" it.
#
ext_grs_ext:
	swap		%d1			# yes; return to correct positions
	rts

ext_grs_not_ext:
	movm.l		&0x3000, -(%sp)		# make some temp registers {d2/d3}

	cmpi.b		%d1, &s_mode		# is rnd prec = sgl?
	bne.b		ext_grs_dbl		# no; go handle dbl

#
# sgl:
#	96		64	  40	32		0
#	-----------------------------------------------------
#	| EXP	|XXXXXXX|	  |xx	|		|grs|
#	-----------------------------------------------------
#			<--(24)--->nn\			   /
#				   ee ---------------------
#				   ww		|
#						v
#				   gr	   new sticky
#
ext_grs_sgl:
	bfextu		FTEMP_HI(%a0){&24:&2}, %d3 # sgl prec. g-r are 2 bits right
	mov.l		&30, %d2		# of the sgl prec. limits
	lsl.l		%d2, %d3		# shift g-r bits to MSB of d3
	mov.l		FTEMP_HI(%a0), %d2	# get word 2 for s-bit test
	and.l		&0x0000003f, %d2	# s bit is the or of all other 
	bne.b		ext_grs_st_stky		# bits to the right of g-r
	tst.l		FTEMP_LO(%a0)		# test lower mantissa
	bne.b		ext_grs_st_stky		# if any are set, set sticky
	tst.l		%d0			# test original g,r,s
	bne.b		ext_grs_st_stky		# if any are set, set sticky
	bra.b		ext_grs_end_sd		# if words 3 and 4 are clr, exit

#
# dbl:
#	96		64	  	32	 11	0
#	-----------------------------------------------------
#	| EXP	|XXXXXXX|	  	|	 |xx	|grs|
#	-----------------------------------------------------
#						  nn\	    /
#						  ee -------
#						  ww	|
#							v
#						  gr	new sticky
#
ext_grs_dbl:
	bfextu		FTEMP_LO(%a0){&21:&2}, %d3 # dbl-prec. g-r are 2 bits right
	mov.l		&30, %d2		# of the dbl prec. limits
	lsl.l		%d2, %d3		# shift g-r bits to the MSB of d3
	mov.l		FTEMP_LO(%a0), %d2	# get lower mantissa  for s-bit test
	and.l		&0x000001ff, %d2	# s bit is the or-ing of all 
	bne.b		ext_grs_st_stky		# other bits to the right of g-r
	tst.l		%d0			# test word original g,r,s
	bne.b		ext_grs_st_stky		# if any are set, set sticky
	bra.b		ext_grs_end_sd		# if clear, exit

ext_grs_st_stky:
	bset		&rnd_stky_bit, %d3	# set sticky bit
ext_grs_end_sd:
	mov.l		%d3, %d0		# return grs to d0

	movm.l		(%sp)+, &0xc		# restore scratch registers {d2/d3}

	swap		%d1			# restore d1 to original
	rts

#########################################################################
# norm(): normalize the mantissa of an extended precision input. the	#
#	  input operand should not be normalized already.		#
#									#
# XDEF ****************************************************************	#
#	norm()								#
#									#
# XREF **************************************************************** #
#	none								#
#									#
# INPUT *************************************************************** #
#	a0 = pointer fp extended precision operand to normalize		#
#									#
# OUTPUT ************************************************************** #
# 	d0 = number of bit positions the mantissa was shifted		#
#	a0 = the input operand's mantissa is normalized; the exponent	#
#	     is unchanged.						#
#									#
#########################################################################
	global		norm
norm:
	mov.l		%d2, -(%sp)		# create some temp regs
	mov.l		%d3, -(%sp)

	mov.l		FTEMP_HI(%a0), %d0	# load hi(mantissa)
	mov.l		FTEMP_LO(%a0), %d1	# load lo(mantissa)

	bfffo		%d0{&0:&32}, %d2	# how many places to shift?
	beq.b		norm_lo			# hi(man) is all zeroes!

norm_hi:
	lsl.l		%d2, %d0		# left shift hi(man)
	bfextu		%d1{&0:%d2}, %d3	# extract lo bits

	or.l		%d3, %d0		# create hi(man)
	lsl.l		%d2, %d1		# create lo(man)

	mov.l		%d0, FTEMP_HI(%a0)	# store new hi(man)
	mov.l		%d1, FTEMP_LO(%a0)	# store new lo(man)

	mov.l		%d2, %d0		# return shift amount
	
	mov.l		(%sp)+, %d3		# restore temp regs
	mov.l		(%sp)+, %d2

	rts

norm_lo:
	bfffo		%d1{&0:&32}, %d2	# how many places to shift?
	lsl.l		%d2, %d1		# shift lo(man)
	add.l		&32, %d2		# add 32 to shft amount

	mov.l		%d1, FTEMP_HI(%a0)	# store hi(man)
	clr.l		FTEMP_LO(%a0)		# lo(man) is now zero

	mov.l		%d2, %d0		# return shift amount
	
	mov.l		(%sp)+, %d3		# restore temp regs
	mov.l		(%sp)+, %d2

	rts

#########################################################################
# unnorm_fix(): - changes an UNNORM to one of NORM, DENORM, or ZERO	#
#		- returns corresponding optype tag			#
#									#
# XDEF ****************************************************************	#
#	unnorm_fix()							#
#									#
# XREF **************************************************************** #
#	norm() - normalize the mantissa					#
#									#
# INPUT *************************************************************** #
#	a0 = pointer to unnormalized extended precision number		#
#									#
# OUTPUT ************************************************************** #
#	d0 = optype tag - is corrected to one of NORM, DENORM, or ZERO	#
#	a0 = input operand has been converted to a norm, denorm, or	#
#	     zero; both the exponent and mantissa are changed.		#
#									#
#########################################################################

	global		unnorm_fix
unnorm_fix:
	bfffo		FTEMP_HI(%a0){&0:&32}, %d0 # how many shifts are needed?
	bne.b		unnorm_shift		# hi(man) is not all zeroes

#
# hi(man) is all zeroes so see if any bits in lo(man) are set
#
unnorm_chk_lo:
	bfffo		FTEMP_LO(%a0){&0:&32}, %d0 # is operand really a zero?
	beq.w		unnorm_zero		# yes

	add.w		&32, %d0		# no; fix shift distance

#
# d0 = # shifts needed for complete normalization
#
unnorm_shift:
	clr.l		%d1			# clear top word
	mov.w		FTEMP_EX(%a0), %d1	# extract exponent
	and.w		&0x7fff, %d1		# strip off sgn

	cmp.w		%d0, %d1		# will denorm push exp < 0?
	bgt.b		unnorm_nrm_zero		# yes; denorm only until exp = 0

#
# exponent would not go < 0. therefore, number stays normalized
#
	sub.w		%d0, %d1		# shift exponent value
	mov.w		FTEMP_EX(%a0), %d0	# load old exponent
	and.w		&0x8000, %d0		# save old sign
	or.w		%d0, %d1		# {sgn,new exp}
	mov.w		%d1, FTEMP_EX(%a0)	# insert new exponent

	bsr.l		norm			# normalize UNNORM

	mov.b		&NORM, %d0		# return new optype tag
	rts

#
# exponent would go < 0, so only denormalize until exp = 0
#
unnorm_nrm_zero:
	cmp.b		%d1, &32		# is exp <= 32?
	bgt.b		unnorm_nrm_zero_lrg	# no; go handle large exponent

	bfextu		FTEMP_HI(%a0){%d1:&32}, %d0 # extract new hi(man)
	mov.l		%d0, FTEMP_HI(%a0)	# save new hi(man)

	mov.l		FTEMP_LO(%a0), %d0	# fetch old lo(man)
	lsl.l		%d1, %d0		# extract new lo(man)
	mov.l		%d0, FTEMP_LO(%a0)	# save new lo(man)

	and.w		&0x8000, FTEMP_EX(%a0)	# set exp = 0

	mov.b		&DENORM, %d0		# return new optype tag
	rts

#
# only mantissa bits set are in lo(man)
#
unnorm_nrm_zero_lrg:
	sub.w		&32, %d1		# adjust shft amt by 32

	mov.l		FTEMP_LO(%a0), %d0	# fetch old lo(man)
	lsl.l		%d1, %d0		# left shift lo(man)

	mov.l		%d0, FTEMP_HI(%a0)	# store new hi(man)
	clr.l		FTEMP_LO(%a0)		# lo(man) = 0

	and.w		&0x8000, FTEMP_EX(%a0)	# set exp = 0

	mov.b		&DENORM, %d0		# return new optype tag
	rts

#
# whole mantissa is zero so this UNNORM is actually a zero
#
unnorm_zero:
	and.w		&0x8000, FTEMP_EX(%a0) 	# force exponent to zero

	mov.b		&ZERO, %d0		# fix optype tag
	rts

#########################################################################
# XDEF ****************************************************************	#
# 	set_tag_x(): return the optype of the input ext fp number	#
#									#
# XREF ****************************************************************	#
#	None								#
#									#
# INPUT ***************************************************************	#
#	a0 = pointer to extended precision operand			#
# 									#
# OUTPUT **************************************************************	#
#	d0 = value of type tag						#
# 		one of: NORM, INF, QNAN, SNAN, DENORM, UNNORM, ZERO	#
#									#
# ALGORITHM ***********************************************************	#
#	Simply test the exponent, j-bit, and mantissa values to 	#
# determine the type of operand.					#
#	If it's an unnormalized zero, alter the operand and force it	#
# to be a normal zero.							#
#									#
#########################################################################

	global		set_tag_x
set_tag_x:
	mov.w		FTEMP_EX(%a0), %d0	# extract exponent
	andi.w		&0x7fff, %d0		# strip off sign
	cmpi.w		%d0, &0x7fff		# is (EXP == MAX)?
	beq.b		inf_or_nan_x
not_inf_or_nan_x:
	btst		&0x7,FTEMP_HI(%a0)
	beq.b		not_norm_x
is_norm_x:
	mov.b		&NORM, %d0
	rts
not_norm_x:
	tst.w		%d0			# is exponent = 0?
	bne.b		is_unnorm_x
not_unnorm_x:
	tst.l		FTEMP_HI(%a0)
	bne.b		is_denorm_x
	tst.l		FTEMP_LO(%a0)
	bne.b		is_denorm_x
is_zero_x:
	mov.b		&ZERO, %d0
	rts
is_denorm_x:
	mov.b		&DENORM, %d0
	rts
# must distinguish now "Unnormalized zeroes" which we
# must convert to zero.
is_unnorm_x:
	tst.l		FTEMP_HI(%a0)
	bne.b		is_unnorm_reg_x
	tst.l		FTEMP_LO(%a0)
	bne.b		is_unnorm_reg_x
# it's an "unnormalized zero". let's convert it to an actual zero...
	andi.w		&0x8000,FTEMP_EX(%a0)	# clear exponent
	mov.b		&ZERO, %d0
	rts
is_unnorm_reg_x:
	mov.b		&UNNORM, %d0
	rts
inf_or_nan_x:
	tst.l		FTEMP_LO(%a0)
	bne.b		is_nan_x
	mov.l		FTEMP_HI(%a0), %d0
	and.l		&0x7fffffff, %d0	# msb is a don't care!
	bne.b		is_nan_x
is_inf_x:
	mov.b		&INF, %d0
	rts
is_nan_x:
	btst		&0x6, FTEMP_HI(%a0)
	beq.b		is_snan_x
	mov.b		&QNAN, %d0
	rts
is_snan_x:
	mov.b		&SNAN, %d0
	rts

#########################################################################
# XDEF ****************************************************************	#
# 	set_tag_d(): return the optype of the input dbl fp number	#
#									#
# XREF ****************************************************************	#
#	None								#
#									#
# INPUT ***************************************************************	#
#	a0 = points to double precision operand				#
# 									#
# OUTPUT **************************************************************	#
#	d0 = value of type tag						#
# 		one of: NORM, INF, QNAN, SNAN, DENORM, ZERO		#
#									#
# ALGORITHM ***********************************************************	#
#	Simply test the exponent, j-bit, and mantissa values to 	#
# determine the type of operand.					#
#									#
#########################################################################

	global		set_tag_d
set_tag_d:
	mov.l		FTEMP(%a0), %d0
	mov.l		%d0, %d1

	andi.l		&0x7ff00000, %d0
	beq.b		zero_or_denorm_d

	cmpi.l		%d0, &0x7ff00000
	beq.b		inf_or_nan_d

is_norm_d:
	mov.b		&NORM, %d0
	rts
zero_or_denorm_d:
	and.l		&0x000fffff, %d1
	bne		is_denorm_d
	tst.l		4+FTEMP(%a0)
	bne		is_denorm_d
is_zero_d:
	mov.b		&ZERO, %d0
	rts
is_denorm_d:
	mov.b		&DENORM, %d0
	rts
inf_or_nan_d:
	and.l		&0x000fffff, %d1
	bne		is_nan_d
	tst.l		4+FTEMP(%a0)
	bne		is_nan_d
is_inf_d:
	mov.b		&INF, %d0
	rts
is_nan_d:
	btst		&19, %d1
	bne		is_qnan_d
is_snan_d:
	mov.b		&SNAN, %d0
	rts
is_qnan_d:
	mov.b		&QNAN, %d0
	rts

#########################################################################
# XDEF ****************************************************************	#
# 	set_tag_s(): return the optype of the input sgl fp number	#
#									#
# XREF ****************************************************************	#
#	None								#
#									#
# INPUT ***************************************************************	#
#	a0 = pointer to single precision operand			#
# 									#
# OUTPUT **************************************************************	#
#	d0 = value of type tag						#
# 		one of: NORM, INF, QNAN, SNAN, DENORM, ZERO		#
#									#
# ALGORITHM ***********************************************************	#
#	Simply test the exponent, j-bit, and mantissa values to 	#
# determine the type of operand.					#
#									#
#########################################################################

	global		set_tag_s
set_tag_s:
	mov.l		FTEMP(%a0), %d0
	mov.l		%d0, %d1

	andi.l		&0x7f800000, %d0
	beq.b		zero_or_denorm_s

	cmpi.l		%d0, &0x7f800000
	beq.b		inf_or_nan_s

is_norm_s:
	mov.b		&NORM, %d0
	rts
zero_or_denorm_s:
	and.l		&0x007fffff, %d1
	bne		is_denorm_s
is_zero_s:
	mov.b		&ZERO, %d0
	rts
is_denorm_s:
	mov.b		&DENORM, %d0
	rts
inf_or_nan_s:
	and.l		&0x007fffff, %d1
	bne		is_nan_s
is_inf_s:
	mov.b		&INF, %d0
	rts
is_nan_s:
	btst		&22, %d1
	bne		is_qnan_s
is_snan_s:
	mov.b		&SNAN, %d0
	rts
is_qnan_s:
	mov.b		&QNAN, %d0
	rts

#########################################################################
# XDEF ****************************************************************	#
# 	unf_res(): routine to produce default underflow result of a 	#
#	 	   scaled extended precision number; this is used by 	#
#		   fadd/fdiv/fmul/etc. emulation routines.		#
# 	unf_res4(): same as above but for fsglmul/fsgldiv which use	#
#		    single round prec and extended prec mode.		#
#									#
# XREF ****************************************************************	#
#	_denorm() - denormalize according to scale factor		#
# 	_round() - round denormalized number according to rnd prec	#
#									#
# INPUT ***************************************************************	#
#	a0 = pointer to extended precison operand			#
#	d0 = scale factor						#
#	d1 = rounding precision/mode					#
#									#
# OUTPUT **************************************************************	#
#	a0 = pointer to default underflow result in extended precision	#
#	d0.b = result FPSR_cc which caller may or may not want to save	#
#									#
# ALGORITHM ***********************************************************	#
# 	Convert the input operand to "internal format" which means the	#
# exponent is extended to 16 bits and the sign is stored in the unused	#
# portion of the extended precison operand. Denormalize the number	#
# according to the scale factor passed in d0. Then, round the 		#
# denormalized result.							#
# 	Set the FPSR_exc bits as appropriate but return the cc bits in	#
# d0 in case the caller doesn't want to save them (as is the case for	#
# fmove out).								#
# 	unf_res4() for fsglmul/fsgldiv forces the denorm to extended	#
# precision and the rounding mode to single.				#
#									#
#########################################################################
	global		unf_res
unf_res:
	mov.l		%d1, -(%sp)		# save rnd prec,mode on stack

	btst		&0x7, FTEMP_EX(%a0)	# make "internal" format
	sne		FTEMP_SGN(%a0)

	mov.w		FTEMP_EX(%a0), %d1	# extract exponent
	and.w		&0x7fff, %d1
	sub.w		%d0, %d1
	mov.w		%d1, FTEMP_EX(%a0)	# insert 16 bit exponent

	mov.l		%a0, -(%sp)		# save operand ptr during calls

	mov.l		0x4(%sp),%d0		# pass rnd prec.
	andi.w		&0x00c0,%d0
	lsr.w		&0x4,%d0
	bsr.l		_denorm			# denorm result

	mov.l		(%sp),%a0
	mov.w		0x6(%sp),%d1		# load prec:mode into %d1
	andi.w		&0xc0,%d1		# extract rnd prec
	lsr.w		&0x4,%d1
	swap		%d1
	mov.w		0x6(%sp),%d1
	andi.w		&0x30,%d1
	lsr.w		&0x4,%d1
	bsr.l		_round			# round the denorm

	mov.l		(%sp)+, %a0

# result is now rounded properly. convert back to normal format
	bclr		&0x7, FTEMP_EX(%a0)	# clear sgn first; may have residue
	tst.b		FTEMP_SGN(%a0)		# is "internal result" sign set?
	beq.b		unf_res_chkifzero	# no; result is positive
	bset		&0x7, FTEMP_EX(%a0)	# set result sgn
	clr.b		FTEMP_SGN(%a0)		# clear temp sign

# the number may have become zero after rounding. set ccodes accordingly.
unf_res_chkifzero:
	clr.l		%d0
	tst.l		FTEMP_HI(%a0)		# is value now a zero?
	bne.b		unf_res_cont		# no
	tst.l		FTEMP_LO(%a0)
	bne.b		unf_res_cont		# no
#	bset		&z_bit, FPSR_CC(%a6)	# yes; set zero ccode bit
	bset		&z_bit, %d0		# yes; set zero ccode bit

unf_res_cont:

#
# can inex1 also be set along with unfl and inex2???
#
# we know that underflow has occurred. aunfl should be set if INEX2 is also set.
#
	btst		&inex2_bit, FPSR_EXCEPT(%a6) # is INEX2 set?
	beq.b		unf_res_end		# no
	bset		&aunfl_bit, FPSR_AEXCEPT(%a6) # yes; set aunfl

unf_res_end:
	add.l		&0x4, %sp		# clear stack
	rts

# unf_res() for fsglmul() and fsgldiv().
	global		unf_res4
unf_res4:
	mov.l		%d1,-(%sp)		# save rnd prec,mode on stack

	btst		&0x7,FTEMP_EX(%a0)	# make "internal" format
	sne		FTEMP_SGN(%a0)

	mov.w		FTEMP_EX(%a0),%d1	# extract exponent
	and.w		&0x7fff,%d1
	sub.w		%d0,%d1
	mov.w		%d1,FTEMP_EX(%a0)	# insert 16 bit exponent

	mov.l		%a0,-(%sp)		# save operand ptr during calls

	clr.l		%d0			# force rnd prec = ext
	bsr.l		_denorm			# denorm result

	mov.l		(%sp),%a0
	mov.w		&s_mode,%d1		# force rnd prec = sgl
	swap		%d1
	mov.w		0x6(%sp),%d1		# load rnd mode
	andi.w		&0x30,%d1		# extract rnd prec
	lsr.w		&0x4,%d1
	bsr.l		_round			# round the denorm

	mov.l		(%sp)+,%a0

# result is now rounded properly. convert back to normal format
	bclr		&0x7,FTEMP_EX(%a0)	# clear sgn first; may have residue
	tst.b		FTEMP_SGN(%a0)		# is "internal result" sign set?
	beq.b		unf_res4_chkifzero	# no; result is positive
	bset		&0x7,FTEMP_EX(%a0)	# set result sgn
	clr.b		FTEMP_SGN(%a0)		# clear temp sign

# the number may have become zero after rounding. set ccodes accordingly.
unf_res4_chkifzero:
	clr.l		%d0
	tst.l		FTEMP_HI(%a0)		# is value now a zero?
	bne.b		unf_res4_cont		# no
	tst.l		FTEMP_LO(%a0)
	bne.b		unf_res4_cont		# no
#	bset		&z_bit,FPSR_CC(%a6)	# yes; set zero ccode bit
	bset		&z_bit,%d0		# yes; set zero ccode bit

unf_res4_cont:

#
# can inex1 also be set along with unfl and inex2???
#
# we know that underflow has occurred. aunfl should be set if INEX2 is also set.
#
	btst		&inex2_bit,FPSR_EXCEPT(%a6) # is INEX2 set?
	beq.b		unf_res4_end		# no
	bset		&aunfl_bit,FPSR_AEXCEPT(%a6) # yes; set aunfl

unf_res4_end:
	add.l		&0x4,%sp		# clear stack
	rts

#########################################################################
# XDEF ****************************************************************	#
#	ovf_res(): routine to produce the default overflow result of	#
#		   an overflowing number.				#
#	ovf_res2(): same as above but the rnd mode/prec are passed	#
#		    differently.					#
#									#
# XREF ****************************************************************	#
#	none								#
#									#
# INPUT ***************************************************************	#
#	d1.b 	= '-1' => (-); '0' => (+)				#
#   ovf_res():								#
#	d0 	= rnd mode/prec						#
#   ovf_res2():								#
#	hi(d0) 	= rnd prec						#
#	lo(d0)	= rnd mode						#
#									#
# OUTPUT **************************************************************	#
#	a0   	= points to extended precision result			#
#	d0.b 	= condition code bits					#
#									#
# ALGORITHM ***********************************************************	#
#	The default overflow result can be determined by the sign of	#
# the result and the rounding mode/prec in effect. These bits are	#
# concatenated together to create an index into the default result 	#
# table. A pointer to the correct result is returned in a0. The		#
# resulting condition codes are returned in d0 in case the caller 	#
# doesn't want FPSR_cc altered (as is the case for fmove out).		#
#									#
#########################################################################

	global		ovf_res
ovf_res:
	andi.w		&0x10,%d1		# keep result sign
	lsr.b		&0x4,%d0		# shift prec/mode
	or.b		%d0,%d1			# concat the two
	mov.w		%d1,%d0			# make a copy
	lsl.b		&0x1,%d1		# multiply d1 by 2
	bra.b		ovf_res_load

	global		ovf_res2
ovf_res2:
	and.w		&0x10, %d1		# keep result sign
	or.b		%d0, %d1		# insert rnd mode
	swap		%d0
	or.b		%d0, %d1		# insert rnd prec
	mov.w		%d1, %d0		# make a copy
	lsl.b		&0x1, %d1		# shift left by 1

#
# use the rounding mode, precision, and result sign as in index into the
# two tables below to fetch the default result and the result ccodes.
#
ovf_res_load:
	mov.b		(tbl_ovfl_cc.b,%pc,%d0.w*1), %d0 # fetch result ccodes
	lea		(tbl_ovfl_result.b,%pc,%d1.w*8), %a0 # return result ptr
	
	rts

tbl_ovfl_cc:
	byte		0x2, 0x0, 0x0, 0x2
	byte		0x2, 0x0, 0x0, 0x2
	byte		0x2, 0x0, 0x0, 0x2
	byte		0x0, 0x0, 0x0, 0x0
	byte		0x2+0x8, 0x8, 0x2+0x8, 0x8
	byte		0x2+0x8, 0x8, 0x2+0x8, 0x8
	byte		0x2+0x8, 0x8, 0x2+0x8, 0x8

tbl_ovfl_result:
	long		0x7fff0000,0x00000000,0x00000000,0x00000000 # +INF; RN
	long		0x7ffe0000,0xffffffff,0xffffffff,0x00000000 # +EXT; RZ
	long		0x7ffe0000,0xffffffff,0xffffffff,0x00000000 # +EXT; RM
	long		0x7fff0000,0x00000000,0x00000000,0x00000000 # +INF; RP

	long		0x7fff0000,0x00000000,0x00000000,0x00000000 # +INF; RN
	long		0x407e0000,0xffffff00,0x00000000,0x00000000 # +SGL; RZ
	long		0x407e0000,0xffffff00,0x00000000,0x00000000 # +SGL; RM
	long		0x7fff0000,0x00000000,0x00000000,0x00000000 # +INF; RP

	long		0x7fff0000,0x00000000,0x00000000,0x00000000 # +INF; RN
	long		0x43fe0000,0xffffffff,0xfffff800,0x00000000 # +DBL; RZ
	long		0x43fe0000,0xffffffff,0xfffff800,0x00000000 # +DBL; RM
	long		0x7fff0000,0x00000000,0x00000000,0x00000000 # +INF; RP

	long		0x00000000,0x00000000,0x00000000,0x00000000
	long		0x00000000,0x00000000,0x00000000,0x00000000
	long		0x00000000,0x00000000,0x00000000,0x00000000
	long		0x00000000,0x00000000,0x00000000,0x00000000

	long		0xffff0000,0x00000000,0x00000000,0x00000000 # -INF; RN
	long		0xfffe0000,0xffffffff,0xffffffff,0x00000000 # -EXT; RZ
	long		0xffff0000,0x00000000,0x00000000,0x00000000 # -INF; RM
	long		0xfffe0000,0xffffffff,0xffffffff,0x00000000 # -EXT; RP

	long		0xffff0000,0x00000000,0x00000000,0x00000000 # -INF; RN
	long		0xc07e0000,0xffffff00,0x00000000,0x00000000 # -SGL; RZ
	long		0xffff0000,0x00000000,0x00000000,0x00000000 # -INF; RM
	long		0xc07e0000,0xffffff00,0x00000000,0x00000000 # -SGL; RP

	long		0xffff0000,0x00000000,0x00000000,0x00000000 # -INF; RN
	long		0xc3fe0000,0xffffffff,0xfffff800,0x00000000 # -DBL; RZ
	long		0xffff0000,0x00000000,0x00000000,0x00000000 # -INF; RM
	long		0xc3fe0000,0xffffffff,0xfffff800,0x00000000 # -DBL; RP

#########################################################################
# XDEF ****************************************************************	#
#	get_packed(): fetch a packed operand from memory and then	#
#		      convert it to a floating-point binary number.	#
#									#
# XREF ****************************************************************	#
#	_dcalc_ea() - calculate the correct <ea>			#
#	_mem_read() - fetch the packed operand from memory		#
#	facc_in_x() - the fetch failed so jump to special exit code	#
#	decbin()    - convert packed to binary extended precision	#
#									#
# INPUT ***************************************************************	#
#	None								#
# 									#
# OUTPUT **************************************************************	#
#	If no failure on _mem_read():					#
# 	FP_SRC(a6) = packed operand now as a binary FP number		#
#									#
# ALGORITHM ***********************************************************	#
#	Get the correct <ea> whihc is the value on the exception stack 	#
# frame w/ maybe a correction factor if the <ea> is -(an) or (an)+.	#
# Then, fetch the operand from memory. If the fetch fails, exit		#
# through facc_in_x().							#
#	If the packed operand is a ZERO,NAN, or INF, convert it to	#
# its binary representation here. Else, call decbin() which will 	#
# convert the packed value to an extended precision binary value.	#
#									#
#########################################################################

# the stacked <ea> for packed is correct except for -(An).
# the base reg must be updated for both -(An) and (An)+.
	global		get_packed
get_packed:
	mov.l		&0xc,%d0		# packed is 12 bytes
	bsr.l		_dcalc_ea		# fetch <ea>; correct An

	lea		FP_SRC(%a6),%a1		# pass: ptr to super dst
	mov.l		&0xc,%d0		# pass: 12 bytes
	bsr.l		_dmem_read		# read packed operand

	tst.l		%d1			# did dfetch fail?
	bne.l		facc_in_x		# yes

# The packed operand is an INF or a NAN if the exponent field is all ones.
	bfextu		FP_SRC(%a6){&1:&15},%d0	# get exp
	cmpi.w		%d0,&0x7fff		# INF or NAN?
	bne.b		gp_try_zero		# no
	rts					# operand is an INF or NAN

# The packed operand is a zero if the mantissa is all zero, else it's
# a normal packed op.
gp_try_zero:
	mov.b		3+FP_SRC(%a6),%d0	# get byte 4
	andi.b		&0x0f,%d0		# clear all but last nybble
	bne.b		gp_not_spec		# not a zero
	tst.l		FP_SRC_HI(%a6)		# is lw 2 zero?
	bne.b		gp_not_spec		# not a zero
	tst.l		FP_SRC_LO(%a6)		# is lw 3 zero?
	bne.b		gp_not_spec		# not a zero
	rts					# operand is a ZERO
gp_not_spec:
	lea		FP_SRC(%a6),%a0		# pass: ptr to packed op
	bsr.l		decbin			# convert to extended
	fmovm.x		&0x80,FP_SRC(%a6)	# make this the srcop
	rts

#########################################################################
# decbin(): Converts normalized packed bcd value pointed to by register	#
#	    a0 to extended-precision value in fp0.			#
#									#
# INPUT ***************************************************************	#
#	a0 = pointer to normalized packed bcd value			#
#									#
# OUTPUT **************************************************************	#
#	fp0 = exact fp representation of the packed bcd value.		#
#									#
# ALGORITHM ***********************************************************	#
#	Expected is a normal bcd (i.e. non-exceptional; all inf, zero,	#
#	and NaN operands are dispatched without entering this routine)	#
#	value in 68881/882 format at location (a0).			#
#									#
#	A1. Convert the bcd exponent to binary by successive adds and 	#
#	muls. Set the sign according to SE. Subtract 16 to compensate	#
#	for the mantissa which is to be interpreted as 17 integer	#
#	digits, rather than 1 integer and 16 fraction digits.		#
#	Note: this operation can never overflow.			#
#									#
#	A2. Convert the bcd mantissa to binary by successive		#
#	adds and muls in FP0. Set the sign according to SM.		#
#	The mantissa digits will be converted with the decimal point	#
#	assumed following the least-significant digit.			#
#	Note: this operation can never overflow.			#
#									#
#	A3. Count the number of leading/trailing zeros in the		#
#	bcd string.  If SE is positive, count the leading zeros;	#
#	if negative, count the trailing zeros.  Set the adjusted	#
#	exponent equal to the exponent from A1 and the zero count	#
#	added if SM = 1 and subtracted if SM = 0.  Scale the		#
#	mantissa the equivalent of forcing in the bcd value:		#
#									#
#	SM = 0	a non-zero digit in the integer position		#
#	SM = 1	a non-zero digit in Mant0, lsd of the fraction		#
#									#
#	this will insure that any value, regardless of its		#
#	representation (ex. 0.1E2, 1E1, 10E0, 100E-1), is converted	#
#	consistently.							#
#									#
#	A4. Calculate the factor 10^exp in FP1 using a table of		#
#	10^(2^n) values.  To reduce the error in forming factors	#
#	greater than 10^27, a directed rounding scheme is used with	#
#	tables rounded to RN, RM, and RP, according to the table	#
#	in the comments of the pwrten section.				#
#									#
#	A5. Form the final binary number by scaling the mantissa by	#
#	the exponent factor.  This is done by multiplying the		#
#	mantissa in FP0 by the factor in FP1 if the adjusted		#
#	exponent sign is positive, and dividing FP0 by FP1 if		#
#	it is negative.							#
#									#
#	Clean up and return. Check if the final mul or div was inexact.	#
#	If so, set INEX1 in USER_FPSR.					#
#									#
#########################################################################

#
#	PTENRN, PTENRM, and PTENRP are arrays of powers of 10 rounded
#	to nearest, minus, and plus, respectively.  The tables include
#	10**{1,2,4,8,16,32,64,128,256,512,1024,2048,4096}.  No rounding
#	is required until the power is greater than 27, however, all
#	tables include the first 5 for ease of indexing.
#
RTABLE:
	byte		0,0,0,0
	byte		2,3,2,3
	byte		2,3,3,2
	byte		3,2,2,3

	set		FNIBS,7
	set		FSTRT,0

	set		ESTRT,4
	set		EDIGITS,2

	global		decbin
decbin:
	mov.l		0x0(%a0),FP_SCR0_EX(%a6) # make a copy of input 
	mov.l		0x4(%a0),FP_SCR0_HI(%a6) # so we don't alter it
	mov.l		0x8(%a0),FP_SCR0_LO(%a6)

	lea		FP_SCR0(%a6),%a0

	movm.l		&0x3c00,-(%sp)		# save d2-d5
	fmovm.x		&0x1,-(%sp)		# save fp1
#
# Calculate exponent:
#  1. Copy bcd value in memory for use as a working copy.
#  2. Calculate absolute value of exponent in d1 by mul and add.
#  3. Correct for exponent sign.
#  4. Subtract 16 to compensate for interpreting the mant as all integer digits.
#     (i.e., all digits assumed left of the decimal point.)
#
# Register usage:
#
#  calc_e:
#	(*)  d0: temp digit storage
#	(*)  d1: accumulator for binary exponent
#	(*)  d2: digit count
#	(*)  d3: offset pointer
#	( )  d4: first word of bcd
#	( )  a0: pointer to working bcd value
#	( )  a6: pointer to original bcd value
#	(*)  FP_SCR1: working copy of original bcd value
#	(*)  L_SCR1: copy of original exponent word
#
calc_e:
	mov.l		&EDIGITS,%d2		# # of nibbles (digits) in fraction part
	mov.l		&ESTRT,%d3		# counter to pick up digits
	mov.l		(%a0),%d4		# get first word of bcd
	clr.l		%d1			# zero d1 for accumulator
e_gd:
	mulu.l		&0xa,%d1		# mul partial product by one digit place
	bfextu		%d4{%d3:&4},%d0		# get the digit and zero extend into d0
	add.l		%d0,%d1			# d1 = d1 + d0
	addq.b		&4,%d3			# advance d3 to the next digit
	dbf.w		%d2,e_gd		# if we have used all 3 digits, exit loop
	btst		&30,%d4			# get SE
	beq.b		e_pos			# don't negate if pos
	neg.l		%d1			# negate before subtracting
e_pos:
	sub.l		&16,%d1			# sub to compensate for shift of mant
	bge.b		e_save			# if still pos, do not neg
	neg.l		%d1			# now negative, make pos and set SE
	or.l		&0x40000000,%d4		# set SE in d4,
	or.l		&0x40000000,(%a0)	# and in working bcd
e_save:
	mov.l		%d1,-(%sp)		# save exp on stack
#
#
# Calculate mantissa:
#  1. Calculate absolute value of mantissa in fp0 by mul and add.
#  2. Correct for mantissa sign.
#     (i.e., all digits assumed left of the decimal point.)
#
# Register usage:
#
#  calc_m:
#	(*)  d0: temp digit storage
#	(*)  d1: lword counter
#	(*)  d2: digit count
#	(*)  d3: offset pointer
#	( )  d4: words 2 and 3 of bcd
#	( )  a0: pointer to working bcd value
#	( )  a6: pointer to original bcd value
#	(*) fp0: mantissa accumulator
#	( )  FP_SCR1: working copy of original bcd value
#	( )  L_SCR1: copy of original exponent word
#
calc_m:
	mov.l		&1,%d1			# word counter, init to 1
	fmov.s		&0x00000000,%fp0	# accumulator
#
#
#  Since the packed number has a long word between the first & second parts,
#  get the integer digit then skip down & get the rest of the
#  mantissa.  We will unroll the loop once.
#
	bfextu		(%a0){&28:&4},%d0	# integer part is ls digit in long word
	fadd.b		%d0,%fp0		# add digit to sum in fp0
#
#
#  Get the rest of the mantissa.
#
loadlw:
	mov.l		(%a0,%d1.L*4),%d4	# load mantissa lonqword into d4
	mov.l		&FSTRT,%d3		# counter to pick up digits
	mov.l		&FNIBS,%d2		# reset number of digits per a0 ptr
md2b:
	fmul.s		&0x41200000,%fp0	# fp0 = fp0 * 10
	bfextu		%d4{%d3:&4},%d0		# get the digit and zero extend
	fadd.b		%d0,%fp0		# fp0 = fp0 + digit
#
#
#  If all the digits (8) in that long word have been converted (d2=0),
#  then inc d1 (=2) to point to the next long word and reset d3 to 0
#  to initialize the digit offset, and set d2 to 7 for the digit count;
#  else continue with this long word.
#
	addq.b		&4,%d3			# advance d3 to the next digit
	dbf.w		%d2,md2b		# check for last digit in this lw
nextlw:
	addq.l		&1,%d1			# inc lw pointer in mantissa
	cmp.l		%d1,&2			# test for last lw
	ble.b		loadlw			# if not, get last one
#
#  Check the sign of the mant and make the value in fp0 the same sign.
#
m_sign:
	btst		&31,(%a0)		# test sign of the mantissa
	beq.b		ap_st_z			# if clear, go to append/strip zeros
	fneg.x		%fp0			# if set, negate fp0
#
# Append/strip zeros:
#
#  For adjusted exponents which have an absolute value greater than 27*,
#  this routine calculates the amount needed to normalize the mantissa
#  for the adjusted exponent.  That number is subtracted from the exp
#  if the exp was positive, and added if it was negative.  The purpose
#  of this is to reduce the value of the exponent and the possibility
#  of error in calculation of pwrten.
#
#  1. Branch on the sign of the adjusted exponent.
#  2p.(positive exp)
#   2. Check M16 and the digits in lwords 2 and 3 in decending order.
#   3. Add one for each zero encountered until a non-zero digit.
#   4. Subtract the count from the exp.
#   5. Check if the exp has crossed zero in #3 above; make the exp abs
#	   and set SE.
#	6. Multiply the mantissa by 10**count.
#  2n.(negative exp)
#   2. Check the digits in lwords 3 and 2 in decending order.
#   3. Add one for each zero encountered until a non-zero digit.
#   4. Add the count to the exp.
#   5. Check if the exp has crossed zero in #3 above; clear SE.
#   6. Divide the mantissa by 10**count.
#
#  *Why 27?  If the adjusted exponent is within -28 < expA < 28, than
#   any adjustment due to append/strip zeros will drive the resultane
#   exponent towards zero.  Since all pwrten constants with a power
#   of 27 or less are exact, there is no need to use this routine to
#   attempt to lessen the resultant exponent.
#
# Register usage:
#
#  ap_st_z:
#	(*)  d0: temp digit storage
#	(*)  d1: zero count
#	(*)  d2: digit count
#	(*)  d3: offset pointer
#	( )  d4: first word of bcd
#	(*)  d5: lword counter
#	( )  a0: pointer to working bcd value
#	( )  FP_SCR1: working copy of original bcd value
#	( )  L_SCR1: copy of original exponent word
#
#
# First check the absolute value of the exponent to see if this
# routine is necessary.  If so, then check the sign of the exponent
# and do append (+) or strip (-) zeros accordingly.
# This section handles a positive adjusted exponent.
#
ap_st_z:
	mov.l		(%sp),%d1		# load expA for range test
	cmp.l		%d1,&27			# test is with 27
	ble.w		pwrten			# if abs(expA) <28, skip ap/st zeros
	btst		&30,(%a0)		# check sign of exp
	bne.b		ap_st_n			# if neg, go to neg side
	clr.l		%d1			# zero count reg
	mov.l		(%a0),%d4		# load lword 1 to d4
	bfextu		%d4{&28:&4},%d0		# get M16 in d0
	bne.b		ap_p_fx			# if M16 is non-zero, go fix exp
	addq.l		&1,%d1			# inc zero count
	mov.l		&1,%d5			# init lword counter
	mov.l		(%a0,%d5.L*4),%d4	# get lword 2 to d4
	bne.b		ap_p_cl			# if lw 2 is zero, skip it
	addq.l		&8,%d1			# and inc count by 8
	addq.l		&1,%d5			# inc lword counter
	mov.l		(%a0,%d5.L*4),%d4	# get lword 3 to d4
ap_p_cl:
	clr.l		%d3			# init offset reg
	mov.l		&7,%d2			# init digit counter
ap_p_gd:
	bfextu		%d4{%d3:&4},%d0		# get digit
	bne.b		ap_p_fx			# if non-zero, go to fix exp
	addq.l		&4,%d3			# point to next digit
	addq.l		&1,%d1			# inc digit counter
	dbf.w		%d2,ap_p_gd		# get next digit
ap_p_fx:
	mov.l		%d1,%d0			# copy counter to d2
	mov.l		(%sp),%d1		# get adjusted exp from memory
	sub.l		%d0,%d1			# subtract count from exp
	bge.b		ap_p_fm			# if still pos, go to pwrten
	neg.l		%d1			# now its neg; get abs
	mov.l		(%a0),%d4		# load lword 1 to d4
	or.l		&0x40000000,%d4		# and set SE in d4
	or.l		&0x40000000,(%a0)	# and in memory
#
# Calculate the mantissa multiplier to compensate for the striping of
# zeros from the mantissa.
#
ap_p_fm:
	lea.l		PTENRN(%pc),%a1		# get address of power-of-ten table
	clr.l		%d3			# init table index
	fmov.s		&0x3f800000,%fp1	# init fp1 to 1
	mov.l		&3,%d2			# init d2 to count bits in counter
ap_p_el:
	asr.l		&1,%d0			# shift lsb into carry
	bcc.b		ap_p_en			# if 1, mul fp1 by pwrten factor
	fmul.x		(%a1,%d3),%fp1		# mul by 10**(d3_bit_no)
ap_p_en:
	add.l		&12,%d3			# inc d3 to next rtable entry
	tst.l		%d0			# check if d0 is zero
	bne.b		ap_p_el			# if not, get next bit
	fmul.x		%fp1,%fp0		# mul mantissa by 10**(no_bits_shifted)
	bra.b		pwrten			# go calc pwrten
#
# This section handles a negative adjusted exponent.
#
ap_st_n:
	clr.l		%d1			# clr counter
	mov.l		&2,%d5			# set up d5 to point to lword 3
	mov.l		(%a0,%d5.L*4),%d4	# get lword 3
	bne.b		ap_n_cl			# if not zero, check digits
	sub.l		&1,%d5			# dec d5 to point to lword 2
	addq.l		&8,%d1			# inc counter by 8
	mov.l		(%a0,%d5.L*4),%d4	# get lword 2
ap_n_cl:
	mov.l		&28,%d3			# point to last digit
	mov.l		&7,%d2			# init digit counter
ap_n_gd:
	bfextu		%d4{%d3:&4},%d0		# get digit
	bne.b		ap_n_fx			# if non-zero, go to exp fix
	subq.l		&4,%d3			# point to previous digit
	addq.l		&1,%d1			# inc digit counter
	dbf.w		%d2,ap_n_gd		# get next digit
ap_n_fx:
	mov.l		%d1,%d0			# copy counter to d0
	mov.l		(%sp),%d1		# get adjusted exp from memory
	sub.l		%d0,%d1			# subtract count from exp
	bgt.b		ap_n_fm			# if still pos, go fix mantissa
	neg.l		%d1			# take abs of exp and clr SE
	mov.l		(%a0),%d4		# load lword 1 to d4
	and.l		&0xbfffffff,%d4		# and clr SE in d4
	and.l		&0xbfffffff,(%a0)	# and in memory
#
# Calculate the mantissa multiplier to compensate for the appending of
# zeros to the mantissa.
#
ap_n_fm:
	lea.l		PTENRN(%pc),%a1		# get address of power-of-ten table
	clr.l		%d3			# init table index
	fmov.s		&0x3f800000,%fp1	# init fp1 to 1
	mov.l		&3,%d2			# init d2 to count bits in counter
ap_n_el:
	asr.l		&1,%d0			# shift lsb into carry
	bcc.b		ap_n_en			# if 1, mul fp1 by pwrten factor
	fmul.x		(%a1,%d3),%fp1		# mul by 10**(d3_bit_no)
ap_n_en:
	add.l		&12,%d3			# inc d3 to next rtable entry
	tst.l		%d0			# check if d0 is zero
	bne.b		ap_n_el			# if not, get next bit
	fdiv.x		%fp1,%fp0		# div mantissa by 10**(no_bits_shifted)
#
#
# Calculate power-of-ten factor from adjusted and shifted exponent.
#
# Register usage:
#
#  pwrten:
#	(*)  d0: temp
#	( )  d1: exponent
#	(*)  d2: {FPCR[6:5],SM,SE} as index in RTABLE; temp
#	(*)  d3: FPCR work copy
#	( )  d4: first word of bcd
#	(*)  a1: RTABLE pointer
#  calc_p:
#	(*)  d0: temp
#	( )  d1: exponent
#	(*)  d3: PWRTxx table index
#	( )  a0: pointer to working copy of bcd
#	(*)  a1: PWRTxx pointer
#	(*) fp1: power-of-ten accumulator
#
# Pwrten calculates the exponent factor in the selected rounding mode
# according to the following table:
#	
#	Sign of Mant  Sign of Exp  Rounding Mode  PWRTEN Rounding Mode
#
#	ANY	  ANY	RN	RN
#
#	 +	   +	RP	RP
#	 -	   +	RP	RM
#	 +	   -	RP	RM
#	 -	   -	RP	RP
#
#	 +	   +	RM	RM
#	 -	   +	RM	RP
#	 +	   -	RM	RP
#	 -	   -	RM	RM
#
#	 +	   +	RZ	RM
#	 -	   +	RZ	RM
#	 +	   -	RZ	RP
#	 -	   -	RZ	RP
#
#
pwrten:
	mov.l		USER_FPCR(%a6),%d3	# get user's FPCR
	bfextu		%d3{&26:&2},%d2		# isolate rounding mode bits
	mov.l		(%a0),%d4		# reload 1st bcd word to d4
	asl.l		&2,%d2			# format d2 to be
	bfextu		%d4{&0:&2},%d0		# {FPCR[6],FPCR[5],SM,SE}
	add.l		%d0,%d2			# in d2 as index into RTABLE
	lea.l		RTABLE(%pc),%a1		# load rtable base
	mov.b		(%a1,%d2),%d0		# load new rounding bits from table
	clr.l		%d3			# clear d3 to force no exc and extended
	bfins		%d0,%d3{&26:&2}		# stuff new rounding bits in FPCR
	fmov.l		%d3,%fpcr		# write new FPCR
	asr.l		&1,%d0			# write correct PTENxx table
	bcc.b		not_rp			# to a1
	lea.l		PTENRP(%pc),%a1		# it is RP
	bra.b		calc_p			# go to init section
not_rp:
	asr.l		&1,%d0			# keep checking
	bcc.b		not_rm
	lea.l		PTENRM(%pc),%a1		# it is RM
	bra.b		calc_p			# go to init section
not_rm:
	lea.l		PTENRN(%pc),%a1		# it is RN
calc_p:
	mov.l		%d1,%d0			# copy exp to d0;use d0
	bpl.b		no_neg			# if exp is negative,
	neg.l		%d0			# invert it
	or.l		&0x40000000,(%a0)	# and set SE bit
no_neg:
	clr.l		%d3			# table index
	fmov.s		&0x3f800000,%fp1	# init fp1 to 1
e_loop:
	asr.l		&1,%d0			# shift next bit into carry
	bcc.b		e_next			# if zero, skip the mul
	fmul.x		(%a1,%d3),%fp1		# mul by 10**(d3_bit_no)
e_next:
	add.l		&12,%d3			# inc d3 to next rtable entry
	tst.l		%d0			# check if d0 is zero
	bne.b		e_loop			# not zero, continue shifting
#
#
#  Check the sign of the adjusted exp and make the value in fp0 the
#  same sign. If the exp was pos then multiply fp1*fp0;
#  else divide fp0/fp1.
#
# Register Usage:
#  norm:
#	( )  a0: pointer to working bcd value
#	(*) fp0: mantissa accumulator
#	( ) fp1: scaling factor - 10**(abs(exp))
#
pnorm:
	btst		&30,(%a0)		# test the sign of the exponent
	beq.b		mul			# if clear, go to multiply
div:
	fdiv.x		%fp1,%fp0		# exp is negative, so divide mant by exp
	bra.b		end_dec
mul:
	fmul.x		%fp1,%fp0		# exp is positive, so multiply by exp
#
#
# Clean up and return with result in fp0.
#
# If the final mul/div in decbin incurred an inex exception,
# it will be inex2, but will be reported as inex1 by get_op.
#
end_dec:
	fmov.l		%fpsr,%d0		# get status register	
	bclr		&inex2_bit+8,%d0	# test for inex2 and clear it
	beq.b		no_exc			# skip this if no exc
	ori.w		&inx1a_mask,2+USER_FPSR(%a6) # set INEX1/AINEX
no_exc:
	add.l		&0x4,%sp		# clear 1 lw param
	fmovm.x		(%sp)+,&0x40		# restore fp1
	movm.l		(%sp)+,&0x3c		# restore d2-d5
	fmov.l		&0x0,%fpcr
	fmov.l		&0x0,%fpsr
	rts

#########################################################################
# bindec(): Converts an input in extended precision format to bcd format#
#									#
# INPUT ***************************************************************	#
#	a0 = pointer to the input extended precision value in memory.	#
#	     the input may be either normalized, unnormalized, or 	#
#	     denormalized.						#
#	d0 = contains the k-factor sign-extended to 32-bits. 		#
#									#
# OUTPUT **************************************************************	#
#	FP_SCR0(a6) = bcd format result on the stack.			#
#									#
# ALGORITHM ***********************************************************	#
#									#
#	A1.	Set RM and size ext;  Set SIGMA = sign of input.  	#
#		The k-factor is saved for use in d7. Clear the		#
#		BINDEC_FLG for separating normalized/denormalized	#
#		input.  If input is unnormalized or denormalized,	#
#		normalize it.						#
#									#
#	A2.	Set X = abs(input).					#
#									#
#	A3.	Compute ILOG.						#
#		ILOG is the log base 10 of the input value.  It is	#
#		approximated by adding e + 0.f when the original 	#
#		value is viewed as 2^^e * 1.f in extended precision.  	#
#		This value is stored in d6.				#
#									#
#	A4.	Clr INEX bit.						#
#		The operation in A3 above may have set INEX2.  		#
#									#
#	A5.	Set ICTR = 0;						#
#		ICTR is a flag used in A13.  It must be set before the 	#
#		loop entry A6.						#
#									#
#	A6.	Calculate LEN.						#
#		LEN is the number of digits to be displayed.  The	#
#		k-factor can dictate either the total number of digits,	#
#		if it is a positive number, or the number of digits	#
#		after the decimal point which are to be included as	#
#		significant.  See the 68882 manual for examples.	#
#		If LEN is computed to be greater than 17, set OPERR in	#
#		USER_FPSR.  LEN is stored in d4.			#
#									#
#	A7.	Calculate SCALE.					#
#		SCALE is equal to 10^ISCALE, where ISCALE is the number	#
#		of decimal places needed to insure LEN integer digits	#
#		in the output before conversion to bcd. LAMBDA is the	#
#		sign of ISCALE, used in A9. Fp1 contains		#
#		10^^(abs(ISCALE)) using a rounding mode which is a	#
#		function of the original rounding mode and the signs	#
#		of ISCALE and X.  A table is given in the code.		#
#									#
#	A8.	Clr INEX; Force RZ.					#
#		The operation in A3 above may have set INEX2.  		#
#		RZ mode is forced for the scaling operation to insure	#
#		only one rounding error.  The grs bits are collected in #
#		the INEX flag for use in A10.				#
#									#
#	A9.	Scale X -> Y.						#
#		The mantissa is scaled to the desired number of		#
#		significant digits.  The excess digits are collected	#
#		in INEX2.						#
#									#
#	A10.	Or in INEX.						#
#		If INEX is set, round error occurred.  This is		#
#		compensated for by 'or-ing' in the INEX2 flag to	#
#		the lsb of Y.						#
#									#
#	A11.	Restore original FPCR; set size ext.			#
#		Perform FINT operation in the user's rounding mode.	#
#		Keep the size to extended.				#
#									#
#	A12.	Calculate YINT = FINT(Y) according to user's rounding	#
#		mode.  The FPSP routine sintd0 is used.  The output	#
#		is in fp0.						#
#									#
#	A13.	Check for LEN digits.					#
#		If the int operation results in more than LEN digits,	#
#		or less than LEN -1 digits, adjust ILOG and repeat from	#
#		A6.  This test occurs only on the first pass.  If the	#
#		result is exactly 10^LEN, decrement ILOG and divide	#
#		the mantissa by 10.					#
#									#
#	A14.	Convert the mantissa to bcd.				#
#		The binstr routine is used to convert the LEN digit 	#
#		mantissa to bcd in memory.  The input to binstr is	#
#		to be a fraction; i.e. (mantissa)/10^LEN and adjusted	#
#		such that the decimal point is to the left of bit 63.	#
#		The bcd digits are stored in the correct position in 	#
#		the final string area in memory.			#
#									#
#	A15.	Convert the exponent to bcd.				#
#		As in A14 above, the exp is converted to bcd and the	#
#		digits are stored in the final string.			#
#		Test the length of the final exponent string.  If the	#
#		length is 4, set operr.					#
#									#
#	A16.	Write sign bits to final string.			#
#									#
#########################################################################

set	BINDEC_FLG,	EXC_TEMP	# DENORM flag

# Constants in extended precision
PLOG2:
	long		0x3FFD0000,0x9A209A84,0xFBCFF798,0x00000000
PLOG2UP1:
	long		0x3FFD0000,0x9A209A84,0xFBCFF799,0x00000000

# Constants in single precision
FONE:
	long		0x3F800000,0x00000000,0x00000000,0x00000000
FTWO:
	long		0x40000000,0x00000000,0x00000000,0x00000000
FTEN:
	long		0x41200000,0x00000000,0x00000000,0x00000000
F4933:
	long		0x459A2800,0x00000000,0x00000000,0x00000000

RBDTBL:
	byte		0,0,0,0
	byte		3,3,2,2
	byte		3,2,2,3
	byte		2,3,3,2

#	Implementation Notes:
#
#	The registers are used as follows:
#
#		d0: scratch; LEN input to binstr
#		d1: scratch
#		d2: upper 32-bits of mantissa for binstr
#		d3: scratch;lower 32-bits of mantissa for binstr
#		d4: LEN
#      		d5: LAMBDA/ICTR
#		d6: ILOG
#		d7: k-factor
#		a0: ptr for original operand/final result
#		a1: scratch pointer
#		a2: pointer to FP_X; abs(original value) in ext
#		fp0: scratch
#		fp1: scratch
#		fp2: scratch
#		F_SCR1:
#		F_SCR2:
#		L_SCR1:
#		L_SCR2:

	global		bindec
bindec:
	movm.l		&0x3f20,-(%sp)	#  {%d2-%d7/%a2}
	fmovm.x		&0x7,-(%sp)	#  {%fp0-%fp2}

# A1. Set RM and size ext. Set SIGMA = sign input;
#     The k-factor is saved for use in d7.  Clear BINDEC_FLG for
#     separating  normalized/denormalized input.  If the input
#     is a denormalized number, set the BINDEC_FLG memory word
#     to signal denorm.  If the input is unnormalized, normalize
#     the input and test for denormalized result.  
#
	fmov.l		&rm_mode*0x10,%fpcr	# set RM and ext
	mov.l		(%a0),L_SCR2(%a6)	# save exponent for sign check
	mov.l		%d0,%d7		# move k-factor to d7

	clr.b		BINDEC_FLG(%a6)	# clr norm/denorm flag
	cmpi.b		STAG(%a6),&DENORM # is input a DENORM?
	bne.w		A2_str		# no; input is a NORM

#
# Normalize the denorm
#
un_de_norm:
	mov.w		(%a0),%d0
	and.w		&0x7fff,%d0	# strip sign of normalized exp
	mov.l		4(%a0),%d1
	mov.l		8(%a0),%d2
norm_loop:
	sub.w		&1,%d0
	lsl.l		&1,%d2
	roxl.l		&1,%d1
	tst.l		%d1
	bge.b		norm_loop
#
# Test if the normalized input is denormalized
#
	tst.w		%d0
	bgt.b		pos_exp		# if greater than zero, it is a norm
	st		BINDEC_FLG(%a6)	# set flag for denorm
pos_exp:
	and.w		&0x7fff,%d0	# strip sign of normalized exp
	mov.w		%d0,(%a0)
	mov.l		%d1,4(%a0)
	mov.l		%d2,8(%a0)

# A2. Set X = abs(input).
#
A2_str:
	mov.l		(%a0),FP_SCR1(%a6)	# move input to work space
	mov.l		4(%a0),FP_SCR1+4(%a6)	# move input to work space
	mov.l		8(%a0),FP_SCR1+8(%a6)	# move input to work space
	and.l		&0x7fffffff,FP_SCR1(%a6)	# create abs(X)

# A3. Compute ILOG.
#     ILOG is the log base 10 of the input value.  It is approx-
#     imated by adding e + 0.f when the original value is viewed
#     as 2^^e * 1.f in extended precision.  This value is stored
#     in d6.
#
# Register usage:
#	Input/Output
#	d0: k-factor/exponent
#	d2: x/x
#	d3: x/x
#	d4: x/x
#	d5: x/x
#	d6: x/ILOG
#	d7: k-factor/Unchanged
#	a0: ptr for original operand/final result
#	a1: x/x
#	a2: x/x
#	fp0: x/float(ILOG)
#	fp1: x/x
#	fp2: x/x
#	F_SCR1:x/x
#	F_SCR2:Abs(X)/Abs(X) with $3fff exponent
#	L_SCR1:x/x
#	L_SCR2:first word of X packed/Unchanged

	tst.b		BINDEC_FLG(%a6)	# check for denorm
	beq.b		A3_cont		# if clr, continue with norm
	mov.l		&-4933,%d6	# force ILOG = -4933
	bra.b		A4_str
A3_cont:
	mov.w		FP_SCR1(%a6),%d0	# move exp to d0
	mov.w		&0x3fff,FP_SCR1(%a6)	# replace exponent with 0x3fff
	fmov.x		FP_SCR1(%a6),%fp0	# now fp0 has 1.f
	sub.w		&0x3fff,%d0	# strip off bias
	fadd.w		%d0,%fp0	# add in exp
	fsub.s		FONE(%pc),%fp0	# subtract off 1.0
	fbge.w		pos_res		# if pos, branch 
	fmul.x		PLOG2UP1(%pc),%fp0	# if neg, mul by LOG2UP1
	fmov.l		%fp0,%d6	# put ILOG in d6 as a lword
	bra.b		A4_str		# go move out ILOG
pos_res:
	fmul.x		PLOG2(%pc),%fp0	# if pos, mul by LOG2
	fmov.l		%fp0,%d6	# put ILOG in d6 as a lword


# A4. Clr INEX bit.
#     The operation in A3 above may have set INEX2.  

A4_str:
	fmov.l		&0,%fpsr	# zero all of fpsr - nothing needed


# A5. Set ICTR = 0;
#     ICTR is a flag used in A13.  It must be set before the 
#     loop entry A6. The lower word of d5 is used for ICTR.

	clr.w		%d5		# clear ICTR

# A6. Calculate LEN.
#     LEN is the number of digits to be displayed.  The k-factor
#     can dictate either the total number of digits, if it is
#     a positive number, or the number of digits after the
#     original decimal point which are to be included as
#     significant.  See the 68882 manual for examples.
#     If LEN is computed to be greater than 17, set OPERR in
#     USER_FPSR.  LEN is stored in d4.
#
# Register usage:
#	Input/Output
#	d0: exponent/Unchanged
#	d2: x/x/scratch
#	d3: x/x
#	d4: exc picture/LEN
#	d5: ICTR/Unchanged
#	d6: ILOG/Unchanged
#	d7: k-factor/Unchanged
#	a0: ptr for original operand/final result
#	a1: x/x
#	a2: x/x
#	fp0: float(ILOG)/Unchanged
#	fp1: x/x
#	fp2: x/x
#	F_SCR1:x/x
#	F_SCR2:Abs(X) with $3fff exponent/Unchanged
#	L_SCR1:x/x
#	L_SCR2:first word of X packed/Unchanged

A6_str:
	tst.l		%d7		# branch on sign of k
	ble.b		k_neg		# if k <= 0, LEN = ILOG + 1 - k
	mov.l		%d7,%d4		# if k > 0, LEN = k
	bra.b		len_ck		# skip to LEN check
k_neg:
	mov.l		%d6,%d4		# first load ILOG to d4
	sub.l		%d7,%d4		# subtract off k
	addq.l		&1,%d4		# add in the 1
len_ck:
	tst.l		%d4		# LEN check: branch on sign of LEN
	ble.b		LEN_ng		# if neg, set LEN = 1
	cmp.l		%d4,&17		# test if LEN > 17
	ble.b		A7_str		# if not, forget it
	mov.l		&17,%d4		# set max LEN = 17
	tst.l		%d7		# if negative, never set OPERR
	ble.b		A7_str		# if positive, continue
	or.l		&opaop_mask,USER_FPSR(%a6)	# set OPERR & AIOP in USER_FPSR
	bra.b		A7_str		# finished here
LEN_ng:
	mov.l		&1,%d4		# min LEN is 1


# A7. Calculate SCALE.
#     SCALE is equal to 10^ISCALE, where ISCALE is the number
#     of decimal places needed to insure LEN integer digits
#     in the output before conversion to bcd. LAMBDA is the sign
#     of ISCALE, used in A9.  Fp1 contains 10^^(abs(ISCALE)) using
#     the rounding mode as given in the following table (see
#     Coonen, p. 7.23 as ref.; however, the SCALE variable is
#     of opposite sign in bindec.sa from Coonen).
#
#	Initial					USE
#	FPCR[6:5]	LAMBDA	SIGN(X)		FPCR[6:5]
#	----------------------------------------------
#	 RN	00	   0	   0		00/0	RN
#	 RN	00	   0	   1		00/0	RN
#	 RN	00	   1	   0		00/0	RN
#	 RN	00	   1	   1		00/0	RN
#	 RZ	01	   0	   0		11/3	RP
#	 RZ	01	   0	   1		11/3	RP
#	 RZ	01	   1	   0		10/2	RM
#	 RZ	01	   1	   1		10/2	RM
#	 RM	10	   0	   0		11/3	RP
#	 RM	10	   0	   1		10/2	RM
#	 RM	10	   1	   0		10/2	RM
#	 RM	10	   1	   1		11/3	RP
#	 RP	11	   0	   0		10/2	RM
#	 RP	11	   0	   1		11/3	RP
#	 RP	11	   1	   0		11/3	RP
#	 RP	11	   1	   1		10/2	RM
#
# Register usage:
#	Input/Output
#	d0: exponent/scratch - final is 0
#	d2: x/0 or 24 for A9
#	d3: x/scratch - offset ptr into PTENRM array
#	d4: LEN/Unchanged
#	d5: 0/ICTR:LAMBDA
#	d6: ILOG/ILOG or k if ((k<=0)&(ILOG<k))
#	d7: k-factor/Unchanged
#	a0: ptr for original operand/final result
#	a1: x/ptr to PTENRM array
#	a2: x/x
#	fp0: float(ILOG)/Unchanged
#	fp1: x/10^ISCALE
#	fp2: x/x
#	F_SCR1:x/x
#	F_SCR2:Abs(X) with $3fff exponent/Unchanged
#	L_SCR1:x/x
#	L_SCR2:first word of X packed/Unchanged

A7_str:
	tst.l		%d7		# test sign of k
	bgt.b		k_pos		# if pos and > 0, skip this
	cmp.l		%d7,%d6		# test k - ILOG
	blt.b		k_pos		# if ILOG >= k, skip this
	mov.l		%d7,%d6		# if ((k<0) & (ILOG < k)) ILOG = k
k_pos:
	mov.l		%d6,%d0		# calc ILOG + 1 - LEN in d0
	addq.l		&1,%d0		# add the 1
	sub.l		%d4,%d0		# sub off LEN
	swap		%d5		# use upper word of d5 for LAMBDA
	clr.w		%d5		# set it zero initially
	clr.w		%d2		# set up d2 for very small case
	tst.l		%d0		# test sign of ISCALE
	bge.b		iscale		# if pos, skip next inst
	addq.w		&1,%d5		# if neg, set LAMBDA true
	cmp.l		%d0,&0xffffecd4	# test iscale <= -4908
	bgt.b		no_inf		# if false, skip rest
	add.l		&24,%d0		# add in 24 to iscale
	mov.l		&24,%d2		# put 24 in d2 for A9
no_inf:
	neg.l		%d0		# and take abs of ISCALE
iscale:
	fmov.s		FONE(%pc),%fp1	# init fp1 to 1
	bfextu		USER_FPCR(%a6){&26:&2},%d1	# get initial rmode bits
	lsl.w		&1,%d1		# put them in bits 2:1
	add.w		%d5,%d1		# add in LAMBDA
	lsl.w		&1,%d1		# put them in bits 3:1
	tst.l		L_SCR2(%a6)	# test sign of original x
	bge.b		x_pos		# if pos, don't set bit 0
	addq.l		&1,%d1		# if neg, set bit 0
x_pos:
	lea.l		RBDTBL(%pc),%a2	# load rbdtbl base
	mov.b		(%a2,%d1),%d3	# load d3 with new rmode
	lsl.l		&4,%d3		# put bits in proper position
	fmov.l		%d3,%fpcr	# load bits into fpu
	lsr.l		&4,%d3		# put bits in proper position
	tst.b		%d3		# decode new rmode for pten table
	bne.b		not_rn		# if zero, it is RN
	lea.l		PTENRN(%pc),%a1	# load a1 with RN table base
	bra.b		rmode		# exit decode
not_rn:
	lsr.b		&1,%d3		# get lsb in carry
	bcc.b		not_rp2		# if carry clear, it is RM
	lea.l		PTENRP(%pc),%a1	# load a1 with RP table base
	bra.b		rmode		# exit decode
not_rp2:
	lea.l		PTENRM(%pc),%a1	# load a1 with RM table base
rmode:
	clr.l		%d3		# clr table index
e_loop2:
	lsr.l		&1,%d0		# shift next bit into carry
	bcc.b		e_next2		# if zero, skip the mul
	fmul.x		(%a1,%d3),%fp1	# mul by 10**(d3_bit_no)
e_next2:
	add.l		&12,%d3		# inc d3 to next pwrten table entry
	tst.l		%d0		# test if ISCALE is zero
	bne.b		e_loop2		# if not, loop

# A8. Clr INEX; Force RZ.
#     The operation in A3 above may have set INEX2.  
#     RZ mode is forced for the scaling operation to insure
#     only one rounding error.  The grs bits are collected in 
#     the INEX flag for use in A10.
#
# Register usage:
#	Input/Output

	fmov.l		&0,%fpsr	# clr INEX 
	fmov.l		&rz_mode*0x10,%fpcr	# set RZ rounding mode

# A9. Scale X -> Y.
#     The mantissa is scaled to the desired number of significant
#     digits.  The excess digits are collected in INEX2. If mul,
#     Check d2 for excess 10 exponential value.  If not zero, 
#     the iscale value would have caused the pwrten calculation
#     to overflow.  Only a negative iscale can cause this, so
#     multiply by 10^(d2), which is now only allowed to be 24,
#     with a multiply by 10^8 and 10^16, which is exact since
#     10^24 is exact.  If the input was denormalized, we must
#     create a busy stack frame with the mul command and the
#     two operands, and allow the fpu to complete the multiply.
#
# Register usage:
#	Input/Output
#	d0: FPCR with RZ mode/Unchanged
#	d2: 0 or 24/unchanged
#	d3: x/x
#	d4: LEN/Unchanged
#	d5: ICTR:LAMBDA
#	d6: ILOG/Unchanged
#	d7: k-factor/Unchanged
#	a0: ptr for original operand/final result
#	a1: ptr to PTENRM array/Unchanged
#	a2: x/x
#	fp0: float(ILOG)/X adjusted for SCALE (Y)
#	fp1: 10^ISCALE/Unchanged
#	fp2: x/x
#	F_SCR1:x/x
#	F_SCR2:Abs(X) with $3fff exponent/Unchanged
#	L_SCR1:x/x
#	L_SCR2:first word of X packed/Unchanged

A9_str:
	fmov.x		(%a0),%fp0	# load X from memory
	fabs.x		%fp0		# use abs(X)
	tst.w		%d5		# LAMBDA is in lower word of d5
	bne.b		sc_mul		# if neg (LAMBDA = 1), scale by mul
	fdiv.x		%fp1,%fp0	# calculate X / SCALE -> Y to fp0
	bra.w		A10_st		# branch to A10

sc_mul:
	tst.b		BINDEC_FLG(%a6)	# check for denorm
	beq.w		A9_norm		# if norm, continue with mul

# for DENORM, we must calculate:
#	fp0 = input_op * 10^ISCALE * 10^24
# since the input operand is a DENORM, we can't multiply it directly.
# so, we do the multiplication of the exponents and mantissas separately.
# in this way, we avoid underflow on intermediate stages of the
# multiplication and guarantee a result without exception.
	fmovm.x		&0x2,-(%sp)	# save 10^ISCALE to stack

	mov.w		(%sp),%d3	# grab exponent
	andi.w		&0x7fff,%d3	# clear sign
	ori.w		&0x8000,(%a0)	# make DENORM exp negative
	add.w		(%a0),%d3	# add DENORM exp to 10^ISCALE exp
	subi.w		&0x3fff,%d3	# subtract BIAS
	add.w		36(%a1),%d3
	subi.w		&0x3fff,%d3	# subtract BIAS
	add.w		48(%a1),%d3
	subi.w		&0x3fff,%d3	# subtract BIAS

	bmi.w		sc_mul_err	# is result is DENORM, punt!!!

	andi.w		&0x8000,(%sp)	# keep sign
	or.w		%d3,(%sp)	# insert new exponent
	andi.w		&0x7fff,(%a0)	# clear sign bit on DENORM again
	mov.l		0x8(%a0),-(%sp) # put input op mantissa on stk
	mov.l		0x4(%a0),-(%sp)
	mov.l		&0x3fff0000,-(%sp) # force exp to zero
	fmovm.x		(%sp)+,&0x80	# load normalized DENORM into fp0
	fmul.x		(%sp)+,%fp0

#	fmul.x	36(%a1),%fp0	# multiply fp0 by 10^8
#	fmul.x	48(%a1),%fp0	# multiply fp0 by 10^16
	mov.l		36+8(%a1),-(%sp) # get 10^8 mantissa
	mov.l		36+4(%a1),-(%sp)
	mov.l		&0x3fff0000,-(%sp) # force exp to zero
	mov.l		48+8(%a1),-(%sp) # get 10^16 mantissa
	mov.l		48+4(%a1),-(%sp)
	mov.l		&0x3fff0000,-(%sp)# force exp to zero
	fmul.x		(%sp)+,%fp0	# multiply fp0 by 10^8
	fmul.x		(%sp)+,%fp0	# multiply fp0 by 10^16
	bra.b		A10_st

sc_mul_err:
	bra.b		sc_mul_err

A9_norm:
	tst.w		%d2		# test for small exp case
	beq.b		A9_con		# if zero, continue as normal
	fmul.x		36(%a1),%fp0	# multiply fp0 by 10^8
	fmul.x		48(%a1),%fp0	# multiply fp0 by 10^16
A9_con:
	fmul.x		%fp1,%fp0	# calculate X * SCALE -> Y to fp0

# A10. Or in INEX.
#      If INEX is set, round error occurred.  This is compensated
#      for by 'or-ing' in the INEX2 flag to the lsb of Y.
#
# Register usage:
#	Input/Output
#	d0: FPCR with RZ mode/FPSR with INEX2 isolated
#	d2: x/x
#	d3: x/x
#	d4: LEN/Unchanged
#	d5: ICTR:LAMBDA
#	d6: ILOG/Unchanged
#	d7: k-factor/Unchanged
#	a0: ptr for original operand/final result
#	a1: ptr to PTENxx array/Unchanged
#	a2: x/ptr to FP_SCR1(a6)
#	fp0: Y/Y with lsb adjusted
#	fp1: 10^ISCALE/Unchanged
#	fp2: x/x

A10_st:
	fmov.l		%fpsr,%d0	# get FPSR
	fmov.x		%fp0,FP_SCR1(%a6)	# move Y to memory
	lea.l		FP_SCR1(%a6),%a2	# load a2 with ptr to FP_SCR1
	btst		&9,%d0		# check if INEX2 set
	beq.b		A11_st		# if clear, skip rest
	or.l		&1,8(%a2)	# or in 1 to lsb of mantissa
	fmov.x		FP_SCR1(%a6),%fp0	# write adjusted Y back to fpu


# A11. Restore original FPCR; set size ext.
#      Perform FINT operation in the user's rounding mode.  Keep
#      the size to extended.  The sintdo entry point in the sint
#      routine expects the FPCR value to be in USER_FPCR for
#      mode and precision.  The original FPCR is saved in L_SCR1.

A11_st:
	mov.l		USER_FPCR(%a6),L_SCR1(%a6)	# save it for later
	and.l		&0x00000030,USER_FPCR(%a6)	# set size to ext, 
#					;block exceptions


# A12. Calculate YINT = FINT(Y) according to user's rounding mode.
#      The FPSP routine sintd0 is used.  The output is in fp0.
#
# Register usage:
#	Input/Output
#	d0: FPSR with AINEX cleared/FPCR with size set to ext
#	d2: x/x/scratch
#	d3: x/x
#	d4: LEN/Unchanged
#	d5: ICTR:LAMBDA/Unchanged
#	d6: ILOG/Unchanged
#	d7: k-factor/Unchanged
#	a0: ptr for original operand/src ptr for sintdo
#	a1: ptr to PTENxx array/Unchanged
#	a2: ptr to FP_SCR1(a6)/Unchanged
#	a6: temp pointer to FP_SCR1(a6) - orig value saved and restored
#	fp0: Y/YINT
#	fp1: 10^ISCALE/Unchanged
#	fp2: x/x
#	F_SCR1:x/x
#	F_SCR2:Y adjusted for inex/Y with original exponent
#	L_SCR1:x/original USER_FPCR
#	L_SCR2:first word of X packed/Unchanged

A12_st:
	movm.l	&0xc0c0,-(%sp)	# save regs used by sintd0	 {%d0-%d1/%a0-%a1}
	mov.l	L_SCR1(%a6),-(%sp)
	mov.l	L_SCR2(%a6),-(%sp)

	lea.l		FP_SCR1(%a6),%a0	# a0 is ptr to FP_SCR1(a6)
	fmov.x		%fp0,(%a0)	# move Y to memory at FP_SCR1(a6)
	tst.l		L_SCR2(%a6)	# test sign of original operand
	bge.b		do_fint12		# if pos, use Y 
	or.l		&0x80000000,(%a0)	# if neg, use -Y
do_fint12:
	mov.l	USER_FPSR(%a6),-(%sp)
#	bsr	sintdo		# sint routine returns int in fp0

	fmov.l	USER_FPCR(%a6),%fpcr
	fmov.l	&0x0,%fpsr			# clear the AEXC bits!!!
##	mov.l		USER_FPCR(%a6),%d0	# ext prec/keep rnd mode
##	andi.l		&0x00000030,%d0
##	fmov.l		%d0,%fpcr
	fint.x		FP_SCR1(%a6),%fp0	# do fint()
	fmov.l	%fpsr,%d0
	or.w	%d0,FPSR_EXCEPT(%a6)
##	fmov.l		&0x0,%fpcr
##	fmov.l		%fpsr,%d0		# don't keep ccodes
##	or.w		%d0,FPSR_EXCEPT(%a6)

	mov.b	(%sp),USER_FPSR(%a6)
	add.l	&4,%sp

	mov.l	(%sp)+,L_SCR2(%a6)
	mov.l	(%sp)+,L_SCR1(%a6)
	movm.l	(%sp)+,&0x303	# restore regs used by sint	 {%d0-%d1/%a0-%a1}

	mov.l	L_SCR2(%a6),FP_SCR1(%a6)	# restore original exponent
	mov.l	L_SCR1(%a6),USER_FPCR(%a6)	# restore user's FPCR

# A13. Check for LEN digits.
#      If the int operation results in more than LEN digits,
#      or less than LEN -1 digits, adjust ILOG and repeat from
#      A6.  This test occurs only on the first pass.  If the
#      result is exactly 10^LEN, decrement ILOG and divide
#      the mantissa by 10.  The calculation of 10^LEN cannot
#      be inexact, since all powers of ten upto 10^27 are exact
#      in extended precision, so the use of a previous power-of-ten
#      table will introduce no error.
#
#
# Register usage:
#	Input/Output
#	d0: FPCR with size set to ext/scratch final = 0
#	d2: x/x
#	d3: x/scratch final = x
#	d4: LEN/LEN adjusted
#	d5: ICTR:LAMBDA/LAMBDA:ICTR
#	d6: ILOG/ILOG adjusted
#	d7: k-factor/Unchanged
#	a0: pointer into memory for packed bcd string formation
#	a1: ptr to PTENxx array/Unchanged
#	a2: ptr to FP_SCR1(a6)/Unchanged
#	fp0: int portion of Y/abs(YINT) adjusted
#	fp1: 10^ISCALE/Unchanged
#	fp2: x/10^LEN
#	F_SCR1:x/x
#	F_SCR2:Y with original exponent/Unchanged
#	L_SCR1:original USER_FPCR/Unchanged
#	L_SCR2:first word of X packed/Unchanged

A13_st:
	swap		%d5		# put ICTR in lower word of d5
	tst.w		%d5		# check if ICTR = 0
	bne		not_zr		# if non-zero, go to second test
#
# Compute 10^(LEN-1)
#
	fmov.s		FONE(%pc),%fp2	# init fp2 to 1.0
	mov.l		%d4,%d0		# put LEN in d0
	subq.l		&1,%d0		# d0 = LEN -1
	clr.l		%d3		# clr table index
l_loop:
	lsr.l		&1,%d0		# shift next bit into carry
	bcc.b		l_next		# if zero, skip the mul
	fmul.x		(%a1,%d3),%fp2	# mul by 10**(d3_bit_no)
l_next:
	add.l		&12,%d3		# inc d3 to next pwrten table entry
	tst.l		%d0		# test if LEN is zero
	bne.b		l_loop		# if not, loop
#
# 10^LEN-1 is computed for this test and A14.  If the input was
# denormalized, check only the case in which YINT > 10^LEN.
#
	tst.b		BINDEC_FLG(%a6)	# check if input was norm
	beq.b		A13_con		# if norm, continue with checking
	fabs.x		%fp0		# take abs of YINT
	bra		test_2
#
# Compare abs(YINT) to 10^(LEN-1) and 10^LEN
#
A13_con:
	fabs.x		%fp0		# take abs of YINT
	fcmp.x		%fp0,%fp2	# compare abs(YINT) with 10^(LEN-1)
	fbge.w		test_2		# if greater, do next test
	subq.l		&1,%d6		# subtract 1 from ILOG
	mov.w		&1,%d5		# set ICTR
	fmov.l		&rm_mode*0x10,%fpcr	# set rmode to RM
	fmul.s		FTEN(%pc),%fp2	# compute 10^LEN 
	bra.w		A6_str		# return to A6 and recompute YINT
test_2:
	fmul.s		FTEN(%pc),%fp2	# compute 10^LEN
	fcmp.x		%fp0,%fp2	# compare abs(YINT) with 10^LEN
	fblt.w		A14_st		# if less, all is ok, go to A14
	fbgt.w		fix_ex		# if greater, fix and redo
	fdiv.s		FTEN(%pc),%fp0	# if equal, divide by 10
	addq.l		&1,%d6		# and inc ILOG
	bra.b		A14_st		# and continue elsewhere
fix_ex:
	addq.l		&1,%d6		# increment ILOG by 1
	mov.w		&1,%d5		# set ICTR
	fmov.l		&rm_mode*0x10,%fpcr	# set rmode to RM
	bra.w		A6_str		# return to A6 and recompute YINT
#
# Since ICTR <> 0, we have already been through one adjustment, 
# and shouldn't have another; this is to check if abs(YINT) = 10^LEN
# 10^LEN is again computed using whatever table is in a1 since the
# value calculated cannot be inexact.
#
not_zr:
	fmov.s		FONE(%pc),%fp2	# init fp2 to 1.0
	mov.l		%d4,%d0		# put LEN in d0
	clr.l		%d3		# clr table index
z_loop:
	lsr.l		&1,%d0		# shift next bit into carry
	bcc.b		z_next		# if zero, skip the mul
	fmul.x		(%a1,%d3),%fp2	# mul by 10**(d3_bit_no)
z_next:
	add.l		&12,%d3		# inc d3 to next pwrten table entry
	tst.l		%d0		# test if LEN is zero
	bne.b		z_loop		# if not, loop
	fabs.x		%fp0		# get abs(YINT)
	fcmp.x		%fp0,%fp2	# check if abs(YINT) = 10^LEN
	fbneq.w		A14_st		# if not, skip this
	fdiv.s		FTEN(%pc),%fp0	# divide abs(YINT) by 10
	addq.l		&1,%d6		# and inc ILOG by 1
	addq.l		&1,%d4		# and inc LEN
	fmul.s		FTEN(%pc),%fp2	# if LEN++, the get 10^^LEN

# A14. Convert the mantissa to bcd.
#      The binstr routine is used to convert the LEN digit 
#      mantissa to bcd in memory.  The input to binstr is
#      to be a fraction; i.e. (mantissa)/10^LEN and adjusted
#      such that the decimal point is to the left of bit 63.
#      The bcd digits are stored in the correct position in 
#      the final string area in memory.
#
#
# Register usage:
#	Input/Output
#	d0: x/LEN call to binstr - final is 0
#	d1: x/0
#	d2: x/ms 32-bits of mant of abs(YINT)
#	d3: x/ls 32-bits of mant of abs(YINT)
#	d4: LEN/Unchanged
#	d5: ICTR:LAMBDA/LAMBDA:ICTR
#	d6: ILOG
#	d7: k-factor/Unchanged
#	a0: pointer into memory for packed bcd string formation
#	    /ptr to first mantissa byte in result string
#	a1: ptr to PTENxx array/Unchanged
#	a2: ptr to FP_SCR1(a6)/Unchanged
#	fp0: int portion of Y/abs(YINT) adjusted
#	fp1: 10^ISCALE/Unchanged
#	fp2: 10^LEN/Unchanged
#	F_SCR1:x/Work area for final result
#	F_SCR2:Y with original exponent/Unchanged
#	L_SCR1:original USER_FPCR/Unchanged
#	L_SCR2:first word of X packed/Unchanged

A14_st:
	fmov.l		&rz_mode*0x10,%fpcr	# force rz for conversion
	fdiv.x		%fp2,%fp0	# divide abs(YINT) by 10^LEN
	lea.l		FP_SCR0(%a6),%a0
	fmov.x		%fp0,(%a0)	# move abs(YINT)/10^LEN to memory
	mov.l		4(%a0),%d2	# move 2nd word of FP_RES to d2
	mov.l		8(%a0),%d3	# move 3rd word of FP_RES to d3
	clr.l		4(%a0)		# zero word 2 of FP_RES
	clr.l		8(%a0)		# zero word 3 of FP_RES
	mov.l		(%a0),%d0	# move exponent to d0
	swap		%d0		# put exponent in lower word
	beq.b		no_sft		# if zero, don't shift
	sub.l		&0x3ffd,%d0	# sub bias less 2 to make fract
	tst.l		%d0		# check if > 1
	bgt.b		no_sft		# if so, don't shift
	neg.l		%d0		# make exp positive
m_loop:
	lsr.l		&1,%d2		# shift d2:d3 right, add 0s 
	roxr.l		&1,%d3		# the number of places
	dbf.w		%d0,m_loop	# given in d0
no_sft:
	tst.l		%d2		# check for mantissa of zero
	bne.b		no_zr		# if not, go on
	tst.l		%d3		# continue zero check
	beq.b		zer_m		# if zero, go directly to binstr
no_zr:
	clr.l		%d1		# put zero in d1 for addx
	add.l		&0x00000080,%d3	# inc at bit 7
	addx.l		%d1,%d2		# continue inc
	and.l		&0xffffff80,%d3	# strip off lsb not used by 882
zer_m:
	mov.l		%d4,%d0		# put LEN in d0 for binstr call
	addq.l		&3,%a0		# a0 points to M16 byte in result
	bsr		binstr		# call binstr to convert mant


# A15. Convert the exponent to bcd.
#      As in A14 above, the exp is converted to bcd and the
#      digits are stored in the final string.
#
#      Digits are stored in L_SCR1(a6) on return from BINDEC as:
#
#  	 32               16 15                0
#	-----------------------------------------
#  	|  0 | e3 | e2 | e1 | e4 |  X |  X |  X |
#	-----------------------------------------
#
# And are moved into their proper places in FP_SCR0.  If digit e4
# is non-zero, OPERR is signaled.  In all cases, all 4 digits are
# written as specified in the 881/882 manual for packed decimal.
#
# Register usage:
#	Input/Output
#	d0: x/LEN call to binstr - final is 0
#	d1: x/scratch (0);shift count for final exponent packing
#	d2: x/ms 32-bits of exp fraction/scratch
#	d3: x/ls 32-bits of exp fraction
#	d4: LEN/Unchanged
#	d5: ICTR:LAMBDA/LAMBDA:ICTR
#	d6: ILOG
#	d7: k-factor/Unchanged
#	a0: ptr to result string/ptr to L_SCR1(a6)
#	a1: ptr to PTENxx array/Unchanged
#	a2: ptr to FP_SCR1(a6)/Unchanged
#	fp0: abs(YINT) adjusted/float(ILOG)
#	fp1: 10^ISCALE/Unchanged
#	fp2: 10^LEN/Unchanged
#	F_SCR1:Work area for final result/BCD result
#	F_SCR2:Y with original exponent/ILOG/10^4
#	L_SCR1:original USER_FPCR/Exponent digits on return from binstr
#	L_SCR2:first word of X packed/Unchanged

A15_st:
	tst.b		BINDEC_FLG(%a6)	# check for denorm
	beq.b		not_denorm
	ftest.x		%fp0		# test for zero
	fbeq.w		den_zero	# if zero, use k-factor or 4933
	fmov.l		%d6,%fp0	# float ILOG
	fabs.x		%fp0		# get abs of ILOG
	bra.b		convrt
den_zero:
	tst.l		%d7		# check sign of the k-factor
	blt.b		use_ilog	# if negative, use ILOG
	fmov.s		F4933(%pc),%fp0	# force exponent to 4933
	bra.b		convrt		# do it
use_ilog:
	fmov.l		%d6,%fp0	# float ILOG
	fabs.x		%fp0		# get abs of ILOG
	bra.b		convrt
not_denorm:
	ftest.x		%fp0		# test for zero
	fbneq.w		not_zero	# if zero, force exponent
	fmov.s		FONE(%pc),%fp0	# force exponent to 1
	bra.b		convrt		# do it
not_zero:
	fmov.l		%d6,%fp0	# float ILOG
	fabs.x		%fp0		# get abs of ILOG
convrt:
	fdiv.x		24(%a1),%fp0	# compute ILOG/10^4
	fmov.x		%fp0,FP_SCR1(%a6)	# store fp0 in memory
	mov.l		4(%a2),%d2	# move word 2 to d2
	mov.l		8(%a2),%d3	# move word 3 to d3
	mov.w		(%a2),%d0	# move exp to d0
	beq.b		x_loop_fin	# if zero, skip the shift
	sub.w		&0x3ffd,%d0	# subtract off bias
	neg.w		%d0		# make exp positive
x_loop:
	lsr.l		&1,%d2		# shift d2:d3 right 
	roxr.l		&1,%d3		# the number of places
	dbf.w		%d0,x_loop	# given in d0
x_loop_fin:
	clr.l		%d1		# put zero in d1 for addx
	add.l		&0x00000080,%d3	# inc at bit 6
	addx.l		%d1,%d2		# continue inc
	and.l		&0xffffff80,%d3	# strip off lsb not used by 882
	mov.l		&4,%d0		# put 4 in d0 for binstr call
	lea.l		L_SCR1(%a6),%a0	# a0 is ptr to L_SCR1 for exp digits
	bsr		binstr		# call binstr to convert exp
	mov.l		L_SCR1(%a6),%d0	# load L_SCR1 lword to d0 
	mov.l		&12,%d1		# use d1 for shift count
	lsr.l		%d1,%d0		# shift d0 right by 12
	bfins		%d0,FP_SCR0(%a6){&4:&12}	# put e3:e2:e1 in FP_SCR0
	lsr.l		%d1,%d0		# shift d0 right by 12
	bfins		%d0,FP_SCR0(%a6){&16:&4}	# put e4 in FP_SCR0 
	tst.b		%d0		# check if e4 is zero
	beq.b		A16_st		# if zero, skip rest
	or.l		&opaop_mask,USER_FPSR(%a6)	# set OPERR & AIOP in USER_FPSR


# A16. Write sign bits to final string.
#	   Sigma is bit 31 of initial value; RHO is bit 31 of d6 (ILOG).
#
# Register usage:
#	Input/Output
#	d0: x/scratch - final is x
#	d2: x/x
#	d3: x/x
#	d4: LEN/Unchanged
#	d5: ICTR:LAMBDA/LAMBDA:ICTR
#	d6: ILOG/ILOG adjusted
#	d7: k-factor/Unchanged
#	a0: ptr to L_SCR1(a6)/Unchanged
#	a1: ptr to PTENxx array/Unchanged
#	a2: ptr to FP_SCR1(a6)/Unchanged
#	fp0: float(ILOG)/Unchanged
#	fp1: 10^ISCALE/Unchanged
#	fp2: 10^LEN/Unchanged
#	F_SCR1:BCD result with correct signs
#	F_SCR2:ILOG/10^4
#	L_SCR1:Exponent digits on return from binstr
#	L_SCR2:first word of X packed/Unchanged

A16_st:
	clr.l		%d0		# clr d0 for collection of signs
	and.b		&0x0f,FP_SCR0(%a6)	# clear first nibble of FP_SCR0 
	tst.l		L_SCR2(%a6)	# check sign of original mantissa
	bge.b		mant_p		# if pos, don't set SM
	mov.l		&2,%d0		# move 2 in to d0 for SM
mant_p:
	tst.l		%d6		# check sign of ILOG
	bge.b		wr_sgn		# if pos, don't set SE
	addq.l		&1,%d0		# set bit 0 in d0 for SE 
wr_sgn:
	bfins		%d0,FP_SCR0(%a6){&0:&2}	# insert SM and SE into FP_SCR0

# Clean up and restore all registers used.

	fmov.l		&0,%fpsr	# clear possible inex2/ainex bits
	fmovm.x		(%sp)+,&0xe0	#  {%fp0-%fp2}
	movm.l		(%sp)+,&0x4fc	#  {%d2-%d7/%a2}
	rts

	global		PTENRN
PTENRN:
	long		0x40020000,0xA0000000,0x00000000	# 10 ^ 1
	long		0x40050000,0xC8000000,0x00000000	# 10 ^ 2
	long		0x400C0000,0x9C400000,0x00000000	# 10 ^ 4
	long		0x40190000,0xBEBC2000,0x00000000	# 10 ^ 8
	long		0x40340000,0x8E1BC9BF,0x04000000	# 10 ^ 16
	long		0x40690000,0x9DC5ADA8,0x2B70B59E	# 10 ^ 32
	long		0x40D30000,0xC2781F49,0xFFCFA6D5	# 10 ^ 64
	long		0x41A80000,0x93BA47C9,0x80E98CE0	# 10 ^ 128
	long		0x43510000,0xAA7EEBFB,0x9DF9DE8E	# 10 ^ 256
	long		0x46A30000,0xE319A0AE,0xA60E91C7	# 10 ^ 512
	long		0x4D480000,0xC9767586,0x81750C17	# 10 ^ 1024
	long		0x5A920000,0x9E8B3B5D,0xC53D5DE5	# 10 ^ 2048
	long		0x75250000,0xC4605202,0x8A20979B	# 10 ^ 4096

	global		PTENRP
PTENRP:
	long		0x40020000,0xA0000000,0x00000000	# 10 ^ 1
	long		0x40050000,0xC8000000,0x00000000	# 10 ^ 2
	long		0x400C0000,0x9C400000,0x00000000	# 10 ^ 4
	long		0x40190000,0xBEBC2000,0x00000000	# 10 ^ 8
	long		0x40340000,0x8E1BC9BF,0x04000000	# 10 ^ 16
	long		0x40690000,0x9DC5ADA8,0x2B70B59E	# 10 ^ 32
	long		0x40D30000,0xC2781F49,0xFFCFA6D6	# 10 ^ 64
	long		0x41A80000,0x93BA47C9,0x80E98CE0	# 10 ^ 128
	long		0x43510000,0xAA7EEBFB,0x9DF9DE8E	# 10 ^ 256
	long		0x46A30000,0xE319A0AE,0xA60E91C7	# 10 ^ 512
	long		0x4D480000,0xC9767586,0x81750C18	# 10 ^ 1024
	long		0x5A920000,0x9E8B3B5D,0xC53D5DE5	# 10 ^ 2048
	long		0x75250000,0xC4605202,0x8A20979B	# 10 ^ 4096

	global		PTENRM
PTENRM:
	long		0x40020000,0xA0000000,0x00000000	# 10 ^ 1
	long		0x40050000,0xC8000000,0x00000000	# 10 ^ 2
	long		0x400C0000,0x9C400000,0x00000000	# 10 ^ 4
	long		0x40190000,0xBEBC2000,0x00000000	# 10 ^ 8
	long		0x40340000,0x8E1BC9BF,0x04000000	# 10 ^ 16
	long		0x40690000,0x9DC5ADA8,0x2B70B59D	# 10 ^ 32
	long		0x40D30000,0xC2781F49,0xFFCFA6D5	# 10 ^ 64
	long		0x41A80000,0x93BA47C9,0x80E98CDF	# 10 ^ 128
	long		0x43510000,0xAA7EEBFB,0x9DF9DE8D	# 10 ^ 256
	long		0x46A30000,0xE319A0AE,0xA60E91C6	# 10 ^ 512
	long		0x4D480000,0xC9767586,0x81750C17	# 10 ^ 1024
	long		0x5A920000,0x9E8B3B5D,0xC53D5DE4	# 10 ^ 2048
	long		0x75250000,0xC4605202,0x8A20979A	# 10 ^ 4096

#########################################################################
# binstr(): Converts a 64-bit binary integer to bcd.			#
#									#
# INPUT *************************************************************** #
#	d2:d3 = 64-bit binary integer					#
#	d0    = desired length (LEN)					#
#	a0    = pointer to start in memory for bcd characters		#
#          	(This pointer must point to byte 4 of the first		#
#          	 lword of the packed decimal memory string.)		#
#									#
# OUTPUT ************************************************************** #
#	a0 = pointer to LEN bcd digits representing the 64-bit integer.	#
#									#
# ALGORITHM ***********************************************************	#
#	The 64-bit binary is assumed to have a decimal point before	#
#	bit 63.  The fraction is multiplied by 10 using a mul by 2	#
#	shift and a mul by 8 shift.  The bits shifted out of the	#
#	msb form a decimal digit.  This process is iterated until	#
#	LEN digits are formed.						#
#									#
# A1. Init d7 to 1.  D7 is the byte digit counter, and if 1, the	#
#     digit formed will be assumed the least significant.  This is	#
#     to force the first byte formed to have a 0 in the upper 4 bits.	#
#									#
# A2. Beginning of the loop:						#
#     Copy the fraction in d2:d3 to d4:d5.				#
#									#
# A3. Multiply the fraction in d2:d3 by 8 using bit-field		#
#     extracts and shifts.  The three msbs from d2 will go into d1.	#
#									#
# A4. Multiply the fraction in d4:d5 by 2 using shifts.  The msb	#
#     will be collected by the carry.					#
#									#
# A5. Add using the carry the 64-bit quantities in d2:d3 and d4:d5	#
#     into d2:d3.  D1 will contain the bcd digit formed.		#
#									#
# A6. Test d7.  If zero, the digit formed is the ms digit.  If non-	#
#     zero, it is the ls digit.  Put the digit in its place in the	#
#     upper word of d0.  If it is the ls digit, write the word		#
#     from d0 to memory.						#
#									#
# A7. Decrement d6 (LEN counter) and repeat the loop until zero.	#
#									#
#########################################################################

#	Implementation Notes:
#
#	The registers are used as follows:
#
#		d0: LEN counter
#		d1: temp used to form the digit
#		d2: upper 32-bits of fraction for mul by 8
#		d3: lower 32-bits of fraction for mul by 8
#		d4: upper 32-bits of fraction for mul by 2
#		d5: lower 32-bits of fraction for mul by 2
#		d6: temp for bit-field extracts
#		d7: byte digit formation word;digit count {0,1}
#		a0: pointer into memory for packed bcd string formation
#

	global		binstr
binstr:
	movm.l		&0xff00,-(%sp)	#  {%d0-%d7}

#
# A1: Init d7
#
	mov.l		&1,%d7		# init d7 for second digit
	subq.l		&1,%d0		# for dbf d0 would have LEN+1 passes
#
# A2. Copy d2:d3 to d4:d5.  Start loop.
#
loop:
	mov.l		%d2,%d4		# copy the fraction before muls
	mov.l		%d3,%d5		# to d4:d5
#
# A3. Multiply d2:d3 by 8; extract msbs into d1.
#
	bfextu		%d2{&0:&3},%d1	# copy 3 msbs of d2 into d1
	asl.l		&3,%d2		# shift d2 left by 3 places
	bfextu		%d3{&0:&3},%d6	# copy 3 msbs of d3 into d6
	asl.l		&3,%d3		# shift d3 left by 3 places
	or.l		%d6,%d2		# or in msbs from d3 into d2
#
# A4. Multiply d4:d5 by 2; add carry out to d1.
#
	asl.l		&1,%d5		# mul d5 by 2
	roxl.l		&1,%d4		# mul d4 by 2
	swap		%d6		# put 0 in d6 lower word
	addx.w		%d6,%d1		# add in extend from mul by 2
#
# A5. Add mul by 8 to mul by 2.  D1 contains the digit formed.
#
	add.l		%d5,%d3		# add lower 32 bits
	nop				# ERRATA FIX #13 (Rev. 1.2 6/6/90)
	addx.l		%d4,%d2		# add with extend upper 32 bits
	nop				# ERRATA FIX #13 (Rev. 1.2 6/6/90)
	addx.w		%d6,%d1		# add in extend from add to d1
	swap		%d6		# with d6 = 0; put 0 in upper word
#
# A6. Test d7 and branch.
#
	tst.w		%d7		# if zero, store digit & to loop
	beq.b		first_d		# if non-zero, form byte & write
sec_d:
	swap		%d7		# bring first digit to word d7b
	asl.w		&4,%d7		# first digit in upper 4 bits d7b
	add.w		%d1,%d7		# add in ls digit to d7b
	mov.b		%d7,(%a0)+	# store d7b byte in memory
	swap		%d7		# put LEN counter in word d7a
	clr.w		%d7		# set d7a to signal no digits done
	dbf.w		%d0,loop	# do loop some more!
	bra.b		end_bstr	# finished, so exit
first_d:
	swap		%d7		# put digit word in d7b
	mov.w		%d1,%d7		# put new digit in d7b
	swap		%d7		# put LEN counter in word d7a
	addq.w		&1,%d7		# set d7a to signal first digit done
	dbf.w		%d0,loop	# do loop some more!
	swap		%d7		# put last digit in string
	lsl.w		&4,%d7		# move it to upper 4 bits
	mov.b		%d7,(%a0)+	# store it in memory string
#
# Clean up and return with result in fp0.
#
end_bstr:
	movm.l		(%sp)+,&0xff	#  {%d0-%d7}
	rts

#########################################################################
# XDEF ****************************************************************	#
#	facc_in_b(): dmem_read_byte failed				#
#	facc_in_w(): dmem_read_word failed				#
#	facc_in_l(): dmem_read_long failed				#
#	facc_in_d(): dmem_read of dbl prec failed			#
#	facc_in_x(): dmem_read of ext prec failed			#
#									#
#	facc_out_b(): dmem_write_byte failed				#
#	facc_out_w(): dmem_write_word failed				#
#	facc_out_l(): dmem_write_long failed				#
#	facc_out_d(): dmem_write of dbl prec failed			#
#	facc_out_x(): dmem_write of ext prec failed			#
#									#
# XREF ****************************************************************	#
#	_real_access() - exit through access error handler		#
#									#
# INPUT ***************************************************************	#
#	None								#
# 									#
# OUTPUT **************************************************************	#
#	None								#
#									#
# ALGORITHM ***********************************************************	#
# 	Flow jumps here when an FP data fetch call gets an error 	#
# result. This means the operating system wants an access error frame	#
# made out of the current exception stack frame. 			#
#	So, we first call restore() which makes sure that any updated	#
# -(an)+ register gets returned to its pre-exception value and then	#
# we change the stack to an access error stack frame.			#
#									#
#########################################################################

facc_in_b:
	movq.l		&0x1,%d0			# one byte
	bsr.w		restore				# fix An

	mov.w		&0x0121,EXC_VOFF(%a6)		# set FSLW
	bra.w		facc_finish

facc_in_w:
	movq.l		&0x2,%d0			# two bytes
	bsr.w		restore				# fix An

	mov.w		&0x0141,EXC_VOFF(%a6)		# set FSLW
	bra.b		facc_finish

facc_in_l:
	movq.l		&0x4,%d0			# four bytes
	bsr.w		restore				# fix An

	mov.w		&0x0101,EXC_VOFF(%a6)		# set FSLW
	bra.b		facc_finish

facc_in_d:
	movq.l		&0x8,%d0			# eight bytes
	bsr.w		restore				# fix An

	mov.w		&0x0161,EXC_VOFF(%a6)		# set FSLW
	bra.b		facc_finish

facc_in_x:
	movq.l		&0xc,%d0			# twelve bytes
	bsr.w		restore				# fix An

	mov.w		&0x0161,EXC_VOFF(%a6)		# set FSLW
	bra.b		facc_finish

################################################################

facc_out_b:
	movq.l		&0x1,%d0			# one byte
	bsr.w		restore				# restore An

	mov.w		&0x00a1,EXC_VOFF(%a6)		# set FSLW
	bra.b		facc_finish

facc_out_w:
	movq.l		&0x2,%d0			# two bytes
	bsr.w		restore				# restore An

	mov.w		&0x00c1,EXC_VOFF(%a6)		# set FSLW
	bra.b		facc_finish

facc_out_l:
	movq.l		&0x4,%d0			# four bytes
	bsr.w		restore				# restore An

	mov.w		&0x0081,EXC_VOFF(%a6)		# set FSLW
	bra.b		facc_finish

facc_out_d:
	movq.l		&0x8,%d0			# eight bytes
	bsr.w		restore				# restore An

	mov.w		&0x00e1,EXC_VOFF(%a6)		# set FSLW
	bra.b		facc_finish

facc_out_x:
	mov.l		&0xc,%d0			# twelve bytes
	bsr.w		restore				# restore An

	mov.w		&0x00e1,EXC_VOFF(%a6)		# set FSLW

# here's where we actually create the access error frame from the
# current exception stack frame.
facc_finish:
	mov.l		USER_FPIAR(%a6),EXC_PC(%a6) # store current PC

	fmovm.x		EXC_FPREGS(%a6),&0xc0	# restore fp0-fp1
	fmovm.l		USER_FPCR(%a6),%fpcr,%fpsr,%fpiar # restore ctrl regs
	movm.l		EXC_DREGS(%a6),&0x0303	# restore d0-d1/a0-a1

	unlk		%a6

	mov.l		(%sp),-(%sp)		# store SR, hi(PC)
	mov.l		0x8(%sp),0x4(%sp)	# store lo(PC)
	mov.l		0xc(%sp),0x8(%sp)	# store EA
	mov.l		&0x00000001,0xc(%sp)	# store FSLW
	mov.w		0x6(%sp),0xc(%sp)	# fix FSLW (size)
	mov.w		&0x4008,0x6(%sp)	# store voff

	btst		&0x5,(%sp)		# supervisor or user mode?
	beq.b		facc_out2		# user
	bset		&0x2,0xd(%sp)		# set supervisor TM bit

facc_out2:
	bra.l		_real_access

##################################################################

# if the effective addressing mode was predecrement or postincrement,
# the emulation has already changed its value to the correct post-
# instruction value. but since we're exiting to the access error
# handler, then AN must be returned to its pre-instruction value.
# we do that here.
restore:
	mov.b		EXC_OPWORD+0x1(%a6),%d1
	andi.b		&0x38,%d1		# extract opmode
	cmpi.b		%d1,&0x18		# postinc?
	beq.w		rest_inc
	cmpi.b		%d1,&0x20		# predec?
	beq.w		rest_dec
	rts

rest_inc:
	mov.b		EXC_OPWORD+0x1(%a6),%d1
	andi.w		&0x0007,%d1		# fetch An

	mov.w		(tbl_rest_inc.b,%pc,%d1.w*2),%d1
	jmp		(tbl_rest_inc.b,%pc,%d1.w*1)

tbl_rest_inc:
	short		ri_a0 - tbl_rest_inc
	short		ri_a1 - tbl_rest_inc
	short		ri_a2 - tbl_rest_inc
	short		ri_a3 - tbl_rest_inc
	short		ri_a4 - tbl_rest_inc
	short		ri_a5 - tbl_rest_inc
	short		ri_a6 - tbl_rest_inc
	short		ri_a7 - tbl_rest_inc

ri_a0:
	sub.l		%d0,EXC_DREGS+0x8(%a6)	# fix stacked a0
	rts
ri_a1:
	sub.l		%d0,EXC_DREGS+0xc(%a6)	# fix stacked a1
	rts
ri_a2:
	sub.l		%d0,%a2			# fix a2
	rts
ri_a3:
	sub.l		%d0,%a3			# fix a3
	rts
ri_a4:
	sub.l		%d0,%a4			# fix a4
	rts
ri_a5:
	sub.l		%d0,%a5			# fix a5
	rts
ri_a6:
	sub.l		%d0,(%a6)		# fix stacked a6
	rts
# if it's a fmove out instruction, we don't have to fix a7
# because we hadn't changed it yet. if it's an opclass two
# instruction (data moved in) and the exception was in supervisor
# mode, then also also wasn't updated. if it was user mode, then
# restore the correct a7 which is in the USP currently.
ri_a7:
	cmpi.b		EXC_VOFF(%a6),&0x30	# move in or out?
	bne.b		ri_a7_done		# out

	btst		&0x5,EXC_SR(%a6)	# user or supervisor?
	bne.b		ri_a7_done		# supervisor
	movc		%usp,%a0		# restore USP
	sub.l		%d0,%a0
	movc		%a0,%usp	
ri_a7_done:
	rts

# need to invert adjustment value if the <ea> was predec
rest_dec:
	neg.l		%d0
	bra.b		rest_inc
~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
MOTOROLA MICROPROCESSOR & MEMORY TECHNOLOGY GROUP
M68000 Hi-Performance Microprocessor Division
M68060 Software Package
Production Release P1.00 -- October 10, 1994

M68060 Software Package Copyright � 1993, 1994 Motorola Inc.  All rights reserved.
 
THE SOFTWARE is provided on an "AS IS" basis and without warranty.
To the maximum extent permitted by applicable law,
MOTOROLA DISCLAIMS ALL WARRANTIES WHETHER EXPRESS OR IMPLIED, 
INCLUDING IMPLIED WARRANTIES OF MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE
and any warranty against infringement with regard to the SOFTWARE
(INCLUDING ANY MODIFIED VERSIONS THEREOF) and any accompanying written materials.

To the maximum extent permitted by applicable law,
IN NO EVENT SHALL MOTOROLA BE LIABLE FOR ANY DAMAGES WHATSOEVER
(INCLUDING WITHOUT LIMITATION, DAMAGES FOR LOSS OF BUSINESS PROFITS,
BUSINESS INTERRUPTION, LOSS OF BUSINESS INFORMATION, OR OTHER PECUNIARY LOSS)
ARISING OF THE USE OR INABILITY TO USE THE SOFTWARE.
Motorola assumes no responsibility for the maintenance and support of the SOFTWARE.

You are hereby granted a copyright license to use, modify, and distribute the SOFTWARE
so long as this entire notice is retained without alteration in any modified and/or
redistributed versions, and that such modified versions are clearly identified as such.
No licenses are granted by implication, estoppel or otherwise under any patents
or trademarks of Motorola, Inc.
~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
#############################################
set	SREGS,		-64
set	IREGS,		-128
set	IFPREGS,	-224
set	SFPREGS,	-320
set	IFPCREGS,	-332
set	SFPCREGS,	-344
set	ICCR,		-346
set	SCCR,		-348
set	TESTCTR,	-352
set	DATA,		-384

#############################################
TESTTOP:
	bra.l		_060TESTS_
	short		0x0000

	bra.l		_060TESTS_unimp
	short		0x0000

	bra.l		_060TESTS_enable
	short		0x0000

start_str:
	string		"Testing 68060 FPSP started:\n"

start_str_unimp:
	string		"Testing 68060 FPSP unimplemented instruction started:\n"

start_str_enable:
	string		"Testing 68060 FPSP exception enabled started:\n"

pass_str:
	string		"passed\n"

fail_str:
	string		" failed\n"

	align		0x4
chk_test:
	tst.l		%d0
	bne.b		test_fail
test_pass:
	pea		pass_str(%pc)
	bsr.l		_print_str
	addq.l		&0x4,%sp
	rts
test_fail:
	mov.l		%d1,-(%sp)
	bsr.l		_print_num
	addq.l		&0x4,%sp

	pea		fail_str(%pc)
	bsr.l		_print_str
	addq.l		&0x4,%sp
	rts

#############################################
_060TESTS_:
	link		%a6,&-384
	
	movm.l		&0x3f3c,-(%sp)
	fmovm.x		&0xff,-(%sp)

	pea		start_str(%pc)
	bsr.l		_print_str
	addq.l		&0x4,%sp

### effadd
	clr.l		TESTCTR(%a6)
	pea		effadd_str(%pc)
	bsr.l		_print_str
	addq.l		&0x4,%sp

	bsr.l		effadd_0

	bsr.l		chk_test

### unsupp
	clr.l		TESTCTR(%a6)
	pea		unsupp_str(%pc)
	bsr.l		_print_str
	addq.l		&0x4,%sp

	bsr.l		unsupp_0

	bsr.l		chk_test

### ovfl non-maskable
	clr.l		TESTCTR(%a6)
	pea		ovfl_nm_str(%pc)
	bsr.l		_print_str
	bsr.l		ovfl_nm_0

	bsr.l		chk_test

### unfl non-maskable
	clr.l		TESTCTR(%a6)
	pea		unfl_nm_str(%pc)
	bsr.l		_print_str
	bsr.l		unfl_nm_0

	bsr.l		chk_test

	movm.l		(%sp)+,&0x3cfc
	fmovm.x		(%sp)+,&0xff

	unlk		%a6
	rts

_060TESTS_unimp:
	link		%a6,&-384
	
	movm.l		&0x3f3c,-(%sp)
	fmovm.x		&0xff,-(%sp)

	pea		start_str_unimp(%pc)
	bsr.l		_print_str
	addq.l		&0x4,%sp

### unimp
	clr.l		TESTCTR(%a6)
	pea		unimp_str(%pc)
	bsr.l		_print_str
	addq.l		&0x4,%sp

	bsr.l		unimp_0

	bsr.l		chk_test

	movm.l		(%sp)+,&0x3cfc
	fmovm.x		(%sp)+,&0xff

	unlk		%a6
	rts

_060TESTS_enable:
	link		%a6,&-384
	
	movm.l		&0x3f3c,-(%sp)
	fmovm.x		&0xff,-(%sp)

	pea		start_str_enable(%pc)
	bsr.l		_print_str
	addq.l		&0x4,%sp

### snan
	clr.l		TESTCTR(%a6)
	pea		snan_str(%pc)
	bsr.l		_print_str
	bsr.l		snan_0

	bsr.l		chk_test

### operr
	clr.l		TESTCTR(%a6)
	pea		operr_str(%pc)
	bsr.l		_print_str
	bsr.l		operr_0

	bsr.l		chk_test

### ovfl
	clr.l		TESTCTR(%a6)
	pea		ovfl_str(%pc)
	bsr.l		_print_str
	bsr.l		ovfl_0

	bsr.l		chk_test

### unfl
	clr.l		TESTCTR(%a6)
	pea		unfl_str(%pc)
	bsr.l		_print_str
	bsr.l		unfl_0

	bsr.l		chk_test

### dz
	clr.l		TESTCTR(%a6)
	pea		dz_str(%pc)
	bsr.l		_print_str
	bsr.l		dz_0

	bsr.l		chk_test

### inexact
	clr.l		TESTCTR(%a6)
	pea		inex_str(%pc)
	bsr.l		_print_str
	bsr.l		inex_0

	bsr.l		chk_test

	movm.l		(%sp)+,&0x3cfc
	fmovm.x		(%sp)+,&0xff

	unlk		%a6
	rts

#############################################
#############################################

unimp_str:
	string		"\tUnimplemented FP instructions..."

	align		0x4
unimp_0:
	addq.l		&0x1,TESTCTR(%a6)

	movm.l		DEF_REGS(%pc),&0x3fff
	fmovm.x		DEF_FPREGS(%pc),&0xff
	fmovm.l		DEF_FPCREGS(%pc),%fpcr,%fpsr,%fpiar

	mov.w		&0x0000,ICCR(%a6)
	movm.l		&0x7fff,IREGS(%a6)
	fmovm.x		&0xff,IFPREGS(%a6)
	fmovm.l		%fpcr,%fpsr,%fpiar,IFPCREGS(%a6)

	mov.l		&0x40000000,DATA+0x0(%a6)
	mov.l		&0xc90fdaa2,DATA+0x4(%a6)
	mov.l		&0x2168c235,DATA+0x8(%a6)

	mov.w		&0x0000,%cc
unimp_0_pc:
	fsin.x		DATA(%a6),%fp0

	mov.w		%cc,SCCR(%a6)
	movm.l		&0x7fff,SREGS(%a6)
	fmovm.x		&0xff,SFPREGS(%a6)
	fmovm.l		%fpcr,%fpsr,%fpiar,SFPCREGS(%a6)

	mov.l		&0xbfbf0000,IFPREGS+0x0(%a6)
	mov.l		&0x80000000,IFPREGS+0x4(%a6)
	mov.l		&0x00000000,IFPREGS+0x8(%a6)
	mov.l		&0x08000208,IFPCREGS+0x4(%a6)
	lea		unimp_0_pc(%pc),%a0
	mov.l		%a0,IFPCREGS+0x8(%a6)

	bsr.l		chkregs
	tst.b		%d0
	bne.l		error

	bsr.l		chkfpregs
	tst.b		%d0
	bne.l		error

unimp_1:
	addq.l		&0x1,TESTCTR(%a6)

	movm.l		DEF_REGS(%pc),&0x3fff
	fmovm.x		DEF_FPREGS(%pc),&0xff
	fmovm.l		DEF_FPCREGS(%pc),%fpcr,%fpsr,%fpiar

	mov.w		&0x0000,ICCR(%a6)
	movm.l		&0x7fff,IREGS(%a6)
	fmovm.x		&0xff,IFPREGS(%a6)
	fmovm.l		%fpcr,%fpsr,%fpiar,IFPCREGS(%a6)

	mov.l		&0x3ffe0000,DATA+0x0(%a6)
	mov.l		&0xc90fdaa2,DATA+0x4(%a6)
	mov.l		&0x2168c235,DATA+0x8(%a6)

	mov.w		&0x0000,%cc
unimp_1_pc:
	ftan.x		DATA(%a6),%fp0

	mov.w		%cc,SCCR(%a6)
	movm.l		&0x7fff,SREGS(%a6)
	fmovm.x		&0xff,SFPREGS(%a6)
	fmovm.l		%fpcr,%fpsr,%fpiar,SFPCREGS(%a6)

	mov.l		&0x3fff0000,IFPREGS+0x0(%a6)
	mov.l		&0x80000000,IFPREGS+0x4(%a6)
	mov.l		&0x00000000,IFPREGS+0x8(%a6)
	mov.l		&0x00000208,IFPCREGS+0x4(%a6)
	lea		unimp_1_pc(%pc),%a0
	mov.l		%a0,IFPCREGS+0x8(%a6)

	bsr.l		chkregs
	tst.b		%d0
	bne.l		error

	bsr.l		chkfpregs
	tst.b		%d0
	bne.l		error

# fmovecr
unimp_2:
	addq.l		&0x1,TESTCTR(%a6)

	movm.l		DEF_REGS(%pc),&0x3fff
	fmovm.x		DEF_FPREGS(%pc),&0xff
	fmovm.l		DEF_FPCREGS(%pc),%fpcr,%fpsr,%fpiar

	mov.w		&0x0000,ICCR(%a6)
	movm.l		&0x7fff,IREGS(%a6)
	fmovm.x		&0xff,IFPREGS(%a6)
	fmovm.l		%fpcr,%fpsr,%fpiar,IFPCREGS(%a6)

	mov.w		&0x0000,%cc
unimp_2_pc:
	fmovcr.x	&0x31,%fp0

	mov.w		%cc,SCCR(%a6)
	movm.l		&0x7fff,SREGS(%a6)
	fmovm.x		&0xff,SFPREGS(%a6)
	fmovm.l		%fpcr,%fpsr,%fpiar,SFPCREGS(%a6)

	mov.l		&0x40000000,IFPREGS+0x0(%a6)
	mov.l		&0x935d8ddd,IFPREGS+0x4(%a6)
	mov.l		&0xaaa8ac17,IFPREGS+0x8(%a6)
	mov.l		&0x00000208,IFPCREGS+0x4(%a6)
	lea		unimp_2_pc(%pc),%a0
	mov.l		%a0,IFPCREGS+0x8(%a6)

	bsr.l		chkregs
	tst.b		%d0
	bne.l		error

	bsr.l		chkfpregs
	tst.b		%d0
	bne.l		error

# fscc
unimp_3:
	addq.l		&0x1,TESTCTR(%a6)

	movm.l		DEF_REGS(%pc),&0x3fff
	fmovm.x		DEF_FPREGS(%pc),&0xff
	fmovm.l		DEF_FPCREGS(%pc),%fpcr,%fpsr,%fpiar

	fmov.l		&0x0f000000,%fpsr
	mov.l		&0x00,%d7

	mov.w		&0x0000,ICCR(%a6)
	movm.l		&0x7fff,IREGS(%a6)
	fmovm.x		&0xff,IFPREGS(%a6)
	fmovm.l		%fpcr,%fpsr,%fpiar,IFPCREGS(%a6)

	mov.w		&0x0000,%cc
unimp_3_pc:
	fsgt		%d7

	mov.w		%cc,SCCR(%a6)
	movm.l		&0x7fff,SREGS(%a6)
	fmovm.x		&0xff,SFPREGS(%a6)
	fmovm.l		%fpcr,%fpsr,%fpiar,SFPCREGS(%a6)
	mov.l		&0x0f008080,IFPCREGS+0x4(%a6)
	lea		unimp_3_pc(%pc),%a0
	mov.l		%a0,IFPCREGS+0x8(%a6)

	bsr.l		chkregs
	tst.b		%d0
	bne.l		error

	bsr.l		chkfpregs
	tst.b		%d0
	bne.l		error

# fdbcc
unimp_4:
	addq.l		&0x1,TESTCTR(%a6)

	movm.l		DEF_REGS(%pc),&0x3fff
	fmovm.x		DEF_FPREGS(%pc),&0xff
	fmovm.l		DEF_FPCREGS(%pc),%fpcr,%fpsr,%fpiar

	fmov.l		&0x0f000000,%fpsr
	mov.l		&0x2,%d7

	mov.w		&0x0000,ICCR(%a6)
	movm.l		&0x7fff,IREGS(%a6)
	fmovm.x		&0xff,IFPREGS(%a6)
	fmovm.l		%fpcr,%fpsr,%fpiar,IFPCREGS(%a6)

	mov.w		&0x0000,%cc
unimp_4_pc:
	fdbgt.w		%d7,unimp_4_pc

	mov.w		%cc,SCCR(%a6)
	movm.l		&0x7fff,SREGS(%a6)
	fmovm.x		&0xff,SFPREGS(%a6)
	fmovm.l		%fpcr,%fpsr,%fpiar,SFPCREGS(%a6)
	mov.w		&0xffff,IREGS+28+2(%a6)
	mov.l		&0x0f008080,IFPCREGS+0x4(%a6)
	lea		unimp_4_pc(%pc),%a0
	mov.l		%a0,IFPCREGS+0x8(%a6)

	bsr.l		chkregs
	tst.b		%d0
	bne.l		error

	bsr.l		chkfpregs
	tst.b		%d0
	bne.l		error

# ftrapcc
unimp_5:
	addq.l		&0x1,TESTCTR(%a6)

	movm.l		DEF_REGS(%pc),&0x3fff
	fmovm.x		DEF_FPREGS(%pc),&0xff
	fmovm.l		DEF_FPCREGS(%pc),%fpcr,%fpsr,%fpiar

	fmov.l		&0x0f000000,%fpsr

	mov.w		&0x0000,ICCR(%a6)
	movm.l		&0x7fff,IREGS(%a6)
	fmovm.x		&0xff,IFPREGS(%a6)
	fmovm.l		%fpcr,%fpsr,%fpiar,IFPCREGS(%a6)

	mov.w		&0x0000,%cc
unimp_5_pc:
	ftpgt.l		&0xabcdef01

	mov.w		%cc,SCCR(%a6)
	movm.l		&0x7fff,SREGS(%a6)
	fmovm.x		&0xff,SFPREGS(%a6)
	fmovm.l		%fpcr,%fpsr,%fpiar,SFPCREGS(%a6)
	mov.l		&0x0f008080,IFPCREGS+0x4(%a6)
	lea		unimp_5_pc(%pc),%a0
	mov.l		%a0,IFPCREGS+0x8(%a6)

	bsr.l		chkregs
	tst.b		%d0
	bne.l		error

	bsr.l		chkfpregs
	tst.b		%d0
	bne.l		error

	clr.l		%d0
	rts

#############################################

effadd_str:
	string		"\tUnimplemented <ea>..."

	align		0x4
effadd_0:
	addq.l		&0x1,TESTCTR(%a6)

	movm.l		DEF_REGS(%pc),&0x3fff
	fmovm.x		DEF_FPREGS(%pc),&0xff
	fmovm.l		DEF_FPCREGS(%pc),%fpcr,%fpsr,%fpiar

	mov.w		&0x0000,ICCR(%a6)
	movm.l		&0x7fff,IREGS(%a6)
	fmovm.x		&0xff,IFPREGS(%a6)
	fmovm.l		%fpcr,%fpsr,%fpiar,IFPCREGS(%a6)

	fmov.b		&0x2,%fp0

	mov.w		&0x0000,%cc
effadd_0_pc:
	fmul.x		&0xc00000008000000000000000,%fp0

	mov.w		%cc,SCCR(%a6)
	movm.l		&0x7fff,SREGS(%a6)
	fmovm.x		&0xff,SFPREGS(%a6)
	fmovm.l		%fpcr,%fpsr,%fpiar,SFPCREGS(%a6)

	mov.l		&0xc0010000,IFPREGS+0x0(%a6)
	mov.l		&0x80000000,IFPREGS+0x4(%a6)
	mov.l		&0x00000000,IFPREGS+0x8(%a6)
	mov.l		&0x08000000,IFPCREGS+0x4(%a6)
	lea		effadd_0_pc(%pc),%a0
	mov.l		%a0,IFPCREGS+0x8(%a6)

	bsr.l		chkregs
	tst.b		%d0
	bne.l		error

	bsr.l		chkfpregs
	tst.b		%d0
	bne.l		error

effadd_1:
	addq.l		&0x1,TESTCTR(%a6)

	movm.l		DEF_REGS(%pc),&0x3fff
	fmovm.x		DEF_FPREGS(%pc),&0xff
	fmovm.l		DEF_FPCREGS(%pc),%fpcr,%fpsr,%fpiar

	mov.w		&0x0000,ICCR(%a6)
	movm.l		&0x7fff,IREGS(%a6)
	fmovm.x		&0xff,IFPREGS(%a6)
	fmovm.l		%fpcr,%fpsr,%fpiar,IFPCREGS(%a6)

	mov.w		&0x0000,%cc
effadd_1_pc:
	fabs.p		&0xc12300012345678912345678,%fp0

	mov.w		%cc,SCCR(%a6)
	movm.l		&0x7fff,SREGS(%a6)
	fmovm.x		&0xff,SFPREGS(%a6)
	fmovm.l		%fpcr,%fpsr,%fpiar,SFPCREGS(%a6)

	mov.l		&0x3e660000,IFPREGS+0x0(%a6)
	mov.l		&0xd0ed23e8,IFPREGS+0x4(%a6)
	mov.l		&0xd14035bc,IFPREGS+0x8(%a6)
	mov.l		&0x00000108,IFPCREGS+0x4(%a6)
	lea		effadd_1_pc(%pc),%a0
	mov.l		%a0,IFPCREGS+0x8(%a6)

	bsr.l		chkregs
	tst.b		%d0
	bne.l		error

	bsr.l		chkfpregs
	tst.b		%d0
	bne.l		error

fmovml_0:
	addq.l		&0x1,TESTCTR(%a6)

	movm.l		DEF_REGS(%pc),&0x3fff
	fmovm.x		DEF_FPREGS(%pc),&0xff
	fmovm.l		DEF_FPCREGS(%pc),%fpcr,%fpsr,%fpiar

	mov.w		&0x0000,ICCR(%a6)
	mov.w		&0x0000,%cc
	movm.l		&0x7fff,IREGS(%a6)
	fmovm.x		&0xff,IFPREGS(%a6)
	fmovm.l		%fpcr,%fpsr,%fpiar,IFPCREGS(%a6)

	fmovm.l		&0xffffffffffffffff,%fpcr,%fpsr

	mov.w		%cc,SCCR(%a6)
	movm.l		&0x7fff,SREGS(%a6)
	fmovm.x		&0xff,SFPREGS(%a6)
	fmovm.l		%fpcr,%fpsr,%fpiar,SFPCREGS(%a6)
	mov.l		&0x0000fff0,IFPCREGS+0x0(%a6)
	mov.l		&0x0ffffff8,IFPCREGS+0x4(%a6)

	bsr.l		chkregs
	tst.b		%d0
	bne.l		error

	bsr.l		chkfpregs
	tst.b		%d0
	bne.l		error

fmovml_1:
	addq.l		&0x1,TESTCTR(%a6)

	movm.l		DEF_REGS(%pc),&0x3fff
	fmovm.x		DEF_FPREGS(%pc),&0xff
	fmovm.l		DEF_FPCREGS(%pc),%fpcr,%fpsr,%fpiar

	mov.w		&0x0000,ICCR(%a6)
	mov.w		&0x0000,%cc
	movm.l		&0x7fff,IREGS(%a6)
	fmovm.x		&0xff,IFPREGS(%a6)
	fmovm.l		%fpcr,%fpsr,%fpiar,IFPCREGS(%a6)

	fmovm.l		&0xffffffffffffffff,%fpcr,%fpiar

	mov.w		%cc,SCCR(%a6)
	movm.l		&0x7fff,SREGS(%a6)
	fmovm.x		&0xff,SFPREGS(%a6)
	fmovm.l		%fpcr,%fpsr,%fpiar,SFPCREGS(%a6)
	mov.l		&0x0000fff0,IFPCREGS+0x0(%a6)
	mov.l		&0xffffffff,IFPCREGS+0x8(%a6)

	bsr.l		chkregs
	tst.b		%d0
	bne.l		error

	bsr.l		chkfpregs
	tst.b		%d0
	bne.l		error

fmovml_2:
	addq.l		&0x1,TESTCTR(%a6)

	movm.l		DEF_REGS(%pc),&0x3fff
	fmovm.x		DEF_FPREGS(%pc),&0xff
	fmovm.l		DEF_FPCREGS(%pc),%fpcr,%fpsr,%fpiar

	mov.w		&0x0000,ICCR(%a6)
	mov.w		&0x0000,%cc
	movm.l		&0x7fff,IREGS(%a6)
	fmovm.x		&0xff,IFPREGS(%a6)
	fmovm.l		%fpcr,%fpsr,%fpiar,IFPCREGS(%a6)

	fmovm.l		&0xffffffffffffffff,%fpsr,%fpiar

	mov.w		%cc,SCCR(%a6)
	movm.l		&0x7fff,SREGS(%a6)
	fmovm.x		&0xff,SFPREGS(%a6)
	fmovm.l		%fpcr,%fpsr,%fpiar,SFPCREGS(%a6)
	mov.l		&0x0ffffff8,IFPCREGS+0x4(%a6)
	mov.l		&0xffffffff,IFPCREGS+0x8(%a6)

	bsr.l		chkregs
	tst.b		%d0
	bne.l		error

	bsr.l		chkfpregs
	tst.b		%d0
	bne.l		error

fmovml_3:
	addq.l		&0x1,TESTCTR(%a6)

	movm.l		DEF_REGS(%pc),&0x3fff
	fmovm.x		DEF_FPREGS(%pc),&0xff
	fmovm.l		DEF_FPCREGS(%pc),%fpcr,%fpsr,%fpiar

	mov.w		&0x0000,ICCR(%a6)
	mov.w		&0x0000,%cc
	movm.l		&0x7fff,IREGS(%a6)
	fmovm.x		&0xff,IFPREGS(%a6)
	fmovm.l		%fpcr,%fpsr,%fpiar,IFPCREGS(%a6)

	fmovm.l		&0xffffffffffffffffffffffff,%fpcr,%fpsr,%fpiar

	mov.w		%cc,SCCR(%a6)
	movm.l		&0x7fff,SREGS(%a6)
	fmovm.x		&0xff,SFPREGS(%a6)
	fmovm.l		%fpcr,%fpsr,%fpiar,SFPCREGS(%a6)
	mov.l		&0x0000fff0,IFPCREGS+0x0(%a6)
	mov.l		&0x0ffffff8,IFPCREGS+0x4(%a6)
	mov.l		&0xffffffff,IFPCREGS+0x8(%a6)

	bsr.l		chkregs
	tst.b		%d0
	bne.l		error

	bsr.l		chkfpregs
	tst.b		%d0
	bne.l		error

# fmovmx dynamic
fmovmx_0:
	addq.l		&0x1,TESTCTR(%a6)

	movm.l		DEF_REGS(%pc),&0x3fff
	fmovm.x		DEF_FPREGS(%pc),&0xff
	fmovm.l		DEF_FPCREGS(%pc),%fpcr,%fpsr,%fpiar

	fmov.b		&0x1,%fp0
	fmov.b		&0x2,%fp1
	fmov.b		&0x3,%fp2
	fmov.b		&0x4,%fp3
	fmov.b		&0x5,%fp4
	fmov.b		&0x6,%fp5
	fmov.b		&0x7,%fp6
	fmov.b		&0x8,%fp7

	fmov.l		&0x0,%fpiar
	mov.l		&0xffffffaa,%d0

	mov.w		&0x0000,ICCR(%a6)
	movm.l		&0xffff,IREGS(%a6)

	fmovm.l		%fpcr,%fpsr,%fpiar,IFPCREGS(%a6)
	fmovm.x		&0xff,IFPREGS(%a6)
	
	mov.w		&0x0000,%cc

	fmovm.x		%d0,-(%sp)

	mov.w		%cc,SCCR(%a6)

	fmovm.l		%fpcr,%fpsr,%fpiar,SFPCREGS(%a6)

	fmov.s		&0x7f800000,%fp1
	fmov.s		&0x7f800000,%fp3
	fmov.s		&0x7f800000,%fp5
	fmov.s		&0x7f800000,%fp7

	fmov.x		(%sp)+,%fp1
	fmov.x		(%sp)+,%fp3
	fmov.x		(%sp)+,%fp5
	fmov.x		(%sp)+,%fp7

	movm.l		&0xffff,SREGS(%a6)
	fmovm.x		&0xff,SFPREGS(%a6)

	bsr.l		chkregs
	tst.b		%d0
	bne.l		error

	bsr.l		chkfpregs
	tst.b		%d0
	bne.l		error

fmovmx_1:
	addq.l		&0x1,TESTCTR(%a6)

	movm.l		DEF_REGS(%pc),&0x3fff
	fmovm.x		DEF_FPREGS(%pc),&0xff
	fmovm.l		DEF_FPCREGS(%pc),%fpcr,%fpsr,%fpiar

	fmov.b		&0x1,%fp0
	fmov.b		&0x2,%fp1
	fmov.b		&0x3,%fp2
	fmov.b		&0x4,%fp3
	fmov.b		&0x5,%fp4
	fmov.b		&0x6,%fp5
	fmov.b		&0x7,%fp6
	fmov.b		&0x8,%fp7

	fmov.x		%fp6,-(%sp)
	fmov.x		%fp4,-(%sp)
	fmov.x		%fp2,-(%sp)
	fmov.x		%fp0,-(%sp)

	fmovm.x		&0xff,IFPREGS(%a6)

	fmov.s		&0x7f800000,%fp6
	fmov.s		&0x7f800000,%fp4
	fmov.s		&0x7f800000,%fp2
	fmov.s		&0x7f800000,%fp0

	fmov.l		&0x0,%fpiar
	fmov.l		&0x0,%fpsr
	mov.l		&0xffffffaa,%d0

	mov.w		&0x0000,ICCR(%a6)
	movm.l		&0xffff,IREGS(%a6)

	fmovm.l		%fpcr,%fpsr,%fpiar,IFPCREGS(%a6)
	
	mov.w		&0x0000,%cc

	fmovm.x		(%sp)+,%d0

	mov.w		%cc,SCCR(%a6)

	fmovm.l		%fpcr,%fpsr,%fpiar,SFPCREGS(%a6)

	movm.l		&0xffff,SREGS(%a6)
	fmovm.x		&0xff,SFPREGS(%a6)

	bsr.l		chkregs
	tst.b		%d0
	bne.l		error

	bsr.l		chkfpregs
	tst.b		%d0
	bne.l		error

fmovmx_2:
	addq.l		&0x1,TESTCTR(%a6)

	movm.l		DEF_REGS(%pc),&0x3fff
	fmovm.x		DEF_FPREGS(%pc),&0xff
	fmovm.l		DEF_FPCREGS(%pc),%fpcr,%fpsr,%fpiar

	fmov.b		&0x1,%fp0
	fmov.b		&0x2,%fp1
	fmov.b		&0x3,%fp2
	fmov.b		&0x4,%fp3
	fmov.b		&0x5,%fp4
	fmov.b		&0x6,%fp5
	fmov.b		&0x7,%fp6
	fmov.b		&0x8,%fp7

	fmov.l		&0x0,%fpiar
	mov.l		&0xffffff00,%d0

	mov.w		&0x0000,ICCR(%a6)
	movm.l		&0xffff,IREGS(%a6)

	fmovm.l		%fpcr,%fpsr,%fpiar,IFPCREGS(%a6)
	fmovm.x		&0xff,IFPREGS(%a6)
	
	mov.w		&0x0000,%cc

	fmovm.x		%d0,-(%sp)

	mov.w		%cc,SCCR(%a6)

	fmovm.l		%fpcr,%fpsr,%fpiar,SFPCREGS(%a6)

	movm.l		&0xffff,SREGS(%a6)
	fmovm.x		&0xff,SFPREGS(%a6)

	bsr.l		chkregs
	tst.b		%d0
	bne.l		error

	bsr.l		chkfpregs
	tst.b		%d0
	bne.l		error

	clr.l		%d0
	rts

###########################################################

# This test will take a non-maskable overflow directly.
ovfl_nm_str:
	string		"\tNon-maskable overflow..."

	align		0x4
ovfl_nm_0:
	addq.l		&0x1,TESTCTR(%a6)

	movm.l		DEF_REGS(%pc),&0x3fff
	fmovm.x		DEF_FPREGS(%pc),&0xff
	fmovm.l		DEF_FPCREGS(%pc),%fpcr,%fpsr,%fpiar

	mov.w		&0x0000,ICCR(%a6)
	movm.l		&0x7fff,IREGS(%a6)
	fmovm.x		&0xff,IFPREGS(%a6)
	fmovm.l		%fpcr,%fpsr,%fpiar,IFPCREGS(%a6)

	fmov.b		&0x2,%fp0
	mov.l		&0x7ffe0000,DATA+0x0(%a6)
	mov.l		&0x80000000,DATA+0x4(%a6)
	mov.l		&0x00000000,DATA+0x8(%a6)

	mov.w		&0x0000,%cc
ovfl_nm_0_pc:
	fmul.x		DATA(%a6),%fp0

	mov.w		%cc,SCCR(%a6)
	movm.l		&0x7fff,SREGS(%a6)
	fmovm.x		&0xff,SFPREGS(%a6)
	fmovm.l		%fpcr,%fpsr,%fpiar,SFPCREGS(%a6)

	mov.l		&0x7fff0000,IFPREGS+0x0(%a6)
	mov.l		&0x00000000,IFPREGS+0x4(%a6)
	mov.l		&0x00000000,IFPREGS+0x8(%a6)
	mov.l		&0x02001048,IFPCREGS+0x4(%a6)
	lea		ovfl_nm_0_pc(%pc),%a0
	mov.l		%a0,IFPCREGS+0x8(%a6)

	bsr.l		chkregs
	tst.b		%d0
	bne.l		error

	bsr.l		chkfpregs
	tst.b		%d0
	bne.l		error

	clr.l		%d0
	rts

###########################################################

# This test will take an overflow directly.
ovfl_str:
	string		"\tEnabled overflow..."

	align		0x4
ovfl_0:
	addq.l		&0x1,TESTCTR(%a6)

	movm.l		DEF_REGS(%pc),&0x3fff
	fmovm.x		DEF_FPREGS(%pc),&0xff
	fmovm.l		DEF_FPCREGS(%pc),%fpcr,%fpsr,%fpiar

	mov.w		&0x0000,ICCR(%a6)
	movm.l		&0x7fff,IREGS(%a6)
	fmovm.x		&0xff,IFPREGS(%a6)
	fmov.l		&0x00001000,%fpcr
	fmovm.l		%fpcr,%fpsr,%fpiar,IFPCREGS(%a6)

	fmov.b		&0x2,%fp0
	mov.l		&0x7ffe0000,DATA+0x0(%a6)
	mov.l		&0x80000000,DATA+0x4(%a6)
	mov.l		&0x00000000,DATA+0x8(%a6)

	mov.w		&0x0000,%cc
ovfl_0_pc:
	fmul.x		DATA(%a6),%fp0

	mov.w		%cc,SCCR(%a6)
	movm.l		&0x7fff,SREGS(%a6)
	fmovm.x		&0xff,SFPREGS(%a6)
	fmovm.l		%fpcr,%fpsr,%fpiar,SFPCREGS(%a6)

	mov.l		&0x7fff0000,IFPREGS+0x0(%a6)
	mov.l		&0x00000000,IFPREGS+0x4(%a6)
	mov.l		&0x00000000,IFPREGS+0x8(%a6)
	mov.l		&0x02001048,IFPCREGS+0x4(%a6)
	lea		ovfl_0_pc(%pc),%a0
	mov.l		%a0,IFPCREGS+0x8(%a6)

	bsr.l		chkregs
	tst.b		%d0
	bne.l		error

	bsr.l		chkfpregs
	tst.b		%d0
	bne.l		error

	clr.l		%d0
	rts

#####################################################################

# This test will take an underflow directly.
unfl_str:
	string		"\tEnabled underflow..."

	align		0x4
unfl_0:
	addq.l		&0x1,TESTCTR(%a6)

	movm.l		DEF_REGS(%pc),&0x3fff
	fmovm.x		DEF_FPREGS(%pc),&0xff
	fmovm.l		DEF_FPCREGS(%pc),%fpcr,%fpsr,%fpiar

	mov.w		&0x0000,ICCR(%a6)
	movm.l		&0x7fff,IREGS(%a6)
	fmovm.x		&0xff,IFPREGS(%a6)
	fmov.l		&0x00000800,%fpcr
	fmovm.l		%fpcr,%fpsr,%fpiar,IFPCREGS(%a6)

	mov.l		&0x00000000,DATA+0x0(%a6)
	mov.l		&0x80000000,DATA+0x4(%a6)
	mov.l		&0x00000000,DATA+0x8(%a6)
	fmovm.x		DATA(%a6),&0x80

	mov.w		&0x0000,%cc
unfl_0_pc:
	fdiv.b		&0x2,%fp0

	mov.w		%cc,SCCR(%a6)
	movm.l		&0x7fff,SREGS(%a6)
	fmovm.x		&0xff,SFPREGS(%a6)
	fmovm.l		%fpcr,%fpsr,%fpiar,SFPCREGS(%a6)

	mov.l		&0x00000000,IFPREGS+0x0(%a6)
	mov.l		&0x40000000,IFPREGS+0x4(%a6)
	mov.l		&0x00000000,IFPREGS+0x8(%a6)
	mov.l		&0x00000800,IFPCREGS+0x4(%a6)
	lea		unfl_0_pc(%pc),%a0
	mov.l		%a0,IFPCREGS+0x8(%a6)

	bsr.l		chkregs
	tst.b		%d0
	bne.l		error

	bsr.l		chkfpregs
	tst.b		%d0
	bne.l		error

	clr.l		%d0
	rts

#####################################################################

# This test will take a non-maskable underflow directly.
unfl_nm_str:
	string		"\tNon-maskable underflow..."

	align		0x4
unfl_nm_0:
	addq.l		&0x1,TESTCTR(%a6)

	movm.l		DEF_REGS(%pc),&0x3fff
	fmovm.x		DEF_FPREGS(%pc),&0xff
	fmovm.l		DEF_FPCREGS(%pc),%fpcr,%fpsr,%fpiar

	mov.w		&0x0000,ICCR(%a6)
	movm.l		&0x7fff,IREGS(%a6)
	fmovm.x		&0xff,IFPREGS(%a6)
	fmovm.l		%fpcr,%fpsr,%fpiar,IFPCREGS(%a6)

	mov.l		&0x00000000,DATA+0x0(%a6)
	mov.l		&0x80000000,DATA+0x4(%a6)
	mov.l		&0x00000000,DATA+0x8(%a6)
	fmovm.x		DATA(%a6),&0x80

	mov.w		&0x0000,%cc
unfl_nm_0_pc:
	fdiv.b		&0x2,%fp0

	mov.w		%cc,SCCR(%a6)
	movm.l		&0x7fff,SREGS(%a6)
	fmovm.x		&0xff,SFPREGS(%a6)
	fmovm.l		%fpcr,%fpsr,%fpiar,SFPCREGS(%a6)

	mov.l		&0x00000000,IFPREGS+0x0(%a6)
	mov.l		&0x40000000,IFPREGS+0x4(%a6)
	mov.l		&0x00000000,IFPREGS+0x8(%a6)
	mov.l		&0x00000800,IFPCREGS+0x4(%a6)
	lea		unfl_nm_0_pc(%pc),%a0
	mov.l		%a0,IFPCREGS+0x8(%a6)

	bsr.l		chkregs
	tst.b		%d0
	bne.l		error

	bsr.l		chkfpregs
	tst.b		%d0
	bne.l		error

	clr.l		%d0
	rts

#####################################################################

inex_str:
	string		"\tEnabled inexact..."

	align		0x4
inex_0:
	addq.l		&0x1,TESTCTR(%a6)

	movm.l		DEF_REGS(%pc),&0x3fff
	fmovm.x		DEF_FPREGS(%pc),&0xff
	fmovm.l		DEF_FPCREGS(%pc),%fpcr,%fpsr,%fpiar

	mov.w		&0x0000,ICCR(%a6)
	movm.l		&0x7fff,IREGS(%a6)
	fmovm.x		&0xff,IFPREGS(%a6)
	fmov.l		&0x00000200,%fpcr		# enable inexact
	fmovm.l		%fpcr,%fpsr,%fpiar,IFPCREGS(%a6)

	mov.l		&0x50000000,DATA+0x0(%a6)
	mov.l		&0x80000000,DATA+0x4(%a6)
	mov.l		&0x00000000,DATA+0x8(%a6)
	fmovm.x		DATA(%a6),&0x80

	mov.w		&0x0000,%cc
inex_0_pc:
	fadd.b		&0x2,%fp0

	mov.w		%cc,SCCR(%a6)
	movm.l		&0x7fff,SREGS(%a6)
	fmovm.x		&0xff,SFPREGS(%a6)
	fmovm.l		%fpcr,%fpsr,%fpiar,SFPCREGS(%a6)

	mov.l		&0x50000000,IFPREGS+0x0(%a6)
	mov.l		&0x80000000,IFPREGS+0x4(%a6)
	mov.l		&0x00000000,IFPREGS+0x8(%a6)
	mov.l		&0x00000208,IFPCREGS+0x4(%a6)
	lea		inex_0_pc(%pc),%a0
	mov.l		%a0,IFPCREGS+0x8(%a6)

	bsr.l		chkregs
	tst.b		%d0
	bne.l		error

	bsr.l		chkfpregs
	tst.b		%d0
	bne.l		error

	clr.l		%d0
	rts

#####################################################################

snan_str:
	string		"\tEnabled SNAN..."

	align		0x4
snan_0:
	addq.l		&0x1,TESTCTR(%a6)

	movm.l		DEF_REGS(%pc),&0x3fff
	fmovm.x		DEF_FPREGS(%pc),&0xff
	fmovm.l		DEF_FPCREGS(%pc),%fpcr,%fpsr,%fpiar

	mov.w		&0x0000,ICCR(%a6)
	movm.l		&0x7fff,IREGS(%a6)
	fmovm.x		&0xff,IFPREGS(%a6)
	fmov.l		&0x00004000,%fpcr		# enable SNAN
	fmovm.l		%fpcr,%fpsr,%fpiar,IFPCREGS(%a6)

	mov.l		&0xffff0000,DATA+0x0(%a6)
	mov.l		&0x00000000,DATA+0x4(%a6)
	mov.l		&0x00000001,DATA+0x8(%a6)
	fmovm.x		DATA(%a6),&0x80

	mov.w		&0x0000,%cc
snan_0_pc:
	fadd.b		&0x2,%fp0

	mov.w		%cc,SCCR(%a6)
	movm.l		&0x7fff,SREGS(%a6)
	fmovm.x		&0xff,SFPREGS(%a6)
	fmovm.l		%fpcr,%fpsr,%fpiar,SFPCREGS(%a6)

	mov.l		&0xffff0000,IFPREGS+0x0(%a6)
	mov.l		&0x00000000,IFPREGS+0x4(%a6)
	mov.l		&0x00000001,IFPREGS+0x8(%a6)
	mov.l		&0x09004080,IFPCREGS+0x4(%a6)
	lea		snan_0_pc(%pc),%a0
	mov.l		%a0,IFPCREGS+0x8(%a6)

	bsr.l		chkregs
	tst.b		%d0
	bne.l		error

	bsr.l		chkfpregs
	tst.b		%d0
	bne.l		error

	clr.l		%d0
	rts

#####################################################################

operr_str:
	string		"\tEnabled OPERR..."

	align		0x4
operr_0:
	addq.l		&0x1,TESTCTR(%a6)

	movm.l		DEF_REGS(%pc),&0x3fff
	fmovm.x		DEF_FPREGS(%pc),&0xff
	fmovm.l		DEF_FPCREGS(%pc),%fpcr,%fpsr,%fpiar

	mov.w		&0x0000,ICCR(%a6)
	movm.l		&0x7fff,IREGS(%a6)
	fmovm.x		&0xff,IFPREGS(%a6)
	fmov.l		&0x00002000,%fpcr		# enable OPERR
	fmovm.l		%fpcr,%fpsr,%fpiar,IFPCREGS(%a6)

	mov.l		&0xffff0000,DATA+0x0(%a6)
	mov.l		&0x00000000,DATA+0x4(%a6)
	mov.l		&0x00000000,DATA+0x8(%a6)
	fmovm.x		DATA(%a6),&0x80

	mov.w		&0x0000,%cc
operr_0_pc:
	fadd.s		&0x7f800000,%fp0

	mov.w		%cc,SCCR(%a6)
	movm.l		&0x7fff,SREGS(%a6)
	fmovm.x		&0xff,SFPREGS(%a6)
	fmovm.l		%fpcr,%fpsr,%fpiar,SFPCREGS(%a6)

	mov.l		&0xffff0000,IFPREGS+0x0(%a6)
	mov.l		&0x00000000,IFPREGS+0x4(%a6)
	mov.l		&0x00000000,IFPREGS+0x8(%a6)
	mov.l		&0x01002080,IFPCREGS+0x4(%a6)
	lea		operr_0_pc(%pc),%a0
	mov.l		%a0,IFPCREGS+0x8(%a6)

	bsr.l		chkregs
	tst.b		%d0
	bne.l		error

	bsr.l		chkfpregs
	tst.b		%d0
	bne.l		error

	clr.l		%d0
	rts

#####################################################################

dz_str:
	string		"\tEnabled DZ..."

	align		0x4
dz_0:
	addq.l		&0x1,TESTCTR(%a6)

	movm.l		DEF_REGS(%pc),&0x3fff
	fmovm.x		DEF_FPREGS(%pc),&0xff
	fmovm.l		DEF_FPCREGS(%pc),%fpcr,%fpsr,%fpiar

	mov.w		&0x0000,ICCR(%a6)
	movm.l		&0x7fff,IREGS(%a6)
	fmovm.x		&0xff,IFPREGS(%a6)
	fmov.l		&0x00000400,%fpcr		# enable DZ
	fmovm.l		%fpcr,%fpsr,%fpiar,IFPCREGS(%a6)

	mov.l		&0x40000000,DATA+0x0(%a6)
	mov.l		&0x80000000,DATA+0x4(%a6)
	mov.l		&0x00000000,DATA+0x8(%a6)
	fmovm.x		DATA(%a6),&0x80

	mov.w		&0x0000,%cc
dz_0_pc:
	fdiv.b		&0x0,%fp0

	mov.w		%cc,SCCR(%a6)
	movm.l		&0x7fff,SREGS(%a6)
	fmovm.x		&0xff,SFPREGS(%a6)
	fmovm.l		%fpcr,%fpsr,%fpiar,SFPCREGS(%a6)

	mov.l		&0x40000000,IFPREGS+0x0(%a6)
	mov.l		&0x80000000,IFPREGS+0x4(%a6)
	mov.l		&0x00000000,IFPREGS+0x8(%a6)
	mov.l		&0x02000410,IFPCREGS+0x4(%a6)
	lea		dz_0_pc(%pc),%a0
	mov.l		%a0,IFPCREGS+0x8(%a6)

	bsr.l		chkregs
	tst.b		%d0
	bne.l		error

	bsr.l		chkfpregs
	tst.b		%d0
	bne.l		error

	clr.l		%d0
	rts

#####################################################################

unsupp_str:
	string		"\tUnimplemented data type/format..."

# an unnormalized number
	align		0x4
unsupp_0:
	addq.l		&0x1,TESTCTR(%a6)

	movm.l		DEF_REGS(%pc),&0x3fff
	fmovm.x		DEF_FPREGS(%pc),&0xff
	fmovm.l		DEF_FPCREGS(%pc),%fpcr,%fpsr,%fpiar

	mov.w		&0x0000,ICCR(%a6)
	movm.l		&0x7fff,IREGS(%a6)
	fmovm.x		&0xff,IFPREGS(%a6)
	fmovm.l		%fpcr,%fpsr,%fpiar,IFPCREGS(%a6)

	mov.l		&0xc03f0000,DATA+0x0(%a6)
	mov.l		&0x00000000,DATA+0x4(%a6)
	mov.l		&0x00000001,DATA+0x8(%a6)
	fmov.b		&0x2,%fp0
	mov.w		&0x0000,%cc
unsupp_0_pc:
	fmul.x		DATA(%a6),%fp0

	mov.w		%cc,SCCR(%a6)
	movm.l		&0x7fff,SREGS(%a6)
	fmovm.x		&0xff,SFPREGS(%a6)
	fmovm.l		%fpcr,%fpsr,%fpiar,SFPCREGS(%a6)

	mov.l		&0xc0010000,IFPREGS+0x0(%a6)
	mov.l		&0x80000000,IFPREGS+0x4(%a6)
	mov.l		&0x00000000,IFPREGS+0x8(%a6)
	mov.l		&0x08000000,IFPCREGS+0x4(%a6)
	lea		unsupp_0_pc(%pc),%a0
	mov.l		%a0,IFPCREGS+0x8(%a6)

	bsr.l		chkregs
	tst.b		%d0
	bne.l		error

	bsr.l		chkfpregs
	tst.b		%d0
	bne.l		error

# a denormalized number
unsupp_1:
	addq.l		&0x1,TESTCTR(%a6)

	movm.l		DEF_REGS(%pc),&0x3fff
	fmovm.x		DEF_FPREGS(%pc),&0xff
	fmovm.l		DEF_FPCREGS(%pc),%fpcr,%fpsr,%fpiar

	mov.w		&0x0000,ICCR(%a6)
	movm.l		&0x7fff,IREGS(%a6)
	fmovm.x		&0xff,IFPREGS(%a6)
	fmovm.l		%fpcr,%fpsr,%fpiar,IFPCREGS(%a6)

	mov.l		&0x80000000,DATA+0x0(%a6)
	mov.l		&0x01000000,DATA+0x4(%a6)
	mov.l		&0x00000000,DATA+0x8(%a6)
	fmov.l		&0x7fffffff,%fp0

	mov.w		&0x0000,%cc
unsupp_1_pc:
	fmul.x		DATA(%a6),%fp0

	mov.w		%cc,SCCR(%a6)
	movm.l		&0x7fff,SREGS(%a6)
	fmovm.x		&0xff,SFPREGS(%a6)
	fmovm.l		%fpcr,%fpsr,%fpiar,SFPCREGS(%a6)

	mov.l		&0x80170000,IFPREGS+0x0(%a6)
	mov.l		&0xfffffffe,IFPREGS+0x4(%a6)
	mov.l		&0x00000000,IFPREGS+0x8(%a6)
	mov.l		&0x08000000,IFPCREGS+0x4(%a6)
	lea		unsupp_1_pc(%pc),%a0
	mov.l		%a0,IFPCREGS+0x8(%a6)

	bsr.l		chkregs
	tst.b		%d0
	bne.l		error

	bsr.l		chkfpregs
	tst.b		%d0
	bne.l		error

# packed
unsupp_2:
	addq.l		&0x1,TESTCTR(%a6)

	movm.l		DEF_REGS(%pc),&0x3fff
	fmovm.x		DEF_FPREGS(%pc),&0xff
	fmovm.l		DEF_FPCREGS(%pc),%fpcr,%fpsr,%fpiar

	mov.w		&0x0000,ICCR(%a6)
	movm.l		&0x7fff,IREGS(%a6)
	fmovm.x		&0xff,IFPREGS(%a6)
	fmovm.l		%fpcr,%fpsr,%fpiar,IFPCREGS(%a6)

	mov.l		&0xc1230001,DATA+0x0(%a6)
	mov.l		&0x23456789,DATA+0x4(%a6)
	mov.l		&0x12345678,DATA+0x8(%a6)

	mov.w		&0x0000,%cc
unsupp_2_pc:
	fabs.p		DATA(%a6),%fp0

	mov.w		%cc,SCCR(%a6)
	movm.l		&0x7fff,SREGS(%a6)
	fmovm.x		&0xff,SFPREGS(%a6)
	fmovm.l		%fpcr,%fpsr,%fpiar,SFPCREGS(%a6)

	mov.l		&0x3e660000,IFPREGS+0x0(%a6)
	mov.l		&0xd0ed23e8,IFPREGS+0x4(%a6)
	mov.l		&0xd14035bc,IFPREGS+0x8(%a6)
	mov.l		&0x00000108,IFPCREGS+0x4(%a6)
	lea		unsupp_2_pc(%pc),%a0
	mov.l		%a0,IFPCREGS+0x8(%a6)

	bsr.l		chkregs
	tst.b		%d0
	bne.l		error

	bsr.l		chkfpregs
	tst.b		%d0
	bne.l		error

	clr.l		%d0
	rts

###########################################################
###########################################################

chkregs:
	lea		IREGS(%a6),%a0
	lea		SREGS(%a6),%a1
	mov.l		&14,%d0
chkregs_loop:
	cmp.l		(%a0)+,(%a1)+
	bne.l		chkregs_error
	dbra.w		%d0,chkregs_loop

	mov.w		ICCR(%a6),%d0
	mov.w		SCCR(%a6),%d1
	cmp.w		%d0,%d1
	bne.l		chkregs_error

	clr.l		%d0
	rts

chkregs_error:
	movq.l		&0x1,%d0
	rts

error:
	mov.l		TESTCTR(%a6),%d1
	movq.l		&0x1,%d0
	rts

chkfpregs:
	lea		IFPREGS(%a6),%a0
	lea		SFPREGS(%a6),%a1
	mov.l		&23,%d0
chkfpregs_loop:
	cmp.l		(%a0)+,(%a1)+
	bne.l		chkfpregs_error
	dbra.w		%d0,chkfpregs_loop

	lea		IFPCREGS(%a6),%a0
	lea		SFPCREGS(%a6),%a1
	cmp.l		(%a0)+,(%a1)+
	bne.l		chkfpregs_error
	cmp.l		(%a0)+,(%a1)+
	bne.l		chkfpregs_error
	cmp.l		(%a0)+,(%a1)+
	bne.l		chkfpregs_error

	clr.l		%d0
	rts

chkfpregs_error:
	movq.l		&0x1,%d0
	rts

DEF_REGS:
	long		0xacacacac, 0xacacacac, 0xacacacac, 0xacacacac
	long		0xacacacac, 0xacacacac, 0xacacacac, 0xacacacac

	long		0xacacacac, 0xacacacac, 0xacacacac, 0xacacacac
	long		0xacacacac, 0xacacacac, 0xacacacac, 0xacacacac

DEF_FPREGS:
	long		0x7fff0000, 0xffffffff, 0xffffffff
	long		0x7fff0000, 0xffffffff, 0xffffffff
	long		0x7fff0000, 0xffffffff, 0xffffffff
	long		0x7fff0000, 0xffffffff, 0xffffffff
	long		0x7fff0000, 0xffffffff, 0xffffffff
	long		0x7fff0000, 0xffffffff, 0xffffffff
	long		0x7fff0000, 0xffffffff, 0xffffffff
	long		0x7fff0000, 0xffffffff, 0xffffffff

DEF_FPCREGS:
	long		0x00000000, 0x00000000, 0x00000000

############################################################

_print_str:
	mov.l		%d0,-(%sp)
	mov.l		(TESTTOP-0x80+0x0,%pc),%d0
	pea		(TESTTOP-0x80,%pc,%d0)
	mov.l		0x4(%sp),%d0
	rtd		&0x4

_print_num:
	mov.l		%d0,-(%sp)
	mov.l		(TESTTOP-0x80+0x4,%pc),%d0
	pea		(TESTTOP-0x80,%pc,%d0)
	mov.l		0x4(%sp),%d0
	rtd		&0x4

############################################################
~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
MOTOROLA MICROPROCESSOR & MEMORY TECHNOLOGY GROUP
M68000 Hi-Performance Microprocessor Division
M68060 Software Package
Production Release P1.00 -- October 10, 1994

M68060 Software Package Copyright � 1993, 1994 Motorola Inc.  All rights reserved.
 
THE SOFTWARE is provided on an "AS IS" basis and without warranty.
To the maximum extent permitted by applicable law,
MOTOROLA DISCLAIMS ALL WARRANTIES WHETHER EXPRESS OR IMPLIED, 
INCLUDING IMPLIED WARRANTIES OF MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE
and any warranty against infringement with regard to the SOFTWARE
(INCLUDING ANY MODIFIED VERSIONS THEREOF) and any accompanying written materials.

To the maximum extent permitted by applicable law,
IN NO EVENT SHALL MOTOROLA BE LIABLE FOR ANY DAMAGES WHATSOEVER
(INCLUDING WITHOUT LIMITATION, DAMAGES FOR LOSS OF BUSINESS PROFITS,
BUSINESS INTERRUPTION, LOSS OF BUSINESS INFORMATION, OR OTHER PECUNIARY LOSS)
ARISING OF THE USE OR INABILITY TO USE THE SOFTWARE.
Motorola assumes no responsibility for the maintenance and support of the SOFTWARE.

You are hereby granted a copyright license to use, modify, and distribute the SOFTWARE
so long as this entire notice is retained without alteration in any modified and/or
redistributed versions, and that such modified versions are clearly identified as such.
No licenses are granted by implication, estoppel or otherwise under any patents
or trademarks of Motorola, Inc.
~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
# litop.s:
# 	This file is appended to the top of the 060FPLSP package
# and contains the entry points into the package. The user, in
# effect, branches to one of the branch table entries located here.
#

	bra.l	_060LSP__idivs64_
	short	0x0000
	bra.l	_060LSP__idivu64_
	short	0x0000

	bra.l	_060LSP__imuls64_
	short	0x0000
	bra.l	_060LSP__imulu64_
	short	0x0000

	bra.l	_060LSP__cmp2_Ab_
	short	0x0000
	bra.l	_060LSP__cmp2_Aw_
	short	0x0000
	bra.l	_060LSP__cmp2_Al_
	short	0x0000
	bra.l	_060LSP__cmp2_Db_
	short	0x0000
	bra.l	_060LSP__cmp2_Dw_
	short	0x0000
	bra.l	_060LSP__cmp2_Dl_
	short	0x0000

# leave room for future possible aditions.
	align	0x200

#########################################################################
# XDEF ****************************************************************	#
#	_060LSP__idivu64_(): Emulate 64-bit unsigned div instruction.	#
#	_060LSP__idivs64_(): Emulate 64-bit signed div instruction.	#
#									#
#	This is the library version which is accessed as a subroutine	#
# 	and therefore does not work exactly like the 680X0 div{s,u}.l	#
#	64-bit divide instruction.					#
#									#
# XREF ****************************************************************	#
#	None.								#
#									#
# INPUT ***************************************************************	#
#	0x4(sp)  = divisor						#
#	0x8(sp)  = hi(dividend)						#
#	0xc(sp)  = lo(dividend)						#
#	0x10(sp) = pointer to location to place quotient/remainder	#
# 									#
# OUTPUT **************************************************************	#
#	0x10(sp) = points to location of remainder/quotient.		#
#		   remainder is in first longword, quotient is in 2nd.	#
#									#
# ALGORITHM ***********************************************************	#
#	If the operands are signed, make them unsigned and save the 	#
# sign info for later. Separate out special cases like divide-by-zero	#
# or 32-bit divides if possible. Else, use a special math algorithm	#
# to calculate the result.						#
#	Restore sign info if signed instruction. Set the condition 	#
# codes before performing the final "rts". If the divisor was equal to	#
# zero, then perform a divide-by-zero using a 16-bit implemented	#
# divide instruction. This way, the operating system can record that	#
# the event occurred even though it may not point to the correct place.	#
#									#
#########################################################################

set	POSNEG,		-1
set	NDIVISOR,	-2
set	NDIVIDEND,	-3
set	DDSECOND,	-4
set	DDNORMAL,	-8
set	DDQUOTIENT,	-12
set	DIV64_CC,	-16

##########
# divs.l #
##########
	global		_060LSP__idivs64_
_060LSP__idivs64_:
# PROLOGUE BEGIN ########################################################
	link.w		%a6,&-16
	movm.l		&0x3f00,-(%sp)		# save d2-d7
#	fmovm.l		&0x0,-(%sp)		# save no fpregs
# PROLOGUE END ##########################################################

	mov.w		%cc,DIV64_CC(%a6)
	st		POSNEG(%a6)		# signed operation
	bra.b		ldiv64_cont

##########
# divu.l #
##########
	global		_060LSP__idivu64_
_060LSP__idivu64_:
# PROLOGUE BEGIN ########################################################
	link.w		%a6,&-16
	movm.l		&0x3f00,-(%sp)		# save d2-d7
#	fmovm.l		&0x0,-(%sp)		# save no fpregs
# PROLOGUE END ##########################################################

	mov.w		%cc,DIV64_CC(%a6)
	sf		POSNEG(%a6)		# unsigned operation

ldiv64_cont:
	mov.l		0x8(%a6),%d7		# fetch divisor

	beq.w		ldiv64eq0		# divisor is = 0!!!

	mov.l		0xc(%a6), %d5 		# get dividend hi
	mov.l		0x10(%a6), %d6 		# get dividend lo

# separate signed and unsigned divide
	tst.b		POSNEG(%a6)		# signed or unsigned?
	beq.b		ldspecialcases		# use positive divide

# save the sign of the divisor
# make divisor unsigned if it's negative
	tst.l		%d7			# chk sign of divisor
	slt		NDIVISOR(%a6)		# save sign of divisor
	bpl.b		ldsgndividend
	neg.l		%d7			# complement negative divisor

# save the sign of the dividend
# make dividend unsigned if it's negative
ldsgndividend:
	tst.l		%d5			# chk sign of hi(dividend)
	slt		NDIVIDEND(%a6)		# save sign of dividend
	bpl.b		ldspecialcases

	mov.w		&0x0, %cc		# clear 'X' cc bit
	negx.l		%d6			# complement signed dividend
	negx.l		%d5

# extract some special cases:
# 	- is (dividend == 0) ?
#	- is (hi(dividend) == 0 && (divisor <= lo(dividend))) ? (32-bit div)
ldspecialcases:
	tst.l		%d5			# is (hi(dividend) == 0)
	bne.b		ldnormaldivide		# no, so try it the long way

	tst.l		%d6			# is (lo(dividend) == 0), too
	beq.w		lddone			# yes, so (dividend == 0)

	cmp.l	 	%d7,%d6			# is (divisor <= lo(dividend))
	bls.b		ld32bitdivide		# yes, so use 32 bit divide

	exg		%d5,%d6			# q = 0, r = dividend
	bra.w		ldivfinish		# can't divide, we're done.

ld32bitdivide:
	tdivu.l		%d7, %d5:%d6		# it's only a 32/32 bit div!

	bra.b		ldivfinish

ldnormaldivide:
# last special case:
# 	- is hi(dividend) >= divisor ? if yes, then overflow
	cmp.l		%d7,%d5
	bls.b		lddovf			# answer won't fit in 32 bits

# perform the divide algorithm:
	bsr.l		ldclassical		# do int divide

# separate into signed and unsigned finishes.
ldivfinish:
	tst.b		POSNEG(%a6)		# do divs, divu separately
	beq.b		lddone			# divu has no processing!!!

# it was a divs.l, so ccode setting is a little more complicated...
	tst.b		NDIVIDEND(%a6)		# remainder has same sign 
	beq.b		ldcc			# as dividend.
	neg.l		%d5			# sgn(rem) = sgn(dividend)
ldcc:
	mov.b		NDIVISOR(%a6), %d0
	eor.b		%d0, NDIVIDEND(%a6)	# chk if quotient is negative
	beq.b		ldqpos			# branch to quot positive

# 0x80000000 is the largest number representable as a 32-bit negative
# number. the negative of 0x80000000 is 0x80000000.
	cmpi.l		%d6, &0x80000000	# will (-quot) fit in 32 bits?
	bhi.b		lddovf

	neg.l		%d6			# make (-quot) 2's comp

	bra.b		lddone

ldqpos:
	btst		&0x1f, %d6		# will (+quot) fit in 32 bits?
	bne.b		lddovf

lddone:
# if the register numbers are the same, only the quotient gets saved.
# so, if we always save the quotient second, we save ourselves a cmp&beq
	andi.w		&0x10,DIV64_CC(%a6)
	mov.w		DIV64_CC(%a6),%cc
	tst.l		%d6			# may set 'N' ccode bit

# here, the result is in d1 and d0. the current strategy is to save
# the values at the location pointed to by a0.
# use movm here to not disturb the condition codes.
ldexit:
	movm.l		&0x0060,([0x14,%a6])	# save result

# EPILOGUE BEGIN ########################################################
#	fmovm.l		(%sp)+,&0x0		# restore no fpregs
	movm.l		(%sp)+,&0x00fc		# restore d2-d7
	unlk		%a6
# EPILOGUE END ##########################################################

	rts

# the result should be the unchanged dividend
lddovf:
	mov.l		0xc(%a6), %d5 		# get dividend hi
	mov.l		0x10(%a6), %d6 		# get dividend lo

	andi.w		&0x1c,DIV64_CC(%a6)
	ori.w		&0x02,DIV64_CC(%a6)	# set 'V' ccode bit
	mov.w		DIV64_CC(%a6),%cc

	bra.b		ldexit

ldiv64eq0:
	mov.l		0xc(%a6),([0x14,%a6])
	mov.l		0x10(%a6),([0x14,%a6],0x4)

	mov.w		DIV64_CC(%a6),%cc

# EPILOGUE BEGIN ########################################################
#	fmovm.l		(%sp)+,&0x0		# restore no fpregs
	movm.l		(%sp)+,&0x00fc		# restore d2-d7
	unlk		%a6
# EPILOGUE END ##########################################################

	divu.w		&0x0,%d0		# force a divbyzero exception
	rts

###########################################################################
#########################################################################
# This routine uses the 'classical' Algorithm D from Donald Knuth's	#
# Art of Computer Programming, vol II, Seminumerical Algorithms.	#
# For this implementation b=2**16, and the target is U1U2U3U4/V1V2,	#
# where U,V are words of the quadword dividend and longword divisor,	#
# and U1, V1 are the most significant words.				#
# 									#
# The most sig. longword of the 64 bit dividend must be in %d5, least 	#
# in %d6. The divisor must be in the variable ddivisor, and the		#
# signed/unsigned flag ddusign must be set (0=unsigned,1=signed).	#
# The quotient is returned in %d6, remainder in %d5, unless the		#
# v (overflow) bit is set in the saved %ccr. If overflow, the dividend	#
# is unchanged.								#
#########################################################################
ldclassical:
# if the divisor msw is 0, use simpler algorithm then the full blown
# one at ddknuth:

	cmpi.l		%d7, &0xffff
	bhi.b		lddknuth		# go use D. Knuth algorithm

# Since the divisor is only a word (and larger than the mslw of the dividend),
# a simpler algorithm may be used :
# In the general case, four quotient words would be created by
# dividing the divisor word into each dividend word. In this case,
# the first two quotient words must be zero, or overflow would occur.
# Since we already checked this case above, we can treat the most significant
# longword of the dividend as (0) remainder (see Knuth) and merely complete 
# the last two divisions to get a quotient longword and word remainder:

	clr.l		%d1
	swap		%d5			# same as r*b if previous step rqd
	swap		%d6			# get u3 to lsw position
	mov.w		%d6, %d5		# rb + u3

	divu.w		%d7, %d5

	mov.w		%d5, %d1		# first quotient word
	swap		%d6			# get u4
	mov.w		%d6, %d5		# rb + u4

	divu.w		%d7, %d5

	swap		%d1
	mov.w		%d5, %d1		# 2nd quotient 'digit'
	clr.w		%d5
	swap		%d5			# now remainder
	mov.l		%d1, %d6		# and quotient

	rts

lddknuth:
# In this algorithm, the divisor is treated as a 2 digit (word) number
# which is divided into a 3 digit (word) dividend to get one quotient
# digit (word). After subtraction, the dividend is shifted and the
# process repeated. Before beginning, the divisor and quotient are
# 'normalized' so that the process of estimating the quotient digit
# will yield verifiably correct results..

	clr.l		DDNORMAL(%a6)		# count of shifts for normalization
	clr.b		DDSECOND(%a6)		# clear flag for quotient digits
	clr.l		%d1			# %d1 will hold trial quotient
lddnchk:
	btst		&31, %d7		# must we normalize? first word of 
	bne.b		lddnormalized		# divisor (V1) must be >= 65536/2
	addq.l		&0x1, DDNORMAL(%a6)	# count normalization shifts
	lsl.l		&0x1, %d7		# shift the divisor
	lsl.l		&0x1, %d6		# shift u4,u3 with overflow to u2
	roxl.l		&0x1, %d5		# shift u1,u2 
	bra.w		lddnchk
lddnormalized:

# Now calculate an estimate of the quotient words (msw first, then lsw).
# The comments use subscripts for the first quotient digit determination.
	mov.l		%d7, %d3		# divisor
	mov.l		%d5, %d2		# dividend mslw
	swap		%d2
	swap		%d3
	cmp.w	 	%d2, %d3		# V1 = U1 ?
	bne.b		lddqcalc1
	mov.w		&0xffff, %d1		# use max trial quotient word
	bra.b		lddadj0
lddqcalc1:
	mov.l		%d5, %d1		

	divu.w		%d3, %d1		# use quotient of mslw/msw

	andi.l		&0x0000ffff, %d1	# zero any remainder
lddadj0:

# now test the trial quotient and adjust. This step plus the
# normalization assures (according to Knuth) that the trial
# quotient will be at worst 1 too large.
	mov.l		%d6, -(%sp)
	clr.w		%d6			# word u3 left
	swap		%d6			# in lsw position
lddadj1: mov.l		%d7, %d3
	mov.l		%d1, %d2
	mulu.w		%d7, %d2		# V2q
	swap		%d3
	mulu.w		%d1, %d3		# V1q
	mov.l		%d5, %d4		# U1U2
	sub.l		%d3, %d4		# U1U2 - V1q

	swap		%d4

	mov.w		%d4,%d0
	mov.w		%d6,%d4			# insert lower word (U3)

	tst.w		%d0			# is upper word set?
	bne.w		lddadjd1

#	add.l		%d6, %d4		# (U1U2 - V1q) + U3

	cmp.l	 	%d2, %d4
	bls.b		lddadjd1		# is V2q > (U1U2-V1q) + U3 ?
	subq.l		&0x1, %d1		# yes, decrement and recheck
	bra.b		lddadj1
lddadjd1:
# now test the word by multiplying it by the divisor (V1V2) and comparing
# the 3 digit (word) result with the current dividend words
	mov.l		%d5, -(%sp)		# save %d5 (%d6 already saved)
	mov.l		%d1, %d6
	swap		%d6			# shift answer to ms 3 words
	mov.l		%d7, %d5
	bsr.l		ldmm2
	mov.l		%d5, %d2		# now %d2,%d3 are trial*divisor
	mov.l		%d6, %d3
	mov.l		(%sp)+, %d5		# restore dividend
	mov.l		(%sp)+, %d6
	sub.l		%d3, %d6
	subx.l		%d2, %d5		# subtract double precision
	bcc		ldd2nd			# no carry, do next quotient digit
	subq.l		&0x1, %d1		# q is one too large
# need to add back divisor longword to current ms 3 digits of dividend
# - according to Knuth, this is done only 2 out of 65536 times for random
# divisor, dividend selection.
	clr.l		%d2
	mov.l		%d7, %d3
	swap		%d3
	clr.w		%d3			# %d3 now ls word of divisor
	add.l		%d3, %d6		# aligned with 3rd word of dividend
	addx.l		%d2, %d5
	mov.l		%d7, %d3
	clr.w		%d3			# %d3 now ms word of divisor
	swap		%d3			# aligned with 2nd word of dividend
	add.l		%d3, %d5
ldd2nd:
	tst.b		DDSECOND(%a6)	# both q words done?
	bne.b		lddremain
# first quotient digit now correct. store digit and shift the
# (subtracted) dividend 
	mov.w		%d1, DDQUOTIENT(%a6)
	clr.l		%d1
	swap		%d5
	swap		%d6
	mov.w		%d6, %d5
	clr.w		%d6
	st		DDSECOND(%a6)		# second digit
	bra.w		lddnormalized
lddremain:
# add 2nd word to quotient, get the remainder.
	mov.w 		%d1, DDQUOTIENT+2(%a6)
# shift down one word/digit to renormalize remainder.
	mov.w		%d5, %d6
	swap		%d6
	swap		%d5
	mov.l		DDNORMAL(%a6), %d7	# get norm shift count
	beq.b		lddrn
	subq.l		&0x1, %d7		# set for loop count
lddnlp:
	lsr.l		&0x1, %d5		# shift into %d6
	roxr.l		&0x1, %d6
	dbf		%d7, lddnlp
lddrn:
	mov.l		%d6, %d5		# remainder
	mov.l		DDQUOTIENT(%a6), %d6 	# quotient

	rts
ldmm2:
# factors for the 32X32->64 multiplication are in %d5 and %d6.
# returns 64 bit result in %d5 (hi) %d6(lo).
# destroys %d2,%d3,%d4.

# multiply hi,lo words of each factor to get 4 intermediate products
	mov.l		%d6, %d2
	mov.l		%d6, %d3
	mov.l		%d5, %d4
	swap		%d3
	swap		%d4
	mulu.w		%d5, %d6		# %d6 <- lsw*lsw
	mulu.w		%d3, %d5		# %d5 <- msw-dest*lsw-source
	mulu.w		%d4, %d2		# %d2 <- msw-source*lsw-dest
	mulu.w		%d4, %d3		# %d3 <- msw*msw
# now use swap and addx to consolidate to two longwords
	clr.l		%d4
	swap		%d6
	add.w		%d5, %d6		# add msw of l*l to lsw of m*l product
	addx.w		%d4, %d3		# add any carry to m*m product
	add.w		%d2, %d6		# add in lsw of other m*l product
	addx.w		%d4, %d3		# add any carry to m*m product
	swap		%d6			# %d6 is low 32 bits of final product
	clr.w		%d5
	clr.w		%d2			# lsw of two mixed products used,
	swap		%d5			# now use msws of longwords
	swap		%d2
	add.l		%d2, %d5				
	add.l		%d3, %d5	# %d5 now ms 32 bits of final product
	rts

#########################################################################
# XDEF ****************************************************************	#
#	_060LSP__imulu64_(): Emulate 64-bit unsigned mul instruction	#
#	_060LSP__imuls64_(): Emulate 64-bit signed mul instruction.	#
#									#
#	This is the library version which is accessed as a subroutine	#
#	and therefore does not work exactly like the 680X0 mul{s,u}.l	#
#	64-bit multiply instruction.					#
#									#
# XREF ****************************************************************	#
#	None								#
#									#
# INPUT ***************************************************************	#
#	0x4(sp) = multiplier						#
#	0x8(sp) = multiplicand						#
#	0xc(sp) = pointer to location to place 64-bit result		#
# 									#
# OUTPUT **************************************************************	#
#	0xc(sp) = points to location of 64-bit result			#
#									#
# ALGORITHM ***********************************************************	#
#	Perform the multiply in pieces using 16x16->32 unsigned		#
# multiplies and "add" instructions.					#
#	Set the condition codes as appropriate before performing an	#
# "rts".								#
#									#
#########################################################################

set MUL64_CC, -4

	global		_060LSP__imulu64_
_060LSP__imulu64_:

# PROLOGUE BEGIN ########################################################
	link.w		%a6,&-4
	movm.l		&0x3800,-(%sp)		# save d2-d4
#	fmovm.l		&0x0,-(%sp)		# save no fpregs
# PROLOGUE END ##########################################################

	mov.w		%cc,MUL64_CC(%a6)	# save incoming ccodes

	mov.l		0x8(%a6),%d0		# store multiplier in d0
	beq.w		mulu64_zero		# handle zero separately

	mov.l		0xc(%a6),%d1		# get multiplicand in d1
	beq.w		mulu64_zero		# handle zero separately

#########################################################################
#	63			   32				0	#
# 	----------------------------					#
# 	| hi(mplier) * hi(mplicand)|					#
# 	----------------------------					#
#		     -----------------------------			#
#		     | hi(mplier) * lo(mplicand) |			#
#		     -----------------------------			#
#		     -----------------------------			#
#		     | lo(mplier) * hi(mplicand) |			#
#		     -----------------------------			#
#	  |			   -----------------------------	#
#	--|--			   | lo(mplier) * lo(mplicand) |	#
#	  |			   -----------------------------	#
#	========================================================	#
#	--------------------------------------------------------	#
#	|	hi(result)	   |	    lo(result)         |	#
#	--------------------------------------------------------	#
#########################################################################
mulu64_alg:
# load temp registers with operands
	mov.l		%d0,%d2			# mr in d2
	mov.l		%d0,%d3			# mr in d3
	mov.l		%d1,%d4			# md in d4
	swap		%d3			# hi(mr) in lo d3
	swap		%d4			# hi(md) in lo d4

# complete necessary multiplies:
	mulu.w		%d1,%d0			# [1] lo(mr) * lo(md)
	mulu.w		%d3,%d1			# [2] hi(mr) * lo(md)
	mulu.w		%d4,%d2			# [3] lo(mr) * hi(md)
	mulu.w		%d4,%d3			# [4] hi(mr) * hi(md)

# add lo portions of [2],[3] to hi portion of [1].
# add carries produced from these adds to [4].
# lo([1]) is the final lo 16 bits of the result.
	clr.l		%d4			# load d4 w/ zero value
	swap		%d0			# hi([1]) <==> lo([1])
	add.w		%d1,%d0			# hi([1]) + lo([2])
	addx.l		%d4,%d3			#    [4]  + carry
	add.w		%d2,%d0			# hi([1]) + lo([3])
	addx.l		%d4,%d3			#    [4]  + carry
	swap		%d0			# lo([1]) <==> hi([1])

# lo portions of [2],[3] have been added in to final result.
# now, clear lo, put hi in lo reg, and add to [4]
	clr.w		%d1			# clear lo([2])
	clr.w		%d2			# clear hi([3])
	swap		%d1			# hi([2]) in lo d1
	swap		%d2			# hi([3]) in lo d2
	add.l		%d2,%d1			#    [4]  + hi([2])
	add.l		%d3,%d1			#    [4]  + hi([3])

# now, grab the condition codes. only one that can be set is 'N'.
# 'N' CAN be set if the operation is unsigned if bit 63 is set.
	mov.w		MUL64_CC(%a6),%d4
	andi.b		&0x10,%d4		# keep old 'X' bit
	tst.l		%d1			# may set 'N' bit
	bpl.b		mulu64_ddone
	ori.b		&0x8,%d4		# set 'N' bit
mulu64_ddone:
	mov.w		%d4,%cc

# here, the result is in d1 and d0. the current strategy is to save
# the values at the location pointed to by a0.
# use movm here to not disturb the condition codes.
mulu64_end:
	exg		%d1,%d0		
	movm.l		&0x0003,([0x10,%a6])		# save result

# EPILOGUE BEGIN ########################################################
#	fmovm.l		(%sp)+,&0x0		# restore no fpregs
	movm.l		(%sp)+,&0x001c		# restore d2-d4
	unlk		%a6
# EPILOGUE END ##########################################################

	rts

# one or both of the operands is zero so the result is also zero.
# save the zero result to the register file and set the 'Z' ccode bit.
mulu64_zero:
	clr.l		%d0
	clr.l		%d1

	mov.w		MUL64_CC(%a6),%d4
	andi.b		&0x10,%d4
	ori.b		&0x4,%d4
	mov.w		%d4,%cc			# set 'Z' ccode bit

	bra.b		mulu64_end

##########
# muls.l #
##########
	global		_060LSP__imuls64_
_060LSP__imuls64_:

# PROLOGUE BEGIN ########################################################
	link.w		%a6,&-4
	movm.l		&0x3c00,-(%sp)		# save d2-d5
#	fmovm.l		&0x0,-(%sp)		# save no fpregs
# PROLOGUE END ##########################################################

	mov.w		%cc,MUL64_CC(%a6)	# save incoming ccodes

	mov.l		0x8(%a6),%d0		# store multiplier in d0
	beq.b		mulu64_zero		# handle zero separately

	mov.l		0xc(%a6),%d1		# get multiplicand in d1
	beq.b		mulu64_zero		# handle zero separately

	clr.b		%d5			# clear sign tag
	tst.l		%d0			# is multiplier negative?
	bge.b		muls64_chk_md_sgn	# no
	neg.l		%d0			# make multiplier positive

	ori.b		&0x1,%d5		# save multiplier sgn

# the result sign is the exclusive or of the operand sign bits.
muls64_chk_md_sgn:
	tst.l		%d1			# is multiplicand negative?
	bge.b		muls64_alg		# no	
	neg.l		%d1			# make multiplicand positive

	eori.b		&0x1,%d5		# calculate correct sign

#########################################################################
#	63			   32				0	#
# 	----------------------------					#
# 	| hi(mplier) * hi(mplicand)|					#
# 	----------------------------					#
#		     -----------------------------			#
#		     | hi(mplier) * lo(mplicand) |			#
#		     -----------------------------			#
#		     -----------------------------			#
#		     | lo(mplier) * hi(mplicand) |			#
#		     -----------------------------			#
#	  |			   -----------------------------	#
#	--|--			   | lo(mplier) * lo(mplicand) |	#
#	  |			   -----------------------------	#
#	========================================================	#
#	--------------------------------------------------------	#
#	|	hi(result)	   |	    lo(result)         |	#
#	--------------------------------------------------------	#
#########################################################################
muls64_alg:
# load temp registers with operands
	mov.l		%d0,%d2			# mr in d2
	mov.l		%d0,%d3			# mr in d3
	mov.l		%d1,%d4			# md in d4
	swap		%d3			# hi(mr) in lo d3
	swap		%d4			# hi(md) in lo d4

# complete necessary multiplies:
	mulu.w		%d1,%d0			# [1] lo(mr) * lo(md)
	mulu.w		%d3,%d1			# [2] hi(mr) * lo(md)
	mulu.w		%d4,%d2			# [3] lo(mr) * hi(md)
	mulu.w		%d4,%d3			# [4] hi(mr) * hi(md)

# add lo portions of [2],[3] to hi portion of [1].
# add carries produced from these adds to [4].
# lo([1]) is the final lo 16 bits of the result.
	clr.l		%d4			# load d4 w/ zero value
	swap		%d0			# hi([1]) <==> lo([1])
	add.w		%d1,%d0			# hi([1]) + lo([2])
	addx.l		%d4,%d3			#    [4]  + carry
	add.w		%d2,%d0			# hi([1]) + lo([3])
	addx.l		%d4,%d3			#    [4]  + carry
	swap		%d0			# lo([1]) <==> hi([1])

# lo portions of [2],[3] have been added in to final result.
# now, clear lo, put hi in lo reg, and add to [4]
	clr.w		%d1			# clear lo([2])
	clr.w		%d2			# clear hi([3])
	swap		%d1			# hi([2]) in lo d1
	swap		%d2			# hi([3]) in lo d2
	add.l		%d2,%d1			#    [4]  + hi([2])
	add.l		%d3,%d1			#    [4]  + hi([3])

	tst.b		%d5			# should result be signed?
	beq.b		muls64_done		# no

# result should be a signed negative number.
# compute 2's complement of the unsigned number:
#   -negate all bits and add 1
muls64_neg:
	not.l		%d0			# negate lo(result) bits
	not.l		%d1			# negate hi(result) bits
	addq.l		&1,%d0			# add 1 to lo(result)
	addx.l		%d4,%d1			# add carry to hi(result)

muls64_done:
	mov.w		MUL64_CC(%a6),%d4
	andi.b		&0x10,%d4		# keep old 'X' bit
	tst.l		%d1			# may set 'N' bit
	bpl.b		muls64_ddone
	ori.b		&0x8,%d4		# set 'N' bit
muls64_ddone:
	mov.w		%d4,%cc

# here, the result is in d1 and d0. the current strategy is to save
# the values at the location pointed to by a0.
# use movm here to not disturb the condition codes.
muls64_end:
	exg		%d1,%d0		
	movm.l		&0x0003,([0x10,%a6])	# save result at (a0)

# EPILOGUE BEGIN ########################################################
#	fmovm.l		(%sp)+,&0x0		# restore no fpregs
	movm.l		(%sp)+,&0x003c		# restore d2-d5
	unlk		%a6
# EPILOGUE END ##########################################################

	rts

# one or both of the operands is zero so the result is also zero.
# save the zero result to the register file and set the 'Z' ccode bit.
muls64_zero:
	clr.l		%d0
	clr.l		%d1

	mov.w		MUL64_CC(%a6),%d4
	andi.b		&0x10,%d4
	ori.b		&0x4,%d4
	mov.w		%d4,%cc			# set 'Z' ccode bit

	bra.b		muls64_end

#########################################################################
# XDEF ****************************************************************	#
#	_060LSP__cmp2_Ab_(): Emulate "cmp2.b An,<ea>".			#
#	_060LSP__cmp2_Aw_(): Emulate "cmp2.w An,<ea>".			#
#	_060LSP__cmp2_Al_(): Emulate "cmp2.l An,<ea>".			#
#	_060LSP__cmp2_Db_(): Emulate "cmp2.b Dn,<ea>".			#
#	_060LSP__cmp2_Dw_(): Emulate "cmp2.w Dn,<ea>".			#
#	_060LSP__cmp2_Dl_(): Emulate "cmp2.l Dn,<ea>".			#
#									#
#	This is the library version which is accessed as a subroutine	#
#	and therefore does not work exactly like the 680X0 "cmp2"	#
#	instruction.							#
#									#
# XREF ****************************************************************	#
#	None								#
#									#
# INPUT ***************************************************************	#
#	0x4(sp) = Rn							#
#	0x8(sp) = pointer to boundary pair				#
# 									#
# OUTPUT **************************************************************	#
#	cc = condition codes are set correctly				#
#									#
# ALGORITHM ***********************************************************	#
# 	In the interest of simplicity, all operands are converted to	#
# longword size whether the operation is byte, word, or long. The	#
# bounds are sign extended accordingly. If Rn is a data regsiter, Rn is #
# also sign extended. If Rn is an address register, it need not be sign #
# extended since the full register is always used.			#
#	The condition codes are set correctly before the final "rts".	#
#									#
#########################################################################

set	CMP2_CC,	-4

	global 		_060LSP__cmp2_Ab_
_060LSP__cmp2_Ab_:

# PROLOGUE BEGIN ########################################################
	link.w		%a6,&-4
	movm.l		&0x3800,-(%sp)		# save d2-d4
#	fmovm.l		&0x0,-(%sp)		# save no fpregs
# PROLOGUE END ##########################################################

	mov.w		%cc,CMP2_CC(%a6)
	mov.l		0x8(%a6), %d2 		# get regval

	mov.b		([0xc,%a6],0x0),%d0
	mov.b		([0xc,%a6],0x1),%d1

	extb.l		%d0			# sign extend lo bnd
	extb.l		%d1			# sign extend hi bnd
	bra.w		l_cmp2_cmp		# go do the compare emulation

	global 		_060LSP__cmp2_Aw_
_060LSP__cmp2_Aw_:

# PROLOGUE BEGIN ########################################################
	link.w		%a6,&-4
	movm.l		&0x3800,-(%sp)		# save d2-d4
#	fmovm.l		&0x0,-(%sp)		# save no fpregs
# PROLOGUE END ##########################################################

	mov.w		%cc,CMP2_CC(%a6)
	mov.l		0x8(%a6), %d2 		# get regval

	mov.w		([0xc,%a6],0x0),%d0
	mov.w		([0xc,%a6],0x2),%d1

	ext.l		%d0			# sign extend lo bnd
	ext.l		%d1			# sign extend hi bnd
	bra.w		l_cmp2_cmp		# go do the compare emulation

	global 		_060LSP__cmp2_Al_
_060LSP__cmp2_Al_:

# PROLOGUE BEGIN ########################################################
	link.w		%a6,&-4
	movm.l		&0x3800,-(%sp)		# save d2-d4
#	fmovm.l		&0x0,-(%sp)		# save no fpregs
# PROLOGUE END ##########################################################

	mov.w		%cc,CMP2_CC(%a6)
	mov.l		0x8(%a6), %d2 		# get regval

	mov.l		([0xc,%a6],0x0),%d0
	mov.l		([0xc,%a6],0x4),%d1
	bra.w		l_cmp2_cmp		# go do the compare emulation

	global 		_060LSP__cmp2_Db_
_060LSP__cmp2_Db_:

# PROLOGUE BEGIN ########################################################
	link.w		%a6,&-4
	movm.l		&0x3800,-(%sp)		# save d2-d4
#	fmovm.l		&0x0,-(%sp)		# save no fpregs
# PROLOGUE END ##########################################################

	mov.w		%cc,CMP2_CC(%a6)
	mov.l		0x8(%a6), %d2 		# get regval

	mov.b		([0xc,%a6],0x0),%d0
	mov.b		([0xc,%a6],0x1),%d1

	extb.l		%d0			# sign extend lo bnd
	extb.l		%d1			# sign extend hi bnd

# operation is a data register compare.
# sign extend byte to long so we can do simple longword compares.
	extb.l		%d2			# sign extend data byte
	bra.w		l_cmp2_cmp		# go do the compare emulation

	global 		_060LSP__cmp2_Dw_
_060LSP__cmp2_Dw_:

# PROLOGUE BEGIN ########################################################
	link.w		%a6,&-4
	movm.l		&0x3800,-(%sp)		# save d2-d4
#	fmovm.l		&0x0,-(%sp)		# save no fpregs
# PROLOGUE END ##########################################################

	mov.w		%cc,CMP2_CC(%a6)
	mov.l		0x8(%a6), %d2 		# get regval

	mov.w		([0xc,%a6],0x0),%d0
	mov.w		([0xc,%a6],0x2),%d1

	ext.l		%d0			# sign extend lo bnd
	ext.l		%d1			# sign extend hi bnd

# operation is a data register compare.
# sign extend word to long so we can do simple longword compares.
	ext.l		%d2			# sign extend data word
	bra.w		l_cmp2_cmp		# go emulate compare

	global 		_060LSP__cmp2_Dl_
_060LSP__cmp2_Dl_:

# PROLOGUE BEGIN ########################################################
	link.w		%a6,&-4
	movm.l		&0x3800,-(%sp)		# save d2-d4
#	fmovm.l		&0x0,-(%sp)		# save no fpregs
# PROLOGUE END ##########################################################

	mov.w		%cc,CMP2_CC(%a6)
	mov.l		0x8(%a6), %d2 		# get regval

	mov.l		([0xc,%a6],0x0),%d0
	mov.l		([0xc,%a6],0x4),%d1

#
# To set the ccodes correctly:
# 	(1) save 'Z' bit from (Rn - lo)
#	(2) save 'Z' and 'N' bits from ((hi - lo) - (Rn - hi))
#	(3) keep 'X', 'N', and 'V' from before instruction
#	(4) combine ccodes
#
l_cmp2_cmp:
	sub.l		%d0, %d2		# (Rn - lo)
	mov.w		%cc, %d3		# fetch resulting ccodes
	andi.b		&0x4, %d3		# keep 'Z' bit
	sub.l		%d0, %d1		# (hi - lo)
	cmp.l	 	%d1,%d2			# ((hi - lo) - (Rn - hi))

	mov.w		%cc, %d4		# fetch resulting ccodes
	or.b		%d4, %d3		# combine w/ earlier ccodes
	andi.b		&0x5, %d3		# keep 'Z' and 'N'

	mov.w		CMP2_CC(%a6), %d4	# fetch old ccodes
	andi.b		&0x1a, %d4		# keep 'X','N','V' bits
	or.b		%d3, %d4		# insert new ccodes
	mov.w		%d4,%cc			# save new ccodes

# EPILOGUE BEGIN ########################################################
#	fmovm.l		(%sp)+,&0x0		# restore no fpregs
	movm.l		(%sp)+,&0x001c		# restore d2-d4
	unlk		%a6
# EPILOGUE END ##########################################################

	rts
~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
MOTOROLA MICROPROCESSOR & MEMORY TECHNOLOGY GROUP
M68000 Hi-Performance Microprocessor Division
M68060 Software Package
Production Release P1.00 -- October 10, 1994

M68060 Software Package Copyright � 1993, 1994 Motorola Inc.  All rights reserved.
 
THE SOFTWARE is provided on an "AS IS" basis and without warranty.
To the maximum extent permitted by applicable law,
MOTOROLA DISCLAIMS ALL WARRANTIES WHETHER EXPRESS OR IMPLIED, 
INCLUDING IMPLIED WARRANTIES OF MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE
and any warranty against infringement with regard to the SOFTWARE
(INCLUDING ANY MODIFIED VERSIONS THEREOF) and any accompanying written materials.

To the maximum extent permitted by applicable law,
IN NO EVENT SHALL MOTOROLA BE LIABLE FOR ANY DAMAGES WHATSOEVER
(INCLUDING WITHOUT LIMITATION, DAMAGES FOR LOSS OF BUSINESS PROFITS,
BUSINESS INTERRUPTION, LOSS OF BUSINESS INFORMATION, OR OTHER PECUNIARY LOSS)
ARISING OF THE USE OR INABILITY TO USE THE SOFTWARE.
Motorola assumes no responsibility for the maintenance and support of the SOFTWARE.

You are hereby granted a copyright license to use, modify, and distribute the SOFTWARE
so long as this entire notice is retained without alteration in any modified and/or
redistributed versions, and that such modified versions are clearly identified as such.
No licenses are granted by implication, estoppel or otherwise under any patents
or trademarks of Motorola, Inc.
~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
# ireal.s:
#	This file is appended to the top of the 060ISP package
# and contains the entry points into the package. The user, in
# effect, branches to one of the branch table entries located
# after _060ISP_TABLE.
#	Also, subroutine stubs exist in this file (_isp_done for
# example) that are referenced by the ISP package itself in order
# to call a given routine. The stub routine actually performs the
# callout. The ISP code does a "bsr" to the stub routine. This
# extra layer of hierarchy adds a slight performance penalty but
# it makes the ISP code easier to read and more mainatinable.
#

set	_off_chk,	0x00
set	_off_divbyzero,	0x04
set	_off_trace,	0x08
set	_off_access,	0x0c
set	_off_done,	0x10

set	_off_cas,	0x14
set	_off_cas2,	0x18
set	_off_lock,	0x1c
set	_off_unlock,	0x20

set	_off_imr,	0x40
set	_off_dmr,	0x44
set	_off_dmw,	0x48
set	_off_irw,	0x4c
set	_off_irl,	0x50
set	_off_drb,	0x54
set	_off_drw,	0x58
set	_off_drl,	0x5c
set	_off_dwb,	0x60
set	_off_dww,	0x64
set	_off_dwl,	0x68

_060ISP_TABLE:

# Here's the table of ENTRY POINTS for those linking the package.
	bra.l		_isp_unimp
	short		0x0000

	bra.l		_isp_cas
	short		0x0000

	bra.l		_isp_cas2
	short		0x0000

	bra.l		_isp_cas_finish
	short		0x0000

	bra.l		_isp_cas2_finish
	short		0x0000

	bra.l		_isp_cas_inrange
	short		0x0000

	bra.l		_isp_cas_terminate
	short		0x0000

	bra.l		_isp_cas_restart
	short		0x0000

	space		64

#############################################################

	global		_real_chk
_real_chk:
	mov.l		%d0,-(%sp)
	mov.l		(_060ISP_TABLE-0x80+_off_chk,%pc),%d0
	pea.l		(_060ISP_TABLE-0x80,%pc,%d0)
	mov.l		0x4(%sp),%d0
	rtd		&0x4

	global		_real_divbyzero
_real_divbyzero:
	mov.l		%d0,-(%sp)
	mov.l		(_060ISP_TABLE-0x80+_off_divbyzero,%pc),%d0
	pea.l		(_060ISP_TABLE-0x80,%pc,%d0)
	mov.l		0x4(%sp),%d0
	rtd		&0x4

	global		_real_trace
_real_trace:
	mov.l		%d0,-(%sp)
	mov.l		(_060ISP_TABLE-0x80+_off_trace,%pc),%d0
	pea.l		(_060ISP_TABLE-0x80,%pc,%d0)
	mov.l		0x4(%sp),%d0
	rtd		&0x4

	global		_real_access
_real_access:
	mov.l		%d0,-(%sp)
	mov.l		(_060ISP_TABLE-0x80+_off_access,%pc),%d0
	pea.l		(_060ISP_TABLE-0x80,%pc,%d0)
	mov.l		0x4(%sp),%d0
	rtd		&0x4

	global		_isp_done
_isp_done:
	mov.l		%d0,-(%sp)
	mov.l		(_060ISP_TABLE-0x80+_off_done,%pc),%d0
	pea.l		(_060ISP_TABLE-0x80,%pc,%d0)
	mov.l		0x4(%sp),%d0
	rtd		&0x4

#######################################

	global		_real_cas
_real_cas:
	mov.l		%d0,-(%sp)
	mov.l		(_060ISP_TABLE-0x80+_off_cas,%pc),%d0
	pea.l		(_060ISP_TABLE-0x80,%pc,%d0)
	mov.l		0x4(%sp),%d0
	rtd		&0x4

	global		_real_cas2
_real_cas2:
	mov.l		%d0,-(%sp)
	mov.l		(_060ISP_TABLE-0x80+_off_cas2,%pc),%d0
	pea.l		(_060ISP_TABLE-0x80,%pc,%d0)
	mov.l		0x4(%sp),%d0
	rtd		&0x4

	global		_real_lock_page
_real_lock_page:
	mov.l		%d0,-(%sp)
	mov.l		(_060ISP_TABLE-0x80+_off_lock,%pc),%d0
	pea.l		(_060ISP_TABLE-0x80,%pc,%d0)
	mov.l		0x4(%sp),%d0
	rtd		&0x4

	global		_real_unlock_page
_real_unlock_page:
	mov.l		%d0,-(%sp)
	mov.l		(_060ISP_TABLE-0x80+_off_unlock,%pc),%d0
	pea.l		(_060ISP_TABLE-0x80,%pc,%d0)
	mov.l		0x4(%sp),%d0
	rtd		&0x4

#######################################

	global		_imem_read
_imem_read:
	mov.l		%d0,-(%sp)
	mov.l		(_060ISP_TABLE-0x80+_off_imr,%pc),%d0
	pea.l		(_060ISP_TABLE-0x80,%pc,%d0)
	mov.l		0x4(%sp),%d0
	rtd		&0x4

	global		_dmem_read
_dmem_read:
	mov.l		%d0,-(%sp)
	mov.l		(_060ISP_TABLE-0x80+_off_dmr,%pc),%d0
	pea.l		(_060ISP_TABLE-0x80,%pc,%d0)
	mov.l		0x4(%sp),%d0
	rtd		&0x4

	global		_dmem_write
_dmem_write:
	mov.l		%d0,-(%sp)
	mov.l		(_060ISP_TABLE-0x80+_off_dmw,%pc),%d0
	pea.l		(_060ISP_TABLE-0x80,%pc,%d0)
	mov.l		0x4(%sp),%d0
	rtd		&0x4

	global		_imem_read_word
_imem_read_word:
	mov.l		%d0,-(%sp)
	mov.l		(_060ISP_TABLE-0x80+_off_irw,%pc),%d0
	pea.l		(_060ISP_TABLE-0x80,%pc,%d0)
	mov.l		0x4(%sp),%d0
	rtd		&0x4

	global		_imem_read_long
_imem_read_long:
	mov.l		%d0,-(%sp)
	mov.l		(_060ISP_TABLE-0x80+_off_irl,%pc),%d0
	pea.l		(_060ISP_TABLE-0x80,%pc,%d0)
	mov.l		0x4(%sp),%d0
	rtd		&0x4

	global		_dmem_read_byte
_dmem_read_byte:
	mov.l		%d0,-(%sp)
	mov.l		(_060ISP_TABLE-0x80+_off_drb,%pc),%d0
	pea.l		(_060ISP_TABLE-0x80,%pc,%d0)
	mov.l		0x4(%sp),%d0
	rtd		&0x4

	global		_dmem_read_word
_dmem_read_word:
	mov.l		%d0,-(%sp)
	mov.l		(_060ISP_TABLE-0x80+_off_drw,%pc),%d0
	pea.l		(_060ISP_TABLE-0x80,%pc,%d0)
	mov.l		0x4(%sp),%d0
	rtd		&0x4

	global		_dmem_read_long
_dmem_read_long:
	mov.l		%d0,-(%sp)
	mov.l		(_060ISP_TABLE-0x80+_off_drl,%pc),%d0
	pea.l		(_060ISP_TABLE-0x80,%pc,%d0)
	mov.l		0x4(%sp),%d0
	rtd		&0x4

	global		_dmem_write_byte
_dmem_write_byte:
	mov.l		%d0,-(%sp)
	mov.l		(_060ISP_TABLE-0x80+_off_dwb,%pc),%d0
	pea.l		(_060ISP_TABLE-0x80,%pc,%d0)
	mov.l		0x4(%sp),%d0
	rtd		&0x4

	global		_dmem_write_word
_dmem_write_word:
	mov.l		%d0,-(%sp)
	mov.l		(_060ISP_TABLE-0x80+_off_dww,%pc),%d0
	pea.l		(_060ISP_TABLE-0x80,%pc,%d0)
	mov.l		0x4(%sp),%d0
	rtd		&0x4

	global		_dmem_write_long
_dmem_write_long:
	mov.l		%d0,-(%sp)
	mov.l		(_060ISP_TABLE-0x80+_off_dwl,%pc),%d0
	pea.l		(_060ISP_TABLE-0x80,%pc,%d0)
	mov.l		0x4(%sp),%d0
	rtd		&0x4

#
# This file contains a set of define statements for constants
# in oreder to promote readability within the core code itself.
#

set LOCAL_SIZE,		96			# stack frame size(bytes)
set LV,			-LOCAL_SIZE		# stack offset

set EXC_ISR,		0x4			# stack status register
set EXC_IPC,		0x6			# stack pc
set EXC_IVOFF,		0xa			# stacked vector offset

set EXC_AREGS,		LV+64			# offset of all address regs
set EXC_DREGS,		LV+32			# offset of all data regs

set EXC_A7,		EXC_AREGS+(7*4)		# offset of a7
set EXC_A6,		EXC_AREGS+(6*4)		# offset of a6
set EXC_A5,		EXC_AREGS+(5*4)		# offset of a5
set EXC_A4,		EXC_AREGS+(4*4)		# offset of a4
set EXC_A3,		EXC_AREGS+(3*4)		# offset of a3
set EXC_A2,		EXC_AREGS+(2*4)		# offset of a2
set EXC_A1,		EXC_AREGS+(1*4)		# offset of a1
set EXC_A0,		EXC_AREGS+(0*4)		# offset of a0
set EXC_D7,		EXC_DREGS+(7*4)		# offset of d7
set EXC_D6,		EXC_DREGS+(6*4)		# offset of d6
set EXC_D5,		EXC_DREGS+(5*4)		# offset of d5
set EXC_D4,		EXC_DREGS+(4*4)		# offset of d4
set EXC_D3,		EXC_DREGS+(3*4)		# offset of d3
set EXC_D2,		EXC_DREGS+(2*4)		# offset of d2
set EXC_D1,		EXC_DREGS+(1*4)		# offset of d1
set EXC_D0,		EXC_DREGS+(0*4)		# offset of d0

set EXC_TEMP,		LV+16			# offset of temp stack space

set EXC_SAVVAL,		LV+12			# offset of old areg value
set EXC_SAVREG,		LV+11			# offset of old areg index

set SPCOND_FLG,		LV+10			# offset of spc condition flg

set EXC_CC,		LV+8			# offset of cc register
set EXC_EXTWPTR,	LV+4			# offset of current PC
set EXC_EXTWORD,	LV+2			# offset of current ext opword
set EXC_OPWORD,		LV+0			# offset of current opword

###########################
# SPecial CONDition FLaGs #
###########################
set mia7_flg,		0x04			# (a7)+ flag
set mda7_flg,		0x08			# -(a7) flag
set ichk_flg,		0x10			# chk exception flag
set idbyz_flg,		0x20			# divbyzero flag
set restore_flg,	0x40			# restore -(an)+ flag
set immed_flg,		0x80			# immediate data flag

set mia7_bit,		0x2			# (a7)+ bit
set mda7_bit,		0x3			# -(a7) bit
set ichk_bit,		0x4			# chk exception bit
set idbyz_bit,		0x5			# divbyzero bit
set restore_bit,	0x6			# restore -(a7)+ bit
set immed_bit,		0x7			# immediate data bit

#########
# Misc. #
#########
set BYTE,		1			# len(byte) == 1 byte
set WORD, 		2			# len(word) == 2 bytes
set LONG, 		4			# len(longword) == 4 bytes

#########################################################################
# XDEF ****************************************************************	#
#	_isp_unimp(): 060ISP entry point for Unimplemented Instruction	#
#									#
#	This handler should be the first code executed upon taking the 	#
# 	"Unimplemented Integer Instruction" exception in an operating	#
#	system.								#
#									#
# XREF ****************************************************************	#
#	_imem_read_{word,long}() - read instruction word/longword	#
#	_mul64() - emulate 64-bit multiply				#
# 	_div64() - emulate 64-bit divide				#
#	_moveperipheral() - emulate "movep"				#
#	_compandset() - emulate misaligned "cas"			#
#	_compandset2() - emulate "cas2"					#
#	_chk2_cmp2() - emulate "cmp2" and "chk2"			#
#	_isp_done() - "callout" for normal final exit			#
#	_real_trace() - "callout" for Trace exception			#
#	_real_chk() - "callout" for Chk exception			#
#	_real_divbyzero() - "callout" for DZ exception			#
#	_real_access() - "callout" for access error exception		#
#									#
# INPUT ***************************************************************	#
#	- The system stack contains the Unimp Int Instr stack frame	#
# 									#
# OUTPUT **************************************************************	#
#	If Trace exception:						#
#	- The system stack changed to contain Trace exc stack frame	#
#	If Chk exception:						#
#	- The system stack changed to contain Chk exc stack frame	#
#	If DZ exception:						#
#	- The system stack changed to contain DZ exc stack frame	#
#	If access error exception:					#
#	- The system stack changed to contain access err exc stk frame	#
#	Else:								#
#	- Results saved as appropriate					#
#									#
# ALGORITHM ***********************************************************	#
#	This handler fetches the first instruction longword from	#
# memory and decodes it to determine which of the unimplemented		#
# integer instructions caused this exception. This handler then calls	#
# one of _mul64(), _div64(), _moveperipheral(), _compandset(), 		#
# _compandset2(), or _chk2_cmp2() as appropriate. 			#
#	Some of these instructions, by their nature, may produce other	#
# types of exceptions. "div" can produce a divide-by-zero exception,	#
# and "chk2" can cause a "Chk" exception. In both cases, the current	#
# exception stack frame must be converted to an exception stack frame	#
# of the correct exception type and an exit must be made through	#
# _real_divbyzero() or _real_chk() as appropriate. In addition, all	#
# instructions may be executing while Trace is enabled. If so, then	#
# a Trace exception stack frame must be created and an exit made 	#
# through _real_trace().						#
#	Meanwhile, if any read or write to memory using the		#
# _mem_{read,write}() "callout"s returns a failing value, then an	#
# access error frame must be created and an exit made through		#
# _real_access().							#
#	If none of these occur, then a normal exit is made through	#
# _isp_done().								#
#									#
#	This handler, upon entry, saves almost all user-visible 	#
# address and data registers to the stack. Although this may seem to	#
# cause excess memory traffic, it was found that due to having to	#
# access these register files for things like data retrieval and <ea>	#
# calculations, it was more efficient to have them on the stack where	#
# they could be accessed by indexing rather than to make subroutine 	#
# calls to retrieve a register of a particular index. 			#
#									#
#########################################################################

	global		_isp_unimp
_isp_unimp:
	link.w 		%a6,&-LOCAL_SIZE	# create room for stack frame

	movm.l		&0x3fff,EXC_DREGS(%a6)	# store d0-d7/a0-a5
	mov.l		(%a6),EXC_A6(%a6)	# store a6

	btst		&0x5,EXC_ISR(%a6)	# from s or u mode?
	bne.b		uieh_s			# supervisor mode
uieh_u:
	mov.l		%usp,%a0		# fetch user stack pointer
	mov.l		%a0,EXC_A7(%a6)		# store a7
	bra.b		uieh_cont
uieh_s:
	lea		0xc(%a6),%a0
	mov.l		%a0,EXC_A7(%a6)		# store corrected sp

###############################################################################

uieh_cont:
	clr.b		SPCOND_FLG(%a6)		# clear "special case" flag

	mov.w		EXC_ISR(%a6),EXC_CC(%a6) # store cc copy on stack
	mov.l		EXC_IPC(%a6),EXC_EXTWPTR(%a6) # store extwptr on stack

#
# fetch the opword and first extension word pointed to by the stacked pc
# and store them to the stack for now
#
	mov.l		EXC_EXTWPTR(%a6),%a0	# fetch instruction addr
	addq.l		&0x4,EXC_EXTWPTR(%a6)	# incr instruction ptr
	bsr.l		_imem_read_long		# fetch opword & extword
	mov.l		%d0,EXC_OPWORD(%a6)	# store extword on stack

	
#########################################################################
# muls.l	0100 1100 00 |<ea>|	0*** 1100 0000 0*** 		#
# mulu.l	0100 1100 00 |<ea>|	0*** 0100 0000 0***		#
#									#
# divs.l	0100 1100 01 |<ea>|	0*** 1100 0000 0***		#
# divu.l	0100 1100 01 |<ea>|	0*** 0100 0000 0***		#
#									#
# movep.w m2r	0000 ***1 00 001***	| <displacement>  |		#
# movep.l m2r	0000 ***1 01 001***	| <displacement>  |		#
# movep.w r2m	0000 ***1 10 001***	| <displacement>  |		#
# movep.l r2m	0000 ***1 11 001***	| <displacement>  |		#
#									#
# cas.w		0000 1100 11 |<ea>|	0000 000* **00 0***		#
# cas.l		0000 1110 11 |<ea>|	0000 000* **00 0***		#
#									#
# cas2.w	0000 1100 11 111100	**** 000* **00 0***		#
#					**** 000* **00 0***		#
# cas2.l	0000 1110 11 111100	**** 000* **00 0***		#
#					**** 000* **00 0***		#
#									#
# chk2.b	0000 0000 11 |<ea>|	**** 1000 0000 0000		#
# chk2.w	0000 0010 11 |<ea>|	**** 1000 0000 0000		#
# chk2.l	0000 0100 11 |<ea>|	**** 1000 0000 0000		#
#									#
# cmp2.b	0000 0000 11 |<ea>|	**** 0000 0000 0000		#
# cmp2.w	0000 0010 11 |<ea>|	**** 0000 0000 0000		#
# cmp2.l	0000 0100 11 |<ea>|	**** 0000 0000 0000		#
#########################################################################

#
# using bit 14 of the operation word, separate into 2 groups:
# (group1) mul64, div64
# (group2) movep, chk2, cmp2, cas2, cas
#
	btst		&0x1e,%d0		# group1 or group2
	beq.b		uieh_group2		# go handle group2

#
# now, w/ group1, make mul64's decode the fastest since it will
# most likely be used the most.
#
uieh_group1:
	btst		&0x16,%d0		# test for div64
	bne.b		uieh_div64		# go handle div64

uieh_mul64:
# mul64() may use ()+ addressing and may, therefore, alter a7

	bsr.l		_mul64			# _mul64()

	btst		&0x5,EXC_ISR(%a6)	# supervisor mode?
	beq.w		uieh_done
	btst		&mia7_bit,SPCOND_FLG(%a6) # was a7 changed?
	beq.w		uieh_done		# no
	btst		&0x7,EXC_ISR(%a6)	# is trace enabled?
	bne.w		uieh_trace_a7		# yes
	bra.w		uieh_a7			# no

uieh_div64:
# div64() may use ()+ addressing and may, therefore, alter a7.
# div64() may take a divide by zero exception.

	bsr.l		_div64			# _div64()

# here, we sort out all of the special cases that may have happened.
	btst		&mia7_bit,SPCOND_FLG(%a6) # was a7 changed?
	bne.b		uieh_div64_a7		# yes
uieh_div64_dbyz:
	btst		&idbyz_bit,SPCOND_FLG(%a6) # did divide-by-zero occur?
	bne.w		uieh_divbyzero		# yes
	bra.w		uieh_done		# no
uieh_div64_a7:
	btst		&0x5,EXC_ISR(%a6)	# supervisor mode?
	beq.b		uieh_div64_dbyz		# no
# here, a7 has been incremented by 4 bytes in supervisor mode. we still
# may have the following 3 cases:
#	(i)	(a7)+
#	(ii)	(a7)+; trace
#	(iii)	(a7)+; divide-by-zero
#
	btst		&idbyz_bit,SPCOND_FLG(%a6) # did divide-by-zero occur?
	bne.w		uieh_divbyzero_a7	# yes
	tst.b		EXC_ISR(%a6)		# no; is trace enabled?
	bmi.w		uieh_trace_a7		# yes
	bra.w		uieh_a7			# no
	
#
# now, w/ group2, make movep's decode the fastest since it will
# most likely be used the most.
#
uieh_group2:
	btst		&0x18,%d0		# test for not movep
	beq.b		uieh_not_movep


	bsr.l		_moveperipheral		# _movep()
	bra.w		uieh_done

uieh_not_movep:
	btst		&0x1b,%d0		# test for chk2,cmp2
	beq.b		uieh_chk2cmp2		# go handle chk2,cmp2

	swap		%d0			# put opword in lo word
	cmpi.b	 	%d0,&0xfc		# test for cas2
	beq.b		uieh_cas2		# go handle cas2

uieh_cas:

	bsr.l		_compandset		# _cas()

# the cases of "cas Dc,Du,(a7)+" and "cas Dc,Du,-(a7)" used from supervisor
# mode are simply not considered valid and therefore are not handled.

	bra.w		uieh_done

uieh_cas2:

	mov.l		EXC_EXTWPTR(%a6),%a0	# fetch instruction addr
	addq.l		&0x2,EXC_EXTWPTR(%a6)	# incr instruction ptr
	bsr.l		_imem_read_word		# read extension word

	tst.l		%d1			# ifetch error?
	bne.w		isp_iacc		# yes

	bsr.l		_compandset2		# _cas2()
	bra.w		uieh_done

uieh_chk2cmp2:
# chk2 may take a chk exception

	bsr.l		_chk2_cmp2		# _chk2_cmp2()

# here we check to see if a chk trap should be taken
	cmpi.b		SPCOND_FLG(%a6),&ichk_flg
	bne.w		uieh_done
	bra.b		uieh_chk_trap

###########################################################################

#
# the required emulation has been completed. now, clean up the necessary stack
# info and prepare for rte
#
uieh_done:
	mov.b		EXC_CC+1(%a6),EXC_ISR+1(%a6) # insert new ccodes

# if exception occurred in user mode, then we have to restore a7 in case it
# changed. we don't have to update a7  for supervisor mose because that case
# doesn't flow through here
	btst		&0x5,EXC_ISR(%a6)	# user or supervisor?
	bne.b		uieh_finish		# supervisor

	mov.l		EXC_A7(%a6),%a0		# fetch user stack pointer
	mov.l		%a0,%usp		# restore it

uieh_finish:
	movm.l		EXC_DREGS(%a6),&0x3fff 	# restore d0-d7/a0-a5

	btst		&0x7,EXC_ISR(%a6)	# is trace mode on?
	bne.b		uieh_trace		# yes;go handle trace mode

	mov.l		EXC_EXTWPTR(%a6),EXC_IPC(%a6) # new pc on stack frame
	mov.l		EXC_A6(%a6),(%a6)	# prepare new a6 for unlink
	unlk		%a6			# unlink stack frame
	bra.l		_isp_done

#
# The instruction that was just emulated was also being traced. The trace 
# trap for this instruction will be lost unless we jump to the trace handler.
# So, here we create a Trace Exception format number two exception stack
# frame from the Unimplemented Integer Intruction Exception stack frame
# format number zero and jump to the user supplied hook "_real_trace()".
#
#		   UIEH FRAME		   TRACE FRAME
#		*****************	*****************
#		* 0x0 *  0x0f4	*	*    Current	*
#		*****************	*      PC	*
#		*    Current	*	*****************
#		*      PC 	*	* 0x2 *  0x024	*
#		*****************	*****************
#		*      SR	*	*     Next	*
#		*****************	*      PC	*
#	      ->*     Old   	*	*****************
#  from link -->*      A6	*	*      SR	*
#	        *****************	*****************
#	       /*      A7	*	*      New	* <-- for final unlink
#	      / *		*	*      A6	*
# link frame <  *****************	*****************
#	      \ ~		~	~		~
#	       \*****************	*****************
#
uieh_trace:
	mov.l		EXC_A6(%a6),-0x4(%a6)
	mov.w		EXC_ISR(%a6),0x0(%a6)
	mov.l		EXC_IPC(%a6),0x8(%a6)
	mov.l		EXC_EXTWPTR(%a6),0x2(%a6)
	mov.w		&0x2024,0x6(%a6)
	sub.l		&0x4,%a6
	unlk		%a6
	bra.l		_real_trace

#
#	   UIEH FRAME		    CHK FRAME
#	*****************	*****************
#	* 0x0 *  0x0f4	*	*    Current	*
#	*****************	*      PC	*
#	*    Current	*	*****************
#	*      PC	*	* 0x2 *  0x018	*
#	*****************	*****************
#	*      SR	*	*     Next	*
#	*****************	*      PC	*
#	    (4 words)		*****************
#				*      SR	*
#				*****************
#				    (6 words)
#
# the chk2 instruction should take a chk trap. so, here we must create a
# chk stack frame from an unimplemented integer instruction exception frame
# and jump to the user supplied entry point "_real_chk()".
#
uieh_chk_trap:
	mov.b		EXC_CC+1(%a6),EXC_ISR+1(%a6) # insert new ccodes
	movm.l		EXC_DREGS(%a6),&0x3fff 	# restore d0-d7/a0-a5

	mov.w		EXC_ISR(%a6),(%a6)	# put new SR on stack
	mov.l		EXC_IPC(%a6),0x8(%a6)	# put "Current PC" on stack
	mov.l		EXC_EXTWPTR(%a6),0x2(%a6) # put "Next PC" on stack
	mov.w		&0x2018,0x6(%a6)	# put Vector Offset on stack

	mov.l		EXC_A6(%a6),%a6		# restore a6
	add.l		&LOCAL_SIZE,%sp		# clear stack frame

	bra.l		_real_chk

#
#	   UIEH FRAME		 DIVBYZERO FRAME
#	*****************	*****************
#	* 0x0 *  0x0f4	*	*    Current	*
#	*****************	*      PC	*
#	*    Current	*	*****************
#	*      PC	*	* 0x2 *  0x014	*
#	*****************	*****************
#	*      SR	*	*     Next	*
#	*****************	*      PC	*
#	    (4 words)		*****************
#				*      SR	*
#				*****************
#				    (6 words)
#
# the divide instruction should take an integer divide by zero trap. so, here 
# we must create a divbyzero stack frame from an unimplemented integer 
# instruction exception frame and jump to the user supplied entry point 
# "_real_divbyzero()".
#
uieh_divbyzero:
	mov.b		EXC_CC+1(%a6),EXC_ISR+1(%a6) # insert new ccodes
	movm.l		EXC_DREGS(%a6),&0x3fff 	# restore d0-d7/a0-a5

	mov.w		EXC_ISR(%a6),(%a6)	# put new SR on stack
	mov.l		EXC_IPC(%a6),0x8(%a6)	# put "Current PC" on stack
	mov.l		EXC_EXTWPTR(%a6),0x2(%a6) # put "Next PC" on stack
	mov.w		&0x2014,0x6(%a6)	# put Vector Offset on stack

	mov.l		EXC_A6(%a6),%a6		# restore a6
	add.l		&LOCAL_SIZE,%sp		# clear stack frame

	bra.l		_real_divbyzero

#
#				 DIVBYZERO FRAME
#				*****************
#				*    Current	*
#	   UIEH FRAME		*      PC	*
#	*****************	*****************
#	* 0x0 *  0x0f4	*	* 0x2 * 0x014	*
#	*****************	*****************
#	*    Current	*	*     Next	*
#	*      PC	*	*      PC	*
#	*****************	*****************
#	*      SR	*	*      SR	*
#	*****************	*****************
#	    (4 words)		    (6 words)
#
# the divide instruction should take an integer divide by zero trap. so, here 
# we must create a divbyzero stack frame from an unimplemented integer 
# instruction exception frame and jump to the user supplied entry point 
# "_real_divbyzero()".
#
# However, we must also deal with the fact that (a7)+ was used from supervisor
# mode, thereby shifting the stack frame up 4 bytes.
#
uieh_divbyzero_a7:
	mov.b		EXC_CC+1(%a6),EXC_ISR+1(%a6) # insert new ccodes
	movm.l		EXC_DREGS(%a6),&0x3fff 	# restore d0-d7/a0-a5

	mov.l		EXC_IPC(%a6),0xc(%a6)	# put "Current PC" on stack
	mov.w		&0x2014,0xa(%a6)	# put Vector Offset on stack
	mov.l		EXC_EXTWPTR(%a6),0x6(%a6) # put "Next PC" on stack

	mov.l		EXC_A6(%a6),%a6		# restore a6
	add.l		&4+LOCAL_SIZE,%sp	# clear stack frame

	bra.l		_real_divbyzero

#
#				   TRACE FRAME
#				*****************
#				*    Current	*
#	   UIEH FRAME		*      PC	*
#	*****************	*****************
#	* 0x0 *  0x0f4	*	* 0x2 * 0x024	*
#	*****************	*****************
#	*    Current	*	*     Next	*
#	*      PC	*	*      PC	*
#	*****************	*****************
#	*      SR	*	*      SR	*
#	*****************	*****************
#	    (4 words)		    (6 words)
#
# 
# The instruction that was just emulated was also being traced. The trace 
# trap for this instruction will be lost unless we jump to the trace handler.
# So, here we create a Trace Exception format number two exception stack
# frame from the Unimplemented Integer Intruction Exception stack frame
# format number zero and jump to the user supplied hook "_real_trace()".
#
# However, we must also deal with the fact that (a7)+ was used from supervisor
# mode, thereby shifting the stack frame up 4 bytes.
#
uieh_trace_a7:
	mov.b		EXC_CC+1(%a6),EXC_ISR+1(%a6) # insert new ccodes
	movm.l		EXC_DREGS(%a6),&0x3fff 	# restore d0-d7/a0-a5

	mov.l		EXC_IPC(%a6),0xc(%a6)	# put "Current PC" on stack
	mov.w		&0x2024,0xa(%a6)	# put Vector Offset on stack
	mov.l		EXC_EXTWPTR(%a6),0x6(%a6) # put "Next PC" on stack

	mov.l		EXC_A6(%a6),%a6		# restore a6
	add.l		&4+LOCAL_SIZE,%sp	# clear stack frame

	bra.l		_real_trace

#
#				   UIEH FRAME	
#				*****************
#				* 0x0 * 0x0f4	*
#	   UIEH FRAME		*****************
#	*****************	*     Next	*
#	* 0x0 *  0x0f4	*	*      PC	*	
#	*****************	*****************
#	*    Current	*	*      SR	*
#	*      PC	*	*****************
#	*****************	    (4 words)
#	*      SR	*
#	*****************
#	    (4 words)
uieh_a7:
	mov.b		EXC_CC+1(%a6),EXC_ISR+1(%a6) # insert new ccodes
	movm.l		EXC_DREGS(%a6),&0x3fff 	# restore d0-d7/a0-a5

	mov.w		&0x00f4,0xe(%a6)	# put Vector Offset on stack
	mov.l		EXC_EXTWPTR(%a6),0xa(%a6) # put "Next PC" on stack
	mov.w		EXC_ISR(%a6),0x8(%a6)	# put SR on stack

	mov.l		EXC_A6(%a6),%a6		# restore a6
	add.l		&8+LOCAL_SIZE,%sp	# clear stack frame
	bra.l		_isp_done

##########

# this is the exit point if a data read or write fails.
# a0 = failing address
# d0 = fslw
isp_dacc:
	mov.l		%a0,(%a6)		# save address	
	mov.l		%d0,-0x4(%a6)		# save partial fslw

	lea		-64(%a6),%sp
	movm.l		(%sp)+,&0x7fff 		# restore d0-d7/a0-a6

	mov.l		0xc(%sp),-(%sp)		# move voff,hi(pc)
	mov.l		0x4(%sp),0x10(%sp)	# store fslw
	mov.l		0xc(%sp),0x4(%sp)	# store sr,lo(pc)
	mov.l		0x8(%sp),0xc(%sp)	# store address
	mov.l		(%sp)+,0x4(%sp)		# store voff,hi(pc)
	mov.w		&0x4008,0x6(%sp)	# store new voff

	bra.b		isp_acc_exit

# this is the exit point if an instruction word read fails.
# FSLW:
#	misaligned = true
#	read = true
# 	size = word
# 	instruction = true
# 	software emulation error = true
isp_iacc:
	movm.l		EXC_DREGS(%a6),&0x3fff 	# restore d0-d7/a0-a5
	unlk		%a6			# unlink frame
	sub.w		&0x8,%sp		# make room for acc frame
	mov.l		0x8(%sp),(%sp)		# store sr,lo(pc)
	mov.w		0xc(%sp),0x4(%sp)	# store hi(pc)
	mov.w		&0x4008,0x6(%sp)	# store new voff
	mov.l		0x2(%sp),0x8(%sp)	# store address (=pc)
	mov.l		&0x09428001,0xc(%sp)	# store fslw

isp_acc_exit:
	btst		&0x5,(%sp)		# user or supervisor?
	beq.b		isp_acc_exit2		# user
	bset		&0x2,0xd(%sp)		# set supervisor TM bit
isp_acc_exit2:
	bra.l		_real_access		

# if the addressing mode was (an)+ or -(an), the address register must
# be restored to it's pre-exception value before entering _real_access.
isp_restore:
	cmpi.b		SPCOND_FLG(%a6),&restore_flg # do we need a restore?
	bne.b		isp_restore_done	# no
	clr.l		%d0
	mov.b		EXC_SAVREG(%a6),%d0	# regno to restore
	mov.l		EXC_SAVVAL(%a6),(EXC_AREGS,%a6,%d0.l*4) # restore value
isp_restore_done:
	rts

#########################################################################
# XDEF ****************************************************************	#
#	_calc_ea(): routine to calculate effective address		#
#									#
# XREF ****************************************************************	#
# 	_imem_read_word() - read instruction word			#
# 	_imem_read_long() - read instruction longword			#
# 	_dmem_read_long() - read data longword (for memory indirect)	#
# 	isp_iacc() - handle instruction access error exception		#
#	isp_dacc() - handle data access error exception			#
#									#
# INPUT ***************************************************************	#
# 	d0 = number of bytes related to effective address (w,l)		#
#									#
# OUTPUT **************************************************************	#
#	If exiting through isp_dacc...					#
#		a0 = failing address					#
#		d0 = FSLW						#
#	elsif exiting though isp_iacc...				#
#		none							#
#	else								#
#		a0 = effective address					#
#									#
# ALGORITHM ***********************************************************	#
# 	The effective address type is decoded from the opword residing	#
# on the stack. A jump table is used to vector to a routine for the 	#
# appropriate mode. Since none of the emulated integer instructions	#
# uses byte-sized operands, only handle word and long operations.	#
#									#
# 	Dn,An	- shouldn't enter here					#
#	(An)	- fetch An value from stack				#
# 	-(An)	- fetch An value from stack; return decr value;		#
#		  place decr value on stack; store old value in case of	#
#		  future access error; if -(a7), set mda7_flg in 	#
#		  SPCOND_FLG						#
#	(An)+	- fetch An value from stack; return value;		#
#		  place incr value on stack; store old value in case of	#
#		  future access error; if (a7)+, set mia7_flg in	#
#		  SPCOND_FLG						#
#	(d16,An) - fetch An value from stack; read d16 using 		#
#		  _imem_read_word(); fetch may fail -> branch to	#
#		  isp_iacc()						#
#	(xxx).w,(xxx).l - use _imem_read_{word,long}() to fetch		#
#		  address; fetch may fail				#
#	#<data> - return address of immediate value; set immed_flg	#
#		  in SPCOND_FLG						#
#	(d16,PC) - fetch stacked PC value; read d16 using		#
#		  _imem_read_word(); fetch may fail -> branch to	#
#		  isp_iacc()						#
#	everything else - read needed displacements as appropriate w/	#
#		  _imem_read_{word,long}(); read may fail; if memory	#
# 		  indirect, read indirect address using			#
#		  _dmem_read_long() which may also fail			#
#									#
#########################################################################

	global		_calc_ea
_calc_ea:
	mov.l		%d0,%a0			# move # bytes to a0

# MODE and REG are taken from the EXC_OPWORD.
	mov.w		EXC_OPWORD(%a6),%d0	# fetch opcode word
	mov.w		%d0,%d1			# make a copy

	andi.w		&0x3f,%d0		# extract mode field
	andi.l		&0x7,%d1		# extract reg  field

# jump to the corresponding function for each {MODE,REG} pair.
	mov.w		(tbl_ea_mode.b,%pc,%d0.w*2), %d0 # fetch jmp distance
	jmp		(tbl_ea_mode.b,%pc,%d0.w*1) # jmp to correct ea mode

	swbeg		&64
tbl_ea_mode:
	short		tbl_ea_mode	-	tbl_ea_mode
	short		tbl_ea_mode	-	tbl_ea_mode
	short		tbl_ea_mode	-	tbl_ea_mode
	short		tbl_ea_mode	-	tbl_ea_mode
	short		tbl_ea_mode	-	tbl_ea_mode
	short		tbl_ea_mode	-	tbl_ea_mode
	short		tbl_ea_mode	-	tbl_ea_mode
	short		tbl_ea_mode	-	tbl_ea_mode

	short		tbl_ea_mode	-	tbl_ea_mode
	short		tbl_ea_mode	-	tbl_ea_mode
	short		tbl_ea_mode	-	tbl_ea_mode
	short		tbl_ea_mode	-	tbl_ea_mode
	short		tbl_ea_mode	-	tbl_ea_mode
	short		tbl_ea_mode	-	tbl_ea_mode
	short		tbl_ea_mode	-	tbl_ea_mode
	short		tbl_ea_mode	-	tbl_ea_mode

	short		addr_ind_a0	- 	tbl_ea_mode
	short		addr_ind_a1	- 	tbl_ea_mode
	short		addr_ind_a2	- 	tbl_ea_mode
	short		addr_ind_a3 	- 	tbl_ea_mode
	short		addr_ind_a4 	- 	tbl_ea_mode
	short		addr_ind_a5 	- 	tbl_ea_mode
	short		addr_ind_a6 	- 	tbl_ea_mode
	short		addr_ind_a7 	- 	tbl_ea_mode

	short		addr_ind_p_a0	- 	tbl_ea_mode
	short		addr_ind_p_a1 	- 	tbl_ea_mode
	short		addr_ind_p_a2 	- 	tbl_ea_mode
	short		addr_ind_p_a3 	- 	tbl_ea_mode
	short		addr_ind_p_a4 	- 	tbl_ea_mode
	short		addr_ind_p_a5 	- 	tbl_ea_mode
	short		addr_ind_p_a6 	- 	tbl_ea_mode
	short		addr_ind_p_a7 	- 	tbl_ea_mode

	short		addr_ind_m_a0 		- 	tbl_ea_mode
	short		addr_ind_m_a1 		- 	tbl_ea_mode
	short		addr_ind_m_a2 		- 	tbl_ea_mode
	short		addr_ind_m_a3 		- 	tbl_ea_mode
	short		addr_ind_m_a4 		- 	tbl_ea_mode
	short		addr_ind_m_a5 		- 	tbl_ea_mode
	short		addr_ind_m_a6 		- 	tbl_ea_mode
	short		addr_ind_m_a7 		- 	tbl_ea_mode

	short		addr_ind_disp_a0	- 	tbl_ea_mode
	short		addr_ind_disp_a1 	- 	tbl_ea_mode
	short		addr_ind_disp_a2 	- 	tbl_ea_mode
	short		addr_ind_disp_a3 	- 	tbl_ea_mode
	short		addr_ind_disp_a4 	- 	tbl_ea_mode
	short		addr_ind_disp_a5 	- 	tbl_ea_mode
	short		addr_ind_disp_a6 	- 	tbl_ea_mode
	short		addr_ind_disp_a7	-	tbl_ea_mode

	short		_addr_ind_ext 		- 	tbl_ea_mode
	short		_addr_ind_ext 		- 	tbl_ea_mode
	short		_addr_ind_ext 		- 	tbl_ea_mode
	short		_addr_ind_ext 		- 	tbl_ea_mode
	short		_addr_ind_ext 		- 	tbl_ea_mode
	short		_addr_ind_ext 		- 	tbl_ea_mode
	short		_addr_ind_ext 		- 	tbl_ea_mode
	short		_addr_ind_ext 		- 	tbl_ea_mode

	short		abs_short		- 	tbl_ea_mode
	short		abs_long		- 	tbl_ea_mode
	short		pc_ind			- 	tbl_ea_mode
	short		pc_ind_ext		- 	tbl_ea_mode
	short		immediate		- 	tbl_ea_mode
	short		tbl_ea_mode		- 	tbl_ea_mode
	short		tbl_ea_mode		- 	tbl_ea_mode
	short		tbl_ea_mode		- 	tbl_ea_mode

###################################
# Address register indirect: (An) #
###################################
addr_ind_a0:
	mov.l		EXC_A0(%a6),%a0		# Get current a0
	rts

addr_ind_a1:
	mov.l		EXC_A1(%a6),%a0		# Get current a1
	rts

addr_ind_a2:
	mov.l		EXC_A2(%a6),%a0		# Get current a2
	rts

addr_ind_a3:
	mov.l		EXC_A3(%a6),%a0		# Get current a3
	rts

addr_ind_a4:
	mov.l		EXC_A4(%a6),%a0		# Get current a4
	rts

addr_ind_a5:
	mov.l		EXC_A5(%a6),%a0		# Get current a5
	rts

addr_ind_a6:
	mov.l		EXC_A6(%a6),%a0		# Get current a6
	rts

addr_ind_a7:
	mov.l		EXC_A7(%a6),%a0		# Get current a7
	rts

#####################################################
# Address register indirect w/ postincrement: (An)+ #
#####################################################
addr_ind_p_a0:
	mov.l		%a0,%d0			# copy no. bytes
	mov.l		EXC_A0(%a6),%a0		# load current value
	add.l		%a0,%d0			# increment
	mov.l		%d0,EXC_A0(%a6)		# save incremented value
	
	mov.l		%a0,EXC_SAVVAL(%a6)	# save in case of access error
	mov.b		&0x0,EXC_SAVREG(%a6)	# save regno, too
	mov.b		&restore_flg,SPCOND_FLG(%a6) # set flag
	rts

addr_ind_p_a1:
	mov.l		%a0,%d0			# copy no. bytes
	mov.l		EXC_A1(%a6),%a0		# load current value
	add.l		%a0,%d0			# increment
	mov.l		%d0,EXC_A1(%a6)		# save incremented value

	mov.l		%a0,EXC_SAVVAL(%a6)	# save in case of access error
	mov.b		&0x1,EXC_SAVREG(%a6)	# save regno, too
	mov.b		&restore_flg,SPCOND_FLG(%a6) # set flag
	rts

addr_ind_p_a2:
	mov.l		%a0,%d0			# copy no. bytes
	mov.l		EXC_A2(%a6),%a0		# load current value
	add.l		%a0,%d0			# increment
	mov.l		%d0,EXC_A2(%a6)		# save incremented value

	mov.l		%a0,EXC_SAVVAL(%a6)	# save in case of access error
	mov.b		&0x2,EXC_SAVREG(%a6)	# save regno, too
	mov.b		&restore_flg,SPCOND_FLG(%a6) # set flag
	rts

addr_ind_p_a3:
	mov.l		%a0,%d0			# copy no. bytes
	mov.l		EXC_A3(%a6),%a0		# load current value
	add.l		%a0,%d0			# increment
	mov.l		%d0,EXC_A3(%a6)		# save incremented value

	mov.l		%a0,EXC_SAVVAL(%a6)	# save in case of access error
	mov.b		&0x3,EXC_SAVREG(%a6)	# save regno, too
	mov.b		&restore_flg,SPCOND_FLG(%a6) # set flag
	rts

addr_ind_p_a4:
	mov.l		%a0,%d0			# copy no. bytes
	mov.l		EXC_A4(%a6),%a0		# load current value
	add.l		%a0,%d0			# increment
	mov.l		%d0,EXC_A4(%a6)		# save incremented value

	mov.l		%a0,EXC_SAVVAL(%a6)	# save in case of access error
	mov.b		&0x4,EXC_SAVREG(%a6)	# save regno, too
	mov.b		&restore_flg,SPCOND_FLG(%a6) # set flag
	rts

addr_ind_p_a5:
	mov.l		%a0,%d0			# copy no. bytes
	mov.l		EXC_A5(%a6),%a0		# load current value
	add.l		%a0,%d0			# increment
	mov.l		%d0,EXC_A5(%a6)		# save incremented value

	mov.l		%a0,EXC_SAVVAL(%a6)	# save in case of access error
	mov.b		&0x5,EXC_SAVREG(%a6)	# save regno, too
	mov.b		&restore_flg,SPCOND_FLG(%a6) # set flag
	rts

addr_ind_p_a6:
	mov.l		%a0,%d0			# copy no. bytes
	mov.l		EXC_A6(%a6),%a0		# load current value
	add.l		%a0,%d0			# increment
	mov.l		%d0,EXC_A6(%a6)		# save incremented value

	mov.l		%a0,EXC_SAVVAL(%a6)	# save in case of access error
	mov.b		&0x6,EXC_SAVREG(%a6)	# save regno, too
	mov.b		&restore_flg,SPCOND_FLG(%a6) # set flag
	rts

addr_ind_p_a7:
	mov.b		&mia7_flg,SPCOND_FLG(%a6) # set "special case" flag

	mov.l		%a0,%d0			# copy no. bytes
	mov.l		EXC_A7(%a6),%a0		# load current value
	add.l		%a0,%d0			# increment
	mov.l		%d0,EXC_A7(%a6)		# save incremented value
	rts

####################################################
# Address register indirect w/ predecrement: -(An) #
####################################################
addr_ind_m_a0:
	mov.l		EXC_A0(%a6),%d0		# Get current a0
	mov.l		%d0,EXC_SAVVAL(%a6)	# save in case of access error
	sub.l		%a0,%d0			# Decrement
	mov.l		%d0,EXC_A0(%a6)		# Save decr value
	mov.l		%d0,%a0

	mov.b		&0x0,EXC_SAVREG(%a6)	# save regno, too
	mov.b		&restore_flg,SPCOND_FLG(%a6) # set flag
	rts

addr_ind_m_a1:
	mov.l		EXC_A1(%a6),%d0		# Get current a1
	mov.l		%d0,EXC_SAVVAL(%a6)	# save in case of access error
	sub.l		%a0,%d0			# Decrement
	mov.l		%d0,EXC_A1(%a6)		# Save decr value
	mov.l		%d0,%a0

	mov.b		&0x1,EXC_SAVREG(%a6)	# save regno, too
	mov.b		&restore_flg,SPCOND_FLG(%a6) # set flag
	rts

addr_ind_m_a2:
	mov.l		EXC_A2(%a6),%d0		# Get current a2
	mov.l		%d0,EXC_SAVVAL(%a6)	# save in case of access error
	sub.l		%a0,%d0			# Decrement
	mov.l		%d0,EXC_A2(%a6)		# Save decr value
	mov.l		%d0,%a0

	mov.b		&0x2,EXC_SAVREG(%a6)	# save regno, too
	mov.b		&restore_flg,SPCOND_FLG(%a6) # set flag
	rts

addr_ind_m_a3:
	mov.l		EXC_A3(%a6),%d0		# Get current a3
	mov.l		%d0,EXC_SAVVAL(%a6)	# save in case of access error
	sub.l		%a0,%d0			# Decrement
	mov.l		%d0,EXC_A3(%a6)		# Save decr value
	mov.l		%d0,%a0

	mov.b		&0x3,EXC_SAVREG(%a6)	# save regno, too
	mov.b		&restore_flg,SPCOND_FLG(%a6) # set flag
	rts

addr_ind_m_a4:
	mov.l		EXC_A4(%a6),%d0		# Get current a4
	mov.l		%d0,EXC_SAVVAL(%a6)	# save in case of access error
	sub.l		%a0,%d0			# Decrement
	mov.l		%d0,EXC_A4(%a6)		# Save decr value
	mov.l		%d0,%a0

	mov.b		&0x4,EXC_SAVREG(%a6)	# save regno, too
	mov.b		&restore_flg,SPCOND_FLG(%a6) # set flag
	rts

addr_ind_m_a5:
	mov.l		EXC_A5(%a6),%d0		# Get current a5
	mov.l		%d0,EXC_SAVVAL(%a6)	# save in case of access error
	sub.l		%a0,%d0			# Decrement
	mov.l		%d0,EXC_A5(%a6)		# Save decr value
	mov.l		%d0,%a0

	mov.b		&0x5,EXC_SAVREG(%a6)	# save regno, too
	mov.b		&restore_flg,SPCOND_FLG(%a6) # set flag
	rts

addr_ind_m_a6:
	mov.l		EXC_A6(%a6),%d0		# Get current a6
	mov.l		%d0,EXC_SAVVAL(%a6)	# save in case of access error
	sub.l		%a0,%d0			# Decrement
	mov.l		%d0,EXC_A6(%a6)		# Save decr value
	mov.l		%d0,%a0

	mov.b		&0x6,EXC_SAVREG(%a6)	# save regno, too
	mov.b		&restore_flg,SPCOND_FLG(%a6) # set flag
	rts

addr_ind_m_a7:
	mov.b		&mda7_flg,SPCOND_FLG(%a6) # set "special case" flag

	mov.l		EXC_A7(%a6),%d0		# Get current a7
	sub.l		%a0,%d0			# Decrement
	mov.l		%d0,EXC_A7(%a6)		# Save decr value
	mov.l		%d0,%a0
	rts

########################################################
# Address register indirect w/ displacement: (d16, An) #
########################################################
addr_ind_disp_a0:
	mov.l		EXC_EXTWPTR(%a6),%a0	# fetch instruction addr
	addq.l		&0x2,EXC_EXTWPTR(%a6)	# incr instruction ptr
	bsr.l		_imem_read_word

	tst.l		%d1			# ifetch error?
	bne.l		isp_iacc		# yes

	mov.w		%d0,%a0			# sign extend displacement
	add.l		EXC_A0(%a6),%a0		# a0 + d16
	rts

addr_ind_disp_a1:
	mov.l		EXC_EXTWPTR(%a6),%a0	# fetch instruction addr
	addq.l		&0x2,EXC_EXTWPTR(%a6)	# incr instruction ptr
	bsr.l		_imem_read_word

	tst.l		%d1			# ifetch error?
	bne.l		isp_iacc		# yes

	mov.w		%d0,%a0			# sign extend displacement
	add.l		EXC_A1(%a6),%a0		# a1 + d16
	rts

addr_ind_disp_a2:
	mov.l		EXC_EXTWPTR(%a6),%a0	# fetch instruction addr
	addq.l		&0x2,EXC_EXTWPTR(%a6)	# incr instruction ptr
	bsr.l		_imem_read_word

	tst.l		%d1			# ifetch error?
	bne.l		isp_iacc		# yes

	mov.w		%d0,%a0			# sign extend displacement
	add.l		EXC_A2(%a6),%a0		# a2 + d16
	rts

addr_ind_disp_a3:
	mov.l		EXC_EXTWPTR(%a6),%a0	# fetch instruction addr
	addq.l		&0x2,EXC_EXTWPTR(%a6)	# incr instruction ptr
	bsr.l		_imem_read_word

	tst.l		%d1			# ifetch error?
	bne.l		isp_iacc		# yes

	mov.w		%d0,%a0			# sign extend displacement
	add.l		EXC_A3(%a6),%a0		# a3 + d16
	rts

addr_ind_disp_a4:
	mov.l		EXC_EXTWPTR(%a6),%a0	# fetch instruction addr
	addq.l		&0x2,EXC_EXTWPTR(%a6)	# incr instruction ptr
	bsr.l		_imem_read_word

	tst.l		%d1			# ifetch error?
	bne.l		isp_iacc		# yes

	mov.w		%d0,%a0			# sign extend displacement
	add.l		EXC_A4(%a6),%a0		# a4 + d16
	rts

addr_ind_disp_a5:
	mov.l		EXC_EXTWPTR(%a6),%a0	# fetch instruction addr
	addq.l		&0x2,EXC_EXTWPTR(%a6)	# incr instruction ptr
	bsr.l		_imem_read_word

	tst.l		%d1			# ifetch error?
	bne.l		isp_iacc		# yes

	mov.w		%d0,%a0			# sign extend displacement
	add.l		EXC_A5(%a6),%a0		# a5 + d16
	rts

addr_ind_disp_a6:
	mov.l		EXC_EXTWPTR(%a6),%a0	# fetch instruction addr
	addq.l		&0x2,EXC_EXTWPTR(%a6)	# incr instruction ptr
	bsr.l		_imem_read_word

	tst.l		%d1			# ifetch error?
	bne.l		isp_iacc		# yes

	mov.w		%d0,%a0			# sign extend displacement
	add.l		EXC_A6(%a6),%a0		# a6 + d16
	rts

addr_ind_disp_a7:
	mov.l		EXC_EXTWPTR(%a6),%a0	# fetch instruction addr
	addq.l		&0x2,EXC_EXTWPTR(%a6)	# incr instruction ptr
	bsr.l		_imem_read_word

	tst.l		%d1			# ifetch error?
	bne.l		isp_iacc		# yes

	mov.w		%d0,%a0			# sign extend displacement
	add.l		EXC_A7(%a6),%a0		# a7 + d16
	rts

########################################################################
# Address register indirect w/ index(8-bit displacement): (dn, An, Xn) #
#    "       "         "    w/   "  (base displacement): (bd, An, Xn)  #
# Memory indirect postindexed: ([bd, An], Xn, od)		       #
# Memory indirect preindexed: ([bd, An, Xn], od)		       #
########################################################################
_addr_ind_ext:
	mov.l		%d1,-(%sp)

	mov.l		EXC_EXTWPTR(%a6),%a0	# fetch instruction addr
	addq.l		&0x2,EXC_EXTWPTR(%a6)	# incr instruction ptr
	bsr.l		_imem_read_word		# fetch extword in d0

	tst.l		%d1			# ifetch error?
	bne.l		isp_iacc		# yes

	mov.l		(%sp)+,%d1

	mov.l		(EXC_AREGS,%a6,%d1.w*4),%a0 # put base in a0

	btst		&0x8,%d0
	beq.b		addr_ind_index_8bit	# for ext word or not?

	movm.l		&0x3c00,-(%sp)		# save d2-d5

	mov.l		%d0,%d5			# put extword in d5
	mov.l		%a0,%d3			# put base in d3

	bra.l		calc_mem_ind		# calc memory indirect
	
addr_ind_index_8bit:
	mov.l		%d2,-(%sp)		# save old d2

	mov.l		%d0,%d1
	rol.w		&0x4,%d1
	andi.w		&0xf,%d1		# extract index regno

	mov.l		(EXC_DREGS,%a6,%d1.w*4),%d1 # fetch index reg value

	btst		&0xb,%d0		# is it word or long?
	bne.b		aii8_long
	ext.l		%d1			# sign extend word index
aii8_long:
	mov.l		%d0,%d2
	rol.w		&0x7,%d2
	andi.l		&0x3,%d2		# extract scale value

	lsl.l		%d2,%d1			# shift index by scale

	extb.l		%d0			# sign extend displacement
	add.l		%d1,%d0			# index + disp
	add.l		%d0,%a0			# An + (index + disp)

	mov.l		(%sp)+,%d2		# restore old d2
	rts

######################
# Immediate: #<data> #
#########################################################################
# word, long: <ea> of the data is the current extension word		#
# 	pointer value. new extension word pointer is simply the old	#
# 	plus the number of bytes in the data type(2 or 4).		#
#########################################################################
immediate:
	mov.b		&immed_flg,SPCOND_FLG(%a6) # set immediate flag

	mov.l		EXC_EXTWPTR(%a6),%a0	# fetch extension word ptr
	rts

###########################
# Absolute short: (XXX).W #
###########################
abs_short:
	mov.l		EXC_EXTWPTR(%a6),%a0	# fetch instruction addr
	addq.l		&0x2,EXC_EXTWPTR(%a6)	# incr instruction ptr
	bsr.l		_imem_read_word		# fetch short address

	tst.l		%d1			# ifetch error?
	bne.l		isp_iacc		# yes

	mov.w		%d0,%a0			# return <ea> in a0
	rts

##########################
# Absolute long: (XXX).L #
##########################
abs_long:
	mov.l		EXC_EXTWPTR(%a6),%a0	# fetch instruction addr
	addq.l		&0x4,EXC_EXTWPTR(%a6)	# incr instruction ptr
	bsr.l		_imem_read_long		# fetch long address

	tst.l		%d1			# ifetch error?
	bne.l		isp_iacc		# yes

	mov.l		%d0,%a0			# return <ea> in a0
	rts

#######################################################
# Program counter indirect w/ displacement: (d16, PC) #
#######################################################
pc_ind:
	mov.l		EXC_EXTWPTR(%a6),%a0	# fetch instruction addr
	addq.l		&0x2,EXC_EXTWPTR(%a6)	# incr instruction ptr
	bsr.l		_imem_read_word		# fetch word displacement

	tst.l		%d1			# ifetch error?
	bne.l		isp_iacc		# yes

	mov.w		%d0,%a0			# sign extend displacement

	add.l		EXC_EXTWPTR(%a6),%a0	# pc + d16

# _imem_read_word() increased the extwptr by 2. need to adjust here.
	subq.l		&0x2,%a0		# adjust <ea>

	rts

##########################################################
# PC indirect w/ index(8-bit displacement): (d8, PC, An) #
# "     "     w/   "  (base displacement): (bd, PC, An)  #
# PC memory indirect postindexed: ([bd, PC], Xn, od)     #
# PC memory indirect preindexed: ([bd, PC, Xn], od)      #
##########################################################
pc_ind_ext:
	mov.l		EXC_EXTWPTR(%a6),%a0	# fetch instruction addr
	addq.l		&0x2,EXC_EXTWPTR(%a6)	# incr instruction ptr
	bsr.l		_imem_read_word		# fetch ext word

	tst.l		%d1			# ifetch error?
	bne.l		isp_iacc		# yes

	mov.l		EXC_EXTWPTR(%a6),%a0	# put base in a0
	subq.l		&0x2,%a0		# adjust base

	btst		&0x8,%d0		# is disp only 8 bits?
	beq.b		pc_ind_index_8bit	# yes

# the indexed addressing mode uses a base displacement of size
# word or long
	movm.l		&0x3c00,-(%sp)		# save d2-d5

	mov.l		%d0,%d5			# put extword in d5
	mov.l		%a0,%d3			# put base in d3

	bra.l		calc_mem_ind		# calc memory indirect
	
pc_ind_index_8bit:
 	mov.l		%d2,-(%sp)		# create a temp register

	mov.l		%d0,%d1			# make extword copy
	rol.w		&0x4,%d1		# rotate reg num into place
	andi.w		&0xf,%d1		# extract register number

	mov.l		(EXC_DREGS,%a6,%d1.w*4),%d1 # fetch index reg value

	btst		&0xb,%d0		# is index word or long?
	bne.b		pii8_long		# long
	ext.l		%d1			# sign extend word index
pii8_long:
	mov.l		%d0,%d2			# make extword copy
	rol.w		&0x7,%d2		# rotate scale value into place
	andi.l		&0x3,%d2		# extract scale value

	lsl.l		%d2,%d1			# shift index by scale

	extb.l		%d0			# sign extend displacement
	add.l		%d1,%d0			# index + disp
	add.l		%d0,%a0			# An + (index + disp)

	mov.l		(%sp)+,%d2		# restore temp register

	rts

# a5 = exc_extwptr	(global to uaeh)
# a4 = exc_opword	(global to uaeh)
# a3 = exc_dregs	(global to uaeh)

# d2 = index		(internal "     "    )
# d3 = base		(internal "     "    )
# d4 = od		(internal "     "    )
# d5 = extword		(internal "     "    )
calc_mem_ind:
	btst		&0x6,%d5		# is the index suppressed?
	beq.b		calc_index
	clr.l		%d2			# yes, so index = 0
	bra.b		base_supp_ck
calc_index:
	bfextu		%d5{&16:&4},%d2
	mov.l		(EXC_DREGS,%a6,%d2.w*4),%d2
	btst		&0xb,%d5		# is index word or long?
	bne.b		no_ext
	ext.l		%d2
no_ext:
	bfextu		%d5{&21:&2},%d0
	lsl.l		%d0,%d2
base_supp_ck:
	btst		&0x7,%d5		# is the bd suppressed?
	beq.b		no_base_sup
	clr.l		%d3
no_base_sup:
	bfextu		%d5{&26:&2},%d0	# get bd size
#	beq.l		_error			# if (size == 0) it's reserved
	cmpi.b	 	%d0,&2
	blt.b		no_bd
	beq.b		get_word_bd

	mov.l		EXC_EXTWPTR(%a6),%a0	# fetch instruction addr
	addq.l		&0x4,EXC_EXTWPTR(%a6)	# incr instruction ptr
	bsr.l		_imem_read_long
	
	tst.l		%d1			# ifetch error?
	bne.l		isp_iacc		# yes

	bra.b		chk_ind
get_word_bd:
	mov.l		EXC_EXTWPTR(%a6),%a0	# fetch instruction addr
	addq.l		&0x2,EXC_EXTWPTR(%a6)	# incr instruction ptr
	bsr.l		_imem_read_word

	tst.l		%d1			# ifetch error?
	bne.l		isp_iacc		# yes

	ext.l		%d0			# sign extend bd
	
chk_ind:
	add.l		%d0,%d3			# base += bd
no_bd:
	bfextu		%d5{&30:&2},%d0		# is od suppressed?
	beq.w		aii_bd
	cmpi.b	 	%d0,&0x2
	blt.b		null_od
	beq.b		word_od
	
	mov.l		EXC_EXTWPTR(%a6),%a0	# fetch instruction addr
	addq.l		&0x4,EXC_EXTWPTR(%a6)	# incr instruction ptr
	bsr.l		_imem_read_long

	tst.l		%d1			# ifetch error?
	bne.l		isp_iacc		# yes

	bra.b 		add_them

word_od:
	mov.l		EXC_EXTWPTR(%a6),%a0	# fetch instruction addr
	addq.l		&0x2,EXC_EXTWPTR(%a6)	# incr instruction ptr
	bsr.l		_imem_read_word

	tst.l		%d1			# ifetch error?
	bne.l		isp_iacc		# yes

	ext.l		%d0			# sign extend od
	bra.b		add_them

null_od:
	clr.l		%d0
add_them:
	mov.l		%d0,%d4
	btst		&0x2,%d5		# pre or post indexing?
	beq.b		pre_indexed

	mov.l		%d3,%a0
	bsr.l		_dmem_read_long

	tst.l		%d1			# dfetch error?
	bne.b		calc_ea_err		# yes

	add.l		%d2,%d0			# <ea> += index
	add.l		%d4,%d0			# <ea> += od
	bra.b		done_ea

pre_indexed:
	add.l		%d2,%d3			# preindexing
	mov.l		%d3,%a0
	bsr.l		_dmem_read_long

	tst.l		%d1			# ifetch error?
	bne.b		calc_ea_err		# yes

	add.l		%d4,%d0			# ea += od
	bra.b		done_ea

aii_bd:
	add.l		%d2,%d3			# ea = (base + bd) + index
	mov.l		%d3,%d0
done_ea:
	mov.l		%d0,%a0

	movm.l		(%sp)+,&0x003c		# restore d2-d5
	rts

# if dmem_read_long() returns a fail message in d1, the package
# must create an access error frame. here, we pass a skeleton fslw
# and the failing address to the routine that creates the new frame.
# FSLW:
# 	read = true
# 	size = longword
#	TM = data
# 	software emulation error = true
calc_ea_err:
	mov.l		%d3,%a0			# pass failing address
	mov.l		&0x01010001,%d0		# pass fslw
	bra.l		isp_dacc

#########################################################################
# XDEF **************************************************************** #
# 	_moveperipheral(): routine to emulate movep instruction		#
#									#
# XREF **************************************************************** #
#	_dmem_read_byte() - read byte from memory			#
#	_dmem_write_byte() - write byte to memory			#
#	isp_dacc() - handle data access error exception			#
#									#
# INPUT *************************************************************** #
#	none								#
#									#
# OUTPUT ************************************************************** #
#	If exiting through isp_dacc...					#
#		a0 = failing address					#
#		d0 = FSLW						#
#	else								#
#		none							#
#									#
# ALGORITHM ***********************************************************	#
#	Decode the movep instruction words stored at EXC_OPWORD and	#
# either read or write the required bytes from/to memory. Use the	#
# _dmem_{read,write}_byte() routines. If one of the memory routines	#
# returns a failing value, we must pass the failing address and	a FSLW	#
# to the _isp_dacc() routine.						#
#	Since this instruction is used to access peripherals, make sure	#
# to only access the required bytes.					#
#									#
#########################################################################

###########################
# movep.(w,l)	Dx,(d,Ay) #
# movep.(w,l)	(d,Ay),Dx #
###########################
	global 		_moveperipheral
_moveperipheral:
	mov.w		EXC_OPWORD(%a6),%d1	# fetch the opcode word

	mov.b		%d1,%d0
	and.w		&0x7,%d0		# extract Ay from opcode word

	mov.l		(EXC_AREGS,%a6,%d0.w*4),%a0 # fetch ay

	add.w		EXC_EXTWORD(%a6),%a0	# add: an + sgn_ext(disp)

	btst		&0x7,%d1		# (reg 2 mem) or (mem 2 reg)
	beq.w		mem2reg

# reg2mem: fetch dx, then write it to memory
reg2mem:
	mov.w		%d1,%d0
	rol.w		&0x7,%d0
	and.w		&0x7,%d0		# extract Dx from opcode word

	mov.l		(EXC_DREGS,%a6,%d0.w*4), %d0 # fetch dx

	btst		&0x6,%d1		# word or long operation?
	beq.b		r2mwtrans

# a0 = dst addr
# d0 = Dx
r2mltrans:
	mov.l		%d0,%d2			# store data
	mov.l		%a0,%a2			# store addr
	rol.l		&0x8,%d2
	mov.l		%d2,%d0

	bsr.l		_dmem_write_byte	# os  : write hi

	tst.l		%d1			# dfetch error?
	bne.w		movp_write_err		# yes

	add.w		&0x2,%a2		# incr addr
	mov.l		%a2,%a0
	rol.l		&0x8,%d2
	mov.l		%d2,%d0

	bsr.l		_dmem_write_byte	# os  : write lo

	tst.l		%d1			# dfetch error?
	bne.w		movp_write_err		# yes

	add.w		&0x2,%a2		# incr addr
	mov.l		%a2,%a0
	rol.l		&0x8,%d2
	mov.l		%d2,%d0

	bsr.l		_dmem_write_byte	# os  : write lo

	tst.l		%d1			# dfetch error?
	bne.w		movp_write_err		# yes

	add.w		&0x2,%a2		# incr addr
	mov.l		%a2,%a0
	rol.l		&0x8,%d2
	mov.l		%d2,%d0

	bsr.l		_dmem_write_byte	# os  : write lo

	tst.l		%d1			# dfetch error?
	bne.w		movp_write_err		# yes

	rts

# a0 = dst addr
# d0 = Dx
r2mwtrans:
	mov.l		%d0,%d2			# store data
	mov.l		%a0,%a2			# store addr
	lsr.w		&0x8,%d0

	bsr.l		_dmem_write_byte	# os  : write hi

	tst.l		%d1			# dfetch error?
	bne.w		movp_write_err		# yes

	add.w		&0x2,%a2
	mov.l		%a2,%a0
	mov.l		%d2,%d0

	bsr.l		_dmem_write_byte	# os  : write lo

	tst.l		%d1			# dfetch error?
	bne.w		movp_write_err		# yes

	rts

# mem2reg: read bytes from memory.
# determines the dest register, and then writes the bytes into it.
mem2reg:
	btst		&0x6,%d1		# word or long operation?
	beq.b		m2rwtrans

# a0 = dst addr
m2rltrans:
	mov.l		%a0,%a2			# store addr

	bsr.l		_dmem_read_byte		# read first byte

	tst.l		%d1			# dfetch error?
	bne.w		movp_read_err		# yes

	mov.l		%d0,%d2

	add.w		&0x2,%a2		# incr addr by 2 bytes
	mov.l		%a2,%a0

	bsr.l		_dmem_read_byte		# read second byte

	tst.l		%d1			# dfetch error?
	bne.w		movp_read_err		# yes

	lsl.w		&0x8,%d2
	mov.b		%d0,%d2			# append bytes

	add.w		&0x2,%a2		# incr addr by 2 bytes
	mov.l		%a2,%a0

	bsr.l		_dmem_read_byte		# read second byte

	tst.l		%d1			# dfetch error?
	bne.w		movp_read_err		# yes

	lsl.l		&0x8,%d2
	mov.b		%d0,%d2			# append bytes

	add.w		&0x2,%a2		# incr addr by 2 bytes
	mov.l		%a2,%a0

	bsr.l		_dmem_read_byte		# read second byte

	tst.l		%d1			# dfetch error?
	bne.w		movp_read_err		# yes

	lsl.l		&0x8,%d2
	mov.b		%d0,%d2			# append bytes

	mov.b		EXC_OPWORD(%a6),%d1
	lsr.b		&0x1,%d1
	and.w		&0x7,%d1		# extract Dx from opcode word
	
	mov.l		%d2,(EXC_DREGS,%a6,%d1.w*4) # store dx

	rts
	
# a0 = dst addr
m2rwtrans:
	mov.l		%a0,%a2			# store addr

	bsr.l		_dmem_read_byte		# read first byte

	tst.l		%d1			# dfetch error?
	bne.w		movp_read_err		# yes

	mov.l		%d0,%d2

	add.w		&0x2,%a2		# incr addr by 2 bytes
	mov.l		%a2,%a0

	bsr.l		_dmem_read_byte		# read second byte

	tst.l		%d1			# dfetch error?
	bne.w		movp_read_err		# yes

	lsl.w		&0x8,%d2
	mov.b		%d0,%d2			# append bytes

	mov.b		EXC_OPWORD(%a6),%d1
	lsr.b		&0x1,%d1
	and.w		&0x7,%d1		# extract Dx from opcode word
	
	mov.w		%d2,(EXC_DREGS+2,%a6,%d1.w*4) # store dx

	rts

# if dmem_{read,write}_byte() returns a fail message in d1, the package
# must create an access error frame. here, we pass a skeleton fslw
# and the failing address to the routine that creates the new frame.
# FSLW:
# 	write = true
#	size = byte
#	TM = data
#	software emulation error = true
movp_write_err:
	mov.l		%a2,%a0			# pass failing address
	mov.l		&0x00a10001,%d0		# pass fslw
	bra.l		isp_dacc

# FSLW:
# 	read = true
#	size = byte
#	TM = data
#	software emulation error = true
movp_read_err:
	mov.l		%a2,%a0			# pass failing address
	mov.l		&0x01210001,%d0		# pass fslw
	bra.l		isp_dacc

#########################################################################
# XDEF ****************************************************************	#
# 	_chk2_cmp2(): routine to emulate chk2/cmp2 instructions		#
#									#
# XREF ****************************************************************	#
#	_calc_ea(): calculate effective address				#
#	_dmem_read_long(): read operands				#
# 	_dmem_read_word(): read operands				#
#	isp_dacc(): handle data access error exception			#
#									#
# INPUT ***************************************************************	#
#	none								#
#									#
# OUTPUT **************************************************************	#
#	If exiting through isp_dacc...					#
#		a0 = failing address					#
#		d0 = FSLW						#
#	else								#
# 		none							#
#									#
# ALGORITHM ***********************************************************	#
#	First, calculate the effective address, then fetch the byte,	#
# word, or longword sized operands. Then, in the interest of 		#
# simplicity, all operands are converted to longword size whether the 	#
# operation is byte, word, or long. The bounds are sign extended 	#
# accordingly. If Rn is a data regsiter, Rn is also sign extended. If 	#
# Rn is an address register, it need not be sign extended since the 	#
# full register is always used.						#
#	The comparisons are made and the condition codes calculated.	#
# If the instruction is chk2 and the Rn value is out-of-bounds, set	#
# the ichk_flg in SPCOND_FLG.						#
#	If the memory fetch returns a failing value, pass the failing 	#
# address and FSLW to the isp_dacc() routine.				#
#									#
#########################################################################

	global 		_chk2_cmp2
_chk2_cmp2:

# passing size parameter doesn't matter since chk2 & cmp2 can't do
# either predecrement, postincrement, or immediate.
	bsr.l		_calc_ea		# calculate <ea>

	mov.b		EXC_EXTWORD(%a6), %d0	# fetch hi extension word
	rol.b		&0x4, %d0		# rotate reg bits into lo
	and.w		&0xf, %d0		# extract reg bits

	mov.l		(EXC_DREGS,%a6,%d0.w*4), %d2 # get regval

	cmpi.b		EXC_OPWORD(%a6), &0x2	# what size is operation?
	blt.b		chk2_cmp2_byte		# size == byte
	beq.b		chk2_cmp2_word		# size == word

# the bounds are longword size. call routine to read the lower
# bound into d0 and the higher bound into d1.
chk2_cmp2_long:
	mov.l		%a0,%a2			# save copy of <ea>
	bsr.l		_dmem_read_long		# fetch long lower bound

	tst.l		%d1			# dfetch error?
	bne.w		chk2_cmp2_err_l		# yes

	mov.l		%d0,%d3			# save long lower bound
	addq.l		&0x4,%a2
	mov.l		%a2,%a0			# pass <ea> of long upper bound
	bsr.l		_dmem_read_long		# fetch long upper bound

	tst.l		%d1			# dfetch error?
	bne.w		chk2_cmp2_err_l		# yes

	mov.l		%d0,%d1			# long upper bound in d1
	mov.l		%d3,%d0			# long lower bound in d0
	bra.w		chk2_cmp2_compare	# go do the compare emulation

# the bounds are word size. fetch them in one subroutine call by
# reading a longword. sign extend both. if it's a data operation,
# sign extend Rn to long, also.
chk2_cmp2_word:
	mov.l		%a0,%a2
	bsr.l		_dmem_read_long		# fetch 2 word bounds

	tst.l		%d1			# dfetch error?
	bne.w		chk2_cmp2_err_l		# yes

	mov.w		%d0, %d1		# place hi in %d1
	swap		%d0			# place lo in %d0

	ext.l		%d0			# sign extend lo bnd
	ext.l		%d1			# sign extend hi bnd

	btst		&0x7, EXC_EXTWORD(%a6)	# address compare?
	bne.w		chk2_cmp2_compare	# yes; don't sign extend

# operation is a data register compare.
# sign extend word to long so we can do simple longword compares.
	ext.l		%d2			# sign extend data word
	bra.w		chk2_cmp2_compare	# go emulate compare

# the bounds are byte size. fetch them in one subroutine call by
# reading a word. sign extend both. if it's a data operation,
# sign extend Rn to long, also.
chk2_cmp2_byte:
	mov.l		%a0,%a2
	bsr.l		_dmem_read_word		# fetch 2 byte bounds

	tst.l		%d1			# dfetch error?
	bne.w		chk2_cmp2_err_w		# yes

	mov.b		%d0, %d1		# place hi in %d1
	lsr.w		&0x8, %d0		# place lo in %d0

	extb.l		%d0			# sign extend lo bnd
	extb.l		%d1			# sign extend hi bnd

	btst		&0x7, EXC_EXTWORD(%a6)	# address compare?
	bne.b		chk2_cmp2_compare	# yes; don't sign extend

# operation is a data register compare.
# sign extend byte to long so we can do simple longword compares.
	extb.l		%d2			# sign extend data byte

#
# To set the ccodes correctly:
# 	(1) save 'Z' bit from (Rn - lo)
#	(2) save 'Z' and 'N' bits from ((hi - lo) - (Rn - hi))
#	(3) keep 'X', 'N', and 'V' from before instruction
#	(4) combine ccodes
#
chk2_cmp2_compare:
	sub.l		%d0, %d2		# (Rn - lo)
	mov.w		%cc, %d3		# fetch resulting ccodes
	andi.b		&0x4, %d3		# keep 'Z' bit
	sub.l		%d0, %d1		# (hi - lo)
	cmp.l	 	%d1,%d2			# ((hi - lo) - (Rn - hi))

	mov.w		%cc, %d4		# fetch resulting ccodes
	or.b		%d4, %d3		# combine w/ earlier ccodes
	andi.b		&0x5, %d3		# keep 'Z' and 'N'

	mov.w		EXC_CC(%a6), %d4	# fetch old ccodes
	andi.b		&0x1a, %d4		# keep 'X','N','V' bits
	or.b		%d3, %d4		# insert new ccodes
	mov.w		%d4, EXC_CC(%a6)	# save new ccodes

	btst		&0x3, EXC_EXTWORD(%a6)	# separate chk2,cmp2
	bne.b		chk2_finish		# it's a chk2

	rts

# this code handles the only difference between chk2 and cmp2. chk2 would
# have trapped out if the value was out of bounds. we check this by seeing
# if the 'N' bit was set by the operation.
chk2_finish:	
	btst		&0x0, %d4		# is 'N' bit set?
	bne.b		chk2_trap		# yes;chk2 should trap
	rts
chk2_trap:
	mov.b		&ichk_flg,SPCOND_FLG(%a6) # set "special case" flag
	rts

# if dmem_read_{long,word}() returns a fail message in d1, the package
# must create an access error frame. here, we pass a skeleton fslw
# and the failing address to the routine that creates the new frame.
# FSLW:
#	read = true
#	size = longword
#	TM = data
# 	software emulation error = true
chk2_cmp2_err_l:
	mov.l		%a2,%a0			# pass failing address
	mov.l		&0x01010001,%d0		# pass fslw
	bra.l		isp_dacc

# FSLW:
#	read = true
#	size = word
#	TM = data
# 	software emulation error = true
chk2_cmp2_err_w:
	mov.l		%a2,%a0			# pass failing address
	mov.l		&0x01410001,%d0		# pass fslw
	bra.l		isp_dacc

#########################################################################
# XDEF ****************************************************************	#
# 	_div64(): routine to emulate div{u,s}.l <ea>,Dr:Dq		#
#							64/32->32r:32q	#
#									#
# XREF ****************************************************************	#
#	_calc_ea() - calculate effective address			#
# 	isp_iacc() - handle instruction access error exception		#
#	isp_dacc() - handle data access error exception			#
#	isp_restore() - restore An on access error w/ -() or ()+	#
#									#
# INPUT ***************************************************************	#
#	none								#
#									#
# OUTPUT **************************************************************	#
# 	If exiting through isp_dacc...					#
#		a0 = failing address					#
# 		d0 = FSLW						#
#	else								#
#		none							#
#									#
# ALGORITHM ***********************************************************	#
# 	First, decode the operand location. If it's in Dn, fetch from	#
# the stack. If it's in memory, use _calc_ea() to calculate the 	#
# effective address. Use _dmem_read_long() to fetch at that address.	#
# Unless the operand is immediate data. Then use _imem_read_long().	#
# Send failures to isp_dacc() or isp_iacc() as appropriate.		#
#	If the operands are signed, make them unsigned and save	the 	#
# sign info for later. Separate out special cases like divide-by-zero	#
# or 32-bit divides if possible. Else, use a special math algorithm	#
# to calculate the result. 						#
#	Restore sign info if signed instruction. Set the condition 	#
# codes. Set idbyz_flg in SPCOND_FLG if divisor was zero. Store the 	#
# quotient and remainder in the appropriate data registers on the stack.#
#									#
#########################################################################

set	NDIVISOR,	EXC_TEMP+0x0
set	NDIVIDEND,	EXC_TEMP+0x1
set	NDRSAVE,	EXC_TEMP+0x2
set	NDQSAVE,	EXC_TEMP+0x4
set	DDSECOND,	EXC_TEMP+0x6
set	DDQUOTIENT,	EXC_TEMP+0x8
set	DDNORMAL,	EXC_TEMP+0xc

	global		_div64
#############
# div(u,s)l #
#############
_div64:
	mov.b		EXC_OPWORD+1(%a6), %d0
	andi.b		&0x38, %d0		# extract src mode

	bne.w		dcontrolmodel_s		# %dn dest or control mode?

	mov.b		EXC_OPWORD+1(%a6), %d0	# extract Dn from opcode
	andi.w		&0x7, %d0
	mov.l		(EXC_DREGS,%a6,%d0.w*4), %d7 # fetch divisor from register

dgotsrcl:
	beq.w		div64eq0		# divisor is = 0!!!

	mov.b		EXC_EXTWORD+1(%a6), %d0	# extract Dr from extword
	mov.b		EXC_EXTWORD(%a6), %d1	# extract Dq from extword
	and.w		&0x7, %d0
	lsr.b		&0x4, %d1
	and.w		&0x7, %d1
	mov.w		%d0, NDRSAVE(%a6)	# save Dr for later
	mov.w		%d1, NDQSAVE(%a6)	# save Dq for later

# fetch %dr and %dq directly off stack since all regs are saved there
	mov.l		(EXC_DREGS,%a6,%d0.w*4), %d5 # get dividend hi
	mov.l		(EXC_DREGS,%a6,%d1.w*4), %d6 # get dividend lo

# separate signed and unsigned divide
	btst		&0x3, EXC_EXTWORD(%a6)	# signed or unsigned?
	beq.b		dspecialcases		# use positive divide

# save the sign of the divisor
# make divisor unsigned if it's negative
	tst.l		%d7			# chk sign of divisor
	slt		NDIVISOR(%a6)		# save sign of divisor
	bpl.b		dsgndividend
	neg.l		%d7			# complement negative divisor

# save the sign of the dividend
# make dividend unsigned if it's negative
dsgndividend:
	tst.l		%d5			# chk sign of hi(dividend)
	slt		NDIVIDEND(%a6)		# save sign of dividend
	bpl.b		dspecialcases

	mov.w		&0x0, %cc		# clear 'X' cc bit
	negx.l		%d6			# complement signed dividend
	negx.l		%d5

# extract some special cases:
# 	- is (dividend == 0) ?
#	- is (hi(dividend) == 0 && (divisor <= lo(dividend))) ? (32-bit div)
dspecialcases:
	tst.l		%d5			# is (hi(dividend) == 0)
	bne.b		dnormaldivide		# no, so try it the long way

	tst.l		%d6			# is (lo(dividend) == 0), too
	beq.w		ddone			# yes, so (dividend == 0)

	cmp.l	 	%d7,%d6			# is (divisor <= lo(dividend))
	bls.b		d32bitdivide		# yes, so use 32 bit divide

	exg		%d5,%d6			# q = 0, r = dividend
	bra.w		divfinish		# can't divide, we're done.

d32bitdivide:
	tdivu.l		%d7, %d5:%d6		# it's only a 32/32 bit div!

	bra.b		divfinish

dnormaldivide:
# last special case:
# 	- is hi(dividend) >= divisor ? if yes, then overflow
	cmp.l		%d7,%d5
	bls.b		ddovf			# answer won't fit in 32 bits

# perform the divide algorithm:
	bsr.l		dclassical		# do int divide

# separate into signed and unsigned finishes.
divfinish:
	btst		&0x3, EXC_EXTWORD(%a6)	# do divs, divu separately
	beq.b		ddone			# divu has no processing!!!

# it was a divs.l, so ccode setting is a little more complicated...
	tst.b		NDIVIDEND(%a6)		# remainder has same sign 
	beq.b		dcc			# as dividend.
	neg.l		%d5			# sgn(rem) = sgn(dividend)
dcc:
	mov.b		NDIVISOR(%a6), %d0
	eor.b		%d0, NDIVIDEND(%a6)	# chk if quotient is negative
	beq.b		dqpos			# branch to quot positive

# 0x80000000 is the largest number representable as a 32-bit negative
# number. the negative of 0x80000000 is 0x80000000.
	cmpi.l		%d6, &0x80000000	# will (-quot) fit in 32 bits?
	bhi.b		ddovf

	neg.l		%d6			# make (-quot) 2's comp

	bra.b		ddone

dqpos:
	btst		&0x1f, %d6		# will (+quot) fit in 32 bits?
	bne.b		ddovf

ddone:
# at this point, result is normal so ccodes are set based on result.
	mov.w		EXC_CC(%a6), %cc
	tst.l		%d6			# set %ccode bits
	mov.w		%cc, EXC_CC(%a6)

	mov.w		NDRSAVE(%a6), %d0	# get Dr off stack
	mov.w		NDQSAVE(%a6), %d1	# get Dq off stack	

# if the register numbers are the same, only the quotient gets saved.
# so, if we always save the quotient second, we save ourselves a cmp&beq
	mov.l		%d5, (EXC_DREGS,%a6,%d0.w*4) # save remainder
	mov.l		%d6, (EXC_DREGS,%a6,%d1.w*4) # save quotient

	rts

ddovf:
	bset		&0x1, EXC_CC+1(%a6)	# 'V' set on overflow
	bclr		&0x0, EXC_CC+1(%a6)	# 'C' cleared on overflow

	rts

div64eq0:
	andi.b		&0x1e, EXC_CC+1(%a6)	# clear 'C' bit on divbyzero
	ori.b		&idbyz_flg,SPCOND_FLG(%a6) # set "special case" flag
	rts

###########################################################################
#########################################################################
# This routine uses the 'classical' Algorithm D from Donald Knuth's	#
# Art of Computer Programming, vol II, Seminumerical Algorithms.	#
# For this implementation b=2**16, and the target is U1U2U3U4/V1V2,	#
# where U,V are words of the quadword dividend and longword divisor,	#
# and U1, V1 are the most significant words.				#
# 									#
# The most sig. longword of the 64 bit dividend must be in %d5, least 	#
# in %d6. The divisor must be in the variable ddivisor, and the		#
# signed/unsigned flag ddusign must be set (0=unsigned,1=signed).	#
# The quotient is returned in %d6, remainder in %d5, unless the		#
# v (overflow) bit is set in the saved %ccr. If overflow, the dividend	#
# is unchanged.								#
#########################################################################
dclassical:
# if the divisor msw is 0, use simpler algorithm then the full blown
# one at ddknuth:

	cmpi.l		%d7, &0xffff
	bhi.b		ddknuth			# go use D. Knuth algorithm

# Since the divisor is only a word (and larger than the mslw of the dividend),
# a simpler algorithm may be used :
# In the general case, four quotient words would be created by
# dividing the divisor word into each dividend word. In this case,
# the first two quotient words must be zero, or overflow would occur.
# Since we already checked this case above, we can treat the most significant
# longword of the dividend as (0) remainder (see Knuth) and merely complete 
# the last two divisions to get a quotient longword and word remainder:

	clr.l		%d1
	swap		%d5			# same as r*b if previous step rqd
	swap		%d6			# get u3 to lsw position
	mov.w		%d6, %d5		# rb + u3

	divu.w		%d7, %d5

	mov.w		%d5, %d1		# first quotient word
	swap		%d6			# get u4
	mov.w		%d6, %d5		# rb + u4

	divu.w		%d7, %d5

	swap		%d1
	mov.w		%d5, %d1		# 2nd quotient 'digit'
	clr.w		%d5
	swap		%d5			# now remainder
	mov.l		%d1, %d6		# and quotient

	rts

ddknuth:
# In this algorithm, the divisor is treated as a 2 digit (word) number
# which is divided into a 3 digit (word) dividend to get one quotient
# digit (word). After subtraction, the dividend is shifted and the
# process repeated. Before beginning, the divisor and quotient are
# 'normalized' so that the process of estimating the quotient digit
# will yield verifiably correct results..

	clr.l		DDNORMAL(%a6)		# count of shifts for normalization
	clr.b		DDSECOND(%a6)		# clear flag for quotient digits
	clr.l		%d1			# %d1 will hold trial quotient
ddnchk:
	btst		&31, %d7		# must we normalize? first word of 
	bne.b		ddnormalized		# divisor (V1) must be >= 65536/2
	addq.l		&0x1, DDNORMAL(%a6)	# count normalization shifts
	lsl.l		&0x1, %d7		# shift the divisor
	lsl.l		&0x1, %d6		# shift u4,u3 with overflow to u2
	roxl.l		&0x1, %d5		# shift u1,u2 
	bra.w		ddnchk
ddnormalized:

# Now calculate an estimate of the quotient words (msw first, then lsw).
# The comments use subscripts for the first quotient digit determination.
	mov.l		%d7, %d3		# divisor
	mov.l		%d5, %d2		# dividend mslw
	swap		%d2
	swap		%d3
	cmp.w	 	%d2, %d3		# V1 = U1 ?
	bne.b		ddqcalc1
	mov.w		&0xffff, %d1		# use max trial quotient word
	bra.b		ddadj0
ddqcalc1:
	mov.l		%d5, %d1		

	divu.w		%d3, %d1		# use quotient of mslw/msw

	andi.l		&0x0000ffff, %d1	# zero any remainder
ddadj0:

# now test the trial quotient and adjust. This step plus the
# normalization assures (according to Knuth) that the trial
# quotient will be at worst 1 too large.
	mov.l		%d6, -(%sp)
	clr.w		%d6			# word u3 left
	swap		%d6			# in lsw position
ddadj1: mov.l		%d7, %d3
	mov.l		%d1, %d2
	mulu.w		%d7, %d2		# V2q
	swap		%d3
	mulu.w		%d1, %d3		# V1q
	mov.l		%d5, %d4		# U1U2
	sub.l		%d3, %d4		# U1U2 - V1q

	swap		%d4

	mov.w		%d4,%d0
	mov.w		%d6,%d4			# insert lower word (U3)

	tst.w		%d0			# is upper word set?
	bne.w		ddadjd1

#	add.l		%d6, %d4		# (U1U2 - V1q) + U3

	cmp.l	 	%d2, %d4
	bls.b		ddadjd1			# is V2q > (U1U2-V1q) + U3 ?
	subq.l		&0x1, %d1		# yes, decrement and recheck
	bra.b		ddadj1
ddadjd1:
# now test the word by multiplying it by the divisor (V1V2) and comparing
# the 3 digit (word) result with the current dividend words
	mov.l		%d5, -(%sp)		# save %d5 (%d6 already saved)
	mov.l		%d1, %d6
	swap		%d6			# shift answer to ms 3 words
	mov.l		%d7, %d5
	bsr.l		dmm2
	mov.l		%d5, %d2		# now %d2,%d3 are trial*divisor
	mov.l		%d6, %d3
	mov.l		(%sp)+, %d5		# restore dividend
	mov.l		(%sp)+, %d6
	sub.l		%d3, %d6
	subx.l		%d2, %d5		# subtract double precision
	bcc		dd2nd			# no carry, do next quotient digit
	subq.l		&0x1, %d1		# q is one too large
# need to add back divisor longword to current ms 3 digits of dividend
# - according to Knuth, this is done only 2 out of 65536 times for random
# divisor, dividend selection.
	clr.l		%d2
	mov.l		%d7, %d3
	swap		%d3
	clr.w		%d3			# %d3 now ls word of divisor
	add.l		%d3, %d6		# aligned with 3rd word of dividend
	addx.l		%d2, %d5
	mov.l		%d7, %d3
	clr.w		%d3			# %d3 now ms word of divisor
	swap		%d3			# aligned with 2nd word of dividend
	add.l		%d3, %d5
dd2nd:
	tst.b		DDSECOND(%a6)		# both q words done?
	bne.b		ddremain
# first quotient digit now correct. store digit and shift the
# (subtracted) dividend 
	mov.w		%d1, DDQUOTIENT(%a6)
	clr.l		%d1
	swap		%d5
	swap		%d6
	mov.w		%d6, %d5
	clr.w		%d6
	st		DDSECOND(%a6)		# second digit
	bra.w		ddnormalized
ddremain:
# add 2nd word to quotient, get the remainder.
	mov.w 		%d1, DDQUOTIENT+2(%a6)
# shift down one word/digit to renormalize remainder.
	mov.w		%d5, %d6
	swap		%d6
	swap		%d5
	mov.l		DDNORMAL(%a6), %d7	# get norm shift count
	beq.b		ddrn
	subq.l		&0x1, %d7		# set for loop count
ddnlp:
	lsr.l		&0x1, %d5		# shift into %d6
	roxr.l		&0x1, %d6
	dbf		%d7, ddnlp
ddrn:
	mov.l		%d6, %d5		# remainder
	mov.l		DDQUOTIENT(%a6), %d6 	# quotient

	rts
dmm2:
# factors for the 32X32->64 multiplication are in %d5 and %d6.
# returns 64 bit result in %d5 (hi) %d6(lo).
# destroys %d2,%d3,%d4.

# multiply hi,lo words of each factor to get 4 intermediate products
	mov.l		%d6, %d2
	mov.l		%d6, %d3
	mov.l		%d5, %d4
	swap		%d3
	swap		%d4
	mulu.w		%d5, %d6		# %d6 <- lsw*lsw
	mulu.w		%d3, %d5		# %d5 <- msw-dest*lsw-source
	mulu.w		%d4, %d2		# %d2 <- msw-source*lsw-dest
	mulu.w		%d4, %d3		# %d3 <- msw*msw
# now use swap and addx to consolidate to two longwords
	clr.l		%d4
	swap		%d6
	add.w		%d5, %d6		# add msw of l*l to lsw of m*l product
	addx.w		%d4, %d3		# add any carry to m*m product
	add.w		%d2, %d6		# add in lsw of other m*l product
	addx.w		%d4, %d3		# add any carry to m*m product
	swap		%d6			# %d6 is low 32 bits of final product
	clr.w		%d5
	clr.w		%d2			# lsw of two mixed products used,
	swap		%d5			# now use msws of longwords
	swap		%d2
	add.l		%d2, %d5				
	add.l		%d3, %d5		# %d5 now ms 32 bits of final product
	rts

##########
dcontrolmodel_s:
	movq.l		&LONG,%d0
	bsr.l		_calc_ea		# calc <ea>

	cmpi.b		SPCOND_FLG(%a6),&immed_flg # immediate addressing mode?
	beq.b		dimmed			# yes

	mov.l		%a0,%a2
	bsr.l		_dmem_read_long		# fetch divisor from <ea>

	tst.l		%d1			# dfetch error?
	bne.b		div64_err		# yes

	mov.l		%d0, %d7
	bra.w		dgotsrcl

# we have to split out immediate data here because it must be read using
# imem_read() instead of dmem_read(). this becomes especially important
# if the fetch runs into some deadly fault.
dimmed:
	addq.l		&0x4,EXC_EXTWPTR(%a6)
	bsr.l		_imem_read_long		# read immediate value

	tst.l		%d1			# ifetch error?
	bne.l		isp_iacc		# yes

	mov.l		%d0,%d7
	bra.w		dgotsrcl

##########

# if dmem_read_long() returns a fail message in d1, the package
# must create an access error frame. here, we pass a skeleton fslw
# and the failing address to the routine that creates the new frame.
# also, we call isp_restore in case the effective addressing mode was
# (an)+ or -(an) in which case the previous "an" value must be restored.
# FSLW:
# 	read = true
# 	size = longword
#	TM = data
# 	software emulation error = true
div64_err:
	bsr.l		isp_restore		# restore addr reg
	mov.l		%a2,%a0			# pass failing address
	mov.l		&0x01010001,%d0		# pass fslw
	bra.l		isp_dacc

#########################################################################
# XDEF ****************************************************************	#
#	_mul64(): routine to emulate mul{u,s}.l <ea>,Dh:Dl 32x32->64	#
#									#
# XREF ****************************************************************	#
#	_calc_ea() - calculate effective address			#
#	isp_iacc() - handle instruction access error exception		#
# 	isp_dacc() - handle data access error exception			#
#	isp_restore() - restore An on access error w/ -() or ()+	#
#									#
# INPUT ***************************************************************	#
#	none								#
#									#
# OUTPUT **************************************************************	#
# 	If exiting through isp_dacc...					#
#		a0 = failing address					#
#		d0 = FSLW						#
# 	else								#
#		none							#
#									#
# ALGORITHM ***********************************************************	#
#	First, decode the operand location. If it's in Dn, fetch from	#
# the stack. If it's in memory, use _calc_ea() to calculate the		#
# effective address. Use _dmem_read_long() to fetch at that address.	#
# Unless the operand is immediate data. Then use _imem_read_long().	#
# Send failures to isp_dacc() or isp_iacc() as appropriate.		#
#	If the operands are signed, make them unsigned and save the 	#
# sign info for later. Perform the multiplication using 16x16->32	#
# unsigned multiplies and "add" instructions. Store the high and low 	#
# portions of the result in the appropriate data registers on the	#
# stack. Calculate the condition codes, also.				#
#									#
#########################################################################

#############
# mul(u,s)l #
#############
	global		_mul64
_mul64:
	mov.b		EXC_OPWORD+1(%a6), %d0	# extract src {mode,reg}
	cmpi.b		%d0, &0x7		# is src mode Dn or other?
	bgt.w		mul64_memop		# src is in memory

# multiplier operand in the data register file.
# must extract the register number and fetch the operand from the stack.
mul64_regop:
	andi.w		&0x7, %d0		# extract Dn
	mov.l		(EXC_DREGS,%a6,%d0.w*4), %d3 # fetch multiplier

# multiplier is in %d3. now, extract Dl and Dh fields and fetch the
# multiplicand from the data register specified by Dl.
mul64_multiplicand:
	mov.w		EXC_EXTWORD(%a6), %d2	# fetch ext word
	clr.w		%d1			# clear Dh reg
	mov.b		%d2, %d1		# grab Dh
	rol.w		&0x4, %d2		# align Dl byte
	andi.w		&0x7, %d2		# extract Dl

	mov.l		(EXC_DREGS,%a6,%d2.w*4), %d4 # get multiplicand

# check for the case of "zero" result early
	tst.l		%d4			# test multiplicand
	beq.w		mul64_zero		# handle zero separately
	tst.l		%d3			# test multiplier
	beq.w		mul64_zero		# handle zero separately

# multiplier is in %d3 and multiplicand is in %d4.
# if the operation is to be signed, then the operands are converted
# to unsigned and the result sign is saved for the end.
	clr.b		EXC_TEMP(%a6)		# clear temp space
	btst		&0x3, EXC_EXTWORD(%a6)	# signed or unsigned?
	beq.b		mul64_alg		# unsigned; skip sgn calc

	tst.l		%d3			# is multiplier negative?
	bge.b		mul64_chk_md_sgn	# no
	neg.l		%d3			# make multiplier positive
	ori.b		&0x1, EXC_TEMP(%a6)	# save multiplier sgn

# the result sign is the exclusive or of the operand sign bits.
mul64_chk_md_sgn:
	tst.l		%d4			# is multiplicand negative?
	bge.b		mul64_alg		# no	
	neg.l		%d4			# make multiplicand positive
	eori.b		&0x1, EXC_TEMP(%a6)	# calculate correct sign

#########################################################################
#	63			   32				0	#
# 	----------------------------					#
# 	| hi(mplier) * hi(mplicand)|					#
# 	----------------------------					#
#		     -----------------------------			#
#		     | hi(mplier) * lo(mplicand) |			#
#		     -----------------------------			#
#		     -----------------------------			#
#		     | lo(mplier) * hi(mplicand) |			#
#		     -----------------------------			#
#	  |			   -----------------------------	#
#	--|--			   | lo(mplier) * lo(mplicand) |	#
#	  |			   -----------------------------	#
#	========================================================	#
#	--------------------------------------------------------	#
#	|	hi(result)	   |	    lo(result)         |	#
#	--------------------------------------------------------	#
#########################################################################
mul64_alg:
# load temp registers with operands
	mov.l		%d3, %d5		# mr in %d5
	mov.l		%d3, %d6		# mr in %d6
	mov.l		%d4, %d7		# md in %d7
	swap		%d6			# hi(mr) in lo %d6
	swap		%d7			# hi(md) in lo %d7

# complete necessary multiplies:
	mulu.w		%d4, %d3		# [1] lo(mr) * lo(md)
	mulu.w		%d6, %d4		# [2] hi(mr) * lo(md)
	mulu.w		%d7, %d5		# [3] lo(mr) * hi(md)
	mulu.w		%d7, %d6		# [4] hi(mr) * hi(md)

# add lo portions of [2],[3] to hi portion of [1].
# add carries produced from these adds to [4].
# lo([1]) is the final lo 16 bits of the result.
	clr.l		%d7			# load %d7 w/ zero value
	swap		%d3			# hi([1]) <==> lo([1])
	add.w		%d4, %d3		# hi([1]) + lo([2])
	addx.l		%d7, %d6		#    [4]  + carry
	add.w		%d5, %d3		# hi([1]) + lo([3])
	addx.l		%d7, %d6		#    [4]  + carry
	swap		%d3			# lo([1]) <==> hi([1])

# lo portions of [2],[3] have been added in to final result.
# now, clear lo, put hi in lo reg, and add to [4]
	clr.w		%d4			# clear lo([2])
	clr.w		%d5			# clear hi([3])
	swap		%d4			# hi([2]) in lo %d4
	swap		%d5			# hi([3]) in lo %d5
	add.l		%d5, %d4		#    [4]  + hi([2])
	add.l		%d6, %d4		#    [4]  + hi([3])

# unsigned result is now in {%d4,%d3}
	tst.b		EXC_TEMP(%a6)		# should result be signed?
	beq.b		mul64_done		# no

# result should be a signed negative number.
# compute 2's complement of the unsigned number:
#   -negate all bits and add 1
mul64_neg:
	not.l		%d3			# negate lo(result) bits
	not.l		%d4			# negate hi(result) bits
	addq.l		&1, %d3			# add 1 to lo(result)
	addx.l		%d7, %d4		# add carry to hi(result)

# the result is saved to the register file.
# for '040 compatability, if Dl == Dh then only the hi(result) is
# saved. so, saving hi after lo accomplishes this without need to
# check Dl,Dh equality.
mul64_done:
	mov.l		%d3, (EXC_DREGS,%a6,%d2.w*4) # save lo(result)
	mov.w		&0x0, %cc
	mov.l		%d4, (EXC_DREGS,%a6,%d1.w*4) # save hi(result)

# now, grab the condition codes. only one that can be set is 'N'.
# 'N' CAN be set if the operation is unsigned if bit 63 is set.
	mov.w		%cc, %d7		# fetch %ccr to see if 'N' set
	andi.b		&0x8, %d7		# extract 'N' bit

mul64_ccode_set:
	mov.b		EXC_CC+1(%a6), %d6 	# fetch previous %ccr
	andi.b		&0x10, %d6		# all but 'X' bit changes

	or.b		%d7, %d6		# group 'X' and 'N'
	mov.b		%d6, EXC_CC+1(%a6)	# save new %ccr

	rts

# one or both of the operands is zero so the result is also zero.
# save the zero result to the register file and set the 'Z' ccode bit.
mul64_zero:
	clr.l		(EXC_DREGS,%a6,%d2.w*4) # save lo(result)
	clr.l		(EXC_DREGS,%a6,%d1.w*4) # save hi(result)

	movq.l		&0x4, %d7		# set 'Z' ccode bit
	bra.b		mul64_ccode_set		# finish ccode set

##########

# multiplier operand is in memory at the effective address.
# must calculate the <ea> and go fetch the 32-bit operand.
mul64_memop:
	movq.l		&LONG, %d0		# pass # of bytes
	bsr.l		_calc_ea		# calculate <ea>

	cmpi.b		SPCOND_FLG(%a6),&immed_flg # immediate addressing mode?
	beq.b		mul64_immed		# yes

	mov.l		%a0,%a2
	bsr.l		_dmem_read_long		# fetch src from addr (%a0)

	tst.l		%d1			# dfetch error?
	bne.w		mul64_err		# yes

	mov.l		%d0, %d3		# store multiplier in %d3

	bra.w		mul64_multiplicand

# we have to split out immediate data here because it must be read using
# imem_read() instead of dmem_read(). this becomes especially important
# if the fetch runs into some deadly fault.
mul64_immed:
	addq.l		&0x4,EXC_EXTWPTR(%a6)
	bsr.l		_imem_read_long		# read immediate value

	tst.l		%d1			# ifetch error?
	bne.l		isp_iacc		# yes

	mov.l		%d0,%d3
	bra.w		mul64_multiplicand

##########

# if dmem_read_long() returns a fail message in d1, the package
# must create an access error frame. here, we pass a skeleton fslw
# and the failing address to the routine that creates the new frame.
# also, we call isp_restore in case the effective addressing mode was
# (an)+ or -(an) in which case the previous "an" value must be restored.
# FSLW:
# 	read = true
# 	size = longword
#	TM = data
# 	software emulation error = true
mul64_err:
	bsr.l		isp_restore		# restore addr reg
	mov.l		%a2,%a0			# pass failing address
	mov.l		&0x01010001,%d0		# pass fslw
	bra.l		isp_dacc

#########################################################################
# XDEF ****************************************************************	#
#	_compandset2(): routine to emulate cas2()			#
#			(internal to package)				#
#									#
#	_isp_cas2_finish(): store ccodes, store compare regs		#
#			    (external to package)			#
#									#
# XREF ****************************************************************	#
#	_real_lock_page() - "callout" to lock op's page from page-outs	#
#	_cas_terminate2() - access error exit				#
#	_real_cas2() - "callout" to core cas2 emulation code		#
#	_real_unlock_page() - "callout" to unlock page			#
#									#
# INPUT ***************************************************************	#
# _compandset2():							#
#	d0 = instruction extension word					#
#									#
# _isp_cas2_finish():							#
#	see cas2 core emulation code					#
# 									#
# OUTPUT **************************************************************	#
# _compandset2():							#
#	see cas2 core emulation code					#
#									#
# _isp_cas_finish():							#
#	None (register file or memroy changed as appropriate)		#
#									#
# ALGORITHM ***********************************************************	#
# compandset2():							#
#	Decode the instruction and fetch the appropriate Update and	#
# Compare operands. Then call the "callout" _real_lock_page() for each	#
# memory operand address so that the operating system can keep these	#
# pages from being paged out. If either _real_lock_page() fails, exit	#
# through _cas_terminate2(). Don't forget to unlock the 1st locked page	#
# using _real_unlock_paged() if the 2nd lock-page fails.		#
# Finally, branch to the core cas2 emulation code by calling the 	#
# "callout" _real_cas2().						#
#									#
# _isp_cas2_finish():							#
#	Re-perform the comparison so we can determine the condition	#
# codes which were too much trouble to keep around during the locked	#
# emulation. Then unlock each operands page by calling the "callout"	#
# _real_unlock_page().							#
#									#
#########################################################################

set ADDR1,	EXC_TEMP+0xc
set ADDR2,	EXC_TEMP+0x0
set DC2,	EXC_TEMP+0xa
set DC1,	EXC_TEMP+0x8

	global		_compandset2
_compandset2:
	mov.l		%d0,EXC_TEMP+0x4(%a6)		# store for possible restart
	mov.l		%d0,%d1			# extension word in d0

	rol.w		&0x4,%d0
	andi.w		&0xf,%d0		# extract Rn2
	mov.l		(EXC_DREGS,%a6,%d0.w*4),%a1 # fetch ADDR2
	mov.l		%a1,ADDR2(%a6)

	mov.l		%d1,%d0

	lsr.w		&0x6,%d1
	andi.w		&0x7,%d1		# extract Du2
	mov.l		(EXC_DREGS,%a6,%d1.w*4),%d5 # fetch Update2 Op

	andi.w		&0x7,%d0		# extract Dc2
	mov.l		(EXC_DREGS,%a6,%d0.w*4),%d3 # fetch Compare2 Op
	mov.w		%d0,DC2(%a6)

	mov.w		EXC_EXTWORD(%a6),%d0
	mov.l		%d0,%d1

	rol.w		&0x4,%d0
	andi.w		&0xf,%d0		# extract Rn1
	mov.l		(EXC_DREGS,%a6,%d0.w*4),%a0 # fetch ADDR1
	mov.l		%a0,ADDR1(%a6)

	mov.l		%d1,%d0

	lsr.w		&0x6,%d1
	andi.w		&0x7,%d1		# extract Du1
	mov.l		(EXC_DREGS,%a6,%d1.w*4),%d4 # fetch Update1 Op
	
	andi.w		&0x7,%d0		# extract Dc1
	mov.l		(EXC_DREGS,%a6,%d0.w*4),%d2 # fetch Compare1 Op
	mov.w		%d0,DC1(%a6)

	btst		&0x1,EXC_OPWORD(%a6)	# word or long?
	sne		%d7

	btst		&0x5,EXC_ISR(%a6)	# user or supervisor?
	sne		%d6

	mov.l		%a0,%a2
	mov.l		%a1,%a3

	mov.l		%d7,%d1			# pass size
	mov.l		%d6,%d0			# pass mode
	bsr.l		_real_lock_page		# lock page
	mov.l		%a2,%a0
	tst.l		%d0			# error?
	bne.l		_cas_terminate2		# yes

	mov.l		%d7,%d1			# pass size
	mov.l		%d6,%d0			# pass mode
	mov.l		%a3,%a0			# pass addr
	bsr.l		_real_lock_page		# lock page
	mov.l		%a3,%a0
	tst.l		%d0			# error?
	bne.b		cas_preterm		# yes

	mov.l		%a2,%a0
	mov.l		%a3,%a1

	bra.l		_real_cas2

# if the 2nd lock attempt fails, then we must still unlock the 
# first page(s).
cas_preterm:
	mov.l		%d0,-(%sp)		# save FSLW
	mov.l		%d7,%d1			# pass size
	mov.l		%d6,%d0			# pass mode
	mov.l		%a2,%a0			# pass ADDR1
	bsr.l		_real_unlock_page	# unlock first page(s)
	mov.l		(%sp)+,%d0		# restore FSLW
	mov.l		%a3,%a0			# pass failing addr
	bra.l		_cas_terminate2

#############################################################

	global		_isp_cas2_finish
_isp_cas2_finish:
	btst		&0x1,EXC_OPWORD(%a6)
	bne.b		cas2_finish_l

	mov.w		EXC_CC(%a6),%cc		# load old ccodes
	cmp.w		%d0,%d2
	bne.b		cas2_finish_w_save
	cmp.w		%d1,%d3
cas2_finish_w_save:
	mov.w		%cc,EXC_CC(%a6)		# save new ccodes

	tst.b		%d4			# update compare reg?
	bne.b		cas2_finish_w_done	# no

	mov.w		DC2(%a6),%d3		# fetch Dc2
	mov.w		%d1,(2+EXC_DREGS,%a6,%d3.w*4) # store new Compare2 Op

	mov.w		DC1(%a6),%d2		# fetch Dc1
	mov.w		%d0,(2+EXC_DREGS,%a6,%d2.w*4) # store new Compare1 Op

cas2_finish_w_done:
	btst		&0x5,EXC_ISR(%a6)
	sne		%d2
	mov.l		%d2,%d0			# pass mode
	sf		%d1			# pass size
	mov.l		ADDR1(%a6),%a0		# pass ADDR1
	bsr.l		_real_unlock_page	# unlock page
	
	mov.l		%d2,%d0			# pass mode
	sf		%d1			# pass size
	mov.l		ADDR2(%a6),%a0		# pass ADDR2
	bsr.l		_real_unlock_page	# unlock page
	rts

cas2_finish_l:
	mov.w		EXC_CC(%a6),%cc		# load old ccodes
	cmp.l		%d0,%d2
	bne.b		cas2_finish_l_save
	cmp.l		%d1,%d3
cas2_finish_l_save:
	mov.w		%cc,EXC_CC(%a6)		# save new ccodes

	tst.b		%d4			# update compare reg?
	bne.b		cas2_finish_l_done	# no

	mov.w		DC2(%a6),%d3		# fetch Dc2
	mov.l		%d1,(EXC_DREGS,%a6,%d3.w*4) # store new Compare2 Op

	mov.w		DC1(%a6),%d2		# fetch Dc1
	mov.l		%d0,(EXC_DREGS,%a6,%d2.w*4) # store new Compare1 Op

cas2_finish_l_done:
	btst		&0x5,EXC_ISR(%a6)
	sne		%d2
	mov.l		%d2,%d0			# pass mode
	st		%d1			# pass size
	mov.l		ADDR1(%a6),%a0		# pass ADDR1
	bsr.l		_real_unlock_page	# unlock page
	
	mov.l		%d2,%d0			# pass mode
	st		%d1			# pass size
	mov.l		ADDR2(%a6),%a0		# pass ADDR2
	bsr.l		_real_unlock_page	# unlock page
	rts

########
	global		cr_cas2
cr_cas2:
	mov.l		EXC_TEMP+0x4(%a6),%d0
	bra.w		_compandset2

#########################################################################
# XDEF ****************************************************************	#
#	_compandset(): routine to emulate cas w/ misaligned <ea>	#
#		       (internal to package)				#
#	_isp_cas_finish(): routine called when cas emulation completes	#
#			   (external and internal to package)		#
#	_isp_cas_restart(): restart cas emulation after a fault		#
#			    (external to package)			#
#	_isp_cas_terminate(): create access error stack frame on fault	#
#			      (external and internal to package)	#
#	_isp_cas_inrange(): checks whether instr addess is within range	#
#			    of core cas/cas2emulation code		#
#			    (external to package)			#
#									#
# XREF ****************************************************************	#
# 	_calc_ea(): calculate effective address				#
#									#
# INPUT ***************************************************************	#
# compandset():								#
# 	none								#
# _isp_cas_restart():							#
#	d6 = previous sfc/dfc						#
# _isp_cas_finish():							#
# _isp_cas_terminate():							#
#	a0 = failing address						#
#	d0 = FSLW							#
#	d6 = previous sfc/dfc						#
# _isp_cas_inrange():							#
#	a0 = instruction address to be checked				#
#									#
# OUTPUT **************************************************************	#
# compandset():								#
#		none							#
# _isp_cas_restart():							#
#	a0 = effective address						#
#	d7 = word or longword flag					#
# _isp_cas_finish():							#
#	a0 = effective address						#
# _isp_cas_terminate():							#
#	initial register set before emulation exception			#
# _isp_cas_inrange():							#
#	d0 = 0 => in range; -1 => out of range				#
#									#
# ALGORITHM ***********************************************************	#
#									#
# compandset():								#
#	First, calculate the effective address. Then, decode the 	#
# instruction word and fetch the "compare" (DC) and "update" (Du)	#
# operands.								#
# 	Next, call the external routine _real_lock_page() so that the	#
# operating system can keep this page from being paged out while we're	#
# in this routine. If this call fails, jump to _cas_terminate2().	#
#	The routine then branches to _real_cas(). This external routine	#
# that actually emulates cas can be supplied by the external os or	#
# made to point directly back into the 060ISP which has a routine for	#
# this purpose.								#
#									#
# _isp_cas_finish():							#
# 	Either way, after emulation, the package is re-entered at	#
# _isp_cas_finish(). This routine re-compares the operands in order to	#
# set the condition codes. Finally, these routines will call		#
# _real_unlock_page() in order to unlock the pages that were previously	#
# locked.								#
#									#
# _isp_cas_restart():							#
#	This routine can be entered from an access error handler where	#
# the emulation sequence should be re-started from the beginning.	#
#									#
# _isp_cas_terminate():							#
#	This routine can be entered from an access error handler where	#
# an emulation operand access failed and the operating system would	#
# like an access error stack frame created instead of the current 	#
# unimplemented integer instruction frame.				#
# 	Also, the package enters here if a call to _real_lock_page()	#
# fails.								#
#									#
# _isp_cas_inrange():							#
# 	Checks to see whether the instruction address passed to it in	#
# a0 is within the software package cas/cas2 emulation routines. This	#
# can be helpful for an operating system to determine whether an access	#
# error during emulation was due to a cas/cas2 emulation access.	#
#									#
#########################################################################

set DC,		EXC_TEMP+0x8
set ADDR,	EXC_TEMP+0x4

	global		_compandset
_compandset:
	btst		&0x1,EXC_OPWORD(%a6)	# word or long operation?
	bne.b		compandsetl		# long	

compandsetw:
	movq.l		&0x2,%d0		# size = 2 bytes
	bsr.l		_calc_ea		# a0 = calculated <ea>	
	mov.l		%a0,ADDR(%a6)		# save <ea> for possible restart
	sf		%d7			# clear d7 for word size
	bra.b		compandsetfetch

compandsetl:
	movq.l		&0x4,%d0		# size = 4 bytes
	bsr.l		_calc_ea		# a0 = calculated <ea>	
	mov.l		%a0,ADDR(%a6)		# save <ea> for possible restart
	st		%d7			# set d7 for longword size

compandsetfetch:
	mov.w		EXC_EXTWORD(%a6),%d0	# fetch cas extension word
	mov.l		%d0,%d1			# make a copy

	lsr.w		&0x6,%d0
	andi.w		&0x7,%d0		# extract Du
	mov.l		(EXC_DREGS,%a6,%d0.w*4),%d2 # get update operand

	andi.w		&0x7,%d1		# extract Dc
	mov.l		(EXC_DREGS,%a6,%d1.w*4),%d4 # get compare operand
	mov.w		%d1,DC(%a6)		# save Dc

	btst		&0x5,EXC_ISR(%a6)	# which mode for exception?
	sne		%d6			# set on supervisor mode

	mov.l		%a0,%a2			# save temporarily
	mov.l		%d7,%d1			# pass size
	mov.l		%d6,%d0			# pass mode
	bsr.l		_real_lock_page		# lock page
	tst.l		%d0			# did error occur?
	bne.w		_cas_terminate2		# yes, clean up the mess
	mov.l		%a2,%a0			# pass addr in a0
	
	bra.l		_real_cas

########
	global		_isp_cas_finish
_isp_cas_finish:
	btst		&0x1,EXC_OPWORD(%a6)
	bne.b		cas_finish_l

# just do the compare again since it's faster than saving the ccodes
# from the locked routine...
cas_finish_w:
	mov.w		EXC_CC(%a6),%cc		# restore cc
	cmp.w	 	%d0,%d4			# do word compare
	mov.w		%cc,EXC_CC(%a6)		# save cc

	tst.b		%d1			# update compare reg?
	bne.b		cas_finish_w_done	# no

	mov.w		DC(%a6),%d3
	mov.w		%d0,(EXC_DREGS+2,%a6,%d3.w*4) # Dc = destination

cas_finish_w_done:
	mov.l		ADDR(%a6),%a0		# pass addr
	sf		%d1			# pass size
	btst		&0x5,EXC_ISR(%a6)
	sne		%d0			# pass mode
	bsr.l		_real_unlock_page	# unlock page
	rts

# just do the compare again since it's faster than saving the ccodes
# from the locked routine...
cas_finish_l:
	mov.w		EXC_CC(%a6),%cc		# restore cc
	cmp.l	 	%d0,%d4			# do longword compare
	mov.w		%cc,EXC_CC(%a6)		# save cc

	tst.b		%d1			# update compare reg?
	bne.b		cas_finish_l_done	# no

	mov.w		DC(%a6),%d3
	mov.l		%d0,(EXC_DREGS,%a6,%d3.w*4) # Dc = destination

cas_finish_l_done:
	mov.l		ADDR(%a6),%a0		# pass addr
	st		%d1			# pass size
	btst		&0x5,EXC_ISR(%a6)
	sne		%d0			# pass mode
	bsr.l		_real_unlock_page	# unlock page
	rts

########
	
	global		_isp_cas_restart
_isp_cas_restart:
	mov.l		%d6,%sfc		# restore previous sfc
	mov.l		%d6,%dfc		# restore previous dfc

	cmpi.b		EXC_OPWORD+1(%a6),&0xfc	# cas or cas2?
	beq.l		cr_cas2			# cas2
cr_cas:
	mov.l		ADDR(%a6),%a0		# load <ea>
	btst		&0x1,EXC_OPWORD(%a6)	# word or long operation?
	sne		%d7			# set d7 accordingly
	bra.w		compandsetfetch	

########

# At this stage, it would be nice if d0 held the FSLW.
	global		_isp_cas_terminate
_isp_cas_terminate:
	mov.l		%d6,%sfc		# restore previous sfc
	mov.l		%d6,%dfc		# restore previous dfc

	global		_cas_terminate2
_cas_terminate2:
	mov.l		%a0,%a2			# copy failing addr to a2

	mov.l		%d0,-(%sp)
	bsr.l		isp_restore		# restore An (if ()+ or -())
	mov.l		(%sp)+,%d0

	addq.l		&0x4,%sp		# remove sub return addr
	subq.l		&0x8,%sp		# make room for bigger stack
	subq.l		&0x8,%a6		# shift frame ptr down, too
	mov.l		&26,%d1			# want to move 51 longwords
	lea		0x8(%sp),%a0		# get address of old stack
	lea		0x0(%sp),%a1		# get address of new stack
cas_term_cont:
	mov.l		(%a0)+,(%a1)+		# move a longword
	dbra.w		%d1,cas_term_cont	# keep going

	mov.w		&0x4008,EXC_IVOFF(%a6)	# put new stk fmt, voff
	mov.l		%a2,EXC_IVOFF+0x2(%a6)	# put faulting addr on stack
	mov.l		%d0,EXC_IVOFF+0x6(%a6)	# put FSLW on stack
	movm.l		EXC_DREGS(%a6),&0x3fff	# restore user regs
	unlk		%a6			# unlink stack frame
	bra.l		_real_access

########

	global		_isp_cas_inrange
_isp_cas_inrange:
	clr.l		%d0			# clear return result
	lea		_CASHI(%pc),%a1		# load end of CAS core code
	cmp.l		%a1,%a0			# is PC in range?
	blt.b		cin_no			# no
	lea		_CASLO(%pc),%a1		# load begin of CAS core code
	cmp.l		%a0,%a1			# is PC in range?
	blt.b		cin_no			# no
	rts					# yes; return d0 = 0
cin_no:	
	mov.l		&-0x1,%d0		# out of range; return d0 = -1
	rts

#################################################################
#################################################################
#################################################################
# This is the start of the cas and cas2 "core" emulation code.	#
# This is the section that may need to be replaced by the host	#
# OS if it is too operating system-specific.			#
# Please refer to the package documentation to see how to	#
# "replace" this section, if necessary.				#
#################################################################
#################################################################
#################################################################

#       ######      ##      ######     ####
#       #	   #  #     #         #    #
#	#	  ######    ######        #
#	#	  #    #         #      #
#       ######    #    #    ######    ######

#########################################################################
# XDEF ****************************************************************	#
#	_isp_cas2(): "core" emulation code for the cas2 instruction	#
#									#
# XREF ****************************************************************	#
#	_isp_cas2_finish() - only exit point for this emulation code;	#
#			     do clean-up; calculate ccodes; store 	#
#			     Compare Ops if appropriate.		#
#									#
# INPUT ***************************************************************	#
#	*see chart below*						#
# 									#
# OUTPUT **************************************************************	#
#	*see chart below*						#
#									#
# ALGORITHM ***********************************************************	#
#	(1) Make several copies of the effective address.		#
#	(2) Save current SR; Then mask off all maskable interrupts.	#
#	(3) Save current SFC/DFC (ASSUMED TO BE EQUAL!!!); Then set 	#
#	    according to whether exception occurred in user or 		#
#	    supervisor mode.						#
#	(4) Use "plpaw" instruction to pre-load ATC with effective	#
#	    address pages(s). THIS SHOULD NOT FAULT!!! The relevant	#
#	    page(s) should have already been made resident prior to	#
# 	    entering this routine.					#
#	(5) Push the operand lines from the cache w/ "cpushl". 		#
#	    In the 68040, this was done within the locked region. In	#
# 	    the 68060, it is done outside of the locked region.		#
#	(6) Use "plpar" instruction to do a re-load of ATC entries for	#
#	    ADDR1 since ADDR2 entries may have pushed ADDR1 out of the	#
#	    ATC.							#
#	(7) Pre-fetch the core emulation instructions by executing	#
#	    one branch within each physical line (16 bytes) of the code	#
#	    before actually executing the code.				#
#	(8) Load the BUSCR w/ the bus lock value.			#
#	(9) Fetch the source operands using "moves".			#
#	(10)Do the compares. If both equal, go to step (13).		#
#	(11)Unequal. No update occurs. But, we do write the DST1 op	#
#	    back to itself (as w/ the '040) so we can gracefully unlock	#
#	    the bus (and assert LOCKE*) using BUSCR and the final move.	#
#	(12)Exit.							#
#	(13)Write update operand to the DST locations. Use BUSCR to 	#
#	    assert LOCKE* for the final write operation.		#
#	(14)Exit.							#
#									#
# 	The algorithm is actually implemented slightly differently	#
# depending on the size of the operation and the misalignment of the 	#
# operands. A misaligned operand must be written in aligned chunks or	#
# else the BUSCR register control gets confused.			#
#									#
#########################################################################

#################################################################
# THIS IS THE STATE OF THE INTEGER REGISTER FILE UPON		# 
# ENTERING _isp_cas2().						#
#								#
# D0 = xxxxxxxx							#
# D1 = xxxxxxxx							#
# D2 = cmp operand 1						#
# D3 = cmp operand 2						#
# D4 = update oper 1						#
# D5 = update oper 2						#
# D6 = 'xxxxxxff if supervisor mode; 'xxxxxx00 if user mode	#
# D7 = 'xxxxxxff if longword operation; 'xxxxxx00 if word 	#
# A0 = ADDR1							#
# A1 = ADDR2							#
# A2 = xxxxxxxx							#
# A3 = xxxxxxxx							#
# A4 = xxxxxxxx							#
# A5 = xxxxxxxx							#
# A6 = frame pointer						#
# A7 = stack pointer						#
#################################################################

#	align		0x1000
# beginning label used by _isp_cas_inrange()
	global		_CASLO
_CASLO:

	global		_isp_cas2
_isp_cas2:
	tst.b		%d6			# user or supervisor mode?
	bne.b		cas2_supervisor		# supervisor
cas2_user:
	movq.l		&0x1,%d0		# load user data fc
	bra.b		cas2_cont
cas2_supervisor:
	movq.l		&0x5,%d0		# load supervisor data fc
cas2_cont:
	tst.b		%d7			# word or longword?
	beq.w		cas2w			# word

####
cas2l:
	mov.l		%a0,%a2			# copy ADDR1
	mov.l		%a1,%a3			# copy ADDR2
	mov.l		%a0,%a4			# copy ADDR1
	mov.l		%a1,%a5			# copy ADDR2

	addq.l		&0x3,%a4		# ADDR1+3
	addq.l		&0x3,%a5		# ADDR2+3
	mov.l		%a2,%d1			# ADDR1

# mask interrupts levels 0-6. save old mask value.
	mov.w		%sr,%d7			# save current SR
	ori.w		&0x0700,%sr		# inhibit interrupts

# load the SFC and DFC with the appropriate mode.
	movc		%sfc,%d6		# save old SFC/DFC
	movc		%d0,%sfc		# store new SFC
	movc		%d0,%dfc		# store new DFC

# pre-load the operand ATC. no page faults should occur here because
# _real_lock_page() should have taken care of this.
	plpaw		(%a2)			# load atc for ADDR1
	plpaw		(%a4)			# load atc for ADDR1+3
	plpaw		(%a3)			# load atc for ADDR2
	plpaw		(%a5)			# load atc for ADDR2+3

# push the operand lines from the cache if they exist.
	cpushl		%dc,(%a2)		# push line for ADDR1
	cpushl		%dc,(%a4)		# push line for ADDR1+3
	cpushl		%dc,(%a3)		# push line for ADDR2
	cpushl		%dc,(%a5)		# push line for ADDR2+2

	mov.l		%d1,%a2			# ADDR1
	addq.l		&0x3,%d1
	mov.l		%d1,%a4			# ADDR1+3
# if ADDR1 was ATC resident before the above "plpaw" and was executed
# and it was the next entry scheduled for replacement and ADDR2
# shares the same set, then the "plpaw" for ADDR2 can push the ADDR1
# entries from the ATC. so, we do a second set of "plpa"s.
	plpar		(%a2)			# load atc for ADDR1
	plpar		(%a4)			# load atc for ADDR1+3

# load the BUSCR values.
	mov.l		&0x80000000,%a2		# assert LOCK* buscr value
	mov.l		&0xa0000000,%a3		# assert LOCKE* buscr value
	mov.l		&0x00000000,%a4		# buscr unlock value

# there are three possible mis-aligned cases for longword cas. they
# are separated because the final write which asserts LOCKE* must
# be aligned.
	mov.l		%a0,%d0			# is ADDR1 misaligned?
	andi.b		&0x3,%d0
	beq.b		CAS2L_ENTER		# no
	cmpi.b		%d0,&0x2
	beq.w		CAS2L2_ENTER		# yes; word misaligned
	bra.w		CAS2L3_ENTER		# yes; byte misaligned

#
# D0 = dst operand 1 <-
# D1 = dst operand 2 <-
# D2 = cmp operand 1
# D3 = cmp operand 2
# D4 = update oper 1
# D5 = update oper 2
# D6 = old SFC/DFC
# D7 = old SR
# A0 = ADDR1
# A1 = ADDR2
# A2 = bus LOCK*  value
# A3 = bus LOCKE* value
# A4 = bus unlock value
# A5 = xxxxxxxx
#
	align 		0x10
CAS2L_START:
	movc		%a2,%buscr		# assert LOCK*
	movs.l		(%a1),%d1		# fetch Dest2[31:0]
	movs.l		(%a0),%d0		# fetch Dest1[31:0]
	bra.b 		CAS2L_CONT
CAS2L_ENTER:
	bra.b		~+16

CAS2L_CONT:
	cmp.l	 	%d0,%d2			# Dest1 - Compare1
	bne.b		CAS2L_NOUPDATE
	cmp.l	 	%d1,%d3			# Dest2 - Compare2
	bne.b		CAS2L_NOUPDATE
	movs.l		%d5,(%a1)		# Update2[31:0] -> DEST2
	bra.b 		CAS2L_UPDATE
	bra.b		~+16

CAS2L_UPDATE:
	movc		%a3,%buscr		# assert LOCKE*
	movs.l		%d4,(%a0)		# Update1[31:0] -> DEST1
	movc		%a4,%buscr		# unlock the bus
	bra.b		cas2l_update_done
	bra.b		~+16

CAS2L_NOUPDATE:
	movc		%a3,%buscr		# assert LOCKE*
	movs.l		%d0,(%a0)		# Dest1[31:0] -> DEST1
	movc		%a4,%buscr		# unlock the bus
	bra.b		cas2l_noupdate_done
	bra.b		~+16

CAS2L_FILLER:
	nop
	nop
	nop
	nop
	nop
	nop
	nop
	bra.b		CAS2L_START

####

#################################################################
# THIS MUST BE THE STATE OF THE INTEGER REGISTER FILE UPON	# 
# ENTERING _isp_cas2().						#
#								#
# D0 = destination[31:0] operand 1				#
# D1 = destination[31:0] operand 2				#
# D2 = cmp[31:0] operand 1					#
# D3 = cmp[31:0] operand 2					#
# D4 = 'xxxxxx11 -> no reg update; 'xxxxxx00 -> update required	#
# D5 = xxxxxxxx							#
# D6 = xxxxxxxx							#
# D7 = xxxxxxxx							#
# A0 = xxxxxxxx							#
# A1 = xxxxxxxx							#
# A2 = xxxxxxxx							#
# A3 = xxxxxxxx							#
# A4 = xxxxxxxx							#
# A5 = xxxxxxxx							#
# A6 = frame pointer						#
# A7 = stack pointer						#
#################################################################

cas2l_noupdate_done:

# restore previous SFC/DFC value.
	movc		%d6,%sfc		# restore old SFC
	movc		%d6,%dfc		# restore old DFC

# restore previous interrupt mask level.
	mov.w		%d7,%sr			# restore old SR

	sf		%d4			# indicate no update was done
	bra.l		_isp_cas2_finish

cas2l_update_done:

# restore previous SFC/DFC value.
	movc		%d6,%sfc		# restore old SFC
	movc		%d6,%dfc		# restore old DFC

# restore previous interrupt mask level.
	mov.w		%d7,%sr			# restore old SR

	st		%d4			# indicate update was done
	bra.l		_isp_cas2_finish
####

	align 		0x10
CAS2L2_START:
	movc		%a2,%buscr		# assert LOCK*
	movs.l		(%a1),%d1		# fetch Dest2[31:0]
	movs.l		(%a0),%d0		# fetch Dest1[31:0]
	bra.b 		CAS2L2_CONT
CAS2L2_ENTER:
	bra.b		~+16

CAS2L2_CONT:
	cmp.l	 	%d0,%d2			# Dest1 - Compare1
	bne.b		CAS2L2_NOUPDATE
	cmp.l	 	%d1,%d3			# Dest2 - Compare2
	bne.b		CAS2L2_NOUPDATE
	movs.l		%d5,(%a1)		# Update2[31:0] -> Dest2
	bra.b 		CAS2L2_UPDATE
	bra.b		~+16

CAS2L2_UPDATE:
	swap		%d4			# get Update1[31:16]
	movs.w		%d4,(%a0)+		# Update1[31:16] -> DEST1
	movc		%a3,%buscr		# assert LOCKE*
	swap		%d4			# get Update1[15:0]
	bra.b		CAS2L2_UPDATE2
	bra.b		~+16

CAS2L2_UPDATE2:
	movs.w		%d4,(%a0)		# Update1[15:0] -> DEST1+0x2
	movc		%a4,%buscr		# unlock the bus
	bra.w		cas2l_update_done
	nop
	bra.b		~+16

CAS2L2_NOUPDATE:
	swap		%d0			# get Dest1[31:16]
	movs.w		%d0,(%a0)+		# Dest1[31:16] -> DEST1
	movc		%a3,%buscr		# assert LOCKE*
	swap		%d0			# get Dest1[15:0]
	bra.b		CAS2L2_NOUPDATE2
	bra.b		~+16

CAS2L2_NOUPDATE2:
	movs.w		%d0,(%a0)		# Dest1[15:0] -> DEST1+0x2
	movc		%a4,%buscr		# unlock the bus
	bra.w		cas2l_noupdate_done
	nop
	bra.b		~+16

CAS2L2_FILLER:
	nop
	nop
	nop
	nop
	nop
	nop
	nop
	bra.b		CAS2L2_START

#################################

	align 		0x10
CAS2L3_START:
	movc		%a2,%buscr		# assert LOCK*
	movs.l		(%a1),%d1		# fetch Dest2[31:0]
	movs.l		(%a0),%d0		# fetch Dest1[31:0]
	bra.b 		CAS2L3_CONT
CAS2L3_ENTER:
	bra.b		~+16

CAS2L3_CONT:
	cmp.l	 	%d0,%d2			# Dest1 - Compare1
	bne.b		CAS2L3_NOUPDATE
	cmp.l	 	%d1,%d3			# Dest2 - Compare2
	bne.b		CAS2L3_NOUPDATE
	movs.l		%d5,(%a1)		# Update2[31:0] -> DEST2
	bra.b 		CAS2L3_UPDATE
	bra.b		~+16

CAS2L3_UPDATE:
	rol.l		&0x8,%d4		# get Update1[31:24]
	movs.b		%d4,(%a0)+		# Update1[31:24] -> DEST1
	swap		%d4			# get Update1[23:8]
	movs.w		%d4,(%a0)+		# Update1[23:8] -> DEST1+0x1
	bra.b		CAS2L3_UPDATE2
	bra.b		~+16

CAS2L3_UPDATE2:
	rol.l		&0x8,%d4		# get Update1[7:0]
	movc		%a3,%buscr		# assert LOCKE*
	movs.b		%d4,(%a0)		# Update1[7:0] -> DEST1+0x3
	bra.b		CAS2L3_UPDATE3
	nop
	bra.b		~+16

CAS2L3_UPDATE3:
	movc		%a4,%buscr		# unlock the bus
	bra.w		cas2l_update_done
	nop
	nop
	nop
	bra.b		~+16
	
CAS2L3_NOUPDATE:
	rol.l		&0x8,%d0		# get Dest1[31:24]
	movs.b		%d0,(%a0)+		# Dest1[31:24] -> DEST1
	swap		%d0			# get Dest1[23:8]
	movs.w		%d0,(%a0)+		# Dest1[23:8] -> DEST1+0x1
	bra.b		CAS2L3_NOUPDATE2
	bra.b		~+16

CAS2L3_NOUPDATE2:
	rol.l		&0x8,%d0		# get Dest1[7:0]
	movc		%a3,%buscr		# assert LOCKE*
	movs.b		%d0,(%a0)		# Update1[7:0] -> DEST1+0x3
	bra.b		CAS2L3_NOUPDATE3
	nop
	bra.b		~+16

CAS2L3_NOUPDATE3:
	movc		%a4,%buscr		# unlock the bus
	bra.w		cas2l_noupdate_done
	nop
	nop
	nop
	bra.b		~+14

CAS2L3_FILLER:
	nop
	nop
	nop
	nop
	nop
	nop
	bra.w		CAS2L3_START

#############################################################
#############################################################

cas2w:
	mov.l		%a0,%a2			# copy ADDR1
	mov.l		%a1,%a3			# copy ADDR2
	mov.l		%a0,%a4			# copy ADDR1
	mov.l		%a1,%a5			# copy ADDR2

	addq.l		&0x1,%a4		# ADDR1+1
	addq.l		&0x1,%a5		# ADDR2+1
	mov.l		%a2,%d1			# ADDR1

# mask interrupt levels 0-6. save old mask value.
	mov.w		%sr,%d7			# save current SR
	ori.w		&0x0700,%sr		# inhibit interrupts

# load the SFC and DFC with the appropriate mode.
	movc		%sfc,%d6		# save old SFC/DFC
	movc		%d0,%sfc		# store new SFC
	movc		%d0,%dfc		# store new DFC

# pre-load the operand ATC. no page faults should occur because
# _real_lock_page() should have taken care of this.
	plpaw		(%a2)			# load atc for ADDR1
	plpaw		(%a4)			# load atc for ADDR1+1
	plpaw		(%a3)			# load atc for ADDR2
	plpaw		(%a5)			# load atc for ADDR2+1

# push the operand cache lines from the cache if they exist.
	cpushl		%dc,(%a2)		# push line for ADDR1
	cpushl		%dc,(%a4)		# push line for ADDR1+1
	cpushl		%dc,(%a3)		# push line for ADDR2
	cpushl		%dc,(%a5)		# push line for ADDR2+1

	mov.l		%d1,%a2			# ADDR1
	addq.l		&0x3,%d1
	mov.l		%d1,%a4			# ADDR1+3
# if ADDR1 was ATC resident before the above "plpaw" and was executed
# and it was the next entry scheduled for replacement and ADDR2
# shares the same set, then the "plpaw" for ADDR2 can push the ADDR1
# entries from the ATC. so, we do a second set of "plpa"s.
	plpar		(%a2)			# load atc for ADDR1
	plpar		(%a4)			# load atc for ADDR1+3

# load the BUSCR values.
	mov.l		&0x80000000,%a2		# assert LOCK* buscr value
	mov.l		&0xa0000000,%a3		# assert LOCKE* buscr value
	mov.l		&0x00000000,%a4		# buscr unlock value

# there are two possible mis-aligned cases for word cas. they
# are separated because the final write which asserts LOCKE* must
# be aligned.
	mov.l		%a0,%d0			# is ADDR1 misaligned?
	btst		&0x0,%d0
	bne.w		CAS2W2_ENTER		# yes
	bra.b		CAS2W_ENTER		# no

#
# D0 = dst operand 1 <-
# D1 = dst operand 2 <-
# D2 = cmp operand 1
# D3 = cmp operand 2
# D4 = update oper 1
# D5 = update oper 2
# D6 = old SFC/DFC
# D7 = old SR
# A0 = ADDR1
# A1 = ADDR2
# A2 = bus LOCK*  value
# A3 = bus LOCKE* value
# A4 = bus unlock value
# A5 = xxxxxxxx
#
	align 		0x10
CAS2W_START:
	movc		%a2,%buscr		# assert LOCK*
	movs.w		(%a1),%d1		# fetch Dest2[15:0]
	movs.w		(%a0),%d0		# fetch Dest1[15:0]
	bra.b 		CAS2W_CONT2
CAS2W_ENTER:
	bra.b		~+16

CAS2W_CONT2:
	cmp.w	 	%d0,%d2			# Dest1 - Compare1
	bne.b		CAS2W_NOUPDATE
	cmp.w	 	%d1,%d3			# Dest2 - Compare2
	bne.b		CAS2W_NOUPDATE
	movs.w		%d5,(%a1)		# Update2[15:0] -> DEST2
	bra.b 		CAS2W_UPDATE
	bra.b		~+16

CAS2W_UPDATE:
	movc		%a3,%buscr		# assert LOCKE*
	movs.w		%d4,(%a0)		# Update1[15:0] -> DEST1
	movc		%a4,%buscr		# unlock the bus
	bra.b		cas2w_update_done
	bra.b		~+16

CAS2W_NOUPDATE:
	movc		%a3,%buscr		# assert LOCKE*
	movs.w		%d0,(%a0)		# Dest1[15:0] -> DEST1
	movc		%a4,%buscr		# unlock the bus
	bra.b		cas2w_noupdate_done
	bra.b		~+16

CAS2W_FILLER:
	nop
	nop
	nop
	nop
	nop
	nop
	nop
	bra.b		CAS2W_START

####

#################################################################
# THIS MUST BE THE STATE OF THE INTEGER REGISTER FILE UPON	# 
# ENTERING _isp_cas2().						#
#								#
# D0 = destination[15:0] operand 1				#
# D1 = destination[15:0] operand 2				#
# D2 = cmp[15:0] operand 1					#
# D3 = cmp[15:0] operand 2					#
# D4 = 'xxxxxx11 -> no reg update; 'xxxxxx00 -> update required	#
# D5 = xxxxxxxx							#
# D6 = xxxxxxxx							#
# D7 = xxxxxxxx							#
# A0 = xxxxxxxx							#
# A1 = xxxxxxxx							#
# A2 = xxxxxxxx							#
# A3 = xxxxxxxx							#
# A4 = xxxxxxxx							#
# A5 = xxxxxxxx							#
# A6 = frame pointer						#
# A7 = stack pointer						#
#################################################################

cas2w_noupdate_done:

# restore previous SFC/DFC value.
	movc		%d6,%sfc		# restore old SFC
	movc		%d6,%dfc		# restore old DFC

# restore previous interrupt mask level.
	mov.w		%d7,%sr			# restore old SR

	sf		%d4			# indicate no update was done
	bra.l		_isp_cas2_finish

cas2w_update_done:

# restore previous SFC/DFC value.
	movc		%d6,%sfc		# restore old SFC
	movc		%d6,%dfc		# restore old DFC

# restore previous interrupt mask level.
	mov.w		%d7,%sr			# restore old SR

	st		%d4			# indicate update was done
	bra.l		_isp_cas2_finish
####

	align 		0x10
CAS2W2_START:
	movc		%a2,%buscr		# assert LOCK*
	movs.w		(%a1),%d1		# fetch Dest2[15:0]
	movs.w		(%a0),%d0		# fetch Dest1[15:0]
	bra.b 		CAS2W2_CONT2
CAS2W2_ENTER:
	bra.b		~+16

CAS2W2_CONT2:
	cmp.w	 	%d0,%d2			# Dest1 - Compare1
	bne.b		CAS2W2_NOUPDATE
	cmp.w	 	%d1,%d3			# Dest2 - Compare2
	bne.b		CAS2W2_NOUPDATE
	movs.w		%d5,(%a1)		# Update2[15:0] -> DEST2
	bra.b 		CAS2W2_UPDATE
	bra.b		~+16

CAS2W2_UPDATE:
	ror.l		&0x8,%d4		# get Update1[15:8]
	movs.b		%d4,(%a0)+		# Update1[15:8] -> DEST1
	movc		%a3,%buscr		# assert LOCKE*
	rol.l		&0x8,%d4		# get Update1[7:0]
	bra.b		CAS2W2_UPDATE2
	bra.b		~+16

CAS2W2_UPDATE2:
	movs.b		%d4,(%a0)		# Update1[7:0] -> DEST1+0x1
	movc		%a4,%buscr		# unlock the bus
	bra.w		cas2w_update_done
	nop
	bra.b		~+16

CAS2W2_NOUPDATE:
	ror.l		&0x8,%d0		# get Dest1[15:8]
	movs.b		%d0,(%a0)+		# Dest1[15:8] -> DEST1
	movc		%a3,%buscr		# assert LOCKE*
	rol.l		&0x8,%d0		# get Dest1[7:0]
	bra.b		CAS2W2_NOUPDATE2
	bra.b		~+16

CAS2W2_NOUPDATE2:
	movs.b		%d0,(%a0)		# Dest1[7:0] -> DEST1+0x1
	movc		%a4,%buscr		# unlock the bus
	bra.w		cas2w_noupdate_done
	nop
	bra.b		~+16

CAS2W2_FILLER:
	nop
	nop
	nop
	nop
	nop
	nop
	nop
	bra.b		CAS2W2_START

#       ######      ##      ######
#       #	   #  #     #     
#	#	  ######    ######
#	#	  #    #         #
#       ######    #    #    ######

#########################################################################
# XDEF ****************************************************************	#
# 	_isp_cas(): "core" emulation code for the cas instruction	#
#									#
# XREF ****************************************************************	#
#	_isp_cas_finish() - only exit point for this emulation code;	#
#			    do clean-up					#
#									#
# INPUT ***************************************************************	#
# 	*see entry chart below*						#
#									#
# OUTPUT **************************************************************	#
#	*see exit chart below*						#
#									#
# ALGORITHM ***********************************************************	#
# 	(1) Make several copies of the effective address. 		#
# 	(2) Save current SR; Then mask off all maskable interrupts.	#
#	(3) Save current DFC/SFC (ASSUMED TO BE EQUAL!!!); Then set	#
#	    SFC/DFC according to whether exception occurred in user or	#
#	    supervisor mode.						#
#	(4) Use "plpaw" instruction to pre-load ATC with efective	#
#	    address page(s). THIS SHOULD NOT FAULT!!! The relevant	#
# 	    page(s) should have been made resident prior to entering 	#
#	    this routine.						#
#	(5) Push the operand lines from the cache w/ "cpushl".		#
#	    In the 68040, this was done within the locked region. In	#
#	    the 68060, it is done outside of the locked region.		#
#	(6) Pre-fetch the core emulation instructions by executing one	#
#	    branch within each physical line (16 bytes) of the code	#
#	    before actually executing the code.				#
#	(7) Load the BUSCR with the bus lock value.			#
#	(8) Fetch the source operand.					#
#	(9) Do the compare. If equal, go to step (12).			#
#	(10)Unequal. No update occurs. But, we do write the DST op back	#
#	    to itself (as w/ the '040) so we can gracefully unlock	#
#	    the bus (and assert LOCKE*) using BUSCR and the final move.	#
#	(11)Exit.							#
#	(12)Write update operand to the DST location. Use BUSCR to	#
#	    assert LOCKE* for the final write operation.		#
#	(13)Exit.							#
# 									#
# 	The algorithm is actually implemented slightly differently	#
# depending on the size of the operation and the misalignment of the	#
# operand. A misaligned operand must be written in aligned chunks or	#
# else the BUSCR register control gets confused.			#
#									#
#########################################################################

#########################################################
# THIS IS THE STATE OF THE INTEGER REGISTER FILE UPON	#
# ENTERING _isp_cas().					#
#							#
# D0 = xxxxxxxx						#
# D1 = xxxxxxxx						#
# D2 = update operand					#
# D3 = xxxxxxxx						#
# D4 = compare operand					#
# D5 = xxxxxxxx						#
# D6 = supervisor ('xxxxxxff) or user mode ('xxxxxx00)	#
# D7 = longword ('xxxxxxff) or word size ('xxxxxx00)	#
# A0 = ADDR						#
# A1 = xxxxxxxx						#
# A2 = xxxxxxxx						#
# A3 = xxxxxxxx						#
# A4 = xxxxxxxx						#
# A5 = xxxxxxxx						#
# A6 = frame pointer					#
# A7 = stack pointer					#
#########################################################

	global		_isp_cas
_isp_cas:
	tst.b		%d6			# user or supervisor mode?
	bne.b		cas_super		# supervisor
cas_user:
	movq.l		&0x1,%d0		# load user data fc
	bra.b		cas_cont
cas_super:
	movq.l		&0x5,%d0		# load supervisor data fc

cas_cont:
	tst.b		%d7			# word or longword?
	bne.w		casl			# longword

####
casw:
	mov.l		%a0,%a1			# make copy for plpaw1
	mov.l		%a0,%a2			# make copy for plpaw2
	addq.l		&0x1,%a2		# plpaw2 points to end of word

	mov.l		%d2,%d3			# d3 = update[7:0]
	lsr.w		&0x8,%d2		# d2 = update[15:8]

# mask interrupt levels 0-6. save old mask value.
	mov.w		%sr,%d7			# save current SR
	ori.w		&0x0700,%sr		# inhibit interrupts

# load the SFC and DFC with the appropriate mode.
	movc		%sfc,%d6		# save old SFC/DFC
	movc		%d0,%sfc		# load new sfc
	movc		%d0,%dfc		# load new dfc

# pre-load the operand ATC. no page faults should occur here because
# _real_lock_page() should have taken care of this.
	plpaw		(%a1)			# load atc for ADDR
	plpaw		(%a2)			# load atc for ADDR+1

# push the operand lines from the cache if they exist.
	cpushl		%dc,(%a1)		# push dirty data
	cpushl		%dc,(%a2)		# push dirty data

# load the BUSCR values.
	mov.l		&0x80000000,%a1		# assert LOCK* buscr value
	mov.l		&0xa0000000,%a2		# assert LOCKE* buscr value
	mov.l		&0x00000000,%a3		# buscr unlock value

# pre-load the instruction cache for the following algorithm.
# this will minimize the number of cycles that LOCK* will be asserted.
	bra.b		CASW_ENTER		# start pre-loading icache

#
# D0 = dst operand <-
# D1 = update[15:8] operand
# D2 = update[7:0]  operand
# D3 = xxxxxxxx
# D4 = compare[15:0] operand
# D5 = xxxxxxxx
# D6 = old SFC/DFC
# D7 = old SR
# A0 = ADDR
# A1 = bus LOCK*  value
# A2 = bus LOCKE* value
# A3 = bus unlock value
# A4 = xxxxxxxx
# A5 = xxxxxxxx
#
	align		0x10
CASW_START:
	movc		%a1,%buscr		# assert LOCK*
	movs.w		(%a0),%d0		# fetch Dest[15:0]
	cmp.w	 	%d0,%d4			# Dest - Compare
	bne.b		CASW_NOUPDATE
	bra.b 		CASW_UPDATE
CASW_ENTER:
	bra.b		~+16

CASW_UPDATE:
	movs.b		%d2,(%a0)+		# Update[15:8] -> DEST
	movc		%a2,%buscr		# assert LOCKE*
	movs.b		%d3,(%a0)		# Update[7:0] -> DEST+0x1
	bra.b		CASW_UPDATE2
	bra.b		~+16

CASW_UPDATE2:
	movc		%a3,%buscr		# unlock the bus
	bra.b		casw_update_done
	nop
	nop
	nop
	nop
	bra.b		~+16

CASW_NOUPDATE:
	ror.l		&0x8,%d0		# get Dest[15:8]
	movs.b		%d0,(%a0)+		# Dest[15:8] -> DEST
	movc		%a2,%buscr		# assert LOCKE*
	rol.l		&0x8,%d0		# get Dest[7:0]
	bra.b 		CASW_NOUPDATE2
	bra.b		~+16

CASW_NOUPDATE2:
	movs.b		%d0,(%a0)		# Dest[7:0] -> DEST+0x1
	movc		%a3,%buscr		# unlock the bus
	bra.b		casw_noupdate_done
	nop
	nop
	bra.b		~+16

CASW_FILLER:
	nop
	nop
	nop
	nop
	nop
	nop
	nop
	bra.b		CASW_START

#################################################################
# THIS MUST BE THE STATE OF THE INTEGER REGISTER FILE UPON	#
# CALLING _isp_cas_finish().					#
#								#
# D0 = destination[15:0] operand				#
# D1 = 'xxxxxx11 -> no reg update; 'xxxxxx00 -> update required	#
# D2 = xxxxxxxx							#
# D3 = xxxxxxxx							#
# D4 = compare[15:0] operand					#
# D5 = xxxxxxxx							#
# D6 = xxxxxxxx							#
# D7 = xxxxxxxx							#
# A0 = xxxxxxxx							#
# A1 = xxxxxxxx							#
# A2 = xxxxxxxx							#
# A3 = xxxxxxxx							#
# A4 = xxxxxxxx							#
# A5 = xxxxxxxx							#
# A6 = frame pointer						#
# A7 = stack pointer						#
#################################################################

casw_noupdate_done:

# restore previous SFC/DFC value.
	movc		%d6,%sfc		# restore old SFC
	movc		%d6,%dfc		# restore old DFC

# restore previous interrupt mask level.
	mov.w		%d7,%sr			# restore old SR

	sf		%d1			# indicate no update was done
	bra.l		_isp_cas_finish

casw_update_done:

# restore previous SFC/DFC value.
	movc		%d6,%sfc		# restore old SFC
	movc		%d6,%dfc		# restore old DFC

# restore previous interrupt mask level.
	mov.w		%d7,%sr			# restore old SR

	st		%d1			# indicate update was done
	bra.l		_isp_cas_finish

################

# there are two possible mis-aligned cases for longword cas. they
# are separated because the final write which asserts LOCKE* must
# be an aligned write.
casl:
	mov.l		%a0,%a1			# make copy for plpaw1
	mov.l		%a0,%a2			# make copy for plpaw2
	addq.l		&0x3,%a2		# plpaw2 points to end of longword

	mov.l		%a0,%d1			# byte or word misaligned?
	btst		&0x0,%d1
	bne.w		casl2			# byte misaligned

	mov.l		%d2,%d3			# d3 = update[15:0]
	swap		%d2			# d2 = update[31:16]

# mask interrupts levels 0-6. save old mask value.
	mov.w		%sr,%d7			# save current SR
	ori.w		&0x0700,%sr		# inhibit interrupts

# load the SFC and DFC with the appropriate mode.
	movc		%sfc,%d6		# save old SFC/DFC
	movc		%d0,%sfc		# load new sfc
	movc		%d0,%dfc		# load new dfc

# pre-load the operand ATC. no page faults should occur here because
# _real_lock_page() should have taken care of this.
	plpaw		(%a1)			# load atc for ADDR
	plpaw		(%a2)			# load atc for ADDR+3

# push the operand lines from the cache if they exist.
	cpushl		%dc,(%a1)		# push dirty data
	cpushl		%dc,(%a2)		# push dirty data

# load the BUSCR values.
	mov.l		&0x80000000,%a1		# assert LOCK* buscr value
	mov.l		&0xa0000000,%a2		# assert LOCKE* buscr value
	mov.l		&0x00000000,%a3		# buscr unlock value

	bra.b		CASL_ENTER		# start pre-loading icache

#
# D0 = dst operand <-
# D1 = xxxxxxxx
# D2 = update[31:16] operand
# D3 = update[15:0]  operand
# D4 = compare[31:0] operand
# D5 = xxxxxxxx
# D6 = old SFC/DFC
# D7 = old SR
# A0 = ADDR
# A1 = bus LOCK*  value
# A2 = bus LOCKE* value
# A3 = bus unlock value
# A4 = xxxxxxxx
# A5 = xxxxxxxx
#
	align		0x10
CASL_START:
	movc		%a1,%buscr		# assert LOCK*
	movs.l		(%a0),%d0		# fetch Dest[31:0]
	cmp.l	 	%d0,%d4			# Dest - Compare
	bne.b		CASL_NOUPDATE
	bra.b 		CASL_UPDATE
CASL_ENTER:
	bra.b		~+16

CASL_UPDATE:
	movs.w		%d2,(%a0)+		# Update[31:16] -> DEST
	movc		%a2,%buscr		# assert LOCKE*
	movs.w		%d3,(%a0)		# Update[15:0] -> DEST+0x2
	bra.b		CASL_UPDATE2
	bra.b		~+16

CASL_UPDATE2:
	movc		%a3,%buscr		# unlock the bus
	bra.b		casl_update_done
	nop
	nop
	nop
	nop
	bra.b		~+16

CASL_NOUPDATE:
	swap		%d0			# get Dest[31:16]
	movs.w		%d0,(%a0)+		# Dest[31:16] -> DEST
	swap		%d0			# get Dest[15:0]
	movc		%a2,%buscr		# assert LOCKE*
	bra.b 		CASL_NOUPDATE2
	bra.b		~+16

CASL_NOUPDATE2:
	movs.w		%d0,(%a0)		# Dest[15:0] -> DEST+0x2
	movc		%a3,%buscr		# unlock the bus
	bra.b		casl_noupdate_done
	nop
	nop
	bra.b		~+16

CASL_FILLER:
	nop
	nop
	nop
	nop
	nop
	nop
	nop
	bra.b		CASL_START

#################################################################
# THIS MUST BE THE STATE OF THE INTEGER REGISTER FILE UPON	#
# CALLING _isp_cas_finish().					#
#								#
# D0 = destination[31:0] operand				#
# D1 = 'xxxxxx11 -> no reg update; 'xxxxxx00 -> update required	#
# D2 = xxxxxxxx							#
# D3 = xxxxxxxx							#
# D4 = compare[31:0] operand					#
# D5 = xxxxxxxx							#
# D6 = xxxxxxxx							#
# D7 = xxxxxxxx							#
# A0 = xxxxxxxx							#
# A1 = xxxxxxxx							#
# A2 = xxxxxxxx							#
# A3 = xxxxxxxx							#
# A4 = xxxxxxxx							#
# A5 = xxxxxxxx							#
# A6 = frame pointer						#
# A7 = stack pointer						#
#################################################################

casl_noupdate_done:

# restore previous SFC/DFC value.
	movc		%d6,%sfc		# restore old SFC
	movc		%d6,%dfc		# restore old DFC

# restore previous interrupt mask level.
	mov.w		%d7,%sr			# restore old SR

	sf		%d1			# indicate no update was done
	bra.l		_isp_cas_finish

casl_update_done:

# restore previous SFC/DFC value.
	movc		%d6,%sfc		# restore old SFC
	movc		%d6,%dfc		# restore old DFC

# restore previous interrupts mask level.
	mov.w		%d7,%sr			# restore old SR

	st		%d1			# indicate update was done
	bra.l		_isp_cas_finish

#######################################
casl2:
	mov.l		%d2,%d5			# d5 = Update[7:0]
	lsr.l		&0x8,%d2
	mov.l		%d2,%d3			# d3 = Update[23:8]
	swap		%d2			# d2 = Update[31:24]

# mask interrupts levels 0-6. save old mask value.
	mov.w		%sr,%d7			# save current SR
	ori.w		&0x0700,%sr		# inhibit interrupts

# load the SFC and DFC with the appropriate mode.
	movc		%sfc,%d6		# save old SFC/DFC
	movc		%d0,%sfc		# load new sfc
	movc		%d0,%dfc		# load new dfc

# pre-load the operand ATC. no page faults should occur here because
# _real_lock_page() should have taken care of this already.
	plpaw		(%a1)			# load atc for ADDR
	plpaw		(%a2)			# load atc for ADDR+3

# puch the operand lines from the cache if they exist.
	cpushl		%dc,(%a1)		# push dirty data
	cpushl		%dc,(%a2)		# push dirty data

# load the BUSCR values.
	mov.l		&0x80000000,%a1		# assert LOCK* buscr value
	mov.l		&0xa0000000,%a2		# assert LOCKE* buscr value
	mov.l		&0x00000000,%a3		# buscr unlock value

# pre-load the instruction cache for the following algorithm. 
# this will minimize the number of cycles that LOCK* will be asserted.
	bra.b		CASL2_ENTER		# start pre-loading icache

#
# D0 = dst operand <-
# D1 = xxxxxxxx
# D2 = update[31:24] operand
# D3 = update[23:8]  operand
# D4 = compare[31:0] operand
# D5 = update[7:0]  operand
# D6 = old SFC/DFC
# D7 = old SR
# A0 = ADDR
# A1 = bus LOCK*  value
# A2 = bus LOCKE* value
# A3 = bus unlock value
# A4 = xxxxxxxx
# A5 = xxxxxxxx
#
	align		0x10
CASL2_START:
	movc		%a1,%buscr		# assert LOCK*
	movs.l		(%a0),%d0		# fetch Dest[31:0]
	cmp.l	 	%d0,%d4			# Dest - Compare
	bne.b		CASL2_NOUPDATE
	bra.b 		CASL2_UPDATE
CASL2_ENTER:
	bra.b		~+16

CASL2_UPDATE:
	movs.b		%d2,(%a0)+		# Update[31:24] -> DEST
	movs.w		%d3,(%a0)+		# Update[23:8] -> DEST+0x1
	movc		%a2,%buscr		# assert LOCKE*
	bra.b		CASL2_UPDATE2
	bra.b		~+16

CASL2_UPDATE2:
	movs.b		%d5,(%a0)		# Update[7:0] -> DEST+0x3
	movc		%a3,%buscr		# unlock the bus
	bra.w		casl_update_done
	nop
	bra.b		~+16

CASL2_NOUPDATE:
	rol.l		&0x8,%d0		# get Dest[31:24]
	movs.b		%d0,(%a0)+		# Dest[31:24] -> DEST
	swap		%d0			# get Dest[23:8]
	movs.w		%d0,(%a0)+		# Dest[23:8] -> DEST+0x1
	bra.b 		CASL2_NOUPDATE2
	bra.b		~+16

CASL2_NOUPDATE2:
	rol.l		&0x8,%d0		# get Dest[7:0]
	movc		%a2,%buscr		# assert LOCKE*
	movs.b		%d0,(%a0)		# Dest[7:0] -> DEST+0x3
	bra.b 		CASL2_NOUPDATE3
	nop
	bra.b		~+16

CASL2_NOUPDATE3:
	movc		%a3,%buscr		# unlock the bus
	bra.w		casl_noupdate_done
	nop
	nop
	nop
	bra.b		~+16

CASL2_FILLER:
	nop
	nop
	nop
	nop
	nop
	nop
	nop
	bra.b		CASL2_START

####
####
# end label used by _isp_cas_inrange()
	global		_CASHI
_CASHI:
~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
MOTOROLA MICROPROCESSOR & MEMORY TECHNOLOGY GROUP
M68000 Hi-Performance Microprocessor Division
M68060 Software Package
Production Release P1.00 -- October 10, 1994

M68060 Software Package Copyright � 1993, 1994 Motorola Inc.  All rights reserved.
 
THE SOFTWARE is provided on an "AS IS" basis and without warranty.
To the maximum extent permitted by applicable law,
MOTOROLA DISCLAIMS ALL WARRANTIES WHETHER EXPRESS OR IMPLIED, 
INCLUDING IMPLIED WARRANTIES OF MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE
and any warranty against infringement with regard to the SOFTWARE
(INCLUDING ANY MODIFIED VERSIONS THEREOF) and any accompanying written materials.

To the maximum extent permitted by applicable law,
IN NO EVENT SHALL MOTOROLA BE LIABLE FOR ANY DAMAGES WHATSOEVER
(INCLUDING WITHOUT LIMITATION, DAMAGES FOR LOSS OF BUSINESS PROFITS,
BUSINESS INTERRUPTION, LOSS OF BUSINESS INFORMATION, OR OTHER PECUNIARY LOSS)
ARISING OF THE USE OR INABILITY TO USE THE SOFTWARE.
Motorola assumes no responsibility for the maintenance and support of the SOFTWARE.

You are hereby granted a copyright license to use, modify, and distribute the SOFTWARE
so long as this entire notice is retained without alteration in any modified and/or
redistributed versions, and that such modified versions are clearly identified as such.
No licenses are granted by implication, estoppel or otherwise under any patents
or trademarks of Motorola, Inc.
~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
#############################################
set	SREGS,		-64
set	IREGS,		-128
set	SCCR,		-130
set	ICCR,		-132
set	TESTCTR,	-136
set	EAMEM,		-140
set	EASTORE,	-144
set	DATA,		-160

#############################################
TESTTOP:
	bra.l		_060TESTS_

start_str:
	string		"Testing 68060 ISP started:\n"

pass_str:
	string		"passed\n"
fail_str:
	string		" failed\n"

	align		0x4
chk_test:
	tst.l		%d0
	bne.b		test_fail
test_pass:
	pea		pass_str(%pc)
	bsr.l		_print_str
	addq.l		&0x4,%sp
	rts
test_fail:
	mov.l		%d1,-(%sp)
	bsr.l		_print_num
	addq.l		&0x4,%sp

	pea		fail_str(%pc)
	bsr.l		_print_str
	addq.l		&0x4,%sp
	rts

#############################################
_060TESTS_:
	link		%a6,&-160

	movm.l		&0x3f3c,-(%sp)

	pea		start_str(%pc)
	bsr.l		_print_str
	addq.l		&0x4,%sp

### mul
	clr.l		TESTCTR(%a6)
	pea		mulul_str(%pc)
	bsr.l		_print_str
	addq.l		&0x4,%sp

	bsr.l		mulul_0

	bsr.l		chk_test

### div
	clr.l		TESTCTR(%a6)
	pea		divul_str(%pc)
	bsr.l		_print_str
	addq.l		&0x4,%sp

	bsr.l		divul_0

	bsr.l		chk_test

### cmp2
	clr.l		TESTCTR(%a6)
	pea		cmp2_str(%pc)
	bsr.l		_print_str
	addq.l		&0x4,%sp

	bsr.l		cmp2_1

	bsr.l		chk_test

### movp
	clr.l		TESTCTR(%a6)
	pea		movp_str(%pc)
	bsr.l		_print_str
	addq.l		&0x4,%sp

	bsr.l		movp_0

	bsr.l		chk_test

### ea
	clr.l		TESTCTR(%a6)
	pea		ea_str(%pc)
	bsr.l		_print_str
	addq.l		&0x4,%sp

	mov.l		&0x2,EAMEM(%a6)
	bsr.l		ea_0

	bsr.l		chk_test

### cas
	clr.l		TESTCTR(%a6)
	pea		cas_str(%pc)
	bsr.l		_print_str
	addq.l		&0x4,%sp

	bsr.l		cas0

	bsr.l		chk_test

### cas2
	clr.l		TESTCTR(%a6)
	pea		cas2_str(%pc)
	bsr.l		_print_str
	addq.l		&0x4,%sp

	bsr.l		cas20

	bsr.l		chk_test

###
	movm.l		(%sp)+,&0x3cfc

	unlk		%a6
	rts

#############################################
#############################################

mulul_str:
	string		"\t64-bit multiply..."

	align		0x4
mulul_0:
	addq.l		&0x1,TESTCTR(%a6)

	movm.l		DEF_REGS(%pc),&0x3fff

	clr.l		%d1
	mov.l		&0x99999999,%d2
	mov.l		&0x88888888,%d3

	mov.w		&0x0004,ICCR(%a6)
	mov.w		&0x0000,%cc
	movm.l		&0x7fff,IREGS(%a6)

	mulu.l		%d1,%d2:%d3

	mov.w		%cc,SCCR(%a6)
	movm.l		&0x7fff,SREGS(%a6)
	clr.l		IREGS+0x8(%a6)
	clr.l		IREGS+0xc(%a6)

	bsr.l		chkregs
	tst.b		%d0
	bne.l		error

mulul_1:
	addq.l		&0x1,TESTCTR(%a6)

	movm.l		DEF_REGS(%pc),&0x3fff

	mov.l		&0x77777777,%d1
	mov.l		&0x99999999,%d2
	mov.l		&0x00000000,%d3

	mov.w		&0x0004,ICCR(%a6)
	mov.w		&0x0000,%cc
	movm.l		&0x7fff,IREGS(%a6)

	mulu.l		%d1,%d2:%d3

	mov.w		%cc,SCCR(%a6)
	movm.l		&0x7fff,SREGS(%a6)
	clr.l		IREGS+0x8(%a6)
	clr.l		IREGS+0xc(%a6)

	bsr.l		chkregs
	tst.b		%d0
	bne.l		error

mulul_2:
	addq.l		&0x1,TESTCTR(%a6)

	movm.l		DEF_REGS(%pc),&0x3fff

	mov.l		&0x00000010,%d1
	mov.l		&0x66666666,%d2

	mov.w		&0x0000,ICCR(%a6)
	mov.w		&0x0000,%cc
	movm.l		&0x7fff,IREGS(%a6)

	mulu.l		%d1,%d2:%d2

	mov.w		%cc,SCCR(%a6)
	movm.l		&0x7fff,SREGS(%a6)
	mov.l		&0x00000006,IREGS+0x8(%a6)

	bsr.l		chkregs
	tst.b		%d0
	bne.l		error

mulul_3:
	addq.l		&0x1,TESTCTR(%a6)

	movm.l		DEF_REGS(%pc),&0x3fff

	mov.l		&0x55555555,%d1
	mov.l		&0x00000000,%d2
	mov.l		&0x00000003,%d3

	mov.w		&0x0000,ICCR(%a6)
	mov.w		&0x0000,%cc
	movm.l		&0x7fff,IREGS(%a6)

	mulu.l		%d1,%d2:%d3

	mov.w		%cc,SCCR(%a6)
	movm.l		&0x7fff,SREGS(%a6)
	mov.l		&0x00000000,IREGS+0x8(%a6)
	mov.l		&0xffffffff,IREGS+0xc(%a6)

	bsr.l		chkregs
	tst.b		%d0
	bne.l		error

mulul_4:
	addq.l		&0x1,TESTCTR(%a6)

	movm.l		DEF_REGS(%pc),&0x3fff

	mov.l		&0x40000000,%d1
	mov.l		&0x00000000,%d2
	mov.l		&0x00000004,%d3

	mov.w		&0x0000,ICCR(%a6)
	mov.w		&0x0000,%cc
	movm.l		&0x7fff,IREGS(%a6)

	mulu.l		%d1,%d2:%d3

	mov.w		%cc,SCCR(%a6)
	movm.l		&0x7fff,SREGS(%a6)
	mov.l		&0x00000001,IREGS+0x8(%a6)
	mov.l		&0x00000000,IREGS+0xc(%a6)

	bsr.l		chkregs
	tst.b		%d0
	bne.l		error

mulul_5:
	addq.l		&0x1,TESTCTR(%a6)

	movm.l		DEF_REGS(%pc),&0x3fff

	mov.l		&0xffffffff,%d1
	mov.l		&0x00000000,%d2
	mov.l		&0xffffffff,%d3

	mov.w		&0x0008,ICCR(%a6)
	mov.w		&0x0000,%cc
	movm.l		&0x7fff,IREGS(%a6)

	mulu.l		%d1,%d2:%d3

	mov.w		%cc,SCCR(%a6)
	movm.l		&0x7fff,SREGS(%a6)
	mov.l		&0xfffffffe,IREGS+0x8(%a6)
	mov.l		&0x00000001,IREGS+0xc(%a6)

	bsr.l		chkregs
	tst.b		%d0
	bne.l		error

mulul_6:
	addq.l		&0x1,TESTCTR(%a6)

	movm.l		DEF_REGS(%pc),&0x3fff

	mov.l		&0x80000000,%d1
	mov.l		&0x00000000,%d2
	mov.l		&0xffffffff,%d3

	mov.w		&0x00000,ICCR(%a6)
	mov.w		&0x0000,%cc
	movm.l		&0x7fff,IREGS(%a6)

	muls.l		%d1,%d2:%d3

	mov.w		%cc,SCCR(%a6)
	movm.l		&0x7fff,SREGS(%a6)
	mov.l		&0x00000000,IREGS+0x8(%a6)
	mov.l		&0x80000000,IREGS+0xc(%a6)

	bsr.l		chkregs
	tst.b		%d0
	bne.l		error

mulul_7:
	addq.l		&0x1,TESTCTR(%a6)

	movm.l		DEF_REGS(%pc),&0x3fff

	mov.l		&0x80000000,%d1
	mov.l		&0x00000000,%d2
	mov.l		&0x00000001,%d3

	mov.w		&0x0008,ICCR(%a6)
	mov.w		&0x0000,%cc
	movm.l		&0x7fff,IREGS(%a6)

	muls.l		%d1,%d2:%d3

	mov.w		%cc,SCCR(%a6)
	movm.l		&0x7fff,SREGS(%a6)
	mov.l		&0xffffffff,IREGS+0x8(%a6)
	mov.l		&0x80000000,IREGS+0xc(%a6)

	bsr.l		chkregs
	tst.b		%d0
	bne.l		error

mulul_8:
	addq.l		&0x1,TESTCTR(%a6)

	movm.l		DEF_REGS(%pc),&0x3fff

	mov.l		&0x00000001,%d1
	mov.l		&0x00000000,%d2
	mov.l		&0x80000000,%d3

	mov.w		&0x0008,ICCR(%a6)
	mov.w		&0x0000,%cc
	movm.l		&0x7fff,IREGS(%a6)

	muls.l		%d1,%d2:%d3

	mov.w		%cc,SCCR(%a6)
	movm.l		&0x7fff,SREGS(%a6)
	mov.l		&0xffffffff,IREGS+0x8(%a6)
	mov.l		&0x80000000,IREGS+0xc(%a6)

	bsr.l		chkregs
	tst.b		%d0
	bne.l		error

	mov.l		TESTCTR(%a6),%d1
	clr.l		%d0
	rts

#############################################

movp_str:
	string	"\tmovep..."

	align	0x4
###############################
# movep.w	%d0,(0x0,%a0) #
###############################
movp_0:
	addq.l	&0x1,TESTCTR(%a6)

	movm.l	DEF_REGS(%pc),&0x3fff

	lea	DATA(%a6),%a0
	mov.w	&0xaaaa,%d0
	clr.b	0x0(%a0)
	clr.b	0x2(%a0)

	mov.w	&0x001f,ICCR(%a6)
	mov.w	&0x001f,%cc
	movm.l	&0x7fff,IREGS(%a6)

	movp.w	%d0,(0x0,%a0)

	mov.w	%cc,SCCR(%a6)
	movm.l	&0x7fff,SREGS(%a6)

	mov.b	0x2(%a0),%d1
	lsl.w	&0x8,%d1
	mov.b	0x0(%a0),%d1

	cmp.w	%d0,%d1
	bne.l	error

	bsr.l	chkregs
	tst.b	%d0
	bne.l	error

###############################
# movep.w	%d0,(0x0,%a0) #
###############################
movp_1:
	addq.l	&0x1,TESTCTR(%a6)

	movm.l	DEF_REGS(%pc),&0x3fff

	lea	DATA+0x4(%a6),%a0
	mov.w	&0xaaaa,%d0
	clr.l	-0x4(%a0)
	clr.l	(%a0)
	clr.l	0x4(%a0)

	mov.w	&0x001f,ICCR(%a6)
	mov.w	&0x001f,%cc
	movm.l	&0x7fff,IREGS(%a6)

	movp.w	%d0,(0x0,%a0)

	mov.w	%cc,SCCR(%a6)
	movm.l	&0x7fff,SREGS(%a6)

	tst.l	-0x4(%a0)
	bne.l	error
	tst.l	0x4(%a0)
	bne.l	error
	cmpi.l	(%a0),&0xaa00aa00
	bne.l	error

	bsr.l	chkregs
	tst.b	%d0
	bne.l	error

#####################################################
# movep.w	%d0,(0x0,%a0) 			    #
# 	- this test has %cc initially equal to zero #
#####################################################
movp_2:
	addq.l	&0x1,TESTCTR(%a6)

	movm.l	DEF_REGS(%pc),&0x3fff

	lea	DATA(%a6),%a0
	mov.w	&0xaaaa,%d0
	clr.b	0x0(%a0)
	clr.b	0x2(%a0)

	mov.w	&0x0000,ICCR(%a6)
	mov.w	&0x0000,%cc
	movm.l	&0x7fff,IREGS(%a6)

	movp.w	%d0,(0x0,%a0)

	mov.w	%cc,SCCR(%a6)
	movm.l	&0x7fff,SREGS(%a6)

	mov.b	0x2(%a0),%d1
	lsl.w	&0x8,%d1
	mov.b	0x0(%a0),%d1

	cmp.w	%d0,%d1
	bne.l	error

	bsr.l	chkregs
	tst.b	%d0
	bne.l	error

###############################
# movep.w	(0x0,%a0),%d0 #
###############################
movp_3:
	addq.l	&0x1,TESTCTR(%a6)

	movm.l	DEF_REGS(%pc),&0x3fff

	lea	DATA(%a6),%a0
	mov.b	&0xaa,0x0(%a0)
	mov.b	&0xaa,0x2(%a0)

	mov.w	&0x001f,ICCR(%a6)
	mov.w	&0x001f,%cc
	movm.l	&0x7fff,IREGS(%a6)

	movp.w	(0x0,%a0),%d0

	mov.w	%cc,SCCR(%a6)
	movm.l	&0x7fff,SREGS(%a6)
	mov.w	&0xaaaa,IREGS+0x2(%a6)

	mov.w	&0xaaaa,%d1

	cmp.w	%d0,%d1
	bne.l	error

	bsr.l	chkregs
	tst.b	%d0
	bne.l	error

###############################
# movep.l	%d0,(0x0,%a0) #
###############################
movp_4:
	addq.l	&0x1,TESTCTR(%a6)

	movm.l	DEF_REGS(%pc),&0x3fff

	lea	DATA(%a6),%a0
	mov.l	&0xaaaaaaaa,%d0
	clr.b	0x0(%a0)
	clr.b	0x2(%a0)
	clr.b	0x4(%a0)
	clr.b	0x6(%a0)

	mov.w	&0x001f,ICCR(%a6)
	mov.w	&0x001f,%cc
	movm.l	&0x7fff,IREGS(%a6)

	movp.l	%d0,(0x0,%a0)

	mov.w	%cc,SCCR(%a6)
	movm.l	&0x7fff,SREGS(%a6)

	mov.b	0x6(%a0),%d1
	lsl.l	&0x8,%d1
	mov.b	0x4(%a0),%d1
	lsl.l	&0x8,%d1
	mov.b	0x2(%a0),%d1
	lsl.l	&0x8,%d1
	mov.b	0x0(%a0),%d1

	cmp.l	%d0,%d1
	bne.l	error

	bsr.l	chkregs
	tst.b	%d0
	bne.l	error

###############################
# movep.l	%d0,(0x0,%a0) #
###############################
movp_5:
	addq.l	&0x1,TESTCTR(%a6)

	movm.l	DEF_REGS(%pc),&0x3fff

	lea	DATA+0x4(%a6),%a0
	mov.l	&0xaaaaaaaa,%d0
	clr.l	-0x4(%a0)
	clr.l	(%a0)
	clr.l	0x4(%a0)
	clr.l	0x8(%a0)

	mov.w	&0x001f,ICCR(%a6)
	mov.w	&0x001f,%cc
	movm.l	&0x7fff,IREGS(%a6)

	movp.l	%d0,(0x0,%a0)

	mov.w	%cc,SCCR(%a6)
	movm.l	&0x7fff,SREGS(%a6)

	tst.l	-0x4(%a0)
	bne.l	error
	tst.l	0x8(%a0)
	bne.l	error
	cmpi.l	(%a0),&0xaa00aa00
	bne.l	error
	cmpi.l	0x4(%a0),&0xaa00aa00
	bne.l	error

	bsr.l	chkregs
	tst.b	%d0
	bne.l	error

###############################
# movep.l	(0x0,%a0),%d0 #
###############################
movp_6:
	addq.l	&0x1,TESTCTR(%a6)

	movm.l	DEF_REGS(%pc),&0x3fff

	lea	DATA(%a6),%a0
	mov.b	&0xaa,0x0(%a0)
	mov.b	&0xaa,0x2(%a0)
	mov.b	&0xaa,0x4(%a0)
	mov.b	&0xaa,0x6(%a0)

	mov.w	&0x001f,ICCR(%a6)
	mov.w	&0x001f,%cc
	movm.l	&0x7fff,IREGS(%a6)

	movp.l	(0x0,%a0),%d0

	mov.w	%cc,SCCR(%a6)
	movm.l	&0x7fff,SREGS(%a6)
	mov.l	&0xaaaaaaaa,IREGS(%a6)

	mov.l	&0xaaaaaaaa,%d1

	cmp.l	%d0,%d1
	bne.l	error

	bsr.l	chkregs
	tst.b	%d0
	bne.l	error

###############################
# movep.w	%d7,(0x0,%a0) #
###############################
movp_7:
	addq.l	&0x1,TESTCTR(%a6)

	movm.l	DEF_REGS(%pc),&0x3fff

	lea	DATA(%a6),%a0
	mov.w	&0xaaaa,%d7
	clr.b	0x0(%a0)
	clr.b	0x2(%a0)

	mov.w	&0x001f,ICCR(%a6)
	mov.w	&0x001f,%cc
	movm.l	&0x7fff,IREGS(%a6)

	movp.w	%d7,(0x0,%a0)

	mov.w	%cc,SCCR(%a6)
	movm.l	&0x7fff,SREGS(%a6)

	mov.b	0x2(%a0),%d1
	lsl.w	&0x8,%d1
	mov.b	0x0(%a0),%d1

	cmp.w	%d7,%d1
	bne.l	error

	bsr.l	chkregs
	tst.b	%d0
	bne.l	error

###############################
# movep.w	(0x0,%a0),%d7 #
###############################
movp_8:
	addq.l	&0x1,TESTCTR(%a6)

	movm.l	DEF_REGS(%pc),&0x3fff

	lea	DATA(%a6),%a0
	mov.b	&0xaa,0x0(%a0)
	mov.b	&0xaa,0x2(%a0)

	mov.w	&0x001f,ICCR(%a6)
	mov.w	&0x001f,%cc
	movm.l	&0x7fff,IREGS(%a6)

	movp.w	(0x0,%a0),%d7

	mov.w	%cc,SCCR(%a6)
	movm.l	&0x7fff,SREGS(%a6)
	mov.w	&0xaaaa,IREGS+30(%a6)

	mov.w	&0xaaaa,%d1

	cmp.w	%d7,%d1
	bne.l	error

	bsr.l	chkregs
	tst.b	%d0
	bne.l	error

###############################
# movep.w	%d0,(0x0,%a0) #
###############################
movp_9:
	addq.l	&0x1,TESTCTR(%a6)

	movm.l	DEF_REGS(%pc),&0x3fff

	lea	DATA(%a6),%a0
	mov.w	&0xaaaa,%d0
	clr.b	0x0(%a0)
	clr.b	0x2(%a0)

	mov.w	&0x001f,ICCR(%a6)
	mov.w	&0x001f,%cc
	movm.l	&0x7fff,IREGS(%a6)

	movp.w	%d0,(0x0,%a0)

	mov.w	%cc,SCCR(%a6)
	movm.l	&0x7fff,SREGS(%a6)

	mov.b	0x2(%a0),%d1
	lsl.w	&0x8,%d1
	mov.b	0x0(%a0),%d1

	cmp.w	%d0,%d1
	bne.l	error

	bsr.l	chkregs
	tst.b	%d0
	bne.l	error

###############################
# movep.w	%d0,(0x8,%a0) #
###############################
movp_10:
	addq.l	&0x1,TESTCTR(%a6)

	movm.l	DEF_REGS(%pc),&0x3fff

	lea	DATA(%a6),%a0
	mov.w	&0xaaaa,%d0
	clr.b	0x0+0x8(%a0)
	clr.b	0x2+0x8(%a0)

	mov.w	&0x001f,ICCR(%a6)
	mov.w	&0x1f,%cc
	movm.l	&0x7fff,IREGS(%a6)

	movp.w	%d0,(0x8,%a0)

	mov.w	%cc,SCCR(%a6)
	movm.l	&0x7fff,SREGS(%a6)

	mov.b	0x2+0x8(%a0),%d1
	lsl.w	&0x8,%d1
	mov.b	0x0+0x8(%a0),%d1

	cmp.w	%d0,%d1
	bne.l	error

	bsr.l	chkregs
	tst.b	%d0
	bne.l	error

###############################
# movep.w	(0x8,%a0),%d0 #
###############################
movp_11:
	addq.l	&0x1,TESTCTR(%a6)

	movm.l	DEF_REGS(%pc),&0x3fff

	lea	DATA(%a6),%a0
	mov.b	&0xaa,0x0+0x8(%a0)
	mov.b	&0xaa,0x2+0x8(%a0)

	mov.w	&0x001f,ICCR(%a6)
	mov.w	&0x1f,%cc
	movm.l	&0x7fff,IREGS(%a6)

	movp.w	(0x8,%a0),%d0

	mov.w	%cc,SCCR(%a6)
	movm.l	&0x7fff,SREGS(%a6)
	mov.w	&0xaaaa,IREGS+0x2(%a6)

	mov.w	&0xaaaa,%d1

	cmp.w	%d0,%d1
	bne.l	error

	bsr.l	chkregs
	tst.b	%d0
	bne.l	error

###############################
# movep.l	%d0,(0x8,%a0) #
###############################
movp_12:
	addq.l	&0x1,TESTCTR(%a6)

	movm.l	DEF_REGS(%pc),&0x3fff

	lea	DATA(%a6),%a0
	mov.l	&0xaaaaaaaa,%d0
	clr.b	0x0+0x8(%a0)
	clr.b	0x2+0x8(%a0)
	clr.b	0x4+0x8(%a0)
	clr.b	0x6+0x8(%a0)

	mov.w	&0x001f,ICCR(%a6)
	mov.w	&0x1f,%cc
	movm.l	&0x7fff,IREGS(%a6)

	movp.l	%d0,(0x8,%a0)

	mov.w	%cc,SCCR(%a6)
	movm.l	&0x7fff,SREGS(%a6)

	mov.b	0x6+0x8(%a0),%d1
	lsl.l	&0x8,%d1
	mov.b	0x4+0x8(%a0),%d1
	lsl.l	&0x8,%d1
	mov.b	0x2+0x8(%a0),%d1
	lsl.l	&0x8,%d1
	mov.b	0x0+0x8(%a0),%d1

	cmp.l	%d0,%d1
	bne.l	error

	bsr.l	chkregs
	tst.b	%d0
	bne.l	error

###############################
# movep.l	(0x8,%a0),%d0 #
###############################
movp_13:
	addq.l	&0x1,TESTCTR(%a6)

	movm.l	DEF_REGS(%pc),&0x3fff

	lea	DATA(%a6),%a0
	mov.b	&0xaa,0x0+0x8(%a0)
	mov.b	&0xaa,0x2+0x8(%a0)
	mov.b	&0xaa,0x4+0x8(%a0)
	mov.b	&0xaa,0x6+0x8(%a0)

	mov.w	&0x001f,ICCR(%a6)
	mov.w	&0x1f,%cc
	movm.l	&0x7fff,IREGS(%a6)

	movp.l	(0x8,%a0),%d0

	mov.w	%cc,SCCR(%a6)
	movm.l	&0x7fff,SREGS(%a6)
	mov.l	&0xaaaaaaaa,IREGS(%a6)

	mov.l	&0xaaaaaaaa,%d1

	cmp.l	%d0,%d1
	bne.l	error

	bsr.l	chkregs
	tst.b	%d0
	bne.l	error

################################
# movep.w	%d0,(-0x8,%a0) #
################################
movp_14:
	addq.l	&0x1,TESTCTR(%a6)

	movm.l	DEF_REGS(%pc),&0x3fff

	lea	DATA+0x8(%a6),%a0
	mov.w	&0xaaaa,%d0
	clr.b	0x0-0x8(%a0)
	clr.b	0x2-0x8(%a0)

	mov.w	&0x001f,ICCR(%a6)
	mov.w	&0x1f,%cc
	movm.l	&0x7fff,IREGS(%a6)

	movp.w	%d0,(-0x8,%a0)

	mov.w	%cc,SCCR(%a6)
	movm.l	&0x7fff,SREGS(%a6)

	mov.b	0x2-0x8(%a0),%d1
	lsl.w	&0x8,%d1
	mov.b	0x0-0x8(%a0),%d1

	cmp.w	%d0,%d1
	bne.l	error

	bsr.l	chkregs
	tst.b	%d0
	bne.l	error

################################
# movep.w	(-0x8,%a0),%d0 #
################################
movp_15:
	addq.l	&0x1,TESTCTR(%a6)

	movm.l	DEF_REGS(%pc),&0x3fff

	lea	DATA+0x8(%a6),%a0
	mov.b	&0xaa,0x0-0x8(%a0)
	mov.b	&0xaa,0x2-0x8(%a0)

	mov.w	&0x001f,ICCR(%a6)
	mov.w	&0x1f,%cc
	movm.l	&0x7fff,IREGS(%a6)

	movp.w	(-0x8,%a0),%d0

	mov.w	%cc,SCCR(%a6)
	movm.l	&0x7fff,SREGS(%a6)
	mov.w	&0xaaaa,IREGS+0x2(%a6)

	mov.w	&0xaaaa,%d1

	cmp.w	%d0,%d1
	bne.l	error

	bsr.l	chkregs
	tst.b	%d0
	bne.l	error

################################
# movep.l	%d0,(-0x8,%a0) #
################################
movp_16:
	addq.l	&0x1,TESTCTR(%a6)

	movm.l	DEF_REGS(%pc),&0x3fff

	lea	DATA+0x8(%a6),%a0
	mov.l	&0xaaaaaaaa,%d0
	clr.b	0x0-0x8(%a0)
	clr.b	0x2-0x8(%a0)
	clr.b	0x4-0x8(%a0)
	clr.b	0x8-0x8(%a0)

	mov.w	&0x001f,ICCR(%a6)
	mov.w	&0x1f,%cc
	movm.l	&0x7fff,IREGS(%a6)

	movp.l	%d0,(-0x8,%a0)

	mov.w	%cc,SCCR(%a6)
	movm.l	&0x7fff,SREGS(%a6)

	mov.b	0x6-0x8(%a0),%d1
	lsl.l	&0x8,%d1
	mov.b	0x4-0x8(%a0),%d1
	lsl.l	&0x8,%d1
	mov.b	0x2-0x8(%a0),%d1
	lsl.l	&0x8,%d1
	mov.b	0x0-0x8(%a0),%d1

	cmp.l	%d0,%d1
	bne.l	error

	bsr.l	chkregs
	tst.b	%d0
	bne.l	error

################################
# movep.l	(-0x8,%a0),%d0 #
################################
movp_17:
	addq.l	&0x1,TESTCTR(%a6)

	movm.l	DEF_REGS(%pc),&0x3fff

	lea	DATA+0x8(%a6),%a0
	mov.b	&0xaa,0x0-0x8(%a0)
	mov.b	&0xaa,0x2-0x8(%a0)
	mov.b	&0xaa,0x4-0x8(%a0)
	mov.b	&0xaa,0x8-0x8(%a0)

	mov.w	&0x001f,ICCR(%a6)
	mov.w	&0x1f,%cc
	movm.l	&0x7fff,IREGS(%a6)

	movp.l	(-0x8,%a0),%d0

	mov.w	%cc,SCCR(%a6)
	movm.l	&0x7fff,SREGS(%a6)
	mov.l	&0xaaaaaaaa,IREGS(%a6)

	mov.l	&0xaaaaaaaa,%d1

	cmp.l	%d0,%d1
	bne.l	error

	bsr.l	chkregs
	tst.b	%d0
	bne.l	error

	mov.l	TESTCTR(%a6),%d1
	clr.l	%d0
	rts

###########################################################

divul_str:
	string		"\t64-bit divide..."

	align		0x4
divul_0:
	addq.l		&0x1,TESTCTR(%a6)

#	movm.l		DEF_REGS(%pc),&0x3fff

#	clr.l		%d1
#	mov.l		&0x99999999,%d2
#	mov.l		&0x88888888,%d3

#	mov.w		&0x001e,ICCR(%a6)
#	mov.w		&0x001f,%cc
#	movm.l		&0x7fff,IREGS(%a6)

#	divu.l		%d1,%d2:%d3

#	mov.w		%cc,SCCR(%a6)
#	movm.l		&0x7fff,SREGS(%a6)

#	bsr.l		chkregs
#	tst.b		%d0
#	bne.l		error

divul_1:
	addq.l		&0x1,TESTCTR(%a6)

	movm.l		DEF_REGS(%pc),&0x3fff

	mov.l		&0x00000001,%d1
	mov.l		&0x00000000,%d2
	mov.l		&0x00000000,%d3

	mov.w		&0x0014,ICCR(%a6)
	mov.w		&0x001f,%cc
	movm.l		&0x7fff,IREGS(%a6)

	divu.l		%d1,%d2:%d3

	mov.w		%cc,SCCR(%a6)
	movm.l		&0x7fff,SREGS(%a6)

	bsr.l		chkregs
	tst.b		%d0
	bne.l		error

divul_2:
	addq.l		&0x1,TESTCTR(%a6)

	movm.l		DEF_REGS(%pc),&0x3fff

	mov.l		&0x44444444,%d1
	mov.l		&0x00000000,%d2
	mov.l		&0x55555555,%d3

	mov.w		&0x0010,ICCR(%a6)
	mov.w		&0x001f,%cc
	movm.l		&0x7fff,IREGS(%a6)

	divu.l		%d1,%d2:%d3

	mov.w		%cc,SCCR(%a6)
	movm.l		&0x7fff,SREGS(%a6)
	mov.l		&0x11111111,IREGS+0x8(%a6)
	mov.l		&0x00000001,IREGS+0xc(%a6)

	bsr.l		chkregs
	tst.b		%d0
	bne.l		error

divul_3:
	addq.l		&0x1,TESTCTR(%a6)

	movm.l		DEF_REGS(%pc),&0x3fff

	mov.l		&0x55555555,%d1
	mov.l		&0x00000000,%d2
	mov.l		&0x44444444,%d3

	mov.w		&0x0014,ICCR(%a6)
	mov.w		&0x001f,%cc
	movm.l		&0x7fff,IREGS(%a6)

	divu.l		%d1,%d2:%d3

	mov.w		%cc,SCCR(%a6)
	movm.l		&0x7fff,SREGS(%a6)
	mov.l		&0x44444444,IREGS+0x8(%a6)
	mov.l		&0x00000000,IREGS+0xc(%a6)

	bsr.l		chkregs
	tst.b		%d0
	bne.l		error

divul_4:
	addq.l		&0x1,TESTCTR(%a6)

	movm.l		DEF_REGS(%pc),&0x3fff

	mov.l		&0x11111111,%d1
	mov.l		&0x44444444,%d2
	mov.l		&0x44444444,%d3

	mov.w		&0x001e,ICCR(%a6)
	mov.w		&0x001d,%cc
	movm.l		&0x7fff,IREGS(%a6)

	divu.l		%d1,%d2:%d3

	mov.w		%cc,SCCR(%a6)
	movm.l		&0x7fff,SREGS(%a6)

	bsr.l		chkregs
	tst.b		%d0
	bne.l		error

divul_5:
	addq.l		&0x1,TESTCTR(%a6)

	movm.l		DEF_REGS(%pc),&0x3fff

	mov.l		&0xfffffffe,%d1
	mov.l		&0x00000001,%d2
	mov.l		&0x00000002,%d3

	mov.w		&0x001e,ICCR(%a6)
	mov.w		&0x001d,%cc
	movm.l		&0x7fff,IREGS(%a6)

	divs.l		%d1,%d2:%d3

	mov.w		%cc,SCCR(%a6)
	movm.l		&0x7fff,SREGS(%a6)

	bsr.l		chkregs
	tst.b		%d0
	bne.l		error

divul_6:
	addq.l		&0x1,TESTCTR(%a6)

	movm.l		DEF_REGS(%pc),&0x3fff

	mov.l		&0xfffffffe,%d1
	mov.l		&0x00000001,%d2
	mov.l		&0x00000000,%d3

	mov.w		&0x0018,ICCR(%a6)
	mov.w		&0x001d,%cc
	movm.l		&0x7fff,IREGS(%a6)

	divs.l		%d1,%d2:%d3

	mov.w		%cc,SCCR(%a6)
	movm.l		&0x7fff,SREGS(%a6)
	mov.l		&0x00000000,IREGS+0x8(%a6)
	mov.l		&0x80000000,IREGS+0xc(%a6)

	bsr.l		chkregs
	tst.b		%d0
	bne.l		error

divul_7:
	addq.l		&0x1,TESTCTR(%a6)

	movm.l		DEF_REGS(%pc),&0x3fff

	mov.l		&0x00000002,%d1
	mov.l		&0x00000001,%d2
	mov.l		&0x00000000,%d3

	mov.w		&0x001e,ICCR(%a6)
	mov.w		&0x001d,%cc
	movm.l		&0x7fff,IREGS(%a6)

	divs.l		%d1,%d2:%d3

	mov.w		%cc,SCCR(%a6)
	movm.l		&0x7fff,SREGS(%a6)

	bsr.l		chkregs
	tst.b		%d0
	bne.l		error

divul_8:
	addq.l		&0x1,TESTCTR(%a6)

	movm.l		DEF_REGS(%pc),&0x3fff

	mov.l		&0xffffffff,%d1
	mov.l		&0xfffffffe,%d2
	mov.l		&0xffffffff,%d3

	mov.w		&0x0008,ICCR(%a6)
	mov.w		&0x0000,%cc
	movm.l		&0x7fff,IREGS(%a6)

	divu.l		%d1,%d2:%d3

	mov.w		%cc,SCCR(%a6)
	movm.l		&0x7fff,SREGS(%a6)

	bsr.l		chkregs
	tst.b		%d0
	bne.l		error

divul_9:
	addq.l		&0x1,TESTCTR(%a6)

	movm.l		DEF_REGS(%pc),&0x3fff

	mov.l		&0xffffffff,%d1
	mov.l		&0xfffffffe,%d2
	mov.l		&0xffffffff,%d3

	mov.w		&0x0008,ICCR(%a6)
	mov.w		&0x0000,%cc
	movm.l		&0x7fff,IREGS(%a6)

	divu.l		&0xffffffff,%d2:%d2

	mov.w		%cc,SCCR(%a6)
	movm.l		&0x7fff,SREGS(%a6)
	mov.l		&0xffffffff,IREGS+0x8(%a6)

	bsr.l		chkregs
	tst.b		%d0
	bne.l		error

divul_10:
	addq.l		&0x1,TESTCTR(%a6)

	movm.l		DEF_REGS(%pc),&0x3fff

	mov.l		&0x0000ffff,%d1
	mov.l		&0x00000001,%d2
	mov.l		&0x55555555,%d3

	mov.w		&0x0000,ICCR(%a6)
	mov.w		&0x0000,%cc
	movm.l		&0x7fff,IREGS(%a6)

	divu.l		%d1,%d2:%d3

	mov.w		%cc,SCCR(%a6)
	movm.l		&0x7fff,SREGS(%a6)
	mov.l		&0x0000aaab,IREGS+0x8(%a6)
	mov.l		&0x00015556,IREGS+0xc(%a6)

	bsr.l		chkregs
	tst.b		%d0
	bne.l		error

	mov.l		TESTCTR(%a6),%d1
	clr.l		%d0
	rts

###########################################################

cas_str:
	string		"\tcas..."

	align		0x4
cas0:
	addq.l		&0x1,TESTCTR(%a6)

	movm.l		DEF_REGS(%pc),&0x3fff

	lea		DATA+0x1(%a6),%a0

	mov.w		&0xaaaa,(%a0)

	mov.w		&0xaaaa,%d1
	mov.w		&0xbbbb,%d2

	mov.w		&0x0014,ICCR(%a6)
	mov.w		&0x0010,%cc
	movm.l		&0x7fff,IREGS(%a6)

	cas.w		%d1,%d2,(%a0)			# Dc,Du,<ea>

	mov.w		%cc,SCCR(%a6)
	mov.w		(%a0),%d3
	mov.w		&0xbbbb,IREGS+0xc+0x2(%a6)
	movm.l		&0x7fff,SREGS(%a6)

	bsr.l		chkregs
	tst.b		%d0
	bne.l		error

cas1:
	addq.l		&0x1,TESTCTR(%a6)

	movm.l		DEF_REGS(%pc),&0x3fff

	lea		DATA+0x1(%a6),%a0

	mov.w		&0xeeee,(%a0)

	mov.w		&0x0000aaaa,%d1
	mov.w		&0x0000bbbb,%d2

	mov.w		&0x0000,ICCR(%a6)
	mov.w		&0x0000,%cc
	movm.l		&0x7fff,IREGS(%a6)

	cas.w		%d1,%d2,(%a0)			# Dc,Du,<ea>

	mov.w		%cc,SCCR(%a6)
	mov.w		(%a0),%d3
	mov.w		&0xeeee,IREGS+0x4+0x2(%a6)
	mov.w		&0xeeee,IREGS+0xc+0x2(%a6)
	movm.l		&0x7fff,SREGS(%a6)

	bsr.l		chkregs
	tst.b		%d0
	bne.l		error

cas2:
	addq.l		&0x1,TESTCTR(%a6)

	movm.l		DEF_REGS(%pc),&0x3fff

	lea		DATA+0x2(%a6),%a0

	mov.l		&0xaaaaaaaa,(%a0)

	mov.l		&0xaaaaaaaa,%d1
	mov.l		&0xbbbbbbbb,%d2

	mov.w		&0x0004,ICCR(%a6)
	mov.w		&0x0000,%cc
	movm.l		&0x7fff,IREGS(%a6)

	cas.l		%d1,%d2,(%a0)			# Dc,Du,<ea>

	mov.w		%cc,SCCR(%a6)
	mov.l		(%a0),%d3
	mov.l		&0xbbbbbbbb,IREGS+0xc(%a6)
	movm.l		&0x7fff,SREGS(%a6)

	bsr.l		chkregs
	tst.b		%d0
	bne.l		error

cas3:
	addq.l		&0x1,TESTCTR(%a6)

	movm.l		DEF_REGS(%pc),&0x3fff

	lea		DATA+0x2(%a6),%a0

	mov.l		&0xeeeeeeee,(%a0)

	mov.l		&0xaaaaaaaa,%d1
	mov.l		&0xbbbbbbbb,%d2

	mov.w		&0x0000,ICCR(%a6)
	mov.w		&0x0000,%cc
	movm.l		&0x7fff,IREGS(%a6)

	cas.l		%d1,%d2,(%a0)			# Dc,Du,<ea>

	mov.w		%cc,SCCR(%a6)
	mov.l		(%a0),%d3
	mov.l		&0xeeeeeeee,IREGS+0x4(%a6)
	mov.l		&0xeeeeeeee,IREGS+0xc(%a6)
	movm.l		&0x7fff,SREGS(%a6)

	bsr.l		chkregs
	tst.b		%d0
	bne.l		error

cas4:
	addq.l		&0x1,TESTCTR(%a6)

	movm.l		DEF_REGS(%pc),&0x3fff

	lea		DATA+0x1(%a6),%a0

	mov.l		&0xaaaaaaaa,(%a0)

	mov.l		&0xaaaaaaaa,%d1
	mov.l		&0xbbbbbbbb,%d2

	mov.w		&0x0004,ICCR(%a6)
	mov.w		&0x0000,%cc
	movm.l		&0x7fff,IREGS(%a6)

	cas.l		%d1,%d2,(%a0)			# Dc,Du,<ea>

	mov.w		%cc,SCCR(%a6)
	mov.l		(%a0),%d3
	mov.l		&0xbbbbbbbb,IREGS+0xc(%a6)
	movm.l		&0x7fff,SREGS(%a6)

	bsr.l		chkregs
	tst.b		%d0
	bne.l		error

cas5:
	addq.l		&0x1,TESTCTR(%a6)

	movm.l		DEF_REGS(%pc),&0x3fff

	lea		DATA+0x1(%a6),%a0

	mov.l		&0x7fffffff,(%a0)

	mov.l		&0x80000000,%d1
	mov.l		&0xbbbbbbbb,%d2

	mov.w		&0x001b,ICCR(%a6)
	mov.w		&0x0010,%cc
	movm.l		&0x7fff,IREGS(%a6)

	cas.l		%d1,%d2,(%a0)			# Dc,Du,<ea>

	mov.w		%cc,SCCR(%a6)
	mov.l		(%a0),%d3
	mov.l		&0x7fffffff,IREGS+0x4(%a6)
	mov.l		&0x7fffffff,IREGS+0xc(%a6)
	movm.l		&0x7fff,SREGS(%a6)

	bsr.l		chkregs
	tst.b		%d0
	bne.l		error

	mov.l		TESTCTR(%a6),%d1
	clr.l		%d0
	rts

###########################################################

cas2_str:
	string		"\tcas2..."

	align		0x4
cas20:
	addq.l		&0x1,TESTCTR(%a6)

	movm.l		DEF_REGS(%pc),&0x3fff

	lea		DATA+0x0(%a6),%a0
	lea		DATA+0x4(%a6),%a1

	mov.l		&0xaaaaaaaa,(%a0)
	mov.l		&0xbbbbbbbb,(%a1)

	mov.l		&0xaaaaaaaa,%d1
	mov.l		&0xbbbbbbbb,%d2
	mov.l		&0xcccccccc,%d3
	mov.l		&0xdddddddd,%d4

	mov.w		&0x0014,ICCR(%a6)
	mov.w		&0x0010,%cc
	movm.l		&0x7fff,IREGS(%a6)

	cas2.l		%d1:%d2,%d3:%d4,(%a0):(%a1)	# Dc1:Dc2,Du1:Du2,(Rn1):(Rn2)

	mov.w		%cc,SCCR(%a6)
	mov.l		(%a0),%d5
	mov.l		(%a1),%d6
	mov.l		&0xcccccccc,IREGS+0x14(%a6)
	mov.l		&0xdddddddd,IREGS+0x18(%a6)
	movm.l		&0x7fff,SREGS(%a6)

	bsr.l		chkregs
	tst.b		%d0
	bne.l		error

cas21:
	addq.l		&0x1,TESTCTR(%a6)

	movm.l		DEF_REGS(%pc),&0x3fff

	lea		DATA+0x1(%a6),%a0
	lea		DATA+0x5(%a6),%a1

	mov.l		&0xaaaaaaaa,(%a0)
	mov.l		&0xbbbbbbbb,(%a1)

	mov.l		&0xaaaaaaaa,%d1
	mov.l		&0xbbbbbbbb,%d2
	mov.l		&0xcccccccc,%d3
	mov.l		&0xdddddddd,%d4

	mov.w		&0x0014,ICCR(%a6)
	mov.w		&0x0010,%cc
	movm.l		&0x7fff,IREGS(%a6)

	cas2.l		%d1:%d2,%d3:%d4,(%a0):(%a1)	# Dc1:Dc2,Du1:Du2,(Rn1):(Rn2)

	mov.w		%cc,SCCR(%a6)
	mov.l		(%a0),%d5
	mov.l		(%a1),%d6
	mov.l		&0xcccccccc,IREGS+0x14(%a6)
	mov.l		&0xdddddddd,IREGS+0x18(%a6)
	movm.l		&0x7fff,SREGS(%a6)

	bsr.l		chkregs
	tst.b		%d0
	bne.l		error

cas22:
	addq.l		&0x1,TESTCTR(%a6)

	movm.l		DEF_REGS(%pc),&0x3fff

	lea		DATA+0x2(%a6),%a0
	lea		DATA+0x6(%a6),%a1

	mov.l		&0xaaaaaaaa,(%a0)
	mov.l		&0xbbbbbbbb,(%a1)

	mov.l		&0xaaaaaaaa,%d1
	mov.l		&0xbbbbbbbb,%d2
	mov.l		&0xcccccccc,%d3
	mov.l		&0xdddddddd,%d4

	mov.w		&0x0014,ICCR(%a6)
	mov.w		&0x0010,%cc
	movm.l		&0x7fff,IREGS(%a6)

	cas2.l		%d1:%d2,%d3:%d4,(%a0):(%a1)	# Dc1:Dc2,Du1:Du2,(Rn1):(Rn2)

	mov.w		%cc,SCCR(%a6)
	mov.l		(%a0),%d5
	mov.l		(%a1),%d6
	mov.l		&0xcccccccc,IREGS+0x14(%a6)
	mov.l		&0xdddddddd,IREGS+0x18(%a6)
	movm.l		&0x7fff,SREGS(%a6)

	bsr.l		chkregs
	tst.b		%d0
	bne.l		error

cas23:
	addq.l		&0x1,TESTCTR(%a6)

	movm.l		DEF_REGS(%pc),&0x3fff

	lea		DATA+0x0(%a6),%a0
	lea		DATA+0x4(%a6),%a1

	mov.l		&0xeeeeeeee,(%a0)
	mov.l		&0xbbbbbbbb,(%a1)

	mov.l		&0xaaaaaaaa,%d1
	mov.l		&0xbbbbbbbb,%d2
	mov.l		&0xcccccccc,%d3
	mov.l		&0xdddddddd,%d4

	mov.w		&0x0000,ICCR(%a6)
	mov.w		&0x0000,%cc
	movm.l		&0x7fff,IREGS(%a6)

	cas2.l		%d1:%d2,%d3:%d4,(%a0):(%a1)	# Dc1:Dc2,Du1:Du2,(Rn1):(Rn2)

	mov.w		%cc,SCCR(%a6)
	mov.l		(%a0),%d5
	mov.l		(%a1),%d6
	mov.l		&0xeeeeeeee,IREGS+0x4(%a6)
	mov.l		&0xbbbbbbbb,IREGS+0x8(%a6)
	mov.l		&0xeeeeeeee,IREGS+0x14(%a6)
	mov.l		&0xbbbbbbbb,IREGS+0x18(%a6)
	movm.l		&0x7fff,SREGS(%a6)

	bsr.l		chkregs
	tst.b		%d0
	bne.l		error

cas24:
	addq.l		&0x1,TESTCTR(%a6)

	movm.l		DEF_REGS(%pc),&0x3fff

	lea		DATA+0x1(%a6),%a0
	lea		DATA+0x5(%a6),%a1

	mov.l		&0xeeeeeeee,(%a0)
	mov.l		&0xbbbbbbbb,(%a1)

	mov.l		&0xaaaaaaaa,%d1
	mov.l		&0xbbbbbbbb,%d2
	mov.l		&0xcccccccc,%d3
	mov.l		&0xdddddddd,%d4

	mov.w		&0x0000,ICCR(%a6)
	mov.w		&0x0000,%cc
	movm.l		&0x7fff,IREGS(%a6)

	cas2.l		%d1:%d2,%d3:%d4,(%a0):(%a1)	# Dc1:Dc2,Du1:Du2,(Rn1):(Rn2)

	mov.w		%cc,SCCR(%a6)
	mov.l		(%a0),%d5
	mov.l		(%a1),%d6
	mov.l		&0xeeeeeeee,IREGS+0x4(%a6)
	mov.l		&0xbbbbbbbb,IREGS+0x8(%a6)
	mov.l		&0xeeeeeeee,IREGS+0x14(%a6)
	mov.l		&0xbbbbbbbb,IREGS+0x18(%a6)
	movm.l		&0x7fff,SREGS(%a6)

	bsr.l		chkregs
	tst.b		%d0
	bne.l		error

cas25:
	addq.l		&0x1,TESTCTR(%a6)

	movm.l		DEF_REGS(%pc),&0x3fff

	lea		DATA+0x2(%a6),%a0
	lea		DATA+0x6(%a6),%a1

	mov.l		&0xeeeeeeee,(%a0)
	mov.l		&0xbbbbbbbb,(%a1)

	mov.l		&0xaaaaaaaa,%d1
	mov.l		&0xbbbbbbbb,%d2
	mov.l		&0xcccccccc,%d3
	mov.l		&0xdddddddd,%d4

	mov.w		&0x0000,ICCR(%a6)
	mov.w		&0x0000,%cc
	movm.l		&0x7fff,IREGS(%a6)

	cas2.l		%d1:%d2,%d3:%d4,(%a0):(%a1)	# Dc1:Dc2,Du1:Du2,(Rn1):(Rn2)

	mov.w		%cc,SCCR(%a6)
	mov.l		(%a0),%d5
	mov.l		(%a1),%d6
	mov.l		&0xeeeeeeee,IREGS+0x4(%a6)
	mov.l		&0xbbbbbbbb,IREGS+0x8(%a6)
	mov.l		&0xeeeeeeee,IREGS+0x14(%a6)
	mov.l		&0xbbbbbbbb,IREGS+0x18(%a6)
	movm.l		&0x7fff,SREGS(%a6)

	bsr.l		chkregs
	tst.b		%d0
	bne.l		error

cas26:
	addq.l		&0x1,TESTCTR(%a6)

	movm.l		DEF_REGS(%pc),&0x3fff

	lea		DATA+0x0(%a6),%a0
	lea		DATA+0x4(%a6),%a1

	mov.l		&0xaaaaaaaa,(%a0)
	mov.l		&0xeeeeeeee,(%a1)

	mov.l		&0xaaaaaaaa,%d1
	mov.l		&0xbbbbbbbb,%d2
	mov.l		&0xcccccccc,%d3
	mov.l		&0xdddddddd,%d4

	mov.w		&0x0000,ICCR(%a6)
	mov.w		&0x0000,%cc
	movm.l		&0x7fff,IREGS(%a6)

	cas2.l		%d1:%d2,%d3:%d4,(%a0):(%a1)	# Dc1:Dc2,Du1:Du2,(Rn1):(Rn2)

	mov.w		%cc,SCCR(%a6)
	mov.l		(%a0),%d5
	mov.l		(%a1),%d6
	mov.l		&0xaaaaaaaa,IREGS+0x4(%a6)
	mov.l		&0xeeeeeeee,IREGS+0x8(%a6)
	mov.l		&0xaaaaaaaa,IREGS+0x14(%a6)
	mov.l		&0xeeeeeeee,IREGS+0x18(%a6)
	movm.l		&0x7fff,SREGS(%a6)

	bsr.l		chkregs
	tst.b		%d0
	bne.l		error

cas27:
	addq.l		&0x1,TESTCTR(%a6)

	movm.l		DEF_REGS(%pc),&0x3fff

	lea		DATA+0x1(%a6),%a0
	lea		DATA+0x5(%a6),%a1

	mov.l		&0xaaaaaaaa,(%a0)
	mov.l		&0xeeeeeeee,(%a1)

	mov.l		&0xaaaaaaaa,%d1
	mov.l		&0xbbbbbbbb,%d2
	mov.l		&0xcccccccc,%d3
	mov.l		&0xdddddddd,%d4

	mov.w		&0x0000,ICCR(%a6)
	mov.w		&0x0000,%cc
	movm.l		&0x7fff,IREGS(%a6)

	cas2.l		%d1:%d2,%d3:%d4,(%a0):(%a1)	# Dc1:Dc2,Du1:Du2,(Rn1):(Rn2)

	mov.w		%cc,SCCR(%a6)
	mov.l		(%a0),%d5
	mov.l		(%a1),%d6
	mov.l		&0xaaaaaaaa,IREGS+0x4(%a6)
	mov.l		&0xeeeeeeee,IREGS+0x8(%a6)
	mov.l		&0xaaaaaaaa,IREGS+0x14(%a6)
	mov.l		&0xeeeeeeee,IREGS+0x18(%a6)
	movm.l		&0x7fff,SREGS(%a6)

	bsr.l		chkregs
	tst.b		%d0
	bne.l		error

cas28:
	addq.l		&0x1,TESTCTR(%a6)

	movm.l		DEF_REGS(%pc),&0x3fff

	lea		DATA+0x2(%a6),%a0
	lea		DATA+0x6(%a6),%a1

	mov.l		&0xaaaaaaaa,(%a0)
	mov.l		&0x7fffffff,(%a1)

	mov.l		&0xaaaaaaaa,%d1
	mov.l		&0x80000000,%d2
	mov.l		&0xcccccccc,%d3
	mov.l		&0xdddddddd,%d4

	mov.w		&0x000b,ICCR(%a6)
	mov.w		&0x0000,%cc
	movm.l		&0x7fff,IREGS(%a6)

	cas2.l		%d1:%d2,%d3:%d4,(%a0):(%a1)	# Dc1:Dc2,Du1:Du2,(Rn1):(Rn2)

	mov.w		%cc,SCCR(%a6)
	mov.l		(%a0),%d5
	mov.l		(%a1),%d6
	mov.l		&0xaaaaaaaa,IREGS+0x4(%a6)
	mov.l		&0x7fffffff,IREGS+0x8(%a6)
	mov.l		&0xaaaaaaaa,IREGS+0x14(%a6)
	mov.l		&0x7fffffff,IREGS+0x18(%a6)
	movm.l		&0x7fff,SREGS(%a6)

	bsr.l		chkregs
	tst.b		%d0
	bne.l		error

##################################
cas29:
	addq.l		&0x1,TESTCTR(%a6)

	movm.l		DEF_REGS(%pc),&0x3fff

	lea		DATA+0x0(%a6),%a0
	lea		DATA+0x4(%a6),%a1

	mov.w		&0xaaaa,(%a0)
	mov.w		&0xbbbb,(%a1)

	mov.w		&0xaaaa,%d1
	mov.w		&0xbbbb,%d2
	mov.w		&0xcccc,%d3
	mov.w		&0xdddd,%d4

	mov.w		&0x0014,ICCR(%a6)
	mov.w		&0x0010,%cc
	movm.l		&0x7fff,IREGS(%a6)

	cas2.w		%d1:%d2,%d3:%d4,(%a0):(%a1)	# Dc1:Dc2,Du1:Du2,(Rn1):(Rn2)

	mov.w		%cc,SCCR(%a6)
	mov.w		(%a0),%d5
	mov.w		(%a1),%d6
	mov.w		&0xcccc,IREGS+0x14+0x2(%a6)
	mov.w		&0xdddd,IREGS+0x18+0x2(%a6)
	movm.l		&0x7fff,SREGS(%a6)

	bsr.l		chkregs
	tst.b		%d0
	bne.l		error

cas210:
	addq.l		&0x1,TESTCTR(%a6)

	movm.l		DEF_REGS(%pc),&0x3fff

	lea		DATA+0x1(%a6),%a0
	lea		DATA+0x5(%a6),%a1

	mov.w		&0xaaaa,(%a0)
	mov.w		&0xbbbb,(%a1)

	mov.w		&0xaaaa,%d1
	mov.w		&0xbbbb,%d2
	mov.w		&0xcccc,%d3
	mov.w		&0xdddd,%d4

	mov.w		&0x0004,ICCR(%a6)
	mov.w		&0x0000,%cc
	movm.l		&0x7fff,IREGS(%a6)

	cas2.w		%d1:%d2,%d3:%d4,(%a0):(%a1)	# Dc1:Dc2,Du1:Du2,(Rn1):(Rn2)

	mov.w		%cc,SCCR(%a6)
	mov.w		(%a0),%d5
	mov.w		(%a1),%d6
	mov.w		&0xcccc,IREGS+0x14+0x2(%a6)
	mov.w		&0xdddd,IREGS+0x18+0x2(%a6)
	movm.l		&0x7fff,SREGS(%a6)

	bsr.l		chkregs
	tst.b		%d0
	bne.l		error

cas211:
	addq.l		&0x1,TESTCTR(%a6)

	movm.l		DEF_REGS(%pc),&0x3fff

	lea		DATA+0x0(%a6),%a0
	lea		DATA+0x4(%a6),%a1

	mov.w		&0xeeee,(%a0)
	mov.w		&0xbbbb,(%a1)

	mov.w		&0xaaaa,%d1
	mov.w		&0xbbbb,%d2
	mov.w		&0xcccc,%d3
	mov.w		&0xdddd,%d4

	mov.w		&0x0000,ICCR(%a6)
	mov.w		&0x0000,%cc
	movm.l		&0x7fff,IREGS(%a6)

	cas2.w		%d1:%d2,%d3:%d4,(%a0):(%a1)	# Dc1:Dc2,Du1:Du2,(Rn1):(Rn2)

	mov.w		%cc,SCCR(%a6)
	mov.w		(%a0),%d5
	mov.w		(%a1),%d6
	mov.w		&0xeeee,IREGS+0x4+0x2(%a6)
	mov.w		&0xbbbb,IREGS+0x8+0x2(%a6)
	mov.w		&0xeeee,IREGS+0x14+0x2(%a6)
	mov.w		&0xbbbb,IREGS+0x18+0x2(%a6)
	movm.l		&0x7fff,SREGS(%a6)

	bsr.l		chkregs
	tst.b		%d0
	bne.l		error

cas212:
	addq.l		&0x1,TESTCTR(%a6)

	movm.l		DEF_REGS(%pc),&0x3fff

	lea		DATA+0x1(%a6),%a0
	lea		DATA+0x5(%a6),%a1

	mov.w		&0xeeee,(%a0)
	mov.w		&0xbbbb,(%a1)

	mov.w		&0xaaaa,%d1
	mov.w		&0xbbbb,%d2
	mov.w		&0xcccc,%d3
	mov.w		&0xdddd,%d4

	mov.w		&0x0000,ICCR(%a6)
	mov.w		&0x0000,%cc
	movm.l		&0x7fff,IREGS(%a6)

	cas2.w		%d1:%d2,%d3:%d4,(%a0):(%a1)	# Dc1:Dc2,Du1:Du2,(Rn1):(Rn2)

	mov.w		%cc,SCCR(%a6)
	mov.w		(%a0),%d5
	mov.w		(%a1),%d6
	mov.w		&0xeeee,IREGS+0x4+0x2(%a6)
	mov.w		&0xbbbb,IREGS+0x8+0x2(%a6)
	mov.w		&0xeeee,IREGS+0x14+0x2(%a6)
	mov.w		&0xbbbb,IREGS+0x18+0x2(%a6)
	movm.l		&0x7fff,SREGS(%a6)

	bsr.l		chkregs
	tst.b		%d0
	bne.l		error

cas213:
	addq.l		&0x1,TESTCTR(%a6)

	movm.l		DEF_REGS(%pc),&0x3fff

	lea		DATA+0x0(%a6),%a0
	lea		DATA+0x4(%a6),%a1

	mov.w		&0xaaaa,(%a0)
	mov.w		&0xeeee,(%a1)

	mov.w		&0xaaaa,%d1
	mov.w		&0xbbbb,%d2
	mov.w		&0xcccc,%d3
	mov.w		&0xdddd,%d4

	mov.w		&0x0000,ICCR(%a6)
	mov.w		&0x0000,%cc
	movm.l		&0x7fff,IREGS(%a6)

	cas2.w		%d1:%d2,%d3:%d4,(%a0):(%a1)	# Dc1:Dc2,Du1:Du2,(Rn1):(Rn2)

	mov.w		%cc,SCCR(%a6)
	mov.w		(%a0),%d5
	mov.w		(%a1),%d6
	mov.w		&0xaaaa,IREGS+0x4+0x2(%a6)
	mov.w		&0xeeee,IREGS+0x8+0x2(%a6)
	mov.w		&0xaaaa,IREGS+0x14+0x2(%a6)
	mov.w		&0xeeee,IREGS+0x18+0x2(%a6)
	movm.l		&0x7fff,SREGS(%a6)

	bsr.l		chkregs
	tst.b		%d0
	bne.l		error

cas214:
	addq.l		&0x1,TESTCTR(%a6)

	movm.l		DEF_REGS(%pc),&0x3fff

	lea		DATA+0x1(%a6),%a0
	lea		DATA+0x5(%a6),%a1

	mov.w		&0xaaaa,(%a0)
	mov.w		&0x7fff,(%a1)

	mov.w		&0xaaaa,%d1
	mov.w		&0x8000,%d2
	mov.w		&0xcccc,%d3
	mov.w		&0xdddd,%d4

	mov.w		&0x001b,ICCR(%a6)
	mov.w		&0x0010,%cc
	movm.l		&0x7fff,IREGS(%a6)

	cas2.w		%d1:%d2,%d3:%d4,(%a0):(%a1)	# Dc1:Dc2,Du1:Du2,(Rn1):(Rn2)

	mov.w		%cc,SCCR(%a6)
	mov.w		(%a0),%d5
	mov.w		(%a1),%d6
	mov.w		&0xaaaa,IREGS+0x4+0x2(%a6)
	mov.w		&0x7fff,IREGS+0x8+0x2(%a6)
	mov.w		&0xaaaa,IREGS+0x14+0x2(%a6)
	mov.w		&0x7fff,IREGS+0x18+0x2(%a6)
	movm.l		&0x7fff,SREGS(%a6)

	bsr.l		chkregs
	tst.b		%d0
	bne.l		error

	mov.l		TESTCTR(%a6),%d1
	clr.l		%d0
	rts

###########################################################

cmp2_str:
	string		"\tcmp2,chk2..."

	align		0x4
# unsigned - small,small
cmp2_1:
	addq.l		&0x1,TESTCTR(%a6)

	movm.l		DEF_REGS(%pc),&0x3fff

	mov.w		&0x2040,DATA(%a6)
	mov.l		&0x11111120,%d1

	mov.w		&0x0004,ICCR(%a6)
	mov.w		&0x0000,%cc
	movm.l		&0x7fff,IREGS(%a6)

	cmp2.b		%d1,DATA(%a6)

	mov.w		%cc,SCCR(%a6)
	movm.l		&0x7fff,SREGS(%a6)

	bsr.l		chkregs
	tst.b		%d0
	bne.l		error

cmp2_2:
	addq.l		&0x1,TESTCTR(%a6)

	movm.l		DEF_REGS(%pc),&0x3fff

	mov.w		&0x2040,DATA(%a6)
	mov.l		&0x00000040,%a1

	mov.w		&0x0004,ICCR(%a6)
	mov.w		&0x0000,%cc
	movm.l		&0x7fff,IREGS(%a6)

	cmp2.b		%a1,DATA(%a6)

	mov.w		%cc,SCCR(%a6)
	movm.l		&0x7fff,SREGS(%a6)

	bsr.l		chkregs
	tst.b		%d0
	bne.l		error

cmp2_3:
	addq.l		&0x1,TESTCTR(%a6)

	movm.l		DEF_REGS(%pc),&0x3fff

	mov.w		&0x2040,DATA(%a6)
	mov.l		&0x11111130,%d1

	mov.w		&0x0000,ICCR(%a6)
	mov.w		&0x0000,%cc
	movm.l		&0x7fff,IREGS(%a6)

	chk2.b		DATA(%a6),%d1

	mov.w		%cc,SCCR(%a6)
	movm.l		&0x7fff,SREGS(%a6)

	bsr.l		chkregs
	tst.b		%d0
	bne.l		error

cmp2_4:
	addq.l		&0x1,TESTCTR(%a6)

	movm.l		DEF_REGS(%pc),&0x3fff

	mov.w		&0x2040,DATA(%a6)
	mov.l		&0x00000010,%a1

	mov.w		&0x0001,ICCR(%a6)
	mov.w		&0x0000,%cc
	movm.l		&0x7fff,IREGS(%a6)

	cmp2.b		%a1,DATA(%a6)

	mov.w		%cc,SCCR(%a6)
	movm.l		&0x7fff,SREGS(%a6)

	bsr.l		chkregs
	tst.b		%d0
	bne.l		error

cmp2_5:
	addq.l		&0x1,TESTCTR(%a6)

	movm.l		DEF_REGS(%pc),&0x3fff

	mov.w		&0x2040,DATA(%a6)
	mov.l		&0x11111150,%d1

	mov.w		&0x0001,ICCR(%a6)
	mov.w		&0x0000,%cc
	movm.l		&0x7fff,IREGS(%a6)

	cmp2.b		%d1,DATA(%a6)

	mov.w		%cc,SCCR(%a6)
	movm.l		&0x7fff,SREGS(%a6)

	bsr.l		chkregs
	tst.b		%d0
	bne.l		error

cmp2_6:
	addq.l		&0x1,TESTCTR(%a6)

	movm.l		DEF_REGS(%pc),&0x3fff

	mov.w		&0x2040,DATA(%a6)
	mov.l		&0x00000090,%a1

	mov.w		&0x0001,ICCR(%a6)
	mov.w		&0x0000,%cc
	movm.l		&0x7fff,IREGS(%a6)

	cmp2.b		%a1,DATA(%a6)

	mov.w		%cc,SCCR(%a6)
	movm.l		&0x7fff,SREGS(%a6)

	bsr.l		chkregs
	tst.b		%d0
	bne.l		error

# unsigned - small,large
cmp2_7:
	addq.l		&0x1,TESTCTR(%a6)

	movm.l		DEF_REGS(%pc),&0x3fff

	mov.l		&0x2000a000,DATA(%a6)
	mov.l		&0x11112000,%d1

	mov.w		&0x0004,ICCR(%a6)
	mov.w		&0x0000,%cc
	movm.l		&0x7fff,IREGS(%a6)

	cmp2.w		%d1,DATA(%a6)

	mov.w		%cc,SCCR(%a6)
	movm.l		&0x7fff,SREGS(%a6)

	bsr.l		chkregs
	tst.b		%d0
	bne.l		error

cmp2_8:
	addq.l		&0x1,TESTCTR(%a6)

	movm.l		DEF_REGS(%pc),&0x3fff

	mov.l		&0x2000a000,DATA(%a6)
	mov.l		&0xffffa000,%a1

	mov.w		&0x0004,ICCR(%a6)
	mov.w		&0x0000,%cc
	movm.l		&0x7fff,IREGS(%a6)

	cmp2.w		%a1,DATA(%a6)

	mov.w		%cc,SCCR(%a6)
	movm.l		&0x7fff,SREGS(%a6)

	bsr.l		chkregs
	tst.b		%d0
	bne.l		error

cmp2_9:
	addq.l		&0x1,TESTCTR(%a6)

	movm.l		DEF_REGS(%pc),&0x3fff

	mov.l		&0x2000a000,DATA(%a6)
	mov.l		&0x11113000,%d1

	mov.w		&0x0000,ICCR(%a6)
	mov.w		&0x0000,%cc
	movm.l		&0x7fff,IREGS(%a6)

	chk2.w		DATA(%a6),%d1

	mov.w		%cc,SCCR(%a6)
	movm.l		&0x7fff,SREGS(%a6)

	bsr.l		chkregs
	tst.b		%d0
	bne.l		error

cmp2_10:
	addq.l		&0x1,TESTCTR(%a6)

	movm.l		DEF_REGS(%pc),&0x3fff

	mov.l		&0x2000a000,DATA(%a6)
	mov.l		&0xffff9000,%a1

	mov.w		&0x0000,ICCR(%a6)
	mov.w		&0x0000,%cc
	movm.l		&0x7fff,IREGS(%a6)

	cmp2.w		%a1,DATA(%a6)

	mov.w		%cc,SCCR(%a6)
	movm.l		&0x7fff,SREGS(%a6)

	bsr.l		chkregs
	tst.b		%d0
	bne.l		error

cmp2_11:
	addq.l		&0x1,TESTCTR(%a6)

	movm.l		DEF_REGS(%pc),&0x3fff

	mov.l		&0x2000a000,DATA(%a6)
	mov.l		&0x11111000,%d1

	mov.w		&0x0001,ICCR(%a6)
	mov.w		&0x0000,%cc
	movm.l		&0x7fff,IREGS(%a6)

	cmp2.w		%d1,DATA(%a6)

	mov.w		%cc,SCCR(%a6)
	movm.l		&0x7fff,SREGS(%a6)

	bsr.l		chkregs
	tst.b		%d0
	bne.l		error

cmp2_12:
	addq.l		&0x1,TESTCTR(%a6)

	movm.l		DEF_REGS(%pc),&0x3fff

	mov.l		&0x2000a000,DATA(%a6)
	mov.l		&0xffffb000,%a1

	mov.w		&0x0001,ICCR(%a6)
	mov.w		&0x0000,%cc
	movm.l		&0x7fff,IREGS(%a6)

	cmp2.w		%a1,DATA(%a6)

	mov.w		%cc,SCCR(%a6)
	movm.l		&0x7fff,SREGS(%a6)

	bsr.l		chkregs
	tst.b		%d0
	bne.l		error

# unsigned - large,large
cmp2_13:
	addq.l		&0x1,TESTCTR(%a6)

	movm.l		DEF_REGS(%pc),&0x3fff

	mov.l		&0xa0000000,DATA(%a6)
	mov.l		&0xc0000000,DATA+0x4(%a6)
	mov.l		&0xa0000000,%d1

	mov.w		&0x000c,ICCR(%a6)
	mov.w		&0x0008,%cc
	movm.l		&0x7fff,IREGS(%a6)

	cmp2.l		%d1,DATA(%a6)

	mov.w		%cc,SCCR(%a6)
	movm.l		&0x7fff,SREGS(%a6)

	bsr.l		chkregs
	tst.b		%d0
	bne.l		error

cmp2_14:
	addq.l		&0x1,TESTCTR(%a6)

	movm.l		DEF_REGS(%pc),&0x3fff

	mov.l		&0xa0000000,DATA(%a6)
	mov.l		&0xc0000000,DATA+0x4(%a6)
	mov.l		&0xc0000000,%a1

	mov.w		&0x000c,ICCR(%a6)
	mov.w		&0x0008,%cc
	movm.l		&0x7fff,IREGS(%a6)

	cmp2.l		%a1,DATA(%a6)

	mov.w		%cc,SCCR(%a6)
	movm.l		&0x7fff,SREGS(%a6)

	bsr.l		chkregs
	tst.b		%d0
	bne.l		error

cmp2_15:
	addq.l		&0x1,TESTCTR(%a6)

	movm.l		DEF_REGS(%pc),&0x3fff

	mov.l		&0xa0000000,DATA(%a6)
	mov.l		&0xc0000000,DATA+0x4(%a6)
	mov.l		&0xb0000000,%d1

	mov.w		&0x0008,ICCR(%a6)
	mov.w		&0x0008,%cc
	movm.l		&0x7fff,IREGS(%a6)

	chk2.l		DATA(%a6),%d1

	mov.w		%cc,SCCR(%a6)
	movm.l		&0x7fff,SREGS(%a6)

	bsr.l		chkregs
	tst.b		%d0
	bne.l		error

cmp2_16:
	addq.l		&0x1,TESTCTR(%a6)

	movm.l		DEF_REGS(%pc),&0x3fff

	mov.l		&0xa0000000,DATA(%a6)
	mov.l		&0xc0000000,DATA+0x4(%a6)
	mov.l		&0x10000000,%a1

	mov.w		&0x0009,ICCR(%a6)
	mov.w		&0x0008,%cc
	movm.l		&0x7fff,IREGS(%a6)

	cmp2.l		%a1,DATA(%a6)

	mov.w		%cc,SCCR(%a6)
	movm.l		&0x7fff,SREGS(%a6)

	bsr.l		chkregs
	tst.b		%d0
	bne.l		error

cmp2_17:
	addq.l		&0x1,TESTCTR(%a6)

	movm.l		DEF_REGS(%pc),&0x3fff

	mov.l		&0xa0000000,DATA(%a6)
	mov.l		&0xc0000000,DATA+0x4(%a6)
	mov.l		&0x90000000,%d1

	mov.w		&0x0009,ICCR(%a6)
	mov.w		&0x0008,%cc
	movm.l		&0x7fff,IREGS(%a6)

	cmp2.l		%d1,DATA(%a6)

	mov.w		%cc,SCCR(%a6)
	movm.l		&0x7fff,SREGS(%a6)

	bsr.l		chkregs
	tst.b		%d0
	bne.l		error

cmp2_18:
	addq.l		&0x1,TESTCTR(%a6)

	movm.l		DEF_REGS(%pc),&0x3fff

	mov.l		&0xa0000000,DATA(%a6)
	mov.l		&0xc0000000,DATA+0x4(%a6)
	mov.l		&0xd0000000,%a1

	mov.w		&0x0009,ICCR(%a6)
	mov.w		&0x0008,%cc
	movm.l		&0x7fff,IREGS(%a6)

	cmp2.l		%a1,DATA(%a6)

	mov.w		%cc,SCCR(%a6)
	movm.l		&0x7fff,SREGS(%a6)

	bsr.l		chkregs
	tst.b		%d0
	bne.l		error

# signed - negative,positive
cmp2_19:
	addq.l		&0x1,TESTCTR(%a6)

	movm.l		DEF_REGS(%pc),&0x3fff

	mov.w		&0xa040,DATA(%a6)
	mov.l		&0x111111a0,%d1

	mov.w		&0x0004,ICCR(%a6)
	mov.w		&0x0000,%cc
	movm.l		&0x7fff,IREGS(%a6)

	cmp2.b		%d1,DATA(%a6)

	mov.w		%cc,SCCR(%a6)
	movm.l		&0x7fff,SREGS(%a6)

	bsr.l		chkregs
	tst.b		%d0
	bne.l		error

cmp2_20:
	addq.l		&0x1,TESTCTR(%a6)

	movm.l		DEF_REGS(%pc),&0x3fff

	mov.w		&0xa040,DATA(%a6)
	mov.l		&0x00000040,%a1

	mov.w		&0x0004,ICCR(%a6)
	mov.w		&0x0000,%cc
	movm.l		&0x7fff,IREGS(%a6)

	chk2.b		DATA(%a6),%a1

	mov.w		%cc,SCCR(%a6)
	movm.l		&0x7fff,SREGS(%a6)

	bsr.l		chkregs
	tst.b		%d0
	bne.l		error

cmp2_21:
	addq.l		&0x1,TESTCTR(%a6)

	movm.l		DEF_REGS(%pc),&0x3fff

	mov.w		&0xa040,DATA(%a6)
	mov.l		&0x111111b0,%d1

	mov.w		&0x0000,ICCR(%a6)
	mov.w		&0x0000,%cc
	movm.l		&0x7fff,IREGS(%a6)

	cmp2.b		%d1,DATA(%a6)

	mov.w		%cc,SCCR(%a6)
	movm.l		&0x7fff,SREGS(%a6)

	bsr.l		chkregs
	tst.b		%d0
	bne.l		error

cmp2_22:
	addq.l		&0x1,TESTCTR(%a6)

	movm.l		DEF_REGS(%pc),&0x3fff

	mov.w		&0xa040,DATA(%a6)
	mov.l		&0x00000010,%a1

	mov.w		&0x0000,ICCR(%a6)
	mov.w		&0x0000,%cc
	movm.l		&0x7fff,IREGS(%a6)

	cmp2.b		%a1,DATA(%a6)

	mov.w		%cc,SCCR(%a6)
	movm.l		&0x7fff,SREGS(%a6)

	bsr.l		chkregs
	tst.b		%d0
	bne.l		error

cmp2_23:
	addq.l		&0x1,TESTCTR(%a6)

	movm.l		DEF_REGS(%pc),&0x3fff

	mov.w		&0xa040,DATA(%a6)
	mov.l		&0x11111190,%d1

	mov.w		&0x0001,ICCR(%a6)
	mov.w		&0x0000,%cc
	movm.l		&0x7fff,IREGS(%a6)

	cmp2.b		%d1,DATA(%a6)

	mov.w		%cc,SCCR(%a6)
	movm.l		&0x7fff,SREGS(%a6)

	bsr.l		chkregs
	tst.b		%d0
	bne.l		error

cmp2_24:
	addq.l		&0x1,TESTCTR(%a6)

	movm.l		DEF_REGS(%pc),&0x3fff

	mov.w		&0xa040,DATA(%a6)
	mov.l		&0x00000050,%a1

	mov.w		&0x0001,ICCR(%a6)
	mov.w		&0x0000,%cc
	movm.l		&0x7fff,IREGS(%a6)

	cmp2.b		%a1,DATA(%a6)

	mov.w		%cc,SCCR(%a6)
	movm.l		&0x7fff,SREGS(%a6)

	bsr.l		chkregs
	tst.b		%d0
	bne.l		error

# signed - negative,negative
cmp2_25:
	addq.l		&0x1,TESTCTR(%a6)

	movm.l		DEF_REGS(%pc),&0x3fff

	mov.w		&0xa0c0,DATA(%a6)
	mov.l		&0x111111a0,%d1

	mov.w		&0x0004,ICCR(%a6)
	mov.w		&0x0000,%cc
	movm.l		&0x7fff,IREGS(%a6)

	cmp2.b		%d1,DATA(%a6)

	mov.w		%cc,SCCR(%a6)
	movm.l		&0x7fff,SREGS(%a6)

	bsr.l		chkregs
	tst.b		%d0
	bne.l		error

cmp2_26:
	addq.l		&0x1,TESTCTR(%a6)

	movm.l		DEF_REGS(%pc),&0x3fff

	mov.w		&0xa0c0,DATA(%a6)
	mov.l		&0xffffffc0,%a1

	mov.w		&0x0004,ICCR(%a6)
	mov.w		&0x0000,%cc
	movm.l		&0x7fff,IREGS(%a6)

	cmp2.b		%a1,DATA(%a6)

	mov.w		%cc,SCCR(%a6)
	movm.l		&0x7fff,SREGS(%a6)

	bsr.l		chkregs
	tst.b		%d0
	bne.l		error

cmp2_27:
	addq.l		&0x1,TESTCTR(%a6)

	movm.l		DEF_REGS(%pc),&0x3fff

	mov.w		&0xa0c0,DATA(%a6)
	mov.l		&0x111111b0,%d1

	mov.w		&0x0000,ICCR(%a6)
	mov.w		&0x0000,%cc
	movm.l		&0x7fff,IREGS(%a6)

	chk2.b		DATA(%a6),%d1

	mov.w		%cc,SCCR(%a6)
	movm.l		&0x7fff,SREGS(%a6)

	bsr.l		chkregs
	tst.b		%d0
	bne.l		error

cmp2_28:
	addq.l		&0x1,TESTCTR(%a6)

	movm.l		DEF_REGS(%pc),&0x3fff

	mov.w		&0xa0c0,DATA(%a6)
	mov.l		&0x11111190,%a1

	mov.w		&0x0001,ICCR(%a6)
	mov.w		&0x0000,%cc
	movm.l		&0x7fff,IREGS(%a6)

	cmp2.b		%a1,DATA(%a6)

	mov.w		%cc,SCCR(%a6)
	movm.l		&0x7fff,SREGS(%a6)

	bsr.l		chkregs
	tst.b		%d0
	bne.l		error

cmp2_29:
	addq.l		&0x1,TESTCTR(%a6)

	movm.l		DEF_REGS(%pc),&0x3fff

	mov.w		&0xa0c0,DATA(%a6)
	mov.l		&0x111111d0,%d1

	mov.w		&0x0001,ICCR(%a6)
	mov.w		&0x0000,%cc
	movm.l		&0x7fff,IREGS(%a6)

	cmp2.b		%d1,DATA(%a6)

	mov.w		%cc,SCCR(%a6)
	movm.l		&0x7fff,SREGS(%a6)

	bsr.l		chkregs
	tst.b		%d0
	bne.l		error

cmp2_30:
	addq.l		&0x1,TESTCTR(%a6)

	movm.l		DEF_REGS(%pc),&0x3fff

	mov.w		&0xa0c0,DATA(%a6)
	mov.l		&0x00000050,%a1

	mov.w		&0x001b,ICCR(%a6)
	mov.w		&0x001f,%cc
	movm.l		&0x7fff,IREGS(%a6)

	cmp2.b		%a1,DATA(%a6)

	mov.w		%cc,SCCR(%a6)
	movm.l		&0x7fff,SREGS(%a6)

	bsr.l		chkregs
	tst.b		%d0
	bne.l		error

	mov.l		TESTCTR(%a6),%d1
	clr.l		%d0
	rts

###########################################################

ea_str:
	string		"\tEffective addresses..."

	align		0x4
ea_0:
	addq.l		&0x1,TESTCTR(%a6)

	movm.l		DEF_REGS(%pc),&0x3fff

	clr.l		%d2
	mov.l		&0x00000002,%d3
	lea		EAMEM(%a6),%a0

	mov.w		&0x0000,ICCR(%a6)
	mov.w		&0x0000,%cc
	movm.l		&0xffff,IREGS(%a6)

	mulu.l		(%a0),%d2:%d3

	mov.w		%cc,SCCR(%a6)
	movm.l		&0xffff,SREGS(%a6)
	mov.l		&0x00000004,IREGS+0xc(%a6)

	bsr.l		chkregs
	tst.b		%d0
	bne.l		error

ea_1:
	addq.l		&0x1,TESTCTR(%a6)

	movm.l		DEF_REGS(%pc),&0x3fff

	clr.l		%d2
	mov.l		&0x00000002,%d3
	lea		EAMEM(%a6),%a0

	mov.w		&0x0000,ICCR(%a6)
	mov.w		&0x0000,%cc
	movm.l		&0xffff,IREGS(%a6)

	mulu.l		(%a0)+,%d2:%d3

	mov.w		%cc,SCCR(%a6)
	movm.l		&0xffff,SREGS(%a6)
	mov.l		&0x00000004,IREGS+0xc(%a6)
	lea		EAMEM+0x4(%a6),%a0
	mov.l		%a0,IREGS+0x20(%a6)

	bsr.l		chkregs
	tst.b		%d0
	bne.l		error

ea_2:
	addq.l		&0x1,TESTCTR(%a6)

	movm.l		DEF_REGS(%pc),&0x3fff
	clr.l		%d2
	mov.l		&0x00000002,%d3
	lea		EAMEM+0x4(%a6),%a0

	mov.w		&0x0000,ICCR(%a6)
	mov.w		&0x0000,%cc
	movm.l		&0xffff,IREGS(%a6)

	mulu.l		-(%a0),%d2:%d3

	mov.w		%cc,SCCR(%a6)
	movm.l		&0xffff,SREGS(%a6)
	mov.l		&0x00000004,IREGS+0xc(%a6)
	lea		EAMEM(%a6),%a0
	mov.l		%a0,IREGS+0x20(%a6)

	bsr.l		chkregs
	tst.b		%d0
	bne.l		error

ea_3:
	addq.l		&0x1,TESTCTR(%a6)

	movm.l		DEF_REGS(%pc),&0x3fff

	clr.l		%d2
	mov.l		&0x00000002,%d3
	lea		EAMEM+0x1000(%a6),%a0

	mov.w		&0x0000,ICCR(%a6)
	mov.w		&0x0000,%cc
	movm.l		&0xffff,IREGS(%a6)

	mulu.l		(-0x1000,%a0),%d2:%d3

	mov.w		%cc,SCCR(%a6)
	movm.l		&0xffff,SREGS(%a6)
	mov.l		&0x00000004,IREGS+0xc(%a6)

	bsr.l		chkregs
	tst.b		%d0
	bne.l		error

ea_4:
	addq.l		&0x1,TESTCTR(%a6)

	movm.l		DEF_REGS(%pc),&0x3fff

	clr.l		%d2
	mov.l		&0x00000002,%d3
	lea		EAMEM-0x1000(%a6),%a0

	mov.w		&0x0000,ICCR(%a6)
	mov.w		&0x0000,%cc
	movm.l		&0xffff,IREGS(%a6)

	mulu.l		(0x1000,%a0),%d2:%d3

	mov.w		%cc,SCCR(%a6)
	movm.l		&0xffff,SREGS(%a6)
	mov.l		&0x00000004,IREGS+0xc(%a6)

	bsr.l		chkregs
	tst.b		%d0
	bne.l		error

ea_5:
	addq.l		&0x1,TESTCTR(%a6)

#	movm.l		DEF_REGS(%pc),&0x3fff

#	clr.l		%d2
#	mov.l		&0x00000002,%d3

#	mov.w		&0x0000,ICCR(%a6)
#	mov.w		&0x0000,%cc
#	movm.l		&0xffff,IREGS(%a6)

#	mulu.l		EAMEM.w,%d2:%d3

#	mov.w		%cc,SCCR(%a6)
#	movm.l		&0xffff,SREGS(%a6)
#	mov.l		&0x00000004,IREGS+0xc(%a6)

#	bsr.l		chkregs
#	tst.b		%d0
#	bne.l		error

ea_6:
	addq.l		&0x1,TESTCTR(%a6)

#	movm.l		DEF_REGS(%pc),&0x3fff

#	clr.l		%d2
#	mov.l		&0x00000002,%d3

#	mov.w		&0x0000,ICCR(%a6)
#	mov.w		&0x0000,%cc
#	movm.l		&0xffff,IREGS(%a6)

#	mulu.l		EAMEM.l,%d2:%d3

#	mov.w		%cc,SCCR(%a6)
#	movm.l		&0xffff,SREGS(%a6)
#	mov.l		&0x00000004,IREGS+0xc(%a6)

#	bsr.l		chkregs
#	tst.b		%d0
#	bne.l		error

ea_7:
	addq.l		&0x1,TESTCTR(%a6)

	movm.l		DEF_REGS(%pc),&0x3fff

	clr.l		%d2
	mov.l		&0x00000002,%d3

	mov.w		&0x0000,ICCR(%a6)
	mov.w		&0x0000,%cc
	movm.l		&0xffff,IREGS(%a6)

	mulu.l		&0x00000002,%d2:%d3

	mov.w		%cc,SCCR(%a6)
	movm.l		&0xffff,SREGS(%a6)
	mov.l		&0x00000004,IREGS+0xc(%a6)

	bsr.l		chkregs
	tst.b		%d0
	bne.l		error

ea_8:
	addq.l		&0x1,TESTCTR(%a6)

	bra.b		ea_8_next
ea_8_mem:
	long		0x00000002
ea_8_next:
	movm.l		DEF_REGS(%pc),&0x3fff

	clr.l		%d2
	mov.l		&0x00000002,%d3

	mov.w		&0x0000,ICCR(%a6)
	mov.w		&0x0000,%cc
	movm.l		&0xffff,IREGS(%a6)

	mulu.l		(ea_8_mem.w,%pc),%d2:%d3

	mov.w		%cc,SCCR(%a6)
	movm.l		&0xffff,SREGS(%a6)
	mov.l		&0x00000004,IREGS+0xc(%a6)

	bsr.l		chkregs
	tst.b		%d0
	bne.l		error

ea_9:
	addq.l		&0x1,TESTCTR(%a6)

	movm.l		DEF_REGS(%pc),&0x3fff
	clr.l		%d2
	mov.l		&0x00000002,%d3
	lea		EAMEM+0x4(%a6),%a1

	mov.w		&0x0000,ICCR(%a6)
	mov.w		&0x0000,%cc
	movm.l		&0xffff,IREGS(%a6)

	mulu.l		-(%a1),%d2:%d3

	mov.w		%cc,SCCR(%a6)
	movm.l		&0xffff,SREGS(%a6)
	mov.l		&0x00000004,IREGS+0xc(%a6)
	lea		EAMEM(%a6),%a0
	mov.l		%a0,IREGS+0x24(%a6)

	bsr.l		chkregs
	tst.b		%d0
	bne.l		error

ea_10:
	addq.l		&0x1,TESTCTR(%a6)

	movm.l		DEF_REGS(%pc),&0x3fff
	clr.l		%d2
	mov.l		&0x00000002,%d3
	lea		EAMEM+0x4(%a6),%a2

	mov.w		&0x0000,ICCR(%a6)
	mov.w		&0x0000,%cc
	movm.l		&0xffff,IREGS(%a6)

	mulu.l		-(%a2),%d2:%d3

	mov.w		%cc,SCCR(%a6)
	movm.l		&0xffff,SREGS(%a6)
	mov.l		&0x00000004,IREGS+0xc(%a6)
	lea		EAMEM(%a6),%a0
	mov.l		%a0,IREGS+0x28(%a6)

	bsr.l		chkregs
	tst.b		%d0
	bne.l		error

ea_11:
	addq.l		&0x1,TESTCTR(%a6)

	movm.l		DEF_REGS(%pc),&0x3fff
	clr.l		%d2
	mov.l		&0x00000002,%d3
	lea		EAMEM+0x4(%a6),%a3

	mov.w		&0x0000,ICCR(%a6)
	mov.w		&0x0000,%cc
	movm.l		&0xffff,IREGS(%a6)

	mulu.l		-(%a3),%d2:%d3

	mov.w		%cc,SCCR(%a6)
	movm.l		&0xffff,SREGS(%a6)
	mov.l		&0x00000004,IREGS+0xc(%a6)
	lea		EAMEM(%a6),%a0
	mov.l		%a0,IREGS+0x2c(%a6)

	bsr.l		chkregs
	tst.b		%d0
	bne.l		error

ea_12:
	addq.l		&0x1,TESTCTR(%a6)

	movm.l		DEF_REGS(%pc),&0x3fff
	clr.l		%d2
	mov.l		&0x00000002,%d3
	lea		EAMEM+0x4(%a6),%a4

	mov.w		&0x0000,ICCR(%a6)
	mov.w		&0x0000,%cc
	movm.l		&0xffff,IREGS(%a6)

	mulu.l		-(%a4),%d2:%d3

	mov.w		%cc,SCCR(%a6)
	movm.l		&0xffff,SREGS(%a6)
	mov.l		&0x00000004,IREGS+0xc(%a6)
	lea		EAMEM(%a6),%a0
	mov.l		%a0,IREGS+0x30(%a6)

	bsr.l		chkregs
	tst.b		%d0
	bne.l		error

ea_13:
	addq.l		&0x1,TESTCTR(%a6)

	movm.l		DEF_REGS(%pc),&0x3fff
	clr.l		%d2
	mov.l		&0x00000002,%d3
	lea		EAMEM+0x4(%a6),%a5

	mov.w		&0x0000,ICCR(%a6)
	mov.w		&0x0000,%cc
	movm.l		&0xffff,IREGS(%a6)

	mulu.l		-(%a5),%d2:%d3

	mov.w		%cc,SCCR(%a6)
	movm.l		&0xffff,SREGS(%a6)
	mov.l		&0x00000004,IREGS+0xc(%a6)
	lea		EAMEM(%a6),%a0
	mov.l		%a0,IREGS+0x34(%a6)

	bsr.l		chkregs
	tst.b		%d0
	bne.l		error

ea_14:
	addq.l		&0x1,TESTCTR(%a6)

	movm.l		DEF_REGS(%pc),&0x3fff

	mov.l		%a6,%a1

	clr.l		%d2
	mov.l		&0x00000002,%d3
	lea		EAMEM+0x4(%a1),%a6

	mov.w		&0x0000,ICCR(%a1)
	mov.w		&0x0000,%cc
	movm.l		&0xffff,IREGS(%a1)

	mulu.l		-(%a6),%d2:%d3

	mov.w		%cc,SCCR(%a1)
	movm.l		&0xffff,SREGS(%a1)
	mov.l		&0x00000004,IREGS+0xc(%a1)
	lea		EAMEM(%a1),%a0
	mov.l		%a0,IREGS+0x38(%a1)

	mov.l		%a1,%a6

	bsr.l		chkregs
	tst.b		%d0
	bne.l		error

ea_15:
	addq.l		&0x1,TESTCTR(%a6)

	movm.l		DEF_REGS(%pc),&0x3fff
	clr.l		%d2
	mov.l		&0x00000002,%d3
	mov.l		%a7,%a0
	lea		EAMEM+0x4(%a6),%a7

	mov.w		&0x0000,ICCR(%a6)
	mov.w		&0x0000,%cc
	movm.l		&0xffff,IREGS(%a6)

	mulu.l		-(%a7),%d2:%d3

	mov.w		%cc,SCCR(%a6)
	movm.l		&0xffff,SREGS(%a6)
	mov.l		&0x00000004,IREGS+0xc(%a6)
	lea		EAMEM(%a6),%a1
	mov.l		%a1,IREGS+0x3c(%a6)

	mov.l		%a0,%a7
	bsr.l		chkregs
	tst.b		%d0
	bne.l		error

ea_16:
	addq.l		&0x1,TESTCTR(%a6)

	movm.l		DEF_REGS(%pc),&0x3fff

	clr.l		%d2
	mov.l		&0x00000002,%d3
	lea		EAMEM(%a6),%a0
	mov.l		&-0x10,%d4

	mov.w		&0x0000,ICCR(%a6)
	mov.w		&0x0000,%cc
	movm.l		&0xffff,IREGS(%a6)

	mulu.l		(0x10.b,%a0,%d4.w*1),%d2:%d3

	mov.w		%cc,SCCR(%a6)
	movm.l		&0xffff,SREGS(%a6)
	mov.l		&0x00000004,IREGS+0xc(%a6)

	bsr.l		chkregs
	tst.b		%d0
	bne.l		error

ea_17:
	addq.l		&0x1,TESTCTR(%a6)

	movm.l		DEF_REGS(%pc),&0x3fff

	clr.l		%d2
	mov.l		&0x00000002,%d3
	lea		EAMEM(%a6),%a0
	mov.l		&-0x8,%d4

	mov.w		&0x0000,ICCR(%a6)
	mov.w		&0x0000,%cc
	movm.l		&0xffff,IREGS(%a6)

	mulu.l		(0x10.b,%a0,%d4.w*2),%d2:%d3

	mov.w		%cc,SCCR(%a6)
	movm.l		&0xffff,SREGS(%a6)
	mov.l		&0x00000004,IREGS+0xc(%a6)

	bsr.l		chkregs
	tst.b		%d0
	bne.l		error

ea_18:
	addq.l		&0x1,TESTCTR(%a6)

	movm.l		DEF_REGS(%pc),&0x3fff

	clr.l		%d2
	mov.l		&0x00000002,%d3
	lea		EAMEM(%a6),%a0
	mov.l		&-0x4,%d4

	mov.w		&0x0000,ICCR(%a6)
	mov.w		&0x0000,%cc
	movm.l		&0xffff,IREGS(%a6)

	mulu.l		(0x10.b,%a0,%d4.w*4),%d2:%d3

	mov.w		%cc,SCCR(%a6)
	movm.l		&0xffff,SREGS(%a6)
	mov.l		&0x00000004,IREGS+0xc(%a6)

	bsr.l		chkregs
	tst.b		%d0
	bne.l		error

ea_19:
	addq.l		&0x1,TESTCTR(%a6)

	movm.l		DEF_REGS(%pc),&0x3fff

	clr.l		%d2
	mov.l		&0x00000002,%d3
	lea		EAMEM(%a6),%a0
	mov.l		&-0x2,%d4

	mov.w		&0x0000,ICCR(%a6)
	mov.w		&0x0000,%cc
	movm.l		&0xffff,IREGS(%a6)

	mulu.l		(0x10.b,%a0,%d4.w*8),%d2:%d3

	mov.w		%cc,SCCR(%a6)
	movm.l		&0xffff,SREGS(%a6)
	mov.l		&0x00000004,IREGS+0xc(%a6)

	bsr.l		chkregs
	tst.b		%d0
	bne.l		error

ea_20:
	addq.l		&0x1,TESTCTR(%a6)

	movm.l		DEF_REGS(%pc),&0x3fff

	clr.l		%d2
	mov.l		&0x00000002,%d3
	lea		EAMEM(%a6),%a0
	mov.l		&-0x10,%d4

	mov.w		&0x0000,ICCR(%a6)
	mov.w		&0x0000,%cc
	movm.l		&0xffff,IREGS(%a6)

	mulu.l		(0x10.b,%a0,%d4.l*1),%d2:%d3

	mov.w		%cc,SCCR(%a6)
	movm.l		&0xffff,SREGS(%a6)
	mov.l		&0x00000004,IREGS+0xc(%a6)

	bsr.l		chkregs
	tst.b		%d0
	bne.l		error

ea_21:
	addq.l		&0x1,TESTCTR(%a6)

	movm.l		DEF_REGS(%pc),&0x3fff

	clr.l		%d2
	mov.l		&0x00000002,%d3
	lea		EAMEM(%a6),%a0
	mov.l		&-0x8,%d4

	mov.w		&0x0000,ICCR(%a6)
	mov.w		&0x0000,%cc
	movm.l		&0xffff,IREGS(%a6)

	mulu.l		(0x10.b,%a0,%d4.l*2),%d2:%d3

	mov.w		%cc,SCCR(%a6)
	movm.l		&0xffff,SREGS(%a6)
	mov.l		&0x00000004,IREGS+0xc(%a6)

	bsr.l		chkregs
	tst.b		%d0
	bne.l		error

ea_22:
	addq.l		&0x1,TESTCTR(%a6)

	movm.l		DEF_REGS(%pc),&0x3fff

	clr.l		%d2
	mov.l		&0x00000002,%d3
	lea		EAMEM(%a6),%a0
	mov.l		&-0x4,%d4

	mov.w		&0x0000,ICCR(%a6)
	mov.w		&0x0000,%cc
	movm.l		&0xffff,IREGS(%a6)

	mulu.l		(0x10.b,%a0,%d4.l*4),%d2:%d3

	mov.w		%cc,SCCR(%a6)
	movm.l		&0xffff,SREGS(%a6)
	mov.l		&0x00000004,IREGS+0xc(%a6)

	bsr.l		chkregs
	tst.b		%d0
	bne.l		error

ea_23:
	addq.l		&0x1,TESTCTR(%a6)

	movm.l		DEF_REGS(%pc),&0x3fff

	clr.l		%d2
	mov.l		&0x00000002,%d3
	lea		EAMEM(%a6),%a0
	mov.l		&-0x2,%d4

	mov.w		&0x0000,ICCR(%a6)
	mov.w		&0x0000,%cc
	movm.l		&0xffff,IREGS(%a6)

	mulu.l		(0x10.b,%a0,%d4.l*8),%d2:%d3

	mov.w		%cc,SCCR(%a6)
	movm.l		&0xffff,SREGS(%a6)
	mov.l		&0x00000004,IREGS+0xc(%a6)

	bsr.l		chkregs
	tst.b		%d0
	bne.l		error

ea_24:
	addq.l		&0x1,TESTCTR(%a6)

	movm.l		DEF_REGS(%pc),&0x3fff

	clr.l		%d2
	mov.l		&0x00000002,%d3
	lea		EAMEM(%a6),%a0
	mov.l		&-0x2,%a4

	mov.w		&0x0000,ICCR(%a6)
	mov.w		&0x0000,%cc
	movm.l		&0xffff,IREGS(%a6)

	mulu.l		(0x10.b,%a0,%a4.l*8),%d2:%d3

	mov.w		%cc,SCCR(%a6)
	movm.l		&0xffff,SREGS(%a6)
	mov.l		&0x00000004,IREGS+0xc(%a6)

	bsr.l		chkregs
	tst.b		%d0
	bne.l		error

ea_25:
	addq.l		&0x1,TESTCTR(%a6)

	movm.l		DEF_REGS(%pc),&0x3fff

	clr.l		%d2
	mov.l		&0x00000002,%d3
	lea		EAMEM(%a6),%a0
	mov.l		&0x2,%a4

	mov.w		&0x0000,ICCR(%a6)
	mov.w		&0x0000,%cc
	movm.l		&0xffff,IREGS(%a6)

	mulu.l		(-0x10.b,%a0,%a4.l*8),%d2:%d3

	mov.w		%cc,SCCR(%a6)
	movm.l		&0xffff,SREGS(%a6)
	mov.l		&0x00000004,IREGS+0xc(%a6)

	bsr.l		chkregs
	tst.b		%d0
	bne.l		error

ea_26:
	addq.l		&0x1,TESTCTR(%a6)

	movm.l		DEF_REGS(%pc),&0x3fff

	clr.l		%d2
	mov.l		&0x00000002,%d3
	lea		EAMEM(%a6),%a1
	mov.l		&-0x10,%d4

	mov.w		&0x0000,ICCR(%a6)
	mov.w		&0x0000,%cc
	movm.l		&0xffff,IREGS(%a6)

	mulu.l		(0x10.b,%a1,%d4.w*1),%d2:%d3

	mov.w		%cc,SCCR(%a6)
	movm.l		&0xffff,SREGS(%a6)
	mov.l		&0x00000004,IREGS+0xc(%a6)

	bsr.l		chkregs
	tst.b		%d0
	bne.l		error

ea_27:
	addq.l		&0x1,TESTCTR(%a6)

	movm.l		DEF_REGS(%pc),&0x3fff

	clr.l		%d2
	mov.l		&0x00000002,%d3
	lea		EAMEM(%a6),%a2
	mov.l		&-0x10,%d4

	mov.w		&0x0000,ICCR(%a6)
	mov.w		&0x0000,%cc
	movm.l		&0xffff,IREGS(%a6)

	mulu.l		(0x10.b,%a2,%d4.w*1),%d2:%d3

	mov.w		%cc,SCCR(%a6)
	movm.l		&0xffff,SREGS(%a6)
	mov.l		&0x00000004,IREGS+0xc(%a6)

	bsr.l		chkregs
	tst.b		%d0
	bne.l		error

ea_28:
	addq.l		&0x1,TESTCTR(%a6)

	movm.l		DEF_REGS(%pc),&0x3fff

	clr.l		%d2
	mov.l		&0x00000002,%d3
	lea		EAMEM(%a6),%a3
	mov.l		&-0x10,%d4

	mov.w		&0x0000,ICCR(%a6)
	mov.w		&0x0000,%cc
	movm.l		&0xffff,IREGS(%a6)

	mulu.l		(0x10.b,%a3,%d4.w*1),%d2:%d3

	mov.w		%cc,SCCR(%a6)
	movm.l		&0xffff,SREGS(%a6)
	mov.l		&0x00000004,IREGS+0xc(%a6)

	bsr.l		chkregs
	tst.b		%d0
	bne.l		error

ea_29:
	addq.l		&0x1,TESTCTR(%a6)

	movm.l		DEF_REGS(%pc),&0x3fff

	clr.l		%d2
	mov.l		&0x00000002,%d3
	lea		EAMEM(%a6),%a4
	mov.l		&-0x10,%d4

	mov.w		&0x0000,ICCR(%a6)
	mov.w		&0x0000,%cc
	movm.l		&0xffff,IREGS(%a6)

	mulu.l		(0x10.b,%a4,%d4.w*1),%d2:%d3

	mov.w		%cc,SCCR(%a6)
	movm.l		&0xffff,SREGS(%a6)
	mov.l		&0x00000004,IREGS+0xc(%a6)

	bsr.l		chkregs
	tst.b		%d0
	bne.l		error

ea_30:
	addq.l		&0x1,TESTCTR(%a6)

	movm.l		DEF_REGS(%pc),&0x3fff

	clr.l		%d2
	mov.l		&0x00000002,%d3
	lea		EAMEM(%a6),%a5
	mov.l		&-0x10,%d4

	mov.w		&0x0000,ICCR(%a6)
	mov.w		&0x0000,%cc
	movm.l		&0xffff,IREGS(%a6)

	mulu.l		(0x10.b,%a5,%d4.w*1),%d2:%d3

	mov.w		%cc,SCCR(%a6)
	movm.l		&0xffff,SREGS(%a6)
	mov.l		&0x00000004,IREGS+0xc(%a6)

	bsr.l		chkregs
	tst.b		%d0
	bne.l		error

ea_31:
	addq.l		&0x1,TESTCTR(%a6)

	movm.l		DEF_REGS(%pc),&0x3fff

	mov.l		%a6,%a1

	clr.l		%d2
	mov.l		&0x00000002,%d3
	lea		EAMEM(%a1),%a6
	mov.l		&-0x10,%d4

	mov.w		&0x0000,ICCR(%a1)
	mov.w		&0x0000,%cc
	movm.l		&0xffff,IREGS(%a1)

	mulu.l		(0x10.b,%a6,%d4.w*1),%d2:%d3

	mov.w		%cc,SCCR(%a1)
	movm.l		&0xffff,SREGS(%a1)
	mov.l		&0x00000004,IREGS+0xc(%a1)

	mov.l		%a1,%a6

	bsr.l		chkregs
	tst.b		%d0
	bne.l		error

ea_32:
	addq.l		&0x1,TESTCTR(%a6)

	movm.l		DEF_REGS(%pc),&0x3fff

	clr.l		%d2
	mov.l		&0x00000002,%d3
	mov.l		%a7,%a0
	lea		EAMEM(%a6),%a7
	mov.l		&-0x10,%d4

	mov.w		&0x0000,ICCR(%a6)
	mov.w		&0x0000,%cc
	movm.l		&0xffff,IREGS(%a6)

	mulu.l		(0x10.b,%a7,%d4.w*1),%d2:%d3

	mov.w		%cc,SCCR(%a6)
	movm.l		&0xffff,SREGS(%a6)
	mov.l		&0x00000004,IREGS+0xc(%a6)

	mov.l		%a0,%a7
	bsr.l		chkregs
	tst.b		%d0
	bne.l		error

ea_33:
	addq.l		&0x1,TESTCTR(%a6)

	movm.l		DEF_REGS(%pc),&0x3fff

	clr.l		%d2
	mov.l		&0x00000002,%d3
	lea		EAMEM(%a6),%a1

	mov.w		&0x0000,ICCR(%a6)
	mov.w		&0x0000,%cc
	movm.l		&0xffff,IREGS(%a6)

	mulu.l		(%a1),%d2:%d3

	mov.w		%cc,SCCR(%a6)
	movm.l		&0xffff,SREGS(%a6)
	mov.l		&0x00000004,IREGS+0xc(%a6)

	bsr.l		chkregs
	tst.b		%d0
	bne.l		error

ea_34:
	addq.l		&0x1,TESTCTR(%a6)

	movm.l		DEF_REGS(%pc),&0x3fff

	clr.l		%d2
	mov.l		&0x00000002,%d3
	lea		EAMEM(%a6),%a2

	mov.w		&0x0000,ICCR(%a6)
	mov.w		&0x0000,%cc
	movm.l		&0xffff,IREGS(%a6)

	mulu.l		(%a2),%d2:%d3

	mov.w		%cc,SCCR(%a6)
	movm.l		&0xffff,SREGS(%a6)
	mov.l		&0x00000004,IREGS+0xc(%a6)

	bsr.l		chkregs
	tst.b		%d0
	bne.l		error

ea_35:
	addq.l		&0x1,TESTCTR(%a6)

	movm.l		DEF_REGS(%pc),&0x3fff

	clr.l		%d2
	mov.l		&0x00000002,%d3
	lea		EAMEM(%a6),%a3

	mov.w		&0x0000,ICCR(%a6)
	mov.w		&0x0000,%cc
	movm.l		&0xffff,IREGS(%a6)

	mulu.l		(%a3),%d2:%d3

	mov.w		%cc,SCCR(%a6)
	movm.l		&0xffff,SREGS(%a6)
	mov.l		&0x00000004,IREGS+0xc(%a6)

	bsr.l		chkregs
	tst.b		%d0
	bne.l		error

ea_36:
	addq.l		&0x1,TESTCTR(%a6)

	movm.l		DEF_REGS(%pc),&0x3fff

	clr.l		%d2
	mov.l		&0x00000002,%d3
	lea		EAMEM(%a6),%a4

	mov.w		&0x0000,ICCR(%a6)
	mov.w		&0x0000,%cc
	movm.l		&0xffff,IREGS(%a6)

	mulu.l		(%a4),%d2:%d3

	mov.w		%cc,SCCR(%a6)
	movm.l		&0xffff,SREGS(%a6)
	mov.l		&0x00000004,IREGS+0xc(%a6)

	bsr.l		chkregs
	tst.b		%d0
	bne.l		error

ea_37:
	addq.l		&0x1,TESTCTR(%a6)

	movm.l		DEF_REGS(%pc),&0x3fff

	clr.l		%d2
	mov.l		&0x00000002,%d3
	lea		EAMEM(%a6),%a5

	mov.w		&0x0000,ICCR(%a6)
	mov.w		&0x0000,%cc
	movm.l		&0xffff,IREGS(%a6)

	mulu.l		(%a5),%d2:%d3

	mov.w		%cc,SCCR(%a6)
	movm.l		&0xffff,SREGS(%a6)
	mov.l		&0x00000004,IREGS+0xc(%a6)

	bsr.l		chkregs
	tst.b		%d0
	bne.l		error

ea_38:
	addq.l		&0x1,TESTCTR(%a6)

	movm.l		DEF_REGS(%pc),&0x3fff

	mov.l		%a6,%a1

	clr.l		%d2
	mov.l		&0x00000002,%d3
	lea		EAMEM(%a1),%a6

	mov.w		&0x0000,ICCR(%a1)
	mov.w		&0x0000,%cc
	movm.l		&0xffff,IREGS(%a1)

	mulu.l		(%a6),%d2:%d3

	mov.w		%cc,SCCR(%a1)
	movm.l		&0xffff,SREGS(%a1)
	mov.l		&0x00000004,IREGS+0xc(%a1)

	mov.l		%a1,%a6

	bsr.l		chkregs
	tst.b		%d0
	bne.l		error

ea_39:
	addq.l		&0x1,TESTCTR(%a6)

	movm.l		DEF_REGS(%pc),&0x3fff

	clr.l		%d2
	mov.l		&0x00000002,%d3
	mov.l		%a7,%a0
	lea		EAMEM(%a6),%a7

	mov.w		&0x0000,ICCR(%a6)
	mov.w		&0x0000,%cc
	movm.l		&0xffff,IREGS(%a6)

	mulu.l		(%a7),%d2:%d3

	mov.w		%cc,SCCR(%a6)
	movm.l		&0xffff,SREGS(%a6)
	mov.l		&0x00000004,IREGS+0xc(%a6)

	mov.l		%a0,%a7
	bsr.l		chkregs
	tst.b		%d0
	bne.l		error

ea_40:
	addq.l		&0x1,TESTCTR(%a6)

	movm.l		DEF_REGS(%pc),&0x3fff

	clr.l		%d2
	mov.l		&0x00000002,%d3
	lea		EAMEM(%a6),%a1

	mov.w		&0x0000,ICCR(%a6)
	mov.w		&0x0000,%cc
	movm.l		&0xffff,IREGS(%a6)

	mulu.l		(%a1)+,%d2:%d3

	mov.w		%cc,SCCR(%a6)
	movm.l		&0xffff,SREGS(%a6)
	mov.l		&0x00000004,IREGS+0xc(%a6)
	lea		EAMEM+0x4(%a6),%a0
	mov.l		%a0,IREGS+0x24(%a6)

	bsr.l		chkregs
	tst.b		%d0
	bne.l		error

ea_41:
	addq.l		&0x1,TESTCTR(%a6)

	movm.l		DEF_REGS(%pc),&0x3fff

	clr.l		%d2
	mov.l		&0x00000002,%d3
	lea		EAMEM(%a6),%a2

	mov.w		&0x0000,ICCR(%a6)
	mov.w		&0x0000,%cc
	movm.l		&0xffff,IREGS(%a6)

	mulu.l		(%a2)+,%d2:%d3

	mov.w		%cc,SCCR(%a6)
	movm.l		&0xffff,SREGS(%a6)
	mov.l		&0x00000004,IREGS+0xc(%a6)
	lea		EAMEM+0x4(%a6),%a0
	mov.l		%a0,IREGS+0x28(%a6)

	bsr.l		chkregs
	tst.b		%d0
	bne.l		error

ea_42:
	addq.l		&0x1,TESTCTR(%a6)

	movm.l		DEF_REGS(%pc),&0x3fff

	clr.l		%d2
	mov.l		&0x00000002,%d3
	lea		EAMEM(%a6),%a3

	mov.w		&0x0000,ICCR(%a6)
	mov.w		&0x0000,%cc
	movm.l		&0xffff,IREGS(%a6)

	mulu.l		(%a3)+,%d2:%d3

	mov.w		%cc,SCCR(%a6)
	movm.l		&0xffff,SREGS(%a6)
	mov.l		&0x00000004,IREGS+0xc(%a6)
	lea		EAMEM+0x4(%a6),%a0
	mov.l		%a0,IREGS+0x2c(%a6)

	bsr.l		chkregs
	tst.b		%d0
	bne.l		error

ea_43:
	addq.l		&0x1,TESTCTR(%a6)

	movm.l		DEF_REGS(%pc),&0x3fff

	clr.l		%d2
	mov.l		&0x00000002,%d3
	lea		EAMEM(%a6),%a4

	mov.w		&0x0000,ICCR(%a6)
	mov.w		&0x0000,%cc
	movm.l		&0xffff,IREGS(%a6)

	mulu.l		(%a4)+,%d2:%d3

	mov.w		%cc,SCCR(%a6)
	movm.l		&0xffff,SREGS(%a6)
	mov.l		&0x00000004,IREGS+0xc(%a6)
	lea		EAMEM+0x4(%a6),%a0
	mov.l		%a0,IREGS+0x30(%a6)

	bsr.l		chkregs
	tst.b		%d0
	bne.l		error

ea_44:
	addq.l		&0x1,TESTCTR(%a6)

	movm.l		DEF_REGS(%pc),&0x3fff

	clr.l		%d2
	mov.l		&0x00000002,%d3
	lea		EAMEM(%a6),%a5

	mov.w		&0x0000,ICCR(%a6)
	mov.w		&0x0000,%cc
	movm.l		&0xffff,IREGS(%a6)

	mulu.l		(%a5)+,%d2:%d3

	mov.w		%cc,SCCR(%a6)
	movm.l		&0xffff,SREGS(%a6)
	mov.l		&0x00000004,IREGS+0xc(%a6)
	lea		EAMEM+0x4(%a6),%a0
	mov.l		%a0,IREGS+0x34(%a6)

	bsr.l		chkregs
	tst.b		%d0
	bne.l		error

ea_45:
	addq.l		&0x1,TESTCTR(%a6)

	movm.l		DEF_REGS(%pc),&0x3fff

	mov.l		%a6,%a1

	clr.l		%d2
	mov.l		&0x00000002,%d3
	lea		EAMEM(%a1),%a6

	mov.w		&0x0000,ICCR(%a1)
	mov.w		&0x0000,%cc
	movm.l		&0xffff,IREGS(%a1)

	mulu.l		(%a6)+,%d2:%d3

	mov.w		%cc,SCCR(%a1)
	movm.l		&0xffff,SREGS(%a1)
	mov.l		&0x00000004,IREGS+0xc(%a1)
	lea		EAMEM+0x4(%a1),%a0
	mov.l		%a0,IREGS+0x38(%a1)

	mov.l		%a1,%a6

	bsr.l		chkregs
	tst.b		%d0
	bne.l		error

ea_46:
	addq.l		&0x1,TESTCTR(%a6)

	movm.l		DEF_REGS(%pc),&0x3fff

	clr.l		%d2
	mov.l		&0x00000002,%d3
	mov.l		%a7,%a0
	lea		EAMEM(%a6),%a7

	mov.w		&0x0000,ICCR(%a6)
	mov.w		&0x0000,%cc
	movm.l		&0xffff,IREGS(%a6)

	mulu.l		(%a7)+,%d2:%d3

	mov.w		%cc,SCCR(%a6)
	movm.l		&0xffff,SREGS(%a6)
	mov.l		&0x00000004,IREGS+0xc(%a6)
	lea		EAMEM+0x4(%a6),%a1
	mov.l		%a1,IREGS+0x3c(%a6)

	mov.l		%a0,%a7
	bsr.l		chkregs
	tst.b		%d0
	bne.l		error

ea_47:
	addq.l		&0x1,TESTCTR(%a6)

	movm.l		DEF_REGS(%pc),&0x3fff

	clr.l		%d2
	mov.l		&0x00000002,%d3
	lea		EAMEM-0x1000(%a6),%a1

	mov.w		&0x0000,ICCR(%a6)
	mov.w		&0x0000,%cc
	movm.l		&0xffff,IREGS(%a6)

	mulu.l		(0x1000,%a1),%d2:%d3

	mov.w		%cc,SCCR(%a6)
	movm.l		&0xffff,SREGS(%a6)
	mov.l		&0x00000004,IREGS+0xc(%a6)

	bsr.l		chkregs
	tst.b		%d0
	bne.l		error

ea_48:
	addq.l		&0x1,TESTCTR(%a6)

	movm.l		DEF_REGS(%pc),&0x3fff

	clr.l		%d2
	mov.l		&0x00000002,%d3
	lea		EAMEM-0x1000(%a6),%a2

	mov.w		&0x0000,ICCR(%a6)
	mov.w		&0x0000,%cc
	movm.l		&0xffff,IREGS(%a6)

	mulu.l		(0x1000,%a2),%d2:%d3

	mov.w		%cc,SCCR(%a6)
	movm.l		&0xffff,SREGS(%a6)
	mov.l		&0x00000004,IREGS+0xc(%a6)

	bsr.l		chkregs
	tst.b		%d0
	bne.l		error

ea_49:
	addq.l		&0x1,TESTCTR(%a6)

	movm.l		DEF_REGS(%pc),&0x3fff

	clr.l		%d2
	mov.l		&0x00000002,%d3
	lea		EAMEM-0x1000(%a6),%a3

	mov.w		&0x0000,ICCR(%a6)
	mov.w		&0x0000,%cc
	movm.l		&0xffff,IREGS(%a6)

	mulu.l		(0x1000,%a3),%d2:%d3

	mov.w		%cc,SCCR(%a6)
	movm.l		&0xffff,SREGS(%a6)
	mov.l		&0x00000004,IREGS+0xc(%a6)

	bsr.l		chkregs
	tst.b		%d0
	bne.l		error

ea_50:
	addq.l		&0x1,TESTCTR(%a6)

	movm.l		DEF_REGS(%pc),&0x3fff

	clr.l		%d2
	mov.l		&0x00000002,%d3
	lea		EAMEM-0x1000(%a6),%a4

	mov.w		&0x0000,ICCR(%a6)
	mov.w		&0x0000,%cc
	movm.l		&0xffff,IREGS(%a6)

	mulu.l		(0x1000,%a4),%d2:%d3

	mov.w		%cc,SCCR(%a6)
	movm.l		&0xffff,SREGS(%a6)
	mov.l		&0x00000004,IREGS+0xc(%a6)

	bsr.l		chkregs
	tst.b		%d0
	bne.l		error

ea_51:
	addq.l		&0x1,TESTCTR(%a6)

	movm.l		DEF_REGS(%pc),&0x3fff

	clr.l		%d2
	mov.l		&0x00000002,%d3
	lea		EAMEM-0x1000(%a6),%a5

	mov.w		&0x0000,ICCR(%a6)
	mov.w		&0x0000,%cc
	movm.l		&0xffff,IREGS(%a6)

	mulu.l		(0x1000,%a5),%d2:%d3

	mov.w		%cc,SCCR(%a6)
	movm.l		&0xffff,SREGS(%a6)
	mov.l		&0x00000004,IREGS+0xc(%a6)

	bsr.l		chkregs
	tst.b		%d0
	bne.l		error

ea_52:
	addq.l		&0x1,TESTCTR(%a6)

	movm.l		DEF_REGS(%pc),&0x3fff

	mov.l		%a6,%a1

	clr.l		%d2
	mov.l		&0x00000002,%d3
	lea		EAMEM-0x1000(%a1),%a6

	mov.w		&0x0000,ICCR(%a1)
	mov.w		&0x0000,%cc
	movm.l		&0xffff,IREGS(%a1)

	mulu.l		(0x1000,%a6),%d2:%d3

	mov.w		%cc,SCCR(%a1)
	movm.l		&0xffff,SREGS(%a1)
	mov.l		&0x00000004,IREGS+0xc(%a1)

	mov.l		%a1,%a6

	bsr.l		chkregs
	tst.b		%d0
	bne.l		error

ea_53:
	addq.l		&0x1,TESTCTR(%a6)

	movm.l		DEF_REGS(%pc),&0x3fff

	clr.l		%d2
	mov.l		&0x00000002,%d3
	mov.l		%a7,%a0
	lea		EAMEM-0x1000(%a6),%a7

	mov.w		&0x0000,ICCR(%a6)
	mov.w		&0x0000,%cc
	movm.l		&0xffff,IREGS(%a6)

	mulu.l		(0x1000,%a7),%d2:%d3

	mov.w		%cc,SCCR(%a6)
	movm.l		&0xffff,SREGS(%a6)
	mov.l		&0x00000004,IREGS+0xc(%a6)

	mov.l		%a0,%a7
	bsr.l		chkregs
	tst.b		%d0
	bne.l		error

ea_54:
	addq.l		&0x1,TESTCTR(%a6)

	movm.l		DEF_REGS(%pc),&0x3fff

	clr.l		%d2
	mov.l		&0x00000002,%d3
	lea		EAMEM+0x1000(%a6),%a0

	mov.w		&0x0000,ICCR(%a6)
	mov.w		&0x0000,%cc
	movm.l		&0xffff,IREGS(%a6)

	mulu.l		(-0x1000,%a0),%d2:%d3

	mov.w		%cc,SCCR(%a6)
	movm.l		&0xffff,SREGS(%a6)
	mov.l		&0x00000004,IREGS+0xc(%a6)

	bsr.l		chkregs
	tst.b		%d0
	bne.l		error

ea_55:
	addq.l		&0x1,TESTCTR(%a6)

	bra.b		ea_55_next

ea_55_data:
	long		0x00000002
ea_55_next:
	movm.l		DEF_REGS(%pc),&0x3fff

	clr.l		%d2
	mov.l		&0x00000002,%d3

	mov.w		&0x0000,ICCR(%a6)
	mov.w		&0x0000,%cc
	movm.l		&0xffff,IREGS(%a6)

	mulu.l		(ea_55_data.w,%pc),%d2:%d3

	mov.w		%cc,SCCR(%a6)
	movm.l		&0xffff,SREGS(%a6)
	mov.l		&0x00000004,IREGS+0xc(%a6)

	bsr.l		chkregs
	tst.b		%d0
	bne.l		error

ea_56:
	addq.l		&0x1,TESTCTR(%a6)

	movm.l		DEF_REGS(%pc),&0x3fff

	clr.l		%d2
	mov.l		&0x00000002,%d3
	lea		EAMEM(%a6),%a3
	mov.l		&-0x10,%d4

	mov.w		&0x0000,ICCR(%a6)
	mov.w		&0x0000,%cc
	movm.l		&0xffff,IREGS(%a6)

	mulu.l		(0x10.w,%a3,%d4.w*1),%d2:%d3

	mov.w		%cc,SCCR(%a6)
	movm.l		&0xffff,SREGS(%a6)
	mov.l		&0x00000004,IREGS+0xc(%a6)

	bsr.l		chkregs
	tst.b		%d0
	bne.l		error

ea_57:
	addq.l		&0x1,TESTCTR(%a6)

	movm.l		DEF_REGS(%pc),&0x3fff

	clr.l		%d2
	mov.l		&0x00000002,%d3
	lea		EAMEM(%a6),%a3
	mov.l		&-0x8,%d4

	mov.w		&0x0000,ICCR(%a6)
	mov.w		&0x0000,%cc
	movm.l		&0xffff,IREGS(%a6)

	mulu.l		(0x10.w,%a3,%d4.w*2),%d2:%d3

	mov.w		%cc,SCCR(%a6)
	movm.l		&0xffff,SREGS(%a6)
	mov.l		&0x00000004,IREGS+0xc(%a6)

	bsr.l		chkregs
	tst.b		%d0
	bne.l		error

ea_58:
	addq.l		&0x1,TESTCTR(%a6)

	movm.l		DEF_REGS(%pc),&0x3fff

	clr.l		%d2
	mov.l		&0x00000002,%d3
	lea		EAMEM(%a6),%a3
	mov.l		&-0x4,%d4

	mov.w		&0x0000,ICCR(%a6)
	mov.w		&0x0000,%cc
	movm.l		&0xffff,IREGS(%a6)

	mulu.l		(0x10.w,%a3,%d4.w*4),%d2:%d3

	mov.w		%cc,SCCR(%a6)
	movm.l		&0xffff,SREGS(%a6)
	mov.l		&0x00000004,IREGS+0xc(%a6)

	bsr.l		chkregs
	tst.b		%d0
	bne.l		error

ea_59:
	addq.l		&0x1,TESTCTR(%a6)

	movm.l		DEF_REGS(%pc),&0x3fff

	clr.l		%d2
	mov.l		&0x00000002,%d3
	lea		EAMEM(%a6),%a3
	mov.l		&-0x2,%d4

	mov.w		&0x0000,ICCR(%a6)
	mov.w		&0x0000,%cc
	movm.l		&0xffff,IREGS(%a6)

	mulu.l		(0x10.w,%a3,%d4.w*8),%d2:%d3

	mov.w		%cc,SCCR(%a6)
	movm.l		&0xffff,SREGS(%a6)
	mov.l		&0x00000004,IREGS+0xc(%a6)

	bsr.l		chkregs
	tst.b		%d0
	bne.l		error

ea_60:
	addq.l		&0x1,TESTCTR(%a6)

	movm.l		DEF_REGS(%pc),&0x3fff

	clr.l		%d2
	mov.l		&0x00000002,%d3
	lea		EAMEM(%a6),%a3
	mov.l		&-0x10,%d4

	mov.w		&0x0000,ICCR(%a6)
	mov.w		&0x0000,%cc
	movm.l		&0xffff,IREGS(%a6)

	mulu.l		(0x10.w,%a3,%d4.l*1),%d2:%d3

	mov.w		%cc,SCCR(%a6)
	movm.l		&0xffff,SREGS(%a6)
	mov.l		&0x00000004,IREGS+0xc(%a6)

	bsr.l		chkregs
	tst.b		%d0
	bne.l		error

ea_61:
	addq.l		&0x1,TESTCTR(%a6)

	movm.l		DEF_REGS(%pc),&0x3fff

	clr.l		%d2
	mov.l		&0x00000002,%d3
	lea		EAMEM(%a6),%a3
	mov.l		&-0x8,%d4

	mov.w		&0x0000,ICCR(%a6)
	mov.w		&0x0000,%cc
	movm.l		&0xffff,IREGS(%a6)

	mulu.l		(0x10.w,%a3,%d4.l*2),%d2:%d3

	mov.w		%cc,SCCR(%a6)
	movm.l		&0xffff,SREGS(%a6)
	mov.l		&0x00000004,IREGS+0xc(%a6)

	bsr.l		chkregs
	tst.b		%d0
	bne.l		error

ea_62:
	addq.l		&0x1,TESTCTR(%a6)

	movm.l		DEF_REGS(%pc),&0x3fff

	clr.l		%d2
	mov.l		&0x00000002,%d3
	lea		EAMEM(%a6),%a3
	mov.l		&-0x4,%d4

	mov.w		&0x0000,ICCR(%a6)
	mov.w		&0x0000,%cc
	movm.l		&0xffff,IREGS(%a6)

	mulu.l		(0x10.w,%a3,%d4.l*4),%d2:%d3

	mov.w		%cc,SCCR(%a6)
	movm.l		&0xffff,SREGS(%a6)
	mov.l		&0x00000004,IREGS+0xc(%a6)

	bsr.l		chkregs
	tst.b		%d0
	bne.l		error

ea_63:
	addq.l		&0x1,TESTCTR(%a6)

	movm.l		DEF_REGS(%pc),&0x3fff

	clr.l		%d2
	mov.l		&0x00000002,%d3
	lea		EAMEM(%a6),%a3
	mov.l		&-0x2,%d4

	mov.w		&0x0000,ICCR(%a6)
	mov.w		&0x0000,%cc
	movm.l		&0xffff,IREGS(%a6)

	mulu.l		(0x10.w,%a3,%d4.l*8),%d2:%d3

	mov.w		%cc,SCCR(%a6)
	movm.l		&0xffff,SREGS(%a6)
	mov.l		&0x00000004,IREGS+0xc(%a6)

	bsr.l		chkregs
	tst.b		%d0
	bne.l		error

ea_64:
	addq.l		&0x1,TESTCTR(%a6)

	movm.l		DEF_REGS(%pc),&0x3fff

	clr.l		%d2
	mov.l		&0x00000002,%d3
	lea		EAMEM(%a6),%a3
	mov.l		&0x2,%a4

	mov.w		&0x0000,ICCR(%a6)
	mov.w		&0x0000,%cc
	movm.l		&0xffff,IREGS(%a6)

	mulu.l		(-0x10.w,%a3,%a4.l*8),%d2:%d3

	mov.w		%cc,SCCR(%a6)
	movm.l		&0xffff,SREGS(%a6)
	mov.l		&0x00000004,IREGS+0xc(%a6)

	bsr.l		chkregs
	tst.b		%d0
	bne.l		error

ea_65:
	addq.l		&0x1,TESTCTR(%a6)

	movm.l		DEF_REGS(%pc),&0x3fff

	clr.l		%d2
	mov.l		&0x00000002,%d3
	lea		EAMEM(%a6),%a3
	mov.l		&0x2,%a4

	mov.w		&0x0000,ICCR(%a6)
	mov.w		&0x0000,%cc
	movm.l		&0xffff,IREGS(%a6)

	mulu.l		(0x00.w,%a3,%za4.l*8),%d2:%d3

	mov.w		%cc,SCCR(%a6)
	movm.l		&0xffff,SREGS(%a6)
	mov.l		&0x00000004,IREGS+0xc(%a6)

	bsr.l		chkregs
	tst.b		%d0
	bne.l		error

ea_66:
	addq.l		&0x1,TESTCTR(%a6)

	movm.l		DEF_REGS(%pc),&0x3fff

	clr.l		%d2
	mov.l		&0x00000002,%d3
	lea		EAMEM(%a6),%a3
	mov.l		%a3,%a4
	add.l		&0x10,%a4

	mov.w		&0x0000,ICCR(%a6)
	mov.w		&0x0000,%cc
	movm.l		&0xffff,IREGS(%a6)

	mulu.l		(-0x10.w,%za3,%a4.l*1),%d2:%d3

	mov.w		%cc,SCCR(%a6)
	movm.l		&0xffff,SREGS(%a6)
	mov.l		&0x00000004,IREGS+0xc(%a6)

	bsr.l		chkregs
	tst.b		%d0
	bne.l		error

ea_67:
	addq.l		&0x1,TESTCTR(%a6)

	movm.l		DEF_REGS(%pc),&0x3fff

	clr.l		%d2
	mov.l		&0x00000002,%d3
	lea		EAMEM(%a6),%a3
	mov.l		&0x2,%a4

	mov.w		&0x0000,ICCR(%a6)
	mov.w		&0x0000,%cc
	movm.l		&0xffff,IREGS(%a6)

	mulu.l		(-0x10.l,%a3,%a4.l*8),%d2:%d3

	mov.w		%cc,SCCR(%a6)
	movm.l		&0xffff,SREGS(%a6)
	mov.l		&0x00000004,IREGS+0xc(%a6)

	bsr.l		chkregs
	tst.b		%d0
	bne.l		error

ea_68:
	addq.l		&0x1,TESTCTR(%a6)

	bra.b		ea_68_next
ea_68_mem:
	long		0x00000002
ea_68_next:
	movm.l		DEF_REGS(%pc),&0x3fff

	clr.l		%d2
	mov.l		&0x00000002,%d3
	lea		EAMEM(%a6),%a3
	mov.l		&-0x10,%d4

	mov.w		&0x0000,ICCR(%a6)
	mov.w		&0x0000,%cc
	movm.l		&0xffff,IREGS(%a6)

	mulu.l		(ea_68_mem+0x10.w,%pc,%d4.w*1),%d2:%d3

	mov.w		%cc,SCCR(%a6)
	movm.l		&0xffff,SREGS(%a6)
	mov.l		&0x00000004,IREGS+0xc(%a6)

	bsr.l		chkregs
	tst.b		%d0
	bne.l		error

ea_69:
	addq.l		&0x1,TESTCTR(%a6)

	bra.b		ea_69_next
ea_69_mem:
	long		0x00000002
ea_69_next:
	movm.l		DEF_REGS(%pc),&0x3fff

	clr.l		%d2
	mov.l		&0x00000002,%d3
	lea		EAMEM(%a6),%a0
	mov.l		&-0x8,%d4

	mov.w		&0x0000,ICCR(%a6)
	mov.w		&0x0000,%cc
	movm.l		&0x7fff,IREGS(%a6)

	mulu.l		(ea_69_mem+0x10.w,%pc,%d4.w*2),%d2:%d3

	mov.w		%cc,SCCR(%a6)
	movm.l		&0x7fff,SREGS(%a6)
	mov.l		&0x00000004,IREGS+0xc(%a6)

	bsr.l		chkregs
	tst.b		%d0
	bne.l		error

ea_70:
	addq.l		&0x1,TESTCTR(%a6)

	bra.b		ea_70_next
ea_70_mem:
	long		0x00000002
ea_70_next:
	movm.l		DEF_REGS(%pc),&0x3fff

	clr.l		%d2
	mov.l		&0x00000002,%d3
	lea		EAMEM(%a6),%a0
	mov.l		&-0x4,%d4

	mov.w		&0x0000,ICCR(%a6)
	mov.w		&0x0000,%cc
	movm.l		&0x7fff,IREGS(%a6)

	mulu.l		(ea_70_mem+0x10.w,%pc,%d4.w*4),%d2:%d3

	mov.w		%cc,SCCR(%a6)
	movm.l		&0x7fff,SREGS(%a6)
	mov.l		&0x00000004,IREGS+0xc(%a6)

	bsr.l		chkregs
	tst.b		%d0
	bne.l		error

ea_71:
	addq.l		&0x1,TESTCTR(%a6)

	bra.b		ea_71_next
ea_71_mem:
	long		0x00000002
ea_71_next:
	movm.l		DEF_REGS(%pc),&0x3fff

	clr.l		%d2
	mov.l		&0x00000002,%d3
	lea		EAMEM(%a6),%a0
	mov.l		&-0x2,%d4

	mov.w		&0x0000,ICCR(%a6)
	mov.w		&0x0000,%cc
	movm.l		&0x7fff,IREGS(%a6)

	mulu.l		(ea_71_mem+0x10.w,%pc,%d4.w*8),%d2:%d3

	mov.w		%cc,SCCR(%a6)
	movm.l		&0x7fff,SREGS(%a6)
	mov.l		&0x00000004,IREGS+0xc(%a6)

	bsr.l		chkregs
	tst.b		%d0
	bne.l		error

ea_72:
	addq.l		&0x1,TESTCTR(%a6)

	bra.b		ea_72_next
ea_72_mem:
	long		0x00000002
ea_72_next:
	movm.l		DEF_REGS(%pc),&0x3fff

	clr.l		%d2
	mov.l		&0x00000002,%d3
	lea		EAMEM(%a6),%a0
	mov.l		&-0x10,%d4

	mov.w		&0x0000,ICCR(%a6)
	mov.w		&0x0000,%cc
	movm.l		&0x7fff,IREGS(%a6)

	mulu.l		(ea_72_mem+0x10.w,%pc,%d4.l*1),%d2:%d3

	mov.w		%cc,SCCR(%a6)
	movm.l		&0x7fff,SREGS(%a6)
	mov.l		&0x00000004,IREGS+0xc(%a6)

	bsr.l		chkregs
	tst.b		%d0
	bne.l		error

ea_73:
	addq.l		&0x1,TESTCTR(%a6)

	bra.b		ea_73_next
ea_73_mem:
	long		0x00000002
ea_73_next:
	movm.l		DEF_REGS(%pc),&0x3fff

	clr.l		%d2
	mov.l		&0x00000002,%d3
	lea		EAMEM(%a6),%a0
	mov.l		&-0x8,%d4

	mov.w		&0x0000,ICCR(%a6)
	mov.w		&0x0000,%cc
	movm.l		&0x7fff,IREGS(%a6)

	mulu.l		(ea_73_mem+0x10.w,%pc,%d4.l*2),%d2:%d3

	mov.w		%cc,SCCR(%a6)
	movm.l		&0x7fff,SREGS(%a6)
	mov.l		&0x00000004,IREGS+0xc(%a6)

	bsr.l		chkregs
	tst.b		%d0
	bne.l		error

ea_74:
	addq.l		&0x1,TESTCTR(%a6)

	bra.b		ea_74_next
ea_74_mem:
	long		0x00000002
ea_74_next:
	movm.l		DEF_REGS(%pc),&0x3fff

	clr.l		%d2
	mov.l		&0x00000002,%d3
	lea		EAMEM(%a6),%a0
	mov.l		&-0x4,%d4

	mov.w		&0x0000,ICCR(%a6)
	mov.w		&0x0000,%cc
	movm.l		&0x7fff,IREGS(%a6)

	mulu.l		(ea_74_mem+0x10.w,%pc,%d4.l*4),%d2:%d3

	mov.w		%cc,SCCR(%a6)
	movm.l		&0x7fff,SREGS(%a6)
	mov.l		&0x00000004,IREGS+0xc(%a6)

	bsr.l		chkregs
	tst.b		%d0
	bne.l		error

ea_75:
	addq.l		&0x1,TESTCTR(%a6)

	bra.b		ea_75_next
ea_75_mem:
	long		0x00000002
ea_75_next:
	movm.l		DEF_REGS(%pc),&0x3fff

	clr.l		%d2
	mov.l		&0x00000002,%d3
	lea		EAMEM(%a6),%a0
	mov.l		&-0x2,%d4

	mov.w		&0x0000,ICCR(%a6)
	mov.w		&0x0000,%cc
	movm.l		&0x7fff,IREGS(%a6)

	mulu.l		(ea_75_mem+0x10.w,%pc,%d4.l*8),%d2:%d3

	mov.w		%cc,SCCR(%a6)
	movm.l		&0x7fff,SREGS(%a6)
	mov.l		&0x00000004,IREGS+0xc(%a6)

	bsr.l		chkregs
	tst.b		%d0
	bne.l		error

ea_76:
	addq.l		&0x1,TESTCTR(%a6)

	bra.b		ea_76_next
ea_76_mem:
	long		0x00000002
ea_76_next:
	movm.l		DEF_REGS(%pc),&0x3fff

	clr.l		%d2
	mov.l		&0x00000002,%d3
	lea		EAMEM(%a6),%a3
	mov.l		&-0x2,%a4

	mov.w		&0x0000,ICCR(%a6)
	mov.w		&0x0000,%cc
	movm.l		&0xffff,IREGS(%a6)

	mulu.l		(ea_76_mem+0x10.w,%pc,%a4.l*8),%d2:%d3

	mov.w		%cc,SCCR(%a6)
	movm.l		&0xffff,SREGS(%a6)
	mov.l		&0x00000004,IREGS+0xc(%a6)

	bsr.l		chkregs
	tst.b		%d0
	bne.l		error

ea_77:
	addq.l		&0x1,TESTCTR(%a6)

	bra.b		ea_77_next
ea_77_mem:
	long		0x00000002
ea_77_next:
	movm.l		DEF_REGS(%pc),&0x3fff

	clr.l		%d2
	mov.l		&0x00000002,%d3
	lea		EAMEM(%a6),%a3
	mov.l		&0x2,%a4

	mov.w		&0x0000,ICCR(%a6)
	mov.w		&0x0000,%cc
	movm.l		&0xffff,IREGS(%a6)

	mulu.l		(ea_77_mem+0x00.w,%pc,%za4.l*8),%d2:%d3

	mov.w		%cc,SCCR(%a6)
	movm.l		&0xffff,SREGS(%a6)
	mov.l		&0x00000004,IREGS+0xc(%a6)

	bsr.l		chkregs
	tst.b		%d0
	bne.l		error

ea_78:
	addq.l		&0x1,TESTCTR(%a6)

#	movm.l		DEF_REGS(%pc),&0x3fff

#	clr.l		%d2
#	mov.l		&0x00000002,%d3
#	lea		EAMEM,%a3
#	mov.l		%a3,%a4
#	add.l		&0x10,%a4

#	mov.w		&0x0000,ICCR(%a6)
#	mov.w		&0x0000,%cc
#	movm.l		&0xffff,IREGS(%a6)

#	mulu.l		(EAMEM-0x10.w,%zpc,%a4.l*1),%d2:%d3

#	mov.w		%cc,SCCR(%a6)
#	movm.l		&0xffff,SREGS(%a6)
#	mov.l		&0x00000004,IREGS+0xc(%a6)

#	bsr.l		chkregs
#	tst.b		%d0
#	bne.l		error

ea_79:
	addq.l		&0x1,TESTCTR(%a6)

	movm.l		DEF_REGS(%pc),&0x3fff

	clr.l		%d2
	mov.l		&0x00000002,%d3
	lea		EAMEM,%a3
	mov.l		&0x2,%a4

	mov.w		&0x0000,ICCR(%a6)
	mov.w		&0x0000,%cc
	movm.l		&0xffff,IREGS(%a6)

	mulu.l		(ea_79_mem-0x10.l,%pc,%a4.l*8),%d2:%d3

	mov.w		%cc,SCCR(%a6)
	movm.l		&0xffff,SREGS(%a6)
	mov.l		&0x00000004,IREGS+0xc(%a6)

	bra.b		ea_79_next
ea_79_mem:
	long		0x00000002
ea_79_next:

	bsr.l		chkregs
	tst.b		%d0
	bne.l		error

ea_80:
	addq.l		&0x1,TESTCTR(%a6)

	bra.b		ea_80_next
ea_80_mem:
	long		0x00000002
ea_80_next:
	movm.l		DEF_REGS(%pc),&0x3fff

	clr.l		%d2
	mov.l		&0x00000002,%d3
	lea		EAMEM(%a6),%a1
	mov.l		&-0x10,%d4

	mov.w		&0x0000,ICCR(%a6)
	mov.w		&0x0000,%cc
	movm.l		&0xffff,IREGS(%a6)

	mulu.l		(ea_80_mem+0x10.b,%pc,%d4.w*1),%d2:%d3

	mov.w		%cc,SCCR(%a6)
	movm.l		&0xffff,SREGS(%a6)
	mov.l		&0x00000004,IREGS+0xc(%a6)

	bsr.l		chkregs
	tst.b		%d0
	bne.l		error

ea_81:
	addq.l		&0x1,TESTCTR(%a6)

	bra.b		ea_81_next
ea_81_mem:
	long		0x00000002
ea_81_next:
	movm.l		DEF_REGS(%pc),&0x3fff

	clr.l		%d2
	mov.l		&0x00000002,%d3
	lea		EAMEM(%a6),%a0
	mov.l		&-0x8,%d4

	mov.w		&0x0000,ICCR(%a6)
	mov.w		&0x0000,%cc
	movm.l		&0xffff,IREGS(%a6)

	mulu.l		(ea_81_mem+0x10.b,%pc,%d4.w*2),%d2:%d3

	mov.w		%cc,SCCR(%a6)
	movm.l		&0xffff,SREGS(%a6)
	mov.l		&0x00000004,IREGS+0xc(%a6)

	bsr.l		chkregs
	tst.b		%d0
	bne.l		error

ea_82:
	addq.l		&0x1,TESTCTR(%a6)

	bra.b		ea_82_next
ea_82_mem:
	long		0x00000002
ea_82_next:
	movm.l		DEF_REGS(%pc),&0x3fff

	clr.l		%d2
	mov.l		&0x00000002,%d3
	lea		EAMEM(%a6),%a0
	mov.l		&-0x4,%d4

	mov.w		&0x0000,ICCR(%a6)
	mov.w		&0x0000,%cc
	movm.l		&0xffff,IREGS(%a6)

	mulu.l		(ea_82_mem+0x10.b,%pc,%d4.w*4),%d2:%d3

	mov.w		%cc,SCCR(%a6)
	movm.l		&0xffff,SREGS(%a6)
	mov.l		&0x00000004,IREGS+0xc(%a6)

	bsr.l		chkregs
	tst.b		%d0
	bne.l		error

ea_83:
	addq.l		&0x1,TESTCTR(%a6)

	bra.b		ea_83_next
ea_83_mem:
	long		0x00000002
ea_83_next:
	movm.l		DEF_REGS(%pc),&0x3fff

	clr.l		%d2
	mov.l		&0x00000002,%d3
	lea		EAMEM(%a6),%a0
	mov.l		&-0x2,%d4

	mov.w		&0x0000,ICCR(%a6)
	mov.w		&0x0000,%cc
	movm.l		&0xffff,IREGS(%a6)

	mulu.l		(ea_83_mem+0x10.b,%pc,%d4.w*8),%d2:%d3

	mov.w		%cc,SCCR(%a6)
	movm.l		&0xffff,SREGS(%a6)
	mov.l		&0x00000004,IREGS+0xc(%a6)

	bsr.l		chkregs
	tst.b		%d0
	bne.l		error

ea_84:
	addq.l		&0x1,TESTCTR(%a6)

	bra.b		ea_84_next
ea_84_mem:
	long		0x00000002
ea_84_next:
	movm.l		DEF_REGS(%pc),&0x3fff

	clr.l		%d2
	mov.l		&0x00000002,%d3
	lea		EAMEM(%a6),%a0
	mov.l		&-0x10,%d4

	mov.w		&0x0000,ICCR(%a6)
	mov.w		&0x0000,%cc
	movm.l		&0xffff,IREGS(%a6)

	mulu.l		(ea_84_mem+0x10.b,%pc,%d4.l*1),%d2:%d3

	mov.w		%cc,SCCR(%a6)
	movm.l		&0xffff,SREGS(%a6)
	mov.l		&0x00000004,IREGS+0xc(%a6)

	bsr.l		chkregs
	tst.b		%d0
	bne.l		error

ea_85:
	addq.l		&0x1,TESTCTR(%a6)

	bra.b		ea_85_next
ea_85_mem:
	long		0x00000002
ea_85_next:
	movm.l		DEF_REGS(%pc),&0x3fff

	clr.l		%d2
	mov.l		&0x00000002,%d3
	lea		EAMEM(%a6),%a0
	mov.l		&-0x8,%d4

	mov.w		&0x0000,ICCR(%a6)
	mov.w		&0x0000,%cc
	movm.l		&0xffff,IREGS(%a6)

	mulu.l		(ea_85_mem+0x10.b,%pc,%d4.l*2),%d2:%d3

	mov.w		%cc,SCCR(%a6)
	movm.l		&0xffff,SREGS(%a6)
	mov.l		&0x00000004,IREGS+0xc(%a6)

	bsr.l		chkregs
	tst.b		%d0
	bne.l		error

ea_86:
	addq.l		&0x1,TESTCTR(%a6)

	bra.b		ea_86_next
ea_86_mem:
	long		0x00000002
ea_86_next:
	movm.l		DEF_REGS(%pc),&0x3fff

	clr.l		%d2
	mov.l		&0x00000002,%d3
	lea		EAMEM(%a6),%a0
	mov.l		&-0x4,%d4

	mov.w		&0x0000,ICCR(%a6)
	mov.w		&0x0000,%cc
	movm.l		&0xffff,IREGS(%a6)

	mulu.l		(ea_86_mem+0x10.b,%pc,%d4.l*4),%d2:%d3

	mov.w		%cc,SCCR(%a6)
	movm.l		&0xffff,SREGS(%a6)
	mov.l		&0x00000004,IREGS+0xc(%a6)

	bsr.l		chkregs
	tst.b		%d0
	bne.l		error

ea_87:
	addq.l		&0x1,TESTCTR(%a6)

	bra.b		ea_87_next
ea_87_mem:
	long		0x00000002
ea_87_next:
	movm.l		DEF_REGS(%pc),&0x3fff

	clr.l		%d2
	mov.l		&0x00000002,%d3
	lea		EAMEM(%a6),%a0
	mov.l		&-0x2,%d4

	mov.w		&0x0000,ICCR(%a6)
	mov.w		&0x0000,%cc
	movm.l		&0xffff,IREGS(%a6)

	mulu.l		(ea_87_mem+0x10.b,%pc,%d4.l*8),%d2:%d3

	mov.w		%cc,SCCR(%a6)
	movm.l		&0xffff,SREGS(%a6)
	mov.l		&0x00000004,IREGS+0xc(%a6)

	bsr.l		chkregs
	tst.b		%d0
	bne.l		error

ea_88:
	addq.l		&0x1,TESTCTR(%a6)

	movm.l		DEF_REGS(%pc),&0x3fff

	clr.l		%d2
	mov.l		&0x00000002,%d3
	lea		EAMEM(%a6),%a0
	mov.l		&-0x2,%d4

	mov.w		&0x0000,ICCR(%a6)
	mov.w		&0x0000,%cc
	movm.l		&0xffff,IREGS(%a6)

	mulu.l		(ea_88_mem+0x10.b,%pc,%d4.l*8),%d2:%d3

	mov.w		%cc,SCCR(%a6)
	movm.l		&0xffff,SREGS(%a6)
	mov.l		&0x00000004,IREGS+0xc(%a6)

	bra.b		ea_88_next
ea_88_mem:
	long		0x00000002
ea_88_next:

	bsr.l		chkregs
	tst.b		%d0
	bne.l		error

ea_89:
	addq.l		&0x1,TESTCTR(%a6)

	movm.l		DEF_REGS(%pc),&0x3fff

	clr.l		%d2
	mov.l		&0x00000002,%d3
	lea		EAMEM-0x1000(%a6),%a3
	lea		EASTORE(%a6),%a4
	mov.l		%a3,(%a4)
	mov.l		&-0x10,%d4

	mov.w		&0x0000,ICCR(%a6)
	mov.w		&0x0000,%cc
	movm.l		&0xffff,IREGS(%a6)

	mulu.l		([0x10.w,%a4,%d4.w*1],0x1000.w),%d2:%d3

	mov.w		%cc,SCCR(%a6)
	movm.l		&0xffff,SREGS(%a6)
	mov.l		&0x00000004,IREGS+0xc(%a6)

	bsr.l		chkregs
	tst.b		%d0
	bne.l		error

ea_90:
	addq.l		&0x1,TESTCTR(%a6)

	movm.l		DEF_REGS(%pc),&0x3fff

	clr.l		%d2
	mov.l		&0x00000002,%d3
	lea		EAMEM-0x1000(%a6),%a3
	lea		EASTORE(%a6),%a4
	mov.l		%a3,(%a4)
	mov.l		&-0x8,%d4

	mov.w		&0x0000,ICCR(%a6)
	mov.w		&0x0000,%cc
	movm.l		&0xffff,IREGS(%a6)

	mulu.l		([0x10.w,%a4,%d4.w*2],0x1000.w),%d2:%d3

	mov.w		%cc,SCCR(%a6)
	movm.l		&0xffff,SREGS(%a6)
	mov.l		&0x00000004,IREGS+0xc(%a6)

	bsr.l		chkregs
	tst.b		%d0
	bne.l		error

ea_91:
	addq.l		&0x1,TESTCTR(%a6)

	movm.l		DEF_REGS(%pc),&0x3fff

	clr.l		%d2
	mov.l		&0x00000002,%d3
	lea		EAMEM-0x1000(%a6),%a3
	lea		EASTORE(%a6),%a4
	mov.l		%a3,(%a4)
	mov.l		&-0x4,%d4

	mov.w		&0x0000,ICCR(%a6)
	mov.w		&0x0000,%cc
	movm.l		&0xffff,IREGS(%a6)

	mulu.l		([0x10.w,%a4,%d4.w*4],0x1000.w),%d2:%d3

	mov.w		%cc,SCCR(%a6)
	movm.l		&0xffff,SREGS(%a6)
	mov.l		&0x00000004,IREGS+0xc(%a6)

	bsr.l		chkregs
	tst.b		%d0
	bne.l		error

ea_92:
	addq.l		&0x1,TESTCTR(%a6)

	movm.l		DEF_REGS(%pc),&0x3fff

	clr.l		%d2
	mov.l		&0x00000002,%d3
	lea		EAMEM-0x1000(%a6),%a3
	lea		EASTORE(%a6),%a4
	mov.l		%a3,(%a4)
	mov.l		&-0x2,%d4

	mov.w		&0x0000,ICCR(%a6)
	mov.w		&0x0000,%cc
	movm.l		&0xffff,IREGS(%a6)

	mulu.l		([0x10.w,%a4,%d4.w*8],0x1000.w),%d2:%d3

	mov.w		%cc,SCCR(%a6)
	movm.l		&0xffff,SREGS(%a6)
	mov.l		&0x00000004,IREGS+0xc(%a6)

	bsr.l		chkregs
	tst.b		%d0
	bne.l		error

ea_93:
	addq.l		&0x1,TESTCTR(%a6)

	movm.l		DEF_REGS(%pc),&0x3fff

	clr.l		%d2
	mov.l		&0x00000002,%d3
	lea		EAMEM-0x1000(%a6),%a3
	lea		EASTORE(%a6),%a4
	mov.l		%a3,(%a4)
	mov.l		&-0x10,%d4

	mov.w		&0x0000,ICCR(%a6)
	mov.w		&0x0000,%cc
	movm.l		&0xffff,IREGS(%a6)

	mulu.l		([0x10.w,%a4,%d4.l*1],0x1000.w),%d2:%d3

	mov.w		%cc,SCCR(%a6)
	movm.l		&0xffff,SREGS(%a6)
	mov.l		&0x00000004,IREGS+0xc(%a6)

	bsr.l		chkregs
	tst.b		%d0
	bne.l		error

ea_94:
	addq.l		&0x1,TESTCTR(%a6)

	movm.l		DEF_REGS(%pc),&0x3fff

	clr.l		%d2
	mov.l		&0x00000002,%d3
	lea		EAMEM-0x1000(%a6),%a3
	lea		EASTORE(%a6),%a4
	mov.l		%a3,(%a4)
	mov.l		&-0x8,%d4

	mov.w		&0x0000,ICCR(%a6)
	mov.w		&0x0000,%cc
	movm.l		&0xffff,IREGS(%a6)

	mulu.l		([0x10.w,%a4,%d4.l*2],0x1000.w),%d2:%d3

	mov.w		%cc,SCCR(%a6)
	movm.l		&0xffff,SREGS(%a6)
	mov.l		&0x00000004,IREGS+0xc(%a6)

	bsr.l		chkregs
	tst.b		%d0
	bne.l		error

ea_95:
	addq.l		&0x1,TESTCTR(%a6)

	movm.l		DEF_REGS(%pc),&0x3fff

	clr.l		%d2
	mov.l		&0x00000002,%d3
	lea		EAMEM-0x1000(%a6),%a3
	lea		EASTORE(%a6),%a4
	mov.l		%a3,(%a4)
	mov.l		&-0x4,%d4

	mov.w		&0x0000,ICCR(%a6)
	mov.w		&0x0000,%cc
	movm.l		&0xffff,IREGS(%a6)

	mulu.l		([0x10.w,%a4,%d4.l*4],0x1000.w),%d2:%d3

	mov.w		%cc,SCCR(%a6)
	movm.l		&0xffff,SREGS(%a6)
	mov.l		&0x00000004,IREGS+0xc(%a6)

	bsr.l		chkregs
	tst.b		%d0
	bne.l		error

ea_96:
	addq.l		&0x1,TESTCTR(%a6)

	movm.l		DEF_REGS(%pc),&0x3fff

	clr.l		%d2
	mov.l		&0x00000002,%d3
	lea		EAMEM-0x1000(%a6),%a3
	lea		EASTORE(%a6),%a4
	mov.l		%a3,(%a4)
	mov.l		&-0x2,%d4

	mov.w		&0x0000,ICCR(%a6)
	mov.w		&0x0000,%cc
	movm.l		&0xffff,IREGS(%a6)

	mulu.l		([0x10.w,%a4,%d4.l*8],0x1000.w),%d2:%d3

	mov.w		%cc,SCCR(%a6)
	movm.l		&0xffff,SREGS(%a6)
	mov.l		&0x00000004,IREGS+0xc(%a6)

	bsr.l		chkregs
	tst.b		%d0
	bne.l		error

ea_97:
	addq.l		&0x1,TESTCTR(%a6)

	movm.l		DEF_REGS(%pc),&0x3fff

	clr.l		%d2
	mov.l		&0x00000002,%d3
	lea		EAMEM-0x1000(%a6),%a3
	lea		EASTORE(%a6),%a4
	mov.l		%a3,(%a4)
	mov.l		&-0x2,%d4

	mov.w		&0x0000,ICCR(%a6)
	mov.w		&0x0000,%cc
	movm.l		&0xffff,IREGS(%a6)

	mulu.l		([0x10.l,%a4,%d4.l*8],0x1000.l),%d2:%d3

	mov.w		%cc,SCCR(%a6)
	movm.l		&0xffff,SREGS(%a6)
	mov.l		&0x00000004,IREGS+0xc(%a6)

	bsr.l		chkregs
	tst.b		%d0
	bne.l		error

ea_98:
	addq.l		&0x1,TESTCTR(%a6)

	movm.l		DEF_REGS(%pc),&0x3fff

	clr.l		%d2
	mov.l		&0x00000002,%d3
	lea		EAMEM-0x1000(%a6),%a3
	lea		EASTORE(%a6),%a4
	mov.l		%a3,(%a4)
	mov.l		&-0x2,%d4

	mov.w		&0x0000,ICCR(%a6)
	mov.w		&0x0000,%cc
	movm.l		&0xffff,IREGS(%a6)

	mulu.l		([0x00.l,%a4,%zd4.l*8],0x1000.l),%d2:%d3

	mov.w		%cc,SCCR(%a6)
	movm.l		&0xffff,SREGS(%a6)
	mov.l		&0x00000004,IREGS+0xc(%a6)

	bsr.l		chkregs
	tst.b		%d0
	bne.l		error

ea_99:
	addq.l		&0x1,TESTCTR(%a6)

	movm.l		DEF_REGS(%pc),&0x3fff

	clr.l		%d2
	mov.l		&0x00000002,%d3
	lea		EAMEM-0x1000(%a6),%a3
	lea		EASTORE(%a6),%a4
	mov.l		%a3,(%a4)
	mov.l		&-0x2,%d4

	mov.w		&0x0000,ICCR(%a6)
	mov.w		&0x0000,%cc
	movm.l		&0xffff,IREGS(%a6)

	mulu.l		([%a4,%zd4.l*8],0x1000.l),%d2:%d3

	mov.w		%cc,SCCR(%a6)
	movm.l		&0xffff,SREGS(%a6)
	mov.l		&0x00000004,IREGS+0xc(%a6)

	bsr.l		chkregs
	tst.b		%d0
	bne.l		error

ea_100:
	addq.l		&0x1,TESTCTR(%a6)

	movm.l		DEF_REGS(%pc),&0x3fff

	clr.l		%d2
	mov.l		&0x00000002,%d3
	lea		EAMEM-0x1000(%a6),%a3
	lea		EASTORE(%a6),%a4
	mov.l		%a3,(%a4)
	mov.l		&-0x10,%d4
	add.l		%a4,%d4

	mov.w		&0x0000,ICCR(%a6)
	mov.w		&0x0000,%cc
	movm.l		&0xffff,IREGS(%a6)

	mulu.l		([0x10.l,%za4,%d4.l*1],0x1000.l),%d2:%d3

	mov.w		%cc,SCCR(%a6)
	movm.l		&0xffff,SREGS(%a6)
	mov.l		&0x00000004,IREGS+0xc(%a6)

	bsr.l		chkregs
	tst.b		%d0
	bne.l		error

ea_101:
	addq.l		&0x1,TESTCTR(%a6)

#	movm.l		DEF_REGS(%pc),&0x3fff

#	clr.l		%d2
#	mov.l		&0x00000002,%d3
#	lea		EAMEM(%a6),%a3
#	lea		EASTORE(%a6),%a4
#	mov.l		%a3,(%a4)
#	mov.l		&-0x10,%d4

#	mov.w		&0x0000,ICCR(%a6)
#	mov.w		&0x0000,%cc
#	movm.l		&0xffff,IREGS(%a6)

#	mulu.l		([EASTORE.l,%za4,%zd4.l*1]),%d2:%d3

#	mov.w		%cc,SCCR(%a6)
#	movm.l		&0xffff,SREGS(%a6)
#	mov.l		&0x00000004,IREGS+0xc(%a6)

#	bsr.l		chkregs
#	tst.b		%d0
#	bne.l		error

ea_102:
	addq.l		&0x1,TESTCTR(%a6)

	movm.l		DEF_REGS(%pc),&0x3fff

	mov.l		%a6,%a1

	clr.l		%d2
	mov.l		&0x00000002,%d3
	lea		EAMEM+0x1000(%a1),%a3
	lea		EASTORE(%a1),%a4
	mov.l		%a3,(%a4)
	mov.l		&-0x2,%a6

	mov.w		&0x0000,ICCR(%a1)
	mov.w		&0x0000,%cc
	movm.l		&0xffff,IREGS(%a1)

	mulu.l		([0x10.w,%a4,%a6.l*8],-0x1000.w),%d2:%d3

	mov.w		%cc,SCCR(%a1)
	movm.l		&0xffff,SREGS(%a1)
	mov.l		&0x00000004,IREGS+0xc(%a1)

	mov.l		%a1,%a6

	bsr.l		chkregs
	tst.b		%d0
	bne.l		error

ea_103:
	addq.l		&0x1,TESTCTR(%a6)

	movm.l		DEF_REGS(%pc),&0x3fff

	mov.l		%a6,%a1

	clr.l		%d2
	mov.l		&0x00000002,%d3
	lea		EAMEM+0x1000(%a1),%a3
	lea		EASTORE(%a1),%a4
	mov.l		%a3,(%a4)
	mov.l		&0x2,%a6

	mov.w		&0x0000,ICCR(%a1)
	mov.w		&0x0000,%cc
	movm.l		&0xffff,IREGS(%a1)

	mulu.l		([-0x10.w,%a4,%a6.l*8],-0x1000.w),%d2:%d3

	mov.w		%cc,SCCR(%a1)
	movm.l		&0xffff,SREGS(%a1)
	mov.l		&0x00000004,IREGS+0xc(%a1)

	mov.l		%a1,%a6

	bsr.l		chkregs
	tst.b		%d0
	bne.l		error

ea_104:
	addq.l		&0x1,TESTCTR(%a6)

	movm.l		DEF_REGS(%pc),&0x3fff

	clr.l		%d2
	mov.l		&0x00000002,%d3
	lea		EAMEM-0x20(%a6),%a3
	lea		EASTORE(%a6),%a4
	mov.l		%a3,(%a4)
	sub.l		&0x10,%a4
	mov.l		&0x10,%d4

	mov.w		&0x0000,ICCR(%a6)
	mov.w		&0x0000,%cc
	movm.l		&0xffff,IREGS(%a6)

	mulu.l		([0x10.w,%a4],%d4.w*1,0x10.w),%d2:%d3

	mov.w		%cc,SCCR(%a6)
	movm.l		&0xffff,SREGS(%a6)
	mov.l		&0x00000004,IREGS+0xc(%a6)

	bsr.l		chkregs
	tst.b		%d0
	bne.l		error

ea_105:
	addq.l		&0x1,TESTCTR(%a6)

	movm.l		DEF_REGS(%pc),&0x3fff

	clr.l		%d2
	mov.l		&0x00000002,%d3
	lea		EAMEM-0x20(%a6),%a3
	lea		EASTORE(%a6),%a4
	mov.l		%a3,(%a4)
	sub.l		&0x10,%a4
	mov.l		&0x8,%d4

	mov.w		&0x0000,ICCR(%a6)
	mov.w		&0x0000,%cc
	movm.l		&0xffff,IREGS(%a6)

	mulu.l		([0x10.w,%a4],%d4.w*2,0x10.w),%d2:%d3

	mov.w		%cc,SCCR(%a6)
	movm.l		&0xffff,SREGS(%a6)
	mov.l		&0x00000004,IREGS+0xc(%a6)

	bsr.l		chkregs
	tst.b		%d0
	bne.l		error

ea_106:
	addq.l		&0x1,TESTCTR(%a6)

	movm.l		DEF_REGS(%pc),&0x3fff

	clr.l		%d2
	mov.l		&0x00000002,%d3
	lea		EAMEM-0x20(%a6),%a3
	lea		EASTORE(%a6),%a4
	mov.l		%a3,(%a4)
	sub.l		&0x10,%a4
	mov.l		&0x4,%d4

	mov.w		&0x0000,ICCR(%a6)
	mov.w		&0x0000,%cc
	movm.l		&0xffff,IREGS(%a6)

	mulu.l		([0x10.w,%a4],%d4.w*4,0x10.w),%d2:%d3

	mov.w		%cc,SCCR(%a6)
	movm.l		&0xffff,SREGS(%a6)
	mov.l		&0x00000004,IREGS+0xc(%a6)

	bsr.l		chkregs
	tst.b		%d0
	bne.l		error

ea_107:
	addq.l		&0x1,TESTCTR(%a6)

	movm.l		DEF_REGS(%pc),&0x3fff

	clr.l		%d2
	mov.l		&0x00000002,%d3
	lea		EAMEM-0x20(%a6),%a3
	lea		EASTORE(%a6),%a4
	mov.l		%a3,(%a4)
	sub.l		&0x10,%a4
	mov.l		&0x2,%d4

	mov.w		&0x0000,ICCR(%a6)
	mov.w		&0x0000,%cc
	movm.l		&0xffff,IREGS(%a6)

	mulu.l		([0x10.w,%a4],%d4.w*8,0x10.w),%d2:%d3

	mov.w		%cc,SCCR(%a6)
	movm.l		&0xffff,SREGS(%a6)
	mov.l		&0x00000004,IREGS+0xc(%a6)

	bsr.l		chkregs
	tst.b		%d0
	bne.l		error

ea_108:
	addq.l		&0x1,TESTCTR(%a6)

	movm.l		DEF_REGS(%pc),&0x3fff

	clr.l		%d2
	mov.l		&0x00000002,%d3
	lea		EAMEM-0x20(%a6),%a3
	lea		EASTORE(%a6),%a4
	mov.l		%a3,(%a4)
	sub.l		&0x10,%a4
	mov.l		&0x10,%d4

	mov.w		&0x0000,ICCR(%a6)
	mov.w		&0x0000,%cc
	movm.l		&0xffff,IREGS(%a6)

	mulu.l		([0x10.w,%a4],%d4.l*1,0x10.w),%d2:%d3

	mov.w		%cc,SCCR(%a6)
	movm.l		&0xffff,SREGS(%a6)
	mov.l		&0x00000004,IREGS+0xc(%a6)

	bsr.l		chkregs
	tst.b		%d0
	bne.l		error

ea_109:
	addq.l		&0x1,TESTCTR(%a6)

	movm.l		DEF_REGS(%pc),&0x3fff

	clr.l		%d2
	mov.l		&0x00000002,%d3
	lea		EAMEM-0x20(%a6),%a3
	lea		EASTORE(%a6),%a4
	mov.l		%a3,(%a4)
	sub.l		&0x10,%a4
	mov.l		&0x8,%d4

	mov.w		&0x0000,ICCR(%a6)
	mov.w		&0x0000,%cc
	movm.l		&0xffff,IREGS(%a6)

	mulu.l		([0x10.w,%a4],%d4.w*2,0x10.w),%d2:%d3

	mov.w		%cc,SCCR(%a6)
	movm.l		&0xffff,SREGS(%a6)
	mov.l		&0x00000004,IREGS+0xc(%a6)

	bsr.l		chkregs
	tst.b		%d0
	bne.l		error

ea_110:
	addq.l		&0x1,TESTCTR(%a6)

	movm.l		DEF_REGS(%pc),&0x3fff

	clr.l		%d2
	mov.l		&0x00000002,%d3
	lea		EAMEM-0x20(%a6),%a3
	lea		EASTORE(%a6),%a4
	mov.l		%a3,(%a4)
	sub.l		&0x10,%a4
	mov.l		&0x4,%d4

	mov.w		&0x0000,ICCR(%a6)
	mov.w		&0x0000,%cc
	movm.l		&0xffff,IREGS(%a6)

	mulu.l		([0x10.w,%a4],%d4.l*4,0x10.w),%d2:%d3

	mov.w		%cc,SCCR(%a6)
	movm.l		&0xffff,SREGS(%a6)
	mov.l		&0x00000004,IREGS+0xc(%a6)

	bsr.l		chkregs
	tst.b		%d0
	bne.l		error

ea_111:
	addq.l		&0x1,TESTCTR(%a6)

	movm.l		DEF_REGS(%pc),&0x3fff

	clr.l		%d2
	mov.l		&0x00000002,%d3
	lea		EAMEM-0x20(%a6),%a3
	lea		EASTORE(%a6),%a4
	mov.l		%a3,(%a4)
	sub.l		&0x10,%a4
	mov.l		&0x2,%d4

	mov.w		&0x0000,ICCR(%a6)
	mov.w		&0x0000,%cc
	movm.l		&0xffff,IREGS(%a6)

	mulu.l		([0x10.w,%a4],%d4.l*8,0x10.w),%d2:%d3

	mov.w		%cc,SCCR(%a6)
	movm.l		&0xffff,SREGS(%a6)
	mov.l		&0x00000004,IREGS+0xc(%a6)

	bsr.l		chkregs
	tst.b		%d0
	bne.l		error

ea_112:
	addq.l		&0x1,TESTCTR(%a6)

	movm.l		DEF_REGS(%pc),&0x3fff

	clr.l		%d2
	mov.l		&0x00000002,%d3
	lea		EAMEM-0x20(%a6),%a3
	lea		EASTORE(%a6),%a4
	mov.l		%a3,(%a4)
	sub.l		&0x10,%a4
	mov.l		&0x2,%d4

	mov.w		&0x0000,ICCR(%a6)
	mov.w		&0x0000,%cc
	movm.l		&0xffff,IREGS(%a6)

	mulu.l		([0x10.l,%a4],%d4.l*8,0x10.l),%d2:%d3

	mov.w		%cc,SCCR(%a6)
	movm.l		&0xffff,SREGS(%a6)
	mov.l		&0x00000004,IREGS+0xc(%a6)

	bsr.l		chkregs
	tst.b		%d0
	bne.l		error

ea_113:
	addq.l		&0x1,TESTCTR(%a6)

	movm.l		DEF_REGS(%pc),&0x3fff

	clr.l		%d2
	mov.l		&0x00000002,%d3
	lea		EAMEM-0x20(%a6),%a3
	lea		EASTORE(%a6),%a4
	mov.l		%a3,(%a4)
	mov.l		&0x2,%d4

	mov.w		&0x0000,ICCR(%a6)
	mov.w		&0x0000,%cc
	movm.l		&0xffff,IREGS(%a6)

	mulu.l		([0x00.l,%a4],%zd4.l*8,0x20.l),%d2:%d3

	mov.w		%cc,SCCR(%a6)
	movm.l		&0xffff,SREGS(%a6)
	mov.l		&0x00000004,IREGS+0xc(%a6)

	bsr.l		chkregs
	tst.b		%d0
	bne.l		error

ea_114:
	addq.l		&0x1,TESTCTR(%a6)

	movm.l		DEF_REGS(%pc),&0x3fff

	mov.l		%a7,%a0
	clr.l		%d2
	mov.l		&0x00000002,%d3
	lea		EAMEM-0x20(%a6),%a3
	lea		EASTORE(%a6),%a7
	mov.l		%a3,(%a7)
	mov.l		&0x20,%d4

	mov.w		&0x0000,ICCR(%a6)
	mov.w		&0x0000,%cc
	movm.l		&0xffff,IREGS(%a6)

	mulu.l		([%a7],%d4.l*1),%d2:%d3

	mov.w		%cc,SCCR(%a6)
	movm.l		&0xffff,SREGS(%a6)
	mov.l		&0x00000004,IREGS+0xc(%a6)

	mov.l		%a0,%a7
	bsr.l		chkregs
	tst.b		%d0
	bne.l		error

ea_115:
	addq.l		&0x1,TESTCTR(%a6)

#	movm.l		DEF_REGS(%pc),&0x3fff

#	clr.l		%d2
#	mov.l		&0x00000002,%d3
#	lea		EAMEM-0x20(%pc),%a3
#	lea		EASTORE(%pc),%a4
#	mov.l		%a3,(%a4)
#	mov.l		&0x2,%d4

#	mov.w		&0x0000,ICCR(%a6)
#	mov.w		&0x0000,%cc
#	movm.l		&0xffff,IREGS(%a6)

#	mulu.l		([EASTORE.l,%za4],%zd4.l*8,0x20.l),%d2:%d3

#	mov.w		%cc,SCCR(%a6)
#	movm.l		&0xffff,SREGS(%a6)
#	mov.l		&0x00000004,IREGS+0xc(%a6)

#	bsr.l		chkregs
#	tst.b		%d0
#	bne.l		error

ea_116:
	addq.l		&0x1,TESTCTR(%a6)

	movm.l		DEF_REGS(%pc),&0x3fff

	mov.l		%a6,%a1

	clr.l		%d2
	mov.l		&0x00000002,%d3
	lea		EAMEM(%a1),%a3
	lea		EASTORE(%a1),%a6
	mov.l		%a3,(%a6)
	add.l		&0x10,%a6
	mov.l		&-0x2,%a5

	mov.w		&0x0000,ICCR(%a1)
	mov.w		&0x0000,%cc
	movm.l		&0xffff,IREGS(%a1)

	mulu.l		([-0x10.w,%a6],%a5.l*8,0x10.l),%d2:%d3

	mov.w		%cc,SCCR(%a1)
	movm.l		&0xffff,SREGS(%a1)
	mov.l		&0x00000004,IREGS+0xc(%a1)

	mov.l		%a1,%a6

	bsr.l		chkregs
	tst.b		%d0
	bne.l		error

	mov.l		TESTCTR(%a6),%d1
	clr.l		%d0
	rts

ea_117:
	addq.l		&0x1,TESTCTR(%a6)

	movm.l		DEF_REGS(%pc),&0x3fff

	clr.l		%d2
	mov.l		&0x00000002,%d3
	lea		EAMEM-0x1000(%pc),%a3
	lea		EASTORE(%pc),%a4
	mov.l		%a3,(%a4)
	mov.l		&-0x10,%d4

	mov.w		&0x0000,ICCR(%a6)
	mov.w		&0x0000,%cc
	movm.l		&0xffff,IREGS(%a6)

	mulu.l		([EASTORE+0x10.w,%pc,%d4.w*1],0x1000.w),%d2:%d3

	mov.w		%cc,SCCR(%a6)
	movm.l		&0xffff,SREGS(%a6)
	mov.l		&0x00000004,IREGS+0xc(%a6)

	bsr.l		chkregs
	tst.b		%d0
	bne.l		error

ea_118:
	addq.l		&0x1,TESTCTR(%a6)

	movm.l		DEF_REGS(%pc),&0x3fff

	clr.l		%d2
	mov.l		&0x00000002,%d3
	lea		EAMEM-0x1000(%pc),%a3
	lea		EASTORE(%pc),%a4
	mov.l		%a3,(%a4)
	mov.l		&-0x8,%d4

	mov.w		&0x0000,ICCR(%a6)
	mov.w		&0x0000,%cc
	movm.l		&0xffff,IREGS(%a6)

	mulu.l		([EASTORE+0x10.w,%pc,%d4.w*2],0x1000.w),%d2:%d3

	mov.w		%cc,SCCR(%a6)
	movm.l		&0xffff,SREGS(%a6)
	mov.l		&0x00000004,IREGS+0xc(%a6)

	bsr.l		chkregs
	tst.b		%d0
	bne.l		error

ea_119:
	addq.l		&0x1,TESTCTR(%a6)

	movm.l		DEF_REGS(%pc),&0x3fff

	clr.l		%d2
	mov.l		&0x00000002,%d3
	lea		EAMEM-0x1000(%pc),%a3
	lea		EASTORE(%pc),%a4
	mov.l		%a3,(%a4)
	mov.l		&-0x4,%d4

	mov.w		&0x0000,ICCR(%a6)
	mov.w		&0x0000,%cc
	movm.l		&0xffff,IREGS(%a6)

	mulu.l		([EASTORE+0x10.w,%pc,%d4.w*4],0x1000.w),%d2:%d3

	mov.w		%cc,SCCR(%a6)
	movm.l		&0xffff,SREGS(%a6)
	mov.l		&0x00000004,IREGS+0xc(%a6)

	bsr.l		chkregs
	tst.b		%d0
	bne.l		error

ea_120:
	addq.l		&0x1,TESTCTR(%a6)

	movm.l		DEF_REGS(%pc),&0x3fff

	clr.l		%d2
	mov.l		&0x00000002,%d3
	lea		EAMEM-0x1000(%pc),%a3
	lea		EASTORE(%pc),%a4
	mov.l		%a3,(%a4)
	mov.l		&-0x2,%d4

	mov.w		&0x0000,ICCR(%a6)
	mov.w		&0x0000,%cc
	movm.l		&0xffff,IREGS(%a6)

	mulu.l		([EASTORE+0x10.w,%pc,%d4.w*8],0x1000.w),%d2:%d3

	mov.w		%cc,SCCR(%a6)
	movm.l		&0xffff,SREGS(%a6)
	mov.l		&0x00000004,IREGS+0xc(%a6)

	bsr.l		chkregs
	tst.b		%d0
	bne.l		error

ea_121:
	addq.l		&0x1,TESTCTR(%a6)

	movm.l		DEF_REGS(%pc),&0x3fff

	clr.l		%d2
	mov.l		&0x00000002,%d3
	lea		EAMEM-0x1000(%pc),%a3
	lea		EASTORE(%pc),%a4
	mov.l		%a3,(%a4)
	mov.l		&-0x10,%d4

	mov.w		&0x0000,ICCR(%a6)
	mov.w		&0x0000,%cc
	movm.l		&0xffff,IREGS(%a6)

	mulu.l		([EASTORE+0x10.w,%pc,%d4.l*1],0x1000.w),%d2:%d3

	mov.w		%cc,SCCR(%a6)
	movm.l		&0xffff,SREGS(%a6)
	mov.l		&0x00000004,IREGS+0xc(%a6)

	bsr.l		chkregs
	tst.b		%d0
	bne.l		error

ea_122:
	addq.l		&0x1,TESTCTR(%a6)

	movm.l		DEF_REGS(%pc),&0x3fff

	clr.l		%d2
	mov.l		&0x00000002,%d3
	lea		EAMEM-0x1000(%pc),%a3
	lea		EASTORE(%pc),%a4
	mov.l		%a3,(%a4)
	mov.l		&-0x8,%d4

	mov.w		&0x0000,ICCR(%a6)
	mov.w		&0x0000,%cc
	movm.l		&0xffff,IREGS(%a6)

	mulu.l		([EASTORE+0x10.w,%pc,%d4.l*2],0x1000.w),%d2:%d3

	mov.w		%cc,SCCR(%a6)
	movm.l		&0xffff,SREGS(%a6)
	mov.l		&0x00000004,IREGS+0xc(%a6)

	bsr.l		chkregs
	tst.b		%d0
	bne.l		error

ea_123:
	addq.l		&0x1,TESTCTR(%a6)

	movm.l		DEF_REGS(%pc),&0x3fff

	clr.l		%d2
	mov.l		&0x00000002,%d3
	lea		EAMEM-0x1000(%pc),%a3
	lea		EASTORE(%pc),%a4
	mov.l		%a3,(%a4)
	mov.l		&-0x4,%d4

	mov.w		&0x0000,ICCR(%a6)
	mov.w		&0x0000,%cc
	movm.l		&0xffff,IREGS(%a6)

	mulu.l		([EASTORE+0x10.w,%pc,%d4.l*4],0x1000.w),%d2:%d3

	mov.w		%cc,SCCR(%a6)
	movm.l		&0xffff,SREGS(%a6)
	mov.l		&0x00000004,IREGS+0xc(%a6)

	bsr.l		chkregs
	tst.b		%d0
	bne.l		error

ea_124:
	addq.l		&0x1,TESTCTR(%a6)

	movm.l		DEF_REGS(%pc),&0x3fff

	clr.l		%d2
	mov.l		&0x00000002,%d3
	lea		EAMEM-0x1000(%pc),%a3
	lea		EASTORE(%pc),%a4
	mov.l		%a3,(%a4)
	mov.l		&-0x2,%d4

	mov.w		&0x0000,ICCR(%a6)
	mov.w		&0x0000,%cc
	movm.l		&0xffff,IREGS(%a6)

	mulu.l		([EASTORE+0x10.w,%pc,%d4.l*8],0x1000.w),%d2:%d3

	mov.w		%cc,SCCR(%a6)
	movm.l		&0xffff,SREGS(%a6)
	mov.l		&0x00000004,IREGS+0xc(%a6)

	bsr.l		chkregs
	tst.b		%d0
	bne.l		error

ea_125:
	addq.l		&0x1,TESTCTR(%a6)

	movm.l		DEF_REGS(%pc),&0x3fff

	clr.l		%d2
	mov.l		&0x00000002,%d3
	lea		EAMEM-0x1000(%pc),%a3
	lea		EASTORE(%pc),%a4
	mov.l		%a3,(%a4)
	mov.l		&-0x2,%d4

	mov.w		&0x0000,ICCR(%a6)
	mov.w		&0x0000,%cc
	movm.l		&0xffff,IREGS(%a6)
	mulu.l		([EASTORE+0x10.l,%pc,%d4.l*8],0x1000.l),%d2:%d3

	mov.w		%cc,SCCR(%a6)
	movm.l		&0xffff,SREGS(%a6)
	mov.l		&0x00000004,IREGS+0xc(%a6)

	bsr.l		chkregs
	tst.b		%d0
	bne.l		error

ea_126:
	addq.l		&0x1,TESTCTR(%a6)

	movm.l		DEF_REGS(%pc),&0x3fff

	clr.l		%d2
	mov.l		&0x00000002,%d3
	lea		EAMEM-0x1000(%pc),%a3
	lea		EASTORE(%pc),%a4
	mov.l		%a3,(%a4)
	mov.l		&-0x2,%d4

	mov.w		&0x0000,ICCR(%a6)
	mov.w		&0x0000,%cc
	movm.l		&0xffff,IREGS(%a6)

	mulu.l		([EASTORE+0x00.l,%pc,%zd4.l*8],0x1000.l),%d2:%d3

	mov.w		%cc,SCCR(%a6)
	movm.l		&0xffff,SREGS(%a6)
	mov.l		&0x00000004,IREGS+0xc(%a6)

	bsr.l		chkregs
	tst.b		%d0
	bne.l		error

ea_127:
	addq.l		&0x1,TESTCTR(%a6)

	movm.l		DEF_REGS(%pc),&0x3fff

	clr.l		%d2
	mov.l		&0x00000002,%d3
	lea		EAMEM-0x1000(%pc),%a3
	lea		EASTORE(%pc),%a4
	mov.l		%a3,(%a4)
	mov.l		%a4,%d4

	mov.w		&0x0000,ICCR(%a6)
	mov.w		&0x0000,%cc
	movm.l		&0xffff,IREGS(%a6)

	mulu.l		([%zpc,%d4.l*1],0x1000.l),%d2:%d3

	mov.w		%cc,SCCR(%a6)
	movm.l		&0xffff,SREGS(%a6)
	mov.l		&0x00000004,IREGS+0xc(%a6)

	bsr.l		chkregs
	tst.b		%d0
	bne.l		error

ea_128:
	addq.l		&0x1,TESTCTR(%a6)

	movm.l		DEF_REGS(%pc),&0x3fff

	clr.l		%d2
	mov.l		&0x00000002,%d3
	lea		EAMEM-0x1000(%pc),%a3
	lea		EASTORE(%pc),%a4
	mov.l		%a3,(%a4)
	mov.l		&-0x10,%d4
	add.l		%a4,%d4

	mov.w		&0x0000,ICCR(%a6)
	mov.w		&0x0000,%cc
	movm.l		&0xffff,IREGS(%a6)

	mulu.l		([0x10.l,%zpc,%d4.l*1],0x1000.l),%d2:%d3

	mov.w		%cc,SCCR(%a6)
	movm.l		&0xffff,SREGS(%a6)
	mov.l		&0x00000004,IREGS+0xc(%a6)

	bsr.l		chkregs
	tst.b		%d0
	bne.l		error

ea_129:
	addq.l		&0x1,TESTCTR(%a6)

	clr.l		%d2
	mov.l		&0x00000002,%d3
	lea		EAMEM(%pc),%a3
	lea		EASTORE(%pc),%a4
	mov.l		%a3,(%a4)
	mov.l		&-0x10,%d4

	mov.w		&0x0000,ICCR(%a6)
	mov.w		&0x0000,%cc
	movm.l		&0xffff,IREGS(%a6)

	mulu.l		([EASTORE.l,%zpc,%zd4.l*1]),%d2:%d3

	mov.w		%cc,SCCR(%a6)
	movm.l		&0xffff,SREGS(%a6)
	mov.l		&0x00000004,IREGS+0xc(%a6)

	bsr.l		chkregs
	tst.b		%d0
	bne.l		error

ea_130:
	addq.l		&0x1,TESTCTR(%a6)

	movm.l		DEF_REGS(%pc),&0x3fff

	clr.l		%d2
	mov.l		&0x00000002,%d3
	lea		EAMEM+0x1000(%pc),%a3
	lea		EASTORE(%pc),%a4
	mov.l		%a3,(%a4)
	mov.l		&0x2,%a6

	mov.w		&0x0000,ICCR(%a6)
	mov.w		&0x0000,%cc
	movm.l		&0xffff,IREGS(%a6)

	mulu.l		([EASTORE-0x10.w,%pc,%a6.l*8],-0x1000.w),%d2:%d3

	mov.w		%cc,SCCR(%a6)
	movm.l		&0xffff,SREGS(%a6)
	mov.l		&0x00000004,IREGS+0xc(%a6)

	bsr.l		chkregs
	tst.b		%d0
	bne.l		error

ea_131:
	addq.l		&0x1,TESTCTR(%a6)

	movm.l		DEF_REGS(%pc),&0x3fff

	mov.l		%a7,%a0
	clr.l		%d2
	mov.l		&0x00000002,%d3
	lea		EAMEM+0x1000(%pc),%a3
	lea		EASTORE(%pc),%a4
	mov.l		%a3,(%a4)
	mov.l		&0x2,%a7

	mov.w		&0x0000,ICCR(%a6)
	mov.w		&0x0000,%cc
	movm.l		&0xffff,IREGS(%a6)

	mulu.l		([EASTORE-0x10.w,%pc,%a7.l*8],-0x1000.w),%d2:%d3

	mov.w		%cc,SCCR(%a6)
	movm.l		&0xffff,SREGS(%a6)
	mov.l		&0x00000004,IREGS+0xc(%a6)

	mov.l		%a0,%a7
	bsr.l		chkregs
	tst.b		%d0
	bne.l		error

ea_132:
	addq.l		&0x1,TESTCTR(%a6)

	movm.l		DEF_REGS(%pc),&0x3fff

	clr.l		%d2
	mov.l		&0x00000002,%d3
	lea		EAMEM-0x20(%pc),%a3
	lea		EASTORE(%pc),%a4
	mov.l		%a3,(%a4)
	sub.l		&0x10,%a4
	mov.l		&0x10,%d4

	mov.w		&0x0000,ICCR(%a6)
	mov.w		&0x0000,%cc
	movm.l		&0xffff,IREGS(%a6)

	mulu.l		([EASTORE.w,%pc],%d4.w*1,0x10.w),%d2:%d3

	mov.w		%cc,SCCR(%a6)
	movm.l		&0xffff,SREGS(%a6)
	mov.l		&0x00000004,IREGS+0xc(%a6)

	bsr.l		chkregs
	tst.b		%d0
	bne.l		error

ea_133:
	addq.l		&0x1,TESTCTR(%a6)

	movm.l		DEF_REGS(%pc),&0x3fff

	clr.l		%d2
	mov.l		&0x00000002,%d3
	lea		EAMEM-0x20(%pc),%a3
	lea		EASTORE(%pc),%a4
	mov.l		%a3,(%a4)
	sub.l		&0x10,%a4
	mov.l		&0x8,%d4

	mov.w		&0x0000,ICCR(%a6)
	mov.w		&0x0000,%cc
	movm.l		&0xffff,IREGS(%a6)

	mulu.l		([EASTORE.w,%pc],%d4.w*2,0x10.w),%d2:%d3

	mov.w		%cc,SCCR(%a6)
	movm.l		&0xffff,SREGS(%a6)
	mov.l		&0x00000004,IREGS+0xc(%a6)

	bsr.l		chkregs
	tst.b		%d0
	bne.l		error

ea_134:
	addq.l		&0x1,TESTCTR(%a6)

	movm.l		DEF_REGS(%pc),&0x3fff

	clr.l		%d2
	mov.l		&0x00000002,%d3
	lea		EAMEM-0x20(%pc),%a3
	lea		EASTORE(%pc),%a4
	mov.l		%a3,(%a4)
	sub.l		&0x10,%a4
	mov.l		&0x4,%d4

	mov.w		&0x0000,ICCR(%a6)
	mov.w		&0x0000,%cc
	movm.l		&0xffff,IREGS(%a6)

	mulu.l		([EASTORE.w,%pc],%d4.w*4,0x10.w),%d2:%d3

	mov.w		%cc,SCCR(%a6)
	movm.l		&0xffff,SREGS(%a6)
	mov.l		&0x00000004,IREGS+0xc(%a6)

	bsr.l		chkregs
	tst.b		%d0
	bne.l		error

ea_135:
	addq.l		&0x1,TESTCTR(%a6)

	movm.l		DEF_REGS(%pc),&0x3fff

	clr.l		%d2
	mov.l		&0x00000002,%d3
	lea		EAMEM-0x20(%pc),%a3
	lea		EASTORE(%pc),%a4
	mov.l		%a3,(%a4)
	sub.l		&0x10,%a4
	mov.l		&0x2,%d4

	mov.w		&0x0000,ICCR(%a6)
	mov.w		&0x0000,%cc
	movm.l		&0xffff,IREGS(%a6)

	mulu.l		([EASTORE.w,%pc],%d4.w*8,0x10.w),%d2:%d3

	mov.w		%cc,SCCR(%a6)
	movm.l		&0xffff,SREGS(%a6)
	mov.l		&0x00000004,IREGS+0xc(%a6)

	bsr.l		chkregs
	tst.b		%d0
	bne.l		error

ea_136:
	addq.l		&0x1,TESTCTR(%a6)

	movm.l		DEF_REGS(%pc),&0x3fff

	clr.l		%d2
	mov.l		&0x00000002,%d3
	lea		EAMEM-0x20(%pc),%a3
	lea		EASTORE(%pc),%a4
	mov.l		%a3,(%a4)
	sub.l		&0x10,%a4
	mov.l		&0x10,%d4

	mov.w		&0x0000,ICCR(%a6)
	mov.w		&0x0000,%cc
	movm.l		&0xffff,IREGS(%a6)

	mulu.l		([EASTORE.w,%pc],%d4.l*1,0x10.w),%d2:%d3

	mov.w		%cc,SCCR(%a6)
	movm.l		&0xffff,SREGS(%a6)
	mov.l		&0x00000004,IREGS+0xc(%a6)

	bsr.l		chkregs
	tst.b		%d0
	bne.l		error

ea_137:
	addq.l		&0x1,TESTCTR(%a6)

	movm.l		DEF_REGS(%pc),&0x3fff

	clr.l		%d2
	mov.l		&0x00000002,%d3
	lea		EAMEM-0x20(%pc),%a3
	lea		EASTORE(%pc),%a4
	mov.l		%a3,(%a4)
	sub.l		&0x10,%a4
	mov.l		&0x8,%d4

	mov.w		&0x0000,ICCR(%a6)
	mov.w		&0x0000,%cc
	movm.l		&0xffff,IREGS(%a6)

	mulu.l		([EASTORE.w,%pc],%d4.w*2,0x10.w),%d2:%d3

	mov.w		%cc,SCCR(%a6)
	movm.l		&0xffff,SREGS(%a6)
	mov.l		&0x00000004,IREGS+0xc(%a6)

	bsr.l		chkregs
	tst.b		%d0
	bne.l		error

ea_138:
	addq.l		&0x1,TESTCTR(%a6)

	movm.l		DEF_REGS(%pc),&0x3fff

	clr.l		%d2
	mov.l		&0x00000002,%d3
	lea		EAMEM-0x20(%pc),%a3
	lea		EASTORE(%pc),%a4
	mov.l		%a3,(%a4)
	sub.l		&0x10,%a4
	mov.l		&0x4,%d4

	mov.w		&0x0000,ICCR(%a6)
	mov.w		&0x0000,%cc
	movm.l		&0xffff,IREGS(%a6)

	mulu.l		([EASTORE.w,%pc],%d4.l*4,0x10.w),%d2:%d3

	mov.w		%cc,SCCR(%a6)
	movm.l		&0xffff,SREGS(%a6)
	mov.l		&0x00000004,IREGS+0xc(%a6)

	bsr.l		chkregs
	tst.b		%d0
	bne.l		error

ea_139:
	addq.l		&0x1,TESTCTR(%a6)

	movm.l		DEF_REGS(%pc),&0x3fff

	clr.l		%d2
	mov.l		&0x00000002,%d3
	lea		EAMEM-0x20(%pc),%a3
	lea		EASTORE(%pc),%a4
	mov.l		%a3,(%a4)
	sub.l		&0x10,%a4
	mov.l		&0x2,%d4

	mov.w		&0x0000,ICCR(%a6)
	mov.w		&0x0000,%cc
	movm.l		&0xffff,IREGS(%a6)

	mulu.l		([EASTORE.w,%pc],%d4.l*8,0x10.w),%d2:%d3

	mov.w		%cc,SCCR(%a6)
	movm.l		&0xffff,SREGS(%a6)
	mov.l		&0x00000004,IREGS+0xc(%a6)

	bsr.l		chkregs
	tst.b		%d0
	bne.l		error

ea_140:
	addq.l		&0x1,TESTCTR(%a6)

	movm.l		DEF_REGS(%pc),&0x3fff

	clr.l		%d2
	mov.l		&0x00000002,%d3
	lea		EAMEM-0x20(%pc),%a3
	lea		EASTORE(%pc),%a4
	mov.l		%a3,(%a4)
	sub.l		&0x10,%a4
	mov.l		&0x2,%d4

	mov.w		&0x0000,ICCR(%a6)
	mov.w		&0x0000,%cc
	movm.l		&0xffff,IREGS(%a6)

	mulu.l		([EASTORE.l,%pc],%d4.l*8,0x10.l),%d2:%d3

	mov.w		%cc,SCCR(%a6)
	movm.l		&0xffff,SREGS(%a6)
	mov.l		&0x00000004,IREGS+0xc(%a6)

	bsr.l		chkregs
	tst.b		%d0
	bne.l		error

ea_141:
	addq.l		&0x1,TESTCTR(%a6)

	movm.l		DEF_REGS(%pc),&0x3fff

	clr.l		%d2
	mov.l		&0x00000002,%d3
	lea		EAMEM-0x20(%pc),%a3
	lea		EASTORE(%pc),%a4
	mov.l		%a3,(%a4)
	mov.l		&0x2,%d4

	mov.w		&0x0000,ICCR(%a6)
	mov.w		&0x0000,%cc
	movm.l		&0xffff,IREGS(%a6)

	mulu.l		([EASTORE.l,%pc],%zd4.l*8,0x20.l),%d2:%d3

	mov.w		%cc,SCCR(%a6)
	movm.l		&0xffff,SREGS(%a6)
	mov.l		&0x00000004,IREGS+0xc(%a6)

	bsr.l		chkregs
	tst.b		%d0
	bne.l		error

ea_142:
	addq.l		&0x1,TESTCTR(%a6)

	movm.l		DEF_REGS(%pc),&0x3fff

	clr.l		%d2
	mov.l		&0x00000002,%d3
	lea		EAMEM-0x20(%pc),%a3
	lea		EASTORE(%pc),%a4
	mov.l		%a3,(%a4)
	mov.l		&0x4,%d4

	mov.w		&0x0000,ICCR(%a6)
	mov.w		&0x0000,%cc
	movm.l		&0xffff,IREGS(%a6)

	mulu.l		([EASTORE.l,%zpc],%d4.l*8),%d2:%d3

	mov.w		%cc,SCCR(%a6)
	movm.l		&0xffff,SREGS(%a6)
	mov.l		&0x00000004,IREGS+0xc(%a6)

	bsr.l		chkregs
	tst.b		%d0
	bne.l		error

ea_143:
	addq.l		&0x1,TESTCTR(%a6)

	movm.l		DEF_REGS(%pc),&0x3fff

	mov.l		%a7,%a0
	clr.l		%d2
	mov.l		&0x00000002,%d3
	lea		EAMEM(%pc),%a3
	lea		EASTORE(%pc),%a6
	mov.l		%a3,(%a6)
	add.l		&0x10,%a6
	mov.l		&-0x2,%a7

	mov.w		&0x0000,ICCR(%a6)
	mov.w		&0x0000,%cc
	movm.l		&0xffff,IREGS(%a6)

	mulu.l		([EASTORE.w,%pc],%a7.l*8,0x10.l),%d2:%d3

	mov.w		%cc,SCCR(%a6)
	movm.l		&0xffff,SREGS(%a6)
	mov.l		&0x00000004,IREGS+0xc(%a6)

	mov.l		%a0,%a7
	bsr.l		chkregs
	tst.b		%d0
	bne.l		error

	clr.l		%d0
	rts

###########################################################
###########################################################
chkregs:
	lea		IREGS(%a6),%a0
	lea		SREGS(%a6),%a1
	mov.l		&14,%d0
chkregs_loop:
	cmp.l		(%a0)+,(%a1)+
	bne.l		chkregs_error
	dbra.w		%d0,chkregs_loop

	mov.w		ICCR(%a6),%d0
	mov.w		SCCR(%a6),%d1
	cmp.w		%d0,%d1
	bne.l		chkregs_error

	clr.l		%d0
	rts

chkregs_error:
	movq.l		&0x1,%d0
	rts

error:
	mov.l		TESTCTR(%a6),%d1
	movq.l		&0x1,%d0
	rts

DEF_REGS:
	long		0xacacacac, 0xacacacac, 0xacacacac, 0xacacacac
	long		0xacacacac, 0xacacacac, 0xacacacac, 0xacacacac

	long		0xacacacac, 0xacacacac, 0xacacacac, 0xacacacac
	long		0xacacacac, 0xacacacac, 0xacacacac, 0xacacacac

############################################################

_print_str:
	mov.l		%d0,-(%sp)
	mov.l		(TESTTOP-0x80+0x0,%pc),%d0
	pea		(TESTTOP-0x80,%pc,%d0)
	mov.l		0x4(%sp),%d0
	rtd		&0x4

_print_num:
	mov.l		%d0,-(%sp)
	mov.l		(TESTTOP-0x80+0x4,%pc),%d0
	pea		(TESTTOP-0x80,%pc,%d0)
	mov.l		0x4(%sp),%d0
	rtd		&0x4

############################################################
~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
MOTOROLA MICROPROCESSOR & MEMORY TECHNOLOGY GROUP
M68000 Hi-Performance Microprocessor Division
M68060 Software Package
Production Release P1.00 -- October 10, 1994

M68060 Software Package Copyright � 1993, 1994 Motorola Inc.  All rights reserved.
 
THE SOFTWARE is provided on an "AS IS" basis and without warranty.
To the maximum extent permitted by applicable law,
MOTOROLA DISCLAIMS ALL WARRANTIES WHETHER EXPRESS OR IMPLIED, 
INCLUDING IMPLIED WARRANTIES OF MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE
and any warranty against infringement with regard to the SOFTWARE
(INCLUDING ANY MODIFIED VERSIONS THEREOF) and any accompanying written materials.

To the maximum extent permitted by applicable law,
IN NO EVENT SHALL MOTOROLA BE LIABLE FOR ANY DAMAGES WHATSOEVER
(INCLUDING WITHOUT LIMITATION, DAMAGES FOR LOSS OF BUSINESS PROFITS,
BUSINESS INTERRUPTION, LOSS OF BUSINESS INFORMATION, OR OTHER PECUNIARY LOSS)
ARISING OF THE USE OR INABILITY TO USE THE SOFTWARE.
Motorola assumes no responsibility for the maintenance and support of the SOFTWARE.

You are hereby granted a copyright license to use, modify, and distribute the SOFTWARE
so long as this entire notice is retained without alteration in any modified and/or
redistributed versions, and that such modified versions are clearly identified as such.
No licenses are granted by implication, estoppel or otherwise under any patents
or trademarks of Motorola, Inc.
~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
# freal.s:
#	This file is appended to the top of the 060FPSP package
# and contains the entry points into the package. The user, in
# effect, branches to one of the branch table entries located
# after _060FPSP_TABLE.
#	Also, subroutine stubs exist in this file (_fpsp_done for
# example) that are referenced by the FPSP package itself in order
# to call a given routine. The stub routine actually performs the
# callout. The FPSP code does a "bsr" to the stub routine. This
# extra layer of hierarchy adds a slight performance penalty but
# it makes the FPSP code easier to read and more mainatinable.
#

set	_off_bsun,	0x00
set	_off_snan,	0x04
set	_off_operr,	0x08
set	_off_ovfl,	0x0c
set	_off_unfl,	0x10
set	_off_dz,	0x14
set	_off_inex,	0x18
set	_off_fline,	0x1c
set	_off_fpu_dis,	0x20
set	_off_trap,	0x24
set	_off_trace,	0x28
set	_off_access,	0x2c
set	_off_done,	0x30

set	_off_imr,	0x40
set	_off_dmr,	0x44
set	_off_dmw,	0x48
set	_off_irw,	0x4c
set	_off_irl,	0x50
set	_off_drb,	0x54
set	_off_drw,	0x58
set	_off_drl,	0x5c
set	_off_dwb,	0x60
set	_off_dww,	0x64
set	_off_dwl,	0x68

_060FPSP_TABLE:

###############################################################

# Here's the table of ENTRY POINTS for those linking the package.
	bra.l		_fpsp_snan
	short		0x0000
	bra.l		_fpsp_operr
	short		0x0000
	bra.l		_fpsp_ovfl
	short		0x0000
	bra.l		_fpsp_unfl
	short		0x0000
	bra.l		_fpsp_dz
	short		0x0000
	bra.l		_fpsp_inex
	short		0x0000
	bra.l		_fpsp_fline
	short		0x0000
	bra.l		_fpsp_unsupp
	short		0x0000
	bra.l		_fpsp_effadd
	short		0x0000

	space 		56

###############################################################
	global		_fpsp_done
_fpsp_done:
	mov.l		%d0,-(%sp)
	mov.l		(_060FPSP_TABLE-0x80+_off_done,%pc),%d0
	pea.l		(_060FPSP_TABLE-0x80,%pc,%d0)
	mov.l		0x4(%sp),%d0
	rtd		&0x4

	global		_real_ovfl
_real_ovfl:
	mov.l		%d0,-(%sp)
	mov.l		(_060FPSP_TABLE-0x80+_off_ovfl,%pc),%d0
	pea.l		(_060FPSP_TABLE-0x80,%pc,%d0)
	mov.l		0x4(%sp),%d0
	rtd		&0x4

	global		_real_unfl
_real_unfl:
	mov.l		%d0,-(%sp)
	mov.l		(_060FPSP_TABLE-0x80+_off_unfl,%pc),%d0
	pea.l		(_060FPSP_TABLE-0x80,%pc,%d0)
	mov.l		0x4(%sp),%d0
	rtd		&0x4

	global		_real_inex
_real_inex:
	mov.l		%d0,-(%sp)
	mov.l		(_060FPSP_TABLE-0x80+_off_inex,%pc),%d0
	pea.l		(_060FPSP_TABLE-0x80,%pc,%d0)
	mov.l		0x4(%sp),%d0
	rtd		&0x4

	global		_real_bsun
_real_bsun:
	mov.l		%d0,-(%sp)
	mov.l		(_060FPSP_TABLE-0x80+_off_bsun,%pc),%d0
	pea.l		(_060FPSP_TABLE-0x80,%pc,%d0)
	mov.l		0x4(%sp),%d0
	rtd		&0x4

	global		_real_operr
_real_operr:
	mov.l		%d0,-(%sp)
	mov.l		(_060FPSP_TABLE-0x80+_off_operr,%pc),%d0
	pea.l		(_060FPSP_TABLE-0x80,%pc,%d0)
	mov.l		0x4(%sp),%d0
	rtd		&0x4

	global		_real_snan
_real_snan:
	mov.l		%d0,-(%sp)
	mov.l		(_060FPSP_TABLE-0x80+_off_snan,%pc),%d0
	pea.l		(_060FPSP_TABLE-0x80,%pc,%d0)
	mov.l		0x4(%sp),%d0
	rtd		&0x4

	global		_real_dz
_real_dz:
	mov.l		%d0,-(%sp)
	mov.l		(_060FPSP_TABLE-0x80+_off_dz,%pc),%d0
	pea.l		(_060FPSP_TABLE-0x80,%pc,%d0)
	mov.l		0x4(%sp),%d0
	rtd		&0x4

	global		_real_fline
_real_fline:
	mov.l		%d0,-(%sp)
	mov.l		(_060FPSP_TABLE-0x80+_off_fline,%pc),%d0
	pea.l		(_060FPSP_TABLE-0x80,%pc,%d0)
	mov.l		0x4(%sp),%d0
	rtd		&0x4

	global		_real_fpu_disabled
_real_fpu_disabled:
	mov.l		%d0,-(%sp)
	mov.l		(_060FPSP_TABLE-0x80+_off_fpu_dis,%pc),%d0
	pea.l		(_060FPSP_TABLE-0x80,%pc,%d0)
	mov.l		0x4(%sp),%d0
	rtd		&0x4

	global		_real_trap
_real_trap:
	mov.l		%d0,-(%sp)
	mov.l		(_060FPSP_TABLE-0x80+_off_trap,%pc),%d0
	pea.l		(_060FPSP_TABLE-0x80,%pc,%d0)
	mov.l		0x4(%sp),%d0
	rtd		&0x4

	global		_real_trace
_real_trace:
	mov.l		%d0,-(%sp)
	mov.l		(_060FPSP_TABLE-0x80+_off_trace,%pc),%d0
	pea.l		(_060FPSP_TABLE-0x80,%pc,%d0)
	mov.l		0x4(%sp),%d0
	rtd		&0x4

	global		_real_access
_real_access:
	mov.l		%d0,-(%sp)
	mov.l		(_060FPSP_TABLE-0x80+_off_access,%pc),%d0
	pea.l		(_060FPSP_TABLE-0x80,%pc,%d0)
	mov.l		0x4(%sp),%d0
	rtd		&0x4

#######################################

	global		_imem_read
_imem_read:
	mov.l		%d0,-(%sp)
	mov.l		(_060FPSP_TABLE-0x80+_off_imr,%pc),%d0
	pea.l		(_060FPSP_TABLE-0x80,%pc,%d0)
	mov.l		0x4(%sp),%d0
	rtd		&0x4

	global		_dmem_read
_dmem_read:
	mov.l		%d0,-(%sp)
	mov.l		(_060FPSP_TABLE-0x80+_off_dmr,%pc),%d0
	pea.l		(_060FPSP_TABLE-0x80,%pc,%d0)
	mov.l		0x4(%sp),%d0
	rtd		&0x4

	global		_dmem_write
_dmem_write:
	mov.l		%d0,-(%sp)
	mov.l		(_060FPSP_TABLE-0x80+_off_dmw,%pc),%d0
	pea.l		(_060FPSP_TABLE-0x80,%pc,%d0)
	mov.l		0x4(%sp),%d0
	rtd		&0x4

	global		_imem_read_word
_imem_read_word:
	mov.l		%d0,-(%sp)
	mov.l		(_060FPSP_TABLE-0x80+_off_irw,%pc),%d0
	pea.l		(_060FPSP_TABLE-0x80,%pc,%d0)
	mov.l		0x4(%sp),%d0
	rtd		&0x4

	global		_imem_read_long
_imem_read_long:
	mov.l		%d0,-(%sp)
	mov.l		(_060FPSP_TABLE-0x80+_off_irl,%pc),%d0
	pea.l		(_060FPSP_TABLE-0x80,%pc,%d0)
	mov.l		0x4(%sp),%d0
	rtd		&0x4

	global		_dmem_read_byte
_dmem_read_byte:
	mov.l		%d0,-(%sp)
	mov.l		(_060FPSP_TABLE-0x80+_off_drb,%pc),%d0
	pea.l		(_060FPSP_TABLE-0x80,%pc,%d0)
	mov.l		0x4(%sp),%d0
	rtd		&0x4

	global		_dmem_read_word
_dmem_read_word:
	mov.l		%d0,-(%sp)
	mov.l		(_060FPSP_TABLE-0x80+_off_drw,%pc),%d0
	pea.l		(_060FPSP_TABLE-0x80,%pc,%d0)
	mov.l		0x4(%sp),%d0
	rtd		&0x4

	global		_dmem_read_long
_dmem_read_long:
	mov.l		%d0,-(%sp)
	mov.l		(_060FPSP_TABLE-0x80+_off_drl,%pc),%d0
	pea.l		(_060FPSP_TABLE-0x80,%pc,%d0)
	mov.l		0x4(%sp),%d0
	rtd		&0x4

	global		_dmem_write_byte
_dmem_write_byte:
	mov.l		%d0,-(%sp)
	mov.l		(_060FPSP_TABLE-0x80+_off_dwb,%pc),%d0
	pea.l		(_060FPSP_TABLE-0x80,%pc,%d0)
	mov.l		0x4(%sp),%d0
	rtd		&0x4

	global		_dmem_write_word
_dmem_write_word:
	mov.l		%d0,-(%sp)
	mov.l		(_060FPSP_TABLE-0x80+_off_dww,%pc),%d0
	pea.l		(_060FPSP_TABLE-0x80,%pc,%d0)
	mov.l		0x4(%sp),%d0
	rtd		&0x4

	global		_dmem_write_long
_dmem_write_long:
	mov.l		%d0,-(%sp)
	mov.l		(_060FPSP_TABLE-0x80+_off_dwl,%pc),%d0
	pea.l		(_060FPSP_TABLE-0x80,%pc,%d0)
	mov.l		0x4(%sp),%d0
	rtd		&0x4

#
# This file contains a set of define statements for constants
# in order to promote readability within the corecode itself.
#

set LOCAL_SIZE,		192			# stack frame size(bytes)
set LV,			-LOCAL_SIZE		# stack offset

set EXC_SR,		0x4			# stack status register
set EXC_PC,		0x6			# stack pc
set EXC_VOFF,		0xa			# stacked vector offset
set EXC_EA,		0xc			# stacked <ea>

set EXC_FP,		0x0			# frame pointer

set EXC_AREGS,		-68			# offset of all address regs
set EXC_DREGS,		-100			# offset of all data regs
set EXC_FPREGS,		-36			# offset of all fp regs

set EXC_A7,		EXC_AREGS+(7*4)		# offset of saved a7
set OLD_A7,		EXC_AREGS+(6*4)		# extra copy of saved a7
set EXC_A6,		EXC_AREGS+(6*4)		# offset of saved a6
set EXC_A5,		EXC_AREGS+(5*4)
set EXC_A4,		EXC_AREGS+(4*4)
set EXC_A3,		EXC_ARE/idedma/onlydisk.h)
imm.o: imm.c \
   /home/me/kernel/linux/include/linux/blk.h \
   /home/me/kernel/linux/include/asm/io.h \
   /home/me/kernel/linux/include/linux/parport.h \
   sd.h \
   hosts.h \
   imm.h \
   scsi_module.c \
   $(wildcard /home/me/kernel/linux/include/config/scsi/izip/epp16.h) \
   $(wildcard /home/me/kernel/linux/include/config/parport.h) \
   $(wildcard /home/me/kernel/linux/include/config/parport/module.h)
imm.h: \
   /home/me/kernel/linux/include/linux/stddef.h \
   /home/me/kernel/linux/include/linux/module.h \
   /home/me/kernel/linux/include/linux/kernel.h \
   /home/me/kernel/linux/include/linux/tqueue.h \
   /home/me/kernel/linux/include/linux/ioport.h \
   /home/me/kernel/linux/include/linux/delay.h \
   /home/me/kernel/linux/include/linux/proc_fs.h \
   /home/me/kernel/linux/include/linux/stat.h \
   /home/me/kernel/linux/include/linux/blk.h \
   /home/me/kernel/linux/include/linux/sched.h \
   /home/me/kernel/linux/include/linux/interrupt.h \
   /home/me/kernel/linux/include/asm/io.h \
   sd.h \
   hosts.h \
   $(wildcard /home/me/kernel/linux/include/config/scsi/izip/epp16.h) \
   $(wildcard /home/me/kernel/linux/include/config/scsi/izip/slow/ctr.h)
	@touch imm.h
in2000.o: in2000.c \
   /home/me/kernel/linux/include/linux/module.h \
   /home/me/kernel/linux/include/asm/system.h \
   /home/me/kernel/linux/include/linux/sched.h \
   /home/me/kernel/linux/include/linux/string.h \
   /home/me/kernel/linux/include/linux/delay.h \
   /home/me/kernel/linux/include/linux/proc_fs.h \
   /home/me/kernel/linux/include/asm/io.h \
   /home/me/kernel/linux/include/linux/ioport.h \
   /home/me/kernel/linux/include/linux/blkdev.h \
   /home/me/kernel/linux/include/linux/blk.h \
   /home/me/kernel/linux/include/linux/stat.h \
   scsi.h \
   sd.h \
   hosts.h \
   in2000.h \
   scsi_module.c
in2000.h: \
   /home/me/kernel/linux/include/asm/io.h \
   /home/me/kernel/linux/include/linux/version.h \
   /home/me/kernel/linux/include/linux/init.h \
   /home/me/kernel/linux/include/linux/spinlock.h
	@touch in2000.h
ini9100u.o: ini9100u.c \
   /home/me/kernel/linux/include/linux/version.h \
   /home/me/kernel/linux/include/linux/module.h \
   /home/me/kernel/linux/include/asm/irq.h \
   /home/me/kernel/linux/include/linux/errno.h \
   /home/me/kernel/linux/include/linux/delay.h \
   /home/me/kernel/linux/include/linux/pci.h \
   /home/me/kernel/linux/include/linux/init.h \
   /home/me/kernel/linux/include/linux/blk.h \
   /home/me/kernel/linux/include/linux/spinlock.h \
   /home/me/kernel/linux/include/linux/stat.h \
   /home/me/kernel/linux/include/linux/kernel.h \
   /home/me/kernel/linux/include/linux/string.h \
   /home/me/kernel/linux/include/linux/ioport.h \
   /home/me/kernel/linux/include/linux/sched.h \
   /home/me/kernel/linux/include/linux/proc_fs.h \
   /home/me/kernel/linux/include/asm/io.h \
   scsi.h \
   sd.h \
   hosts.h \
   /home/me/kernel/linux/include/linux/slab.h \
   ini9100u.h \
   scsi_module.c \
   $(wildcard /home/me/kernel/linux/include/config/pci.h)
ini9100u.h: \
   /home/me/kernel/linux/include/linux/version.h \
   /home/me/kernel/linux/include/linux/types.h \
   sd.h
	@touch ini9100u.h
inia100.o: inia100.c \
   /home/me/kernel/linux/include/linux/version.h \
   /home/me/kernel/linux/include/linux/module.h \
   /home/me/kernel/linux/include/asm/irq.h \
   /home/me/kernel/linux/include/linux/errno.h \
   /home/me/kernel/linux/include/linux/delay.h \
   /home/me/kernel/linux/include/linux/pci.h \
   /home/me/kernel/linux/include/linux/init.h \
   /home/me/kernel/linux/include/linux/blk.h \
   /home/me/kernel/linux/include/linux/spinlock.h \
   /home/me/kernel/linux/include/linux/stat.h \
   /home/me/kernel/linux/include/linux/kernel.h \
   /home/me/kernel/linux/include/linux/string.h \
   /home/me/kernel/linux/include/linux/ioport.h \
   /home/me/kernel/linux/include/linux/sched.h \
   /home/me/kernel/linux/include/linux/proc_fs.h \
   /home/me/kernel/linux/include/asm/io.h \
   scsi.h \
   sd.h \
   hosts.h \
   /home/me/kernel/linux/include/linux/slab.h \
   inia100.h \
   scsi_module.c
inia100.h: \
   /home/me/kernel/linux/include/linux/version.h \
   /home/me/kernel/linux/include/linux/types.h \
   sd.h
	@touch inia100.h
ips.o: ips.c \
   /home/me/kernel/linux/include/asm/io.h \
   /home/me/kernel/linux/include/asm/byteorder.h \
   /home/me/kernel/linux/include/asm/page.h \
   /home/me/kernel/linux/include/linux/stddef.h \
   /home/me/kernel/linux/include/linux/version.h \
   /home/me/kernel/linux/include/linux/string.h \
   /home/me/kernel/linux/include/linux/errno.h \
   /home/me/kernel/linux/include/linux/kernel.h \
   /home/me/kernel/linux/include/linux/ioport.h \
   /home/me/kernel/linux/include/linux/slab.h \
   /home/me/kernel/linux/include/linux/vmalloc.h \
   /home/me/kernel/linux/include/linux/delay.h \
   /home/me/kernel/linux/include/linux/sched.h \
   /home/me/kernel/linux/include/linux/pci.h \
   /home/me/kernel/linux/include/linux/proc_fs.h \
   /home/me/kernel/linux/include/linux/reboot.h \
   /home/me/kernel/linux/include/linux/tqueue.h \
   /home/me/kernel/linux/include/linux/interrupt.h \
   /home/me/kernel/linux/include/linux/blk.h \
   /home/me/kernel/linux/include/linux/types.h \
   /home/me/kernel/linux/include/scsi/sg.h \
   sd.h \
   scsi.h \
   hosts.h \
   ips.h \
   /home/me/kernel/linux/include/linux/module.h \
   /home/me/kernel/linux/include/linux/stat.h \
   /home/me/kernel/linux/include/linux/spinlock.h \
   /home/me/kernel/linux/include/linux/init.h \
   /home/me/kernel/linux/include/asm/spinlock.h \
   /home/me/kernel/linux/include/linux/smp.h \
   $(wildcard /home/me/kernel/linux/include/config/pci.h) \
   scsi_module.c
ips.h: \
   /home/me/kernel/linux/include/asm/uaccess.h \
   /home/me/kernel/linux/include/asm/io.h
	@touch ips.h
jazz_esp.o: jazz_esp.c \
   /home/me/kernel/linux/include/linux/kernel.h \
   /home/me/kernel/linux/include/linux/delay.h \
   /home/me/kernel/linux/include/linux/types.h \
   /home/me/kernel/linux/include/linux/string.h \
   /home/me/kernel/linux/include/linux/slab.h \
   /home/me/kernel/linux/include/linux/blk.h \
   /home/me/kernel/linux/include/linux/proc_fs.h \
   /home/me/kernel/linux/include/linux/stat.h \
   scsi.h \
   hosts.h \
   NCR53C9x.h \
   jazz_esp.h \
   /home/me/kernel/linux/include/asm/irq.h \
   /home/me/kernel/linux/include/asm/dma.h \
   /home/me/kernel/linux/include/asm/pgtable.h
jazz_esp.h: \
   NCR53C9x.h
	@touch jazz_esp.h
lasi700.o: lasi700.c \
   /home/me/kernel/linux/include/linux/kernel.h \
   /home/me/kernel/linux/include/linux/init.h \
   /home/me/kernel/linux/include/linux/types.h \
   /home/me/kernel/linux/include/linux/stat.h \
   /home/me/kernel/linux/include/linux/mm.h \
   /home/me/kernel/linux/include/linux/blk.h \
   /home/me/kernel/linux/include/linux/sched.h \
   /home/me/kernel/linux/include/linux/version.h \
   /home/me/kernel/linux/include/linux/ioport.h \
   /home/me/kernel/linux/include/asm/page.h \
   /home/me/kernel/linux/include/asm/pgtable.h \
   /home/me/kernel/linux/include/asm/irq.h \
   /home/me/kernel/linux/include/asm/delay.h \
   /home/me/kernel/linux/include/linux/module.h \
   scsi.h \
   hosts.h \
   constants.h \
   lasi700.h \
   53c700.h \
   scsi_module.c
mac53c94.o: mac53c94.c \
   /home/me/kernel/linux/include/linux/kernel.h \
   /home/me/kernel/linux/include/linux/delay.h \
   /home/me/kernel/linux/include/linux/types.h \
   /home/me/kernel/linux/include/linux/string.h \
   /home/me/kernel/linux/include/linux/slab.h \
   /home/me/kernel/linux/include/linux/blk.h \
   /home/me/kernel/linux/include/linux/proc_fs.h \
   /home/me/kernel/linux/include/linux/stat.h \
   /home/me/kernel/linux/include/linux/spinlock.h \
   /home/me/kernel/linux/include/asm/io.h \
   /home/me/kernel/linux/include/asm/pgtable.h \
   /home/me/kernel/linux/include/asm/system.h \
   scsi.h \
   hosts.h \
   mac53c94.h \
   scsi_module.c
mac_NCR5380.o: mac_NCR5380.c \
   /home/me/kernel/linux/include/linux/delay.h \
   /home/me/kernel/linux/include/linux/tqueue.h \
   /home/me/kernel/linux/include/linux/interrupt.h \
   $(wildcard /home/me/kernel/linux/include/config/atari/scsi/toshiba/delay.h) \
   scsi_module.c
mac_esp.o: mac_esp.c \
   /home/me/kernel/linux/include/linux/kernel.h \
   /home/me/kernel/linux/include/linux/delay.h \
   /home/me/kernel/linux/include/linux/types.h \
   /home/me/kernel/linux/include/linux/ctype.h \
   /home/me/kernel/linux/include/linux/string.h \
   /home/me/kernel/linux/include/linux/slab.h \
   /home/me/kernel/linux/include/linux/blk.h \
   /home/me/kernel/linux/include/linux/proc_fs.h \
   /home/me/kernel/linux/include/linux/stat.h \
   /home/me/kernel/linux/include/linux/init.h \
   scsi.h \
   hosts.h \
   NCR53C9x.h \
   mac_esp.h \
   /home/me/kernel/linux/include/asm/io.h \
   /home/me/kernel/linux/include/asm/setup.h \
   /home/me/kernel/linux/include/asm/irq.h \
   /home/me/kernel/linux/include/asm/pgtable.h \
   scsi_module.c
mac_esp.h: \
   NCR53C9x.h
	@touch mac_esp.h
mac_scsi.o: mac_scsi.c \
   /home/me/kernel/linux/include/linux/types.h \
   /home/me/kernel/linux/include/linux/stddef.h \
   /home/me/kernel/linux/include/linux/ctype.h \
   /home/me/kernel/linux/include/linux/delay.h \
   /home/me/kernel/linux/include/linux/module.h \
   /home/me/kernel/linux/include/linux/signal.h \
   /home/me/kernel/linux/include/linux/sched.h \
   /home/me/kernel/linux/include/linux/ioport.h \
   /home/me/kernel/linux/include/linux/init.h \
   /home/me/kernel/linux/include/linux/blk.h \
   /home/me/kernel/linux/include/asm/io.h \
   /home/me/kernel/linux/include/asm/irq.h \
   /home/me/kernel/linux/include/asm/system.h \
   scsi.h \
   hosts.h \
   mac_scsi.h \
   NCR5380.h \
   constants.h \
   NCR5380.c \
   scsi_module.c
mac_scsi.h: \
   /home/me/kernel/linux/include/scsi/scsicam.h
	@touch mac_scsi.h
mca_53c9x.o: mca_53c9x.c \
   /home/me/kernel/linux/include/linux/kernel.h \
   /home/me/kernel/linux/include/linux/delay.h \
   /home/me/kernel/linux/include/linux/types.h \
   /home/me/kernel/linux/include/linux/string.h \
   /home/me/kernel/linux/include/linux/slab.h \
   /home/me/kernel/linux/include/linux/blk.h \
   /home/me/kernel/linux/include/linux/proc_fs.h \
   /home/me/kernel/linux/include/linux/stat.h \
   scsi.h \
   hosts.h \
   NCR53C9x.h \
   mca_53c9x.h \
   /home/me/kernel/linux/include/asm/dma.h \
   /home/me/kernel/linux/include/linux/mca.h \
   /home/me/kernel/linux/include/asm/irq.h \
   /home/me/kernel/linux/include/asm/mca_dma.h \
   /home/me/kernel/linux/include/asm/pgtable.h \
   scsi_module.c
mca_53c9x.h: \
   NCR53C9x.h
	@touch mca_53c9x.h
megaraid.o: megaraid.c \
   /home/me/kernel/linux/include/linux/version.h \
   /home/me/kernel/linux/include/linux/module.h \
   /home/me/kernel/linux/include/linux/types.h \
   /home/me/kernel/linux/include/linux/errno.h \
   /home/me/kernel/linux/include/linux/string.h \
   /home/me/kernel/linux/include/linux/kernel.h \
   /home/me/kernel/linux/include/linux/ioport.h \
   /home/me/kernel/linux/include/linux/fcntl.h \
   /home/me/kernel/linux/include/linux/delay.h \
   /home/me/kernel/linux/include/linux/pci.h \
   /home/me/kernel/linux/include/linux/proc_fs.h \
   /home/me/kernel/linux/include/linux/blk.h \
   /home/me/kernel/linux/include/linux/wait.h \
   /home/me/kernel/linux/include/linux/tqueue.h \
   /home/me/kernel/linux/include/linux/interrupt.h \
   /home/me/kernel/linux/include/linux/mm.h \
   /home/me/kernel/linux/include/asm/pgtable.h \
   /home/me/kernel/linux/include/linux/sched.h \
   /home/me/kernel/linux/include/linux/stat.h \
   /home/me/kernel/linux/include/linux/slab.h \
   /home/me/kernel/linux/include/asm/spinlock.h \
   /home/me/kernel/linux/include/linux/spinlock.h \
   /home/me/kernel/linux/include/asm/io.h \
   /home/me/kernel/linux/include/asm/irq.h \
   /home/me/kernel/linux/include/asm/uaccess.h \
   /home/me/kernel/linux/include/linux/notifier.h \
   /home/me/kernel/linux/include/linux/reboot.h \
   /home/me/kernel/linux/include/linux/init.h \
   sd.h \
   scsi.h \
   hosts.h \
   megaraid.h \
   /home/me/kernel/linux/include/linux/smp.h \
   $(wildcard /home/me/kernel/linux/include/config/proc/fs.h) \
   scsi_module.c
megaraid.h: \
   /home/me/kernel/linux/include/linux/version.h
	@touch megaraid.h
mesh.o: mesh.c \
   /home/me/kernel/linux/include/linux/kernel.h \
   /home/me/kernel/linux/include/linux/delay.h \
   /home/me/kernel/linux/include/linux/types.h \
   /home/me/kernel/linux/include/linux/string.h \
   /home/me/kernel/linux/include/linux/slab.h \
   /home/me/kernel/linux/include/linux/blk.h \
   /home/me/kernel/linux/include/linux/proc_fs.h \
   /home/me/kernel/linux/include/linux/stat.h \
   /home/me/kernel/linux/include/linux/tqueue.h \
   /home/me/kernel/linux/include/linux/interrupt.h \
   /home/me/kernel/linux/include/linux/reboot.h \
   /home/me/kernel/linux/include/linux/spinlock.h \
   /home/me/kernel/linux/include/asm/io.h \
   /home/me/kernel/linux/include/asm/pgtable.h \
   /home/me/kernel/linux/include/asm/system.h \
   /home/me/kernel/linux/include/asm/irq.h \
   /home/me/kernel/linux/include/asm/processor.h \
   $(wildcard /home/me/kernel/linux/include/config/pmac/pbook.h) \
   /home/me/kernel/linux/include/linux/adb.h \
   /home/me/kernel/linux/include/linux/pmu.h \
   scsi.h \
   hosts.h \
   mesh.h \
   $(wildcard /home/me/kernel/linux/include/config/scsi/mesh/sync/rate.h) \
   scsi_module.c
mvme147.o: mvme147.c \
   /home/me/kernel/linux/include/linux/types.h \
   /home/me/kernel/linux/include/linux/mm.h \
   /home/me/kernel/linux/include/linux/blk.h \
   /home/me/kernel/linux/include/linux/sched.h \
   /home/me/kernel/linux/include/linux/version.h \
   /home/me/kernel/linux/include/asm/page.h \
   /home/me/kernel/linux/include/asm/pgtable.h \
   /home/me/kernel/linux/include/asm/irq.h \
   scsi.h \
   hosts.h \
   wd33c93.h \
   mvme147.h \
   /home/me/kernel/linux/include/linux/stat.h \
   mvme147.h \
   scsi_module.c
mvme147.h: \
   /home/me/kernel/linux/include/linux/types.h
	@touch mvme147.h
mvme16x.o: mvme16x.c \
   /home/me/kernel/linux/include/linux/types.h \
   /home/me/kernel/linux/include/linux/mm.h \
   /home/me/kernel/linux/include/linux/blk.h \
   /home/me/kernel/linux/include/linux/sched.h \
   /home/me/kernel/linux/include/linux/version.h \
   /home/me/kernel/linux/include/asm/page.h \
   /home/me/kernel/linux/include/asm/pgtable.h \
   /home/me/kernel/linux/include/asm/irq.h \
   scsi.h \
   hosts.h \
   53c7xx.h \
   mvme16x.h \
   /home/me/kernel/linux/include/linux/stat.h \
   scsi_module.c
mvme16x.h: \
   /home/me/kernel/linux/include/linux/types.h \
   /home/me/kernel/linux/include/scsi/scsicam.h
	@touch mvme16x.h
ncr53c8xx.o: ncr53c8xx.c \
   /home/me/kernel/linux/include/linux/module.h \
   /home/me/kernel/linux/include/asm/dma.h \
   /home/me/kernel/linux/include/asm/io.h \
   /home/me/kernel/linux/include/asm/system.h \
   /home/me/kernel/linux/include/linux/spinlock.h \
   /home/me/kernel/linux/include/asm/spinlock.h \
   /home/me/kernel/linux/include/linux/delay.h \
   /home/me/kernel/linux/include/linux/signal.h \
   /home/me/kernel/linux/include/linux/sched.h \
   /home/me/kernel/linux/include/linux/errno.h \
   /home/me/kernel/linux/include/linux/pci.h \
   /home/me/kernel/linux/include/linux/string.h \
   /home/me/kernel/linux/include/linux/mm.h \
   /home/me/kernel/linux/include/linux/ioport.h \
   /home/me/kernel/linux/include/linux/time.h \
   /home/me/kernel/linux/include/linux/timer.h \
   /home/me/kernel/linux/include/linux/stat.h \
   /home/me/kernel/linux/include/linux/version.h \
   /home/me/kernel/linux/include/linux/blk.h \
   /home/me/kernel/linux/include/linux/init.h \
   scsi.h \
   hosts.h \
   constants.h \
   sd.h \
   /home/me/kernel/linux/include/linux/types.h \
   ncr53c8xx.h \
   sym53c8xx_comm.h \
   scsi_module.c
ncr53c8xx.h: \
   sym53c8xx_defs.h \
   /home/me/kernel/linux/include/scsi/scsicam.h
	@touch ncr53c8xx.h
oktagon_esp.o: oktagon_esp.c \
   $(wildcard /home/me/kernel/linux/include/config/amiga.h) \
   $(wildcard /home/me/kernel/linux/include/config/apus.h) \
   /home/me/kernel/linux/include/linux/module.h \
   /home/me/kernel/linux/include/linux/kernel.h \
   /home/me/kernel/linux/include/linux/delay.h \
   /home/me/kernel/linux/include/linux/types.h \
   /home/me/kernel/linux/include/linux/string.h \
   /home/me/kernel/linux/include/linux/slab.h \
   /home/me/kernel/linux/include/linux/blk.h \
   /home/me/kernel/linux/include/linux/proc_fs.h \
   /home/me/kernel/linux/include/linux/stat.h \
   /home/me/kernel/linux/include/linux/reboot.h \
   /home/me/kernel/linux/include/asm/system.h \
   /home/me/kernel/linux/include/asm/ptrace.h \
   /home/me/kernel/linux/include/asm/pgtable.h \
   scsi.h \
   hosts.h \
   NCR53C9x.h \
   oktagon_esp.h \
   /home/me/kernel/linux/include/linux/zorro.h \
   /home/me/kernel/linux/include/asm/irq.h \
   /home/me/kernel/linux/include/linux/tqueue.h \
   /home/me/kernel/linux/include/linux/interrupt.h \
   /home/me/kernel/linux/include/linux/unistd.h \
   oktagon_esp.h \
   scsi_module.c
oktagon_esp.h: \
   NCR53C9x.h
	@touch oktagon_esp.h
oktagon_io.o: oktagon_io.S \
   $(wildcard /home/me/kernel/linux/include/config/apus.h) \
   $(wildcard /home/me/kernel/linux/include/config/amiga.h)
osst.o: osst.c \
   /home/me/kernel/linux/include/linux/module.h \
   /home/me/kernel/linux/include/linux/fs.h \
   /home/me/kernel/linux/include/linux/kernel.h \
   /home/me/kernel/linux/include/linux/sched.h \
   /home/me/kernel/linux/include/linux/mm.h \
   /home/me/kernel/linux/include/linux/init.h \
   /home/me/kernel/linux/include/linux/string.h \
   /home/me/kernel/linux/include/linux/errno.h \
   /home/me/kernel/linux/include/linux/mtio.h \
   /home/me/kernel/linux/include/linux/ioctl.h \
   /home/me/kernel/linux/include/linux/fcntl.h \
   /home/me/kernel/linux/include/linux/spinlock.h \
   /home/me/kernel/linux/include/linux/vmalloc.h \
   /home/me/kernel/linux/include/linux/version.h \
   /home/me/kernel/linux/include/asm/uaccess.h \
   /home/me/kernel/linux/include/asm/dma.h \
   /home/me/kernel/linux/include/asm/system.h \
   /home/me/kernel/linux/include/linux/blk.h \
   scsi.h \
   hosts.h \
   /home/me/kernel/linux/include/scsi/scsi_ioctl.h \
   st.h \
   osst.h \
   osst_options.h \
   osst_detect.h \
   constants.h \
   $(wildcard /home/me/kernel/linux/include/config/devfs/fs.h)
osst.h: \
   /home/me/kernel/linux/include/asm/byteorder.h \
   /home/me/kernel/linux/include/linux/completion.h \
   $(wildcard /home/me/kernel/linux/include/config/devfs/fs.h) \
   /home/me/kernel/linux/include/linux/devfs_fs_kernel.h
	@touch osst.h
pas16.o: pas16.c \
   /home/me/kernel/linux/include/linux/module.h \
   /home/me/kernel/linux/include/asm/system.h \
   /home/me/kernel/linux/include/linux/signal.h \
   /home/me/kernel/linux/include/linux/proc_fs.h \
   /home/me/kernel/linux/include/linux/sched.h \
   /home/me/kernel/linux/include/asm/io.h \
   /home/me/kernel/linux/include/linux/blk.h \
   scsi.h \
   hosts.h \
   pas16.h \
   NCR5380.h \
   constants.h \
   sd.h \
   /home/me/kernel/linux/include/linux/stat.h \
   /home/me/kernel/linux/include/linux/init.h \
   NCR5380.c \
   scsi_module.c
pci2000.o: pci2000.c \
   /home/me/kernel/linux/include/linux/module.h \
   /home/me/kernel/linux/include/linux/kernel.h \
   /home/me/kernel/linux/include/linux/types.h \
   /home/me/kernel/linux/include/linux/string.h \
   /home/me/kernel/linux/include/linux/pci.h \
   /home/me/kernel/linux/include/linux/ioport.h \
   /home/me/kernel/linux/include/linux/delay.h \
   /home/me/kernel/linux/include/linux/sched.h \
   /home/me/kernel/linux/include/linux/proc_fs.h \
   /home/me/kernel/linux/include/asm/dma.h \
   /home/me/kernel/linux/include/asm/system.h \
   /home/me/kernel/linux/include/asm/io.h \
   /home/me/kernel/linux/include/linux/blk.h \
   scsi.h \
   hosts.h \
   /home/me/kernel/linux/include/linux/stat.h \
   /home/me/kernel/linux/include/linux/spinlock.h \
   pci2000.h \
   psi_roy.h \
   sd.h \
   scsi_module.c
pci2000.h: \
   /home/me/kernel/linux/include/linux/types.h \
   /home/me/kernel/linux/include/linux/kdev_t.h \
   /home/me/kernel/linux/include/linux/version.h
	@touch pci2000.h
pci2220i.o: pci2220i.c \
   /home/me/kernel/linux/include/linux/module.h \
   /home/me/kernel/linux/include/linux/kernel.h \
   /home/me/kernel/linux/include/linux/types.h \
   /home/me/kernel/linux/include/linux/string.h \
   /home/me/kernel/linux/include/linux/slab.h \
   /home/me/kernel/linux/include/linux/pci.h \
   /home/me/kernel/linux/include/linux/ioport.h \
   /home/me/kernel/linux/include/linux/delay.h \
   /home/me/kernel/linux/include/linux/sched.h \
   /home/me/kernel/linux/include/linux/proc_fs.h \
   /home/me/kernel/linux/include/linux/stat.h \
   /home/me/kernel/linux/include/linux/kdev_t.h \
   /home/me/kernel/linux/include/linux/blk.h \
   /home/me/kernel/linux/include/linux/timer.h \
   /home/me/kernel/linux/include/linux/spinlock.h \
   /home/me/kernel/linux/include/asm/dma.h \
   /home/me/kernel/linux/include/asm/system.h \
   /home/me/kernel/linux/include/asm/io.h \
   scsi.h \
   hosts.h \
   pci2220i.h \
   psi_dale.h \
   sd.h \
   scsi_module.c
pci2220i.h: \
   /home/me/kernel/linux/include/linux/version.h
	@touch pci2220i.h
pluto.o: pluto.c \
   /home/me/kernel/linux/include/linux/kernel.h \
   /home/me/kernel/linux/include/linux/delay.h \
   /home/me/kernel/linux/include/linux/types.h \
   /home/me/kernel/linux/include/linux/string.h \
   /home/me/kernel/linux/include/linux/slab.h \
   /home/me/kernel/linux/include/linux/blk.h \
   /home/me/kernel/linux/include/linux/proc_fs.h \
   /home/me/kernel/linux/include/linux/stat.h \
   /home/me/kernel/linux/include/linux/init.h \
   $(wildcard /home/me/kernel/linux/include/config/kmod.h) \
   /home/me/kernel/linux/include/linux/kmod.h \
   /home/me/kernel/linux/include/asm/irq.h \
   scsi.h \
   hosts.h \
   ../fc4/fcp_impl.h \
   pluto.h \
   /home/me/kernel/linux/include/linux/module.h \
   $(wildcard /home/me/kernel/linux/include/config/fc4/soc/module.h) \
   scsi_module.c
pluto.h: \
   ../fc4/fcp_impl.h
	@touch pluto.h
ppa.o: ppa.c \
   /home/me/kernel/linux/include/linux/blk.h \
   /home/me/kernel/linux/include/asm/io.h \
   /home/me/kernel/linux/include/linux/parport.h \
   sd.h \
   hosts.h \
   ppa.h \
   scsi_module.c \
   $(wildcard /home/me/kernel/linux/include/config/scsi/izip/epp16.h) \
   $(wildcard /home/me/kernel/linux/include/config/parport.h) \
   $(wildcard /home/me/kernel/linux/include/config/parport/module.h)
ppa.h: \
   /home/me/kernel/linux/include/linux/stddef.h \
   /home/me/kernel/linux/include/linux/module.h \
   /home/me/kernel/linux/include/linux/kernel.h \
   /home/me/kernel/linux/include/linux/tqueue.h \
   /home/me/kernel/linux/include/linux/ioport.h \
   /home/me/kernel/linux/include/linux/delay.h \
   /home/me/kernel/linux/include/linux/proc_fs.h \
   /home/me/kernel/linux/include/linux/stat.h \
   /home/me/kernel/linux/include/linux/blk.h \
   /home/me/kernel/linux/include/linux/sched.h \
   /home/me/kernel/linux/include/linux/interrupt.h \
   /home/me/kernel/linux/include/asm/io.h \
   sd.h \
   hosts.h \
   $(wildcard /home/me/kernel/linux/include/config/scsi/izip/epp16.h) \
   $(wildcard /home/me/kernel/linux/include/config/scsi/izip/slow/ctr.h)
	@touch ppa.h
psi240i.o: psi240i.c \
   /home/me/kernel/linux/include/linux/module.h \
   /home/me/kernel/linux/include/linux/kernel.h \
   /home/me/kernel/linux/include/linux/types.h \
   /home/me/kernel/linux/include/linux/string.h \
   /home/me/kernel/linux/include/linux/ioport.h \
   /home/me/kernel/linux/include/linux/delay.h \
   /home/me/kernel/linux/include/linux/sched.h \
   /home/me/kernel/linux/include/linux/proc_fs.h \
   /home/me/kernel/linux/include/linux/spinlock.h \
   /home/me/kernel/linux/include/asm/dma.h \
   /home/me/kernel/linux/include/asm/system.h \
   /home/me/kernel/linux/include/asm/io.h \
   /home/me/kernel/linux/include/linux/blk.h \
   scsi.h \
   hosts.h \
   psi240i.h \
   psi_chip.h \
   /home/me/kernel/linux/include/linux/stat.h \
   sd.h \
   scsi_module.c
psi240i.h: \
   /home/me/kernel/linux/include/linux/types.h \
   /home/me/kernel/linux/include/linux/kdev_t.h
	@touch psi240i.h
qla1280.o: qla1280.c \
   /home/me/kernel/linux/include/linux/module.h \
   /home/me/kernel/linux/include/asm/io.h \
   /home/me/kernel/linux/include/asm/irq.h \
   /home/me/kernel/linux/include/asm/segment.h \
   /home/me/kernel/linux/include/asm/byteorder.h \
   /home/me/kernel/linux/include/linux/version.h \
   /home/me/kernel/linux/include/linux/types.h \
   /home/me/kernel/linux/include/linux/string.h \
   /home/me/kernel/linux/include/linux/errno.h \
   /home/me/kernel/linux/include/linux/kernel.h \
   /home/me/kernel/linux/include/linux/ioport.h \
   /home/me/kernel/linux/include/linux/delay.h \
   /home/me/kernel/linux/include/linux/timer.h \
   /home/me/kernel/linux/include/linux/sched.h \
   /home/me/kernel/linux/include/linux/pci.h \
   /home/me/kernel/linux/include/linux/proc_fs.h \
   /home/me/kernel/linux/include/linux/blk.h \
   /home/me/kernel/linux/include/linux/tqueue.h \
   sd.h \
   scsi.h \
   hosts.h \
   qla1280.h \
   ql12160_fw.h \
   ql1280_fw.h \
   /home/me/kernel/linux/include/linux/stat.h \
   /home/me/kernel/linux/include/linux/slab.h \
   scsi_module.c
qla1280.h: \
   /home/me/kernel/linux/include/linux/version.h \
   /home/me/kernel/linux/include/linux/spinlock.h \
   /home/me/kernel/linux/include/linux/smp.h
	@touch qla1280.h
qlogicfas.o: qlogicfas.c \
   /home/me/kernel/linux/include/linux/module.h \
   /home/me/kernel/linux/include/linux/blk.h \
   /home/me/kernel/linux/include/linux/kernel.h \
   /home/me/kernel/linux/include/linux/string.h \
   /home/me/kernel/linux/include/linux/init.h \
   /home/me/kernel/linux/include/linux/ioport.h \
   /home/me/kernel/linux/include/linux/sched.h \
   /home/me/kernel/linux/include/linux/proc_fs.h \
   /home/me/kernel/linux/include/linux/unistd.h \
   /home/me/kernel/linux/include/linux/spinlock.h \
   /home/me/kernel/linux/include/asm/io.h \
   /home/me/kernel/linux/include/asm/irq.h \
   sd.h \
   hosts.h \
   qlogicfas.h \
   /home/me/kernel/linux/include/linux/stat.h \
   scsi_module.c
qlogicfc.o: qlogicfc.c \
   /home/me/kernel/linux/include/linux/blk.h \
   /home/me/kernel/linux/include/linux/kernel.h \
   /home/me/kernel/linux/include/linux/string.h \
   /home/me/kernel/linux/include/linux/ioport.h \
   /home/me/kernel/linux/include/linux/sched.h \
   /home/me/kernel/linux/include/linux/types.h \
   /home/me/kernel/linux/include/linux/pci.h \
   /home/me/kernel/linux/include/linux/delay.h \
   /home/me/kernel/linux/include/linux/unistd.h \
   /home/me/kernel/linux/include/linux/spinlock.h \
   /home/me/kernel/linux/include/asm/io.h \
   /home/me/kernel/linux/include/asm/irq.h \
   sd.h \
   hosts.h \
   qlogicfc.h \
   /home/me/kernel/linux/include/linux/module.h \
   $(wildcard /home/me/kernel/linux/include/config/scsi/qlogic/fc/firmware.h) \
   qlogicfc_asm.c \
   scsi_module.c
qlogicisp.o: qlogicisp.c \
   /home/me/kernel/linux/include/linux/blk.h \
   /home/me/kernel/linux/include/linux/kernel.h \
   /home/me/kernel/linux/include/linux/string.h \
   /home/me/kernel/linux/include/linux/ioport.h \
   /home/me/kernel/linux/include/linux/sched.h \
   /home/me/kernel/linux/include/linux/types.h \
   /home/me/kernel/linux/include/linux/pci.h \
   /home/me/kernel/linux/include/linux/delay.h \
   /home/me/kernel/linux/include/linux/unistd.h \
   /home/me/kernel/linux/include/linux/spinlock.h \
   /home/me/kernel/linux/include/asm/io.h \
   /home/me/kernel/linux/include/asm/irq.h \
   /home/me/kernel/linux/include/asm/byteorder.h \
   sd.h \
   hosts.h \
   qlogicisp.h \
   /home/me/kernel/linux/include/linux/module.h \
   $(wildcard /home/me/kernel/linux/include/config/ql/isp/a64.h) \
   qlogicisp_asm.c \
   scsi_module.c
qlogicpti.o: qlogicpti.c \
   /home/me/kernel/linux/include/linux/kernel.h \
   /home/me/kernel/linux/include/linux/delay.h \
   /home/me/kernel/linux/include/linux/types.h \
   /home/me/kernel/linux/include/linux/string.h \
   /home/me/kernel/linux/include/linux/slab.h \
   /home/me/kernel/linux/include/linux/blk.h \
   /home/me/kernel/linux/include/linux/proc_fs.h \
   /home/me/kernel/linux/include/linux/stat.h \
   /home/me/kernel/linux/include/linux/init.h \
   /home/me/kernel/linux/include/linux/spinlock.h \
   /home/me/kernel/linux/include/asm/byteorder.h \
   scsi.h \
   hosts.h \
   qlogicpti.h \
   /home/me/kernel/linux/include/asm/dma.h \
   /home/me/kernel/linux/include/asm/system.h \
   /home/me/kernel/linux/include/asm/ptrace.h \
   /home/me/kernel/linux/include/asm/pgtable.h \
   /home/me/kernel/linux/include/asm/io.h \
   /home/me/kernel/linux/include/asm/irq.h \
   /home/me/kernel/linux/include/linux/module.h \
   qlogicpti_asm.c \
   scsi_module.c
scsi.o: scsi.c \
   /home/me/kernel/linux/include/linux/module.h \
   /home/me/kernel/linux/include/linux/sched.h \
   /home/me/kernel/linux/include/linux/timer.h \
   /home/me/kernel/linux/include/linux/string.h \
   /home/me/kernel/linux/include/linux/slab.h \
   /home/me/kernel/linux/include/linux/ioport.h \
   /home/me/kernel/linux/include/linux/kernel.h \
   /home/me/kernel/linux/include/linux/stat.h \
   /home/me/kernel/linux/include/linux/blk.h \
   /home/me/kernel/linux/include/linux/interrupt.h \
   /home/me/kernel/linux/include/linux/delay.h \
   /home/me/kernel/linux/include/linux/init.h \
   /home/me/kernel/linux/include/linux/smp_lock.h \
   /home/me/kernel/linux/include/linux/completion.h \
   /home/me/kernel/linux/include/linux/unistd.h \
   /home/me/kernel/linux/include/linux/spinlock.h \
   /home/me/kernel/linux/include/asm/system.h \
   /home/me/kernel/linux/include/asm/irq.h \
   /home/me/kernel/linux/include/asm/dma.h \
   /home/me/kernel/linux/include/asm/uaccess.h \
   scsi.h \
   hosts.h \
   constants.h \
   $(wildcard /home/me/kernel/linux/include/config/kmod.h) \
   /home/me/kernel/linux/include/linux/kmod.h \
   $(wildcard /home/me/kernel/linux/include/config/proc/fs.h) \
   $(wildcard /home/me/kernel/linux/include/config/scsi/logging.h)
scsi.h: \
   /home/me/kernel/linux/include/linux/devfs_fs_kernel.h \
   /home/me/kernel/linux/include/linux/proc_fs.h \
   /home/me/kernel/linux/include/scsi/scsi.h \
   /home/me/kernel/linux/include/linux/random.h \
   /home/me/kernel/linux/include/asm/hardirq.h \
   /home/me/kernel/linux/include/asm/scatterlist.h \
   /home/me/kernel/linux/include/asm/io.h \
   $(wildcard /home/me/kernel/linux/include/config/pci.h) \
   /home/me/kernel/linux/include/linux/pci.h \
   $(wildcard /home/me/kernel/linux/include/config/sbus.h) \
   $(wildcard /home/me/kernel/linux/include/config/sun3.h) \
   $(wildcard /home/me/kernel/linux/include/config/sun3x.h) \
   $(wildcard /home/me/kernel/linux/include/config/smp.h) \
   $(wildcard /home/me/kernel/linux/include/config/user/debug.h) \
   $(wildcard /home/me/kernel/linux/include/config/scsi/logging.h) \
   $(wildcard /home/me/kernel/linux/include/config/apus.h) \
   /home/me/kernel/linux/include/asm/pgtable.h \
   scsi_obsolete.h
	@touch scsi.h
scsi_debug.o: scsi_debug.c \
   /home/me/kernel/linux/include/linux/module.h \
   /home/me/kernel/linux/include/linux/kernel.h \
   /home/me/kernel/linux/include/linux/sched.h \
   /home/me/kernel/linux/include/linux/errno.h \
   /home/me/kernel/linux/include/linux/timer.h \
   /home/me/kernel/linux/include/linux/types.h \
   /home/me/kernel/linux/include/linux/string.h \
   /home/me/kernel/linux/include/linux/genhd.h \
   /home/me/kernel/linux/include/linux/fs.h \
   /home/me/kernel/linux/include/linux/init.h \
   /home/me/kernel/linux/include/linux/proc_fs.h \
   /home/me/kernel/linux/include/linux/smp_lock.h \
   /home/me/kernel/linux/include/asm/system.h \
   /home/me/kernel/linux/include/asm/io.h \
   /home/me/kernel/linux/include/linux/blk.h \
   scsi.h \
   hosts.h \
   /home/me/kernel/linux/include/linux/stat.h \
   /home/me/kernel/linux/include/linux/version.h \
   scsi_debug.h \
   scsi_module.c
scsi_debug.h: \
   /home/me/kernel/linux/include/linux/types.h \
   /home/me/kernel/linux/include/linux/kdev_t.h
	@touch scsi_debug.h
scsi_dma.o: scsi_dma.c \
   /home/me/kernel/linux/include/linux/module.h \
   /home/me/kernel/linux/include/linux/blk.h \
   scsi.h \
   hosts.h \
   constants.h \
   $(wildcard /home/me/kernel/linux/include/config/kmod.h) \
   /home/me/kernel/linux/include/linux/kmod.h
scsi_error.o: scsi_error.c \
   /home/me/kernel/linux/include/linux/module.h \
   /home/me/kernel/linux/include/linux/sched.h \
   /home/me/kernel/linux/include/linux/timer.h \
   /home/me/kernel/linux/include/linux/string.h \GS+(3*4)
set EXC_A2,		EXC_AREGS+(2*4)
set EXC_A1,		EXC_AREGS+(1*4)
set EXC_A0,		EXC_AREGS+(0*4)
set EXC_D7,		EXC_DREGS+(7*4)
set EXC_D6,		EXC_DREGS+(6*4)
set EXC_D5,		EXC_DREGS+(5*4)
set EXC_D4,		EXC_DREGS+(4*4)
set EXC_D3,		EXC_DREGS+(3*4)
set EXC_D2,		EXC_DREGS+(2*4)
set EXC_D1,		EXC_DREGS+(1*4)
set EXC_D0,		EXC_DREGS+(0*4)

set EXC_FP0, 		EXC_FPREGS+(0*12)	# offset of saved fp0
set EXC_FP1, 		EXC_FPREGS+(1*12)	# offset of saved fp1
set EXC_FP2, 		EXC_FPREGS+(2*12)	# offset of saved fp2 (not used)

set FP_SCR1, 		LV+80			# fp scratch 1
set FP_SCR1_EX, 	FP_SCR1+0
set FP_SCR1_SGN,	FP_SCR1+2
set FP_SCR1_HI, 	FP_SCR1+4
set FP_SCR1_LO, 	FP_SCR1+8

set FP_SCR0, 		LV+68			# fp scratch 0
set FP_SCR0_EX, 	FP_SCR0+0
set FP_SCR0_SGN,	FP_SCR0+2
set FP_SCR0_HI, 	FP_SCR0+4
set FP_SCR0_LO, 	FP_SCR0+8

set FP_DST, 		LV+56			# fp destination operand
set FP_DST_EX, 		FP_DST+0
set FP_DST_SGN,		FP_DST+2
set FP_DST_HI, 		FP_DST+4
set FP_DST_LO, 		FP_DST+8

set FP_SRC, 		LV+44			# fp source operand
set FP_SRC_EX, 		FP_SRC+0
set FP_SRC_SGN,		FP_SRC+2
set FP_SRC_HI, 		FP_SRC+4
set FP_SRC_LO, 		FP_SRC+8

set USER_FPIAR,		LV+40			# FP instr address register

set USER_FPSR,		LV+36			# FP status register
set FPSR_CC,		USER_FPSR+0		# FPSR condition codes
set FPSR_QBYTE,		USER_FPSR+1		# FPSR qoutient byte
set FPSR_EXCEPT,	USER_FPSR+2		# FPSR exception status byte
set FPSR_AEXCEPT,	USER_FPSR+3		# FPSR accrued exception byte

set USER_FPCR,		LV+32			# FP control register
set FPCR_ENABLE,	USER_FPCR+2		# FPCR exception enable
set FPCR_MODE,		USER_FPCR+3		# FPCR rounding mode control

set L_SCR3,		LV+28			# integer scratch 3
set L_SCR2,		LV+24			# integer scratch 2
set L_SCR1,		LV+20			# integer scratch 1

set STORE_FLG,		LV+19			# flag: operand store (ie. not fcmp/ftst)

set EXC_TEMP2,		LV+24			# temporary space
set EXC_TEMP,		LV+16			# temporary space

set DTAG,		LV+15			# destination operand type
set STAG, 		LV+14			# source operand type

set SPCOND_FLG,		LV+10			# flag: special case (see below)

set EXC_CC,		LV+8			# saved condition codes
set EXC_EXTWPTR,	LV+4			# saved current PC (active)
set EXC_EXTWORD,	LV+2			# saved extension word
set EXC_CMDREG,		LV+2			# saved extension word
set EXC_OPWORD,		LV+0			# saved operation word

################################

# Helpful macros

set FTEMP,		0			# offsets within an
set FTEMP_EX, 		0			# extended precision
set FTEMP_SGN,		2			# value saved in memory.
set FTEMP_HI, 		4
set FTEMP_LO, 		8
set FTEMP_GRS,		12

set LOCAL,		0			# offsets within an
set LOCAL_EX, 		0			# extended precision 
set LOCAL_SGN,		2			# value saved in memory.
set LOCAL_HI, 		4
set LOCAL_LO, 		8
set LOCAL_GRS,		12

set DST,		0			# offsets within an
set DST_EX,		0			# extended precision
set DST_HI,		4			# value saved in memory.
set DST_LO,		8

set SRC,		0			# offsets within an
set SRC_EX,		0			# extended precision
set SRC_HI,		4			# value saved in memory.
set SRC_LO,		8

set SGL_LO,		0x3f81			# min sgl prec exponent
set SGL_HI,		0x407e			# max sgl prec exponent
set DBL_LO,		0x3c01			# min dbl prec exponent
set DBL_HI,		0x43fe			# max dbl prec exponent
set EXT_LO,		0x0			# min ext prec exponent
set EXT_HI,		0x7ffe			# max ext prec exponent

set EXT_BIAS,		0x3fff			# extended precision bias
set SGL_BIAS,		0x007f			# single precision bias
set DBL_BIAS,		0x03ff			# double precision bias

set NORM,		0x00			# operand type for STAG/DTAG
set ZERO,		0x01			# operand type for STAG/DTAG
set INF,		0x02			# operand type for STAG/DTAG
set QNAN,		0x03			# operand type for STAG/DTAG
set DENORM,		0x04			# operand type for STAG/DTAG
set SNAN,		0x05			# operand type for STAG/DTAG
set UNNORM,		0x06			# operand type for STAG/DTAG

##################
# FPSR/FPCR bits #
##################
set neg_bit,		0x3			# negative result
set z_bit,		0x2			# zero result
set inf_bit,		0x1			# infinite result
set nan_bit,		0x0			# NAN result

set q_sn_bit,		0x7			# sign bit of quotient byte

set bsun_bit,		7			# branch on unordered
set snan_bit,		6			# signalling NAN
set operr_bit,		5			# operand error
set ovfl_bit,		4			# overflow
set unfl_bit,		3			# underflow
set dz_bit,		2			# divide by zero
set inex2_bit,		1			# inexact result 2
set inex1_bit,		0			# inexact result 1

set aiop_bit,		7			# accrued inexact operation bit
set aovfl_bit,		6			# accrued overflow bit
set aunfl_bit,		5			# accrued underflow bit
set adz_bit,		4			# accrued dz bit
set ainex_bit,		3			# accrued inexact bit

#############################
# FPSR individual bit masks #
#############################
set neg_mask,		0x08000000		# negative bit mask (lw)
set inf_mask,		0x02000000		# infinity bit mask (lw)
set z_mask,		0x04000000		# zero bit mask (lw)
set nan_mask,		0x01000000		# nan bit mask (lw)

set neg_bmask,		0x08			# negative bit mask (byte)
set inf_bmask,		0x02			# infinity bit mask (byte)
set z_bmask,		0x04			# zero bit mask (byte)
set nan_bmask,		0x01			# nan bit mask (byte)

set bsun_mask,		0x00008000		# bsun exception mask
set snan_mask,		0x00004000		# snan exception mask
set operr_mask,		0x00002000		# operr exception mask
set ovfl_mask,		0x00001000		# overflow exception mask
set unfl_mask,		0x00000800		# underflow exception mask
set dz_mask,		0x00000400		# dz exception mask
set inex2_mask,		0x00000200		# inex2 exception mask
set inex1_mask,		0x00000100		# inex1 exception mask

set aiop_mask,		0x00000080		# accrued illegal operation
set aovfl_mask,		0x00000040		# accrued overflow
set aunfl_mask,		0x00000020		# accrued underflow
set adz_mask,		0x00000010		# accrued divide by zero
set ainex_mask,		0x00000008		# accrued inexact

######################################
# FPSR combinations used in the FPSP #
######################################
set dzinf_mask,		inf_mask+dz_mask+adz_mask
set opnan_mask,		nan_mask+operr_mask+aiop_mask
set nzi_mask,		0x01ffffff 		#clears N, Z, and I
set unfinx_mask,	unfl_mask+inex2_mask+aunfl_mask+ainex_mask
set unf2inx_mask,	unfl_mask+inex2_mask+ainex_mask
set ovfinx_mask,	ovfl_mask+inex2_mask+aovfl_mask+ainex_mask
set inx1a_mask,		inex1_mask+ainex_mask
set inx2a_mask,		inex2_mask+ainex_mask
set snaniop_mask, 	nan_mask+snan_mask+aiop_mask
set snaniop2_mask,	snan_mask+aiop_mask
set naniop_mask,	nan_mask+aiop_mask
set neginf_mask,	neg_mask+inf_mask
set infaiop_mask, 	inf_mask+aiop_mask
set negz_mask,		neg_mask+z_mask
set opaop_mask,		operr_mask+aiop_mask
set unfl_inx_mask,	unfl_mask+aunfl_mask+ainex_mask
set ovfl_inx_mask,	ovfl_mask+aovfl_mask+ainex_mask

#########
# misc. #
#########
set rnd_stky_bit,	29			# stky bit pos in longword

set sign_bit,		0x7			# sign bit
set signan_bit,		0x6			# signalling nan bit

set sgl_thresh,		0x3f81			# minimum sgl exponent
set dbl_thresh,		0x3c01			# minimum dbl exponent

set x_mode,		0x0			# extended precision
set s_mode,		0x4			# single precision
set d_mode,		0x8			# double precision

set rn_mode,		0x0			# round-to-nearest
set rz_mode,		0x1			# round-to-zero
set rm_mode,		0x2			# round-tp-minus-infinity
set rp_mode,		0x3			# round-to-plus-infinity

set mantissalen,	64			# length of mantissa in bits

set BYTE,		1			# len(byte) == 1 byte
set WORD, 		2			# len(word) == 2 bytes
set LONG, 		4			# len(longword) == 2 bytes

set BSUN_VEC,		0xc0			# bsun    vector offset
set INEX_VEC,		0xc4			# inexact vector offset
set DZ_VEC,		0xc8			# dz      vector offset
set UNFL_VEC,		0xcc			# unfl    vector offset
set OPERR_VEC,		0xd0			# operr   vector offset
set OVFL_VEC,		0xd4			# ovfl    vector offset
set SNAN_VEC,		0xd8			# snan    vector offset

###########################
# SPecial CONDition FLaGs #
###########################
set ftrapcc_flg,	0x01			# flag bit: ftrapcc exception
set fbsun_flg,		0x02			# flag bit: bsun exception
set mia7_flg,		0x04			# flag bit: (a7)+ <ea>
set mda7_flg,		0x08			# flag bit: -(a7) <ea>
set fmovm_flg,		0x40			# flag bit: fmovm instruction
set immed_flg,		0x80			# flag bit: &<data> <ea>

set ftrapcc_bit,	0x0
set fbsun_bit,		0x1
set mia7_bit,		0x2
set mda7_bit,		0x3
set immed_bit,		0x7

##################################
# TRANSCENDENTAL "LAST-OP" FLAGS #
##################################
set FMUL_OP,		0x0			# fmul instr performed last
set FDIV_OP,		0x1			# fdiv performed last
set FADD_OP,		0x2			# fadd performed last
set FMOV_OP,		0x3			# fmov performed last

#############
# CONSTANTS #
#############
T1:	long		0x40C62D38,0xD3D64634	# 16381 LOG2 LEAD
T2:	long		0x3D6F90AE,0xB1E75CC7	# 16381 LOG2 TRAIL

PI:	long		0x40000000,0xC90FDAA2,0x2168C235,0x00000000
PIBY2:	long		0x3FFF0000,0xC90FDAA2,0x2168C235,0x00000000

TWOBYPI:
	long		0x3FE45F30,0x6DC9C883

#########################################################################
# XDEF ****************************************************************	#
#	_fpsp_ovfl(): 060FPSP entry point for FP Overflow exception.	#
#									#
#	This handler should be the first code executed upon taking the	#
#	FP Overflow exception in an operating system.			#
#									#
# XREF ****************************************************************	#
#	_imem_read_long() - read instruction longword			#
#	fix_skewed_ops() - adjust src operand in fsave frame		#
#	set_tag_x() - determine optype of src/dst operands		#
#	store_fpreg() - store opclass 0 or 2 result to FP regfile	#
#	unnorm_fix() - change UNNORM operands to NORM or ZERO		#
#	load_fpn2() - load dst operand from FP regfile			#
#	fout() - emulate an opclass 3 instruction			#
#	tbl_unsupp - add of table of emulation routines for opclass 0,2	#
#	_fpsp_done() - "callout" for 060FPSP exit (all work done!)	#
#	_real_ovfl() - "callout" for Overflow exception enabled code	#
#	_real_inex() - "callout" for Inexact exception enabled code	#
#	_real_trace() - "callout" for Trace exception code		#
#									#
# INPUT ***************************************************************	#
#	- The system stack contains the FP Ovfl exception stack frame	#
#	- The fsave frame contains the source operand			#
# 									#
# OUTPUT **************************************************************	#
#	Overflow Exception enabled:					#
#	- The system stack is unchanged					#
#	- The fsave frame contains the adjusted src op for opclass 0,2	#
#	Overflow Exception disabled:					#
#	- The system stack is unchanged					#
#	- The "exception present" flag in the fsave frame is cleared	#
#									#
# ALGORITHM ***********************************************************	#
#	On the 060, if an FP overflow is present as the result of any	#
# instruction, the 060 will take an overflow exception whether the 	#
# exception is enabled or disabled in the FPCR. For the disabled case, 	#
# This handler emulates the instruction to determine what the correct	#
# default result should be for the operation. This default result is	#
# then stored in either the FP regfile, data regfile, or memory. 	#
# Finally, the handler exits through the "callout" _fpsp_done() 	#
# denoting that no exceptional conditions exist within the machine.	#
# 	If the exception is enabled, then this handler must create the	#
# exceptional operand and plave it in the fsave state frame, and store	#
# the default result (only if the instruction is opclass 3). For 	#
# exceptions enabled, this handler must exit through the "callout" 	#
# _real_ovfl() so that the operating system enabled overflow handler	#
# can handle this case.							#
#	Two other conditions exist. First, if overflow was disabled 	#
# but the inexact exception was enabled, this handler must exit 	#
# through the "callout" _real_inex() regardless of whether the result	#
# was inexact.								#
#	Also, in the case of an opclass three instruction where 	#
# overflow was disabled and the trace exception was enabled, this	#
# handler must exit through the "callout" _real_trace().		#
#									#
#########################################################################

	global		_fpsp_ovfl
_fpsp_ovfl:

#$#	sub.l		&24,%sp			# make room for src/dst

	link.w		%a6,&-LOCAL_SIZE	# init stack frame

	fsave		FP_SRC(%a6)		# grab the "busy" frame

 	movm.l		&0x0303,EXC_DREGS(%a6)	# save d0-d1/a0-a1
	fmovm.l		%fpcr,%fpsr,%fpiar,USER_FPCR(%a6) # save ctrl regs
 	fmovm.x		&0xc0,EXC_FPREGS(%a6)	# save fp0-fp1 on stack

# the FPIAR holds the "current PC" of the faulting instruction
	mov.l		USER_FPIAR(%a6),EXC_EXTWPTR(%a6)
	mov.l		EXC_EXTWPTR(%a6),%a0	# fetch instruction addr
	addq.l		&0x4,EXC_EXTWPTR(%a6)	# incr instruction ptr
	bsr.l		_imem_read_long		# fetch the instruction words
	mov.l		%d0,EXC_OPWORD(%a6)

##############################################################################

	btst		&0x5,EXC_CMDREG(%a6)	# is instr an fmove out?
	bne.w		fovfl_out


	lea		FP_SRC(%a6),%a0		# pass: ptr to src op
	bsr.l		fix_skewed_ops		# fix src op

# since, I believe, only NORMs and DENORMs can come through here,
# maybe we can avoid the subroutine call.
	lea		FP_SRC(%a6),%a0		# pass: ptr to src op
	bsr.l		set_tag_x		# tag the operand type
	mov.b		%d0,STAG(%a6)		# maybe NORM,DENORM

# bit five of the fp extension word separates the monadic and dyadic operations 
# that can pass through fpsp_ovfl(). remember that fcmp, ftst, and fsincos
# will never take this exception.
	btst		&0x5,1+EXC_CMDREG(%a6)	# is operation monadic or dyadic?
	beq.b		fovfl_extract		# monadic

	bfextu		EXC_CMDREG(%a6){&6:&3},%d0 # dyadic; load dst reg
	bsr.l		load_fpn2		# load dst into FP_DST

	lea		FP_DST(%a6),%a0		# pass: ptr to dst op
	bsr.l		set_tag_x		# tag the operand type
	cmpi.b		%d0,&UNNORM		# is operand an UNNORM?
	bne.b		fovfl_op2_done		# no
	bsr.l		unnorm_fix		# yes; convert to NORM,DENORM,or ZERO
fovfl_op2_done:
	mov.b		%d0,DTAG(%a6)		# save dst optype tag

fovfl_extract:

#$#	mov.l		FP_SRC_EX(%a6),TRAP_SRCOP_EX(%a6)
#$#	mov.l		FP_SRC_HI(%a6),TRAP_SRCOP_HI(%a6)
#$#	mov.l		FP_SRC_LO(%a6),TRAP_SRCOP_LO(%a6)
#$#	mov.l		FP_DST_EX(%a6),TRAP_DSTOP_EX(%a6)
#$#	mov.l		FP_DST_HI(%a6),TRAP_DSTOP_HI(%a6)
#$#	mov.l		FP_DST_LO(%a6),TRAP_DSTOP_LO(%a6)

	clr.l		%d0
	mov.b		FPCR_MODE(%a6),%d0	# pass rnd prec/mode

	mov.b		1+EXC_CMDREG(%a6),%d1
	andi.w		&0x007f,%d1		# extract extension

	andi.l		&0x00ff01ff,USER_FPSR(%a6) # zero all but accured field

	fmov.l		&0x0,%fpcr		# zero current control regs
	fmov.l		&0x0,%fpsr

	lea		FP_SRC(%a6),%a0
	lea		FP_DST(%a6),%a1

# maybe we can make these entry points ONLY the OVFL entry points of each routine.
	mov.l		(tbl_unsupp.l,%pc,%d1.w*4),%d1 # fetch routine addr
	jsr		(tbl_unsupp.l,%pc,%d1.l*1)

# the operation has been emulated. the result is in fp0.
# the EXOP, if an exception occurred, is in fp1.
# we must save the default result regardless of whether
# traps are enabled or disabled.
	bfextu		EXC_CMDREG(%a6){&6:&3},%d0
	bsr.l		store_fpreg

# the exceptional possibilities we have left ourselves with are ONLY overflow
# and inexact. and, the inexact is such that overflow occurred and was disabled
# but inexact was enabled.
	btst		&ovfl_bit,FPCR_ENABLE(%a6)
	bne.b		fovfl_ovfl_on

	btst		&inex2_bit,FPCR_ENABLE(%a6)
	bne.b		fovfl_inex_on

	fmovm.x		EXC_FPREGS(%a6),&0xc0	# restore fp0-fp1
	fmovm.l		USER_FPCR(%a6),%fpcr,%fpsr,%fpiar # restore ctrl regs
	movm.l		EXC_DREGS(%a6),&0x0303	# restore d0-d1/a0-a1

	unlk		%a6
#$#	add.l		&24,%sp
	bra.l		_fpsp_done

# overflow is enabled AND overflow, of course, occurred. so, we have the EXOP
# in fp1. now, simply jump to _real_ovfl()!
fovfl_ovfl_on:
	fmovm.x		&0x40,FP_SRC(%a6)	# save EXOP (fp1) to stack

	mov.w		&0xe005,2+FP_SRC(%a6) 	# save exc status

	fmovm.x		EXC_FPREGS(%a6),&0xc0	# restore fp0-fp1
	fmovm.l		USER_FPCR(%a6),%fpcr,%fpsr,%fpiar # restore ctrl regs
	movm.l		EXC_DREGS(%a6),&0x0303	# restore d0-d1/a0-a1

	frestore	FP_SRC(%a6)		# do this after fmovm,other f<op>s!

	unlk		%a6

	bra.l		_real_ovfl

# overflow occurred but is disabled. meanwhile, inexact is enabled. therefore,
# we must jump to real_inex().
fovfl_inex_on:

	fmovm.x		&0x40,FP_SRC(%a6) 	# save EXOP (fp1) to stack

	mov.b		&0xc4,1+EXC_VOFF(%a6)	# vector offset = 0xc4
	mov.w		&0xe001,2+FP_SRC(%a6) 	# save exc status

	fmovm.x		EXC_FPREGS(%a6),&0xc0	# restore fp0-fp1
	fmovm.l		USER_FPCR(%a6),%fpcr,%fpsr,%fpiar # restore ctrl regs
	movm.l		EXC_DREGS(%a6),&0x0303	# restore d0-d1/a0-a1

	frestore	FP_SRC(%a6)		# do this after fmovm,other f<op>s!

	unlk		%a6

	bra.l		_real_inex

########################################################################
fovfl_out:


#$#	mov.l		FP_SRC_EX(%a6),TRAP_SRCOP_EX(%a6)
#$#	mov.l		FP_SRC_HI(%a6),TRAP_SRCOP_HI(%a6)
#$#	mov.l		FP_SRC_LO(%a6),TRAP_SRCOP_LO(%a6)

# the src operand is definitely a NORM(!), so tag it as such
	mov.b		&NORM,STAG(%a6)		# set src optype tag

	clr.l		%d0
	mov.b		FPCR_MODE(%a6),%d0	# pass rnd prec/mode

	and.l		&0xffff00ff,USER_FPSR(%a6) # zero all but accured field

	fmov.l		&0x0,%fpcr		# zero current control regs
	fmov.l		&0x0,%fpsr

	lea		FP_SRC(%a6),%a0		# pass ptr to src operand

	bsr.l		fout

	btst		&ovfl_bit,FPCR_ENABLE(%a6)
	bne.w		fovfl_ovfl_on

	btst		&inex2_bit,FPCR_ENABLE(%a6)
	bne.w		fovfl_inex_on

	fmovm.x		EXC_FPREGS(%a6),&0xc0	# restore fp0-fp1
	fmovm.l		USER_FPCR(%a6),%fpcr,%fpsr,%fpiar # restore ctrl regs
	movm.l		EXC_DREGS(%a6),&0x0303	# restore d0-d1/a0-a1

	unlk		%a6
#$#	add.l		&24,%sp

	btst		&0x7,(%sp)		# is trace on?
	beq.l		_fpsp_done		# no

	fmov.l		%fpiar,0x8(%sp)		# "Current PC" is in FPIAR	
	mov.w		&0x2024,0x6(%sp)	# stk fmt = 0x2; voff = 0x024
	bra.l		_real_trace

#########################################################################
# XDEF ****************************************************************	#
#	_fpsp_unfl(): 060FPSP entry point for FP Underflow exception.	#
#									#
#	This handler should be the first code executed upon taking the	#
#	FP Underflow exception in an operating system.			#
#									#
# XREF ****************************************************************	#
#	_imem_read_long() - read instruction longword			#
#	fix_skewed_ops() - adjust src operand in fsave frame		#
#	set_tag_x() - determine optype of src/dst operands		#
#	store_fpreg() - store opclass 0 or 2 result to FP regfile	#
#	unnorm_fix() - change UNNORM operands to NORM or ZERO		#
#	load_fpn2() - load dst operand from FP regfile			#
#	fout() - emulate an opclass 3 instruction			#
#	tbl_unsupp - add of table of emulation routines for opclass 0,2	#
#	_fpsp_done() - "callout" for 060FPSP exit (all work done!)	#
#	_real_ovfl() - "callout" for Overflow exception enabled code	#
#	_real_inex() - "callout" for Inexact exception enabled code	#
#	_real_trace() - "callout" for Trace exception code		#
#									#
# INPUT ***************************************************************	#
#	- The system stack contains the FP Unfl exception stack frame	#
#	- The fsave frame contains the source operand			#
# 									#
# OUTPUT **************************************************************	#
#	Underflow Exception enabled:					#
#	- The system stack is unchanged					#
#	- The fsave frame contains the adjusted src op for opclass 0,2	#
#	Underflow Exception disabled:					#
#	- The system stack is unchanged					#
#	- The "exception present" flag in the fsave frame is cleared	#
#									#
# ALGORITHM ***********************************************************	#
#	On the 060, if an FP underflow is present as the result of any	#
# instruction, the 060 will take an underflow exception whether the 	#
# exception is enabled or disabled in the FPCR. For the disabled case, 	#
# This handler emulates the instruction to determine what the correct	#
# default result should be for the operation. This default result is	#
# then stored in either the FP regfile, data regfile, or memory. 	#
# Finally, the handler exits through the "callout" _fpsp_done() 	#
# denoting that no exceptional conditions exist within the machine.	#
# 	If the exception is enabled, then this handler must create the	#
# exceptional operand and plave it in the fsave state frame, and store	#
# the default result (only if the instruction is opclass 3). For 	#
# exceptions enabled, this handler must exit through the "callout" 	#
# _real_unfl() so that the operating system enabled overflow handler	#
# can handle this case.							#
#	Two other conditions exist. First, if underflow was disabled 	#
# but the inexact exception was enabled and the result was inexact, 	#
# this handler must exit through the "callout" _real_inex().		#
# was inexact.								#
#	Also, in the case of an opclass three instruction where 	#
# underflow was disabled and the trace exception was enabled, this	#
# handler must exit through the "callout" _real_trace().		#
#									#
#########################################################################

	global		_fpsp_unfl
_fpsp_unfl:

#$#	sub.l		&24,%sp			# make room for src/dst

	link.w		%a6,&-LOCAL_SIZE	# init stack frame

	fsave		FP_SRC(%a6)		# grab the "busy" frame

 	movm.l		&0x0303,EXC_DREGS(%a6)	# save d0-d1/a0-a1
	fmovm.l		%fpcr,%fpsr,%fpiar,USER_FPCR(%a6) # save ctrl regs
 	fmovm.x		&0xc0,EXC_FPREGS(%a6)	# save fp0-fp1 on stack

# the FPIAR holds the "current PC" of the faulting instruction
	mov.l		USER_FPIAR(%a6),EXC_EXTWPTR(%a6)	
	mov.l		EXC_EXTWPTR(%a6),%a0	# fetch instruction addr
	addq.l		&0x4,EXC_EXTWPTR(%a6)	# incr instruction ptr
	bsr.l		_imem_read_long		# fetch the instruction words
	mov.l		%d0,EXC_OPWORD(%a6)

##############################################################################

	btst		&0x5,EXC_CMDREG(%a6)	# is instr an fmove out?
	bne.w		funfl_out


	lea		FP_SRC(%a6),%a0		# pass: ptr to src op
	bsr.l		fix_skewed_ops		# fix src op

	lea		FP_SRC(%a6),%a0		# pass: ptr to src op
	bsr.l		set_tag_x		# tag the operand type
	mov.b		%d0,STAG(%a6)		# maybe NORM,DENORM

# bit five of the fp ext word separates the monadic and dyadic operations 
# that can pass through fpsp_unfl(). remember that fcmp, and ftst
# will never take this exception.
	btst		&0x5,1+EXC_CMDREG(%a6)	# is op monadic or dyadic?
	beq.b		funfl_extract		# monadic

# now, what's left that's not dyadic is fsincos. we can distinguish it 
# from all dyadics by the '0110xxx pattern
	btst		&0x4,1+EXC_CMDREG(%a6)	# is op an fsincos?
	bne.b		funfl_extract		# yes

	bfextu		EXC_CMDREG(%a6){&6:&3},%d0 # dyadic; load dst reg
	bsr.l		load_fpn2		# load dst into FP_DST

	lea		FP_DST(%a6),%a0		# pass: ptr to dst op
	bsr.l		set_tag_x		# tag the operand type
	cmpi.b		%d0,&UNNORM		# is operand an UNNORM?
	bne.b		funfl_op2_done		# no
	bsr.l		unnorm_fix		# yes; convert to NORM,DENORM,or ZERO
funfl_op2_done:
	mov.b		%d0,DTAG(%a6)		# save dst optype tag

funfl_extract:

#$#	mov.l		FP_SRC_EX(%a6),TRAP_SRCOP_EX(%a6)
#$#	mov.l		FP_SRC_HI(%a6),TRAP_SRCOP_HI(%a6)
#$#	mov.l		FP_SRC_LO(%a6),TRAP_SRCOP_LO(%a6)
#$#	mov.l		FP_DST_EX(%a6),TRAP_DSTOP_EX(%a6)
#$#	mov.l		FP_DST_HI(%a6),TRAP_DSTOP_HI(%a6)
#$#	mov.l		FP_DST_LO(%a6),TRAP_DSTOP_LO(%a6)

	clr.l		%d0
	mov.b		FPCR_MODE(%a6),%d0	# pass rnd prec/mode

	mov.b		1+EXC_CMDREG(%a6),%d1
	andi.w		&0x007f,%d1		# extract extension

	andi.l		&0x00ff01ff,USER_FPSR(%a6)

	fmov.l		&0x0,%fpcr		# zero current control regs
	fmov.l		&0x0,%fpsr

	lea		FP_SRC(%a6),%a0
	lea		FP_DST(%a6),%a1

# maybe we can make these entry points ONLY the OVFL entry points of each routine.
	mov.l		(tbl_unsupp.l,%pc,%d1.w*4),%d1 # fetch routine addr
	jsr		(tbl_unsupp.l,%pc,%d1.l*1)

	bfextu		EXC_CMDREG(%a6){&6:&3},%d0
	bsr.l		store_fpreg

# The `060 FPU multiplier hardware is such that if the result of a
# multiply operation is the smallest possible normalized number
# (0x00000000_80000000_00000000), then the machine will take an
# underflow exception. Since this is incorrect, we need to check
# if our emulation, after re-doing the operation, decided that
# no underflow was called for. We do these checks only in 
# funfl_{unfl,inex}_on() because w/ both exceptions disabled, this
# special case will simply exit gracefully with the correct result.

# the exceptional possibilities we have left ourselves with are ONLY overflow
# and inexact. and, the inexact is such that overflow occurred and was disabled
# but inexact was enabled.
	btst		&unfl_bit,FPCR_ENABLE(%a6)
	bne.b		funfl_unfl_on

funfl_chkinex:
	btst		&inex2_bit,FPCR_ENABLE(%a6)
	bne.b		funfl_inex_on

funfl_exit:
	fmovm.x		EXC_FPREGS(%a6),&0xc0	# restore fp0-fp1
	fmovm.l		USER_FPCR(%a6),%fpcr,%fpsr,%fpiar # restore ctrl regs
	movm.l		EXC_DREGS(%a6),&0x0303	# restore d0-d1/a0-a1

	unlk		%a6
#$#	add.l		&24,%sp
	bra.l		_fpsp_done

# overflow is enabled AND overflow, of course, occurred. so, we have the EXOP
# in fp1 (don't forget to save fp0). what to do now?
# well, we simply have to get to go to _real_unfl()!
funfl_unfl_on:

# The `060 FPU multiplier hardware is such that if the result of a
# multiply operation is the smallest possible normalized number
# (0x00000000_80000000_00000000), then the machine will take an
# underflow exception. Since this is incorrect, we check here to see
# if our emulation, after re-doing the operation, decided that
# no underflow was called for.
	btst		&unfl_bit,FPSR_EXCEPT(%a6)
	beq.w		funfl_chkinex

funfl_unfl_on2:
	fmovm.x		&0x40,FP_SRC(%a6)	# save EXOP (fp1) to stack

	mov.w		&0xe003,2+FP_SRC(%a6) 	# save exc status

	fmovm.x		EXC_FPREGS(%a6),&0xc0	# restore fp0-fp1
	fmovm.l		USER_FPCR(%a6),%fpcr,%fpsr,%fpiar # restore ctrl regs
	movm.l		EXC_DREGS(%a6),&0x0303	# restore d0-d1/a0-a1

	frestore	FP_SRC(%a6)		# do this after fmovm,other f<op>s!

	unlk		%a6

	bra.l		_real_unfl

# undeflow occurred but is disabled. meanwhile, inexact is enabled. therefore,
# we must jump to real_inex().
funfl_inex_on:

# The `060 FPU multiplier hardware is such that if the result of a
# multiply operation is the smallest possible normalized number
# (0x00000000_80000000_00000000), then the machine will take an
# underflow exception. 
# But, whether bogus or not, if inexact is enabled AND it occurred,
# then we have to branch to real_inex.

	btst		&inex2_bit,FPSR_EXCEPT(%a6)
	beq.w		funfl_exit

funfl_inex_on2:

	fmovm.x		&0x40,FP_SRC(%a6) 	# save EXOP to stack

	mov.b		&0xc4,1+EXC_VOFF(%a6)	# vector offset = 0xc4
	mov.w		&0xe001,2+FP_SRC(%a6) 	# save exc status

	fmovm.x		EXC_FPREGS(%a6),&0xc0	# restore fp0-fp1
	fmovm.l		USER_FPCR(%a6),%fpcr,%fpsr,%fpiar # restore ctrl regs
	movm.l		EXC_DREGS(%a6),&0x0303	# restore d0-d1/a0-a1

	frestore	FP_SRC(%a6)		# do this after fmovm,other f<op>s!

	unlk		%a6

	bra.l		_real_inex

#######################################################################
funfl_out:


#$#	mov.l		FP_SRC_EX(%a6),TRAP_SRCOP_EX(%a6)
#$#	mov.l		FP_SRC_HI(%a6),TRAP_SRCOP_HI(%a6)
#$#	mov.l		FP_SRC_LO(%a6),TRAP_SRCOP_LO(%a6)

# the src operand is definitely a NORM(!), so tag it as such
	mov.b		&NORM,STAG(%a6)		# set src optype tag

	clr.l		%d0
	mov.b		FPCR_MODE(%a6),%d0	# pass rnd prec/mode

	and.l		&0xffff00ff,USER_FPSR(%a6) # zero all but accured field

	fmov.l		&0x0,%fpcr		# zero current control regs
	fmov.l		&0x0,%fpsr

	lea		FP_SRC(%a6),%a0		# pass ptr to src operand

	bsr.l		fout

	btst		&unfl_bit,FPCR_ENABLE(%a6)
	bne.w		funfl_unfl_on2

	btst		&inex2_bit,FPCR_ENABLE(%a6)
	bne.w		funfl_inex_on2

	fmovm.x		EXC_FPREGS(%a6),&0xc0	# restore fp0-fp1
	fmovm.l		USER_FPCR(%a6),%fpcr,%fpsr,%fpiar # restore ctrl regs
	movm.l		EXC_DREGS(%a6),&0x0303	# restore d0-d1/a0-a1

	unlk		%a6
#$#	add.l		&24,%sp

	btst		&0x7,(%sp)		# is trace on?
	beq.l		_fpsp_done		# no

	fmov.l		%fpiar,0x8(%sp)		# "Current PC" is in FPIAR
	mov.w		&0x2024,0x6(%sp)	# stk fmt = 0x2; voff = 0x024
	bra.l		_real_trace

#########################################################################
# XDEF ****************************************************************	#
#	_fpsp_unsupp(): 060FPSP entry point for FP "Unimplemented	#
#		        Data Type" exception.				#
#									#
#	This handler should be the first code executed upon taking the	#
#	FP Unimplemented Data Type exception in an operating system.	#
#									#
# XREF ****************************************************************	#
#	_imem_read_{word,long}() - read instruction word/longword	#
#	fix_skewed_ops() - adjust src operand in fsave frame		#
#	set_tag_x() - determine optype of src/dst operands		#
#	store_fpreg() - store opclass 0 or 2 result to FP regfile	#
#	unnorm_fix() - change UNNORM operands to NORM or ZERO		#
#	load_fpn2() - load dst operand from FP regfile			#
#	load_fpn1() - load src operand from FP regfile			#
#	fout() - emulate an opclass 3 instruction			#
#	tbl_unsupp - add of table of emulation routines for opclass 0,2	#
#	_real_inex() - "callout" to operating system inexact handler	#
#	_fpsp_done() - "callout" for exit; work all done		#
#	_real_trace() - "callout" for Trace enabled exception		#
#	funimp_skew() - adjust fsave src ops to "incorrect" value	#
#	_real_snan() - "callout" for SNAN exception			#
#	_real_operr() - "callout" for OPERR exception			#
#	_real_ovfl() - "callout" for OVFL exception			#
#	_real_unfl() - "callout" for UNFL exception			#
#	get_packed() - fetch packed operand from memory			#
#									#
# INPUT ***************************************************************	#
#	- The system stack contains the "Unimp Data Type" stk frame	#
#	- The fsave frame contains the ssrc op (for UNNORM/DENORM)	#
# 									#
# OUTPUT **************************************************************	#
#	If Inexact exception (opclass 3):				#
#	- The system stack is changed to an Inexact exception stk frame	#
#	If SNAN exception (opclass 3):					#
#	- The system stack is changed to an SNAN exception stk frame	#
#	If OPERR exception (opclass 3):					#
#	- The system stack is changed to an OPERR exception stk frame	#
#	If OVFL exception (opclass 3):					#
#	- The system stack is changed to an OVFL exception stk frame	#
#	If UNFL exception (opclass 3):					#
#	- The system stack is changed to an UNFL exception stack frame	#
#	If Trace exception enabled:					#
#	- The system stack is changed to a Trace exception stack frame	#
#	Else: (normal case)						#
#	- Correct result has been stored as appropriate			#
#									#
# ALGORITHM ***********************************************************	#
#	Two main instruction types can enter here: (1) DENORM or UNNORM	#
# unimplemented data types. These can be either opclass 0,2 or 3 	#
# instructions, and (2) PACKED unimplemented data format instructions	#
# also of opclasses 0,2, or 3.						#
#	For UNNORM/DENORM opclass 0 and 2, the handler fetches the src	#
# operand from the fsave state frame and the dst operand (if dyadic)	#
# from the FP register file. The instruction is then emulated by 	#
# choosing an emulation routine from a table of routines indexed by	#
# instruction type. Once the instruction has been emulated and result	#
# saved, then we check to see if any enabled exceptions resulted from	#
# instruction emulation. If none, then we exit through the "callout"	#
# _fpsp_done(). If there is an enabled FP exception, then we insert	#
# this exception into the FPU in the fsave state frame and then exit	#
# through _fpsp_done().							#
#	PACKED opclass 0 and 2 is similar in how the instruction is	#
# emulated and exceptions handled. The differences occur in how the	#
# handler loads the packed op (by calling get_packed() routine) and	#
# by the fact that a Trace exception could be pending for PACKED ops.	#
# If a Trace exception is pending, then the current exception stack	#
# frame is changed to a Trace exception stack frame and an exit is	#
# made through _real_trace().						#
#	For UNNORM/DENORM opclass 3, the actual move out to memory is	#
# performed by calling the routine fout(). If no exception should occur	#
# as the result of emulation, then an exit either occurs through	#
# _fpsp_done() or through _real_trace() if a Trace exception is pending	#
# (a Trace stack frame must be created here, too). If an FP exception	#
# should occur, then we must create an exception stack frame of that	#
# type and jump to either _real_snan(), _real_operr(), _real_inex(),	#
# _real_unfl(), or _real_ovfl() as appropriate. PACKED opclass 3 	#
# emulation is performed in a similar manner.				#
#									#
#########################################################################

#
# (1) DENORM and UNNORM (unimplemented) data types:
#
#				post-instruction
#				*****************
#				*      EA	*
#	 pre-instruction	*		*
# 	*****************	*****************
#	* 0x0 *  0x0dc  *	* 0x3 *  0x0dc  *
#	*****************	*****************
#	*     Next	*	*     Next	*
#	*      PC	*	*      PC	*
#	*****************	*****************
#	*      SR	*	*      SR	*
#	*****************	*****************
#
# (2) PACKED format (unsupported) opclasses two and three:
#	*****************
#	*      EA	*
#	*		*
#	*****************
#	* 0x2 *  0x0dc	*
#	*****************
#	*     Next	*
#	*      PC	*
#	*****************
#	*      SR	*
#	*****************
#
	global		_fpsp_unsupp
_fpsp_unsupp:

	link.w		%a6,&-LOCAL_SIZE	# init stack frame

	fsave		FP_SRC(%a6)		# save fp state

 	movm.l		&0x0303,EXC_DREGS(%a6)	# save d0-d1/a0-a1
	fmovm.l		%fpcr,%fpsr,%fpiar,USER_FPCR(%a6) # save ctrl regs
 	fmovm.x		&0xc0,EXC_FPREGS(%a6)	# save fp0-fp1 on stack

	btst		&0x5,EXC_SR(%a6)	# user or supervisor mode?
	bne.b		fu_s
fu_u:
	mov.l		%usp,%a0		# fetch user stack pointer
	mov.l		%a0,EXC_A7(%a6)		# save on stack
	bra.b		fu_cont
# if the exception is an opclass zero or two unimplemented data type
# exception, then the a7' calculated here is wrong since it doesn't
# stack an ea. however, we don't need an a7' for this case anyways.
fu_s:
	lea		0x4+EXC_EA(%a6),%a0	# load old a7'
	mov.l		%a0,EXC_A7(%a6)		# save on stack

fu_cont:

# the FPIAR holds the "current PC" of the faulting instruction
# the FPIAR should be set correctly for ALL exceptions passing through
# this point.
	mov.l		USER_FPIAR(%a6),EXC_EXTWPTR(%a6)
	mov.l		EXC_EXTWPTR(%a6),%a0	# fetch instruction addr
	addq.l		&0x4,EXC_EXTWPTR(%a6)	# incr instruction ptr
	bsr.l		_imem_read_long		# fetch the instruction words
	mov.l		%d0,EXC_OPWORD(%a6)	# store OPWORD and EXTWORD

############################

	clr.b		SPCOND_FLG(%a6)		# clear special condition flag

# Separate opclass three (fpn-to-mem) ops since they have a different
# stack frame and protocol.
	btst		&0x5,EXC_CMDREG(%a6)	# is it an fmove out?
	bne.w		fu_out			# yes

# Separate packed opclass two instructions.
	bfextu		EXC_CMDREG(%a6){&0:&6},%d0
	cmpi.b		%d0,&0x13
	beq.w		fu_in_pack


# I'm not sure at this point what FPSR bits are valid for this instruction.
# so, since the emulation routines re-create them anyways, zero exception field
	andi.l		&0x00ff00ff,USER_FPSR(%a6) # zero exception field

	fmov.l		&0x0,%fpcr		# zero current control regs
	fmov.l		&0x0,%fpsr

# Opclass two w/ memory-to-fpn operation will have an incorrect extended
# precision format if the src format was single or double and the 
# source data type was an INF, NAN, DENORM, or UNNORM
	lea		FP_SRC(%a6),%a0		# pass ptr to input
	bsr.l		fix_skewed_ops

# we don't know whether the src operand or the dst operand (or both) is the
# UNNORM or DENORM. call the function that tags the operand type. if the
# input is an UNNORM, then convert it to a NORM, DENORM, or ZERO.
	lea		FP_SRC(%a6),%a0		# pass: ptr to src op
	bsr.l		set_tag_x		# tag the operand type
	cmpi.b		%d0,&UNNORM		# is operand an UNNORM?
	bne.b		fu_op2			# no
	bsr.l		unnorm_fix		# yes; convert to NORM,DENORM,or ZERO

fu_op2:
	mov.b		%d0,STAG(%a6)		# save src optype tag

	bfextu		EXC_CMDREG(%a6){&6:&3},%d0 # dyadic; load dst reg

# bit five of the fp extension word separates the monadic and dyadic operations 
# at this point
	btst		&0x5,1+EXC_CMDREG(%a6)	# is operation monadic or dyadic?
	beq.b		fu_extract		# monadic
	cmpi.b		1+EXC_CMDREG(%a6),&0x3a	# is operation an ftst?
	beq.b		fu_extract		# yes, so it's monadic, too

	bsr.l		load_fpn2		# load dst into FP_DST

	lea		FP_DST(%a6),%a0		# pass: ptr to dst op
	bsr.l		set_tag_x		# tag the operand type
	cmpi.b		%d0,&UNNORM		# is operand an UNNORM?
	bne.b		fu_op2_done		# no
	bsr.l		unnorm_fix		# yes; convert to NORM,DENORM,or ZERO
fu_op2_done:
	mov.b		%d0,DTAG(%a6)		# save dst optype tag

fu_extract:
	clr.l		%d0
	mov.b		FPCR_MODE(%a6),%d0	# fetch rnd mode/prec

	bfextu		1+EXC_CMDREG(%a6){&1:&7},%d1 # extract extension

	lea		FP_SRC(%a6),%a0
	lea		FP_DST(%a6),%a1

	mov.l		(tbl_unsupp.l,%pc,%d1.l*4),%d1 # fetch routine addr
	jsr		(tbl_unsupp.l,%pc,%d1.l*1)

#
# Exceptions in order of precedence:
# 	BSUN	: none
#	SNAN	: all dyadic ops
#	OPERR	: fsqrt(-NORM)
#	OVFL	: all except ftst,fcmp
#	UNFL	: all except ftst,fcmp
#	DZ	: fdiv
# 	INEX2	: all except ftst,fcmp
#	INEX1	: none (packed doesn't go through here)
#

# we determine the highest priority exception(if any) set by the
# emulation routine that has also been enabled by the user.
	mov.b		FPCR_ENABLE(%a6),%d0	# fetch exceptions set
	bne.b		fu_in_ena		# some are enabled

fu_in_cont:
# fcmp and ftst do not store any result.
	mov.b		1+EXC_CMDREG(%a6),%d0	# fetch extension
	andi.b		&0x38,%d0		# extract bits 3-5
	cmpi.b		%d0,&0x38		# is instr fcmp or ftst?
	beq.b		fu_in_exit		# yes

	bfextu		EXC_CMDREG(%a6){&6:&3},%d0 # dyadic; load dst reg
	bsr.l		store_fpreg		# store the result

fu_in_exit:

	fmovm.x		EXC_FPREGS(%a6),&0xc0	# restore fp0/fp1
	fmovm.l		USER_FPCR(%a6),%fpcr,%fpsr,%fpiar # restore ctrl regs
	movm.l		EXC_DREGS(%a6),&0x0303	# restore d0-d1/a0-a1

	unlk		%a6

	bra.l		_fpsp_done

fu_in_ena:
	and.b		FPSR_EXCEPT(%a6),%d0	# keep only ones enabled
	bfffo		%d0{&24:&8},%d0		# find highest priority exception
	bne.b		fu_in_exc		# there is at least one set

#
# No exceptions occurred that were also enabled. Now:
#
#   	if (OVFL && ovfl_disabled && inexact_enabled) {
#	    branch to _real_inex() (even if the result was exact!);
#     	} else {
#	    save the result in the proper fp reg (unless the op is fcmp or ftst);
#	    return;
#     	}
#
	btst		&ovfl_bit,FPSR_EXCEPT(%a6) # was overflow set?
	beq.b		fu_in_cont		# no
	
fu_in_ovflchk:
	btst		&inex2_bit,FPCR_ENABLE(%a6) # was inexact enabled?
	beq.b		fu_in_cont		# no
	bra.w		fu_in_exc_ovfl		# go insert overflow frame

#
# An exception occurred and that exception was enabled:
#
#	shift enabled exception field into lo byte of d0;
#	if (((INEX2 || INEX1) && inex_enabled && OVFL && ovfl_disabled) ||
#	    ((INEX2 || INEX1) && inex_enabled && UNFL && unfl_disabled)) {
#		/*
#		 * this is the case where we must call _real_inex() now or else
#		 * there will be no other way to pass it the exceptional operand
#		 */
#		call _real_inex();
#	} else {
#		restore exc state (SNAN||OPERR||OVFL||UNFL||DZ||INEX) into the FPU;
#	}
#	    		
fu_in_exc:
	subi.l		&24,%d0			# fix offset to be 0-8
	cmpi.b		%d0,&0x6		# is exception INEX? (6)
	bne.b		fu_in_exc_exit		# no

# the enabled exception was inexact
	btst		&unfl_bit,FPSR_EXCEPT(%a6) # did disabled underflow occur?
	bne.w		fu_in_exc_unfl		# yes
	btst		&ovfl_bit,FPSR_EXCEPT(%a6) # did disabled overflow occur?
	bne.w		fu_in_exc_ovfl		# yes

# here, we insert the correct fsave status value into the fsave frame for the
# corresponding exception. the operand in the fsave frame should be the original 
# src operand.
fu_in_exc_exit:
	mov.l		%d0,-(%sp)		# save d0
	bsr.l		funimp_skew		# skew sgl or dbl inputs
	mov.l		(%sp)+,%d0		# restore d0

	mov.w		(tbl_except.b,%pc,%d0.w*2),2+FP_SRC(%a6) # create exc status

	fmovm.x		EXC_FPREGS(%a6),&0xc0	# restore fp0/fp1
	fmovm.l		USER_FPCR(%a6),%fpcr,%fpsr,%fpiar # restore ctrl regs
	movm.l		EXC_DREGS(%a6),&0x0303	# restore d0-d1/a0-a1

	frestore	FP_SRC(%a6)		# restore src op

	unlk		%a6

	bra.l		_fpsp_done

tbl_except:
	short		0xe000,0xe006,0xe004,0xe005
	short		0xe003,0xe002,0xe001,0xe001

fu_in_exc_unfl:
	mov.w		&0x4,%d0
	bra.b		fu_in_exc_exit
fu_in_exc_ovfl:
	mov.w		&0x03,%d0
	bra.b		fu_in_exc_exit

# If the input operand to this operation was opclass two and a single
# or double precision denorm, inf, or nan, the operand needs to be 
# "corrected" in order to have the proper equivalent extended precision 
# number.
	global		fix_skewed_ops
fix_skewed_ops:
	bfextu		EXC_CMDREG(%a6){&0:&6},%d0 # extract opclass,src fmt
	cmpi.b		%d0,&0x11		# is class = 2 & fmt = sgl?
	beq.b		fso_sgl			# yes
	cmpi.b		%d0,&0x15		# is class = 2 & fmt = dbl?
	beq.b		fso_dbl			# yes
	rts					# no

fso_sgl:
	mov.w		LOCAL_EX(%a0),%d0	# fetch src exponent
	andi.w		&0x7fff,%d0		# strip sign
	cmpi.w		%d0,&0x3f80		# is |exp| == $3f80?
	beq.b		fso_sgl_dnrm_zero	# yes
	cmpi.w		%d0,&0x407f		# no; is |exp| == $407f?
	beq.b		fso_infnan		# yes
	rts					# no

fso_sgl_dnrm_zero:
	andi.l		&0x7fffffff,LOCAL_HI(%a0) # clear j-bit
	beq.b		fso_zero		# it's a skewed zero
fso_sgl_dnrm:
# here, we count on norm not to alter a0...
	bsr.l		norm			# normalize mantissa
	neg.w		%d0			# -shft amt
	addi.w		&0x3f81,%d0		# adjust new exponent
	andi.w		&0x8000,LOCAL_EX(%a0) 	# clear old exponent
	or.w		%d0,LOCAL_EX(%a0)	# insert new exponent
	rts

fso_zero:
	andi.w		&0x8000,LOCAL_EX(%a0)	# clear bogus exponent
	rts

fso_infnan:
	andi.b		&0x7f,LOCAL_HI(%a0) 	# clear j-bit
	ori.w		&0x7fff,LOCAL_EX(%a0)	# make exponent = $7fff
	rts

fso_dbl:
	mov.w		LOCAL_EX(%a0),%d0	# fetch src exponent
	andi.w		&0x7fff,%d0		# strip sign
	cmpi.w		%d0,&0x3c00		# is |exp| == $3c00?
	beq.b		fso_dbl_dnrm_zero	# yes
	cmpi.w		%d0,&0x43ff		# no; is |exp| == $43ff?
	beq.b		fso_infnan		# yes
	rts					# no

fso_dbl_dnrm_zero:
	andi.l		&0x7fffffff,LOCAL_HI(%a0) # clear j-bit
	bne.b		fso_dbl_dnrm		# it's a skewed denorm
	tst.l		LOCAL_LO(%a0)		# is it a zero?
	beq.b		fso_zero		# yes
fso_dbl_dnrm:
# here, we count on norm not to alter a0...
	bsr.l		norm			# normalize mantissa
	neg.w		%d0			# -shft amt
	addi.w		&0x3c01,%d0		# adjust new exponent
	andi.w		&0x8000,LOCAL_EX(%a0) 	# clear old exponent
	or.w		%d0,LOCAL_EX(%a0)	# insert new exponent
	rts

#################################################################

# fmove out took an unimplemented data type exception.
# the src operand is in FP_SRC. Call _fout() to write out the result and
# to determine which exceptions, if any, to take.
fu_out:

# Separate packed move outs from the UNNORM and DENORM move outs.
	bfextu		EXC_CMDREG(%a6){&3:&3},%d0
	cmpi.b		%d0,&0x3
	beq.w		fu_out_pack
	cmpi.b		%d0,&0x7
	beq.w		fu_out_pack


# I'm not sure at this point what FPSR bits are valid for this instruction.
# so, since the emulation routines re-create them anyways, zero exception field.
# fmove out doesn't affect ccodes.
	and.l		&0xffff00ff,USER_FPSR(%a6) # zero exception field

	fmov.l		&0x0,%fpcr		# zero current control regs
	fmov.l		&0x0,%fpsr

# the src can ONLY be a DENORM or an UNNORM! so, don't make any big subroutine
# call here. just figure out what it is...
	mov.w		FP_SRC_EX(%a6),%d0	# get exponent
	andi.w		&0x7fff,%d0		# strip sign
	beq.b		fu_out_denorm		# it's a DENORM

	lea		FP_SRC(%a6),%a0
	bsr.l		unnorm_fix		# yes; fix it

	mov.b		%d0,STAG(%a6)

	bra.b		fu_out_cont
fu_out_denorm:
	mov.b		&DENORM,STAG(%a6)
fu_out_cont:

	clr.l		%d0
	mov.b		FPCR_MODE(%a6),%d0	# fetch rnd mode/prec

	lea		FP_SRC(%a6),%a0		# pass ptr to src operand

	mov.l		(%a6),EXC_A6(%a6)	# in case a6 changes
	bsr.l		fout			# call fmove out routine

# Exceptions in order of precedence:
# 	BSUN	: none
#	SNAN	: none
#	OPERR	: fmove.{b,w,l} out of large UNNORM
#	OVFL	: fmove.{s,d}
#	UNFL	: fmove.{s,d,x}
#	DZ	: none
# 	INEX2	: all
#	INEX1	: none (packed doesn't travel through here)

# determine the highest priority exception(if any) set by the
# emulation routine that has also been enabled by the user.
	mov.b		FPCR_ENABLE(%a6),%d0	# fetch exceptions enabled
	bne.w		fu_out_ena		# some are enabled

fu_out_done:

	mov.l		EXC_A6(%a6),(%a6)	# in case a6 changed

# on extended precision opclass three instructions using pre-decrement or 
# post-increment addressing mode, the address register is not updated. is the
# address register was the stack pointer used from user mode, then let's update
# it here. if it was used from supervisor mode, then we have to handle this
# as a special case.
	btst		&0x5,EXC_SR(%a6)
	bne.b		fu_out_done_s

	mov.l		EXC_A7(%a6),%a0		# restore a7
	mov.l		%a0,%usp

fu_out_done_cont:
	fmovm.x		EXC_FPREGS(%a6),&0xc0	# restore fp0/fp1
	fmovm.l		USER_FPCR(%a6),%fpcr,%fpsr,%fpiar # restore ctrl regs
	movm.l		EXC_DREGS(%a6),&0x0303	# restore d0-d1/a0-a1

	unlk		%a6

	btst		&0x7,(%sp)		# is trace on?
	bne.b		fu_out_trace		# yes

	bra.l		_fpsp_done

# is the ea mode pre-decrement of the stack pointer from supervisor mode?
# ("fmov.x fpm,-(a7)") if so, 
fu_out_done_s:
	cmpi.b		SPCOND_FLG(%a6),&mda7_flg
	bne.b		fu_out_done_cont

# the extended precision result is still in fp0. but, we need to save it
# somewhere on the stack until we can copy it to its final resting place.
# here, we're counting on the top of the stack to be the old place-holders
# for fp0/fp1 which have already been restored. that way, we can write
# over those destinations with the shifted stack frame.
	fmovm.x		&0x80,FP_SRC(%a6)	# put answer on stack

	fmovm.x		EXC_FPREGS(%a6),&0xc0	# restore fp0/fp1
	fmovm.l		USER_FPCR(%a6),%fpcr,%fpsr,%fpiar # restore ctrl regs
	movm.l		EXC_DREGS(%a6),&0x0303	# restore d0-d1/a0-a1

	mov.l		(%a6),%a6		# restore frame pointer

	mov.l		LOCAL_SIZE+EXC_SR(%sp),LOCAL_SIZE+EXC_SR-0xc(%sp)
	mov.l		LOCAL_SIZE+2+EXC_PC(%sp),LOCAL_SIZE+2+EXC_PC-0xc(%sp)

# now, copy the result to the proper place on the stack
	mov.l		LOCAL_SIZE+FP_SRC_EX(%sp),LOCAL_SIZE+EXC_SR+0x0(%sp)
	mov.l		LOCAL_SIZE+FP_SRC_HI(%sp),LOCAL_SIZE+EXC_SR+0x4(%sp)
	mov.l		LOCAL_SIZE+FP_SRC_LO(%sp),LOCAL_SIZE+EXC_SR+0x8(%sp)

	add.l		&LOCAL_SIZE-0x8,%sp

	btst		&0x7,(%sp)
	bne.b		fu_out_trace

	bra.l		_fpsp_done

fu_out_ena:
	and.b		FPSR_EXCEPT(%a6),%d0	# keep only ones enabled
	bfffo		%d0{&24:&8},%d0		# find highest priority exception
	bne.b		fu_out_exc		# there is at least one set

# no exceptions were set. 
# if a disabled overflow occurred and inexact was enabled but the result
# was exact, then a branch to _real_inex() is made.
	btst		&ovfl_bit,FPSR_EXCEPT(%a6) # was overflow set?
	beq.w		fu_out_done		# no

fu_out_ovflchk:
	btst		&inex2_bit,FPCR_ENABLE(%a6) # was inexact enabled?
	beq.w		fu_out_done		# no
	bra.w		fu_inex			# yes

#
# The fp move out that took the "Unimplemented Data Type" exception was
# being traced. Since the stack frames are similar, get the "current" PC
# from FPIAR and put it in the trace stack frame then jump to _real_trace().
#
#		  UNSUPP FRAME		   TRACE FRAME
# 		*****************	*****************
#		*      EA	*	*    Current	*
#		*		*	*      PC	*
#		*****************	*****************
#		* 0x3 *  0x0dc	*	* 0x2 *  0x024	*
#		*****************	*****************
#		*     Next	*	*     Next	*
#		*      PC	*	*      PC	*
#		*****************	*****************
#		*      SR	*	*      SR	*
#		*****************	*****************
#
fu_out_trace:
	mov.w		&0x2024,0x6(%sp)
	fmov.l		%fpiar,0x8(%sp)
	bra.l		_real_trace

# an exception occurred and that exception was enabled. 	
fu_out_exc:
	subi.l		&24,%d0			# fix offset to be 0-8

# we don't mess with the existing fsave frame. just re-insert it and
# jump to the "_real_{}()" handler...
	mov.w		(tbl_fu_out.b,%pc,%d0.w*2),%d0
	jmp		(tbl_fu_out.b,%pc,%d0.w*1)

	swbeg		&0x8
tbl_fu_out:
	short		tbl_fu_out	- tbl_fu_out	# BSUN can't happen
	short		tbl_fu_out 	- tbl_fu_out	# SNAN can't happen
	short		fu_operr	- tbl_fu_out	# OPERR
	short		fu_ovfl 	- tbl_fu_out	# OVFL
	short		fu_unfl 	- tbl_fu_out	# UNFL
	short		tbl_fu_out	- tbl_fu_out	# DZ can't happen
	short		fu_inex 	- tbl_fu_out	# INEX2
	short		tbl_fu_out	- tbl_fu_out	# INEX1 won't make it here

# for snan,operr,ovfl,unfl, src op is still in FP_SRC so just 
# frestore it.
fu_snan:
	fmovm.x		EXC_FPREGS(%a6),&0xc0	# restore fp0/fp1
	fmovm.l		USER_FPCR(%a6),%fpcr,%fpsr,%fpiar # restore ctrl regs
	movm.l		EXC_DREGS(%a6),&0x0303	# restore d0-d1/a0-a1

	mov.w		&0x30d8,EXC_VOFF(%a6)	# vector offset = 0xd8
	mov.w		&0xe006,2+FP_SRC(%a6)

	frestore	FP_SRC(%a6)

	unlk		%a6


	bra.l		_real_snan

fu_operr:
	fmovm.x		EXC_FPREGS(%a6),&0xc0	# restore fp0/fp1
	fmovm.l		USER_FPCR(%a6),%fpcr,%fpsr,%fpiar # restore ctrl regs
	movm.l		EXC_DREGS(%a6),&0x0303	# restore d0-d1/a0-a1

	mov.w		&0x30d0,EXC_VOFF(%a6)	# vector offset = 0xd0
	mov.w		&0xe004,2+FP_SRC(%a6)

	frestore	FP_SRC(%a6)

	unlk		%a6


	bra.l		_real_operr

fu_ovfl:
	fmovm.x		&0x40,FP_SRC(%a6)	# save EXOP to the stack

	fmovm.x		EXC_FPREGS(%a6),&0xc0	# restore fp0/fp1
	fmovm.l		USER_FPCR(%a6),%fpcr,%fpsr,%fpiar # restore ctrl regs
	movm.l		EXC_DREGS(%a6),&0x0303	# restore d0-d1/a0-a1

	mov.w		&0x30d4,EXC_VOFF(%a6)	# vector offset = 0xd4
	mov.w		&0xe005,2+FP_SRC(%a6)

	frestore	FP_SRC(%a6)		# restore EXOP

	unlk		%a6

	bra.l		_real_ovfl

# underflow can happen for extended precision. extended precision opclass
# three instruction exceptions don't update the stack pointer. so, if the
# exception occurred from user mode, then simply update a7 and exit normally.
# if the exception occurred from supervisor mode, check if 
fu_unfl:
	mov.l		EXC_A6(%a6),(%a6)	# restore a6

	btst		&0x5,EXC_SR(%a6)
	bne.w		fu_unfl_s

	mov.l		EXC_A7(%a6),%a0		# restore a7 whether we need
	mov.l		%a0,%usp		# to or not...
	
fu_unfl_cont:
	fmovm.x		&0x40,FP_SRC(%a6)	# save EXOP to the stack

	fmovm.x		EXC_FPREGS(%a6),&0xc0	# restore fp0/fp1
	fmovm.l		USER_FPCR(%a6),%fpcr,%fpsr,%fpiar # restore ctrl regs
	movm.l		EXC_DREGS(%a6),&0x0303	# restore d0-d1/a0-a1

	mov.w		&0x30cc,EXC_VOFF(%a6)	# vector offset = 0xcc
	mov.w		&0xe003,2+FP_SRC(%a6)

	frestore	FP_SRC(%a6)		# restore EXOP

	unlk		%a6

	bra.l		_real_unfl

fu_unfl_s:
	cmpi.b		SPCOND_FLG(%a6),&mda7_flg # was the <ea> mode -(sp)?
	bne.b		fu_unfl_cont

# the extended precision result is still in fp0. but, we need to save it
# somewhere on the stack until we can copy it to its final resting place
# (where the exc frame is currently). make sure it's not at the top of the
# frame or it will get overwritten when the exc stack frame is shifted "down".
	fmovm.x		&0x80,FP_SRC(%a6)	# put answer on stack
	fmovm.x		&0x40,FP_DST(%a6)	# put EXOP on stack

	fmovm.x		EXC_FPREGS(%a6),&0xc0	# restore fp0/fp1
	fmovm.l		USER_FPCR(%a6),%fpcr,%fpsr,%fpiar # restore ctrl regs
	movm.l		EXC_DREGS(%a6),&0x0303	# restore d0-d1/a0-a1

	mov.w		&0x30cc,EXC_VOFF(%a6)	# vector offset = 0xcc
	mov.w		&0xe003,2+FP_DST(%a6)

	frestore	FP_DST(%a6)		# restore EXOP

	mov.l		(%a6),%a6		# restore frame pointer

	mov.l		LOCAL_SIZE+EXC_SR(%sp),LOCAL_SIZE+EXC_SR-0xc(%sp)
	mov.l		LOCAL_SIZE+2+EXC_PC(%sp),LOCAL_SIZE+2+EXC_PC-0xc(%sp)
	mov.l		LOCAL_SIZE+EXC_EA(%sp),LOCAL_SIZE+EXC_EA-0xc(%sp)

# now, copy the result to the proper place on the stack
	mov.l		LOCAL_SIZE+FP_SRC_EX(%sp),LOCAL_SIZE+EXC_SR+0x0(%sp)
	mov.l		LOCAL_SIZE+FP_SRC_HI(%sp),LOCAL_SIZE+EXC_SR+0x4(%sp)
	mov.l		LOCAL_SIZE+FP_SRC_LO(%sp),LOCAL_SIZE+EXC_SR+0x8(%sp)

	add.l		&LOCAL_SIZE-0x8,%sp

	bra.l		_real_unfl

# fmove in and out enter here.
fu_inex:
	fmovm.x		&0x40,FP_SRC(%a6)	# save EXOP to the stack

	fmovm.x		EXC_FPREGS(%a6),&0xc0	# restore fp0/fp1
	fmovm.l		USER_FPCR(%a6),%fpcr,%fpsr,%fpiar # restore ctrl regs
	movm.l		EXC_DREGS(%a6),&0x0303	# restore d0-d1/a0-a1

	mov.w		&0x30c4,EXC_VOFF(%a6)	# vector offset = 0xc4
	mov.w		&0xe001,2+FP_SRC(%a6)

	frestore	FP_SRC(%a6)		# restore EXOP

	unlk		%a6


	bra.l		_real_inex

#########################################################################
#########################################################################
fu_in_pack:


# I'm not sure at this point what FPSR bits are valid for this instruction.
# so, since the emulation routines re-create them anyways, zero exception field
	andi.l		&0x0ff00ff,USER_FPSR(%a6) # zero exception field

	fmov.l		&0x0,%fpcr		# zero current control regs
	fmov.l		&0x0,%fpsr

	bsr.l		get_packed		# fetch packed src operand

	lea		FP_SRC(%a6),%a0		# pass ptr to src
	bsr.l		set_tag_x		# set src optype tag

	mov.b		%d0,STAG(%a6)		# save src optype tag

	bfextu		EXC_CMDREG(%a6){&6:&3},%d0 # dyadic; load dst reg

# bit five of the fp extension word separates the monadic and dyadic operations 
# at this point
	btst		&0x5,1+EXC_CMDREG(%a6)	# is operation monadic or dyadic?
	beq.b		fu_extract_p		# monadic
	cmpi.b		1+EXC_CMDREG(%a6),&0x3a	# is operation an ftst?
	beq.b		fu_extract_p		# yes, so it's monadic, too

	bsr.l		load_fpn2		# load dst into FP_DST

	lea		FP_DST(%a6),%a0		# pass: ptr to dst op
	bsr.l		set_tag_x		# tag the operand type
	cmpi.b		%d0,&UNNORM		# is operand an UNNORM?
	bne.b		fu_op2_done_p		# no
	bsr.l		unnorm_fix		# yes; convert to NORM,DENORM,or ZERO
fu_op2_done_p:
	mov.b		%d0,DTAG(%a6)		# save dst optype tag

fu_extract_p:
	clr.l		%d0
	mov.b		FPCR_MODE(%a6),%d0	# fetch rnd mode/prec

	bfextu		1+EXC_CMDREG(%a6){&1:&7},%d1 # extract extension

	lea		FP_SRC(%a6),%a0
	lea		FP_DST(%a6),%a1

	mov.l		(tbl_unsupp.l,%pc,%d1.l*4),%d1 # fetch routine addr
	jsr		(tbl_unsupp.l,%pc,%d1.l*1)

#
# Exceptions in order of precedence:
# 	BSUN	: none
#	SNAN	: all dyadic ops
#	OPERR	: fsqrt(-NORM)
#	OVFL	: all except ftst,fcmp
#	UNFL	: all except ftst,fcmp
#	DZ	: fdiv
# 	INEX2	: all except ftst,fcmp
#	INEX1	: all
#

# we determine the highest priority exception(if any) set by the
# emulation routine that has also been enabled by the user.
	mov.b		FPCR_ENABLE(%a6),%d0	# fetch exceptions enabled
	bne.w		fu_in_ena_p		# some are enabled

fu_in_cont_p:
# fcmp and ftst do not store any result.
	mov.b		1+EXC_CMDREG(%a6),%d0	# fetch extension
	andi.b		&0x38,%d0		# extract bits 3-5
	cmpi.b		%d0,&0x38		# is instr fcmp or ftst?
	beq.b		fu_in_exit_p		# yes

	bfextu		EXC_CMDREG(%a6){&6:&3},%d0 # dyadic; load dst reg
	bsr.l		store_fpreg		# store the result

fu_in_exit_p:

	btst		&0x5,EXC_SR(%a6)	# user or supervisor?
	bne.w		fu_in_exit_s_p		# supervisor

	mov.l		EXC_A7(%a6),%a0		# update user a7
	mov.l		%a0,%usp

fu_in_exit_cont_p:
	fmovm.x		EXC_FPREGS(%a6),&0xc0	# restore fp0/fp1
	fmovm.l		USER_FPCR(%a6),%fpcr,%fpsr,%fpiar # restore ctrl regs
	movm.l		EXC_DREGS(%a6),&0x0303	# restore d0-d1/a0-a1

	unlk		%a6			# unravel stack frame

	btst		&0x7,(%sp)		# is trace on?
	bne.w		fu_trace_p		# yes

	bra.l		_fpsp_done		# exit to os

# the exception occurred in supervisor mode. check to see if the
# addressing mode was (a7)+. if so, we'll need to shift the
# stack frame "up".
fu_in_exit_s_p:
	btst		&mia7_bit,SPCOND_FLG(%a6) # was ea mode (a7)+
	beq.b		fu_in_exit_cont_p	# no

	fmovm.x		EXC_FPREGS(%a6),&0xc0	# restore fp0/fp1
	fmovm.l		USER_FPCR(%a6),%fpcr,%fpsr,%fpiar # restore ctrl regs
	movm.l		EXC_DREGS(%a6),&0x0303	# restore d0-d1/a0-a1

	unlk		%a6			# unravel stack frame

# shift the stack frame "up". we don't really care about the <ea> field.
	mov.l		0x4(%sp),0x10(%sp)
	mov.l		0x0(%sp),0xc(%sp)
	add.l		&0xc,%sp

	btst		&0x7,(%sp)		# is trace on?
	bne.w		fu_trace_p		# yes

	bra.l		_fpsp_done		# exit to os

fu_in_ena_p:
	and.b		FPSR_EXCEPT(%a6),%d0	# keep only ones enabled & set
	bfffo		%d0{&24:&8},%d0		# find highest priority exception
	bne.b		fu_in_exc_p		# at least one was set

#
# No exceptions occurred that were also enabled. Now:
#
#   	if (OVFL && ovfl_disabled && inexact_enabled) {
#	    branch to _real_inex() (even if the result was exact!);
#     	} else {
#	    save the result in the proper fp reg (unless the op is fcmp or ftst);
#	    return;
#     	}
#
	btst		&ovfl_bit,FPSR_EXCEPT(%a6) # was overflow set?
	beq.w		fu_in_cont_p		# no
	
fu_in_ovflchk_p:
	btst		&inex2_bit,FPCR_ENABLE(%a6) # was inexact enabled?
	beq.w		fu_in_cont_p		# no
	bra.w		fu_in_exc_ovfl_p	# do _real_inex() now

#
# An exception occurred and that exception was enabled:
#
#	shift enabled exception field into lo byte of d0;
#	if (((INEX2 || INEX1) && inex_enabled && OVFL && ovfl_disabled) ||
#	    ((INEX2 || INEX1) && inex_enabled && UNFL && unfl_disabled)) {
#		/*
#		 * this is the case where we must call _real_inex() now or else
#		 * there will be no other way to pass it the exceptional operand
#		 */
#		call _real_inex();
#	} else {
#		restore exc state (SNAN||OPERR||OVFL||UNFL||DZ||INEX) into the FPU;
#	}
#	    		
fu_in_exc_p:
	subi.l		&24,%d0			# fix offset to be 0-8
	cmpi.b		%d0,&0x6		# is exception INEX? (6 or 7)
	blt.b		fu_in_exc_exit_p	# no

# the enabled exception was inexact
	btst		&unfl_bit,FPSR_EXCEPT(%a6) # did disabled underflow occur?
	bne.w		fu_in_exc_unfl_p	# yes
	btst		&ovfl_bit,FPSR_EXCEPT(%a6) # did disabled overflow occur?
	bne.w		fu_in_exc_ovfl_p	# yes

# here, we insert the correct fsave status value into the fsave frame for the
# corresponding exception. the operand in the fsave frame should be the original 
# src operand.
# as a reminder for future predicted pain and agony, we are passing in fsave the
# "non-skewed" operand for cases of sgl and dbl src INFs,NANs, and DENORMs.
# this is INCORRECT for enabled SNAN which would give to the user the skewed SNAN!!!
fu_in_exc_exit_p:
	btst		&0x5,EXC_SR(%a6)	# user or supervisor?
	bne.w		fu_in_exc_exit_s_p	# supervisor

	mov.l		EXC_A7(%a6),%a0		# update user a7
	mov.l		%a0,%usp

fu_in_exc_exit_cont_p:
	mov.w		(tbl_except_p.b,%pc,%d0.w*2),2+FP_SRC(%a6)

	fmovm.x		EXC_FPREGS(%a6),&0xc0	# restore fp0/fp1
	fmovm.l		USER_FPCR(%a6),%fpcr,%fpsr,%fpiar # restore ctrl regs
	movm.l		EXC_DREGS(%a6),&0x0303	# restore d0-d1/a0-a1

	frestore	FP_SRC(%a6)		# restore src op

	unlk		%a6

	btst		&0x7,(%sp)		# is trace enabled?
	bne.w		fu_trace_p		# yes

	bra.l		_fpsp_done

tbl_except_p:
	short		0xe000,0xe006,0xe004,0xe005
	short		0xe003,0xe002,0xe001,0xe001

fu_in_exc_ovfl_p:
	mov.w		&0x3,%d0
	bra.w		fu_in_exc_exit_p

fu_in_exc_unfl_p:
	mov.w		&0x4,%d0
	bra.w		fu_in_exc_exit_p

fu_in_exc_exit_s_p:
	btst		&mia7_bit,SPCOND_FLG(%a6)
	beq.b		fu_in_exc_exit_cont_p

	mov.w		(tbl_except_p.b,%pc,%d0.w*2),2+FP_SRC(%a6)

	fmovm.x		EXC_FPREGS(%a6),&0xc0	# restore fp0/fp1
	fmovm.l		USER_FPCR(%a6),%fpcr,%fpsr,%fpiar # restore ctrl regs
	movm.l		EXC_DREGS(%a6),&0x0303	# restore d0-d1/a0-a1

	frestore	FP_SRC(%a6)		# restore src op

	unlk		%a6			# unravel stack frame

# shift stack frame "up". who cares about <ea> field.
	mov.l		0x4(%sp),0x10(%sp)
	mov.l		0x0(%sp),0xc(%sp)
	add.l		&0xc,%sp

	btst		&0x7,(%sp)		# is trace on?
	bne.b		fu_trace_p		# yes

	bra.l		_fpsp_done		# exit to os
	
#
# The opclass two PACKED instruction that took an "Unimplemented Data Type" 
# exception was being traced. Make the "current" PC the FPIAR and put it in the 
# trace stack frame then jump to _real_trace().
#					
#		  UNSUPP FRAME		   TRACE FRAME
#		*****************	*****************
#		*      EA	*	*    Current	*
#		*		*	*      PC	*
#		*****************	*****************
#		* 0x2 *	0x0dc	* 	* 0x2 *  0x024	*
#		*****************	*****************
#		*     Next	*	*     Next	*
#		*      PC	*      	*      PC	*
#		*****************	*****************
#		*      SR	*	*      SR	*
#		*****************	*****************
fu_trace_p:
	mov.w		&0x2024,0x6(%sp)
	fmov.l		%fpiar,0x8(%sp)

	bra.l		_real_trace

#########################################################
#########################################################
fu_out_pack:


# I'm not sure at this point what FPSR bits are valid for this instruction.
# so, since the emulation routines re-create them anyways, zero exception field.
# fmove out doesn't affect ccodes.
	and.l		&0xffff00ff,USER_FPSR(%a6) # zero exception field

	fmov.l		&0x0,%fpcr		# zero current control regs
	fmov.l		&0x0,%fpsr

	bfextu		EXC_CMDREG(%a6){&6:&3},%d0
	bsr.l		load_fpn1

# unlike other opclass 3, unimplemented data type exceptions, packed must be
# able to detect all operand types.
	lea		FP_SRC(%a6),%a0
	bsr.l		set_tag_x		# tag the operand type
	cmpi.b		%d0,&UNNORM		# is operand an UNNORM?
	bne.b		fu_op2_p		# no
	bsr.l		unnorm_fix		# yes; convert to NORM,DENORM,or ZERO

fu_op2_p:
	mov.b		%d0,STAG(%a6)		# save src optype tag

	clr.l		%d0
	mov.b		FPCR_MODE(%a6),%d0	# fetch rnd mode/prec

	lea		FP_SRC(%a6),%a0		# pass ptr to src operand

	mov.l		(%a6),EXC_A6(%a6)	# in case a6 changes
	bsr.l		fout			# call fmove out routine

# Exceptions in order of precedence:
# 	BSUN	: no
#	SNAN	: yes
#	OPERR	: if ((k_factor > +17) || (dec. exp exceeds 3 digits))
#	OVFL	: no
#	UNFL	: no
#	DZ	: no
# 	INEX2	: yes
#	INEX1	: no

# determine the highest priority exception(if any) set by the
# emulation routine that has also been enabled by the user.
	mov.b		FPCR_ENABLE(%a6),%d0	# fetch exceptions enabled
	bne.w		fu_out_ena_p		# some are enabled

fu_out_exit_p:
	mov.l		EXC_A6(%a6),(%a6)	# restore a6

	btst		&0x5,EXC_SR(%a6)	# user or supervisor?
	bne.b		fu_out_exit_s_p		# supervisor

	mov.l		EXC_A7(%a6),%a0		# update user a7
	mov.l		%a0,%usp

fu_out_exit_cont_p:
	fmovm.x		EXC_FPREGS(%a6),&0xc0	# restore fp0/fp1
	fmovm.l		USER_FPCR(%a6),%fpcr,%fpsr,%fpiar # restore ctrl regs
	movm.l		EXC_DREGS(%a6),&0x0303	# restore d0-d1/a0-a1

	unlk		%a6			# unravel stack frame

	btst		&0x7,(%sp)		# is trace on?
	bne.w		fu_trace_p		# yes

	bra.l		_fpsp_done		# exit to os

# the exception occurred in supervisor mode. check to see if the
# addressing mode was -(a7). if so, we'll need to shift the
# stack frame "down".
fu_out_exit_s_p:
	btst		&mda7_bit,SPCOND_FLG(%a6) # was ea mode -(a7)
	beq.b		fu_out_exit_cont_p	# no

	fmovm.x		EXC_FPREGS(%a6),&0xc0	# restore fp0/fp1
	fmovm.l		USER_FPCR(%a6),%fpcr,%fpsr,%fpiar # restore ctrl regs
	movm.l		EXC_DREGS(%a6),&0x0303	# restore d0-d1/a0-a1

	mov.l		(%a6),%a6		# restore frame pointer

	mov.l		LOCAL_SIZE+EXC_SR(%sp),LOCAL_SIZE+EXC_SR-0xc(%sp)
	mov.l		LOCAL_SIZE+2+EXC_PC(%sp),LOCAL_SIZE+2+EXC_PC-0xc(%sp)

# now, copy the result to the proper place on the stack
	mov.l		LOCAL_SIZE+FP_DST_EX(%sp),LOCAL_SIZE+EXC_SR+0x0(%sp)
	mov.l		LOCAL_SIZE+FP_DST_HI(%sp),LOCAL_SIZE+EXC_SR+0x4(%sp)
	mov.l		LOCAL_SIZE+FP_DST_LO(%sp),LOCAL_SIZE+EXC_SR+0x8(%sp)

	add.l		&LOCAL_SIZE-0x8,%sp

	btst		&0x7,(%sp)
	bne.w		fu_trace_p

	bra.l		_fpsp_done

fu_out_ena_p:
	and.b		FPSR_EXCEPT(%a6),%d0	# keep only ones enabled
	bfffo		%d0{&24:&8},%d0		# find highest priority exception
	beq.w		fu_out_exit_p

	mov.l		EXC_A6(%a6),(%a6)	# restore a6

# an exception occurred and that exception was enabled. 	
# the only exception possible on packed move out are INEX, OPERR, and SNAN.
fu_out_exc_p:
	cmpi.b		%d0,&0x1a
	bgt.w		fu_inex_p2
	beq.w		fu_operr_p

fu_snan_p:
	btst		&0x5,EXC_SR(%a6)
	bne.b		fu_snan_s_p

	mov.l		EXC_A7(%a6),%a0
	mov.l		%a0,%usp
	bra.w		fu_snan

fu_snan_s_p:
	cmpi.b		SPCOND_FLG(%a6),&mda7_flg
	bne.w		fu_snan

# the instruction was "fmove.p fpn,-(a7)" from supervisor mode.
# the strategy is to move the exception frame "down" 12 bytes. then, we
# can store the default result where the exception frame was.
	fmovm.x		EXC_FPREGS(%a6),&0xc0	# restore fp0/fp1
	fmovm.l		USER_FPCR(%a6),%fpcr,%fpsr,%fpiar # restore ctrl regs
	movm.l		EXC_DREGS(%a6),&0x0303	# restore d0-d1/a0-a1

	mov.w		&0x30d8,EXC_VOFF(%a6)	# vector offset = 0xd0
	mov.w		&0xe006,2+FP_SRC(%a6) 	# set fsave status

	frestore	FP_SRC(%a6)		# restore src operand

	mov.l		(%a6),%a6		# restore frame pointer

	mov.l		LOCAL_SIZE+EXC_SR(%sp),LOCAL_SIZE+EXC_SR-0xc(%sp)
	mov.l		LOCAL_SIZE+2+EXC_PC(%sp),LOCAL_SIZE+2+EXC_PC-0xc(%sp)
	mov.l		LOCAL_SIZE+EXC_EA(%sp),LOCAL_SIZE+EXC_EA-0xc(%sp)

# now, we copy the default result to it's proper location
	mov.l		LOCAL_SIZE+FP_DST_EX(%sp),LOCAL_SIZE+0x4(%sp)
	mov.l		LOCAL_SIZE+FP_DST_HI(%sp),LOCAL_SIZE+0x8(%sp)
	mov.l		LOCAL_SIZE+FP_DST_LO(%sp),LOCAL_SIZE+0xc(%sp)

	add.l		&LOCAL_SIZE-0x8,%sp


	bra.l		_real_snan

fu_operr_p:
	btst		&0x5,EXC_SR(%a6)
	bne.w		fu_operr_p_s

	mov.l		EXC_A7(%a6),%a0
	mov.l		%a0,%usp
	bra.w		fu_operr

fu_operr_p_s:
	cmpi.b		SPCOND_FLG(%a6),&mda7_flg
	bne.w		fu_operr

# the instruction was "fmove.p fpn,-(a7)" from supervisor mode.
# the strategy is to move the exception frame "down" 12 bytes. then, we
# can store the default result where the exception frame was.
	fmovm.x		EXC_FPREGS(%a6),&0xc0	# restore fp0/fp1
	fmovm.l		USER_FPCR(%a6),%fpcr,%fpsr,%fpiar # restore ctrl regs
	movm.l		EXC_DREGS(%a6),&0x0303	# restore d0-d1/a0-a1

	mov.w		&0x30d0,EXC_VOFF(%a6)	# vector offset = 0xd0
	mov.w		&0xe004,2+FP_SRC(%a6) 	# set fsave status

	frestore	FP_SRC(%a6)		# restore src operand

	mov.l		(%a6),%a6		# restore frame pointer

	mov.l		LOCAL_SIZE+EXC_SR(%sp),LOCAL_SIZE+EXC_SR-0xc(%sp)
	mov.l		LOCAL_SIZE+2+EXC_PC(%sp),LOCAL_SIZE+2+EXC_PC-0xc(%sp)
	mov.l		LOCAL_SIZE+EXC_EA(%sp),LOCAL_SIZE+EXC_EA-0xc(%sp)

# now, we copy the default result to it's proper location
	mov.l		LOCAL_SIZE+FP_DST_EX(%sp),LOCAL_SIZE+0x4(%sp)
	mov.l		LOCAL_SIZE+FP_DST_HI(%sp),LOCAL_SIZE+0x8(%sp)
	mov.l		LOCAL_SIZE+FP_DST_LO(%sp),LOCAL_SIZE+0xc(%sp)

	add.l		&LOCAL_SIZE-0x8,%sp


	bra.l		_real_operr

fu_inex_p2:
	btst		&0x5,EXC_SR(%a6)
	bne.w		fu_inex_s_p2

	mov.l		EXC_A7(%a6),%a0
	mov.l		%a0,%usp
	bra.w		fu_inex

fu_inex_s_p2:
	cmpi.b		SPCOND_FLG(%a6),&mda7_flg
	bne.w		fu_inex

# the instruction was "fmove.p fpn,-(a7)" from supervisor mode.
# the strategy is to move the exception frame "down" 12 bytes. then, we
# can store the default result where the exception frame was.
	fmovm.x		EXC_FPREGS(%a6),&0xc0	# restore fp0/fp1
	fmovm.l		USER_FPCR(%a6),%fpcr,%fpsr,%fpiar # restore ctrl regs
	movm.l		EXC_DREGS(%a6),&0x0303	# restore d0-d1/a0-a1

	mov.w		&0x30c4,EXC_VOFF(%a6) 	# vector offset = 0xc4
	mov.w		&0xe001,2+FP_SRC(%a6) 	# set fsave status

	frestore	FP_SRC(%a6)		# restore src operand

	mov.l		(%a6),%a6		# restore frame pointer

	mov.l		LOCAL_SIZE+EXC_SR(%sp),LOCAL_SIZE+EXC_SR-0xc(%sp)
	mov.l		LOCAL_SIZE+2+EXC_PC(%sp),LOCAL_SIZE+2+EXC_PC-0xc(%sp)
	mov.l		LOCAL_SIZE+EXC_EA(%sp),LOCAL_SIZE+EXC_EA-0xc(%sp)

# now, we copy the default result to it's proper location
	mov.l		LOCAL_SIZE+FP_DST_EX(%sp),LOCAL_SIZE+0x4(%sp)
	mov.l		LOCAL_SIZE+FP_DST_HI(%sp),LOCAL_SIZE+0x8(%sp)
	mov.l		LOCAL_SIZE+FP_DST_LO(%sp),LOCAL_SIZE+0xc(%sp)

	add.l		&LOCAL_SIZE-0x8,%sp


	bra.l		_real_inex

#########################################################################

#
# if we're stuffing a source operand back into an fsave frame then we
# have to make sure that for single or double source operands that the
# format stuffed is as weird as the hardware usually makes it.
#
	global		funimp_skew
funimp_skew:
	bfextu		EXC_EXTWORD(%a6){&3:&3},%d0 # extract src specifier
	cmpi.b		%d0,&0x1		# was src sgl?
	beq.b		funimp_skew_sgl		# yes
	cmpi.b		%d0,&0x5		# was src dbl?
	beq.b		funimp_skew_dbl		# yes
	rts

funimp_skew_sgl:
	mov.w		FP_SRC_EX(%a6),%d0	# fetch DENORM exponent
	andi.w		&0x7fff,%d0		# strip sign
	beq.b		funimp_skew_sgl_not
	cmpi.w		%d0,&0x3f80
	bgt.b		funimp_skew_sgl_not		
	neg.w		%d0			# make exponent negative
	addi.w		&0x3f81,%d0		# find amt to shift
	mov.l		FP_SRC_HI(%a6),%d1	# fetch DENORM hi(man)
	lsr.l		%d0,%d1			# shift it
	bset		&31,%d1			# set j-bit
	mov.l		%d1,FP_SRC_HI(%a6)	# insert new hi(man)
	andi.w		&0x8000,FP_SRC_EX(%a6)	# clear old exponent
	ori.w		&0x3f80,FP_SRC_EX(%a6)	# insert new "skewed" exponent
funimp_skew_sgl_not:
	rts

funimp_skew_dbl:
	mov.w		FP_SRC_EX(%a6),%d0	# fetch DENORM exponent
	andi.w		&0x7fff,%d0		# strip sign
	beq.b		funimp_skew_dbl_not
	cmpi.w		%d0,&0x3c00
	bgt.b		funimp_skew_dbl_not		

	tst.b		FP_SRC_EX(%a6)		# make "internal format"
	smi.b		0x2+FP_SRC(%a6)
	mov.w		%d0,FP_SRC_EX(%a6)	# insert exponent with cleared sign
	clr.l		%d0			# clear g,r,s
	lea		FP_SRC(%a6),%a0		# pass ptr to src op
	mov.w		&0x3c01,%d1		# pass denorm threshold
	bsr.l		dnrm_lp			# denorm it
	mov.w		&0x3c00,%d0		# new exponent
	tst.b		0x2+FP_SRC(%a6)		# is sign set?
	beq.b		fss_dbl_denorm_done	# no
	bset		&15,%d0			# set sign
fss_dbl_denorm_done:
	bset		&0x7,FP_SRC_HI(%a6)	# set j-bit
	mov.w		%d0,FP_SRC_EX(%a6)	# insert new exponent
funimp_skew_dbl_not:
	rts

#########################################################################
	global		_mem_write2
_mem_write2:
	btst		&0x5,EXC_SR(%a6)
	beq.l		_dmem_write
	mov.l		0x0(%a0),FP_DST_EX(%a6)
	mov.l		0x4(%a0),FP_DST_HI(%a6)
	mov.l		0x8(%a0),FP_DST_LO(%a6)
	clr.l		%d1
	rts

#########################################################################
# XDEF ****************************************************************	#
#	_fpsp_effadd(): 060FPSP entry point for FP "Unimplemented	#
#		     	effective address" exception.			#
#									#
#	This handler should be the first code executed upon taking the	#
#	FP Unimplemented Effective Address exception in an operating	#
#	system.								#
#									#
# XREF ****************************************************************	#
#	_imem_read_long() - read instruction longword			#
#	fix_skewed_ops() - adjust src operand in fsave frame		#
#	set_tag_x() - determine optype of src/dst operands		#
#	store_fpreg() - store opclass 0 or 2 result to FP regfile	#
#	unnorm_fix() - change UNNORM operands to NORM or ZERO		#
#	load_fpn2() - load dst operand from FP regfile			#
#	tbl_unsupp - add of table of emulation routines for opclass 0,2	#
#	decbin() - convert packed data to FP binary data		#
#	_real_fpu_disabled() - "callout" for "FPU disabled" exception	#
#	_real_access() - "callout" for access error exception		#
#	_mem_read() - read extended immediate operand from memory	#
#	_fpsp_done() - "callout" for exit; work all done		#
#	_real_trace() - "callout" for Trace enabled exception		#
#	fmovm_dynamic() - emulate dynamic fmovm instruction		#
#	fmovm_ctrl() - emulate fmovm control instruction		#
#									#
# INPUT ***************************************************************	#
#	- The system stack contains the "Unimplemented <ea>" stk frame	#
# 									#
# OUTPUT **************************************************************	#
#	If access error:						#
#	- The system stack is changed to an access error stack frame	#
#	If FPU disabled:						#
#	- The system stack is changed to an FPU disabled stack frame	#
#	If Trace exception enabled:					#
#	- The system stack is changed to a Trace exception stack frame	#
#	Else: (normal case)						#
#	- None (correct result has been stored as appropriate)		#
#									#
# ALGORITHM ***********************************************************	#
#	This exception handles 3 types of operations:			#
# (1) FP Instructions using extended precision or packed immediate	#
#     addressing mode.							#
# (2) The "fmovm.x" instruction w/ dynamic register specification.	#
# (3) The "fmovm.l" instruction w/ 2 or 3 control registers.		#
#									#
#	For immediate data operations, the data is read in w/ a		#
# _mem_read() "callout", converted to FP binary (if packed), and used	#
# as the source operand to the instruction specified by the instruction	#
# word. If no FP exception should be reported ads a result of the 	#
# emulation, then the result is stored to the destination register and	#
# the handler exits through _fpsp_done(). If an enabled exc has been	#
# signalled as a result of emulation, then an fsave state frame		#
# corresponding to the FP exception type must be entered into the 060	#
# FPU before exiting. In either the enabled or disabled cases, we 	#
# must also check if a Trace exception is pending, in which case, we	#
# must create a Trace exception stack frame from the current exception	#
# stack frame. If no Trace is pending, we simply exit through		#
# _fpsp_done().								#
#	For "fmovm.x", call the routine fmovm_dynamic() which will 	#
# decode and emulate the instruction. No FP exceptions can be pending	#
# as a result of this operation emulation. A Trace exception can be	#
# pending, though, which means the current stack frame must be changed	#
# to a Trace stack frame and an exit made through _real_trace().	#
# For the case of "fmovm.x Dn,-(a7)", where the offending instruction	#
# was executed from supervisor mode, this handler must store the FP	#
# register file values to the system stack by itself since		#
# fmovm_dynamic() can't handle this. A normal exit is made through	#
# fpsp_done().								#
#	For "fmovm.l", fmovm_ctrl() is used to emulate the instruction.	#
# Again, a Trace exception may be pending and an exit made through	#
# _real_trace(). Else, a normal exit is made through _fpsp_done().	#
#									#
#	Before any of the above is attempted, it must be checked to	#
# see if the FPU is disabled. Since the "Unimp <ea>" exception is taken	#
# before the "FPU disabled" exception, but the "FPU disabled" exception	#
# has higher priority, we check the disabled bit in the PCR. If set,	#
# then we must create an 8 word "FPU disabled" exception stack frame	#
# from the current 4 word exception stack frame. This includes 		#
# reproducing the effective address of the instruction to put on the 	#
# new stack frame.							#
#									#
# 	In the process of all emulation work, if a _mem_read()		#
# "callout" returns a failing result indicating an access error, then	#
# we must create an access error stack frame from the current stack	#
# frame. This information includes a faulting address and a fault-	#
# status-longword. These are created within this handler.		#
#									#
#########################################################################

	global		_fpsp_effadd
_fpsp_effadd:

# This exception type takes priority over the "Line F Emulator"
# exception. Therefore, the FPU could be disabled when entering here.
# So, we must check to see if it's disabled and handle that case separately.
	mov.l		%d0,-(%sp)		# save d0
	movc		%pcr,%d0		# load proc cr
	btst		&0x1,%d0		# is FPU disabled?
	bne.w		iea_disabled		# yes
	mov.l		(%sp)+,%d0		# restore d0

	link		%a6,&-LOCAL_SIZE	# init stack frame

	movm.l		&0x0303,EXC_DREGS(%a6)	# save d0-d1/a0-a1
	fmovm.l		%fpcr,%fpsr,%fpiar,USER_FPCR(%a6) # save ctrl regs
	fmovm.x		&0xc0,EXC_FPREGS(%a6)	# save fp0-fp1 on stack

# PC of instruction that took the exception is the PC in the frame
	mov.l		EXC_PC(%a6),EXC_EXTWPTR(%a6)

	mov.l		EXC_EXTWPTR(%a6),%a0	# fetch instruction addr
	addq.l		&0x4,EXC_EXTWPTR(%a6)	# incr instruction ptr
	bsr.l		_imem_read_long		# fetch the instruction words
	mov.l		%d0,EXC_OPWORD(%a6)	# store OPWORD and EXTWORD

#########################################################################

	tst.w		%d0			# is operation fmovem?
	bmi.w		iea_fmovm		# yes

#
# here, we will have:
# 	fabs	fdabs	fsabs		facos		fmod
#	fadd	fdadd	fsadd		fasin		frem
# 	fcmp				fatan		fscale
#	fdiv	fddiv	fsdiv		fatanh		fsin
#	fint				fcos		fsincos
#	fintrz				fcosh		fsinh
#	fmove	fdmove	fsmove		fetox		ftan
# 	fmul	fdmul	fsmul		fetoxm1		ftanh
#	fneg	fdneg	fsneg		fgetexp		ftentox
#	fsgldiv				fgetman		ftwotox
# 	fsglmul				flog10
# 	fsqrt				flog2
#	fsub	fdsub	fssub		flogn
#	ftst				flognp1
# which can all use f<op>.{x,p}
# so, now it's immediate data extended precision AND PACKED FORMAT!
#
iea_op:
	andi.l		&0x00ff00ff,USER_FPSR(%a6)

	btst		&0xa,%d0		# is src fmt x or p?
	bne.b		iea_op_pack		# packed


	mov.l		EXC_EXTWPTR(%a6),%a0	# pass: ptr to #<data>
	lea		FP_SRC(%a6),%a1		# pass: ptr to super addr
	mov.l		&0xc,%d0		# pass: 12 bytes
	bsr.l		_imem_read		# read extended immediate

	tst.l		%d1			# did ifetch fail?
	bne.w		iea_iacc		# yes

	bra.b		iea_op_setsrc

iea_op_pack:

	mov.l		EXC_EXTWPTR(%a6),%a0	# pass: ptr to #<data>
	lea		FP_SRC(%a6),%a1		# pass: ptr to super dst
	mov.l		&0xc,%d0		# pass: 12 bytes
	bsr.l		_imem_read		# read packed operand

	tst.l		%d1			# did ifetch fail?
	bne.w		iea_iacc		# yes

# The packed operand is an INF or a NAN if the exponent field is all ones.
	bfextu		FP_SRC(%a6){&1:&15},%d0	# get exp
	cmpi.w		%d0,&0x7fff		# INF or NAN?
	beq.b		iea_op_setsrc		# operand is an INF or NAN

# The packed operand is a zero if the mantissa is all zero, else it's
# a normal packed op.
	mov.b		3+FP_SRC(%a6),%d0	# get byte 4
	andi.b		&0x0f,%d0		# clear all but last nybble
	bne.b		iea_op_gp_not_spec	# not a zero
	tst.l		FP_SRC_HI(%a6)		# is lw 2 zero?
	bne.b		iea_op_gp_not_spec	# not a zero
	tst.l		FP_SRC_LO(%a6)		# is lw 3 zero?
	beq.b		iea_op_setsrc		# operand is a ZERO
iea_op_gp_not_spec:
	lea		FP_SRC(%a6),%a0		# pass: ptr to packed op
	bsr.l		decbin			# convert to extended
	fmovm.x		&0x80,FP_SRC(%a6)	# make this the srcop

iea_op_setsrc:
	addi.l		&0xc,EXC_EXTWPTR(%a6)	# update extension word pointer

# FP_SRC now holds the src operand.
	lea		FP_SRC(%a6),%a0		# pass: ptr to src op
	bsr.l		set_tag_x		# tag the operand type
	mov.b		%d0,STAG(%a6)		# could be ANYTHING!!!
	cmpi.b		%d0,&UNNORM		# is operand an UNNORM?
	bne.b		iea_op_getdst		# no
	bsr.l		unnorm_fix		# yes; convert to NORM/DENORM/ZERO
	mov.b		%d0,STAG(%a6)		# set new optype tag
iea_op_getdst:
	clr.b		STORE_FLG(%a6)		# clear "store result" boolean

	btst		&0x5,1+EXC_CMDREG(%a6)	# is operation monadic or dyadic?
	beq.b		iea_op_extract		# monadic
	btst		&0x4,1+EXC_CMDREG(%a6)	# is operation fsincos,ftst,fcmp?
	bne.b		iea_op_spec		# yes

iea_op_loaddst:
	bfextu		EXC_CMDREG(%a6){&6:&3},%d0 # fetch dst regno
	bsr.l		load_fpn2		# load dst operand

	lea		FP_DST(%a6),%a0		# pass: ptr to dst op
	bsr.l		set_tag_x		# tag the operand type
	mov.b		%d0,DTAG(%a6)		# could be ANYTHING!!!
	cmpi.b		%d0,&UNNORM		# is operand an UNNORM?
	bne.b		iea_op_extract		# no
	bsr.l		unnorm_fix		# yes; convert to NORM/DENORM/ZERO
	mov.b		%d0,DTAG(%a6)		# set new optype tag
	bra.b		iea_op_extract

# the operation is fsincos, ftst, or fcmp. only fcmp is dyadic
iea_op_spec:
	btst		&0x3,1+EXC_CMDREG(%a6)	# is operation fsincos?
	beq.b		iea_op_extract		# yes
# now, we're left with ftst and fcmp. so, first let's tag them so that they don't
# store a result. then, only fcmp will branch back and pick up a dst operand.
	st		STORE_FLG(%a6)		# don't store a final result
	btst		&0x1,1+EXC_CMDREG(%a6)	# is operation fcmp?
	beq.b		iea_op_loaddst		# yes	
	
iea_op_extract:
	clr.l		%d0
	mov.b		FPCR_MODE(%a6),%d0	# pass: rnd mode,prec

	mov.b		1+EXC_CMDREG(%a6),%d1
	andi.w		&0x007f,%d1		# extract extension

	fmov.l		&0x0,%fpcr
	fmov.l		&0x0,%fpsr

	lea		FP_SRC(%a6),%a0
	lea		FP_DST(%a6),%a1

	mov.l		(tbl_unsupp.l,%pc,%d1.w*4),%d1 # fetch routine addr
	jsr		(tbl_unsupp.l,%pc,%d1.l*1)

#
# Exceptions in order of precedence:
#	BSUN	: none
#	SNAN	: all operations
#	OPERR	: all reg-reg or mem-reg operations that can normally operr
#	OVFL	: same as OPERR
#	UNFL	: same as OPERR
#	DZ	: same as OPERR
#	INEX2	: same as OPERR
#	INEX1	: all packed immediate operations
#

# we determine the highest priority exception(if any) set by the
# emulation routine that has also been enabled by the user.
	mov.b		FPCR_ENABLE(%a6),%d0	# fetch exceptions enabled
	bne.b		iea_op_ena		# some are enabled

# now, we save the result, unless, of course, the operation was ftst or fcmp.
# these don't save results.
iea_op_save:
	tst.b		STORE_FLG(%a6)		# does this op store a result?
	bne.b		iea_op_exit1		# exit with no frestore

iea_op_store:
	bfextu		EXC_CMDREG(%a6){&6:&3},%d0 # fetch dst regno
	bsr.l		store_fpreg		# store the result

iea_op_exit1:
	mov.l		EXC_PC(%a6),USER_FPIAR(%a6) # set FPIAR to "Current PC"
	mov.l		EXC_EXTWPTR(%a6),EXC_PC(%a6) # set "Next PC" in exc frame

	fmovm.x		EXC_FPREGS(%a6),&0xc0	# restore fp0-fp1
	fmovm.l		USER_FPCR(%a6),%fpcr,%fpsr,%fpiar # restore ctrl regs
	movm.l		EXC_DREGS(%a6),&0x0303	# restore d0-d1/a0-a1

	unlk		%a6			# unravel the frame

	btst		&0x7,(%sp)		# is trace on?
	bne.w		iea_op_trace		# yes

	bra.l		_fpsp_done		# exit to os

iea_op_ena:
	and.b		FPSR_EXCEPT(%a6),%d0	# keep only ones enable and set
	bfffo		%d0{&24:&8},%d0		# find highest priority exception
	bne.b		iea_op_exc		# at least one was set

# no exception occurred. now, did a disabled, exact overflow occur with inexact
# enabled? if so, then we have to stuff an overflow frame into the FPU.
	btst		&ovfl_bit,FPSR_EXCEPT(%a6) # did overflow occur?
	beq.b		iea_op_save

iea_op_ovfl:
	btst		&inex2_bit,FPCR_ENABLE(%a6) # is inexact enabled?
	beq.b		iea_op_store		# no
	bra.b		iea_op_exc_ovfl		# yes
	
# an enabled exception occurred. we have to insert the exception type back into
# the machine.
iea_op_exc:
	subi.l		&24,%d0			# fix offset to be 0-8
	cmpi.b		%d0,&0x6		# is exception INEX?
	bne.b		iea_op_exc_force	# no

# the enabled exception was inexact. so, if it occurs with an overflow
# or underflow that was disabled, then we have to force an overflow or
# underflow frame.
	btst		&ovfl_bit,FPSR_EXCEPT(%a6) # did overflow occur?
	bne.b		iea_op_exc_ovfl		# yes
	btst		&unfl_bit,FPSR_EXCEPT(%a6) # did underflow occur?
	bne.b		iea_op_exc_unfl		# yes

iea_op_exc_force:
	mov.w		(tbl_iea_except.b,%pc,%d0.w*2),2+FP_SRC(%a6)
	bra.b		iea_op_exit2		# exit with frestore

tbl_iea_except:
	short		0xe002, 0xe006, 0xe004, 0xe005
	short		0xe003, 0xe002, 0xe001, 0xe001

iea_op_exc_ovfl:
	mov.w		&0xe005,2+FP_SRC(%a6)
	bra.b		iea_op_exit2

iea_op_exc_unfl:
	mov.w		&0xe003,2+FP_SRC(%a6)

iea_op_exit2:
	mov.l		EXC_PC(%a6),USER_FPIAR(%a6) # set FPIAR to "Current PC"
	mov.l		EXC_EXTWPTR(%a6),EXC_PC(%a6) # set "Next PC" in exc frame

	fmovm.x		EXC_FPREGS(%a6),&0xc0	# restore fp0-fp1
	fmovm.l		USER_FPCR(%a6),%fpcr,%fpsr,%fpiar # restore ctrl regs
	movm.l		EXC_DREGS(%a6),&0x0303	# restore d0-d1/a0-a1

	frestore 	FP_SRC(%a6)		# restore exceptional state

	unlk		%a6			# unravel the frame

	btst		&0x7,(%sp)		# is trace on?
	bne.b		iea_op_trace		# yes

	bra.l		_fpsp_done		# exit to os
	
#
# The opclass two instruction that took an "Unimplemented Effective Address"
# exception was being traced. Make the "current" PC the FPIAR and put it in
# the trace stack frame then jump to _real_trace().
#					
#		 UNIMP EA FRAME		   TRACE FRAME
#		*****************	*****************
#		* 0x0 *  0x0f0	*	*    Current	*
#		*****************	*      PC	*
#		*    Current	*	*****************
#		*      PC	*	* 0x2 *  0x024	*
#		*****************	*****************
#		*      SR	*	*     Next	*
#		*****************	*      PC	*
#					*****************
#					*      SR	*
#					*****************
iea_op_trace:
	mov.l		(%sp),-(%sp)		# shift stack frame "down"
	mov.w		0x8(%sp),0x4(%sp)
	mov.w		&0x2024,0x6(%sp)	# stk fmt = 0x2; voff = 0x024
	fmov.l		%fpiar,0x8(%sp)		# "Current PC" is in FPIAR

	bra.l		_real_trace

#########################################################################
iea_fmovm:
	btst		&14,%d0			# ctrl or data reg
	beq.w		iea_fmovm_ctrl

iea_fmovm_data:

	btst		&0x5,EXC_SR(%a6)	# user or supervisor mode
	bne.b		iea_fmovm_data_s

iea_fmovm_data_u:
	mov.l		%usp,%a0
	mov.l		%a0,EXC_A7(%a6)		# store current a7	
	bsr.l		fmovm_dynamic		# do dynamic fmovm
	mov.l		EXC_A7(%a6),%a0		# load possibly new a7
	mov.l		%a0,%usp		# update usp
	bra.w		iea_fmovm_exit

iea_fmovm_data_s:
	clr.b		SPCOND_FLG(%a6)
	lea		0x2+EXC_VOFF(%a6),%a0
	mov.l		%a0,EXC_A7(%a6)
	bsr.l		fmovm_dynamic		# do dynamic fmovm

	cmpi.b		SPCOND_FLG(%a6),&mda7_flg
	beq.w		iea_fmovm_data_predec
	cmpi.b		SPCOND_FLG(%a6),&mia7_flg
	bne.w		iea_fmovm_exit

# right now, d0 = the size.
# the data has been fetched from the supervisor stack, but we have not
# incremented the stack pointer by the appropriate number of bytes.
# do it here.
iea_fmovm_data_postinc:
	btst		&0x7,EXC_SR(%a6)
	bne.b		iea_fmovm_data_pi_trace

	mov.w		EXC_SR(%a6),(EXC_SR,%a6,%d0)
	mov.l		EXC_EXTWPTR(%a6),(EXC_PC,%a6,%d0)
	mov.w		&0x00f0,(EXC_VOFF,%a6,%d0)

	lea		(EXC_SR,%a6,%d0),%a0
	mov.l		%a0,EXC_SR(%a6)
	
	fmovm.x		EXC_FP0(%a6),&0xc0	# restore fp0-fp1
	fmovm.l		USER_FPCR(%a6),%fpcr,%fpsr,%fpiar # restore ctrl regs
 	movm.l		EXC_DREGS(%a6),&0x0303 	# restore d0-d1/a0-a1

	unlk		%a6
	mov.l		(%sp)+,%sp
	bra.l		_fpsp_done

iea_fmovm_data_pi_trace:
	mov.w		EXC_SR(%a6),(EXC_SR-0x4,%a6,%d0)
	mov.l		EXC_EXTWPTR(%a6),(EXC_PC-0x4,%a6,%d0)
	mov.w		&0x2024,(EXC_VOFF-0x4,%a6,%d0)
	mov.l		EXC_PC(%a6),(EXC_VOFF+0x2-0x4,%a6,%d0)

	lea		(EXC_SR-0x4,%a6,%d0),%a0
	mov.l		%a0,EXC_SR(%a6)
	
	fmovm.x		EXC_FP0(%a6),&0xc0	# restore fp0-fp1
	fmovm.l		USER_FPCR(%a6),%fpcr,%fpsr,%fpiar # restore ctrl regs
 	movm.l		EXC_DREGS(%a6),&0x0303 	# restore d0-d1/a0-a1

	unlk		%a6
	mov.l		(%sp)+,%sp
	bra.l		_real_trace
	
# right now, d1 = size and d0 = the strg.
iea_fmovm_data_predec:
	mov.b		%d1,EXC_VOFF(%a6)	# store strg
	mov.b		%d0,0x1+EXC_VOFF(%a6)	# store size

	fmovm.x		EXC_FP0(%a6),&0xc0	# restore fp0-fp1
	fmovm.l		USER_FPCR(%a6),%fpcr,%fpsr,%fpiar # restore ctrl regs
 	movm.l		EXC_DREGS(%a6),&0x0303 	# restore d0-d1/a0-a1

	mov.l		(%a6),-(%sp)		# make a copy of a6
	mov.l		%d0,-(%sp)		# save d0
	mov.l		%d1,-(%sp)		# save d1
	mov.l		EXC_EXTWPTR(%a6),-(%sp)	# make a copy of Next PC

	clr.l		%d0
	mov.b		0x1+EXC_VOFF(%a6),%d0	# fetch size
	neg.l		%d0			# get negative of size

	btst		&0x7,EXC_SR(%a6)	# is trace enabled?
	beq.b		iea_fmovm_data_p2

	mov.w		EXC_SR(%a6),(EXC_SR-0x4,%a6,%d0)
	mov.l		EXC_PC(%a6),(EXC_VOFF-0x2,%a6,%d0)
	mov.l		(%sp)+,(EXC_PC-0x4,%a6,%d0)
	mov.w		&0x2024,(EXC_VOFF-0x4,%a6,%d0)

	pea		(%a6,%d0)		# create final sp
	bra.b		iea_fmovm_data_p3

iea_fmovm_data_p2:
	mov.w		EXC_SR(%a6),(EXC_SR,%a6,%d0)
	mov.l		(%sp)+,(EXC_PC,%a6,%d0)
	mov.w		&0x00f0,(EXC_VOFF,%a6,%d0)

	pea		(0x4,%a6,%d0)		# create final sp

iea_fmovm_data_p3:
	clr.l		%d1
	mov.b		EXC_VOFF(%a6),%d1	# fetch strg

	tst.b		%d1
	bpl.b		fm_1
	fmovm.x		&0x80,(0x4+0x8,%a6,%d0)
	addi.l		&0xc,%d0
fm_1:
	lsl.b		&0x1,%d1
	bpl.b		fm_2
	fmovm.x		&0x40,(0x4+0x8,%a6,%d0)
	addi.l		&0xc,%d0
fm_2:
	lsl.b		&0x1,%d1
	bpl.b		fm_3
	fmovm.x		&0x20,(0x4+0x8,%a6,%d0)
	addi.l		&0xc,%d0
fm_3:
	lsl.b		&0x1,%d1
	bpl.b		fm_4
	fmovm.x		&0x10,(0x4+0x8,%a6,%d0)
	addi.l		&0xc,%d0
fm_4:
	lsl.b		&0x1,%d1
	bpl.b		fm_5
	fmovm.x		&0x08,(0x4+0x8,%a6,%d0)
	addi.l		&0xc,%d0
fm_5:
	lsl.b		&0x1,%d1
	bpl.b		fm_6
	fmovm.x		&0x04,(0x4+0x8,%a6,%d0)
	addi.l		&0xc,%d0
fm_6:
	lsl.b		&0x1,%d1
	bpl.b		fm_7
	fmovm.x		&0x02,(0x4+0x8,%a6,%d0)
	addi.l		&0xc,%d0
fm_7:
	lsl.b		&0x1,%d1
	bpl.b		fm_end
	fmovm.x		&0x01,(0x4+0x8,%a6,%d0)
fm_end:
	mov.l		0x4(%sp),%d1
	mov.l		0x8(%sp),%d0
	mov.l		0xc(%sp),%a6
	mov.l		(%sp)+,%sp

	btst		&0x7,(%sp)		# is trace enabled?
	beq.l		_fpsp_done
	bra.l		_real_trace

#########################################################################
iea_fmovm_ctrl:

	bsr.l		fmovm_ctrl		# load ctrl regs

iea_fmovm_exit:
	fmovm.x		EXC_FPREGS(%a6),&0xc0	# restore fp0-fp1
	fmovm.l		USER_FPCR(%a6),%fpcr,%fpsr,%fpiar # restore ctrl regs
	movm.l		EXC_DREGS(%a6),&0x0303	# restore d0-d1/a0-a1

	btst		&0x7,EXC_SR(%a6)	# is trace on?
	bne.b		iea_fmovm_trace		# yes

	mov.l		EXC_EXTWPTR(%a6),EXC_PC(%a6) # set Next PC

	unlk		%a6			# unravel the frame

	bra.l		_fpsp_done		# exit to os

#
# The control reg instruction that took an "Unimplemented Effective Address"
# exception was being traced. The "Current PC" for the trace frame is the 
# PC stacked for Unimp EA. The "Next PC" is in EXC_EXTWPTR.
# After fixing the stack frame, jump to _real_trace().
#					
#		 UNIMP EA FRAME		   TRACE FRAME
#		*****************	*****************
#		* 0x0 *  0x0f0	*	*    Current	*
#		*****************	*      PC	*
#		*    Current	*	*****************
#		*      PC	*	* 0x2 *  0x024	*
#		*****************	*****************
#		*      SR	*	*     Next	*
#		*****************	*      PC	*
#					*****************
#					*      SR	*
#					*****************
# this ain't a pretty solution, but it works:
# -restore a6 (not with unlk)
# -shift stack frame down over where old a6 used to be
# -add LOCAL_SIZE to stack pointer
iea_fmovm_trace:
	mov.l		(%a6),%a6		# restore frame pointer
	mov.w		EXC_SR+LOCAL_SIZE(%sp),0x0+LOCAL_SIZE(%sp)
	mov.l		EXC_PC+LOCAL_SIZE(%sp),0x8+LOCAL_SIZE(%sp)
	mov.l		EXC_EXTWPTR+LOCAL_SIZE(%sp),0x2+LOCAL_SIZE(%sp)
	mov.w		&0x2024,0x6+LOCAL_SIZE(%sp) # stk fmt = 0x2; voff = 0x024
	add.l		&LOCAL_SIZE,%sp		# clear stack frame

	bra.l		_real_trace

#########################################################################
# The FPU is disabled and so we should really have taken the "Line
# F Emulator" exception. So, here we create an 8-word stack frame
# from our 4-word stack frame. This means we must calculate the length
# the faulting instruction to get the "next PC". This is trivial for
# immediate operands but requires some extra work for fmovm dynamic
# which can use most addressing modes.
iea_disabled:
	mov.l		(%sp)+,%d0		# restore d0

	link		%a6,&-LOCAL_SIZE	# init stack frame

	movm.l		&0x0303,EXC_DREGS(%a6)	# save d0-d1/a0-a1

# PC of instruction that took the exception is the PC in the frame
	mov.l		EXC_PC(%a6),EXC_EXTWPTR(%a6)
	mov.l		EXC_EXTWPTR(%a6),%a0	# fetch instruction addr
	addq.l		&0x4,EXC_EXTWPTR(%a6)	# incr instruction ptr
	bsr.l		_imem_read_long		# fetch the instruction words
	mov.l		%d0,EXC_OPWORD(%a6)	# store OPWORD and EXTWORD

	tst.w		%d0			# is instr fmovm?
	bmi.b		iea_dis_fmovm		# yes
# instruction is using an extended precision immediate operand. therefore,
# the total instruction length is 16 bytes.
iea_dis_immed:
	mov.l		&0x10,%d0		# 16 bytes of instruction
	bra.b		iea_dis_cont
iea_dis_fmovm:
	btst		&0xe,%d0		# is instr fmovm ctrl
	bne.b		iea_dis_fmovm_data	# no
# the instruction is a fmovm.l with 2 or 3 registers.
	bfextu		%d0{&19:&3},%d1
	mov.l		&0xc,%d0
	cmpi.b		%d1,&0x7		# move all regs?
	bne.b		iea_dis_cont
	addq.l		&0x4,%d0
	bra.b		iea_dis_cont
# the instruction is an fmovm.x dynamic which can use many addressing
# modes and thus can have several different total instruction lengths.
# call fmovm_calc_ea which will go through the ea calc process and,
# as a by-product, will tell us how long the instruction is.
iea_dis_fmovm_data:
	clr.l		%d0
	bsr.l		fmovm_calc_ea
	mov.l		EXC_EXTWPTR(%a6),%d0
	sub.l		EXC_PC(%a6),%d0
iea_dis_cont:
	mov.w		%d0,EXC_VOFF(%a6)	# store stack shift value

	movm.l		EXC_DREGS(%a6),&0x0303	# restore d0-d1/a0-a1

	unlk		%a6

# here, we actually create the 8-word frame from the 4-word frame,
# with the "next PC" as additional info.
# the <ea> field is let as undefined.
	subq.l		&0x8,%sp		# make room for new stack
	mov.l		%d0,-(%sp)		# save d0
	mov.w		0xc(%sp),0x4(%sp)	# move SR
	mov.l		0xe(%sp),0x6(%sp)	# move Current PC
	clr.l		%d0
	mov.w		0x12(%sp),%d0
	mov.l		0x6(%sp),0x10(%sp)	# move Current PC
	add.l		%d0,0x6(%sp)		# make Next PC
	mov.w		&0x402c,0xa(%sp)	# insert offset,frame format
	mov.l		(%sp)+,%d0		# restore d0

	bra.l		_real_fpu_disabled

##########

iea_iacc:
	movc		%pcr,%d0
	btst		&0x1,%d0
	bne.b		iea_iacc_cont
	fmovm.l		USER_FPCR(%a6),%fpcr,%fpsr,%fpiar # restore ctrl regs
	fmovm.x		EXC_FPREGS(%a6),&0xc0	# restore fp0-fp1 on stack
iea_iacc_cont:
	movm.l		EXC_DREGS(%a6),&0x0303	# restore d0-d1/a0-a1

	unlk		%a6

	subq.w		&0x8,%sp		# make stack frame bigger
	mov.l		0x8(%sp),(%sp)		# store SR,hi(PC)
	mov.w		0xc(%sp),0x4(%sp)	# store lo(PC)
	mov.w		&0x4008,0x6(%sp)	# store voff
	mov.l		0x2(%sp),0x8(%sp)	# store ea
	mov.l		&0x09428001,0xc(%sp)	# store fslw

iea_acc_done:
	btst		&0x5,(%sp)		# user or supervisor mode?
	beq.b		iea_acc_done2		# user
	bset		&0x2,0xd(%sp)		# set supervisor TM bit

iea_acc_done2:
	bra.l		_real_access

iea_dacc:
	lea		-LOCAL_SIZE(%a6),%sp

	movc		%pcr,%d1
	btst		&0x1,%d1
	bne.b		iea_dacc_cont
	fmovm.x		EXC_FPREGS(%a6),&0xc0	# restore fp0-fp1 on stack
	fmovm.l		LOCAL_SIZE+USER_FPCR(%sp),%fpcr,%fpsr,%fpiar # restore ctrl regs
iea_dacc_cont:
	mov.l		(%a6),%a6

	mov.l		0x4+LOCAL_SIZE(%sp),-0x8+0x4+LOCAL_SIZE(%sp)
	mov.w		0x8+LOCAL_SIZE(%sp),-0x8+0x8+LOCAL_SIZE(%sp)
	mov.w		&0x4008,-0x8+0xa+LOCAL_SIZE(%sp)
	mov.l		%a0,-0x8+0xc+LOCAL_SIZE(%sp)
	mov.w		%d0,-0x8+0x10+LOCAL_SIZE(%sp)
	mov.w		&0x0001,-0x8+0x12+LOCAL_SIZE(%sp)

	movm.l		LOCAL_SIZE+EXC_DREGS(%sp),&0x0303 # restore d0-d1/a0-a1
	add.w		&LOCAL_SIZE-0x4,%sp

	bra.b		iea_acc_done

#########################################################################
# XDEF ****************************************************************	#
#	_fpsp_operr(): 060FPSP entry point for FP Operr exception.	#
#									#
#	This handler should be the first code executed upon taking the	#
# 	FP Operand Error exception in an operating system.		#
#									#
# XREF ****************************************************************	#
#	_imem_read_long() - read instruction longword			#
#	fix_skewed_ops() - adjust src operand in fsave frame		#
#	_real_operr() - "callout" to operating system operr handler	#
#	_dmem_write_{byte,word,long}() - store data to mem (opclass 3)	#
#	store_dreg_{b,w,l}() - store data to data regfile (opclass 3)	#
#	facc_out_{b,w,l}() - store to memory took access error (opcl 3)	#
#									#
# INPUT ***************************************************************	#
#	- The system stack contains the FP Operr exception frame	#
#	- The fsave frame contains the source operand			#
# 									#
# OUTPUT **************************************************************	#
#	No access error:						#
#	- The system stack is unchanged					#
#	- The fsave frame contains the adjusted src op for opclass 0,2	#
#									#
# ALGORITHM ***********************************************************	#
#	In a system where the FP Operr exception is enabled, the goal	#
# is to get to the handler specified at _real_operr(). But, on the 060,	#
# for opclass zero and two instruction taking this exception, the 	#
# input operand in the fsave frame may be incorrect for some cases	#
# and needs to be corrected. This handler calls fix_skewed_ops() to	#
# do just this and then exits through _real_operr().			#
#	For opclass 3 instructions, the 060 doesn't store the default	#
# operr result out to memory or data register file as it should.	#
# This code must emulate the move out before finally exiting through	#
# _real_inex(). The move out, if to memory, is performed using 		#
# _mem_write() "callout" routines that may return a failing result.	#
# In this special case, the handler must exit through facc_out() 	#
# which creates an access error stack frame from the current operr	#
# stack frame.								#
#									#
#########################################################################

	global		_fpsp_operr
_fpsp_operr:

	link.w		%a6,&-LOCAL_SIZE	# init stack frame

	fsave		FP_SRC(%a6)		# grab the "busy" frame

 	movm.l		&0x0303,EXC_DREGS(%a6)	# save d0-d1/a0-a1
	fmovm.l		%fpcr,%fpsr,%fpiar,USER_FPCR(%a6) # save ctrl regs
 	fmovm.x		&0xc0,EXC_FPREGS(%a6)	# save fp0-fp1 on stack

# the FPIAR holds the "current PC" of the faulting instruction
	mov.l		USER_FPIAR(%a6),EXC_EXTWPTR(%a6)
	
	mov.l		EXC_EXTWPTR(%a6),%a0	# fetch instruction addr
	addq.l		&0x4,EXC_EXTWPTR(%a6)	# incr instruction ptr
	bsr.l		_imem_read_long		# fetch the instruction words
	mov.l		%d0,EXC_OPWORD(%a6)

##############################################################################

	btst		&13,%d0			# is instr an fmove out?
	bne.b		foperr_out		# fmove out


# here, we simply see if the operand in the fsave frame needs to be "unskewed".
# this would be the case for opclass two operations with a source infinity or
# denorm operand in the sgl or dbl format. NANs also become skewed, but can't 
# cause an operr so we don't need to check for them here.
	lea		FP_SRC(%a6),%a0		# pass: ptr to src op
	bsr.l		fix_skewed_ops		# fix src op

foperr_exit:
	fmovm.x		EXC_FPREGS(%a6),&0xc0	# restore fp0-fp1
	fmovm.l		USER_FPCR(%a6),%fpcr,%fpsr,%fpiar # restore ctrl regs
	movm.l		EXC_DREGS(%a6),&0x0303	# restore d0-d1/a0-a1

	frestore	FP_SRC(%a6)

	unlk		%a6
	bra.l		_real_operr

########################################################################

#
# the hardware does not save the default result to memory on enabled
# operand error exceptions. we do this here before passing control to
# the user operand error handler.
#
# byte, word, and long destination format operations can pass
# through here. we simply need to test the sign of the src
# operand and save the appropriate minimum or maximum integer value
# to the effective address as pointed to by the stacked effective address.
#
# although packed opclass three operations can take operand error
# exceptions, they won't pass through here since they are caught
# first by the unsupported data format exception handler. that handler
# sends them directly to _real_operr() if necessary.
#
foperr_out:

	mov.w		FP_SRC_EX(%a6),%d1	# fetch exponent
	andi.w		&0x7fff,%d1
	cmpi.w		%d1,&0x7fff
	bne.b		foperr_out_not_qnan
# the operand is either an infinity or a QNAN.
	tst.l		FP_SRC_LO(%a6)
	bne.b		foperr_out_qnan
	mov.l		FP_SRC_HI(%a6),%d1
	andi.l		&0x7fffffff,%d1
	beq.b		foperr_out_not_qnan
foperr_out_qnan:
	mov.l		FP_SRC_HI(%a6),L_SCR1(%a6)
	bra.b		foperr_out_jmp

foperr_out_not_qnan:
	mov.l		&0x7fffffff,%d1
	tst.b		FP_SRC_EX(%a6)
	bpl.b		foperr_out_not_qnan2
	addq.l		&0x1,%d1
foperr_out_not_qnan2:
	mov.l		%d1,L_SCR1(%a6)

foperr_out_jmp:
	bfextu		%d0{&19:&3},%d0		# extract dst format field
	mov.b		1+EXC_OPWORD(%a6),%d1	# extract <ea> mode,reg
	mov.w		(tbl_operr.b,%pc,%d0.w*2),%a0
	jmp		(tbl_operr.b,%pc,%a0)

tbl_operr:
	short		foperr_out_l - tbl_operr # long word integer
	short		tbl_operr    - tbl_operr # sgl prec shouldn't happen
	short		tbl_operr    - tbl_operr # ext prec shouldn't happen
	short		foperr_exit  - tbl_operr # packed won't enter here
	short		foperr_out_w - tbl_operr # word integer
	short		tbl_operr    - tbl_operr # dbl prec shouldn't happen
	short		foperr_out_b - tbl_operr # byte integer
	short		tbl_operr    - tbl_operr # packed won't enter here
	
foperr_out_b:
	mov.b		L_SCR1(%a6),%d0		# load positive default result
	cmpi.b		%d1,&0x7		# is <ea> mode a data reg?
	ble.b		foperr_out_b_save_dn	# yes
	mov.l		EXC_EA(%a6),%a0		# pass: <ea> of default result
	bsr.l		_dmem_write_byte	# write the default result

	tst.l		%d1			# did dstore fail?
	bne.l		facc_out_b		# yes

	bra.w		foperr_exit
foperr_out_b_save_dn:
	andi.w		&0x0007,%d1
	bsr.l		store_dreg_b		# store result to regfile
	bra.w		foperr_exit

foperr_out_w:
	mov.w		L_SCR1(%a6),%d0		# load positive default result
	cmpi.b		%d1,&0x7		# is <ea> mode a data reg?
	ble.b		foperr_out_w_save_dn	# yes
	mov.l		EXC_EA(%a6),%a0		# pass: <ea> of default result
	bsr.l		_dmem_write_word	# write the default result

	tst.l		%d1			# did dstore fail?
	bne.l		facc_out_w		# yes

	bra.w		foperr_exit
foperr_out_w_save_dn:
	andi.w		&0x0007,%d1
	bsr.l		store_dreg_w		# store result to regfile
	bra.w		foperr_exit

foperr_out_l:
	mov.l		L_SCR1(%a6),%d0		# load positive default result
	cmpi.b		%d1,&0x7		# is <ea> mode a data reg?
	ble.b		foperr_out_l_save_dn	# yes
	mov.l		EXC_EA(%a6),%a0		# pass: <ea> of default result
	bsr.l		_dmem_write_long	# write the default result

	tst.l		%d1			# did dstore fail?
	bne.l		facc_out_l		# yes

	bra.w		foperr_exit
foperr_out_l_save_dn:
	andi.w		&0x0007,%d1
	bsr.l		store_dreg_l		# store result to regfile
	bra.w		foperr_exit

#########################################################################
# XDEF ****************************************************************	#
#	_fpsp_snan(): 060FPSP entry point for FP SNAN exception.	#
#									#
#	This handler should be the first code executed upon taking the	#
# 	FP Signalling NAN exception in an operating system.		#
#									#
# XREF ****************************************************************	#
#	_imem_read_long() - read instruction longword			#
#	fix_skewed_ops() - adjust src operand in fsave frame		#
#	_real_snan() - "callout" to operating system SNAN handler	#
#	_dmem_write_{byte,word,long}() - store data to mem (opclass 3)	#
#	store_dreg_{b,w,l}() - store data to data regfile (opclass 3)	#
#	facc_out_{b,w,l,d,x}() - store to mem took acc error (opcl 3)	#
#	_calc_ea_fout() - fix An if <ea> is -() or ()+; also get <ea>	#
#									#
# INPUT ***************************************************************	#
#	- The system stack contains the FP SNAN exception frame		#
#	- The fsave frame contains the source operand			#
# 									#
# OUTPUT **************************************************************	#
#	No access error:						#
#	- The system stack is unchanged					#
#	- The fsave frame contains the adjusted src op for opclass 0,2	#
#									#
# ALGORITHM ***********************************************************	#
#	In a system where the FP SNAN exception is enabled, the goal	#
# is to get to the handler specified at _real_snan(). But, on the 060,	#
# for opclass zero and two instructions taking this exception, the 	#
# input operand in the fsave frame may be incorrect for some cases	#
# and needs to be corrected. This handler calls fix_skewed_ops() to	#
# do just this and then exits through _real_snan().			#
#	For opclass 3 instructions, the 060 doesn't store the default	#
# SNAN result out to memory or data register file as it should.		#
# This code must emulate the move out before finally exiting through	#
# _real_snan(). The move out, if to memory, is performed using 		#
# _mem_write() "callout" routines that may return a failing result.	#
# In this special case, the handler must exit through facc_out() 	#
# which creates an access error stack frame from the current SNAN	#
# stack frame.								#
#	For the case of an extended precision opclass 3 instruction,	#
# if the effective addressing mode was -() or ()+, then the address	#
# register must get updated by calling _calc_ea_fout(). If the <ea>	#
# was -(a7) from supervisor mode, then the exception frame currently	#
# on the system stack must be carefully moved "down" to make room	#
# for the operand being moved.						#
#									#
#########################################################################

	global		_fpsp_snan
_fpsp_snan:

	link.w		%a6,&-LOCAL_SIZE	# init stack frame

	fsave		FP_SRC(%a6)		# grab the "busy" frame

 	movm.l		&0x0303,EXC_DREGS(%a6)	# save d0-d1/a0-a1
	fmovm.l		%fpcr,%fpsr,%fpiar,USER_FPCR(%a6) # save ctrl regs
 	fmovm.x		&0xc0,EXC_FPREGS(%a6)	# save fp0-fp1 on stack

# the FPIAR holds the "current PC" of the faulting instruction
	mov.l		USER_FPIAR(%a6),EXC_EXTWPTR(%a6)
	
	mov.l		EXC_EXTWPTR(%a6),%a0	# fetch instruction addr
	addq.l		&0x4,EXC_EXTWPTR(%a6)	# incr instruction ptr
	bsr.l		_imem_read_long		# fetch the instruction words
	mov.l		%d0,EXC_OPWORD(%a6)

##############################################################################

	btst		&13,%d0			# is instr an fmove out?
	bne.w		fsnan_out		# fmove out


# here, we simply see if the operand in the fsave frame needs to be "unskewed".
# this would be the case for opclass two operations with a source infinity or
# denorm operand in the sgl or dbl format. NANs also become skewed and must be
# fixed here.
	lea		FP_SRC(%a6),%a0		# pass: ptr to src op
	bsr.l		fix_skewed_ops		# fix src op

fsnan_exit:
	fmovm.x		EXC_FPREGS(%a6),&0xc0	# restore fp0-fp1
	fmovm.l		USER_FPCR(%a6),%fpcr,%fpsr,%fpiar # restore ctrl regs
	movm.l		EXC_DREGS(%a6),&0x0303	# restore d0-d1/a0-a1

	frestore	FP_SRC(%a6)

	unlk		%a6
	bra.l		_real_snan
		
########################################################################

#
# the hardware does not save the default result to memory on enabled
# snan exceptions. we do this here before passing control to
# the user snan handler.
#
# byte, word, long, and packed destination format operations can pass
# through here. since packed format operations already were handled by
# fpsp_unsupp(), then we need to do nothing else for them here. 
# for byte, word, and long, we simply need to test the sign of the src
# operand and save the appropriate minimum or maximum integer value
# to the effective address as pointed to by the stacked effective address.
#
fsnan_out:

	bfextu		%d0{&19:&3},%d0		# extract dst format field
	mov.b		1+EXC_OPWORD(%a6),%d1	# extract <ea> mode,reg
	mov.w		(tbl_snan.b,%pc,%d0.w*2),%a0
	jmp		(tbl_snan.b,%pc,%a0)

tbl_snan:
	short		fsnan_out_l - tbl_snan # long word integer
	short		fsnan_out_s - tbl_snan # sgl prec shouldn't happen
	short		fsnan_out_x - tbl_snan # ext prec shouldn't happen
	short		tbl_snan    - tbl_snan # packed needs no help
	short		fsnan_out_w - tbl_snan # word integer
	short		fsnan_out_d - tbl_snan # dbl prec shouldn't happen
	short		fsnan_out_b - tbl_snan # byte integer
	short		tbl_snan    - tbl_snan # packed needs no help
	
fsnan_out_b:
	mov.b		FP_SRC_HI(%a6),%d0	# load upper byte of SNAN
	bset		&6,%d0			# set SNAN bit
	cmpi.b		%d1,&0x7		# is <ea> mode a data reg?
	ble.b		fsnan_out_b_dn		# yes
	mov.l		EXC_EA(%a6),%a0		# pass: <ea> of default result
	bsr.l		_dmem_write_byte	# write the default result

	tst.l		%d1			# did dstore fail?
	bne.l		facc_out_b		# yes

	bra.w		fsnan_exit
fsnan_out_b_dn:
	andi.w		&0x0007,%d1
	bsr.l		store_dreg_b		# store result to regfile
	bra.w		fsnan_exit

fsnan_out_w:
	mov.w		FP_SRC_HI(%a6),%d0	# load upper word of SNAN
	bset		&14,%d0			# set SNAN bit
	cmpi.b		%d1,&0x7		# is <ea> mode a data reg?
	ble.b		fsnan_out_w_dn		# yes
	mov.l		EXC_EA(%a6),%a0		# pass: <ea> of default result
	bsr.l		_dmem_write_word	# write the default result

	tst.l		%d1			# did dstore fail?
	bne.l		facc_out_w		# yes

	bra.w		fsnan_exit
fsnan_out_w_dn:
	andi.w		&0x0007,%d1
	bsr.l		store_dreg_w		# store result to regfile
	bra.w		fsnan_exit

fsnan_out_l:
	mov.l		FP_SRC_HI(%a6),%d0	# load upper longword of SNAN
	bset		&30,%d0			# set SNAN bit
	cmpi.b		%d1,&0x7		# is <ea> mode a data reg?
	ble.b		fsnan_out_l_dn		# yes
	mov.l		EXC_EA(%a6),%a0		# pass: <ea> of default result
	bsr.l		_dmem_write_long	# write the default result

	tst.l		%d1			# did dstore fail?
	bne.l		facc_out_l		# yes

	bra.w		fsnan_exit
fsnan_out_l_dn:
	andi.w		&0x0007,%d1
	bsr.l		store_dreg_l		# store result to regfile
	bra.w		fsnan_exit

fsnan_out_s:
	cmpi.b		%d1,&0x7		# is <ea> mode a data reg?
	ble.b		fsnan_out_d_dn		# yes
	mov.l		FP_SRC_EX(%a6),%d0	# fetch SNAN sign
	andi.l		&0x80000000,%d0		# keep sign
	ori.l		&0x7fc00000,%d0		# insert new exponent,SNAN bit
	mov.l		FP_SRC_HI(%a6),%d1	# load mantissa
	lsr.l		&0x8,%d1		# shift mantissa for sgl
	or.l		%d1,%d0			# create sgl SNAN
	mov.l		EXC_EA(%a6),%a0		# pass: <ea> of default result
	bsr.l		_dmem_write_long	# write the default result

	tst.l		%d1			# did dstore fail?
	bne.l		facc_out_l		# yes

	bra.w		fsnan_exit
fsnan_out_d_dn:
	mov.l		FP_SRC_EX(%a6),%d0	# fetch SNAN sign
	andi.l		&0x80000000,%d0		# keep sign
	ori.l		&0x7fc00000,%d0		# insert new exponent,SNAN bit
	mov.l		%d1,-(%sp)
	mov.l		FP_SRC_HI(%a6),%d1	# load mantissa
	lsr.l		&0x8,%d1		# shift mantissa for sgl
	or.l		%d1,%d0			# create sgl SNAN
	mov.l		(%sp)+,%d1
	andi.w		&0x0007,%d1
	bsr.l		store_dreg_l		# store result to regfile
	bra.w		fsnan_exit

fsnan_out_d:
	mov.l		FP_SRC_EX(%a6),%d0	# fetch SNAN sign
	andi.l		&0x80000000,%d0		# keep sign
	ori.l		&0x7ff80000,%d0		# insert new exponent,SNAN bit
	mov.l		FP_SRC_HI(%a6),%d1	# load hi mantissa
	mov.l		%d0,FP_SCR0_EX(%a6)	# store to temp space
	mov.l		&11,%d0			# load shift amt
	lsr.l		%d0,%d1
	or.l		%d1,FP_SCR0_EX(%a6)	# create dbl hi
	mov.l		FP_SRC_HI(%a6),%d1	# load hi mantissa
	andi.l		&0x000007ff,%d1
	ror.l		%d0,%d1
	mov.l		%d1,FP_SCR0_HI(%a6)	# store to temp space
	mov.l		FP_SRC_LO(%a6),%d1	# load lo mantissa
	lsr.l		%d0,%d1
	or.l		%d1,FP_SCR0_HI(%a6)	# create dbl lo
	lea		FP_SCR0(%a6),%a0	# pass: ptr to operand
	mov.l		EXC_EA(%a6),%a1		# pass: dst addr
	movq.l		&0x8,%d0		# pass: size of 8 bytes
	bsr.l		_dmem_write		# write the default result

	tst.l		%d1			# did dstore fail?
	bne.l		facc_out_d		# yes

	bra.w		fsnan_exit

# for extended precision, if the addressing mode is pre-decrement or
# post-increment, then the address register did not get updated.
# in addition, for pre-decrement, the stacked <ea> is incorrect.
fsnan_out_x:
	clr.b		SPCOND_FLG(%a6)		# clear special case flag

	mov.w		FP_SRC_EX(%a6),FP_SCR0_EX(%a6)
	clr.w		2+FP_SCR0(%a6)
	mov.l		FP_SRC_HI(%a6),%d0
	bset		&30,%d0
	mov.l		%d0,FP_SCR0_HI(%a6)
	mov.l		FP_SRC_LO(%a6),FP_SCR0_LO(%a6)

	btst		&0x5,EXC_SR(%a6)	# supervisor mode exception?
	bne.b		fsnan_out_x_s		# yes

	mov.l		%usp,%a0		# fetch user stack pointer
	mov.l		%a0,EXC_A7(%a6)		# save on stack for calc_ea()
	mov.l		(%a6),EXC_A6(%a6)
	
	bsr.l		_calc_ea_fout		# find the correct ea,update An
	mov.l		%a0,%a1
	mov.l		%a0,EXC_EA(%a6)		# stack correct <ea>

	mov.l		EXC_A7(%a6),%a0
	mov.l		%a0,%usp		# restore user stack pointer
	mov.l		EXC_A6(%a6),(%a6)

fsnan_out_x_save:
	lea		FP_SCR0(%a6),%a0	# pass: ptr to operand
	movq.l		&0xc,%d0		# pass: size of extended
	bsr.l		_dmem_write		# write the default result

	tst.l		%d1			# did dstore fail?
	bne.l		facc_out_x		# yes

	bra.w		fsnan_exit

fsnan_out_x_s:
	mov.l		(%a6),EXC_A6(%a6)

	bsr.l		_calc_ea_fout		# find the correct ea,update An
	mov.l		%a0,%a1
	mov.l		%a0,EXC_EA(%a6)		# stack correct <ea>

	mov.l		EXC_A6(%a6),(%a6)

	cmpi.b		SPCOND_FLG(%a6),&mda7_flg # is <ea> mode -(a7)?
	bne.b		fsnan_out_x_save	# no

# the operation was "fmove.x SNAN,-(a7)" from supervisor mode.
	fmovm.x		EXC_FPREGS(%a6),&0xc0	# restore fp0-fp1
	fmovm.l		USER_FPCR(%a6),%fpcr,%fpsr,%fpiar # restore ctrl regs
	movm.l		EXC_DREGS(%a6),&0x0303	# restore d0-d1/a0-a1

	frestore	FP_SRC(%a6)

	mov.l		EXC_A6(%a6),%a6		# restore frame pointer

	mov.l		LOCAL_SIZE+EXC_SR(%sp),LOCAL_SIZE+EXC_SR-0xc(%sp)
	mov.l		LOCAL_SIZE+EXC_PC+0x2(%sp),LOCAL_SIZE+EXC_PC+0x2-0xc(%sp)
	mov.l		LOCAL_SIZE+EXC_EA(%sp),LOCAL_SIZE+EXC_EA-0xc(%sp)

	mov.l		LOCAL_SIZE+FP_SCR0_EX(%sp),LOCAL_SIZE+EXC_SR(%sp)
	mov.l		LOCAL_SIZE+FP_SCR0_HI(%sp),LOCAL_SIZE+EXC_PC+0x2(%sp)
	mov.l		LOCAL_SIZE+FP_SCR0_LO(%sp),LOCAL_SIZE+EXC_EA(%sp)

	add.l		&LOCAL_SIZE-0x8,%sp
	
	bra.l		_real_snan

#########################################################################
# XDEF ****************************************************************	#
#	_fpsp_inex(): 060FPSP entry point for FP Inexact exception.	#
#									#
#	This handler should be the first code executed upon taking the	#
# 	FP Inexact exception in an operating system.			#
#									#
# XREF ****************************************************************	#
#	_imem_read_long() - read instruction longword			#
#	fix_skewed_ops() - adjust src operand in fsave frame		#
#	set_tag_x() - determine optype of src/dst operands		#
#	store_fpreg() - store opclass 0 or 2 result to FP regfile	#
#	unnorm_fix() - change UNNORM operands to NORM or ZERO		#
#	load_fpn2() - load dst operand from FP regfile			#
#	smovcr() - emulate an "fmovcr" instruction			#
#	fout() - emulate an opclass 3 instruction			#
#	tbl_unsupp - add of table of emulation routines for opclass 0,2	#
#	_real_inex() - "callout" to operating system inexact handler	#
#									#
# INPUT ***************************************************************	#
#	- The system stack contains the FP Inexact exception frame	#
#	- The fsave frame contains the source operand			#
# 									#
# OUTPUT **************************************************************	#
#	- The system stack is unchanged					#
#	- The fsave frame contains the adjusted src op for opclass 0,2	#
#									#
# ALGORITHM ***********************************************************	#
#	In a system where the FP Inexact exception is enabled, the goal	#
# is to get to the handler specified at _real_inex(). But, on the 060,	#
# for opclass zero and two instruction taking this exception, the 	#
# hardware doesn't store the correct result to the destination FP	#
# register as did the '040 and '881/2. This handler must emulate the 	#
# instruction in order to get this value and then store it to the 	#
# correct register before calling _real_inex().				#
#	For opclass 3 instructions, the 060 doesn't store the default	#
# inexact result out to memory or data register file as it should.	#
# This code must emulate the move out by calling fout() before finally	#
# exiting through _real_inex().						#
#									#
#########################################################################

	global		_fpsp_inex
_fpsp_inex:

	link.w		%a6,&-LOCAL_SIZE	# init stack frame

	fsave		FP_SRC(%a6)		# grab the "busy" frame

 	movm.l		&0x0303,EXC_DREGS(%a6)	# save d0-d1/a0-a1
	fmovm.l		%fpcr,%fpsr,%fpiar,USER_FPCR(%a6) # save ctrl regs
 	fmovm.x		&0xc0,EXC_FPREGS(%a6)	# save fp0-fp1 on stack

# the FPIAR holds the "current PC" of the faulting instruction
	mov.l		USER_FPIAR(%a6),EXC_EXTWPTR(%a6)
	
	mov.l		EXC_EXTWPTR(%a6),%a0	# fetch instruction addr
	addq.l		&0x4,EXC_EXTWPTR(%a6)	# incr instruction ptr
	bsr.l		_imem_read_long		# fetch the instruction words
	mov.l		%d0,EXC_OPWORD(%a6)

##############################################################################

	btst		&13,%d0			# is instr an fmove out?
	bne.w		finex_out		# fmove out


# the hardware, for "fabs" and "fneg" w/ a long source format, puts the 
# longword integer directly into the upper longword of the mantissa along
# w/ an exponent value of 0x401e. we convert this to extended precision here.
	bfextu		%d0{&19:&3},%d0		# fetch instr size
	bne.b		finex_cont		# instr size is not long
	cmpi.w		FP_SRC_EX(%a6),&0x401e	# is exponent 0x401e?
	bne.b		finex_cont		# no
	fmov.l		&0x0,%fpcr
	fmov.l		FP_SRC_HI(%a6),%fp0	# load integer src
	fmov.x		%fp0,FP_SRC(%a6)	# store integer as extended precision
	mov.w		&0xe001,0x2+FP_SRC(%a6)

finex_cont:
	lea		FP_SRC(%a6),%a0		# pass: ptr to src op
	bsr.l		fix_skewed_ops		# fix src op

# Here, we zero the ccode and exception byte field since we're going to
# emulate the whole instruction. Notice, though, that we don't kill the
# INEX1 bit. This is because a packed op has long since been converted
# to extended before arriving here. Therefore, we need to retain the
# INEX1 bit from when the operand was first converted.
	andi.l		&0x00ff01ff,USER_FPSR(%a6) # zero all but accured field

	fmov.l		&0x0,%fpcr		# zero current control regs
	fmov.l		&0x0,%fpsr

	bfextu		EXC_EXTWORD(%a6){&0:&6},%d1 # extract upper 6 of cmdreg
	cmpi.b		%d1,&0x17		# is op an fmovecr?
	beq.w		finex_fmovcr		# yes

	lea		FP_SRC(%a6),%a0		# pass: ptr to src op
	bsr.l		set_tag_x		# tag the operand type
	mov.b		%d0,STAG(%a6)		# maybe NORM,DENORM

# bits four and five of the fp extension word separate the monadic and dyadic
# operations that can pass through fpsp_inex(). remember that fcmp and ftst
# will never take this exception, but fsincos will.
	btst		&0x5,1+EXC_CMDREG(%a6)	# is operation monadic or dyadic?
	beq.b		finex_extract		# monadic

	btst		&0x4,1+EXC_CMDREG(%a6)	# is operation an fsincos?
	bne.b		finex_extract		# yes

	bfextu		EXC_CMDREG(%a6){&6:&3},%d0 # dyadic; load dst reg
	bsr.l		load_fpn2		# load dst into FP_DST

	lea		FP_DST(%a6),%a0		# pass: ptr to dst op
	bsr.l		set_tag_x		# tag the operand type
	cmpi.b		%d0,&UNNORM		# is operand an UNNORM?
	bne.b		finex_op2_done		# no
	bsr.l		unnorm_fix		# yes; convert to NORM,DENORM,or ZERO
finex_op2_done:
	mov.b		%d0,DTAG(%a6)		# save dst optype tag

finex_extract:
	clr.l		%d0
	mov.b		FPCR_MODE(%a6),%d0	# pass rnd prec/mode

	mov.b		1+EXC_CMDREG(%a6),%d1
	andi.w		&0x007f,%d1		# extract extension

	lea		FP_SRC(%a6),%a0
	lea		FP_DST(%a6),%a1

	mov.l		(tbl_unsupp.l,%pc,%d1.w*4),%d1 # fetch routine addr
	jsr		(tbl_unsupp.l,%pc,%d1.l*1)

# the operation has been emulated. the result is in fp0.
finex_save:
	bfextu		EXC_CMDREG(%a6){&6:&3},%d0
	bsr.l		store_fpreg

finex_exit:
	fmovm.x		EXC_FPREGS(%a6),&0xc0	# restore fp0-fp1
	fmovm.l		USER_FPCR(%a6),%fpcr,%fpsr,%fpiar # restore ctrl regs
	movm.l		EXC_DREGS(%a6),&0x0303	# restore d0-d1/a0-a1

	frestore	FP_SRC(%a6)

	unlk		%a6
	bra.l		_real_inex

finex_fmovcr:
	clr.l		%d0
	mov.b		FPCR_MODE(%a6),%d0	# pass rnd prec,mode
	mov.b		1+EXC_CMDREG(%a6),%d1
	andi.l		&0x0000007f,%d1		# pass rom offset
	bsr.l		smovcr
	bra.b		finex_save

########################################################################

#
# the hardware does not save the default result to memory on enabled
# inexact exceptions. we do this here before passing control to
# the user inexact handler.
#
# byte, word, and long destination format operations can pass
# through here. so can double and single precision.
# although packed opclass three operations can take inexact
# exceptions, they won't pass through here since they are caught
# first by the unsupported data format exception handler. that handler
# sends them directly to _real_inex() if necessary.
#
finex_out:

	mov.b		&NORM,STAG(%a6)		# src is a NORM

	clr.l		%d0
	mov.b		FPCR_MODE(%a6),%d0	# pass rnd prec,mode

	andi.l		&0xffff00ff,USER_FPSR(%a6) # zero exception field

	lea		FP_SRC(%a6),%a0		# pass ptr to src operand

	bsr.l		fout			# store the default result

	bra.b		finex_exit

#########################################################################
# XDEF ****************************************************************	#
#	_fpsp_dz(): 060FPSP entry point for FP DZ exception.		#
#									#
#	This handler should be the first code executed upon taking	#
#	the FP DZ exception in an operating system.			#
#									#
# XREF ****************************************************************	#
#	_imem_read_long() - read instruction longword from memory	#
#	fix_skewed_ops() - adjust fsave operand				#
#	_real_dz() - "callout" exit point from FP DZ handler		#
#									#
# INPUT ***************************************************************	#
#	- The system stack contains the FP DZ exception stack.		#
#	- The fsave frame contains the source operand.			#
# 									#
# OUTPUT **************************************************************	#
#	- The system stack contains the FP DZ exception stack.		#
#	- The fsave frame contains the adjusted source operand.		#
#									#
# ALGORITHM ***********************************************************	#
#	In a system where the DZ exception is enabled, the goal is to	#
# get to the handler specified at _real_dz(). But, on the 060, when the	#
# exception is taken, the input operand in the fsave state frame may	#
# be incorrect for some cases and need to be adjusted. So, this package	#
# adjusts the operand using fix_skewed_ops() and then branches to	#
# _real_dz(). 								#
#									#
#########################################################################

	global		_fpsp_dz
_fpsp_dz:

	link.w		%a6,&-LOCAL_SIZE	# init stack frame

	fsave		FP_SRC(%a6)		# grab the "busy" frame

 	movm.l		&0x0303,EXC_DREGS(%a6)	# save d0-d1/a0-a1
	fmovm.l		%fpcr,%fpsr,%fpiar,USER_FPCR(%a6) # save ctrl regs
 	fmovm.x		&0xc0,EXC_FPREGS(%a6)	# save fp0-fp1 on stack

# the FPIAR holds the "current PC" of the faulting instruction
	mov.l		USER_FPIAR(%a6),EXC_EXTWPTR(%a6)
	
	mov.l		EXC_EXTWPTR(%a6),%a0	# fetch instruction addr
	addq.l		&0x4,EXC_EXTWPTR(%a6)	# incr instruction ptr
	bsr.l		_imem_read_long		# fetch the instruction words
	mov.l		%d0,EXC_OPWORD(%a6)

##############################################################################


# here, we simply see if the operand in the fsave frame needs to be "unskewed".
# this would be the case for opclass two operations with a source zero
# in the sgl or dbl format.
	lea		FP_SRC(%a6),%a0		# pass: ptr to src op
	bsr.l		fix_skewed_ops		# fix src op

fdz_exit:
	fmovm.x		EXC_FPREGS(%a6),&0xc0	# restore fp0-fp1
	fmovm.l		USER_FPCR(%a6),%fpcr,%fpsr,%fpiar # restore ctrl regs
	movm.l		EXC_DREGS(%a6),&0x0303	# restore d0-d1/a0-a1

	frestore	FP_SRC(%a6)

	unlk		%a6
	bra.l		_real_dz

#########################################################################
# XDEF ****************************************************************	#
#	_fpsp_fline(): 060FPSP entry point for "Line F emulator"	#
#		       exception when the "reduced" version of the 	#
#		       FPSP is implemented that does not emulate	#
#		       FP unimplemented instructions.			#
#									#
#	This handler should be the first code executed upon taking a	#
#	"Line F Emulator" exception in an operating system integrating	#
#	the reduced version of 060FPSP.					#
#									#
# XREF ****************************************************************	#
#	_real_fpu_disabled() - Handle "FPU disabled" exceptions		#
#	_real_fline() - Handle all other cases (treated equally)	#
#									#
# INPUT ***************************************************************	#
#	- The system stack contains a "Line F Emulator" exception	#
#	  stack frame.							#
# 									#
# OUTPUT **************************************************************	#
#	- The system stack is unchanged.				#
#									#
# ALGORITHM ***********************************************************	#
# 	When a "Line F Emulator" exception occurs in a system where	#
# "FPU Unimplemented" instructions will not be emulated, the exception	#
# can occur because then FPU is disabled or the instruction is to be	#
# classifed as "Line F". This module determines which case exists and	#
# calls the appropriate "callout".					#
#									#
#########################################################################

	global		_fpsp_fline
_fpsp_fline:

# check to see if the FPU is disabled. if so, jump to the OS entry
# point for that condition.
	cmpi.w		0x6(%sp),&0x402c
	beq.l		_real_fpu_disabled

	bra.l		_real_fline

#########################################################################
# XDEF ****************************************************************	#
#	_dcalc_ea(): calc correct <ea> from <ea> stacked on exception	#
#									#
# XREF ****************************************************************	#
#	inc_areg() - increment an address register			#
#	dec_areg() - decrement an address register			#
#									#
# INPUT ***************************************************************	#
#	d0 = number of bytes to adjust <ea> by				#
# 									#
# OUTPUT **************************************************************	#
#	None								#
#									#
# ALGORITHM ***********************************************************	#
# "Dummy" CALCulate Effective Address:					#
# 	The stacked <ea> for FP unimplemented instructions and opclass	#
#	two packed instructions is correct with the exception of...	#
#									#
#	1) -(An)   : The register is not updated regardless of size.	#
#		     Also, for extended precision and packed, the 	#
#		     stacked <ea> value is 8 bytes too big		#
#	2) (An)+   : The register is not updated.			#
#	3) #<data> : The upper longword of the immediate operand is 	#
#		     stacked b,w,l and s sizes are completely stacked. 	#
#		     d,x, and p are not.				#
#									#
#########################################################################

	global		_dcalc_ea
_dcalc_ea:
	mov.l		%d0, %a0		# move # bytes to %a0

	mov.b		1+EXC_OPWORD(%a6), %d0	# fetch opcode word
	mov.l		%d0, %d1		# make a copy

	andi.w		&0x38, %d0		# extract mode field
	andi.l		&0x7, %d1		# extract reg  field

	cmpi.b		%d0,&0x18		# is mode (An)+ ?
	beq.b		dcea_pi			# yes

	cmpi.b		%d0,&0x20		# is mode -(An) ?
	beq.b		dcea_pd			# yes

	or.w		%d1,%d0			# concat mode,reg
	cmpi.b		%d0,&0x3c		# is mode #<data>?

	beq.b		dcea_imm		# yes

	mov.l		EXC_EA(%a6),%a0		# return <ea>
	rts

# need to set immediate data flag here since we'll need to do
# an imem_read to fetch this later.
dcea_imm:
	mov.b		&immed_flg,SPCOND_FLG(%a6)
	lea		([USER_FPIAR,%a6],0x4),%a0 # no; return <ea>
	rts

# here, the <ea> is stacked correctly. however, we must update the 
# address register...	
dcea_pi:
	mov.l		%a0,%d0			# pass amt to inc by
	bsr.l		inc_areg		# inc addr register

	mov.l		EXC_EA(%a6),%a0		# stacked <ea> is correct
	rts

# the <ea> is stacked correctly for all but extended and packed which 
# the <ea>s are 8 bytes too large.
# it would make no sense to have a pre-decrement to a7 in supervisor
# mode so we don't even worry about this tricky case here : )
dcea_pd:
	mov.l		%a0,%d0			# pass amt to dec by
	bsr.l		dec_areg		# dec addr register

	mov.l		EXC_EA(%a6),%a0		# stacked <ea> is correct

	cmpi.b		%d0,&0xc		# is opsize ext or packed?
	beq.b		dcea_pd2		# yes
	rts
dcea_pd2:
	sub.l		&0x8,%a0		# correct <ea>
	mov.l		%a0,EXC_EA(%a6)		# put correct <ea> on stack
	rts

#########################################################################
# XDEF ****************************************************************	#
# 	_calc_ea_fout(): calculate correct stacked <ea> for extended	#
#			 and packed data opclass 3 operations.		#
#									#
# XREF ****************************************************************	#
#	None								#
#									#
# INPUT ***************************************************************	#
#	None								#
# 									#
# OUTPUT **************************************************************	#
#	a0 = return correct effective address				#
#									#
# ALGORITHM ***********************************************************	#
#	For opclass 3 extended and packed data operations, the <ea>	#
# stacked for the exception is incorrect for -(an) and (an)+ addressing	#
# modes. Also, while we're at it, the index register itself must get 	#
# updated.								#
# 	So, for -(an), we must subtract 8 off of the stacked <ea> value	#
# and return that value as the correct <ea> and store that value in An.	#
# For (an)+, the stacked <ea> is correct but we must adjust An by +12.	#
#									#
#########################################################################

# This calc_ea is currently used to retrieve the correct <ea> 
# for fmove outs of type extended and packed.
	global		_calc_ea_fout
_calc_ea_fout:
	mov.b		1+EXC_OPWORD(%a6),%d0	# fetch opcode word
	mov.l		%d0,%d1			# make a copy

	andi.w		&0x38,%d0		# extract mode field
	andi.l		&0x7,%d1		# extract reg  field

	cmpi.b		%d0,&0x18		# is mode (An)+ ?
	beq.b		ceaf_pi			# yes

	cmpi.b		%d0,&0x20		# is mode -(An) ?
	beq.w		ceaf_pd			# yes

	mov.l		EXC_EA(%a6),%a0		# stacked <ea> is correct
	rts

# (An)+ : extended and packed fmove out
#	: stacked <ea> is correct
#	: "An" not updated 
ceaf_pi:
	mov.w		(tbl_ceaf_pi.b,%pc,%d1.w*2),%d1
	mov.l		EXC_EA(%a6),%a0
	jmp		(tbl_ceaf_pi.b,%pc,%d1.w*1)

	swbeg		&0x8
tbl_ceaf_pi:
	short		ceaf_pi0 - tbl_ceaf_pi
	short		ceaf_pi1 - tbl_ceaf_pi
	short		ceaf_pi2 - tbl_ceaf_pi
	short		ceaf_pi3 - tbl_ceaf_pi
	short		ceaf_pi4 - tbl_ceaf_pi
	short		ceaf_pi5 - tbl_ceaf_pi
	short		ceaf_pi6 - tbl_ceaf_pi
	short		ceaf_pi7 - tbl_ceaf_pi

ceaf_pi0:
	addi.l		&0xc,EXC_DREGS+0x8(%a6)
	rts
ceaf_pi1:
	addi.l		&0xc,EXC_DREGS+0xc(%a6)
	rts
ceaf_pi2:
	add.l		&0xc,%a2
	rts
ceaf_pi3:
	add.l		&0xc,%a3
	rts
ceaf_pi4:
	add.l		&0xc,%a4
	rts
ceaf_pi5:
	add.l		&0xc,%a5
	rts
ceaf_pi6:
	addi.l		&0xc,EXC_A6(%a6)
	rts
ceaf_pi7:
	mov.b		&mia7_flg,SPCOND_FLG(%a6)
	addi.l		&0xc,EXC_A7(%a6)
	rts

# -(An) : extended and packed fmove out
#	: stacked <ea> = actual <ea> + 8
#	: "An" not updated
ceaf_pd:
	mov.w		(tbl_ceaf_pd.b,%pc,%d1.w*2),%d1
	mov.l		EXC_EA(%a6),%a0
	sub.l		&0x8,%a0
	sub.l		&0x8,EXC_EA(%a6)
	jmp		(tbl_ceaf_pd.b,%pc,%d1.w*1)

	swbeg		&0x8
tbl_ceaf_pd:
	short		ceaf_pd0 - tbl_ceaf_pd
	short		ceaf_pd1 - tbl_ceaf_pd
	short		ceaf_pd2 - tbl_ceaf_pd
	short		ceaf_pd3 - tbl_ceaf_pd
	short		ceaf_pd4 - tbl_ceaf_pd
	short		ceaf_pd5 - tbl_ceaf_pd
	short		ceaf_pd6 - tbl_ceaf_pd
	short		ceaf_pd7 - tbl_ceaf_pd

ceaf_pd0:
	mov.l		%a0,EXC_DREGS+0x8(%a6)
	rts
ceaf_pd1:
	mov.l		%a0,EXC_DREGS+0xc(%a6)
	rts
ceaf_pd2:
	mov.l		%a0,%a2
	rts
ceaf_pd3:
	mov.l		%a0,%a3
	rts
ceaf_pd4:
	mov.l		%a0,%a4
	rts
ceaf_pd5:
	mov.l		%a0,%a5
	rts
ceaf_pd6:
	mov.l		%a0,EXC_A6(%a6)
	rts
ceaf_pd7:
	mov.l		%a0,EXC_A7(%a6)
	mov.b		&mda7_flg,SPCOND_FLG(%a6)
	rts

#
# This table holds the offsets of the emulation routines for each individual
# math operation relative to the address of this table. Included are
# routines like fadd/fmul/fabs. The transcendentals ARE NOT. This is because
# this table is for the version if the 060FPSP without transcendentals.
# The location within the table is determined by the extension bits of the
# operation longword.
#

	swbeg		&109
tbl_unsupp:
	long		fin	 	- tbl_unsupp	# 00: fmove
	long		fint	 	- tbl_unsupp	# 01: fint
	long		tbl_unsupp 	- tbl_unsupp	# 02: fsinh
	long		fintrz	 	- tbl_unsupp	# 03: fintrz
	long		fsqrt	 	- tbl_unsupp	# 04: fsqrt
	long		tbl_unsupp	- tbl_unsupp
	long		tbl_unsupp	- tbl_unsupp	# 06: flognp1
	long		tbl_unsupp	- tbl_unsupp
	long		tbl_unsupp	- tbl_unsupp	# 08: fetoxm1
	long		tbl_unsupp	- tbl_unsupp	# 09: ftanh
	long		tbl_unsupp	- tbl_unsupp	# 0a: fatan
	long		tbl_unsupp	- tbl_unsupp
	long		tbl_unsupp	- tbl_unsupp	# 0c: fasin
	long		tbl_unsupp	- tbl_unsupp	# 0d: fatanh
	long		tbl_unsupp	- tbl_unsupp	# 0e: fsin
	long		tbl_unsupp	- tbl_unsupp	# 0f: ftan
	long		tbl_unsupp	- tbl_unsupp	# 10: fetox
	long		tbl_unsupp	- tbl_unsupp	# 11: ftwotox
	long		tbl_unsupp	- tbl_unsupp	# 12: ftentox
	long		tbl_unsupp	- tbl_unsupp
	long		tbl_unsupp	- tbl_unsupp	# 14: flogn
	long		tbl_unsupp	- tbl_unsupp	# 15: flog10
	long		tbl_unsupp	- tbl_unsupp	# 16: flog2
	long		tbl_unsupp	- tbl_unsupp
	long		fabs		- tbl_unsupp 	# 18: fabs
	long		tbl_unsupp	- tbl_unsupp	# 19: fcosh
	long		fneg		- tbl_unsupp 	# 1a: fneg
	long		tbl_unsupp	- tbl_unsupp
	long		tbl_unsupp	- tbl_unsupp	# 1c: facos
	long		tbl_unsupp	- tbl_unsupp	# 1d: fcos
	long		tbl_unsupp	- tbl_unsupp	# 1e: fgetexp
	long		tbl_unsupp	- tbl_unsupp	# 1f: fgetman
	long		fdiv		- tbl_unsupp 	# 20: fdiv
	long		tbl_unsupp	- tbl_unsupp	# 21: fmod
	long		fadd		- tbl_unsupp 	# 22: fadd
	long		fmul		- tbl_unsupp 	# 23: fmul
	long		fsgldiv		- tbl_unsupp 	# 24: fsgldiv
	long		tbl_unsupp	- tbl_unsupp	# 25: frem
	long		tbl_unsupp	- tbl_unsupp	# 26: fscale
	long		fsglmul		- tbl_unsupp 	# 27: fsglmul
	long		fsub		- tbl_unsupp 	# 28: fsub
	long		tbl_unsupp	- tbl_unsupp
	long		tbl_unsupp	- tbl_unsupp
	long		tbl_unsupp	- tbl_unsupp
	long		tbl_unsupp	- tbl_unsupp
	long		tbl_unsupp	- tbl_unsupp
	long		tbl_unsupp	- tbl_unsupp
	long		tbl_unsupp	- tbl_unsupp
	long		tbl_unsupp	- tbl_unsupp	# 30: fsincos
	long		tbl_unsupp	- tbl_unsupp	# 31: fsincos
	long		tbl_unsupp	- tbl_unsupp	# 32: fsincos
	long		tbl_unsupp	- tbl_unsupp	# 33: fsincos
	long		tbl_unsupp	- tbl_unsupp	# 34: fsincos
	long		tbl_unsupp	- tbl_unsupp	# 35: fsincos
	long		tbl_unsupp	- tbl_unsupp	# 36: fsincos
	long		tbl_unsupp	- tbl_unsupp	# 37: fsincos
	long		fcmp		- tbl_unsupp 	# 38: fcmp
	long		tbl_unsupp	- tbl_unsupp
	long		ftst		- tbl_unsupp 	# 3a: ftst
	long		tbl_unsupp	- tbl_unsupp
	long		tbl_unsupp	- tbl_unsupp
	long		tbl_unsupp	- tbl_unsupp
	long		tbl_unsupp	- tbl_unsupp
	long		tbl_unsupp	- tbl_unsupp
	long		fsin		- tbl_unsupp 	# 40: fsmove
	long		fssqrt		- tbl_unsupp 	# 41: fssqrt
	long		tbl_unsupp	- tbl_unsupp
	long		tbl_unsupp	- tbl_unsupp
	long		fdin		- tbl_unsupp	# 44: fdmove
	long		fdsqrt		- tbl_unsupp 	# 45: fdsqrt
	long		tbl_unsupp	- tbl_unsupp
	long		tbl_unsupp	- tbl_unsupp
	long		tbl_unsupp	- tbl_unsupp
	long		tbl_unsupp	- tbl_unsupp
	long		tbl_unsupp	- tbl_unsupp
	long		tbl_unsupp	- tbl_unsupp
	long		tbl_unsupp	- tbl_unsupp
	long		tbl_unsupp	- tbl_unsupp
	long		tbl_unsupp	- tbl_unsupp
	long		tbl_unsupp	- tbl_unsupp
	long		tbl_unsupp	- tbl_unsupp
	long		tbl_unsupp	- tbl_unsupp
	long		tbl_unsupp	- tbl_unsupp
	long		tbl_unsupp	- tbl_unsupp
	long		tbl_unsupp	- tbl_unsupp
	long		tbl_unsupp	- tbl_unsupp
	long		tbl_unsupp	- tbl_unsupp
	long		tbl_unsupp	- tbl_unsupp
	long		fsabs		- tbl_unsupp 	# 58: fsabs
	long		tbl_unsupp	- tbl_unsupp
	long		fsneg		- tbl_unsupp 	# 5a: fsneg
	long		tbl_unsupp	- tbl_unsupp
	long		fdabs		- tbl_unsupp	# 5c: fdabs
	long		tbl_unsupp	- tbl_unsupp
	long		fdneg		- tbl_unsupp 	# 5e: fdneg
	long		tbl_unsupp	- tbl_unsupp
	long		fsdiv		- tbl_unsupp	# 60: fsdiv
	long		tbl_unsupp	- tbl_unsupp
	long		fsadd		- tbl_unsupp	# 62: fsadd
	long		fsmul		- tbl_unsupp	# 63: fsmul
	long		fddiv		- tbl_unsupp 	# 64: fddiv
	long		tbl_unsupp	- tbl_unsupp
	long		fdadd		- tbl_unsupp	# 66: fdadd
	long		fdmul		- tbl_unsupp 	# 67: fdmul
	long		fssub		- tbl_unsupp	# 68: fssub
	long		tbl_unsupp	- tbl_unsupp
	long		tbl_unsupp	- tbl_unsupp
	long		tbl_unsupp	- tbl_unsupp
	long		fdsub		- tbl_unsupp 	# 6c: fdsub

#################################################
# Add this here so non-fp modules can compile.
# (smovcr is called from fpsp_inex.)
	global		smovcr
smovcr:
	bra.b		smovcr

#########################################################################
# XDEF ****************************************************************	#
#	fmovm_dynamic(): emulate "fmovm" dynamic instruction		#
#									#
# XREF ****************************************************************	#
#	fetch_dreg() - fetch data register				#
#	{i,d,}mem_read() - fetch data from memory			#
#	_mem_write() - write data to memory				#
#	iea_iacc() - instruction memory access error occurred		#
#	iea_dacc() - data memory access error occurred			#
#	restore() - restore An index regs if access error occurred	#
#									#
# INPUT ***************************************************************	#
#	None								#
# 									#
# OUTPUT **************************************************************	#
#	If instr is "fmovm Dn,-(A7)" from supervisor mode,		#
#		d0 = size of dump					#
#		d1 = Dn							#
#	Else if instruction access error,				#
#		d0 = FSLW						#
#	Else if data access error,					#
#		d0 = FSLW						#
#		a0 = address of fault					#
#	Else								#
#		none.							#
#									#
# ALGORITHM ***********************************************************	#
#	The effective address must be calculated since this is entered	#
# from an "Unimplemented Effective Address" exception handler. So, we	#
# have our own fcalc_ea() routine here. If an access error is flagged	#
# by a _{i,d,}mem_read() call, we must exit through the special		#
# handler.								#
#	The data register is determined and its value loaded to get the	#
# string of FP registers affected. This value is used as an index into	#
# a lookup table such that we can determine the number of bytes		#
# involved. 								#
#	If the instruction is "fmovm.x <ea>,Dn", a _mem_read() is used	#
# to read in all FP values. Again, _mem_read() may fail and require a	#
# special exit. 							#
#	If the instruction is "fmovm.x DN,<ea>", a _mem_write() is used	#
# to write all FP values. _mem_write() may also fail.			#
# 	If the instruction is "fmovm.x DN,-(a7)" from supervisor mode,	#
# then we return the size of the dump and the string to the caller	#
# so that the move can occur outside of this routine. This special	#
# case is required so that moves to the system stack are handled	#
# correctly.								#
#									#
# DYNAMIC:								#
# 	fmovm.x	dn, <ea>						#
# 	fmovm.x	<ea>, dn						#
#									#
#	      <WORD 1>		      <WORD2>				#
#	1111 0010 00 |<ea>|	11@& 1000 0$$$ 0000			#
#					  				#
#	& = (0): predecrement addressing mode				#
#	    (1): postincrement or control addressing mode		#
#	@ = (0): move listed regs from memory to the FPU		#
#	    (1): move listed regs from the FPU to memory		#
#	$$$    : index of data register holding reg select mask		#
#									#
# NOTES:								#
#	If the data register holds a zero, then the			#
#	instruction is a nop.						#
#									#
#########################################################################

	global		fmovm_dynamic
fmovm_dynamic:

# extract the data register in which the bit string resides...
	mov.b		1+EXC_EXTWORD(%a6),%d1	# fetch extword
	andi.w		&0x70,%d1		# extract reg bits
	lsr.b		&0x4,%d1		# shift into lo bits

# fetch the bit string into d0...
	bsr.l		fetch_dreg		# fetch reg string

	andi.l		&0x000000ff,%d0		# keep only lo byte

	mov.l		%d0,-(%sp)		# save strg
	mov.b		(tbl_fmovm_size.w,%pc,%d0),%d0
	mov.l		%d0,-(%sp)		# save size
	bsr.l		fmovm_calc_ea		# calculate <ea>
	mov.l		(%sp)+,%d0		# restore size
	mov.l		(%sp)+,%d1		# restore strg

# if the bit string is a zero, then the operation is a no-op
# but, make sure that we've calculated ea and advanced the opword pointer
	beq.w		fmovm_data_done

# separate move ins from move outs...
	btst		&0x5,EXC_EXTWORD(%a6)	# is it a move in or out?
	beq.w		fmovm_data_in		# it's a move out

#############
# MOVE OUT: #
#############
fmovm_data_out:
	btst		&0x4,EXC_EXTWORD(%a6)	# control or predecrement?
	bne.w		fmovm_out_ctrl		# control

############################
fmovm_out_predec:
# for predecrement mode, the bit string is the opposite of both control
# operations and postincrement mode. (bit7 = FP7 ... bit0 = FP0)
# here, we convert it to be just like the others...
	mov.b		(tbl_fmovm_convert.w,%pc,%d1.w*1),%d1

	btst		&0x5,EXC_SR(%a6)	# user or supervisor mode?
	beq.b		fmovm_out_ctrl		# user

fmovm_out_predec_s:
	cmpi.b		SPCOND_FLG(%a6),&mda7_flg # is <ea> mode -(a7)?
	bne.b		fmovm_out_ctrl

# the operation was unfortunately an: fmovm.x dn,-(sp)
# called from supervisor mode.
# we're also passing "size" and "strg" back to the calling routine
	rts

############################
fmovm_out_ctrl:
	mov.l		%a0,%a1			# move <ea> to a1

	sub.l		%d0,%sp			# subtract size of dump
	lea		(%sp),%a0

	tst.b		%d1			# should FP0 be moved?
	bpl.b		fmovm_out_ctrl_fp1	# no

	mov.l		0x0+EXC_FP0(%a6),(%a0)+	# yes
	mov.l		0x4+EXC_FP0(%a6),(%a0)+
	mov.l		0x8+EXC_FP0(%a6),(%a0)+

fmovm_out_ctrl_fp1:
	lsl.b		&0x1,%d1		# should FP1 be moved?
	bpl.b		fmovm_out_ctrl_fp2	# no

	mov.l		0x0+EXC_FP1(%a6),(%a0)+	# yes
	mov.l		0x4+EXC_FP1(%a6),(%a0)+
	mov.l		0x8+EXC_FP1(%a6),(%a0)+

fmovm_out_ctrl_fp2:
	lsl.b		&0x1,%d1		# should FP2 be moved?
	bpl.b		fmovm_out_ctrl_fp3	# no

	fmovm.x		&0x20,(%a0)		# yes
	add.l		&0xc,%a0

fmovm_out_ctrl_fp3:
	lsl.b		&0x1,%d1		# should FP3 be moved?
	bpl.b		fmovm_out_ctrl_fp4	# no

	fmovm.x		&0x10,(%a0)		# yes
	add.l		&0xc,%a0

fmovm_out_ctrl_fp4:
	lsl.b		&0x1,%d1		# should FP4 be moved?
	bpl.b		fmovm_out_ctrl_fp5	# no

	fmovm.x		&0x08,(%a0)		# yes
	add.l		&0xc,%a0

fmovm_out_ctrl_fp5:
	lsl.b		&0x1,%d1		# should FP5 be moved?
	bpl.b		fmovm_out_ctrl_fp6	# no

	fmovm.x		&0x04,(%a0)		# yes
	add.l		&0xc,%a0

fmovm_out_ctrl_fp6:
	lsl.b		&0x1,%d1		# should FP6 be moved?
	bpl.b		fmovm_out_ctrl_fp7	# no

	fmovm.x		&0x02,(%a0)		# yes
	add.l		&0xc,%a0

fmovm_out_ctrl_fp7:
	lsl.b		&0x1,%d1		# should FP7 be moved?
	bpl.b		fmovm_out_ctrl_done	# no

	fmovm.x		&0x01,(%a0)		# yes
	add.l		&0xc,%a0

fmovm_out_ctrl_done:
	mov.l		%a1,L_SCR1(%a6)

	lea		(%sp),%a0		# pass: supervisor src
	mov.l		%d0,-(%sp)		# save size
	bsr.l		_dmem_write		# copy data to user mem

	mov.l		(%sp)+,%d0
	add.l		%d0,%sp			# clear fpreg data from stack

	tst.l		%d1			# did dstore err?
	bne.w		fmovm_out_err		# yes

	rts

############
# MOVE IN: #
############
fmovm_data_in:
	mov.l		%a0,L_SCR1(%a6)

	sub.l		%d0,%sp			# make room for fpregs
	lea		(%sp),%a1

	mov.l		%d1,-(%sp)		# save bit string for later
	mov.l		%d0,-(%sp)		# save # of bytes

	bsr.l		_dmem_read		# copy data from user mem

	mov.l		(%sp)+,%d0		# retrieve # of bytes

	tst.l		%d1			# did dfetch fail?
	bne.w		fmovm_in_err		# yes

	mov.l		(%sp)+,%d1		# load bit string

	lea		(%sp),%a0		# addr of stack

	tst.b		%d1			# should FP0 be moved?
	bpl.b		fmovm_data_in_fp1	# no

	mov.l		(%a0)+,0x0+EXC_FP0(%a6)	# yes
	mov.l		(%a0)+,0x4+EXC_FP0(%a6)
	mov.l		(%a0)+,0x8+EXC_FP0(%a6)

fmovm_data_in_fp1:
	lsl.b		&0x1,%d1		# should FP1 be moved?
	bpl.b		fmovm_data_in_fp2	# no

	mov.l		(%a0)+,0x0+EXC_FP1(%a6)	# yes
	mov.l		(%a0)+,0x4+EXC_FP1(%a6)
	mov.l		(%a0)+,0x8+EXC_FP1(%a6)

fmovm_data_in_fp2:
	lsl.b		&0x1,%d1		# should FP2 be moved?
	bpl.b		fmovm_data_in_fp3	# no

	fmovm.x		(%a0)+,&0x20		# yes

fmovm_data_in_fp3:
	lsl.b		&0x1,%d1		# should FP3 be moved?
	bpl.b		fmovm_data_in_fp4	# no

	fmovm.x		(%a0)+,&0x10		# yes

fmovm_data_in_fp4:
	lsl.b		&0x1,%d1		# should FP4 be moved?
	bpl.b		fmovm_data_in_fp5	# no

	fmovm.x		(%a0)+,&0x08		# yes

fmovm_data_in_fp5:
	lsl.b		&0x1,%d1		# should FP5 be moved?
	bpl.b		fmovm_data_in_fp6	# no

	fmovm.x		(%a0)+,&0x04		# yes

fmovm_data_in_fp6:
	lsl.b		&0x1,%d1		# should FP6 be moved?
	bpl.b		fmovm_data_in_fp7	# no

	fmovm.x		(%a0)+,&0x02		# yes

fmovm_data_in_fp7:
	lsl.b		&0x1,%d1		# should FP7 be moved?
	bpl.b		fmovm_data_in_done	# no

	fmovm.x		(%a0)+,&0x01		# yes

fmovm_data_in_done:
	add.l		%d0,%sp			# remove fpregs from stack
	rts

#####################################

fmovm_data_done:
	rts

##############################################################################

#
# table indexed by the operation's bit string that gives the number
# of bytes that will be moved.
#
# number of bytes = (# of 1's in bit string) * 12(bytes/fpreg)
#
tbl_fmovm_size:
	byte	0x00,0x0c,0x0c,0x18,0x0c,0x18,0x18,0x24
	byte	0x0c,0x18,0x18,0x24,0x18,0x24,0x24,0x30
	byte	0x0c,0x18,0x18,0x24,0x18,0x24,0x24,0x30
	byte	0x18,0x24,0x24,0x30,0x24,0x30,0x30,0x3c
	byte	0x0c,0x18,0x18,0x24,0x18,0x24,0x24,0x30
	byte	0x18,0x24,0x24,0x30,0x24,0x30,0x30,0x3c
	byte	0x18,0x24,0x24,0x30,0x24,0x30,0x30,0x3c
	byte	0x24,0x30,0x30,0x3c,0x30,0x3c,0x3c,0x48
	byte	0x0c,0x18,0x18,0x24,0x18,0x24,0x24,0x30
	byte	0x18,0x24,0x24,0x30,0x24,0x30,0x30,0x3c
	byte	0x18,0x24,0x24,0x30,0x24,0x30,0x30,0x3c
	byte	0x24,0x30,0x30,0x3c,0x30,0x3c,0x3c,0x48
	byte	0x18,0x24,0x24,0x30,0x24,0x30,0x30,0x3c
	byte	0x24,0x30,0x30,0x3c,0x30,0x3c,0x3c,0x48
	byte	0x24,0x30,0x30,0x3c,0x30,0x3c,0x3c,0x48
	byte	0x30,0x3c,0x3c,0x48,0x3c,0x48,0x48,0x54
	byte	0x0c,0x18,0x18,0x24,0x18,0x24,0x24,0x30
	byte	0x18,0x24,0x24,0x30,0x24,0x30,0x30,0x3c
	byte	0x18,0x24,0x24,0x30,0x24,0x30,0x30,0x3c
	byte	0x24,0x30,0x30,0x3c,0x30,0x3c,0x3c,0x48
	byte	0x18,0x24,0x24,0x30,0x24,0x30,0x30,0x3c
	byte	0x24,0x30,0x30,0x3c,0x30,0x3c,0x3c,0x48
	byte	0x24,0x30,0x30,0x3c,0x30,0x3c,0x3c,0x48
	byte	0x30,0x3c,0x3c,0x48,0x3c,0x48,0x48,0x54
	byte	0x18,0x24,0x24,0x30,0x24,0x30,0x30,0x3c
	byte	0x24,0x30,0x30,0x3c,0x30,0x3c,0x3c,0x48
	byte	0x24,0x30,0x30,0x3c,0x30,0x3c,0x3c,0x48
	byte	0x30,0x3c,0x3c,0x48,0x3c,0x48,0x48,0x54
	byte	0x24,0x30,0x30,0x3c,0x30,0x3c,0x3c,0x48
	byte	0x30,0x3c,0x3c,0x48,0x3c,0x48,0x48,0x54
	byte	0x30,0x3c,0x3c,0x48,0x3c,0x48,0x48,0x54
	byte	0x3c,0x48,0x48,0x54,0x48,0x54,0x54,0x60	

#
# table to convert a pre-decrement bit string into a post-increment
# or control bit string.
# ex: 	0x00	==>	0x00
#	0x01	==>	0x80
#	0x02	==>	0x40
#		.
#		.
#	0xfd	==>	0xbf
#	0xfe	==>	0x7f
#	0xff	==>	0xff
#
tbl_fmovm_convert:
	byte	0x00,0x80,0x40,0xc0,0x20,0xa0,0x60,0xe0
	byte	0x10,0x90,0x50,0xd0,0x30,0xb0,0x70,0xf0
	byte	0x08,0x88,0x48,0xc8,0x28,0xa8,0x68,0xe8
	byte	0x18,0x98,0x58,0xd8,0x38,0xb8,0x78,0xf8
	byte	0x04,0x84,0x44,0xc4,0x24,0xa4,0x64,0xe4
	byte	0x14,0x94,0x54,0xd4,0x34,0xb4,0x74,0xf4
	byte	0x0c,0x8c,0x4c,0xcc,0x2c,0xac,0x6c,0xec
	byte	0x1c,0x9c,0x5c,0xdc,0x3c,0xbc,0x7c,0xfc
	byte	0x02,0x82,0x42,0xc2,0x22,0xa2,0x62,0xe2
	byte	0x12,0x92,0x52,0xd2,0x32,0xb2,0x72,0xf2
	byte	0x0a,0x8a,0x4a,0xca,0x2a,0xaa,0x6a,0xea
	byte	0x1a,0x9a,0x5a,0xda,0x3a,0xba,0x7a,0xfa
	byte	0x06,0x86,0x46,0xc6,0x26,0xa6,0x66,0xe6
	byte	0x16,0x96,0x56,0xd6,0x36,0xb6,0x76,0xf6
	byte	0x0e,0x8e,0x4e,0xce,0x2e,0xae,0x6e,0xee
	byte	0x1e,0x9e,0x5e,0xde,0x3e,0xbe,0x7e,0xfe
	byte	0x01,0x81,0x41,0xc1,0x21,0xa1,0x61,0xe1
	byte	0x11,0x91,0x51,0xd1,0x31,0xb1,0x71,0xf1
	byte	0x09,0x89,0x49,0xc9,0x29,0xa9,0x69,0xe9
	byte	0x19,0x99,0x59,0xd9,0x39,0xb9,0x79,0xf9
	byte	0x05,0x85,0x45,0xc5,0x25,0xa5,0x65,0xe5
	byte	0x15,0x95,0x55,0xd5,0x35,0xb5,0x75,0xf5
	byte	0x0d,0x8d,0x4d,0xcd,0x2d,0xad,0x6d,0xed
	byte	0x1d,0x9d,0x5d,0xdd,0x3d,0xbd,0x7d,0xfd
	byte	0x03,0x83,0x43,0xc3,0x23,0xa3,0x63,0xe3
	byte	0x13,0x93,0x53,0xd3,0x33,0xb3,0x73,0xf3
	byte	0x0b,0x8b,0x4b,0xcb,0x2b,0xab,0x6b,0xeb
	byte	0x1b,0x9b,0x5b,0xdb,0x3b,0xbb,0x7b,0xfb
	byte	0x07,0x87,0x47,0xc7,0x27,0xa7,0x67,0xe7
	byte	0x17,0x97,0x57,0xd7,0x37,0xb7,0x77,0xf7
	byte	0x0f,0x8f,0x4f,0xcf,0x2f,0xaf,0x6f,0xef
	byte	0x1f,0x9f,0x5f,0xdf,0x3f,0xbf,0x7f,0xff

	global		fmovm_calc_ea
###############################################
# _fmovm_calc_ea: calculate effective address #
###############################################
fmovm_calc_ea:
	mov.l		%d0,%a0			# move # bytes to a0

# currently, MODE and REG are taken from the EXC_OPWORD. this could be
# easily changed if they were inputs passed in registers.
	mov.w		EXC_OPWORD(%a6),%d0	# fetch opcode word
	mov.w		%d0,%d1			# make a copy

	andi.w		&0x3f,%d0		# extract mode field
	andi.l		&0x7,%d1		# extract reg  field

# jump to the corresponding function for each {MODE,REG} pair.
	mov.w		(tbl_fea_mode.b,%pc,%d0.w*2),%d0 # fetch jmp distance
	jmp		(tbl_fea_mode.b,%pc,%d0.w*1) # jmp to correct ea mode

	swbeg		&64
tbl_fea_mode:
	short		tbl_fea_mode	-	tbl_fea_mode
	short		tbl_fea_mode	-	tbl_fea_mode
	short		tbl_fea_mode	-	tbl_fea_mode
	short		tbl_fea_mode	-	tbl_fea_mode
	short		tbl_fea_mode	-	tbl_fea_mode
	short		tbl_fea_mode	-	tbl_fea_mode
	short		tbl_fea_mode	-	tbl_fea_mode
	short		tbl_fea_mode	-	tbl_fea_mode

	short		tbl_fea_mode	-	tbl_fea_mode
	short		tbl_fea_mode	-	tbl_fea_mode
	short		tbl_fea_mode	-	tbl_fea_mode
	short		tbl_fea_mode	-	tbl_fea_mode
	short		tbl_fea_mode	-	tbl_fea_mode
	short		tbl_fea_mode	-	tbl_fea_mode
	short		tbl_fea_mode	-	tbl_fea_mode
	short		tbl_fea_mode	-	tbl_fea_mode

	short		faddr_ind_a0	- 	tbl_fea_mode
	short		faddr_ind_a1	- 	tbl_fea_mode
	short		faddr_ind_a2	- 	tbl_fea_mode
	short		faddr_ind_a3 	- 	tbl_fea_mode
	short		faddr_ind_a4 	- 	tbl_fea_mode
	short		faddr_ind_a5 	- 	tbl_fea_mode
	short		faddr_ind_a6 	- 	tbl_fea_mode
	short		faddr_ind_a7 	- 	tbl_fea_mode

	short		faddr_ind_p_a0	- 	tbl_fea_mode
	short		faddr_ind_p_a1 	- 	tbl_fea_mode
	short		faddr_ind_p_a2 	- 	tbl_fea_mode
	short		faddr_ind_p_a3 	- 	tbl_fea_mode
	short		faddr_ind_p_a4 	- 	tbl_fea_mode
	short		faddr_ind_p_a5 	- 	tbl_fea_mode
	short		faddr_ind_p_a6 	- 	tbl_fea_mode
	short		faddr_ind_p_a7 	- 	tbl_fea_mode

	short		faddr_ind_m_a0 	- 	tbl_fea_mode
	short		faddr_ind_m_a1 	- 	tbl_fea_mode
	short		faddr_ind_m_a2 	- 	tbl_fea_mode
	short		faddr_ind_m_a3 	- 	tbl_fea_mode
	short		faddr_ind_m_a4 	- 	tbl_fea_mode
	short		faddr_ind_m_a5 	- 	tbl_fea_mode
	short		faddr_ind_m_a6 	- 	tbl_fea_mode
	short		faddr_ind_m_a7 	- 	tbl_fea_mode

	short		faddr_ind_disp_a0	- 	tbl_fea_mode
	short		faddr_ind_disp_a1 	- 	tbl_fea_mode
	short		faddr_ind_disp_a2 	- 	tbl_fea_mode
	short		faddr_ind_disp_a3 	- 	tbl_fea_mode
	short		faddr_ind_disp_a4 	- 	tbl_fea_mode
	short		faddr_ind_disp_a5 	- 	tbl_fea_mode
	short		faddr_ind_disp_a6 	- 	tbl_fea_mode
	short		faddr_ind_disp_a7	-	tbl_fea_mode

	short		faddr_ind_ext 	- 	tbl_fea_mode
	short		faddr_ind_ext 	- 	tbl_fea_mode
	short		faddr_ind_ext 	- 	tbl_fea_mode
	short		faddr_ind_ext 	- 	tbl_fea_mode
	short		faddr_ind_ext 	- 	tbl_fea_mode
	short		faddr_ind_ext 	- 	tbl_fea_mode
	short		faddr_ind_ext 	- 	tbl_fea_mode
	short		faddr_ind_ext 	- 	tbl_fea_mode

	short		fabs_short	- 	tbl_fea_mode
	short		fabs_long	- 	tbl_fea_mode
	short		fpc_ind		- 	tbl_fea_mode
	short		fpc_ind_ext	- 	tbl_fea_mode
	short		tbl_fea_mode	- 	tbl_fea_mode
	short		tbl_fea_mode	- 	tbl_fea_mode
	short		tbl_fea_mode	- 	tbl_fea_mode
	short		tbl_fea_mode	- 	tbl_fea_mode

###################################
# Address register indirect: (An) #
###################################
faddr_ind_a0:
	mov.l		EXC_DREGS+0x8(%a6),%a0	# Get current a0
	rts

faddr_ind_a1:
	mov.l		EXC_DREGS+0xc(%a6),%a0	# Get current a1
	rts

faddr_ind_a2:
	mov.l		%a2,%a0			# Get current a2
	rts

faddr_ind_a3:
	mov.l		%a3,%a0			# Get current a3
	rts

faddr_ind_a4:
	mov.l		%a4,%a0			# Get current a4
	rts

faddr_ind_a5:
	mov.l		%a5,%a0			# Get current a5
	rts

faddr_ind_a6:
	mov.l		(%a6),%a0		# Get current a6
	rts

faddr_ind_a7:
	mov.l		EXC_A7(%a6),%a0		# Get current a7
	rts

#####################################################
# Address register indirect w/ postincrement: (An)+ #
#####################################################
faddr_ind_p_a0:
	mov.l		EXC_DREGS+0x8(%a6),%d0	# Get current a0
	mov.l		%d0,%d1
	add.l		%a0,%d1			# Increment
	mov.l		%d1,EXC_DREGS+0x8(%a6)	# Save incr value
	mov.l		%d0,%a0
	rts

faddr_ind_p_a1:
	mov.l		EXC_DREGS+0xc(%a6),%d0	# Get current a1
	mov.l		%d0,%d1
	add.l		%a0,%d1			# Increment
	mov.l		%d1,EXC_DREGS+0xc(%a6)	# Save incr value
	mov.l		%d0,%a0
	rts

faddr_ind_p_a2:
	mov.l		%a2,%d0			# Get current a2
	mov.l		%d0,%d1
	add.l		%a0,%d1			# Increment
	mov.l		%d1,%a2			# Save incr value
	mov.l		%d0,%a0
	rts

faddr_ind_p_a3:
	mov.l		%a3,%d0			# Get current a3
	mov.l		%d0,%d1
	add.l		%a0,%d1			# Increment
	mov.l		%d1,%a3			# Save incr value
	mov.l		%d0,%a0
	rts

faddr_ind_p_a4:
	mov.l		%a4,%d0			# Get current a4
	mov.l		%d0,%d1
	add.l		%a0,%d1			# Increment
	mov.l		%d1,%a4			# Save incr value
	mov.l		%d0,%a0
	rts

faddr_ind_p_a5:
	mov.l		%a5,%d0			# Get current a5
	mov.l		%d0,%d1
	add.l		%a0,%d1			# Increment
	mov.l		%d1,%a5			# Save incr value
	mov.l		%d0,%a0
	rts

faddr_ind_p_a6:
	mov.l		(%a6),%d0		# Get current a6
	mov.l		%d0,%d1
	add.l		%a0,%d1			# Increment
	mov.l		%d1,(%a6)		# Save incr value
	mov.l		%d0,%a0
	rts

faddr_ind_p_a7:
	mov.b		&mia7_flg,SPCOND_FLG(%a6) # set "special case" flag

	mov.l		EXC_A7(%a6),%d0		# Get current a7
	mov.l		%d0,%d1
	add.l		%a0,%d1			# Increment
	mov.l		%d1,EXC_A7(%a6)		# Save incr value
	mov.l		%d0,%a0
	rts

####################################################
# Address register indirect w/ predecrement: -(An) #
####################################################
faddr_ind_m_a0:
	mov.l		EXC_DREGS+0x8(%a6),%d0	# Get current a0
	sub.l		%a0,%d0			# Decrement
	mov.l		%d0,EXC_DREGS+0x8(%a6)	# Save decr value
	mov.l		%d0,%a0
	rts

faddr_ind_m_a1:
	mov.l		EXC_DREGS+0xc(%a6),%d0	# Get current a1
	sub.l		%a0,%d0			# Decrement
	mov.l		%d0,EXC_DREGS+0xc(%a6)	# Save decr value
	mov.l		%d0,%a0
	rts

faddr_ind_m_a2:
	mov.l		%a2,%d0			# Get current a2
	sub.l		%a0,%d0			# Decrement
	mov.l		%d0,%a2			# Save decr value
	mov.l		%d0,%a0
	rts

faddr_ind_m_a3:
	mov.l		%a3,%d0			# Get current a3
	sub.l		%a0,%d0			# Decrement
	mov.l		%d0,%a3			# Save decr value
	mov.l		%d0,%a0
	rts

faddr_ind_m_a4:
	mov.l		%a4,%d0			# Get current a4
	sub.l		%a0,%d0			# Decrement
	mov.l		%d0,%a4			# Save decr value
	mov.l		%d0,%a0
	rts

faddr_ind_m_a5:
	mov.l		%a5,%d0			# Get current a5
	sub.l		%a0,%d0			# Decrement
	mov.l		%d0,%a5			# Save decr value
	mov.l		%d0,%a0
	rts

faddr_ind_m_a6:
	mov.l		(%a6),%d0		# Get current a6
	sub.l		%a0,%d0			# Decrement
	mov.l		%d0,(%a6)		# Save decr value
	mov.l		%d0,%a0
	rts

faddr_ind_m_a7:
	mov.b		&mda7_flg,SPCOND_FLG(%a6) # set "special case" flag

	mov.l		EXC_A7(%a6),%d0		# Get current a7
	sub.l		%a0,%d0			# Decrement
	mov.l		%d0,EXC_A7(%a6)		# Save decr value
	mov.l		%d0,%a0
	rts

########################################################
# Address register indirect w/ displacement: (d16, An) #
########################################################
faddr_ind_disp_a0:
	mov.l		EXC_EXTWPTR(%a6),%a0	# fetch instruction addr
	addq.l		&0x2,EXC_EXTWPTR(%a6)	# incr instruction ptr
	bsr.l		_imem_read_word

	tst.l		%d1			# did ifetch fail?
	bne.l		iea_iacc		# yes

	mov.w		%d0,%a0			# sign extend displacement

	add.l		EXC_DREGS+0x8(%a6),%a0	# a0 + d16
	rts

faddr_ind_disp_a1:
	mov.l		EXC_EXTWPTR(%a6),%a0	# fetch instruction addr
	addq.l		&0x2,EXC_EXTWPTR(%a6)	# incr instruction ptr
	bsr.l		_imem_read_word

	tst.l		%d1			# did ifetch fail?
	bne.l		iea_iacc		# yes

	mov.w		%d0,%a0			# sign extend displacement

	add.l		EXC_DREGS+0xc(%a6),%a0	# a1 + d16
	rts

faddr_ind_disp_a2:
	mov.l		EXC_EXTWPTR(%a6),%a0	# fetch instruction addr
	addq.l		&0x2,EXC_EXTWPTR(%a6)	# incr instruction ptr
	bsr.l		_imem_read_word

	tst.l		%d1			# did ifetch fail?
	bne.l		iea_iacc		# yes

	mov.w		%d0,%a0			# sign extend displacement

	add.l		%a2,%a0			# a2 + d16
	rts

faddr_ind_disp_a3:
	mov.l		EXC_EXTWPTR(%a6),%a0	# fetch instruction addr
	addq.l		&0x2,EXC_EXTWPTR(%a6)	# incr instruction ptr
	bsr.l		_imem_read_word

	tst.l		%d1			# did ifetch fail?
	bne.l		iea_iacc		# yes

	mov.w		%d0,%a0			# sign extend displacement

	add.l		%a3,%a0			# a3 + d16
	rts

faddr_ind_disp_a4:
	mov.l		EXC_EXTWPTR(%a6),%a0	# fetch instruction addr
	addq.l		&0x2,EXC_EXTWPTR(%a6)	# incr instruction ptr
	bsr.l		_imem_read_word

	tst.l		%d1			# did ifetch fail?
	bne.l		iea_iacc		# yes

	mov.w		%d0,%a0			# sign extend displacement

	add.l		%a4,%a0			# a4 + d16
	rts

faddr_ind_disp_a5:
	mov.l		EXC_EXTWPTR(%a6),%a0	# fetch instruction addr
	addq.l		&0x2,EXC_EXTWPTR(%a6)	# incr instruction ptr
	bsr.l		_imem_read_word

	tst.l		%d1			# did ifetch fail?
	bne.l		iea_iacc		# yes

	mov.w		%d0,%a0			# sign extend displacement

	add.l		%a5,%a0			# a5 + d16
	rts

faddr_ind_disp_a6:
	mov.l		EXC_EXTWPTR(%a6),%a0	# fetch instruction addr
	addq.l		&0x2,EXC_EXTWPTR(%a6)	# incr instruction ptr
	bsr.l		_imem_read_word

	tst.l		%d1			# did ifetch fail?
	bne.l		iea_iacc		# yes

	mov.w		%d0,%a0			# sign extend displacement

	add.l		(%a6),%a0		# a6 + d16
	rts

faddr_ind_disp_a7:
	mov.l		EXC_EXTWPTR(%a6),%a0	# fetch instruction addr
	addq.l		&0x2,EXC_EXTWPTR(%a6)	# incr instruction ptr
	bsr.l		_imem_read_word

	tst.l		%d1			# did ifetch fail?
	bne.l		iea_iacc		# yes

	mov.w		%d0,%a0			# sign extend displacement

	add.l		EXC_A7(%a6),%a0		# a7 + d16
	rts

########################################################################
# Address register indirect w/ index(8-bit displacement): (d8, An, Xn) #
#    "       "         "    w/   "  (base displacement): (bd, An, Xn)  #
# Memory indirect postindexed: ([bd, An], Xn, od)		       #
# Memory indirect preindexed: ([bd, An, Xn], od)		       #
########################################################################
faddr_ind_ext:
	addq.l		&0x8,%d1
	bsr.l		fetch_dreg		# fetch base areg
	mov.l		%d0,-(%sp)

	mov.l		EXC_EXTWPTR(%a6),%a0	# fetch instruction addr
	addq.l		&0x2,EXC_EXTWPTR(%a6)	# incr instruction ptr
	bsr.l		_imem_read_word		# fetch extword in d0

	tst.l		%d1			# did ifetch fail?
	bne.l		iea_iacc		# yes

	mov.l		(%sp)+,%a0

	btst		&0x8,%d0
	bne.w		fcalc_mem_ind
	
	mov.l		%d0,L_SCR1(%a6)		# hold opword

	mov.l		%d0,%d1
	rol.w		&0x4,%d1
	andi.w		&0xf,%d1		# extract index regno

# count on fetch_dreg() not to alter a0...
	bsr.l		fetch_dreg		# fetch index

	mov.l		%d2,-(%sp)		# save d2
	mov.l		L_SCR1(%a6),%d2		# fetch opword

	btst		&0xb,%d2		# is it word or long?
	bne.b		faii8_long
	ext.l		%d0			# sign extend word index
faii8_long:
	mov.l		%d2,%d1
	rol.w		&0x7,%d1
	andi.l		&0x3,%d1		# extract scale value

	lsl.l		%d1,%d0			# shift index by scale

	extb.l		%d2			# sign extend displacement
	add.l		%d2,%d0			# index + disp
	add.l		%d0,%a0			# An + (index + disp)

	mov.l		(%sp)+,%d2		# restore old d2
	rts

###########################
# Absolute short: (XXX).W #
###########################
fabs_short:
	mov.l		EXC_EXTWPTR(%a6),%a0	# fetch instruction addr
	addq.l		&0x2,EXC_EXTWPTR(%a6)	# incr instruction ptr
	bsr.l		_imem_read_word		# fetch short address

	tst.l		%d1			# did ifetch fail?
	bne.l		iea_iacc		# yes

	mov.w		%d0,%a0			# return <ea> in a0
	rts

##########################
# Absolute long: (XXX).L #
##########################
fabs_long:
	mov.l		EXC_EXTWPTR(%a6),%a0	# fetch instruction addr
	addq.l		&0x4,EXC_EXTWPTR(%a6)	# incr instruction ptr
	bsr.l		_imem_read_long		# fetch long address

	tst.l		%d1			# did ifetch fail?
	bne.l		iea_iacc		# yes

	mov.l		%d0,%a0			# return <ea> in a0
	rts

#######################################################
# Program counter indirect w/ displacement: (d16, PC) #
#######################################################
fpc_ind:
	mov.l		EXC_EXTWPTR(%a6),%a0	# fetch instruction addr
	addq.l		&0x2,EXC_EXTWPTR(%a6)	# incr instruction ptr
	bsr.l		_imem_read_word		# fetch word displacement

	tst.l		%d1			# did ifetch fail?
	bne.l		iea_iacc		# yes

	mov.w		%d0,%a0			# sign extend displacement

	add.l		EXC_EXTWPTR(%a6),%a0	# pc + d16

# _imem_read_word() increased the extwptr by 2. need to adjust here.
	subq.l		&0x2,%a0		# adjust <ea>
	rts

##########################################################
# PC indirect w/ index(8-bit displacement): (d8, PC, An) #
# "     "     w/   "  (base displacement): (bd, PC, An)  #
# PC memory indirect postindexed: ([bd, PC], Xn, od)     #
# PC memory indirect preindexed: ([bd, PC, Xn], od)      #
##########################################################
fpc_ind_ext:
	mov.l		EXC_EXTWPTR(%a6),%a0	# fetch instruction addr
	addq.l		&0x2,EXC_EXTWPTR(%a6)	# incr instruction ptr
	bsr.l		_imem_read_word		# fetch ext word

	tst.l		%d1			# did ifetch fail?
	bne.l		iea_iacc		# yes

	mov.l		EXC_EXTWPTR(%a6),%a0	# put base in a0
	subq.l		&0x2,%a0		# adjust base

	btst		&0x8,%d0		# is disp only 8 bits?
	bne.w		fcalc_mem_ind		# calc memory indirect
	
	mov.l		%d0,L_SCR1(%a6)		# store opword

	mov.l		%d0,%d1			# make extword copy
	rol.w		&0x4,%d1		# rotate reg num into place
	andi.w		&0xf,%d1		# extract register number

# count on fetch_dreg() not to alter a0...
	bsr.l		fetch_dreg		# fetch index

	mov.l		%d2,-(%sp)		# save d2
	mov.l		L_SCR1(%a6),%d2		# fetch opword

	btst		&0xb,%d2		# is index word or long?
	bne.b		fpii8_long		# long
	ext.l		%d0			# sign extend word index
fpii8_long:
	mov.l		%d2,%d1
	rol.w		&0x7,%d1		# rotate scale value into place
	andi.l		&0x3,%d1		# extract scale value

	lsl.l		%d1,%d0			# shift index by scale

	extb.l		%d2			# sign extend displacement
	add.l		%d2,%d0			# disp + index
	add.l		%d0,%a0			# An + (index + disp)

	mov.l		(%sp)+,%d2		# restore temp register
	rts

# d2 = index
# d3 = base
# d4 = od
# d5 = extword
fcalc_mem_ind:
	btst		&0x6,%d0		# is the index suppressed?
	beq.b		fcalc_index

	movm.l		&0x3c00,-(%sp)		# save d2-d5

	mov.l		%d0,%d5			# put extword in d5
	mov.l		%a0,%d3			# put base in d3

	clr.l		%d2			# yes, so index = 0
	bra.b		fbase_supp_ck

# index:
fcalc_index:
	mov.l		%d0,L_SCR1(%a6)		# save d0 (opword)
	bfextu		%d0{&16:&4},%d1		# fetch dreg index
	bsr.l		fetch_dreg

	movm.l		&0x3c00,-(%sp)		# save d2-d5
	mov.l		%d0,%d2			# put index in d2
	mov.l		L_SCR1(%a6),%d5
	mov.l		%a0,%d3

	btst		&0xb,%d5		# is index word or long?
	bne.b		fno_ext
	ext.l		%d2

fno_ext:
	bfextu		%d5{&21:&2},%d0
	lsl.l		%d0,%d2

# base address (passed as parameter in d3):
# we clear the value here if it should actually be suppressed.
fbase_supp_ck:
	btst		&0x7,%d5		# is the bd suppressed?
	beq.b		fno_base_sup
	clr.l		%d3

# base displacement:
fno_base_sup:
	bfextu		%d5{&26:&2},%d0		# get bd size
#	beq.l		fmovm_error		# if (size == 0) it's reserved

	cmpi.b	 	%d0,&0x2
	blt.b		fno_bd
	beq.b		fget_word_bd

	mov.l		EXC_EXTWPTR(%a6),%a0	# fetch instruction addr
	addq.l		&0x4,EXC_EXTWPTR(%a6)	# incr instruction ptr
	bsr.l		_imem_read_long

	tst.l		%d1			# did ifetch fail?
	bne.l		fcea_iacc		# yes

	bra.b		fchk_ind

fget_word_bd:
	mov.l		EXC_EXTWPTR(%a6),%a0	# fetch instruction addr
	addq.l		&0x2,EXC_EXTWPTR(%a6)	# incr instruction ptr
	bsr.l		_imem_read_word

	tst.l		%d1			# did ifetch fail?
	bne.l		fcea_iacc		# yes

	ext.l		%d0			# sign extend bd
	
fchk_ind:
	add.l		%d0,%d3			# base += bd

# outer displacement:
fno_bd:
	bfextu		%d5{&30:&2},%d0		# is od suppressed?
	beq.w		faii_bd

	cmpi.b	 	%d0,&0x2
	blt.b		fnull_od
	beq.b		fword_od
	
	mov.l		EXC_EXTWPTR(%a6),%a0	# fetch instruction addr
	addq.l		&0x4,EXC_EXTWPTR(%a6)	# incr instruction ptr
	bsr.l		_imem_read_long

	tst.l		%d1			# did ifetch fail?
	bne.l		fcea_iacc		# yes

	bra.b 		fadd_them

fword_od:
	mov.l		EXC_EXTWPTR(%a6),%a0	# fetch instruction addr
	addq.l		&0x2,EXC_EXTWPTR(%a6)	# incr instruction ptr
	bsr.l		_imem_read_word

	tst.l		%d1			# did ifetch fail?
	bne.l		fcea_iacc		# yes

	ext.l		%d0			# sign extend od
	bra.b		fadd_them

fnull_od:
	clr.l		%d0

fadd_them:
	mov.l		%d0,%d4

	btst		&0x2,%d5		# pre or post indexing?
	beq.b		fpre_indexed

	mov.l		%d3,%a0
	bsr.l		_dmem_read_long

	tst.l		%d1			# did dfetch fail?
	bne.w		fcea_err		# yes

	add.l		%d2,%d0			# <ea> += index
	add.l		%d4,%d0			# <ea> += od
	bra.b		fdone_ea

fpre_indexed:
	add.l		%d2,%d3			# preindexing
	mov.l		%d3,%a0
	bsr.l		_dmem_read_long

	tst.l		%d1			# did dfetch fail?
	bne.w		fcea_err		# yes

	add.l		%d4,%d0			# ea += od
	bra.b		fdone_ea

faii_bd:
	add.l		%d2,%d3			# ea = (base + bd) + index
	mov.l		%d3,%d0
fdone_ea:
	mov.l		%d0,%a0

	movm.l		(%sp)+,&0x003c		# restore d2-d5
	rts

#########################################################
fcea_err:	
	mov.l		%d3,%a0

	movm.l		(%sp)+,&0x003c		# restore d2-d5
	mov.w		&0x0101,%d0
	bra.l		iea_dacc

fcea_iacc:
	movm.l		(%sp)+,&0x003c		# restore d2-d5
	bra.l		iea_iacc
	
fmovm_out_err:
	bsr.l		restore
	mov.w		&0x00e1,%d0
	bra.b		fmovm_err

fmovm_in_err:
	bsr.l		restore
	mov.w		&0x0161,%d0

fmovm_err:
	mov.l		L_SCR1(%a6),%a0
	bra.l		iea_dacc

#########################################################################
# XDEF ****************************************************************	#
# 	fmovm_ctrl(): emulate fmovm.l of control registers instr	#
#									#
# XREF ****************************************************************	#
#	_imem_read_long() - read longword from memory			#
#	iea_iacc() - _imem_read_long() failed; error recovery		#
#									#
# INPUT ***************************************************************	#
#	None								#
# 									#
# OUTPUT **************************************************************	#
#	If _imem_read_long() doesn't fail:				#
#		USER_FPCR(a6)  = new FPCR value				#
#		USER_FPSR(a6)  = new FPSR value				#
#		USER_FPIAR(a6) = new FPIAR value			#
#									#
# ALGORITHM ***********************************************************	#
# 	Decode the instruction type by looking at the extension word 	#
# in order to see how many control registers to fetch from memory.	#
# Fetch them using _imem_read_long(). If this fetch fails, exit through	#
# the special access error exit handler iea_iacc().			#
#									#
# Instruction word decoding:						#
#									#
# 	fmovem.l #<data>, {FPIAR&|FPCR&|FPSR}				#
#									#
#		WORD1			WORD2				#
#	1111 0010 00 111100	100$ $$00 0000 0000			#
#									#
#	$$$ (100): FPCR							#
#	    (010): FPSR							#
#	    (001): FPIAR						#
#	    (000): FPIAR						#
#									#
#########################################################################

	global		fmovm_ctrl
fmovm_ctrl:
	mov.b		EXC_EXTWORD(%a6),%d0	# fetch reg select bits
	cmpi.b		%d0,&0x9c		# fpcr & fpsr & fpiar ?
	beq.w		fctrl_in_7		# yes
	cmpi.b		%d0,&0x98		# fpcr & fpsr ?
	beq.w		fctrl_in_6		# yes
	cmpi.b		%d0,&0x94		# fpcr & fpiar ?
	beq.b		fctrl_in_5		# yes
	
# fmovem.l #<data>, fpsr/fpiar
fctrl_in_3:
	mov.l		EXC_EXTWPTR(%a6),%a0	# fetch instruction addr
	addq.l		&0x4,EXC_EXTWPTR(%a6)	# incr instruction ptr
	bsr.l		_imem_read_long		# fetch FPSR from mem

	tst.l		%d1			# did ifetch fail?
	bne.l		iea_iacc		# yes

	mov.l		%d0,USER_FPSR(%a6)	# store new FPSR to stack
	mov.l		EXC_EXTWPTR(%a6),%a0	# fetch instruction addr
	addq.l		&0x4,EXC_EXTWPTR(%a6)	# incr instruction ptr
	bsr.l		_imem_read_long		# fetch FPIAR from mem

	tst.l		%d1			# did ifetch fail?
	bne.l		iea_iacc		# yes

	mov.l		%d0,USER_FPIAR(%a6)	# store new FPIAR to stack
	rts

# fmovem.l #<data>, fpcr/fpiar
fctrl_in_5:
	mov.l		EXC_EXTWPTR(%a6),%a0	# fetch instruction addr
	addq.l		&0x4,EXC_EXTWPTR(%a6)	# incr instruction ptr
	bsr.l		_imem_read_long		# fetch FPCR from mem

	tst.l		%d1			# did ifetch fail?
	bne.l		iea_iacc		# yes

	mov.l		%d0,USER_FPCR(%a6)	# store new FPCR to stack
	mov.l		EXC_EXTWPTR(%a6),%a0	# fetch instruction addr
	addq.l		&0x4,EXC_EXTWPTR(%a6)	# incr instruction ptr
	bsr.l		_imem_read_long		# fetch FPIAR from mem

	tst.l		%d1			# did ifetch fail?
	bne.l		iea_iacc		# yes

	mov.l		%d0,USER_FPIAR(%a6)	# store new FPIAR to stack
	rts

# fmovem.l #<data>, fpcr/fpsr
fctrl_in_6:
	mov.l		EXC_EXTWPTR(%a6),%a0	# fetch instruction addr
	addq.l		&0x4,EXC_EXTWPTR(%a6)	# incr instruction ptr
	bsr.l		_imem_read_long		# fetch FPCR from mem

	tst.l		%d1			# did ifetch fail?
	bne.l		iea_iacc		# yes

	mov.l		%d0,USER_FPCR(%a6)	# store new FPCR to mem
	mov.l		EXC_EXTWPTR(%a6),%a0	# fetch instruction addr
	addq.l		&0x4,EXC_EXTWPTR(%a6)	# incr instruction ptr
	bsr.l		_imem_read_long		# fetch FPSR from mem

	tst.l		%d1			# did ifetch fail?
	bne.l		iea_iacc		# yes

	mov.l		%d0,USER_FPSR(%a6)	# store new FPSR to mem
	rts

# fmovem.l #<data>, fpcr/fpsr/fpiar
fctrl_in_7:
	mov.l		EXC_EXTWPTR(%a6),%a0	# fetch instruction addr
	addq.l		&0x4,EXC_EXTWPTR(%a6)	# incr instruction ptr
	bsr.l		_imem_read_long		# fetch FPCR from mem

	tst.l		%d1			# did ifetch fail?
	bne.l		iea_iacc		# yes

	mov.l		%d0,USER_FPCR(%a6)	# store new FPCR to mem
	mov.l		EXC_EXTWPTR(%a6),%a0	# fetch instruction addr
	addq.l		&0x4,EXC_EXTWPTR(%a6)	# incr instruction ptr
	bsr.l		_imem_read_long		# fetch FPSR from mem

	tst.l		%d1			# did ifetch fail?
	bne.l		iea_iacc		# yes

	mov.l		%d0,USER_FPSR(%a6)	# store new FPSR to mem
	mov.l		EXC_EXTWPTR(%a6),%a0	# fetch instruction addr
	addq.l		&0x4,EXC_EXTWPTR(%a6)	# incr instruction ptr
	bsr.l		_imem_read_long		# fetch FPIAR from mem

	tst.l		%d1			# did ifetch fail?
	bne.l		iea_iacc		# yes

	mov.l		%d0,USER_FPIAR(%a6)	# store new FPIAR to mem
	rts

##########################################################################

#########################################################################
# XDEF ****************************************************************	#
#	addsub_scaler2(): scale inputs to fadd/fsub such that no	#
#			  OVFL/UNFL exceptions will result		#
#									#
# XREF ****************************************************************	#
#	norm() - normalize mantissa after adjusting exponent		#
#									#
# INPUT ***************************************************************	#
#	FP_SRC(a6) = fp op1(src)					#
#	FP_DST(a6) = fp op2(dst)					#
# 									#
# OUTPUT **************************************************************	#
#	FP_SRC(a6) = fp op1 scaled(src)					#
#	FP_DST(a6) = fp op2 scaled(dst)					#
#	d0         = scale amount					#
#									#
# ALGORITHM ***********************************************************	#
# 	If the DST exponent is > the SRC exponent, set the DST exponent	#
# equal to 0x3fff and scale the SRC exponent by the value that the	#
# DST exponent was scaled by. If the SRC exponent is greater or equal,	#
# do the opposite. Return this scale factor in d0.			#
#	If the two exponents differ by > the number of mantissa bits	#
# plus two, then set the smallest exponent to a very small value as a	#
# quick shortcut.							#
#									#
#########################################################################

	global		addsub_scaler2
addsub_scaler2:
	mov.l		SRC_HI(%a0),FP_SCR0_HI(%a6)
	mov.l		DST_HI(%a1),FP_SCR1_HI(%a6)
	mov.l		SRC_LO(%a0),FP_SCR0_LO(%a6)
	mov.l		DST_LO(%a1),FP_SCR1_LO(%a6)
	mov.w		SRC_EX(%a0),%d0
	mov.w		DST_EX(%a1),%d1
	mov.w		%d0,FP_SCR0_EX(%a6)
	mov.w		%d1,FP_SCR1_EX(%a6)

	andi.w		&0x7fff,%d0
	andi.w		&0x7fff,%d1
	mov.w		%d0,L_SCR1(%a6)		# store src exponent
	mov.w		%d1,2+L_SCR1(%a6)	# store dst exponent

	cmp.w		%d0, %d1		# is src exp >= dst exp?
	bge.l		src_exp_ge2

# dst exp is >  src exp; scale dst to exp = 0x3fff
dst_exp_gt2:
	bsr.l		scale_to_zero_dst
	mov.l		%d0,-(%sp)		# save scale factor

	cmpi.b		STAG(%a6),&DENORM	# is dst denormalized?
	bne.b		cmpexp12

	lea		FP_SCR0(%a6),%a0
	bsr.l		norm			# normalize the denorm; result is new exp
	neg.w		%d0			# new exp = -(shft val)
	mov.w		%d0,L_SCR1(%a6)		# inset new exp

cmpexp12:
	mov.w		2+L_SCR1(%a6),%d0
	subi.w		&mantissalen+2,%d0	# subtract mantissalen+2 from larger exp

	cmp.w		%d0,L_SCR1(%a6)		# is difference >= len(mantissa)+2?
	bge.b		quick_scale12

	mov.w		L_SCR1(%a6),%d0
	add.w		0x2(%sp),%d0		# scale src exponent by scale factor
	mov.w		FP_SCR0_EX(%a6),%d1
	and.w		&0x8000,%d1
	or.w		%d1,%d0			# concat {sgn,new exp}
	mov.w		%d0,FP_SCR0_EX(%a6)	# insert new dst exponent

	mov.l		(%sp)+,%d0		# return SCALE factor
	rts

quick_scale12:
	andi.w		&0x8000,FP_SCR0_EX(%a6)	# zero src exponent
	bset		&0x0,1+FP_SCR0_EX(%a6)	# set exp = 1

	mov.l		(%sp)+,%d0		# return SCALE factor	
	rts

# src exp is >= dst exp; scale src to exp = 0x3fff
src_exp_ge2:
	bsr.l		scale_to_zero_src
	mov.l		%d0,-(%sp)		# save scale factor

	cmpi.b		DTAG(%a6),&DENORM	# is dst denormalized?
	bne.b		cmpexp22
	lea		FP_SCR1(%a6),%a0
	bsr.l		norm			# normalize the denorm; result is new exp
	neg.w		%d0			# new exp = -(shft val)
	mov.w		%d0,2+L_SCR1(%a6)	# inset new exp

cmpexp22:
	mov.w		L_SCR1(%a6),%d0
	subi.w		&mantissalen+2,%d0	# subtract mantissalen+2 from larger exp

	cmp.w		%d0,2+L_SCR1(%a6)	# is difference >= len(mantissa)+2?
	bge.b		quick_scale22

	mov.w		2+L_SCR1(%a6),%d0
	add.w		0x2(%sp),%d0		# scale dst exponent by scale factor
	mov.w		FP_SCR1_EX(%a6),%d1
	andi.w		&0x8000,%d1
	or.w		%d1,%d0			# concat {sgn,new exp}
	mov.w		%d0,FP_SCR1_EX(%a6)	# insert new dst exponent

	mov.l		(%sp)+,%d0		# return SCALE factor
	rts

quick_scale22:
	andi.w		&0x8000,FP_SCR1_EX(%a6)	# zero dst exponent
	bset		&0x0,1+FP_SCR1_EX(%a6)	# set exp = 1

	mov.l		(%sp)+,%d0		# return SCALE factor	
	rts

##########################################################################

#########################################################################
# XDEF ****************************************************************	#
#	scale_to_zero_src(): scale the exponent of extended precision	#
#			     value at FP_SCR0(a6).			#
#									#
# XREF ****************************************************************	#
#	norm() - normalize the mantissa if the operand was a DENORM	#
#									#
# INPUT ***************************************************************	#
#	FP_SCR0(a6) = extended precision operand to be scaled		#
# 									#
# OUTPUT **************************************************************	#
#	FP_SCR0(a6) = scaled extended precision operand			#
#	d0	    = scale value					#
#									#
# ALGORITHM ***********************************************************	#
# 	Set the exponent of the input operand to 0x3fff. Save the value	#
# of the difference between the original and new exponent. Then, 	#
# normalize the operand if it was a DENORM. Add this normalization	#
# value to the previous value. Return the result.			#
#									#
#########################################################################

	global		scale_to_zero_src
scale_to_zero_src:
	mov.w		FP_SCR0_EX(%a6),%d1	# extract operand's {sgn,exp}
	mov.w		%d1,%d0			# make a copy

	andi.l		&0x7fff,%d1		# extract operand's exponent

	andi.w		&0x8000,%d0		# extract operand's sgn
	or.w		&0x3fff,%d0		# insert new operand's exponent(=0)

	mov.w		%d0,FP_SCR0_EX(%a6)	# insert biased exponent

	cmpi.b		STAG(%a6),&DENORM	# is operand normalized?
	beq.b		stzs_denorm		# normalize the DENORM

stzs_norm:
	mov.l		&0x3fff,%d0
	sub.l		%d1,%d0			# scale = BIAS + (-exp)

	rts

stzs_denorm:
	lea		FP_SCR0(%a6),%a0	# pass ptr to src op
	bsr.l		norm			# normalize denorm
	neg.l		%d0			# new exponent = -(shft val)
	mov.l		%d0,%d1			# prepare for op_norm call
	bra.b		stzs_norm		# finish scaling

###

#########################################################################
# XDEF ****************************************************************	#
#	scale_sqrt(): scale the input operand exponent so a subsequent	#
#		      fsqrt operation won't take an exception.		#
#									#
# XREF ****************************************************************	#
#	norm() - normalize the mantissa if the operand was a DENORM	#
#									#
# INPUT ***************************************************************	#
#	FP_SCR0(a6) = extended precision operand to be scaled		#
# 									#
# OUTPUT **************************************************************	#
#	FP_SCR0(a6) = scaled extended precision operand			#
#	d0	    = scale value					#
#									#
# ALGORITHM ***********************************************************	#
#	If the input operand is a DENORM, normalize it.			#
# 	If the exponent of the input operand is even, set the exponent	#
# to 0x3ffe and return a scale factor of "(exp-0x3ffe)/2". If the 	#
# exponent of the input operand is off, set the exponent to ox3fff and	#
# return a scale factor of "(exp-0x3fff)/2". 				#
#									#
#########################################################################

	global		scale_sqrt
scale_sqrt:
	cmpi.b		STAG(%a6),&DENORM	# is operand normalized?
	beq.b		ss_denorm		# normalize the DENORM

	mov.w		FP_SCR0_EX(%a6),%d1	# extract operand's {sgn,exp}
	andi.l		&0x7fff,%d1		# extract operand's exponent

	andi.w		&0x8000,FP_SCR0_EX(%a6)	# extract operand's sgn

	btst		&0x0,%d1		# is exp even or odd?
	beq.b		ss_norm_even

	ori.w		&0x3fff,FP_SCR0_EX(%a6)	# insert new operand's exponent(=0)

	mov.l		&0x3fff,%d0
	sub.l		%d1,%d0			# scale = BIAS + (-exp)
	asr.l		&0x1,%d0		# divide scale factor by 2
	rts

ss_norm_even:
	ori.w		&0x3ffe,FP_SCR0_EX(%a6)	# insert new operand's exponent(=0)

	mov.l		&0x3ffe,%d0
	sub.l		%d1,%d0			# scale = BIAS + (-exp)
	asr.l		&0x1,%d0		# divide scale factor by 2
	rts

ss_denorm:
	lea		FP_SCR0(%a6),%a0	# pass ptr to src op
	bsr.l		norm			# normalize denorm

	btst		&0x0,%d0		# is exp even or odd?
	beq.b		ss_denorm_even

	ori.w		&0x3fff,FP_SCR0_EX(%a6)	# insert new operand's exponent(=0)

	add.l		&0x3fff,%d0
	asr.l		&0x1,%d0		# divide scale factor by 2
	rts

ss_denorm_even:
	ori.w		&0x3ffe,FP_SCR0_EX(%a6)	# insert new operand's exponent(=0)

	add.l		&0x3ffe,%d0
	asr.l		&0x1,%d0		# divide scale factor by 2
	rts

###

#########################################################################
# XDEF ****************************************************************	#
#	scale_to_zero_dst(): scale the exponent of extended precision	#
#			     value at FP_SCR1(a6).			#
#									#
# XREF ****************************************************************	#
#	norm() - normalize the mantissa if the operand was a DENORM	#
#									#
# INPUT ***************************************************************	#
#	FP_SCR1(a6) = extended precision operand to be scaled		#
# 									#
# OUTPUT **************************************************************	#
#	FP_SCR1(a6) = scaled extended precision operand			#
#	d0	    = scale value					#
#									#
# ALGORITHM ***********************************************************	#
# 	Set the exponent of the input operand to 0x3fff. Save the value	#
# of the difference between the original and new exponent. Then, 	#
# normalize the operand if it was a DENORM. Add this normalization	#
# value to the previous value. Return the result.			#
#									#
#########################################################################

	global		scale_to_zero_dst
scale_to_zero_dst:
	mov.w		FP_SCR1_EX(%a6),%d1	# extract operand's {sgn,exp}
	mov.w		%d1,%d0			# make a copy

	andi.l		&0x7fff,%d1		# extract operand's exponent

	andi.w		&0x8000,%d0		# extract operand's sgn
	or.w		&0x3fff,%d0		# insert new operand's exponent(=0)

	mov.w		%d0,FP_SCR1_EX(%a6)	# insert biased exponent

	cmpi.b		DTAG(%a6),&DENORM	# is operand normalized?
	beq.b		stzd_denorm		# normalize the DENORM

stzd_norm:
	mov.l		&0x3fff,%d0
	sub.l		%d1,%d0			# scale = BIAS + (-exp)
	rts

stzd_denorm:
	lea		FP_SCR1(%a6),%a0	# pass ptr to dst op
	bsr.l		norm			# normalize denorm
	neg.l		%d0			# new exponent = -(shft val)
	mov.l		%d0,%d1			# prepare for op_norm call
	bra.b		stzd_norm		# finish scaling

##########################################################################

#########################################################################
# XDEF ****************************************************************	#
#	res_qnan(): return default result w/ QNAN operand for dyadic	#
#	res_snan(): return default result w/ SNAN operand for dyadic	#
#	res_qnan_1op(): return dflt result w/ QNAN operand for monadic	#
#	res_snan_1op(): return dflt result w/ SNAN operand for monadic	#
#									#
# XREF ****************************************************************	#
#	None								#
#									#
# INPUT ***************************************************************	#
#	FP_SRC(a6) = pointer to extended precision src operand		#
#	FP_DST(a6) = pointer to extended precision dst operand		#
# 									#
# OUTPUT **************************************************************	#
#	fp0 = default result						#
#									#
# ALGORITHM ***********************************************************	#
# 	If either operand (but not both operands) of an operation is a	#
# nonsignalling NAN, then that NAN is returned as the result. If both	#
# operands are nonsignalling NANs, then the destination operand 	#
# nonsignalling NAN is returned as the result.				#
# 	If either operand to an operation is a signalling NAN (SNAN),	#
# then, the SNAN bit is set in the FPSR EXC byte. If the SNAN trap	#
# enable bit is set in the FPCR, then the trap is taken and the 	#
# destination is not modified. If the SNAN trap enable bit is not set,	#
# then the SNAN is converted to a nonsignalling NAN (by setting the 	#
# SNAN bit in the operand to one), and the operation continues as 	#
# described in the preceding paragraph, for nonsignalling NANs.		#
#	Make sure the appropriate FPSR bits are set before exiting.	#
#									#
#########################################################################

	global		res_qnan
	global		res_snan
res_qnan:
res_snan:
	cmp.b		DTAG(%a6), &SNAN	# is the dst an SNAN?
	beq.b		dst_snan2
	cmp.b		DTAG(%a6), &QNAN	# is the dst a  QNAN?
	beq.b		dst_qnan2
src_nan:
	cmp.b		STAG(%a6), &QNAN
	beq.b		src_qnan2
	global		res_snan_1op
res_snan_1op:
src_snan2:
	bset		&0x6, FP_SRC_HI(%a6)	# set SNAN bit
	or.l		&nan_mask+aiop_mask+snan_mask, USER_FPSR(%a6)
	lea		FP_SRC(%a6), %a0
	bra.b		nan_comp
	global		res_qnan_1op
res_qnan_1op:
src_qnan2:
	or.l		&nan_mask, USER_FPSR(%a6)
	lea		FP_SRC(%a6), %a0
	bra.b		nan_comp
dst_snan2:
	or.l		&nan_mask+aiop_mask+snan_mask, USER_FPSR(%a6)
	bset		&0x6, FP_DST_HI(%a6)	# set SNAN bit
	lea		FP_DST(%a6), %a0
	bra.b		nan_comp
dst_qnan2:
	lea		FP_DST(%a6), %a0
	cmp.b		STAG(%a6), &SNAN
	bne		nan_done
	or.l		&aiop_mask+snan_mask, USER_FPSR(%a6)	
nan_done:
	or.l		&nan_mask, USER_FPSR(%a6)
nan_comp:
	btst		&0x7, FTEMP_EX(%a0)	# is NAN neg?
	beq.b		nan_not_neg
	or.l		&neg_mask, USER_FPSR(%a6)
nan_not_neg:
	fmovm.x		(%a0), &0x80
	rts

#########################################################################
# XDEF ****************************************************************	#
# 	res_operr(): return default result during operand error		#
#									#
# XREF ****************************************************************	#
#	None								#
#									#
# INPUT ***************************************************************	#
#	None								#
# 									#
# OUTPUT **************************************************************	#
#	fp0 = default operand error result				#
#									#
# ALGORITHM ***********************************************************	#
#	An nonsignalling NAN is returned as the default result when	#
# an operand error occurs for the following cases:			#
#									#
# 	Multiply: (Infinity x Zero)					#
# 	Divide  : (Zero / Zero) || (Infinity / Infinity)		#
#									#
#########################################################################

	global		res_operr
res_operr:
	or.l		&nan_mask+operr_mask+aiop_mask, USER_FPSR(%a6)
	fmovm.x		nan_return(%pc), &0x80
	rts

nan_return:	
	long		0x7fff0000, 0xffffffff, 0xffffffff

#########################################################################
# XDEF ****************************************************************	#
# 	_denorm(): denormalize an intermediate result			#
#									#
# XREF ****************************************************************	#
#	None								#
#									#
# INPUT *************************************************************** #
#	a0 = points to the operand to be denormalized			#
#		(in the internal extended format)			#
#		 							#
#	d0 = rounding precision						#
#									#
# OUTPUT **************************************************************	#
#	a0 = pointer to the denormalized result				#
#		(in the internal extended format)			#
#									#
#	d0 = guard,round,sticky						#
#									#
# ALGORITHM ***********************************************************	#
# 	According to the exponent underflow threshold for the given	#
# precision, shift the mantissa bits to the right in order raise the	#
# exponent of the operand to the threshold value. While shifting the 	#
# mantissa bits right, maintain the value of the guard, round, and 	#
# sticky bits.								#
# other notes:								#
#	(1) _denorm() is called by the underflow routines		#
#	(2) _denorm() does NOT affect the status register		#
#									#
#########################################################################

#
# table of exponent threshold values for each precision
#
tbl_thresh:
	short		0x0
	short		sgl_thresh
	short		dbl_thresh

	global		_denorm
_denorm:
#
# Load the exponent threshold for the precision selected and check
# to see if (threshold - exponent) is > 65 in which case we can 
# simply calculate the sticky bit and zero the mantissa. otherwise
# we have to call the denormalization routine.
#
	lsr.b		&0x2, %d0		# shift prec to lo bits
	mov.w		(tbl_thresh.b,%pc,%d0.w*2), %d1 # load prec threshold
	mov.w		%d1, %d0		# copy d1 into d0
	sub.w		FTEMP_EX(%a0), %d0	# diff = threshold - exp
	cmpi.w		%d0, &66		# is diff > 65? (mant + g,r bits)
	bpl.b		denorm_set_stky		# yes; just calc sticky

	clr.l		%d0			# clear g,r,s
	btst		&inex2_bit, FPSR_EXCEPT(%a6) # yes; was INEX2 set?
	beq.b		denorm_call		# no; don't change anything
	bset		&29, %d0		# yes; set sticky bit

denorm_call:
	bsr.l		dnrm_lp			# denormalize the number
	rts

#
# all bit would have been shifted off during the denorm so simply
# calculate if the sticky should be set and clear the entire mantissa.
#
denorm_set_stky:
	mov.l		&0x20000000, %d0	# set sticky bit in return value
	mov.w		%d1, FTEMP_EX(%a0)	# load exp with threshold
	clr.l		FTEMP_HI(%a0)		# set d1 = 0 (ms mantissa)
	clr.l		FTEMP_LO(%a0)		# set d2 = 0 (ms mantissa)
	rts

#									#
# dnrm_lp(): normalize exponent/mantissa to specified threshhold	#
#									#
# INPUT:								#
#	%a0	   : points to the operand to be denormalized		#
#	%d0{31:29} : initial guard,round,sticky				#
#	%d1{15:0}  : denormalization threshold				#
# OUTPUT:								#
#	%a0	   : points to the denormalized operand		 	#
#	%d0{31:29} : final guard,round,sticky				#
#									#

# *** Local Equates *** #
set	GRS,		L_SCR2			# g,r,s temp storage
set	FTEMP_LO2,	L_SCR1			# FTEMP_LO copy

	global		dnrm_lp
dnrm_lp:

#
# make a copy of FTEMP_LO and place the g,r,s bits directly after it
# in memory so as to make the bitfield extraction for denormalization easier.
#
	mov.l		FTEMP_LO(%a0), FTEMP_LO2(%a6) # make FTEMP_LO copy
	mov.l		%d0, GRS(%a6)		# place g,r,s after it

#
# check to see how much less than the underflow threshold the operand
# exponent is. 
#
	mov.l		%d1, %d0		# copy the denorm threshold
	sub.w		FTEMP_EX(%a0), %d1	# d1 = threshold - uns exponent
	ble.b		dnrm_no_lp		# d1 <= 0
	cmpi.w		%d1, &0x20		# is ( 0 <= d1 < 32) ?
	blt.b		case_1			# yes
	cmpi.w		%d1, &0x40		# is (32 <= d1 < 64) ?
	blt.b		case_2			# yes
	bra.w		case_3			# (d1 >= 64)

#
# No normalization necessary
#
dnrm_no_lp:
	mov.l		GRS(%a6), %d0 		# restore original g,r,s
	rts

#
# case (0<d1<32)
#
# %d0 = denorm threshold
# %d1 = "n" = amt to shift
#
#	---------------------------------------------------------
#	|     FTEMP_HI	  |    	FTEMP_LO     |grs000.........000|
#	---------------------------------------------------------
#	<-(32 - n)-><-(n)-><-(32 - n)-><-(n)-><-(32 - n)-><-(n)->
#	\	   \		      \			 \
#	 \	    \		       \		  \
#	  \	     \			\		   \
#	   \	      \			 \		    \
#	    \	       \		  \		     \
#	     \		\		   \		      \
#	      \		 \		    \		       \
#	       \	  \		     \			\
#	<-(n)-><-(32 - n)-><------(32)-------><------(32)------->	
#	---------------------------------------------------------
#	|0.....0| NEW_HI  |  NEW_FTEMP_LO     |grs		|
#	---------------------------------------------------------
#
case_1:
	mov.l		%d2, -(%sp)		# create temp storage

	mov.w		%d0, FTEMP_EX(%a0)	# exponent = denorm threshold
	mov.l		&32, %d0
	sub.w		%d1, %d0		# %d0 = 32 - %d1

	cmpi.w		%d1, &29		# is shft amt >= 29
	blt.b		case1_extract		# no; no fix needed
	mov.b		GRS(%a6), %d2
	or.b		%d2, 3+FTEMP_LO2(%a6)

case1_extract:
	bfextu		FTEMP_HI(%a0){&0:%d0}, %d2 # %d2 = new FTEMP_HI
	bfextu		FTEMP_HI(%a0){%d0:&32}, %d1 # %d1 = new FTEMP_LO
	bfextu		FTEMP_LO2(%a6){%d0:&32}, %d0 # %d0 = new G,R,S

	mov.l		%d2, FTEMP_HI(%a0)	# store new FTEMP_HI
	mov.l		%d1, FTEMP_LO(%a0)	# store new FTEMP_LO

	bftst		%d0{&2:&30}		# were bits shifted off?
	beq.b		case1_sticky_clear	# no; go finish
	bset		&rnd_stky_bit, %d0	# yes; set sticky bit

case1_sticky_clear:
	and.l		&0xe0000000, %d0	# clear all but G,R,S
	mov.l		(%sp)+, %d2		# restore temp register
	rts

#
# case (32<=d1<64)
#
# %d0 = denorm threshold
# %d1 = "n" = amt to shift
#
#	---------------------------------------------------------
#	|     FTEMP_HI	  |    	FTEMP_LO     |grs000.........000|
#	---------------------------------------------------------
#	<-(32 - n)-><-(n)-><-(32 - n)-><-(n)-><-(32 - n)-><-(n)->
#	\	   \		      \
#	 \	    \		       \
#	  \	     \			-------------------
#	   \	      --------------------		   \
#	    -------------------	  	  \		    \
#	     		       \	   \		     \
#	      		 	\     	    \		      \
#	       		  	 \	     \		       \
#	<-------(32)------><-(n)-><-(32 - n)-><------(32)------->
#	---------------------------------------------------------
#	|0...............0|0....0| NEW_LO     |grs		|
#	---------------------------------------------------------
#
case_2:
	mov.l		%d2, -(%sp)		# create temp storage

	mov.w		%d0, FTEMP_EX(%a0)	# exponent = denorm threshold
	subi.w		&0x20, %d1		# %d1 now between 0 and 32
	mov.l		&0x20, %d0
	sub.w		%d1, %d0		# %d0 = 32 - %d1

# subtle step here; or in the g,r,s at the bottom of FTEMP_LO to minimize
# the number of bits to check for the sticky detect.
# it only plays a role in shift amounts of 61-63.
	mov.b		GRS(%a6), %d2
	or.b		%d2, 3+FTEMP_LO2(%a6)

	bfextu		FTEMP_HI(%a0){&0:%d0}, %d2 # %d2 = new FTEMP_LO
	bfextu		FTEMP_HI(%a0){%d0:&32}, %d1 # %d1 = new G,R,S

	bftst		%d1{&2:&30}		# were any bits shifted off?
	bne.b		case2_set_sticky	# yes; set sticky bit
	bftst		FTEMP_LO2(%a6){%d0:&31}	# were any bits shifted off?
	bne.b		case2_set_sticky	# yes; set sticky bit

	mov.l		%d1, %d0		# move new G,R,S to %d0
	bra.b		case2_end

case2_set_sticky:
	mov.l		%d1, %d0		# move new G,R,S to %d0
	bset		&rnd_stky_bit, %d0	# set sticky bit

case2_end:
	clr.l		FTEMP_HI(%a0)		# store FTEMP_HI = 0
	mov.l		%d2, FTEMP_LO(%a0)	# store FTEMP_LO
	and.l		&0xe0000000, %d0	# clear all but G,R,S

	mov.l		(%sp)+,%d2		# restore temp register
	rts

#
# case (d1>=64)
#
# %d0 = denorm threshold
# %d1 = amt to shift
#
case_3:
	mov.w		%d0, FTEMP_EX(%a0)	# insert denorm threshold

	cmpi.w		%d1, &65		# is shift amt > 65?
	blt.b		case3_64		# no; it's == 64
	beq.b		case3_65		# no; it's == 65

#
# case (d1>65)
#
# Shift value is > 65 and out of range. All bits are shifted off.
# Return a zero mantissa with the sticky bit set
#
	clr.l		FTEMP_HI(%a0)		# clear hi(mantissa)
	clr.l		FTEMP_LO(%a0)		# clear lo(mantissa)
	mov.l		&0x20000000, %d0	# set sticky bit
	rts

#
# case (d1 == 64)
#
#	---------------------------------------------------------
#	|     FTEMP_HI	  |    	FTEMP_LO     |grs000.........000|
#	---------------------------------------------------------
#	<-------(32)------>
#	\	   	   \
#	 \	    	    \
#	  \	     	     \
#	   \	      	      ------------------------------
#	    -------------------------------		    \
#	     		       		   \		     \
#	      		 	     	    \		      \
#	       		  	 	     \		       \
#					      <-------(32)------>
#	---------------------------------------------------------
#	|0...............0|0................0|grs		|
#	---------------------------------------------------------
#
case3_64:
	mov.l		FTEMP_HI(%a0), %d0	# fetch hi(mantissa)
	mov.l		%d0, %d1		# make a copy
	and.l		&0xc0000000, %d0	# extract G,R
	and.l		&0x3fffffff, %d1	# extract other bits

	bra.b		case3_complete

#
# case (d1 == 65)
#
#	---------------------------------------------------------
#	|     FTEMP_HI	  |    	FTEMP_LO     |grs000.........000|
#	---------------------------------------------------------
#	<-------(32)------>
#	\	   	   \
#	 \	    	    \
#	  \	     	     \
#	   \	      	      ------------------------------
#	    --------------------------------		    \
#	     		       		    \		     \
#	      		 	     	     \		      \
#	       		  	 	      \		       \
#					       <-------(31)----->
#	---------------------------------------------------------
#	|0...............0|0................0|0rs		|
#	---------------------------------------------------------
#
case3_65:
	mov.l		FTEMP_HI(%a0), %d0	# fetch hi(mantissa)
	and.l		&0x80000000, %d0	# extract R bit
	lsr.l		&0x1, %d0		# shift high bit into R bit
	and.l		&0x7fffffff, %d1	# extract other bits

case3_complete:
# last operation done was an "and" of the bits shifted off so the condition
# codes are already set so branch accordingly.
	bne.b		case3_set_sticky	# yes; go set new sticky
	tst.l		FTEMP_LO(%a0)		# were any bits shifted off?
	bne.b		case3_set_sticky	# yes; go set new sticky
	tst.b		GRS(%a6)		# were any bits shifted off?
	bne.b		case3_set_sticky	# yes; go set new sticky

#
# no bits were shifted off so don't set the sticky bit.
# the guard and
# the entire mantissa is zero.
#
	clr.l		FTEMP_HI(%a0)		# clear hi(mantissa)
	clr.l		FTEMP_LO(%a0)		# clear lo(mantissa)
	rts

#
# some bits were shifted off so set the sticky bit.
# the entire mantissa is zero.
#
case3_set_sticky:
	bset		&rnd_stky_bit,%d0	# set new sticky bit
	clr.l		FTEMP_HI(%a0)		# clear hi(mantissa)
	clr.l		FTEMP_LO(%a0)		# clear lo(mantissa)
	rts

#########################################################################
# XDEF ****************************************************************	#
#	_round(): round result according to precision/mode		#
#									#
# XREF ****************************************************************	#
#	None								#
#									#
# INPUT ***************************************************************	#
#	a0	  = ptr to input operand in internal extended format 	#
#	d1(hi)    = contains rounding precision:			#
#			ext = $0000xxxx					#
#			sgl = $0004xxxx					#
#			dbl = $0008xxxx					#
#	d1(lo)	  = contains rounding mode:				#
#			RN  = $xxxx0000					#
#			RZ  = $xxxx0001					#
#			RM  = $xxxx0002					#
#			RP  = $xxxx0003					#
#	d0{31:29} = contains the g,r,s bits (extended)			#
#									#
# OUTPUT **************************************************************	#
#	a0 = pointer to rounded result					#
#									#
# ALGORITHM ***********************************************************	#
#	On return the value pointed to by a0 is correctly rounded,	#
#	a0 is preserved and the g-r-s bits in d0 are cleared.		#
#	The result is not typed - the tag field is invalid.  The	#
#	result is still in the internal extended format.		#
#									#
#	The INEX bit of USER_FPSR will be set if the rounded result was	#
#	inexact (i.e. if any of the g-r-s bits were set).		#
#									#
#########################################################################

	global		_round
_round:
#
# ext_grs() looks at the rounding precision and sets the appropriate
# G,R,S bits.
# If (G,R,S == 0) then result is exact and round is done, else set 
# the inex flag in status reg and continue.
#
	bsr.l		ext_grs			# extract G,R,S

	tst.l		%d0			# are G,R,S zero?
	beq.w		truncate		# yes; round is complete

	or.w		&inx2a_mask, 2+USER_FPSR(%a6) # set inex2/ainex

#
# Use rounding mode as an index into a jump table for these modes.
# All of the following assumes grs != 0.
#
	mov.w		(tbl_mode.b,%pc,%d1.w*2), %a1 # load jump offset
	jmp		(tbl_mode.b,%pc,%a1)	# jmp to rnd mode handler

tbl_mode:
	short		rnd_near - tbl_mode
	short		truncate - tbl_mode	# RZ always truncates
	short		rnd_mnus - tbl_mode
	short		rnd_plus - tbl_mode

#################################################################
#	ROUND PLUS INFINITY					#
#								#
#	If sign of fp number = 0 (positive), then add 1 to l.	#
#################################################################
rnd_plus:
	tst.b		FTEMP_SGN(%a0)		# check for sign
	bmi.w		truncate		# if positive then truncate

	mov.l		&0xffffffff, %d0	# force g,r,s to be all f's
	swap		%d1			# set up d1 for round prec.

	cmpi.b		%d1, &s_mode		# is prec = sgl?
	beq.w		add_sgl			# yes
	bgt.w		add_dbl			# no; it's dbl
	bra.w		add_ext			# no; it's ext

#################################################################
#	ROUND MINUS INFINITY					#
#								#
#	If sign of fp number = 1 (negative), then add 1 to l.	#
#################################################################
rnd_mnus:
	tst.b		FTEMP_SGN(%a0)		# check for sign	
	bpl.w		truncate		# if negative then truncate

	mov.l		&0xffffffff, %d0	# force g,r,s to be all f's
	swap		%d1			# set up d1 for round prec.

	cmpi.b		%d1, &s_mode		# is prec = sgl?
	beq.w		add_sgl			# yes
	bgt.w		add_dbl			# no; it's dbl
	bra.w		add_ext			# no; it's ext

#################################################################
#	ROUND NEAREST						#
#								#
#	If (g=1), then add 1 to l and if (r=s=0), then clear l	#
#	Note that this will round to even in case of a tie.	#
#################################################################
rnd_near:
	asl.l		&0x1, %d0		# shift g-bit to c-bit
	bcc.w		truncate		# if (g=1) then

	swap		%d1			# set up d1 for round prec.

	cmpi.b		%d1, &s_mode		# is prec = sgl?
	beq.w		add_sgl			# yes
	bgt.w		add_dbl			# no; it's dbl
	bra.w		add_ext			# no; it's ext

# *** LOCAL EQUATES ***
set	ad_1_sgl,	0x00000100	# constant to add 1 to l-bit in sgl prec
set	ad_1_dbl,	0x00000800	# constant to add 1 to l-bit in dbl prec

#########################
#	ADD SINGLE	#
#########################
add_sgl:
	add.l		&ad_1_sgl, FTEMP_HI(%a0)
	bcc.b		scc_clr			# no mantissa overflow
	roxr.w		FTEMP_HI(%a0)		# shift v-bit back in
	roxr.w		FTEMP_HI+2(%a0)		# shift v-bit back in
	add.w		&0x1, FTEMP_EX(%a0)	# and incr exponent
scc_clr:
	tst.l		%d0			# test for rs = 0
	bne.b		sgl_done
	and.w		&0xfe00, FTEMP_HI+2(%a0) # clear the l-bit
sgl_done:
	and.l		&0xffffff00, FTEMP_HI(%a0) # truncate bits beyond sgl limit
	clr.l		FTEMP_LO(%a0)		# clear d2
	rts

#########################
#	ADD EXTENDED	#
#########################
add_ext:
	addq.l		&1,FTEMP_LO(%a0)	# add 1 to l-bit
	bcc.b		xcc_clr			# test for carry out
	addq.l		&1,FTEMP_HI(%a0)	# propogate carry
	bcc.b		xcc_clr
	roxr.w		FTEMP_HI(%a0)		# mant is 0 so restore v-bit
	roxr.w		FTEMP_HI+2(%a0)		# mant is 0 so restore v-bit
	roxr.w		FTEMP_LO(%a0)
	roxr.w		FTEMP_LO+2(%a0)
	add.w		&0x1,FTEMP_EX(%a0)	# and inc exp
xcc_clr:
	tst.l		%d0			# test rs = 0
	bne.b		add_ext_done
	and.b		&0xfe,FTEMP_LO+3(%a0)	# clear the l bit
add_ext_done:
	rts

#########################
#	ADD DOUBLE	#
#########################
add_dbl:
	add.l		&ad_1_dbl, FTEMP_LO(%a0) # add 1 to lsb
	bcc.b		dcc_clr			# no carry
	addq.l		&0x1, FTEMP_HI(%a0)	# propogate carry
	bcc.b		dcc_clr			# no carry

	roxr.w		FTEMP_HI(%a0)		# mant is 0 so restore v-bit
	roxr.w		FTEMP_HI+2(%a0)		# mant is 0 so restore v-bit
	roxr.w		FTEMP_LO(%a0)
	roxr.w		FTEMP_LO+2(%a0)
	addq.w		&0x1, FTEMP_EX(%a0)	# incr exponent
dcc_clr:
	tst.l		%d0			# test for rs = 0
	bne.b		dbl_done
	and.w		&0xf000, FTEMP_LO+2(%a0) # clear the l-bit

dbl_done:
	and.l		&0xfffff800,FTEMP_LO(%a0) # truncate bits beyond dbl limit
	rts

###########################
# Truncate all other bits #
###########################
truncate:
	swap		%d1			# select rnd prec

	cmpi.b		%d1, &s_mode		# is prec sgl?
	beq.w		sgl_done		# yes
	bgt.b		dbl_done		# no; it's dbl
	rts					# no; it's ext


#
# ext_grs(): extract guard, round and sticky bits according to
#	     rounding precision.
#
# INPUT
#	d0	   = extended precision g,r,s (in d0{31:29})
#	d1 	   = {PREC,ROUND}
# OUTPUT
#	d0{31:29}  = guard, round, sticky
#
# The ext_grs extract the guard/round/sticky bits according to the
# selected rounding precision. It is called by the round subroutine
# only.  All registers except d0 are kept intact. d0 becomes an
# updated guard,round,sticky in d0{31:29}
#
# Notes: the ext_grs uses the round PREC, and therefore has to swap d1
#	 prior to usage, and needs to restore d1 to original. this
#	 routine is tightly tied to the round routine and not meant to
#	 uphold standard subroutine calling practices.
#

ext_grs:
	swap		%d1			# have d1.w point to round precision
	tst.b		%d1			# is rnd prec = extended?
	bne.b		ext_grs_not_ext		# no; go handle sgl or dbl

#
# %d0 actually already hold g,r,s since _round() had it before calling
# this function. so, as long as we don't disturb it, we are "returning" it.
#
ext_grs_ext:
	swap		%d1			# yes; return to correct positions
	rts

ext_grs_not_ext:
	movm.l		&0x3000, -(%sp)		# make some temp registers {d2/d3}

	cmpi.b		%d1, &s_mode		# is rnd prec = sgl?
	bne.b		ext_grs_dbl		# no; go handle dbl

#
# sgl:
#	96		64	  40	32		0
#	-----------------------------------------------------
#	| EXP	|XXXXXXX|	  |xx	|		|grs|
#	-----------------------------------------------------
#			<--(24)--->nn\			   /
#				   ee ---------------------
#				   ww		|
#						v
#				   gr	   new sticky
#
ext_grs_sgl:
	bfextu		FTEMP_HI(%a0){&24:&2}, %d3 # sgl prec. g-r are 2 bits right
	mov.l		&30, %d2		# of the sgl prec. limits
	lsl.l		%d2, %d3		# shift g-r bits to MSB of d3
	mov.l		FTEMP_HI(%a0), %d2	# get word 2 for s-bit test
	and.l		&0x0000003f, %d2	# s bit is the or of all other 
	bne.b		ext_grs_st_stky		# bits to the right of g-r
	tst.l		FTEMP_LO(%a0)		# test lower mantissa
	bne.b		ext_grs_st_stky		# if any are set, set sticky
	tst.l		%d0			# test original g,r,s
	bne.b		ext_grs_st_stky		# if any are set, set sticky
	bra.b		ext_grs_end_sd		# if words 3 and 4 are clr, exit

#
# dbl:
#	96		64	  	32	 11	0
#	-----------------------------------------------------
#	| EXP	|XXXXXXX|	  	|	 |xx	|grs|
#	-----------------------------------------------------
#						  nn\	    /
#						  ee -------
#						  ww	|
#							v
#						  gr	new sticky
#
ext_grs_dbl:
	bfextu		FTEMP_LO(%a0){&21:&2}, %d3 # dbl-prec. g-r are 2 bits right
	mov.l		&30, %d2		# of the dbl prec. limits
	lsl.l		%d2, %d3		# shift g-r bits to the MSB of d3
	mov.l		FTEMP_LO(%a0), %d2	# get lower mantissa  for s-bit test
	and.l		&0x000001ff, %d2	# s bit is the or-ing of all 
	bne.b		ext_grs_st_stky		# other bits to the right of g-r
	tst.l		%d0			# test word original g,r,s
	bne.b		ext_grs_st_stky		# if any are set, set sticky
	bra.b		ext_grs_end_sd		# if clear, exit

ext_grs_st_stky:
	bset		&rnd_stky_bit, %d3	# set sticky bit
ext_grs_end_sd:
	mov.l		%d3, %d0		# return grs to d0

	movm.l		(%sp)+, &0xc		# restore scratch registers {d2/d3}

	swap		%d1			# restore d1 to original
	rts

#########################################################################
# norm(): normalize the mantissa of an extended precision input. the	#
#	  input operand should not be normalized already.		#
#									#
# XDEF ****************************************************************	#
#	norm()								#
#									#
# XREF **************************************************************** #
#	none								#
#									#
# INPUT *************************************************************** #
#	a0 = pointer fp extended precision operand to normalize		#
#									#
# OUTPUT ************************************************************** #
# 	d0 = number of bit positions the mantissa was shifted		#
#	a0 = the input operand's mantissa is normalized; the exponent	#
#	     is unchanged.						#
#									#
#########################################################################
	global		norm
norm:
	mov.l		%d2, -(%sp)		# create some temp regs
	mov.l		%d3, -(%sp)

	mov.l		FTEMP_HI(%a0), %d0	# load hi(mantissa)
	mov.l		FTEMP_LO(%a0), %d1	# load lo(mantissa)

	bfffo		%d0{&0:&32}, %d2	# how many places to shift?
	beq.b		norm_lo			# hi(man) is all zeroes!

norm_hi:
	lsl.l		%d2, %d0		# left shift hi(man)
	bfextu		%d1{&0:%d2}, %d3	# extract lo bits

	or.l		%d3, %d0		# create hi(man)
	lsl.l		%d2, %d1		# create lo(man)

	mov.l		%d0, FTEMP_HI(%a0)	# store new hi(man)
	mov.l		%d1, FTEMP_LO(%a0)	# store new lo(man)

	mov.l		%d2, %d0		# return shift amount
	
	mov.l		(%sp)+, %d3		# restore temp regs
	mov.l		(%sp)+, %d2

	rts

norm_lo:
	bfffo		%d1{&0:&32}, %d2	# how many places to shift?
	lsl.l		%d2, %d1		# shift lo(man)
	add.l		&32, %d2		# add 32 to shft amount

	mov.l		%d1, FTEMP_HI(%a0)	# store hi(man)
	clr.l		FTEMP_LO(%a0)		# lo(man) is now zero

	mov.l		%d2, %d0		# return shift amount
	
	mov.l		(%sp)+, %d3		# restore temp regs
	mov.l		(%sp)+, %d2

	rts

#########################################################################
# unnorm_fix(): - changes an UNNORM to one of NORM, DENORM, or ZERO	#
#		- returns corresponding optype tag			#
#									#
# XDEF ****************************************************************	#
#	unnorm_fix()							#
#									#
# XREF **************************************************************** #
#	norm() - normalize the mantissa					#
#									#
# INPUT *************************************************************** #
#	a0 = pointer to unnormalized extended precision number		#
#									#
# OUTPUT ************************************************************** #
#	d0 = optype tag - is corrected to one of NORM, DENORM, or ZERO	#
#	a0 = input operand has been converted to a norm, denorm, or	#
#	     zero; both the exponent and mantissa are changed.		#
#									#
#########################################################################

	global		unnorm_fix
unnorm_fix:
	bfffo		FTEMP_HI(%a0){&0:&32}, %d0 # how many shifts are needed?
	bne.b		unnorm_shift		# hi(man) is not all zeroes

#
# hi(man) is all zeroes so see if any bits in lo(man) are set
#
unnorm_chk_lo:
	bfffo		FTEMP_LO(%a0){&0:&32}, %d0 # is operand really a zero?
	beq.w		unnorm_zero		# yes

	add.w		&32, %d0		# no; fix shift distance

#
# d0 = # shifts needed for complete normalization
#
unnorm_shift:
	clr.l		%d1			# clear top word
	mov.w		FTEMP_EX(%a0), %d1	# extract exponent
	and.w		&0x7fff, %d1		# strip off sgn

	cmp.w		%d0, %d1		# will denorm push exp < 0?
	bgt.b		unnorm_nrm_zero		# yes; denorm only until exp = 0

#
# exponent would not go < 0. therefore, number stays normalized
#
	sub.w		%d0, %d1		# shift exponent value
	mov.w		FTEMP_EX(%a0), %d0	# load old exponent
	and.w		&0x8000, %d0		# save old sign
	or.w		%d0, %d1		# {sgn,new exp}
	mov.w		%d1, FTEMP_EX(%a0)	# insert new exponent

	bsr.l		norm			# normalize UNNORM

	mov.b		&NORM, %d0		# return new optype tag
	rts

#
# exponent would go < 0, so only denormalize until exp = 0
#
unnorm_nrm_zero:
	cmp.b		%d1, &32		# is exp <= 32?
	bgt.b		unnorm_nrm_zero_lrg	# no; go handle large exponent

	bfextu		FTEMP_HI(%a0){%d1:&32}, %d0 # extract new hi(man)
	mov.l		%d0, FTEMP_HI(%a0)	# save new hi(man)

	mov.l		FTEMP_LO(%a0), %d0	# fetch old lo(man)
	lsl.l		%d1, %d0		# extract new lo(man)
	mov.l		%d0, FTEMP_LO(%a0)	# save new lo(man)

	and.w		&0x8000, FTEMP_EX(%a0)	# set exp = 0

	mov.b		&DENORM, %d0		# return new optype tag
	rts

#
# only mantissa bits set are in lo(man)
#
unnorm_nrm_zero_lrg:
	sub.w		&32, %d1		# adjust shft amt by 32

	mov.l		FTEMP_LO(%a0), %d0	# fetch old lo(man)
	lsl.l		%d1, %d0		# left shift lo(man)

	mov.l		%d0, FTEMP_HI(%a0)	# store new hi(man)
	clr.l		FTEMP_LO(%a0)		# lo(man) = 0

	and.w		&0x8000, FTEMP_EX(%a0)	# set exp = 0

	mov.b		&DENORM, %d0		# return new optype tag
	rts

#
# whole mantissa is zero so this UNNORM is actually a zero
#
unnorm_zero:
	and.w		&0x8000, FTEMP_EX(%a0) 	# force exponent to zero

	mov.b		&ZERO, %d0		# fix optype tag
	rts

#########################################################################
# XDEF ****************************************************************	#
# 	set_tag_x(): return the optype of the input ext fp number	#
#									#
# XREF ****************************************************************	#
#	None								#
#									#
# INPUT ***************************************************************	#
#	a0 = pointer to extended precision operand			#
# 									#
# OUTPUT **************************************************************	#
#	d0 = value of type tag						#
# 		one of: NORM, INF, QNAN, SNAN, DENORM, UNNORM, ZERO	#
#									#
# ALGORITHM ***********************************************************	#
#	Simply test the exponent, j-bit, and mantissa values to 	#
# determine the type of operand.					#
#	If it's an unnormalized zero, alter the operand and force it	#
# to be a normal zero.							#
#									#
#########################################################################

	global		set_tag_x
set_tag_x:
	mov.w		FTEMP_EX(%a0), %d0	# extract exponent
	andi.w		&0x7fff, %d0		# strip off sign
	cmpi.w		%d0, &0x7fff		# is (EXP == MAX)?
	beq.b		inf_or_nan_x
not_inf_or_nan_x:
	btst		&0x7,FTEMP_HI(%a0)
	beq.b		not_norm_x
is_norm_x:
	mov.b		&NORM, %d0
	rts
not_norm_x:
	tst.w		%d0			# is exponent = 0?
	bne.b		is_unnorm_x
not_unnorm_x:
	tst.l		FTEMP_HI(%a0)
	bne.b		is_denorm_x
	tst.l		FTEMP_LO(%a0)
	bne.b		is_denorm_x
is_zero_x:
	mov.b		&ZERO, %d0
	rts
is_denorm_x:
	mov.b		&DENORM, %d0
	rts
# must distinguish now "Unnormalized zeroes" which we
# must convert to zero.
is_unnorm_x:
	tst.l		FTEMP_HI(%a0)
	bne.b		is_unnorm_reg_x
	tst.l		FTEMP_LO(%a0)
	bne.b		is_unnorm_reg_x
# it's an "unnormalized zero". let's convert it to an actual zero...
	andi.w		&0x8000,FTEMP_EX(%a0)	# clear exponent
	mov.b		&ZERO, %d0
	rts
is_unnorm_reg_x:
	mov.b		&UNNORM, %d0
	rts
inf_or_nan_x:
	tst.l		FTEMP_LO(%a0)
	bne.b		is_nan_x
	mov.l		FTEMP_HI(%a0), %d0
	and.l		&0x7fffffff, %d0	# msb is a don't care!
	bne.b		is_nan_x
is_inf_x:
	mov.b		&INF, %d0
	rts
is_nan_x:
	btst		&0x6, FTEMP_HI(%a0)
	beq.b		is_snan_x
	mov.b		&QNAN, %d0
	rts
is_snan_x:
	mov.b		&SNAN, %d0
	rts

#########################################################################
# XDEF ****************************************************************	#
# 	set_tag_d(): return the optype of the input dbl fp number	#
#									#
# XREF ****************************************************************	#
#	None								#
#									#
# INPUT ***************************************************************	#
#	a0 = points to double precision operand				#
# 									#
# OUTPUT **************************************************************	#
#	d0 = value of type tag						#
# 		one of: NORM, INF, QNAN, SNAN, DENORM, ZERO		#
#									#
# ALGORITHM ***********************************************************	#
#	Simply test the exponent, j-bit, and mantissa values to 	#
# determine the type of operand.					#
#									#
#########################################################################

	global		set_tag_d
set_tag_d:
	mov.l		FTEMP(%a0), %d0
	mov.l		%d0, %d1

	andi.l		&0x7ff00000, %d0
	beq.b		zero_or_denorm_d

	cmpi.l		%d0, &0x7ff00000
	beq.b		inf_or_nan_d

is_norm_d:
	mov.b		&NORM, %d0
	rts
zero_or_denorm_d:
	and.l		&0x000fffff, %d1
	bne		is_denorm_d
	tst.l		4+FTEMP(%a0)
	bne		is_denorm_d
is_zero_d:
	mov.b		&ZERO, %d0
	rts
is_denorm_d:
	mov.b		&DENORM, %d0
	rts
inf_or_nan_d:
	and.l		&0x000fffff, %d1
	bne		is_nan_d
	tst.l		4+FTEMP(%a0)
	bne		is_nan_d
is_inf_d:
	mov.b		&INF, %d0
	rts
is_nan_d:
	btst		&19, %d1
	bne		is_qnan_d
is_snan_d:
	mov.b		&SNAN, %d0
	rts
is_qnan_d:
	mov.b		&QNAN, %d0
	rts

#########################################################################
# XDEF ****************************************************************	#
# 	set_tag_s(): return the optype of the input sgl fp number	#
#									#
# XREF ****************************************************************	#
#	None								#
#									#
# INPUT ***************************************************************	#
#	a0 = pointer to single precision operand			#
# 									#
# OUTPUT **************************************************************	#
#	d0 = value of type tag						#
# 		one of: NORM, INF, QNAN, SNAN, DENORM, ZERO		#
#									#
# ALGORITHM ***********************************************************	#
#	Simply test the exponent, j-bit, and mantissa values to 	#
# determine the type of operand.					#
#									#
#########################################################################

	global		set_tag_s
set_tag_s:
	mov.l		FTEMP(%a0), %d0
	mov.l		%d0, %d1

	andi.l		&0x7f800000, %d0
	beq.b		zero_or_denorm_s

	cmpi.l		%d0, &0x7f800000
	beq.b		inf_or_nan_s

is_norm_s:
	mov.b		&NORM, %d0
	rts
zero_or_denorm_s:
	and.l		&0x007fffff, %d1
	bne		is_denorm_s
is_zero_s:
	mov.b		&ZERO, %d0
	rts
is_denorm_s:
	mov.b		&DENORM, %d0
	rts
inf_or_nan_s:
	and.l		&0x007fffff, %d1
	bne		is_nan_s
is_inf_s:
	mov.b		&INF, %d0
	rts
is_nan_s:
	btst		&22, %d1
	bne		is_qnan_s
is_snan_s:
	mov.b		&SNAN, %d0
	rts
is_qnan_s:
	mov.b		&QNAN, %d0
	rts

#########################################################################
# XDEF ****************************************************************	#
# 	unf_res(): routine to produce default underflow result of a 	#
#	 	   scaled extended precision number; this is used by 	#
#		   fadd/fdiv/fmul/etc. emulation routines.		#
# 	unf_res4(): same as above but for fsglmul/fsgldiv which use	#
#		    single round prec and extended prec mode.		#
#									#
# XREF ****************************************************************	#
#	_denorm() - denormalize according to scale factor		#
# 	_round() - round denormalized number according to rnd prec	#
#									#
# INPUT ***************************************************************	#
#	a0 = pointer to extended precison operand			#
#	d0 = scale factor						#
#	d1 = rounding precision/mode					#
#									#
# OUTPUT **************************************************************	#
#	a0 = pointer to default underflow result in extended precision	#
#	d0.b = result FPSR_cc which caller may or may not want to save	#
#									#
# ALGORITHM ***********************************************************	#
# 	Convert the input operand to "internal format" which means the	#
# exponent is extended to 16 bits and the sign is stored in the unused	#
# portion of the extended precison operand. Denormalize the number	#
# according to the scale factor passed in d0. Then, round the 		#
# denormalized result.							#
# 	Set the FPSR_exc bits as appropriate but return the cc bits in	#
# d0 in case the caller doesn't want to save them (as is the case for	#
# fmove out).								#
# 	unf_res4() for fsglmul/fsgldiv forces the denorm to extended	#
# precision and the rounding mode to single.				#
#									#
#########################################################################
	global		unf_res
unf_res:
	mov.l		%d1, -(%sp)		# save rnd prec,mode on stack

	btst		&0x7, FTEMP_EX(%a0)	# make "internal" format
	sne		FTEMP_SGN(%a0)

	mov.w		FTEMP_EX(%a0), %d1	# extract exponent
	and.w		&0x7fff, %d1
	sub.w		%d0, %d1
	mov.w		%d1, FTEMP_EX(%a0)	# insert 16 bit exponent

	mov.l		%a0, -(%sp)		# save operand ptr during calls

	mov.l		0x4(%sp),%d0		# pass rnd prec.
	andi.w		&0x00c0,%d0
	lsr.w		&0x4,%d0
	bsr.l		_denorm			# denorm result

	mov.l		(%sp),%a0
	mov.w		0x6(%sp),%d1		# load prec:mode into %d1
	andi.w		&0xc0,%d1		# extract rnd prec
	lsr.w		&0x4,%d1
	swap		%d1
	mov.w		0x6(%sp),%d1
	andi.w		&0x30,%d1
	lsr.w		&0x4,%d1
	bsr.l		_round			# round the denorm

	mov.l		(%sp)+, %a0

# result is now rounded properly. convert back to normal format
	bclr		&0x7, FTEMP_EX(%a0)	# clear sgn first; may have residue
	tst.b		FTEMP_SGN(%a0)		# is "internal result" sign set?
	beq.b		unf_res_chkifzero	# no; result is positive
	bset		&0x7, FTEMP_EX(%a0)	# set result sgn
	clr.b		FTEMP_SGN(%a0)		# clear temp sign

# the number may have become zero after rounding. set ccodes accordingly.
unf_res_chkifzero:
	clr.l		%d0
	tst.l		FTEMP_HI(%a0)		# is value now a zero?
	bne.b		unf_res_cont		# no
	tst.l		FTEMP_LO(%a0)
	bne.b		unf_res_cont		# no
#	bset		&z_bit, FPSR_CC(%a6)	# yes; set zero ccode bit
	bset		&z_bit, %d0		# yes; set zero ccode bit

unf_res_cont:

#
# can inex1 also be set along with unfl and inex2???
#
# we know that underflow has occurred. aunfl should be set if INEX2 is also set.
#
	btst		&inex2_bit, FPSR_EXCEPT(%a6) # is INEX2 set?
	beq.b		unf_res_end		# no
	bset		&aunfl_bit, FPSR_AEXCEPT(%a6) # yes; set aunfl

unf_res_end:
	add.l		&0x4, %sp		# clear stack
	rts

# unf_res() for fsglmul() and fsgldiv().
	global		unf_res4
unf_res4:
	mov.l		%d1,-(%sp)		# save rnd prec,mode on stack

	btst		&0x7,FTEMP_EX(%a0)	# make "internal" format
	sne		FTEMP_SGN(%a0)

	mov.w		FTEMP_EX(%a0),%d1	# extract exponent
	and.w		&0x7fff,%d1
	sub.w		%d0,%d1
	mov.w		%d1,FTEMP_EX(%a0)	# insert 16 bit exponent

	mov.l		%a0,-(%sp)		# save operand ptr during calls

	clr.l		%d0			# force rnd prec = ext
	bsr.l		_denorm			# denorm result

	mov.l		(%sp),%a0
	mov.w		&s_mode,%d1		# force rnd prec = sgl
	swap		%d1
	mov.w		0x6(%sp),%d1		# load rnd mode
	andi.w		&0x30,%d1		# extract rnd prec
	lsr.w		&0x4,%d1
	bsr.l		_round			# round the denorm

	mov.l		(%sp)+,%a0

# result is now rounded properly. convert back to normal format
	bclr		&0x7,FTEMP_EX(%a0)	# clear sgn first; may have residue
	tst.b		FTEMP_SGN(%a0)		# is "internal result" sign set?
	beq.b		unf_res4_chkifzero	# no; result is positive
	bset		&0x7,FTEMP_EX(%a0)	# set result sgn
	clr.b		FTEMP_SGN(%a0)		# clear temp sign

# the number may have become zero after rounding. set ccodes accordingly.
unf_res4_chkifzero:
	clr.l		%d0
	tst.l		FTEMP_HI(%a0)		# is value now a zero?
	bne.b		unf_res4_cont		# no
	tst.l		FTEMP_LO(%a0)
	bne.b		unf_res4_cont		# no
#	bset		&z_bit,FPSR_CC(%a6)	# yes; set zero ccode bit
	bset		&z_bit,%d0		# yes; set zero ccode bit

unf_res4_cont:

#
# can inex1 also be set along with unfl and inex2???
#
# we know that underflow has occurred. aunfl should be set if INEX2 is also set.
#
	btst		&inex2_bit,FPSR_EXCEPT(%a6) # is INEX2 set?
	beq.b		unf_res4_end		# no
	bset		&aunfl_bit,FPSR_AEXCEPT(%a6) # yes; set aunfl

unf_res4_end:
	add.l		&0x4,%sp		# clear stack
	rts

#########################################################################
# XDEF ****************************************************************	#
#	ovf_res(): routine to produce the default overflow result of	#
#		   an overflowing number.				#
#	ovf_res2(): same as above but the rnd mode/prec are passed	#
#		    differently.					#
#									#
# XREF ****************************************************************	#
#	none								#
#									#
# INPUT ***************************************************************	#
#	d1.b 	= '-1' => (-); '0' => (+)				#
#   ovf_res():								#
#	d0 	= rnd mode/prec						#
#   ovf_res2():								#
#	hi(d0) 	= rnd prec						#
#	lo(d0)	= rnd mode						#
#									#
# OUTPUT **************************************************************	#
#	a0   	= points to extended precision result			#
#	d0.b 	= condition code bits					#
#									#
# ALGORITHM ***********************************************************	#
#	The default overflow result can be determined by the sign of	#
# the result and the rounding mode/prec in effect. These bits are	#
# concatenated together to create an index into the default result 	#
# table. A pointer to the correct result is returned in a0. The		#
# resulting condition codes are returned in d0 in case the caller 	#
# doesn't want FPSR_cc altered (as is the case for fmove out).		#
#									#
#########################################################################

	global		ovf_res
ovf_res:
	andi.w		&0x10,%d1		# keep result sign
	lsr.b		&0x4,%d0		# shift prec/mode
	or.b		%d0,%d1			# concat the two
	mov.w		%d1,%d0			# make a copy
	lsl.b		&0x1,%d1		# multiply d1 by 2
	bra.b		ovf_res_load

	global		ovf_res2
ovf_res2:
	and.w		&0x10, %d1		# keep result sign
	or.b		%d0, %d1		# insert rnd mode
	swap		%d0
	or.b		%d0, %d1		# insert rnd prec
	mov.w		%d1, %d0		# make a copy
	lsl.b		&0x1, %d1		# shift left by 1

#
# use the rounding mode, precision, and result sign as in index into the
# two tables below to fetch the default result and the result ccodes.
#
ovf_res_load:
	mov.b		(tbl_ovfl_cc.b,%pc,%d0.w*1), %d0 # fetch result ccodes
	lea		(tbl_ovfl_result.b,%pc,%d1.w*8), %a0 # return result ptr
	
	rts

tbl_ovfl_cc:
	byte		0x2, 0x0, 0x0, 0x2
	byte		0x2, 0x0, 0x0, 0x2
	byte		0x2, 0x0, 0x0, 0x2
	byte		0x0, 0x0, 0x0, 0x0
	byte		0x2+0x8, 0x8, 0x2+0x8, 0x8
	byte		0x2+0x8, 0x8, 0x2+0x8, 0x8
	byte		0x2+0x8, 0x8, 0x2+0x8, 0x8

tbl_ovfl_result:
	long		0x7fff0000,0x00000000,0x00000000,0x00000000 # +INF; RN
	long		0x7ffe0000,0xffffffff,0xffffffff,0x00000000 # +EXT; RZ
	long		0x7ffe0000,0xffffffff,0xffffffff,0x00000000 # +EXT; RM
	long		0x7fff0000,0x00000000,0x00000000,0x00000000 # +INF; RP

	long		0x7fff0000,0x00000000,0x00000000,0x00000000 # +INF; RN
	long		0x407e0000,0xffffff00,0x00000000,0x00000000 # +SGL; RZ
	long		0x407e0000,0xffffff00,0x00000000,0x00000000 # +SGL; RM
	long		0x7fff0000,0x00000000,0x00000000,0x00000000 # +INF; RP

	long		0x7fff0000,0x00000000,0x00000000,0x00000000 # +INF; RN
	long		0x43fe0000,0xffffffff,0xfffff800,0x00000000 # +DBL; RZ
	long		0x43fe0000,0xffffffff,0xfffff800,0x00000000 # +DBL; RM
	long		0x7fff0000,0x00000000,0x00000000,0x00000000 # +INF; RP

	long		0x00000000,0x00000000,0x00000000,0x00000000
	long		0x00000000,0x00000000,0x00000000,0x00000000
	long		0x00000000,0x00000000,0x00000000,0x00000000
	long		0x00000000,0x00000000,0x00000000,0x00000000

	long		0xffff0000,0x00000000,0x00000000,0x00000000 # -INF; RN
	long		0xfffe0000,0xffffffff,0xffffffff,0x00000000 # -EXT; RZ
	long		0xffff0000,0x00000000,0x00000000,0x00000000 # -INF; RM
	long		0xfffe0000,0xffffffff,0xffffffff,0x00000000 # -EXT; RP

	long		0xffff0000,0x00000000,0x00000000,0x00000000 # -INF; RN
	long		0xc07e0000,0xffffff00,0x00000000,0x00000000 # -SGL; RZ
	long		0xffff0000,0x00000000,0x00000000,0x00000000 # -INF; RM
	long		0xc07e0000,0xffffff00,0x00000000,0x00000000 # -SGL; RP

	long		0xffff0000,0x00000000,0x00000000,0x00000000 # -INF; RN
	long		0xc3fe0000,0xffffffff,0xfffff800,0x00000000 # -DBL; RZ
	long		0xffff0000,0x00000000,0x00000000,0x00000000 # -INF; RM
	long		0xc3fe0000,0xffffffff,0xfffff800,0x00000000 # -DBL; RP

#########################################################################
# XDEF ****************************************************************	#
# 	fout(): move from fp register to memory or data register	#
#									#
# XREF ****************************************************************	#
#	_round() - needed to create EXOP for sgl/dbl precision		#
#	norm() - needed to create EXOP for extended precision		#
#	ovf_res() - create default overflow result for sgl/dbl precision#
#	unf_res() - create default underflow result for sgl/dbl prec.	#
#	dst_dbl() - create rounded dbl precision result.		#
#	dst_sgl() - create rounded sgl precision result.		#
#	fetch_dreg() - fetch dynamic k-factor reg for packed.		#
#	bindec() - convert FP binary number to packed number.		#
#	_mem_write() - write data to memory.				#
#	_mem_write2() - write data to memory unless supv mode -(a7) exc.#
#	_dmem_write_{byte,word,long}() - write data to memory.		#
#	store_dreg_{b,w,l}() - store data to data register file.	#
#	facc_out_{b,w,l,d,x}() - data access error occurred.		#
#									#
# INPUT ***************************************************************	#
#	a0 = pointer to extended precision source operand		#
#	d0 = round prec,mode						#
# 									#
# OUTPUT **************************************************************	#
#	fp0 : intermediate underflow or overflow result if		#
#	      OVFL/UNFL occurred for a sgl or dbl operand		#
#									#
# ALGORITHM ***********************************************************	#
#	This routine is accessed by many handlers that need to do an	#
# opclass three move of an operand out to memory.			#
#	Decode an fmove out (opclass 3) instruction to determine if	#
# it's b,w,l,s,d,x, or p in size. b,w,l can be stored to either a data	#
# register or memory. The algorithm uses a standard "fmove" to create	#
# the rounded result. Also, since exceptions are disabled, this also	#
# create the correct OPERR default result if appropriate.		#
#	For sgl or dbl precision, overflow or underflow can occur. If	#
# either occurs and is enabled, the EXOP.				#
#	For extended precision, the stacked <ea> must be fixed along	#
# w/ the address index register as appropriate w/ _calc_ea_fout(). If	#
# the source is a denorm and if underflow is enabled, an EXOP must be	#
# created.								#
# 	For packed, the k-factor must be fetched from the instruction	#
# word or a data register. The <ea> must be fixed as w/ extended 	#
# precision. Then, bindec() is called to create the appropriate 	#
# packed result.							#
#	If at any time an access error is flagged by one of the move-	#
# to-memory routines, then a special exit must be made so that the	#
# access error can be handled properly.					#
#									#
#########################################################################

	global		fout
fout:
	bfextu		EXC_CMDREG(%a6){&3:&3},%d1 # extract dst fmt
	mov.w		(tbl_fout.b,%pc,%d1.w*2),%a1 # use as index
	jmp		(tbl_fout.b,%pc,%a1)	# jump to routine

	swbeg		&0x8
tbl_fout:
	short		fout_long	-	tbl_fout
	short		fout_sgl	-	tbl_fout
	short		fout_ext	-	tbl_fout
	short		fout_pack	-	tbl_fout
	short		fout_word	-	tbl_fout
	short		fout_dbl	-	tbl_fout
	short		fout_byte	-	tbl_fout
	short		fout_pack	-	tbl_fout

#################################################################
# fmove.b out ###################################################
#################################################################

# Only "Unimplemented Data Type" exceptions enter here. The operand
# is either a DENORM or a NORM.
fout_byte:
	tst.b		STAG(%a6)		# is operand normalized?
	bne.b		fout_byte_denorm	# no

	fmovm.x		SRC(%a0),&0x80		# load value

fout_byte_norm:
	fmov.l		%d0,%fpcr		# insert rnd prec,mode

	fmov.b		%fp0,%d0		# exec move out w/ correct rnd mode

	fmov.l		&0x0,%fpcr		# clear FPCR
	fmov.l		%fpsr,%d1		# fetch FPSR
	or.w		%d1,2+USER_FPSR(%a6)	# save new exc,accrued bits

	mov.b		1+EXC_OPWORD(%a6),%d1	# extract dst mode
	andi.b		&0x38,%d1		# is mode == 0? (Dreg dst)
	beq.b		fout_byte_dn		# must save to integer regfile

	mov.l		EXC_EA(%a6),%a0		# stacked <ea> is correct
	bsr.l		_dmem_write_byte	# write byte

	tst.l		%d1			# did dstore fail?
	bne.l		facc_out_b		# yes

	rts

fout_byte_dn:
	mov.b		1+EXC_OPWORD(%a6),%d1	# extract Dn
	andi.w		&0x7,%d1
	bsr.l		store_dreg_b
	rts

fout_byte_denorm:
	mov.l		SRC_EX(%a0),%d1
	andi.l		&0x80000000,%d1		# keep DENORM sign
	ori.l		&0x00800000,%d1		# make smallest sgl
	fmov.s		%d1,%fp0
	bra.b		fout_byte_norm

#################################################################
# fmove.w out ###################################################
#################################################################

# Only "Unimplemented Data Type" exceptions enter here. The operand
# is either a DENORM or a NORM.
fout_word:
	tst.b		STAG(%a6)		# is operand normalized?
	bne.b		fout_word_denorm	# no

	fmovm.x		SRC(%a0),&0x80		# load value

fout_word_norm:
	fmov.l		%d0,%fpcr		# insert rnd prec:mode

	fmov.w		%fp0,%d0		# exec move out w/ correct rnd mode

	fmov.l		&0x0,%fpcr		# clear FPCR
	fmov.l		%fpsr,%d1		# fetch FPSR
	or.w		%d1,2+USER_FPSR(%a6)	# save new exc,accrued bits

	mov.b		1+EXC_OPWORD(%a6),%d1	# extract dst mode
	andi.b		&0x38,%d1		# is mode == 0? (Dreg dst)
	beq.b		fout_word_dn		# must save to integer regfile

	mov.l		EXC_EA(%a6),%a0		# stacked <ea> is correct
	bsr.l		_dmem_write_word	# write word

	tst.l		%d1			# did dstore fail?
	bne.l		facc_out_w		# yes

	rts

fout_word_dn:
	mov.b		1+EXC_OPWORD(%a6),%d1	# extract Dn
	andi.w		&0x7,%d1
	bsr.l		store_dreg_w
	rts

fout_word_denorm:
	mov.l		SRC_EX(%a0),%d1
	andi.l		&0x80000000,%d1		# keep DENORM sign
	ori.l		&0x00800000,%d1		# make smallest sgl
	fmov.s		%d1,%fp0
	bra.b		fout_word_norm
	
#################################################################
# fmove.l out ###################################################
#################################################################

# Only "Unimplemented Data Type" exceptions enter here. The operand
# is either a DENORM or a NORM.
fout_long:
	tst.b		STAG(%a6)		# is operand normalized?
	bne.b		fout_long_denorm	# no

	fmovm.x		SRC(%a0),&0x80		# load value

fout_long_norm:
	fmov.l		%d0,%fpcr		# insert rnd prec:mode

	fmov.l		%fp0,%d0		# exec move out w/ correct rnd mode

	fmov.l		&0x0,%fpcr		# clear FPCR
	fmov.l		%fpsr,%d1		# fetch FPSR
	or.w		%d1,2+USER_FPSR(%a6)	# save new exc,accrued bits

fout_long_write:
	mov.b		1+EXC_OPWORD(%a6),%d1	# extract dst mode
	andi.b		&0x38,%d1		# is mode == 0? (Dreg dst)
	beq.b		fout_long_dn		# must save to integer regfile

	mov.l		EXC_EA(%a6),%a0		# stacked <ea> is correct
	bsr.l		_dmem_write_long	# write long

	tst.l		%d1			# did dstore fail?
	bne.l		facc_out_l		# yes

	rts

fout_long_dn:
	mov.b		1+EXC_OPWORD(%a6),%d1	# extract Dn
	andi.w		&0x7,%d1
	bsr.l		store_dreg_l
	rts

fout_long_denorm:
	mov.l		SRC_EX(%a0),%d1
	andi.l		&0x80000000,%d1		# keep DENORM sign
	ori.l		&0x00800000,%d1		# make smallest sgl
	fmov.s		%d1,%fp0
	bra.b		fout_long_norm

#################################################################
# fmove.x out ###################################################
#################################################################

# Only "Unimplemented Data Type" exceptions enter here. The operand
# is either a DENORM or a NORM.
# The DENORM causes an Underflow exception.
fout_ext:

# we copy the extended precision result to FP_SCR0 so that the reserved
# 16-bit field gets zeroed. we do this since we promise not to disturb
# what's at SRC(a0).
	mov.w		SRC_EX(%a0),FP_SCR0_EX(%a6)
	clr.w		2+FP_SCR0_EX(%a6)	# clear reserved field
	mov.l		SRC_HI(%a0),FP_SCR0_HI(%a6)
	mov.l		SRC_LO(%a0),FP_SCR0_LO(%a6)

	fmovm.x		SRC(%a0),&0x80		# return result

	bsr.l		_calc_ea_fout		# fix stacked <ea>

	mov.l		%a0,%a1			# pass: dst addr
	lea		FP_SCR0(%a6),%a0	# pass: src addr
	mov.l		&0xc,%d0		# pass: opsize is 12 bytes

# we must not yet write the extended precision data to the stack
# in the pre-decrement case from supervisor mode or else we'll corrupt 
# the stack frame. so, leave it in FP_SRC for now and deal with it later...
	cmpi.b		SPCOND_FLG(%a6),&mda7_flg
	beq.b		fout_ext_a7

	bsr.l		_dmem_write		# write ext prec number to memory

	tst.l		%d1			# did dstore fail?
	bne.w		fout_ext_err		# yes

	tst.b		STAG(%a6)		# is operand normalized?
	bne.b		fout_ext_denorm		# no
	rts

# the number is a DENORM. must set the underflow exception bit
fout_ext_denorm:
	bset		&unfl_bit,FPSR_EXCEPT(%a6) # set underflow exc bit

	mov.b		FPCR_ENABLE(%a6),%d0
	andi.b		&0x0a,%d0		# is UNFL or INEX enabled?
	bne.b		fout_ext_exc		# yes
	rts

# we don't want to do the write if the exception occurred in supervisor mode
# so _mem_write2() handles this for us.
fout_ext_a7:
	bsr.l		_mem_write2		# write ext prec number to memory

	tst.l		%d1			# did dstore fail?
	bne.w		fout_ext_err		# yes

	tst.b		STAG(%a6)		# is operand normalized?
	bne.b		fout_ext_denorm		# no
	rts

fout_ext_exc:
	lea		FP_SCR0(%a6),%a0
	bsr.l		norm			# normalize the mantissa
	neg.w		%d0			# new exp = -(shft amt)
	andi.w		&0x7fff,%d0
	andi.w		&0x8000,FP_SCR0_EX(%a6)	# keep only old sign
	or.w		%d0,FP_SCR0_EX(%a6)	# insert new exponent
	fmovm.x		FP_SCR0(%a6),&0x40	# return EXOP in fp1
	rts

fout_ext_err:
	mov.l		EXC_A6(%a6),(%a6)	# fix stacked a6
	bra.l		facc_out_x

#########################################################################
# fmove.s out ###########################################################
#########################################################################
fout_sgl:
	andi.b		&0x30,%d0		# clear rnd prec
	ori.b		&s_mode*0x10,%d0	# insert sgl prec
	mov.l		%d0,L_SCR3(%a6)		# save rnd prec,mode on stack

#
# operand is a normalized number. first, we check to see if the move out
# would cause either an underflow or overflow. these cases are handled
# separately. otherwise, set the FPCR to the proper rounding mode and
# execute the move.
#
	mov.w		SRC_EX(%a0),%d0		# extract exponent
	andi.w		&0x7fff,%d0		# strip sign

	cmpi.w		%d0,&SGL_HI		# will operand overflow?
	bgt.w		fout_sgl_ovfl		# yes; go handle OVFL
	beq.w		fout_sgl_may_ovfl	# maybe; go handle possible OVFL
	cmpi.w		%d0,&SGL_LO		# will operand underflow?
	blt.w		fout_sgl_unfl		# yes; go handle underflow

#
# NORMs(in range) can be stored out by a simple "fmov.s"
# Unnormalized inputs can come through this point.
#
fout_sgl_exg:
	fmovm.x		SRC(%a0),&0x80		# fetch fop from stack

	fmov.l		L_SCR3(%a6),%fpcr	# set FPCR
	fmov.l		&0x0,%fpsr		# clear FPSR

	fmov.s		%fp0,%d0		# store does convert and round

	fmov.l		&0x0,%fpcr		# clear FPCR
	fmov.l		%fpsr,%d1		# save FPSR

	or.w		%d1,2+USER_FPSR(%a6) 	# set possible inex2/ainex

fout_sgl_exg_write:
	mov.b		1+EXC_OPWORD(%a6),%d1	# extract dst mode
	andi.b		&0x38,%d1		# is mode == 0? (Dreg dst)
	beq.b		fout_sgl_exg_write_dn	# must save to integer regfile

	mov.l		EXC_EA(%a6),%a0		# stacked <ea> is correct
	bsr.l		_dmem_write_long	# write long

	tst.l		%d1			# did dstore fail?
	bne.l		facc_out_l		# yes

	rts

fout_sgl_exg_write_dn:
	mov.b		1+EXC_OPWORD(%a6),%d1	# extract Dn
	andi.w		&0x7,%d1
	bsr.l		store_dreg_l
	rts

#
# here, we know that the operand would UNFL if moved out to single prec,
# so, denorm and round and then use generic store single routine to
# write the value to memory.
#
fout_sgl_unfl:
	bset		&unfl_bit,FPSR_EXCEPT(%a6) # set UNFL

	mov.w		SRC_EX(%a0),FP_SCR0_EX(%a6)
	mov.l		SRC_HI(%a0),FP_SCR0_HI(%a6)
	mov.l		SRC_LO(%a0),FP_SCR0_LO(%a6)
	mov.l		%a0,-(%sp)

	clr.l		%d0			# pass: S.F. = 0

	cmpi.b		STAG(%a6),&DENORM	# fetch src optype tag
	bne.b		fout_sgl_unfl_cont	# let DENORMs fall through

	lea		FP_SCR0(%a6),%a0
	bsr.l		norm			# normalize the DENORM
	
fout_sgl_unfl_cont:
	lea		FP_SCR0(%a6),%a0	# pass: ptr to operand
	mov.l		L_SCR3(%a6),%d1		# pass: rnd prec,mode
	bsr.l		unf_res			# calc default underflow result

	lea		FP_SCR0(%a6),%a0	# pass: ptr to fop
	bsr.l		dst_sgl			# convert to single prec

	mov.b		1+EXC_OPWORD(%a6),%d1	# extract dst mode
	andi.b		&0x38,%d1		# is mode == 0? (Dreg dst)
	beq.b		fout_sgl_unfl_dn	# must save to integer regfile

	mov.l		EXC_EA(%a6),%a0		# stacked <ea> is correct
	bsr.l		_dmem_write_long	# write long

	tst.l		%d1			# did dstore fail?
	bne.l		facc_out_l		# yes

	bra.b		fout_sgl_unfl_chkexc

fout_sgl_unfl_dn:
	mov.b		1+EXC_OPWORD(%a6),%d1	# extract Dn
	andi.w		&0x7,%d1
	bsr.l		store_dreg_l

fout_sgl_unfl_chkexc:
	mov.b		FPCR_ENABLE(%a6),%d1
	andi.b		&0x0a,%d1		# is UNFL or INEX enabled?
	bne.w		fout_sd_exc_unfl	# yes
	addq.l		&0x4,%sp
	rts

#
# it's definitely an overflow so call ovf_res to get the correct answer
#
fout_sgl_ovfl:
	tst.b		3+SRC_HI(%a0)		# is result inexact?
	bne.b		fout_sgl_ovfl_inex2
	tst.l		SRC_LO(%a0)		# is result inexact?
	bne.b		fout_sgl_ovfl_inex2
	ori.w		&ovfl_inx_mask,2+USER_FPSR(%a6) # set ovfl/aovfl/ainex
	bra.b		fout_sgl_ovfl_cont
fout_sgl_ovfl_inex2:
	ori.w		&ovfinx_mask,2+USER_FPSR(%a6) # set ovfl/aovfl/ainex/inex2

fout_sgl_ovfl_cont:
	mov.l		%a0,-(%sp)

# call ovf_res() w/ sgl prec and the correct rnd mode to create the default
# overflow result. DON'T save the returned ccodes from ovf_res() since
# fmove out doesn't alter them. 
	tst.b		SRC_EX(%a0)		# is operand negative?
	smi		%d1			# set if so
	mov.l		L_SCR3(%a6),%d0		# pass: sgl prec,rnd mode
	bsr.l		ovf_res			# calc OVFL result
	fmovm.x		(%a0),&0x80		# load default overflow result
	fmov.s		%fp0,%d0		# store to single

	mov.b		1+EXC_OPWORD(%a6),%d1	# extract dst mode
	andi.b		&0x38,%d1		# is mode == 0? (Dreg dst)
	beq.b		fout_sgl_ovfl_dn	# must save to integer regfile

	mov.l		EXC_EA(%a6),%a0		# stacked <ea> is correct
	bsr.l		_dmem_write_long	# write long

	tst.l		%d1			# did dstore fail?
	bne.l		facc_out_l		# yes

	bra.b		fout_sgl_ovfl_chkexc

fout_sgl_ovfl_dn:
	mov.b		1+EXC_OPWORD(%a6),%d1	# extract Dn
	andi.w		&0x7,%d1
	bsr.l		store_dreg_l

fout_sgl_ovfl_chkexc:
	mov.b		FPCR_ENABLE(%a6),%d1
	andi.b		&0x0a,%d1		# is UNFL or INEX enabled?
	bne.w		fout_sd_exc_ovfl	# yes
	addq.l		&0x4,%sp
	rts

#
# move out MAY overflow:
# (1) force the exp to 0x3fff
# (2) do a move w/ appropriate rnd mode
# (3) if exp still equals zero, then insert original exponent
#	for the correct result.
#     if exp now equals one, then it overflowed so call ovf_res.
#
fout_sgl_may_ovfl:
	mov.w		SRC_EX(%a0),%d1		# fetch current sign
	andi.w		&0x8000,%d1		# keep it,clear exp
	ori.w		&0x3fff,%d1		# insert exp = 0
	mov.w		%d1,FP_SCR0_EX(%a6)	# insert scaled exp
	mov.l		SRC_HI(%a0),FP_SCR0_HI(%a6) # copy hi(man)
	mov.l		SRC_LO(%a0),FP_SCR0_LO(%a6) # copy lo(man)

	fmov.l		L_SCR3(%a6),%fpcr	# set FPCR

	fmov.x		FP_SCR0(%a6),%fp0	# force fop to be rounded
	fmov.l		&0x0,%fpcr		# clear FPCR

	fabs.x		%fp0			# need absolute value
	fcmp.b		%fp0,&0x2		# did exponent increase?
	fblt.w		fout_sgl_exg		# no; go finish NORM	
	bra.w		fout_sgl_ovfl		# yes; go handle overflow

################

fout_sd_exc_unfl:
	mov.l		(%sp)+,%a0

	mov.w		SRC_EX(%a0),FP_SCR0_EX(%a6)
	mov.l		SRC_HI(%a0),FP_SCR0_HI(%a6)
	mov.l		SRC_LO(%a0),FP_SCR0_LO(%a6)

	cmpi.b		STAG(%a6),&DENORM	# was src a DENORM?
	bne.b		fout_sd_exc_cont	# no

	lea		FP_SCR0(%a6),%a0
	bsr.l		norm
	neg.l		%d0
	andi.w		&0x7fff,%d0
	bfins		%d0,FP_SCR0_EX(%a6){&1:&15}
	bra.b		fout_sd_exc_cont

fout_sd_exc:
fout_sd_exc_ovfl:
	mov.l		(%sp)+,%a0		# restore a0

	mov.w		SRC_EX(%a0),FP_SCR0_EX(%a6)
	mov.l		SRC_HI(%a0),FP_SCR0_HI(%a6)
	mov.l		SRC_LO(%a0),FP_SCR0_LO(%a6)

fout_sd_exc_cont:
	bclr		&0x7,FP_SCR0_EX(%a6)	# clear sign bit
	sne.b		2+FP_SCR0_EX(%a6)	# set internal sign bit
	lea		FP_SCR0(%a6),%a0	# pass: ptr to DENORM

	mov.b		3+L_SCR3(%a6),%d1
	lsr.b		&0x4,%d1
	andi.w		&0x0c,%d1
	swap		%d1
	mov.b		3+L_SCR3(%a6),%d1
	lsr.b		&0x4,%d1
	andi.w		&0x03,%d1
	clr.l		%d0			# pass: zero g,r,s
	bsr.l		_round			# round the DENORM

	tst.b		2+FP_SCR0_EX(%a6)	# is EXOP negative?
	beq.b		fout_sd_exc_done	# no
	bset		&0x7,FP_SCR0_EX(%a6)	# yes

fout_sd_exc_done:
	fmovm.x		FP_SCR0(%a6),&0x40	# return EXOP in fp1
	rts

#################################################################
# fmove.d out ###################################################
#################################################################
fout_dbl:
	andi.b		&0x30,%d0		# clear rnd prec
	ori.b		&d_mode*0x10,%d0	# insert dbl prec
	mov.l		%d0,L_SCR3(%a6)		# save rnd prec,mode on stack

#
# operand is a normalized number. first, we check to see if the move out
# would cause either an underflow or overflow. these cases are handled
# separately. otherwise, set the FPCR to the proper rounding mode and
# execute the move.
#
	mov.w		SRC_EX(%a0),%d0		# extract exponent
	andi.w		&0x7fff,%d0		# strip sign

	cmpi.w		%d0,&DBL_HI		# will operand overflow?
	bgt.w		fout_dbl_ovfl		# yes; go handle OVFL
	beq.w		fout_dbl_may_ovfl	# maybe; go handle possible OVFL
	cmpi.w		%d0,&DBL_LO		# will operand underflow?
	blt.w		fout_dbl_unfl		# yes; go handle underflow

#
# NORMs(in range) can be stored out by a simple "fmov.d"
# Unnormalized inputs can come through this point.
#
fout_dbl_exg:
	fmovm.x		SRC(%a0),&0x80		# fetch fop from stack

	fmov.l		L_SCR3(%a6),%fpcr	# set FPCR
	fmov.l		&0x0,%fpsr		# clear FPSR

	fmov.d		%fp0,L_SCR1(%a6)	# store does convert and round

	fmov.l		&0x0,%fpcr		# clear FPCR
	fmov.l		%fpsr,%d0		# save FPSR

	or.w		%d0,2+USER_FPSR(%a6) 	# set possible inex2/ainex

	mov.l		EXC_EA(%a6),%a1		# pass: dst addr
	lea		L_SCR1(%a6),%a0		# pass: src addr
	movq.l		&0x8,%d0		# pass: opsize is 8 bytes
	bsr.l		_dmem_write		# store dbl fop to memory

	tst.l		%d1			# did dstore fail?
	bne.l		facc_out_d		# yes

	rts					# no; so we're finished	

#
# here, we know that the operand would UNFL if moved out to double prec,
# so, denorm and round and then use generic store double routine to
# write the value to memory.
#
fout_dbl_unfl:
	bset		&unfl_bit,FPSR_EXCEPT(%a6) # set UNFL

	mov.w		SRC_EX(%a0),FP_SCR0_EX(%a6)
	mov.l		SRC_HI(%a0),FP_SCR0_HI(%a6)
	mov.l		SRC_LO(%a0),FP_SCR0_LO(%a6)
	mov.l		%a0,-(%sp)

	clr.l		%d0			# pass: S.F. = 0

	cmpi.b		STAG(%a6),&DENORM	# fetch src optype tag
	bne.b		fout_dbl_unfl_cont	# let DENORMs fall through

	lea		FP_SCR0(%a6),%a0
	bsr.l		norm			# normalize the DENORM
	
fout_dbl_unfl_cont:
	lea		FP_SCR0(%a6),%a0	# pass: ptr to operand
	mov.l		L_SCR3(%a6),%d1		# pass: rnd prec,mode
	bsr.l		unf_res			# calc default underflow result

	lea		FP_SCR0(%a6),%a0	# pass: ptr to fop
	bsr.l		dst_dbl			# convert to single prec
	mov.l		%d0,L_SCR1(%a6)
	mov.l		%d1,L_SCR2(%a6)

	mov.l		EXC_EA(%a6),%a1		# pass: dst addr
	lea		L_SCR1(%a6),%a0		# pass: src addr
	movq.l		&0x8,%d0		# pass: opsize is 8 bytes
	bsr.l		_dmem_write		# store dbl fop to memory

	tst.l		%d1			# did dstore fail?
	bne.l		facc_out_d		# yes

	mov.b		FPCR_ENABLE(%a6),%d1
	andi.b		&0x0a,%d1		# is UNFL or INEX enabled?
	bne.w		fout_sd_exc_unfl	# yes
	addq.l		&0x4,%sp
	rts

#
# it's definitely an overflow so call ovf_res to get the correct answer
#
fout_dbl_ovfl:
	mov.w		2+SRC_LO(%a0),%d0
	andi.w		&0x7ff,%d0
	bne.b		fout_dbl_ovfl_inex2

	ori.w		&ovfl_inx_mask,2+USER_FPSR(%a6) # set ovfl/aovfl/ainex
	bra.b		fout_dbl_ovfl_cont
fout_dbl_ovfl_inex2:
	ori.w		&ovfinx_mask,2+USER_FPSR(%a6) # set ovfl/aovfl/ainex/inex2

fout_dbl_ovfl_cont:
	mov.l		%a0,-(%sp)

# call ovf_res() w/ dbl prec and the correct rnd mode to create the default
# overflow result. DON'T save the returned ccodes from ovf_res() since
# fmove out doesn't alter them. 
	tst.b		SRC_EX(%a0)		# is operand negative?
	smi		%d1			# set if so
	mov.l		L_SCR3(%a6),%d0		# pass: dbl prec,rnd mode
	bsr.l		ovf_res			# calc OVFL result
	fmovm.x		(%a0),&0x80		# load default overflow result
	fmov.d		%fp0,L_SCR1(%a6)	# store to double

	mov.l		EXC_EA(%a6),%a1		# pass: dst addr
	lea		L_SCR1(%a6),%a0		# pass: src addr
	movq.l		&0x8,%d0		# pass: opsize is 8 bytes
	bsr.l		_dmem_write		# store dbl fop to memory

	tst.l		%d1			# did dstore fail?
	bne.l		facc_out_d		# yes

	mov.b		FPCR_ENABLE(%a6),%d1
	andi.b		&0x0a,%d1		# is UNFL or INEX enabled?
	bne.w		fout_sd_exc_ovfl	# yes
	addq.l		&0x4,%sp
	rts

#
# move out MAY overflow:
# (1) force the exp to 0x3fff
# (2) do a move w/ appropriate rnd mode
# (3) if exp still equals zero, then insert original exponent
#	for the correct result.
#     if exp now equals one, then it overflowed so call ovf_res.
#
fout_dbl_may_ovfl:
	mov.w		SRC_EX(%a0),%d1		# fetch current sign
	andi.w		&0x8000,%d1		# keep it,clear exp
	ori.w		&0x3fff,%d1		# insert exp = 0
	mov.w		%d1,FP_SCR0_EX(%a6)	# insert scaled exp
	mov.l		SRC_HI(%a0),FP_SCR0_HI(%a6) # copy hi(man)
	mov.l		SRC_LO(%a0),FP_SCR0_LO(%a6) # copy lo(man)

	fmov.l		L_SCR3(%a6),%fpcr	# set FPCR

	fmov.x		FP_SCR0(%a6),%fp0	# force fop to be rounded
	fmov.l		&0x0,%fpcr		# clear FPCR

	fabs.x		%fp0			# need absolute value
	fcmp.b		%fp0,&0x2		# did exponent increase?
	fblt.w		fout_dbl_exg		# no; go finish NORM	
	bra.w		fout_dbl_ovfl		# yes; go handle overflow

#########################################################################
# XDEF ****************************************************************	#
# 	dst_dbl(): create double precision value from extended prec.	#
#									#
# XREF ****************************************************************	#
#	None								#
#									#
# INPUT ***************************************************************	#
#	a0 = pointer to source operand in extended precision		#
# 									#
# OUTPUT **************************************************************	#
#	d0 = hi(double precision result)				#
#	d1 = lo(double precision result)				#
#									#
# ALGORITHM ***********************************************************	#
#									#
#  Changes extended precision to double precision.			#
#  Note: no attempt is made to round the extended value to double.	#
#	dbl_sign = ext_sign						#
#	dbl_exp = ext_exp - $3fff(ext bias) + $7ff(dbl bias)		#
#	get rid of ext integer bit					#
#	dbl_mant = ext_mant{62:12}					#
#									#
#	    	---------------   ---------------    ---------------	#
#  extended ->  |s|    exp    |   |1| ms mant   |    | ls mant     |	#
#	    	---------------   ---------------    ---------------	#
#	   	 95	    64    63 62	      32      31     11	  0	#
#				     |			     |		#
#				     |			     |		#
#				     |			     |		#
#		 	             v   		     v		#
#	    		      ---------------   ---------------		#
#  double   ->  	      |s|exp| mant  |   |  mant       |		#
#	    		      ---------------   ---------------		#
#	   	 	      63     51   32   31	       0	#
#									#
#########################################################################

dst_dbl:
	clr.l		%d0			# clear d0
	mov.w		FTEMP_EX(%a0),%d0	# get exponent
	subi.w		&EXT_BIAS,%d0		# subtract extended precision bias
	addi.w		&DBL_BIAS,%d0		# add double precision bias
	tst.b		FTEMP_HI(%a0)		# is number a denorm?
	bmi.b		dst_get_dupper		# no
	subq.w		&0x1,%d0		# yes; denorm bias = DBL_BIAS - 1
dst_get_dupper:
	swap		%d0			# d0 now in upper word
	lsl.l		&0x4,%d0		# d0 in proper place for dbl prec exp
	tst.b		FTEMP_EX(%a0)		# test sign
	bpl.b		dst_get_dman		# if postive, go process mantissa
	bset		&0x1f,%d0		# if negative, set sign
dst_get_dman:
	mov.l		FTEMP_HI(%a0),%d1	# get ms mantissa
	bfextu		%d1{&1:&20},%d1		# get upper 20 bits of ms
	or.l		%d1,%d0			# put these bits in ms word of double
	mov.l		%d0,L_SCR1(%a6)		# put the new exp back on the stack
	mov.l		FTEMP_HI(%a0),%d1	# get ms mantissa
	mov.l		&21,%d0			# load shift count
	lsl.l		%d0,%d1			# put lower 11 bits in upper bits
	mov.l		%d1,L_SCR2(%a6)		# build lower lword in memory
	mov.l		FTEMP_LO(%a0),%d1	# get ls mantissa
	bfextu		%d1{&0:&21},%d0		# get ls 21 bits of double
	mov.l		L_SCR2(%a6),%d1
	or.l		%d0,%d1			# put them in double result
	mov.l		L_SCR1(%a6),%d0
	rts

#########################################################################
# XDEF ****************************************************************	#
# 	dst_sgl(): create single precision value from extended prec	#
#									#
# XREF ****************************************************************	#
#									#
# INPUT ***************************************************************	#
#	a0 = pointer to source operand in extended precision		#
# 									#
# OUTPUT **************************************************************	#
#	d0 = single precision result					#
#									#
# ALGORITHM ***********************************************************	#
#									#
# Changes extended precision to single precision.			#
#	sgl_sign = ext_sign						#
#	sgl_exp = ext_exp - $3fff(ext bias) + $7f(sgl bias)		#
#	get rid of ext integer bit					#
#	sgl_mant = ext_mant{62:12}					#
#									#
#	    	---------------   ---------------    ---------------	#
#  extended ->  |s|    exp    |   |1| ms mant   |    | ls mant     |	#
#	    	---------------   ---------------    ---------------	#
#	   	 95	    64    63 62	   40 32      31     12	  0	#
#				     |	   |				#
#				     |	   |				#
#				     |	   |				#
#		 	             v     v				#
#	    		      ---------------				#
#  single   ->  	      |s|exp| mant  |				#
#	    		      ---------------				#
#	   	 	      31     22     0				#
#									#
#########################################################################

dst_sgl:
	clr.l		%d0
	mov.w		FTEMP_EX(%a0),%d0	# get exponent
	subi.w		&EXT_BIAS,%d0		# subtract extended precision bias
	addi.w		&SGL_BIAS,%d0		# add single precision bias
	tst.b		FTEMP_HI(%a0)		# is number a denorm?
	bmi.b		dst_get_supper		# no
	subq.w		&0x1,%d0		# yes; denorm bias = SGL_BIAS - 1
dst_get_supper:
	swap		%d0			# put exp in upper word of d0
	lsl.l		&0x7,%d0		# shift it into single exp bits
	tst.b		FTEMP_EX(%a0)		# test sign
	bpl.b		dst_get_sman		# if positive, continue
	bset		&0x1f,%d0		# if negative, put in sign first
dst_get_sman:
	mov.l		FTEMP_HI(%a0),%d1	# get ms mantissa
	andi.l		&0x7fffff00,%d1		# get upper 23 bits of ms
	lsr.l		&0x8,%d1		# and put them flush right
	or.l		%d1,%d0			# put these bits in ms word of single
	rts

##############################################################################
fout_pack:
	bsr.l		_calc_ea_fout		# fetch the <ea>
	mov.l		%a0,-(%sp)

	mov.b		STAG(%a6),%d0		# fetch input type
	bne.w		fout_pack_not_norm	# input is not NORM

fout_pack_norm:
	btst		&0x4,EXC_CMDREG(%a6)	# static or dynamic?
	beq.b		fout_pack_s		# static

fout_pack_d:
	mov.b		1+EXC_CMDREG(%a6),%d1	# fetch dynamic reg
	lsr.b		&0x4,%d1
	andi.w		&0x7,%d1

	bsr.l		fetch_dreg		# fetch Dn w/ k-factor

	bra.b		fout_pack_type
fout_pack_s:
	mov.b		1+EXC_CMDREG(%a6),%d0	# fetch static field

fout_pack_type:
	bfexts		%d0{&25:&7},%d0		# extract k-factor
	mov.l	%d0,-(%sp)

	lea		FP_SRC(%a6),%a0		# pass: ptr to input

# bindec is currently scrambling FP_SRC for denorm inputs.
# we'll have to change this, but for now, tough luck!!!
	bsr.l		bindec			# convert xprec to packed

#	andi.l		&0xcfff000f,FP_SCR0(%a6) # clear unused fields
	andi.l		&0xcffff00f,FP_SCR0(%a6) # clear unused fields

	mov.l	(%sp)+,%d0

	tst.b		3+FP_SCR0_EX(%a6)
	bne.b		fout_pack_set
	tst.l		FP_SCR0_HI(%a6)
	bne.b		fout_pack_set
	tst.l		FP_SCR0_LO(%a6)
	bne.b		fout_pack_set

# add the extra condition that only if the k-factor was zero, too, should
# we zero the exponent
	tst.l		%d0
	bne.b		fout_pack_set	
# "mantissa" is all zero which means that the answer is zero. but, the '040
# algorithm allows the exponent to be non-zero. the 881/2 do not. therefore,
# if the mantissa is zero, I will zero the exponent, too.
# the question now is whether the exponents sign bit is allowed to be non-zero
# for a zero, also...
	andi.w		&0xf000,FP_SCR0(%a6)

fout_pack_set:

	lea		FP_SCR0(%a6),%a0	# pass: src addr

fout_pack_write:
	mov.l		(%sp)+,%a1		# pass: dst addr
	mov.l		&0xc,%d0		# pass: opsize is 12 bytes

	cmpi.b		SPCOND_FLG(%a6),&mda7_flg
	beq.b		fout_pack_a7

	bsr.l		_dmem_write		# write ext prec number to memory

	tst.l		%d1			# did dstore fail?
	bne.w		fout_ext_err		# yes

	rts

# we don't want to do the write if the exception occurred in supervisor mode
# so _mem_write2() handles this for us.
fout_pack_a7:
	bsr.l		_mem_write2		# write ext prec number to memory

	tst.l		%d1			# did dstore fail?
	bne.w		fout_ext_err		# yes

	rts

fout_pack_not_norm:
	cmpi.b		%d0,&DENORM		# is it a DENORM?
	beq.w		fout_pack_norm		# yes
	lea		FP_SRC(%a6),%a0
	clr.w		2+FP_SRC_EX(%a6)
	cmpi.b		%d0,&SNAN		# is it an SNAN?
	beq.b		fout_pack_snan		# yes
	bra.b		fout_pack_write		# no

fout_pack_snan:
	ori.w		&snaniop2_mask,FPSR_EXCEPT(%a6) # set SNAN/AIOP
	bset		&0x6,FP_SRC_HI(%a6)	# set snan bit
	bra.b		fout_pack_write

#########################################################################
# XDEF ****************************************************************	#
# 	fmul(): emulates the fmul instruction				#
#	fsmul(): emulates the fsmul instruction				#
#	fdmul(): emulates the fdmul instruction				#
#									#
# XREF ****************************************************************	#
#	scale_to_zero_src() - scale src exponent to zero		#
#	scale_to_zero_dst() - scale dst exponent to zero		#
#	unf_res() - return default underflow result			#
#	ovf_res() - return default overflow result			#
# 	res_qnan() - return QNAN result					#
# 	res_snan() - return SNAN result					#
#									#
# INPUT ***************************************************************	#
#	a0 = pointer to extended precision source operand		#
#	a1 = pointer to extended precision destination operand		#
#	d0  rnd prec,mode						#
#									#
# OUTPUT **************************************************************	#
#	fp0 = result							#
#	fp1 = EXOP (if exception occurred)				#
#									#
# ALGORITHM ***********************************************************	#
#	Handle NANs, infinities, and zeroes as special cases. Divide	#
# norms/denorms into ext/sgl/dbl precision.				#
#	For norms/denorms, scale the exponents such that a multiply	#
# instruction won't cause an exception. Use the regular fmul to		#
# compute a result. Check if the regular operands would have taken	#
# an exception. If so, return the default overflow/underflow result	#
# and return the EXOP if exceptions are enabled. Else, scale the 	#
# result operand to the proper exponent.				#
#									#
#########################################################################

	align 		0x10
tbl_fmul_ovfl:
	long		0x3fff - 0x7ffe		# ext_max
	long		0x3fff - 0x407e		# sgl_max
	long		0x3fff - 0x43fe		# dbl_max
tbl_fmul_unfl:
	long		0x3fff + 0x0001		# ext_unfl
	long		0x3fff - 0x3f80		# sgl_unfl
	long		0x3fff - 0x3c00		# dbl_unfl

	global		fsmul
fsmul:
	andi.b		&0x30,%d0		# clear rnd prec
	ori.b		&s_mode*0x10,%d0	# insert sgl prec
	bra.b		fmul

	global		fdmul
fdmul:
	andi.b		&0x30,%d0
	ori.b		&d_mode*0x10,%d0	# insert dbl prec

	global		fmul
fmul:
	mov.l		%d0,L_SCR3(%a6)		# store rnd info

	clr.w		%d1
	mov.b		DTAG(%a6),%d1
	lsl.b		&0x3,%d1
	or.b		STAG(%a6),%d1		# combine src tags
	bne.w		fmul_not_norm		# optimize on non-norm input

fmul_norm:
	mov.w		DST_EX(%a1),FP_SCR1_EX(%a6)
	mov.l		DST_HI(%a1),FP_SCR1_HI(%a6)
	mov.l		DST_LO(%a1),FP_SCR1_LO(%a6)

	mov.w		SRC_EX(%a0),FP_SCR0_EX(%a6)
	mov.l		SRC_HI(%a0),FP_SCR0_HI(%a6)
	mov.l		SRC_LO(%a0),FP_SCR0_LO(%a6)

	bsr.l		scale_to_zero_src	# scale src exponent
	mov.l		%d0,-(%sp)		# save scale factor 1

	bsr.l		scale_to_zero_dst	# scale dst exponent

	add.l		%d0,(%sp)		# SCALE_FACTOR = scale1 + scale2

	mov.w		2+L_SCR3(%a6),%d1	# fetch precision
	lsr.b		&0x6,%d1		# shift to lo bits
	mov.l		(%sp)+,%d0		# load S.F.
	cmp.l		%d0,(tbl_fmul_ovfl.w,%pc,%d1.w*4) # would result ovfl?
	beq.w		fmul_may_ovfl		# result may rnd to overflow
	blt.w		fmul_ovfl		# result will overflow

	cmp.l		%d0,(tbl_fmul_unfl.w,%pc,%d1.w*4) # would result unfl?
	beq.w		fmul_may_unfl		# result may rnd to no unfl
	bgt.w		fmul_unfl		# result will underflow

#
# NORMAL:
# - the result of the multiply operation will neither overflow nor underflow.
# - do the multiply to the proper precision and rounding mode. 
# - scale the result exponent using the scale factor. if both operands were
# normalized then we really don't need to go through this scaling. but for now,
# this will do.
#
fmul_normal:
	fmovm.x		FP_SCR1(%a6),&0x80	# load dst operand

	fmov.l		L_SCR3(%a6),%fpcr	# set FPCR
	fmov.l		&0x0,%fpsr		# clear FPSR

	fmul.x		FP_SCR0(%a6),%fp0	# execute multiply	

	fmov.l		%fpsr,%d1		# save status
	fmov.l		&0x0,%fpcr		# clear FPCR

	or.l		%d1,USER_FPSR(%a6)	# save INEX2,N

fmul_normal_exit:
	fmovm.x		&0x80,FP_SCR0(%a6)	# store out result
	mov.l		%d2,-(%sp)		# save d2
	mov.w		FP_SCR0_EX(%a6),%d1	# load {sgn,exp}
	mov.l		%d1,%d2			# make a copy
	andi.l		&0x7fff,%d1		# strip sign
	andi.w		&0x8000,%d2		# keep old sign
	sub.l		%d0,%d1			# add scale factor
	or.w		%d2,%d1			# concat old sign,new exp
	mov.w		%d1,FP_SCR0_EX(%a6)	# insert new exponent
	mov.l		(%sp)+,%d2		# restore d2
	fmovm.x		FP_SCR0(%a6),&0x80	# return default result in fp0
	rts

#
# OVERFLOW:
# - the result of the multiply operation is an overflow.
# - do the multiply to the proper precision and rounding mode in order to
# set the inexact bits.
# - calculate the default result and return it in fp0.
# - if overflow or inexact is enabled, we need a multiply result rounded to
# extended precision. if the original operation was extended, then we have this
# result. if the original operation was single or double, we have to do another
# multiply using extended precision and the correct rounding mode. the result
# of this operation then has its exponent scaled by -0x6000 to create the
# exceptional operand.
#
fmul_ovfl:
	fmovm.x		FP_SCR1(%a6),&0x80	# load dst operand

	fmov.l		L_SCR3(%a6),%fpcr	# set FPCR
	fmov.l		&0x0,%fpsr		# clear FPSR

	fmul.x		FP_SCR0(%a6),%fp0	# execute multiply	

	fmov.l		%fpsr,%d1		# save status
	fmov.l		&0x0,%fpcr		# clear FPCR

	or.l		%d1,USER_FPSR(%a6)	# save INEX2,N

# save setting this until now because this is where fmul_may_ovfl may jump in
fmul_ovfl_tst:
	or.l		&ovfl_inx_mask,USER_FPSR(%a6) # set ovfl/aovfl/ainex

	mov.b		FPCR_ENABLE(%a6),%d1
	andi.b		&0x13,%d1		# is OVFL or INEX enabled?
	bne.b		fmul_ovfl_ena		# yes

# calculate the default result
fmul_ovfl_dis:
	btst		&neg_bit,FPSR_CC(%a6)	# is result negative?
	sne		%d1			# set sign param accordingly
	mov.l		L_SCR3(%a6),%d0		# pass rnd prec,mode
	bsr.l		ovf_res			# calculate default result
	or.b		%d0,FPSR_CC(%a6)	# set INF,N if applicable
	fmovm.x		(%a0),&0x80		# return default result in fp0
	rts

#
# OVFL is enabled; Create EXOP:
# - if precision is extended, then we have the EXOP. simply bias the exponent
# with an extra -0x6000. if the precision is single or double, we need to
# calculate a result rounded to extended precision.
#
fmul_ovfl_ena:
	mov.l		L_SCR3(%a6),%d1
	andi.b		&0xc0,%d1		# test the rnd prec
	bne.b		fmul_ovfl_ena_sd	# it's sgl or dbl

fmul_ovfl_ena_cont:
	fmovm.x		&0x80,FP_SCR0(%a6)	# move result to stack

	mov.l		%d2,-(%sp)		# save d2
	mov.w		FP_SCR0_EX(%a6),%d1	# fetch {sgn,exp}
	mov.w		%d1,%d2			# make a copy
	andi.l		&0x7fff,%d1		# strip sign
	sub.l		%d0,%d1			# add scale factor
	subi.l		&0x6000,%d1		# subtract bias
	andi.w		&0x7fff,%d1		# clear sign bit
	andi.w		&0x8000,%d2		# keep old sign
	or.w		%d2,%d1			# concat old sign,new exp
	mov.w		%d1,FP_SCR0_EX(%a6)	# insert new exponent
	mov.l		(%sp)+,%d2		# restore d2
	fmovm.x		FP_SCR0(%a6),&0x40	# return EXOP in fp1
	bra.b		fmul_ovfl_dis

fmul_ovfl_ena_sd:
	fmovm.x		FP_SCR1(%a6),&0x80	# load dst operand

	mov.l		L_SCR3(%a6),%d1
	andi.b		&0x30,%d1		# keep rnd mode only
	fmov.l		%d1,%fpcr		# set FPCR

	fmul.x		FP_SCR0(%a6),%fp0	# execute multiply

	fmov.l		&0x0,%fpcr		# clear FPCR
	bra.b		fmul_ovfl_ena_cont

#
# may OVERFLOW:
# - the result of the multiply operation MAY overflow.
# - do the multiply to the proper precision and rounding mode in order to
# set the inexact bits.
# - calculate the default result and return it in fp0.
#
fmul_may_ovfl:
	fmovm.x		FP_SCR1(%a6),&0x80	# load dst op

	fmov.l		L_SCR3(%a6),%fpcr	# set FPCR
	fmov.l		&0x0,%fpsr		# clear FPSR

	fmul.x		FP_SCR0(%a6),%fp0	# execute multiply
	
	fmov.l		%fpsr,%d1		# save status
	fmov.l		&0x0,%fpcr		# clear FPCR

	or.l		%d1,USER_FPSR(%a6)	# save INEX2,N

	fabs.x		%fp0,%fp1		# make a copy of result
	fcmp.b		%fp1,&0x2		# is |result| >= 2.b?
	fbge.w		fmul_ovfl_tst		# yes; overflow has occurred
	
# no, it didn't overflow; we have correct result
	bra.w		fmul_normal_exit

#
# UNDERFLOW:
# - the result of the multiply operation is an underflow.
# - do the multiply to the proper precision and rounding mode in order to
# set the inexact bits.
# - calculate the default result and return it in fp0.
# - if overflow or inexact is enabled, we need a multiply result rounded to
# extended precision. if the original operation was extended, then we have this
# result. if the original operation was single or double, we have to do another
# multiply using extended precision and the correct rounding mode. the result
# of this operation then has its exponent scaled by -0x6000 to create the
# exceptional operand.
#
fmul_unfl:	
	bset		&unfl_bit,FPSR_EXCEPT(%a6) # set unfl exc bit

# for fun, let's use only extended precision, round to zero. then, let
# the unf_res() routine figure out all the rest.
# will we get the correct answer.
	fmovm.x		FP_SCR1(%a6),&0x80	# load dst operand

	fmov.l		&rz_mode*0x10,%fpcr	# set FPCR
	fmov.l		&0x0,%fpsr		# clear FPSR

	fmul.x		FP_SCR0(%a6),%fp0	# execute multiply

	fmov.l		%fpsr,%d1		# save status
	fmov.l		&0x0,%fpcr		# clear FPCR

	or.l		%d1,USER_FPSR(%a6)	# save INEX2,N

	mov.b		FPCR_ENABLE(%a6),%d1
	andi.b		&0x0b,%d1		# is UNFL or INEX enabled?
	bne.b		fmul_unfl_ena		# yes

fmul_unfl_dis:
	fmovm.x		&0x80,FP_SCR0(%a6)	# store out result

	lea		FP_SCR0(%a6),%a0	# pass: result addr
	mov.l		L_SCR3(%a6),%d1		# pass: rnd prec,mode
	bsr.l		unf_res			# calculate default result
	or.b		%d0,FPSR_CC(%a6)	# unf_res2 may have set 'Z'
	fmovm.x		FP_SCR0(%a6),&0x80	# return default result in fp0
	rts

#
# UNFL is enabled. 
#
fmul_unfl_ena:
	fmovm.x		FP_SCR1(%a6),&0x40	# load dst op

	mov.l		L_SCR3(%a6),%d1
	andi.b		&0xc0,%d1		# is precision extended?
	bne.b		fmul_unfl_ena_sd	# no, sgl or dbl

# if the rnd mode is anything but RZ, then we have to re-do the above
# multiplication becuase we used RZ for all.
	fmov.l		L_SCR3(%a6),%fpcr	# set FPCR

fmul_unfl_ena_cont:
	fmov.l		&0x0,%fpsr		# clear FPSR

	fmul.x		FP_SCR0(%a6),%fp1	# execute multiply	

	fmov.l		&0x0,%fpcr		# clear FPCR

	fmovm.x		&0x40,FP_SCR0(%a6)	# save result to stack
	mov.l		%d2,-(%sp)		# save d2
	mov.w		FP_SCR0_EX(%a6),%d1	# fetch {sgn,exp}
	mov.l		%d1,%d2			# make a copy
	andi.l		&0x7fff,%d1		# strip sign
	andi.w		&0x8000,%d2		# keep old sign
	sub.l		%d0,%d1			# add scale factor
	addi.l		&0x6000,%d1		# add bias
	andi.w		&0x7fff,%d1
	or.w		%d2,%d1			# concat old sign,new exp
	mov.w		%d1,FP_SCR0_EX(%a6)	# insert new exponent
	mov.l		(%sp)+,%d2		# restore d2
	fmovm.x		FP_SCR0(%a6),&0x40	# return EXOP in fp1
	bra.w		fmul_unfl_dis

fmul_unfl_ena_sd:
	mov.l		L_SCR3(%a6),%d1
	andi.b		&0x30,%d1		# use only rnd mode
	fmov.l		%d1,%fpcr		# set FPCR

	bra.b		fmul_unfl_ena_cont

# MAY UNDERFLOW:
# -use the correct rounding mode and precision. this code favors operations
# that do not underflow.
fmul_may_unfl:
	fmovm.x		FP_SCR1(%a6),&0x80	# load dst operand

	fmov.l		L_SCR3(%a6),%fpcr	# set FPCR
	fmov.l		&0x0,%fpsr		# clear FPSR

	fmul.x		FP_SCR0(%a6),%fp0	# execute multiply	

	fmov.l		%fpsr,%d1		# save status
	fmov.l		&0x0,%fpcr		# clear FPCR

	or.l		%d1,USER_FPSR(%a6)	# save INEX2,N

	fabs.x		%fp0,%fp1		# make a copy of result
	fcmp.b		%fp1,&0x2		# is |result| > 2.b?
	fbgt.w		fmul_normal_exit	# no; no underflow occurred
	fblt.w		fmul_unfl		# yes; underflow occurred

#
# we still don't know if underflow occurred. result is ~ equal to 2. but,
# we don't know if the result was an underflow that rounded up to a 2 or
# a normalized number that rounded down to a 2. so, redo the entire operation
# using RZ as the rounding mode to see what the pre-rounded result is.
# this case should be relatively rare.
#
	fmovm.x		FP_SCR1(%a6),&0x40	# load dst operand

	mov.l		L_SCR3(%a6),%d1
	andi.b		&0xc0,%d1		# keep rnd prec
	ori.b		&rz_mode*0x10,%d1	# insert RZ
	
	fmov.l		%d1,%fpcr		# set FPCR
	fmov.l		&0x0,%fpsr		# clear FPSR

	fmul.x		FP_SCR0(%a6),%fp1	# execute multiply	

	fmov.l		&0x0,%fpcr		# clear FPCR
	fabs.x		%fp1			# make absolute value
	fcmp.b		%fp1,&0x2		# is |result| < 2.b?
	fbge.w		fmul_normal_exit	# no; no underflow occurred
	bra.w		fmul_unfl		# yes, underflow occurred

################################################################################

#
# Multiply: inputs are not both normalized; what are they?
#
fmul_not_norm:
	mov.w		(tbl_fmul_op.b,%pc,%d1.w*2),%d1
	jmp		(tbl_fmul_op.b,%pc,%d1.w)

	swbeg		&48
tbl_fmul_op:
	short		fmul_norm	- tbl_fmul_op # NORM x NORM
	short		fmul_zero	- tbl_fmul_op # NORM x ZERO
	short		fmul_inf_src	- tbl_fmul_op # NORM x INF
	short		fmul_res_qnan	- tbl_fmul_op # NORM x QNAN
	short		fmul_norm	- tbl_fmul_op # NORM x DENORM
	short		fmul_res_snan	- tbl_fmul_op # NORM x SNAN
	short		tbl_fmul_op	- tbl_fmul_op #
	short		tbl_fmul_op	- tbl_fmul_op #

	short		fmul_zero	- tbl_fmul_op # ZERO x NORM
	short		fmul_zero	- tbl_fmul_op # ZERO x ZERO
	short		fmul_res_operr	- tbl_fmul_op # ZERO x INF
	short		fmul_res_qnan	- tbl_fmul_op # ZERO x QNAN
	short		fmul_zero	- tbl_fmul_op # ZERO x DENORM
	short		fmul_res_snan	- tbl_fmul_op # ZERO x SNAN
	short		tbl_fmul_op	- tbl_fmul_op #
	short		tbl_fmul_op	- tbl_fmul_op #

	short		fmul_inf_dst	- tbl_fmul_op # INF x NORM
	short		fmul_res_operr	- tbl_fmul_op # INF x ZERO
	short		fmul_inf_dst	- tbl_fmul_op # INF x INF
	short		fmul_res_qnan	- tbl_fmul_op # INF x QNAN
	short		fmul_inf_dst	- tbl_fmul_op # INF x DENORM
	short		fmul_res_snan	- tbl_fmul_op # INF x SNAN
	short		tbl_fmul_op	- tbl_fmul_op #
	short		tbl_fmul_op	- tbl_fmul_op #

	short		fmul_res_qnan	- tbl_fmul_op # QNAN x NORM
	short		fmul_res_qnan	- tbl_fmul_op # QNAN x ZERO
	short		fmul_res_qnan	- tbl_fmul_op # QNAN x INF
	short		fmul_res_qnan	- tbl_fmul_op # QNAN x QNAN
	short		fmul_res_qnan	- tbl_fmul_op # QNAN x DENORM
	short		fmul_res_snan	- tbl_fmul_op # QNAN x SNAN
	short		tbl_fmul_op	- tbl_fmul_op #
	short		tbl_fmul_op	- tbl_fmul_op #

	short		fmul_norm	- tbl_fmul_op # NORM x NORM
	short		fmul_zero	- tbl_fmul_op # NORM x ZERO
	short		fmul_inf_src	- tbl_fmul_op # NORM x INF
	short		fmul_res_qnan	- tbl_fmul_op # NORM x QNAN
	short		fmul_norm	- tbl_fmul_op # NORM x DENORM
	short		fmul_res_snan	- tbl_fmul_op # NORM x SNAN
	short		tbl_fmul_op	- tbl_fmul_op #
	short		tbl_fmul_op	- tbl_fmul_op #

	short		fmul_res_snan	- tbl_fmul_op # SNAN x NORM
	short		fmul_res_snan	- tbl_fmul_op # SNAN x ZERO
	short		fmul_res_snan	- tbl_fmul_op # SNAN x INF
	short		fmul_res_snan	- tbl_fmul_op # SNAN x QNAN
	short		fmul_res_snan	- tbl_fmul_op # SNAN x DENORM
	short		fmul_res_snan	- tbl_fmul_op # SNAN x SNAN
	short		tbl_fmul_op	- tbl_fmul_op #
	short		tbl_fmul_op	- tbl_fmul_op #

fmul_res_operr:
	bra.l		res_operr
fmul_res_snan:
	bra.l		res_snan
fmul_res_qnan:
	bra.l		res_qnan

#
# Multiply: (Zero x Zero) || (Zero x norm) || (Zero x denorm)
#
	global		fmul_zero		# global for fsglmul
fmul_zero:
	mov.b		SRC_EX(%a0),%d0		# exclusive or the signs
	mov.b		DST_EX(%a1),%d1
	eor.b		%d0,%d1
	bpl.b		fmul_zero_p		# result ZERO is pos.
fmul_zero_n:
	fmov.s		&0x80000000,%fp0	# load -ZERO
	mov.b		&z_bmask+neg_bmask,FPSR_CC(%a6) # set Z/N
	rts
fmul_zero_p:
	fmov.s		&0x00000000,%fp0	# load +ZERO
	mov.b		&z_bmask,FPSR_CC(%a6)	# set Z
	rts

#
# Multiply: (inf x inf) || (inf x norm) || (inf x denorm)
#
# Note: The j-bit for an infinity is a don't-care. However, to be
# strictly compatible w/ the 68881/882, we make sure to return an
# INF w/ the j-bit set if the input INF j-bit was set. Destination
# INFs take priority.
#
	global		fmul_inf_dst		# global for fsglmul
fmul_inf_dst:
	fmovm.x		DST(%a1),&0x80		# return INF result in fp0
	mov.b		SRC_EX(%a0),%d0		# exclusive or the signs
	mov.b		DST_EX(%a1),%d1
	eor.b		%d0,%d1
	bpl.b		fmul_inf_dst_p		# result INF is pos.
fmul_inf_dst_n:
	fabs.x		%fp0			# clear result sign
	fneg.x		%fp0			# set result sign
	mov.b		&inf_bmask+neg_bmask,FPSR_CC(%a6) # set INF/N
	rts
fmul_inf_dst_p:
	fabs.x		%fp0			# clear result sign
	mov.b		&inf_bmask,FPSR_CC(%a6)	# set INF
	rts

	global		fmul_inf_src		# global for fsglmul
fmul_inf_src:
	fmovm.x		SRC(%a0),&0x80		# return INF result in fp0
	mov.b		SRC_EX(%a0),%d0		# exclusive or the signs
	mov.b		DST_EX(%a1),%d1
	eor.b		%d0,%d1
	bpl.b		fmul_inf_dst_p		# result INF is pos.
	bra.b		fmul_inf_dst_n

#########################################################################
# XDEF ****************************************************************	#
#	fin(): emulates the fmove instruction				#
#	fsin(): emulates the fsmove instruction				#
#	fdin(): emulates the fdmove instruction				#
#									#
# XREF ****************************************************************	#
#	norm() - normalize mantissa for EXOP on denorm			#
#	scale_to_zero_src() - scale src exponent to zero		#
#	ovf_res() - return default overflow result			#
# 	unf_res() - return default underflow result			#
#	res_qnan_1op() - return QNAN result				#
#	res_snan_1op() - return SNAN result				#
#									#
# INPUT ***************************************************************	#
#	a0 = pointer to extended precision source operand		#
#	d0 = round prec/mode						#
# 									#
# OUTPUT **************************************************************	#
#	fp0 = result							#
#	fp1 = EXOP (if exception occurred)				#
#									#
# ALGORITHM ***********************************************************	#
# 	Handle NANs, infinities, and zeroes as special cases. Divide	#
# norms into extended, single, and double precision.			#
# 	Norms can be emulated w/ a regular fmove instruction. For	#
# sgl/dbl, must scale exponent and perform an "fmove". Check to see	#
# if the result would have overflowed/underflowed. If so, use unf_res()	#
# or ovf_res() to return the default result. Also return EXOP if	#
# exception is enabled. If no exception, return the default result.	#
#	Unnorms don't pass through here.				#
#									#
#########################################################################

	global		fsin
fsin:
	andi.b		&0x30,%d0		# clear rnd prec
	ori.b		&s_mode*0x10,%d0	# insert sgl precision
	bra.b		fin

	global		fdin
fdin:
	andi.b		&0x30,%d0		# clear rnd prec
	ori.b		&d_mode*0x10,%d0	# insert dbl precision

	global		fin
fin:
	mov.l		%d0,L_SCR3(%a6)		# store rnd info

	mov.b		STAG(%a6),%d1		# fetch src optype tag
	bne.w		fin_not_norm		# optimize on non-norm input
		
#
# FP MOVE IN: NORMs and DENORMs ONLY!
#
fin_norm:
	andi.b		&0xc0,%d0		# is precision extended?
	bne.w		fin_not_ext		# no, so go handle dbl or sgl

#
# precision selected is extended. so...we cannot get an underflow
# or overflow because of rounding to the correct precision. so...
# skip the scaling and unscaling...
#
	tst.b		SRC_EX(%a0)		# is the operand negative?
	bpl.b		fin_norm_done		# no
	bset		&neg_bit,FPSR_CC(%a6)	# yes, so set 'N' ccode bit
fin_norm_done:
	fmovm.x		SRC(%a0),&0x80		# return result in fp0
	rts

#
# for an extended precision DENORM, the UNFL exception bit is set
# the accrued bit is NOT set in this instance(no inexactness!)
#
fin_denorm:
	andi.b		&0xc0,%d0		# is precision extended?
	bne.w		fin_not_ext		# no, so go handle dbl or sgl

	bset		&unfl_bit,FPSR_EXCEPT(%a6) # set unfl exc bit
	tst.b		SRC_EX(%a0)		# is the operand negative?
	bpl.b		fin_denorm_done		# no
	bset		&neg_bit,FPSR_CC(%a6)	# yes, so set 'N' ccode bit
fin_denorm_done:
	fmovm.x		SRC(%a0),&0x80		# return result in fp0
	btst		&unfl_bit,FPCR_ENABLE(%a6) # is UNFL enabled?
	bne.b		fin_denorm_unfl_ena	# yes
	rts

#
# the input is an extended DENORM and underflow is enabled in the FPCR.
# normalize the mantissa and add the bias of 0x6000 to the resulting negative
# exponent and insert back into the operand.
#
fin_denorm_unfl_ena:
	mov.w		SRC_EX(%a0),FP_SCR0_EX(%a6)
	mov.l		SRC_HI(%a0),FP_SCR0_HI(%a6)
	mov.l		SRC_LO(%a0),FP_SCR0_LO(%a6)
	lea		FP_SCR0(%a6),%a0	# pass: ptr to operand
	bsr.l		norm			# normalize result
	neg.w		%d0			# new exponent = -(shft val)
	addi.w		&0x6000,%d0		# add new bias to exponent
	mov.w		FP_SCR0_EX(%a6),%d1	# fetch old sign,exp
	andi.w		&0x8000,%d1		# keep old sign
	andi.w		&0x7fff,%d0		# clear sign position
	or.w		%d1,%d0			# concat new exo,old sign
	mov.w		%d0,FP_SCR0_EX(%a6)	# insert new exponent
	fmovm.x		FP_SCR0(%a6),&0x40	# return EXOP in fp1
	rts

#
# operand is to be rounded to single or double precision
#	
fin_not_ext:
	cmpi.b		%d0,&s_mode*0x10 	# separate sgl/dbl prec
	bne.b		fin_dbl

#
# operand is to be rounded to single precision
#
fin_sgl:
	mov.w		SRC_EX(%a0),FP_SCR0_EX(%a6)
	mov.l		SRC_HI(%a0),FP_SCR0_HI(%a6)
	mov.l		SRC_LO(%a0),FP_SCR0_LO(%a6)
	bsr.l		scale_to_zero_src	# calculate scale factor

	cmpi.l		%d0,&0x3fff-0x3f80	# will move in underflow?
	bge.w		fin_sd_unfl		# yes; go handle underflow
	cmpi.l		%d0,&0x3fff-0x407e	# will move in overflow?
	beq.w		fin_sd_may_ovfl		# maybe; go check
	blt.w		fin_sd_ovfl		# yes; go handle overflow

#
# operand will NOT overflow or underflow when moved into the fp reg file
#
fin_sd_normal:
	fmov.l		&0x0,%fpsr		# clear FPSR
	fmov.l		L_SCR3(%a6),%fpcr	# set FPCR

	fmov.x		FP_SCR0(%a6),%fp0	# perform move

	fmov.l		%fpsr,%d1		# save FPSR
	fmov.l		&0x0,%fpcr		# clear FPCR

	or.l		%d1,USER_FPSR(%a6)	# save INEX2,N

fin_sd_normal_exit:
	mov.l		%d2,-(%sp)		# save d2
	fmovm.x		&0x80,FP_SCR0(%a6)	# store out result
	mov.w		FP_SCR0_EX(%a6),%d1	# load {sgn,exp}
	mov.w		%d1,%d2			# make a copy
	andi.l		&0x7fff,%d1		# strip sign
	sub.l		%d0,%d1			# add scale factor
	andi.w		&0x8000,%d2		# keep old sign
	or.w		%d1,%d2			# concat old sign,new exponent
	mov.w		%d2,FP_SCR0_EX(%a6)	# insert new exponent
	mov.l		(%sp)+,%d2		# restore d2
	fmovm.x		FP_SCR0(%a6),&0x80	# return result in fp0
	rts

#
# operand is to be rounded to double precision
#
fin_dbl:
	mov.w		SRC_EX(%a0),FP_SCR0_EX(%a6)
	mov.l		SRC_HI(%a0),FP_SCR0_HI(%a6)
	mov.l		SRC_LO(%a0),FP_SCR0_LO(%a6)
	bsr.l		scale_to_zero_src	# calculate scale factor

	cmpi.l		%d0,&0x3fff-0x3c00	# will move in underflow?
	bge.w		fin_sd_unfl		# yes; go handle underflow
	cmpi.l		%d0,&0x3fff-0x43fe	# will move in overflow?
	beq.w		fin_sd_may_ovfl		# maybe; go check
	blt.w		fin_sd_ovfl		# yes; go handle overflow
	bra.w		fin_sd_normal		# no; ho handle normalized op

#
# operand WILL underflow when moved in to the fp register file
#
fin_sd_unfl:
	bset		&unfl_bit,FPSR_EXCEPT(%a6) # set unfl exc bit

	tst.b		FP_SCR0_EX(%a6)		# is operand negative?
	bpl.b		fin_sd_unfl_tst
	bset		&neg_bit,FPSR_CC(%a6)	# set 'N' ccode bit

# if underflow or inexact is enabled, then go calculate the EXOP first.
fin_sd_unfl_tst:
	mov.b		FPCR_ENABLE(%a6),%d1
	andi.b		&0x0b,%d1		# is UNFL or INEX enabled?
	bne.b		fin_sd_unfl_ena		# yes

fin_sd_unfl_dis:
	lea		FP_SCR0(%a6),%a0	# pass: result addr
	mov.l		L_SCR3(%a6),%d1		# pass: rnd prec,mode
	bsr.l		unf_res			# calculate default result
	or.b		%d0,FPSR_CC(%a6)	# unf_res may have set 'Z'
	fmovm.x		FP_SCR0(%a6),&0x80	# return default result in fp0
	rts	

#
# operand will underflow AND underflow or inexact is enabled. 
# therefore, we must return the result rounded to extended precision.
#
fin_sd_unfl_ena:
	mov.l		FP_SCR0_HI(%a6),FP_SCR1_HI(%a6)
	mov.l		FP_SCR0_LO(%a6),FP_SCR1_LO(%a6)
	mov.w		FP_SCR0_EX(%a6),%d1	# load current exponent

	mov.l		%d2,-(%sp)		# save d2
	mov.w		%d1,%d2			# make a copy
	andi.l		&0x7fff,%d1		# strip sign
	sub.l		%d0,%d1			# subtract scale factor
	andi.w		&0x8000,%d2		# extract old sign
	addi.l		&0x6000,%d1		# add new bias
	andi.w		&0x7fff,%d1
	or.w		%d1,%d2			# concat old sign,new exp
	mov.w		%d2,FP_SCR1_EX(%a6)	# insert new exponent
	fmovm.x		FP_SCR1(%a6),&0x40	# return EXOP in fp1
	mov.l		(%sp)+,%d2		# restore d2
	bra.b		fin_sd_unfl_dis

#
# operand WILL overflow.
#
fin_sd_ovfl:
	fmov.l		&0x0,%fpsr		# clear FPSR
	fmov.l		L_SCR3(%a6),%fpcr	# set FPCR

	fmov.x		FP_SCR0(%a6),%fp0	# perform move

	fmov.l		&0x0,%fpcr		# clear FPCR
	fmov.l		%fpsr,%d1		# save FPSR

	or.l		%d1,USER_FPSR(%a6)	# save INEX2,N

fin_sd_ovfl_tst:
	or.l		&ovfl_inx_mask,USER_FPSR(%a6) # set ovfl/aovfl/ainex

	mov.b		FPCR_ENABLE(%a6),%d1
	andi.b		&0x13,%d1		# is OVFL or INEX enabled?
	bne.b		fin_sd_ovfl_ena		# yes

#
# OVFL is not enabled; therefore, we must create the default result by
# calling ovf_res().
#
fin_sd_ovfl_dis:
	btst		&neg_bit,FPSR_CC(%a6)	# is result negative?
	sne		%d1			# set sign param accordingly
	mov.l		L_SCR3(%a6),%d0		# pass: prec,mode
	bsr.l		ovf_res			# calculate default result
	or.b		%d0,FPSR_CC(%a6)	# set INF,N if applicable
	fmovm.x		(%a0),&0x80		# return default result in fp0
	rts

#
# OVFL is enabled.
# the INEX2 bit has already been updated by the round to the correct precision.
# now, round to extended(and don't alter the FPSR).
#
fin_sd_ovfl_ena:
	mov.l		%d2,-(%sp)		# save d2
	mov.w		FP_SCR0_EX(%a6),%d1	# fetch {sgn,exp}
	mov.l		%d1,%d2			# make a copy
	andi.l		&0x7fff,%d1		# strip sign
	andi.w		&0x8000,%d2		# keep old sign
	sub.l		%d0,%d1			# add scale factor
	sub.l		&0x6000,%d1		# subtract bias
	andi.w		&0x7fff,%d1
	or.w		%d2,%d1
	mov.w		%d1,FP_SCR0_EX(%a6)	# insert new exponent
	mov.l		(%sp)+,%d2		# restore d2
	fmovm.x		FP_SCR0(%a6),&0x40	# return EXOP in fp1
	bra.b		fin_sd_ovfl_dis

#
# the move in MAY overflow. so...
#
fin_sd_may_ovfl:
	fmov.l		&0x0,%fpsr		# clear FPSR
	fmov.l		L_SCR3(%a6),%fpcr	# set FPCR

	fmov.x		FP_SCR0(%a6),%fp0	# perform the move

	fmov.l		%fpsr,%d1		# save status
	fmov.l		&0x0,%fpcr		# clear FPCR

	or.l		%d1,USER_FPSR(%a6)	# save INEX2,N

	fabs.x		%fp0,%fp1		# make a copy of result
	fcmp.b		%fp1,&0x2		# is |result| >= 2.b?
	fbge.w		fin_sd_ovfl_tst		# yes; overflow has occurred

# no, it didn't overflow; we have correct result
	bra.w		fin_sd_normal_exit

##########################################################################

#
# operand is not a NORM: check its optype and branch accordingly
#
fin_not_norm:
	cmpi.b		%d1,&DENORM		# weed out DENORM
	beq.w		fin_denorm
	cmpi.b		%d1,&SNAN		# weed out SNANs
	beq.l		res_snan_1op
	cmpi.b		%d1,&QNAN		# weed out QNANs
	beq.l		res_qnan_1op

#
# do the fmove in; at this point, only possible ops are ZERO and INF.
# use fmov to determine ccodes.
# prec:mode should be zero at this point but it won't affect answer anyways.
#
	fmov.x		SRC(%a0),%fp0		# do fmove in
	fmov.l		%fpsr,%d0		# no exceptions possible
	rol.l		&0x8,%d0		# put ccodes in lo byte
	mov.b		%d0,FPSR_CC(%a6)	# insert correct ccodes
	rts

#########################################################################
# XDEF ****************************************************************	#
# 	fdiv(): emulates the fdiv instruction				#
#	fsdiv(): emulates the fsdiv instruction				#
#	fddiv(): emulates the fddiv instruction				#
#									#
# XREF ****************************************************************	#
#	scale_to_zero_src() - scale src exponent to zero		#
#	scale_to_zero_dst() - scale dst exponent to zero		#
#	unf_res() - return default underflow result			#
#	ovf_res() - return default overflow result			#
# 	res_qnan() - return QNAN result					#
# 	res_snan() - return SNAN result					#
#									#
# INPUT ***************************************************************	#
#	a0 = pointer to extended precision source operand		#
#	a1 = pointer to extended precision destination operand		#
#	d0  rnd prec,mode						#
#									#
# OUTPUT **************************************************************	#
#	fp0 = result							#
#	fp1 = EXOP (if exception occurred)				#
#									#
# ALGORITHM ***********************************************************	#
#	Handle NANs, infinities, and zeroes as special cases. Divide	#
# norms/denorms into ext/sgl/dbl precision.				#
#	For norms/denorms, scale the exponents such that a divide	#
# instruction won't cause an exception. Use the regular fdiv to		#
# compute a result. Check if the regular operands would have taken	#
# an exception. If so, return the default overflow/underflow result	#
# and return the EXOP if exceptions are enabled. Else, scale the 	#
# result operand to the proper exponent.				#
#									#
#########################################################################

	align		0x10
tbl_fdiv_unfl:
	long		0x3fff - 0x0000		# ext_unfl
	long		0x3fff - 0x3f81		# sgl_unfl
	long		0x3fff - 0x3c01		# dbl_unfl

tbl_fdiv_ovfl:
	long		0x3fff - 0x7ffe		# ext overflow exponent
	long		0x3fff - 0x407e		# sgl overflow exponent
	long		0x3fff - 0x43fe		# dbl overflow exponent

	global		fsdiv
fsdiv:
	andi.b		&0x30,%d0		# clear rnd prec
	ori.b		&s_mode*0x10,%d0	# insert sgl prec
	bra.b		fdiv

	global		fddiv
fddiv:
	andi.b		&0x30,%d0		# clear rnd prec
	ori.b		&d_mode*0x10,%d0	# insert dbl prec

	global		fdiv
fdiv:
	mov.l		%d0,L_SCR3(%a6)		# store rnd info

	clr.w		%d1
	mov.b		DTAG(%a6),%d1
	lsl.b		&0x3,%d1
	or.b		STAG(%a6),%d1		# combine src tags

	bne.w		fdiv_not_norm		# optimize on non-norm input
		
#
# DIVIDE: NORMs and DENORMs ONLY!
#
fdiv_norm:
	mov.w		DST_EX(%a1),FP_SCR1_EX(%a6)
	mov.l		DST_HI(%a1),FP_SCR1_HI(%a6)
	mov.l		DST_LO(%a1),FP_SCR1_LO(%a6)

	mov.w		SRC_EX(%a0),FP_SCR0_EX(%a6)
	mov.l		SRC_HI(%a0),FP_SCR0_HI(%a6)
	mov.l		SRC_LO(%a0),FP_SCR0_LO(%a6)

	bsr.l		scale_to_zero_src	# scale src exponent
	mov.l		%d0,-(%sp)		# save scale factor 1

	bsr.l		scale_to_zero_dst	# scale dst exponent

	neg.l		(%sp)			# SCALE FACTOR = scale1 - scale2
	add.l		%d0,(%sp)

	mov.w		2+L_SCR3(%a6),%d1	# fetch precision
	lsr.b		&0x6,%d1		# shift to lo bits
	mov.l		(%sp)+,%d0		# load S.F.
	cmp.l		%d0,(tbl_fdiv_ovfl.b,%pc,%d1.w*4) # will result overflow?
	ble.w		fdiv_may_ovfl		# result will overflow

	cmp.l		%d0,(tbl_fdiv_unfl.w,%pc,%d1.w*4) # will result underflow?
	beq.w		fdiv_may_unfl		# maybe
	bgt.w		fdiv_unfl		# yes; go handle underflow

fdiv_normal:
	fmovm.x		FP_SCR1(%a6),&0x80	# load dst op

	fmov.l		L_SCR3(%a6),%fpcr	# save FPCR
	fmov.l		&0x0,%fpsr		# clear FPSR

	fdiv.x		FP_SCR0(%a6),%fp0	# perform divide

	fmov.l		%fpsr,%d1		# save FPSR
	fmov.l		&0x0,%fpcr		# clear FPCR

	or.l		%d1,USER_FPSR(%a6)	# save INEX2,N

fdiv_normal_exit:
	fmovm.x		&0x80,FP_SCR0(%a6)	# store result on stack
	mov.l		%d2,-(%sp)		# store d2
	mov.w		FP_SCR0_EX(%a6),%d1	# load {sgn,exp}
	mov.l		%d1,%d2			# make a copy
	andi.l		&0x7fff,%d1		# strip sign
	andi.w		&0x8000,%d2		# keep old sign
	sub.l		%d0,%d1			# add scale factor
	or.w		%d2,%d1			# concat old sign,new exp
	mov.w		%d1,FP_SCR0_EX(%a6)	# insert new exponent
	mov.l		(%sp)+,%d2		# restore d2
	fmovm.x		FP_SCR0(%a6),&0x80	# return result in fp0
	rts

tbl_fdiv_ovfl2:
	long		0x7fff
	long		0x407f
	long		0x43ff

fdiv_no_ovfl:
	mov.l		(%sp)+,%d0		# restore scale factor
	bra.b		fdiv_normal_exit
	
fdiv_may_ovfl:
	mov.l		%d0,-(%sp)		# save scale factor

	fmovm.x		FP_SCR1(%a6),&0x80	# load dst op

	fmov.l		L_SCR3(%a6),%fpcr	# set FPCR
	fmov.l		&0x0,%fpsr		# set FPSR

	fdiv.x		FP_SCR0(%a6),%fp0	# execute divide

	fmov.l		%fpsr,%d0
	fmov.l		&0x0,%fpcr

	or.l		%d0,USER_FPSR(%a6)	# save INEX,N

	fmovm.x		&0x01,-(%sp)		# save result to stack
	mov.w		(%sp),%d0		# fetch new exponent
	add.l		&0xc,%sp		# clear result from stack
	andi.l		&0x7fff,%d0		# strip sign
	sub.l		(%sp),%d0		# add scale factor
	cmp.l		%d0,(tbl_fdiv_ovfl2.b,%pc,%d1.w*4)
	blt.b		fdiv_no_ovfl
	mov.l		(%sp)+,%d0

fdiv_ovfl_tst:
	or.l		&ovfl_inx_mask,USER_FPSR(%a6) # set ovfl/aovfl/ainex

	mov.b		FPCR_ENABLE(%a6),%d1
	andi.b		&0x13,%d1		# is OVFL or INEX enabled?
	bne.b		fdiv_ovfl_ena		# yes

fdiv_ovfl_dis:
	btst		&neg_bit,FPSR_CC(%a6) 	# is result negative?
	sne		%d1			# set sign param accordingly
	mov.l		L_SCR3(%a6),%d0		# pass prec:rnd
	bsr.l		ovf_res			# calculate default result
	or.b		%d0,FPSR_CC(%a6)	# set INF if applicable
	fmovm.x		(%a0),&0x80		# return default result in fp0
	rts

fdiv_ovfl_ena:
	mov.l		L_SCR3(%a6),%d1
	andi.b		&0xc0,%d1		# is precision extended?
	bne.b		fdiv_ovfl_ena_sd	# no, do sgl or dbl

fdiv_ovfl_ena_cont:
	fmovm.x		&0x80,FP_SCR0(%a6)	# move result to stack

	mov.l		%d2,-(%sp)		# save d2
	mov.w		FP_SCR0_EX(%a6),%d1	# fetch {sgn,exp}
	mov.w		%d1,%d2			# make a copy
	andi.l		&0x7fff,%d1		# strip sign
	sub.l		%d0,%d1			# add scale factor
	subi.l		&0x6000,%d1		# subtract bias
	andi.w		&0x7fff,%d1		# clear sign bit
	andi.w		&0x8000,%d2		# keep old sign
	or.w		%d2,%d1			# concat old sign,new exp
	mov.w		%d1,FP_SCR0_EX(%a6)	# insert new exponent
	mov.l		(%sp)+,%d2		# restore d2
	fmovm.x		FP_SCR0(%a6),&0x40	# return EXOP in fp1
	bra.b		fdiv_ovfl_dis

fdiv_ovfl_ena_sd:
	fmovm.x		FP_SCR1(%a6),&0x80	# load dst operand

	mov.l		L_SCR3(%a6),%d1
	andi.b		&0x30,%d1		# keep rnd mode
	fmov.l		%d1,%fpcr		# set FPCR

	fdiv.x		FP_SCR0(%a6),%fp0	# execute divide

	fmov.l		&0x0,%fpcr		# clear FPCR
	bra.b		fdiv_ovfl_ena_cont

fdiv_unfl:
	bset		&unfl_bit,FPSR_EXCEPT(%a6) # set unfl exc bit

	fmovm.x		FP_SCR1(%a6),&0x80	# load dst op

	fmov.l		&rz_mode*0x10,%fpcr	# set FPCR
	fmov.l		&0x0,%fpsr		# clear FPSR

	fdiv.x		FP_SCR0(%a6),%fp0	# execute divide

	fmov.l		%fpsr,%d1		# save status
	fmov.l		&0x0,%fpcr		# clear FPCR

	or.l		%d1,USER_FPSR(%a6)	# save INEX2,N

	mov.b		FPCR_ENABLE(%a6),%d1
	andi.b		&0x0b,%d1		# is UNFL or INEX enabled?
	bne.b		fdiv_unfl_ena		# yes

fdiv_unfl_dis:
	fmovm.x		&0x80,FP_SCR0(%a6)	# store out result

	lea		FP_SCR0(%a6),%a0	# pass: result addr
	mov.l		L_SCR3(%a6),%d1		# pass: rnd prec,mode
	bsr.l		unf_res			# calculate default result
	or.b		%d0,FPSR_CC(%a6)	# 'Z' may have been set
	fmovm.x		FP_SCR0(%a6),&0x80	# return default result in fp0
	rts

#
# UNFL is enabled. 
#
fdiv_unfl_ena:
	fmovm.x		FP_SCR1(%a6),&0x40	# load dst op

	mov.l		L_SCR3(%a6),%d1
	andi.b		&0xc0,%d1		# is precision extended?
	bne.b		fdiv_unfl_ena_sd	# no, sgl or dbl

	fmov.l		L_SCR3(%a6),%fpcr	# set FPCR

fdiv_unfl_ena_cont:
	fmov.l		&0x0,%fpsr		# clear FPSR

	fdiv.x		FP_SCR0(%a6),%fp1	# execute divide

	fmov.l		&0x0,%fpcr		# clear FPCR

	fmovm.x		&0x40,FP_SCR0(%a6)	# save result to stack
	mov.l		%d2,-(%sp)		# save d2
	mov.w		FP_SCR0_EX(%a6),%d1	# fetch {sgn,exp}
	mov.l		%d1,%d2			# make a copy
	andi.l		&0x7fff,%d1		# strip sign
	andi.w		&0x8000,%d2		# keep old sign
	sub.l		%d0,%d1			# add scale factoer
	addi.l		&0x6000,%d1		# add bias
	andi.w		&0x7fff,%d1
	or.w		%d2,%d1			# concat old sign,new exp
	mov.w		%d1,FP_SCR0_EX(%a6)	# insert new exp
	mov.l		(%sp)+,%d2		# restore d2
	fmovm.x		FP_SCR0(%a6),&0x40	# return EXOP in fp1
	bra.w		fdiv_unfl_dis

fdiv_unfl_ena_sd:
	mov.l		L_SCR3(%a6),%d1
	andi.b		&0x30,%d1		# use only rnd mode
	fmov.l		%d1,%fpcr		# set FPCR

	bra.b		fdiv_unfl_ena_cont

#
# the divide operation MAY underflow:
#
fdiv_may_unfl:
	fmovm.x		FP_SCR1(%a6),&0x80	# load dst op

	fmov.l		L_SCR3(%a6),%fpcr	# set FPCR
	fmov.l		&0x0,%fpsr		# clear FPSR

	fdiv.x		FP_SCR0(%a6),%fp0	# execute divide

	fmov.l		%fpsr,%d1		# save status
	fmov.l		&0x0,%fpcr		# clear FPCR

	or.l		%d1,USER_FPSR(%a6)	# save INEX2,N

	fabs.x		%fp0,%fp1		# make a copy of result
	fcmp.b		%fp1,&0x1		# is |result| > 1.b?
	fbgt.w		fdiv_normal_exit	# no; no underflow occurred
	fblt.w		fdiv_unfl		# yes; underflow occurred

#
# we still don't know if underflow occurred. result is ~ equal to 1. but,
# we don't know if the result was an underflow that rounded up to a 1
# or a normalized number that rounded down to a 1. so, redo the entire 
# operation using RZ as the rounding mode to see what the pre-rounded 
# result is. this case should be relatively rare.
#
	fmovm.x		FP_SCR1(%a6),&0x40	# load dst op into fp1

	mov.l		L_SCR3(%a6),%d1
	andi.b		&0xc0,%d1		# keep rnd prec
	ori.b		&rz_mode*0x10,%d1	# insert RZ

	fmov.l		%d1,%fpcr		# set FPCR
	fmov.l		&0x0,%fpsr		# clear FPSR

	fdiv.x		FP_SCR0(%a6),%fp1	# execute divide

	fmov.l		&0x0,%fpcr		# clear FPCR
	fabs.x		%fp1			# make absolute value
	fcmp.b		%fp1,&0x1		# is |result| < 1.b?
	fbge.w		fdiv_normal_exit	# no; no underflow occurred
	bra.w		fdiv_unfl		# yes; underflow occurred

############################################################################

#
# Divide: inputs are not both normalized; what are they?
#
fdiv_not_norm:
	mov.w		(tbl_fdiv_op.b,%pc,%d1.w*2),%d1
	jmp		(tbl_fdiv_op.b,%pc,%d1.w*1)

	swbeg		&48
tbl_fdiv_op:
	short		fdiv_norm	- tbl_fdiv_op # NORM / NORM
	short		fdiv_inf_load	- tbl_fdiv_op # NORM / ZERO
	short		fdiv_zero_load	- tbl_fdiv_op # NORM / INF
	short		fdiv_res_qnan	- tbl_fdiv_op # NORM / QNAN
	short		fdiv_norm	- tbl_fdiv_op # NORM / DENORM
	short		fdiv_res_snan	- tbl_fdiv_op # NORM / SNAN
	short		tbl_fdiv_op	- tbl_fdiv_op #
	short		tbl_fdiv_op	- tbl_fdiv_op #

	short		fdiv_zero_load	- tbl_fdiv_op # ZERO / NORM
	short		fdiv_res_operr	- tbl_fdiv_op # ZERO / ZERO
	short		fdiv_zero_load	- tbl_fdiv_op # ZERO / INF
	short		fdiv_res_qnan	- tbl_fdiv_op # ZERO / QNAN
	short		fdiv_zero_load	- tbl_fdiv_op # ZERO / DENORM
	short		fdiv_res_snan	- tbl_fdiv_op # ZERO / SNAN
	short		tbl_fdiv_op	- tbl_fdiv_op #
	short		tbl_fdiv_op	- tbl_fdiv_op #

	short		fdiv_inf_dst	- tbl_fdiv_op # INF / NORM
	short		fdiv_inf_dst	- tbl_fdiv_op # INF / ZERO
	short		fdiv_res_operr	- tbl_fdiv_op # INF / INF
	short		fdiv_res_qnan	- tbl_fdiv_op # INF / QNAN
	short		fdiv_inf_dst	- tbl_fdiv_op # INF / DENORM
	short		fdiv_res_snan	- tbl_fdiv_op # INF / SNAN
	short		tbl_fdiv_op	- tbl_fdiv_op #
	short		tbl_fdiv_op	- tbl_fdiv_op #

	short		fdiv_res_qnan	- tbl_fdiv_op # QNAN / NORM
	short		fdiv_res_qnan	- tbl_fdiv_op # QNAN / ZERO
	short		fdiv_res_qnan	- tbl_fdiv_op # QNAN / INF
	short		fdiv_res_qnan	- tbl_fdiv_op # QNAN / QNAN
	short		fdiv_res_qnan	- tbl_fdiv_op # QNAN / DENORM
	short		fdiv_res_snan	- tbl_fdiv_op # QNAN / SNAN
	short		tbl_fdiv_op	- tbl_fdiv_op #
	short		tbl_fdiv_op	- tbl_fdiv_op #

	short		fdiv_norm	- tbl_fdiv_op # DENORM / NORM
	short		fdiv_inf_load	- tbl_fdiv_op # DENORM / ZERO
	short		fdiv_zero_load	- tbl_fdiv_op # DENORM / INF
	short		fdiv_res_qnan	- tbl_fdiv_op # DENORM / QNAN
	short		fdiv_norm	- tbl_fdiv_op # DENORM / DENORM
	short		fdiv_res_snan	- tbl_fdiv_op # DENORM / SNAN
	short		tbl_fdiv_op	- tbl_fdiv_op #
	short		tbl_fdiv_op	- tbl_fdiv_op #

	short		fdiv_res_snan	- tbl_fdiv_op # SNAN / NORM
	short		fdiv_res_snan	- tbl_fdiv_op # SNAN / ZERO
	short		fdiv_res_snan	- tbl_fdiv_op # SNAN / INF
	short		fdiv_res_snan	- tbl_fdiv_op # SNAN / QNAN
	short		fdiv_res_snan	- tbl_fdiv_op # SNAN / DENORM
	short		fdiv_res_snan	- tbl_fdiv_op # SNAN / SNAN
	short		tbl_fdiv_op	- tbl_fdiv_op #
	short		tbl_fdiv_op	- tbl_fdiv_op #

fdiv_res_qnan:
	bra.l		res_qnan
fdiv_res_snan:
	bra.l		res_snan
fdiv_res_operr:
	bra.l		res_operr

	global		fdiv_zero_load		# global for fsgldiv
fdiv_zero_load:
	mov.b		SRC_EX(%a0),%d0		# result sign is exclusive
	mov.b		DST_EX(%a1),%d1		# or of input signs.
	eor.b		%d0,%d1
	bpl.b		fdiv_zero_load_p	# result is positive
	fmov.s		&0x80000000,%fp0	# load a -ZERO
	mov.b		&z_bmask+neg_bmask,FPSR_CC(%a6)	# set Z/N
	rts
fdiv_zero_load_p:
	fmov.s		&0x00000000,%fp0	# load a +ZERO
	mov.b		&z_bmask,FPSR_CC(%a6)	# set Z
	rts

#
# The destination was In Range and the source was a ZERO. The result,
# therefore, is an INF w/ the proper sign.
# So, determine the sign and return a new INF (w/ the j-bit cleared).
#
	global		fdiv_inf_load		# global for fsgldiv
fdiv_inf_load:
	ori.w		&dz_mask+adz_mask,2+USER_FPSR(%a6) # no; set DZ/ADZ
	mov.b		SRC_EX(%a0),%d0		# load both signs
	mov.b		DST_EX(%a1),%d1
	eor.b		%d0,%d1
	bpl.b		fdiv_inf_load_p		# result is positive
	fmov.s		&0xff800000,%fp0	# make result -INF
	mov.b		&inf_bmask+neg_bmask,FPSR_CC(%a6) # set INF/N
	rts
fdiv_inf_load_p:
	fmov.s		&0x7f800000,%fp0	# make result +INF
	mov.b		&inf_bmask,FPSR_CC(%a6)	# set INF
	rts

#
# The destination was an INF w/ an In Range or ZERO source, the result is 
# an INF w/ the proper sign. 
# The 68881/882 returns the destination INF w/ the new sign(if the j-bit of the
# dst INF is set, then then j-bit of the result INF is also set).
#
	global		fdiv_inf_dst		# global for fsgldiv
fdiv_inf_dst:
	mov.b		DST_EX(%a1),%d0		# load both signs
	mov.b		SRC_EX(%a0),%d1
	eor.b		%d0,%d1
	bpl.b		fdiv_inf_dst_p		# result is positive

	fmovm.x		DST(%a1),&0x80		# return result in fp0
	fabs.x		%fp0			# clear sign bit
	fneg.x		%fp0			# set sign bit
	mov.b		&inf_bmask+neg_bmask,FPSR_CC(%a6) # set INF/NEG
	rts

fdiv_inf_dst_p:
	fmovm.x		DST(%a1),&0x80		# return result in fp0
	fabs.x		%fp0			# return positive INF
	mov.b		&inf_bmask,FPSR_CC(%a6) # set INF
	rts

#########################################################################
# XDEF ****************************************************************	#
#	fneg(): emulates the fneg instruction				#
#	fsneg(): emulates the fsneg instruction				#
#	fdneg(): emulates the fdneg instruction				#
#									#
# XREF ****************************************************************	#
# 	norm() - normalize a denorm to provide EXOP			#
#	scale_to_zero_src() - scale sgl/dbl source exponent		#
#	ovf_res() - return default overflow result			#
#	unf_res() - return default underflow result			#
# 	res_qnan_1op() - return QNAN result				#
#	res_snan_1op() - return SNAN result				#
#									#
# INPUT ***************************************************************	#
#	a0 = pointer to extended precision source operand		#
#	d0 = rnd prec,mode						#
#									#
# OUTPUT **************************************************************	#
#	fp0 = result							#
#	fp1 = EXOP (if exception occurred)				#
#									#
# ALGORITHM ***********************************************************	#
#	Handle NANs, zeroes, and infinities as special cases. Separate	#
# norms/denorms into ext/sgl/dbl precisions. Extended precision can be	#
# emulated by simply setting sign bit. Sgl/dbl operands must be scaled	#
# and an actual fneg performed to see if overflow/underflow would have	#
# occurred. If so, return default underflow/overflow result. Else,	#
# scale the result exponent and return result. FPSR gets set based on	#
# the result value.							#
#									#
#########################################################################

	global		fsneg
fsneg:
	andi.b		&0x30,%d0		# clear rnd prec
	ori.b		&s_mode*0x10,%d0	# insert sgl precision
	bra.b		fneg

	global		fdneg
fdneg:
	andi.b		&0x30,%d0		# clear rnd prec
	ori.b		&d_mode*0x10,%d0	# insert dbl prec

	global		fneg
fneg:
	mov.l		%d0,L_SCR3(%a6)		# store rnd info
	mov.b		STAG(%a6),%d1
	bne.w		fneg_not_norm		# optimize on non-norm input
		
#
# NEGATE SIGN : norms and denorms ONLY!
#
fneg_norm:
	andi.b		&0xc0,%d0		# is precision extended?
	bne.w		fneg_not_ext		# no; go handle sgl or dbl

#
# precision selected is extended. so...we can not get an underflow
# or overflow because of rounding to the correct precision. so...
# skip the scaling and unscaling...
#
	mov.l		SRC_HI(%a0),FP_SCR0_HI(%a6)
	mov.l		SRC_LO(%a0),FP_SCR0_LO(%a6)
	mov.w		SRC_EX(%a0),%d0
	eori.w		&0x8000,%d0		# negate sign
	bpl.b		fneg_norm_load		# sign is positive
	mov.b		&neg_bmask,FPSR_CC(%a6)	# set 'N' ccode bit
fneg_norm_load:
	mov.w		%d0,FP_SCR0_EX(%a6)
	fmovm.x		FP_SCR0(%a6),&0x80	# return result in fp0
	rts

#
# for an extended precision DENORM, the UNFL exception bit is set
# the accrued bit is NOT set in this instance(no inexactness!)
#
fneg_denorm:
	andi.b		&0xc0,%d0		# is precision extended?
	bne.b		fneg_not_ext		# no; go handle sgl or dbl

	bset		&unfl_bit,FPSR_EXCEPT(%a6) # set unfl exc bit

	mov.l		SRC_HI(%a0),FP_SCR0_HI(%a6)
	mov.l		SRC_LO(%a0),FP_SCR0_LO(%a6)
	mov.w		SRC_EX(%a0),%d0
	eori.w		&0x8000,%d0		# negate sign
	bpl.b		fneg_denorm_done	# no
	mov.b		&neg_bmask,FPSR_CC(%a6)	# yes, set 'N' ccode bit
fneg_denorm_done:
	mov.w		%d0,FP_SCR0_EX(%a6)
	fmovm.x		FP_SCR0(%a6),&0x80	# return default result in fp0

	btst		&unfl_bit,FPCR_ENABLE(%a6) # is UNFL enabled?
	bne.b		fneg_ext_unfl_ena	# yes
	rts

#
# the input is an extended DENORM and underflow is enabled in the FPCR.
# normalize the mantissa and add the bias of 0x6000 to the resulting negative
# exponent and insert back into the operand.
#
fneg_ext_unfl_ena:
	lea		FP_SCR0(%a6),%a0	# pass: ptr to operand
	bsr.l		norm			# normalize result
	neg.w		%d0			# new exponent = -(shft val)
	addi.w		&0x6000,%d0		# add new bias to exponent
	mov.w		FP_SCR0_EX(%a6),%d1	# fetch old sign,exp
	andi.w		&0x8000,%d1	 	# keep old sign
	andi.w		&0x7fff,%d0		# clear sign position
	or.w		%d1,%d0			# concat old sign, new exponent
	mov.w		%d0,FP_SCR0_EX(%a6)	# insert new exponent
	fmovm.x		FP_SCR0(%a6),&0x40	# return EXOP in fp1
	rts

#
# operand is either single or double
#
fneg_not_ext:
	cmpi.b		%d0,&s_mode*0x10	# separate sgl/dbl prec
	bne.b		fneg_dbl

#
# operand is to be rounded to single precision
#
fneg_sgl:
	mov.w		SRC_EX(%a0),FP_SCR0_EX(%a6)
	mov.l		SRC_HI(%a0),FP_SCR0_HI(%a6)
	mov.l		SRC_LO(%a0),FP_SCR0_LO(%a6)
	bsr.l		scale_to_zero_src	# calculate scale factor

	cmpi.l		%d0,&0x3fff-0x3f80	# will move in underflow?
	bge.w		fneg_sd_unfl		# yes; go handle underflow
	cmpi.l		%d0,&0x3fff-0x407e	# will move in overflow?
	beq.w		fneg_sd_may_ovfl	# maybe; go check
	blt.w		fneg_sd_ovfl		# yes; go handle overflow

#
# operand will NOT overflow or underflow when moved in to the fp reg file
#
fneg_sd_normal:
	fmov.l		&0x0,%fpsr		# clear FPSR
	fmov.l		L_SCR3(%a6),%fpcr	# set FPCR

	fneg.x		FP_SCR0(%a6),%fp0	# perform negation

	fmov.l		%fpsr,%d1		# save FPSR
	fmov.l		&0x0,%fpcr		# clear FPCR

	or.l		%d1,USER_FPSR(%a6)	# save INEX2,N

fneg_sd_normal_exit:
	mov.l		%d2,-(%sp)		# save d2
	fmovm.x		&0x80,FP_SCR0(%a6)	# store out result
	mov.w		FP_SCR0_EX(%a6),%d1	# load sgn,exp
	mov.w		%d1,%d2			# make a copy
	andi.l		&0x7fff,%d1		# strip sign
	sub.l		%d0,%d1			# add scale factor
	andi.w		&0x8000,%d2		# keep old sign
	or.w		%d1,%d2			# concat old sign,new exp
	mov.w		%d2,FP_SCR0_EX(%a6)	# insert new exponent
	mov.l		(%sp)+,%d2		# restore d2
	fmovm.x		FP_SCR0(%a6),&0x80	# return result in fp0
	rts

#
# operand is to be rounded to double precision
#
fneg_dbl:
	mov.w		SRC_EX(%a0),FP_SCR0_EX(%a6)
	mov.l		SRC_HI(%a0),FP_SCR0_HI(%a6)
	mov.l		SRC_LO(%a0),FP_SCR0_LO(%a6)
	bsr.l		scale_to_zero_src	# calculate scale factor

	cmpi.l		%d0,&0x3fff-0x3c00	# will move in underflow?
	bge.b		fneg_sd_unfl		# yes; go handle underflow
	cmpi.l		%d0,&0x3fff-0x43fe	# will move in overflow?
	beq.w		fneg_sd_may_ovfl	# maybe; go check
	blt.w		fneg_sd_ovfl		# yes; go handle overflow
	bra.w		fneg_sd_normal		# no; ho handle normalized op

#
# operand WILL underflow when moved in to the fp register file
#
fneg_sd_unfl:
	bset		&unfl_bit,FPSR_EXCEPT(%a6) # set unfl exc bit

	eori.b		&0x80,FP_SCR0_EX(%a6)	# negate sign	
	bpl.b		fneg_sd_unfl_tst
	bset		&neg_bit,FPSR_CC(%a6)	# set 'N' ccode bit

# if underflow or inexact is enabled, go calculate EXOP first.
fneg_sd_unfl_tst:
	mov.b		FPCR_ENABLE(%a6),%d1
	andi.b		&0x0b,%d1		# is UNFL or INEX enabled?
	bne.b		fneg_sd_unfl_ena	# yes

fneg_sd_unfl_dis:
	lea		FP_SCR0(%a6),%a0	# pass: result addr
	mov.l		L_SCR3(%a6),%d1		# pass: rnd prec,mode
	bsr.l		unf_res			# calculate default result
	or.b		%d0,FPSR_CC(%a6)	# unf_res may have set 'Z'
	fmovm.x		FP_SCR0(%a6),&0x80	# return default result in fp0
	rts	

#
# operand will underflow AND underflow is enabled. 
# therefore, we must return the result rounded to extended precision.
#
fneg_sd_unfl_ena:
	mov.l		FP_SCR0_HI(%a6),FP_SCR1_HI(%a6)
	mov.l		FP_SCR0_LO(%a6),FP_SCR1_LO(%a6)
	mov.w		FP_SCR0_EX(%a6),%d1	# load current exponent

	mov.l		%d2,-(%sp)		# save d2
	mov.l		%d1,%d2			# make a copy
	andi.l		&0x7fff,%d1		# strip sign
	andi.w		&0x8000,%d2		# keep old sign
	sub.l		%d0,%d1			# subtract scale factor
	addi.l		&0x6000,%d1		# add new bias
	andi.w		&0x7fff,%d1
	or.w		%d2,%d1			# concat new sign,new exp
	mov.w		%d1,FP_SCR1_EX(%a6)	# insert new exp
	fmovm.x		FP_SCR1(%a6),&0x40	# return EXOP in fp1
	mov.l		(%sp)+,%d2		# restore d2
	bra.b		fneg_sd_unfl_dis

#
# operand WILL overflow.
#
fneg_sd_ovfl:
	fmov.l		&0x0,%fpsr		# clear FPSR
	fmov.l		L_SCR3(%a6),%fpcr	# set FPCR

	fneg.x		FP_SCR0(%a6),%fp0	# perform negation

	fmov.l		&0x0,%fpcr		# clear FPCR
	fmov.l		%fpsr,%d1		# save FPSR

	or.l		%d1,USER_FPSR(%a6)	# save INEX2,N

fneg_sd_ovfl_tst:
	or.l		&ovfl_inx_mask,USER_FPSR(%a6) # set ovfl/aovfl/ainex

	mov.b		FPCR_ENABLE(%a6),%d1
	andi.b		&0x13,%d1		# is OVFL or INEX enabled?
	bne.b		fneg_sd_ovfl_ena	# yes

#
# OVFL is not enabled; therefore, we must create the default result by
# calling ovf_res().
#
fneg_sd_ovfl_dis:
	btst		&neg_bit,FPSR_CC(%a6)	# is result negative?
	sne		%d1			# set sign param accordingly
	mov.l		L_SCR3(%a6),%d0		# pass: prec,mode
	bsr.l		ovf_res			# calculate default result
	or.b		%d0,FPSR_CC(%a6)	# set INF,N if applicable
	fmovm.x		(%a0),&0x80		# return default result in fp0
	rts

#
# OVFL is enabled.
# the INEX2 bit has already been updated by the round to the correct precision.
# now, round to extended(and don't alter the FPSR).
#
fneg_sd_ovfl_ena:
	mov.l		%d2,-(%sp)		# save d2
	mov.w		FP_SCR0_EX(%a6),%d1	# fetch {sgn,exp}
	mov.l		%d1,%d2			# make a copy
	andi.l		&0x7fff,%d1		# strip sign
	andi.w		&0x8000,%d2		# keep old sign
	sub.l		%d0,%d1			# add scale factor
	subi.l		&0x6000,%d1		# subtract bias
	andi.w		&0x7fff,%d1
	or.w		%d2,%d1			# concat sign,exp
	mov.w		%d1,FP_SCR0_EX(%a6)	# insert new exponent
	fmovm.x		FP_SCR0(%a6),&0x40	# return EXOP in fp1
	mov.l		(%sp)+,%d2		# restore d2
	bra.b		fneg_sd_ovfl_dis

#
# the move in MAY underflow. so...
#
fneg_sd_may_ovfl:
	fmov.l		&0x0,%fpsr		# clear FPSR
	fmov.l		L_SCR3(%a6),%fpcr	# set FPCR

	fneg.x		FP_SCR0(%a6),%fp0	# perform negation

	fmov.l		%fpsr,%d1		# save status
	fmov.l		&0x0,%fpcr		# clear FPCR

	or.l		%d1,USER_FPSR(%a6)	# save INEX2,N

	fabs.x		%fp0,%fp1		# make a copy of result
	fcmp.b		%fp1,&0x2		# is |result| >= 2.b?
	fbge.w		fneg_sd_ovfl_tst	# yes; overflow has occurred

# no, it didn't overflow; we have correct result
	bra.w		fneg_sd_normal_exit

##########################################################################

#
# input is not normalized; what is it?
#
fneg_not_norm:
	cmpi.b		%d1,&DENORM		# weed out DENORM
	beq.w		fneg_denorm
	cmpi.b		%d1,&SNAN		# weed out SNAN
	beq.l		res_snan_1op
	cmpi.b		%d1,&QNAN		# weed out QNAN
	beq.l		res_qnan_1op

#
# do the fneg; at this point, only possible ops are ZERO and INF.
# use fneg to determine ccodes.
# prec:mode should be zero at this point but it won't affect answer anyways.
#
	fneg.x		SRC_EX(%a0),%fp0	# do fneg
	fmov.l		%fpsr,%d0
	rol.l		&0x8,%d0		# put ccodes in lo byte
	mov.b		%d0,FPSR_CC(%a6)	# insert correct ccodes
	rts

#########################################################################
# XDEF ****************************************************************	#
# 	ftst(): emulates the ftest instruction				#
#									#
# XREF ****************************************************************	#
# 	res{s,q}nan_1op() - set NAN result for monadic instruction	#
#									#
# INPUT ***************************************************************	#
# 	a0 = pointer to extended precision source operand		#
#									#
# OUTPUT **************************************************************	#
#	none								#
#									#
# ALGORITHM ***********************************************************	#
# 	Check the source operand tag (STAG) and set the FPCR according	#
# to the operand type and sign.						#
#									#
#########################################################################

	global		ftst
ftst:
	mov.b		STAG(%a6),%d1
	bne.b		ftst_not_norm		# optimize on non-norm input
		
#
# Norm:
#
ftst_norm:
	tst.b		SRC_EX(%a0)		# is operand negative?
	bmi.b		ftst_norm_m		# yes
	rts
ftst_norm_m:
	mov.b		&neg_bmask,FPSR_CC(%a6)	# set 'N' ccode bit
	rts

#
# input is not normalized; what is it?
#
ftst_not_norm:
	cmpi.b		%d1,&ZERO		# weed out ZERO
	beq.b		ftst_zero
	cmpi.b		%d1,&INF		# weed out INF
	beq.b		ftst_inf
	cmpi.b		%d1,&SNAN		# weed out SNAN
	beq.l		res_snan_1op
	cmpi.b		%d1,&QNAN		# weed out QNAN
	beq.l		res_qnan_1op

#
# Denorm:
#
ftst_denorm:
	tst.b		SRC_EX(%a0)		# is operand negative?
	bmi.b		ftst_denorm_m		# yes
	rts
ftst_denorm_m:
	mov.b		&neg_bmask,FPSR_CC(%a6)	# set 'N' ccode bit
	rts

#
# Infinity:
#
ftst_inf:
	tst.b		SRC_EX(%a0)		# is operand negative?
	bmi.b		ftst_inf_m		# yes
ftst_inf_p:
	mov.b		&inf_bmask,FPSR_CC(%a6)	# set 'I' ccode bit
	rts
ftst_inf_m:
	mov.b		&inf_bmask+neg_bmask,FPSR_CC(%a6) # set 'I','N' ccode bits
	rts
	
#
# Zero:
#
ftst_zero:
	tst.b		SRC_EX(%a0)		# is operand negative?
	bmi.b		ftst_zero_m		# yes
ftst_zero_p:
	mov.b		&z_bmask,FPSR_CC(%a6)	# set 'N' ccode bit
	rts
ftst_zero_m:
	mov.b		&z_bmask+neg_bmask,FPSR_CC(%a6)	# set 'Z','N' ccode bits
	rts

#########################################################################
# XDEF ****************************************************************	#
#	fint(): emulates the fint instruction				#
#									#
# XREF ****************************************************************	#
#	res_{s,q}nan_1op() - set NAN result for monadic operation	#
#									#
# INPUT ***************************************************************	#
#	a0 = pointer to extended precision source operand		#
#	d0 = round precision/mode					#
#									#
# OUTPUT **************************************************************	#
#	fp0 = result							#
#									#
# ALGORITHM ***********************************************************	#
# 	Separate according to operand type. Unnorms don't pass through 	#
# here. For norms, load the rounding mode/prec, execute a "fint", then 	#
# store the resulting FPSR bits.					#
# 	For denorms, force the j-bit to a one and do the same as for	#
# norms. Denorms are so low that the answer will either be a zero or a 	#
# one.									#
# 	For zeroes/infs/NANs, return the same while setting the FPSR	#
# as appropriate.							#
#									#
#########################################################################

	global		fint
fint:
	mov.b		STAG(%a6),%d1
	bne.b		fint_not_norm		# optimize on non-norm input
		
#
# Norm:
#
fint_norm:
	andi.b		&0x30,%d0		# set prec = ext

	fmov.l		%d0,%fpcr		# set FPCR
	fmov.l		&0x0,%fpsr		# clear FPSR

	fint.x 		SRC(%a0),%fp0		# execute fint

	fmov.l		&0x0,%fpcr		# clear FPCR
	fmov.l		%fpsr,%d0		# save FPSR
	or.l		%d0,USER_FPSR(%a6)	# set exception bits

	rts

#
# input is not normalized; what is it?
#
fint_not_norm:
	cmpi.b		%d1,&ZERO		# weed out ZERO
	beq.b		fint_zero
	cmpi.b		%d1,&INF		# weed out INF
	beq.b		fint_inf
	cmpi.b		%d1,&DENORM		# weed out DENORM
	beq.b		fint_denorm
	cmpi.b		%d1,&SNAN		# weed out SNAN
	beq.l		res_snan_1op
	bra.l		res_qnan_1op		# weed out QNAN

#
# Denorm:
#
# for DENORMs, the result will be either (+/-)ZERO or (+/-)1.
# also, the INEX2 and AINEX exception bits will be set.
# so, we could either set these manually or force the DENORM
# to a very small NORM and ship it to the NORM routine.
# I do the latter.
#
fint_denorm:
	mov.w		SRC_EX(%a0),FP_SCR0_EX(%a6) # copy sign, zero exp
	mov.b		&0x80,FP_SCR0_HI(%a6)	# force DENORM ==> small NORM
	lea		FP_SCR0(%a6),%a0
	bra.b		fint_norm

#
# Zero:
#
fint_zero:
	tst.b		SRC_EX(%a0)		# is ZERO negative?
	bmi.b		fint_zero_m		# yes
fint_zero_p:
	fmov.s		&0x00000000,%fp0	# return +ZERO in fp0
	mov.b		&z_bmask,FPSR_CC(%a6)	# set 'Z' ccode bit
	rts
fint_zero_m:
	fmov.s		&0x80000000,%fp0	# return -ZERO in fp0
	mov.b		&z_bmask+neg_bmask,FPSR_CC(%a6) # set 'Z','N' ccode bits
	rts

#
# Infinity:
#
fint_inf:
	fmovm.x		SRC(%a0),&0x80		# return result in fp0
	tst.b		SRC_EX(%a0)		# is INF negative?
	bmi.b		fint_inf_m		# yes
fint_inf_p:
	mov.b		&inf_bmask,FPSR_CC(%a6)	# set 'I' ccode bit
	rts
fint_inf_m:
	mov.b		&inf_bmask+neg_bmask,FPSR_CC(%a6) # set 'N','I' ccode bits
	rts

#########################################################################
# XDEF ****************************************************************	#
#	fintrz(): emulates the fintrz instruction			#
#									#
# XREF ****************************************************************	#
#	res_{s,q}nan_1op() - set NAN result for monadic operation	#
#									#
# INPUT ***************************************************************	#
#	a0 = pointer to extended precision source operand		#
#	d0 = round precision/mode					#
#									#
# OUTPUT **************************************************************	#
# 	fp0 = result							#
#									#
# ALGORITHM ***********************************************************	#
#	Separate according to operand type. Unnorms don't pass through	#
# here. For norms, load the rounding mode/prec, execute a "fintrz", 	#
# then store the resulting FPSR bits.					#
# 	For denorms, force the j-bit to a one and do the same as for	#
# norms. Denorms are so low that the answer will either be a zero or a	#
# one.									#
# 	For zeroes/infs/NANs, return the same while setting the FPSR	#
# as appropriate.							#
#									#
#########################################################################

	global		fintrz
fintrz:
	mov.b		STAG(%a6),%d1
	bne.b		fintrz_not_norm		# optimize on non-norm input
		
#
# Norm:
#
fintrz_norm:
	fmov.l		&0x0,%fpsr		# clear FPSR

	fintrz.x	SRC(%a0),%fp0		# execute fintrz

	fmov.l		%fpsr,%d0		# save FPSR
	or.l		%d0,USER_FPSR(%a6)	# set exception bits

	rts

#
# input is not normalized; what is it?
#
fintrz_not_norm:
	cmpi.b		%d1,&ZERO		# weed out ZERO
	beq.b		fintrz_zero
	cmpi.b		%d1,&INF		# weed out INF
	beq.b		fintrz_inf
	cmpi.b		%d1,&DENORM		# weed out DENORM
	beq.b		fintrz_denorm
	cmpi.b		%d1,&SNAN		# weed out SNAN
	beq.l		res_snan_1op
	bra.l		res_qnan_1op		# weed out QNAN

#
# Denorm:
#
# for DENORMs, the result will be (+/-)ZERO.
# also, the INEX2 and AINEX exception bits will be set.
# so, we could either set these manually or force the DENORM
# to a very small NORM and ship it to the NORM routine.
# I do the latter.
#
fintrz_denorm:
	mov.w		SRC_EX(%a0),FP_SCR0_EX(%a6) # copy sign, zero exp
	mov.b		&0x80,FP_SCR0_HI(%a6)	# force DENORM ==> small NORM
	lea		FP_SCR0(%a6),%a0
	bra.b		fintrz_norm

#
# Zero:
#
fintrz_zero:
	tst.b		SRC_EX(%a0)		# is ZERO negative?
	bmi.b		fintrz_zero_m		# yes
fintrz_zero_p:
	fmov.s		&0x00000000,%fp0	# return +ZERO in fp0
	mov.b		&z_bmask,FPSR_CC(%a6)	# set 'Z' ccode bit
	rts
fintrz_zero_m:
	fmov.s		&0x80000000,%fp0	# return -ZERO in fp0
	mov.b		&z_bmask+neg_bmask,FPSR_CC(%a6) # set 'Z','N' ccode bits
	rts

#
# Infinity:
#
fintrz_inf:
	fmovm.x		SRC(%a0),&0x80		# return result in fp0
	tst.b		SRC_EX(%a0)		# is INF negative?
	bmi.b		fintrz_inf_m		# yes
fintrz_inf_p:
	mov.b		&inf_bmask,FPSR_CC(%a6)	# set 'I' ccode bit
	rts
fintrz_inf_m:
	mov.b		&inf_bmask+neg_bmask,FPSR_CC(%a6) # set 'N','I' ccode bits
	rts

#########################################################################
# XDEF ****************************************************************	#
#	fabs():  emulates the fabs instruction				#
#	fsabs(): emulates the fsabs instruction				#
#	fdabs(): emulates the fdabs instruction				#
#									#
# XREF **************************************************************** #
#	norm() - normalize denorm mantissa to provide EXOP		#
#	scale_to_zero_src() - make exponent. = 0; get scale factor	#
#	unf_res() - calculate underflow result				#
#	ovf_res() - calculate overflow result				#
#	res_{s,q}nan_1op() - set NAN result for monadic operation	#
#									#
# INPUT *************************************************************** #
#	a0 = pointer to extended precision source operand		#
#	d0 = rnd precision/mode						#
#									#
# OUTPUT ************************************************************** #
#	fp0 = result							#
#	fp1 = EXOP (if exception occurred)				#
#									#
# ALGORITHM ***********************************************************	#
#	Handle NANs, infinities, and zeroes as special cases. Divide	#
# norms into extended, single, and double precision. 			#
# 	Simply clear sign for extended precision norm. Ext prec denorm	#
# gets an EXOP created for it since it's an underflow.			#
#	Double and single precision can overflow and underflow. First,	#
# scale the operand such that the exponent is zero. Perform an "fabs"	#
# using the correct rnd mode/prec. Check to see if the original 	#
# exponent would take an exception. If so, use unf_res() or ovf_res()	#
# to calculate the default result. Also, create the EXOP for the	#
# exceptional case. If no exception should occur, insert the correct 	#
# result exponent and return.						#
# 	Unnorms don't pass through here.				#
#									#
#########################################################################

	global		fsabs
fsabs:
	andi.b		&0x30,%d0		# clear rnd prec
	ori.b		&s_mode*0x10,%d0	# insert sgl precision
	bra.b		fabs

	global		fdabs
fdabs:
	andi.b		&0x30,%d0		# clear rnd prec
	ori.b		&d_mode*0x10,%d0	# insert dbl precision

	global		fabs
fabs:
	mov.l		%d0,L_SCR3(%a6)		# store rnd info
	mov.b		STAG(%a6),%d1
	bne.w		fabs_not_norm		# optimize on non-norm input
		
#
# ABSOLUTE VALUE: norms and denorms ONLY!
#
fabs_norm:
	andi.b		&0xc0,%d0		# is precision extended?
	bne.b		fabs_not_ext		# no; go handle sgl or dbl

#
# precision selected is extended. so...we can not get an underflow
# or overflow because of rounding to the correct precision. so...
# skip the scaling and unscaling...
#
	mov.l		SRC_HI(%a0),FP_SCR0_HI(%a6)
	mov.l		SRC_LO(%a0),FP_SCR0_LO(%a6)
	mov.w		SRC_EX(%a0),%d1
	bclr		&15,%d1			# force absolute value
	mov.w		%d1,FP_SCR0_EX(%a6)	# insert exponent
	fmovm.x		FP_SCR0(%a6),&0x80	# return result in fp0
	rts

#
# for an extended precision DENORM, the UNFL exception bit is set
# the accrued bit is NOT set in this instance(no inexactness!)
#
fabs_denorm:
	andi.b		&0xc0,%d0		# is precision extended?
	bne.b		fabs_not_ext		# no

	bset		&unfl_bit,FPSR_EXCEPT(%a6) # set unfl exc bit

	mov.l		SRC_HI(%a0),FP_SCR0_HI(%a6)
	mov.l		SRC_LO(%a0),FP_SCR0_LO(%a6)
	mov.w		SRC_EX(%a0),%d0
	bclr		&15,%d0			# clear sign
	mov.w		%d0,FP_SCR0_EX(%a6)	# insert exponent

	fmovm.x		FP_SCR0(%a6),&0x80	# return default result in fp0

	btst		&unfl_bit,FPCR_ENABLE(%a6) # is UNFL enabled?
	bne.b		fabs_ext_unfl_ena
	rts

#
# the input is an extended DENORM and underflow is enabled in the FPCR.
# normalize the mantissa and add the bias of 0x6000 to the resulting negative
# exponent and insert back into the operand.
#
fabs_ext_unfl_ena:
	lea		FP_SCR0(%a6),%a0	# pass: ptr to operand
	bsr.l		norm			# normalize result
	neg.w		%d0			# new exponent = -(shft val)
	addi.w		&0x6000,%d0		# add new bias to exponent
	mov.w		FP_SCR0_EX(%a6),%d1	# fetch old sign,exp
	andi.w		&0x8000,%d1		# keep old sign
	andi.w		&0x7fff,%d0		# clear sign position
	or.w		%d1,%d0			# concat old sign, new exponent
	mov.w		%d0,FP_SCR0_EX(%a6)	# insert new exponent
	fmovm.x		FP_SCR0(%a6),&0x40	# return EXOP in fp1
	rts

#
# operand is either single or double
#
fabs_not_ext:
	cmpi.b		%d0,&s_mode*0x10	# separate sgl/dbl prec
	bne.b		fabs_dbl

#
# operand is to be rounded to single precision
#
fabs_sgl:
	mov.w		SRC_EX(%a0),FP_SCR0_EX(%a6)
	mov.l		SRC_HI(%a0),FP_SCR0_HI(%a6)
	mov.l		SRC_LO(%a0),FP_SCR0_LO(%a6)
	bsr.l		scale_to_zero_src	# calculate scale factor

	cmpi.l		%d0,&0x3fff-0x3f80	# will move in underflow?
	bge.w		fabs_sd_unfl		# yes; go handle underflow
	cmpi.l		%d0,&0x3fff-0x407e	# will move in overflow?
	beq.w		fabs_sd_may_ovfl	# maybe; go check
	blt.w		fabs_sd_ovfl		# yes; go handle overflow

#
# operand will NOT overflow or underflow when moved in to the fp reg file
#
fabs_sd_normal:
	fmov.l		&0x0,%fpsr		# clear FPSR
	fmov.l		L_SCR3(%a6),%fpcr	# set FPCR

	fabs.x		FP_SCR0(%a6),%fp0	# perform absolute

	fmov.l		%fpsr,%d1		# save FPSR
	fmov.l		&0x0,%fpcr		# clear FPCR

	or.l		%d1,USER_FPSR(%a6)	# save INEX2,N

fabs_sd_normal_exit:
	mov.l		%d2,-(%sp)		# save d2
	fmovm.x		&0x80,FP_SCR0(%a6)	# store out result
	mov.w		FP_SCR0_EX(%a6),%d1	# load sgn,exp
	mov.l		%d1,%d2			# make a copy
	andi.l		&0x7fff,%d1		# strip sign
	sub.l		%d0,%d1			# add scale factor
	andi.w		&0x8000,%d2		# keep old sign
	or.w		%d1,%d2			# concat old sign,new exp
	mov.w		%d2,FP_SCR0_EX(%a6)	# insert new exponent
	mov.l		(%sp)+,%d2		# restore d2
	fmovm.x		FP_SCR0(%a6),&0x80	# return result in fp0
	rts

#
# operand is to be rounded to double precision
#
fabs_dbl:
	mov.w		SRC_EX(%a0),FP_SCR0_EX(%a6)
	mov.l		SRC_HI(%a0),FP_SCR0_HI(%a6)
	mov.l		SRC_LO(%a0),FP_SCR0_LO(%a6)
	bsr.l		scale_to_zero_src	# calculate scale factor

	cmpi.l		%d0,&0x3fff-0x3c00	# will move in underflow?
	bge.b		fabs_sd_unfl		# yes; go handle underflow
	cmpi.l		%d0,&0x3fff-0x43fe	# will move in overflow?
	beq.w		fabs_sd_may_ovfl	# maybe; go check
	blt.w		fabs_sd_ovfl		# yes; go handle overflow
	bra.w		fabs_sd_normal		# no; ho handle normalized op

#
# operand WILL underflow when moved in to the fp register file
#
fabs_sd_unfl:
	bset		&unfl_bit,FPSR_EXCEPT(%a6) # set unfl exc bit

	bclr		&0x7,FP_SCR0_EX(%a6)	# force absolute value

# if underflow or inexact is enabled, go calculate EXOP first.
	mov.b		FPCR_ENABLE(%a6),%d1
	andi.b		&0x0b,%d1		# is UNFL or INEX enabled?
	bne.b		fabs_sd_unfl_ena	# yes

fabs_sd_unfl_dis:
	lea		FP_SCR0(%a6),%a0	# pass: result addr
	mov.l		L_SCR3(%a6),%d1		# pass: rnd prec,mode
	bsr.l		unf_res			# calculate default result
	or.b		%d0,FPSR_CC(%a6)	# set possible 'Z' ccode
	fmovm.x		FP_SCR0(%a6),&0x80	# return default result in fp0
	rts	

#
# operand will underflow AND underflow is enabled. 
# therefore, we must return the result rounded to extended precision.
#
fabs_sd_unfl_ena:
	mov.l		FP_SCR0_HI(%a6),FP_SCR1_HI(%a6)
	mov.l		FP_SCR0_LO(%a6),FP_SCR1_LO(%a6)
	mov.w		FP_SCR0_EX(%a6),%d1	# load current exponent

	mov.l		%d2,-(%sp)		# save d2
	mov.l		%d1,%d2			# make a copy
	andi.l		&0x7fff,%d1		# strip sign
	andi.w		&0x8000,%d2		# keep old sign
	sub.l		%d0,%d1			# subtract scale factor
	addi.l		&0x6000,%d1		# add new bias
	andi.w		&0x7fff,%d1
	or.w		%d2,%d1			# concat new sign,new exp
	mov.w		%d1,FP_SCR1_EX(%a6)	# insert new exp
	fmovm.x		FP_SCR1(%a6),&0x40	# return EXOP in fp1
	mov.l		(%sp)+,%d2		# restore d2
	bra.b		fabs_sd_unfl_dis

#
# operand WILL overflow.
#
fabs_sd_ovfl:
	fmov.l		&0x0,%fpsr		# clear FPSR
	fmov.l		L_SCR3(%a6),%fpcr	# set FPCR

	fabs.x		FP_SCR0(%a6),%fp0	# perform absolute

	fmov.l		&0x0,%fpcr		# clear FPCR
	fmov.l		%fpsr,%d1		# save FPSR

	or.l		%d1,USER_FPSR(%a6)	# save INEX2,N

fabs_sd_ovfl_tst:
	or.l		&ovfl_inx_mask,USER_FPSR(%a6) # set ovfl/aovfl/ainex

	mov.b		FPCR_ENABLE(%a6),%d1
	andi.b		&0x13,%d1		# is OVFL or INEX enabled?
	bne.b		fabs_sd_ovfl_ena	# yes

#
# OVFL is not enabled; therefore, we must create the default result by
# calling ovf_res().
#
fabs_sd_ovfl_dis:
	btst		&neg_bit,FPSR_CC(%a6)	# is result negative?
	sne		%d1			# set sign param accordingly
	mov.l		L_SCR3(%a6),%d0		# pass: prec,mode
	bsr.l		ovf_res			# calculate default result
	or.b		%d0,FPSR_CC(%a6)	# set INF,N if applicable
	fmovm.x		(%a0),&0x80		# return default result in fp0
	rts

#
# OVFL is enabled.
# the INEX2 bit has already been updated by the round to the correct precision.
# now, round to extended(and don't alter the FPSR).
#
fabs_sd_ovfl_ena:
	mov.l		%d2,-(%sp)		# save d2
	mov.w		FP_SCR0_EX(%a6),%d1	# fetch {sgn,exp}
	mov.l		%d1,%d2			# make a copy
	andi.l		&0x7fff,%d1		# strip sign
	andi.w		&0x8000,%d2		# keep old sign
	sub.l		%d0,%d1			# add scale factor
	subi.l		&0x6000,%d1		# subtract bias
	andi.w		&0x7fff,%d1
	or.w		%d2,%d1			# concat sign,exp
	mov.w		%d1,FP_SCR0_EX(%a6)	# insert new exponent
	fmovm.x		FP_SCR0(%a6),&0x40	# return EXOP in fp1
	mov.l		(%sp)+,%d2		# restore d2
	bra.b		fabs_sd_ovfl_dis

#
# the move in MAY underflow. so...
#
fabs_sd_may_ovfl:
	fmov.l		&0x0,%fpsr		# clear FPSR
	fmov.l		L_SCR3(%a6),%fpcr	# set FPCR

	fabs.x		FP_SCR0(%a6),%fp0	# perform absolute

	fmov.l		%fpsr,%d1		# save status
	fmov.l		&0x0,%fpcr		# clear FPCR

	or.l		%d1,USER_FPSR(%a6)	# save INEX2,N

	fabs.x		%fp0,%fp1		# make a copy of result
	fcmp.b		%fp1,&0x2		# is |result| >= 2.b?
	fbge.w		fabs_sd_ovfl_tst	# yes; overflow has occurred

# no, it didn't overflow; we have correct result
	bra.w		fabs_sd_normal_exit

##########################################################################

#
# input is not normalized; what is it?
#
fabs_not_norm:
	cmpi.b		%d1,&DENORM		# weed out DENORM
	beq.w		fabs_denorm
	cmpi.b		%d1,&SNAN		# weed out SNAN
	beq.l		res_snan_1op
	cmpi.b		%d1,&QNAN		# weed out QNAN
	beq.l		res_qnan_1op

	fabs.x		SRC(%a0),%fp0		# force absolute value

	cmpi.b		%d1,&INF		# weed out INF
	beq.b		fabs_inf
fabs_zero:
	mov.b		&z_bmask,FPSR_CC(%a6)	# set 'Z' ccode bit
	rts
fabs_inf:
	mov.b		&inf_bmask,FPSR_CC(%a6)	# set 'I' ccode bit
	rts

#########################################################################
# XDEF ****************************************************************	#
# 	fcmp(): fp compare op routine					#
#									#
# XREF ****************************************************************	#
# 	res_qnan() - return QNAN result					#
#	res_snan() - return SNAN result					#
#									#
# INPUT ***************************************************************	#
#	a0 = pointer to extended precision source operand		#
#	a1 = pointer to extended precision destination operand		#
#	d0 = round prec/mode						#
#									#
# OUTPUT ************************************************************** #
#	None								#
#									#
# ALGORITHM ***********************************************************	#
# 	Handle NANs and denorms as special cases. For everything else,	#
# just use the actual fcmp instruction to produce the correct condition	#
# codes.								#
#									#
#########################################################################

	global		fcmp
fcmp:
	clr.w		%d1
	mov.b		DTAG(%a6),%d1
	lsl.b		&0x3,%d1
	or.b		STAG(%a6),%d1
	bne.b		fcmp_not_norm		# optimize on non-norm input
		
#
# COMPARE FP OPs : NORMs, ZEROs, INFs, and "corrected" DENORMs
#
fcmp_norm:
	fmovm.x		DST(%a1),&0x80		# load dst op

	fcmp.x 		%fp0,SRC(%a0)		# do compare

	fmov.l		%fpsr,%d0		# save FPSR
	rol.l		&0x8,%d0		# extract ccode bits
	mov.b		%d0,FPSR_CC(%a6)	# set ccode bits(no exc bits are set)

	rts

#
# fcmp: inputs are not both normalized; what are they?
#
fcmp_not_norm:
	mov.w		(tbl_fcmp_op.b,%pc,%d1.w*2),%d1
	jmp		(tbl_fcmp_op.b,%pc,%d1.w*1)

	swbeg		&48
tbl_fcmp_op:
	short		fcmp_norm	- tbl_fcmp_op # NORM - NORM
	short		fcmp_norm	- tbl_fcmp_op # NORM - ZERO
	short		fcmp_norm	- tbl_fcmp_op # NORM - INF
	short		fcmp_res_qnan	- tbl_fcmp_op # NORM - QNAN
	short		fcmp_nrm_dnrm 	- tbl_fcmp_op # NORM - DENORM
	short		fcmp_res_snan	- tbl_fcmp_op # NORM - SNAN
	short		tbl_fcmp_op	- tbl_fcmp_op #
	short		tbl_fcmp_op	- tbl_fcmp_op #

	short		fcmp_norm	- tbl_fcmp_op # ZERO - NORM
	short		fcmp_norm	- tbl_fcmp_op # ZERO - ZERO
	short		fcmp_norm	- tbl_fcmp_op # ZERO - INF
	short		fcmp_res_qnan	- tbl_fcmp_op # ZERO - QNAN
	short		fcmp_dnrm_s	- tbl_fcmp_op # ZERO - DENORM
	short		fcmp_res_snan	- tbl_fcmp_op # ZERO - SNAN
	short		tbl_fcmp_op	- tbl_fcmp_op #
	short		tbl_fcmp_op	- tbl_fcmp_op #

	short		fcmp_norm	- tbl_fcmp_op # INF - NORM
	short		fcmp_norm	- tbl_fcmp_op # INF - ZERO
	short		fcmp_norm	- tbl_fcmp_op # INF - INF
	short		fcmp_res_qnan	- tbl_fcmp_op # INF - QNAN
	short		fcmp_dnrm_s	- tbl_fcmp_op # INF - DENORM
	short		fcmp_res_snan	- tbl_fcmp_op # INF - SNAN
	short		tbl_fcmp_op	- tbl_fcmp_op #
	short		tbl_fcmp_op	- tbl_fcmp_op #

	short		fcmp_res_qnan	- tbl_fcmp_op # QNAN - NORM
	short		fcmp_res_qnan	- tbl_fcmp_op # QNAN - ZERO
	short		fcmp_res_qnan	- tbl_fcmp_op # QNAN - INF
	short		fcmp_res_qnan	- tbl_fcmp_op # QNAN - QNAN
	short		fcmp_res_qnan	- tbl_fcmp_op # QNAN - DENORM
	short		fcmp_res_snan	- tbl_fcmp_op # QNAN - SNAN
	short		tbl_fcmp_op	- tbl_fcmp_op #
	short		tbl_fcmp_op	- tbl_fcmp_op #

	short		fcmp_dnrm_nrm	- tbl_fcmp_op # DENORM - NORM
	short		fcmp_dnrm_d	- tbl_fcmp_op # DENORM - ZERO
	short		fcmp_dnrm_d	- tbl_fcmp_op # DENORM - INF
	short		fcmp_res_qnan	- tbl_fcmp_op # DENORM - QNAN
	short		fcmp_dnrm_sd	- tbl_fcmp_op # DENORM - DENORM
	short		fcmp_res_snan	- tbl_fcmp_op # DENORM - SNAN
	short		tbl_fcmp_op	- tbl_fcmp_op #
	short		tbl_fcmp_op	- tbl_fcmp_op #

	short		fcmp_res_snan	- tbl_fcmp_op # SNAN - NORM
	short		fcmp_res_snan	- tbl_fcmp_op # SNAN - ZERO
	short		fcmp_res_snan	- tbl_fcmp_op # SNAN - INF
	short		fcmp_res_snan	- tbl_fcmp_op # SNAN - QNAN
	short		fcmp_res_snan	- tbl_fcmp_op # SNAN - DENORM
	short		fcmp_res_snan	- tbl_fcmp_op # SNAN - SNAN
	short		tbl_fcmp_op	- tbl_fcmp_op #
	short		tbl_fcmp_op	- tbl_fcmp_op #

# unlike all other functions for QNAN and SNAN, fcmp does NOT set the
# 'N' bit for a negative QNAN or SNAN input so we must squelch it here.
fcmp_res_qnan:
	bsr.l		res_qnan
	andi.b		&0xf7,FPSR_CC(%a6)
	rts
fcmp_res_snan:
	bsr.l		res_snan
	andi.b		&0xf7,FPSR_CC(%a6)
	rts

#
# DENORMs are a little more difficult. 
# If you have a 2 DENORMs, then you can just force the j-bit to a one 
# and use the fcmp_norm routine.
# If you have a DENORM and an INF or ZERO, just force the DENORM's j-bit to a one
# and use the fcmp_norm routine.
# If you have a DENORM and a NORM with opposite signs, then use fcmp_norm, also.
# But with a DENORM and a NORM of the same sign, the neg bit is set if the
# (1) signs are (+) and the DENORM is the dst or
# (2) signs are (-) and the DENORM is the src
#

fcmp_dnrm_s:
	mov.w		SRC_EX(%a0),FP_SCR0_EX(%a6)
	mov.l		SRC_HI(%a0),%d0
	bset		&31,%d0			# DENORM src; make into small norm
	mov.l		%d0,FP_SCR0_HI(%a6)
	mov.l		SRC_LO(%a0),FP_SCR0_LO(%a6)
	lea		FP_SCR0(%a6),%a0
	bra.w		fcmp_norm

fcmp_dnrm_d:
	mov.l		DST_EX(%a1),FP_SCR0_EX(%a6)
	mov.l		DST_HI(%a1),%d0
	bset		&31,%d0			# DENORM src; make into small norm
	mov.l		%d0,FP_SCR0_HI(%a6)
	mov.l		DST_LO(%a1),FP_SCR0_LO(%a6)
	lea		FP_SCR0(%a6),%a1
	bra.w		fcmp_norm

fcmp_dnrm_sd:
	mov.w		DST_EX(%a1),FP_SCR1_EX(%a6)
	mov.w		SRC_EX(%a0),FP_SCR0_EX(%a6)
	mov.l		DST_HI(%a1),%d0
	bset		&31,%d0			# DENORM dst; make into small norm
	mov.l		%d0,FP_SCR1_HI(%a6)
	mov.l		SRC_HI(%a0),%d0
	bset		&31,%d0			# DENORM dst; make into small norm
	mov.l		%d0,FP_SCR0_HI(%a6)
	mov.l		DST_LO(%a1),FP_SCR1_LO(%a6)
	mov.l		SRC_LO(%a0),FP_SCR0_LO(%a6)
	lea		FP_SCR1(%a6),%a1
	lea		FP_SCR0(%a6),%a0
	bra.w		fcmp_norm	

fcmp_nrm_dnrm:
	mov.b		SRC_EX(%a0),%d0		# determine if like signs
	mov.b		DST_EX(%a1),%d1
	eor.b		%d0,%d1
	bmi.w		fcmp_dnrm_s

# signs are the same, so must determine the answer ourselves.
	tst.b		%d0			# is src op negative?
	bmi.b		fcmp_nrm_dnrm_m		# yes
	rts
fcmp_nrm_dnrm_m:
	mov.b		&neg_bmask,FPSR_CC(%a6)	# set 'Z' ccode bit
	rts

fcmp_dnrm_nrm:
	mov.b		SRC_EX(%a0),%d0		# determine if like signs
	mov.b		DST_EX(%a1),%d1
	eor.b		%d0,%d1
	bmi.w		fcmp_dnrm_d

# signs are the same, so must determine the answer ourselves.
	tst.b		%d0			# is src op negative?
	bpl.b		fcmp_dnrm_nrm_m		# no
	rts
fcmp_dnrm_nrm_m:
	mov.b		&neg_bmask,FPSR_CC(%a6)	# set 'Z' ccode bit
	rts

#########################################################################
# XDEF ****************************************************************	#
# 	fsglmul(): emulates the fsglmul instruction			#
#									#
# XREF ****************************************************************	#
#	scale_to_zero_src() - scale src exponent to zero		#
#	scale_to_zero_dst() - scale dst exponent to zero		#
#	unf_res4() - return default underflow result for sglop		#
#	ovf_res() - return default overflow result			#
# 	res_qnan() - return QNAN result					#
# 	res_snan() - return SNAN result					#
#									#
# INPUT ***************************************************************	#
#	a0 = pointer to extended precision source operand		#
#	a1 = pointer to extended precision destination operand		#
#	d0  rnd prec,mode						#
#									#
# OUTPUT **************************************************************	#
#	fp0 = result							#
#	fp1 = EXOP (if exception occurred)				#
#									#
# ALGORITHM ***********************************************************	#
#	Handle NANs, infinities, and zeroes as special cases. Divide	#
# norms/denorms into ext/sgl/dbl precision.				#
#	For norms/denorms, scale the exponents such that a multiply	#
# instruction won't cause an exception. Use the regular fsglmul to	#
# compute a result. Check if the regular operands would have taken	#
# an exception. If so, return the default overflow/underflow result	#
# and return the EXOP if exceptions are enabled. Else, scale the 	#
# result operand to the proper exponent.				#
#									#
#########################################################################

	global		fsglmul
fsglmul:
	mov.l		%d0,L_SCR3(%a6)		# store rnd info

	clr.w		%d1
	mov.b		DTAG(%a6),%d1
	lsl.b		&0x3,%d1
	or.b		STAG(%a6),%d1

	bne.w		fsglmul_not_norm	# optimize on non-norm input

fsglmul_norm:
	mov.w		DST_EX(%a1),FP_SCR1_EX(%a6)
	mov.l		DST_HI(%a1),FP_SCR1_HI(%a6)
	mov.l		DST_LO(%a1),FP_SCR1_LO(%a6)

	mov.w		SRC_EX(%a0),FP_SCR0_EX(%a6)
	mov.l		SRC_HI(%a0),FP_SCR0_HI(%a6)
	mov.l		SRC_LO(%a0),FP_SCR0_LO(%a6)

	bsr.l		scale_to_zero_src	# scale exponent
	mov.l		%d0,-(%sp)		# save scale factor 1

	bsr.l		scale_to_zero_dst	# scale dst exponent

	add.l		(%sp)+,%d0		# SCALE_FACTOR = scale1 + scale2

	cmpi.l		%d0,&0x3fff-0x7ffe 	# would result ovfl?
	beq.w		fsglmul_may_ovfl	# result may rnd to overflow
	blt.w		fsglmul_ovfl		# result will overflow

	cmpi.l		%d0,&0x3fff+0x0001 	# would result unfl?
	beq.w		fsglmul_may_unfl	# result may rnd to no unfl
	bgt.w		fsglmul_unfl		# result will underflow

fsglmul_normal:
	fmovm.x		FP_SCR1(%a6),&0x80	# load dst op

	fmov.l		L_SCR3(%a6),%fpcr	# set FPCR
	fmov.l		&0x0,%fpsr		# clear FPSR

	fsglmul.x	FP_SCR0(%a6),%fp0	# execute sgl multiply

	fmov.l		%fpsr,%d1		# save status
	fmov.l		&0x0,%fpcr		# clear FPCR

	or.l		%d1,USER_FPSR(%a6)	# save INEX2,N

fsglmul_normal_exit:
	fmovm.x		&0x80,FP_SCR0(%a6)	# store out result
	mov.l		%d2,-(%sp)		# save d2
	mov.w		FP_SCR0_EX(%a6),%d1	# load {sgn,exp}
	mov.l		%d1,%d2			# make a copy
	andi.l		&0x7fff,%d1		# strip sign
	andi.w		&0x8000,%d2		# keep old sign
	sub.l		%d0,%d1			# add scale factor
	or.w		%d2,%d1			# concat old sign,new exp
	mov.w		%d1,FP_SCR0_EX(%a6)	# insert new exponent
	mov.l		(%sp)+,%d2		# restore d2
	fmovm.x		FP_SCR0(%a6),&0x80	# return result in fp0
	rts

fsglmul_ovfl:
	fmovm.x		FP_SCR1(%a6),&0x80	# load dst op

	fmov.l		L_SCR3(%a6),%fpcr	# set FPCR
	fmov.l		&0x0,%fpsr		# clear FPSR

	fsglmul.x	FP_SCR0(%a6),%fp0	# execute sgl multiply

	fmov.l		%fpsr,%d1		# save status
	fmov.l		&0x0,%fpcr		# clear FPCR

	or.l		%d1,USER_FPSR(%a6)	# save INEX2,N

fsglmul_ovfl_tst:

# save setting this until now because this is where fsglmul_may_ovfl may jump in
	or.l		&ovfl_inx_mask, USER_FPSR(%a6) # set ovfl/aovfl/ainex

	mov.b		FPCR_ENABLE(%a6),%d1
	andi.b		&0x13,%d1		# is OVFL or INEX enabled?
	bne.b		fsglmul_ovfl_ena	# yes

fsglmul_ovfl_dis:
	btst		&neg_bit,FPSR_CC(%a6)	# is result negative?
	sne		%d1			# set sign param accordingly
	mov.l		L_SCR3(%a6),%d0		# pass prec:rnd
	andi.b		&0x30,%d0		# force prec = ext
	bsr.l		ovf_res			# calculate default result
	or.b		%d0,FPSR_CC(%a6)	# set INF,N if applicable
	fmovm.x		(%a0),&0x80		# return default result in fp0
	rts

fsglmul_ovfl_ena:
	fmovm.x		&0x80,FP_SCR0(%a6)	# move result to stack

	mov.l		%d2,-(%sp)		# save d2
	mov.w		FP_SCR0_EX(%a6),%d1	# fetch {sgn,exp}
	mov.l		%d1,%d2			# make a copy
	andi.l		&0x7fff,%d1		# strip sign
	sub.l		%d0,%d1			# add scale factor
	subi.l		&0x6000,%d1		# subtract bias
	andi.w		&0x7fff,%d1
	andi.w		&0x8000,%d2		# keep old sign
	or.w		%d2,%d1			# concat old sign,new exp
	mov.w		%d1,FP_SCR0_EX(%a6)	# insert new exponent
	mov.l		(%sp)+,%d2		# restore d2
	fmovm.x		FP_SCR0(%a6),&0x40	# return EXOP in fp1
	bra.b		fsglmul_ovfl_dis

fsglmul_may_ovfl:
	fmovm.x		FP_SCR1(%a6),&0x80	# load dst op

	fmov.l		L_SCR3(%a6),%fpcr	# set FPCR
	fmov.l		&0x0,%fpsr		# clear FPSR

	fsglmul.x	FP_SCR0(%a6),%fp0	# execute sgl multiply
	
	fmov.l		%fpsr,%d1		# save status
	fmov.l		&0x0,%fpcr		# clear FPCR

	or.l		%d1,USER_FPSR(%a6)	# save INEX2,N

	fabs.x		%fp0,%fp1		# make a copy of result
	fcmp.b		%fp1,&0x2		# is |result| >= 2.b?
	fbge.w		fsglmul_ovfl_tst	# yes; overflow has occurred
	
# no, it didn't overflow; we have correct result
	bra.w		fsglmul_normal_exit

fsglmul_unfl:
	bset		&unfl_bit,FPSR_EXCEPT(%a6) # set unfl exc bit

	fmovm.x		FP_SCR1(%a6),&0x80	# load dst op

	fmov.l		&rz_mode*0x10,%fpcr	# set FPCR
	fmov.l		&0x0,%fpsr		# clear FPSR

	fsglmul.x	FP_SCR0(%a6),%fp0	# execute sgl multiply

	fmov.l		%fpsr,%d1		# save status
	fmov.l		&0x0,%fpcr		# clear FPCR

	or.l		%d1,USER_FPSR(%a6)	# save INEX2,N

	mov.b		FPCR_ENABLE(%a6),%d1
	andi.b		&0x0b,%d1		# is UNFL or INEX enabled?
	bne.b		fsglmul_unfl_ena	# yes

fsglmul_unfl_dis:
	fmovm.x		&0x80,FP_SCR0(%a6)	# store out result

	lea		FP_SCR0(%a6),%a0	# pass: result addr
	mov.l		L_SCR3(%a6),%d1		# pass: rnd prec,mode
	bsr.l		unf_res4		# calculate default result
	or.b		%d0,FPSR_CC(%a6)	# 'Z' bit may have been set
	fmovm.x		FP_SCR0(%a6),&0x80	# return default result in fp0
	rts

#
# UNFL is enabled. 
#
fsglmul_unfl_ena:
	fmovm.x		FP_SCR1(%a6),&0x40	# load dst op

	fmov.l		L_SCR3(%a6),%fpcr	# set FPCR
	fmov.l		&0x0,%fpsr		# clear FPSR

	fsglmul.x	FP_SCR0(%a6),%fp1	# execute sgl multiply	

	fmov.l		&0x0,%fpcr		# clear FPCR

	fmovm.x		&0x40,FP_SCR0(%a6)	# save result to stack
	mov.l		%d2,-(%sp)		# save d2
	mov.w		FP_SCR0_EX(%a6),%d1	# fetch {sgn,exp}
	mov.l		%d1,%d2			# make a copy
	andi.l		&0x7fff,%d1		# strip sign
	andi.w		&0x8000,%d2		# keep old sign
	sub.l		%d0,%d1			# add scale factor
	addi.l		&0x6000,%d1		# add bias
	andi.w		&0x7fff,%d1
	or.w		%d2,%d1			# concat old sign,new exp
	mov.w		%d1,FP_SCR0_EX(%a6)	# insert new exponent
	mov.l		(%sp)+,%d2		# restore d2
	fmovm.x		FP_SCR0(%a6),&0x40	# return EXOP in fp1
	bra.w		fsglmul_unfl_dis

fsglmul_may_unfl:
	fmovm.x		FP_SCR1(%a6),&0x80	# load dst op

	fmov.l		L_SCR3(%a6),%fpcr	# set FPCR
	fmov.l		&0x0,%fpsr		# clear FPSR

	fsglmul.x	FP_SCR0(%a6),%fp0	# execute sgl multiply	

	fmov.l		%fpsr,%d1		# save status
	fmov.l		&0x0,%fpcr		# clear FPCR

	or.l		%d1,USER_FPSR(%a6)	# save INEX2,N

	fabs.x		%fp0,%fp1		# make a copy of result
	fcmp.b		%fp1,&0x2		# is |result| > 2.b?
	fbgt.w		fsglmul_normal_exit	# no; no underflow occurred
	fblt.w		fsglmul_unfl		# yes; underflow occurred

#
# we still don't know if underflow occurred. result is ~ equal to 2. but,
# we don't know if the result was an underflow that rounded up to a 2 or
# a normalized number that rounded down to a 2. so, redo the entire operation
# using RZ as the rounding mode to see what the pre-rounded result is.
# this case should be relatively rare.
#
	fmovm.x		FP_SCR1(%a6),&0x40	# load dst op into fp1

	mov.l		L_SCR3(%a6),%d1
	andi.b		&0xc0,%d1		# keep rnd prec
	ori.b		&rz_mode*0x10,%d1	# insert RZ
	
	fmov.l		%d1,%fpcr		# set FPCR
	fmov.l		&0x0,%fpsr		# clear FPSR

	fsglmul.x	FP_SCR0(%a6),%fp1	# execute sgl multiply	

	fmov.l		&0x0,%fpcr		# clear FPCR
	fabs.x		%fp1			# make absolute value
	fcmp.b		%fp1,&0x2		# is |result| < 2.b?
	fbge.w		fsglmul_normal_exit	# no; no underflow occurred
	bra.w		fsglmul_unfl		# yes, underflow occurred

##############################################################################

#
# Single Precision Multiply: inputs are not both normalized; what are they?
#
fsglmul_not_norm:
	mov.w		(tbl_fsglmul_op.b,%pc,%d1.w*2),%d1
	jmp		(tbl_fsglmul_op.b,%pc,%d1.w*1)

	swbeg		&48
tbl_fsglmul_op:
	short		fsglmul_norm		- tbl_fsglmul_op # NORM x NORM
	short		fsglmul_zero		- tbl_fsglmul_op # NORM x ZERO
	short		fsglmul_inf_src		- tbl_fsglmul_op # NORM x INF
	short		fsglmul_res_qnan	- tbl_fsglmul_op # NORM x QNAN
	short		fsglmul_norm		- tbl_fsglmul_op # NORM x DENORM
	short		fsglmul_res_snan	- tbl_fsglmul_op # NORM x SNAN
	short		tbl_fsglmul_op		- tbl_fsglmul_op #
	short		tbl_fsglmul_op		- tbl_fsglmul_op #

	short		fsglmul_zero		- tbl_fsglmul_op # ZERO x NORM
	short		fsglmul_zero		- tbl_fsglmul_op # ZERO x ZERO
	short		fsglmul_res_operr	- tbl_fsglmul_op # ZERO x INF
	short		fsglmul_res_qnan	- tbl_fsglmul_op # ZERO x QNAN
	short		fsglmul_zero		- tbl_fsglmul_op # ZERO x DENORM
	short		fsglmul_res_snan	- tbl_fsglmul_op # ZERO x SNAN
	short		tbl_fsglmul_op		- tbl_fsglmul_op #
	short		tbl_fsglmul_op		- tbl_fsglmul_op #

	short		fsglmul_inf_dst		- tbl_fsglmul_op # INF x NORM
	short		fsglmul_res_operr	- tbl_fsglmul_op # INF x ZERO
	short		fsglmul_inf_dst		- tbl_fsglmul_op # INF x INF
	short		fsglmul_res_qnan	- tbl_fsglmul_op # INF x QNAN
	short		fsglmul_inf_dst		- tbl_fsglmul_op # INF x DENORM
	short		fsglmul_res_snan	- tbl_fsglmul_op # INF x SNAN
	short		tbl_fsglmul_op		- tbl_fsglmul_op #
	short		tbl_fsglmul_op		- tbl_fsglmul_op #

	short		fsglmul_res_qnan	- tbl_fsglmul_op # QNAN x NORM
	short		fsglmul_res_qnan	- tbl_fsglmul_op # QNAN x ZERO
	short		fsglmul_res_qnan	- tbl_fsglmul_op # QNAN x INF
	short		fsglmul_res_qnan	- tbl_fsglmul_op # QNAN x QNAN
	short		fsglmul_res_qnan	- tbl_fsglmul_op # QNAN x DENORM
	short		fsglmul_res_snan	- tbl_fsglmul_op # QNAN x SNAN
	short		tbl_fsglmul_op		- tbl_fsglmul_op #
	short		tbl_fsglmul_op		- tbl_fsglmul_op #

	short		fsglmul_norm		- tbl_fsglmul_op # NORM x NORM
	short		fsglmul_zero		- tbl_fsglmul_op # NORM x ZERO
	short		fsglmul_inf_src		- tbl_fsglmul_op # NORM x INF
	short		fsglmul_res_qnan	- tbl_fsglmul_op # NORM x QNAN
	short		fsglmul_norm		- tbl_fsglmul_op # NORM x DENORM
	short		fsglmul_res_snan	- tbl_fsglmul_op # NORM x SNAN
	short		tbl_fsglmul_op		- tbl_fsglmul_op #
	short		tbl_fsglmul_op		- tbl_fsglmul_op #

	short		fsglmul_res_snan	- tbl_fsglmul_op # SNAN x NORM
	short		fsglmul_res_snan	- tbl_fsglmul_op # SNAN x ZERO
	short		fsglmul_res_snan	- tbl_fsglmul_op # SNAN x INF
	short		fsglmul_res_snan	- tbl_fsglmul_op # SNAN x QNAN
	short		fsglmul_res_snan	- tbl_fsglmul_op # SNAN x DENORM
	short		fsglmul_res_snan	- tbl_fsglmul_op # SNAN x SNAN
	short		tbl_fsglmul_op		- tbl_fsglmul_op #
	short		tbl_fsglmul_op		- tbl_fsglmul_op #

fsglmul_res_operr:
	bra.l		res_operr
fsglmul_res_snan:
	bra.l		res_snan
fsglmul_res_qnan:
	bra.l		res_qnan
fsglmul_zero:
	bra.l		fmul_zero
fsglmul_inf_src:
	bra.l		fmul_inf_src
fsglmul_inf_dst:
	bra.l		fmul_inf_dst

#########################################################################
# XDEF ****************************************************************	#
# 	fsgldiv(): emulates the fsgldiv instruction			#
#									#
# XREF ****************************************************************	#
#	scale_to_zero_src() - scale src exponent to zero		#
#	scale_to_zero_dst() - scale dst exponent to zero		#
#	unf_res4() - return default underflow result for sglop		#
#	ovf_res() - return default overflow result			#
# 	res_qnan() - return QNAN result					#
# 	res_snan() - return SNAN result					#
#									#
# INPUT ***************************************************************	#
#	a0 = pointer to extended precision source operand		#
#	a1 = pointer to extended precision destination operand		#
#	d0  rnd prec,mode						#
#									#
# OUTPUT **************************************************************	#
#	fp0 = result							#
#	fp1 = EXOP (if exception occurred)				#
#									#
# ALGORITHM ***********************************************************	#
#	Handle NANs, infinities, and zeroes as special cases. Divide	#
# norms/denorms into ext/sgl/dbl precision.				#
#	For norms/denorms, scale the exponents such that a divide	#
# instruction won't cause an exception. Use the regular fsgldiv to	#
# compute a result. Check if the regular operands would have taken	#
# an exception. If so, return the default overflow/underflow result	#
# and return the EXOP if exceptions are enabled. Else, scale the 	#
# result operand to the proper exponent.				#
#									#
#########################################################################

	global		fsgldiv
fsgldiv:
	mov.l		%d0,L_SCR3(%a6)		# store rnd info

	clr.w		%d1
	mov.b		DTAG(%a6),%d1
	lsl.b		&0x3,%d1
	or.b		STAG(%a6),%d1		# combine src tags

	bne.w		fsgldiv_not_norm	# optimize on non-norm input
		
#
# DIVIDE: NORMs and DENORMs ONLY!
#
fsgldiv_norm:
	mov.w		DST_EX(%a1),FP_SCR1_EX(%a6)
	mov.l		DST_HI(%a1),FP_SCR1_HI(%a6)
	mov.l		DST_LO(%a1),FP_SCR1_LO(%a6)

	mov.w		SRC_EX(%a0),FP_SCR0_EX(%a6)
	mov.l		SRC_HI(%a0),FP_SCR0_HI(%a6)
	mov.l		SRC_LO(%a0),FP_SCR0_LO(%a6)

	bsr.l		scale_to_zero_src	# calculate scale factor 1
	mov.l		%d0,-(%sp)		# save scale factor 1

	bsr.l		scale_to_zero_dst	# calculate scale factor 2

	neg.l		(%sp)			# S.F. = scale1 - scale2
	add.l		%d0,(%sp)

	mov.w		2+L_SCR3(%a6),%d1	# fetch precision,mode
	lsr.b		&0x6,%d1
	mov.l		(%sp)+,%d0
	cmpi.l		%d0,&0x3fff-0x7ffe
	ble.w		fsgldiv_may_ovfl

	cmpi.l		%d0,&0x3fff-0x0000 	# will result underflow?
	beq.w		fsgldiv_may_unfl	# maybe
	bgt.w		fsgldiv_unfl		# yes; go handle underflow

fsgldiv_normal:
	fmovm.x		FP_SCR1(%a6),&0x80	# load dst op

	fmov.l		L_SCR3(%a6),%fpcr	# save FPCR
	fmov.l		&0x0,%fpsr		# clear FPSR

	fsgldiv.x	FP_SCR0(%a6),%fp0	# perform sgl divide

	fmov.l		%fpsr,%d1		# save FPSR
	fmov.l		&0x0,%fpcr		# clear FPCR

	or.l		%d1,USER_FPSR(%a6)	# save INEX2,N

fsgldiv_normal_exit:
	fmovm.x		&0x80,FP_SCR0(%a6)	# store result on stack
	mov.l		%d2,-(%sp)		# save d2
	mov.w		FP_SCR0_EX(%a6),%d1	# load {sgn,exp}
	mov.l		%d1,%d2			# make a copy
	andi.l		&0x7fff,%d1		# strip sign
	andi.w		&0x8000,%d2		# keep old sign
	sub.l		%d0,%d1			# add scale factor
	or.w		%d2,%d1			# concat old sign,new exp
	mov.w		%d1,FP_SCR0_EX(%a6)	# insert new exponent
	mov.l		(%sp)+,%d2		# restore d2
	fmovm.x		FP_SCR0(%a6),&0x80	# return result in fp0
	rts

fsgldiv_may_ovfl:
	fmovm.x		FP_SCR1(%a6),&0x80	# load dst op

	fmov.l		L_SCR3(%a6),%fpcr	# set FPCR
	fmov.l		&0x0,%fpsr		# set FPSR

	fsgldiv.x	FP_SCR0(%a6),%fp0	# execute divide

	fmov.l		%fpsr,%d1
	fmov.l		&0x0,%fpcr

	or.l		%d1,USER_FPSR(%a6)	# save INEX,N

	fmovm.x		&0x01,-(%sp)		# save result to stack
	mov.w		(%sp),%d1		# fetch new exponent
	add.l		&0xc,%sp		# clear result
	andi.l		&0x7fff,%d1		# strip sign
	sub.l		%d0,%d1			# add scale factor
	cmp.l		%d1,&0x7fff		# did divide overflow?
	blt.b		fsgldiv_normal_exit

fsgldiv_ovfl_tst:
	or.w		&ovfl_inx_mask,2+USER_FPSR(%a6) # set ovfl/aovfl/ainex

	mov.b		FPCR_ENABLE(%a6),%d1
	andi.b		&0x13,%d1		# is OVFL or INEX enabled?
	bne.b		fsgldiv_ovfl_ena	# yes

fsgldiv_ovfl_dis:
	btst		&neg_bit,FPSR_CC(%a6) 	# is result negative
	sne		%d1			# set sign param accordingly
	mov.l		L_SCR3(%a6),%d0		# pass prec:rnd
	andi.b		&0x30,%d0		# kill precision
	bsr.l		ovf_res			# calculate default result
	or.b		%d0,FPSR_CC(%a6)	# set INF if applicable
	fmovm.x		(%a0),&0x80		# return default result in fp0
	rts

fsgldiv_ovfl_ena:
	fmovm.x		&0x80,FP_SCR0(%a6)	# move result to stack

	mov.l		%d2,-(%sp)		# save d2
	mov.w		FP_SCR0_EX(%a6),%d1	# fetch {sgn,exp}
	mov.l		%d1,%d2			# make a copy
	andi.l		&0x7fff,%d1		# strip sign
	andi.w		&0x8000,%d2		# keep old sign
	sub.l		%d0,%d1			# add scale factor
	subi.l		&0x6000,%d1		# subtract new bias
	andi.w		&0x7fff,%d1		# clear ms bit
	or.w		%d2,%d1			# concat old sign,new exp
	mov.w		%d1,FP_SCR0_EX(%a6)	# insert new exponent
	mov.l		(%sp)+,%d2		# restore d2
	fmovm.x		FP_SCR0(%a6),&0x40	# return EXOP in fp1
	bra.b		fsgldiv_ovfl_dis

fsgldiv_unfl:
	bset		&unfl_bit,FPSR_EXCEPT(%a6) # set unfl exc bit

	fmovm.x		FP_SCR1(%a6),&0x80	# load dst op

	fmov.l		&rz_mode*0x10,%fpcr	# set FPCR
	fmov.l		&0x0,%fpsr		# clear FPSR

	fsgldiv.x	FP_SCR0(%a6),%fp0	# execute sgl divide

	fmov.l		%fpsr,%d1		# save status
	fmov.l		&0x0,%fpcr		# clear FPCR

	or.l		%d1,USER_FPSR(%a6)	# save INEX2,N

	mov.b		FPCR_ENABLE(%a6),%d1
	andi.b		&0x0b,%d1		# is UNFL or INEX enabled?
	bne.b		fsgldiv_unfl_ena	# yes

fsgldiv_unfl_dis:
	fmovm.x		&0x80,FP_SCR0(%a6)	# store out result

	lea		FP_SCR0(%a6),%a0	# pass: result addr
	mov.l		L_SCR3(%a6),%d1		# pass: rnd prec,mode
	bsr.l		unf_res4		# calculate default result
	or.b		%d0,FPSR_CC(%a6)	# 'Z' bit may have been set
	fmovm.x		FP_SCR0(%a6),&0x80	# return default result in fp0
	rts

#
# UNFL is enabled. 
#
fsgldiv_unfl_ena:
	fmovm.x		FP_SCR1(%a6),&0x40	# load dst op

	fmov.l		L_SCR3(%a6),%fpcr	# set FPCR
	fmov.l		&0x0,%fpsr		# clear FPSR

	fsgldiv.x	FP_SCR0(%a6),%fp1	# execute sgl divide

	fmov.l		&0x0,%fpcr		# clear FPCR

	fmovm.x		&0x40,FP_SCR0(%a6)	# save result to stack
	mov.l		%d2,-(%sp)		# save d2
	mov.w		FP_SCR0_EX(%a6),%d1	# fetch {sgn,exp}
	mov.l		%d1,%d2			# make a copy
	andi.l		&0x7fff,%d1		# strip sign
	andi.w		&0x8000,%d2		# keep old sign
	sub.l		%d0,%d1			# add scale factor
	addi.l		&0x6000,%d1		# add bias
	andi.w		&0x7fff,%d1		# clear top bit
	or.w		%d2,%d1			# concat old sign, new exp
	mov.w		%d1,FP_SCR0_EX(%a6)	# insert new exponent
	mov.l		(%sp)+,%d2		# restore d2
	fmovm.x		FP_SCR0(%a6),&0x40	# return EXOP in fp1
	bra.b		fsgldiv_unfl_dis

#
# the divide operation MAY underflow:
#
fsgldiv_may_unfl:
	fmovm.x		FP_SCR1(%a6),&0x80	# load dst op

	fmov.l		L_SCR3(%a6),%fpcr	# set FPCR
	fmov.l		&0x0,%fpsr		# clear FPSR

	fsgldiv.x	FP_SCR0(%a6),%fp0	# execute sgl divide

	fmov.l		%fpsr,%d1		# save status
	fmov.l		&0x0,%fpcr		# clear FPCR

	or.l		%d1,USER_FPSR(%a6)	# save INEX2,N

	fabs.x		%fp0,%fp1		# make a copy of result
	fcmp.b		%fp1,&0x1		# is |result| > 1.b?
	fbgt.w		fsgldiv_normal_exit	# no; no underflow occurred
	fblt.w		fsgldiv_unfl		# yes; underflow occurred

#
# we still don't know if underflow occurred. result is ~ equal to 1. but,
# we don't know if the result was an underflow that rounded up to a 1
# or a normalized number that rounded down to a 1. so, redo the entire 
# operation using RZ as the rounding mode to see what the pre-rounded 
# result is. this case should be relatively rare.
#
	fmovm.x		FP_SCR1(%a6),&0x40	# load dst op into %fp1

	clr.l		%d1			# clear scratch register
	ori.b		&rz_mode*0x10,%d1	# force RZ rnd mode

	fmov.l		%d1,%fpcr		# set FPCR
	fmov.l		&0x0,%fpsr		# clear FPSR

	fsgldiv.x	FP_SCR0(%a6),%fp1	# execute sgl divide

	fmov.l		&0x0,%fpcr		# clear FPCR
	fabs.x		%fp1			# make absolute value
	fcmp.b		%fp1,&0x1		# is |result| < 1.b?
	fbge.w		fsgldiv_normal_exit	# no; no underflow occurred
	bra.w		fsgldiv_unfl		# yes; underflow occurred

############################################################################

#
# Divide: inputs are not both normalized; what are they?
#
fsgldiv_not_norm:
	mov.w		(tbl_fsgldiv_op.b,%pc,%d1.w*2),%d1
	jmp		(tbl_fsgldiv_op.b,%pc,%d1.w*1)

	swbeg		&48
tbl_fsgldiv_op:
	short		fsgldiv_norm		- tbl_fsgldiv_op # NORM / NORM
	short		fsgldiv_inf_load	- tbl_fsgldiv_op # NORM / ZERO
	short		fsgldiv_zero_load	- tbl_fsgldiv_op # NORM / INF
	short		fsgldiv_res_qnan	- tbl_fsgldiv_op # NORM / QNAN
	short		fsgldiv_norm		- tbl_fsgldiv_op # NORM / DENORM
	short		fsgldiv_res_snan	- tbl_fsgldiv_op # NORM / SNAN
	short		tbl_fsgldiv_op		- tbl_fsgldiv_op #
	short		tbl_fsgldiv_op		- tbl_fsgldiv_op #

	short		fsgldiv_zero_load	- tbl_fsgldiv_op # ZERO / NORM
	short		fsgldiv_res_operr	- tbl_fsgldiv_op # ZERO / ZERO
	short		fsgldiv_zero_load	- tbl_fsgldiv_op # ZERO / INF
	short		fsgldiv_res_qnan	- tbl_fsgldiv_op # ZERO / QNAN
	short		fsgldiv_zero_load	- tbl_fsgldiv_op # ZERO / DENORM
	short		fsgldiv_res_snan	- tbl_fsgldiv_op # ZERO / SNAN
	short		tbl_fsgldiv_op		- tbl_fsgldiv_op #
	short		tbl_fsgldiv_op		- tbl_fsgldiv_op #

	short		fsgldiv_inf_dst		- tbl_fsgldiv_op # INF / NORM
	short		fsgldiv_inf_dst		- tbl_fsgldiv_op # INF / ZERO
	short		fsgldiv_res_operr	- tbl_fsgldiv_op # INF / INF
	short		fsgldiv_res_qnan	- tbl_fsgldiv_op # INF / QNAN
	short		fsgldiv_inf_dst		- tbl_fsgldiv_op # INF / DENORM
	short		fsgldiv_res_snan	- tbl_fsgldiv_op # INF / SNAN
	short		tbl_fsgldiv_op		- tbl_fsgldiv_op #
	short		tbl_fsgldiv_op		- tbl_fsgldiv_op #

	short		fsgldiv_res_qnan	- tbl_fsgldiv_op # QNAN / NORM
	short		fsgldiv_res_qnan	- tbl_fsgldiv_op # QNAN / ZERO
	short		fsgldiv_res_qnan	- tbl_fsgldiv_op # QNAN / INF
	short		fsgldiv_res_qnan	- tbl_fsgldiv_op # QNAN / QNAN
	short		fsgldiv_res_qnan	- tbl_fsgldiv_op # QNAN / DENORM
	short		fsgldiv_res_snan	- tbl_fsgldiv_op # QNAN / SNAN
	short		tbl_fsgldiv_op		- tbl_fsgldiv_op #
	short		tbl_fsgldiv_op		- tbl_fsgldiv_op #

	short		fsgldiv_norm		- tbl_fsgldiv_op # DENORM / NORM
	short		fsgldiv_inf_load	- tbl_fsgldiv_op # DENORM / ZERO
	short		fsgldiv_zero_load	- tbl_fsgldiv_op # DENORM / INF
	short		fsgldiv_res_qnan	- tbl_fsgldiv_op # DENORM / QNAN
	short		fsgldiv_norm		- tbl_fsgldiv_op # DENORM / DENORM
	short		fsgldiv_res_snan	- tbl_fsgldiv_op # DENORM / SNAN
	short		tbl_fsgldiv_op		- tbl_fsgldiv_op #
	short		tbl_fsgldiv_op		- tbl_fsgldiv_op #

	short		fsgldiv_res_snan	- tbl_fsgldiv_op # SNAN / NORM
	short		fsgldiv_res_snan	- tbl_fsgldiv_op # SNAN / ZERO
	short		fsgldiv_res_snan	- tbl_fsgldiv_op # SNAN / INF
	short		fsgldiv_res_snan	- tbl_fsgldiv_op # SNAN / QNAN
	short		fsgldiv_res_snan	- tbl_fsgldiv_op # SNAN / DENORM
	short		fsgldiv_res_snan	- tbl_fsgldiv_op # SNAN / SNAN
	short		tbl_fsgldiv_op		- tbl_fsgldiv_op #
	short		tbl_fsgldiv_op		- tbl_fsgldiv_op #

fsgldiv_res_qnan:
	bra.l		res_qnan
fsgldiv_res_snan:
	bra.l		res_snan
fsgldiv_res_operr:
	bra.l		res_operr
fsgldiv_inf_load:
	bra.l		fdiv_inf_load
fsgldiv_zero_load:
	bra.l		fdiv_zero_load
fsgldiv_inf_dst:
	bra.l		fdiv_inf_dst

#########################################################################
# XDEF ****************************************************************	#
#	fadd(): emulates the fadd instruction				#
#	fsadd(): emulates the fadd instruction				#
#	fdadd(): emulates the fdadd instruction				#
#									#
# XREF ****************************************************************	#
# 	addsub_scaler2() - scale the operands so they won't take exc	#
#	ovf_res() - return default overflow result			#
#	unf_res() - return default underflow result			#
#	res_qnan() - set QNAN result					#
# 	res_snan() - set SNAN result					#
#	res_operr() - set OPERR result					#
#	scale_to_zero_src() - set src operand exponent equal to zero	#
#	scale_to_zero_dst() - set dst operand exponent equal to zero	#
#									#
# INPUT ***************************************************************	#
#	a0 = pointer to extended precision source operand		#
# 	a1 = pointer to extended precision destination operand		#
#									#
# OUTPUT **************************************************************	#
#	fp0 = result							#
#	fp1 = EXOP (if exception occurred)				#
#									#
# ALGORITHM ***********************************************************	#
# 	Handle NANs, infinities, and zeroes as special cases. Divide	#
# norms into extended, single, and double precision.			#
#	Do addition after scaling exponents such that exception won't	#
# occur. Then, check result exponent to see if exception would have	#
# occurred. If so, return default result and maybe EXOP. Else, insert	#
# the correct result exponent and return. Set FPSR bits as appropriate.	#
#									#
#########################################################################

	global		fsadd
fsadd:
	andi.b		&0x30,%d0		# clear rnd prec
	ori.b		&s_mode*0x10,%d0	# insert sgl prec
	bra.b		fadd

	global		fdadd
fdadd:
	andi.b		&0x30,%d0		# clear rnd prec
	ori.b		&d_mode*0x10,%d0	# insert dbl prec

	global		fadd
fadd:
	mov.l		%d0,L_SCR3(%a6)		# store rnd info

	clr.w		%d1
	mov.b		DTAG(%a6),%d1
	lsl.b		&0x3,%d1
	or.b		STAG(%a6),%d1		# combine src tags

	bne.w		fadd_not_norm		# optimize on non-norm input

#
# ADD: norms and denorms
#
fadd_norm:
	bsr.l		addsub_scaler2		# scale exponents

fadd_zero_entry:
	fmovm.x		FP_SCR1(%a6),&0x80	# load dst op

	fmov.l		&0x0,%fpsr		# clear FPSR
	fmov.l		L_SCR3(%a6),%fpcr	# set FPCR

	fadd.x		FP_SCR0(%a6),%fp0	# execute add

	fmov.l		&0x0,%fpcr		# clear FPCR
	fmov.l		%fpsr,%d1		# fetch INEX2,N,Z

	or.l		%d1,USER_FPSR(%a6)	# save exc and ccode bits

	fbeq.w		fadd_zero_exit		# if result is zero, end now

	mov.l		%d2,-(%sp)		# save d2

	fmovm.x		&0x01,-(%sp)		# save result to stack

	mov.w		2+L_SCR3(%a6),%d1
	lsr.b		&0x6,%d1

	mov.w		(%sp),%d2		# fetch new sign, exp
	andi.l		&0x7fff,%d2		# strip sign
	sub.l		%d0,%d2			# add scale factor

	cmp.l		%d2,(tbl_fadd_ovfl.b,%pc,%d1.w*4) # is it an overflow?
	bge.b		fadd_ovfl		# yes

	cmp.l		%d2,(tbl_fadd_unfl.b,%pc,%d1.w*4) # is it an underflow?
	blt.w		fadd_unfl		# yes
	beq.w		fadd_may_unfl		# maybe; go find out

fadd_normal:
	mov.w		(%sp),%d1
	andi.w		&0x8000,%d1		# keep sign
	or.w		%d2,%d1			# concat sign,new exp
	mov.w		%d1,(%sp)		# insert new exponent

	fmovm.x		(%sp)+,&0x80		# return result in fp0

	mov.l		(%sp)+,%d2		# restore d2
	rts

fadd_zero_exit:
#	fmov.s		&0x00000000,%fp0	# return zero in fp0
	rts

tbl_fadd_ovfl:
	long		0x7fff			# ext ovfl
	long		0x407f			# sgl ovfl
	long		0x43ff			# dbl ovfl

tbl_fadd_unfl:
	long	        0x0000			# ext unfl
	long		0x3f81			# sgl unfl
	long		0x3c01			# dbl unfl

fadd_ovfl:
	or.l		&ovfl_inx_mask,USER_FPSR(%a6) # set ovfl/aovfl/ainex

	mov.b		FPCR_ENABLE(%a6),%d1
	andi.b		&0x13,%d1		# is OVFL or INEX enabled?
	bne.b		fadd_ovfl_ena		# yes

	add.l		&0xc,%sp
fadd_ovfl_dis:
	btst		&neg_bit,FPSR_CC(%a6)	# is result negative?
	sne		%d1			# set sign param accordingly
	mov.l		L_SCR3(%a6),%d0		# pass prec:rnd
	bsr.l		ovf_res			# calculate default result
	or.b		%d0,FPSR_CC(%a6)	# set INF,N if applicable
	fmovm.x		(%a0),&0x80		# return default result in fp0
	mov.l		(%sp)+,%d2		# restore d2
	rts

fadd_ovfl_ena:
	mov.b		L_SCR3(%a6),%d1
	andi.b		&0xc0,%d1		# is precision extended?
	bne.b		fadd_ovfl_ena_sd	# no; prec = sgl or dbl

fadd_ovfl_ena_cont:
	mov.w		(%sp),%d1
	andi.w		&0x8000,%d1		# keep sign
	subi.l		&0x6000,%d2		# add extra bias
	andi.w		&0x7fff,%d2
	or.w		%d2,%d1			# concat sign,new exp
	mov.w		%d1,(%sp)		# insert new exponent

	fmovm.x		(%sp)+,&0x40		# return EXOP in fp1
	bra.b		fadd_ovfl_dis

fadd_ovfl_ena_sd:
	fmovm.x		FP_SCR1(%a6),&0x80	# load dst op

	mov.l		L_SCR3(%a6),%d1
	andi.b		&0x30,%d1		# keep rnd mode
	fmov.l		%d1,%fpcr		# set FPCR

	fadd.x		FP_SCR0(%a6),%fp0	# execute add

	fmov.l		&0x0,%fpcr		# clear FPCR

	add.l		&0xc,%sp
	fmovm.x		&0x01,-(%sp)
	bra.b		fadd_ovfl_ena_cont

fadd_unfl:
	bset		&unfl_bit,FPSR_EXCEPT(%a6) # set unfl exc bit

	add.l		&0xc,%sp

	fmovm.x		FP_SCR1(%a6),&0x80	# load dst op

	fmov.l		&rz_mode*0x10,%fpcr	# set FPCR
	fmov.l		&0x0,%fpsr		# clear FPSR

	fadd.x		FP_SCR0(%a6),%fp0	# execute add

	fmov.l		&0x0,%fpcr		# clear FPCR
	fmov.l		%fpsr,%d1		# save status

	or.l		%d1,USER_FPSR(%a6)	# save INEX,N

	mov.b		FPCR_ENABLE(%a6),%d1
	andi.b		&0x0b,%d1		# is UNFL or INEX enabled?
	bne.b		fadd_unfl_ena		# yes

fadd_unfl_dis:
	fmovm.x		&0x80,FP_SCR0(%a6)	# store out result

	lea		FP_SCR0(%a6),%a0	# pass: result addr
	mov.l		L_SCR3(%a6),%d1		# pass: rnd prec,mode
	bsr.l		unf_res			# calculate default result
	or.b		%d0,FPSR_CC(%a6)	# 'Z' bit may have been set
	fmovm.x		FP_SCR0(%a6),&0x80	# return default result in fp0
	mov.l		(%sp)+,%d2		# restore d2
	rts

fadd_unfl_ena:
	fmovm.x		FP_SCR1(%a6),&0x40	# load dst op

	mov.l		L_SCR3(%a6),%d1
	andi.b		&0xc0,%d1		# is precision extended?
	bne.b		fadd_unfl_ena_sd	# no; sgl or dbl

	fmov.l		L_SCR3(%a6),%fpcr	# set FPCR

fadd_unfl_ena_cont:
	fmov.l		&0x0,%fpsr		# clear FPSR

	fadd.x		FP_SCR0(%a6),%fp1	# execute multiply

	fmov.l		&0x0,%fpcr		# clear FPCR

	fmovm.x		&0x40,FP_SCR0(%a6)	# save result to stack
	mov.w		FP_SCR0_EX(%a6),%d1	# fetch {sgn,exp}
	mov.l		%d1,%d2			# make a copy
	andi.l		&0x7fff,%d1		# strip sign
	andi.w		&0x8000,%d2		# keep old sign
	sub.l		%d0,%d1			# add scale factor
	addi.l		&0x6000,%d1		# add new bias
	andi.w		&0x7fff,%d1		# clear top bit
	or.w		%d2,%d1			# concat sign,new exp
	mov.w		%d1,FP_SCR0_EX(%a6)	# insert new exponent
	fmovm.x		FP_SCR0(%a6),&0x40	# return EXOP in fp1
	bra.w		fadd_unfl_dis

fadd_unfl_ena_sd:
	mov.l		L_SCR3(%a6),%d1
	andi.b		&0x30,%d1		# use only rnd mode
	fmov.l		%d1,%fpcr		# set FPCR

	bra.b		fadd_unfl_ena_cont

#
# result is equal to the smallest normalized number in the selected precision
# if the precision is extended, this result could not have come from an 
# underflow that rounded up.
#
fadd_may_unfl:
	mov.l		L_SCR3(%a6),%d1
	andi.b		&0xc0,%d1
	beq.w		fadd_normal		# yes; no underflow occurred

	mov.l		0x4(%sp),%d1		# extract hi(man)
	cmpi.l		%d1,&0x80000000		# is hi(man) = 0x80000000?
	bne.w		fadd_normal		# no; no underflow occurred

	tst.l		0x8(%sp)		# is lo(man) = 0x0?
	bne.w		fadd_normal		# no; no underflow occurred

	btst		&inex2_bit,FPSR_EXCEPT(%a6) # is INEX2 set?
	beq.w		fadd_normal		# no; no underflow occurred

#
# ok, so now the result has a exponent equal to the smallest normalized
# exponent for the selected precision. also, the mantissa is equal to
# 0x8000000000000000 and this mantissa is the result of rounding non-zero
# g,r,s. 
# now, we must determine whether the pre-rounded result was an underflow
# rounded "up" or a normalized number rounded "down".
# so, we do this be re-executing the add using RZ as the rounding mode and
# seeing if the new result is smaller or equal to the current result.
#
	fmovm.x		FP_SCR1(%a6),&0x40	# load dst op into fp1

	mov.l		L_SCR3(%a6),%d1
	andi.b		&0xc0,%d1		# keep rnd prec
	ori.b		&rz_mode*0x10,%d1	# insert rnd mode
	fmov.l		%d1,%fpcr		# set FPCR
	fmov.l		&0x0,%fpsr		# clear FPSR

	fadd.x		FP_SCR0(%a6),%fp1	# execute add

	fmov.l		&0x0,%fpcr		# clear FPCR

	fabs.x		%fp0			# compare absolute values
	fabs.x		%fp1
	fcmp.x		%fp0,%fp1		# is first result > second?

	fbgt.w		fadd_unfl		# yes; it's an underflow
	bra.w		fadd_normal		# no; it's not an underflow

##########################################################################

#
# Add: inputs are not both normalized; what are they?
#
fadd_not_norm:
	mov.w		(tbl_fadd_op.b,%pc,%d1.w*2),%d1
	jmp		(tbl_fadd_op.b,%pc,%d1.w*1)

	swbeg		&48
tbl_fadd_op:
	short		fadd_norm	- tbl_fadd_op # NORM + NORM
	short		fadd_zero_src	- tbl_fadd_op # NORM + ZERO
	short		fadd_inf_src	- tbl_fadd_op # NORM + INF
	short		fadd_res_qnan	- tbl_fadd_op # NORM + QNAN
	short		fadd_norm	- tbl_fadd_op # NORM + DENORM
	short		fadd_res_snan	- tbl_fadd_op # NORM + SNAN
	short		tbl_fadd_op	- tbl_fadd_op #
	short		tbl_fadd_op	- tbl_fadd_op #

	short		fadd_zero_dst	- tbl_fadd_op # ZERO + NORM
	short		fadd_zero_2	- tbl_fadd_op # ZERO + ZERO
	short		fadd_inf_src	- tbl_fadd_op # ZERO + INF
	short		fadd_res_qnan	- tbl_fadd_op # NORM + QNAN
	short		fadd_zero_dst	- tbl_fadd_op # ZERO + DENORM
	short		fadd_res_snan	- tbl_fadd_op # NORM + SNAN
	short		tbl_fadd_op	- tbl_fadd_op #
	short		tbl_fadd_op	- tbl_fadd_op #

	short		fadd_inf_dst	- tbl_fadd_op # INF + NORM
	short		fadd_inf_dst	- tbl_fadd_op # INF + ZERO
	short		fadd_inf_2	- tbl_fadd_op # INF + INF
	short		fadd_res_qnan	- tbl_fadd_op # NORM + QNAN
	short		fadd_inf_dst	- tbl_fadd_op # INF + DENORM
	short		fadd_res_snan	- tbl_fadd_op # NORM + SNAN
	short		tbl_fadd_op	- tbl_fadd_op #
	short		tbl_fadd_op	- tbl_fadd_op #

	short		fadd_res_qnan	- tbl_fadd_op # QNAN + NORM
	short		fadd_res_qnan	- tbl_fadd_op # QNAN + ZERO
	short		fadd_res_qnan	- tbl_fadd_op # QNAN + INF
	short		fadd_res_qnan	- tbl_fadd_op # QNAN + QNAN
	short		fadd_res_qnan	- tbl_fadd_op # QNAN + DENORM
	short		fadd_res_snan	- tbl_fadd_op # QNAN + SNAN
	short		tbl_fadd_op	- tbl_fadd_op #
	short		tbl_fadd_op	- tbl_fadd_op #

	short		fadd_norm	- tbl_fadd_op # DENORM + NORM
	short		fadd_zero_src	- tbl_fadd_op # DENORM + ZERO
	short		fadd_inf_src	- tbl_fadd_op # DENORM + INF
	short		fadd_res_qnan	- tbl_fadd_op # NORM + QNAN
	short		fadd_norm	- tbl_fadd_op # DENORM + DENORM
	short		fadd_res_snan	- tbl_fadd_op # NORM + SNAN
	short		tbl_fadd_op	- tbl_fadd_op #
	short		tbl_fadd_op	- tbl_fadd_op #

	short		fadd_res_snan	- tbl_fadd_op # SNAN + NORM
	short		fadd_res_snan	- tbl_fadd_op # SNAN + ZERO
	short		fadd_res_snan	- tbl_fadd_op # SNAN + INF
	short		fadd_res_snan	- tbl_fadd_op # SNAN + QNAN
	short		fadd_res_snan	- tbl_fadd_op # SNAN + DENORM
	short		fadd_res_snan	- tbl_fadd_op # SNAN + SNAN
	short		tbl_fadd_op	- tbl_fadd_op #
	short		tbl_fadd_op	- tbl_fadd_op #

fadd_res_qnan:
	bra.l		res_qnan
fadd_res_snan:
	bra.l		res_snan

#
# both operands are ZEROes
#
fadd_zero_2:
	mov.b		SRC_EX(%a0),%d0		# are the signs opposite
	mov.b		DST_EX(%a1),%d1
	eor.b		%d0,%d1
	bmi.w		fadd_zero_2_chk_rm	# weed out (-ZERO)+(+ZERO)

# the signs are the same. so determine whether they are positive or negative
# and return the appropriately signed zero.
	tst.b		%d0			# are ZEROes positive or negative?
	bmi.b		fadd_zero_rm		# negative
	fmov.s		&0x00000000,%fp0	# return +ZERO
	mov.b		&z_bmask,FPSR_CC(%a6)	# set Z
	rts
	
#
# the ZEROes have opposite signs:
# - therefore, we return +ZERO if the rounding modes are RN,RZ, or RP.
# - -ZERO is returned in the case of RM.
#
fadd_zero_2_chk_rm:
	mov.b		3+L_SCR3(%a6),%d1
	andi.b		&0x30,%d1		# extract rnd mode
	cmpi.b		%d1,&rm_mode*0x10	# is rnd mode == RM?
	beq.b		fadd_zero_rm		# yes
	fmov.s		&0x00000000,%fp0	# return +ZERO
	mov.b		&z_bmask,FPSR_CC(%a6)	# set Z
	rts

fadd_zero_rm:
	fmov.s		&0x80000000,%fp0	# return -ZERO
	mov.b		&neg_bmask+z_bmask,FPSR_CC(%a6) # set NEG/Z
	rts

#
# one operand is a ZERO and the other is a DENORM or NORM. scale
# the DENORM or NORM and jump to the regular fadd routine.
#
fadd_zero_dst:
	mov.w		SRC_EX(%a0),FP_SCR0_EX(%a6)
	mov.l		SRC_HI(%a0),FP_SCR0_HI(%a6)
	mov.l		SRC_LO(%a0),FP_SCR0_LO(%a6)
	bsr.l		scale_to_zero_src	# scale the operand
	clr.w		FP_SCR1_EX(%a6)
	clr.l		FP_SCR1_HI(%a6)
	clr.l		FP_SCR1_LO(%a6)
	bra.w		fadd_zero_entry		# go execute fadd

fadd_zero_src:
	mov.w		DST_EX(%a1),FP_SCR1_EX(%a6)
	mov.l		DST_HI(%a1),FP_SCR1_HI(%a6)
	mov.l		DST_LO(%a1),FP_SCR1_LO(%a6)
	bsr.l		scale_to_zero_dst	# scale the operand
	clr.w		FP_SCR0_EX(%a6)
	clr.l		FP_SCR0_HI(%a6)
	clr.l		FP_SCR0_LO(%a6)
	bra.w		fadd_zero_entry		# go execute fadd

#
# both operands are INFs. an OPERR will result if the INFs have
# different signs. else, an INF of the same sign is returned
#
fadd_inf_2:
	mov.b		SRC_EX(%a0),%d0		# exclusive or the signs
	mov.b		DST_EX(%a1),%d1
	eor.b		%d1,%d0
	bmi.l		res_operr		# weed out (-INF)+(+INF)

# ok, so it's not an OPERR. but, we do have to remember to return the 
# src INF since that's where the 881/882 gets the j-bit from...

#
# operands are INF and one of {ZERO, INF, DENORM, NORM}
#
fadd_inf_src:
	fmovm.x		SRC(%a0),&0x80		# return src INF
	tst.b		SRC_EX(%a0)		# is INF positive?
	bpl.b		fadd_inf_done		# yes; we're done
	mov.b		&neg_bmask+inf_bmask,FPSR_CC(%a6) # set INF/NEG
	rts

#
# operands are INF and one of {ZERO, INF, DENORM, NORM}
#
fadd_inf_dst:
	fmovm.x		DST(%a1),&0x80		# return dst INF
	tst.b		DST_EX(%a1)		# is INF positive?
	bpl.b		fadd_inf_done		# yes; we're done
	mov.b		&neg_bmask+inf_bmask,FPSR_CC(%a6) # set INF/NEG
	rts

fadd_inf_done:
	mov.b		&inf_bmask,FPSR_CC(%a6) # set INF
	rts

#########################################################################
# XDEF ****************************************************************	#
#	fsub(): emulates the fsub instruction				#
#	fssub(): emulates the fssub instruction				#
#	fdsub(): emulates the fdsub instruction				#
#									#
# XREF ****************************************************************	#
# 	addsub_scaler2() - scale the operands so they won't take exc	#
#	ovf_res() - return default overflow result			#
#	unf_res() - return default underflow result			#
#	res_qnan() - set QNAN result					#
# 	res_snan() - set SNAN result					#
#	res_operr() - set OPERR result					#
#	scale_to_zero_src() - set src operand exponent equal to zero	#
#	scale_to_zero_dst() - set dst operand exponent equal to zero	#
#									#
# INPUT ***************************************************************	#
#	a0 = pointer to extended precision source operand		#
# 	a1 = pointer to extended precision destination operand		#
#									#
# OUTPUT **************************************************************	#
#	fp0 = result							#
#	fp1 = EXOP (if exception occurred)				#
#									#
# ALGORITHM ***********************************************************	#
# 	Handle NANs, infinities, and zeroes as special cases. Divide	#
# norms into extended, single, and double precision.			#
#	Do subtraction after scaling exponents such that exception won't#
# occur. Then, check result exponent to see if exception would have	#
# occurred. If so, return default result and maybe EXOP. Else, insert	#
# the correct result exponent and return. Set FPSR bits as appropriate.	#
#									#
#########################################################################

	global		fssub
fssub:
	andi.b		&0x30,%d0		# clear rnd prec
	ori.b		&s_mode*0x10,%d0	# insert sgl prec
	bra.b		fsub

	global		fdsub
fdsub:
	andi.b		&0x30,%d0		# clear rnd prec
	ori.b		&d_mode*0x10,%d0	# insert dbl prec

	global		fsub
fsub:
	mov.l		%d0,L_SCR3(%a6)		# store rnd info

	clr.w		%d1
	mov.b		DTAG(%a6),%d1
	lsl.b		&0x3,%d1
	or.b		STAG(%a6),%d1		# combine src tags

	bne.w		fsub_not_norm		# optimize on non-norm input

#
# SUB: norms and denorms
#
fsub_norm:
	bsr.l		addsub_scaler2		# scale exponents

fsub_zero_entry:
	fmovm.x		FP_SCR1(%a6),&0x80	# load dst op

	fmov.l		&0x0,%fpsr		# clear FPSR
	fmov.l		L_SCR3(%a6),%fpcr	# set FPCR

	fsub.x		FP_SCR0(%a6),%fp0	# execute subtract

	fmov.l		&0x0,%fpcr		# clear FPCR
	fmov.l		%fpsr,%d1		# fetch INEX2, N, Z

	or.l		%d1,USER_FPSR(%a6)	# save exc and ccode bits

	fbeq.w		fsub_zero_exit		# if result zero, end now

	mov.l		%d2,-(%sp)		# save d2

	fmovm.x		&0x01,-(%sp)		# save result to stack

	mov.w		2+L_SCR3(%a6),%d1
	lsr.b		&0x6,%d1

	mov.w		(%sp),%d2		# fetch new exponent
	andi.l		&0x7fff,%d2		# strip sign
	sub.l		%d0,%d2			# add scale factor

	cmp.l		%d2,(tbl_fsub_ovfl.b,%pc,%d1.w*4) # is it an overflow?
	bge.b		fsub_ovfl		# yes

	cmp.l		%d2,(tbl_fsub_unfl.b,%pc,%d1.w*4) # is it an underflow?
	blt.w		fsub_unfl		# yes
	beq.w		fsub_may_unfl		# maybe; go find out

fsub_normal:
	mov.w		(%sp),%d1
	andi.w		&0x8000,%d1		# keep sign
	or.w		%d2,%d1			# insert new exponent
	mov.w		%d1,(%sp)		# insert new exponent

	fmovm.x		(%sp)+,&0x80		# return result in fp0

	mov.l		(%sp)+,%d2		# restore d2
	rts

fsub_zero_exit:
#	fmov.s		&0x00000000,%fp0	# return zero in fp0
	rts

tbl_fsub_ovfl:
	long		0x7fff			# ext ovfl
	long		0x407f			# sgl ovfl
	long		0x43ff			# dbl ovfl

tbl_fsub_unfl:
	long	        0x0000			# ext unfl
	long		0x3f81			# sgl unfl
	long		0x3c01			# dbl unfl

fsub_ovfl:
	or.l		&ovfl_inx_mask,USER_FPSR(%a6) # set ovfl/aovfl/ainex

	mov.b		FPCR_ENABLE(%a6),%d1
	andi.b		&0x13,%d1		# is OVFL or INEX enabled?
	bne.b		fsub_ovfl_ena		# yes

	add.l		&0xc,%sp
fsub_ovfl_dis:
	btst		&neg_bit,FPSR_CC(%a6)	# is result negative?
	sne		%d1			# set sign param accordingly
	mov.l		L_SCR3(%a6),%d0		# pass prec:rnd
	bsr.l		ovf_res			# calculate default result
	or.b		%d0,FPSR_CC(%a6)	# set INF,N if applicable
	fmovm.x		(%a0),&0x80		# return default result in fp0
	mov.l		(%sp)+,%d2		# restore d2
	rts

fsub_ovfl_ena:
	mov.b		L_SCR3(%a6),%d1
	andi.b		&0xc0,%d1		# is precision extended?
	bne.b		fsub_ovfl_ena_sd	# no

fsub_ovfl_ena_cont:
	mov.w		(%sp),%d1		# fetch {sgn,exp}
	andi.w		&0x8000,%d1		# keep sign
	subi.l		&0x6000,%d2		# subtract new bias
	andi.w		&0x7fff,%d2		# clear top bit
	or.w		%d2,%d1			# concat sign,exp
	mov.w		%d1,(%sp)		# insert new exponent

	fmovm.x		(%sp)+,&0x40		# return EXOP in fp1
	bra.b		fsub_ovfl_dis

fsub_ovfl_ena_sd:
	fmovm.x		FP_SCR1(%a6),&0x80	# load dst op

	mov.l		L_SCR3(%a6),%d1
	andi.b		&0x30,%d1		# clear rnd prec
	fmov.l		%d1,%fpcr		# set FPCR

	fsub.x		FP_SCR0(%a6),%fp0	# execute subtract

	fmov.l		&0x0,%fpcr		# clear FPCR

	add.l		&0xc,%sp
	fmovm.x		&0x01,-(%sp)
	bra.b		fsub_ovfl_ena_cont

fsub_unfl:
	bset		&unfl_bit,FPSR_EXCEPT(%a6) # set unfl exc bit

	add.l		&0xc,%sp

	fmovm.x		FP_SCR1(%a6),&0x80	# load dst op
	
	fmov.l		&rz_mode*0x10,%fpcr	# set FPCR
	fmov.l		&0x0,%fpsr		# clear FPSR

	fsub.x		FP_SCR0(%a6),%fp0	# execute subtract

	fmov.l		&0x0,%fpcr		# clear FPCR
	fmov.l		%fpsr,%d1		# save status

	or.l		%d1,USER_FPSR(%a6)

	mov.b		FPCR_ENABLE(%a6),%d1
	andi.b		&0x0b,%d1		# is UNFL or INEX enabled?
	bne.b		fsub_unfl_ena		# yes

fsub_unfl_dis:
	fmovm.x		&0x80,FP_SCR0(%a6)	# store out result

	lea		FP_SCR0(%a6),%a0	# pass: result addr
	mov.l		L_SCR3(%a6),%d1		# pass: rnd prec,mode
	bsr.l		unf_res			# calculate default result
	or.b		%d0,FPSR_CC(%a6)	# 'Z' may have been set
	fmovm.x		FP_SCR0(%a6),&0x80	# return default result in fp0
	mov.l		(%sp)+,%d2		# restore d2
	rts

fsub_unfl_ena:
	fmovm.x		FP_SCR1(%a6),&0x40

	mov.l		L_SCR3(%a6),%d1
	andi.b		&0xc0,%d1		# is precision extended?
	bne.b		fsub_unfl_ena_sd	# no

	fmov.l		L_SCR3(%a6),%fpcr	# set FPCR

fsub_unfl_ena_cont:
	fmov.l		&0x0,%fpsr		# clear FPSR

	fsub.x		FP_SCR0(%a6),%fp1	# execute subtract

	fmov.l		&0x0,%fpcr		# clear FPCR

	fmovm.x		&0x40,FP_SCR0(%a6)	# store result to stack
	mov.w		FP_SCR0_EX(%a6),%d1	# fetch {sgn,exp}
	mov.l		%d1,%d2			# make a copy
	andi.l		&0x7fff,%d1		# strip sign
	andi.w		&0x8000,%d2		# keep old sign
	sub.l		%d0,%d1			# add scale factor
	addi.l		&0x6000,%d1		# subtract new bias
	andi.w		&0x7fff,%d1		# clear top bit
	or.w		%d2,%d1			# concat sgn,exp
	mov.w		%d1,FP_SCR0_EX(%a6)	# insert new exponent
	fmovm.x		FP_SCR0(%a6),&0x40	# return EXOP in fp1
	bra.w		fsub_unfl_dis

fsub_unfl_ena_sd:
	mov.l		L_SCR3(%a6),%d1
	andi.b		&0x30,%d1		# clear rnd prec
	fmov.l		%d1,%fpcr		# set FPCR

	bra.b		fsub_unfl_ena_cont

#
# result is equal to the smallest normalized number in the selected precision
# if the precision is extended, this result could not have come from an 
# underflow that rounded up.
#
fsub_may_unfl:
	mov.l		L_SCR3(%a6),%d1
	andi.b		&0xc0,%d1		# fetch rnd prec
	beq.w		fsub_normal		# yes; no underflow occurred

	mov.l		0x4(%sp),%d1
	cmpi.l		%d1,&0x80000000		# is hi(man) = 0x80000000?
	bne.w		fsub_normal		# no; no underflow occurred

	tst.l		0x8(%sp)		# is lo(man) = 0x0?
	bne.w		fsub_normal		# no; no underflow occurred

	btst		&inex2_bit,FPSR_EXCEPT(%a6) # is INEX2 set?
	beq.w		fsub_normal		# no; no underflow occurred

#
# ok, so now the result has a exponent equal to the smallest normalized
# exponent for the selected precision. also, the mantissa is equal to
# 0x8000000000000000 and this mantissa is the result of rounding non-zero
# g,r,s. 
# now, we must determine whether the pre-rounded result was an underflow
# rounded "up" or a normalized number rounded "down".
# so, we do this be re-executing the add using RZ as the rounding mode and
# seeing if the new result is smaller or equal to the current result.
#
	fmovm.x		FP_SCR1(%a6),&0x40	# load dst op into fp1

	mov.l		L_SCR3(%a6),%d1
	andi.b		&0xc0,%d1		# keep rnd prec
	ori.b		&rz_mode*0x10,%d1	# insert rnd mode
	fmov.l		%d1,%fpcr		# set FPCR
	fmov.l		&0x0,%fpsr		# clear FPSR

	fsub.x		FP_SCR0(%a6),%fp1	# execute subtract

	fmov.l		&0x0,%fpcr		# clear FPCR

	fabs.x		%fp0			# compare absolute values
	fabs.x		%fp1
	fcmp.x		%fp0,%fp1		# is first result > second?

	fbgt.w		fsub_unfl		# yes; it's an underflow
	bra.w		fsub_normal		# no; it's not an underflow

##########################################################################

#
# Sub: inputs are not both normalized; what are they?
#
fsub_not_norm:
	mov.w		(tbl_fsub_op.b,%pc,%d1.w*2),%d1
	jmp		(tbl_fsub_op.b,%pc,%d1.w*1)

	swbeg		&48
tbl_fsub_op:
	short		fsub_norm	- tbl_fsub_op # NORM - NORM
	short		fsub_zero_src	- tbl_fsub_op # NORM - ZERO
	short		fsub_inf_src	- tbl_fsub_op # NORM - INF
	short		fsub_res_qnan	- tbl_fsub_op # NORM - QNAN
	short		fsub_norm	- tbl_fsub_op # NORM - DENORM
	short		fsub_res_snan	- tbl_fsub_op # NORM - SNAN
	short		tbl_fsub_op	- tbl_fsub_op #
	short		tbl_fsub_op	- tbl_fsub_op #

	short		fsub_zero_dst	- tbl_fsub_op # ZERO - NORM
	short		fsub_zero_2	- tbl_fsub_op # ZERO - ZERO
	short		fsub_inf_src	- tbl_fsub_op # ZERO - INF
	short		fsub_res_qnan	- tbl_fsub_op # NORM - QNAN
	short		fsub_zero_dst	- tbl_fsub_op # ZERO - DENORM
	short		fsub_res_snan	- tbl_fsub_op # NORM - SNAN
	short		tbl_fsub_op	- tbl_fsub_op #
	short		tbl_fsub_op	- tbl_fsub_op #

	short		fsub_inf_dst	- tbl_fsub_op # INF - NORM
	short		fsub_inf_dst	- tbl_fsub_op # INF - ZERO
	short		fsub_inf_2	- tbl_fsub_op # INF - INF
	short		fsub_res_qnan	- tbl_fsub_op # NORM - QNAN
	short		fsub_inf_dst	- tbl_fsub_op # INF - DENORM
	short		fsub_res_snan	- tbl_fsub_op # NORM - SNAN
	short		tbl_fsub_op	- tbl_fsub_op #
	short		tbl_fsub_op	- tbl_fsub_op #

	short		fsub_res_qnan	- tbl_fsub_op # QNAN - NORM
	short		fsub_res_qnan	- tbl_fsub_op # QNAN - ZERO
	short		fsub_res_qnan	- tbl_fsub_op # QNAN - INF
	short		fsub_res_qnan	- tbl_fsub_op # QNAN - QNAN
	short		fsub_res_qnan	- tbl_fsub_op # QNAN - DENORM
	short		fsub_res_snan	- tbl_fsub_op # QNAN - SNAN
	short		tbl_fsub_op	- tbl_fsub_op #
	short		tbl_fsub_op	- tbl_fsub_op #

	short		fsub_norm	- tbl_fsub_op # DENORM - NORM
	short		fsub_zero_src	- tbl_fsub_op # DENORM - ZERO
	short		fsub_inf_src	- tbl_fsub_op # DENORM - INF
	short		fsub_res_qnan	- tbl_fsub_op # NORM - QNAN
	short		fsub_norm	- tbl_fsub_op # DENORM - DENORM
	short		fsub_res_snan	- tbl_fsub_op # NORM - SNAN
	short		tbl_fsub_op	- tbl_fsub_op #
	short		tbl_fsub_op	- tbl_fsub_op #

	short		fsub_res_snan	- tbl_fsub_op # SNAN - NORM
	short		fsub_res_snan	- tbl_fsub_op # SNAN - ZERO
	short		fsub_res_snan	- tbl_fsub_op # SNAN - INF
	short		fsub_res_snan	- tbl_fsub_op # SNAN - QNAN
	short		fsub_res_snan	- tbl_fsub_op # SNAN - DENORM
	short		fsub_res_snan	- tbl_fsub_op # SNAN - SNAN
	short		tbl_fsub_op	- tbl_fsub_op #
	short		tbl_fsub_op	- tbl_fsub_op #

fsub_res_qnan:
	bra.l		res_qnan
fsub_res_snan:
	bra.l		res_snan

#
# both operands are ZEROes
#
fsub_zero_2:
	mov.b		SRC_EX(%a0),%d0
	mov.b		DST_EX(%a1),%d1
	eor.b		%d1,%d0
	bpl.b		fsub_zero_2_chk_rm

# the signs are opposite, so, return a ZERO w/ the sign of the dst ZERO
	tst.b		%d0			# is dst negative?
	bmi.b		fsub_zero_2_rm		# yes
	fmov.s		&0x00000000,%fp0	# no; return +ZERO
	mov.b		&z_bmask,FPSR_CC(%a6)	# set Z
	rts

#
# the ZEROes have the same signs:
# - therefore, we return +ZERO if the rounding mode is RN,RZ, or RP
# - -ZERO is returned in the case of RM.
#
fsub_zero_2_chk_rm:
	mov.b		3+L_SCR3(%a6),%d1
	andi.b		&0x30,%d1		# extract rnd mode
	cmpi.b		%d1,&rm_mode*0x10	# is rnd mode = RM?
	beq.b		fsub_zero_2_rm		# yes
	fmov.s		&0x00000000,%fp0	# no; return +ZERO
	mov.b		&z_bmask,FPSR_CC(%a6)	# set Z
	rts

fsub_zero_2_rm:
	fmov.s		&0x80000000,%fp0	# return -ZERO
	mov.b		&z_bmask+neg_bmask,FPSR_CC(%a6)	# set Z/NEG
	rts

#
# one operand is a ZERO and the other is a DENORM or a NORM.
# scale the DENORM or NORM and jump to the regular fsub routine.
#
fsub_zero_dst:
	mov.w		SRC_EX(%a0),FP_SCR0_EX(%a6)
	mov.l		SRC_HI(%a0),FP_SCR0_HI(%a6)
	mov.l		SRC_LO(%a0),FP_SCR0_LO(%a6)
	bsr.l		scale_to_zero_src	# scale the operand
	clr.w		FP_SCR1_EX(%a6)
	clr.l		FP_SCR1_HI(%a6)
	clr.l		FP_SCR1_LO(%a6)
	bra.w		fsub_zero_entry		# go execute fsub

fsub_zero_src:
	mov.w		DST_EX(%a1),FP_SCR1_EX(%a6)
	mov.l		DST_HI(%a1),FP_SCR1_HI(%a6)
	mov.l		DST_LO(%a1),FP_SCR1_LO(%a6)
	bsr.l		scale_to_zero_dst	# scale the operand
	clr.w		FP_SCR0_EX(%a6)
	clr.l		FP_SCR0_HI(%a6)
	clr.l		FP_SCR0_LO(%a6)
	bra.w		fsub_zero_entry		# go execute fsub

#
# both operands are INFs. an OPERR will result if the INFs have the
# same signs. else, 
#
fsub_inf_2:
	mov.b		SRC_EX(%a0),%d0		# exclusive or the signs
	mov.b		DST_EX(%a1),%d1
	eor.b		%d1,%d0
	bpl.l		res_operr		# weed out (-INF)+(+INF)

# ok, so it's not an OPERR. but we do have to remember to return
# the src INF since that's where the 881/882 gets the j-bit.

fsub_inf_src:
	fmovm.x		SRC(%a0),&0x80		# return src INF
	fneg.x		%fp0			# invert sign
	fbge.w		fsub_inf_done		# sign is now positive
	mov.b		&neg_bmask+inf_bmask,FPSR_CC(%a6) # set INF/NEG	
	rts

fsub_inf_dst:
	fmovm.x		DST(%a1),&0x80		# return dst INF
	tst.b		DST_EX(%a1)		# is INF negative?
	bpl.b		fsub_inf_done		# no
	mov.b		&neg_bmask+inf_bmask,FPSR_CC(%a6) # set INF/NEG
	rts

fsub_inf_done:
	mov.b		&inf_bmask,FPSR_CC(%a6)	# set INF
	rts

#########################################################################
# XDEF ****************************************************************	#
# 	fsqrt(): emulates the fsqrt instruction				#
#	fssqrt(): emulates the fssqrt instruction			#
#	fdsqrt(): emulates the fdsqrt instruction			#
#									#
# XREF ****************************************************************	#
#	scale_sqrt() - scale the source operand				#
#	unf_res() - return default underflow result			#
#	ovf_res() - return default overflow result			#
# 	res_qnan_1op() - return QNAN result				#
# 	res_snan_1op() - return SNAN result				#
#									#
# INPUT ***************************************************************	#
#	a0 = pointer to extended precision source operand		#
#	d0  rnd prec,mode						#
#									#
# OUTPUT **************************************************************	#
#	fp0 = result							#
#	fp1 = EXOP (if exception occurred)				#
#									#
# ALGORITHM ***********************************************************	#
#	Handle NANs, infinities, and zeroes as special cases. Divide	#
# norms/denorms into ext/sgl/dbl precision.				#
#	For norms/denorms, scale the exponents such that a sqrt		#
# instruction won't cause an exception. Use the regular fsqrt to	#
# compute a result. Check if the regular operands would have taken	#
# an exception. If so, return the default overflow/underflow result	#
# and return the EXOP if exceptions are enabled. Else, scale the 	#
# result operand to the proper exponent.				#
#									#
#########################################################################

	global		fssqrt
fssqrt:
	andi.b		&0x30,%d0		# clear rnd prec
	ori.b		&s_mode*0x10,%d0	# insert sgl precision
	bra.b		fsqrt

	global		fdsqrt
fdsqrt:
	andi.b		&0x30,%d0		# clear rnd prec
	ori.b		&d_mode*0x10,%d0	# insert dbl precision

	global		fsqrt
fsqrt:
	mov.l		%d0,L_SCR3(%a6)		# store rnd info
	clr.w		%d1
	mov.b		STAG(%a6),%d1
	bne.w		fsqrt_not_norm		# optimize on non-norm input
		
#
# SQUARE ROOT: norms and denorms ONLY!
#
fsqrt_norm:
	tst.b		SRC_EX(%a0)		# is operand negative?
	bmi.l		res_operr		# yes

	andi.b		&0xc0,%d0		# is precision extended?
	bne.b		fsqrt_not_ext		# no; go handle sgl or dbl

	fmov.l		L_SCR3(%a6),%fpcr	# set FPCR
	fmov.l		&0x0,%fpsr		# clear FPSR

	fsqrt.x		(%a0),%fp0		# execute square root

	fmov.l		%fpsr,%d1
	or.l		%d1,USER_FPSR(%a6)	# set N,INEX

	rts

fsqrt_denorm:
	tst.b		SRC_EX(%a0)		# is operand negative?
	bmi.l		res_operr		# yes

	andi.b		&0xc0,%d0		# is precision extended?
	bne.b		fsqrt_not_ext		# no; go handle sgl or dbl

	mov.w		SRC_EX(%a0),FP_SCR0_EX(%a6)
	mov.l		SRC_HI(%a0),FP_SCR0_HI(%a6)
	mov.l		SRC_LO(%a0),FP_SCR0_LO(%a6)

	bsr.l		scale_sqrt		# calculate scale factor

	bra.w		fsqrt_sd_normal

#
# operand is either single or double
#
fsqrt_not_ext:
	cmpi.b		%d0,&s_mode*0x10	# separate sgl/dbl prec
	bne.w		fsqrt_dbl

#
# operand is to be rounded to single precision
#
fsqrt_sgl:
	mov.w		SRC_EX(%a0),FP_SCR0_EX(%a6)
	mov.l		SRC_HI(%a0),FP_SCR0_HI(%a6)
	mov.l		SRC_LO(%a0),FP_SCR0_LO(%a6)

	bsr.l		scale_sqrt		# calculate scale factor

	cmpi.l		%d0,&0x3fff-0x3f81	# will move in underflow?
	beq.w		fsqrt_sd_may_unfl
	bgt.w		fsqrt_sd_unfl		# yes; go handle underflow
	cmpi.l		%d0,&0x3fff-0x407f	# will move in overflow?
	beq.w		fsqrt_sd_may_ovfl	# maybe; go check
	blt.w		fsqrt_sd_ovfl		# yes; go handle overflow

#
# operand will NOT overflow or underflow when moved in to the fp reg file
#
fsqrt_sd_normal:
	fmov.l		&0x0,%fpsr		# clear FPSR
	fmov.l		L_SCR3(%a6),%fpcr	# set FPCR

	fsqrt.x		FP_SCR0(%a6),%fp0	# perform absolute

	fmov.l		%fpsr,%d1		# save FPSR
	fmov.l		&0x0,%fpcr		# clear FPCR

	or.l		%d1,USER_FPSR(%a6)	# save INEX2,N

fsqrt_sd_normal_exit:
	mov.l		%d2,-(%sp)		# save d2
	fmovm.x		&0x80,FP_SCR0(%a6)	# store out result
	mov.w		FP_SCR0_EX(%a6),%d1	# load sgn,exp
	mov.l		%d1,%d2			# make a copy
	andi.l		&0x7fff,%d1		# strip sign
	sub.l		%d0,%d1			# add scale factor
	andi.w		&0x8000,%d2		# keep old sign
	or.w		%d1,%d2			# concat old sign,new exp
	mov.w		%d2,FP_SCR0_EX(%a6)	# insert new exponent
	mov.l		(%sp)+,%d2		# restore d2
	fmovm.x		FP_SCR0(%a6),&0x80	# return result in fp0
	rts

#
# operand is to be rounded to double precision
#
fsqrt_dbl:
	mov.w		SRC_EX(%a0),FP_SCR0_EX(%a6)
	mov.l		SRC_HI(%a0),FP_SCR0_HI(%a6)
	mov.l		SRC_LO(%a0),FP_SCR0_LO(%a6)

	bsr.l		scale_sqrt		# calculate scale factor

	cmpi.l		%d0,&0x3fff-0x3c01	# will move in underflow?
	beq.w		fsqrt_sd_may_unfl
	bgt.b		fsqrt_sd_unfl		# yes; go handle underflow
	cmpi.l		%d0,&0x3fff-0x43ff	# will move in overflow?
	beq.w		fsqrt_sd_may_ovfl	# maybe; go check
	blt.w		fsqrt_sd_ovfl		# yes; go handle overflow
	bra.w		fsqrt_sd_normal		# no; ho handle normalized op

# we're on the line here and the distinguising characteristic is whether
# the exponent is 3fff or 3ffe. if it's 3ffe, then it's a safe number
# elsewise fall through to underflow.
fsqrt_sd_may_unfl:
	btst		&0x0,1+FP_SCR0_EX(%a6)	# is exponent 0x3fff?
	bne.w		fsqrt_sd_normal		# yes, so no underflow

#
# operand WILL underflow when moved in to the fp register file
#
fsqrt_sd_unfl:
	bset		&unfl_bit,FPSR_EXCEPT(%a6) # set unfl exc bit

	fmov.l		&rz_mode*0x10,%fpcr	# set FPCR
	fmov.l		&0x0,%fpsr		# clear FPSR

	fsqrt.x 	FP_SCR0(%a6),%fp0	# execute square root

	fmov.l		%fpsr,%d1		# save status
	fmov.l		&0x0,%fpcr		# clear FPCR

	or.l		%d1,USER_FPSR(%a6)	# save INEX2,N

# if underflow or inexact is enabled, go calculate EXOP first.
	mov.b		FPCR_ENABLE(%a6),%d1
	andi.b		&0x0b,%d1		# is UNFL or INEX enabled?
	bne.b		fsqrt_sd_unfl_ena	# yes

fsqrt_sd_unfl_dis:
	fmovm.x		&0x80,FP_SCR0(%a6)	# store out result

	lea		FP_SCR0(%a6),%a0	# pass: result addr
	mov.l		L_SCR3(%a6),%d1		# pass: rnd prec,mode
	bsr.l		unf_res			# calculate default result
	or.b		%d0,FPSR_CC(%a6)	# set possible 'Z' ccode
	fmovm.x		FP_SCR0(%a6),&0x80	# return default result in fp0
	rts	

#
# operand will underflow AND underflow is enabled. 
# therefore, we must return the result rounded to extended precision.
#
fsqrt_sd_unfl_ena:
	mov.l		FP_SCR0_HI(%a6),FP_SCR1_HI(%a6)
	mov.l		FP_SCR0_LO(%a6),FP_SCR1_LO(%a6)
	mov.w		FP_SCR0_EX(%a6),%d1	# load current exponent

	mov.l		%d2,-(%sp)		# save d2
	mov.l		%d1,%d2			# make a copy
	andi.l		&0x7fff,%d1		# strip sign
	andi.w		&0x8000,%d2		# keep old sign
	sub.l		%d0,%d1			# subtract scale factor
	addi.l		&0x6000,%d1		# add new bias
	andi.w		&0x7fff,%d1
	or.w		%d2,%d1			# concat new sign,new exp
	mov.w		%d1,FP_SCR1_EX(%a6)	# insert new exp
	fmovm.x		FP_SCR1(%a6),&0x40	# return EXOP in fp1
	mov.l		(%sp)+,%d2		# restore d2
	bra.b		fsqrt_sd_unfl_dis

#
# operand WILL overflow.
#
fsqrt_sd_ovfl:
	fmov.l		&0x0,%fpsr		# clear FPSR
	fmov.l		L_SCR3(%a6),%fpcr	# set FPCR

	fsqrt.x		FP_SCR0(%a6),%fp0	# perform square root

	fmov.l		&0x0,%fpcr		# clear FPCR
	fmov.l		%fpsr,%d1		# save FPSR

	or.l		%d1,USER_FPSR(%a6)	# save INEX2,N

fsqrt_sd_ovfl_tst:
	or.l		&ovfl_inx_mask,USER_FPSR(%a6) # set ovfl/aovfl/ainex

	mov.b		FPCR_ENABLE(%a6),%d1
	andi.b		&0x13,%d1		# is OVFL or INEX enabled?
	bne.b		fsqrt_sd_ovfl_ena	# yes

#
# OVFL is not enabled; therefore, we must create the default result by
# calling ovf_res().
#
fsqrt_sd_ovfl_dis:
	btst		&neg_bit,FPSR_CC(%a6)	# is result negative?
	sne		%d1			# set sign param accordingly
	mov.l		L_SCR3(%a6),%d0		# pass: prec,mode
	bsr.l		ovf_res			# calculate default result
	or.b		%d0,FPSR_CC(%a6)	# set INF,N if applicable
	fmovm.x		(%a0),&0x80		# return default result in fp0
	rts

#
# OVFL is enabled.
# the INEX2 bit has already been updated by the round to the correct precision.
# now, round to extended(and don't alter the FPSR).
#
fsqrt_sd_ovfl_ena:
	mov.l		%d2,-(%sp)		# save d2
	mov.w		FP_SCR0_EX(%a6),%d1	# fetch {sgn,exp}
	mov.l		%d1,%d2			# make a copy
	andi.l		&0x7fff,%d1		# strip sign
	andi.w		&0x8000,%d2		# keep old sign
	sub.l		%d0,%d1			# add scale factor
	subi.l		&0x6000,%d1		# subtract bias
	andi.w		&0x7fff,%d1
	or.w		%d2,%d1			# concat sign,exp
	mov.w		%d1,FP_SCR0_EX(%a6)	# insert new exponent
	fmovm.x		FP_SCR0(%a6),&0x40	# return EXOP in fp1
	mov.l		(%sp)+,%d2		# restore d2
	bra.b		fsqrt_sd_ovfl_dis

#
# the move in MAY underflow. so...
#
fsqrt_sd_may_ovfl:
	btst		&0x0,1+FP_SCR0_EX(%a6)	# is exponent 0x3fff?
	bne.w		fsqrt_sd_ovfl		# yes, so overflow

	fmov.l		&0x0,%fpsr		# clear FPSR
	fmov.l		L_SCR3(%a6),%fpcr	# set FPCR

	fsqrt.x		FP_SCR0(%a6),%fp0	# perform absolute

	fmov.l		%fpsr,%d1		# save status
	fmov.l		&0x0,%fpcr		# clear FPCR

	or.l		%d1,USER_FPSR(%a6)	# save INEX2,N

	fmov.x		%fp0,%fp1		# make a copy of result
	fcmp.b		%fp1,&0x1		# is |result| >= 1.b?
	fbge.w		fsqrt_sd_ovfl_tst	# yes; overflow has occurred

# no, it didn't overflow; we have correct result
	bra.w		fsqrt_sd_normal_exit

##########################################################################

#
# input is not normalized; what is it?
#
fsqrt_not_norm:
	cmpi.b		%d1,&DENORM		# weed out DENORM
	beq.w		fsqrt_denorm
	cmpi.b		%d1,&ZERO		# weed out ZERO
	beq.b		fsqrt_zero
	cmpi.b		%d1,&INF		# weed out INF
	beq.b		fsqrt_inf
	cmpi.b		%d1,&SNAN		# weed out SNAN
	beq.l		res_snan_1op
	bra.l		res_qnan_1op

#
# 	fsqrt(+0) = +0
# 	fsqrt(-0) = -0
#	fsqrt(+INF) = +INF
# 	fsqrt(-INF) = OPERR
#
fsqrt_zero:
	tst.b		SRC_EX(%a0)		# is ZERO positive or negative?
	bmi.b		fsqrt_zero_m		# negative
fsqrt_zero_p:	
	fmov.s		&0x00000000,%fp0	# return +ZERO
	mov.b		&z_bmask,FPSR_CC(%a6)	# set 'Z' ccode bit
	rts
fsqrt_zero_m:
	fmov.s		&0x80000000,%fp0	# return -ZERO
	mov.b		&z_bmask+neg_bmask,FPSR_CC(%a6)	# set 'Z','N' ccode bits
	rts

fsqrt_inf:
	tst.b		SRC_EX(%a0)		# is INF positive or negative?
	bmi.l		res_operr		# negative
fsqrt_inf_p:
	fmovm.x		SRC(%a0),&0x80		# return +INF in fp0
	mov.b		&inf_bmask,FPSR_CC(%a6)	# set 'I' ccode bit
	rts

#########################################################################
# XDEF ****************************************************************	#
#	fetch_dreg(): fetch register according to index in d1		#
#									#
# XREF ****************************************************************	#
#	None								#
#									#
# INPUT ***************************************************************	#
#	d1 = index of register to fetch from				#
# 									#
# OUTPUT **************************************************************	#
#	d0 = value of register fetched					#
#									#
# ALGORITHM ***********************************************************	#
#	According to the index value in d1 which can range from zero 	#
# to fifteen, load the corresponding register file value (where 	#
# address register indexes start at 8). D0/D1/A0/A1/A6/A7 are on the	#
# stack. The rest should still be in their original places.		#
#									#
#########################################################################

# this routine leaves d1 intact for subsequent store_dreg calls.
	global		fetch_dreg
fetch_dreg:
	mov.w		(tbl_fdreg.b,%pc,%d1.w*2),%d0
	jmp		(tbl_fdreg.b,%pc,%d0.w*1)

tbl_fdreg:
	short		fdreg0 - tbl_fdreg
	short		fdreg1 - tbl_fdreg
	short		fdreg2 - tbl_fdreg
	short		fdreg3 - tbl_fdreg
	short		fdreg4 - tbl_fdreg
	short		fdreg5 - tbl_fdreg
	short		fdreg6 - tbl_fdreg
	short		fdreg7 - tbl_fdreg
	short		fdreg8 - tbl_fdreg
	short		fdreg9 - tbl_fdreg
	short		fdrega - tbl_fdreg
	short		fdregb - tbl_fdreg
	short		fdregc - tbl_fdreg
	short		fdregd - tbl_fdreg
	short		fdrege - tbl_fdreg
	short		fdregf - tbl_fdreg

fdreg0:
	mov.l		EXC_DREGS+0x0(%a6),%d0
	rts
fdreg1:
	mov.l		EXC_DREGS+0x4(%a6),%d0
	rts
fdreg2:
	mov.l		%d2,%d0
	rts
fdreg3:
	mov.l		%d3,%d0
	rts
fdreg4:
	mov.l		%d4,%d0
	rts
fdreg5:
	mov.l		%d5,%d0
	rts
fdreg6:
	mov.l		%d6,%d0
	rts
fdreg7:
	mov.l		%d7,%d0
	rts
fdreg8:
	mov.l		EXC_DREGS+0x8(%a6),%d0
	rts
fdreg9:
	mov.l		EXC_DREGS+0xc(%a6),%d0
	rts
fdrega:
	mov.l		%a2,%d0
	rts
fdregb:
	mov.l		%a3,%d0
	rts
fdregc:
	mov.l		%a4,%d0
	rts
fdregd:
	mov.l		%a5,%d0
	rts
fdrege:
	mov.l		(%a6),%d0
	rts
fdregf:
	mov.l		EXC_A7(%a6),%d0
	rts

#########################################################################
# XDEF ****************************************************************	#
#	store_dreg_l(): store longword to data register specified by d1	#
#									#
# XREF ****************************************************************	#
#	None								#
#									#
# INPUT ***************************************************************	#
#	d0 = longowrd value to store					#
#	d1 = index of register to fetch from				#
# 									#
# OUTPUT **************************************************************	#
#	(data register is updated)					#
#									#
# ALGORITHM ***********************************************************	#
#	According to the index value in d1, store the longword value	#
# in d0 to the corresponding data register. D0/D1 are on the stack	#
# while the rest are in their initial places.				#
#									#
#########################################################################

	global		store_dreg_l
store_dreg_l:
	mov.w		(tbl_sdregl.b,%pc,%d1.w*2),%d1
	jmp		(tbl_sdregl.b,%pc,%d1.w*1)

tbl_sdregl:
	short		sdregl0 - tbl_sdregl
	short		sdregl1 - tbl_sdregl
	short		sdregl2 - tbl_sdregl
	short		sdregl3 - tbl_sdregl
	short		sdregl4 - tbl_sdregl
	short		sdregl5 - tbl_sdregl
	short		sdregl6 - tbl_sdregl
	short		sdregl7 - tbl_sdregl

sdregl0:
	mov.l		%d0,EXC_DREGS+0x0(%a6)
	rts
sdregl1:
	mov.l		%d0,EXC_DREGS+0x4(%a6)
	rts
sdregl2:
	mov.l		%d0,%d2
	rts
sdregl3:
	mov.l		%d0,%d3
	rts
sdregl4:
	mov.l		%d0,%d4
	rts
sdregl5:
	mov.l		%d0,%d5
	rts
sdregl6:
	mov.l		%d0,%d6
	rts
sdregl7:
	mov.l		%d0,%d7
	rts

#########################################################################
# XDEF ****************************************************************	#
#	store_dreg_w(): store word to data register specified by d1	#
#									#
# XREF ****************************************************************	#
#	None								#
#									#
# INPUT ***************************************************************	#
#	d0 = word value to store					#
#	d1 = index of register to fetch from				#
# 									#
# OUTPUT **************************************************************	#
#	(data register is updated)					#
#									#
# ALGORITHM ***********************************************************	#
#	According to the index value in d1, store the word value	#
# in d0 to the corresponding data register. D0/D1 are on the stack	#
# while the rest are in their initial places.				#
#									#
#########################################################################

	global		store_dreg_w
store_dreg_w:
	mov.w		(tbl_sdregw.b,%pc,%d1.w*2),%d1
	jmp		(tbl_sdregw.b,%pc,%d1.w*1)

tbl_sdregw:
	short		sdregw0 - tbl_sdregw
	short		sdregw1 - tbl_sdregw
	short		sdregw2 - tbl_sdregw
	short		sdregw3 - tbl_sdregw
	short		sdregw4 - tbl_sdregw
	short		sdregw5 - tbl_sdregw
	short		sdregw6 - tbl_sdregw
	short		sdregw7 - tbl_sdregw

sdregw0:
	mov.w		%d0,2+EXC_DREGS+0x0(%a6)
	rts
sdregw1:
	mov.w		%d0,2+EXC_DREGS+0x4(%a6)
	rts
sdregw2:
	mov.w		%d0,%d2
	rts
sdregw3:
	mov.w		%d0,%d3
	rts
sdregw4:
	mov.w		%d0,%d4
	rts
sdregw5:
	mov.w		%d0,%d5
	rts
sdregw6:
	mov.w		%d0,%d6
	rts
sdregw7:
	mov.w		%d0,%d7
	rts

#########################################################################
# XDEF ****************************************************************	#
#	store_dreg_b(): store byte to data register specified by d1	#
#									#
# XREF ****************************************************************	#
#	None								#
#									#
# INPUT ***************************************************************	#
#	d0 = byte value to store					#
#	d1 = index of register to fetch from				#
# 									#
# OUTPUT **************************************************************	#
#	(data register is updated)					#
#									#
# ALGORITHM ***********************************************************	#
#	According to the index value in d1, store the byte value	#
# in d0 to the corresponding data register. D0/D1 are on the stack	#
# while the rest are in their initial places.				#
#									#
#########################################################################

	global		store_dreg_b
store_dreg_b:
	mov.w		(tbl_sdregb.b,%pc,%d1.w*2),%d1
	jmp		(tbl_sdregb.b,%pc,%d1.w*1)

tbl_sdregb:
	short		sdregb0 - tbl_sdregb
	short		sdregb1 - tbl_sdregb
	short		sdregb2 - tbl_sdregb
	short		sdregb3 - tbl_sdregb
	short		sdregb4 - tbl_sdregb
	short		sdregb5 - tbl_sdregb
	short		sdregb6 - tbl_sdregb
	short		sdregb7 - tbl_sdregb

sdregb0:
	mov.b		%d0,3+EXC_DREGS+0x0(%a6)
	rts
sdregb1:
	mov.b		%d0,3+EXC_DREGS+0x4(%a6)
	rts
sdregb2:
	mov.b		%d0,%d2
	rts
sdregb3:
	mov.b		%d0,%d3
	rts
sdregb4:
	mov.b		%d0,%d4
	rts
sdregb5:
	mov.b		%d0,%d5
	rts
sdregb6:
	mov.b		%d0,%d6
	rts
sdregb7:
	mov.b		%d0,%d7
	rts

#########################################################################
# XDEF ****************************************************************	#
#	inc_areg(): increment an address register by the value in d0	#
#									#
# XREF ****************************************************************	#
#	None								#
#									#
# INPUT ***************************************************************	#
#	d0 = amount to increment by					#
#	d1 = index of address register to increment			#
# 									#
# OUTPUT **************************************************************	#
#	(address register is updated)					#
#									#
# ALGORITHM ***********************************************************	#
# 	Typically used for an instruction w/ a post-increment <ea>, 	#
# this routine adds the increment value in d0 to the address register	#
# specified by d1. A0/A1/A6/A7 reside on the stack. The rest reside	#
# in their original places.						#
# 	For a7, if the increment amount is one, then we have to 	#
# increment by two. For any a7 update, set the mia7_flag so that if	#
# an access error exception occurs later in emulation, this address	#
# register update can be undone.					#
#									#
#########################################################################

	global		inc_areg
inc_areg:
	mov.w		(tbl_iareg.b,%pc,%d1.w*2),%d1
	jmp		(tbl_iareg.b,%pc,%d1.w*1)

tbl_iareg:
	short		iareg0 - tbl_iareg
	short		iareg1 - tbl_iareg
	short		iareg2 - tbl_iareg
	short		iareg3 - tbl_iareg
	short		iareg4 - tbl_iareg
	short		iareg5 - tbl_iareg
	short		iareg6 - tbl_iareg
	short		iareg7 - tbl_iareg

iareg0:	add.l		%d0,EXC_DREGS+0x8(%a6)
	rts
iareg1:	add.l		%d0,EXC_DREGS+0xc(%a6)
	rts
iareg2:	add.l		%d0,%a2
	rts
iareg3:	add.l		%d0,%a3
	rts
iareg4:	add.l		%d0,%a4
	rts
iareg5:	add.l		%d0,%a5
	rts
iareg6:	add.l		%d0,(%a6)
	rts
iareg7:	mov.b		&mia7_flg,SPCOND_FLG(%a6)
	cmpi.b		%d0,&0x1
	beq.b		iareg7b
	add.l		%d0,EXC_A7(%a6)
	rts
iareg7b:
	addq.l		&0x2,EXC_A7(%a6)
	rts

#########################################################################
# XDEF ****************************************************************	#
#	dec_areg(): decrement an address register by the value in d0	#
#									#
# XREF ****************************************************************	#
#	None								#
#									#
# INPUT ***************************************************************	#
#	d0 = amount to decrement by					#
#	d1 = index of address register to decrement			#
# 									#
# OUTPUT **************************************************************	#
#	(address register is updated)					#
#									#
# ALGORITHM ***********************************************************	#
# 	Typically used for an instruction w/ a pre-decrement <ea>, 	#
# this routine adds the decrement value in d0 to the address register	#
# specified by d1. A0/A1/A6/A7 reside on the stack. The rest reside	#
# in their original places.						#
# 	For a7, if the decrement amount is one, then we have to 	#
# decrement by two. For any a7 update, set the mda7_flag so that if	#
# an access error exception occurs later in emulation, this address	#
# register update can be undone.					#
#									#
#########################################################################

	global		dec_areg
dec_areg:
	mov.w		(tbl_dareg.b,%pc,%d1.w*2),%d1
	jmp		(tbl_dareg.b,%pc,%d1.w*1)

tbl_dareg:
	short		dareg0 - tbl_dareg
	short		dareg1 - tbl_dareg
	short		dareg2 - tbl_dareg
	short		dareg3 - tbl_dareg
	short		dareg4 - tbl_dareg
	short		dareg5 - tbl_dareg
	short		dareg6 - tbl_dareg
	short		dareg7 - tbl_dareg

dareg0:	sub.l		%d0,EXC_DREGS+0x8(%a6)
	rts
dareg1:	sub.l		%d0,EXC_DREGS+0xc(%a6)
	rts
dareg2:	sub.l		%d0,%a2
	rts
dareg3:	sub.l		%d0,%a3
	rts
dareg4:	sub.l		%d0,%a4
	rts
dareg5:	sub.l		%d0,%a5
	rts
dareg6:	sub.l		%d0,(%a6)
	rts
dareg7:	mov.b		&mda7_flg,SPCOND_FLG(%a6)
	cmpi.b		%d0,&0x1
	beq.b		dareg7b
	sub.l		%d0,EXC_A7(%a6)
	rts
dareg7b:
	subq.l		&0x2,EXC_A7(%a6)
	rts

##############################################################################

#########################################################################
# XDEF ****************************************************************	#
#	load_fpn1(): load FP register value into FP_SRC(a6).		#
#									#
# XREF ****************************************************************	#
#	None								#
#									#
# INPUT ***************************************************************	#
#	d0 = index of FP register to load				#
# 									#
# OUTPUT **************************************************************	#
#	FP_SRC(a6) = value loaded from FP register file			#
#									#
# ALGORITHM ***********************************************************	#
#	Using the index in d0, load FP_SRC(a6) with a number from the 	#
# FP register file.							#
#									#
#########################################################################

	global 		load_fpn1
load_fpn1:
	mov.w		(tbl_load_fpn1.b,%pc,%d0.w*2), %d0
	jmp		(tbl_load_fpn1.b,%pc,%d0.w*1)

tbl_load_fpn1:
	short		load_fpn1_0 - tbl_load_fpn1
	short		load_fpn1_1 - tbl_load_fpn1
	short		load_fpn1_2 - tbl_load_fpn1
	short		load_fpn1_3 - tbl_load_fpn1
	short		load_fpn1_4 - tbl_load_fpn1
	short		load_fpn1_5 - tbl_load_fpn1
	short		load_fpn1_6 - tbl_load_fpn1
	short		load_fpn1_7 - tbl_load_fpn1

load_fpn1_0:
	mov.l		0+EXC_FP0(%a6), 0+FP_SRC(%a6)
	mov.l		4+EXC_FP0(%a6), 4+FP_SRC(%a6)
	mov.l		8+EXC_FP0(%a6), 8+FP_SRC(%a6)
	lea		FP_SRC(%a6), %a0
	rts
load_fpn1_1:
	mov.l		0+EXC_FP1(%a6), 0+FP_SRC(%a6)
	mov.l		4+EXC_FP1(%a6), 4+FP_SRC(%a6)
	mov.l		8+EXC_FP1(%a6), 8+FP_SRC(%a6)
	lea		FP_SRC(%a6), %a0
	rts
load_fpn1_2:
	fmovm.x		&0x20, FP_SRC(%a6)
	lea		FP_SRC(%a6), %a0
	rts
load_fpn1_3:
	fmovm.x		&0x10, FP_SRC(%a6)
	lea		FP_SRC(%a6), %a0
	rts
load_fpn1_4:
	fmovm.x		&0x08, FP_SRC(%a6)
	lea		FP_SRC(%a6), %a0
	rts
load_fpn1_5:
	fmovm.x		&0x04, FP_SRC(%a6)
	lea		FP_SRC(%a6), %a0
	rts
load_fpn1_6:
	fmovm.x		&0x02, FP_SRC(%a6)
	lea		FP_SRC(%a6), %a0
	rts
load_fpn1_7:
	fmovm.x		&0x01, FP_SRC(%a6)
	lea		FP_SRC(%a6), %a0
	rts

#############################################################################

#########################################################################
# XDEF ****************************************************************	#
#	load_fpn2(): load FP register value into FP_DST(a6).		#
#									#
# XREF ****************************************************************	#
#	None								#
#									#
# INPUT ***************************************************************	#
#	d0 = index of FP register to load				#
# 									#
# OUTPUT **************************************************************	#
#	FP_DST(a6) = value loaded from FP register file			#
#									#
# ALGORITHM ***********************************************************	#
#	Using the index in d0, load FP_DST(a6) with a number from the 	#
# FP register file.							#
#									#
#########################################################################

	global		load_fpn2
load_fpn2:
	mov.w		(tbl_load_fpn2.b,%pc,%d0.w*2), %d0
	jmp		(tbl_load_fpn2.b,%pc,%d0.w*1)

tbl_load_fpn2:
	short		load_fpn2_0 - tbl_load_fpn2
	short		load_fpn2_1 - tbl_load_fpn2
	short		load_fpn2_2 - tbl_load_fpn2
	short		load_fpn2_3 - tbl_load_fpn2
	short		load_fpn2_4 - tbl_load_fpn2
	short		load_fpn2_5 - tbl_load_fpn2
	short		load_fpn2_6 - tbl_load_fpn2
	short		load_fpn2_7 - tbl_load_fpn2

load_fpn2_0:
	mov.l		0+EXC_FP0(%a6), 0+FP_DST(%a6)
	mov.l		4+EXC_FP0(%a6), 4+FP_DST(%a6)
	mov.l		8+EXC_FP0(%a6), 8+FP_DST(%a6)
	lea		FP_DST(%a6), %a0
	rts
load_fpn2_1:
	mov.l		0+EXC_FP1(%a6), 0+FP_DST(%a6)
	mov.l		4+EXC_FP1(%a6), 4+FP_DST(%a6)
	mov.l		8+EXC_FP1(%a6), 8+FP_DST(%a6)
	lea		FP_DST(%a6), %a0
	rts
load_fpn2_2:
	fmovm.x		&0x20, FP_DST(%a6)
	lea		FP_DST(%a6), %a0
	rts
load_fpn2_3:
	fmovm.x		&0x10, FP_DST(%a6)
	lea		FP_DST(%a6), %a0
	rts
load_fpn2_4:
	fmovm.x		&0x08, FP_DST(%a6)
	lea		FP_DST(%a6), %a0
	rts
load_fpn2_5:
	fmovm.x		&0x04, FP_DST(%a6)
	lea		FP_DST(%a6), %a0
	rts
load_fpn2_6:
	fmovm.x		&0x02, FP_DST(%a6)
	lea		FP_DST(%a6), %a0
	rts
load_fpn2_7:
	fmovm.x		&0x01, FP_DST(%a6)
	lea		FP_DST(%a6), %a0
	rts

#############################################################################

#########################################################################
# XDEF ****************************************************************	#
# 	store_fpreg(): store an fp value to the fpreg designated d0.	#
#									#
# XREF ****************************************************************	#
#	None								#
#									#
# INPUT ***************************************************************	#
#	fp0 = extended precision value to store				#
#	d0  = index of floating-point register				#
# 									#
# OUTPUT **************************************************************	#
#	None								#
#									#
# ALGORITHM ***********************************************************	#
#	Store the value in fp0 to the FP register designated by the	#
# value in d0. The FP number can be DENORM or SNAN so we have to be	#
# careful that we don't take an exception here.				#
#									#
#########################################################################

	global		store_fpreg
store_fpreg:
	mov.w		(tbl_store_fpreg.b,%pc,%d0.w*2), %d0
	jmp		(tbl_store_fpreg.b,%pc,%d0.w*1)

tbl_store_fpreg:
	short		store_fpreg_0 - tbl_store_fpreg
	short		store_fpreg_1 - tbl_store_fpreg
	short		store_fpreg_2 - tbl_store_fpreg
	short		store_fpreg_3 - tbl_store_fpreg
	short		store_fpreg_4 - tbl_store_fpreg
	short		store_fpreg_5 - tbl_store_fpreg
	short		store_fpreg_6 - tbl_store_fpreg
	short		store_fpreg_7 - tbl_store_fpreg

store_fpreg_0:
	fmovm.x		&0x80, EXC_FP0(%a6)
	rts
store_fpreg_1:
	fmovm.x		&0x80, EXC_FP1(%a6)
	rts
store_fpreg_2:
	fmovm.x 	&0x01, -(%sp)
	fmovm.x		(%sp)+, &0x20
	rts
store_fpreg_3:
	fmovm.x 	&0x01, -(%sp)
	fmovm.x		(%sp)+, &0x10
	rts
store_fpreg_4:
	fmovm.x 	&0x01, -(%sp)
	fmovm.x		(%sp)+, &0x08
	rts
store_fpreg_5:
	fmovm.x 	&0x01, -(%sp)
	fmovm.x		(%sp)+, &0x04
	rts
store_fpreg_6:
	fmovm.x 	&0x01, -(%sp)
	fmovm.x		(%sp)+, &0x02
	rts
store_fpreg_7:
	fmovm.x 	&0x01, -(%sp)
	fmovm.x		(%sp)+, &0x01
	rts

#########################################################################
# XDEF ****************************************************************	#
#	get_packed(): fetch a packed operand from memory and then	#
#		      convert it to a floating-point binary number.	#
#									#
# XREF ****************************************************************	#
#	_dcalc_ea() - calculate the correct <ea>			#
#	_mem_read() - fetch the packed operand from memory		#
#	facc_in_x() - the fetch failed so jump to special exit code	#
#	decbin()    - convert packed to binary extended precision	#
#									#
# INPUT ***************************************************************	#
#	None								#
# 									#
# OUTPUT **************************************************************	#
#	If no failure on _mem_read():					#
# 	FP_SRC(a6) = packed operand now as a binary FP number		#
#									#
# ALGORITHM ***********************************************************	#
#	Get the correct <ea> whihc is the value on the exception stack 	#
# frame w/ maybe a correction factor if the <ea> is -(an) or (an)+.	#
# Then, fetch the operand from memory. If the fetch fails, exit		#
# through facc_in_x().							#
#	If the packed operand is a ZERO,NAN, or INF, convert it to	#
# its binary representation here. Else, call decbin() which will 	#
# convert the packed value to an extended precision binary value.	#
#									#
#########################################################################

# the stacked <ea> for packed is correct except for -(An).
# the base reg must be updated for both -(An) and (An)+.
	global		get_packed
get_packed:
	mov.l		&0xc,%d0		# packed is 12 bytes
	bsr.l		_dcalc_ea		# fetch <ea>; correct An

	lea		FP_SRC(%a6),%a1		# pass: ptr to super dst
	mov.l		&0xc,%d0		# pass: 12 bytes
	bsr.l		_dmem_read		# read packed operand

	tst.l		%d1			# did dfetch fail?
	bne.l		facc_in_x		# yes

# The packed operand is an INF or a NAN if the exponent field is all ones.
	bfextu		FP_SRC(%a6){&1:&15},%d0	# get exp
	cmpi.w		%d0,&0x7fff		# INF or NAN?
	bne.b		gp_try_zero		# no
	rts					# operand is an INF or NAN

# The packed operand is a zero if the mantissa is all zero, else it's
# a normal packed op.
gp_try_zero:
	mov.b		3+FP_SRC(%a6),%d0	# get byte 4
	andi.b		&0x0f,%d0		# clear all but last nybble
	bne.b		gp_not_spec		# not a zero
	tst.l		FP_SRC_HI(%a6)		# is lw 2 zero?
	bne.b		gp_not_spec		# not a zero
	tst.l		FP_SRC_LO(%a6)		# is lw 3 zero?
	bne.b		gp_not_spec		# not a zero
	rts					# operand is a ZERO
gp_not_spec:
	lea		FP_SRC(%a6),%a0		# pass: ptr to packed op
	bsr.l		decbin			# convert to extended
	fmovm.x		&0x80,FP_SRC(%a6)	# make this the srcop
	rts

#########################################################################
# decbin(): Converts normalized packed bcd value pointed to by register	#
#	    a0 to extended-precision value in fp0.			#
#									#
# INPUT ***************************************************************	#
#	a0 = pointer to normalized packed bcd value			#
#									#
# OUTPUT **************************************************************	#
#	fp0 = exact fp representation of the packed bcd value.		#
#									#
# ALGORITHM ***********************************************************	#
#	Expected is a normal bcd (i.e. non-exceptional; all inf, zero,	#
#	and NaN operands are dispatched without entering this routine)	#
#	value in 68881/882 format at location (a0).			#
#									#
#	A1. Convert the bcd exponent to binary by successive adds and 	#
#	muls. Set the sign according to SE. Subtract 16 to compensate	#
#	for the mantissa which is to be interpreted as 17 integer	#
#	digits, rather than 1 integer and 16 fraction digits.		#
#	Note: this operation can never overflow.			#
#									#
#	A2. Convert the bcd mantissa to binary by successive		#
#	adds and muls in FP0. Set the sign according to SM.		#
#	The mantissa digits will be converted with the decimal point	#
#	assumed following the least-significant digit.			#
#	Note: this operation can never overflow.			#
#									#
#	A3. Count the number of leading/trailing zeros in the		#
#	bcd string.  If SE is positive, count the leading zeros;	#
#	if negative, count the trailing zeros.  Set the adjusted	#
#	exponent equal to the exponent from A1 and the zero count	#
#	added if SM = 1 and subtracted if SM = 0.  Scale the		#
#	mantissa the equivalent of forcing in the bcd value:		#
#									#
#	SM = 0	a non-zero digit in the integer position		#
#	SM = 1	a non-zero digit in Mant0, lsd of the fraction		#
#									#
#	this will insure that any value, regardless of its		#
#	representation (ex. 0.1E2, 1E1, 10E0, 100E-1), is converted	#
#	consistently.							#
#									#
#	A4. Calculate the factor 10^exp in FP1 using a table of		#
#	10^(2^n) values.  To reduce the error in forming factors	#
#	greater than 10^27, a directed rounding scheme is used with	#
#	tables rounded to RN, RM, and RP, according to the table	#
#	in the comments of the pwrten section.				#
#									#
#	A5. Form the final binary number by scaling the mantissa by	#
#	the exponent factor.  This is done by multiplying the		#
#	mantissa in FP0 by the factor in FP1 if the adjusted		#
#	exponent sign is positive, and dividing FP0 by FP1 if		#
#	it is negative.							#
#									#
#	Clean up and return. Check if the final mul or div was inexact.	#
#	If so, set INEX1 in USER_FPSR.					#
#									#
#########################################################################

#
#	PTENRN, PTENRM, and PTENRP are arrays of powers of 10 rounded
#	to nearest, minus, and plus, respectively.  The tables include
#	10**{1,2,4,8,16,32,64,128,256,512,1024,2048,4096}.  No rounding
#	is required until the power is greater than 27, however, all
#	tables include the first 5 for ease of indexing.
#
RTABLE:
	byte		0,0,0,0
	byte		2,3,2,3
	byte		2,3,3,2
	byte		3,2,2,3

	set		FNIBS,7
	set		FSTRT,0

	set		ESTRT,4
	set		EDIGITS,2

	global		decbin
decbin:
	mov.l		0x0(%a0),FP_SCR0_EX(%a6) # make a copy of input 
	mov.l		0x4(%a0),FP_SCR0_HI(%a6) # so we don't alter it
	mov.l		0x8(%a0),FP_SCR0_LO(%a6)

	lea		FP_SCR0(%a6),%a0

	movm.l		&0x3c00,-(%sp)		# save d2-d5
	fmovm.x		&0x1,-(%sp)		# save fp1
#
# Calculate exponent:
#  1. Copy bcd value in memory for use as a working copy.
#  2. Calculate absolute value of exponent in d1 by mul and add.
#  3. Correct for exponent sign.
#  4. Subtract 16 to compensate for interpreting the mant as all integer digits.
#     (i.e., all digits assumed left of the decimal point.)
#
# Register usage:
#
#  calc_e:
#	(*)  d0: temp digit storage
#	(*)  d1: accumulator for binary exponent
#	(*)  d2: digit count
#	(*)  d3: offset pointer
#	( )  d4: first word of bcd
#	( )  a0: pointer to working bcd value
#	( )  a6: pointer to original bcd value
#	(*)  FP_SCR1: working copy of original bcd value
#	(*)  L_SCR1: copy of original exponent word
#
calc_e:
	mov.l		&EDIGITS,%d2		# # of nibbles (digits) in fraction part
	mov.l		&ESTRT,%d3		# counter to pick up digits
	mov.l		(%a0),%d4		# get first word of bcd
	clr.l		%d1			# zero d1 for accumulator
e_gd:
	mulu.l		&0xa,%d1		# mul partial product by one digit place
	bfextu		%d4{%d3:&4},%d0		# get the digit and zero extend into d0
	add.l		%d0,%d1			# d1 = d1 + d0
	addq.b		&4,%d3			# advance d3 to the next digit
	dbf.w		%d2,e_gd		# if we have used all 3 digits, exit loop
	btst		&30,%d4			# get SE
	beq.b		e_pos			# don't negate if pos
	neg.l		%d1			# negate before subtracting
e_pos:
	sub.l		&16,%d1			# sub to compensate for shift of mant
	bge.b		e_save			# if still pos, do not neg
	neg.l		%d1			# now negative, make pos and set SE
	or.l		&0x40000000,%d4		# set SE in d4,
	or.l		&0x40000000,(%a0)	# and in working bcd
e_save:
	mov.l		%d1,-(%sp)		# save exp on stack
#
#
# Calculate mantissa:
#  1. Calculate absolute value of mantissa in fp0 by mul and add.
#  2. Correct for mantissa sign.
#     (i.e., all digits assumed left of the decimal point.)
#
# Register usage:
#
#  calc_m:
#	(*)  d0: temp digit storage
#	(*)  d1: lword counter
#	(*)  d2: digit count
#	(*)  d3: offset pointer
#	( )  d4: words 2 and 3 of bcd
#	( )  a0: pointer to working bcd value
#	( )  a6: pointer to original bcd value
#	(*) fp0: mantissa accumulator
#	( )  FP_SCR1: working copy of original bcd value
#	( )  L_SCR1: copy of original exponent word
#
calc_m:
	mov.l		&1,%d1			# word counter, init to 1
	fmov.s		&0x00000000,%fp0	# accumulator
#
#
#  Since the packed number has a long word between the first & second parts,
#  get the integer digit then skip down & get the rest of the
#  mantissa.  We will unroll the loop once.
#
	bfextu		(%a0){&28:&4},%d0	# integer part is ls digit in long word
	fadd.b		%d0,%fp0		# add digit to sum in fp0
#
#
#  Get the rest of the mantissa.
#
loadlw:
	mov.l		(%a0,%d1.L*4),%d4	# load mantissa lonqword into d4
	mov.l		&FSTRT,%d3		# counter to pick up digits
	mov.l		&FNIBS,%d2		# reset number of digits per a0 ptr
md2b:
	fmul.s		&0x41200000,%fp0	# fp0 = fp0 * 10
	bfextu		%d4{%d3:&4},%d0		# get the digit and zero extend
	fadd.b		%d0,%fp0		# fp0 = fp0 + digit
#
#
#  If all the digits (8) in that long word have been converted (d2=0),
#  then inc d1 (=2) to point to the next long word and reset d3 to 0
#  to initialize the digit offset, and set d2 to 7 for the digit count;
#  else continue with this long word.
#
	addq.b		&4,%d3			# advance d3 to the next digit
	dbf.w		%d2,md2b		# check for last digit in this lw
nextlw:
	addq.l		&1,%d1			# inc lw pointer in mantissa
	cmp.l		%d1,&2			# test for last lw
	ble.b		loadlw			# if not, get last one
#
#  Check the sign of the mant and make the value in fp0 the same sign.
#
m_sign:
	btst		&31,(%a0)		# test sign of the mantissa
	beq.b		ap_st_z			# if clear, go to append/strip zeros
	fneg.x		%fp0			# if set, negate fp0
#
# Append/strip zeros:
#
#  For adjusted exponents which have an absolute value greater than 27*,
#  this routine calculates the amount needed to normalize the mantissa
#  for the adjusted exponent.  That number is subtracted from the exp
#  if the exp was positive, and added if it was negative.  The purpose
#  of this is to reduce the value of the exponent and the possibility
#  of error in calculation of pwrten.
#
#  1. Branch on the sign of the adjusted exponent.
#  2p.(positive exp)
#   2. Check M16 and the digits in lwords 2 and 3 in decending order.
#   3. Add one for each zero encountered until a non-zero digit.
#   4. Subtract the count from the exp.
#   5. Check if the exp has crossed zero in #3 above; make the exp abs
#	   and set SE.
#	6. Multiply the mantissa by 10**count.
#  2n.(negative exp)
#   2. Check the digits in lwords 3 and 2 in decending order.
#   3. Add one for each zero encountered until a non-zero digit.
#   4. Add the count to the exp.
#   5. Check if the exp has crossed zero in #3 above; clear SE.
#   6. Divide the mantissa by 10**count.
#
#  *Why 27?  If the adjusted exponent is within -28 < expA < 28, than
#   any adjustment due to append/strip zeros will drive the resultane
#   exponent towards zero.  Since all pwrten constants with a power
#   of 27 or less are exact, there is no need to use this routine to
#   attempt to lessen the resultant exponent.
#
# Register usage:
#
#  ap_st_z:
#	(*)  d0: temp digit storage
#	(*)  d1: zero count
#	(*)  d2: digit count
#	(*)  d3: offset pointer
#	( )  d4: first word of bcd
#	(*)  d5: lword counter
#	( )  a0: pointer to working bcd value
#	( )  FP_SCR1: working copy of original bcd value
#	( )  L_SCR1: copy of original exponent word
#
#
# First check the absolute value of the exponent to see if this
# routine is necessary.  If so, then check the sign of the exponent
# and do append (+) or strip (-) zeros accordingly.
# This section handles a positive adjusted exponent.
#
ap_st_z:
	mov.l		(%sp),%d1		# load expA for range test
	cmp.l		%d1,&27			# test is with 27
	ble.w		pwrten			# if abs(expA) <28, skip ap/st zeros
	btst		&30,(%a0)		# check sign of exp
	bne.b		ap_st_n			# if neg, go to neg side
	clr.l		%d1			# zero count reg
	mov.l		(%a0),%d4		# load lword 1 to d4
	bfextu		%d4{&28:&4},%d0		# get M16 in d0
	bne.b		ap_p_fx			# if M16 is non-zero, go fix exp
	addq.l		&1,%d1			# inc zero count
	mov.l		&1,%d5			# init lword counter
	mov.l		(%a0,%d5.L*4),%d4	# get lword 2 to d4
	bne.b		ap_p_cl			# if lw 2 is zero, skip it
	addq.l		&8,%d1			# and inc count by 8
	addq.l		&1,%d5			# inc lword counter
	mov.l		(%a0,%d5.L*4),%d4	# get lword 3 to d4
ap_p_cl:
	clr.l		%d3			# init offset reg
	mov.l		&7,%d2			# init digit counter
ap_p_gd:
	bfextu		%d4{%d3:&4},%d0		# get digit
	bne.b		ap_p_fx			# if non-zero, go to fix exp
	addq.l		&4,%d3			# point to next digit
	addq.l		&1,%d1			# inc digit counter
	dbf.w		%d2,ap_p_gd		# get next digit
ap_p_fx:
	mov.l		%d1,%d0			# copy counter to d2
	mov.l		(%sp),%d1		# get adjusted exp from memory
	sub.l		%d0,%d1			# subtract count from exp
	bge.b		ap_p_fm			# if still pos, go to pwrten
	neg.l		%d1			# now its neg; get abs
	mov.l		(%a0),%d4		# load lword 1 to d4
	or.l		&0x40000000,%d4		# and set SE in d4
	or.l		&0x40000000,(%a0)	# and in memory
#
# Calculate the mantissa multiplier to compensate for the striping of
# zeros from the mantissa.
#
ap_p_fm:
	lea.l		PTENRN(%pc),%a1		# get address of power-of-ten table
	clr.l		%d3			# init table index
	fmov.s		&0x3f800000,%fp1	# init fp1 to 1
	mov.l		&3,%d2			# init d2 to count bits in counter
ap_p_el:
	asr.l		&1,%d0			# shift lsb into carry
	bcc.b		ap_p_en			# if 1, mul fp1 by pwrten factor
	fmul.x		(%a1,%d3),%fp1		# mul by 10**(d3_bit_no)
ap_p_en:
	add.l		&12,%d3			# inc d3 to next rtable entry
	tst.l		%d0			# check if d0 is zero
	bne.b		ap_p_el			# if not, get next bit
	fmul.x		%fp1,%fp0		# mul mantissa by 10**(no_bits_shifted)
	bra.b		pwrten			# go calc pwrten
#
# This section handles a negative adjusted exponent.
#
ap_st_n:
	clr.l		%d1			# clr counter
	mov.l		&2,%d5			# set up d5 to point to lword 3
	mov.l		(%a0,%d5.L*4),%d4	# get lword 3
	bne.b		ap_n_cl			# if not zero, check digits
	sub.l		&1,%d5			# dec d5 to point to lword 2
	addq.l		&8,%d1			# inc counter by 8
	mov.l		(%a0,%d5.L*4),%d4	# get lword 2
ap_n_cl:
	mov.l		&28,%d3			# point to last digit
	mov.l		&7,%d2			# init digit counter
ap_n_gd:
	bfextu		%d4{%d3:&4},%d0		# get digit
	bne.b		ap_n_fx			# if non-zero, go to exp fix
	subq.l		&4,%d3			# point to previous digit
	addq.l		&1,%d1			# inc digit counter
	dbf.w		%d2,ap_n_gd		# get next digit
ap_n_fx:
	mov.l		%d1,%d0			# copy counter to d0
	mov.l		(%sp),%d1		# get adjusted exp from memory
	sub.l		%d0,%d1			# subtract count from exp
	bgt.b		ap_n_fm			# if still pos, go fix mantissa
	neg.l		%d1			# take abs of exp and clr SE
	mov.l		(%a0),%d4		# load lword 1 to d4
	and.l		&0xbfffffff,%d4		# and clr SE in d4
	and.l		&0xbfffffff,(%a0)	# and in memory
#
# Calculate the mantissa multiplier to compensate for the appending of
# zeros to the mantissa.
#
ap_n_fm:
	lea.l		PTENRN(%pc),%a1		# get address of power-of-ten table
	clr.l		%d3			# init table index
	fmov.s		&0x3f800000,%fp1	# init fp1 to 1
	mov.l		&3,%d2			# init d2 to count bits in counter
ap_n_el:
	asr.l		&1,%d0			# shift lsb into carry
	bcc.b		ap_n_en			# if 1, mul fp1 by pwrten factor
	fmul.x		(%a1,%d3),%fp1		# mul by 10**(d3_bit_no)
ap_n_en:
	add.l		&12,%d3			# inc d3 to next rtable entry
	tst.l		%d0			# check if d0 is zero
	bne.b		ap_n_el			# if not, get next bit
	fdiv.x		%fp1,%fp0		# div mantissa by 10**(no_bits_shifted)
#
#
# Calculate power-of-ten factor from adjusted and shifted exponent.
#
# Register usage:
#
#  pwrten:
#	(*)  d0: temp
#	( )  d1: exponent
#	(*)  d2: {FPCR[6:5],SM,SE} as index in RTABLE; temp
#	(*)  d3: FPCR work copy
#	( )  d4: first word of bcd
#	(*)  a1: RTABLE pointer
#  calc_p:
#	(*)  d0: temp
#	( )  d1: exponent
#	(*)  d3: PWRTxx table index
#	( )  a0: pointer to working copy of bcd
#	(*)  a1: PWRTxx pointer
#	(*) fp1: power-of-ten accumulator
#
# Pwrten calculates the exponent factor in the selected rounding mode
# according to the following table:
#	
#	Sign of Mant  Sign of Exp  Rounding Mode  PWRTEN Rounding Mode
#
#	ANY	  ANY	RN	RN
#
#	 +	   +	RP	RP
#	 -	   +	RP	RM
#	 +	   -	RP	RM
#	 -	   -	RP	RP
#
#	 +	   +	RM	RM
#	 -	   +	RM	RP
#	 +	   -	RM	RP
#	 -	   -	RM	RM
#
#	 +	   +	RZ	RM
#	 -	   +	RZ	RM
#	 +	   -	RZ	RP
#	 -	   -	RZ	RP
#
#
pwrten:
	mov.l		USER_FPCR(%a6),%d3	# get user's FPCR
	bfextu		%d3{&26:&2},%d2		# isolate rounding mode bits
	mov.l		(%a0),%d4		# reload 1st bcd word to d4
	asl.l		&2,%d2			# format d2 to be
	bfextu		%d4{&0:&2},%d0		# {FPCR[6],FPCR[5],SM,SE}
	add.l		%d0,%d2			# in d2 as index into RTABLE
	lea.l		RTABLE(%pc),%a1		# load rtable base
	mov.b		(%a1,%d2),%d0		# load new rounding bits from table
	clr.l		%d3			# clear d3 to force no exc and extended
	bfins		%d0,%d3{&26:&2}		# stuff new rounding bits in FPCR
	fmov.l		%d3,%fpcr		# write new FPCR
	asr.l		&1,%d0			# write correct PTENxx table
	bcc.b		not_rp			# to a1
	lea.l		PTENRP(%pc),%a1		# it is RP
	bra.b		calc_p			# go to init section
not_rp:
	asr.l		&1,%d0			# keep checking
	bcc.b		not_rm
	lea.l		PTENRM(%pc),%a1		# it is RM
	bra.b		calc_p			# go to init section
not_rm:
	lea.l		PTENRN(%pc),%a1		# it is RN
calc_p:
	mov.l		%d1,%d0			# copy exp to d0;use d0
	bpl.b		no_neg			# if exp is negative,
	neg.l		%d0			# invert it
	or.l		&0x40000000,(%a0)	# and set SE bit
no_neg:
	clr.l		%d3			# table index
	fmov.s		&0x3f800000,%fp1	# init fp1 to 1
e_loop:
	asr.l		&1,%d0			# shift next bit into carry
	bcc.b		e_next			# if zero, skip the mul
	fmul.x		(%a1,%d3),%fp1		# mul by 10**(d3_bit_no)
e_next:
	add.l		&12,%d3			# inc d3 to next rtable entry
	tst.l		%d0			# check if d0 is zero
	bne.b		e_loop			# not zero, continue shifting
#
#
#  Check the sign of the adjusted exp and make the value in fp0 the
#  same sign. If the exp was pos then multiply fp1*fp0;
#  else divide fp0/fp1.
#
# Register Usage:
#  norm:
#	( )  a0: pointer to working bcd value
#	(*) fp0: mantissa accumulator
#	( ) fp1: scaling factor - 10**(abs(exp))
#
pnorm:
	btst		&30,(%a0)		# test the sign of the exponent
	beq.b		mul			# if clear, go to multiply
div:
	fdiv.x		%fp1,%fp0		# exp is negative, so divide mant by exp
	bra.b		end_dec
mul:
	fmul.x		%fp1,%fp0		# exp is positive, so multiply by exp
#
#
# Clean up and return with result in fp0.
#
# If the final mul/div in decbin incurred an inex exception,
# it will be inex2, but will be reported as inex1 by get_op.
#
end_dec:
	fmov.l		%fpsr,%d0		# get status register	
	bclr		&inex2_bit+8,%d0	# test for inex2 and clear it
	beq.b		no_exc			# skip this if no exc
	ori.w		&inx1a_mask,2+USER_FPSR(%a6) # set INEX1/AINEX
no_exc:
	add.l		&0x4,%sp		# clear 1 lw param
	fmovm.x		(%sp)+,&0x40		# restore fp1
	movm.l		(%sp)+,&0x3c		# restore d2-d5
	fmov.l		&0x0,%fpcr
	fmov.l		&0x0,%fpsr
	rts

#########################################################################
# bindec(): Converts an input in extended precision format to bcd format#
#									#
# INPUT ***************************************************************	#
#	a0 = pointer to the input extended precision value in memory.	#
#	     the input may be either normalized, unnormalized, or 	#
#	     denormalized.						#
#	d0 = contains the k-factor sign-extended to 32-bits. 		#
#									#
# OUTPUT **************************************************************	#
#	FP_SCR0(a6) = bcd format result on the stack.			#
#									#
# ALGORITHM ***********************************************************	#
#									#
#	A1.	Set RM and size ext;  Set SIGMA = sign of input.  	#
#		The k-factor is saved for use in d7. Clear the		#
#		BINDEC_FLG for separating normalized/denormalized	#
#		input.  If input is unnormalized or denormalized,	#
#		normalize it.						#
#									#
#	A2.	Set X = abs(input).					#
#									#
#	A3.	Compute ILOG.						#
#		ILOG is the log base 10 of the input value.  It is	#
#		approximated by adding e + 0.f when the original 	#
#		value is viewed as 2^^e * 1.f in extended precision.  	#
#		This value is stored in d6.				#
#									#
#	A4.	Clr INEX bit.						#
#		The operation in A3 above may have set INEX2.  		#
#									#
#	A5.	Set ICTR = 0;						#
#		ICTR is a flag used in A13.  It must be set before the 	#
#		loop entry A6.						#
#									#
#	A6.	Calculate LEN.						#
#		LEN is the number of digits to be displayed.  The	#
#		k-factor can dictate either the total number of digits,	#
#		if it is a positive number, or the number of digits	#
#		after the decimal point which are to be included as	#
#		significant.  See the 68882 manual for examples.	#
#		If LEN is computed to be greater than 17, set OPERR in	#
#		USER_FPSR.  LEN is stored in d4.			#
#									#
#	A7.	Calculate SCALE.					#
#		SCALE is equal to 10^ISCALE, where ISCALE is the number	#
#		of decimal places needed to insure LEN integer digits	#
#		in the output before conversion to bcd. LAMBDA is the	#
#		sign of ISCALE, used in A9. Fp1 contains		#
#		10^^(abs(ISCALE)) using a rounding mode which is a	#
#		function of the original rounding mode and the signs	#
#		of ISCALE and X.  A table is given in the code.		#
#									#
#	A8.	Clr INEX; Force RZ.					#
#		The operation in A3 above may have set INEX2.  		#
#		RZ mode is forced for the scaling operation to insure	#
#		only one rounding error.  The grs bits are collected in #
#		the INEX flag for use in A10.				#
#									#
#	A9.	Scale X -> Y.						#
#		The mantissa is scaled to the desired number of		#
#		significant digits.  The excess digits are collected	#
#		in INEX2.						#
#									#
#	A10.	Or in INEX.						#
#		If INEX is set, round error occurred.  This is		#
#		compensated for by 'or-ing' in the INEX2 flag to	#
#		the lsb of Y.						#
#									#
#	A11.	Restore original FPCR; set size ext.			#
#		Perform FINT operation in the user's rounding mode.	#
#		Keep the size to extended.				#
#									#
#	A12.	Calculate YINT = FINT(Y) according to user's rounding	#
#		mode.  The FPSP routine sintd0 is used.  The output	#
#		is in fp0.						#
#									#
#	A13.	Check for LEN digits.					#
#		If the int operation results in more than LEN digits,	#
#		or less than LEN -1 digits, adjust ILOG and repeat from	#
#		A6.  This test occurs only on the first pass.  If the	#
#		result is exactly 10^LEN, decrement ILOG and divide	#
#		the mantissa by 10.					#
#									#
#	A14.	Convert the mantissa to bcd.				#
#		The binstr routine is used to convert the LEN digit 	#
#		mantissa to bcd in memory.  The input to binstr is	#
#		to be a fraction; i.e. (mantissa)/10^LEN and adjusted	#
#		such that the decimal point is to the left of bit 63.	#
#		The bcd digits are stored in the correct position in 	#
#		the final string area in memory.			#
#									#
#	A15.	Convert the exponent to bcd.				#
#		As in A14 above, the exp is converted to bcd and the	#
#		digits are stored in the final string.			#
#		Test the length of the final exponent string.  If the	#
#		length is 4, set operr.					#
#									#
#	A16.	Write sign bits to final string.			#
#									#
#########################################################################

set	BINDEC_FLG,	EXC_TEMP	# DENORM flag

# Constants in extended precision
PLOG2:
	long		0x3FFD0000,0x9A209A84,0xFBCFF798,0x00000000
PLOG2UP1:
	long		0x3FFD0000,0x9A209A84,0xFBCFF799,0x00000000

# Constants in single precision
FONE:
	long		0x3F800000,0x00000000,0x00000000,0x00000000
FTWO:
	long		0x40000000,0x00000000,0x00000000,0x00000000
FTEN:
	long		0x41200000,0x00000000,0x00000000,0x00000000
F4933:
	long		0x459A2800,0x00000000,0x00000000,0x00000000

RBDTBL:
	byte		0,0,0,0
	byte		3,3,2,2
	byte		3,2,2,3
	byte		2,3,3,2

#	Implementation Notes:
#
#	The registers are used as follows:
#
#		d0: scratch; LEN input to binstr
#		d1: scratch
#		d2: upper 32-bits of mantissa for binstr
#		d3: scratch;lower 32-bits of mantissa for binstr
#		d4: LEN
#      		d5: LAMBDA/ICTR
#		d6: ILOG
#		d7: k-factor
#		a0: ptr for original operand/final result
#		a1: scratch pointer
#		a2: pointer to FP_X; abs(original value) in ext
#		fp0: scratch
#		fp1: scratch
#		fp2: scratch
#		F_SCR1:
#		F_SCR2:
#		L_SCR1:
#		L_SCR2:

	global		bindec
bindec:
	movm.l		&0x3f20,-(%sp)	#  {%d2-%d7/%a2}
	fmovm.x		&0x7,-(%sp)	#  {%fp0-%fp2}

# A1. Set RM and size ext. Set SIGMA = sign input;
#     The k-factor is saved for use in d7.  Clear BINDEC_FLG for
#     separating  normalized/denormalized input.  If the input
#     is a denormalized number, set the BINDEC_FLG memory word
#     to signal denorm.  If the input is unnormalized, normalize
#     the input and test for denormalized result.  
#
	fmov.l		&rm_mode*0x10,%fpcr	# set RM and ext
	mov.l		(%a0),L_SCR2(%a6)	# save exponent for sign check
	mov.l		%d0,%d7		# move k-factor to d7

	clr.b		BINDEC_FLG(%a6)	# clr norm/denorm flag
	cmpi.b		STAG(%a6),&DENORM # is input a DENORM?
	bne.w		A2_str		# no; input is a NORM

#
# Normalize the denorm
#
un_de_norm:
	mov.w		(%a0),%d0
	and.w		&0x7fff,%d0	# strip sign of normalized exp
	mov.l		4(%a0),%d1
	mov.l		8(%a0),%d2
norm_loop:
	sub.w		&1,%d0
	lsl.l		&1,%d2
	roxl.l		&1,%d1
	tst.l		%d1
	bge.b		norm_loop
#
# Test if the normalized input is denormalized
#
	tst.w		%d0
	bgt.b		pos_exp		# if greater than zero, it is a norm
	st		BINDEC_FLG(%a6)	# set flag for denorm
pos_exp:
	and.w		&0x7fff,%d0	# strip sign of normalized exp
	mov.w		%d0,(%a0)
	mov.l		%d1,4(%a0)
	mov.l		%d2,8(%a0)

# A2. Set X = abs(input).
#
A2_str:
	mov.l		(%a0),FP_SCR1(%a6)	# move input to work space
	mov.l		4(%a0),FP_SCR1+4(%a6)	# move input to work space
	mov.l		8(%a0),FP_SCR1+8(%a6)	# move input to work space
	and.l		&0x7fffffff,FP_SCR1(%a6)	# create abs(X)

# A3. Compute ILOG.
#     ILOG is the log base 10 of the input value.  It is approx-
#     imated by adding e + 0.f when the original value is viewed
#     as 2^^e * 1.f in extended precision.  This value is stored
#     in d6.
#
# Register usage:
#	Input/Output
#	d0: k-factor/exponent
#	d2: x/x
#	d3: x/x
#	d4: x/x
#	d5: x/x
#	d6: x/ILOG
#	d7: k-factor/Unchanged
#	a0: ptr for original operand/final result
#	a1: x/x
#	a2: x/x
#	fp0: x/float(ILOG)
#	fp1: x/x
#	fp2: x/x
#	F_SCR1:x/x
#	F_SCR2:Abs(X)/Abs(X) with $3fff exponent
#	L_SCR1:x/x
#	L_SCR2:first word of X packed/Unchanged

	tst.b		BINDEC_FLG(%a6)	# check for denorm
	beq.b		A3_cont		# if clr, continue with norm
	mov.l		&-4933,%d6	# force ILOG = -4933
	bra.b		A4_str
A3_cont:
	mov.w		FP_SCR1(%a6),%d0	# move exp to d0
	mov.w		&0x3fff,FP_SCR1(%a6)	# replace exponent with 0x3fff
	fmov.x		FP_SCR1(%a6),%fp0	# now fp0 has 1.f
	sub.w		&0x3fff,%d0	# strip off bias
	fadd.w		%d0,%fp0	# add in exp
	fsub.s		FONE(%pc),%fp0	# subtract off 1.0
	fbge.w		pos_res		# if pos, branch 
	fmul.x		PLOG2UP1(%pc),%fp0	# if neg, mul by LOG2UP1
	fmov.l		%fp0,%d6	# put ILOG in d6 as a lword
	bra.b		A4_str		# go move out ILOG
pos_res:
	fmul.x		PLOG2(%pc),%fp0	# if pos, mul by LOG2
	fmov.l		%fp0,%d6	# put ILOG in d6 as a lword


# A4. Clr INEX bit.
#     The operation in A3 above may have set INEX2.  

A4_str:
	fmov.l		&0,%fpsr	# zero all of fpsr - nothing needed


# A5. Set ICTR = 0;
#     ICTR is a flag used in A13.  It must be set before the 
#     loop entry A6. The lower word of d5 is used for ICTR.

	clr.w		%d5		# clear ICTR

# A6. Calculate LEN.
#     LEN is the number of digits to be displayed.  The k-factor
#     can dictate either the total number of digits, if it is
#     a positive number, or the number of digits after the
#     original decimal point which are to be included as
#     significant.  See the 68882 manual for examples.
#     If LEN is computed to be greater than 17, set OPERR in
#     USER_FPSR.  LEN is stored in d4.
#
# Register usage:
#	Input/Output
#	d0: exponent/Unchanged
#	d2: x/x/scratch
#	d3: x/x
#	d4: exc picture/LEN
#	d5: ICTR/Unchanged
#	d6: ILOG/Unchanged
#	d7: k-factor/Unchanged
#	a0: ptr for original operand/final result
#	a1: x/x
#	a2: x/x
#	fp0: float(ILOG)/Unchanged
#	fp1: x/x
#	fp2: x/x
#	F_SCR1:x/x
#	F_SCR2:Abs(X) with $3fff exponent/Unchanged
#	L_SCR1:x/x
#	L_SCR2:first word of X packed/Unchanged

A6_str:
	tst.l		%d7		# branch on sign of k
	ble.b		k_neg		# if k <= 0, LEN = ILOG + 1 - k
	mov.l		%d7,%d4		# if k > 0, LEN = k
	bra.b		len_ck		# skip to LEN check
k_neg:
	mov.l		%d6,%d4		# first load ILOG to d4
	sub.l		%d7,%d4		# subtract off k
	addq.l		&1,%d4		# add in the 1
len_ck:
	tst.l		%d4		# LEN check: branch on sign of LEN
	ble.b		LEN_ng		# if neg, set LEN = 1
	cmp.l		%d4,&17		# test if LEN > 17
	ble.b		A7_str		# if not, forget it
	mov.l		&17,%d4		# set max LEN = 17
	tst.l		%d7		# if negative, never set OPERR
	ble.b		A7_str		# if positive, continue
	or.l		&opaop_mask,USER_FPSR(%a6)	# set OPERR & AIOP in USER_FPSR
	bra.b		A7_str		# finished here
LEN_ng:
	mov.l		&1,%d4		# min LEN is 1


# A7. Calculate SCALE.
#     SCALE is equal to 10^ISCALE, where ISCALE is the number
#     of decimal places needed to insure LEN integer digits
#     in the output before conversion to bcd. LAMBDA is the sign
#     of ISCALE, used in A9.  Fp1 contains 10^^(abs(ISCALE)) using
#     the rounding mode as given in the following table (see
#     Coonen, p. 7.23 as ref.; however, the SCALE variable is
#     of opposite sign in bindec.sa from Coonen).
#
#	Initial					USE
#	FPCR[6:5]	LAMBDA	SIGN(X)		FPCR[6:5]
#	----------------------------------------------
#	 RN	00	   0	   0		00/0	RN
#	 RN	00	   0	   1		00/0	RN
#	 RN	00	   1	   0		00/0	RN
#	 RN	00	   1	   1		00/0	RN
#	 RZ	01	   0	   0		11/3	RP
#	 RZ	01	   0	   1		11/3	RP
#	 RZ	01	   1	   0		10/2	RM
#	 RZ	01	   1	   1		10/2	RM
#	 RM	10	   0	   0		11/3	RP
#	 RM	10	   0	   1		10/2	RM
#	 RM	10	   1	   0		10/2	RM
#	 RM	10	   1	   1		11/3	RP
#	 RP	11	   0	   0		10/2	RM
#	 RP	11	   0	   1		11/3	RP
#	 RP	11	   1	   0		11/3	RP
#	 RP	11	   1	   1		10/2	RM
#
# Register usage:
#	Input/Output
#	d0: exponent/scratch - final is 0
#	d2: x/0 or 24 for A9
#	d3: x/scratch - offset ptr into PTENRM array
#	d4: LEN/Unchanged
#	d5: 0/ICTR:LAMBDA
#	d6: ILOG/ILOG or k if ((k<=0)&(ILOG<k))
#	d7: k-factor/Unchanged
#	a0: ptr for original operand/final result
#	a1: x/ptr to PTENRM array
#	a2: x/x
#	fp0: float(ILOG)/Unchanged
#	fp1: x/10^ISCALE
#	fp2: x/x
#	F_SCR1:x/x
#	F_SCR2:Abs(X) with $3fff exponent/Unchanged
#	L_SCR1:x/x
#	L_SCR2:first word of X packed/Unchanged

A7_str:
	tst.l		%d7		# test sign of k
	bgt.b		k_pos		# if pos and > 0, skip this
	cmp.l		%d7,%d6		# test k - ILOG
	blt.b		k_pos		# if ILOG >= k, skip this
	mov.l		%d7,%d6		# if ((k<0) & (ILOG < k)) ILOG = k
k_pos:
	mov.l		%d6,%d0		# calc ILOG + 1 - LEN in d0
	addq.l		&1,%d0		# add the 1
	sub.l		%d4,%d0		# sub off LEN
	swap		%d5		# use upper word of d5 for LAMBDA
	clr.w		%d5		# set it zero initially
	clr.w		%d2		# set up d2 for very small case
	tst.l		%d0		# test sign of ISCALE
	bge.b		iscale		# if pos, skip next inst
	addq.w		&1,%d5		# if neg, set LAMBDA true
	cmp.l		%d0,&0xffffecd4	# test iscale <= -4908
	bgt.b		no_inf		# if false, skip rest
	add.l		&24,%d0		# add in 24 to iscale
	mov.l		&24,%d2		# put 24 in d2 for A9
no_inf:
	neg.l		%d0		# and take abs of ISCALE
iscale:
	fmov.s		FONE(%pc),%fp1	# init fp1 to 1
	bfextu		USER_FPCR(%a6){&26:&2},%d1	# get initial rmode bits
	lsl.w		&1,%d1		# put them in bits 2:1
	add.w		%d5,%d1		# add in LAMBDA
	lsl.w		&1,%d1		# put them in bits 3:1
	tst.l		L_SCR2(%a6)	# test sign of original x
	bge.b		x_pos		# if pos, don't set bit 0
	addq.l		&1,%d1		# if neg, set bit 0
x_pos:
	lea.l		RBDTBL(%pc),%a2	# load rbdtbl base
	mov.b		(%a2,%d1),%d3	# load d3 with new rmode
	lsl.l		&4,%d3		# put bits in proper position
	fmov.l		%d3,%fpcr	# load bits into fpu
	lsr.l		&4,%d3		# put bits in proper position
	tst.b		%d3		# decode new rmode for pten table
	bne.b		not_rn		# if zero, it is RN
	lea.l		PTENRN(%pc),%a1	# load a1 with RN table base
	bra.b		rmode		# exit decode
not_rn:
	lsr.b		&1,%d3		# get lsb in carry
	bcc.b		not_rp2		# if carry clear, it is RM
	lea.l		PTENRP(%pc),%a1	# load a1 with RP table base
	bra.b		rmode		# exit decode
not_rp2:
	lea.l		PTENRM(%pc),%a1	# load a1 with RM table base
rmode:
	clr.l		%d3		# clr table index
e_loop2:
	lsr.l		&1,%d0		# shift next bit into carry
	bcc.b		e_next2		# if zero, skip the mul
	fmul.x		(%a1,%d3),%fp1	# mul by 10**(d3_bit_no)
e_next2:
	add.l		&12,%d3		# inc d3 to next pwrten table entry
	tst.l		%d0		# test if ISCALE is zero
	bne.b		e_loop2		# if not, loop

# A8. Clr INEX; Force RZ.
#     The operation in A3 above may have set INEX2.  
#     RZ mode is forced for the scaling operation to insure
#     only one rounding error.  The grs bits are collected in 
#     the INEX flag for use in A10.
#
# Register usage:
#	Input/Output

	fmov.l		&0,%fpsr	# clr INEX 
	fmov.l		&rz_mode*0x10,%fpcr	# set RZ rounding mode

# A9. Scale X -> Y.
#     The mantissa is scaled to the desired number of significant
#     digits.  The excess digits are collected in INEX2. If mul,
#     Check d2 for excess 10 exponential value.  If not zero, 
#     the iscale value would have caused the pwrten calculation
#     to overflow.  Only a negative iscale can cause this, so
#     multiply by 10^(d2), which is now only allowed to be 24,
#     with a multiply by 10^8 and 10^16, which is exact since
#     10^24 is exact.  If the input was denormalized, we must
#     create a busy stack frame with the mul command and the
#     two operands, and allow the fpu to complete the multiply.
#
# Register usage:
#	Input/Output
#	d0: FPCR with RZ mode/Unchanged
#	d2: 0 or 24/unchanged
#	d3: x/x
#	d4: LEN/Unchanged
#	d5: ICTR:LAMBDA
#	d6: ILOG/Unchanged
#	d7: k-factor/Unchanged
#	a0: ptr for original operand/final result
#	a1: ptr to PTENRM array/Unchanged
#	a2: x/x
#	fp0: float(ILOG)/X adjusted for SCALE (Y)
#	fp1: 10^ISCALE/Unchanged
#	fp2: x/x
#	F_SCR1:x/x
#	F_SCR2:Abs(X) with $3fff exponent/Unchanged
#	L_SCR1:x/x
#	L_SCR2:first word of X packed/Unchanged

A9_str:
	fmov.x		(%a0),%fp0	# load X from memory
	fabs.x		%fp0		# use abs(X)
	tst.w		%d5		# LAMBDA is in lower word of d5
	bne.b		sc_mul		# if neg (LAMBDA = 1), scale by mul
	fdiv.x		%fp1,%fp0	# calculate X / SCALE -> Y to fp0
	bra.w		A10_st		# branch to A10

sc_mul:
	tst.b		BINDEC_FLG(%a6)	# check for denorm
	beq.w		A9_norm		# if norm, continue with mul

# for DENORM, we must calculate:
#	fp0 = input_op * 10^ISCALE * 10^24
# since the input operand is a DENORM, we can't multiply it directly.
# so, we do the multiplication of the exponents and mantissas separately.
# in this way, we avoid underflow on intermediate stages of the
# multiplication and guarantee a result without exception.
	fmovm.x		&0x2,-(%sp)	# save 10^ISCALE to stack

	mov.w		(%sp),%d3	# grab exponent
	andi.w		&0x7fff,%d3	# clear sign
	ori.w		&0x8000,(%a0)	# make DENORM exp negative
	add.w		(%a0),%d3	# add DENORM exp to 10^ISCALE exp
	subi.w		&0x3fff,%d3	# subtract BIAS
	add.w		36(%a1),%d3
	subi.w		&0x3fff,%d3	# subtract BIAS
	add.w		48(%a1),%d3
	subi.w		&0x3fff,%d3	# subtract BIAS

	bmi.w		sc_mul_err	# is result is DENORM, punt!!!

	andi.w		&0x8000,(%sp)	# keep sign
	or.w		%d3,(%sp)	# insert new exponent
	andi.w		&0x7fff,(%a0)	# clear sign bit on DENORM again
	mov.l		0x8(%a0),-(%sp) # put input op mantissa on stk
	mov.l		0x4(%a0),-(%sp)
	mov.l		&0x3fff0000,-(%sp) # force exp to zero
	fmovm.x		(%sp)+,&0x80	# load normalized DENORM into fp0
	fmul.x		(%sp)+,%fp0

#	fmul.x	36(%a1),%fp0	# multiply fp0 by 10^8
#	fmul.x	48(%a1),%fp0	# multiply fp0 by 10^16
	mov.l		36+8(%a1),-(%sp) # get 10^8 mantissa
	mov.l		36+4(%a1),-(%sp)
	mov.l		&0x3fff0000,-(%sp) # force exp to zero
	mov.l		48+8(%a1),-(%sp) # get 10^16 mantissa
	mov.l		48+4(%a1),-(%sp)
	mov.l		&0x3fff0000,-(%sp)# force exp to zero
	fmul.x		(%sp)+,%fp0	# multiply fp0 by 10^8
	fmul.x		(%sp)+,%fp0	# multiply fp0 by 10^16
	bra.b		A10_st

sc_mul_err:
	bra.b		sc_mul_err

A9_norm:
	tst.w		%d2		# test for small exp case
	beq.b		A9_con		# if zero, continue as normal
	fmul.x		36(%a1),%fp0	# multiply fp0 by 10^8
	fmul.x		48(%a1),%fp0	# multiply fp0 by 10^16
A9_con:
	fmul.x		%fp1,%fp0	# calculate X * SCALE -> Y to fp0

# A10. Or in INEX.
#      If INEX is set, round error occurred.  This is compensated
#      for by 'or-ing' in the INEX2 flag to the lsb of Y.
#
# Register usage:
#	Input/Output
#	d0: FPCR with RZ mode/FPSR with INEX2 isolated
#	d2: x/x
#	d3: x/x
#	d4: LEN/Unchanged
#	d5: ICTR:LAMBDA
#	d6: ILOG/Unchanged
#	d7: k-factor/Unchanged
#	a0: ptr for original operand/final result
#	a1: ptr to PTENxx array/Unchanged
#	a2: x/ptr to FP_SCR1(a6)
#	fp0: Y/Y with lsb adjusted
#	fp1: 10^ISCALE/Unchanged
#	fp2: x/x

A10_st:
	fmov.l		%fpsr,%d0	# get FPSR
	fmov.x		%fp0,FP_SCR1(%a6)	# move Y to memory
	lea.l		FP_SCR1(%a6),%a2	# load a2 with ptr to FP_SCR1
	btst		&9,%d0		# check if INEX2 set
	beq.b		A11_st		# if clear, skip rest
	or.l		&1,8(%a2)	# or in 1 to lsb of mantissa
	fmov.x		FP_SCR1(%a6),%fp0	# write adjusted Y back to fpu


# A11. Restore original FPCR; set size ext.
#      Perform FINT operation in the user's rounding mode.  Keep
#      the size to extended.  The sintdo entry point in the sint
#      routine expects the FPCR value to be in USER_FPCR for
#      mode and precision.  The original FPCR is saved in L_SCR1.

A11_st:
	mov.l		USER_FPCR(%a6),L_SCR1(%a6)	# save it for later
	and.l		&0x00000030,USER_FPCR(%a6)	# set size to ext, 
#					;block exceptions


# A12. Calculate YINT = FINT(Y) according to user's rounding mode.
#      The FPSP routine sintd0 is used.  The output is in fp0.
#
# Register usage:
#	Input/Output
#	d0: FPSR with AINEX cleared/FPCR with size set to ext
#	d2: x/x/scratch
#	d3: x/x
#	d4: LEN/Unchanged
#	d5: ICTR:LAMBDA/Unchanged
#	d6: ILOG/Unchanged
#	d7: k-factor/Unchanged
#	a0: ptr for original operand/src ptr for sintdo
#	a1: ptr to PTENxx array/Unchanged
#	a2: ptr to FP_SCR1(a6)/Unchanged
#	a6: temp pointer to FP_SCR1(a6) - orig value saved and restored
#	fp0: Y/YINT
#	fp1: 10^ISCALE/Unchanged
#	fp2: x/x
#	F_SCR1:x/x
#	F_SCR2:Y adjusted for inex/Y with original exponent
#	L_SCR1:x/original USER_FPCR
#	L_SCR2:first word of X packed/Unchanged

A12_st:
	movm.l	&0xc0c0,-(%sp)	# save regs used by sintd0	 {%d0-%d1/%a0-%a1}
	mov.l	L_SCR1(%a6),-(%sp)
	mov.l	L_SCR2(%a6),-(%sp)

	lea.l		FP_SCR1(%a6),%a0	# a0 is ptr to FP_SCR1(a6)
	fmov.x		%fp0,(%a0)	# move Y to memory at FP_SCR1(a6)
	tst.l		L_SCR2(%a6)	# test sign of original operand
	bge.b		do_fint12		# if pos, use Y 
	or.l		&0x80000000,(%a0)	# if neg, use -Y
do_fint12:
	mov.l	USER_FPSR(%a6),-(%sp)
#	bsr	sintdo		# sint routine returns int in fp0

	fmov.l	USER_FPCR(%a6),%fpcr
	fmov.l	&0x0,%fpsr			# clear the AEXC bits!!!
##	mov.l		USER_FPCR(%a6),%d0	# ext prec/keep rnd mode
##	andi.l		&0x00000030,%d0
##	fmov.l		%d0,%fpcr
	fint.x		FP_SCR1(%a6),%fp0	# do fint()
	fmov.l	%fpsr,%d0
	or.w	%d0,FPSR_EXCEPT(%a6)
##	fmov.l		&0x0,%fpcr
##	fmov.l		%fpsr,%d0		# don't keep ccodes
##	or.w		%d0,FPSR_EXCEPT(%a6)

	mov.b	(%sp),USER_FPSR(%a6)
	add.l	&4,%sp

	mov.l	(%sp)+,L_SCR2(%a6)
	mov.l	(%sp)+,L_SCR1(%a6)
	movm.l	(%sp)+,&0x303	# restore regs used by sint	 {%d0-%d1/%a0-%a1}

	mov.l	L_SCR2(%a6),FP_SCR1(%a6)	# restore original exponent
	mov.l	L_SCR1(%a6),USER_FPCR(%a6)	# restore user's FPCR

# A13. Check for LEN digits.
#      If the int operation results in more than LEN digits,
#      or less than LEN -1 digits, adjust ILOG and repeat from
#      A6.  This test occurs only on the first pass.  If the
#      result is exactly 10^LEN, decrement ILOG and divide
#      the mantissa by 10.  The calculation of 10^LEN cannot
#      be inexact, since all powers of ten upto 10^27 are exact
#      in extended precision, so the use of a previous power-of-ten
#      table will introduce no error.
#
#
# Register usage:
#	Input/Output
#	d0: FPCR with size set to ext/scratch final = 0
#	d2: x/x
#	d3: x/scratch final = x
#	d4: LEN/LEN adjusted
#	d5: ICTR:LAMBDA/LAMBDA:ICTR
#	d6: ILOG/ILOG adjusted
#	d7: k-factor/Unchanged
#	a0: pointer into memory for packed bcd string formation
#	a1: ptr to PTENxx array/Unchanged
#	a2: ptr to FP_SCR1(a6)/Unchanged
#	fp0: int portion of Y/abs(YINT) adjusted
#	fp1: 10^ISCALE/Unchanged
#	fp2: x/10^LEN
#	F_SCR1:x/x
#	F_SCR2:Y with original exponent/Unchanged
#	L_SCR1:original USER_FPCR/Unchanged
#	L_SCR2:first word of X packed/Unchanged

A13_st:
	swap		%d5		# put ICTR in lower word of d5
	tst.w		%d5		# check if ICTR = 0
	bne		not_zr		# if non-zero, go to second test
#
# Compute 10^(LEN-1)
#
	fmov.s		FONE(%pc),%fp2	# init fp2 to 1.0
	mov.l		%d4,%d0		# put LEN in d0
	subq.l		&1,%d0		# d0 = LEN -1
	clr.l		%d3		# clr table index
l_loop:
	lsr.l		&1,%d0		# shift next bit into carry
	bcc.b		l_next		# if zero, skip the mul
	fmul.x		(%a1,%d3),%fp2	# mul by 10**(d3_bit_no)
l_next:
	add.l		&12,%d3		# inc d3 to next pwrten table entry
	tst.l		%d0		# test if LEN is zero
	bne.b		l_loop		# if not, loop
#
# 10^LEN-1 is computed for this test and A14.  If the input was
# denormalized, check only the case in which YINT > 10^LEN.
#
	tst.b		BINDEC_FLG(%a6)	# check if input was norm
	beq.b		A13_con		# if norm, continue with checking
	fabs.x		%fp0		# take abs of YINT
	bra		test_2
#
# Compare abs(YINT) to 10^(LEN-1) and 10^LEN
#
A13_con:
	fabs.x		%fp0		# take abs of YINT
	fcmp.x		%fp0,%fp2	# compare abs(YINT) with 10^(LEN-1)
	fbge.w		test_2		# if greater, do next test
	subq.l		&1,%d6		# subtract 1 from ILOG
	mov.w		&1,%d5		# set ICTR
	fmov.l		&rm_mode*0x10,%fpcr	# set rmode to RM
	fmul.s		FTEN(%pc),%fp2	# compute 10^LEN 
	bra.w		A6_str		# return to A6 and recompute YINT
test_2:
	fmul.s		FTEN(%pc),%fp2	# compute 10^LEN
	fcmp.x		%fp0,%fp2	# compare abs(YINT) with 10^LEN
	fblt.w		A14_st		# if less, all is ok, go to A14
	fbgt.w		fix_ex		# if greater, fix and redo
	fdiv.s		FTEN(%pc),%fp0	# if equal, divide by 10
	addq.l		&1,%d6		# and inc ILOG
	bra.b		A14_st		# and continue elsewhere
fix_ex:
	addq.l		&1,%d6		# increment ILOG by 1
	mov.w		&1,%d5		# set ICTR
	fmov.l		&rm_mode*0x10,%fpcr	# set rmode to RM
	bra.w		A6_str		# return to A6 and recompute YINT
#
# Since ICTR <> 0, we have already been through one adjustment, 
# and shouldn't have another; this is to check if abs(YINT) = 10^LEN
# 10^LEN is again computed using whatever table is in a1 since the
# value calculated cannot be inexact.
#
not_zr:
	fmov.s		FONE(%pc),%fp2	# init fp2 to 1.0
	mov.l		%d4,%d0		# put LEN in d0
	clr.l		%d3		# clr table index
z_loop:
	lsr.l		&1,%d0		# shift next bit into carry
	bcc.b		z_next		# if zero, skip the mul
	fmul.x		(%a1,%d3),%fp2	# mul by 10**(d3_bit_no)
z_next:
	add.l		&12,%d3		# inc d3 to next pwrten table entry
	tst.l		%d0		# test if LEN is zero
	bne.b		z_loop		# if not, loop
	fabs.x		%fp0		# get abs(YINT)
	fcmp.x		%fp0,%fp2	# check if abs(YINT) = 10^LEN
	fbneq.w		A14_st		# if not, skip this
	fdiv.s		FTEN(%pc),%fp0	# divide abs(YINT) by 10
	addq.l		&1,%d6		# and inc ILOG by 1
	addq.l		&1,%d4		# and inc LEN
	fmul.s		FTEN(%pc),%fp2	# if LEN++, the get 10^^LEN

# A14. Convert the mantissa to bcd.
#      The binstr routine is used to convert the LEN digit 
#      mantissa to bcd in memory.  The input to binstr is
#      to be a fraction; i.e. (mantissa)/10^LEN and adjusted
#      such that the decimal point is to the left of bit 63.
#      The bcd digits are stored in the correct position in 
#      the final string area in memory.
#
#
# Register usage:
#	Input/Output
#	d0: x/LEN call to binstr - final is 0
#	d1: x/0
#	d2: x/ms 32-bits of mant of abs(YINT)
#	d3: x/ls 32-bits of mant of abs(YINT)
#	d4: LEN/Unchanged
#	d5: ICTR:LAMBDA/LAMBDA:ICTR
#	d6: ILOG
#	d7: k-factor/Unchanged
#	a0: pointer into memory for packed bcd string formation
#	    /ptr to first mantissa byte in result string
#	a1: ptr to PTENxx array/Unchanged
#	a2: ptr to FP_SCR1(a6)/Unchanged
#	fp0: int portion of Y/abs(YINT) adjusted
#	fp1: 10^ISCALE/Unchanged
#	fp2: 10^LEN/Unchanged
#	F_SCR1:x/Work area for final result
#	F_SCR2:Y with original exponent/Unchanged
#	L_SCR1:original USER_FPCR/Unchanged
#	L_SCR2:first word of X packed/Unchanged

A14_st:
	fmov.l		&rz_mode*0x10,%fpcr	# force rz for conversion
	fdiv.x		%fp2,%fp0	# divide abs(YINT) by 10^LEN
	lea.l		FP_SCR0(%a6),%a0
	fmov.x		%fp0,(%a0)	# move abs(YINT)/10^LEN to memory
	mov.l		4(%a0),%d2	# move 2nd word of FP_RES to d2
	mov.l		8(%a0),%d3	# move 3rd word of FP_RES to d3
	clr.l		4(%a0)		# zero word 2 of FP_RES
	clr.l		8(%a0)		# zero word 3 of FP_RES
	mov.l		(%a0),%d0	# move exponent to d0
	swap		%d0		# put exponent in lower word
	beq.b		no_sft		# if zero, don't shift
	sub.l		&0x3ffd,%d0	# sub bias less 2 to make fract
	tst.l		%d0		# check if > 1
	bgt.b		no_sft		# if so, don't shift
	neg.l		%d0		# make exp positive
m_loop:
	lsr.l		&1,%d2		# shift d2:d3 right, add 0s 
	roxr.l		&1,%d3		# the number of places
	dbf.w		%d0,m_loop	# given in d0
no_sft:
	tst.l		%d2		# check for mantissa of zero
	bne.b		no_zr		# if not, go on
	tst.l		%d3		# continue zero check
	beq.b		zer_m		# if zero, go directly to binstr
no_zr:
	clr.l		%d1		# put zero in d1 for addx
	add.l		&0x00000080,%d3	# inc at bit 7
	addx.l		%d1,%d2		# continue inc
	and.l		&0xffffff80,%d3	# strip off lsb not used by 882
zer_m:
	mov.l		%d4,%d0		# put LEN in d0 for binstr call
	addq.l		&3,%a0		# a0 points to M16 byte in result
	bsr		binstr		# call binstr to convert mant


# A15. Convert the exponent to bcd.
#      As in A14 above, the exp is converted to bcd and the
#      digits are stored in the final string.
#
#      Digits are stored in L_SCR1(a6) on return from BINDEC as:
#
#  	 32               16 15                0
#	-----------------------------------------
#  	|  0 | e3 | e2 | e1 | e4 |  X |  X |  X |
#	-----------------------------------------
#
# And are moved into their proper places in FP_SCR0.  If digit e4
# is non-zero, OPERR is signaled.  In all cases, all 4 digits are
# written as specified in the 881/882 manual for packed decimal.
#
# Register usage:
#	Input/Output
#	d0: x/LEN call to binstr - final is 0
#	d1: x/scratch (0);shift count for final exponent packing
#	d2: x/ms 32-bits of exp fraction/scratch
#	d3: x/ls 32-bits of exp fraction
#	d4: LEN/Unchanged
#	d5: ICTR:LAMBDA/LAMBDA:ICTR
#	d6: ILOG
#	d7: k-factor/Unchanged
#	a0: ptr to result string/ptr to L_SCR1(a6)
#	a1: ptr to PTENxx array/Unchanged
#	a2: ptr to FP_SCR1(a6)/Unchanged
#	fp0: abs(YINT) adjusted/float(ILOG)
#	fp1: 10^ISCALE/Unchanged
#	fp2: 10^LEN/Unchanged
#	F_SCR1:Work area for final result/BCD result
#	F_SCR2:Y with original exponent/ILOG/10^4
#	L_SCR1:original USER_FPCR/Exponent digits on return from binstr
#	L_SCR2:first word of X packed/Unchanged

A15_st:
	tst.b		BINDEC_FLG(%a6)	# check for denorm
	beq.b		not_denorm
	ftest.x		%fp0		# test for zero
	fbeq.w		den_zero	# if zero, use k-factor or 4933
	fmov.l		%d6,%fp0	# float ILOG
	fabs.x		%fp0		# get abs of ILOG
	bra.b		convrt
den_zero:
	tst.l		%d7		# check sign of the k-factor
	blt.b		use_ilog	# if negative, use ILOG
	fmov.s		F4933(%pc),%fp0	# force exponent to 4933
	bra.b		convrt		# do it
use_ilog:
	fmov.l		%d6,%fp0	# float ILOG
	fabs.x		%fp0		# get abs of ILOG
	bra.b		convrt
not_denorm:
	ftest.x		%fp0		# test for zero
	fbneq.w		not_zero	# if zero, force exponent
	fmov.s		FONE(%pc),%fp0	# force exponent to 1
	bra.b		convrt		# do it
not_zero:
	fmov.l		%d6,%fp0	# float ILOG
	fabs.x		%fp0		# get abs of ILOG
convrt:
	fdiv.x		24(%a1),%fp0	# compute ILOG/10^4
	fmov.x		%fp0,FP_SCR1(%a6)	# store fp0 in memory
	mov.l		4(%a2),%d2	# move word 2 to d2
	mov.l		8(%a2),%d3	# move word 3 to d3
	mov.w		(%a2),%d0	# move exp to d0
	beq.b		x_loop_fin	# if zero, skip the shift
	sub.w		&0x3ffd,%d0	# subtract off bias
	neg.w		%d0		# make exp positive
x_loop:
	lsr.l		&1,%d2		# shift d2:d3 right 
	roxr.l		&1,%d3		# the number of places
	dbf.w		%d0,x_loop	# given in d0
x_loop_fin:
	clr.l		%d1		# put zero in d1 for addx
	add.l		&0x00000080,%d3	# inc at bit 6
	addx.l		%d1,%d2		# continue inc
	and.l		&0xffffff80,%d3	# strip off lsb not used by 882
	mov.l		&4,%d0		# put 4 in d0 for binstr call
	lea.l		L_SCR1(%a6),%a0	# a0 is ptr to L_SCR1 for exp digits
	bsr		binstr		# call binstr to convert exp
	mov.l		L_SCR1(%a6),%d0	# load L_SCR1 lword to d0 
	mov.l		&12,%d1		# use d1 for shift count
	lsr.l		%d1,%d0		# shift d0 right by 12
	bfins		%d0,FP_SCR0(%a6){&4:&12}	# put e3:e2:e1 in FP_SCR0
	lsr.l		%d1,%d0		# shift d0 right by 12
	bfins		%d0,FP_SCR0(%a6){&16:&4}	# put e4 in FP_SCR0 
	tst.b		%d0		# check if e4 is zero
	beq.b		A16_st		# if zero, skip rest
	or.l		&opaop_mask,USER_FPSR(%a6)	# set OPERR & AIOP in USER_FPSR


# A16. Write sign bits to final string.
#	   Sigma is bit 31 of initial value; RHO is bit 31 of d6 (ILOG).
#
# Register usage:
#	Input/Output
#	d0: x/scratch - final is x
#	d2: x/x
#	d3: x/x
#	d4: LEN/Unchanged
#	d5: ICTR:LAMBDA/LAMBDA:ICTR
#	d6: ILOG/ILOG adjusted
#	d7: k-factor/Unchanged
#	a0: ptr to L_SCR1(a6)/Unchanged
#	a1: ptr to PTENxx array/Unchanged
#	a2: ptr to FP_SCR1(a6)/Unchanged
#	fp0: float(ILOG)/Unchanged
#	fp1: 10^ISCALE/Unchanged
#	fp2: 10^LEN/Unchanged
#	F_SCR1:BCD result with correct signs
#	F_SCR2:ILOG/10^4
#	L_SCR1:Exponent digits on return from binstr
#	L_SCR2:first word of X packed/Unchanged

A16_st:
	clr.l		%d0		# clr d0 for collection of signs
	and.b		&0x0f,FP_SCR0(%a6)	# clear first nibble of FP_SCR0 
	tst.l		L_SCR2(%a6)	# check sign of original mantissa
	bge.b		mant_p		# if pos, don't set SM
	mov.l		&2,%d0		# move 2 in to d0 for SM
mant_p:
	tst.l		%d6		# check sign of ILOG
	bge.b		wr_sgn		# if pos, don't set SE
	addq.l		&1,%d0		# set bit 0 in d0 for SE 
wr_sgn:
	bfins		%d0,FP_SCR0(%a6){&0:&2}	# insert SM and SE into FP_SCR0

# Clean up and restore all registers used.

	fmov.l		&0,%fpsr	# clear possible inex2/ainex bits
	fmovm.x		(%sp)+,&0xe0	#  {%fp0-%fp2}
	movm.l		(%sp)+,&0x4fc	#  {%d2-%d7/%a2}
	rts

	global		PTENRN
PTENRN:
	long		0x40020000,0xA0000000,0x00000000	# 10 ^ 1
	long		0x40050000,0xC8000000,0x00000000	# 10 ^ 2
	long		0x400C0000,0x9C400000,0x00000000	# 10 ^ 4
	long		0x40190000,0xBEBC2000,0x00000000	# 10 ^ 8
	long		0x40340000,0x8E1BC9BF,0x04000000	# 10 ^ 16
	long		0x40690000,0x9DC5ADA8,0x2B70B59E	# 10 ^ 32
	long		0x40D30000,0xC2781F49,0xFFCFA6D5	# 10 ^ 64
	long		0x41A80000,0x93BA47C9,0x80E98CE0	# 10 ^ 128
	long		0x43510000,0xAA7EEBFB,0x9DF9DE8E	# 10 ^ 256
	long		0x46A30000,0xE319A0AE,0xA60E91C7	# 10 ^ 512
	long		0x4D480000,0xC9767586,0x81750C17	# 10 ^ 1024
	long		0x5A920000,0x9E8B3B5D,0xC53D5DE5	# 10 ^ 2048
	long		0x75250000,0xC4605202,0x8A20979B	# 10 ^ 4096

	global		PTENRP
PTENRP:
	long		0x40020000,0xA0000000,0x00000000	# 10 ^ 1
	long		0x40050000,0xC8000000,0x00000000	# 10 ^ 2
	long		0x400C0000,0x9C400000,0x00000000	# 10 ^ 4
	long		0x40190000,0xBEBC2000,0x00000000	# 10 ^ 8
	long		0x40340000,0x8E1BC9BF,0x04000000	# 10 ^ 16
	long		0x40690000,0x9DC5ADA8,0x2B70B59E	# 10 ^ 32
	long		0x40D30000,0xC2781F49,0xFFCFA6D6	# 10 ^ 64
	long		0x41A80000,0x93BA47C9,0x80E98CE0	# 10 ^ 128
	long		0x43510000,0xAA7EEBFB,0x9DF9DE8E	# 10 ^ 256
	long		0x46A30000,0xE319A0AE,0xA60E91C7	# 10 ^ 512
	long		0x4D480000,0xC9767586,0x81750C18	# 10 ^ 1024
	long		0x5A920000,0x9E8B3B5D,0xC53D5DE5	# 10 ^ 2048
	long		0x75250000,0xC4605202,0x8A20979B	# 10 ^ 4096

	global		PTENRM
PTENRM:
	long		0x40020000,0xA0000000,0x00000000	# 10 ^ 1
	long		0x40050000,0xC8000000,0x00000000	# 10 ^ 2
	long		0x400C0000,0x9C400000,0x00000000	# 10 ^ 4
	long		0x40190000,0xBEBC2000,0x00000000	# 10 ^ 8
	long		0x40340000,0x8E1BC9BF,0x04000000	# 10 ^ 16
	long		0x40690000,0x9DC5ADA8,0x2B70B59D	# 10 ^ 32
	long		0x40D30000,0xC2781F49,0xFFCFA6D5	# 10 ^ 64
	long		0x41A80000,0x93BA47C9,0x80E98CDF	# 10 ^ 128
	long		0x43510000,0xAA7EEBFB,0x9DF9DE8D	# 10 ^ 256
	long		0x46A30000,0xE319A0AE,0xA60E91C6	# 10 ^ 512
	long		0x4D480000,0xC9767586,0x81750C17	# 10 ^ 1024
	long		0x5A920000,0x9E8B3B5D,0xC53D5DE4	# 10 ^ 2048
	long		0x75250000,0xC4605202,0x8A20979A	# 10 ^ 4096

#########################################################################
# binstr(): Converts a 64-bit binary integer to bcd.			#
#									#
# INPUT *************************************************************** #
#	d2:d3 = 64-bit binary integer					#
#	d0    = desired length (LEN)					#
#	a0    = pointer to start in memory for bcd characters		#
#          	(This pointer must point to byte 4 of the first		#
#          	 lword of the packed decimal memory string.)		#
#									#
# OUTPUT ************************************************************** #
#	a0 = pointer to LEN bcd digits representing the 64-bit integer.	#
#									#
# ALGORITHM ***********************************************************	#
#	The 64-bit binary is assumed to have a decimal point before	#
#	bit 63.  The fraction is multiplied by 10 using a mul by 2	#
#	shift and a mul by 8 shift.  The bits shifted out of the	#
#	msb form a decimal digit.  This process is iterated until	#
#	LEN digits are formed.						#
#									#
# A1. Init d7 to 1.  D7 is the byte digit counter, and if 1, the	#
#     digit formed will be assumed the least significant.  This is	#
#     to force the first byte formed to have a 0 in the upper 4 bits.	#
#									#
# A2. Beginning of the loop:						#
#     Copy the fraction in d2:d3 to d4:d5.				#
#									#
# A3. Multiply the fraction in d2:d3 by 8 using bit-field		#
#     extracts and shifts.  The three msbs from d2 will go into d1.	#
#									#
# A4. Multiply the fraction in d4:d5 by 2 using shifts.  The msb	#
#     will be collected by the carry.					#
#									#
# A5. Add using the carry the 64-bit quantities in d2:d3 and d4:d5	#
#     into d2:d3.  D1 will contain the bcd digit formed.		#
#									#
# A6. Test d7.  If zero, the digit formed is the ms digit.  If non-	#
#     zero, it is the ls digit.  Put the digit in its place in the	#
#     upper word of d0.  If it is the ls digit, write the word		#
#     from d0 to memory.						#
#									#
# A7. Decrement d6 (LEN counter) and repeat the loop until zero.	#
#									#
#########################################################################

#	Implementation Notes:
#
#	The registers are used as follows:
#
#		d0: LEN counter
#		d1: temp used to form the digit
#		d2: upper 32-bits of fraction for mul by 8
#		d3: lower 32-bits of fraction for mul by 8
#		d4: upper 32-bits of fraction for mul by 2
#		d5: lower 32-bits of fraction for mul by 2
#		d6: temp for bit-field extracts
#		d7: byte digit formation word;digit count {0,1}
#		a0: pointer into memory for packed bcd string formation
#

	global		binstr
binstr:
	movm.l		&0xff00,-(%sp)	#  {%d0-%d7}

#
# A1: Init d7
#
	mov.l		&1,%d7		# init d7 for second digit
	subq.l		&1,%d0		# for dbf d0 would have LEN+1 passes
#
# A2. Copy d2:d3 to d4:d5.  Start loop.
#
loop:
	mov.l		%d2,%d4		# copy the fraction before muls
	mov.l		%d3,%d5		# to d4:d5
#
# A3. Multiply d2:d3 by 8; extract msbs into d1.
#
	bfextu		%d2{&0:&3},%d1	# copy 3 msbs of d2 into d1
	asl.l		&3,%d2		# shift d2 left by 3 places
	bfextu		%d3{&0:&3},%d6	# copy 3 msbs of d3 into d6
	asl.l		&3,%d3		# shift d3 left by 3 places
	or.l		%d6,%d2		# or in msbs from d3 into d2
#
# A4. Multiply d4:d5 by 2; add carry out to d1.
#
	asl.l		&1,%d5		# mul d5 by 2
	roxl.l		&1,%d4		# mul d4 by 2
	swap		%d6		# put 0 in d6 lower word
	addx.w		%d6,%d1		# add in extend from mul by 2
#
# A5. Add mul by 8 to mul by 2.  D1 contains the digit formed.
#
	add.l		%d5,%d3		# add lower 32 bits
	nop				# ERRATA FIX #13 (Rev. 1.2 6/6/90)
	addx.l		%d4,%d2		# add with extend upper 32 bits
	nop				# ERRATA FIX #13 (Rev. 1.2 6/6/90)
	addx.w		%d6,%d1		# add in extend from add to d1
	swap		%d6		# with d6 = 0; put 0 in upper word
#
# A6. Test d7 and branch.
#
	tst.w		%d7		# if zero, store digit & to loop
	beq.b		first_d		# if non-zero, form byte & write
sec_d:
	swap		%d7		# bring first digit to word d7b
	asl.w		&4,%d7		# first digit in upper 4 bits d7b
	add.w		%d1,%d7		# add in ls digit to d7b
	mov.b		%d7,(%a0)+	# store d7b byte in memory
	swap		%d7		# put LEN counter in word d7a
	clr.w		%d7		# set d7a to signal no digits done
	dbf.w		%d0,loop	# do loop some more!
	bra.b		end_bstr	# finished, so exit
first_d:
	swap		%d7		# put digit word in d7b
	mov.w		%d1,%d7		# put new digit in d7b
	swap		%d7		# put LEN counter in word d7a
	addq.w		&1,%d7		# set d7a to signal first digit done
	dbf.w		%d0,loop	# do loop some more!
	swap		%d7		# put last digit in string
	lsl.w		&4,%d7		# move it to upper 4 bits
	mov.b		%d7,(%a0)+	# store it in memory string
#
# Clean up and return with result in fp0.
#
end_bstr:
	movm.l		(%sp)+,&0xff	#  {%d0-%d7}
	rts

#########################################################################
# XDEF ****************************************************************	#
#	facc_in_b(): dmem_read_byte failed				#
#	facc_in_w(): dmem_read_word failed				#
#	facc_in_l(): dmem_read_long failed				#
#	facc_in_d(): dmem_read of dbl prec failed			#
#	facc_in_x(): dmem_read of ext prec failed			#
#									#
#	facc_out_b(): dmem_write_byte failed				#
#	facc_out_w(): dmem_write_word failed				#
#	facc_out_l(): dmem_write_long failed				#
#	facc_out_d(): dmem_write of dbl prec failed			#
#	facc_out_x(): dmem_write of ext prec failed			#
#									#
# XREF ****************************************************************	#
#	_real_access() - exit through access error handler		#
#									#
# INPUT ***************************************************************	#
#	None								#
# 									#
# OUTPUT **************************************************************	#
#	None								#
#									#
# ALGORITHM ***********************************************************	#
# 	Flow jumps here when an FP data fetch call gets an error 	#
# result. This means the operating system wants an access error frame	#
# made out of the current exception stack frame. 			#
#	So, we first call restore() which makes sure that any updated	#
# -(an)+ register gets returned to its pre-exception value and then	#
# we change the stack to an access error stack frame.			#
#									#
#########################################################################

facc_in_b:
	movq.l		&0x1,%d0			# one byte
	bsr.w		restore				# fix An

	mov.w		&0x0121,EXC_VOFF(%a6)		# set FSLW
	bra.w		facc_finish

facc_in_w:
	movq.l		&0x2,%d0			# two bytes
	bsr.w		restore				# fix An

	mov.w		&0x0141,EXC_VOFF(%a6)		# set FSLW
	bra.b		facc_finish

facc_in_l:
	movq.l		&0x4,%d0			# four bytes
	bsr.w		restore				# fix An

	mov.w		&0x0101,EXC_VOFF(%a6)		# set FSLW
	bra.b		facc_finish

facc_in_d:
	movq.l		&0x8,%d0			# eight bytes
	bsr.w		restore				# fix An

	mov.w		&0x0161,EXC_VOFF(%a6)		# set FSLW
	bra.b		facc_finish

facc_in_x:
	movq.l		&0xc,%d0			# twelve bytes
	bsr.w		restore				# fix An

	mov.w		&0x0161,EXC_VOFF(%a6)		# set FSLW
	bra.b		facc_finish

################################################################

facc_out_b:
	movq.l		&0x1,%d0			# one byte
	bsr.w		restore				# restore An

	mov.w		&0x00a1,EXC_VOFF(%a6)		# set FSLW
	bra.b		facc_finish

facc_out_w:
	movq.l		&0x2,%d0			# two bytes
	bsr.w		restore				# restore An

	mov.w		&0x00c1,EXC_VOFF(%a6)		# set FSLW
	bra.b		facc_finish

facc_out_l:
	movq.l		&0x4,%d0			# four bytes
	bsr.w		restore				# restore An

	mov.w		&0x0081,EXC_VOFF(%a6)		# set FSLW
	bra.b		facc_finish

facc_out_d:
	movq.l		&0x8,%d0			# eight bytes
	bsr.w		restore				# restore An

	mov.w		&0x00e1,EXC_VOFF(%a6)		# set FSLW
	bra.b		facc_finish

facc_out_x:
	mov.l		&0xc,%d0			# twelve bytes
	bsr.w		restore				# restore An

	mov.w		&0x00e1,EXC_VOFF(%a6)		# set FSLW

# here's where we actually create the access error frame from the
# current exception stack frame.
facc_finish:
	mov.l		USER_FPIAR(%a6),EXC_PC(%a6) # store current PC

	fmovm.x		EXC_FPREGS(%a6),&0xc0	# restore fp0-fp1
	fmovm.l		USER_FPCR(%a6),%fpcr,%fpsr,%fpiar # restore ctrl regs
	movm.l		EXC_DREGS(%a6),&0x0303	# restore d0-d1/a0-a1

	unlk		%a6

	mov.l		(%sp),-(%sp)		# store SR, hi(PC)
	mov.l		0x8(%sp),0x4(%sp)	# store lo(PC)
	mov.l		0xc(%sp),0x8(%sp)	# store EA
	mov.l		&0x00000001,0xc(%sp)	# store FSLW
	mov.w		0x6(%sp),0xc(%sp)	# fix FSLW (size)
	mov.w		&0x4008,0x6(%sp)	# store voff

	btst		&0x5,(%sp)		# supervisor or user mode?
	beq.b		facc_out2		# user
	bset		&0x2,0xd(%sp)		# set supervisor TM bit

facc_out2:
	bra.l		_real_access

##################################################################

# if the effective addressing mode was predecrement or postincrement,
# the emulation has already changed its value to the correct post-
# instruction value. but since we're exiting to the access error
# handler, then AN must be returned to its pre-instruction value.
# we do that here.
restore:
	mov.b		EXC_OPWORD+0x1(%a6),%d1
	andi.b		&0x38,%d1		# extract opmode
	cmpi.b		%d1,&0x18		# postinc?
	beq.w		rest_inc
	cmpi.b		%d1,&0x20		# predec?
	beq.w		rest_dec
	rts

rest_inc:
	mov.b		EXC_OPWORD+0x1(%a6),%d1
	andi.w		&0x0007,%d1		# fetch An

	mov.w		(tbl_rest_inc.b,%pc,%d1.w*2),%d1
	jmp		(tbl_rest_inc.b,%pc,%d1.w*1)

tbl_rest_inc:
	short		ri_a0 - tbl_rest_inc
	short		ri_a1 - tbl_rest_inc
	short		ri_a2 - tbl_rest_inc
	short		ri_a3 - tbl_rest_inc
	short		ri_a4 - tbl_rest_inc
	short		ri_a5 - tbl_rest_inc
	short		ri_a6 - tbl_rest_inc
	short		ri_a7 - tbl_rest_inc

ri_a0:
	sub.l		%d0,EXC_DREGS+0x8(%a6)	# fix stacked a0
	rts
ri_a1:
	sub.l		%d0,EXC_DREGS+0xc(%a6)	# fix stacked a1
	rts
ri_a2:
	sub.l		%d0,%a2			# fix a2
	rts
ri_a3:
	sub.l		%d0,%a3			# fix a3
	rts
ri_a4:
	sub.l		%d0,%a4			# fix a4
	rts
ri_a5:
	sub.l		%d0,%a5			# fix a5
	rts
ri_a6:
	sub.l		%d0,(%a6)		# fix stacked a6
	rts
# if it's a fmove out instruction, we don't have to fix a7
# because we hadn't changed it yet. if it's an opclass two
# instruction (data moved in) and the exception was in supervisor
# mode, then also also wasn't updated. if it was user mode, then
# restore the correct a7 which is in the USP currently.
ri_a7:
	cmpi.b		EXC_VOFF(%a6),&0x30	# move in or out?
	bne.b		ri_a7_done		# out

	btst		&0x5,EXC_SR(%a6)	# user or supervisor?
	bne.b		ri_a7_done		# supervisor
	movc		%usp,%a0		# restore USP
	sub.l		%d0,%a0
	movc		%a0,%usp	
ri_a7_done:
	rts

# need to invert adjustment value if the <ea> was predec
rest_dec:
	neg.l		%d0
	bra.b		rest_inc
#
# Makefile for the linux kernel.
#
# Note! Dependencies are done automagically by 'make dep', which also
# removes any old dependencies. DON'T put your own dependencies here
# unless it's something special (ie not a .c file).
#
# Note 2! The CFLAGS definitions are now in the main makefile...

.S.o:
	$(CC) $(AFLAGS) -traditional -c $< -o $*.o

ifndef CONFIG_SUN3
all: head.o kernel.o
else
all: sun3-head.o kernel.o
endif 

O_TARGET := kernel.o

export-objs	:= setup.o m68k_ksyms.o

obj-y		:= entry.o process.o traps.o ints.o signal.o ptrace.o \
			sys_m68k.o time.o semaphore.o setup.o m68k_ksyms.o

obj-$(CONFIG_PCI)	+= bios32.o

head.o: head.S m68k_defs.h

entry.o: entry.S m68k_defs.h

sun3-head.o: sun3-head.S m68k_defs.h

m68k_defs.h: m68k_defs.c m68k_defs.head
	rm -f m68k_defs.d
	SUNPRO_DEPENDENCIES="m68k_defs.d m68k_defs.h" \
	$(CC) $(filter-out -MD,$(CFLAGS)) -S m68k_defs.c
	cp m68k_defs.head m68k_defs.h
	grep '^#define' m68k_defs.s >> m68k_defs.h
	rm m68k_defs.s
-include m68k_defs.d

include $(TOPDIR)/Rules.make
), "=&r" (reg1), "=&r" (reg2)
		:"0" (to), "1" (from), "I" (PAGE_SIZE),
		 "i" (Create_Dirty_Excl_D));
	__restore_flags(flags);
}

/*
 * These are for R4000SC / R4400MC
 */
static void r4k_copy_page_s16(void * to, void * from)
{
	unsigned long dummy1, dummy2, reg1, reg2;

	__asm__ __volatile__(
		".set\tnoreorder\n\t"
		".set\tnoat\n\t"
		"daddiu\t$1,%0,%6\n"
		"1:\tcache\t%7,(%0)\n\t"
		"ld\t%2,(%1)\n\t"
		"ld\t%3,8(%1)\n\t"
		"sd\t%2,(%0)\n\t"
		"sd\t%3,8(%0)\n\t"
		"cache\t%7,16(%0)\n\t"
		"ld\t%2,16(%1)\n\t"
		"ld\t%3,24(%1)\n\t"
		"sd\t%2,16(%0)\n\t"
		"sd\t%3,24(%0)\n\t"
		"cache\t%7,32(%0)\n\t"
		"daddiu\t%0,64\n\t"
		"daddiu\t%1,64\n\t"
		"ld\t%2,-32(%1)\n\t"
		"ld\t%3,-24(%1)\n\t"
		"sd\t%2,-32(%0)\n\t"
		"sd\t%3,-24(%0)\n\t"
		"cache\t%7,-16(%0)\n\t"
		"ld\t%2,-16(%1)\n\t"
		"ld\t%3,-8(%1)\n\t"
		"sd\t%2,-16(%0)\n\t"
		"bne\t$1,%0,1b\n\t"
		" sd\t%3,-8(%0)\n\t"
		".set\tat\n\t"
		".set\treorder"
		:"=r" (dummy1), "=r" (dummy2), "=&r" (reg1), "=&r" (reg2)
		:"0" (to), "1" (from), "I" (PAGE_SIZE),
		 "i" (Create_Dirty_Excl_SD));
}

static void r4k_copy_page_s32(void * to, void * from)
{
	unsigned long dummy1, dummy2, reg1, reg2;

	__asm__ __volatile__(
		".set\tnoreorder\n\t"
		".set\tnoat\n\t"
		"daddiu\t$1,%0,%6\n"
		"1:\tcache\t%7,(%0)\n\t"
		"ld\t%2,(%1)\n\t"
		"ld\t%3,8(%1)\n\t"
		"sd\t%2,(%0)\n\t"
		"sd\t%3,8(%0)\n\t"
		"ld\t%2,16(%1)\n\t"
		"ld\t%3,24(%1)\n\t"
		"sd\t%2,16(%0)\n\t"
		"sd\t%3,24(%0)\n\t"
		"cache\t%7,32(%0)\n\t"
		"daddiu\t%0,64\n\t"
		"daddiu\t%1,64\n\t"
		"ld\t%2,-32(%1)\n\t"
		"ld\t%3,-24(%1)\n\t"
		"sd\t%2,-32(%0)\n\t"
		"sd\t%3,-24(%0)\n\t"
		"ld\t%2,-16(%1)\n\t"
		"ld\t%3,-8(%1)\n\t"
		"sd\t%2,-16(%0)\n\t"
		"bne\t$1,%0,1b\n\t"
		" sd\t%3,-8(%0)\n\t"
		".set\tat\n\t"
		".set\treorder"
		:"=r" (dummy1), "=r" (dummy2), "=&r" (reg1), "=&r" (reg2)
		:"0" (to), "1" (from), "I" (PAGE_SIZE),
		 "i" (Create_Dirty_Excl_SD));
}

static void r4k_copy_page_s64(void * to, void * from)
{
	unsigned long dummy1, dummy2, reg1, reg2;

	__asm__ __volatile__(
		".set\tnoreorder\n\t"
		".set\tnoat\n\t"
		"daddiu\t$1,%0,%6\n"
		"1:\tcache\t%7,(%0)\n\t"
		"ld\t%2,(%1)\n\t"
		"ld\t%3,8(%1)\n\t"
		"sd\t%2,(%0)\n\t"
		"sd\t%3,8(%0)\n\t"
		"ld\t%2,16(%1)\n\t"
		"ld\t%3,24(%1)\n\t"
		"sd\t%2,16(%0)\n\t"
		"sd\t%3,24(%0)\n\t"
		"daddiu\t%0,64\n\t"
		"daddiu\t%1,64\n\t"
		"ld\t%2,-32(%1)\n\t"
		"ld\t%3,-24(%1)\n\t"
		"sd\t%2,-32(%0)\n\t"
		"sd\t%3,-24(%0)\n\t"
		"ld\t%2,-16(%1)\n\t"
		"ld\t%3,-8(%1)\n\t"
		"sd\t%2,-16(%0)\n\t"
		"bne\t$1,%0,1b\n\t"
		" sd\t%3,-8(%0)\n\t"
		".set\tat\n\t"
		".set\treorder"
		:"=r" (dummy1), "=r" (dummy2), "=&r" (reg1), "=&r" (reg2)
		:"0" (to), "1" (from), "I" (PAGE_SIZE),
		 "i" (Create_Dirty_Excl_SD));
}

static void r4k_copy_page_s128(void * to, void * from)
{
	unsigned long dummy1, dummy2;
	unsigned long reg1, reg2, reg3, reg4;

	__asm__ __volatile__(
		".set\tnoreorder\n\t"
		".set\tnoat\n\t"
		"daddiu\t$1,%0,%8\n"
		"1:\tcache\t%9,(%0)\n\t"
		"ld\t%2,(%1)\n\t"
		"ld\t%3,8(%1)\n\t"
		"ld\t%4,16(%1)\n\t"
		"ld\t%5,24(%1)\n\t"
		"sd\t%2,(%0)\n\t"
		"sd\t%3,8(%0)\n\t"
		"sd\t%4,16(%0)\n\t"
		"sd\t%5,24(%0)\n\t"
		"ld\t%2,32(%1)\n\t"
		"ld\t%3,40(%1)\n\t"
		"ld\t%4,48(%1)\n\t"
		"ld\t%5,56(%1)\n\t"
		"sd\t%2,32(%0)\n\t"
		"sd\t%3,40(%0)\n\t"
		"sd\t%4,48(%0)\n\t"
		"sd\t%5,56(%0)\n\t"
		"daddiu\t%0,128\n\t"
		"daddiu\t%1,128\n\t"
		"ld\t%2,-64(%1)\n\t"
		"ld\t%3,-56(%1)\n\t"
		"ld\t%4,-48(%1)\n\t"
		"ld\t%5,-40(%1)\n\t"
		"sd\t%2,-64(%0)\n\t"
		"sd\t%3,-56(%0)\n\t"
		"sd\t%4,-48(%0)\n\t"
		"sd\t%5,-40(%0)\n\t"
		"ld\t%2,-32(%1)\n\t"
		"ld\t%3,-24(%1)\n\t"
		"ld\t%4,-16(%1)\n\t"
		"ld\t%5,-8(%1)\n\t"
		"sd\t%2,-32(%0)\n\t"
		"sd\t%3,-24(%0)\n\t"
		"sd\t%4,-16(%0)\n\t"
		"bne\t$1,%0,1b\n\t"
		" sd\t%5,-8(%0)\n\t"
		".set\tat\n\t"
		".set\treorder"
		:"=r" (dummy1), "=r" (dummy2),
		 "=&r" (reg1), "=&r" (reg2), "=&r" (reg3), "=&r" (reg4)
		:"0" (to), "1" (from),
		 "I" (PAGE_SIZE),
		 "i" (Create_Dirty_Excl_SD));
}


/*
 * If you think for one second that this stuff coming up is a lot
 * of bulky code eating too many kernel cache lines.  Think _again_.
 *
 * Consider:
 * 1) Taken branches have a 3 cycle penalty on R4k
 * 2) The branch itself is a real dead cycle on even R4600/R5000.
 * 3) Only one of the following variants of each type is even used by
 *    the kernel based upon the cache parameters we detect at boot time.
 *
 * QED.
 */

static inline void r4k_flush_cache_all_s16d16i16(void)
{
	unsigned long flags;

	__save_and_cli(flags);
	blast_dcache16(); blast_icache16(); blast_scache16();
	__restore_flags(flags);
}

static inline void r4k_flush_cache_all_s32d16i16(void)
{
	unsigned long flags;

	__save_and_cli(flags);
	blast_dcache16(); blast_icache16(); blast_scache32();
	__restore_flags(flags);
}

static inline void r4k_flush_cache_all_s64d16i16(void)
{
	unsigned long flags;

	__save_and_cli(flags);
	blast_dcache16(); blast_icache16(); blast_scache64();
	__restore_flags(flags);
}

static inline void r4k_flush_cache_all_s128d16i16(void)
{
	unsigned long flags;

	__save_and_cli(flags);
	blast_dcache16(); blast_icache16(); blast_scache128();
	__restore_flags(flags);
}

static inline void r4k_flush_cache_all_s32d32i32(void)
{
	unsigned long flags;

	__save_and_cli(flags);
	blast_dcache32(); blast_icache32(); blast_scache32();
	__restore_flags(flags);
}

static inline void r4k_flush_cache_all_s64d32i32(void)
{
	unsigned long flags;

	__save_and_cli(flags);
	blast_dcache32(); blast_icache32(); blast_scache64();
	__restore_flags(flags);
}

static inline void r4k_flush_cache_all_s128d32i32(void)
{
	unsigned long flags;

	__save_and_cli(flags);
	blast_dcache32(); blast_icache32(); blast_scache128();
	__restore_flags(flags);
}

static inline void r4k_flush_cache_all_d16i16(void)
{
	unsigned long flags;

	__save_and_cli(flags);
	blast_dcache16(); blast_icache16();
	__restore_flags(flags);
}

static inline void r4k_flush_cache_all_d32i32(void)
{
	unsigned long flags;

	__save_and_cli(flags);
	blast_dcache32(); blast_icache32();
	__restore_flags(flags);
}

static void r4k_flush_cache_range_s16d16i16(struct mm_struct *mm,
					    unsigned long start,
					    unsigned long end)
{
	struct vm_area_struct *vma;
	unsigned long flags;

	if (CPU_CONTEXT(smp_processor_id(), mm) == 0)
		return;

	start &= PAGE_MASK;
#ifdef DEBUG_CACHE
	printk("crange[%d,%08lx,%08lx]", (int)mm->context, start, end);
#endif
	vma = find_vma(mm, start);
	if(vma) {
		if (CPU_CONTEXT(smp_processor_id(), mm) !=
				CPU_CONTEXT(smp_processor_id(), current->mm)) {
			r4k_flush_cache_all_s16d16i16();
		} else {
			pgd_t *pgd;
			pmd_t *pmd;
			pte_t *pte;

			__save_and_cli(flags);
			while(start < end) {
				pgd = pgd_offset(mm, start);
				pmd = pmd_offset(pgd, start);
				pte = pte_offset(pmd, start);

				if(pte_val(*pte) & _PAGE_VALID)
					blast_scache16_page(start);
				start += PAGE_SIZE;
			}
			__restore_flags(flags);
		}
	}
}

static void r4k_flush_cache_range_s32d16i16(struct mm_struct *mm,
					    unsigned long start,
					    unsigned long end)
{
	struct vm_area_struct *vma;
	unsigned long flags;

	if (CPU_CONTEXT(smp_processor_id(), mm) == 0)
		return;

	start &= PAGE_MASK;
#ifdef DEBUG_CACHE
	printk("crange[%d,%08lx,%08lx]", (int)mm->context, start, end);
#endif
	vma = find_vma(mm, start);
	if(vma) {
		if (CPU_CONTEXT(smp_processor_id(), mm) !=
				CPU_CONTEXT(smp_processor_id(), current->mm)) {
			r4k_flush_cache_all_s32d16i16();
		} else {
			pgd_t *pgd;
			pmd_t *pmd;
			pte_t *pte;

			__save_and_cli(flags);
			while(start < end) {
				pgd = pgd_offset(mm, start);
				pmd = pmd_offset(pgd, start);
				pte = pte_offset(pmd, start);

				if(pte_val(*pte) & _PAGE_VALID)
					blast_scache32_page(start);
				start += PAGE_SIZE;
			}
			__restore_flags(flags);
		}
	}
}

static void r4k_flush_cache_range_s64d16i16(struct mm_struct *mm,
					    unsigned long start,
					    unsigned long end)
{
	struct vm_area_struct *vma;
	unsigned long flags;

	if (CPU_CONTEXT(smp_processor_id(), mm) == 0)
		return;

	start &= PAGE_MASK;
#ifdef DEBUG_CACHE
	printk("crange[%d,%08lx,%08lx]", (int)mm->context, start, end);
#endif
	vma = find_vma(mm, start);
	if(vma) {
		if (CPU_CONTEXT(smp_processor_id(), mm) !=
				CPU_CONTEXT(smp_processor_id(), current->mm)) {
			r4k_flush_cache_all_s64d16i16();
		} else {
			pgd_t *pgd;
			pmd_t *pmd;
			pte_t *pte;

			__save_and_cli(flags);
			while(start < end) {
				pgd = pgd_offset(mm, start);
				pmd = pmd_offset(pgd, start);
				pte = pte_offset(pmd, start);

				if(pte_val(*pte) & _PAGE_VALID)
					blast_scache64_page(start);
				start += PAGE_SIZE;
			}
			__restore_flags(flags);
		}
	}
}

static void r4k_flush_cache_range_s128d16i16(struct mm_struct *mm,
					     unsigned long start,
					     unsigned long end)
{
	struct vm_area_struct *vma;
	unsigned long flags;

	if (CPU_CONTEXT(smp_processor_id(), mm) == 0)
		return;

	start &= PAGE_MASK;
#ifdef DEBUG_CACHE
	printk("crange[%d,%08lx,%08lx]", (int)mm->context, start, end);
#endif
	vma = find_vma(mm, start);
	if(vma) {
		if (CPU_CONTEXT(smp_processor_id(), mm) !=
				CPU_CONTEXT(smp_processor_id(), current->mm)) {
			r4k_flush_cache_all_s128d16i16();
		} else {
			pgd_t *pgd;
			pmd_t *pmd;
			pte_t *pte;

			__save_and_cli(flags);
			while(start < end) {
				pgd = pgd_offset(mm, start);
				pmd = pmd_offset(pgd, start);
				pte = pte_offset(pmd, start);

				if(pte_val(*pte) & _PAGE_VALID)
					blast_scache128_page(start);
				start += PAGE_SIZE;
			}
			__restore_flags(flags);
		}
	}
}

static void r4k_flush_cache_range_s32d32i32(struct mm_struct *mm,
					    unsigned long start,
					    unsigned long end)
{
	struct vm_area_struct *vma;
	unsigned long flags;

	if (CPU_CONTEXT(smp_processor_id(), mm) == 0)
		return;

	start &= PAGE_MASK;
#ifdef DEBUG_CACHE
	printk("crange[%d,%08lx,%08lx]", (int)mm->context, start, end);
#endif
	vma = find_vma(mm, start);
	if(vma) {
		if (CPU_CONTEXT(smp_processor_id(), mm) !=
				CPU_CONTEXT(smp_processor_id(), current->mm)) {
			r4k_flush_cache_all_s32d32i32();
		} else {
			pgd_t *pgd;
			pmd_t *pmd;
			pte_t *pte;

			__save_and_cli(flags);
			while(start < end) {
				pgd = pgd_offset(mm, start);
				pmd = pmd_offset(pgd, start);
				pte = pte_offset(pmd, start);

				if(pte_val(*pte) & _PAGE_VALID)
					blast_scache32_page(start);
				start += PAGE_SIZE;
			}
			__restore_flags(flags);
		}
	}
}

static void r4k_flush_cache_range_s64d32i32(struct mm_struct *mm,
					    unsigned long start,
					    unsigned long end)
{
	struct vm_area_struct *vma;
	unsigned long flags;

	if (CPU_CONTEXT(smp_processor_id(), mm) == 0)
		return;

	start &= PAGE_MASK;
#ifdef DEBUG_CACHE
	printk("crange[%d,%08lx,%08lx]", (int)mm->context, start, end);
#endif
	vma = find_vma(mm, start);
	if(vma) {
		if (CPU_CONTEXT(smp_processor_id(), mm) !=
				CPU_CONTEXT(smp_processor_id(), current->mm)) {
			r4k_flush_cache_all_s64d32i32();
		} else {
			pgd_t *pgd;
			pmd_t *pmd;
			pte_t *pte;

			__save_and_cli(flags);
			while(start < end) {
				pgd = pgd_offset(mm, start);
				pmd = pmd_offset(pgd, start);
				pte = pte_offset(pmd, start);

				if(pte_val(*pte) & _PAGE_VALID)
					blast_scache64_page(start);
				start += PAGE_SIZE;
			}
			__restore_flags(flags);
		}
	}
}

static void r4k_flush_cache_range_s128d32i32(struct mm_struct *mm,
					     unsigned long start,
					     unsigned long end)
{
	struct vm_area_struct *vma;
	unsigned long flags;

	if (CPU_CONTEXT(smp_processor_id(), mm) != 0)
		return;

	start &= PAGE_MASK;
#ifdef DEBUG_CACHE
	printk("crange[%d,%08lx,%08lx]", (int)mm->context, start, end);
#endif
	vma = find_vma(mm, start);
	if(vma) {
		if (CPU_CONTEXT(smp_processor_id(), mm) !=
				CPU_CONTEXT(smp_processor_id(), current->mm)) {
			r4k_flush_cache_all_s128d32i32();
		} else {
			pgd_t *pgd;
			pmd_t *pmd;
			pte_t *pte;

			__save_and_cli(flags);
			while(start < end) {
				pgd = pgd_offset(mm, start);
				pmd = pmd_offset(pgd, start);
				pte = pte_offset(pmd, start);

				if(pte_val(*pte) & _PAGE_VALID)
					blast_scache128_page(start);
				start += PAGE_SIZE;
			}
			__restore_flags(flags);
		}
	}
}

static void r4k_flush_cache_range_d16i16(struct mm_struct *mm,
					 unsigned long start,
					 unsigned long end)
{
	if (CPU_CONTEXT(smp_processor_id(), mm) != 0) {
		unsigned long flags;

#ifdef DEBUG_CACHE
		printk("crange[%d,%08lx,%08lx]", (int)mm->context, start, end);
#endif
		__save_and_cli(flags);
		blast_dcache16(); blast_icache16();
		__restore_flags(flags);
	}
}

static void r4k_flush_cache_range_d32i32(struct mm_struct *mm,
					 unsigned long start,
					 unsigned long end)
{
	if (CPU_CONTEXT(smp_processor_id(), mm) != 0) {
		unsigned long flags;

#ifdef DEBUG_CACHE
		printk("crange[%d,%08lx,%08lx]", (int)mm->context, start, end);
#endif
		__save_and_cli(flags);
		blast_dcache32(); blast_icache32();
		__restore_flags(flags);
	}
}

/*
 * On architectures like the Sparc, we could get rid of lines in
 * the cache created only by a certain context, but on the MIPS
 * (and actually certain Sparc's) we cannot.
 */
static void r4k_flush_cache_mm_s16d16i16(struct mm_struct *mm)
{
	if (CPU_CONTEXT(smp_processor_id(), mm) != 0) {
#ifdef DEBUG_CACHE
		printk("cmm[%d]", (int)mm->context);
#endif
		r4k_flush_cache_all_s16d16i16();
	}
}

static void r4k_flush_cache_mm_s32d16i16(struct mm_struct *mm)
{
	if (CPU_CONTEXT(smp_processor_id(), mm) != 0) {
#ifdef DEBUG_CACHE
		printk("cmm[%d]", (int)mm->context);
#endif
		r4k_flush_cache_all_s32d16i16();
	}
}

static void r4k_flush_cache_mm_s64d16i16(struct mm_struct *mm)
{
	if (CPU_CONTEXT(smp_processor_id(), mm) != 0) {
#ifdef DEBUG_CACHE
		printk("cmm[%d]", (int)mm->context);
#endif
		r4k_flush_cache_all_s64d16i16();
	}
}

static void r4k_flush_cache_mm_s128d16i16(struct mm_struct *mm)
{
	if (CPU_CONTEXT(smp_processor_id(), mm) != 0) {
#ifdef DEBUG_CACHE
		printk("cmm[%d]", (int)mm->context);
#endif
		r4k_flush_cache_all_s128d16i16();
	}
}

static void r4k_flush_cache_mm_s32d32i32(struct mm_struct *mm)
{
	if (CPU_CONTEXT(smp_processor_id(), mm) != 0) {
#ifdef DEBUG_CACHE
		printk("cmm[%d]", (int)mm->context);
#endif
		r4k_flush_cache_all_s32d32i32();
	}
}

static void r4k_flush_cache_mm_s64d32i32(struct mm_struct *mm)
{
	if (CPU_CONTEXT(smp_processor_id(), mm) != 0) {
#ifdef DEBUG_CACHE
		printk("cmm[%d]", (int)mm->context);
#endif
		r4k_flush_cache_all_s64d32i32();
	}
}

static void r4k_flush_cache_mm_s128d32i32(struct mm_struct *mm)
{
	if (CPU_CONTEXT(smp_processor_id(), mm) != 0) {
#ifdef DEBUG_CACHE
		printk("cmm[%d]", (int)mm->context);
#endif
		r4k_flush_cache_all_s128d32i32();
	}
}

static void r4k_flush_cache_mm_d16i16(struct mm_struct *mm)
{
	if (CPU_CONTEXT(smp_processor_id(), mm) != 0) {
#ifdef DEBUG_CACHE
		printk("cmm[%d]", (int)mm->context);
#endif
		r4k_flush_cache_all_d16i16();
	}
}

static void r4k_flush_cache_mm_d32i32(struct mm_struct *mm)
{
	if (CPU_CONTEXT(smp_processor_id(), mm) != 0) {
#ifdef DEBUG_CACHE
		printk("cmm[%d]", (int)mm->context);
#endif
		r4k_flush_cache_all_d32i32();
	}
}

static void r4k_flush_cache_page_s16d16i16(struct vm_area_struct *vma,
					   unsigned long page)
{
	struct mm_struct *mm = vma->vm_mm;
	unsigned long flags;
	pgd_t *pgdp;
	pmd_t *pmdp;
	pte_t *ptep;

	/*
	 * If ownes no valid ASID yet, cannot possibly have gotten
	 * this page into the cache.
	 */
	if (CPU_CONTEXT(smp_processor_id(), mm) == 0)
		return;

#ifdef DEBUG_CACHE
	printk("cpage[%d,%08lx]", (int)mm->context, page);
#endif
	__save_and_cli(flags);
	page &= PAGE_MASK;
	pgdp = pgd_offset(mm, page);
	pmdp = pmd_offset(pgdp, page);
	ptep = pte_offset(pmdp, page);

	/*
	 * If the page isn't marked valid, the page cannot possibly be
	 * in the cache.
	 */
	if(!(pte_val(*ptep) & _PAGE_VALID))
		goto out;

	/* Doing flushes for another ASID than the current one is
	 * too difficult since stupid R4k caches do a TLB translation
	 * for every cache flush operation.  So we do indexed flushes
	 * in that case, which doesn't overly flush the cache too much.
	 */
	if (CPU_CONTEXT(smp_processor_id(), mm) !=
	    CPU_CONTEXT(smp_processor_id(), current->mm)) {
		/* Do indexed flush, too much work to get the (possible)
		 * tlb refills to work correctly.
		 */
		page = (KSEG0 + (page & (scache_size - 1)));
		blast_dcache16_page_indexed(page);
		blast_scache16_page_indexed(page);
	} else
		blast_scache16_page(page);
out:
	__restore_flags(flags);
}

static void r4k_flush_cache_page_s32d16i16(struct vm_area_struct *vma,
					   unsigned long page)
{
	struct mm_struct *mm = vma->vm_mm;
	unsigned long flags;
	pgd_t *pgdp;
	pmd_t *pmdp;
	pte_t *ptep;

	/*
	 * If ownes no valid ASID yet, cannot possibly have gotten
	 * this page into the cache.
	 */
	if (CPU_CONTEXT(smp_processor_id(), mm) == 0)
		return;

#ifdef DEBUG_CACHE
	printk("cpage[%d,%08lx]", (int)mm->context, page);
#endif
	__save_and_cli(flags);
	page &= PAGE_MASK;
	pgdp = pgd_offset(mm, page);
	pmdp = pmd_offset(pgdp, page);
	ptep = pte_offset(pmdp, page);

	/* If the page isn't marked valid, the page cannot possibly be
	 * in the cache.
	 */
	if(!(pte_val(*ptep) & _PAGE_VALID))
		goto out;

	/* Doing flushes for another ASID than the current one is
	 * too difficult since stupid R4k caches do a TLB translation
	 * for every cache flush operation.  So we do indexed flushes
	 * in that case, which doesn't overly flush the cache too much.
	 */
	if (CPU_CONTEXT(smp_processor_id(), mm) !=
	    CPU_CONTEXT(smp_processor_id(), current->mm)) {
		/* Do indexed flush, too much work to get the (possible)
		 * tlb refills to work correctly.
		 */
		page = (KSEG0 + (page & (scache_size - 1)));
		blast_dcache16_page_indexed(page);
		blast_scache32_page_indexed(page);
	} else
		blast_scache32_page(page);
out:
	__restore_flags(flags);
}

static void r4k_flush_cache_page_s64d16i16(struct vm_area_struct *vma,
					   unsigned long page)
{
	struct mm_struct *mm = vma->vm_mm;
	unsigned long flags;
	pgd_t *pgdp;
	pmd_t *pmdp;
	pte_t *ptep;

	/*
	 * If ownes no valid ASID yet, cannot possibly have gotten
	 * this page into the cache.
	 */
	if (CPU_CONTEXT(smp_processor_id(), mm) == 0)
		return;

#ifdef DEBUG_CACHE
	printk("cpage[%d,%08lx]", (int)mm->context, page);
#endif
	__save_and_cli(flags);
	page &= PAGE_MASK;
	pgdp = pgd_offset(mm, page);
	pmdp = pmd_offset(pgdp, page);
	ptep = pte_offset(pmdp, page);

	/* If the page isn't marked valid, the page cannot possibly be
	 * in the cache.
	 */
	if(!(pte_val(*ptep) & _PAGE_VALID))
		goto out;

	/*
	 * Doing flushes for another ASID than the current one is
	 * too difficult since stupid R4k caches do a TLB translation
	 * for every cache flush operation.  So we do indexed flushes
	 * in that case, which doesn't overly flush the cache too much.
	 */
	if (CPU_CONTEXT(smp_processor_id(), mm) != 
	    CPU_CONTEXT(smp_processor_id(), current->mm)) {
		/* Do indexed flush, too much work to get the (possible)
		 * tlb refills to work correctly.
		 */
		page = (KSEG0 + (page & (scache_size - 1)));
		blast_dcache16_page_indexed(page);
		blast_scache64_page_indexed(page);
	} else
		blast_scache64_page(page);
out:
	__restore_flags(flags);
}

static void r4k_flush_cache_page_s128d16i16(struct vm_area_struct *vma,
					    unsigned long page)
{
	struct mm_struct *mm = vma->vm_mm;
	unsigned long flags;
	pgd_t *pgdp;
	pmd_t *pmdp;
	pte_t *ptep;

	/*
	 * If ownes no valid ASID yet, cannot possibly have gotten
	 * this page into the cache.
	 */
	if (CPU_CONTEXT(smp_processor_id(), mm) == 0)
		return;

#ifdef DEBUG_CACHE
	printk("cpage[%d,%08lx]", (int)mm->context, page);
#endif
	__save_and_cli(flags);
	page &= PAGE_MASK;
	pgdp = pgd_offset(mm, page);
	pmdp = pmd_offset(pgdp, page);
	ptep = pte_offset(pmdp, page);

	/*
	 * If the page isn't marked valid, the page cannot possibly be
	 * in the cache.
	 */
	if(!(pte_val(*ptep) & _PAGE_VALID))
		goto out;

	/* Doing flushes for another ASID than the current one is
	 * too difficult since stupid R4k caches do a TLB translation
	 * for every cache flush operation.  So we do indexed flushes
	 * in that case, which doesn't overly flush the cache too much.
	 */
	if (CPU_CONTEXT(smp_processor_id(), mm) != 
	    CPU_CONTEXT(smp_processor_id(), current->mm)) {
		/*
		 * Do indexed flush, too much work to get the (possible)
		 * tlb refills to work correctly.
		 */
		page = (KSEG0 + (page & (scache_size - 1)));
		blast_dcache16_page_indexed(page);
		blast_scache128_page_indexed(page);
	} else
		blast_scache128_page(page);
out:
	__restore_flags(flags);
}

static void r4k_flush_cache_page_s32d32i32(struct vm_area_stru#include <linux/module.h>
#include <linux/linkage.h>
#include <linux/sched.h>
#include <linux/string.h>
#include <linux/mm.h>
#include <linux/user.h>
#include <linux/elfcore.h>
#include <linux/in6.h>
#include <linux/interrupt.h>
#include <linux/config.h>

#include <asm/setup.h>
#include <asm/machdep.h>
#include <asm/pgalloc.h>
#include <asm/irq.h>
#include <asm/io.h>
#include <asm/semaphore.h>
#include <asm/checksum.h>
#include <asm/hardirq.h>
#include <asm/softirq.h>

asmlinkage long long __ashldi3 (long long, int);
asmlinkage long long __ashrdi3 (long long, int);
asmlinkage long long __lshrdi3 (long long, int);
asmlinkage long long __muldi3 (long long, long long);
extern char m68k_debug_device[];

extern void dump_thread(struct pt_regs *, struct user *);
extern int dump_fpu(elf_fpregset_t *);

/* platform dependent support */

EXPORT_SYMBOL(m68k_machtype);
EXPORT_SYMBOL(m68k_cputype);
EXPORT_SYMBOL(m68k_is040or060);
EXPORT_SYMBOL(m68k_realnum_memory);
EXPORT_SYMBOL(m68k_memory);
#ifndef CONFIG_SUN3
EXPORT_SYMBOL(cache_push);
EXPORT_SYMBOL(cache_clear);
#ifndef CONFIG_SINGLE_MEMORY_CHUNK
EXPORT_SYMBOL(mm_vtop);
EXPORT_SYMBOL(mm_ptov);
EXPORT_SYMBOL(mm_end_of_chunk);
#endif /* !CONFIG_SINGLE_MEMORY_CHUNK */
EXPORT_SYMBOL(mm_vtop_fallback);
EXPORT_SYMBOL(__ioremap);
EXPORT_SYMBOL(iounmap);
EXPORT_SYMBOL(kernel_set_cachemode);
#endif /* !CONFIG_SUN3 */
EXPORT_SYMBOL(m68k_debug_device);
EXPORT_SYMBOL(dump_fpu);
EXPORT_SYMBOL(dump_thread);
EXPORT_SYMBOL(strnlen);
EXPORT_SYMBOL(strrchr);
EXPORT_SYMBOL(strstr);
EXPORT_SYMBOL(strtok);
EXPORT_SYMBOL(enable_irq);
EXPORT_SYMBOL(disable_irq);
EXPORT_SYMBOL(kernel_thread);
#ifdef CONFIG_VME
EXPORT_SYMBOL(vme_brdtype);
#endif

/* Networking helper routines. */
EXPORT_SYMBOL(csum_partial_copy);

/* The following are special because they're not called
   explicitly (the C compiler generates them).  Fortunately,
   their interface isn't gonna change any time soon now, so
   it's OK to leave it out of version control.  */
EXPORT_SYMBOL_NOVERS(__ashldi3);
EXPORT_SYMBOL_NOVERS(__ashrdi3);
EXPORT_SYMBOL_NOVERS(__lshrdi3);
EXPORT_SYMBOL_NOVERS(memcpy);
EXPORT_SYMBOL_NOVERS(memset);
EXPORT_SYMBOL_NOVERS(memcmp);
EXPORT_SYMBOL_NOVERS(memscan);
EXPORT_SYMBOL_NOVERS(__muldi3);

EXPORT_SYMBOL_NOVERS(__down_failed);
EXPORT_SYMBOL_NOVERS(__down_failed_interruptible);
EXPORT_SYMBOL_NOVERS(__down_failed_trylock);
EXPORT_SYMBOL_NOVERS(__up_wakeup);

EXPORT_SYMBOL(get_wchan);
/* -*- mode: asm -*-
**
** head.S -- This file contains the initial boot code for the
**	     Linux/68k kernel.
**
** Copyright 1993 by Hamish Macdonald
**
** 68040 fixes by Michael Rausch
** 68060 fixes by Roman Hodek
** MMU cleanup by Randy Thelen
** Final MMU cleanup by Roman Zippel
**
** Atari support by Andreas Schwab, using ideas of Robert de Vries
** and Bjoern Brauel
** VME Support by Richard Hirst
**
** 94/11/14 Andreas Schwab: put kernel at PAGESIZE
** 94/11/18 Andreas Schwab: remove identity mapping of STRAM for Atari
** ++ Bjoern & Roman: ATARI-68040 support for the Medusa
** 95/11/18 Richard Hirst: Added MVME166 support
** 96/04/26 Guenther Kelleter: fixed identity mapping for Falcon with
** 			      Magnum- and FX-alternate ram
** 98/04/25 Phil Blundell: added HP300 support
** 1998/08/30 David Kilzer: Added support for fbcon_font_desc structures
**            for linux-2.1.115
** 9/02/11  Richard Zidlicky: added Q40 support (initial vesion 99/01/01) 
**
** This file is subject to the terms and conditions of the GNU General Public
** License. See the file README.legal in the main directory of this archive
** for more details.
**
*/

/*
 * Linux startup code.
 *
 * At this point, the boot loader has:
 * Disabled interrupts
 * Disabled caches
 * Put us in supervisor state.
 *
 * The kernel setup code takes the following steps:
 * .  Raise interrupt level
 * .  Set up initial kernel memory mapping.
 *    .  This sets up a mapping of the 4M of memory the kernel is located in.
 *    .  It also does a mapping of any initial machine specific areas.
 * .  Enable the MMU
 * .  Enable cache memories
 * .  Jump to kernel startup
 *
 * Much of the file restructuring was to accomplish:
 * 1) Remove register dependency through-out the file.
 * 2) Increase use of subroutines to perform functions
 * 3) Increase readability of the code
 *
 * Of course, readability is a subjective issue, so it will never be
 * argued that that goal was accomplished.  It was merely a goal.
 * A key way to help make code more readable is to give good
 * documentation.  So, the first thing you will find is exaustive
 * write-ups on the structure of the file, and the features of the
 * functional subroutines.
 *
 * General Structure:
 * ------------------
 *	Without a doubt the single largest chunk of head.S is spent
 * mapping the kernel and I/O physical space into the logical range
 * for the kernel.
 *	There are new subroutines and data structures to make MMU
 * support cleaner and easier to understand.
 * 	First, you will find a routine call "mmu_map" which maps
 * a logical to a physical region for some length given a cache
 * type on behalf of the caller.  This routine makes writing the
 * actual per-machine specific code very simple.
 *	A central part of the code, but not a subroutine in itself,
 * is the mmu_init code which is broken down into mapping the kernel
 * (the same for all machines) and mapping machine-specific I/O
 * regions.
 *	Also, there will be a description of engaging the MMU and
 * caches.
 *	You will notice that there is a chunk of code which
 * can emit the entire MMU mapping of the machine.  This is present
 * only in debug modes and can be very helpful.
 *	Further, there is a new console driver in head.S that is
 * also only engaged in debug mode.  Currently, it's only supported
 * on the Macintosh class of machines.  However, it is hoped that
 * others will plug-in support for specific machines.
 *
 * ######################################################################
 *
 * mmu_map
 * -------
 *	mmu_map was written for two key reasons.  First, it was clear
 * that it was very difficult to read the previous code for mapping
 * regions of memory.  Second, the Macintosh required such extensive
 * memory allocations that it didn't make sense to propogate the
 * existing code any further.
 *	mmu_map requires some parameters:
 *
 *	mmu_map (logical, physical, length, cache_type)
 *
 *	While this essentially describes the function in the abstract, you'll
 * find more indepth description of other parameters at the implementation site.
 * 
 * mmu_get_root_table_entry
 * ------------------------
 * mmu_get_ptr_table_entry
 * -----------------------
 * mmu_get_page_table_entry
 * ------------------------
 * 
 *	These routines are used by other mmu routines to get a pointer into
 * a table, if necessary a new table is allocated. These routines are working
 * basically like pmd_alloc() and pte_alloc() in <asm/pgtable.h>. The root
 * table needs of course only to be allocated once in mmu_get_root_table_entry,
 * so that here also some mmu specific initialization is done. The second page
 * at the start of the kernel (the first page is unmapped later) is used for
 * the kernel_pg_dir. It must be at a position known at link time (as it's used
 * to initialize the init task struct) and since it needs special cache
 * settings, it's the easiest to use this page, the rest of the page is used
 * for further pointer tables.
 * mmu_get_page_table_entry allocates always a whole page for page tables, this
 * means 1024 pages and so 4MB of memory can be mapped. It doesn't make sense
 * to manage page tables in smaller pieces as nearly all mappings have that
 * size.
 *
 * ######################################################################
 *
 *
 * ######################################################################
 *
 * mmu_engage
 * ----------
 *	Thanks to a small helping routine enabling the mmu got quiet simple
 * and there is only one way left. mmu_engage makes a complete a new mapping
 * that only includes the absolute necessary to be able to jump to the final
 * postion and to restore the original mapping.
 * As this code doesn't need a transparent translation register anymore this
 * means all registers are free to be used by machines that needs them for
 * other purposes.
 *
 * ######################################################################
 *
 * mmu_print
 * ---------
 *	This algorithm will print out the page tables of the system as
 * appropriate for an 030 or an 040.  This is useful for debugging purposes
 * and as such is enclosed in #ifdef MMU_PRINT/#endif clauses.
 *
 * ######################################################################
 *
 * console_init
 * ------------
 *	The console is also able to be turned off.  The console in head.S
 * is specifically for debugging and can be very useful.  It is surrounded by
 * #ifdef CONSOLE/#endif clauses so it doesn't have to ship in known-good
 * kernels.  It's basic algorithm is to determine the size of the screen
 * (in height/width and bit depth) and then use that information for
 * displaying an 8x8 font or an 8x16 (widthxheight).  I prefer the 8x8 for
 * debugging so I can see more good data.  But it was trivial to add support
 * for both fonts, so I included it.
 *	Also, the algorithm for plotting pixels is abstracted so that in
 * theory other platforms could add support for different kinds of frame
 * buffers.  This could be very useful.
 *
 * console_put_penguin
 * -------------------
 *	An important part of any Linux bring up is the penguin and there's
 * nothing like getting the Penguin on the screen!  This algorithm will work
 * on any machine for which there is a console_plot_pixel.
 *
 * console_scroll
 * --------------
 *	My hope is that the scroll algorithm does the right thing on the
 * various platforms, but it wouldn't be hard to add the test conditions
 * and new code if it doesn't.
 *
 * console_putc
 * -------------
 *
 * ######################################################################
 *
 *	Register usage has greatly simplified within head.S. Every subroutine
 * saves and restores all registers that it modifies (except it returns a
 * value in there of course). So the only register that needs to be initialized
 * is the stack pointer.
 * All other init code and data is now placed in the init section, so it will
 * be automatically freed at the end of the kernel initialization.
 *
 * ######################################################################
 *
 * options
 * -------
 *	There are many options availble in a build of this file.  I've
 * taken the time to describe them here to save you the time of searching
 * for them and trying to understand what they mean.
 *
 * CONFIG_xxx:	These are the obvious machine configuration defines created
 * during configuration.  These are defined in include/linux/autoconf.h.
 *
 * CONSOLE:	There is support for head.S console in this file.  This
 * console can talk to a Mac frame buffer, but could easily be extrapolated
 * to extend it to support other platforms.
 *
 * TEST_MMU:	This is a test harness for running on any given machine but
 * getting an MMU dump for another class of machine.  The classes of machines
 * that can be tested are any of the makes (Atari, Amiga, Mac, VME, etc.)
 * and any of the models (030, 040, 060, etc.).
 *
 *	NOTE:	TEST_MMU is NOT permanent!  It is scheduled to be removed
 *		When head.S boots on Atari, Amiga, Macintosh, and VME
 *		machines.  At that point the underlying logic will be
 *		believed to be solid enough to be trusted, and TEST_MMU
 *		can be dropped.  Do note that that will clean up the
 *		head.S code significantly as large blocks of #if/#else
 *		clauses can be removed.
 *
 * MMU_NOCACHE_KERNEL:	On the Macintosh platform there was an inquiry into
 * determing why devices don't appear to work.  A test case was to remove
 * the cacheability of the kernel bits.
 *
 * MMU_PRINT:	There is a routine built into head.S that can display the
 * MMU data structures.  It outputs its result through the serial_putc
 * interface.  So where ever that winds up driving data, that's where the
 * mmu struct will appear.  On the Macintosh that's typically the console.
 *
 * SERIAL_DEBUG:	There are a series of putc() macro statements
 * scattered through out the code to give progress of status to the
 * person sitting at the console.  This constant determines whether those
 * are used.
 *
 * DEBUG:	This is the standard DEBUG flag that can be set for building
 *		the kernel.  It has the effect adding additional tests into
 *		the code.
 *
 * FONT_6x11:
 * FONT_8x8:
 * FONT_8x16:
 *		In theory these could be determined at run time or handed
 *		over by the booter.  But, let's be real, it's a fine hard
 *		coded value.  (But, you will notice the code is run-time
 *		flexible!)  A pointer to the font's struct fbcon_font_desc
 *		is kept locally in Lconsole_font.  It is used to determine
 *		font size information dynamically.
 *
 * Atari constants:
 * USE_PRINTER:	Use the printer port for serial debug.
 * USE_SCC_B:	Use the SCC port A (Serial2) for serial debug.
 * USE_SCC_A:	Use the SCC port B (Modem2) for serial debug.
 * USE_MFP:	Use the ST-MFP port (Modem1) for serial debug.
 *
 * Macintosh constants:
 * MAC_SERIAL_DEBUG:	Turns on serial debug output for the Macintosh.
 * MAC_USE_SCC_A:	Use the SCC port A (modem) for serial debug.
 * MAC_USE_SCC_B:	Use the SCC port B (printer) for serial debug (default).
 */

#include <linux/config.h>
#include <linux/linkage.h>
#include <linux/init.h>
#include <asm/bootinfo.h>
#include <asm/setup.h>
#include <asm/entry.h>
#include <asm/pgtable.h>
#include <asm/page.h>
#include "m68k_defs.h"

#ifdef CONFIG_MAC

#include <asm/machw.h>

/*
 * Macintosh console support
 */

#define CONSOLE

/*
 * Macintosh serial debug support; outputs boot info to the printer
 *   and/or modem serial ports
 */
#undef MAC_SERIAL_DEBUG

/*
 * Macintosh serial debug port selection; define one or both;
 *   requires MAC_SERIAL_DEBUG to be defined
 */
#define MAC_USE_SCC_A		/* Macintosh modem serial port */
#define MAC_USE_SCC_B		/* Macintosh printer serial port */

#endif	/* CONFIG_MAC */

#undef MMU_PRINT
#undef MMU_NOCACHE_KERNEL
#define SERIAL_DEBUG
#undef DEBUG

/*
 * For the head.S console, there are three supported fonts, 6x11, 8x16 and 8x8.
 * The 8x8 font is harder to read but fits more on the screen.
 */
#define FONT_8x8 	/* default */
/* #define FONT_8x16 */	/* 2nd choice */
/* #define FONT_6x11 */	/* 3rd choice */

.globl SYMBOL_NAME(kernel_pg_dir)
.globl SYMBOL_NAME(availmem)
.globl SYMBOL_NAME(m68k_pgtable_cachemode)
.globl SYMBOL_NAME(m68k_supervisor_cachemode)
#ifdef CONFIG_MVME16x
.globl SYMBOL_NAME(mvme_bdid)
#endif
#ifdef CONFIG_Q40
.globl SYMBOL_NAME(q40_mem_cptr)	
#endif		

CPUTYPE_040	= 1	/* indicates an 040 */
CPUTYPE_060	= 2	/* indicates an 060 */
CPUTYPE_0460	= 3	/* if either above are set, this is set */
CPUTYPE_020	= 4	/* indicates an 020 */

/* Translation control register */
TC_ENABLE = 0x8000
TC_PAGE8K = 0x4000
TC_PAGE4K = 0x0000

/* Transparent translation registers */
TTR_ENABLE	= 0x8000	/* enable transparent translation */
TTR_ANYMODE	= 0x4000	/* user and kernel mode access */
TTR_KERNELMODE	= 0x2000	/* only kernel mode access */
TTR_USERMODE	= 0x0000	/* only user mode access */
TTR_CI		= 0x0400	/* inhibit cache */
TTR_RW		= 0x0200	/* read/write mode */
TTR_RWM		= 0x0100	/* read/write mask */
TTR_FCB2	= 0x0040	/* function code base bit 2 */
TTR_FCB1	= 0x0020	/* function code base bit 1 */
TTR_FCB0	= 0x0010	/* function code base bit 0 */
TTR_FCM2	= 0x0004	/* function code mask bit 2 */
TTR_FCM1	= 0x0002	/* function code mask bit 1 */
TTR_FCM0	= 0x0001	/* function code mask bit 0 */

/* Cache Control registers */
CC6_ENABLE_D	= 0x80000000	/* enable data cache (680[46]0) */
CC6_FREEZE_D	= 0x40000000	/* freeze data cache (68060) */
CC6_ENABLE_SB	= 0x20000000	/* enable store buffer (68060) */
CC6_PUSH_DPI	= 0x10000000	/* disable CPUSH invalidation (68060) */
CC6_HALF_D	= 0x08000000	/* half-cache mode for data cache (68060) */
CC6_ENABLE_B	= 0x00800000	/* enable branch cache (68060) */
CC6_CLRA_B	= 0x00400000	/* clear all entries in branch cache (68060) */
CC6_CLRU_B	= 0x00200000	/* clear user entries in branch cache (68060) */
CC6_ENABLE_I	= 0x00008000	/* enable instruction cache (680[46]0) */
CC6_FREEZE_I	= 0x00004000	/* freeze instruction cache (68060) */
CC6_HALF_I	= 0x00002000	/* half-cache mode for instruction cache (68060) */
CC3_ALLOC_WRITE	= 0x00002000	/* write allocate mode(68030) */
CC3_ENABLE_DB	= 0x00001000	/* enable data burst (68030) */
CC3_CLR_D	= 0x00000800	/* clear data cache (68030) */
CC3_CLRE_D	= 0x00000400	/* clear entry in data cache (68030) */
CC3_FREEZE_D	= 0x00000200	/* freeze data cache (68030) */
CC3_ENABLE_D	= 0x00000100	/* enable data cache (68030) */
CC3_ENABLE_IB	= 0x00000010	/* enable instruction burst (68030) */
CC3_CLR_I	= 0x00000008	/* clear instruction cache (68030) */
CC3_CLRE_I	= 0x00000004	/* clear entry in instruction cache (68030) */
CC3_FREEZE_I	= 0x00000002	/* freeze instruction cache (68030) */
CC3_ENABLE_I	= 0x00000001	/* enable instruction cache (68030) */

/* Miscellaneous definitions */
PAGESIZE	= 4096
PAGESHIFT	= 12

ROOT_TABLE_SIZE	= 128
PTR_TABLE_SIZE	= 128
PAGE_TABLE_SIZE	= 64
ROOT_INDEX_SHIFT = 25
PTR_INDEX_SHIFT  = 18
PAGE_INDEX_SHIFT = 12

#ifdef DEBUG
/* When debugging use readable names for labels */
#ifdef __STDC__
#define L(name) .head.S.##name
#else
#define L(name) .head.S./**/name
#endif
#else
#ifdef __STDC__
#define L(name) .L##name
#else
#define L(name) .L/**/name
#endif
#endif

/* The __INITDATA stuff is a no-op when ftrace or kgdb are turned on */
#ifndef __INITDATA
#define __INITDATA	.data
#define __FINIT		.previous
#endif

/* Several macros to make the writing of subroutines easier:
 * - func_start marks the beginning of the routine which setups the frame
 *   register and saves the registers, it also defines another macro
 *   to automatically restore the registers again.
 * - func_return marks the end of the routine and simply calls the prepared
 *   macro to restore registers and jump back to the caller.
 * - func_define generates another macro to automatically put arguments
 *   onto the stack call the subroutine and cleanup the stack again.
 */

/* Within subroutines these macros can be used to access the arguments
 * on the stack. With STACK some allocated memory on the stack can be
 * accessed and ARG0 points to the return address (used by mmu_engage).
 */
#define	STACK	%a6@(stackstart)
#define ARG0	%a6@(4)
#define ARG1	%a6@(8)
#define ARG2	%a6@(12)
#define ARG3	%a6@(16)
#define ARG4	%a6@(20)

.macro	func_start	name,saveregs,stack=0
L(\name):
	linkw	%a6,#-\stack
	moveml	\saveregs,%sp@-
.set	stackstart,-\stack	

.macro	func_return_\name
	moveml	%sp@+,\saveregs
	unlk	%a6
	rts
.endm
.endm

.macro	func_return	name
	func_return_\name
.endm

.macro	func_call	name
	jbsr	L(\name)
.endm

.macro	move_stack	nr,arg1,arg2,arg3,arg4
.if	\nr
	move_stack	"(\nr-1)",\arg2,\arg3,\arg4
	movel	\arg1,%sp@-
.endif
.endm

.macro	func_define	name,nr=0
.macro	\name	arg1,arg2,arg3,arg4
	move_stack	\nr,\arg1,\arg2,\arg3,\arg4
	func_call	\name
.if	\nr
	lea	%sp@(\nr*4),%sp
.endif
.endm
.endm

func_define	mmu_map,4
func_define	mmu_map_tt,4
func_define	mmu_fixup_page_mmu_cache,1
func_define	mmu_temp_map,2
func_define	mmu_engage
func_define	mmu_get_root_table_entry,1
func_define	mmu_get_ptr_table_entry,2
func_define	mmu_get_page_table_entry,2
func_define	mmu_print
func_define	get_new_page
#ifdef CONFIG_HP300
func_define	set_leds
#endif

.macro	mmu_map_eq	arg1,arg2,arg3
	mmu_map	\arg1,\arg1,\arg2,\arg3
.endm

.macro	get_bi_record	record
	pea	\record
	func_call	get_bi_record
	addql	#4,%sp
.endm

func_define	serial_putc,1
func_define	console_putc,1

.macro	putc	ch
#if defined(CONSOLE) || defined(SERIAL_DEBUG)
	pea	\ch
#endif
#ifdef CONSOLE
	func_call	console_putc
#endif
#ifdef SERIAL_DEBUG
	func_call	serial_putc
#endif
#if defined(CONSOLE) || defined(SERIAL_DEBUG)
	addql	#4,%sp
#endif
.endm

.macro	dputc	ch
#ifdef DEBUG
	putc	\ch
#endif
.endm

func_define	putn,1

.macro	dputn	nr
#ifdef DEBUG
	putn	\nr
#endif
.endm

.macro	puts		string
#if defined(CONSOLE) || defined(SERIAL_DEBUG)
	__INITDATA
.Lstr\@:
	.string	"\string"
	__FINIT
	pea	%pc@(.Lstr\@)
	func_call	puts
	addql	#4,%sp
#endif
.endm

.macro	dputs	string
#ifdef DEBUG
	puts	"\string"
#endif
.endm

#define is_not_amiga(lab) cmpl &MACH_AMIGA,%pc@(m68k_machtype); jne lab
#define is_not_atari(lab) cmpl &MACH_ATARI,%pc@(m68k_machtype); jne lab
#define is_not_mac(lab) cmpl &MACH_MAC,%pc@(m68k_machtype); jne lab
#define is_not_mvme147(lab) cmpl &MACH_MVME147,%pc@(m68k_machtype); jne lab
#define is_not_mvme16x(lab) cmpl &MACH_MVME16x,%pc@(m68k_machtype); jne lab
#define is_not_bvme6000(lab) cmpl &MACH_BVME6000,%pc@(m68k_machtype); jne lab
#define is_mvme147(lab) cmpl &MACH_MVME147,%pc@(m68k_machtype); jeq lab
#define is_mvme16x(lab) cmpl &MACH_MVME16x,%pc@(m68k_machtype); jeq lab
#define is_bvme6000(lab) cmpl &MACH_BVME6000,%pc@(m68k_machtype); jeq lab
#define is_not_hp300(lab) cmpl &MACH_HP300,%pc@(m68k_machtype); jne lab
#define is_not_apollo(lab) cmpl &MACH_APOLLO,%pc@(m68k_machtype); jne lab
#define is_not_q40(lab) cmpl &MACH_Q40,%pc@(m68k_machtype); jne lab
#define is_not_sun3x(lab) cmpl &MACH_SUN3X,%pc@(m68k_machtype); jne lab

#define hasnt_leds(lab) cmpl &MACH_HP300,%pc@(m68k_machtype); \
			jeq 42f; \
			cmpl &MACH_APOLLO,%pc@(m68k_machtype); \
			jne lab ;\
		42:\

#define is_040_or_060(lab)	btst &CPUTYPE_0460,%pc@(L(cputype)+3); jne lab
#define is_not_040_or_060(lab)	btst &CPUTYPE_0460,%pc@(L(cputype)+3); jeq lab
#define is_040(lab)		btst &CPUTYPE_040,%pc@(L(cputype)+3); jne lab
#define is_060(lab)		btst &CPUTYPE_060,%pc@(L(cputype)+3); jne lab
#define is_not_060(lab)		btst &CPUTYPE_060,%pc@(L(cputype)+3); jeq lab
#define is_020(lab)		btst &CPUTYPE_020,%pc@(L(cputype)+3); jne lab
#define is_not_020(lab)		btst &CPUTYPE_020,%pc@(L(cputype)+3); jeq lab

/* On the HP300 we use the on-board LEDs for debug output before
   the console is running.  Writing a 1 bit turns the corresponding LED
   _off_ - on the 340 bit 7 is towards the back panel of the machine.  */
.macro	leds	mask
#if defined(CONFIG_HP300) || defined(CONFIG_APOLLO)
	hasnt_leds(.Lled\@)
	pea	\mask
	func_call	set_leds
	addql	#4,%sp
.Lled\@:
#endif
.endm

.text
ENTRY(_stext)
/*
 * Version numbers of the bootinfo interface
 * The area from _stext to _start will later be used as kernel pointer table
 */
	bras	1f	/* Jump over bootinfo version numbers */

	.long	BOOTINFOV_MAGIC
	.long	MACH_AMIGA, AMIGA_BOOTI_VERSION
	.long	MACH_ATARI, ATARI_BOOTI_VERSION
	.long	MACH_MVME147, MVME147_BOOTI_VERSION
	.long	MACH_MVME16x, MVME16x_BOOTI_VERSION
	.long	MACH_BVME6000, BVME6000_BOOTI_VERSION
	.long	MACH_MAC, MAC_BOOTI_VERSION
	.long	MACH_Q40, Q40_BOOTI_VERSION	
	.long	0
1:	jra	SYMBOL_NAME(__start)

.equ	SYMBOL_NAME(kernel_pg_dir),SYMBOL_NAME(_stext)

.equ	.,SYMBOL_NAME(_stext)+PAGESIZE

ENTRY(_start)
	jra	SYMBOL_NAME(__start)
__INIT
ENTRY(__start)

/*
 * Setup initial stack pointer
 */
	lea	%pc@(SYMBOL_NAME(_stext)),%sp

/*
 * Record the CPU and machine type.
 */

	get_bi_record	BI_MACHTYPE
	lea	%pc@(SYMBOL_NAME(m68k_machtype)),%a1
	movel	%a0@,%a1@

	get_bi_record	BI_FPUTYPE
	lea	%pc@(SYMBOL_NAME(m68k_fputype)),%a1
	movel	%a0@,%a1@

	get_bi_record	BI_MMUTYPE
	lea	%pc@(SYMBOL_NAME(m68k_mmutype)),%a1
	movel	%a0@,%a1@

	get_bi_record	BI_CPUTYPE
	lea	%pc@(SYMBOL_NAME(m68k_cputype)),%a1
	movel	%a0@,%a1@

#ifdef CONFIG_MAC
/*
 * For Macintosh, we need to determine the display parameters early (at least
 * while debugging it).
 */

	is_not_mac(L(test_notmac))

	get_bi_record	BI_MAC_VADDR
	lea	%pc@(L(mac_videobase)),%a1
	movel	%a0@,%a1@

	get_bi_record	BI_MAC_VDEPTH
	lea	%pc@(L(mac_videodepth)),%a1
	movel	%a0@,%a1@

	get_bi_record	BI_MAC_VDIM
	lea	%pc@(L(mac_dimensions)),%a1
	movel	%a0@,%a1@

	get_bi_record	BI_MAC_VROW
	lea	%pc@(L(mac_rowbytes)),%a1
	movel	%a0@,%a1@

#ifdef MAC_SERIAL_DEBUG
	get_bi_record	BI_MAC_SCCBASE
	lea	%pc@(L(mac_sccbase)),%a1
	movel	%a0@,%a1@
#endif /* MAC_SERIAL_DEBUG */

#if 0
	/*
	 * Clear the screen
	 */
	lea	%pc@(L(mac_videobase)),%a0
	movel	%a0@,%a1
	lea	%pc@(L(mac_dimensions)),%a0
	movel	%a0@,%d1
	swap	%d1		/* #rows is high bytes */
	andl	#0xFFFF,%d1	/* rows */
	subl	#10,%d1
	lea	%pc@(L(mac_rowbytes)),%a0
loopy2:
	movel	%a0@,%d0
	subql	#1,%d0
loopx2:
	moveb	#0x55, %a1@+
	dbra	%d0,loopx2
	dbra	%d1,loopy2
#endif

L(test_notmac):
#endif /* CONFIG_MAC */


/*
 * There are ultimately two pieces of information we want for all kinds of
 * processors CpuType and CacheBits.  The CPUTYPE was passed in from booter
 * and is converted here from a booter type definition to a separate bit
 * number which allows for the standard is_0x0 macro tests.
 */
	movel	%pc@(SYMBOL_NAME(m68k_cputype)),%d0
	/*
	 * Assume it's an 030
	 */
	clrl	%d1

	/*
	 * Test the BootInfo cputype for 060
	 */
	btst	#CPUB_68060,%d0
	jeq	1f
	bset	#CPUTYPE_060,%d1
	bset	#CPUTYPE_0460,%d1
	jra	3f
1:
	/*
	 * Test the BootInfo cputype for 040
	 */
	btst	#CPUB_68040,%d0
	jeq	2f
	bset	#CPUTYPE_040,%d1
	bset	#CPUTYPE_0460,%d1
	jra	3f
2:
	/*
	 * Test the BootInfo cputype for 020
	 */
	btst	#CPUB_68020,%d0
	jeq	3f
	bset	#CPUTYPE_020,%d1
	jra	3f
3:
	/*
	 * Record the cpu type
	 */
	lea	%pc@(L(cputype)),%a0
	movel	%d1,%a0@

	/*
	 * NOTE:
	 *
	 * Now the macros are valid:
	 *	is_040_or_060
	 *	is_not_040_or_060
	 *	is_040
	 *	is_060
	 *	is_not_060
	 */

	/*
	 * Determine the cache mode for pages holding MMU tables
	 * and for supervisor mode, unused for '020 and '030
	 */
	clrl	%d0
	clrl	%d1

	is_not_040_or_060(L(save_cachetype))

	/*
	 * '040 or '060
	 * d1 := cacheable write-through
	 * NOTE: The 68040 manual strongly recommends non-cached for MMU tables,
	 * but we have been using write-through since at least 2.0.29 so I
	 * guess it is OK.
	 */
#ifdef CONFIG_060_WRITETHROUGH
	/*
	 * If this is a 68060 board using drivers with cache coherency
	 * problems, then supervisor memory accesses need to be write-through
	 * also; otherwise, we want copyback.
	 */

	is_not_060(1f)
	movel	#_PAGE_CACHE040W,%d0
	jra	L(save_cachetype)
#endif /* CONFIG_060_WRITETHROUGH */
1:
	movew	#_PAGE_CACHE040,%d0

	movel	#_PAGE_CACHE040W,%d1

L(save_cachetype):
	/* Save cache mode for supervisor mode and page tables
	 */
	lea	%pc@(SYMBOL_NAME(m68k_supervisor_cachemode)),%a0
	movel	%d0,%a0@
	lea	%pc@(SYMBOL_NAME(m68k_pgtable_cachemode)),%a0
	movel	%d1,%a0@

/*
 * raise interrupt level
 */
	movew	#0x2700,%sr

/*
   If running on an Atari, determine the I/O base of the
   serial port and test if we are running on a Medusa or Hades.
   This test is necessary here, because on the Hades the serial
   port is only accessible in the high I/O memory area.

   The test whether it is a Medusa is done by writing to the byte at
   phys. 0x0. This should result in a bus error on all other machines.

   ...should, but doesn't. The Afterburner040 for the Falcon has the
   same behaviour (0x0..0x7 are no ROM shadow). So we have to do
   another test to distinguish Medusa and AB040. This is a
   read attempt for 0x00ff82fe phys. that should bus error on a Falcon
   (+AB040), but is in the range where the Medusa always asserts DTACK.

   The test for the Hades is done by reading address 0xb0000000. This
   should give a bus error on the Medusa.
 */

#ifdef CONFIG_ATARI
	is_not_atari(L(notypetest))

	/* get special machine type (Medusa/Hades/AB40) */
	moveq	#0,%d3 /* default if tag doesn't exist */
	get_bi_record	BI_ATARI_MCH_TYPE
	tstl	%d0
	jbmi	1f
	movel	%a0@,%d3
	lea	%pc@(SYMBOL_NAME(atari_mch_type)),%a0
	movel	%d3,%a0@
1:
	/* On the Hades, the iobase must be set up before opening the
	 * serial port. There are no I/O regs at 0x00ffxxxx at all. */
	moveq	#0,%d0
	cmpl	#ATARI_MACH_HADES,%d3
	jbne	1f
	movel	#0xff000000,%d0		/* Hades I/O base addr: 0xff000000 */
1:	lea     %pc@(L(iobase)),%a0
	movel   %d0,%a0@

L(notypetest):
#endif

#ifdef CONFIG_VME
	is_mvme147(L(getvmetype))
	is_bvme6000(L(getvmetype))
	is_not_mvme16x(L(gvtdone))

	/* See if the loader has specified the BI_VME_TYPE tag.  Recent
	 * versions of VMELILO and TFTPLILO do this.  We have to do this
	 * early so we know how to handle console output.  If the tag
	 * doesn't exist then we use the Bug for output on MVME16x.
	 */
L(getvmetype):
	get_bi_record	BI_VME_TYPE
	tstl	%d0
	jbmi	1f
	movel	%a0@,%d3
	lea	%pc@(SYMBOL_NAME(vme_brdtype)),%a0
	movel	%d3,%a0@
1:
#ifdef CONFIG_MVME16x
	is_not_mvme16x(L(gvtdone))

	/* Need to get the BRD_ID info to differentiate between 162, 167,
	 * etc.  This is available as a BI_VME_BRDINFO tag with later
	 * versions of VMELILO and TFTPLILO, otherwise we call the Bug.
	 */
	get_bi_record	BI_VME_BRDINFO
	tstl	%d0
	jpl	1f

	/* Get pointer to board ID data from Bug */
	movel	%d2,%sp@-
	trap	#15
	.word	0x70		/* trap 0x70 - .BRD_ID */
	movel	%sp@+,%a0
1:
	lea	%pc@(SYMBOL_NAME(mvme_bdid)),%a1
	/* Structure is 32 bytes long */
	movel	%a0@+,%a1@+
	movel	%a0@+,%a1@+
	movel	%a0@+,%a1@+
	movel	%a0@+,%a1@+
	movel	%a0@+,%a1@+
	movel	%a0@+,%a1@+
	movel	%a0@+,%a1@+
	movel	%a0@+,%a1@+
#endif

L(gvtdone):

#endif

/*
 * Initialize serial port
 */
	jbsr	L(serial_init)

/*
 * Initialize console
 */
#ifdef CONFIG_MAC
	is_not_mac(L(nocon))
#ifdef CONSOLE
	jbsr	L(console_init)
#ifdef CONSOLE_PENGUIN
	jbsr	L(console_put_penguin)
#endif	/* CONSOLE_PENGUIN */
	jbsr	L(console_put_stats)
#endif	/* CONSOLE */
L(nocon):
#endif	/* CONFIG_MAC */


	putc	'\n'
	putc	'A'
	dputn	%pc@(L(cputype))
	dputn	%pc@(SYMBOL_NAME(m68k_supervisor_cachemode))
	dputn	%pc@(SYMBOL_NAME(m68k_pgtable_cachemode))
	dputc	'\n'

/*
 * Save physical start address of kernel
 */
	lea	%pc@(L(phys_kernel_start)),%a0
	lea	%pc@(SYMBOL_NAME(_stext)),%a1
	subl	#SYMBOL_NAME(_stext),%a1
	addl	#PAGE_OFFSET,%a1
	movel	%a1,%a0@

	putc	'B'

	leds	0x4

/*
 *	mmu_init
 *
 *	This block of code does what's necessary to map in the various kinds
 *	of machines for execution of Linux.
 *	First map the first 4 MB of kernel code & data
 */

	mmu_map	#PAGE_OFFSET,%pc@(L(phys_kernel_start)),#4*1024*1024,\
		%pc@(SYMBOL_NAME(m68k_supervisor_cachemode))

	putc	'C'

#ifdef CONFIG_AMIGA

L(mmu_init_amiga):

	is_not_amiga(L(mmu_init_not_amiga))
/*
 * mmu_init_amiga
 */

	putc	'D'

	is_not_040_or_060(1f)

	/*
	 * 040: Map the 16Meg range physical 0x0 upto logical 0x8000.0000
	 */
	mmu_map		#0x80000000,#0,#0x01000000,#_PAGE_NOCACHE_S
	/*
	 * Map the Zorro III I/O space with transparent translation
	 * for frame buffer memory etc.
	 */
	mmu_map_tt	#1,#0x40000000,#0x20000000,#_PAGE_NOCACHE_S

	jbra	L(mmu_init_done)

1:
	/*
	 * 030:	Map the 32Meg range physical 0x0 upto logical 0x8000.0000
	 */
	mmu_map		#0x80000000,#0,#0x02000000,#_PAGE_NOCACHE030
	mmu_map_tt	#1,#0x40000000,#0x20000000,#_PAGE_NOCACHE030

	jbra	L(mmu_init_done)

L(mmu_init_not_amiga):
#endif

#ifdef CONFIG_ATARI

L(mmu_init_atari):

	is_not_atari(L(mmu_init_not_atari))

	putc	'E'

/* On the Atari, we map the I/O region (phys. 0x00ffxxxx) by mapping
   the last 16 MB of virtual address space to the first 16 MB (i.e.
   0xffxxxxxx -> 0x00xxxxxx). For this, an additional pointer table is
   needed. I/O ranges are marked non-cachable.

   For the Medusa it is better to map the I/O region transparently
   (i.e. 0xffxxxxxx -> 0xffxxxxxx), because some I/O registers are
   accessible only in the high area.

   On the Hades all I/O registers are only accessible in the high
   area.
*/

	/* I/O base addr for non-Medusa, non-Hades: 0x00000000 */
	moveq	#0,%d0
	movel	%pc@(SYMBOL_NAME(atari_mch_type)),%d3
	cmpl	#ATARI_MACH_MEDUSA,%d3
	jbeq	2f
	cmpl	#ATARI_MACH_HADES,%d3
	jbne	1f
2:	movel	#0xff000000,%d0 /* Medusa/Hades base addr: 0xff000000 */
1:	movel	%d0,%d3

	is_040_or_060(L(spata68040))

	/* Map everything non-cacheable, though not all parts really
	 * need to disable caches (crucial only for 0xff8000..0xffffff
	 * (standard I/O) and 0xf00000..0xf3ffff (IDE)). The remainder
	 * isn't really used, except for sometimes peeking into the
	 * ROMs (mirror at phys. 0x0), so caching isn't necessary for
	 * this. */
	mmu_map	#0xff000000,%d3,#0x01000000,#_PAGE_NOCACHE030

	jbra	L(mmu_init_done)

L(spata68040):

	mmu_map	#0xff000000,%d3,#0x01000000,#_PAGE_NOCACHE_S

	jbra	L(mmu_init_done)

L(mmu_init_not_atari):
#endif

#ifdef CONFIG_Q40
	is_not_q40(L(notq40))
	/*
	 * add transparent mapping for 0xff00 0000 - 0xffff ffff
	 * non-cached serialized etc..
	 * this includes master chip, DAC, RTC and ISA ports
	 * 0xfe000000-0xfeffffff is for screen and ROM
	 */

	putc    'Q'

	mmu_map_tt	#0,#0xfe000000,#0x01000000,#_PAGE_CACHE040W
	mmu_map_tt	#1,#0xff000000,#0x01000000,#_PAGE_NOCACHE_S
	
	jbra	L(mmu_init_done)
	
L(notq40):		
#endif	
	
#ifdef CONFIG_HP300
	is_not_hp300(L(nothp300))

/* On the HP300, we map the ROM, INTIO and DIO regions (phys. 0x00xxxxxx)
   by mapping 32MB from 0xf0xxxxxx -> 0x00xxxxxx) using an 030 early
   termination page descriptor.  The ROM mapping is needed because the LEDs
   are mapped there too.  */

	mmu_map	#0xf0000000,#0,#0x02000000,#_PAGE_NOCACHE030

L(nothp300):

#endif

#ifdef CONFIG_MVME147

       is_not_mvme147(L(not147))

       /*
	* On MVME147 we have already created kernel page tables for
	* 4MB of RAM at address 0, so now need to do a transparent
	* mapping of the top of memory space.  Make it 0.5GByte for now,
	* so we can access on-board i/o areas.
	*/

       mmu_map_tt      #1,#0xe0000000,#0x20000000,#_PAGE_NOCACHE030

       jbra    L(mmu_init_done)

L(not147):
#endif /* CONFIG_MVME147 */

#ifdef CONFIG_MVME16x

	is_not_mvme16x(L(not16x))

	/*
	 * On MVME16x we have already created kernel page tables for
	 * 4MB of RAM at address 0, so now need to do a transparent
	 * mapping of the top of memory space.  Make it 0.5GByte for now.
	 * Supervisor only access, so transparent mapping doesn't
	 * clash with User code virtual address space.
	 * this covers IO devices, PROM and SRAM.  The PROM and SRAM
	 * mapping is needed to allow 167Bug to run.
	 * IO is in the range 0xfff00000 to 0xfffeffff.
	 * PROM is 0xff800000->0xffbfffff and SRAM is
	 * 0xffe00000->0xffe1ffff.
	 */

	mmu_map_tt	#1,#0xe0000000,#0x20000000,#_PAGE_NOCACHE_S

	jbra	L(mmu_init_done)

L(not16x):
#endif	/* CONFIG_MVME162 | CONFIG_MVME167 */

#ifdef CONFIG_BVME6000

	is_not_bvme6000(L(not6000))

	/*
	 * On BVME6000 we have already created kernel page tables for
	 * 4MB of RAM at address 0, so now need to do a transparent
	 * mapping of the top of memory space.  Make it 0.5GByte for now,
	 * so we can access on-board i/o areas.
	 * Supervisor only access, so transparent mapping doesn't
	 * clash with User code virtual address space.
	 */

	mmu_map_tt	#1,#0xe0000000,#0x20000000,#_PAGE_NOCACHE_S

	jbra	L(mmu_init_done)

L(not6000):
#endif /* CONFIG_BVME6000 */

/*
 * mmu_init_mac
 *
 * The Macintosh mappings are less clear.
 *
 * Even as of this writing, it is unclear how the
 * Macintosh mappings will be done.  However, as
 * the first author of this code I'm proposing the
 * following model:
 *
 * Map the kernel (that's already done),
 * Map the I/O (on most machines that's the
 * 0x5000.0000 ... 0x5200.0000 range,
 * Map the video frame buffer using as few pages
 * as absolutely (this requirement mostly stems from
 * the fact that when the frame buffer is at
 * 0x0000.0000 then we know there is valid RAM just
 * above the screen that we don't want to waste!).
 *
 * By the way, if the frame buffer is at 0x0000.0000
 * then the Macintosh is known as an RBV based Mac.
 *
 * By the way 2, the code currently maps in a bunch of
 * regions.  But I'd like to cut that out.  (And move most
 * of the mappings up into the kernel proper ... or only
 * map what's necessary.)
 */

#ifdef CONFIG_MAC

L(mmu_init_mac):

	is_not_mac(L(mmu_init_not_mac))

	putc	'F'

	lea	%pc@(L(mac_videobase)),%a0
	lea	%pc@(L(console_video_virtual)),%a1
	movel	%a0@,%a1@

	is_not_040_or_060(1f)

	moveq	#_PAGE_NOCACHE_S,%d3
	jbra	2f
1:
	moveq	#_PAGE_NOCACHE030,%d3
2:
	/*
	 * Mac Note: screen address of logical 0xF000.0000 -> <screen physical>
	 *	     we simply map the 4MB that contains the videomem
	 */

	movel	#VIDEOMEMMASK,%d0
	andl	L(mac_videobase),%d0

	mmu_map		#VIDEOMEMBASE,%d0,#VIDEOMEMSIZE,%d3
	mmu_map_eq	#0x40800000,#0x02000000,%d3	/* rom ? */
	mmu_map_eq	#0x50000000,#0x02000000,%d3
	mmu_map_eq	#0x60000000,#0x00400000,%d3
	mmu_map_eq	#0x9c000000,#0x00400000,%d3
	mmu_map_tt	#1,#0xf8000000,#0x08000000,%d3

	jbra	L(mmu_init_done)

L(mmu_init_not_mac):
#endif

#ifdef CONFIG_SUN3X
	is_not_sun3x(L(notsun3x))

	/* oh, the pain..  We're gonna want the prom code after
	 * starting the MMU, so we copy the mappings, translating
	 * from 8k -> 4k pages as we go.
	 */

	/* copy maps from 0xfee00000 to 0xff000000 */
	movel	#0xfee00000, %d0
	moveq	#ROOT_INDEX_SHIFT, %d1
	lsrl	%d1,%d0
	mmu_get_root_table_entry	%d0

	movel	#0xfee00000, %d0
	moveq	#PTR_INDEX_SHIFT, %d1
	lsrl	%d1,%d0
	andl	#PTR_TABLE_SIZE-1, %d0
	mmu_get_ptr_table_entry		%a0,%d0

	movel	#0xfee00000, %d0
	moveq	#PAGE_INDEX_SHIFT, %d1
	lsrl	%d1,%d0
	andl	#PAGE_TABLE_SIZE-1, %d0
	mmu_get_page_table_entry	%a0,%d0

	/* this is where the prom page table lives */	
	movel	0xfefe00d4, %a1
	movel	%a1@, %a1

	movel	#((0x200000 >> 13)-1), %d1

1:
	movel	%a1@+, %d3
	movel	%d3,%a0@+
	addl	#0x1000,%d3
	movel	%d3,%a0@+
	
	dbra	%d1,1b	
		
	/* setup tt1 for I/O */
	mmu_map_tt	#1,#0x40000000,#0x40000000,#_PAGE_NOCACHE_S 
	jbra	L(mmu_init_done)

L(notsun3x):
#endif

#ifdef CONFIG_APOLLO
	is_not_apollo(L(notapollo))

	putc	'P'
	mmu_map         #0x80000000,#0,#0x02000000,#_PAGE_NOCACHE030
	
L(notapollo):	
	jbra	L(mmu_init_done)
#endif

L(mmu_init_done):

	putc	'G'
	leds	0x8

/*
 * mmu_fixup
 *
 * On the 040 class machines, all pages that are used for the
 * mmu have to be fixed up. According to Motorola, pages holding mmu
 * tables should be non-cacheable on a '040 and write-through on a
 * '060. But analysis of the reasons for this, and practical
 * experience, showed that write-through also works on a '040.
 *
 * Allocated memory so far goes from kernel_end to memory_start that
 * is used for all kind of tables, for that the cache attributes
 * are now fixed.
 */
L(mmu_fixup):

	is_not_040_or_060(L(mmu_fixup_done))

#ifdef MMU_NOCACHE_KERNEL
	jbra	L(mmu_fixup_done)
#endif

	/* first fix the page at the start of the kernel, that
         * contains also kernel_pg_dir.
	 */
	movel	%pc@(L(phys_kernel_start)),%d0
	subl	#PAGE_OFFSET,%d0
	lea	%pc@(SYMBOL_NAME(_stext)),%a0
	subl	%d0,%a0
	mmu_fixup_page_mmu_cache	%a0

	movel	%pc@(L(kernel_end)),%a0
	subl	%d0,%a0
	movel	%pc@(L(memory_start)),%a1
	subl	%d0,%a1
	bra	2f
1:
	mmu_fixup_page_mmu_cache	%a0
	addw	#PAGESIZE,%a0
2:
	cmpl	%a0,%a1
	jgt	1b

L(mmu_fixup_done):

#ifdef MMU_PRINT
	mmu_print
#endif

/*
 * mmu_engage
 *
 * This chunk of code performs the gruesome task of engaging the MMU.
 * The reason its gruesome is because when the MMU becomes engaged it
 * maps logical addresses to physical addresses.  The Program Counter
 * register is then passed through the MMU before the next instruction
 * is fetched (the instruction following the engage MMU instruction).
 * This may mean one of two things:
 * 1. The Program Counter falls within the logical address space of
 *    the kernel of which there are two sub-possibilities:
 *    A. The PC maps to the correct instruction (logical PC == physical
 *       code location), or
 *    B. The PC does not map through and the processor will read some
 *       data (or instruction) which is not the logically next instr.
 *    As you can imagine, A is good and B is bad.
 * Alternatively,
 * 2. The Program Counter does not map through the MMU.  The processor
 *    will take a Bus Error.
 * Clearly, 2 is bad.
 * It doesn't take a wiz kid to figure you want 1.A.
 * This code creates that possibility.
 * There are two possible 1.A. states (we now ignore the other above states):
 * A. The kernel is located at physical memory addressed the same as
 *    the logical memory for the kernel, i.e., 0x01000.
 * B. The kernel is located some where else.  e.g., 0x0400.0000
 *
 *    Under some conditions the Macintosh can look like A or B.
 * [A friend and I once noted that Apple hardware engineers should be
 * wacked twice each day: once when they show up at work (as in, Whack!,
 * "This is for the screwy hardware we know you're going to design today."),
 * and also at the end of the day (as in, Whack! "I don't know what
 * you designed today, but I'm sure it wasn't good."). -- rst]
 *
 * This code works on the following premise:
 * If the kernel start (%d5) is within the first 16 Meg of RAM,
 * then create a mapping for the kernel at logical 0x8000.0000 to
 * the physical location of the pc.  And, create a transparent
 * translation register for the first 16 Meg.  Then, after the MMU
 * is engaged, the PC can be moved up into the 0x8000.0000 range
 * and then the transparent translation can be turned off and then
 * the PC can jump to the correct logical location and it will be
 * home (finally).  This is essentially the code that the Amiga used
 * to use.  Now, it's generalized for all processors.  Which means
 * that a fresh (but temporary) mapping has to be created.  The mapping
 * is made in page 0 (an as of yet unused location -- except for the
 * stack!).  This temporary mapping will only require 1 pointer table
 * and a single page table (it can map 256K).
 *
 * OK, alternatively, imagine that the Program Counter is not within
 * the first 16 Meg.  Then, just use Transparent Translation registers
 * to do the right thing.
 *
 * Last, if _start is already at 0x01000, then there's nothing special
 * to do (in other words, in a degenerate case of the first case above,
 * do nothing).
 *
 * Let's do it.
 *
 *
 */

	putc	'H'

	mmu_engage

/*
 * After this point no new memory is allocated and
 * the start of available memory is stored in availmem.
 * (The bootmem allocator requires now the physicall address.)
 */

	movel	L(memory_start),availmem

#ifdef CONFIG_AMIGA
	is_not_amiga(1f)
	/* fixup the Amiga custom register location before printing */
	clrl	L(custom)
1:
#endif

#ifdef CONFIG_ATARI
	is_not_atari(1f)
	/* fixup the Atari iobase register location before printing */
	movel	#0xff000000,L(iobase)
1:
#endif

#ifdef CONFIG_MAC
	is_not_mac(1f)
	movel	#~VIDEOMEMMASK,%d0
	andl	L(mac_videobase),%d0
	addl	#VIDEOMEMBASE,%d0
	movel	%d0,L(mac_videobase)
1:
#endif

#ifdef CONFIG_HP300
	is_not_hp300(1f)
	/*
	 * Fix up the custom register to point to the new location of the LEDs.
	 */
	movel	#0xf0000000,L(custom)

	/*
	 * Energise the FPU and caches.
	 */
	movel	#0x60,0xf05f400c
1:
#endif

#ifdef CONFIG_SUN3X
	is_not_sun3x(1f)

	/* enable copro */
	oriw	#0x4000,0x61000000 
1:
#endif

#ifdef CONFIG_APOLLO
	is_not_apollo(1f)

        /*
	 * Fix up the iobase before printing
         */
        movel   #0x80000000,L(iobase)
1:
#endif
	
	putc	'I'
	leds	0x10

/*
 * Enable caches
 */

	is_not_040_or_060(L(cache_not_680460))

L(cache680460):
	.chip	68040
	nop
	cpusha	%bc
	nop

	is_060(L(cache68060))

	movel	#CC6_ENABLE_D+CC6_ENABLE_I,%d0
	/* MMU stuff works in copyback mode now, so enable the cache */
	movec	%d0,%cacr
	jra	L(cache_done)

L(cache68060):
	movel	#CC6_ENABLE_D+CC6_ENABLE_I+CC6_ENABLE_SB+CC6_PUSH_DPI+CC6_ENABLE_B+CC6_CLRA_B,%d0
	/* MMU stuff works in copyback mode now, so enable the cache */
	movec	%d0,%cacr
	/* enable superscalar dispatch in PCR */
	moveq	#1,%d0
	.chip	68060
	movec	%d0,%pcr

	jbra	L(cache_done)
L(cache_not_680460):
L(cache68030):
	.chip	68030
	movel	#CC3_ENABLE_DB+CC3_CLR_D+CC3_ENABLE_D+CC3_ENABLE_IB+CC3_CLR_I+CC3_ENABLE_I,%d0
	movec	%d0,%cacr

	jra	L(cache_done)
	.chip	68k
L(cache_done):

	putc	'J'

/*
 * Setup initial stack pointer
 */
	lea	SYMBOL_NAME(init_task_union),%curptr
	lea	0x2000(%curptr),%sp

	putc	'K'

	subl	%a6,%a6		/* clear a6 for gdb */

/*
 * The new 64bit printf support requires an early exception initialization.
 */
	jbsr	SYMBOL_NAME(base_trap_init)

/* jump to the kernel start */

	putc	'\n'
	leds	0x55

	jbsr	SYMBOL_NAME(start_kernel)

/*
 * Find a tag record in the bootinfo structure
 * The bootinfo structure is located right after the kernel bss
 * Returns: d0: size (-1 if not found)
 *          a0: data pointer (end-of-records if not found)
 */
func_start	get_bi_record,%d1

	movel	ARG1,%d0
	lea	%pc@(SYMBOL_NAME(_end)),%a0
1:	tstw	%a0@(BIR_TAG)
	jeq	3f
	cmpw	%a0@(BIR_TAG),%d0
	jeq	2f
	addw	%a0@(BIR_SIZE),%a0
	jra	1b
2:	moveq	#0,%d0
	movew	%a0@(BIR_SIZE),%d0
	lea	%a0@(BIR_DATA),%a0
	jra	4f
3:	moveq	#-1,%d0
	lea	%a0@(BIR_SIZE),%a0
4:
func_return	get_bi_record


/*
 *	MMU Initialization Begins Here
 *
 *	The structure of the MMU tables on the 68k machines
 *	is thus:
 *	Root Table
 *		Logical addresses are translated through
 *	a hierarchical translation mechanism where the high-order
 *	seven bits of the logical address (LA) are used as an
 *	index into the "root table."  Each entry in the root
 *	table has a bit which specifies if it's a valid pointer to a
 *	pointer table.  Each entry defines a 32KMeg range of memory.
 *	If an entry is invalid then that logical range of 32M is
 *	invalid and references to that range of memory (when the MMU
 *	is enabled) will fault.  If the entry is valid, then it does
 *	one of two things.  On 040/060 class machines, it points to
 *	a pointer table which then describes more finely the memory
 *	within that 32M range.  On 020/030 class machines, a technique
 *	called "early terminating descriptors" are used.  This technique
 *	allows an entire 32Meg to be described by a single entry in the
 *	root table.  Thus, this entry in the root table, contains the
 *	physical address of the memory or I/O at the logical address
 *	which the entry represents and it also contains the necessary
 *	cache bits for this region.
 *
 *	Pointer Tables
 *		Per the Root Table, there will be one or more
 *	pointer tables.  Each pointer table defines a 32M range.
 *	Not all of the 32M range need be defined.  Again, the next
 *	seven bits of the logical address are used an index into
 *	the pointer table to point to page tables (if the pointer
 *	is valid).  There will undoubtedly be more than one
 *	pointer table for the kernel because each pointer table
 *	defines a range of only 32M.  Valid pointer table entries
 *	point to page tables, or are early terminating entries
 *	themselves.
 *
 *	Page Tables
 *		Per the Pointer Tables, each page table entry points
 *	to the physical page in memory that supports the logical
 *	address that translates to the particular index.
 *
 *	In short, the Logical Address gets translated as follows:
 *		bits 31..26 - index into the Root Table
 *		bits 25..18 - index into the Pointer Table
 *		bits 17..12 - index into the Page Table
 *		bits 11..0  - offset into a particular 4K page
 *
 *	The algorithms which follows do one thing: they abstract
 *	the MMU hardware.  For example, there are three kinds of
 *	cache settings that are relevant.  Either, memory is
 *	being mapped in which case it is either Kernel Code (or
 *	the RamDisk) or it is MMU data.  On the 030, the MMU data
 *	option also describes the kernel.  Or, I/O is being mapped
 *	in which case it has its own kind of cache bits.  There
 *	are constants which abstract these notions from the code that
 *	actually makes the call to map some range of memory.
 *
 *
 *
 */

#ifdef MMU_PRINT
/*
 *	mmu_print
 *
 *	This algorithm will print out the current MMU mappings.
 *
 *	Input:
 *		%a5 points to the root table.  Everything else is calculated
 *			from this.
 */

#define mmu_next_valid		0
#define mmu_start_logical	4
#define mmu_next_logical	8
#define mmu_start_physical	12
#define mmu_next_physical	16

#define MMU_PRINT_INVALID		-1
#define MMU_PRINT_VALID			1
#define MMU_PRINT_UNINITED		0

#define putZc(z,n)		jbne 1f; putc z; jbra 2f; 1: putc n; 2:

func_start	mmu_print,%a0-%a6/%d0-%d7

	movel	%pc@(L(kernel_pgdir_ptr)),%a5
	lea	%pc@(L(mmu_print_data)),%a0
	movel	#MMU_PRINT_UNINITED,%a0@(mmu_next_valid)

	is_not_040_or_060(mmu_030_print)

mmu_040_print:
	puts	"\nMMU040\n"
	puts	"rp:"
	putn	%a5
	putc	'\n'
#if 0
	/*
	 * The following #if/#endif block is a tight algorithm for dumping the 040
	 * MMU Map in gory detail.  It really isn't that practical unless the
	 * MMU Map algorithm appears to go awry and you need to debug it at the
	 * entry per entry level.
	 */
	movel	#ROOT_TABLE_SIZE,%d5
#if 0
	movel	%a5@+,%d7		| Burn an entry to skip the kernel mappings,
	subql	#1,%d5			| they (might) work
#endif
1:	tstl	%d5
	jbeq	mmu_print_done
	subq	#1,%d5
	movel	%a5@+,%d7
	btst	#1,%d7
	jbeq	1b

2:	putn	%d7
	andil	#0xFFFFFE00,%d7
	movel	%d7,%a4
	movel	#PTR_TABLE_SIZE,%d4
	putc	' '
3:	tstl	%d4
	jbeq	11f
	subq	#1,%d4
	movel	%a4@+,%d7
	btst	#1,%d7
	jbeq	3b

4:	putn	%d7
	andil	#0xFFFFFF00,%d7
	movel	%d7,%a3
	movel	#PAGE_TABLE_SIZE,%d3
5:	movel	#8,%d2
6:	tstl	%d3
	jbeq	31f
	subq	#1,%d3
	movel	%a3@+,%d6
	btst	#0,%d6
	jbeq	6b
7:	tstl	%d2
	jbeq	8f
	subq	#1,%d2
	putc	' '
	jbra	91f
8:	putc	'\n'
	movel	#8+1+8+1+1,%d2
9:	putc	' '
	dbra	%d2,9b
	movel	#7,%d2
91:	putn	%d6
	jbra	6b

31:	putc	'\n'
	movel	#8+1,%d2
32:	putc	' '
	dbra	%d2,32b
	jbra	3b

11:	putc	'\n'
	jbra	1b
#endif /* MMU 040 Dumping code that's gory and detailed */

	lea	%pc@(SYMBOL_NAME(kernel_pg_dir)),%a5
	movel	%a5,%a0			/* a0 has the address of the root table ptr */
	movel	#0x00000000,%a4		/* logical address */
	moveql	#0,%d0
40:
	/* Increment the logical address and preserve in d5 */
	movel	%a4,%d5
	addil	#PAGESIZE<<13,%d5
	movel	%a0@+,%d6
	btst	#1,%d6
	jbne	41f
	jbsr	mmu_print_tuple_invalidate
	jbra	48f
41:
	movel	#0,%d1
	andil	#0xfffffe00,%d6
	movel	%d6,%a1
42:
	movel	%a4,%d5
	addil	#PAGESIZE<<6,%d5
	movel	%a1@+,%d6
	btst	#1,%d6
	jbne	43f
	jbsr	mmu_print_tuple_invalidate
	jbra	47f
43:
	movel	#0,%d2
	andil	#0xffffff00,%d6
	movel	%d6,%a2
44:
	movel	%a4,%d5
	addil	#PAGESIZE,%d5
	movel	%a2@+,%d6
	btst	#0,%d6
	jbne	45f
	jbsr	mmu_print_tuple_invalidate
	jbra	46f
45:
	moveml	%d0-%d1,%sp@-
	movel	%a4,%d0
	movel	%d6,%d1
	andil	#0xfffff4e0,%d1
	lea	%pc@(mmu_040_print_flags),%a6
	jbsr	mmu_print_tuple
	moveml	%sp@+,%d0-%d1
46:
	movel	%d5,%a4
	addq	#1,%d2
	cmpib	#64,%d2
	jbne	44b
47:
	movel	%d5,%a4
	addq	#1,%d1
	cmpib	#128,%d1
	jbne	42b
48:
	movel	%d5,%a4			/* move to the next logical address */
	addq	#1,%d0
	cmpib	#128,%d0
	jbne	40b

	.chip	68040
	movec	%dtt1,%d0
	movel	%d0,%d1
	andiw	#0x8000,%d1		/* is it valid ? */
	jbeq	1f			/* No, bail out */

	movel	%d0,%d1
	andil	#0xff000000,%d1		/* Get the address */
	putn	%d1
	puts	"=="
	putn	%d1

	movel	%d0,%d6
	jbsr	mmu_040_print_flags_tt
1:
	movec	%dtt0,%d0
	movel	%d0,%d1
	andiw	#0x8000,%d1		/* is it valid ? */
	jbeq	1f			/* No, bail out */

	movel	%d0,%d1
	andil	#0xff000000,%d1		/* Get the address */
	putn	%d1
	puts	"=="
	putn	%d1

	movel	%d0,%d6
	jbsr	mmu_040_print_flags_tt
1:
	.chip	68k

	jbra	mmu_print_done

mmu_040_print_flags:
	btstl	#10,%d6
	putZc(' ','G')	/* global bit */
	btstl	#7,%d6
	putZc(' ','S')	/* supervisor bit */
mmu_040_print_flags_tt:
	btstl	#6,%d6
	jbne	3f
	putc	'C'
	btstl	#5,%d6
	putZc('w','c')	/* write through or copy-back */
	jbra	4f
3:
	putc	'N'
	btstl	#5,%d6
	putZc('s',' ')	/* serialized non-cacheable, or non-cacheable */
4:
	rts

mmu_030_print_flags:
	btstl	#6,%d6
	putZc('C','I')	/* write through or copy-back */
	rts

mmu_030_print:
	puts	"\nMMU030\n"
	puts	"\nrp:"
	putn	%a5
	putc	'\n'
	movel	%a5,%d0
	andil	#0xfffffff0,%d0
	movel	%d0,%a0
	movel	#0x00000000,%a4		/* logical address */
	movel	#0,%d0
30:
	movel	%a4,%d5
	addil	#PAGESIZE<<13,%d5
	movel	%a0@+,%d6
	btst	#1,%d6			/* is it a ptr? */
	jbne	31f			/* yes */
	btst	#0,%d6			/* is it early terminating? */
	jbeq	1f			/* no */
	jbsr	mmu_030_print_helper
	jbra	38f
1:
	jbsr	mmu_print_tuple_invalidate
	jbra	38f
31:
	movel	#0,%d1
	andil	#0xfffffff0,%d6
	movel	%d6,%a1
32:
	movel	%a4,%d5
	addil	#PAGESIZE<<6,%d5
	movel	%a1@+,%d6
	btst	#1,%d6
	jbne	33f
	btst	#0,%d6
	jbeq	1f			/* no */
	jbsr	mmu_030_print_helper
	jbra	37f
1:
	jbsr	mmu_print_tuple_invalidate
	jbra	37f
33:
	movel	#0,%d2
	andil	#0xfffffff0,%d6
	movel	%d6,%a2
34:
	movel	%a4,%d5
	addil	#PAGESIZE,%d5
	movel	%a2@+,%d6
	btst	#0,%d6
	jbne	35f
	jbsr	mmu_print_tuple_invalidate
	jbra	36f
35:
	jbsr	mmu_030_print_helper
36:
	movel	%d5,%a4
	addq	#1,%d2
	cmpib	#64,%d2
	jbne	34b
37:
	movel	%d5,%a4
	addq	#1,%d1
	cmpib	#128,%d1
	jbne	32b
38:
	movel	%d5,%a4			/* move to the next logical address */
	addq	#1,%d0
	cmpib	#128,%d0
	jbne	30b

mmu_print_done:
	puts	"\n\n"

func_return	mmu_print


mmu_030_print_helper:
	moveml	%d0-%d1,%sp@-
	movel	%a4,%d0
	movel	%d6,%d1
	lea	%pc@(mmu_030_print_flags),%a6
	jbsr	mmu_print_tuple
	moveml	%sp@+,%d0-%d1
	rts

mmu_print_tuple_invalidate:
	moveml	%a0/%d7,%sp@-

	lea	%pc@(L(mmu_print_data)),%a0
	tstl	%a0@(mmu_next_valid)
	jbmi	mmu_print_tuple_invalidate_exit

	movel	#MMU_PRINT_INVALID,%a0@(mmu_next_valid)

	putn	%a4

	puts	"##\n"

mmu_print_tuple_invalidate_exit:
	moveml	%sp@+,%a0/%d7
	rts


mmu_print_tuple:
	moveml	%d0-%d7/%a0,%sp@-

	lea	%pc@(L(mmu_print_data)),%a0

	tstl	%a0@(mmu_next_valid)
	jble	mmu_print_tuple_print

	cmpl	%a0@(mmu_next_physical),%d1
	jbeq	mmu_print_tuple_increment

mmu_print_tuple_print:
	putn	%d0
	puts	"->"
	putn	%d1

	movel	%d1,%d6
	jbsr	%a6@

mmu_print_tuple_record:
	movel	#MMU_PRINT_VALID,%a0@(mmu_next_valid)

	movel	%d1,%a0@(mmu_next_physical)

mmu_print_tuple_increment:
	movel	%d5,%d7
	subl	%a4,%d7
	addl	%d7,%a0@(mmu_next_physical)

mmu_print_tuple_exit:
	moveml	%sp@+,%d0-%d7/%a0
	rts

mmu_print_machine_cpu_types:
	puts	"machine: "

	is_not_amiga(1f)
	puts	"amiga"
	jbra	9f
1:
	is_not_atari(2f)
	puts	"atari"
	jbra	9f
2:
	is_not_mac(3f)
	puts	"macintosh"
	jbra	9f
3:	puts	"unknown"
9:	putc	'\n'

	puts	"cputype: 0"
	is_not_060(1f)
	putc	'6'
	jbra	9f
1:
	is_not_040_or_060(2f)
	putc	'4'
	jbra	9f
2:	putc	'3'
9:	putc	'0'
	putc	'\n'

	rts
#endif /* MMU_PRINT */

/*
 * mmu_map_tt
 *
 * This is a specific function which works on all 680x0 machines.
 * On 030, 040 & 060 it will attempt to use Transparent Translation
 * registers (tt1).
 * On 020 it will call the standard mmu_map which will use early
 * terminating descriptors.
 */
func_start	mmu_map_tt,%d0/%d1/%a0,4

	dputs	"mmu_map_tt:"
	dputn	ARG1
	dputn	ARG2
	dputn	ARG3
	dputn	ARG4
	dputc	'\n'

	is_020(L(do_map))

	/* Extract the highest bit set
	 */
	bfffo	ARG3{#0,#32},%d1
	cmpw	#8,%d1
	jcc	L(do_map)

	/* And get the mask
	 */
	moveq	#-1,%d0
	lsrl	%d1,%d0
	lsrl	#1,%d0

	/* Mask the address
	 */
	movel	%d0,%d1
	notl	%d1
	andl	ARG2,%d1

	/* Generate the upper 16bit of the tt register
	 */
	lsrl	#8,%d0
	orl	%d0,%d1
	clrw	%d1

	is_040_or_060(L(mmu_map_tt_040))

	/* set 030 specific bits (read/write access for supervisor mode
	 * (highest function code set, lower two bits masked))
	 */
	orw	#TTR_ENABLE+TTR_RWM+TTR_FCB2+TTR_FCM1+TTR_FCM0,%d1
	movel	ARG4,%d0
	btst	#6,%d0
	jeq	1f
	orw	#TTR_CI,%d1

1:	lea	STACK,%a0
	dputn	%d1
	movel	%d1,%a0@
	.chip	68030
	tstl	ARG1
	jne	1f
	pmove	%a0@,%tt0
	jra	2f
1:	pmove	%a0@,%tt1
2:	.chip	68k
	jra	L(mmu_map_tt_done)

	/* set 040 specific bits
	 */
L(mmu_map_tt_040):
	orw	#TTR_ENABLE+TTR_KERNELMODE,%d1
	orl	ARG4,%d1
	dputn	%d1

	.chip	68040
	tstl	ARG1
	jne	1f
	movec	%d1,%itt0
	movec	%d1,%dtt0
	jra	2f
1:	movec	%d1,%itt1
	movec	%d1,%dtt1
2:	.chip	68k

	jra	L(mmu_map_tt_done)

L(do_map):
	mmu_map_eq	ARG2,ARG3,ARG4

L(mmu_map_tt_done):

func_return	mmu_map_tt

/*
 *	mmu_map
 *
 *	This routine will map a range of memory using a pointer
 *	table and allocating the pages on the fly from the kernel.
 *	The pointer table does not have to be already linked into
 *	the root table, this routine will do that if necessary.
 *
 *	NOTE
 *	This routine will assert failure and use the serial_putc
 *	routines in the case of a run-time error.  For example,
 *	if the address is already mapped.
 *
 *	NOTE-2
 *	This routine will use early terminating descriptors
 *	where possible for the 68020+68851 and 68030 type
 *	processors.
 */
func_start	mmu_map,%d0-%d4/%a0-%a4

	dputs	"\nmmu_map:"
	dputn	ARG1
	dputn	ARG2
	dputn	ARG3
	dputn	ARG4
	dputc	'\n'

	/* Get logical address and round it down to 256KB
	 */
	movel	ARG1,%d0
	andl	#-(PAGESIZE*PAGE_TABLE_SIZE),%d0
	movel	%d0,%a3

	/* Get the end address
	 */
	movel	ARG1,%a4
	addl	ARG3,%a4
	subql	#1,%a4

	/* Get physical address and round it down to 256KB
	 */
	movel	ARG2,%d0
	andl	#-(PAGESIZE*PAGE_TABLE_SIZE),%d0
	movel	%d0,%a2

	/* Add page attributes to the physical address
	 */
	movel	ARG4,%d0
	orw	#_PAGE_PRESENT+_PAGE_ACCESSED+_PAGE_DIRTY,%d0
	addw	%d0,%a2

	dputn	%a2
	dputn	%a3
	dputn	%a4

	is_not_040_or_060(L(mmu_map_030))

	addw	#_PAGE_GLOBAL040,%a2
/*
 *	MMU 040 & 060 Support
 *
 *	The MMU usage for the 040 and 060 is different enough from
 *	the 030 and 68851 that there is separate code.  This comment
 *	block describes the data structures and algorithms built by
 *	this code.
 *
 *	The 040 does not support early terminating descriptors, as
 *	the 030 does.  Therefore, a third level of table is needed
 *	for the 040, and that would be the page table.  In Linux,
 *	page tables are allocated directly from the memory above the
 *	kernel.
 *
 */

L(mmu_map_040):
	/* Calculate the offset into the root table
	 */
	movel	%a3,%d0
	moveq	#ROOT_INDEX_SHIFT,%d1
	lsrl	%d1,%d0
	mmu_get_root_table_entry	%d0

	/* Calculate the offset into the pointer table
	 */
	movel	%a3,%d0
	moveq	#PTR_INDEX_SHIFT,%d1
	lsrl	%d1,%d0
	andl	#PTR_TABLE_SIZE-1,%d0
	mmu_get_ptr_table_entry		%a0,%d0

	/* Calculate the offset into the page table
	 */
	movel	%a3,%d0
	moveq	#PAGE_INDEX_SHIFT,%d1
	lsrl	%d1,%d0
	andl	#PAGE_TABLE_SIZE-1,%d0
	mmu_get_page_table_entry	%a0,%d0

	/* The page table entry must not no be busy
	 */
	tstl	%a0@
	jne	L(mmu_map_error)

	/* Do the mapping and advance the pointers
	 */
	movel	%a2,%a0@
2:
	addw	#PAGESIZE,%a2
	addw	#PAGESIZE,%a3

	/* Ready with mapping?
	 */
	lea	%a3@(-1),%a0
	cmpl	%a0,%a4
	jhi	L(mmu_map_040)
	jra	L(mmu_map_done)

L(mmu_map_030):
	/* Calculate the offset into the root table
	 */
	movel	%a3,%d0
	moveq	#ROOT_INDEX_SHIFT,%d1
	lsrl	%d1,%d0
	mmu_get_root_table_entry	%d0

	/* Check if logical address 32MB aligned,
	 * so we can try to map it once
	 */
	movel	%a3,%d0
	andl	#(PTR_TABLE_SIZE*PAGE_TABLE_SIZE*PAGESIZE-1)&(-ROOT_TABLE_SIZE),%d0
	jne	1f

	/* Is there enough to map for 32MB at once
	 */
	lea	%a3@(PTR_TABLE_SIZE*PAGE_TABLE_SIZE*PAGESIZE-1),%a1
	cmpl	%a1,%a4
	jcs	1f

	addql	#1,%a1

	/* The root table entry must not no be busy
	 */
	tstl	%a0@
	jne	L(mmu_map_error)

	/* Do the mapping and advance the pointers
	 */
	dputs	"early term1"
	dputn	%a2
	dputn	%a3
	dputn	%a1
	dputc	'\n'
	movel	%a2,%a0@

	movel	%a1,%a3
	lea	%a2@(PTR_TABLE_SIZE*PAGE_TABLE_SIZE*PAGESIZE),%a2
	jra	L(mmu_mapnext_030)
1:
	/* Calculate the offset into the pointer table
	 */
	movel	%a3,%d0
	moveq	#PTR_INDEX_SHIFT,%d1
	lsrl	%d1,%d0
	andl	#PTR_TABLE_SIZE-1,%d0
	mmu_get_ptr_table_entry		%a0,%d0

	/* The pointer table entry must not no be busy
	 */
	tstl	%a0@
	jne	L(mmu_map_error)

	/* Do the mapping and advance the pointers
	 */
	dputs	"early term2"
	dputn	%a2
	dputn	%a3
	dputc	'\n'
	movel	%a2,%a0@

	addl	#PAGE_TABLE_SIZE*PAGESIZE,%a2
	addl	#PAGE_TABLE_SIZE*PAGESIZE,%a3

L(mmu_mapnext_030):
	/* Ready with mapping?
	 */
	lea	%a3@(-1),%a0
	cmpl	%a0,%a4
	jhi	L(mmu_map_030)
	jra	L(mmu_map_done)

L(mmu_map_error):

	dputs	"mmu_map error:"
	dputn	%a2
	dputn	%a3
	dputc	'\n'

L(mmu_map_done):

func_return	mmu_map

/*
 *	mmu_fixup
 *
 *	On the 040 class machines, all pages that are used for the
 *	mmu have to be fixed up.
 */

func_start	mmu_fixup_page_mmu_cache,%d0/%a0

	dputs	"mmu_fixup_page_mmu_cache"
	dputn	ARG1

	/* Calculate the offset into the root table
	 */
	movel	ARG1,%d0
	moveq	#ROOT_INDEX_SHIFT,%d1
	lsrl	%d1,%d0
	mmu_get_root_table_entry	%d0

	/* Calculate the offset into the pointer table
	 */
	movel	ARG1,%d0
	moveq	#PTR_INDEX_SHIFT,%d1
	lsrl	%d1,%d0
	andl	#PTR_TABLE_SIZE-1,%d0
	mmu_get_ptr_table_entry		%a0,%d0

	/* Calculate the offset into the page table
	 */
	movel	ARG1,%d0
	moveq	#PAGE_INDEX_SHIFT,%d1
	lsrl	%d1,%d0
	andl	#PAGE_TABLE_SIZE-1,%d0
	mmu_get_page_table_entry	%a0,%d0

	movel	%a0@,%d0
	andil	#_CACHEMASK040,%d0
	orl	%pc@(SYMBOL_NAME(m68k_pgtable_cachemode)),%d0
	movel	%d0,%a0@

	dputc	'\n'

func_return	mmu_fixup_page_mmu_cache

/*
 *	mmu_temp_map
 *
 *	create a temporary mapping to enable the mmu,
 *	this we don't need any transparation translation tricks.
 */

func_start	mmu_temp_map,%d0/%d1/%a0/%a1

	dputs	"mmu_temp_map"
	dputn	ARG1
	dputn	ARG2
	dputc	'\n'

	lea	%pc@(L(temp_mmap_mem)),%a1

	/* Calculate the offset in the root table
	 */
	movel	ARG2,%d0
	moveq	#ROOT_INDEX_SHIFT,%d1
	lsrl	%d1,%d0
	mmu_get_root_table_entry	%d0

	/* Check if the table is temporary allocated, so we have to reuse it
	 */
	movel	%a0@,%d0
	cmpl	%pc@(L(memory_start)),%d0
	jcc	1f

	/* Temporary allocate a ptr table and insert it into the root table
	 */
	movel	%a1@,%d0
	addl	#PTR_TABLE_SIZE*4,%a1@
	orw	#_PAGE_TABLE+_PAGE_ACCESSED,%d0
	movel	%d0,%a0@
	dputs	" (new)"
1:
	dputn	%d0
	/* Mask the root table entry for the ptr table
	 */
	andw	#-ROOT_TABLE_SIZE,%d0
	movel	%d0,%a0

	/* Calculate the offset into the pointer table
	 */
	movel	ARG2,%d0
	moveq	#PTR_INDEX_SHIFT,%d1
	lsrl	%d1,%d0
	andl	#PTR_TABLE_SIZE-1,%d0
	lea	%a0@(%d0*4),%a0
	dputn	%a0

	/* Check if a temporary page table is already allocated
	 */
	movel	%a0@,%d0
	jne	1f

	/* Temporary allocate a page table and insert it into the ptr table
	 */
	movel	%a1@,%d0
	/* The 512 should be PAGE_TABLE_SIZE*4, but that violates the
	   alignment restriction for pointer tables on the '0[46]0.  */
	addl	#512,%a1@
	orw	#_PAGE_TABLE+_PAGE_ACCESSED,%d0
	movel	%d0,%a0@
	dputs	" (new)"
1:
	dputn	%d0
	/* Mask the ptr table entry for the page table
	 */
	andw	#-PTR_TABLE_SIZE,%d0
	movel	%d0,%a0

	/* Calculate the offset into the page table
	 */
	movel	ARG2,%d0
	moveq	#PAGE_INDEX_SHIFT,%d1
	lsrl	%d1,%d0
	andl	#PAGE_TABLE_SIZE-1,%d0
	lea	%a0@(%d0*4),%a0
	dputn	%a0

	/* Insert the address into the page table
	 */
	movel	ARG1,%d0
	andw	#-PAGESIZE,%d0
	orw	#_PAGE_PRESENT+_PAGE_ACCESSED+_PAGE_DIRTY,%d0
	movel	%d0,%a0@
	dputn	%d0

	dputc	'\n'

func_return	mmu_temp_map

func_start	mmu_engage,%d0-%d2/%a0-%a3

	moveq	#ROOT_TABLE_SIZE-1,%d0
	/* Temporarily use a different root table.  */
	lea	%pc@(L(kernel_pgdir_ptr)),%a0
	movel	%a0@,%a2
	movel	%pc@(L(memory_start)),%a1
	movel	%a1,%a0@
	movel	%a2,%a0
1:
	movel	%a0@+,%a1@+
	dbra	%d0,1b

	lea	%pc@(L(temp_mmap_mem)),%a0
	movel	%a1,%a0@

	movew	#PAGESIZE-1,%d0
1:
	clrl	%a1@+
	dbra	%d0,1b

	lea	%pc@(1b),%a0
	movel	#1b,%a1
	/* Skip temp mappings if phys == virt */
	cmpl	%a0,%a1
	jeq	1f

	mmu_temp_map	%a0,%a0
	mmu_temp_map	%a0,%a1

	addw	#PAGESIZE,%a0
	addw	#PAGESIZE,%a1
	mmu_temp_map	%a0,%a0
	mmu_temp_map	%a0,%a1
1:
	movel	%pc@(L(memory_start)),%a3
	movel	%pc@(L(phys_kernel_start)),%d2

	is_not_040_or_060(L(mmu_engage_030))

L(mmu_engage_040):
	.chip	68040
	nop
	cinva	%bc
	nop
	pflusha
	nop
	movec	%a3,%srp
	movel	#TC_ENABLE+TC_PAGE4K,%d0
	movec	%d0,%tc		/* enable the MMU */
	jmp	1f:l
1:	nop
	movec	%a2,%srp
	nop
	cinva	%bc
	nop
	pflusha
	.chip	68k
	jra	L(mmu_engage_cleanup)

L(mmu_engage_030_temp):
	.space	12
L(mmu_engage_030):
	.chip	68030
	lea	%pc@(L(mmu_engage_030_temp)),%a0
	movel	#0x80000002,%a0@
	movel	%a3,%a0@(4)
	movel	#0x0808,%d0
	movec	%d0,%cacr
	pmove	%a0@,%srp
	pflusha
	/*
	 * enable,super root enable,4096 byte pages,7 bit root index,
	 * 7 bit pointer index, 6 bit page table index.
	 */
	movel	#0x82c07760,%a0@(8)
	pmove	%a0@(8),%tc	/* enable the MMU */
	jmp	1f:l
1:	movel	%a2,%a0@(4)
	movel	#0x0808,%d0
	movec	%d0,%cacr
	pmove	%a0@,%srp
	pflusha
	.chip	68k

L(mmu_engage_cleanup):
	subl	#PAGE_OFFSET,%d2
	subl	%d2,%a2
	movel	%a2,L(kernel_pgdir_ptr)
	subl	%d2,%fp
	subl	%d2,%sp
	subl	%d2,ARG0

func_return	mmu_engage

func_start	mmu_get_root_table_entry,%d0/%a1

#if 0
	dputs	"mmu_get_root_table_entry:"
	dputn	ARG1
	dputs	" ="
#endif

	movel	%pc@(L(kernel_pgdir_ptr)),%a0
	tstl	%a0
	jne	2f

	dputs	"\nmmu_init:"

	/* Find the start of free memory, get_bi_record does this for us,
	 * as the bootinfo structure is located directly behind the kernel
	 * and and we simply search for the last entry.
	 */
	get_bi_record	BI_LAST
	addw	#PAGESIZE-1,%a0
	movel	%a0,%d0
	andw	#-PAGESIZE,%d0

	dputn	%d0

	lea	%pc@(L(memory_start)),%a0
	movel	%d0,%a0@
	lea	%pc@(L(kernel_end)),%a0
	movel	%d0,%a0@

	/* we have to return the first page at _stext since the init code
	 * in mm/init.c simply expects kernel_pg_dir there, the rest of
	 * page is used for further ptr tables in get_ptr_table.
	 */
	lea	%pc@(SYMBOL_NAME(_stext)),%a0
	lea	%pc@(L(mmu_cached_pointer_tables)),%a1
	movel	%a0,%a1@
	addl	#ROOT_TABLE_SIZE*4,%a1@

	lea	%pc@(L(mmu_num_pointer_tables)),%a1
	addql	#1,%a1@

	/* clear the page
	 */
	movel	%a0,%a1
	movew	#PAGESIZE/4-1,%d0
1:
	clrl	%a1@+
	dbra	%d0,1b

	lea	%pc@(L(kernel_pgdir_ptr)),%a1
	movel	%a0,%a1@

	dputn	%a0
	dputc	'\n'
2:
	movel	ARG1,%d0
	lea	%a0@(%d0*4),%a0

#if 0
	dputn	%a0
	dputc	'\n'
#endif

func_return	mmu_get_root_table_entry



func_start	mmu_get_ptr_table_entry,%d0/%a1

#if 0
	dputs	"mmu_get_ptr_table_entry:"
	dputn	ARG1
	dputn	ARG2
	dputs	" ="
#endif

	movel	ARG1,%a0
	movel	%a0@,%d0
	jne	2f

	/* Keep track of the number of pointer tables we use
	 */
	dputs	"\nmmu_get_new_ptr_table:"
	lea	%pc@(L(mmu_num_pointer_tables)),%a0
	movel	%a0@,%d0
	addql	#1,%a0@

	/* See if there is a free pointer table in our cache of pointer tables
	 */
	lea	%pc@(L(mmu_cached_pointer_tables)),%a1
	andw	#7,%d0
	jne	1f

	/* Get a new pointer table page from above the kernel memory
	 */
	get_new_page
	movel	%a0,%a1@
1:
	/* There is an unused pointer table in our cache... use it
	 */
	movel	%a1@,%d0
	addl	#PTR_TABLE_SIZE*4,%a1@

	dputn	%d0
	dputc	'\n'

	/* Insert the new pointer table into the root table
	 */
	movel	ARG1,%a0
	orw	#_PAGE_TABLE+_PAGE_ACCESSED,%d0
	movel	%d0,%a0@
2:
	/* Extract the pointer table entry
	 */
	andw	#-PTR_TABLE_SIZE,%d0
	movel	%d0,%a0
	movel	ARG2,%d0
	lea	%a0@(%d0*4),%a0

#if 0
	dputn	%a0
	dputc	'\n'
#endif

func_return	mmu_get_ptr_table_entry


func_start	mmu_get_page_table_entry,%d0/%a1

#if 0
	dputs	"mmu_get_page_table_entry:"
	dputn	ARG1
	dputn	ARG2
	dputs	" ="
#endif

	movel	ARG1,%a0
	movel	%a0@,%d0
	jne	2f

	/* If the page table entry doesn't exist, we allocate a complete new
	 * page and use it as one continues big page table which can cover
	 * 4MB of memory, nearly almost all mappings have that alignment.
	 */
	get_new_page
	addw	#_PAGE_TABLE+_PAGE_ACCESSED,%a0

	/* align pointer table entry for a page of page tables
	 */
	movel	ARG1,%d0
	andw	#-(PAGESIZE/PAGE_TABLE_SIZE),%d0
	movel	%d0,%a1

	/* Insert the page tables into the pointer entries
	 */
	moveq	#PAGESIZE/PAGE_TABLE_SIZE/4-1,%d0
1:
	movel	%a0,%a1@+
	lea	%a0@(PAGE_TABLE_SIZE*4),%a0
	dbra	%d0,1b

	/* Now we can get the initialized pointer table entry
	 */
	movel	ARG1,%a0
	movel	%a0@,%d0
2:
	/* Extract the page table entry
	 */
	andw	#-PAGE_TABLE_SIZE,%d0
	movel	%d0,%a0
	movel	ARG2,%d0
	lea	%a0@(%d0*4),%a0

#if 0
	dputn	%a0
	dputc	'\n'
#endif

func_return	mmu_get_page_table_entry

/*
 *	get_new_page
 *
 *	Return a new page from the memory start and clear it.
 */
func_start	get_new_page,%d0/%a1

	dputs	"\nget_new_page:"

	/* allocate the page and adjust memory_start
	 */
	lea	%pc@(L(memory_start)),%a0
	movel	%a0@,%a1
	addl	#PAGESIZE,%a0@

	/* clear the new page
	 */
	movel	%a1,%a0
	movew	#PAGESIZE/4-1,%d0
1:
	clrl	%a1@+
	dbra	%d0,1b

	dputn	%a0
	dputc	'\n'

func_return	get_new_page



/*
 * Debug output support
 * Atarians have a choice between the parallel port, the serial port
 * from the MFP or a serial port of the SCC
 */

#ifdef CONFIG_MAC

L(scc_initable_mac):
	.byte	9,12		/* Reset */
	.byte	4,0x44		/* x16, 1 stopbit, no parity */
	.byte	3,0xc0		/* receiver: 8 bpc */
	.byte	5,0xe2		/* transmitter: 8 bpc, assert dtr/rts */
	.byte	9,0		/* no interrupts */
	.byte	10,0		/* NRZ */
	.byte	11,0x50		/* use baud rate generator */
	.byte	12,10,13,0	/* 9600 baud */
	.byte	14,1		/* Baud rate generator enable */
	.byte	3,0xc1		/* enable receiver */
	.byte	5,0xea		/* enable transmitter */
	.byte	-1
	.even
#endif

#ifdef CONFIG_ATARI
/* #define USE_PRINTER */
/* #define USE_SCC_B */
/* #define USE_SCC_A */
#define USE_MFP

#if defined(USE_SCC_A) || defined(USE_SCC_B)
#define USE_SCC
/* Initialisation table for SCC */
L(scc_initable):
	.byte	9,12		/* Reset */
	.byte	4,0x44		/* x16, 1 stopbit, no parity */
	.byte	3,0xc0		/* receiver: 8 bpc */
	.byte	5,0xe2		/* transmitter: 8 bpc, assert dtr/rts */
	.byte	9,0		/* no interrupts */
	.byte	10,0		/* NRZ */
	.byte	11,0x50		/* use baud rate generator */
	.byte	12,24,13,0	/* 9600 baud */
	.byte	14,2,14,3	/* use master clock for BRG, enable */
	.byte	3,0xc1		/* enable receiver */
	.byte	5,0xea		/* enable transmitter */
	.byte	-1
	.even
#endif

#ifdef USE_PRINTER

LPSG_SELECT	= 0xff8800
LPSG_READ	= 0xff8800
LPSG_WRITE	= 0xff8802
LPSG_IO_A	= 14
LPSG_IO_B	= 15
LPSG_CONTROL	= 7
LSTMFP_GPIP	= 0xfffa01
LSTMFP_DDR	= 0xfffa05
LSTMFP_IERB	= 0xfffa09

#elif defined(USE_SCC_B)

LSCC_CTRL	= 0xff8c85
LSCC_DATA	= 0xff8c87

#elif defined(USE_SCC_A)

LSCC_CTRL	= 0xff8c81
LSCC_DATA	= 0xff8c83

/* Initialisation table for SCC */
L(scc_initable):
	.byte	9,12		/* Reset */
	.byte	4,0x44		/* x16, 1 stopbit, no parity */
	.byte	3,0xc0		/* receiver: 8 bpc */
	.byte	5,0xe2		/* transmitter: 8 bpc, assert dtr/rts */
	.byte	9,0		/* no interrupts */
	.byte	10,0		/* NRZ */
	.byte	11,0x50		/* use baud rate generator */
	.byte	12,24,13,0	/* 9600 baud */
	.byte	14,2,14,3	/* use master clock for BRG, enable */
	.byte	3,0xc1		/* enable receiver */
	.byte	5,0xea		/* enable transmitter */
	.byte	-1
	.even

#elif defined(USE_MFP)

LMFP_UCR     = 0xfffa29
LMFP_TDCDR   = 0xfffa1d
LMFP_TDDR    = 0xfffa25
LMFP_TSR     = 0xfffa2d
LMFP_UDR     = 0xfffa2f

#endif
#endif	/* CONFIG_ATARI */

/*
 * Serial port output support.
 */

/*
 * Initialize serial port hardware for 9600/8/1
 */
func_start	serial_init,%d0/%d1/%a0/%a1
	/*
	 *	Some of the register usage that follows
	 *	CONFIG_AMIGA
	 *		a0 = pointer to boot info record
	 *		d0 = boot info offset
	 *	CONFIG_ATARI
	 *		a0 = address of SCC
	 *		a1 = Liobase address/address of scc_initable
	 *		d0 = init data for serial port
	 *	CONFIG_MAC
	 *		a0 = address of SCC
	 *		a1 = address of scc_initable_mac
	 *		d0 = init data for serial port
	 */

#ifdef CONFIG_AMIGA
#define SERIAL_DTR	7
#define SERIAL_CNTRL	CIABBASE+C_PRA

	is_not_amiga(1f)
	lea	%pc@(L(custom)),%a0
	movel	#-ZTWOBASE,%a0@
	bclr	#SERIAL_DTR,SERIAL_CNTRL-ZTWOBASE
	get_bi_record	BI_AMIGA_SERPER
	movew	%a0@,CUSTOMBASE+C_SERPER-ZTWOBASE
|	movew	#61,CUSTOMBASE+C_SERPER-ZTWOBASE
1:
#endif
#ifdef CONFIG_ATARI
	is_not_atari(4f)
	movel	%pc@(L(iobase)),%a1
#if defined(USE_PRINTER)
	bclr	#0,%a1@(LSTMFP_IERB)
	bclr	#0,%a1@(LSTMFP_DDR)
	moveb	#LPSG_CONTROL,%a1@(LPSG_SELECT)
	moveb	#0xff,%a1@(LPSG_WRITE)
	moveb	#LPSG_IO_B,%a1@(LPSG_SELECT)
	clrb	%a1@(LPSG_WRITE)
	moveb	#LPSG_IO_A,%a1@(LPSG_SELECT)
	moveb	%a1@(LPSG_READ),%d0
	bset	#5,%d0
	moveb	%d0,%a1@(LPSG_WRITE)
#elif defined(USE_SCC)
	lea	%a1@(LSCC_CTRL),%a0
	lea	%pc@(L(scc_initable)),%a1
2:	moveb	%a1@+,%d0
	jmi	3f
	moveb	%d0,%a0@
	moveb	%a1@+,%a0@
	jra	2b
3:	clrb	%a0@
#elif defined(USE_MFP)
	bclr	#1,%a1@(LMFP_TSR)
	moveb   #0x88,%a1@(LMFP_UCR)
	andb	#0x70,%a1@(LMFP_TDCDR)
	moveb   #2,%a1@(LMFP_TDDR)
	orb	#1,%a1@(LMFP_TDCDR)
	bset	#1,%a1@(LMFP_TSR)
#endif
	jra	L(serial_init_done)
4:
#endif
#ifdef CONFIG_MAC
	is_not_mac(L(serial_init_not_mac))
#ifdef MAC_SERIAL_DEBUG
#if !defined(MAC_USE_SCC_A) && !defined(MAC_USE_SCC_B)
#define MAC_USE_SCC_B
#endif
#define mac_scc_cha_b_ctrl_offset	0x0
#define mac_scc_cha_a_ctrl_offset	0x2
#define mac_scc_cha_b_data_offset	0x4
#define mac_scc_cha_a_data_offset	0x6

#ifdef MAC_USE_SCC_A
	/* Initialize channel A */
	movel	%pc@(L(mac_sccbase)),%a0
	lea	%pc@(L(scc_initable_mac)),%a1
5:	moveb	%a1@+,%d0
	jmi	6f
	moveb	%d0,%a0@(mac_scc_cha_a_ctrl_offset)
	moveb	%a1@+,%a0@(mac_scc_cha_a_ctrl_offset)
	jra	5b
6:
#endif	/* MAC_USE_SCC_A */

#ifdef MAC_USE_SCC_B
	/* Initialize channel B */
#ifndef MAC_USE_SCC_A	/* Load mac_sccbase only if needed */
	movel	%pc@(L(mac_sccbase)),%a0
#endif	/* MAC_USE_SCC_A */
	lea	%pc@(L(scc_initable_mac)),%a1
7:	moveb	%a1@+,%d0
	jmi	8f
	moveb	%d0,%a0@(mac_scc_cha_b_ctrl_offset)
	moveb	%a1@+,%a0@(mac_scc_cha_b_ctrl_offset)
	jra	7b
8:
#endif	/* MAC_USE_SCC_B */
#endif	/* MAC_SERIAL_DEBUG */

	jra	L(serial_init_done)
L(serial_init_not_mac):
#endif	/* CONFIG_MAC */

#ifdef CONFIG_Q40
	is_not_q40(2f)
/* debug output goes into SRAM, so we don't do it unless requested
   - check for '%LX$' signature in SRAM   */
	lea	%pc@(SYMBOL_NAME(q40_mem_cptr)),%a1
	move.l	#0xff020010,%a1@  /* must be inited - also used by debug=mem */
	move.l	#0xff020000,%a1   
	cmp.b	#'%',%a1@
	bne	2f	/*nodbg*/
	addq.w	#4,%a1
	cmp.b	#'L',%a1@
	bne	2f	/*nodbg*/
	addq.w	#4,%a1
	cmp.b	#'X',%a1@
	bne	2f	/*nodbg*/
	addq.w	#4,%a1
	cmp.b	#'$',%a1@
	bne	2f	/*nodbg*/
	/* signature OK */
	lea	%pc@(L(q40_do_debug)),%a1
	tas	%a1@
/*nodbg: q40_do_debug is 0 by default*/	
2:		
#endif	
	
#ifdef CONFIG_APOLLO
/* We count on the PROM initializing SIO1 */
#endif

L(serial_init_done):
func_return	serial_init

/*
 * Output character on serial port.
 */
func_start	serial_putc,%d0/%d1/%a0/%a1

	movel	ARG1,%d0
	cmpib	#'\n',%d0
	jbne	1f

	/* A little safe recursion is good for the soul */
	serial_putc	#'\r'
1:

#ifdef CONFIG_AMIGA
	is_not_amiga(2f)
	andw	#0x00ff,%d0
	oriw	#0x0100,%d0
	movel	%pc@(L(custom)),%a0
	movew	%d0,%a0@(CUSTOMBASE+C_SERDAT)
1:	movew	%a0@(CUSTOMBASE+C_SERDATR),%d0
	andw	#0x2000,%d0
	jeq	1b
	jra	L(serial_putc_done)
2:
#endif

#ifdef CONFIG_MAC
	is_not_mac(5f)

#ifdef CONSOLE
	console_putc	%d0
#endif /* CONSOLE */

#ifdef MAC_SERIAL_DEBUG

#ifdef MAC_USE_SCC_A
	movel	%pc@(L(mac_sccbase)),%a1
3:	btst	#2,%a1@(mac_scc_cha_a_ctrl_offset)
	jeq	3b
	moveb	%d0,%a1@(mac_scc_cha_a_data_offset)
#endif	/* MAC_USE_SCC_A */

#ifdef MAC_USE_SCC_B
#ifndef MAC_USE_SCC_A	/* Load mac_sccbase only if needed */
	movel	%pc@(L(mac_sccbase)),%a1
#endif	/* MAC_USE_SCC_A */
4:	btst	#2,%a1@(mac_scc_cha_b_ctrl_offset)
	jeq	4b
	moveb	%d0,%a1@(mac_scc_cha_b_data_offset)
#endif	/* MAC_USE_SCC_B */

#endif	/* MAC_SERIAL_DEBUG */

	jra	L(serial_putc_done)
5:
#endif	/* CONFIG_MAC */

#ifdef CONFIG_ATARI
	is_not_atari(4f)
	movel	%pc@(L(iobase)),%a1
#if defined(USE_PRINTER)
3:	btst	#0,%a1@(LSTMFP_GPIP)
	jne	3b
	moveb	#LPSG_IO_B,%a1@(LPSG_SELECT)
	moveb	%d0,%a1@(LPSG_WRITE)
	moveb	#LPSG_IO_A,%a1@(LPSG_SELECT)
	moveb	%a1@(LPSG_READ),%d0
	bclr	#5,%d0
	moveb	%d0,%a1@(LPSG_WRITE)
	nop
	nop
	bset	#5,%d0
	moveb	%d0,%a1@(LPSG_WRITE)
#elif defined(USE_SCC)
3:	btst	#2,%a1@(LSCC_CTRL)
	jeq	3b
	moveb	%d0,%a1@(LSCC_DATA)
#elif defined(USE_MFP)
3:	btst	#7,%a1@(LMFP_TSR)
	jeq	3b
	moveb	%d0,%a1@(LMFP_UDR)
#endif
	jra	L(serial_putc_done)
4:
#endif	/* CONFIG_ATARI */

#ifdef CONFIG_MVME147
	is_not_mvme147(2f)
1:	btst	#2,M147_SCC_CTRL_A
	jeq	1b
	moveb	%d0,M147_SCC_DATA_A
	jbra	L(serial_putc_done)
2:
#endif

#ifdef CONFIG_MVME16x
	is_not_mvme16x(2f)
	/*
	 * If the loader gave us a board type then we can use that to
	 * select an appropriate output routine; otherwise we just use
	 * the Bug code.  If we haev to use the Bug that means the Bug
	 * workspace has to be valid, which means the Bug has to use
	 * the SRAM, which is non-standard.
	 */
	moveml	%d0-%d7/%a2-%a6,%sp@-
	movel	SYMBOL_NAME(vme_brdtype),%d1
	jeq	1f			| No tag - use the Bug
	cmpi	#VME_TYPE_MVME162,%d1
	jeq	6f
	cmpi	#VME_TYPE_MVME172,%d1
	jne	5f
	/* 162/172; it's an SCC */
6:	btst	#2,M162_SCC_CTRL_A
	nop
	nop
	nop
	jeq	6b
	moveb	#8,M162_SCC_CTRL_A
	nop
	nop
	nop
	moveb	%d0,M162_SCC_CTRL_A
	jra	3f
5:
	/* 166/167/177; its a CD2401 */
	moveb	#0,M167_CYCAR
	moveb	M167_CYIER,%d2
	moveb	#0x02,M167_CYIER
7:
	btst	#5,M167_PCSCCTICR
	jeq	7b
	moveb	M167_PCTPIACKR,%d1
	moveb	M167_CYLICR,%d1
	jeq	8f
	moveb	#0x08,M167_CYTEOIR
	jra	7b
8:
	moveb	%d0,M167_CYTDR
	moveb	#0,M167_CYTEOIR
	moveb	%d2,M167_CYIER
	jra	3f
1:
	moveb	%d0,%sp@-
	trap	#15
	.word	0x0020	/* TRAP 0x020 */
3:
	moveml	%sp@+,%d0-%d7/%a2-%a6
	jbra	L(serial_putc_done)
2:
#endif CONFIG_MVME16x

#ifdef CONFIG_BVME6000
	is_not_bvme6000(2f)
	/*
	 * The BVME6000 machine has a serial port ...
	 */
1:	btst	#2,BVME_SCC_CTRL_A
	jeq	1b
	moveb	%d0,BVME_SCC_DATA_A
	jbra	L(serial_putc_done)
2:
#endif

#ifdef CONFIG_SUN3X
	is_not_sun3x(2f) 
	movel	%d0,-(%sp)
	movel	0xFEFE0018,%a1
	jbsr	(%a1)
	addq	#4,%sp
	jbra	L(serial_putc_done)
2:	
#endif
	
#ifdef CONFIG_Q40
	is_not_q40(2f)
	tst.l	%pc@(L(q40_do_debug))	/* only debug if requested */
	beq	2f
	lea	%pc@(SYMBOL_NAME(q40_mem_cptr)),%a1
	move.l	%a1@,%a0
	move.b	%d0,%a0@
	addq.l	#4,%a0
	move.l	%a0,%a1@
	jbra    L(serial_putc_done)
2:		
#endif	

#ifdef CONFIG_APOLLO
	is_not_apollo(2f)
	movl    %pc@(L(iobase)),%a1
        moveb   %d0,%a1@(LTHRB0)
1:      moveb   %a1@(LSRB0),%d0
        andb    #0x4,%d0
        beq     1b
2:
#endif

L(serial_putc_done):
func_return	serial_putc

/*
 * Output a string.
 */
func_start	puts,%d0/%a0

	movel	ARG1,%a0
	jra	2f
1:
#ifdef CONSOLE
	console_putc	%d0
#endif 
#ifdef SERIAL_DEBUG
	serial_putc	%d0
#endif
2:	moveb	%a0@+,%d0
	jne	1b

func_return	puts

/*
 * Output number in hex notation.
 */

func_start	putn,%d0-%d2

	putc	' '

	movel	ARG1,%d0
	moveq	#7,%d1
1:	roll	#4,%d0
	move	%d0,%d2
	andb	#0x0f,%d2
	addb	#'0',%d2
	cmpb	#'9',%d2
	jls	2f
	addb	#'A'-('9'+1),%d2
2:
#ifdef CONSOLE
	console_putc	%d2
#endif 
#ifdef SERIAL_DEBUG
	serial_putc	%d2
#endif
	dbra	%d1,1b

func_return	putn

#ifdef CONFIG_MAC
/*
 *	mac_serial_print
 *
 *	This routine takes its parameters on the stack.  It then
 *	turns around and calls the internal routine.  This routine
 *	is used until the Linux console driver initializes itself.
 *
 *	The calling parameters are:
 *		void mac_serial_print(const char *str);
 *
 *	This routine does NOT understand variable arguments only
 *	simple strings!
 */
ENTRY(mac_serial_print)
	moveml	%d0/%a0,%sp@-
#if 1
	move	%sr,%sp@-
	ori	#0x0700,%sr
#endif
	movel	%sp@(10),%a0		/* fetch parameter */
	jra	2f
1:	serial_putc	%d0
2:	moveb	%a0@+,%d0
	jne	1b
#if 1
	move	%sp@+,%sr
#endif
	moveml	%sp@+,%d0/%a0
	rts
#endif /* CONFIG_MAC */

#if defined(CONFIG_HP300) || defined(CONFIG_APOLLO)
func_start	set_leds,%d0/%a0
	movel	ARG1,%d0
#ifdef CONFIG_HP300
	is_not_hp300(1f)
	movel	%pc@(L(custom)),%a0
	moveb	%d0,%a0@(0x1ffff)
	jra	2f
#endif
1:	
#ifdef CONFIG_APOLLO
	movel   %pc@(L(iobase)),%a0
	lsll    #8,%d0
	eorw    #0xff00,%d0
	moveb	%d0,%a0@(LCPUCTRL)
#endif
2:
func_return	set_leds
#endif

#ifdef CONSOLE
/*
 *	For continuity, see the data alignment
 *	to which this structure is tied.
 */
#define Lconsole_struct_cur_column	0
#define Lconsole_struct_cur_row		4
#define Lconsole_struct_num_columns	8
#define Lconsole_struct_num_rows	12
#define Lconsole_struct_left_edge	16
#define Lconsole_struct_penguin_putc	20

L(console_init):
	/*
	 *	Some of the register usage that follows
	 *		a0 = pointer to boot_info
	 *		a1 = pointer to screen
	 *		a2 = pointer to Lconsole_globals
	 *		d3 = pixel width of screen
	 *		d4 = pixel height of screen
	 *		(d3,d4) ~= (x,y) of a point just below
	 *			and to the right of the screen
	 *			NOT on the screen!
	 *		d5 = number of bytes per scan line
	 *		d6 = number of bytes on the entire screen
	 */
	moveml	%a0-%a4/%d0-%d7,%sp@-

	lea	%pc@(L(console_globals)),%a2
	lea	%pc@(L(mac_videobase)),%a0
	movel	%a0@,%a1
	lea	%pc@(L(mac_rowbytes)),%a0
	movel	%a0@,%d5
	lea	%pc@(L(mac_dimensions)),%a0
	movel	%a0@,%d3	/* -> low byte */
	movel	%d3,%d4
	swap	%d4		/* -> high byte */
	andl	#0xffff,%d3	/* d3 = screen width in pixels */
	andl	#0xffff,%d4	/* d4 = screen height in pixels */

	movel	%d5,%d6
	subl	#20,%d6
	mulul	%d4,%d6		/* scan line bytes x num scan lines */
	divul	#8,%d6		/* we'll clear 8 bytes at a time */
	subq	#1,%d6

console_clear_loop:
	movel	#0xffffffff,%a1@+	/* Mac_black */
	movel	#0xffffffff,%a1@+	/* Mac_black */
	dbra	%d6,console_clear_loop

	/* Calculate font size */

#if   defined(FONT_8x8)
	lea	%pc@(SYMBOL_NAME(font_vga_8x8)), %a0
#elif defined(FONT_8x16)
	lea	%pc@(SYMBOL_NAME(font_vga_8x16)),%a0
#elif defined(FONT_6x11)
	lea	%pc@(SYMBOL_NAME(font_vga_6x11)),%a0
#else	/*   (FONT_8x8) default */
	lea	%pc@(SYMBOL_NAME(font_vga_8x8)), %a0
#endif

	/*
	 *	At this point we make a shift in register usage
	 *	a1 = address of Lconsole_font pointer
	 */
	lea	%pc@(L(console_font)),%a1
	movel	%a0,%a1@	/* store pointer to struct fbcon_font_desc in Lconsole_font */

	/*
	 *	Calculate global maxs
	 *	Note - we can use either an
	 *	8 x 16 or 8 x 8 character font
	 *	6 x 11 also supported
	 */
		/* ASSERT: a0 = contents of Lconsole_font */
	movel	%d3,%d0			/* screen width in pixels */
	divul	%a0@(FBCON_FONT_DESC_WIDTH),%d0		/* d0 = max num chars per row */

	movel	%d4,%d1			 /* screen height in pixels */
	divul	%a0@(FBCON_FONT_DESC_HEIGHT),%d1	 /* d1 = max num rows */

	movel	%d0,%a2@(Lconsole_struct_num_columns)
	movel	%d1,%a2@(Lconsole_struct_num_rows)

	/*
	 *	Clear the current row and column
	 */
	clrl	%a2@(Lconsole_struct_cur_column)
	clrl	%a2@(Lconsole_struct_cur_row)
	clrl	%a2@(Lconsole_struct_left_edge)

	/*
	 * Initialization is complete
	 */
	moveml	%sp@+,%a0-%a4/%d0-%d7
	rts

L(console_put_stats):
	/*
	 *	Some of the register usage that follows
	 *		a0 = pointer to boot_info
	 *		d7 = value of boot_info fields
	 */
	moveml	%a0/%d7,%sp@-

	puts	"\nMacLinux\n\n"

#ifdef SERIAL_DEBUG
	puts	" vidaddr:"
	putn	%pc@(L(mac_videobase))		/* video addr. */

	puts	"\n  _stext:"
	lea	%pc@(SYMBOL_NAME(_stext)),%a0
	putn	%a0

	puts	"\nbootinfo:"
	lea	%pc@(SYMBOL_NAME(_end)),%a0
	putn	%a0

	puts	"\ncpuid:"
	putn	%pc@(L(cputype))
	putc	'\n'

#  if defined(MMU_PRINT)
	jbsr	mmu_print_machine_cpu_types
#  endif /* MMU_PRINT */
#endif /* SERIAL_DEBUG */

	moveml	%sp@+,%a0/%d7
	rts

#ifdef CONSOLE_PENGUIN
L(console_put_penguin):
	/*
	 *	Get 'that_penguin' onto the screen in the upper right corner
	 *	penguin is 64 x 74 pixels, align against right edge of screen
	 */
	moveml	%a0-%a1/%d0-%d7,%sp@-

	lea	%pc@(L(mac_dimensions)),%a0
	movel	%a0@,%d0
	andil	#0xffff,%d0
	subil	#64,%d0		/* snug up against the right edge */
	clrl	%d1		/* start at the top */
	movel	#73,%d7
	lea	%pc@(SYMBOL_NAME(that_penguin)),%a1
console_penguin_row:
	movel	#31,%d6
console_penguin_pixel_pair:
	moveb	%a1@,%d2
	lsrb	#4,%d2
	jbsr	console_plot_pixel
	addq	#1,%d0
	moveb	%a1@+,%d2
	jbsr	console_plot_pixel
	addq	#1,%d0
	dbra	%d6,console_penguin_pixel_pair

	subil	#64,%d0
	addq	#1,%d1
	dbra	%d7,console_penguin_row

	moveml	%sp@+,%a0-%a1/%d0-%d7
	rts
#endif

console_scroll:
	moveml	%a0-%a4/%d0-%d7,%sp@-

	/*
	 * Calculate source and destination addresses
	 *	output	a1 = dest
	 *		a2 = source
	 */
	lea	%pc@(L(mac_videobase)),%a0
	movel	%a0@,%a1
	movel	%a1,%a2
	lea	%pc@(L(mac_rowbytes)),%a0
	movel	%a0@,%d5
	movel	%pc@(L(console_font)),%a0
	mulul	%a0@(FBCON_FONT_DESC_HEIGHT),%d5	/* account for # scan lines per character */
	addal	%d5,%a2

	/*
	 * Get dimensions
	 */
	lea	%pc@(L(mac_dimensions)),%a0
	movel	%a0@,%d3
	movel	%d3,%d4
	swap	%d4
	andl	#0xffff,%d3	/* d3 = screen width in pixels */
	andl	#0xffff,%d4	/* d4 = screen height in pixels */

	/*
	 * Calculate number of bytes to move
	 */
	lea	%pc@(L(mac_rowbytes)),%a0
	movel	%a0@,%d6
	movel	%pc@(L(console_font)),%a0
	subl	%a0@(FBCON_FONT_DESC_HEIGHT),%d4	/* we're not scrolling the top row! */
	mulul	%d4,%d6		/* scan line bytes x num scan lines */
	divul	#32,%d6		/* we'll move 8 longs at a time */
	subq	#1,%d6

console_scroll_loop:
	movel	%a2@+,%a1@+
	movel	%a2@+,%a1@+
	movel	%a2@+,%a1@+
	movel	%a2@+,%a1@+
	movel	%a2@+,%a1@+
	movel	%a2@+,%a1@+
	movel	%a2@+,%a1@+
	movel	%a2@+,%a1@+
	dbra	%d6,console_scroll_loop

	lea	%pc@(L(mac_rowbytes)),%a0
	movel	%a0@,%d6
	movel	%pc@(L(console_font)),%a0
	mulul	%a0@(FBCON_FONT_DESC_HEIGHT),%d6	/* scan line bytes x font height */
	divul	#32,%d6			/* we'll move 8 words at a time */
	subq	#1,%d6

	moveq	#-1,%d0
console_scroll_clear_loop:
	movel	%d0,%a1@+
	movel	%d0,%a1@+
	movel	%d0,%a1@+
	movel	%d0,%a1@+
	movel	%d0,%a1@+
	movel	%d0,%a1@+
	movel	%d0,%a1@+
	movel	%d0,%a1@+
	dbra	%d6,console_scroll_clear_loop

	moveml	%sp@+,%a0-%a4/%d0-%d7
	rts


func_start	console_putc,%a0/%a1/%d0-%d7

	is_not_mac(console_exit)

	/* Output character in d7 on console.
	 */
	movel	ARG1,%d7
	cmpib	#'\n',%d7
	jbne	1f

	/* A little safe recursion is good for the soul */
	console_putc	#'\r'
1:
	lea	%pc@(L(console_globals)),%a0

	cmpib	#10,%d7
	jne	console_not_lf
	movel	%a0@(Lconsole_struct_cur_row),%d0
	addil	#1,%d0
	movel	%d0,%a0@(Lconsole_struct_cur_row)
	movel	%a0@(Lconsole_struct_num_rows),%d1
	cmpl	%d1,%d0
	jcs	1f
	subil	#1,%d0
	movel	%d0,%a0@(Lconsole_struct_cur_row)
	jbsr	console_scroll
1:
	jra	console_exit

console_not_lf:
	cmpib	#13,%d7
	jne	console_not_cr
	clrl	%a0@(Lconsole_struct_cur_column)
	jra	console_exit

console_not_cr:
	cmpib	#1,%d7
	jne	console_not_home
	clrl	%a0@(Lconsole_struct_cur_row)
	clrl	%a0@(Lconsole_struct_cur_column)
	jra	console_exit

/*
 *	At this point we know that the %d7 character is going to be
 *	rendered on the screen.  Register usage is -
 *		a0 = pointer to console globals
 *		a1 = font data
 *		d0 = cursor column
 *		d1 = cursor row to draw the character
 *		d7 = character number
 */
console_not_home:
	movel	%a0@(Lconsole_struct_cur_column),%d0
	addil	#1,%a0@(Lconsole_struct_cur_column)
	movel	%a0@(Lconsole_struct_num_columns),%d1
	cmpl	%d1,%d0
	jcs	1f
	putc	'\n'	/* recursion is OK! */
1:
	movel	%a0@(Lconsole_struct_cur_row),%d1

	/*
	 *	At this point we make a shift in register usage
	 *	a0 = address of pointer to font data (fbcon_font_desc)
	 */
	movel	%pc@(L(console_font)),%a0
	movel	%a0@(FBCON_FONT_DESC_DATA),%a1	/* Load fbcon_font_desc.data into a1 */
	andl	#0x000000ff,%d7
		/* ASSERT: a0 = contents of Lconsole_font */
	mulul	%a0@(FBCON_FONT_DESC_HEIGHT),%d7	/* d7 = index into font data */
	addl	%d7,%a1			/* a1 = points to char image */

	/*
	 *	At this point we make a shift in register usage
	 *	d0 = pixel coordinate, x
	 *	d1 = pixel coordinate, y
	 *	d2 = (bit 0) 1/0 for white/black (!) pixel on screen
	 *	d3 = font scan line data (8 pixels)
	 *	d6 = count down for the font's pixel width (8)
	 *	d7 = count down for the font's pixel count in height
	 */
		/* ASSERT: a0 = contents of Lconsole_font */
	mulul	%a0@(FBCON_FONT_DESC_WIDTH),%d0
	mulul	%a0@(FBCON_FONT_DESC_HEIGHT),%d1
	movel	%a0@(FBCON_FONT_DESC_HEIGHT),%d7	/* Load fbcon_font_desc.height into d7 */
	subq	#1,%d7
console_read_char_scanline:
	moveb	%a1@+,%d3

		/* ASSERT: a0 = contents of Lconsole_font */
	movel	%a0@(FBCON_FONT_DESC_WIDTH),%d6	/* Load fbcon_font_desc.width into d6 */
	subql	#1,%d6

console_do_font_scanline:
	lslb	#1,%d3
	scsb	%d2		/* convert 1 bit into a byte */
	jbsr	console_plot_pixel
	addq	#1,%d0
	dbra	%d6,console_do_font_scanline

		/* ASSERT: a0 = contents of Lconsole_font */
	subl	%a0@(FBCON_FONT_DESC_WIDTH),%d0
	addq	#1,%d1
	dbra	%d7,console_read_char_scanline

console_exit:

func_return	console_putc

console_plot_pixel:
	/*
	 *	Input:
	 *		d0 = x coordinate
	 *		d1 = y coordinate
	 *		d2 = (bit 0) 1/0 for white/black (!)
	 *	All registers are preserved
	 */
	moveml	%a0-%a1/%d0-%d4,%sp@-

	lea	%pc@(L(mac_videobase)),%a0
	movel	%a0@,%a1
	lea	%pc@(L(mac_videodepth)),%a0
	movel	%a0@,%d3
	lea	%pc@(L(mac_rowbytes)),%a0
	mulul	%a0@,%d1

	/*
	 *	Register usage:
	 *		d0 = x coord becomes byte offset into frame buffer
	 *		d1 = y coord
	 *		d2 = black or white (0/1)
	 *		d3 = video depth
	 *		d4 = temp of x (d0) for many bit depths
	 *		d5 = unused
	 *		d6 = unused
	 *		d7 = unused
	 */
test_1bit:
	cmpb	#1,%d3
	jbne	test_2bit
	movel	%d0,%d4		/* we need the low order 3 bits! */
	divul	#8,%d0
	addal	%d0,%a1
	addal	%d1,%a1
	andb	#7,%d4
	eorb	#7,%d4		/* reverse the x-coordinate w/ screen-bit # */
	andb	#1,%d2
	jbne	white_1
	bsetb	%d4,%a1@
	jbra	console_plot_pixel_exit
white_1:
	bclrb	%d4,%a1@
	jbra	console_plot_pixel_exit

test_2bit:
	cmpb	#2,%d3
	jbne	test_4bit
	movel	%d0,%d4		/* we need the low order 2 bits! */
	divul	#4,%d0
	addal	%d0,%a1
	addal	%d1,%a1
	andb	#3,%d4
	eorb	#3,%d4		/* reverse the x-coordinate w/ screen-bit # */
	lsll	#1,%d4		/* ! */
	andb	#1,%d2
	jbne	white_2
	bsetb	%d4,%a1@
	addq	#1,%d4
	bsetb	%d4,%a1@
	jbra	console_plot_pixel_exit
white_2:
	bclrb	%d4,%a1@
	addq	#1,%d4
	bclrb	%d4,%a1@
	jbra	console_plot_pixel_exit

test_4bit:
	cmpb	#4,%d3
	jbne	test_8bit
	movel	%d0,%d4		/* we need the low order bit! */
	divul	#2,%d0
	addal	%d0,%a1
	addal	%d1,%a1
	andb	#1,%d4
	eorb	#1,%d4
	lsll	#2,%d4		/* ! */
	andb	#1,%d2
	jbne	white_4
	bsetb	%d4,%a1@
	addq	#1,%d4
	bsetb	%d4,%a1@
	addq	#1,%d4
	bsetb	%d4,%a1@
	addq	#1,%d4
	bsetb	%d4,%a1@
	jbra	console_plot_pixel_exit
white_4:
	bclrb	%d4,%a1@
	addq	#1,%d4
	bclrb	%d4,%a1@
	addq	#1,%d4
	bclrb	%d4,%a1@
	addq	#1,%d4
	bclrb	%d4,%a1@
	jbra	console_plot_pixel_exit

test_8bit:
	cmpb	#8,%d3
	jbne	test_16bit
	addal	%d0,%a1
	addal	%d1,%a1
	andb	#1,%d2
	jbne	white_8
	moveb	#0xff,%a1@
	jbra	console_plot_pixel_exit
white_8:
	clrb	%a1@
	jbra	console_plot_pixel_exit

test_16bit:
	cmpb	#16,%d3
	jbne	console_plot_pixel_exit
	addal	%d0,%a1
	addal	%d0,%a1
	addal	%d1,%a1
	andb	#1,%d2
	jbne	white_16
	clrw	%a1@
	jbra	console_plot_pixel_exit
white_16:
	movew	#0x0fff,%a1@
	jbra	console_plot_pixel_exit

console_plot_pixel_exit:
	moveml	%sp@+,%a0-%a1/%d0-%d4
	rts
#endif /* CONSOLE */

#if 0
/*
 * This is some old code lying around.  I don't believe
 * it's used or important anymore.  My guess is it contributed
 * to getting to this point, but it's done for now.
 * It was still in the 2.1.77 head.S, so it's still here.
 * (And still not used!)
 */
L(showtest):
	moveml	%a0/%d7,%sp@-
	puts	"A="
	putn	%a1

	.long	0xf0119f15		| ptestr	#5,%a1@,#7,%a0

	puts	"DA="
	putn	%a0

	puts	"D="
	putn	%a0@

	puts	"S="
	lea	%pc@(L(mmu)),%a0
	.long	0xf0106200		| pmove		%psr,%a0@
	clrl	%d7
	movew	%a0@,%d7
	putn	%d7

	putc	'\n'
	moveml	%sp@+,%a0/%d7
	rts
#endif	/* 0 */

__INITDATA
	.align	4

#if defined(CONFIG_ATARI) || defined(CONFIG_AMIGA) || defined(CONFIG_HP300)
L(custom):
L(iobase):
	.long 0
#endif

#ifdef CONFIG_MAC
L(console_video_virtual):
	.long	0
#endif	/* CONFIG_MAC */

#if defined(CONSOLE)
L(console_globals):
	.long	0		/* cursor column */
	.long	0		/* cursor row */
	.long	0		/* max num columns */
	.long	0		/* max num rows */
	.long	0		/* left edge */
	.long	0		/* mac putc */
L(console_font):
	.long	0		/* pointer to console font (struct fbcon_font_desc) */
#endif /* CONSOLE */

#if defined(MMU_PRINT)
L(mmu_print_data):
	.long	0		/* valid flag */
	.long	0		/* start logical */
	.long	0		/* next logical */
	.long	0		/* start physical */
	.long	0		/* next physical */
#endif /* MMU_PRINT */

L(cputype):
	.long	0
L(mmu_cached_pointer_tables):
	.long	0
L(mmu_num_pointer_tables):
	.long	0
L(phys_kernel_start):
	.long	0
L(kernel_end):
	.long	0
L(memory_start):
	.long	0
L(kernel_pgdir_ptr):
	.long	0
L(temp_mmap_mem):
	.long	0

#if defined (CONFIG_MVME147)
M147_SCC_CTRL_A = 0xfffe3002
M147_SCC_DATA_A = 0xfffe3003
#endif

#if defined (CONFIG_MVME16x)
M162_SCC_CTRL_A = 0xfff45005
M167_CYCAR = 0xfff450ee
M167_CYIER = 0xfff45011
M167_CYLICR = 0xfff45026
M167_CYTEOIR = 0xfff45085
M167_CYTDR = 0xfff450f8
M167_PCSCCTICR = 0xfff4201e
M167_PCTPIACKR = 0xfff42025
#endif

#if defined (CONFIG_BVME6000)
BVME_SCC_CTRL_A	= 0xffb0000b
BVME_SCC_DATA_A	= 0xffb0000f
#endif

#if defined(CONFIG_MAC)
L(mac_booter_data):
	.long	0
L(mac_videobase):
	.long	0
L(mac_videodepth):
	.long	0
L(mac_dimensions):
	.long	0
L(mac_rowbytes):
	.long	0
#ifdef MAC_SERIAL_DEBUG
L(mac_sccbase):
	.long	0
#endif /* MAC_SERIAL_DEBUG */
#endif

#if defined (CONFIG_APOLLO)
LSRB0        = 0x10412
LTHRB0       = 0x10416
LCPUCTRL     = 0x10100
L(iobase):
        .long 0
#endif

__FINIT
	.data
	.align	4

SYMBOL_NAME_LABEL(availmem)
	.long	0
SYMBOL_NAME_LABEL(m68k_pgtable_cachemode)
	.long	0
SYMBOL_NAME_LABEL(m68k_supervisor_cachemode)
	.long	0
#if defined(CONFIG_MVME16x)
SYMBOL_NAME_LABEL(mvme_bdid)
	.long	0,0,0,0,0,0,0,0
#endif
#if defined(CONFIG_Q40)
SYMBOL_NAME_LABEL(q40_mem_cptr)
	.long 0
L(q40_do_debug):	
	.long 0	
#endif
/*
 * linux/arch/m68k/kernel/ints.c -- Linux/m68k general interrupt handling code
 *
 * This file is subject to the terms and conditions of the GNU General Public
 * License.  See the file COPYING in the main directory of this archive
 * for more details.
 *
 * 07/03/96: Timer initialization, and thus mach_sched_init(),
 *           removed from request_irq() and moved to init_time().
 *           We should therefore consider renaming our add_isr() and
 *           remove_isr() to request_irq() and free_irq()
 *           respectively, so they are compliant with the other
 *           architectures.                                     /Jes
 * 11/07/96: Changed all add_/remove_isr() to request_/free_irq() calls.
 *           Removed irq list support, if any machine needs an irq server
 *           it must implement this itself (as it's already done), instead
 *           only default handler are used with mach_default_handler.
 *           request_irq got some flags different from other architectures:
 *           - IRQ_FLG_REPLACE : Replace an existing handler (the default one
 *                               can be replaced without this flag)
 *           - IRQ_FLG_LOCK : handler can't be replaced
 *           There are other machine depending flags, see there
 *           If you want to replace a default handler you should know what
 *           you're doing, since it might handle different other irq sources
 *           which must be served                               /Roman Zippel
 */

#include <linux/config.h>
#include <linux/types.h>
#include <linux/sched.h>
#include <linux/kernel_stat.h>
#include <linux/errno.h>
#include <linux/init.h>

#include <asm/setup.h>
#include <asm/system.h>
#include <asm/irq.h>
#include <asm/traps.h>
#include <asm/page.h>
#include <asm/machdep.h>

#ifdef CONFIG_Q40
#include <asm/q40ints.h>
#endif

/* table for system interrupt handlers */
static irq_handler_t irq_list[SYS_IRQS];

static const char *default_names[SYS_IRQS] = {
	"spurious int", "int1 handler", "int2 handler", "int3 handler",
	"int4 handler", "int5 handler", "int6 handler", "int7 handler"
};

/* The number of spurious interrupts */
volatile unsigned int num_spurious;

#define NUM_IRQ_NODES 100
static irq_node_t nodes[NUM_IRQ_NODES];

static void dummy_enable_irq(unsigned int irq);
static void dummy_disable_irq(unsigned int irq);
static int dummy_request_irq(unsigned int irq,
		void (*handler) (int, void *, struct pt_regs *),
		unsigned long flags, const char *devname, void *dev_id);
static void dummy_free_irq(unsigned int irq, void *dev_id);

void (*enable_irq) (unsigned int) = dummy_enable_irq;
void (*disable_irq) (unsigned int) = dummy_disable_irq;

int (*mach_request_irq) (unsigned int, void (*)(int, void *, struct pt_regs *),
                      unsigned long, const char *, void *) = dummy_request_irq;
void (*mach_free_irq) (unsigned int, void *) = dummy_free_irq;

void init_irq_proc(void);

/*
 * void init_IRQ(void)
 *
 * Parameters:	None
 *
 * Returns:	Nothing
 *
 * This function should be called during kernel startup to initialize
 * the IRQ handling routines.
 */

void __init init_IRQ(void)
{
	int i;

	for (i = 0; i < SYS_IRQS; i++) {
		if (mach_default_handler)
			irq_list[i].handler = (*mach_default_handler)[i];
		irq_list[i].flags   = 0;
		irq_list[i].dev_id  = NULL;
		irq_list[i].devname = default_names[i];
	}

	for (i = 0; i < NUM_IRQ_NODES; i++)
		nodes[i].handler = NULL;

	mach_init_IRQ ();
}

irq_node_t *new_irq_node(void)
{
	irq_node_t *node;
	short i;

	for (node = nodes, i = NUM_IRQ_NODES-1; i >= 0; node++, i--)
		if (!node->handler)
			return node;

	printk ("new_irq_node: out of nodes\n");
	return NULL;
}

/*
 * We will keep these functions until I have convinced Linus to move
 * the declaration of them from include/linux/sched.h to
 * include/asm/irq.h.
 */
int request_irq(unsigned int irq,
		void (*handler) (int, void *, struct pt_regs *),
		unsigned long flags, const char *devname, void *dev_id)
{
	return mach_request_irq(irq, handler, flags, devname, dev_id);
}

void free_irq(unsigned int irq, void *dev_id)
{
	mach_free_irq(irq, dev_id);
}

int sys_request_irq(unsigned int irq, 
                    void (*handler)(int, void *, struct pt_regs *), 
                    unsigned long flags, const char *devname, void *dev_id)
{
	if (irq < IRQ1 || irq > IRQ7) {
		printk("%s: Incorrect IRQ %d from %s\n",
		       __FUNCTION__, irq, devname);
		return -ENXIO;
	}

#if 0
	if (!(irq_list[irq].flags & IRQ_FLG_STD)) {
		if (irq_list[irq].flags & IRQ_FLG_LOCK) {
			printk("%s: IRQ %d from %s is not replaceable\n",
			       __FUNCTION__, irq, irq_list[irq].devname);
			return -EBUSY;
		}
		if (!(flags & IRQ_FLG_REPLACE)) {
			printk("%s: %s can't replace IRQ %d from %s\n",
			       __FUNCTION__, devname, irq, irq_list[irq].devname);
			return -EBUSY;
		}
	}
#endif

	irq_list[irq].handler = handler;
	irq_list[irq].flags   = flags;
	irq_list[irq].dev_id  = dev_id;
	irq_list[irq].devname = devname;
	return 0;
}

void sys_free_irq(unsigned int irq, void *dev_id)
{
	if (irq < IRQ1 || irq > IRQ7) {
		printk("%s: Incorrect IRQ %d\n", __FUNCTION__, irq);
		return;
	}

	if (irq_list[irq].dev_id != dev_id)
		printk("%s: Removing probably wrong IRQ %d from %s\n",
		       __FUNCTION__, irq, irq_list[irq].devname);

	irq_list[irq].handler = (*mach_default_handler)[irq];
	irq_list[irq].flags   = 0;
	irq_list[irq].dev_id  = NULL;
	irq_list[irq].devname = default_names[irq];
}

/*
 * Do we need these probe functions on the m68k?
 *
 *  ... may be useful with ISA devices
 */
unsigned long probe_irq_on (void)
{
#ifdef CONFIG_Q40
	if (MACH_IS_Q40)
		return q40_probe_irq_on();
#endif
	return 0;
}

int probe_irq_off (unsigned long irqs)
{
#ifdef CONFIG_Q40
	if (MACH_IS_Q40)
		return q40_probe_irq_off(irqs);
#endif
	return 0;
}

static void dummy_enable_irq(unsigned int irq)
{
	printk("calling uninitialized enable_irq()\n");
}

static void dummy_disable_irq(unsigned int irq)
{
	printk("calling uninitialized disable_irq()\n");
}

static int dummy_request_irq(unsigned int irq,
		void (*handler) (int, void *, struct pt_regs *),
		unsigned long flags, const char *devname, void *dev_id)
{
	printk("calling uninitialized request_irq()\n");
	return 0;
}

static void dummy_free_irq(unsigned int irq, void *dev_id)
{
	printk("calling uninitialized disable_irq()\n");
}

asmlinkage void process_int(unsigned long vec, struct pt_regs *fp)
{
	if (vec >= VEC_INT1 && vec <= VEC_INT7 && !MACH_IS_BVME6000) {
		vec -= VEC_SPUR;
		kstat.irqs[0][vec]++;
		irq_list[vec].handler(vec, irq_list[vec].dev_id, fp);
	} else {
		if (mach_process_int)
			mach_process_int(vec, fp);
		else
			panic("Can't process interrupt vector %ld\n", vec);
		return;
	}
}

int get_irq_list(char *buf)
{
	int i, len = 0;

	/* autovector interrupts */
	if (mach_default_handler) {
		for (i = 0; i < SYS_IRQS; i++) {
			len += sprintf(buf+len, "auto %2d: %10u ", i,
			               i ? kstat.irqs[0][i] : num_spurious);
				len += sprintf(buf+len, "  ");
			len += sprintf(buf+len, "%s\n", irq_list[i].devname);
		}
	}

	len += mach_get_irq_list(buf+len);
	return len;
}

void init_irq_proc(void)
{
	/* Insert /proc/irq driver here */
}

ct *vma,
					   unsigned long page)
{
	struct mm_struct *mm = vma->vm_mm;
	unsigned long flags;
	pgd_t *pgdp;
	pmd_t *pmdp;
	pte_t *ptep;

	/*
	 * If ownes no valid ASID yet, cannot possibly have gotten
	 * this page into the cache.
	 */
	if (CPU_CONTEXT(smp_processor_id(), mm) == 0)
		return;

#ifdef DEBUG_CACHE
	printk("cpage[%d,%08lx]", (int)mm->context, page);
#endif
	__save_and_cli(flags);
	page &= PAGE_MASK;
	pgdp = pgd_offset(mm, page);
	pmdp = pmd_offset(pgdp, page);
	ptep = pte_offset(pmdp, page);

	/*
	 * If the page isn't marked valid, the page cannot possibly be
	 * in the cache.
	 */
	if(!(pte_val(*ptep) & _PAGE_VALID))
		goto out;

	/*
	 * Doing flushes for another ASID than the current one is
	 * too difficult since stupid R4k caches do a TLB translation
	 * for every cache flush operation.  So we do indexed flushes
	 * in that case, which doesn't overly flush the cache too much.
	 */
	if (CPU_CONTEXT(smp_processor_id(), mm) != 
	    CPU_CONTEXT(smp_processor_id(), current->mm)) {
		/*
		 * Do indexed flush, too much work to get the (possible)
		 * tlb refills to work correctly.
		 */
		page = (KSEG0 + (page & (scache_size - 1)));
		blast_dcache32_page_indexed(page);
		blast_scache32_page_indexed(page);
	} else
		blast_scache32_page(page);
out:
	__restore_flags(flags);
}

static void r4k_flush_cache_page_s64d32i32(struct vm_area_struct *vma,
					   unsigned long page)
{
	struct mm_struct *mm = vma->vm_mm;
	unsigned long flags;
	pgd_t *pgdp;
	pmd_t *pmdp;
	pte_t *ptep;

	/*
	 * If ownes no valid ASID yet, cannot possibly have gotten
	 * this page into the cache.
	 */
	if (CPU_CONTEXT(smp_processor_id(), mm) == 0)
		return;

#ifdef DEBUG_CACHE
	printk("cpage[%d,%08lx]", (int)mm->context, page);
#endif
	__save_and_cli(flags);
	page &= PAGE_MASK;
	pgdp = pgd_offset(mm, page);
	pmdp = pmd_offset(pgdp, page);
	ptep = pte_offset(pmdp, page);

	/*
	 * If the page isn't marked valid, the page cannot possibly be
	 * in the cache.
	 */
	if(!(pte_val(*ptep) & _PAGE_VALID))
		goto out;

	/*
	 * Doing flushes for another ASID than the current one is
	 * too difficult since stupid R4k caches do a TLB translation
	 * for every cache flush operation.  So we do indexed flushes
	 * in that case, which doesn't overly flush the cache too much.
	 */
	if (CPU_CONTEXT(smp_processor_id(), mm) != 
	    CPU_CONTEXT(smp_processor_id(), current->mm)) {
		/*
		 * Do indexed flush, too much work to get the (possible)
		 * tlb refills to work correctly.
		 */
		page = (KSEG0 + (page & (scache_size - 1)));
		blast_dcache32_page_indexed(page);
		blast_scache64_page_indexed(page);
	} else
		blast_scache64_page(page);
out:
	__restore_flags(flags);
}

static void r4k_flush_cache_page_s128d32i32(struct vm_area_struct *vma,
					    unsigned long page)
{
	struct mm_struct *mm = vma->vm_mm;
	unsigned long flags;
	pgd_t *pgdp;
	pmd_t *pmdp;
	pte_t *ptep;

	/*
	 * If ownes no valid ASID yet, cannot possibly have gotten
	 * this page into the cache.
	 */
	if (CPU_CONTEXT(smp_processor_id(), mm) == 0)
		return;

#ifdef DEBUG_CACHE
	printk("cpage[%d,%08lx]", (int)mm->context, page);
#endif
	__save_and_cli(flags);
	page &= PAGE_MASK;
	pgdp = pgd_offset(mm, page);
	pmdp = pmd_offset(pgdp, page);
	ptep = pte_offset(pmdp, page);

	/* If the page isn't marked valid, the page cannot possibly be
	 * in the cache.
	 */
	if(!(pte_val(*ptep) & _PAGE_VALID))
		goto out;

	/*
	 * Doing flushes for another ASID than the current one is
	 * too difficult since stupid R4k caches do a TLB translation
	 * for every cache flush operation.  So we do indexed flushes
	 * in that case, which doesn't overly flush the cache too much.
	 */
	if (CPU_CONTEXT(smp_processor_id(), mm) != 
	    CPU_CONTEXT(smp_processor_id(), current->mm)) {
		/* Do indexed flush, too much work to get the (possible)
		 * tlb refills to work correctly.
		 */
		page = (KSEG0 + (page & (scache_size - 1)));
		blast_dcache32_page_indexed(page);
		blast_scache128_page_indexed(page);
	} else
		blast_scache128_page(page);
out:
	__restore_flags(flags);
}

static void r4k_flush_cache_page_d16i16(struct vm_area_struct *vma,
					unsigned long page)
{
	struct mm_struct *mm = vma->vm_mm;
	unsigned long flags;
	pgd_t *pgdp;
	pmd_t *pmdp;
	pte_t *ptep;

	/*
	 * If ownes no valid ASID yet, cannot possibly have gotten
	 * this page into the cache.
	 */
	if (CPU_CONTEXT(smp_processor_id(), mm) == 0)
		return;

#ifdef DEBUG_CACHE
	printk("cpage[%d,%08lx]", (int)mm->context, page);
#endif
	__save_and_cli(flags);
	page &= PAGE_MASK;
	pgdp = pgd_offset(mm, page);
	pmdp = pmd_offset(pgdp, page);
	ptep = pte_offset(pmdp, page);

	/* If the page isn't marked valid, the page cannot possibly be
	 * in the cache.
	 */
	if(!(pte_val(*ptep) & _PAGE_VALID))
		goto out;

	/*
	 * Doing flushes for another ASID than the current one is
	 * too difficult since stupid R4k caches do a TLB translation
	 * for every cache flush operation.  So we do indexed flushes
	 * in that case, which doesn't overly flush the cache too much.
	 */
	if(mm == current->mm) {
		blast_dcache16_page(page);
	} else {
		/* Do indexed flush, too much work to get the (possible)
		 * tlb refills to work correctly.
		 */
		page = (KSEG0 + (page & (dcache_size - 1)));
		blast_dcache16_page_indexed(page);
	}
out:
	__restore_flags(flags);
}

static void r4k_flush_cache_page_d32i32(struct vm_area_struct *vma,
					unsigned long page)
{
	struct mm_struct *mm = vma->vm_mm;
	unsigned long flags;
	pgd_t *pgdp;
	pmd_t *pmdp;
	pte_t *ptep;

	/*
	 * If ownes no valid ASID yet, cannot possibly have gotten
	 * this page into the cache.
	 */
	if (CPU_CONTEXT(smp_processor_id(), mm) == 0)
		return;

#ifdef DEBUG_CACHE
	printk("cpage[%d,%08lx]", (int)mm->context, page);
#endif
	__save_and_cli(flags);
	page &= PAGE_MASK;
	pgdp = pgd_offset(mm, page);
	pmdp = pmd_offset(pgdp, page);
	ptep = pte_offset(pmdp, page);

	/*
	 * If the page isn't marked valid, the page cannot possibly be
	 * in the cache.
	 */
	if(!(pte_val(*ptep) & _PAGE_PRESENT))
		goto out;

	/*
	 * Doing flushes for another ASID than the current one is
	 * too difficult since stupid R4k caches do a TLB translation
	 * for every cache flush operation.  So we do indexed flushes
	 * in that case, which doesn't overly flush the cache too much.
	 */
	if((mm == current->mm) && (pte_val(*ptep) & _PAGE_VALID)) {
		blast_dcache32_page(page);
	} else {
		/*
		 * Do indexed flush, too much work to get the (possible)
		 * tlb refills to work correctly.
		 */
		page = (KSEG0 + (page & (dcache_size - 1)));
		blast_dcache32_page_indexed(page);
	}
out:
	__restore_flags(flags);
}

static void r4k_flush_cache_page_d32i32_r4600(struct vm_area_struct *vma,
					      unsigned long page)
{
	struct mm_struct *mm = vma->vm_mm;
	unsigned long flags;
	pgd_t *pgdp;
	pmd_t *pmdp;
	pte_t *ptep;

	/*
	 * If ownes no valid ASID yet, cannot possibly have gotten
	 * this page into the cache.
	 */
	if (CPU_CONTEXT(smp_processor_id(), mm) == 0)
		return;

#ifdef DEBUG_CACHE
	printk("cpage[%d,%08lx]", (int)mm->context, page);
#endif
	__save_and_cli(flags);
	page &= PAGE_MASK;
	pgdp = pgd_offset(mm, page);
	pmdp = pmd_offset(pgdp, page);
	ptep = pte_offset(pmdp, page);

	/*
	 * If the page isn't marked valid, the page cannot possibly be
	 * in the cache.
	 */
	if(!(pte_val(*ptep) & _PAGE_PRESENT))
		goto out;

	/*
	 * Doing flushes for another ASID than the current one is
	 * too difficult since stupid R4k caches do a TLB translation
	 * for every cache flush operation.  So we do indexed flushes
	 * in that case, which doesn't overly flush the cache too much.
	 */
	if((mm == current->mm) && (pte_val(*ptep) & _PAGE_VALID)) {
		blast_dcache32_page(page);
	} else {
		/* Do indexed flush, too much work to get the (possible)
		 * tlb refills to work correctly.
		 */
		page = (KSEG0 + (page & (dcache_size - 1)));
		blast_dcache32_page_indexed(page);
		blast_dcache32_page_indexed(page ^ dcache_waybit);
	}
out:
	__restore_flags(flags);
}

static void r4k_flush_page_to_ram_s16(struct page *page)
{
	blast_scache16_page((unsigned long)page_address(page));
}

static void r4k_flush_page_to_ram_s32(struct page *page)
{
	blast_scache32_page((unsigned long)page_address(page));
}

static void r4k_flush_page_to_ram_s64(struct page *page)
{
	blast_scache64_page((unsigned long)page_address(page));
}

static void r4k_flush_page_to_ram_s128(struct page *page)
{
	blast_scache128_page((unsigned long)page_address(page));
}

static void r4k_flush_page_to_ram_d16(struct page *page)
{
	unsigned long flags;

	__save_and_cli(flags);
	blast_dcache16_page((unsigned long)page_address(page));
	__restore_flags(flags);
}

static void r4k_flush_page_to_ram_d32(struct page *page)
{
	unsigned long flags;

	__save_and_cli(flags);
	blast_dcache32_page((unsigned long)page_address(page));
	__restore_flags(flags);
}

/*
 * Writeback and invalidate the primary cache dcache before DMA.
 *
 * R4600 v2.0 bug: "The CACHE instructions Hit_Writeback_Inv_D,
 * Hit_Writeback_D, Hit_Invalidate_D and Create_Dirty_Exclusive_D will only
 * operate correctly if the internal data cache refill buffer is empty.  These
 * CACHE instructions should be separated from any potential data cache miss
 * by a load instruction to an uncached address to empty the response buffer."
 * (Revision 2.0 device errata from IDT available on http://www.idt.com/
 * in .pdf format.)
 */
static void r4k_dma_cache_wback_inv_pc(unsigned long addr, unsigned long size)
{
	unsigned long end, a;
	unsigned int flags;

	if (size >= (unsigned long)dcache_size) {
		flush_cache_l1();
	} else {
		/* Workaround for R4600 bug.  See comment above. */
		__save_and_cli(flags);
		*(volatile unsigned long *)KSEG1;

		a = addr & ~((unsigned long)dc_lsize - 1);
		end = (addr + size) & ~((unsigned long)dc_lsize - 1);
		while (1) {
			flush_dcache_line(a); /* Hit_Writeback_Inv_D */
			if (a == end) break;
			a += dc_lsize;
		}
		__restore_flags(flags);
	}
	bc_wback_inv(addr, size);
}

static void r4k_dma_cache_wback_inv_sc(unsigned long addr, unsigned long size)
{
	unsigned long end, a;

	if (size >= (unsigned long)scache_size) {
		flush_cache_l1();
		return;
	}

	a = addr & ~((unsigned long)sc_lsize - 1);
	end = (addr + size) & ~((unsigned long)sc_lsize - 1);
	while (1) {
		flush_scache_line(a);	/* Hit_Writeback_Inv_SD */
		if (a == end) break;
		a += sc_lsize;
	}
}

static void r4k_dma_cache_inv_pc(unsigned long addr, unsigned long size)
{
	unsigned long end, a;
	unsigned int flags;

	if (size >= (unsigned long)dcache_size) {
		flush_cache_l1();
	} else {
		/* Workaround for R4600 bug.  See comment above. */
		__save_and_cli(flags);
		*(volatile unsigned long *)KSEG1;

		a = addr & ~((unsigned long)dc_lsize - 1);
		end = (addr + size) & ~((unsigned long)dc_lsize - 1);
		while (1) {
			flush_dcache_line(a); /* Hit_Writeback_Inv_D */
			if (a == end) break;
			a += dc_lsize;
		}
		__restore_flags(flags);
	}

	bc_inv(addr, size);
}

static void r4k_dma_cache_inv_sc(unsigned long addr, unsigned long size)
{
	unsigned long end, a;

	if (size >= (unsigned long)scache_size) {
		flush_cache_l1();
		return;
	}

	a = addr & ~((unsigned long)sc_lsize - 1);
	end = (addr + size) & ~((unsigned long)sc_lsize - 1);
	while (1) {
		flush_scache_line(a); /* Hit_Writeback_Inv_SD */
		if (a == end) break;
		a += sc_lsize;
	}
}

static void r4k_dma_cache_wback(unsigned long addr, unsigned long size)
{
	panic("r4k_dma_cache called - should not happen.");
}

/*
 * While we're protected against bad userland addresses we don't care
 * very much about what happens in that case.  Usually a segmentation
 * fault will dump the process later on anyway ...
 */
static void r4k_flush_cache_sigtramp(unsigned long addr)
{
	__asm__ __volatile__("nop;nop;nop;nop");	/* R4600 V1.7 */

	protected_writeback_dcache_line(addr & ~(dc_lsize - 1));
	protected_flush_icache_line(addr & ~(ic_lsize - 1));
}

static void r4600v20k_flush_cache_sigtramp(unsigned long addr)
{
	unsigned int flags;

	__save_and_cli(flags);

	/* Clear internal cache refill buffer */
	*(volatile unsigned int *)KSEG1;

	protected_writeback_dcache_line(addr & ~(dc_lsize - 1));
	protected_flush_icache_line(addr & ~(ic_lsize - 1));

	__restore_flags(flags);
}

#undef DEBUG_TLB

#define NTLB_ENTRIES       48  /* Fixed on all R4XX0 variants... */

#define NTLB_ENTRIES_HALF  24  /* Fixed on all R4XX0 variants... */

void local_flush_tlb_all(void)
{
	unsigned long flags;
	unsigned long old_ctx;
	int entry;

#ifdef DEBUG_TLB
	printk("[tlball]");
#endif

	__save_and_cli(flags);
	/* Save old context and create impossible VPN2 value */
	old_ctx = (get_entryhi() & 0xff);
	set_entryhi(KSEG0);
	set_entrylo0(0);
	set_entrylo1(0);
	BARRIER;

	entry = get_wired();

	/* Blast 'em all away. */
	while(entry < NTLB_ENTRIES) {
		set_index(entry);
		BARRIER;
		tlb_write_indexed();
		BARRIER;
		entry++;
	}
	BARRIER;
	set_entryhi(old_ctx);
	__restore_flags(flags);
}

void local_flush_tlb_mm(struct mm_struct *mm)
{
	if (CPU_CONTEXT(smp_processor_id(), mm) != 0) {
		unsigned long flags;

#ifdef DEBUG_TLB
		printk("[tlbmm<%d>]", mm->context);
#endif
		__save_and_cli(flags);
		get_new_mmu_context(mm, smp_processor_id());
		if(mm == current->mm)
			set_entryhi(CPU_CONTEXT(smp_processor_id(), mm) & 0xff);
		__restore_flags(flags);
	}
}

void local_flush_tlb_range(struct mm_struct *mm, unsigned long start,
				unsigned long end)
{
	if (CPU_CONTEXT(smp_processor_id(), mm) != 0) {
		unsigned long flags;
		int size;

#ifdef DEBUG_TLB
		printk("[tlbrange<%02x,%08lx,%08lx>]", (mm->context & 0xff),
		       start, end);
#endif
		__save_and_cli(flags);
		size = (end - start + (PAGE_SIZE - 1)) >> PAGE_SHIFT;
		size = (size + 1) >> 1;
		if(size <= NTLB_ENTRIES_HALF) {
			int oldpid = (get_entryhi() & 0xff);
			int newpid = (CPU_CONTEXT(smp_processor_id(), mm) & 0xff);

			start &= (PAGE_MASK << 1);
			end += ((PAGE_SIZE << 1) - 1);
			end &= (PAGE_MASK << 1);
			while(start < end) {
				int idx;

				set_entryhi(start | newpid);
				start += (PAGE_SIZE << 1);
				BARRIER;
				tlb_probe();
				BARRIER;
				idx = get_index();
				set_entrylo0(0);
				set_entrylo1(0);
				set_entryhi(KSEG0);
				BARRIER;
				if(idx < 0)
					continue;
				tlb_write_indexed();
				BARRIER;
			}
			set_entryhi(oldpid);
		} else {
			get_new_mmu_context(mm, smp_processor_id());
			if(mm == current->mm)
				set_entryhi(CPU_CONTEXT(smp_processor_id(), 
								mm) & 0xff);
		}
		__restore_flags(flags);
	}
}

void local_flush_tlb_page(struct vm_area_struct *vma, unsigned long page)
{
	if (CPU_CONTEXT(smp_processor_id(), vma->vm_mm) != 0) {
		unsigned long flags;
		int oldpid, newpid, idx;

#ifdef DEBUG_TLB
		printk("[tlbpage<%d,%08lx>]", vma->vm_mm->context, page);
#endif
		newpid = (CPU_CONTEXT(smp_processor_id(), vma->vm_mm) & 0xff);
		page &= (PAGE_MASK << 1);
		__save_and_cli(flags);
		oldpid = (get_entryhi() & 0xff);
		set_entryhi(page | newpid);
		BARRIER;
		tlb_probe();
		BARRIER;
		idx = get_index();
		set_entrylo0(0);
		set_entrylo1(0);
		set_entryhi(KSEG0);
		if(idx < 0)
			goto finish;
		BARRIER;
		tlb_write_indexed();

	finish:
		BARRIER;
		set_entryhi(oldpid);
		__restore_flags(flags);
	}
}

static void r4k_flush_cache_l2(void)
{
}

/* We will need multiple versions of update_mmu_cache(), one that just
 * updates the TLB with the new pte(s), and another which also checks
 * for the R4k "end of page" hardware bug and does the needy.
 */
static void r4k_update_mmu_cache(struct vm_area_struct * vma,
				 unsigned long address, pte_t pte)
{
	unsigned long flags;
	pgd_t *pgdp;
	pmd_t *pmdp;
	pte_t *ptep;
	int idx, pid;

	/*
	 * Handle debugger faulting in for debugee.
	 */
	if (current->active_mm != vma->vm_mm)
		return;

	__save_and_cli(flags);
	pid = (get_entryhi() & 0xff);

#ifdef DEBUG_TLB
	if((pid != (CPU_CONTEXT(smp_processor_id(), vma->vm_mm) & 0xff)) ||
	   (CPU_CONTEXT(smp_processor_id(), vma->vm_mm) == 0)) {
		printk("update_mmu_cache: Wheee, bogus tlbpid mmpid=%d
			tlbpid=%d\n", (int) (CPU_CONTEXT(smp_processor_id(),
			vma->vm_mm) & 0xff), pid);
	}
#endif

	address &= (PAGE_MASK << 1);
	set_entryhi(address | (pid));
	pgdp = pgd_offset(vma->vm_mm, address);
	BARRIER;
	tlb_probe();
	BARRIER;
	pmdp = pmd_offset(pgdp, address);
	idx = get_index();
	ptep = pte_offset(pmdp, address);
	BARRIER;
	set_entrylo0(pte_val(*ptep++) >> 6);
	set_entrylo1(pte_val(*ptep) >> 6);
	set_entryhi(address | (pid));
	BARRIER;
	if(idx < 0) {
		tlb_write_random();
	} else {
		tlb_write_indexed();
	}
	BARRIER;
	set_entryhi(pid);
	BARRIER;
	__restore_flags(flags);
}

#if 0
static void r4k_update_mmu_cache_hwbug(struct vm_area_struct * vma,
				       unsigned long address, pte_t pte)
{
	unsigned long flags;
	pgd_t *pgdp;
	pmd_t *pmdp;
	pte_t *ptep;
	int idx;

	__save_and_cli(flags);
	address &= (PAGE_MASK << 1);
	set_entryhi(address | (get_entryhi() & 0xff));
	pgdp = pgd_offset(vma->vm_mm, address);
	tlb_probe();
	pmdp = pmd_offset(pgdp, address);
	idx = get_index();
	ptep = pte_offset(pmdp, address);
	set_entrylo0(pte_val(*ptep++) >> 6);
	set_entrylo1(pte_val(*ptep) >> 6);
	BARRIER;
	if(idx < 0)
		tlb_write_random();
	else
		tlb_write_indexed();
	BARRIER;
	__restore_flags(flags);
}
#endif

/* Detect and size the various r4k caches. */
static void __init probe_icache(unsigned long config)
{
	icache_size = 1 << (12 + ((config >> 9) & 7));
	ic_lsize = 16 << ((config >> 5) & 1);

	printk("Primary instruction cache %dkb, linesize %d bytes)\n",
	       icache_size >> 10, ic_lsize);
}

static void __init probe_dcache(unsigned long config)
{
	dcache_size = 1 << (12 + ((config >> 6) & 7));
	dc_lsize = 16 << ((config >> 4) & 1);

	printk("Primary data cache %dkb, linesize %d bytes)\n",
	       dcache_size >> 10, dc_lsize);
}


/* If you even _breathe_ on this function, look at the gcc output
 * and make sure it does not pop things on and off the stack for
 * the cache sizing loop that executes in KSEG1 space or else
 * you will crash and burn badly.  You have been warned.
 */
static int __init probe_scache(unsigned long config)
{
	extern unsigned long stext;
	unsigned long flags, addr, begin, end, pow2;
	int tmp;

	tmp = ((config >> 17) & 1);
	if(tmp)
		return 0;
	tmp = ((config >> 22) & 3);
	switch(tmp) {
	case 0:
		sc_lsize = 16;
		break;
	case 1:
		sc_lsize = 32;
		break;
	case 2:
		sc_lsize = 64;
		break;
	case 3:
		sc_lsize = 128;
		break;
	}

	begin = (unsigned long) &stext;
	begin &= ~((4 * 1024 * 1024) - 1);
	end = begin + (4 * 1024 * 1024);

	/* This is such a bitch, you'd think they would make it
	 * easy to do this.  Away you daemons of stupidity!
	 */
	__save_and_cli(flags);

	/* Fill each size-multiple cache line with a valid tag. */
	pow2 = (64 * 1024);
	for(addr = begin; addr < end; addr = (begin + pow2)) {
		unsigned long *p = (unsigned long *) addr;
		__asm__ __volatile__("nop" : : "r" (*p)); /* whee... */
		pow2 <<= 1;
	}

	/* Load first line with zero (therefore invalid) tag. */
	set_taglo(0);
	set_taghi(0);
	__asm__ __volatile__("nop; nop; nop; nop;"); /* avoid the hazard */
	__asm__ __volatile__("\n\t.set noreorder\n\t"
			     "cache 8, (%0)\n\t"
			     ".set reorder\n\t" : : "r" (begin));
	__asm__ __volatile__("\n\t.set noreorder\n\t"
			     "cache 9, (%0)\n\t"
			     ".set reorder\n\t" : : "r" (begin));
	__asm__ __volatile__("\n\t.set noreorder\n\t"
			     "cache 11, (%0)\n\t"
			     ".set reorder\n\t" : : "r" (begin));

	/* Now search for the wrap around point. */
	pow2 = (128 * 1024);
	tmp = 0;
	for(addr = (begin + (128 * 1024)); addr < (end); addr = (begin + pow2)) {
		__asm__ __volatile__("\n\t.set noreorder\n\t"
				     "cache 7, (%0)\n\t"
				     ".set reorder\n\t" : : "r" (addr));
		__asm__ __volatile__("nop; nop; nop; nop;"); /* hazard... */
		if(!get_taglo())
			break;
		pow2 <<= 1;
	}
	__restore_flags(flags);
	addr -= begin;
	printk("Secondary cache sized at %dK linesize %d\n",
	       (int) (addr >> 10), sc_lsize);
	scache_size = addr;
	return 1;
}

static void __init setup_noscache_funcs(void)
{
	unsigned int prid;

	switch(dc_lsize) {
	case 16:
		_clear_page = r4k_clear_page_d16;
		_copy_page = r4k_copy_page_d16;
		_flush_cache_l1 = r4k_flush_cache_all_d16i16;
		_flush_cache_mm = r4k_flush_cache_mm_d16i16;
		_flush_cache_range = r4k_flush_cache_range_d16i16;
		_flush_cache_page = r4k_flush_cache_page_d16i16;
		break;
	case 32:
		prid = read_32bit_cp0_register(CP0_PRID) & 0xfff0;
		if (prid == 0x2010) {			/* R4600 V1.7 */
			_clear_page = r4k_clear_page_r4600_v1;
			_copy_page = r4k_copy_page_r4600_v1;
		} else if (prid == 0x2020) {		/* R4600 V2.0 */
			_clear_page = r4k_clear_page_r4600_v2;
			_copy_page = r4k_copy_page_r4600_v2;
		} else {
			_clear_page = r4k_clear_page_d32;
			_copy_page = r4k_copy_page_d32;
		}
		_flush_cache_l1 = r4k_flush_cache_all_d32i32;
		_flush_cache_mm = r4k_flush_cache_mm_d32i32;
		_flush_cache_range = r4k_flush_cache_range_d32i32;
		_flush_cache_page = r4k_flush_cache_page_d32i32;
		break;
	}

	switch(ic_lsize) {
	case 16:
		_flush_page_to_ram = r4k_flush_page_to_ram_d16;
		break;
	case 32:
		_flush_page_to_ram = r4k_flush_page_to_ram_d32;
		break;
	}

	_dma_cache_wback_inv = r4k_dma_cache_wback_inv_pc;
	_dma_cache_wback = r4k_dma_cache_wback;
	_dma_cache_inv = r4k_dma_cache_inv_pc;
}

static void __init setup_scache_funcs(void)
{
	switch(sc_lsize) {
	case 16:
		switch(dc_lsize) {
		case 16:
			_flush_cache_l1 = r4k_flush_cache_all_s16d16i16;
			_flush_cache_mm = r4k_flush_cache_mm_s16d16i16;
			_flush_cache_range = r4k_flush_cache_range_s16d16i16;
			_flush_cache_page = r4k_flush_cache_page_s16d16i16;
			break;
		case 32:
			panic("Invalid cache configuration detected");
		};
		_flush_page_to_ram = r4k_flush_page_to_ram_s16;
		_clear_page = r4k_clear_page_s16;
		_copy_page = r4k_copy_page_s16;
		break;
	case 32:
		switch(dc_lsize) {
		case 16:
			_flush_cache_l1 = r4k_flush_cache_all_s32d16i16;
			_flush_cache_mm = r4k_flush_cache_mm_s32d16i16;
			_flush_cache_range = r4k_flush_cache_range_s32d16i16;
			_flush_cache_page = r4k_flush_cache_page_s32d16i16;
			break;
		case 32:
			_flush_cache_l1 = r4k_flush_cache_all_s32d32i32;
			_flush_cache_mm = r4k_flush_cache_mm_s32d32i32;
			_flush_cache_range = r4k_flush_cache_range_s32d32i32;
			_flush_cache_page = r4k_flush_cache_page_s32d32i32;
			break;
		};
		_flush_page_to_ram = r4k_flush_page_to_ram_s32;
		_clear_page = r4k_clear_page_s32;
		_copy_page = r4k_copy_page_s32;
		break;
	case 64:
		switch(dc_lsize) {
		case 16:
			_flush_cache_l1 = r4k_flush_cache_all_s64d16i16;
			_flush_cache_mm = r4k_flush_cache_mm_s64d16i16;
			_flush_cache_range = r4k_flush_cache_range_s64d16i16;
			_flush_cache_page = r4k_flush_cache_page_s64d16i16;
			break;
		case 32:
			_flush_cache_l1 = r4k_flush_cache_all_s64d32i32;
			_flush_cache_mm = r4k_flush_cache_mm_s64d32i32;
			_flush_cache_range = r4k_flush_cache_range_s64d32i32;
			_flush_cache_page = r4k_flush_cache_page_s64d32i32;
			break;
		};
		_flush_page_to_ram = r4k_flush_page_to_ram_s64;
		_clear_page = r4k_clear_page_s64;
		_copy_page = r4k_copy_page_s64;
		break;
	case 128:
		switch(dc_lsize) {
		case 16:
			_flush_cache_l1 = r4k_flush_cache_all_s128d16i16;
			_flush_cache_mm = r4k_flush_cache_mm_s128d16i16;
			_flush_cache_range = r4k_flush_cache_range_s128d16i16;
			_flush_cache_page = r4k_flush_cache_page_s128d16i16;
			break;
		case 32:
			_flush_cache_l1 = r4k_flush_cache_all_s128d32i32;
			_flush_cache_mm = r4k_flush_cache_mm_s128d32i32;
			_flush_cache_range = r4k_flush_cache_range_s128d32i32;
			_flush_cache_page = r4k_flush_cache_page_s128d32i32;
			break;
		};
		_flush_page_to_ram = r4k_flush_page_to_ram_s128;
		_clear_page = r4k_clear_page_s128;
		_copy_page = r4k_copy_page_s128;
		break;
	}
	_dma_cache_wback_inv = r4k_dma_cache_wback_inv_sc;
	_dma_cache_wback = r4k_dma_cache_wback;
	_dma_cache_inv = r4k_dma_cache_inv_sc;
}

typedef int (*probe_func_t)(unsigned long);

static inline void __init setup_scache(unsigned int config)
{
	probe_func_t probe_scache_kseg1;
	int sc_present = 0;

	/* Maybe the cpu knows about a l2 cache? */
	probe_scache_kseg1 = (probe_func_t) (KSEG1ADDR(&probe_scache));
	sc_present = probe_scache_kseg1(config);

	if (sc_present) {
		setup_scache_funcs();
		return;
	}

	setup_noscache_funcs();
}

void __init ld_mmu_r4xx0(void)
{
	unsigned long config = read_32bit_cp0_register(CP0_CONFIG);

	printk("CPU revision is: %08x\n", read_32bit_cp0_register(CP0_PRID));

#ifdef CONFIG_MIPS_UNCACHED
	change_cp0_config(CONF_CM_CMASK, CONF_CM_UNCACHED);
#else
	change_cp0_config(CONF_CM_CMASK, CONF_CM_CACHABLE_NONCOHERENT);
#endif /* UNCACHED */

	probe_icache(config);
	probe_dcache(config);
	setup_scache(config);

	switch(mips_cpu.cputype) {
	case CPU_R4600:			/* QED style two way caches? */
	case CPU_R4700:
	case CPU_R5000:
	case CPU_NEVADA:
		_flush_cache_page = r4k_flush_cache_page_d32i32_r4600;
	}

	_flush_cache_sigtramp = r4k_flush_cache_sigtramp;
	if ((read_32bit_cp0_register(CP0_PRID) & 0xfff0) == 0x2020) {
		_flush_cache_sigtramp = r4600v20k_flush_cache_sigtramp;
	}

	_flush_cache_l2 = r4k_flush_cache_l2;

	_update_mmu_cache = r4k_update_mmu_cache;

	flush_cache_l1();

	/*
	 * You should never change this register:
	 *   - On R4600 1.7 the tlbp never hits for pages smaller than
	 *     the value in the c0_pagemask register.
	 *   - The entire mm handling assumes the c0_pagemask register to
	 *     be set for 4kb pages.
	 */
	write_32bit_cp0_register(CP0_PAGEMASK, PM_4K);
	local_flush_tlb_all();
}
/*
 * This file is subject to the terms and conditions of the GNU General Public
 * License.  See the file "COPYING" in the main directory of this archive
 * for more details.
 *
 * Copyright (C) 1999 Ralf Baechle
 * Copyright (C) 1999 Silicon Graphics, Inc.
 *
 * TLB debugging routines.  These perform horribly slow but can easily be
 * modified for debugging purposes.
 */
#include <linux/linkage.h>
#include <linux/kernel.h>
#include <linux/sched.h>
#include <linux/mm.h>
#include <asm/page.h>
#include <asm/pgtable.h>
#include <asm/ptrace.h>
#include <asm/system.h>

asmlinkage void do_page_fault(struct pt_regs *regs, unsigned long write,
                              unsigned long address);

asmlinkage void tlb_refill_debug(struct pt_regs regs)
{
	show_regs(&regs);
	panic(__FUNCTION__ " called.  This Does Not Happen (TM).");
}

asmlinkage void xtlb_refill_debug(struct pt_regs *regs)
{
	unsigned long addr;
	pgd_t *pgd;
	pmd_t *pmd;
	pte_t *pte;

	addr = regs->cp0_badvaddr & ~((PAGE_SIZE << 1) - 1);
	pgd = pgd_offset(current->active_mm, addr);
	pmd = pmd_offset(pgd, addr);
	pte = pte_offset(pmd, addr);

	set_entrylo0(pte_val(pte[0]) >> 6);
	set_entrylo1(pte_val(pte[1]) >> 6);
	__asm__ __volatile__("nop;nop;nop");

	tlb_write_random();
}

asmlinkage void xtlb_mod_debug(struct pt_regs *regs)
{
	unsigned long addr;

	addr = regs->cp0_badvaddr;
	do_page_fault(regs, 1, addr);
}

asmlinkage void xtlb_tlbl_debug(struct pt_regs *regs)
{
	unsigned long addr;

	addr = regs->cp0_badvaddr;
	do_page_fault(regs, 0, addr);
}

asmlinkage void xtlb_tlbs_debug(struct pt_regs *regs)
{
	unsigned long addr;

	addr = regs->cp0_badvaddr;
	do_page_fault(regs, 1, addr);
}
/*
 * This file is subject to the terms and conditions of the GNU General Public
 * License.  See the file "COPYING" in the main directory of this archive
 * for more details.
 *
 * Copyright (C) 1999 Ralf Baechle
 * Copyright (C) 1999 Silicon Graphics, Inc.
 */
#define __ASSEMBLY__
#include <linux/init.h>
#include <asm/mipsregs.h>
#include <asm/regdef.h>
#include <asm/stackframe.h>

	.macro	__BUILD_cli
	CLI
	.endm

	.macro	__BUILD_sti
	STI
	.endm

	.macro	tlb_handler name interruptible writebit
	NESTED(__\name, PT_SIZE, sp)
	SAVE_ALL
	dmfc0	a2, CP0_BADVADDR
	__BUILD_\interruptible
	li	a1, \writebit
	sd	a2, PT_BVADDR(sp)
	move	a0, sp
	jal	do_page_fault
	j	ret_from_exception
	END(__\name)
	.endm

	tlb_handler	xtlb_mod sti 1
	tlb_handler	xtlb_tlbl sti 0
	tlb_handler	xtlb_tlbs sti 1
/*
 * Copyright (C) 1996 David S. Miller (dm@engr.sgi.com)
 * Copyright (C) 1997, 2001 Ralf Baechle (ralf@gnu.org)
 * Copyright (C) 2000, 2001 Broadcom Corporation
 *
 * This program is free software; you can redistribute it and/or
 * modify it under the terms of the GNU General Public License
 * as published by the Free Software Foundation; either version 2
 * of the License, or (at your option) any later version.
 *
 * This program is distributed in the hope that it will be useful,
 * but WITHOUT ANY WARRANTY; without even the implied warranty of
 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
 * GNU General Public License for more details.
 * 
 * You should have received a copy of the GNU General Public License
 * along with this program; if not, write to the Free Software
 * Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA  02111-1307, USA.
 */ 
#include <asm/mmu_context.h>
#include <asm/bootinfo.h>
#include <asm/cpu.h>

/* Dump the current entry* and pagemask registers */
static inline void dump_cur_tlb_regs(void)
{
	unsigned int entryhihi, entryhilo, entrylo0hi, entrylo0lo, entrylo1hi;
	unsigned int entrylo1lo, pagemask;

	__asm__ __volatile__ (
		".set push             \n"
		".set noreorder        \n"
		"#.set mips64           \n"
		".set mips4            \n"
		".set noat             \n"
		"     tlbr             \n"
		"     dmfc0  $1, $10   \n"
		"     dsrl32 %0, $1, 0 \n"
		"     sra    %1, $1, 0 \n"
		"     dmfc0  $1, $2    \n"
		"     dsrl32 %2, $1, 0 \n"
		"     sra    %3, $1, 0 \n"
		"     dmfc0  $1, $3    \n"
		"     dsrl32 %4, $1, 0 \n"
		"     sra    %5, $1, 0 \n"
		"     mfc0   %6, $5    \n"
		".set pop              \n"
		: "=r" (entryhihi),
		"=r" (entryhilo),
		"=r" (entrylo0hi),
		"=r" (entrylo0lo),
		"=r" (entrylo1hi),
		"=r" (entrylo1lo),
		"=r" (pagemask));
	printk("%08X%08X %08X%08X %08X%08X %08X",
	       entryhihi, entryhilo,
	       entrylo0hi, entrylo0lo,
	       entrylo1hi, entrylo1lo,
	       pagemask);
}

void sb1_dump_tlb(void)
{
	int entry;
	printk("Current TLB registers state:\n"
	       "      EntryHi       EntryLo0          EntryLo1     PageMask  Index\n"
	       "--------------------------------------------------------------------\n");
	dump_cur_tlb_regs();
	printk(" %08X\n", read_32bit_cp0_register(CP0_INDEX));
	printk("\n\nFull TLB Dump:"
	       "Idx      EntryHi       EntryLo0          EntryLo1     PageMask\n"
	       "--------------------------------------------------------------\n");
	for (entry = 0; entry < mips_cpu.tlbsize; entry++) {
		set_index(entry);
		printk("\n%02i ", entry);
		__asm__ __volatile__ (
			".set push             \n"
			"#.set mips64           \n"
			".set mips4           \n"
			"     tlbr             \n"
			".set pop              \n");
		dump_cur_tlb_regs();
	}
	printk("\n");
}

void local_flush_tlb_all(void)
{
	unsigned long flags;
	unsigned long old_ctx;
	int entry;

	__save_and_cli(flags);
	/* Save old context and create impossible VPN2 value */
	old_ctx = (get_entryhi() & 0xff);
	set_entrylo0(0);
	set_entrylo1(0);
	for (entry = 0; entry < mips_cpu.tlbsize; entry++) {
		set_entryhi(KSEG0 + (PAGE_SIZE << 1) * entry);
		set_index(entry);
		tlb_write_indexed();
	}
	set_entryhi(old_ctx);
	__restore_flags(flags);	
}


/*
 * Use a bogus region of memory (starting at 0) to sanitize the TLB's.  
 * Use increments of the maximum page size (16MB), and check for duplicate
 * entries before doing a given write.  Then, when we're safe from collisions
 * with the firmware, go back and give all the entries invalid addresses with
 * the normal flush routine.
 */
void sb1_sanitize_tlb(void)
{
	int entry;
	long addr = 0;

	long inc = 1<<24;  /* 16MB */
	/* Save old context and create impossible VPN2 value */
	set_entrylo0(0);
	set_entrylo1(0);
	for (entry = 0; entry < mips_cpu.tlbsize; entry++) {
		do {
			addr += inc;
			set_entryhi(addr);
			tlb_probe();
		} while ((int)(get_index()) >= 0);
		set_index(entry);
		tlb_write_indexed();
	}
	/* Now that we know we're safe from collisions, we can safely flush
	   the TLB with the "normal" routine. */
	local_flush_tlb_all();
}


void local_flush_tlb_range(struct mm_struct *mm, unsigned long start,
                      unsigned long end)
{
	unsigned long flags;
	int cpu;

	__save_and_cli(flags);
	cpu = smp_processor_id();
	if(CPU_CONTEXT(cpu, mm) != 0) {
		int size;
		size = (end - start + (PAGE_SIZE - 1)) >> PAGE_SHIFT;
		size = (size + 1) >> 1;
		if(size <= (mips_cpu.tlbsize/2)) {
			int oldpid = (get_entryhi() & 0xff);
			int newpid = (CPU_CONTEXT(cpu, mm) & 0xff);

			start &= (PAGE_MASK << 1);
			end += ((PAGE_SIZE << 1) - 1);
			end &= (PAGE_MASK << 1);
			while(start < end) {
				int idx;

				set_entryhi(start | newpid);
				start += (PAGE_SIZE << 1);
				tlb_probe();
				idx = get_index();
				set_entrylo0(0);
				set_entrylo1(0);
				set_entryhi(KSEG0 + (idx << (PAGE_SHIFT+1)));
				if(idx < 0)
					continue;
				tlb_write_indexed();
			}
			set_entryhi(oldpid);
		} else {
			get_new_mmu_context(mm, cpu);
			if (mm == current->active_mm)
				set_entryhi(CPU_CONTEXT(cpu, mm) & 0xff);
		}
	}
	__restore_flags(flags);
}

void local_flush_tlb_page(struct vm_area_struct *vma, unsigned long page)
{
	unsigned long flags;

#ifdef CONFIG_SMP
	/*
	 * This variable is eliminated from CPU_CONTEXT() if SMP isn't defined,
	 * so conditional it to get rid of silly "unused variable" compiler
	 * complaints
	 */
	int cpu = smp_processor_id();
#endif

	__save_and_cli(flags);
	if (CPU_CONTEXT(cpu, vma->vm_mm) != 0) {
		int oldpid, newpid, idx;
#ifdef DEBUG_TLB
		printk("[tlbpage<%d,%08lx>]", CPU_CONTEXT(cpu, vma->vm_mm), page);
#endif
		newpid = (CPU_CONTEXT(cpu, vma->vm_mm) & 0xff);
		page &= (PAGE_MASK << 1);
		oldpid = (get_entryhi() & 0xff);
		set_entryhi	(page | newpid);
		tlb_probe();
		idx = get_index();
		set_entrylo0(0);
		set_entrylo1(0);
		if(idx < 0)
			goto finish;
		/* Make sure all entries differ. */  
		set_entryhi(KSEG0+(idx<<(PAGE_SHIFT+1)));
		tlb_write_indexed();
	finish:
		set_entryhi(oldpid);
	}
	__restore_flags(flags);
}


/* All entries common to a mm share an asid.  To effectively flush
   these entries, we just bump the asid. */
void local_flush_tlb_mm(struct mm_struct *mm)
{
	unsigned long flags;
	int cpu;
	__save_and_cli(flags);
	cpu = smp_processor_id();
	if (CPU_CONTEXT(cpu, mm) != 0) {
		get_new_mmu_context(mm, smp_processor_id());
		if (mm == current->active_mm) {
			set_entryhi(CPU_CONTEXT(cpu, mm) & 0xff);
		}
	}
	__restore_flags(flags);
}

/* Stolen from mips32 routines */

void sb1_update_mmu_cache(struct vm_area_struct *vma, unsigned long address,
                      pte_t pte)
{
	unsigned long flags;
	pgd_t *pgdp;
	pmd_t *pmdp;
	pte_t *ptep;
	int idx, pid;

	/*
	 * Handle debugger faulting in for debugee.
	 */
	if (current->active_mm != vma->vm_mm)
		return;

	__save_and_cli(flags);


	pid = get_entryhi() & 0xff;

#ifdef DEBUG_TLB
	if((pid != (CPU_CONTEXT(cpu, vma->vm_mm) & 0xff)) || (CPU_CONTEXT(cpu, vma->vm_mm) == 0)) {
		printk("update_mmu_cache: Wheee, bogus tlbpid mmpid=%d tlbpid=%d\n",
		       (int) (CPU_CONTEXT(cpu, vma->vm_mm) & 0xff), pid);
	}
#endif

	address &= (PAGE_MASK << 1);
	set_entryhi(address | (pid));
	pgdp = pgd_offset(vma->vm_mm, address);
	tlb_probe();
	pmdp = pmd_offset(pgdp, address);
	idx = get_index();
	ptep = pte_offset(pmdp, address);
	set_entrylo0(pte_val(*ptep++) >> 6);
	set_entrylo1(pte_val(*ptep) >> 6);
	set_entryhi(address | (pid));
	if (idx < 0) {
		tlb_write_random();
	} else {
		tlb_write_indexed();
	}
	set_entryhi(pid);
	__restore_flags(flags);
}

/*
 * This is called from loadmmu.c.  We have to set up all the
 * memory management function pointers, as well as initialize
 * the caches and tlbs
 */
void sb1_tlb_init(void)
{
	u32 config1;

	config1 = read_mips32_cp0_config1();
	mips_cpu.tlbsize = ((config1 >> 25) & 0x3f) + 1;

	/*
	 * We don't know what state the firmware left the TLB's in, so this is
	 * the ultra-conservative way to flush the TLB's and avoid machine
	 * check exceptions due to duplicate TLB entries 
	 */
	sb1_sanitize_tlb();
	_update_mmu_cache = sb1_update_mmu_cache;
}
/*
 * This file is subject to the terms and conditions of the GNU General Public
 * License.  See the file "COPYING" in the main directory of this archive
 * for more details.
 *
 * Copyright (C) 2000 Silicon Graphics, Inc.
 * Written by Ulf Carlsson (ulfc@engr.sgi.com)
 */
#define __ASSEMBLY__
#include <linux/config.h>
#include <linux/init.h>
#include <linux/threads.h>
#include <asm/asm.h>
#include <asm/regdef.h>
#include <asm/mipsregs.h>
#include <asm/pgtable.h>
#include <asm/stackframe.h>

	.data
	.comm	pgd_current, NR_CPUS * 8, 8

	/*
	 * After this macro runs we have a pointer to the pte of the address
	 * that caused the fault in in PTR.
	 */

	.macro	LOAD_PTE2, ptr, tmp
#ifdef CONFIG_SMP
	dmfc0	\tmp, CP0_CONTEXT
	dla	\ptr, pgd_current
	dsrl	\tmp, 23
	daddu	\ptr, \tmp
#else
	dla	\ptr, pgd_current
#endif
	dmfc0	\tmp, CP0_BADVADDR
	ld	\ptr, (\ptr)
	bltz	\tmp, kaddr
	 dsrl	\tmp, (PGDIR_SHIFT-3)		# get pgd offset in bytes
	andi	\tmp, ((PTRS_PER_PGD - 1)<<3)
	daddu	\ptr, \tmp			# add in pgd offset
	dmfc0	\tmp, CP0_BADVADDR
	ld	\ptr, (\ptr)			# get pmd pointer
	dsrl	\tmp, (PMD_SHIFT-3)		# get pmd offset in bytes
	andi	\tmp, ((PTRS_PER_PMD - 1)<<3)
	daddu	\ptr, \tmp			# add in pmd offset
	dmfc0	\tmp, CP0_XCONTEXT
	ld	\ptr, (\ptr)			# get pte pointer
	andi	\tmp, 0xff0			# get pte offset
	daddu	\ptr, \tmp
	.endm

	/*
	 * This places the even/odd pte pair in the page table at the pte
	 * entry pointed to by PTE into ENTRYLO0 and ENTRYLO1.
	 */
	.macro	PTE_RELOAD, pte0, pte1
	dsrl	\pte0, 6			# convert to entrylo0
	dmtc0	\pte0, CP0_ENTRYLO0		# load it
	dsrl	\pte1, 6			# convert to entrylo1
	dmtc0	\pte1, CP0_ENTRYLO1		# load it
	.endm

	.text
	.set	noreorder
	.set	mips3

	__INIT

	.align	5
FEXPORT(except_vec0)
	.set	noat
	PANIC("Unused vector called")
1:	b	1b
	 nop

	/*
	 * TLB refill handler for the R10000.
	 * Attention:  We may only use 32 instructions / 128 bytes.
	 */

	.align	5
LEAF(except_vec1_r10k)
	.set	noat
	LOAD_PTE2 k1 k0
	ld	k0, 0(k1)			# get even pte
	ld	k1, 8(k1)			# get odd pte
	PTE_RELOAD k0 k1
	nop
	tlbwr
	eret
kaddr:
	dla	k0, handle_vmalloc_address	# MAPPED kernel needs this
	jr	k0
	 nop
	END(except_vec1_r10k)

	__FINIT

	.align	5
LEAF(handle_vmalloc_address)
	.set	noat
	/*
	 * First, determine that the address is in/above vmalloc range.
	 */
	dmfc0	k0, CP0_BADVADDR
	dli	k1, VMALLOC_START

	/*
	 * Now find offset into kptbl.
	 */
	dsubu	k0, k0, k1
	dla	k1, kptbl
	dsrl	k0, (PAGE_SHIFT+1)		# get vpn2
	dsll	k0, 4				# byte offset of pte
	daddu	k1, k1, k0

	/*
	 * Determine that fault address is within vmalloc range.
	 */
	dla	k0, ekptbl
	sltu	k0, k1, k0
	beqz	k0, not_vmalloc

	/*
	 * Load cp0 registers.
	 */
	ld	k0, 0(k1)			# get even pte
	ld	k1, 8(k1)			# get odd pte

not_vmalloc:
	PTE_RELOAD k0 k1
	nop
	tlbwr
	eret
	END(handle_vmalloc_address)
#
# Makefile for the IP27 specific kernel interface routines under Linux.
#

.S.s:
	$(CPP) $(CFLAGS) $< -o $*.s
.S.o:
	$(CC) $(CFLAGS) -c $< -o $*.o

O_TARGET = ip27.o

export-objs		= ip27-rtc.o

obj-y	:= ip27-berr.o ip27-console.o ip27-dbe-glue.o ip27-irq.o ip27-init.o \
	   ip27-irq-glue.o ip27-klconfig.o ip27-klnuma.o ip27-memory.o \
	   ip27-nmi.o ip27-pci.o ip27-pci-dma.o ip27-reset.o ip27-setup.o \
	   ip27-timer.o

include $(TOPDIR)/Rules.make
/*
 * This file is subject to the terms and conditions of the GNU General Public
 * License.  See the file "COPYING" in the main directory of this archive
 * for more details.
 *
 * Copyright (C) 1994, 1995, 1996, 1999, 2000 by Ralf Baechle
 * Copyright (C) 1999, 2000 by Silicon Graphics
 */
#include <linux/init.h>
#include <linux/kernel.h>
#include <linux/module.h>

#include <asm/module.h>
#include <asm/sn/addrs.h>
#include <asm/sn/arch.h>
#include <asm/sn/sn0/hub.h>
#include <asm/uaccess.h>
#include <asm/paccess.h>

extern void dump_tlb_addr(unsigned long addr);
extern void dump_tlb_all(void);

extern asmlinkage void handle_ip27_ibe(void);
extern asmlinkage void handle_ip27_dbe(void);

void do_ip27_ibe(struct pt_regs *regs)
{
	printk("Got ibe at 0x%lx\n", regs->cp0_epc);
	show_regs(regs);
	dump_tlb_addr(regs->cp0_epc);
	force_sig(SIGBUS, current);
	while(1);
}

static void dump_hub_information(unsigned long errst0, unsigned long errst1)
{
	static char *err_type[2][8] = {
		{ NULL, "Uncached Partial Read PRERR", "DERR", "Read Timeout",
		  NULL, NULL, NULL, NULL },
		{ "WERR", "Uncached Partial Write", "PWERR", "Write Timeout",
		  NULL, NULL, NULL, NULL }
	};
	int wrb = errst1 & PI_ERR_ST1_WRBRRB_MASK;

	if (!(errst0 & PI_ERR_ST0_VALID_MASK)) {
		printk("Hub does not contain valid error information\n");
		return;
	}

	
	printk("Hub has valid error information:\n");
	if (errst0 & PI_ERR_ST0_OVERRUN_MASK)
		printk("Overrun is set.  Error stack may contain additional "
		       "information.\n");
	printk("Hub error address is %08lx\n",
	       (errst0 & PI_ERR_ST0_ADDR_MASK) >> (PI_ERR_ST0_ADDR_SHFT - 3));
	printk("Incoming message command 0x%lx\n",
	       (errst0 & PI_ERR_ST0_CMD_MASK) >> PI_ERR_ST0_CMD_SHFT);
	printk("Supplemental field of incoming message is 0x%lx\n",
	       (errst0 & PI_ERR_ST0_SUPPL_MASK) >> PI_ERR_ST0_SUPPL_SHFT);
	printk("T5 Rn (for RRB only) is 0x%lx\n",
	       (errst0 & PI_ERR_ST0_REQNUM_MASK) >> PI_ERR_ST0_REQNUM_SHFT);
	printk("Error type is %s\n", err_type[wrb]
	       [(errst0 & PI_ERR_ST0_TYPE_MASK) >> PI_ERR_ST0_TYPE_SHFT]
		? : "invalid");
}

void do_ip27_dbe(struct pt_regs *regs)
{
	unsigned long fixup, errst0, errst1;
	int cpu = LOCAL_HUB_L(PI_CPU_NUM);

	fixup = search_dbe_table(regs->cp0_epc);
	if (fixup) {
		long new_epc;

		new_epc = fixup_exception(dpf_reg, fixup, regs->cp0_epc);
		regs->cp0_epc = new_epc;
		return;
	}

	printk("Slice %c got dbe at 0x%lx\n", 'A' + cpu, regs->cp0_epc);
	printk("Hub information:\n");
	printk("ERR_INT_PEND = 0x%06lx\n", LOCAL_HUB_L(PI_ERR_INT_PEND));
	errst0 = LOCAL_HUB_L(cpu ? PI_ERR_STATUS0_B : PI_ERR_STATUS0_A);
	errst1 = LOCAL_HUB_L(cpu ? PI_ERR_STATUS1_B : PI_ERR_STATUS1_A);
	dump_hub_information(errst0, errst1);
	show_regs(regs);
	dump_tlb_all();
	while(1);
	force_sig(SIGBUS, current);
}

void __init bus_error_init(void)
{
	/* XXX Initialize all the Hub & Bridge error handling here.  */
	int cpu = LOCAL_HUB_L(PI_CPU_NUM);
	int cpuoff = cpu << 8;

	set_except_vector(6, handle_ip27_ibe);
	set_except_vector(7, handle_ip27_dbe);

	LOCAL_HUB_S(PI_ERR_INT_PEND,
	            cpu ? PI_ERR_CLEAR_ALL_B : PI_ERR_CLEAR_ALL_A);
	LOCAL_HUB_S(PI_ERR_INT_MASK_A + cpuoff, 0);
	LOCAL_HUB_S(PI_ERR_STACK_ADDR_A + cpuoff, 0);
	LOCAL_HUB_S(PI_ERR_STACK_SIZE, 0);	/* Disable error stack */
	LOCAL_HUB_S(PI_SYSAD_ERRCHK_EN, PI_SYSAD_CHECK_ALL);
}
/*
 * This file is subject to the terms and conditions of the GNU General Public
 * License.  See the file "COPYING" in the main directory of this archive
 * for more details.
 *
 * Copyright (C) 1994 - 1999 by Ralf Baechle
 * Copyright (C) 1999 Silicon Graphics
 *
 * Low level exception handling
 */
#define __ASSEMBLY__
#include <linux/init.h>
#include <asm/asm.h>
#include <asm/regdef.h>
#include <asm/fpregdef.h>
#include <asm/mipsregs.h>
#include <asm/exception.h>

	BUILD_HANDLER ip27_ibe ip27_ibe cli silent		/* #6  */
	BUILD_HANDLER ip27_dbe ip27_dbe cli silent		/* #7  */
/*
 * This file is subject to the terms and conditions of the GNU General
 * Public License.  See the file "COPYING" in the main directory of this
 * archive for more details.
 *
 * Copyright (C) 2000 - 2001 by Kanoj Sarcar (kanoj@sgi.com)
 * Copyright (C) 2000 - 2001 by Silicon Graphics, Inc.
 */

#include <linux/config.h>
#include <linux/kernel.h>
#include <linux/init.h>
#include <linux/sched.h>
#include <linux/mmzone.h>	/* for numnodes */
#include <linux/mm.h>
#include <asm/cpu.h>
#include <asm/pgalloc.h>
#include <asm/pgtable.h>
#include <asm/sn/types.h>
#include <asm/sn/sn0/addrs.h>
#include <asm/sn/sn0/hubni.h>
#include <asm/sn/sn0/hubio.h>
#include <asm/sn/klconfig.h>
#include <asm/sn/ioc3.h>
#include <asm/mipsregs.h>
#include <asm/sn/gda.h>
#include <asm/sn/intr.h>
#include <asm/current.h>
#include <asm/smp.h>
#include <asm/processor.h>
#include <asm/mmu_context.h>
#include <asm/sn/launch.h>
#include <asm/sn/sn_private.h>
#include <asm/sn/sn0/ip27.h>
#include <asm/sn/mapped_kernel.h>
#include <asm/sn/sn0/addrs.h>
#include <asm/sn/gda.h>

#define CPU_NONE		(cpuid_t)-1

/*
 * The following should work till 64 nodes, ie 128p SN0s.
 */
#define CNODEMASK_CLRALL(p)	(p) = 0
#define CNODEMASK_TSTB(p, bit)	((p) & (1ULL << (bit)))
#define CNODEMASK_SETB(p, bit)	((p) |= 1ULL << (bit))

cpumask_t	boot_cpumask;
hubreg_t	region_mask = 0;
static int	fine_mode = 0;
int		maxcpus;
static spinlock_t hub_mask_lock = SPIN_LOCK_UNLOCKED;
static cnodemask_t hub_init_mask;
static atomic_t numstarted = ATOMIC_INIT(1);
static int router_distance;
nasid_t master_nasid = INVALID_NASID;

cnodeid_t	nasid_to_compact_node[MAX_NASIDS];
nasid_t		compact_to_nasid_node[MAX_COMPACT_NODES];
cnodeid_t	cpuid_to_compact_node[MAXCPUS];
char		node_distances[MAX_COMPACT_NODES][MAX_COMPACT_NODES];

hubreg_t get_region(cnodeid_t cnode)
{
	if (fine_mode)
		return COMPACT_TO_NASID_NODEID(cnode) >> NASID_TO_FINEREG_SHFT;
	else
		return COMPACT_TO_NASID_NODEID(cnode) >> NASID_TO_COARSEREG_SHFT;
}

static void gen_region_mask(hubreg_t *region_mask, int maxnodes)
{
	cnodeid_t cnode;

	(*region_mask) = 0;
	for (cnode = 0; cnode < maxnodes; cnode++) {
		(*region_mask) |= 1ULL << get_region(cnode);
	}
}

int is_fine_dirmode(void)
{
	return (((LOCAL_HUB_L(NI_STATUS_REV_ID) & NSRI_REGIONSIZE_MASK)
		>> NSRI_REGIONSIZE_SHFT) & REGIONSIZE_FINE);
}

nasid_t get_actual_nasid(lboard_t *brd)
{
	klhub_t *hub;

	if (!brd)
		return INVALID_NASID;

	/* find out if we are a completely disabled brd. */
	hub  = (klhub_t *)find_first_component(brd, KLSTRUCT_HUB);
	if (!hub)
		return INVALID_NASID;
	if (!(hub->hub_info.flags & KLINFO_ENABLE))	/* disabled node brd */
		return hub->hub_info.physid;
	else
		return brd->brd_nasid;
}

/* Tweak this for maximum number of CPUs to activate */
static int max_cpus = NR_CPUS;

int do_cpumask(cnodeid_t cnode, nasid_t nasid, cpumask_t *boot_cpumask, 
							int *highest)
{
	static int tot_cpus_found = 0;
	lboard_t *brd;
	klcpu_t *acpu;
	int cpus_found = 0;
	cpuid_t cpuid;

	brd = find_lboard((lboard_t *)KL_CONFIG_INFO(nasid), KLTYPE_IP27);

	do {
		acpu = (klcpu_t *)find_first_component(brd, KLSTRUCT_CPU);
		while (acpu) {
			cpuid = acpu->cpu_info.virtid;
			/* cnode is not valid for completely disabled brds */
			if (get_actual_nasid(brd) == brd->brd_nasid)
				cpuid_to_compact_node[cpuid] = cnode;
			if (cpuid > *highest)
				*highest = cpuid;
			/* Only let it join in if it's marked enabled */
			if ((acpu->cpu_info.flags & KLINFO_ENABLE) &&
						(tot_cpus_found != max_cpus)) {
				CPUMASK_SETB(*boot_cpumask, cpuid);
				cpus_found++;
				tot_cpus_found++;
			}
			acpu = (klcpu_t *)find_component(brd, (klinfo_t *)acpu, 
								KLSTRUCT_CPU);
		}
		brd = KLCF_NEXT(brd);
		if (brd)
			brd = find_lboard(brd,KLTYPE_IP27);
		else
			break;
	} while (brd);

	return cpus_found;
}

cpuid_t cpu_node_probe(cpumask_t *boot_cpumask, int *numnodes)
{
	int i, cpus = 0, highest = 0;
	gda_t *gdap = GDA;
	nasid_t nasid;

	/*
	 * Initialize the arrays to invalid nodeid (-1)
	 */
	for (i = 0; i < MAX_COMPACT_NODES; i++)
		compact_to_nasid_node[i] = INVALID_NASID;
	for (i = 0; i < MAX_NASIDS; i++)
		nasid_to_compact_node[i] = INVALID_CNODEID;
	for (i = 0; i < MAXCPUS; i++)
		cpuid_to_compact_node[i] = INVALID_CNODEID;

	*numnodes = 0;
	for (i = 0; i < MAX_COMPACT_NODES; i++) {
		if ((nasid = gdap->g_nasidtable[i]) == INVALID_NASID) {
			break;
		} else {
			compact_to_nasid_node[i] = nasid;
			nasid_to_compact_node[nasid] = i;
			(*numnodes)++;
			cpus += do_cpumask(i, nasid, boot_cpumask, &highest);
		}
	}

	/*
	 * Cpus are numbered in order of cnodes. Currently, disabled
	 * cpus are not numbered.
	 */

	return(highest + 1);
}

int cpu_enabled(cpuid_t cpu)
{
	if (cpu == CPU_NONE)
		return 0;
	return (CPUMASK_TSTB(boot_cpumask, cpu) != 0);
}

void mlreset (void)
{
	int i;
	void init_topology_matrix(void);
	void dump_topology(void);


	master_nasid = get_nasid();
	fine_mode = is_fine_dirmode();

	/*
	 * Probe for all CPUs - this creates the cpumask and
	 * sets up the mapping tables.
	 */
	CPUMASK_CLRALL(boot_cpumask);
	maxcpus = cpu_node_probe(&boot_cpumask, &numnodes);
	printk("Discovered %d cpus on %d nodes\n", maxcpus, numnodes);

	init_topology_matrix();
	dump_topology();

	gen_region_mask(&region_mask, numnodes);
	CNODEMASK_CLRALL(hub_init_mask);

	setup_replication_mask(numnodes);

	/*
	 * Set all nodes' calias sizes to 8k
	 */
	for (i = 0; i < numnodes; i++) {
		nasid_t nasid;

		nasid = COMPACT_TO_NASID_NODEID(i);

		/*
		 * Always have node 0 in the region mask, otherwise
		 * CALIAS accesses get exceptions since the hub
		 * thinks it is a node 0 address.
		 */
		REMOTE_HUB_S(nasid, PI_REGION_PRESENT, (region_mask | 1));
#ifdef CONFIG_REPLICATE_EXHANDLERS
		REMOTE_HUB_S(nasid, PI_CALIAS_SIZE, PI_CALIAS_SIZE_8K);
#else
		REMOTE_HUB_S(nasid, PI_CALIAS_SIZE, PI_CALIAS_SIZE_0);
#endif

#ifdef LATER
		/*
		 * Set up all hubs to have a big window pointing at
		 * widget 0. Memory mode, widget 0, offset 0
		 */
		REMOTE_HUB_S(nasid, IIO_ITTE(SWIN0_BIGWIN),
			((HUB_PIO_MAP_TO_MEM << IIO_ITTE_IOSP_SHIFT) |
			(0 << IIO_ITTE_WIDGET_SHIFT)));
#endif
	}
}


void intr_clear_bits(nasid_t nasid, volatile hubreg_t *pend, int base_level,
							char *name)
{
	volatile hubreg_t bits;
	int i;

	/* Check pending interrupts */
	if ((bits = HUB_L(pend)) != 0)
		for (i = 0; i < N_INTPEND_BITS; i++)
			if (bits & (1 << i))
				LOCAL_HUB_CLR_INTR(base_level + i);
}
	
void intr_clear_all(nasid_t nasid)
{
	REMOTE_HUB_S(nasid, PI_INT_MASK0_A, 0);
	REMOTE_HUB_S(nasid, PI_INT_MASK0_B, 0);
	REMOTE_HUB_S(nasid, PI_INT_MASK1_A, 0);
	REMOTE_HUB_S(nasid, PI_INT_MASK1_B, 0);
	intr_clear_bits(nasid, REMOTE_HUB_ADDR(nasid, PI_INT_PEND0),
		INT_PEND0_BASELVL, "INT_PEND0");
	intr_clear_bits(nasid, REMOTE_HUB_ADDR(nasid, PI_INT_PEND1),
		INT_PEND1_BASELVL, "INT_PEND1");
}

void sn_mp_setup(void)
{
	cnodeid_t	cnode;
#if 0
	cpuid_t		cpu;
#endif

	for (cnode = 0; cnode < numnodes; cnode++) {
#if 0
		init_platform_nodepda();
#endif
		intr_clear_all(COMPACT_TO_NASID_NODEID(cnode));
	}
#if 0
	for (cpu = 0; cpu < maxcpus; cpu++) {
		init_platform_pda();
	}
#endif
}

void per_hub_init(cnodeid_t cnode)
{
	extern void pcibr_setup(cnodeid_t);
	cnodemask_t	done;
	nasid_t		nasid;

	nasid = COMPACT_TO_NASID_NODEID(cnode);

	spin_lock(&hub_mask_lock);
	/* Test our bit. */
	if (!(done = CNODEMASK_TSTB(hub_init_mask, cnode))) {
		/* Turn our bit on in the mask. */
		CNODEMASK_SETB(hub_init_mask, cnode);
		/*
	 	 * Do the actual initialization if it hasn't been done yet.
	 	 * We don't need to hold a lock for this work.
	 	 */
		/*
		 * Set CRB timeout at 5ms, (< PI timeout of 10ms)
		 */
		REMOTE_HUB_S(nasid, IIO_ICTP, 0x800);
		REMOTE_HUB_S(nasid, IIO_ICTO, 0xff);
		hub_rtc_init(cnode);
		pcibr_setup(cnode); 
#ifdef CONFIG_REPLICATE_EXHANDLERS
		/*
		 * If this is not a headless node initialization, 
		 * copy over the caliased exception handlers.
		 */
		if (get_compact_nodeid() == cnode) {
			extern char except_vec0, except_vec1_r10k;
			extern char except_vec2_generic, except_vec3_generic;

			memcpy((void *)(KSEG0 + 0x100), &except_vec2_generic,
								0x80);
			memcpy((void *)(KSEG0 + 0x180), &except_vec3_generic,
								0x80);
			memcpy((void *)KSEG0, &except_vec0, 0x80);
			memcpy((void *)KSEG0 + 0x080, &except_vec1_r10k, 0x80);
			memcpy((void *)(KSEG0 + 0x100), (void *) KSEG0, 0x80);
			memcpy((void *)(KSEG0 + 0x180), &except_vec3_generic,
								0x100);
			flush_cache_l1();
			flush_cache_l2();
		}
#endif
	}
	spin_unlock(&hub_mask_lock);
}

/*
 * This is similar to hard_smp_processor_id().
 */
cpuid_t getcpuid(void)
{
	klcpu_t *klcpu;

	klcpu = nasid_slice_to_cpuinfo(get_nasid(),LOCAL_HUB_L(PI_CPU_NUM));
	return klcpu->cpu_info.virtid;
}

void per_cpu_init(void)
{
	extern void install_cpu_nmi_handler(int slice);
	extern void load_mmu(void);
	static int is_slave = 0;
	int cpu = smp_processor_id();
	cnodeid_t cnode = get_compact_nodeid();

	TLBMISS_HANDLER_SETUP();
#if 0
	intr_init();
#endif
	clear_cp0_status(ST0_IM);
	per_hub_init(cnode);
	cpu_time_init();
	if (smp_processor_id())	/* master can't do this early, no kmalloc */
		install_cpuintr(cpu);
	/* Install our NMI handler if symmon hasn't installed one. */
	install_cpu_nmi_handler(cputoslice(cpu));
#if 0
	install_tlbintr(cpu);
#endif
	set_cp0_status(SRB_DEV0 | SRB_DEV1);
	if (is_slave) {
		clear_cp0_status(ST0_BEV);
		if (mips_cpu.isa_level == MIPS_CPU_ISA_IV)
			set_cp0_status(ST0_XX);
		set_cp0_status(ST0_KX|ST0_SX|ST0_UX);
		sti();
		load_mmu();
		atomic_inc(&numstarted);
	} else {
		is_slave = 1;
	}
}

cnodeid_t get_compact_nodeid(void)
{
	nasid_t nasid;

	nasid = get_nasid();
	/*
	 * Map the physical node id to a virtual node id (virtual node ids
	 * are contiguous).
	 */
	return NASID_TO_COMPACT_NODEID(nasid);
}

#ifdef CONFIG_SMP

/*
 * Takes as first input the PROM assigned cpu id, and the kernel
 * assigned cpu id as the second.
 */
static void alloc_cpupda(cpuid_t cpu, int cpunum)
{
	cnodeid_t	node;
	nasid_t		nasid;

	node = get_cpu_cnode(cpu);
	nasid = COMPACT_TO_NASID_NODEID(node);

	cputonasid(cpunum) = nasid;
	cputocnode(cpunum) = node;
	cputoslice(cpunum) = get_cpu_slice(cpu);
	cpu_data[cpunum].p_cpuid = cpu;
}

static volatile cpumask_t boot_barrier;

void __init start_secondary(void)
{
	CPUMASK_CLRB(boot_barrier, getcpuid());	/* needs atomicity */
	per_cpu_init();
	per_cpu_trap_init();
#if 0
	ecc_init();
	bte_lateinit();
	init_mfhi_war();
#endif
	local_flush_tlb_all();
	flush_cache_l1();
	flush_cache_l2();
	start_secondary();
}

__init void allowboot(void)
{
	int		num_cpus = 0;
	cpuid_t		cpu, mycpuid = getcpuid();
	cnodeid_t	cnode;
	extern void	smp_bootstrap(void);

	sn_mp_setup();
	/* Master has already done per_cpu_init() */
	install_cpuintr(smp_processor_id());
#if 0
	bte_lateinit();
	ecc_init();
#endif

	replicate_kernel_text(numnodes);
	boot_barrier = boot_cpumask;
	/* Launch slaves. */
	for (cpu = 0; cpu < maxcpus; cpu++) {
		if (cpu == mycpuid) {
			alloc_cpupda(cpu, num_cpus);
			num_cpus++;
			/* We're already started, clear our bit */
			CPUMASK_CLRB(boot_barrier, cpu);
			continue;
		}

		/* Skip holes in CPU space */
		if (CPUMASK_TSTB(boot_cpumask, cpu)) {
			struct task_struct *p;

			/*
			 * The following code is purely to make sure
			 * Linux can schedule processes on this slave.
			 */
			kernel_thread(0, NULL, CLONE_PID);
			p = init_task.prev_task;
			sprintf(p->comm, "%s%d", "Idle", num_cpus);
			init_tasks[num_cpus] = p;
			alloc_cpupda(cpu, num_cpus);
			del_from_runqueue(p);
			p->processor = num_cpus;
			p->cpus_runnable = 1 << num_cpus; /* we schedule the first task manually */
			unhash_process(p);
			/* Attach to the address space of init_task. */
			atomic_inc(&init_mm.mm_count);
			p->active_mm = &init_mm;

			/*
		 	 * Launch a slave into smp_bootstrap().
		 	 * It doesn't take an argument, and we
			 * set sp to the kernel stack of the newly 
			 * created idle process, gp to the proc struct
			 * (so that current-> works).
		 	 */
			LAUNCH_SLAVE(cputonasid(num_cpus),cputoslice(num_cpus), 
				(launch_proc_t)MAPPED_KERN_RW_TO_K0(smp_bootstrap),
				0, (void *)((unsigned long)p + 
				KERNEL_STACK_SIZE - 32), (void *)p);

			/*
			 * Now optimistically set the mapping arrays. We
			 * need to wait here, verify the cpu bo/*
 * linux/arch/m68k/kernel/sys_m68k.c
 *
 * This file contains various random system calls that
 * have a non-standard calling sequence on the Linux/m68k
 * platform.
 */

#include <linux/errno.h>
#include <linux/sched.h>
#include <linux/mm.h>
#include <linux/smp.h>
#include <linux/smp_lock.h>
#include <linux/sem.h>
#include <linux/msg.h>
#include <linux/shm.h>
#include <linux/stat.h>
#include <linux/mman.h>
#include <linux/file.h>
#include <linux/utsname.h>

#include <asm/setup.h>
#include <asm/uaccess.h>
#include <asm/cachectl.h>
#include <asm/traps.h>
#include <asm/ipc.h>
#include <asm/page.h>

/*
 * sys_pipe() is the normal C calling standard for creating
 * a pipe. It's not the way unix traditionally does this, though.
 */
asmlinkage int sys_pipe(unsigned long * fildes)
{
	int fd[2];
	int error;

	error = do_pipe(fd);
	if (!error) {
		if (copy_to_user(fildes, fd, 2*sizeof(int)))
			error = -EFAULT;
	}
	return error;
}

/* common code for old and new mmaps */
static inline long do_mmap2(
	unsigned long addr, unsigned long len,
	unsigned long prot, unsigned long flags,
	unsigned long fd, unsigned long pgoff)
{
	int error = -EBADF;
	struct file * file = NULL;

	flags &= ~(MAP_EXECUTABLE | MAP_DENYWRITE);
	if (!(flags & MAP_ANONYMOUS)) {
		file = fget(fd);
		if (!file)
			goto out;
	}

	down_write(&current->mm->mmap_sem);
	error = do_mmap_pgoff(file, addr, len, prot, flags, pgoff);
	up_write(&current->mm->mmap_sem);

	if (file)
		fput(file);
out:
	return error;
}

asmlinkage long sys_mmap2(unsigned long addr, unsigned long len,
	unsigned long prot, unsigned long flags,
	unsigned long fd, unsigned long pgoff)
{
	return do_mmap2(addr, len, prot, flags, fd, pgoff);
}

/*
 * Perform the select(nd, in, out, ex, tv) and mmap() system
 * calls. Linux/m68k cloned Linux/i386, which didn't use to be able to
 * handle more than 4 system call parameters, so these system calls
 * used a memory block for parameter passing..
 */

struct mmap_arg_struct {
	unsigned long addr;
	unsigned long len;
	unsigned long prot;
	unsigned long flags;
	unsigned long fd;
	unsigned long offset;
};

asmlinkage int old_mmap(struct mmap_arg_struct *arg)
{
	struct mmap_arg_struct a;
	int error = -EFAULT;

	if (copy_from_user(&a, arg, sizeof(a)))
		goto out;

	error = -EINVAL;
	if (a.offset & ~PAGE_MASK)
		goto out;

	a.flags &= ~(MAP_EXECUTABLE | MAP_DENYWRITE);

	error = do_mmap2(a.addr, a.len, a.prot, a.flags, a.fd, a.offset >> PAGE_SHIFT);
out:
	return error;
}

#if 0
struct mmap_arg_struct64 {
	__u32 addr;
	__u32 len;
	__u32 prot;
	__u32 flags;
	__u64 offset; /* 64 bits */
	__u32 fd;
};

asmlinkage long sys_mmap64(struct mmap_arg_struct64 *arg)
{
	int error = -EFAULT;
	struct file * file = NULL;
	struct mmap_arg_struct64 a;
	unsigned long pgoff;

	if (copy_from_user(&a, arg, sizeof(a)))
		return -EFAULT;

	if ((long)a.offset & ~PAGE_MASK)
		return -EINVAL;

	pgoff = a.offset >> PAGE_SHIFT;
	if ((a.offset >> PAGE_SHIFT) != pgoff)
		return -EINVAL;

	if (!(a.flags & MAP_ANONYMOUS)) {
		error = -EBADF;
		file = fget(a.fd);
		if (!file)
			goto out;
	}
	a.flags &= ~(MAP_EXECUTABLE | MAP_DENYWRITE);

	down_write(&current->mm->mmap_sem);
	error = do_mmap_pgoff(file, a.addr, a.len, a.prot, a.flags, pgoff);
	up_write(&current->mm->mmap_sem);
	if (file)
		fput(file);
out:
	return error;
}
#endif

extern asmlinkage int sys_select(int, fd_set *, fd_set *, fd_set *, struct timeval *);

struct sel_arg_struct {
	unsigned long n;
	fd_set *inp, *outp, *exp;
	struct timeval *tvp;
};

asmlinkage int old_select(struct sel_arg_struct *arg)
{
	struct sel_arg_struct a;

	if (copy_from_user(&a, arg, sizeof(a)))
		return -EFAULT;
	/* sys_select() does the appropriate kernel locking */
	return sys_select(a.n, a.inp, a.outp, a.exp, a.tvp);
}

/*
 * sys_ipc() is the de-multiplexer for the SysV IPC calls..
 *
 * This is really horribly ugly.
 */
asmlinkage int sys_ipc (uint call, int first, int second,
			int third, void *ptr, long fifth)
{
	int version, ret;

	version = call >> 16; /* hack for backward compatibility */
	call &= 0xffff;

	if (call <= SEMCTL)
		switch (call) {
		case SEMOP:
			return sys_semop (first, (struct sembuf *)ptr, second);
		case SEMGET:
			return sys_semget (first, second, third);
		case SEMCTL: {
			union semun fourth;
			if (!ptr)
				return -EINVAL;
			if (get_user(fourth.__pad, (void **) ptr))
				return -EFAULT;
			return sys_semctl (first, second, third, fourth);
			}
		default:
			return -EINVAL;
		}
	if (call <= MSGCTL) 
		switch (call) {
		case MSGSND:
			return sys_msgsnd (first, (struct msgbuf *) ptr, 
					  second, third);
		case MSGRCV:
			switch (version) {
			case 0: {
				struct ipc_kludge tmp;
				if (!ptr)
					return -EINVAL;
				if (copy_from_user (&tmp,
						    (struct ipc_kludge *)ptr,
						    sizeof (tmp)))
					return -EFAULT;
				return sys_msgrcv (first, tmp.msgp, second,
						   tmp.msgtyp, third);
				}
			default:
				return sys_msgrcv (first,
						   (struct msgbuf *) ptr,
						   second, fifth, third);
			}
		case MSGGET:
			return sys_msgget ((key_t) first, second);
		case MSGCTL:
			return sys_msgctl (first, second,
					   (struct msqid_ds *) ptr);
		default:
			return -EINVAL;
		}
	if (call <= SHMCTL) 
		switch (call) {
		case SHMAT:
			switch (version) {
			default: {
				ulong raddr;
				ret = sys_shmat (first, (char *) ptr,
						 second, &raddr);
				if (ret)
					return ret;
				return put_user (raddr, (ulong *) third);
			}
			}
		case SHMDT: 
			return sys_shmdt ((char *)ptr);
		case SHMGET:
			return sys_shmget (first, second, third);
		case SHMCTL:
			return sys_shmctl (first, second,
					   (struct shmid_ds *) ptr);
		default:
			return -EINVAL;
		}

	return -EINVAL;
}

asmlinkage int sys_ioperm(unsigned long from, unsigned long num, int on)
{
  return -ENOSYS;
}


/* Convert virtual (user) address VADDR to physical address PADDR */
#define virt_to_phys_040(vaddr)						\
({									\
  unsigned long _mmusr, _paddr;						\
									\
  __asm__ __volatile__ (".chip 68040\n\t"				\
			"ptestr (%1)\n\t"				\
			"movec %%mmusr,%0\n\t"				\
			".chip 68k"					\
			: "=r" (_mmusr)					\
			: "a" (vaddr));					\
  _paddr = (_mmusr & MMU_R_040) ? (_mmusr & PAGE_MASK) : 0;		\
  _paddr;								\
})

static inline int
cache_flush_040 (unsigned long addr, int scope, int cache, unsigned long len)
{
  unsigned long paddr, i;

  switch (scope)
    {
    case FLUSH_SCOPE_ALL:
      switch (cache)
	{
	case FLUSH_CACHE_DATA:
	  /* This nop is needed for some broken versions of the 68040.  */
	  __asm__ __volatile__ ("nop\n\t"
				".chip 68040\n\t"
				"cpusha %dc\n\t"
				".chip 68k");
	  break;
	case FLUSH_CACHE_INSN:
	  __asm__ __volatile__ ("nop\n\t"
				".chip 68040\n\t"
				"cpusha %ic\n\t"
				".chip 68k");
	  break;
	default:
	case FLUSH_CACHE_BOTH:
	  __asm__ __volatile__ ("nop\n\t"
				".chip 68040\n\t"
				"cpusha %bc\n\t"
				".chip 68k");
	  break;
	}
      break;

    case FLUSH_SCOPE_LINE:
      /* Find the physical address of the first mapped page in the
	 address range.  */
      if ((paddr = virt_to_phys_040(addr))) {
        paddr += addr & ~(PAGE_MASK | 15);
        len = (len + (addr & 15) + 15) >> 4;
      } else {
	unsigned long tmp = PAGE_SIZE - (addr & ~PAGE_MASK);

	if (len <= tmp)
	  return 0;
	addr += tmp;
	len -= tmp;
	tmp = PAGE_SIZE;
	for (;;)
	  {
	    if ((paddr = virt_to_phys_040(addr)))
	      break;
	    if (len <= tmp)
	      return 0;
	    addr += tmp;
	    len -= tmp;
	  }
	len = (len + 15) >> 4;
      }
      i = (PAGE_SIZE - (paddr & ~PAGE_MASK)) >> 4;
      while (len--)
	{
	  switch (cache)
	    {
	    case FLUSH_CACHE_DATA:
	      __asm__ __volatile__ ("nop\n\t"
				    ".chip 68040\n\t"
				    "cpushl %%dc,(%0)\n\t"
				    ".chip 68k"
				    : : "a" (paddr));
	      break;
	    case FLUSH_CACHE_INSN:
	      __asm__ __volatile__ ("nop\n\t"
				    ".chip 68040\n\t"
				    "cpushl %%ic,(%0)\n\t"
				    ".chip 68k"
				    : : "a" (paddr));
	      break;
	    default:
	    case FLUSH_CACHE_BOTH:
	      __asm__ __volatile__ ("nop\n\t"
				    ".chip 68040\n\t"
				    "cpushl %%bc,(%0)\n\t"
				    ".chip 68k"
				    : : "a" (paddr));
	      break;
	    }
	  if (!--i && len)
	    {
	      /*
	       * No need to page align here since it is done by
	       * virt_to_phys_040().
	       */
	      addr += PAGE_SIZE;
	      i = PAGE_SIZE / 16;
	      /* Recompute physical address when crossing a page
	         boundary. */
	      for (;;)
		{
		  if ((paddr = virt_to_phys_040(addr)))
		    break;
		  if (len <= i)
		    return 0;
		  len -= i;
		  addr += PAGE_SIZE;
		}
	    }
	  else
	    paddr += 16;
	}
      break;

    default:
    case FLUSH_SCOPE_PAGE:
      len += (addr & ~PAGE_MASK) + (PAGE_SIZE - 1);
      for (len >>= PAGE_SHIFT; len--; addr += PAGE_SIZE)
	{
	  if (!(paddr = virt_to_phys_040(addr)))
	    continue;
	  switch (cache)
	    {
	    case FLUSH_CACHE_DATA:
	      __asm__ __volatile__ ("nop\n\t"
				    ".chip 68040\n\t"
				    "cpushp %%dc,(%0)\n\t"
				    ".chip 68k"
				    : : "a" (paddr));
	      break;
	    case FLUSH_CACHE_INSN:
	      __asm__ __volatile__ ("nop\n\t"
				    ".chip 68040\n\t"
				    "cpushp %%ic,(%0)\n\t"
				    ".chip 68k"
				    : : "a" (paddr));
	      break;
	    default:
	    case FLUSH_CACHE_BOTH:
	      __asm__ __volatile__ ("nop\n\t"
				    ".chip 68040\n\t"
				    "cpushp %%bc,(%0)\n\t"
				    ".chip 68k"
				    : : "a" (paddr));
	      break;
	    }
	}
      break;
    }
  return 0;
}

#define virt_to_phys_060(vaddr)				\
({							\
  unsigned long paddr;					\
  __asm__ __volatile__ (".chip 68060\n\t"		\
			"plpar (%0)\n\t"		\
			".chip 68k"			\
			: "=a" (paddr)			\
			: "0" (vaddr));			\
  (paddr); /* XXX */					\
})

static inline int
cache_flush_060 (unsigned long addr, int scope, int cache, unsigned long len)
{
  unsigned long paddr, i;

  /*
   * 68060 manual says: 
   *  cpush %dc : flush DC, remains valid (with our %cacr setup)
   *  cpush %ic : invalidate IC
   *  cpush %bc : flush DC + invalidate IC
   */
  switch (scope)
    {
    case FLUSH_SCOPE_ALL:
      switch (cache)
	{
	case FLUSH_CACHE_DATA:
	  __asm__ __volatile__ (".chip 68060\n\t"
				"cpusha %dc\n\t"
				".chip 68k");
	  break;
	case FLUSH_CACHE_INSN:
	  __asm__ __volatile__ (".chip 68060\n\t"
				"cpusha %ic\n\t"
				".chip 68k");
	  break;
	default:
	case FLUSH_CACHE_BOTH:
	  __asm__ __volatile__ (".chip 68060\n\t"
				"cpusha %bc\n\t"
				".chip 68k");
	  break;
	}
      break;

    case FLUSH_SCOPE_LINE:
      /* Find the physical address of the first mapped page in the
	 address range.  */
      len += addr & 15;
      addr &= -16;
      if (!(paddr = virt_to_phys_060(addr))) {
	unsigned long tmp = PAGE_SIZE - (addr & ~PAGE_MASK);

	if (len <= tmp)
	  return 0;
	addr += tmp;
	len -= tmp;
	tmp = PAGE_SIZE;
	for (;;)
	  {
	    if ((paddr = virt_to_phys_060(addr)))
	      break;
	    if (len <= tmp)
	      return 0;
	    addr += tmp;
	    len -= tmp;
	  }
      }
      len = (len + 15) >> 4;
      i = (PAGE_SIZE - (paddr & ~PAGE_MASK)) >> 4;
      while (len--)
	{
	  switch (cache)
	    {
	    case FLUSH_CACHE_DATA:
	      __asm__ __volatile__ (".chip 68060\n\t"
				    "cpushl %%dc,(%0)\n\t"
				    ".chip 68k"
				    : : "a" (paddr));
	      break;
	    case FLUSH_CACHE_INSN:
	      __asm__ __volatile__ (".chip 68060\n\t"
				    "cpushl %%ic,(%0)\n\t"
				    ".chip 68k"
				    : : "a" (paddr));
	      break;
	    default:
	    case FLUSH_CACHE_BOTH:
	      __asm__ __volatile__ (".chip 68060\n\t"
				    "cpushl %%bc,(%0)\n\t"
				    ".chip 68k"
				    : : "a" (paddr));
	      break;
	    }
	  if (!--i && len)
	    {

	      /*
	       * We just want to jump to the first cache line
	       * in the next page.
	       */
	      addr += PAGE_SIZE;
	      addr &= PAGE_MASK;

	      i = PAGE_SIZE / 16;
	      /* Recompute physical address when crossing a page
	         boundary. */
	      for (;;)
	        {
	          if ((paddr = virt_to_phys_060(addr)))
	            break;
	          if (len <= i)
	            return 0;
	          len -= i;
	          addr += PAGE_SIZE;
	        }
	    }
	  else
	    paddr += 16;
	}
      break;

    default:
    case FLUSH_SCOPE_PAGE:
      len += (addr & ~PAGE_MASK) + (PAGE_SIZE - 1);
      addr &= PAGE_MASK;	/* Workaround for bug in some
				   revisions of the 68060 */
      for (len >>= PAGE_SHIFT; len--; addr += PAGE_SIZE)
	{
	  if (!(paddr = virt_to_phys_060(addr)))
	    continue;
	  switch (cache)
	    {
	    case FLUSH_CACHE_DATA:
	      __asm__ __volatile__ (".chip 68060\n\t"
				    "cpushp %%dc,(%0)\n\t"
				    ".chip 68k"
				    : : "a" (paddr));
	      break;
	    case FLUSH_CACHE_INSN:
	      __asm__ __volatile__ (".chip 68060\n\t"
				    "cpushp %%ic,(%0)\n\t"
				    ".chip 68k"
				    : : "a" (paddr));
	      break;
	    default:
	    case FLUSH_CACHE_BOTH:
	      __asm__ __volatile__ (".chip 68060\n\t"
				    "cpushp %%bc,(%0)\n\t"
				    ".chip 68k"
				    : : "a" (paddr));
	      break;
	    }
	}
      break;
    }
  return 0;
}

/* sys_cacheflush -- flush (part of) the processor cache.  */
asmlinkage int
sys_cacheflush (unsigned long addr, int scope, int cache, unsigned long len)
{
	struct vm_area_struct *vma;
	int ret = -EINVAL;

	lock_kernel();
	if (scope < FLUSH_SCOPE_LINE || scope > FLUSH_SCOPE_ALL ||
	    cache & ~FLUSH_CACHE_BOTH)
		goto out;

	if (scope == FLUSH_SCOPE_ALL) {
		/* Only the superuser may explicitly flush the whole cache. */
		ret = -EPERM;
		if (!capable(CAP_SYS_ADMIN))
			goto out;
	} else {
		/*
		 * Verify that the specified address region actually belongs
		 * to this process.
		 */
		vma = find_vma (current->mm, addr);
		ret = -EINVAL;
		/* Check for overflow.  */
		if (addr + len < addr)
			goto out;
		if (vma == NULL || addr < vma->vm_start || addr + len > vma->vm_end)
			goto out;
	}

	if (CPU_IS_020_OR_030) {
		if (scope == FLUSH_SCOPE_LINE && len < 256) {
			unsigned long cacr;
			__asm__ ("movec %%cacr, %0" : "=r" (cacr));
			if (cache & FLUSH_CACHE_INSN)
				cacr |= 4;
			if (cache & FLUSH_CACHE_DATA)
				cacr |= 0x400;
			len >>= 2;
			while (len--) {
				__asm__ __volatile__ ("movec %1, %%caar\n\t"
						      "movec %0, %%cacr"
						      : /* no outputs */
						      : "r" (cacr), "r" (addr));
				addr += 4;
			}
		} else {
			/* Flush the whole cache, even if page granularity requested. */
			unsigned long cacr;
			__asm__ ("movec %%cacr, %0" : "=r" (cacr));
			if (cache & FLUSH_CACHE_INSN)
				cacr |= 8;
			if (cache & FLUSH_CACHE_DATA)
				cacr |= 0x800;
			__asm__ __volatile__ ("movec %0, %%cacr" : : "r" (cacr));
		}
		ret = 0;
		goto out;
	} else {
	    /*
	     * 040 or 060: don't blindly trust 'scope', someone could
	     * try to flush a few megs of memory.
	     */

	    if (len>=3*PAGE_SIZE && scope<FLUSH_SCOPE_PAGE)
	        scope=FLUSH_SCOPE_PAGE;
	    if (len>=10*PAGE_SIZE && scope<FLUSH_SCOPE_ALL)
	        scope=FLUSH_SCOPE_ALL;
	    if (CPU_IS_040) {
		ret = cache_flush_040 (addr, scope, cache, len);
	    } else if (CPU_IS_060) {
		ret = cache_flush_060 (addr, scope, cache, len);
	    }
	}
out:
	unlock_kernel();
	return ret;
}

asmlinkage int sys_getpagesize(void)
{
	return PAGE_SIZE;
}

/*
 * Old cruft
 */
asmlinkage int sys_pause(void)
{
	current->state = TASK_INTERRUPTIBLE;
	schedule();
	return -ERESTARTNOHAND;
}
oted up, then
			 * fire up the next cpu.
			 */
			__cpu_number_map[cpu] = num_cpus;
			__cpu_logical_map[num_cpus] = cpu;
			CPUMASK_SETB(cpu_online_map, cpu);
			num_cpus++;
			/*
			 * Wait this cpu to start up and initialize its hub,
			 * and discover the io devices it will control.
			 * 
			 * XXX: We really want to fire up launch all the CPUs
			 * at once.  We have to preserve the order of the
			 * devices on the bridges first though.
			 */
			while(atomic_read(&numstarted) != num_cpus);
		}
	}


#ifdef LATER
	Wait logic goes here.
#endif
	for (cnode = 0; cnode < numnodes; cnode++) {
#if 0
		if (cnodetocpu(cnode) == -1) {
			printk("Initializing headless hub,cnode %d", cnode);
			per_hub_init(cnode);
		}
#endif
	}
#if 0
	cpu_io_setup();
	init_mfhi_war();
#endif
	smp_num_cpus = num_cpus;
}

void __init smp_boot_cpus(void)
{
	extern void allowboot(void);

	init_new_context(current, &init_mm);
	current->processor = 0;
	init_idle();
	smp_tune_scheduling();
	allowboot();
}

#else /* CONFIG_SMP */
void __init start_secondary(void)
{
	/* XXX Why do we need this empty definition at all?  */
}
#endif /* CONFIG_SMP */


#define	rou_rflag	rou_flags

void
router_recurse(klrou_t *router_a, klrou_t *router_b, int depth)
{
	klrou_t *router;
	lboard_t *brd;
	int	port;

	if (router_a->rou_rflag == 1)
		return;

	if (depth >= router_distance)
		return;

	router_a->rou_rflag = 1;

	for (port = 1; port <= MAX_ROUTER_PORTS; port++) {
		if (router_a->rou_port[port].port_nasid == INVALID_NASID)
			continue;

		brd = (lboard_t *)NODE_OFFSET_TO_K0(
			router_a->rou_port[port].port_nasid,
			router_a->rou_port[port].port_offset);

		if (brd->brd_type == KLTYPE_ROUTER) {
			router = (klrou_t *)NODE_OFFSET_TO_K0(NASID_GET(brd), brd->brd_compts[0]);
			if (router == router_b) {
				if (depth < router_distance)
					router_distance = depth;
			}
			else
				router_recurse(router, router_b, depth + 1);
		}
	}

	router_a->rou_rflag = 0;
}

int
node_distance(nasid_t nasid_a, nasid_t nasid_b)
{
	nasid_t nasid;
	cnodeid_t cnode;
	lboard_t *brd, *dest_brd;
	int port;
	klrou_t *router, *router_a = NULL, *router_b = NULL;

	/* Figure out which routers nodes in question are connected to */
	for (cnode = 0; cnode < numnodes; cnode++) {
		nasid = COMPACT_TO_NASID_NODEID(cnode);

		if (nasid == -1) continue;

		brd = find_lboard_class((lboard_t *)KL_CONFIG_INFO(nasid),
					KLTYPE_ROUTER);

		if (!brd)
			continue;

		do {
			if (brd->brd_flags & DUPLICATE_BOARD)
				continue;

			router = (klrou_t *)NODE_OFFSET_TO_K0(NASID_GET(brd), brd->brd_compts[0]);
			router->rou_rflag = 0;

			for (port = 1; port <= MAX_ROUTER_PORTS; port++) {
				if (router->rou_port[port].port_nasid == INVALID_NASID)
					continue;

				dest_brd = (lboard_t *)NODE_OFFSET_TO_K0(
					router->rou_port[port].port_nasid,
					router->rou_port[port].port_offset);

				if (dest_brd->brd_type == KLTYPE_IP27) {
					if (dest_brd->brd_nasid == nasid_a)
						router_a = router;
					if (dest_brd->brd_nasid == nasid_b)
						router_b = router;
				}
			}
			
		} while ( (brd = find_lboard_class(KLCF_NEXT(brd), KLTYPE_ROUTER)) );
	}

	if (router_a == NULL) {
		printk("node_distance: router_a NULL\n");
		return -1;
	}
	if (router_b == NULL) {
		printk("node_distance: router_b NULL\n");
		return -1;
	}

	if (nasid_a == nasid_b)
		return 0;

	if (router_a == router_b)
		return 1;

	router_distance = 100;
	router_recurse(router_a, router_b, 2);

	return router_distance;
}

void
init_topology_matrix(void)
{
	nasid_t nasid, nasid2;
	cnodeid_t row, col;

	for (row = 0; row < MAX_COMPACT_NODES; row++)
		for (col = 0; col < MAX_COMPACT_NODES; col++)
			node_distances[row][col] = -1;

	for (row = 0; row < numnodes; row++) {
		nasid = COMPACT_TO_NASID_NODEID(row);
		for (col = 0; col < numnodes; col++) {
			nasid2 = COMPACT_TO_NASID_NODEID(col);
			node_distances[row][col] = node_distance(nasid, nasid2);
		}
	}
}

void
dump_topology(void)
{
	nasid_t nasid;
	cnodeid_t cnode;
	lboard_t *brd, *dest_brd;
	int port;
	int router_num = 0;
	klrou_t *router;
	cnodeid_t row, col;

	printk("************** Topology ********************\n");

	printk("    ");
	for (col = 0; col < numnodes; col++)
		printk("%02d ", col);
	printk("\n");
	for (row = 0; row < numnodes; row++) {
		printk("%02d  ", row);
		for (col = 0; col < numnodes; col++)
			printk("%2d ", node_distances[row][col]);
		printk("\n");
	}

	for (cnode = 0; cnode < numnodes; cnode++) {
		nasid = COMPACT_TO_NASID_NODEID(cnode);

		if (nasid == -1) continue;

		brd = find_lboard_class((lboard_t *)KL_CONFIG_INFO(nasid),
					KLTYPE_ROUTER);

		if (!brd)
			continue;

		do {
			if (brd->brd_flags & DUPLICATE_BOARD)
				continue;
			printk("Router %d:", router_num);
			router_num++;

			router = (klrou_t *)NODE_OFFSET_TO_K0(NASID_GET(brd), brd->brd_compts[0]);

			for (port = 1; port <= MAX_ROUTER_PORTS; port++) {
				if (router->rou_port[port].port_nasid == INVALID_NASID)
					continue;

				dest_brd = (lboard_t *)NODE_OFFSET_TO_K0(
					router->rou_port[port].port_nasid,
					router->rou_port[port].port_offset);

				if (dest_brd->brd_type == KLTYPE_IP27)
					printk(" %d", dest_brd->brd_nasid);
				if (dest_brd->brd_type == KLTYPE_ROUTER)
					printk(" r");
			}
			printk("\n");
			
		} while ( (brd = find_lboard_class(KLCF_NEXT(brd), KLTYPE_ROUTER)) );
	}
}

#if 0
#define		brd_widgetnum	brd_slot
#define NODE_OFFSET_TO_KLINFO(n,off)    ((klinfo_t*) TO_NODE_CAC(n,off))
void
dump_klcfg(void)
{
	cnodeid_t       cnode;
	int i;
	nasid_t         nasid;
	lboard_t        *lbptr;
	gda_t           *gdap;
	
	gdap = (gda_t *)GDA_ADDR(get_nasid());
	if (gdap->g_magic != GDA_MAGIC) {
		printk("dumpklcfg_cmd: Invalid GDA MAGIC\n");
		return;
	}

	for (cnode = 0; cnode < MAX_COMPACT_NODES; cnode ++) {
		nasid = gdap->g_nasidtable[cnode];

		if (nasid == INVALID_NASID)
			continue;

		printk("\nDumpping klconfig Nasid %d:\n", nasid);
	
		lbptr = KL_CONFIG_INFO(nasid);

		while (lbptr) {
			printk("    %s, Nasid %d, Module %d, widget 0x%x, partition %d, NIC 0x%x lboard 0x%lx",
				"board name here", /* BOARD_NAME(lbptr->brd_type), */
				lbptr->brd_nasid, lbptr->brd_module, 
				lbptr->brd_widgetnum,
				lbptr->brd_partition, 
				(lbptr->brd_nic), lbptr);
			if (lbptr->brd_flags & DUPLICATE_BOARD)
				printk(" -D");
			printk("\n");
			for (i = 0; i < lbptr->brd_numcompts; i++) {
				klinfo_t *kli;
				kli = NODE_OFFSET_TO_KLINFO(NASID_GET(lbptr), lbptr->brd_compts[i]);                       
				printk("        type %2d, flags 0x%04x, diagval %3d, physid %4d, virtid %2d: %s\n", 
					kli->struct_type, 
					kli->flags,
					kli->diagval,
					kli->physid,
					kli->virtid,
					"comp. name here");
					/* COMPONENT_NAME(kli->struct_type)); */
			}
			lbptr = KLCF_NEXT(lbptr);
		}
	}
	printk("\n");

	/* Useful to print router maps also */

	for (cnode = 0; cnode < MAX_COMPACT_NODES; cnode ++) {
		klrou_t *kr;
		int i;

        	nasid = gdap->g_nasidtable[cnode];
        	if (nasid == INVALID_NASID)
            		continue;
        	lbptr = KL_CONFIG_INFO(nasid);

        	while (lbptr) {
			
			lbptr = find_lboard_class(lbptr, KLCLASS_ROUTER);
			if(!lbptr)
				break;
			if (!KL_CONFIG_DUPLICATE_BOARD(lbptr)) {
				printk("%llx -> \n", lbptr->brd_nic);
				kr = (klrou_t *)find_first_component(lbptr,
					KLSTRUCT_ROU);
				for (i = 1; i <= MAX_ROUTER_PORTS; i++) {
					printk("[%d, %llx]; ",
						kr->rou_port[i].port_nasid,
						kr->rou_port[i].port_offset);
				}
				printk("\n");
			}
			lbptr = KLCF_NEXT(lbptr);
        	}
        	printk("\n");
    	}

	dump_topology();
}
#endif

/*
 * ip27-irq.c: Highlevel interrupt handling for IP27 architecture.
 *
 * Copyright (C) 1999, 2000 Ralf Baechle (ralf@gnu.org)
 * Copyright (C) 1999, 2000 Silicon Graphics, Inc.
 * Copyright (C) 1999 - 2001 Kanoj Sarcar
 */
#include <linux/config.h>
#include <linux/init.h>
#include <linux/errno.h>
#include <linux/signal.h>
#include <linux/sched.h>
#include <linux/types.h>
#include <linux/interrupt.h>
#include <linux/ioport.h>
#include <linux/timex.h>
#include <linux/slab.h>
#include <linux/random.h>
#include <linux/smp_lock.h>
#include <linux/kernel_stat.h>
#include <linux/delay.h>

#include <asm/bitops.h>
#include <asm/bootinfo.h>
#include <asm/io.h>
#include <asm/mipsregs.h>
#include <asm/system.h>
#include <asm/irq.h>

#include <asm/ptrace.h>
#include <asm/processor.h>
#include <asm/pci/bridge.h>
#include <asm/sn/sn0/hub.h>
#include <asm/sn/sn0/ip27.h>
#include <asm/sn/addrs.h>
#include <asm/sn/agent.h>
#include <asm/sn/arch.h>
#include <asm/sn/intr.h>
#include <asm/sn/intr_public.h>


#undef DEBUG_IRQ
#ifdef DEBUG_IRQ
#define DBG(x...) printk(x)
#else
#define DBG(x...)
#endif

/* These should die */
unsigned char bus_to_wid[256];	/* widget id for linux pci bus */
unsigned char bus_to_nid[256];	/* nasid for linux pci bus */
unsigned char num_bridges;	/* number of bridges in the system */

/*
 * Linux has a controller-independent x86 interrupt architecture.
 * every controller has a 'controller-template', that is used
 * by the main code to do the right thing. Each driver-visible
 * interrupt source is transparently wired to the apropriate
 * controller. Thus drivers need not be aware of the
 * interrupt-controller.
 *
 * Various interrupt controllers we handle: 8259 PIC, SMP IO-APIC,
 * PIIX4's internal 8259 PIC and SGI's Visual Workstation Cobalt (IO-)APIC.
 * (IO-APICs assumed to be messaging to Pentium local-APICs)
 *
 * the code is designed to be easily extended with new/different
 * interrupt controllers, without having to do assembly magic.
 */

extern asmlinkage void ip27_irq(void);
extern void do_IRQ(int irq, struct pt_regs *regs);

extern int irq_to_bus[], irq_to_slot[], bus_to_cpu[];
int intr_connect_level(int cpu, int bit);
int intr_disconnect_level(int cpu, int bit);

/*
 * There is a single intpend register per node, and we want to have
 * distinct levels for intercpu intrs for both cpus A and B on a node.
 */
int node_level_to_irq[MAX_COMPACT_NODES][PERNODE_LEVELS];

/*
 * use these macros to get the encoded nasid and widget id
 * from the irq value
 */
#define IRQ_TO_BUS(i)			irq_to_bus[(i)]
#define IRQ_TO_CPU(i)			bus_to_cpu[IRQ_TO_BUS(i)]
#define NASID_FROM_PCI_IRQ(i)		bus_to_nid[IRQ_TO_BUS(i)]
#define WID_FROM_PCI_IRQ(i)		bus_to_wid[IRQ_TO_BUS(i)]
#define	SLOT_FROM_PCI_IRQ(i)		irq_to_slot[i]

static inline int alloc_level(cpuid_t cpunum, int irq)
{
	cnodeid_t nodenum = CPUID_TO_COMPACT_NODEID(cpunum);
	int j = LEAST_LEVEL + 3;	/* resched & crosscall entries taken */

	while (++j < PERNODE_LEVELS) {
		if (node_level_to_irq[nodenum][j] == -1) {
			node_level_to_irq[nodenum][j] = irq;
			return j;
		}
	}
	printk("Cpu %ld flooded with devices\n", cpunum);
	while(1);
	return -1;
}

static inline int find_level(cpuid_t *cpunum, int irq)
{
	int j;
	cnodeid_t nodenum = INVALID_CNODEID;

	while (++nodenum < MAX_COMPACT_NODES) {
		j = LEAST_LEVEL + 3;	/* resched & crosscall entries taken */
		while (++j < PERNODE_LEVELS)
			if (node_level_to_irq[nodenum][j] == irq) {
				*cpunum = 0;	/* XXX Fixme */
				return(j);
			}
	}
	printk("Could not identify cpu/level for irq %d\n", irq);
	while(1);
	return(-1);
}

/*
 * Find first bit set
 */
static int ms1bit(unsigned long x)
{
	int b = 0, s;

	s = 16; if (x >> 16 == 0) s = 0; b += s; x >>= s;
	s =  8; if (x >>  8 == 0) s = 0; b += s; x >>= s;
	s =  4; if (x >>  4 == 0) s = 0; b += s; x >>= s;
	s =  2; if (x >>  2 == 0) s = 0; b += s; x >>= s;
	s =  1; if (x >>  1 == 0) s = 0; b += s;

	return b;
}

/*
 * This code is unnecessarily complex, because we do SA_INTERRUPT
 * intr enabling. Basically, once we grab the set of intrs we need
 * to service, we must mask _all_ these interrupts; firstly, to make
 * sure the same intr does not intr again, causing recursion that 
 * can lead to stack overflow. Secondly, we can not just mask the
 * one intr we are do_IRQing, because the non-masked intrs in the
 * first set might intr again, causing multiple servicings of the
 * same intr. This effect is mostly seen for intercpu intrs.
 * Kanoj 05.13.00
 */
void ip27_do_irq(struct pt_regs *regs)
{
	int irq, swlevel;
	hubreg_t pend0, mask0;
	cpuid_t thiscpu = smp_processor_id();
	int pi_int_mask0 = ((cputoslice(thiscpu) == 0) ?
					PI_INT_MASK0_A : PI_INT_MASK0_B);

	/* copied from Irix intpend0() */
	while (((pend0 = LOCAL_HUB_L(PI_INT_PEND0)) & 
				(mask0 = LOCAL_HUB_L(pi_int_mask0))) != 0) {
		pend0 &= mask0;		/* Pick intrs we should look at */
		if (pend0) {
			/* Prevent any of the picked intrs from recursing */
			LOCAL_HUB_S(pi_int_mask0, mask0 & ~(pend0));
			do {
				swlevel = ms1bit(pend0);
				LOCAL_HUB_CLR_INTR(swlevel);
				/* "map" swlevel to irq */
				irq = LEVEL_TO_IRQ(thiscpu, swlevel);
				do_IRQ(irq, regs);
				/* clear bit in pend0 */
				pend0 ^= 1ULL << swlevel;
			} while(pend0);
			/* Now allow the set of serviced intrs again */
			LOCAL_HUB_S(pi_int_mask0, mask0);
			LOCAL_HUB_L(PI_INT_PEND0);
		}
	}
}


/* Startup one of the (PCI ...) IRQs routes over a bridge.  */
static unsigned int startup_bridge_irq(unsigned int irq)
{
	bridgereg_t device;
	bridge_t *bridge;
	int pin, swlevel;
	cpuid_t cpu;
	nasid_t master = NASID_FROM_PCI_IRQ(irq);

	if (irq < BASE_PCI_IRQ)
		return 0;

        bridge = (bridge_t *) NODE_SWIN_BASE(master, WID_FROM_PCI_IRQ(irq));
	pin = SLOT_FROM_PCI_IRQ(irq);
	cpu = IRQ_TO_CPU(irq);

	DBG("bridge_startup(): irq= 0x%x  pin=%d\n", irq, pin);
	/*
	 * "map" irq to a swlevel greater than 6 since the first 6 bits
	 * of INT_PEND0 are taken
	 */
	swlevel = alloc_level(cpu, irq);
	intr_connect_level(cpu, swlevel);

	bridge->b_int_addr[pin].addr = (0x20000 | swlevel | (master << 8));
	bridge->b_int_enable |= (1 << pin);
	/* more stuff in int_enable reg */
	bridge->b_int_enable |= 0x7ffffe00;

	/*
	 * XXX This only works if b_int_device is initialized to 0!
	 * We program the bridge to have a 1:1 mapping between devices
	 * (slots) and intr pins.
	 */
	device = bridge->b_int_device;
	device |= (pin << (pin*3));
	bridge->b_int_device = device;

        bridge->b_widget.w_tflush;                      /* Flush */

        return 0;       /* Never anything pending.  */
}

/* Shutdown one of the (PCI ...) IRQs routes over a bridge.  */
static unsigned int shutdown_bridge_irq(unsigned int irq)
{
	bridge_t *bridge;
	int pin, swlevel;
	cpuid_t cpu;

	if (irq < BASE_PCI_IRQ)
		return 0;

	bridge = (bridge_t *) NODE_SWIN_BASE(NASID_FROM_PCI_IRQ(irq), 
	                                     WID_FROM_PCI_IRQ(irq));
	DBG("bridge_shutdown: irq 0x%x\n", irq);
	pin = SLOT_FROM_PCI_IRQ(irq);

	/*
	 * map irq to a swlevel greater than 6 since the first 6 bits
	 * of INT_PEND0 are taken
	 */
	swlevel = find_level(&cpu, irq);
	intr_disconnect_level(cpu, swlevel);
	LEVEL_TO_IRQ(cpu, swlevel) = -1;

	bridge->b_int_enable &= ~(1 << pin);
	bridge->b_widget.w_tflush;                      /* Flush */

	return 0;       /* Never anything pending.  */
}

static inline void enable_bridge_irq(unsigned int irq)
{
	/* All the braindamage happens magically for us in ip27_do_irq */
}

static void disable_bridge_irq(unsigned int irq)
{
	/* All the braindamage happens magically for us in ip27_do_irq */
}

static void mask_and_ack_bridge_irq(unsigned int irq)
{
	/* All the braindamage happens magically for us in ip27_do_irq */
}

static void end_bridge_irq (unsigned int irq)
{
	if (!(irq_desc[irq].status & (IRQ_DISABLED|IRQ_INPROGRESS)))
		enable_bridge_irq(irq);
}

static struct hw_interrupt_type bridge_irq_type = {
	"bridge",
	startup_bridge_irq,
	shutdown_bridge_irq,
	enable_bridge_irq,
	disable_bridge_irq,
	mask_and_ack_bridge_irq,
	end_bridge_irq
};

void irq_debug(void)
{
	bridge_t *bridge = (bridge_t *) 0x9200000008000000;

	printk("bridge->b_int_status = 0x%x\n", bridge->b_int_status);
	printk("bridge->b_int_enable = 0x%x\n", bridge->b_int_enable);
	printk("PI_INT_PEND0   = 0x%lx\n", LOCAL_HUB_L(PI_INT_PEND0));
	printk("PI_INT_MASK0_A = 0x%lx\n", LOCAL_HUB_L(PI_INT_MASK0_A));
}

void __init init_IRQ(void)
{
	int i;

	set_except_vector(0, ip27_irq);

	/*
	 * Right now the bridge irq is our kitchen sink interrupt type
	 */
	for (i = 0; i <= NR_IRQS; i++) {
		irq_desc[i].status	= IRQ_DISABLED;
		irq_desc[i].action	= 0;
		irq_desc[i].depth	= 1;
		irq_desc[i].handler	= &bridge_irq_type;
	}
}

/*
 * Get values that vary depending on which CPU and bit we're operating on.
 */
static hub_intmasks_t *intr_get_ptrs(cpuid_t cpu, int bit, int *new_bit,
				hubreg_t **intpend_masks, int *ip)
{
	hub_intmasks_t *hub_intmasks;

	hub_intmasks = &cpu_data[cpu].p_intmasks;
	if (bit < N_INTPEND_BITS) {
		*intpend_masks = hub_intmasks->intpend0_masks;
		*ip = 0;
		*new_bit = bit;
	} else {
		*intpend_masks = hub_intmasks->intpend1_masks;
		*ip = 1;
		*new_bit = bit - N_INTPEND_BITS;
	}
	return hub_intmasks;
}

int intr_connect_level(int cpu, int bit)
{
	int ip;
	int slice = cputoslice(cpu);
	volatile hubreg_t *mask_reg;
	hubreg_t *intpend_masks;
	nasid_t nasid = COMPACT_TO_NASID_NODEID(cputocnode(cpu));

	(void)intr_get_ptrs(cpu, bit, &bit, &intpend_masks, &ip);

	/* Make sure it's not already pending when we connect it. */
	REMOTE_HUB_CLR_INTR(nasid, bit + ip * N_INTPEND_BITS);

	intpend_masks[0] |= (1ULL << (u64)bit);

	if (ip == 0) {
		mask_reg = REMOTE_HUB_ADDR(nasid, PI_INT_MASK0_A + 
				PI_INT_MASK_OFFSET * slice);
	} else {
		mask_reg = REMOTE_HUB_ADDR(nasid, PI_INT_MASK1_A + 
				PI_INT_MASK_OFFSET * slice);
	}
	HUB_S(mask_reg, intpend_masks[0]);
	return(0);
}

int intr_disconnect_level(int cpu, int bit)
{
	int ip;
	int slice = cputoslice(cpu);
	volatile hubreg_t *mask_reg;
	hubreg_t *intpend_masks;
	nasid_t nasid = COMPACT_TO_NASID_NODEID(cputocnode(cpu));

	(void)intr_get_ptrs(cpu, bit, &bit, &intpend_masks, &ip);
	intpend_masks[0] &= ~(1ULL << (u64)bit);
	if (ip == 0) {
		mask_reg = REMOTE_HUB_ADDR(nasid, PI_INT_MASK0_A + 
				PI_INT_MASK_OFFSET * slice);
	} else {
		mask_reg = REMOTE_HUB_ADDR(nasid, PI_INT_MASK1_A + 
				PI_INT_MASK_OFFSET * slice);
	}
	HUB_S(mask_reg, intpend_masks[0]);
	return(0);
}


void handle_resched_intr(int irq, void *dev_id, struct pt_regs *regs)
{
	/* Nothing, the return from intr will work for us */
}

#ifdef CONFIG_SMP

void core_send_ipi(int destid, unsigned int action)
{
	int irq;

#if (CPUS_PER_NODE == 2)
	switch (action) {
		case SMP_RESCHEDULE_YOURSELF:
			irq = CPU_RESCHED_A_IRQ;
			break;
		case SMP_CALL_FUNCTION:
			irq = CPU_CALL_A_IRQ;
			break;
		default:
			panic("sendintr");
	}
	irq += cputoslice(destid);

	/*
	 * Convert the compact hub number to the NASID to get the correct
	 * part of the address space.  Then set the interrupt bit associated
	 * with the CPU we want to send the interrupt to.
	 */
	REMOTE_HUB_SEND_INTR(COMPACT_TO_NASID_NODEID(cputocnode(destid)),
			FAST_IRQ_TO_LEVEL(irq));
#else
	<< Bomb!  Must redefine this for more than 2 CPUS. >>
#endif
}

#endif

extern void smp_call_function_interrupt(void);

void install_cpuintr(int cpu)
{
#ifdef CONFIG_SMP
#if (CPUS_PER_NODE == 2)
	static int done = 0;

	/*
	 * This is a hack till we have a pernode irqlist. Currently,
	 * just have the master cpu set up the handlers for the per
	 * cpu irqs.
	 */
	if (done == 0) {
		int j;

		if (request_irq(CPU_RESCHED_A_IRQ, handle_resched_intr, 
							0, "resched", 0))
			panic("intercpu intr unconnectible");
		if (request_irq(CPU_RESCHED_B_IRQ, handle_resched_intr, 
							0, "resched", 0))
			panic("intercpu intr unconnectible");
		if (request_irq(CPU_CALL_A_IRQ, smp_call_function_interrupt,
							0, "callfunc", 0))
			panic("intercpu intr unconnectible");
		if (request_irq(CPU_CALL_B_IRQ, smp_call_function_interrupt,
							0, "callfunc", 0))
			panic("intercpu intr unconnectible");

		for (j = 0; j < PERNODE_LEVELS; j++)
			LEVEL_TO_IRQ(0, j) = -1;
		LEVEL_TO_IRQ(0, FAST_IRQ_TO_LEVEL(CPU_RESCHED_A_IRQ)) = 
							CPU_RESCHED_A_IRQ;
		LEVEL_TO_IRQ(0, FAST_IRQ_TO_LEVEL(CPU_RESCHED_B_IRQ)) = 
							CPU_RESCHED_B_IRQ;
		LEVEL_TO_IRQ(0, FAST_IRQ_TO_LEVEL(CPU_CALL_A_IRQ)) = 
							CPU_CALL_A_IRQ;
		LEVEL_TO_IRQ(0, FAST_IRQ_TO_LEVEL(CPU_CALL_B_IRQ)) = 
							CPU_CALL_B_IRQ;
		for (j = 1; j < MAX_COMPACT_NODES; j++)
			memcpy(&node_level_to_irq[j][0], 
			&node_level_to_irq[0][0], 
			sizeof(node_level_to_irq[0][0])*PERNODE_LEVELS);

		done = 1;
	}

	intr_connect_level(cpu, FAST_IRQ_TO_LEVEL(CPU_RESCHED_A_IRQ + 
							cputoslice(cpu)));
	intr_connect_level(cpu, FAST_IRQ_TO_LEVEL(CPU_CALL_A_IRQ +
							cputoslice(cpu)));
#else /* CPUS_PER_NODE */
#error Must redefine this for more than 2 CPUS.
#endif /* CPUS_PER_NODE */
#endif /* CONFIG_SMP */
}

void install_tlbintr(int cpu)
{
#if 0
	int intr_bit = N_INTPEND_BITS + TLB_INTR_A + cputoslice(cpu);

	intr_connect_level(cpu, intr_bit);
#endif
}
/*
 * Dynamic DMA mapping support.
 *
 * On the Origin there is dynamic DMA address translation for all PCI DMA.
 * However we don't use this facility yet but rely on the 2gb direct
 * mapped DMA window for PCI64.  So consistent alloc/free are merely page
 * allocation/freeing.  The rest of the dynamic DMA mapping interface is
 * implemented in <asm/pci.h>.  So this code will fail with more than
 * 2gb of memory.
 */
#include <linux/types.h>
#include <linux/mm.h>
#include <linux/string.h>
#include <linux/pci.h>
#include <asm/io.h>

void *pci_alloc_consistent(struct pci_dev *hwdev, size_t size,
			   dma_addr_t *dma_handle)
{
	void *ret;
	int gfp = GFP_ATOMIC;
	int order = get_order(size);

	if (hwdev == NULL || hwdev->dma_mask != 0xffffffff)
		gfp |= GFP_DMA;
	ret = (void *)__get_free_pages(gfp, order);

	if (ret != NULL) {
		memset(ret, 0, size);
		*dma_handle = (bus_to_baddr[hwdev->bus->number] | __pa(ret));
	}

	return ret;
}

void pci_free_consistent(struct pci_dev *hwdev, size_t size,
			 void *vaddr, dma_addr_t dma_handle)
{
	free_pages((unsigned long)vaddr, get_order(size));
}

/*
 * Map a single buffer of the indicated size for DMA in streaming mode.
 * The 32-bit bus address to use is returned.
 *
 * Once the device is given the dma address, the device owns this memory
 * until either pci_unmap_single or pci_dma_sync_single is performed.
 */
dma_addr_t pci_map_single(struct pci_dev *hwdev, void *ptr, size_t size,
                          int direction)
{
	if (direction == PCI_DMA_NONE)
		BUG();

	return (bus_to_baddr[hwdev->bus->number] | __pa(ptr));
}

/*
 * Unmap a single streaming mode DMA translation.  The dma_addr and size
 * must match what was provided for in a previous pci_map_single call.  All
 * other usages are undefined.
 *
 * After this call, reads by the cpu to the buffer are guarenteed to see
 * whatever the device wrote there.
 */
void pci_unmap_single(struct pci_dev *hwdev, dma_addr_t dma_addr,
                     size_t size, int direction)
{
	if (direction == PCI_DMA_NONE)
		BUG();

	/* Nothing to do */
}

/*
 * Map a set of buffers described by scatterlist in streaming
 * mode for DMA.  This is the scather-gather version of the
 * above pci_map_single interface.  Here the scatter gather list
 * elements are each tagged with the appropriate dma address
 * and length.  They are obtained via sg_dma_{address,length}(SG).
 *
 * NOTE: An implementation may be able to use a smaller number of
 *       DMA address/length pairs than there are SG table elements.
 *       (for example via virtual mapping capabilities)
 *       The routine returns the number of addr/length pairs actually
 *       used, at most nents.
 *
 * Device ownership issues as mentioned above for pci_map_single are
 * the same here.
 */
int pci_map_sg(struct pci_dev *hwdev, struct scatterlist *sg, int nents,
               int direction)
{
	int i;

	if (direction == PCI_DMA_NONE)
		BUG();

	/* Make sure that gcc doesn't leave the empty loop body.  */
	for (i = 0; i < nents; i++, sg++) {
		sg->address = (char *)(bus_to_baddr[hwdev->bus->number] | __pa(sg->address));
	}

	return nents;
}

/*
 * Unmap a set of streaming mode DMA translations.
 * Again, cpu read rules concerning calls here are the same as for
 * pci_unmap_single() above.
 */
void pci_unmap_sg(struct pci_dev *hwdev, struct scatterlist *sg, int nents,
                  int direction)
{
	if (direction == PCI_DMA_NONE)
		BUG();

	/* Nothing to do */
}

/*
 * Make physical memory consistent for a single
 * streaming mode DMA translation after a transfer.
 *
 * If you perform a pci_map_single() but wish to interrogate the
 * buffer using the cpu, yet do not wish to teardown the PCI dma
 * mapping, you must call this function before doing so.  At the
 * next point you give the PCI dma address back to the card, the
 * device again owns the buffer.
 */
void pci_dma_sync_single(struct pci_dev *hwdev, dma_addr_t dma_handle,
                         size_t size, int direction)
{
	if (direction == PCI_DMA_NONE)
		BUG();
}

/*
 * Make physical memory consistent for a set of streaming
 * mode DMA translations after a transfer.
 *
 * The same as pci_dma_sync_single but for a scatter-gather list,
 * same rules and usage.
 */
void pci_dma_sync_sg(struct pci_dev *hwdev, struct scatterlist *sg,
                     int nelems, int direction)
{
	if (direction == PCI_DMA_NONE)
		BUG();
}
/*
 *  linux/arch/m68k/kernel/time.c
 *
 *  Copyright (C) 1991, 1992, 1995  Linus Torvalds
 *
 * This file contains the m68k-specific time handling details.
 * Most of the stuff is located in the machine specific files.
 *
 * 1997-09-10	Updated NTP code according to technical memorandum Jan '96
 *		"A Kernel Model for Precision Timekeeping" by Dave Mills
 */

#include <linux/config.h> /* CONFIG_HEARTBEAT */
#include <linux/errno.h>
#include <linux/sched.h>
#include <linux/kernel.h>
#include <linux/param.h>
#include <linux/string.h>
#include <linux/mm.h>

#include <asm/machdep.h>
#include <asm/io.h>

#include <linux/timex.h>


static inline int set_rtc_mmss(unsigned long nowtime)
{
  if (mach_set_clock_mmss)
    return mach_set_clock_mmss (nowtime);
  return -1;
}

static inline void do_profile (unsigned long pc)
{
	if (prof_buffer && current->pid) {
		extern int _stext;
		pc -= (unsigned long) &_stext;
		pc >>= prof_shift;
		if (pc < prof_len)
			++prof_buffer[pc];
		else
		/*
		 * Don't ignore out-of-bounds PC values silently,
		 * put them into the last histogram slot, so if
		 * present, they will show up as a sharp peak.
		 */
			++prof_buffer[prof_len-1];
	}
}

/*
 * timer_interrupt() needs to keep up the real-time clock,
 * as well as call the "do_timer()" routine every clocktick
 */
static void timer_interrupt(int irq, void *dummy, struct pt_regs * regs)
{
	/* last time the cmos clock got updated */
	static long last_rtc_update=0;

	do_timer(regs);

	if (!user_mode(regs))
		do_profile(regs->pc);

	/*
	 * If we have an externally synchronized Linux clock, then update
	 * CMOS clock accordingly every ~11 minutes. Set_rtc_mmss() has to be
	 * called as close as possible to 500 ms before the new second starts.
	 */
	if ((time_status & STA_UNSYNC) == 0 &&
	    xtime.tv_sec > last_rtc_update + 660 &&
	    xtime.tv_usec >= 500000 - ((unsigned) tick) / 2 &&
	    xtime.tv_usec <= 500000 + ((unsigned) tick) / 2) {
	  if (set_rtc_mmss(xtime.tv_sec) == 0)
	    last_rtc_update = xtime.tv_sec;
	  else
	    last_rtc_update = xtime.tv_sec - 600; /* do it again in 60 s */
	}
#ifdef CONFIG_HEARTBEAT
	/* use power LED as a heartbeat instead -- much more useful
	   for debugging -- based on the version for PReP by Cort */
	/* acts like an actual heart beat -- ie thump-thump-pause... */
	if (mach_heartbeat) {
	    static unsigned cnt = 0, period = 0, dist = 0;

	    if (cnt == 0 || cnt == dist)
		mach_heartbeat( 1 );
	    else if (cnt == 7 || cnt == dist+7)
		mach_heartbeat( 0 );

	    if (++cnt > period) {
		cnt = 0;
		/* The hyperbolic function below modifies the heartbeat period
		 * length in dependency of the current (5min) load. It goes
		 * through the points f(0)=126, f(1)=86, f(5)=51,
		 * f(inf)->30. */
		period = ((672<<FSHIFT)/(5*avenrun[0]+(7<<FSHIFT))) + 30;
		dist = period / 4;
	    }
	}
#endif /* CONFIG_HEARTBEAT */
}

void time_init(void)
{
	unsigned int year, mon, day, hour, min, sec;

	extern void arch_gettod(int *year, int *mon, int *day, int *hour,
				int *min, int *sec);

	arch_gettod (&year, &mon, &day, &hour, &min, &sec);

	if ((year += 1900) < 1970)
		year += 100;
	xtime.tv_sec = mktime(year, mon, day, hour, min, sec);
	xtime.tv_usec = 0;

	mach_sched_init(timer_interrupt);
}

extern rwlock_t xtime_lock;

/*
 * This version of gettimeofday has near microsecond resolution.
 */
void do_gettimeofday(struct timeval *tv)
{
	extern unsigned long wall_jiffies;
	unsigned long flags;
	unsigned long usec, sec, lost;

	read_lock_irqsave(&xtime_lock, flags);
	usec = mach_gettimeoffset();
	lost = jiffies - wall_jiffies;
	if (lost)
		usec += lost * (1000000/HZ);
	sec = xtime.tv_sec;
	usec += xtime.tv_usec;
	read_unlock_irqrestore(&xtime_lock, flags);

	while (usec >= 1000000) {
		usec -= 1000000;
		sec++;
	}

	tv->tv_sec = sec;
	tv->tv_usec = usec;
}

void do_settimeofday(struct timeval *tv)
{
	write_lock_irq(&xtime_lock);
	/* This is revolting. We need to set the xtime.tv_usec
	 * correctly. However, the value in this location is
	 * is value at the last tick.
	 * Discover what correction gettimeofday
	 * would have done, and then undo it!
	 */
	tv->tv_usec -= mach_gettimeoffset();

	while (tv->tv_usec < 0) {
		tv->tv_usec += 1000000;
		tv->tv_sec--;
	}

	xtime = *tv;
	time_adjust = 0;		/* stop active adjtime() */
	time_status |= STA_UNSYNC;
	time_maxerror = NTP_PHASE_LIMIT;
	time_esterror = NTP_PHASE_LIMIT;
	write_unlock_irq(&xtime_lock);
}
/*
 * WARNING! This file is automatically generated - DO NOT EDIT!
 */

#define TS_MAGICKEY	0x5a5a5a5a
/*
 * bios32.c - PCI BIOS functions for m68k systems.
 *
 * Written by Wout Klaren.
 *
 * Based on the DEC Alpha bios32.c by Dave Rusling and David Mosberger.
 */

#include <linux/config.h>
#include <linux/init.h>
#include <linux/kernel.h>

#if 0
# define DBG_DEVS(args)		printk args
#else
# define DBG_DEVS(args)
#endif

#ifdef CONFIG_PCI

/*
 * PCI support for Linux/m68k. Currently only the Hades is supported.
 *
 * The support for PCI bridges in the DEC Alpha version has
 * been removed in this version.
 */

#include <linux/pci.h>
#include <linux/slab.h>
#include <linux/mm.h>

#include <asm/io.h>
#include <asm/pci.h>
#include <asm/uaccess.h>

#define KB		1024
#define MB		(1024*KB)
#define GB		(1024*MB)

#define MAJOR_REV	0
#define MINOR_REV	5

/*
 * Align VAL to ALIGN, which must be a power of two.
 */

#define ALIGN(val,align)	(((val) + ((align) - 1)) & ~((align) - 1))

#define MAX(val1, val2) 	(((val1) > (val2)) ? val1 : val2)

/*
 * Offsets relative to the I/O and memory base addresses from where resources
 * are allocated.
 */

#define IO_ALLOC_OFFSET		0x00004000
#define MEM_ALLOC_OFFSET	0x04000000

/*
 * Declarations of hardware specific initialisation functions.
 */

extern struct pci_bus_info *init_hades_pci(void);

/*
 * Bus info structure of the PCI bus. A pointer to this structure is
 * put in the sysdata member of the pci_bus structure.
 */

static struct pci_bus_info *bus_info;

static int pci_modify = 1;		/* If set, layout the PCI bus ourself. */
static int skip_vga = 0;		/* If set do not modify base addresses
					   of vga cards.*/
static int disable_pci_burst = 0;	/* If set do not allow PCI bursts. */

static unsigned int io_base;
static unsigned int mem_base;

struct pci_fixup pcibios_fixups[] =
{
	{ 0 }
};

/*
 * static void disable_dev(struct pci_dev *dev)
 *
 * Disable PCI device DEV so that it does not respond to I/O or memory
 * accesses.
 *
 * Parameters:
 *
 * dev	- device to disable.
 */

static void __init disable_dev(struct pci_dev *dev)
{
	struct pci_bus *bus;
	unsigned short cmd;

	if (((dev->class >> 8 == PCI_CLASS_NOT_DEFINED_VGA) ||
	     (dev->class >> 8 == PCI_CLASS_DISPLAY_VGA) ||
	     (dev->class >> 8 == PCI_CLASS_DISPLAY_XGA)) && skip_vga)
		return;

	bus = dev->bus;
	pcibios_read_config_word(bus->number, dev->devfn, PCI_COMMAND, &cmd);

	cmd &= (~PCI_COMMAND_IO & ~PCI_COMMAND_MEMORY & ~PCI_COMMAND_MASTER);
	pcibios_write_config_word(bus->number, dev->devfn, PCI_COMMAND, cmd);
}

/*
 * static void layout_dev(struct pci_dev *dev)
 *
 * Layout memory and I/O for a device.
 *
 * Parameters:
 *
 * device	- device to layout memory and I/O for.
 */

static void __init layout_dev(struct pci_dev *dev)
{
	struct pci_bus *bus;
	unsigned short cmd;
	unsigned int base, mask, size, reg;
	unsigned int alignto;
	int i;

	/*
	 * Skip video cards if requested.
	 */

	if (((dev->class >> 8 == PCI_CLASS_NOT_DEFINED_VGA) ||
	     (dev->class >> 8 == PCI_CLASS_DISPLAY_VGA) ||
	     (dev->class >> 8 == PCI_CLASS_DISPLAY_XGA)) && skip_vga)
		return;

	bus = dev->bus;
	pcibios_read_config_word(bus->number, dev->devfn, PCI_COMMAND, &cmd);

	for (reg = PCI_BASE_ADDRESS_0, i = 0; reg <= PCI_BASE_ADDRESS_5; reg += 4, i++)
	{
		/*
		 * Figure out how much space and of what type this
		 * device wants.
		 */

		pcibios_write_config_dword(bus->number, dev->devfn, reg,
					   0xffffffff);
		pcibios_read_config_dword(bus->number, dev->devfn, reg, &base);

		if (!base)
		{
			/* this base-address register is unused */
			dev->resource[i].start = 0;
			dev->resource[i].end = 0;
			dev->resource[i].flags = 0;
			continue;
		}

		/*
		 * We've read the base address register back after
		 * writing all ones and so now we must decode it.
		 */

		if (base & PCI_BASE_ADDRESS_SPACE_IO)
		{
			/*
			 * I/O space base address register.
			 */

			cmd |= PCI_COMMAND_IO;

			base &= PCI_BASE_ADDRESS_IO_MASK;
			mask = (~base << 1) | 0x1;
			size = (mask & base) & 0xffffffff;

			/*
			 * Align to multiple of size of minimum base.
			 */

			alignto = MAX(0x040, size) ;
			base = ALIGN(io_base, alignto);
			io_base = base + size;
			pcibios_write_config_dword(bus->number, dev->devfn,
						   reg, base | PCI_BASE_ADDRESS_SPACE_IO);

			dev->resource[i].start = base;
			dev->resource[i].end = dev->resource[i].start + size - 1;
			dev->resource[i].flags = IORESOURCE_IO | PCI_BASE_ADDRESS_SPACE_IO;

			DBG_DEVS(("layout_dev: IO address: %lX\n", base));
		}
		else
		{
			unsigned int type;

			/*
			 * Memory space base address register.
			 */

			cmd |= PCI_COMMAND_MEMORY;
			type = base & PCI_BASE_ADDRESS_MEM_TYPE_MASK;
			base &= PCI_BASE_ADDRESS_MEM_MASK;
			mask = (~base << 1) | 0x1;
			size = (mask & base) & 0xffffffff;
			switch (type)
			{
			case PCI_BASE_ADDRESS_MEM_TYPE_32:
			case PCI_BASE_ADDRESS_MEM_TYPE_64:
				break;

			case PCI_BASE_ADDRESS_MEM_TYPE_1M:
				printk("bios32 WARNING: slot %d, function %d "
				       "requests memory below 1MB---don't "
				       "know how to do that.\n",
				       PCI_SLOT(dev->devfn),
				       PCI_FUNC(dev->devfn));
				continue;
			}

			/*
			 * Align to multiple of size of minimum base.
			 */

			alignto = MAX(0x1000, size) ;
			base = ALIGN(mem_base, alignto);
			mem_base = base + size;
			pcibios_write_config_dword(bus->number, dev->devfn,
						   reg, base);

			dev->resource[i].start = base;
			dev->resource[i].end = dev->resource[i].start + size - 1;
			dev->resource[i].flags = IORESOURCE_MEM;

			if (type == PCI_BASE_ADDRESS_MEM_TYPE_64)
			{
				/*
				 * 64-bit address, set the highest 32 bits
				 * to zero.
				 */

				reg += 4;
				pcibios_write_config_dword(bus->number, dev->devfn,
							   reg, 0);

				i++;
				dev->resource[i].start = 0;
				dev->resource[i].end = 0;
				dev->resource[i].flags = 0;
			}
		}
	}

	/*
	 * Enable device:
	 */

	if (dev->class >> 8 == PCI_CLASS_NOT_DEFINED ||
	    dev->class >> 8 == PCI_CLASS_NOT_DEFINED_VGA ||
	    dev->class >> 8 == PCI_CLASS_DISPLAY_VGA ||
	    dev->class >> 8 == PCI_CLASS_DISPLAY_XGA)
	{
		/*
		 * All of these (may) have I/O scattered all around
		 * and may not use i/o-base address registers at all.
		 * So we just have to always enable I/O to these
		 * devices.
		 */
		cmd |= PCI_COMMAND_IO;
	}

	pcibios_write_config_word(bus->number, dev->devfn, PCI_COMMAND,
				  cmd | PCI_COMMAND_MASTER);

	pcibios_write_config_byte(bus->number, dev->devfn, PCI_LATENCY_TIMER,
				  (disable_pci_burst) ? 0 : 32);

	if (bus_info != NULL)
		bus_info->conf_device(bus->number, dev->devfn);	/* Machine dependent configuration. */

	DBG_DEVS(("layout_dev: bus %d  slot 0x%x  VID 0x%x  DID 0x%x  class 0x%x\n",
		  bus->number, PCI_SLOT(dev->devfn), dev->vendor, dev->device, dev->class));
}

/*
 * static void layout_bus(struct pci_bus *bus)
 *
 * Layout memory and I/O for all devices on the given bus.
 *
 * Parameters:
 *
 * bus	- bus.
 */

static void __init layout_bus(struct pci_bus *bus)
{
	unsigned int bio, bmem;
	struct pci_dev *dev;

	DBG_DEVS(("layout_bus: starting bus %d\n", bus->number));

	if (!bus->devices && !bus->children)
		return;

	/*
	 * Align the current bases on appropriate boundaries (4K for
	 * IO and 1MB for memory).
	 */

	bio = io_base = ALIGN(io_base, 4*KB);
	bmem = mem_base = ALIGN(mem_base, 1*MB);

	/*
	 * PCI devices might have been setup by a PCI BIOS emulation
	 * running under TOS. In these cases there is a
	 * window during which two devices may have an overlapping
	 * address range. To avoid this causing trouble, we first
	 * turn off the I/O and memory address decoders for all PCI
	 * devices.  They'll be re-enabled only once all address
	 * decoders are programmed consistently.
	 */

	DBG_DEVS(("layout_bus: disable_dev for bus %d\n", bus->number));

	for (dev = bus->devices; dev; dev = dev->sibling)
	{
		if ((dev->class >> 16 != PCI_BASE_CLASS_BRIDGE) ||
		    (dev->class >> 8 == PCI_CLASS_BRIDGE_PCMCIA))
			disable_dev(dev);
	}

	/*
	 * Allocate space to each device:
	 */

	DBG_DEVS(("layout_bus: starting bus %d devices\n", bus->number));

	for (dev = bus->devices; dev; dev = dev->sibling)
	{
		if ((dev->class >> 16 != PCI_BASE_CLASS_BRIDGE) ||
		    (dev->class >> 8 == PCI_CLASS_BRIDGE_PCMCIA))
			layout_dev(dev);
	}

	DBG_DEVS(("layout_bus: bus %d finished\n", bus->number));
}

/*
 * static void pcibios_fixup(void)
 *
 * Layout memory and I/O of all devices on the PCI bus if 'pci_modify' is
 * true. This might be necessary because not every m68k machine with a PCI
 * bus has a PCI BIOS. This function should be called right after
 * pci_scan_bus() in pcibios_init().
 */

static void __init pcibios_fixup(void)
{
	if (pci_modify)
	{
		/*
		 * Set base addresses for allocation of I/O and memory space.
		 */

		io_base = bus_info->io_space.start + IO_ALLOC_OFFSET;
		mem_base = bus_info->mem_space.start + MEM_ALLOC_OFFSET;

		/*
		 * Scan the tree, allocating PCI memory and I/O space.
		 */

		layout_bus(pci_bus_b(pci_root.next));
	}

	/*
	 * Fix interrupt assignments, etc.
	 */

	bus_info->fixup(pci_modify);
}

/*
 * static void pcibios_claim_resources(struct pci_bus *bus)
 *
 * Claim all resources that are assigned to devices on the given bus.
 *
 * Parameters:
 *
 * bus	- bus.
 */

static void __init pcibios_claim_resources(struct pci_bus *bus)
{
	struct pci_dev *dev;
	int i;

	while (bus)
	{
		for (dev = bus->devices; (dev != NULL); dev = dev->sibling)
		{
			for (i = 0; i < PCI_NUM_RESOURCES; i++)
			{
				struct resource *r = &dev->resource[i];
				struct resource *pr;
				struct pci_bus_info *bus_info = (struct pci_bus_info *) dev->sysdata;

				if ((r->start == 0) || (r->parent != NULL))
					continue;
#if 1
				if (r->flags & IORESOURCE_IO)
					pr = &bus_info->io_space;
				else
					pr = &bus_info->mem_space;
#else
				if (r->flags & IORESOURCE_IO)
					pr = &ioport_resource;
				else
					pr = &iomem_resource;
#endif
				if (request_resource(pr, r) < 0)
				{
					printk(KERN_ERR "PCI: Address space collision on region %d of device %s\n", i, dev->name);
				}
			}
		}

		if (bus->children)
			pcibios_claim_resources(bus->children);

		bus = bus->next;
	}
}

/*
 * int pcibios_assign_resource(struct pci_dev *dev, int i)
 *
 * Assign a new address to a PCI resource.
 *
 * Parameters:
 *
 * dev	- device.
 * i	- resource.
 *
 * Result: 0 if successful.
 */

int __init pcibios_assign_resource(struct pci_dev *dev, int i)
{
	struct resource *r = &dev->resource[i];
	struct resource *pr = pci_find_parent_resource(dev, r);
	unsigned long size = r->end + 1;

	if (!pr)
		return -EINVAL;

	if (r->flags & IORESOURCE_IO)
	{
		if (size > 0x100)
			return -EFBIG;

		if (allocate_resource(pr, r, size, bus_info->io_space.start +
				      IO_ALLOC_OFFSET,  bus_info->io_space.end, 1024))
			return -EBUSY;
	}
	else
	{
		if (allocate_resource(pr, r, size, bus_info->mem_space.start +
				      MEM_ALLOC_OFFSET, bus_info->mem_space.end, size))
			return -EBUSY;
	}

	if (i < 6)
		pci_write_config_dword(dev, PCI_BASE_ADDRESS_0 + 4 * i, r->start);

	return 0;
}

void __init pcibios_fixup_bus(struct pci_bus *bus)
{
	struct pci_dev *dev;
	void *sysdata;

	sysdata = (bus->parent) ? bus->parent->sysdata : bus->sysdata;

	for (dev = bus->devices; (dev != NULL); dev = dev->sibling)
		dev->sysdata = sysdata;
}

void __init pcibios_init(void)
{
	printk("Linux/m68k PCI BIOS32 revision %x.%02x\n", MAJOR_REV, MINOR_REV);

	bus_info = NULL;
#ifdef CONFIG_HADES
	if (MACH_IS_HADES)
		bus_info = init_hades_pci();
#endif
	if (bus_info != NULL)
	{
		printk("PCI: Probing PCI hardware\n");
		pci_scan_bus(0, bus_info->m68k_pci_ops, bus_info);
		pcibios_fixup();
		pcibios_claim_resources(pci_root);
	}
	else
		printk("PCI: No PCI bus detected\n");
}

char * __init pcibios_setup(char *str)
{
	if (!strcmp(str, "nomodify"))
	{
		pci_modify = 0;
		return NULL;
	}
	else if (!strcmp(str, "skipvga"))
	{
		skip_vga = 1;
		return NULL;
	}
	else if (!strcmp(str, "noburst"))
	{
		disable_pci_burst = 1;
		return NULL;
	}

	return str;
}
#endif /* CONFIG_PCI */
/*
 * This program is used to generate definitions needed by
 * assembly language modules.
 *
 * We use the technique used in the OSF Mach kernel code:
 * generate asm statements containing #defines,
 * compile this file to assembler, and then extract the
 * #defines from the assembly-language output.
 */

#include <linux/stddef.h>
#include <linux/sched.h>
#include <linux/kernel_stat.h>
#include <asm/bootinfo.h>
#include <asm/irq.h>
#include <asm/amigahw.h>
#include <video/font.h>

#define DEFINE(sym, val) \
	asm volatile("\n#define " #sym " %c0" : : "i" (val))

int main(void)
{
	/* offsets into the task struct */
	DEFINE(TASK_STATE, offsetof(struct task_struct, state));
	DEFINE(TASK_FLAGS, offsetof(struct task_struct, flags));
	DEFINE(TASK_PTRACE, offsetof(struct task_struct, ptrace));
	DEFINE(TASK_SIGPENDING, offsetof(struct task_struct, sigpending));
	DEFINE(TASK_NEEDRESCHED, offsetof(struct task_struct, need_resched));
	DEFINE(TASK_THREAD, offsetof(struct task_struct, thread));
	DEFINE(TASK_MM, offsetof(struct task_struct, mm));
	DEFINE(TASK_ACTIVE_MM, offsetof(struct task_struct, active_mm));

	/* offsets into the thread struct */
	DEFINE(THREAD_KSP, offsetof(struct thread_struct, ksp));
	DEFINE(THREAD_USP, offsetof(struct thread_struct, usp));
	DEFINE(THREAD_SR, offsetof(struct thread_struct, sr));
	DEFINE(THREAD_FS, offsetof(struct thread_struct, fs));
	DEFINE(THREAD_CRP, offsetof(struct thread_struct, crp));
	DEFINE(THREAD_ESP0, offsetof(struct thread_struct, esp0));
	DEFINE(THREAD_FPREG, offsetof(struct thread_struct, fp));
	DEFINE(THREAD_FPCNTL, offsetof(struct thread_struct, fpcntl));
	DEFINE(THREAD_FPSTATE, offsetof(struct thread_struct, fpstate));

	/* offsets into the pt_regs */
	DEFINE(PT_D0, offsetof(struct pt_regs, d0));
	DEFINE(PT_ORIG_D0, offsetof(struct pt_regs, orig_d0));
	DEFINE(PT_D1, offsetof(struct pt_regs, d1));
	DEFINE(PT_D2, offsetof(struct pt_regs, d2));
	DEFINE(PT_D3, offsetof(struct pt_regs, d3));
	DEFINE(PT_D4, offsetof(struct pt_regs, d4));
	DEFINE(PT_D5, offsetof(struct pt_regs, d5));
	DEFINE(PT_A0, offsetof(struct pt_regs, a0));
	DEFINE(PT_A1, offsetof(struct pt_regs, a1));
	DEFINE(PT_A2, offsetof(struct pt_regs, a2));
	DEFINE(PT_PC, offsetof(struct pt_regs, pc));
	DEFINE(PT_SR, offsetof(struct pt_regs, sr));
	/* bitfields are a bit difficult */
	DEFINE(PT_VECTOR, offsetof(struct pt_regs, pc) + 4);

	/* offsets into the irq_handler struct */
	DEFINE(IRQ_HANDLER, offsetof(struct irq_node, handler));
	DEFINE(IRQ_DEVID, offsetof(struct irq_node, dev_id));
	DEFINE(IRQ_NEXT, offsetof(struct irq_node, next));

	/* offsets into the kernel_stat struct */
	DEFINE(STAT_IRQ, offsetof(struct kernel_stat, irqs));

	/* offsets into the bi_record struct */
	DEFINE(BIR_TAG, offsetof(struct bi_record, tag));
	DEFINE(BIR_SIZE, offsetof(struct bi_record, size));
	DEFINE(BIR_DATA, offsetof(struct bi_record, data));

	/* offsets into fbcon_font_desc (video/font.h) */
	DEFINE(FBCON_FONT_DESC_IDX, offsetof(struct fbcon_font_desc, idx));
	DEFINE(FBCON_FONT_DESC_NAME, offsetof(struct fbcon_font_desc, name));
	DEFINE(FBCON_FONT_DESC_WIDTH, offsetof(struct fbcon_font_desc, width));
	DEFINE(FBCON_FONT_DESC_HEIGHT, offsetof(struct fbcon_font_desc, height));
	DEFINE(FBCON_FONT_DESC_DATA, offsetof(struct fbcon_font_desc, data));
	DEFINE(FBCON_FONT_DESC_PREF, offsetof(struct fbcon_font_desc, pref));

	/* signal defines */
	DEFINE(SIGSEGV, SIGSEGV);
	DEFINE(SEGV_MAPERR, SEGV_MAPERR);
	DEFINE(SIGTRAP, SIGTRAP);
	DEFINE(TRAP_TRACE, TRAP_TRACE);

	/* offsets into the custom struct */
	DEFINE(CUSTOMBASE, &custom);
	DEFINE(C_INTENAR, offsetof(struct CUSTOM, intenar));
	DEFINE(C_INTREQR, offsetof(struct CUSTOM, intreqr));
	DEFINE(C_INTENA, offsetof(struct CUSTOM, intena));
	DEFINE(C_INTREQ, offsetof(struct CUSTOM, intreq));
	DEFINE(C_SERDATR, offsetof(struct CUSTOM, serdatr));
	DEFINE(C_SERDAT, offsetof(struct CUSTOM, serdat));
	DEFINE(C_SERPER, offsetof(struct CUSTOM, serper));
	DEFINE(CIAABASE, &ciaa);
	DEFINE(CIABBASE, &ciab);
	DEFINE(C_PRA, offsetof(struct CIA, pra));
	DEFINE(ZTWOBASE, zTwoBase);

	return 0;
}
/*
 *  Generic semaphore code. Buyer beware. Do your own
 * specific changes in <asm/semaphore-helper.h>
 */

#include <linux/config.h>
#include <linux/sched.h>
#include <asm/semaphore-helper.h>

#ifndef CONFIG_RMW_INSNS
spinlock_t semaphore_wake_lock;
#endif

/*
 * Semaphores are implemented using a two-way counter:
 * The "count" variable is decremented for each process
 * that tries to sleep, while the "waking" variable is
 * incremented when the "up()" code goes to wake up waiting
 * processes.
 *
 * Notably, the inline "up()" and "down()" functions can
 * efficiently test if they need to do any extra work (up
 * needs to do something only if count was negative before
 * the increment operation.
 *
 * waking_non_zero() (from asm/semaphore.h) must execute
 * atomically.
 *
 * When __up() is called, the count was negative before
 * incrementing it, and we need to wake up somebody.
 *
 * This routine adds one to the count of processes that need to
 * wake up and exit.  ALL waiting processes actually wake up but
 * only the one that gets to the "waking" field first will gate
 * through and acquire the semaphore.  The others will go back
 * to sleep.
 *
 * Note that these functions are only called when there is
 * contention on the lock, and as such all this is the
 * "non-critical" part of the whole semaphore business. The
 * critical part is the inline stuff in <asm/semaphore.h>
 * where we want to avoid any extra jumps and calls.
 */
void __up(struct semaphore *sem)
{
	wake_one_more(sem);
	wake_up(&sem->wait);
}

/*
 * Perform the "down" function.  Return zero for semaphore acquired,
 * return negative for signalled out of the function.
 *
 * If called from __down, the return is ignored and the wait loop is
 * not interruptible.  This means that a task waiting on a semaphore
 * using "down()" cannot be killed until someone does an "up()" on
 * the semaphore.
 *
 * If called from __down_interruptible, the return value gets checked
 * upon return.  If the return value is negative then the task continues
 * with the negative value in the return register (it can be tested by
 * the caller).
 *
 * Either form may be used in conjunction with "up()".
 *
 */


#define DOWN_HEAD(task_state)						\
									\
									\
	current->state = (task_state);					\
	add_wait_queue(&sem->wait, &wait);				\
									\
	/*								\
	 * Ok, we're set up.  sem->count is known to be less than zero	\
	 * so we must wait.						\
	 *								\
	 * We can let go the lock for purposes of waiting.		\
	 * We re-acquire it after awaking so as to protect		\
	 * all semaphore operations.					\
	 *								\
	 * If "up()" is called before we call waking_non_zero() then	\
	 * we will catch it right away.  If it is called later then	\
	 * we will have to go through a wakeup cycle to catch it.	\
	 *								\
	 * Multiple waiters contend for the semaphore lock to see	\
	 * who gets to gate through and who has to wait some more.	\
	 */								\
	for (;;) {

#define DOWN_TAIL(task_state)			\
		current->state = (task_state);	\
	}					\
	current->state = TASK_RUNNING;		\
	remove_wait_queue(&sem->wait, &wait);

void __down(struct semaphore * sem)
{
	DECLARE_WAITQUEUE(wait, current);

	DOWN_HEAD(TASK_UNINTERRUPTIBLE)
	if (waking_non_zero(sem))
		break;
	schedule();
	DOWN_TAIL(TASK_UNINTERRUPTIBLE)
}

int __down_interruptible(struct semaphore * sem)
{
	DECLARE_WAITQUEUE(wait, current);
	int ret = 0;

	DOWN_HEAD(TASK_INTERRUPTIBLE)

	ret = waking_non_zero_interruptible(sem, current);
	if (ret)
	{
		if (ret == 1)
			/* ret != 0 only if we get interrupted -arca */
			ret = 0;
		break;
	}
	schedule();
	DOWN_TAIL(TASK_INTERRUPTIBLE)
	return ret;
}

int __down_trylock(struct semaphore * sem)
{
	return waking_non_zero_trylock(sem);
}
/*
 * This file is subject to the terms and conditions of the GNU General Public
 * License.  See the file "COPYING" in the main directory of this archive
 * for more details.
 *
 * Copyright (C) 1999, 2000 Ralf Baechle (ralf@gnu.org)
 * Copyright (C) 1999, 2000 Silicon Graphics, Inc.
 */
#include <linux/init.h>
#include <linux/kernel.h>
#include <linux/pci.h>
#include <asm/sn/arch.h>
#include <asm/pci/bridge.h>
#include <asm/paccess.h>
#include <asm/sn/sn0/ip27.h>
#include <asm/sn/sn0/hub.h>

/*
 * Max #PCI busses we can handle; ie, max #PCI bridges.
 */
#define MAX_PCI_BUSSES		40

/*
 * Max #PCI devices (like scsi controllers) we handle on a bus.
 */
#define MAX_DEVICES_PER_PCIBUS	8

/*
 * No locking needed until PCI initialization is done parallely.
 */
int irqstore[MAX_PCI_BUSSES][MAX_DEVICES_PER_PCIBUS];
int lastirq = BASE_PCI_IRQ;

/*
 * Translate from irq to software PCI bus number and PCI slot.
 */
int irq_to_bus[MAX_PCI_BUSSES * MAX_DEVICES_PER_PCIBUS];
int irq_to_slot[MAX_PCI_BUSSES * MAX_DEVICES_PER_PCIBUS];

/*
 * The Bridge ASIC supports both type 0 and type 1 access.  Type 1 is
 * not really documented, so right now I can't write code which uses it.
 * Therefore we use type 0 accesses for now even though they won't work
 * correcly for PCI-to-PCI bridges.
 */
#define CF0_READ_PCI_CFG(dev,where,value,bm,mask)			\
do {									\
	bridge_t *bridge;                                               \
	int slot = PCI_SLOT(dev->devfn);				\
	int fn = PCI_FUNC(dev->devfn);					\
	volatile u32 *addr;						\
	u32 cf, __bit;							\
	unsigned int bus_id = (unsigned) dev->bus->number;              \
									\
	bridge = (bridge_t *) NODE_SWIN_BASE(bus_to_nid[bus_id],        \
                                             bus_to_wid[bus_id]);       \
                                                                        \
	if (dev->vendor == PCI_VENDOR_ID_SGI				\
	    && dev->device == PCI_DEVICE_ID_SGI_IOC3			\
	    && ((where >= 0x14 && where < 0x40) || (where >= 0x48))) {	\
		*value = 0;						\
		return PCIBIOS_SUCCESSFUL;				\
	}								\
									\
	__bit = (((where) & (bm)) << 3);				\
	addr = &bridge->b_type0_cfg_dev[slot].f[fn].l[where >> 2];	\
	if (get_dbe(cf, addr))						\
		return PCIBIOS_DEVICE_NOT_FOUND;			\
	*value = (cf >> __bit) & (mask);				\
	return PCIBIOS_SUCCESSFUL;					\
} while (0)

static int
pci_conf0_read_config_byte(struct pci_dev *dev, int where, u8 *value)
{
	CF0_READ_PCI_CFG(dev,where,value,3,0xff);
}

static int
pci_conf0_read_config_word(struct pci_dev *dev, int where, u16 *value)
{
	CF0_READ_PCI_CFG(dev,where,value,2,0xffff);
}

static int
pci_conf0_read_config_dword(struct pci_dev *dev, int where, u32 *value)
{
	CF0_READ_PCI_CFG(dev,where,value,0,0xffffffff);
}

#define CF0_WRITE_PCI_CFG(dev,where,value,bm,mask)			\
do {									\
	bridge_t *bridge;                                               \
	int slot = PCI_SLOT(dev->devfn);				\
	int fn = PCI_FUNC(dev->devfn);					\
	volatile u32 *addr;						\
	u32 cf, __bit;							\
	unsigned int bus_id = (unsigned) dev->bus->number;              \
									\
	bridge = (bridge_t *) NODE_SWIN_BASE(bus_to_nid[bus_id],        \
                                             bus_to_wid[bus_id]);       \
                                                                        \
	if (dev->vendor == PCI_VENDOR_ID_SGI				\
	    && dev->device == PCI_DEVICE_ID_SGI_IOC3			\
	    && ((where >= 0x14 && where < 0x40) || (where >= 0x48)))	\
		return PCIBIOS_SUCCESSFUL;				\
									\
	__bit = (((where) & (bm)) << 3);				\
	addr = &bridge->b_type0_cfg_dev[slot].f[fn].l[where >> 2];	\
	if (get_dbe(cf, addr))						\
		return PCIBIOS_DEVICE_NOT_FOUND;			\
	cf &= (~mask);							\
	cf |= (value);							\
	put_dbe(cf, addr);						\
	return PCIBIOS_SUCCESSFUL;					\
} while (0)

static int
pci_conf0_write_config_byte(struct pci_dev *dev, int where, u8 value)
{
	CF0_WRITE_PCI_CFG(dev,where,value,3,0xff);
}

static int
pci_conf0_write_config_word(struct pci_dev *dev, int where, u16 value)
{
	CF0_WRITE_PCI_CFG(dev,where,value,2,0xffff);
}

static int
pci_conf0_write_config_d#
# Makefile for m68k-specific library files..
#

.S.o:
	$(CC) $(AFLAGS) -traditional -c $< -o $@

L_TARGET = lib.a

obj-y		:= ashldi3.o ashrdi3.o lshrdi3.o muldi3.o \
			checksum.o memcmp.o memcpy.o memset.o semaphore.o

include $(TOPDIR)/Rules.make
/*
 * INET		An implementation of the TCP/IP protocol suite for the LINUX
 *		operating system.  INET is implemented using the  BSD Socket
 *		interface as the means of communication with the user level.
 *
 *		IP/TCP/UDP checksumming routines
 *
 * Authors:	Jorge Cwik, <jorge@laser.satlink.net>
 *		Arnt Gulbrandsen, <agulbra@nvg.unit.no>
 *		Tom May, <ftom@netcom.com>
 *		Andreas Schwab, <schwab@issan.informatik.uni-dortmund.de>
 *		Lots of code moved from tcp.c and ip.c; see those files
 *		for more names.
 *
 * 03/02/96	Jes Sorensen, Andreas Schwab, Roman Hodek:
 *		Fixed some nasty bugs, causing some horrible crashes.
 *		A: At some points, the sum (%0) was used as
 *		length-counter instead of the length counter
 *		(%1). Thanks to Roman Hodek for pointing this out.
 *		B: GCC seems to mess up if one uses too many
 *		data-registers to hold input values and one tries to
 *		specify d0 and d1 as scratch registers. Letting gcc
 *		choose these registers itself solves the problem.
 *
 *		This program is free software; you can redistribute it and/or
 *		modify it under the terms of the GNU General Public License
 *		as published by the Free Software Foundation; either version
 *		2 of the License, or (at your option) any later version.
 *
 * 1998/8/31	Andreas Schwab:
 *		Zero out rest of buffer on exception in
 *		csum_partial_copy_from_user.
 */

#include <net/checksum.h>

/*
 * computes a partial checksum, e.g. for TCP/UDP fragments
 */

unsigned int
csum_partial (const unsigned char *buff, int len, unsigned int sum)
{
	unsigned long tmp1, tmp2;
	  /*
	   * Experiments with ethernet and slip connections show that buff
	   * is aligned on either a 2-byte or 4-byte boundary.
	   */
	__asm__("movel %2,%3\n\t"
		"btst #1,%3\n\t"	/* Check alignment */
		"jeq 2f\n\t"
		"subql #2,%1\n\t"	/* buff%4==2: treat first word */
		"jgt 1f\n\t"
		"addql #2,%1\n\t"	/* len was == 2, treat only rest */
		"jra 4f\n"
	     "1:\t"
		"addw %2@+,%0\n\t"	/* add first word to sum */
		"clrl %3\n\t"
		"addxl %3,%0\n"		/* add X bit */
	     "2:\t"
		/* unrolled loop for the main part: do 8 longs at once */
		"movel %1,%3\n\t"	/* save len in tmp1 */
		"lsrl #5,%1\n\t"	/* len/32 */
		"jeq 2f\n\t"		/* not enough... */
		"subql #1,%1\n"
	     "1:\t"
		"movel %2@+,%4\n\t"
		"addxl %4,%0\n\t"
		"movel %2@+,%4\n\t"
		"addxl %4,%0\n\t"
		"movel %2@+,%4\n\t"
		"addxl %4,%0\n\t"
		"movel %2@+,%4\n\t"
		"addxl %4,%0\n\t"
		"movel %2@+,%4\n\t"
		"addxl %4,%0\n\t"
		"movel %2@+,%4\n\t"
		"addxl %4,%0\n\t"
		"movel %2@+,%4\n\t"
		"addxl %4,%0\n\t"
		"movel %2@+,%4\n\t"
		"addxl %4,%0\n\t"
		"dbra %1,1b\n\t"
		"clrl %4\n\t"
		"addxl %4,%0\n\t"	/* add X bit */
		"clrw %1\n\t"
		"subql #1,%1\n\t"
		"jcc 1b\n"
	     "2:\t"
		"movel %3,%1\n\t"	/* restore len from tmp1 */
		"andw #0x1c,%3\n\t"	/* number of rest longs */
		"jeq 4f\n\t"
		"lsrw #2,%3\n\t"
		"subqw #1,%3\n"
	     "3:\t"
		/* loop for rest longs */
		"movel %2@+,%4\n\t"
		"addxl %4,%0\n\t"
		"dbra %3,3b\n\t"
		"clrl %4\n\t"
		"addxl %4,%0\n"		/* add X bit */
	     "4:\t"
		/* now check for rest bytes that do not fit into longs */
		"andw #3,%1\n\t"
		"jeq 7f\n\t"
		"clrl %4\n\t"		/* clear tmp2 for rest bytes */
		"subqw #2,%1\n\t"
		"jlt 5f\n\t"
		"movew %2@+,%4\n\t"	/* have rest >= 2: get word */
		"swap %4\n\t"		/* into bits 16..31 */
		"tstw %1\n\t"		/* another byte? */
		"jeq 6f\n"
	     "5:\t"
		"moveb %2@,%4\n\t"	/* have odd rest: get byte */
		"lslw #8,%4\n\t"	/* into bits 8..15; 16..31 untouched */
	     "6:\t"
		"addl %4,%0\n\t"	/* now add rest long to sum */
		"clrl %4\n\t"
		"addxl %4,%0\n"		/* add X bit */
	     "7:\t"
		: "=d" (sum), "=d" (len), "=a" (buff),
		  "=&d" (tmp1), "=&d" (tmp2)
		: "0" (sum), "1" (len), "2" (buff)
	    );
	return(sum);
}



/*
 * copy from user space while checksumming, with exception handling.
 */

unsigned int
csum_partial_copy_from_user(const char *src, char *dst, int len,
			    int sum, int *csum_err)
{
	/*
	 * GCC doesn't like more than 10 operands for the asm
	 * statements so we have to use tmp2 for the error
	 * code.
	 */
	unsigned long tmp1, tmp2;

	__asm__("movel %2,%4\n\t"
		"btst #1,%4\n\t"	/* Check alignment */
		"jeq 2f\n\t"
		"subql #2,%1\n\t"	/* buff%4==2: treat first word */
		"jgt 1f\n\t"
		"addql #2,%1\n\t"	/* len was == 2, treat only rest */
		"jra 4f\n"
	     "1:\n"
	     "10:\t"
		"movesw %2@+,%4\n\t"	/* add first word to sum */
		"addw %4,%0\n\t"
		"movew %4,%3@+\n\t"
		"clrl %4\n\t"
		"addxl %4,%0\n"		/* add X bit */
	     "2:\t"
		/* unrolled loop for the main part: do 8 longs at once */
		"movel %1,%4\n\t"	/* save len in tmp1 */
		"lsrl #5,%1\n\t"	/* len/32 */
		"jeq 2f\n\t"		/* not enough... */
		"subql #1,%1\n"
	     "1:\n"
	     "11:\t"
		"movesl %2@+,%5\n\t"
		"addxl %5,%0\n\t"
		"movel %5,%3@+\n\t"
	     "12:\t"
		"movesl %2@+,%5\n\t"
		"addxl %5,%0\n\t"
		"movel %5,%3@+\n\t"
	     "13:\t"
		"movesl %2@+,%5\n\t"
		"addxl %5,%0\n\t"
		"movel %5,%3@+\n\t"
	     "14:\t"
		"movesl %2@+,%5\n\t"
		"addxl %5,%0\n\t"
		"movel %5,%3@+\n\t"
	     "15:\t"
		"movesl %2@+,%5\n\t"
		"addxl %5,%0\n\t"
		"movel %5,%3@+\n\t"
	     "16:\t"
		"movesl %2@+,%5\n\t"
		"addxl %5,%0\n\t"
		"movel %5,%3@+\n\t"
	     "17:\t"
		"movesl %2@+,%5\n\t"
		"addxl %5,%0\n\t"
		"movel %5,%3@+\n\t"
	     "18:\t"
		"movesl %2@+,%5\n\t"
		"addxl %5,%0\n\t"
		"movel %5,%3@+\n\t"
		"dbra %1,1b\n\t"
		"clrl %5\n\t"
		"addxl %5,%0\n\t"	/* add X bit */
		"clrw %1\n\t"
		"subql #1,%1\n\t"
		"jcc 1b\n"
	     "2:\t"
		"movel %4,%1\n\t"	/* restore len from tmp1 */
		"andw #0x1c,%4\n\t"	/* number of rest longs */
		"jeq 4f\n\t"
		"lsrw #2,%4\n\t"
		"subqw #1,%4\n"
	     "3:\n"
		/* loop for rest longs */
	     "19:\t"
		"movesl %2@+,%5\n\t"
		"addxl %5,%0\n\t"
		"movel %5,%3@+\n\t"
		"dbra %4,3b\n\t"
		"clrl %5\n\t"
		"addxl %5,%0\n"		/* add X bit */
	     "4:\t"
		/* now check for rest bytes that do not fit into longs */
		"andw #3,%1\n\t"
		"jeq 7f\n\t"
		"clrl %5\n\t"		/* clear tmp2 for rest bytes */
		"subqw #2,%1\n\t"
		"jlt 5f\n\t"
	     "20:\t"
		"movesw %2@+,%5\n\t"	/* have rest >= 2: get word */
		"movew %5,%3@+\n\t"
		"swap %5\n\t"		/* into bits 16..31 */
		"tstw %1\n\t"		/* another byte? */
		"jeq 6f\n"
	     "5:\n"
	     "21:\t"
		"movesb %2@,%5\n\t"	/* have odd rest: get byte */
		"moveb %5,%3@+\n\t"
		"lslw #8,%5\n\t"	/* into bits 8..15; 16..31 untouched */
	     "6:\t"
		"addl %5,%0\n\t"	/* now add rest long to sum */
		"clrl %5\n\t"
		"addxl %5,%0\n\t"	/* add X bit */
	     "7:\t"
		"clrl %5\n"		/* no error - clear return value */
	     "8:\n"
		".section .fixup,\"ax\"\n"
		".even\n"
		/* If any execption occurs zero out the rest.
		   Similarities with the code above are intentional :-) */
	     "90:\t"
		"clrw %3@+\n\t"
		"movel %1,%4\n\t"
		"lsrl #5,%1\n\t"
		"jeq 1f\n\t"
		"subql #1,%1\n"
	     "91:\t"
		"clrl %3@+\n"
	     "92:\t"
		"clrl %3@+\n"
	     "93:\t"
		"clrl %3@+\n"
	     "94:\t"
		"clrl %3@+\n"
	     "95:\t"
		"clrl %3@+\n"
	     "96:\t"
		"clrl %3@+\n"
	     "97:\t"
		"clrl %3@+\n"
	     "98:\t"
		"clrl %3@+\n\t"
		"dbra %1,91b\n\t"
		"clrw %1\n\t"
		"subql #1,%1\n\t"
		"jcc 91b\n"
	     "1:\t"
		"movel %4,%1\n\t"
		"andw #0x1c,%4\n\t"
		"jeq 1f\n\t"
		"lsrw #2,%4\n\t"
		"subqw #1,%4\n"
	     "99:\t"
		"clrl %3@+\n\t"
		"dbra %4,99b\n\t"
	     "1:\t"
		"andw #3,%1\n\t"
		"jeq 9f\n"
	     "100:\t"
		"clrw %3@+\n\t"
		"tstw %1\n\t"
		"jeq 9f\n"
	     "101:\t"
		"clrb %3@+\n"
	     "9:\t"
#define STR(X) STR1(X)
#define STR1(X) #X
		"moveq #-" STR(EFAULT) ",%5\n\t"
		"jra 8b\n"
		".previous\n"
		".section __ex_table,\"a\"\n"
		".long 10b,90b\n"
		".long 11b,91b\n"
		".long 12b,92b\n"
		".long 13b,93b\n"
		".long 14b,94b\n"
		".long 15b,95b\n"
		".long 16b,96b\n"
		".long 17b,97b\n"
		".long 18b,98b\n"
		".long 19b,99b\n"
		".long 20b,100b\n"
		".long 21b,101b\n"
		".previous"
		: "=d" (sum), "=d" (len), "=a" (src), "=a" (dst),
		  "=&d" (tmp1), "=d" (tmp2)
		: "0" (sum), "1" (len), "2" (src), "3" (dst)
	    );

	*csum_err = tmp2;

	return(sum);
}

/*
 * copy from kernel space while checksumming, otherwise like csum_partial
 */

unsigned int
csum_partial_copy(const char *src, char *dst, int len, int sum)
{
	unsigned long tmp1, tmp2;
	__asm__("movel %2,%4\n\t"
		"btst #1,%4\n\t"	/* Check alignment */
		"jeq 2f\n\t"
		"subql #2,%1\n\t"	/* buff%4==2: treat first word */
		"jgt 1f\n\t"
		"addql #2,%1\n\t"	/* len was == 2, treat only rest */
		"jra 4f\n"
	     "1:\t"
		"movew %2@+,%4\n\t"	/* add first word to sum */
		"addw %4,%0\n\t"
		"movew %4,%3@+\n\t"
		"clrl %4\n\t"
		"addxl %4,%0\n"		/* add X bit */
	     "2:\t"
		/* unrolled loop for the main part: do 8 longs at once */
		"movel %1,%4\n\t"	/* save len in tmp1 */
		"lsrl #5,%1\n\t"	/* len/32 */
		"jeq 2f\n\t"		/* not enough... */
		"subql #1,%1\n"
	     "1:\t"
		"movel %2@+,%5\n\t"
		"addxl %5,%0\n\t"
		"movel %5,%3@+\n\t"
		"movel %2@+,%5\n\t"
		"addxl %5,%0\n\t"
		"movel %5,%3@+\n\t"
		"movel %2@+,%5\n\t"
		"addxl %5,%0\n\t"
		"movel %5,%3@+\n\t"
		"movel %2@+,%5\n\t"
		"addxl %5,%0\n\t"
		"movel %5,%3@+\n\t"
		"movel %2@+,%5\n\t"
		"addxl %5,%0\n\t"
		"movel %5,%3@+\n\t"
		"movel %2@+,%5\n\t"
		"addxl %5,%0\n\t"
		"movel %5,%3@+\n\t"
		"movel %2@+,%5\n\t"
		"addxl %5,%0\n\t"
		"movel %5,%3@+\n\t"
		"movel %2@+,%5\n\t"
		"addxl %5,%0\n\t"
		"movel %5,%3@+\n\t"
		"dbra %1,1b\n\t"
		"clrl %5\n\t"
		"addxl %5,%0\n\t"	/* add X bit */
		"clrw %1\n\t"
		"subql #1,%1\n\t"
		"jcc 1b\n"
	     "2:\t"
		"movel %4,%1\n\t"	/* restore len from tmp1 */
		"andw #0x1c,%4\n\t"	/* number of rest longs */
		"jeq 4f\n\t"
		"lsrw #2,%4\n\t"
		"subqw #1,%4\n"
	     "3:\t"
		/* loop for rest longs */
		"movel %2@+,%5\n\t"
		"addxl %5,%0\n\t"
		"movel %5,%3@+\n\t"
		"dbra %4,3b\n\t"
		"clrl %5\n\t"
		"addxl %5,%0\n"		/* add X bit */
	     "4:\t"
		/* now check for rest bytes that do not fit into longs */
		"andw #3,%1\n\t"
		"jeq 7f\n\t"
		"clrl %5\n\t"		/* clear tmp2 for rest bytes */
		"subqw #2,%1\n\t"
		"jlt 5f\n\t"
		"movew %2@+,%5\n\t"	/* have rest >= 2: get word */
		"movew %5,%3@+\n\t"
		"swap %5\n\t"		/* into bits 16..31 */
		"tstw %1\n\t"		/* another byte? */
		"jeq 6f\n"
	     "5:\t"
		"moveb %2@,%5\n\t"	/* have odd rest: get byte */
		"moveb %5,%3@+\n\t"
		"lslw #8,%5\n"		/* into bits 8..15; 16..31 untouched */
	     "6:\t"
		"addl %5,%0\n\t"	/* now add rest long to sum */
		"clrl %5\n\t"
		"addxl %5,%0\n"		/* add X bit */
	     "7:\t"
		: "=d" (sum), "=d" (len), "=a" (src), "=a" (dst),
		  "=&d" (tmp1), "=&d" (tmp2)
		: "0" (sum), "1" (len), "2" (src), "3" (dst)
	    );
    return(sum);
}
#include <linux/types.h>

int memcmp(const void * cs,const void * ct,size_t count)
{
  const unsigned char *su1, *su2;

  for( su1 = cs, su2 = ct; 0 < count; ++su1, ++su2, count--)
    if (*su1 != *su2)
      return((*su1 < *su2) ? -1 : +1);
  return(0);
}
#include <linux/types.h>

void * memcpy(void * to, const void * from, size_t n)
{
  void *xto = to;
  size_t temp, temp1;

  if (!n)
    return xto;
  if ((long) to & 1)
    {
      char *cto = to;
      const char *cfrom = from;
      *cto++ = *cfrom++;
      to = cto;
      from = cfrom;
      n--;
    }
  if (n > 2 && (long) to & 2)
    {
      short *sto = to;
      const short *sfrom = from;
      *sto++ = *sfrom++;
      to = sto;
      from = sfrom;
      n -= 2;
    }
  temp = n >> 2;
  if (temp)
    {
      long *lto = to;
      const long *lfrom = from;

      __asm__ __volatile__("movel %2,%3\n\t"
			   "andw  #7,%3\n\t"
			   "lsrl  #3,%2\n\t"
			   "negw  %3\n\t"
			   "jmp   %%pc@(1f,%3:w:2)\n\t"
			   "4:\t"
			   "movel %0@+,%1@+\n\t"
			   "movel %0@+,%1@+\n\t"
			   "movel %0@+,%1@+\n\t"
			   "movel %0@+,%1@+\n\t"
			   "movel %0@+,%1@+\n\t"
			   "movel %0@+,%1@+\n\t"
			   "movel %0@+,%1@+\n\t"
			   "movel %0@+,%1@+\n\t"
			   "1:\t"
			   "dbra  %2,4b\n\t"
			   "clrw  %2\n\t"
			   "subql #1,%2\n\t"
			   "jpl   4b\n\t"
			   : "=a" (lfrom), "=a" (lto), "=d" (temp),
			   "=&d" (temp1)
			   : "0" (lfrom), "1" (lto), "2" (temp)
			   );
      to = lto;
      from = lfrom;
    }
  if (n & 2)
    {
      short *sto = to;
      const short *sfrom = from;
      *sto++ = *sfrom++;
      to = sto;
      from = sfrom;
    }
  if (n & 1)
    {
      char *cto = to;
      const char *cfrom = from;
      *cto = *cfrom;
    }
  return xto;
}
/* ashrdi3.c extracted from gcc-2.7.2/libgcc2.c which is: */
/* Copyright (C) 1989, 1992, 1993, 1994, 1995 Free Software Foundation, Inc.

This file is part of GNU CC.

GNU CC is free software; you can redistribute it and/or modify
it under the terms of the GNU General Public License as published by
the Free Software Foundation; either version 2, or (at your option)
any later version.

GNU CC is distributed in the hope that it will be useful,
but WITHOUT ANY WARRANTY; without even the implied warranty of
MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
GNU General Public License for more details.

You should have received a copy of the GNU General Public License
along with GNU CC; see the file COPYING.  If not, write to
the Free Software Foundation, 59 Temple Place - Suite 330,
Boston, MA 02111-1307, USA.  */

#define BITS_PER_UNIT 8

typedef 	 int SItype	__attribute__ ((mode (SI)));
typedef unsigned int USItype	__attribute__ ((mode (SI)));
typedef		 int DItype	__attribute__ ((mode (DI)));
typedef int word_type __attribute__ ((mode (__word__)));

struct DIstruct {SItype high, low;};

typedef union
{
  struct DIstruct s;
  DItype ll;
} DIunion;

DItype
__ashrdi3 (DItype u, word_type b)
{
  DIunion w;
  word_type bm;
  DIunion uu;

  if (b == 0)
    return u;

  uu.ll = u;

  bm = (sizeof (SItype) * BITS_PER_UNIT) - b;
  if (bm <= 0)
    {
      /* w.s.high = 1..1 or 0..0 */
      w.s.high = uu.s.high >> (sizeof (SItype) * BITS_PER_UNIT - 1);
      w.s.low = uu.s.high >> -bm;
    }
  else
    {
      USItype carries = (USItype)uu.s.high << bm;
      w.s.high = uu.s.high >> b;
      w.s.low = ((USItype)uu.s.low >> b) | carries;
    }

  return w.ll;
}
#include <linux/types.h>

void * memset(void * s, int c, size_t count)
{
  void *xs = s;
  size_t temp, temp1;

  if (!count)
    return xs;
  c &= 0xff;
  c |= c << 8;
  c |= c << 16;
  if ((long) s & 1)
    {
      char *cs = s;
      *cs++ = c;
      s = cs;
      count--;
    }
  if (count > 2 && (long) s & 2)
    {
      short *ss = s;
      *ss++ = c;
      s = ss;
      count -= 2;
    }
  temp = count >> 2;
  if (temp)
    {
      long *ls = s;

      __asm__ __volatile__("movel %1,%2\n\t"
			   "andw  #7,%2\n\t"
			   "lsrl  #3,%1\n\t"
			   "negw  %2\n\t"
			   "jmp   %%pc@(2f,%2:w:2)\n\t"
			   "1:\t"
			   "movel %3,%0@+\n\t"
			   "movel %3,%0@+\n\t"
			   "movel %3,%0@+\n\t"
			   "movel %3,%0@+\n\t"
			   "movel %3,%0@+\n\t"
			   "movel %3,%0@+\n\t"
			   "movel %3,%0@+\n\t"
			   "movel %3,%0@+\n\t"
			   "2:\t"
			   "dbra  %1,1b\n\t"
			   "clrw  %1\n\t"
			   "subql #1,%1\n\t"
			   "jpl   1b\n\t"
			   : "=a" (ls), "=d" (temp), "=&d" (temp1)
			   : "d" (c), "0" (ls), "1" (temp)
			   );
      s = ls;
    }
  if (count & 2)
    {
      short *ss = s;
      *ss++ = c;
      s = ss;
    }
  if (count & 1)
    {
      char *cs = s;
      *cs = c;
    }
  return xs;
}
/*
 *  linux/arch/m68k/lib/semaphore.S
 *
 *  Copyright (C) 1996  Linus Torvalds
 *
 *  m68k version by Andreas Schwab
 */

#include <linux/linkage.h>
#include <asm/semaphore.h>

/*
 * The semaphore operations have a special calling sequence that
 * allow us to do a simpler in-line version of them. These routines
 * need to convert that sequence back into the C sequence when
 * there is contention on the semaphore.
 */
ENTRY(__down_failed)
	moveml %a0/%d0/%d1,-(%sp)
	movel %a1,-(%sp)
	jbsr SYMBOL_NAME(__down)
	movel (%sp)+,%a1
	moveml (%sp)+,%a0/%d0/%d1
	rts

ENTRY(__down_failed_interruptible)
	movel %a0,-(%sp)
	movel %d1,-(%sp)
	movel %a1,-(%sp)
	jbsr SYMBOL_NAME(__down_interruptible)
	movel (%sp)+,%a1
	movel (%sp)+,%d1
	movel (%sp)+,%a0
	rts

ENTRY(__down_failed_trylock)
	movel %a0,-(%sp)
	movel %d1,-(%sp)
	movel %a1,-(%sp)
	jbsr SYMBOL_NAME(__down_trylock)
	movel (%sp)+,%a1
	movel (%sp)+,%d1
	movel (%sp)+,%a0
	rts

ENTRY(__up_wakeup)
	moveml %a0/%d0/%d1,-(%sp)
	movel %a1,-(%sp)
	jbsr SYMBOL_NAME(__up)
	movel (%sp)+,%a1
	moveml (%sp)+,%a0/%d0/%d1
	rts

/* lshrdi3.c extracted from gcc-2.7.2/libgcc2.c which is: */
/* Copyright (C) 1989, 1992, 1993, 1994, 1995 Free Software Foundation, Inc.

This file is part of GNU CC.

GNU CC is free software; you can redistribute it and/or modify
it under the terms of the GNU General Public License as published by
the Free Software Foundation; either version 2, or (at your option)
any later version.

GNU CC is distributed in the hope that it will be useful,
but WITHOUT ANY WARRANTY; without even the implied warranty of
MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
GNU General Public License for more details.

You should have received a copy of the GNU General Public License
along with GNU CC; see the file COPYING.  If not, write to
the Free Software Foundation, 59 Temple Place - Suite 330,
Boston, MA 02111-1307, USA.  */

#define BITS_PER_UNIT 8

typedef 	 int SItype	__attribute__ ((mode (SI)));
typedef unsigned int USItype	__attribute__ ((mode (SI)));
typedef		 int DItype	__attribute__ ((mode (DI)));
typedef int word_type __attribute__ ((mode (__word__)));

struct DIstruct {SItype high, low;};

typedef union
{
  struct DIstruct s;
  DItype ll;
} DIunion;

DItype
__lshrdi3 (DItype u, word_type b)
{
  DIunion w;
  word_type bm;
  DIunion uu;

  if (b == 0)
    return u;

  uu.ll = u;

  bm = (sizeof (SItype) * BITS_PER_UNIT) - b;
  if (bm <= 0)
    {
      w.s.high = 0;
      w.s.low = (USItype)uu.s.high >> -bm;
    }
  else
    {
      USItype carries = (USItype)uu.s.high << bm;
      w.s.high = (USItype)uu.s.high >> b;
      w.s.low = ((USItype)uu.s.low >> b) | carries;
    }

  return w.ll;
}
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4
ifeq (-D__KERNEL__ -I/home/me/kernel/linux/include -Wall -Wstrict-prototypes -Wno-trigraphs -O2 -fomit-frame-pointer -fno-strict-aliasing -fno-common -pipe -mpreferred-stack-boundary=2 -march=i686,$(strip $(subst $(comma),:,$(CFLAGS) $(EXTRA_CFLAGS) $(CFLAGS_generic.o))))
FILES_FLAGS_UP_TO_DATE += generic.o
endif
/* muldi3.c extracted from gcc-2.7.2.3/libgcc2.c and 
			   gcc-2.7.2.3/longlong.h which is: */
/* Copyright (C) 1989, 1992, 1993, 1994, 1995 Free Software Foundation, Inc.

This file is part of GNU CC.

GNU CC is free software; you can redistribute it and/or modify
it under the terms of the GNU General Public License as published by
the Free Software Foundation; either version 2, or (at your option)
any later version.

GNU CC is distributed in the hope that it will be useful,
but WITHOUT ANY WARRANTY; without even the implied warranty of
MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
GNU General Public License for more details.

You should have received a copy of the GNU General Public License
along with GNU CC; see the file COPYING.  If not, write to
the Free Software Foundation, 59 Temple Place - Suite 330,
Boston, MA 02111-1307, USA.  */

#define BITS_PER_UNIT 8

#define umul_ppmm(w1, w0, u, v) \
  __asm__ ("mulu%.l %3,%1:%0"						\
           : "=d" ((USItype)(w0)),					\
             "=d" ((USItype)(w1))					\
           : "%0" ((USItype)(u)),					\
             "dmi" ((USItype)(v)))

#define __umulsidi3(u, v) \
  ({DIunion __w;							\
    umul_ppmm (__w.s.high, __w.s.low, u, v);				\
    __w.ll; })

typedef 	 int SItype	__attribute__ ((mode (SI)));
typedef unsigned int USItype	__attribute__ ((mode (SI)));
typedef		 int DItype	__attribute__ ((mode (DI)));
typedef int word_type __attribute__ ((mode (__word__)));

struct DIstruct {SItype high, low;};

typedef union
{
  struct DIstruct s;
  DItype ll;
} DIunion;

DItype
__muldi3 (DItype u, DItype v)
{
  DIunion w;
  DIunion uu, vv;

  uu.ll = u,
  vv.ll = v;

  w.ll = __umulsidi3 (uu.s.low, vv.s.low);
  w.s.high += ((USItype) uu.s.low * (USItype) vv.s.high
	       + (USItype) uu.s.high * (USItype) vv.s.low);

  return w.ll;
}
/* ashrdi3.c extracted from gcc-2.95.2/libgcc2.c which is: */
/* Copyright (C) 1989, 92-98, 1999 Free Software Foundation, Inc.

This file is part of GNU CC.

GNU CC is free software; you can redistribute it and/or modify
it under the terms of the GNU General Public License as published by
the Free Software Foundation; either version 2, or (at your option)
any later version.

GNU CC is distributed in the hope that it will be useful,
but WITHOUT ANY WARRANTY; without even the implied warranty of
MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
GNU General Public License for more details.

You should have received a copy of the GNU General Public License
along with GNU CC; see the file COPYING.  If not, write to
the Free Software Foundation, 59 Temple Place - Suite 330,
Boston, MA 02111-1307, USA.  */

#define BITS_PER_UNIT 8

typedef 	 int SItype	__attribute__ ((mode (SI)));
typedef unsigned int USItype	__attribute__ ((mode (SI)));
typedef		 int DItype	__attribute__ ((mode (DI)));
typedef int word_type __attribute__ ((mode (__word__)));

struct DIstruct {SItype high, low;};

typedef union
{
  struct DIstruct s;
  DItype ll;
} DIunion;

DItype
__ashldi3 (DItype u, word_type b)
{
  DIunion w;
  word_type bm;
  DIunion uu;

  if (b == 0)
    return u;

  uu.ll = u;

  bm = (sizeof (SItype) * BITS_PER_UNIT) - b;
  if (bm <= 0)
    {
      w.s.low = 0;
      w.s.high = (USItype)uu.s.low << -bm;
    }
  else
    {
      USItype carries = (USItype)uu.s.low >> bm;
      w.s.low = (USItype)uu.s.low << b;
      w.s.high = ((USItype)uu.s.high << b) | carries;
    }

  return w.ll;
}
#
# Makefile for the linux m68k-specific parts of the memory manager.
#
# Note! Dependencies are done automagically by 'make dep', which also
# removes any old dependencies. DON'T put your own dependencies here
# unless it's something special (ie not a .c file).
#
# Note 2! The CFLAGS definition is now in the main makefile...

O_TARGET := mm.o

obj-y		:= init.o fault.o extable.o hwtest.o

ifndef CONFIG_SUN3
obj-y		+= kmap.o memory.o motorola.o
else
obj-y		+= sun3mmu.o
endif


include $(TOPDIR)/Rules.make
word(struct pci_dev *dev, int where, u32 value)
{
	CF0_WRITE_PCI_CFG(dev,where,value,0,0xffffffff);
}


static struct pci_ops bridge_pci_ops = {
	pci_conf0_read_config_byte,
	pci_conf0_read_config_word,
	pci_conf0_read_config_dword,
	pci_conf0_write_config_byte,
	pci_conf0_write_config_word,
	pci_conf0_write_config_dword
};

void __init pcibios_init(void)
{
	struct pci_ops *ops = &bridge_pci_ops;
	int	i;

	ioport_resource.end = ~0UL;
	iomem_resource.end = ~0UL;

	for (i=0; i<num_bridges; i++) {
		printk("PCI: Probing PCI hardware on host bus %2d.\n", i);
		pci_scan_bus(i, ops, NULL);
	}
}

static inline u8
bridge_swizzle(u8 pin, u8 slot) 
{
	return (((pin-1) + slot) % 4) + 1;
}

static u8 __init
pci_swizzle(struct pci_dev *dev, u8 *pinp)
{
	u8 pin = *pinp;

	while (dev->bus->self) {	/* Move up the chain of bridges. */
		pin = bridge_swizzle(pin, PCI_SLOT(dev->devfn));
		dev = dev->bus->self;
	}
	*pinp = pin;

	return PCI_SLOT(dev->devfn);
}

/*
 * All observed requests have pin == 1. We could have a global here, that
 * gets incremented and returned every time - unfortunately, pci_map_irq
 * may be called on the same device over and over, and need to return the
 * same value. On O2000, pin can be 0 or 1, and PCI slots can be [0..7]. 
 *
 * A given PCI device, in general, should be able to intr any of the cpus
 * on any one of the hubs connected to its xbow.
 */
static int __init
pci_map_irq(struct pci_dev *dev, u8 slot, u8 pin)
{
	if ((dev->bus->number >= MAX_PCI_BUSSES)
	    || (pin != 1)
	    || (slot >= MAX_DEVICES_PER_PCIBUS))
		panic("Increase supported PCI busses %d,%d,%d",
		      dev->bus->number, slot, pin);

	/*
	 * Already assigned? Then return previously assigned value ...
	 */
	if (irqstore[dev->bus->number][slot])
		return irqstore[dev->bus->number][slot];

	irq_to_bus[lastirq] = dev->bus->number;
	irq_to_slot[lastirq] = slot;
	irqstore[dev->bus->number][slot] = lastirq;
	lastirq++;
	return lastirq - 1;
}

void __init
pcibios_update_irq(struct pci_dev *dev, int irq)
{
	pci_write_config_byte(dev, PCI_INTERRUPT_LINE, irq);
}

void __init
pcibios_update_resource(struct pci_dev *dev, struct resource *root,
                        struct resource *res, int resource)
{
	unsigned long where, size;
	u32 reg;

	where = PCI_BASE_ADDRESS_0 + (resource * 4);
	size = res->end - res->start;
	pci_read_config_dword(dev, where, &reg);
	reg = (reg & size) | (((u32)(res->start - root->start)) & ~size);
	pci_write_config_dword(dev, where, reg);
}

void __init
pcibios_fixup_bus(struct pci_bus *b)
{
	pci_fixup_irqs(pci_swizzle, pci_map_irq);
}

void __init
pcibios_fixup_pbus_ranges(struct pci_bus * bus,
                          struct pbus_set_ranges_data * ranges)
{
	ranges->io_start  -= bus->resource[0]->start;
	ranges->io_end    -= bus->resource[0]->start;
	ranges->mem_start -= bus->resource[1]->start;
	ranges->mem_end   -= bus->resource[1]->start;
}

int __init
pcibios_enable_device(struct pci_dev *dev)
{
	/* Not needed, since we enable all devices at startup.  */
	return 0;
}

void __init
pcibios_align_resource(void *data, struct resource *res, unsigned long size)
{
}

unsigned __init int pcibios_assign_all_busses(void)
{
	return 0;
}

char * __init
pcibios_setup(char *str)
{
	/* Nothing to do for now.  */

	return str;
}

/*
 * Device might live on a subordinate PCI bus.  XXX Walk up the chain of buses
 * to find the slot number in sense of the bridge device register.
 * XXX This also means multiple devices might rely on conflicting bridge
 * settings.
 */

static void __init
pci_disable_swapping(struct pci_dev *dev)
{
	unsigned int bus_id = (unsigned) dev->bus->number;
	bridge_t *bridge = (bridge_t *) NODE_SWIN_BASE(bus_to_nid[bus_id],
	                                               bus_to_wid[bus_id]);
	int		slot = PCI_SLOT(dev->devfn);

	/* Turn off byte swapping */
	bridge->b_device[slot].reg &= ~BRIDGE_DEV_SWAP_DIR;
	bridge->b_widget.w_tflush;		/* Flush */
}

static void __init
pci_enable_swapping(struct pci_dev *dev)
{
	unsigned int bus_id = (unsigned) dev->bus->number;
	bridge_t *bridge = (bridge_t *) NODE_SWIN_BASE(bus_to_nid[bus_id],
	                                               bus_to_wid[bus_id]);
	int		slot = PCI_SLOT(dev->devfn);

	/* Turn on byte swapping */
	bridge->b_device[slot].reg |= BRIDGE_DEV_SWAP_DIR;
	bridge->b_widget.w_tflush;		/* Flush */
}

static void __init
pci_fixup_ioc3(struct pci_dev *d)
{
	unsigned long bus_id = (unsigned) d->bus->number;

	printk("PCI: Fixing base addresses for IOC3 device %s\n", d->slot_name);

	d->resource[0].start |= NODE_OFFSET(bus_to_nid[bus_id]);
	d->resource[0].end   |= NODE_OFFSET(bus_to_nid[bus_id]);

	pci_disable_swapping(d);
}

static void __init
pci_fixup_isp1020(struct pci_dev *d)
{
	unsigned short command;

	d->resource[0].start |= ((unsigned long)(bus_to_nid[d->bus->number])<<32);
	printk("PCI: Fixing isp1020 in [bus:slot.fn] %s\n", d->slot_name);

	/*
	 * Configure device to allow bus mastering, i/o and memory mapping. 
	 * Older qlogicisp driver expects to have the IO space enable 
	 * bit set. Things stop working if we program the controllers as not 
	 * having PCI_COMMAND_MEMORY, so we have to fudge the mem_flags.
	 */

	pci_set_master(d);
	pci_read_config_word(d, PCI_COMMAND, &command);
	command |= PCI_COMMAND_MEMORY;
	command |= PCI_COMMAND_IO;
	pci_write_config_word(d, PCI_COMMAND, command);
	d->resource[1].flags |= 1;

	pci_enable_swapping(d);
}

static void __init
pci_fixup_isp2x00(struct pci_dev *d)
{
	unsigned int bus_id = (unsigned) d->bus->number;
	bridge_t *bridge = (bridge_t *) NODE_SWIN_BASE(bus_to_nid[bus_id],
				     bus_to_wid[bus_id]);
	bridgereg_t 	devreg;
	int		i;
	int		slot = PCI_SLOT(d->devfn);
	unsigned int	start;
	unsigned short command;

	printk("PCI: Fixing isp2x00 in [bus:slot.fn] %s\n", d->slot_name);

	/* set the resource struct for this device */
	start = (u32) (u64)bridge;	/* yes, we want to lose the upper 32 bits here */
	start |= BRIDGE_DEVIO(slot);

	d->resource[0].start = start;
	d->resource[0].end = d->resource[0].start + 0xff;
	d->resource[0].flags = IORESOURCE_IO;

	d->resource[1].start = start;
	d->resource[1].end = d->resource[0].start + 0xfff;
	d->resource[1].flags = IORESOURCE_MEM;

	/*
	 * set the bridge device(x) reg for this device
	 */
	devreg = bridge->b_device[slot].reg;
	/* point device(x) to it appropriate small window */
	devreg &= ~BRIDGE_DEV_OFF_MASK;
	devreg |= (start >> 20) & BRIDGE_DEV_OFF_MASK;
	bridge->b_device[slot].reg = devreg;

	pci_enable_swapping(d);

	/* set card's base addr reg */
	//pci_conf0_write_config_dword(d, PCI_BASE_ADDRESS_0, 0x500001);
	//pci_conf0_write_config_dword(d, PCI_BASE_ADDRESS_1, 0x8b00000);
	//pci_conf0_write_config_dword(d, PCI_ROM_ADDRESS, 0x8b20000);

	/* I got these from booting irix on system...*/
	pci_conf0_write_config_dword(d, PCI_BASE_ADDRESS_0, 0x200001);
	//pci_conf0_write_config_dword(d, PCI_BASE_ADDRESS_1, 0xf800000);
	pci_conf0_write_config_dword(d, PCI_ROM_ADDRESS,   0x10200000);

	pci_conf0_write_config_dword(d, PCI_BASE_ADDRESS_1, start);
	//pci_conf0_write_config_dword(d, PCI_ROM_ADDRESS, (start | 0x20000));

	/* set cache line size */
	pci_conf0_write_config_dword(d, PCI_CACHE_LINE_SIZE, 0xf080);

	/* set pci bus timeout */
	bridge->b_bus_timeout |= BRIDGE_BUS_PCI_RETRY_HLD(0x3);
	bridge->b_wid_tflush;
	printk("PCI: bridge bus timeout= 0x%x \n", bridge->b_bus_timeout);

	/* set host error field */
	bridge->b_int_host_err = 0x44;
	bridge->b_wid_tflush;

	bridge->b_wid_tflush;   	/* wait until Bridge PIO complete */
	for (i=0; i<8; i++)
		printk("PCI: device(%d)= 0x%x\n",i,bridge->b_device[i].reg);

	/* configure device to allow bus mastering, i/o and memory mapping */
	pci_set_master(d);
	pci_read_config_word(d, PCI_COMMAND, &command);
	command |= PCI_COMMAND_MEMORY;
	command |= PCI_COMMAND_IO;
	pci_write_config_word(d, PCI_COMMAND, command);
	/*d->resource[1].flags |= 1;*/
}

struct pci_fixup pcibios_fixups[] = {
	{ PCI_FIXUP_HEADER, PCI_VENDOR_ID_SGI, PCI_DEVICE_ID_SGI_IOC3,
	  pci_fixup_ioc3 },
	{ PCI_FIXUP_HEADER, PCI_VENDOR_ID_QLOGIC, PCI_DEVICE_ID_QLOGIC_ISP1020,
	  pci_fixup_isp1020 },
	{ PCI_FIXUP_HEADER, PCI_VENDOR_ID_QLOGIC, PCI_DEVICE_ID_QLOGIC_ISP2100,
	/*
 *  linux/arch/m68k/mm/init.c
 *
 *  Copyright (C) 1995  Hamish Macdonald
 *
 *  Contains common initialization routines, specific init code moved
 *  to motorola.c and sun3mmu.c
 */

#include <linux/config.h>
#include <linux/signal.h>
#include <linux/sched.h>
#include <linux/mm.h>
#include <linux/swap.h>
#include <linux/kernel.h>
#include <linux/string.h>
#include <linux/types.h>
#include <linux/init.h>
#include <linux/bootmem.h>
#ifdef CONFIG_BLK_DEV_RAM
#include <linux/blk.h>
#endif

#include <asm/setup.h>
#include <asm/uaccess.h>
#include <asm/page.h>
#include <asm/pgalloc.h>
#include <asm/system.h>
#include <asm/machdep.h>
#include <asm/io.h>
#ifdef CONFIG_ATARI
#include <asm/atari_stram.h>
#endif
#include <asm/tlb.h>

mmu_gather_t mmu_gathers[NR_CPUS];

unsigned long totalram_pages = 0;

int do_check_pgt_cache(int low, int high)
{
	int freed = 0;
	if(pgtable_cache_size > high) {
		do {
			if(pmd_quicklist)
				freed += free_pmd_slow(get_pmd_fast());
			if(pte_quicklist)
				free_pte_slow(get_pte_fast()), freed++;
		} while(pgtable_cache_size > low);
	}
	return freed;
}

/*
 * BAD_PAGE is the page that is used for page faults when linux
 * is out-of-memory. Older versions of linux just did a
 * do_exit(), but using this instead means there is less risk
 * for a process dying in kernel mode, possibly leaving an inode
 * unused etc..
 *
 * BAD_PAGETABLE is the accompanying page-table: it is initialized
 * to point to BAD_PAGE entries.
 *
 * ZERO_PAGE is a special page that is used for zero-initialized
 * data and COW.
 */
unsigned long empty_bad_page_table;

pte_t *__bad_pagetable(void)
{
    memset((void *)empty_bad_page_table, 0, PAGE_SIZE);
    return (pte_t *)empty_bad_page_table;
}

unsigned long empty_bad_page;

pte_t __bad_page(void)
{
    memset ((void *)empty_bad_page, 0, PAGE_SIZE);
    return pte_mkdirty(__mk_pte(empty_bad_page, PAGE_SHARED));
}

unsigned long empty_zero_page;

void show_mem(void)
{
    unsigned long i;
    int free = 0, total = 0, reserved = 0, shared = 0;
    int cached = 0;

    printk("\nMem-info:\n");
    show_free_areas();
    printk("Free swap:       %6dkB\n",nr_swap_pages<<(PAGE_SHIFT-10));
    i = max_mapnr;
    while (i-- > 0) {
	total++;
	if (PageReserved(mem_map+i))
	    reserved++;
	else if (PageSwapCache(mem_map+i))
	    cached++;
	else if (!page_count(mem_map+i))
	    free++;
	else
	    shared += page_count(mem_map+i) - 1;
    }
    printk("%d pages of RAM\n",total);
    printk("%d free pages\n",free);
    printk("%d reserved pages\n",reserved);
    printk("%d pages shared\n",shared);
    printk("%d pages swap cached\n",cached);
    printk("%ld pages in page table cache\n",pgtable_cache_size);
    show_buffers();
}

extern void init_pointer_table(unsigned long ptable);

/* References to section boundaries */

extern char _text, _etext, _edata, __bss_start, _end;
extern char __init_begin, __init_end;

extern pmd_t *zero_pgtable;

void __init mem_init(void)
{
	int codepages = 0;
	int datapages = 0;
	int initpages = 0;
	unsigned long tmp;
	int i;

	max_mapnr = num_physpages = MAP_NR(high_memory);

#ifdef CONFIG_ATARI
	if (MACH_IS_ATARI)
		atari_stram_mem_init_hook();
#endif

	/* this will put all memory onto the freelists */
	totalram_pages = free_all_bootmem();

	for (tmp = PAGE_OFFSET ; tmp < (unsigned long)high_memory; tmp += PAGE_SIZE) {
#if 0
#ifndef CONFIG_SUN3
		if (virt_to_phys ((void *)tmp) >= mach_max_dma_address)
			clear_bit(PG_DMA, &virt_to_page(tmp)->flags);
#endif
#endif
		if (PageReserved(virt_to_page(tmp))) {
			if (tmp >= (unsigned long)&_text
			    && tmp < (unsigned long)&_etext)
				codepages++;
			else if (tmp >= (unsigned long) &__init_begin
				 && tmp < (unsigned long) &__init_end)
				initpages++;
			else
				datapages++;
			continue;
		}
#if 0
		set_page_count(virt_to_page(tmp), 1);
#ifdef CONFIG_BLK_DEV_INITRD
		if (!initrd_start ||
		    (tmp < (initrd_start & PAGE_MASK) || tmp >= initrd_end))
#endif
			free_page(tmp);
#endif
	}
	
#ifndef CONFIG_SUN3
	/* insert pointer tables allocated so far into the tablelist */
	init_pointer_table((unsigned long)kernel_pg_dir);
	for (i = 0; i < PTRS_PER_PGD; i++) {
		if (pgd_present(kernel_pg_dir[i]))
			init_pointer_table(__pgd_page(kernel_pg_dir[i]));
	}

	/* insert also pointer table that we used to unmap the zero page */
	if (zero_pgtable)
		init_pointer_table((unsigned long)zero_pgtable);
#endif

	printk("Memory: %luk/%luk available (%dk kernel code, %dk data, %dk init)\n",
	       (unsigned long)nr_free_pages() << (PAGE_SHIFT-10),
	       max_mapnr << (PAGE_SHIFT-10),
	       codepages << (PAGE_SHIFT-10),
	       datapages << (PAGE_SHIFT-10),
	       initpages << (PAGE_SHIFT-10));
}

#ifdef CONFIG_BLK_DEV_INITRD
void free_initrd_mem(unsigned long start, unsigned long end)
{
	int pages = 0;
	for (; start < end; start += PAGE_SIZE) {
		ClearPageReserved(virt_to_page(start));
		set_page_count(virt_to_page(start), 1);
		free_page(start);
		totalram_pages++;
		pages++;
	}
	printk ("Freeing initrd memory: %dk freed\n", pages);
}
#endif

void si_meminfo(struct sysinfo *val)
{
    unsigned long i;

    i = max_mapnr;
    val->totalram = totalram_pages;
    val->sharedram = 0;
    val->freeram = nr_free_pages();
    val->bufferram = atomic_read(&buffermem_pages);
    val->totalhigh = 0;
    val->freehigh = 0;
    val->mem_unit = PAGE_SIZE;
    return;
}
  pci_fixup_isp2x00 },
	{ PCI_FIXUP_HEADER, PCI_VENDOR_ID_QLOGIC, PCI_DEVICE_ID_QLOGIC_ISP2200,
	  pci_fixup_isp2x00 },
	{ 0 }
};
/*
 * This file is subject to the terms and conditions of the GNU General Public
 * License.  See the file "COPYING" in the main directory of this archive
 * for more details.
 *
 * Reset an IP27.
 *
 * Copyright (C) 1997, 1998, 1999, 2000 by Ralf Baechle
 * Copyright (C) 1999, 2000 Silicon Graphics, Inc.
 */
#include <linux/config.h>
#include <linux/kernel.h>
#include <linux/sched.h>
#include <linux/timer.h>
#include <linux/smp.h>
#include <linux/mmzone.h>

#include <asm/io.h>
#include <asm/irq.h>
#include <asm/reboot.h>
#include <asm/system.h>
#include <asm/sgialib.h>
#include <asm/sn/addrs.h>
#include <asm/sn/arch.h>
#include <asm/sn/gda.h>
#include <asm/sn/sn0/hub.h>

void machine_restart(char *command) __attribute__((noreturn));
void machine_halt(void) __attribute__((noreturn));
void machine_power_off(void) __attribute__((noreturn));

#define noreturn while(1);				/* Silence gcc.  */

/* XXX How to pass the reboot command to the firmware??? */
static void ip27_machine_restart(char *command)
{
#if 0
	int i;
#endif

	printk("Reboot started from CPU %d\n", smp_processor_id());
#ifdef CONFIG_SMP
	smp_send_stop();
#endif
#if 0
	for (i = 0; i < numnodes; i++)
		REMOTE_HUB_S(COMPACT_TO_NASID_NODEID(i), PROMOP_REG, 
							PROMOP_REBOOT);
#else
	LOCAL_HUB_S(NI_PORT_RESET, NPR_PORTRESET | NPR_LOCALRESET);
#endif
	noreturn;
}

static void ip27_machine_halt(void)
{
	int i;

#ifdef CONFIG_SMP
	smp_send_stop();
#endif
	for (i = 0; i < numnodes; i++)
		REMOTE_HUB_S(COMPACT_TO_NASID_NODEID(i), PROMOP_REG, 
							PROMOP_RESTART);
	LOCAL_HUB_S(NI_PORT_RESET, NPR_PORTRESET | NPR_LOCALRESET);
	noreturn;
}

static void ip27_machine_power_off(void)
{
	/* To do ...  */
	noreturn;
}

void ip27_reboot_setup(void)
{
	_machine_restart = ip27_machine_restart;
	_machine_halt = ip27_machine_halt;
	_machine_power_off = ip27_machine_power_off;
}
/*
 *	Driver for the SGS-Thomson M48T35 Timekeeper RAM chip
 *
 *	Real Time Clock interface for Linux	
 *
 *	TODO: Implement periodic interrupts.
 *
 *	Copyright (C) 2000 Silicon Graphics, Inc.
 *	Written by Ulf Carlsson (ulfc@engr.sgi.com)
 *
 *	Based on code written by Paul Gortmaker.
 *
 *	This driver allows use of the real time clock (built into
 *	nearly all computers) from user space. It exports the /dev/rtc
 *	interface supporting various ioctl() and also the /proc/rtc
 *	pseudo-file for status information.
 *
 *	This program is free software; you can redistribute it and/or
 *	modify it under the terms of the GNU General Public License
 *	as published by the Free Software Foundation; either version
 *	2 of the License, or (at your option) any later version.
 *
 */

#define RTC_VERSION		"1.09b"

#include <linux/module.h>
#include <linux/kernel.h>
#include <linux/types.h>
#include <linux/miscdevice.h>
#include <linux/ioport.h>
#include <linux/fcntl.h>
#include <linux/rtc.h>
#include <linux/init.h>
#include <linux/poll.h>
#include <linux/proc_fs.h>
#include <linux/smp_lock.h>

#include <asm/m48t35.h>
#include <asm/sn/ioc3.h>
#include <asm/io.h>
#include <asm/uaccess.h>
#include <asm/system.h>
#include <asm/sn/klconfig.h>
#include <asm/sn/sn0/ip27.h>
#include <asm/sn/sn0/hub.h>

static int rtc_ioctl(struct inode *inode, struct file *file,
		     unsigned int cmd, unsigned long arg);

static int rtc_read_proc(char *page, char **start, off_t off,
                         int count, int *eof, void *data);

static void get_rtc_time(struct rtc_time *rtc_tm);

/*
 *	Bits in rtc_status. (6 bits of room for future expansion)
 */

#define RTC_IS_OPEN		0x01	/* means /dev/rtc is in use	*/
#define RTC_TIMER_ON		0x02	/* missed irq timer active	*/

static unsigned char rtc_status;	/* bitmapped status byte.	*/
static spinlock_t rtc_status_lock = SPIN_LOCK_UNLOCKED;
static unsigned long rtc_freq;	/* Current periodic IRQ rate	*/
static struct m48t35_rtc *rtc;

/*
 *	If this driver ever becomes modularised, it will be really nice
 *	to make the epoch retain its value across module reload...
 */

static unsigned long epoch = 1970;	/* year corresponding to 0x00	*/

static const unsigned char days_in_mo[] = 
{0, 31, 28, 31, 30, 31, 30, 31, 31, 30, 31, 30, 31};

static int rtc_ioctl(struct inode *inode, struct file *file, unsigned int cmd,
		     unsigned long arg)
{

	struct rtc_time wtime; 

	switch (cmd) {
	case RTC_RD_TIME:	/* Read the time/date from RTC	*/
	{
		get_rtc_time(&wtime);
		break;
	}
	case RTC_SET_TIME:	/* Set the RTC */
	{
		struct rtc_time rtc_tm;
		unsigned char mon, day, hrs, min, sec, leap_yr;
		unsigned int yrs;
		unsigned long flags;
			
		if (!capable(CAP_SYS_TIME))
			return -EACCES;

		if (copy_from_user(&rtc_tm, (struct rtc_time*)arg,
				   sizeof(struct rtc_time)))
			return -EFAULT;

		yrs = rtc_tm.tm_year + 1900;
		mon = rtc_tm.tm_mon + 1;   /* tm_mon starts at zero */
		day = rtc_tm.tm_mday;
		hrs = rtc_tm.tm_hour;
		min = rtc_tm.tm_min;
		sec = rtc_tm.tm_sec;

		if (yrs < 1970)
			return -EINVAL;

		leap_yr = ((!(yrs % 4) && (yrs % 100)) || !(yrs % 400));

		if ((mon > 12) || (day == 0))
			return -EINVAL;

		if (day > (days_in_mo[mon] + ((mon == 2) && leap_yr)))
			return -EINVAL;
			
		if ((hrs >= 24) || (min >= 60) || (sec >= 60))
			return -EINVAL;

		if ((yrs -= epoch) > 255)    /* They are unsigned */
			return -EINVAL;

		save_flags(flags);
		cli();
		if (yrs > 169) {
			restore_flags(flags);
			return -EINVAL;
		}
		if (yrs >= 100)
			yrs -= 100;

		BIN_TO_BCD(sec);
		BIN_TO_BCD(min);
		BIN_TO_BCD(hrs);
		BIN_TO_BCD(day);
		BIN_TO_BCD(mon);
		BIN_TO_BCD(yrs);

		rtc->control &= ~M48T35_RTC_SET;
		rtc->year = yrs;
		rtc->month = mon;
		rtc->date = day;
		rtc->hour = hrs;
		rtc->min = min;
		rtc->sec = sec;
		rtc->control &= ~M48T35_RTC_SET;

		restore_flags(flags);
		return 0;
	}
	default:
		return -EINVAL;
	}
	return copy_to_user((void *)arg, &wtime, sizeof wtime) ? -EFAULT : 0;
}

/*
 *	We enforce only one user at a time here with the open/close.
 *	Also clear the previous interrupt data on an open, and clean
 *	up things on a close.
 */

static int rtc_open(struct inode *inode, struct file *file)
{
	spin_lock(rtc_status_lock);

	if (rtc_status & RTC_IS_OPEN) {
		spin_unlock(rtc_status_lock);
		return -EBUSY;
	}

	rtc_status |= RTC_IS_OPEN;
	spin_unlock(rtc_status_lock);

	return 0;
}

static int rtc_release(struct inode *inode, struct file *file)
{
	/*
	 * Turn off all interrupts once the device is no longer
	 * in use, and clear the data.
	 */

	spin_lock(rtc_status_lock);
	rtc_status &= ~RTC_IS_OPEN;
	spin_unlock(rtc_status_lock);

	return 0;
}

/*
 *	The various file operations we support.
 */

static struct file_operations rtc_fops = {
	owner:		THIS_MODULE,
	ioctl:		rtc_ioctl,
	open:		rtc_open,
	release:	rtc_release,
};

static struct miscdevice rtc_dev=
{
	RTC_MINOR,
	"rtc",
	&rtc_fops
};

static int __init rtc_init(void)
{
	unsigned long flags;
	nasid_t nid;

	nid = get_nasid();
	rtc = (struct m48t35_rtc *)
	    KL_CONFIG_CH_CONS_INFO(nid)->memory_base + IOC3_BYTEBUS_DEV0;

	printk(KERN_INFO "Real Time Clock Driver v%s\n", RTC_VERSION);
	if (misc_register(&rtc_dev))
		return -ENODEV;
	create_proc_read_entry ("rtc", 0, NULL, rtc_read_proc, NULL);

	save_flags(flags);
	cli();
	restore_flags(flags);
	rtc_freq = 1024;
	return 0;
}

static void __exit rtc_exit (void)
{
	/* interrupts and timer disabled at this point by rtc_release */

	remove_proc_entry ("rtc", NULL);
	misc_deregister(&rtc_dev);
}

module_init(rtc_init);
module_exit(rtc_exit);
EXPORT_NO_SYMBOLS;

/*
 *	Info exported via "/proc/rtc".
 */

static int rtc_get_status(char *buf)
{
	char *p;
	struct rtc_time tm;

	/*
	 * Just emulate the standard /proc/rtc
	 */

	p = buf;

	get_rtc_time(&tm);

	/*
	 * There is no way to tell if the luser has the RTC set for local
	 * time or for Universal Standard Time (GMT). Probably local though.
	 */
	p += sprintf(p,
		     "rtc_time\t: %02d:%02d:%02d\n"
		     "rtc_date\t: %04d-%02d-%02d\n"
	 	     "rtc_epoch\t: %04lu\n"
		     "24hr\t\t: yes\n",
		     tm.tm_hour, tm.tm_min, tm.tm_sec,
		     tm.tm_year + 1900, tm.tm_mon + 1, tm.tm_mday, epoch);

	return  p - buf;
}

static int rtc_read_proc(char *page, char **start, off_t off,
                                 int count, int *eof, void *data)
{
        int len = rtc_get_status(page);
        if (len <= off+count) *eof = 1;
        *start = page + off;
        len -= off;
        if (len>count) len = count;
        if (len<0) len = 0;
        return len;
}

static void get_rtc_time(struct rtc_time *rtc_tm)
{

	unsigned long flags;

	/*
	 * Do we need to wait for the last update to finish?
	 */

	/*
	 * Only the values that we read from the RTC are set. We leave
	 * tm_wday, tm_yday and tm_isdst untouched. Even though the
	 * RTC has RTC_DAY_OF_WEEK, we ignore it, as it is only updated
	 * by the RTC when initially set to a non-zero value.
	 */
	save_flags(flags);
	cli();
        rtc->control |= M48T35_RTC_READ;
	rtc_tm->tm_sec = rtc->sec;
	rtc_tm->tm_min = rtc->min;
	rtc_tm->tm_hour = rtc->hour;
	rtc_tm->tm_mday = rtc->date;
	rtc_tm->tm_mon = rtc->month;
	rtc_tm->tm_year = rtc->year;
	rtc->control &= ~M48T35_RTC_READ;
	restore_flags(flags);

	BCD_TO_BIN(rtc_tm->tm_sec);
	BCD_TO_BIN(rtc_tm->tm_min);
	BCD_TO_BIN(rtc_tm->tm_hour);
	BCD_TO_BIN(rtc_tm->tm_mday);
	BCD_TO_BIN(rtc_tm->tm_mon);
	BCD_TO_BIN(rtc_tm->tm_year);

	/*
	 * Account for differences between how the RTC uses the values
	 * and how they are defined in a struct rtc_time;
	 */
	if ((rtc_tm->tm_year += (epoch - 1900)) <= 69)
		rtc_tm->tm_year += 100;

	rtc_tm->tm_mon--;
}
/*
 * linux/arch/m68k/mm/extable.c
 */

#include <linux/config.h>
#include <linux/module.h>
#include <asm/uaccess.h>

extern const struct exception_table_entry __start___ex_table[];
extern const struct exception_table_entry __stop___ex_table[];

static inline unsigned long
search_one_table(const struct exception_table_entry *first,
		 const struct exception_table_entry *last,
		 unsigned long value)
{
        while (first <= last) {
		const struct exception_table_entry *mid;
		long diff;

		mid = (last - first) / 2 + first;
		diff = value - mid->insn;
		if (diff >= 0 && diff <= 2)
			return mid->fixup;
		else if (diff > 0)
			first = mid+1;
		else
			last = mid-1;
	}
	return 0;
}

unsigned long
search_exception_table(unsigned long addr)
{
	unsigned long ret;

#ifndef CONFIG_MODULES
	/* There is only the kernel to search.  */
	ret = search_one_table(__start___ex_table, __stop___ex_table-1, addr);
	if (ret) return ret;
#else
	/* The kernel is the last "module" -- no need to treat it special.  */
	struct module *mp;
	for (mp = module_list; mp != NULL; mp = mp->next) {
		if (mp->ex_table_start == NULL)
			continue;
		ret = search_one_table(mp->ex_table_start,
				       mp->ex_table_end-1, addr);
		if (ret) return ret;
	}
#endif

	return 0;
}
/*
 *  linux/arch/m68k/mm/kmap.c
 *
 *  Copyright (C) 1997 Roman Hodek
 *
 *  10/01/99 cleaned up the code and changing to the same interface
 *	     used by other architectures		/Roman Zippel
 */

#include <linux/config.h>
#include <linux/mm.h>
#include <linux/kernel.h>
#include <linux/string.h>
#include <linux/types.h>
#include <linux/slab.h>
#include <linux/vmalloc.h>

#include <asm/setup.h>
#include <asm/segment.h>
#include <asm/page.h>
#include <asm/pgalloc.h>
#include <asm/io.h>
#include <asm/system.h>

#undef DEBUG

#define PTRTREESIZE	(256*1024)

/*
 * For 040/060 we can use the virtual memory area like other architectures,
 * but for 020/030 we want to use early termination page descriptor and we
 * can't mix this with normal page descriptors, so we have to copy that code
 * (mm/vmalloc.c) and return appriorate aligned addresses.
 */

#ifdef CPU_M68040_OR_M68060_ONLY

#define IO_SIZE		PAGE_SIZE

static inline struct vm_struct *get_io_area(unsigned long size)
{
	return get_vm_area(size, VM_IOREMAP);
}


static inline void free_io_area(void *addr)
{
	return vfree((void *)(PAGE_MASK & (unsigned long)addr));
}

#else

#define IO_SIZE		(256*1024)

static struct vm_struct *iolist = NULL;

static struct vm_struct *get_io_area(unsigned long size)
{
	unsigned long addr;
	struct vm_struct **p, *tmp, *area;

	area = (struct vm_struct *)kmalloc(sizeof(*area), GFP_KERNEL);
	if (!area)
		return NULL;
	addr = KMAP_START;
	for (p = &iolist; (tmp = *p) ; p = &tmp->next) {
		if (size + addr < (unsigned long)tmp->addr)
			break;
		if (addr > KMAP_END-size)
			return NULL;
		addr = tmp->size + (unsigned long)tmp->addr;
	}
	area->addr = (void *)addr;
	area->size = size + IO_SIZE;
	area->next = *p;
	*p = area;
	return area;
}

static inline void free_io_area(void *addr)
{
	struct vm_struct **p, *tmp;

	if (!addr)
		return;
	addr = (void *)((unsigned long)addr & -IO_SIZE);
	for (p = &iolist ; (tmp = *p) ; p = &tmp->next) {
		if (tmp->addr == addr) {
			*p = tmp->next;
			__iounmap(tmp->addr, tmp->size);
			kfree(tmp);
			return;
		}
	}
}

#endif

/*
 * Map some physical address range into the kernel address space. The
 * code is copied and adapted from map_chunk().
 */
/* Rewritten by Andreas Schwab to remove all races. */

void *__ioremap(unsigned long physaddr, unsigned long size, int cacheflag)
{
	struct vm_struct *area;
	unsigned long virtaddr, retaddr;
	long offset;
	pgd_t *pgd_dir;
	pmd_t *pmd_dir;
	pte_t *pte_dir;

	/*
	 * Don't allow mappings that wrap..
	 */
	if (!size || size > physaddr + size)
		return NULL;

#ifdef CONFIG_AMIGA
	if (MACH_IS_AMIGA) {
		if ((physaddr >= 0x40000000) && (physaddr + size < 0x60000000)
		    && (cacheflag == IOMAP_NOCACHE_SER))
			return (void *)physaddr;
	}
#endif

#ifdef DEBUG
	printk("ioremap: 0x%lx,0x%lx(%d) - ", physaddr, size, cacheflag);
#endif
	/*
	 * Mappings have to be aligned
	 */
	offset = physaddr & (IO_SIZE - 1);
	physaddr &= -IO_SIZE;
	size = (size + offset + IO_SIZE - 1) & -IO_SIZE;

	/*
	 * Ok, go for it..
	 */
	area = get_io_area(size);
	if (!area)
		return NULL;

	virtaddr = (unsigned long)area->addr;
	retaddr = virtaddr + offset;
#ifdef DEBUG
	printk("0x%lx,0x%lx,0x%lx", physaddr, virtaddr, retaddr);
#endif

	/*
	 * add cache and table flags to physical address
	 */
	if (CPU_IS_040_OR_060) {
		physaddr |= (_PAGE_PRESENT | _PAGE_GLOBAL040 |
			     _PAGE_ACCESSED | _PAGE_DIRTY);
		switch (cacheflag) {
		case IOMAP_FULL_CACHING:
			physaddr |= _PAGE_CACHE040;
			break;
		case IOMAP_NOCACHE_SER:
		default:
			physaddr |= _PAGE_NOCACHE_S;
			break;
		case IOMAP_NOCACHE_NONSER:
			physaddr |= _PAGE_NOCACHE;
			break;
		case IOMAP_WRITETHROUGH:
			physaddr |= _PAGE_CACHE040W;
			break;
		}
	} else {
		physaddr |= (_PAGE_PRESENT | _PAGE_ACCESSED | _PAGE_DIRTY);
		switch (cacheflag) {
		case IOMAP_NOCACHE_SER:
		case IOMAP_NOCACHE_NONSER:
		default:
			physaddr |= _PAGE_NOCACHE030;
			break;
		case IOMAP_FULL_CACHING:
		case IOMAP_WRITETHROUGH:
			break;
		}
	}

	while ((long)size > 0) {
#ifdef DEBUG
		if (!(virtaddr & (PTRTREESIZE-1)))
			printk ("\npa=%#lx va=%#lx ", physaddr, virtaddr);
#endif
		pgd_dir = pgd_offset_k(virtaddr);
		pmd_dir = pmd_alloc_kernel(pgd_dir, virtaddr);
		if (!pmd_dir) {
			printk("ioremap: no mem for pmd_dir\n");
			return NULL;
		}

		if (CPU_IS_020_OR_030) {
			pmd_dir->pmd[(virtaddr/PTRTREESIZE) & 15] = physaddr;
			physaddr += PTRTREESIZE;
			virtaddr += PTRTREESIZE;
			size -= PTRTREESIZE;
		} else {
			pte_dir = pte_alloc_kernel(pmd_dir, virtaddr);
			if (!pte_dir) {
				printk("ioremap: no mem for pte_dir\n");
				return NULL;
			}

			pte_val(*pte_dir) = physaddr;
			virtaddr += PAGE_SIZE;
			physaddr += PAGE_SIZE;
			size -= PAGE_SIZE;
		}
	}
#ifdef DEBUG
	printk("\n");
#endif
	flush_tlb_all();

	return (void *)retaddr;
}

/*
 * Unmap a ioremap()ed region again
 */
void iounmap(void *addr)
{
#ifdef CONFIG_AMIGA
	if ((!MACH_IS_AMIGA) ||
	    (((unsigned long)addr < 0x40000000) ||
	     ((unsigned long)addr > 0x60000000)))
			free_io_area(addr);
#else
	free_io_area(addr);
#endif
}

/*
 * __iounmap unmaps nearly everything, so be careful
 * it doesn't free currently pointer/page tables anymore but it
 * wans't used anyway and might be added later.
 */
void __iounmap(void *addr, unsigned long size)
{
	unsigned long virtaddr = (unsigned long)addr;
	pgd_t *pgd_dir;
	pmd_t *pmd_dir;
	pte_t *pte_dir;

	while ((long)size > 0) {
		pgd_dir = pgd_offset_k(virtaddr);
		if (pgd_bad(*pgd_dir)) {
			printk("iounmap: bad pgd(%08lx)\n", pgd_val(*pgd_dir));
			pgd_clear(pgd_dir);
			return;
		}
		pmd_dir = pmd_offset(pgd_dir, virtaddr);

		if (CPU_IS_020_OR_030) {
			int pmd_off = (virtaddr/PTRTREESIZE) & 15;

			if ((pmd_dir->pmd[pmd_off] & _DESCTYPE_MASK) == _PAGE_PRESENT) {
				pmd_dir->pmd[pmd_off] = 0;
				virtaddr += PTRTREESIZE;
				size -= PTRTREESIZE;
				continue;
			}
		}

		if (pmd_bad(*pmd_dir)) {
			printk("iounmap: bad pmd (%08lx)\n", pmd_val(*pmd_dir));
			pmd_clear(pmd_dir);
			return;
		}
		pte_dir = pte_offset(pmd_dir, virtaddr);

		pte_val(*pte_dir) = 0;
		virtaddr += PAGE_SIZE;
		size -= PAGE_SIZE;
	}

	flush_tlb_all();
}

/*
 * Set new cache mode for some kernel address space.
 * The caller must push data for that range itself, if such data may already
 * be in the cache.
 */
void kernel_set_cachemode(void *addr, unsigned long size, int cmode)
{
	unsigned long virtaddr = (unsigned long)addr;
	pgd_t *pgd_dir;
	pmd_t *pmd_dir;
	pte_t *pte_dir;

	if (CPU_IS_040_OR_060) {
		switch (cmode) {
		case IOMAP_FULL_CACHING:
			cmode = _PAGE_CACHE040;
			break;
		case IOMAP_NOCACHE_SER:
		default:
			cmode = _PAGE_NOCACHE_S;
			break;
		case IOMAP_NOCACHE_NONSER:
			cmode = _PAGE_NOCACHE;
			break;
		case IOMAP_WRITETHROUGH:
			cmode = _PAGE_CACHE040W;
			break;
		}
	} else {
		switch (cmode) {
		case IOMAP_NOCACHE_SER:
		case IOMAP_NOCACHE_NONSER:
		default:
			cmode = _PAGE_NOCACHE030;
			break;
		case IOMAP_FULL_CACHING:
		case IOMAP_WRITETHROUGH:
			cmode = 0;
		}
	}

	while ((long)size > 0) {
		pgd_dir = pgd_offset_k(virtaddr);
		if (pgd_bad(*pgd_dir)) {
			printk("iocachemode: bad pgd(%08lx)\n", pgd_val(*pgd_dir));
			pgd_clear(pgd_dir);
			return;
		}
		pmd_dir = pmd_offset(pgd_dir, virtaddr);

		if (CPU_IS_020_OR_030) {
			int pmd_off = (virtaddr/PTRTREESIZE) & 15;

			if ((pmd_dir->pmd[pmd_off] & _DESCTYPE_MASK) == _PAGE_PRESENT) {
				pmd_dir->pmd[pmd_off] = (pmd_dir->pmd[pmd_off] &
							 _CACHEMASK040) | cmode;
				virtaddr += PTRTREESIZE;
				size -= PTRTREESIZE;
				continue;
			}
		}

		if (pmd_bad(*pmd_dir)) {
			printk("iocachemode: bad pmd (%08lx)\n", pmd_val(*pmd_dir));
			pmd_clear(pmd_dir);
			return;
		}
		pte_dir = pte_offset(pmd_dir, virtaddr);

		pte_val(*pte_dir) = (pte_val(*pte_dir) & _CACHEMASK040) | cmode;
		virtaddr += PAGE_SIZE;
		size -= PAGE_SIZE;
	}

	flush_tlb_all();
}
/* Tests for presence or absence of hardware registers.
 * This code was originally in atari/config.c, but I noticed
 * that it was also in drivers/nubus/nubus.c and I wanted to
 * use it in hp300/config.c, so it seemed sensible to pull it
 * out into its own file.
 * 
 * The test is for use when trying to read a hardware register
 * that isn't present would cause a bus error. We set up a 
 * temporary handler so that this doesn't kill the kernel.
 *
 * There is a test-by-reading and a test-by-writing; I present
 * them here complete with the comments from the original atari
 * config.c...
 *                -- PMM <pmaydell@chiark.greenend.org.uk>, 05/1998
 */

/* This function tests for the presence of an address, specially a
 * hardware register address. It is called very early in the kernel
 * initialization process, when the VBR register isn't set up yet. On
 * an Atari, it still points to address 0, which is unmapped. So a bus
 * error would cause another bus error while fetching the exception
 * vector, and the CPU would do nothing at all. So we needed to set up
 * a temporary VBR and a vector table for the duration of the test.
 */

int hwreg_present( volatile void *regp )
{
    int	ret = 0;
    long	save_sp, save_vbr;
    long	tmp_vectors[3];

    __asm__ __volatile__
	(	"movec	%/vbr,%2\n\t"
		"movel	#Lberr1,%4@(8)\n\t"
                "movec	%4,%/vbr\n\t"
		"movel	%/sp,%1\n\t"
		"moveq	#0,%0\n\t"
		"tstb	%3@\n\t"  
		"nop\n\t"
		"moveq	#1,%0\n"
                "Lberr1:\n\t"
		"movel	%1,%/sp\n\t"
		"movec	%2,%/vbr"
		: "=&d" (ret), "=&r" (save_sp), "=&r" (save_vbr)
		: "a" (regp), "a" (tmp_vectors)
                );

    return( ret );
}
  
/* Basically the same, but writes a value into a word register, protected
 * by a bus error handler. Returns 1 if successful, 0 otherwise.
 */

int hwreg_write( volatile void *regp, unsigned short val )
{
	int		ret;
	long	save_sp, save_vbr;
	long	tmp_vectors[3];

	__asm__ __volatile__
	(	"movec	%/vbr,%2\n\t"
		"movel	#Lberr2,%4@(8)\n\t"
		"movec	%4,%/vbr\n\t"
		"movel	%/sp,%1\n\t"
		"moveq	#0,%0\n\t"
		"movew	%5,%3@\n\t"  
		"nop	\n\t"	/* If this nop isn't present, 'ret' may already be
				 * loaded with 1 at the time the bus error
				 * happens! */
		"moveq	#1,%0\n"
	"Lberr2:\n\t"
		"movel	%1,%/sp\n\t"
		"movec	%2,%/vbr"
		: "=&d" (ret), "=&r" (save_sp), "=&r" (save_vbr)
		: "a" (regp), "a" (tmp_vectors), "g" (val)
	);

	return( ret );
}

/*
 * linux/arch/m68k/motorola.c
 *
 * Routines specific to the Motorola MMU, originally from:
 * linux/arch/m68k/init.c 
 * which are Copyright (C) 1995 Hamish Macdonald
 * 
 * Moved 8/20/1999 Sam Creasey
 */

#include <linux/config.h>
#include <linux/signal.h>
#include <linux/sched.h>
#include <linux/mm.h>
#include <linux/swap.h>
#include <linux/kernel.h>
#include <linux/string.h>
#include <linux/types.h>
#include <linux/init.h>
#include <linux/bootmem.h>
#ifdef CONFIG_BLK_DEV_RAM
#include <linux/blk.h>
#endif

#include <asm/setup.h>
#include <asm/uaccess.h>
#include <asm/page.h>
#include <asm/pgalloc.h>
#include <asm/system.h>
#include <asm/machdep.h>
#include <asm/io.h>
#include <asm/dma.h>
#ifdef CONFIG_ATARI
#include <asm/atari_stram.h>
#endif

#undef DEBUG

#ifndef mm_cachebits
/*
 * Bits to add to page descriptors for "normal" caching mode.
 * For 68020/030 this is 0.
 * For 68040, this is _PAGE_CACHE040 (cachable, copyback)
 */
unsigned long mm_cachebits = 0;
#endif

static pte_t * __init kernel_page_table(void)
{
	pte_t *ptablep;

	ptablep = (pte_t *)alloc_bootmem_low_pages(PAGE_SIZE);

	clear_page(ptablep);
	__flush_page_to_ram((unsigned long) ptablep);
	flush_tlb_kernel_page((unsigned long) ptablep);
	nocache_page ((unsigned long)ptablep);

	return ptablep;
}

static pmd_t *last_pgtable __initdata = NULL;
pmd_t *zero_pgtable __initdata = NULL;

static pmd_t * __init kernel_ptr_table(void)
{
	if (!last_pgtable) {
		unsigned long pmd, last;
		int i;

		/* Find the last ptr table that was used in head.S and
		 * reuse the remaining space in that page for further
		 * ptr tables.
		 */
		last = (unsigned long)kernel_pg_dir;
		for (i = 0; i < PTRS_PER_PGD; i++) {
			if (!pgd_present(kernel_pg_dir[i]))
				continue;
			pmd = __pgd_page(kernel_pg_dir[i]);
			if (pmd > last)
				last = pmd;
		}

		last_pgtable = (pmd_t *)last;
#ifdef DEBUG
		printk("kernel_ptr_init: %p\n", last_pgtable);
#endif
	}

	if (((unsigned long)(last_pgtable + PTRS_PER_PMD) & ~PAGE_MASK) == 0) {
		last_pgtable = (pmd_t *)alloc_bootmem_low_pages(PAGE_SIZE);

		clear_page(last_pgtable);
		__flush_page_to_ram((unsigned long)last_pgtable);
		flush_tlb_kernel_page((unsigned long)last_pgtable);
		nocache_page((unsigned long)last_pgtable);
	} else
		last_pgtable += PTRS_PER_PMD;

	return last_pgtable;
}

static unsigned long __init 
map_chunk (unsigned long addr, long size)
{
#define PTRTREESIZE (256*1024)
#define ROOTTREESIZE (32*1024*1024)
	static unsigned long virtaddr = PAGE_OFFSET;
	unsigned long physaddr;
	pgd_t *pgd_dir;
	pmd_t *pmd_dir;
	pte_t *pte_dir;

	physaddr = (addr | m68k_supervisor_cachemode |
		    _PAGE_PRESENT | _PAGE_ACCESSED | _PAGE_DIRTY);
	if (CPU_IS_040_OR_060)
		physaddr |= _PAGE_GLOBAL040;

	while (size > 0) {
#ifdef DEBUG
		if (!(virtaddr & (PTRTREESIZE-1)))
			printk ("\npa=%#lx va=%#lx ", physaddr & PAGE_MASK,
				virtaddr);
#endif
		pgd_dir = pgd_offset_k(virtaddr);
		if (virtaddr && CPU_IS_020_OR_030) {
			if (!(virtaddr & (ROOTTREESIZE-1)) &&
			    size >= ROOTTREESIZE) {
#ifdef DEBUG
				printk ("[very early term]");
#endif
				pgd_val(*pgd_dir) = physaddr;
				size -= ROOTTREESIZE;
				virtaddr += ROOTTREESIZE;
				physaddr += ROOTTREESIZE;
				continue;
			}
		}
		if (!pgd_present(*pgd_dir)) {
			pmd_dir = kernel_ptr_table();
#ifdef DEBUG
			printk ("[new pointer %p]", pmd_dir);
#endif
			pgd_set(pgd_dir, pmd_dir);
		} else
			pmd_dir = pmd_offset(pgd_dir, virtaddr);

		if (CPU_IS_020_OR_030) {
			if (virtaddr) {
#ifdef DEBUG
				printk ("[early term]");
#endif
				pmd_dir->pmd[(virtaddr/PTRTREESIZE) & 15] = physaddr;
				physaddr += PTRTREESIZE;
			} else {
				int i;
#ifdef DEBUG
				printk ("[zero map]");
#endif
				zero_pgtable = kernel_ptr_table();
				pte_dir = (pte_t *)zero_pgtable;
				pmd_dir->pmd[0] = virt_to_phys(pte_dir) |
					_PAGE_TABLE | _PAGE_ACCESSED;
				pte_val(*pte_dir++) = 0;
				physaddr += PAGE_SIZE;
				for (i = 1; i < 64; physaddr += PAGE_SIZE, i++)
					pte_val(*pte_dir++) = physaddr;
			}
			size -= PTRTREESIZE;
			virtaddr += PTRTREESIZE;
		} else {
			if (!pmd_present(*pmd_dir)) {
#ifdef DEBUG
				printk ("[new table]");
#endif
				pte_dir = kernel_page_table();
				pmd_set(pmd_dir, pte_dir);
			}
			pte_dir = pte_offset(pmd_dir, virtaddr);

			if (virtaddr) {
				if (!pte_present(*pte_dir))
					pte_val(*pte_dir) = physaddr;
			} else
				pte_val(*pte_dir) = 0;
			size -= PAGE_SIZE;
			virtaddr += PAGE_SIZE;
			physaddr += PAGE_SIZE;
		}

	}
#ifdef DEBUG
	printk("\n");
#endif

	return virtaddr;
}

extern unsigned long empty_bad_page_table;
extern unsigned long empty_bad_page;

/*
 * paging_init() continues the virtual memory environment setup which
 * was begun by the code in arch/head.S.
 */
void __init paging_init(void)
{
	int chunk;
	unsigned long mem_avail = 0;
	unsigned long zones_size[3] = { 0, };

#ifdef DEBUG
	{
		extern unsigned long availmem;
		printk ("start of paging_init (%p, %lx, %lx, %lx)\n",
			kernel_pg_dir, availmem, start_mem, end_mem);
	}
#endif

	/* Fix the cache mode in the page descriptors for the 680[46]0.  */
	if (CPU_IS_040_OR_060) {
		int i;
#ifndef mm_cachebits
		mm_cachebits = _PAGE_CACHE040;
#endif
		for (i = 0; i < 16; i++)
			pgprot_val(protection_map[i]) |= _PAGE_CACHE040;
	}
	/* Fix the PAGE_NONE value. */
	if (CPU_IS_040_OR_060) {
		/* On the 680[46]0 we can use the _PAGE_SUPER bit.  */
		pgprot_val(protection_map[0]) |= _PAGE_SUPER;
		pgprot_val(protection_map[VM_SHARED]) |= _PAGE_SUPER;
	} else {
		/* Otherwise we must fake it. */
		pgprot_val(protection_map[0]) &= ~_PAGE_PRESENT;
		pgprot_val(protection_map[0]) |= _PAGE_FAKE_SUPER;
		pgprot_val(protection_map[VM_SHARED]) &= ~_PAGE_PRESENT;
		pgprot_val(protection_map[VM_SHARED]) |= _PAGE_FAKE_SUPER;
	}

	/*
	 * Map the physical memory available into the kernel virtual
	 * address space.  It may allocate some memory for page
	 * tables and thus modify availmem.
	 */

	for (chunk = 0; chunk < m68k_num_memory; chunk++) {
		mem_avail = map_chunk (m68k_memory[chunk].addr,
				       m68k_memory[chunk].size);

	}

	flush_tlb_all();
#ifdef DEBUG
	printk ("memory available is %ldKB\n", mem_avail >> 10);
	printk ("start_mem is %#lx\nvirtual_end is %#lx\n",
		start_mem, end_mem);
#endif

	/*
	 * initialize the bad page table and bad page to point
	 * to a couple of allocated pages
	 */
	empty_bad_page_table = (unsigned long)alloc_bootmem_pages(PAGE_SIZE);
	empty_bad_page = (unsigned long)alloc_bootmem_pages(PAGE_SIZE);
	empty_zero_page = (unsigned long)alloc_bootmem_pages(PAGE_SIZE);
	memset((void *)empty_zero_page, 0, PAGE_SIZE);

	/*
	 * Set up SFC/DFC registers (user data space)
	 */
	set_fs (USER_DS);

#ifdef DEBUG
	printk ("before free_area_init\n");
#endif
	zones_size[0] = (mach_max_dma_address < (unsigned long)high_memory ?
			 mach_max_dma_address : (unsigned long)high_memory);
	zones_size[1] = (unsigned long)high_memory - zones_size[0];

	zones_size[0] = (zones_size[0] - PAGE_OFFSET) >> PAGE_SHIFT;
	zones_size[1] >>= PAGE_SHIFT;

	free_area_init(zones_size);
}

extern char __init_begin, __init_end;
extern unsigned long totalram_pages;

void free_initmem(void)
{
	unsigned long addr;

	addr = (unsigned long)&__init_begin;
	for (; addr < (unsigned long)&__init_end; addr += PAGE_SIZE) {
		virt_to_page(addr)->flags &= ~(1 << PG_reserved);
		set_page_count(virt_to_page(addr), 1);
		free_page(addr);
		totalram_pages++;
	}
}


/* 
 * linux/arch/m68k/mm/sun3mmu.c
 *
 * Implementations of mm routines specific to the sun3 MMU.
 *
 * Moved here 8/20/1999 Sam Creasey
 *
 */

#include <linux/config.h>
#include <linux/signal.h>
#include <linux/sched.h>
#include <linux/mm.h>
#include <linux/swap.h>
#include <linux/kernel.h>
#include <linux/string.h>
#include <linux/types.h>
#include <linux/init.h>
#ifdef CONFIG_BLK_DEV_RAM
#include <linux/blk.h>
#endif
#include <linux/bootmem.h>

#include <asm/setup.h>
#include <asm/uaccess.h>
#include <asm/page.h>
#include <asm/pgtable.h>
#include <asm/system.h>
#include <asm/machdep.h>
#include <asm/io.h>

extern void mmu_emu_init (unsigned long bootmem_end);

const char bad_pmd_string[] = "Bad pmd in pte_alloc: %08lx\n";

extern unsigned long empty_bad_page_table;
extern unsigned long empty_bad_page;
extern unsigned long num_pages;

void free_initmem(void)
{
}

/* For the sun3 we try to follow the i386 paging_init() more closely */
/* start_mem and end_mem have PAGE_OFFSET added already */
/* now sets up tables using sun3 PTEs rather than i386 as before. --m */
void __init paging_init(void)
{
	pgd_t * pg_dir;
	pte_t * pg_table;
	int i;
	unsigned long address;
	unsigned long next_pgtable;
	unsigned long bootmem_end;
	unsigned long zones_size[3] = {0, 0, 0};
	unsigned long size;


#ifdef TEST_VERIFY_AREA
	wp_works_ok = 0;
#endif
	empty_bad_page_table = (unsigned long)alloc_bootmem_pages(PAGE_SIZE);
	empty_bad_page = (unsigned long)alloc_bootmem_pages(PAGE_SIZE);
	empty_zero_page = (unsigned long)alloc_bootmem_pages(PAGE_SIZE);
	memset((void *)empty_zero_page, 0, PAGE_SIZE);

	address = PAGE_OFFSET;
	pg_dir = swapper_pg_dir;
	memset (swapper_pg_dir, 0, sizeof (swapper_pg_dir));
	memset (kernel_pg_dir,  0, sizeof (kernel_pg_dir));

	size = num_pages * sizeof(pte_t);
	size = (size + PAGE_SIZE) & ~(PAGE_SIZE-1);
	
	next_pgtable = (unsigned long)alloc_bootmem_pages(size);
	bootmem_end = (next_pgtable + size + PAGE_SIZE) & PAGE_MASK;

	/* Map whole memory from PAGE_OFFSET (0x0E000000) */
	pg_dir += PAGE_OFFSET >> PGDIR_SHIFT; 

	while (address < (unsigned long)high_memory) {
		pg_table = (pte_t *) __pa (next_pgtable);
		next_pgtable += PTRS_PER_PTE * sizeof (pte_t);
		pgd_val(*pg_dir) = (unsigned long) pg_table;
		pg_dir++;

		/* now change pg_table to kernel virtual addresses */
		pg_table = (pte_t *) __va ((unsigned long) pg_table);
		for (i=0; i<PTRS_PER_PTE; ++i, ++pg_table) {
			pte_t pte = __mk_pte(address, PAGE_INIT);
			if (address >= (unsigned long)high_memory)
				pte_val (pte) = 0;
			set_pte (pg_table, pte);
			address += PAGE_SIZE;
		}
	}

	mmu_emu_init(bootmem_end);
	
	current->mm = NULL;

	/* memory sizing is a hack stolen from motorola.c..  hope it works for us */
	zones_size[1] = ((unsigned long)high_memory - PAGE_OFFSET) >> PAGE_SHIFT;
	zones_size[0] = zones_size[1]/2;
	zones_size[1] -= zones_size[0];
	
	free_area_init(zones_size);

}


#
# Makefile for Linux arch/m68k/fpsp040 source directory
#
# Note! Dependencies are done automagically by 'make dep', which also
# removes any old dependencies. DON'T put your own dependencies here
# unless it's something special (ie not a .c file).
#
# Note 2! The CFLAGS definitions are now in the main makefile...

.S.o:
	$(CC) $(AFLAGS) -traditional -c -o $*.o $<

OS_TARGET := fpsp.o

OS_OBJS   := bindec.o binstr.o decbin.o do_func.o gen_except.o get_op.o \
	    kernel_ex.o res_func.o round.o sacos.o sasin.o satan.o satanh.o \
	    scosh.o setox.o sgetem.o sint.o slog2.o slogn.o \
	    smovecr.o srem_mod.o scale.o \
	    ssin.o ssinh.o stan.o stanh.o sto_res.o stwotox.o tbldo.o util.o \
	    x_bsun.o x_fline.o x_operr.o x_ovfl.o x_snan.o x_store.o \
	    x_unfl.o x_unimp.o x_unsupp.o bugfix.o skeleton.o

all:	$(OS_TARGET)

include $(TOPDIR)/Rules.make

$(OS_OBJS): fpsp.h

$(OS_TARGET): $(OS_OBJS) fpsp.h
	$(LD) -x -r -o $(OS_TARGET) $(OS_OBJS)
|
|	bindec.sa 3.4 1/3/91
|
|	bindec
|
|	Description:
|		Converts an input in extended precision format
|		to bcd format.
|
|	Input:
|		a0 points to the input extended precision value
|		value in memory; d0 contains the k-factor sign-extended
|		to 32-bits.  The input may be either normalized,
|		unnormalized, or denormalized.
|
|	Output:	result in the FP_SCR1 space on the stack.
|
|	Saves and Modifies: D2-D7,A2,FP2
|
|	Algorithm:
|
|	A1.	Set RM and size ext;  Set SIGMA = sign of input.  
|		The k-factor is saved for use in d7. Clear the
|		BINDEC_FLG for separating normalized/denormalized
|		input.  If input is unnormalized or denormalized,
|		normalize it.
|
|	A2.	Set X = abs(input).
|
|	A3.	Compute ILOG.
|		ILOG is the log base 10 of the input value.  It is
|		approximated by adding e + 0.f when the original 
|		value is viewed as 2^^e * 1.f in extended precision.  
|		This value is stored in d6.
|
|	A4.	Clr INEX bit.
|		The operation in A3 above may have set INEX2.  
|
|	A5.	Set ICTR = 0;
|		ICTR is a flag used in A13.  It must be set before the 
|		loop entry A6.
|
|	A6.	Calculate LEN.
|		LEN is the number of digits to be displayed.  The
|		k-factor can dictate either the total number of digits,
|		if it is a positive number, or the number of digits
|		after the decimal point which are to be included as
|		significant.  See the 68882 manual for examples.
|		If LEN is computed to be greater than 17, set OPERR in
|		USER_FPSR.  LEN is stored in d4.
|
|	A7.	Calculate SCALE.
|		SCALE is equal to 10^ISCALE, where ISCALE is the number
|		of decimal places needed to insure LEN integer digits
|		in the output before conversion to bcd. LAMBDA is the
|		sign of ISCALE, used in A9. Fp1 contains
|		10^^(abs(ISCALE)) using a rounding mode which is a
|		function of the original rounding mode and the signs
|		of ISCALE and X.  A table is given in the code.
|
|	A8.	Clr INEX; Force RZ.
|		The operation in A3 above may have set INEX2.  
|		RZ mode is forced for the scaling operation to insure
|		only one rounding error.  The grs bits are collected in 
|		the INEX flag for use in A10.
|
|	A9.	Scale X -> Y.
|		The mantissa is scaled to the desired number of
|		significant digits.  The excess digits are collected
|		in INEX2.
|
|	A10.	Or in INEX.
|		If INEX is set, round error occurred.  This is
|		compensated for by 'or-ing' in the INEX2 flag to
|		the lsb of Y.
|
|	A11.	Restore original FPCR; set size ext.
|		Perform FINT operation in the user's rounding mode.
|		Keep the size to extended.
|
|	A12.	Calculate YINT = FINT(Y) according to user's rounding
|		mode.  The FPSP routine sintd0 is used.  The output
|		is in fp0.
|
|	A13.	Check for LEN digits.
|		If the int operation results in more than LEN digits,
|		or less than LEN -1 digits, adjust ILOG and repeat from
|		A6.  This test occurs only on the first pass.  If the
|		result is exactly 10^LEN, decrement ILOG and divide
|		the mantissa by 10.
|
|	A14.	Convert the mantissa to bcd.
|		The binstr routine is used to convert the LEN digit 
|		mantissa to bcd in memory.  The input to binstr is
|		to be a fraction; i.e. (mantissa)/10^LEN and adjusted
|		such that the decimal point is to the left of bit 63.
|		The bcd digits are stored in the correct position in 
|		the final string area in memory.
|
|	A15.	Convert the exponent to bcd.
|		As in A14 above, the exp is converted to bcd and the
|		digits are stored in the final string.
|		Test the length of the final exponent string.  If the
|		length is 4, set operr.
|
|	A16.	Write sign bits to final string.
|
|	Implementation Notes:
|
|	The registers are used as follows:
|
|		d0: scratch; LEN input to binstr
|		d1: scratch
|		d2: upper 32-bits of mantissa for binstr
|		d3: scratch;lower 32-bits of mantissa for binstr
|		d4: LEN
|      		d5: LAMBDA/ICTR
|		d6: ILOG
|		d7: k-factor
|		a0: ptr for original operand/final result
|		a1: scratch pointer
|		a2: pointer to FP_X; abs(original value) in ext
|		fp0: scratch
|		fp1: scratch
|		fp2: scratch
|		F_SCR1:
|		F_SCR2:
|		L_SCR1:
|		L_SCR2:

|		Copyright (C) Motorola, Inc. 1990
|			All Rights Reserved
|
|	THIS IS UNPUBLISHED PROPRIETARY SOURCE CODE OF MOTOROLA 
|	The copyright notice above does not evidence any  
|	actual or intended publication of such source code.

|BINDEC    idnt    2,1 | Motorola 040 Floating Point Software Package

	.include "fpsp.h"

	|section	8

| Constants in extended precision
LOG2: 	.long	0x3FFD0000,0x9A209A84,0xFBCFF798,0x00000000
LOG2UP1:	.long	0x3FFD0000,0x9A209A84,0xFBCFF799,0x00000000

| Constants in single precision
FONE: 	.long	0x3F800000,0x00000000,0x00000000,0x00000000
FTWO:	.long	0x40000000,0x00000000,0x00000000,0x00000000
FTEN: 	.long	0x41200000,0x00000000,0x00000000,0x00000000
F4933:	.long	0x459A2800,0x00000000,0x00000000,0x00000000

RBDTBL: 	.byte	0,0,0,0
	.byte	3,3,2,2
	.byte	3,2,2,3
	.byte	2,3,3,2

	|xref	binstr
	|xref	sintdo
	|xref	ptenrn,ptenrm,ptenrp

	.global	bindec
	.global	sc_mul
bindec:
	moveml	%d2-%d7/%a2,-(%a7)
	fmovemx %fp0-%fp2,-(%a7)

| A1. Set RM and size ext. Set SIGMA = sign input;
|     The k-factor is saved for use in d7.  Clear BINDEC_FLG for
|     separating  normalized/denormalized input.  If the input
|     is a denormalized number, set the BINDEC_FLG memory word
|     to signal denorm.  If the input is unnormalized, normalize
|     the input and test for denormalized result.  
|
	fmovel	#rm_mode,%FPCR	|set RM and ext
	movel	(%a0),L_SCR2(%a6)	|save exponent for sign check
	movel	%d0,%d7		|move k-factor to d7
	clrb	BINDEC_FLG(%a6)	|clr norm/denorm flag
	movew	STAG(%a6),%d0	|get stag
	andiw	#0xe000,%d0	|isolate stag bits
	beq	A2_str		|if zero, input is norm
|
| Normalize the denorm
|
un_de_norm:
	movew	(%a0),%d0
	andiw	#0x7fff,%d0	|strip sign of normalized exp
	movel	4(%a0),%d1
	movel	8(%a0),%d2
norm_loop:
	subw	#1,%d0
	lsll	#1,%d2
	roxll	#1,%d1
	tstl	%d1
	bges	norm_loop
|
| Test if the normalized input is denormalized
|
	tstw	%d0
	bgts	pos_exp		|if greater than zero, it is a norm
	st	BINDEC_FLG(%a6)	|set flag for denorm
pos_exp:
	andiw	#0x7fff,%d0	|strip sign of normalized exp
	movew	%d0,(%a0)
	movel	%d1,4(%a0)
	movel	%d2,8(%a0)

| A2. Set X = abs(input).
|
A2_str:
	movel	(%a0),FP_SCR2(%a6) | move input to work space
	movel	4(%a0),FP_SCR2+4(%a6) | move input to work space
	movel	8(%a0),FP_SCR2+8(%a6) | move input to work space
	andil	#0x7fffffff,FP_SCR2(%a6) |create abs(X)

| A3. Compute ILOG.
|     ILOG is the log base 10 of the input value.  It is approx-
|     imated by adding e + 0.f when the original value is viewed
|     as 2^^e * 1.f in extended precision.  This value is stored
|     in d6.
|
| Register usage:
|	Input/Output
|	d0: k-factor/exponent
|	d2: x/x
|	d3: x/x
|	d4: x/x
|	d5: x/x
|	d6: x/ILOG
|	d7: k-factor/Unchanged
|	a0: ptr for original operand/final result
|	a1: x/x
|	a2: x/x
|	fp0: x/float(ILOG)
|	fp1: x/x
|	fp2: x/x
|	F_SCR1:x/x
|	F_SCR2:Abs(X)/Abs(X) with $3fff exponent
|	L_SCR1:x/x
|	L_SCR2:first word of X packed/Unchanged

	tstb	BINDEC_FLG(%a6)	|check for denorm
	beqs	A3_cont		|if clr, continue with norm
	movel	#-4933,%d6	|force ILOG = -4933
	bras	A4_str
A3_cont:
	movew	FP_SCR2(%a6),%d0	|move exp to d0
	movew	#0x3fff,FP_SCR2(%a6) |replace exponent with 0x3fff
	fmovex	FP_SCR2(%a6),%fp0	|now fp0 has 1.f
	subw	#0x3fff,%d0	|strip off bias
	faddw	%d0,%fp0		|add in exp
	fsubs	FONE,%fp0	|subtract off 1.0
	fbge	pos_res		|if pos, branch 
	fmulx	LOG2UP1,%fp0	|if neg, mul by LOG2UP1
	fmovel	%fp0,%d6		|put ILOG in d6 as a lword
	bras	A4_str		|go move out ILOG
pos_res:
	fmulx	LOG2,%fp0	|if pos, mul by LOG2
	fmovel	%fp0,%d6		|put ILOG in d6 as a lword


| A4. Clr INEX bit.
|     The operation in A3 above may have set INEX2.  

A4_str:	
	fmovel	#0,%FPSR		|zero all of fpsr - nothing needed


| A5. Set ICTR = 0;
|     ICTR is a flag used in A13.  It must be set before the 
|     loop entry A6. The lower word of d5 is used for ICTR.

	clrw	%d5		|clear ICTR


| A6. Calculate LEN.
|     LEN is the number of digits to be displayed.  The k-factor
|     can dictate either the total number of digits, if it is
|     a positive number, or the number of digits after the
|     original decimal point which are to be included as
|     significant.  See the 68882 manual for examples.
|     If LEN is computed to be greater than 17, set OPERR in
|     USER_FPSR.  LEN is stored in d4.
|
| Register usage:
|	Input/Output
|	d0: exponent/Unchanged
|	d2: x/x/scratch
|	d3: x/x
|	d4: exc picture/LEN
|	d5: ICTR/Unchanged
|	d6: ILOG/Unchanged
|	d7: k-factor/Unchanged
|	a0: ptr for original operand/final result
|	a1: x/x
|	a2: x/x
|	fp0: float(ILOG)/Unchanged
|	fp1: x/x
|	fp2: x/x
|	F_SCR1:x/x
|	F_SCR2:Abs(X) with $3fff exponent/Unchanged
|	L_SCR1:x/x
|	L_SCR2:first word of X packed/Unchanged

A6_str:	
	tstl	%d7		|branch on sign of k
	bles	k_neg		|if k <= 0, LEN = ILOG + 1 - k
	movel	%d7,%d4		|if k > 0, LEN = k
	bras	len_ck		|skip to LEN check
k_neg:
	movel	%d6,%d4		|first load ILOG to d4
	subl	%d7,%d4		|subtract off k
	addql	#1,%d4		|add in the 1
len_ck:
	tstl	%d4		|LEN check: branch on sign of LEN
	bles	LEN_ng		|if neg, set LEN = 1
	cmpl	#17,%d4		|test if LEN > 17
	bles	A7_str		|if not, forget it
	movel	#17,%d4		|set max LEN = 17
	tstl	%d7		|if negative, never set OPERR
	bles	A7_str		|if positive, continue
	orl	#opaop_mask,USER_FPSR(%a6) |set OPERR & AIOP in USER_FPSR
	bras	A7_str		|finished here
LEN_ng:
	moveql	#1,%d4		|min LEN is 1


| A7. Calculate SCALE.
|     SCALE is equal to 10^ISCALE, where ISCALE is the number
|     of decimal places needed to insure LEN integer digits
|     in the output before conversion to bcd. LAMBDA is the sign
|     of ISCALE, used in A9.  Fp1 contains 10^^(abs(ISCALE)) using
|     the rounding mode as given in the following table (see
|     Coonen, p. 7.23 as ref.; however, the SCALE variable is
|     of opposite sign in bindec.sa from Coonen).
|
|	Initial					USE
|	FPCR[6:5]	LAMBDA	SIGN(X)		FPCR[6:5]
|	----------------------------------------------
|	 RN	00	   0	   0		00/0	RN
|	 RN	00	   0	   1		00/0	RN
|	 RN	00	   1	   0		00/0	RN
|	 RN	00	   1	   1		00/0	RN
|	 RZ	01	   0	   0		11/3	RP
|	 RZ	01	   0	   1		11/3	RP
|	 RZ	01	   1	   0		10/2	RM
|	 RZ	01	   1	   1		10/2	RM
|	 RM	10	   0	   0		11/3	RP
|	 RM	10	   0	   1		10/2	RM
|	 RM	10	   1	   0		10/2	RM
|	 RM	10	   1	   1		11/3	RP
|	 RP	11	   0	   0		10/2	RM
|	 RP	11	   0	   1		11/3	RP
|	 RP	11	   1	   0		11/3	RP
|	 RP	11	   1	   1		10/2	RM
|
| Register usage:
|	Input/Output
|	d0: exponent/scratch - final is 0
|	d2: x/0 or 24 for A9
|	d3: x/scratch - offset ptr into PTENRM array
|	d4: LEN/Unchanged
|	d5: 0/ICTR:LAMBDA
|	d6: ILOG/ILOG or k if ((k<=0)&(ILOG<k))
|	d7: k-factor/Unchanged
|	a0: ptr for original operand/final result
|	a1: x/ptr to PTENRM array
|	a2: x/x
|	fp0: float(ILOG)/Unchanged
|	fp1: x/10^ISCALE
|	fp2: x/x
|	F_SCR1:x/x
|	F_SCR2:Abs(X) with $3fff exponent/Unchanged
|	L_SCR1:x/x
|	L_SCR2:first word of X packed/Unchanged

A7_str:	
	tstl	%d7		|test sign of k
	bgts	k_pos		|if pos and > 0, skip this
	cmpl	%d6,%d7		|test k - ILOG
	blts	k_pos		|if ILOG >= k, skip this
	movel	%d7,%d6		|if ((k<0) & (ILOG < k)) ILOG = k
k_pos:	
	movel	%d6,%d0		|calc ILOG + 1 - LEN in d0
	addql	#1,%d0		|add the 1
	subl	%d4,%d0		|sub off LEN
	swap	%d5		|use upper word of d5 for LAMBDA
	clrw	%d5		|set it zero initially
	clrw	%d2		|set up d2 for very small case
	tstl	%d0		|test sign of ISCALE
	bges	iscale		|if pos, skip next inst
	addqw	#1,%d5		|if neg, set LAMBDA true
	cmpl	#0xffffecd4,%d0	|test iscale <= -4908
	bgts	no_inf		|if false, skip rest
	addil	#24,%d0		|add in 24 to iscale
	movel	#24,%d2		|put 24 in d2 for A9
no_inf:	
	negl	%d0		|and take abs of ISCALE
iscale:	
	fmoves	FONE,%fp1	|init fp1 to 1
	bfextu	USER_FPCR(%a6){#26:#2},%d1 |get initial rmode bits
	lslw	#1,%d1		|put them in bits 2:1
	addw	%d5,%d1		|add in LAMBDA
	lslw	#1,%d1		|put them in bits 3:1
	tstl	L_SCR2(%a6)	|test sign of original x
	bges	x_pos		|if pos, don't set bit 0
	addql	#1,%d1		|if neg, set bit 0
x_pos:
	leal	RBDTBL,%a2	|load rbdtbl base
	moveb	(%a2,%d1),%d3	|load d3 with new rmode
	lsll	#4,%d3		|put bits in proper position
	fmovel	%d3,%fpcr		|load bits into fpu
	lsrl	#4,%d3		|put bits in proper position
	tstb	%d3		|decode new rmode for pten table
	bnes	not_rn		|if zero, it is RN
	leal	PTENRN,%a1	|load a1 with RN table base
	bras	rmode		|exit decode
not_rn:
	lsrb	#1,%d3		|get lsb in carry
	bccs	not_rp		|if carry clear, it is RM
	leal	PTENRP,%a1	|load a1 with RP table base
	bras	rmode		|exit decode
not_rp:
	leal	PTENRM,%a1	|load a1 with RM table base
rmode:
	clrl	%d3		|clr table index
e_loop:	
	lsrl	#1,%d0		|shift next bit into carry
	bccs	e_next		|if zero, skip the mul
	fmulx	(%a1,%d3),%fp1	|mul by 10**(d3_bit_no)
e_next:	
	addl	#12,%d3		|inc d3 to next pwrten table entry
	tstl	%d0		|test if ISCALE is zero
	bnes	e_loop		|if not, loop


| A8. Clr INEX; Force RZ.
|     The operation in A3 above may have set INEX2.  
|     RZ mode is forced for the scaling operation to insure
|     only one rounding error.  The grs bits are collected in 
|     the INEX flag for use in A10.
|
| Register usage:
|	Input/Output

	fmovel	#0,%FPSR		|clr INEX 
	fmovel	#rz_mode,%FPCR	|set RZ rounding mode


| A9. Scale X -> Y.
|     The mantissa is scaled to the desired number of significant
|     digits.  The excess digits are collected in INEX2. If mul,
|     Check d2 for excess 10 exponential value.  If not zero, 
|     the iscale value would have caused the pwrten calculation
|     to overflow.  Only a negative iscale can cause this, so
|     multiply by 10^(d2), which is now only allowed to be 24,
|     with a multiply by 10^8 and 10^16, which is exact since
|     10^24 is exact.  If the input was denormalized, we must
|     create a busy stack frame with the mul command and the
|     two operands, and allow the fpu to complete the multiply.
|
| Register usage:
|	Input/Output
|	d0: FPCR with RZ mode/Unchanged
|	d2: 0 or 24/unchanged
|	d3: x/x
|	d4: LEN/Unchanged
|	d5: ICTR:LAMBDA
|	d6: ILOG/Unchanged
|	d7: k-factor/Unchanged
|	a0: ptr for original operand/final result
|	a1: ptr to PTENRM array/Unchanged
|	a2: x/x
|	fp0: float(ILOG)/X adjusted for SCALE (Y)
|	fp1: 10^ISCALE/Unchanged
|	fp2: x/x
|	F_SCR1:x/x
|	F_SCR2:Abs(X) with $3fff exponent/Unchanged
|	L_SCR1:x/x
|	L_SCR2:first word of X packed/Unchanged

A9_str:	
	fmovex	(%a0),%fp0	|load X from memory
	fabsx	%fp0		|use abs(X)
	tstw	%d5		|LAMBDA is in lower word of d5
	bne	sc_mul		|if neg (LAMBDA = 1), scale by mul
	fdivx	%fp1,%fp0		|calculate X / SCALE -> Y to fp0
	bras	A10_st		|branch to A10

sc_mul:
	tstb	BINDEC_FLG(%a6)	|check for denorm
	beqs	A9_norm		|if norm, continue with mul
	fmovemx %fp1-%fp1,-(%a7)	|load ETEMP with 10^ISCALE
	movel	8(%a0),-(%a7)	|load FPTEMP with input arg
	movel	4(%a0),-(%a7)
	movel	(%a0),-(%a7)
	movel	#18,%d3		|load count for busy stack
A9_loop:
	clrl	-(%a7)		|clear lword on stack
	dbf	%d3,A9_loop	
	moveb	VER_TMP(%a6),(%a7) |write current version number
	moveb	#BUSY_SIZE-4,1(%a7) |write current busy size 
	moveb	#0x10,0x44(%a7)	|set fcefpte[15] bit
	movew	#0x0023,0x40(%a7)	|load cmdreg1b with mul command
	moveb	#0xfe,0x8(%a7)	|load all 1s to cu savepc
	frestore (%a7)+		|restore frame to fpu for completion
	fmulx	36(%a1),%fp0	|multiply fp0 by 10^8
	fmulx	48(%a1),%fp0	|multiply fp0 by 10^16
	bras	A10_st
A9_norm:
	tstw	%d2		|test for small exp case
	beqs	A9_con		|if zero, continue as normal
	fmulx	36(%a1),%fp0	|multiply fp0 by 10^8
	fmulx	48(%a1),%fp0	|multiply fp0 by 10^16
A9_con:
	fmulx	%fp1,%fp0		|calculate X * SCALE -> Y to fp0


| A10. Or in INEX.
|      If INEX is set, round error occurred.  This is compensated
|      for by 'or-ing' in the INEX2 flag to the lsb of Y.
|
| Register usage:
|	Input/Output
|	d0: FPCR with RZ mode/FPSR with INEX2 isolated
|	d2: x/x
|	d3: x/x
|	d4: LEN/Unchanged
|	d5: ICTR:LAMBDA
|	d6: ILOG/Unchanged
|	d7: k-factor/Unchanged
|	a0: ptr for original operand/final result
|	a1: ptr to PTENxx array/Unchanged
|	a2: x/ptr to FP_SCR2(a6)
|	fp0: Y/Y with lsb adjusted
|	fp1: 10^ISCALE/Unchanged
|	fp2: x/x

A10_st:	
	fmovel	%FPSR,%d0		|get FPSR
	fmovex	%fp0,FP_SCR2(%a6)	|move Y to memory
	leal	FP_SCR2(%a6),%a2	|load a2 with ptr to FP_SCR2
	btstl	#9,%d0		|check if INEX2 set
	beqs	A11_st		|if clear, skip rest
	oril	#1,8(%a2)	|or in 1 to lsb of mantissa
	fmovex	FP_SCR2(%a6),%fp0	|write adjusted Y back to fpu


| A11. Restore original FPCR; set size ext.
|      Perform FINT operation in the user's rounding mode.  Keep
|      the size to extended.  The sintdo entry point in the sint
|      routine expects the FPCR value to be in USER_FPCR for
|      mode and precision.  The original FPCR is saved in L_SCR1.

A11_st:	
	movel	USER_FPCR(%a6),L_SCR1(%a6) |save it for later
	andil	#0x00000030,USER_FPCR(%a6) |set size to ext, 
|					;block exceptions


| A12. Calculate YINT = FINT(Y) according to user's rounding mode.
|      The FPSP routine sintd0 is used.  The output is in fp0.
|
| Register usage:
|	Input/Output
|	d0: FPSR with AINEX cleared/FPCR with size set to ext
|	d2: x/x/scratch
|	d3: x/x
|	d4: LEN/Unchanged
|	d5: ICTR:LAMBDA/Unchanged
|	d6: ILOG/Unchanged
|	d7: k-factor/Unchanged
|	a0: ptr for original operand/src ptr for sintdo
|	a1: ptr to PTENxx array/Unchanged
|	a2: ptr to FP_SCR2(a6)/Unchanged
|	a6: temp pointer to FP_SCR2(a6) - orig value saved and restored
|	fp0: Y/YINT
|	fp1: 10^ISCALE/Unchanged
|	fp2: x/x
|	F_SCR1:x/x
|	F_SCR2:Y adjusted for inex/Y with original exponent
|	L_SCR1:x/original USER_FPCR
|	L_SCR2:first word of X packed/Unchanged

A12_st:
	moveml	%d0-%d1/%a0-%a1,-(%a7)	|save regs used by sintd0	
	movel	L_SCR1(%a6),-(%a7)
	movel	L_SCR2(%a6),-(%a7)
	leal	FP_SCR2(%a6),%a0		|a0 is ptr to F_SCR2(a6)
	fmovex	%fp0,(%a0)		|move Y to memory at FP_SCR2(a6)
	tstl	L_SCR2(%a6)		|test sign of original operand
	bges	do_fint			|if pos, use Y 
	orl	#0x80000000,(%a0)		|if neg, use -Y
do_fint:
	movel	USER_FPSR(%a6),-(%a7)
	bsr	sintdo			|sint routine returns int in fp0
	moveb	(%a7),USER_FPSR(%a6)
	addl	#4,%a7
	movel	(%a7)+,L_SCR2(%a6)
	movel	(%a7)+,L_SCR1(%a6)
	moveml	(%a7)+,%d0-%d1/%a0-%a1	|restore regs used by sint	
	movel	L_SCR2(%a6),FP_SCR2(%a6)	|restore original exponent
	movel	L_SCR1(%a6),USER_FPCR(%a6) |restore user's FPCR


| A13. Check for LEN digits.
|      If the int operation results in more than LEN digits,
|      or less than LEN -1 digits, adjust ILOG and repeat from
|      A6.  This test occurs only on the first pass.  If the
|      result is exactly 10^LEN, decrement ILOG and divide
|      the mantissa by 10.  The calculation of 10^LEN cannot
|      be inexact, since all powers of ten upto 10^27 are exact
|      in extended precision, so the use of a previous power-of-ten
|      table will introduce no error.
|
|
| Register usage:
|	Input/Output
|	d0: FPCR with size set to ext/scratch final = 0
|	d2: x/x
|	d3: x/scratch final = x
|	d4: LEN/LEN adjusted
|	d5: ICTR:LAMBDA/LAMBDA:ICTR
|	d6: ILOG/ILOG adjusted
|	d7: k-factor/Unchanged
|	a0: pointer into memory for packed bcd string formation
|	a1: ptr to PTENxx array/Unchanged
|	a2: ptr to FP_SCR2(a6)/Unchanged
|	fp0: int portion of Y/abs(YINT) adjusted
|	fp1: 10^ISCALE/Unchanged
|	fp2: x/10^LEN
|	F_SCR1:x/x
|	F_SCR2:Y with original exponent/Unchanged
|	L_SCR1:original USER_FPCR/Unchanged
|	L_SCR2:first word of X packed/Unchanged

A13_st:	
	swap	%d5		|put ICTR in lower word of d5
	tstw	%d5		|check if ICTR = 0
	bne	not_zr		|if non-zero, go to second test
|
| Compute 10^(LEN-1)
|
	fmoves	FONE,%fp2	|init fp2 to 1.0
	movel	%d4,%d0		|put LEN in d0
	subql	#1,%d0		|d0 = LEN -1
	clrl	%d3		|clr table index
l_loop:	
	lsrl	#1,%d0		|shift next bit into carry
	bccs	l_next		|if zero, skip the mul
	fmulx	(%a1,%d3),%fp2	|mul by 10**(d3_bit_no)
l_next:
	addl	#12,%d3		|inc d3 to next pwrten table entry
	tstl	%d0		|test if LEN is zero
	bnes	l_loop		|if not, loop
|
| 10^LEN-1 is computed for this test and A14.  If the input was
| denormalized, check only the case in which YINT > 10^LEN.
|
	tstb	BINDEC_FLG(%a6)	|check if input was norm
	beqs	A13_con		|if norm, continue with checking
	fabsx	%fp0		|take abs of YINT
	bra	test_2
|
| Compare abs(YINT) to 10^(LEN-1) and 10^LEN
|
A13_con:
	fabsx	%fp0		|take abs of YINT
	fcmpx	%fp2,%fp0		|compare abs(YINT) with 10^(LEN-1)
	fbge	test_2		|if greater, do next test
	subql	#1,%d6		|subtract 1 from ILOG
	movew	#1,%d5		|set ICTR
	fmovel	#rm_mode,%FPCR	|set rmode to RM
	fmuls	FTEN,%fp2	|compute 10^LEN 
	bra	A6_str		|return to A6 and recompute YINT
test_2:
	fmuls	FTEN,%fp2	|compute 10^LEN
	fcmpx	%fp2,%fp0		|compare abs(YINT) with 10^LEN
	fblt	A14_st		|if less, all is ok, go to A14
	fbgt	fix_ex		|if greater, fix and redo
	fdivs	FTEN,%fp0	|if equal, divide by 10
	addql	#1,%d6		| and inc ILOG
	bras	A14_st		| and continue elsewhere
fix_ex:
	addql	#1,%d6		|increment ILOG by 1
	movew	#1,%d5		|set ICTR
	fmovel	#rm_mode,%FPCR	|set rmode to RM
	bra	A6_str		|return to A6 and recompute YINT
|
| Since ICTR <> 0, we have already been through one adjustment, 
| and shouldn't have another; this is to check if abs(YINT) = 10^LEN
| 10^LEN is again computed using whatever table is in a1 since the
| value calculated cannot be inexact.
|
not_zr:
	fmoves	FONE,%fp2	|init fp2 to 1.0
	movel	%d4,%d0		|put LEN in d0
	clrl	%d3		|clr table index
z_loop:
	lsrl	#1,%d0		|shift next bit into carry
	bccs	z_next		|if zero, skip the mul
	fmulx	(%a1,%d3),%fp2	|mul by 10**(d3_bit_no)
z_next:
	addl	#12,%d3		|inc d3 to next pwrten table entry
	tstl	%d0		|test if LEN is zero
	bnes	z_loop		|if not, loop
	fabsx	%fp0		|get abs(YINT)
	fcmpx	%fp2,%fp0		|check if abs(YINT) = 10^LEN
	fbne	A14_st		|if not, skip this
	fdivs	FTEN,%fp0	|divide abs(YINT) by 10
	addql	#1,%d6		|and inc ILOG by 1
	addql	#1,%d4		| and inc LEN
	fmuls	FTEN,%fp2	| if LEN++, the get 10^^LEN


| A14. Convert the mantissa to bcd.
|      The binstr routine is used to convert the LEN digit 
|      mantissa to bcd in memory.  The input to binstr is
|      to be a fraction; i.e. (mantissa)/10^LEN and adjusted
|      such that the decimal point is to the left of bit 63.
|      The bcd digits are stored in the correct position in 
|      the final string area in memory.
|
|
| Register usage:
|	Input/Output
|	d0: x/LEN call to binstr - final is 0
|	d1: x/0
|	d2: x/ms 32-bits of mant of abs(YINT)
|	d3: x/ls 32-bits of mant of abs(YINT)
|	d4: LEN/Unchanged
|	d5: ICTR:LAMBDA/LAMBDA:ICTR
|	d6: ILOG
|	d7: k-factor/Unchanged
|	a0: pointer into memory for packed bcd string formation
|	    /ptr to first mantissa byte in result string
|	a1: ptr to PTENxx array/Unchanged
|	a2: ptr to FP_SCR2(a6)/Unchanged
|	fp0: int portion of Y/abs(YINT) adjusted
|	fp1: 10^ISCALE/Unchanged
|	fp2: 10^LEN/Unchanged
|	F_SCR1:x/Work area for final result
|	F_SCR2:Y with original exponent/Unchanged
|	L_SCR1:original USER_FPCR/Unchanged
|	L_SCR2:first word of X packed/Unchanged

A14_st:	
	fmovel	#rz_mode,%FPCR	|force rz for conversion
	fdivx	%fp2,%fp0		|divide abs(YINT) by 10^LEN
	leal	FP_SCR1(%a6),%a0
	fmovex	%fp0,(%a0)	|move abs(YINT)/10^LEN to memory
	movel	4(%a0),%d2	|move 2nd word of FP_RES to d2
	movel	8(%a0),%d3	|move 3rd word of FP_RES to d3
	clrl	4(%a0)		|zero word 2 of FP_RES
	clrl	8(%a0)		|zero word 3 of FP_RES
	movel	(%a0),%d0		|move exponent to d0
	swap	%d0		|put exponent in lower word
	beqs	no_sft		|if zero, don't shift
	subil	#0x3ffd,%d0	|sub bias less 2 to make fract
	tstl	%d0		|check if > 1
	bgts	no_sft		|if so, don't shift
	negl	%d0		|make exp positive
m_loop:
	lsrl	#1,%d2		|shift d2:d3 right, add 0s 
	roxrl	#1,%d3		|the number of places
	dbf	%d0,m_loop	|given in d0
no_sft:
	tstl	%d2		|check for mantissa of zero
	bnes	no_zr		|if not, go on
	tstl	%d3		|continue zero check
	beqs	zer_m		|if zero, go directly to binstr
no_zr:
	clrl	%d1		|put zero in d1 for addx
	addil	#0x00000080,%d3	|inc at bit 7
	addxl	%d1,%d2		|continue inc
	andil	#0xffffff80,%d3	|strip off lsb not used by 882
zer_m:
	movel	%d4,%d0		|put LEN in d0 for binstr call
	addql	#3,%a0		|a0 points to M16 byte in result
	bsr	binstr		|call binstr to convert mant


| A15. Convert the exponent to bcd.
|      As in A14 above, the exp is converted to bcd and the
|      digits are stored in the final string.
|
|      Digits are stored in L_SCR1(a6) on return from BINDEC as:
|
|  	 32               16 15                0
|	-----------------------------------------
|  	|  0 | e3 | e2 | e1 | e4 |  X |  X |  X |
|	-----------------------------------------
|
| And are moved into their proper places in FP_SCR1.  If digit e4
| is non-zero, OPERR is signaled.  In all cases, all 4 digits are
| written as specified in the 881/882 manual for packed decimal.
|
| Register usage:
|	Input/Output
|	d0: x/LEN call to binstr - final is 0
|	d1: x/scratch (0);shift count for final exponent packing
|	d2: x/ms 32-bits of exp fraction/scratch
|	d3: x/ls 32-bits of exp fraction
|	d4: LEN/Unchanged
|	d5: ICTR:LAMBDA/LAMBDA:ICTR
|	d6: ILOG
|	d7: k-factor/Unchanged
|	a0: ptr to result string/ptr to L_SCR1(a6)
|	a1: ptr to PTENxx array/Unchanged
|	a2: ptr to FP_SCR2(a6)/Unchanged
|	fp0: abs(YINT) adjusted/float(ILOG)
|	fp1: 10^ISCALE/Unchanged
|	fp2: 10^LEN/Unchanged
|	F_SCR1:Work area for final result/BCD result
|	F_SCR2:Y with original exponent/ILOG/10^4
|	L_SCR1:original USER_FPCR/Exponent digits on return from binstr
|	L_SCR2:first word of X packed/Unchanged

A15_st:	
	tstb	BINDEC_FLG(%a6)	|check for denorm
	beqs	not_denorm
	ftstx	%fp0		|test for zero
	fbeq	den_zero	|if zero, use k-factor or 4933
	fmovel	%d6,%fp0		|float ILOG
	fabsx	%fp0		|get abs of ILOG
	bras	convrt
den_zero:
	tstl	%d7		|check sign of the k-factor
	blts	use_ilog	|if negative, use ILOG
	fmoves	F4933,%fp0	|force exponent to 4933
	bras	convrt		|do it
use_ilog:
	fmovel	%d6,%fp0		|float ILOG
	fabsx	%fp0		|get abs of ILOG
	bras	convrt
not_denorm:
	ftstx	%fp0		|test for zero
	fbne	not_zero	|if zero, force exponent
	fmoves	FONE,%fp0	|force exponent to 1
	bras	convrt		|do it
not_zero:	
	fmovel	%d6,%fp0		|float ILOG
	fabsx	%fp0		|get abs of ILOG
convrt:
	fdivx	24(%a1),%fp0	|compute ILOG/10^4
	fmovex	%fp0,FP_SCR2(%a6)	|store fp0 in memory
	movel	4(%a2),%d2	|move word 2 to d2
	movel	8(%a2),%d3	|move word 3 to d3
	movew	(%a2),%d0		|move exp to d0
	beqs	x_loop_fin	|if zero, skip the shift
	subiw	#0x3ffd,%d0	|subtract off bias
	negw	%d0		|make exp positive
x_loop:
	lsrl	#1,%d2		|shift d2:d3 right 
	roxrl	#1,%d3		|the number of places
	dbf	%d0,x_loop	|given in d0
x_loop_fin:
	clrl	%d1		|put zero in d1 for addx
	addil	#0x00000080,%d3	|inc at bit 6
	addxl	%d1,%d2		|continue inc
	andil	#0xffffff80,%d3	|strip off lsb not used by 882
	movel	#4,%d0		|put 4 in d0 for binstr call
	leal	L_SCR1(%a6),%a0	|a0 is ptr to L_SCR1 for exp digits
	bsr	binstr		|call binstr to convert exp
	movel	L_SCR1(%a6),%d0	|load L_SCR1 lword to d0 
	movel	#12,%d1		|use d1 for shift count
	lsrl	%d1,%d0		|shift d0 right by 12
	bfins	%d0,FP_SCR1(%a6){#4:#12} |put e3:e2:e1 in FP_SCR1
	lsrl	%d1,%d0		|shift d0 right by 12
	bfins	%d0,FP_SCR1(%a6){#16:#4} |put e4 in FP_SCR1 
	tstb	%d0		|check if e4 is zero
	beqs	A16_st		|if zero, skip rest
	orl	#opaop_mask,USER_FPSR(%a6) |set OPERR & AIOP in USER_FPSR


| A16. Write sign bits to final string.
|	   Sigma is bit 31 of initial value; RHO is bit 31 of d6 (ILOG).
|
| Register usage:
|	Input/Output
|	d0: x/scratch - final is x
|	d2: x/x
|	d3: x/x
|	d4: LEN/Unchanged
|	d5: ICTR:LAMBDA/LAMBDA:ICTR
|	d6: ILOG/ILOG adjusted
|	d7: k-factor/Unchanged
|	a0: ptr to L_SCR1(a6)/Unchanged
|	a1: ptr to PTENxx array/Unchanged
|	a2: ptr to FP_SCR2(a6)/Unchanged
|	fp0: float(ILOG)/Unchanged
|	fp1: 10^ISCALE/Unchanged
|	fp2: 10^LEN/Unchanged
|	F_SCR1:BCD result with correct signs
|	F_SCR2:ILOG/10^4
|	L_SCR1:Exponent digits on return from binstr
|	L_SCR2:first word of X packed/Unchanged

A16_st:
	clrl	%d0		|clr d0 for collection of signs
	andib	#0x0f,FP_SCR1(%a6) |clear first nibble of FP_SCR1 
	tstl	L_SCR2(%a6)	|check sign of original mantissa
	bges	mant_p		|if pos, don't set SM
	moveql	#2,%d0		|move 2 in to d0 for SM
mant_p:
	tstl	%d6		|check sign of ILOG
	bges	wr_sgn		|if pos, don't set SE
	addql	#1,%d0		|set bit 0 in d0 for SE 
wr_sgn:
	bfins	%d0,FP_SCR1(%a6){#0:#2} |insert SM and SE into FP_SCR1

| Clean up and restore all registers used.

	fmovel	#0,%FPSR		|clear possible inex2/ainex bits
	fmovemx (%a7)+,%fp0-%fp2
	moveml	(%a7)+,%d2-%d7/%a2
	rts

	|end
|
|	binstr.sa 3.3 12/19/90
|
|
|	Description: Converts a 64-bit binary integer to bcd.
|
|	Input: 64-bit binary integer in d2:d3, desired length (LEN) in
|          d0, and a  pointer to start in memory for bcd characters
|          in d0. (This pointer must point to byte 4 of the first
|          lword of the packed decimal memory string.)
|
|	Output:	LEN bcd digits representing the 64-bit integer.
|
|	Algorithm:
|		The 64-bit binary is assumed to have a decimal point before
|		bit 63.  The fraction is multiplied by 10 using a mul by 2
|		shift and a mul by 8 shift.  The bits shifted out of the
|		msb form a decimal digit.  This process is iterated until
|		LEN digits are formed.
|
|	A1. Init d7 to 1.  D7 is the byte digit counter, and if 1, the
|		digit formed will be assumed the least significant.  This is
|		to force the first byte formed to have a 0 in the upper 4 bits.
|
|	A2. Beginning of the loop:
|		Copy the fraction in d2:d3 to d4:d5.
|
|	A3. Multiply the fraction in d2:d3 by 8 using bit-field
|		extracts and shifts.  The three msbs from d2 will go into
|		d1.
|
|	A4. Multiply the fraction in d4:d5 by 2 using shifts.  The msb
|		will be collected by the carry.
|
|	A5. Add using the carry the 64-bit quantities in d2:d3 and d4:d5
|		into d2:d3.  D1 will contain the bcd digit formed.
|
|	A6. Test d7.  If zero, the digit formed is the ms digit.  If non-
|		zero, it is the ls digit.  Put the digit in its place in the
|		upper word of d0.  If it is the ls digit, write the word
|		from d0 to memory.
|
|	A7. Decrement d6 (LEN counter) and repeat the loop until zero.
|
|	Implementation Notes:
|
|	The registers are used as follows:
|
|		d0: LEN counter
|		d1: temp used to form the digit
|		d2: upper 32-bits of fraction for mul by 8
|		d3: lower 32-bits of fraction for mul by 8
|		d4: upper 32-bits of fraction for mul by 2
|		d5: lower 32-bits of fraction for mul by 2
|		d6: temp for bit-field extracts
|		d7: byte digit formation word;digit count {0,1}
|		a0: pointer into memory for packed bcd string formation
|

|		Copyright (C) Motorola, Inc. 1990
|			All Rights Reserved
|
|	THIS IS UNPUBLISHED PROPRIETARY SOURCE CODE OF MOTOROLA 
|	The copyright notice above does not evidence any  
|	actual or intended publication of such source code.

|BINSTR    idnt    2,1 | Motorola 040 Floating Point Software Package

	|section	8

	.include "fpsp.h"

	.global	binstr
binstr:
	moveml	%d0-%d7,-(%a7)
|
| A1: Init d7
|
	moveql	#1,%d7			|init d7 for second digit
	subql	#1,%d0			|for dbf d0 would have LEN+1 passes
|
| A2. Copy d2:d3 to d4:d5.  Start loop.
|
loop:
	movel	%d2,%d4			|copy the fraction before muls
	movel	%d3,%d5			|to d4:d5
|
| A3. Multiply d2:d3 by 8; extract msbs into d1.
|
	bfextu	%d2{#0:#3},%d1		|copy 3 msbs of d2 into d1
	asll	#3,%d2			|shift d2 left by 3 places
	bfextu	%d3{#0:#3},%d6		|copy 3 msbs of d3 into d6
	asll	#3,%d3			|shift d3 left by 3 places
	orl	%d6,%d2			|or in msbs from d3 into d2
|
| A4. Multiply d4:d5 by 2; add carry out to d1.
|
	asll	#1,%d5			|mul d5 by 2
	roxll	#1,%d4			|mul d4 by 2
	swap	%d6			|put 0 in d6 lower word
	addxw	%d6,%d1			|add in extend from mul by 2
|
| A5. Add mul by 8 to mul by 2.  D1 contains the digit formed.
|
	addl	%d5,%d3			|add lower 32 bits
	nop				|ERRATA ; FIX #13 (Rev. 1.2 6/6/90)
	addxl	%d4,%d2			|add with extend upper 32 bits
	nop				|ERRATA ; FIX #13 (Rev. 1.2 6/6/90)
	addxw	%d6,%d1			|add in extend from add to d1
	swap	%d6			|with d6 = 0; put 0 in upper word
|
| A6. Test d7 and branch.
|
	tstw	%d7			|if zero, store digit & to loop
	beqs	first_d			|if non-zero, form byte & write
sec_d:
	swap	%d7			|bring first digit to word d7b
	aslw	#4,%d7			|first digit in upper 4 bits d7b
	addw	%d1,%d7			|add in ls digit to d7b
	moveb	%d7,(%a0)+		|store d7b byte in memory
	swap	%d7			|put LEN counter in word d7a
	clrw	%d7			|set d7a to signal no digits done
	dbf	%d0,loop		|do loop some more!
	bras	end_bstr		|finished, so exit
first_d:
	swap	%d7			|put digit word in d7b
	movew	%d1,%d7			|put new digit in d7b
	swap	%d7			|put LEN counter in word d7a
	addqw	#1,%d7			|set d7a to signal first digit done
	dbf	%d0,loop		|do loop some more!
	swap	%d7			|put last digit in string
	lslw	#4,%d7			|move it to upper 4 bits
	moveb	%d7,(%a0)+		|store it in memory string
|
| Clean up and return with result in fp0.
|
end_bstr:
	moveml	(%a7)+,%d0-%d7
	rts
	|end
|
|	bugfix.sa 3.2 1/31/91
|
|
|	This file contains workarounds for bugs in the 040
|	relating to the Floating-Point Software Package (FPSP)
|
|	Fixes for bugs: 1238
|
|	Bug: 1238 
|
|
|    /* The following dirty_bit clear should be left in
|     * the handler permanently to improve throughput.
|     * The dirty_bits are located at bits [23:16] in
|     * longword $08 in the busy frame $4x60.  Bit 16
|     * corresponds to FP0, bit 17 corresponds to FP1,
|     * and so on.
|     */
|    if  (E3_exception_just_serviced)   {
|         dirty_bit[cmdreg3b[9:7]] = 0;
|         }
|
|    if  (fsave_format_version != $40)  {goto NOFIX}
|
|    if !(E3_exception_just_serviced)   {goto NOFIX}
|    if  (cupc == 0000000)              {goto NOFIX}
|    if  ((cmdreg1b[15:13] != 000) &&
|         (cmdreg1b[15:10] != 010001))  {goto NOFIX}
|    if (((cmdreg1b[15:13] != 000) || ((cmdreg1b[12:10] != cmdreg2b[9:7]) &&
|				      (cmdreg1b[12:10] != cmdreg3b[9:7]))  ) &&
|	 ((cmdreg1b[ 9: 7] != cmdreg2b[9:7]) &&
|	  (cmdreg1b[ 9: 7] != cmdreg3b[9:7])) )  {goto NOFIX}
|
|    /* Note: for 6d43b or 8d43b, you may want to add the following code
|     * to get better coverage.  (If you do not insert this code, the part
|     * won't lock up; it will simply get the wrong answer.)
|     * Do NOT insert this code for 10d43b or later parts.
|     *
|     *  if (fpiarcu == integer stack return address) {
|     *       cupc = 0000000;
|     *       goto NOFIX;
|     *       }
|     */
|
|    if (cmdreg1b[15:13] != 000)   {goto FIX_OPCLASS2}
|    FIX_OPCLASS0:
|    if (((cmdreg1b[12:10] == cmdreg2b[9:7]) ||
|	 (cmdreg1b[ 9: 7] == cmdreg2b[9:7])) &&
|	(cmdreg1b[12:10] != cmdreg3b[9:7]) &&
|	(cmdreg1b[ 9: 7] != cmdreg3b[9:7]))  {  /* xu conflict only */
|	/* We execute the following code if there is an
|	   xu conflict and NOT an nu conflict */
|
|	/* first save some values on the fsave frame */
|	stag_temp     = STAG[fsave_frame];
|	cmdreg1b_temp = CMDREG1B[fsave_frame];
|	dtag_temp     = DTAG[fsave_frame];
|	ete15_temp    = ETE15[fsave_frame];
|
|	CUPC[fsave_frame] = 0000000;
|	FRESTORE
|	FSAVE
|
|	/* If the xu instruction is exceptional, we punt.
|	 * Otherwise, we would have to include OVFL/UNFL handler
|	 * code here to get the correct answer.
|	 */
|	if (fsave_frame_format == $4060) {goto KILL_PROCESS}
|
|	fsave_frame = /* build a long frame of all zeros */
|	fsave_frame_format = $4060;  /* label it as long frame */
|
|	/* load it with the temps we saved */
|	STAG[fsave_frame]     =  stag_temp;
|	CMDREG1B[fsave_frame] =  cmdreg1b_temp;
|	DTAG[fsave_frame]     =  dtag_temp;
|	ETE15[fsave_frame]    =  ete15_temp;
|
|	/* Make sure that the cmdreg3b dest reg is not going to
|	 * be destroyed by a FMOVEM at the end of all this code.
|	 * If it is, you should move the current value of the reg
|	 * onto the stack so that the reg will loaded with that value.
|	 */
|
|	/* All done.  Proceed with the code below */
|    }
|
|    etemp  = FP_reg_[cmdreg1b[12:10]];
|    ete15  = ~ete14;
|    cmdreg1b[15:10] = 010010;
|    clear(bug_flag_procIDxxxx);
|    FRESTORE and return;
|
|
|    FIX_OPCLASS2:
|    if ((cmdreg1b[9:7] == cmdreg2b[9:7]) &&
|	(cmdreg1b[9:7] != cmdreg3b[9:7]))  {  /* xu conflict only */
|	/* We execute the following code if there is an
|	   xu conflict and NOT an nu conflict */
|
|	/* first save some values on the fsave frame */
|	stag_temp     = STAG[fsave_frame];
|	cmdreg1b_temp = CMDREG1B[fsave_frame];
|	dtag_temp     = DTAG[fsave_frame];
|	ete15_temp    = ETE15[fsave_frame];
|	etemp_temp    = ETEMP[fsave_frame];
|
|	CUPC[fsave_frame] = 0000000;
|	FRESTORE
|	FSAVE
|
|
|	/* If the xu instruction is exceptional, we punt.
|	 * Otherwise, we would have to include OVFL/UNFL handler
|	 * code here to get the correct answer.
|	 */
|	if (fsave_frame_format == $4060) {goto KILL_PROCESS}
|
|	fsave_frame = /* build a long frame of all zeros */
|	fsave_frame_format = $4060;  /* label it as long frame */
|
|	/* load it with the temps we saved */
|	STAG[fsave_frame]     =  stag_temp;
|	CMDREG1B[fsave_frame] =  cmdreg1b_temp;
|	DTAG[fsave_frame]     =  dtag_temp;
|	ETE15[fsave_frame]    =  ete15_temp;
|	ETEMP[fsave_frame]    =  etemp_temp;
|
|	/* Make sure that the cmdreg3b dest reg is not going to
|	 * be destroyed by a FMOVEM at the end of all this code.
|	 * If it is, you should move the current value of the reg
|	 * onto the stack so that the reg will loaded with that value.
|	 */
|
|	/* All done.  Proceed with the code below */
|    }
|
|    if (etemp_exponent == min_sgl)   etemp_exponent = min_dbl;
|    if (etemp_exponent == max_sgl)   etemp_exponent = max_dbl;
|    cmdreg1b[15:10] = 010101;
|    clear(bug_flag_procIDxxxx);
|    FRESTORE and return;
|
|
|    NOFIX:
|    clear(bug_flag_procIDxxxx);
|    FRESTORE and return;
|


|		Copyright (C) Motorola, Inc. 1990
|			All Rights Reserved
|
|	THIS IS UNPUBLISHED PROPRIETARY SOURCE CODE OF MOTOROLA 
|	The copyright notice above does not evidence any  
|	actual or intended publication of such source code.

|BUGFIX    idnt    2,1 | Motorola 040 Floating Point Software Package

	|section	8

	.include "fpsp.h"

	|xref	fpsp_fmt_error

	.global	b1238_fix
b1238_fix:
|
| This code is entered only on completion of the handling of an 
| nu-generated ovfl, unfl, or inex exception.  If the version 
| number of the fsave is not $40, this handler is not necessary.
| Simply branch to fix_done and exit normally.
|
	cmpib	#VER_40,4(%a7)
	bne	fix_done
|
| Test for cu_savepc equal to zero.  If not, this is not a bug
| #1238 case.
|
	moveb	CU_SAVEPC(%a6),%d0
	andib	#0xFE,%d0
	beq 	fix_done	|if zero, this is not bug #1238

|
| Test the register conflict aspect.  If opclass0, check for
| cu src equal to xu dest or equal to nu dest.  If so, go to 
| op0.  Else, or if opclass2, check for cu dest equal to
| xu dest or equal to nu dest.  If so, go to tst_opcl.  Else,
| exit, it is not the bug case.
|
| Check for opclass 0.  If not, go and check for opclass 2 and sgl.
|
	movew	CMDREG1B(%a6),%d0
	andiw	#0xE000,%d0		|strip all but opclass
	bne	op2sgl			|not opclass 0, check op2
|
| Check for cu and nu register conflict.  If one exists, this takes
| priority over a cu and xu conflict. 
|
	bfextu	CMDREG1B(%a6){#3:#3},%d0	|get 1st src 
	bfextu	CMDREG3B(%a6){#6:#3},%d1	|get 3rd dest
	cmpb	%d0,%d1
	beqs	op0			|if equal, continue bugfix
|
| Check for cu dest equal to nu dest.  If so, go and fix the 
| bug condition.  Otherwise, exit.
|
	bfextu	CMDREG1B(%a6){#6:#3},%d0	|get 1st dest 
	cmpb	%d0,%d1			|cmp 1st dest with 3rd dest
	beqs	op0			|if equal, continue bugfix
|
| Check for cu and xu register conflict.
|
	bfextu	CMDREG2B(%a6){#6:#3},%d1	|get 2nd dest
	cmpb	%d0,%d1			|cmp 1st dest with 2nd dest
	beqs	op0_xu			|if equal, continue bugfix
	bfextu	CMDREG1B(%a6){#3:#3},%d0	|get 1st src 
	cmpb	%d0,%d1			|cmp 1st src with 2nd dest
	beq	op0_xu
	bne	fix_done		|if the reg checks fail, exit
|
| We have the opclass 0 situation.
|
op0:
	bfextu	CMDREG1B(%a6){#3:#3},%d0	|get source register no
	movel	#7,%d1
	subl	%d0,%d1
	clrl	%d0
	bsetl	%d1,%d0
	fmovemx %d0,ETEMP(%a6)		|load source to ETEMP

	moveb	#0x12,%d0
	bfins	%d0,CMDREG1B(%a6){#0:#6}	|opclass 2, extended
|
|	Set ETEMP exponent bit 15 as the opposite of ete14
|
	btst	#6,ETEMP_EX(%a6)		|check etemp exponent bit 14
	beq	setete15
	bclr	#etemp15_bit,STAG(%a6)
	bra	finish
setete15:
	bset	#etemp15_bit,STAG(%a6)
	bra	finish

|
| We have the case in which a conflict exists between the cu src or
| dest and the dest of the xu.  We must clear the instruction in 
| the cu and restore the state, allowing the instruction in the
| xu to complete.  Remember, the instruction in the nu
| was exceptional, and was completed by the appropriate handler.
| If the result of the xu instruction is not exceptional, we can
| restore the instruction from the cu to the frame and continue
| processing the original exception.  If the result is also
| exceptional, we choose to kill the process.
|
|	Items saved from the stack:
|	
|		$3c stag     - L_SCR1
|		$40 cmdreg1b - L_SCR2
|		$44 dtag     - L_SCR3
|
| The cu savepc is set to zero, and the frame is restored to the
| fpu.
|
op0_xu:
	movel	STAG(%a6),L_SCR1(%a6)	
	movel	CMDREG1B(%a6),L_SCR2(%a6)	
	movel	DTAG(%a6),L_SCR3(%a6)
	andil	#0xe0000000,L_SCR3(%a6)
	moveb	#0,CU_SAVEPC(%a6)
	movel	(%a7)+,%d1		|save return address from bsr
	frestore (%a7)+
	fsave	-(%a7)
|
| Check if the instruction which just completed was exceptional.
| 
	cmpw	#0x4060,(%a7)
	beq	op0_xb
| 
| It is necessary to isolate the result of the instruction in the
| xu if it is to fp0 - fp3 and write that value to the USER_FPn
| locations on the stack.  The correct destination register is in 
| cmdreg2b.
|
	bfextu	CMDREG2B(%a6){#6:#3},%d0	|get dest register no
	cmpil	#3,%d0
	bgts	op0_xi
	beqs	op0_fp3
	cmpil	#1,%d0
	blts	op0_fp0
	beqs	op0_fp1
op0_fp2:
	fmovemx %fp2-%fp2,USER_FP2(%a6)
	bras	op0_xi
op0_fp1:
	fmovemx %fp1-%fp1,USER_FP1(%a6)
	bras	op0_xi
op0_fp0:
	fmovemx %fp0-%fp0,USER_FP0(%a6)
	bras	op0_xi
op0_fp3:
	fmovemx %fp3-%fp3,USER_FP3(%a6)
|
| The frame returned is idle.  We must build a busy frame to hold
| the cu state information and setup etemp.
|
op0_xi:
	movel	#22,%d0		|clear 23 lwords
	clrl	(%a7)
op0_loop:
	clrl	-(%a7)
	dbf	%d0,op0_loop
	movel	#0x40600000,-(%a7)
	movel	L_SCR1(%a6),STAG(%a6)
	movel	L_SCR2(%a6),CMDREG1B(%a6)
	movel	L_SCR3(%a6),DTAG(%a6)
	moveb	#0x6,CU_SAVEPC(%a6)
	movel	%d1,-(%a7)		|return bsr return address
	bfextu	CMDREG1B(%a6){#3:#3},%d0	|get source register no
	movel	#7,%d1
	subl	%d0,%d1
	clrl	%d0
	bsetl	%d1,%d0
	fmovemx %d0,ETEMP(%a6)		|load source to ETEMP

	moveb	#0x12,%d0
	bfins	%d0,CMDREG1B(%a6){#0:#6}	|opclass 2, extended
|
|	Set ETEMP exponent bit 15 as the opposite of ete14
|
	btst	#6,ETEMP_EX(%a6)		|check etemp exponent bit 14
	beq	op0_sete15
	bclr	#etemp15_bit,STAG(%a6)
	bra	finish
op0_sete15:
	bset	#etemp15_bit,STAG(%a6)
	bra	finish

|
| The frame returned is busy.  It is not possible to reconstruct
| the code sequence to allow completion.  We will jump to 
| fpsp_fmt_error and allow the kernel to kill the process.
|
op0_xb:
	jmp	fpsp_fmt_error

|
| Check for opclass 2 and single size.  If not both, exit.
|
op2sgl:
	movew	CMDREG1B(%a6),%d0
	andiw	#0xFC00,%d0		|strip all but opclass and size
	cmpiw	#0x4400,%d0		|test for opclass 2 and size=sgl
	bne	fix_done		|if not, it is not bug 1238
|
| Check for cu dest equal to nu dest or equal to xu dest, with 
| a cu and nu conflict taking priority an nu conflict.  If either,
| go and fix the bug condition.  Otherwise, exit.
|
	bfextu	CMDREG1B(%a6){#6:#3},%d0	|get 1st dest 
	bfextu	CMDREG3B(%a6){#6:#3},%d1	|get 3rd dest
	cmpb	%d0,%d1			|cmp 1st dest with 3rd dest
	beq	op2_com			|if equal, continue bugfix
	bfextu	CMDREG2B(%a6){#6:#3},%d1	|get 2nd dest 
	cmpb	%d0,%d1			|cmp 1st dest with 2nd dest
	bne	fix_done		|if the reg checks fail, exit
|
| We have the case in which a conflict exists between the cu src or
| dest and the dest of the xu.  We must clear the instruction in 
| the cu and restore the state, allowing the instruction in the
| xu to complete.  Remember, the instruction in the nu
| was exceptional, and was completed by the appropriate handler.
| If the result of the xu instruction is not exceptional, we can
| restore the instruction from the cu to the frame and continue
| processing the original exception.  If the result is also
| exceptional, we choose to kill the process.
|
|	Items saved from the stack:
|	
|		$3c stag     - L_SCR1
|		$40 cmdreg1b - L_SCR2
|		$44 dtag     - L_SCR3
|		etemp        - FP_SCR2
|
| The cu savepc is set to zero, and the frame is restored to the
| fpu.
|
op2_xu:
	movel	STAG(%a6),L_SCR1(%a6)	
	movel	CMDREG1B(%a6),L_SCR2(%a6)	
	movel	DTAG(%a6),L_SCR3(%a6)	
	andil	#0xe0000000,L_SCR3(%a6)
	moveb	#0,CU_SAVEPC(%a6)
	movel	ETEMP(%a6),FP_SCR2(%a6)
	movel	ETEMP_HI(%a6),FP_SCR2+4(%a6)
	movel	ETEMP_LO(%a6),FP_SCR2+8(%a6)
	movel	(%a7)+,%d1		|save return address from bsr
	frestore (%a7)+
	fsave	-(%a7)
|
| Check if the instruction which just completed was exceptional.
| 
	cmpw	#0x4060,(%a7)
	beq	op2_xb
| 
| It is necessary to isolate the result of the instruction in the
| xu if it is to fp0 - fp3 and write that value to the USER_FPn
| locations on the stack.  The correct destination register is in 
| cmdreg2b.
|
	bfextu	CMDREG2B(%a6){#6:#3},%d0	|get dest register no
	cmpil	#3,%d0
	bgts	op2_xi
	beqs	op2_fp3
	cmpil	#1,%d0
	blts	op2_fp0
	beqs	op2_fp1
op2_fp2:
	fmovemx %fp2-%fp2,USER_FP2(%a6)
	bras	op2_xi
op2_fp1:
	fmovemx %fp1-%fp1,USER_FP1(%a6)
	bras	op2_xi
op2_fp0:
	fmovemx %fp0-%fp0,USER_FP0(%a6)
	bras	op2_xi
op2_fp3:
	fmovemx %fp3-%fp3,USER_FP3(%a6)
|
| The frame returned is idle.  We must build a busy frame to hold
| the cu state information and fix up etemp.
|
op2_xi:
	movel	#22,%d0		|clear 23 lwords
	clrl	(%a7)
op2_loop:
	clrl	-(%a7)
	dbf	%d0,op2_loop
	movel	#0x40600000,-(%a7)
	movel	L_SCR1(%a6),STAG(%a6)
	movel	L_SCR2(%a6),CMDREG1B(%a6)
	movel	L_SCR3(%a6),DTAG(%a6)
	moveb	#0x6,CU_SAVEPC(%a6)
	movel	FP_SCR2(%a6),ETEMP(%a6)
	movel	FP_SCR2+4(%a6),ETEMP_HI(%a6)
	movel	FP_SCR2+8(%a6),ETEMP_LO(%a6)
	movel	%d1,-(%a7)
	bra	op2_com

|
| We have the opclass 2 single source situation.
|
op2_com:
	moveb	#0x15,%d0
	bfins	%d0,CMDREG1B(%a6){#0:#6}	|opclass 2, double

	cmpw	#0x407F,ETEMP_EX(%a6)	|single +max
	bnes	case2
	movew	#0x43FF,ETEMP_EX(%a6)	|to double +max
	bra	finish
case2:	
	cmpw	#0xC07F,ETEMP_EX(%a6)	|single -max
	bnes	case3
	movew	#0xC3FF,ETEMP_EX(%a6)	|to double -max
	bra	finish
case3:	
	cmpw	#0x3F80,ETEMP_EX(%a6)	|single +min
	bnes	case4
	movew	#0x3C00,ETEMP_EX(%a6)	|to double +min
	bra	finish
case4:
	cmpw	#0xBF80,ETEMP_EX(%a6)	|single -min
	bne	fix_done
	movew	#0xBC00,ETEMP_EX(%a6)	|to double -min
	bra	finish
|
| The frame returned is busy.  It is not possible to reconstruct
| the code sequence to allow completion.  fpsp_fmt_error causes
| an fline illegal instruction to be executed.
|
| You should replace the jump to fpsp_fmt_error with a jump
| to the entry point used to kill a process. 
|
op2_xb:
	jmp	fpsp_fmt_error

|
| Enter here if the case is not of the situations affected by
| bug #1238, or if the fix is completed, and exit.
|
finish:
fix_done:
	rts

	|end
|
|	decbin.sa 3.3 12/19/90
|
|	Description: Converts normalized packed bcd value pointed to by
|	register A6 to extended-precision value in FP0.
|
|	Input: Normalized packed bcd value in ETEMP(a6).
|
|	Output:	Exact floating-point representation of the packed bcd value.
|
|	Saves and Modifies: D2-D5
|
|	Speed: The program decbin takes ??? cycles to execute.
|
|	Object Size:
|
|	External Reference(s): None.
|
|	Algorithm:
|	Expected is a normal bcd (i.e. non-exceptional; all inf, zero,
|	and NaN operands are dispatched without entering this routine)
|	value in 68881/882 format at location ETEMP(A6).
|
|	A1.	Convert the bcd exponent to binary by successive adds and muls.
|	Set the sign according to SE. Subtract 16 to compensate
|	for the mantissa which is to be interpreted as 17 integer
|	digits, rather than 1 integer and 16 fraction digits.
|	Note: this operation can never overflow.
|
|	A2. Convert the bcd mantissa to binary by successive
|	adds and muls in FP0. Set the sign according to SM.
|	The mantissa digits will be converted with the decimal point
|	assumed following the least-significant digit.
|	Note: this operation can never overflow.
|
|	A3. Count the number of leading/trailing zeros in the
|	bcd string.  If SE is positive, count the leading zeros;
|	if negative, count the trailing zeros.  Set the adjusted
|	exponent equal to the exponent from A1 and the zero count
|	added if SM = 1 and subtracted if SM = 0.  Scale the
|	mantissa the equivalent of forcing in the bcd value:
|
|	SM = 0	a non-zero digit in the integer position
|	SM = 1	a non-zero digit in Mant0, lsd of the fraction
|
|	this will insure that any value, regardless of its
|	representation (ex. 0.1E2, 1E1, 10E0, 100E-1), is converted
|	consistently.
|
|	A4. Calculate the factor 10^exp in FP1 using a table of
|	10^(2^n) values.  To reduce the error in forming factors
|	greater than 10^27, a directed rounding scheme is used with
|	tables rounded to RN, RM, and RP, according to the table
|	in the comments of the pwrten section.
|
|	A5. Form the final binary number by scaling the mantissa by
|	the exponent factor.  This is done by multiplying the
|	mantissa in FP0 by the factor in FP1 if the adjusted
|	exponent sign is positive, and dividing FP0 by FP1 if
|	it is negative.
|
|	Clean up and return.  Check if the final mul or div resulted
|	in an inex2 exception.  If so, set inex1 in the fpsr and 
|	check if the inex1 exception is enabled.  If so, set d7 upper
|	word to $0100.  This will signal unimp.sa that an enabled inex1
|	exception occurred.  Unimp will fix the stack.
|	

|		Copyright (C) Motorola, Inc. 1990
|			All Rights Reserved
|
|	THIS IS UNPUBLISHED PROPRIETARY SOURCE CODE OF MOTOROLA 
|	The copyright notice above does not evidence any  
|	actual or intended publication of such source code.

|DECBIN    idnt    2,1 | Motorola 040 Floating Point Software Package

	|section	8

	.include "fpsp.h"

|
|	PTENRN, PTENRM, and PTENRP are arrays of powers of 10 rounded
|	to nearest, minus, and plus, respectively.  The tables include
|	10**{1,2,4,8,16,32,64,128,256,512,1024,2048,4096}.  No rounding
|	is required until the power is greater than 27, however, all
|	tables include the first 5 for ease of indexing.
|
	|xref	PTENRN
	|xref	PTENRM
	|xref	PTENRP

RTABLE:	.byte	0,0,0,0
	.byte	2,3,2,3
	.byte	2,3,3,2
	.byte	3,2,2,3

	.global	decbin
	.global	calc_e
	.global	pwrten
	.global	calc_m
	.global	norm
	.global	ap_st_z
	.global	ap_st_n
|
	.set	FNIBS,7
	.set	FSTRT,0
|
	.set	ESTRT,4
	.set	EDIGITS,2	| 
|
| Constants in single precision
FZERO: 	.long	0x00000000
FONE: 	.long	0x3F800000
FTEN: 	.long	0x41200000

	.set	TEN,10

|
decbin:
	| fmovel	#0,FPCR		;clr real fpcr
	moveml	%d2-%d5,-(%a7)
|
| Calculate exponent:
|  1. Copy bcd value in memory for use as a working copy.
|  2. Calculate absolute value of exponent in d1 by mul and add.
|  3. Correct for exponent sign.
|  4. Subtract 16 to compensate for interpreting the mant as all integer digits.
|     (i.e., all digits assumed left of the decimal point.)
|
| Register usage:
|
|  calc_e:
|	(*)  d0: temp digit storage
|	(*)  d1: accumulator for binary exponent
|	(*)  d2: digit count
|	(*)  d3: offset pointer
|	( )  d4: first word of bcd
|	( )  a0: pointer to working bcd value
|	( )  a6: pointer to original bcd value
|	(*)  FP_SCR1: working copy of original bcd value
|	(*)  L_SCR1: copy of original exponent word
|
calc_e:
	movel	#EDIGITS,%d2	|# of nibbles (digits) in fraction part
	moveql	#ESTRT,%d3	|counter to pick up digits
	leal	FP_SCR1(%a6),%a0	|load tmp bcd storage address
	movel	ETEMP(%a6),(%a0)	|save input bcd value
	movel	ETEMP_HI(%a6),4(%a0) |save words 2 and 3
	movel	ETEMP_LO(%a6),8(%a0) |and work with these
	movel	(%a0),%d4	|get first word of bcd
	clrl	%d1		|zero d1 for accumulator
e_gd:
	mulul	#TEN,%d1	|mul partial product by one digit place
	bfextu	%d4{%d3:#4},%d0	|get the digit and zero extend into d0
	addl	%d0,%d1		|d1 = d1 + d0
	addqb	#4,%d3		|advance d3 to the next digit
	dbf	%d2,e_gd	|if we have used all 3 digits, exit loop
	btst	#30,%d4		|get SE
	beqs	e_pos		|don't negate if pos
	negl	%d1		|negate before subtracting
e_pos:
	subl	#16,%d1		|sub to compensate for shift of mant
	bges	e_save		|if still pos, do not neg
	negl	%d1		|now negative, make pos and set SE
	orl	#0x40000000,%d4	|set SE in d4,
	orl	#0x40000000,(%a0)	|and in working bcd
e_save:
	movel	%d1,L_SCR1(%a6)	|save exp in memory
|
|
| Calculate mantissa:
|  1. Calculate absolute value of mantissa in fp0 by mul and add.
|  2. Correct for mantissa sign.
|     (i.e., all digits assumed left of the decimal point.)
|
| Register usage:
|
|  calc_m:
|	(*)  d0: temp digit storage
|	(*)  d1: lword counter
|	(*)  d2: digit count
|	(*)  d3: offset pointer
|	( )  d4: words 2 and 3 of bcd
|	( )  a0: pointer to working bcd value
|	( )  a6: pointer to original bcd value
|	(*) fp0: mantissa accumulator
|	( )  FP_SCR1: working copy of original bcd value
|	( )  L_SCR1: copy of original exponent word
|
calc_m:
	moveql	#1,%d1		|word counter, init to 1
	fmoves	FZERO,%fp0	|accumulator
|
|
|  Since the packed number has a long word between the first & second parts,
|  get the integer digit then skip down & get the rest of the
|  mantissa.  We will unroll the loop once.
|
	bfextu	(%a0){#28:#4},%d0	|integer part is ls digit in long word
	faddb	%d0,%fp0		|add digit to sum in fp0
|
|
|  Get the rest of the mantissa.
|
loadlw:
	movel	(%a0,%d1.L*4),%d4	|load mantissa longword into d4
	moveql	#FSTRT,%d3	|counter to pick up digits
	moveql	#FNIBS,%d2	|reset number of digits per a0 ptr
md2b:
	fmuls	FTEN,%fp0	|fp0 = fp0 * 10
	bfextu	%d4{%d3:#4},%d0	|get the digit and zero extend
	faddb	%d0,%fp0	|fp0 = fp0 + digit
|
|
|  If all the digits (8) in that long word have been converted (d2=0),
|  then inc d1 (=2) to point to the next long word and reset d3 to 0
|  to initialize the digit offset, and set d2 to 7 for the digit count;
|  else continue with this long word.
|
	addqb	#4,%d3		|advance d3 to the next digit
	dbf	%d2,md2b		|check for last digit in this lw
nextlw:
	addql	#1,%d1		|inc lw pointer in mantissa
	cmpl	#2,%d1		|test for last lw
	ble	loadlw		|if not, get last one
	
|
|  Check the sign of the mant and make the value in fp0 the same sign.
|
m_sign:
	btst	#31,(%a0)	|test sign of the mantissa
	beq	ap_st_z		|if clear, go to append/strip zeros
	fnegx	%fp0		|if set, negate fp0
	
|
| Append/strip zeros:
|
|  For adjusted exponents which have an absolute value greater than 27*,
|  this routine calculates the amount needed to normalize the mantissa
|  for the adjusted exponent.  That number is subtracted from the exp
|  if the exp was positive, and added if it was negative.  The purpose
|  of this is to reduce the value of the exponent and the possibility
|  of error in calculation of pwrten.
|
|  1. Branch on the sign of the adjusted exponent.
|  2p.(positive exp)
|   2. Check M16 and the digits in lwords 2 and 3 in descending order.
|   3. Add one for each zero encountered until a non-zero digit.
|   4. Subtract the count from the exp.
|   5. Check if the exp has crossed zero in #3 above; make the exp abs
|	   and set SE.
|	6. Multiply the mantissa by 10**count.
|  2n.(negative exp)
|   2. Check the digits in lwords 3 and 2 in descending order.
|   3. Add one for each zero encountered until a non-zero digit.
|   4. Add the count to the exp.
|   5. Check if the exp has crossed zero in #3 above; clear SE.
|   6. Divide the mantissa by 10**count.
|
|  *Why 27?  If the adjusted exponent is within -28 < expA < 28, than
|   any adjustment due to append/strip zeros will drive the resultant
|   exponent towards zero.  Since all pwrten constants with a power
|   of 27 or less are exact, there is no need to use this routine to
|   attempt to lessen the resultant exponent.
|
| Register usage:
|
|  ap_st_z:
|	(*)  d0: temp digit storage
|	(*)  d1: zero count
|	(*)  d2: digit count
|	(*)  d3: offset pointer
|	( )  d4: first word of bcd
|	(*)  d5: lword counter
|	( )  a0: pointer to working bcd value
|	( )  FP_SCR1: working copy of original bcd value
|	( )  L_SCR1: copy of original exponent word
|
|
| First check the absolute value of the exponent to see if this
| routine is necessary.  If so, then check the sign of the exponent
| and do append (+) or strip (-) zeros accordingly.
| This section handles a positive adjusted exponent.
|
ap_st_z:
	movel	L_SCR1(%a6),%d1	|load expA for range test
	cmpl	#27,%d1		|test is with 27
	ble	pwrten		|if abs(expA) <28, skip ap/st zeros
	btst	#30,(%a0)	|check sign of exp
	bne	ap_st_n		|if neg, go to neg side
	clrl	%d1		|zero count reg
	movel	(%a0),%d4		|load lword 1 to d4
	bfextu	%d4{#28:#4},%d0	|get M16 in d0
	bnes	ap_p_fx		|if M16 is non-zero, go fix exp
	addql	#1,%d1		|inc zero count
	moveql	#1,%d5		|init lword counter
	movel	(%a0,%d5.L*4),%d4	|get lword 2 to d4
	bnes	ap_p_cl		|if lw 2 is zero, skip it
	addql	#8,%d1		|and inc count by 8
	addql	#1,%d5		|inc lword counter
	movel	(%a0,%d5.L*4),%d4	|get lword 3 to d4
ap_p_cl:
	clrl	%d3		|init offset reg
	moveql	#7,%d2		|init digit counter
ap_p_gd:
	bfextu	%d4{%d3:#4},%d0	|get digit
	bnes	ap_p_fx		|if non-zero, go to fix exp
	addql	#4,%d3		|point to next digit
	addql	#1,%d1		|inc digit counter
	dbf	%d2,ap_p_gd	|get next digit
ap_p_fx:
	movel	%d1,%d0		|copy counter to d2
	movel	L_SCR1(%a6),%d1	|get adjusted exp from memory
	subl	%d0,%d1		|subtract count from exp
	bges	ap_p_fm		|if still pos, go to pwrten
	negl	%d1		|now its neg; get abs
	movel	(%a0),%d4		|load lword 1 to d4
	orl	#0x40000000,%d4	| and set SE in d4
	orl	#0x40000000,(%a0)	| and in memory
|
| Calculate the mantissa multiplier to compensate for the striping of
| zeros from the mantissa.
|
ap_p_fm:
	movel	#PTENRN,%a1	|get address of power-of-ten table
	clrl	%d3		|init table index
	fmoves	FONE,%fp1	|init fp1 to 1
	moveql	#3,%d2		|init d2 to count bits in counter
ap_p_el:
	asrl	#1,%d0		|shift lsb into carry
	bccs	ap_p_en		|if 1, mul fp1 by pwrten factor
	fmulx	(%a1,%d3),%fp1	|mul by 10**(d3_bit_no)
ap_p_en:
	addl	#12,%d3		|inc d3 to next rtable entry
	tstl	%d0		|check if d0 is zero
	bnes	ap_p_el		|if not, get next bit
	fmulx	%fp1,%fp0		|mul mantissa by 10**(no_bits_shifted)
	bra	pwrten		|go calc pwrten
|
| This section handles a negative adjusted exponent.
|
ap_st_n:
	clrl	%d1		|clr counter
	moveql	#2,%d5		|set up d5 to point to lword 3
	movel	(%a0,%d5.L*4),%d4	|get lword 3
	bnes	ap_n_cl		|if not zero, check digits
	subl	#1,%d5		|dec d5 to point to lword 2
	addql	#8,%d1		|inc counter by 8
	movel	(%a0,%d5.L*4),%d4	|get lword 2
ap_n_cl:
	movel	#28,%d3		|point to last digit
	moveql	#7,%d2		|init digit counter
ap_n_gd:
	bfextu	%d4{%d3:#4},%d0	|get digit
	bnes	ap_n_fx		|if non-zero, go to exp fix
	subql	#4,%d3		|point to previous digit
	addql	#1,%d1		|inc digit counter
	dbf	%d2,ap_n_gd	|get next digit
ap_n_fx:
	movel	%d1,%d0		|copy counter to d0
	movel	L_SCR1(%a6),%d1	|get adjusted exp from memory
	subl	%d0,%d1		|subtract count from exp
	bgts	ap_n_fm		|if still pos, go fix mantissa
	negl	%d1		|take abs of exp and clr SE
	movel	(%a0),%d4		|load lword 1 to d4
	andl	#0xbfffffff,%d4	| and clr SE in d4
	andl	#0xbfffffff,(%a0)	| and in memory
|
| Calculate the mantissa multiplier to compensate for the appending of
| zeros to the mantissa.
|
ap_n_fm:
	movel	#PTENRN,%a1	|get address of power-of-ten table
	clrl	%d3		|init table index
	fmoves	FONE,%fp1	|init fp1 to 1
	moveql	#3,%d2		|init d2 to count bits in counter
ap_n_el:
	asrl	#1,%d0		|shift lsb into carry
	bccs	ap_n_en		|if 1, mul fp1 by pwrten factor
	fmulx	(%a1,%d3),%fp1	|mul by 10**(d3_bit_no)
ap_n_en:
	addl	#12,%d3		|inc d3 to next rtable entry
	tstl	%d0		|check if d0 is zero
	bnes	ap_n_el		|if not, get next bit
	fdivx	%fp1,%fp0		|div mantissa by 10**(no_bits_shifted)
|
|
| Calculate power-of-ten factor from adjusted and shifted exponent.
|
| Register usage:
|
|  pwrten:
|	(*)  d0: temp
|	( )  d1: exponent
|	(*)  d2: {FPCR[6:5],SM,SE} as index in RTABLE; temp
|	(*)  d3: FPCR work copy
|	( )  d4: first word of bcd
|	(*)  a1: RTABLE pointer
|  calc_p:
|	(*)  d0: temp
|	( )  d1: exponent
|	(*)  d3: PWRTxx table index
|	( )  a0: pointer to working copy of bcd
|	(*)  a1: PWRTxx pointer
|	(*) fp1: power-of-ten accumulator
|
| Pwrten calculates the exponent factor in the selected rounding mode
| according to the following table:
|	
|	Sign of Mant  Sign of Exp  Rounding Mode  PWRTEN Rounding Mode
|
|	ANY	  ANY	RN	RN
|
|	 +	   +	RP	RP
|	 -	   +	RP	RM
|	 +	   -	RP	RM
|	 -	   -	RP	RP
|
|	 +	   +	RM	RM
|	 -	   +	RM	RP
|	 +	   -	RM	RP
|	 -	   -	RM	RM
|
|	 +	   +	RZ	RM
|	 -	   +	RZ	RM
|	 +	   -	RZ	RP
|	 -	   -	RZ	RP
|
|
pwrten:
	movel	USER_FPCR(%a6),%d3 |get user's FPCR
	bfextu	%d3{#26:#2},%d2	|isolate rounding mode bits
	movel	(%a0),%d4		|reload 1st bcd word to d4
	asll	#2,%d2		|format d2 to be
	bfextu	%d4{#0:#2},%d0	| {FPCR[6],FPCR[5],SM,SE}
	addl	%d0,%d2		|in d2 as index into RTABLE
	leal	RTABLE,%a1	|load rtable base
	moveb	(%a1,%d2),%d0	|load new rounding bits from table
	clrl	%d3			|clear d3 to force no exc and extended
	bfins	%d0,%d3{#26:#2}	|stuff new rounding bits in FPCR
	fmovel	%d3,%FPCR		|write new FPCR
	asrl	#1,%d0		|write correct PTENxx table
	bccs	not_rp		|to a1
	leal	PTENRP,%a1	|it is RP
	bras	calc_p		|go to init section
not_rp:
	asrl	#1,%d0		|keep checking
	bccs	not_rm
	leal	PTENRM,%a1	|it is RM
	bras	calc_p		|go to init section
not_rm:
	leal	PTENRN,%a1	|it is RN
calc_p:
	movel	%d1,%d0		|copy exp to d0;use d0
	bpls	no_neg		|if exp is negative,
	negl	%d0		|invert it
	orl	#0x40000000,(%a0)	|and set SE bit
no_neg:
	clrl	%d3		|table index
	fmoves	FONE,%fp1	|init fp1 to 1
e_loop:
	asrl	#1,%d0		|shift next bit into carry
	bccs	e_next		|if zero, skip the mul
	fmulx	(%a1,%d3),%fp1	|mul by 10**(d3_bit_no)
e_next:
	addl	#12,%d3		|inc d3 to next rtable entry
	tstl	%d0		|check if d0 is zero
	bnes	e_loop		|not zero, continue shifting
|
|
|  Check the sign of the adjusted exp and make the value in fp0 the
|  same sign. If the exp was pos then multiply fp1*fp0;
|  else divide fp0/fp1.
|
| Register Usage:
|  norm:
|	( )  a0: pointer to working bcd value
|	(*) fp0: mantissa accumulator
|	( ) fp1: scaling factor - 10**(abs(exp))
|
norm:
	btst	#30,(%a0)	|test the sign of the exponent
	beqs	mul		|if clear, go to multiply
div:
	fdivx	%fp1,%fp0		|exp is negative, so divide mant by exp
	bras	end_dec
mul:
	fmulx	%fp1,%fp0		|exp is positive, so multiply by exp
|
|
| Clean up and return with result in fp0.
|
| If the final mul/div in decbin incurred an inex exception,
| it will be inex2, but will be reported as inex1 by get_op.
|
end_dec:
	fmovel	%FPSR,%d0		|get status register	
	bclrl	#inex2_bit+8,%d0	|test for inex2 and clear it
	fmovel	%d0,%FPSR		|return status reg w/o inex2
	beqs	no_exc		|skip this if no exc
	orl	#inx1a_mask,USER_FPSR(%a6) |set inex1/ainex
no_exc:
	moveml	(%a7)+,%d2-%d5
	rts
	|end
|
|	do_func.sa 3.4 2/18/91
|
| Do_func performs the unimplemented operation.  The operation
| to be performed is determined from the lower 7 bits of the
| extension word (except in the case of fmovecr and fsincos).
| The opcode and tag bits form an index into a jump table in 
| tbldo.sa.  Cases of zero, infinity and NaN are handled in 
| do_func by forcing the default result.  Normalized and
| denormalized (there are no unnormalized numbers at this
| point) are passed onto the emulation code.  
|
| CMDREG1B and STAG are extracted from the fsave frame
| and combined to form the table index.  The function called
| will start with a0 pointing to the ETEMP operand.  Dyadic
| functions can find FPTEMP at -12(a0).
|
| Called functions return their result in fp0.  Sincos returns
| sin(x) in fp0 and cos(x) in fp1.
|

|		Copyright (C) Motorola, Inc. 1990
|			All Rights Reserved
|
|	THIS IS UNPUBLISHED PROPRIETARY SOURCE CODE OF MOTOROLA 
|	The copyright notice above does not evidence any  
|	actual or intended publication of such source code.

DO_FUNC:	|idnt    2,1 | Motorola 040 Floating Point Software Package

	|section	8

	.include "fpsp.h"

	|xref	t_dz2
	|xref	t_operr
	|xref	t_inx2
	|xref 	t_resdnrm
	|xref	dst_nan
	|xref	src_nan
	|xref	nrm_set
	|xref	sto_cos

	|xref	tblpre
	|xref	slognp1,slogn,slog10,slog2
	|xref	slognd,slog10d,slog2d
	|xref	smod,srem
	|xref	sscale
	|xref	smovcr

PONE:	.long	0x3fff0000,0x80000000,0x00000000	|+1
MONE:	.long	0xbfff0000,0x80000000,0x00000000	|-1
PZERO:	.long	0x00000000,0x00000000,0x00000000	|+0
MZERO:	.long	0x80000000,0x00000000,0x00000000	|-0
PINF:	.long	0x7fff0000,0x00000000,0x00000000	|+inf
MINF:	.long	0xffff0000,0x00000000,0x00000000	|-inf
QNAN:	.long	0x7fff0000,0xffffffff,0xffffffff	|non-signaling nan
PPIBY2:  .long	0x3FFF0000,0xC90FDAA2,0x2168C235	|+PI/2
MPIBY2:  .long	0xbFFF0000,0xC90FDAA2,0x2168C235	|-PI/2

	.global	do_func
do_func:
	clrb	CU_ONLY(%a6)
|
| Check for fmovecr.  It does not follow the format of fp gen
| unimplemented instructions.  The test is on the upper 6 bits;
| if they are $17, the inst is fmovecr.  Call entry smovcr
| directly.
|
	bfextu	CMDREG1B(%a6){#0:#6},%d0 |get opclass and src fields
	cmpil	#0x17,%d0		|if op class and size fields are $17, 
|				;it is FMOVECR; if not, continue
	bnes	not_fmovecr
	jmp	smovcr		|fmovecr; jmp directly to emulation

not_fmovecr:
	movew	CMDREG1B(%a6),%d0
	andl	#0x7F,%d0
	cmpil	#0x38,%d0		|if the extension is >= $38, 
	bge	serror		|it is illegal
	bfextu	STAG(%a6){#0:#3},%d1
	lsll	#3,%d0		|make room for STAG
	addl	%d1,%d0		|combine for final index into table
	leal	tblpre,%a1	|start of monster jump table
	movel	(%a1,%d0.w*4),%a1	|real target address
	leal	ETEMP(%a6),%a0	|a0 is pointer to src op
	movel	USER_FPCR(%a6),%d1
	andl	#0xFF,%d1		| discard all but rounding mode/prec
	fmovel	#0,%fpcr
	jmp	(%a1)
|
|	ERROR
|
	.global	serror
serror:
	st	STORE_FLG(%a6)
	rts
|
| These routines load forced values into fp0.  They are called
| by index into tbldo.
|
| Load a signed zero to fp0 and set inex2/ainex
|
	.global	snzrinx
snzrinx:
	btstb	#sign_bit,LOCAL_EX(%a0)	|get sign of source operand
	bnes	ld_mzinx	|if negative, branch
	bsr	ld_pzero	|bsr so we can return and set inx
	bra	t_inx2		|now, set the inx for the next inst
ld_mzinx:
	bsr	ld_mzero	|if neg, load neg zero, return here
	bra	t_inx2		|now, set the inx for the next inst
|
| Load a signed zero to fp0; do not set inex2/ainex 
|
	.global	szero
szero:
	btstb	#sign_bit,LOCAL_EX(%a0) |get sign of source operand
	bne	ld_mzero	|if neg, load neg zero
	bra	ld_pzero	|load positive zero
|
| Load a signed infinity to fp0; do not set inex2/ainex 
|
	.global	sinf
sinf:
	btstb	#sign_bit,LOCAL_EX(%a0)	|get sign of source operand
	bne	ld_minf			|if negative branch
	bra	ld_pinf
|
| Load a signed one to fp0; do not set inex2/ainex 
|
	.global	sone
sone:
	btstb	#sign_bit,LOCAL_EX(%a0)	|check sign of source
	bne	ld_mone
	bra	ld_pone
|
| Load a signed pi/2 to fp0; do not set inex2/ainex 
|
	.global	spi_2
spi_2:
	btstb	#sign_bit,LOCAL_EX(%a0)	|check sign of source
	bne	ld_mpi2
	bra	ld_ppi2
|
| Load either a +0 or +inf for plus/minus operand
|
	.global	szr_inf
szr_inf:
	btstb	#sign_bit,LOCAL_EX(%a0)	|check sign of source
	bne	ld_pzero
	bra	ld_pinf
|
| Result is either an operr or +inf for plus/minus operand
| [Used by slogn, slognp1, slog10, and slog2]
|
	.global	sopr_inf
sopr_inf:
	btstb	#sign_bit,LOCAL_EX(%a0)	|check sign of source
	bne	t_operr
	bra	ld_pinf
|
|	FLOGNP1 
|
	.global	sslognp1
sslognp1:
	fmovemx (%a0),%fp0-%fp0
	fcmpb	#-1,%fp0
	fbgt	slognp1		
	fbeq	t_dz2		|if = -1, divide by zero exception
	fmovel	#0,%FPSR		|clr N flag
	bra	t_operr		|take care of operands < -1
|
|	FETOXM1
|
	.global	setoxm1i
setoxm1i:
	btstb	#sign_bit,LOCAL_EX(%a0)	|check sign of source
	bne	ld_mone
	bra	ld_pinf
|
|	FLOGN
|
| Test for 1.0 as an input argument, returning +zero.  Also check
| the sign and return operr if negative.
|
	.global	sslogn
sslogn:
	btstb	#sign_bit,LOCAL_EX(%a0) 
	bne	t_operr		|take care of operands < 0
	cmpiw	#0x3fff,LOCAL_EX(%a0) |test for 1.0 input
	bne	slogn
	cmpil	#0x80000000,LOCAL_HI(%a0)
	bne	slogn
	tstl	LOCAL_LO(%a0)
	bne	slogn
	fmovex	PZERO,%fp0
	rts

	.global	sslognd
sslognd:
	btstb	#sign_bit,LOCAL_EX(%a0) 
	beq	slognd
	bra	t_operr		|take care of operands < 0

|
|	FLOG10
|
	.global	sslog10
sslog10:
	btstb	#sign_bit,LOCAL_EX(%a0)
	bne	t_operr		|take care of operands < 0
	cmpiw	#0x3fff,LOCAL_EX(%a0) |test for 1.0 input
	bne	slog10
	cmpil	#0x80000000,LOCAL_HI(%a0)
	bne	slog10
	tstl	LOCAL_LO(%a0)
	bne	slog10
	fmovex	PZERO,%fp0
	rts

	.global	sslog10d
sslog10d:
	btstb	#sign_bit,LOCAL_EX(%a0) 
	beq	slog10d
	bra	t_operr		|take care of operands < 0

|
|	FLOG2
|
	.global	sslog2
sslog2:
	btstb	#sign_bit,LOCAL_EX(%a0)
	bne	t_operr		|take care of operands < 0
	cmpiw	#0x3fff,LOCAL_EX(%a0) |test for 1.0 input
	bne	slog2
	cmpil	#0x80000000,LOCAL_HI(%a0)
	bne	slog2
	tstl	LOCAL_LO(%a0)
	bne	slog2
	fmovex	PZERO,%fp0
	rts

	.global	sslog2d
sslog2d:
	btstb	#sign_bit,LOCAL_EX(%a0) 
	beq	slog2d
	bra	t_operr		|take care of operands < 0

|
|	FMOD
|
pmodt:
|				;$21 fmod
|				;dtag,stag
	.long	smod		|  00,00  norm,norm = normal
	.long	smod_oper	|  00,01  norm,zero = nan with operr
	.long	smod_fpn	|  00,10  norm,inf  = fpn
	.long	smod_snan	|  00,11  norm,nan  = nan
	.long	smod_zro	|  01,00  zero,norm = +-zero
	.long	smod_oper	|  01,01  zero,zero = nan with operr
	.long	smod_zro	|  01,10  zero,inf  = +-zero
	.long	smod_snan	|  01,11  zero,nan  = nan
	.long	smod_oper	|  10,00  inf,norm  = nan with operr
	.long	smod_oper	|  10,01  inf,zero  = nan with operr
	.long	smod_oper	|  10,10  inf,inf   = nan with operr
	.long	smod_snan	|  10,11  inf,nan   = nan
	.long	smod_dnan	|  11,00  nan,norm  = nan
	.long	smod_dnan	|  11,01  nan,zero  = nan
	.long	smod_dnan	|  11,10  nan,inf   = nan
	.long	smod_dnan	|  11,11  nan,nan   = nan

	.global	pmod
pmod:
	clrb	FPSR_QBYTE(%a6) | clear quotient field
	bfextu	STAG(%a6){#0:#3},%d0 |stag = d0
	bfextu	DTAG(%a6){#0:#3},%d1 |dtag = d1

|
| Alias extended denorms to norms for the jump table.
|
	bclrl	#2,%d0
	bclrl	#2,%d1

	lslb	#2,%d1
	orb	%d0,%d1		|d1{3:2} = dtag, d1{1:0} = stag
|				;Tag values:
|				;00 = norm or denorm
|				;01 = zero
|				;10 = inf
|				;11 = nan
	lea	pmodt,%a1
	movel	(%a1,%d1.w*4),%a1
	jmp	(%a1)

smod_snan:
	bra	src_nan
smod_dnan:
	bra	dst_nan
smod_oper:
	bra	t_operr
smod_zro:
	moveb	ETEMP(%a6),%d1	|get sign of src op
	moveb	FPTEMP(%a6),%d0	|get sign of dst op
	eorb	%d0,%d1		|get exor of sign bits
	btstl	#7,%d1		|test for sign
	beqs	smod_zsn	|if clr, do not set sign big
	bsetb	#q_sn_bit,FPSR_QBYTE(%a6) |set q-byte sign bit
smod_zsn:
	btstl	#7,%d0		|test if + or -
	beq	ld_pzero	|if pos then load +0
	bra	ld_mzero	|else neg load -0
	
smod_fpn:
	moveb	ETEMP(%a6),%d1	|get sign of src op
	moveb	FPTEMP(%a6),%d0	|get sign of dst op
	eorb	%d0,%d1		|get exor of sign bits
	btstl	#7,%d1		|test for sign
	beqs	smod_fsn	|if clr, do not set sign big
	bsetb	#q_sn_bit,FPSR_QBYTE(%a6) |set q-byte sign bit
smod_fsn:
	tstb	DTAG(%a6)	|filter out denormal destination case
	bpls	smod_nrm	|
	leal	FPTEMP(%a6),%a0	|a0<- addr(FPTEMP)
	bra	t_resdnrm	|force UNFL(but exact) result
smod_nrm:
	fmovel USER_FPCR(%a6),%fpcr |use user's rmode and precision
	fmovex FPTEMP(%a6),%fp0	|return dest to fp0
	rts
		
|
|	FREM
|
premt:
|				;$25 frem
|				;dtag,stag
	.long	srem		|  00,00  norm,norm = normal
	.long	srem_oper	|  00,01  norm,zero = nan with operr
	.long	srem_fpn	|  00,10  norm,inf  = fpn
	.long	srem_snan	|  00,11  norm,nan  = nan
	.long	srem_zro	|  01,00  zero,norm = +-zero
	.long	srem_oper	|  01,01  zero,zero = nan with operr
	.long	srem_zro	|  01,10  zero,inf  = +-zero
	.long	srem_snan	|  01,11  zero,nan  = nan
	.long	srem_oper	|  10,00  inf,norm  = nan with operr
	.long	srem_oper	|  10,01  inf,zero  = nan with operr
	.long	srem_oper	|  10,10  inf,inf   = nan with operr
	.long	srem_snan	|  10,11  inf,nan   = nan
	.long	srem_dnan	|  11,00  nan,norm  = nan
	.long	srem_dnan	|  11,01  nan,zero  = nan
	.long	srem_dnan	|  11,10  nan,inf   = nan
	.long	srem_dnan	|  11,11  nan,nan   = nan

	.global	prem
prem:
	clrb	FPSR_QBYTE(%a6)   |clear quotient field
	bfextu	STAG(%a6){#0:#3},%d0 |stag = d0
	bfextu	DTAG(%a6){#0:#3},%d1 |dtag = d1
|
| Alias extended denorms to norms for the jump table.
|
	bclr	#2,%d0
	bclr	#2,%d1

	lslb	#2,%d1
	orb	%d0,%d1		|d1{3:2} = dtag, d1{1:0} = stag
|				;Tag values:
|				;00 = norm or denorm
|				;01 = zero
|				;10 = inf
|				;11 = nan
	lea	premt,%a1
	movel	(%a1,%d1.w*4),%a1
	jmp	(%a1)
	
srem_snan:
	bra	src_nan
srem_dnan:
	bra	dst_nan
srem_oper:
	bra	t_operr
srem_zro:
	moveb	ETEMP(%a6),%d1	|get sign of src op
	moveb	FPTEMP(%a6),%d0	|get sign of dst op
	eorb	%d0,%d1		|get exor of sign bits
	btstl	#7,%d1		|test for sign
	beqs	srem_zsn	|if clr, do not set sign big
	bsetb	#q_sn_bit,FPSR_QBYTE(%a6) |set q-byte sign bit
srem_zsn:
	btstl	#7,%d0		|test if + or -
	beq	ld_pzero	|if pos then load +0
	bra	ld_mzero	|else neg load -0
	
srem_fpn:
	moveb	ETEMP(%a6),%d1	|get sign of src op
	moveb	FPTEMP(%a6),%d0	|get sign of dst op
	eorb	%d0,%d1		|get exor of sign bits
	btstl	#7,%d1		|test for sign
	beqs	srem_fsn	|if clr, do not set sign big
	bsetb	#q_sn_bit,FPSR_QBYTE(%a6) |set q-byte sign bit
srem_fsn:
	tstb	DTAG(%a6)	|filter out denormal destination case
	bpls	srem_nrm	|
	leal	FPTEMP(%a6),%a0	|a0<- addr(FPTEMP)
	bra	t_resdnrm	|force UNFL(but exact) result
srem_nrm:
	fmovel USER_FPCR(%a6),%fpcr |use user's rmode and precision
	fmovex FPTEMP(%a6),%fp0	|return dest to fp0
	rts
|
|	FSCALE
|
pscalet:
|				;$26 fscale
|				;dtag,stag
	.long	sscale		|  00,00  norm,norm = result
	.long	sscale		|  00,01  norm,zero = fpn
	.long	scl_opr		|  00,10  norm,inf  = nan with operr
	.long	scl_snan	|  00,11  norm,nan  = nan
	.long	scl_zro		|  01,00  zero,norm = +-zero
	.long	scl_zro		|  01,01  zero,zero = +-zero
	.long	scl_opr		|  01,10  zero,inf  = nan with operr
	.long	scl_snan	|  01,11  zero,nan  = nan
	.long	scl_inf		|  10,00  inf,norm  = +-inf
	.long	scl_inf		|  10,01  inf,zero  = +-inf
	.long	scl_opr		|  10,10  inf,inf   = nan with operr
 	.long	scl_snan	|  10,11  inf,nan   = nan
 	.long	scl_dnan	|  11,00  nan,norm  = nan
 	.long	scl_dnan	|  11,01  nan,zero  = nan
 	.long	scl_dnan	|  11,10  nan,inf   = nan
	.long	scl_dnan	|  11,11  nan,nan   = nan

	.global	pscale
pscale:
	bfextu	STAG(%a6){#0:#3},%d0 |stag in d0
	bfextu	DTAG(%a6){#0:#3},%d1 |dtag in d1
	bclrl	#2,%d0		|alias  denorm into norm
	bclrl	#2,%d1		|alias  denorm into norm
	lslb	#2,%d1
	orb	%d0,%d1		|d1{4:2} = dtag, d1{1:0} = stag
|				;dtag values     stag values:
|				;000 = norm      00 = norm
|				;001 = zero	 01 = zero
|				;010 = inf	 10 = inf
|				;011 = nan	 11 = nan
|				;100 = dnrm
|
|
	leal	pscalet,%a1	|load start of jump table
	movel	(%a1,%d1.w*4),%a1	|load a1 with label depending on tag
	jmp	(%a1)		|go to the routine

scl_opr:
	bra	t_operr

scl_dnan:
	bra	dst_nan

scl_zro:
	btstb	#sign_bit,FPTEMP_EX(%a6)	|test if + or -
	beq	ld_pzero		|if pos then load +0
	bra	ld_mzero		|if neg then load -0
scl_inf:
	btstb	#sign_bit,FPTEMP_EX(%a6)	|test if + or -
	beq	ld_pinf			|if pos then load +inf
	bra	ld_minf			|else neg load -inf
scl_snan:
	bra	src_nan
|
|	FSINCOS
|
	.global	ssincosz
ssincosz:
	btstb	#sign_bit,ETEMP(%a6)	|get sign
	beqs	sincosp
	fmovex	MZERO,%fp0
	bras	sincoscom
sincosp:
	fmovex PZERO,%fp0
sincoscom:
  	fmovemx PONE,%fp1-%fp1	|do not allow FPSR to be affected
	bra	sto_cos		|store cosine result

	.global	ssincosi
ssincosi:
	fmovex QNAN,%fp1	|load NAN
	bsr	sto_cos		|store cosine result
	fmovex QNAN,%fp0	|load NAN
	bra	t_operr

	.global	ssincosnan
ssincosnan:
	movel	ETEMP_EX(%a6),FP_SCR1(%a6)
	movel	ETEMP_HI(%a6),FP_SCR1+4(%a6)
	movel	ETEMP_LO(%a6),FP_SCR1+8(%a6)
	bsetb	#signan_bit,FP_SCR1+4(%a6)
	fmovemx FP_SCR1(%a6),%fp1-%fp1
	bsr	sto_cos
	bra	src_nan
|
| This code forces default values for the zero, inf, and nan cases 
| in the transcendentals code.  The CC bits must be set in the
| stacked FPSR to be correctly reported.
|
|**Returns +PI/2
	.global	ld_ppi2
ld_ppi2:
	fmovex PPIBY2,%fp0		|load +pi/2
	bra	t_inx2			|set inex2 exc

|**Returns -PI/2
	.global	ld_mpi2
ld_mpi2:
	fmovex MPIBY2,%fp0		|load -pi/2
	orl	#neg_mask,USER_FPSR(%a6)	|set N bit
	bra	t_inx2			|set inex2 exc

|**Returns +inf
	.global	ld_pinf
ld_pinf:
	fmovex PINF,%fp0		|load +inf
	orl	#inf_mask,USER_FPSR(%a6)	|set I bit
	rts

|**Returns -inf
	.global	ld_minf
ld_minf:
	fmovex MINF,%fp0		|load -inf
	orl	#neg_mask+inf_mask,USER_FPSR(%a6)	|set N and I bits
	rts

|**Returns +1
	.global	ld_pone
ld_pone:
	fmovex PONE,%fp0		|load +1
	rts

|**Returns -1
	.global	ld_mone
ld_mone:
	fmovex MONE,%fp0		|load -1
	orl	#neg_mask,USER_FPSR(%a6)	|set N bit
	rts

|**Returns +0
	.global	ld_pzero
ld_pzero:
	fmovex PZERO,%fp0		|load +0
	orl	#z_mask,USER_FPSR(%a6)	|set Z bit
	rts

|**Returns -0
	.global	ld_mzero
ld_mzero:
	fmovex MZERO,%fp0		|load -0
	orl	#neg_mask+z_mask,USER_FPSR(%a6)	|set N and Z bits
	rts

	|end
|
|	fpsp.h 3.3 3.3
|

|		Copyright (C) Motorola, Inc. 1990
|			All Rights Reserved
|
|	THIS IS UNPUBLISHED PROPRIETARY SOURCE CODE OF MOTOROLA 
|	The copyright notice above does not evidence any  
|	actual or intended publication of such source code.

|	fpsp.h --- stack frame offsets during FPSP exception handling
|
|	These equates are used to access the exception frame, the fsave
|	frame and any local variables needed by the FPSP package.
|	
|	All FPSP handlers begin by executing:
|
|		link	a6,#-LOCAL_SIZE
|		fsave	-(a7)
|		movem.l	d0-d1/a0-a1,USER_DA(a6)
|		fmovem.x fp0-fp3,USER_FP0(a6)
|		fmove.l	fpsr/fpcr/fpiar,USER_FPSR(a6)
|
|	After initialization, the stack looks like this:
|
|	A7 --->	+-------------------------------+
|		|				|
|		|	FPU fsave area		|
|		|				|
|		+-------------------------------+
|		|				|
|		|	FPSP Local Variables	|
|		|	     including		|
|		|	  saved registers	|
|		|				|
|		+-------------------------------+
|	A6 --->	|	Saved A6		|
|		+-------------------------------+
|		|				|
|		|	Exception Frame		|
|		|				|
|		|				|
|
|	Positive offsets from A6 refer to the exception frame.  Negative
|	offsets refer to the Local Variable area and the fsave area.
|	The fsave frame is also accessible from the top via A7.
|
|	On exit, the handlers execute:
|
|		movem.l	USER_DA(a6),d0-d1/a0-a1
|		fmovem.x USER_FP0(a6),fp0-fp3
|		fmove.l	USER_FPSR(a6),fpsr/fpcr/fpiar
|		frestore (a7)+
|		unlk	a6
|
|	and then either "bra fpsp_done" if the exception was completely
|	handled	by the package, or "bra real_xxxx" which is an external
|	label to a routine that will process a real exception of the
|	type that was generated.  Some handlers may omit the "frestore"
|	if the FPU state after the exception is idle.
|
|	Sometimes the exception handler will transform the fsave area
|	because it needs to report an exception back to the user.  This
|	can happen if the package is entered for an unimplemented float
|	instruction that generates (say) an underflow.  Alternatively,
|	a second fsave frame can be pushed onto the stack and the
|	handler	exit code will reload the new frame and discard the old.
|
|	The registers d0, d1, a0, a1 and fp0-fp3 are always saved and
|	restored from the "local variable" area and can be used as
|	temporaries.  If a routine needs to change any
|	of these registers, it should modify the saved copy and let
|	the handler exit code restore the value.
|
|----------------------------------------------------------------------
|
|	Local Variables on the stack
|
	.set	LOCAL_SIZE,192		| bytes needed for local variables
	.set	LV,-LOCAL_SIZE	| convenient base value
|
	.set	USER_DA,LV+0		| save space for D0-D1,A0-A1
	.set	USER_D0,LV+0		| saved user D0
	.set	USER_D1,LV+4		| saved user D1
	.set	USER_A0,LV+8		| saved user A0
	.set	USER_A1,LV+12		| saved user A1
	.set	USER_FP0,LV+16		| saved user FP0
	.set	USER_FP1,LV+28		| saved user FP1
	.set	USER_FP2,LV+40		| saved user FP2
	.set	USER_FP3,LV+52		| saved user FP3
	.set	USER_FPCR,LV+64		| saved user FPCR
	.set	FPCR_ENABLE,USER_FPCR+2	| 	FPCR exception enable 
	.set	FPCR_MODE,USER_FPCR+3	| 	FPCR rounding mode control
	.set	USER_FPSR,LV+68		| saved user FPSR
	.set	FPSR_CC,USER_FPSR+0	| 	FPSR condition code
	.set	FPSR_QBYTE,USER_FPSR+1	| 	FPSR quotient
	.set	FPSR_EXCEPT,USER_FPSR+2	| 	FPSR exception
	.set	FPSR_AEXCEPT,USER_FPSR+3	| 	FPSR accrued exception
	.set	USER_FPIAR,LV+72		| saved user FPIAR
	.set	FP_SCR1,LV+76		| room for a temporary float value
	.set	FP_SCR2,LV+92		| room for a temporary float value
	.set	L_SCR1,LV+108		| room for a temporary long value
	.set	L_SCR2,LV+112		| room for a temporary long value
	.set	STORE_FLG,LV+116
	.set	BINDEC_FLG,LV+117		| used in bindec
	.set	DNRM_FLG,LV+118		| used in res_func
	.set	RES_FLG,LV+119		| used in res_func
	.set	DY_MO_FLG,LV+120		| dyadic/monadic flag
	.set	UFLG_TMP,LV+121		| temporary for uflag errata
	.set	CU_ONLY,LV+122		| cu-only flag
	.set	VER_TMP,LV+123		| temp holding for version number
	.set	L_SCR3,LV+124		| room for a temporary long value
	.set	FP_SCR3,LV+128		| room for a temporary float value
	.set	FP_SCR4,LV+144		| room for a temporary float value
	.set	FP_SCR5,LV+160		| room for a temporary float value
	.set	FP_SCR6,LV+176
|
|NEXT		equ	LV+192		;need to increase LOCAL_SIZE
|
|--------------------------------------------------------------------------
|
|	fsave offsets and bit definitions
|
|	Offsets are defined from the end of an fsave because the last 10
|	words of a busy frame are the same as the unimplemented frame.
|
	.set	CU_SAVEPC,LV-92		| micro-pc for CU (1 byte)
	.set	FPR_DIRTY_BITS,LV-91		| fpr dirty bits
|
	.set	WBTEMP,LV-76		| write back temp (12 bytes)
	.set	WBTEMP_EX,WBTEMP		| wbtemp sign and exponent (2 bytes)
	.set	WBTEMP_HI,WBTEMP+4	| wbtemp mantissa [63:32] (4 bytes)
	.set	WBTEMP_LO,WBTEMP+8	| wbtemp mantissa [31:00] (4 bytes)
|
	.set	WBTEMP_SGN,WBTEMP+2	| used to store sign
|
	.set	FPSR_SHADOW,LV-64		| fpsr shadow reg
|
	.set	FPIARCU,LV-60		| Instr. addr. reg. for CU (4 bytes)
|
	.set	CMDREG2B,LV-52		| cmd reg for machine 2
	.set	CMDREG3B,LV-48		| cmd reg for E3 exceptions (2 bytes)
|
	.set	NMNEXC,LV-44		| NMNEXC (unsup,snan bits only)
	.set	nmn_unsup_bit,1	| 
	.set	nmn_snan_bit,0	| 
|
	.set	NMCEXC,LV-43		| NMNEXC & NMCEXC
	.set	nmn_operr_bit,7
	.set	nmn_ovfl_bit,6
	.set	nmn_unfl_bit,5
	.set	nmc_unsup_bit,4
	.set	nmc_snan_bit,3
	.set	nmc_operr_bit,2
	.set	nmc_ovfl_bit,1
	.set	nmc_unfl_bit,0
|
	.set	STAG,LV-40		| source tag (1 byte)
	.set	WBTEMP_GRS,LV-40		| alias wbtemp guard, round, sticky
	.set	guard_bit,1		| guard bit is bit number 1
	.set	round_bit,0		| round bit is bit number 0
	.set	stag_mask,0xE0		| upper 3 bits are source tag type
	.set	denorm_bit,7		| bit determines if denorm or unnorm
	.set	etemp15_bit,4		| etemp exponent bit #15
	.set	wbtemp66_bit,2		| wbtemp mantissa bit #66
	.set	wbtemp1_bit,1		| wbtemp mantissa bit #1
	.set	wbtemp0_bit,0		| wbtemp mantissa bit #0
|
	.set	STICKY,LV-39		| holds sticky bit
	.set	sticky_bit,7
|
	.set	CMDREG1B,LV-36		| cmd reg for E1 exceptions (2 bytes)
	.set	kfact_bit,12		| distinguishes static/dynamic k-factor
|					;on packed move outs.  NOTE: this
|					;equate only works when CMDREG1B is in
|					;a register.
|
	.set	CMDWORD,LV-35		| command word in cmd1b
	.set	direction_bit,5		| bit 0 in opclass
	.set	size_bit2,12		| bit 2 in size field
|
	.set	DTAG,LV-32		| dest tag (1 byte)
	.set	dtag_mask,0xE0		| upper 3 bits are dest type tag
	.set	fptemp15_bit,4		| fptemp exponent bit #15
|
	.set	WB_BYTE,LV-31		| holds WBTE15 bit (1 byte)
	.set	wbtemp15_bit,4		| wbtemp exponent bit #15
|
	.set	E_BYTE,LV-28		| holds E1 and E3 bits (1 byte)
	.set	E1,2		| which bit is E1 flag
	.set	E3,1		| which bit is E3 flag
	.set	SFLAG,0		| which bit is S flag
|
	.set	T_BYTE,LV-27		| holds T and U bits (1 byte)
	.set	XFLAG,7		| which bit is X flag
	.set	UFLAG,5		| which bit is U flag
	.set	TFLAG,4		| which bit is T flag
|
	.set	FPTEMP,LV-24		| fptemp (12 bytes)
	.set	FPTEMP_EX,FPTEMP		| fptemp sign and exponent (2 bytes)
	.set	FPTEMP_HI,FPTEMP+4	| fptemp mantissa [63:32] (4 bytes)
	.set	FPTEMP_LO,FPTEMP+8	| fptemp mantissa [31:00] (4 bytes)
|
	.set	FPTEMP_SGN,FPTEMP+2	| used to store sign
|
	.set	ETEMP,LV-12		| etemp (12 bytes)
	.set	ETEMP_EX,ETEMP		| etemp sign and exponent (2 bytes)
	.set	ETEMP_HI,ETEMP+4		| etemp mantissa [63:32] (4 bytes)
	.set	ETEMP_LO,ETEMP+8		| etemp mantissa [31:00] (4 bytes)
|
	.set	ETEMP_SGN,ETEMP+2		| used to store sign
|
	.set	EXC_SR,4		| exception frame status register
	.set	EXC_PC,6		| exception frame program counter
	.set	EXC_VEC,10		| exception frame vector (format+vector#)
	.set	EXC_EA,12		| exception frame effective address
|
|--------------------------------------------------------------------------
|
|	FPSR/FPCR bits
|
	.set	neg_bit,3	|  negative result
	.set	z_bit,2	|  zero result
	.set	inf_bit,1	|  infinity result
	.set	nan_bit,0	|  not-a-number result
|
	.set	q_sn_bit,7	|  sign bit of quotient byte
|
	.set	bsun_bit,7	|  branch on unordered
	.set	snan_bit,6	|  signalling nan
	.set	operr_bit,5	|  operand error
	.set	ovfl_bit,4	|  overflow
	.set	unfl_bit,3	|  underflow
	.set	dz_bit,2	|  divide by zero
	.set	inex2_bit,1	|  inexact result 2
	.set	inex1_bit,0	|  inexact result 1
|
	.set	aiop_bit,7	|  accrued illegal operation
	.set	aovfl_bit,6	|  accrued overflow
	.set	aunfl_bit,5	|  accrued underflow
	.set	adz_bit,4	|  accrued divide by zero
	.set	ainex_bit,3	|  accrued inexact
|
|	FPSR individual bit masks
|
	.set	neg_mask,0x08000000
	.set	z_mask,0x04000000
	.set	inf_mask,0x02000000
	.set	nan_mask,0x01000000
|
	.set	bsun_mask,0x00008000	| 
	.set	snan_mask,0x00004000
	.set	operr_mask,0x00002000
	.set	ovfl_mask,0x00001000
	.set	unfl_mask,0x00000800
	.set	dz_mask,0x00000400
	.set	inex2_mask,0x00000200
	.set	inex1_mask,0x00000100
|
	.set	aiop_mask,0x00000080	|  accrued illegal operation
	.set	aovfl_mask,0x00000040	|  accrued overflow
	.set	aunfl_mask,0x00000020	|  accrued underflow
	.set	adz_mask,0x00000010	|  accrued divide by zero
	.set	ainex_mask,0x00000008	|  accrued inexact
|
|	FPSR combinations used in the FPSP
|
	.set	dzinf_mask,inf_mask+dz_mask+adz_mask
	.set	opnan_mask,nan_mask+operr_mask+aiop_mask
	.set	nzi_mask,0x01ffffff 	|  clears N, Z, and I
	.set	unfinx_mask,unfl_mask+inex2_mask+aunfl_mask+ainex_mask
	.set	unf2inx_mask,unfl_mask+inex2_mask+ainex_mask
	.set	ovfinx_mask,ovfl_mask+inex2_mask+aovfl_mask+ainex_mask
	.set	inx1a_mask,inex1_mask+ainex_mask
	.set	inx2a_mask,inex2_mask+ainex_mask
	.set	snaniop_mask,nan_mask+snan_mask+aiop_mask
	.set	naniop_mask,nan_mask+aiop_mask
	.set	neginf_mask,neg_mask+inf_mask
	.set	infaiop_mask,inf_mask+aiop_mask
	.set	negz_mask,neg_mask+z_mask
	.set	opaop_mask,operr_mask+aiop_mask
	.set	unfl_inx_mask,unfl_mask+aunfl_mask+ainex_mask
	.set	ovfl_inx_mask,ovfl_mask+aovfl_mask+ainex_mask
|
|--------------------------------------------------------------------------
|
|	FPCR rounding modes
|
	.set	x_mode,0x00	|  round to extended
	.set	s_mode,0x40	|  round to single
	.set	d_mode,0x80	|  round to double
|
	.set	rn_mode,0x00	|  round nearest
	.set	rz_mode,0x10	|  round to zero
	.set	rm_mode,0x20	|  round to minus infinity
	.set	rp_mode,0x30	|  round to plus infinity
|
|--------------------------------------------------------------------------
|
|	Miscellaneous equates
|
	.set	signan_bit,6	|  signalling nan bit in mantissa
	.set	sign_bit,7
|
	.set	rnd_stky_bit,29	|  round/sticky bit of mantissa
|				this can only be used if in a data register
	.set	sx_mask,0x01800000 |  set s and x bits in word $48
|
	.set	LOCAL_EX,0
	.set	LOCAL_SGN,2
	.set	LOCAL_HI,4
	.set	LOCAL_LO,8
	.set	LOCAL_GRS,12	|  valid ONLY for FP_SCR1, FP_SCR2
|
|
	.set	norm_tag,0x00	|  tag bits in {7:5} position
	.set	zero_tag,0x20
	.set	inf_tag,0x40
	.set	nan_tag,0x60
	.set	dnrm_tag,0x80
|
|	fsave sizes and formats
|
	.set	VER_4,0x40		|  fpsp compatible version numbers
|					are in the $40s {$40-$4f}
	.set	VER_40,0x40		|  original version number
	.set	VER_41,0x41		|  revision version number
|
	.set	BUSY_SIZE,100		|  size of busy frame
	.set	BUSY_FRAME,LV-BUSY_SIZE	|  start of busy frame
|
	.set	UNIMP_40_SIZE,44		|  size of orig unimp frame
	.set	UNIMP_41_SIZE,52		|  size of rev unimp frame
|
	.set	IDLE_SIZE,4		|  size of idle frame
	.set	IDLE_FRAME,LV-IDLE_SIZE	|  start of idle frame
|
|	exception vectors
|
	.set	TRACE_VEC,0x2024		|  trace trap
	.set	FLINE_VEC,0x002C		|  real F-line
	.set	UNIMP_VEC,0x202C		|  unimplemented
	.set	INEX_VEC,0x00C4
|
	.set	dbl_thresh,0x3C01
	.set	sgl_thresh,0x3F81
|
|
|	gen_except.sa 3.7 1/16/92
|
|	gen_except --- FPSP routine to detect reportable exceptions
|	
|	This routine compares the exception enable byte of the
|	user_fpcr on the stack with the exception status byte
|	of the user_fpsr. 
|
|	Any routine which may report an exceptions must load
|	the stack frame in memory with the exceptional operand(s).
|
|	Priority for exceptions is:
|
|	Highest:	bsun
|			snan
|			operr
|			ovfl
|			unfl
|			dz
|			inex2
|	Lowest:		inex1
|
|	Note: The IEEE standard specifies that inex2 is to be
|	reported if ovfl occurs and the ovfl enable bit is not
|	set but the inex2 enable bit is.  
|
|
|		Copyright (C) Motorola, Inc. 1990
|			All Rights Reserved
|
|	THIS IS UNPUBLISHED PROPRIETARY SOURCE CODE OF MOTOROLA 
|	The copyright notice above does not evidence any  
|	actual or intended publication of such source code.

GEN_EXCEPT:    |idnt    2,1 | Motorola 040 Floating Point Software Package

	|section 8

	.include "fpsp.h"

	|xref	real_trace
	|xref	fpsp_done
	|xref	fpsp_fmt_error

exc_tbl:
	.long	bsun_exc
	.long	commonE1
	.long	commonE1
	.long	ovfl_unfl
	.long	ovfl_unfl
	.long	commonE1
	.long	commonE3
	.long	commonE3
	.long	no_match

	.global	gen_except
gen_except:
	cmpib	#IDLE_SIZE-4,1(%a7)	|test for idle frame
	beq	do_check		|go handle idle frame
	cmpib	#UNIMP_40_SIZE-4,1(%a7)	|test for orig unimp frame
	beqs	unimp_x			|go handle unimp frame
	cmpib	#UNIMP_41_SIZE-4,1(%a7)	|test for rev unimp frame
	beqs	unimp_x			|go handle unimp frame
	cmpib	#BUSY_SIZE-4,1(%a7)	|if size <> $60, fmt error
	bnel	fpsp_fmt_error
	leal	BUSY_SIZE+LOCAL_SIZE(%a7),%a1 |init a1 so fpsp.h
|					;equates will work
| Fix up the new busy frame with entries from the unimp frame
|
	movel	ETEMP_EX(%a6),ETEMP_EX(%a1) |copy etemp from unimp
	movel	ETEMP_HI(%a6),ETEMP_HI(%a1) |frame to busy frame
	movel	ETEMP_LO(%a6),ETEMP_LO(%a1) 
	movel	CMDREG1B(%a6),CMDREG1B(%a1) |set inst in frame to unimp
	movel	CMDREG1B(%a6),%d0		|fix cmd1b to make it
	andl	#0x03c30000,%d0		|work for cmd3b
	bfextu	CMDREG1B(%a6){#13:#1},%d1	|extract bit 2
	lsll	#5,%d1			
	swap	%d1
	orl	%d1,%d0			|put it in the right place
	bfextu	CMDREG1B(%a6){#10:#3},%d1	|extract bit 3,4,5
	lsll	#2,%d1
	swap	%d1
	orl	%d1,%d0			|put them in the right place
	movel	%d0,CMDREG3B(%a1)		|in the busy frame
|
| Or in the FPSR from the emulation with the USER_FPSR on the stack.
|
	fmovel	%FPSR,%d0		
	orl	%d0,USER_FPSR(%a6)
	movel	USER_FPSR(%a6),FPSR_SHADOW(%a1) |set exc bits
	orl	#sx_mask,E_BYTE(%a1)
	bra	do_clean

|
| Frame is an unimp frame possible resulting from an fmove <ea>,fp0
| that caused an exception
|
| a1 is modified to point into the new frame allowing fpsp equates
| to be valid.
|
unimp_x:
	cmpib	#UNIMP_40_SIZE-4,1(%a7)	|test for orig unimp frame
	bnes	test_rev
	leal	UNIMP_40_SIZE+LOCAL_SIZE(%a7),%a1
	bras	unimp_con
test_rev:
	cmpib	#UNIMP_41_SIZE-4,1(%a7)	|test for rev unimp frame
	bnel	fpsp_fmt_error		|if not $28 or $30
	leal	UNIMP_41_SIZE+LOCAL_SIZE(%a7),%a1
	
unimp_con:
|
| Fix up the new unimp frame with entries from the old unimp frame
|
	movel	CMDREG1B(%a6),CMDREG1B(%a1) |set inst in frame to unimp
|
| Or in the FPSR from the emulation with the USER_FPSR on the stack.
|
	fmovel	%FPSR,%d0		
	orl	%d0,USER_FPSR(%a6)
	bra	do_clean

|
| Frame is idle, so check for exceptions reported through
| USER_FPSR and set the unimp frame accordingly.  
| A7 must be incremented to the point before the
| idle fsave vector to the unimp vector.
|
	
do_check:
	addl	#4,%a7			|point A7 back to unimp frame
|
| Or in the FPSR from the emulation with the USER_FPSR on the stack.
|
	fmovel	%FPSR,%d0		
	orl	%d0,USER_FPSR(%a6)
|
| On a busy frame, we must clear the nmnexc bits.
|
	cmpib	#BUSY_SIZE-4,1(%a7)	|check frame type
	bnes	check_fr		|if busy, clr nmnexc
	clrw	NMNEXC(%a6)		|clr nmnexc & nmcexc
	btstb	#5,CMDREG1B(%a6)		|test for fmove out
	bnes	frame_com
	movel	USER_FPSR(%a6),FPSR_SHADOW(%a6) |set exc bits
	orl	#sx_mask,E_BYTE(%a6)
	bras	frame_com
check_fr:
	cmpb	#UNIMP_40_SIZE-4,1(%a7)
	beqs	frame_com
	clrw	NMNEXC(%a6)
frame_com:
	moveb	FPCR_ENABLE(%a6),%d0	|get fpcr enable byte
	andb	FPSR_EXCEPT(%a6),%d0	|and in the fpsr exc byte
	bfffo	%d0{#24:#8},%d1		|test for first set bit
	leal	exc_tbl,%a0		|load jmp table address
	subib	#24,%d1			|normalize bit offset to 0-8
	movel	(%a0,%d1.w*4),%a0		|load routine address based
|					;based on first enabled exc
	jmp	(%a0)			|jump to routine
|
| Bsun is not possible in unimp or unsupp
|
bsun_exc:
	bra	do_clean
|
| The typical work to be done to the unimp frame to report an 
| exception is to set the E1/E3 byte and clr the U flag.
| commonE1 does this for E1 exceptions, which are snan, 
| operr, and dz.  commonE3 does this for E3 exceptions, which 
| are inex2 and inex1, and also clears the E1 exception bit
| left over from the unimp exception.
|
commonE1:
	bsetb	#E1,E_BYTE(%a6)		|set E1 flag
	bra	commonE			|go clean and exit

commonE3:
	tstb	UFLG_TMP(%a6)		|test flag for unsup/unimp state
	bnes	unsE3
uniE3:
	bsetb	#E3,E_BYTE(%a6)		|set E3 flag
	bclrb	#E1,E_BYTE(%a6)		|clr E1 from unimp
	bra	commonE

unsE3:
	tstb	RES_FLG(%a6)
	bnes	unsE3_0	
unsE3_1:
	bsetb	#E3,E_BYTE(%a6)		|set E3 flag
unsE3_0:
	bclrb	#E1,E_BYTE(%a6)		|clr E1 flag
	movel	CMDREG1B(%a6),%d0
	andl	#0x03c30000,%d0		|work for cmd3b
	bfextu	CMDREG1B(%a6){#13:#1},%d1	|extract bit 2
	lsll	#5,%d1			
	swap	%d1
	orl	%d1,%d0			|put it in the right place
	bfextu	CMDREG1B(%a6){#10:#3},%d1	|extract bit 3,4,5
	lsll	#2,%d1
	swap	%d1
	orl	%d1,%d0			|put them in the right place
	movel	%d0,CMDREG3B(%a6)		|in the busy frame

commonE:
	bclrb	#UFLAG,T_BYTE(%a6)	|clr U flag from unimp
	bra	do_clean		|go clean and exit
|
| No bits in the enable byte match existing exceptions.  Check for
| the case of the ovfl exc without the ovfl enabled, but with
| inex2 enabled.
|
no_match:
	btstb	#inex2_bit,FPCR_ENABLE(%a6) |check for ovfl/inex2 case
	beqs	no_exc			|if clear, exit
	btstb	#ovfl_bit,FPSR_EXCEPT(%a6) |now check ovfl
	beqs	no_exc			|if clear, exit
	bras	ovfl_unfl		|go to unfl_ovfl to determine if
|					;it is an unsupp or unimp exc
	
| No exceptions are to be reported.  If the instruction was 
| unimplemented, no FPU restore is necessary.  If it was
| unsupported, we must perform the restore.
no_exc:
	tstb	UFLG_TMP(%a6)	|test flag for unsupp/unimp state
	beqs	uni_no_exc
uns_no_exc:
	tstb	RES_FLG(%a6)	|check if frestore is needed
	bne	do_clean 	|if clear, no frestore needed
uni_no_exc:
	moveml	USER_DA(%a6),%d0-%d1/%a0-%a1
	fmovemx USER_FP0(%a6),%fp0-%fp3
	fmoveml USER_FPCR(%a6),%fpcr/%fpsr/%fpiar
	unlk	%a6
	bra	finish_up
|
| Unsupported Data Type Handler:
| Ovfl:
|   An fmoveout that results in an overflow is reported this way.
| Unfl:
|   An fmoveout that results in an underflow is reported this way.
|
| Unimplemented Instruction Handler:
| Ovfl:
|   Only scosh, setox, ssinh, stwotox, and scale can set overflow in 
|   this manner.
| Unfl:
|   Stwotox, setox, and scale can set underflow in this manner.
|   Any of the other Library Routines such that f(x)=x in which
|   x is an extended denorm can report an underflow exception. 
|   It is the responsibility of the exception-causing exception 
|   to make sure that WBTEMP is correct.
|
|   The exceptional operand is in FP_SCR1.
|
ovfl_unfl:
	tstb	UFLG_TMP(%a6)	|test flag for unsupp/unimp state
	beqs	ofuf_con
|
| The caller was from an unsupported data type trap.  Test if the
| caller set CU_ONLY.  If so, the exceptional operand is expected in
| FPTEMP, rather than WBTEMP.
|
	tstb	CU_ONLY(%a6)		|test if inst is cu-only
	beq	unsE3
|	move.w	#$fe,CU_SAVEPC(%a6)
	clrb	CU_SAVEPC(%a6)
	bsetb	#E1,E_BYTE(%a6)		|set E1 exception flag
	movew	ETEMP_EX(%a6),FPTEMP_EX(%a6)
	movel	ETEMP_HI(%a6),FPTEMP_HI(%a6)
	movel	ETEMP_LO(%a6),FPTEMP_LO(%a6)
	bsetb	#fptemp15_bit,DTAG(%a6)	|set fpte15
	bclrb	#UFLAG,T_BYTE(%a6)	|clr U flag from unimp
	bra	do_clean		|go clean and exit

ofuf_con:
	moveb	(%a7),VER_TMP(%a6)	|save version number
	cmpib	#BUSY_SIZE-4,1(%a7)	|check for busy frame
	beqs	busy_fr			|if unimp, grow to busy
	cmpib	#VER_40,(%a7)		|test for orig unimp frame
	bnes	try_41			|if not, test for rev frame
	moveql	#13,%d0			|need to zero 14 lwords
	bras	ofuf_fin
try_41:
	cmpib	#VER_41,(%a7)		|test for rev unimp frame
	bnel	fpsp_fmt_error		|if neither, exit with error
	moveql	#11,%d0			|need to zero 12 lwords

ofuf_fin:
	clrl	(%a7)
loop1:
	clrl	-(%a7)			|clear and dec a7
	dbra	%d0,loop1
	moveb	VER_TMP(%a6),(%a7)
	moveb	#BUSY_SIZE-4,1(%a7)		|write busy fmt word.
busy_fr:
	movel	FP_SCR1(%a6),WBTEMP_EX(%a6)	|write
	movel	FP_SCR1+4(%a6),WBTEMP_HI(%a6)	|exceptional op to
	movel	FP_SCR1+8(%a6),WBTEMP_LO(%a6)	|wbtemp
	bsetb	#E3,E_BYTE(%a6)			|set E3 flag
	bclrb	#E1,E_BYTE(%a6)			|make sure E1 is clear
	bclrb	#UFLAG,T_BYTE(%a6)		|clr U flag
	movel	USER_FPSR(%a6),FPSR_SHADOW(%a6)
	orl	#sx_mask,E_BYTE(%a6)
	movel	CMDREG1B(%a6),%d0		|fix cmd1b to make it
	andl	#0x03c30000,%d0		|work for cmd3b
	bfextu	CMDREG1B(%a6){#13:#1},%d1	|extract bit 2
	lsll	#5,%d1			
	swap	%d1
	orl	%d1,%d0			|put it in the right place
	bfextu	CMDREG1B(%a6){#10:#3},%d1	|extract bit 3,4,5
	lsll	#2,%d1
	swap	%d1
	orl	%d1,%d0			|put them in the right place
	movel	%d0,CMDREG3B(%a6)		|in the busy frame

|
| Check if the frame to be restored is busy or unimp.
|** NOTE *** Bug fix for errata (0d43b #3)
| If the frame is unimp, we must create a busy frame to 
| fix the bug with the nmnexc bits in cases in which they
| are set by a previous instruction and not cleared by
| the save. The frame will be unimp only if the final 
| instruction in an emulation routine caused the exception
| by doing an fmove <ea>,fp0.  The exception operand, in
| internal format, is in fptemp.
|
do_clean:
	cmpib	#UNIMP_40_SIZE-4,1(%a7)
	bnes	do_con
	moveql	#13,%d0			|in orig, need to zero 14 lwords
	bras	do_build
do_con:
	cmpib	#UNIMP_41_SIZE-4,1(%a7)
	bnes	do_restore		|frame must be busy
	moveql	#11,%d0			|in rev, need to zero 12 lwords

do_build:
	moveb	(%a7),VER_TMP(%a6)
	clrl	(%a7)
loop2:
	clrl	-(%a7)			|clear and dec a7
	dbra	%d0,loop2
|
| Use a1 as pointer into new frame.  a6 is not correct if an unimp or
| busy frame was created as the result of an exception on the final
| instruction of an emulation routine.
|
| We need to set the nmcexc bits if the exception is E1. Otherwise,
| the exc taken will be inex2.
|
	leal	BUSY_SIZE+LOCAL_SIZE(%a7),%a1	|init a1 for new frame
	moveb	VER_TMP(%a6),(%a7)	|write busy fmt word
	moveb	#BUSY_SIZE-4,1(%a7)
	movel	FP_SCR1(%a6),WBTEMP_EX(%a1) 	|write
	movel	FP_SCR1+4(%a6),WBTEMP_HI(%a1)	|exceptional op to
	movel	FP_SCR1+8(%a6),WBTEMP_LO(%a1)	|wbtemp
|	btst.b	#E1,E_BYTE(%a1)
|	beq.b	do_restore
	bfextu	USER_FPSR(%a6){#17:#4},%d0	|get snan/operr/ovfl/unfl bits
	bfins	%d0,NMCEXC(%a1){#4:#4}	|and insert them in nmcexc
	movel	USER_FPSR(%a6),FPSR_SHADOW(%a1) |set exc bits
	orl	#sx_mask,E_BYTE(%a1)
	
do_restore:
	moveml	USER_DA(%a6),%d0-%d1/%a0-%a1
	fmovemx USER_FP0(%a6),%fp0-%fp3
	fmoveml USER_FPCR(%a6),%fpcr/%fpsr/%fpiar
	frestore (%a7)+
	tstb	RES_FLG(%a6)	|RES_FLG indicates a "continuation" frame
	beq	cont
	bsr	bug1384
cont:
	unlk	%a6
|
| If trace mode enabled, then go to trace handler.  This handler 
| cannot have any fp instructions.  If there are fp inst's and an 
| exception has been restored into the machine then the exception 
| will occur upon execution of the fp inst.  This is not desirable 
| in the kernel (supervisor mode).  See MC68040 manual Section 9.3.8.
|
finish_up:
	btstb	#7,(%a7)		|test T1 in SR
	bnes	g_trace
	btstb	#6,(%a7)		|test T0 in SR
	bnes	g_trace
	bral	fpsp_done
|
| Change integer stack to look like trace stack
| The address of the instruction that caused the
| exception is already in the integer stack (is
| the same as the saved friar)
|
| If the current frame is already a 6-word stack then all
| that needs to be done is to change the vector# to TRACE.
| If the frame is only a 4-word stack (meaning we got here
| on an Unsupported data type exception), then we need to grow
| the stack an extra 2 words and get the FPIAR from the FPU.
|
g_trace:
	bftst	EXC_VEC-4(%sp){#0:#4}
	bne	g_easy

	subw	#4,%sp		| make room
	movel	4(%sp),(%sp)
	movel	8(%sp),4(%sp)
	subw	#BUSY_SIZE,%sp
	fsave	(%sp)
	fmovel	%fpiar,BUSY_SIZE+EXC_EA-4(%sp)
	frestore (%sp)
	addw	#BUSY_SIZE,%sp

g_easy:
	movew	#TRACE_VEC,EXC_VEC-4(%a7)
	bral	real_trace
|
|  This is a work-around for hardware bug 1384.
|
bug1384:
	link	%a5,#0
	fsave	-(%sp)
	cmpib	#0x41,(%sp)	| check for correct frame
	beq	frame_41
	bgt	nofix		| if more advanced mask, do nada

frame_40:
	tstb	1(%sp)		| check to see if idle
	bne	notidle
idle40:
	clrl	(%sp)		| get rid of old fsave frame
        movel  %d1,USER_D1(%a6)  | save d1
	movew	#8,%d1		| place unimp frame instead
loop40:	clrl	-(%sp)
	dbra	%d1,loop40
        movel  USER_D1(%a6),%d1  | restore d1
	movel	#0x40280000,-(%sp)
	frestore (%sp)+
	unlk  	%a5	
	rts

frame_41:
	tstb	1(%sp)		| check to see if idle
	bne	notidle	
idle41:
	clrl	(%sp)		| get rid of old fsave frame
        movel  %d1,USER_D1(%a6)  | save d1
	movew	#10,%d1		| place unimp frame instead
loop41:	clrl	-(%sp)
	dbra	%d1,loop41
        movel  USER_D1(%a6),%d1  | restore d1
	movel	#0x41300000,-(%sp)
	frestore (%sp)+
	unlk	%a5	
	rts

notidle:
	bclrb	#etemp15_bit,-40(%a5) 
	frestore (%sp)+
	unlk	%a5	
	rts

nofix:
	frestore (%sp)+
	unlk	%a5	
	rts

	|end
|
|	get_op.sa 3.6 5/19/92
|
|	get_op.sa 3.5 4/26/91
|
|  Description: This routine is called by the unsupported format/data
| type exception handler ('unsupp' - vector 55) and the unimplemented
| instruction exception handler ('unimp' - vector 11).  'get_op'
| determines the opclass (0, 2, or 3) and branches to the
| opclass handler routine.  See 68881/2 User's Manual table 4-11
| for a description of the opclasses.
|
| For UNSUPPORTED data/format (exception vector 55) and for
| UNIMPLEMENTED instructions (exception vector 11) the following
| applies:
|
| - For unnormalized numbers (opclass 0, 2, or 3) the
| number(s) is normalized and the operand type tag is updated.
|		
| - For a packed number (opclass 2) the number is unpacked and the
| operand type tag is updated.
|
| - For denormalized numbers (opclass 0 or 2) the number(s) is not
| changed but passed to the next module.  The next module for
| unimp is do_func, the next module for unsupp is res_func.
|
| For UNSUPPORTED data/format (exception vector 55) only the
| following applies:
|
| - If there is a move out with a packed number (opclass 3) the
| number is packed and written to user memory.  For the other
| opclasses the number(s) are written back to the fsave stack
| and the instruction is then restored back into the '040.  The
| '040 is then able to complete the instruction.
|
| For example:
| fadd.x fpm,fpn where the fpm contains an unnormalized number.
| The '040 takes an unsupported data trap and gets to this
| routine.  The number is normalized, put back on the stack and
| then an frestore is done to restore the instruction back into
| the '040.  The '040 then re-executes the fadd.x fpm,fpn with
| a normalized number in the source and the instruction is
| successful.
|		
| Next consider if in the process of normalizing the un-
| normalized number it becomes a denormalized number.  The
| routine which converts the unnorm to a norm (called mk_norm)
| detects this and tags the number as a denorm.  The routine
| res_func sees the denorm tag and converts the denorm to a
| norm.  The instruction is then restored back into the '040
| which re_executes the instruction.
|
|
|		Copyright (C) Motorola, Inc. 1990
|			All Rights Reserved
|
|	THIS IS UNPUBLISHED PROPRIETARY SOURCE CODE OF MOTOROLA 
|	The copyright notice above does not evidence any  
|	actual or intended publication of such source code.

GET_OP:    |idnt    2,1 | Motorola 040 Floating Point Software Package

	|section	8

	.include "fpsp.h"

	.global	PIRN,PIRZRM,PIRP
	.global	SMALRN,SMALRZRM,SMALRP
	.global	BIGRN,BIGRZRM,BIGRP

PIRN:
	.long 0x40000000,0xc90fdaa2,0x2168c235    |pi
PIRZRM:
	.long 0x40000000,0xc90fdaa2,0x2168c234    |pi
PIRP:
	.long 0x40000000,0xc90fdaa2,0x2168c235    |pi

|round to nearest
SMALRN:
	.long 0x3ffd0000,0x9a209a84,0xfbcff798    |log10(2)
	.long 0x40000000,0xadf85458,0xa2bb4a9a    |e
	.long 0x3fff0000,0xb8aa3b29,0x5c17f0bc    |log2(e)
	.long 0x3ffd0000,0xde5bd8a9,0x37287195    |log10(e)
	.long 0x00000000,0x00000000,0x00000000    |0.0
| round to zero;round to negative infinity
SMALRZRM:
	.long 0x3ffd0000,0x9a209a84,0xfbcff798    |log10(2)
	.long 0x40000000,0xadf85458,0xa2bb4a9a    |e
	.long 0x3fff0000,0xb8aa3b29,0x5c17f0bb    |log2(e)
	.long 0x3ffd0000,0xde5bd8a9,0x37287195    |log10(e)
	.long 0x00000000,0x00000000,0x00000000    |0.0
| round to positive infinity
SMALRP:
	.long 0x3ffd0000,0x9a209a84,0xfbcff799    |log10(2)
	.long 0x40000000,0xadf85458,0xa2bb4a9b    |e
	.long 0x3fff0000,0xb8aa3b29,0x5c17f0bc    |log2(e)
	.long 0x3ffd0000,0xde5bd8a9,0x37287195    |log10(e)
	.long 0x00000000,0x00000000,0x00000000    |0.0

|round to nearest
BIGRN:
	.long 0x3ffe0000,0xb17217f7,0xd1cf79ac    |ln(2)
	.long 0x40000000,0x935d8ddd,0xaaa8ac17    |ln(10)
	.long 0x3fff0000,0x80000000,0x00000000    |10 ^ 0

	.global	PTENRN
PTENRN:
	.long 0x40020000,0xA0000000,0x00000000    |10 ^ 1
	.long 0x40050000,0xC8000000,0x00000000    |10 ^ 2
	.long 0x400C0000,0x9C400000,0x00000000    |10 ^ 4
	.long 0x40190000,0xBEBC2000,0x00000000    |10 ^ 8
	.long 0x40340000,0x8E1BC9BF,0x04000000    |10 ^ 16
	.long 0x40690000,0x9DC5ADA8,0x2B70B59E    |10 ^ 32
	.long 0x40D30000,0xC2781F49,0xFFCFA6D5    |10 ^ 64
	.long 0x41A80000,0x93BA47C9,0x80E98CE0    |10 ^ 128
	.long 0x43510000,0xAA7EEBFB,0x9DF9DE8E    |10 ^ 256
	.long 0x46A30000,0xE319A0AE,0xA60E91C7    |10 ^ 512
	.long 0x4D480000,0xC9767586,0x81750C17    |10 ^ 1024
	.long 0x5A920000,0x9E8B3B5D,0xC53D5DE5    |10 ^ 2048
	.long 0x75250000,0xC4605202,0x8A20979B    |10 ^ 4096
|round to minus infinity
BIGRZRM:
	.long 0x3ffe0000,0xb17217f7,0xd1cf79ab    |ln(2)
	.long 0x40000000,0x935d8ddd,0xaaa8ac16    |ln(10)
	.long 0x3fff0000,0x80000000,0x00000000    |10 ^ 0

	.global	PTENRM
PTENRM:
	.long 0x40020000,0xA0000000,0x00000000    |10 ^ 1
	.long 0x40050000,0xC8000000,0x00000000    |10 ^ 2
	.long 0x400C0000,0x9C400000,0x00000000    |10 ^ 4
	.long 0x40190000,0xBEBC2000,0x00000000    |10 ^ 8
	.long 0x40340000,0x8E1BC9BF,0x04000000    |10 ^ 16
	.long 0x40690000,0x9DC5ADA8,0x2B70B59D    |10 ^ 32
	.long 0x40D30000,0xC2781F49,0xFFCFA6D5    |10 ^ 64
	.long 0x41A80000,0x93BA47C9,0x80E98CDF    |10 ^ 128
	.long 0x43510000,0xAA7EEBFB,0x9DF9DE8D    |10 ^ 256
	.long 0x46A30000,0xE319A0AE,0xA60E91C6    |10 ^ 512
	.long 0x4D480000,0xC9767586,0x81750C17    |10 ^ 1024
	.long 0x5A920000,0x9E8B3B5D,0xC53D5DE5    |10 ^ 2048
	.long 0x75250000,0xC4605202,0x8A20979A    |10 ^ 4096
|round to positive infinity
BIGRP:
	.long 0x3ffe0000,0xb17217f7,0xd1cf79ac    |ln(2)
	.long 0x40000000,0x935d8ddd,0xaaa8ac17    |ln(10)
	.long 0x3fff0000,0x80000000,0x00000000    |10 ^ 0

	.global	PTENRP
PTENRP:
	.long 0x40020000,0xA0000000,0x00000000    |10 ^ 1
	.long 0x40050000,0xC8000000,0x00000000    |10 ^ 2
	.long 0x400C0000,0x9C400000,0x00000000    |10 ^ 4
	.long 0x40190000,0xBEBC2000,0x00000000    |10 ^ 8
	.long 0x40340000,0x8E1BC9BF,0x04000000    |10 ^ 16
	.long 0x40690000,0x9DC5ADA8,0x2B70B59E    |10 ^ 32
	.long 0x40D30000,0xC2781F49,0xFFCFA6D6    |10 ^ 64
	.long 0x41A80000,0x93BA47C9,0x80E98CE0    |10 ^ 128
	.long 0x43510000,0xAA7EEBFB,0x9DF9DE8E    |10 ^ 256
	.long 0x46A30000,0xE319A0AE,0xA60E91C7    |10 ^ 512
	.long 0x4D480000,0xC9767586,0x81750C18    |10 ^ 1024
	.long 0x5A920000,0x9E8B3B5D,0xC53D5DE6    |10 ^ 2048
	.long 0x75250000,0xC4605202,0x8A20979B    |10 ^ 4096

	|xref	nrm_zero
	|xref	decbin
	|xref	round

	.global    get_op
	.global    uns_getop
	.global    uni_getop
get_op:
	clrb	DY_MO_FLG(%a6)
	tstb	UFLG_TMP(%a6)	|test flag for unsupp/unimp state
	beq	uni_getop

uns_getop:
	btstb	#direction_bit,CMDREG1B(%a6)
	bne	opclass3	|branch if a fmove out (any kind)
	btstb	#6,CMDREG1B(%a6)
	beqs	uns_notpacked

	bfextu	CMDREG1B(%a6){#3:#3},%d0
	cmpb	#3,%d0
	beq	pack_source	|check for a packed src op, branch if so
uns_notpacked:
	bsr	chk_dy_mo	|set the dyadic/monadic flag
	tstb	DY_MO_FLG(%a6)
	beqs	src_op_ck	|if monadic, go check src op
|				;else, check dst op (fall through)

	btstb	#7,DTAG(%a6)
	beqs	src_op_ck	|if dst op is norm, check src op
	bras	dst_ex_dnrm	|else, handle destination unnorm/dnrm

uni_getop:
	bfextu	CMDREG1B(%a6){#0:#6},%d0 |get opclass and src fields
	cmpil	#0x17,%d0		|if op class and size fields are $17, 
|				;it is FMOVECR; if not, continue
|
| If the instruction is fmovecr, exit get_op.  It is handled
| in do_func and smovecr.sa.
|
	bne	not_fmovecr	|handle fmovecr as an unimplemented inst
	rts

not_fmovecr:
	btstb	#E1,E_BYTE(%a6)	|if set, there is a packed operand
	bne	pack_source	|check for packed src op, branch if so

| The following lines of are coded to optimize on normalized operands
	moveb	STAG(%a6),%d0
	orb	DTAG(%a6),%d0	|check if either of STAG/DTAG msb set
	bmis	dest_op_ck	|if so, some op needs to be fixed
	rts

dest_op_ck:
	btstb	#7,DTAG(%a6)	|check for unsupported data types in
	beqs	src_op_ck	|the destination, if not, check src op
	bsr	chk_dy_mo	|set dyadic/monadic flag
	tstb	DY_MO_FLG(%a6)	|
	beqs	src_op_ck	|if monadic, check src op
|
| At this point, destination has an extended denorm or unnorm.
|
dst_ex_dnrm:
	movew	FPTEMP_EX(%a6),%d0 |get destination exponent
	andiw	#0x7fff,%d0	|mask sign, check if exp = 0000
	beqs	src_op_ck	|if denorm then check source op.
|				;denorms are taken care of in res_func 
|				;(unsupp) or do_func (unimp)
|				;else unnorm fall through
	leal	FPTEMP(%a6),%a0	|point a0 to dop - used in mk_norm
	bsr	mk_norm		|go normalize - mk_norm returns:
|				;L_SCR1{7:5} = operand tag 
|				;	(000 = norm, 100 = denorm)
|				;L_SCR1{4} = fpte15 or ete15 
|				;	0 = exp >  $3fff
|				;	1 = exp <= $3fff
|				;and puts the normalized num back 
|				;on the fsave stack
|
	moveb L_SCR1(%a6),DTAG(%a6) |write the new tag & fpte15 
|				;to the fsave stack and fall 
|				;through to check source operand
|
src_op_ck:
	btstb	#7,STAG(%a6)
	beq	end_getop	|check for unsupported data types on the
|				;source operand
	btstb	#5,STAG(%a6)
	bnes	src_sd_dnrm	|if bit 5 set, handle sgl/dbl denorms
|
| At this point only unnorms or extended denorms are possible.
|
src_ex_dnrm:
	movew	ETEMP_EX(%a6),%d0 |get source exponent
	andiw	#0x7fff,%d0	|mask sign, check if exp = 0000
	beq	end_getop	|if denorm then exit, denorms are 
|				;handled in do_func
	leal	ETEMP(%a6),%a0	|point a0 to sop - used in mk_norm
	bsr	mk_norm		|go normalize - mk_norm returns:
|				;L_SCR1{7:5} = operand tag 
|				;	(000 = norm, 100 = denorm)
|				;L_SCR1{4} = fpte15 or ete15 
|				;	0 = exp >  $3fff
|				;	1 = exp <= $3fff
|				;and puts the normalized num back 
|				;on the fsave stack
|
	moveb	L_SCR1(%a6),STAG(%a6) |write the new tag & ete15 
	rts			|end_getop

|
| At this point, only single or double denorms are possible.
| If the inst is not fmove, normalize the source.  If it is,
| do nothing to the input.
|
src_sd_dnrm:
	btstb	#4,CMDREG1B(%a6)	|differentiate between sgl/dbl denorm
	bnes	is_double
is_single:
	movew	#0x3f81,%d1	|write bias for sgl denorm
	bras	common		|goto the common code
is_double:
	movew	#0x3c01,%d1	|write the bias for a dbl denorm
common:
	btstb	#sign_bit,ETEMP_EX(%a6) |grab sign bit of mantissa
	beqs	pos	
	bset	#15,%d1		|set sign bit because it is negative
pos:
	movew	%d1,ETEMP_EX(%a6)
|				;put exponent on stack

	movew	CMDREG1B(%a6),%d1
	andw	#0xe3ff,%d1	|clear out source specifier
	orw	#0x0800,%d1	|set source specifier to extended prec
	movew	%d1,CMDREG1B(%a6)	|write back to the command word in stack
|				;this is needed to fix unsupp data stack
	leal	ETEMP(%a6),%a0	|point a0 to sop
	
	bsr	mk_norm		|convert sgl/dbl denorm to norm
	moveb	L_SCR1(%a6),STAG(%a6) |put tag into source tag reg - d0
	rts			|end_getop
|
| At this point, the source is definitely packed, whether
| instruction is dyadic or monadic is still unknown
|
pack_source:
	movel	FPTEMP_LO(%a6),ETEMP(%a6)	|write ms part of packed 
|				;number to etemp slot
	bsr	chk_dy_mo	|set dyadic/monadic flag
	bsr	unpack

	tstb	DY_MO_FLG(%a6)
	beqs	end_getop	|if monadic, exit
|				;else, fix FPTEMP
pack_dya:
	bfextu	CMDREG1B(%a6){#6:#3},%d0 |extract dest fp reg
	movel	#7,%d1
	subl	%d0,%d1
	clrl	%d0
	bsetl	%d1,%d0		|set up d0 as a dynamic register mask
	fmovemx %d0,FPTEMP(%a6)	|write to FPTEMP

	btstb	#7,DTAG(%a6)	|check dest tag for unnorm or denorm
	bne	dst_ex_dnrm	|else, handle the unnorm or ext denorm
|
| Dest is not denormalized.  Check for norm, and set fpte15 
| accordingly.
|
	moveb	DTAG(%a6),%d0
	andib	#0xf0,%d0		|strip to only dtag:fpte15
	tstb	%d0		|check for normalized value
	bnes	end_getop	|if inf/nan/zero leave get_op
	movew	FPTEMP_EX(%a6),%d0
	andiw	#0x7fff,%d0
	cmpiw	#0x3fff,%d0	|check if fpte15 needs setting
	bges	end_getop	|if >= $3fff, leave fpte15=0
	orb	#0x10,DTAG(%a6)
	bras	end_getop

|
| At this point, it is either an fmoveout packed, unnorm or denorm
|
opclass3:
	clrb	DY_MO_FLG(%a6)	|set dyadic/monadic flag to monadic
	bfextu	CMDREG1B(%a6){#4:#2},%d0
	cmpib	#3,%d0
	bne	src_ex_dnrm	|if not equal, must be unnorm or denorm
|				;else it is a packed move out
|				;exit
end_getop:
	rts

|
| Sets the DY_MO_FLG correctly. This is used only on if it is an
| unsupported data type exception.  Set if dyadic.
|
chk_dy_mo:
	movew	CMDREG1B(%a6),%d0	
	btstl	#5,%d0		|testing extension command word
	beqs	set_mon		|if bit 5 = 0 then monadic
	btstl	#4,%d0		|know that bit 5 = 1
	beqs	set_dya		|if bit 4 = 0 then dyadic
	andiw	#0x007f,%d0	|get rid of all but extension bits {6:0}
	cmpiw 	#0x0038,%d0	|if extension = $38 then fcmp (dyadic)
	bnes	set_mon
set_dya:
	st	DY_MO_FLG(%a6)	|set the inst flag type to dyadic
	rts
set_mon:
	clrb	DY_MO_FLG(%a6)	|set the inst flag type to monadic
	rts
|
|	MK_NORM
|
| Normalizes unnormalized numbers, sets tag to norm or denorm, sets unfl
| exception if denorm.
|
| CASE opclass 0x0 unsupp
|	mk_norm till msb set
|	set tag = norm
|
| CASE opclass 0x0 unimp
|	mk_norm till msb set or exp = 0
|	if integer bit = 0
|	   tag = denorm
|	else
|	   tag = norm
|
| CASE opclass 011 unsupp
|	mk_norm till msb set or exp = 0
|	if integer bit = 0
|	   tag = denorm
|	   set unfl_nmcexe = 1
|	else
|	   tag = norm
|
| if exp <= $3fff
|   set ete15 or fpte15 = 1
| else set ete15 or fpte15 = 0

| input:
|	a0 = points to operand to be normalized
| output:
|	L_SCR1{7:5} = operand tag (000 = norm, 100 = denorm)
|	L_SCR1{4}   = fpte15 or ete15 (0 = exp > $3fff, 1 = exp <=$3fff)
|	the normalized operand is placed back on the fsave stack
mk_norm:	
	clrl	L_SCR1(%a6)
	bclrb	#sign_bit,LOCAL_EX(%a0)
	sne	LOCAL_SGN(%a0)	|transform into internal extended format

	cmpib	#0x2c,1+EXC_VEC(%a6) |check if unimp
	bnes	uns_data	|branch if unsupp
	bsr	uni_inst	|call if unimp (opclass 0x0)
	bras	reload
uns_data:
	btstb	#direction_bit,CMDREG1B(%a6) |check transfer direction
	bnes	bit_set		|branch if set (opclass 011)
	bsr	uns_opx		|call if opclass 0x0
	bras	reload
bit_set:
	bsr	uns_op3		|opclass 011
reload:
	cmpw	#0x3fff,LOCAL_EX(%a0) |if exp > $3fff
	bgts	end_mk		|   fpte15/ete15 already set to 0
	bsetb	#4,L_SCR1(%a6)	|else set fpte15/ete15 to 1
|				;calling routine actually sets the 
|				;value on the stack (along with the 
|				;tag), since this routine doesn't 
|				;know if it should set ete15 or fpte15
|				;ie, it doesn't know if this is the 
|				;src op or dest op.
end_mk:
	bfclr	LOCAL_SGN(%a0){#0:#8}
	beqs	end_mk_pos
	bsetb	#sign_bit,LOCAL_EX(%a0) |convert back to IEEE format
end_mk_pos:
	rts
|
|     CASE opclass 011 unsupp
|
uns_op3:
	bsr	nrm_zero	|normalize till msb = 1 or exp = zero
	btstb	#7,LOCAL_HI(%a0)	|if msb = 1
	bnes	no_unfl		|then branch
set_unfl:
	orw	#dnrm_tag,L_SCR1(%a6) |set denorm tag
	bsetb	#unfl_bit,FPSR_EXCEPT(%a6) |set unfl exception bit
no_unfl:
	rts
|
|     CASE opclass 0x0 unsupp
|
uns_opx:
	bsr	nrm_zero	|normalize the number
	btstb	#7,LOCAL_HI(%a0)	|check if integer bit (j-bit) is set 
	beqs	uns_den		|if clear then now have a denorm
uns_nrm:
	orb	#norm_tag,L_SCR1(%a6) |set tag to norm
	rts
uns_den:
	orb	#dnrm_tag,L_SCR1(%a6) |set tag to denorm
	rts
|
|     CASE opclass 0x0 unimp
|
uni_inst:
	bsr	nrm_zero
	btstb	#7,LOCAL_HI(%a0)	|check if integer bit (j-bit) is set 
	beqs	uni_den		|if clear then now have a denorm
uni_nrm:
	orb	#norm_tag,L_SCR1(%a6) |set tag to norm
	rts
uni_den:
	orb	#dnrm_tag,L_SCR1(%a6) |set tag to denorm
	rts

|
|	Decimal to binary conversion
|
| Special cases of inf and NaNs are completed outside of decbin.  
| If the input is an snan, the snan bit is not set.
| 
| input:
|	ETEMP(a6)	- points to packed decimal string in memory
| output:
|	fp0	- contains packed string converted to extended precision
|	ETEMP	- same as fp0
unpack:
	movew	CMDREG1B(%a6),%d0	|examine command word, looking for fmove's
	andw	#0x3b,%d0
	beq	move_unpack	|special handling for fmove: must set FPSR_CC

	movew	ETEMP(%a6),%d0	|get word with inf information
	bfextu	%d0{#20:#12},%d1	|get exponent into d1
	cmpiw	#0x0fff,%d1	|test for inf or NaN
	bnes	try_zero	|if not equal, it is not special
	bfextu	%d0{#17:#3},%d1	|get SE and y bits into d1
	cmpiw	#7,%d1		|SE and y bits must be on for special
	bnes	try_zero	|if not on, it is not special
|input is of the special cases of inf and NaN
	tstl	ETEMP_HI(%a6)	|check ms mantissa
	bnes	fix_nan		|if non-zero, it is a NaN
	tstl	ETEMP_LO(%a6)	|check ls mantissa
	bnes	fix_nan		|if non-zero, it is a NaN
	bra	finish		|special already on stack
fix_nan:
	btstb	#signan_bit,ETEMP_HI(%a6) |test for snan
	bne	finish
	orl	#snaniop_mask,USER_FPSR(%a6) |always set snan if it is so
	bra	finish
try_zero:
	movew	ETEMP_EX+2(%a6),%d0 |get word 4
	andiw	#0x000f,%d0	|clear all but last ni(y)bble
	tstw	%d0		|check for zero.
	bne	not_spec
	tstl	ETEMP_HI(%a6)	|check words 3 and 2
	bne	not_spec
	tstl	ETEMP_LO(%a6)	|check words 1 and 0
	bne	not_spec
	tstl	ETEMP(%a6)	|test sign of the zero
	bges	pos_zero
	movel	#0x80000000,ETEMP(%a6) |write neg zero to etemp
	clrl	ETEMP_HI(%a6)
	clrl	ETEMP_LO(%a6)
	bra	finish
pos_zero:
	clrl	ETEMP(%a6)
	clrl	ETEMP_HI(%a6)
	clrl	ETEMP_LO(%a6)
	bra	finish

not_spec:
	fmovemx %fp0-%fp1,-(%a7)	|save fp0 - decbin returns in it
	bsr	decbin
	fmovex %fp0,ETEMP(%a6)	|put the unpacked sop in the fsave stack
	fmovemx (%a7)+,%fp0-%fp1
	fmovel	#0,%FPSR		|clr fpsr from decbin
	bra	finish

|
| Special handling for packed move in:  Same results as all other
| packed cases, but we must set the FPSR condition codes properly.
|
move_unpack:
	movew	ETEMP(%a6),%d0	|get word with inf information
	bfextu	%d0{#20:#12},%d1	|get exponent into d1
	cmpiw	#0x0fff,%d1	|test for inf or NaN
	bnes	mtry_zero	|if not equal, it is not special
	bfextu	%d0{#17:#3},%d1	|get SE and y bits into d1
	cmpiw	#7,%d1		|SE and y bits must be on for special
	bnes	mtry_zero	|if not on, it is not special
|input is of the special cases of inf and NaN
	tstl	ETEMP_HI(%a6)	|check ms mantissa
	bnes	mfix_nan		|if non-zero, it is a NaN
	tstl	ETEMP_LO(%a6)	|check ls mantissa
	bnes	mfix_nan		|if non-zero, it is a NaN
|input is inf
	orl	#inf_mask,USER_FPSR(%a6) |set I bit
	tstl	ETEMP(%a6)	|check sign
	bge	finish
	orl	#neg_mask,USER_FPSR(%a6) |set N bit
	bra	finish		|special already on stack
mfix_nan:
	orl	#nan_mask,USER_FPSR(%a6) |set NaN bit
	moveb	#nan_tag,STAG(%a6)	|set stag to NaN
	btstb	#signan_bit,ETEMP_HI(%a6) |test for snan
	bnes	mn_snan
	orl	#snaniop_mask,USER_FPSR(%a6) |set snan bit
	btstb	#snan_bit,FPCR_ENABLE(%a6) |test for snan enabled
	bnes	mn_snan
	bsetb	#signan_bit,ETEMP_HI(%a6) |force snans to qnans
mn_snan:
	tstl	ETEMP(%a6)	|check for sign
	bge	finish		|if clr, go on
	orl	#neg_mask,USER_FPSR(%a6) |set N bit
	bra	finish

mtry_zero:
	movew	ETEMP_EX+2(%a6),%d0 |get word 4
	andiw	#0x000f,%d0	|clear all but last ni(y)bble
	tstw	%d0		|check for zero.
	bnes	mnot_spec
	tstl	ETEMP_HI(%a6)	|check words 3 and 2
	bnes	mnot_spec
	tstl	ETEMP_LO(%a6)	|check words 1 and 0
	bnes	mnot_spec
	tstl	ETEMP(%a6)	|test sign of the zero
	bges	mpos_zero
	orl	#neg_mask+z_mask,USER_FPSR(%a6) |set N and Z
	movel	#0x80000000,ETEMP(%a6) |write neg zero to etemp
	clrl	ETEMP_HI(%a6)
	clrl	ETEMP_LO(%a6)
	bras	finish
mpos_zero:
	orl	#z_mask,USER_FPSR(%a6) |set Z
	clrl	ETEMP(%a6)
	clrl	ETEMP_HI(%a6)
	clrl	ETEMP_LO(%a6)
	bras	finish

mnot_spec:
	fmovemx %fp0-%fp1,-(%a7)	|save fp0 ,fp1 - decbin returns in fp0
	bsr	decbin
	fmovex %fp0,ETEMP(%a6)
|				;put the unpacked sop in the fsave stack
	fmovemx (%a7)+,%fp0-%fp1

finish:
	movew	CMDREG1B(%a6),%d0	|get the command word
	andw	#0xfbff,%d0	|change the source specifier field to 
|				;extended (was packed).
	movew	%d0,CMDREG1B(%a6)	|write command word back to fsave stack
|				;we need to do this so the 040 will 
|				;re-execute the inst. without taking 
|				;another packed trap.

fix_stag:
|Converted result is now in etemp on fsave stack, now set the source 
|tag (stag) 
|	if (ete =$7fff) then INF or NAN
|		if (etemp = $x.0----0) then
|			stag = INF
|		else
|			stag = NAN
|	else
|		if (ete = $0000) then
|			stag = ZERO
|		else
|			stag = NORM
|
| Note also that the etemp_15 bit (just right of the stag) must
| be set accordingly.  
|
	movew		ETEMP_EX(%a6),%d1
	andiw		#0x7fff,%d1   |strip sign
	cmpw  		#0x7fff,%d1
	bnes  		z_or_nrm
	movel		ETEMP_HI(%a6),%d1
	bnes		is_nan
	movel		ETEMP_LO(%a6),%d1
	bnes		is_nan
is_inf:
	moveb		#0x40,STAG(%a6)
	movel		#0x40,%d0
	rts
is_nan:
	moveb		#0x60,STAG(%a6)
	movel		#0x60,%d0
	rts
z_or_nrm:
	tstw		%d1  
	bnes		is_nrm
is_zro:
| For a zero, set etemp_15
	moveb		#0x30,STAG(%a6)
	movel		#0x20,%d0
	rts
is_nrm:
| For a norm, check if the exp <= $3fff; if so, set etemp_15
	cmpiw		#0x3fff,%d1
	bles		set_bit15
	moveb		#0,STAG(%a6)
	bras		end_is_nrm
set_bit15:
	moveb		#0x10,STAG(%a6)
end_is_nrm:
	movel		#0,%d0
end_fix:
	rts
 
end_get:
	rts
	|end
|
|	kernel_ex.sa 3.3 12/19/90 
|
| This file contains routines to force exception status in the 
| fpu for exceptional cases detected or reported within the
| transcendental functions.  Typically, the t_xx routine will
| set the appropriate bits in the USER_FPSR word on the stack.
| The bits are tested in gen_except.sa to determine if an exceptional
| situation needs to be created on return from the FPSP. 
|

|		Copyright (C) Motorola, Inc. 1990
|			All Rights Reserved
|
|	THIS IS UNPUBLISHED PROPRIETARY SOURCE CODE OF MOTOROLA 
|	The copyright notice above does not evidence any  
|	actual or intended publication of such source code.

KERNEL_EX:    |idnt    2,1 | Motorola 040 Floating Point Software Package

	|section    8

	.include "fpsp.h"

mns_inf:  .long 0xffff0000,0x00000000,0x00000000
pls_inf:  .long 0x7fff0000,0x00000000,0x00000000
nan:      .long 0x7fff0000,0xffffffff,0xffffffff
huge:     .long 0x7ffe0000,0xffffffff,0xffffffff

	|xref	  ovf_r_k
	|xref	  unf_sub
	|xref	  nrm_set

	.global   	  t_dz
	.global      t_dz2
	.global      t_operr
	.global      t_unfl
	.global      t_ovfl
	.global      t_ovfl2
	.global      t_inx2
	.global	  t_frcinx
	.global	  t_extdnrm
	.global	  t_resdnrm
	.global	  dst_nan
	.global	  src_nan
|
|	DZ exception
|
|
|	if dz trap disabled
|		store properly signed inf (use sign of etemp) into fp0
|		set FPSR exception status dz bit, condition code 
|		inf bit, and accrued dz bit
|		return
|		frestore the frame into the machine (done by unimp_hd)
|
|	else dz trap enabled
|		set exception status bit & accrued bits in FPSR
|		set flag to disable sto_res from corrupting fp register
|		return
|		frestore the frame into the machine (done by unimp_hd)
|
| t_dz2 is used by monadic functions such as flogn (from do_func).
| t_dz is used by monadic functions such as satanh (from the 
| transcendental function).
|
t_dz2:
	bsetb	#neg_bit,FPSR_CC(%a6)	|set neg bit in FPSR
	fmovel	#0,%FPSR			|clr status bits (Z set)
	btstb	#dz_bit,FPCR_ENABLE(%a6)	|test FPCR for dz exc enabled
	bnes	dz_ena_end
	bras	m_inf			|flogx always returns -inf
t_dz:
	fmovel	#0,%FPSR			|clr status bits (Z set)
	btstb	#dz_bit,FPCR_ENABLE(%a6)	|test FPCR for dz exc enabled
	bnes	dz_ena
|
|	dz disabled
|
	btstb	#sign_bit,ETEMP_EX(%a6)	|check sign for neg or pos
	beqs	p_inf			|branch if pos sign

m_inf:
	fmovemx mns_inf,%fp0-%fp0		|load -inf
	bsetb	#neg_bit,FPSR_CC(%a6)	|set neg bit in FPSR
	bras	set_fpsr
p_inf:
	fmovemx pls_inf,%fp0-%fp0		|load +inf
set_fpsr:
	orl	#dzinf_mask,USER_FPSR(%a6) |set I,DZ,ADZ
	rts
|
|	dz enabled
|
dz_ena:
	btstb	#sign_bit,ETEMP_EX(%a6)	|check sign for neg or pos
	beqs	dz_ena_end
	bsetb	#neg_bit,FPSR_CC(%a6)	|set neg bit in FPSR
dz_ena_end:
	orl	#dzinf_mask,USER_FPSR(%a6) |set I,DZ,ADZ
	st	STORE_FLG(%a6)
	rts
|
|	OPERR exception
|
|	if (operr trap disabled)
|		set FPSR exception status operr bit, condition code 
|		nan bit; Store default NAN into fp0
|		frestore the frame into the machine (done by unimp_hd)
|	
|	else (operr trap enabled)
|		set FPSR exception status operr bit, accrued operr bit
|		set flag to disable sto_res from corrupting fp register
|		frestore the frame into the machine (done by unimp_hd)
|
t_operr:
	orl	#opnan_mask,USER_FPSR(%a6) |set NaN, OPERR, AIOP

	btstb	#operr_bit,FPCR_ENABLE(%a6) |test FPCR for operr enabled
	bnes	op_ena

	fmovemx nan,%fp0-%fp0		|load default nan
	rts
op_ena:
	st	STORE_FLG(%a6)		|do not corrupt destination
	rts

|
|	t_unfl --- UNFL exception
|
| This entry point is used by all routines requiring unfl, inex2,
| aunfl, and ainex to be set on exit.
|
| On entry, a0 points to the exceptional operand.  The final exceptional
| operand is built in FP_SCR1 and only the sign from the original operand
| is used.
|
t_unfl:
	clrl	FP_SCR1(%a6)		|set exceptional operand to zero
	clrl	FP_SCR1+4(%a6)
	clrl	FP_SCR1+8(%a6)
	tstb	(%a0)			|extract sign from caller's exop
	bpls	unfl_signok
	bset	#sign_bit,FP_SCR1(%a6)
unfl_signok:
	leal	FP_SCR1(%a6),%a0
	orl	#unfinx_mask,USER_FPSR(%a6)
|					;set UNFL, INEX2, AUNFL, AINEX
unfl_con:
	btstb	#unfl_bit,FPCR_ENABLE(%a6)
	beqs	unfl_dis

unfl_ena:
	bfclr	STAG(%a6){#5:#3}		|clear wbtm66,wbtm1,wbtm0
	bsetb	#wbtemp15_bit,WB_BYTE(%a6) |set wbtemp15
	bsetb	#sticky_bit,STICKY(%a6)	|set sticky bit

	bclrb	#E1,E_BYTE(%a6)

unfl_dis:
	bfextu	FPCR_MODE(%a6){#0:#2},%d0	|get round precision
	
	bclrb	#sign_bit,LOCAL_EX(%a0)
	sne	LOCAL_SGN(%a0)		|convert to internal ext format

	bsr	unf_sub			|returns IEEE result at a0
|					;and sets FPSR_CC accordingly
	
	bfclr	LOCAL_SGN(%a0){#0:#8}	|convert back to IEEE ext format
	beqs	unfl_fin

	bsetb	#sign_bit,LOCAL_EX(%a0)
	bsetb	#sign_bit,FP_SCR1(%a6)	|set sign bit of exc operand

unfl_fin:
	fmovemx (%a0),%fp0-%fp0		|store result in fp0
	rts
	

|
|	t_ovfl2 --- OVFL exception (without inex2 returned)
|
| This entry is used by scale to force catastrophic overflow.  The
| ovfl, aovfl, and ainex bits are set, but not the inex2 bit.
|
t_ovfl2:
	orl	#ovfl_inx_mask,USER_FPSR(%a6)
	movel	ETEMP(%a6),FP_SCR1(%a6)
	movel	ETEMP_HI(%a6),FP_SCR1+4(%a6)
	movel	ETEMP_LO(%a6),FP_SCR1+8(%a6)
|
| Check for single or double round precision.  If single, check if
| the lower 40 bits of ETEMP are zero; if not, set inex2.  If double,
| check if the lower 21 bits are zero; if not, set inex2.
|
	moveb	FPCR_MODE(%a6),%d0
	andib	#0xc0,%d0
	beq	t_work		|if extended, finish ovfl processing
	cmpib	#0x40,%d0		|test for single
	bnes	t_dbl
t_sgl:
	tstb	ETEMP_LO(%a6)
	bnes	t_setinx2
	movel	ETEMP_HI(%a6),%d0
	andil	#0xff,%d0		|look at only lower 8 bits
	bnes	t_setinx2
	bra	t_work
t_dbl:
	movel	ETEMP_LO(%a6),%d0
	andil	#0x7ff,%d0	|look at only lower 11 bits
	beq	t_work
t_setinx2:
	orl	#inex2_mask,USER_FPSR(%a6)
	bras	t_work
|
|	t_ovfl --- OVFL exception
|
|** Note: the exc operand is returned in ETEMP.
|
t_ovfl:
	orl	#ovfinx_mask,USER_FPSR(%a6)
t_work:
	btstb	#ovfl_bit,FPCR_ENABLE(%a6) |test FPCR for ovfl enabled
	beqs	ovf_dis

ovf_ena:
	clrl	FP_SCR1(%a6)		|set exceptional operand
	clrl	FP_SCR1+4(%a6)
	clrl	FP_SCR1+8(%a6)

	bfclr	STAG(%a6){#5:#3}		|clear wbtm66,wbtm1,wbtm0
	bclrb	#wbtemp15_bit,WB_BYTE(%a6) |clear wbtemp15
	bsetb	#sticky_bit,STICKY(%a6)	|set sticky bit

	bclrb	#E1,E_BYTE(%a6)
|					;fall through to disabled case

| For disabled overflow call 'ovf_r_k'.  This routine loads the
| correct result based on the rounding precision, destination
| format, rounding mode and sign.
|
ovf_dis:
	bsr	ovf_r_k			|returns unsigned ETEMP_EX
|					;and sets FPSR_CC accordingly.
	bfclr	ETEMP_SGN(%a6){#0:#8}	|fix sign
	beqs	ovf_pos
	bsetb	#sign_bit,ETEMP_EX(%a6)
	bsetb	#sign_bit,FP_SCR1(%a6)	|set exceptional operand sign
ovf_pos:
	fmovemx ETEMP(%a6),%fp0-%fp0		|move the result to fp0
	rts


|
|	INEX2 exception
|
| The inex2 and ainex bits are set.
|
t_inx2:
	orl	#inx2a_mask,USER_FPSR(%a6) |set INEX2, AINEX
	rts

|
|	Force Inex2
|
| This routine is called by the transcendental routines to force
| the inex2 exception bits set in the FPSR.  If the underflow bit
| is set, but the underflow trap was not taken, the aunfl bit in
| the FPSR must be set.
|
t_frcinx:
	orl	#inx2a_mask,USER_FPSR(%a6) |set INEX2, AINEX
	btstb	#unfl_bit,FPSR_EXCEPT(%a6) |test for unfl bit set
	beqs	no_uacc1		|if clear, do not set aunfl
	bsetb	#aunfl_bit,FPSR_AEXCEPT(%a6)
no_uacc1:
	rts

|
|	DST_NAN
|
| Determine if the destination nan is signalling or non-signalling,
| and set the FPSR bits accordingly.  See the MC68040 User's Manual 
| section 3.2.2.5 NOT-A-NUMBERS.
|
dst_nan:
	btstb	#sign_bit,FPTEMP_EX(%a6) |test sign of nan
	beqs	dst_pos			|if clr, it was positive
	bsetb	#neg_bit,FPSR_CC(%a6)	|set N bit
dst_pos:
	btstb	#signan_bit,FPTEMP_HI(%a6) |check if signalling 
	beqs	dst_snan		|branch if signalling

	fmovel	%d1,%fpcr			|restore user's rmode/prec
	fmovex FPTEMP(%a6),%fp0		|return the non-signalling nan
|
| Check the source nan.  If it is signalling, snan will be reported.
|
	moveb	STAG(%a6),%d0
	andib	#0xe0,%d0
	cmpib	#0x60,%d0
	bnes	no_snan
	btstb	#signan_bit,ETEMP_HI(%a6) |check if signalling 
	bnes	no_snan
	orl	#snaniop_mask,USER_FPSR(%a6) |set NAN, SNAN, AIOP
no_snan:
	rts	

dst_snan:
	btstb	#snan_bit,FPCR_ENABLE(%a6) |check if trap enabled 
	beqs	dst_dis			|branch if disabled

	orb	#nan_tag,DTAG(%a6)	|set up dtag for nan
	st	STORE_FLG(%a6)		|do not store a result
	orl	#snaniop_mask,USER_FPSR(%a6) |set NAN, SNAN, AIOP
	rts

dst_dis:
	bsetb	#signan_bit,FPTEMP_HI(%a6) |set SNAN bit in sop 
	fmovel	%d1,%fpcr			|restore user's rmode/prec
	fmovex FPTEMP(%a6),%fp0		|load non-sign. nan 
	orl	#snaniop_mask,USER_FPSR(%a6) |set NAN, SNAN, AIOP
	rts

|
|	SRC_NAN
|
| Determine if the source nan is signalling or non-signalling,
| and set the FPSR bits accordingly.  See the MC68040 User's Manual 
| section 3.2.2.5 NOT-A-NUMBERS.
|
src_nan:
	btstb	#sign_bit,ETEMP_EX(%a6) |test sign of nan
	beqs	src_pos			|if clr, it was positive
	bsetb	#neg_bit,FPSR_CC(%a6)	|set N bit
src_pos:
	btstb	#signan_bit,ETEMP_HI(%a6) |check if signalling 
	beqs	src_snan		|branch if signalling
	fmovel	%d1,%fpcr			|restore user's rmode/prec
	fmovex ETEMP(%a6),%fp0		|return the non-signalling nan
	rts	

src_snan:
	btstb	#snan_bit,FPCR_ENABLE(%a6) |check if trap enabled 
	beqs	src_dis			|branch if disabled
	bsetb	#signan_bit,ETEMP_HI(%a6) |set SNAN bit in sop 
	orb	#norm_tag,DTAG(%a6)	|set up dtag for norm
	orb	#nan_tag,STAG(%a6)	|set up stag for nan
	st	STORE_FLG(%a6)		|do not store a result
	orl	#snaniop_mask,USER_FPSR(%a6) |set NAN, SNAN, AIOP
	rts

src_dis:
	bsetb	#signan_bit,ETEMP_HI(%a6) |set SNAN bit in sop 
	fmovel	%d1,%fpcr			|restore user's rmode/prec
	fmovex ETEMP(%a6),%fp0		|load non-sign. nan 
	orl	#snaniop_mask,USER_FPSR(%a6) |set NAN, SNAN, AIOP
	rts

|
| For all functions that have a denormalized input and that f(x)=x,
| this is the entry point
|
t_extdnrm:
	orl	#unfinx_mask,USER_FPSR(%a6)
|					;set UNFL, INEX2, AUNFL, AINEX
	bras	xdnrm_con
|
| Entry point for scale with extended denorm.  The function does
| not set inex2, aunfl, or ainex.  
|
t_resdnrm:
	orl	#unfl_mask,USER_FPSR(%a6)

xdnrm_con:
	btstb	#unfl_bit,FPCR_ENABLE(%a6)
	beqs	xdnrm_dis

|
| If exceptions are enabled, the additional task of setting up WBTEMP
| is needed so that when the underflow exception handler is entered,
| the user perceives no difference between what the 040 provides vs.
| what the FPSP provides.
|
xdnrm_ena:
	movel	%a0,-(%a7)

	movel	LOCAL_EX(%a0),FP_SCR1(%a6)
	movel	LOCAL_HI(%a0),FP_SCR1+4(%a6)
	movel	LOCAL_LO(%a0),FP_SCR1+8(%a6)

	lea	FP_SCR1(%a6),%a0

	bclrb	#sign_bit,LOCAL_EX(%a0)
	sne	LOCAL_SGN(%a0)		|convert to internal ext format
	tstw	LOCAL_EX(%a0)		|check if input is denorm
	beqs	xdnrm_dn		|if so, skip nrm_set
	bsr	nrm_set			|normalize the result (exponent
|					;will be negative
xdnrm_dn:
	bclrb	#sign_bit,LOCAL_EX(%a0)	|take off false sign
	bfclr	LOCAL_SGN(%a0){#0:#8}	|change back to IEEE ext format
	beqs	xdep
	bsetb	#sign_bit,LOCAL_EX(%a0)
xdep:	
	bfclr	STAG(%a6){#5:#3}		|clear wbtm66,wbtm1,wbtm0
	bsetb	#wbtemp15_bit,WB_BYTE(%a6) |set wbtemp15
	bclrb	#sticky_bit,STICKY(%a6)	|clear sticky bit
	bclrb	#E1,E_BYTE(%a6)
	movel	(%a7)+,%a0
xdnrm_dis:
	bfextu	FPCR_MODE(%a6){#0:#2},%d0	|get round precision
	bnes	not_ext			|if not round extended, store
|					;IEEE defaults
is_ext:
	btstb	#sign_bit,LOCAL_EX(%a0)
	beqs	xdnrm_store

	bsetb	#neg_bit,FPSR_CC(%a6)	|set N bit in FPSR_CC

	bras	xdnrm_store

not_ext:
	bclrb	#sign_bit,LOCAL_EX(%a0)
	sne	LOCAL_SGN(%a0)		|convert to internal ext format
	bsr	unf_sub			|returns IEEE result pointed by
|					;a0; sets FPSR_CC accordingly
	bfclr	LOCAL_SGN(%a0){#0:#8}	|convert back to IEEE ext format
	beqs	xdnrm_store
	bsetb	#sign_bit,LOCAL_EX(%a0)
xdnrm_store:
	fmovemx (%a0),%fp0-%fp0		|store result in fp0
	rts

|
| This subroutine is used for dyadic operations that use an extended
| denorm within the kernel. The approach used is to capture the frame,
| fix/restore.
|
	.global	t_avoid_unsupp
t_avoid_unsupp:
	link	%a2,#-LOCAL_SIZE		|so that a2 fpsp.h negative 
|					;offsets may be used
	fsave	-(%a7)
	tstb	1(%a7)			|check if idle, exit if so
	beq	idle_end
	btstb	#E1,E_BYTE(%a2)		|check for an E1 exception if
|					;enabled, there is an unsupp
	beq	end_avun		|else, exit
	btstb	#7,DTAG(%a2)		|check for denorm destination
	beqs	src_den			|else, must be a source denorm
|
| handle destination denorm
|
	lea	FPTEMP(%a2),%a0
	btstb	#sign_bit,LOCAL_EX(%a0)
	sne	LOCAL_SGN(%a0)		|convert to internal ext format
	bclrb	#7,DTAG(%a2)		|set DTAG to norm
	bsr	nrm_set			|normalize result, exponent
|					;will become negative
	bclrb	#sign_bit,LOCAL_EX(%a0)	|get rid of fake sign
	bfclr	LOCAL_SGN(%a0){#0:#8}	|convert back to IEEE ext format
	beqs	ck_src_den		|check if source is also denorm
	bsetb	#sign_bit,LOCAL_EX(%a0)
ck_src_den:
	btstb	#7,STAG(%a2)
	beqs	end_avun
src_den:
	lea	ETEMP(%a2),%a0
	btstb	#sign_bit,LOCAL_EX(%a0)
	sne	LOCAL_SGN(%a0)		|convert to internal ext format
	bclrb	#7,STAG(%a2)		|set STAG to norm
	bsr	nrm_set			|normalize result, exponent
|					;will become negative
	bclrb	#sign_bit,LOCAL_EX(%a0)	|get rid of fake sign
	bfclr	LOCAL_SGN(%a0){#0:#8}	|convert back to IEEE ext format
	beqs	den_com
	bsetb	#sign_bit,LOCAL_EX(%a0)
den_com:
	moveb	#0xfe,CU_SAVEPC(%a2)	|set continue frame
	clrw	NMNEXC(%a2)		|clear NMNEXC
	bclrb	#E1,E_BYTE(%a2)
|	fmove.l	%FPSR,FPSR_SHADOW(%a2)
|	bset.b	#SFLAG,E_BYTE(%a2)
|	bset.b	#XFLAG,T_BYTE(%a2)
end_avun:
	frestore (%a7)+
	unlk	%a2
	rts
idle_end:
	addl	#4,%a7
	unlk	%a2
	rts
	|end
|
|	res_func.sa 3.9 7/29/91
|
| Normalizes denormalized numbers if necessary and updates the
| stack frame.  The function is then restored back into the
| machine and the 040 completes the operation.  This routine
| is only used by the unsupported data type/format handler.
| (Exception vector 55).
|
| For packed move out (fmove.p fpm,<ea>) the operation is
| completed here; data is packed and moved to user memory. 
| The stack is restored to the 040 only in the case of a
| reportable exception in the conversion.
|
|
|		Copyright (C) Motorola, Inc. 1990
|			All Rights Reserved
|
|	THIS IS UNPUBLISHED PROPRIETARY SOURCE CODE OF MOTOROLA 
|	The copyright notice above does not evidence any  
|	actual or intended publication of such source code.

RES_FUNC:    |idnt    2,1 | Motorola 040 Floating Point Software Package

	|section	8

	.include "fpsp.h"

sp_bnds:	.short	0x3f81,0x407e
		.short	0x3f6a,0x0000
dp_bnds:	.short	0x3c01,0x43fe
		.short	0x3bcd,0x0000

	|xref	mem_write
	|xref	bindec
	|xref	get_fline
	|xref	round
	|xref	denorm
	|xref	dest_ext
	|xref	dest_dbl
	|xref	dest_sgl
	|xref	unf_sub
	|xref	nrm_set
	|xref	dnrm_lp
	|xref	ovf_res
	|xref	reg_dest
	|xref	t_ovfl
	|xref	t_unfl

	.global	res_func
	.global 	p_move

res_func:
	clrb	DNRM_FLG(%a6)
	clrb	RES_FLG(%a6)
	clrb	CU_ONLY(%a6)
	tstb	DY_MO_FLG(%a6)
	beqs	monadic
dyadic:
	btstb	#7,DTAG(%a6)	|if dop = norm=000, zero=001,
|				;inf=010 or nan=011
	beqs	monadic		|then branch
|				;else denorm
| HANDLE DESTINATION DENORM HERE
|				;set dtag to norm
|				;write the tag & fpte15 to the fstack
	leal	FPTEMP(%a6),%a0

	bclrb	#sign_bit,LOCAL_EX(%a0)
	sne	LOCAL_SGN(%a0)

	bsr	nrm_set		|normalize number (exp will go negative)
	bclrb	#sign_bit,LOCAL_EX(%a0) |get rid of false sign
	bfclr	LOCAL_SGN(%a0){#0:#8}	|change back to IEEE ext format
	beqs	dpos
	bsetb	#sign_bit,LOCAL_EX(%a0)
dpos:
	bfclr	DTAG(%a6){#0:#4}	|set tag to normalized, FPTE15 = 0
	bsetb	#4,DTAG(%a6)	|set FPTE15
	orb	#0x0f,DNRM_FLG(%a6)
monadic:
	leal	ETEMP(%a6),%a0
	btstb	#direction_bit,CMDREG1B(%a6)	|check direction
	bne	opclass3			|it is a mv out
|
| At this point, only opclass 0 and 2 possible
|
	btstb	#7,STAG(%a6)	|if sop = norm=000, zero=001,
|				;inf=010 or nan=011
	bne	mon_dnrm	|else denorm
	tstb	DY_MO_FLG(%a6)	|all cases of dyadic instructions would
	bne	normal		|require normalization of denorm

| At this point:
|	monadic instructions:	fabs  = $18  fneg   = $1a  ftst   = $3a
|				fmove = $00  fsmove = $40  fdmove = $44
|				fsqrt = $05* fssqrt = $41  fdsqrt = $45
|				(*fsqrt reencoded to $05)
|
	movew	CMDREG1B(%a6),%d0	|get command register
	andil	#0x7f,%d0			|strip to only command word
|
| At this point, fabs, fneg, fsmove, fdmove, ftst, fsqrt, fssqrt, and 
| fdsqrt are possible.
| For cases fabs, fneg, fsmove, and fdmove goto spos (do not normalize)
| For cases fsqrt, fssqrt, and fdsqrt goto nrm_src (do normalize)
|
	btstl	#0,%d0
	bne	normal			|weed out fsqrt instructions
|
| cu_norm handles fmove in instructions with normalized inputs.
| The routine round is used to correctly round the input for the
| destination precision and mode.
|
cu_norm:
	st	CU_ONLY(%a6)		|set cu-only inst flag
	movew	CMDREG1B(%a6),%d0
	andib	#0x3b,%d0		|isolate bits to select inst
	tstb	%d0
	beql	cu_nmove	|if zero, it is an fmove
	cmpib	#0x18,%d0
	beql	cu_nabs		|if $18, it is fabs
	cmpib	#0x1a,%d0
	beql	cu_nneg		|if $1a, it is fneg
|
| Inst is ftst.  Check the source operand and set the cc's accordingly.
| No write is done, so simply rts.
|
cu_ntst:
	movew	LOCAL_EX(%a0),%d0
	bclrl	#15,%d0
	sne	LOCAL_SGN(%a0)
	beqs	cu_ntpo
	orl	#neg_mask,USER_FPSR(%a6) |set N
cu_ntpo:
	cmpiw	#0x7fff,%d0	|test for inf/nan
	bnes	cu_ntcz
	tstl	LOCAL_HI(%a0)
	bnes	cu_ntn
	tstl	LOCAL_LO(%a0)
	bnes	cu_ntn
	orl	#inf_mask,USER_FPSR(%a6)
	rts
cu_ntn:
	orl	#nan_mask,USER_FPSR(%a6)
	movel	ETEMP_EX(%a6),FPTEMP_EX(%a6)	|set up fptemp sign for 
|						;snan handler

	rts
cu_ntcz:
	tstl	LOCAL_HI(%a0)
	bnel	cu_ntsx
	tstl	LOCAL_LO(%a0)
	bnel	cu_ntsx
	orl	#z_mask,USER_FPSR(%a6)
cu_ntsx:
	rts
|
| Inst is fabs.  Execute the absolute value function on the input.
| Branch to the fmove code.  If the operand is NaN, do nothing.
|
cu_nabs:
	moveb	STAG(%a6),%d0
	btstl	#5,%d0			|test for NaN or zero
	bne	wr_etemp		|if either, simply write it
	bclrb	#7,LOCAL_EX(%a0)		|do abs
	bras	cu_nmove		|fmove code will finish
|
| Inst is fneg.  Execute the negate value function on the input.
| Fall though to the fmove code.  If the operand is NaN, do nothing.
|
cu_nneg:
	moveb	STAG(%a6),%d0
	btstl	#5,%d0			|test for NaN or zero
	bne	wr_etemp		|if either, simply write it
	bchgb	#7,LOCAL_EX(%a0)		|do neg
|
| Inst is fmove.  This code also handles all result writes.
| If bit 2 is set, round is forced to double.  If it is clear,
| and bit 6 is set, round is forced to single.  If both are clear,
| the round precision is found in the fpcr.  If the rounding precision
| is double or single, round the result before the write.
|
cu_nmove:
	moveb	STAG(%a6),%d0
	andib	#0xe0,%d0			|isolate stag bits
	bne	wr_etemp		|if not norm, simply write it
	btstb	#2,CMDREG1B+1(%a6)	|check for rd
	bne	cu_nmrd
	btstb	#6,CMDREG1B+1(%a6)	|check for rs
	bne	cu_nmrs
|
| The move or operation is not with forced precision.  Test for
| nan or inf as the input; if so, simply write it to FPn.  Use the
| FPCR_MODE byte to get rounding on norms and zeros.
|
cu_nmnr:
	bfextu	FPCR_MODE(%a6){#0:#2},%d0
	tstb	%d0			|check for extended
	beq	cu_wrexn		|if so, just write result
	cmpib	#1,%d0			|check for single
	beq	cu_nmrs			|fall through to double
|
| The move is fdmove or round precision is double.
|
cu_nmrd:
	movel	#2,%d0			|set up the size for denorm
	movew	LOCAL_EX(%a0),%d1		|compare exponent to double threshold
	andw	#0x7fff,%d1	
	cmpw	#0x3c01,%d1
	bls	cu_nunfl
	bfextu	FPCR_MODE(%a6){#2:#2},%d1	|get rmode
	orl	#0x00020000,%d1		|or in rprec (double)
	clrl	%d0			|clear g,r,s for round
	bclrb	#sign_bit,LOCAL_EX(%a0)	|convert to internal format
	sne	LOCAL_SGN(%a0)
	bsrl	round
	bfclr	LOCAL_SGN(%a0){#0:#8}
	beqs	cu_nmrdc
	bsetb	#sign_bit,LOCAL_EX(%a0)
cu_nmrdc:
	movew	LOCAL_EX(%a0),%d1		|check for overflow
	andw	#0x7fff,%d1
	cmpw	#0x43ff,%d1
	bge	cu_novfl		|take care of overflow case
	bra	cu_wrexn
|
| The move is fsmove or round precision is single.
|
cu_nmrs:
	movel	#1,%d0
	movew	LOCAL_EX(%a0),%d1
	andw	#0x7fff,%d1
	cmpw	#0x3f81,%d1
	bls	cu_nunfl
	bfextu	FPCR_MODE(%a6){#2:#2},%d1
	orl	#0x00010000,%d1
	clrl	%d0
	bclrb	#sign_bit,LOCAL_EX(%a0)
	sne	LOCAL_SGN(%a0)
	bsrl	round
	bfclr	LOCAL_SGN(%a0){#0:#8}
	beqs	cu_nmrsc
	bsetb	#sign_bit,LOCAL_EX(%a0)
cu_nmrsc:
	movew	LOCAL_EX(%a0),%d1
	andw	#0x7FFF,%d1
	cmpw	#0x407f,%d1
	blt	cu_wrexn
|
| The operand is above precision boundaries.  Use t_ovfl to
| generate the correct value.
|
cu_novfl:
	bsr	t_ovfl
	bra	cu_wrexn
|
| The operand is below precision boundaries.  Use denorm to
| generate the correct value.
|
cu_nunfl:
	bclrb	#sign_bit,LOCAL_EX(%a0)
	sne	LOCAL_SGN(%a0)
	bsr	denorm
	bfclr	LOCAL_SGN(%a0){#0:#8}	|change back to IEEE ext format
	beqs	cu_nucont
	bsetb	#sign_bit,LOCAL_EX(%a0)
cu_nucont:
	bfextu	FPCR_MODE(%a6){#2:#2},%d1
	btstb	#2,CMDREG1B+1(%a6)	|check for rd
	bne	inst_d
	btstb	#6,CMDREG1B+1(%a6)	|check for rs
	bne	inst_s
	swap	%d1
	moveb	FPCR_MODE(%a6),%d1
	lsrb	#6,%d1
	swap	%d1
	bra	inst_sd
inst_d:
	orl	#0x00020000,%d1
	bra	inst_sd
inst_s:
	orl	#0x00010000,%d1
inst_sd:
	bclrb	#sign_bit,LOCAL_EX(%a0)
	sne	LOCAL_SGN(%a0)
	bsrl	round
	bfclr	LOCAL_SGN(%a0){#0:#8}
	beqs	cu_nuflp
	bsetb	#sign_bit,LOCAL_EX(%a0)
cu_nuflp:
	btstb	#inex2_bit,FPSR_EXCEPT(%a6)
	beqs	cu_nuninx
	orl	#aunfl_mask,USER_FPSR(%a6) |if the round was inex, set AUNFL
cu_nuninx:
	tstl	LOCAL_HI(%a0)		|test for zero
	bnes	cu_nunzro
	tstl	LOCAL_LO(%a0)
	bnes	cu_nunzro
|
| The mantissa is zero from the denorm loop.  Check sign and rmode
| to see if rounding should have occurred which would leave the lsb.
|
	movel	USER_FPCR(%a6),%d0
	andil	#0x30,%d0		|isolate rmode
	cmpil	#0x20,%d0
	blts	cu_nzro
	bnes	cu_nrp
cu_nrm:
	tstw	LOCAL_EX(%a0)	|if positive, set lsb
	bges	cu_nzro
	btstb	#7,FPCR_MODE(%a6) |check for double
	beqs	cu_nincs
	bras	cu_nincd
cu_nrp:
	tstw	LOCAL_EX(%a0)	|if positive, set lsb
	blts	cu_nzro
	btstb	#7,FPCR_MODE(%a6) |check for double
	beqs	cu_nincs
cu_nincd:
	orl	#0x800,LOCAL_LO(%a0) |inc for double
	bra	cu_nunzro
cu_nincs:
	orl	#0x100,LOCAL_HI(%a0) |inc for single
	bra	cu_nunzro
cu_nzro:
	orl	#z_mask,USER_FPSR(%a6)
	moveb	STAG(%a6),%d0
	andib	#0xe0,%d0
	cmpib	#0x40,%d0		|check if input was tagged zero
	beqs	cu_numv
cu_nunzro:
	orl	#unfl_mask,USER_FPSR(%a6) |set unfl
cu_numv:
	movel	(%a0),ETEMP(%a6)
	movel	4(%a0),ETEMP_HI(%a6)
	movel	8(%a0),ETEMP_LO(%a6)
|
| Write the result to memory, setting the fpsr cc bits.  NaN and Inf
| bypass cu_wrexn.
|
cu_wrexn:
	tstw	LOCAL_EX(%a0)		|test for zero
	beqs	cu_wrzero
	cmpw	#0x8000,LOCAL_EX(%a0)	|test for zero
	bnes	cu_wreon
cu_wrzero:
	orl	#z_mask,USER_FPSR(%a6)	|set Z bit
cu_wreon:
	tstw	LOCAL_EX(%a0)
	bpl	wr_etemp
	orl	#neg_mask,USER_FPSR(%a6)
	bra	wr_etemp

|
| HANDLE SOURCE DENORM HERE
|
|				;clear denorm stag to norm
|				;write the new tag & ete15 to the fstack
mon_dnrm:
|
| At this point, check for the cases in which normalizing the 
| denorm produces incorrect results.
|
	tstb	DY_MO_FLG(%a6)	|all cases of dyadic instructions would
	bnes	nrm_src		|require normalization of denorm

| At this point:
|	monadic instructions:	fabs  = $18  fneg   = $1a  ftst   = $3a
|				fmove = $00  fsmove = $40  fdmove = $44
|				fsqrt = $05* fssqrt = $41  fdsqrt = $45
|				(*fsqrt reencoded to $05)
|
	movew	CMDREG1B(%a6),%d0	|get command register
	andil	#0x7f,%d0			|strip to only command word
|
| At this point, fabs, fneg, fsmove, fdmove, ftst, fsqrt, fssqrt, and 
| fdsqrt are possible.
| For cases fabs, fneg, fsmove, and fdmove goto spos (do not normalize)
| For cases fsqrt, fssqrt, and fdsqrt goto nrm_src (do normalize)
|
	btstl	#0,%d0
	bnes	nrm_src		|weed out fsqrt instructions
	st	CU_ONLY(%a6)	|set cu-only inst flag
	bra	cu_dnrm		|fmove, fabs, fneg, ftst 
|				;cases go to cu_dnrm
nrm_src:
	bclrb	#sign_bit,LOCAL_EX(%a0)
	sne	LOCAL_SGN(%a0)
	bsr	nrm_set		|normalize number (exponent will go 
|				; negative)
	bclrb	#sign_bit,LOCAL_EX(%a0) |get rid of false sign

	bfclr	LOCAL_SGN(%a0){#0:#8}	|change back to IEEE ext format
	beqs	spos
	bsetb	#sign_bit,LOCAL_EX(%a0)
spos:
	bfclr	STAG(%a6){#0:#4}	|set tag to normalized, FPTE15 = 0
	bsetb	#4,STAG(%a6)	|set ETE15
	orb	#0xf0,DNRM_FLG(%a6)
normal:
	tstb	DNRM_FLG(%a6)	|check if any of the ops were denorms
	bne	ck_wrap		|if so, check if it is a potential
|				;wrap-around case
fix_stk:
	moveb	#0xfe,CU_SAVEPC(%a6)
	bclrb	#E1,E_BYTE(%a6)

	clrw	NMNEXC(%a6)

	st	RES_FLG(%a6)	|indicate that a restore is needed
	rts

|
| cu_dnrm handles all cu-only instructions (fmove, fabs, fneg, and
| ftst) completely in software without an frestore to the 040. 
|
cu_dnrm:
	st	CU_ONLY(%a6)
	movew	CMDREG1B(%a6),%d0
	andib	#0x3b,%d0		|isolate bits to select inst
	tstb	%d0
	beql	cu_dmove	|if zero, it is an fmove
	cmpib	#0x18,%d0
	beql	cu_dabs		|if $18, it is fabs
	cmpib	#0x1a,%d0
	beql	cu_dneg		|if $1a, it is fneg
|
| Inst is ftst.  Check the source operand and set the cc's accordingly.
| No write is done, so simply rts.
|
cu_dtst:
	movew	LOCAL_EX(%a0),%d0
	bclrl	#15,%d0
	sne	LOCAL_SGN(%a0)
	beqs	cu_dtpo
	orl	#neg_mask,USER_FPSR(%a6) |set N
cu_dtpo:
	cmpiw	#0x7fff,%d0	|test for inf/nan
	bnes	cu_dtcz
	tstl	LOCAL_HI(%a0)
	bnes	cu_dtn
	tstl	LOCAL_LO(%a0)
	bnes	cu_dtn
	orl	#inf_mask,USER_FPSR(%a6)
	rts
cu_dtn:
	orl	#nan_mask,USER_FPSR(%a6)
	movel	ETEMP_EX(%a6),FPTEMP_EX(%a6)	|set up fptemp sign for 
|						;snan handler
	rts
cu_dtcz:
	tstl	LOCAL_HI(%a0)
	bnel	cu_dtsx
	tstl	LOCAL_LO(%a0)
	bnel	cu_dtsx
	orl	#z_mask,USER_FPSR(%a6)
cu_dtsx:
	rts
|
| Inst is fabs.  Execute the absolute value function on the input.
| Branch to the fmove code.
|
cu_dabs:
	bclrb	#7,LOCAL_EX(%a0)		|do abs
	bras	cu_dmove		|fmove code will finish
|
| Inst is fneg.  Execute the negate value function on the input.
| Fall though to the fmove code.
|
cu_dneg:
	bchgb	#7,LOCAL_EX(%a0)		|do neg
|
| Inst is fmove.  This code also handles all result writes.
| If bit 2 is set, round is forced to double.  If it is clear,
| and bit 6 is set, round is forced to single.  If both are clear,
| the round precision is found in the fpcr.  If the rounding precision
| is double or single, the result is zero, and the mode is checked
| to determine if the lsb of the result should be set.
|
cu_dmove:
	btstb	#2,CMDREG1B+1(%a6)	|check for rd
	bne	cu_dmrd
	btstb	#6,CMDREG1B+1(%a6)	|check for rs
	bne	cu_dmrs
|
| The move or operation is not with forced precision.  Use the
| FPCR_MODE byte to get rounding.
|
cu_dmnr:
	bfextu	FPCR_MODE(%a6){#0:#2},%d0
	tstb	%d0			|check for extended
	beq	cu_wrexd		|if so, just write result
	cmpib	#1,%d0			|check for single
	beq	cu_dmrs			|fall through to double
|
| The move is fdmove or round precision is double.  Result is zero.
| Check rmode for rp or rm and set lsb accordingly.
|
cu_dmrd:
	bfextu	FPCR_MODE(%a6){#2:#2},%d1	|get rmode
	tstw	LOCAL_EX(%a0)		|check sign
	blts	cu_dmdn
	cmpib	#3,%d1			|check for rp
	bne	cu_dpd			|load double pos zero
	bra	cu_dpdr			|load double pos zero w/lsb
cu_dmdn:
	cmpib	#2,%d1			|check for rm
	bne	cu_dnd			|load double neg zero
	bra	cu_dndr			|load double neg zero w/lsb
|
| The move is fsmove or round precision is single.  Result is zero.
| Check for rp or rm and set lsb accordingly.
|
cu_dmrs:
	bfextu	FPCR_MODE(%a6){#2:#2},%d1	|get rmode
	tstw	LOCAL_EX(%a0)		|check sign
	blts	cu_dmsn
	cmpib	#3,%d1			|check for rp
	bne	cu_spd			|load single pos zero
	bra	cu_spdr			|load single pos zero w/lsb
cu_dmsn:
	cmpib	#2,%d1			|check for rm
	bne	cu_snd			|load single neg zero
	bra	cu_sndr			|load single neg zero w/lsb
|
| The precision is extended, so the result in etemp is correct.
| Simply set unfl (not inex2 or aunfl) and write the result to 
| the correct fp register.
cu_wrexd:
	orl	#unfl_mask,USER_FPSR(%a6)
	tstw	LOCAL_EX(%a0)
	beq	wr_etemp
	orl	#neg_mask,USER_FPSR(%a6)
	bra	wr_etemp
|
| These routines write +/- zero in double format.  The routines
| cu_dpdr and cu_dndr set the double lsb.
|
cu_dpd:
	movel	#0x3c010000,LOCAL_EX(%a0)	|force pos double zero
	clrl	LOCAL_HI(%a0)
	clrl	LOCAL_LO(%a0)
	orl	#z_mask,USER_FPSR(%a6)
	orl	#unfinx_mask,USER_FPSR(%a6)
	bra	wr_etemp
cu_dpdr:
	movel	#0x3c010000,LOCAL_EX(%a0)	|force pos double zero
	clrl	LOCAL_HI(%a0)
	movel	#0x800,LOCAL_LO(%a0)	|with lsb set
	orl	#unfinx_mask,USER_FPSR(%a6)
	bra	wr_etemp
cu_dnd:
	movel	#0xbc010000,LOCAL_EX(%a0)	|force pos double zero
	clrl	LOCAL_HI(%a0)
	clrl	LOCAL_LO(%a0)
	orl	#z_mask,USER_FPSR(%a6)
	orl	#neg_mask,USER_FPSR(%a6)
	orl	#unfinx_mask,USER_FPSR(%a6)
	bra	wr_etemp
cu_dndr:
	movel	#0xbc010000,LOCAL_EX(%a0)	|force pos double zero
	clrl	LOCAL_HI(%a0)
	movel	#0x800,LOCAL_LO(%a0)	|with lsb set
	orl	#neg_mask,USER_FPSR(%a6)
	orl	#unfinx_mask,USER_FPSR(%a6)
	bra	wr_etemp
|
| These routines write +/- zero in single format.  The routines
| cu_dpdr and cu_dndr set the single lsb.
|
cu_spd:
	movel	#0x3f810000,LOCAL_EX(%a0)	|force pos single zero
	clrl	LOCAL_HI(%a0)
	clrl	LOCAL_LO(%a0)
	orl	#z_mask,USER_FPSR(%a6)
	orl	#unfinx_mask,USER_FPSR(%a6)
	bra	wr_etemp
cu_spdr:
	movel	#0x3f810000,LOCAL_EX(%a0)	|force pos single zero
	movel	#0x100,LOCAL_HI(%a0)	|with lsb set
	clrl	LOCAL_LO(%a0)
	orl	#unfinx_mask,USER_FPSR(%a6)
	bra	wr_etemp
cu_snd:
	movel	#0xbf810000,LOCAL_EX(%a0)	|force pos single zero
	clrl	LOCAL_HI(%a0)
	clrl	LOCAL_LO(%a0)
	orl	#z_mask,USER_FPSR(%a6)
	orl	#neg_mask,USER_FPSR(%a6)
	orl	#unfinx_mask,USER_FPSR(%a6)
	bra	wr_etemp
cu_sndr:
	movel	#0xbf810000,LOCAL_EX(%a0)	|force pos single zero
	movel	#0x100,LOCAL_HI(%a0)	|with lsb set
	clrl	LOCAL_LO(%a0)
	orl	#neg_mask,USER_FPSR(%a6)
	orl	#unfinx_mask,USER_FPSR(%a6)
	bra	wr_etemp
	
|
| This code checks for 16-bit overflow conditions on dyadic
| operations which are not restorable into the floating-point
| unit and must be completed in software.  Basically, this
| condition exists with a very large norm and a denorm.  One
| of the operands must be denormalized to enter this code.
|
| Flags used:
|	DY_MO_FLG contains 0 for monadic op, $ff for dyadic
|	DNRM_FLG contains $00 for neither op denormalized
|	                  $0f for the destination op denormalized
|	                  $f0 for the source op denormalized
|	                  $ff for both ops denormalized
|
| The wrap-around condition occurs for add, sub, div, and cmp
| when 
|
|	abs(dest_exp - src_exp) >= $8000
|
| and for mul when
|
|	(dest_exp + src_exp) < $0
|
| we must process the operation here if this case is true.
|
| The rts following the frcfpn routine is the exit from res_func
| for this condition.  The restore flag (RES_FLG) is left clear.
| No frestore is done unless an exception is to be reported.
|
| For fadd: 
|	if(sign_of(dest) != sign_of(src))
|		replace exponent of src with $3fff (keep sign)
|		use fpu to perform dest+new_src (user's rmode and X)
|		clr sticky
|	else
|		set sticky
|	call round with user's precision and mode
|	move result to fpn and wbtemp
|
| For fsub:
|	if(sign_of(dest) == sign_of(src))
|		replace exponent of src with $3fff (keep sign)
|		use fpu to perform dest+new_src (user's rmode and X)
|		clr sticky
|	else
|		set sticky
|	call round with user's precision and mode
|	move result to fpn and wbtemp
|
| For fdiv/fsgldiv:
|	if(both operands are denorm)
|		restore_to_fpu;
|	if(dest is norm)
|		force_ovf;
|	else(dest is denorm)
|		force_unf:
|
| For fcmp:
|	if(dest is norm)
|		N = sign_of(dest);
|	else(dest is denorm)
|		N = sign_of(src);
|
| For fmul:
|	if(both operands are denorm)
|		force_unf;
|	if((dest_exp + src_exp) < 0)
|		force_unf:
|	else
|		restore_to_fpu;
|
| local equates:
	.set	addcode,0x22
	.set	subcode,0x28
	.set	mulcode,0x23
	.set	divcode,0x20
	.set	cmpcode,0x38
ck_wrap:
	| tstb	DY_MO_FLG(%a6)	;check for fsqrt
	beq	fix_stk		|if zero, it is fsqrt
	movew	CMDREG1B(%a6),%d0
	andiw	#0x3b,%d0		|strip to command bits
	cmpiw	#addcode,%d0
	beq	wrap_add
	cmpiw	#subcode,%d0
	beq	wrap_sub
	cmpiw	#mulcode,%d0
	beq	wrap_mul
	cmpiw	#cmpcode,%d0
	beq	wrap_cmp
|
| Inst is fdiv.  
|
wrap_div:
	cmpb	#0xff,DNRM_FLG(%a6) |if both ops denorm, 
	beq	fix_stk		 |restore to fpu
|
| One of the ops is denormalized.  Test for wrap condition
| and force the result.
|
	cmpb	#0x0f,DNRM_FLG(%a6) |check for dest denorm
	bnes	div_srcd
div_destd:
	bsrl	ckinf_ns
	bne	fix_stk
	bfextu	ETEMP_EX(%a6){#1:#15},%d0	|get src exp (always pos)
	bfexts	FPTEMP_EX(%a6){#1:#15},%d1	|get dest exp (always neg)
	subl	%d1,%d0			|subtract dest from src
	cmpl	#0x7fff,%d0
	blt	fix_stk			|if less, not wrap case
	clrb	WBTEMP_SGN(%a6)
	movew	ETEMP_EX(%a6),%d0		|find the sign of the result
	movew	FPTEMP_EX(%a6),%d1
	eorw	%d1,%d0
	andiw	#0x8000,%d0
	beq	force_unf
	st	WBTEMP_SGN(%a6)
	bra	force_unf

ckinf_ns:
	moveb	STAG(%a6),%d0		|check source tag for inf or nan
	bra	ck_in_com
ckinf_nd:
	moveb	DTAG(%a6),%d0		|check destination tag for inf or nan
ck_in_com:	
	andib	#0x60,%d0			|isolate tag bits
	cmpb	#0x40,%d0			|is it inf?
	beq	nan_or_inf		|not wrap case
	cmpb	#0x60,%d0			|is it nan?
	beq	nan_or_inf		|yes, not wrap case?
	cmpb	#0x20,%d0			|is it a zero?
	beq	nan_or_inf		|yes
	clrl	%d0
	rts				|then ; it is either a zero of norm,
|					;check wrap case
nan_or_inf:
	moveql	#-1,%d0
	rts



div_srcd:
	bsrl	ckinf_nd
	bne	fix_stk
	bfextu	FPTEMP_EX(%a6){#1:#15},%d0	|get dest exp (always pos)
	bfexts	ETEMP_EX(%a6){#1:#15},%d1	|get src exp (always neg)
	subl	%d1,%d0			|subtract src from dest
	cmpl	#0x8000,%d0
	blt	fix_stk			|if less, not wrap case
	clrb	WBTEMP_SGN(%a6)
	movew	ETEMP_EX(%a6),%d0		|find the sign of the result
	movew	FPTEMP_EX(%a6),%d1
	eorw	%d1,%d0
	andiw	#0x8000,%d0
	beqs	force_ovf
	st	WBTEMP_SGN(%a6)
|
| This code handles the case of the instruction resulting in 
| an overflow condition.
|
force_ovf:
	bclrb	#E1,E_BYTE(%a6)
	orl	#ovfl_inx_mask,USER_FPSR(%a6)
	clrw	NMNEXC(%a6)
	leal	WBTEMP(%a6),%a0		|point a0 to memory location
	movew	CMDREG1B(%a6),%d0
	btstl	#6,%d0			|test for forced precision
	beqs	frcovf_fpcr
	btstl	#2,%d0			|check for double
	bnes	frcovf_dbl
	movel	#0x1,%d0			|inst is forced single
	bras	frcovf_rnd
frcovf_dbl:
	movel	#0x2,%d0			|inst is forced double
	bras	frcovf_rnd
frcovf_fpcr:
	bfextu	FPCR_MODE(%a6){#0:#2},%d0	|inst not forced - use fpcr prec
frcovf_rnd:

| The 881/882 does not set inex2 for the following case, so the 
| line is commented out to be compatible with 881/882
|	tst.b	%d0
|	beq.b	frcovf_x
|	or.l	#inex2_mask,USER_FPSR(%a6) ;if prec is s or d, set inex2

|frcovf_x:
	bsrl	ovf_res			|get correct result based on
|					;round precision/mode.  This 
|					;sets FPSR_CC correctly
|					;returns in external format
	bfclr	WBTEMP_SGN(%a6){#0:#8}
	beq	frcfpn
	bsetb	#sign_bit,WBTEMP_EX(%a6)
	bra	frcfpn
|
| Inst is fadd.
|
wrap_add:
	cmpb	#0xff,DNRM_FLG(%a6) |if both ops denorm, 
	beq	fix_stk		 |restore to fpu
|
| One of the ops is denormalized.  Test for wrap condition
| and complete the instruction.
|
	cmpb	#0x0f,DNRM_FLG(%a6) |check for dest denorm
	bnes	add_srcd
add_destd:
	bsrl	ckinf_ns
	bne	fix_stk
	bfextu	ETEMP_EX(%a6){#1:#15},%d0	|get src exp (always pos)
	bfexts	FPTEMP_EX(%a6){#1:#15},%d1	|get dest exp (always neg)
	subl	%d1,%d0			|subtract dest from src
	cmpl	#0x8000,%d0
	blt	fix_stk			|if less, not wrap case
	bra	add_wrap
add_srcd:
	bsrl	ckinf_nd
	bne	fix_stk
	bfextu	FPTEMP_EX(%a6){#1:#15},%d0	|get dest exp (always pos)
	bfexts	ETEMP_EX(%a6){#1:#15},%d1	|get src exp (always neg)
	subl	%d1,%d0			|subtract src from dest
	cmpl	#0x8000,%d0
	blt	fix_stk			|if less, not wrap case
|
| Check the signs of the operands.  If they are unlike, the fpu
| can be used to add the norm and 1.0 with the sign of the
| denorm and it will correctly generate the result in extended
| precision.  We can then call round with no sticky and the result
| will be correct for the user's rounding mode and precision.  If
| the signs are the same, we call round with the sticky bit set
| and the result will be correct for the user's rounding mode and
| precision.
|
add_wrap:
	movew	ETEMP_EX(%a6),%d0
	movew	FPTEMP_EX(%a6),%d1
	eorw	%d1,%d0
	andiw	#0x8000,%d0
	beq	add_same
|
| The signs are unlike.
|
	cmpb	#0x0f,DNRM_FLG(%a6) |is dest the denorm?
	bnes	add_u_srcd
	movew	FPTEMP_EX(%a6),%d0
	andiw	#0x8000,%d0
	orw	#0x3fff,%d0	|force the exponent to +/- 1
	movew	%d0,FPTEMP_EX(%a6) |in the denorm
	movel	USER_FPCR(%a6),%d0
	andil	#0x30,%d0
	fmovel	%d0,%fpcr		|set up users rmode and X
	fmovex	ETEMP(%a6),%fp0
	faddx	FPTEMP(%a6),%fp0
	leal	WBTEMP(%a6),%a0	|point a0 to wbtemp in frame
	fmovel	%fpsr,%d1
	orl	%d1,USER_FPSR(%a6) |capture cc's and inex from fadd
	fmovex	%fp0,WBTEMP(%a6)	|write result to memory
	lsrl	#4,%d0		|put rmode in lower 2 bits
	movel	USER_FPCR(%a6),%d1
	andil	#0xc0,%d1
	lsrl	#6,%d1		|put precision in upper word
	swap	%d1
	orl	%d0,%d1		|set up for round call
	clrl	%d0		|force sticky to zero
	bclrb	#sign_bit,WBTEMP_EX(%a6)
	sne	WBTEMP_SGN(%a6)
	bsrl	round		|round result to users rmode & prec
	bfclr	WBTEMP_SGN(%a6){#0:#8}	|convert back to IEEE ext format
	beq	frcfpnr
	bsetb	#sign_bit,WBTEMP_EX(%a6)
	bra	frcfpnr
add_u_srcd:
	movew	ETEMP_EX(%a6),%d0
	andiw	#0x8000,%d0
	orw	#0x3fff,%d0	|force the exponent to +/- 1
	movew	%d0,ETEMP_EX(%a6) |in the denorm
	movel	USER_FPCR(%a6),%d0
	andil	#0x30,%d0
	fmovel	%d0,%fpcr		|set up users rmode and X
	fmovex	ETEMP(%a6),%fp0
	faddx	FPTEMP(%a6),%fp0
	fmovel	%fpsr,%d1
	orl	%d1,USER_FPSR(%a6) |capture cc's and inex from fadd
	leal	WBTEMP(%a6),%a0	|point a0 to wbtemp in frame
	fmovex	%fp0,WBTEMP(%a6)	|write result to memory
	lsrl	#4,%d0		|put rmode in lower 2 bits
	movel	USER_FPCR(%a6),%d1
	andil	#0xc0,%d1
	lsrl	#6,%d1		|put precision in upper word
	swap	%d1
	orl	%d0,%d1		|set up for round call
	clrl	%d0		|force sticky to zero
	bclrb	#sign_bit,WBTEMP_EX(%a6)
	sne	WBTEMP_SGN(%a6)	|use internal format for round
	bsrl	round		|round result to users rmode & prec
	bfclr	WBTEMP_SGN(%a6){#0:#8}	|convert back to IEEE ext format
	beq	frcfpnr
	bsetb	#sign_bit,WBTEMP_EX(%a6)
	bra	frcfpnr
|
| Signs are alike:
|
add_same:
	cmpb	#0x0f,DNRM_FLG(%a6) |is dest the denorm?
	bnes	add_s_srcd
add_s_destd:
	leal	ETEMP(%a6),%a0
	movel	USER_FPCR(%a6),%d0
	andil	#0x30,%d0
	lsrl	#4,%d0		|put rmode in lower 2 bits
	movel	USER_FPCR(%a6),%d1
	andil	#0xc0,%d1
	lsrl	#6,%d1		|put precision in upper word
	swap	%d1
	orl	%d0,%d1		|set up for round call
	movel	#0x20000000,%d0	|set sticky for round
	bclrb	#sign_bit,ETEMP_EX(%a6)
	sne	ETEMP_SGN(%a6)
	bsrl	round		|round result to users rmode & prec
	bfclr	ETEMP_SGN(%a6){#0:#8}	|convert back to IEEE ext format
	beqs	add_s_dclr
	bsetb	#sign_bit,ETEMP_EX(%a6)
add_s_dclr:
	leal	WBTEMP(%a6),%a0
	movel	ETEMP(%a6),(%a0)	|write result to wbtemp
	movel	ETEMP_HI(%a6),4(%a0)
	movel	ETEMP_LO(%a6),8(%a0)
	tstw	ETEMP_EX(%a6)
	bgt	add_ckovf
	orl	#neg_mask,USER_FPSR(%a6)
	bra	add_ckovf
add_s_srcd:
	leal	FPTEMP(%a6),%a0
	movel	USER_FPCR(%a6),%d0
	andil	#0x30,%d0
	lsrl	#4,%d0		|put rmode in lower 2 bits
	movel	USER_FPCR(%a6),%d1
	andil	#0xc0,%d1
	lsrl	#6,%d1		|put precision in upper word
	swap	%d1
	orl	%d0,%d1		|set up for round call
	movel	#0x20000000,%d0	|set sticky for round
	bclrb	#sign_bit,FPTEMP_EX(%a6)
	sne	FPTEMP_SGN(%a6)
	bsrl	round		|round result to users rmode & prec
	bfclr	FPTEMP_SGN(%a6){#0:#8}	|convert back to IEEE ext format
	beqs	add_s_sclr
	bsetb	#sign_bit,FPTEMP_EX(%a6)
add_s_sclr:
	leal	WBTEMP(%a6),%a0
	movel	FPTEMP(%a6),(%a0)	|write result to wbtemp
	movel	FPTEMP_HI(%a6),4(%a0)
	movel	FPTEMP_LO(%a6),8(%a0)
	tstw	FPTEMP_EX(%a6)
	bgt	add_ckovf
	orl	#neg_mask,USER_FPSR(%a6)
add_ckovf:
	movew	WBTEMP_EX(%a6),%d0
	andiw	#0x7fff,%d0
	cmpiw	#0x7fff,%d0
	bne	frcfpnr
|
| The result has overflowed to $7fff exponent.  Set I, ovfl,
| and aovfl, and clr the mantissa (incorrectly set by the
| round routine.)
|
	orl	#inf_mask+ovfl_inx_mask,USER_FPSR(%a6)	
	clrl	4(%a0)
	bra	frcfpnr
|
| Inst is fsub.
|
wrap_sub:
	cmpb	#0xff,DNRM_FLG(%a6) |if both ops denorm, 
	beq	fix_stk		 |restore to fpu
|
| One of the ops is denormalized.  Test for wrap condition
| and complete the instruction.
|
	cmpb	#0x0f,DNRM_FLG(%a6) |check for dest denorm
	bnes	sub_srcd
sub_destd:
	bsrl	ckinf_ns
	bne	fix_stk
	bfextu	ETEMP_EX(%a6){#1:#15},%d0	|get src exp (always pos)
	bfexts	FPTEMP_EX(%a6){#1:#15},%d1	|get dest exp (always neg)
	subl	%d1,%d0			|subtract src from dest
	cmpl	#0x8000,%d0
	blt	fix_stk			|if less, not wrap case
	bra	sub_wrap
sub_srcd:
	bsrl	ckinf_nd
	bne	fix_stk
	bfextu	FPTEMP_EX(%a6){#1:#15},%d0	|get dest exp (always pos)
	bfexts	ETEMP_EX(%a6){#1:#15},%d1	|get src exp (always neg)
	subl	%d1,%d0			|subtract dest from src
	cmpl	#0x8000,%d0
	blt	fix_stk			|if less, not wrap case
|
| Check the signs of the operands.  If they are alike, the fpu
| can be used to subtract from the norm 1.0 with the sign of the
| denorm and it will correctly generate the result in extended
| precision.  We can then call round with no sticky and the result
| will be correct for the user's rounding mode and precision.  If
| the signs are unlike, we call round with the sticky bit set
| and the result will be correct for the user's rounding mode and
| precision.
|
sub_wrap:
	movew	ETEMP_EX(%a6),%d0
	movew	FPTEMP_EX(%a6),%d1
	eorw	%d1,%d0
	andiw	#0x8000,%d0
	bne	sub_diff
|
| The signs are alike.
|
	cmpb	#0x0f,DNRM_FLG(%a6) |is dest the denorm?
	bnes	sub_u_srcd
	movew	FPTEMP_EX(%a6),%d0
	andiw	#0x8000,%d0
	orw	#0x3fff,%d0	|force the exponent to +/- 1
	movew	%d0,FPTEMP_EX(%a6) |in the denorm
	movel	USER_FPCR(%a6),%d0
	andil	#0x30,%d0
	fmovel	%d0,%fpcr		|set up users rmode and X
	fmovex	FPTEMP(%a6),%fp0
	fsubx	ETEMP(%a6),%fp0
	fmovel	%fpsr,%d1
	orl	%d1,USER_FPSR(%a6) |capture cc's and inex from fadd
	leal	WBTEMP(%a6),%a0	|point a0 to wbtemp in frame
	fmovex	%fp0,WBTEMP(%a6)	|write result to memory
	lsrl	#4,%d0		|put rmode in lower 2 bits
	movel	USER_FPCR(%a6),%d1
	andil	#0xc0,%d1
	lsrl	#6,%d1		|put precision in upper word
	swap	%d1
	orl	%d0,%d1		|set up for round call
	clrl	%d0		|force sticky to zero
	bclrb	#sign_bit,WBTEMP_EX(%a6)
	sne	WBTEMP_SGN(%a6)
	bsrl	round		|round result to users rmode & prec
	bfclr	WBTEMP_SGN(%a6){#0:#8}	|convert back to IEEE ext format
	beq	frcfpnr
	bsetb	#sign_bit,WBTEMP_EX(%a6)
	bra	frcfpnr
sub_u_srcd:
	movew	ETEMP_EX(%a6),%d0
	andiw	#0x8000,%d0
	orw	#0x3fff,%d0	|force the exponent to +/- 1
	movew	%d0,ETEMP_EX(%a6) |in the denorm
	movel	USER_FPCR(%a6),%d0
	andil	#0x30,%d0
	fmovel	%d0,%fpcr		|set up users rmode and X
	fmovex	FPTEMP(%a6),%fp0
	fsubx	ETEMP(%a6),%fp0
	fmovel	%fpsr,%d1
	orl	%d1,USER_FPSR(%a6) |capture cc's and inex from fadd
	leal	WBTEMP(%a6),%a0	|point a0 to wbtemp in frame
	fmovex	%fp0,WBTEMP(%a6)	|write result to memory
	lsrl	#4,%d0		|put rmode in lower 2 bits
	movel	USER_FPCR(%a6),%d1
	andil	#0xc0,%d1
	lsrl	#6,%d1		|put precision in upper word
	swap	%d1
	orl	%d0,%d1		|set up for round call
	clrl	%d0		|force sticky to zero
	bclrb	#sign_bit,WBTEMP_EX(%a6)
	sne	WBTEMP_SGN(%a6)
	bsrl	round		|round result to users rmode & prec
	bfclr	WBTEMP_SGN(%a6){#0:#8}	|convert back to IEEE ext format
	beq	frcfpnr
	bsetb	#sign_bit,WBTEMP_EX(%a6)
	bra	frcfpnr
|
| Signs are unlike:
|
sub_diff:
	cmpb	#0x0f,DNRM_FLG(%a6) |is dest the denorm?
	bnes	sub_s_srcd
sub_s_destd:
	leal	ETEMP(%a6),%a0
	movel	USER_FPCR(%a6),%d0
	andil	#0x30,%d0
	lsrl	#4,%d0		|put rmode in lower 2 bits
	movel	USER_FPCR(%a6),%d1
	andil	#0xc0,%d1
	lsrl	#6,%d1		|put precision in upper word
	swap	%d1
	orl	%d0,%d1		|set up for round call
	movel	#0x20000000,%d0	|set sticky for round
|
| Since the dest is the denorm, the sign is the opposite of the
| norm sign.
|
	eoriw	#0x8000,ETEMP_EX(%a6)	|flip sign on result
	tstw	ETEMP_EX(%a6)
	bgts	sub_s_dwr
	orl	#neg_mask,USER_FPSR(%a6)
sub_s_dwr:
	bclrb	#sign_bit,ETEMP_EX(%a6)
	sne	ETEMP_SGN(%a6)
	bsrl	round		|round result to users rmode & prec
	bfclr	ETEMP_SGN(%a6){#0:#8}	|convert back to IEEE ext format
	beqs	sub_s_dclr
	bsetb	#sign_bit,ETEMP_EX(%a6)
sub_s_dclr:
	leal	WBTEMP(%a6),%a0
	movel	ETEMP(%a6),(%a0)	|write result to wbtemp
	movel	ETEMP_HI(%a6),4(%a0)
	movel	ETEMP_LO(%a6),8(%a0)
	bra	sub_ckovf
sub_s_srcd:
	leal	FPTEMP(%a6),%a0
	movel	USER_FPCR(%a6),%d0
	andil	#0x30,%d0
	lsrl	#4,%d0		|put rmode in lower 2 bits
	movel	USER_FPCR(%a6),%d1
	andil	#0xc0,%d1
	lsrl	#6,%d1		|put precision in upper word
	swap	%d1
	orl	%d0,%d1		|set up for round call
	movel	#0x20000000,%d0	|set sticky for round
	bclrb	#sign_bit,FPTEMP_EX(%a6)
	sne	FPTEMP_SGN(%a6)
	bsrl	round		|round result to users rmode & prec
	bfclr	FPTEMP_SGN(%a6){#0:#8}	|convert back to IEEE ext format
	beqs	sub_s_sclr
	bsetb	#sign_bit,FPTEMP_EX(%a6)
sub_s_sclr:
	leal	WBTEMP(%a6),%a0
	movel	FPTEMP(%a6),(%a0)	|write result to wbtemp
	movel	FPTEMP_HI(%a6),4(%a0)
	movel	FPTEMP_LO(%a6),8(%a0)
	tstw	FPTEMP_EX(%a6)
	bgt	sub_ckovf
	orl	#neg_mask,USER_FPSR(%a6)
sub_ckovf:
	movew	WBTEMP_EX(%a6),%d0
	andiw	#0x7fff,%d0
	cmpiw	#0x7fff,%d0
	bne	frcfpnr
|
| The result has overflowed to $7fff exponent.  Set I, ovfl,
| and aovfl, and clr the mantissa (incorrectly set by the
| round routine.)
|
	orl	#inf_mask+ovfl_inx_mask,USER_FPSR(%a6)	
	clrl	4(%a0)
	bra	frcfpnr
|
| Inst is fcmp.
|
wrap_cmp:
	cmpb	#0xff,DNRM_FLG(%a6) |if both ops denorm, 
	beq	fix_stk		 |restore to fpu
|
| One of the ops is denormalized.  Test for wrap condition
| and complete the instruction.
|
	cmpb	#0x0f,DNRM_FLG(%a6) |check for dest denorm
	bnes	cmp_srcd
cmp_destd:
	bsrl	ckinf_ns
	bne	fix_stk
	bfextu	ETEMP_EX(%a6){#1:#15},%d0	|get src exp (always pos)
	bfexts	FPTEMP_EX(%a6){#1:#15},%d1	|get dest exp (always neg)
	subl	%d1,%d0			|subtract dest from src
	cmpl	#0x8000,%d0
	blt	fix_stk			|if less, not wrap case
	tstw	ETEMP_EX(%a6)		|set N to ~sign_of(src)
	bge	cmp_setn
	rts
cmp_srcd:
	bsrl	ckinf_nd
	bne	fix_stk
	bfextu	FPTEMP_EX(%a6){#1:#15},%d0	|get dest exp (always pos)
	bfexts	ETEMP_EX(%a6){#1:#15},%d1	|get src exp (always neg)
	subl	%d1,%d0			|subtract src from dest
	cmpl	#0x8000,%d0
	blt	fix_stk			|if less, not wrap case
	tstw	FPTEMP_EX(%a6)		|set N to sign_of(dest)
	blt	cmp_setn
	rts
cmp_setn:
	orl	#neg_mask,USER_FPSR(%a6)
	rts

|
| Inst is fmul.
|
wrap_mul:
	cmpb	#0xff,DNRM_FLG(%a6) |if both ops denorm, 
	beq	force_unf	|force an underflow (really!)
|
| One of the ops is denormalized.  Test for wrap condition
| and complete the instruction.
|
	cmpb	#0x0f,DNRM_FLG(%a6) |check for dest denorm
	bnes	mul_srcd
mul_destd:
	bsrl	ckinf_ns
	bne	fix_stk
	bfextu	ETEMP_EX(%a6){#1:#15},%d0	|get src exp (always pos)
	bfexts	FPTEMP_EX(%a6){#1:#15},%d1	|get dest exp (always neg)
	addl	%d1,%d0			|subtract dest from src
	bgt	fix_stk
	bra	force_unf
mul_srcd:
	bsrl	ckinf_nd
	bne	fix_stk
	bfextu	FPTEMP_EX(%a6){#1:#15},%d0	|get dest exp (always pos)
	bfexts	ETEMP_EX(%a6){#1:#15},%d1	|get src exp (always neg)
	addl	%d1,%d0			|subtract src from dest
	bgt	fix_stk
	
|
| This code handles the case of the instruction resulting in 
| an underflow condition.
|
force_unf:
	bclrb	#E1,E_BYTE(%a6)
	orl	#unfinx_mask,USER_FPSR(%a6)
	clrw	NMNEXC(%a6)
	clrb	WBTEMP_SGN(%a6)
	movew	ETEMP_EX(%a6),%d0		|find the sign of the result
	movew	FPTEMP_EX(%a6),%d1
	eorw	%d1,%d0
	andiw	#0x8000,%d0
	beqs	frcunfcont
	st	WBTEMP_SGN(%a6)
frcunfcont:
	lea	WBTEMP(%a6),%a0		|point a0 to memory location
	movew	CMDREG1B(%a6),%d0
	btstl	#6,%d0			|test for forced precision
	beqs	frcunf_fpcr
	btstl	#2,%d0			|check for double
	bnes	frcunf_dbl
	movel	#0x1,%d0			|inst is forced single
	bras	frcunf_rnd
frcunf_dbl:
	movel	#0x2,%d0			|inst is forced double
	bras	frcunf_rnd
frcunf_fpcr:
	bfextu	FPCR_MODE(%a6){#0:#2},%d0	|inst not forced - use fpcr prec
frcunf_rnd:
	bsrl	unf_sub			|get correct result based on
|					;round precision/mode.  This 
|					;sets FPSR_CC correctly
	bfclr	WBTEMP_SGN(%a6){#0:#8}	|convert back to IEEE ext format
	beqs	frcfpn
	bsetb	#sign_bit,WBTEMP_EX(%a6)
	bra	frcfpn

|
| Write the result to the user's fpn.  All results must be HUGE to be
| written; otherwise the results would have overflowed or underflowed.
| If the rounding precision is single or double, the ovf_res routine
| is needed to correctly supply the max value.
|
frcfpnr:
	movew	CMDREG1B(%a6),%d0
	btstl	#6,%d0			|test for forced precision
	beqs	frcfpn_fpcr
	btstl	#2,%d0			|check for double
	bnes	frcfpn_dbl
	movel	#0x1,%d0			|inst is forced single
	bras	frcfpn_rnd
frcfpn_dbl:
	movel	#0x2,%d0			|inst is forced double
	bras	frcfpn_rnd
frcfpn_fpcr:
	bfextu	FPCR_MODE(%a6){#0:#2},%d0	|inst not forced - use fpcr prec
	tstb	%d0
	beqs	frcfpn			|if extended, write what you got
frcfpn_rnd:
	bclrb	#sign_bit,WBTEMP_EX(%a6)
	sne	WBTEMP_SGN(%a6)
	bsrl	ovf_res			|get correct result based on
|					;round precision/mode.  This 
|					;sets FPSR_CC correctly
	bfclr	WBTEMP_SGN(%a6){#0:#8}	|convert back to IEEE ext format
	beqs	frcfpn_clr
	bsetb	#sign_bit,WBTEMP_EX(%a6)
frcfpn_clr:
	orl	#ovfinx_mask,USER_FPSR(%a6)
| 
| Perform the write.
|
frcfpn:
	bfextu	CMDREG1B(%a6){#6:#3},%d0	|extract fp destination register
	cmpib	#3,%d0
	bles	frc0123			|check if dest is fp0-fp3
	movel	#7,%d1
	subl	%d0,%d1
	clrl	%d0
	bsetl	%d1,%d0
	fmovemx WBTEMP(%a6),%d0
	rts
frc0123:
	cmpib	#0,%d0
	beqs	frc0_dst
	cmpib	#1,%d0
	beqs	frc1_dst 
	cmpib	#2,%d0
	beqs	frc2_dst 
frc3_dst:
	movel	WBTEMP_EX(%a6),USER_FP3(%a6)
	movel	WBTEMP_HI(%a6),USER_FP3+4(%a6)
	movel	WBTEMP_LO(%a6),USER_FP3+8(%a6)
	rts
frc2_dst:
	movel	WBTEMP_EX(%a6),USER_FP2(%a6)
	movel	WBTEMP_HI(%a6),USER_FP2+4(%a6)
	movel	WBTEMP_LO(%a6),USER_FP2+8(%a6)
	rts
frc1_dst:
	movel	WBTEMP_EX(%a6),USER_FP1(%a6)
	movel	WBTEMP_HI(%a6),USER_FP1+4(%a6)
	movel	WBTEMP_LO(%a6),USER_FP1+8(%a6)
	rts
frc0_dst:
	movel	WBTEMP_EX(%a6),USER_FP0(%a6)
	movel	WBTEMP_HI(%a6),USER_FP0+4(%a6)
	movel	WBTEMP_LO(%a6),USER_FP0+8(%a6)
	rts

|
| Write etemp to fpn.
| A check is made on enabled and signalled snan exceptions,
| and the destination is not overwritten if this condition exists.
| This code is designed to make fmoveins of unsupported data types
| faster.
|
wr_etemp:
	btstb	#snan_bit,FPSR_EXCEPT(%a6)	|if snan is set, and
	beqs	fmoveinc		|enabled, force restore
	btstb	#snan_bit,FPCR_ENABLE(%a6) |and don't overwrite
	beqs	fmoveinc		|the dest
	movel	ETEMP_EX(%a6),FPTEMP_EX(%a6)	|set up fptemp sign for 
|						;snan handler
	tstb	ETEMP(%a6)		|check for negative
	blts	snan_neg
	rts
snan_neg:
	orl	#neg_bit,USER_FPSR(%a6)	|snan is negative; set N
	rts
fmoveinc:
	clrw	NMNEXC(%a6)
	bclrb	#E1,E_BYTE(%a6)
	moveb	STAG(%a6),%d0		|check if stag is inf
	andib	#0xe0,%d0
	cmpib	#0x40,%d0
	bnes	fminc_cnan
	orl	#inf_mask,USER_FPSR(%a6) |if inf, nothing yet has set I
	tstw	LOCAL_EX(%a0)		|check sign
	bges	fminc_con
	orl	#neg_mask,USER_FPSR(%a6)
	bra	fminc_con
fminc_cnan:
	cmpib	#0x60,%d0			|check if stag is NaN
	bnes	fminc_czero
	orl	#nan_mask,USER_FPSR(%a6) |if nan, nothing yet has set NaN
	movel	ETEMP_EX(%a6),FPTEMP_EX(%a6)	|set up fptemp sign for 
|						;snan handler
	tstw	LOCAL_EX(%a0)		|check sign
	bges	fminc_con
	orl	#neg_mask,USER_FPSR(%a6)
	bra	fminc_con
fminc_czero:
	cmpib	#0x20,%d0			|check if zero
	bnes	fminc_con
	orl	#z_mask,USER_FPSR(%a6)	|if zero, set Z
	tstw	LOCAL_EX(%a0)		|check sign
	bges	fminc_con
	orl	#neg_mask,USER_FPSR(%a6)
fminc_con:
	bfextu	CMDREG1B(%a6){#6:#3},%d0	|extract fp destination register
	cmpib	#3,%d0
	bles	fp0123			|check if dest is fp0-fp3
	movel	#7,%d1
	subl	%d0,%d1
	clrl	%d0
	bsetl	%d1,%d0
	fmovemx ETEMP(%a6),%d0
	rts

fp0123:
	cmpib	#0,%d0
	beqs	fp0_dst
	cmpib	#1,%d0
	beqs	fp1_dst 
	cmpib	#2,%d0
	beqs	fp2_dst 
fp3_dst:
	movel	ETEMP_EX(%a6),USER_FP3(%a6)
	movel	ETEMP_HI(%a6),USER_FP3+4(%a6)
	movel	ETEMP_LO(%a6),USER_FP3+8(%a6)
	rts
fp2_dst:
	movel	ETEMP_EX(%a6),USER_FP2(%a6)
	movel	ETEMP_HI(%a6),USER_FP2+4(%a6)
	movel	ETEMP_LO(%a6),USER_FP2+8(%a6)
	rts
fp1_dst:
	movel	ETEMP_EX(%a6),USER_FP1(%a6)
	movel	ETEMP_HI(%a6),USER_FP1+4(%a6)
	movel	ETEMP_LO(%a6),USER_FP1+8(%a6)
	rts
fp0_dst:
	movel	ETEMP_EX(%a6),USER_FP0(%a6)
	movel	ETEMP_HI(%a6),USER_FP0+4(%a6)
	movel	ETEMP_LO(%a6),USER_FP0+8(%a6)
	rts

opclass3:
	st	CU_ONLY(%a6)
	movew	CMDREG1B(%a6),%d0	|check if packed moveout
	andiw	#0x0c00,%d0	|isolate last 2 bits of size field
	cmpiw	#0x0c00,%d0	|if size is 011 or 111, it is packed
	beq	pack_out	|else it is norm or denorm
	bra	mv_out

	
|
|	MOVE OUT
|

mv_tbl:
	.long	li
	.long 	sgp
	.long 	xp
	.long 	mvout_end	|should never be taken
	.long 	wi
	.long 	dp
	.long 	bi
	.long 	mvout_end	|should never be taken
mv_out:
	bfextu	CMDREG1B(%a6){#3:#3},%d1	|put source specifier in d1
	leal	mv_tbl,%a0
	movel	%a0@(%d1:l:4),%a0
	jmp	(%a0)

|
| This exit is for move-out to memory.  The aunfl bit is 
| set if the result is inex and unfl is signalled.
|
mvout_end:
	btstb	#inex2_bit,FPSR_EXCEPT(%a6)
	beqs	no_aufl
	btstb	#unfl_bit,FPSR_EXCEPT(%a6)
	beqs	no_aufl
	bsetb	#aunfl_bit,FPSR_AEXCEPT(%a6)
no_aufl:
	clrw	NMNEXC(%a6)
	bclrb	#E1,E_BYTE(%a6)
	fmovel	#0,%FPSR			|clear any cc bits from res_func
|
| Return ETEMP to extended format from internal extended format so
| that gen_except will have a correctly signed value for ovfl/unfl
| handlers.
|
	bfclr	ETEMP_SGN(%a6){#0:#8}
	beqs	mvout_con
	bsetb	#sign_bit,ETEMP_EX(%a6)
mvout_con:
	rts
|
| This exit is for move-out to int register.  The aunfl bit is 
| not set in any case for this move.
|
mvouti_end:
	clrw	NMNEXC(%a6)
	bclrb	#E1,E_BYTE(%a6)
	fmovel	#0,%FPSR			|clear any cc bits from res_func
|
| Return ETEMP to extended format from internal extended format so
| that gen_except will have a correctly signed value for ovfl/unfl
| handlers.
|
	bfclr	ETEMP_SGN(%a6){#0:#8}
	beqs	mvouti_con
	bsetb	#sign_bit,ETEMP_EX(%a6)
mvouti_con:
	rts
|
| li is used to handle a long integer source specifier
|

li:
	moveql	#4,%d0		|set byte count

	btstb	#7,STAG(%a6)	|check for extended denorm
	bne	int_dnrm	|if so, branch

	fmovemx ETEMP(%a6),%fp0-%fp0
	fcmpd	#0x41dfffffffc00000,%fp0
| 41dfffffffc00000 in dbl prec = 401d0000fffffffe00000000 in ext prec
	fbge	lo_plrg	
	fcmpd	#0xc1e0000000000000,%fp0
| c1e0000000000000 in dbl prec = c01e00008000000000000000 in ext prec
	fble	lo_nlrg
|
| at this point, the answer is between the largest pos and neg values
|
	movel	USER_FPCR(%a6),%d1	|use user's rounding mode
	andil	#0x30,%d1
	fmovel	%d1,%fpcr
	fmovel	%fp0,L_SCR1(%a6)	|let the 040 perform conversion
	fmovel %fpsr,%d1
	orl	%d1,USER_FPSR(%a6)	|capture inex2/ainex if set
	bra	int_wrt


lo_plrg:
	movel	#0x7fffffff,L_SCR1(%a6)	|answer is largest positive int
	fbeq	int_wrt			|exact answer
	fcmpd	#0x41dfffffffe00000,%fp0
| 41dfffffffe00000 in dbl prec = 401d0000ffffffff00000000 in ext prec
	fbge	int_operr		|set operr
	bra	int_inx			|set inexact

lo_nlrg:
	movel	#0x80000000,L_SCR1(%a6)
	fbeq	int_wrt			|exact answer
	fcmpd	#0xc1e0000000100000,%fp0
| c1e0000000100000 in dbl prec = c01e00008000000080000000 in ext prec
	fblt	int_operr		|set operr
	bra	int_inx			|set inexact

|
| wi is used to handle a word integer source specifier
|

wi:
	moveql	#2,%d0		|set byte count

	btstb	#7,STAG(%a6)	|check for extended denorm
	bne	int_dnrm	|branch if so

	fmovemx ETEMP(%a6),%fp0-%fp0
	fcmps	#0x46fffe00,%fp0
| 46fffe00 in sgl prec = 400d0000fffe000000000000 in ext prec
	fbge	wo_plrg	
	fcmps	#0xc7000000,%fp0
| c7000000 in sgl prec = c00e00008000000000000000 in ext prec
	fble	wo_nlrg

|
| at this point, the answer is between the largest pos and neg values
|
	movel	USER_FPCR(%a6),%d1	|use user's rounding mode
	andil	#0x30,%d1
	fmovel	%d1,%fpcr
	fmovew	%fp0,L_SCR1(%a6)	|let the 040 perform conversion
	fmovel %fpsr,%d1
	orl	%d1,USER_FPSR(%a6)	|capture inex2/ainex if set
	bra	int_wrt

wo_plrg:
	movew	#0x7fff,L_SCR1(%a6)	|answer is largest positive int
	fbeq	int_wrt			|exact answer
	fcmps	#0x46ffff00,%fp0
| 46ffff00 in sgl prec = 400d0000ffff000000000000 in ext prec
	fbge	int_operr		|set operr
	bra	int_inx			|set inexact

wo_nlrg:
	movew	#0x8000,L_SCR1(%a6)
	fbeq	int_wrt			|exact answer
	fcmps	#0xc7000080,%fp0
| c7000080 in sgl prec = c00e00008000800000000000 in ext prec
	fblt	int_operr		|set operr
	bra	int_inx			|set inexact

|
| bi is used to handle a byte integer source specifier
|

bi:
	moveql	#1,%d0		|set byte count

	btstb	#7,STAG(%a6)	|check for extended denorm
	bne	int_dnrm	|branch if so

	fmovemx ETEMP(%a6),%fp0-%fp0
	fcmps	#0x42fe0000,%fp0
| 42fe0000 in sgl prec = 40050000fe00000000000000 in ext prec
	fbge	by_plrg	
	fcmps	#0xc3000000,%fp0
| c3000000 in sgl prec = c00600008000000000000000 in ext prec
	fble	by_nlrg

|
| at this point, the answer is between the largest pos and neg values
|
	movel	USER_FPCR(%a6),%d1	|use user's rounding mode
	andil	#0x30,%d1
	fmovel	%d1,%fpcr
	fmoveb	%fp0,L_SCR1(%a6)	|let the 040 perform conversion
	fmovel %fpsr,%d1
	orl	%d1,USER_FPSR(%a6)	|capture inex2/ainex if set
	bra	int_wrt

by_plrg:
	moveb	#0x7f,L_SCR1(%a6)		|answer is largest positive int
	fbeq	int_wrt			|exact answer
	fcmps	#0x42ff0000,%fp0
| 42ff0000 in sgl prec = 40050000ff00000000000000 in ext prec
	fbge	int_operr		|set operr
	bra	int_inx			|set inexact

by_nlrg:
	moveb	#0x80,L_SCR1(%a6)
	fbeq	int_wrt			|exact answer
	fcmps	#0xc3008000,%fp0
| c3008000 in sgl prec = c00600008080000000000000 in ext prec
	fblt	int_operr		|set operr
	bra	int_inx			|set inexact

|
| Common integer routines
|
| int_drnrm---account for possible nonzero result for round up with positive
| operand and round down for negative answer.  In the first case (result = 1)
| byte-width (store in d0) of result must be honored.  In the second case,
| -1 in L_SCR1(a6) will cover all contingencies (FMOVE.B/W/L out).

int_dnrm:
	movel	#0,L_SCR1(%a6)	| initialize result to 0
	bfextu	FPCR_MODE(%a6){#2:#2},%d1	| d1 is the rounding mode
	cmpb	#2,%d1		
	bmis	int_inx		| if RN or RZ, done
	bnes	int_rp		| if RP, continue below
	tstw	ETEMP(%a6)	| RM: store -1 in L_SCR1 if src is negative
	bpls	int_inx		| otherwise result is 0
	movel	#-1,L_SCR1(%a6)
	bras	int_inx
int_rp:
	tstw	ETEMP(%a6)	| RP: store +1 of proper width in L_SCR1 if
|				; source is greater than 0
	bmis	int_inx		| otherwise, result is 0
	lea	L_SCR1(%a6),%a1	| a1 is address of L_SCR1
	addal	%d0,%a1		| offset by destination width -1
	subal	#1,%a1		
	bsetb	#0,(%a1)		| set low bit at a1 address
int_inx:
	oril	#inx2a_mask,USER_FPSR(%a6)
	bras	int_wrt
int_operr:
	fmovemx %fp0-%fp0,FPTEMP(%a6)	|FPTEMP must contain the extended
|				;precision source that needs to be
|				;converted to integer this is required
|				;if the operr exception is enabled.
|				;set operr/aiop (no inex2 on int ovfl)

	oril	#opaop_mask,USER_FPSR(%a6)
|				;fall through to perform int_wrt
int_wrt: 
	movel	EXC_EA(%a6),%a1	|load destination address
	tstl	%a1		|check to see if it is a dest register
	beqs	wrt_dn		|write data register 
	lea	L_SCR1(%a6),%a0	|point to supervisor source address
	bsrl	mem_write
	bra	mvouti_end

wrt_dn:
	movel	%d0,-(%sp)	|d0 currently contains the size to write
	bsrl	get_fline	|get_fline returns Dn in d0
	andiw	#0x7,%d0		|isolate register
	movel	(%sp)+,%d1	|get size
	cmpil	#4,%d1		|most frequent case
	beqs	sz_long
	cmpil	#2,%d1
	bnes	sz_con
	orl	#8,%d0		|add 'word' size to register#
	bras	sz_con
sz_long:
	orl	#0x10,%d0		|add 'long' size to register#
sz_con:
	movel	%d0,%d1		|reg_dest expects size:reg in d1
	bsrl	reg_dest	|load proper data register
	bra	mvouti_end 
xp:
	lea	ETEMP(%a6),%a0
	bclrb	#sign_bit,LOCAL_EX(%a0)
	sne	LOCAL_SGN(%a0)
	btstb	#7,STAG(%a6)	|check for extended denorm
	bne	xdnrm
	clrl	%d0
	bras	do_fp		|do normal case
sgp:
	lea	ETEMP(%a6),%a0
	bclrb	#sign_bit,LOCAL_EX(%a0)
	sne	LOCAL_SGN(%a0)
	btstb	#7,STAG(%a6)	|check for extended denorm
	bne	sp_catas	|branch if so
	movew	LOCAL_EX(%a0),%d0
	lea	sp_bnds,%a1
	cmpw	(%a1),%d0
	blt	sp_under
	cmpw	2(%a1),%d0
	bgt	sp_over
	movel	#1,%d0		|set destination format to single
	bras	do_fp		|do normal case
dp:
	lea	ETEMP(%a6),%a0
	bclrb	#sign_bit,LOCAL_EX(%a0)
	sne	LOCAL_SGN(%a0)

	btstb	#7,STAG(%a6)	|check for extended denorm
	bne	dp_catas	|branch if so

	movew	LOCAL_EX(%a0),%d0
	lea	dp_bnds,%a1

	cmpw	(%a1),%d0
	blt	dp_under
	cmpw	2(%a1),%d0
	bgt	dp_over
	
	movel	#2,%d0		|set destination format to double
|				;fall through to do_fp
|
do_fp:
	bfextu	FPCR_MODE(%a6){#2:#2},%d1	|rnd mode in d1
	swap	%d0			|rnd prec in upper word
	addl	%d0,%d1			|d1 has PREC/MODE info
	
	clrl	%d0			|clear g,r,s 

	bsrl	round			|round 

	movel	%a0,%a1
	movel	EXC_EA(%a6),%a0

	bfextu	CMDREG1B(%a6){#3:#3},%d1	|extract destination format
|					;at this point only the dest
|					;formats sgl, dbl, ext are
|					;possible
	cmpb	#2,%d1
	bgts	ddbl			|double=5, extended=2, single=1
	bnes	dsgl
|					;fall through to dext
dext:
	bsrl	dest_ext
	bra	mvout_end
dsgl:
	bsrl	dest_sgl
	bra	mvout_end
ddbl:
	bsrl	dest_dbl
	bra	mvout_end

|
| Handle possible denorm or catastrophic underflow cases here
|
xdnrm:
	bsr	set_xop		|initialize WBTEMP
	bsetb	#wbtemp15_bit,WB_BYTE(%a6) |set wbtemp15

	movel	%a0,%a1
	movel	EXC_EA(%a6),%a0	|a0 has the destination pointer
	bsrl	dest_ext	|store to memory
	bsetb	#unfl_bit,FPSR_EXCEPT(%a6)
	bra	mvout_end
	
sp_under:
	bsetb	#etemp15_bit,STAG(%a6)

	cmpw	4(%a1),%d0
	blts	sp_catas	|catastrophic underflow case	

	movel	#1,%d0		|load in round precision
	movel	#sgl_thresh,%d1	|load in single denorm threshold
	bsrl	dpspdnrm	|expects d1 to have the proper
|				;denorm threshold
	bsrl	dest_sgl	|stores value to destination
	bsetb	#unfl_bit,FPSR_EXCEPT(%a6)
	bra	mvout_end	|exit

dp_under:
	bsetb	#etemp15_bit,STAG(%a6)

	cmpw	4(%a1),%d0
	blts	dp_catas	|catastrophic underflow case
		
	movel	#dbl_thresh,%d1	|load in double precision threshold
	movel	#2,%d0		
	bsrl	dpspdnrm	|expects d1 to have proper
|				;denorm threshold
|				;expects d0 to have round precision
	bsrl	dest_dbl	|store value to destination
	bsetb	#unfl_bit,FPSR_EXCEPT(%a6)
	bra	mvout_end	|exit

|
| Handle catastrophic underflow cases here
|
sp_catas:
| Temp fix for z bit set in unf_sub
	movel	USER_FPSR(%a6),-(%a7)

	movel	#1,%d0		|set round precision to sgl

	bsrl	unf_sub		|a0 points to result

	movel	(%a7)+,USER_FPSR(%a6)

	movel	#1,%d0
	subw	%d0,LOCAL_EX(%a0) |account for difference between
|				;denorm/norm bias

	movel	%a0,%a1		|a1 has the operand input
	movel	EXC_EA(%a6),%a0	|a0 has the destination pointer
	
	bsrl	dest_sgl	|store the result
	oril	#unfinx_mask,USER_FPSR(%a6)
	bra	mvout_end
	
dp_catas:
| Temp fix for z bit set in unf_sub
	movel	USER_FPSR(%a6),-(%a7)

	movel	#2,%d0		|set round precision to dbl
	bsrl	unf_sub		|a0 points to result

	movel	(%a7)+,USER_FPSR(%a6)

	movel	#1,%d0
	subw	%d0,LOCAL_EX(%a0) |account for difference between 
|				;denorm/norm bias

	movel	%a0,%a1		|a1 has the operand input
	movel	EXC_EA(%a6),%a0	|a0 has the destination pointer
	
	bsrl	dest_dbl	|store the result
	oril	#unfinx_mask,USER_FPSR(%a6)
	bra	mvout_end

|
| Handle catastrophic overflow cases here
|
sp_over:
| Temp fix for z bit set in unf_sub
	movel	USER_FPSR(%a6),-(%a7)

	movel	#1,%d0
	leal	FP_SCR1(%a6),%a0	|use FP_SCR1 for creating result
	movel	ETEMP_EX(%a6),(%a0)
	movel	ETEMP_HI(%a6),4(%a0)
	movel	ETEMP_LO(%a6),8(%a0)
	bsrl	ovf_res

	movel	(%a7)+,USER_FPSR(%a6)

	movel	%a0,%a1
	movel	EXC_EA(%a6),%a0
	bsrl	dest_sgl
	orl	#ovfinx_mask,USER_FPSR(%a6)
	bra	mvout_end

dp_over:
| Temp fix for z bit set in ovf_res
	movel	USER_FPSR(%a6),-(%a7)

	movel	#2,%d0
	leal	FP_SCR1(%a6),%a0	|use FP_SCR1 for creating result
	movel	ETEMP_EX(%a6),(%a0)
	movel	ETEMP_HI(%a6),4(%a0)
	movel	ETEMP_LO(%a6),8(%a0)
	bsrl	ovf_res

	movel	(%a7)+,USER_FPSR(%a6)

	movel	%a0,%a1
	movel	EXC_EA(%a6),%a0
	bsrl	dest_dbl
	orl	#ovfinx_mask,USER_FPSR(%a6)
	bra	mvout_end

|
| 	DPSPDNRM
|
| This subroutine takes an extended normalized number and denormalizes
| it to the given round precision. This subroutine also decrements
| the input operand's exponent by 1 to account for the fact that
| dest_sgl or dest_dbl expects a normalized number's bias.
|
| Input: a0  points to a normalized number in internal extended format
|	 d0  is the round precision (=1 for sgl; =2 for dbl)
|	 d1  is the single precision or double precision
|	     denorm threshold
|
| Output: (In the format for dest_sgl or dest_dbl)
|	 a0   points to the destination
|   	 a1   points to the operand
|
| Exceptions: Reports inexact 2 exception by setting USER_FPSR bits
|
dpspdnrm:
	movel	%d0,-(%a7)	|save round precision
	clrl	%d0		|clear initial g,r,s
	bsrl	dnrm_lp		|careful with d0, it's needed by round

	bfextu	FPCR_MODE(%a6){#2:#2},%d1 |get rounding mode
	swap	%d1
	movew	2(%a7),%d1	|set rounding precision 
	swap	%d1		|at this point d1 has PREC/MODE info
	bsrl	round		|round result, sets the inex bit in
|				;USER_FPSR if needed

	movew	#1,%d0
	subw	%d0,LOCAL_EX(%a0) |account for difference in denorm
|				;vs norm bias

	movel	%a0,%a1		|a1 has the operand input
	movel	EXC_EA(%a6),%a0	|a0 has the destination pointer
	addw	#4,%a7		|pop stack
	rts
|
| SET_XOP initialized WBTEMP with the value pointed to by a0
| input: a0 points to input operand in the internal extended format
|
set_xop:
	movel	LOCAL_EX(%a0),WBTEMP_EX(%a6)
	movel	LOCAL_HI(%a0),WBTEMP_HI(%a6)
	movel	LOCAL_LO(%a0),WBTEMP_LO(%a6)
	bfclr	WBTEMP_SGN(%a6){#0:#8}
	beqs	sxop
	bsetb	#sign_bit,WBTEMP_EX(%a6)
sxop:
	bfclr	STAG(%a6){#5:#4}	|clear wbtm66,wbtm1,wbtm0,sbit
	rts
|
|	P_MOVE
|
p_movet:
	.long	p_move
	.long	p_movez
	.long	p_movei
	.long	p_moven
	.long	p_move
p_regd:
	.long	p_dyd0
	.long	p_dyd1
	.long	p_dyd2
	.long	p_dyd3
	.long	p_dyd4
	.long	p_dyd5
	.long	p_dyd6
	.long	p_dyd7

pack_out:
 	leal	p_movet,%a0	|load jmp table address
	movew	STAG(%a6),%d0	|get source tag
	bfextu	%d0{#16:#3},%d0	|isolate source bits
	movel	(%a0,%d0.w*4),%a0	|load a0 with routine label for tag
	jmp	(%a0)		|go to the routine

p_write:
	movel	#0x0c,%d0 	|get byte count
	movel	EXC_EA(%a6),%a1	|get the destination address
	bsr 	mem_write	|write the user's destination
	moveb	#0,CU_SAVEPC(%a6) |set the cu save pc to all 0's

|
| Also note that the dtag must be set to norm here - this is because 
| the 040 uses the dtag to execute the correct microcode.
|
        bfclr    DTAG(%a6){#0:#3}  |set dtag to norm

	rts

| Notes on handling of special case (zero, inf, and nan) inputs:
|	1. Operr is not signalled if the k-factor is greater than 18.
|	2. Per the manual, status bits are not set.
|

p_move:
	movew	CMDREG1B(%a6),%d0
	btstl	#kfact_bit,%d0	|test for dynamic k-factor
	beqs	statick		|if clear, k-factor is static
dynamick:
	bfextu	%d0{#25:#3},%d0	|isolate register for dynamic k-factor
	lea	p_regd,%a0
	movel	%a0@(%d0:l:4),%a0
	jmp	(%a0)
statick:
	andiw	#0x007f,%d0	|get k-factor
	bfexts	%d0{#25:#7},%d0	|sign extend d0 for bindec
	leal	ETEMP(%a6),%a0	|a0 will point to the packed decimal
	bsrl	bindec		|perform the convert; data at a6
	leal	FP_SCR1(%a6),%a0	|load a0 with result address
	bral	p_write
p_movez:
	leal	ETEMP(%a6),%a0	|a0 will point to the packed decimal
	clrw	2(%a0)		|clear lower word of exp
	clrl	4(%a0)		|load second lword of ZERO
	clrl	8(%a0)		|load third lword of ZERO
	bra	p_write		|go write results
p_movei:
	fmovel	#0,%FPSR		|clear aiop
	leal	ETEMP(%a6),%a0	|a0 will point to the packed decimal
	clrw	2(%a0)		|clear lower word of exp
	bra	p_write		|go write the result
p_moven:
	leal	ETEMP(%a6),%a0	|a0 will point to the packed decimal
	clrw	2(%a0)		|clear lower word of exp
	bra	p_write		|go write the result

|
| Routines to read the dynamic k-factor from Dn.
|
p_dyd0:
	movel	USER_D0(%a6),%d0
	bras	statick
p_dyd1:
	movel	USER_D1(%a6),%d0
	bras	statick
p_dyd2:
	movel	%d2,%d0
	bras	statick
p_dyd3:
	movel	%d3,%d0
	bras	statick
p_dyd4:
	movel	%d4,%d0
	bras	statick
p_dyd5:
	movel	%d5,%d0
	bras	statick
p_dyd6:
	movel	%d6,%d0
	bra	statick
p_dyd7:
	movel	%d7,%d0
	bra	statick

	|end
|
|	round.sa 3.4 7/29/91
|
|	handle rounding and normalization tasks
|
|
|
|		Copyright (C) Motorola, Inc. 1990
|			All Rights Reserved
|
|	THIS IS UNPUBLISHED PROPRIETARY SOURCE CODE OF MOTOROLA 
|	The copyright notice above does not evidence any  
|	actual or intended publication of such source code.

|ROUND	idnt    2,1 | Motorola 040 Floating Point Software Package

	|section	8

	.include "fpsp.h"

|
|	round --- round result according to precision/mode
|
|	a0 points to the input operand in the internal extended format 
|	d1(high word) contains rounding precision:
|		ext = $0000xxxx
|		sgl = $0001xxxx
|		dbl = $0002xxxx
|	d1(low word) contains rounding mode:
|		RN  = $xxxx0000
|		RZ  = $xxxx0001
|		RM  = $xxxx0010
|		RP  = $xxxx0011
|	d0{31:29} contains the g,r,s bits (extended)
|
|	On return the value pointed to by a0 is correctly rounded,
|	a0 is preserved and the g-r-s bits in d0 are cleared.
|	The result is not typed - the tag field is invalid.  The
|	result is still in the internal extended format.
|
|	The INEX bit of USER_FPSR will be set if the rounded result was
|	inexact (i.e. if any of the g-r-s bits were set).
|

	.global	round
round:
| If g=r=s=0 then result is exact and round is done, else set 
| the inex flag in status reg and continue.  
|
	bsrs	ext_grs			|this subroutine looks at the 
|					:rounding precision and sets 
|					;the appropriate g-r-s bits.
	tstl	%d0			|if grs are zero, go force
	bne	rnd_cont		|lower bits to zero for size
	
	swap	%d1			|set up d1.w for round prec.
	bra	truncate

rnd_cont:
|
| Use rounding mode as an index into a jump table for these modes.
|
	orl	#inx2a_mask,USER_FPSR(%a6) |set inex2/ainex
	lea	mode_tab,%a1
	movel	(%a1,%d1.w*4),%a1
	jmp	(%a1)
|
| Jump table indexed by rounding mode in d1.w.  All following assumes
| grs != 0.
|
mode_tab:
	.long	rnd_near
	.long	rnd_zero
	.long	rnd_mnus
	.long	rnd_plus
|
|	ROUND PLUS INFINITY
|
|	If sign of fp number = 0 (positive), then add 1 to l.
|
rnd_plus:
	swap 	%d1			|set up d1 for round prec.
	tstb	LOCAL_SGN(%a0)		|check for sign
	bmi	truncate		|if positive then truncate
	movel	#0xffffffff,%d0		|force g,r,s to be all f's
	lea	add_to_l,%a1
	movel	(%a1,%d1.w*4),%a1
	jmp	(%a1)
|
|	ROUND MINUS INFINITY
|
|	If sign of fp number = 1 (negative), then add 1 to l.
|
rnd_mnus:
	swap 	%d1			|set up d1 for round prec.
	tstb	LOCAL_SGN(%a0)		|check for sign	
	bpl	truncate		|if negative then truncate
	movel	#0xffffffff,%d0		|force g,r,s to be all f's
	lea	add_to_l,%a1
	movel	(%a1,%d1.w*4),%a1
	jmp	(%a1)
|
|	ROUND ZERO
|
|	Always truncate.
rnd_zero:
	swap 	%d1			|set up d1 for round prec.
	bra	truncate
|
|
|	ROUND NEAREST
|
|	If (g=1), then add 1 to l and if (r=s=0), then clear l
|	Note that this will round to even in case of a tie.
|
rnd_near:
	swap 	%d1			|set up d1 for round prec.
	asll	#1,%d0			|shift g-bit to c-bit
	bcc	truncate		|if (g=1) then
	lea	add_to_l,%a1
	movel	(%a1,%d1.w*4),%a1
	jmp	(%a1)

|
|	ext_grs --- extract guard, round and sticky bits
|
| Input:	d1 =		PREC:ROUND
| Output:  	d0{31:29}=	guard, round, sticky
|
| The ext_grs extract the guard/round/sticky bits according to the
| selected rounding precision. It is called by the round subroutine
| only.  All registers except d0 are kept intact. d0 becomes an 
| updated guard,round,sticky in d0{31:29}
|
| Notes: the ext_grs uses the round PREC, and therefore has to swap d1
|	 prior to usage, and needs to restore d1 to original.
|
ext_grs:
	swap	%d1			|have d1.w point to round precision
	cmpiw	#0,%d1
	bnes	sgl_or_dbl
	bras	end_ext_grs
 
sgl_or_dbl:
	moveml	%d2/%d3,-(%a7)		|make some temp registers
	cmpiw	#1,%d1
	bnes	grs_dbl
grs_sgl:
	bfextu	LOCAL_HI(%a0){#24:#2},%d3	|sgl prec. g-r are 2 bits right
	movel	#30,%d2			|of the sgl prec. limits
	lsll	%d2,%d3			|shift g-r bits to MSB of d3
	movel	LOCAL_HI(%a0),%d2		|get word 2 for s-bit test
	andil	#0x0000003f,%d2		|s bit is the or of all other 
	bnes	st_stky			|bits to the right of g-r
	tstl	LOCAL_LO(%a0)		|test lower mantissa
	bnes	st_stky			|if any are set, set sticky
	tstl	%d0			|test original g,r,s
	bnes	st_stky			|if any are set, set sticky
	bras	end_sd			|if words 3 and 4 are clr, exit
grs_dbl:    
	bfextu	LOCAL_LO(%a0){#21:#2},%d3	|dbl-prec. g-r are 2 bits right
	movel	#30,%d2			|of the dbl prec. limits
	lsll	%d2,%d3			|shift g-r bits to the MSB of d3
	movel	LOCAL_LO(%a0),%d2		|get lower mantissa  for s-bit test
	andil	#0x000001ff,%d2		|s bit is the or-ing of all 
	bnes	st_stky			|other bits to the right of g-r
	tstl	%d0			|test word original g,r,s
	bnes	st_stky			|if any are set, set sticky
	bras	end_sd			|if clear, exit
st_stky:
	bset	#rnd_stky_bit,%d3
end_sd:
	movel	%d3,%d0			|return grs to d0
	moveml	(%a7)+,%d2/%d3		|restore scratch registers
end_ext_grs:
	swap	%d1			|restore d1 to original
	rts

|*******************  Local Equates
	.set	ad_1_sgl,0x00000100	|  constant to add 1 to l-bit in sgl prec
	.set	ad_1_dbl,0x00000800	|  constant to add 1 to l-bit in dbl prec


|Jump table for adding 1 to the l-bit indexed by rnd prec

add_to_l:
	.long	add_ext
	.long	add_sgl
	.long	add_dbl
	.long	add_dbl
|
|	ADD SINGLE
|
add_sgl:
	addl	#ad_1_sgl,LOCAL_HI(%a0)
	bccs	scc_clr			|no mantissa overflow
	roxrw  LOCAL_HI(%a0)		|shift v-bit back in
	roxrw  LOCAL_HI+2(%a0)		|shift v-bit back in
	addw	#0x1,LOCAL_EX(%a0)	|and incr exponent
scc_clr:
	tstl	%d0			|test for rs = 0
	bnes	sgl_done
	andiw  #0xfe00,LOCAL_HI+2(%a0)	|clear the l-bit
sgl_done:
	andil	#0xffffff00,LOCAL_HI(%a0) |truncate bits beyond sgl limit
	clrl	LOCAL_LO(%a0)		|clear d2
	rts

|
|	ADD EXTENDED
|
add_ext:
	addql  #1,LOCAL_LO(%a0)		|add 1 to l-bit
	bccs	xcc_clr			|test for carry out
	addql  #1,LOCAL_HI(%a0)		|propagate carry
	bccs	xcc_clr
	roxrw  LOCAL_HI(%a0)		|mant is 0 so restore v-bit
	roxrw  LOCAL_HI+2(%a0)		|mant is 0 so restore v-bit
	roxrw	LOCAL_LO(%a0)
	roxrw	LOCAL_LO+2(%a0)
	addw	#0x1,LOCAL_EX(%a0)	|and inc exp
xcc_clr:
	tstl	%d0			|test rs = 0
	bnes	add_ext_done
	andib	#0xfe,LOCAL_LO+3(%a0)	|clear the l bit
add_ext_done:
	rts
|
|	ADD DOUBLE
|
add_dbl:
	addl	#ad_1_dbl,LOCAL_LO(%a0)
	bccs	dcc_clr
	addql	#1,LOCAL_HI(%a0)		|propagate carry
	bccs	dcc_clr
	roxrw	LOCAL_HI(%a0)		|mant is 0 so restore v-bit
	roxrw	LOCAL_HI+2(%a0)		|mant is 0 so restore v-bit
	roxrw	LOCAL_LO(%a0)
	roxrw	LOCAL_LO+2(%a0)
	addw	#0x1,LOCAL_EX(%a0)	|incr exponent
dcc_clr:
	tstl	%d0			|test for rs = 0
	bnes	dbl_done
	andiw	#0xf000,LOCAL_LO+2(%a0)	|clear the l-bit

dbl_done:
	andil	#0xfffff800,LOCAL_LO(%a0) |truncate bits beyond dbl limit
	rts

error:
	rts
|
| Truncate all other bits
|
trunct:
	.long	end_rnd
	.long	sgl_done
	.long	dbl_done
	.long	dbl_done

truncate:
	lea	trunct,%a1
	movel	(%a1,%d1.w*4),%a1
	jmp	(%a1)

end_rnd:
	rts

|
|	NORMALIZE
|
| These routines (nrm_zero & nrm_set) normalize the unnorm.  This 
| is done by shifting the mantissa left while decrementing the 
| exponent.
|
| NRM_SET shifts and decrements until there is a 1 set in the integer 
| bit of the mantissa (msb in d1).
|
| NRM_ZERO shifts and decrements until there is a 1 set in the integer 
| bit of the mantissa (msb in d1) unless this would mean the exponent 
| would go less than 0.  In that case the number becomes a denorm - the 
| exponent (d0) is set to 0 and the mantissa (d1 & d2) is not 
| normalized.
|
| Note that both routines have been optimized (for the worst case) and 
| therefore do not have the easy to follow decrement/shift loop.
|
|	NRM_ZERO
|
|	Distance to first 1 bit in mantissa = X
|	Distance to 0 from exponent = Y
|	If X < Y
|	Then
|	  nrm_set
|	Else
|	  shift mantissa by Y
|	  set exponent = 0
|
|input:
|	FP_SCR1 = exponent, ms mantissa part, ls mantissa part
|output:
|	L_SCR1{4} = fpte15 or ete15 bit
|
	.global	nrm_zero
nrm_zero:
	movew	LOCAL_EX(%a0),%d0
	cmpw   #64,%d0          |see if exp > 64 
	bmis	d0_less
	bsr	nrm_set		|exp > 64 so exp won't exceed 0 
	rts
d0_less:
	moveml	%d2/%d3/%d5/%d6,-(%a7)
	movel	LOCAL_HI(%a0),%d1
	movel	LOCAL_LO(%a0),%d2

	bfffo	%d1{#0:#32},%d3	|get the distance to the first 1 
|				;in ms mant
	beqs	ms_clr		|branch if no bits were set
	cmpw	%d3,%d0		|of X>Y
	bmis	greater		|then exp will go past 0 (neg) if 
|				;it is just shifted
	bsr	nrm_set		|else exp won't go past 0
	moveml	(%a7)+,%d2/%d3/%d5/%d6
	rts	
greater:
	movel	%d2,%d6		|save ls mant in d6
	lsll	%d0,%d2		|shift ls mant by count
	lsll	%d0,%d1		|shift ms mant by count
	movel	#32,%d5
	subl	%d0,%d5		|make op a denorm by shifting bits 
	lsrl	%d5,%d6		|by the number in the exp, then 
|				;set exp = 0.
	orl	%d6,%d1		|shift the ls mant bits into the ms mant
	movel	#0,%d0		|same as if decremented exp to 0 
|				;while shifting
	movew	%d0,LOCAL_EX(%a0)
	movel	%d1,LOCAL_HI(%a0)
	movel	%d2,LOCAL_LO(%a0)
	moveml	(%a7)+,%d2/%d3/%d5/%d6
	rts
ms_clr:
	bfffo	%d2{#0:#32},%d3	|check if any bits set in ls mant
	beqs	all_clr		|branch if none set
	addw	#32,%d3
	cmpw	%d3,%d0		|if X>Y
	bmis	greater		|then branch
	bsr	nrm_set		|else exp won't go past 0
	moveml	(%a7)+,%d2/%d3/%d5/%d6
	rts
all_clr:
	movew	#0,LOCAL_EX(%a0)	|no mantissa bits set. Set exp = 0.
	moveml	(%a7)+,%d2/%d3/%d5/%d6
	rts
|
|	NRM_SET
|
	.global	nrm_set
nrm_set:
	movel	%d7,-(%a7)
	bfffo	LOCAL_HI(%a0){#0:#32},%d7 |find first 1 in ms mant to d7)
	beqs	lower		|branch if ms mant is all 0's

	movel	%d6,-(%a7)

	subw	%d7,LOCAL_EX(%a0)	|sub exponent by count
	movel	LOCAL_HI(%a0),%d0	|d0 has ms mant
	movel	LOCAL_LO(%a0),%d1 |d1 has ls mant

	lsll	%d7,%d0		|shift first 1 to j bit position
	movel	%d1,%d6		|copy ls mant into d6
	lsll	%d7,%d6		|shift ls mant by count
	movel	%d6,LOCAL_LO(%a0)	|store ls mant into memory
	moveql	#32,%d6
	subl	%d7,%d6		|continue shift
	lsrl	%d6,%d1		|shift off all bits but those that will
|				;be shifted into ms mant
	orl	%d1,%d0		|shift the ls mant bits into the ms mant
	movel	%d0,LOCAL_HI(%a0)	|store ms mant into memory
	moveml	(%a7)+,%d7/%d6	|restore registers
	rts

|
| We get here if ms mant was = 0, and we assume ls mant has bits 
| set (otherwise this would have been tagged a zero not a denorm).
|
lower:
	movew	LOCAL_EX(%a0),%d0	|d0 has exponent
	movel	LOCAL_LO(%a0),%d1	|d1 has ls mant
	subw	#32,%d0		|account for ms mant being all zeros
	bfffo	%d1{#0:#32},%d7	|find first 1 in ls mant to d7)
	subw	%d7,%d0		|subtract shift count from exp
	lsll	%d7,%d1		|shift first 1 to integer bit in ms mant
	movew	%d0,LOCAL_EX(%a0)	|store ms mant
	movel	%d1,LOCAL_HI(%a0)	|store exp
	clrl	LOCAL_LO(%a0)	|clear ls mant
	movel	(%a7)+,%d7
	rts
|
|	denorm --- denormalize an intermediate result
|
|	Used by underflow.
|
| Input: 
|	a0	 points to the operand to be denormalized
|		 (in the internal extended format)
|		 
|	d0: 	 rounding precision
| Output:
|	a0	 points to the denormalized result
|		 (in the internal extended format)
|
|	d0 	is guard,round,sticky
|
| d0 comes into this routine with the rounding precision. It 
| is then loaded with the denormalized exponent threshold for the 
| rounding precision.
|

	.global	denorm
denorm:
	btstb	#6,LOCAL_EX(%a0)	|check for exponents between $7fff-$4000
	beqs	no_sgn_ext	
	bsetb	#7,LOCAL_EX(%a0)	|sign extend if it is so
no_sgn_ext:

	cmpib	#0,%d0		|if 0 then extended precision
	bnes	not_ext		|else branch

	clrl	%d1		|load d1 with ext threshold
	clrl	%d0		|clear the sticky flag
	bsr	dnrm_lp		|denormalize the number
	tstb	%d1		|check for inex
	beq	no_inex		|if clr, no inex
	bras	dnrm_inex	|if set, set inex

not_ext:
	cmpil	#1,%d0		|if 1 then single precision
	beqs	load_sgl	|else must be 2, double prec

load_dbl:
	movew	#dbl_thresh,%d1	|put copy of threshold in d1
	movel	%d1,%d0		|copy d1 into d0
	subw	LOCAL_EX(%a0),%d0	|diff = threshold - exp
	cmpw	#67,%d0		|if diff > 67 (mant + grs bits)
	bpls	chk_stky	|then branch (all bits would be 
|				; shifted off in denorm routine)
	clrl	%d0		|else clear the sticky flag
	bsr	dnrm_lp		|denormalize the number
	tstb	%d1		|check flag
	beqs	no_inex		|if clr, no inex
	bras	dnrm_inex	|if set, set inex

load_sgl:
	movew	#sgl_thresh,%d1	|put copy of threshold in d1
	movel	%d1,%d0		|copy d1 into d0
	subw	LOCAL_EX(%a0),%d0	|diff = threshold - exp
	cmpw	#67,%d0		|if diff > 67 (mant + grs bits)
	bpls	chk_stky	|then branch (all bits would be 
|				; shifted off in denorm routine)
	clrl	%d0		|else clear the sticky flag
	bsr	dnrm_lp		|denormalize the number
	tstb	%d1		|check flag
	beqs	no_inex		|if clr, no inex
	bras	dnrm_inex	|if set, set inex

chk_stky:
	tstl	LOCAL_HI(%a0)	|check for any bits set
	bnes	set_stky
	tstl	LOCAL_LO(%a0)	|check for any bits set
	bnes	set_stky
	bras	clr_mant
set_stky:
	orl	#inx2a_mask,USER_FPSR(%a6) |set inex2/ainex
	movel	#0x20000000,%d0	|set sticky bit in return value
clr_mant:
	movew	%d1,LOCAL_EX(%a0)		|load exp with threshold
	movel	#0,LOCAL_HI(%a0) 	|set d1 = 0 (ms mantissa)
	movel	#0,LOCAL_LO(%a0)		|set d2 = 0 (ms mantissa)
	rts
dnrm_inex:
	orl	#inx2a_mask,USER_FPSR(%a6) |set inex2/ainex
no_inex:
	rts

|
|	dnrm_lp --- normalize exponent/mantissa to specified threshold
|
| Input:
|	a0		points to the operand to be denormalized
|	d0{31:29} 	initial guard,round,sticky
|	d1{15:0}	denormalization threshold
| Output:
|	a0		points to the denormalized operand
|	d0{31:29}	final guard,round,sticky
|	d1.b		inexact flag:  all ones means inexact result
|
| The LOCAL_LO and LOCAL_GRS parts of the value are copied to FP_SCR2
| so that bfext can be used to extract the new low part of the mantissa.
| Dnrm_lp can be called with a0 pointing to ETEMP or WBTEMP and there 
| is no LOCAL_GRS scratch word following it on the fsave frame.
|
	.global	dnrm_lp
dnrm_lp:
	movel	%d2,-(%sp)		|save d2 for temp use
	btstb	#E3,E_BYTE(%a6)		|test for type E3 exception
	beqs	not_E3			|not type E3 exception
	bfextu	WBTEMP_GRS(%a6){#6:#3},%d2	|extract guard,round, sticky  bit
	movel	#29,%d0
	lsll	%d0,%d2			|shift g,r,s to their positions
	movel	%d2,%d0
not_E3:
	movel	(%sp)+,%d2		|restore d2
	movel	LOCAL_LO(%a0),FP_SCR2+LOCAL_LO(%a6)
	movel	%d0,FP_SCR2+LOCAL_GRS(%a6)
	movel	%d1,%d0			|copy the denorm threshold
	subw	LOCAL_EX(%a0),%d1		|d1 = threshold - uns exponent
	bles	no_lp			|d1 <= 0
	cmpw	#32,%d1			
	blts	case_1			|0 = d1 < 32 
	cmpw	#64,%d1
	blts	case_2			|32 <= d1 < 64
	bra	case_3			|d1 >= 64
|
| No normalization necessary
|
no_lp:
	clrb	%d1			|set no inex2 reported
	movel	FP_SCR2+LOCAL_GRS(%a6),%d0	|restore original g,r,s
	rts
|
| case (0<d1<32)
|
case_1:
	movel	%d2,-(%sp)
	movew	%d0,LOCAL_EX(%a0)		|exponent = denorm threshold
	movel	#32,%d0
	subw	%d1,%d0			|d0 = 32 - d1
	bfextu	LOCAL_EX(%a0){%d0:#32},%d2
	bfextu	%d2{%d1:%d0},%d2		|d2 = new LOCAL_HI
	bfextu	LOCAL_HI(%a0){%d0:#32},%d1	|d1 = new LOCAL_LO
	bfextu	FP_SCR2+LOCAL_LO(%a6){%d0:#32},%d0	|d0 = new G,R,S
	movel	%d2,LOCAL_HI(%a0)		|store new LOCAL_HI
	movel	%d1,LOCAL_LO(%a0)		|store new LOCAL_LO
	clrb	%d1
	bftst	%d0{#2:#30}	
	beqs	c1nstky
	bsetl	#rnd_stky_bit,%d0
	st	%d1
c1nstky:
	movel	FP_SCR2+LOCAL_GRS(%a6),%d2	|restore original g,r,s
	andil	#0xe0000000,%d2		|clear all but G,R,S
	tstl	%d2			|test if original G,R,S are clear
	beqs	grs_clear
	orl	#0x20000000,%d0		|set sticky bit in d0
grs_clear:
	andil	#0xe0000000,%d0		|clear all but G,R,S
	movel	(%sp)+,%d2
	rts
|
| case (32<=d1<64)
|
case_2:
	movel	%d2,-(%sp)
	movew	%d0,LOCAL_EX(%a0)		|unsigned exponent = threshold
	subw	#32,%d1			|d1 now between 0 and 32
	movel	#32,%d0
	subw	%d1,%d0			|d0 = 32 - d1
	bfextu	LOCAL_EX(%a0){%d0:#32},%d2
	bfextu	%d2{%d1:%d0},%d2		|d2 = new LOCAL_LO
	bfextu	LOCAL_HI(%a0){%d0:#32},%d1	|d1 = new G,R,S
	bftst	%d1{#2:#30}
	bnes	c2_sstky		|bra if sticky bit to be set
	bftst	FP_SCR2+LOCAL_LO(%a6){%d0:#32}
	bnes	c2_sstky		|bra if sticky bit to be set
	movel	%d1,%d0
	clrb	%d1
	bras	end_c2
c2_sstky:
	movel	%d1,%d0
	bsetl	#rnd_stky_bit,%d0
	st	%d1
end_c2:
	clrl	LOCAL_HI(%a0)		|store LOCAL_HI = 0
	movel	%d2,LOCAL_LO(%a0)		|store LOCAL_LO
	movel	FP_SCR2+LOCAL_GRS(%a6),%d2	|restore original g,r,s
	andil	#0xe0000000,%d2		|clear all but G,R,S
	tstl	%d2			|test if original G,R,S are clear
	beqs	clear_grs		
	orl	#0x20000000,%d0		|set sticky bit in d0
clear_grs:
	andil	#0xe0000000,%d0		|get rid of all but G,R,S
	movel	(%sp)+,%d2
	rts
|
| d1 >= 64 Force the exponent to be the denorm threshold with the
| correct sign.
|
case_3:
	movew	%d0,LOCAL_EX(%a0)
	tstw	LOCAL_SGN(%a0)
	bges	c3con
c3neg:
	orl	#0x80000000,LOCAL_EX(%a0)
c3con:
	cmpw	#64,%d1
	beqs	sixty_four
	cmpw	#65,%d1
	beqs	sixty_five
|
| Shift value is out of range.  Set d1 for inex2 flag and
| return a zero with the given threshold.
|
	clrl	LOCAL_HI(%a0)
	clrl	LOCAL_LO(%a0)
	movel	#0x20000000,%d0
	st	%d1
	rts

sixty_four:
	movel	LOCAL_HI(%a0),%d0
	bfextu	%d0{#2:#30},%d1
	andil	#0xc0000000,%d0
	bras	c3com
	
sixty_five:
	movel	LOCAL_HI(%a0),%d0
	bfextu	%d0{#1:#31},%d1
	andil	#0x80000000,%d0
	lsrl	#1,%d0			|shift high bit into R bit

c3com:
	tstl	%d1
	bnes	c3ssticky
	tstl	LOCAL_LO(%a0)
	bnes	c3ssticky
	tstb	FP_SCR2+LOCAL_GRS(%a6)
	bnes	c3ssticky
	clrb	%d1
	bras	c3end

c3ssticky:
	bsetl	#rnd_stky_bit,%d0
	st	%d1
c3end:
	clrl	LOCAL_HI(%a0)
	clrl	LOCAL_LO(%a0)
	rts

	|end
|
|	sacos.sa 3.3 12/19/90
|
|	Description: The entry point sAcos computes the inverse cosine of
|		an input argument; sAcosd does the same except for denormalized
|		input.
|
|	Input: Double-extended number X in location pointed to
|		by address register a0.
|
|	Output: The value arccos(X) returned in floating-point register Fp0.
|
|	Accuracy and Monotonicity: The returned result is within 3 ulps in
|		64 significant bit, i.e. within 0.5001 ulp to 53 bits if the
|		result is subsequently rounded to double precision. The 
|		result is provably monotonic in double precision.
|
|	Speed: The program sCOS takes approximately 310 cycles.
|
|	Algorithm:
|
|	ACOS
|	1. If |X| >= 1, go to 3.
|
|	2. (|X| < 1) Calculate acos(X) by
|		z := (1-X) / (1+X)
|		acos(X) = 2 * atan( sqrt(z) ).
|		Exit.
|
|	3. If |X| > 1, go to 5.
|
|	4. (|X| = 1) If X > 0, return 0. Otherwise, return Pi. Exit.
|
|	5. (|X| > 1) Generate an invalid operation by 0 * infinity.
|		Exit.
|

|		Copyright (C) Motorola, Inc. 1990
|			All Rights Reserved
|
|	THIS IS UNPUBLISHED PROPRIETARY SOURCE CODE OF MOTOROLA 
|	The copyright notice above does not evidence any  
|	actual or intended publication of such source code.

|SACOS	idnt	2,1 | Motorola 040 Floating Point Software Package

	|section	8

PI:	.long 0x40000000,0xC90FDAA2,0x2168C235,0x00000000
PIBY2:	.long 0x3FFF0000,0xC90FDAA2,0x2168C235,0x00000000

	|xref	t_operr
	|xref	t_frcinx
	|xref	satan

	.global	sacosd
sacosd:
|--ACOS(X) = PI/2 FOR DENORMALIZED X
	fmovel		%d1,%fpcr		| ...load user's rounding mode/precision
	fmovex		PIBY2,%fp0
	bra		t_frcinx

	.global	sacos
sacos:
	fmovex		(%a0),%fp0	| ...LOAD INPUT

	movel		(%a0),%d0		| ...pack exponent with upper 16 fraction
	movew		4(%a0),%d0
	andil		#0x7FFFFFFF,%d0
	cmpil		#0x3FFF8000,%d0
	bges		ACOSBIG

|--THIS IS THE USUAL CASE, |X| < 1
|--ACOS(X) = 2 * ATAN(	SQRT( (1-X)/(1+X) )	)

	fmoves		#0x3F800000,%fp1
	faddx		%fp0,%fp1	 	| ...1+X
	fnegx		%fp0	 	| ... -X
	fadds		#0x3F800000,%fp0	| ...1-X
	fdivx		%fp1,%fp0	 	| ...(1-X)/(1+X)
	fsqrtx		%fp0		| ...SQRT((1-X)/(1+X))
	fmovemx	%fp0-%fp0,(%a0)	| ...overwrite input
	movel		%d1,-(%sp)	|save original users fpcr
	clrl		%d1
	bsr		satan		| ...ATAN(SQRT([1-X]/[1+X]))
	fmovel		(%sp)+,%fpcr	|restore users exceptions
	faddx		%fp0,%fp0	 	| ...2 * ATAN( STUFF )
	bra		t_frcinx

ACOSBIG:
	fabsx		%fp0
	fcmps		#0x3F800000,%fp0
	fbgt		t_operr		|cause an operr exception

|--|X| = 1, ACOS(X) = 0 OR PI
	movel		(%a0),%d0		| ...pack exponent with upper 16 fraction
	movew		4(%a0),%d0
	cmpl		#0,%d0		|D0 has original exponent+fraction
	bgts		ACOSP1

|--X = -1
|Returns PI and inexact exception
	fmovex		PI,%fp0
	fmovel		%d1,%FPCR
	fadds		#0x00800000,%fp0	|cause an inexact exception to be put
|					;into the 040 - will not trap until next
|					;fp inst.
	bra		t_frcinx

ACOSP1:
	fmovel		%d1,%FPCR
	fmoves		#0x00000000,%fp0
	rts				|Facos ; of +1 is exact	

	|end
|
|	sasin.sa 3.3 12/19/90
|
|	Description: The entry point sAsin computes the inverse sine of
|		an input argument; sAsind does the same except for denormalized
|		input.
|
|	Input: Double-extended number X in location pointed to
|		by address register a0.
|
|	Output: The value arcsin(X) returned in floating-point register Fp0.
|
|	Accuracy and Monotonicity: The returned result is within 3 ulps in
|		64 significant bit, i.e. within 0.5001 ulp to 53 bits if the
|		result is subsequently rounded to double precision. The 
|		result is provably monotonic in double precision.
|
|	Speed: The program sASIN takes approximately 310 cycles.
|
|	Algorithm:
|
|	ASIN
|	1. If |X| >= 1, go to 3.
|
|	2. (|X| < 1) Calculate asin(X) by
|		z := sqrt( [1-X][1+X] )
|		asin(X) = atan( x / z ).
|		Exit.
|
|	3. If |X| > 1, go to 5.
|
|	4. (|X| = 1) sgn := sign(X), return asin(X) := sgn * Pi/2. Exit.
|
|	5. (|X| > 1) Generate an invalid operation by 0 * infinity.
|		Exit.
|

|		Copyright (C) Motorola, Inc. 1990
|			All Rights Reserved
|
|	THIS IS UNPUBLISHED PROPRIETARY SOURCE CODE OF MOTOROLA 
|	The copyright notice above does not evidence any  
|	actual or intended publication of such source code.

|SASIN	idnt	2,1 | Motorola 040 Floating Point Software Package

	|section	8

PIBY2:	.long 0x3FFF0000,0xC90FDAA2,0x2168C235,0x00000000

	|xref	t_operr
	|xref	t_frcinx
	|xref	t_extdnrm
	|xref	satan

	.global	sasind
sasind:
|--ASIN(X) = X FOR DENORMALIZED X

	bra		t_extdnrm

	.global	sasin
sasin:
	fmovex		(%a0),%fp0	| ...LOAD INPUT

	movel		(%a0),%d0
	movew		4(%a0),%d0
	andil		#0x7FFFFFFF,%d0
	cmpil		#0x3FFF8000,%d0
	bges		asinbig

|--THIS IS THE USUAL CASE, |X| < 1
|--ASIN(X) = ATAN( X / SQRT( (1-X)(1+X) ) )

	fmoves		#0x3F800000,%fp1
	fsubx		%fp0,%fp1		| ...1-X
	fmovemx	%fp2-%fp2,-(%a7)
	fmoves		#0x3F800000,%fp2
	faddx		%fp0,%fp2		| ...1+X
	fmulx		%fp2,%fp1		| ...(1+X)(1-X)
	fmovemx	(%a7)+,%fp2-%fp2
	fsqrtx		%fp1		| ...SQRT([1-X][1+X])
	fdivx		%fp1,%fp0	 	| ...X/SQRT([1-X][1+X])
	fmovemx	%fp0-%fp0,(%a0)
	bsr		satan
	bra		t_frcinx

asinbig:
	fabsx		%fp0	 | ...|X|
	fcmps		#0x3F800000,%fp0
	fbgt		t_operr		|cause an operr exception

|--|X| = 1, ASIN(X) = +- PI/2.

	fmovex		PIBY2,%fp0
	movel		(%a0),%d0
	andil		#0x80000000,%d0	| ...SIGN BIT OF X
	oril		#0x3F800000,%d0	| ...+-1 IN SGL FORMAT
	movel		%d0,-(%sp)	| ...push SIGN(X) IN SGL-FMT
	fmovel		%d1,%FPCR		
	fmuls		(%sp)+,%fp0
	bra		t_frcinx

	|end
|
|	satan.sa 3.3 12/19/90
|
|	The entry point satan computes the arctangent of an
|	input value. satand does the same except the input value is a
|	denormalized number.
|
|	Input: Double-extended value in memory location pointed to by address
|		register a0.
|
|	Output:	Arctan(X) returned in floating-point register Fp0.
|
|	Accuracy and Monotonicity: The returned result is within 2 ulps in
|		64 significant bit, i.e. within 0.5001 ulp to 53 bits if the
|		result is subsequently rounded to double precision. The
|		result is provably monotonic in double precision.
|
|	Speed: The program satan takes approximately 160 cycles for input
|		argument X such that 1/16 < |X| < 16. For the other arguments,
|		the program will run no worse than 10% slower.
|
|	Algorithm:
|	Step 1. If |X| >= 16 or |X| < 1/16, go to Step 5.
|
|	Step 2. Let X = sgn * 2**k * 1.xxxxxxxx...x. Note that k = -4, -3,..., or 3.
|		Define F = sgn * 2**k * 1.xxxx1, i.e. the first 5 significant bits
|		of X with a bit-1 attached at the 6-th bit position. Define u
|		to be u = (X-F) / (1 + X*F).
|
|	Step 3. Approximate arctan(u) by a polynomial poly.
|
|	Step 4. Return arctan(F) + poly, arctan(F) is fetched from a table of values
|		calculated beforehand. Exit.
|
|	Step 5. If |X| >= 16, go to Step 7.
|
|	Step 6. Approximate arctan(X) by an odd polynomial in X. Exit.
|
|	Step 7. Define X' = -1/X. Approximate arctan(X') by an odd polynomial in X'.
|		Arctan(X) = sign(X)*Pi/2 + arctan(X'). Exit.
|

|		Copyright (C) Motorola, Inc. 1990
|			All Rights Reserved
|
|	THIS IS UNPUBLISHED PROPRIETARY SOURCE CODE OF MOTOROLA 
|	The copyright notice above does not evidence any  
|	actual or intended publication of such source code.

|satan	idnt	2,1 | Motorola 040 Floating Point Software Package

	|section	8

	.include "fpsp.h"
	
BOUNDS1:	.long 0x3FFB8000,0x4002FFFF

ONE:	.long 0x3F800000

	.long 0x00000000

ATANA3:	.long 0xBFF6687E,0x314987D8
ATANA2:	.long 0x4002AC69,0x34A26DB3

ATANA1:	.long 0xBFC2476F,0x4E1DA28E
ATANB6:	.long 0x3FB34444,0x7F876989

ATANB5:	.long 0xBFB744EE,0x7FAF45DB
ATANB4:	.long 0x3FBC71C6,0x46940220

ATANB3:	.long 0xBFC24924,0x921872F9
ATANB2:	.long 0x3FC99999,0x99998FA9

ATANB1:	.long 0xBFD55555,0x55555555
ATANC5:	.long 0xBFB70BF3,0x98539E6A

ATANC4:	.long 0x3FBC7187,0x962D1D7D
ATANC3:	.long 0xBFC24924,0x827107B8

ATANC2:	.long 0x3FC99999,0x9996263E
ATANC1:	.long 0xBFD55555,0x55555536

PPIBY2:	.long 0x3FFF0000,0xC90FDAA2,0x2168C235,0x00000000
NPIBY2:	.long 0xBFFF0000,0xC90FDAA2,0x2168C235,0x00000000
PTINY:	.long 0x00010000,0x80000000,0x00000000,0x00000000
NTINY:	.long 0x80010000,0x80000000,0x00000000,0x00000000

ATANTBL:
	.long	0x3FFB0000,0x83D152C5,0x060B7A51,0x00000000
	.long	0x3FFB0000,0x8BC85445,0x65498B8B,0x00000000
	.long	0x3FFB0000,0x93BE4060,0x17626B0D,0x00000000
	.long	0x3FFB0000,0x9BB3078D,0x35AEC202,0x00000000
	.long	0x3FFB0000,0xA3A69A52,0x5DDCE7DE,0x00000000
	.long	0x3FFB0000,0xAB98E943,0x62765619,0x00000000
	.long	0x3FFB0000,0xB389E502,0xF9C59862,0x00000000
	.long	0x3FFB0000,0xBB797E43,0x6B09E6FB,0x00000000
	.long	0x3FFB0000,0xC367A5C7,0x39E5F446,0x00000000
	.long	0x3FFB0000,0xCB544C61,0xCFF7D5C6,0x00000000
	.long	0x3FFB0000,0xD33F62F8,0x2488533E,0x00000000
	.long	0x3FFB0000,0xDB28DA81,0x62404C77,0x00000000
	.long	0x3FFB0000,0xE310A407,0x8AD34F18,0x00000000
	.long	0x3FFB0000,0xEAF6B0A8,0x188EE1EB,0x00000000
	.long	0x3FFB0000,0xF2DAF194,0x9DBE79D5,0x00000000
	.long	0x3FFB0000,0xFABD5813,0x61D47E3E,0x00000000
	.long	0x3FFC0000,0x8346AC21,0x0959ECC4,0x00000000
	.long	0x3FFC0000,0x8B232A08,0x304282D8,0x00000000
	.long	0x3FFC0000,0x92FB70B8,0xD29AE2F9,0x00000000
	.long	0x3FFC0000,0x9ACF476F,0x5CCD1CB4,0x00000000
	.long	0x3FFC0000,0xA29E7630,0x4954F23F,0x00000000
	.long	0x3FFC0000,0xAA68C5D0,0x8AB85230,0x00000000
	.long	0x3FFC0000,0xB22DFFFD,0x9D539F83,0x00000000
	.long	0x3FFC0000,0xB9EDEF45,0x3E900EA5,0x00000000
	.long	0x3FFC0000,0xC1A85F1C,0xC75E3EA5,0x00000000
	.long	0x3FFC0000,0xC95D1BE8,0x28138DE6,0x00000000
	.long	0x3FFC0000,0xD10BF300,0x840D2DE4,0x00000000
	.long	0x3FFC0000,0xD8B4B2BA,0x6BC05E7A,0x00000000
	.long	0x3FFC0000,0xE0572A6B,0xB42335F6,0x00000000
	.long	0x3FFC0000,0xE7F32A70,0xEA9CAA8F,0x00000000
	.long	0x3FFC0000,0xEF888432,0x64ECEFAA,0x00000000
	.long	0x3FFC0000,0xF7170A28,0xECC06666,0x00000000
	.long	0x3FFD0000,0x812FD288,0x332DAD32,0x00000000
	.long	0x3FFD0000,0x88A8D1B1,0x218E4D64,0x00000000
	.long	0x3FFD0000,0x9012AB3F,0x23E4AEE8,0x00000000
	.long	0x3FFD0000,0x976CC3D4,0x11E7F1B9,0x00000000
	.long	0x3FFD0000,0x9EB68949,0x3889A227,0x00000000
	.long	0x3FFD0000,0xA5EF72C3,0x4487361B,0x00000000
	.long	0x3FFD0000,0xAD1700BA,0xF07A7227,0x00000000
	.long	0x3FFD0000,0xB42CBCFA,0xFD37EFB7,0x00000000
	.long	0x3FFD0000,0xBB303A94,0x0BA80F89,0x00000000
	.long	0x3FFD0000,0xC22115C6,0xFCAEBBAF,0x00000000
	.long	0x3FFD0000,0xC8FEF3E6,0x86331221,0x00000000
	.long	0x3FFD0000,0xCFC98330,0xB4000C70,0x00000000
	.long	0x3FFD0000,0xD6807AA1,0x102C5BF9,0x00000000
	.long	0x3FFD0000,0xDD2399BC,0x31252AA3,0x00000000
	.long	0x3FFD0000,0xE3B2A855,0x6B8FC517,0x00000000
	.long	0x3FFD0000,0xEA2D764F,0x64315989,0x00000000
	.long	0x3FFD0000,0xF3BF5BF8,0xBAD1A21D,0x00000000
	.long	0x3FFE0000,0x801CE39E,0x0D205C9A,0x00000000
	.long	0x3FFE0000,0x8630A2DA,0xDA1ED066,0x00000000
	.long	0x3FFE0000,0x8C1AD445,0xF3E09B8C,0x00000000
	.long	0x3FFE0000,0x91DB8F16,0x64F350E2,0x00000000
	.long	0x3FFE0000,0x97731420,0x365E538C,0x00000000
	.long	0x3FFE0000,0x9CE1C8E6,0xA0B8CDBA,0x00000000
	.long	0x3FFE0000,0xA22832DB,0xCADAAE09,0x00000000
	.long	0x3FFE0000,0xA746F2DD,0xB7602294,0x00000000
	.long	0x3FFE0000,0xAC3EC0FB,0x997DD6A2,0x00000000
	.long	0x3FFE0000,0xB110688A,0xEBDC6F6A,0x00000000
	.long	0x3FFE0000,0xB5BCC490,0x59ECC4B0,0x00000000
	.long	0x3FFE0000,0xBA44BC7D,0xD470782F,0x00000000
	.long	0x3FFE0000,0xBEA94144,0xFD049AAC,0x00000000
	.long	0x3FFE0000,0xC2EB4ABB,0x661628B6,0x00000000
	.long	0x3FFE0000,0xC70BD54C,0xE602EE14,0x00000000
	.long	0x3FFE0000,0xCD000549,0xADEC7159,0x00000000
	.long	0x3FFE0000,0xD48457D2,0xD8EA4EA3,0x00000000
	.long	0x3FFE0000,0xDB948DA7,0x12DECE3B,0x00000000
	.long	0x3FFE0000,0xE23855F9,0x69E8096A,0x00000000
	.long	0x3FFE0000,0xE8771129,0xC4353259,0x00000000
	.long	0x3FFE0000,0xEE57C16E,0x0D379C0D,0x00000000
	.long	0x3FFE0000,0xF3E10211,0xA87C3779,0x00000000
	.long	0x3FFE0000,0xF919039D,0x758B8D41,0x00000000
	.long	0x3FFE0000,0xFE058B8F,0x64935FB3,0x00000000
	.long	0x3FFF0000,0x8155FB49,0x7B685D04,0x00000000
	.long	0x3FFF0000,0x83889E35,0x49D108E1,0x00000000
	.long	0x3FFF0000,0x859CFA76,0x511D724B,0x00000000
	.long	0x3FFF0000,0x87952ECF,0xFF8131E7,0x00000000
	.long	0x3FFF0000,0x89732FD1,0x9557641B,0x00000000
	.long	0x3FFF0000,0x8B38CAD1,0x01932A35,0x00000000
	.long	0x3FFF0000,0x8CE7A8D8,0x301EE6B5,0x00000000
	.long	0x3FFF0000,0x8F46A39E,0x2EAE5281,0x00000000
	.long	0x3FFF0000,0x922DA7D7,0x91888487,0x00000000
	.long	0x3FFF0000,0x94D19FCB,0xDEDF5241,0x00000000
	.long	0x3FFF0000,0x973AB944,0x19D2A08B,0x00000000
	.long	0x3FFF0000,0x996FF00E,0x08E10B96,0x00000000
	.long	0x3FFF0000,0x9B773F95,0x12321DA7,0x00000000
	.long	0x3FFF0000,0x9D55CC32,0x0F935624,0x00000000
	.long	0x3FFF0000,0x9F100575,0x006CC571,0x00000000
	.long	0x3FFF0000,0xA0A9C290,0xD97CC06C,0x00000000
	.long	0x3FFF0000,0xA22659EB,0xEBC0630A,0x00000000
	.long	0x3FFF0000,0xA388B4AF,0xF6EF0EC9,0x00000000
	.long	0x3FFF0000,0xA4D35F10,0x61D292C4,0x00000000
	.long	0x3FFF0000,0xA60895DC,0xFBE3187E,0x00000000
	.long	0x3FFF0000,0xA72A51DC,0x7367BEAC,0x00000000
	.long	0x3FFF0000,0xA83A5153,0x0956168F,0x00000000
	.long	0x3FFF0000,0xA93A2007,0x7539546E,0x00000000
	.long	0x3FFF0000,0xAA9E7245,0x023B2605,0x00000000
	.long	0x3FFF0000,0xAC4C84BA,0x6FE4D58F,0x00000000
	.long	0x3FFF0000,0xADCE4A4A,0x606B9712,0x00000000
	.long	0x3FFF0000,0xAF2A2DCD,0x8D263C9C,0x00000000
	.long	0x3FFF0000,0xB0656F81,0xF22265C7,0x00000000
	.long	0x3FFF0000,0xB1846515,0x0F71496A,0x00000000
	.long	0x3FFF0000,0xB28AAA15,0x6F9ADA35,0x00000000
	.long	0x3FFF0000,0xB37B44FF,0x3766B895,0x00000000
	.long	0x3FFF0000,0xB458C3DC,0xE9630433,0x00000000
	.long	0x3FFF0000,0xB525529D,0x562246BD,0x00000000
	.long	0x3FFF0000,0xB5E2CCA9,0x5F9D88CC,0x00000000
	.long	0x3FFF0000,0xB692CADA,0x7ACA1ADA,0x00000000
	.long	0x3FFF0000,0xB736AEA7,0xA6925838,0x00000000
	.long	0x3FFF0000,0xB7CFAB28,0x7E9F7B36,0x00000000
	.long	0x3FFF0000,0xB85ECC66,0xCB219835,0x00000000
	.long	0x3FFF0000,0xB8E4FD5A,0x20A593DA,0x00000000
	.long	0x3FFF0000,0xB99F41F6,0x4AFF9BB5,0x00000000
	.long	0x3FFF0000,0xBA7F1E17,0x842BBE7B,0x00000000
	.long	0x3FFF0000,0xBB471285,0x7637E17D,0x00000000
	.long	0x3FFF0000,0xBBFABE8A,0x4788DF6F,0x00000000
	.long	0x3FFF0000,0xBC9D0FAD,0x2B689D79,0x00000000
	.long	0x3FFF0000,0xBD306A39,0x471ECD86,0x00000000
	.long	0x3FFF0000,0xBDB6C731,0x856AF18A,0x00000000
	.long	0x3FFF0000,0xBE31CAC5,0x02E80D70,0x00000000
	.long	0x3FFF0000,0xBEA2D55C,0xE33194E2,0x00000000
	.long	0x3FFF0000,0xBF0B10B7,0xC03128F0,0x00000000
	.long	0x3FFF0000,0xBF6B7A18,0xDACB778D,0x00000000
	.long	0x3FFF0000,0xBFC4EA46,0x63FA18F6,0x00000000
	.long	0x3FFF0000,0xC0181BDE,0x8B89A454,0x00000000
	.long	0x3FFF0000,0xC065B066,0xCFBF6439,0x00000000
	.long	0x3FFF0000,0xC0AE345F,0x56340AE6,0x00000000
	.long	0x3FFF0000,0xC0F22291,0x9CB9E6A7,0x00000000

	.set	X,FP_SCR1
	.set	XDCARE,X+2
	.set	XFRAC,X+4
	.set	XFRACLO,X+8

	.set	ATANF,FP_SCR2
	.set	ATANFHI,ATANF+4
	.set	ATANFLO,ATANF+8


	| xref	t_frcinx
	|xref	t_extdnrm

	.global	satand
satand:
|--ENTRY POINT FOR ATAN(X) FOR DENORMALIZED ARGUMENT

	bra		t_extdnrm

	.global	satan
satan:
|--ENTRY POINT FOR ATAN(X), HERE X IS FINITE, NON-ZERO, AND NOT NAN'S

	fmovex		(%a0),%fp0	| ...LOAD INPUT

	movel		(%a0),%d0
	movew		4(%a0),%d0
	fmovex		%fp0,X(%a6)
	andil		#0x7FFFFFFF,%d0

	cmpil		#0x3FFB8000,%d0		| ...|X| >= 1/16?
	bges		ATANOK1
	bra		ATANSM

ATANOK1:
	cmpil		#0x4002FFFF,%d0		| ...|X| < 16 ?
	bles		ATANMAIN
	bra		ATANBIG


|--THE MOST LIKELY CASE, |X| IN [1/16, 16). WE USE TABLE TECHNIQUE
|--THE IDEA IS ATAN(X) = ATAN(F) + ATAN( [X-F] / [1+XF] ).
|--SO IF F IS CHOSEN TO BE CLOSE TO X AND ATAN(F) IS STORED IN
|--A TABLE, ALL WE NEED IS TO APPROXIMATE ATAN(U) WHERE
|--U = (X-F)/(1+XF) IS SMALL (REMEMBER F IS CLOSE TO X). IT IS
|--TRUE THAT A DIVIDE IS NOW NEEDED, BUT THE APPROXIMATION FOR
|--ATAN(U) IS A VERY SHORT POLYNOMIAL AND THE INDEXING TO
|--FETCH F AND SAVING OF REGISTERS CAN BE ALL HIDED UNDER THE
|--DIVIDE. IN THE END THIS METHOD IS MUCH FASTER THAN A TRADITIONAL
|--ONE. NOTE ALSO THAT THE TRADITIONAL SCHEME THAT APPROXIMATE
|--ATAN(X) DIRECTLY WILL NEED TO USE A RATIONAL APPROXIMATION
|--(DIVISION NEEDED) ANYWAY BECAUSE A POLYNOMIAL APPROXIMATION
|--WILL INVOLVE A VERY LONG POLYNOMIAL.

|--NOW WE SEE X AS +-2^K * 1.BBBBBBB....B <- 1. + 63 BITS
|--WE CHOSE F TO BE +-2^K * 1.BBBB1
|--THAT IS IT MATCHES THE EXPONENT AND FIRST 5 BITS OF X, THE
|--SIXTH BITS IS SET TO BE 1. SINCE K = -4, -3, ..., 3, THERE
|--ARE ONLY 8 TIMES 16 = 2^7 = 128 |F|'S. SINCE ATAN(-|F|) IS
|-- -ATAN(|F|), WE NEED TO STORE ONLY ATAN(|F|).

ATANMAIN:

	movew		#0x0000,XDCARE(%a6)	| ...CLEAN UP X JUST IN CASE
	andil		#0xF8000000,XFRAC(%a6)	| ...FIRST 5 BITS
	oril		#0x04000000,XFRAC(%a6)	| ...SET 6-TH BIT TO 1
	movel		#0x00000000,XFRACLO(%a6)	| ...LOCATION OF X IS NOW F

	fmovex		%fp0,%fp1			| ...FP1 IS X
	fmulx		X(%a6),%fp1		| ...FP1 IS X*F, NOTE THAT X*F > 0
	fsubx		X(%a6),%fp0		| ...FP0 IS X-F
	fadds		#0x3F800000,%fp1		| ...FP1 IS 1 + X*F
	fdivx		%fp1,%fp0			| ...FP0 IS U = (X-F)/(1+X*F)

|--WHILE THE DIVISION IS TAKING ITS TIME, WE FETCH ATAN(|F|)
|--CREATE ATAN(F) AND STORE IT IN ATANF, AND
|--SAVE REGISTERS FP2.

	movel		%d2,-(%a7)	| ...SAVE d2 TEMPORARILY
	movel		%d0,%d2		| ...THE EXPO AND 16 BITS OF X
	andil		#0x00007800,%d0	| ...4 VARYING BITS OF F'S FRACTION
	andil		#0x7FFF0000,%d2	| ...EXPONENT OF F
	subil		#0x3FFB0000,%d2	| ...K+4
	asrl		#1,%d2
	addl		%d2,%d0		| ...THE 7 BITS IDENTIFYING F
	asrl		#7,%d0		| ...INDEX INTO TBL OF ATAN(|F|)
	lea		ATANTBL,%a1
	addal		%d0,%a1		| ...ADDRESS OF ATAN(|F|)
	movel		(%a1)+,ATANF(%a6)
	movel		(%a1)+,ATANFHI(%a6)
	movel		(%a1)+,ATANFLO(%a6)	| ...ATANF IS NOW ATAN(|F|)
	movel		X(%a6),%d0		| ...LOAD SIGN AND EXPO. AGAIN
	andil		#0x80000000,%d0	| ...SIGN(F)
	orl		%d0,ATANF(%a6)	| ...ATANF IS NOW SIGN(F)*ATAN(|F|)
	movel		(%a7)+,%d2	| ...RESTORE d2

|--THAT'S ALL I HAVE TO DO FOR NOW,
|--BUT ALAS, THE DIVIDE IS STILL CRANKING!

|--U IN FP0, WE ARE NOW READY TO COMPUTE ATAN(U) AS
|--U + A1*U*V*(A2 + V*(A3 + V)), V = U*U
|--THE POLYNOMIAL MAY LOOK STRANGE, BUT IS NEVERTHELESS CORRECT.
|--THE NATURAL FORM IS U + U*V*(A1 + V*(A2 + V*A3))
|--WHAT WE HAVE HERE IS MERELY	A1 = A3, A2 = A1/A3, A3 = A2/A3.
|--THE REASON FOR THIS REARRANGEMENT IS TO MAKE THE INDEPENDENT
|--PARTS A1*U*V AND (A2 + ... STUFF) MORE LOAD-BALANCED

	
	fmovex		%fp0,%fp1
	fmulx		%fp1,%fp1
	fmoved		ATANA3,%fp2
	faddx		%fp1,%fp2		| ...A3+V
	fmulx		%fp1,%fp2		| ...V*(A3+V)
	fmulx		%fp0,%fp1		| ...U*V
	faddd		ATANA2,%fp2	| ...A2+V*(A3+V)
	fmuld		ATANA1,%fp1	| ...A1*U*V
	fmulx		%fp2,%fp1		| ...A1*U*V*(A2+V*(A3+V))
	
	faddx		%fp1,%fp0		| ...ATAN(U), FP1 RELEASED
	fmovel		%d1,%FPCR		|restore users exceptions
	faddx		ATANF(%a6),%fp0	| ...ATAN(X)
	bra		t_frcinx

ATANBORS:
|--|X| IS IN d0 IN COMPACT FORM. FP1, d0 SAVED.
|--FP0 IS X AND |X| <= 1/16 OR |X| >= 16.
	cmpil		#0x3FFF8000,%d0
	bgt		ATANBIG	| ...I.E. |X| >= 16

ATANSM:
|--|X| <= 1/16
|--IF |X| < 2^(-40), RETURN X AS ANSWER. OTHERWISE, APPROXIMATE
|--ATAN(X) BY X + X*Y*(B1+Y*(B2+Y*(B3+Y*(B4+Y*(B5+Y*B6)))))
|--WHICH IS X + X*Y*( [B1+Z*(B3+Z*B5)] + [Y*(B2+Z*(B4+Z*B6)] )
|--WHERE Y = X*X, AND Z = Y*Y.

	cmpil		#0x3FD78000,%d0
	blt		ATANTINY
|--COMPUTE POLYNOMIAL
	fmulx		%fp0,%fp0	| ...FP0 IS Y = X*X

	
	movew		#0x0000,XDCARE(%a6)

	fmovex		%fp0,%fp1
	fmulx		%fp1,%fp1		| ...FP1 IS Z = Y*Y

	fmoved		ATANB6,%fp2
	fmoved		ATANB5,%fp3

	fmulx		%fp1,%fp2		| ...Z*B6
	fmulx		%fp1,%fp3		| ...Z*B5

	faddd		ATANB4,%fp2	| ...B4+Z*B6
	faddd		ATANB3,%fp3	| ...B3+Z*B5

	fmulx		%fp1,%fp2		| ...Z*(B4+Z*B6)
	fmulx		%fp3,%fp1		| ...Z*(B3+Z*B5)

	faddd		ATANB2,%fp2	| ...B2+Z*(B4+Z*B6)
	faddd		ATANB1,%fp1	| ...B1+Z*(B3+Z*B5)

	fmulx		%fp0,%fp2		| ...Y*(B2+Z*(B4+Z*B6))
	fmulx		X(%a6),%fp0		| ...X*Y

	faddx		%fp2,%fp1		| ...[B1+Z*(B3+Z*B5)]+[Y*(B2+Z*(B4+Z*B6))]
	

	fmulx		%fp1,%fp0	| ...X*Y*([B1+Z*(B3+Z*B5)]+[Y*(B2+Z*(B4+Z*B6))])

	fmovel		%d1,%FPCR		|restore users exceptions
	faddx		X(%a6),%fp0

	bra		t_frcinx

ATANTINY:
|--|X| < 2^(-40), ATAN(X) = X
	movew		#0x0000,XDCARE(%a6)

	fmovel		%d1,%FPCR		|restore users exceptions
	fmovex		X(%a6),%fp0	|last inst - possible exception set

	bra		t_frcinx

ATANBIG:
|--IF |X| > 2^(100), RETURN	SIGN(X)*(PI/2 - TINY). OTHERWISE,
|--RETURN SIGN(X)*PI/2 + ATAN(-1/X).
	cmpil		#0x40638000,%d0
	bgt		ATANHUGE

|--APPROXIMATE ATAN(-1/X) BY
|--X'+X'*Y*(C1+Y*(C2+Y*(C3+Y*(C4+Y*C5)))), X' = -1/X, Y = X'*X'
|--THIS CAN BE RE-WRITTEN AS
|--X'+X'*Y*( [C1+Z*(C3+Z*C5)] + [Y*(C2+Z*C4)] ), Z = Y*Y.

	fmoves		#0xBF800000,%fp1	| ...LOAD -1
	fdivx		%fp0,%fp1		| ...FP1 IS -1/X

	
|--DIVIDE IS STILL CRANKING

	fmovex		%fp1,%fp0		| ...FP0 IS X'
	fmulx		%fp0,%fp0		| ...FP0 IS Y = X'*X'
	fmovex		%fp1,X(%a6)		| ...X IS REALLY X'

	fmovex		%fp0,%fp1
	fmulx		%fp1,%fp1		| ...FP1 IS Z = Y*Y

	fmoved		ATANC5,%fp3
	fmoved		ATANC4,%fp2

	fmulx		%fp1,%fp3		| ...Z*C5
	fmulx		%fp1,%fp2		| ...Z*B4

	faddd		ATANC3,%fp3	| ...C3+Z*C5
	faddd		ATANC2,%fp2	| ...C2+Z*C4

	fmulx		%fp3,%fp1		| ...Z*(C3+Z*C5), FP3 RELEASED
	fmulx		%fp0,%fp2		| ...Y*(C2+Z*C4)

	faddd		ATANC1,%fp1	| ...C1+Z*(C3+Z*C5)
	fmulx		X(%a6),%fp0		| ...X'*Y

	faddx		%fp2,%fp1		| ...[Y*(C2+Z*C4)]+[C1+Z*(C3+Z*C5)]
	

	fmulx		%fp1,%fp0		| ...X'*Y*([B1+Z*(B3+Z*B5)]
|					...	+[Y*(B2+Z*(B4+Z*B6))])
	faddx		X(%a6),%fp0

	fmovel		%d1,%FPCR		|restore users exceptions
	
	btstb		#7,(%a0)
	beqs		pos_big

neg_big:
	faddx		NPIBY2,%fp0
	bra		t_frcinx

pos_big:
	faddx		PPIBY2,%fp0
	bra		t_frcinx

ATANHUGE:
|--RETURN SIGN(X)*(PIBY2 - TINY) = SIGN(X)*PIBY2 - SIGN(X)*TINY
	btstb		#7,(%a0)
	beqs		pos_huge

neg_huge:
	fmovex		NPIBY2,%fp0
	fmovel		%d1,%fpcr
	fsubx		NTINY,%fp0
	bra		t_frcinx

pos_huge:
	fmovex		PPIBY2,%fp0
	fmovel		%d1,%fpcr
	fsubx		PTINY,%fp0
	bra		t_frcinx
	
	|end
|
|	satanh.sa 3.3 12/19/90
|
|	The entry point satanh computes the inverse
|	hyperbolic tangent of
|	an input argument; satanhd does the same except for denormalized
|	input.
|
|	Input: Double-extended number X in location pointed to
|		by address register a0.
|
|	Output: The value arctanh(X) returned in floating-point register Fp0.
|
|	Accuracy and Monotonicity: The returned result is within 3 ulps in
|		64 significant bit, i.e. within 0.5001 ulp to 53 bits if the
|		result is subsequently rounded to double precision. The 
|		result is provably monotonic in double precision.
|
|	Speed: The program satanh takes approximately 270 cycles.
|
|	Algorithm:
|
|	ATANH
|	1. If |X| >= 1, go to 3.
|
|	2. (|X| < 1) Calculate atanh(X) by
|		sgn := sign(X)
|		y := |X|
|		z := 2y/(1-y)
|		atanh(X) := sgn * (1/2) * logp1(z)
|		Exit.
|
|	3. If |X| > 1, go to 5.
|
|	4. (|X| = 1) Generate infinity with an appropriate sign and
|		divide-by-zero by	
|		sgn := sign(X)
|		atan(X) := sgn / (+0).
|		Exit.
|
|	5. (|X| > 1) Generate an invalid operation by 0 * infinity.
|		Exit.
|

|		Copyright (C) Motorola, Inc. 1990
|			All Rights Reserved
|
|	THIS IS UNPUBLISHED PROPRIETARY SOURCE CODE OF MOTOROLA 
|	The copyright notice above does not evidence any  
|	actual or intended publication of such source code.

|satanh	idnt	2,1 | Motorola 040 Floating Point Software Package

	|section	8

	|xref	t_dz
	|xref	t_operr
	|xref	t_frcinx
	|xref	t_extdnrm
	|xref	slognp1

	.global	satanhd
satanhd:
|--ATANH(X) = X FOR DENORMALIZED X

	bra		t_extdnrm

	.global	satanh
satanh:
	movel		(%a0),%d0
	movew		4(%a0),%d0
	andil		#0x7FFFFFFF,%d0
	cmpil		#0x3FFF8000,%d0
	bges		ATANHBIG

|--THIS IS THE USUAL CASE, |X| < 1
|--Y = |X|, Z = 2Y/(1-Y), ATANH(X) = SIGN(X) * (1/2) * LOG1P(Z).

	fabsx		(%a0),%fp0	| ...Y = |X|
	fmovex		%fp0,%fp1
	fnegx		%fp1		| ...-Y
	faddx		%fp0,%fp0		| ...2Y
	fadds		#0x3F800000,%fp1	| ...1-Y
	fdivx		%fp1,%fp0		| ...2Y/(1-Y)
	movel		(%a0),%d0
	andil		#0x80000000,%d0
	oril		#0x3F000000,%d0	| ...SIGN(X)*HALF
	movel		%d0,-(%sp)

	fmovemx	%fp0-%fp0,(%a0)	| ...overwrite input
	movel		%d1,-(%sp)
	clrl		%d1
	bsr		slognp1		| ...LOG1P(Z)
	fmovel		(%sp)+,%fpcr
	fmuls		(%sp)+,%fp0
	bra		t_frcinx

ATANHBIG:
	fabsx		(%a0),%fp0	| ...|X|
	fcmps		#0x3F800000,%fp0
	fbgt		t_operr
	bra		t_dz

	|end
|
|	scale.sa 3.3 7/30/91
|
|	The entry point sSCALE computes the destination operand
|	scaled by the source operand.  If the absolute value of
|	the source operand is (>= 2^14) an overflow or underflow
|	is returned.
|
|	The entry point sscale is called from do_func to emulate
|	the fscale unimplemented instruction.
|
|	Input: Double-extended destination operand in FPTEMP, 
|		double-extended source operand in ETEMP.
|
|	Output: The function returns scale(X,Y) to fp0.
|
|	Modifies: fp0.
|
|	Algorithm:
|		
|		Copyright (C) Motorola, Inc. 1990
|			All Rights Reserved
|
|	THIS IS UNPUBLISHED PROPRIETARY SOURCE CODE OF MOTOROLA 
|	The copyright notice above does not evidence any  
|	actual or intended publication of such source code.

|SCALE    idnt    2,1 | Motorola 040 Floating Point Software Package

	|section	8

	.include "fpsp.h"

	|xref	t_ovfl2
	|xref	t_unfl
	|xref	round
	|xref	t_resdnrm

SRC_BNDS: .short	0x3fff,0x400c

|
| This entry point is used by the unimplemented instruction exception
| handler.
|
|
|
|	FSCALE
|
	.global	sscale
sscale:
	fmovel		#0,%fpcr		|clr user enabled exc
	clrl		%d1
	movew		FPTEMP(%a6),%d1	|get dest exponent
	smi		L_SCR1(%a6)	|use L_SCR1 to hold sign
	andil		#0x7fff,%d1	|strip sign
	movew		ETEMP(%a6),%d0	|check src bounds
	andiw		#0x7fff,%d0	|clr sign bit
	cmp2w		SRC_BNDS,%d0
	bccs		src_in
	cmpiw		#0x400c,%d0	|test for too large
	bge		src_out
|
| The source input is below 1, so we check for denormalized numbers
| and set unfl.
|
src_small:
	moveb		DTAG(%a6),%d0
	andib		#0xe0,%d0
	tstb		%d0
	beqs		no_denorm
	st		STORE_FLG(%a6)	|dest already contains result
	orl		#unfl_mask,USER_FPSR(%a6) |set UNFL
den_done:
	leal		FPTEMP(%a6),%a0
	bra		t_resdnrm
no_denorm:
	fmovel		USER_FPCR(%a6),%FPCR
	fmovex		FPTEMP(%a6),%fp0	|simply return dest
	rts


|
| Source is within 2^14 range.  To perform the int operation,
| move it to d0.
|
src_in:
	fmovex		ETEMP(%a6),%fp0	|move in src for int
	fmovel		#rz_mode,%fpcr	|force rz for src conversion
	fmovel		%fp0,%d0		|int src to d0
	fmovel		#0,%FPSR		|clr status from above
	tstw		ETEMP(%a6)	|check src sign
	blt		src_neg
|
| Source is positive.  Add the src to the dest exponent.
| The result can be denormalized, if src = 0, or overflow,
| if the result of the add sets a bit in the upper word.
|
src_pos:
	tstw		%d1		|check for denorm
	beq		dst_dnrm
	addl		%d0,%d1		|add src to dest exp
	beqs		denorm		|if zero, result is denorm
	cmpil		#0x7fff,%d1	|test for overflow
	bges		ovfl
	tstb		L_SCR1(%a6)
	beqs		spos_pos
	orw		#0x8000,%d1
spos_pos:
	movew		%d1,FPTEMP(%a6)	|result in FPTEMP
	fmovel		USER_FPCR(%a6),%FPCR
	fmovex		FPTEMP(%a6),%fp0	|write result to fp0
	rts
ovfl:
	tstb		L_SCR1(%a6)
	beqs		sovl_pos
	orw		#0x8000,%d1
sovl_pos:
	movew		FPTEMP(%a6),ETEMP(%a6)	|result in ETEMP
	movel		FPTEMP_HI(%a6),ETEMP_HI(%a6)
	movel		FPTEMP_LO(%a6),ETEMP_LO(%a6)
	bra		t_ovfl2

denorm:
	tstb		L_SCR1(%a6)
	beqs		den_pos
	orw		#0x8000,%d1
den_pos:
	tstl		FPTEMP_HI(%a6)	|check j bit
	blts		nden_exit	|if set, not denorm
	movew		%d1,ETEMP(%a6)	|input expected in ETEMP
	movel		FPTEMP_HI(%a6),ETEMP_HI(%a6)
	movel		FPTEMP_LO(%a6),ETEMP_LO(%a6)
	orl		#unfl_bit,USER_FPSR(%a6)	|set unfl
	leal		ETEMP(%a6),%a0
	bra		t_resdnrm
nden_exit:
	movew		%d1,FPTEMP(%a6)	|result in FPTEMP
	fmovel		USER_FPCR(%a6),%FPCR
	fmovex		FPTEMP(%a6),%fp0	|write result to fp0
	rts

|
| Source is negative.  Add the src to the dest exponent.
| (The result exponent will be reduced).  The result can be
| denormalized.
|
src_neg:
	addl		%d0,%d1		|add src to dest
	beqs		denorm		|if zero, result is denorm
	blts		fix_dnrm	|if negative, result is 
|					;needing denormalization
	tstb		L_SCR1(%a6)
	beqs		sneg_pos
	orw		#0x8000,%d1
sneg_pos:
	movew		%d1,FPTEMP(%a6)	|result in FPTEMP
	fmovel		USER_FPCR(%a6),%FPCR
	fmovex		FPTEMP(%a6),%fp0	|write result to fp0
	rts


|
| The result exponent is below denorm value.  Test for catastrophic
| underflow and force zero if true.  If not, try to shift the 
| mantissa right until a zero exponent exists.
|
fix_dnrm:
	cmpiw		#0xffc0,%d1	|lower bound for normalization
	blt		fix_unfl	|if lower, catastrophic unfl
	movew		%d1,%d0		|use d0 for exp
	movel		%d2,-(%a7)	|free d2 for norm
	movel		FPTEMP_HI(%a6),%d1
	movel		FPTEMP_LO(%a6),%d2
	clrl		L_SCR2(%a6)
fix_loop:
	addw		#1,%d0		|drive d0 to 0
	lsrl		#1,%d1		|while shifting the
	roxrl		#1,%d2		|mantissa to the right
	bccs		no_carry
	st		L_SCR2(%a6)	|use L_SCR2 to capture inex
no_carry:
	tstw		%d0		|it is finished when
	blts		fix_loop	|d0 is zero or the mantissa
	tstb		L_SCR2(%a6)
	beqs		tst_zero
	orl		#unfl_inx_mask,USER_FPSR(%a6)
|					;set unfl, aunfl, ainex
|
| Test for zero. If zero, simply use fmove to return +/- zero
| to the fpu.
|
tst_zero:
	clrw		FPTEMP_EX(%a6)
	tstb		L_SCR1(%a6)	|test for sign
	beqs		tst_con
	orw		#0x8000,FPTEMP_EX(%a6) |set sign bit
tst_con:
	movel		%d1,FPTEMP_HI(%a6)
	movel		%d2,FPTEMP_LO(%a6)
	movel		(%a7)+,%d2
	tstl		%d1
	bnes		not_zero
	tstl		FPTEMP_LO(%a6)
	bnes		not_zero
|
| Result is zero.  Check for rounding mode to set lsb.  If the
| mode is rp, and the zero is positive, return smallest denorm.
| If the mode is rm, and the zero is negative, return smallest
| negative denorm.
|
	btstb		#5,FPCR_MODE(%a6) |test if rm or rp
	beqs		no_dir
	btstb		#4,FPCR_MODE(%a6) |check which one
	beqs		zer_rm
zer_rp:
	tstb		L_SCR1(%a6)	|check sign
	bnes		no_dir		|if set, neg op, no inc
	movel		#1,FPTEMP_LO(%a6) |set lsb
	bras		sm_dnrm
zer_rm:
	tstb		L_SCR1(%a6)	|check sign
	beqs		no_dir		|if clr, neg op, no inc
	movel		#1,FPTEMP_LO(%a6) |set lsb
	orl		#neg_mask,USER_FPSR(%a6) |set N
	bras		sm_dnrm
no_dir:
	fmovel		USER_FPCR(%a6),%FPCR
	fmovex		FPTEMP(%a6),%fp0	|use fmove to set cc's
	rts

|
| The rounding mode changed the zero to a smallest denorm. Call 
| t_resdnrm with exceptional operand in ETEMP.
|
sm_dnrm:
	movel		FPTEMP_EX(%a6),ETEMP_EX(%a6)
	movel		FPTEMP_HI(%a6),ETEMP_HI(%a6)
	movel		FPTEMP_LO(%a6),ETEMP_LO(%a6)
	leal		ETEMP(%a6),%a0
	bra		t_resdnrm

|
| Result is still denormalized.
|
not_zero:
	orl		#unfl_mask,USER_FPSR(%a6) |set unfl
	tstb		L_SCR1(%a6)	|check for sign
	beqs		fix_exit
	orl		#neg_mask,USER_FPSR(%a6) |set N
fix_exit:
	bras		sm_dnrm

	
|
| The result has underflowed to zero. Return zero and set
| unfl, aunfl, and ainex.
|
fix_unfl:
	orl		#unfl_inx_mask,USER_FPSR(%a6)
	btstb		#5,FPCR_MODE(%a6) |test if rm or rp
	beqs		no_dir2
	btstb		#4,FPCR_MODE(%a6) |check which one
	beqs		zer_rm2
zer_rp2:
	tstb		L_SCR1(%a6)	|check sign
	bnes		no_dir2		|if set, neg op, no inc
	clrl		FPTEMP_EX(%a6)
	clrl		FPTEMP_HI(%a6)
	movel		#1,FPTEMP_LO(%a6) |set lsb
	bras		sm_dnrm		|return smallest denorm
zer_rm2:
	tstb		L_SCR1(%a6)	|check sign
	beqs		no_dir2		|if clr, neg op, no inc
	movew		#0x8000,FPTEMP_EX(%a6)
	clrl		FPTEMP_HI(%a6)
	movel		#1,FPTEMP_LO(%a6) |set lsb
	orl		#neg_mask,USER_FPSR(%a6) |set N
	bra		sm_dnrm		|return smallest denorm

no_dir2:
	tstb		L_SCR1(%a6)
	bges		pos_zero
neg_zero:
	clrl		FP_SCR1(%a6)	|clear the exceptional operand
	clrl		FP_SCR1+4(%a6)	|for gen_except.
	clrl		FP_SCR1+8(%a6)
	fmoves		#0x80000000,%fp0	
	rts
pos_zero:
	clrl		FP_SCR1(%a6)	|clear the exceptional operand
	clrl		FP_SCR1+4(%a6)	|for gen_except.
	clrl		FP_SCR1+8(%a6)
	fmoves		#0x00000000,%fp0
	rts

|
| The destination is a denormalized number.  It must be handled
| by first shifting the bits in the mantissa until it is normalized,
| then adding the remainder of the source to the exponent.
|
dst_dnrm:
	moveml		%d2/%d3,-(%a7)	
	movew		FPTEMP_EX(%a6),%d1
	movel		FPTEMP_HI(%a6),%d2
	movel		FPTEMP_LO(%a6),%d3
dst_loop:
	tstl		%d2		|test for normalized result
	blts		dst_norm	|exit loop if so
	tstl		%d0		|otherwise, test shift count
	beqs		dst_fin		|if zero, shifting is done
	subil		#1,%d0		|dec src
	lsll		#1,%d3
	roxll		#1,%d2
	bras		dst_loop
|
| Destination became normalized.  Simply add the remaining 
| portion of the src to the exponent.
|
dst_norm:
	addw		%d0,%d1		|dst is normalized; add src
	tstb		L_SCR1(%a6)
	beqs		dnrm_pos
	orl		#0x8000,%d1
dnrm_pos:
	movemw		%d1,FPTEMP_EX(%a6)
	moveml		%d2,FPTEMP_HI(%a6)
	moveml		%d3,FPTEMP_LO(%a6)
	fmovel		USER_FPCR(%a6),%FPCR
	fmovex		FPTEMP(%a6),%fp0
	moveml		(%a7)+,%d2/%d3
	rts

|
| Destination remained denormalized.  Call t_excdnrm with
| exceptional operand in ETEMP.
|
dst_fin:
	tstb		L_SCR1(%a6)	|check for sign
	beqs		dst_exit
	orl		#neg_mask,USER_FPSR(%a6) |set N
	orl		#0x8000,%d1
dst_exit:
	movemw		%d1,ETEMP_EX(%a6)
	moveml		%d2,ETEMP_HI(%a6)
	moveml		%d3,ETEMP_LO(%a6)
	orl		#unfl_mask,USER_FPSR(%a6) |set unfl
	moveml		(%a7)+,%d2/%d3
	leal		ETEMP(%a6),%a0
	bra		t_resdnrm

|
| Source is outside of 2^14 range.  Test the sign and branch
| to the appropriate exception handler.
|
src_out:
	tstb		L_SCR1(%a6)
	beqs		scro_pos
	orl		#0x8000,%d1
scro_pos:
	movel		FPTEMP_HI(%a6),ETEMP_HI(%a6)
	movel		FPTEMP_LO(%a6),ETEMP_LO(%a6)
	tstw		ETEMP(%a6)
	blts		res_neg
res_pos:
	movew		%d1,ETEMP(%a6)	|result in ETEMP
	bra		t_ovfl2
res_neg:
	movew		%d1,ETEMP(%a6)	|result in ETEMP
	leal		ETEMP(%a6),%a0
	bra		t_unfl
	|end
|
|	scosh.sa 3.1 12/10/90
|
|	The entry point sCosh computes the hyperbolic cosine of
|	an input argument; sCoshd does the same except for denormalized
|	input.
|
|	Input: Double-extended number X in location pointed to
|		by address register a0.
|
|	Output: The value cosh(X) returned in floating-point register Fp0.
|
|	Accuracy and Monotonicity: The returned result is within 3 ulps in
|		64 significant bit, i.e. within 0.5001 ulp to 53 bits if the
|		result is subsequently rounded to double precision. The
|		result is provably monotonic in double precision.
|
|	Speed: The program sCOSH takes approximately 250 cycles.
|
|	Algorithm:
|
|	COSH
|	1. If |X| > 16380 log2, go to 3.
|
|	2. (|X| <= 16380 log2) Cosh(X) is obtained by the formulae
|		y = |X|, z = exp(Y), and
|		cosh(X) = (1/2)*( z + 1/z ).
|		Exit.
|
|	3. (|X| > 16380 log2). If |X| > 16480 log2, go to 5.
|
|	4. (16380 log2 < |X| <= 16480 log2)
|		cosh(X) = sign(X) * exp(|X|)/2.
|		However, invoking exp(|X|) may cause premature overflow.
|		Thus, we calculate sinh(X) as follows:
|		Y	:= |X|
|		Fact	:=	2**(16380)
|		Y'	:= Y - 16381 log2
|		cosh(X) := Fact * exp(Y').
|		Exit.
|
|	5. (|X| > 16480 log2) sinh(X) must overflow. Return
|		Huge*Huge to generate overflow and an infinity with
|		the appropriate sign. Huge is the largest finite number in
|		extended format. Exit.
|
|

|		Copyright (C) Motorola, Inc. 1990
|			All Rights Reserved
|
|	THIS IS UNPUBLISHED PROPRIETARY SOURCE CODE OF MOTOROLA 
|	The copyright notice above does not evidence any  
|	actual or intended publication of such source code.

|SCOSH	idnt	2,1 | Motorola 040 Floating Point Software Package

	|section	8

	|xref	t_ovfl
	|xref	t_frcinx
	|xref	setox

T1:	.long 0x40C62D38,0xD3D64634 | ... 16381 LOG2 LEAD
T2:	.long 0x3D6F90AE,0xB1E75CC7 | ... 16381 LOG2 TRAIL

TWO16380: .long 0x7FFB0000,0x80000000,0x00000000,0x00000000

	.global	scoshd
scoshd:
|--COSH(X) = 1 FOR DENORMALIZED X

	fmoves		#0x3F800000,%fp0

	fmovel		%d1,%FPCR
	fadds		#0x00800000,%fp0
	bra		t_frcinx

	.global	scosh
scosh:
	fmovex		(%a0),%fp0	| ...LOAD INPUT

	movel		(%a0),%d0
	movew		4(%a0),%d0
	andil		#0x7FFFFFFF,%d0
	cmpil		#0x400CB167,%d0
	bgts		COSHBIG

|--THIS IS THE USUAL CASE, |X| < 16380 LOG2
|--COSH(X) = (1/2) * ( EXP(X) + 1/EXP(X) )

	fabsx		%fp0		| ...|X|

	movel		%d1,-(%sp)
	clrl		%d1
	fmovemx	%fp0-%fp0,(%a0)	|pass parameter to setox
	bsr		setox		| ...FP0 IS EXP(|X|)
	fmuls		#0x3F000000,%fp0	| ...(1/2)EXP(|X|)
	movel		(%sp)+,%d1

	fmoves		#0x3E800000,%fp1	| ...(1/4)
	fdivx		%fp0,%fp1	 	| ...1/(2 EXP(|X|))

	fmovel		%d1,%FPCR
	faddx		%fp1,%fp0

	bra		t_frcinx

COSHBIG:
	cmpil		#0x400CB2B3,%d0
	bgts		COSHHUGE

	fabsx		%fp0
	fsubd		T1(%pc),%fp0		| ...(|X|-16381LOG2_LEAD)
	fsubd		T2(%pc),%fp0		| ...|X| - 16381 LOG2, ACCURATE

	movel		%d1,-(%sp)
	clrl		%d1
	fmovemx	%fp0-%fp0,(%a0)
	bsr		setox
	fmovel		(%sp)+,%fpcr

	fmulx		TWO16380(%pc),%fp0
	bra		t_frcinx

COSHHUGE:
	fmovel		#0,%fpsr		|clr N bit if set by source
	bclrb		#7,(%a0)		|always return positive value
	fmovemx	(%a0),%fp0-%fp0
	bra		t_ovfl

	|end
|
|	setox.sa 3.1 12/10/90
|
|	The entry point setox computes the exponential of a value.
|	setoxd does the same except the input value is a denormalized
|	number.	setoxm1 computes exp(X)-1, and setoxm1d computes
|	exp(X)-1 for denormalized X.
|
|	INPUT
|	-----
|	Double-extended value in memory location pointed to by address
|	register a0.
|
|	OUTPUT
|	------
|	exp(X) or exp(X)-1 returned in floating-point register fp0.
|
|	ACCURACY and MONOTONICITY
|	-------------------------
|	The returned result is within 0.85 ulps in 64 significant bit, i.e.
|	within 0.5001 ulp to 53 bits if the result is subsequently rounded
|	to double precision. The result is provably monotonic in double
|	precision.
|
|	SPEED
|	-----
|	Two timings are measured, both in the copy-back mode. The
|	first one is measured when the function is invoked the first time
|	(so the instructions and data are not in cache), and the
|	second one is measured when the function is reinvoked at the same
|	input argument.
|
|	The program setox takes approximately 210/190 cycles for input
|	argument X whose magnitude is less than 16380 log2, which
|	is the usual situation.	For the less common arguments,
|	depending on their values, the program may run faster or slower --
|	but no worse than 10% slower even in the extreme cases.
|
|	The program setoxm1 takes approximately ???/??? cycles for input
|	argument X, 0.25 <= |X| < 70log2. For |X| < 0.25, it takes
|	approximately ???/??? cycles. For the less common arguments,
|	depending on their values, the program may run faster or slower --
|	but no worse than 10% slower even in the extreme cases.
|
|	ALGORITHM and IMPLEMENTATION NOTES
|	----------------------------------
|
|	setoxd
|	------
|	Step 1.	Set ans := 1.0
|
|	Step 2.	Return	ans := ans + sign(X)*2^(-126). Exit.
|	Notes:	This will always generate one exception -- inexact.
|
|
|	setox
|	-----
|
|	Step 1.	Filter out extreme cases of input argument.
|		1.1	If |X| >= 2^(-65), go to Step 1.3.
|		1.2	Go to Step 7.
|		1.3	If |X| < 16380 log(2), go to Step 2.
|		1.4	Go to Step 8.
|	Notes:	The usual case should take the branches 1.1 -> 1.3 -> 2.
|		 To avoid the use of floating-point comparisons, a
|		 compact representation of |X| is used. This format is a
|		 32-bit integer, the upper (more significant) 16 bits are
|		 the sign and biased exponent field of |X|; the lower 16
|		 bits are the 16 most significant fraction (including the
|		 explicit bit) bits of |X|. Consequently, the comparisons
|		 in Steps 1.1 and 1.3 can be performed by integer comparison.
|		 Note also that the constant 16380 log(2) used in Step 1.3
|		 is also in the compact form. Thus taking the branch
|		 to Step 2 guarantees |X| < 16380 log(2). There is no harm
|		 to have a small number of cases where |X| is less than,
|		 but close to, 16380 log(2) and the branch to Step 9 is
|		 taken.
|
|	Step 2.	Calculate N = round-to-nearest-int( X * 64/log2 ).
|		2.1	Set AdjFlag := 0 (indicates the branch 1.3 -> 2 was taken)
|		2.2	N := round-to-nearest-integer( X * 64/log2 ).
|		2.3	Calculate	J = N mod 64; so J = 0,1,2,..., or 63.
|		2.4	Calculate	M = (N - J)/64; so N = 64M + J.
|		2.5	Calculate the address of the stored value of 2^(J/64).
|		2.6	Create the value Scale = 2^M.
|	Notes:	The calculation in 2.2 is really performed by
|
|			Z := X * constant
|			N := round-to-nearest-integer(Z)
|
|		 where
|
|			constant := single-precision( 64/log 2 ).
|
|		 Using a single-precision constant avoids memory access.
|		 Another effect of using a single-precision "constant" is
|		 that the calculated value Z is
|
|			Z = X*(64/log2)*(1+eps), |eps| <= 2^(-24).
|
|		 This error has to be considered later in Steps 3 and 4.
|
|	Step 3.	Calculate X - N*log2/64.
|		3.1	R := X + N*L1, where L1 := single-precision(-log2/64).
|		3.2	R := R + N*L2, L2 := extended-precision(-log2/64 - L1).
|	Notes:	a) The way L1 and L2 are chosen ensures L1+L2 approximate
|		 the value	-log2/64	to 88 bits of accuracy.
|		 b) N*L1 is exact because N is no longer than 22 bits and
|		 L1 is no longer than 24 bits.
|		 c) The calculation X+N*L1 is also exact due to cancellation.
|		 Thus, R is practically X+N(L1+L2) to full 64 bits.
|		 d) It is important to estimate how large can |R| be after
|		 Step 3.2.
|
|			N = rnd-to-int( X*64/log2 (1+eps) ), |eps|<=2^(-24)
|			X*64/log2 (1+eps)	=	N + f,	|f| <= 0.5
|			X*64/log2 - N	=	f - eps*X 64/log2
|			X - N*log2/64	=	f*log2/64 - eps*X
|
|
|		 Now |X| <= 16446 log2, thus
|
|			|X - N*log2/64| <= (0.5 + 16446/2^(18))*log2/64
|					<= 0.57 log2/64.
|		 This bound will be used in Step 4.
|
|	Step 4.	Approximate exp(R)-1 by a polynomial
|			p = R + R*R*(A1 + R*(A2 + R*(A3 + R*(A4 + R*A5))))
|	Notes:	a) In order to reduce memory access, the coefficients are
|		 made as "short" as possible: A1 (which is 1/2), A4 and A5
|		 are single precision; A2 and A3 are double precision.
|		 b) Even with the restrictions above,
|			|p - (exp(R)-1)| < 2^(-68.8) for all |R| <= 0.0062.
|		 Note that 0.0062 is slightly bigger than 0.57 log2/64.
|		 c) To fully utilize the pipeline, p is separated into
|		 two independent pieces of roughly equal complexities
|			p = [ R + R*S*(A2 + S*A4) ]	+
|				[ S*(A1 + S*(A3 + S*A5)) ]
|		 where S = R*R.
|
|	Step 5.	Compute 2^(J/64)*exp(R) = 2^(J/64)*(1+p) by
|				ans := T + ( T*p + t)
|		 where T and t are the stored values for 2^(J/64).
|	Notes:	2^(J/64) is stored as T and t where T+t approximates
|		 2^(J/64) to roughly 85 bits; T is in extended precision
|		 and t is in single precision. Note also that T is rounded
|		 to 62 bits so that the last two bits of T are zero. The
|		 reason for such a special form is that T-1, T-2, and T-8
|		 will all be exact --- a property that will give much
|		 more accurate computation of the function EXPM1.
|
|	Step 6.	Reconstruction of exp(X)
|			exp(X) = 2^M * 2^(J/64) * exp(R).
|		6.1	If AdjFlag = 0, go to 6.3
|		6.2	ans := ans * AdjScale
|		6.3	Restore the user FPCR
|		6.4	Return ans := ans * Scale. Exit.
|	Notes:	If AdjFlag = 0, we have X = Mlog2 + Jlog2/64 + R,
|		 |M| <= 16380, and Scale = 2^M. Moreover, exp(X) will
|		 neither overflow nor underflow. If AdjFlag = 1, that
|		 means that
|			X = (M1+M)log2 + Jlog2/64 + R, |M1+M| >= 16380.
|		 Hence, exp(X) may overflow or underflow or neither.
|		 When that is the case, AdjScale = 2^(M1) where M1 is
|		 approximately M. Thus 6.2 will never cause over/underflow.
|		 Possible exception in 6.4 is overflow or underflow.
|		 The inexact exception is not generated in 6.4. Although
|		 one can argue that the inexact flag should always be
|		 raised, to simulate that exception cost to much than the
|		 flag is worth in practical uses.
|
|	Step 7.	Return 1 + X.
|		7.1	ans := X
|		7.2	Restore user FPCR.
|		7.3	Return ans := 1 + ans. Exit
|	Notes:	For non-zero X, the inexact exception will always be
|		 raised by 7.3. That is the only exception raised by 7.3.
|		 Note also that we use the FMOVEM instruction to move X
|		 in Step 7.1 to avoid unnecessary trapping. (Although
|		 the FMOVEM may not seem relevant since X is normalized,
|		 the precaution will be useful in the library version of
|		 this code where the separate entry for denormalized inputs
|		 will be done away with.)
|
|	Step 8.	Handle exp(X) where |X| >= 16380log2.
|		8.1	If |X| > 16480 log2, go to Step 9.
|		(mimic 2.2 - 2.6)
|		8.2	N := round-to-integer( X * 64/log2 )
|		8.3	Calculate J = N mod 64, J = 0,1,...,63
|		8.4	K := (N-J)/64, M1 := truncate(K/2), M = K-M1, AdjFlag := 1.
|		8.5	Calculate the address of the stored value 2^(J/64).
|		8.6	Create the values Scale = 2^M, AdjScale = 2^M1.
|		8.7	Go to Step 3.
|	Notes:	Refer to notes for 2.2 - 2.6.
|
|	Step 9.	Handle exp(X), |X| > 16480 log2.
|		9.1	If X < 0, go to 9.3
|		9.2	ans := Huge, go to 9.4
|		9.3	ans := Tiny.
|		9.4	Restore user FPCR.
|		9.5	Return ans := ans * ans. Exit.
|	Notes:	Exp(X) will surely overflow or underflow, depending on
|		 X's sign. "Huge" and "Tiny" are respectively large/tiny
|		 extended-precision numbers whose square over/underflow
|		 with an inexact result. Thus, 9.5 always raises the
|		 inexact together with either overflow or underflow.
|
|
|	setoxm1d
|	--------
|
|	Step 1.	Set ans := 0
|
|	Step 2.	Return	ans := X + ans. Exit.
|	Notes:	This will return X with the appropriate rounding
|		 precision prescribed by the user FPCR.
|
|	setoxm1
|	-------
|
|	Step 1.	Check |X|
|		1.1	If |X| >= 1/4, go to Step 1.3.
|		1.2	Go to Step 7.
|		1.3	If |X| < 70 log(2), go to Step 2.
|		1.4	Go to Step 10.
|	Notes:	The usual case should take the branches 1.1 -> 1.3 -> 2.
|		 However, it is conceivable |X| can be small very often
|		 because EXPM1 is intended to evaluate exp(X)-1 accurately
|		 when |X| is small. For further details on the comparisons,
|		 see the notes on Step 1 of setox.
|
|	Step 2.	Calculate N = round-to-nearest-int( X * 64/log2 ).
|		2.1	N := round-to-nearest-integer( X * 64/log2 ).
|		2.2	Calculate	J = N mod 64; so J = 0,1,2,..., or 63.
|		2.3	Calculate	M = (N - J)/64; so N = 64M + J.
|		2.4	Calculate the address of the stored value of 2^(J/64).
|		2.5	Create the values Sc = 2^M and OnebySc := -2^(-M).
|	Notes:	See the notes on Step 2 of setox.
|
|	Step 3.	Calculate X - N*log2/64.
|		3.1	R := X + N*L1, where L1 := single-precision(-log2/64).
|		3.2	R := R + N*L2, L2 := extended-precision(-log2/64 - L1).
|	Notes:	Applying the analysis of Step 3 of setox in this case
|		 shows that |R| <= 0.0055 (note that |X| <= 70 log2 in
|		 this case).
|
|	Step 4.	Approximate exp(R)-1 by a polynomial
|			p = R+R*R*(A1+R*(A2+R*(A3+R*(A4+R*(A5+R*A6)))))
|	Notes:	a) In order to reduce memory access, the coefficients are
|		 made as "short" as possible: A1 (which is 1/2), A5 and A6
|		 are single precision; A2, A3 and A4 are double precision.
|		 b) Even with the restriction above,
|			|p - (exp(R)-1)| <	|R| * 2^(-72.7)
|		 for all |R| <= 0.0055.
|		 c) To fully utilize the pipeline, p is separated into
|		 two independent pieces of roughly equal complexity
|			p = [ R*S*(A2 + S*(A4 + S*A6)) ]	+
|				[ R + S*(A1 + S*(A3 + S*A5)) ]
|		 where S = R*R.
|
|	Step 5.	Compute 2^(J/64)*p by
|				p := T*p
|		 where T and t are the stored values for 2^(J/64).
|	Notes:	2^(J/64) is stored as T and t where T+t approximates
|		 2^(J/64) to roughly 85 bits; T is in extended precision
|		 and t is in single precision. Note also that T is rounded
|		 to 62 bits so that the last two bits of T are zero. The
|		 reason for such a special form is that T-1, T-2, and T-8
|		 will all be exact --- a property that will be exploited
|		 in Step 6 below. The total relative error in p is no
|		 bigger than 2^(-67.7) compared to the final result.
|
|	Step 6.	Reconstruction of exp(X)-1
|			exp(X)-1 = 2^M * ( 2^(J/64) + p - 2^(-M) ).
|		6.1	If M <= 63, go to Step 6.3.
|		6.2	ans := T + (p + (t + OnebySc)). Go to 6.6
|		6.3	If M >= -3, go to 6.5.
|		6.4	ans := (T + (p + t)) + OnebySc. Go to 6.6
|		6.5	ans := (T + OnebySc) + (p + t).
|		6.6	Restore user FPCR.
|		6.7	Return ans := Sc * ans. Exit.
|	Notes:	The various arrangements of the expressions give accurate
|		 evaluations.
|
|	Step 7.	exp(X)-1 for |X| < 1/4.
|		7.1	If |X| >= 2^(-65), go to Step 9.
|		7.2	Go to Step 8.
|
|	Step 8.	Calculate exp(X)-1, |X| < 2^(-65).
|		8.1	If |X| < 2^(-16312), goto 8.3
|		8.2	Restore FPCR; return ans := X - 2^(-16382). Exit.
|		8.3	X := X * 2^(140).
|		8.4	Restore FPCR; ans := ans - 2^(-16382).
|		 Return ans := ans*2^(140). Exit
|	Notes:	The idea is to return "X - tiny" under the user
|		 precision and rounding modes. To avoid unnecessary
|		 inefficiency, we stay away from denormalized numbers the
|		 best we can. For |X| >= 2^(-16312), the straightforward
|		 8.2 generates the inexact exception as the case warrants.
|
|	Step 9.	Calculate exp(X)-1, |X| < 1/4, by a polynomial
|			p = X + X*X*(B1 + X*(B2 + ... + X*B12))
|	Notes:	a) In order to reduce memory access, the coefficients are
|		 made as "short" as possible: B1 (which is 1/2), B9 to B12
|		 are single precision; B3 to B8 are double precision; and
|		 B2 is double extended.
|		 b) Even with the restriction above,
|			|p - (exp(X)-1)| < |X| 2^(-70.6)
|		 for all |X| <= 0.251.
|		 Note that 0.251 is slightly bigger than 1/4.
|		 c) To fully preserve accuracy, the polynomial is computed
|		 as	X + ( S*B1 +	Q ) where S = X*X and
|			Q	=	X*S*(B2 + X*(B3 + ... + X*B12))
|		 d) To fully utilize the pipeline, Q is separated into
|		 two independent pieces of roughly equal complexity
|			Q = [ X*S*(B2 + S*(B4 + ... + S*B12)) ] +
|				[ S*S*(B3 + S*(B5 + ... + S*B11)) ]
|
|	Step 10.	Calculate exp(X)-1 for |X| >= 70 log 2.
|		10.1 If X >= 70log2 , exp(X) - 1 = exp(X) for all practical
|		 purposes. Therefore, go to Step 1 of setox.
|		10.2 If X <= -70log2, exp(X) - 1 = -1 for all practical purposes.
|		 ans := -1
|		 Restore user FPCR
|		 Return ans := ans + 2^(-126). Exit.
|	Notes:	10.2 will always create an inexact and return -1 + tiny
|		 in the user rounding precision and mode.
|
|

|		Copyright (C) Motorola, Inc. 1990
|			All Rights Reserved
|
|	THIS IS UNPUBLISHED PROPRIETARY SOURCE CODE OF MOTOROLA 
|	The copyright notice above does not evidence any  
|	actual or intended publication of such source code.

|setox	idnt	2,1 | Motorola 040 Floating Point Software Package

	|section	8

	.include "fpsp.h"

L2:	.long	0x3FDC0000,0x82E30865,0x4361C4C6,0x00000000

EXPA3:	.long	0x3FA55555,0x55554431
EXPA2:	.long	0x3FC55555,0x55554018

HUGE:	.long	0x7FFE0000,0xFFFFFFFF,0xFFFFFFFF,0x00000000
TINY:	.long	0x00010000,0xFFFFFFFF,0xFFFFFFFF,0x00000000

EM1A4:	.long	0x3F811111,0x11174385
EM1A3:	.long	0x3FA55555,0x55554F5A

EM1A2:	.long	0x3FC55555,0x55555555,0x00000000,0x00000000

EM1B8:	.long	0x3EC71DE3,0xA5774682
EM1B7:	.long	0x3EFA01A0,0x19D7CB68

EM1B6:	.long	0x3F2A01A0,0x1A019DF3
EM1B5:	.long	0x3F56C16C,0x16C170E2

EM1B4:	.long	0x3F811111,0x11111111
EM1B3:	.long	0x3FA55555,0x55555555

EM1B2:	.long	0x3FFC0000,0xAAAAAAAA,0xAAAAAAAB
	.long	0x00000000

TWO140:	.long	0x48B00000,0x00000000
TWON140:	.long	0x37300000,0x00000000

EXPTBL:
	.long	0x3FFF0000,0x80000000,0x00000000,0x00000000
	.long	0x3FFF0000,0x8164D1F3,0xBC030774,0x9F841A9B
	.long	0x3FFF0000,0x82CD8698,0xAC2BA1D8,0x9FC1D5B9
	.long	0x3FFF0000,0x843A28C3,0xACDE4048,0xA0728369
	.long	0x3FFF0000,0x85AAC367,0xCC487B14,0x1FC5C95C
	.long	0x3FFF0000,0x871F6196,0x9E8D1010,0x1EE85C9F
	.long	0x3FFF0000,0x88980E80,0x92DA8528,0x9FA20729
	.long	0x3FFF0000,0x8A14D575,0x496EFD9C,0xA07BF9AF
	.long	0x3FFF0000,0x8B95C1E3,0xEA8BD6E8,0xA0020DCF
	.long	0x3FFF0000,0x8D1ADF5B,0x7E5BA9E4,0x205A63DA
	.long	0x3FFF0000,0x8EA4398B,0x45CD53C0,0x1EB70051
	.long	0x3FFF0000,0x9031DC43,0x1466B1DC,0x1F6EB029
	.long	0x3FFF0000,0x91C3D373,0xAB11C338,0xA0781494
	.long	0x3FFF0000,0x935A2B2F,0x13E6E92C,0x9EB319B0
	.long	0x3FFF0000,0x94F4EFA8,0xFEF70960,0x2017457D
	.long	0x3FFF0000,0x96942D37,0x20185A00,0x1F11D537
	.long	0x3FFF0000,0x9837F051,0x8DB8A970,0x9FB952DD
	.long	0x3FFF0000,0x99E04593,0x20B7FA64,0x1FE43087
	.long	0x3FFF0000,0x9B8D39B9,0xD54E5538,0x1FA2A818
	.long	0x3FFF0000,0x9D3ED9A7,0x2CFFB750,0x1FDE494D
	.long	0x3FFF0000,0x9EF53260,0x91A111AC,0x20504890
	.long	0x3FFF0000,0xA0B0510F,0xB9714FC4,0xA073691C
	.long	0x3FFF0000,0xA2704303,0x0C496818,0x1F9B7A05
	.long	0x3FFF0000,0xA43515AE,0x09E680A0,0xA0797126
	.long	0x3FFF0000,0xA5FED6A9,0xB15138EC,0xA071A140
	.long	0x3FFF0000,0xA7CD93B4,0xE9653568,0x204F62DA
	.long	0x3FFF0000,0xA9A15AB4,0xEA7C0EF8,0x1F283C4A
	.long	0x3FFF0000,0xAB7A39B5,0xA93ED338,0x9F9A7FDC
	.long	0x3FFF0000,0xAD583EEA,0x42A14AC8,0xA05B3FAC
	.long	0x3FFF0000,0xAF3B78AD,0x690A4374,0x1FDF2610
	.long	0x3FFF0000,0xB123F581,0xD2AC2590,0x9F705F90
	.long	0x3FFF0000,0xB311C412,0xA9112488,0x201F678A
	.long	0x3FFF0000,0xB504F333,0xF9DE6484,0x1F32FB13
	.long	0x3FFF0000,0xB6FD91E3,0x28D17790,0x20038B30
	.long	0x3FFF0000,0xB8FBAF47,0x62FB9EE8,0x200DC3CC
	.long	0x3FFF0000,0xBAFF5AB2,0x133E45FC,0x9F8B2AE6
	.long	0x3FFF0000,0xBD08A39F,0x580C36C0,0xA02BBF70
	.long	0x3FFF0000,0xBF1799B6,0x7A731084,0xA00BF518
	.long	0x3FFF0000,0xC12C4CCA,0x66709458,0xA041DD41
	.long	0x3FFF0000,0xC346CCDA,0x24976408,0x9FDF137B
	.long	0x3FFF0000,0xC5672A11,0x5506DADC,0x201F1568
	.long	0x3FFF0000,0xC78D74C8,0xABB9B15C,0x1FC13A2E
	.long	0x3FFF0000,0xC9B9BD86,0x6E2F27A4,0xA03F8F03
	.long	0x3FFF0000,0xCBEC14FE,0xF2727C5C,0x1FF4907D
	.long	0x3FFF0000,0xCE248C15,0x1F8480E4,0x9E6E53E4
	.long	0x3FFF0000,0xD06333DA,0xEF2B2594,0x1FD6D45C
	.long	0x3FFF0000,0xD2A81D91,0xF12AE45C,0xA076EDB9
	.long	0x3FFF0000,0xD4F35AAB,0xCFEDFA20,0x9FA6DE21
	.long	0x3FFF0000,0xD744FCCA,0xD69D6AF4,0x1EE69A2F
	.long	0x3FFF0000,0xD99D15C2,0x78AFD7B4,0x207F439F
	.long	0x3FFF0000,0xDBFBB797,0xDAF23754,0x201EC207
	.long	0x3FFF0000,0xDE60F482,0x5E0E9124,0x9E8BE175
	.long	0x3FFF0000,0xE0CCDEEC,0x2A94E110,0x20032C4B
	.long	0x3FFF0000,0xE33F8972,0xBE8A5A50,0x2004DFF5
	.long	0x3FFF0000,0xE5B906E7,0x7C8348A8,0x1E72F47A
	.long	0x3FFF0000,0xE8396A50,0x3C4BDC68,0x1F722F22
	.long	0x3FFF0000,0xEAC0C6E7,0xDD243930,0xA017E945
	.long	0x3FFF0000,0xED4F301E,0xD9942B84,0x1F401A5B
	.long	0x3FFF0000,0xEFE4B99B,0xDCDAF5CC,0x9FB9A9E3
	.long	0x3FFF0000,0xF281773C,0x59FFB138,0x20744C05
	.long	0x3FFF0000,0xF5257D15,0x2486CC2C,0x1F773A19
	.long	0x3FFF0000,0xF7D0DF73,0x0AD13BB8,0x1FFE90D5
	.long	0x3FFF0000,0xFA83B2DB,0x722A033C,0xA041ED22
	.long	0x3FFF0000,0xFD3E0C0C,0xF486C174,0x1F853F3A

	.set	ADJFLAG,L_SCR2
	.set	SCALE,FP_SCR1
	.set	ADJSCALE,FP_SCR2
	.set	SC,FP_SCR3
	.set	ONEBYSC,FP_SCR4

	| xref	t_frcinx
	|xref	t_extdnrm
	|xref	t_unfl
	|xref	t_ovfl

	.global	setoxd
setoxd:
|--entry point for EXP(X), X is denormalized
	movel		(%a0),%d0
	andil		#0x80000000,%d0
	oril		#0x00800000,%d0		| ...sign(X)*2^(-126)
	movel		%d0,-(%sp)
	fmoves		#0x3F800000,%fp0
	fmovel		%d1,%fpcr
	fadds		(%sp)+,%fp0
	bra		t_frcinx

	.global	setox
setox:
|--entry point for EXP(X), here X is finite, non-zero, and not NaN's

|--Step 1.
	movel		(%a0),%d0	 | ...load part of input X
	andil		#0x7FFF0000,%d0	| ...biased expo. of X
	cmpil		#0x3FBE0000,%d0	| ...2^(-65)
	bges		EXPC1		| ...normal case
	bra		EXPSM

EXPC1:
|--The case |X| >= 2^(-65)
	movew		4(%a0),%d0	| ...expo. and partial sig. of |X|
	cmpil		#0x400CB167,%d0	| ...16380 log2 trunc. 16 bits
	blts		EXPMAIN	 | ...normal case
	bra		EXPBIG

EXPMAIN:
|--Step 2.
|--This is the normal branch:	2^(-65) <= |X| < 16380 log2.
	fmovex		(%a0),%fp0	| ...load input from (a0)

	fmovex		%fp0,%fp1
	fmuls		#0x42B8AA3B,%fp0	| ...64/log2 * X
	fmovemx	%fp2-%fp2/%fp3,-(%a7)		| ...save fp2
	movel		#0,ADJFLAG(%a6)
	fmovel		%fp0,%d0		| ...N = int( X * 64/log2 )
	lea		EXPTBL,%a1
	fmovel		%d0,%fp0		| ...convert to floating-format

	movel		%d0,L_SCR1(%a6)	| ...save N temporarily
	andil		#0x3F,%d0		| ...D0 is J = N mod 64
	lsll		#4,%d0
	addal		%d0,%a1		| ...address of 2^(J/64)
	movel		L_SCR1(%a6),%d0
	asrl		#6,%d0		| ...D0 is M
	addiw		#0x3FFF,%d0	| ...biased expo. of 2^(M)
	movew		L2,L_SCR1(%a6)	| ...prefetch L2, no need in CB

EXPCONT1:
|--Step 3.
|--fp1,fp2 saved on the stack. fp0 is N, fp1 is X,
|--a0 points to 2^(J/64), D0 is biased expo. of 2^(M)
	fmovex		%fp0,%fp2
	fmuls		#0xBC317218,%fp0	| ...N * L1, L1 = lead(-log2/64)
	fmulx		L2,%fp2		| ...N * L2, L1+L2 = -log2/64
	faddx		%fp1,%fp0	 	| ...X + N*L1
	faddx		%fp2,%fp0		| ...fp0 is R, reduced arg.
|	MOVE.W		#$3FA5,EXPA3	...load EXPA3 in cache

|--Step 4.
|--WE NOW COMPUTE EXP(R)-1 BY A POLYNOMIAL
|-- R + R*R*(A1 + R*(A2 + R*(A3 + R*(A4 + R*A5))))
|--TO FULLY UTILIZE THE PIPELINE, WE COMPUTE S = R*R
|--[R+R*S*(A2+S*A4)] + [S*(A1+S*(A3+S*A5))]

	fmovex		%fp0,%fp1
	fmulx		%fp1,%fp1	 	| ...fp1 IS S = R*R

	fmoves		#0x3AB60B70,%fp2	| ...fp2 IS A5
|	MOVE.W		#0,2(%a1)	...load 2^(J/64) in cache

	fmulx		%fp1,%fp2	 	| ...fp2 IS S*A5
	fmovex		%fp1,%fp3
	fmuls		#0x3C088895,%fp3	| ...fp3 IS S*A4

	faddd		EXPA3,%fp2	| ...fp2 IS A3+S*A5
	faddd		EXPA2,%fp3	| ...fp3 IS A2+S*A4

	fmulx		%fp1,%fp2	 	| ...fp2 IS S*(A3+S*A5)
	movew		%d0,SCALE(%a6)	| ...SCALE is 2^(M) in extended
	clrw		SCALE+2(%a6)
	movel		#0x80000000,SCALE+4(%a6)
	clrl		SCALE+8(%a6)

	fmulx		%fp1,%fp3	 	| ...fp3 IS S*(A2+S*A4)

	fadds		#0x3F000000,%fp2	| ...fp2 IS A1+S*(A3+S*A5)
	fmulx		%fp0,%fp3	 	| ...fp3 IS R*S*(A2+S*A4)

	fmulx		%fp1,%fp2	 	| ...fp2 IS S*(A1+S*(A3+S*A5))
	faddx		%fp3,%fp0	 	| ...fp0 IS R+R*S*(A2+S*A4),
|					...fp3 released

	fmovex		(%a1)+,%fp1	| ...fp1 is lead. pt. of 2^(J/64)
	faddx		%fp2,%fp0	 	| ...fp0 is EXP(R) - 1
|					...fp2 released

|--Step 5
|--final reconstruction process
|--EXP(X) = 2^M * ( 2^(J/64) + 2^(J/64)*(EXP(R)-1) )

	fmulx		%fp1,%fp0	 	| ...2^(J/64)*(Exp(R)-1)
	fmovemx	(%a7)+,%fp2-%fp2/%fp3	| ...fp2 restored
	fadds		(%a1),%fp0	| ...accurate 2^(J/64)

	faddx		%fp1,%fp0	 	| ...2^(J/64) + 2^(J/64)*...
	movel		ADJFLAG(%a6),%d0

|--Step 6
	tstl		%d0
	beqs		NORMAL
ADJUST:
	fmulx		ADJSCALE(%a6),%fp0
NORMAL:
	fmovel		%d1,%FPCR	 	| ...restore user FPCR
	fmulx		SCALE(%a6),%fp0	| ...multiply 2^(M)
	bra		t_frcinx

EXPSM:
|--Step 7
	fmovemx	(%a0),%fp0-%fp0	| ...in case X is denormalized
	fmovel		%d1,%FPCR
	fadds		#0x3F800000,%fp0	| ...1+X in user mode
	bra		t_frcinx

EXPBIG:
|--Step 8
	cmpil		#0x400CB27C,%d0	| ...16480 log2
	bgts		EXP2BIG
|--Steps 8.2 -- 8.6
	fmovex		(%a0),%fp0	| ...load input from (a0)

	fmovex		%fp0,%fp1
	fmuls		#0x42B8AA3B,%fp0	| ...64/log2 * X
	fmovemx	 %fp2-%fp2/%fp3,-(%a7)		| ...save fp2
	movel		#1,ADJFLAG(%a6)
	fmovel		%fp0,%d0		| ...N = int( X * 64/log2 )
	lea		EXPTBL,%a1
	fmovel		%d0,%fp0		| ...convert to floating-format
	movel		%d0,L_SCR1(%a6)			| ...save N temporarily
	andil		#0x3F,%d0		 | ...D0 is J = N mod 64
	lsll		#4,%d0
	addal		%d0,%a1			| ...address of 2^(J/64)
	movel		L_SCR1(%a6),%d0
	asrl		#6,%d0			| ...D0 is K
	movel		%d0,L_SCR1(%a6)			| ...save K temporarily
	asrl		#1,%d0			| ...D0 is M1
	subl		%d0,L_SCR1(%a6)			| ...a1 is M
	addiw		#0x3FFF,%d0		| ...biased expo. of 2^(M1)
	movew		%d0,ADJSCALE(%a6)		| ...ADJSCALE := 2^(M1)
	clrw		ADJSCALE+2(%a6)
	movel		#0x80000000,ADJSCALE+4(%a6)
	clrl		ADJSCALE+8(%a6)
	movel		L_SCR1(%a6),%d0			| ...D0 is M
	addiw		#0x3FFF,%d0		| ...biased expo. of 2^(M)
	bra		EXPCONT1		| ...go back to Step 3

EXP2BIG:
|--Step 9
	fmovel		%d1,%FPCR
	movel		(%a0),%d0
	bclrb		#sign_bit,(%a0)		| ...setox always returns positive
	cmpil		#0,%d0
	blt		t_unfl
	bra		t_ovfl

	.global	setoxm1d
setoxm1d:
|--entry point for EXPM1(X), here X is denormalized
|--Step 0.
	bra		t_extdnrm


	.global	setoxm1
setoxm1:
|--entry point for EXPM1(X), here X is finite, non-zero, non-NaN

|--Step 1.
|--Step 1.1
	movel		(%a0),%d0	 | ...load part of input X
	andil		#0x7FFF0000,%d0	| ...biased expo. of X
	cmpil		#0x3FFD0000,%d0	| ...1/4
	bges		EM1CON1	 | ...|X| >= 1/4
	bra		EM1SM

EM1CON1:
|--Step 1.3
|--The case |X| >= 1/4
	movew		4(%a0),%d0	| ...expo. and partial sig. of |X|
	cmpil		#0x4004C215,%d0	| ...70log2 rounded up to 16 bits
	bles		EM1MAIN	 | ...1/4 <= |X| <= 70log2
	bra		EM1BIG

EM1MAIN:
|--Step 2.
|--This is the case:	1/4 <= |X| <= 70 log2.
	fmovex		(%a0),%fp0	| ...load input from (a0)

	fmovex		%fp0,%fp1
	fmuls		#0x42B8AA3B,%fp0	| ...64/log2 * X
	fmovemx	%fp2-%fp2/%fp3,-(%a7)		| ...save fp2
|	MOVE.W		#$3F81,EM1A4		...prefetch in CB mode
	fmovel		%fp0,%d0		| ...N = int( X * 64/log2 )
	lea		EXPTBL,%a1
	fmovel		%d0,%fp0		| ...convert to floating-format

	movel		%d0,L_SCR1(%a6)			| ...save N temporarily
	andil		#0x3F,%d0		 | ...D0 is J = N mod 64
	lsll		#4,%d0
	addal		%d0,%a1			| ...address of 2^(J/64)
	movel		L_SCR1(%a6),%d0
	asrl		#6,%d0			| ...D0 is M
	movel		%d0,L_SCR1(%a6)			| ...save a copy of M
|	MOVE.W		#$3FDC,L2		...prefetch L2 in CB mode

|--Step 3.
|--fp1,fp2 saved on the stack. fp0 is N, fp1 is X,
|--a0 points to 2^(J/64), D0 and a1 both contain M
	fmovex		%fp0,%fp2
	fmuls		#0xBC317218,%fp0	| ...N * L1, L1 = lead(-log2/64)
	fmulx		L2,%fp2		| ...N * L2, L1+L2 = -log2/64
	faddx		%fp1,%fp0	 | ...X + N*L1
	faddx		%fp2,%fp0	 | ...fp0 is R, reduced arg.
|	MOVE.W		#$3FC5,EM1A2		...load EM1A2 in cache
	addiw		#0x3FFF,%d0		| ...D0 is biased expo. of 2^M

|--Step 4.
|--WE NOW COMPUTE EXP(R)-1 BY A POLYNOMIAL
|-- R + R*R*(A1 + R*(A2 + R*(A3 + R*(A4 + R*(A5 + R*A6)))))
|--TO FULLY UTILIZE THE PIPELINE, WE COMPUTE S = R*R
|--[R*S*(A2+S*(A4+S*A6))] + [R+S*(A1+S*(A3+S*A5))]

	fmovex		%fp0,%fp1
	fmulx		%fp1,%fp1		| ...fp1 IS S = R*R

	fmoves		#0x3950097B,%fp2	| ...fp2 IS a6
|	MOVE.W		#0,2(%a1)	...load 2^(J/64) in cache

	fmulx		%fp1,%fp2		| ...fp2 IS S*A6
	fmovex		%fp1,%fp3
	fmuls		#0x3AB60B6A,%fp3	| ...fp3 IS S*A5

	faddd		EM1A4,%fp2	| ...fp2 IS A4+S*A6
	faddd		EM1A3,%fp3	| ...fp3 IS A3+S*A5
	movew		%d0,SC(%a6)		| ...SC is 2^(M) in extended
	clrw		SC+2(%a6)
	movel		#0x80000000,SC+4(%a6)
	clrl		SC+8(%a6)

	fmulx		%fp1,%fp2		| ...fp2 IS S*(A4+S*A6)
	movel		L_SCR1(%a6),%d0		| ...D0 is	M
	negw		%d0		| ...D0 is -M
	fmulx		%fp1,%fp3		| ...fp3 IS S*(A3+S*A5)
	addiw		#0x3FFF,%d0	| ...biased expo. of 2^(-M)
	faddd		EM1A2,%fp2	| ...fp2 IS A2+S*(A4+S*A6)
	fadds		#0x3F000000,%fp3	| ...fp3 IS A1+S*(A3+S*A5)

	fmulx		%fp1,%fp2		| ...fp2 IS S*(A2+S*(A4+S*A6))
	oriw		#0x8000,%d0	| ...signed/expo. of -2^(-M)
	movew		%d0,ONEBYSC(%a6)	| ...OnebySc is -2^(-M)
	clrw		ONEBYSC+2(%a6)
	movel		#0x80000000,ONEBYSC+4(%a6)
	clrl		ONEBYSC+8(%a6)
	fmulx		%fp3,%fp1		| ...fp1 IS S*(A1+S*(A3+S*A5))
|					...fp3 released

	fmulx		%fp0,%fp2		| ...fp2 IS R*S*(A2+S*(A4+S*A6))
	faddx		%fp1,%fp0		| ...fp0 IS R+S*(A1+S*(A3+S*A5))
|					...fp1 released

	faddx		%fp2,%fp0		| ...fp0 IS EXP(R)-1
|					...fp2 released
	fmovemx	(%a7)+,%fp2-%fp2/%fp3	| ...fp2 restored

|--Step 5
|--Compute 2^(J/64)*p

	fmulx		(%a1),%fp0	| ...2^(J/64)*(Exp(R)-1)

|--Step 6
|--Step 6.1
	movel		L_SCR1(%a6),%d0		| ...retrieve M
	cmpil		#63,%d0
	bles		MLE63
|--Step 6.2	M >= 64
	fmoves		12(%a1),%fp1	| ...fp1 is t
	faddx		ONEBYSC(%a6),%fp1	| ...fp1 is t+OnebySc
	faddx		%fp1,%fp0		| ...p+(t+OnebySc), fp1 released
	faddx		(%a1),%fp0	| ...T+(p+(t+OnebySc))
	bras		EM1SCALE
MLE63:
|--Step 6.3	M <= 63
	cmpil		#-3,%d0
	bges		MGEN3
MLTN3:
|--Step 6.4	M <= -4
	fadds		12(%a1),%fp0	| ...p+t
	faddx		(%a1),%fp0	| ...T+(p+t)
	faddx		ONEBYSC(%a6),%fp0	| ...OnebySc + (T+(p+t))
	bras		EM1SCALE
MGEN3:
|--Step 6.5	-3 <= M <= 63
	fmovex		(%a1)+,%fp1	| ...fp1 is T
	fadds		(%a1),%fp0	| ...fp0 is p+t
	faddx		ONEBYSC(%a6),%fp1	| ...fp1 is T+OnebySc
	faddx		%fp1,%fp0		| ...(T+OnebySc)+(p+t)

EM1SCALE:
|--Step 6.6
	fmovel		%d1,%FPCR
	fmulx		SC(%a6),%fp0

	bra		t_frcinx

EM1SM:
|--Step 7	|X| < 1/4.
	cmpil		#0x3FBE0000,%d0	| ...2^(-65)
	bges		EM1POLY

EM1TINY:
|--Step 8	|X| < 2^(-65)
	cmpil		#0x00330000,%d0	| ...2^(-16312)
	blts		EM12TINY
|--Step 8.2
	movel		#0x80010000,SC(%a6)	| ...SC is -2^(-16382)
	movel		#0x80000000,SC+4(%a6)
	clrl		SC+8(%a6)
	fmovex		(%a0),%fp0
	fmovel		%d1,%FPCR
	faddx		SC(%a6),%fp0

	bra		t_frcinx

EM12TINY:
|--Step 8.3
	fmovex		(%a0),%fp0
	fmuld		TWO140,%fp0
	movel		#0x80010000,SC(%a6)
	movel		#0x80000000,SC+4(%a6)
	clrl		SC+8(%a6)
	faddx		SC(%a6),%fp0
	fmovel		%d1,%FPCR
	fmuld		TWON140,%fp0

	bra		t_frcinx

EM1POLY:
|--Step 9	exp(X)-1 by a simple polynomial
	fmovex		(%a0),%fp0	| ...fp0 is X
	fmulx		%fp0,%fp0		| ...fp0 is S := X*X
	fmovemx	%fp2-%fp2/%fp3,-(%a7)	| ...save fp2
	fmoves		#0x2F30CAA8,%fp1	| ...fp1 is B12
	fmulx		%fp0,%fp1		| ...fp1 is S*B12
	fmoves		#0x310F8290,%fp2	| ...fp2 is B11
	fadds		#0x32D73220,%fp1	| ...fp1 is B10+S*B12

	fmulx		%fp0,%fp2		| ...fp2 is S*B11
	fmulx		%fp0,%fp1		| ...fp1 is S*(B10 + ...

	fadds		#0x3493F281,%fp2	| ...fp2 is B9+S*...
	faddd		EM1B8,%fp1	| ...fp1 is B8+S*...

	fmulx		%fp0,%fp2		| ...fp2 is S*(B9+...
	fmulx		%fp0,%fp1		| ...fp1 is S*(B8+...

	faddd		EM1B7,%fp2	| ...fp2 is B7+S*...
	faddd		EM1B6,%fp1	| ...fp1 is B6+S*...

	fmulx		%fp0,%fp2		| ...fp2 is S*(B7+...
	fmulx		%fp0,%fp1		| ...fp1 is S*(B6+...

	faddd		EM1B5,%fp2	| ...fp2 is B5+S*...
	faddd		EM1B4,%fp1	| ...fp1 is B4+S*...

	fmulx		%fp0,%fp2		| ...fp2 is S*(B5+...
	fmulx		%fp0,%fp1		| ...fp1 is S*(B4+...

	faddd		EM1B3,%fp2	| ...fp2 is B3+S*...
	faddx		EM1B2,%fp1	| ...fp1 is B2+S*...

	fmulx		%fp0,%fp2		| ...fp2 is S*(B3+...
	fmulx		%fp0,%fp1		| ...fp1 is S*(B2+...

	fmulx		%fp0,%fp2		| ...fp2 is S*S*(B3+...)
	fmulx		(%a0),%fp1	| ...fp1 is X*S*(B2...

	fmuls		#0x3F000000,%fp0	| ...fp0 is S*B1
	faddx		%fp2,%fp1		| ...fp1 is Q
|					...fp2 released

	fmovemx	(%a7)+,%fp2-%fp2/%fp3	| ...fp2 restored

	faddx		%fp1,%fp0		| ...fp0 is S*B1+Q
|					...fp1 released

	fmovel		%d1,%FPCR
	faddx		(%a0),%fp0

	bra		t_frcinx

EM1BIG:
|--Step 10	|X| > 70 log2
	movel		(%a0),%d0
	cmpil		#0,%d0
	bgt		EXPC1
|--Step 10.2
	fmoves		#0xBF800000,%fp0	| ...fp0 is -1
	fmovel		%d1,%FPCR
	fadds		#0x00800000,%fp0	| ...-1 + 2^(-126)

	bra		t_frcinx

	|end
|
|	sgetem.sa 3.1 12/10/90
|
|	The entry point sGETEXP returns the exponent portion 
|	of the input argument.  The exponent bias is removed
|	and the exponent value is returned as an extended 
|	precision number in fp0.  sGETEXPD handles denormalized
|	numbers.
|
|	The entry point sGETMAN extracts the mantissa of the 
|	input argument.  The mantissa is converted to an 
|	extended precision number and returned in fp0.  The
|	range of the result is [1.0 - 2.0).
|
|
|	Input:  Double-extended number X in the ETEMP space in
|		the floating-point save stack.
|
|	Output:	The functions return exp(X) or man(X) in fp0.
|
|	Modified: fp0.
|
|
|		Copyright (C) Motorola, Inc. 1990
|			All Rights Reserved
|
|	THIS IS UNPUBLISHED PROPRIETARY SOURCE CODE OF MOTOROLA 
|	The copyright notice above does not evidence any  
|	actual or intended publication of such source code.

|SGETEM	idnt	2,1 | Motorola 040 Floating Point Software Package

	|section 8

	.include "fpsp.h"

	|xref	nrm_set

|
| This entry point is used by the unimplemented instruction exception
| handler.  It points a0 to the input operand.
|
|
|
|	SGETEXP
|

	.global	sgetexp
sgetexp:
	movew	LOCAL_EX(%a0),%d0	|get the exponent
	bclrl	#15,%d0		|clear the sign bit
	subw	#0x3fff,%d0	|subtract off the bias
	fmovew  %d0,%fp0		|move the exp to fp0
	rts

	.global	sgetexpd
sgetexpd:
	bclrb	#sign_bit,LOCAL_EX(%a0)
	bsr	nrm_set		|normalize (exp will go negative)
	movew	LOCAL_EX(%a0),%d0	|load resulting exponent into d0
	subw	#0x3fff,%d0	|subtract off the bias
	fmovew	%d0,%fp0		|move the exp to fp0
	rts
|
|
| This entry point is used by the unimplemented instruction exception
| handler.  It points a0 to the input operand.
|
|
|
|	SGETMAN
|
|
| For normalized numbers, leave the mantissa alone, simply load
| with an exponent of +/- $3fff.
|
	.global	sgetman
sgetman:
	movel	USER_FPCR(%a6),%d0
	andil	#0xffffff00,%d0	|clear rounding precision and mode
	fmovel	%d0,%fpcr		|this fpcr setting is used by the 882
	movew	LOCAL_EX(%a0),%d0	|get the exp (really just want sign bit)
	orw	#0x7fff,%d0	|clear old exp
	bclrl	#14,%d0	 	|make it the new exp +-3fff
	movew	%d0,LOCAL_EX(%a0)	|move the sign & exp back to fsave stack
	fmovex	(%a0),%fp0	|put new value back in fp0
	rts

|
| For denormalized numbers, shift the mantissa until the j-bit = 1,
| then load the exponent with +/1 $3fff.
|
	.global	sgetmand
sgetmand:
	movel	LOCAL_HI(%a0),%d0	|load ms mant in d0
	movel	LOCAL_LO(%a0),%d1	|load ls mant in d1
	bsr	shft		|shift mantissa bits till msbit is set
	movel	%d0,LOCAL_HI(%a0)	|put ms mant back on stack
	movel	%d1,LOCAL_LO(%a0)	|put ls mant back on stack
	bras	sgetman

|
|	SHFT
|
|	Shifts the mantissa bits until msbit is set.
|	input:
|		ms mantissa part in d0
|		ls mantissa part in d1
|	output:
|		shifted bits in d0 and d1
shft:
	tstl	%d0		|if any bits set in ms mant
	bnes	upper		|then branch
|				;else no bits set in ms mant
	tstl	%d1		|test if any bits set in ls mant
	bnes	cont		|if set then continue
	bras	shft_end	|else return
cont:
	movel	%d3,-(%a7)	|save d3
	exg	%d0,%d1		|shift ls mant to ms mant
	bfffo	%d0{#0:#32},%d3	|find first 1 in ls mant to d0
	lsll	%d3,%d0		|shift first 1 to integer bit in ms mant
	movel	(%a7)+,%d3	|restore d3
	bras	shft_end
upper:

	moveml	%d3/%d5/%d6,-(%a7)	|save registers
	bfffo	%d0{#0:#32},%d3	|find first 1 in ls mant to d0
	lsll	%d3,%d0		|shift ms mant until j-bit is set
	movel	%d1,%d6		|save ls mant in d6
	lsll	%d3,%d1		|shift ls mant by count
	movel	#32,%d5
	subl	%d3,%d5		|sub 32 from shift for ls mant
	lsrl	%d5,%d6		|shift off all bits but those that will
|				;be shifted into ms mant
	orl	%d6,%d0		|shift the ls mant bits into the ms mant
	moveml	(%a7)+,%d3/%d5/%d6	|restore registers
shft_end:
	rts

	|end
|
|	sint.sa 3.1 12/10/90
|
|	The entry point sINT computes the rounded integer 
|	equivalent of the input argument, sINTRZ computes 
|	the integer rounded to zero of the input argument.
|
|	Entry points sint and sintrz are called from do_func
|	to emulate the fint and fintrz unimplemented instructions,
|	respectively.  Entry point sintdo is used by bindec.
|
|	Input: (Entry points sint and sintrz) Double-extended
|		number X in the ETEMP space in the floating-point
|		save stack.
|	       (Entry point sintdo) Double-extended number X in
|		location pointed to by the address register a0.
|	       (Entry point sintd) Double-extended denormalized
|		number X in the ETEMP space in the floating-point
|		save stack.
|
|	Output: The function returns int(X) or intrz(X) in fp0.
|
|	Modifies: fp0.
|
|	Algorithm: (sint and sintrz)
|
|	1. If exp(X) >= 63, return X. 
|	   If exp(X) < 0, return +/- 0 or +/- 1, according to
|	   the rounding mode.
|	
|	2. (X is in range) set rsc = 63 - exp(X). Unnormalize the
|	   result to the exponent $403e.
|
|	3. Round the result in the mode given in USER_FPCR. For
|	   sintrz, force round-to-zero mode.
|
|	4. Normalize the rounded result; store in fp0.
|
|	For the denormalized cases, force the correct result
|	for the given sign and rounding mode.
|
|		        Sign(X)
|		RMODE   +    -
|		-----  --------
|		 RN    +0   -0
|		 RZ    +0   -0
|		 RM    +0   -1
|		 RP    +1   -0
|
|
|		Copyright (C) Motorola, Inc. 1990
|			All Rights Reserved
|
|	THIS IS UNPUBLISHED PROPRIETARY SOURCE CODE OF MOTOROLA 
|	The copyright notice above does not evidence any  
|	actual or intended publication of such source code.

|SINT    idnt    2,1 | Motorola 040 Floating Point Software Package

	|section	8

	.include "fpsp.h"

	|xref	dnrm_lp
	|xref	nrm_set
	|xref	round
	|xref	t_inx2
	|xref	ld_pone
	|xref	ld_mone
	|xref	ld_pzero
	|xref	ld_mzero
	|xref	snzrinx

|
|	FINT
|
	.global	sint
sint:
	bfextu	FPCR_MODE(%a6){#2:#2},%d1	|use user's mode for rounding
|					;implicitly has extend precision
|					;in upper word. 
	movel	%d1,L_SCR1(%a6)		|save mode bits
	bras	sintexc			

|
|	FINT with extended denorm inputs.
|
	.global	sintd
sintd:
	btstb	#5,FPCR_MODE(%a6)
	beq	snzrinx		|if round nearest or round zero, +/- 0
	btstb	#4,FPCR_MODE(%a6)
	beqs	rnd_mns
rnd_pls:
	btstb	#sign_bit,LOCAL_EX(%a0)
	bnes	sintmz
	bsr	ld_pone		|if round plus inf and pos, answer is +1
	bra	t_inx2
rnd_mns:
	btstb	#sign_bit,LOCAL_EX(%a0)
	beqs	sintpz
	bsr	ld_mone		|if round mns inf and neg, answer is -1
	bra	t_inx2
sintpz:
	bsr	ld_pzero
	bra	t_inx2
sintmz:
	bsr	ld_mzero
	bra	t_inx2

|
|	FINTRZ
|
	.global	sintrz
sintrz:
	movel	#1,L_SCR1(%a6)		|use rz mode for rounding
|					;implicitly has extend precision
|					;in upper word. 
	bras	sintexc			
|
|	SINTDO
|
|	Input:	a0 points to an IEEE extended format operand
| 	Output:	fp0 has the result 
|
| Exceptions:
|
| If the subroutine results in an inexact operation, the inx2 and
| ainx bits in the USER_FPSR are set.
|
|
	.global	sintdo
sintdo:
	bfextu	FPCR_MODE(%a6){#2:#2},%d1	|use user's mode for rounding
|					;implicitly has ext precision
|					;in upper word. 
	movel	%d1,L_SCR1(%a6)		|save mode bits
|
| Real work of sint is in sintexc
|
sintexc:
	bclrb	#sign_bit,LOCAL_EX(%a0)	|convert to internal extended
|					;format
	sne	LOCAL_SGN(%a0)		
	cmpw	#0x403e,LOCAL_EX(%a0)	|check if (unbiased) exp > 63
	bgts	out_rnge			|branch if exp < 63
	cmpw	#0x3ffd,LOCAL_EX(%a0)	|check if (unbiased) exp < 0
	bgt	in_rnge			|if 63 >= exp > 0, do calc
|
| Input is less than zero.  Restore sign, and check for directed
| rounding modes.  L_SCR1 contains the rmode in the lower byte.
|
un_rnge:
	btstb	#1,L_SCR1+3(%a6)		|check for rn and rz
	beqs	un_rnrz
	tstb	LOCAL_SGN(%a0)		|check for sign
	bnes	un_rmrp_neg
|
| Sign is +.  If rp, load +1.0, if rm, load +0.0
|
	cmpib	#3,L_SCR1+3(%a6)		|check for rp
	beqs	un_ldpone		|if rp, load +1.0
	bsr	ld_pzero		|if rm, load +0.0
	bra	t_inx2
un_ldpone:
	bsr	ld_pone
	bra	t_inx2
|
| Sign is -.  If rm, load -1.0, if rp, load -0.0
|
un_rmrp_neg:
	cmpib	#2,L_SCR1+3(%a6)		|check for rm
	beqs	un_ldmone		|if rm, load -1.0
	bsr	ld_mzero		|if rp, load -0.0
	bra	t_inx2
un_ldmone:
	bsr	ld_mone
	bra	t_inx2
|
| Rmode is rn or rz; return signed zero
|
un_rnrz:
	tstb	LOCAL_SGN(%a0)		|check for sign
	bnes	un_rnrz_neg
	bsr	ld_pzero
	bra	t_inx2
un_rnrz_neg:
	bsr	ld_mzero
	bra	t_inx2
	
|
| Input is greater than 2^63.  All bits are significant.  Return
| the input.
|
out_rnge:
	bfclr	LOCAL_SGN(%a0){#0:#8}	|change back to IEEE ext format
	beqs	intps
	bsetb	#sign_bit,LOCAL_EX(%a0)
intps:
	fmovel	%fpcr,-(%sp)
	fmovel	#0,%fpcr
	fmovex LOCAL_EX(%a0),%fp0	|if exp > 63
|					;then return X to the user
|					;there are no fraction bits
	fmovel	(%sp)+,%fpcr
	rts

in_rnge:
| 					;shift off fraction bits
	clrl	%d0			|clear d0 - initial g,r,s for
|					;dnrm_lp
	movel	#0x403e,%d1		|set threshold for dnrm_lp
|					;assumes a0 points to operand
	bsr	dnrm_lp
|					;returns unnormalized number
|					;pointed by a0
|					;output d0 supplies g,r,s
|					;used by round
	movel	L_SCR1(%a6),%d1		|use selected rounding mode
|
|
	bsr	round			|round the unnorm based on users
|					;input	a0 ptr to ext X
|					;	d0 g,r,s bits
|					;	d1 PREC/MODE info
|					;output a0 ptr to rounded result
|					;inexact flag set in USER_FPSR
|					;if initial grs set
|
| normalize the rounded result and store value in fp0
|
	bsr	nrm_set			|normalize the unnorm
|					;Input: a0 points to operand to
|					;be normalized
|					;Output: a0 points to normalized
|					;result
	bfclr	LOCAL_SGN(%a0){#0:#8}
	beqs	nrmrndp
	bsetb	#sign_bit,LOCAL_EX(%a0)	|return to IEEE extended format
nrmrndp:
	fmovel	%fpcr,-(%sp)
	fmovel	#0,%fpcr
	fmovex LOCAL_EX(%a0),%fp0	|move result to fp0
	fmovel	(%sp)+,%fpcr
	rts

	|end
|
|	skeleton.sa 3.2 4/26/91
|
|	This file contains code that is system dependent and will
|	need to be modified to install the FPSP.
|
|	Each entry point for exception 'xxxx' begins with a 'jmp fpsp_xxxx'.
|	Put any target system specific handling that must be done immediately
|	before the jump instruction.  If there no handling necessary, then
|	the 'fpsp_xxxx' handler entry point should be placed in the exception
|	table so that the 'jmp' can be eliminated. If the FPSP determines that the
|	exception is one that must be reported then there will be a
|	return from the package by a 'jmp real_xxxx'.  At that point
|	the machine state will be identical to the state before
|	the FPSP was entered.  In particular, whatever condition
|	that caused the exception will still be pending when the FPSP
|	package returns.  Thus, there will be system specific code
|	to handle the exception.
|
|	If the exception was completely handled by the package, then
|	the return will be via a 'jmp fpsp_done'.  Unless there is 
|	OS specific work to be done (such as handling a context switch or
|	interrupt) the user program can be resumed via 'rte'.
|
|	In the following skeleton code, some typical 'real_xxxx' handling
|	code is shown.  This code may need to be moved to an appropriate
|	place in the target system, or rewritten.
|	

|		Copyright (C) Motorola, Inc. 1990
|			All Rights Reserved
|
|	THIS IS UNPUBLISHED PROPRIETARY SOURCE CODE OF MOTOROLA 
|	The copyright notice above does not evidence any  
|	actual or intended publication of such source code.

|
|	Modified for Linux-1.3.x by Jes Sorensen (jds@kom.auc.dk)
|

#include <linux/linkage.h>
#include <asm/entry.h>
#include "../kernel/m68k_defs.h"

|SKELETON	idnt    2,1 | Motorola 040 Floating Point Software Package

	|section 15
|
|	The following counters are used for standalone testing
|

	|section 8
 
	.include "fpsp.h"

	|xref	b1238_fix

|
|	Divide by Zero exception
|
|	All dz exceptions are 'real', hence no fpsp_dz entry point.
|
	.global	dz
	.global	real_dz
dz:
real_dz:
	link		%a6,#-LOCAL_SIZE
	fsave		-(%sp)
	bclrb		#E1,E_BYTE(%a6)
	frestore	(%sp)+
	unlk		%a6

	SAVE_ALL_INT
	GET_CURRENT(%d0)
	movel	%sp,%sp@- 		| stack frame pointer argument
	bsrl	SYMBOL_NAME(trap_c)
	addql	#4,%sp
	bral	SYMBOL_NAME(ret_from_exception)

|
|	Inexact exception
|
|	All inexact exceptions are real, but the 'real' handler
|	will probably want to clear the pending exception.
|	The provided code will clear the E3 exception (if pending), 
|	otherwise clear the E1 exception.  The frestore is not really
|	necessary for E1 exceptions.
|
| Code following the 'inex' label is to handle bug #1232.  In this
| bug, if an E1 snan, ovfl, or unfl occurred, and the process was
| swapped out before taking the exception, the exception taken on
| return was inex, rather than the correct exception.  The snan, ovfl,
| and unfl exception to be taken must not have been enabled.  The
| fix is to check for E1, and the existence of one of snan, ovfl,
| or unfl bits set in the fpsr.  If any of these are set, branch
| to the appropriate  handler for the exception in the fpsr.  Note
| that this fix is only for d43b parts, and is skipped if the
| version number is not $40.
| 
|
	.global	real_inex
	.global	inex
inex:
	link		%a6,#-LOCAL_SIZE
	fsave		-(%sp)
	cmpib		#VER_40,(%sp)		|test version number
	bnes		not_fmt40
	fmovel		%fpsr,-(%sp)
	btstb		#E1,E_BYTE(%a6)		|test for E1 set
	beqs		not_b1232
	btstb		#snan_bit,2(%sp) |test for snan
	beq		inex_ckofl
	addl		#4,%sp
	frestore	(%sp)+
	unlk		%a6
	bra		snan
inex_ckofl:
	btstb		#ovfl_bit,2(%sp) |test for ovfl
	beq		inex_ckufl 
	addl		#4,%sp
	frestore	(%sp)+
	unlk		%a6
	bra		ovfl
inex_ckufl:
	btstb		#unfl_bit,2(%sp) |test for unfl
	beq		not_b1232
	addl		#4,%sp
	frestore	(%sp)+
	unlk		%a6
	bra		unfl

|
| We do not have the bug 1232 case.  Clean up the stack and call
| real_inex.
|
not_b1232:
	addl		#4,%sp
	frestore	(%sp)+
	unlk		%a6

real_inex:

	link		%a6,#-LOCAL_SIZE
	fsave		-(%sp)
not_fmt40:
	bclrb		#E3,E_BYTE(%a6)		|clear and test E3 flag
	beqs		inex_cke1
|
| Clear dirty bit on dest resister in the frame before branching
| to b1238_fix.
|
	moveml		%d0/%d1,USER_DA(%a6)
	bfextu		CMDREG1B(%a6){#6:#3},%d0		|get dest reg no
	bclrb		%d0,FPR_DIRTY_BITS(%a6)	|clr dest dirty bit
	bsrl		b1238_fix		|test for bug1238 case
	moveml		USER_DA(%a6),%d0/%d1
	bras		inex_done
inex_cke1:
	bclrb		#E1,E_BYTE(%a6)
inex_done:
	frestore	(%sp)+
	unlk		%a6

	SAVE_ALL_INT
	GET_CURRENT(%d0)
	movel	%sp,%sp@- 		| stack frame pointer argument
	bsrl	SYMBOL_NAME(trap_c)
	addql	#4,%sp
	bral	SYMBOL_NAME(ret_from_exception)
	
|
|	Overflow exception
|
	|xref	fpsp_ovfl
	.global	real_ovfl
	.global	ovfl
ovfl:
	jmp	fpsp_ovfl
real_ovfl:

	link		%a6,#-LOCAL_SIZE
	fsave		-(%sp)
	bclrb		#E3,E_BYTE(%a6)		|clear and test E3 flag
	bnes		ovfl_done
	bclrb		#E1,E_BYTE(%a6)
ovfl_done:
	frestore	(%sp)+
	unlk		%a6

	SAVE_ALL_INT
	GET_CURRENT(%d0)
	movel	%sp,%sp@- 		| stack frame pointer argument
	bsrl	SYMBOL_NAME(trap_c)
	addql	#4,%sp
	bral	SYMBOL_NAME(ret_from_exception)
	
|
|	Underflow exception
|
	|xref	fpsp_unfl
	.global	real_unfl
	.global	unfl
unfl:
	jmp	fpsp_unfl
real_unfl:

	link		%a6,#-LOCAL_SIZE
	fsave		-(%sp)
	bclrb		#E3,E_BYTE(%a6)		|clear and test E3 flag
	bnes		unfl_done
	bclrb		#E1,E_BYTE(%a6)
unfl_done:
	frestore	(%sp)+
	unlk		%a6

	SAVE_ALL_INT
	GET_CURRENT(%d0)
	movel	%sp,%sp@- 		| stack frame pointer argument
	bsrl	SYMBOL_NAME(trap_c)
	addql	#4,%sp
	bral	SYMBOL_NAME(ret_from_exception)
	
|
|	Signalling NAN exception
|
	|xref	fpsp_snan
	.global	real_snan
	.global	snan
snan:
	jmp	fpsp_snan
real_snan:
	link		%a6,#-LOCAL_SIZE
	fsave		-(%sp)
	bclrb		#E1,E_BYTE(%a6)	|snan is always an E1 exception
	frestore	(%sp)+
	unlk		%a6

	SAVE_ALL_INT
	GET_CURRENT(%d0)
	movel	%sp,%sp@- 		| stack frame pointer argument
	bsrl	SYMBOL_NAME(trap_c)
	addql	#4,%sp
	bral	SYMBOL_NAME(ret_from_exception)
	
|
|	Operand Error exception
|
	|xref	fpsp_operr
	.global	real_operr
	.global	operr
operr:
	jmp	fpsp_operr
real_operr:
	link		%a6,#-LOCAL_SIZE
	fsave		-(%sp)
	bclrb		#E1,E_BYTE(%a6)	|operr is always an E1 exception
	frestore	(%sp)+
	unlk		%a6

	SAVE_ALL_INT
	GET_CURRENT(%d0)
	movel	%sp,%sp@- 		| stack frame pointer argument
	bsrl	SYMBOL_NAME(trap_c)
	addql	#4,%sp
	bral	SYMBOL_NAME(ret_from_exception)

	
|
|	BSUN exception
|
|	This sample handler simply clears the nan bit in the FPSR.
|
	|xref	fpsp_bsun
	.global	real_bsun
	.global	bsun
bsun:
	jmp	fpsp_bsun
real_bsun:
	link		%a6,#-LOCAL_SIZE
	fsave		-(%sp)
	bclrb		#E1,E_BYTE(%a6)	|bsun is always an E1 exception
	fmovel		%FPSR,-(%sp)
	bclrb		#nan_bit,(%sp)
	fmovel		(%sp)+,%FPSR
	frestore	(%sp)+
	unlk		%a6

	SAVE_ALL_INT
	GET_CURRENT(%d0)
	movel	%sp,%sp@- 		| stack frame pointer argument
	bsrl	SYMBOL_NAME(trap_c)
	addql	#4,%sp
	bral	SYMBOL_NAME(ret_from_exception)

|
|	F-line exception
|
|	A 'real' F-line exception is one that the FPSP isn't supposed to 
|	handle. E.g. an instruction with a co-processor ID that is not 1.
|
|
	|xref	fpsp_fline
	.global	real_fline
	.global	fline
fline:
	jmp	fpsp_fline
real_fline:

	SAVE_ALL_INT
	GET_CURRENT(%d0)
	movel	%sp,%sp@- 		| stack frame pointer argument
	bsrl	SYMBOL_NAME(trap_c)
	addql	#4,%sp
	bral	SYMBOL_NAME(ret_from_exception)

|
|	Unsupported data type exception
|
	|xref	fpsp_unsupp
	.global	real_unsupp
	.global	unsupp
unsupp:
	jmp	fpsp_unsupp
real_unsupp:
	link		%a6,#-LOCAL_SIZE
	fsave		-(%sp)
	bclrb		#E1,E_BYTE(%a6)	|unsupp is always an E1 exception
	frestore	(%sp)+
	unlk		%a6

	SAVE_ALL_INT
	GET_CURRENT(%d0)
	movel	%sp,%sp@- 		| stack frame pointer argument
	bsrl	SYMBOL_NAME(trap_c)
	addql	#4,%sp
	bral	SYMBOL_NAME(ret_from_exception)

|
|	Trace exception
|
	.global	real_trace
real_trace:
	|
	bral	SYMBOL_NAME(trap)

|
|	fpsp_fmt_error --- exit point for frame format error
|
|	The fpu stack frame does not match the frames existing
|	or planned at the time of this writing.  The fpsp is
|	unable to handle frame sizes not in the following
|	version:size pairs:
|
|	{4060, 4160} - busy frame
|	{4028, 4130} - unimp frame
|	{4000, 4100} - idle frame
|
|	This entry point simply holds an f-line illegal value.  
|	Replace this with a call to your kernel panic code or
|	code to handle future revisions of the fpu.
|
	.global	fpsp_fmt_error
fpsp_fmt_error:

	.long	0xf27f0000	|f-line illegal 

|
|	fpsp_done --- FPSP exit point
|
|	The exception has been handled by the package and we are ready
|	to return to user mode, but there may be OS specific code
|	to execute before we do.  If there is, do it now.
|
|

	.global	fpsp_done
fpsp_done:
	btst	#0x5,%sp@		| supervisor bit set in saved SR?
	beq	.Lnotkern
	rte
.Lnotkern:
	SAVE_ALL_INT
	GET_CURRENT(%d0)
	tstl	%curptr@(TASK_NEEDRESCHED)
	jne	SYMBOL_NAME(ret_from_exception)	| deliver signals,
						| reschedule etc..
	RESTORE_ALL

|
|	mem_write --- write to user or supervisor address space
|
| Writes to memory while in supervisor mode.  copyout accomplishes
| this via a 'moves' instruction.  copyout is a UNIX SVR3 (and later) function.
| If you don't have copyout, use the local copy of the function below.
|
|	a0 - supervisor source address
|	a1 - user destination address
|	d0 - number of bytes to write (maximum count is 12)
|
| The supervisor source address is guaranteed to point into the supervisor
| stack.  The result is that a UNIX
| process is allowed to sleep as a consequence of a page fault during
| copyout.  The probability of a page fault is exceedingly small because
| the 68040 always reads the destination address and thus the page
| faults should have already been handled.
|
| If the EXC_SR shows that the exception was from supervisor space,
| then just do a dumb (and slow) memory move.  In a UNIX environment
| there shouldn't be any supervisor mode floating point exceptions.
|
	.global	mem_write
mem_write:
	btstb	#5,EXC_SR(%a6)	|check for supervisor state
	beqs	user_write
super_write:
	moveb	(%a0)+,(%a1)+
	subql	#1,%d0
	bnes	super_write
	rts
user_write:
	movel	%d1,-(%sp)	|preserve d1 just in case
	movel	%d0,-(%sp)
	movel	%a1,-(%sp)
	movel	%a0,-(%sp)
	jsr		copyout
	addw	#12,%sp
	movel	(%sp)+,%d1
	rts
|
|	mem_read --- read from user or supervisor address space
|
| Reads from memory while in supervisor mode.  copyin accomplishes
| this via a 'moves' instruction.  copyin is a UNIX SVR3 (and later) function.
| If you don't have copyin, use the local copy of the function below.
|
| The FPSP calls mem_read to read the original F-line instruction in order
| to extract the data register number when the 'Dn' addressing mode is
| used.
|
|Input:
|	a0 - user source address
|	a1 - supervisor destination address
|	d0 - number of bytes to read (maximum count is 12)
|
| Like mem_write, mem_read always reads with a supervisor 
| destination address on the supervisor stack.  Also like mem_write,
| the EXC_SR is checked and a simple memory copy is done if reading
| from supervisor space is indicated.
|
	.global	mem_read
mem_read:
	btstb	#5,EXC_SR(%a6)	|check for supervisor state
	beqs	user_read
super_read:
	moveb	(%a0)+,(%a1)+
	subql	#1,%d0
	bnes	super_read
	rts
user_read:
	movel	%d1,-(%sp)	|preserve d1 just in case
	movel	%d0,-(%sp)
	movel	%a1,-(%sp)
	movel	%a0,-(%sp)
	jsr	copyin
	addw	#12,%sp
	movel	(%sp)+,%d1
	rts

|
| Use these routines if your kernel doesn't have copyout/copyin equivalents.
| Assumes that D0/D1/A0/A1 are scratch registers. copyout overwrites DFC,
| and copyin overwrites SFC.
|
copyout:
	movel	4(%sp),%a0	| source
	movel	8(%sp),%a1	| destination
	movel	12(%sp),%d0	| count
	subl	#1,%d0		| dec count by 1 for dbra
	movel	#1,%d1

|	DFC is already set
|	movec	%d1,%DFC		| set dfc for user data space
moreout:
	moveb	(%a0)+,%d1	| fetch supervisor byte
out_ea:
	movesb	%d1,(%a1)+	| write user byte
	dbf	%d0,moreout
	rts

copyin:
	movel	4(%sp),%a0	| source
	movel	8(%sp),%a1	| destination
	movel	12(%sp),%d0	| count
	subl	#1,%d0		| dec count by 1 for dbra
	movel	#1,%d1
|	SFC is already set
|	movec	%d1,%SFC		| set sfc for user space
morein:
in_ea:
	movesb	(%a0)+,%d1	| fetch user byte
	moveb	%d1,(%a1)+	| write supervisor byte
	dbf	%d0,morein
	rts

	.section .fixup,#alloc,#execinstr
	.even
1:
	jbra	SYMBOL_NAME(fpsp040_die)

	.section __ex_table,#alloc
	.align	4

	.long	in_ea,1b
	.long	out_ea,1b

	|end
|
|	slog2.sa 3.1 12/10/90
|
|       The entry point slog10 computes the base-10 
|	logarithm of an input argument X.
|	slog10d does the same except the input value is a 
|	denormalized number.  
|	sLog2 and sLog2d are the base-2 analogues.
|
|       INPUT:	Double-extended value in memory location pointed to 
|		by address register a0.
|
|       OUTPUT: log_10(X) or log_2(X) returned in floating-point 
|		register fp0.
|
|       ACCURACY and MONOTONICITY: The returned result is within 1.7 
|		ulps in 64 significant bit, i.e. within 0.5003 ulp 
|		to 53 bits if the result is subsequently rounded 
|		to double precision. The result is provably monotonic 
|		in double precision.
|
|       SPEED:	Two timings are measured, both in the copy-back mode. 
|		The first one is measured when the function is invoked 
|		the first time (so the instructions and data are not 
|		in cache), and the second one is measured when the 
|		function is reinvoked at the same input argument.
|
|       ALGORITHM and IMPLEMENTATION NOTES:
|
|       slog10d:
|
|       Step 0.   If X < 0, create a NaN and raise the invalid operation
|                 flag. Otherwise, save FPCR in D1; set FpCR to default.
|       Notes:    Default means round-to-nearest mode, no floating-point
|                 traps, and precision control = double extended.
|
|       Step 1.   Call slognd to obtain Y = log(X), the natural log of X.
|       Notes:    Even if X is denormalized, log(X) is always normalized.
|
|       Step 2.   Compute log_10(X) = log(X) * (1/log(10)).
|            2.1  Restore the user FPCR
|            2.2  Return ans := Y * INV_L10.
|
|
|       slog10: 
|
|       Step 0.   If X < 0, create a NaN and raise the invalid operation
|                 flag. Otherwise, save FPCR in D1; set FpCR to default.
|       Notes:    Default means round-to-nearest mode, no floating-point
|                 traps, and precision control = double extended.
|
|       Step 1.   Call sLogN to obtain Y = log(X), the natural log of X.
|
|       Step 2.   Compute log_10(X) = log(X) * (1/log(10)).
|            2.1  Restore the user FPCR
|            2.2  Return ans := Y * INV_L10.
|
|
|       sLog2d:
|
|       Step 0.   If X < 0, create a NaN and raise the invalid operation
|                 flag. Otherwise, save FPCR in D1; set FpCR to default.
|       Notes:    Default means round-to-nearest mode, no floating-point
|                 traps, and precision control = double extended.
|
|       Step 1.   Call slognd to obtain Y = log(X), the natural log of X.
|       Notes:    Even if X is denormalized, log(X) is always normalized.
|
|       Step 2.   Compute log_10(X) = log(X) * (1/log(2)).
|            2.1  Restore the user FPCR
|            2.2  Return ans := Y * INV_L2.
|
|
|       sLog2:
|
|       Step 0.   If X < 0, create a NaN and raise the invalid operation
|                 flag. Otherwise, save FPCR in D1; set FpCR to default.
|       Notes:    Default means round-to-nearest mode, no floating-point
|                 traps, and precision control = double extended.
|
|       Step 1.   If X is not an integer power of two, i.e., X != 2^k,
|                 go to Step 3.
|
|       Step 2.   Return k.
|            2.1  Get integer k, X = 2^k.
|            2.2  Restore the user FPCR.
|            2.3  Return ans := convert-to-double-extended(k).
|
|       Step 3.   Call sLogN to obtain Y = log(X), the natural log of X.
|
|       Step 4.   Compute log_2(X) = log(X) * (1/log(2)).
|            4.1  Restore the user FPCR
|            4.2  Return ans := Y * INV_L2.
|

|		Copyright (C) Motorola, Inc. 1990
|			All Rights Reserved
|
|	THIS IS UNPUBLISHED PROPRIETARY SOURCE CODE OF MOTOROLA 
|	The copyright notice above does not evidence any  
|	actual or intended publication of such source code.

|SLOG2    idnt    2,1 | Motorola 040 Floating Point Software Package

	|section	8

	|xref	t_frcinx	
	|xref	t_operr
	|xref	slogn
	|xref	slognd

INV_L10:  .long 0x3FFD0000,0xDE5BD8A9,0x37287195,0x00000000

INV_L2:   .long 0x3FFF0000,0xB8AA3B29,0x5C17F0BC,0x00000000

	.global	slog10d
slog10d:
|--entry point for Log10(X), X is denormalized
	movel		(%a0),%d0
	blt		invalid
	movel		%d1,-(%sp)
	clrl		%d1
	bsr		slognd			| ...log(X), X denorm.
	fmovel		(%sp)+,%fpcr
	fmulx		INV_L10,%fp0
	bra		t_frcinx

	.global	slog10
slog10:
|--entry point for Log10(X), X is normalized

	movel		(%a0),%d0
	blt		invalid
	movel		%d1,-(%sp)
	clrl		%d1
	bsr		slogn			| ...log(X), X normal.
	fmovel		(%sp)+,%fpcr
	fmulx		INV_L10,%fp0
	bra		t_frcinx


	.global	slog2d
slog2d:
|--entry point for Log2(X), X is denormalized

	movel		(%a0),%d0
	blt		invalid
	movel		%d1,-(%sp)
	clrl		%d1
	bsr		slognd			| ...log(X), X denorm.
	fmovel		(%sp)+,%fpcr
	fmulx		INV_L2,%fp0
	bra		t_frcinx

	.global	slog2
slog2:
|--entry point for Log2(X), X is normalized
	movel		(%a0),%d0
	blt		invalid

	movel		8(%a0),%d0
	bnes		continue		| ...X is not 2^k

	movel		4(%a0),%d0
	andl		#0x7FFFFFFF,%d0
	tstl		%d0
	bnes		continue

|--X = 2^k.
	movew		(%a0),%d0
	andl		#0x00007FFF,%d0
	subl		#0x3FFF,%d0
	fmovel		%d1,%fpcr
	fmovel		%d0,%fp0
	bra		t_frcinx

continue:
	movel		%d1,-(%sp)
	clrl		%d1
	bsr		slogn			| ...log(X), X normal.
	fmovel		(%sp)+,%fpcr
	fmulx		INV_L2,%fp0
	bra		t_frcinx

invalid:
	bra		t_operr

	|end
VENDOR_3COM == 1) && ($CONFIG_ISA == 1 || $CONFIG_ISA == 2 || $CONFIG_ISA == 4)} then {write_tristate $cfg $autocfg CONFIG_EL1 $CONFIG_EL1 [list $CONFIG_ISA] 2 }
	global CONFIG_EL2
	if {($CONFIG_NET == 1) && ($CONFIG_NETDEVICES == 1) && ($CONFIG_NET_ETHERNET == 1) && ($CONFIG_NET_VENDOR_3COM == 1) && ($CONFIG_ISA == 1 || $CONFIG_ISA == 2 || $CONFIG_ISA == 4)} then {write_tristate $cfg $autocfg CONFIG_EL2 $CONFIG_EL2 [list $CONFIG_ISA] 2 }
	global CONFIG_ELPLUS
	if {($CONFIG_NET == 1) && ($CONFIG_NETDEVICES == 1) && ($CONFIG_NET_ETHERNET == 1) && ($CONFIG_NET_VENDOR_3COM == 1) && ($CONFIG_ISA == 1 || $CONFIG_ISA == 2 || $CONFIG_ISA == 4)} then {write_tristate $cfg $autocfg CONFIG_ELPLUS $CONFIG_ELPLUS [list $CONFIG_ISA] 2 }
	global CONFIG_EL16
	if {($CONFIG_NET == 1) && ($CONFIG_NETDEVICES == 1) && ($CONFIG_NET_ETHERNET == 1) && ($CONFIG_NET_VENDOR_3COM == 1) && ($CONFIG_ISA == 1 || $CONFIG_ISA == 2 || $CONFIG_ISA == 4) && ($CONFIG_EXPERIMENTAL == 1 || $CONFIG_EXPERIMENTAL == 2 || $CONFIG_EXPERIMENTAL == 4)} then {write_tristate $cfg $autocfg CONFIG_EL16 $CONFIG_EL16 [list $CONFIG_ISA $CONFIG_EXPERIMENTAL] 2 }
	global CONFIG_EL3
	if {($CONFIG_NET == 1) && ($CONFIG_NETDEVICES == 1) && ($CONFIG_NET_ETHERNET == 1) && ($CONFIG_NET_VENDOR_3COM == 1) && ($CONFIG_ISA == 1 || $CONFIG_EISA == 1 || $CONFIG_MCA == 1)} then {write_tristate $cfg $autocfg CONFIG_EL3 $CONFIG_EL3 [list $notmod] 2 }
	global CONFIG_3C515
	if {($CONFIG_NET == 1) && ($CONFIG_NETDEVICES == 1) && ($CONFIG_NET_ETHERNET == 1) && ($CONFIG_NET_VENDOR_3COM == 1) && ($CONFIG_ISA == 1 || $CONFIG_EISA == 1)} then {write_tristate $cfg $autocfg CONFIG_3C515 $CONFIG_3C515 [list $notmod] 2 }
	global CONFIG_ELMC
	if {($CONFIG_NET == 1) && ($CONFIG_NETDEVICES == 1) && ($CONFIG_NET_ETHERNET == 1) && ($CONFIG_NET_VENDOR_3COM == 1) && ($CONFIG_MCA == 1 || $CONFIG_MCA == 2 || $CONFIG_MCA == 4)} then {write_tristate $cfg $autocfg CONFIG_ELMC $CONFIG_ELMC [list $CONFIG_MCA] 2 }
	global CONFIG_ELMC_II
	if {($CONFIG_NET == 1) && ($CONFIG_NETDEVICES == 1) && ($CONFIG_NET_ETHERNET == 1) && ($CONFIG_NET_VENDOR_3COM == 1) && ($CONFIG_MCA == 1 || $CONFIG_MCA == 2 || $CONFIG_MCA == 4) && ($CONFIG_EXPERIMENTAL == 1 || $CONFIG_EXPERIMENTAL == 2 || $CONFIG_EXPERIMENTAL == 4)} then {write_tristate $cfg $autocfg CONFIG_ELMC_II $CONFIG_ELMC_II [list $CONFIG_MCA $CONFIG_EXPERIMENTAL] 2 }
	global CONFIG_VORTEX
	if {($CONFIG_NET == 1) && ($CONFIG_NETDEVICES == 1) && ($CONFIG_NET_ETHERNET == 1) && ($CONFIG_NET_VENDOR_3COM == 1) && ($CONFIG_PCI == 1 || $CONFIG_EISA == 1)} then {write_tristate $cfg $autocfg CONFIG_VORTEX $CONFIG_VORTEX [list $notmod] 2 }
	global CONFIG_LANCE
	if {($CONFIG_NET == 1) && ($CONFIG_NETDEVICES == 1) && ($CONFIG_NET_ETHERNET == 1) && ($CONFIG_ISA == 1 || $CONFIG_ISA == 2 || $CONFIG_ISA == 4)} then {write_tristate $cfg $autocfg CONFIG_LANCE $CONFIG_LANCE [list $CONFIG_ISA] 2 }
	global CONFIG_NET_VENDOR_SMC
	if {($CONFIG_NET == 1) && ($CONFIG_NETDEVICES == 1) && ($CONFIG_NET_ETHERNET == 1)} then {write_tristate $cfg $autocfg CONFIG_NET_VENDOR_SMC $CONFIG_NET_VENDOR_SMC [list $notmod] 2 }
	global CONFIG_WD80x3
	if {($CONFIG_NET == 1) && ($CONFIG_NETDEVICES == 1) && ($CONFIG_NET_ETHERNET == 1) && ($CONFIG_NET_VENDOR_SMC == 1) && ($CONFIG_ISA == 1 || $CONFIG_ISA == 2 || $CONFIG_ISA == 4)} then {write_tristate $cfg $autocfg CONFIG_WD80x3 $CONFIG_WD80x3 [list $CONFIG_ISA] 2 }
	global CONFIG_ULTRAMCA
	if {($CONFIG_NET == 1) && ($CONFIG_NETDEVICES == 1) && ($CONFIG_NET_ETHERNET == 1) && ($CONFIG_NET_VENDOR_SMC == 1) && ($CONFIG_MCA == 1 || $CONFIG_MCA == 2 || $CONFIG_MCA == 4)} then {write_tristate $cfg $autocfg CONFIG_ULTRAMCA $CONFIG_ULTRAMCA [list $CONFIG_MCA] 2 }
	global CONFIG_ULTRA
	if {($CONFIG_NET == 1) && ($CONFIG_NETDEVICES == 1) && ($CONFIG_NET_ETHERNET == 1) && ($CONFIG_NET_VENDOR_SMC == 1) && ($CONFIG_ISA == 1 || $CONFIG_ISA == 2 || $CONFIG_ISA == 4)} then {write_tristate $cfg $autocfg CONFIG_ULTRA $CONFIG_ULTRA [list $CONFIG_ISA] 2 }
	global CONFIG_ULTRA32
	if {($CONFIG_NET == 1) && ($CONFIG_NETDEVICES == 1) && ($CONFIG_NET_ETHERNET == 1) && ($CONFIG_NET_VENDOR_SMC == 1) && ($CONFIG_EISA == 1 || $CONFIG_EISA == 2 || $CONFIG_EISA == 4)} then {write_tristate $cfg $autocfg CONFIG_ULTRA32 $CONFIG_ULTRA32 [list $CONFIG_EISA] 2 }
	global CONFIG_SMC9194
	if {($CONFIG_NET == 1) && ($CONFIG_NETDEVICES == 1) && ($CONFIG_NET_ETHERNET == 1) && ($CONFIG_NET_VENDOR_SMC == 1) && ($CONFIG_ISA == 1 || $CONFIG_ISA == 2 || $CONFIG_ISA == 4)} then {write_tristate $cfg $autocfg CONFIG_SMC9194 $CONFIG_SMC9194 [list $CONFIG_ISA] 2 }
	global CONFIG_NET_VENDOR_RACAL
	if {($CONFIG_NET == 1) && ($CONFIG_NETDEVICES == 1) && ($CONFIG_NET_ETHERNET == 1)} then {write_tristate $cfg $autocfg CONFIG_NET_VENDOR_RACAL $CONFIG_NET_VENDOR_RACAL [list $notmod] 2 }
	global CONFIG_NI5010
	if {($CONFIG_NET == 1) && ($CONFIG_NETDEVICES == 1) && ($CONFIG_NET_ETHERNET == 1) && ($CONFIG_NET_VENDOR_RACAL == 1) && ($CONFIG_ISA == 1 || $CONFIG_ISA == 2 || $CONFIG_ISA == 4) && ($CONFIG_EXPERIMENTAL == 1 || $CONFIG_EXPERIMENTAL == 2 || $CONFIG_EXPERIMENTAL == 4)} then {write_tristate $cfg $autocfg CONFIG_NI5010 $CONFIG_NI5010 [list $CONFIG_ISA $CONFIG_EXPERIMENTAL] 2 }
	global CONFIG_NI52
	if {($CONFIG_NET == 1) && ($CONFIG_NETDEVICES == 1) && ($CONFIG_NET_ETHERNET == 1) && ($CONFIG_NET_VENDOR_RACAL == 1) && ($CONFIG_ISA == 1 || $CONFIG_ISA == 2 || $CONFIG_ISA == 4)} then {write_tristate $cfg $autocfg CONFIG_NI52 $CONFIG_NI52 [list $CONFIG_ISA] 2 }
	global CONFIG_NI65
	if {($CONFIG_NET == 1) && ($CONFIG_NETDEVICES == 1) && ($CONFIG_NET_ETHERNET == 1) && ($CONFIG_NET_VENDOR_RACAL == 1) && ($CONFIG_ISA == 1 || $CONFIG_ISA == 2 || $CONFIG_ISA == 4)} then {write_tristate $cfg $autocfg CONFIG_NI65 $CONFIG_NI65 [list $CONFIG_ISA] 2 }
	global CONFIG_AT1700
	if {($CONFIG_NET == 1) && ($CONFIG_NETDEVICES == 1) && ($CONFIG_NET_ETHERNET == 1) && ($CONFIG_ISA == 1 || $CONFIG_MCA == 1) && ($CONFIG_EXPERIMENTAL == 1 || $CONFIG_EXPERIMENTAL == 2 || $CONFIG_EXPERIMENTAL == 4)} then {write_tristate $cfg $autocfg CONFIG_AT1700 $CONFIG_AT1700 [list $CONFIG_EXPERIMENTAL] 2 }
	global CONFIG_DEPCA
	if {($CONFIG_NET == 1) && ($CONFIG_NETDEVICES == 1) && ($CONFIG_NET_ETHERNET == 1) && ($CONFIG_ISA == 1 || $CONFIG_EISA == 1 || $CONFIG_MCA == 1)} then {write_tristate $cfg $autocfg CONFIG_DEPCA $CONFIG_DEPCA [list $notmod] 2 }
	global CONFIG_HP100
	if {($CONFIG_NET == 1) && ($CONFIG_NETDEVICES == 1) && ($CONFIG_NET_ETHERNET == 1) && ($CONFIG_ISA == 1 || $CONFIG_EISA == 1 || $CONFIG_PCI == 1)} then {write_tristate $cfg $autocfg CONFIG_HP100 $CONFIG_HP100 [list $notmod] 2 }
	global CONFIG_NET_ISA
	if {($CONFIG_NET == 1) && ($CONFIG_NETDEVICES == 1) && ($CONFIG_NET_ETHERNET == 1) && ($CONFIG_ISA == 1 || $CONFIG_ISA == 4)} then {write_tristate $cfg $autocfg CONFIG_NET_ISA $CONFIG_NET_ISA [list $CONFIG_ISA] 2 }
	global CONFIG_E2100
	if {($CONFIG_NET == 1) && ($CONFIG_NETDEVICES == 1) && ($CONFIG_NET_ETHERNET == 1) && ($CONFIG_NET_ISA == 1)} then {write_tristate $cfg $autocfg CONFIG_E2100 $CONFIG_E2100 [list $notmod] 2 }
	global CONFIG_EWRK3
	if {($CONFIG_NET == 1) && ($CONFIG_NETDEVICES == 1) && ($CONFIG_NET_ETHERNET == 1) && ($CONFIG_NET_ISA == 1)} then {write_tristate $cfg $autocfg CONFIG_EWRK3 $CONFIG_EWRK3 [list $notmod] 2 }
	global CONFIG_EEXPRESS
	if {($CONFIG_NET == 1) && ($CONFIG_NETDEVICES == 1) && ($CONFIG_NET_ETHERNET == 1) && ($CONFIG_NET_ISA == 1)} then {write_tristate $cfg $autocfg CONFIG_EEXPRESS $CONFIG_EEXPRESS [list $notmod] 2 }
	global CONFIG_EEXPRESS_PRO
	if {($CONFIG_NET == 1) && ($CONFIG_NETDEVICES == 1) && ($CONFIG_NET_ETHERNET == 1) && ($CONFIG_NET_ISA == 1)} then {write_tristate $cfg $autocfg CONFIG_EEXPRESS_PRO $CONFIG_EEXPRESS_PRO [list $notmod] 2 }
	global CONFIG_HPLAN_PLUS
	if {($CONFIG_NET == 1) && ($CONFIG_NETDEVICES == 1) && ($CONFIG_NET_ETHERNET == 1) && ($CONFIG_NET_ISA == 1)} then {write_tristate $cfg $autocfg CONFIG_HPLAN_PLUS $CONFIG_HPLAN_PLUS [list $notmod] 2 }
	global CONFIG_HPLAN
	if {($CONFIG_NET == 1) && ($CONFIG_NETDEVICES == 1) && ($CONFIG_NET_ETHERNET == 1) && ($CONFIG_NET_ISA == 1)} then {write_tristate $cfg $autocfg CONFIG_HPLAN $CONFIG_HPLAN [list $notmod] 2 }
	global CONFIG_LP486E
	if {($CONFIG_NET == 1) && ($CONFIG_NETDEVICES == 1) && ($CONFIG_NET_ETHERNET == 1) && ($CONFIG_NET_ISA == 1)} then {write_tristate $cfg $autocfg CONFIG_LP486E $CONFIG_LP486E [list $notmod] 2 }
	global CONFIG_ETH16I
	if {($CONFIG_NET == 1) && ($CONFIG_NETDEVICES == 1) && ($CONFIG_NET_ETHERNET == 1) && ($CONFIG_NET_ISA == 1)} then {write_tristate $cfg $autocfg CONFIG_ETH16I $CONFIG_ETH16I [list $notmod] 2 }
	global CONFIG_NE2000
	if {($CONFIG_NET == 1) && ($CONFIG_NETDEVICES == 1) && ($CONFIG_NET_ETHERNET == 1) && ($CONFIG_NET_ISA == 1)} then {write_tristate $cfg $autocfg CONFIG_NE2000 $CONFIG_NE2000 [list $notmod] 2 }
	global CONFIG_SKMC
	if {($CONFIG_NET == 1) && ($CONFIG_NETDEVICES == 1) && ($CONFIG_NET_ETHERNET == 1) && ($CONFIG_MCA == 1)} then {write_tristate $cfg $autocfg CONFIG_SKMC $CONFIG_SKMC [list $notmod] 2 }
	global CONFIG_NE2_MCA
	if {($CONFIG_NET == 1) && ($CONFIG_NETDEVICES == 1) && ($CONFIG_NET_ETHERNET == 1) && ($CONFIG_MCA == 1)} then {write_tristate $cfg $autocfg CONFIG_NE2_MCA $CONFIG_NE2_MCA [list $notmod] 2 }
	global CONFIG_IBMLANA
	if {($CONFIG_NET == 1) && ($CONFIG_NETDEVICES == 1) && ($CONFIG_NET_ETHERNET == 1) && ($CONFIG_MCA == 1)} then {write_tristate $cfg $autocfg CONFIG_IBMLANA $CONFIG_IBMLANA [list $notmod] 2 }
	global CONFIG_NET_PCI
	if {($CONFIG_NET == 1) && ($CONFIG_NETDEVICES == 1) && ($CONFIG_NET_ETHERNET == 1) && ($CONFIG_ISA == 1 || $CONFIG_EISA == 1 || $CONFIG_PCI == 1)} then {write_tristate $cfg $autocfg CONFIG_NET_PCI $CONFIG_NET_PCI [list $notmod] 2 }
	if {($CONFIG_NET == 1) && ($CONFIG_NETDEVICES == 1) && ($CONFIG_NET_ETHERNET == 1) && ($CONFIG_ISA != 1 && $CONFIG_EISA != 1 && $CONFIG_PCI != 1)} then {write_tristate $cfg $autocfg CONFIG_NET_PCI $CONSTANT_N [list $notmod] 2 }
	global CONFIG_PCNET32
	if {($CONFIG_NET == 1) && ($CONFIG_NETDEVICES == 1) && ($CONFIG_NET_ETHERNET == 1) && ($CONFIG_NET_PCI == 1) && ($CONFIG_PCI == 1 || $CONFIG_PCI == 2 || $CONFIG_PCI == 4)} then {write_tristate $cfg $autocfg CONFIG_PCNET32 $CONFIG_PCNET32 [list $CONFIG_PCI] 2 }
	global CONFIG_ADAPTEC_STARFIRE
	if {($CONFIG_NET == 1) && ($CONFIG_NETDEVICES == 1) && ($CONFIG_NET_ETHERNET == 1) && ($CONFIG_NET_PCI == 1) && ($CONFIG_PCI == 1 || $CONFIG_PCI == 2 || $CONFIG_PCI == 4)} then {write_tristate $cfg $autocfg CONFIG_ADAPTEC_STARFIRE $CONFIG_ADAPTEC_STARFIRE [list $CONFIG_PCI] 2 }
	global CONFIG_AC3200
	if {($CONFIG_NET == 1) && ($CONFIG_NETDEVICES == 1) && ($CONFIG_NET_ETHERNET == 1) && ($CONFIG_NET_PCI == 1) && ($CONFIG_ISA == 1 || $CONFIG_EISA == 1) && ($CONFIG_EXPERIMENTAL == 1 || $CONFIG_EXPERIMENTAL == 2 || $CONFIG_EXPERIMENTAL == 4)} then {write_tristate $cfg $autocfg CONFIG_AC3200 $CONFIG_AC3200 [list $CONFIG_EXPERIMENTAL] 2 }
	global CONFIG_APRICOT
	if {($CONFIG_NET == 1) && ($CONFIG_NETDEVICES == 1) && ($CONFIG_NET_ETHERNET == 1) && ($CONFIG_NET_PCI == 1) && ($CONFIG_ISA == 1 || $CONFIG_ISA == 2 || $CONFIG_ISA == 4)} then {write_tristate $cfg $autocfg CONFIG_APRICOT $CONFIG_APRICOT [list $CONFIG_ISA] 2 }
	global CONFIG_CS89x0
	if {($CONFIG_NET == 1) && ($CONFIG_NETDEVICES == 1) && ($CONFIG_NET_ETHERNET == 1) && ($CONFIG_NET_PCI == 1) && ($CONFIG_ISA == 1 || $CONFIG_ISA == 2 || $CONFIG_ISA == 4)} then {write_tristate $cfg $autocfg CONFIG_CS89x0 $CONFIG_CS89x0 [list $CONFIG_ISA] 2 }
	global CONFIG_TULIP
	if {($CONFIG_NET == 1) && ($CONFIG_NETDEVICES == 1) && ($CONFIG_NET_ETHERNET == 1) && ($CONFIG_NET_PCI == 1) && ($CONFIG_PCI == 1 || $CONFIG_PCI == 2 || $CONFIG_PCI == 4)} then {write_tristate $cfg $autocfg CONFIG_TULIP $CONFIG_TULIP [list $CONFIG_PCI] 2 }
	global CONFIG_TC35815
	if {($CONFIG_NET == 1) && ($CONFIG_NETDEVICES == 1) && ($CONFIG_NET_ETHERNET == 1) && ($CONFIG_NET_PCI == 1) && ($CONFIG_PCI == 1 || $CONFIG_PCI == 2 || $CONFIG_PCI == 4)} then {write_tristate $cfg $autocfg CONFIG_TC35815 $CONFIG_TC35815 [list $CONFIG_PCI] 2 }
	global CONFIG_TULIP_MWI
	if {($CONFIG_NET == 1) && ($CONFIG_NETDEVICES == 1) && ($CONFIG_NET_ETHERNET == 1) && ($CONFIG_NET_PCI == 1) && ($CONFIG_TULIP == 1 || $CONFIG_TULIP == 2) && ($CONFIG_EXPERIMENTAL == 1 || $CONFIG_EXPERIMENTAL == 4)} then {write_tristate $cfg $autocfg CONFIG_TULIP_MWI $CONFIG_TULIP_MWI [list $CONFIG_EXPERIMENTAL] 2 }
	global CONFIG_TULIP_MMIO
	if {($CONFIG_NET == 1) && ($CONFIG_NETDEVICES == 1) && ($CONFIG_NET_ETHERNET == 1) && ($CONFIG_NET_PCI == 1) && ($CONFIG_TULIP == 1 || $CONFIG_TULIP == 2)} then {write_tristate $cfg $autocfg CONFIG_TULIP_MMIO $CONFIG_TULIP_MMIO [list $notmod] 2 }
	global CONFIG_DE4X5
	if {($CONFIG_NET == 1) && ($CONFIG_NETDEVICES == 1) && ($CONFIG_NET_ETHERNET == 1) && ($CONFIG_NET_PCI == 1) && ($CONFIG_PCI == 1 || $CONFIG_EISA == 1)} then {write_tristate $cfg $autocfg CONFIG_DE4X5 $CONFIG_DE4X5 [list $notmod] 2 }
	global CONFIG_DGRS
	if {($CONFIG_NET == 1) && ($CONFIG_NETDEVICES == 1) && ($CONFIG_NET_ETHERNET == 1) && ($CONFIG_NET_PCI == 1) && ($CONFIG_PCI == 1 || $CONFIG_EISA == 1)} then {write_tristate $cfg $autocfg CONFIG_DGRS $CONFIG_DGRS [list $notmod] 2 }
	global CONFIG_DM9102
	if {($CONFIG_NET == 1) && ($CONFIG_NETDEVICES == 1) && ($CONFIG_NET_ETHERNET == 1) && ($CONFIG_NET_PCI == 1) && ($CONFIG_PCI == 1 || $CONFIG_PCI == 2 || $CONFIG_PCI == 4)} then {write_tristate $cfg $autocfg CONFIG_DM9102 $CONFIG_DM9102 [list $CONFIG_PCI] 2 }
	global CONFIG_EEPRO100
	if {($CONFIG_NET == 1) && ($CONFIG_NETDEVICES == 1) && ($CONFIG_NET_ETHERNET == 1) && ($CONFIG_NET_PCI == 1) && ($CONFIG_PCI == 1 || $CONFIG_PCI == 2 || $CONFIG_PCI == 4)} then {write_tristate $cfg $autocfg CONFIG_EEPRO100 $CONFIG_EEPRO100 [list $CONFIG_PCI] 2 }
	global CONFIG_LNE390
	if {($CONFIG_NET == 1) && ($CONFIG_NETDEVICES == 1) && ($CONFIG_NET_ETHERNET == 1) && ($CONFIG_NET_PCI == 1) && ($CONFIG_EISA == 1 || $CONFIG_EISA == 2 || $CONFIG_EISA == 4) && ($CONFIG_EXPERIMENTAL == 1 || $CONFIG_EXPERIMENTAL == 2 || $CONFIG_EXPERIMENTAL == 4)} then {write_tristate $cfg $autocfg CONFIG_LNE390 $CONFIG_LNE390 [list $CONFIG_EISA $CONFIG_EXPERIMENTAL] 2 }
	global CONFIG_FEALNX
	if {($CONFIG_NET == 1) && ($CONFIG_NETDEVICES == 1) && ($CONFIG_NET_ETHERNET == 1) && ($CONFIG_NET_PCI == 1) && ($CONFIG_PCI == 1 || $CONFIG_PCI == 2 || $CONFIG_PCI == 4)} then {write_tristate $cfg $autocfg CONFIG_FEALNX $CONFIG_FEALNX [list $CONFIG_PCI] 2 }
	global CONFIG_NATSEMI
	if {($CONFIG_NET == 1) && ($CONFIG_NETDEVICES == 1) && ($CONFIG_NET_ETHERNET == 1) && ($CONFIG_NET_PCI == 1) && ($CONFIG_PCI == 1 || $CONFIG_PCI == 2 || $CONFIG_PCI == 4)} then {write_tristate $cfg $autocfg CONFIG_NATSEMI $CONFIG_NATSEMI [list $CONFIG_PCI] 2 }
	global CONFIG_NATSEMI_CABLE_MAGIC
	if {($CONFIG_NET == 1) && ($CONFIG_NETDEVICES == 1) && ($CONFIG_NET_ETHERNET == 1) && ($CONFIG_NET_PCI == 1) && ($CONFIG_NATSEMI == 1 || $CONFIG_NATSEMI == 2)} then {write_tristate $cfg $autocfg CONFIG_NATSEMI_CABLE_MAGIC $CONFIG_NATSEMI_CABLE_MAGIC [list $notmod] 2 }
	global CONFIG_NE2K_PCI
	if {($CONFIG_NET == 1) && ($CONFIG_NETDEVICES == 1) && ($CONFIG_NET_ETHERNET == 1) && ($CONFIG_NET_PCI == 1) && ($CONFIG_PCI == 1 || $CONFIG_PCI == 2 || $CONFIG_PCI == 4)} then {write_tristate $cfg $autocfg CONFIG_NE2K_PCI $CONFIG_NE2K_PCI [list $CONFIG_PCI] 2 }
	global CONFIG_NE3210
	if {($CONFIG_NET == 1) && ($CONFIG_NETDEVICES == 1) && ($CONFIG_NET_ETHERNET == 1) && ($CONFIG_NET_PCI == 1) && ($CONFIG_EISA == 1 || $CONFIG_EISA == 2 || $CONFIG_EISA == 4) && ($CONFIG_EXPERIMENTAL == 1 || $CONFIG_EXPERIMENTAL == 2 || $CONFIG_EXPERIMENTAL == 4)} then {write_tristate $cfg $autocfg CONFIG_NE3210 $CONFIG_NE3210 [list $CONFIG_EISA $CONFIG_EXPERIMENTAL] 2 }
	global CONFIG_ES3210
	if {($CONFIG_NET == 1) && ($CONFIG_NETDEVICES == 1) && ($CONFIG_NET_ETHERNET == 1) && ($CONFIG_NET_PCI == 1) && ($CONFIG_EISA == 1 || $CONFIG_EISA == 2 || $CONFIG_EISA == 4) && ($CONFIG_EXPERIMENTAL == 1 || $CONFIG_EXPERIMENTAL == 2 || $CONFIG_EXPERIMENTAL == 4)} then {write_tristate $cfg $autocfg CONFIG_ES3210 $CONFIG_ES3210 [list $CONFIG_EISA $CONFIG_EXPERIMENTAL] 2 }
	global CONFIG_8139CP
	if {($CONFIG_NET == 1) && ($CONFIG_NETDEVICES == 1) && ($CONFIG_NET_ETHERNET == 1) && ($CONFIG_NET_PCI == 1) && ($CONFIG_PCI == 1 || $CONFIG_PCI == 2 || $CONFIG_PCI == 4) && ($CONFIG_EXPERIMENTAL == 1 || $CONFIG_EXPERIMENTAL == 2 || $CONFIG_EXPERIMENTAL == 4)} then {write_tristate $cfg $autocfg CONFIG_8139CP $CONFIG_8139CP [list $CONFIG_PCI $CONFIG_EXPERIMENTAL] 2 }
	global CONFIG_8139TOO
	if {($CONFIG_NET == 1) && ($CONFIG_NETDEVICES == 1) && ($CONFIG_NET_ETHERNET == 1) && ($CONFIG_NET_PCI == 1) && ($CONFIG_PCI == 1 || $CONFIG_PCI == 2 || $CONFIG_PCI == 4)} then {write_tristate $cfg $autocfg CONFIG_8139TOO $CONFIG_8139TOO [list $CONFIG_PCI] 2 }
	global CONFIG_8139TOO_PIO
	if {($CONFIG_NET == 1) && ($CONFIG_NETDEVICES == 1) && ($CONFIG_NET_ETHERNET == 1) && ($CONFIG_NET_PCI == 1) && ($CONFIG_8139TOO == 1 || $CONFIG_8139TOO == 2 || $CONFIG_8139TOO == 4)} then {write_tristate $cfg $autocfg CONFIG_8139TOO_PIO $CONFIG_8139TOO_PIO [list $CONFIG_8139TOO] 1 }
	global CONFIG_8139TOO_TUNE_TWISTER
	if {($CONFIG_NET == 1) && ($CONFIG_NETDEVICES == 1) && ($CONFIG_NET_ETHERNET == 1) && ($CONFIG_NET_PCI == 1) && ($CONFIG_8139TOO == 1 || $CONFIG_8139TOO == 2 || $CONFIG_8139TOO == 4) && ($CONFIG_EXPERIMENTAL == 1 || $CONFIG_EXPERIMENTAL == 2 || $CONFIG_EXPERIMENTAL == 4)} then {write_tristate $cfg $autocfg CONFIG_8139TOO_TUNE_TWISTER $CONFIG_8139TOO_TUNE_TWISTER [list $CONFIG_8139TOO $CONFIG_EXPERIMENTAL] 1 }
	global CONFIG_8139TOO_8129
	if {($CONFIG_NET == 1) && ($CONFIG_NETDEVICES == 1) && ($CONFIG_NET_ETHERNET == 1) && ($CONFIG_NET_PCI == 1) && ($CONFIG_8139TOO == 1 || $CONFIG_8139TOO == 2 || $CONFIG_8139TOO == 4)} then {write_tristate $cfg $autocfg CONFIG_8139TOO_8129 $CONFIG_8139TOO_8129 [list $CONFIG_8139TOO] 1 }
	global CONFIG_8139_NEW_RX_RESET
	if {($CONFIG_NET == 1) && ($CONFIG_NETDEVICES == 1) && ($CONFIG_NET_ETHERNET == 1) && ($CONFIG_NET_PCI == 1) && ($CONFIG_8139TOO == 1 || $CONFIG_8139TOO == 2 || $CONFIG_8139TOO == 4) && ($CONFIG_EXPERIMENTAL == 1 || $CONFIG_EXPERIMENTAL == 2 || $CONFIG_EXPERIMENTAL == 4)} then {write_tristate $cfg $autocfg CONFIG_8139_NEW_RX_RESET $CONFIG_8139_NEW_RX_RESET [list $CONFIG_8139TOO $CONFIG_EXPERIMENTAL] 1 }
	global CONFIG_SIS900
	if {($CONFIG_NET == 1) && ($CONFIG_NETDEVICES == 1) && ($CONFIG_NET_ETHERNET == 1) && ($CONFIG_NET_PCI == 1) && ($CONFIG_PCI == 1 || $CONFIG_PCI == 2 || $CONFIG_PCI == 4)} then {write_tristate $cfg $autocfg CONFIG_SIS900 $CONFIG_SIS900 [list $CONFIG_PCI] 2 }
	global CONFIG_EPIC100
	if {($CONFIG_NET == 1) && ($CONFIG_NETDEVICES == 1) && ($CONFIG_NET_ETHERNET == 1) && ($CONFIG_NET_PCI == 1) && ($CONFIG_PCI == 1 || $CONFIG_PCI == 2 || $CONFIG_PCI == 4)} then {write_tristate $cfg $autocfg CONFIG_EPIC100 $CONFIG_EPIC100 [list $CONFIG_PCI] 2 }
	global CONFIG_SUNDANCE
	if {($CONFIG_NET == 1) && ($CONFIG_NETDEVICES == 1) && ($CONFIG_NET_ETHERNET == 1) && ($CONFIG_NET_PCI == 1) && ($CONFIG_PCI == 1 || $CONFIG_PCI == 2 || $CONFIG_PCI == 4)} then {write_tristate $cfg $autocfg CONFIG_SUNDANCE $CONFIG_SUNDANCE [list $CONFIG_PCI] 2 }
	global CONFIG_TLAN
	if {($CONFIG_NET == 1) && ($CONFIG_NETDEVICES == 1) && ($CONFIG_NET_ETHERNET == 1) && ($CONFIG_NET_PCI == 1) && ($CONFIG_PCI == 1 || $CONFIG_EISA == 1)} then {write_tristate $cfg $autocfg CONFIG_TLAN $CONFIG_TLAN [list $notmod] 2 }
	global CONFIG_VIA_RHINE
	if {($CONFIG_NET == 1) && ($CONFIG_NETDEVICES == 1) && ($CONFIG_NET_ETHERNET == 1) && ($CONFIG_NET_PCI == 1) && ($CONFIG_PCI == 1 || $CONFIG_PCI == 2 || $CONFIG_PCI == 4)} then {write_tristate $cfg $autocfg CONFIG_VIA_RHINE $CONFIG_VIA_RHINE [list $CONFIG_PCI] 2 }
	global CONFIG_VIA_RHINE_MMIO
	if {($CONFIG_NET == 1) && ($CONFIG_NETDEVICES == 1) && ($CONFIG_NET_ETHERNET == 1) && ($CONFIG_NET_PCI == 1) && ($CONFIG_VIA_RHINE == 1 || $CONFIG_VIA_RHINE == 2 || $CONFIG_VIA_RHINE == 4) && ($CONFIG_EXPERIMENTAL == 1 || $CONFIG_EXPERIMENTAL == 2 || $CONFIG_EXPERIMENTAL == 4)} then {write_tristate $cfg $autocfg CONFIG_VIA_RHINE_MMIO $CONFIG_VIA_RHINE_MMIO [list $CONFIG_VIA_RHINE $CONFIG_EXPERIMENTAL] 1 }
	global CONFIG_WINBOND_840
	if {($CONFIG_NET == 1) && ($CONFIG_NETDEVICES == 1) && ($CONFIG_NET_ETHERNET == 1) && ($CONFIG_NET_PCI == 1) && ($CONFIG_PCI == 1 || $CONFIG_PCI == 2 || $CONFIG_PCI == 4)} then {write_tristate $cfg $autocfg CONFIG_WINBOND_840 $CONFIG_WINBOND_840 [list $CONFIG_PCI] 2 }
	global CONFIG_LAN_SAA9730
	global CONFIG_MIPS
	if {($CONFIG_NET == 1) && ($CONFIG_NETDEVICES == 1) && ($CONFIG_NET_ETHERNET == 1) && ($CONFIG_NET_PCI == 1) && ($CONFIG_EXPERIMENTAL == 1 && $CONFIG_MIPS == 1)} then {write_tristate $cfg $autocfg CONFIG_LAN_SAA9730 $CONFIG_LAN_SAA9730 [list $notmod] 2 }
	global CONFIG_NET_POCKET
	if {($CONFIG_NET == 1) && ($CONFIG_NETDEVICES == 1) && ($CONFIG_NET_ETHERNET == 1)} then {write_tristate $cfg $autocfg CONFIG_NET_POCKET $CONFIG_NET_POCKET [list $notmod] 2 }
	global CONFIG_ATP
	if {($CONFIG_NET == 1) && ($CONFIG_NETDEVICES == 1) && ($CONFIG_NET_ETHERNET == 1) && ($CONFIG_NET_POCKET == 1) && ($CONFIG_ISA == 1 && $CONFIG_X86 == 1)} then {write_tristate $cfg $autocfg CONFIG_ATP $CONFIG_ATP [list $notmod] 2 }
	global CONFIG_DE600
	if {($CONFIG_NET == 1) && ($CONFIG_NETDEVICES == 1) && ($CONFIG_NET_ETHERNET == 1) && ($CONFIG_NET_POCKET == 1) && ($CONFIG_ISA == 1 || $CONFIG_ISA == 2 || $CONFIG_ISA == 4)} then {write_tristate $cfg $autocfg CONFIG_DE600 $CONFIG_DE600 [list $CONFIG_ISA] 2 }
	global CONFIG_DE620
	if {($CONFIG_NET == 1) && ($CONFIG_NETDEVICES == 1) && ($CONFIG_NET_ETHERNET == 1) && ($CONFIG_NET_POCKET == 1) && ($CONFIG_ISA == 1 || $CONFIG_ISA == 2 || $CONFIG_ISA == 4)} then {write_tristate $cfg $autocfg CONFIG_DE620 $CONFIG_DE620 [list $CONFIG_ISA] 2 }
	if {($CONFIG_NET == 1) && ($CONFIG_NETDEVICES == 1)} then {write_comment $cfg $autocfg "Ethernet (1000 Mbit)"}
	global CONFIG_ACENIC
	if {($CONFIG_NET == 1) && ($CONFIG_NETDEVICES == 1) && ($CONFIG_PCI == 1 || $CONFIG_PCI == 2 || $CONFIG_PCI == 4)} then {write_tristate $cfg $autocfg CONFIG_ACENIC $CONFIG_ACENIC [list $CONFIG_PCI] 2 }
	global CONFIG_ACENIC_OMIT_TIGON_I
	if {($CONFIG_NET == 1) && ($CONFIG_NETDEVICES == 1) && ($CONFIG_ACENIC != 0)} then {write_tristate $cfg $autocfg CONFIG_ACENIC_OMIT_TIGON_I $CONFIG_ACENIC_OMIT_TIGON_I [list $notmod] 2 }
	global CONFIG_DL2K
	if {($CONFIG_NET == 1) && ($CONFIG_NETDEVICES == 1) && ($CONFIG_PCI == 1 || $CONFIG_PCI == 2 || $CONFIG_PCI == 4)} then {write_tristate $cfg $autocfg CONFIG_DL2K $CONFIG_DL2K [list $CONFIG_PCI] 2 }
	global CONFIG_MYRI_SBUS
	if {($CONFIG_NET == 1) && ($CONFIG_NETDEVICES == 1) && ($CONFIG_SBUS == 1 || $CONFIG_SBUS == 2 || $CONFIG_SBUS == 4)} then {write_tristate $cfg $autocfg CONFIG_MYRI_SBUS $CONFIG_MYRI_SBUS [list $CONFIG_SBUS] 2 }
	global CONFIG_NS83820
	if {($CONFIG_NET == 1) && ($CONFIG_NETDEVICES == 1) && ($CONFIG_PCI == 1 || $CONFIG_PCI == 2 || $CONFIG_PCI == 4)} then {write_tristate $cfg $autocfg CONFIG_NS83820 $CONFIG_NS83820 [list $CONFIG_PCI] 2 }
	global CONFIG_HAMACHI
	if {($CONFIG_NET == 1) && ($CONFIG_NETDEVICES == 1) && ($CONFIG_PCI == 1 || $CONFIG_PCI == 2 || $CONFIG_PCI == 4)} then {write_tristate $cfg $autocfg CONFIG_HAMACHI $CONFIG_HAMACHI [list $CONFIG_PCI] 2 }
	global CONFIG_YELLOWFIN
	if {($CONFIG_NET == 1) && ($CONFIG_NETDEVICES == 1) && ($CONFIG_PCI == 1 || $CONFIG_PCI == 2 || $CONFIG_PCI == 4) && ($CONFIG_EXPERIMENTAL == 1 || $CONFIG_EXPERIMENTAL == 2 || $CONFIG_EXPERIMENTAL == 4)} then {write_tristate $cfg $autocfg CONFIG_YELLOWFIN $CONFIG_YELLOWFIN [list $CONFIG_PCI $CONFIG_EXPERIMENTAL] 2 }
	global CONFIG_SK98LIN
	if {($CONFIG_NET == 1) && ($CONFIG_NETDEVICES == 1) && ($CONFIG_PCI == 1 || $CONFIG_PCI == 2 || $CONFIG_PCI == 4)} then {write_tristate $cfg $autocfg CONFIG_SK98LIN $CONFIG_SK98LIN [list $CONFIG_PCI] 2 }
	global CONFIG_TIGON3
	if {($CONFIG_NET == 1) && ($CONFIG_NETDEVICES == 1) && ($CONFIG_PCI == 1 || $CONFIG_PCI == 2 || $CONFIG_PCI == 4)} then {write_tristate $cfg $autocfg CONFIG_TIGON3 $CONFIG_TIGON3 [list $CONFIG_PCI] 2 }
	global CONFIG_FDDI
	if {($CONFIG_NET == 1) && ($CONFIG_NETDEVICES == 1)} then {write_tristate $cfg $autocfg CONFIG_FDDI $CONFIG_FDDI [list $notmod] 2 }
	global CONFIG_DEFXX
	if {($CONFIG_NET == 1) && ($CONFIG_NETDEVICES == 1) && ($CONFIG_FDDI == 1) && ($CONFIG_PCI == 1 || $CONFIG_EISA == 1)} then {write_tristate $cfg $autocfg CONFIG_DEFXX $CONFIG_DEFXX [list $notmod] 2 }
	global CONFIG_SKFP
	if {($CONFIG_NET == 1) && ($CONFIG_NETDEVICES == 1) && ($CONFIG_FDDI == 1) && ($CONFIG_PCI == 1 || $CONFIG_PCI == 2 || $CONFIG_PCI == 4)} then {write_tristate $cfg $autocfg CONFIG_SKFP $CONFIG_SKFP [list $CONFIG_PCI] 2 }
	global CONFIG_NETCONSOLE
	if {($CONFIG_NET == 1) && ($CONFIG_NETDEVICES == 1) && ($CONFIG_PCI == 1 || $CONFIG_PCI == 2 || $CONFIG_PCI == 4)} then {write_tristate $cfg $autocfg CONFIG_NETCONSOLE $CONFIG_NETCONSOLE [list $CONFIG_PCI] 2 }
	global CONFIG_HIPPI
	if {($CONFIG_NET == 1) && ($CONFIG_NETDEVICES == 1) && ($CONFIG_EXPERIMENTAL == 1) && ($CONFIG_INET == 1)} then {write_tristate $cfg $autocfg CONFIG_HIPPI $CONFIG_HIPPI [list $notmod] 2 }
	global CONFIG_ROADRUNNER
	if {($CONFIG_NET == 1) && ($CONFIG_NETDEVICES == 1) && ($CONFIG_EXPERIMENTAL == 1) && ($CONFIG_INET == 1) && ($CONFIG_HIPPI == 1 && $CONFIG_PCI == 1) && ($CONFIG_PCI == 1 || $CONFIG_PCI == 2 || $CONFIG_PCI == 4)} then {write_tristate $cfg $autocfg CONFIG_ROADRUNNER $CONFIG_ROADRUNNER [list $CONFIG_PCI] 2 }
	global CONFIG_ROADRUNNER_LARGE_RINGS
	if {($CONFIG_NET == 1) && ($CONFIG_NETDEVICES == 1) && ($CONFIG_EXPERIMENTAL == 1) && ($CONFIG_INET == 1) && ($CONFIG_HIPPI == 1 && $CONFIG_PCI == 1) && ($CONFIG_ROADRUNNER != 0)} then {write_tristate $cfg $autocfg CONFIG_ROADRUNNER_LARGE_RINGS $CONFIG_ROADRUNNER_LARGE_RINGS [list $notmod] 2 }
	global CONFIG_PLIP
	if {($CONFIG_NET == 1) && ($CONFIG_NETDEVICES == 1) && ($CONFIG_PARPORT == 1 || $CONFIG_PARPORT == 2 || $CONFIG_PARPORT == 4)} then {write_tristate $cfg $autocfg CONFIG_PLIP $CONFIG_PLIP [list $CONFIG_PARPORT] 2 }
	global CONFIG_PPP
	if {($CONFIG_NET == 1) && ($CONFIG_NETDEVICES == 1)} then {write_tristate $cfg $autocfg CONFIG_PPP $CONFIG_PPP [list $notmod] 2 }
	global CONFIG_PPP_MULTILINK
	if {($CONFIG_NET == 1) && ($CONFIG_NETDEVICES == 1) && ($CONFIG_PPP != 0) && ($CONFIG_EXPERIMENTAL == 1 || $CONFIG_EXPERIMENTAL == 4)} then {write_tristate $cfg $autocfg CONFIG_PPP_MULTILINK $CONFIG_PPP_MULTILINK [list $CONFIG_EXPERIMENTAL] 2 }
	global CONFIG_PPP_FILTER
	if {($CONFIG_NET == 1) && ($CONFIG_NETDEVICES == 1) && ($CONFIG_PPP != 0) && ($CONFIG_FILTER == 1 || $CONFIG_FILTER == 4)} then {write_tristate $cfg $autocfg CONFIG_PPP_FILTER $CONFIG_PPP_FILTER [list $CONFIG_FILTER] 2 }
	global CONFIG_PPP_ASYNC
	if {($CONFIG_NET == 1) && ($CONFIG_NETDEVICES == 1) && ($CONFIG_PPP != 0) && ($CONFIG_PPP == 1 || $CONFIG_PPP == 2 || $CONFIG_PPP == 4)} then {write_tristate $cfg $autocfg CONFIG_PPP_ASYNC $CONFIG_PPP_ASYNC [list $CONFIG_PPP] 2 }
	global CONFIG_PPP_SYNC_TTY
	if {($CONFIG_NET == 1) && ($CONFIG_NETDEVICES == 1) && ($CONFIG_PPP != 0) && ($CONFIG_PPP == 1 || $CONFIG_PPP == 2 || $CONFIG_PPP == 4)} then {write_tristate $cfg $autocfg CONFIG_PPP_SYNC_TTY $CONFIG_PPP_SYNC_TTY [list $CONFIG_PPP] 2 }
	global CONFIG_PPP_DEFLATE
	if {($CONFIG_NET == 1) && ($CONFIG_NETDEVICES == 1) && ($CONFIG_PPP != 0) && ($CONFIG_PPP == 1 || $CONFIG_PPP == 2 || $CONFIG_PPP == 4)} then {write_tristate $cfg $autocfg CONFIG_PPP_DEFLATE $CONFIG_PPP_DEFLATE [list $CONFIG_PPP] 2 }
	global CONFIG_PPP_BSDCOMP
	if {($CONFIG_NET == 1) && ($CONFIG_NETDEVICES == 1) && ($CONFIG_PPP != 0) && ($CONFIG_PPP == 1 || $CONFIG_PPP == 2 || $CONFIG_PPP == 4)} then {write_tristate $cfg $autocfg CONFIG_PPP_BSDCOMP $CONFIG_PPP_BSDCOMP [list $CONFIG_PPP] 2 }
	global CONFIG_PPPOE
	if {($CONFIG_NET == 1) && ($CONFIG_NETDEVICES == 1) && ($CONFIG_PPP != 0) && ($CONFIG_EXPERIMENTAL == 1) && ($CONFIG_PPP == 1 || $CONFIG_PPP == 2 || $CONFIG_PPP == 4)} then {write_tristate $cfg $autocfg CONFIG_PPPOE $CONFIG_PPPOE [list $CONFIG_PPP] 2 }
	global CONFIG_PPPOATM
	if {($CONFIG_NET == 1) && ($CONFIG_NETDEVICES == 1) && ($CONFIG_PPP != 0) && ($CONFIG_ATM != 0) && ($CONFIG_PPP == 1 || $CONFIG_PPP == 2 || $CONFIG_PPP == 4) && ($CONFIG_EXPERIMENTAL == 1 || $CONFIG_EXPERIMENTAL == 2 || $CONFIG_EXPERIMENTAL == 4)} then {write_tristate $cfg $autocfg CONFIG_PPPOATM $CONFIG_PPPOATM [list $CONFIG_PPP $CONFIG_EXPERIMENTAL] 2 }
	global CONFIG_SLIP
	if {($CONFIG_NET == 1) && ($CONFIG_NETDEVICES == 1)} then {write_tristate $cfg $autocfg CONFIG_SLIP $CONFIG_SLIP [list $notmod] 2 }
	global CONFIG_SLIP_COMPRESSED
	if {($CONFIG_NET == 1) && ($CONFIG_NETDEVICES == 1) && ($CONFIG_SLIP != 0)} then {write_tristate $cfg $autocfg CONFIG_SLIP_COMPRESSED $CONFIG_SLIP_COMPRESSED [list $notmod] 2 }
	global CONFIG_SLIP_SMART
	if {($CONFIG_NET == 1) && ($CONFIG_NETDEVICES == 1) && ($CONFIG_SLIP != 0)} then {write_tristate $cfg $autocfg CONFIG_SLIP_SMART $CONFIG_SLIP_SMART [list $notmod] 2 }
	global CONFIG_SLIP_MODE_SLIP6
	if {($CONFIG_NET == 1) && ($CONFIG_NETDEVICES == 1) && ($CONFIG_SLIP != 0)} then {write_tristate $cfg $autocfg CONFIG_SLIP_MODE_SLIP6 $CONFIG_SLIP_MODE_SLIP6 [list $notmod] 2 }
	if {($CONFIG_NET == 1) && ($CONFIG_NETDEVICES == 1)} then {write_comment $cfg $autocfg "Wireless LAN (non-hamradio)"}
	global CONFIG_NET_RADIO
	if {($CONFIG_NET == 1) && ($CONFIG_NETDEVICES == 1)} then {write_tristate $cfg $autocfg CONFIG_NET_RADIO $CONFIG_NET_RADIO [list $notmod] 2 }
	global CONFIG_STRIP
	if {($CONFIG_NET == 1) && ($CONFIG_NETDEVICES == 1) && ($CONFIG_NET_RADIO == 1) && ($CONFIG_INET == 1 || $CONFIG_INET == 2 || $CONFIG_INET == 4)} then {write_tristate $cfg $autocfg CONFIG_STRIP $CONFIG_STRIP [list $CONFIG_INET] 2 }
	global CONFIG_WAVELAN
	if {($CONFIG_NET == 1) && ($CONFIG_NETDEVICES == 1) && ($CONFIG_NET_RADIO == 1)} then {write_tristate $cfg $autocfg CONFIG_WAVELAN $CONFIG_WAVELAN [list $notmod] 2 }
	global CONFIG_ARLAN
	if {($CONFIG_NET == 1) && ($CONFIG_NETDEVICES == 1) && ($CONFIG_NET_RADIO == 1)} then {write_tristate $cfg $autocfg CONFIG_ARLAN $CONFIG_ARLAN [list $notmod] 2 }
	global CONFIG_AIRONET4500
	if {($CONFIG_NET == 1) && ($CONFIG_NETDEVICES == 1) && ($CONFIG_NET_RADIO == 1)} then {write_tristate $cfg $autocfg CONFIG_AIRONET4500 $CONFIG_AIRONET4500 [list $notmod] 2 }
	global CONFIG_AIRONET4500_NONCS
	if {($CONFIG_NET == 1) && ($CONFIG_NETDEVICES == 1) && ($CONFIG_NET_RADIO == 1) && ($CONFIG_AIRONET4500 == 1 || $CONFIG_AIRONET4500 == 2 || $CONFIG_AIRONET4500 == 4)} then {write_tristate $cfg $autocfg CONFIG_AIRONET4500_NONCS $CONFIG_AIRONET4500_NONCS [list $CONFIG_AIRONET4500] 2 }
	global CONFIG_AIRONET4500_PNP
	if {($CONFIG_NET == 1) && ($CONFIG_NETDEVICES == 1) && ($CONFIG_NET_RADIO == 1) && ($CONFIG_AIRONET4500 != 0 && $CONFIG_AIRONET4500_NONCS != 0)} then {write_tristate $cfg $autocfg CONFIG_AIRONET4500_PNP $CONFIG_AIRONET4500_PNP [list $notmod] 2 }
	global CONFIG_AIRONET4500_PCI
	if {($CONFIG_NET == 1) && ($CONFIG_NETDEVICES == 1) && ($CONFIG_NET_RADIO == 1) && ($CONFIG_AIRONET4500 != 0 && $CONFIG_AIRONET4500_NONCS != 0) && ($CONFIG_PCI == 1 || $CONFIG_PCI == 4)} then {write_tristate $cfg $autocfg CONFIG_AIRONET4500_PCI $CONFIG_AIRONET4500_PCI [list $CONFIG_PCI] 2 }
	global CONFIG_AIRONET4500_ISA
	if {($CONFIG_NET == 1) && ($CONFIG_NETDEVICES == 1) && ($CONFIG_NET_RADIO == 1) && ($CONFIG_AIRONET4500 != 0 && $CONFIG_AIRONET4500_NONCS != 0) && ($CONFIG_EXPERIMENTAL == 1 || $CONFIG_EXPERIMENTAL == 4)} then {write_tristate $cfg $autocfg CONFIG_AIRONET4500_ISA $CONFIG_AIRONET4500_ISA [list $CONFIG_EXPERIMENTAL] 2 }
	global CONFIG_AIRONET4500_I365
	if {($CONFIG_NET == 1) && ($CONFIG_NETDEVICES == 1) && ($CONFIG_NET_RADIO == 1) && ($CONFIG_AIRONET4500 != 0 && $CONFIG_AIRONET4500_NONCS != 0) && ($CONFIG_EXPERIMENTAL == 1 || $CONFIG_EXPERIMENTAL == 4)} then {write_tristate $cfg $autocfg CONFIG_AIRONET4500_I365 $CONFIG_AIRONET4500_I365 [list $CONFIG_EXPERIMENTAL] 2 }
	global CONFIG_AIRONET4500_PROC
	if {($CONFIG_NET == 1) && ($CONFIG_NETDEVICES == 1) && ($CONFIG_NET_RADIO == 1) && ($CONFIG_AIRONET4500 == 1 || $CONFIG_AIRONET4500 == 2 || $CONFIG_AIRONET4500 == 4)} then {write_tristate $cfg $autocfg CONFIG_AIRONET4500_PROC $CONFIG_AIRONET4500_PROC [list $CONFIG_AIRONET4500 $CONSTANT_M] 2 }
	global CONFIG_AIRO
	if {($CONFIG_NET == 1) && ($CONFIG_NETDEVICES == 1) && ($CONFIG_NET_RADIO == 1) && ($CONFIG_ISA == 1 || $CONFIG_PCI == 1)} then {write_tristate $cfg $autocfg CONFIG_AIRO $CONFIG_AIRO [list $notmod] 2 }
	global CONFIG_HERMES
	if {($CONFIG_NET == 1) && ($CONFIG_NETDEVICES == 1) && ($CONFIG_NET_RADIO == 1)} then {write_tristate $cfg $autocfg CONFIG_HERMES $CONFIG_HERMES [list $notmod] 2 }
	global CONFIG_PLX_HERMES
	if {($CONFIG_NET == 1) && ($CONFIG_NETDEVICES == 1) && ($CONFIG_NET_RADIO == 1) && ($CONFIG_PCI == 1) && ($CONFIG_HERMES == 1 || $CONFIG_HERMES == 2 || $CONFIG_HERMES == 4) && ($CONFIG_EXPERIM|
|	slogn.sa 3.1 12/10/90
|
|	slogn computes the natural logarithm of an
|	input value. slognd does the same except the input value is a
|	denormalized number. slognp1 computes log(1+X), and slognp1d
|	computes log(1+X) for denormalized X.
|
|	Input: Double-extended value in memory location pointed to by address
|		register a0.
|
|	Output:	log(X) or log(1+X) returned in floating-point register Fp0.
|
|	Accuracy and Monotonicity: The returned result is within 2 ulps in
|		64 significant bit, i.e. within 0.5001 ulp to 53 bits if the
|		result is subsequently rounded to double precision. The 
|		result is provably monotonic in double precision.
|
|	Speed: The program slogn takes approximately 190 cycles for input 
|		argument X such that |X-1| >= 1/16, which is the usual 
|		situation. For those arguments, slognp1 takes approximately
|		 210 cycles. For the less common arguments, the program will
|		 run no worse than 10% slower.
|
|	Algorithm:
|	LOGN:
|	Step 1. If |X-1| < 1/16, approximate log(X) by an odd polynomial in
|		u, where u = 2(X-1)/(X+1). Otherwise, move on to Step 2.
|
|	Step 2. X = 2**k * Y where 1 <= Y < 2. Define F to be the first seven
|		significant bits of Y plus 2**(-7), i.e. F = 1.xxxxxx1 in base
|		2 where the six "x" match those of Y. Note that |Y-F| <= 2**(-7).
|
|	Step 3. Define u = (Y-F)/F. Approximate log(1+u) by a polynomial in u,
|		log(1+u) = poly.
|
|	Step 4. Reconstruct log(X) = log( 2**k * Y ) = k*log(2) + log(F) + log(1+u)
|		by k*log(2) + (log(F) + poly). The values of log(F) are calculated
|		beforehand and stored in the program.
|
|	lognp1:
|	Step 1: If |X| < 1/16, approximate log(1+X) by an odd polynomial in
|		u where u = 2X/(2+X). Otherwise, move on to Step 2.
|
|	Step 2: Let 1+X = 2**k * Y, where 1 <= Y < 2. Define F as done in Step 2
|		of the algorithm for LOGN and compute log(1+X) as
|		k*log(2) + log(F) + poly where poly approximates log(1+u),
|		u = (Y-F)/F. 
|
|	Implementation Notes:
|	Note 1. There are 64 different possible values for F, thus 64 log(F)'s
|		need to be tabulated. Moreover, the values of 1/F are also 
|		tabulated so that the division in (Y-F)/F can be performed by a
|		multiplication.
|
|	Note 2. In Step 2 of lognp1, in order to preserved accuracy, the value
|		Y-F has to be calculated carefully when 1/2 <= X < 3/2. 
|
|	Note 3. To fully exploit the pipeline, polynomials are usually separated
|		into two parts evaluated independently before being added up.
|	

|		Copyright (C) Motorola, Inc. 1990
|			All Rights Reserved
|
|	THIS IS UNPUBLISHED PROPRIETARY SOURCE CODE OF MOTOROLA 
|	The copyright notice above does not evidence any  
|	actual or intended publication of such source code.

|slogn	idnt	2,1 | Motorola 040 Floating Point Software Package

	|section	8

	.include "fpsp.h"

BOUNDS1:  .long 0x3FFEF07D,0x3FFF8841
BOUNDS2:  .long 0x3FFE8000,0x3FFFC000

LOGOF2:	.long 0x3FFE0000,0xB17217F7,0xD1CF79AC,0x00000000

one:	.long 0x3F800000
zero:	.long 0x00000000
infty:	.long 0x7F800000
negone:	.long 0xBF800000

LOGA6:	.long 0x3FC2499A,0xB5E4040B
LOGA5:	.long 0xBFC555B5,0x848CB7DB

LOGA4:	.long 0x3FC99999,0x987D8730
LOGA3:	.long 0xBFCFFFFF,0xFF6F7E97

LOGA2:	.long 0x3FD55555,0x555555a4
LOGA1:	.long 0xBFE00000,0x00000008

LOGB5:	.long 0x3F175496,0xADD7DAD6
LOGB4:	.long 0x3F3C71C2,0xFE80C7E0

LOGB3:	.long 0x3F624924,0x928BCCFF
LOGB2:	.long 0x3F899999,0x999995EC

LOGB1:	.long 0x3FB55555,0x55555555
TWO:	.long 0x40000000,0x00000000

LTHOLD:	.long 0x3f990000,0x80000000,0x00000000,0x00000000

LOGTBL:
	.long  0x3FFE0000,0xFE03F80F,0xE03F80FE,0x00000000
	.long  0x3FF70000,0xFF015358,0x833C47E2,0x00000000
	.long  0x3FFE0000,0xFA232CF2,0x52138AC0,0x00000000
	.long  0x3FF90000,0xBDC8D83E,0xAD88D549,0x00000000
	.long  0x3FFE0000,0xF6603D98,0x0F6603DA,0x00000000
	.long  0x3FFA0000,0x9CF43DCF,0xF5EAFD48,0x00000000
	.long  0x3FFE0000,0xF2B9D648,0x0F2B9D65,0x00000000
	.long  0x3FFA0000,0xDA16EB88,0xCB8DF614,0x00000000
	.long  0x3FFE0000,0xEF2EB71F,0xC4345238,0x00000000
	.long  0x3FFB0000,0x8B29B775,0x1BD70743,0x00000000
	.long  0x3FFE0000,0xEBBDB2A5,0xC1619C8C,0x00000000
	.long  0x3FFB0000,0xA8D839F8,0x30C1FB49,0x00000000
	.long  0x3FFE0000,0xE865AC7B,0x7603A197,0x00000000
	.long  0x3FFB0000,0xC61A2EB1,0x8CD907AD,0x00000000
	.long  0x3FFE0000,0xE525982A,0xF70C880E,0x00000000
	.long  0x3FFB0000,0xE2F2A47A,0xDE3A18AF,0x00000000
	.long  0x3FFE0000,0xE1FC780E,0x1FC780E2,0x00000000
	.long  0x3FFB0000,0xFF64898E,0xDF55D551,0x00000000
	.long  0x3FFE0000,0xDEE95C4C,0xA037BA57,0x00000000
	.long  0x3FFC0000,0x8DB956A9,0x7B3D0148,0x00000000
	.long  0x3FFE0000,0xDBEB61EE,0xD19C5958,0x00000000
	.long  0x3FFC0000,0x9B8FE100,0xF47BA1DE,0x00000000
	.long  0x3FFE0000,0xD901B203,0x6406C80E,0x00000000
	.long  0x3FFC0000,0xA9372F1D,0x0DA1BD17,0x00000000
	.long  0x3FFE0000,0xD62B80D6,0x2B80D62C,0x00000000
	.long  0x3FFC0000,0xB6B07F38,0xCE90E46B,0x00000000
	.long  0x3FFE0000,0xD3680D36,0x80D3680D,0x00000000
	.long  0x3FFC0000,0xC3FD0329,0x06488481,0x00000000
	.long  0x3FFE0000,0xD0B69FCB,0xD2580D0B,0x00000000
	.long  0x3FFC0000,0xD11DE0FF,0x15AB18CA,0x00000000
	.long  0x3FFE0000,0xCE168A77,0x25080CE1,0x00000000
	.long  0x3FFC0000,0xDE1433A1,0x6C66B150,0x00000000
	.long  0x3FFE0000,0xCB8727C0,0x65C393E0,0x00000000
	.long  0x3FFC0000,0xEAE10B5A,0x7DDC8ADD,0x00000000
	.long  0x3FFE0000,0xC907DA4E,0x871146AD,0x00000000
	.long  0x3FFC0000,0xF7856E5E,0xE2C9B291,0x00000000
	.long  0x3FFE0000,0xC6980C69,0x80C6980C,0x00000000
	.long  0x3FFD0000,0x82012CA5,0xA68206D7,0x00000000
	.long  0x3FFE0000,0xC4372F85,0x5D824CA6,0x00000000
	.long  0x3FFD0000,0x882C5FCD,0x7256A8C5,0x00000000
	.long  0x3FFE0000,0xC1E4BBD5,0x95F6E947,0x00000000
	.long  0x3FFD0000,0x8E44C60B,0x4CCFD7DE,0x00000000
	.long  0x3FFE0000,0xBFA02FE8,0x0BFA02FF,0x00000000
	.long  0x3FFD0000,0x944AD09E,0xF4351AF6,0x00000000
	.long  0x3FFE0000,0xBD691047,0x07661AA3,0x00000000
	.long  0x3FFD0000,0x9A3EECD4,0xC3EAA6B2,0x00000000
	.long  0x3FFE0000,0xBB3EE721,0xA54D880C,0x00000000
	.long  0x3FFD0000,0xA0218434,0x353F1DE8,0x00000000
	.long  0x3FFE0000,0xB92143FA,0x36F5E02E,0x00000000
	.long  0x3FFD0000,0xA5F2FCAB,0xBBC506DA,0x00000000
	.long  0x3FFE0000,0xB70FBB5A,0x19BE3659,0x00000000
	.long  0x3FFD0000,0xABB3B8BA,0x2AD362A5,0x00000000
	.long  0x3FFE0000,0xB509E68A,0x9B94821F,0x00000000
	.long  0x3FFD0000,0xB1641795,0xCE3CA97B,0x00000000
	.long  0x3FFE0000,0xB30F6352,0x8917C80B,0x00000000
	.long  0x3FFD0000,0xB7047551,0x5D0F1C61,0x00000000
	.long  0x3FFE0000,0xB11FD3B8,0x0B11FD3C,0x00000000
	.long  0x3FFD0000,0xBC952AFE,0xEA3D13E1,0x00000000
	.long  0x3FFE0000,0xAF3ADDC6,0x80AF3ADE,0x00000000
	.long  0x3FFD0000,0xC2168ED0,0xF458BA4A,0x00000000
	.long  0x3FFE0000,0xAD602B58,0x0AD602B6,0x00000000
	.long  0x3FFD0000,0xC788F439,0xB3163BF1,0x00000000
	.long  0x3FFE0000,0xAB8F69E2,0x8359CD11,0x00000000
	.long  0x3FFD0000,0xCCECAC08,0xBF04565D,0x00000000
	.long  0x3FFE0000,0xA9C84A47,0xA07F5638,0x00000000
	.long  0x3FFD0000,0xD2420487,0x2DD85160,0x00000000
	.long  0x3FFE0000,0xA80A80A8,0x0A80A80B,0x00000000
	.long  0x3FFD0000,0xD7894992,0x3BC3588A,0x00000000
	.long  0x3FFE0000,0xA655C439,0x2D7B73A8,0x00000000
	.long  0x3FFD0000,0xDCC2C4B4,0x9887DACC,0x00000000
	.long  0x3FFE0000,0xA4A9CF1D,0x96833751,0x00000000
	.long  0x3FFD0000,0xE1EEBD3E,0x6D6A6B9E,0x00000000
	.long  0x3FFE0000,0xA3065E3F,0xAE7CD0E0,0x00000000
	.long  0x3FFD0000,0xE70D785C,0x2F9F5BDC,0x00000000
	.long  0x3FFE0000,0xA16B312E,0xA8FC377D,0x00000000
	.long  0x3FFD0000,0xEC1F392C,0x5179F283,0x00000000
	.long  0x3FFE0000,0x9FD809FD,0x809FD80A,0x00000000
	.long  0x3FFD0000,0xF12440D3,0xE36130E6,0x00000000
	.long  0x3FFE0000,0x9E4CAD23,0xDD5F3A20,0x00000000
	.long  0x3FFD0000,0xF61CCE92,0x346600BB,0x00000000
	.long  0x3FFE0000,0x9CC8E160,0xC3FB19B9,0x00000000
	.long  0x3FFD0000,0xFB091FD3,0x8145630A,0x00000000
	.long  0x3FFE0000,0x9B4C6F9E,0xF03A3CAA,0x00000000
	.long  0x3FFD0000,0xFFE97042,0xBFA4C2AD,0x00000000
	.long  0x3FFE0000,0x99D722DA,0xBDE58F06,0x00000000
	.long  0x3FFE0000,0x825EFCED,0x49369330,0x00000000
	.long  0x3FFE0000,0x9868C809,0x868C8098,0x00000000
	.long  0x3FFE0000,0x84C37A7A,0xB9A905C9,0x00000000
	.long  0x3FFE0000,0x97012E02,0x5C04B809,0x00000000
	.long  0x3FFE0000,0x87224C2E,0x8E645FB7,0x00000000
	.long  0x3FFE0000,0x95A02568,0x095A0257,0x00000000
	.long  0x3FFE0000,0x897B8CAC,0x9F7DE298,0x00000000
	.long  0x3FFE0000,0x94458094,0x45809446,0x00000000
	.long  0x3FFE0000,0x8BCF55DE,0xC4CD05FE,0x00000000
	.long  0x3FFE0000,0x92F11384,0x0497889C,0x00000000
	.long  0x3FFE0000,0x8E1DC0FB,0x89E125E5,0x00000000
	.long  0x3FFE0000,0x91A2B3C4,0xD5E6F809,0x00000000
	.long  0x3FFE0000,0x9066E68C,0x955B6C9B,0x00000000
	.long  0x3FFE0000,0x905A3863,0x3E06C43B,0x00000000
	.long  0x3FFE0000,0x92AADE74,0xC7BE59E0,0x00000000
	.long  0x3FFE0000,0x8F1779D9,0xFDC3A219,0x00000000
	.long  0x3FFE0000,0x94E9BFF6,0x15845643,0x00000000
	.long  0x3FFE0000,0x8DDA5202,0x37694809,0x00000000
	.long  0x3FFE0000,0x9723A1B7,0x20134203,0x00000000
	.long  0x3FFE0000,0x8CA29C04,0x6514E023,0x00000000
	.long  0x3FFE0000,0x995899C8,0x90EB8990,0x00000000
	.long  0x3FFE0000,0x8B70344A,0x139BC75A,0x00000000
	.long  0x3FFE0000,0x9B88BDAA,0x3A3DAE2F,0x00000000
	.long  0x3FFE0000,0x8A42F870,0x5669DB46,0x00000000
	.long  0x3FFE0000,0x9DB4224F,0xFFE1157C,0x00000000
	.long  0x3FFE0000,0x891AC73A,0xE9819B50,0x00000000
	.long  0x3FFE0000,0x9FDADC26,0x8B7A12DA,0x00000000
	.long  0x3FFE0000,0x87F78087,0xF78087F8,0x00000000
	.long  0x3FFE0000,0xA1FCFF17,0xCE733BD4,0x00000000
	.long  0x3FFE0000,0x86D90544,0x7A34ACC6,0x00000000
	.long  0x3FFE0000,0xA41A9E8F,0x5446FB9F,0x00000000
	.long  0x3FFE0000,0x85BF3761,0x2CEE3C9B,0x00000000
	.long  0x3FFE0000,0xA633CD7E,0x6771CD8B,0x00000000
	.long  0x3FFE0000,0x84A9F9C8,0x084A9F9D,0x00000000
	.long  0x3FFE0000,0xA8489E60,0x0B435A5E,0x00000000
	.long  0x3FFE0000,0x83993052,0x3FBE3368,0x00000000
	.long  0x3FFE0000,0xAA59233C,0xCCA4BD49,0x00000000
	.long  0x3FFE0000,0x828CBFBE,0xB9A020A3,0x00000000
	.long  0x3FFE0000,0xAC656DAE,0x6BCC4985,0x00000000
	.long  0x3FFE0000,0x81848DA8,0xFAF0D277,0x00000000
	.long  0x3FFE0000,0xAE6D8EE3,0x60BB2468,0x00000000
	.long  0x3FFE0000,0x80808080,0x80808081,0x00000000
	.long  0x3FFE0000,0xB07197A2,0x3C46C654,0x00000000

	.set	ADJK,L_SCR1

	.set	X,FP_SCR1
	.set	XDCARE,X+2
	.set	XFRAC,X+4

	.set	F,FP_SCR2
	.set	FFRAC,F+4

	.set	KLOG2,FP_SCR3

	.set	SAVEU,FP_SCR4

	| xref	t_frcinx
	|xref	t_extdnrm
	|xref	t_operr
	|xref	t_dz

	.global	slognd
slognd:
|--ENTRY POINT FOR LOG(X) FOR DENORMALIZED INPUT

	movel		#-100,ADJK(%a6)	| ...INPUT = 2^(ADJK) * FP0

|----normalize the input value by left shifting k bits (k to be determined
|----below), adjusting exponent and storing -k to  ADJK
|----the value TWOTO100 is no longer needed.
|----Note that this code assumes the denormalized input is NON-ZERO.

     moveml	%d2-%d7,-(%a7)		| ...save some registers 
     movel	#0x00000000,%d3		| ...D3 is exponent of smallest norm. #
     movel	4(%a0),%d4
     movel	8(%a0),%d5		| ...(D4,D5) is (Hi_X,Lo_X)
     clrl	%d2			| ...D2 used for holding K

     tstl	%d4
     bnes	HiX_not0

HiX_0:
     movel	%d5,%d4
     clrl	%d5
     movel	#32,%d2
     clrl	%d6
     bfffo      %d4{#0:#32},%d6
     lsll      %d6,%d4
     addl	%d6,%d2			| ...(D3,D4,D5) is normalized

     movel	%d3,X(%a6)
     movel	%d4,XFRAC(%a6)
     movel	%d5,XFRAC+4(%a6)
     negl	%d2
     movel	%d2,ADJK(%a6)
     fmovex	X(%a6),%fp0
     moveml	(%a7)+,%d2-%d7		| ...restore registers
     lea	X(%a6),%a0
     bras	LOGBGN			| ...begin regular log(X)


HiX_not0:
     clrl	%d6
     bfffo	%d4{#0:#32},%d6		| ...find first 1
     movel	%d6,%d2			| ...get k
     lsll	%d6,%d4
     movel	%d5,%d7			| ...a copy of D5
     lsll	%d6,%d5
     negl	%d6
     addil	#32,%d6
     lsrl	%d6,%d7
     orl	%d7,%d4			| ...(D3,D4,D5) normalized

     movel	%d3,X(%a6)
     movel	%d4,XFRAC(%a6)
     movel	%d5,XFRAC+4(%a6)
     negl	%d2
     movel	%d2,ADJK(%a6)
     fmovex	X(%a6),%fp0
     moveml	(%a7)+,%d2-%d7		| ...restore registers
     lea	X(%a6),%a0
     bras	LOGBGN			| ...begin regular log(X)


	.global	slogn
slogn:
|--ENTRY POINT FOR LOG(X) FOR X FINITE, NON-ZERO, NOT NAN'S

	fmovex		(%a0),%fp0	| ...LOAD INPUT
	movel		#0x00000000,ADJK(%a6)

LOGBGN:
|--FPCR SAVED AND CLEARED, INPUT IS 2^(ADJK)*FP0, FP0 CONTAINS
|--A FINITE, NON-ZERO, NORMALIZED NUMBER.

	movel	(%a0),%d0
	movew	4(%a0),%d0

	movel	(%a0),X(%a6)
	movel	4(%a0),X+4(%a6)
	movel	8(%a0),X+8(%a6)

	cmpil	#0,%d0		| ...CHECK IF X IS NEGATIVE
	blt	LOGNEG		| ...LOG OF NEGATIVE ARGUMENT IS INVALID
	cmp2l	BOUNDS1,%d0	| ...X IS POSITIVE, CHECK IF X IS NEAR 1
	bcc	LOGNEAR1	| ...BOUNDS IS ROUGHLY [15/16, 17/16]

LOGMAIN:
|--THIS SHOULD BE THE USUAL CASE, X NOT VERY CLOSE TO 1

|--X = 2^(K) * Y, 1 <= Y < 2. THUS, Y = 1.XXXXXXXX....XX IN BINARY.
|--WE DEFINE F = 1.XXXXXX1, I.E. FIRST 7 BITS OF Y AND ATTACH A 1.
|--THE IDEA IS THAT LOG(X) = K*LOG2 + LOG(Y)
|--			 = K*LOG2 + LOG(F) + LOG(1 + (Y-F)/F).
|--NOTE THAT U = (Y-F)/F IS VERY SMALL AND THUS APPROXIMATING
|--LOG(1+U) CAN BE VERY EFFICIENT.
|--ALSO NOTE THAT THE VALUE 1/F IS STORED IN A TABLE SO THAT NO
|--DIVISION IS NEEDED TO CALCULATE (Y-F)/F. 

|--GET K, Y, F, AND ADDRESS OF 1/F.
	asrl	#8,%d0
	asrl	#8,%d0		| ...SHIFTED 16 BITS, BIASED EXPO. OF X
	subil	#0x3FFF,%d0 	| ...THIS IS K
	addl	ADJK(%a6),%d0	| ...ADJUST K, ORIGINAL INPUT MAY BE  DENORM.
	lea	LOGTBL,%a0 	| ...BASE ADDRESS OF 1/F AND LOG(F)
	fmovel	%d0,%fp1		| ...CONVERT K TO FLOATING-POINT FORMAT

|--WHILE THE CONVERSION IS GOING ON, WE GET F AND ADDRESS OF 1/F
	movel	#0x3FFF0000,X(%a6)	| ...X IS NOW Y, I.E. 2^(-K)*X
	movel	XFRAC(%a6),FFRAC(%a6)
	andil	#0xFE000000,FFRAC(%a6) | ...FIRST 7 BITS OF Y
	oril	#0x01000000,FFRAC(%a6) | ...GET F: ATTACH A 1 AT THE EIGHTH BIT
	movel	FFRAC(%a6),%d0	| ...READY TO GET ADDRESS OF 1/F
	andil	#0x7E000000,%d0	
	asrl	#8,%d0
	asrl	#8,%d0
	asrl	#4,%d0		| ...SHIFTED 20, D0 IS THE DISPLACEMENT
	addal	%d0,%a0		| ...A0 IS THE ADDRESS FOR 1/F

	fmovex	X(%a6),%fp0
	movel	#0x3fff0000,F(%a6)
	clrl	F+8(%a6)
	fsubx	F(%a6),%fp0		| ...Y-F
	fmovemx %fp2-%fp2/%fp3,-(%sp)	| ...SAVE FP2 WHILE FP0 IS NOT READY
|--SUMMARY: FP0 IS Y-F, A0 IS ADDRESS OF 1/F, FP1 IS K
|--REGISTERS SAVED: FPCR, FP1, FP2

LP1CONT1:
|--AN RE-ENTRY POINT FOR LOGNP1
	fmulx	(%a0),%fp0	| ...FP0 IS U = (Y-F)/F
	fmulx	LOGOF2,%fp1	| ...GET K*LOG2 WHILE FP0 IS NOT READY
	fmovex	%fp0,%fp2
	fmulx	%fp2,%fp2		| ...FP2 IS V=U*U
	fmovex	%fp1,KLOG2(%a6)	| ...PUT K*LOG2 IN MEMORY, FREE FP1

|--LOG(1+U) IS APPROXIMATED BY
|--U + V*(A1+U*(A2+U*(A3+U*(A4+U*(A5+U*A6))))) WHICH IS
|--[U + V*(A1+V*(A3+V*A5))]  +  [U*V*(A2+V*(A4+V*A6))]

	fmovex	%fp2,%fp3
	fmovex	%fp2,%fp1	

	fmuld	LOGA6,%fp1	| ...V*A6
	fmuld	LOGA5,%fp2	| ...V*A5

	faddd	LOGA4,%fp1	| ...A4+V*A6
	faddd	LOGA3,%fp2	| ...A3+V*A5

	fmulx	%fp3,%fp1		| ...V*(A4+V*A6)
	fmulx	%fp3,%fp2		| ...V*(A3+V*A5)

	faddd	LOGA2,%fp1	| ...A2+V*(A4+V*A6)
	faddd	LOGA1,%fp2	| ...A1+V*(A3+V*A5)

	fmulx	%fp3,%fp1		| ...V*(A2+V*(A4+V*A6))
	addal	#16,%a0		| ...ADDRESS OF LOG(F)
	fmulx	%fp3,%fp2		| ...V*(A1+V*(A3+V*A5)), FP3 RELEASED

	fmulx	%fp0,%fp1		| ...U*V*(A2+V*(A4+V*A6))
	faddx	%fp2,%fp0		| ...U+V*(A1+V*(A3+V*A5)), FP2 RELEASED

	faddx	(%a0),%fp1	| ...LOG(F)+U*V*(A2+V*(A4+V*A6))
	fmovemx  (%sp)+,%fp2-%fp2/%fp3	| ...RESTORE FP2
	faddx	%fp1,%fp0		| ...FP0 IS LOG(F) + LOG(1+U)

	fmovel	%d1,%fpcr
	faddx	KLOG2(%a6),%fp0	| ...FINAL ADD
	bra	t_frcinx


LOGNEAR1:
|--REGISTERS SAVED: FPCR, FP1. FP0 CONTAINS THE INPUT.
	fmovex	%fp0,%fp1
	fsubs	one,%fp1		| ...FP1 IS X-1
	fadds	one,%fp0		| ...FP0 IS X+1
	faddx	%fp1,%fp1		| ...FP1 IS 2(X-1)
|--LOG(X) = LOG(1+U/2)-LOG(1-U/2) WHICH IS AN ODD POLYNOMIAL
|--IN U, U = 2(X-1)/(X+1) = FP1/FP0

LP1CONT2:
|--THIS IS AN RE-ENTRY POINT FOR LOGNP1
	fdivx	%fp0,%fp1		| ...FP1 IS U
	fmovemx %fp2-%fp2/%fp3,-(%sp)	 | ...SAVE FP2
|--REGISTERS SAVED ARE NOW FPCR,FP1,FP2,FP3
|--LET V=U*U, W=V*V, CALCULATE
|--U + U*V*(B1 + V*(B2 + V*(B3 + V*(B4 + V*B5)))) BY
|--U + U*V*(  [B1 + W*(B3 + W*B5)]  +  [V*(B2 + W*B4)]  )
	fmovex	%fp1,%fp0
	fmulx	%fp0,%fp0	| ...FP0 IS V
	fmovex	%fp1,SAVEU(%a6) | ...STORE U IN MEMORY, FREE FP1
	fmovex	%fp0,%fp1	
	fmulx	%fp1,%fp1	| ...FP1 IS W

	fmoved	LOGB5,%fp3
	fmoved	LOGB4,%fp2

	fmulx	%fp1,%fp3	| ...W*B5
	fmulx	%fp1,%fp2	| ...W*B4

	faddd	LOGB3,%fp3 | ...B3+W*B5
	faddd	LOGB2,%fp2 | ...B2+W*B4

	fmulx	%fp3,%fp1	| ...W*(B3+W*B5), FP3 RELEASED

	fmulx	%fp0,%fp2	| ...V*(B2+W*B4)

	faddd	LOGB1,%fp1 | ...B1+W*(B3+W*B5)
	fmulx	SAVEU(%a6),%fp0 | ...FP0 IS U*V

	faddx	%fp2,%fp1	| ...B1+W*(B3+W*B5) + V*(B2+W*B4), FP2 RELEASED
	fmovemx (%sp)+,%fp2-%fp2/%fp3 | ...FP2 RESTORED

	fmulx	%fp1,%fp0	| ...U*V*( [B1+W*(B3+W*B5)] + [V*(B2+W*B4)] )

	fmovel	%d1,%fpcr
	faddx	SAVEU(%a6),%fp0		
	bra	t_frcinx
	rts

LOGNEG:
|--REGISTERS SAVED FPCR. LOG(-VE) IS INVALID
	bra	t_operr

	.global	slognp1d
slognp1d:
|--ENTRY POINT FOR LOG(1+Z) FOR DENORMALIZED INPUT
| Simply return the denorm

	bra	t_extdnrm

	.global	slognp1
slognp1:
|--ENTRY POINT FOR LOG(1+X) FOR X FINITE, NON-ZERO, NOT NAN'S

	fmovex	(%a0),%fp0	| ...LOAD INPUT
	fabsx	%fp0		|test magnitude
	fcmpx	LTHOLD,%fp0	|compare with min threshold
	fbgt	LP1REAL		|if greater, continue
	fmovel	#0,%fpsr		|clr N flag from compare
	fmovel	%d1,%fpcr
	fmovex	(%a0),%fp0	|return signed argument
	bra	t_frcinx

LP1REAL:
	fmovex	(%a0),%fp0	| ...LOAD INPUT
	movel	#0x00000000,ADJK(%a6)
	fmovex	%fp0,%fp1	| ...FP1 IS INPUT Z
	fadds	one,%fp0	| ...X := ROUND(1+Z)
	fmovex	%fp0,X(%a6)
	movew	XFRAC(%a6),XDCARE(%a6)
	movel	X(%a6),%d0
	cmpil	#0,%d0
	ble	LP1NEG0	| ...LOG OF ZERO OR -VE
	cmp2l	BOUNDS2,%d0
	bcs	LOGMAIN	| ...BOUNDS2 IS [1/2,3/2]
|--IF 1+Z > 3/2 OR 1+Z < 1/2, THEN X, WHICH IS ROUNDING 1+Z,
|--CONTAINS AT LEAST 63 BITS OF INFORMATION OF Z. IN THAT CASE,
|--SIMPLY INVOKE LOG(X) FOR LOG(1+Z).

LP1NEAR1:
|--NEXT SEE IF EXP(-1/16) < X < EXP(1/16)
	cmp2l	BOUNDS1,%d0
	bcss	LP1CARE

LP1ONE16:
|--EXP(-1/16) < X < EXP(1/16). LOG(1+Z) = LOG(1+U/2) - LOG(1-U/2)
|--WHERE U = 2Z/(2+Z) = 2Z/(1+X).
	faddx	%fp1,%fp1	| ...FP1 IS 2Z
	fadds	one,%fp0	| ...FP0 IS 1+X
|--U = FP1/FP0
	bra	LP1CONT2

LP1CARE:
|--HERE WE USE THE USUAL TABLE DRIVEN APPROACH. CARE HAS TO BE
|--TAKEN BECAUSE 1+Z CAN HAVE 67 BITS OF INFORMATION AND WE MUST
|--PRESERVE ALL THE INFORMATION. BECAUSE 1+Z IS IN [1/2,3/2],
|--THERE ARE ONLY TWO CASES.
|--CASE 1: 1+Z < 1, THEN K = -1 AND Y-F = (2-F) + 2Z
|--CASE 2: 1+Z > 1, THEN K = 0  AND Y-F = (1-F) + Z
|--ON RETURNING TO LP1CONT1, WE MUST HAVE K IN FP1, ADDRESS OF
|--(1/F) IN A0, Y-F IN FP0, AND FP2 SAVED.

	movel	XFRAC(%a6),FFRAC(%a6)
	andil	#0xFE000000,FFRAC(%a6)
	oril	#0x01000000,FFRAC(%a6)	| ...F OBTAINED
	cmpil	#0x3FFF8000,%d0	| ...SEE IF 1+Z > 1
	bges	KISZERO

KISNEG1:
	fmoves	TWO,%fp0
	movel	#0x3fff0000,F(%a6)
	clrl	F+8(%a6)
	fsubx	F(%a6),%fp0	| ...2-F
	movel	FFRAC(%a6),%d0
	andil	#0x7E000000,%d0
	asrl	#8,%d0
	asrl	#8,%d0
	asrl	#4,%d0		| ...D0 CONTAINS DISPLACEMENT FOR 1/F
	faddx	%fp1,%fp1		| ...GET 2Z
	fmovemx %fp2-%fp2/%fp3,-(%sp)	| ...SAVE FP2 
	faddx	%fp1,%fp0		| ...FP0 IS Y-F = (2-F)+2Z
	lea	LOGTBL,%a0	| ...A0 IS ADDRESS OF 1/F
	addal	%d0,%a0
	fmoves	negone,%fp1	| ...FP1 IS K = -1
	bra	LP1CONT1

KISZERO:
	fmoves	one,%fp0
	movel	#0x3fff0000,F(%a6)
	clrl	F+8(%a6)
	fsubx	F(%a6),%fp0		| ...1-F
	movel	FFRAC(%a6),%d0
	andil	#0x7E000000,%d0
	asrl	#8,%d0
	asrl	#8,%d0
	asrl	#4,%d0
	faddx	%fp1,%fp0		| ...FP0 IS Y-F
	fmovemx %fp2-%fp2/%fp3,-(%sp)	| ...FP2 SAVED
	lea	LOGTBL,%a0
	addal	%d0,%a0	 	| ...A0 IS ADDRESS OF 1/F
	fmoves	zero,%fp1	| ...FP1 IS K = 0
	bra	LP1CONT1

LP1NEG0:
|--FPCR SAVED. D0 IS X IN COMPACT FORM.
	cmpil	#0,%d0
	blts	LP1NEG
LP1ZERO:
	fmoves	negone,%fp0

	fmovel	%d1,%fpcr
	bra t_dz

LP1NEG:
	fmoves	zero,%fp0

	fmovel	%d1,%fpcr
	bra	t_operr

	|end
|
|	smovecr.sa 3.1 12/10/90
|
|	The entry point sMOVECR returns the constant at the
|	offset given in the instruction field.
|
|	Input: An offset in the instruction word.
|
|	Output:	The constant rounded to the user's rounding
|		mode unchecked for overflow.
|
|	Modified: fp0.
|
|
|		Copyright (C) Motorola, Inc. 1990
|			All Rights Reserved
|
|	THIS IS UNPUBLISHED PROPRIETARY SOURCE CODE OF MOTOROLA 
|	The copyright notice above does not evidence any  
|	actual or intended publication of such source code.

|SMOVECR	idnt	2,1 | Motorola 040 Floating Point Software Package

	|section 8

	.include "fpsp.h"

	|xref	nrm_set
	|xref	round
	|xref	PIRN
	|xref	PIRZRM
	|xref	PIRP
	|xref	SMALRN
	|xref	SMALRZRM
	|xref	SMALRP
	|xref	BIGRN
	|xref	BIGRZRM
	|xref	BIGRP

FZERO:	.long	00000000
|
|	FMOVECR 
|
	.global	smovcr
smovcr:
	bfextu	CMDREG1B(%a6){#9:#7},%d0 |get offset
	bfextu	USER_FPCR(%a6){#26:#2},%d1 |get rmode
|
| check range of offset
|
	tstb	%d0		|if zero, offset is to pi
	beqs	PI_TBL		|it is pi
	cmpib	#0x0a,%d0		|check range $01 - $0a
	bles	Z_VAL		|if in this range, return zero
	cmpib	#0x0e,%d0		|check range $0b - $0e
	bles	SM_TBL		|valid constants in this range
	cmpib	#0x2f,%d0		|check range $10 - $2f
	bles	Z_VAL		|if in this range, return zero 
	cmpib	#0x3f,%d0		|check range $30 - $3f
	ble  	BG_TBL		|valid constants in this range
Z_VAL:
	fmoves	FZERO,%fp0
	rts
PI_TBL:
	tstb	%d1		|offset is zero, check for rmode
	beqs	PI_RN		|if zero, rn mode
	cmpib	#0x3,%d1		|check for rp
	beqs	PI_RP		|if 3, rp mode
PI_RZRM:
	leal	PIRZRM,%a0	|rmode is rz or rm, load PIRZRM in a0
	bra	set_finx
PI_RN:
	leal	PIRN,%a0		|rmode is rn, load PIRN in a0
	bra	set_finx
PI_RP:
	leal	PIRP,%a0		|rmode is rp, load PIRP in a0
	bra	set_finx
SM_TBL:
	subil	#0xb,%d0		|make offset in 0 - 4 range
	tstb	%d1		|check for rmode
	beqs	SM_RN		|if zero, rn mode
	cmpib	#0x3,%d1		|check for rp
	beqs	SM_RP		|if 3, rp mode
SM_RZRM:
	leal	SMALRZRM,%a0	|rmode is rz or rm, load SMRZRM in a0
	cmpib	#0x2,%d0		|check if result is inex
	ble	set_finx	|if 0 - 2, it is inexact
	bra	no_finx		|if 3, it is exact
SM_RN:
	leal	SMALRN,%a0	|rmode is rn, load SMRN in a0
	cmpib	#0x2,%d0		|check if result is inex
	ble	set_finx	|if 0 - 2, it is inexact
	bra	no_finx		|if 3, it is exact
SM_RP:
	leal	SMALRP,%a0	|rmode is rp, load SMRP in a0
	cmpib	#0x2,%d0		|check if result is inex
	ble	set_finx	|if 0 - 2, it is inexact
	bra	no_finx		|if 3, it is exact
BG_TBL:
	subil	#0x30,%d0		|make offset in 0 - f range
	tstb	%d1		|check for rmode
	beqs	BG_RN		|if zero, rn mode
	cmpib	#0x3,%d1		|check for rp
	beqs	BG_RP		|if 3, rp mode
BG_RZRM:
	leal	BIGRZRM,%a0	|rmode is rz or rm, load BGRZRM in a0
	cmpib	#0x1,%d0		|check if result is inex
	ble	set_finx	|if 0 - 1, it is inexact
	cmpib	#0x7,%d0		|second check
	ble	no_finx		|if 0 - 7, it is exact
	bra	set_finx	|if 8 - f, it is inexact
BG_RN:
	leal	BIGRN,%a0	|rmode is rn, load BGRN in a0
	cmpib	#0x1,%d0		|check if result is inex
	ble	set_finx	|if 0 - 1, it is inexact
	cmpib	#0x7,%d0		|second check
	ble	no_finx		|if 0 - 7, it is exact
	bra	set_finx	|if 8 - f, it is inexact
BG_RP:
	leal	BIGRP,%a0	|rmode is rp, load SMRP in a0
	cmpib	#0x1,%d0		|check if result is inex
	ble	set_finx	|if 0 - 1, it is inexact
	cmpib	#0x7,%d0		|second check
	ble	no_finx		|if 0 - 7, it is exact
|	bra	set_finx	;if 8 - f, it is inexact
set_finx:
	orl	#inx2a_mask,USER_FPSR(%a6) |set inex2/ainex
no_finx:
	mulul	#12,%d0			|use offset to point into tables
	movel	%d1,L_SCR1(%a6)		|load mode for round call
	bfextu	USER_FPCR(%a6){#24:#2},%d1	|get precision
	tstl	%d1			|check if extended precision
|
| Precision is extended
|
	bnes	not_ext			|if extended, do not call round
	fmovemx (%a0,%d0),%fp0-%fp0		|return result in fp0
	rts
|
| Precision is single or double
|
not_ext:
	swap	%d1			|rnd prec in upper word of d1
	addl	L_SCR1(%a6),%d1		|merge rmode in low word of d1
	movel	(%a0,%d0),FP_SCR1(%a6)	|load first word to temp storage
	movel	4(%a0,%d0),FP_SCR1+4(%a6)	|load second word
	movel	8(%a0,%d0),FP_SCR1+8(%a6)	|load third word
	clrl	%d0			|clear g,r,s
	lea	FP_SCR1(%a6),%a0
	btstb	#sign_bit,LOCAL_EX(%a0)
	sne	LOCAL_SGN(%a0)		|convert to internal ext. format
	
	bsr	round			|go round the mantissa

	bfclr	LOCAL_SGN(%a0){#0:#8}	|convert back to IEEE ext format
	beqs	fin_fcr
	bsetb	#sign_bit,LOCAL_EX(%a0)
fin_fcr:
	fmovemx (%a0),%fp0-%fp0
	rts

	|end
|
|	srem_mod.sa 3.1 12/10/90
|
|      The entry point sMOD computes the floating point MOD of the
|      input values X and Y. The entry point sREM computes the floating
|      point (IEEE) REM of the input values X and Y.
|
|      INPUT
|      -----
|      Double-extended value Y is pointed to by address in register
|      A0. Double-extended value X is located in -12(A0). The values
|      of X and Y are both nonzero and finite; although either or both
|      of them can be denormalized. The special cases of zeros, NaNs,
|      and infinities are handled elsewhere.
|
|      OUTPUT
|      ------
|      FREM(X,Y) or FMOD(X,Y), depending on entry point.
|
|       ALGORITHM
|       ---------
|
|       Step 1.  Save and strip signs of X and Y: signX := sign(X),
|                signY := sign(Y), X := |X|, Y := |Y|, 
|                signQ := signX EOR signY. Record whether MOD or REM
|                is requested.
|
|       Step 2.  Set L := expo(X)-expo(Y), k := 0, Q := 0.
|                If (L < 0) then
|                   R := X, go to Step 4.
|                else
|                   R := 2^(-L)X, j := L.
|                endif
|
|       Step 3.  Perform MOD(X,Y)
|            3.1 If R = Y, go to Step 9.
|            3.2 If R > Y, then { R := R - Y, Q := Q + 1}
|            3.3 If j = 0, go to Step 4.
|            3.4 k := k + 1, j := j - 1, Q := 2Q, R := 2R. Go to
|                Step 3.1.
|
|       Step 4.  At this point, R = X - QY = MOD(X,Y). Set
|                Last_Subtract := false (used in Step 7 below). If
|                MOD is requested, go to Step 6. 
|
|       Step 5.  R = MOD(X,Y), but REM(X,Y) is requested.
|            5.1 If R < Y/2, then R = MOD(X,Y) = REM(X,Y). Go to
|                Step 6.
|            5.2 If R > Y/2, then { set Last_Subtract := true,
|                Q := Q + 1, Y := signY*Y }. Go to Step 6.
|            5.3 This is the tricky case of R = Y/2. If Q is odd,
|                then { Q := Q + 1, signX := -signX }.
|
|       Step 6.  R := signX*R.
|
|       Step 7.  If Last_Subtract = true, R := R - Y.
|
|       Step 8.  Return signQ, last 7 bits of Q, and R as required.
|
|       Step 9.  At this point, R = 2^(-j)*X - Q Y = Y. Thus,
|                X = 2^(j)*(Q+1)Y. set Q := 2^(j)*(Q+1),
|                R := 0. Return signQ, last 7 bits of Q, and R.
|
|                
             
|		Copyright (C) Motorola, Inc. 1990
|			All Rights Reserved
|
|	THIS IS UNPUBLISHED PROPRIETARY SOURCE CODE OF MOTOROLA 
|	The copyright notice above does not evidence any  
|	actual or intended publication of such source code.

SREM_MOD:    |idnt    2,1 | Motorola 040 Floating Point Software Package

	|section    8

	.include "fpsp.h"

	.set	Mod_Flag,L_SCR3
	.set	SignY,FP_SCR3+4
	.set	SignX,FP_SCR3+8
	.set	SignQ,FP_SCR3+12
	.set	Sc_Flag,FP_SCR4

	.set	Y,FP_SCR1
	.set	Y_Hi,Y+4
	.set	Y_Lo,Y+8

	.set	R,FP_SCR2
	.set	R_Hi,R+4
	.set	R_Lo,R+8


Scale:     .long	0x00010000,0x80000000,0x00000000,0x00000000

	|xref	t_avoid_unsupp

        .global        smod
smod:

   movel               #0,Mod_Flag(%a6)
   bras                Mod_Rem

        .global        srem
srem:

   movel               #1,Mod_Flag(%a6)

Mod_Rem:
|..Save sign of X and Y
   moveml              %d2-%d7,-(%a7)     | ...save data registers
   movew               (%a0),%d3
   movew               %d3,SignY(%a6)
   andil               #0x00007FFF,%d3   | ...Y := |Y|

|
   movel               4(%a0),%d4
   movel               8(%a0),%d5        | ...(D3,D4,D5) is |Y|

   tstl                %d3
   bnes                Y_Normal

   movel               #0x00003FFE,%d3	| ...$3FFD + 1
   tstl                %d4
   bnes                HiY_not0

HiY_0:
   movel               %d5,%d4
   clrl                %d5
   subil               #32,%d3
   clrl                %d6
   bfffo                %d4{#0:#32},%d6
   lsll                %d6,%d4
   subl                %d6,%d3           | ...(D3,D4,D5) is normalized
|                                       ...with bias $7FFD
   bras                Chk_X

HiY_not0:
   clrl                %d6
   bfffo                %d4{#0:#32},%d6
   subl                %d6,%d3
   lsll                %d6,%d4
   movel               %d5,%d7           | ...a copy of D5
   lsll                %d6,%d5
   negl                %d6
   addil               #32,%d6
   lsrl                %d6,%d7
   orl                 %d7,%d4           | ...(D3,D4,D5) normalized
|                                       ...with bias $7FFD
   bras                Chk_X

Y_Normal:
   addil               #0x00003FFE,%d3   | ...(D3,D4,D5) normalized
|                                       ...with bias $7FFD

Chk_X:
   movew               -12(%a0),%d0
   movew               %d0,SignX(%a6)
   movew               SignY(%a6),%d1
   eorl                %d0,%d1
   andil               #0x00008000,%d1
   movew               %d1,SignQ(%a6)	| ...sign(Q) obtained
   andil               #0x00007FFF,%d0
   movel               -8(%a0),%d1
   movel               -4(%a0),%d2       | ...(D0,D1,D2) is |X|
   tstl                %d0
   bnes                X_Normal
   movel               #0x00003FFE,%d0
   tstl                %d1
   bnes                HiX_not0

HiX_0:
   movel               %d2,%d1
   clrl                %d2
   subil               #32,%d0
   clrl                %d6
   bfffo                %d1{#0:#32},%d6
   lsll                %d6,%d1
   subl                %d6,%d0           | ...(D0,D1,D2) is normalized
|                                       ...with bias $7FFD
   bras                Init

HiX_not0:
   clrl                %d6
   bfffo                %d1{#0:#32},%d6
   subl                %d6,%d0
   lsll                %d6,%d1
   movel               %d2,%d7           | ...a copy of D2
   lsll                %d6,%d2
   negl                %d6
   addil               #32,%d6
   lsrl                %d6,%d7
   orl                 %d7,%d1           | ...(D0,D1,D2) normalized
|                                       ...with bias $7FFD
   bras                Init

X_Normal:
   addil               #0x00003FFE,%d0   | ...(D0,D1,D2) normalized
|                                       ...with bias $7FFD

Init:
|
   movel               %d3,L_SCR1(%a6)   | ...save biased expo(Y)
   movel		%d0,L_SCR2(%a6)	|save d0
   subl                %d3,%d0           | ...L := expo(X)-expo(Y)
|   Move.L               D0,L            ...D0 is j
   clrl                %d6              | ...D6 := carry <- 0
   clrl                %d3              | ...D3 is Q
   moveal              #0,%a1           | ...A1 is k; j+k=L, Q=0

|..(Carry,D1,D2) is R
   tstl                %d0
   bges                Mod_Loop

|..expo(X) < expo(Y). Thus X = mod(X,Y)
|
   movel		L_SCR2(%a6),%d0	|restore d0
   bra                Get_Mod

|..At this point  R = 2^(-L)X; Q = 0; k = 0; and  k+j = L


Mod_Loop:
   tstl                %d6              | ...test carry bit
   bgts                R_GT_Y

|..At this point carry = 0, R = (D1,D2), Y = (D4,D5)
   cmpl                %d4,%d1           | ...compare hi(R) and hi(Y)
   bnes                R_NE_Y
   cmpl                %d5,%d2           | ...compare lo(R) and lo(Y)
   bnes                R_NE_Y

|..At this point, R = Y
   bra                Rem_is_0

R_NE_Y:
|..use the borrow of the previous compare
   bcss                R_LT_Y          | ...borrow is set iff R < Y

R_GT_Y:
|..If Carry is set, then Y < (Carry,D1,D2) < 2Y. Otherwise, Carry = 0
|..and Y < (D1,D2) < 2Y. Either way, perform R - Y
   subl                %d5,%d2           | ...lo(R) - lo(Y)
   subxl               %d4,%d1           | ...hi(R) - hi(Y)
   clrl                %d6              | ...clear carry
   addql               #1,%d3           | ...Q := Q + 1

R_LT_Y:
|..At this point, Carry=0, R < Y. R = 2^(k-L)X - QY; k+j = L; j >= 0.
   tstl                %d0              | ...see if j = 0.
   beqs                PostLoop

   addl                %d3,%d3           | ...Q := 2Q
   addl                %d2,%d2           | ...lo(R) = 2lo(R)
   roxll               #1,%d1           | ...hi(R) = 2hi(R) + carry
   scs                  %d6              | ...set Carry if 2(R) overflows
   addql               #1,%a1           | ...k := k+1
   subql               #1,%d0           | ...j := j - 1
|..At this point, R=(Carry,D1,D2) = 2^(k-L)X - QY, j+k=L, j >= 0, R < 2Y.

   bras                Mod_Loop

PostLoop:
|..k = L, j = 0, Carry = 0, R = (D1,D2) = X - QY, R < Y.

|..normalize R.
   movel               L_SCR1(%a6),%d0           | ...new biased expo of R
   tstl                %d1
   bnes                HiR_not0

HiR_0:
   movel               %d2,%d1
   clrl                %d2
   subil               #32,%d0
   clrl                %d6
   bfffo                %d1{#0:#32},%d6
   lsll                %d6,%d1
   subl                %d6,%d0           | ...(D0,D1,D2) is normalized
|                                       ...with bias $7FFD
   bras                Get_Mod

HiR_not0:
   clrl                %d6
   bfffo                %d1{#0:#32},%d6
   bmis                Get_Mod         | ...already normalized
   subl                %d6,%d0
   lsll                %d6,%d1
   movel               %d2,%d7           | ...a copy of D2
   lsll                %d6,%d2
   negl                %d6
   addil               #32,%d6
   lsrl                %d6,%d7
   orl                 %d7,%d1           | ...(D0,D1,D2) normalized

|
Get_Mod:
   cmpil		#0x000041FE,%d0
   bges		No_Scale
Do_Scale:
   movew		%d0,R(%a6)
   clrw		R+2(%a6)
   movel		%d1,R_Hi(%a6)
   movel		%d2,R_Lo(%a6)
   movel		L_SCR1(%a6),%d6
   movew		%d6,Y(%a6)
   clrw		Y+2(%a6)
   movel		%d4,Y_Hi(%a6)
   movel		%d5,Y_Lo(%a6)
   fmovex		R(%a6),%fp0		| ...no exception
   movel		#1,Sc_Flag(%a6)
   bras		ModOrRem
No_Scale:
   movel		%d1,R_Hi(%a6)
   movel		%d2,R_Lo(%a6)
   subil		#0x3FFE,%d0
   movew		%d0,R(%a6)
   clrw		R+2(%a6)
   movel		L_SCR1(%a6),%d6
   subil		#0x3FFE,%d6
   movel		%d6,L_SCR1(%a6)
   fmovex		R(%a6),%fp0
   movew		%d6,Y(%a6)
   movel		%d4,Y_Hi(%a6)
   movel		%d5,Y_Lo(%a6)
   movel		#0,Sc_Flag(%a6)

|


ModOrRem:
   movel               Mod_Flag(%a6),%d6
   beqs                Fix_Sign

   movel               L_SCR1(%a6),%d6           | ...new biased expo(Y)
   subql               #1,%d6           | ...biased expo(Y/2)
   cmpl                %d6,%d0
   blts                Fix_Sign
   bgts                Last_Sub

   cmpl                %d4,%d1
   bnes                Not_EQ
   cmpl                %d5,%d2
   bnes                Not_EQ
   bra                Tie_Case

Not_EQ:
   bcss                Fix_Sign

Last_Sub:
|
   fsubx		Y(%a6),%fp0		| ...no exceptions
   addql               #1,%d3           | ...Q := Q + 1

|

Fix_Sign:
|..Get sign of X
   movew               SignX(%a6),%d6
   bges		Get_Q
   fnegx		%fp0

|..Get Q
|
Get_Q:
   clrl		%d6		
   movew               SignQ(%a6),%d6        | ...D6 is sign(Q)
   movel               #8,%d7
   lsrl                %d7,%d6           
   andil               #0x0000007F,%d3   | ...7 bits of Q
   orl                 %d6,%d3           | ...sign and bits of Q
   swap                 %d3
   fmovel              %fpsr,%d6
   andil               #0xFF00FFFF,%d6
   orl                 %d3,%d6
   fmovel              %d6,%fpsr         | ...put Q in fpsr

|
Restore:
   moveml              (%a7)+,%d2-%d7
   fmovel              USER_FPCR(%a6),%fpcr
   movel               Sc_Flag(%a6),%d0
   beqs                Finish
   fmulx		Scale(%pc),%fp0	| ...may cause underflow
   bra			t_avoid_unsupp	|check for denorm as a
|					;result of the scaling

Finish:
	fmovex		%fp0,%fp0		|capture exceptions & round
	rts

Rem_is_0:
|..R = 2^(-j)X - Q Y = Y, thus R = 0 and quotient = 2^j (Q+1)
   addql               #1,%d3
   cmpil               #8,%d0           | ...D0 is j 
   bges                Q_Big

   lsll                %d0,%d3
   bras                Set_R_0

Q_Big:
   clrl                %d3

Set_R_0:
   fmoves		#0x00000000,%fp0
   movel		#0,Sc_Flag(%a6)
   bra                Fix_Sign

Tie_Case:
|..Check parity of Q
   movel               %d3,%d6
   andil               #0x00000001,%d6
   tstl                %d6
   beq                Fix_Sign	| ...Q is even

|..Q is odd, Q := Q + 1, signX := -signX
   addql               #1,%d3
   movew               SignX(%a6),%d6
   eoril               #0x00008000,%d6
   movew               %d6,SignX(%a6)
   bra                Fix_Sign

   |end
|
|	ssin.sa 3.3 7/29/91
|
|	The entry point sSIN computes the sine of an input argument
|	sCOS computes the cosine, and sSINCOS computes both. The
|	corresponding entry points with a "d" computes the same
|	corresponding function values for denormalized inputs.
|
|	Input: Double-extended number X in location pointed to
|		by address register a0.
|
|	Output: The function value sin(X) or cos(X) returned in Fp0 if SIN or
|		COS is requested. Otherwise, for SINCOS, sin(X) is returned
|		in Fp0, and cos(X) is returned in Fp1.
|
|	Modifies: Fp0 for SIN or COS; both Fp0 and Fp1 for SINCOS.
|
|	Accuracy and Monotonicity: The returned result is within 1 ulp in
|		64 significant bit, i.e. within 0.5001 ulp to 53 bits if the
|		result is subsequently rounded to double precision. The
|		result is provably monotonic in double precision.
|
|	Speed: The programs sSIN and sCOS take approximately 150 cycles for
|		input argument X such that |X| < 15Pi, which is the usual
|		situation. The speed for sSINCOS is approximately 190 cycles.
|
|	Algorithm:
|
|	SIN and COS:
|	1. If SIN is invoked, set AdjN := 0; otherwise, set AdjN := 1.
|
|	2. If |X| >= 15Pi or |X| < 2**(-40), go to 7.
|
|	3. Decompose X as X = N(Pi/2) + r where |r| <= Pi/4. Let
|		k = N mod 4, so in particular, k = 0,1,2,or 3. Overwrite
|		k by k := k + AdjN.
|
|	4. If k is even, go to 6.
|
|	5. (k is odd) Set j := (k-1)/2, sgn := (-1)**j. Return sgn*cos(r)
|		where cos(r) is approximated by an even polynomial in r,
|		1 + r*r*(B1+s*(B2+ ... + s*B8)),	s = r*r.
|		Exit.
|
|	6. (k is even) Set j := k/2, sgn := (-1)**j. Return sgn*sin(r)
|		where sin(r) is approximated by an odd polynomial in r
|		r + r*s*(A1+s*(A2+ ... + s*A7)),	s = r*r.
|		Exit.
|
|	7. If |X| > 1, go to 9.
|
|	8. (|X|<2**(-40)) If SIN is invoked, return X; otherwise return 1.
|
|	9. Overwrite X by X := X rem 2Pi. Now that |X| <= Pi, go back to 3.
|
|	SINCOS:
|	1. If |X| >= 15Pi or |X| < 2**(-40), go to 6.
|
|	2. Decompose X as X = N(Pi/2) + r where |r| <= Pi/4. Let
|		k = N mod 4, so in particular, k = 0,1,2,or 3.
|
|	3. If k is even, go to 5.
|
|	4. (k is odd) Set j1 := (k-1)/2, j2 := j1 (EOR) (k mod 2), i.e.
|		j1 exclusive or with the l.s.b. of k.
|		sgn1 := (-1)**j1, sgn2 := (-1)**j2.
|		SIN(X) = sgn1 * cos(r) and COS(X) = sgn2*sin(r) where
|		sin(r) and cos(r) are computed as odd and even polynomials
|		in r, respectively. Exit
|
|	5. (k is even) Set j1 := k/2, sgn1 := (-1)**j1.
|		SIN(X) = sgn1 * sin(r) and COS(X) = sgn1*cos(r) where
|		sin(r) and cos(r) are computed as odd and even polynomials
|		in r, respectively. Exit
|
|	6. If |X| > 1, go to 8.
|
|	7. (|X|<2**(-40)) SIN(X) = X and COS(X) = 1. Exit.
|
|	8. Overwrite X by X := X rem 2Pi. Now that |X| <= Pi, go back to 2.
|

|		Copyright (C) Motorola, Inc. 1990
|			All Rights Reserved
|
|	THIS IS UNPUBLISHED PROPRIETARY SOURCE CODE OF MOTOROLA 
|	The copyright notice above does not evidence any  
|	actual or intended publication of such source code.

|SSIN	idnt	2,1 | Motorola 040 Floating Point Software Package

	|section	8

	.include "fpsp.h"

BOUNDS1:	.long 0x3FD78000,0x4004BC7E
TWOBYPI:	.long 0x3FE45F30,0x6DC9C883

SINA7:	.long 0xBD6AAA77,0xCCC994F5
SINA6:	.long 0x3DE61209,0x7AAE8DA1

SINA5:	.long 0xBE5AE645,0x2A118AE4
SINA4:	.long 0x3EC71DE3,0xA5341531

SINA3:	.long 0xBF2A01A0,0x1A018B59,0x00000000,0x00000000

SINA2:	.long 0x3FF80000,0x88888888,0x888859AF,0x00000000

SINA1:	.long 0xBFFC0000,0xAAAAAAAA,0xAAAAAA99,0x00000000

COSB8:	.long 0x3D2AC4D0,0xD6011EE3
COSB7:	.long 0xBDA9396F,0x9F45AC19

COSB6:	.long 0x3E21EED9,0x0612C972
COSB5:	.long 0xBE927E4F,0xB79D9FCF

COSB4:	.long 0x3EFA01A0,0x1A01D423,0x00000000,0x00000000

COSB3:	.long 0xBFF50000,0xB60B60B6,0x0B61D438,0x00000000

COSB2:	.long 0x3FFA0000,0xAAAAAAAA,0xAAAAAB5E
COSB1:	.long 0xBF000000

INVTWOPI: .long 0x3FFC0000,0xA2F9836E,0x4E44152A

TWOPI1:	.long 0x40010000,0xC90FDAA2,0x00000000,0x00000000
TWOPI2:	.long 0x3FDF0000,0x85A308D4,0x00000000,0x00000000

	|xref	PITBL

	.set	INARG,FP_SCR4

	.set	X,FP_SCR5
	.set	XDCARE,X+2
	.set	XFRAC,X+4

	.set	RPRIME,FP_SCR1
	.set	SPRIME,FP_SCR2

	.set	POSNEG1,L_SCR1
	.set	TWOTO63,L_SCR1

	.set	ENDFLAG,L_SCR2
	.set	N,L_SCR2

	.set	ADJN,L_SCR3

	| xref	t_frcinx
	|xref	t_extdnrm
	|xref	sto_cos

	.global	ssind
ssind:
|--SIN(X) = X FOR DENORMALIZED X
	bra		t_extdnrm

	.global	scosd
scosd:
|--COS(X) = 1 FOR DENORMALIZED X

	fmoves		#0x3F800000,%fp0
|
|	9D25B Fix: Sometimes the previous fmove.s sets fpsr bits
|
	fmovel		#0,%fpsr
|
	bra		t_frcinx

	.global	ssin
ssin:
|--SET ADJN TO 0
	movel		#0,ADJN(%a6)
	bras		SINBGN

	.global	scos
scos:
|--SET ADJN TO 1
	movel		#1,ADJN(%a6)

SINBGN:
|--SAVE FPCR, FP1. CHECK IF |X| IS TOO SMALL OR LARGE

	fmovex		(%a0),%fp0	| ...LOAD INPUT

	movel		(%a0),%d0
	movew		4(%a0),%d0
	fmovex		%fp0,X(%a6)
	andil		#0x7FFFFFFF,%d0		| ...COMPACTIFY X

	cmpil		#0x3FD78000,%d0		| ...|X| >= 2**(-40)?
	bges		SOK1
	bra		SINSM

SOK1:
	cmpil		#0x4004BC7E,%d0		| ...|X| < 15 PI?
	blts		SINMAIN
	bra		REDUCEX

SINMAIN:
|--THIS IS THE USUAL CASE, |X| <= 15 PI.
|--THE ARGUMENT REDUCTION IS DONE BY TABLE LOOK UP.
	fmovex		%fp0,%fp1
	fmuld		TWOBYPI,%fp1	| ...X*2/PI

|--HIDE THE NEXT THREE INSTRUCTIONS
	lea		PITBL+0x200,%a1 | ...TABLE OF N*PI/2, N = -32,...,32
	

|--FP1 IS NOW READY
	fmovel		%fp1,N(%a6)		| ...CONVERT TO INTEGER

	movel		N(%a6),%d0
	asll		#4,%d0
	addal		%d0,%a1	| ...A1 IS THE ADDRESS OF N*PIBY2
|				...WHICH IS IN TWO PIECES Y1 & Y2

	fsubx		(%a1)+,%fp0	| ...X-Y1
|--HIDE THE NEXT ONE
	fsubs		(%a1),%fp0	| ...FP0 IS R = (X-Y1)-Y2

SINCONT:
|--continuation from REDUCEX

|--GET N+ADJN AND SEE IF SIN(R) OR COS(R) IS NEEDED
	movel		N(%a6),%d0
	addl		ADJN(%a6),%d0	| ...SEE IF D0 IS ODD OR EVEN
	rorl		#1,%d0	| ...D0 WAS ODD IFF D0 IS NEGATIVE
	cmpil		#0,%d0
	blt		COSPOLY

SINPOLY:
|--LET J BE THE LEAST SIG. BIT OF D0, LET SGN := (-1)**J.
|--THEN WE RETURN	SGN*SIN(R). SGN*SIN(R) IS COMPUTED BY
|--R' + R'*S*(A1 + S(A2 + S(A3 + S(A4 + ... + SA7)))), WHERE
|--R' = SGN*R, S=R*R. THIS CAN BE REWRITTEN AS
|--R' + R'*S*( [A1+T(A3+T(A5+TA7))] + [S(A2+T(A4+TA6))])
|--WHERE T=S*S.
|--NOTE THAT A3 THROUGH A7 ARE STORED IN DOUBLE PRECISION
|--WHILE A1 AND A2 ARE IN DOUBLE-EXTENDED FORMAT.
	fmovex		%fp0,X(%a6)	| ...X IS R
	fmulx		%fp0,%fp0	| ...FP0 IS S
|---HIDE THE NEXT TWO WHILE WAITING FOR FP0
	fmoved		SINA7,%fp3
	fmoved		SINA6,%fp2
|--FP0 IS NOW READY
	fmovex		%fp0,%fp1
	fmulx		%fp1,%fp1	| ...FP1 IS T
|--HIDE THE NEXT TWO WHILE WAITING FOR FP1

	rorl		#1,%d0
	andil		#0x80000000,%d0
|				...LEAST SIG. BIT OF D0 IN SIGN POSITION
	eorl		%d0,X(%a6)	| ...X IS NOW R'= SGN*R

	fmulx		%fp1,%fp3	| ...TA7
	fmulx		%fp1,%fp2	| ...TA6

	faddd		SINA5,%fp3 | ...A5+TA7
	faddd		SINA4,%fp2 | ...A4+TA6

	fmulx		%fp1,%fp3	| ...T(A5+TA7)
	fmulx		%fp1,%fp2	| ...T(A4+TA6)

	faddd		SINA3,%fp3 | ...A3+T(A5+TA7)
	faddx		SINA2,%fp2 | ...A2+T(A4+TA6)

	fmulx		%fp3,%fp1	| ...T(A3+T(A5+TA7))

	fmulx		%fp0,%fp2	| ...S(A2+T(A4+TA6))
	faddx		SINA1,%fp1 | ...A1+T(A3+T(A5+TA7))
	fmulx		X(%a6),%fp0	| ...R'*S

	faddx		%fp2,%fp1	| ...[A1+T(A3+T(A5+TA7))]+[S(A2+T(A4+TA6))]
|--FP3 RELEASED, RESTORE NOW AND TAKE SOME ADVANTAGE OF HIDING
|--FP2 RELEASED, RESTORE NOW AND TAKE FULL ADVANTAGE OF HIDING
	

	fmulx		%fp1,%fp0		| ...SIN(R')-R'
|--FP1 RELEASED.

	fmovel		%d1,%FPCR		|restore users exceptions
	faddx		X(%a6),%fp0		|last inst - possible exception set
	bra		t_frcinx


COSPOLY:
|--LET J BE THE LEAST SIG. BIT OF D0, LET SGN := (-1)**J.
|--THEN WE RETURN	SGN*COS(R). SGN*COS(R) IS COMPUTED BY
|--SGN + S'*(B1 + S(B2 + S(B3 + S(B4 + ... + SB8)))), WHERE
|--S=R*R AND S'=SGN*S. THIS CAN BE REWRITTEN AS
|--SGN + S'*([B1+T(B3+T(B5+TB7))] + [S(B2+T(B4+T(B6+TB8)))])
|--WHERE T=S*S.
|--NOTE THAT B4 THROUGH B8 ARE STORED IN DOUBLE PRECISION
|--WHILE B2 AND B3 ARE IN DOUBLE-EXTENDED FORMAT, B1 IS -1/2
|--AND IS THEREFORE STORED AS SINGLE PRECISION.

	fmulx		%fp0,%fp0	| ...FP0 IS S
|---HIDE THE NEXT TWO WHILE WAITING FOR FP0
	fmoved		COSB8,%fp2
	fmoved		COSB7,%fp3
|--FP0 IS NOW READY
	fmovex		%fp0,%fp1
	fmulx		%fp1,%fp1	| ...FP1 IS T
|--HIDE THE NEXT TWO WHILE WAITING FOR FP1
	fmovex		%fp0,X(%a6)	| ...X IS S
	rorl		#1,%d0
	andil		#0x80000000,%d0
|			...LEAST SIG. BIT OF D0 IN SIGN POSITION

	fmulx		%fp1,%fp2	| ...TB8
|--HIDE THE NEXT TWO WHILE WAITING FOR THE XU
	eorl		%d0,X(%a6)	| ...X IS NOW S'= SGN*S
	andil		#0x80000000,%d0

	fmulx		%fp1,%fp3	| ...TB7
|--HIDE THE NEXT TWO WHILE WAITING FOR THE XU
	oril		#0x3F800000,%d0	| ...D0 IS SGN IN SINGLE
	movel		%d0,POSNEG1(%a6)

	faddd		COSB6,%fp2 | ...B6+TB8
	faddd		COSB5,%fp3 | ...B5+TB7

	fmulx		%fp1,%fp2	| ...T(B6+TB8)
	fmulx		%fp1,%fp3	| ...T(B5+TB7)

	faddd		COSB4,%fp2 | ...B4+T(B6+TB8)
	faddx		COSB3,%fp3 | ...B3+T(B5+TB7)

	fmulx		%fp1,%fp2	| ...T(B4+T(B6+TB8))
	fmulx		%fp3,%fp1	| ...T(B3+T(B5+TB7))

	faddx		COSB2,%fp2 | ...B2+T(B4+T(B6+TB8))
	fadds		COSB1,%fp1 | ...B1+T(B3+T(B5+TB7))

	fmulx		%fp2,%fp0	| ...S(B2+T(B4+T(B6+TB8)))
|--FP3 RELEASED, RESTORE NOW AND TAKE SOME ADVANTAGE OF HIDING
|--FP2 RELEASED.
	

	faddx		%fp1,%fp0
|--FP1 RELEASED

	fmulx		X(%a6),%fp0

	fmovel		%d1,%FPCR		|restore users exceptions
	fadds		POSNEG1(%a6),%fp0	|last inst - possible exception set
	bra		t_frcinx


SINBORS:
|--IF |X| > 15PI, WE USE THE GENERAL ARGUMENT REDUCTION.
|--IF |X| < 2**(-40), RETURN X OR 1.
	cmpil		#0x3FFF8000,%d0
	bgts		REDUCEX
        

SINSM:
	movel		ADJN(%a6),%d0
	cmpil		#0,%d0
	bgts		COSTINY

SINTINY:
	movew		#0x0000,XDCARE(%a6)	| ...JUST IN CASE
	fmovel		%d1,%FPCR		|restore users exceptions
	fmovex		X(%a6),%fp0		|last inst - possible exception set
	bra		t_frcinx


COSTINY:
	fmoves		#0x3F800000,%fp0

	fmovel		%d1,%FPCR		|restore users exceptions
	fsubs		#0x00800000,%fp0	|last inst - possible exception set
	bra		t_frcinx


REDUCEX:
|--WHEN REDUCEX IS USED, THE CODE WILL INEVITABLY BE SLOW.
|--THIS REDUCTION METHOD, HOWEVER, IS MUCH FASTER THAN USING
|--THE REMAINDER INSTRUCTION WHICH IS NOW IN SOFTWARE.

	fmovemx	%fp2-%fp5,-(%a7)	| ...save FP2 through FP5
	movel		%d2,-(%a7)
        fmoves         #0x00000000,%fp1
|--If compact form of abs(arg) in d0=$7ffeffff, argument is so large that
|--there is a danger of unwanted overflow in first LOOP iteration.  In this
|--case, reduce argument by one remainder step to make subsequent reduction
|--safe.
	cmpil	#0x7ffeffff,%d0		|is argument dangerously large?
	bnes	LOOP
	movel	#0x7ffe0000,FP_SCR2(%a6)	|yes
|					;create 2**16383*PI/2
	movel	#0xc90fdaa2,FP_SCR2+4(%a6)
	clrl	FP_SCR2+8(%a6)
	ftstx	%fp0			|test sign of argument
	movel	#0x7fdc0000,FP_SCR3(%a6)	|create low half of 2**16383*
|					;PI/2 at FP_SCR3
	movel	#0x85a308d3,FP_SCR3+4(%a6)
	clrl   FP_SCR3+8(%a6)
	fblt	red_neg
	orw	#0x8000,FP_SCR2(%a6)	|positive arg
	orw	#0x8000,FP_SCR3(%a6)
red_neg:
	faddx  FP_SCR2(%a6),%fp0		|high part of reduction is exact
	fmovex  %fp0,%fp1		|save high result in fp1
	faddx  FP_SCR3(%a6),%fp0		|low part of reduction
	fsubx  %fp0,%fp1			|determine low component of result
	faddx  FP_SCR3(%a6),%fp1		|fp0/fp1 are reduced argument.

|--ON ENTRY, FP0 IS X, ON RETURN, FP0 IS X REM PI/2, |X| <= PI/4.
|--integer quotient will be stored in N
|--Intermediate remainder is 66-bit long; (R,r) in (FP0,FP1)

LOOP:
	fmovex		%fp0,INARG(%a6)	| ...+-2**K * F, 1 <= F < 2
	movew		INARG(%a6),%d0
        movel          %d0,%a1		| ...save a copy of D0
	andil		#0x00007FFF,%d0
	subil		#0x00003FFF,%d0	| ...D0 IS K
	cmpil		#28,%d0
	bles		LASTLOOP
CONTLOOP:
	subil		#27,%d0	 | ...D0 IS L := K-27
	movel		#0,ENDFLAG(%a6)
	bras		WORK
LASTLOOP:
	clrl		%d0		| ...D0 IS L := 0
	movel		#1,ENDFLAG(%a6)

WORK:
|--FIND THE REMAINDER OF (R,r) W.R.T.	2**L * (PI/2). L IS SO CHOSEN
|--THAT	INT( X * (2/PI) / 2**(L) ) < 2**29.

|--CREATE 2**(-L) * (2/PI), SIGN(INARG)*2**(63),
|--2**L * (PIby2_1), 2**L * (PIby2_2)

	movel		#0x00003FFE,%d2	| ...BIASED EXPO OF 2/PI
	subl		%d0,%d2		| ...BIASED EXPO OF 2**(-L)*(2/PI)

	movel		#0xA2F9836E,FP_SCR1+4(%a6)
	movel		#0x4E44152A,FP_SCR1+8(%a6)
	movew		%d2,FP_SCR1(%a6)	| ...FP_SCR1 is 2**(-L)*(2/PI)

	fmovex		%fp0,%fp2
	fmulx		FP_SCR1(%a6),%fp2
|--WE MUST NOW FIND INT(FP2). SINCE WE NEED THIS VALUE IN
|--FLOATING POINT FORMAT, THE TWO FMOVE'S	FMOVE.L FP <--> N
|--WILL BE TOO INEFFICIENT. THE WAY AROUND IT IS THAT
|--(SIGN(INARG)*2**63	+	FP2) - SIGN(INARG)*2**63 WILL GIVE
|--US THE DESIRED VALUE IN FLOATING POINT.

|--HIDE SIX CYCLES OF INSTRUCTION
        movel		%a1,%d2
        swap		%d2
	andil		#0x80000000,%d2
	oril		#0x5F000000,%d2	| ...D2 IS SIGN(INARG)*2**63 IN SGL
	movel		%d2,TWOTO63(%a6)

	movel		%d0,%d2
	addil		#0x00003FFF,%d2	| ...BIASED EXPO OF 2**L * (PI/2)

|--FP2 IS READY
	fadds		TWOTO63(%a6),%fp2	| ...THE FRACTIONAL PART OF FP1 IS ROUNDED

|--HIDE 4 CYCLES OF INSTRUCTION; creating 2**(L)*Piby2_1  and  2**(L)*Piby2_2
        movew		%d2,FP_SCR2(%a6)
	clrw           FP_SCR2+2(%a6)
	movel		#0xC90FDAA2,FP_SCR2+4(%a6)
	clrl		FP_SCR2+8(%a6)		| ...FP_SCR2 is  2**(L) * Piby2_1	

|--FP2 IS READY
	fsubs		TWOTO63(%a6),%fp2		| ...FP2 is N

	addil		#0x00003FDD,%d0
        movew		%d0,FP_SCR3(%a6)
	clrw           FP_SCR3+2(%a6)
	movel		#0x85A308D3,FP_SCR3+4(%a6)
	clrl		FP_SCR3+8(%a6)		| ...FP_SCR3 is 2**(L) * Piby2_2

	movel		ENDFLAG(%a6),%d0

|--We are now ready to perform (R+r) - N*P1 - N*P2, P1 = 2**(L) * Piby2_1 and
|--P2 = 2**(L) * Piby2_2
	fmovex		%fp2,%fp4
	fmulx		FP_SCR2(%a6),%fp4		| ...W = N*P1
	fmovex		%fp2,%fp5
	fmulx		FP_SCR3(%a6),%fp5		| ...w = N*P2
	fmovex		%fp4,%fp3
|--we want P+p = W+w  but  |p| <= half ulp of P
|--Then, we need to compute  A := R-P   and  a := r-p
	faddx		%fp5,%fp3			| ...FP3 is P
	fsubx		%fp3,%fp4			| ...W-P

	fsubx		%fp3,%fp0			| ...FP0 is A := R - P
        faddx		%fp5,%fp4			| ...FP4 is p = (W-P)+w

	fmovex		%fp0,%fp3			| ...FP3 A
	fsubx		%fp4,%fp1			| ...FP1 is a := r - p

|--Now we need to normalize (A,a) to  "new (R,r)" where R+r = A+a but
|--|r| <= half ulp of R.
	faddx		%fp1,%fp0			| ...FP0 is R := A+a
|--No need to calculate r if this is the last loop
	cmpil		#0,%d0
	bgt		RESTORE

|--Need to calculate r
	fsubx		%fp0,%fp3			| ...A-R
	faddx		%fp3,%fp1			| ...FP1 is r := (A-R)+a
	bra		LOOP

RESTORE:
        fmovel		%fp2,N(%a6)
	movel		(%a7)+,%d2
	fmovemx	(%a7)+,%fp2-%fp5

	
	movel		ADJN(%a6),%d0
	cmpil		#4,%d0

	blt		SINCONT
	bras		SCCONT

	.global	ssincosd
ssincosd:
|--SIN AND COS OF X FOR DENORMALIZED X

	fmoves		#0x3F800000,%fp1
	bsr		sto_cos		|store cosine result
	bra		t_extdnrm

	.global	ssincos
ssincos:
|--SET ADJN TO 4
	movel		#4,ADJN(%a6)

	fmovex		(%a0),%fp0	| ...LOAD INPUT

	movel		(%a0),%d0
	movew		4(%a0),%d0
	fmovex		%fp0,X(%a6)
	andil		#0x7FFFFFFF,%d0		| ...COMPACTIFY X

	cmpil		#0x3FD78000,%d0		| ...|X| >= 2**(-40)?
	bges		SCOK1
	bra		SCSM

SCOK1:
	cmpil		#0x4004BC7E,%d0		| ...|X| < 15 PI?
	blts		SCMAIN
	bra		REDUCEX


SCMAIN:
|--THIS IS THE USUAL CASE, |X| <= 15 PI.
|--THE ARGUMENT REDUCTION IS DONE BY TABLE LOOK UP.
	fmovex		%fp0,%fp1
	fmuld		TWOBYPI,%fp1	| ...X*2/PI

|--HIDE THE NEXT THREE INSTRUCTIONS
	lea		PITBL+0x200,%a1 | ...TABLE OF N*PI/2, N = -32,...,32
	

|--FP1 IS NOW READY
	fmovel		%fp1,N(%a6)		| ...CONVERT TO INTEGER

	movel		N(%a6),%d0
	asll		#4,%d0
	addal		%d0,%a1		| ...ADDRESS OF N*PIBY2, IN Y1, Y2

	fsubx		(%a1)+,%fp0	| ...X-Y1
        fsubs		(%a1),%fp0	| ...FP0 IS R = (X-Y1)-Y2

SCCONT:
|--continuation point from REDUCEX

|--HIDE THE NEXT TWO
	movel		N(%a6),%d0
	rorl		#1,%d0
	
	cmpil		#0,%d0		| ...D0 < 0 IFF N IS ODD
	bge		NEVEN

NODD:
|--REGISTERS SAVED SO FAR: D0, A0, FP2.

	fmovex		%fp0,RPRIME(%a6)
	fmulx		%fp0,%fp0	 | ...FP0 IS S = R*R
	fmoved		SINA7,%fp1	| ...A7
	fmoved		COSB8,%fp2	| ...B8
	fmulx		%fp0,%fp1	 | ...SA7
	movel		%d2,-(%a7)
	movel		%d0,%d2
	fmulx		%fp0,%fp2	 | ...SB8
	rorl		#1,%d2
	andil		#0x80000000,%d2

	faddd		SINA6,%fp1	| ...A6+SA7
	eorl		%d0,%d2
	andil		#0x80000000,%d2
	faddd		COSB7,%fp2	| ...B7+SB8

	fmulx		%fp0,%fp1	 | ...S(A6+SA7)
	eorl		%d2,RPRIME(%a6)
	movel		(%a7)+,%d2
	fmulx		%fp0,%fp2	 | ...S(B7+SB8)
	rorl		#1,%d0
	andil		#0x80000000,%d0

	faddd		SINA5,%fp1	| ...A5+S(A6+SA7)
	movel		#0x3F800000,POSNEG1(%a6)
	eorl		%d0,POSNEG1(%a6)
	faddd		COSB6,%fp2	| ...B6+S(B7+SB8)

	fmulx		%fp0,%fp1	 | ...S(A5+S(A6+SA7))
	fmulx		%fp0,%fp2	 | ...S(B6+S(B7+SB8))
	fmovex		%fp0,SPRIME(%a6)

	faddd		SINA4,%fp1	| ...A4+S(A5+S(A6+SA7))
	eorl		%d0,SPRIME(%a6)
	faddd		COSB5,%fp2	| ...B5+S(B6+S(B7+SB8))

	fmulx		%fp0,%fp1	 | ...S(A4+...)
	fmulx		%fp0,%fp2	 | ...S(B5+...)

	faddd		SINA3,%fp1	| ...A3+S(A4+...)
	faddd		COSB4,%fp2	| ...B4+S(B5+...)

	fmulx		%fp0,%fp1	 | ...S(A3+...)
	fmulx		%fp0,%fp2	 | ...S(B4+...)

	faddx		SINA2,%fp1	| ...A2+S(A3+...)
	faddx		COSB3,%fp2	| ...B3+S(B4+...)

	fmulx		%fp0,%fp1	 | ...S(A2+...)
	fmulx		%fp0,%fp2	 | ...S(B3+...)

	faddx		SINA1,%fp1	| ...A1+S(A2+...)
	faddx		COSB2,%fp2	| ...B2+S(B3+...)

	fmulx		%fp0,%fp1	 | ...S(A1+...)
	fmulx		%fp2,%fp0	 | ...S(B2+...)

	

	fmulx		RPRIME(%a6),%fp1	| ...R'S(A1+...)
	fadds		COSB1,%fp0	| ...B1+S(B2...)
	fmulx		SPRIME(%a6),%fp0	| ...S'(B1+S(B2+...))

	movel		%d1,-(%sp)	|restore users mode & precision
	andil		#0xff,%d1		|mask off all exceptions
	fmovel		%d1,%FPCR
	faddx		RPRIME(%a6),%fp1	| ...COS(X)
	bsr		sto_cos		|store cosine result
	fmovel		(%sp)+,%FPCR	|restore users exceptions
	fadds		POSNEG1(%a6),%fp0	| ...SIN(X)

	bra		t_frcinx


NEVEN:
|--REGISTERS SAVED SO FAR: FP2.

	fmovex		%fp0,RPRIME(%a6)
	fmulx		%fp0,%fp0	 | ...FP0 IS S = R*R
	fmoved		COSB8,%fp1			| ...B8
	fmoved		SINA7,%fp2			| ...A7
	fmulx		%fp0,%fp1	 | ...SB8
	fmovex		%fp0,SPRIME(%a6)
	fmulx		%fp0,%fp2	 | ...SA7
	rorl		#1,%d0
	andil		#0x80000000,%d0
	faddd		COSB7,%fp1	| ...B7+SB8
	faddd		SINA6,%fp2	| ...A6+SA7
	eorl		%d0,RPRIME(%a6)
	eorl		%d0,SPRIME(%a6)
	fmulx		%fp0,%fp1	 | ...S(B7+SB8)
	oril		#0x3F800000,%d0
	movel		%d0,POSNEG1(%a6)
	fmulx		%fp0,%fp2	 | ...S(A6+SA7)

	faddd		COSB6,%fp1	| ...B6+S(B7+SB8)
	faddd		SINA5,%fp2	| ...A5+S(A6+SA7)

	fmulx		%fp0,%fp1	 | ...S(B6+S(B7+SB8))
	fmulx		%fp0,%fp2	 | ...S(A5+S(A6+SA7))

	faddd		COSB5,%fp1	| ...B5+S(B6+S(B7+SB8))
	faddd		SINA4,%fp2	| ...A4+S(A5+S(A6+SA7))

	fmulx		%fp0,%fp1	 | ...S(B5+...)
	fmulx		%fp0,%fp2	 | ...S(A4+...)

	faddd		COSB4,%fp1	| ...B4+S(B5+...)
	faddd		SINA3,%fp2	| ...A3+S(A4+...)

	fmulx		%fp0,%fp1	 | ...S(B4+...)
	fmulx		%fp0,%fp2	 | ...S(A3+...)

	faddx		COSB3,%fp1	| ...B3+S(B4+...)
	faddx		SINA2,%fp2	| ...A2+S(A3+...)

	fmulx		%fp0,%fp1	 | ...S(B3+...)
	fmulx		%fp0,%fp2	 | ...S(A2+...)

	faddx		COSB2,%fp1	| ...B2+S(B3+...)
	faddx		SINA1,%fp2	| ...A1+S(A2+...)

	fmulx		%fp0,%fp1	 | ...S(B2+...)
	fmulx		%fp2,%fp0	 | ...s(a1+...)

	

	fadds		COSB1,%fp1	| ...B1+S(B2...)
	fmulx		RPRIME(%a6),%fp0	| ...R'S(A1+...)
	fmulx		SPRIME(%a6),%fp1	| ...S'(B1+S(B2+...))

	movel		%d1,-(%sp)	|save users mode & precision
	andil		#0xff,%d1		|mask off all exceptions
	fmovel		%d1,%FPCR
	fadds		POSNEG1(%a6),%fp1	| ...COS(X)
	bsr		sto_cos		|store cosine result
	fmovel		(%sp)+,%FPCR	|restore users exceptions
	faddx		RPRIME(%a6),%fp0	| ...SIN(X)

	bra		t_frcinx

SCBORS:
	cmpil		#0x3FFF8000,%d0
	bgt		REDUCEX
        

SCSM:
	movew		#0x0000,XDCARE(%a6)
	fmoves		#0x3F800000,%fp1

	movel		%d1,-(%sp)	|save users mode & precision
	andil		#0xff,%d1		|mask off all exceptions
	fmovel		%d1,%FPCR
	fsubs		#0x00800000,%fp1
	bsr		sto_cos		|store cosine result
	fmovel		(%sp)+,%FPCR	|restore users exceptions
	fmovex		X(%a6),%fp0
	bra		t_frcinx

	|end
|
|	ssinh.sa 3.1 12/10/90
|
|       The entry point sSinh computes the hyperbolic sine of
|       an input argument; sSinhd does the same except for denormalized
|       input.
|
|       Input: Double-extended number X in location pointed to 
|		by address register a0.
|
|       Output: The value sinh(X) returned in floating-point register Fp0.
|
|       Accuracy and Monotonicity: The returned result is within 3 ulps in
|               64 significant bit, i.e. within 0.5001 ulp to 53 bits if the
|               result is subsequently rounded to double precision. The
|               result is provably monotonic in double precision.
|
|       Speed: The program sSINH takes approximately 280 cycles.
|
|       Algorithm:
|
|       SINH
|       1. If |X| > 16380 log2, go to 3.
|
|       2. (|X| <= 16380 log2) Sinh(X) is obtained by the formulae
|               y = |X|, sgn = sign(X), and z = expm1(Y),
|               sinh(X) = sgn*(1/2)*( z + z/(1+z) ).
|          Exit.
|
|       3. If |X| > 16480 log2, go to 5.
|
|       4. (16380 log2 < |X| <= 16480 log2)
|               sinh(X) = sign(X) * exp(|X|)/2.
|          However, invoking exp(|X|) may cause premature overflow.
|          Thus, we calculate sinh(X) as follows:
|             Y       := |X|
|             sgn     := sign(X)
|             sgnFact := sgn * 2**(16380)
|             Y'      := Y - 16381 log2
|             sinh(X) := sgnFact * exp(Y').
|          Exit.
|
|       5. (|X| > 16480 log2) sinh(X) must overflow. Return
|          sign(X)*Huge*Huge to generate overflow and an infinity with
|          the appropriate sign. Huge is the largest finite number in
|          extended format. Exit.
|

|		Copyright (C) Motorola, Inc. 1990
|			All Rights Reserved
|
|	THIS IS UNPUBLISHED PROPRIETARY SOURCE CODE OF MOTOROLA 
|	The copyright notice above does not evidence any  
|	actual or intended publication of such source code.

|SSINH	idnt	2,1 | Motorola 040 Floating Point Software Package

	|section	8

T1:	.long 0x40C62D38,0xD3D64634 | ... 16381 LOG2 LEAD
T2:	.long 0x3D6F90AE,0xB1E75CC7 | ... 16381 LOG2 TRAIL

	|xref	t_frcinx
	|xref	t_ovfl
	|xref	t_extdnrm
	|xref	setox
	|xref	setoxm1

	.global	ssinhd
ssinhd:
|--SINH(X) = X FOR DENORMALIZED X

	bra	t_extdnrm

	.global	ssinh
ssinh:
	fmovex	(%a0),%fp0	| ...LOAD INPUT

	movel	(%a0),%d0
	movew	4(%a0),%d0
	movel	%d0,%a1		| save a copy of original (compacted) operand
	andl	#0x7FFFFFFF,%d0
	cmpl	#0x400CB167,%d0
	bgts	SINHBIG

|--THIS IS THE USUAL CASE, |X| < 16380 LOG2
|--Y = |X|, Z = EXPM1(Y), SINH(X) = SIGN(X)*(1/2)*( Z + Z/(1+Z) )

	fabsx	%fp0		| ...Y = |X|

	moveml	%a1/%d1,-(%sp)
	fmovemx %fp0-%fp0,(%a0)
	clrl	%d1
	bsr	setoxm1	 	| ...FP0 IS Z = EXPM1(Y)
	fmovel	#0,%fpcr
	moveml	(%sp)+,%a1/%d1

	fmovex	%fp0,%fp1
	fadds	#0x3F800000,%fp1	| ...1+Z
	fmovex	%fp0,-(%sp)
	fdivx	%fp1,%fp0		| ...Z/(1+Z)
	movel	%a1,%d0
	andl	#0x80000000,%d0
	orl	#0x3F000000,%d0
	faddx	(%sp)+,%fp0
	movel	%d0,-(%sp)

	fmovel	%d1,%fpcr
	fmuls	(%sp)+,%fp0	|last fp inst - possible exceptions set

	bra	t_frcinx

SINHBIG:
	cmpl	#0x400CB2B3,%d0
	bgt	t_ovfl
	fabsx	%fp0
	fsubd	T1(%pc),%fp0	| ...(|X|-16381LOG2_LEAD)
	movel	#0,-(%sp)
	movel	#0x80000000,-(%sp)
	movel	%a1,%d0
	andl	#0x80000000,%d0
	orl	#0x7FFB0000,%d0
	movel	%d0,-(%sp)	| ...EXTENDED FMT
	fsubd	T2(%pc),%fp0	| ...|X| - 16381 LOG2, ACCURATE

	movel	%d1,-(%sp)
	clrl	%d1
	fmovemx %fp0-%fp0,(%a0)
	bsr	setox
	fmovel	(%sp)+,%fpcr

	fmulx	(%sp)+,%fp0	|possible exception
	bra	t_frcinx

	|end
|
|	stan.sa 3.3 7/29/91
|
|	The entry point stan computes the tangent of
|	an input argument;
|	stand does the same except for denormalized input.
|
|	Input: Double-extended number X in location pointed to
|		by address register a0.
|
|	Output: The value tan(X) returned in floating-point register Fp0.
|
|	Accuracy and Monotonicity: The returned result is within 3 ulp in
|		64 significant bit, i.e. within 0.5001 ulp to 53 bits if the
|		result is subsequently rounded to double precision. The
|		result is provably monotonic in double precision.
|
|	Speed: The program sTAN takes approximately 170 cycles for
|		input argument X such that |X| < 15Pi, which is the usual
|		situation.
|
|	Algorithm:
|
|	1. If |X| >= 15Pi or |X| < 2**(-40), go to 6.
|
|	2. Decompose X as X = N(Pi/2) + r where |r| <= Pi/4. Let
|		k = N mod 2, so in particular, k = 0 or 1.
|
|	3. If k is odd, go to 5.
|
|	4. (k is even) Tan(X) = tan(r) and tan(r) is approximated by a
|		rational function U/V where
|		U = r + r*s*(P1 + s*(P2 + s*P3)), and
|		V = 1 + s*(Q1 + s*(Q2 + s*(Q3 + s*Q4))),  s = r*r.
|		Exit.
|
|	4. (k is odd) Tan(X) = -cot(r). Since tan(r) is approximated by a
|		rational function U/V where
|		U = r + r*s*(P1 + s*(P2 + s*P3)), and
|		V = 1 + s*(Q1 + s*(Q2 + s*(Q3 + s*Q4))), s = r*r,
|		-Cot(r) = -V/U. Exit.
|
|	6. If |X| > 1, go to 8.
|
|	7. (|X|<2**(-40)) Tan(X) = X. Exit.
|
|	8. Overwrite X by X := X rem 2Pi. Now that |X| <= Pi, go back to 2.
|

|		Copyright (C) Motorola, Inc. 1990
|			All Rights Reserved
|
|	THIS IS UNPUBLISHED PROPRIETARY SOURCE CODE OF MOTOROLA 
|	The copyright notice above does not evidence any  
|	actual or intended publication of such source code.

|STAN	idnt	2,1 | Motorola 040 Floating Point Software Package

	|section	8

	.include "fpsp.h"

BOUNDS1:	.long 0x3FD78000,0x4004BC7E
TWOBYPI:	.long 0x3FE45F30,0x6DC9C883

TANQ4:	.long 0x3EA0B759,0xF50F8688
TANP3:	.long 0xBEF2BAA5,0xA8924F04

TANQ3:	.long 0xBF346F59,0xB39BA65F,0x00000000,0x00000000

TANP2:	.long 0x3FF60000,0xE073D3FC,0x199C4A00,0x00000000

TANQ2:	.long 0x3FF90000,0xD23CD684,0x15D95FA1,0x00000000

TANP1:	.long 0xBFFC0000,0x8895A6C5,0xFB423BCA,0x00000000

TANQ1:	.long 0xBFFD0000,0xEEF57E0D,0xA84BC8CE,0x00000000

INVTWOPI: .long 0x3FFC0000,0xA2F9836E,0x4E44152A,0x00000000

TWOPI1:	.long 0x40010000,0xC90FDAA2,0x00000000,0x00000000
TWOPI2:	.long 0x3FDF0000,0x85A308D4,0x00000000,0x00000000

|--N*PI/2, -32 <= N <= 32, IN A LEADING TERM IN EXT. AND TRAILING
|--TERM IN SGL. NOTE THAT PI IS 64-BIT LONG, THUS N*PI/2 IS AT
|--MOST 69 BITS LONG.
	.global	PITBL
PITBL:
  .long  0xC0040000,0xC90FDAA2,0x2168C235,0x21800000
  .long  0xC0040000,0xC2C75BCD,0x105D7C23,0xA0D00000
  .long  0xC0040000,0xBC7EDCF7,0xFF523611,0xA1E80000
  .long  0xC0040000,0xB6365E22,0xEE46F000,0x21480000
  .long  0xC0040000,0xAFEDDF4D,0xDD3BA9EE,0xA1200000
  .long  0xC0040000,0xA9A56078,0xCC3063DD,0x21FC0000
  .long  0xC0040000,0xA35CE1A3,0xBB251DCB,0x21100000
  .long  0xC0040000,0x9D1462CE,0xAA19D7B9,0xA1580000
  .long  0xC0040000,0x96CBE3F9,0x990E91A8,0x21E00000
  .long  0xC0040000,0x90836524,0x88034B96,0x20B00000
  .long  0xC0040000,0x8A3AE64F,0x76F80584,0xA1880000
  .long  0xC0040000,0x83F2677A,0x65ECBF73,0x21C40000
  .long  0xC0030000,0xFB53D14A,0xA9C2F2C2,0x20000000
  .long  0xC0030000,0xEEC2D3A0,0x87AC669F,0x21380000
  .long  0xC0030000,0xE231D5F6,0x6595DA7B,0xA1300000
  .long  0xC0030000,0xD5A0D84C,0x437F4E58,0x9FC00000
  .long  0xC0030000,0xC90FDAA2,0x2168C235,0x21000000
  .long  0xC0030000,0xBC7EDCF7,0xFF523611,0xA1680000
  .long  0xC0030000,0xAFEDDF4D,0xDD3BA9EE,0xA0A00000
  .long  0xC0030000,0xA35CE1A3,0xBB251DCB,0x20900000
  .long  0xC0030000,0x96CBE3F9,0x990E91A8,0x21600000
  .long  0xC0030000,0x8A3AE64F,0x76F80584,0xA1080000
  .long  0xC0020000,0xFB53D14A,0xA9C2F2C2,0x1F800000
  .long  0xC0020000,0xE231D5F6,0x6595DA7B,0xA0B00000
  .long  0xC0020000,0xC90FDAA2,0x2168C235,0x20800000
  .long  0xC0020000,0xAFEDDF4D,0xDD3BA9EE,0xA0200000
  .long  0xC0020000,0x96CBE3F9,0x990E91A8,0x20E00000
  .long  0xC0010000,0xFB53D14A,0xA9C2F2C2,0x1F000000
  .long  0xC0010000,0xC90FDAA2,0x2168C235,0x20000000
  .long  0xC0010000,0x96CBE3F9,0x990E91A8,0x20600000
  .long  0xC0000000,0xC90FDAA2,0x2168C235,0x1F800000
  .long  0xBFFF0000,0xC90FDAA2,0x2168C235,0x1F000000
  .long  0x00000000,0x00000000,0x00000000,0x00000000
  .long  0x3FFF0000,0xC90FDAA2,0x2168C235,0x9F000000
  .long  0x40000000,0xC90FDAA2,0x2168C235,0x9F800000
  .long  0x40010000,0x96CBE3F9,0x990E91A8,0xA0600000
  .long  0x40010000,0xC90FDAA2,0x2168C235,0xA0000000
  .long  0x40010000,0xFB53D14A,0xA9C2F2C2,0x9F000000
  .long  0x40020000,0x96CBE3F9,0x990E91A8,0xA0E00000
  .long  0x40020000,0xAFEDDF4D,0xDD3BA9EE,0x20200000
  .long  0x40020000,0xC90FDAA2,0x2168C235,0xA0800000
  .long  0x40020000,0xE231D5F6,0x6595DA7B,0x20B00000
  .long  0x40020000,0xFB53D14A,0xA9C2F2C2,0x9F800000
  .long  0x40030000,0x8A3AE64F,0x76F80584,0x21080000
  .long  0x40030000,0x96CBE3F9,0x990E91A8,0xA1600000
  .long  0x40030000,0xA35CE1A3,0xBB251DCB,0xA0900000
  .long  0x40030000,0xAFEDDF4D,0xDD3BA9EE,0x20A00000
  .long  0x40030000,0xBC7EDCF7,0xFF523611,0x21680000
  .long  0x40030000,0xC90FDAA2,0x2168C235,0xA1000000
  .long  0x40030000,0xD5A0D84C,0x437F4E58,0x1FC00000
  .long  0x40030000,0xE231D5F6,0x6595DA7B,0x21300000
  .long  0x40030000,0xEEC2D3A0,0x87AC669F,0xA1380000
  .long  0x40030000,0xFB53D14A,0xA9C2F2C2,0xA0000000
  .long  0x40040000,0x83F2677A,0x65ECBF73,0xA1C40000
  .long  0x40040000,0x8A3AE64F,0x76F80584,0x21880000
  .long  0x40040000,0x90836524,0x88034B96,0xA0B00000
  .long  0x40040000,0x96CBE3F9,0x990E91A8,0xA1E00000
  .long  0x40040000,0x9D1462CE,0xAA19D7B9,0x21580000
  .long  0x40040000,0xA35CE1A3,0xBB251DCB,0xA1100000
  .long  0x40040000,0xA9A56078,0xCC3063DD,0xA1FC0000
  .long  0x40040000,0xAFEDDF4D,0xDD3BA9EE,0x21200000
  .long  0x40040000,0xB6365E22,0xEE46F000,0xA1480000
  .long  0x40040000,0xBC7EDCF7,0xFF523611,0x21E80000
  .long  0x40040000,0xC2C75BCD,0x105D7C23,0x20D00000
  .long  0x40040000,0xC90FDAA2,0x2168C235,0xA1800000

	.set	INARG,FP_SCR4

	.set	TWOTO63,L_SCR1
	.set	ENDFLAG,L_SCR2
	.set	N,L_SCR3

	| xref	t_frcinx
	|xref	t_extdnrm

	.global	stand
stand:
|--TAN(X) = X FOR DENORMALIZED X

	bra		t_extdnrm

	.global	stan
stan:
	fmovex		(%a0),%fp0	| ...LOAD INPUT

	movel		(%a0),%d0
	movew		4(%a0),%d0
	andil		#0x7FFFFFFF,%d0

	cmpil		#0x3FD78000,%d0		| ...|X| >= 2**(-40)?
	bges		TANOK1
	bra		TANSM
TANOK1:
	cmpil		#0x4004BC7E,%d0		| ...|X| < 15 PI?
	blts		TANMAIN
	bra		REDUCEX


TANMAIN:
|--THIS IS THE USUAL CASE, |X| <= 15 PI.
|--THE ARGUMENT REDUCTION IS DONE BY TABLE LOOK UP.
	fmovex		%fp0,%fp1
	fmuld		TWOBYPI,%fp1	| ...X*2/PI

|--HIDE THE NEXT TWO INSTRUCTIONS
	leal		PITBL+0x200,%a1 | ...TABLE OF N*PI/2, N = -32,...,32

|--FP1 IS NOW READY
	fmovel		%fp1,%d0		| ...CONVERT TO INTEGER

	asll		#4,%d0
	addal		%d0,%a1		| ...ADDRESS N*PIBY2 IN Y1, Y2

	fsubx		(%a1)+,%fp0	| ...X-Y1
|--HIDE THE NEXT ONE

	fsubs		(%a1),%fp0	| ...FP0 IS R = (X-Y1)-Y2

	rorl		#5,%d0
	andil		#0x80000000,%d0	| ...D0 WAS ODD IFF D0 < 0

TANCONT:

	cmpil		#0,%d0
	blt		NODD

	fmovex		%fp0,%fp1
	fmulx		%fp1,%fp1	 	| ...S = R*R

	fmoved		TANQ4,%fp3
	fmoved		TANP3,%fp2

	fmulx		%fp1,%fp3	 	| ...SQ4
	fmulx		%fp1,%fp2	 	| ...SP3

	faddd		TANQ3,%fp3	| ...Q3+SQ4
	faddx		TANP2,%fp2	| ...P2+SP3

	fmulx		%fp1,%fp3	 	| ...S(Q3+SQ4)
	fmulx		%fp1,%fp2	 	| ...S(P2+SP3)

	faddx		TANQ2,%fp3	| ...Q2+S(Q3+SQ4)
	faddx		TANP1,%fp2	| ...P1+S(P2+SP3)

	fmulx		%fp1,%fp3	 	| ...S(Q2+S(Q3+SQ4))
	fmulx		%fp1,%fp2	 	| ...S(P1+S(P2+SP3))

	faddx		TANQ1,%fp3	| ...Q1+S(Q2+S(Q3+SQ4))
	fmulx		%fp0,%fp2	 	| ...RS(P1+S(P2+SP3))

	fmulx		%fp3,%fp1	 	| ...S(Q1+S(Q2+S(Q3+SQ4)))
	

	faddx		%fp2,%fp0	 	| ...R+RS(P1+S(P2+SP3))
	

	fadds		#0x3F800000,%fp1	| ...1+S(Q1+...)

	fmovel		%d1,%fpcr		|restore users exceptions
	fdivx		%fp1,%fp0		|last inst - possible exception set

	bra		t_frcinx

NODD:
	fmovex		%fp0,%fp1
	fmulx		%fp0,%fp0	 	| ...S = R*R

	fmoved		TANQ4,%fp3
	fmoved		TANP3,%fp2

	fmulx		%fp0,%fp3	 	| ...SQ4
	fmulx		%fp0,%fp2	 	| ...SP3

	faddd		TANQ3,%fp3	| ...Q3+SQ4
	faddx		TANP2,%fp2	| ...P2+SP3

	fmulx		%fp0,%fp3	 	| ...S(Q3+SQ4)
	fmulx		%fp0,%fp2	 	| ...S(P2+SP3)

	faddx		TANQ2,%fp3	| ...Q2+S(Q3+SQ4)
	faddx		TANP1,%fp2	| ...P1+S(P2+SP3)

	fmulx		%fp0,%fp3	 	| ...S(Q2+S(Q3+SQ4))
	fmulx		%fp0,%fp2	 	| ...S(P1+S(P2+SP3))

	faddx		TANQ1,%fp3	| ...Q1+S(Q2+S(Q3+SQ4))
	fmulx		%fp1,%fp2	 	| ...RS(P1+S(P2+SP3))

	fmulx		%fp3,%fp0	 	| ...S(Q1+S(Q2+S(Q3+SQ4)))
	

	faddx		%fp2,%fp1	 	| ...R+RS(P1+S(P2+SP3))
	fadds		#0x3F800000,%fp0	| ...1+S(Q1+...)
	

	fmovex		%fp1,-(%sp)
	eoril		#0x80000000,(%sp)

	fmovel		%d1,%fpcr	 	|restore users exceptions
	fdivx		(%sp)+,%fp0	|last inst - possible exception set

	bra		t_frcinx

TANBORS:
|--IF |X| > 15PI, WE USE THE GENERAL ARGUMENT REDUCTION.
|--IF |X| < 2**(-40), RETURN X OR 1.
	cmpil		#0x3FFF8000,%d0
	bgts		REDUCEX

TANSM:

	fmovex		%fp0,-(%sp)
	fmovel		%d1,%fpcr		 |restore users exceptions
	fmovex		(%sp)+,%fp0	|last inst - possible exception set

	bra		t_frcinx


REDUCEX:
|--WHEN REDUCEX IS USED, THE CODE WILL INEVITABLY BE SLOW.
|--THIS REDUCTION METHOD, HOWEVER, IS MUCH FASTER THAN USING
|--THE REMAINDER INSTRUCTION WHICH IS NOW IN SOFTWARE.

	fmovemx	%fp2-%fp5,-(%a7)	| ...save FP2 through FP5
	movel		%d2,-(%a7)
        fmoves         #0x00000000,%fp1

|--If compact form of abs(arg) in d0=$7ffeffff, argument is so large that
|--there is a danger of unwanted overflow in first LOOP iteration.  In this
|--case, reduce argument by one remainder step to make subsequent reduction
|--safe.
	cmpil	#0x7ffeffff,%d0		|is argument dangerously large?
	bnes	LOOP
	movel	#0x7ffe0000,FP_SCR2(%a6)	|yes
|					;create 2**16383*PI/2
	movel	#0xc90fdaa2,FP_SCR2+4(%a6)
	clrl	FP_SCR2+8(%a6)
	ftstx	%fp0			|test sign of argument
	movel	#0x7fdc0000,FP_SCR3(%a6)	|create low half of 2**16383*
|					;PI/2 at FP_SCR3
	movel	#0x85a308d3,FP_SCR3+4(%a6)
	clrl   FP_SCR3+8(%a6)
	fblt	red_neg
	orw	#0x8000,FP_SCR2(%a6)	|positive arg
	orw	#0x8000,FP_SCR3(%a6)
red_neg:
	faddx  FP_SCR2(%a6),%fp0		|high part of reduction is exact
	fmovex  %fp0,%fp1		|save high result in fp1
	faddx  FP_SCR3(%a6),%fp0		|low part of reduction
	fsubx  %fp0,%fp1			|determine low component of result
	faddx  FP_SCR3(%a6),%fp1		|fp0/fp1 are reduced argument.

|--ON ENTRY, FP0 IS X, ON RETURN, FP0 IS X REM PI/2, |X| <= PI/4.
|--integer quotient will be stored in N
|--Intermediate remainder is 66-bit long; (R,r) in (FP0,FP1)

LOOP:
	fmovex		%fp0,INARG(%a6)	| ...+-2**K * F, 1 <= F < 2
	movew		INARG(%a6),%d0
        movel          %d0,%a1		| ...save a copy of D0
	andil		#0x00007FFF,%d0
	subil		#0x00003FFF,%d0	| ...D0 IS K
	cmpil		#28,%d0
	bles		LASTLOOP
CONTLOOP:
	subil		#27,%d0	 | ...D0 IS L := K-27
	movel		#0,ENDFLAG(%a6)
	bras		WORK
LASTLOOP:
	clrl		%d0		| ...D0 IS L := 0
	movel		#1,ENDFLAG(%a6)

WORK:
|--FIND THE REMAINDER OF (R,r) W.R.T.	2**L * (PI/2). L IS SO CHOSEN
|--THAT	INT( X * (2/PI) / 2**(L) ) < 2**29.

|--CREATE 2**(-L) * (2/PI), SIGN(INARG)*2**(63),
|--2**L * (PIby2_1), 2**L * (PIby2_2)

	movel		#0x00003FFE,%d2	| ...BIASED EXPO OF 2/PI
	subl		%d0,%d2		| ...BIASED EXPO OF 2**(-L)*(2/PI)

	movel		#0xA2F9836E,FP_SCR1+4(%a6)
	movel		#0x4E44152A,FP_SCR1+8(%a6)
	movew		%d2,FP_SCR1(%a6)	| ...FP_SCR1 is 2**(-L)*(2/PI)

	fmovex		%fp0,%fp2
	fmulx		FP_SCR1(%a6),%fp2
|--WE MUST NOW FIND INT(FP2). SINCE WE NEED THIS VALUE IN
|--FLOATING POINT FORMAT, THE TWO FMOVE'S	FMOVE.L FP <--> N
|--WILL BE TOO INEFFICIENT. THE WAY AROUND IT IS THAT
|--(SIGN(INARG)*2**63	+	FP2) - SIGN(INARG)*2**63 WILL GIVE
|--US THE DESIRED VALUE IN FLOATING POINT.

|--HIDE SIX CYCLES OF INSTRUCTION
        movel		%a1,%d2
        swap		%d2
	andil		#0x80000000,%d2
	oril		#0x5F000000,%d2	| ...D2 IS SIGN(INARG)*2**63 IN SGL
	movel		%d2,TWOTO63(%a6)

	movel		%d0,%d2
	addil		#0x00003FFF,%d2	| ...BIASED EXPO OF 2**L * (PI/2)

|--FP2 IS READY
	fadds		TWOTO63(%a6),%fp2	| ...THE FRACTIONAL PART OF FP1 IS ROUNDED

|--HIDE 4 CYCLES OF INSTRUCTION; creating 2**(L)*Piby2_1  and  2**(L)*Piby2_2
        movew		%d2,FP_SCR2(%a6)
	clrw           FP_SCR2+2(%a6)
	movel		#0xC90FDAA2,FP_SCR2+4(%a6)
	clrl		FP_SCR2+8(%a6)		| ...FP_SCR2 is  2**(L) * Piby2_1	

|--FP2 IS READY
	fsubs		TWOTO63(%a6),%fp2		| ...FP2 is N

	addil		#0x00003FDD,%d0
        movew		%d0,FP_SCR3(%a6)
	clrw           FP_SCR3+2(%a6)
	movel		#0x85A308D3,FP_SCR3+4(%a6)
	clrl		FP_SCR3+8(%a6)		| ...FP_SCR3 is 2**(L) * Piby2_2

	movel		ENDFLAG(%a6),%d0

|--We are now ready to perform (R+r) - N*P1 - N*P2, P1 = 2**(L) * Piby2_1 and
|--P2 = 2**(L) * Piby2_2
	fmovex		%fp2,%fp4
	fmulx		FP_SCR2(%a6),%fp4		| ...W = N*P1
	fmovex		%fp2,%fp5
	fmulx		FP_SCR3(%a6),%fp5		| ...w = N*P2
	fmovex		%fp4,%fp3
|--we want P+p = W+w  but  |p| <= half ulp of P
|--Then, we need to compute  A := R-P   and  a := r-p
	faddx		%fp5,%fp3			| ...FP3 is P
	fsubx		%fp3,%fp4			| ...W-P

	fsubx		%fp3,%fp0			| ...FP0 is A := R - P
        faddx		%fp5,%fp4			| ...FP4 is p = (W-P)+w

	fmovex		%fp0,%fp3			| ...FP3 A
	fsubx		%fp4,%fp1			| ...FP1 is a := r - p

|--Now we need to normalize (A,a) to  "new (R,r)" where R+r = A+a but
|--|r| <= half ulp of R.
	faddx		%fp1,%fp0			| ...FP0 is R := A+a
|--No need to calculate r if this is the last loop
	cmpil		#0,%d0
	bgt		RESTORE

|--Need to calculate r
	fsubx		%fp0,%fp3			| ...A-R
	faddx		%fp3,%fp1			| ...FP1 is r := (A-R)+a
	bra		LOOP

RESTORE:
        fmovel		%fp2,N(%a6)
	movel		(%a7)+,%d2
	fmovemx	(%a7)+,%fp2-%fp5

	
	movel		N(%a6),%d0
        rorl		#1,%d0


	bra		TANCONT

	|end
|
|	stanh.sa 3.1 12/10/90
|
|	The entry point sTanh computes the hyperbolic tangent of
|	an input argument; sTanhd does the same except for denormalized
|	input.
|
|	Input: Double-extended number X in location pointed to
|		by address register a0.
|
|	Output: The value tanh(X) returned in floating-point register Fp0.
|
|	Accuracy and Monotonicity: The returned result is within 3 ulps in
|		64 significant bit, i.e. within 0.5001 ulp to 53 bits if the
|		result is subsequently rounded to double precision. The
|		result is provably monotonic in double precision.
|
|	Speed: The program stanh takes approximately 270 cycles.
|
|	Algorithm:
|
|	TANH
|	1. If |X| >= (5/2) log2 or |X| <= 2**(-40), go to 3.
|
|	2. (2**(-40) < |X| < (5/2) log2) Calculate tanh(X) by
|		sgn := sign(X), y := 2|X|, z := expm1(Y), and
|		tanh(X) = sgn*( z/(2+z) ).
|		Exit.
|
|	3. (|X| <= 2**(-40) or |X| >= (5/2) log2). If |X| < 1,
|		go to 7.
|
|	4. (|X| >= (5/2) log2) If |X| >= 50 log2, go to 6.
|
|	5. ((5/2) log2 <= |X| < 50 log2) Calculate tanh(X) by
|		sgn := sign(X), y := 2|X|, z := exp(Y),
|		tanh(X) = sgn - [ sgn*2/(1+z) ].
|		Exit.
|
|	6. (|X| >= 50 log2) Tanh(X) = +-1 (round to nearest). Thus, we
|		calculate Tanh(X) by
|		sgn := sign(X), Tiny := 2**(-126),
|		tanh(X) := sgn - sgn*Tiny.
|		Exit.
|
|	7. (|X| < 2**(-40)). Tanh(X) = X.	Exit.
|

|		Copyright (C) Motorola, Inc. 1990
|			All Rights Reserved
|
|	THIS IS UNPUBLISHED PROPRIETARY SOURCE CODE OF MOTOROLA 
|	The copyright notice above does not evidence any  
|	actual or intended publication of such source code.

|STANH	idnt	2,1 | Motorola 040 Floating Point Software Package

	|section	8
	
	.include "fpsp.h"

	.set	X,FP_SCR5
	.set	XDCARE,X+2
	.set	XFRAC,X+4

	.set	SGN,L_SCR3

	.set	V,FP_SCR6

BOUNDS1:	.long 0x3FD78000,0x3FFFDDCE | ... 2^(-40), (5/2)LOG2

	|xref	t_frcinx
	|xref	t_extdnrm
	|xref	setox
	|xref	setoxm1

	.global	stanhd
stanhd:
|--TANH(X) = X FOR DENORMALIZED X

	bra		t_extdnrm

	.global	stanh
stanh:
	fmovex		(%a0),%fp0	| ...LOAD INPUT

	fmovex		%fp0,X(%a6)
	movel		(%a0),%d0
	movew		4(%a0),%d0
	movel		%d0,X(%a6)
	andl		#0x7FFFFFFF,%d0
	cmp2l		BOUNDS1(%pc),%d0	| ...2**(-40) < |X| < (5/2)LOG2 ?
	bcss		TANHBORS

|--THIS IS THE USUAL CASE
|--Y = 2|X|, Z = EXPM1(Y), TANH(X) = SIGN(X) * Z / (Z+2).

	movel		X(%a6),%d0
	movel		%d0,SGN(%a6)
	andl		#0x7FFF0000,%d0
	addl		#0x00010000,%d0	| ...EXPONENT OF 2|X|
	movel		%d0,X(%a6)
	andl		#0x80000000,SGN(%a6)
	fmovex		X(%a6),%fp0		| ...FP0 IS Y = 2|X|

	movel		%d1,-(%a7)
	clrl		%d1
	fmovemx	%fp0-%fp0,(%a0)
	bsr		setoxm1	 	| ...FP0 IS Z = EXPM1(Y)
	movel		(%a7)+,%d1

	fmovex		%fp0,%fp1
	fadds		#0x40000000,%fp1	| ...Z+2
	movel		SGN(%a6),%d0
	fmovex		%fp1,V(%a6)
	eorl		%d0,V(%a6)

	fmovel		%d1,%FPCR		|restore users exceptions
	fdivx		V(%a6),%fp0
	bra		t_frcinx

TANHBORS:
	cmpl		#0x3FFF8000,%d0
	blt		TANHSM

	cmpl		#0x40048AA1,%d0
	bgt		TANHHUGE

|-- (5/2) LOG2 < |X| < 50 LOG2,
|--TANH(X) = 1 - (2/[EXP(2X)+1]). LET Y = 2|X|, SGN = SIGN(X),
|--TANH(X) = SGN -	SGN*2/[EXP(Y)+1].

	movel		X(%a6),%d0
	movel		%d0,SGN(%a6)
	andl		#0x7FFF0000,%d0
	addl		#0x00010000,%d0	| ...EXPO OF 2|X|
	movel		%d0,X(%a6)		| ...Y = 2|X|
	andl		#0x80000000,SGN(%a6)
	movel		SGN(%a6),%d0
	fmovex		X(%a6),%fp0		| ...Y = 2|X|

	movel		%d1,-(%a7)
	clrl		%d1
	fmovemx	%fp0-%fp0,(%a0)
	bsr		setox		| ...FP0 IS EXP(Y)
	movel		(%a7)+,%d1
	movel		SGN(%a6),%d0
	fadds		#0x3F800000,%fp0	| ...EXP(Y)+1

	eorl		#0xC0000000,%d0	| ...-SIGN(X)*2
	fmoves		%d0,%fp1		| ...-SIGN(X)*2 IN SGL FMT
	fdivx		%fp0,%fp1	 	| ...-SIGN(X)2 / [EXP(Y)+1 ]

	movel		SGN(%a6),%d0
	orl		#0x3F800000,%d0	| ...SGN
	fmoves		%d0,%fp0		| ...SGN IN SGL FMT

	fmovel		%d1,%FPCR		|restore users exceptions
	faddx		%fp1,%fp0

	bra		t_frcinx

TANHSM:
	movew		#0x0000,XDCARE(%a6)

	fmovel		%d1,%FPCR		|restore users exceptions
	fmovex		X(%a6),%fp0		|last inst - possible exception set

	bra		t_frcinx

TANHHUGE:
|---RETURN SGN(X) - SGN(X)EPS
	movel		X(%a6),%d0
	andl		#0x80000000,%d0
	orl		#0x3F800000,%d0
	fmoves		%d0,%fp0
	andl		#0x80000000,%d0
	eorl		#0x80800000,%d0	| ...-SIGN(X)*EPS

	fmovel		%d1,%FPCR		|restore users exceptions
	fadds		%d0,%fp0

	bra		t_frcinx

	|end
|
|	sto_res.sa 3.1 12/10/90
|
|	Takes the result and puts it in where the user expects it.
|	Library functions return result in fp0.	If fp0 is not the
|	users destination register then fp0 is moved to the
|	correct floating-point destination register.  fp0 and fp1
|	are then restored to the original contents. 
|
|	Input:	result in fp0,fp1 
|
|		d2 & a0 should be kept unmodified
|
|	Output:	moves the result to the true destination reg or mem
|
|	Modifies: destination floating point register
|

|		Copyright (C) Motorola, Inc. 1990
|			All Rights Reserved
|
|	THIS IS UNPUBLISHED PROPRIETARY SOURCE CODE OF MOTOROLA 
|	The copyright notice above does not evidence any  
|	actual or intended publication of such source code.

STO_RES:	|idnt	2,1 | Motorola 040 Floating Point Software Package


	|section	8

	.include "fpsp.h"

	.global	sto_cos
sto_cos:
	bfextu		CMDREG1B(%a6){#13:#3},%d0	|extract cos destination
	cmpib		#3,%d0		|check for fp0/fp1 cases
	bles		c_fp0123
	fmovemx	%fp1-%fp1,-(%a7)
	moveql		#7,%d1
	subl		%d0,%d1		|d1 = 7- (dest. reg. no.)
	clrl		%d0
	bsetl		%d1,%d0		|d0 is dynamic register mask
	fmovemx	(%a7)+,%d0
	rts
c_fp0123:
	cmpib		#0,%d0
	beqs		c_is_fp0
	cmpib		#1,%d0
	beqs		c_is_fp1
	cmpib		#2,%d0
	beqs		c_is_fp2
c_is_fp3:
	fmovemx	%fp1-%fp1,USER_FP3(%a6)
	rts
c_is_fp2:
	fmovemx	%fp1-%fp1,USER_FP2(%a6)
	rts
c_is_fp1:
	fmovemx	%fp1-%fp1,USER_FP1(%a6)
	rts
c_is_fp0:
	fmovemx	%fp1-%fp1,USER_FP0(%a6)
	rts


	.global	sto_res
sto_res:
	bfextu		CMDREG1B(%a6){#6:#3},%d0	|extract destination register
	cmpib		#3,%d0		|check for fp0/fp1 cases
	bles		fp0123
	fmovemx	%fp0-%fp0,-(%a7)
	moveql		#7,%d1
	subl		%d0,%d1		|d1 = 7- (dest. reg. no.)
	clrl		%d0
	bsetl		%d1,%d0		|d0 is dynamic register mask
	fmovemx	(%a7)+,%d0
	rts
fp0123:
	cmpib		#0,%d0
	beqs		is_fp0
	cmpib		#1,%d0
	beqs		is_fp1
	cmpib		#2,%d0
	beqs		is_fp2
is_fp3:
	fmovemx	%fp0-%fp0,USER_FP3(%a6)
	rts
is_fp2:
	fmovemx	%fp0-%fp0,USER_FP2(%a6)
	rts
is_fp1:
	fmovemx	%fp0-%fp0,USER_FP1(%a6)
	rts
is_fp0:
	fmovemx	%fp0-%fp0,USER_FP0(%a6)
	rts

	|end
|
|	stwotox.sa 3.1 12/10/90
|
|	stwotox  --- 2**X
|	stwotoxd --- 2**X for denormalized X
|	stentox  --- 10**X
|	stentoxd --- 10**X for denormalized X
|
|	Input: Double-extended number X in location pointed to
|		by address register a0.
|
|	Output: The function values are returned in Fp0.
|
|	Accuracy and Monotonicity: The returned result is within 2 ulps in
|		64 significant bit, i.e. within 0.5001 ulp to 53 bits if the
|		result is subsequently rounded to double precision. The
|		result is provably monotonic in double precision.
|
|	Speed: The program stwotox takes approximately 190 cycles and the
|		program stentox takes approximately 200 cycles.
|
|	Algorithm:
|
|	twotox
|	1. If |X| > 16480, go to ExpBig.
|
|	2. If |X| < 2**(-70), go to ExpSm.
|
|	3. Decompose X as X = N/64 + r where |r| <= 1/128. Furthermore
|		decompose N as
|		 N = 64(M + M') + j,  j = 0,1,2,...,63.
|
|	4. Overwrite r := r * log2. Then
|		2**X = 2**(M') * 2**(M) * 2**(j/64) * exp(r).
|		Go to expr to compute that expression.
|
|	tentox
|	1. If |X| > 16480*log_10(2) (base 10 log of 2), go to ExpBig.
|
|	2. If |X| < 2**(-70), go to ExpSm.
|
|	3. Set y := X*log_2(10)*64 (base 2 log of 10). Set
|		N := round-to-int(y). Decompose N as
|		 N = 64(M + M') + j,  j = 0,1,2,...,63.
|
|	4. Define r as
|		r := ((X - N*L1)-N*L2) * L10
|		where L1, L2 are the leading and trailing parts of log_10(2)/64
|		and L10 is the natural log of 10. Then
|		10**X = 2**(M') * 2**(M) * 2**(j/64) * exp(r).
|		Go to expr to compute that expression.
|
|	expr
|	1. Fetch 2**(j/64) from table as Fact1 and Fact2.
|
|	2. Overwrite Fact1 and Fact2 by
|		Fact1 := 2**(M) * Fact1
|		Fact2 := 2**(M) * Fact2
|		Thus Fact1 + Fact2 = 2**(M) * 2**(j/64).
|
|	3. Calculate P where 1 + P approximates exp(r):
|		P = r + r*r*(A1+r*(A2+...+r*A5)).
|
|	4. Let AdjFact := 2**(M'). Return
|		AdjFact * ( Fact1 + ((Fact1*P) + Fact2) ).
|		Exit.
|
|	ExpBig
|	1. Generate overflow by Huge * Huge if X > 0; otherwise, generate
|		underflow by Tiny * Tiny.
|
|	ExpSm
|	1. Return 1 + X.
|

|		Copyright (C) Motorola, Inc. 1990
|			All Rights Reserved
|
|	THIS IS UNPUBLISHED PROPRIETARY SOURCE CODE OF MOTOROLA 
|	The copyright notice above does not evidence any  
|	actual or intended publication of such source code.

|STWOTOX	idnt	2,1 | Motorola 040 Floating Point Software Package

	|section	8

	.include "fpsp.h"

BOUNDS1:	.long 0x3FB98000,0x400D80C0 | ... 2^(-70),16480
BOUNDS2:	.long 0x3FB98000,0x400B9B07 | ... 2^(-70),16480 LOG2/LOG10

L2TEN64:	.long 0x406A934F,0x0979A371 | ... 64LOG10/LOG2
L10TWO1:	.long 0x3F734413,0x509F8000 | ... LOG2/64LOG10

L10TWO2:	.long 0xBFCD0000,0xC0219DC1,0xDA994FD2,0x00000000

LOG10:	.long 0x40000000,0x935D8DDD,0xAAA8AC17,0x00000000

LOG2:	.long 0x3FFE0000,0xB17217F7,0xD1CF79AC,0x00000000

EXPA5:	.long 0x3F56C16D,0x6F7BD0B2
EXPA4:	.long 0x3F811112,0x302C712C
EXPA3:	.long 0x3FA55555,0x55554CC1
EXPA2:	.long 0x3FC55555,0x55554A54
EXPA1:	.long 0x3FE00000,0x00000000,0x00000000,0x00000000

HUGE:	.long 0x7FFE0000,0xFFFFFFFF,0xFFFFFFFF,0x00000000
TINY:	.long 0x00010000,0xFFFFFFFF,0xFFFFFFFF,0x00000000

EXPTBL:
	.long  0x3FFF0000,0x80000000,0x00000000,0x3F738000
	.long  0x3FFF0000,0x8164D1F3,0xBC030773,0x3FBEF7CA
	.long  0x3FFF0000,0x82CD8698,0xAC2BA1D7,0x3FBDF8A9
	.long  0x3FFF0000,0x843A28C3,0xACDE4046,0x3FBCD7C9
	.long  0x3FFF0000,0x85AAC367,0xCC487B15,0xBFBDE8DA
	.long  0x3FFF0000,0x871F6196,0x9E8D1010,0x3FBDE85C
	.long  0x3FFF0000,0x88980E80,0x92DA8527,0x3FBEBBF1
	.long  0x3FFF0000,0x8A14D575,0x496EFD9A,0x3FBB80CA
	.long  0x3FFF0000,0x8B95C1E3,0xEA8BD6E7,0xBFBA8373
	.long  0x3FFF0000,0x8D1ADF5B,0x7E5BA9E6,0xBFBE9670
	.long  0x3FFF0000,0x8EA4398B,0x45CD53C0,0x3FBDB700
	.long  0x3FFF0000,0x9031DC43,0x1466B1DC,0x3FBEEEB0
	.long  0x3FFF0000,0x91C3D373,0xAB11C336,0x3FBBFD6D
	.long  0x3FFF0000,0x935A2B2F,0x13E6E92C,0xBFBDB319
	.long  0x3FFF0000,0x94F4EFA8,0xFEF70961,0x3FBDBA2B
	.long  0x3FFF0000,0x96942D37,0x20185A00,0x3FBE91D5
	.long  0x3FFF0000,0x9837F051,0x8DB8A96F,0x3FBE8D5A
	.long  0x3FFF0000,0x99E04593,0x20B7FA65,0xBFBCDE7B
	.long  0x3FFF0000,0x9B8D39B9,0xD54E5539,0xBFBEBAAF
	.long  0x3FFF0000,0x9D3ED9A7,0x2CFFB751,0xBFBD86DA
	.long  0x3FFF0000,0x9EF53260,0x91A111AE,0xBFBEBEDD
	.long  0x3FFF0000,0xA0B0510F,0xB9714FC2,0x3FBCC96E
	.long  0x3FFF0000,0xA2704303,0x0C496819,0xBFBEC90B
	.long  0x3FFF0000,0xA43515AE,0x09E6809E,0x3FBBD1DB
	.long  0x3FFF0000,0xA5FED6A9,0xB15138EA,0x3FBCE5EB
	.long  0x3FFF0000,0xA7CD93B4,0xE965356A,0xBFBEC274
	.long  0x3FFF0000,0xA9A15AB4,0xEA7C0EF8,0x3FBEA83C
	.long  0x3FFF0000,0xAB7A39B5,0xA93ED337,0x3FBECB00
	.long  0x3FFF0000,0xAD583EEA,0x42A14AC6,0x3FBE9301
	.long  0x3FFF0000,0xAF3B78AD,0x690A4375,0xBFBD8367
	.long  0x3FFF0000,0xB123F581,0xD2AC2590,0xBFBEF05F
	.long  0x3FFF0000,0xB311C412,0xA9112489,0x3FBDFB3C
	.long  0x3FFF0000,0xB504F333,0xF9DE6484,0x3FBEB2FB
	.long  0x3FFF0000,0xB6FD91E3,0x28D17791,0x3FBAE2CB
	.long  0x3FFF0000,0xB8FBAF47,0x62FB9EE9,0x3FBCDC3C
	.long  0x3FFF0000,0xBAFF5AB2,0x133E45FB,0x3FBEE9AA
	.long  0x3FFF0000,0xBD08A39F,0x580C36BF,0xBFBEAEFD
	.long  0x3FFF0000,0xBF1799B6,0x7A731083,0xBFBCBF51
	.long  0x3FFF0000,0xC12C4CCA,0x66709456,0x3FBEF88A
	.long  0x3FFF0000,0xC346CCDA,0x24976407,0x3FBD83B2
	.long  0x3FFF0000,0xC5672A11,0x5506DADD,0x3FBDF8AB
	.long  0x3FFF0000,0xC78D74C8,0xABB9B15D,0xBFBDFB17
	.long  0x3FFF0000,0xC9B9BD86,0x6E2F27A3,0xBFBEFE3C
	.long  0x3FFF0000,0xCBEC14FE,0xF2727C5D,0xBFBBB6F8
	.long  0x3FFF0000,0xCE248C15,0x1F8480E4,0xBFBCEE53
	.long  0x3FFF0000,0xD06333DA,0xEF2B2595,0xBFBDA4AE
	.long  0x3FFF0000,0xD2A81D91,0xF12AE45A,0x3FBC9124
	.long  0x3FFF0000,0xD4F35AAB,0xCFEDFA1F,0x3FBEB243
	.long  0x3FFF0000,0xD744FCCA,0xD69D6AF4,0x3FBDE69A
	.long  0x3FFF0000,0xD99D15C2,0x78AFD7B6,0xBFB8BC61
	.long  0x3FFF0000,0xDBFBB797,0xDAF23755,0x3FBDF610
	.long  0x3FFF0000,0xDE60F482,0x5E0E9124,0xBFBD8BE1
	.long  0x3FFF0000,0xE0CCDEEC,0x2A94E111,0x3FBACB12
	.long  0x3FFF0000,0xE33F8972,0xBE8A5A51,0x3FBB9BFE
	.long  0x3FFF0000,0xE5B906E7,0x7C8348A8,0x3FBCF2F4
	.long  0x3FFF0000,0xE8396A50,0x3C4BDC68,0x3FBEF22F
	.long  0x3FFF0000,0xEAC0C6E7,0xDD24392F,0xBFBDBF4A
	.long  0x3FFF0000,0xED4F301E,0xD9942B84,0x3FBEC01A
	.long  0x3FFF0000,0xEFE4B99B,0xDCDAF5CB,0x3FBE8CAC
	.long  0x3FFF0000,0xF281773C,0x59FFB13A,0xBFBCBB3F
	.long  0x3FFF0000,0xF5257D15,0x2486CC2C,0x3FBEF73A
	.long  0x3FFF0000,0xF7D0DF73,0x0AD13BB9,0xBFB8B795
	.long  0x3FFF0000,0xFA83B2DB,0x722A033A,0x3FBEF84B
	.long  0x3FFF0000,0xFD3E0C0C,0xF486C175,0xBFBEF581

	.set	N,L_SCR1

	.set	X,FP_SCR1
	.set	XDCARE,X+2
	.set	XFRAC,X+4

	.set	ADJFACT,FP_SCR2

	.set	FACT1,FP_SCR3
	.set	FACT1HI,FACT1+4
	.set	FACT1LOW,FACT1+8

	.set	FACT2,FP_SCR4
	.set	FACT2HI,FACT2+4
	.set	FACT2LOW,FACT2+8

	| xref	t_unfl
	|xref	t_ovfl
	|xref	t_frcinx

	.global	stwotoxd
stwotoxd:
|--ENTRY POINT FOR 2**(X) FOR DENORMALIZED ARGUMENT

	fmovel		%d1,%fpcr		| ...set user's rounding mode/precision
	fmoves		#0x3F800000,%fp0  | ...RETURN 1 + X
	movel		(%a0),%d0
	orl		#0x00800001,%d0
	fadds		%d0,%fp0
	bra		t_frcinx

	.global	stwotox
stwotox:
|--ENTRY POINT FOR 2**(X), HERE X IS FINITE, NON-ZERO, AND NOT NAN'S
	fmovemx	(%a0),%fp0-%fp0	| ...LOAD INPUT, do not set cc's

	movel		(%a0),%d0
	movew		4(%a0),%d0
	fmovex		%fp0,X(%a6)
	andil		#0x7FFFFFFF,%d0

	cmpil		#0x3FB98000,%d0		| ...|X| >= 2**(-70)?
	bges		TWOOK1
	bra		EXPBORS

TWOOK1:
	cmpil		#0x400D80C0,%d0		| ...|X| > 16480?
	bles		TWOMAIN
	bra		EXPBORS
	

TWOMAIN:
|--USUAL CASE, 2^(-70) <= |X| <= 16480

	fmovex		%fp0,%fp1
	fmuls		#0x42800000,%fp1  | ...64 * X
	
	fmovel		%fp1,N(%a6)		| ...N = ROUND-TO-INT(64 X)
	movel		%d2,-(%sp)
	lea		EXPTBL,%a1 	| ...LOAD ADDRESS OF TABLE OF 2^(J/64)
	fmovel		N(%a6),%fp1		| ...N --> FLOATING FMT
	movel		N(%a6),%d0
	movel		%d0,%d2
	andil		#0x3F,%d0		| ...D0 IS J
	asll		#4,%d0		| ...DISPLACEMENT FOR 2^(J/64)
	addal		%d0,%a1		| ...ADDRESS FOR 2^(J/64)
	asrl		#6,%d2		| ...d2 IS L, N = 64L + J
	movel		%d2,%d0
	asrl		#1,%d0		| ...D0 IS M
	subl		%d0,%d2		| ...d2 IS M', N = 64(M+M') + J
	addil		#0x3FFF,%d2
	movew		%d2,ADJFACT(%a6) 	| ...ADJFACT IS 2^(M')
	movel		(%sp)+,%d2
|--SUMMARY: a1 IS ADDRESS FOR THE LEADING PORTION OF 2^(J/64),
|--D0 IS M WHERE N = 64(M+M') + J. NOTE THAT |M| <= 16140 BY DESIGN.
|--ADJFACT = 2^(M').
|--REGISTERS SAVED SO FAR ARE (IN ORDER) FPCR, D0, FP1, a1, AND FP2.

	fmuls		#0x3C800000,%fp1  | ...(1/64)*N
	movel		(%a1)+,FACT1(%a6)
	movel		(%a1)+,FACT1HI(%a6)
	movel		(%a1)+,FACT1LOW(%a6)
	movew		(%a1)+,FACT2(%a6)
	clrw		FACT2+2(%a6)

	fsubx		%fp1,%fp0	 	| ...X - (1/64)*INT(64 X)

	movew		(%a1)+,FACT2HI(%a6)
	clrw		FACT2HI+2(%a6)
	clrl		FACT2LOW(%a6)
	addw		%d0,FACT1(%a6)
	
	fmulx		LOG2,%fp0	| ...FP0 IS R
	addw		%d0,FACT2(%a6)

	bra		expr

EXPBORS:
|--FPCR, D0 SAVED
	cmpil		#0x3FFF8000,%d0
	bgts		EXPBIG

EXPSM:
|--|X| IS SMALL, RETURN 1 + X

	fmovel		%d1,%FPCR		|restore users exceptions
	fadds		#0x3F800000,%fp0  | ...RETURN 1 + X

	bra		t_frcinx

EXPBIG:
|--|X| IS LARGE, GENERATE OVERFLOW IF X > 0; ELSE GENERATE UNDERFLOW
|--REGISTERS SAVE SO FAR ARE FPCR AND  D0
	movel		X(%a6),%d0
	cmpil		#0,%d0
	blts		EXPNEG

	bclrb		#7,(%a0)		|t_ovfl expects positive value
	bra		t_ovfl

EXPNEG:
	bclrb		#7,(%a0)		|t_unfl expects positive value
	bra		t_unfl

	.global	stentoxd
stentoxd:
|--ENTRY POINT FOR 10**(X) FOR DENORMALIZED ARGUMENT

	fmovel		%d1,%fpcr		| ...set user's rounding mode/precision
	fmoves		#0x3F800000,%fp0  | ...RETURN 1 + X
	movel		(%a0),%d0
	orl		#0x00800001,%d0
	fadds		%d0,%fp0
	bra		t_frcinx

	.global	stentox
stentox:
|--ENTRY POINT FOR 10**(X), HERE X IS FINITE, NON-ZERO, AND NOT NAN'S
	fmovemx	(%a0),%fp0-%fp0	| ...LOAD INPUT, do not set cc's

	movel		(%a0),%d0
	movew		4(%a0),%d0
	fmovex		%fp0,X(%a6)
	andil		#0x7FFFFFFF,%d0

	cmpil		#0x3FB98000,%d0		| ...|X| >= 2**(-70)?
	bges		TENOK1
	bra		EXPBORS

TENOK1:
	cmpil		#0x400B9B07,%d0		| ...|X| <= 16480*log2/log10 ?
	bles		TENMAIN
	bra		EXPBORS

TENMAIN:
|--USUAL CASE, 2^(-70) <= |X| <= 16480 LOG 2 / LOG 10

	fmovex		%fp0,%fp1
	fmuld		L2TEN64,%fp1	| ...X*64*LOG10/LOG2
	
	fmovel		%fp1,N(%a6)		| ...N=INT(X*64*LOG10/LOG2)
	movel		%d2,-(%sp)
	lea		EXPTBL,%a1 	| ...LOAD ADDRESS OF TABLE OF 2^(J/64)
	fmovel		N(%a6),%fp1		| ...N --> FLOATING FMT
	movel		N(%a6),%d0
	movel		%d0,%d2
	andil		#0x3F,%d0		| ...D0 IS J
	asll		#4,%d0		| ...DISPLACEMENT FOR 2^(J/64)
	addal		%d0,%a1		| ...ADDRESS FOR 2^(J/64)
	asrl		#6,%d2		| ...d2 IS L, N = 64L + J
	movel		%d2,%d0
	asrl		#1,%d0		| ...D0 IS M
	subl		%d0,%d2		| ...d2 IS M', N = 64(M+M') + J
	addil		#0x3FFF,%d2
	movew		%d2,ADJFACT(%a6) 	| ...ADJFACT IS 2^(M')
	movel		(%sp)+,%d2

|--SUMMARY: a1 IS ADDRESS FOR THE LEADING PORTION OF 2^(J/64),
|--D0 IS M WHERE N = 64(M+M') + J. NOTE THAT |M| <= 16140 BY DESIGN.
|--ADJFACT = 2^(M').
|--REGISTERS SAVED SO FAR ARE (IN ORDER) FPCR, D0, FP1, a1, AND FP2.

	fmovex		%fp1,%fp2

	fmuld		L10TWO1,%fp1	| ...N*(LOG2/64LOG10)_LEAD
	movel		(%a1)+,FACT1(%a6)

	fmulx		L10TWO2,%fp2	| ...N*(LOG2/64LOG10)_TRAIL

	movel		(%a1)+,FACT1HI(%a6)
	movel		(%a1)+,FACT1LOW(%a6)
	fsubx		%fp1,%fp0		| ...X - N L_LEAD
	movew		(%a1)+,FACT2(%a6)

	fsubx		%fp2,%fp0		| ...X - N L_TRAIL

	clrw		FACT2+2(%a6)
	movew		(%a1)+,FACT2HI(%a6)
	clrw		FACT2HI+2(%a6)
	clrl		FACT2LOW(%a6)

	fmulx		LOG10,%fp0	| ...FP0 IS R
	
	addw		%d0,FACT1(%a6)
	addw		%d0,FACT2(%a6)

expr:
|--FPCR, FP2, FP3 ARE SAVED IN ORDER AS SHOWN.
|--ADJFACT CONTAINS 2**(M'), FACT1 + FACT2 = 2**(M) * 2**(J/64).
|--FP0 IS R. THE FOLLOWING CODE COMPUTES
|--	2**(M'+M) * 2**(J/64) * EXP(R)

	fmovex		%fp0,%fp1
	fmulx		%fp1,%fp1		| ...FP1 IS S = R*R

	fmoved		EXPA5,%fp2	| ...FP2 IS A5
	fmoved		EXPA4,%fp3	| ...FP3 IS A4

	fmulx		%fp1,%fp2		| ...FP2 IS S*A5
	fmulx		%fp1,%fp3		| ...FP3 IS S*A4

	faddd		EXPA3,%fp2	| ...FP2 IS A3+S*A5
	faddd		EXPA2,%fp3	| ...FP3 IS A2+S*A4

	fmulx		%fp1,%fp2		| ...FP2 IS S*(A3+S*A5)
	fmulx		%fp1,%fp3		| ...FP3 IS S*(A2+S*A4)

	faddd		EXPA1,%fp2	| ...FP2 IS A1+S*(A3+S*A5)
	fmulx		%fp0,%fp3		| ...FP3 IS R*S*(A2+S*A4)

	fmulx		%fp1,%fp2		| ...FP2 IS S*(A1+S*(A3+S*A5))
	faddx		%fp3,%fp0		| ...FP0 IS R+R*S*(A2+S*A4)
	
	faddx		%fp2,%fp0		| ...FP0 IS EXP(R) - 1
	

|--FINAL RECONSTRUCTION PROCESS
|--EXP(X) = 2^M*2^(J/64) + 2^M*2^(J/64)*(EXP(R)-1)  -  (1 OR 0)

	fmulx		FACT1(%a6),%fp0
	faddx		FACT2(%a6),%fp0
	faddx		FACT1(%a6),%fp0

	fmovel		%d1,%FPCR		|restore users exceptions
	clrw		ADJFACT+2(%a6)
	movel		#0x80000000,ADJFACT+4(%a6)
	clrl		ADJFACT+8(%a6)
	fmulx		ADJFACT(%a6),%fp0	| ...FINAL ADJUSTMENT

	bra		t_frcinx

	|end
|
|	tbldo.sa 3.1 12/10/90
|
| Modified:
|	8/16/90	chinds	The table was constructed to use only one level
|			of indirection in do_func for monadic
|			functions.  Dyadic functions require two
|			levels, and the tables are still contained
|			in do_func.  The table is arranged for 
|			index with a 10-bit index, with the first
|			7 bits the opcode, and the remaining 3
|			the stag.  For dyadic functions, all
|			valid addresses are to the generic entry
|			point. 
|

|		Copyright (C) Motorola, Inc. 1990
|			All Rights Reserved
|
|	THIS IS UNPUBLISHED PROPRIETARY SOURCE CODE OF MOTOROLA 
|	The copyright notice above does not evidence any  
|	actual or intended publication of such source code.

|TBLDO	idnt    2,1 | Motorola 040 Floating Point Software Package

	|section	8

	|xref	ld_pinf,ld_pone,ld_ppi2
	|xref	t_dz2,t_operr
	|xref	serror,sone,szero,sinf,snzrinx
	|xref	sopr_inf,spi_2,src_nan,szr_inf

	|xref	smovcr
	|xref	pmod,prem,pscale
	|xref	satanh,satanhd
	|xref	sacos,sacosd,sasin,sasind,satan,satand
	|xref	setox,setoxd,setoxm1,setoxm1d,setoxm1i
	|xref	sgetexp,sgetexpd,sgetman,sgetmand
	|xref	sint,sintd,sintrz
	|xref	ssincos,ssincosd,ssincosi,ssincosnan,ssincosz
	|xref	scos,scosd,ssin,ssind,stan,stand
	|xref	scosh,scoshd,ssinh,ssinhd,stanh,stanhd
	|xref	sslog10,sslog2,sslogn,sslognp1
	|xref	sslog10d,sslog2d,sslognd,slognp1d
	|xref	stentox,stentoxd,stwotox,stwotoxd

|	instruction		;opcode-stag Notes
	.global	tblpre
tblpre:
	.long	smovcr		|$00-0 fmovecr all
	.long	smovcr		|$00-1 fmovecr all
	.long	smovcr		|$00-2 fmovecr all
	.long	smovcr		|$00-3 fmovecr all
	.long	smovcr		|$00-4 fmovecr all
	.long	smovcr		|$00-5 fmovecr all
	.long	smovcr		|$00-6 fmovecr all
	.long	smovcr		|$00-7 fmovecr all

	.long	sint		|$01-0 fint norm
	.long	szero		|$01-1 fint zero 
	.long	sinf		|$01-2 fint inf
	.long	src_nan		|$01-3 fint nan
	.long	sintd		|$01-4 fint denorm inx
	.long	serror		|$01-5 fint ERROR
	.long	serror		|$01-6 fint ERROR
	.long	serror		|$01-7 fint ERROR

	.long	ssinh		|$02-0 fsinh norm
	.long	szero		|$02-1 fsinh zero
	.long	sinf		|$02-2 fsinh inf
	.long	src_nan		|$02-3 fsinh nan
	.long	ssinhd		|$02-4 fsinh denorm
	.long	serror		|$02-5 fsinh ERROR
	.long	serror		|$02-6 fsinh ERROR
	.long	serror		|$02-7 fsinh ERROR

	.long	sintrz		|$03-0 fintrz norm
	.long	szero		|$03-1 fintrz zero
	.long	sinf		|$03-2 fintrz inf
	.long	src_nan		|$03-3 fintrz nan
	.long	snzrinx		|$03-4 fintrz denorm inx
	.long	serror		|$03-5 fintrz ERROR
	.long	serror		|$03-6 fintrz ERROR
	.long	serror		|$03-7 fintrz ERROR

	.long	serror		|$04-0 ERROR - illegal extension
	.long	serror		|$04-1 ERROR - illegal extension
	.long	serror		|$04-2 ERROR - illegal extension
	.long	serror		|$04-3 ERROR - illegal extension
	.long	serror		|$04-4 ERROR - illegal extension
	.long	serror		|$04-5 ERROR - illegal extension
	.long	serror		|$04-6 ERROR - illegal extension
	.long	serror		|$04-7 ERROR - illegal extension

	.long	serror		|$05-0 ERROR - illegal extension
	.long	serror		|$05-1 ERROR - illegal extension
	.long	serror		|$05-2 ERROR - illegal extension
	.long	serror		|$05-3 ERROR - illegal extension
	.long	serror		|$05-4 ERROR - illegal extension
	.long	serror		|$05-5 ERROR - illegal extension
	.long	serror		|$05-6 ERROR - illegal extension
	.long	serror		|$05-7 ERROR - illegal extension

	.long	sslognp1	|$06-0 flognp1 norm
	.long	szero		|$06-1 flognp1 zero
	.long	sopr_inf	|$06-2 flognp1 inf
	.long	src_nan		|$06-3 flognp1 nan
	.long	slognp1d	|$06-4 flognp1 denorm
	.long	serror		|$06-5 flognp1 ERROR
	.long	serror		|$06-6 flognp1 ERROR
	.long	serror		|$06-7 flognp1 ERROR

	.long	serror		|$07-0 ERROR - illegal extension
	.long	serror		|$07-1 ERROR - illegal extension
	.long	serror		|$07-2 ERROR - illegal extension
	.long	serror		|$07-3 ERROR - illegal extension
	.long	serror		|$07-4 ERROR - illegal extension
	.long	serror		|$07-5 ERROR - illegal extension
	.long	serror		|$07-6 ERROR - illegal extension
	.long	serror		|$07-7 ERROR - illegal extension

	.long	setoxm1		|$08-0 fetoxm1 norm
	.long	szero		|$08-1 fetoxm1 zero
	.long	setoxm1i	|$08-2 fetoxm1 inf
	.long	src_nan		|$08-3 fetoxm1 nan
	.long	setoxm1d	|$08-4 fetoxm1 denorm
	.long	serror		|$08-5 fetoxm1 ERROR
	.long	serror		|$08-6 fetoxm1 ERROR
	.long	serror		|$08-7 fetoxm1 ERROR

	.long	stanh		|$09-0 ftanh norm
	.long	szero		|$09-1 ftanh zero
	.long	sone		|$09-2 ftanh inf
	.long	src_nan		|$09-3 ftanh nan
	.long	stanhd		|$09-4 ftanh denorm
	.long	serror		|$09-5 ftanh ERROR
	.long	serror		|$09-6 ftanh ERROR
	.long	serror		|$09-7 ftanh ERROR

	.long	satan		|$0a-0 fatan norm
	.long	szero		|$0a-1 fatan zero
	.long	spi_2		|$0a-2 fatan inf
	.long	src_nan		|$0a-3 fatan nan
	.long	satand		|$0a-4 fatan denorm
	.long	serror		|$0a-5 fatan ERROR
	.long	serror		|$0a-6 fatan ERROR
	.long	serror		|$0a-7 fatan ERROR

	.long	serror		|$0b-0 ERROR - illegal extension
	.long	serror		|$0b-1 ERROR - illegal extension
	.long	serror		|$0b-2 ERROR - illegal extension
	.long	serror		|$0b-3 ERROR - illegal extension
	.long	serror		|$0b-4 ERROR - illegal extension
	.long	serror		|$0b-5 ERROR - illegal extension
	.long	serror		|$0b-6 ERROR - illegal extension
	.long	serror		|$0b-7 ERROR - illegal extension

	.long	sasin		|$0c-0 fasin norm
	.long	szero		|$0c-1 fasin zero
	.long	t_operr		|$0c-2 fasin inf
	.long	src_nan		|$0c-3 fasin nan
	.long	sasind		|$0c-4 fasin denorm
	.long	serror		|$0c-5 fasin ERROR
	.long	serror		|$0c-6 fasin ERROR
	.long	serror		|$0c-7 fasin ERROR

	.long	satanh		|$0d-0 fatanh norm
	.long	szero		|$0d-1 fatanh zero
	.long	t_operr		|$0d-2 fatanh inf
	.long	src_nan		|$0d-3 fatanh nan
	.long	satanhd		|$0d-4 fatanh denorm
	.long	serror		|$0d-5 fatanh ERROR
	.long	serror		|$0d-6 fatanh ERROR
	.long	serror		|$0d-7 fatanh ERROR

	.long	ssin		|$0e-0 fsin norm
	.long	szero		|$0e-1 fsin zero
	.long	t_operr		|$0e-2 fsin inf
	.long	src_nan		|$0e-3 fsin nan
	.long	ssind		|$0e-4 fsin denorm
	.long	serror		|$0e-5 fsin ERROR
	.long	serror		|$0e-6 fsin ERROR
	.long	serror		|$0e-7 fsin ERROR

	.long	stan		|$0f-0 ftan norm
	.long	szero		|$0f-1 ftan zero
	.long	t_operr		|$0f-2 ftan inf
	.long	src_nan		|$0f-3 ftan nan
	.long	stand		|$0f-4 ftan denorm
	.long	serror		|$0f-5 ftan ERROR
	.long	serror		|$0f-6 ftan ERROR
	.long	serror		|$0f-7 ftan ERROR

	.long	setox		|$10-0 fetox norm
	.long	ld_pone		|$10-1 fetox zero
	.long	szr_inf		|$10-2 fetox inf
	.long	src_nan		|$10-3 fetox nan
	.long	setoxd		|$10-4 fetox denorm
	.long	serror		|$10-5 fetox ERROR
	.long	serror		|$10-6 fetox ERROR
	.long	serror		|$10-7 fetox ERROR

	.long	stwotox		|$11-0 ftwotox norm
	.long	ld_pone		|$11-1 ftwotox zero
	.long	szr_inf		|$11-2 ftwotox inf
	.long	src_nan		|$11-3 ftwotox nan
	.long	stwotoxd	|$11-4 ftwotox denorm
	.long	serror		|$11-5 ftwotox ERROR
	.long	serror		|$11-6 ftwotox ERROR
	.long	serror		|$11-7 ftwotox ERROR

	.long	stentox		|$12-0 ftentox norm
	.long	ld_pone		|$12-1 ftentox zero
	.long	szr_inf		|$12-2 ftentox inf
	.long	src_nan		|$12-3 ftentox nan
	.long	stentoxd	|$12-4 ftentox denorm
	.long	serror		|$12-5 ftentox ERROR
	.long	serror		|$12-6 ftentox ERROR
	.long	serror		|$12-7 ftentox ERROR

	.long	serror		|$13-0 ERROR - illegal extension
	.long	serror		|$13-1 ERROR - illegal extension
	.long	serror		|$13-2 ERROR - illegal extension
	.long	serror		|$13-3 ERROR - illegal extension
	.long	serror		|$13-4 ERROR - illegal extension
	.long	serror		|$13-5 ERROR - illegal extension
	.long	serror		|$13-6 ERROR - illegal extension
	.long	serror		|$13-7 ERROR - illegal extension

	.long	sslogn		|$14-0 flogn norm
	.long	t_dz2		|$14-1 flogn zero
	.long	sopr_inf	|$14-2 flogn inf
	.long	src_nan		|$14-3 flogn nan
	.long	sslognd		|$14-4 flogn denorm
	.long	serror		|$14-5 flogn ERROR
	.long	serror		|$14-6 flogn ERROR
	.long	serror		|$14-7 flogn ERROR

	.long	sslog10		|$15-0 flog10 norm
	.long	t_dz2		|$15-1 flog10 zero
	.long	sopr_inf	|$15-2 flog10 inf
	.long	src_nan		|$15-3 flog10 nan
	.long	sslog10d	|$15-4 flog10 denorm
	.long	serror		|$15-5 flog10 ERROR
	.long	serror		|$15-6 flog10 ERROR
	.long	serror		|$15-7 flog10 ERROR

	.long	sslog2		|$16-0 flog2 norm
	.long	t_dz2		|$16-1 flog2 zero
	.long	sopr_inf	|$16-2 flog2 inf
	.long	src_nan		|$16-3 flog2 nan
	.long	sslog2d		|$16-4 flog2 denorm
	.long	serror		|$16-5 flog2 ERROR
	.long	serror		|$16-6 flog2 ERROR
	.long	serror		|$16-7 flog2 ERROR

	.long	serror		|$17-0 ERROR - illegal extension
	.long	serror		|$17-1 ERROR - illegal extension
	.long	serror		|$17-2 ERROR - illegal extension
	.long	serror		|$17-3 ERROR - illegal extension
	.long	serror		|$17-4 ERROR - illegal extension
	.long	serror		|$17-5 ERROR - illegal extension
	.long	serror		|$17-6 ERROR - illegal extension
	.long	serror		|$17-7 ERROR - illegal extension

	.long	serror		|$18-0 ERROR - illegal extension
	.long	serror		|$18-1 ERROR - illegal extension
	.long	serror		|$18-2 ERROR - illegal extension
	.long	serror		|$18-3 ERROR - illegal extension
	.long	serror		|$18-4 ERROR - illegal extension
	.long	serror		|$18-5 ERROR - illegal extension
	.long	serror		|$18-6 ERROR - illegal extension
	.long	serror		|$18-7 ERROR - illegal extension

	.long	scosh		|$19-0 fcosh norm
	.long	ld_pone		|$19-1 fcosh zero
	.long	ld_pinf		|$19-2 fcosh inf
	.long	src_nan		|$19-3 fcosh nan
	.long	scoshd		|$19-4 fcosh denorm
	.long	serror		|$19-5 fcosh ERROR
	.long	serror		|$19-6 fcosh ERROR
	.long	serror		|$19-7 fcosh ERROR

	.long	serror		|$1a-0 ERROR - illegal extension
	.long	serror		|$1a-1 ERROR - illegal extension
	.long	serror		|$1a-2 ERROR - illegal extension
	.long	serror		|$1a-3 ERROR - illegal extension
	.long	serror		|$1a-4 ERROR - illegal extension
	.long	serror		|$1a-5 ERROR - illegal extension
	.long	serror		|$1a-6 ERROR - illegal extension
	.long	serror		|$1a-7 ERROR - illegal extension

	.long	serror		|$1b-0 ERROR - illegal extension
	.long	serror		|$1b-1 ERROR - illegal extension
	.long	serror		|$1b-2 ERROR - illegal extension
	.long	serror		|$1b-3 ERROR - illegal extension
	.long	serror		|$1b-4 ERROR - illegal extension
	.long	serror		|$1b-5 ERROR - illegal extension
	.long	serror		|$1b-6 ERROR - illegal extension
	.long	serror		|$1b-7 ERROR - illegal extension

	.long	sacos		|$1c-0 facos norm
	.long	ld_ppi2		|$1c-1 facos zero
	.long	t_operr		|$1c-2 facos inf
	.long	src_nan		|$1c-3 facos nan
	.long	sacosd		|$1c-4 facos denorm
	.long	serror		|$1c-5 facos ERROR
	.long	serror		|$1c-6 facos ERROR
	.long	serror		|$1c-7 facos ERROR

	.long	scos		|$1d-0 fcos norm
	.long	ld_pone		|$1d-1 fcos zero
	.long	t_operr		|$1d-2 fcos inf
	.long	src_nan		|$1d-3 fcos nan
	.long	scosd		|$1d-4 fcos denorm
	.long	serror		|$1d-5 fcos ERROR
	.long	serror		|$1d-6 fcos ERROR
	.long	serror		|$1d-7 fcos ERROR

	.long	sgetexp		|$1e-0 fgetexp norm
	.long	szero		|$1e-1 fgetexp zero
	.long	t_operr		|$1e-2 fgetexp inf
	.long	src_nan		|$1e-3 fgetexp nan
	.long	sgetexpd	|$1e-4 fgetexp denorm
	.long	serror		|$1e-5 fgetexp ERROR
	.long	serror		|$1e-6 fgetexp ERROR
	.long	serror		|$1e-7 fgetexp ERROR

	.long	sgetman		|$1f-0 fgetman norm
	.long	szero		|$1f-1 fgetman zero
	.long	t_operr		|$1f-2 fgetman inf
	.long	src_nan		|$1f-3 fgetman nan
	.long	sgetmand	|$1f-4 fgetman denorm
	.long	serror		|$1f-5 fgetman ERROR
	.long	serror		|$1f-6 fgetman ERROR
	.long	serror		|$1f-7 fgetman ERROR

	.long	serror		|$20-0 ERROR - illegal extension
	.long	serror		|$20-1 ERROR - illegal extension
	.long	serror		|$20-2 ERROR - illegal extension
	.long	serror		|$20-3 ERROR - illegal extension
	.long	serror		|$20-4 ERROR - illegal extension
	.long	serror		|$20-5 ERROR - illegal extension
	.long	serror		|$20-6 ERROR - illegal extension
	.long	serror		|$20-7 ERROR - illegal extension

	.long	pmod		|$21-0 fmod all
	.long	pmod		|$21-1 fmod all
	.long	pmod		|$21-2 fmod all
	.long	pmod		|$21-3 fmod all
	.long	pmod		|$21-4 fmod all
	.long	serror		|$21-5 fmod ERROR
	.long	serror		|$21-6 fmod ERROR
	.long	serror		|$21-7 fmod ERROR

	.long	serror		|$22-0 ERROR - illegal extension
	.long	serror		|$22-1 ERROR - illegal extension
	.long	serror		|$22-2 ERROR - illegal extension
	.long	serror		|$22-3 ERROR - illegal extension
	.long	serror		|$22-4 ERROR - illegal extension
	.long	serror		|$22-5 ERROR - illegal extension
	.long	serror		|$22-6 ERROR - illegal extension
	.long	serror		|$22-7 ERROR - illegal extension

	.long	serror		|$23-0 ERROR - illegal extension
	.long	serror		|$23-1 ERROR - illegal extension
	.long	serror		|$23-2 ERROR - illegal extension
	.long	serror		|$23-3 ERROR - illegal extension
	.long	serror		|$23-4 ERROR - illegal extension
	.long	serror		|$23-5 ERROR - illegal extension
	.long	serror		|$23-6 ERROR - illegal extension
	.long	serror		|$23-7 ERROR - illegal extension

	.long	serror		|$24-0 ERROR - illegal extension
	.long	serror		|$24-1 ERROR - illegal extension
	.long	serror		|$24-2 ERROR - illegal extension
	.long	serror		|$24-3 ERROR - illegal extension
	.long	serror		|$24-4 ERROR - illegal extension
	.long	serror		|$24-5 ERROR - illegal extension
	.long	serror		|$24-6 ERROR - illegal extension
	.long	serror		|$24-7 ERROR - illegal extension

	.long	prem		|$25-0 frem all
	.long	prem		|$25-1 frem all
	.long	prem		|$25-2 frem all
	.long	prem		|$25-3 frem all
	.long	prem		|$25-4 frem all
	.long	serror		|$25-5 frem ERROR
	.long	serror		|$25-6 frem ERROR
	.long	serror		|$25-7 frem ERROR

	.long	pscale		|$26-0 fscale all
	.long	pscale		|$26-1 fscale all
	.long	pscale		|$26-2 fscale all
	.long	pscale		|$26-3 fscale all
	.long	pscale		|$26-4 fscale all
	.long	serror		|$26-5 fscale ERROR
	.long	serror		|$26-6 fscale ERROR
	.long	serror		|$26-7 fscale ERROR

	.long	serror		|$27-0 ERROR - illegal extension
	.long	serror		|$27-1 ERROR - illegal extension
	.long	serror		|$27-2 ERROR - illegal extension
	.long	serror		|$27-3 ERROR - illegal extension
	.long	serror		|$27-4 ERROR - illegal extension
	.long	serror		|$27-5 ERROR - illegal extension
	.long	serror		|$27-6 ERROR - illegal extension
	.long	serror		|$27-7 ERROR - illegal extension

	.long	serror		|$28-0 ERROR - illegal extension
	.long	serror		|$28-1 ERROR - illegal extension
	.long	serror		|$28-2 ERROR - illegal extension
	.long	serror		|$28-3 ERROR - illegal extension
	.long	serror		|$28-4 ERROR - illegal extension
	.long	serror		|$28-5 ERROR - illegal extension
	.long	serror		|$28-6 ERROR - illegal extension
	.long	serror		|$28-7 ERROR - illegal extension

	.long	serror		|$29-0 ERROR - illegal extension
	.long	serror		|$29-1 ERROR - illegal extension
	.long	serror		|$29-2 ERROR - illegal extension
	.long	serror		|$29-3 ERROR - illegal extension
	.long	serror		|$29-4 ERROR - illegal extension
	.long	serror		|$29-5 ERROR - illegal extension
	.long	serror		|$29-6 ERROR - illegal extension
	.long	serror		|$29-7 ERROR - illegal extension

	.long	serror		|$2a-0 ERROR - illegal extension
	.long	serror		|$2a-1 ERROR - illegal extension
	.long	serror		|$2a-2 ERROR - illegal extension
	.long	serror		|$2a-3 ERROR - illegal extension
	.long	serror		|$2a-4 ERROR - illegal extension
	.long	serror		|$2a-5 ERROR - illegal extension
	.long	serror		|$2a-6 ERROR - illegal extension
	.long	serror		|$2a-7 ERROR - illegal extension

	.long	serror		|$2b-0 ERROR - illegal extension
	.long	serror		|$2b-1 ERROR - illegal extension
	.long	serror		|$2b-2 ERROR - illegal extension
	.long	serror		|$2b-3 ERROR - illegal extension
	.long	serror		|$2b-4 ERROR - illegal extension
	.long	serror		|$2b-5 ERROR - illegal extension
	.long	serror		|$2b-6 ERROR - illegal extension
	.long	serror		|$2b-7 ERROR - illegal extension

	.long	serror		|$2c-0 ERROR - illegal extension
	.long	serror		|$2c-1 ERROR - illegal extension
	.long	serror		|$2c-2 ERROR - illegal extension
	.long	serror		|$2c-3 ERROR - illegal extension
	.long	serror		|$2c-4 ERROR - illegal extension
	.long	serror		|$2c-5 ERROR - illegal extension
	.long	serror		|$2c-6 ERROR - illegal extension
	.long	serror		|$2c-7 ERROR - illegal extension

	.long	serror		|$2d-0 ERROR - illegal extension
	.long	serror		|$2d-1 ERROR - illegal extension
	.long	serror		|$2d-2 ERROR - illegal extension
	.long	serror		|$2d-3 ERROR - illegal extension
	.long	serror		|$2d-4 ERROR - illegal extension
	.long	serror		|$2d-5 ERROR - illegal extension
	.long	serror		|$2d-6 ERROR - illegal extension
	.long	serror		|$2d-7 ERROR - illegal extension

	.long	serror		|$2e-0 ERROR - illegal extension
	.long	serror		|$2e-1 ERROR - illegal extension
	.long	serror		|$2e-2 ERROR - illegal extension
	.long	serror		|$2e-3 ERROR - illegal extension
	.long	serror		|$2e-4 ERROR - illegal extension
	.long	serror		|$2e-5 ERROR - illegal extension
	.long	serror		|$2e-6 ERROR - illegal extension
	.long	serror		|$2e-7 ERROR - illegal extension

	.long	serror		|$2f-0 ERROR - illegal extension
	.long	serror		|$2f-1 ERROR - illegal extension
	.long	serror		|$2f-2 ERROR - illegal extension
	.long	serror		|$2f-3 ERROR - illegal extension
	.long	serror		|$2f-4 ERROR - illegal extension
	.long	serror		|$2f-5 ERROR - illegal extension
	.long	serror		|$2f-6 ERROR - illegal extension
	.long	serror		|$2f-7 ERROR - illegal extension

	.long	ssincos		|$30-0 fsincos norm
	.long	ssincosz	|$30-1 fsincos zero
	.long	ssincosi	|$30-2 fsincos inf
	.long	ssincosnan	|$30-3 fsincos nan
	.long	ssincosd	|$30-4 fsincos denorm
	.long	serror		|$30-5 fsincos ERROR
	.long	serror		|$30-6 fsincos ERROR
	.long	serror		|$30-7 fsincos ERROR

	.long	ssincos		|$31-0 fsincos norm
	.long	ssincosz	|$31-1 fsincos zero
	.long	ssincosi	|$31-2 fsincos inf
	.long	ssincosnan	|$31-3 fsincos nan
	.long	ssincosd	|$31-4 fsincos denorm
	.long	serror		|$31-5 fsincos ERROR
	.long	serror		|$31-6 fsincos ERROR
	.long	serror		|$31-7 fsincos ERROR

	.long	ssincos		|$32-0 fsincos norm
	.long	ssincosz	|$32-1 fsincos zero
	.long	ssincosi	|$32-2 fsincos inf
	.long	ssincosnan	|$32-3 fsincos nan
	.long	ssincosd	|$32-4 fsincos denorm
	.long	serror		|$32-5 fsincos ERROR
	.long	serror		|$32-6 fsincos ERROR
	.long	serror		|$32-7 fsincos ERROR

	.long	ssincos		|$33-0 fsincos norm
	.long	ssincosz	|$33-1 fsincos zero
	.long	ssincosi	|$33-2 fsincos inf
	.long	ssincosnan	|$33-3 fsincos nan
	.long	ssincosd	|$33-4 fsincos denorm
	.long	serror		|$33-5 fsincos ERROR
	.long	serror		|$33-6 fsincos ERROR
	.long	serror		|$33-7 fsincos ERROR

	.long	ssincos		|$34-0 fsincos norm
	.long	ssincosz	|$34-1 fsincos zero
	.long	ssincosi	|$34-2 fsincos inf
	.long	ssincosnan	|$34-3 fsincos nan
	.long	ssincosd	|$34-4 fsincos denorm
	.long	serror		|$34-5 fsincos ERROR
	.long	serror		|$34-6 fsincos ERROR
	.long	serror		|$34-7 fsincos ERROR

	.long	ssincos		|$35-0 fsincos norm
	.long	ssincosz	|$35-1 fsincos zero
	.long	ssincosi	|$35-2 fsincos inf
	.long	ssincosnan	|$35-3 fsincos nan
	.long	ssincosd	|$35-4 fsincos denorm
	.long	serror		|$35-5 fsincos ERROR
	.long	serror		|$35-6 fsincos ERROR
	.long	serror		|$35-7 fsincos ERROR

	.long	ssincos		|$36-0 fsincos norm
	.long	ssincosz	|$36-1 fsincos zero
	.long	ssincosi	|$36-2 fsincos inf
	.long	ssincosnan	|$36-3 fsincos nan
	.long	ssincosd	|$36-4 fsincos denorm
	.long	serror		|$36-5 fsincos ERROR
	.long	serror		|$36-6 fsincos ERROR
	.long	serror		|$36-7 fsincos ERROR

	.long	ssincos		|$37-0 fsincos norm
	.long	ssincosz	|$37-1 fsincos zero
	.long	ssincosi	|$37-2 fsincos inf
	.long	ssincosnan	|$37-3 fsincos nan
	.long	ssincosd	|$37-4 fsincos denorm
	.long	serror		|$37-5 fsincos ERROR
	.long	serror		|$37-6 fsincos ERROR
	.long	serror		|$37-7 fsincos ERROR

	|end
|
|	util.sa 3.7 7/29/91
|
|	This file contains routines used by other programs.
|
|	ovf_res: used by overflow to force the correct
|		 result. ovf_r_k, ovf_r_x2, ovf_r_x3 are 
|		 derivatives of this routine.
|	get_fline: get user's opcode word
|	g_dfmtou: returns the destination format.
|	g_opcls: returns the opclass of the float instruction.
|	g_rndpr: returns the rounding precision. 
|	reg_dest: write byte, word, or long data to Dn
|
|
|		Copyright (C) Motorola, Inc. 1990
|			All Rights Reserved
|
|	THIS IS UNPUBLISHED PROPRIETARY SOURCE CODE OF MOTOROLA 
|	The copyright notice above does not evidence any  
|	actual or intended publication of such source code.

|UTIL	idnt    2,1 | Motorola 040 Floating Point Software Package

	|section	8

	.include "fpsp.h"

	|xref	mem_read

	.global	g_dfmtou
	.global	g_opcls
	.global	g_rndpr
	.global	get_fline
	.global	reg_dest

|
| Final result table for ovf_res. Note that the negative counterparts
| are unnecessary as ovf_res always returns the sign separately from
| the exponent.
|					;+inf
EXT_PINF:	.long	0x7fff0000,0x00000000,0x00000000,0x00000000	
|					;largest +ext
EXT_PLRG:	.long	0x7ffe0000,0xffffffff,0xffffffff,0x00000000	
|					;largest magnitude +sgl in ext
SGL_PLRG:	.long	0x407e0000,0xffffff00,0x00000000,0x00000000	
|					;largest magnitude +dbl in ext
DBL_PLRG:	.long	0x43fe0000,0xffffffff,0xfffff800,0x00000000	
|					;largest -ext

tblovfl:
	.long	EXT_RN
	.long	EXT_RZ
	.long	EXT_RM
	.long	EXT_RP
	.long	SGL_RN
	.long	SGL_RZ
	.long	SGL_RM
	.long	SGL_RP
	.long	DBL_RN
	.long	DBL_RZ
	.long	DBL_RM
	.long	DBL_RP
	.long	error
	.long	error
	.long	error
	.long	error


|
|	ovf_r_k --- overflow result calculation
|
| This entry point is used by kernel_ex.  
|
| This forces the destination precision to be extended
|
| Input:	operand in ETEMP
| Output:	a result is in ETEMP (internal extended format)
|
	.global	ovf_r_k
ovf_r_k:
	lea	ETEMP(%a6),%a0	|a0 points to source operand	
	bclrb	#sign_bit,ETEMP_EX(%a6)
	sne	ETEMP_SGN(%a6)	|convert to internal IEEE format

|
|	ovf_r_x2 --- overflow result calculation
|
| This entry point used by x_ovfl.  (opclass 0 and 2)
|
| Input		a0  points to an operand in the internal extended format
| Output	a0  points to the result in the internal extended format
|
| This sets the round precision according to the user's FPCR unless the
| instruction is fsgldiv or fsglmul or fsadd, fdadd, fsub, fdsub, fsmul,
| fdmul, fsdiv, fddiv, fssqrt, fsmove, fdmove, fsabs, fdabs, fsneg, fdneg.
| If the instruction is fsgldiv of fsglmul, the rounding precision must be
| extended.  If the instruction is not fsgldiv or fsglmul but a force-
| precision instruction, the rounding precision is then set to the force
| precision.

	.global	ovf_r_x2
ovf_r_x2:
	btstb	#E3,E_BYTE(%a6)		|check for nu exception
	beql	ovf_e1_exc		|it is cu exception
ovf_e3_exc:
	movew	CMDREG3B(%a6),%d0		|get the command word
	andiw	#0x00000060,%d0		|clear all bits except 6 and 5
	cmpil	#0x00000040,%d0
	beql	ovff_sgl		|force precision is single
	cmpil	#0x00000060,%d0
	beql	ovff_dbl		|force precision is double
	movew	CMDREG3B(%a6),%d0		|get the command word again
	andil	#0x7f,%d0			|clear all except operation
	cmpil	#0x33,%d0			
	beql	ovf_fsgl		|fsglmul or fsgldiv
	cmpil	#0x30,%d0
	beql	ovf_fsgl		
	bra	ovf_fpcr		|instruction is none of the above
|					;use FPCR
ovf_e1_exc:
	movew	CMDREG1B(%a6),%d0		|get command word
	andil	#0x00000044,%d0		|clear all bits except 6 and 2
	cmpil	#0x00000040,%d0
	beql	ovff_sgl		|the instruction is force single
	cmpil	#0x00000044,%d0
	beql	ovff_dbl		|the instruction is force double
	movew	CMDREG1B(%a6),%d0		|again get the command word
	andil	#0x0000007f,%d0		|clear all except the op code
	cmpil	#0x00000027,%d0
	beql	ovf_fsgl		|fsglmul
	cmpil 	#0x00000024,%d0
	beql	ovf_fsgl		|fsgldiv
	bra	ovf_fpcr		|none of the above, use FPCR
| 
|
| Inst is either fsgldiv or fsglmul.  Force extended precision.
|
ovf_fsgl:
	clrl	%d0
	bra	ovf_res

ovff_sgl:
	movel	#0x00000001,%d0		|set single
	bra	ovf_res
ovff_dbl:
	movel	#0x00000002,%d0		|set double
	bra	ovf_res
|
| The precision is in the fpcr.
|
ovf_fpcr:
	bfextu	FPCR_MODE(%a6){#0:#2},%d0 |set round precision
	bra	ovf_res
	
|
|
|	ovf_r_x3 --- overflow result calculation
|
| This entry point used by x_ovfl. (opclass 3 only)
|
| Input		a0  points to an operand in the internal extended format
| Output	a0  points to the result in the internal extended format
|
| This sets the round precision according to the destination size.
|
	.global	ovf_r_x3
ovf_r_x3:
	bsr	g_dfmtou	|get dest fmt in d0{1:0}
|				;for fmovout, the destination format
|				;is the rounding precision

|
|	ovf_res --- overflow result calculation
|
| Input:
|	a0 	points to operand in internal extended format
| Output:
|	a0 	points to result in internal extended format
|
	.global	ovf_res
ovf_res:
	lsll	#2,%d0		|move round precision to d0{3:2}
	bfextu	FPCR_MODE(%a6){#2:#2},%d1 |set round mode
	orl	%d1,%d0		|index is fmt:mode in d0{3:0}
	leal	tblovfl,%a1	|load a1 with table address
	movel	%a1@(%d0:l:4),%a1	|use d0 as index to the table
	jmp	(%a1)		|go to the correct routine
|
|case DEST_FMT = EXT
|
EXT_RN:
	leal	EXT_PINF,%a1	|answer is +/- infinity
	bsetb	#inf_bit,FPSR_CC(%a6)
	bra	set_sign	|now go set the sign	
EXT_RZ:
	leal	EXT_PLRG,%a1	|answer is +/- large number
	bra	set_sign	|now go set the sign
EXT_RM:
	tstb	LOCAL_SGN(%a0)	|if negative overflow
	beqs	e_rm_pos
e_rm_neg:
	leal	EXT_PINF,%a1	|answer is negative infinity
	orl	#neginf_mask,USER_FPSR(%a6)
	bra	end_ovfr
e_rm_pos:
	leal	EXT_PLRG,%a1	|answer is large positive number
	bra	end_ovfr
EXT_RP:
	tstb	LOCAL_SGN(%a0)	|if negative overflow
	beqs	e_rp_pos
e_rp_neg:
	leal	EXT_PLRG,%a1	|answer is large negative number
	bsetb	#neg_bit,FPSR_CC(%a6)
	bra	end_ovfr
e_rp_pos:
	leal	EXT_PINF,%a1	|answer is positive infinity
	bsetb	#inf_bit,FPSR_CC(%a6)
	bra	end_ovfr
|
|case DEST_FMT = DBL
|
DBL_RN:
	leal	EXT_PINF,%a1	|answer is +/- infinity
	bsetb	#inf_bit,FPSR_CC(%a6)
	bra	set_sign
DBL_RZ:
	leal	DBL_PLRG,%a1	|answer is +/- large number
	bra	set_sign	|now go set the sign
DBL_RM:
	tstb	LOCAL_SGN(%a0)	|if negative overflow
	beqs	d_rm_pos
d_rm_neg:
	leal	EXT_PINF,%a1	|answer is negative infinity
	orl	#neginf_mask,USER_FPSR(%a6)
	bra	end_ovfr	|inf is same for all precisions (ext,dbl,sgl)
d_rm_pos:
	leal	DBL_PLRG,%a1	|answer is large positive number
	bra	end_ovfr
DBL_RP:
	tstb	LOCAL_SGN(%a0)	|if negative overflow
	beqs	d_rp_pos
d_rp_neg:
	leal	DBL_PLRG,%a1	|answer is large negative number
	bsetb	#neg_bit,FPSR_CC(%a6)
	bra	end_ovfr
d_rp_pos:
	leal	EXT_PINF,%a1	|answer is positive infinity
	bsetb	#inf_bit,FPSR_CC(%a6)
	bra	end_ovfr
|
|case DEST_FMT = SGL
|
SGL_RN:
	leal	EXT_PINF,%a1	|answer is +/-  infinity
	bsetb	#inf_bit,FPSR_CC(%a6)
	bras	set_sign
SGL_RZ:
	leal	SGL_PLRG,%a1	|answer is +/- large number
	bras	set_sign
SGL_RM:
	tstb	LOCAL_SGN(%a0)	|if negative overflow
	beqs	s_rm_pos
s_rm_neg:
	leal	EXT_PINF,%a1	|answer is negative infinity
	orl	#neginf_mask,USER_FPSR(%a6)
	bras	end_ovfr
s_rm_pos:
	leal	SGL_PLRG,%a1	|answer is large positive number
	bras	end_ovfr
SGL_RP:
	tstb	LOCAL_SGN(%a0)	|if negative overflow
	beqs	s_rp_pos
s_rp_neg:
	leal	SGL_PLRG,%a1	|answer is large negative number
	bsetb	#neg_bit,FPSR_CC(%a6)
	bras	end_ovfr
s_rp_pos:
	leal	EXT_PINF,%a1	|answer is positive infinity
	bsetb	#inf_bit,FPSR_CC(%a6)
	bras	end_ovfr

set_sign:
	tstb	LOCAL_SGN(%a0)	|if negative overflow
	beqs	end_ovfr
neg_sign:
	bsetb	#neg_bit,FPSR_CC(%a6)

end_ovfr:
	movew	LOCAL_EX(%a1),LOCAL_EX(%a0) |do not overwrite sign
	movel	LOCAL_HI(%a1),LOCAL_HI(%a0)
	movel	LOCAL_LO(%a1),LOCAL_LO(%a0)
	rts


|
|	ERROR
|
error:
	rts
|
|	get_fline --- get f-line opcode of interrupted instruction
|
|	Returns opcode in the low word of d0.
|
get_fline:
	movel	USER_FPIAR(%a6),%a0	|opcode address
	movel	#0,-(%a7)	|reserve a word on the stack
	leal	2(%a7),%a1	|point to low word of temporary
	movel	#2,%d0		|count
	bsrl	mem_read
	movel	(%a7)+,%d0
	rts
|
| 	g_rndpr --- put rounding precision in d0{1:0}
|	
|	valid return codes are:
|		00 - extended 
|		01 - single
|		10 - double
|
| begin
| get rounding precision (cmdreg3b{6:5})
| begin
|  case	opclass = 011 (move out)
|	get destination format - this is the also the rounding precision
|
|  case	opclass = 0x0
|	if E3
|	    *case RndPr(from cmdreg3b{6:5} = 11  then RND_PREC = DBL
|	    *case RndPr(from cmdreg3b{6:5} = 10  then RND_PREC = SGL
|	     case RndPr(from cmdreg3b{6:5} = 00 | 01
|		use precision from FPCR{7:6}
|			case 00 then RND_PREC = EXT
|			case 01 then RND_PREC = SGL
|			case 10 then RND_PREC = DBL
|	else E1
|	     use precision in FPCR{7:6}
|	     case 00 then RND_PREC = EXT
|	     case 01 then RND_PREC = SGL
|	     case 10 then RND_PREC = DBL
| end
|
g_rndpr:
	bsr	g_opcls		|get opclass in d0{2:0}
	cmpw	#0x0003,%d0	|check for opclass 011
	bnes	op_0x0

|
| For move out instructions (opclass 011) the destination format
| is the same as the rounding precision.  Pass results from g_dfmtou.
|
	bsr 	g_dfmtou	
	rts
op_0x0:
	btstb	#E3,E_BYTE(%a6)
	beql	unf_e1_exc	|branch to e1 underflow
unf_e3_exc:
	movel	CMDREG3B(%a6),%d0	|rounding precision in d0{10:9}
	bfextu	%d0{#9:#2},%d0	|move the rounding prec bits to d0{1:0}
	cmpil	#0x2,%d0
	beql	unff_sgl	|force precision is single
	cmpil	#0x3,%d0		|force precision is double
	beql	unff_dbl
	movew	CMDREG3B(%a6),%d0	|get the command word again
	andil	#0x7f,%d0		|clear all except operation
	cmpil	#0x33,%d0			
	beql	unf_fsgl	|fsglmul or fsgldiv
	cmpil	#0x30,%d0
	beql	unf_fsgl	|fsgldiv or fsglmul
	bra	unf_fpcr
unf_e1_exc:
	movel	CMDREG1B(%a6),%d0	|get 32 bits off the stack, 1st 16 bits
|				;are the command word
	andil	#0x00440000,%d0	|clear all bits except bits 6 and 2
	cmpil	#0x00400000,%d0
	beql	unff_sgl	|force single
	cmpil	#0x00440000,%d0	|force double
	beql	unff_dbl
	movel	CMDREG1B(%a6),%d0	|get the command word again
	andil	#0x007f0000,%d0	|clear all bits except the operation
	cmpil	#0x00270000,%d0
	beql	unf_fsgl	|fsglmul
	cmpil	#0x00240000,%d0
	beql	unf_fsgl	|fsgldiv
	bra	unf_fpcr

|
| Convert to return format.  The values from cmdreg3b and the return
| values are:
|	cmdreg3b	return	     precision
|	--------	------	     ---------
|	  00,01		  0		ext
|	   10		  1		sgl
|	   11		  2		dbl
| Force single
|
unff_sgl:
	movel	#1,%d0		|return 1
	rts
|
| Force double
|
unff_dbl:
	movel	#2,%d0		|return 2
	rts
|
| Force extended
|
unf_fsgl:
	movel	#0,%d0		
	rts
|
| Get rounding precision set in FPCR{7:6}.
|
unf_fpcr:
	movel	USER_FPCR(%a6),%d0 |rounding precision bits in d0{7:6}
	bfextu	%d0{#24:#2},%d0	|move the rounding prec bits to d0{1:0}
	rts
|
|	g_opcls --- put opclass in d0{2:0}
|
g_opcls:
	btstb	#E3,E_BYTE(%a6)
	beqs	opc_1b		|if set, go to cmdreg1b
opc_3b:
	clrl	%d0		|if E3, only opclass 0x0 is possible
	rts
opc_1b:
	movel	CMDREG1B(%a6),%d0
	bfextu	%d0{#0:#3},%d0	|shift opclass bits d0{31:29} to d0{2:0}
	rts
|
|	g_dfmtou --- put destination format in d0{1:0}
|
|	If E1, the format is from cmdreg1b{12:10}
|	If E3, the format is extended.
|
|	Dest. Fmt.	
|		extended  010 -> 00
|		single    001 -> 01
|		double    101 -> 10
|
g_dfmtou:
	btstb	#E3,E_BYTE(%a6)
	beqs	op011
	clrl	%d0		|if E1, size is always ext
	rts
op011:
	movel	CMDREG1B(%a6),%d0
	bfextu	%d0{#3:#3},%d0	|dest fmt from cmdreg1b{12:10}
	cmpb	#1,%d0		|check for single
	bnes	not_sgl
	movel	#1,%d0
	rts
not_sgl:
	cmpb	#5,%d0		|check for double
	bnes	not_dbl
	movel	#2,%d0
	rts
not_dbl:
	clrl	%d0		|must be extended
	rts

|
|
| Final result table for unf_sub. Note that the negative counterparts
| are unnecessary as unf_sub always returns the sign separately from
| the exponent.
|					;+zero
EXT_PZRO:	.long	0x00000000,0x00000000,0x00000000,0x00000000	
|					;+zero
SGL_PZRO:	.long	0x3f810000,0x00000000,0x00000000,0x00000000	
|					;+zero
DBL_PZRO:	.long	0x3c010000,0x00000000,0x00000000,0x00000000	
|					;smallest +ext denorm
EXT_PSML:	.long	0x00000000,0x00000000,0x00000001,0x00000000	
|					;smallest +sgl denorm
SGL_PSML:	.long	0x3f810000,0x00000100,0x00000000,0x00000000	
|					;smallest +dbl denorm
DBL_PSML:	.long	0x3c010000,0x00000000,0x00000800,0x00000000	
|
|	UNF_SUB --- underflow result calculation
|
| Input:
|	d0 	contains round precision
|	a0	points to input operand in the internal extended format
|
| Output:
|	a0 	points to correct internal extended precision result.
|

tblunf:
	.long	uEXT_RN
	.long	uEXT_RZ
	.long	uEXT_RM
	.long	uEXT_RP
	.long	uSGL_RN
	.long	uSGL_RZ
	.long	uSGL_RM
	.long	uSGL_RP
	.long	uDBL_RN
	.long	uDBL_RZ
	.long	uDBL_RM
	.long	uDBL_RP
	.long	uDBL_RN
	.long	uDBL_RZ
	.long	uDBL_RM
	.long	uDBL_RP

	.global	unf_sub
unf_sub:
	lsll	#2,%d0		|move round precision to d0{3:2}
	bfextu	FPCR_MODE(%a6){#2:#2},%d1 |set round mode
	orl	%d1,%d0		|index is fmt:mode in d0{3:0}
	leal	tblunf,%a1	|load a1 with table address
	movel	%a1@(%d0:l:4),%a1	|use d0 as index to the table
	jmp	(%a1)		|go to the correct routine
|
|case DEST_FMT = EXT
|
uEXT_RN:
	leal	EXT_PZRO,%a1	|answer is +/- zero
	bsetb	#z_bit,FPSR_CC(%a6)
	bra	uset_sign	|now go set the sign	
uEXT_RZ:
	leal	EXT_PZRO,%a1	|answer is +/- zero
	bsetb	#z_bit,FPSR_CC(%a6)
	bra	uset_sign	|now go set the sign
uEXT_RM:
	tstb	LOCAL_SGN(%a0)	|if negative underflow
	beqs	ue_rm_pos
ue_rm_neg:
	leal	EXT_PSML,%a1	|answer is negative smallest denorm
	bsetb	#neg_bit,FPSR_CC(%a6)
	bra	end_unfr
ue_rm_pos:
	leal	EXT_PZRO,%a1	|answer is positive zero
	bsetb	#z_bit,FPSR_CC(%a6)
	bra	end_unfr
uEXT_RP:
	tstb	LOCAL_SGN(%a0)	|if negative underflow
	beqs	ue_rp_pos
ue_rp_neg:
	leal	EXT_PZRO,%a1	|answer is negative zero
	oril	#negz_mask,USER_FPSR(%a6)
	bra	end_unfr
ue_rp_pos:
	leal	EXT_PSML,%a1	|answer is positive smallest denorm
	bra	end_unfr
|
|case DEST_FMT = DBL
|
uDBL_RN:
	leal	DBL_PZRO,%a1	|answer is +/- zero
	bsetb	#z_bit,FPSR_CC(%a6)
	bra	uset_sign
uDBL_RZ:
	leal	DBL_PZRO,%a1	|answer is +/- zero
	bsetb	#z_bit,FPSR_CC(%a6)
	bra	uset_sign	|now go set the sign
uDBL_RM:
	tstb	LOCAL_SGN(%a0)	|if negative overflow
	beqs	ud_rm_pos
ud_rm_neg:
	leal	DBL_PSML,%a1	|answer is smallest denormalized negative
	bsetb	#neg_bit,FPSR_CC(%a6)
	bra	end_unfr
ud_rm_pos:
	leal	DBL_PZRO,%a1	|answer is positive zero
	bsetb	#z_bit,FPSR_CC(%a6)
	bra	end_unfr
uDBL_RP:
	tstb	LOCAL_SGN(%a0)	|if negative overflow
	beqs	ud_rp_pos
ud_rp_neg:
	leal	DBL_PZRO,%a1	|answer is negative zero
	oril	#negz_mask,USER_FPSR(%a6)
	bra	end_unfr
ud_rp_pos:
	leal	DBL_PSML,%a1	|answer is smallest denormalized negative
	bra	end_unfr
|
|case DEST_FMT = SGL
|
uSGL_RN:
	leal	SGL_PZRO,%a1	|answer is +/- zero
	bsetb	#z_bit,FPSR_CC(%a6)
	bras	uset_sign
uSGL_RZ:
	leal	SGL_PZRO,%a1	|answer is +/- zero
	bsetb	#z_bit,FPSR_CC(%a6)
	bras	uset_sign
uSGL_RM:
	tstb	LOCAL_SGN(%a0)	|if negative overflow
	beqs	us_rm_pos
us_rm_neg:
	leal	SGL_PSML,%a1	|answer is smallest denormalized negative
	bsetb	#neg_bit,FPSR_CC(%a6)
	bras	end_unfr
us_rm_pos:
	leal	SGL_PZRO,%a1	|answer is positive zero
	bsetb	#z_bit,FPSR_CC(%a6)
	bras	end_unfr
uSGL_RP:
	tstb	LOCAL_SGN(%a0)	|if negative overflow
	beqs	us_rp_pos
us_rp_neg:
	leal	SGL_PZRO,%a1	|answer is negative zero
	oril	#negz_mask,USER_FPSR(%a6)
	bras	end_unfr
us_rp_pos:
	leal	SGL_PSML,%a1	|answer is smallest denormalized positive
	bras	end_unfr

uset_sign:
	tstb	LOCAL_SGN(%a0)	|if negative overflow
	beqs	end_unfr
uneg_sign:
	bsetb	#neg_bit,FPSR_CC(%a6)

end_unfr:
	movew	LOCAL_EX(%a1),LOCAL_EX(%a0) |be careful not to overwrite sign
	movel	LOCAL_HI(%a1),LOCAL_HI(%a0)
	movel	LOCAL_LO(%a1),LOCAL_LO(%a0)
	rts
|
|	reg_dest --- write byte, word, or long data to Dn
|
|
| Input:
|	L_SCR1: Data 
|	d1:     data size and dest register number formatted as:
|
|	32		5    4     3     2     1     0
|       -----------------------------------------------
|       |        0        |    Size   |  Dest Reg #   |
|       -----------------------------------------------
|
|	Size is:
|		0 - Byte
|		1 - Word
|		2 - Long/Single
|
pregdst:
	.long	byte_d0
	.long	byte_d1
	.long	byte_d2
	.long	byte_d3
	.long	byte_d4
	.long	byte_d5
	.long	byte_d6
	.long	byte_d7
	.long	word_d0
	.long	word_d1
	.long	word_d2
	.long	word_d3
	.long	word_d4
	.long	word_d5
	.long	word_d6
	.long	word_d7
	.long	long_d0
	.long	long_d1
	.long	long_d2
	.long	long_d3
	.long	long_d4
	.long	long_d5
	.long	long_d6
	.long	long_d7

reg_dest:
	leal	pregdst,%a0
	movel	%a0@(%d1:l:4),%a0
	jmp	(%a0)

byte_d0:
	moveb	L_SCR1(%a6),USER_D0+3(%a6)
	rts
byte_d1:
	moveb	L_SCR1(%a6),USER_D1+3(%a6)
	rts
byte_d2:
	moveb	L_SCR1(%a6),%d2
	rts
byte_d3:
	moveb	L_SCR1(%a6),%d3
	rts
byte_d4:
	moveb	L_SCR1(%a6),%d4
	rts
byte_d5:
	moveb	L_SCR1(%a6),%d5
	rts
byte_d6:
	moveb	L_SCR1(%a6),%d6
	rts
byte_d7:
	moveb	L_SCR1(%a6),%d7
	rts
word_d0:
	movew	L_SCR1(%a6),USER_D0+2(%a6)
	rts
word_d1:
	movew	L_SCR1(%a6),USER_D1+2(%a6)
	rts
word_d2:
	movew	L_SCR1(%a6),%d2
	rts
word_d3:
	movew	L_SCR1(%a6),%d3
	rts
word_d4:
	movew	L_SCR1(%a6),%d4
	rts
word_d5:
	movew	L_SCR1(%a6),%d5
	rts
word_d6:
	movew	L_SCR1(%a6),%d6
	rts
word_d7:
	movew	L_SCR1(%a6),%d7
	rts
long_d0:
	movel	L_SCR1(%a6),USER_D0(%a6)
	rts
long_d1:
	movel	L_SCR1(%a6),USER_D1(%a6)
	rts
long_d2:
	movel	L_SCR1(%a6),%d2
	rts
long_d3:
	movel	L_SCR1(%a6),%d3
	rts
long_d4:
	movel	L_SCR1(%a6),%d4
	rts
long_d5:
	movel	L_SCR1(%a6),%d5
	rts
long_d6:
	movel	L_SCR1(%a6),%d6
	rts
long_d7:
	movel	L_SCR1(%a6),%d7
	rts
	|end
|
|	x_bsun.sa 3.3 7/1/91
|
|	fpsp_bsun --- FPSP handler for branch/set on unordered exception
|
|	Copy the PC to FPIAR to maintain 881/882 compatibility
|
|	The real_bsun handler will need to perform further corrective
|	measures as outlined in the 040 User's Manual on pages
|	9-41f, section 9.8.3.
|

|		Copyright (C) Motorola, Inc. 1990
|			All Rights Reserved
|
|	THIS IS UNPUBLISHED PROPRIETARY SOURCE CODE OF MOTOROLA 
|	The copyright notice above does not evidence any  
|	actual or intended publication of such source code.

X_BSUN:	|idnt    2,1 | Motorola 040 Floating Point Software Package

	|section	8

	.include "fpsp.h"

	|xref	real_bsun

	.global	fpsp_bsun
fpsp_bsun:
|
	link		%a6,#-LOCAL_SIZE
	fsave		-(%a7)
	moveml		%d0-%d1/%a0-%a1,USER_DA(%a6)
	fmovemx	%fp0-%fp3,USER_FP0(%a6)
	fmoveml	%fpcr/%fpsr/%fpiar,USER_FPCR(%a6)

|
	movel		EXC_PC(%a6),USER_FPIAR(%a6)
|
	moveml		USER_DA(%a6),%d0-%d1/%a0-%a1
	fmovemx	USER_FP0(%a6),%fp0-%fp3
	fmoveml	USER_FPCR(%a6),%fpcr/%fpsr/%fpiar
	frestore	(%a7)+
	unlk		%a6
	bral		real_bsun
|
	|end
|
|	x_fline.sa 3.3 1/10/91
|
|	fpsp_fline --- FPSP handler for fline exception
|
|	First determine if the exception is one of the unimplemented
|	floating point instructions.  If so, let fpsp_unimp handle it.
|	Next, determine if the instruction is an fmovecr with a non-zero
|	<ea> field.  If so, handle here and return.  Otherwise, it
|	must be a real F-line exception.
|

|		Copyright (C) Motorola, Inc. 1990
|			All Rights Reserved
|
|	THIS IS UNPUBLISHED PROPRIETARY SOURCE CODE OF MOTOROLA 
|	The copyright notice above does not evidence any  
|	actual or intended publication of such source code.

X_FLINE:	|idnt    2,1 | Motorola 040 Floating Point Software Package

	|section	8

	.include "fpsp.h"

	|xref	real_fline
	|xref	fpsp_unimp
	|xref	uni_2
	|xref	mem_read
	|xref	fpsp_fmt_error

	.global	fpsp_fline
fpsp_fline:
|
|	check for unimplemented vector first.  Use EXC_VEC-4 because
|	the equate is valid only after a 'link a6' has pushed one more
|	long onto the stack.
|
	cmpw	#UNIMP_VEC,EXC_VEC-4(%a7)
	beql	fpsp_unimp

|
|	fmovecr with non-zero <ea> handling here
|
	subl	#4,%a7		|4 accounts for 2-word difference
|				;between six word frame (unimp) and
|				;four word frame
	link	%a6,#-LOCAL_SIZE
	fsave	-(%a7)
	moveml	%d0-%d1/%a0-%a1,USER_DA(%a6)
	moveal	EXC_PC+4(%a6),%a0	|get address of fline instruction
	leal	L_SCR1(%a6),%a1	|use L_SCR1 as scratch
	movel	#4,%d0
	addl	#4,%a6		|to offset the sub.l #4,a7 above so that
|				;a6 can point correctly to the stack frame 
|				;before branching to mem_read
	bsrl	mem_read
	subl	#4,%a6
	movel	L_SCR1(%a6),%d0	|d0 contains the fline and command word
	bfextu	%d0{#4:#3},%d1	|extract coprocessor id
	cmpib	#1,%d1		|check if cpid=1
	bne	not_mvcr	|exit if not
	bfextu	%d0{#16:#6},%d1
	cmpib	#0x17,%d1		|check if it is an FMOVECR encoding
	bne	not_mvcr	
|				;if an FMOVECR instruction, fix stack
|				;and go to FPSP_UNIMP
fix_stack:
	cmpib	#VER_40,(%a7)	|test for orig unimp frame
	bnes	ck_rev
	subl	#UNIMP_40_SIZE-4,%a7 |emulate an orig fsave
	moveb	#VER_40,(%a7)
	moveb	#UNIMP_40_SIZE-4,1(%a7)
	clrw	2(%a7)
	bras	fix_con
ck_rev:
	cmpib	#VER_41,(%a7)	|test for rev unimp frame
	bnel	fpsp_fmt_error	|if not $40 or $41, exit with error
	subl	#UNIMP_41_SIZE-4,%a7 |emulate a rev fsave
	moveb	#VER_41,(%a7)
	moveb	#UNIMP_41_SIZE-4,1(%a7)
	clrw	2(%a7)
fix_con:
	movew	EXC_SR+4(%a6),EXC_SR(%a6) |move stacked sr to new position
	movel	EXC_PC+4(%a6),EXC_PC(%a6) |move stacked pc to new position
	fmovel	EXC_PC(%a6),%FPIAR |point FPIAR to fline inst
	movel	#4,%d1
	addl	%d1,EXC_PC(%a6)	|increment stacked pc value to next inst
	movew	#0x202c,EXC_VEC(%a6) |reformat vector to unimp
	clrl	EXC_EA(%a6)	|clear the EXC_EA field
	movew	%d0,CMDREG1B(%a6) |move the lower word into CMDREG1B
	clrl	E_BYTE(%a6)
	bsetb	#UFLAG,T_BYTE(%a6)
	moveml	USER_DA(%a6),%d0-%d1/%a0-%a1 |restore data registers
	bral	uni_2

not_mvcr:
	moveml	USER_DA(%a6),%d0-%d1/%a0-%a1 |restore data registers
	frestore (%a7)+
	unlk	%a6
	addl	#4,%a7
	bral	real_fline

	|end
|
|	x_operr.sa 3.5 7/1/91
|
|	fpsp_operr --- FPSP handler for operand error exception
|
|	See 68040 User's Manual pp. 9-44f
|
| Note 1: For trap disabled 040 does the following:
| If the dest is a fp reg, then an extended precision non_signaling
| NAN is stored in the dest reg.  If the dest format is b, w, or l and
| the source op is a NAN, then garbage is stored as the result (actually
| the upper 32 bits of the mantissa are sent to the integer unit). If
| the dest format is integer (b, w, l) and the operr is caused by
| integer overflow, or the source op is inf, then the result stored is
| garbage.
| There are three cases in which operr is incorrectly signaled on the 
| 040.  This occurs for move_out of format b, w, or l for the largest 
| negative integer (-2^7 for b, -2^15 for w, -2^31 for l).
|
|	  On opclass = 011 fmove.(b,w,l) that causes a conversion
|	  overflow -> OPERR, the exponent in wbte (and fpte) is:
|		byte    56 - (62 - exp)
|		word    48 - (62 - exp)
|		long    32 - (62 - exp)
|
|			where exp = (true exp) - 1
|
|  So, wbtemp and fptemp will contain the following on erroneously
|	  signalled operr:
|			fpts = 1
|			fpte = $4000  (15 bit externally)
|		byte	fptm = $ffffffff ffffff80
|		word	fptm = $ffffffff ffff8000
|		long	fptm = $ffffffff 80000000
|
| Note 2: For trap enabled 040 does the following:
| If the inst is move_out, then same as Note 1.
| If the inst is not move_out, the dest is not modified.
| The exceptional operand is not defined for integer overflow 
| during a move_out.
|

|		Copyright (C) Motorola, Inc. 1990
|			All Rights Reserved
|
|	THIS IS UNPUBLISHED PROPRIETARY SOURCE CODE OF MOTOROLA 
|	The copyright notice above does not evidence any  
|	actual or intended publication of such source code.

X_OPERR:	|idnt    2,1 | Motorola 040 Floating Point Software Package

	|section	8

	.include "fpsp.h"

	|xref	mem_write
	|xref	real_operr
	|xref	real_inex
	|xref	get_fline
	|xref	fpsp_done
	|xref	reg_dest

	.global	fpsp_operr
fpsp_operr:
|
	link		%a6,#-LOCAL_SIZE
	fsave		-(%a7)
	moveml		%d0-%d1/%a0-%a1,USER_DA(%a6)
	fmovemx	%fp0-%fp3,USER_FP0(%a6)
	fmoveml	%fpcr/%fpsr/%fpiar,USER_FPCR(%a6)

|
| Check if this is an opclass 3 instruction.
|  If so, fall through, else branch to operr_end
|
	btstb	#TFLAG,T_BYTE(%a6)
	beqs	operr_end

|
| If the destination size is B,W,or L, the operr must be 
| handled here.
|
	movel	CMDREG1B(%a6),%d0
	bfextu	%d0{#3:#3},%d0	|0=long, 4=word, 6=byte
	cmpib	#0,%d0		|determine size; check long
	beq	operr_long
	cmpib	#4,%d0		|check word
	beq	operr_word
	cmpib	#6,%d0		|check byte
	beq	operr_byte

|
| The size is not B,W,or L, so the operr is handled by the 
| kernel handler.  Set the operr bits and clean up, leaving
| only the integer exception frame on the stack, and the 
| fpu in the original exceptional state.
|
operr_end:
	bsetb		#operr_bit,FPSR_EXCEPT(%a6)
	bsetb		#aiop_bit,FPSR_AEXCEPT(%a6)

	moveml		USER_DA(%a6),%d0-%d1/%a0-%a1
	fmovemx	USER_FP0(%a6),%fp0-%fp3
	fmoveml	USER_FPCR(%a6),%fpcr/%fpsr/%fpiar
	frestore	(%a7)+
	unlk		%a6
	bral		real_operr

operr_long:
	moveql	#4,%d1		|write size to d1
	moveb	STAG(%a6),%d0	|test stag for nan
	andib	#0xe0,%d0		|clr all but tag
	cmpib	#0x60,%d0		|check for nan
	beq	operr_nan	
	cmpil	#0x80000000,FPTEMP_LO(%a6) |test if ls lword is special
	bnes	chklerr		|if not equal, check for incorrect operr
	bsr	check_upper	|check if exp and ms mant are special
	tstl	%d0
	bnes	chklerr		|if d0 is true, check for incorrect operr
	movel	#0x80000000,%d0	|store special case result
	bsr	operr_store
	bra	not_enabled	|clean and exit
|
|	CHECK FOR INCORRECTLY GENERATED OPERR EXCEPTION HERE
|
chklerr:
	movew	FPTEMP_EX(%a6),%d0
	andw	#0x7FFF,%d0	|ignore sign bit
	cmpw	#0x3FFE,%d0	|this is the only possible exponent value
	bnes	chklerr2
fixlong:
	movel	FPTEMP_LO(%a6),%d0
	bsr	operr_store
	bra	not_enabled
chklerr2:
	movew	FPTEMP_EX(%a6),%d0
	andw	#0x7FFF,%d0	|ignore sign bit
	cmpw	#0x4000,%d0
	bcc	store_max	|exponent out of range

	movel	FPTEMP_LO(%a6),%d0
	andl	#0x7FFF0000,%d0	|look for all 1's on bits 30-16
	cmpl	#0x7FFF0000,%d0
	beqs	fixlong

	tstl	FPTEMP_LO(%a6)
	bpls	chklepos
	cmpl	#0xFFFFFFFF,FPTEMP_HI(%a6)
	beqs	fixlong
	bra	store_max
chklepos:
	tstl	FPTEMP_HI(%a6)
	beqs	fixlong
	bra	store_max

operr_word:
	moveql	#2,%d1		|write size to d1
	moveb	STAG(%a6),%d0	|test stag for nan
	andib	#0xe0,%d0		|clr all but tag
	cmpib	#0x60,%d0		|check for nan
	beq	operr_nan	
	cmpil	#0xffff8000,FPTEMP_LO(%a6) |test if ls lword is special
	bnes	chkwerr		|if not equal, check for incorrect operr
	bsr	check_upper	|check if exp and ms mant are special
	tstl	%d0
	bnes	chkwerr		|if d0 is true, check for incorrect operr
	movel	#0x80000000,%d0	|store special case result
	bsr	operr_store
	bra	not_enabled	|clean and exit
|
|	CHECK FOR INCORRECTLY GENERATED OPERR EXCEPTION HERE
|
chkwerr:
	movew	FPTEMP_EX(%a6),%d0
	andw	#0x7FFF,%d0	|ignore sign bit
	cmpw	#0x3FFE,%d0	|this is the only possible exponent value
	bnes	store_max
	movel	FPTEMP_LO(%a6),%d0
	swap	%d0
	bsr	operr_store
	bra	not_enabled

operr_byte:
	moveql	#1,%d1		|write size to d1
	moveb	STAG(%a6),%d0	|test stag for nan
	andib	#0xe0,%d0		|clr all but tag
	cmpib	#0x60,%d0		|check for nan
	beqs	operr_nan	
	cmpil	#0xffffff80,FPTEMP_LO(%a6) |test if ls lword is special
	bnes	chkberr		|if not equal, check for incorrect operr
	bsr	check_upper	|check if exp and ms mant are special
	tstl	%d0
	bnes	chkberr		|if d0 is true, check for incorrect operr
	movel	#0x80000000,%d0	|store special case result
	bsr	operr_store
	bra	not_enabled	|clean and exit
|
|	CHECK FOR INCORRECTLY GENERATED OPERR EXCEPTION HERE
|
chkberr:
	movew	FPTEMP_EX(%a6),%d0
	andw	#0x7FFF,%d0	|ignore sign bit
	cmpw	#0x3FFE,%d0	|this is the only possible exponent value
	bnes	store_max
	movel	FPTEMP_LO(%a6),%d0
	asll	#8,%d0
	swap	%d0
	bsr	operr_store
	bra	not_enabled

|
| This operr condition is not of the special case.  Set operr
| and aiop and write the portion of the nan to memory for the
| given size.
|
operr_nan:
	orl	#opaop_mask,USER_FPSR(%a6) |set operr & aiop

	movel	ETEMP_HI(%a6),%d0	|output will be from upper 32 bits
	bsr	operr_store
	bra	end_operr
|
| Store_max loads the max pos or negative for the size, sets
| the operr and aiop bits, and clears inex and ainex, incorrectly
| set by the 040.
|
store_max:
	orl	#opaop_mask,USER_FPSR(%a6) |set operr & aiop
	bclrb	#inex2_bit,FPSR_EXCEPT(%a6)
	bclrb	#ainex_bit,FPSR_AEXCEPT(%a6)
	fmovel	#0,%FPSR
	
	tstw	FPTEMP_EX(%a6)	|check sign
	blts	load_neg
	movel	#0x7fffffff,%d0
	bsr	operr_store
	bra	end_operr
load_neg:
	movel	#0x80000000,%d0
	bsr	operr_store
	bra	end_operr

|
| This routine stores the data in d0, for the given size in d1,
| to memory or data register as required.  A read of the fline
| is required to determine the destination.
|
operr_store:
	movel	%d0,L_SCR1(%a6)	|move write data to L_SCR1
	movel	%d1,-(%a7)	|save register size
	bsrl	get_fline	|fline returned in d0
	movel	(%a7)+,%d1
	bftst	%d0{#26:#3}		|if mode is zero, dest is Dn
	bnes	dest_mem
|
| Destination is Dn.  Get register number from d0. Data is on
| the stack at (a7). D1 has size: 1=byte,2=word,4=long/single
|
	andil	#7,%d0		|isolate register number
	cmpil	#4,%d1
	beqs	op_long		|the most frequent case
	cmpil	#2,%d1
	bnes	op_con
	orl	#8,%d0
	bras	op_con
op_long:
	orl	#0x10,%d0
op_con:
	movel	%d0,%d1		|format size:reg for reg_dest
	bral	reg_dest	|call to reg_dest returns to caller
|				;of operr_store
|
| Destination is memory.  Get <ea> from integer exception frame
| and call mem_write.
|
dest_mem:
	leal	L_SCR1(%a6),%a0	|put ptr to write data in a0
	movel	EXC_EA(%a6),%a1	|put user destination address in a1
	movel	%d1,%d0		|put size in d0
	bsrl	mem_write
	rts
|
| Check the exponent for $c000 and the upper 32 bits of the 
| mantissa for $ffffffff.  If both are true, return d0 clr
| and store the lower n bits of the least lword of FPTEMP
| to d0 for write out.  If not, it is a real operr, and set d0.
|
check_upper:
	cmpil	#0xffffffff,FPTEMP_HI(%a6) |check if first byte is all 1's
	bnes	true_operr	|if not all 1's then was true operr
	cmpiw	#0xc000,FPTEMP_EX(%a6) |check if incorrectly signalled
	beqs	not_true_operr	|branch if not true operr
	cmpiw	#0xbfff,FPTEMP_EX(%a6) |check if incorrectly signalled
	beqs	not_true_operr	|branch if not true operr
true_operr:
	movel	#1,%d0		|signal real operr
	rts
not_true_operr:
	clrl	%d0		|signal no real operr
	rts

|
| End_operr tests for operr enabled.  If not, it cleans up the stack
| and does an rte.  If enabled, it cleans up the stack and branches
| to the kernel operr handler with only the integer exception
| frame on the stack and the fpu in the original exceptional state
| with correct data written to the destination.
|
end_operr:
	btstb		#operr_bit,FPCR_ENABLE(%a6)
	beqs		not_enabled
enabled:
	moveml		USER_DA(%a6),%d0-%d1/%a0-%a1
	fmovemx	USER_FP0(%a6),%fp0-%fp3
	fmoveml	USER_FPCR(%a6),%fpcr/%fpsr/%fpiar
	frestore	(%a7)+
	unlk		%a6
	bral		real_operr

not_enabled:
|
| It is possible to have either inex2 or inex1 exceptions with the
| operr.  If the inex enable bit is set in the FPCR, and either
| inex2 or inex1 occurred, we must clean up and branch to the
| real inex handler.
|
ck_inex:
	moveb	FPCR_ENABLE(%a6),%d0
	andb	FPSR_EXCEPT(%a6),%d0
	andib	#0x3,%d0
	beq	operr_exit
|
| Inexact enabled and reported, and we must take an inexact exception.
|
take_inex:
	moveb		#INEX_VEC,EXC_VEC+1(%a6)
	movel		USER_FPSR(%a6),FPSR_SHADOW(%a6)
	orl		#sx_mask,E_BYTE(%a6)
	moveml		USER_DA(%a6),%d0-%d1/%a0-%a1
	fmovemx	USER_FP0(%a6),%fp0-%fp3
	fmoveml	USER_FPCR(%a6),%fpcr/%fpsr/%fpiar
	frestore	(%a7)+
	unlk		%a6
	bral		real_inex
|
| Since operr is only an E1 exception, there is no need to frestore
| any state back to the fpu.
|
operr_exit:
	moveml		USER_DA(%a6),%d0-%d1/%a0-%a1
	fmovemx	USER_FP0(%a6),%fp0-%fp3
	fmoveml	USER_FPCR(%a6),%fpcr/%fpsr/%fpiar
	unlk		%a6
	bral		fpsp_done

	|end
|
|	x_ovfl.sa 3.5 7/1/91
|
|	fpsp_ovfl --- FPSP handler for overflow exception
|
|	Overflow occurs when a floating-point intermediate result is
|	too large to be represented in a floating-point data register,
|	or when storing to memory, the contents of a floating-point
|	data register are too large to be represented in the
|	destination format.
|		
| Trap disabled results
|
| If the instruction is move_out, then garbage is stored in the
| destination.  If the instruction is not move_out, then the
| destination is not affected.  For 68881 compatibility, the
| following values should be stored at the destination, based
| on the current rounding mode:
|
|  RN	Infinity with the sign of the intermediate result.
|  RZ	Largest magnitude number, with the sign of the
|	intermediate result.
|  RM   For pos overflow, the largest pos number. For neg overflow,
|	-infinity
|  RP   For pos overflow, +infinity. For neg overflow, the largest
|	neg number
|
| Trap enabled results
| All trap disabled code applies.  In addition the exceptional
| operand needs to be made available to the users exception handler
| with a bias of $6000 subtracted from the exponent.
|
|

|		Copyright (C) Motorola, Inc. 1990
|			All Rights Reserved
|
|	THIS IS UNPUBLISHED PROPRIETARY SOURCE CODE OF MOTOROLA 
|	The copyright notice above does not evidence any  
|	actual or intended publication of such source code.

X_OVFL:	|idnt    2,1 | Motorola 040 Floating Point Software Package

	|section	8

	.include "fpsp.h"

	|xref	ovf_r_x2
	|xref	ovf_r_x3
	|xref	store
	|xref	real_ovfl
	|xref	real_inex
	|xref	fpsp_done
	|xref	g_opcls
	|xref	b1238_fix

	.global	fpsp_ovfl
fpsp_ovfl:
	link		%a6,#-LOCAL_SIZE
	fsave		-(%a7)
	moveml		%d0-%d1/%a0-%a1,USER_DA(%a6)
	fmovemx	%fp0-%fp3,USER_FP0(%a6)
	fmoveml	%fpcr/%fpsr/%fpiar,USER_FPCR(%a6)

|
|	The 040 doesn't set the AINEX bit in the FPSR, the following
|	line temporarily rectifies this error.
|
	bsetb	#ainex_bit,FPSR_AEXCEPT(%a6)
|
	bsrl	ovf_adj		|denormalize, round & store interm op
|
|	if overflow traps not enabled check for inexact exception
|
	btstb	#ovfl_bit,FPCR_ENABLE(%a6)
	beqs	ck_inex	
|
	btstb		#E3,E_BYTE(%a6)
	beqs		no_e3_1
	bfextu		CMDREG3B(%a6){#6:#3},%d0	|get dest reg no
	bclrb		%d0,FPR_DIRTY_BITS(%a6)	|clr dest dirty bit
	bsrl		b1238_fix
	movel		USER_FPSR(%a6),FPSR_SHADOW(%a6)
	orl		#sx_mask,E_BYTE(%a6)
no_e3_1:
	moveml		USER_DA(%a6),%d0-%d1/%a0-%a1
	fmovemx	USER_FP0(%a6),%fp0-%fp3
	fmoveml	USER_FPCR(%a6),%fpcr/%fpsr/%fpiar
	frestore	(%a7)+
	unlk		%a6
	bral		real_ovfl
|
| It is possible to have either inex2 or inex1 exceptions with the
| ovfl.  If the inex enable bit is set in the FPCR, and either
| inex2 or inex1 occurred, we must clean up and branch to the
| real inex handler.
|
ck_inex:
|	move.b		FPCR_ENABLE(%a6),%d0
|	and.b		FPSR_EXCEPT(%a6),%d0
|	andi.b		#$3,%d0
	btstb		#inex2_bit,FPCR_ENABLE(%a6)
	beqs		ovfl_exit
|
| Inexact enabled and reported, and we must take an inexact exception.
|
take_inex:
	btstb		#E3,E_BYTE(%a6)
	beqs		no_e3_2
	bfextu		CMDREG3B(%a6){#6:#3},%d0	|get dest reg no
	bclrb		%d0,FPR_DIRTY_BITS(%a6)	|clr dest dirty bit
	bsrl		b1238_fix
	movel		USER_FPSR(%a6),FPSR_SHADOW(%a6)
	orl		#sx_mask,E_BYTE(%a6)
no_e3_2:
	moveb		#INEX_VEC,EXC_VEC+1(%a6)
	moveml		USER_DA(%a6),%d0-%d1/%a0-%a1
	fmovemx	USER_FP0(%a6),%fp0-%fp3
	fmoveml	USER_FPCR(%a6),%fpcr/%fpsr/%fpiar
	frestore	(%a7)+
	unlk		%a6
	bral		real_inex
	
ovfl_exit:
	bclrb	#E3,E_BYTE(%a6)	|test and clear E3 bit
	beqs	e1_set
|
| Clear dirty bit on dest resister in the frame before branching
| to b1238_fix.
|
	bfextu		CMDREG3B(%a6){#6:#3},%d0	|get dest reg no
	bclrb		%d0,FPR_DIRTY_BITS(%a6)	|clr dest dirty bit
	bsrl		b1238_fix		|test for bug1238 case

	movel		USER_FPSR(%a6),FPSR_SHADOW(%a6)
	orl		#sx_mask,E_BYTE(%a6)
	moveml		USER_DA(%a6),%d0-%d1/%a0-%a1
	fmovemx	USER_FP0(%a6),%fp0-%fp3
	fmoveml	USER_FPCR(%a6),%fpcr/%fpsr/%fpiar
	frestore	(%a7)+
	unlk		%a6
	bral		fpsp_done
e1_set:
	moveml		USER_DA(%a6),%d0-%d1/%a0-%a1
	fmovemx	USER_FP0(%a6),%fp0-%fp3
	fmoveml	USER_FPCR(%a6),%fpcr/%fpsr/%fpiar
	unlk		%a6
	bral		fpsp_done

|
|	ovf_adj
|
ovf_adj:
|
| Have a0 point to the correct operand. 
|
	btstb	#E3,E_BYTE(%a6)	|test E3 bit
	beqs	ovf_e1

	lea	WBTEMP(%a6),%a0
	bras	ovf_com
ovf_e1:
	lea	ETEMP(%a6),%a0

ovf_com:
	bclrb	#sign_bit,LOCAL_EX(%a0)
	sne	LOCAL_SGN(%a0)

	bsrl	g_opcls		|returns opclass in d0
	cmpiw	#3,%d0		|check for opclass3
	bnes	not_opc011

|
| FPSR_CC is saved and restored because ovf_r_x3 affects it. The
| CCs are defined to be 'not affected' for the opclass3 instruction.
|
	moveb	FPSR_CC(%a6),L_SCR1(%a6)
 	bsrl	ovf_r_x3	|returns a0 pointing to result
	moveb	L_SCR1(%a6),FPSR_CC(%a6)
	bral	store		|stores to memory or register
	
not_opc011:
	bsrl	ovf_r_x2	|returns a0 pointing to result
	bral	store		|stores to memory or register

	|end
|
|	x_snan.sa 3.3 7/1/91
|
| fpsp_snan --- FPSP handler for signalling NAN exception
|
| SNAN for float -> integer conversions (integer conversion of
| an SNAN) is a non-maskable run-time exception.
|
| For trap disabled the 040 does the following:
| If the dest data format is s, d, or x, then the SNAN bit in the NAN
| is set to one and the resulting non-signaling NAN (truncated if
| necessary) is transferred to the dest.  If the dest format is b, w,
| or l, then garbage is written to the dest (actually the upper 32 bits
| of the mantissa are sent to the integer unit).
|
| For trap enabled the 040 does the following:
| If the inst is move_out, then the results are the same as for trap 
| disabled with the exception posted.  If the instruction is not move_
| out, the dest. is not modified, and the exception is posted.
|

|		Copyright (C) Motorola, Inc. 1990
|			All Rights Reserved
|
|	THIS IS UNPUBLISHED PROPRIETARY SOURCE CODE OF MOTOROLA 
|	The copyright notice above does not evidence any  
|	actual or intended publication of such source code.

X_SNAN:	|idnt    2,1 | Motorola 040 Floating Point Software Package

	|section	8

	.include "fpsp.h"

	|xref	get_fline
	|xref	mem_write
	|xref	real_snan
	|xref	real_inex
	|xref	fpsp_done
	|xref	reg_dest

	.global	fpsp_snan
fpsp_snan:
	link		%a6,#-LOCAL_SIZE
	fsave		-(%a7)
	moveml		%d0-%d1/%a0-%a1,USER_DA(%a6)
	fmovemx	%fp0-%fp3,USER_FP0(%a6)
	fmoveml	%fpcr/%fpsr/%fpiar,USER_FPCR(%a6)

|
| Check if trap enabled
|
	btstb		#snan_bit,FPCR_ENABLE(%a6)
	bnes		ena		|If enabled, then branch

	bsrl		move_out	|else SNAN disabled
|
| It is possible to have an inex1 exception with the
| snan.  If the inex enable bit is set in the FPCR, and either
| inex2 or inex1 occurred, we must clean up and branch to the
| real inex handler.
|
ck_inex:
	moveb	FPCR_ENABLE(%a6),%d0
	andb	FPSR_EXCEPT(%a6),%d0
	andib	#0x3,%d0
	beq	end_snan
|
| Inexact enabled and reported, and we must take an inexact exception.
|
take_inex:
	moveb		#INEX_VEC,EXC_VEC+1(%a6)
	moveml		USER_DA(%a6),%d0-%d1/%a0-%a1
	fmovemx	USER_FP0(%a6),%fp0-%fp3
	fmoveml	USER_FPCR(%a6),%fpcr/%fpsr/%fpiar
	frestore	(%a7)+
	unlk		%a6
	bral		real_inex
|
| SNAN is enabled.  Check if inst is move_out.
| Make any corrections to the 040 output as necessary.
|
ena:
	btstb		#5,CMDREG1B(%a6) |if set, inst is move out
	beq		not_out

	bsrl		move_out

report_snan:
	moveb		(%a7),VER_TMP(%a6)
	cmpib		#VER_40,(%a7)	|test for orig unimp frame
	bnes		ck_rev
	moveql		#13,%d0		|need to zero 14 lwords
	bras		rep_con
ck_rev:
	moveql		#11,%d0		|need to zero 12 lwords
rep_con:
	clrl		(%a7)
loop1:
	clrl		-(%a7)		|clear and dec a7
	dbra		%d0,loop1
	moveb		VER_TMP(%a6),(%a7) |format a busy frame
	moveb		#BUSY_SIZE-4,1(%a7)
	movel		USER_FPSR(%a6),FPSR_SHADOW(%a6)
	orl		#sx_mask,E_BYTE(%a6)
	moveml		USER_DA(%a6),%d0-%d1/%a0-%a1
	fmovemx	USER_FP0(%a6),%fp0-%fp3
	fmoveml	USER_FPCR(%a6),%fpcr/%fpsr/%fpiar
	frestore	(%a7)+
	unlk		%a6
	bral		real_snan
|
| Exit snan handler by expanding the unimp frame into a busy frame
|
end_snan:
	bclrb		#E1,E_BYTE(%a6)

	moveb		(%a7),VER_TMP(%a6)
	cmpib		#VER_40,(%a7)	|test for orig unimp frame
	bnes		ck_rev2
	moveql		#13,%d0		|need to zero 14 lwords
	bras		rep_con2
ck_rev2:
	moveql		#11,%d0		|need to zero 12 lwords
rep_con2:
	clrl		(%a7)
loop2:
	clrl		-(%a7)		|clear and dec a7
	dbra		%d0,loop2
	moveb		VER_TMP(%a6),(%a7) |format a busy frame
	moveb		#BUSY_SIZE-4,1(%a7) |write busy size
	movel		USER_FPSR(%a6),FPSR_SHADOW(%a6)
	orl		#sx_mask,E_BYTE(%a6)
	moveml		USER_DA(%a6),%d0-%d1/%a0-%a1
	fmovemx	USER_FP0(%a6),%fp0-%fp3
	fmoveml	USER_FPCR(%a6),%fpcr/%fpsr/%fpiar
	frestore	(%a7)+
	unlk		%a6
	bral		fpsp_done

|
| Move_out 
|
move_out:
	movel		EXC_EA(%a6),%a0	|get <ea> from exc frame

	bfextu		CMDREG1B(%a6){#3:#3},%d0 |move rx field to d0{2:0}
	cmpil		#0,%d0		|check for long
	beqs		sto_long	|branch if move_out long
	
	cmpil		#4,%d0		|check for word
	beqs		sto_word	|branch if move_out word
	
	cmpil		#6,%d0		|check for byte
	beqs		sto_byte	|branch if move_out byte
	
|
| Not byte, word or long
|
	rts
|	
| Get the 32 most significant bits of etemp mantissa
|
sto_long:
	movel		ETEMP_HI(%a6),%d1
	movel		#4,%d0		|load byte count
|
| Set signalling nan bit
|
	bsetl		#30,%d1			
|
| Store to the users destination address
|
	tstl		%a0		|check if <ea> is 0
	beqs		wrt_dn		|destination is a data register
	
	movel		%d1,-(%a7)	|move the snan onto the stack
	movel		%a0,%a1		|load dest addr into a1
	movel		%a7,%a0		|load src addr of snan into a0
	bsrl		mem_write	|write snan to user memory
	movel		(%a7)+,%d1	|clear off stack
	rts
|
| Get the 16 most significant bits of etemp mantissa
|
sto_word:
	movel		ETEMP_HI(%a6),%d1
	movel		#2,%d0		|load byte count
|
| Set signalling nan bit
|
	bsetl		#30,%d1			
|
| Store to the users destination address
|
	tstl		%a0		|check if <ea> is 0
	beqs		wrt_dn		|destination is a data register

	movel		%d1,-(%a7)	|move the snan onto the stack
	movel		%a0,%a1		|load dest addr into a1
	movel		%a7,%a0		|point to low word
	bsrl		mem_write	|write snan to user memory
	movel		(%a7)+,%d1	|clear off stack
	rts
|
| Get the 8 most significant bits of etemp mantissa
|
sto_byte:
	movel		ETEMP_HI(%a6),%d1
	movel		#1,%d0		|load byte count
|
| Set signalling nan bit
|
	bsetl		#30,%d1			
|
| Store to the users destination address
|
	tstl		%a0		|check if <ea> is 0
	beqs		wrt_dn		|destination is a data register
	movel		%d1,-(%a7)	|move the snan onto the stack
	movel		%a0,%a1		|load dest addr into a1
	movel		%a7,%a0		|point to source byte
	bsrl		mem_write	|write snan to user memory
	movel		(%a7)+,%d1	|clear off stack
	rts

|
|	wrt_dn --- write to a data register
|
|	We get here with D1 containing the data to write and D0 the
|	number of bytes to write: 1=byte,2=word,4=long.
|
wrt_dn:
	movel		%d1,L_SCR1(%a6)	|data
	movel		%d0,-(%a7)	|size
	bsrl		get_fline	|returns fline word in d0
	movel		%d0,%d1
	andil		#0x7,%d1		|d1 now holds register number
	movel		(%sp)+,%d0	|get original size
	cmpil		#4,%d0
	beqs		wrt_long
	cmpil		#2,%d0
	bnes		wrt_byte
wrt_word:
	orl		#0x8,%d1
	bral		reg_dest
wrt_long:
	orl		#0x10,%d1
	bral		reg_dest
wrt_byte:
	bral		reg_dest
|
| Check if it is a src nan or dst nan
|
not_out:
	movel		DTAG(%a6),%d0	
	bfextu		%d0{#0:#3},%d0	|isolate dtag in lsbs

	cmpib		#3,%d0		|check for nan in destination
	bnes		issrc		|destination nan has priority
dst_nan:
	btstb		#6,FPTEMP_HI(%a6) |check if dest nan is an snan
	bnes		issrc		|no, so check source for snan
	movew		FPTEMP_EX(%a6),%d0
	bras		cont
issrc:
	movew		ETEMP_EX(%a6),%d0
cont:
	btstl		#15,%d0		|test for sign of snan
	beqs		clr_neg
	bsetb		#neg_bit,FPSR_CC(%a6)
	bra		report_snan
clr_neg:
	bclrb		#neg_bit,FPSR_CC(%a6)
	bra		report_snan

	|end
|
|	x_store.sa 3.2 1/24/91
|
|	store --- store operand to memory or register
|
|	Used by underflow and overflow handlers.
|
|	a6 = points to fp value to be stored.
|

|		Copyright (C) Motorola, Inc. 1990
|			All Rights Reserved
|
|	THIS IS UNPUBLISHED PROPRIETARY SOURCE CODE OF MOTOROLA 
|	The copyright notice above does not evidence any  
|	actual or intended publication of such source code.

X_STORE:	|idnt    2,1 | Motorola 040 Floating Point Software Package

	|section	8

fpreg_mask:
	.byte	0x80,0x40,0x20,0x10,0x08,0x04,0x02,0x01

	.include "fpsp.h"

	|xref	mem_write
	|xref	get_fline
	|xref	g_opcls
	|xref	g_dfmtou
	|xref	reg_dest

	.global	dest_ext
	.global	dest_dbl
	.global	dest_sgl

	.global	store
store:
	btstb	#E3,E_BYTE(%a6)
	beqs	E1_sto
E3_sto:
	movel	CMDREG3B(%a6),%d0
	bfextu	%d0{#6:#3},%d0		|isolate dest. reg from cmdreg3b
sto_fp:
	lea	fpreg_mask,%a1
	moveb	(%a1,%d0.w),%d0		|convert reg# to dynamic register mask
	tstb	LOCAL_SGN(%a0)
	beqs	is_pos
	bsetb	#sign_bit,LOCAL_EX(%a0)
is_pos:
	fmovemx (%a0),%d0		|move to correct register
|
|	if fp0-fp3 is being modified, we must put a copy
|	in the USER_FPn variable on the stack because all exception
|	handlers restore fp0-fp3 from there.
|
	cmpb	#0x80,%d0		
	bnes	not_fp0
	fmovemx %fp0-%fp0,USER_FP0(%a6)
	rts
not_fp0:
	cmpb	#0x40,%d0
	bnes	not_fp1
	fmovemx %fp1-%fp1,USER_FP1(%a6)
	rts
not_fp1:
	cmpb	#0x20,%d0
	bnes	not_fp2
	fmovemx %fp2-%fp2,USER_FP2(%a6)
	rts
not_fp2:
	cmpb	#0x10,%d0
	bnes	not_fp3
	fmovemx %fp3-%fp3,USER_FP3(%a6)
	rts
not_fp3:
	rts

E1_sto:
	bsrl	g_opcls		|returns opclass in d0
	cmpib	#3,%d0
	beq	opc011		|branch if opclass 3
	movel	CMDREG1B(%a6),%d0
	bfextu	%d0{#6:#3},%d0	|extract destination register
	bras	sto_fp

opc011:
	bsrl	g_dfmtou	|returns dest format in d0
|				;ext=00, sgl=01, dbl=10
	movel	%a0,%a1		|save source addr in a1
	movel	EXC_EA(%a6),%a0	|get the address
	cmpil	#0,%d0		|if dest format is extended
	beq	dest_ext	|then branch
	cmpil	#1,%d0		|if dest format is single
	beq	dest_sgl	|then branch
|
|	fall through to dest_dbl
|

|
|	dest_dbl --- write double precision value to user space
|
|Input
|	a0 -> destination address
|	a1 -> source in extended precision
|Output
|	a0 -> destroyed
|	a1 -> destroyed
|	d0 -> 0
|
|Changes extended precision to double precision.
| Note: no attempt is made to round the extended value to double.
|	dbl_sign = ext_sign
|	dbl_exp = ext_exp - $3fff(ext bias) + $7ff(dbl bias)
|	get rid of ext integer bit
|	dbl_mant = ext_mant{62:12}
|
|	    	---------------   ---------------    ---------------
|  extended ->  |s|    exp    |   |1| ms mant   |    | ls mant     |
|	    	---------------   ---------------    ---------------
|	   	 95	    64    63 62	      32      31     11	  0
|				     |			     |
|				     |			     |
|				     |			     |
|		 	             v   		     v
|	    		      ---------------   ---------------
|  double   ->  	      |s|exp| mant  |   |  mant       |
|	    		      ---------------   ---------------
|	   	 	      63     51   32   31	       0
|
dest_dbl:
	clrl	%d0		|clear d0
	movew	LOCAL_EX(%a1),%d0	|get exponent
	subw	#0x3fff,%d0	|subtract extended precision bias
	cmpw	#0x4000,%d0	|check if inf
	beqs	inf		|if so, special case
	addw	#0x3ff,%d0	|add double precision bias
	swap	%d0		|d0 now in upper word
	lsll	#4,%d0		|d0 now in proper place for dbl prec exp
	tstb	LOCAL_SGN(%a1)	
	beqs	get_mant	|if positive, go process mantissa
	bsetl	#31,%d0		|if negative, put in sign information
|				; before continuing
	bras	get_mant	|go process mantissa
inf:
	movel	#0x7ff00000,%d0	|load dbl inf exponent
	clrl	LOCAL_HI(%a1)	|clear msb
	tstb	LOCAL_SGN(%a1)
	beqs	dbl_inf		|if positive, go ahead and write it
	bsetl	#31,%d0		|if negative put in sign information
dbl_inf:
	movel	%d0,LOCAL_EX(%a1)	|put the new exp back on the stack
	bras	dbl_wrt
get_mant:
	movel	LOCAL_HI(%a1),%d1	|get ms mantissa
	bfextu	%d1{#1:#20},%d1	|get upper 20 bits of ms
	orl	%d1,%d0		|put these bits in ms word of double
	movel	%d0,LOCAL_EX(%a1)	|put the new exp back on the stack
	movel	LOCAL_HI(%a1),%d1	|get ms mantissa
	movel	#21,%d0		|load shift count
	lsll	%d0,%d1		|put lower 11 bits in upper bits
	movel	%d1,LOCAL_HI(%a1)	|build lower lword in memory
	movel	LOCAL_LO(%a1),%d1	|get ls mantissa
	bfextu	%d1{#0:#21},%d0	|get ls 21 bits of double
	orl	%d0,LOCAL_HI(%a1)	|put them in double result
dbl_wrt:
	movel	#0x8,%d0		|byte count for double precision number
	exg	%a0,%a1		|a0=supervisor source, a1=user dest
	bsrl	mem_write	|move the number to the user's memory
	rts
|
|	dest_sgl --- write single precision value to user space
|
|Input
|	a0 -> destination address
|	a1 -> source in extended precision
|
|Output
|	a0 -> destroyed
|	a1 -> destroyed
|	d0 -> 0
|
|Changes extended precision to single precision.
|	sgl_sign = ext_sign
|	sgl_exp = ext_exp - $3fff(ext bias) + $7f(sgl bias)
|	get rid of ext integer bit
|	sgl_mant = ext_mant{62:12}
|
|	    	---------------   ---------------    ---------------
|  extended ->  |s|    exp    |   |1| ms mant   |    | ls mant     |
|	    	---------------   ---------------    ---------------
|	   	 95	    64    63 62	   40 32      31     12	  0
|				     |	   |
|				     |	   |
|				     |	   |
|		 	             v     v
|	    		      ---------------
|  single   ->  	      |s|exp| mant  |
|	    		      ---------------
|	   	 	      31     22     0
|
dest_sgl:
	clrl	%d0
	movew	LOCAL_EX(%a1),%d0	|get exponent
	subw	#0x3fff,%d0	|subtract extended precision bias
	cmpw	#0x4000,%d0	|check if inf
	beqs	sinf		|if so, special case
	addw	#0x7f,%d0		|add single precision bias
	swap	%d0		|put exp in upper word of d0
	lsll	#7,%d0		|shift it into single exp bits
	tstb	LOCAL_SGN(%a1)	
	beqs	get_sman	|if positive, continue
	bsetl	#31,%d0		|if negative, put in sign first
	bras	get_sman	|get mantissa
sinf:
	movel	#0x7f800000,%d0	|load single inf exp to d0
	tstb	LOCAL_SGN(%a1)
	beqs	sgl_wrt		|if positive, continue
	bsetl	#31,%d0		|if negative, put in sign info
	bras	sgl_wrt

get_sman:
	movel	LOCAL_HI(%a1),%d1	|get ms mantissa
	bfextu	%d1{#1:#23},%d1	|get upper 23 bits of ms
	orl	%d1,%d0		|put these bits in ms word of single

sgl_wrt:
	movel	%d0,L_SCR1(%a6)	|put the new exp back on the stack
	movel	#0x4,%d0		|byte count for single precision number
	tstl	%a0		|users destination address
	beqs	sgl_Dn		|destination is a data register
	exg	%a0,%a1		|a0=supervisor source, a1=user dest
	leal	L_SCR1(%a6),%a0	|point a0 to data
	bsrl	mem_write	|move the number to the user's memory
	rts
sgl_Dn:
	bsrl	get_fline	|returns fline word in d0
	andw	#0x7,%d0		|isolate register number
	movel	%d0,%d1		|d1 has size:reg formatted for reg_dest
	orl	#0x10,%d1		|reg_dest wants size added to reg#
	bral	reg_dest	|size is X, rts in reg_dest will
|				;return to caller of dest_sgl
	
dest_ext:
	tstb	LOCAL_SGN(%a1)	|put back sign into exponent word
	beqs	dstx_cont
	bsetb	#sign_bit,LOCAL_EX(%a1)
dstx_cont:
	clrb	LOCAL_SGN(%a1)	|clear out the sign byte

	movel	#0x0c,%d0		|byte count for extended number
	exg	%a0,%a1		|a0=supervisor source, a1=user dest
	bsrl	mem_write	|move the number to the user's memory
	rts

	|end
|
|	x_unfl.sa 3.4 7/1/91
|
|	fpsp_unfl --- FPSP handler for underflow exception
|
| Trap disabled results
|	For 881/2 compatibility, sw must denormalize the intermediate 
| result, then store the result.  Denormalization is accomplished 
| by taking the intermediate result (which is always normalized) and 
| shifting the mantissa right while incrementing the exponent until 
| it is equal to the denormalized exponent for the destination 
| format.  After denormalization, the result is rounded to the 
| destination format.
|		
| Trap enabled results
| 	All trap disabled code applies.	In addition the exceptional 
| operand needs to made available to the user with a bias of $6000 
| added to the exponent.
|

|		Copyright (C) Motorola, Inc. 1990
|			All Rights Reserved
|
|	THIS IS UNPUBLISHED PROPRIETARY SOURCE CODE OF MOTOROLA 
|	The copyright notice above does not evidence any  
|	actual or intended publication of such source code.

X_UNFL:	|idnt    2,1 | Motorola 040 Floating Point Software Package

	|section	8

	.include "fpsp.h"

	|xref	denorm
	|xref	round
	|xref	store
	|xref	g_rndpr
	|xref	g_opcls
	|xref	g_dfmtou
	|xref	real_unfl
	|xref	real_inex
	|xref	fpsp_done
	|xref	b1238_fix

	.global	fpsp_unfl
fpsp_unfl:
	link		%a6,#-LOCAL_SIZE
	fsave		-(%a7)
	moveml		%d0-%d1/%a0-%a1,USER_DA(%a6)
	fmovemx	%fp0-%fp3,USER_FP0(%a6)
	fmoveml	%fpcr/%fpsr/%fpiar,USER_FPCR(%a6)

|
	bsrl		unf_res	|denormalize, round & store interm op
|
| If underflow exceptions are not enabled, check for inexact
| exception
|
	btstb		#unfl_bit,FPCR_ENABLE(%a6)
	beqs		ck_inex

	btstb		#E3,E_BYTE(%a6)
	beqs		no_e3_1
|
| Clear dirty bit on dest resister in the frame before branching
| to b1238_fix.
|
	bfextu		CMDREG3B(%a6){#6:#3},%d0	|get dest reg no
	bclrb		%d0,FPR_DIRTY_BITS(%a6)	|clr dest dirty bit
	bsrl		b1238_fix		|test for bug1238 case
	movel		USER_FPSR(%a6),FPSR_SHADOW(%a6)
	orl		#sx_mask,E_BYTE(%a6)
no_e3_1:
	moveml		USER_DA(%a6),%d0-%d1/%a0-%a1
	fmovemx	USER_FP0(%a6),%fp0-%fp3
	fmoveml	USER_FPCR(%a6),%fpcr/%fpsr/%fpiar
	frestore	(%a7)+
	unlk		%a6
	bral		real_unfl
|
| It is possible to have either inex2 or inex1 exceptions with the
| unfl.  If the inex enable bit is set in the FPCR, and either
| inex2 or inex1 occurred, we must clean up and branch to the
| real inex handler.
|
ck_inex:
	moveb		FPCR_ENABLE(%a6),%d0
	andb		FPSR_EXCEPT(%a6),%d0
	andib		#0x3,%d0
	beqs		unfl_done

|
| Inexact enabled and reported, and we must take an inexact exception
|	
take_inex:
	btstb		#E3,E_BYTE(%a6)
	beqs		no_e3_2
|
| Clear dirty bit on dest resister in the frame before branching
| to b1238_fix.
|
	bfextu		CMDREG3B(%a6){#6:#3},%d0	|get dest reg no
	bclrb		%d0,FPR_DIRTY_BITS(%a6)	|clr dest dirty bit
	bsrl		b1238_fix		|test for bug1238 case
	movel		USER_FPSR(%a6),FPSR_SHADOW(%a6)
	orl		#sx_mask,E_BYTE(%a6)
no_e3_2:
	moveb		#INEX_VEC,EXC_VEC+1(%a6)
	moveml         USER_DA(%a6),%d0-%d1/%a0-%a1
	fmovemx        USER_FP0(%a6),%fp0-%fp3
	fmoveml        USER_FPCR(%a6),%fpcr/%fpsr/%fpiar
	frestore        (%a7)+
	unlk            %a6
	bral		real_inex

unfl_done:
	bclrb		#E3,E_BYTE(%a6)
	beqs		e1_set		|if set then branch
|
| Clear dirty bit on dest resister in the frame before branching
| to b1238_fix.
|
	bfextu		CMDREG3B(%a6){#6:#3},%d0		|get dest reg no
	bclrb		%d0,FPR_DIRTY_BITS(%a6)	|clr dest dirty bit
	bsrl		b1238_fix		|test for bug1238 case
	movel		USER_FPSR(%a6),FPSR_SHADOW(%a6)
	orl		#sx_mask,E_BYTE(%a6)
	moveml		USER_DA(%a6),%d0-%d1/%a0-%a1
	fmovemx	USER_FP0(%a6),%fp0-%fp3
	fmoveml	USER_FPCR(%a6),%fpcr/%fpsr/%fpiar
	frestore	(%a7)+
	unlk		%a6
	bral		fpsp_done
e1_set:
	moveml		USER_DA(%a6),%d0-%d1/%a0-%a1
	fmovemx	USER_FP0(%a6),%fp0-%fp3
	fmoveml	USER_FPCR(%a6),%fpcr/%fpsr/%fpiar
	unlk		%a6
	bral		fpsp_done
|
|	unf_res --- underflow result calculation
|
unf_res:
	bsrl		g_rndpr		|returns RND_PREC in d0 0=ext,
|					;1=sgl, 2=dbl
|					;we need the RND_PREC in the
|					;upper word for round
	movew		#0,-(%a7)	
	movew		%d0,-(%a7)	|copy RND_PREC to stack
|
|
| If the exception bit set is E3, the exceptional operand from the
| fpu is in WBTEMP; else it is in FPTEMP.
|
	btstb		#E3,E_BYTE(%a6)
	beqs		unf_E1
unf_E3:
	lea		WBTEMP(%a6),%a0	|a0 now points to operand
|
| Test for fsgldiv and fsglmul.  If the inst was one of these, then
| force the precision to extended for the denorm routine.  Use
| the user's precision for the round routine.
|
	movew		CMDREG3B(%a6),%d1	|check for fsgldiv or fsglmul
	andiw		#0x7f,%d1
	cmpiw		#0x30,%d1		|check for sgldiv
	beqs		unf_sgl
	cmpiw		#0x33,%d1		|check for sglmul
	bnes		unf_cont	|if not, use fpcr prec in round
unf_sgl:
	clrl		%d0
	movew		#0x1,(%a7)	|override g_rndpr precision
|					;force single
	bras		unf_cont
unf_E1:
	lea		FPTEMP(%a6),%a0	|a0 now points to operand
unf_cont:
	bclrb		#sign_bit,LOCAL_EX(%a0)	|clear sign bit
	sne		LOCAL_SGN(%a0)		|store sign

	bsrl		denorm		|returns denorm, a0 points to it
|
| WARNING:
|				;d0 has guard,round sticky bit
|				;make sure that it is not corrupted
|				;before it reaches the round subroutine
|				;also ensure that a0 isn't corrupted

|
| Set up d1 for round subroutine d1 contains the PREC/MODE
| information respectively on upper/lower register halves.
|
	bfextu		FPCR_MODE(%a6){#2:#2},%d1	|get mode from FPCR
|						;mode in lower d1
	addl		(%a7)+,%d1		|merge PREC/MODE
|
| WARNING: a0 and d0 are assumed to be intact between the denorm and
| round subroutines. All code between these two subroutines
| must not corrupt a0 and d0.
|
|
| Perform Round	
|	Input:		a0 points to input operand
|			d0{31:29} has guard, round, sticky
|			d1{01:00} has rounding mode
|			d1{17:16} has rounding precision
|	Output:		a0 points to rounded operand
|

	bsrl		round		|returns rounded denorm at (a0)
|
| Differentiate between store to memory vs. store to register
|
unf_store:
	bsrl		g_opcls		|returns opclass in d0{2:0}
	cmpib		#0x3,%d0
	bnes		not_opc011
|
| At this point, a store to memory is pending
|
opc011:
	bsrl		g_dfmtou
	tstb		%d0
	beqs		ext_opc011	|If extended, do not subtract
| 				;If destination format is sgl/dbl, 
	tstb		LOCAL_HI(%a0)	|If rounded result is normal,don't
|					;subtract
	bmis		ext_opc011
	subqw		#1,LOCAL_EX(%a0)	|account for denorm bias vs.
|				;normalized bias
|				;          normalized   denormalized
|				;single       $7f           $7e
|				;double       $3ff          $3fe
|
ext_opc011:
	bsrl		store		|stores to memory
	bras		unf_done	|finish up

|
| At this point, a store to a float register is pending
|
not_opc011:
	bsrl		store	|stores to float register
|				;a0 is not corrupted on a store to a
|				;float register.
|
| Set the condition codes according to result
|
	tstl		LOCAL_HI(%a0)	|check upper mantissa
	bnes		ck_sgn
	tstl		LOCAL_LO(%a0)	|check lower mantissa
	bnes		ck_sgn
	bsetb		#z_bit,FPSR_CC(%a6) |set condition codes if zero
ck_sgn:
	btstb 		#sign_bit,LOCAL_EX(%a0)	|check the sign bit
	beqs		unf_done
	bsetb		#neg_bit,FPSR_CC(%a6)

|
| Finish.  
|
unf_done:
	btstb		#inex2_bit,FPSR_EXCEPT(%a6)
	beqs		no_aunfl
	bsetb		#aunfl_bit,FPSR_AEXCEPT(%a6)
no_aunfl:
	rts

	|end
|
|	x_unimp.sa 3.3 7/1/91
|
|	fpsp_unimp --- FPSP handler for unimplemented instruction	
|	exception.
|
| Invoked when the user program encounters a floating-point
| op-code that hardware does not support.  Trap vector# 11
| (See table 8-1 MC68030 User's Manual).
|
| 
| Note: An fsave for an unimplemented inst. will create a short
| fsave stack.
|
|  Input: 1. Six word stack frame for unimplemented inst, four word
|            for illegal
|            (See table 8-7 MC68030 User's Manual).
|         2. Unimp (short) fsave state frame created here by fsave
|            instruction.
|
|
|		Copyright (C) Motorola, Inc. 1990
|			All Rights Reserved
|
|	THIS IS UNPUBLISHED PROPRIETARY SOURCE CODE OF MOTOROLA 
|	The copyright notice above does not evidence any  
|	actual or intended publication of such source code.

X_UNIMP:	|idnt    2,1 | Motorola 040 Floating Point Software Package

	|section	8

	.include "fpsp.h"

	|xref	get_op
	|xref	do_func
	|xref	sto_res
	|xref	gen_except
	|xref	fpsp_fmt_error

	.global	fpsp_unimp
	.global	uni_2
fpsp_unimp:
	link		%a6,#-LOCAL_SIZE
	fsave		-(%a7)
uni_2:
	moveml		%d0-%d1/%a0-%a1,USER_DA(%a6)
	fmovemx	%fp0-%fp3,USER_FP0(%a6)
	fmoveml	%fpcr/%fpsr/%fpiar,USER_FPCR(%a6)
	moveb		(%a7),%d0		|test for valid version num
	andib		#0xf0,%d0		|test for $4x
	cmpib		#VER_4,%d0	|must be $4x or exit
	bnel		fpsp_fmt_error
|
|	Temporary D25B Fix
|	The following lines are used to ensure that the FPSR
|	exception byte and condition codes are clear before proceeding
|
	movel		USER_FPSR(%a6),%d0
	andl		#0xFF00FF,%d0	|clear all but accrued exceptions
	movel		%d0,USER_FPSR(%a6)
	fmovel		#0,%FPSR |clear all user bits
	fmovel		#0,%FPCR	|clear all user exceptions for FPSP

	clrb		UFLG_TMP(%a6)	|clr flag for unsupp data

	bsrl		get_op		|go get operand(s)
	clrb		STORE_FLG(%a6)
	bsrl		do_func		|do the function
	fsave		-(%a7)		|capture possible exc state
	tstb		STORE_FLG(%a6)
	bnes		no_store	|if STORE_FLG is set, no store
	bsrl		sto_res		|store the result in user space
no_store:
	bral		gen_except	|post any exceptions and return

	|end
|
|	x_unsupp.sa 3.3 7/1/91
|
|	fpsp_unsupp --- FPSP handler for unsupported data type exception
|
| Trap vector #55	(See table 8-1 Mc68030 User's manual).	
| Invoked when the user program encounters a data format (packed) that
| hardware does not support or a data type (denormalized numbers or un-
| normalized numbers).
| Normalizes denorms and unnorms, unpacks packed numbers then stores 
| them back into the machine to let the 040 finish the operation.  
|
| Unsupp calls two routines:
| 	1. get_op -  gets the operand(s)
| 	2. res_func - restore the function back into the 040 or
| 			if fmove.p fpm,<ea> then pack source (fpm)
| 			and store in users memory <ea>.
|
|  Input: Long fsave stack frame
|
|

|		Copyright (C) Motorola, Inc. 1990
|			All Rights Reserved
|
|	THIS IS UNPUBLISHED PROPRIETARY SOURCE CODE OF MOTOROLA 
|	The copyright notice above does not evidence any  
|	actual or intended publication of such source code.

X_UNSUPP:	|idnt    2,1 | Motorola 040 Floating Point Software Package

	|section	8

	.include "fpsp.h"

	|xref	get_op
	|xref	res_func
	|xref	gen_except
	|xref	fpsp_fmt_error

	.global	fpsp_unsupp
fpsp_unsupp:
|
	link		%a6,#-LOCAL_SIZE
	fsave		-(%a7)
	moveml		%d0-%d1/%a0-%a1,USER_DA(%a6)
	fmovemx	%fp0-%fp3,USER_FP0(%a6)
	fmoveml	%fpcr/%fpsr/%fpiar,USER_FPCR(%a6)


	moveb		(%a7),VER_TMP(%a6) |save version number
	moveb		(%a7),%d0		|test for valid version num
	andib		#0xf0,%d0		|test for $4x
	cmpib		#VER_4,%d0	|must be $4x or exit
	bnel		fpsp_fmt_error

	fmovel		#0,%FPSR		|clear all user status bits
	fmovel		#0,%FPCR		|clear all user control bits
|
|	The following lines are used to ensure that the FPSR
|	exception byte and condition codes are clear before proceeding,
|	except in the case of fmove, which leaves the cc's intact.
|
unsupp_con:
	movel		USER_FPSR(%a6),%d1
	btst		#5,CMDREG1B(%a6)	|looking for fmove out
	bne		fmove_con
	andl		#0xFF00FF,%d1	|clear all but aexcs and qbyte
	bras		end_fix
fmove_con:
	andl		#0x0FFF40FF,%d1	|clear all but cc's, snan bit, aexcs, and qbyte
end_fix:
	movel		%d1,USER_FPSR(%a6)

	st		UFLG_TMP(%a6)	|set flag for unsupp data

	bsrl		get_op		|everything okay, go get operand(s)
	bsrl		res_func	|fix up stack frame so can restore it
	clrl		-(%a7)
	moveb		VER_TMP(%a6),(%a7) |move idle fmt word to top of stack
	bral		gen_except
|
	|end

MOTOROLA MICROPROCESSOR & MEMORY TECHNOLOGY GROUP
M68000 Hi-Performance Microprocessor Division
M68040 Software Package

M68040 Software Package Copyright (c) 1993, 1994 Motorola Inc.
All rights reserved.

THE SOFTWARE is provided on an "AS IS" basis and without warranty.
To the maximum extent permitted by applicable law,
MOTOROLA DISCLAIMS ALL WARRANTIES WHETHER EXPRESS OR IMPLIED,
INCLUDING IMPLIED WARRANTIES OF MERCHANTABILITY OR FITNESS FOR A
PARTICULAR PURPOSE and any warranty against infringement with
regard to the SOFTWARE (INCLUDING ANY MODIFIED VERSIONS THEREOF)
and any accompanying written materials. 

To the maximum extent permitted by applicable law,
IN NO EVENT SHALL MOTOROLA BE LIABLE FOR ANY DAMAGES WHATSOEVER
(INCLUDING WITHOUT LIMITATION, DAMAGES FOR LOSS OF BUSINESS
PROFITS, BUSINESS INTERRUPTION, LOSS OF BUSINESS INFORMATION, OR
OTHER PECUNIARY LOSS) ARISING OF THE USE OR INABILITY TO USE THE
SOFTWARE.  Motorola assumes no responsibility for the maintenance
and support of the SOFTWARE.  

You are hereby granted a copyright license to use, modify, and
distribute the SOFTWARE so long as this entire notice is retained
without alteration in any modified and/or redistributed versions,
and that such modified versions are clearly identified as such.
No licenses are granted by implication, estoppel or otherwise
under any patents or trademarks of Motorola, Inc.
#
# Makefile for Linux arch/m68k/amiga source directory
#
# Note! Dependencies are done automagically by 'make dep', which also
# removes any old dependencies. DON'T put your own dependencies here
# unless it's something special (ie not a .c file).
#
# Note 2! The CFLAGS definitions are now in the main makefile...

O_TARGET := apollo.o

obj-y		:= config.o dn_ints.o dma.o

include $(TOPDIR)/Rules.make
#include <linux/config.h>
#include <linux/types.h>
#include <linux/kernel.h>
#include <linux/mm.h>
#include <linux/tty.h>
#include <linux/console.h>

#include <asm/setup.h>
#include <asm/bootinfo.h>
#include <asm/system.h>
#include <asm/pgtable.h>
#include <asm/apollohw.h>
#include <asm/irq.h>
#include <asm/rtc.h>
#include <asm/machdep.h>

u_long sio01_physaddr;
u_long sio23_physaddr;
u_long rtc_physaddr;
u_long pica_physaddr;
u_long picb_physaddr;
u_long cpuctrl_physaddr;
u_long timer_physaddr;
u_long apollo_model;

extern void dn_sched_init(void (*handler)(int,void *,struct pt_regs *));
extern int dn_keyb_init(void);
extern int dn_dummy_kbdrate(struct kbd_repeat *);
extern void dn_init_IRQ(void);
extern int dn_request_irq(unsigned int irq, void (*handler)(int, void *, struct pt_regs *), unsigned long flags, const char *devname, void *dev_id);
extern void dn_free_irq(unsigned int irq, void *dev_id);
extern void dn_enable_irq(unsigned int);
extern void dn_disable_irq(unsigned int);
extern int dn_get_irq_list(char *);
extern unsigned long dn_gettimeoffset(void);
extern void dn_gettod(int *, int *, int *, int *, int *, int *);
extern int dn_dummy_hwclk(int, struct hwclk_time *);
extern int dn_dummy_set_clock_mmss(unsigned long);
extern void dn_mksound(unsigned int count, unsigned int ticks);
extern void dn_dummy_reset(void);
extern void dn_dummy_waitbut(void);
extern struct fb_info *dn_fb_init(long *);
extern void dn_dummy_debug_init(void);
extern void (*kd_mksound)(unsigned int, unsigned int);
extern void dn_dummy_video_setup(char *,int *);
extern void dn_process_int(int irq, struct pt_regs *fp);
#ifdef CONFIG_HEARTBEAT
static void dn_heartbeat(int on);
#endif
static void dn_timer_int(int irq,void *, struct pt_regs *);
static void (*sched_timer_handler)(int, void *, struct pt_regs *)=NULL;
static void dn_get_model(char *model);
static int dn_cpuctrl=0xff00;
static const char *apollo_models[] = {
	"DN3000 (Otter)",
	"DN3010 (Otter)",
	"DN3500 (Cougar II)",
	"DN4000 (Mink)",
	"DN4500 (Roadrunner)" };

int apollo_parse_bootinfo(const struct bi_record *record) {

	int unknown = 0;
	const unsigned long *data = record->data;

	switch(record->tag) {
		case BI_APOLLO_MODEL: 
			apollo_model=*data;	
			break;

		default:
			 unknown=1;
	}
	
	return unknown;
}

void dn_setup_model(void) {
	

	printk("Apollo hardware found: ");
	printk("[%s]\n", apollo_models[apollo_model - APOLLO_DN3000]);

	switch(apollo_model) {
		case APOLLO_UNKNOWN:
			panic("Unknown apollo model");
			break;
		case APOLLO_DN3000:
		case APOLLO_DN3010:
			sio01_physaddr=SAU8_SIO01_PHYSADDR;	
			rtc_physaddr=SAU8_RTC_PHYSADDR;	
			pica_physaddr=SAU8_PICA;	
			picb_physaddr=SAU8_PICB;	
			cpuctrl_physaddr=SAU8_CPUCTRL;
			timer_physaddr=SAU8_TIMER;
			break;
		case APOLLO_DN4000:
			sio01_physaddr=SAU7_SIO01_PHYSADDR;	
			sio23_physaddr=SAU7_SIO23_PHYSADDR;	
			rtc_physaddr=SAU7_RTC_PHYSADDR;	
			pica_physaddr=SAU7_PICA;	
			picb_physaddr=SAU7_PICB;	
			cpuctrl_physaddr=SAU7_CPUCTRL;
			timer_physaddr=SAU7_TIMER;
			break;
		case APOLLO_DN4500:
			panic("Apollo model not yet supported");
			break;
		case APOLLO_DN3500:
			sio01_physaddr=SAU7_SIO01_PHYSADDR;	
			sio23_physaddr=SAU7_SIO23_PHYSADDR;	
			rtc_physaddr=SAU7_RTC_PHYSADDR;	
			pica_physaddr=SAU7_PICA;	
			picb_physaddr=SAU7_PICB;	
			cpuctrl_physaddr=SAU7_CPUCTRL;
			timer_physaddr=SAU7_TIMER;
			break;
		default:
			panic("Undefined apollo model");
			break;
	}


}

int dn_serial_console_wait_key(struct console *co) {

	while(!(sio01.srb_csrb & 1))
		barrier();
	return sio01.rhrb_thrb;
}

void dn_serial_console_write (struct console *co, const char *str,unsigned int count)
{
   while(count--) {
	if (*str == '\n') { 
    	sio01.rhrb_thrb = (unsigned char)'\r';
       	while (!(sio01.srb_csrb & 0x4))
                ;
 	}
    sio01.rhrb_thrb = (unsigned char)*str++;
    while (!(sio01.srb_csrb & 0x4))
            ;
  }	
}
 
void dn_serial_print (const char *str)
{
    while (*str) {
        if (*str == '\n') {
            sio01.rhrb_thrb = (unsigned char)'\r';
            while (!(sio01.srb_csrb & 0x4))
                ;
        }
        sio01.rhrb_thrb = (unsigned char)*str++;
        while (!(sio01.srb_csrb & 0x4))
            ;
    }
}

void config_apollo(void) {

	int i;

	dn_setup_model();	

	mach_sched_init=dn_sched_init; /* */
	mach_keyb_init=dn_keyb_init;
	mach_kbdrate=dn_dummy_kbdrate;
	mach_init_IRQ=dn_init_IRQ;
	mach_default_handler=NULL;
	mach_request_irq     = dn_request_irq;
	mach_free_irq        = dn_free_irq;
	enable_irq      = dn_enable_irq;
	disable_irq     = dn_disable_irq;
	mach_get_irq_list    = dn_get_irq_list;
	mach_gettimeoffset   = dn_gettimeoffset;
	mach_gettod	     = dn_gettod; /* */
	mach_max_dma_address = 0xffffffff;
	mach_hwclk           = dn_dummy_hwclk; /* */
	mach_set_clock_mmss  = dn_dummy_set_clock_mmss; /* */
	mach_process_int     = dn_process_int;
#ifdef CONFIG_BLK_DEV_FD
	mach_floppy_init     = dn_dummy_floppy_init;
	mach_floppy_setup    = dn_dummy_floppy_setup;
#endif
	mach_reset	     = dn_dummy_reset;  /* */
#ifdef CONFIG_DUMMY_CONSOLE
        conswitchp           = &dummy_con;
#endif
	kd_mksound	     = dn_mksound;
#ifdef CONFIG_HEARTBEAT
  	mach_heartbeat = dn_heartbeat;
#endif
	mach_get_model       = dn_get_model;

	cpuctrl=0xaa00;

	/* clear DMA translation table */
	for(i=0;i<0x400;i++) 
		addr_xlat_map[i]=0;

}		

void dn_timer_int(int irq, void *dev_id, struct pt_regs *fp) {

	volatile unsigned char x;

	sched_timer_handler(irq,dev_id,fp);
	
	x=*(volatile unsigned char *)(timer+3);
	x=*(volatile unsigned char *)(timer+5);

}

void dn_sched_init(void (*timer_routine)(int, void *, struct pt_regs *)) {

	/* program timer 1 */       	
	*(volatile unsigned char *)(timer+3)=0x01;
	*(volatile unsigned char *)(timer+1)=0x40;
	*(volatile unsigned char *)(timer+5)=0x09;
	*(volatile unsigned char *)(timer+7)=0xc4;

	/* enable IRQ of PIC B */
	*(volatile unsigned char *)(pica+1)&=(~8);

#if 0
	printk("*(0x10803) %02x\n",*(volatile unsigned char *)(timer+0x3));
	printk("*(0x10803) %02x\n",*(volatile unsigned char *)(timer+0x3));
#endif

	sched_timer_handler=timer_routine;
	request_irq(0,dn_timer_int,0,NULL,NULL);

}

unsigned long dn_gettimeoffset(void) {

	return 0xdeadbeef;

}

void dn_gettod(int *yearp, int *monp, int *dayp,
	       int *hourp, int *minp, int *secp) {

  *yearp=rtc->year;
  *monp=rtc->month;
  *dayp=rtc->day_of_month;
  *hourp=rtc->hours;
  *minp=rtc->minute;
  *secp=rtc->second;

printk("gettod: %d %d %d %d %d %d\n",*yearp,*monp,*dayp,*hourp,*minp,*secp);

}

int dn_dummy_hwclk(int op, struct hwclk_time *t) {


  if(!op) { /* read */
    t->sec=rtc->second;
    t->min=rtc->minute;
    t->hour=rtc->hours;
    t->day=rtc->day_of_month;
    t->wday=rtc->day_of_week;
    t->mon=rtc->month;
    t->year=rtc->year;
  } else {
    rtc->second=t->sec;
    rtc->minute=t->min;
    rtc->hours=t->hour;
    rtc->day_of_month=t->day;
    if(t->wday!=-1)
      rtc->day_of_week=t->wday;
    rtc->month=t->mon;
    rtc->year=t->year;
  }

  return 0;

}

int dn_dummy_set_clock_mmss(unsigned long nowtime) {

  printk("set_clock_mmss\n");

  return 0;

}

void dn_dummy_reset(void) {

  dn_serial_print("The end !\n");

  for(;;);

}
	
void dn_dummy_waitbut(void) {

  dn_serial_print("waitbut\n");

}

static void dn_get_model(char *model)
{
    strcpy(model, "Apollo ");
    if (apollo_model >= APOLLO_DN3000 && apollo_model <= APOLLO_DN4500)
        strcat(model, apollo_models[apollo_model - APOLLO_DN3000]);
}

#ifdef CONFIG_HEARTBEAT
static void dn_heartbeat(int on) {

	if(on) { 
		dn_cpuctrl&=~0x100;
		cpuctrl=dn_cpuctrl;
	}
	else {
		dn_cpuctrl&=~0x100;
		dn_cpuctrl|=0x100;
		cpuctrl=dn_cpuctrl;
	}
}
#endif


#define DN_DEBUG_BUFFER_BASE 0x82800000
#define DN_DEBUG_BUFFER_SIZE 8*1024*1024

static char *current_dbg_ptr=DN_DEBUG_BUFFER_BASE;

int dn_deb_printf(const char *fmt, ...) {

	va_list args;
	int i;

	if(current_dbg_ptr<(DN_DEBUG_BUFFER_BASE + DN_DEBUG_BUFFER_SIZE)) {
		va_start(args,fmt);
		i=vsprintf(current_dbg_ptr,fmt,args);
		va_end(args);
		current_dbg_ptr+=i;
	
		return i;
	}
	else 
		return 0;
}
#include <linux/types.h>
#include <linux/kernel.h>
#include <linux/sched.h>
#include <linux/kernel_stat.h>

#include <asm/system.h>
#include <asm/irq.h>
#include <asm/traps.h>
#include <asm/page.h>
#include <asm/machdep.h>
#include <asm/apollohw.h>

static irq_handler_t dn_irqs[16];

extern void write_keyb_cmd(u_short length, u_char *cmd);
static char BellOnCommand[] =  { 0xFF, 0x21, 0x81 },
		    BellOffCommand[] = { 0xFF, 0x21, 0x82 };

extern void dn_serial_print (const char *str);
void dn_process_int(int irq, struct pt_regs *fp) {


  if(dn_irqs[irq-160].handler) {
    dn_irqs[irq-160].handler(irq,dn_irqs[irq-160].dev_id,fp);
  }
  else {
    printk("spurious irq %d occurred\n",irq);
  }

  *(volatile unsigned char *)(pica)=0x20;
  *(volatile unsigned char *)(picb)=0x20;

}

void dn_init_IRQ(void) {

  int i;

  for(i=0;i<16;i++) {
    dn_irqs[i].handler=NULL;
    dn_irqs[i].flags=IRQ_FLG_STD;
    dn_irqs[i].dev_id=NULL;
    dn_irqs[i].devname=NULL;
  }
  
}

int dn_request_irq(unsigned int irq, void (*handler)(int, void *, struct pt_regs *), unsigned long flags, const char *devname, void *dev_id) {

  if((irq<0) || (irq>15)) {
    printk("Trying to request illegal IRQ\n");
    return -ENXIO;
  }

  if(!dn_irqs[irq].handler) {
    dn_irqs[irq].handler=handler;
    dn_irqs[irq].flags=IRQ_FLG_STD;
    dn_irqs[irq].dev_id=dev_id;
    dn_irqs[irq].devname=devname;
    if(irq<8)
      *(volatile unsigned char *)(pica+1)&=~(1<<irq);
    else
      *(volatile unsigned char *)(picb+1)&=~(1<<(irq-8));

    return 0;
  }
  else {
    printk("Trying to request already assigned irq %d\n",irq);
    return -ENXIO;
  }

}

void dn_free_irq(unsigned int irq, void *dev_id) {

  if((irq<0) || (irq>15)) {
    printk("Trying to free illegal IRQ\n");
    return ;
  }

  if(irq<8)
    *(volatile unsigned char *)(pica+1)|=(1<<irq);
  else
    *(volatile unsigned char *)(picb+1)|=(1<<(irq-8));  

  dn_irqs[irq].handler=NULL;
  dn_irqs[irq].flags=IRQ_FLG_STD;
  dn_irqs[irq].dev_id=NULL;
  dn_irqs[irq].devname=NULL;

  return ;

}

void dn_enable_irq(unsigned int irq) {

  printk("dn enable irq\n");

}

void dn_disable_irq(unsigned int irq) {

  printk("dn disable irq\n");

}

int dn_get_irq_list(char *buf) {

  printk("dn get irq list\n");

  return 0;

}

struct fb_info *dn_dummy_fb_init(long *mem_start) {

  printk("fb init\n");

  return NULL;

}

static void dn_nosound (unsigned long ignored) {

	write_keyb_cmd(sizeof(BellOffCommand),BellOffCommand);

}

void dn_mksound( unsigned int count, unsigned int ticks ) {

	static struct timer_list sound_timer = { function: dn_nosound };

	del_timer( &sound_timer );
	if(count) {
		write_keyb_cmd(sizeof(BellOnCommand),BellOnCommand);
		if (ticks) {
       		sound_timer.expires = jiffies + ticks;
			add_timer( &sound_timer );
		}
	}
	else
		write_keyb_cmd(sizeof(BellOffCommand),BellOffCommand);
}

void dn_dummy_video_setup(char *options,int *ints) {

  printk("no video yet\n");

}
#include <linux/types.h>
#include <linux/kernel.h>
#include <linux/mm.h>
#include <linux/kd.h>
#include <linux/tty.h>
#include <linux/console.h>

#include <asm/setup.h>
#include <asm/bootinfo.h>
#include <asm/system.h>
#include <asm/pgtable.h>
#include <asm/apollodma.h>

/* note only works for 16 Bit 1 page DMA's */

static unsigned short next_free_xlat_entry=0;

unsigned short dma_map_page(unsigned long phys_addr,int count,int type) {

	unsigned long page_aligned_addr=phys_addr & (~((1<<12)-1));
	unsigned short start_map_addr=page_aligned_addr >> 10;
	unsigned short free_xlat_entry, *xlat_map_entry;
	int i;

	free_xlat_entry=next_free_xlat_entry;
	for(i=0,xlat_map_entry=addr_xlat_map+(free_xlat_entry<<2);i<8;i++,xlat_map_entry++) {
#if 0
		printk("phys_addr: %x, page_aligned_addr: %x, start_map_addr: %x\n",phys_addr,page_aligned_addr,start_map_addr+i);
#endif
		outw(start_map_addr+i, xlat_map_entry);
	}

	next_free_xlat_entry+=2;
	if(next_free_xlat_entry>125)
		next_free_xlat_entry=0;
	
#if 0
	printk("next_free_xlat_entry: %d\n",next_free_xlat_entry);
#endif

	return free_xlat_entry<<10;
}

void dma_unmap_page(unsigned short dma_addr) {

	return ;

}

/*
 *  linux/arch/m68k/tools/amiga/dmesg.c -- Retrieve the kernel messages stored
 *					   in Chip RAM with the kernel command
 *					   line option `debug=mem'.
 *
 *  � Copyright 1996 by Geert Uytterhoeven <geert@linux-m68k.org>
 *
 *
 *  Usage:
 *
 *	dmesg
 *	dmesg <CHIPMEM_END>
 *
 *
 *  This file is subject to the terms and conditions of the GNU General Public
 *  License.  See the file COPYING in the main directory of the Linux
 *  distribution for more details.
 */


#include <stdio.h>
#include <stdlib.h>
#include <unistd.h>


#define CHIPMEM_START	0x00000000
#define CHIPMEM_END	0x00200000	/* overridden by argv[1] */

#define SAVEKMSG_MAGIC1	0x53415645	/* 'SAVE' */
#define SAVEKMSG_MAGIC2	0x4B4D5347	/* 'KMSG' */

struct savekmsg {
    u_long magic1;	/* SAVEKMSG_MAGIC1 */
    u_long magic2;	/* SAVEKMSG_MAGIC2 */
    u_long magicptr;	/* address of magic1 */
    u_long size;
    char data[0];
};


int main(int argc, char *argv[])
{
    u_long start = CHIPMEM_START, end = CHIPMEM_END, p;
    int found = 0;
    struct savekmsg *m = NULL;

    if (argc >= 2)
	end = strtoul(argv[1], NULL, 0);
    printf("Searching for SAVEKMSG magic...\n");
    for (p = start; p <= end-sizeof(struct savekmsg); p += 4) {
	m = (struct savekmsg *)p;
	if ((m->magic1 == SAVEKMSG_MAGIC1) && (m->magic2 == SAVEKMSG_MAGIC2) &&
	    (m->magicptr == p)) {
	    found = 1;
	    break;
	}
    }
    if (!found)
	printf("Not found\n");
    else {
	printf("Found %ld bytes at 0x%08lx\n", m->size, (u_long)&m->data);
	puts(">>>>>>>>>>>>>>>>>>>>");
	fflush(stdout);
	write(1, &m->data, m->size);
	fflush(stdout);
	puts("<<<<<<<<<<<<<<<<<<<<");
    }
    return(0);
}

CC =		m68k-cbm-amigados-gcc
CFLAGS =	-Wall -O2


All:		dmesg


dmesg:		dmesg.c
		$(CC) $(CFLAGS) -o dmesg dmesg.c -noixemul

/* ld script to make m68k Linux kernel */
OUTPUT_FORMAT("elf32-m68k", "elf32-m68k", "elf32-m68k")
OUTPUT_ARCH(m68k)
ENTRY(_start)
SECTIONS
{
  . = 0x1000;
  _text = .;			/* Text and read-only data */
  .text : {
	*(.text)
	*(.fixup)
	*(.gnu.warning)
	} = 0x4e75
  .rodata : { *(.rodata) *(.rodata.*) }
  .kstrtab : { *(.kstrtab) }

  . = ALIGN(16);		/* Exception table */
  __start___ex_table = .;
  __ex_table : { *(__ex_table) }
  __stop___ex_table = .;

  __start___ksymtab = .;	/* Kernel symbol table */
  __ksymtab : { *(__ksymtab) }
  __stop___ksymtab = .;

  _etext = .;			/* End of text section */

  .data : {			/* Data */
	*(.data)
	CONSTRUCTORS
	}

  .bss : { *(.bss) }		/* BSS */

  . = ALIGN(16);
  .data.cacheline_aligned : { *(.data.cacheline_aligned) }

  _edata = .;			/* End of data section */

  . = ALIGN(4096);		/* Init code and data */
  __init_begin = .;
  .text.init : { *(.text.init) }
  .data.init : { *(.data.init) }
  . = ALIGN(16);
  __setup_start = .;
  .setup.init : { *(.setup.init) }
  __setup_end = .;
  __initcall_start = .;
  .initcall.init : { *(.initcall.init) }
  __initcall_end = .;
  . = ALIGN(8192);
  __init_end = .;

  init_task : { *(init_task) }	/* The initial task and kernel stack */

  _end = . ;

  /* Stabs debugging sections.  */
  .stab 0 : { *(.stab) }
  .stabstr 0 : { *(.stabstr) }
  .stab.excl 0 : { *(.stab.excl) }
  .stab.exclstr 0 : { *(.stab.exclstr) }
  .stab.index 0 : { *(.stab.index) }
  .stab.indexstr 0 : { *(.stab.indexstr) }
  .comment 0 : { *(.comment) }
}
#
# Makefile for Linux arch/m68k/bvme6000 source directory
#
# Note! Dependencies are done automagically by 'make dep', which also
# removes any old dependencies. DON'T put your own dependencies here
# unless it's something special (ie not a .c file).
#
# Note 2! The CFLAGS definitions are now in the main makefile...

O_TARGET := bvme6000.o

obj-y		:= config.o bvmeints.o rtc.o

include $(TOPDIR)/Rules.make
/*
 * arch/m68k/bvme6000/bvmeints.c
 *
 * Copyright (C) 1997 Richard Hirst [richard@sleepie.demon.co.uk]
 *
 * based on amiints.c -- Amiga Linux interrupt handling code
 *
 * This file is subject to the terms and conditions of the GNU General Public
 * License.  See the file README.legal in the main directory of this archive
 * for more details.
 *
 */

#include <linux/types.h>
#include <linux/kernel.h>
#include <linux/errno.h>

#include <asm/ptrace.h>
#include <asm/system.h>
#include <asm/irq.h>
#include <asm/traps.h>

static void bvme6000_defhand (int irq, void *dev_id, struct pt_regs *fp);

/*
 * This should ideally be 4 elements only, for speed.
 */

static struct {
	void		(*handler)(int, void *, struct pt_regs *);
	unsigned long	flags;
	void		*dev_id;
	const char	*devname;
	unsigned	count;
} irq_tab[256];

/*
 * void bvme6000_init_IRQ (void)
 *
 * Parameters:	None
 *
 * Returns:	Nothing
 *
 * This function is called during kernel startup to initialize
 * the bvme6000 IRQ handling routines.
 */

void bvme6000_init_IRQ (void)
{
	int i;

	for (i = 0; i < 256; i++) {
		irq_tab[i].handler = bvme6000_defhand;
		irq_tab[i].flags = IRQ_FLG_STD;
		irq_tab[i].dev_id = NULL;
		irq_tab[i].devname = NULL;
		irq_tab[i].count = 0;
	}
}

int bvme6000_request_irq(unsigned int irq,
		void (*handler)(int, void *, struct pt_regs *),
                unsigned long flags, const char *devname, void *dev_id)
{
	if (irq > 255) {
		printk("%s: Incorrect IRQ %d from %s\n", __FUNCTION__, irq, devname);
		return -ENXIO;
	}
#if 0
	/* Nothing special about auto-vectored devices for the BVME6000,
	 * but treat it specially to avoid changes elsewhere.
	 */

	if (irq >= VEC_INT1 && irq <= VEC_INT7)
		return sys_request_irq(irq - VEC_SPUR, handler, flags,
						devname, dev_id);
#endif
	if (!(irq_tab[irq].flags & IRQ_FLG_STD)) {
		if (irq_tab[irq].flags & IRQ_FLG_LOCK) {
			printk("%s: IRQ %d from %s is not replaceable\n",
			       __FUNCTION__, irq, irq_tab[irq].devname);
			return -EBUSY;
		}
		if (flags & IRQ_FLG_REPLACE) {
			printk("%s: %s can't replace IRQ %d from %s\n",
			       __FUNCTION__, devname, irq, irq_tab[irq].devname);
			return -EBUSY;
		}
	}
	irq_tab[irq].handler = handler;
	irq_tab[irq].flags   = flags;
	irq_tab[irq].dev_id  = dev_id;
	irq_tab[irq].devname = devname;
	return 0;
}

void bvme6000_free_irq(unsigned int irq, void *dev_id)
{
	if (irq > 255) {
		printk("%s: Incorrect IRQ %d\n", __FUNCTION__, irq);
		return;
	}
#if 0
	if (irq >= VEC_INT1 && irq <= VEC_INT7) {
		sys_free_irq(irq - VEC_SPUR, dev_id);
		return;
	}
#endif
	if (irq_tab[irq].dev_id != dev_id)
		printk("%s: Removing probably wrong IRQ %d from %s\n",
		       __FUNCTION__, irq, irq_tab[irq].devname);

	irq_tab[irq].handler = bvme6000_defhand;
	irq_tab[irq].flags   = IRQ_FLG_STD;
	irq_tab[irq].dev_id  = NULL;
	irq_tab[irq].devname = NULL;
}

void bvme6000_process_int (unsigned long vec, struct pt_regs *fp)
{
	if (vec > 255)
		printk ("bvme6000_process_int: Illegal vector %ld", vec);
	else
	{
		irq_tab[vec].count++;
		irq_tab[vec].handler(vec, irq_tab[vec].dev_id, fp);
	}
}

int bvme6000_get_irq_list (char *buf)
{
	int i, len = 0;

	for (i = 0; i < 256; i++) {
		if (irq_tab[i].count)
			len += sprintf (buf+len, "Vec 0x%02x: %8d  %s\n",
			    i, irq_tab[i].count,
			    irq_tab[i].devname ? irq_tab[i].devname : "free");
	}
	return len;
}


static void bvme6000_defhand (int irq, void *dev_id, struct pt_regs *fp)
{
	printk ("Unknown interrupt 0x%02x\n", irq);
}

void bvme6000_enable_irq (unsigned int irq)
{
}


void bvme6000_disable_irq (unsigned int irq)
{
}

/*
 *  arch/m68k/bvme6000/config.c
 *
 *  Copyright (C) 1997 Richard Hirst [richard@sleepie.demon.co.uk]
 *
 * Based on:
 *
 *  linux/amiga/config.c
 *
 *  Copyright (C) 1993 Hamish Macdonald
 *
 * This file is subject to the terms and conditions of the GNU General Public
 * License.  See the file README.legal in the main directory of this archive
 * for more details.
 */

#include <linux/types.h>
#include <linux/kernel.h>
#include <linux/mm.h>
#include <linux/tty.h>
#include <linux/console.h>
#include <linux/linkage.h>
#include <linux/init.h>
#include <linux/major.h>

#include <asm/bootinfo.h>
#include <asm/system.h>
#include <asm/pgtable.h>
#include <asm/setup.h>
#include <asm/irq.h>
#include <asm/traps.h>
#include <asm/rtc.h>
#include <asm/machdep.h>
#include <asm/bvme6000hw.h>

extern void bvme6000_process_int (int level, struct pt_regs *regs);
extern void bvme6000_init_IRQ (void);
extern void bvme6000_free_irq (unsigned int, void *);
extern int  bvme6000_get_irq_list (char *);
extern void bvme6000_enable_irq (unsigned int);
extern void bvme6000_disable_irq (unsigned int);
static void bvme6000_get_model(char *model);
static int  bvme6000_get_hardware_list(char *buffer);
extern int  bvme6000_request_irq(unsigned int irq, void (*handler)(int, void *, struct pt_regs *), unsigned long flags, const char *devname, void *dev_id);
extern void bvme6000_sched_init(void (*handler)(int, void *, struct pt_regs *));
extern int  bvme6000_keyb_init(void);
extern int  bvme6000_kbdrate (struct kbd_repeat *);
extern unsigned long bvme6000_gettimeoffset (void);
extern void bvme6000_gettod (int *year, int *mon, int *day, int *hour,
                           int *min, int *sec);
extern int bvme6000_hwclk (int, struct hwclk_time *);
extern int bvme6000_set_clock_mmss (unsigned long);
extern void bvme6000_check_partition (struct gendisk *hd, unsigned int dev);
extern void bvme6000_mksound( unsigned int count, unsigned int ticks );
extern void bvme6000_reset (void);
extern void bvme6000_waitbut(void);
void bvme6000_set_vectors (void);

static unsigned char bcd2bin (unsigned char b);
static unsigned char bin2bcd (unsigned char b);

/* Save tick handler routine pointer, will point to do_timer() in
 * kernel/sched.c, called via bvme6000_process_int() */

static void (*tick_handler)(int, void *, struct pt_regs *);


int bvme6000_parse_bootinfo(const struct bi_record *bi)
{
	if (bi->tag == BI_VME_TYPE)
		return 0;
	else
		return 1;
}

int bvme6000_kbdrate (struct kbd_repeat *k)
{
	return 0;
}

void bvme6000_mksound( unsigned int count, unsigned int ticks )
{
}

void bvme6000_reset()
{
	volatile PitRegsPtr pit = (PitRegsPtr)BVME_PIT_BASE;

	printk ("\r\n\nCalled bvme6000_reset\r\n"
			"\r\r\r\r\r\r\r\r\r\r\r\r\r\r\r\r\r\r");
	/* The string of returns is to delay the reset until the whole
	 * message is output. */
	/* Enable the watchdog, via PIT port C bit 4 */

	pit->pcddr	|= 0x10;	/* WDOG enable */

	while(1)
		;
}

static void bvme6000_get_model(char *model)
{
    sprintf(model, "BVME%d000", m68k_cputype == CPU_68060 ? 6 : 4);
}


/* No hardware options on BVME6000? */

static int bvme6000_get_hardware_list(char *buffer)
{
    *buffer = '\0';
    return 0;
}


void __init config_bvme6000(void)
{
    volatile PitRegsPtr pit = (PitRegsPtr)BVME_PIT_BASE;

    /* Board type is only set by newer versions of vmelilo/tftplilo */
    if (!vme_brdtype) {
	if (m68k_cputype == CPU_68060)
	    vme_brdtype = VME_TYPE_BVME6000;
	else
	    vme_brdtype = VME_TYPE_BVME4000;
    }
#if 0
    /* Call bvme6000_set_vectors() so ABORT will work, along with BVMBug
     * debugger.  Note trap_init() will splat the abort vector, but
     * bvme6000_init_IRQ() will put it back again.  Hopefully. */

    bvme6000_set_vectors();
#endif

    mach_max_dma_address = 0xffffffff;
    mach_sched_init      = bvme6000_sched_init;
    mach_keyb_init       = bvme6000_keyb_init;
    mach_kbdrate         = bvme6000_kbdrate;
    mach_init_IRQ        = bvme6000_init_IRQ;
    mach_gettimeoffset   = bvme6000_gettimeoffset;
    mach_gettod  	 = bvme6000_gettod;
    mach_hwclk           = bvme6000_hwclk;
    mach_set_clock_mmss	 = bvme6000_set_clock_mmss;
/*  mach_mksound         = bvme6000_mksound; */
    mach_reset		 = bvme6000_reset;
    mach_free_irq	 = bvme6000_free_irq;
    mach_process_int	 = bvme6000_process_int;
    mach_get_irq_list	 = bvme6000_get_irq_list;
    mach_request_irq	 = bvme6000_request_irq;
    enable_irq		 = bvme6000_enable_irq;
    disable_irq          = bvme6000_disable_irq;
    mach_get_model       = bvme6000_get_model;
    mach_get_hardware_list = bvme6000_get_hardware_list;

    printk ("Board is %sconfigured as a System Controller\n",
		*config_reg_ptr & BVME_CONFIG_SW1 ? "" : "not ");

    /* Now do the PIT configuration */

    pit->pgcr	= 0x00;	/* Unidirectional 8 bit, no handshake for now */
    pit->psrr	= 0x18;	/* PIACK and PIRQ fucntions enabled */
    pit->pacr	= 0x00;	/* Sub Mode 00, H2 i/p, no DMA */
    pit->padr	= 0x00;	/* Just to be tidy! */
    pit->paddr	= 0x00;	/* All inputs for now (safest) */
    pit->pbcr	= 0x80;	/* Sub Mode 1x, H4 i/p, no DMA */
    pit->pbdr	= 0xbc | (*config_reg_ptr & BVME_CONFIG_SW1 ? 0 : 0x40);
			/* PRI, SYSCON?, Level3, SCC clks from xtal */
    pit->pbddr	= 0xf3;	/* Mostly outputs */
    pit->pcdr	= 0x01;	/* PA transceiver disabled */
    pit->pcddr	= 0x03;	/* WDOG disable */

    /* Disable snooping for Ethernet and VME accesses */

    bvme_acr_addrctl = 0;
}


void bvme6000_abort_int (int irq, void *dev_id, struct pt_regs *fp)
{
        unsigned long *new = (unsigned long *)vectors;
        unsigned long *old = (unsigned long *)0xf8000000;

        /* Wait for button release */
	while (*config_reg_ptr & BVME_ABORT_STATUS)
		;

        *(new+4) = *(old+4);            /* Illegal instruction */
        *(new+9) = *(old+9);            /* Trace */
        *(new+47) = *(old+47);          /* Trap #15 */
        *(new+0x1f) = *(old+0x1f);      /* ABORT switch */
}


static void bvme6000_timer_int (int irq, void *dev_id, struct pt_regs *fp)
{
    volatile RtcPtr_t rtc = (RtcPtr_t)BVME_RTC_BASE;
    unsigned char msr = rtc->msr & 0xc0;

    rtc->msr = msr | 0x20;		/* Ack the interrupt */

    tick_handler(irq, dev_id, fp);
}

/*
 * Set up the RTC timer 1 to mode 2, so T1 output toggles every 5ms
 * (40000 x 125ns).  It will interrupt every 10ms, when T1 goes low.
 * So, when reading the elapsed time, you should read timer1,
 * subtract it from 39999, and then add 40000 if T1 is high.
 * That gives you the number of 125ns ticks in to the 10ms period,
 * so divide by 8 to get the microsecond result.
 */

void bvme6000_sched_init (void (*timer_routine)(int, void *, struct pt_regs *))
{
    volatile RtcPtr_t rtc = (RtcPtr_t)BVME_RTC_BASE;
    unsigned char msr = rtc->msr & 0xc0;

    rtc->msr = 0;	/* Ensure timer registers accessible */

    tick_handler = timer_routine;
    if (request_irq(BVME_IRQ_RTC, bvme6000_timer_int, 0,
				"timer", bvme6000_timer_int))
	panic ("Couldn't register timer int");

    rtc->t1cr_omr = 0x04;	/* Mode 2, ext clk */
    rtc->t1msb = 39999 >> 8;
    rtc->t1lsb = 39999 & 0xff;
    rtc->irr_icr1 &= 0xef;	/* Route timer 1 to INTR pin */
    rtc->msr = 0x40;		/* Access int.cntrl, etc */
    rtc->pfr_icr0 = 0x80;	/* Just timer 1 ints enabled */
    rtc->irr_icr1 = 0;
    rtc->t1cr_omr = 0x0a;	/* INTR+T1 active lo, push-pull */
    rtc->t0cr_rtmr &= 0xdf;	/* Stop timers in standby */
    rtc->msr = 0;		/* Access timer 1 control */
    rtc->t1cr_omr = 0x05;	/* Mode 2, ext clk, GO */

    rtc->msr = msr;

    if (request_irq(BVME_IRQ_ABORT, bvme6000_abort_int, 0,
				"abort", bvme6000_abort_int))
	panic ("Couldn't register abort int");
}


/* This is always executed with interrupts disabled.  */

/*
 * NOTE:  Don't accept any readings within 5us of rollover, as
 * the T1INT bit may be a little slow getting set.  There is also
 * a fault in the chip, meaning that reads may produce invalid
 * results...
 */

unsigned long bvme6000_gettimeoffset (void)
{
    volatile RtcPtr_t rtc = (RtcPtr_t)BVME_RTC_BASE;
    volatile PitRegsPtr pit = (PitRegsPtr)BVME_PIT_BASE;
    unsigned char msr = rtc->msr & 0xc0;
    unsigned char t1int, t1op;
    unsigned long v = 800000, ov;

    rtc->msr = 0;	/* Ensure timer registers accessible */

    do {
	ov = v;
	t1int = rtc->msr & 0x20;
	t1op  = pit->pcdr & 0x04;
	rtc->t1cr_omr |= 0x40;		/* Latch timer1 */
	v = rtc->t1msb << 8;		/* Read timer1 */
	v |= rtc->t1lsb;		/* Read timer1 */
    } while (t1int != (rtc->msr & 0x20) ||
		t1op != (pit->pcdr & 0x04) ||
			abs(ov-v) > 80 ||
				v > 39960);

    v = 39999 - v;
    if (!t1op)				/* If in second half cycle.. */
	v += 40000;
    v /= 8;				/* Convert ticks to microseconds */
    if (t1int)
	v += 10000;			/* Int pending, + 10ms */
    rtc->msr = msr;

    return v;
}

extern void bvme6000_gettod (int *year, int *mon, int *day, int *hour,
                           int *min, int *sec)
{
	volatile RtcPtr_t rtc = (RtcPtr_t)BVME_RTC_BASE;
	unsigned char msr = rtc->msr & 0xc0;

	rtc->msr = 0;		/* Ensure clock accessible */

	do {	/* Loop until we get a reading with a stable seconds field */
		*sec = bcd2bin (rtc->bcd_sec);
		*min = bcd2bin (rtc->bcd_min);
		*hour = bcd2bin (rtc->bcd_hr);
		*day = bcd2bin (rtc->bcd_dom);
		*mon = bcd2bin (rtc->bcd_mth);
		*year = bcd2bin (rtc->bcd_year);
	} while (bcd2bin (rtc->bcd_sec) != *sec);

	rtc->msr = msr;
}

static unsigned char bcd2bin (unsigned char b)
{
	return ((b>>4)*10 + (b&15));
}

static unsigned char bin2bcd (unsigned char b)
{
	return (((b/10)*16) + (b%10));
}


/*
 * Looks like op is non-zero for setting the clock, and zero for
 * reading the clock.
 *
 *  struct hwclk_time {
 *         unsigned        sec;       0..59
 *         unsigned        min;       0..59
 *         unsigned        hour;      0..23
 *         unsigned        day;       1..31
 *         unsigned        mon;       0..11
 *         unsigned        year;      00...
 *         int             wday;      0..6, 0 is Sunday, -1 means unknown/don't set
 * };
 */

int bvme6000_hwclk(int op, struct hwclk_time *t)
{
	volatile RtcPtr_t rtc = (RtcPtr_t)BVME_RTC_BASE;
	unsigned char msr = rtc->msr & 0xc0;

	rtc->msr = 0x40;	/* Ensure clock and real-time-mode-register
				 * are accessible */
	if (op)
	{	/* Write.... */
		rtc->t0cr_rtmr = t->year%4;
		rtc->bcd_tenms = 0;
		rtc->bcd_sec = bin2bcd(t->sec);
		rtc->bcd_min = bin2bcd(t->min);
		rtc->bcd_hr  = bin2bcd(t->hour);
		rtc->bcd_dom = bin2bcd(t->day);
		rtc->bcd_mth = bin2bcd(t->mon + 1);
		rtc->bcd_year = bin2bcd(t->year%100);
		if (t->wday >= 0)
			rtc->bcd_dow = bin2bcd(t->wday+1);
		rtc->t0cr_rtmr = t->year%4 | 0x08;
	}
	else
	{	/* Read....  */
		do {
			t->sec =  bcd2bin(rtc->bcd_sec);
			t->min =  bcd2bin(rtc->bcd_min);
			t->hour = bcd2bin(rtc->bcd_hr);
			t->day =  bcd2bin(rtc->bcd_dom);
			t->mon =  bcd2bin(rtc->bcd_mth)-1;
			t->year = bcd2bin(rtc->bcd_year);
			if (t->year < 70)
				t->year += 100;
			t->wday = bcd2bin(rtc->bcd_dow)-1;
		} while (t->sec != bcd2bin(rtc->bcd_sec));
	}

	rtc->msr = msr;

	return 0;
}

/*
 * Set the minutes and seconds from seconds value 'nowtime'.  Fail if
 * clock is out by > 30 minutes.  Logic lifted from atari code.
 * Algorithm is to wait for the 10ms register to change, and then to
 * wait a short while, and then set it.
 */

int bvme6000_set_clock_mmss (unsigned long nowtime)
{
	int retval = 0;
	short real_seconds = nowtime % 60, real_minutes = (nowtime / 60) % 60;
	unsigned char rtc_minutes, rtc_tenms;
	volatile RtcPtr_t rtc = (RtcPtr_t)BVME_RTC_BASE;
	unsigned char msr = rtc->msr & 0xc0;
	unsigned long flags;
	volatile int i;

	rtc->msr = 0;		/* Ensure clock accessible */
	rtc_minutes = bcd2bin (rtc->bcd_min);

	if ((rtc_minutes < real_minutes
		? real_minutes - rtc_minutes
			: rtc_minutes - real_minutes) < 30)
	{
		save_flags(flags);
		cli();
		rtc_tenms = rtc->bcd_tenms;
		while (rtc_tenms == rtc->bcd_tenms)
			;
		for (i = 0; i < 1000; i++)
			;
		rtc->bcd_min = bin2bcd(real_minutes);
		rtc->bcd_sec = bin2bcd(real_seconds);
		restore_flags(flags);
	}
	else
		retval = -1;

	rtc->msr = msr;

	return retval;
}


int bvme6000_keyb_init (void)
{
	return 0;
}

/*-------------------  Serial console stuff ------------------------*/

static void bvme_scc_write(struct console *co, const char *str, unsigned cnt);


void bvme6000_init_console_port (struct console *co, int cflag)
{
        co->write = bvme_scc_write;
}


static void scc_delay (void)
{
        int n;
	volatile int trash;

        for (n = 0; n < 20; n++)
		trash = n;
}

static void scc_write (char ch)
{
        volatile char *p = (volatile char *)BVME_SCC_A_ADDR;

        do {
                scc_delay();
        }
        while (!(*p & 4));
        scc_delay();
        *p = 8;
        scc_delay();
        *p = ch;
}


static void bvme_scc_write (struct console *co, const char *str, unsigned count)
{
        unsigned long   flags;

        save_flags(flags);
        cli();

        while (count--)
        {
                if (*str == '\n')
                        scc_write ('\r');
                scc_write (*str++);
        }
        restore_flags(flags);
}

/*
 *	Real Time Clock interface for Linux on the BVME6000
 *
 * Based on the PC driver by Paul Gortmaker.
 */

#define RTC_VERSION		"1.00"

#include <linux/types.h>
#include <linux/errno.h>
#include <linux/miscdevice.h>
#include <linux/slab.h>
#include <linux/ioport.h>
#include <linux/fcntl.h>
#include <linux/init.h>
#include <linux/poll.h>
#include <linux/mc146818rtc.h>	/* For struct rtc_time and ioctls, etc */
#include <linux/smp_lock.h>
#include <asm/bvme6000hw.h>

#include <asm/io.h>
#include <asm/uaccess.h>
#include <asm/system.h>
#include <asm/setup.h>

/*
 *	We sponge a minor off of the misc major. No need slurping
 *	up another valuable major dev number for this. If you add
 *	an ioctl, make sure you don't conflict with SPARC's RTC
 *	ioctls.
 */

#define BCD2BIN(val) (((val)&15) + ((val)>>4)*10)
#define BIN2BCD(val) ((((val)/10)<<4) + (val)%10)

static unsigned char days_in_mo[] =
{0, 31, 28, 31, 30, 31, 30, 31, 31, 30, 31, 30, 31};

static char rtc_status = 0;

static int rtc_ioctl(struct inode *inode, struct file *file, unsigned int cmd,
		     unsigned long arg)
{
	volatile RtcPtr_t rtc = (RtcPtr_t)BVME_RTC_BASE;
	unsigned char msr;
	unsigned long flags;
	struct rtc_time wtime; 

	switch (cmd) {
	case RTC_RD_TIME:	/* Read the time/date from RTC	*/
	{
		save_flags(flags);
		cli();
		/* Ensure clock and real-time-mode-register are accessible */
		msr = rtc->msr & 0xc0;
		rtc->msr = 0x40;
		do {
			wtime.tm_sec =  BCD2BIN(rtc->bcd_sec);
			wtime.tm_min =  BCD2BIN(rtc->bcd_min);
			wtime.tm_hour = BCD2BIN(rtc->bcd_hr);
			wtime.tm_mday =  BCD2BIN(rtc->bcd_dom);
			wtime.tm_mon =  BCD2BIN(rtc->bcd_mth)-1;
			wtime.tm_year = BCD2BIN(rtc->bcd_year);
			if (wtime.tm_year < 70)
				wtime.tm_year += 100;
			wtime.tm_wday = BCD2BIN(rtc->bcd_dow)-1;
		} while (wtime.tm_sec != BCD2BIN(rtc->bcd_sec));
		rtc->msr = msr;
		restore_flags(flags);
		return copy_to_user((void *)arg, &wtime, sizeof wtime) ?
								-EFAULT : 0;
	}
	case RTC_SET_TIME:	/* Set the RTC */
	{
		struct rtc_time rtc_tm;
		unsigned char mon, day, hrs, min, sec, leap_yr;
		unsigned int yrs;

		if (!capable(CAP_SYS_ADMIN))
			return -EACCES;

		if (copy_from_user(&rtc_tm, (struct rtc_time*)arg,
				   sizeof(struct rtc_time)))
			return -EFAULT;

		yrs = rtc_tm.tm_year;
		if (yrs < 1900)
			yrs += 1900;
		mon = rtc_tm.tm_mon + 1;   /* tm_mon starts at zero */
		day = rtc_tm.tm_mday;
		hrs = rtc_tm.tm_hour;
		min = rtc_tm.tm_min;
		sec = rtc_tm.tm_sec;

		leap_yr = ((!(yrs % 4) && (yrs % 100)) || !(yrs % 400));

		if ((mon > 12) || (day == 0))
			return -EINVAL;

		if (day > (days_in_mo[mon] + ((mon == 2) && leap_yr)))
			return -EINVAL;

		if ((hrs >= 24) || (min >= 60) || (sec >= 60))
			return -EINVAL;

		if (yrs >= 2070)
			return -EINVAL;
		
		save_flags(flags);
		cli();
		/* Ensure clock and real-time-mode-register are accessible */
		msr = rtc->msr & 0xc0;
		rtc->msr = 0x40;

		rtc->t0cr_rtmr = yrs%4;
		rtc->bcd_tenms = 0;
		rtc->bcd_sec   = BIN2BCD(sec);
		rtc->bcd_min   = BIN2BCD(min);
		rtc->bcd_hr    = BIN2BCD(hrs);
		rtc->bcd_dom   = BIN2BCD(day);
		rtc->bcd_mth   = BIN2BCD(mon);
		rtc->bcd_year  = BIN2BCD(yrs%100);
		if (rtc_tm.tm_wday >= 0)
			rtc->bcd_dow = BIN2BCD(rtc_tm.tm_wday+1);
		rtc->t0cr_rtmr = yrs%4 | 0x08;

		rtc->msr = msr;
		restore_flags(flags);
		return 0;
	}
	default:
		return -EINVAL;
	}
}

/*
 *	We enforce only one user at a time here with the open/close.
 *	Also clear the previous interrupt data on an open, and clean
 *	up things on a close.
 */

static int rtc_open(struct inode *inode, struct file *file)
{
	if(rtc_status)
		return -EBUSY;

	rtc_status = 1;
	return 0;
}

static int rtc_release(struct inode *inode, struct file *file)
{
	lock_kernel();
	rtc_status = 0;
	unlock_kernel();
	return 0;
}

/*
 *	The various file operations we support.
 */

static struct file_operations rtc_fops = {
	ioctl:		rtc_ioctl,
	open:		rtc_open,
	release:	rtc_release,
};

static struct miscdevice rtc_dev=
{
	RTC_MINOR,
	"rtc",
	&rtc_fops
};

int __init rtc_DP8570A_init(void)
{
	if (!MACH_IS_BVME6000)
		return -ENODEV;

	printk(KERN_INFO "DP8570A Real Time Clock Driver v%s\n", RTC_VERSION);
	misc_register(&rtc_dev);
	return 0;
}

#
# Makefile for Linux arch/m68k/hp300 source directory
#
# Note! Dependencies are done automagically by 'make dep', which also
# removes any old dependencies. DON'T put your own dependencies here
# unless it's something special (ie not a .c file).
#
# Note 2! The CFLAGS definitions are now in the main makefile...

O_TARGET := hp300.o

export-objs	:= ksyms.o

obj-y		:= ksyms.o config.o ints.o time.o reboot.o

obj-$(CONFIG_VT)	+= hil.o

include $(TOPDIR)/Rules.make
/*
 *  linux/arch/m68k/hp300/config.c
 *
 *  Copyright (C) 1998 Philip Blundell <philb@gnu.org>
 *
 *  This file contains the HP300-specific initialisation code.  It gets
 *  called by setup.c.
 */

#include <linux/config.h>
#include <linux/types.h>
#include <linux/mm.h>
#include <linux/kd.h>
#include <linux/tty.h>
#include <linux/console.h>
#include <linux/interrupt.h>
#include <linux/init.h>
#include <asm/machdep.h>
#include <asm/blinken.h>
#include <asm/io.h>                               /* readb() and writeb() */
#include <asm/hwtest.h>                           /* hwreg_present() */

#include "ints.h"
#include "time.h"

extern void hp300_reset(void);
extern void (*hp300_default_handler[])(int, void *, struct pt_regs *);
extern int hp300_get_irq_list(char *buf);

#ifdef CONFIG_VT
extern int hp300_keyb_init(void);
#else
/* Dummy function for when there is no keyboard. */
int __init hp300_keyb_init(void)
{
}
#endif

#ifdef CONFIG_HEARTBEAT
static void hp300_pulse(int x)
{
   if (x)
      blinken_leds(0xfe);
   else
      blinken_leds(0xff);
}
#endif

static int hp300_kbdrate(struct kbd_repeat *k)
{
  return 0;
}

static void hp300_kbd_leds(unsigned int leds)
{
}

static void hp300_get_model(char *model)
{
  strcpy(model, "HP9000/300");
}

void __init config_hp300(void)
{
  mach_sched_init      = hp300_sched_init;
  mach_keyb_init       = hp300_keyb_init;
  mach_kbdrate         = hp300_kbdrate;
  mach_kbd_leds        = hp300_kbd_leds;
  mach_init_IRQ        = hp300_init_IRQ;
  mach_request_irq     = hp300_request_irq;
  mach_free_irq        = hp300_free_irq;
  mach_get_model       = hp300_get_model;
  mach_get_irq_list    = hp300_get_irq_list;
  mach_gettimeoffset   = hp300_gettimeoffset;
  mach_default_handler = &hp300_default_handler;
#if 0
  mach_gettod          = hp300_gettod;
#endif
  mach_reset           = hp300_reset;
#ifdef CONFIG_HEARTBEAT
  mach_heartbeat       = hp300_pulse;
#endif
#ifdef CONFIG_DUMMY_CONSOLE
  conswitchp	       = &dummy_con;
#endif
  mach_max_dma_address = 0xffffffff;
}
HP300 notes
-----------

The Linux/HP web page is at <http://www.tazenda.demon.co.uk/phil/linux-hp/>

Currently only 9000/340 machines have been tested.  Any amount of RAM should
work now but I've only tried 16MB and 12MB.

The serial console is probably broken at the moment but the Topcat/HIL keyboard
combination seems to work for me.  Your mileage may vary.

The LANCE driver works after a fashion but only if you reset the chip before
every packet.  This doesn't make for very speedy operation.

/*
 *  linux/arch/m68k/hp300/ints.c
 *
 *  Copyright (C) 1998 Philip Blundell <philb@gnu.org>
 *
 *  This file contains the HP300-specific interrupt handling.
 *  We only use the autovector interrupts, and therefore we need to
 *  maintain lists of devices sharing each ipl.
 *  [ipl list code added by Peter Maydell <pmaydell@chiark.greenend.org.uk> 06/1998]
 */

#include <linux/kernel.h>
#include <linux/types.h>
#include <linux/init.h>
#include <linux/sched.h>
#include <linux/kernel_stat.h>
#include <linux/interrupt.h>
#include <linux/spinlock.h>
#include <asm/machdep.h>
#include <asm/irq.h>
#include <asm/io.h>
#include <asm/system.h>
#include <asm/traps.h>
#include <asm/ptrace.h>
#include "ints.h"

/* Each ipl has a linked list of interrupt service routines.
 * Service routines are added via hp300_request_irq() and removed
 * via hp300_free_irq(). The device driver should set IRQ_FLG_FAST
 * if it needs to be serviced early (eg FIFOless UARTs); this will
 * cause it to be added at the front of the queue rather than 
 * the back.
 * Currently IRQ_FLG_SLOW and flags=0 are treated identically; if
 * we needed three levels of priority we could distinguish them
 * but this strikes me as mildly ugly...
 */

/* we start with no entries in any list */
static irq_node_t *hp300_irq_list[HP300_NUM_IRQS] = { [0 ... HP300_NUM_IRQS-1] = NULL };

static spinlock_t irqlist_lock;

/* This handler receives all interrupts, dispatching them to the registered handlers */
static void hp300_int_handler(int irq, void *dev_id, struct pt_regs *fp)
{
        irq_node_t *t;
        /* We just give every handler on the chain an opportunity to handle
         * the interrupt, in priority order.
         */
        for(t = hp300_irq_list[irq]; t; t=t->next)
                t->handler(irq, t->dev_id, fp);
        /* We could put in some accounting routines, checks for stray interrupts,
         * etc, in here. Note that currently we can't tell whether or not
         * a handler handles the interrupt, though. 
         */
}

void (*hp300_default_handler[SYS_IRQS])(int, void *, struct pt_regs *) = {
	hp300_int_handler, hp300_int_handler, hp300_int_handler, hp300_int_handler,
	hp300_int_handler, hp300_int_handler, hp300_int_handler, NULL
};

/* dev_id had better be unique to each handler because it's the only way we have
 * to distinguish handlers when removing them...
 *
 * It would be pretty easy to support IRQ_FLG_LOCK (handler is not replacable)
 * and IRQ_FLG_REPLACE (handler replaces existing one with this dev_id)
 * if we wanted to. IRQ_FLG_FAST is needed for devices where interrupt latency
 * matters (eg the dreaded FIFOless UART...)
 */
int hp300_request_irq(unsigned int irq,
                      void (*handler) (int, void *, struct pt_regs *),
                      unsigned long flags, const char *devname, void *dev_id)
{
        irq_node_t *t, *n = new_irq_node();
        
        if (!n)                                   /* oops, no free nodes */
                return -ENOMEM;

	spin_lock_irqsave(&irqlist_lock, flags);

        if (!hp300_irq_list[irq]) {
                /* no list yet */
                hp300_irq_list[irq] = n;
                n->next = NULL;
        } else if (flags & IRQ_FLG_FAST) {
                /* insert at head of list */
                n->next = hp300_irq_list[irq];
                hp300_irq_list[irq] = n;
        } else {
                /* insert at end of list */
                for(t = hp300_irq_list[irq]; t->next; t = t->next)
                        /* do nothing */;
                n->next = NULL;
                t->next = n;
        }

        /* Fill in n appropriately */
        n->handler = handler;
        n->flags = flags;
        n->dev_id = dev_id;
        n->devname = devname;
	spin_unlock_irqrestore(&irqlist_lock, flags);
	return 0;
}

void hp300_free_irq(unsigned int irq, void *dev_id)
{
        irq_node_t *t;
        unsigned long flags;

        spin_lock_irqsave(&irqlist_lock, flags);
        
        t = hp300_irq_list[irq];
        if (!t)                                   /* no handlers at all for that IRQ */
        {
                printk(KERN_ERR "hp300_free_irq: attempt to remove nonexistent handler for IRQ %d\n", irq);
                spin_unlock_irqrestore(&irqlist_lock, flags);
		return;
        }
        
        if (t->dev_id == dev_id)
        {                                         /* removing first handler on chain */
                t->flags = IRQ_FLG_STD;           /* we probably don't really need these */
                t->dev_id = NULL;
                t->devname = NULL;
                t->handler = NULL;                /* frees this irq_node_t */
                hp300_irq_list[irq] = t->next;
		spin_unlock_irqrestore(&irqlist_lock, flags);
		return;
        }
        
        /* OK, must be removing from middle of the chain */
        
        for (t = hp300_irq_list[irq]; t->next && t->next->dev_id != dev_id; t = t->next)
                /* do nothing */;
        if (!t->next)
        {
                printk(KERN_ERR "hp300_free_irq: attempt to remove nonexistent handler for IRQ %d\n", irq);
		spin_unlock_irqrestore(&irqlist_lock, flags);
		return;
        }
        /* remove the entry after t: */
        t->next->flags = IRQ_FLG_STD;
        t->next->dev_id = t->next->devname = t->next->handler = NULL;
        t->next = t->next->next;
        
	spin_unlock_irqrestore(&irqlist_lock, flags);
}

int hp300_get_irq_list(char *buf)
{
	return 0;
}

void __init hp300_init_IRQ(void)
{
	spin_lock_init(&irqlist_lock);
}
/*
 *  linux/arch/m68k/hp300/hil.c
 *
 *  Copyright (C) 1998 Philip Blundell <philb@gnu.org>
 *
 *  HP300 Human Interface Loop driver.  This handles the keyboard and mouse.
 */

#include <linux/stddef.h>
#include <linux/kernel.h>
#include <linux/sched.h>
#include <linux/init.h>
#include <linux/keyboard.h>
#include <linux/kbd_ll.h>
#include <asm/io.h>
#include <asm/hwtest.h>
#include <asm/ptrace.h>
#include <asm/irq.h>
#include <asm/system.h>

#define HILBASE			0xf0428000
#define HIL_DATA			0x1
#define HIL_CMD			0x3

#define	HIL_BUSY		0x02
#define	HIL_DATA_RDY		0x01

#define hil_busy()		(readb(HILBASE + HIL_CMD) & HIL_BUSY)
#define hil_data_available()	(readb(HILBASE + HIL_CMD) & HIL_DATA_RDY)
#define hil_status()		(readb(HILBASE + HIL_CMD))
#define hil_command(x)		do { writeb((x), HILBASE + HIL_CMD); } while (0)
#define hil_read_data()		(readb(HILBASE + HIL_DATA))
#define hil_write_data(x)	do { writeb((x), HILBASE + HIL_DATA); } while (0)

#define	HIL_SETARD		0xA0		/* set auto-repeat delay */
#define	HIL_SETARR		0xA2		/* set auto-repeat rate */
#define	HIL_SETTONE		0xA3		/* set tone generator */
#define	HIL_CNMT		0xB2		/* clear nmi */
#define	HIL_INTON		0x5C		/* Turn on interrupts. */
#define	HIL_INTOFF		0x5D		/* Turn off interrupts. */
#define	HIL_TRIGGER		0xC5		/* trigger command */
#define	HIL_STARTCMD		0xE0		/* start loop command */
#define	HIL_TIMEOUT		0xFE		/* timeout */
#define	HIL_READTIME		0x13		/* Read real time register */

#define	HIL_READBUSY		0x02		/* internal "busy" register */
#define	HIL_READKBDLANG		0x12		/* read keyboard language code */
#define	HIL_READKBDSADR	 	0xF9
#define	HIL_WRITEKBDSADR 	0xE9
#define	HIL_READLPSTAT  	0xFA
#define	HIL_WRITELPSTAT 	0xEA
#define	HIL_READLPCTRL  	0xFB
#define	HIL_WRITELPCTRL 	0xEB

#define HIL_IRQ			1

#define plain_map		hp_plain_map
#define shift_map		hp_shift_map
#define altgr_map		hp_altgr_map
#define ctrl_map		hp_ctrl_map
#define shift_ctrl_map		hp_shift_ctrl_map
#define alt_map			hp_alt_map
#define ctrl_alt_map		hp_ctrl_alt_map

u_short plain_map[NR_KEYS] = {
	0xf200,	0xf200,	0xf703,	0xf703,	0xf700,	0xf700,	0xf702,	0xf200,
	0xf200,	0xf200,	0xf200,	0xf200,	0xf200,	0xf200,	0xf200,	0xf200,
	0xf200,	0xf200,	0xf200,	0xf200,	0xf200,	0xf200,	0xf200,	0xf200,
	0xfb62,	0xfb76,	0xfb63,	0xfb78,	0xfb7a,	0xf200,	0xf200,	0xf01b,
	0xf200,	0xf200,	0xf200,	0xf200,	0xf200,	0xf200,	0xf200,	0xf200,
	0xfb68,	0xfb67,	0xfb66,	0xfb64,	0xfb73,	0xfb61,	0xf200,	0xf207,
	0xfb75,	0xfb79,	0xfb74,	0xfb72,	0xfb65,	0xfb77,	0xfb71,	0xf009,
	0xf037,	0xf036,	0xf035,	0xf034,	0xf033,	0xf032,	0xf031,	0xf060,
	0xf200,	0xf200,	0xf200,	0xf200,	0xf200,	0xf200,	0xf200,	0xf200,
	0xf200,	0xf103,	0xf102,	0xf101,	0xf100,	0xf200,	0xf200,	0xf200,
	0xf200,	0xf104,	0xf105,	0xf106,	0xf107,	0xf200,	0xf200,	0xf200,
	0xf038,	0xf039,	0xf030,	0xf02d,	0xf03d,	0xf008,	0xf200,	0xf200,
	0xfb69,	0xfb6f,	0xfb70,	0xf05b,	0xf05d,	0xf05c,	0xf200,	0xf200,
	0xfb6a,	0xfb6b,	0xfb6c,	0xf03b,	0xf027,	0xf201,	0xf200,	0xf200,
	0xfb6d,	0xf02c,	0xf02e,	0xf02f,	0xf200,	0xf200,	0xf200,	0xf200,
	0xfb6e,	0xf020,	0xf200,	0xf200,	0xf601,	0xf600,	0xf603,	0xf602,
};

u_short shift_map[NR_KEYS] = {
	0xf200,	0xf200,	0xf703,	0xf703,	0xf700,	0xf700,	0xf702,	0xf200,
	0xf200,	0xf200,	0xf200,	0xf200,	0xf200,	0xf200,	0xf200,	0xf200,
	0xf200,	0xf200,	0xf200,	0xf200,	0xf200,	0xf200,	0xf200,	0xf200,
	0xfb42,	0xfb56,	0xfb43,	0xfb58,	0xfb5a,	0xf200,	0xf200,	0xf07f,
	0xf200,	0xf200,	0xf200,	0xf200,	0xf200,	0xf200,	0xf200,	0xf200,
	0xfb48,	0xfb47,	0xfb46,	0xfb44,	0xfb53,	0xfb41,	0xf200,	0xf207,
	0xfb55,	0xfb59,	0xfb54,	0xfb52,	0xfb45,	0xfb57,	0xfb51,	0xf009,
	0xf026,	0xf05e,	0xf025,	0xf024,	0xf023,	0xf040,	0xf021,	0xf07e,
	0xf200,	0xf200,	0xf200,	0xf200,	0xf200,	0xf200,	0xf200,	0xf200,
	0xf200,	0xf103,	0xf102,	0xf101,	0xf100,	0xf200,	0xf200,	0xf200,
	0xf200,	0xf104,	0xf105,	0xf106,	0xf107,	0xf200,	0xf200,	0xf200,
	0xf02a,	0xf028,	0xf029,	0xf05f,	0xf02b,	0xf200,	0xf200,	0xf200,
	0xfb49,	0xfb4f,	0xfb50,	0xf07b,	0xf07d,	0xf07c,	0xf200,	0xf200,
	0xfb4a,	0xfb4b,	0xfb4c,	0xf03a,	0xf022,	0xf201,	0xf200,	0xf200,
	0xfb4d,	0xf03c,	0xf03e,	0xf03f,	0xf200,	0xf200,	0xf200,	0xf200,
	0xfb4e,	0xf020,	0xf200,	0xf200,	0xf601,	0xf600,	0xf603,	0xf602,
};

u_short altgr_map[NR_KEYS] = {
	0xf200,	0xf200,	0xf703,	0xf703,	0xf700,	0xf700,	0xf702,	0xf200,
	0xf200,	0xf200,	0xf200,	0xf200,	0xf200,	0xf200,	0xf200,	0xf200,
	0xf200,	0xf200,	0xf200,	0xf200,	0xf200,	0xf200,	0xf200,	0xf200,
	0xfb62,	0xfb76,	0xfb63,	0xfb78,	0xfb7a,	0xf200,	0xf200,	0xf200,
	0xf200,	0xf200,	0xf200,	0xf200,	0xf200,	0xf200,	0xf200,	0xf200,
	0xfb68,	0xfb67,	0xfb66,	0xfb64,	0xfb73,	0xfb61,	0xf200,	0xf207,
	0xfb75,	0xfb79,	0xfb74,	0xfb72,	0xfb65,	0xfb77,	0xfb71,	0xf200,
	0xf200,	0xf200,	0xf200,	0xf200,	0xf200,	0xf040,	0xf021,	0xf200,
	0xf200,	0xf200,	0xf200,	0xf200,	0xf200,	0xf200,	0xf200,	0xf200,
	0xf200,	0xf103,	0xf102,	0xf101,	0xf100,	0xf200,	0xf200,	0xf200,
	0xf200,	0xf104,	0xf105,	0xf106,	0xf107,	0xf200,	0xf200,	0xf200,
	0xf02a,	0xf05b,	0xf05d,	0xf200,	0xf200,	0xf200,	0xf200,	0xf200,
	0xfb69,	0xfb6f,	0xfb70,	0xf200,	0xf200,	0xf200,	0xf200,	0xf200,
	0xfb6a,	0xfb6b,	0xfb6c,	0xf200,	0xf200,	0xf201,	0xf200,	0xf200,
	0xfb6d,	0xf200,	0xf200,	0xf200,	0xf200,	0xf200,	0xf200,	0xf200,
	0xfb6e,	0xf200,	0xf200,	0xf200,	0xf601,	0xf600,	0xf603,	0xf602,
};

u_short ctrl_map[NR_KEYS] = {
	0xf200,	0xf200,	0xf703,	0xf703,	0xf700,	0xf700,	0xf702,	0xf200,
	0xf200,	0xf200,	0xf200,	0xf200,	0xf200,	0xf200,	0xf200,	0xf200,
	0xf200,	0xf200,	0xf200,	0xf200,	0xf200,	0xf200,	0xf200,	0xf200,
	0xf002,	0xf016,	0xf003,	0xf018,	0xf01a,	0xf200,	0xf200,	0xf200,
	0xf200,	0xf200,	0xf200,	0xf200,	0xf200,	0xf200,	0xf200,	0xf200,
	0xf008,	0xf007,	0xf006,	0xf004,	0xf013,	0xf001,	0xf200,	0xf207,
	0xf015,	0xf019,	0xf014,	0xf012,	0xf005,	0xf017,	0xf011,	0xf200,
	0xf200,	0xf200,	0xf200,	0xf200,	0xf200,	0xf200,	0xf200,	0xf000,
	0xf200,	0xf200,	0xf200,	0xf200,	0xf200,	0xf200,	0xf200,	0xf200,
	0xf200,	0xf503,	0xf502,	0xf501,	0xf500,	0xf200,	0xf200,	0xf200,
	0xf200,	0xf504,	0xf505,	0xf506,	0xf507,	0xf200,	0xf200,	0xf200,
	0xf200,	0xf200,	0xf200,	0xf200,	0xf200,	0xf200,	0xf200,	0xf200,
	0xf009,	0xf00f,	0xf010,	0xf200,	0xf200,	0xf01c,	0xf200,	0xf200,
	0xf00a,	0xf00b,	0xf00c,	0xf200,	0xf007,	0xf201,	0xf200,	0xf200,
	0xf00d,	0xf200,	0xf200,	0xf200,	0xf200,	0xf200,	0xf200,	0xf200,
	0xf00e,	0xf200,	0xf200,	0xf200,	0xf601,	0xf600,	0xf603,	0xf602,
};

u_short shift_ctrl_map[NR_KEYS] = {
	0xf200,	0xf200,	0xf703,	0xf703,	0xf700,	0xf700,	0xf702,	0xf200,
	0xf200,	0xf200,	0xf200,	0xf200,	0xf200,	0xf200,	0xf200,	0xf200,
	0xf200,	0xf200,	0xf200,	0xf200,	0xf200,	0xf200,	0xf200,	0xf200,
	0xf002,	0xf016,	0xf003,	0xf018,	0xf01a,	0xf200,	0xf200,	0xf200,
	0xf200,	0xf200,	0xf200,	0xf200,	0xf200,	0xf200,	0xf200,	0xf200,
	0xf008,	0xf007,	0xf006,	0xf004,	0xf013,	0xf001,	0xf200,	0xf207,
	0xf015,	0xf019,	0xf014,	0xf012,	0xf005,	0xf017,	0xf011,	0xf200,
	0xf200,	0xf200,	0xf200,	0xf200,	0xf200,	0xf200,	0xf200,	0xf200,
	0xf200,	0xf200,	0xf200,	0xf200,	0xf200,	0xf200,	0xf200,	0xf200,
	0xf200,	0xf103,	0xf102,	0xf101,	0xf100,	0xf200,	0xf200,	0xf200,
	0xf200,	0xf104,	0xf105,	0xf106,	0xf107,	0xf200,	0xf200,	0xf200,
	0xf200,	0xf200,	0xf200,	0xf200,	0xf200,	0xf200,	0xf200,	0xf200,
	0xf009,	0xf00f,	0xf010,	0xf200,	0xf200,	0xf200,	0xf200,	0xf200,
	0xf00a,	0xf00b,	0xf00c,	0xf200,	0xf200,	0xf201,	0xf200,	0xf200,
	0xf00d,	0xf200,	0xf200,	0xf200,	0xf200,	0xf200,	0xf200,	0xf200,
	0xf00e,	0xf200,	0xf200,	0xf200,	0xf601,	0xf600,	0xf603,	0xf602,
};

u_short alt_map[NR_KEYS] = {
	0xf200,	0xf200,	0xf703,	0xf703,	0xf700,	0xf700,	0xf702,	0xf200,
	0xf200,	0xf200,	0xf200,	0xf200,	0xf200,	0xf200,	0xf200,	0xf200,
	0xf200,	0xf200,	0xf200,	0xf200,	0xf200,	0xf200,	0xf200,	0xf200,
	0xf862,	0xf876,	0xf863,	0xf878,	0xf87a,	0xf200,	0xf200,	0xf200,
	0xf200,	0xf200,	0xf200,	0xf200,	0xf200,	0xf200,	0xf200,	0xf200,
	0xf868,	0xf867,	0xf866,	0xf864,	0xf873,	0xf861,	0xf200,	0xf207,
	0xf875,	0xf879,	0xf874,	0xf872,	0xf865,	0xf877,	0xf871,	0xf809,
	0xf200,	0xf200,	0xf200,	0xf200,	0xf200,	0xf200,	0xf200,	0xf860,
	0xf200,	0xf200,	0xf200,	0xf200,	0xf200,	0xf200,	0xf200,	0xf200,
	0xf200,	0xf103,	0xf102,	0xf101,	0xf100,	0xf200,	0xf200,	0xf200,
	0xf200,	0xf104,	0xf105,	0xf106,	0xf107,	0xf200,	0xf200,	0xf200,
	0xf200,	0xf200,	0xf200,	0xf200,	0xf200,	0xf200,	0xf200,	0xf200,
	0xf869,	0xf86f,	0xf870,	0xf200,	0xf200,	0xf85c,	0xf200,	0xf200,
	0xf86a,	0xf86b,	0xf86c,	0xf83b,	0xf827,	0xf201,	0xf200,	0xf200,
	0xf86d,	0xf200,	0xf200,	0xf200,	0xf200,	0xf200,	0xf200,	0xf200,
	0xf86e,	0xf200,	0xf200,	0xf200,	0xf601,	0xf600,	0xf603,	0xf602,
};

u_short ctrl_alt_map[NR_KEYS] = {
	0xf200,	0xf200,	0xf703,	0xf703,	0xf700,	0xf700,	0xf702,	0xf200,
	0xf200,	0xf200,	0xf200,	0xf200,	0xf200,	0xf200,	0xf200,	0xf200,
	0xf200,	0xf200,	0xf200,	0xf200,	0xf200,	0xf200,	0xf200,	0xf200,
	0xf802,	0xf816,	0xf803,	0xf818,	0xf81a,	0xf200,	0xf200,	0xf200,
	0xf200,	0xf200,	0xf200,	0xf200,	0xf200,	0xf200,	0xf200,	0xf200,
	0xf808,	0xf807,	0xf806,	0xf804,	0xf813,	0xf801,	0xf200,	0xf207,
	0xf815,	0xf819,	0xf814,	0xf812,	0xf805,	0xf817,	0xf811,	0xf200,
	0xf200,	0xf200,	0xf200,	0xf200,	0xf200,	0xf200,	0xf200,	0xf200,
	0xf200,	0xf200,	0xf200,	0xf200,	0xf200,	0xf200,	0xf200,	0xf200,
	0xf200,	0xf103,	0xf102,	0xf101,	0xf100,	0xf200,	0xf200,	0xf200,
	0xf200,	0xf104,	0xf105,	0xf106,	0xf107,	0xf200,	0xf200,	0xf200,
	0xf200,	0xf200,	0xf200,	0xf200,	0xf200,	0xf200,	0xf200,	0xf200,
	0xf809,	0xf80f,	0xf810,	0xf200,	0xf200,	0xf200,	0xf200,	0xf200,
	0xf80a,	0xf80b,	0xf80c,	0xf200,	0xf200,	0xf201,	0xf200,	0xf200,
	0xf80d,	0xf200,	0xf200,	0xf200,	0xf200,	0xf200,	0xf200,	0xf200,
	0xf80e,	0xf200,	0xf200,	0xf200,	0xf601,	0xf600,	0xf603,	0xf602,
};

#undef plain_map
#undef ctrl_alt_map
#undef shift_map
#undef altgr_map
#undef ctrl_map
#undef shift_ctrl_map
#undef alt_map

struct {
  unsigned char s, c;
  int valid;
} hil_last;

#define hil_getlast(s,c)  do { s = hil_last.s; c = hil_last.c; hil_last.valid = 0; } while (0)

struct {
  unsigned char data[16];
  unsigned int ptr;
} poll;

unsigned char curdev = 0;

static void poll_finished(void)
{
  switch (poll.data[0])
  {
  case 0x40:
    {
      int down = (poll.data[1] & 1) == 0;
      unsigned char scode = poll.data[1] >> 1;
#if 0
      if (down)
	printk("[%02x]", scode);
#endif
      handle_scancode(scode, down);
    }
    break;
  }
  curdev = 0;
}

static inline void handle_status(unsigned char s, unsigned char c)
{
  if (c & 0x8) {
    /* End of block */
    if (c & 0x10)
      poll_finished();
  } else {
    if (c & 0x10) {
      if (curdev)
	poll_finished();		/* just in case */
      curdev = c & 7;
      poll.ptr = 0;
    }
  }
}

static inline void handle_data(unsigned char s, unsigned char c)
{
  if (curdev)
    poll.data[poll.ptr++] = c;
}

/* 
 * Handle HIL interrupts.
 */

static void hil_interrupt(int irq, void *handle, struct pt_regs *regs)
{
  unsigned char s, c;
  s = hil_status(); c = hil_read_data();
  switch (s >> 4)
  {
  case 0x5:
    handle_status(s, c);
    break;
  case 0x6:
    handle_data(s, c);
    break;
  case 0x4:
    hil_last.s = s;
    hil_last.c = c;
    mb();
    hil_last.valid = 1;
    break;
  }
}

/*
 * Send a command to the HIL
 */

static void hil_do(unsigned char cmd, unsigned char *data, unsigned int len)
{
  unsigned long flags;
  save_flags(flags); cli();
  while (hil_busy());
  hil_command(cmd);
  while (len--) {
    while (hil_busy());
    hil_write_data(*(data++));
  }
  restore_flags(flags);
}

/*
 * Initialise HIL. 
 */

int __init hp300_keyb_init(void)
{
  unsigned char s, c, kbid;
  unsigned int n = 0;

  memcpy(key_maps[0], hp_plain_map, sizeof(plain_map));
  memcpy(key_maps[1], hp_shift_map, sizeof(plain_map));
  memcpy(key_maps[4], hp_ctrl_map, sizeof(plain_map));

  if (!hwreg_present((void *)(HILBASE + HIL_DATA)))
    return 1;		/* maybe this can happen */

  request_irq(HIL_IRQ, hil_interrupt, 0, "HIL", NULL);

  /* Turn on interrupts */
  hil_do(HIL_INTON, NULL, 0);

  /* Look for keyboards */
  hil_do(HIL_READKBDSADR, NULL, 0);
  while (!hil_last.valid) {
    if (n++ > 100000) {
      printk("HIL: timed out, assuming no keyboard present.\n");
      return 1;
    }
    mb();
  }
  hil_getlast(s, c);
  if (c == 0) {
    printk("HIL: no keyboard present.\n");
    return 1;
  }
  for (kbid = 0; (kbid < 8) && ((c & (1<<kbid)) == 0); kbid++);
  printk("HIL: keyboard found at id %d\n", kbid);
  /* set it to raw mode */
  c = 0;
  hil_do(HIL_WRITEKBDSADR, &c, 1);
  return 0;
}
# HP300 kernel keymap. This uses 7 modifier combinations.
keymaps 0-2,4-5,8,12
# Change the above line into
#	keymaps 0-2,4-6,8,12
# in case you want the entries
#	altgr   control keycode  83 = Boot            
#	altgr   control keycode 111 = Boot            
# below.
#
# In fact AltGr is used very little, and one more keymap can
# be saved by mapping AltGr to Alt (and adapting a few entries):
# keycode 100 = Alt
#
keycode   1 = 
keycode   2 = Alt
keycode   3 = Alt
keycode   4 = Shift
keycode   5 = Shift
keycode   6 = Control
keycode   7 = 
keycode   8 = 
keycode   9 = 
keycode  10 = 
keycode  11 = 
keycode  12 = 
keycode  13 = 
keycode  14 =
keycode  15 = 
keycode  16 =
keycode  17 =
keycode  18 =
keycode  19 =
keycode  20 =
keycode  21 =
keycode  22 =
keycode  23 =
keycode  24 = b               
keycode  25 = v               
keycode  26 = c
keycode  27 = x
keycode  28 = z
keycode  29 = 
keycode  30 =
keycode  31 = Escape		Delete
keycode  32 =
keycode  33 =
keycode  34 =
keycode  35 =
keycode  36 =
keycode  37 =
keycode  38 =
keycode  39 =
keycode  40 = h
keycode  41 = g
keycode  42 = f
keycode  43 = d
keycode  44 = s
keycode  45 = a               
keycode  46 =
keycode  47 = Caps_Lock
keycode  48 = u
keycode  49 = y
keycode  50 = t
keycode  51 = r
keycode  52 = e
keycode  53 = w
keycode  54 = q
keycode  55 = Tab		Tab             
	alt     keycode    55 = Meta_Tab        
keycode  56 = seven		ampersand
keycode  57 = six		asciicircum
keycode  58 = five		percent
keycode  59 = four		dollar
keycode  60 = three		numbersign
keycode  61 = two		at		at
keycode  62 = one		exclam		exclam
keycode  63 = grave		asciitilde      
	control keycode    63 = nul             
	alt     keycode    63 = Meta_grave      
keycode  64 =        
keycode  65 = 
keycode  66 = 
keycode  67 = 
keycode  68 = 
keycode  69 = 
keycode  70 = 
keycode  71 = 
keycode  72 =
keycode  73 = F4       
	control keycode	   73 = Console_4
keycode  74 = F3
	control keycode	   74 = Console_3
keycode  75 = F2
	control keycode	   75 = Console_2
keycode  76 = F1
	control keycode	   76 = Console_1
keycode  77 =
keycode  78 =
keycode  79 =
keycode  80 =
keycode  81 = F5
	control keycode	   81 = Console_5
keycode  82 = F6
	control keycode	   82 = Console_6
keycode  83 = F7
	control keycode	   83 = Console_7
keycode  84 = F8
	control keycode	   84 = Console_8
keycode  85 =
keycode  86 = 
keycode  87 = 
keycode  88 = eight		asterisk	asterisk
keycode  89 = nine		parenleft	bracketleft
keycode  90 = zero		parenright	bracketright
keycode  91 = minus		underscore
keycode  92 = equal		plus
keycode  93 = BackSpace
keycode  94 =
keycode  95 =
keycode  96 = i
keycode  97 = o
keycode  98 = p
keycode  99 = bracketleft	braceleft
keycode 100 = bracketright	braceright
keycode 101 = backslash		bar             
	control keycode   101 = Control_backslash
	alt     keycode   101 = Meta_backslash  
keycode 102 = 
keycode 103 = 
keycode 104 = j
keycode 105 = k
keycode 106 = l
keycode 107 = semicolon		colon
	alt     keycode   107 = Meta_semicolon  
keycode 108 = apostrophe	quotedbl        
	control keycode   108 = Control_g       
	alt     keycode   108 = Meta_apostrophe 
keycode 109 = Return
keycode 110 = 
keycode 111 = 
keycode 112 = m
keycode 113 = comma		less
keycode 114 = period		greater
keycode 115 = slash		question
keycode 116 = 
keycode 117 = 
keycode 118 = 
keycode 119 = 
keycode 120 = n
keycode 121 = space		space
keycode 122 =
keycode 123 =
keycode 124 = Left
keycode 125 = Down
keycode 126 = Up
keycode 127 = Right
string F1 = "\033[[A"
string F2 = "\033[[B"
string F3 = "\033[[C"
string F4 = "\033[[D"
string F5 = "\033[[E"
string F6 = "\033[17~"
string F7 = "\033[18~"
string F8 = "\033[19~"
string F9 = "\033[20~"
string F10 = "\033[21~"
string F11 = "\033[23~"
string F12 = "\033[24~"
string F13 = "\033[25~"
string F14 = "\033[26~"
string F15 = "\033[28~"
string F16 = "\033[29~"
string F17 = "\033[31~"
string F18 = "\033[32~"
string F19 = "\033[33~"
string F20 = "\033[34~"
string Find = "\033[1~"
string Insert = "\033[2~"
string Remove = "\033[3~"
string Select = "\033[4~"
string Prior = "\033[5~"
string Next = "\033[6~"
string Macro = "\033[M"
string Pause = "\033[P"
compose '`' 'A' to '�'
compose '`' 'a' to '�'
compose '\'' 'A' to '�'
compose '\'' 'a' to '�'
compose '^' 'A' to '�'
compose '^' 'a' to '�'
compose '~' 'A' to '�'
compose '~' 'a' to '�'
compose '"' 'A' to '�'
compose '"' 'a' to '�'
compose 'O' 'A' to '�'
compose 'o' 'a' to '�'
compose '0' 'A' to '�'
compose '0' 'a' to '�'
compose 'A' 'A' to '�'
compose 'a' 'a' to '�'
compose 'A' 'E' to '�'
compose 'a' 'e' to '�'
compose ',' 'C' to '�'
compose ',' 'c' to '�'
compose '`' 'E' to '�'
compose '`' 'e' to '�'
compose '\'' 'E' to '�'
compose '\'' 'e' to '�'
compose '^' 'E' to '�'
compose '^' 'e' to '�'
compose '"' 'E' to '�'
compose '"' 'e' to '�'
compose '`' 'I' to '�'
compose '`' 'i' to '�'
compose '\'' 'I' to '�'
compose '\'' 'i' to '�'
compose '^' 'I' to '�'
compose '^' 'i' to '�'
compose '"' 'I' to '�'
compose '"' 'i' to '�'
compose '-' 'D' to '�'
compose '-' 'd' to '�'
compose '~' 'N' to '�'
compose '~' 'n' to '�'
compose '`' 'O' to '�'
compose '`' 'o' to '�'
compose '\'' 'O' to '�'
compose '\'' 'o' to '�'
compose '^' 'O' to '�'
compose '^' 'o' to '�'
compose '~' 'O' to '�'
compose '~' 'o' to '�'
compose '"' 'O' to '�'
compose '"' 'o' to '�'
compose '/' 'O' to '�'
compose '/' 'o' to '�'
compose '`' 'U' to '�'
compose '`' 'u' to '�'
compose '\'' 'U' to '�'
compose '\'' 'u' to '�'
compose '^' 'U' to '�'
compose '^' 'u' to '�'
compose '"' 'U' to '�'
compose '"' 'u' to '�'
compose '\'' 'Y' to '�'
compose '\'' 'y' to '�'
compose 'T' 'H' to '�'
compose 't' 'h' to '�'
compose 's' 's' to '�'
compose '"' 'y' to '�'
compose 's' 'z' to '�'
compose 'i' 'j' to '�'
extern void hp300_init_IRQ(void);
extern void (*hp300_handlers[8])(int, void *, struct pt_regs *);
extern void hp300_free_irq(unsigned int irq, void *dev_id);
extern int hp300_request_irq(unsigned int irq,
		void (*handler) (int, void *, struct pt_regs *),
		unsigned long flags, const char *devname, void *dev_id);

/* number of interrupts, includes 0 (what's that?) */
#define HP300_NUM_IRQS 8
/*
 * This file is subject to the terms and conditions of the GNU General Public
 * License.  See the file "COPYING" in the main directory of this archive
 * for more details.
 *
 * SGI IP27 specific setup.
 *
 * Copyright (C) 1999, 2000 Ralf Baechle (ralf@gnu.org)
 * Copyright (C) 1999, 2000 Silcon Graphics, Inc.
 */
#include <linux/config.h>
#include <linux/init.h>
#include <linux/kernel.h>
#include <linux/spinlock.h>
#include <linux/sched.h>
#include <linux/smp.h>

#include <asm/io.h>
#include <asm/sn/types.h>
#include <asm/sn/sn0/addrs.h>
#include <asm/sn/sn0/hubni.h>
#include <asm/sn/sn0/hubio.h>
#include <asm/sn/klconfig.h>
#include <asm/sn/ioc3.h>
#include <asm/time.h>
#include <asm/mipsregs.h>
#include <asm/sn/arch.h>
#include <asm/sn/sn_private.h>
#include <asm/pci/bridge.h>
#include <asm/paccess.h>
#include <asm/sn/sn0/ip27.h>

/* Check against user dumbness.  */
#ifdef CONFIG_VT
#error CONFIG_VT not allowed for IP27.
#endif

#undef DEBUG_SETUP
#ifdef DEBUG_SETUP
#define DBG(x...) printk(x)
#else
#define DBG(x...)
#endif

/*
 * get_nasid() returns the physical node id number of the caller.
 */
nasid_t
get_nasid(void)
{
	return (nasid_t)((LOCAL_HUB_L(NI_STATUS_REV_ID) & NSRI_NODEID_MASK)
	                 >> NSRI_NODEID_SHFT);
}

/* Extracted from the IOC3 meta driver.  FIXME.  */
static inline void ioc3_sio_init(void)
{
	struct ioc3 *ioc3;
	nasid_t nid;
        long loops;

	nid = get_nasid();
	ioc3 = (struct ioc3 *) KL_CONFIG_CH_CONS_INFO(nid)->memory_base;

	ioc3->sscr_a = 0;			/* PIO mode for uarta.  */
	ioc3->sscr_b = 0;			/* PIO mode for uartb.  */
	ioc3->sio_iec = ~0;
	ioc3->sio_ies = (SIO_IR_SA_INT | SIO_IR_SB_INT);

	loops=1000000; while(loops--);
	ioc3->sregs.uarta.iu_fcr = 0;
	ioc3->sregs.uartb.iu_fcr = 0;
	loops=1000000; while(loops--);
}

static inline void ioc3_eth_init(void)
{
	struct ioc3 *ioc3;
	nasid_t nid;

	nid = get_nasid();
	ioc3 = (struct ioc3 *) KL_CONFIG_CH_CONS_INFO(nid)->memory_base;

	ioc3->eier = 0;
}

/* Try to catch kernel missconfigurations and give user an indication what
   option to select.  */
static void __init verify_mode(void)
{
	int n_mode;

	n_mode = LOCAL_HUB_L(NI_STATUS_REV_ID) & NSRI_MORENODES_MASK;
	printk("Machine is in %c mode.\n", n_mode ? 'N' : 'M');
#ifdef CONFIG_SGI_SN0_N_MODE
	if (!n_mode)
		panic("Kernel compiled for M mode.");
#else
	if (n_mode)
		panic("Kernel compiled for N mode.");
#endif
}

#define XBOW_WIDGET_PART_NUM    0x0
#define XXBOW_WIDGET_PART_NUM   0xd000          /* Xbridge */
#define BASE_XBOW_PORT  	8     /* Lowest external port */

unsigned int bus_to_cpu[256];
unsigned long bus_to_baddr[256];

void __init pcibr_setup(cnodeid_t nid)
{
	int 			i, start, num;
	unsigned long		masterwid;
	bridge_t 		*bridge; 
	volatile u64 		hubreg;
	nasid_t	 		nasid, masternasid;
	xwidget_part_num_t	partnum;
	widgetreg_t 		widget_id;
	static spinlock_t	pcibr_setup_lock = SPIN_LOCK_UNLOCKED;

	/*
	 * If the master is doing this for headless node, nothing to do.
	 * This is because currently we require at least one of the hubs
	 * (master hub) connected to the xbow to have at least one enabled 
	 * cpu to receive intrs. Else we need an array bus_to_intrnasid[] 
	 * that bridge_startup() needs to use to target intrs. All dma is
	 * routed thru the widget of the master hub. The master hub wid
	 * is selectable by WIDGET_A below.
	 */
	if (nid != get_compact_nodeid())
		return;
	/*
	 * find what's on our local node
	 */
	spin_lock(&pcibr_setup_lock);
	start = num_bridges;		/* Remember where we start from */
	nasid = COMPACT_TO_NASID_NODEID(nid);
	hubreg = REMOTE_HUB_L(nasid, IIO_LLP_CSR);
	if (hubreg & IIO_LLP_CSR_IS_UP) {
		/* link is up */
		widget_id = *(volatile widgetreg_t *)
                        (RAW_NODE_SWIN_BASE(nasid, 0x0) + WIDGET_ID);
		partnum = XWIDGET_PART_NUM(widget_id);
		printk("Cpu %d, Nasid 0x%x, pcibr_setup(): found partnum= 0x%x",
					smp_processor_id(), nasid, partnum);
		if (partnum == BRIDGE_WIDGET_PART_NUM) {
			/*
			 * found direct connected bridge so must be Origin200
			 */
			printk("...is bridge\n");
			num_bridges = 1;
        		b/*
 *  linux/arch/m68k/hp300/ksyms.c
 *
 *  Copyright (C) 1998 Philip Blundell <philb@gnu.org>
 *
 *  This file contains the HP300-specific kernel symbols.  None yet. :-)
 */

#include <linux/module.h>
/*
 *  linux/arch/m68k/hp300/reboot.S
 *
 *  Copyright (C) 1998 Philip Blundell <philb@gnu.org>
 *
 *  Do the dirty work of rebooting the machine.  Basically we need to undo all the
 *  good stuff that head.S did when we started up.  The caches and MMU must be
 *  disabled and then we jump back to the PROM.  This is a bit gruesome but we put
 *  a brave face on it.
 */

/* XXX Doesn't work yet.  Not sure why and can't be bothered to fix it at the moment. */

	.globl	hp300_reset
hp300_reset:
	.chip	68030
	oriw    #0x0700,%sr			/* cli() */
	movel	hp300_phys_ram_base, %d1
	movel	#0, %d0
	movec	%d0, %vbr			/* reset vector table */
	lea	zero, %a0
	lea	1f, %a1
	add	%d1, %a0
	add	%d1, %a1
	pmove	%tc, %a0@
	bclr	#7, %a0@
	pmove	%a0@, %tc			/* goodbye MMU */
	jmp	%a1@
1:	movel	#0x808, %d0
	movec	%d0, %cacr			/* cache off */
	moveb	#0, 0x1ffff
	movel	#0x1a4, %a0
	jmp	%a0@

zero:	.quad	0
extern void hp300_sched_init(void (*vector)(int, void *, struct pt_regs *));
extern unsigned long hp300_gettimeoffset (void);


#
# Makefile for Linux arch/m68k/mac source directory
#
# Note! Dependencies are done automagically by 'make dep', which also
# removes any old dependencies. DON'T put your own dependencies here
# unless it's something special (ie not a .c file).
#
# Note 2! The CFLAGS definitions are now in the main makefile...

O_TARGET := mac.o

export-objs	:= mac_ksyms.o

obj-y		:= config.o bootparse.o macints.o iop.o via.o oss.o psc.o \
			baboon.o macboing.o debug.o misc.o mac_ksyms.o

include $(TOPDIR)/Rules.make
/*
 *  linux/arch/m68k/mac/config.c
 *
 * This file is subject to the terms and conditions of the GNU General Public
 * License.  See the file COPYING in the main directory of this archive
 * for more details.
 */

/*
 * Miscellaneous linux stuff
 */

#include <linux/config.h>
#include <linux/types.h>
#include <linux/mm.h>
#include <linux/tty.h>
#include <linux/console.h>
#include <linux/interrupt.h>
/* keyb */
#include <linux/random.h>
#include <linux/delay.h>
/* keyb */
#include <linux/init.h>

#define BOOTINFO_COMPAT_1_0
#include <asm/setup.h>
#include <asm/bootinfo.h>

#include <asm/system.h>
#include <asm/io.h>
#include <asm/irq.h>
#include <asm/pgtable.h>
#include <asm/rtc.h>
#include <asm/machdep.h>

#include <asm/macintosh.h>
#include <asm/macints.h>
#include <asm/machw.h>

#include <asm/mac_iop.h>
#include <asm/mac_via.h>
#include <asm/mac_oss.h>
#include <asm/mac_psc.h>

/* Mac bootinfo struct */

struct mac_booter_data mac_bi_data = {0,};
int mac_bisize = sizeof mac_bi_data;

/* New m68k bootinfo stuff and videobase */

extern int m68k_num_memory;
extern struct mem_info m68k_memory[NUM_MEMINFO];

extern struct mem_info m68k_ramdisk;

extern char m68k_command_line[CL_SIZE];

void *mac_env;		/* Loaded by the boot asm */

/* The phys. video addr. - might be bogus on some machines */
unsigned long mac_orig_videoaddr;

/* Mac specific timer functions */
extern void mac_gettod (int *, int *, int *, int *, int *, int *);
extern unsigned long mac_gettimeoffset (void);
extern int mac_hwclk (int, struct hwclk_time *);
extern int mac_set_clock_mmss (unsigned long);
extern int mac_get_irq_list(char *);
extern void iop_preinit(void);
extern void iop_init(void);
extern void via_init(void);
extern void via_init_clock(void (*func)(int, void *, struct pt_regs *));
extern void via_flush_cache(void);
extern void oss_init(void);
extern void psc_init(void);
extern void baboon_init(void);

extern void (*kd_mksound)(unsigned int, unsigned int);
extern void mac_mksound(unsigned int, unsigned int);

extern void nubus_sweep_video(void);

/* Mac specific debug functions (in debug.c) */
extern void mac_debug_init(void);
extern void mac_debugging_long(int, long);

extern void (*kd_mksound)(unsigned int, unsigned int);

extern int mackbd_init_hw(void);
extern void mackbd_leds(unsigned int leds);
extern int mackbd_translate(unsigned char keycode, unsigned char *keycodep, char raw_mode);

extern void mac_hid_init_hw(void);
extern int mac_hid_kbd_translate(unsigned char scancode, unsigned char *keycode, char raw_mode);

#ifdef CONFIG_MAGIC_SYSRQ
extern unsigned char mac_hid_kbd_sysrq_xlate[128];
extern unsigned char pckbd_sysrq_xlate[128];
extern unsigned char mackbd_sysrq_xlate[128];
#endif /* CONFIG_MAGIC_SYSRQ */

static void mac_get_model(char *str);

void mac_bang(int irq, void *vector, struct pt_regs *p)
{
	printk("Resetting ...\n");
	mac_reset();
}

static void mac_sched_init(void (*vector)(int, void *, struct pt_regs *))
{
	via_init_clock(vector);
}

#if 0
void mac_waitbut (void)
{
	;
}
#endif

extern void mac_default_handler(int, void *, struct pt_regs *);

void (*mac_handlers[8])(int, void *, struct pt_regs *)=
{
	mac_default_handler,
	mac_default_handler,
	mac_default_handler,
	mac_default_handler,
	mac_default_handler,
	mac_default_handler,
	mac_default_handler,
	mac_default_handler
};

/*
 * Parse a Macintosh-specific record in the bootinfo
 */

int __init mac_parse_bootinfo(const struct bi_record *record)
{
    int unknown = 0;
    const u_long *data = record->data;

    switch (record->tag) {
	case BI_MAC_MODEL:
	    mac_bi_data.id = *data;
	    break;
	case BI_MAC_VADDR:
	    mac_bi_data.videoaddr = *data;
	    break;
	case BI_MAC_VDEPTH:
	    mac_bi_data.videodepth = *data;
	    break;
	case BI_MAC_VROW:
	    mac_bi_data.videorow = *data;
	    break;
	case BI_MAC_VDIM:
	    mac_bi_data.dimensions = *data;
	    break;
	case BI_MAC_VLOGICAL:
	    mac_bi_data.videological = VIDEOMEMBASE + (*data & ~VIDEOMEMMASK);
	    mac_orig_videoaddr = *data;
	    break;
	case BI_MAC_SCCBASE:
	    mac_bi_data.sccbase = *data;
	    break;
	case BI_MAC_BTIME:
	    mac_bi_data.boottime = *data;
	    break;
	case BI_MAC_GMTBIAS:
	    mac_bi_data.gmtbias = *data;
	    break;
	case BI_MAC_MEMSIZE:
	    mac_bi_data.memsize = *data;
	    break;
	case BI_MAC_CPUID:
	    mac_bi_data.cpuid = *data;
	    break;
        case BI_MAC_ROMBASE:
	    mac_bi_data.rombase = *data;
	    break;
	default:
	    unknown = 1;
    }
    return(unknown);
}

/*
 * Flip into 24bit mode for an instant - flushes the L2 cache card. We
 * have to disable interrupts for this. Our IRQ handlers will crap 
 * themselves if they take an IRQ in 24bit mode!
 */

static void mac_cache_card_flush(int writeback)
{
	unsigned long cpu_flags;
	save_flags(cpu_flags);
	cli();
	via_flush_cache();
	restore_flags(cpu_flags);
}

void __init config_mac(void)
{
	if (!MACH_IS_MAC) {
	  printk("ERROR: no Mac, but config_mac() called!! \n");
	}
	
#ifdef CONFIG_VT
#ifdef CONFIG_INPUT_ADBHID
	mach_keyb_init       = mac_hid_init_hw;
	mach_kbd_translate   = mac_hid_kbd_translate;
#ifdef CONFIG_MAGIC_SYSRQ
#ifdef CONFIG_MAC_ADBKEYCODES
	if (!keyboard_sends_linux_keycodes) {
		mach_sysrq_xlate = mac_hid_kbd_sysrq_xlate;
		SYSRQ_KEY = 0x69;
	} else
#endif /* CONFIG_MAC_ADBKEYCODES */
	{
		mach_sysrq_xlate = pckbd_sysrq_xlate;
		SYSRQ_KEY = 0x54;
	}
#endif /* CONFIG_MAGIC_SYSRQ */
#elif defined(CONFIG_ADB_KEYBOARD)
	mach_keyb_init       = mackbd_init_hw;
	mach_kbd_leds        = mackbd_leds;
	mach_kbd_translate   = mackbd_translate;
	mach_sysrq_xlate     = mackbd_sysrq_xlate;
	SYSRQ_KEY = 0x69;
#endif /* CONFIG_INPUT_ADBHID */
#endif /* CONFIG_VT */

	mach_sched_init      = mac_sched_init;
	mach_init_IRQ        = mac_init_IRQ;
	mach_request_irq     = mac_request_irq;
	mach_free_irq        = mac_free_irq;
	enable_irq           = mac_enable_irq;
	disable_irq          = mac_disable_irq;
	mach_get_model	 = mac_get_model;
	mach_default_handler = &mac_handlers;
	mach_get_irq_list    = mac_get_irq_list;
	mach_gettimeoffset   = mac_gettimeoffset;
	mach_gettod          = mac_gettod;
	mach_hwclk           = mac_hwclk;
	mach_set_clock_mmss	 = mac_set_clock_mmss;
#if 0
	mach_mksound         = mac_mksound;
#endif
	mach_reset           = mac_reset;
	mach_halt            = mac_poweroff;
	mach_power_off       = mac_poweroff;
	conswitchp	         = &dummy_con;
	mach_max_dma_address = 0xffffffff;
#if 0
	mach_debug_init	 = mac_debug_init;
#endif
	kd_mksound		 = mac_mksound;
#ifdef CONFIG_HEARTBEAT
#if 0
	mach_heartbeat = mac_heartbeat;
	mach_heartbeat_irq = IRQ_MAC_TIMER;
#endif
#endif

	/*
	 * Determine hardware present
	 */
     
	mac_identify();
	mac_report_hardware();
    
	/* AFAIK only the IIci takes a cache card.  The IIfx has onboard
	   cache ... someone needs to figure out how to tell if it's on or
	   not. */

	if (macintosh_config->ident == MAC_MODEL_IICI
	    || macintosh_config->ident == MAC_MODEL_IIFX) {
		mach_l2_flush = mac_cache_card_flush;
	}
#ifdef MAC_DEBUG_SOUND
	/* goes on forever if timers broken */
	mac_mksound(1000,10);
#endif

	/*
	 * Check for machine specific fixups.
	 */

#ifdef OLD_NUBUS_CODE
	 nubus_sweep_video();
#endif
}	


/*
 *	Macintosh Table: hardcoded model configuration data. 
 *
 *	Much of this was defined by Alan, based on who knows what docs. 
 *	I've added a lot more, and some of that was pure guesswork based 
 *	on hardware pages present on the Mac web site. Possibly wildly 
 *	inaccurate, so look here if a new Mac model won't run. Example: if
 *	a Mac crashes immediately after the VIA1 registers have been dumped
 *	to the screen, it probably died attempting to read DirB on a RBV. 
 *	Meaning it should have MAC_VIA_IIci here :-)
 */
 
struct mac_model *macintosh_config;

static struct mac_model mac_data_table[]=
{
	/*
	 *	We'll pretend to be a Macintosh II, that's pretty safe.
	 */

	{	MAC_MODEL_II,	"Unknown",	MAC_ADB_II,	MAC_VIA_II,	MAC_SCSI_OLD,	MAC_IDE_NONE,	MAC_SCC_II,	MAC_ETHER_NONE,	MAC_NUBUS},

	/*
	 *	Original MacII hardware
	 *	
	 */
	 
	{	MAC_MODEL_II,	"II",		MAC_ADB_II,	MAC_VIA_II,	MAC_SCSI_OLD,	MAC_IDE_NONE,	MAC_SCC_II,	MAC_ETHER_NONE,	MAC_NUBUS},
	{	MAC_MODEL_IIX,	"IIx",		MAC_ADB_II,	MAC_VIA_II,	MAC_SCSI_OLD,	MAC_IDE_NONE,	MAC_SCC_II,	MAC_ETHER_NONE,	MAC_NUBUS},
	{	MAC_MODEL_IICX,	"IIcx",		MAC_ADB_II,	MAC_VIA_II,	MAC_SCSI_OLD,	MAC_IDE_NONE,	MAC_SCC_II,	MAC_ETHER_NONE,	MAC_NUBUS},
	{	MAC_MODEL_SE30, "SE/30",	MAC_ADB_II,	MAC_VIA_II,	MAC_SCSI_OLD,	MAC_IDE_NONE,	MAC_SCC_II,	MAC_ETHER_NONE,	MAC_NUBUS},
	
	/*
	 *	Weirdified MacII hardware - all subtley different. Gee thanks
	 *	Apple. All these boxes seem to have VIA2 in a different place to
	 *	the MacII (+1A000 rather than +4000)
	 * CSA: see http://developer.apple.com/technotes/hw/hw_09.html
	 */

	{	MAC_MODEL_IICI,	"IIci",	MAC_ADB_II,	MAC_VIA_IIci,	MAC_SCSI_OLD,	MAC_IDE_NONE,	MAC_SCC_II,	MAC_ETHER_NONE,	MAC_NUBUS},
	{	MAC_MODEL_IIFX,	"IIfx",	MAC_ADB_IOP,	MAC_VIA_IIci,	MAC_SCSI_OLD,	MAC_IDE_NONE,	MAC_SCC_IOP,	MAC_ETHER_NONE,	MAC_NUBUS},
	{	MAC_MODEL_IISI, "IIsi",	MAC_ADB_IISI,	MAC_VIA_IIci,	MAC_SCSI_OLD,	MAC_IDE_NONE,	MAC_SCC_II,	MAC_ETHER_NONE,	MAC_NUBUS},
	{	MAC_MODEL_IIVI,	"IIvi",	MAC_ADB_IISI,	MAC_VIA_IIci,	MAC_SCSI_OLD,	MAC_IDE_NONE,	MAC_SCC_II,	MAC_ETHER_NONE,	MAC_NUBUS},
	{	MAC_MODEL_IIVX,	"IIvx",	MAC_ADB_IISI,	MAC_VIA_IIci,	MAC_SCSI_OLD,	MAC_IDE_NONE,	MAC_SCC_II,	MAC_ETHER_NONE,	MAC_NUBUS},
	
	/*
	 *	Classic models (guessing: similar to SE/30 ?? Nope, similar to LC ...)
	 */

	{	MAC_MODEL_CLII, "Classic II",		MAC_ADB_IISI,	MAC_VIA_IIci,	MAC_SCSI_OLD,	MAC_IDE_NONE,	MAC_SCC_II,     MAC_ETHER_NONE,	MAC_NUBUS},
	{	MAC_MODEL_CCL,  "Color Classic",	MAC_ADB_CUDA,	MAC_VIA_IIci,	MAC_SCSI_OLD,	MAC_IDE_NONE,	MAC_SCC_II,     MAC_ETHER_NONE,	MAC_NUBUS},

	/*
	 *	Some Mac LC machines. Basically the same as the IIci, ADB like IIsi
	 */
	
	{	MAC_MODEL_LC,	"LC",	  MAC_ADB_IISI,	MAC_VIA_IIci,	MAC_SCSI_OLD,	MAC_IDE_NONE,	MAC_SCC_II,	MAC_ETHER_NONE,	MAC_NUBUS},
	{	MAC_MODEL_LCII,	"LC II",  MAC_ADB_IISI,	MAC_VIA_IIci,	MAC_SCSI_OLD,	MAC_IDE_NONE,	MAC_SCC_II,	MAC_ETHER_NONE,	MAC_NUBUS},
	{	MAC_MODEL_LCIII,"LC III", MAC_ADB_IISI,	MAC_VIA_IIci,	MAC_SCSI_OLD,	MAC_IDE_NONE,	MAC_SCC_II,	MAC_ETHER_NONE,	MAC_NUBUS},

	/*
	 *	Quadra. Video is at 0xF9000000, via is like a MacII. We label it differently 
	 *	as some of the stuff connected to VIA2 seems different. Better SCSI chip and 
	 *	onboard ethernet using a NatSemi SONIC except the 660AV and 840AV which use an 
	 *	AMD 79C940 (MACE).
	 *	The 700, 900 and 950 have some I/O chips in the wrong place to
	 *	confuse us. The 840AV has a SCSI location of its own (same as
	 *	the 660AV).
	 */	 
	 
	{	MAC_MODEL_Q605, "Quadra 605", MAC_ADB_CUDA, MAC_VIA_QUADRA, MAC_SCSI_QUADRA,  MAC_IDE_NONE,   MAC_SCC_QUADRA,	MAC_ETHER_NONE,		MAC_NUBUS},
	{	MAC_MODEL_Q610, "Quadra 610", MAC_ADB_II,   MAC_VIA_QUADRA, MAC_SCSI_QUADRA,  MAC_IDE_NONE,   MAC_SCC_QUADRA,	MAC_ETHER_SONIC,	MAC_NUBUS},
	{	MAC_MODEL_Q630, "Quadra 630", MAC_ADB_CUDA, MAC_VIA_QUADRA, MAC_SCSI_QUADRA,  MAC_IDE_QUADRA, MAC_SCC_QUADRA,	MAC_ETHER_SONIC,	MAC_NUBUS},
 	{	MAC_MODEL_Q650, "Quadra 650", MAC_ADB_II,   MAC_VIA_QUADRA, MAC_SCSI_QUADRA,  MAC_IDE_NONE,   MAC_SCC_QUADRA,	MAC_ETHER_SONIC,	MAC_NUBUS},
	/*	The Q700 does have a NS Sonic */
	{	MAC_MODEL_Q700, "Quadra 700", MAC_ADB_II,   MAC_VIA_QUADRA, MAC_SCSI_QUADRA2, MAC_IDE_NONE,   MAC_SCC_QUADRA2,	MAC_ETHER_SONIC,	MAC_NUBUS},
	{	MAC_MODEL_Q800, "Quadra 800", MAC_ADB_II,   MAC_VIA_QUADRA, MAC_SCSI_QUADRA,  MAC_IDE_NONE,   MAC_SCC_QUADRA,	MAC_ETHER_SONIC,	MAC_NUBUS},
	{	MAC_MODEL_Q840, "Quadra 840AV", MAC_ADB_CUDA, MAC_VIA_QUADRA, MAC_SCSI_QUADRA3, MAC_IDE_NONE, MAC_SCC_II,	MAC_ETHER_MACE,		MAC_NUBUS},
	{	MAC_MODEL_Q900, "Quadra 900", MAC_ADB_IOP, MAC_VIA_QUADRA, MAC_SCSI_QUADRA2, MAC_IDE_NONE,   MAC_SCC_IOP,	MAC_ETHER_SONIC,	MAC_NUBUS},
	{	MAC_MODEL_Q950, "Quadra 950", MAC_ADB_IOP, MAC_VIA_QUADRA, MAC_SCSI_QUADRA2, MAC_IDE_NONE,   MAC_SCC_IOP,	MAC_ETHER_SONIC,	MAC_NUBUS},

	/* 
	 *	Performa - more LC type machines
	 */

	{	MAC_MODEL_P460,  "Performa 460", MAC_ADB_IISI, MAC_VIA_IIci,   MAC_SCSI_OLD, 	MAC_IDE_NONE,   MAC_SCC_II,	MAC_ETHER_NONE,	MAC_NUBUS},
	{	MAC_MODEL_P475,  "Performa 475", MAC_ADB_CUDA, MAC_VIA_QUADRA, MAC_SCSI_QUADRA, MAC_IDE_NONE,   MAC_SCC_II,	MAC_ETHER_NONE, MAC_NUBUS},
	{	MAC_MODEL_P475F, "Performa 475", MAC_ADB_CUDA, MAC_VIA_QUADRA, MAC_SCSI_QUADRA, MAC_IDE_NONE,   MAC_SCC_II,	MAC_ETHER_NONE, MAC_NUBUS},
	{	MAC_MODEL_P520,  "Performa 520", MAC_ADB_CUDA, MAC_VIA_IIci,   MAC_SCSI_OLD,    MAC_IDE_NONE,   MAC_SCC_II,	MAC_ETHER_NONE,	MAC_NUBUS},
	{	MAC_MODEL_P550,  "Performa 550", MAC_ADB_CUDA, MAC_VIA_IIci,   MAC_SCSI_OLD,    MAC_IDE_NONE,   MAC_SCC_II,	MAC_ETHER_NONE,	MAC_NUBUS},
	{	MAC_MODEL_P575,  "Performa 575", MAC_ADB_CUDA, MAC_VIA_QUADRA, MAC_SCSI_QUADRA, MAC_IDE_NONE,   MAC_SCC_II,	MAC_ETHER_NONE, MAC_NUBUS},
	/* These have the comm slot, and therefore the possibility of SONIC ethernet */
	{	MAC_MODEL_P588,  "Performa 588", MAC_ADB_CUDA, MAC_VIA_QUADRA, MAC_SCSI_QUADRA, MAC_IDE_QUADRA, MAC_SCC_II,	MAC_ETHER_SONIC, MAC_NUBUS},
	{	MAC_MODEL_TV,    "TV",           MAC_ADB_CUDA, MAC_VIA_QUADRA, MAC_SCSI_OLD,	MAC_IDE_NONE,   MAC_SCC_II,	MAC_ETHER_NONE,	MAC_NUBUS},
	{	MAC_MODEL_P600,  "Performa 600", MAC_ADB_IISI, MAC_VIA_IIci,   MAC_SCSI_OLD,	MAC_IDE_NONE,   MAC_SCC_II,	MAC_ETHER_NONE,	MAC_NUBUS},

	/*
	 *	Centris - just guessing again; maybe like Quadra
	 */

	/* The C610 may or may not have SONIC.  We probe to make sure */
	{	MAC_MODEL_C610, "Centris 610",   MAC_ADB_II,   MAC_VIA_QUADRA, MAC_SCSI_QUADRA,  MAC_IDE_NONE, MAC_SCC_QUADRA,	MAC_ETHER_SONIC,	MAC_NUBUS},
	{	MAC_MODEL_C650, "Centris 650",   MAC_ADB_II,   MAC_VIA_QUADRA, MAC_SCSI_QUADRA,  MAC_IDE_NONE, MAC_SCC_QUADRA,	MAC_ETHER_SONIC,	MAC_NUBUS},
	{	MAC_MODEL_C660, "Centris 660AV", MAC_ADB_CUDA, MAC_VIA_QUADRA, MAC_SCSI_QUADRA3, MAC_IDE_NONE, MAC_SCC_QUADRA,	MAC_ETHER_MACE,		MAC_NUBUS},

	/*
	 * The PowerBooks all the same "Combo" custom IC for SCSI and SCC
	 * and a PMU (in two variations?) for ADB. Most of them use the
	 * Quadra-style VIAs. A few models also have IDE from hell.
	 */

	{	MAC_MODEL_PB140,  "PowerBook 140",   MAC_ADB_PB1, MAC_VIA_QUADRA, MAC_SCSI_OLD,  MAC_IDE_NONE,	 MAC_SCC_QUADRA, MAC_ETHER_NONE,	MAC_NUBUS},
	{	MAC_MODEL_PB145,  "PowerBook 145",   MAC_ADB_PB1, MAC_VIA_QUADRA, MAC_SCSI_OLD,  MAC_IDE_NONE,	 MAC_SCC_QUADRA, MAC_ETHER_NONE,	MAC_NUBUS},
	{	MAC_MODEL_PB150,  "PowerBook 150",   MAC_ADB_PB1, MAC_VIA_IIci,   MAC_SCSI_OLD,  MAC_IDE_PB,	 MAC_SCC_QUADRA, MAC_ETHER_NONE,	MAC_NUBUS},
	{	MAC_MODEL_PB160,  "PowerBook 160",   MAC_ADB_PB1, MAC_VIA_QUADRA, MAC_SCSI_OLD,  MAC_IDE_NONE,	 MAC_SCC_QUADRA, MAC_ETHER_NONE,	MAC_NUBUS},
	{	MAC_MODEL_PB165,  "PowerBook 165",   MAC_ADB_PB1, MAC_VIA_QUADRA, MAC_SCSI_OLD,  MAC_IDE_NONE,	 MAC_SCC_QUADRA, MAC_ETHER_NONE,	MAC_NUBUS},
	{	MAC_MODEL_PB165C, "PowerBook 165c",  MAC_ADB_PB1, MAC_VIA_QUADRA, MAC_SCSI_OLD,  MAC_IDE_NONE,	 MAC_SCC_QUADRA, MAC_ETHER_NONE,	MAC_NUBUS},
	{	MAC_MODEL_PB170,  "PowerBook 170",   MAC_ADB_PB1, MAC_VIA_QUADRA, MAC_SCSI_OLD,  MAC_IDE_NONE,	 MAC_SCC_QUADRA, MAC_ETHER_NONE,	MAC_NUBUS},
	{	MAC_MODEL_PB180,  "PowerBook 180",   MAC_ADB_PB1, MAC_VIA_QUADRA, MAC_SCSI_OLD,  MAC_IDE_NONE,	 MAC_SCC_QUADRA, MAC_ETHER_NONE,	MAC_NUBUS},
	{	MAC_MODEL_PB180C, "PowerBook 180c",  MAC_ADB_PB1, MAC_VIA_QUADRA, MAC_SCSI_OLD,  MAC_IDE_NONE,	 MAC_SCC_QUADRA, MAC_ETHER_NONE,	MAC_NUBUS},
	{	MAC_MODEL_PB190,  "PowerBook 190",   MAC_ADB_PB2, MAC_VIA_QUADRA, MAC_SCSI_OLD,  MAC_IDE_BABOON, MAC_SCC_QUADRA, MAC_ETHER_NONE,	MAC_NUBUS},
	{	MAC_MODEL_PB520,  "PowerBook 520",   MAC_ADB_PB2, MAC_VIA_QUADRA, MAC_SCSI_OLD,  MAC_IDE_NONE,	 MAC_SCC_QUADRA, MAC_ETHER_SONIC, MAC_NUBUS},

	/*
	 * PowerBook Duos are pretty much like normal PowerBooks
	 * All of these probably have onboard SONIC in the Dock which
	 * means we'll have to probe for it eventually.
	 *
	 * Are these reallly MAC_VIA_IIci? The developer notes for the
	 * Duos show pretty much the same custom parts as in most of
	 * the other PowerBooks which would imply MAC_VIA_QUADRA.
	 */

	{	MAC_MODEL_PB210,  "PowerBook Duo 210",  MAC_ADB_PB2,  MAC_VIA_IIci, MAC_SCSI_OLD, MAC_IDE_NONE, MAC_SCC_QUADRA,	MAC_ETHER_NONE,	MAC_NUBUS},
	{	MAC_MODEL_PB230,  "PowerBook Duo 230",  MAC_ADB_PB2,  MAC_VIA_IIci, MAC_SCSI_OLD, MAC_IDE_NONE, MAC_SCC_QUADRA,	MAC_ETHER_NONE,	MAC_NUBUS},
	{	MAC_MODEL_PB250,  "PowerBook Duo 250",  MAC_ADB_PB2,  MAC_VIA_IIci, MAC_SCSI_OLD, MAC_IDE_NONE, MAC_SCC_QUADRA,	MAC_ETHER_NONE,	MAC_NUBUS},
	{	MAC_MODEL_PB270C, "PowerBook Duo 270c", MAC_ADB_PB2,  MAC_VIA_IIci, MAC_SCSI_OLD, MAC_IDE_NONE, MAC_SCC_QUADRA,	MAC_ETHER_NONE,	MAC_NUBUS},
	{	MAC_MODEL_PB280,  "PowerBook Duo 280",  MAC_ADB_PB2,  MAC_VIA_IIci, MAC_SCSI_OLD, MAC_IDE_NONE, MAC_SCC_QUADRA,	MAC_ETHER_NONE,	MAC_NUBUS},
	{	MAC_MODEL_PB280C, "PowerBook Duo 280c", MAC_ADB_PB2,  MAC_VIA_IIci, MAC_SCSI_OLD, MAC_IDE_NONE, MAC_SCC_QUADRA,	MAC_ETHER_NONE,	MAC_NUBUS},

	/*
	 *	Other stuff ??
	 */
	{	-1, NULL, 0,0,0,}
};

void mac_identify(void)
{
	struct mac_model *m;

	/* Penguin data useful? */	
	int model = mac_bi_data.id;
	if (!model) {
		/* no bootinfo model id -> NetBSD booter was used! */
		/* XXX FIXME: breaks for model > 31 */
		model=(mac_bi_data.cpuid>>2)&63;
		printk ("No bootinfo model ID, using cpuid instead (hey, use Penguin!)\n");
	}

	macintosh_config = mac_data_table; 
	for (m = macintosh_config ; m->ident != -1 ; m++) {
		if (m->ident == model) {
			macintosh_config = m;
			break;
		}
	}

	/* We need to pre-init the IOPs, if any. Otherwise */
	/* the serial console won't work if the user had   */
	/* the serial ports set to "Faster" mode in MacOS. */

	iop_preinit();
	mac_debug_init();

	printk ("Detected Macintosh model: %d \n", model);

	/*
	 * Report booter data:
	 */
	printk (" Penguin bootinfo data:\n");
	printk (" Video: addr 0x%lx row 0x%lx depth %lx dimensions %ld x %ld\n", 
		mac_bi_data.videoaddr, mac_bi_data.videorow, 
		mac_bi_data.videodepth, mac_bi_data.dimensions & 0xFFFF, 
		mac_bi_data.dimensions >> 16); 
	printk (" Videological 0x%lx phys. 0x%lx, SCC at 0x%lx \n",
		mac_bi_data.videological, mac_orig_videoaddr, 
		mac_bi_data.sccbase); 
	printk (" Boottime: 0x%lx GMTBias: 0x%lx \n",
		mac_bi_data.boottime, mac_bi_data.gmtbias); 
	printk (" Machine ID: %ld CPUid: 0x%lx memory size: 0x%lx \n",
		mac_bi_data.id, mac_bi_data.cpuid, mac_bi_data.memsize); 
#if 0
	printk ("Ramdisk: addr 0x%lx size 0x%lx\n", 
		m68k_ramdisk.addr, m68k_ramdisk.size);
#endif

	/*
	 * TODO: set the various fields in macintosh_config->hw_present here!
	 */
	switch (macintosh_config->scsi_type) {
	case MAC_SCSI_OLD:
	  MACHW_SET(MAC_SCSI_80);
	  break;
	case MAC_SCSI_QUADRA:
	case MAC_SCSI_QUADRA2:
	case MAC_SCSI_QUADRA3:
	  MACHW_SET(MAC_SCSI_96);
	  if ((macintosh_config->ident == MAC_MODEL_Q900) ||
	      (macintosh_config->ident == MAC_MODEL_Q950))
	    MACHW_SET(MAC_SCSI_96_2);
	  break;
	default:
	  printk("config.c: wtf: unknown scsi, using 53c80\n");
	  MACHW_SET(MAC_SCSI_80);
	  break;

	}
	iop_init();
	via_init();
	oss_init();
	psc_init();
	baboon_init();
}

void mac_report_hardware(void)
{
	printk("Apple Macintosh %s\n", macintosh_config->name);
}

static void mac_get_model(char *str)
{
	strcpy(str,"Macintosh ");
	strcat(str, macintosh_config->name);
}
/*
 * Baboon Custom IC Managment
 *
 * The Baboon custom IC controls the IDE, PCMCIA and media bay on the
 * PowerBook 190. It multiplexes multiple interrupt sources onto the
 * Nubus slot $C interrupt.
 */

#include <linux/types.h>
#include <linux/kernel.h>
#include <linux/mm.h>
#include <linux/delay.h>
#include <linux/init.h>
#include <linux/ide.h>

#include <asm/traps.h>
#include <asm/bootinfo.h> 
#include <asm/macintosh.h> 
#include <asm/macints.h> 
#include <asm/mac_baboon.h>

/* #define DEBUG_BABOON /**/
/* #define DEBUG_IRQS /**/

int baboon_present,baboon_active;
volatile struct baboon *baboon;

void baboon_irq(int, void *, struct pt_regs *);

extern int macide_ack_intr(ide_hwif_t *);

/*
 * Baboon initialization.
 */

void __init baboon_init(void)
{
	if (macintosh_config->ident != MAC_MODEL_PB190) {
		baboon = NULL;
		baboon_present = 0;
		return;
	}

	baboon = (struct baboon *) BABOON_BASE;
	baboon_present = 1;
	baboon_active = 0;

	printk("Baboon detected at %p\n", baboon);
}

/*
 * Register the Baboon interrupt dispatcher on nubus slot $C.
 */

void __init baboon_register_interrupts(void)
{
	request_irq(IRQ_NUBUS_C, baboon_irq, IRQ_FLG_LOCK|IRQ_FLG_FAST,
		    "baboon", (void *) baboon);
}

/*
 * Baboon interrupt handler. This works a lot like a VIA.
 */

void baboon_irq(int irq, void *dev_id, struct pt_regs *regs)
{
	int irq_bit,i;
	unsigned char events;

#ifdef DEBUG_IRQS
	printk("baboon_irq: mb_control %02X mb_ifr %02X mb_status %02X active %02X\n",
		(uint) baboon->mb_control, (uint) baboon->mb_ifr,
		(uint) baboon->mb_status,  baboon_active);
#endif

	if (!(events = baboon->mb_ifr & 0x07)) return;

	for (i = 0, irq_bit = 1 ; i < 3 ; i++, irq_bit <<= 1) {
	        if (events & irq_bit/* & baboon_active*/) {
			baboon_active &= ~irq_bit;
			mac_do_irq_list(IRQ_BABOON_0 + i, regs);
			baboon_active |= irq_bit;
			baboon->mb_ifr &= ~irq_bit;
		}
	}
#if 0
	if (baboon->mb_ifr & 0x02) macide_ack_intr(NULL);
	/* for now we need to smash all interrupts */
	baboon->mb_ifr &= ~events;
#endif
}

void baboon_irq_enable(int irq) {
	int irq_idx	= IRQ_IDX(irq);

#ifdef DEBUG_IRQUSE
	printk("baboon_irq_enable(%d)\n", irq);
#endif
	baboon_active |= (1 << irq_idx);
}

void baboon_irq_disable(int irq) {
	int irq_idx	= IRQ_IDX(irq);

#ifdef DEBUG_IRQUSE
	printk("baboon_irq_disable(%d)\n", irq);
#endif
	baboon_active &= ~(1 << irq_idx);
}

void baboon_irq_clear(int irq) {
	int irq_idx	= IRQ_IDX(irq);

	baboon->mb_ifr &= ~(1 << irq_idx);
}

int baboon_irq_pending(int irq)
{
	int irq_idx	= IRQ_IDX(irq);

	return baboon->mb_ifr & (1 << irq_idx);
}
/*
 * Miscellaneous Mac68K-specific stuff 
 */

#include <linux/config.h>
#include <linux/types.h>
#include <linux/errno.h>
#include <linux/miscdevice.h>
#include <linux/kernel.h>
#include <linux/delay.h>
#include <linux/sched.h>
#include <linux/slab.h>
#include <linux/time.h>

#include <linux/mm.h>

#include <linux/adb.h>
#include <linux/cuda.h>
#include <linux/pmu.h>

#include <asm/uaccess.h>
#include <asm/io.h>
#include <asm/rtc.h>
#include <asm/system.h>
#include <asm/segment.h>
#include <asm/setup.h>
#include <asm/macintosh.h>
#include <asm/mac_via.h>
#include <asm/mac_oss.h>

#define BOOTINFO_COMPAT_1_0
#include <asm/bootinfo.h>
#include <asm/machdep.h>

/* Offset between Unix time (1970-based) and Mac time (1904-based) */

#define RTC_OFFSET 2082844800

extern struct mac_booter_data mac_bi_data;
static void (*rom_reset)(void);

/*
 * Return the current time as the number of seconds since January 1, 1904.
 */

static long adb_read_time(void)
{
	volatile struct adb_request req;
	long time;

	adb_request((struct adb_request *) &req, NULL,
			ADBREQ_RAW|ADBREQ_SYNC,
			2, CUDA_PACKET, CUDA_GET_TIME);

	time = (req.reply[3] << 24) | (req.reply[4] << 16)
		| (req.reply[5] << 8) | req.reply[6];
	return time - RTC_OFFSET;
}

/*
 * Set the current system time
 */

static void adb_write_time(long data)
{
	volatile struct adb_request req;

	data += RTC_OFFSET;
	
	adb_request((struct adb_request *) &req, NULL,
			ADBREQ_RAW|ADBREQ_SYNC,
			6, CUDA_PACKET, CUDA_SET_TIME,
			(data >> 24) & 0xFF, (data >> 16) & 0xFF,
			(data >> 8) & 0xFF, data & 0xFF);
}

/*
 * Get a byte from the NVRAM
 */

static __u8 adb_read_pram(int offset)
{
	volatile struct adb_request req;

	adb_request((struct adb_request *) &req, NULL,
			ADBREQ_RAW|ADBREQ_SYNC,
			4, CUDA_PACKET, CUDA_GET_PRAM,
			(offset >> 8) & 0xFF, offset & 0xFF);
	return req.reply[3];
}

/*
 * Write a byte to the NVRAM
 */

static void adb_write_pram(int offset, __u8 data)
{
	volatile struct adb_request req;

	adb_request((struct adb_request *) &req, NULL,
			ADBREQ_RAW|ADBREQ_SYNC,
			5, CUDA_PACKET, CUDA_SET_PRAM,
			(offset >> 8) & 0xFF, offset & 0xFF,
			data);
}

/*
 * VIA PRAM/RTC access routines
 *
 * Must be called with interrupts disabled and
 * the RTC should be enabled.
 */

static __u8 via_pram_readbyte(void)
{
	int	i,reg;
	__u8	data;

	reg = via1[vBufB] & ~VIA1B_vRTCClk;

	/* Set the RTC data line to be an input. */

	via1[vDirB] &= ~VIA1B_vRTCData;

	/* The bits of the byte come out in MSB order */

	data = 0;
	for (i = 0 ; i < 8 ; i++) {
		via1[vBufB] = reg;
		via1[vBufB] = reg | VIA1B_vRTCClk;
		data = (data << 1) | (via1[vBufB] & VIA1B_vRTCData);
	}

	/* Return RTC data line to output state */

	via1[vDirB] |= VIA1B_vRTCData;

	return data;
}

static void via_pram_writebyte(__u8 data)
{
	int	i,reg,bit;

	reg = via1[vBufB] & ~(VIA1B_vRTCClk | VIA1B_vRTCData);

	/* The bits of the byte go in in MSB order */

	for (i = 0 ; i < 8 ; i++) {
		bit = data & 0x80? 1 : 0;
		data <<= 1;
		via1[vBufB] = reg | bit;
		via1[vBufB] = reg | bit | VIA1B_vRTCClk;
	}
}

/*
 * Execute a VIA PRAM/RTC command. For read commands
 * data should point to a one-byte buffer for the
 * resulting data. For write commands it should point
 * to the data byte to for the command.
 *
 * This function disables all interrupts while running.
 */

static void via_pram_command(int command, __u8 *data)
{
	unsigned long cpu_flags;
	int	is_read;

	save_flags(cpu_flags);
	cli();

	/* Enable the RTC and make sure the strobe line is high */

	via1[vBufB] = (via1[vBufB] | VIA1B_vRTCClk) & ~VIA1B_vRTCEnb;

	if (command & 0xFF00) {		/* extended (two-byte) command */
		via_pram_writebyte((command & 0xFF00) >> 8);
		via_pram_writebyte(command & 0xFF);
		is_read = command & 0x8000;
	} else {			/* one-byte command */
		via_pram_writebyte(command);
		is_read = command & 0x80;
	}
	if (is_read) {
		*data = via_pram_readbyte();
	} else {
		via_pram_writebyte(*data);
	}

	/* All done, disable the RTC */

	via1[vBufB] |= VIA1B_vRTCEnb;

	restore_flags(cpu_flags);
}

static __u8 via_read_pram(int offset)
{
	return 0;
}

static void via_write_pram(int offset, __u8 data)
{
}

/*
 * Return the current time in seconds since January 1, 1904.
 *
 * This only works on machines with the VIA-based PRAM/RTC, which
 * is basically any machine with Mac II-style ADB.
 */

static long via_read_time(void)
{
	union {
		__u8  cdata[4];
		long  idata;
	} result, last_result;
	int	ct;

	/*
	 * The NetBSD guys say to loop until you get the same reading
	 * twice in a row.
	 */

	ct = 0;
	do {
		if (++ct > 10) {
			printk("via_read_time: couldn't get valid time, "
			       "last read = 0x%08X and 0x%08X\n", last_result.idata,
			       result.idata);
			break;
		}

		last_result.idata = result.idata;
		result.idata = 0;

		via_pram_command(0x81, &result.cdata[3]);
		via_pram_command(0x85, &result.cdata[2]);
		via_pram_command(0x89, &result.cdata[1]);
		via_pram_command(0x8D, &result.cdata[0]);
	} while (result.idata != last_result.idata);

	return result.idata - RTC_OFFSET;
}

/*
 * Set the current time to a number of seconds since January 1, 1904.
 *
 * This only works on machines with the VIA-based PRAM/RTC, which
 * is basically any machine with Mac II-style ADB.
 */

static void via_write_time(long time)
{
	union {
		__u8  cdata[4];
		long  idata;
	} data;
	__u8	temp;

	/* Clear the write protect bit */

	temp = 0x55;
	via_pram_command(0x35, &temp);

	data.idata = time + RTC_OFFSET;
	via_pram_command(0x01, &data.cdata[3]);
	via_pram_command(0x05, &data.cdata[2]);
	via_pram_command(0x09, &data.cdata[1]);
	via_pram_command(0x0D, &data.cdata[0]);

	/* Set the write protect bit */

	temp = 0xD5;
	via_pram_command(0x35, &temp);
}

static void via_shutdown(void)
{
	if (rbv_present) {
		via2[rBufB] &= ~0x04;
	} else {
		/* Direction of vDirB is output */
		via2[vDirB] |= 0x04;
		/* Send a value of 0 on that line */
		via2[vBufB] &= ~0x04;
		mdelay(1000);
	}
}

/*
 * FIXME: not sure how this is supposed to work exactly...
 */

static void oss_shutdown(void)
{
	oss->rom_ctrl = OSS_POWEROFF;
}

#ifdef CONFIG_ADB_CUDA

static void cuda_restart(void)
{
	adb_request(NULL, NULL, ADBREQ_RAW|ADBREQ_SYNC,
			2, CUDA_PACKET, CUDA_RESET_SYSTEM);
}

static void cuda_shutdown(void)
{
	adb_request(NULL, NULL, ADBREQ_RAW|ADBREQ_SYNC,
			2, CUDA_PACKET, CUDA_POWERDOWN);
}

#endif /* CONFIG_ADB_CUDA */

#ifdef CONFIG_ADB_PMU

void pmu_restart(void)
{
	adb_request(NULL, NULL, ADBREQ_RAW|ADBREQ_SYNC,
			3, PMU_PACKET, PMU_SET_INTR_MASK,
			PMU_INT_ADB|PMU_INT_TICK);
	
	adb_request(NULL, NULL, ADBREQ_RAW|ADBREQ_SYNC,
			2, PMU_PACKET, PMU_RESET);
}

void pmu_shutdown(void)
{
	adb_request(NULL, NULL, ADBREQ_RAW|ADBREQ_SYNC,
			3, PMU_PACKET, PMU_SET_INTR_MASK,
			PMU_INT_ADB|PMU_INT_TICK);

	adb_request(NULL, NULL, ADBREQ_RAW|ADBREQ_SYNC,
			6, PMU_PACKET, PMU_SHUTDOWN,
			'M', 'A', 'T', 'T');
}

#endif /* CONFIG_ADB_PMU */

/*
 *-------------------------------------------------------------------
 * Below this point are the generic routines; they'll dispatch to the
 * correct routine for the hardware on which we're running.
 *-------------------------------------------------------------------
 */

void mac_pram_read(int offset, __u8 *buffer, int len)
{
	__u8 (*func)(int) = NULL;
	int i;

	if (macintosh_config->adb_type == MAC_ADB_IISI ||
	    macintosh_config->adb_type == MAC_ADB_PB1 ||
	    macintosh_config->adb_type == MAC_ADB_PB2 ||
	    macintosh_config->adb_type == MAC_ADB_CUDA) {
		func = adb_read_pram;
	} else {
		func = via_read_pram;
	}
	for (i = 0 ; i < len ; i++) {
		buffer[i] = (*func)(offset++);
	}
}

void mac_pram_write(int offset, __u8 *buffer, int len)
{
	void (*func)(int, __u8) = NULL;
	int i;

	if (macintosh_config->adb_type == MAC_ADB_IISI ||
	    macintosh_config->adb_type == MAC_ADB_PB1 ||
	    macintosh_config->adb_type == MAC_ADB_PB2 ||
	    macintosh_config->adb_type == MAC_ADB_CUDA) {
		func = adb_write_pram;
	} else {
		func = via_write_pram;
	}
	for (i = 0 ; i < len ; i++) {
		(*func)(offset++, buffer[i]);
	}
}

void mac_poweroff(void)
{
	/*
	 * MAC_ADB_IISI may need to be moved up here if it doesn't actually
	 * work using the ADB packet method.  --David Kilzer
	 */

	if (oss_present) {
		oss_shutdown();
	} else if (macintosh_config->adb_type == MAC_ADB_II) {
		via_shutdown();
#ifdef CONFIG_ADB_CUDA
	} else if (macintosh_config->adb_type == MAC_ADB_CUDA) {
		cuda_shutdown();
#endif
#ifdef CONFIG_ADB_PMU
	} else if (macintosh_config->adb_type == MAC_ADB_PB1
		|| macintosh_config->adb_type == MAC_ADB_PB2) {
		pmu_shutdown();
#endif
	}
	sti();
	printk("It is now safe to turn off your Macintosh.\n");
	while(1);
}

void mac_reset(void)
{
	if (macintosh_config->adb_type == MAC_ADB_II) {
		unsigned long cpu_flags;

		/* need ROMBASE in booter */
		/* indeed, plus need to MAP THE ROM !! */

		if (mac_bi_data.rombase == 0)
			mac_bi_data.rombase = 0x40800000;

		/* works on some */
		rom_reset = (void *) (mac_bi_data.rombase + 0xa);

		if (macintosh_config->ident == MAC_MODEL_SE30) {
			/*
			 * MSch: Machines known to crash on ROM reset ...
			 */
		} else {
			save_flags(cpu_flags);
			cli();

			rom_reset();

			restore_flags(cpu_flags);
		}
#ifdef CONFIG_ADB_CUDA
	} else if (macintosh_config->adb_type == MAC_ADB_CUDA) {
		cuda_restart();
#endif
#ifdef CONFIG_ADB_PMU
	} else if (macintosh_config->adb_type == MAC_ADB_PB1
		|| macintosh_config->adb_type == MAC_ADB_PB2) {
		pmu_restart();
#endif
	} else if (CPU_IS_030) {

		/* 030-specific reset routine.  The idea is general, but the
		 * specific registers to reset are '030-specific.  Until I
		 * have a non-030 machine, I can't test anything else.
		 *  -- C. Scott Ananian <cananian@alumni.princeton.edu>
		 */

		unsigned long rombase = 0x40000000;

		/* make a 1-to-1 mapping, using the transparent tran. reg. */
		unsigned long virt = (unsigned long) mac_reset;
		unsigned long phys = virt_to_phys(mac_reset);
		unsigned long offset = phys-virt;
		cli(); /* lets not screw this up, ok? */
		__asm__ __volatile__(".chip 68030\n\t"
				     "pmove %0,%/tt0\n\t"
				     ".chip 68k"
				     : : "m" ((phys&0xFF000000)|0x8777));
		/* Now jump to physical address so we can disable MMU */
		__asm__ __volatile__(
                    ".chip 68030\n\t"
		    "lea %/pc@(1f),%/a0\n\t"
		    "addl %0,%/a0\n\t"/* fixup target address and stack ptr */
		    "addl %0,%/sp\n\t" 
		    "pflusha\n\t"
		    "jmp %/a0@\n\t" /* jump into physical memory */
		    "0:.long 0\n\t" /* a constant zero. */
		    /* OK.  Now reset everything and jump to reset vector. */
		    "1:\n\t"
		    "lea %/pc@(0b),%/a0\n\t"
		    "pmove %/a0@, %/tc\n\t" /* disable mmu */
		    "pmove %/a0@, %/tt0\n\t" /* disable tt0 */
		    "pmove %/a0@, %/tt1\n\t" /* disable tt1 */
		    "movel #0, %/a0\n\t"
		    "movec %/a0, %/vbr\n\t" /* clear vector base register */
		    "movec %/a0, %/cacr\n\t" /* disable caches */
		    "movel #0x0808,%/a0\n\t"
		    "movec %/a0, %/cacr\n\t" /* flush i&d caches */
		    "movew #0x2700,%/sr\n\t" /* set up status register */
		    "movel %1@(0x0),%/a0\n\t"/* load interrupt stack pointer */
		    "movec %/a0, %/isp\n\t" 
		    "movel %1@(0x4),%/a0\n\t" /* load reset vector */
		    "reset\n\t" /* reset external devices */
		    "jmp %/a0@\n\t" /* jump to the reset vector */
		    ".chip 68k"
		    : : "r" (offset), "a" (rombase) : "a0");
	}

	/* should never get here */
	sti();
	printk ("Restart failed.  Please restart manually.\n");
	while(1);
}

/*
 * This function translates seconds since 1970 into a proper date.
 *
 * Algorithm cribbed from glibc2.1, __offtime().
 */
#define SECS_PER_MINUTE (60)
#define SECS_PER_HOUR  (SECS_PER_MINUTE * 60)
#define SECS_PER_DAY   (SECS_PER_HOUR * 24)

static void unmktime(unsigned long time, long offset,
		     int *yearp, int *monp, int *dayp,
		     int *hourp, int *minp, int *secp)
{
        /* How many days come before each month (0-12).  */
	static const unsigned short int __mon_yday[2][13] =
	{
		/* Normal years.  */
		{ 0, 31, 59, 90, 120, 151, 181, 212, 243, 273, 304, 334, 365 },
		/* Leap years.  */
		{ 0, 31, 60, 91, 121, 152, 182, 213, 244, 274, 305, 335, 366 }
	};
	long int days, rem, y, wday, yday;
	const unsigned short int *ip;

	days = time / SECS_PER_DAY;
	rem = time % SECS_PER_DAY;
	rem += offset;
	while (rem < 0) {
		rem += SECS_PER_DAY;
		--days;
	}
	while (rem >= SECS_PER_DAY) {
		rem -= SECS_PER_DAY;
		++days;
	}
	*hourp = rem / SECS_PER_HOUR;
	rem %= SECS_PER_HOUR;
	*minp = rem / SECS_PER_MINUTE;
	*secp = rem % SECS_PER_MINUTE;
	/* January 1, 1970 was a Thursday. */
	wday = (4 + days) % 7; /* Day in the week. Not currently used */
	if (wday < 0) wday += 7;
	y = 1970;

#define DIV(a, b) ((a) / (b) - ((a) % (b) < 0))
#define LEAPS_THRU_END_OF(y) (DIV (y, 4) - DIV (y, 100) + DIV (y, 400))
#define __isleap(year)	\
  ((year) % 4 == 0 && ((year) % 100 != 0 || (year) % 400 == 0))

	while (days < 0 || days >= (__isleap (y) ? 366 : 365))
	{
		/* Guess a corrected year, assuming 365 days per year.  */
		long int yg = y + days / 365 - (days % 365 < 0);

		/* Adjust DAYS and Y to match the guessed year.  */
		days -= ((yg - y) * 365
			 + LEAPS_THRU_END_OF (yg - 1)
			 - LEAPS_THRU_END_OF (y - 1));
		y = yg;
	}
	*yearp = y - 1900;
	yday = days; /* day in the year.  Not currently used. */
	ip = __mon_yday[__isleap(y)];
	for (y = 11; days < (long int) ip[y]; --y)
		continue;
	days -= ip[y];
	*monp = y;
	*dayp = days + 1; /* day in the month */
	return;
}

/*
 * Return the boot time for use in initializing the kernel clock.
 *
 * I'd like to read the hardware clock here but many machines read
 * the PRAM through ADB, and interrupts aren't initialized when this
 * is called so ADB obviously won't work.
 */

void mac_gettod(int *yearp, int *monp, int *dayp,
	       int *hourp, int *minp, int *secp)
{
	/* Yes the GMT bias is backwards.  It looks like Penguin is
           screwing up the boottime it gives us... This works for me
           in Canada/Eastern but it might be wrong everywhere else. */
	unmktime(mac_bi_data.boottime, -mac_bi_data.gmtbias * 60,
		yearp, monp, dayp, hourp, minp, secp);
	/* For some reason this is off by one */
	*monp = *monp + 1;
}

/* 
 * Read/write the hardware clock.
 */

int mac_hwclk(int op, struct hwclk_time *t)
{
	unsigned long now;

	if (!op) { /* read */
		if (macintosh_config->adb_type == MAC_ADB_II) {
			now = via_read_time();
		} else if ((macintosh_config->adb_type == MAC_ADB_IISI) ||
			   (macintosh_config->adb_type == MAC_ADB_PB1) ||
			   (macintosh_config->adb_type == MAC_ADB_PB2) ||
			   (macintosh_config->adb_type == MAC_ADB_CUDA)) {
			now = adb_read_time();
		} else if (macintosh_config->adb_type == MAC_ADB_IOP) {
			now = via_read_time();
		} else {
			now = 0;
		}

		t->wday = 0;
		unmktime(now, 0,
			 &t->year, &t->mon, &t->day,
			 &t->hour, &t->min, &t->sec);
		printk("mac_hwclk: read %04d-%02d-%-2d %02d:%02d:%02d\n",
			t->year + 1900, t->mon + 1, t->day, t->hour, t->min, t->sec);
	} else { /* write */
		printk("mac_hwclk: tried to write %04d-%02d-%-2d %02d:%02d:%02d\n",
			t->year + 1900, t->mon + 1, t->day, t->hour, t->min, t->sec);

#if 0	/* it trashes my rtc */
		now = mktime(t->year + 1900, t->mon + 1, t->day,
			     t->hour, t->min, t->sec);

		if (macintosh_config->adb_type == MAC_ADB_II) {
			via_write_time(now);
		} else if ((macintosh_config->adb_type == MAC_ADB_IISI) ||
			   (macintosh_config->adb_type == MAC_ADB_PB1) ||
			   (macintosh_config->adb_type == MAC_ADB_PB2) ||
			   (macintosh_config->adb_type == MAC_ADB_CUDA)) {
			adb_write_time(now);
		} else if (macintosh_config->adb_type == MAC_ADB_IOP) {
			via_write_time(now);
		}
#endif
	}
	return 0;
}

/*
 * Set minutes/seconds in the hardware clock
 */

int mac_set_clock_mmss (unsigned long nowtime)
{
	struct hwclk_time now;

	mac_hwclk(0, &now);
	now.sec = nowtime % 60;
	now.min = (nowtime / 60) % 60;
	mac_hwclk(1, &now);

	return 0;
}
#include <linux/string.h>
#include <linux/kernel.h>
#include <linux/sched.h>
#include <asm/irq.h>
#include <asm/setup.h>
#include <asm/bootinfo.h>
#include <asm/macintosh.h>

/*
 *	Booter vars
 */
 
int boothowto;
int _boothowto;
 
/*
 *	Called early to parse the environment (passed to us from the booter)
 *	into a bootinfo struct. Will die as soon as we have our own booter
 */

#define atol(x)	simple_strtoul(x,NULL,0)
 
void parse_booter(char *env)
{
 	char *name;
 	char *value;
#if 0
 	while(0 && *env)
#else
 	while(*env)
#endif
 	{
 		name=env;
 		value=name;
 		while(*value!='='&&*value)
 			value++;
 		if(*value=='=')
 			*value++=0;
 		env=value;
 		while(*env)
 			env++;
 		env++;
#if 0 			
 		if(strcmp(name,"VIDEO_ADDR")==0)
 			mac_mch.videoaddr=atol(value);
 		if(strcmp(name,"ROW_BYTES")==0)
 			mac_mch.videorow=atol(value); 			
 		if(strcmp(name,"SCREEN_DEPTH")==0)
 			mac_mch.videodepth=atol(value);
 		if(strcmp(name,"DIMENSIONS")==0)
 			mac_mch.dimensions=atol(value);
#endif 			
 		if(strcmp(name,"BOOTTIME")==0)
 			mac_bi_data.boottime=atol(value);
 		if(strcmp(name,"GMTBIAS")==0)
 			mac_bi_data.gmtbias=atol(value);
 		if(strcmp(name,"BOOTERVER")==0)
 			mac_bi_data.bootver=atol(value);
 		if(strcmp(name,"MACOS_VIDEO")==0)
 			mac_bi_data.videological=atol(value);
 		if(strcmp(name,"MACOS_SCC")==0)
 			mac_bi_data.sccbase=atol(value);
 		if(strcmp(name,"MACHINEID")==0)
 			mac_bi_data.id=atol(value);
 		if(strcmp(name,"MEMSIZE")==0)
 			mac_bi_data.memsize=atol(value);
 		if(strcmp(name,"SERIAL_MODEM_FLAGS")==0)
 			mac_bi_data.serialmf=atol(value);
 		if(strcmp(name,"SERIAL_MODEM_HSKICLK")==0)
 			mac_bi_data.serialhsk=atol(value);
 		if(strcmp(name,"SERIAL_MODEM_GPICLK")==0)
 			mac_bi_data.serialgpi=atol(value);
 		if(strcmp(name,"SERIAL_PRINT_FLAGS")==0)
 			mac_bi_data.printmf=atol(value);
 		if(strcmp(name,"SERIAL_PRINT_HSKICLK")==0)
 			mac_bi_data.printhsk=atol(value);
 		if(strcmp(name,"SERIAL_PRINT_GPICLK")==0)
 			mac_bi_data.printgpi=atol(value);
 		if(strcmp(name,"PROCESSOR")==0)
 			mac_bi_data.cpuid=atol(value);
 		if(strcmp(name,"ROMBASE")==0)
 			mac_bi_data.rombase=atol(value);
 		if(strcmp(name,"TIMEDBRA")==0)
 			mac_bi_data.timedbra=atol(value);
 		if(strcmp(name,"ADBDELAY")==0)
 			mac_bi_data.adbdelay=atol(value);
 	}
#if 0	/* XXX: TODO with m68k_mach_* */
 	/* Fill in the base stuff */
 	boot_info.machtype=MACH_MAC;
 	/* Read this from the macinfo we got ! */
/*	boot_info.cputype=CPU_68020|FPUB_68881;*/
/* 	boot_info.memory[0].addr=0;*/
/* 	boot_info.memory[0].size=((mac_bi_data.id>>7)&31)<<20;*/
 	boot_info.num_memory=1;		/* On a MacII */
 	boot_info.ramdisk_size=0;	/* For now */
 	*boot_info.command_line=0;
#endif
 }
 

void print_booter(char *env)
{
 	char *name;
 	char *value;
 	while(*env)
 	{
 		name=env;
 		value=name;
 		while(*value!='='&&*value)
 			value++;
 		if(*value=='=')
 			*value++=0;
 		env=value;
 		while(*env)
 			env++;
 		env++;
 		printk("%s=%s\n", name,value);
 	}
 }
 

/*
 *	Macintosh interrupts
 *
 * General design:
 * In contrary to the Amiga and Atari platforms, the Mac hardware seems to 
 * exclusively use the autovector interrupts (the 'generic level0-level7' 
 * interrupts with exception vectors 0x19-0x1f). The following interrupt levels
 * are used:
 *	1	- VIA1
 *		  - slot 0: one second interrupt (CA2)
 *		  - slot 1: VBlank (CA1)
 *		  - slot 2: ADB data ready (SR full)
 *		  - slot 3: ADB data  (CB2)
 *		  - slot 4: ADB clock (CB1)
 *		  - slot 5: timer 2
 *		  - slot 6: timer 1
 *		  - slot 7: status of IRQ; signals 'any enabled int.'
 *
 *	2	- VIA2 or RBV
 *		  - slot 0: SCSI DRQ (CA2)
 *		  - slot 1: NUBUS IRQ (CA1) need to read port A to find which
 *		  - slot 2: /EXP IRQ (only on IIci)
 *		  - slot 3: SCSI IRQ (CB2)
 *		  - slot 4: ASC IRQ (CB1)
 *		  - slot 5: timer 2 (not on IIci)
 *		  - slot 6: timer 1 (not on IIci)
 *		  - slot 7: status of IRQ; signals 'any enabled int.'
 *
 *	2	- OSS (IIfx only?)
 *		  - slot 0: SCSI interrupt
 *		  - slot 1: Sound interrupt
 *
 * Levels 3-6 vary by machine type. For VIA or RBV Macintohes:
 *
 *	3	- unused (?)
 *
 *	4	- SCC (slot number determined by reading RR3 on the SSC itself)
 *		  - slot 1: SCC channel A
 *		  - slot 2: SCC channel B
 *
 *	5	- unused (?)
 *		  [serial errors or special conditions seem to raise level 6
 *		  interrupts on some models (LC4xx?)]
 *
 *	6	- off switch (?)
 *
 * For OSS Macintoshes (IIfx only at this point):
 *
 *	3	- Nubus interrupt
 *		  - slot 0: Slot $9
 *		  - slot 1: Slot $A
 *		  - slot 2: Slot $B
 *		  - slot 3: Slot $C
 *		  - slot 4: Slot $D
 *		  - slot 5: Slot $E
 *
 *	4	- SCC IOP
 *		  - slot 1: SCC channel A
 *		  - slot 2: SCC channel B
 *
 *	5	- ISM IOP (ADB?)
 *
 *	6	- unused
 *
 * For PSC Macintoshes (660AV, 840AV):
 *
 *	3	- PSC level 3
 *		  - slot 0: MACE
 *
 *	4	- PSC level 4
 *		  - slot 1: SCC channel A interrupt
 *		  - slot 2: SCC channel B interrupt
 *		  - slot 3: MACE DMA
 *
 *	5	- PSC level 5
 *
 *	6	- PSC level 6
 *
 * Finally we have good 'ole level 7, the non-maskable interrupt:
 *
 *	7	- NMI (programmer's switch on the back of some Macs)
 *		  Also RAM parity error on models which support it (IIc, IIfx?)
 *
 * The current interrupt logic looks something like this:
 *
 * - We install dispatchers for the autovector interrupts (1-7). These
 *   dispatchers are responsible for querying the hardware (the
 *   VIA/RBV/OSS/PSC chips) to determine the actual interrupt source. Using
 *   this information a machspec interrupt number is generated by placing the
 *   index of the interrupt hardware into the low three bits and the original
 *   autovector interrupt number in the upper 5 bits. The handlers for the
 *   resulting machspec interrupt are then called.
 *
 * - Nubus is a special case because its interrupts are hidden behind two
 *   layers of hardware. Nubus interrupts come in as index 1 on VIA #2,
 *   which translates to IRQ number 17. In this spot we install _another_
 *   dispatcher. This dispatcher finds the interrupting slot number (9-F) and
 *   then forms a new machspec interrupt number as above with the slot number
 *   minus 9 in the low three bits and the pseudo-level 7 in the upper five
 *   bits.  The handlers for this new machspec interrupt number are then
 *   called. This puts Nubus interrupts into the range 56-62.
 *
 * - The Baboon interrupts (used on some PowerBooks) are an even more special
 *   case. They're hidden behind the Nubus slot $C interrupt thus adding a
 *   third layer of indirection. Why oh why did the Apple engineers do that?
 *
 * - We support "fast" and "slow" handlers, just like the Amiga port. The
 *   fast handlers are called first and with all interrupts disabled. They
 *   are expected to execute quickly (hence the name). The slow handlers are
 *   called last with interrupts enabled and the interrupt level restored.
 *   They must therefore be reentrant.
 *
 *   TODO:
 *
 */

#include <linux/types.h>
#include <linux/kernel.h>
#include <linux/sched.h>
#include <linux/kernel_stat.h>
#include <linux/interrupt.h> /* for intr_count */
#include <linux/delay.h>

#include <asm/system.h>
#include <asm/irq.h>
#include <asm/traps.h>
#include <asm/bootinfo.h>
#include <asm/machw.h>
#include <asm/macintosh.h>
#include <asm/mac_via.h>
#include <asm/mac_psc.h>
#include <asm/hwtest.h>

#include <asm/macints.h>

#define DEBUG_SPURIOUS
#define SHUTUP_SONIC

/*
 * The mac_irq_list array is an array of linked lists of irq_node_t nodes.
 * Each node contains one handler to be called whenever the interrupt
 * occurs, with fast handlers listed before slow handlers.
 */

irq_node_t *mac_irq_list[NUM_MAC_SOURCES];

/* SCC interrupt mask */

static int scc_mask;

/*
 * VIA/RBV hooks
 */

extern void via_init(void);
extern void via_register_interrupts(void);
extern void via_irq_enable(int);
extern void via_irq_disable(int);
extern void via_irq_clear(int);
extern int  via_irq_pending(int);

/*
 * OSS hooks
 */

extern int oss_present;

extern void oss_init(void);
extern void oss_register_interrupts(void);
extern void oss_irq_enable(int);
extern void oss_irq_disable(int);
extern void oss_irq_clear(int);
extern int  oss_irq_pending(int);

/*
 * PSC hooks
 */

extern int psc_present;

extern void psc_init(void);
extern void psc_register_interrupts(void);
extern void psc_irq_enable(int);
extern void psc_irq_disable(int);
extern void psc_irq_clear(int);
extern int  psc_irq_pending(int);

/*
 * IOP hooks
 */

extern void iop_register_interrupts(void);

/*
 * Baboon hooks
 */

extern int baboon_present;

extern void baboon_init(void);
extern void baboon_register_interrupts(void);
extern void baboon_irq_enable(int);
extern void baboon_irq_disable(int);
extern void baboon_irq_clear(int);
extern int  baboon_irq_pending(int);

/*
 * SCC interrupt routines
 */

static void scc_irq_enable(int);
static void scc_irq_disable(int);

/*
 * console_loglevel determines NMI handler function
 */

extern void mac_bang(int, void *, struct pt_regs *);

void mac_nmi_handler(int, void *, struct pt_regs *);
void mac_debug_handler(int, void *, struct pt_regs *);

/* #define DEBUG_MACINTS */

void mac_init_IRQ(void)
{
        int i;

#ifdef DEBUG_MACINTS
	printk("mac_init_IRQ(): Setting things up...\n");
#endif
	/* Initialize the IRQ handler lists. Initially each list is empty, */

	for (i = 0; i < NUM_MAC_SOURCES; i++) {
		mac_irq_list[i] = NULL;
	}

	scc_mask = 0;

	/* Make sure the SONIC interrupt is cleared or things get ugly */
#ifdef SHUTUP_SONIC
	printk("Killing onboard sonic... ");
	/* This address should hopefully be mapped already */
	if (hwreg_present((void*)(0x50f0a000))) {
		*(long *)(0x50f0a014) = 0x7fffL;
		*(long *)(0x50f0a010) = 0L;
	}
	printk("Done.\n");
#endif /* SHUTUP_SONIC */

	/* 
	 * Now register the handlers for the the master IRQ handlers
	 * at levels 1-7. Most of the work is done elsewhere.
	 */

	if (oss_present) {
		oss_register_interrupts();
	} else {
		via_register_interrupts();
	}
	if (psc_present) psc_register_interrupts();
	if (baboon_present) baboon_register_interrupts();
	iop_register_interrupts();
	sys_request_irq(7, mac_nmi_handler, IRQ_FLG_LOCK, "NMI", mac_nmi_handler);
#ifdef DEBUG_MACINTS
	printk("mac_init_IRQ(): Done!\n");
#endif
}

/*
 * Routines to work with irq_node_t's on linked lists lifted from
 * the Amiga code written by Roman Zippel.
 */

static inline void mac_insert_irq(irq_node_t **list, irq_node_t *node)
{
	unsigned long cpu_flags;
	irq_node_t *cur;

	if (!node->dev_id)
		printk("%s: Warning: dev_id of %s is zero\n",
		       __FUNCTION__, node->devname);

	save_flags(cpu_flags);
	cli();

	cur = *list;

	if (node->flags & IRQ_FLG_FAST) {
		node->flags &= ~IRQ_FLG_SLOW;
		while (cur && cur->flags & IRQ_FLG_FAST) {
			list = &cur->next;
			cur = cur->next;
		}
	} else if (node->flags & IRQ_FLG_SLOW) {
		while (cur) {
			list = &cur->next;
			cur = cur->next;
		}
	} else {
		while (cur && !(cur->flags & IRQ_FLG_SLOW)) {
			list = &cur->next;
			cur = cur->next;
		}
	}

	node->next = cur;
	*list = node;

	restore_flags(cpu_flags);
}

static inline void mac_delete_irq(irq_node_t **list, void *dev_id)
{
	unsigned long cpu_flags;
	irq_node_t *node;

	save_flags(cpu_flags);
	cli();

	for (node = *list; node; list = &node->next, node = *list) {
		if (node->dev_id == dev_id) {
			*list = node->next;
			/* Mark it as free. */
			node->handler = NULL;
			restore_flags(cpu_flags);
			return;
		}
	}
	restore_flags(cpu_flags);
	printk ("%s: tried to remove invalid irq\n", __FUNCTION__);
}

/*
 * Call all the handlers for a given interrupt. Fast handlers are called
 * first followed by slow handlers.
 *
 * This code taken from the original Amiga code written by Roman Zippel.
 */

void mac_do_irq_list(int irq, struct pt_regs *fp)
{
	irq_node_t *node, *slow_nodes;
	unsigned long cpu_flags;

	kstat.irqs[0][irq]++;

#ifdef DEBUG_SPURIOUS
	if (!mac_irq_list[irq] && (console_loglevel > 7)) {
		printk("mac_do_irq_list: spurious interrupt %d!\n", irq);
		return;
	}
#endif

	/* serve first fast and normal handlers */
	for (node = mac_irq_list[irq];
	     node && (!(node->flags & IRQ_FLG_SLOW));
	     node = node->next)
		node->handler(irq, node->dev_id, fp);
	if (!node) return;
	save_flags(cpu_flags);
	restore_flags((cpu_flags & ~0x0700) | (fp->sr & 0x0700));
	/* if slow handlers exists, serve them now */
	slow_nodes = node;
	for (; node; node = node->next) {
		node->handler(irq, node->dev_id, fp);
	}
}

/*
 *  mac_enable_irq - enable an interrupt source
 * mac_disable_irq - disable an interrupt source
 *   mac_clear_irq - clears a pending interrupt
 * mac_pending_irq - Returns the pending status of an IRQ (nonzero = pending)
 *
 * These routines are just dispatchers to the VIA/OSS/PSC routines.
 */

void mac_enable_irq (unsigned int irq)
{
	int irq_src	= IRQ_SRC(irq);

	switch(irq_src) {
		case 1: via_irq_enable(irq);
			break;
		case 2:
		case 7: if (oss_present) {
				oss_irq_enable(irq);
			} else {
				via_irq_enable(irq);
			}
			break;
		case 3:
		case 4:
		case 5:
		case 6: if (psc_present) {
				psc_irq_enable(irq);
			} else if (oss_present) {
				oss_irq_enable(irq);
			} else if (irq_src == 4) {
				scc_irq_enable(irq);
			}
			break;
		case 8: if (baboon_present) {
				baboon_irq_enable(irq);
			}
			break;
	}
}

void mac_disable_irq (unsigned int irq)
{
	int irq_src	= IRQ_SRC(irq);

	switch(irq_src) {
		case 1: via_irq_disable(irq);
			break;
		case 2:
		case 7: if (oss_present) {
				oss_irq_disable(irq);
			} else {
				via_irq_disable(irq);
			}
			break;
		case 3:
		case 4:
		case 5:
		case 6: if (psc_present) {
				psc_irq_disable(irq);
			} else if (oss_present) {
				oss_irq_disable(irq);
			} else if (irq_src == 4) {
				scc_irq_disable(irq);
			}
			break;
		case 8: if (baboon_present) {
				baboon_irq_disable(irq);
			}
			break;
	}
}

void mac_clear_irq( unsigned int irq )
{
	switch(IRQ_SRC(irq)) {
		case 1: via_irq_clear(irq);
			break;
		case 2:
		case 7: if (oss_present) {
				oss_irq_clear(irq);
			} else {
				via_irq_clear(irq);
			}
			break;
		case 3:
		case 4:
		case 5:
		case 6: if (psc_present) {
				psc_irq_clear(irq);
			} else if (oss_present) {
				oss_irq_clear(irq);
			}
			break;
		case 8: if (baboon_present) {
				baboon_irq_clear(irq);
			}
			break;
	}
}

int mac_irq_pending( unsigned int irq )
{
	switch(IRQ_SRC(irq)) {
		case 1: return via_irq_pending(irq);
		case 2:
		case 7: if (oss_present) {
				return oss_irq_pending(irq);
			} else {
				return via_irq_pending(irq);
			}
		case 3:
		case 4:
		case 5:
		case 6: if (psc_present) {
				return psc_irq_pending(irq);
			} else if (oss_present) {
				return oss_irq_pending(irq);
			}
	}
	return 0;
}

/*
 * Add an interrupt service routine to an interrupt source.
 * Returns 0 on success.
 *
 * FIXME: You can register interrupts on nonexistant source (ie PSC4 on a
 *        non-PSC machine). We should return -EINVAL in those cases.
 */
 
int mac_request_irq(unsigned int irq,
		    void (*handler)(int, void *, struct pt_regs *),
		    unsigned long flags, const char *devname, void *dev_id)
{
	irq_node_t *node;

#ifdef DEBUG_MACINTS
	printk ("%s: irq %d requested for %s\n", __FUNCTION__, irq, devname);
#endif

	if (irq < VIA1_SOURCE_BASE) {
		return sys_request_irq(irq, handler, flags, devname, dev_id);
	}

	if (irq >= NUM_MAC_SOURCES) {
		printk ("%s: unknown irq %d requested by %s\n",
		        __FUNCTION__, irq, devname);
	}

	/* Get a node and stick it onto the right list */

	if (!(node = new_irq_node())) return -ENOMEM;

	node->handler	= handler;
	node->flags	= flags;
	node->dev_id	= dev_id;
	node->devname	= devname;
	node->next	= NULL;
	mac_insert_irq(&mac_irq_list[irq], node);

	/* Now enable the IRQ source */

	mac_enable_irq(irq);

	return 0;
}
                            
/*
 * Removes an interrupt service routine from an interrupt source.
 */

void mac_free_irq(unsigned int irq, void *dev_id)
{
#ifdef DEBUG_MACINTS
	printk ("%s: irq %d freed by %p\n", __FUNCTION__, irq, dev_id);
#endif

	if (irq < VIA1_SOURCE_BASE) {
		return sys_free_irq(irq, dev_id);
	}

	if (irq >= NUM_MAC_SOURCES) {
		printk ("%s: unknown irq %d freed\n",
		        __FUNCTION__, irq);
		return;
	}

	mac_delete_irq(&mac_irq_list[irq], dev_id);

	/* If the list for this interrupt is */
	/* empty then disable the source.    */

	if (!mac_irq_list[irq]) {
		mac_disable_irq(irq);
	}
}

/*
 * Generate a pretty listing for /proc/interrupts
 *
 * By the time we're called the autovector interrupt list has already been
 * generated, so we just need to do the machspec interrupts.
 *
 * 990506 (jmt) - rewritten to handle chained machspec interrupt handlers.
 *                Also removed display of num_spurious it is already
 *		  displayed for us as autovector irq 0.
 */

int mac_get_irq_list (char *buf)
{
	int i, len = 0;
	irq_node_t *node;
	char *base;

	/* Don't do Nubus interrupts in this loop; we do them separately  */
	/* below so that we can print slot numbers instead of IRQ numbers */

	for (i = VIA1_SOURCE_BASE ; i < NUM_MAC_SOURCES ; ++i) {

		/* Nonexistant interrupt or nothing registered; skip it. */

		if ((node = mac_irq_list[i]) == NULL) continue;
		if (node->flags & IRQ_FLG_STD) continue;

		base = "";
		switch(IRQ_SRC(i)) {
			case 1: base = "via1";
				break;
			case 2: if (oss_present) {
					base = "oss";
				} else {
					base = "via2";
				}
				break;
			case 3:
			case 4:
			case 5:
			case 6: if (psc_present) {
					base = "psc";
				} else if (oss_present) {
					base = "oss";
				} else {
					if (IRQ_SRC(i) == 4) base = "scc";
				}
				break;
			case 7: base = "nbus";
				break;
			case 8: base = "bbn";
				break;
		}
		len += sprintf(buf+len, "%4s %2d: %10u ",
				base, i, kstat.irqs[0][i]);

		do {
			if (node->flags & IRQ_FLG_FAST) {
				len += sprintf(buf+len, "F ");
			} else if (node->flags & IRQ_FLG_SLOW) {
				len += sprintf(buf+len, "S ");
			} else {
				len += sprintf(buf+len, "  ");
			}
			len += sprintf(buf+len, "%s\n", node->devname);
			if ((node = node->next)) {
				len += sprintf(buf+len, "                    ");
			}
		} while(node);

	}
	return len;
}

void mac_default_handler(int irq, void *dev_id, struct pt_regs *regs)
{
#ifdef DEBUG_SPURIOUS
	printk("Unexpected IRQ %d on device %p\n", irq, dev_id);
#endif
}

static int num_debug[8] = { 0, 0, 0, 0, 0, 0, 0, 0 };

void mac_debug_handler(int irq, void *dev_id, struct pt_regs *regs)
{
	if (num_debug[irq] < 10) {
		printk("DEBUG: Unexpected IRQ %d\n", irq);
		num_debug[irq]++;
	}
}

static int in_nmi = 0;
static volatile int nmi_hold = 0;

void mac_nmi_handler(int irq, void *dev_id, struct pt_regs *fp)
{
	int i;
	/* 
	 * generate debug output on NMI switch if 'debug' kernel option given
	 * (only works with Penguin!)
	 */

	in_nmi++;
	for (i=0; i<100; i++)
		udelay(1000);

	if (in_nmi == 1) {
		nmi_hold = 1;
		printk("... pausing, press NMI to resume ...");
	} else {
		printk(" ok!\n");
		nmi_hold = 0;
	}

	barrier();

	while (nmi_hold == 1)
		udelay(1000);

	if ( console_loglevel >= 8 ) {
#if 0
		show_state();
		printk("PC: %08lx\nSR: %04x  SP: %p\n", fp->pc, fp->sr, fp);
		printk("d0: %08lx    d1: %08lx    d2: %08lx    d3: %08lx\n",
		       fp->d0, fp->d1, fp->d2, fp->d3);
		printk("d4: %08lx    d5: %08lx    a0: %08lx    a1: %08lx\n",
		       fp->d4, fp->d5, fp->a0, fp->a1);
	
		if (STACK_MAGIC != *(unsigned long *)current->kernel_stack_page)
			printk("Corrupted stack page\n");
		printk("Process %s (pid: %d, stackpage=%08lx)\n",
			current->comm, current->pid, current->kernel_stack_page);
		if (intr_count == 1)
			dump_stack((struct frame *)fp);
#else
		/* printk("NMI "); */
#endif
	}
	in_nmi--;
}

/*
 * Simple routines for masking and unmasking
 * SCC interrupts in cases where this can't be
 * done in hardware (only the PSC can do that.)
 */

static void scc_irq_enable(int irq) {
	int irq_idx     = IRQ_IDX(irq);

	scc_mask |= (1 << irq_idx);
}

static void scc_irq_disable(int irq) {
	int irq_idx     = IRQ_IDX(irq);

	scc_mask &= ~(1 << irq_idx);
}

/*
 * SCC master interrupt handler. We have to do a bit of magic here
 * to figure out what channel gave us the interrupt; putting this
 * here is cleaner than hacking it into drivers/char/macserial.c.
 */

void mac_scc_dispatch(int irq, void *dev_id, struct pt_regs *regs)
{
	volatile unsigned char *scc = (unsigned char *) mac_bi_data.sccbase + 2;
	unsigned char reg;
	unsigned long cpu_flags;

	/* Read RR3 from the chip. Always do this on channel A */
	/* This must be an atomic operation so disable irqs.   */

	save_flags(cpu_flags); cli();
	*scc = 3;
	reg = *scc;
	restore_flags(cpu_flags);

	/* Now dispatch. Bits 0-2 are for channel B and */
	/* bits 3-5 are for channel A. We can safely    */
	/* ignore the remaining bits here.              */
	/*                                              */
	/* Note that we're ignoring scc_mask for now.   */
	/* If we actually mask the ints then we tend to */
	/* get hammered by very persistant SCC irqs,    */
	/* and since they're autovector interrupts they */
	/* pretty much kill the system.                 */

	if (reg & 0x38) mac_do_irq_list(IRQ_SCCA, regs);
	if (reg & 0x07) mac_do_irq_list(IRQ_SCCB, regs);
}
#include <linux/module.h>
#include <asm/ptrace.h>
#include <asm/traps.h>

/* Says whether we're using A/UX interrupts or not */
extern int via_alt_mapping;

EXPORT_SYMBOL(via_alt_mapping);
/*
 * linux/arch/m68k/mac/debug.c
 *
 * Shamelessly stolen (SCC code and general framework) from:
 *
 * linux/arch/m68k/atari/debug.c
 *
 * Atari debugging and serial console stuff
 *
 * Assembled of parts of former atari/config.c 97-12-18 by Roman Hodek
 *  
 * This file is subject to the terms and conditions of the GNU General Public
 * License.  See the file COPYING in the main directory of this archive
 * for more details.
 */

#include <linux/config.h>
#include <linux/types.h>
#include <linux/sched.h>
#include <linux/tty.h>
#include <linux/console.h>
#include <linux/init.h>
#include <linux/delay.h>

#define BOOTINFO_COMPAT_1_0
#include <asm/setup.h>
#include <asm/bootinfo.h>
#include <asm/machw.h>
#include <asm/macints.h>

extern char m68k_debug_device[];

extern struct compat_bootinfo compat_boot_info;

extern unsigned long mac_videobase;
extern unsigned long mac_videodepth;
extern unsigned long mac_rowbytes;

extern void mac_serial_print(char *);

#define DEBUG_HEADS
#undef DEBUG_SCREEN
#define DEBUG_SERIAL

/*
 * These two auxiliary debug functions should go away ASAP. Only usage: 
 * before the console output is up (after head.S come some other crucial
 * setup routines :-) it permits writing 'data' to the screen as bit patterns
 * (good luck reading those). Helped to figure that the bootinfo contained
 * garbage data on the amount and size of memory chunks ...
 *
 * The 'pos' argument now simply means 'linefeed after print' ...
 */

#ifdef DEBUG_SCREEN
static int peng=0, line=0;
#endif

void mac_debugging_short(int pos, short num)
{
#ifdef DEBUG_SCREEN
	unsigned char *pengoffset;
	unsigned char *pptr;
	int i;
#endif

#ifdef DEBUG_SERIAL
	printk("debug: %d !\n", num);
#endif

#ifdef DEBUG_SCREEN
	if (!MACH_IS_MAC) {
		/* printk("debug: %d !\n", num); */
		return;
	}

	/* calculate current offset */
	pengoffset=(unsigned char *)(mac_videobase+(150+line*2)*mac_rowbytes)
		    +80*peng;
	
	pptr=pengoffset;
	
	for(i=0;i<8*sizeof(short);i++) /* # of bits */
	{
		/*        value        mask for bit i, reverse order */
		*pptr++ = (num & ( 1 << (8*sizeof(short)-i-1) ) ? 0xFF : 0x00);
	}

	peng++;

	if (pos) {
		line++;
		peng = 0;
	}
#endif
}

void mac_debugging_long(int pos, long addr)
{
#ifdef DEBUG_SCREEN
	unsigned char *pengoffset;
	unsigned char *pptr;
	int i;
#endif

#ifdef DEBUG_SERIAL
	printk("debug: #%ld !\n", addr);
#endif

#ifdef DEBUG_SCREEN
	if (!MACH_IS_MAC) {
		/* printk("debug: #%ld !\n", addr); */
		return;
	}
	
	pengoffset=(unsigned char *)(mac_videobase+(150+line*2)*mac_rowbytes)
		    +80*peng;
	
	pptr=pengoffset;
	
	for(i=0;i<8*sizeof(long);i++) /* # of bits */
	{
		*pptr++ = (addr & ( 1 << (8*sizeof(long)-i-1) ) ? 0xFF : 0x00);
	}

	peng++;

	if (pos) {
		line++;
		peng = 0;
	}
#endif
}

#ifdef DEBUG_SERIAL
/*
 * TODO: serial debug code
 */

struct SCC
 {
  u_char cha_b_ctrl;
  u_char char_dummy1;
  u_char cha_a_ctrl;
  u_char char_dummy2;
  u_char cha_b_data;
  u_char char_dummy3;
  u_char cha_a_data;
 };

# define scc (*((volatile struct SCC*)mac_bi_data.sccbase))

/* Flag that serial port is already initialized and used */
int mac_SCC_init_done = 0;
/* Can be set somewhere, if a SCC master reset has already be done and should
 * not be repeated; used by kgdb */
int mac_SCC_reset_done = 0;

static int scc_port = -1;

static struct console mac_console_driver = {
	name:		"debug",
	flags:		CON_PRINTBUFFER,
	index:		-1,
};

/*
 * Crude hack to get console output to the screen before the framebuffer
 * is initialized (happens a lot later in 2.1!).
 * We just use the console routines declared in head.S, this will interfere
 * with regular framebuffer console output and should be used exclusively
 * to debug kernel problems manifesting before framebuffer init (aka WSOD)
 *
 * To keep this hack from interfering with the regular console driver, either
 * deregister this driver before/on framebuffer console init, or silence this
 * function after the fbcon driver is running (will lose console messages!?).
 * To debug real early bugs, need to write a 'mac_register_console_hack()'
 * that is called from start_kernel() before setup_arch() and just registers
 * this driver if Mac.
 */

void mac_debug_console_write (struct console *co, const char *str,
			      unsigned int count)
{
	mac_serial_print(str);
}



/* Mac: loops_per_jiffy min. 19000 ^= .5 us; MFPDELAY was 0.6 us*/

#define uSEC 1

static inline void mac_sccb_out (char c)
{
    int i;
    do {
	for( i = uSEC; i > 0; --i )
		barrier();
    } while (!(scc.cha_b_ctrl & 0x04)); /* wait for tx buf empty */
    for( i = uSEC; i > 0; --i )
	barrier();
    scc.cha_b_data = c;
}

static inline void mac_scca_out (char c)
{
    int i;
    do {
	for( i = uSEC; i > 0; --i )
		barrier();
    } while (!(scc.cha_a_ctrl & 0x04)); /* wait for tx buf empty */
    for( i = uSEC; i > 0; --i )
	barrier();
    scc.cha_a_data = c;
}

void mac_sccb_console_write (struct console *co, const char *str,
			      unsigned int count)
{
    while (count--) {
	if (*str == '\n')
	    mac_sccb_out( '\r' );
	mac_sccb_out( *str++ );
    }
}

void mac_scca_console_write (struct console *co, const char *str,
			      unsigned int count)
{
    while (count--) {
	if (*str == '\n')
	    mac_scca_out( '\r' );
	mac_scca_out( *str++ );
    }
}

#if defined(CONFIG_SERIAL_CONSOLE) || defined(DEBUG_SERIAL)
int mac_sccb_console_wait_key(struct console *co)
{
    int i;
    do {
	for( i = uSEC; i > 0; --i )
		barrier();
    } while( !(scc.cha_b_ctrl & 0x01) ); /* wait for rx buf filled */
    for( i = uSEC; i > 0; --i )
	barrier();
    return( scc.cha_b_data );
}

int mac_scca_console_wait_key(struct console *co)
{
    int i;
    do {
	for( i = uSEC; i > 0; --i )
		barrier();
    } while( !(scc.cha_a_ctrl & 0x01) ); /* wait for rx buf filled */
    for( i = uSEC; i > 0; --i )
	barrier();
    return( scc.cha_a_data );
}
#endif

/* The following two functions do a quick'n'dirty initialization of the MFP or
 * SCC serial ports. They're used by the debugging interface, kgdb, and the
 * serial console code. */
#define SCCB_WRITE(reg,val)				\
    do {						\
	int i;						\
	scc.cha_b_ctrl = (reg);				\
	for( i = uSEC; i > 0; --i )			\
		barrier();				\
	scc.cha_b_ctrl = (val);				\
	for( i = uSEC; i > 0; --i )			\
		barrier();				\
    } while(0)

#define SCCA_WRITE(reg,val)				\
    do {						\
	int i;						\
	scc.cha_a_ctrl = (reg);				\
	for( i = uSEC; i > 0; --i )			\
		barrier();				\
	scc.cha_a_ctrl = (val);				\
	for( i = uSEC; i > 0; --i )			\
		barrier();				\
    } while(0)

/* loops_per_jiffy isn't initialized yet, so we can't use udelay(). This does a
 * delay of ~ 60us. */
/* Mac: loops_per_jiffy min. 19000 ^= .5 us; MFPDELAY was 0.6 us*/
#define LONG_DELAY()				\
    do {					\
	int i;					\
	for( i = 60*uSEC; i > 0; --i )		\
	    barrier();				\
    } while(0)
    
#ifndef CONFIG_SERIAL_CONSOLE
static void __init mac_init_scc_port( int cflag, int port )
#else
void mac_init_scc_port( int cflag, int port )
#endif
{
	extern int mac_SCC_reset_done;

	/*
	 * baud rates: 1200, 1800, 2400, 4800, 9600, 19.2k, 38.4k, 57.6k, 115.2k
	 */

	static int clksrc_table[9] =
		/* reg 11: 0x50 = BRG, 0x00 = RTxC, 0x28 = TRxC */
    		{ 0x50, 0x50, 0x50, 0x50, 0x50, 0x50, 0x50, 0x00, 0x00 };
	static int clkmode_table[9] =
		/* reg 4: 0x40 = x16, 0x80 = x32, 0xc0 = x64 */
    		{ 0x40, 0x40, 0x40, 0x40, 0x40, 0x40, 0x40, 0xc0, 0x80 };
	static int div_table[9] =
		/* reg12 (BRG low) */
    		{ 94, 62, 46, 22, 10, 4, 1, 0, 0 };

    int baud = cflag & CBAUD;
    int clksrc, clkmode, div, reg3, reg5;
    
    if (cflag & CBAUDEX)
	baud += B38400;
    if (baud < B1200 || baud > B38400+2)
	baud = B9600; /* use default 9600bps for non-implemented rates */
    baud -= B1200; /* tables starts at 1200bps */

    clksrc  = clksrc_table[baud];
    clkmode = clkmode_table[baud];
    div     = div_table[baud];

    reg3 = (((cflag & CSIZE) == CS8) ? 0xc0 : 0x40);
    reg5 = (((cflag & CSIZE) == CS8) ? 0x60 : 0x20) | 0x82 /* assert DTR/RTS */;

    if (port == 1) {
	    (void)scc.cha_b_ctrl;	/* reset reg pointer */
	    SCCB_WRITE( 9, 0xc0 );	/* reset */
	    LONG_DELAY();		/* extra delay after WR9 access */
	    SCCB_WRITE( 4, (cflag & PARENB) ? ((cflag & PARODD) ? 0x01 : 0x03) : 0 |
			  0x04 /* 1 stopbit */ |
			  clkmode );
	    SCCB_WRITE( 3, reg3 );
	    SCCB_WRITE( 5, reg5 );
	    SCCB_WRITE( 9, 0 );		/* no interrupts */
	    LONG_DELAY();		/* extra delay after WR9 access */
	    SCCB_WRITE( 10, 0 );	/* NRZ mode */
	    SCCB_WRITE( 11, clksrc );	/* main clock source */
	    SCCB_WRITE( 12, div );	/* BRG value */
	    SCCB_WRITE( 13, 0 );		/* BRG high byte */
	    SCCB_WRITE( 14, 1 );
	    SCCB_WRITE( 3, reg3 | 1 );
	    SCCB_WRITE( 5, reg5 | 8 );
    } else if (port == 0) {
	    (void)scc.cha_a_ctrl;	/* reset reg pointer */
	    SCCA_WRITE( 9, 0xc0 );	/* reset */
	    LONG_DELAY();		/* extra delay after WR9 access */
	    SCCA_WRITE( 4, (cflag & PARENB) ? ((cflag & PARODD) ? 0x01 : 0x03) : 0 |
			  0x04 /* 1 stopbit */ |
			  clkmode );
	    SCCA_WRITE( 3, reg3 );
	    SCCA_WRITE( 5, reg5 );
	    SCCA_WRITE( 9, 0 );		/* no interrupts */
	    LONG_DELAY();		/* extra delay after WR9 access */
	    SCCA_WRITE( 10, 0 );	/* NRZ mode */
	    SCCA_WRITE( 11, clksrc );	/* main clock source */
	    SCCA_WRITE( 12, div );	/* BRG value */
	    SCCA_WRITE( 13, 0 );		/* BRG high byte */
	    SCCA_WRITE( 14, 1 );
	    SCCA_WRITE( 3, reg3 | 1 );
	    SCCA_WRITE( 5, reg5 | 8 );
    }

    mac_SCC_reset_done = 1;
    mac_SCC_init_done = 1;
}
#endif /* DEBUG_SERIAL */

void mac_init_scca_port( int cflag )
{
	mac_init_scc_port(cflag, 0);
}

void mac_init_sccb_port( int cflag )
{
	mac_init_scc_port(cflag, 1);
}

void __init mac_debug_init(void)
{
#ifdef DEBUG_SERIAL
    if (   !strcmp( m68k_debug_device, "ser"  )
        || !strcmp( m68k_debug_device, "ser1" )) {
	/* Mac modem port */
	mac_init_scc_port( B9600|CS8, 0 );
	mac_console_driver.write = mac_scca_console_write;
#ifdef CONFIG_SERIAL_CONSOLE
	mac_console_driver.wait_key = mac_scca_console_wait_key;
#endif
	scc_port = 0;
    }
    else if (!strcmp( m68k_debug_device, "ser2" )) {
	/* Mac printer port */
	mac_init_scc_port( B9600|CS8, 1 );
	mac_console_driver.write = mac_sccb_console_write;
#ifdef CONFIG_SERIAL_CONSOLE
	mac_console_driver.wait_key = mac_sccb_console_wait_key;
#endif
	scc_port = 1;
    }
#endif
#ifdef DEBUG_HEADS
    if (   !strcmp( m68k_debug_device, "scn"  )
        || !strcmp( m68k_debug_device, "con" )) {
	/* display, using head.S console routines */
	mac_console_driver.write = mac_debug_console_write;
    }
#endif
    if (mac_console_driver.write)
	register_console(&mac_console_driver);
}

/*
 * Local variables:
 *  c-indent-level: 4
 *  tab-width: 8
 * End:
 */
/*
 *	Mac bong noise generator. Note - we ought to put a boingy noise
 *	here 8)
 *	 
 *	----------------------------------------------------------------------
 *	16.11.98:
 *	rewrote some functions, added support for Enhanced ASC (Quadras)
 *	after the NetBSD asc.c console bell patch by Colin Wood/Frederick Bruck
 *	Juergen Mellinger (juergen.mellinger@t-online.de)
 */

#include <linux/sched.h>
#include <linux/timer.h>

#include <asm/macintosh.h>
#include <asm/mac_asc.h>

static int mac_asc_inited = 0;
/*
 * dumb triangular wave table
 */
static __u8 mac_asc_wave_tab[ 0x800 ];

/*
 * Alan's original sine table; needs interpolating to 0x800 
 * (hint: interpolate or hardwire [0 -> Pi/2[, it's symmetric) 
 */
static const signed char sine_data[] = {
	0,  39,  75,  103,  121,  127,  121,  103,  75,  39,
	0, -39, -75, -103, -121, -127, -121, -103, -75, -39
};

/*
 * where the ASC hides ...
 */
static volatile __u8* mac_asc_regs = ( void* )0x50F14000;

/* 
 * sample rate; is this a good default value? 
 */
static unsigned long mac_asc_samplespersec = 11050;  
static int mac_bell_duration = 0;
static unsigned long mac_bell_phase; /* 0..2*Pi -> 0..0x800 (wavetable size) */
static unsigned long mac_bell_phasepersample;

/*
 * some function protos 
 */
static void mac_init_asc( void );
static void mac_nosound( unsigned long );
static void mac_quadra_start_bell( unsigned int, unsigned int, unsigned int );
static void mac_quadra_ring_bell( unsigned long );
static void mac_av_start_bell( unsigned int, unsigned int, unsigned int );
static void ( *mac_special_bell )( unsigned int, unsigned int, unsigned int ) = NULL;

/*
 * our timer to start/continue/stop the bell
 */
static struct timer_list mac_sound_timer = { function: mac_nosound };

/*
 * Sort of initialize the sound chip (called from mac_mksound on the first
 * beep).
 */
static void mac_init_asc( void )
{
	int i;

	/* 
	 * do some machine specific initialization 
	 * BTW:
	 * the NetBSD Quadra patch identifies the Enhanced Apple Sound Chip via
	 * 	mac_asc_regs[ 0x800 ] & 0xF0 != 0
	 * this makes no sense here, because we have to set the default sample
	 * rate anyway if we want correct frequencies
	 */
	switch ( macintosh_config->ident )
	{
		case MAC_MODEL_IIFX:
			/*
			 * The IIfx is always special ...
			 */
			mac_asc_regs = ( void* )0x50010000;
			break;
			/* 
			 * not sure about how correct this list is 
			 * machines with the EASC enhanced apple sound chip 
			 */
		case MAC_MODEL_Q630:
		case MAC_MODEL_P475:
			mac_special_bell = mac_quadra_start_bell;
			mac_asc_samplespersec = 22150;
			break;	
		case MAC_MODEL_C660:
		case MAC_MODEL_Q840:
			/*
			 * The Quadra 660AV and 840AV use the "Singer" custom ASIC for sound I/O.
			 * It appears to be similar to the "AWACS" custom ASIC in the Power Mac 
			 * [678]100.  Because Singer and AWACS may have a similar hardware 
			 * interface, this would imply that the code in drivers/sound/dmasound.c 
			 * for AWACS could be used as a basis for Singer support.  All we have to
			 * do is figure out how to do DMA on the 660AV/840AV through the PSC and 
			 * figure out where the Singer hardware sits in memory. (I'd look in the
			 * vicinity of the AWACS location in a Power Mac [678]100 first, or the 
			 * current location of the Apple Sound Chip--ASC--in other Macs.)  The 
			 * Power Mac [678]100 info can be found in MkLinux Mach kernel sources.
			 *
			 * Quoted from Apple's Tech Info Library, article number 16405:
			 *   "Among desktop Macintosh computers, only the 660AV, 840AV, and Power
			 *   Macintosh models have 16-bit audio input and output capability
			 *   because of the AT&T DSP3210 hardware circuitry and the 16-bit Singer
			 *   codec circuitry in the AVs.  The Audio Waveform Amplifier and
			 *   Converter (AWAC) chip in the Power Macintosh performs the same 
			 *   16-bit I/O functionality.  The PowerBook 500 series computers
			 *   support 16-bit stereo output, but only mono input."
			 *
			 *   http://til.info.apple.com/techinfo.nsf/artnum/n16405
			 *
			 * --David Kilzer
			 */
			mac_special_bell = mac_av_start_bell;
			break;
		case MAC_MODEL_Q650:
		case MAC_MODEL_Q700:
		case MAC_MODEL_Q800:
		case MAC_MODEL_Q900:
		case MAC_MODEL_Q950:
			/*
			 * Currently not implemented!
			 */
			mac_special_bell = NULL;
			break;
		default:
			/*
			 * Every switch needs a default
			 */
			mac_special_bell = NULL;
			break;
	}

	/* 
	 * init the wave table with a simple triangular wave 
	 * A sine wave would sure be nicer here ...
	 */
	for ( i = 0; i < 0x400; i++ )
	{
		mac_asc_wave_tab[ i ] = i / 4;
		mac_asc_wave_tab[ i + 0x400 ] = 0xFF - i / 4;
	}
	mac_asc_inited = 1;
}	

/*
 * Called to make noise; current single entry to the boing driver. 
 * Does the job for simple ASC, calls other routines else.
 * XXX Fixme:
 * Should be split into asc_mksound, easc_mksound, av_mksound and 
 * function pointer set in mac_init_asc which would be called at 
 * init time. 
 * _This_ is rather ugly ...
 */
void mac_mksound( unsigned int freq, unsigned int length )
{
	__u32 cfreq = ( freq << 5 ) / 468;
	__u32 flags;
	int i;

	if ( mac_special_bell == NULL )
	{
		/* Do nothing */
		return;
	}

	if ( !mac_asc_inited )
		mac_init_asc();

	if ( mac_special_bell )
	{
		mac_special_bell( freq, length, 128 );
		return;
	}

	if ( freq < 20 || freq > 20000 || length == 0 )
	{
		mac_nosound( 0 );
		return;
	}

	save_flags( flags );
	cli();

	del_timer( &mac_sound_timer );

	for ( i = 0; i < 0x800; i++ )
		mac_asc_regs[ i ] = 0;	
	for ( i = 0; i < 0x800; i++ )
		mac_asc_regs[ i ] = mac_asc_wave_tab[ i ];

	for ( i = 0; i < 8; i++ )
		*( __u32* )( ( __u32 )mac_asc_regs + ASC_CONTROL + 0x814 + 8 * i ) = cfreq;

	mac_asc_regs[ 0x807 ] = 0;
	mac_asc_regs[ ASC_VOLUME ] = 128;
	mac_asc_regs[ 0x805 ] = 0;
	mac_asc_regs[ 0x80F ] = 0;
	mac_asc_regs[ ASC_MODE ] = ASC_MODE_SAMPLE;
	mac_asc_regs[ ASC_ENABLE ] = ASC_ENABLE_SAMPLE;

	mac_sound_timer.expires = jiffies + length;
	add_timer( &mac_sound_timer );

	restore_flags( flags );	
}

/*
 * regular ASC: stop whining ..
 */
static void mac_nosound( unsigned long ignored )
{
	mac_asc_regs[ ASC_ENABLE ] = 0;
}	

/*
 * EASC entry; init EASC, don't load wavetable, schedule 'start whining'.
 */
static void mac_quadra_start_bell( unsigned int freq, unsigned int length, unsigned int volume )
{
	__u32 flags;

	/* if the bell is already ringing, ring longer */
	if ( mac_bell_duration > 0 )
	{
		mac_bell_duration += length;
		return;
	}

	mac_bell_duration = length;
	mac_bell_phase = 0;
	mac_bell_phasepersample = ( freq * sizeof( mac_asc_wave_tab ) ) / mac_asc_samplespersec;
	/* this is reasonably big for small frequencies */ 

	save_flags( flags );
	cli();

	/* set the volume */
	mac_asc_regs[ 0x806 ] = volume;

	/* set up the ASC registers */
	if ( mac_asc_regs[ 0x801 ] != 1 )
	{
		/* select mono mode */	
		mac_asc_regs[ 0x807 ] = 0;
		/* select sampled sound mode */
		mac_asc_regs[ 0x802 ] = 0;
	 	/* ??? */	
		mac_asc_regs[ 0x801 ] = 1;
		mac_asc_regs[ 0x803 ] |= 0x80;
		mac_asc_regs[ 0x803 ] &= 0x7F;
	}

	mac_sound_timer.function = mac_quadra_ring_bell;
	mac_sound_timer.expires = jiffies + 1;
	add_timer( &mac_sound_timer );

	restore_flags( flags );
}

/*
 * EASC 'start/continue whining'; I'm not sure why the above function didn't
 * already load the wave table, or at least call this one... 
 * This piece keeps reloading the wave table until done.
 */
static void mac_quadra_ring_bell( unsigned long ignored )
{
	int 	i, count = mac_asc_samplespersec / HZ;
	__u32 flags;

	/*
	 * we neither want a sound buffer overflow nor underflow, so we need to match
	 * the number of samples per timer interrupt as exactly as possible.
	 * using the asc interrupt will give better results in the future
	 * ...and the possibility to use a real sample (a boingy noise, maybe...)
	 */

	save_flags( flags );
	cli();
	
	del_timer( &mac_sound_timer );

	if ( mac_bell_duration-- > 0 )
	{
		for ( i = 0; i < count; i++ )
		{
			mac_bell_phase += mac_bell_phasepersample;
			mac_asc_regs[ 0 ] = mac_asc_wave_tab[ mac_bell_phase & ( sizeof( mac_asc_wave_tab ) - 1 ) ];
		}
		mac_sound_timer.expires = jiffies + 1;
		add_timer( &mac_sound_timer );
	}
	else
		mac_asc_regs[ 0x801 ] = 0;
	
	restore_flags( flags );
}

/*
 * AV code - please fill in.
 */
static void mac_av_start_bell( unsigned int freq, unsigned int length, unsigned int volume )
{
} 
/*
 * I/O Processor (IOP) management
 * Written and (C) 1999 by Joshua M. Thompson (funaho@jurai.org)
 *
 * Redistribution and use in source and binary forms, with or without
 * modification, are permitted provided that the following conditions
 * are met:
 * 1. Redistributions of source code must retain the above copyright
 *    notice and this list of conditions.
 * 2. Redistributions in binary form must reproduce the above copyright
 *    notice and this list of conditions in the documentation and/or other
 *    materials provided with the distribution.
 */

/*
 * The IOP chips are used in the IIfx and some Quadras (900, 950) to manage
 * serial and ADB. They are actually a 6502 processor and some glue logic.
 *
 * 990429 (jmt) - Initial implementation, just enough to knock the SCC IOP
 *		  into compatible mode so nobody has to fiddle with the
 *		  Serial Switch control panel anymore.
 * 990603 (jmt) - Added code to grab the correct ISM IOP interrupt for OSS
 *		  and non-OSS machines (at least I hope it's correct on a
 *		  non-OSS machine -- someone with a Q900 or Q950 needs to
 *		  check this.)
 * 990605 (jmt) - Rearranged things a bit wrt IOP detection; iop_present is
 *		  gone, IOP base addresses are now in an array and the
 *		  globally-visible functions take an IOP number instead of an
 *		  an actual base address.
 * 990610 (jmt) - Finished the message passing framework and it seems to work.
 *		  Sending _definately_ works; my adb-bus.c mods can send
 *		  messages and receive the MSG_COMPLETED status back from the
 *		  IOP. The trick now is figuring out the message formats.
 * 990611 (jmt) - More cleanups. Fixed problem where unclaimed messages on a
 *		  receive channel were never properly acknowledged. Bracketed
 *		  the remaining debug printk's with #ifdef's and disabled
 *		  debugging. I can now type on the console.
 * 990612 (jmt) - Copyright notice added. Reworked the way replies are handled.
 *		  It turns out that replies are placed back in the send buffer
 *		  for that channel; messages on the receive channels are always
 *		  unsolicited messages from the IOP (and our replies to them
 *		  should go back in the receive channel.) Also added tracking
 *		  of device names to the listener functions ala the interrupt
 *		  handlers.
 * 990729 (jmt) - Added passing of pt_regs structure to IOP handlers. This is
 *		  used by the new unified ADB driver.
 *
 * TODO:
 *
 * o Something should be periodically checking iop_alive() to make sure the
 *   IOP hasn't died.
 * o Some of the IOP manager routines need better error checking and
 *   return codes. Nothing major, just prettying up.
 */

/*
 * -----------------------
 * IOP Message Passing 101
 * -----------------------
 *
 * The host talks to the IOPs using a rather simple message-passing scheme via
 * a shared memory area in the IOP RAM. Each IOP has seven "channels"; each
 * channel is conneced to a specific software driver on the IOP. For example
 * on the SCC IOP there is one channel for each serial port. Each channel has
 * an incoming and and outgoing message queue with a depth of one.
 *
 * A message is 32 bytes plus a state byte for the channel (MSG_IDLE, MSG_NEW,
 * MSG_RCVD, MSG_COMPLETE). To send a message you copy the message into the
 * buffer, set the state to MSG_NEW and signal the IOP by setting the IRQ flag
 * in the IOP control to 1. The IOP will move the state to MSG_RCVD when it
 * receives the message and then to MSG_COMPLETE when the message processing
 * has completed. It is the host's responsibility at that point to read the
 * reply back out of the send channel buffer and reset the channel state back
 * to MSG_IDLE.
 *
 * To receive message from the IOP the same procedure is used except the roles
 * are reversed. That is, the IOP puts message in the channel with a state of
 * MSG_NEW, and the host receives the message and move its state to MSG_RCVD
 * and then to MSG_COMPLETE when processing is completed and the reply (if any)
 * has been placed back in the receive channel. The IOP will then reset the
 * channel state to MSG_IDLE.
 *
 * Two sets of host interrupts are provided, INT0 and INT1. Both appear on one
 * interrupt level; they are distinguished by a pair of bits in the IOP status
 * register. The IOP will raise INT0 when one or more messages in the send
 * channels have gone to the MSG_COMPLETE state and it will raise INT1 when one
 * or more messages on the receive channels have gone to the MSG_NEW state.
 *
 * Since each channel handles only one message we have to implement a small
 * interrupt-driven queue on our end. Messages to e sent are placed on the
 * queue for sending and contain a pointer to an optional callback function.
 * The handler for a message is called when the message state goes to
 * MSG_COMPLETE.
 *
 * For receiving message we maintain a list of handler functions to call when
 * a message is received on that IOP/channel combination. The handlers are
 * called much like an interrupt handler and are passed a copy of the message
 * from the IOP. The message state will be in MSG_RCVD while the handler runs;
 * it is the handler's responsibility to call iop_complete_message() when
 * finished; this function moves the message state to MSG_COMPLETE and signals
 * the IOP. This two-step process is provided to allow the handler to defer
 * message processing to a bottom-half handler if the processing will take
 * a signifigant amount of time (handlers are called at interrupt time so they
 * should execute quickly.)
 */

#include <linux/config.h>
#include <linux/types.h>
#include <linux/kernel.h>
#include <linux/mm.h>
#include <linux/delay.h>
#include <linux/init.h>
#include <linux/proc_fs.h>

#include <asm/bootinfo.h> 
#include <asm/macintosh.h> 
#include <asm/macints.h> 
#include <asm/mac_iop.h>
#include <asm/mac_oss.h>

/*#define DEBUG_IOP*/

/* Set to nonezero if the IOPs are present. Set by iop_init() */

int iop_scc_present,iop_ism_present;

#ifdef CONFIG_PROC_FS
static int iop_get_proc_info(char *, char **, off_t, int);
#endif /* CONFIG_PROC_FS */

/* structure for tracking channel listeners */

struct listener {
	const char *devname;
	void (*handler)(struct iop_msg *, struct pt_regs *);
};

/*
 * IOP structures for the two IOPs
 *
 * The SCC IOP controls both serial ports (A and B) as its two functions.
 * The ISM IOP controls the SWIM (floppy drive) and ADB.
 */

static volatile struct mac_iop *iop_base[NUM_IOPS];

/*
 * IOP message queues
 */

static struct iop_msg iop_msg_pool[NUM_IOP_MSGS];
static struct iop_msg *iop_send_queue[NUM_IOPS][NUM_IOP_CHAN];
static struct listener iop_listeners[NUM_IOPS][NUM_IOP_CHAN];

void iop_ism_irq(int, void *, struct pt_regs *);

extern void oss_irq_enable(int);

/*
 * Private access functions
 */

static __inline__ void iop_loadaddr(volatile struct mac_iop *iop, __u16 addr)
{
	iop->ram_addr_lo = addr;
	iop->ram_addr_hi = addr >> 8;
}

static __inline__ __u8 iop_readb(volatile struct mac_iop *iop, __u16 addr)
{
	iop->ram_addr_lo = addr;
	iop->ram_addr_hi = addr >> 8;
	return iop->ram_data;
}

static __inline__ void iop_writeb(volatile struct mac_iop *iop, __u16 addr, __u8 data)
{
	iop->ram_addr_lo = addr;
	iop->ram_addr_hi = addr >> 8;
	iop->ram_data = data;
}

static __inline__ void iop_stop(volatile struct mac_iop *iop)
{
	iop->status_ctrl &= ~IOP_RUN;
}

static __inline__ void iop_start(volatile struct mac_iop *iop)
{
	iop->status_ctrl = IOP_RUN | IOP_AUTOINC;
}

static __inline__ void iop_bypass(volatile struct mac_iop *iop)
{
	iop->status_ctrl |= IOP_BYPASS;
}

static __inline__ void iop_interrupt(volatile struct mac_iop *iop)
{
	iop->status_ctrl |= IOP_IRQ;
}

static int iop_alive(volatile struct mac_iop *iop)
{
	int retval;

	retval = (iop_readb(iop, IOP_ADDR_ALIVE) == 0xFF);
	iop_writeb(iop, IOP_ADDR_ALIVE, 0);
	return retval;
}

static struct iop_msg *iop_alloc_msg(void)
{
	int i;
	ulong cpu_flags;

	save_flags(cpu_flags);
	cli();

	for (i = 0 ; i < NUM_IOP_MSGS ; i++) {
		if (iop_msg_pool[i].status == IOP_MSGSTATUS_UNUSED) {
			iop_msg_pool[i].status = IOP_MSGSTATUS_WAITING;
			restore_flags(cpu_flags);
			return &iop_msg_pool[i];
		}
	}

	restore_flags(cpu_flags);
	return NULL;
}

static void iop_free_msg(struct iop_msg *msg)
{
	msg->status = IOP_MSGSTATUS_UNUSED;
}

/*
 * This is called by the startup code before anything else. Its purpose
 * is to find and initalize the IOPs early in the boot sequence, so that
 * the serial IOP can be placed into bypass mode _before_ we try to
 * initialize the serial console.
 */

void __init iop_preinit(void)
{
	if (macintosh_config->scc_type == MAC_SCC_IOP) {
		if (macintosh_config->ident == MAC_MODEL_IIFX) {
			iop_base[IOP_NUM_SCC] = (struct mac_iop *) SCC_IOP_BASE_IIFX;
		} else {
			iop_base[IOP_NUM_SCC] = (struct mac_iop *) SCC_IOP_BASE_QUADRA;
		}
		iop_base[IOP_NUM_SCC]->status_ctrl = 0x87;
		iop_scc_present = 1;
	} else {
		iop_base[IOP_NUM_SCC] = NULL;
		iop_scc_present = 0;
	}
	if (macintosh_config->adb_type == MAC_ADB_IOP) {
		if (macintosh_config->ident == MAC_MODEL_IIFX) {
			iop_base[IOP_NUM_ISM] = (struct mac_iop *) ISM_IOP_BASE_IIFX;
		} else {
			iop_base[IOP_NUM_ISM] = (struct mac_iop *) ISM_IOP_BASE_QUADRA;
		}
		iop_base[IOP_NUM_SCC]->status_ctrl = 0;
		iop_ism_present = 1;
	} else {
		iop_base[IOP_NUM_ISM] = NULL;
		iop_ism_present = 0;
	}
}

/*
 * Initialize the IOPs, if present.
 */

void __init iop_init(void)
{
	int i;

	if (iop_scc_present) {
		printk("IOP: detected SCC IOP at %p\n", iop_base[IOP_NUM_SCC]);
	}
	if (iop_ism_present) {
		printk("IOP: detected ISM IOP at %p\n", iop_base[IOP_NUM_ISM]);
		iop_start(iop_base[IOP_NUM_ISM]);
		iop_alive(iop_base[IOP_NUM_ISM]); /* clears the alive flag */
	}

	/* Make the whole pool available and empty the queues */

	for (i = 0 ; i < NUM_IOP_MSGS ; i++) {
		iop_msg_pool[i].status = IOP_MSGSTATUS_UNUSED;
	}

	for (i = 0 ; i < NUM_IOP_CHAN ; i++) {
		iop_send_queue[IOP_NUM_SCC][i] = 0;
		iop_send_queue[IOP_NUM_ISM][i] = 0;
		iop_listeners[IOP_NUM_SCC][i].devname = NULL;
		iop_listeners[IOP_NUM_SCC][i].handler = NULL;
		iop_listeners[IOP_NUM_ISM][i].devname = NULL;
		iop_listeners[IOP_NUM_ISM][i].handler = NULL;
	}

#if 0	/* Crashing in 2.4 now, not yet sure why.   --jmt */
#ifdef CONFIG_PROC_FS
	create_proc_info_entry("mac_iop", 0, &proc_root, iop_get_proc_info);
#endif
#endif
}

/*
 * Register the interrupt handler for the IOPs.
 * TODO: might be wrong for non-OSS machines. Anyone?
 */

void __init iop_register_interrupts(void)
{
	if (iop_ism_present) {
		if (oss_present) {
			sys_request_irq(OSS_IRQLEV_IOPISM, iop_ism_irq,
					IRQ_FLG_LOCK, "ISM IOP",
					(void *) IOP_NUM_ISM);
			oss_irq_enable(IRQ_MAC_ADB);
		} else {
			request_irq(IRQ_VIA2_0, iop_ism_irq,
					IRQ_FLG_LOCK|IRQ_FLG_FAST, "ISM IOP",
					(void *) IOP_NUM_ISM);
		}
		if (!iop_alive(iop_base[IOP_NUM_ISM])) {
			printk("IOP: oh my god, they killed the ISM IOP!\n");
		} else {
			printk("IOP: the ISM IOP seems to be alive.\n");
		}
	}
}

/*
 * Register or unregister a listener for a specific IOP and channel
 *
 * If the handler pointer is NULL the current listener (if any) is
 * unregistered. Otherwise the new listener is registered provided
 * there is no existing listener registered.
 */

int iop_listen(uint iop_num, uint chan,
		void (*handler)(struct iop_msg *, struct pt_regs *),
		const char *devname)
{
	if ((iop_num >= NUM_IOPS) || !iop_base[iop_num]) return -EINVAL;
	if (chan >= NUM_IOP_CHAN) return -EINVAL;
	if (iop_listeners[iop_num][chan].handler && handler) return -EINVAL;
	iop_listeners[iop_num][chan].devname = devname;
	iop_listeners[iop_num][chan].handler = handler;
	return 0;
}

/*
 * Complete reception of a message, which just means copying the reply
 * into the buffer, setting the channel state to MSG_COMPLETE and
 * notifying the IOP.
 */

void iop_complete_message(struct iop_msg *msg)
{
	int iop_num = msg->iop_num;
	int chan = msg->channel;
	int i,offset;

#ifdef DEBUG_IOP
	printk("iop_complete(%p): iop %d chan %d\n", msg, msg->iop_num, msg->channel);
#endif

	offset = IOP_ADDR_RECV_MSG + (msg->channel * IOP_MSG_LEN);

	for (i = 0 ; i < IOP_MSG_LEN ; i++, offset++) {
		iop_writeb(iop_base[iop_num], offset, msg->reply[i]);
	}

	iop_writeb(iop_base[iop_num],
		   IOP_ADDR_RECV_STATE + chan, IOP_MSG_COMPLETE);
	iop_interrupt(iop_base[msg->iop_num]);

	iop_free_msg(msg);
}

/*
 * Actually put a message into a send channel buffer
 */

static void iop_do_send(struct iop_msg *msg)
{
	volatile struct mac_iop *iop = iop_base[msg->iop_num];
	int i,offset;

	offset = IOP_ADDR_SEND_MSG + (msg->channel * IOP_MSG_LEN);

	for (i = 0 ; i < IOP_MSG_LEN ; i++, offset++) {
		iop_writeb(iop, offset, msg->message[i]);
	}

	iop_writeb(iop, IOP_ADDR_SEND_STATE + msg->channel, IOP_MSG_NEW);

	iop_interrupt(iop);
}

/*
 * Handle sending a message on a channel that
 * has gone into the IOP_MSG_COMPLETE state.
 */

static void iop_handle_send(uint iop_num, uint chan, struct pt_regs *regs)
{
	volatile struct mac_iop *iop = iop_base[iop_num];
	struct iop_msg *msg,*msg2;
	int i,offset;

#ifdef DEBUG_IOP
	printk("iop_handle_send: iop %d channel %d\n", iop_num, chan);
#endif

	iop_writeb(iop, IOP_ADDR_SEND_STATE + chan, IOP_MSG_IDLE);

	if (!(msg = iop_send_queue[iop_num][chan])) return;

	msg->status = IOP_MSGSTATUS_COMPLETE;
	offset = IOP_ADDR_SEND_MSG + (chan * IOP_MSG_LEN);
	for (i = 0 ; i < IOP_MSG_LEN ; i++, offset++) {
		msg->reply[i] = iop_readb(iop, offset);
	}
	if (msg->handler) (*msg->handler)(msg, regs);
	msg2 = msg;
	msg = msg->next;
	iop_free_msg(msg2);

	iop_send_queue[iop_num][chan] = msg;
	if (msg) iop_do_send(msg);
}

/*
 * Handle reception of a message on a channel that has
 * gone into the IOP_MSG_NEW state.
 */

static void iop_handle_recv(uint iop_num, uint chan, struct pt_regs *regs)
{
	volatile struct mac_iop *iop = iop_base[iop_num];
	int i,offset;
	struct iop_msg *msg;

#ifdef DEBUG_IOP
	printk("iop_handle_recv: iop %d channel %d\n", iop_num, chan);
#endif

	msg = iop_alloc_msg();
	msg->iop_num = iop_num;
	msg->channel = chan;
	msg->status = IOP_MSGSTATUS_UNSOL;
	msg->handler = iop_listeners[iop_num][chan].handler;

	offset = IOP_ADDR_RECV_MSG + (chan * IOP_MSG_LEN);

	for (i = 0 ; i < IOP_MSG_LEN ; i++, offset++) {
		msg->message[i] = iop_readb(iop, offset);
	}

	iop_writeb(iop, IOP_ADDR_RECV_STATE + chan, IOP_MSG_RCVD);

	/* If there is a listener, call it now. Otherwise complete */
	/* the message ourselves to avoid possible stalls.         */

	if (msg->handler) {
		(*msg->handler)(msg, regs);
	} else {
#ifdef DEBUG_IOP
		printk("iop_handle_recv: unclaimed message on iop %d channel %d\n", iop_num, chan);
		printk("iop_handle_recv:");
		for (i = 0 ; i < IOP_MSG_LEN ; i++) {
			printk(" %02X", (uint) msg->message[i]);
		}
		printk("\n");
#endif
		iop_complete_message(msg);
	}
}

/*
 * Send a message
 * 
 * The message is placed at the end of the send queue. Afterwards if the
 * channel is idle we force an immediate send of the next message in the
 * queue.
 */

int iop_send_message(uint iop_num, uint chan, void *privdata,
		      uint msg_len, __u8 *msg_data,
		      void (*handler)(struct iop_msg *, struct pt_regs *))
{
	struct iop_msg *msg, *q;

	if ((iop_num >= NUM_IOPS) || !iop_base[iop_num]) return -EINVAL;
	if (chan >= NUM_IOP_CHAN) return -EINVAL;
	if (msg_len > IOP_MSG_LEN) return -EINVAL;

	msg = iop_alloc_msg();
	if (!msg) return -ENOMEM;

	msg->next = NULL;
	msg->status = IOP_MSGSTATUS_WAITING;
	msg->iop_num = iop_num;
	msg->channel = chan;
	msg->caller_priv = privdata;
	memcpy(msg->message, msg_data, msg_len);
	msg->handler = handler;

	if (!(q = iop_send_queue[iop_num][chan])) {
		iop_send_queue[iop_num][chan] = msg;
	} else {
		while (q->next) q = q->next;
		q->next = msg;
	}

	if (iop_readb(iop_base[iop_num],
	    IOP_ADDR_SEND_STATE + chan) == IOP_MSG_IDLE) {
		iop_do_send(msg);
	}

	return 0;
}

/*
 * Upload code to the shared RAM of an IOP.
 */

void iop_upload_code(uint iop_num, __u8 *code_start,
		     uint code_len, __u16 shared_ram_start)
{
	if ((iop_num >= NUM_IOPS) || !iop_base[iop_num]) return;

	iop_loadaddr(iop_base[iop_num], shared_ram_start);
	
	while (code_len--) {
		iop_base[iop_num]->ram_data = *code_start++;
	}
}

/*
 * Download code from the shared RAM of an IOP.
 */

void iop_download_code(uint iop_num, __u8 *code_start,
		       uint code_len, __u16 shared_ram_start)
{
	if ((iop_num >= NUM_IOPS) || !iop_base[iop_num]) return;

	iop_loadaddr(iop_base[iop_num], shared_ram_start);
	
	while (code_len--) {
		*code_start++ = iop_base[iop_num]->ram_data;
	}
}

/*
 * Compare the code in the shared RAM of an IOP with a copy in system memory
 * and return 0 on match or the first nonmatching system memory address on
 * failure.
 */

__u8 *iop_compare_code(uint iop_num, __u8 *code_start,
		       uint code_len, __u16 shared_ram_start)
{
	if ((iop_num >= NUM_IOPS) || !iop_base[iop_num]) return code_start;

	iop_loadaddr(iop_base[iop_num], shared_ram_start);
	
	while (code_len--) {
		if (*code_start != iop_base[iop_num]->ram_data) {
			return code_start;
		}
		code_start++;
	}
	return (__u8 *) 0;
}

/*
 * Handle an ISM IOP interrupt
 */

void iop_ism_irq(int irq, void *dev_id, struct pt_regs *regs)
{
	uint iop_num = (uint) dev_id;
	volatile struct mac_iop *iop = iop_base[iop_num];
	int i,state;

#ifdef DEBUG_IOP
	printk("iop_ism_irq: status = %02X\n", (uint) iop->status_ctrl);
#endif

	/* INT0 indicates a state change on an outgoing message channel */

	if (iop->status_ctrl & IOP_INT0) {
		iop->status_ctrl = IOP_INT0 | IOP_RUN | IOP_AUTOINC;
#ifdef DEBUG_IOP
		printk("iop_ism_irq: new status = %02X, send states",
			(uint) iop->status_ctrl);
#endif
		for (i = 0 ; i < NUM_IOP_CHAN  ; i++) {
			state = iop_readb(iop, IOP_ADDR_SEND_STATE + i);
#ifdef DEBUG_IOP
			printk(" %02X", state);
#endif
			if (state == IOP_MSG_COMPLETE) {
				iop_handle_send(iop_num, i, regs);
			}
		}
#ifdef DEBUG_IOP
		printk("\n");
#endif
	}

	if (iop->status_ctrl & IOP_INT1) {	/* INT1 for incoming msgs */
		iop->status_ctrl = IOP_INT1 | IOP_RUN | IOP_AUTOINC;
#ifdef DEBUG_IOP
		printk("iop_ism_irq: new status = %02X, recv states",
			(uint) iop->status_ctrl);
#endif
		for (i = 0 ; i < NUM_IOP_CHAN ; i++) {
			state = iop_readb(iop, IOP_ADDR_RECV_STATE + i);
#ifdef DEBUG_IOP
			printk(" %02X", state);
#endif
			if (state == IOP_MSG_NEW) {
				iop_handle_recv(iop_num, i, regs);
			}
		}
#ifdef DEBUG_IOP
		printk("\n");
#endif
	}

}

#ifdef CONFIG_PROC_FS

char *iop_chan_state(int state)
{
	switch(state) {
		case IOP_MSG_IDLE	: return "idle      ";
		case IOP_MSG_NEW	: return "new       ";
		case IOP_MSG_RCVD	: return "received  ";
		case IOP_MSG_COMPLETE	: return "completed ";
		default			: return "unknown   ";
	}
}

int iop_dump_one_iop(char *buf, int iop_num, char *iop_name)
{
	int i,len = 0;
	volatile struct mac_iop *iop = iop_base[iop_num];

	len += sprintf(buf+len, "%s IOP channel states:\n\n", iop_name);
	len += sprintf(buf+len, "##  send_state  recv_state  device\n");
	len += sprintf(buf+len, "------------------------------------------------\n");
	for (i = 0 ; i < NUM_IOP_CHAN ; i++) {
		len += sprintf(buf+len, "%2d  %10s  %10s  %s\n", i,
			iop_chan_state(iop_readb(iop, IOP_ADDR_SEND_STATE+i)),
			iop_chan_state(iop_readb(iop, IOP_ADDR_RECV_STATE+i)),
			iop_listeners[iop_num][i].handler?
				      iop_listeners[iop_num][i].devname : "");
			
	}
	len += sprintf(buf+len, "\n");
	return len;
}
 
static int iop_get_proc_info(char *buf, char **start, off_t pos, int count)
{
	int len, cnt;

	cnt = 0;
	len =  sprintf(buf, "IOPs detected:\n\n");

	if (iop_scc_present) {
		len += sprintf(buf+len, "SCC IOP (%p): status %02X\n",
				iop_base[IOP_NUM_SCC],
				(uint) iop_base[IOP_NUM_SCC]->status_ctrl);
	}
	if (iop_ism_present) {
		len += sprintf(buf+len, "ISM IOP (%p): status %02X\n\n",
				iop_base[IOP_NUM_ISM],
				(uint) iop_base[IOP_NUM_ISM]->status_ctrl);
	}

	if (iop_scc_present) {
		len += iop_dump_one_iop(buf+len, IOP_NUM_SCC, "SCC");

	}

	if (iop_ism_present) {
		len += iop_dump_one_iop(buf+len, IOP_NUM_ISM, "ISM");

	}

	if (len >= pos) {
		if (!*start) {
			*start = buf + pos;
			cnt = len - pos;
		} else {
			cnt += len;
		}
	}
	return (count > cnt) ? cnt : count;
}

#endif /* CONFIG_PROC_FS */
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0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0xF0,0xFF,0x00,0xFF,0xFF,0x0F,0xFF,0x00,0x0F,0xFF,0xFF,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,\
0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0xF0,0xFF,0xF0,0x0F,0xFF,0x0F,0xFF,0xF0,0x0F,0xFF,0xFF,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,\
0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0xFF,0x0F,0xFF,0x00,0x0F,0x0F,0xFF,0xF0,0x0F,0xFF,0xFF,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,\
0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0xFF,0x0F,0x00,0x00,0x00,0x00,0x0F,0xFF,0xFF,0xFF,0xFF,0xF0,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,\
0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0xFF,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0xFF,0xFF,0xFF,0xF0,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,\
0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0xF0,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x0F,0xFF,0xFF,0xF0,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,\
0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0xF0,0x00,0x00,0x00,0x00,0x00,0x00,0xF0,0x0F,0xFF,0xFF,0xF0,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,\
0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0xFF,0xF0,0x00,0x00,0x00,0x00,0xFF,0x00,0xFF,0xF0,0xFF,0xF0,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,\
0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0xFF,0xFF,0x00,0x00,0x0F,0xF0,0x00,0x00,0xFF,0xF0,0x0F,0xFF,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,\
0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0xFF,0xFF,0xFF,0xFF,0xF0,0x00,0x0F,0xF0,0xFF,0xFF,0x00,0xFF,0xF0,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,\
0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0xFF,0xFF,0x00,0x00,0x00,0xFF,0xF0,0x00,0x0F,0xFF,0xF0,0xFF,0xF0,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,\
0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x0F,0xFF,0x0F,0xFF,0x00,0xFF,0xF0,0x00,0x00,0x0F,0xFF,0xFF,0xFF,0xFF,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,\
0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x0F,0xF0,0x00,0xFF,0xFF,0xFF,0x00,0x00,0x00,0x00,0xFF,0xFF,0xFF,0xFF,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,\
0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0xFF,0xF0,0x00,0x0F,0xFF,0xF0,0x00,0x00,0x00,0x00,0x0F,0xFF,0xFF,0xFF,0xF0,0x00,0x00,0x00,0x00,0x00,0x00,0x00,\
0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x0F,0xFF,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x0F,0xFF,0xFF,0xFF,0xF0,0x00,0x00,0x00,0x00,0x00,0x00,0x00,\
0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x0F,0xFF,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x0F,0xFF,0xFF,0xFF,0xFF,0x00,0x00,0x00,0x00,0x00,0x00,0x00,\
0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0xFF,0xF0,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0xFF,0xFF,0xFF,0xFF,0xF0,0x00,0x00,0x00,0x00,0x00,0x00,\
0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x0F,0xFF,0xF0,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0xFF,0xF0,0xFF,0xFF,0xFF,0x00,0x00,0x00,0x00,0x00,0x00,\
0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0xFF,0xFF,0xF0,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0xFF,0xFF,0x0F,0xFF,0xFF,0xF0,0x00,0x00,0x00,0x00,0x00,\
0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x0F,0xFF,0xFF,0xF0,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x0F,0xFF,0xF0,0xFF,0xFF,0xF0,0x00,0x00,0x00,0x00,0x00,\
0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x0F,0xFF,0xFF,0xF0,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0xFF,0xFF,0xFF,0xFF,0xFF,0x00,0x00,0x00,0x00,0x00,\
0x00,0x00,0x00,0x00,0x00,0x00,0x00,0xFF,0x0F,0xFF,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0xFF,0xFF,0x0F,0xFF,0xFF,0xF0,0x00,0x00,0x00,0x00,\
0x00,0x00,0x00,0x00,0x00,0x00,0x00,0xFF,0xFF,0xFF,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x0F,0xFF,0xFF,0xFF,0xFF,0xF0,0x00,0x00,0x00,0x00,\
0x00,0x00,0x00,0x00,0x00,0x00,0x00,0xFF,0xFF,0xF0,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x0F,0xFF,0xF0,0xFF,0xFF,0xFF,0x00,0x00,0x00,0x00,\
0x00,0x00,0x00,0x00,0x00,0x00,0x0F,0xFF,0xFF,0xF0,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x0F,0xFF,0xF0,0xFF,0xFF,0xFF,0x00,0x00,0x00,0x00,\
0x00,0x00,0x00,0x00,0x00,0x00,0x0F,0xFF,0xFF,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0xFF,0xFF,0x0F,0xFF,0xFF,0x00,0x00,0x00,0x00,\
0x00,0x00,0x00,0x00,0x00,0x00,0xFF,0xFF,0xFF,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0xFF,0xFF,0x0F,0xFF,0xFF,0xF0,0x00,0x00,0x00,\
0x00,0x00,0x00,0x00,0x00,0x00,0xFF,0xFF,0xF0,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0xFF,0xFF,0x0F,0xFF,0xFF,0xF0,0x00,0x00,0x00,\
0x00,0x00,0x00,0x00,0x00,0x00,0xFF,0xFF,0xF0,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0xFF,0xFF,0x0F,0xFF,0xFF,0xF0,0x00,0x00,0x00,\
0x00,0x00,0x00,0x00,0x00,0x0F,0xF0,0xFF,0xF0,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0xFF,0xFF,0xFF,0xFF,0xFF,0xFF,0x00,0x00,0x00,\
0x00,0x00,0x00,0x00,0x00,0x0F,0xF0,0xFF,0xF0,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0xFF,0xFF,0xFF,0xFF,0xFF,0xFF,0x00,0x00,0x00,\
0x00,0x00,0x00,0x00,0x00,0xFF,0xF0,0xFF,0xF0,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0xFF,0xFF,0x0F,0xFF,0xFF,0xFF,0x00,0x00,0x00,\
0x00,0x00,0x00,0x00,0x0F,0xFF,0xF0,0xFF,0xF0,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0xFF,0xFF,0x0F,0xFF,0xFF,0xFF,0x00,0x00,0x00,\
0x00,0x00,0x00,0x00,0x0F,0xFF,0xF0,0xFF,0xF0,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0xFF,0xFF,0x0F,0xFF,0xFF,0xFF,0x00,0x00,0x00,\
0x00,0x00,0x00,0x00,0x0F,0xFF,0xFF,0x0F,0xF0,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0xFF,0xFF,0xFF,0x00,0x00,0x00,\
0x00,0x00,0x00,0x00,0x0F,0xFF,0xFF,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x0F,0xFF,0xFF,0xFF,0xFF,0xFF,0x00,0x00,0x00,\
0x00,0x00,0x00,0x00,0x0F,0xF0,0xFF,0xF0,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0xFF,0xFF,0xFF,0xFF,0xFF,0xFF,0x00,0x00,0x00,\
0x00,0x00,0x00,0x00,0x00,0x00,0x00,0xFF,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0xFF,0xFF,0xFF,0xFF,0xFF,0xFF,0xFF,0x00,0x00,0x00,\
0x00,0x00,0x00,0x00,0xF0,0x00,0x00,0x0F,0xFF,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x0F,0xF0,0xFF,0xFF,0xFF,0xFF,0xFF,0x00,0x00,0x00,0x00,\
0x00,0x00,0x00,0x00,0xF0,0x00,0x00,0x00,0xFF,0xF0,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x0F,0x00,0x0F,0xFF,0xFF,0xFF,0xF0,0x00,0x00,0x00,0x00,\
0x00,0x00,0x00,0x00,0xF0,0x00,0x00,0x00,0xFF,0xFF,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x0F,0x00,0x0F,0xFF,0xFF,0xFF,0x00,0x00,0xF0,0x00,0x00,\
0x00,0x00,0x00,0xFF,0x00,0x00,0x00,0x00,0x0F,0xFF,0xF0,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x0F,0x00,0x00,0xFF,0xFF,0xF0,0x00,0x00,0xF0,0x00,0x00,\
0x00,0xFF,0xFF,0xFF,0x00,0x00,0x00,0x00,0x00,0xFF,0xFF,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x0F,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0xF0,0x00,0x00,\
0x0F,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0xFF,0xFF,0xFF,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x0F,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0xFF,0x00,0x00,\
0x0F,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x0F,0xFF,0xFF,0xF0,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x0F,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0xFF,0x00,0x00,\
0x0F,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0xFF,0xFF,0xF0,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x0F,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x0F,0xF0,0x00,\
0x0F,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0xFF,0xFF,0xF0,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x0F,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0xFF,0xF0,\
0x0F,0xF0,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x0F,0xFF,0xF0,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x0F,0x0F,0xF0,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x0F,\
0x0F,0xF0,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0xFF,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0xFF,0x0F,0xF0,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,\
0x0F,0xF0,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0xF0,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x0F,0xFF,0x0F,0xF0,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,\
0x0F,0xF0,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x0F,0x0F,0xF0,0x00,0x00,0x00,0x00,0x0F,0xFF,0xFF,0x0F,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0xFF,\
0x0F,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x0F,0xF0,0xFF,0xF0,0x00,0xFF,0xFF,0xFF,0xFF,0xFF,0x0F,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0xFF,0x00,\
0xFF,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0xF0,0xFF,0xFF,0xFF,0xFF,0xFF,0xFF,0xFF,0xFF,0xFF,0x00,0x00,0x00,0x00,0x00,0x00,0x0F,0xFF,0x00,0x00,\
0x0F,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0xFF,0xFF,0xFF,0xFF,0xFF,0xFF,0xFF,0xFF,0xF0,0xFF,0x00,0x00,0x00,0x00,0x00,0x0F,0xFF,0x00,0x00,0x00,\
0x0F,0xFF,0xF0,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x0F,0xFF,0xFF,0xFF,0xFF,0xFF,0xFF,0xFF,0xFF,0xF0,0xFF,0x00,0x00,0x00,0x00,0x00,0xFF,0x00,0x00,0x00,0x00,\
0x00,0x00,0x0F,0xFF,0xFF,0x00,0x00,0x00,0x00,0x00,0x00,0x0F,0xF0,0xFF,0xFF,0xFF,0xFF,0xFF,0xFF,0xFF,0xFF,0xFF,0xF0,0x00,0x00,0x00,0xFF,0xF0,0x00,0x00,0x00,0x00,\
0x00,0x00,0x00,0x00,0x0F,0xFF,0xFF,0x00,0x00,0x00,0x00,0xFF,0xFF,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0xFF,0xF0,0x00,0x00,0x0F,0xFF,0x00,0x00,0x00,0x00,0x00,\
0x00,0x00,0x00,0x00,0x00,0x00,0x0F,0xFF,0xFF,0x00,0x0F,0xFF,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0xFF,0xFF,0xFF,0xFF,0xFF,0xF0,0x00,0x00,0x00,0x00,0x00,\
0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x0F,0xFF,0xFF,0xFF,0xF0,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x0F,0xFF,0xFF,0xFF,0xFF,0x00,0x00,0x00,0x00,0x00,0x00
/*
 *	OSS handling
 *	Written by Joshua M. Thompson (funaho@jurai.org)
 *
 *
 *	This chip is used in the IIfx in place of VIA #2. It acts like a fancy
 *	VIA chip with prorammable interrupt levels.
 *
 * 990502 (jmt) - Major rewrite for new interrupt architecture as well as some
 *		  recent insights into OSS operational details.
 * 990610 (jmt) - Now taking fulll advantage of the OSS. Interrupts are mapped
 *		  to mostly match the A/UX interrupt scheme supported on the
 *		  VIA side. Also added support for enabling the ISM irq again
 *		  since we now have a functional IOP manager.
 */

#include <linux/types.h>
#include <linux/kernel.h>
#include <linux/mm.h>
#include <linux/delay.h>
#include <linux/init.h>

#include <asm/bootinfo.h> 
#include <asm/machw.h> 
#include <asm/macintosh.h> 
#include <asm/macints.h>
#include <asm/mac_via.h>
#include <asm/mac_oss.h>

int oss_present;
volatile struct mac_oss *oss;

void oss_irq(int, void *, struct pt_regs *);
void oss_nubus_irq(int, void *, struct pt_regs *);

extern void via1_irq(int, void *, struct pt_regs *);
extern void mac_scc_dispatch(int, void *, struct pt_regs *);

/*
 * Initialize the OSS
 *
 * The OSS "detection" code is actually in via_init() which is always called
 * before us. Thus we can count on oss_present being valid on entry.
 */

void __init oss_init(void)
{
	int i;

	if (!oss_present) return;

	oss = (struct mac_oss *) OSS_BASE;

	/* Disable all interrupts. Unlike a VIA it looks like we    */
	/* do this by setting the source's interrupt level to zero. */

	for (i = 0; i <= OSS_NUM_SOURCES; i++) {
		oss->irq_level[i] = OSS_IRQLEV_DISABLED;
	}
	/* If we disable VIA1 here, we never really handle it... */
	oss->irq_level[OSS_VIA1] = OSS_IRQLEV_VIA1;
}

/*
 * Register the OSS and NuBus interrupt dispatchers.
 */

void __init oss_register_interrupts(void)
{
	sys_request_irq(OSS_IRQLEV_SCSI, oss_irq, IRQ_FLG_LOCK,
			"scsi", (void *) oss);
	sys_request_irq(OSS_IRQLEV_IOPSCC, mac_scc_dispatch, IRQ_FLG_LOCK,
			"scc", mac_scc_dispatch);
	sys_request_irq(OSS_IRQLEV_NUBUS, oss_nubus_irq, IRQ_FLG_LOCK,
			"nubus", (void *) oss);
	sys_request_irq(OSS_IRQLEV_SOUND, oss_irq, IRQ_FLG_LOCK,
			"sound", (void *) oss);
	sys_request_irq(OSS_IRQLEV_VIA1, via1_irq, IRQ_FLG_LOCK,
			"via1", (void *) via1);
}

/*
 * Initialize OSS for Nubus access
 */

void __init oss_nubus_init(void)
{
}

/*
 * Handle miscellaneous OSS interrupts. Right now that's just sound
 * and SCSI; everything else is routed to its own autovector IRQ.
 */
 
void oss_irq(int irq, void *dev_id, struct pt_regs *regs)
{
	int events;

	events = oss->irq_pending & (OSS_IP_SOUND|OSS_IP_SCSI);
	if (!events) return;

#ifdef DEBUG_IRQS	
	if ((console_loglevel == 10) && !(events & OSS_IP_SCSI)) {
		printk("oss_irq: irq %d events = 0x%04X\n", irq,
			(int) oss->irq_pending);
	}
#endif
	/* FIXME: how do you clear a pending IRQ?    */

	if (events & OSS_IP_SOUND) {
		/* FIXME: call sound handler */
		oss->irq_pending &= ~OSS_IP_SOUND;
	} else if (events & OSS_IP_SCSI) {
		oss->irq_level[OSS_SCSI] = OSS_IRQLEV_DISABLED;
		mac_do_irq_list(IRQ_MAC_SCSI, regs);
		oss->irq_pending &= ~OSS_IP_SCSI;
		oss->irq_level[OSS_SCSI] = OSS_IRQLEV_SCSI;
	} else {
		/* FIXME: error check here? */
	}
}

/*
 * Nubus IRQ handler, OSS style
 *
 * Unlike the VIA/RBV this is on its own autovector interrupt level.
 */

void oss_nubus_irq(int irq, void *dev_id, struct pt_regs *regs)
{
	int events, irq_bit, i;

	events = oss->irq_pending & OSS_IP_NUBUS;
	if (!events) return;

#ifdef DEBUG_NUBUS_INT
	if (console_loglevel > 7) {
		printk("oss_nubus_irq: events = 0x%04X\n", events);
	}
#endif
	/* There are only six slots on the OSS, not seven */

	for (i = 0, irq_bit = 1 ; i < 6 ; i++, irq_bit <<= 1) {
		if (events & irq_bit) {
			oss->irq_level[i] = OSS_IRQLEV_DISABLED;
			mac_do_irq_list(NUBUS_SOURCE_BASE + i, regs);
			oss->irq_pending &= ~irq_bit;
			oss->irq_level[i] = OSS_IRQLEV_NUBUS;
		}
	}
}

/*
 * Enable an OSS interrupt
 *
 * It looks messy but it's rather straightforward. The switch() statement
 * just maps the machspec interrupt numbers to the right OSS interrupt
 * source (if the OSS handles that interrupt) and then sets the interrupt
 * level for that source to nonzero, thus enabling the interrupt.
 */

void oss_irq_enable(int irq) {
#ifdef DEBUG_IRQUSE
	printk("oss_irq_enable(%d)\n", irq);
#endif
	switch(irq) {
		case IRQ_SCC:
		case IRQ_SCCA:
		case IRQ_SCCB:
			oss->irq_level[OSS_IOPSCC] = OSS_IRQLEV_IOPSCC;
			break;
		case IRQ_MAC_ADB:
			oss->irq_level[OSS_IOPISM] = OSS_IRQLEV_IOPISM;
			break;
		case IRQ_MAC_SCSI:
			oss->irq_level[OSS_SCSI] = OSS_IRQLEV_SCSI;
			break;
		case IRQ_NUBUS_9:
		case IRQ_NUBUS_A:
		case IRQ_NUBUS_B:
		case IRQ_NUBUS_C:
		case IRQ_NUBUS_D:
		case IRQ_NUBUS_E:
			irq -= NUBUS_SOURCE_BASE;
			oss->irq_level[irq] = OSS_IRQLEV_NUBUS;
			break;
#ifdef DEBUG_IRQUSE
		default:
			printk("%s unknown irq %d\n",__FUNCTION__, irq);
			break;
#endif
	}
}

/*
 * Disable an OSS interrupt
 *
 * Same as above except we set the source's interrupt level to zero,
 * to disable the interrupt.
 */

void oss_irq_disable(int irq) {
#ifdef DEBUG_IRQUSE
	printk("oss_irq_disable(%d)\n", irq);
#endif
	switch(irq) {
		case IRQ_SCC:
		case IRQ_SCCA:
		case IRQ_SCCB:
			oss->irq_level[OSS_IOPSCC] = OSS_IRQLEV_DISABLED;
			break;
		case IRQ_MAC_ADB:
			oss->irq_level[OSS_IOPISM] = OSS_IRQLEV_DISABLED;
			break;
		case IRQ_MAC_SCSI:
			oss->irq_level[OSS_SCSI] = OSS_IRQLEV_DISABLED;
			break;
		case IRQ_NUBUS_9:
		case IRQ_NUBUS_A:
		case IRQ_NUBUS_B:
		case IRQ_NUBUS_C:
		case IRQ_NUBUS_D:
		case IRQ_NUBUS_E:
			irq -= NUBUS_SOURCE_BASE;
			oss->irq_level[irq] = OSS_IRQLEV_DISABLED;
			break;
#ifdef DEBUG_IRQUSE
		default:
			printk("%s unknown irq %d\n", __FUNCTION__, irq);
			break;
#endif
	}
}

/*
 * Clear an OSS interrupt
 *
 * Not sure if this works or not but it's the only method I could
 * think of based on the contents of the mac_oss structure.
 */

void oss_irq_clear(int irq) {
	/* FIXME: how to do this on OSS? */
	switch(irq) {
		case IRQ_SCC:
		case IRQ_SCCA:
		case IRQ_SCCB:
			oss->irq_pending &= ~OSS_IP_IOPSCC;
			break;
		case IRQ_MAC_ADB:
			oss->irq_pending &= ~OSS_IP_IOPISM;
			break;
		case IRQ_MAC_SCSI:
			oss->irq_pending &= ~OSS_IP_SCSI;
			break;
		case IRQ_NUBUS_9:
		case IRQ_NUBUS_A:
		case IRQ_NUBUS_B:
		case IRQ_NUBUS_C:
		case IRQ_NUBUS_D:
		case IRQ_NUBUS_E:
			irq -= NUBUS_SOURCE_BASE;
			oss->irq_pending &= ~(1 << irq);
			break;
	}
}

/*
 * Check to see if a specific OSS interrupt is pending
 */

int oss_irq_pending(int irq)
{
	switch(irq) {
		case IRQ_SCC:
		case IRQ_SCCA:
		case IRQ_SCCB:
			return oss->irq_pending & OSS_IP_IOPSCC;
			break;
		case IRQ_MAC_ADB:
			return oss->irq_pending & OSS_IP_IOPISM;
			break;
		case IRQ_MAC_SCSI:
			return oss->irq_pending & OSS_IP_SCSI;
			break;
		case IRQ_NUBUS_9:
		case IRQ_NUBUS_A:
		case IRQ_NUBUS_B:
		case IRQ_NUBUS_C:
		case IRQ_NUBUS_D:
		case IRQ_NUBUS_E:
			irq -= NUBUS_SOURCE_BASE;
			return oss->irq_pending & (1 << irq);
			break;
	}
	return 0;
}
/*
 *	Apple Peripheral System Controller (PSC)
 *
 *	The PSC is used on the AV Macs to control IO functions not handled
 *	by the VIAs (Ethernet, DSP, SCC).
 *
 * TO DO:
 *
 * Try to figure out what's going on in pIFR5 and pIFR6. There seem to be
 * persisant interrupt conditions in those registers and I have no idea what
 * they are. Granted it doesn't affect since we're not enabling any interrupts
 * on those levels at the moment, but it would be nice to know. I have a feeling
 * they aren't actually interrupt lines but data lines (to the DSP?)
 */

#include <linux/types.h>
#include <linux/kernel.h>
#include <linux/mm.h>
#include <linux/delay.h>
#include <linux/init.h>

#include <asm/traps.h>
#include <asm/bootinfo.h> 
#include <asm/macintosh.h> 
#include <asm/macints.h> 
#include <asm/mac_psc.h>

#define DEBUG_PSC

int psc_present;
volatile __u8 *psc;

void psc_irq(int, void *, struct pt_regs *);

/*
 * Debugging dump, used in various places to see what's going on.
 */

void psc_debug_dump(void)
{
	int	i;

	if (!psc_present) return;
	for (i = 0x30 ; i < 0x70 ; i += 0x10) {
		printk("PSC #%d:  IFR = 0x%02X IER = 0x%02X\n",
			i >> 4,
			(int) psc_read_byte(pIFRbase + i),
			(int) psc_read_byte(pIERbase + i));
	}
}

/*
 * Try to kill all DMA channels on the PSC. Not sure how this his
 * supposed to work; this is code lifted from macmace.c and then
 * expanded to cover what I think are the other 7 channels.
 */

void psc_dma_die_die_die(void)
{
	int i;

	printk("Killing all PSC DMA channels...");
	for (i = 0 ; i < 9 ; i++) {
		psc_write_word(PSC_CTL_BASE + (i << 4), 0x8800);
		psc_write_word(PSC_CTL_BASE + (i << 4), 0x1000);
		psc_write_word(PSC_CMD_BASE + (i << 5), 0x1100);
		psc_write_word(PSC_CMD_BASE + (i << 5) + 0x10, 0x1100);
	}
	printk("done!\n");
}

/*
 * Initialize the PSC. For now this just involves shutting down all
 * interrupt sources using the IERs.
 */

void __init psc_init(void)
{
	int i;

	if (macintosh_config->ident != MAC_MODEL_C660
	 && macintosh_config->ident != MAC_MODEL_Q840)
	{
		psc = NULL;
		psc_present = 0;
		return;
	}

	/*
	 * The PSC is always at the same spot, but using psc
	 * keeps things consisant with the psc_xxxx functions.
	 */

	psc = (void *) PSC_BASE;
	psc_present = 1;

	printk("PSC detected at %p\n", psc);

	psc_dma_die_die_die();

#ifdef DEBUG_PSC
	psc_debug_dump();
#endif
	/*
	 * Mask and clear all possible interrupts
	 */

	for (i = 0x30 ; i < 0x70 ; i += 0x10) {
		psc_write_byte(pIERbase + i, 0x0F);
		psc_write_byte(pIFRbase + i, 0x0F);
	}
}

/*
 * Register the PSC interrupt dispatchers for autovector interrupts 3-6.
 */

void __init psc_register_interrupts(void)
{
	sys_request_irq(3, psc_irq, IRQ_FLG_LOCK, "psc3",
			(void *) 0x30);
	sys_request_irq(4, psc_irq, IRQ_FLG_LOCK, "psc4",
			(void *) 0x40);
	sys_request_irq(5, psc_irq, IRQ_FLG_LOCK, "psc5",
			(void *) 0x50);
	sys_request_irq(6, psc_irq, IRQ_FLG_LOCK, "psc6",
			(void *) 0x60);
}

/*
 * PSC interrupt handler. It's a lot like the VIA interrupt handler.
 */

void psc_irq(int irq, void *dev_id, struct pt_regs *regs)
{
	int pIFR	= pIFRbase + ((int) dev_id);
	int pIER	= pIERbase + ((int) dev_id);
	int base_irq;
	int irq_bit,i;
	unsigned char events;

	base_irq = irq << 3;

#ifdef DEBUG_IRQS
	printk("psc_irq: irq %d pIFR = 0x%02X pIER = 0x%02X\n",
		irq, (int) psc_read_byte(pIFR), (int) psc_read_byte(pIER));
#endif

	events = psc_read_byte(pIFR) & psc_read_byte(pIER) & 0xF;
	if (!events) return;

	for (i = 0, irq_bit = 1 ; i < 4 ; i++, irq_bit <<= 1) {
	        if (events & irq_bit) {
			psc_write_byte(pIER, irq_bit);
			mac_do_irq_list(base_irq + i, regs);
			psc_write_byte(pIFR, irq_bit);
			psc_write_byte(pIER, irq_bit | 0x80);
		}
	}
}

void psc_irq_enable(int irq) {
	int irq_src	= IRQ_SRC(irq);
	int irq_idx	= IRQ_IDX(irq);
	int pIER	= pIERbase + (irq_src << 4);

#ifdef DEBUG_IRQUSE
	printk("psc_irq_enable(%d)\n", irq);
#endif
	psc_write_byte(pIER, (1 << irq_idx) | 0x80);
}

void psc_irq_disable(int irq) {
	int irq_src	= IRQ_SRC(irq);
	int irq_idx	= IRQ_IDX(irq);
	int pIER	= pIERbase + (irq_src << 4);

#ifdef DEBUG_IRQUSE
	printk("psc_irq_disable(%d)\n", irq);
#endif
	psc_write_byte(pIER, 1 << irq_idx);
}

void psc_irq_clear(int irq) {
	int irq_src	= IRQ_SRC(irq);
	int irq_idx	= IRQ_IDX(irq);
	int pIFR	= pIERbase + (irq_src << 4);

	psc_write_byte(pIFR, 1 << irq_idx);
}

int psc_irq_pending(int irq)
{
	int irq_src	= IRQ_SRC(irq);
	int irq_idx	= IRQ_IDX(irq);
	int pIFR	= pIERbase + (irq_src << 4);

	return psc_read_byte(pIFR) & (1 << irq_idx);
}
/*
 *	6522 Versatile Interface Adapter (VIA)
 *
 *	There are two of these on the Mac II. Some IRQ's are vectored
 *	via them as are assorted bits and bobs - eg RTC, ADB.
 *
 * CSA: Motorola seems to have removed documentation on the 6522 from
 * their web site; try
 *     http://nerini.drf.com/vectrex/other/text/chips/6522/
 *     http://www.zymurgy.net/classic/vic20/vicdet1.htm
 * and
 *     http://193.23.168.87/mikro_laborversuche/via_iobaustein/via6522_1.html
 * for info.  A full-text web search on 6522 AND VIA will probably also
 * net some usefulness. <cananian@alumni.princeton.edu> 20apr1999
 *
 * PRAM/RTC access algorithms are from the NetBSD RTC toolkit version 1.08b
 * by Erik Vogan and adapted to Linux by Joshua M. Thompson (funaho@jurai.org)
 *
 */

#include <linux/types.h>
#include <linux/kernel.h>
#include <linux/mm.h>
#include <linux/delay.h>
#include <linux/init.h>

#include <linux/ide.h>

#include <asm/traps.h>
#include <asm/bootinfo.h> 
#include <asm/macintosh.h> 
#include <asm/macints.h>
#include <asm/machw.h> 
#include <asm/mac_via.h>
#include <asm/mac_psc.h>

volatile __u8 *via1, *via2;
#if 0
/* See note in mac_via.h about how this is possibly not useful */
volatile long *via_memory_bogon=(long *)&via_memory_bogon;
#endif
int  rbv_present,via_alt_mapping;
__u8 rbv_clear;

/*
 * Globals for accessing the VIA chip registers without having to
 * check if we're hitting a real VIA or an RBV. Normally you could
 * just hit the combined register (ie, vIER|rIER) but that seems to
 * break on AV Macs...probably because they actually decode more than
 * eight address bits. Why can't Apple engineers at least be
 * _consistantly_ lazy?                          - 1999-05-21 (jmt)
 */

static int gIER,gIFR,gBufA,gBufB;

/*
 * Timer defs.
 */

#define TICK_SIZE		10000
#define MAC_CLOCK_TICK		(783300/HZ)		/* ticks per HZ */
#define MAC_CLOCK_LOW		(MAC_CLOCK_TICK&0xFF)
#define MAC_CLOCK_HIGH		(MAC_CLOCK_TICK>>8)

static int  nubus_active = 0;

void via_debug_dump(void);
void via1_irq(int, void *, struct pt_regs *);
void via2_irq(int, void *, struct pt_regs *);
void via_nubus_irq(int, void *, struct pt_regs *);
void via_irq_enable(int irq);
void via_irq_disable(int irq);
void via_irq_clear(int irq);

extern void mac_bang(int, void *, struct pt_regs *);
extern void mac_scc_dispatch(int, void *, struct pt_regs *);
extern int oss_present;

/*
 * Initialize the VIAs
 *
 * First we figure out where they actually _are_ as well as what type of
 * VIA we have for VIA2 (it could be a real VIA or an RBV or even an OSS.)
 * Then we pretty much clear them out and disable all IRQ sources.
 *
 * Note: the OSS is actually "detected" here and not in oss_init(). It just
 *	 seems more logical to do it here since via_init() needs to know
 *	 these things anyways.
 */

void __init via_init(void)
{
	switch(macintosh_config->via_type) {

		/* IIci, IIsi, IIvx, IIvi (P6xx), LC series */

		case MAC_VIA_IIci:	
			via1 = (void *) VIA1_BASE;
			if (macintosh_config->ident == MAC_MODEL_IIFX) {
				via2 = NULL;
				rbv_present = 0;
				oss_present = 1;
			} else {
				via2 = (void *) RBV_BASE;
				rbv_present = 1;
				oss_present = 0;
			}
			if (macintosh_config->ident == MAC_MODEL_LCIII) {
				rbv_clear = 0x00;
			} else {
				/* on most RBVs (& unlike the VIAs), you   */
				/* need to set bit 7 when you write to IFR */
				/* in order for your clear to occur.       */
				rbv_clear = 0x80;
			}
			gIER = rIER;
			gIFR = rIFR;
			gBufA = rSIFR;
			gBufB = rBufB;
			break;

		/* Quadra and early MacIIs agree on the VIA locations */

		case MAC_VIA_QUADRA:
		case MAC_VIA_II:
			via1 = (void *) VIA1_BASE;
			via2 = (void *) VIA2_BASE;
			rbv_present = 0;
			oss_present = 0;
			rbv_clear = 0x00;
			gIER = vIER;
			gIFR = vIFR;
			gBufA = vBufA;
			gBufB = vBufB;
			break;
		default:
			panic("UNKNOWN VIA TYPE");
	}

	printk("VIA1 at %p is a 6522 or clone\n", via1);

	printk("VIA2 at %p is ", via2);
	if (rbv_present) {
		printk("an RBV\n");
	} else if (oss_present) {
		printk("an OSS\n");
	} else {
		printk("a 6522 or clone\n");
	}

#ifdef DEBUG_VIA
	via_debug_dump();
#endif

	/*
	 * Shut down all IRQ sources, reset the timers, and
	 * kill the timer latch on VIA1.
	 */

	via1[vIER] = 0x7F;
	via1[vIFR] = 0x7F;
	via1[vT1LL] = 0;
	via1[vT1LH] = 0;
	via1[vT1CL] = 0;
	via1[vT1CH] = 0;
	via1[vT2CL] = 0;
	via1[vT2CH] = 0;
	via1[vACR] &= 0x3F;

	/* 
	 * SE/30: disable video IRQ
	 * XXX: testing for SE/30 VBL
	 */

	if (macintosh_config->ident == MAC_MODEL_SE30) {
		via1[vDirB] |= 0x40;
		via1[vBufB] |= 0x40;
	} 
	
	/*
	 * Set the RTC bits to a known state: all lines to outputs and
	 * RTC disabled (yes that's 0 to enable and 1 to disable).
	 */

	via1[vDirB] |= (VIA1B_vRTCEnb | VIA1B_vRTCClk | VIA1B_vRTCData);
	via1[vBufB] |= (VIA1B_vRTCEnb | VIA1B_vRTCClk);

	/* Everything below this point is VIA2/RBV only... */

	if (oss_present) return;

#if 1
	/* Some machines support an alternate IRQ mapping that spreads  */
	/* Ethernet and Sound out to their own autolevel IRQs and moves */
	/* VIA1 to level 6. A/UX uses this mapping and we do too.  Note */
	/* that the IIfx emulates this alternate mapping using the OSS. */

	switch(macintosh_config->ident) {
		case MAC_MODEL_C610:
		case MAC_MODEL_Q610:
		case MAC_MODEL_C650:
		case MAC_MODEL_Q650:
		case MAC_MODEL_Q700:
		case MAC_MODEL_Q800:
		case MAC_MODEL_Q900:
		case MAC_MODEL_Q950:
			via_alt_mapping = 1;
			via1[vDirB] |= 0x40;
			via1[vBufB] &= ~0x40;
			break;
		default:
			via_alt_mapping = 0;
			break;
	}
#else
	/* The alernate IRQ mapping seems to just not work. Anyone with a   */
	/* supported machine is welcome to take a stab at fixing it. It     */
	/* _should_ work on the following Quadras: 610,650,700,800,900,950  */
	/*                                               - 1999-06-12 (jmt) */

	via_alt_mapping = 0;
#endif

	/*
	 * Now initialize VIA2. For RBV we just kill all interrupts;
	 * for a regular VIA we also reset the timers and stuff.
	 */

	via2[gIER] = 0x7F;
	via2[gIFR] = 0x7F | rbv_clear;
	if (!rbv_present) {
		via2[vT1LL] = 0;
		via2[vT1LH] = 0;
		via2[vT1CL] = 0;
		via2[vT1CH] = 0;
		via2[vT2CL] = 0;
		via2[vT2CH] = 0;
		via2[vACR] &= 0x3F;
	}
}

/*
 * Start the 100 Hz clock
 */

void __init via_init_clock(void (*func)(int, void *, struct pt_regs *))
{	
	via1[vACR] |= 0x40;
	via1[vT1LL] = MAC_CLOCK_LOW;
	via1[vT1LH] = MAC_CLOCK_HIGH;
	via1[vT1CL] = MAC_CLOCK_LOW;
	via1[vT1CH] = MAC_CLOCK_HIGH;

	request_irq(IRQ_MAC_TIMER_1, func, IRQ_FLG_LOCK, "timer", func);
}

/*
 * Register the interrupt dispatchers for VIA or RBV machines only.
 */

void __init via_register_interrupts(void)
{
	if (via_alt_mapping) {
		sys_request_irq(IRQ_AUTO_1, via1_irq, IRQ_FLG_LOCK|IRQ_FLG_FAST,
				"software", (void *) via1);
		sys_request_irq(IRQ_AUTO_6, via1_irq, IRQ_FLG_LOCK|IRQ_FLG_FAST,
				"via1", (void *) via1);
	} else {
		sys_request_irq(IRQ_AUTO_1, via1_irq, IRQ_FLG_LOCK|IRQ_FLG_FAST,
				"via1", (void *) via1);
#if 0 /* interferes with serial on some machines */
		if (!psc_present) {
			sys_request_irq(IRQ_AUTO_6, mac_bang, IRQ_FLG_LOCK,
					"Off Switch", mac_bang);
		}
#endif
	}
	sys_request_irq(IRQ_AUTO_2, via2_irq, IRQ_FLG_LOCK|IRQ_FLG_FAST,
			"via2", (void *) via2);
	if (!psc_present) {
		sys_request_irq(IRQ_AUTO_4, mac_scc_dispatch, IRQ_FLG_LOCK,
				"scc", mac_scc_dispatch);
	}
	request_irq(IRQ_MAC_NUBUS, via_nubus_irq, IRQ_FLG_LOCK|IRQ_FLG_FAST,
			"nubus", (void *) via2);
}

/*
 * Debugging dump, used in various places to see what's going on.
 */

void via_debug_dump(void)
{
	printk("VIA1: DDRA = 0x%02X DDRB = 0x%02X ACR = 0x%02X\n",
		(uint) via1[vDirA], (uint) via1[vDirB], (uint) via1[vACR]);
	printk("         PCR = 0x%02X  IFR = 0x%02X IER = 0x%02X\n",
		(uint) via1[vPCR], (uint) via1[vIFR], (uint) via1[vIER]);
	if (oss_present) {
		printk("VIA2: <OSS>\n");
	} else if (rbv_present) {
		printk("VIA2:  IFR = 0x%02X  IER = 0x%02X\n",
			(uint) via2[rIFR], (uint) via2[rIER]);
		printk("      SIFR = 0x%02X SIER = 0x%02X\n",
			(uint) via2[rSIFR], (uint) via2[rSIER]);
	} else {
		printk("VIA2: DDRA = 0x%02X DDRB = 0x%02X ACR = 0x%02X\n",
			(uint) via2[vDirA], (uint) via2[vDirB],
			(uint) via2[vACR]);
		printk("         PCR = 0x%02X  IFR = 0x%02X IER = 0x%02X\n",
			(uint) via2[vPCR],
			(uint) via2[vIFR], (uint) via2[vIER]);
	}
}

/*
 * This is always executed with interrupts disabled.
 *
 * TBI: get time offset between scheduling timer ticks
 */

unsigned long mac_gettimeoffset (void)
{
	unsigned long ticks, offset = 0;

	/* read VIA1 timer 2 current value */
	ticks = via1[vT1CL] | (via1[vT1CH] << 8);
	/* The probability of underflow is less than 2% */
	if (ticks > MAC_CLOCK_TICK - MAC_CLOCK_TICK / 50)
		/* Check for pending timer interrupt in VIA1 IFR */
		if (via1[vIFR] & 0x40) offset = TICK_SIZE;

	ticks = MAC_CLOCK_TICK - ticks;
	ticks = ticks * 10000L / MAC_CLOCK_TICK;

	return ticks + offset;
}

/*
 * Flush the L2 cache on Macs that have it by flipping
 * the system into 24-bit mode for an instant.
 */

void via_flush_cache(void)
{
	via2[gBufB] &= ~VIA2B_vMode32;
	via2[gBufB] |= VIA2B_vMode32;
}

/*
 * Return the status of the L2 cache on a IIci
 */

int via_get_cache_disable(void)
{
	/* Safeguard against being called accidentally */
	if (!via2) {
		printk(KERN_ERR "via_get_cache_disable called on a non-VIA machine!\n");
		return 1;
	}

	return (int) via2[gBufB] & VIA2B_vCDis;
}

/*
 * Initialize VIA2 for Nubus access
 */

void __init via_nubus_init(void)
{
	/* don't set nubus_active = 0 here, it kills the Baboon */
	/* interrupt that we've already registered.		*/

	/* unlock nubus transactions */

	if (!rbv_present) {
		/* set the line to be an output on non-RBV machines */
		via2[vDirB] |= 0x02;
	}

	/* this seems to be an ADB bit on PMU machines */
	/* according to MkLinux.  -- jmt               */

	if ((macintosh_config->adb_type != MAC_ADB_PB1) &&
	    (macintosh_config->adb_type != MAC_ADB_PB2)) {
		via2[gBufB] |= 0x02;
	}

	/* disable nubus slot interrupts. */
	if (rbv_present) {
		via2[rSIER] = 0x7F;
		via2[rSIER] = nubus_active | 0x80;
	} else {
		via2[vBufA] = 0xFF;
		via2[vDirA] = ~nubus_active;
	}
}

/*
 * The generic VIA interrupt routines (shamelessly stolen from Alan Cox's
 * via6522.c :-), disable/pending masks added.
 *
 * The new interrupt architecture in macints.c takes care of a lot of the
 * gruntwork for us, including tallying the interrupts and calling the
 * handlers on the linked list. All we need to do here is basically generate
 * the machspec interrupt number after clearing the interrupt.
 */

void via1_irq(int irq, void *dev_id, struct pt_regs *regs)
{
	int irq_bit, i;
	unsigned char events, mask;

	mask = via1[vIER] & 0x7F;
	if (!(events = via1[vIFR] & mask)) return;

	for (i = 0, irq_bit = 1 ; i < 7 ; i++, irq_bit <<= 1)
		if (events & irq_bit) {
			via1[vIER] = irq_bit;
			mac_do_irq_list(VIA1_SOURCE_BASE + i, regs);
			via1[vIFR] = irq_bit;
			via1[vIER] = irq_bit | 0x80;
		}

#if 0 /* freakin' pmu is doing weird stuff */
	if (!oss_present) {
		/* This (still) seems to be necessary to get IDE
		   working.  However, if you enable VBL interrupts,
		   you're screwed... */
		/* FIXME: should we check the SLOTIRQ bit before
                   pulling this stunt? */
		/* No, it won't be set. that's why we're doing this. */
		via_irq_disable(IRQ_MAC_NUBUS);
		via_irq_clear(IRQ_MAC_NUBUS);
		mac_do_irq_list(IRQ_MAC_NUBUS, regs);
		via_irq_enable(IRQ_MAC_NUBUS);
	}
#endif
}

void via2_irq(int irq, void *dev_id, struct pt_regs *regs)
{
	int irq_bit, i;
	unsigned char events, mask;

	mask = via2[gIER] & 0x7F;
	if (!(events = via2[gIFR] & mask)) return;

	for (i = 0, irq_bit = 1 ; i < 7 ; i++, irq_bit <<= 1)
		if (events & irq_bit) {
			via2[gIER] = irq_bit;
			mac_do_irq_list(VIA2_SOURCE_BASE + i, regs);
			via2[gIFR] = irq_bit | rbv_clear;
			via2[gIER] = irq_bit | 0x80;
		}
}

/*
 * Dispatch Nubus interrupts. We are called as a secondary dispatch by the
 * VIA2 dispatcher as a fast interrupt handler.
 */

void via_nubus_irq(int irq, void *dev_id, struct pt_regs *regs)
{
	int irq_bit, i;
	unsigned char events;

	if (!(events = ~via2[gBufA] & nubus_active)) return;

	for (i = 0, irq_bit = 1 ; i < 7 ; i++, irq_bit <<= 1) {
		if (events & irq_bit) {
			via_irq_disable(NUBUS_SOURCE_BASE + i);
			mac_do_irq_list(NUBUS_SOURCE_BASE + i, regs);
			via_irq_enable(NUBUS_SOURCE_BASE + i);
		}
	}
}

void via_irq_enable(int irq) {
	int irq_src	= IRQ_SRC(irq);
	int irq_idx	= IRQ_IDX(irq);
	int irq_bit	= 1 << irq_idx;

#ifdef DEBUG_IRQUSE
	printk("via_irq_enable(%d)\n", irq);
#endif

	if (irq_src == 1) {
		via1[vIER] = irq_bit | 0x80;
	} else if (irq_src == 2) {
		/*
		 * Set vPCR for SCSI interrupts (but not on RBV)
		 */
		if ((irq_idx == 0) && !rbv_present) {
			if (macintosh_config->scsi_type == MAC_SCSI_OLD) {
				/* CB2 (IRQ) indep. input, positive edge */
				/* CA2 (DRQ) indep. input, positive edge */
				via2[vPCR] = 0x66;
			} else {
				/* CB2 (IRQ) indep. input, negative edge */
				/* CA2 (DRQ) indep. input, negative edge */
				via2[vPCR] = 0x22;
			}
		}
		via2[gIER] = irq_bit | 0x80;
	} else if (irq_src == 7) {
		if (rbv_present) {
			/* enable the slot interrupt. SIER works like IER. */
			via2[rSIER] = IER_SET_BIT(irq_idx);
		} else {
			/* Make sure the bit is an input, to enable the irq */
			via2[vDirA] &= ~irq_bit;
		}
		nubus_active |= irq_bit;
	}
}

void via_irq_disable(int irq) {
	int irq_src	= IRQ_SRC(irq);
	int irq_idx	= IRQ_IDX(irq);
	int irq_bit	= 1 << irq_idx;

#ifdef DEBUG_IRQUSE
	printk("via_irq_disable(%d)\n", irq);
#endif

	if (irq_src == 1) {
		via1[vIER] = irq_bit;
	} else if (irq_src == 2) {
		via2[gIER] = irq_bit;
	} else if (irq_src == 7) {
		if (rbv_present) {
			/* disable the slot interrupt.  SIER works like IER. */
			via2[rSIER] = IER_CLR_BIT(irq_idx);
		} else {
			/* disable the nubus irq by changing dir to output */
			via2[vDirA] |= irq_bit;
		}
		nubus_active &= ~irq_bit;
	}
}

void via_irq_clear(int irq) {
	int irq_src	= IRQ_SRC(irq);
	int irq_idx	= IRQ_IDX(irq);
	int irq_bit	= 1 << irq_idx;

	if (irq_src == 1) {
		via1[vIFR] = irq_bit;
	} else if (irq_src == 2) {
		via2[gIFR] = irq_bit | rbv_clear;
	} else if (irq_src == 7) {
		/* FIXME: hmm.. */
	}
}

/*
 * Returns nonzero if an interrupt is pending on the given
 * VIA/IRQ combination.
 */

int via_irq_pending(int irq)
{
	int irq_src	= IRQ_SRC(irq);
	int irq_idx	= IRQ_IDX(irq);
	int irq_bit	= 1 << irq_idx;

	if (irq_src == 1) {
		return via1[vIFR] & irq_bit;
	} else if (irq_src == 2) {
		return via2[gIFR] & irq_bit;
	} else if (irq_src == 7) {
		return ~via2[gBufA] & irq_bit;
	}
	return 0;
}
/*
 * arch/m68k/mvme16x/16xints.c
 *
 * Copyright (C) 1995 Richard Hirst [richard@sleepie.demon.co.uk]
 *
 * based on amiints.c -- Amiga Linux interrupt handling code
 *
 * This file is subject to the terms and conditions of the GNU General Public
 * License.  See the file README.legal in the main directory of this archive
 * for more details.
 *
 */

#include <linux/types.h>
#include <linux/kernel.h>
#include <linux/errno.h>

#include <asm/system.h>
#include <asm/ptrace.h>
#include <asm/irq.h>

static void mvme16x_defhand (int irq, void *dev_id, struct pt_regs *fp);

/*
 * This should ideally be 4 elements only, for speed.
 */

static struct {
	void		(*handler)(int, void *, struct pt_regs *);
	unsigned long	flags;
	void		*dev_id;
	const char	*devname;
	unsigned	count;
} irq_tab[192];

/*
 * void mvme16x_init_IRQ (void)
 *
 * Parameters:	None
 *
 * Returns:	Nothing
 *
 * This function is called during kernel startup to initialize
 * the mvme16x IRQ handling routines.  Should probably ensure
 * that the base vectors for the VMEChip2 and PCCChip2 are valid.
 */

void mvme16x_init_IRQ (void)
{
	int i;

	for (i = 0; i < 192; i++) {
		irq_tab[i].handler = mvme16x_defhand;
		irq_tab[i].flags = IRQ_FLG_STD;
		irq_tab[i].dev_id = NULL;
		irq_tab[i].devname = NULL;
		irq_tab[i].count = 0;
	}
}

int mvme16x_request_irq(unsigned int irq,
		void (*handler)(int, void *, struct pt_regs *),
                unsigned long flags, const char *devname, void *dev_id)
{
	if (irq < 64 || irq > 255) {
		printk("%s: Incorrect IRQ %d from %s\n", __FUNCTION__, irq, devname);
		return -ENXIO;
	}

	if (!(irq_tab[irq-64].flags & IRQ_FLG_STD)) {
		if (irq_tab[irq-64].flags & IRQ_FLG_LOCK) {
			printk("%s: IRQ %d from %s is not replaceable\n",
			       __FUNCTION__, irq, irq_tab[irq-64].devname);
			return -EBUSY;
		}
		if (flags & IRQ_FLG_REPLACE) {
			printk("%s: %s can't replace IRQ %d from %s\n",
			       __FUNCTION__, devname, irq, irq_tab[irq-64].devname);
			return -EBUSY;
		}
	}
	irq_tab[irq-64].handler = handler;
	irq_tab[irq-64].flags   = flags;
	irq_tab[irq-64].dev_id  = dev_id;
	irq_tab[irq-64].devname = devname;
	return 0;
}

void mvme16x_free_irq(unsigned int irq, void *dev_id)
{
	if (irq < 64 || irq > 255) {
		printk("%s: Incorrect IRQ %d\n", __FUNCTION__, irq);
		return;
	}

	if (irq_tab[irq-64].dev_id != dev_id)
		printk("%s: Removing probably wrong IRQ %d from %s\n",
		       __FUNCTION__, irq, irq_tab[irq-64].devname);

	irq_tab[irq-64].handler = mvme16x_defhand;;
	irq_tab[irq-64].flags   = IRQ_FLG_STD;
	irq_tab[irq-64].dev_id  = NULL;
	irq_tab[irq-64].devname = NULL;
}

void mvme16x_process_int (unsigned long vec, struct pt_regs *fp)
{
	if (vec < 64 || vec > 255)
		printk ("mvme16x_process_int: Illegal vector %ld", vec);
	else
	{
		irq_tab[vec-64].count++;
		irq_tab[vec-64].handler(vec, irq_tab[vec-64].dev_id, fp);
	}
}

int mvme16x_get_irq_list (char *buf)
{
	int i, len = 0;

	for (i = 0; i < 192; i++) {
		if (irq_tab[i].count)
			len += sprintf (buf+len, "Vec 0x%02x: %8d  %s\n",
			    i+64, irq_tab[i].count,
			    irq_tab[i].devname ? irq_tab[i].devname : "free");
	}
	return len;
}


static void mvme16x_defhand (int irq, void *dev_id, struct pt_regs *fp)
{
	printk ("Unknown interrupt 0x%02x\n", irq);
}


void mvme16x_enable_irq (unsigned int irq)
{
}


void mvme16x_disable_irq (unsigned int irq)
{
}


#
# Makefile for Linux arch/m68k/mvme16x source directory
#
# Note! Dependencies are done automagically by 'make dep', which also
# removes any old dependencies. DON'T put your own dependencies here
# unless it's something special (ie not a .c file).
#
# Note 2! The CFLAGS definitions are now in the main makefile...

O_TARGET := mvme16x.o

export-objs	:= mvme16x_ksyms.o

obj-y		:= config.o 16xints.o rtc.o mvme16x_ksyms.o

include $(TOPDIR)/Rules.make
/*
 *  arch/m68k/mvme16x/config.c
 *
 *  Copyright (C) 1995 Richard Hirst [richard@sleepie.demon.co.uk]
 *
 * Based on:
 *
 *  linux/amiga/config.c
 *
 *  Copyright (C) 1993 Hamish Macdonald
 *
 * This file is subject to the terms and conditions of the GNU General Public
 * License.  See the file README.legal in the main directory of this archive
 * for more details.
 */

#include <linux/types.h>
#include <linux/kernel.h>
#include <linux/mm.h>
#include <linux/tty.h>
#include <linux/console.h>
#include <linux/linkage.h>
#include <linux/init.h>
#include <linux/major.h>

#include <asm/bootinfo.h>
#include <asm/system.h>
#include <asm/pgtable.h>
#include <asm/setup.h>
#include <asm/irq.h>
#include <asm/traps.h>
#include <asm/rtc.h>
#include <asm/machdep.h>
#include <asm/mvme16xhw.h>

extern t_bdid mvme_bdid;

static MK48T08ptr_t volatile rtc = (MK48T08ptr_t)MVME_RTC_BASE;

extern void mvme16x_process_int (int level, struct pt_regs *regs);
extern void mvme16x_init_IRQ (void);
extern void mvme16x_free_irq (unsigned int, void *);
extern int  mvme16x_get_irq_list (char *);
extern void mvme16x_enable_irq (unsigned int);
extern void mvme16x_disable_irq (unsigned int);
static void mvme16x_get_model(char *model);
static int  mvme16x_get_hardware_list(char *buffer);
extern int  mvme16x_request_irq(unsigned int irq, void (*handler)(int, void *, struct pt_regs *), unsigned long flags, const char *devname, void *dev_id);
extern void mvme16x_sched_init(void (*handler)(int, void *, struct pt_regs *));
extern int  mvme16x_keyb_init(void);
extern int  mvme16x_kbdrate (struct kbd_repeat *);
extern unsigned long mvme16x_gettimeoffset (void);
extern void mvme16x_gettod (int *year, int *mon, int *day, int *hour,
                           int *min, int *sec);
extern int mvme16x_hwclk (int, struct hwclk_time *);
extern int mvme16x_set_clock_mmss (unsigned long);
extern void mvme16x_check_partition (struct gendisk *hd, unsigned int dev);
extern void mvme16x_mksound( unsigned int count, unsigned int ticks );
extern void mvme16x_reset (void);
extern void mvme16x_waitbut(void);

int bcd2int (unsigned char b);

/* Save tick handler routine pointer, will point to do_timer() in
 * kernel/sched.c, called via mvme16x_process_int() */

static void (*tick_handler)(int, void *, struct pt_regs *);


unsigned short mvme16x_config;


int mvme16x_parse_bootinfo(const struct bi_record *bi)
{
	if (bi->tag == BI_VME_TYPE || bi->tag == BI_VME_BRDINFO)
		return 0;
	else
		return 1;
}

int mvme16x_kbdrate (struct kbd_repeat *k)
{
	return 0;
}

void mvme16x_mksound( unsigned int count, unsigned int ticks )
{
}

void mvme16x_reset()
{
	printk ("\r\n\nCalled mvme16x_reset\r\n"
			"\r\r\r\r\r\r\r\r\r\r\r\r\r\r\r\r\r\r");
	/* The string of returns is to delay the reset until the whole
	 * message is output.  Assert reset bit in GCSR */
	*(volatile char *)0xfff40107 = 0x80;
}

static void mvme16x_get_model(char *model)
{
    p_bdid p = &mvme_bdid;
    char suf[4];

    suf[1] = p->brdsuffix[0];
    suf[2] = p->brdsuffix[1];
    suf[3] = '\0';
    suf[0] = suf[1] ? '-' : '\0';

    sprintf(model, "Motorola MVME%x%s", p->brdno, suf);
}


static int mvme16x_get_hardware_list(char *buffer)
{
    p_bdid p = &mvme_bdid;
    int len = 0;

    if (p->brdno == 0x0162 || p->brdno == 0x0172)
    {
	unsigned char rev = *(unsigned char *)MVME162_VERSION_REG;

	len += sprintf (buffer+len, "VMEchip2        %spresent\n",
			rev & MVME16x_CONFIG_NO_VMECHIP2 ? "NOT " : "");
	len += sprintf (buffer+len, "SCSI interface  %spresent\n",
			rev & MVME16x_CONFIG_NO_SCSICHIP ? "NOT " : "");
	len += sprintf (buffer+len, "Ethernet i/f    %spresent\n",
			rev & MVME16x_CONFIG_NO_ETHERNET ? "NOT " : "");
    }
    else
	*buffer = '\0';

    return (len);
}


#define pcc2chip	((volatile u_char *)0xfff42000)
#define PccSCCMICR	0x1d
#define PccSCCTICR	0x1e
#define PccSCCRICR	0x1f

void __init config_mvme16x(void)
{
    p_bdid p = &mvme_bdid;
    char id[40];

    mach_max_dma_address = 0xffffffff;
    mach_sched_init      = mvme16x_sched_init;
    mach_keyb_init       = mvme16x_keyb_init;
    mach_kbdrate         = mvme16x_kbdrate;
    mach_init_IRQ        = mvme16x_init_IRQ;
    mach_gettimeoffset   = mvme16x_gettimeoffset;
    mach_gettod  	 = mvme16x_gettod;
    mach_hwclk           = mvme16x_hwclk;
    mach_set_clock_mmss	 = mvme16x_set_clock_mmss;
/*  kd_mksound           = mvme16x_mksound; */
    mach_reset		 = mvme16x_reset;
    mach_free_irq	 = mvme16x_free_irq;
    mach_process_int	 = mvme16x_process_int;
    mach_get_irq_list	 = mvme16x_get_irq_list;
    mach_request_irq	 = mvme16x_request_irq;
    enable_irq           = mvme16x_enable_irq;
    disable_irq          = mvme16x_disable_irq;
    mach_get_model       = mvme16x_get_model;
    mach_get_hardware_list = mvme16x_get_hardware_list;

    /* Report board revision */

    if (strncmp("BDID", p->bdid, 4))
    {
	printk ("\n\nBug call .BRD_ID returned garbage - giving up\n\n");
	while (1)
		;
    }
    /* Board type is only set by newer versions of vmelilo/tftplilo */
    if (vme_brdtype == 0)
	vme_brdtype = p->brdno;

    mvme16x_get_model(id);
    printk ("\nBRD_ID: %s   BUG %x.%x %02x/%02x/%02x\n", id, p->rev>>4,
					p->rev&0xf, p->yr, p->mth, p->day);
    if (p->brdno == 0x0162 || p->brdno == 0x172)
    {
	unsigned char rev = *(unsigned char *)MVME162_VERSION_REG;

	mvme16x_config = rev | MVME16x_CONFIG_GOT_SCCA;

	printk ("MVME%x Hardware status:\n", p->brdno);
	printk ("    CPU Type           68%s040\n",
			rev & MVME16x_CONFIG_GOT_FPU ? "" : "LC");
	printk ("    CPU clock          %dMHz\n",
			rev & MVME16x_CONFIG_SPEED_32 ? 32 : 25);
	printk ("    VMEchip2           %spresent\n",
			rev & MVME16x_CONFIG_NO_VMECHIP2 ? "NOT " : "");
	printk ("    SCSI interface     %spresent\n",
			rev & MVME16x_CONFIG_NO_SCSICHIP ? "NOT " : "");
	printk ("    Ethernet interface %spresent\n",
			rev & MVME16x_CONFIG_NO_ETHERNET ? "NOT " : "");
    }
    else
    {
	mvme16x_config = MVME16x_CONFIG_GOT_LP | MVME16x_CONFIG_GOT_CD2401;

	/* Dont allow any interrupts from the CD2401 until the interrupt */
	/* handlers are installed					 */

	pcc2chip[PccSCCMICR] = 0x10;
	pcc2chip[PccSCCTICR] = 0x10;
	pcc2chip[PccSCCRICR] = 0x10;
    }
}

static void mvme16x_abort_int (int irq, void *dev_id, struct pt_regs *fp)
{
	p_bdid p = &mvme_bdid;
	unsigned long *new = (unsigned long *)vectors;
	unsigned long *old = (unsigned long *)0xffe00000;
	volatile unsigned char uc, *ucp;

	if (p->brdno == 0x0162 || p->brdno == 0x172)
	{
		ucp = (volatile unsigned char *)0xfff42043;
		uc = *ucp | 8;
		*ucp = uc;
	}
	else
	{
		*(volatile unsigned long *)0xfff40074 = 0x40000000;
	}
	*(new+4) = *(old+4);		/* Illegal instruction */
	*(new+9) = *(old+9);		/* Trace */
	*(new+47) = *(old+47);		/* Trap #15 */

	if (p->brdno == 0x0162 || p->brdno == 0x172)
		*(new+0x5e) = *(old+0x5e);	/* ABORT switch */
	else
		*(new+0x6e) = *(old+0x6e);	/* ABORT switch */
}

static void mvme16x_timer_int (int irq, void *dev_id, struct pt_regs *fp)
{
    *(volatile unsigned char *)0xfff4201b |= 8;
    tick_handler(irq, dev_id, fp);
}

void mvme16x_sched_init (void (*timer_routine)(int, void *, struct pt_regs *))
{
    p_bdid p = &mvme_bdid;
    int irq;

    tick_handler = timer_routine;
    /* Using PCCchip2 or MC2 chip tick timer 1 */
    *(volatile unsigned long *)0xfff42008 = 0;
    *(volatile unsigned long *)0xfff42004 = 10000;	/* 10ms */
    *(volatile unsigned char *)0xfff42017 |= 3;
    *(volatile unsigned char *)0xfff4201b = 0x16;
    if (request_irq(MVME16x_IRQ_TIMER, mvme16x_timer_int, 0,
				"timer", mvme16x_timer_int))
	panic ("Couldn't register timer int");

    if (p->brdno == 0x0162 || p->brdno == 0x172)
	irq = MVME162_IRQ_ABORT;
    else
        irq = MVME167_IRQ_ABORT;
    if (request_irq(irq, mvme16x_abort_int, 0,
				"abort", mvme16x_abort_int))
	panic ("Couldn't register abort int");
}


/* This is always executed with interrupts disabled.  */
unsigned long mvme16x_gettimeoffset (void)
{
    return (*(volatile unsigned long *)0xfff42008);
}

extern void mvme16x_gettod (int *year, int *mon, int *day, int *hour,
                           int *min, int *sec)
{
	rtc->ctrl = RTC_READ;
	*year = bcd2int (rtc->bcd_year);
	*mon = bcd2int (rtc->bcd_mth);
	*day = bcd2int (rtc->bcd_dom);
	*hour = bcd2int (rtc->bcd_hr);
	*min = bcd2int (rtc->bcd_min);
	*sec = bcd2int (rtc->bcd_sec);
	rtc->ctrl = 0;
}

int bcd2int (unsigned char b)
{
	return ((b>>4)*10 + (b&15));
}

int mvme16x_hwclk(int op, struct hwclk_time *t)
{
	return 0;
}

int mvme16x_set_clock_mmss (unsigned long nowtime)
{
	return 0;
}

int mvme16x_keyb_init (void)
{
	return 0;
}

/*
 *	Real Time Clock interface for Linux on the MVME16x
 *
 * Based on the PC driver by Paul Gortmaker.
 */

#define RTC_VERSION		"1.00"

#include <linux/types.h>
#include <linux/errno.h>
#include <linux/miscdevice.h>
#include <linux/slab.h>
#include <linux/ioport.h>
#include <linux/fcntl.h>
#include <linux/init.h>
#include <linux/poll.h>
#include <linux/mc146818rtc.h>	/* For struct rtc_time and ioctls, etc */
#include <linux/smp_lock.h>
#include <asm/mvme16xhw.h>

#include <asm/io.h>
#include <asm/uaccess.h>
#include <asm/system.h>
#include <asm/setup.h>

/*
 *	We sponge a minor off of the misc major. No need slurping
 *	up another valuable major dev number for this. If you add
 *	an ioctl, make sure you don't conflict with SPARC's RTC
 *	ioctls.
 */

#define BCD2BIN(val) (((val)&15) + ((val)>>4)*10)
#define BIN2BCD(val) ((((val)/10)<<4) + (val)%10)

static unsigned char days_in_mo[] =
{0, 31, 28, 31, 30, 31, 30, 31, 31, 30, 31, 30, 31};

static char rtc_status = 0;

static int rtc_ioctl(struct inode *inode, struct file *file, unsigned int cmd,
		     unsigned long arg)
{
	volatile MK48T08ptr_t rtc = (MK48T08ptr_t)MVME_RTC_BASE;
	unsigned long flags;
	struct rtc_time wtime; 

	switch (cmd) {
	case RTC_RD_TIME:	/* Read the time/date from RTC	*/
	{
		save_flags(flags);
		cli();
		/* Ensure clock and real-time-mode-register are accessible */
		rtc->ctrl = RTC_READ;
		wtime.tm_sec =  BCD2BIN(rtc->bcd_sec);
		wtime.tm_min =  BCD2BIN(rtc->bcd_min);
		wtime.tm_hour = BCD2BIN(rtc->bcd_hr);
		wtime.tm_mday =  BCD2BIN(rtc->bcd_dom);
		wtime.tm_mon =  BCD2BIN(rtc->bcd_mth)-1;
		wtime.tm_year = BCD2BIN(rtc->bcd_year);
		if (wtime.tm_year < 70)
			wtime.tm_year += 100;
		wtime.tm_wday = BCD2BIN(rtc->bcd_dow)-1;
		rtc->ctrl = 0;
		restore_flags(flags);
		return copy_to_user((void *)arg, &wtime, sizeof wtime) ?
								-EFAULT : 0;
	}
	case RTC_SET_TIME:	/* Set the RTC */
	{
		struct rtc_time rtc_tm;
		unsigned char mon, day, hrs, min, sec, leap_yr;
		unsigned int yrs;

		if (!capable(CAP_SYS_ADMIN))
			return -EACCES;

		if (copy_from_user(&rtc_tm, (struct rtc_time*)arg,
				   sizeof(struct rtc_time)))
			return -EFAULT;

		yrs = rtc_tm.tm_year;
		if (yrs < 1900)
			yrs += 1900;
		mon = rtc_tm.tm_mon + 1;   /* tm_mon starts at zero */
		day = rtc_tm.tm_mday;
		hrs = rtc_tm.tm_hour;
		min = rtc_tm.tm_min;
		sec = rtc_tm.tm_sec;

		leap_yr = ((!(yrs % 4) && (yrs % 100)) || !(yrs % 400));

		if ((mon > 12) || (day == 0))
			return -EINVAL;

		if (day > (days_in_mo[mon] + ((mon == 2) && leap_yr)))
			return -EINVAL;

		if ((hrs >= 24) || (min >= 60) || (sec >= 60))
			return -EINVAL;

		if (yrs >= 2070)
			return -EINVAL;
		
		save_flags(flags);
		cli();
		rtc->ctrl     = RTC_WRITE;

		rtc->bcd_sec  = BIN2BCD(sec);
		rtc->bcd_min  = BIN2BCD(min);
		rtc->bcd_hr   = BIN2BCD(hrs);
		rtc->bcd_dom  = BIN2BCD(day);
		rtc->bcd_mth  = BIN2BCD(mon);
		rtc->bcd_year = BIN2BCD(yrs%100);

		rtc->ctrl     = 0;
		restore_flags(flags);
		return 0;
	}
	default:
		return -EINVAL;
	}
}

/*
 *	We enforce only one user at a time here with the open/close.
 *	Also clear the previous interrupt data on an open, and clean
 *	up things on a close.
 */

static int rtc_open(struct inode *inode, struct file *file)
{
	if(rtc_status)
		return -EBUSY;

	rtc_status = 1;
	return 0;
}

static int rtc_release(struct inode *inode, struct file *file)
{
	lock_kernel();
	rtc_status = 0;
	unlock_kernel();
	return 0;
}

/*
 *	The various file operations we support.
 */

static struct file_operations rtc_fops = {
	ioctl:		rtc_ioctl,
	open:		rtc_open,
	release:	rtc_release,
};

static struct miscdevice rtc_dev=
{
	RTC_MINOR,
	"rtc",
	&rtc_fops
};

int __init rtc_MK48T08_init(void)
{
	if (!MACH_IS_MVME16x)
		return -ENODEV;

	printk(KERN_INFO "MK48T08 Real Time Clock Driver v%s\n", RTC_VERSION);
	misc_register(&rtc_dev);
	return 0;
}

#include <linux/module.h>
#include <linux/types.h>
#include <asm/ptrace.h>
#include <asm/mvme16xhw.h>
 
EXPORT_SYMBOL(mvme16x_config);
/*
 * arch/m68k/mvme147/147ints.c
 *
 * Copyright (C) 1997 Richard Hirst [richard@sleepie.demon.co.uk]
 *
 * based on amiints.c -- Amiga Linux interrupt handling code
 *
 * This file is subject to the terms and conditions of the GNU General Public
 * License.  See the file README.legal in the main directory of this archive
 * for more details.
 *
 */

#include <linux/types.h>
#include <linux/kernel.h>
#include <linux/errno.h>

#include <asm/ptrace.h>
#include <asm/system.h>
#include <asm/irq.h>
#include <asm/traps.h>

static void mvme147_defhand (int irq, void *dev_id, struct pt_regs *fp);

/*
 * This should ideally be 4 elements only, for speed.
 */

static struct {
	void		(*handler)(int, void *, struct pt_regs *);
	unsigned long	flags;
	void		*dev_id;
	const char	*devname;
	unsigned	count;
} irq_tab[256];

/*
 * void mvme147_init_IRQ (void)
 *
 * Parameters:	None
 *
 * Returns:	Nothing
 *
 * This function is called during kernel startup to initialize
 * the mvme147 IRQ handling routines.
 */

void mvme147_init_IRQ (void)
{
	int i;

	for (i = 0; i < 256; i++) {
		irq_tab[i].handler = mvme147_defhand;
		irq_tab[i].flags = IRQ_FLG_STD;
		irq_tab[i].dev_id = NULL;
		irq_tab[i].devname = NULL;
		irq_tab[i].count = 0;
	}
}

int mvme147_request_irq(unsigned int irq,
		void (*handler)(int, void *, struct pt_regs *),
                unsigned long flags, const char *devname, void *dev_id)
{
	if (irq > 255) {
		printk("%s: Incorrect IRQ %d from %s\n", __FUNCTION__, irq, devname);
		return -ENXIO;
	}
	if (!(irq_tab[irq].flags & IRQ_FLG_STD)) {
		if (irq_tab[irq].flags & IRQ_FLG_LOCK) {
			printk("%s: IRQ %d from %s is not replaceable\n",
			       __FUNCTION__, irq, irq_tab[irq].devname);
			return -EBUSY;
		}
		if (flags & IRQ_FLG_REPLACE) {
			printk("%s: %s can't replace IRQ %d from %s\n",
			       __FUNCTION__, devname, irq, irq_tab[irq].devname);
			return -EBUSY;
		}
	}
	irq_tab[irq].handler = handler;
	irq_tab[irq].flags   = flags;
	irq_tab[irq].dev_id  = dev_id;
	irq_tab[irq].devname = devname;
	return 0;
}

void mvme147_free_irq(unsigned int irq, void *dev_id)
{
	if (irq > 255) {
		printk("%s: Incorrect IRQ %d\n", __FUNCTION__, irq);
		return;
	}
	if (irq_tab[irq].dev_id != dev_id)
		printk("%s: Removing probably wrong IRQ %d from %s\n",
		       __FUNCTION__, irq, irq_tab[irq].devname);

	irq_tab[irq].handler = mvme147_defhand;
	irq_tab[irq].flags   = IRQ_FLG_STD;
	irq_tab[irq].dev_id  = NULL;
	irq_tab[irq].devname = NULL;
}

void mvme147_process_int (unsigned long vec, struct pt_regs *fp)
{
	if (vec > 255)
		printk ("mvme147_process_int: Illegal vector %ld\n", vec);
	else
	{
		irq_tab[vec].count++;
		irq_tab[vec].handler(vec, irq_tab[vec].dev_id, fp);
	}
}

int mvme147_get_irq_list (char *buf)
{
	int i, len = 0;

	for (i = 0; i < 256; i++) {
		if (irq_tab[i].count)
			len += sprintf (buf+len, "Vec 0x%02x: %8d  %s\n",
			    i, irq_tab[i].count,
			    irq_tab[i].devname ? irq_tab[i].devname : "free");
	}
	return len;
}


static void mvme147_defhand (int irq, void *dev_id, struct pt_regs *fp)
{
	printk ("Unknown interrupt 0x%02x\n", irq);
}

void mvme147_enable_irq (unsigned int irq)
{
}


void mvme147_disable_irq (unsigned int irq)
{
}

#
# Makefile for Linux arch/m68k/mvme147 source directory
#
# Note! Dependencies are done automagically by 'make dep', which also
# removes any old dependencies. DON'T put your own dependencies here
# unless it's something special (ie not a .c file).
#

O_TARGET := mvme147.o

obj-y		:= config.o 147ints.o

include $(TOPDIR)/Rules.make

/*
 *  arch/m68k/mvme147/config.c
 *
 *  Copyright (C) 1996 Dave Frascone [chaos@mindspring.com]
 *  Cloned from        Richard Hirst [richard@sleepie.demon.co.uk]
 *
 * Based on:
 *
 *  Copyright (C) 1993 Hamish Macdonald
 *
 * This file is subject to the terms and conditions of the GNU General Public
 * License.  See the file README.legal in the main directory of this archive
 * for more details.
 */

#include <linux/types.h>
#include <linux/kernel.h>
#include <linux/mm.h>
#include <linux/tty.h>
#include <linux/console.h>
#include <linux/linkage.h>
#include <linux/init.h>
#include <linux/major.h>

#include <asm/bootinfo.h>
#include <asm/system.h>
#include <asm/pgtable.h>
#include <asm/setup.h>
#include <asm/irq.h>
#include <asm/traps.h>
#include <asm/rtc.h>
#include <asm/machdep.h>
#include <asm/mvme147hw.h>


extern void mvme147_process_int (int level, struct pt_regs *regs);
extern void mvme147_init_IRQ (void);
extern void mvme147_free_irq (unsigned int, void *);
extern int  mvme147_get_irq_list (char *);
extern void mvme147_enable_irq (unsigned int);
extern void mvme147_disable_irq (unsigned int);
static void mvme147_get_model(char *model);
static int  mvme147_get_hardware_list(char *buffer);
extern int mvme147_request_irq (unsigned int irq, void (*handler)(int, void *, struct pt_regs *), unsigned long flags, const char *devname, void *dev_id);
extern void mvme147_sched_init(void (*handler)(int, void *, struct pt_regs *));
extern int mvme147_keyb_init(void);
extern int mvme147_kbdrate (struct kbd_repeat *);
extern unsigned long mvme147_gettimeoffset (void);
extern void mvme147_gettod (int *year, int *mon, int *day, int *hour,
                           int *min, int *sec);
extern int mvme147_hwclk (int, struct hwclk_time *);
extern int mvme147_set_clock_mmss (unsigned long);
extern void mvme147_check_partition (struct gendisk *hd, unsigned int dev);
extern void mvme147_reset (void);
extern void mvme147_waitbut(void);


static int bcd2int (unsigned char b);

/* Save tick handler routine pointer, will point to do_timer() in
 * kernel/sched.c, called via mvme147_process_int() */

void (*tick_handler)(int, void *, struct pt_regs *);


int mvme147_parse_bootinfo(const struct bi_record *bi)
{
	if (bi->tag == BI_VME_TYPE || bi->tag == BI_VME_BRDINFO)
		return 0;
	else
		return 1;
}

int mvme147_kbdrate (struct kbd_repeat *k)
{
	return 0;
}

void mvme147_reset()
{
	printk ("\r\n\nCalled mvme147_reset\r\n");
	m147_pcc->watchdog = 0x0a;	/* Clear timer */
	m147_pcc->watchdog = 0xa5;	/* Enable watchdog - 100ms to reset */
	while (1)
		;
}

static void mvme147_get_model(char *model)
{
	sprintf(model, "Motorola MVME147");
}


static int mvme147_get_hardware_list(char *buffer)
{
	*buffer = '\0';

	return 0;
}


void __init config_mvme147(void)
{
	mach_max_dma_address	= 0x01000000;
	mach_sched_init		= mvme147_sched_init;
	mach_keyb_init		= mvme147_keyb_init;
	mach_kbdrate		= mvme147_kbdrate;
	mach_init_IRQ		= mvme147_init_IRQ;
	mach_gettimeoffset	= mvme147_gettimeoffset;
	mach_gettod		= mvme147_gettod;
	mach_hwclk		= mvme147_hwclk;
	mach_set_clock_mmss	= mvme147_set_clock_mmss;
	mach_reset		= mvme147_reset;
	mach_free_irq		= mvme147_free_irq;
	mach_process_int	= mvme147_process_int;
	mach_get_irq_list	= mvme147_get_irq_list;
	mach_request_irq	= mvme147_request_irq;
	enable_irq		= mvme147_enable_irq;
	disable_irq		= mvme147_disable_irq;
	mach_get_model		= mvme147_get_model;
	mach_get_hardware_list	= mvme147_get_hardware_list;

	/* Board type is only set by newer versions of vmelilo/tftplilo */
	if (!vme_brdtype)
		vme_brdtype = VME_TYPE_MVME147;
}


/* Using pcc tick timer 1 */

static void mvme147_timer_int (int irq, void *dev_id, struct pt_regs *fp)
{
	m147_pcc->t1_int_cntrl = PCC_TIMER_INT_CLR;  
	m147_pcc->t1_int_cntrl = PCC_INT_ENAB|PCC_LEVEL_TIMER1;   
	tick_handler(irq, dev_id, fp);
}


void mvme147_sched_init (void (*timer_routine)(int, void *, struct pt_regs *))
{
	tick_handler = timer_routine;
	request_irq (PCC_IRQ_TIMER1, mvme147_timer_int, 
		IRQ_FLG_REPLACE, "timer 1", NULL);
	
	/* Init the clock with a value */
	/* our clock goes off every 6.25us */
	m147_pcc->t1_preload = PCC_TIMER_PRELOAD;
	m147_pcc->t1_cntrl = 0x0;   	/* clear timer */
	m147_pcc->t1_cntrl = 0x3; 	/* start timer */
	m147_pcc->t1_int_cntrl = PCC_TIMER_INT_CLR;  /* clear pending ints */
	m147_pcc->t1_int_cntrl = PCC_INT_ENAB|PCC_LEVEL_TIMER1;   
}

/* This is always executed with interrupts disabled.  */
/* XXX There are race hazards in this code XXX */
unsigned long mvme147_gettimeoffset (void)
{
	volatile unsigned short *cp = (volatile unsigned short *)0xfffe1012;
	unsigned short n;

	n = *cp;
	while (n != *cp)
		n = *cp;

	n -= PCC_TIMER_PRELOAD;
	return (unsigned long)n * 25 / 4;
}

extern void mvme147_gettod (int *year, int *mon, int *day, int *hour,
                           int *min, int *sec)
{
	m147_rtc->ctrl = RTC_READ;
	*year = bcd2int (m147_rtc->bcd_year);
	*mon = bcd2int (m147_rtc->bcd_mth);
	*day = bcd2int (m147_rtc->bcd_dom);
	*hour = bcd2int (m147_rtc->bcd_hr);
	*min = bcd2int (m147_rtc->bcd_min);
	*sec = bcd2int (m147_rtc->bcd_sec);
	m147_rtc->ctrl = 0;
}

static int bcd2int (unsigned char b)
{
	return ((b>>4)*10 + (b&15));
}

int mvme147_hwclk(int op, struct hwclk_time *t)
{
	return 0;
}

int mvme147_set_clock_mmss (unsigned long nowtime)
{
	return 0;
}

int mvme147_keyb_init (void)
{
	return 0;
}

/*-------------------  Serial console stuff ------------------------*/

static void scc_delay (void)
{
	int n;
	volatile int trash;

	for (n = 0; n < 20; n++)
		trash = n;
}

static void scc_write (char ch)
{
	volatile char *p = (volatile char *)M147_SCC_A_ADDR;

	do {
		scc_delay();
	}
	while (!(*p & 4));
	scc_delay();
	*p = 8;
	scc_delay();
	*p = ch;
}


void m147_scc_write (struct console *co, const char *str, unsigned count)
{
	unsigned long	flags;

	save_flags(flags);
	cli();

	while (count--)
	{
		if (*str == '\n')
			scc_write ('\r');
		scc_write (*str++);
	}
	restore_flags(flags);
}


static int m147_scc_wait_key (struct console *co)
{
	volatile unsigned char *p = (volatile char *)M147_SCC_A_ADDR;
	unsigned long	flags;
	int		c;

	/* wait for rx buf filled */
	while ((*p & 0x01) == 0)
		;

	save_flags(flags);
	cli();

	*p = 8;
	scc_delay();
	c = *p;

	restore_flags(flags);
	return c;
}


void mvme147_init_console_port (struct console *co, int cflag)
{
	co->write    = m147_scc_write;
	co->wait_key = m147_scc_wait_key;
}
#
# Makefile for Linux arch/m68k/q40 source directory
#
# Note! Dependencies are done automagically by 'make dep', which also
# removes any old dependencies. DON'T put your own dependencies here
# unless it's something special (ie not a .c file).
#
# Note 2! The CFLAGS definitions are now in the main makefile...

O_TARGET := q40.o

obj-y		:= config.o q40ints.o 

include $(TOPDIR)/Rules.make
Linux for the Q40
=================

You may try http://www.geocities.com/SiliconValley/Bay/2602/ for
some up to date information. Booter and other tools will be also
available from this place or ftp.uni-erlangen.de/linux/680x0/q40/
and mirrors.

Hints to documentation usually refer to the linux source tree in
/usr/src/linux/Documentation unless URL given.

It seems IRQ unmasking can't be safely done on a Q40. IRQ probing 
is not implemented - do not try it! (See below)

For a list of kernel command-line options read the documentation for the
particular device drivers.

The floppy imposes a very high interrupt load on the CPU, approx 30K/s.
When something blocks interrupts (HD) it will loose some of them, so far 
this is not known to have caused any data loss. On highly loaded systems
it can make the floppy very slow or practically stop. Other Q40 OS' simply 
poll the floppy for this reason - something that can't be done in Linux.
Only possible cure is getting a 82072 controller with fifo instead of 
the 8272A.

drivers used by the Q40, apart from the very obvious (console etc.):
	drivers/char/q40_keyb.c		# use PC keymaps for national keyboards
		     serial.c		# normal PC driver - any speed
	             lp.c		# printer driver
		     genrtc.c		# RTC
		char/joystick/*		# most of this should work, not 
				        # in default config.in
	        block/q40ide.c		# startup for ide
		      ide*		# see Documentation/ide.txt
		      floppy.c		# normal PC driver, DMA emu in asm/floppy.h
					# and arch/m68k/kernel/entry.S
					# see drivers/block/README.fd
		net/ne.c
		video/q40fb.c
		parport/*
		sound/dmasound_core.c
		      dmasound_q40.c

Various other PC drivers can be enabled simply by adding them to 
arch/m68k/config.in, especially 8 bit devices should be without any
problems. For cards using 16bit io/mem more care is required, like 
checking byte order issues, hacking memcpy_*_io etc.


Debugging
=========

Upon startup the kernel will usually output "ABCQGHIJ" into the SRAM, 
preceded by the booter signature. This is a trace just in case something 
went wrong during earliest setup stages of head.S. 
**Changed** to preserve SRAM contents by default, this is only done when 
requested - SRAM must start with '%LX$' signature to do this. '-d' option 
to 'lxx' loader enables this.

SRAM can also be used as additional console device, use debug=mem.
This will save kernel startup msgs into SRAM, the screen will display 
only the penguin - and shell prompt if it gets that far..
Unfortunately only 2000 bytes are available.

Serial console works and can also be used for debugging, see loader_txt

Most problems seem to be caused by fawlty or badly configured io-cards or 
hard drives anyway.
Make sure to configure the parallel port as SPP and remove IRQ/DMA jumpers
for first testing. The Q40 does not support DMA and may have trouble with
parallel ports version of interrupts.


Q40 Hardware Description
========================

This is just an overview, see asm-m68k/* for details ask if you have any 
questions.

The Q40 consists of a 68040@40 MHz, 1MB video RAM, up to 32MB RAM, AT-style
keyboard interface, 1 Programmable LED, 2x8bit DACs and up to 1MB ROM, 1MB
shadow ROM.
The Q60 has any of 68060 or 68LC060 and up to 128 MB RAM.

Most interfacing like floppy, IDE, serial and parallel ports is done via ISA 
slots. The ISA io and mem range is mapped (sparse&byteswapped!) into separate 
regions of the memory.
The main interrupt register IIRQ_REG will indicate whether an IRQ was internal 
or from some ISA devices, EIRQ_REG can distinguish up to 8 ISA IRQs.

The Q40 custom chip is programmable to provide 2 periodic timers:
	- 50 or 200 Hz - level 2, !!THIS CANT BE DISABLED!!
	- 10 or 20 KHz - level 4, used for dma-sound 
  
Linux uses the 200 Hz interrupt for timer and beep by default.


Interrupts
==========

q40 master chip handles only a subset of level triggered interrupts.

Linux has some requirements wrt interrupt architecture, these are
to my knowledge:
	(a) interrupt handler must not be reentered even when sti() is called
	    from within handler
	(b) working enable/disable_irq

Luckily these requirements are only important for drivers shared
with other architectures - ide,serial,parallel, ethernet.
q40ints.c now contains a trivial hack for (a), (b) is more difficult
because only irq's 4-15 can be disabled - and only all of them at once.
Thus disable_irq() can effectively block the machine if the driver goes
asleep.
One thing to keep in mind when hacking around the interrupt code is 
that there is no way to find out which IRQ caused a request, [EI]IRQ_REG
displays current state of the various IRQ lines.

Keyboard
========

q40 receives AT make/break codes from the keyboard, these are translated to
the PC scancodes x86 Linux uses. So by theory every national keyboard should
work just by loading the appropriate x86 keytable - see any national-HOWTO.

Unfortunately the AT->PC translation isn't quite trivial and even worse, my 
documentation of it is absolutely minimal - thus some exotic keys may not 
behave exactly as expected.

There is still hope that it can be fixed completely though. If you encounter 
problems, email me ideally this:
	- exact keypress/release sequence
	- 'showkey -s' run on q40, non-X session
	- 'showkey -s' run on a PC, non-X session
	- AT codes as displayed by the q40 debugging ROM
btw if the showkey output from PC and Q40 doesn't differ then you have some
classic configuration problem - don't send me anything in this case

/*
 *  arch/m68k/q40/config.c
 *
 *  Copyright (C) 1999 Richard Zidlicky
 *
 * originally based on:
 *
 *  linux/bvme/config.c
 *
 * This file is subject to the terms and conditions of the GNU General Public
 * License.  See the file README.legal in the main directory of this archive
 * for more details.
 */

#include <linux/config.h>
#include <linux/types.h>
#include <linux/kernel.h>
#include <linux/mm.h>
#include <linux/tty.h>
#include <linux/console.h>
#include <linux/linkage.h>
#include <linux/init.h>
#include <linux/major.h>
#include <linux/serial_reg.h>

#include <asm/io.h>
#include <asm/rtc.h>
#include <asm/bootinfo.h>
#include <asm/system.h>
#include <asm/pgtable.h>
#include <asm/setup.h>
#include <asm/irq.h>
#include <asm/traps.h>
#include <asm/rtc.h>
#include <asm/machdep.h>
#include <asm/q40_master.h>
#include <asm/keyboard.h>

extern void floppy_eject(void);
extern void floppy_setup(char *str, int *ints);

extern int q40kbd_translate(unsigned char scancode, unsigned char *keycode,
			    char raw_mode);
extern void q40_process_int (int level, struct pt_regs *regs);
extern void (*q40_sys_default_handler[]) (int, void *, struct pt_regs *);  /* added just for debugging */
extern void q40_init_IRQ (void);
extern void q40_free_irq (unsigned int, void *);
extern int  q40_get_irq_list (char *);
extern void q40_enable_irq (unsigned int);
extern void q40_disable_irq (unsigned int);
static void q40_get_model(char *model);
static int  q40_get_hardware_list(char *buffer);
extern int  q40_request_irq(unsigned int irq, void (*handler)(int, void *, struct pt_regs *), unsigned long flags, const char *devname, void *dev_id);
extern void q40_sched_init(void (*handler)(int, void *, struct pt_regs *));

extern unsigned long q40_gettimeoffset (void);
extern void q40_gettod (int *year, int *mon, int *day, int *hour,
                           int *min, int *sec);
extern int q40_hwclk (int, struct hwclk_time *);
extern int q40_set_clock_mmss (unsigned long);
extern void q40_reset (void);
void q40_halt(void);
extern void q40_waitbut(void);
void q40_set_vectors (void);

extern void (*kd_mksound)(unsigned int, unsigned int);
void q40_mksound(unsigned int /*freq*/, unsigned int /*ticks*/ );

extern char *saved_command_line;
extern char m68k_debug_device[];
static void q40_mem_console_write(struct console *co, const char *b,
				    unsigned int count);

extern int ql_ticks;

static int q40_wait_key(struct console *co){return 0;}
static struct console q40_console_driver = {
	name:		"debug",
	wait_key:	q40_wait_key,
	flags:		CON_PRINTBUFFER,
	index:		-1,
};


/* early debugging function:*/
extern char *q40_mem_cptr; /*=(char *)0xff020000;*/
static int _cpleft;

#if 0
int q40_kbd_translate(unsigned char keycode, unsigned char *keycodep, char raw_mode)
{
        *keycodep = keycode;
        return 1;
}
#endif

static void q40_mem_console_write(struct console *co, const char *s,
				  unsigned int count)
{
  char *p=(char *)s;

  if (count<_cpleft)
    while (count-- >0){
      *q40_mem_cptr=*p++;
      q40_mem_cptr+=4;
      _cpleft--;
    }
}
#if 0
void printq40(char *str)
{
  int l=strlen(str);
  char *p=q40_mem_cptr;

  while (l-- >0 && _cpleft-- >0)
    {
      *p=*str++;
      p+=4;
    }
  q40_mem_cptr=p;
}
#endif

#if 0
int q40_kbdrate (struct kbd_repeat *k)
{
	return 0;
}
#endif

static int halted=0;

#ifdef CONFIG_HEARTBEAT
static void q40_heartbeat(int on)
{
  if (halted) return;

  if (on)
    Q40_LED_ON();
  else
    Q40_LED_OFF();
}
#endif

void q40_reset()
{
        halted=1;
        printk ("\n\n*******************************************\n"
		"Called q40_reset : press the RESET button!! \n"
		"*******************************************\n");
	Q40_LED_ON();
	while(1) ;
}
void q40_halt()
{
        halted=1;
        printk ("\n\n*******************\n"
		    "  Called q40_halt\n"
		    "*******************\n");
	Q40_LED_ON();
	while(1) ;
}

static void q40_get_model(char *model)
{
    sprintf(model, "Q40");
}

/* pasted code to make parport_pc happy */
extern __inline__ int __get_order(unsigned long size)
{
	int order;

	size = (size-1) >> (PAGE_SHIFT-1);
	order = -1;
	do {
		size >>= 1;
		order++;
	} while (size);
	return order;
}
void *pci_alloc_consistent(void *hwdev, size_t size,
			   dma_addr_t *dma_handle)
{
	void *ret;
	int gfp = GFP_ATOMIC;

	ret = (void *)__get_free_pages(gfp, __get_order(size));

	if (ret != NULL) {
		memset(ret, 0, size);
		*dma_handle = virt_to_bus(ret);
	}
	return ret;
}

void pci_free_consistent(void *hwdev, size_t size,
			 void *vaddr, dma_addr_t dma_handle)
{
	free_pages((unsigned long)vaddr, __get_order(size));
}
/* end pasted code */


/* No hardware options on Q40? */

static int q40_get_hardware_list(char *buffer)
{
    *buffer = '\0';
    return 0;
}

static unsigned int serports[]={0x3f8,0x2f8,0x3e8,0x2e8,0};
void q40_disable_irqs(void)
{
  unsigned i,j;
  
  j=0;
  while((i=serports[j++])) outb(0,i+UART_IER);
  master_outb(0,EXT_ENABLE_REG);
  master_outb(0,KEY_IRQ_ENABLE_REG);
}

void __init config_q40(void)
{
    mach_sched_init      = q40_sched_init;

    mach_keyb_init       = q40kbd_init_hw;
    mach_kbd_translate   = q40kbd_translate;
    mach_init_IRQ        = q40_init_IRQ;   
    mach_gettimeoffset   = q40_gettimeoffset; 
    mach_gettod  	 = q40_gettod;
    mach_hwclk           = q40_hwclk; 
    mach_set_clock_mmss	 = q40_set_clock_mmss;

    mach_reset		 = q40_reset;
    mach_free_irq	 = q40_free_irq; 
    mach_process_int	 = q40_process_int;
    mach_get_irq_list	 = q40_get_irq_list;
    mach_request_irq	 = q40_request_irq;
    enable_irq		 = q40_enable_irq;
    disable_irq          = q40_disable_irq;
    mach_default_handler = &q40_sys_default_handler;
    mach_get_model       = q40_get_model;
    mach_get_hardware_list = q40_get_hardware_list;
    kd_mksound             = q40_mksound;

#ifdef CONFIG_MAGIC_SYSRQ
    mach_sysrq_key       = 0x54;
#endif
#ifdef CONFIG_HEARTBEAT
    mach_heartbeat = q40_heartbeat;
#endif
    mach_halt = q40_halt;
    conswitchp = &dummy_con;

    /* disable a few things that SMSQ might have left enabled */
    q40_disable_irqs();

    /* no DMA at all, but ide-scsi requires it.. make sure
     * all physical RAM fits into the boundary - otherwise 
     * allocator may play costly and useless tricks */
    mach_max_dma_address = 1024*1024*1024;   

    /* useful for early debugging stages - writes kernel messages into SRAM */
    if (!strncmp( m68k_debug_device,"mem",3 ))
      {
	/*printk("using NVRAM debug, q40_mem_cptr=%p\n",q40_mem_cptr);*/
	_cpleft=2000-((long)q40_mem_cptr-0xff020000)/4;
	q40_console_driver.write = q40_mem_console_write;
	register_console(&q40_console_driver);
      }
}


int q40_parse_bootinfo(const struct bi_record *rec)
{
  return 1;
}


static inline unsigned char bcd2bin (unsigned char b)
{
	return ((b>>4)*10 + (b&15));
}

static inline unsigned char bin2bcd (unsigned char b)
{
	return (((b/10)*16) + (b%10));
}


unsigned long q40_gettimeoffset (void)
{
    return 5000*(ql_ticks!=0);
}

extern void q40_gettod (int *year, int *mon, int *day, int *hour,
                           int *min, int *sec)
{
	RTC_CTRL |= RTC_READ;
	*year = bcd2bin (RTC_YEAR);
	*mon = bcd2bin (RTC_MNTH);
	*day = bcd2bin (RTC_DATE);
	*hour = bcd2bin (RTC_HOUR);
	*min = bcd2bin (RTC_MINS);
	*sec = bcd2bin (RTC_SECS);
	RTC_CTRL &= ~(RTC_READ);

}



/*
 * Looks like op is non-zero for setting the clock, and zero for
 * reading the clock.
 *
 *  struct hwclk_time {
 *         unsigned        sec;       0..59
 *         unsigned        min;       0..59
 *         unsigned        hour;      0..23
 *         unsigned        day;       1..31
 *         unsigned        mon;       0..11
 *         unsigned        year;      00...
 *         int             wday;      0..6, 0 is Sunday, -1 means unknown/don't set
 * };
 */

int q40_hwclk(int op, struct hwclk_time *t)
{
        if (op)
	{	/* Write.... */
	        RTC_CTRL |= RTC_WRITE;

		RTC_SECS = bin2bcd(t->sec);
		RTC_MINS = bin2bcd(t->min);
		RTC_HOUR = bin2bcd(t->hour);
		RTC_DATE = bin2bcd(t->day);
		RTC_MNTH = bin2bcd(t->mon + 1);
		RTC_YEAR = bin2bcd(t->year%100);
		if (t->wday >= 0)
			RTC_DOW = bin2bcd(t->wday+1);

	        RTC_CTRL &= ~(RTC_WRITE);
	}
	else
	{	/* Read....  */
	  RTC_CTRL |= RTC_READ;

	  t->year = bcd2bin (RTC_YEAR);
	  t->mon  = bcd2bin (RTC_MNTH)-1;
	  t->day  = bcd2bin (RTC_DATE);
	  t->hour = bcd2bin (RTC_HOUR);
	  t->min  = bcd2bin (RTC_MINS);
	  t->sec  = bcd2bin (RTC_SECS);

	  RTC_CTRL &= ~(RTC_READ);
	  
	  if (t->year < 70)
	    t->year += 100;
	  t->wday = bcd2bin(RTC_DOW)-1;

	}

	return 0;
}

/*
 * Set the minutes and seconds from seconds value 'nowtime'.  Fail if
 * clock is out by > 30 minutes.  Logic lifted from atari code.
 */

int q40_set_clock_mmss (unsigned long nowtime)
{
	int retval = 0;
	short real_seconds = nowtime % 60, real_minutes = (nowtime / 60) % 60;

	int rtc_minutes;


	rtc_minutes = bcd2bin (RTC_MINS);

	if ((rtc_minutes < real_minutes
		? real_minutes - rtc_minutes
			: rtc_minutes - real_minutes) < 30)
	{	   
	        RTC_CTRL |= RTC_WRITE;
		RTC_MINS = bin2bcd(real_minutes);
		RTC_SECS = bin2bcd(real_seconds);
		RTC_CTRL &= ~(RTC_WRITE);
	}
	else
		retval = -1;


	return retval;
}

/*
 * arch/m68k/q40/q40ints.c
 *
 * Copyright (C) 1999,2001 Richard Zidlicky
 *
 * This file is subject to the terms and conditions of the GNU General Public
 * License.  See the file COPYING in the main directory of this archive
 * for more details.
 *
 * .. used to be losely based on bvme6000ints.c
 *
 */

#include <linux/config.h>
#include <linux/types.h>
#include <linux/kernel.h>
#include <linux/errno.h>
#include <linux/string.h>
#include <linux/sched.h>

#include <asm/rtc.h>
#include <asm/ptrace.h>
#include <asm/system.h>
#include <asm/irq.h>
#include <asm/hardirq.h>
#include <asm/traps.h>

#include <asm/q40_master.h>
#include <asm/q40ints.h>

/* 
 * Q40 IRQs are defined as follows: 
 *            3,4,5,6,7,10,11,14,15 : ISA dev IRQs
 *            16-31: reserved
 *            32   : keyboard int
 *            33   : frame int (50/200 Hz periodic timer)
 *            34   : sample int (10/20 KHz periodic timer)
 *          
*/

extern int ints_inited;


void q40_irq2_handler (int, void *, struct pt_regs *fp);


extern void (*q40_sys_default_handler[]) (int, void *, struct pt_regs *);

static void q40_defhand (int irq, void *dev_id, struct pt_regs *fp);
static void sys_default_handler(int lev, void *dev_id, struct pt_regs *regs);


#define DEVNAME_SIZE 24

static struct q40_irq_node {
	void		(*handler)(int, void *, struct pt_regs *);
	unsigned long	flags;
	void		*dev_id;
  /*        struct q40_irq_node *next;*/
        char	        devname[DEVNAME_SIZE];
	unsigned	count;
        unsigned short  state;
} irq_tab[Q40_IRQ_MAX+1];

short unsigned q40_ablecount[Q40_IRQ_MAX+1];

/*
 * void q40_init_IRQ (void)
 *
 * Parameters:	None
 *
 * Returns:	Nothing
 *
 * This function is called during kernel startup to initialize
 * the q40 IRQ handling routines.
 */

static int disabled=0;

void q40_init_IRQ (void)
{
	int i;

	disabled=0;
	for (i = 0; i <= Q40_IRQ_MAX; i++) {
		irq_tab[i].handler = q40_defhand;
		irq_tab[i].flags = 0;
		irq_tab[i].dev_id = NULL;
		/*		irq_tab[i].next = NULL;*/
		irq_tab[i].devname[0] = 0;
		irq_tab[i].count = 0;
		irq_tab[i].state =0;
		q40_ablecount[i]=0;   /* all enabled */
	}

	/* setup handler for ISA ints */
	sys_request_irq(IRQ2,q40_irq2_handler, 0, "q40 ISA and master chip", NULL);

	/* now enable some ints.. */
	master_outb(1,EXT_ENABLE_REG);  /* ISA IRQ 5-15 */

	/* make sure keyboard IRQ is disabled */
	master_outb(0,KEY_IRQ_ENABLE_REG);
}

int q40_request_irq(unsigned int irq,
		void (*handler)(int, void *, struct pt_regs *),
                unsigned long flags, const char *devname, void *dev_id)
{
  /*printk("q40_request_irq %d, %s\n",irq,devname);*/

	if (irq > Q40_IRQ_MAX || (irq>15 && irq<32)) {
		printk("%s: Incorrect IRQ %d from %s\n", __FUNCTION__, irq, devname);
		return -ENXIO;
	}

	/* test for ISA ints not implemented by HW */
	switch (irq)
	  {
	  case 1: case 2: case 8: case 9:
	  case 12: case 13:
	    printk("%s: ISA IRQ %d from %s not implemented by HW\n", __FUNCTION__, irq, devname);
	    return -ENXIO;
	  case 11: 	      
	    printk("warning IRQ 10 and 11 not distinguishable\n");
	    irq=10;
	  default:
	  }

	if (irq<Q40_IRQ_SAMPLE)
	  {
	    if (irq_tab[irq].dev_id != NULL) 
		  {
		    printk("%s: IRQ %d from %s is not replaceable\n",
			   __FUNCTION__, irq, irq_tab[irq].devname);
		    return -EBUSY;
		  }
	    /*printk("IRQ %d set to handler %p\n",irq,handler);*/
	    if (dev_id==NULL)
		  {
		printk("WARNING: dev_id == NULL in request_irq\n");
		dev_id=(void*)1;
	      }
	    irq_tab[irq].handler = handler;
	    irq_tab[irq].flags   = flags;
	    irq_tab[irq].dev_id  = dev_id;
	    strncpy(irq_tab[irq].devname,devname,DEVNAME_SIZE);
	    irq_tab[irq].state = 0;
	    return 0;
	  }
	else {
	  /* Q40_IRQ_SAMPLE :somewhat special actions required here ..*/
	  sys_request_irq(4,handler,flags,devname,dev_id);
	  sys_request_irq(6,handler,flags,devname,dev_id);
	  return 0;
	}
}

void q40_free_irq(unsigned int irq, void *dev_id)
{
	if (irq > Q40_IRQ_MAX || (irq>15 && irq<32)) {
		printk("%s: Incorrect IRQ %d, dev_id %x \n", __FUNCTION__, irq, (unsigned)dev_id);
		return;
	}

	/* test for ISA ints not implemented by HW */
	switch (irq)
	  {
	  case 1: case 2: case 8: case 9:
	  case 12: case 13:
	    printk("%s: ISA IRQ %d from %x illegal\n", __FUNCTION__, irq, (unsigned)dev_id);
	    return;
	  case 11: irq=10;
	  default:
	  }
	
	if (irq<Q40_IRQ_SAMPLE)
	  {
	    if (irq_tab[irq].dev_id != dev_id)
	      printk("%s: Removing probably wrong IRQ %d from %s\n",
		     __FUNCTION__, irq, irq_tab[irq].devname);
	    
	    irq_tab[irq].handler = q40_defhand;
	    irq_tab[irq].flags   = 0;
	    irq_tab[irq].dev_id  = NULL;
	    /* irq_tab[irq].devname = NULL; */
	    /* do not reset state !! */
	  }
	else
	  { /* == Q40_IRQ_SAMPLE */
	    sys_free_irq(4,dev_id);
	    sys_free_irq(6,dev_id);
	  }
}


void q40_process_int (int level, struct pt_regs *fp)
{
  printk("unexpected interrupt %x\n",level);
}

/* 
 * this stuff doesn't really belong here..
*/

int ql_ticks=0;              /* 200Hz ticks since last jiffie */
static int sound_ticks=0;

#define SVOL 45

void q40_mksound(unsigned int hz, unsigned int ticks)
{
  /* for now ignore hz, except that hz==0 switches off sound */
  /* simply alternate the ampl (128-SVOL)-(128+SVOL)-..-.. at 200Hz */
  if (hz==0)
    {
      if (sound_ticks)
	sound_ticks=1;

      *DAC_LEFT=128;
      *DAC_RIGHT=128;

      return;
    }
  /* sound itself is done in q40_timer_int */
  if (sound_ticks == 0) sound_ticks=1000; /* pretty long beep */
  sound_ticks=ticks<<1;
}

static void (*q40_timer_routine)(int, void *, struct pt_regs *);

static void q40_timer_int (int irq, void * dev, struct pt_regs * regs)
{
#if (HZ==100)
    ql_ticks = ql_ticks ? 0 : 1;
    if (sound_ticks)
      {
	unsigned char sval=(sound_ticks & 1) ? 128-SVOL : 128+SVOL;
	sound_ticks--;
	*DAC_LEFT=sval;
	*DAC_RIGHT=sval;
      }
#if defined(CONFIG_Q40RTC) || defined(CONFIG_GEN_RTC)
    if (gen_rtc_irq_ctrl && (q40rtc_oldsecs != RTC_SECS))
      {
	q40rtc_oldsecs = RTC_SECS;
	gen_rtc_irq_flags = RTC_UIE;
	gen_rtc_interrupt(0);
      }
#endif
    if (ql_ticks) return;
#endif
    q40_timer_routine(irq, dev, regs);
}

void q40_sched_init (void (*timer_routine)(int, void *, struct pt_regs *))
{
    int timer_irq;

    q40_timer_routine = timer_routine;

#if (HZ==10000)
    timer_irq=Q40_IRQ_SAMPLE;
#else
    timer_irq=Q40_IRQ_FRAME;
#endif

    /*printk("registering sched/timer IRQ %d, handler %p\n", timer_irq,q40_timer_int);*/
    /*printk("timer routine %p\n",q40_timer_routine);*/

    if (request_irq(timer_irq, q40_timer_int, 0,
				"timer", q40_timer_int))
	panic ("Couldn't register timer int");

#if (HZ==10000)
    master_outb(SAMPLE_LOW,SAMPLE_RATE_REG);
    master_outb(-1,SAMPLE_CLEAR_REG);
    master_outb(1,SAMPLE_ENABLE_REG);
#else
    master_outb(-1,FRAME_CLEAR_REG);   /* not necessary ? */
#if (HZ==100)
    master_outb( 1,FRAME_RATE_REG);
#endif
#endif
}


/* 
 * tables to translate bits into IRQ numbers 
 * it is a good idea to order the entries by priority
 * 
*/

struct IRQ_TABLE{ unsigned mask; int irq ;};
#if 0
static struct IRQ_TABLE iirqs[]={
  {IRQ_FRAME_MASK,Q40_IRQ_FRAME},
  {IRQ_KEYB_MASK,Q40_IRQ_KEYBOARD},
  {0,0}};
#endif
static struct IRQ_TABLE eirqs[]={
  {IRQ3_MASK,3},                   /* ser 1 */
  {IRQ4_MASK,4},                   /* ser 2 */
  {IRQ14_MASK,14},                 /* IDE 1 */
  {IRQ15_MASK,15},                 /* IDE 2 */
  {IRQ6_MASK,6},                   /* floppy */
  {IRQ7_MASK,7},                   /* par */

  {IRQ5_MASK,5},
  {IRQ10_MASK,10},




  {0,0}};

/* complain only this many times about spurious ints : */
static int ccleirq=60;    /* ISA dev IRQ's*/
/*static int cclirq=60;*/     /* internal */

/* FIXME: add shared ints,mask,unmask,probing.... */

#define IRQ_INPROGRESS 1
/*static unsigned short saved_mask;*/
static int do_tint=0;

#define DEBUG_Q40INT
/*#define IP_USE_DISABLE *//* would be nice, but crashes ???? */

static int mext_disabled=0;  /* ext irq disabled by master chip? */
static int aliased_irq=0;  /* how many times inside handler ?*/


/* got level 2 interrupt, dispatch to ISA or keyboard/timer IRQs */
void q40_irq2_handler (int vec, void *devname, struct pt_regs *fp)
{
  unsigned mir;
	unsigned mer;
	int irq,i;

 repeat:
  mir=master_inb(IIRQ_REG);
  if (mir&IRQ_FRAME_MASK) 
    { /* dont loose  ticks */
      do_tint++;
      master_outb(-1,FRAME_CLEAR_REG);
    }
	if ((mir&IRQ_SER_MASK) || (mir&IRQ_EXT_MASK)) 
	  {
	    /* some ISA dev caused the int */
	    mer=master_inb(EIRQ_REG);
	    for (i=0; eirqs[i].mask; i++)
	      {
		if (mer&(eirqs[i].mask)) 
		  {
		    irq=eirqs[i].irq;
/*
 * There is a little mess wrt which IRQ really caused this irq request. The
 * main problem is that IIRQ_REG and EIRQ_REG reflect the state when they
 * are read - which is long after the request came in. In theory IRQs should
 * not just go away but they occassionally do
 */
	      if (irq>4 && irq<=15 && mext_disabled) 
		{
		  /*aliased_irq++;*/
		  goto iirq;
		}
		    if (irq_tab[irq].handler == q40_defhand )
		      {
			printk("handler for IRQ %d not defined\n",irq);
			continue; /* ignore uninited INTs :-( */
		      }
		    if ( irq_tab[irq].state & IRQ_INPROGRESS )
		      {
		  /* some handlers do sti() for irq latency reasons, */
		  /* however reentering an active irq handler is not permitted */
#ifdef IP_USE_DISABLE
		  /* in theory this is the better way to do it because it still */
		  /* lets through eg the serial irqs, unfortunately it crashes */
		  disable_irq(irq);
		  disabled=1;
#else
			/*printk("IRQ_INPROGRESS detected for irq %d, disabling - %s disabled\n",irq,disabled ? "already" : "not yet"); */
		  fp->sr = (((fp->sr) & (~0x700))+0x200);
			disabled=1;
#endif
		  goto iirq;
		      }
	      irq_tab[irq].count++; 
		    irq_tab[irq].state |= IRQ_INPROGRESS;
		    irq_tab[irq].handler(irq,irq_tab[irq].dev_id,fp);
	      irq_tab[irq].state &= ~IRQ_INPROGRESS;

		    /* naively enable everything, if that fails than    */
		    /* this function will be reentered immediately thus */
		    /* getting another chance to disable the IRQ        */

		    if ( disabled ) 
		      {
#ifdef IP_USE_DISABLE
			if (irq>4){
			  disabled=0;
			  enable_irq(irq);}
#else
			disabled=0;
			/*printk("reenabling irq %d\n",irq); */
#endif
		      }
	      goto repeat;  /* return;  */
		  }
	      }
	    if (mer && ccleirq>0 && !aliased_irq) 
	      printk("ISA interrupt from unknown source? EIRQ_REG = %x\n",mer),ccleirq--;
	  } 
 iirq:
	mir=master_inb(IIRQ_REG);
	if (mir&IRQ_FRAME_MASK) 
	  {
	    do_tint++;
	    master_outb(-1,FRAME_CLEAR_REG);
	  }
	for(;do_tint>0;do_tint--) 
	  {
	    irq_tab[Q40_IRQ_FRAME].count++;
	    irq_tab[Q40_IRQ_FRAME].handler(Q40_IRQ_FRAME,irq_tab[Q40_IRQ_FRAME].dev_id,fp);    
	  }
	if (mir&IRQ_KEYB_MASK) /* may handle it even if actually disabled*/
	  {
	    irq_tab[Q40_IRQ_KEYBOARD].count++;
	    irq_tab[Q40_IRQ_KEYBOARD].handler(Q40_IRQ_KEYBOARD,irq_tab[Q40_IRQ_KEYBOARD].dev_id,fp);
	  }
}

int q40_get_irq_list (char *buf)
{
	int i, len = 0;

	for (i = 0; i <= Q40_IRQ_MAX; i++) 
	  {
		if (irq_tab[i].count)
	      len += sprintf (buf+len, "%sIRQ %02d: %8d  %s%s\n",
			      (i<=15) ? "ISA-" : "    " ,		
			    i, irq_tab[i].count,
			    irq_tab[i].devname[0] ? irq_tab[i].devname : "?",
			    irq_tab[i].handler == q40_defhand ? 
					" (now unassigned)" : "");
	}
	return len;
}


static void q40_defhand (int irq, void *dev_id, struct pt_regs *fp)
{
#if 0
	printk ("Unknown q40 interrupt 0x%02x\n", irq);
#endif
}
static void sys_default_handler(int lev, void *dev_id, struct pt_regs *regs)
{
#if 0
        if (ints_inited)
#endif
	  printk ("Uninitialised interrupt level %d\n", lev);
#if 0
	else
	  printk ("Interrupt before interrupt initialisation\n");
#endif
}

 void (*q40_sys_default_handler[SYS_IRQS]) (int, void *, struct pt_regs *) = {
   sys_default_handler,sys_default_handler,sys_default_handler,sys_default_handler,
   sys_default_handler,sys_default_handler,sys_default_handler,sys_default_handler
 };


void q40_enable_irq (unsigned int irq)
{
  if ( irq>=5 && irq<=15 )
  {
    mext_disabled--;
    if (mext_disabled>0)
	  printk("q40_enable_irq : nested disable/enable\n"); 
    if (mext_disabled==0)
    master_outb(1,EXT_ENABLE_REG);
    }
}


void q40_disable_irq (unsigned int irq)
{
  /* disable ISA iqs : only do something if the driver has been
  * verified to be Q40 "compatible" - right now IDE, NE2K
  * Any driver should not attempt to sleep accross disable_irq !!
  */

  if ( irq>=5 && irq<=15 ) 
    {
    master_outb(0,EXT_ENABLE_REG);
      mext_disabled++;
      if (mext_disabled>1) printk("disable_irq nesting count %d\n",mext_disabled);
    }
}

unsigned long q40_probe_irq_on (void)
{
  printk("irq probing not working - reconfigure the driver to avoid this\n");
  return -1;
}
int q40_probe_irq_off (unsigned long irqs)
{
  return -1;
}
/*
 * Local variables:
 * compile-command: "m68k-linux-gcc -D__KERNEL__ -I/home/rz/lx/linux-2.2.6/include -Wall -Wstrict-prototypes -O2 -fomit-frame-pointer -pipe -fno-strength-reduce -ffixed-a2 -m68040   -c -o q40ints.o q40ints.c"
 */
#
# Makefile for Linux arch/m68k/sun3x source directory
#
# Note! Dependencies are done automagically by 'make dep', which also
# removes any old dependencies. DON'T put your own dependencies here
# unless it's something special (ie not a .c file).
#
# Note 2! The CFLAGS definitions are now in the main makefile...

O_TARGET := sun3x.o

obj-y		:= config.o time.o dvma.o prom.o

include $(TOPDIR)/Rules.make
/*
 * Setup kernel for a Sun3x machine
 *
 * (C) 1999 Thomas Bogendoerfer (tsbogend@alpha.franken.de)
 *
 * based on code from Oliver Jowett <oliver@jowett.manawatu.gen.nz>
 */

#include <linux/types.h>
#include <linux/mm.h>
#include <linux/console.h>
#include <linux/init.h>

#include <asm/system.h>
#include <asm/machdep.h>
#include <asm/irq.h>
#include <asm/sun3xprom.h>
#include <asm/sun3ints.h>
#include <asm/setup.h>

#include "time.h"

volatile char *clock_va;
extern volatile unsigned char *sun3_intreg;


int __init sun3x_keyb_init(void)
{
	return 0;
}

int sun3x_kbdrate(struct kbd_repeat *r)
{
	return 0;
}

void sun3x_kbd_leds(unsigned int i)
{

}

void sun3_leds(unsigned int i)
{

}

/* should probably detect types of these eventually. */
static void sun3x_get_model(char *model)
{
	sprintf(model, "Sun3x");
}

/*
 *  Setup the sun3x configuration info
 */
void __init config_sun3x(void)
{

	sun3x_prom_init();

	mach_get_irq_list	 = sun3_get_irq_list;
	mach_max_dma_address = 0xffffffff; /* we can DMA anywhere, whee */

	mach_keyb_init       = sun3x_keyb_init;
	mach_kbdrate         = sun3x_kbdrate;
	mach_kbd_leds        = sun3x_kbd_leds;

	mach_default_handler = &sun3_default_handler;
	mach_sched_init      = sun3x_sched_init;
	mach_init_IRQ        = sun3_init_IRQ;
	enable_irq           = sun3_enable_irq;
	disable_irq          = sun3_disable_irq;
	mach_request_irq     = sun3_request_irq;
	mach_free_irq        = sun3_free_irq;
	mach_process_int     = sun3_process_int;
    
	mach_gettimeoffset   = sun3x_gettimeoffset;
	mach_reset           = sun3x_reboot;

	mach_gettod          = sun3x_gettod;
	mach_hwclk           = sun3x_hwclk;
	mach_get_model       = sun3x_get_model;

	sun3_intreg = (unsigned char *)SUN3X_INTREG;

	/* only the serial console is known to work anyway... */
#if 0    
	switch (*(unsigned char *)SUN3X_EEPROM_CONS) {
	case 0x10:
		serial_console = 1;
		conswitchp = NULL;
		break;
	case 0x11:
		serial_console = 2;
		conswitchp = NULL;
		break;
	default:
		serial_console = 0;
		conswitchp = &dummy_con;
		break;
	}
#endif

}

/*
 * Virtual DMA allocation
 *
 * (C) 1999 Thomas Bogendoerfer (tsbogend@alpha.franken.de) 
 *
 * 11/26/2000 -- disabled the existing code because it didn't work for 
 * me in 2.4.  Replaced with a significantly more primitive version 
 * similar to the sun3 code.  the old functionality was probably more 
 * desirable, but....   -- Sam Creasey (sammy@oh.verio.com)
 *
 */

#include <linux/kernel.h>
#include <linux/init.h>
#include <linux/bitops.h>
#include <linux/mm.h>
#include <linux/bootmem.h>
#include <linux/slab.h>
#include <linux/vmalloc.h>

#include <asm/sun3x.h>
#include <asm/dvma.h>
#include <asm/io.h>
#include <asm/page.h>
#include <asm/pgtable.h>
#include <asm/pgalloc.h>

/* IOMMU support */

#define IOMMU_ADDR_MASK            0x03ffe000
#define IOMMU_CACHE_INHIBIT        0x00000040
#define IOMMU_FULL_BLOCK           0x00000020
#define IOMMU_MODIFIED             0x00000010
#define IOMMU_USED                 0x00000008
#define IOMMU_WRITE_PROTECT        0x00000004
#define IOMMU_DT_MASK              0x00000003
#define IOMMU_DT_INVALID           0x00000000
#define IOMMU_DT_VALID             0x00000001
#define IOMMU_DT_BAD               0x00000002


static volatile unsigned long *iommu_pte = (unsigned long *)SUN3X_IOMMU;


#define dvma_entry_paddr(index) 	(iommu_pte[index] & IOMMU_ADDR_MASK)
#define dvma_entry_vaddr(index,paddr) 	((index << DVMA_PAGE_SHIFT) |  \
					 (paddr & (DVMA_PAGE_SIZE-1)))
#if 0
#define dvma_entry_set(index,addr)	(iommu_pte[index] =            \
					    (addr & IOMMU_ADDR_MASK) | \
				             IOMMU_DT_VALID | IOMMU_CACHE_INHIBIT)
#else
#define dvma_entry_set(index,addr)	(iommu_pte[index] =            \
					    (addr & IOMMU_ADDR_MASK) | \
				             IOMMU_DT_VALID)
#endif
#define dvma_entry_clr(index)		(iommu_pte[index] = IOMMU_DT_INVALID)
#define dvma_entry_hash(addr)		((addr >> DVMA_PAGE_SHIFT) ^ \
					 ((addr & 0x03c00000) >>     \
						(DVMA_PAGE_SHIFT+4)))

#undef DEBUG

#ifdef DEBUG
/* code to print out a dvma mapping for debugging purposes */
void dvma_print (unsigned long dvma_addr)
{

        unsigned long index;

        index = dvma_addr >> DVMA_PAGE_SHIFT;

        printk("idx %lx dvma_addr %08lx paddr %08lx\n", index, dvma_addr,
               dvma_entry_paddr(index));


}
#endif


/* create a virtual mapping for a page assigned within the IOMMU
   so that the cpu can reach it easily */
inline int dvma_map_cpu(unsigned long kaddr, 
			       unsigned long vaddr, int len)
{
	pgd_t *pgd;
	unsigned long end;
	int ret = 0;

	kaddr &= PAGE_MASK;
	vaddr &= PAGE_MASK;

	end = PAGE_ALIGN(vaddr + len);

#ifdef DEBUG
	printk("dvma: mapping kern %08lx to virt %08lx\n",
	       kaddr, vaddr);
#endif
	pgd = pgd_offset_k(vaddr);
	
	do {
		pmd_t *pmd;
		unsigned long end2;

		if((pmd = pmd_alloc_kernel(pgd, vaddr)) == NULL) {
			ret = -ENOMEM;
			goto out;
		}

		if((end & PGDIR_MASK) > (vaddr & PGDIR_MASK)) 
			end2 = (vaddr + (PGDIR_SIZE-1)) & PGDIR_MASK;
		else
			end2 = end;

		do {
			pte_t *pte;
			unsigned long end3;

			if((pte = pte_alloc_kernel(pmd, vaddr)) == NULL) {
				ret = -ENOMEM;
				goto out;
			}

			if((end2 & PMD_MASK) > (vaddr & PMD_MASK)) 
				end3 = (vaddr + (PMD_SIZE-1)) & PMD_MASK;
			else
				end3 = end2;

			do {
#ifdef DEBUG
				printk("mapping %08lx phys to %08lx\n",
				       __pa(kaddr), vaddr);
#endif
				set_pte(pte, __mk_pte(kaddr, PAGE_KERNEL));
				pte++;
				kaddr += PAGE_SIZE;
				vaddr += PAGE_SIZE;
			} while(vaddr < end3);
			
		} while(vaddr < end2);

	} while(vaddr < end);
	
	flush_tlb_all();

 out:
	return ret;
}


inline int dvma_map_iommu(unsigned long kaddr, unsigned long baddr,
				 int len) 
{
	unsigned long end, index;

	index = baddr >> DVMA_PAGE_SHIFT;
	end = ((baddr+len) >> DVMA_PAGE_SHIFT);
	
	if(len & ~DVMA_PAGE_MASK)
		end++;

	for(; index < end ; index++) {
//		if(dvma_entry_use(index))
//			BUG();
//		printk("mapping pa %lx to ba %lx\n", __pa(kaddr), index << DVMA_PAGE_SHIFT);

		dvma_entry_set(index, __pa(kaddr));

		iommu_pte[index] |= IOMMU_FULL_BLOCK;
//		dvma_entry_inc(index);
		
		kaddr += DVMA_PAGE_SIZE;
	}

#ifdef DEBUG	
	for(index = (baddr >> DVMA_PAGE_SHIFT); index < end; index++) 
		dvma_print(index << DVMA_PAGE_SHIFT);
#endif
	return 0;

}

void dvma_unmap_iommu(unsigned long baddr, int len)
{

	int index, end;
	
	
	index = baddr >> DVMA_PAGE_SHIFT;
	end = (DVMA_PAGE_ALIGN(baddr+len) >> DVMA_PAGE_SHIFT);
	
	for(; index < end ; index++) {
#ifdef DEBUG
		printk("freeing bus mapping %08x\n", index << DVMA_PAGE_SHIFT);
#endif
#if 0
		if(!dvma_entry_use(index)) 
			printk("dvma_unmap freeing unused entry %04x\n",
			       index);
		else
			dvma_entry_dec(index);
#endif
		dvma_entry_clr(index);
	}

}

/*
 *  linux/arch/m68k/sun3x/time.c
 *
 *  Sun3x-specific time handling
 */

#include <linux/types.h>
#include <linux/kd.h>
#include <linux/init.h>
#include <linux/sched.h>
#include <linux/kernel_stat.h>
#include <linux/interrupt.h>

#include <asm/irq.h>
#include <asm/io.h>
#include <asm/system.h>
#include <asm/traps.h>
#include <asm/sun3x.h>
#include <asm/sun3ints.h>
#include <asm/rtc.h>

#include "time.h"

#define M_CONTROL 0xf8
#define M_SEC     0xf9
#define M_MIN     0xfa
#define M_HOUR    0xfb
#define M_DAY     0xfc
#define M_DATE    0xfd
#define M_MONTH   0xfe
#define M_YEAR    0xff

#define C_WRITE   0x80
#define C_READ    0x40
#define C_SIGN    0x20
#define C_CALIB   0x1f

#define BCD_TO_BIN(val) (((val)&15) + ((val)>>4)*10)
#define BIN_TO_BCD(val) (((val/10) << 4) | (val % 10))

/* Read the Mostek */
void sun3x_gettod (int *yearp, int *monp, int *dayp,
                   int *hourp, int *minp, int *secp)
{
    volatile unsigned char *eeprom = (unsigned char *)SUN3X_EEPROM;

    /* Stop updates */
    *(eeprom + M_CONTROL) |= C_READ;

    /* Read values */
    *yearp = BCD_TO_BIN(*(eeprom + M_YEAR));
    *monp  = BCD_TO_BIN(*(eeprom + M_MONTH)) +1;
    *dayp  = BCD_TO_BIN(*(eeprom + M_DATE));
    *hourp = BCD_TO_BIN(*(eeprom + M_HOUR));
    *minp  = BCD_TO_BIN(*(eeprom + M_MIN));
    *secp  = BCD_TO_BIN(*(eeprom + M_SEC));

    /* Restart updates */
    *(eeprom + M_CONTROL) &= ~C_READ;
}

int sun3x_hwclk(int set, struct hwclk_time *t)
{
	volatile struct mostek_dt *h = 
		(unsigned char *)(SUN3X_EEPROM+M_CONTROL);
	unsigned long flags;

	save_and_cli(flags);
	
	if(set) {
		h->csr |= C_WRITE;
		h->sec = BIN_TO_BCD(t->sec);
		h->min = BIN_TO_BCD(t->min);
		h->hour = BIN_TO_BCD(t->hour);
		h->wday = BIN_TO_BCD(t->wday);
		h->mday = BIN_TO_BCD(t->day);
		h->month = BIN_TO_BCD(t->mon);
		h->year = BIN_TO_BCD(t->year);
		h->csr &= ~C_WRITE;
	} else {
		h->csr |= C_READ;
		t->sec = BCD_TO_BIN(h->sec);
		t->min = BCD_TO_BIN(h->min);
		t->hour = BCD_TO_BIN(h->hour);
		t->wday = BCD_TO_BIN(h->wday);
		t->day = BCD_TO_BIN(h->mday);
		t->mon = BCD_TO_BIN(h->month);
		t->year = BCD_TO_BIN(h->year);
		h->csr &= ~C_READ;
	}

	restore_flags(flags);

	return 0;
}
/* Not much we can do here */
unsigned long sun3x_gettimeoffset (void)
{
    return 0L;
}

static void sun3x_timer_tick(int irq, void *dev_id, struct pt_regs *regs)
{
    void (*vector)(int, void *, struct pt_regs *) = dev_id;

    /* Clear the pending interrupt - pulse the enable line low */
    disable_irq(5);
    enable_irq(5);
    
    vector(irq, NULL, regs);
}

void __init sun3x_sched_init(void (*vector)(int, void *, struct pt_regs *))
{
	
	sun3_disable_interrupts();
	

    /* Pulse enable low to get the clock started */
	sun3_disable_irq(5);
	sun3_enable_irq(5);
	sun3_enable_interrupts();
}
#ifndef SUN3X_TIME_H
#define SUN3X_TIME_H

extern void sun3x_gettod (int *yearp, int *monp, int *dayp,
                   int *hourp, int *minp, int *secp);
extern int sun3x_hwclk(int set, struct hwclk_time *t);
unsigned long sun3x_gettimeoffset (void);
void sun3x_sched_init(void (*vector)(int, void *, struct pt_regs *));

struct mostek_dt {
	volatile unsigned char csr;
	volatile unsigned char sec;
	volatile unsigned char min;
	volatile unsigned char hour;
	volatile unsigned char wday;
	volatile unsigned char mday;
	volatile unsigned char month;
	volatile unsigned char year;
};

#endif
/* Prom access routines for the sun3x */

#include <linux/types.h>
#include <linux/kernel.h>
#include <linux/tty.h>
#include <linux/console.h>
#include <linux/init.h>
#include <linux/mm.h>
#include <linux/string.h>

#include <asm/page.h>
#include <asm/pgtable.h>
#include <asm/bootinfo.h>
#include <asm/setup.h>
#include <asm/traps.h>
#include <asm/sun3xprom.h>
#include <asm/idprom.h>
#include <asm/segment.h>
#include <asm/sun3ints.h>
#include <asm/openprom.h>
#include <asm/machines.h>

void (*sun3x_putchar)(int);
int (*sun3x_getchar)(void);
int (*sun3x_mayget)(void);
int (*sun3x_mayput)(int);
void (*sun3x_prom_reboot)(void);
e_vector sun3x_prom_abort;
struct idprom *idprom;
static struct idprom idprom_buffer;
struct linux_romvec *romvec;

/* prom vector table */
e_vector *sun3x_prom_vbr;

extern e_vector vectors[256];  /* arch/m68k/kernel/traps.c */

/* Handle returning to the prom */
void sun3x_halt(void)
{
    unsigned long flags;
    
    /* Disable interrupts while we mess with things */
    save_flags(flags); cli();

    /* Restore prom vbr */
    __asm__ volatile ("movec %0,%%vbr" : : "r" ((void*)sun3x_prom_vbr));

    /* Restore prom NMI clock */
//    sun3x_disable_intreg(5);
    sun3_enable_irq(7);

    /* Let 'er rip */
    __asm__ volatile ("trap #14" : : );

    /* Restore everything */
    sun3_disable_irq(7);
    sun3_enable_irq(5);

    __asm__ volatile ("movec %0,%%vbr" : : "r" ((void*)vectors));
    restore_flags(flags);
}

void sun3x_reboot(void)
{
    /* This never returns, don't bother saving things */
    cli();

    /* Restore prom vbr */
    __asm__ volatile ("movec %0,%%vbr" : : "r" ((void*)sun3x_prom_vbr));

    /* Restore prom NMI clock */
    sun3_disable_irq(5);
    sun3_enable_irq(7);

    /* Let 'er rip */
    (*romvec->pv_reboot)("vmlinux");
}

extern char m68k_debug_device[];

static void sun3x_prom_write(struct console *co, const char *s,
                             unsigned int count)
{
    while (count--) {
        if (*s == '\n')
            sun3x_putchar('\r');
        sun3x_putchar(*s++);
    }
}

/* debug console - write-only */

static struct console sun3x_debug = {
	"debug",
	sun3x_prom_write,  	/* write */
	NULL,			/* read */
	NULL,			/* device */
	NULL,			/* wait_key */
	NULL,			/* unblank */
	NULL,			/* setup */
	CON_PRINTBUFFER,
	-1,
	0,
	NULL
};

void sun3x_prom_init(void)
{
    /* Read the vector table */
	int i;


    sun3x_putchar = *(void (**)(int)) (SUN3X_P_PUTCHAR);
    sun3x_getchar = *(int (**)(void)) (SUN3X_P_GETCHAR);
    sun3x_mayget = *(int (**)(void))  (SUN3X_P_MAYGET);
    sun3x_mayput = *(int (**)(int))   (SUN3X_P_MAYPUT);
    sun3x_prom_reboot = *(void (**)(void)) (SUN3X_P_REBOOT);
    sun3x_prom_abort = *(e_vector *)  (SUN3X_P_ABORT);
    romvec = (struct linux_romvec *)SUN3X_PROM_BASE;

    /* make a copy of the idprom structure */
    for(i = 0; i < sizeof(struct idprom); i++) 
	    ((unsigned char *)(&idprom_buffer))[i] = ((unsigned char *)SUN3X_IDPROM)[i];
    idprom = &idprom_buffer;

    if((idprom->id_machtype & SM_ARCH_MASK) != SM_SUN3X) {
	    printk("Warning: machine reports strange type %02x\n");
	    printk("Pretending it's a 3/80, but very afraid...\n");
	    idprom->id_machtype = SM_SUN3X | SM_3_80;
    }

    /* point trap #14 at abort.
     * XXX this is futile since we restore the vbr first - oops
     */
    vectors[VEC_TRAP14] = sun3x_prom_abort;
    
    /* If debug=prom was specified, start the debug console */

    if (!strcmp(m68k_debug_device, "prom"))
        register_console(&sun3x_debug);

    
}

/* some prom functions to export */
int prom_getintdefault(int node, char *property, int deflt)
{
	return deflt;
}

int prom_getbool (int node, char *prop)
{
	return 1;
}

void prom_printf(char *fmt, ...)
{

}

void prom_halt (void)
{
	sun3x_halt();
}
#include <linux/module.h>
#include <linux/types.h>
#include <asm/dvma.h>
#include <asm/idprom.h>

/*
 * Add things here when you find the need for it.
 */
EXPORT_SYMBOL(dvma_map_align);
EXPORT_SYMBOL(dvma_unmap);
EXPORT_SYMBOL(dvma_malloc_align);
EXPORT_SYMBOL(dvma_free);
EXPORT_SYMBOL(idprom);
#
# Makefile for the linux kernel.
#
# Note! Dependencies are done automagically by 'make dep', which also
# removes any old dependencies. DON'T put your own dependencies here
# unless it's something special (ie not a .c file).
#
# Note 2! The CFLAGS definitions are now in the main makefile...

.S.o:
	$(CC) $(EXTRA_CFLAGS) $(AFLAGS) -traditional -c $< -o $*.o

#EXTRA_CFLAGS=-DFPU_EMU_DEBUG

O_TARGET := mathemu.o

obj-y		:= fp_entry.o fp_scan.o fp_util.o fp_move.o fp_movem.o \
			fp_cond.o fp_arith.o fp_log.o fp_trig.o

include $(TOPDIR)/Rules.make
/*

   fp_arith.c: floating-point math routines for the Linux-m68k
   floating point emulator.

   Copyright (c) 1998-1999 David Huggins-Daines.

   Somewhat based on the AlphaLinux floating point emulator, by David
   Mosberger-Tang.

   You may copy, modify, and redistribute this file under the terms of
   the GNU General Public License, version 2, or any later version, at
   your convenience.
 */

#include "fp_emu.h"
#include "multi_arith.h"
#include "fp_arith.h"

const struct fp_ext fp_QNaN =
{
	0, 0, 0x7fff, { ~0 }
};

const struct fp_ext fp_Inf =
{
	0, 0, 0x7fff, { 0 }
};

/* let's start with the easy ones */

struct fp_ext *
fp_fabs(struct fp_ext *dest, struct fp_ext *src)
{
	dprint(PINSTR, "fabs\n");

	fp_monadic_check(dest, src);

	dest->sign = 0;

	return dest;
}

struct fp_ext *
fp_fneg(struct fp_ext *dest, struct fp_ext *src)
{
	dprint(PINSTR, "fneg\n");

	fp_monadic_check(dest, src);

	dest->sign = !dest->sign;

	return dest;
}

/* Now, the slightly harder ones */

/* fp_fadd: Implements the kernel of the FADD, FSADD, FDADD, FSUB,
   FDSUB, and FCMP instructions. */

struct fp_ext *
fp_fadd(struct fp_ext *dest, struct fp_ext *src)
{
	int diff;

	dprint(PINSTR, "fadd\n");

	fp_dyadic_check(dest, src);

	if (IS_INF(dest)) {
		/* infinity - infinity == NaN */
		if (IS_INF(src) && (src->sign != dest->sign))
			fp_set_nan(dest);
		return dest;
	}
	if (IS_INF(src)) {
		fp_copy_ext(dest, src);
		return dest;
	}

	if (IS_ZERO(dest)) {
		if (IS_ZERO(src)) {
			if (src->sign != dest->sign) {
				if (FPDATA->rnd == FPCR_ROUND_RM)
					dest->sign = 1;
				else
					dest->sign = 0;
			}
		} else
			fp_copy_ext(dest, src);
		return dest;
	}

	dest->lowmant = src->lowmant = 0;

	if ((diff = dest->exp - src->exp) > 0)
		fp_denormalize(src, diff);
	else if ((diff = -diff) > 0)
		fp_denormalize(dest, diff);

	if (dest->sign == src->sign) {
		if (fp_addmant(dest, src))
			if (!fp_addcarry(dest))
				return dest;
	} else {
		if (dest->mant.m64 < src->mant.m64) {
			fp_submant(dest, src, dest);
			dest->sign = !dest->sign;
		} else
			fp_submant(dest, dest, src);
	}

	return dest;
}

/* fp_fsub: Implementes the kernel of the FSUB, FSSUB, and FDSUB
   instructions.

   Remember that the arguments are in assembler-syntax order! */

struct fp_ext *
fp_fsub(struct fp_ext *dest, struct fp_ext *src)
{
	dprint(PINSTR, "fsub ");

	src->sign = !src->sign;
	return fp_fadd(dest, src);
}


struct fp_ext *
fp_fcmp(struct fp_ext *dest, struct fp_ext *src)
{
	dprint(PINSTR, "fcmp ");

	FPDATA->temp[1] = *dest;
	src->sign = !src->sign;
	return fp_fadd(&FPDATA->temp[1], src);
}

struct fp_ext *
fp_ftst(struct fp_ext *dest, struct fp_ext *src)
{
	dprint(PINSTR, "ftst\n");

	(void)dest;

	return src;
}

struct fp_ext *
fp_fmul(struct fp_ext *dest, struct fp_ext *src)
{
	union fp_mant128 temp;
	int exp;

	dprint(PINSTR, "fmul\n");

	fp_dyadic_check(dest, src);

	/* calculate the correct sign now, as it's necessary for infinities */
	dest->sign = src->sign ^ dest->sign;

	/* Handle infinities */
	if (IS_INF(dest)) {
		if (IS_ZERO(src))
			fp_set_nan(dest);
		return dest;
	}
	if (IS_INF(src)) {
		if (IS_ZERO(dest))
			fp_set_nan(dest);
		else
			fp_copy_ext(dest, src);
		return dest;
	}

	/* Of course, as we all know, zero * anything = zero.  You may
	   not have known that it might be a positive or negative
	   zero... */
	if (IS_ZERO(dest) || IS_ZERO(src)) {
		dest->exp = 0;
		dest->mant.m64 = 0;
		dest->lowmant = 0;

		return dest;
	}

	exp = dest->exp + src->exp - 0x3ffe;

	/* shift up the mantissa for denormalized numbers,
	   so that the highest bit is set, this makes the
	   shift of the result below easier */
	if ((long)dest->mant.m32[0] >= 0)
		exp -= fp_overnormalize(dest);
	if ((long)src->mant.m32[0] >= 0)
		exp -= fp_overnormalize(src);

	/* now, do a 64-bit multiply with expansion */
	fp_multiplymant(&temp, dest, src);

	/* normalize it back to 64 bits and stuff it back into the
	   destination struct */
	if ((long)temp.m32[0] > 0) {
		exp--;
		fp_putmant128(dest, &temp, 1);
	} else
		fp_putmant128(dest, &temp, 0);

	if (exp >= 0x7fff) {
		fp_set_ovrflw(dest);
		return dest;
	}
	dest->exp = exp;
	if (exp < 0) {
		fp_set_sr(FPSR_EXC_UNFL);
		fp_denormalize(dest, -exp);
	}

	return dest;
}

/* fp_fdiv: Implements the "kernel" of the FDIV, FSDIV, FDDIV and
   FSGLDIV instructions.

   Note that the order of the operands is counter-intuitive: instead
   of src / dest, the result is actually dest / src. */

struct fp_ext *
fp_fdiv(struct fp_ext *dest, struct fp_ext *src)
{
	union fp_mant128 temp;
	int exp;

	dprint(PINSTR, "fdiv\n");

	fp_dyadic_check(dest, src);

	/* calculate the correct sign now, as it's necessary for infinities */
	dest->sign = src->sign ^ dest->sign;

	/* Handle infinities */
	if (IS_INF(dest)) {
		/* infinity / infinity = NaN (quiet, as always) */
		if (IS_INF(src))
			fp_set_nan(dest);
		/* infinity / anything else = infinity (with approprate sign) */
		return dest;
	}
	if (IS_INF(src)) {
		/* anything / infinity = zero (with appropriate sign) */
		dest->exp = 0;
		dest->mant.m64 = 0;
		dest->lowmant = 0;

		return dest;
	}

	/* zeroes */
	if (IS_ZERO(dest)) {
		/* zero / zero = NaN */
		if (IS_ZERO(src))
			fp_set_nan(dest);
		/* zero / anything else = zero */
		return dest;
	}
	if (IS_ZERO(src)) {
		/* anything / zero = infinity (with appropriate sign) */
		fp_set_sr(FPSR_EXC_DZ);
		dest->exp = 0x7fff;
		dest->mant.m64 = 0;

		return dest;
	}

	exp = dest->exp - src->exp + 0x3fff;

	/* shift up the mantissa for denormalized numbers,
	   so that the highest bit is set, this makes lots
	   of things below easier */
	if ((long)dest->mant.m32[0] >= 0)
		exp -= fp_overnormalize(dest);
	if ((long)src->mant.m32[0] >= 0)
		exp -= fp_overnormalize(src);

	/* now, do the 64-bit divide */
	fp_dividemant(&temp, dest, src);

	/* normalize it back to 64 bits and stuff it back into the
	   destination struct */
	if (!temp.m32[0]) {
		exp--;
		fp_putmant128(dest, &temp, 32);
	} else
		fp_putmant128(dest, &temp, 31);

	if (exp >= 0x7fff) {
		fp_set_ovrflw(dest);
		return dest;
	}
	dest->exp = exp;
	if (exp < 0) {
		fp_set_sr(FPSR_EXC_UNFL);
		fp_denormalize(dest, -exp);
	}

	return dest;
}

struct fp_ext *
fp_fsglmul(struct fp_ext *dest, struct fp_ext *src)
{
	int exp;

	dprint(PINSTR, "fsglmul\n");

	fp_dyadic_check(dest, src);

	/* calculate the correct sign now, as it's necessary for infinities */
	dest->sign = src->sign ^ dest->sign;

	/* Handle infinities */
	if (IS_INF(dest)) {
		if (IS_ZERO(src))
			fp_set_nan(dest);
		return dest;
	}
	if (IS_INF(src)) {
		if (IS_ZERO(dest))
			fp_set_nan(dest);
		else
			fp_copy_ext(dest, src);
		return dest;
	}

	/* Of course, as we all know, zero * anything = zero.  You may
	   not have known that it might be a positive or negative
	   zero... */
	if (IS_ZERO(dest) || IS_ZERO(src)) {
		dest->exp = 0;
		dest->mant.m64 = 0;
		dest->lowmant = 0;

		return dest;
	}

	exp = dest->exp + src->exp - 0x3ffe;

	/* do a 32-bit multiply */
	fp_mul64(dest->mant.m32[0], dest->mant.m32[1],
		 dest->mant.m32[0] & 0xffffff00,
		 src->mant.m32[0] & 0xffffff00);

	if (exp >= 0x7fff) {
		fp_set_ovrflw(dest);
		return dest;
	}
	dest->exp = exp;
	if (exp < 0) {
		fp_set_sr(FPSR_EXC_UNFL);
		fp_denormalize(dest, -exp);
	}

	return dest;
}

struct fp_ext *
fp_fsgldiv(struct fp_ext *dest, struct fp_ext *src)
{
	int exp;
	unsigned long quot, rem;

	dprint(PINSTR, "fsgldiv\n");

	fp_dyadic_check(dest, src);

	/* calculate the correct sign now, as it's necessary for infinities */
	dest->sign = src->sign ^ dest->sign;

	/* Handle infinities */
	if (IS_INF(dest)) {
		/* infinity / infinity = NaN (quiet, as always) */
		if (IS_INF(src))
			fp_set_nan(dest);
		/* infinity / anything else = infinity (with approprate sign) */
		return dest;
	}
	if (IS_INF(src)) {
		/* anything / infinity = zero (with appropriate sign) */
		dest->exp = 0;
		dest->mant.m64 = 0;
		dest->lowmant = 0;

		return dest;
	}

	/* zeroes */
	if (IS_ZERO(dest)) {
		/* zero / zero = NaN */
		if (IS_ZERO(src))
			fp_set_nan(dest);
		/* zero / anything else = zero */
		return dest;
	}
	if (IS_ZERO(src)) {
		/* anything / zero = infinity (with appropriate sign) */
		fp_set_sr(FPSR_EXC_DZ);
		dest->exp = 0x7fff;
		dest->mant.m64 = 0;

		return dest;
	}

	exp = dest->exp - src->exp + 0x3fff;

	dest->mant.m32[0] &= 0xffffff00;
	src->mant.m32[0] &= 0xffffff00;

	/* do the 32-bit divide */
	if (dest->mant.m32[0] >= src->mant.m32[0]) {
		fp_sub64(dest->mant, src->mant);
		fp_div64(quot, rem, dest->mant.m32[0], 0, src->mant.m32[0]);
		dest->mant.m32[0] = 0x80000000 | (quot >> 1);
		dest->mant.m32[1] = (quot & 1) | rem;	/* only for rounding */
	} else {
		fp_div64(quot, rem, dest->mant.m32[0], 0, src->mant.m32[0]);
		dest->mant.m32[0] = quot;
		dest->mant.m32[1] = rem;		/* only for rounding */
		exp--;
	}

	if (exp >= 0x7fff) {
		fp_set_ovrflw(dest);
		return dest;
	}
	dest->exp = exp;
	if (exp < 0) {
		fp_set_sr(FPSR_EXC_UNFL);
		fp_denormalize(dest, -exp);
	}

	return dest;
}

/* fp_roundint: Internal rounding function for use by several of these
   emulated instructions.

   This one rounds off the fractional part using the rounding mode
   specified. */

static void fp_roundint(struct fp_ext *dest, int mode)
{
	union fp_mant64 oldmant;
	unsigned long mask;

	if (!fp_normalize_ext(dest))
		return;

	/* infinities and zeroes */
	if (IS_INF(dest) || IS_ZERO(dest)) 
		return;

	/* first truncate the lower bits */
	oldmant = dest->mant;
	switch (dest->exp) {
	case 0 ... 0x3ffe:
		dest->mant.m64 = 0;
		break;
	case 0x3fff ... 0x401e:
		dest->mant.m32[0] &= 0xffffffffU << (0x401e - dest->exp);
		dest->mant.m32[1] = 0;
		if (oldmant.m64 == dest->mant.m64)
			return;
		break;
	case 0x401f ... 0x403e:
		dest->mant.m32[1] &= 0xffffffffU << (0x403e - dest->exp);
		if (oldmant.m32[1] == dest->mant.m32[1])
			return;
		break;
	default:
		return;
	}
	fp_set_sr(FPSR_EXC_INEX2);

	/* We might want to normalize upwards here... however, since
	   we know that this is only called on the output of fp_fdiv,
	   or with the input to fp_fint or fp_fintrz, and the inputs
	   to all these functions are either normal or denormalized
	   (no subnormals allowed!), there's really no need.

	   In the case of fp_fdiv, observe that 0x80000000 / 0xffff =
	   0xffff8000, and the same holds for 128-bit / 64-bit. (i.e. the
	   smallest possible normal dividend and the largest possible normal
	   divisor will still produce a normal quotient, therefore, (normal
	   << 64) / normal is normal in all cases) */

	switch (mode) {
	case FPCR_ROUND_RN:
		switch (dest->exp) {
		case 0 ... 0x3ffd:
			return;
		case 0x3ffe:
			/* As noted above, the input is always normal, so the
			   guard bit (bit 63) is always set.  therefore, the
			   only case in which we will NOT round to 1.0 is when
			   the input is exactly 0.5. */
			if (oldmant.m64 == (1ULL << 63))
				return;
			break;
		case 0x3fff ... 0x401d:
			mask = 1 << (0x401d - dest->exp);
			if (!(oldmant.m32[0] & mask))
				return;
			if (oldmant.m32[0] & (mask << 1))
				break;
			if (!(oldmant.m32[0] << (dest->exp - 0x3ffd)) &&
					!oldmant.m32[1])
				return;
			break;
		case 0x401e:
			if (!(oldmant.m32[1] >= 0))
				return;
			if (oldmant.m32[0] & 1)
				break;
			if (!(oldmant.m32[1] << 1))
				return;
			break;
		case 0x401f ... 0x403d:
			mask = 1 << (0x403d - dest->exp);
			if (!(oldmant.m32[1] & mask))
				return;
			if (oldmant.m32[1] & (mask << 1))
				break;
			if (!(oldmant.m32[1] << (dest->exp - 0x401d)))
				return;
			break;
		default:
			return;
		}
		break;
	case FPCR_ROUND_RZ:
		return;
	default:
		if (dest->sign ^ (mode - FPCR_ROUND_RM))
			break;
		return;
	}

	switch (dest->exp) {
	case 0 ... 0x3ffe:
		dest->exp = 0x3fff;
		dest->mant.m64 = 1ULL << 63;
		break;
	case 0x3fff ... 0x401e:
		mask = 1 << (0x401e - dest->exp);
		if (dest->mant.m32[0] += mask)
			break;
		dest->mant.m32[0] = 0x80000000;
		dest->exp++;
		break;
	case 0x401f ... 0x403e:
		mask = 1 << (0x403e - dest->exp);
		if (dest->mant.m32[1] += mask)
			break;
		if (dest->mant.m32[0] += 1)
                        break;
		dest->mant.m32[0] = 0x80000000;
                dest->exp++;
		break;
	}
}

/* modrem_kernel: Implementation of the FREM and FMOD instructions
   (which are exactly the same, except for the rounding used on the
   intermediate value) */

static struct fp_ext *
modrem_kernel(struct fp_ext *dest, struct fp_ext *src, int mode)
{
	struct fp_ext tmp;

	fp_dyadic_check(dest, src);

	/* Infinities and zeros */
	if (IS_INF(dest) || IS_ZERO(src)) {
		fp_set_nan(dest);
		return dest;
	}
	if (IS_ZERO(dest) || IS_INF(src))
		return dest;

	/* FIXME: there is almost certainly a smarter way to do this */
	fp_copy_ext(&tmp, dest);
	fp_fdiv(&tmp, src);		/* NOTE: src might be modified */
	fp_roundint(&tmp, mode);
	fp_fmul(&tmp, src);
	fp_fsub(dest, &tmp);

	/* set the quotient byte */
	fp_set_quotient((dest->mant.m64 & 0x7f) | (dest->sign << 7));
	return dest;
}

/* fp_fmod: Implements the kernel of the FMOD instruction.

   Again, the argument order is backwards.  The result, as defined in
   the Motorola manuals, is:

   fmod(src,dest) = (dest - (src * floor(dest / src))) */

struct fp_ext *
fp_fmod(struct fp_ext *dest, struct fp_ext *src)
{
	dprint(PINSTR, "fmod\n");
	return modrem_kernel(dest, src, FPCR_ROUND_RZ);
}

/* fp_frem: Implements the kernel of the FREM instruction.

   frem(src,dest) = (dest - (src * round(dest / src)))
 */

struct fp_ext *
fp_frem(struct fp_ext *dest, struct fp_ext *src)
{
	dprint(PINSTR, "frem\n");
	return modrem_kernel(dest, src, FPCR_ROUND_RN);
}

struct fp_ext *
fp_fint(struct fp_ext *dest, struct fp_ext *src)
{
	dprint(PINSTR, "fint\n");

	fp_copy_ext(dest, src);

	fp_roundint(dest, FPDATA->rnd);

	return dest;
}

struct fp_ext *
fp_fintrz(struct fp_ext *dest, struct fp_ext *src)
{
	dprint(PINSTR, "fintrz\n");

	fp_copy_ext(dest, src);

	fp_roundint(dest, FPCR_ROUND_RZ);

	return dest;
}

struct fp_ext *
fp_fscale(struct fp_ext *dest, struct fp_ext *src)
{
	int scale, oldround;

	dprint(PINSTR, "fscale\n");

	fp_dyadic_check(dest, src);

	/* Infinities */
	if (IS_INF(src)) {
		fp_set_nan(dest);
		return dest;
	}
	if (IS_INF(dest))
		return dest;

	/* zeroes */
	if (IS_ZERO(src) || IS_ZERO(dest))
		return dest;

	/* Source exponent out of range */
	if (src->exp >= 0x400c) {
		fp_set_ovrflw(dest);
		return dest;
	}

	/* src must be rounded with round to zero. */
	oldround = FPDATA->rnd;
	FPDATA->rnd = FPCR_ROUND_RZ;
	scale = fp_conv_ext2long(src);
	FPDATA->rnd = oldround;

	/* new exponent */
	scale += dest->exp;

	if (scale >= 0x7fff) {
		fp_set_ovrflw(dest);
	} else if (scale <= 0) {
		fp_set_sr(FPSR_EXC_UNFL);
		fp_denormalize(dest, -scale);
	} else
		dest->exp = scale;

	return dest;
}

/*

   fp_arith.h: floating-point math routines for the Linux-m68k
   floating point emulator.

   Copyright (c) 1998 David Huggins-Daines.

   Somewhat based on the AlphaLinux floating point emulator, by David
   Mosberger-Tang.

   You may copy, modify, and redistribute this file under the terms of
   the GNU General Public License, version 2, or any later version, at
   your convenience.

 */

#ifndef FP_ARITH_H
#define FP_ARITH_H

/* easy ones */
struct fp_ext *
fp_fabs(struct fp_ext *dest, struct fp_ext *src);
struct fp_ext *
fp_fneg(struct fp_ext *dest, struct fp_ext *src);

/* straightforward arithmetic */
struct fp_ext *
fp_fadd(struct fp_ext *dest, struct fp_ext *src);
struct fp_ext *
fp_fsub(struct fp_ext *dest, struct fp_ext *src);
struct fp_ext *
fp_fcmp(struct fp_ext *dest, struct fp_ext *src);
struct fp_ext *
fp_ftst(struct fp_ext *dest, struct fp_ext *src);
struct fp_ext *
fp_fmul(struct fp_ext *dest, struct fp_ext *src);
struct fp_ext *
fp_fdiv(struct fp_ext *dest, struct fp_ext *src);

/* ones that do rounding and integer conversions */
struct fp_ext *
fp_fmod(struct fp_ext *dest, struct fp_ext *src);
struct fp_ext *
fp_frem(struct fp_ext *dest, struct fp_ext *src);
struct fp_ext *
fp_fint(struct fp_ext *dest, struct fp_ext *src);
struct fp_ext *
fp_fintrz(struct fp_ext *dest, struct fp_ext *src);
struct fp_ext *
fp_fscale(struct fp_ext *dest, struct fp_ext *src);

#endif	/* FP_ARITH__H */
/*
 * fp_cond.S
 *
 * Copyright Roman Zippel, 1997.  All rights reserved.
 *
 * Redistribution and use in source and binary forms, with or without
 * modification, are permitted provided that the following conditions
 * are met:
 * 1. Redistributions of source code must retain the above copyright
 *    notice, and the entire permission notice in its entirety,
 *    including the disclaimer of warranties.
 * 2. Redistributions in binary form must reproduce the above copyright
 *    notice, this list of conditions and the following disclaimer in the
 *    documentation and/or other materials provided with the distribution.
 * 3. The name of the author may not be used to endorse or promote
 *    products derived from this software without specific prior
 *    written permission.
 *
 * ALTERNATIVELY, this product may be distributed under the terms of
 * the GNU General Public License, in which case the provisions of the GPL are
 * required INSTEAD OF the above restrictions.  (This clause is
 * necessary due to a potential bad interaction between the GPL and
 * the restrictions contained in a BSD-style copyright.)
 *
 * THIS SOFTWARE IS PROVIDED ``AS IS'' AND ANY EXPRESS OR IMPLIED
 * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
 * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
 * DISCLAIMED.  IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT,
 * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
 * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
 * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
 * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
 * OF THE POSSIBILITY OF SUCH DAMAGE.
 */

#include "fp_emu.h"
#include "fp_decode.h"

	.globl	fp_fscc, fp_fbccw, fp_fbccl

#ifdef FPU_EMU_DEBUG
fp_fnop:
	printf	PDECODE,"fnop\n"
	jra	fp_end
#else
#define fp_fnop fp_end
#endif

fp_fbccw:
	tst.w	%d2
	jeq	fp_fnop
	printf	PDECODE,"fbccw "
	fp_get_pc %a0
	lea	(-2,%a0,%d2.w),%a0
	jra	1f

fp_fbccl:
	printf	PDECODE,"fbccl "
	fp_get_pc %a0
	move.l	%d2,%d0
	swap	%d0
	fp_get_instr_word %d0,fp_err_ua1
	lea	(-2,%a0,%d0.l),%a0
1:	printf	PDECODE,"%x",1,%a0
	move.l	%d2,%d0
	swap	%d0
	jsr	fp_compute_cond
	tst.l	%d0
	jeq	1f
	fp_put_pc %a0,1
1:	printf	PDECODE,"\n"
	jra	fp_end

fp_fdbcc:
	printf	PDECODE,"fdbcc "
	fp_get_pc %a1				| calculate new pc
	fp_get_instr_word %d0,fp_err_ua1
	add.w	%d0,%a1
	fp_decode_addr_reg
	printf	PDECODE,"d%d,%x\n",2,%d0,%a1
	swap	%d1				| test condition in %d1
	tst.w	%d1
	jne	2f
	move.l	%d0,%d1
	jsr	fp_get_data_reg
	subq.w	#1,%d0
	jcs	1f
	fp_put_pc %a1,1
1:	jsr	fp_put_data_reg
2:	jra	fp_end

| set flags for decode macros for fs<cc>
do_fscc=1
do_no_pc_mode=1

fp_fscc:
	printf	PDECODE,"fscc "
	move.l	%d2,%d0
	jsr	fp_compute_cond
	move.w	%d0,%d1
	swap	%d1

	| decode addressing mode
	fp_decode_addr_mode

	.long 	fp_data, fp_fdbcc
	.long 	fp_indirect, fp_postinc
	.long 	fp_predecr, fp_disp16
	.long 	fp_extmode0, fp_extmode1

	| addressing mode: data register direct
fp_data:
	fp_mode_data_direct
	move.w	%d0,%d1			| save register nr
	jsr	fp_get_data_reg
	swap	%d1
	move.b	%d1,%d0
	swap	%d1
	jsr	fp_put_data_reg
	printf	PDECODE,"\n"
	jra	fp_end

fp_indirect:
	fp_mode_addr_indirect
	jra	fp_do_scc

fp_postinc:
	fp_mode_addr_indirect_postinc
	jra	fp_do_scc

fp_predecr:
	fp_mode_addr_indirect_predec
	jra	fp_do_scc

fp_disp16:
	fp_mode_addr_indirect_disp16
	jra	fp_do_scc

fp_extmode0:
	fp_mode_addr_indirect_extmode0
	jra	fp_do_scc

fp_extmode1:
	bfextu	%d2{#13,#3},%d0
	jmp	([0f:w,%pc,%d0*4])

	.align	4
0:
	.long	fp_absolute_short, fp_absolute_long
	.long	fp_ill, fp_ill		| NOTE: jump here to ftrap.x
	.long	fp_ill, fp_ill
	.long	fp_ill, fp_ill

fp_absolute_short:
	fp_mode_abs_short
	jra	fp_do_scc

fp_absolute_long:
	fp_mode_abs_long
|	jra	fp_do_scc

fp_do_scc:
	swap	%d1
	putuser.b %d1,(%a0),fp_err_ua1,%a0
	printf	PDECODE,"\n"
	jra	fp_end


#define tst_NAN	btst #24,%d1
#define tst_Z	btst #26,%d1
#define tst_N	btst #27,%d1

fp_compute_cond:
	move.l	(FPD_FPSR,FPDATA),%d1
	btst	#4,%d0
	jeq	1f
	tst_NAN
	jeq	1f
	bset	#15,%d1
	bset	#7,%d1
	move.l	%d1,(FPD_FPSR,FPDATA)
1:	and.w	#0xf,%d0
	jmp	([0f:w,%pc,%d0.w*4])

	.align	4
0:
	.long	fp_f  , fp_eq , fp_ogt, fp_oge
	.long	fp_olt, fp_ole, fp_ogl, fp_or
	.long	fp_un , fp_ueq, fp_ugt, fp_uge
	.long	fp_ult, fp_ule, fp_ne , fp_t

fp_f:
	moveq	#0,%d0
	rts

fp_eq:
	moveq	#0,%d0
	tst_Z
	jeq	1f
	moveq	#-1,%d0
1:	rts

fp_ogt:
	moveq	#0,%d0
	tst_NAN
	jne	1f
	tst_Z
	jne	1f
	tst_N
	jne	1f
	moveq	#-1,%d0
1:	rts

fp_oge:
	moveq	#-1,%d0
	tst_Z
	jne	2f
	tst_NAN
	jne	1f
	tst_N
	jeq	2f
1:	moveq	#0,%d0
2:	rts

fp_olt:
	moveq	#0,%d0
	tst_NAN
	jne	1f
	tst_Z
	jne	1f
	tst_N
	jeq	1f
	moveq	#-1,%d0
1:	rts

fp_ole:
	moveq	#-1,%d0
	tst_Z
	jne	2f
	tst_NAN
	jne	1f
	tst_N
	jne	2f
1:	moveq	#0,%d0
2:	rts

fp_ogl:
	moveq	#0,%d0
	tst_NAN
	jne	1f
	tst_Z
	jne	1f
	moveq	#-1,%d0
1:	rts

fp_or:
	moveq	#0,%d0
	tst_NAN
	jne	1f
	moveq	#-1,%d0
1:	rts

fp_un:
	moveq	#0,%d0
	tst_NAN
	jeq	1f
	moveq	#-1,%d0
	rts

fp_ueq:
	moveq	#-1,%d0
	tst_NAN
	jne	1f
	tst_Z
	jne	1f
	moveq	#0,%d0
1:	rts

fp_ugt:
	moveq	#-1,%d0
	tst_NAN
	jne	2f
	tst_N
	jne	1f
	tst_Z
	jeq	2f
1:	moveq	#0,%d0
2:	rts

fp_uge:
	moveq	#-1,%d0
	tst_NAN
	jne	1f
	tst_Z
	jne	1f
	tst_N
	jeq	1f
	moveq	#0,%d0
1:	rts

fp_ult:
	moveq	#-1,%d0
	tst_NAN
	jne	2f
	tst_Z
	jne	1f
	tst_N
	jne	2f
1:	moveq	#0,%d0
2:	rts

fp_ule:
	moveq	#-1,%d0
	tst_NAN
	jne	1f
	tst_Z
	jne	1f
	tst_N
	jne	1f
	moveq	#0,%d0
1:	rts

fp_ne:
	moveq	#0,%d0
	tst_Z
	jne	1f
	moveq	#-1,%d0
1:	rts

fp_t:
	moveq	#-1,%d0
	rts
/*
 * fp_decode.h
 *
 * Copyright Roman Zippel, 1997.  All rights reserved.
 *
 * Redistribution and use in source and binary forms, with or without
 * modification, are permitted provided that the following conditions
 * are met:
 * 1. Redistributions of source code must retain the above copyright
 *    notice, and the entire permission notice in its entirety,
 *    including the disclaimer of warranties.
 * 2. Redistributions in binary form must reproduce the above copyright
 *    notice, this list of conditions and the following disclaimer in the
 *    documentation and/or other materials provided with the distribution.
 * 3. The name of the author may not be used to endorse or promote
 *    products derived from this software without specific prior
 *    written permission.
 *
 * ALTERNATIVELY, this product may be distributed under the terms of
 * the GNU General Public License, in which case the provisions of the GPL are
 * required INSTEAD OF the above restrictions.  (This clause is
 * necessary due to a potential bad interaction between the GPL and
 * the restrictions contained in a BSD-style copyright.)
 *
 * THIS SOFTWARE IS PROVIDED ``AS IS'' AND ANY EXPRESS OR IMPLIED
 * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
 * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
 * DISCLAIMED.  IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT,
 * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
 * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
 * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
 * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
 * OF THE POSSIBILITY OF SUCH DAMAGE.
 */

#ifndef _FP_DECODE_H
#define _FP_DECODE_H

/* These macros do the dirty work of the instr decoding, several variables
 * can be defined in the source file to modify the work of these macros,
 * currently the following variables are used:
 * ...
 * The register usage:
 * d0 - will contain source operand for data direct mode,
 *	otherwise scratch register
 * d1 - upper 16bit are reserved for caller
 *	lower 16bit may contain further arguments,
 *	is destroyed during decoding
 * d2 - contains first two instruction words,
 *	first word will be used for extension word
 * a0 - will point to source/dest operand for any indirect mode
 *	otherwise scratch register
 * a1 - scratch register
 * a2 - base addr to the task structure
 *
 * the current implementation doesn't check for every disallowed
 * addressing mode (e.g. pc relative modes as destination), as long
 * as it only means a new addressing mode, which should not appear
 * in a program and that doesn't crash the emulation, I think it's
 * not a problem to allow these modes.
 */

do_fmovem=0
do_fmovem_cr=0
do_no_pc_mode=0
do_fscc=0

| first decoding of the instr type
| this seperates the conditional instr
.macro	fp_decode_cond_instr_type
	bfextu	%d2{#8,#2},%d0
	jmp	([0f:w,%pc,%d0*4])

	.align	4
0:
|	.long	"f<op>","fscc/fdbcc"
|	.long	"fbccw","fbccl"
.endm

| second decoding of the instr type
| this seperates most move instr
.macro	fp_decode_move_instr_type
	bfextu	%d2{#16,#3},%d0
	jmp	([0f:w,%pc,%d0*4])

	.align	4
0:
|	.long	"f<op> fpx,fpx","invalid instr"
|	.long	"f<op> <ea>,fpx","fmove fpx,<ea>"
|	.long	"fmovem <ea>,fpcr","fmovem <ea>,fpx"
|	.long	"fmovem fpcr,<ea>","fmovem fpx,<ea>"
.endm

| extract the source specifier, specifies
| either source fp register or data format
.macro	fp_decode_sourcespec
	bfextu	%d2{#19,#3},%d0
.endm

| decode destination format for fmove reg,ea
.macro	fp_decode_dest_format
	bfextu	%d2{#19,#3},%d0
.endm

| decode source register for fmove reg,ea
.macro	fp_decode_src_reg
	bfextu	%d2{#22,#3},%d0
.endm

| extract the addressing mode
| it depends on the instr which of the modes is valid
.macro	fp_decode_addr_mode
	bfextu	%d2{#10,#3},%d0
	jmp	([0f:w,%pc,%d0*4])

	.align	4
0:
|	.long	"data register direct","addr register direct"
|	.long	"addr register indirect"
|	.long	"addr register indirect postincrement"
|	.long	"addr register indirect predecrement"
|	.long	"addr register + index16"
|	.long	"extension mode1","extension mode2"
.endm

| extract the register for the addressing mode
.macro	fp_decode_addr_reg
	bfextu	%d2{#13,#3},%d0
.endm

| decode the 8bit diplacement from the brief extension word
.macro	fp_decode_disp8
	move.b	%d2,%d0
	ext.w	%d0
.endm

| decode the index of the brief/full extension word
.macro	fp_decode_index
	bfextu	%d2{#17,#3},%d0		| get the register nr
	btst	#15,%d2			| test for data/addr register
	jne	1\@f
	printf	PDECODE,"d%d",1,%d0
	jsr	fp_get_data_reg
	jra	2\@f
1\@:	printf	PDECODE,"a%d",1,%d0
	jsr	fp_get_addr_reg
	move.l	%a0,%d0
2\@:
debug	lea	"'l'.w,%a0"
	btst	#11,%d2			| 16/32 bit size?
	jne	3\@f
debug	lea	"'w'.w,%a0"
	ext.l	%d0
3\@:	printf	PDECODE,":%c",1,%a0
	move.w	%d2,%d1			| scale factor
	rol.w	#7,%d1
	and.w	#3,%d1
debug	move.l	"%d1,-(%sp)"
debug	ext.l	"%d1"
	printf	PDECODE,":%d",1,%d1
debug	move.l	"(%sp)+,%d1"
	lsl.l	%d1,%d0
.endm

| decode the base displacement size
.macro	fp_decode_basedisp
	bfextu	%d2{#26,#2},%d0
	jmp	([0f:w,%pc,%d0*4])

	.align	4
0:
|	.long	"reserved","null displacement"
|	.long	"word displacement","long displacement"
.endm

.macro	fp_decode_outerdisp
	bfextu	%d2{#30,#2},%d0
	jmp	([0f:w,%pc,%d0*4])

	.align	4
0:
|	.long	"no memory indirect action/reserved","null outer displacement"
|	.long	"word outer displacement","long outer displacement"
.endm

| get the extension word and test for brief or full extension type
.macro	fp_get_test_extword label
	fp_get_instr_word %d2,fp_err_ua1
	btst	#8,%d2
	jne	\label
.endm


| test if %pc is the base register for the indirect addr mode
.macro	fp_test_basereg_d16	label
	btst	#20,%d2
	jeq	\label
.endm

| test if %pc is the base register for one of the extended modes
.macro	fp_test_basereg_ext	label
	btst	#19,%d2
	jeq	\label
.endm

.macro	fp_test_suppr_index label
	btst	#6,%d2
	jne	\label
.endm


| addressing mode: data register direct
.macro	fp_mode_data_direct
	fp_decode_addr_reg
	printf	PDECODE,"d%d",1,%d0
.endm

| addressing mode: address register indirect
.macro	fp_mode_addr_indirect
	fp_decode_addr_reg
	printf	PDECODE,"(a%d)",1,%d0
	jsr	fp_get_addr_reg
.endm

| adjust stack for byte moves from/to stack
.macro	fp_test_sp_byte_move
	.if	!do_fmovem
	.if	do_fscc
	move.w	#6,%d1
	.endif
	cmp.w	#7,%d0
	jne	1\@f
	.if	!do_fscc
	cmp.w	#6,%d1
	jne	1\@f
	.endif
	move.w	#4,%d1
1\@:
	.endif
.endm

| addressing mode: address register indirect with postincrement
.macro	fp_mode_addr_indirect_postinc
	fp_decode_addr_reg
	printf	PDECODE,"(a%d)+",1,%d0
	fp_test_sp_byte_move
	jsr	fp_get_addr_reg
	move.l	%a0,%a1			| save addr
	.if	do_fmovem
	lea	(%a0,%d1.w*4),%a0
	.if	!do_fmovem_cr
	lea	(%a0,%d1.w*8),%a0
	.endif
	.else
	add.w	(fp_datasize,%d1.w*2),%a0
	.endif
	jsr	fp_put_addr_reg
	move.l	%a1,%a0
.endm

| addressing mode: address register indirect with predecrement
.macro	fp_mode_addr_indirect_predec
	fp_decode_addr_reg
	printf	PDECODE,"-(a%d)",1,%d0
	fp_test_sp_byte_move
	jsr	fp_get_addr_reg
	.if	do_fmovem
	.if	!do_fmovem_cr
	lea	(-12,%a0),%a1		| setup to addr of 1st reg to move
	neg.w	%d1
	lea	(%a0,%d1.w*4),%a0
	add.w	%d1,%d1
	lea	(%a0,%d1.w*4),%a0
	jsr	fp_put_addr_reg
	move.l	%a1,%a0
	.else
	neg.w	%d1
	lea	(%a0,%d1.w*4),%a0
	jsr	fp_put_addr_reg
	.endif
	.else
	sub.w	(fp_datasize,%d1.w*2),%a0
	jsr	fp_put_addr_reg
	.endif
.endm

| addressing mode: address register/programm counter indirect
|		   with 16bit displacement
.macro	fp_mode_addr_indirect_disp16
	.if	!do_no_pc_mode
	fp_test_basereg_d16 1f
	printf	PDECODE,"pc"
	fp_get_pc %a0
	jra	2f
	.endif
1:	fp_decode_addr_reg
	printf	PDECODE,"a%d",1,%d0
	jsr	fp_get_addr_reg
2:	fp_get_instr_word %a1,fp_err_ua1
	printf	PDECODE,"@(%x)",1,%a1
	add.l	%a1,%a0
.endm

| perform preindex (if I/IS == 0xx and xx != 00)
.macro	fp_do_preindex
	moveq	#3,%d0
	and.w	%d2,%d0
	jeq	1f
	btst	#2,%d2
	jne	1f
	printf	PDECODE,")@("
	getuser.l (%a1),%a1,fp_err_ua1,%a1
debug	jra	"2f"
1:	printf	PDECODE,","
2:
.endm

| perform postindex (if I/IS == 1xx)
.macro	fp_do_postindex
	btst	#2,%d2
	jeq	1f
	printf	PDECODE,")@("
	getuser.l (%a1),%a1,fp_err_ua1,%a1
debug	jra	"2f"
1:	printf	PDECODE,","
2:
.endm

| all other indirect addressing modes will finally end up here
.macro	fp_mode_addr_indirect_extmode0
	.if	!do_no_pc_mode
	fp_test_basereg_ext 1f
	printf	PDECODE,"pc"
	fp_get_pc %a0
	jra	2f
	.endif
1:	fp_decode_addr_reg
	printf	PDECODE,"a%d",1,%d0
	jsr	fp_get_addr_reg
2:	move.l	%a0,%a1
	swap	%d2
	fp_get_test_extword 3f
	| addressing mode: address register/programm counter indirect
	|		   with index and 8bit displacement
	fp_decode_disp8
debug	ext.l	"%d0"
	printf	PDECODE,"@(%x,",1,%d0
	add.w	%d0,%a1
	fp_decode_index
	add.l	%d0,%a1
	printf	PDECODE,")"
	jra	9f
3:	| addressing mode: address register/programm counter memory indirect
	|		   with base and/or outer displacement
	btst	#7,%d2			| base register suppressed?
	jeq	1f
	printf	PDECODE,"!"
	sub.l	%a1,%a1
1:	printf	PDECODE,"@("
	fp_decode_basedisp

	.long	fp_ill,1f
	.long	2f,3f

#ifdef FPU_EMU_DEBUG
1:	printf	PDECODE,"0"		| null base displacement
	jra	1f
#endif
2:	fp_get_instr_word %a0,fp_err_ua1 | 16bit base displacement
	printf	PDECODE,"%x:w",1,%a0
	jra	4f
3:	fp_get_instr_long %a0,fp_err_ua1 | 32bit base displacement
	printf	PDECODE,"%x:l",1,%a0
4:	add.l	%a0,%a1
1:
	fp_do_postindex
	fp_test_suppr_index 1f
	fp_decode_index
	add.l	%d0,%a1
1:	fp_do_preindex

	fp_decode_outerdisp

	.long	5f,1f
	.long	2f,3f

#ifdef FPU_EMU_DEBUG
1:	printf	PDECODE,"0"		| null outer displacement
	jra	1f
#endif
2:	fp_get_instr_word %a0,fp_err_ua1 | 16bit outer displacement
	printf	PDECODE,"%x:w",1,%a0
	jra	4f
3:	fp_get_instr_long %a0,fp_err_ua1 | 32bit outer displacement
	printf	PDECODE,"%x:l",1,%a0
4:	add.l	%a0,%a1
1:
5:	printf	PDECODE,")"
9:	move.l	%a1,%a0
	swap	%d2
.endm

| get the absolute short address from user space
.macro	fp_mode_abs_short
	fp_get_instr_word %a0,fp_err_ua1
	printf	PDECODE,"%x.w",1,%a0
.endm

| get the absolute long address from user space
.macro	fp_mode_abs_long
	fp_get_instr_long %a0,fp_err_ua1
	printf	PDECODE,"%x.l",1,%a0
.endm

#endif /* _FP_DECODE_H */
us_to_wid[0] = 0x8;
			bus_to_nid[0] = 0;
			masterwid = 0xa;
			bus_to_baddr[0] = 0xa100000000000000UL;
		} else if (partnum == XBOW_WIDGET_PART_NUM) {
			lboard_t *brd;
			klxbow_t *xbow_p;
			/*
			 * found xbow, so may have multiple bridges
			 * need to probe xbow
			 */
			printk("...is xbow\n");

			if ((brd = find_lboard((lboard_t *)KL_CONFIG_INFO(nasid),
                                   KLTYPE_MIDPLANE8)) == NULL)
				printk("argh\n");
			else
				printk("brd = 0x%lx\n", (unsigned long) brd);
			if ((xbow_p = (klxbow_t *)
			     find_component(brd, NULL, KLSTRUCT_XBOW)) == NULL)
				printk("argh\n");
			else {
			   /*
			    * Okay, here's a xbow. Lets arbitrate and find
			    * out if we should initialize it. Set enabled 
			    * hub connected at highest or lowest widget as 
			    * master.
			    */
#ifdef WIDGET_A
			   i = HUB_WIDGET_ID_MAX + 1;
			   do {
				i--;
			   } while ((!XBOW_PORT_TYPE_HUB(xbow_p, i)) ||
					(!XBOW_PORT_IS_ENABLED(xbow_p, i)));
#else
			   i = HUB_WIDGET_ID_MIN - 1;
			   do {
				i++;
			   } while ((!XBOW_PORT_TYPE_HUB(xbow_p, i)) ||
					(!XBOW_PORT_IS_ENABLED(xbow_p, i)));
#endif
			   masterwid = i;
			   masternasid = XBOW_PORT_NASID(xbow_p, i);
			   if (nasid == masternasid)
			   for (i=HUB_WIDGET_ID_MIN; i<=HUB_WIDGET_ID_MAX; i++) {
				if (!XBOW_PORT_IS_ENABLED(xbow_p, i))
					continue;
				if (XBOW_PORT_TYPE_IO(xbow_p, i)) {
				   widget_id = *(volatile widgetreg_t *)
                        		   (RAW_NODE_SWIN_BASE(nasid, i) + WIDGET_ID);
				   partnum = XWIDGET_PART_NUM(widget_id);
				   if (partnum == BRIDGE_WIDGET_PART_NUM) {
					printk("widget 0x%x is a bridge\n", i);
					bus_to_wid[num_bridges] = i;
					bus_to_nid[num_bridges] = nasid;
					bus_to_baddr[num_bridges] = ((masterwid << 60) | (1UL << 56));	/* Barrier set */
					num_bridges++;
				   }
				}
			   }
			}
		} else if (partnum == XXBOW_WIDGET_PART_NUM) {
			/*
			 * found xbridge, assume ibrick for now 
			 */
			printk("...is xbridge\n");
        		bus_to_wid[0] = 0xb;
        		bus_to_wid[1] = 0xe;
        		bus_to_wid[2] = 0xf;

        		bus_to_nid[0] = 0;
        		bus_to_nid[1] = 0;
        		bus_to_nid[2] = 0;

			bus_to_baddr[0] = 0xa100000000000000UL;
			bus_to_baddr[1] = 0xa100000000000000UL;
			bus_to_baddr[2] = 0xa100000000000000UL;
			masterwid = 0xa;
			num_bridges = 3;
		}
	}
	num = num_bridges - start;
	spin_unlock(&pcibr_setup_lock);
	/*
         * set bridge registers
         */
	for (i = start; i < (start + num); i++) {

		DBG("pcibr_setup: bus= %d  bus_to_wid[%2d]= %d  bus_to_nid[%2d]= %d\n",
                        i, i, bus_to_wid[i], i, bus_to_nid[i]);

		bus_to_cpu[i] = smp_processor_id();
		/*
		 * point to this bridge
		 */
		bridge = (bridge_t *) NODE_SWIN_BASE(bus_to_nid[i],bus_to_wid[i]);
		/*
	 	 * Clear all pending interrupts.
	 	 */
		bridge->b_int_rst_stat = (BRIDGE_IRR_ALL_CLR);
		/*
	 	 * Until otherwise set up, assume all interrupts are from slot 0
	 	 */
		bridge->b_int_device = (u32) 0x0;
		/*
	 	 * swap pio's to pci mem and io space (big windows)
	 	 */
		bridge->b_wid_control |= BRIDGE_CTRL_IO_SWAP;
		bridge->b_wid_control |= BRIDGE_CTRL_MEM_SWAP;

		/*
		 * Hmm...  IRIX sets additional bits in the address which 
		 * are documented as reserved in the bridge docs.
		 */
		bridge->b_int_mode = 0x0;		/* Don't clear ints */
		bridge->b_wid_int_upper = 0x8000 | (masterwid << 16);
		bridge->b_wid_int_lower = 0x01800090;	/* PI_INT_PEND_MOD off*/
		bridge->b_dir_map = (masterwid << 20);	/* DMA */
		bridge->b_int_enable = 0;

		bridge->b_wid_tflush;     /* wait until Bridge PIO complete */
	}
}

extern void ip27_setup_console(void);
extern void ip27_time_init(void);

void __init ip27_setup(void)
{
	nasid_t nid;
	hubreg_t p, e;

	ip27_setup_console();

	num_bridges = 0;
	/*
	 * hub_rtc init and cpu clock intr enabled for later calibrate_delay.
	 */
	DBG("ip27_setup(): Entered.\n");
	nid = get_nasid();
	printk("IP27: Running on node %d.\n", nid);

	p = LOCAL_HUB_L(PI_CPU_PRESENT_A) & 1;
	e = LOCAL_HUB_L(PI_CPU_ENABLE_A) & 1;
	printk("Node %d has %s primary /*
 * fp_emu.S
 *
 * Copyright Roman Zippel, 1997.  All rights reserved.
 *
 * Redistribution and use in source and binary forms, with or without
 * modification, are permitted provided that the following conditions
 * are met:
 * 1. Redistributions of source code must retain the above copyright
 *    notice, and the entire permission notice in its entirety,
 *    including the disclaimer of warranties.
 * 2. Redistributions in binary form must reproduce the above copyright
 *    notice, this list of conditions and the following disclaimer in the
 *    documentation and/or other materials provided with the distribution.
 * 3. The name of the author may not be used to endorse or promote
 *    products derived from this software without specific prior
 *    written permission.
 *
 * ALTERNATIVELY, this product may be distributed under the terms of
 * the GNU General Public License, in which case the provisions of the GPL are
 * required INSTEAD OF the above restrictions.  (This clause is
 * necessary due to a potential bad interaction between the GPL and
 * the restrictions contained in a BSD-style copyright.)
 *
 * THIS SOFTWARE IS PROVIDED ``AS IS'' AND ANY EXPRESS OR IMPLIED
 * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
 * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
 * DISCLAIMED.  IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT,
 * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
 * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
 * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
 * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
 * OF THE POSSIBILITY OF SUCH DAMAGE.
 */

#include <linux/config.h>
#include <linux/linkage.h>
#include <asm/entry.h>

#include "fp_emu.h"

	.globl	SYMBOL_NAME(fpu_emu)
	.globl	fp_debugprint
	.globl	fp_err_ua1,fp_err_ua2

	.text
SYMBOL_NAME_LABEL(fpu_emu)
	SAVE_ALL_INT
	GET_CURRENT(%d0)

#if defined(CPU_M68020_OR_M68030) && defined(CPU_M68040_OR_M68060)
        tst.l	SYMBOL_NAME(m68k_is040or060)
        jeq	1f
#endif
#if defined(CPU_M68040_OR_M68060)
	move.l	(FPS_PC2,%sp),(FPS_PC,%sp)
#endif
1:
	| emulate the instruction
	jsr	fp_scan

#if defined(CONFIG_M68060)
#if !defined(CPU_M68060_ONLY)
	btst	#3,SYMBOL_NAME(m68k_cputype)+3
	jeq	1f
#endif
	btst	#7,(FPS_SR,%sp)
	jne	fp_sendtrace060
#endif
1:
	| emulation successful?
	tst.l	%d0
	jeq	SYMBOL_NAME(ret_from_exception)

	| send some signal to program here

	jra	SYMBOL_NAME(ret_from_exception)

	| we jump here after an access error while trying to access
	| user space, we correct stackpointer and send a SIGSEGV to
	| the user process
fp_err_ua2:
	addq.l	#4,%sp
fp_err_ua1:
	addq.l	#4,%sp
	move.l	%a0,-(%sp)
	pea	SEGV_MAPERR
	pea	SIGSEGV
	jsr	SYMBOL_NAME(fpemu_signal)
	add.w	#12,%sp
	jra	SYMBOL_NAME(ret_from_exception)

#if defined(CONFIG_M68060)
	| send a trace signal if we are debugged
	| it does not really belong here, but...
fp_sendtrace060:
	move.l	(FPS_PC,%sp),-(%sp)
	pea	TRAP_TRACE
	pea	SIGTRAP
	jsr	SYMBOL_NAME(fpemu_signal)
	add.w	#12,%sp
	jra	SYMBOL_NAME(ret_from_exception)
#endif

	.globl	fp_get_data_reg, fp_put_data_reg
	.globl	fp_get_addr_reg, fp_put_addr_reg

	| Entry points to get/put a register. Some of them can be get/put
	| directly, others are on the stack, as we read/write the stack
	| directly here, these function may only be called from within
	| instruction decoding, otherwise the stack pointer is incorrect
	| and the stack gets corrupted.
fp_get_data_reg:
	jmp	([0f:w,%pc,%d0.w*4])

	.align	4
0:
	.long	fp_get_d0, fp_get_d1
	.long	fp_get_d2, fp_get_d3
	.long	fp_get_d4, fp_get_d5
	.long	fp_get_d6, fp_get_d7

fp_get_d0:
	move.l	(PT_D0+8,%sp),%d0
	printf	PREGISTER,"{d0->%08x}",1,%d0
	rts

fp_get_d1:
	move.l	(PT_D1+8,%sp),%d0
	printf	PREGISTER,"{d1->%08x}",1,%d0
	rts

fp_get_d2:
	move.l	(PT_D2+8,%sp),%d0
	printf	PREGISTER,"{d2->%08x}",1,%d0
	rts

fp_get_d3:
	move.l	%d3,%d0
	printf	PREGISTER,"{d3->%08x}",1,%d0
	rts

fp_get_d4:
	move.l	%d4,%d0
	printf	PREGISTER,"{d4->%08x}",1,%d0
	rts

fp_get_d5:
	move.l	%d5,%d0
	printf	PREGISTER,"{d5->%08x}",1,%d0
	rts

fp_get_d6:
	move.l	%d6,%d0
	printf	PREGISTER,"{d6->%08x}",1,%d0
	rts

fp_get_d7:
	move.l	%d7,%d0
	printf	PREGISTER,"{d7->%08x}",1,%d0
	rts

fp_put_data_reg:
	jmp	([0f:w,%pc,%d1.w*4])

	.align	4
0:
	.long	fp_put_d0, fp_put_d1
	.long	fp_put_d2, fp_put_d3
	.long	fp_put_d4, fp_put_d5
	.long	fp_put_d6, fp_put_d7

fp_put_d0:
	printf	PREGISTER,"{d0<-%08x}",1,%d0
	move.l	%d0,(PT_D0+8,%sp)
	rts

fp_put_d1:
	printf	PREGISTER,"{d1<-%08x}",1,%d0
	move.l	%d0,(PT_D1+8,%sp)
	rts

fp_put_d2:
	printf	PREGISTER,"{d2<-%08x}",1,%d0
	move.l	%d0,(PT_D2+8,%sp)
	rts

fp_put_d3:
	printf	PREGISTER,"{d3<-%08x}",1,%d0
|	move.l	%d0,%d3
	move.l	%d0,(PT_D3+8,%sp)
	rts

fp_put_d4:
	printf	PREGISTER,"{d4<-%08x}",1,%d0
|	move.l	%d0,%d4
	move.l	%d0,(PT_D4+8,%sp)
	rts

fp_put_d5:
	printf	PREGISTER,"{d5<-%08x}",1,%d0
|	move.l	%d0,%d5
	move.l	%d0,(PT_D5+8,%sp)
	rts

fp_put_d6:
	printf	PREGISTER,"{d6<-%08x}",1,%d0
	move.l	%d0,%d6
	rts

fp_put_d7:
	printf	PREGISTER,"{d7<-%08x}",1,%d0
	move.l	%d0,%d7
	rts

fp_get_addr_reg:
	jmp	([0f:w,%pc,%d0.w*4])

	.align	4
0:
	.long	fp_get_a0, fp_get_a1
	.long	fp_get_a2, fp_get_a3
	.long	fp_get_a4, fp_get_a5
	.long	fp_get_a6, fp_get_a7

fp_get_a0:
	move.l	(PT_A0+8,%sp),%a0
	printf	PREGISTER,"{a0->%08x}",1,%a0
	rts

fp_get_a1:
	move.l	(PT_A1+8,%sp),%a0
	printf	PREGISTER,"{a1->%08x}",1,%a0
	rts

fp_get_a2:
	move.l	(PT_A2+8,%sp),%a0
	printf	PREGISTER,"{a2->%08x}",1,%a0
	rts

fp_get_a3:
	move.l	%a3,%a0
	printf	PREGISTER,"{a3->%08x}",1,%a0
	rts

fp_get_a4:
	move.l	%a4,%a0
	printf	PREGISTER,"{a4->%08x}",1,%a0
	rts

fp_get_a5:
	move.l	%a5,%a0
	printf	PREGISTER,"{a5->%08x}",1,%a0
	rts

fp_get_a6:
	move.l	%a6,%a0
	printf	PREGISTER,"{a6->%08x}",1,%a0
	rts

fp_get_a7:
	move.l	%usp,%a0
	printf	PREGISTER,"{a7->%08x}",1,%a0
	rts

fp_put_addr_reg:
	jmp	([0f:w,%pc,%d0.w*4])

	.align	4
0:
	.long	fp_put_a0, fp_put_a1
	.long	fp_put_a2, fp_put_a3
	.long	fp_put_a4, fp_put_a5
	.long	fp_put_a6, fp_put_a7

fp_put_a0:
	printf	PREGISTER,"{a0<-%08x}",1,%a0
	move.l	%a0,(PT_A0+8,%sp)
	rts

fp_put_a1:
	printf	PREGISTER,"{a1<-%08x}",1,%a0
	move.l	%a0,(PT_A1+8,%sp)
	rts

fp_put_a2:
	printf	PREGISTER,"{a2<-%08x}",1,%a0
	move.l	%a0,(PT_A2+8,%sp)
	rts

fp_put_a3:
	printf	PREGISTER,"{a3<-%08x}",1,%a0
	move.l	%a0,%a3
	rts

fp_put_a4:
	printf	PREGISTER,"{a4<-%08x}",1,%a0
	move.l	%a0,%a4
	rts

fp_put_a5:
	printf	PREGISTER,"{a5<-%08x}",1,%a0
	move.l	%a0,%a5
	rts

fp_put_a6:
	printf	PREGISTER,"{a6<-%08x}",1,%a0
	move.l	%a0,%a6
	rts

fp_put_a7:
	printf	PREGISTER,"{a7<-%08x}",1,%a0
	move.l	%a0,%usp
	rts

	.data
	.align	4

fp_debugprint:
|	.long	PMDECODE
	.long	PMINSTR+PMDECODE+PMCONV+PMNORM
|	.long	PMCONV+PMNORM+PMINSTR
|	.long	0
/*

  fp_trig.c: floating-point math routines for the Linux-m68k
  floating point emulator.

  Copyright (c) 1998-1999 David Huggins-Daines / Roman Zippel.

  I hereby give permission, free of charge, to copy, modify, and
  redistribute this software, in source or binary form, provided that
  the above copyright notice and the following disclaimer are included
  in all such copies.

  THIS SOFTWARE IS PROVIDED "AS IS", WITH ABSOLUTELY NO WARRANTY, REAL
  OR IMPLIED.

*/

#include "fp_emu.h"

struct fp_ext *
fp_fsqrt(struct fp_ext *dest, struct fp_ext *src)
{
	uprint("fsqrt\n");

	fp_monadic_check(dest, src);

	if (IS_ZERO(dest))
		return dest;

	if (dest->sign) {
		fp_set_nan(dest);
		return dest;
	}
	if (IS_INF(dest))
		return dest;

	return dest;
}

struct fp_ext *
fp_fetoxm1(struct fp_ext *dest, struct fp_ext *src)
{
	uprint("fetoxm1\n");

	fp_monadic_check(dest, src);

	if (IS_ZERO(dest))
		return dest;

	return dest;
}

struct fp_ext *
fp_fetox(struct fp_ext *dest, struct fp_ext *src)
{
	uprint("fetox\n");

	fp_monadic_check(dest, src);

	return dest;
}

struct fp_ext *
fp_ftwotox(struct fp_ext *dest, struct fp_ext *src)
{
	uprint("ftwotox\n");

	fp_monadic_check(dest, src);

	return dest;
}

struct fp_ext *
fp_ftentox(struct fp_ext *dest, struct fp_ext *src)
{
	uprint("ftentox\n");

	fp_monadic_check(dest, src);

	return dest;
}

struct fp_ext *
fp_flogn(struct fp_ext *dest, struct fp_ext *src)
{
	uprint("flogn\n");

	fp_monadic_check(dest, src);

	return dest;
}

struct fp_ext *
fp_flognp1(struct fp_ext *dest, struct fp_ext *src)
{
	uprint("flognp1\n");

	fp_monadic_check(dest, src);

	return dest;
}

struct fp_ext *
fp_flog10(struct fp_ext *dest, struct fp_ext *src)
{
	uprint("flog10\n");

	fp_monadic_check(dest, src);

	return dest;
}

struct fp_ext *
fp_flog2(struct fp_ext *dest, struct fp_ext *src)
{
	uprint("flog2\n");

	fp_monadic_check(dest, src);

	return dest;
}

struct fp_ext *
fp_fgetexp(struct fp_ext *dest, struct fp_ext *src)
{
	uprint("fgetexp\n");

	fp_monadic_check(dest, src);

	return dest;
}

struct fp_ext *
fp_fgetman(struct fp_ext *dest, struct fp_ext *src)
{
	uprint("fgetman\n");

	fp_monadic_check(dest, src);

	return dest;
}

/*
 * fp_move.S
 *
 * Copyright Roman Zippel, 1997.  All rights reserved.
 *
 * Redistribution and use in source and binary forms, with or without
 * modification, are permitted provided that the following conditions
 * are met:
 * 1. Redistributions of source code must retain the above copyright
 *    notice, and the entire permission notice in its entirety,
 *    including the disclaimer of warranties.
 * 2. Redistributions in binary form must reproduce the above copyright
 *    notice, this list of conditions and the following disclaimer in the
 *    documentation and/or other materials provided with the distribution.
 * 3. The name of the author may not be used to endorse or promote
 *    products derived from this software without specific prior
 *    written permission.
 *
 * ALTERNATIVELY, this product may be distributed under the terms of
 * the GNU General Public License, in which case the provisions of the GPL are
 * required INSTEAD OF the above restrictions.  (This clause is
 * necessary due to a potential bad interaction between the GPL and
 * the restrictions contained in a BSD-style copyright.)
 *
 * THIS SOFTWARE IS PROVIDED ``AS IS'' AND ANY EXPRESS OR IMPLIED
 * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
 * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
 * DISCLAIMED.  IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT,
 * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
 * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
 * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
 * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
 * OF THE POSSIBILITY OF SUCH DAMAGE.
 */

#include "fp_emu.h"
#include "fp_decode.h"

do_no_pc_mode=1

	.globl	fp_fmove_fp2mem

fp_fmove_fp2mem:
	clr.b	(2+FPD_FPSR,FPDATA)
	fp_decode_dest_format
	move.w	%d0,%d1			| store data size twice in %d1
	swap	%d1			| one can be trashed below
	move.w	%d0,%d1
#ifdef FPU_EMU_DEBUG
	lea	0f,%a0
	clr.l	%d0
	move.b	(%a0,%d1.w),%d0
	printf	PDECODE,"fmove.%c ",1,%d0
	fp_decode_src_reg
	printf	PDECODE,"fp%d,",1,%d0

	.data
0:	.byte	'l','s','x','p','w','d','b','p'
	.previous
#endif

	| encode addressing mode for dest
	fp_decode_addr_mode

	.long	fp_data, fp_ill
	.long	fp_indirect, fp_postinc
	.long	fp_predecr, fp_disp16
	.long	fp_extmode0, fp_extmode1

	| addressing mode: data register direct
fp_data:
	fp_mode_data_direct
	move.w	%d0,%d1
	fp_decode_src_reg
	fp_get_fp_reg
	lea	(FPD_TEMPFP1,FPDATA),%a1
	move.l	(%a0)+,(%a1)+
	move.l	(%a0)+,(%a1)+
	move.l	(%a0),(%a1)
	lea	(-8,%a1),%a0
	swap	%d1
	move.l	%d1,%d2
	printf	PDECODE,"\n"
	jmp	([0f:w,%pc,%d1.w*4])

	.align	4
0:
	.long	fp_data_long, fp_data_single
	.long	fp_ill, fp_ill
	.long	fp_data_word, fp_ill
	.long	fp_data_byte, fp_ill

fp_data_byte:
	jsr	fp_normalize_ext
	jsr	fp_conv_ext2byte
	move.l	%d0,%d1
	swap	%d2
	move.w	%d2,%d0
	jsr	fp_get_data_reg
	move.b	%d1,%d0
	move.w	%d2,%d1
	jsr	fp_put_data_reg
	jra	fp_final

fp_data_word:
	jsr	fp_normalize_ext
	jsr	fp_conv_ext2short
	move.l	%d0,%d1
	swap	%d2
	move.w	%d2,%d0
	jsr	fp_get_data_reg
	move.w	%d1,%d0
	move.l	%d2,%d1
	jsr	fp_put_data_reg
	jra	fp_final

fp_data_long:
	jsr	fp_normalize_ext
	jsr	fp_conv_ext2long
	swap	%d2
	move.w	%d2,%d1
	jsr	fp_put_data_reg
	jra	fp_final

fp_data_single:
	jsr	fp_normalize_ext
	jsr	fp_conv_ext2single
	swap	%d2
	move.w	%d2,%d1
	jsr	fp_put_data_reg
	jra	fp_final

	| addressing mode: address register indirect
fp_indirect:
	fp_mode_addr_indirect
	jra	fp_putdest

	| addressing mode: address register indirect with postincrement
fp_postinc:
	fp_mode_addr_indirect_postinc
	jra	fp_putdest

	| addressing mode: address register indirect with predecrement
fp_predecr:
	fp_mode_addr_indirect_predec
	jra	fp_putdest

	| addressing mode: address register indirect with 16bit displacement
fp_disp16:
	fp_mode_addr_indirect_disp16
	jra     fp_putdest

fp_extmode0:
	fp_mode_addr_indirect_extmode0
	jra	fp_putdest

fp_extmode1:
	fp_decode_addr_reg
	jmp	([0f:w,%pc,%d0*4])

	.align	4
0:
	.long	fp_abs_short, fp_abs_long
	.long	fp_ill, fp_ill
	.long	fp_ill, fp_ill
	.long	fp_ill, fp_ill

fp_abs_short:
	fp_mode_abs_short
	jra	fp_putdest

fp_abs_long:
	fp_mode_abs_long
	jra	fp_putdest

fp_putdest:
	move.l	%a0,%a1
	fp_decode_src_reg
	move.l	%d1,%d2			| save size
	fp_get_fp_reg
	printf	PDECODE,"\n"
	addq.l	#8,%a0
	move.l	(%a0),-(%sp)
	move.l	-(%a0),-(%sp)
	move.l	-(%a0),-(%sp)
	move.l	%sp,%a0
	jsr	fp_normalize_ext

	swap	%d2
	jmp	([0f:w,%pc,%d2.w*4])

	.align	4
0:
	.long	fp_format_long, fp_format_single
	.long	fp_format_extended, fp_format_packed
	.long	fp_format_word, fp_format_double
	.long	fp_format_byte, fp_format_packed

fp_format_long:
	jsr	fp_conv_ext2long
	putuser.l %d0,(%a1),fp_err_ua1,%a1
	jra	fp_finish_move

fp_format_single:
	jsr	fp_conv_ext2single
	putuser.l %d0,(%a1),fp_err_ua1,%a1
	jra	fp_finish_move

fp_format_extended:
	move.l	(%a0)+,%d0
	lsl.w	#1,%d0
	lsl.l	#7,%d0
	lsl.l	#8,%d0
	putuser.l %d0,(%a1)+,fp_err_ua1,%a1
	move.l	(%a0)+,%d0
	putuser.l %d0,(%a1)+,fp_err_ua1,%a1
	move.l	(%a0),%d0
	putuser.l %d0,(%a1),fp_err_ua1,%a1
	jra	fp_finish_move

fp_format_packed:
	/* not supported yet */
	lea	(12,%sp),%sp
	jra	fp_ill

fp_format_word:
	jsr	fp_conv_ext2short
	putuser.w %d0,(%a1),fp_err_ua1,%a1
	jra	fp_finish_move

fp_format_double:
	jsr	fp_conv_ext2double
	jra	fp_finish_move

fp_format_byte:
	jsr	fp_conv_ext2byte
	putuser.b %d0,(%a1),fp_err_ua1,%a1
|	jra	fp_finish_move

fp_finish_move:
	lea	(12,%sp),%sp
	jra	fp_final
/*
 * fp_movem.S
 *
 * Copyright Roman Zippel, 1997.  All rights reserved.
 *
 * Redistribution and use in source and binary forms, with or without
 * modification, are permitted provided that the following conditions
 * are met:
 * 1. Redistributions of source code must retain the above copyright
 *    notice, and the entire permission notice in its entirety,
 *    including the disclaimer of warranties.
 * 2. Redistributions in binary form must reproduce the above copyright
 *    notice, this list of conditions and the following disclaimer in the
 *    documentation and/or other materials provided with the distribution.
 * 3. The name of the author may not be used to endorse or promote
 *    products derived from this software without specific prior
 *    written permission.
 *
 * ALTERNATIVELY, this product may be distributed under the terms of
 * the GNU General Public License, in which case the provisions of the GPL are
 * required INSTEAD OF the above restrictions.  (This clause is
 * necessary due to a potential bad interaction between the GPL and
 * the restrictions contained in a BSD-style copyright.)
 *
 * THIS SOFTWARE IS PROVIDED ``AS IS'' AND ANY EXPRESS OR IMPLIED
 * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
 * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
 * DISCLAIMED.  IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT,
 * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
 * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
 * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
 * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
 * OF THE POSSIBILITY OF SUCH DAMAGE.
 */

#include "fp_emu.h"
#include "fp_decode.h"

| set flags for decode macros for fmovem
do_fmovem=1

	.globl	fp_fmovem_fp, fp_fmovem_cr

| %d1 contains the mask and count of the register list
| for other register usage see fp_decode.h

fp_fmovem_fp:
	printf	PDECODE,"fmovem.x "
	| get register list and count them
	btst	#11,%d2
	jne	1f
	bfextu	%d2{#24,#8},%d0		| static register list
	jra	2f
1:	bfextu	%d2{#25,#3},%d0		| dynamic register list
	jsr	fp_get_data_reg
2:	move.l	%d0,%d1
	swap	%d1
	jra	2f
1:	addq.w	#1,%d1			| count the # of registers in
2:	lsr.b	#1,%d0			| register list and keep it in %d1
	jcs	1b
	jne	2b
	printf	PDECODE,"#%08x",1,%d1
#ifdef FPU_EMU_DEBUG
	btst	#12,%d2
	jne	1f
	printf	PDECODE,"-"		| decremental move
	jra	2f
1:	printf	PDECODE,"+"		| incremental move
2:	btst	#13,%d2
	jeq	1f
	printf	PDECODE,"->"		| fpu -> cpu
	jra	2f
1:	printf	PDECODE,"<-"		| fpu <- cpu
2:
#endif

	| decode address mode
	fp_decode_addr_mode

	.long	fp_ill, fp_ill
	.long	fpr_indirect, fpr_postinc
	.long	fpr_predecr, fpr_disp16
	.long	fpr_extmode0, fpr_extmode1

	| addressing mode: address register indirect
fpr_indirect:
	fp_mode_addr_indirect
	jra	fpr_do_movem

	| addressing mode: address register indirect with postincrement
fpr_postinc:
	fp_mode_addr_indirect_postinc
	jra	fpr_do_movem

fpr_predecr:
	fp_mode_addr_indirect_predec
	jra	fpr_do_movem

	| addressing mode: address register/programm counter indirect
	|		   with 16bit displacement
fpr_disp16:
	fp_mode_addr_indirect_disp16
	jra	fpr_do_movem

fpr_extmode0:
	fp_mode_addr_indirect_extmode0
	jra	fpr_do_movem

fpr_extmode1:
	fp_decode_addr_reg
	jmp	([0f:w,%pc,%d0*4])

	.align	4
0:
	.long	fpr_absolute_short, fpr_absolute_long
	.long	fpr_disp16, fpr_extmode0
	.long	fp_ill, fp_ill
	.long	fp_ill, fp_ill

fpr_absolute_short:
	fp_mode_abs_short
	jra	fpr_do_movem

fpr_absolute_long:
	fp_mode_abs_long
|	jra	fpr_do_movem

fpr_do_movem:
	swap	%d1			| get fpu register list
	lea	(FPD_FPREG,FPDATA),%a1
	moveq	#12,%d0
	btst	#12,%d2
	jne	1f
	lea	(-12,%a1,%d0*8),%a1
	neg.l	%d0
1:	btst	#13,%d2
	jne	4f
	| move register from memory into fpu
	jra	3f
1:	printf	PMOVEM,"(%p>%p)",2,%a0,%a1
	getuser.l (%a0)+,%d2,fp_err_ua1,%a0
	lsr.l	#8,%d2
	lsr.l	#7,%d2
	lsr.w	#1,%d2
	move.l	%d2,(%a1)+
	getuser.l (%a0)+,%d2,fp_err_ua1,%a0
	move.l	%d2,(%a1)+
	getuser.l (%a0),%d2,fp_err_ua1,%a0
	move.l	%d2,(%a1)
	subq.l	#8,%a0
	subq.l	#8,%a1
	add.l	%d0,%a0
2:	add.l	%d0,%a1
3:	lsl.b	#1,%d1
	jcs	1b
	jne	2b
	jra	5f
	| move register from fpu into memory
1:	printf	PMOVEM,"(%p>%p)",2,%a1,%a0
	move.l	(%a1)+,%d2
	lsl.w	#1,%d2
	lsl.l	#7,%d2
	lsl.l	#8,%d2
	putuser.l %d2,(%a0)+,fp_err_ua1,%a0
	move.l	(%a1)+,%d2
	putuser.l %d2,(%a0)+,fp_err_ua1,%a0
	move.l	(%a1),%d2
	putuser.l %d2,(%a0),fp_err_ua1,%a0
	subq.l	#8,%a1
	subq.l	#8,%a0
	add.l	%d0,%a0
2:	add.l	%d0,%a1
4:	lsl.b	#1,%d1
	jcs	1b
	jne	2b
5:
	printf	PDECODE,"\n"
#if 0
	lea	(FPD_FPREG,FPDATA),%a0
	printf	PMOVEM,"fp:"
	printx	PMOVEM,%a0@(0)
	printx	PMOVEM,%a0@(12)
	printf	PMOVEM,"\n   "
	printx	PMOVEM,%a0@(24)
	printx	PMOVEM,%a0@(36)
	printf	PMOVEM,"\n   "
	printx	PMOVEM,%a0@(48)
	printx	PMOVEM,%a0@(60)
	printf	PMOVEM,"\n   "
	printx	PMOVEM,%a0@(72)
	printx	PMOVEM,%a0@(84)
	printf	PMOVEM,"\n"
#endif
	jra	fp_end

| set flags for decode macros for fmovem control register
do_fmovem=1
do_fmovem_cr=1

fp_fmovem_cr:
	printf	PDECODE,"fmovem.cr "
	| get register list and count them
	bfextu	%d2{#19,#3},%d0
	move.l	%d0,%d1
	swap	%d1
	jra	2f
1:	addq.w	#1,%d1
2:	lsr.l	#1,%d0
	jcs	1b
	jne	2b
	printf	PDECODE,"#%08x",1,%d1
#ifdef FPU_EMU_DEBUG
	btst	#13,%d2
	jeq	1f
	printf	PDECODE,"->"		| fpu -> cpu
	jra	2f
1:	printf	PDECODE,"<-"		| fpu <- cpu
2:
#endif

	| decode address mode
	fp_decode_addr_mode

	.long	fpc_data, fpc_addr
	.long	fpc_indirect, fpc_postinc
	.long	fpc_predecr, fpc_disp16
	.long	fpc_extmode0, fpc_extmode1

fpc_data:
	fp_mode_data_direct
	move.w	%d0,%d1
	bfffo	%d2{#19,#3},%d0
	sub.w	#19,%d0
	lea	(FPD_FPCR,FPDATA,%d0.w*4),%a1
	btst	#13,%d2
	jne	1f
	move.w	%d1,%d0
	jsr	fp_get_data_reg
	move.l	%d0,(%a1)
	jra	fpc_movem_fin
1:	move.l	(%a1),%d0
	jsr	fp_put_data_reg
	jra	fpc_movem_fin

fpc_addr:
	fp_decode_addr_reg
	printf	PDECODE,"a%d",1,%d0
	btst	#13,%d2
	jne	1f
	jsr	fp_get_addr_reg
	move.l	%a0,(FPD_FPIAR,FPDATA)
	jra	fpc_movem_fin
1:	move.l	(FPD_FPIAR,FPDATA),%a0
	jsr	fp_put_addr_reg
	jra	fpc_movem_fin

fpc_indirect:
	fp_mode_addr_indirect
	jra	fpc_do_movem

fpc_postinc:
	fp_mode_addr_indirect_postinc
	jra	fpc_do_movem

fpc_predecr:
	fp_mode_addr_indirect_predec
	jra	fpc_do_movem

fpc_disp16:
	fp_mode_addr_indirect_disp16
	jra	fpc_do_movem

fpc_extmode0:
	fp_mode_addr_indirect_extmode0
	jra	fpc_do_movem

fpc_extmode1:
	fp_decode_addr_reg
	jmp	([0f:w,%pc,%d0*4])

	.align	4
0:
	.long	fpc_absolute_short, fpc_absolute_long
	.long	fpc_disp16, fpc_extmode0
	.long	fpc_immediate, fp_ill
	.long	fp_ill, fp_ill

fpc_absolute_short:
	fp_mode_abs_short
	jra	fpc_do_movem

fpc_absolute_long:
	fp_mode_abs_long
	jra	fpc_do_movem

fpc_immediate:
	fp_get_pc %a0
	lea	(%a0,%d1.w*4),%a1
	fp_put_pc %a1
	printf	PDECODE,"#imm"
|	jra	fpc_do_movem
#if 0
	swap	%d1
	lsl.l	#5,%d1
	lea	(FPD_FPCR,FPDATA),%a0
	jra	3f
1:	move.l	%d0,(%a0)
2:	addq.l	#4,%a0
3:	lsl.b	#1,%d1
	jcs	1b
	jne	2b
	jra	fpc_movem_fin
#endif

fpc_do_movem:
	swap	%d1			| get fpu register list
	lsl.l	#5,%d1
	lea	(FPD_FPCR,FPDATA),%a1
1:	btst	#13,%d2
	jne	4f

	| move register from memory into fpu
	jra	3f
1:	printf	PMOVEM,"(%p>%p)",2,%a0,%a1
	getuser.l (%a0)+,%d0,fp_err_ua1,%a0
	move.l	%d0,(%a1)
2:	addq.l	#4,%a1
3:	lsl.b	#1,%d1
	jcs	1b
	jne	2b
	jra	fpc_movem_fin

	| move register from fpu into memory
1:	printf	PMOVEM,"(%p>%p)",2,%a1,%a0
	move.l	(%a1),%d0
	putuser.l %d0,(%a0)+,fp_err_ua1,%a0
2:	addq.l	#4,%a1
4:	lsl.b	#1,%d1
	jcs	1b
	jne	2b

fpc_movem_fin:
	and.l	#0x0000fff0,(FPD_FPCR,FPDATA)
	and.l	#0x0ffffff8,(FPD_FPSR,FPDATA)
	move.l	(FPD_FPCR,FPDATA),%d0
	lsr.l	#4,%d0
	moveq	#3,%d1
	and.l	%d0,%d1
	move.w	%d1,(FPD_RND,FPDATA)
	lsr.l	#2,%d0
	moveq	#3,%d1
	and.l	%d0,%d1
	move.w	%d1,(FPD_PREC,FPDATA)
	printf	PDECODE,"\n"
#if 0
	printf	PMOVEM,"fpcr : %08x\n",1,FPDATA@(FPD_FPCR)
	printf	PMOVEM,"fpsr : %08x\n",1,FPDATA@(FPD_FPSR)
	printf	PMOVEM,"fpiar: %08x\n",1,FPDATA@(FPD_FPIAR)
	clr.l	%d0
	move.w	(FPD_PREC,FPDATA),%d0
	printf	PMOVEM,"prec : %04x\n",1,%d0
	move.w	(FPD_RND,FPDATA),%d0
	printf	PMOVEM,"rnd  : %04x\n",1,%d0
#endif
	jra	fp_end
/*
 * fp_scan.S
 *
 * Copyright Roman Zippel, 1997.  All rights reserved.
 *
 * Redistribution and use in source and binary forms, with or without
 * modification, are permitted provided that the following conditions
 * are met:
 * 1. Redistributions of source code must retain the above copyright
 *    notice, and the entire permission notice in its entirety,
 *    including the disclaimer of warranties.
 * 2. Redistributions in binary form must reproduce the above copyright
 *    notice, this list of conditions and the following disclaimer in the
 *    documentation and/or other materials provided with the distribution.
 * 3. The name of the author may not be used to endorse or promote
 *    products derived from this software without specific prior
 *    written permission.
 *
 * ALTERNATIVELY, this product may be distributed under the terms of
 * the GNU General Public License, in which case the provisions of the GPL are
 * required INSTEAD OF the above restrictions.  (This clause is
 * necessary due to a potential bad interaction between the GPL and
 * the restrictions contained in a BSD-style copyright.)
 *
 * THIS SOFTWARE IS PROVIDED ``AS IS'' AND ANY EXPRESS OR IMPLIED
 * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
 * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
 * DISCLAIMED.  IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT,
 * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
 * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
 * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
 * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
 * OF THE POSSIBILITY OF SUCH DAMAGE.
 */

#include "fp_emu.h"
#include "fp_decode.h"

	.globl	fp_scan, fp_datasize

	.data

| %d2 - first two instr words
| %d1 - operand size

/* operand formats are:

	Long = 0,		i.e. fmove.l
	Single,			i.e. fmove.s
	Extended,		i.e. fmove.x
	Packed-BCD,		i.e. fmove.p
	Word,			i.e. fmove.w
	Double,			i.e. fmove.d
*/

	.text

| On entry:
| FPDATA - base of emulated FPU registers

fp_scan:
| normal fpu instruction? (this excludes fsave/frestore)
	fp_get_pc %a0
	printf	PDECODE,"%08x: ",1,%a0
	getuser.b (%a0),%d0,fp_err_ua1,%a0
#if 1
	cmp.b	#0xf2,%d0		| cpid = 1
#else
	cmp.b	#0xfc,%d0		| cpid = 6
#endif
	jne	fp_nonstd
| first two instruction words are kept in %d2
	getuser.l (%a0)+,%d2,fp_err_ua1,%a0
	fp_put_pc %a0
fp_decode_cond:				| seperate conditional instr
	fp_decode_cond_instr_type

	.long	fp_decode_move, fp_fscc
	.long	fp_fbccw, fp_fbccl

fp_decode_move:				| seperate move instr
	fp_decode_move_instr_type

	.long	fp_fgen_fp, fp_ill
	.long	fp_fgen_ea, fp_fmove_fp2mem
	.long	fp_fmovem_cr, fp_fmovem_cr
	.long	fp_fmovem_fp, fp_fmovem_fp

| now all arithmetic instr and a few move instr are left
fp_fgen_fp:				| source is a fpu register
	clr.b	(FPD_FPSR+2,FPDATA)	| clear the exception byte
	fp_decode_sourcespec
	printf	PDECODE,"f<op>.x fp%d",1,%d0
	fp_get_fp_reg
	lea	(FPD_TEMPFP1,FPDATA),%a1 | copy src into a temp location
	move.l	(%a0)+,(%a1)+
	move.l	(%a0)+,(%a1)+
	move.l	(%a0),(%a1)
	lea	(-8,%a1),%a0
	jra	fp_getdest

fp_fgen_ea:				| source is <ea>
	clr.b	(FPD_FPSR+2,FPDATA)	| clear the exception byte
	| sort out fmovecr, keep data size in %d1
	fp_decode_sourcespec
	cmp.w	#7,%d0
	jeq	fp_fmovecr
	move.w	%d0,%d1			| store data size twice in %d1
	swap	%d1			| one can be trashed below
	move.w	%d0,%d1
#ifdef FPU_EMU_DEBUG
	lea	0f,%a0
	clr.l	%d0
	move.b	(%a0,%d1.w),%d0
	printf	PDECODE,"f<op>.%c ",1,%d0

	.data
0:	.byte	'l','s','x','p','w','d','b',0
	.previous
#endif

/*
	fp_getsource, fp_getdest

	basically, we end up with a pointer to the source operand in
	%a1, and a pointer to the destination operand in %a0.  both
	are, of course, 96-bit extended floating point numbers.
*/

fp_getsource:
	| decode addressing mode for source
	fp_decode_addr_mode

	.long 	fp_data, fp_ill
	.long 	fp_indirect, fp_postinc
	.long 	fp_predecr, fp_disp16
	.long 	fp_extmode0, fp_extmode1

	| addressing mode: data register direct
fp_data:
	fp_mode_data_direct
	jsr	fp_get_data_reg
	lea	(FPD_TEMPFP1,FPDATA),%a0
	jmp	([0f:w,%pc,%d1.w*4])

	.align	4
0:
	.long	fp_data_long, fp_data_single
	.long	fp_ill, fp_ill
	.long	fp_data_word, fp_ill
	.long	fp_data_byte, fp_ill

	| data types that fit in an integer data register
fp_data_byte:
	extb.l	%d0
	jra	fp_data_long

fp_data_word:
	ext.l	%d0

fp_data_long:
	jsr	fp_conv_long2ext
	jra	fp_getdest

fp_data_single:
	jsr	fp_conv_single2ext
	jra	fp_getdest

	| addressing mode: address register indirect
fp_indirect:
	fp_mode_addr_indirect
	jra	fp_fetchsource

	| addressing mode: address register indirect with postincrement
fp_postinc:
	fp_mode_addr_indirect_postinc
	jra	fp_fetchsource

	| addressing mode: address register indirect with predecrement
fp_predecr:
	fp_mode_addr_indirect_predec
	jra	fp_fetchsource

	| addressing mode: address register/programm counter indirect
	|		   with 16bit displacement
fp_disp16:
	fp_mode_addr_indirect_disp16
	jra	fp_fetchsource

	| all other indirect addressing modes will finally end up here
fp_extmode0:
	fp_mode_addr_indirect_extmode0
	jra	fp_fetchsource

| all pc relative addressing modes and immediate/absolute modes end up here
| the first ones are sent to fp_extmode0 or fp_disp16
| and only the latter are handled here
fp_extmode1:
	fp_decode_addr_reg
	jmp	([0f:w,%pc,%d0*4])

	.align	4
0:
	.long	fp_abs_short, fp_abs_long
	.long	fp_disp16, fp_extmode0
	.long	fp_immediate, fp_ill
	.long	fp_ill, fp_ill

	| addressing mode: absolute short
fp_abs_short:
	fp_mode_abs_short
	jra	fp_fetchsource

	| addressing mode: absolute long
fp_abs_long:
	fp_mode_abs_long
	jra	fp_fetchsource

	| addressing mode: immediate data
fp_immediate:
	printf	PDECODE,"#"
	fp_get_pc %a0
	move.w	(fp_datasize,%d1.w*2),%d0
	addq.w	#1,%d0
	and.w	#-2,%d0
#ifdef FPU_EMU_DEBUG
	movem.l	%d0/%d1,-(%sp)
	movel	%a0,%a1
	clr.l	%d1
	jra	2f
1:	getuser.b (%a1)+,%d1,fp_err_ua1,%a1
	printf	PDECODE,"%02x",1,%d1
2:	dbra	%d0,1b
	movem.l	(%sp)+,%d0/%d1
#endif
	lea	(%a0,%d0.w),%a1
	fp_put_pc %a1
|	jra	fp_fetchsource

fp_fetchsource:
	move.l	%a0,%a1
	swap	%d1
	lea	(FPD_TEMPFP1,FPDATA),%a0
	jmp	([0f:w,%pc,%d1.w*4])

	.align	4
0:	.long	fp_long, fp_single
	.long	fp_ext, fp_pack
	.long	fp_word, fp_double
	.long	fp_byte, fp_ill

fp_long:
	getuser.l (%a1),%d0,fp_err_ua1,%a1
	jsr	fp_conv_long2ext
	jra	fp_getdest

fp_single:
	getuser.l (%a1),%d0,fp_err_ua1,%a1
	jsr	fp_conv_single2ext
	jra	fp_getdest

fp_ext:
	getuser.l (%a1)+,%d0,fp_err_ua1,%a1
	lsr.l	#8,%d0
	lsr.l	#7,%d0
	lsr.w	#1,%d0
	move.l	%d0,(%a0)+
	getuser.l (%a1)+,%d0,fp_err_ua1,%a1
	move.l	%d0,(%a0)+
	getuser.l (%a1),%d0,fp_err_ua1,%a1
	move.l	%d0,(%a0)
	subq.l	#8,%a0
	jra	fp_getdest

fp_pack:
	/* not supported yet */
	jra	fp_ill

fp_word:
	getuser.w (%a1),%d0,fp_err_ua1,%a1
	ext.l	%d0
	jsr	fp_conv_long2ext
	jra	fp_getdest

fp_double:
	jsr	fp_conv_double2ext
	jra	fp_getdest

fp_byte:
	getuser.b (%a1),%d0,fp_err_ua1,%a1
	extb.l	%d0
	jsr	fp_conv_long2ext
|	jra	fp_getdest

fp_getdest:
	move.l	%a0,%a1
	bfextu	%d2{#22,#3},%d0
	printf	PDECODE,",fp%d\n",1,%d0
	fp_get_fp_reg
	movem.l	%a0/%a1,-(%sp)
	pea	fp_finalrounding
	bfextu	%d2{#25,#7},%d0
	jmp	([0f:w,%pc,%d0*4])

	.align	4
0:
	.long	fp_fmove_mem2fp, fp_fint, fp_fsinh, fp_fintrz
	.long	fp_fsqrt, fp_ill, fp_flognp1, fp_ill
	.long	fp_fetoxm1, fp_ftanh, fp_fatan, fp_ill
	.long	fp_fasin, fp_fatanh, fp_fsin, fp_ftan
	.long	fp_fetox, fp_ftwotox, fp_ftentox, fp_ill
	.long	fp_flogn, fp_flog10, fp_flog2, fp_ill
	.long	fp_fabs, fp_fcosh, fp_fneg, fp_ill
	.long	fp_facos, fp_fcos, fp_fgetexp, fp_fgetman
	.long	fp_fdiv, fp_fmod, fp_fadd, fp_fmul
	.long	fpa_fsgldiv, fp_frem, fp_fscale, fpa_fsglmul
	.long	fp_fsub, fp_ill, fp_ill, fp_ill
	.long	fp_ill, fp_ill, fp_ill, fp_ill
	.long	fp_fsincos0, fp_fsincos1, fp_fsincos2, fp_fsincos3
	.long	fp_fsincos4, fp_fsincos5, fp_fsincos6, fp_fsincos7
	.long	fp_fcmp, fp_ill, fp_ftst, fp_ill
	.long	fp_ill, fp_ill, fp_ill, fp_ill
	.long	fp_fsmove, fp_fssqrt, fp_ill, fp_ill
	.long	fp_fdmove, fp_fdsqrt, fp_ill, fp_ill
	.long	fp_ill, fp_ill, fp_ill, fp_ill
	.long	fp_ill, fp_ill, fp_ill, fp_ill
	.long	fp_ill, fp_ill, fp_ill, fp_ill
	.long	fp_ill, fp_ill, fp_ill, fp_ill
	.long	fp_fsabs, fp_ill, fp_fsneg, fp_ill
	.long	fp_fdabs, fp_ill, fp_fdneg, fp_ill
	.long	fp_fsdiv, fp_ill, fp_fsadd, fp_fsmul
	.long	fp_fddiv, fp_ill, fp_fdadd, fp_fdmul
	.long	fp_fssub, fp_ill, fp_ill, fp_ill
	.long	fp_fdsub, fp_ill, fp_ill, fp_ill
	.long	fp_ill, fp_ill, fp_ill, fp_ill
	.long	fp_ill, fp_ill, fp_ill, fp_ill
	.long	fp_ill, fp_ill, fp_ill, fp_ill
	.long	fp_ill, fp_ill, fp_ill, fp_ill

	| Instructions follow

	| Move an (emulated) ROM constant
fp_fmovecr:
	bfextu	%d2{#27,#5},%d0
	printf	PINSTR,"fp_fmovecr #%d",1,%d0
	move.l	%d0,%d1
	add.l	%d0,%d0
	add.l	%d1,%d0
	lea	(fp_constants,%d0*4),%a0
	move.l	#0x801cc0ff,%d0
	addq.l	#1,%d1
	lsl.l	%d1,%d0
	jcc	1f
	fp_set_sr FPSR_EXC_INEX2			| INEX2 exception
1:	moveq	#-128,%d0				| continue with fmove
	and.l	%d0,%d2
	jra	fp_getdest

	.data
	.align	4
fp_constants:
	.long	0x00004000,0xc90fdaa2,0x2168c235	| pi
	.extend	0,0,0,0,0,0,0,0,0,0
	.long	0x00003ffd,0x9a209a84,0xfbcff798	| log10(2)
	.long	0x00004000,0xadf85458,0xa2bb4a9a	| e
	.long	0x00003fff,0xb8aa3b29,0x5c17f0bc	| log2(e)
	.long	0x00003ffd,0xde5bd8a9,0x37287195	| log10(e)
	.long	0x00000000,0x00000000,0x00000000	| 0.0
	.long	0x00003ffe,0xb17217f7,0xd1cf79ac	| 1n(2)
	.long	0x00004000,0x935d8ddd,0xaaa8ac17	| 1n(10)
	| read this as "1.0 * 2^0" - note the high bit in the mantissa
	.long	0x00003fff,0x80000000,0x00000000	| 10^0
	.long	0x00004002,0xa0000000,0x00000000	| 10^1
	.long	0x00004005,0xc8000000,0x00000000	| 10^2
	.long	0x0000400c,0x9c400000,0x00000000	| 10^4
	.long	0x00004019,0xbebc2000,0x00000000	| 10^8
	.long	0x00004034,0x8e1bc9bf,0x04000000	| 10^16
	.long	0x00004069,0x9dc5ada8,0x2b70b59e	| 10^32
	.long	0x000040d3,0xc2781f49,0xffcfa6d5	| 10^64
	.long	0x000041a8,0x93ba47c9,0x80e98ce0	| 10^128
	.long	0x00004351,0xaa7eebfb,0x9df9de8e	| 10^256
	.long	0x000046a3,0xe319a0ae,0xa60e91c7	| 10^512
	.long	0x00004d48,0xc9767586,0x81750c17	| 10^1024
	.long	0x00005a92,0x9e8b3b5d,0xc53d5de5	| 10^2048
	.long	0x00007525,0xc4605202,0x8a20979b	| 10^4096
	.previous

fp_fmove_mem2fp:
	printf	PINSTR,"fmove %p,%p\n",2,%a0,%a1
	move.l	(%a1)+,(%a0)+
	move.l	(%a1)+,(%a0)+
	move.l	(%a1),(%a0)
	subq.l	#8,%a0
	rts

fpa_fsglmul:
	move.l	#fp_finalrounding_single_fast,(%sp)
	jra	fp_fsglmul

fpa_fsgldiv:
	move.l	#fp_finalrounding_single_fast,(%sp)
	jra	fp_fsgldiv

.macro	fp_dosingleprec instr
	printf	PINSTR,"single "
	move.l	#fp_finalrounding_single,(%sp)
	jra	\instr
.endm

.macro	fp_dodoubleprec instr
	printf	PINSTR,"double "
	move.l	#fp_finalrounding_double,(%sp)
	jra	\instr
.endm

fp_fsmove:
	fp_dosingleprec fp_fmove_mem2fp

fp_fssqrt:
	fp_dosingleprec fp_fsqrt

fp_fdmove:
	fp_dodoubleprec fp_fmove_mem2fp

fp_fdsqrt:
	fp_dodoubleprec fp_fsqrt

fp_fsabs:
	fp_dosingleprec fp_fabs

fp_fsneg:
	fp_dosingleprec fp_fneg

fp_fdabs:
	fp_dodoubleprec fp_fabs

fp_fdneg:
	fp_dodoubleprec fp_fneg

fp_fsdiv:
	fp_dosingleprec fp_fdiv

fp_fsadd:
	fp_dosingleprec fp_fadd

fp_fsmul:
	fp_dosingleprec fp_fmul

fp_fddiv:
	fp_dodoubleprec fp_fdiv

fp_fdadd:
	fp_dodoubleprec fp_fadd

fp_fdmul:
	fp_dodoubleprec fp_fmul

fp_fssub:
	fp_dosingleprec fp_fsub

fp_fdsub:
	fp_dodoubleprec fp_fsub

fp_nonstd:
	fp_get_pc %a0
	getuser.l (%a0),%d0,fp_err_ua1,%a0
	printf	,"nonstd ((%08x)=%08x)\n",2,%a0,%d0
	moveq	#-1,%d0
	rts

	.data
	.align	4

	| data sizes corresponding to the operand formats
fp_datasize:
	.word	4, 4, 12, 12, 2, 8, 1, 0
/*

  fp_trig.c: floating-point math routines for the Linux-m68k
  floating point emulator.

  Copyright (c) 1998-1999 David Huggins-Daines / Roman Zippel.

  I hereby give permission, free of charge, to copy, modify, and
  redistribute this software, in source or binary form, provided that
  the above copyright notice and the following disclaimer are included
  in all such copies.

  THIS SOFTWARE IS PROVIDED "AS IS", WITH ABSOLUTELY NO WARRANTY, REAL
  OR IMPLIED.

*/

#include "fp_emu.h"
#include "fp_trig.h"

struct fp_ext *
fp_fsin(struct fp_ext *dest, struct fp_ext *src)
{
	uprint("fsin\n");

	fp_monadic_check(dest, src);

	return dest;
}

struct fp_ext *
fp_fcos(struct fp_ext *dest, struct fp_ext *src)
{
	uprint("fcos\n");

	fp_monadic_check(dest, src);

	return dest;
}

struct fp_ext *
fp_ftan(struct fp_ext *dest, struct fp_ext *src)
{
	uprint("ftan\n");

	fp_monadic_check(dest, src);

	return dest;
}

struct fp_ext *
fp_fasin(struct fp_ext *dest, struct fp_ext *src)
{
	uprint("fasin\n");

	fp_monadic_check(dest, src);

	return dest;
}

struct fp_ext *
fp_facos(struct fp_ext *dest, struct fp_ext *src)
{
	uprint("facos\n");

	fp_monadic_check(dest, src);

	return dest;
}

struct fp_ext *
fp_fatan(struct fp_ext *dest, struct fp_ext *src)
{
	uprint("fatan\n");

	fp_monadic_check(dest, src);

	return dest;
}

struct fp_ext *
fp_fsinh(struct fp_ext *dest, struct fp_ext *src)
{
	uprint("fsinh\n");

	fp_monadic_check(dest, src);

	return dest;
}

struct fp_ext *
fp_fcosh(struct fp_ext *dest, struct fp_ext *src)
{
	uprint("fcosh\n");

	fp_monadic_check(dest, src);

	return dest;
}

struct fp_ext *
fp_ftanh(struct fp_ext *dest, struct fp_ext *src)
{
	uprint("ftanh\n");

	fp_monadic_check(dest, src);

	return dest;
}

struct fp_ext *
fp_fatanh(struct fp_ext *dest, struct fp_ext *src)
{
	uprint("fatanh\n");

	fp_monadic_check(dest, src);

	return dest;
}

struct fp_ext *
fp_fsincos0(struct fp_ext *dest, struct fp_ext *src)
{
	uprint("fsincos0\n");

	return dest;
}

struct fp_ext *
fp_fsincos1(struct fp_ext *dest, struct fp_ext *src)
{
	uprint("fsincos1\n");

	return dest;
}

struct fp_ext *
fp_fsincos2(struct fp_ext *dest, struct fp_ext *src)
{
	uprint("fsincos2\n");

	return dest;
}

struct fp_ext *
fp_fsincos3(struct fp_ext *dest, struct fp_ext *src)
{
	uprint("fsincos3\n");

	return dest;
}

struct fp_ext *
fp_fsincos4(struct fp_ext *dest, struct fp_ext *src)
{
	uprint("fsincos4\n");

	return dest;
}

struct fp_ext *
fp_fsincos5(struct fp_ext *dest, struct fp_ext *src)
{
	uprint("fsincos5\n");

	return dest;
}

struct fp_ext *
fp_fsincos6(struct fp_ext *dest, struct fp_ext *src)
{
	uprint("fsincos6\n");

	return dest;
}

struct fp_ext *
fp_fsincos7(struct fp_ext *dest, struct fp_ext *src)
{
	uprint("fsincos7\n");

	return dest;
}
/*

  fp_trig.h: floating-point math routines for the Linux-m68k
  floating point emulator.

  Copyright (c) 1998 David Huggins-Daines.

  I hereby give permission, free of charge, to copy, modify, and
  redistribute this software, in source or binary form, provided that
  the above copyright notice and the following disclaimer are included
  in all such copies.

  THIS SOFTWARE IS PROVIDED "AS IS", WITH ABSOLUTELY NO WARRANTY, REAL
  OR IMPLIED.

*/

#ifndef FP_TRIG_H
#define FP_TRIG_H

#include "fp_emu.h"

/* floating point trigonometric instructions:

   the arguments to these are in the "internal" extended format, that
   is, an "exploded" version of the 96-bit extended fp format used by
   the 68881.

   they return a status code, which should end up in %d0, if all goes
   well.  */

#endif /* FP_TRIG__H */
/*
 * fp_util.S
 *
 * Copyright Roman Zippel, 1997.  All rights reserved.
 *
 * Redistribution and use in source and binary forms, with or without
 * modification, are permitted provided that the following conditions
 * are met:
 * 1. Redistributions of source code must retain the above copyright
 *    notice, and the entire permission notice in its entirety,
 *    including the disclaimer of warranties.
 * 2. Redistributions in binary form must reproduce the above copyright
 *    notice, this list of conditions and the following disclaimer in the
 *    documentation and/or other materials provided with the distribution.
 * 3. The name of the author may not be used to endorse or promote
 *    products derived from this software without specific prior
 *    written permission.
 *
 * ALTERNATIVELY, this product may be distributed under the terms of
 * the GNU General Public License, in which case the provisions of the GPL are
 * required INSTEAD OF the above restrictions.  (This clause is
 * necessary due to a potential bad interaction between the GPL and
 * the restrictions contained in a BSD-style copyright.)
 *
 * THIS SOFTWARE IS PROVIDED ``AS IS'' AND ANY EXPRESS OR IMPLIED
 * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
 * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
 * DISCLAIMED.  IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT,
 * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
 * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
 * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
 * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
 * OF THE POSSIBILITY OF SUCH DAMAGE.
 */

#include <linux/config.h>
#include "fp_emu.h"

/*
 * Here are lots of conversion and normalization functions mainly
 * used by fp_scan.S
 * Note that these functions are optimized for "normal" numbers,
 * these are handled first and exit as fast as possible, this is
 * especially important for fp_normalize_ext/fp_conv_ext2ext, as
 * it's called very often.
 * The register usage is optimized for fp_scan.S and which register
 * is currently at that time unused, be careful if you want change
 * something here. %d0 and %d1 is always usable, sometimes %d2 (or
 * only the lower half) most function have to return the %a0
 * unmodified, so that the caller can immediatly reuse it.
 */

	.globl	fp_ill, fp_end

	| exits from fp_scan:
	| illegal instruction
fp_ill:
	printf	,"fp_illegal\n"
	rts
	| completed instruction
fp_end:
	tst.l	(TASK_MM-8,%a2)
	jmi	1f
	tst.l	(TASK_MM-4,%a2)
	jmi	1f
	tst.l	(TASK_MM,%a2)
	jpl	2f
1:	printf	,"oops:%p,%p,%p\n",3,%a2@(TASK_MM-8),%a2@(TASK_MM-4),%a2@(TASK_MM)
2:	clr.l	%d0
	rts

	.globl	fp_conv_long2ext, fp_conv_single2ext
	.globl	fp_conv_double2ext, fp_conv_ext2ext
	.globl	fp_normalize_ext, fp_normalize_double
	.globl	fp_normalize_single, fp_normalize_single_fast
	.globl	fp_conv_ext2double, fp_conv_ext2single
	.globl	fp_conv_ext2long, fp_conv_ext2short
	.globl	fp_conv_ext2byte
	.globl	fp_finalrounding_single, fp_finalrounding_single_fast
	.globl	fp_finalrounding_double
	.globl	fp_finalrounding, fp_finaltest, fp_final

/*
 * First several conversion functions from a source operand
 * into the extended format. Note, that only fp_conv_ext2ext
 * normalizes the number and is always called after the other
 * conversion functions, which only move the information into
 * fp_ext structure.
 */

	| fp_conv_long2ext:
	|
	| args:	%d0 = source (32-bit long)
	|	%a0 = destination (ptr to struct fp_ext)

fp_conv_long2ext:
	printf	PCONV,"l2e: %p -> %p(",2,%d0,%a0
	clr.l	%d1			| sign defaults to zero
	tst.l	%d0
	jeq	fp_l2e_zero		| is source zero?
	jpl	1f			| positive?
	moveq	#1,%d1
	neg.l	%d0
1:	swap	%d1
	move.w	#0x3fff+31,%d1
	move.l	%d1,(%a0)+		| set sign / exp
	move.l	%d0,(%a0)+		| set mantissa
	clr.l	(%a0)
	subq.l	#8,%a0			| restore %a0
	printx	PCONV,%a0@
	printf	PCONV,")\n"
	rts
	| source is zero
fp_l2e_zero:
	clr.l	(%a0)+
	clr.l	(%a0)+
	clr.l	(%a0)
	subq.l	#8,%a0
	printx	PCONV,%a0@
	printf	PCONV,")\n"
	rts

	| fp_conv_single2ext
	| args:	%d0 = source (single-precision fp value)
	|	%a0 = dest (struct fp_ext *)

fp_conv_single2ext:
	printf	PCONV,"s2e: %p -> %p(",2,%d0,%a0
	move.l	%d0,%d1
	lsl.l	#8,%d0			| shift mantissa
	lsr.l	#8,%d1			| exponent / sign
	lsr.l	#7,%d1
	lsr.w	#8,%d1
	jeq	fp_s2e_small		| zero / denormal?
	cmp.w	#0xff,%d1		| NaN / Inf?
	jeq	fp_s2e_large
	bset	#31,%d0			| set explizit bit
	add.w	#0x3fff-0x7f,%d1	| re-bias the exponent.
9:	move.l	%d1,(%a0)+		| fp_ext.sign, fp_ext.exp
	move.l	%d0,(%a0)+		| high lword of fp_ext.mant
	clr.l	(%a0)			| low lword = 0
	subq.l	#8,%a0
	printx	PCONV,%a0@
	printf	PCONV,")\n"
	rts
	| zeros and denormalized
fp_s2e_small:
	| exponent is zero, so explizit bit is already zero too
	tst.l	%d0
	jeq	9b
	move.w	#0x4000-0x7f,%d1
	jra	9b
	| infinities and NAN
fp_s2e_large:
	bclr	#31,%d0			| clear explizit bit
	move.w	#0x7fff,%d1
	jra	9b

fp_conv_double2ext:
#ifdef FPU_EMU_DEBUG
	getuser.l %a1@(0),%d0,fp_err_ua2,%a1
	getuser.l %a1@(4),%d1,fp_err_ua2,%a1
	printf	PCONV,"d2e: %p%p -> %p(",3,%d0,%d1,%a0
#endif
	getuser.l (%a1)+,%d0,fp_err_ua2,%a1
	move.l	%d0,%d1
	lsl.l	#8,%d0			| shift high mantissa
	lsl.l	#3,%d0
	lsr.l	#8,%d1			| exponent / sign
	lsr.l	#7,%d1
	lsr.w	#5,%d1
	jeq	fp_d2e_small		| zero / denormal?
	cmp.w	#0x7ff,%d1		| NaN / Inf?
	jeq	fp_d2e_large
	bset	#31,%d0			| set explizit bit
	add.w	#0x3fff-0x3ff,%d1	| re-bias the exponent.
9:	move.l	%d1,(%a0)+		| fp_ext.sign, fp_ext.exp
	move.l	%d0,(%a0)+
	getuser.l (%a1)+,%d0,fp_err_ua2,%a1
	move.l	%d0,%d1
	lsl.l	#8,%d0
	lsl.l	#3,%d0
	move.l	%d0,(%a0)
	moveq	#21,%d0
	lsr.l	%d0,%d1
	or.l	%d1,-(%a0)
	subq.l	#4,%a0
	printx	PCONV,%a0@
	printf	PCONV,")\n"
	rts
	| zeros and denormalized
fp_d2e_small:
	| exponent is zero, so explizit bit is already zero too
	tst.l	%d0
	jeq	9b
	move.w	#0x4000-0x3ff,%d1
	jra	9b
	| infinities and NAN
fp_d2e_large:
	bclr	#31,%d0			| clear explizit bit
	move.w	#0x7fff,%d1
	jra	9b

	| fp_conv_ext2ext:
	| originally used to get longdouble from userspace, now it's
	| called before arithmetic operations to make sure the number
	| is normalized [maybe rename it?].
	| args:	%a0 = dest (struct fp_ext *)
	| returns 0 in %d0 for a NaN, otherwise 1

fp_conv_ext2ext:
	printf	PCONV,"e2e: %p(",1,%a0
	printx	PCONV,%a0@
	printf	PCONV,"), "
	move.l	(%a0)+,%d0
	cmp.w	#0x7fff,%d0		| Inf / NaN?
	jeq	fp_e2e_large
	move.l	(%a0),%d0
	jpl	fp_e2e_small		| zero / denorm?
	| The high bit is set, so normalization is irrelevant.
fp_e2e_checkround:
	subq.l	#4,%a0
#ifdef CONFIG_M68KFPU_EMU_EXTRAPREC
	move.b	(%a0),%d0
	jne	fp_e2e_round
#endif
	printf	PCONV,"%p(",1,%a0
	printx	PCONV,%a0@
	printf	PCONV,")\n"
	moveq	#1,%d0
	rts
#ifdef CONFIG_M68KFPU_EMU_EXTRAPREC
fp_e2e_round:
	fp_set_sr FPSR_EXC_INEX2
	clr.b	(%a0)
	move.w	(FPD_RND,FPDATA),%d2
	jne	fp_e2e_roundother	| %d2 == 0, round to nearest
	tst.b	%d0			| test guard bit
	jpl	9f			| zero is closer
	btst	#0,(11,%a0)		| test lsb bit
	jne	fp_e2e_doroundup	| round to infinity
	lsl.b	#1,%d0			| check low bits
	jeq	9f			| round to zero
fp_e2e_doroundup:
	addq.l	#1,(8,%a0)
	jcc	9f
	addq.l	#1,(4,%a0)
	jcc	9f
	move.w	#0x8000,(4,%a0)
	addq.w	#1,(2,%a0)
9:	printf	PNORM,"%p(",1,%a0
	printx	PNORM,%a0@
	printf	PNORM,")\n"
	rts
fp_e2e_roundother:
	subq.w	#2,%d2
	jcs	9b			| %d2 < 2, round to zero
	jhi	1f			| %d2 > 2, round to +infinity
	tst.b	(1,%a0)			| to -inf
	jne	fp_e2e_doroundup	| negative, round to infinity
	jra	9b			| positive, round to zero
1:	tst.b	(1,%a0)			| to +inf
	jeq	fp_e2e_doroundup	| positive, round to infinity
	jra	9b			| negative, round to zero
#endif
	| zeros and subnormals:
	| try to normalize these anyway.
fp_e2e_small:
	jne	fp_e2e_small1		| high lword zero?
	move.l	(4,%a0),%d0
	jne	fp_e2e_small2
#ifdef CONFIG_M68KFPU_EMU_EXTRAPREC
	clr.l	%d0
	move.b	(-4,%a0),%d0
	jne	fp_e2e_small3
#endif
	| Genuine zero.
	clr.w	-(%a0)
	subq.l	#2,%a0
	printf	PNORM,"%p(",1,%a0
	printx	PNORM,%a0@
	printf	PNORM,")\n"
	moveq	#1,%d0
	rts
	| definitely subnormal, need to shift all 64 bits
fp_e2e_small1:
	bfffo	%d0{#0,#32},%d1
	move.w	-(%a0),%d2
	sub.w	%d1,%d2
	jcc	1f
	| Pathologically small, denormalize.
	add.w	%d2,%d1
	clr.w	%d2
1:	move.w	%d2,(%a0)+
	move.w	%d1,%d2
	jeq	fp_e2e_checkround
	| fancy 64-bit double-shift begins here
	lsl.l	%d2,%d0
	move.l	%d0,(%a0)+
	move.l	(%a0),%d0
	move.l	%d0,%d1
	lsl.l	%d2,%d0
	move.l	%d0,(%a0)
	neg.w	%d2
	and.w	#0x1f,%d2
	lsr.l	%d2,%d1
	or.l	%d1,-(%a0)
#ifdef CONFIG_M68KFPU_EMU_EXTRAPREC
fp_e2e_extra1:
	clr.l	%d0
	move.b	(-4,%a0),%d0
	neg.w	%d2
	add.w	#24,%d2
	jcc	1f
	clr.b	(-4,%a0)
	lsl.l	%d2,%d0
	or.l	%d0,(4,%a0)
	jra	fp_e2e_checkround
1:	addq.w	#8,%d2
	lsl.l	%d2,%d0
	move.b	%d0,(-4,%a0)
	lsr.l	#8,%d0
	or.l	%d0,(4,%a0)
#endif
	jra	fp_e2e_checkround
	| pathologically small subnormal
fp_e2e_small2:
	bfffo	%d0{#0,#32},%d1
	add.w	#32,%d1
	move.w	-(%a0),%d2
	sub.w	%d1,%d2
	jcc	1f
	| Beyond pathologically small, denormalize.
	add.w	%d2,%d1
	clr.w	%d2
1:	move.w	%d2,(%a0)+
	ext.l	%d1
	jeq	fp_e2e_checkround
	clr.l	(4,%a0)
	sub.w	#32,%d2
	jcs	1f
	lsl.l	%d1,%d0			| lower lword needs only to be shifted
	move.l	%d0,(%a0)		| into the higher lword
#ifdef CONFIG_M68KFPU_EMU_EXTRAPREC
	clr.l	%d0
	move.b	(-4,%a0),%d0
	clr.b	(-4,%a0)
	neg.w	%d1
	add.w	#32,%d1
	bfins	%d0,(%a0){%d1,#8}
#endif
	jra	fp_e2e_checkround
1:	neg.w	%d1			| lower lword is splitted between
	bfins	%d0,(%a0){%d1,#32}	| higher and lower lword
#ifndef CONFIG_M68KFPU_EMU_EXTRAPREC
	jra	fp_e2e_checkround
#else
	move.w	%d1,%d2
	jra	fp_e2e_extra1
	| These are extremely small numbers, that will mostly end up as zero
	| anyway, so this is only important for correct rounding.
fp_e2e_small3:
	bfffo	%d0{#24,#8},%d1
	add.w	#40,%d1
	move.w	-(%a0),%d2
	sub.w	%d1,%d2
	jcc	1f
	| Pathologically small, denormalize.
	add.w	%d2,%d1
	clr.w	%d2
1:	move.w	%d2,(%a0)+
	ext.l	%d1
	jeq	fp_e2e_checkround
	cmp.w	#8,%d1
	jcs	2f
1:	clr.b	(-4,%a0)
	sub.w	#64,%d1
	jcs	1f
	add.w	#24,%d1
	lsl.l	%d1,%d0
	move.l	%d0,(%a0)
	jra	fp_e2e_checkround
1:	neg.w	%d1
	bfins	%d0,(%a0){%d1,#8}
	jra	fp_e2e_checkround
2:	lsl.l	%d1,%d0
	move.b	%d0,(-4,%a0)
	lsr.l	#8,%d0
	move.b	%d0,(7,%a0)
	jra	fp_e2e_checkround
#endif
1:	move.l	%d0,%d1			| lower lword is splitted between
	lsl.l	%d2,%d0			| higher and lower lword
	move.l	%d0,(%a0)
	move.l	%d1,%d0
	neg.w	%d2
	add.w	#32,%d2
	lsr.l	%d2,%d0
	move.l	%d0,-(%a0)
	jra	fp_e2e_checkround
	| Infinities and NaNs
fp_e2e_large:
	move.l	(%a0)+,%d0
	jne	3f
1:	tst.l	(%a0)
	jne	4f
	moveq	#1,%d0
2:	subq.l	#8,%a0
	printf	PCONV,"%p(",1,%a0
	printx	PCONV,%a0@
	printf	PCONV,")\n"
	rts
	| we have maybe a NaN, shift off the highest bit
3:	lsl.l	#1,%d0
	jeq	1b
	| we have a NaN, clear the return value
4:	clrl	%d0
	jra	2b


/*
 * Normalization functions.  Call these on the output of general
 * FP operators, and before any conversion into the destination
 * formats. fp_normalize_ext has always to be called first, the
 * following conversion functions expect an already normalized
 * number.
 */

	| fp_normalize_ext:
	| normalize an extended in extended (unpacked) format, basically
	| it does the same as fp_conv_ext2ext, additionally it also does
	| the necessary postprocessing checks.
	| args:	%a0 (struct fp_ext *)
	| NOTE: it does _not_ modify %a0/%a1 and the upper word of %d2

fp_normalize_ext:
	printf	PNORM,"ne: %p(",1,%a0
	printx	PNORM,%a0@
	printf	PNORM,"), "
	move.l	(%a0)+,%d0
	cmp.w	#0x7fff,%d0		| Inf / NaN?
	jeq	fp_ne_large
	move.l	(%a0),%d0
	jpl	fp_ne_small		| zero / denorm?
	| The high bit is set, so normalization is irrelevant.
fp_ne_checkround:
	subq.l	#4,%a0
#ifdef CONFIG_M68KFPU_EMU_EXTRAPREC
	move.b	(%a0),%d0
	jne	fp_ne_round
#endif
	printf	PNORM,"%p(",1,%a0
	printx	PNORM,%a0@
	printf	PNORM,")\n"
	rts
#ifdef CONFIG_M68KFPU_EMU_EXTRAPREC
fp_ne_round:
	fp_set_sr FPSR_EXC_INEX2
	clr.b	(%a0)
	move.w	(FPD_RND,FPDATA),%d2
	jne	fp_ne_roundother	| %d2 == 0, round to nearest
	tst.b	%d0			| test guard bit
	jpl	9f			| zero is closer
	btst	#0,(11,%a0)		| test lsb bit
	jne	fp_ne_doroundup		| round to infinity
	lsl.b	#1,%d0			| check low bits
	jeq	9f			| round to zero
fp_ne_doroundup:
	addq.l	#1,(8,%a0)
	jcc	9f
	addq.l	#1,(4,%a0)
	jcc	9f
	addq.w	#1,(2,%
   /home/me/kernel/linux/include/linux/slab.h \
   /home/me/kernel/linux/include/linux/ioport.h \
   /home/me/kernel/linux/include/linux/kernel.h \
   /home/me/kernel/linux/include/linux/stat.h \
   /home/me/kernel/linux/include/linux/blk.h \
   /home/me/kernel/linux/include/linux/interrupt.h \
   /home/me/kernel/linux/include/linux/delay.h \
   /home/me/kernel/linux/include/linux/smp_lock.h \
   /home/me/kernel/linux/include/linux/unistd.h \
   /home/me/kernel/linux/include/asm/system.h \
   /home/me/kernel/linux/include/asm/irq.h \
   /home/me/kernel/linux/include/asm/dma.h \
   scsi.h \
   hosts.h \
   constants.h
scsi_ioctl.o: scsi_ioctl.c \
   /home/me/kernel/linux/include/linux/module.h \
   /home/me/kernel/linux/include/asm/io.h \
   /home/me/kernel/linux/include/asm/uaccess.h \
   /home/me/kernel/linux/include/asm/system.h \
   /home/me/kernel/linux/include/asm/page.h \
   /home/me/kernel/linux/include/linux/interrupt.h \
   /home/me/kernel/linux/include/linux/errno.h \
   /home/me/kernel/linux/include/linux/kernel.h \
   /home/me/kernel/linux/include/linux/sched.h \
   /home/me/kernel/linux/include/linux/mm.h \
   /home/me/kernel/linux/include/linux/string.h \
   /home/me/kernel/linux/include/linux/blk.h \
   scsi.h \
   hosts.h \
   /home/me/kernel/linux/include/scsi/scsi_ioctl.h
scsi_lib.o: scsi_lib.c \
   /home/me/kernel/linux/include/linux/module.h \
   /home/me/kernel/linux/include/linux/sched.h \
   /home/me/kernel/linux/include/linux/timer.h \
   /home/me/kernel/linux/include/linux/string.h \
   /home/me/kernel/linux/include/linux/slab.h \
   /home/me/kernel/linux/include/linux/ioport.h \
   /home/me/kernel/linux/include/linux/kernel.h \
   /home/me/kernel/linux/include/linux/stat.h \
   /home/me/kernel/linux/include/linux/blk.h \
   /home/me/kernel/linux/include/linux/interrupt.h \
   /home/me/kernel/linux/include/linux/delay.h \
   /home/me/kernel/linux/include/linux/smp_lock.h \
   /home/me/kernel/linux/include/linux/completion.h \
   /home/me/kernel/linux/include/linux/unistd.h \
   /home/me/kernel/linux/include/asm/system.h \
   /home/me/kernel/linux/include/asm/irq.h \
   /home/me/kernel/linux/include/asm/dma.h \
   scsi.h \
   hosts.h \
   constants.h \
   /home/me/kernel/linux/include/scsi/scsi_ioctl.h
scsi_merge.o: scsi_merge.c \
   /home/me/kernel/linux/include/linux/module.h \
   /home/me/kernel/linux/include/linux/sched.h \
   /home/me/kernel/linux/include/linux/timer.h \
   /home/me/kernel/linux/include/linux/string.h \
   /home/me/kernel/linux/include/linux/slab.h \
   /home/me/kernel/linux/include/linux/ioport.h \
   /home/me/kernel/linux/include/linux/kernel.h \
   /home/me/kernel/linux/include/linux/stat.h \
   /home/me/kernel/linux/include/linux/blk.h \
   /home/me/kernel/linux/include/linux/interrupt.h \
   /home/me/kernel/linux/include/linux/delay.h \
   /home/me/kernel/linux/include/linux/smp_lock.h \
   /home/me/kernel/linux/include/linux/unistd.h \
   /home/me/kernel/linux/include/asm/system.h \
   /home/me/kernel/linux/include/asm/irq.h \
   /home/me/kernel/linux/include/asm/dma.h \
   /home/me/kernel/linux/include/asm/io.h \
   scsi.h \
   hosts.h \
   constants.h \
   /home/me/kernel/linux/include/scsi/scsi_ioctl.h \
   $(wildcard /home/me/kernel/linux/include/config/scsi/debug/queues.h)
scsi_module.o: scsi_module.c \
   /home/me/kernel/linux/include/linux/module.h \
   /home/me/kernel/linux/include/linux/init.h
scsi_obsolete.o: scsi_obsolete.c \
   /home/me/kernel/linux/include/linux/module.h \
   /home/me/kernel/linux/include/linux/sched.h \
   /home/me/kernel/linux/include/linux/timer.h \
   /home/me/kernel/linux/include/linux/string.h \
   /home/me/kernel/linux/include/linux/slab.h \
   /home/me/kernel/linux/include/linux/ioport.h \
   /home/me/kernel/linux/include/linux/kernel.h \
   /home/me/kernel/linux/include/linux/stat.h \
   /home/me/kernel/linux/include/linux/blk.h \
   /home/me/kernel/linux/include/linux/interrupt.h \
   /home/me/kernel/linux/include/linux/delay.h \
   /home/me/kernel/linux/include/asm/system.h \
   /home/me/kernel/linux/include/asm/irq.h \
   /home/me/kernel/linux/include/asm/dma.h \
   scsi.h \
   hosts.h \
   constants.h
scsi_proc.o: scsi_proc.c \
   /home/me/kernel/linux/include/linux/module.h \
   /home/me/kernel/linux/include/linux/string.h \
   /home/me/kernel/linux/include/linux/mm.h \
   /home/me/kernel/linux/include/linux/slab.h \
   /home/me/kernel/linux/include/linux/proc_fs.h \
   /home/me/kernel/linux/include/linux/errno.h \
   /home/me/kernel/linux/include/linux/stat.h \
   /home/me/kernel/linux/include/linux/blk.h \
   /home/me/kernel/linux/include/asm/uaccess.h \
   scsi.h \
   hosts.h \
   $(wildcard /home/me/kernel/linux/include/config/proc/fs.h)
scsi_queue.o: scsi_queue.c \
   /home/me/kernel/linux/include/linux/module.h \
   /home/me/kernel/linux/include/linux/sched.h \
   /home/me/kernel/linux/include/linux/timer.h \
   /home/me/kernel/linux/include/linux/string.h \
   /home/me/kernel/linux/include/linux/slab.h \
   /home/me/kernel/linux/include/linux/ioport.h \
   /home/me/kernel/linux/include/linux/kernel.h \
   /home/me/kernel/linux/include/linux/stat.h \
   /home/me/kernel/linux/include/linux/blk.h \
   /home/me/kernel/linux/include/linux/interrupt.h \
   /home/me/kernel/linux/include/linux/delay.h \
   /home/me/kernel/linux/include/linux/smp_lock.h \
   /home/me/kernel/linux/include/linux/unistd.h \
   /home/me/kernel/linux/include/asm/system.h \
   /home/me/kernel/linux/include/asm/irq.h \
   /home/me/kernel/linux/include/asm/dma.h \
   scsi.h \
   hosts.h \
   constants.h
scsi_scan.o: scsi_scan.c \
   /home/me/kernel/linux/include/linux/module.h \
   /home/me/kernel/linux/include/linux/init.h \
   /home/me/kernel/linux/include/linux/blk.h \
   scsi.h \
   hosts.h \
   constants.h \
   $(wildcard /home/me/kernel/linux/include/config/kmod.h) \
   /home/me/kernel/linux/include/linux/kmod.h \
   $(wildcard /home/me/kernel/linux/include/config/scsi/multi/lun.h)
scsi_syms.o: scsi_syms.c \
   /home/me/kernel/linux/include/linux/module.h \
   /home/me/kernel/linux/include/linux/sched.h \
   /home/me/kernel/linux/include/linux/timer.h \
   /home/me/kernel/linux/include/linux/string.h \
   /home/me/kernel/linux/include/linux/slab.h \
   /home/me/kernel/linux/include/linux/ioport.h \
   /home/me/kernel/linux/include/linux/kernel.h \
   /home/me/kernel/linux/include/linux/blk.h \
   /home/me/kernel/linux/include/linux/fs.h \
   /home/me/kernel/linux/include/asm/system.h \
   /home/me/kernel/linux/include/asm/irq.h \
   /home/me/kernel/linux/include/asm/dma.h \
   scsi.h \
   /home/me/kernel/linux/include/scsi/scsi_ioctl.h \
   hosts.h \
   constants.h \
   sd.h \
   /home/me/kernel/linux/include/scsi/scsicam.h \
   $(wildcard /home/me/kernel/linux/include/config/scsi/logging.h)
scsicam.o: scsicam.c \
   /home/me/kernel/linux/include/linux/module.h \
   /home/me/kernel/linux/include/linux/fs.h \
   /home/me/kernel/linux/include/linux/genhd.h \
   /home/me/kernel/linux/include/linux/kernel.h \
   /home/me/kernel/linux/include/linux/blk.h \
   /home/me/kernel/linux/include/asm/unaligned.h \
   scsi.h \
   hosts.h \
   sd.h \
   /home/me/kernel/linux/include/scsi/scsicam.h
sd.o: sd.c \
   /home/me/kernel/linux/include/linux/module.h \
   /home/me/kernel/linux/include/linux/fs.h \
   /home/me/kernel/linux/include/linux/kernel.h \
   /home/me/kernel/linux/include/linux/sched.h \
   /home/me/kernel/linux/include/linux/mm.h \
   /home/me/kernel/linux/include/linux/string.h \
   /home/me/kernel/linux/include/linux/hdreg.h \
   /home/me/kernel/linux/include/linux/errno.h \
   /home/me/kernel/linux/include/linux/interrupt.h \
   /home/me/kernel/linux/include/linux/init.h \
   /home/me/kernel/linux/include/linux/smp.h \
   /home/me/kernel/linux/include/asm/uaccess.h \
   /home/me/kernel/linux/include/asm/system.h \
   /home/me/kernel/linux/include/asm/io.h \
   /home/me/kernel/linux/include/linux/blk.h \
   /home/me/kernel/linux/include/linux/blkpg.h \
   scsi.h \
   hosts.h \
   sd.h \
   /home/me/kernel/linux/include/scsi/scsi_ioctl.h \
   constants.h \
   /home/me/kernel/linux/include/scsi/scsicam.h \
   /home/me/kernel/linux/include/linux/genhd.h \
   $(wia0)
	move.w	#0x8000,(4,%a0)
9:	printf	PNORM,"%p(",1,%a0
	printx	PNORM,%a0@
	printf	PNORM,")\n"
	rts
fp_ne_roundother:
	subq.w	#2,%d2
	jcs	9b			| %d2 < 2, round to zero
	jhi	1f			| %d2 > 2, round to +infinity
	tst.b	(1,%a0)			| to -inf
	jne	fp_ne_doroundup		| negative, round to infinity
	jra	9b			| positive, round to zero
1:	tst.b	(1,%a0)			| to +inf
	jeq	fp_ne_doroundup		| positive, round to infinity
	jra	9b			| negative, round to zero
#endif
	| Zeros and subnormal numbers
	| These are probably merely subnormal, rather than "denormalized"
	|  numbers, so we will try to make them normal again.
fp_ne_small:
	jne	fp_ne_small1		| high lword zero?
	move.l	(4,%a0),%d0
	jne	fp_ne_small2
#ifdef CONFIG_M68KFPU_EMU_EXTRAPREC
	clr.l	%d0
	move.b	(-4,%a0),%d0
	jne	fp_ne_small3
#endif
	| Genuine zero.
	clr.w	-(%a0)
	subq.l	#2,%a0
	printf	PNORM,"%p(",1,%a0
	printx	PNORM,%a0@
	printf	PNORM,")\n"
	rts
	| Subnormal.
fp_ne_small1:
	bfffo	%d0{#0,#32},%d1
	move.w	-(%a0),%d2
	sub.w	%d1,%d2
	jcc	1f
	| Pathologically small, denormalize.
	add.w	%d2,%d1
	clr.w	%d2
	fp_set_sr FPSR_EXC_UNFL
1:	move.w	%d2,(%a0)+
	move.w	%d1,%d2
	jeq	fp_ne_checkround
	| This is exactly the same 64-bit double shift as seen above.
	lsl.l	%d2,%d0
	move.l	%d0,(%a0)+
	move.l	(%a0),%d0
	move.l	%d0,%d1
	lsl.l	%d2,%d0
	move.l	%d0,(%a0)
	neg.w	%d2
	and.w	#0x1f,%d2
	lsr.l	%d2,%d1
	or.l	%d1,-(%a0)
#ifdef CONFIG_M68KFPU_EMU_EXTRAPREC
fp_ne_extra1:
	clr.l	%d0
	move.b	(-4,%a0),%d0
	neg.w	%d2
	add.w	#24,%d2
	jcc	1f
	clr.b	(-4,%a0)
	lsl.l	%d2,%d0
	or.l	%d0,(4,%a0)
	jra	fp_ne_checkround
1:	addq.w	#8,%d2
	lsl.l	%d2,%d0
	move.b	%d0,(-4,%a0)
	lsr.l	#8,%d0
	or.l	%d0,(4,%a0)
#endif
	jra	fp_ne_checkround
	| May or may not be subnormal, if so, only 32 bits to shift.
fp_ne_small2:
	bfffo	%d0{#0,#32},%d1
	add.w	#32,%d1
	move.w	-(%a0),%d2
	sub.w	%d1,%d2
	jcc	1f
	| Beyond pathologically small, denormalize.
	add.w	%d2,%d1
	clr.w	%d2
	fp_set_sr FPSR_EXC_UNFL
1:	move.w	%d2,(%a0)+
	ext.l	%d1
	jeq	fp_ne_checkround
	clr.l	(4,%a0)
	sub.w	#32,%d1
	jcs	1f
	lsl.l	%d1,%d0			| lower lword needs only to be shifted
	move.l	%d0,(%a0)		| into the higher lword
#ifdef CONFIG_M68KFPU_EMU_EXTRAPREC
	clr.l	%d0
	move.b	(-4,%a0),%d0
	clr.b	(-4,%a0)
	neg.w	%d1
	add.w	#32,%d1
	bfins	%d0,(%a0){%d1,#8}
#endif
	jra	fp_ne_checkround
1:	neg.w	%d1			| lower lword is splitted between
	bfins	%d0,(%a0){%d1,#32}	| higher and lower lword
#ifndef CONFIG_M68KFPU_EMU_EXTRAPREC
	jra	fp_ne_checkround
#else
	move.w	%d1,%d2
	jra	fp_ne_extra1
	| These are extremely small numbers, that will mostly end up as zero
	| anyway, so this is only important for correct rounding.
fp_ne_small3:
	bfffo	%d0{#24,#8},%d1
	add.w	#40,%d1
	move.w	-(%a0),%d2
	sub.w	%d1,%d2
	jcc	1f
	| Pathologically small, denormalize.
	add.w	%d2,%d1
	clr.w	%d2
1:	move.w	%d2,(%a0)+
	ext.l	%d1
	jeq	fp_ne_checkround
	cmp.w	#8,%d1
	jcs	2f
1:	clr.b	(-4,%a0)
	sub.w	#64,%d1
	jcs	1f
	add.w	#24,%d1
	lsl.l	%d1,%d0
	move.l	%d0,(%a0)
	jra	fp_ne_checkround
1:	neg.w	%d1
	bfins	%d0,(%a0){%d1,#8}
	jra	fp_ne_checkround
2:	lsl.l	%d1,%d0
	move.b	%d0,(-4,%a0)
	lsr.l	#8,%d0
	move.b	%d0,(7,%a0)
	jra	fp_ne_checkround
#endif
	| Infinities and NaNs, again, same as above.
fp_ne_large:
	move.l	(%a0)+,%d0
	jne	3f
1:	tst.l	(%a0)
	jne	4f
2:	subq.l	#8,%a0
	printf	PNORM,"%p(",1,%a0
	printx	PNORM,%a0@
	printf	PNORM,")\n"
	rts
	| we have maybe a NaN, shift off the highest bit
3:	move.l	%d0,%d1
	lsl.l	#1,%d1
	jne	4f
	clr.l	(-4,%a0)
	jra	1b
	| we have a NaN, test if it is signaling
4:	bset	#30,%d0
	jne	2b
	fp_set_sr FPSR_EXC_SNAN
	move.l	%d0,(-4,%a0)
	jra	2b

	| these next two do rounding as per the IEEE standard.
	| values for the rounding modes appear to be:
	| 0:	Round to nearest
	| 1:	Round to zero
	| 2:	Round to -Infinity
	| 3:	Round to +Infinity
	| both functions expect that fp_normalize was already
	| called (and extended argument is already normalized
	| as far as possible), these are used if there is different
	| rounding precision is selected and before converting
	| into single/double

	| fp_normalize_double:
	| normalize an extended with double (52-bit) precision
	| args:	 %a0 (struct fp_ext *)

fp_normalize_double:
	printf	PNORM,"nd: %p(",1,%a0
	printx	PNORM,%a0@
	printf	PNORM,"), "
	move.l	(%a0)+,%d2
	tst.w	%d2
	jeq	fp_nd_zero		| zero / denormalized
	cmp.w	#0x7fff,%d2
	jeq	fp_nd_huge		| NaN / infinitive.
	sub.w	#0x4000-0x3ff,%d2	| will the exponent fit?
	jcs	fp_nd_small		| too small.
	cmp.w	#0x7fe,%d2
	jcc	fp_nd_large		| too big.
	addq.l	#4,%a0
	move.l	(%a0),%d0		| low lword of mantissa
	| now, round off the low 11 bits.
fp_nd_round:
	moveq	#21,%d1
	lsl.l	%d1,%d0			| keep 11 low bits.
	jne	fp_nd_checkround	| Are they non-zero?
	| nothing to do here
9:	subq.l	#8,%a0
	printf	PNORM,"%p(",1,%a0
	printx	PNORM,%a0@
	printf	PNORM,")\n"
	rts
	| Be careful with the X bit! It contains the lsb
	| from the shift above, it is needed for round to nearest.
fp_nd_checkround:
	fp_set_sr FPSR_EXC_INEX2	| INEX2 bit
	and.w	#0xf800,(2,%a0)		| clear bits 0-10
	move.w	(FPD_RND,FPDATA),%d2	| rounding mode
	jne	2f			| %d2 == 0, round to nearest
	tst.l	%d0			| test guard bit
	jpl	9b			| zero is closer
	| here we test the X bit by adding it to %d2
	clr.w	%d2			| first set z bit, addx only clears it
	addx.w	%d2,%d2			| test lsb bit
	| IEEE754-specified "round to even" behaviour.  If the guard
	| bit is set, then the number is odd, so rounding works like
	| in grade-school arithmetic (i.e. 1.5 rounds to 2.0)
	| Otherwise, an equal distance rounds towards zero, so as not
	| to produce an odd number.  This is strange, but it is what
	| the standard says.
	jne	fp_nd_doroundup		| round to infinity
	lsl.l	#1,%d0			| check low bits
	jeq	9b			| round to zero
fp_nd_doroundup:
	| round (the mantissa, that is) towards infinity
	add.l	#0x800,(%a0)
	jcc	9b			| no overflow, good.
	addq.l	#1,-(%a0)		| extend to high lword
	jcc	1f			| no overflow, good.
	| Yow! we have managed to overflow the mantissa.  Since this
	| only happens when %d1 was 0xfffff800, it is now zero, so
	| reset the high bit, and increment the exponent.
	move.w	#0x8000,(%a0)
	addq.w	#1,-(%a0)
	cmp.w	#0x43ff,(%a0)+		| exponent now overflown?
	jeq	fp_nd_large		| yes, so make it infinity.
1:	subq.l	#4,%a0
	printf	PNORM,"%p(",1,%a0
	printx	PNORM,%a0@
	printf	PNORM,")\n"
	rts
2:	subq.w	#2,%d2
	jcs	9b			| %d2 < 2, round to zero
	jhi	3f			| %d2 > 2, round to +infinity
	| Round to +Inf or -Inf.  High word of %d2 contains the
	| sign of the number, by the way.
	swap	%d2			| to -inf
	tst.b	%d2
	jne	fp_nd_doroundup		| negative, round to infinity
	jra	9b			| positive, round to zero
3:	swap	%d2			| to +inf
	tst.b	%d2
	jeq	fp_nd_doroundup		| positive, round to infinity
	jra	9b			| negative, round to zero
	| Exponent underflow.  Try to make a denormal, and set it to
	| the smallest possible fraction if this fails.
fp_nd_small:
	fp_set_sr FPSR_EXC_UNFL		| set UNFL bit
	move.w	#0x3c01,(-2,%a0)	| 2**-1022
	neg.w	%d2			| degree of underflow
	cmp.w	#32,%d2			| single or double shift?
	jcc	1f
	| Again, another 64-bit double shift.
	move.l	(%a0),%d0
	move.l	%d0,%d1
	lsr.l	%d2,%d0
	move.l	%d0,(%a0)+
	move.l	(%a0),%d0
	lsr.l	%d2,%d0
	neg.w	%d2
	add.w	#32,%d2
	lsl.l	%d2,%d1
	or.l	%d1,%d0
	move.l	(%a0),%d1
	move.l	%d0,(%a0)
	| Check to see if we shifted off any significant bits
	lsl.l	%d2,%d1
	jeq	fp_nd_round		| Nope, round.
	bset	#0,%d0			| Yes, so set the "sticky bit".
	jra	fp_nd_round		| Now, round.
	| Another 64-bit single shift and store
1:	sub.w	#32,%d2
	cmp.w	#32,%d2			| Do we really need to shift?
	jcc	2f			| No, the number is too small.
	move.l	(%a0),%d0
	clr.l	(%a0)+
	move.l	%d0,%d1
	lsr.l	%d2,%d0
	neg.w	%d2
	add.w	#32,%d2
	| Again, check to see if we shifted off any significant bits.
	tst.l	(%a0)
	jeq	1f
	bset	#0,%d0			| Sticky bit.
1:	move.l	%d0,(%a0)
	lsl.l	%d2,%d1
	jeq	fp_nd_round
	bset	#0,%d0
	jra	fp_nd_round
	| Sorry, the number is just too small.
2:	clr.l	(%a0)+
	clr.l	(%a0)
	moveq	#1,%d0			| Smallest possible fraction,
	jra	fp_nd_round		| round as desired.
	| zero and denormalized
fp_nd_zero:
	tst.l	(%a0)+
	jne	1f
	tst.l	(%a0)
	jne	1f
	subq.l	#8,%a0
	printf	PNORM,"%p(",1,%a0
	printx	PNORM,%a0@
	printf	PNORM,")\n"
	rts				| zero.  nothing to do.
	| These are not merely subnormal numbers, but true denormals,
	| i.e. pathologically small (exponent is 2**-16383) numbers.
	| It is clearly impossible for even a normal extended number
	| with that exponent to fit into double precision, so just
	| write these ones off as "too darn small".
1:	fp_set_sr FPSR_EXC_UNFL		| Set UNFL bit
	clr.l	(%a0)
	clr.l	-(%a0)
	move.w	#0x3c01,-(%a0)		| i.e. 2**-1022
	addq.l	#6,%a0
	moveq	#1,%d0
	jra	fp_nd_round		| round.
	| Exponent overflow.  Just call it infinity.
fp_nd_large:
	move.w	#0x7ff,%d0
	and.w	(6,%a0),%d0
	jeq	1f
	fp_set_sr FPSR_EXC_INEX2
1:	fp_set_sr FPSR_EXC_OVFL
	move.w	(FPD_RND,FPDATA),%d2
	jne	3f			| %d2 = 0 round to nearest
1:	move.w	#0x7fff,(-2,%a0)
	clr.l	(%a0)+
	clr.l	(%a0)
2:	subq.l	#8,%a0
	printf	PNORM,"%p(",1,%a0
	printx	PNORM,%a0@
	printf	PNORM,")\n"
	rts
3:	subq.w	#2,%d2
	jcs	5f			| %d2 < 2, round to zero
	jhi	4f			| %d2 > 2, round to +infinity
	tst.b	(-3,%a0)		| to -inf
	jne	1b
	jra	5f
4:	tst.b	(-3,%a0)		| to +inf
	jeq	1b
5:	move.w	#0x43fe,(-2,%a0)
	moveq	#-1,%d0
	move.l	%d0,(%a0)+
	move.w	#0xf800,%d0
	move.l	%d0,(%a0)
	jra	2b
	| Infinities or NaNs
fp_nd_huge:
	subq.l	#4,%a0
	printf	PNORM,"%p(",1,%a0
	printx	PNORM,%a0@
	printf	PNORM,")\n"
	rts

	| fp_normalize_single:
	| normalize an extended with single (23-bit) precision
	| args:	 %a0 (struct fp_ext *)

fp_normalize_single:
	printf	PNORM,"ns: %p(",1,%a0
	printx	PNORM,%a0@
	printf	PNORM,") "
	addq.l	#2,%a0
	move.w	(%a0)+,%d2
	jeq	fp_ns_zero		| zero / denormalized
	cmp.w	#0x7fff,%d2
	jeq	fp_ns_huge		| NaN / infinitive.
	sub.w	#0x4000-0x7f,%d2	| will the exponent fit?
	jcs	fp_ns_small		| too small.
	cmp.w	#0xfe,%d2
	jcc	fp_ns_large		| too big.
	move.l	(%a0)+,%d0		| get high lword of mantissa
fp_ns_round:
	tst.l	(%a0)			| check the low lword
	jeq	1f
	| Set a sticky bit if it is non-zero.  This should only
	| affect the rounding in what would otherwise be equal-
	| distance situations, which is what we want it to do.
	bset	#0,%d0
1:	clr.l	(%a0)			| zap it from memory.
	| now, round off the low 8 bits of the hi lword.
	tst.b	%d0			| 8 low bits.
	jne	fp_ns_checkround	| Are they non-zero?
	| nothing to do here
	subq.l	#8,%a0
	printf	PNORM,"%p(",1,%a0
	printx	PNORM,%a0@
	printf	PNORM,")\n"
	rts
fp_ns_checkround:
	fp_set_sr FPSR_EXC_INEX2	| INEX2 bit
	clr.b	-(%a0)			| clear low byte of high lword
	subq.l	#3,%a0
	move.w	(FPD_RND,FPDATA),%d2	| rounding mode
	jne	2f			| %d2 == 0, round to nearest
	tst.b	%d0			| test guard bit
	jpl	9f			| zero is closer
	btst	#8,%d0			| test lsb bit
	| round to even behaviour, see above.
	jne	fp_ns_doroundup		| round to infinity
	lsl.b	#1,%d0			| check low bits
	jeq	9f			| round to zero
fp_ns_doroundup:
	| round (the mantissa, that is) towards infinity
	add.l	#0x100,(%a0)
	jcc	9f			| no overflow, good.
	| Overflow.  This means that the %d1 was 0xffffff00, so it
	| is now zero.  We will set the mantissa to reflect this, and
	| increment the exponent (checking for overflow there too)
	move.w	#0x8000,(%a0)
	addq.w	#1,-(%a0)
	cmp.w	#0x407f,(%a0)+		| exponent now overflown?
	jeq	fp_ns_large		| yes, so make it infinity.
9:	subq.l	#4,%a0
	printf	PNORM,"%p(",1,%a0
	printx	PNORM,%a0@
	printf	PNORM,")\n"
	rts
	| check nondefault rounding modes
2:	subq.w	#2,%d2
	jcs	9b			| %d2 < 2, round to zero
	jhi	3f			| %d2 > 2, round to +infinity
	tst.b	(-3,%a0)		| to -inf
	jne	fp_ns_doroundup		| negative, round to infinity
	jra	9b			| positive, round to zero
3:	tst.b	(-3,%a0)		| to +inf
	jeq	fp_ns_doroundup		| positive, round to infinity
	jra	9b			| negative, round to zero
	| Exponent underflow.  Try to make a denormal, and set it to
	| the smallest possible fraction if this fails.
fp_ns_small:
	fp_set_sr FPSR_EXC_UNFL		| set UNFL bit
	move.w	#0x3f81,(-2,%a0)	| 2**-126
	neg.w	%d2			| degree of underflow
	cmp.w	#32,%d2			| single or double shift?
	jcc	2f
	| a 32-bit shift.
	move.l	(%a0),%d0
	move.l	%d0,%d1
	lsr.l	%d2,%d0
	move.l	%d0,(%a0)+
	| Check to see if we shifted off any significant bits.
	neg.w	%d2
	add.w	#32,%d2
	lsl.l	%d2,%d1
	jeq	1f
	bset	#0,%d0			| Sticky bit.
	| Check the lower lword
1:	tst.l	(%a0)
	jeq	fp_ns_round
	clr	(%a0)
	bset	#0,%d0			| Sticky bit.
	jra	fp_ns_round
	| Sorry, the number is just too small.
2:	clr.l	(%a0)+
	clr.l	(%a0)
	moveq	#1,%d0			| Smallest possible fraction,
	jra	fp_ns_round		| round as desired.
	| Exponent overflow.  Just call it infinity.
fp_ns_large:
	tst.b	(3,%a0)
	jeq	1f
	fp_set_sr FPSR_EXC_INEX2
1:	fp_set_sr FPSR_EXC_OVFL
	move.w	(FPD_RND,FPDATA),%d2
	jne	3f			| %d2 = 0 round to nearest
1:	move.w	#0x7fff,(-2,%a0)
	clr.l	(%a0)+
	clr.l	(%a0)
2:	subq.l	#8,%a0
	printf	PNORM,"%p(",1,%a0
	printx	PNORM,%a0@
	printf	PNORM,")\n"
	rts
3:	subq.w	#2,%d2
	jcs	5f			| %d2 < 2, round to zero
	jhi	4f			| %d2 > 2, round to +infinity
	tst.b	(-3,%a0)		| to -inf
	jne	1b
	jra	5f
4:	tst.b	(-3,%a0)		| to +inf
	jeq	1b
5:	move.w	#0x407e,(-2,%a0)
	move.l	#0xffffff00,(%a0)+
	clr.l	(%a0)
	jra	2b
	| zero and denormalized
fp_ns_zero:
	tst.l	(%a0)+
	jne	1f
	tst.l	(%a0)
	jne	1f
	subq.l	#8,%a0
	printf	PNORM,"%p(",1,%a0
	printx	PNORM,%a0@
	printf	PNORM,")\n"
	rts				| zero.  nothing to do.
	| These are not merely subnormal numbers, but true denormals,
	| i.e. pathologically small (exponent is 2**-16383) numbers.
	| It is clearly impossible for even a normal extended number
	| with that exponent to fit into single precision, so just
	| write these ones off as "too darn small".
1:	fp_set_sr FPSR_EXC_UNFL		| Set UNFL bit
	clr.l	(%a0)
	clr.l	-(%a0)
	move.w	#0x3f81,-(%a0)		| i.e. 2**-126
	addq.l	#6,%a0
	moveq	#1,%d0
	jra	fp_ns_round		| round.
	| Infinities or NaNs
fp_ns_huge:
	subq.l	#4,%a0
	printf	PNORM,"%p(",1,%a0
	printx	PNORM,%a0@
	printf	PNORM,")\n"
	rts

	| fp_normalize_single_fast:
	| normalize an extended with single (23-bit) precision
	| this is only used by fsgldiv/fsgdlmul, where the
	| operand is not completly normalized.
	| args:	 %a0 (struct fp_ext *)

fp_normalize_single_fast:
	printf	PNORM,"nsf: %p(",1,%a0
	printx	PNORM,%a0@
	printf	PNORM,") "
	addq.l	#2,%a0
	move.w	(%a0)+,%d2
	cmp.w	#0x7fff,%d2
	jeq	fp_nsf_huge		| NaN / infinitive.
	move.l	(%a0)+,%d0		| get high lword of mantissa
fp_nsf_round:
	tst.l	(%a0)			| check the low lword
	jeq	1f
	| Set a sticky bit if it is non-zero.  This should only
	| affect the rounding in what would otherwise be equal-
	| distance situations, which is what we want it to do.
	bset	#0,%d0
1:	clr.l	(%a0)			| zap it from memory.
	| now, round off the low 8 bits of the hi lword.
	tst.b	%d0			| 8 low bits.
	jne	fp_nsf_checkround	| Are they non-zero?
	| nothing to do here
	subq.l	#8,%a0
	printf	PNORM,"%p(",1,%a0
	printx	PNORM,%a0@
	printf	PNORM,")\n"
	rts
fp_nsf_checkround:
	fp_set_sr FPSR_EXC_INEX2	| INEX2 bit
	clr.b	-(%a0)			| clear low byte of high lword
	subq.l	#3,%a0
	move.w	(FPD_RND,FPDATA),%d2	| rounding mode
	jne	2f			| %d2 == 0, round to nearest
	tst.b	%d0			| test guard bit
	jpl	9f			| zero is closer
	btst	#8,%d0			| test lsb bit
	| round to even behaviour, see above.
	jne	fp_nsf_doroundup		| round to infinity
	lsl.b	#1,%d0			| check low bits
	jeq	9f			| round to zero
fp_nsf_doroundup:
	| round (the mantissa, that is) towards infinity
	add.l	#0x100,(%a0)
	jcc	9f			| no overflow, good.
	| Overflow.  This means that the %d1 was 0xffffff00, so it
	| is now zero.  We will set the mantissa to reflect this, and
	| increment the exponent (checking for overflow there too)
	move.w	#0x8000,(%a0)
	addq.w	#1,-(%a0)
	cmp.w	#0x407f,(%a0)+		| exponent now overflown?
	jeq	fp_nsf_large		| yes, so make it infinity.
9:	subq.l	#4,%a0
	printf	PNORM,"%p(",1,%a0
	printx	PNORM,%a0@
	printf	PNORM,")\n"
	rts
	| check nondefault rounding modes
2:	subq.w	#2,%d2
	jcs	9b			| %d2 < 2, round to zero
	jhi	3f			| %d2 > 2, round to +infinity
	tst.b	(-3,%a0)		| to -inf
	jne	fp_nsf_doroundup	| negative, round to infinity
	jra	9b			| positive, round to zero
3:	tst.b	(-3,%a0)		| to +inf
	jeq	fp_nsf_doroundup		| positive, round to infinity
	jra	9b			| negative, round to zero
	| Exponent overflow.  Just call it infinity.
fp_nsf_large:
	tst.b	(3,%a0)
	jeq	1f
	fp_set_sr FPSR_EXC_INEX2
1:	fp_set_sr FPSR_EXC_OVFL
	move.w	(FPD_RND,FPDATA),%d2
	jne	3f			| %d2 = 0 round to nearest
1:	move.w	#0x7fff,(-2,%a0)
	clr.l	(%a0)+
	clr.l	(%a0)
2:	subq.l	#8,%a0
	printf	PNORM,"%p(",1,%a0
	printx	PNORM,%a0@
	printf	PNORM,")\n"
	rts
3:	subq.w	#2,%d2
	jcs	5f			| %d2 < 2, round to zero
	jhi	4f			| %d2 > 2, round to +infinity
	tst.b	(-3,%a0)		| to -inf
	jne	1b
	jra	5f
4:	tst.b	(-3,%a0)		| to +inf
	jeq	1b
5:	move.w	#0x407e,(-2,%a0)
	move.l	#0xffffff00,(%a0)+
	clr.l	(%a0)
	jra	2b
	| Infinities or NaNs
fp_nsf_huge:
	subq.l	#4,%a0
	printf	PNORM,"%p(",1,%a0
	printx	PNORM,%a0@
	printf	PNORM,")\n"
	rts

	| conv_ext2int (macro):
	| Generates a subroutine that converts an extended value to an
	| integer of a given size, again, with the appropriate type of
	| rounding.

	| Macro arguments:
	| s:	size, as given in an assembly instruction.
	| b:	number of bits in that size.

	| Subroutine arguments:
	| %a0:	source (struct fp_ext *)

	| Returns the integer in %d0 (like it should)

.macro conv_ext2int s,b
	.set	inf,(1<<(\b-1))-1	| i.e. MAXINT
	printf	PCONV,"e2i%d: %p(",2,#\b,%a0
	printx	PCONV,%a0@
	printf	PCONV,") "
	addq.l	#2,%a0
	move.w	(%a0)+,%d2		| exponent
	jeq	fp_e2i_zero\b		| zero / denorm (== 0, here)
	cmp.w	#0x7fff,%d2
	jeq	fp_e2i_huge\b		| Inf / NaN
	sub.w	#0x3ffe,%d2
	jcs	fp_e2i_small\b
	cmp.w	#\b,%d2
	jhi	fp_e2i_large\b
	move.l	(%a0),%d0
	move.l	%d0,%d1
	lsl.l	%d2,%d1
	jne	fp_e2i_round\b
	tst.l	(4,%a0)
	jne	fp_e2i_round\b
	neg.w	%d2
	add.w	#32,%d2
	lsr.l	%d2,%d0
9:	tst.w	(-4,%a0)
	jne	1f
	tst.\s	%d0
	jmi	fp_e2i_large\b
	printf	PCONV,"-> %p\n",1,%d0
	rts
1:	neg.\s	%d0
	jeq	1f
	jpl	fp_e2i_large\b
1:	printf	PCONV,"-> %p\n",1,%d0
	rts
fp_e2i_round\b:
	fp_set_sr FPSR_EXC_INEX2	| INEX2 bit
	neg.w	%d2
	add.w	#32,%d2
	.if	\b>16
	jeq	5f
	.endif
	lsr.l	%d2,%d0
	move.w	(FPD_RND,FPDATA),%d2	| rounding mode
	jne	2f			| %d2 == 0, round to nearest
	tst.l	%d1			| test guard bit
	jpl	9b			| zero is closer
	btst	%d2,%d0			| test lsb bit (%d2 still 0)
	jne	fp_e2i_doroundup\b
	lsl.l	#1,%d1			| check low bits
	jne	fp_e2i_doroundup\b
	tst.l	(4,%a0)
	jeq	9b
fp_e2i_doroundup\b:
	addq.l	#1,%d0
	jra	9b
	| check nondefault rounding modes
2:	subq.w	#2,%d2
	jcs	9b			| %d2 < 2, round to zero
	jhi	3f			| %d2 > 2, round to +infinity
	tst.w	(-4,%a0)		| to -inf
	jne	fp_e2i_doroundup\b	| negative, round to infinity
	jra	9b			| positive, round to zero
3:	tst.w	(-4,%a0)		| to +inf
	jeq	fp_e2i_doroundup\b	| positive, round to infinity
	jra	9b	| negative, round to zero
	| we are only want -2**127 get correctly rounded here,
	| since the guard bit is in the lower lword.
	| everything else ends up anyway as overflow.
	.if	\b>16
5:	move.w	(FPD_RND,FPDATA),%d2	| rounding mode
	jne	2b			| %d2 == 0, round to nearest
	move.l	(4,%a0),%d1		| test guard bit
	jpl	9b			| zero is closer
	lsl.l	#1,%d1			| check low bits
	jne	fp_e2i_doroundup\b
	jra	9b
	.endif
fp_e2i_zero\b:
	clr.l	%d0
	tst.l	(%a0)+
	jne	1f
	tst.l	(%a0)
	jeq	3f
1:	subq.l	#4,%a0
	fp_clr_sr FPSR_EXC_UNFL		| fp_normalize_ext has set this bit
fp_e2i_small\b:
	fp_set_sr FPSR_EXC_INEX2
	clr.l	%d0
	move.w	(FPD_RND,FPDATA),%d2	| rounding mode
	subq.w	#2,%d2
	jcs	3f			| %d2 < 2, round to nearest/zero
	jhi	2f			| %d2 > 2, round to +infinity
	tst.w	(-4,%a0)		| to -inf
	jeq	3f
	subq.\s	#1,%d0
	jra	3f
2:	tst.w	(-4,%a0)		| to +inf
	jne	3f
	addq.\s	#1,%d0
3:	printf	PCONV,"-> %p\n",1,%d0
	rts
fp_e2i_large\b:
	fp_set_sr FPSR_EXC_OPERR
	move.\s	#inf,%d0
	tst.w	(-4,%a0)
	jeq	1f
	addq.\s	#1,%d0
1:	printf	PCONV,"-> %p\n",1,%d0
	rts
fp_e2i_huge\b:
	move.\s	(%a0),%d0
	tst.l	(%a0)
	jne	1f
	tst.l	(%a0)
	jeq	fp_e2i_large\b
	| fp_normalize_ext has set this bit already
	| and made the number nonsignaling
1:	fp_tst_sr FPSR_EXC_SNAN
	jne	1f
	fp_set_sr FPSR_EXC_OPERR
1:	printf	PCONV,"-> %p\n",1,%d0
	rts
.endm

fp_conv_ext2long:
	conv_ext2int l,32

fp_conv_ext2short:
	conv_ext2int w,16

fp_conv_ext2byte:
	conv_ext2int b,8

fp_conv_ext2double:
	jsr	fp_normalize_double
	printf	PCONV,"e2d: %p(",1,%a0
	printx	PCONV,%a0@
	printf	PCONV,"), "
	move.l	(%a0)+,%d2
	cmp.w	#0x7fff,%d2
	jne	1f
	move.w	#0x7ff,%d2
	move.l	(%a0)+,%d0
	jra	2f
1:	sub.w	#0x3fff-0x3ff,%d2
	move.l	(%a0)+,%d0
	jmi	2f
	clr.w	%d2
2:	lsl.w	#5,%d2
	lsl.l	#7,%d2
	lsl.l	#8,%d2
	move.l	%d0,%d1
	lsl.l	#1,%d0
	lsr.l	#4,%d0
	lsr.l	#8,%d0
	or.l	%d2,%d0
	putuser.l %d0,(%a1)+,fp_err_ua2,%a1
	moveq	#21,%d0
	lsl.l	%d0,%d1
	move.l	(%a0),%d0
	lsr.l	#4,%d0
	lsr.l	#7,%d0
	or.l	%d1,%d0
	putuser.l %d0,(%a1),fp_err_ua2,%a1
#ifdef FPU_EMU_DEBUG
	getuser.l %a1@(-4),%d0,fp_err_ua2,%a1
	getuser.l %a1@(0),%d1,fp_err_ua2,%a1
	printf	PCONV,"%p(%08x%08x)\n",3,%a1,%d0,%d1
#endif
	rts

fp_conv_ext2single:
	jsr	fp_normalize_single
	printf	PCONV,"e2s: %p(",1,%a0
	printx	PCONV,%a0@
	printf	PCONV,"), "
	move.l	(%a0)+,%d1
	cmp.w	#0x7fff,%d1
	jne	1f
	move.w	#0xff,%d1
	move.l	(%a0)+,%d0
	jra	2f
1:	sub.w	#0x3fff-0x7f,%d1
	move.l	(%a0)+,%d0
	jmi	2f
	clr.w	%d1
2:	lsl.w	#8,%d1
	lsl.l	#7,%d1
	lsl.l	#8,%d1
	bclr	#31,%d0
	lsr.l	#8,%d0
	or.l	%d1,%d0
	printf	PCONV,"%08x\n",1,%d0
	rts

	| special return addresses for instr that
	| encode the rounding precision in the opcode
	| (e.g. fsmove,fdmove)

fp_finalrounding_single:
	addq.l	#8,%sp
	jsr	fp_normalize_ext
	jsr	fp_normalize_single
	jra	fp_finaltest

fp_finalrounding_single_fast:
	addq.l	#8,%sp 
	jsr	fp_normalize_ext
	jsr	fp_normalize_single_fast
	jra	fp_finaltest

fp_finalrounding_double:
	addq.l	#8,%sp
	jsr	fp_normalize_ext
	jsr	fp_normalize_double
	jra	fp_finaltest

	| fp_finaltest:
	| set the emulated status register based on the outcome of an
	| emulated instruction.

fp_finalrounding:
	addq.l	#8,%sp
|	printf	,"f: %p\n",1,%a0
	jsr	fp_normalize_ext
	move.w	(FPD_PREC,FPDATA),%d0
	subq.w	#1,%d0
	jcs	fp_finaltest
	jne	1f
	jsr	fp_normalize_single
	jra	2f
1:	jsr	fp_normalize_double
2:|	printf	,"f: %p\n",1,%a0
fp_finaltest:
	| First, we do some of the obvious tests for the exception
	| status byte and condition code bytes of fp_sr here, so that
	| they do not have to be handled individually by every
	| emulated instruction.
	clr.l	%d0
	addq.l	#1,%a0
	tst.b	(%a0)+			| sign
	jeq	1f
	bset	#FPSR_CC_NEG-24,%d0	| N bit
1:	cmp.w	#0x7fff,(%a0)+		| exponent
	jeq	2f
	| test for zero
	moveq	#FPSR_CC_Z-24,%d1
	tst.l	(%a0)+
	jne	9f
	tst.l	(%a0)
	jne	9f
	jra	8f
	| infinitiv and NAN
2:	moveq	#FPSR_CC_NAN-24,%d1
	move.l	(%a0)+,%d2
	lsl.l	#1,%d2			| ignore high bit
	jne	8f
	tst.l	(%a0)
	jne	8f
	moveq	#FPSR_CC_INF-24,%d1
8:	bset	%d1,%d0
9:	move.b	%d0,(FPD_FPSR+0,FPDATA)	| set condition test result
	| move instructions enter here
	| Here, we test things in the exception status byte, and set
	| other things in the accrued exception byte accordingly.
	| Emulated instructions can set various things in the former,
	| as defined in fp_emu.h.
fp_final:
	move.l	(FPD_FPSR,FPDATA),%d0
#if 0
	btst	#FPSR_EXC_SNAN,%d0	| EXC_SNAN
	jne	1f
	btst	#FPSR_EXC_OPERR,%d0	| EXC_OPERR
	jeq	2f
1:	bset	#FPSR_AEXC_IOP,%d0	| set IOP bit
2:	btst	#FPSR_EXC_OVFL,%d0	| EXC_OVFL
	jeq	1f
	bset	#FPSR_AEXC_OVFL,%d0	| set OVFL bit
1:	btst	#FPSR_EXC_UNFL,%d0	| EXC_UNFL
	jeq	1f
	btst	#FPSR_EXC_INEX2,%d0	| EXC_INEX2
	jeq	1f
	bset	#FPSR_AEXC_UNFL,%d0	| set UNFL bit
1:	btst	#FPSR_EXC_DZ,%d0	| EXC_INEX1
	jeq	1f
	bset	#FPSR_AEXC_DZ,%d0	| set DZ bit
1:	btst	#FPSR_EXC_OVFL,%d0	| EXC_OVFL
	jne	1f
	btst	#FPSR_EXC_INEX2,%d0	| EXC_INEX2
	jne	1f
	btst	#FPSR_EXC_INEX1,%d0	| EXC_INEX1
	jeq	2f
1:	bset	#FPSR_AEXC_INEX,%d0	| set INEX bit
2:	move.l	%d0,(FPD_FPSR,FPDATA)
#else
	| same as above, greatly optimized, but untested (yet)
	move.l	%d0,%d2
	lsr.l	#5,%d0
	move.l	%d0,%d1
	lsr.l	#4,%d1
	or.l	%d0,%d1
	and.b	#0x08,%d1
	move.l	%d2,%d0
	lsr.l	#6,%d0
	or.l	%d1,%d0
	move.l	%d2,%d1
	lsr.l	#4,%d1
	or.b	#0xdf,%d1
	and.b	%d1,%d0
	move.l	%d2,%d1
	lsr.l	#7,%d1
	and.b	#0x80,%d1
	or.b	%d1,%d0
	and.b	#0xf8,%d0
	or.b	%d0,%d2
	move.l	%d2,(FPD_FPSR,FPDATA)
#endif
	move.b	(FPD_FPSR+2,FPDATA),%d0
	and.b	(FPD_FPCR+2,FPDATA),%d0
	jeq	1f
	printf	,"send signal!!!\n"
1:	jra	fp_end
CPU%s.\n", nid,
	       p ? "a" : "no",
	       e ? ", CPU is running" : "");

	p = LOCAL_HUB_L(PI_CPU_PRESENT_B) & 1;
	e = LOCAL_HUB_L(PI_CPU_ENABLE_B) & 1;
	printk("Node %d has %s secondary CPU%s.\n", nid,
	       p ? "a" : "no",
	       e ? ", CPU is running" : "");

	verify_mode();
	ioc3_sio_init();
	ioc3_eth_init();
	per_cpu_init();

	mips_io_port_base = IO_BASE;
	board_time_init = ip27_time_init;
}
/*
 * Copytight (C) 1999, 2000 Ralf Baechle (ralf@gnu.org)
 * Copytight (C) 1999, 2000 Silicon Graphics, Inc.
 */
#include <linux/config.h>
#include <linux/init.h>
#include <linux/kernel.h>
#include <linux/sched.h>
#include <linux/interrupt.h>
#include <linux/kernel_stat.h>
#include <linux/param.h>
#include <linux/timex.h>
#include <linux/mm.h>		

#include <asm/time.h>
#include <asm/pgtable.h>
#include <asm/sgialib.h>
#include <asm/sn/ioc3.h>
#include <asm/m48t35.h>
#include <asm/sn/klconfig.h>
#include <asm/sn/arch.h>
#include <asm/sn/addrs.h>
#include <asm/sn/sn_private.h>
#include <asm/sn/sn0/ip27.h>
#include <asm/sn/sn0/hub.h>

/*
 * This is a hack; we really need to figure these values out dynamically
 * 
 * Since 800 ns works very well with various HUB frequencies, such as
 * 360, 380, 390 and 400 MHZ, we use 800 ns rtc cycle time.
 *
 * Ralf: which clock rate is used to feed the counter?
 */
#define NSEC_PER_CYCLE		800
#define NSEC_PER_SEC		1000000000
#define CYCLES_PER_SEC		(NSEC_PER_SEC/NSEC_PER_CYCLE)
#define CYCLES_PER_JIFFY	(CYCLES_PER_SEC/HZ)

static unsigned long ct_cur[NR_CPUS];	/* What counter should be at next timer irq */
static long last_rtc_update;		/* Last time the rtc clock got updated */

extern rwlock_t xtime_lock;
extern volatile unsigned long wall_jiffies;


static int set_rtc_mmss(unsigned long nowtime)
{
	int retval = 0;
	int real_seconds, real_minutes, cmos_minutes;
	struct m48t35_rtc *rtc;
	nasid_t nid;

	nid = get_nasid();
	rtc = (struct m48t35_rtc *)(KL_CONFIG_CH_CONS_INFO(nid)->memory_base + 
							IOC3_BYTEBUS_DEV0);

	rtc->control |= M48T35_RTC_READ;
	cmos_minutes = rtc->min;
	BCD_TO_BIN(cmos_minutes);
	rtc->control &= ~M48T35_RTC_READ;

	/*
	 * Since we're only adjusting minutes and seconds, don't interfere with
	 * hour overflow. This avoids messing with unknown time zones but
	 * requires your RTC not to be off by more than 15 minutes
	 */
	real_seconds = nowtime % 60;
	real_minutes = nowtime / 60;
	if (((abs(real_minutes - cmos_minutes) + 15)/30) & 1)
		real_minutes += 30;	/* correct for half hour time zone */
	real_minutes %= 60;

	if (abs(real_minutes - cmos_minutes) < 30) {
		BIN_TO_BCD(real_seconds);
		BIN_TO_BCD(real_minutes);
		rtc->control |= M48T35_RTC_SET;
		rtc->sec = real_seconds;
		rtc->min = real_minutes;
		rtc->control &= ~M48T35_RTC_SET;
	} else {
		printk(KERN_WARNING
		       "set_rtc_mmss: can't update from %d to %d\n",
		       cmos_minutes, real_minutes);
		retval = -1;
	}

	return retval;
}

void rt_timer_interrupt(struct pt_regs *regs)
{
	int cpu = smp_processor_id();
	int cpuA = ((cputoslice(cpu)) == 0);
	int irq = 9;				/* XXX Assign number */

	irq_enter(cpu, irq);
	write_lock(&xtime_lock);

again:
	LOCAL_HUB_S(cpuA ? PI_RT_PEND_A : PI_RT_PEND_B, 0);	/* Ack  */
	ct_cur[cpu] += CYCLES_PER_JIFFY;
	LOCAL_HUB_S(cpuA ? PI_RT_COMPARE_A : PI_RT_COMPARE_B, ct_cur[cpu]);

	if (LOCAL_HUB_L(PI_RT_COUNT) >= ct_cur[cpu])
		goto again;

	kstat.irqs[cpu][irq]++;		/* kstat only for bootcpu? */

	if (cpu == 0)
		do_timer(regs);

#ifdef CONFIG_SMP
	update_process_times(user_mode(regs));
#endif /* CONFIG_SMP */
	
	/*
	 * If we have an externally synchronized Linux clock, then update
	 * RTC clock accordingly every ~11 minutes. Set_rtc_mmss() has to be
	 * called as close as possible to when a second starts.
	 */
	if ((time_status & STA_UNSYNC) == 0 &&
	    xtime.tv_sec > last_rtc_update + 660) {
		if (xtime.tv_usec >= 1000000 - ((unsigned) tick) / 2) {
			if (set_rtc_mmss(xtime.tv_sec + 1) == 0)
				last_rtc_update = xtime.tv_sec;
			else    
				last_rtc_update = xtime.tv_sec - 600;
		} else if (xtime.tv_usec <= ((unsigned) tick) / 2) {
			if (set_rtc_mmss(xtime.tv_sec) == 0)
				last_rtc_update = xtime.tv_sec;
			else    
				last_rtc_update = xtime.tv_sec - 600;
		}
        }

	write_unlock(&xtime_lock);
	irq_exit(cpu, irq);

	if (softirq_pending(cpu))
		do_softirq();
}

unsigned long ip27_do_gettimeoffset(void)
{
	unsigned long ct_cur1;
	ct_cur1 = REMOTE_HUB_L(cputonasid(0), PI_RT_COUNT) + CYCLES_PER_JIFFY;
	return (ct_cur1 - ct_cur[0]) * NSEC_PER_CYCLE / 1000;
}

/* Includes for ioc3_init().  */
#include <asm/sn/types.h>
#include <asm/sn/sn0/addrs.h>
#include <asm/sn/sn0/hubni.h>
#include <asm/sn/sn0/hubio.h>
#include <asm/pci/bridge.h>

static __init unsigned long get_m48t35_time(void)
{
        unsigned int year, month, date, hour, min, sec;
	struct m48t35_rtc *rtc;
	nasid_t nid;

	nid = get_nasid();
	rtc = (struct m48t35_rtc *)(KL_CONFIG_CH_CONS_INFO(nid)->memory_base + 
							IOC3_BYTEBUS_DEV0);

	rtc->control |= M48T35_RTC_READ;
	sec = rtc->sec;
	min = rtc->min;
	hour = rtc->hour;
	date = rtc->date;
	month = rtc->month;
	year = rtc->year;
	rtc->control &= ~M48T35_RTC_READ;

        BCD_TO_BIN(sec);
        BCD_TO_BIN(min);
        BCD_TO_BIN(hour);
        BCD_TO_BIN(date);
        BCD_TO_BIN(month);
        BCD_TO_BIN(year);

        year += 1970;

        return mktime(year, month, date, hour, min, sec);
}

void __init ip27_time_init(void)
{
	xtime.tv_sec = get_m48t35_time();
	xtime.tv_usec = 0;

	do_gettimeoffset = ip27_do_gettimeoffset;
}

void __init cpu_time_init(void)
{
	lboard_t *board;
	klcpu_t *cpu;
	int cpuid;

	/* Don't use ARCS.  ARCS is fragile.  Klconfig is simple and sane.  */
	board = find_lboard(KL_CONFIG_INFO(get_nasid()), KLTYPE_IP27);
	if (!board)
		panic("Can't find board info for myself.");

	cpuid = LOCAL_HUB_L(PI_CPU_NUM) ? IP27_CPU0_INDEX : IP27_CPU1_INDEX;
	cpu = (klcpu_t *) KLCF_COMP(board, cpuid);
	if (!cpu)
		panic("No information about myself?");

	printk("CPU %d clock is %dMHz.\n", smp_processor_id(), cpu->cpu_speed);

	set_cp0_status(SRB_TIMOCLK);
}

void __init hub_rtc_init(cnodeid_t cnode)
{
	/*
	 * We only need to initialize the current node.
	 * If this is not the current node then it is a cpuless
	 * node and timeouts will not happen there.
	 */
	if (get_compact_nodeid() == cnode) {
		int cpu = smp_processor_id();
		LOCAL_HUB_S(PI_RT_EN_A, 1);
		LOCAL_HUB_S(PI_RT_EN_B, 1);
		LOCAL_HUB_S(PI_PROF_EN_A, 0);
		LOCAL_HUB_S(PI_PROF_EN_B, 0);
		ct_cur[cpu] = CYCLES_PER_JIFFY;
		LOCAL_HUB_S(PI_RT_COMPARE_A, ct_cur[cpu]);
		LOCAL_HUB_S(PI_RT_COUNT, 0);
		LOCAL_HUB_S(PI_RT_PEND_A, 0);
		LOCAL_HUB_S(PI_RT_COMPARE_B, ct_cur[cpu]);
		LOCAL_HUB_S(PI_RT_COUNT, 0);
		LOCAL_HUB_S(PI_RT_PEND_B, 0);
	}
}
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sg_dev_arr NULL, driver not initialized
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 scsi_dma_free_sectors=%u sg_pool_secs_aval=%d def_reserved_size=%d
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page %uifeq (-D__KERNEL__ -I/home/me/kernel/linux/include -Wall -Wstrict-prototypes -Wno-trigraphs -O2 -fomit-frame-pointer -fno-strict-aliasing -fno-common -pipe -mpreferred-stack-boundary=2 -march=i686,$(strip $(subst $(comma),:,$(CFLAGS) $(EXTRA_CFLAGS) $(CFLAGS_proc_misc.o))))
FILES_FLAGS_UP_TO_DATE += proc_misc.o
endif
#
# Makefile for the SGI specific kernel interface routines
# under Linux.
#
# Note! Dependencies are done automagically by 'make dep', which also
# removes any old dependencies. DON'T put your own dependencies here
# unless it's something special (ie not a .c file).
#
# Note 2! The CFLAGS definitions are now in the main makefile...

.S.s:
	$(CPP) $(CFLAGS) $< -o $*.s
.S.o:
	$(CC) $(CFLAGS) -c $< -o $*.o

O_TARGET := ip32-kern.a

all: ip32-kern.a ip32-irq-glue.o

obj-y	+= ip32-rtc.o ip32-setup.o ip32-irq.o ip32-irq-glue.o ip32-timer.o \
	   crime.o ip32-reset.o

obj-$(CONFIG_PCI)   += ip32-pci.o

include $(TOPDIR)/Rules.make
/*
 * This file is subject to the terms and conditions of the GNU General Public
 * License.  See the file "COPYING" in the main directory of this archive
 * for more details.
 *
 * Copyright (C) 2001 Keith M Wesolowski
 */
#include <linux/types.h>
#include <linux/init.h>
#include <linux/kernel.h>
#include <asm/ip32/crime.h>
#include <asm/ptrace.h>

void __init crime_init (void)
{
	u64 id = crime_read_64 (CRIME_ID);
	u64 rev = id & CRIME_ID_REV;

	id = (id & CRIME_ID_IDBITS) >> 4;

	printk ("CRIME id %1lx rev %ld detected at %016lx\n", id, rev,
		(unsigned long) CRIME_BASE);
}

/* XXX Like on Sun, these give us various useful information to printk. */
void crime_memerr_intr (unsigned int irq, void *dev_id, struct pt_regs *regs)
{
	u64 memerr = crime_read_64 (CRIME_MEM_ERROR_STAT);
	u64 addr = crime_read_64 (CRIME_MEM_ERROR_ADDR);
	memerr &= CRIME_MEM_ERROR_STAT_MASK;
	
	printk ("CRIME memory error at physaddr 0x%08lx status %08lx\n",
		addr << 2, memerr);

	crime_write_64 (CRIME_MEM_ERROR_STAT, 0);
}

void crime_cpuerr_intr (unsigned int irq, void *dev_id, struct pt_regs *regs)
{
	u64 cpuerr = crime_read_64 (CRIME_CPU_ERROR_STAT);
	u64 addr = crime_read_64 (CRIME_CPU_ERROR_ADDR);
	cpuerr &= CRIME_CPU_ERROR_MASK;
	addr <<= 2UL;

	printk ("CRIME CPU interface error detected at %09lx status %08lx\n",
		addr, cpuerr);

	crime_write_64 (CRIME_CPU_ERROR_STAT, 0);
}
/*
 * Code to handle IP32 IRQs
 *
 * This file is subject to the terms and conditions of the GNU General Public
 * License.  See the file "COPYING" in the main directory of this archive
 * for more details.
 *
 * Copyright (C) 2000 Harald Koerfgen
 * Copyright (C) 2001 Keith M Wesolowski
 */
#include <linux/init.h>
#include <linux/kernel_stat.h>
#include <linux/types.h>
#include <linux/interrupt.h>
#include <linux/bitops.h>
#include <linux/kernel.h>
#include <linux/slab.h>
#include <linux/mm.h>
#include <linux/random.h>
#include <linux/sched.h>

#include <asm/bitops.h>
#include <asm/mipsregs.h>
#include <asm/system.h>
#include <asm/ip32/ip32_ints.h>
#include <asm/ip32/crime.h>
#include <asm/ip32/mace.h>
#include <asm/signal.h>

#undef DEBUG_IRQ
#ifdef DEBUG_IRQ
#define DBG(x...) printk(x)
#else
#define DBG(x...)
#endif

/* O2 irq map
 *
 * IP0 -> software (ignored)
 * IP1 -> software (ignored)
 * IP2 -> (irq0) C crime 1.1 all interrupts; crime 1.5 ???
 * IP3 -> (irq1) X unknown
 * IP4 -> (irq2) X unknown
 * IP5 -> (irq3) X unknown
 * IP6 -> (irq4) X unknown
 * IP7 -> (irq5) 0 CPU count/compare timer (system timer)
 *
 * crime: (C)
 *
 * CRIME_INT_STAT 31:0:
 *
 * 0 -> 1 Video in 1
 * 1 -> 2 Video in 2
 * 2 -> 3 Video out
 * 3 -> 4 Mace ethernet
 * 4 -> S  SuperIO sub-interrupt
 * 5 -> M  Miscellaneous sub-interrupt
 * 6 -> A  Audio sub-interrupt
 * 7 -> 8  PCI bridge errors
 * 8 -> 9  PCI SCSI aic7xxx 0
 * 9 -> 10  PCI SCSI aic7xxx 1
 * 10 -> 11 PCI slot 0
 * 11 -> 12 unused (PCI slot 1)
 * 12 -> 13 unused (PCI slot 2)
 * 13 -> 14 unused (PCI shared 0)
 * 14 -> 15 unused (PCI shared 1)
 * 15 -> 16 unused (PCI shared 2)
 * 16 -> 17 GBE0 (E)
 * 17 -> 18 GBE1 (E)
 * 18 -> 19 GBE2 (E)
 * 19 -> 20 GBE3 (E)
 * 20 -> 21 CPU errors
 * 21 -> 22 Memory errors
 * 22 -> 23 RE empty edge (E)
 * 23 -> 24 RE full edge (E)
 * 24 -> 25 RE idle edge (E)
 * 25 -> 26 RE empty level
 * 26 -> 27 RE full level
 * 27 -> 28 RE idle level
 * 28 -> 29  unused (software 0) (E)
 * 29 -> 30  unused (software 1) (E)
 * 30 -> 31  unused (software 2) - crime 1.5 CPU SysCorError (E)
 * 31 -> 32 VICE
 *
 * S, M, A: Use the MACE ISA interrupt register
 * MACE_ISA_INT_STAT 31:0
 *
 * 0-7 -> 33-40 Audio
 * 8 -> 41 RTC
 * 9 -> 42 Keyboard
 * 10 -> X Keyboard polled
 * 11 -> 44 Mouse
 * 12 -> X Mouse polled
 * 13-15 -> 46-48 Count/compare timers
 * 16-19 -> 49-52 Parallel (16 E)
 * 20-25 -> 53-58 Serial 1 (22 E)
 * 26-31 -> 59-64 Serial 2 (28 E)
 *
 * Note that this means IRQs 5-7, 43, and 45 do not exist.  This is a
 * different IRQ map than IRIX uses, but that's OK as Linux irq handling
 * is quite different anyway.
 */

/* Some initial interrupts to set up */
extern void crime_memerr_intr (unsigned int irq, void *dev_id,
			       struct pt_regs *regs);
extern void crime_cpuerr_intr (unsigned int irq, void *dev_id,
			       struct pt_regs *regs);

struct irqaction memerr_irq = { crime_memerr_intr, SA_INTERRUPT,
			       0, "CRIME memory error", NULL,
			       NULL };
struct irqaction cpuerr_irq = { crime_cpuerr_intr, SA_INTERRUPT,
			       0, "CRIME CPU error", NULL,
			       NULL };

extern void ip32_handle_int (void);
asmlinkage unsigned int do_IRQ(int irq, struct pt_regs *regs);

/*
 * For interrupts wired from a single device to the CPU.  Only the clock
 * uses this it seems, which is IRQ 0 and IP7.
 */

static void enable_cpu_irq(unsigned int irq)
{
	set_cp0_status(STATUSF_IP7);
}

static unsigned int startup_cpu_irq(unsigned int irq)
{
	enable_cpu_irq(irq);
	return 0;
}

static void disable_cpu_irq(unsigned int irq)
{
	clear_cp0_status(STATUSF_IP7);
}

static void end_cpu_irq(unsigned int irq)
{
	if (!(irq_desc[irq].status & (IRQ_DISABLED|IRQ_INPROGRESS)))
		enable_cpu_irq (irq);
}

#define shutdown_cpu_irq disable_cpu_irq
#define mask_and_ack_cpu_irq disable_cpu_irq

static struct hw_interrupt_type ip32_cpu_interrupt = {
	"IP32 CPU",
	startup_cpu_irq,
	shutdown_cpu_irq,
	enable_cpu_irq,
	disable_cpu_irq,
	mask_and_ack_cpu_irq,
	end_cpu_irq,
	NULL
};

/*
 * This is for pure CRIME interrupts - ie not MACE.  The advantage?
 * We get to split the re#
# Makefile for Linux arch/m68k/sun3 source directory
#
# Note! Dependencies are done automagically by 'make dep', which also
# removes any old dependencies. DON'T put your own dependencies here
# unless it's something special (ie not a .c file).
#
# Note 2! The CFLAGS definitions are now in the main makefile...

.S.o:
	$(CC) $(AFLAGS) -traditional -Wa,-m68020 -c $< -o $*.o

O_TARGET := sun3.o 

export-objs	:= sun3_ksyms.o

obj-y	:= sun3_ksyms.o sun3ints.o sun3dvma.o sbus.o

obj-$(CONFIG_SUN3) += config.o idprom.o mmu_emu.o leds.o dvma.o \
			intersil.o

include $(TOPDIR)/Rules.make
/*
 *  linux/arch/m68k/sun3/config.c
 *
 *  Copyright (C) 1996,1997 Pekka Pietik{inen
 *
 * This file is subject to the terms and conditions of the GNU General Public
 * License.  See the file COPYING in the main directory of this archive
 * for more details.
 */

#include <linux/config.h>
#include <linux/types.h>
#include <linux/kernel.h>
#include <linux/mm.h>
#include <linux/tty.h>
#include <linux/console.h>
#include <linux/init.h>
#include <linux/bootmem.h>

#include <asm/oplib.h>
#include <asm/setup.h>
#include <asm/contregs.h>
#include <asm/movs.h>
#include <asm/pgtable.h>
#include <asm/sun3-head.h>
#include <asm/sun3mmu.h>
#include <asm/rtc.h>
#include <asm/machdep.h>
#include <asm/intersil.h>
#include <asm/irq.h>
#include <asm/segment.h>
#include <asm/sun3ints.h>

extern char _text, _end;

char sun3_reserved_pmeg[SUN3_PMEGS_NUM];

extern unsigned long sun3_gettimeoffset(void);
extern int sun3_get_irq_list (char *);
extern void sun3_sched_init(void (*handler)(int, void *, struct pt_regs *));
extern void sun3_get_model (char* model);
extern void idprom_init (void);
extern void sun3_gettod (int *yearp, int *monp, int *dayp,
                   int *hourp, int *minp, int *secp);
extern int sun3_hwclk(int set, struct hwclk_time *t);

extern void sun_serial_setup(void);
volatile char* clock_va; 
extern volatile unsigned char* sun3_intreg;
extern unsigned long availmem;
unsigned long num_pages;

void __init sun3_init(void)
{
	unsigned char enable_register;
	int i;

	m68k_machtype= MACH_SUN3;
	m68k_cputype = CPU_68020;
	m68k_fputype = FPU_68881; /* mc68881 actually */
	m68k_mmutype = MMU_SUN3;
	clock_va    =          (char *) 0xfe06000;	/* dark  */
	sun3_intreg = (unsigned char *) 0xfe0a000;	/* magic */
	sun3_disable_interrupts();
	
	prom_init((void *)LINUX_OPPROM_BEGVM);
		
	GET_CONTROL_BYTE(AC_SENABLE,enable_register);
	enable_register |= 0x50; /* Enable FPU */	
	SET_CONTROL_BYTE(AC_SENABLE,enable_register);
	GET_CONTROL_BYTE(AC_SENABLE,enable_register);
	
	/* This code looks suspicious, because it doesn't subtract
           memory belonging to the kernel from the available space */


	memset(sun3_reserved_pmeg, 0, sizeof(sun3_reserved_pmeg));

	/* Reserve important PMEGS */
	/* FIXME: These should be probed instead of hardcoded */

	for (i=0; i<8; i++)		/* Kernel PMEGs */
		sun3_reserved_pmeg[i] = 1;

	sun3_reserved_pmeg[247] = 1;	/* ROM mapping  */
	sun3_reserved_pmeg[248] = 1;	/* AMD Ethernet */
	sun3_reserved_pmeg[251] = 1;	/* VB area      */
	sun3_reserved_pmeg[254] = 1;	/* main I/O     */

	sun3_reserved_pmeg[249] = 1;
	sun3_reserved_pmeg[252] = 1;
	sun3_reserved_pmeg[253] = 1;
	set_fs(KERNEL_DS);
}

/* Without this, Bad Things happen when something calls arch_reset. */
static void sun3_reboot (void)
{
	prom_reboot ("vmlinux");
}

static void sun3_halt (void)
{
	prom_halt ();
}

/* sun3 bootmem allocation */

void __init sun3_bootmem_alloc(unsigned long memory_start, unsigned long memory_end)
{
	unsigned long start_page;

	/* align start/end to page boundries */
	memory_start = ((memory_start + (PAGE_SIZE-1)) & PAGE_MASK);
	memory_end = memory_end & PAGE_MASK;
		
	start_page = __pa(memory_start) >> PAGE_SHIFT;
	num_pages = __pa(memory_end) >> PAGE_SHIFT;

	high_memory = (void *)memory_end;
	availmem = memory_start;

	availmem += init_bootmem(start_page, num_pages);
	availmem = (availmem + (PAGE_SIZE-1)) & PAGE_MASK;

	free_bootmem(__pa(availmem), memory_end - (availmem));
}
	

void __init config_sun3(void)
{
	unsigned long memory_start, memory_end;

	printk("ARCH: SUN3\n");
	idprom_init();

	/* Subtract kernel memory from available memory */

        mach_sched_init      =  sun3_sched_init; 
        mach_init_IRQ        =  sun3_init_IRQ;
        mach_default_handler = &sun3_default_handler;
        mach_request_irq     =  sun3_request_irq;
        mach_free_irq        =  sun3_free_irq;
//	mach_keyb_init       =  sun3_keyb_init;
	enable_irq     	     =  sun3_enable_irq;
        disable_irq  	     =  sun3_disable_irq;
	mach_process_int     =  sun3_process_int;
        mach_get_irq_list    =  sun3_get_irq_list;
        mach_gettod          =  sun3_gettod;	
        mach_reset           =  sun3_reboot;
	mach_gettimeoffset   =  sun3_gettimeoffset;
	mach_get_model	     =  sun3_get_model;
	mach_hwclk           =  sun3_hwclk;
	mach_halt	     =  sun3_halt;
#if !defined(CONFIG_SERIAL_CONSOLE) && defined(CONFIG_FB)
	conswitchp 	     = &dummy_con;
#endif

	memory_start = ((((int)&_end) + 0x2000) & ~0x1fff);
// PROM seems to want the last couple of physical pages. --m
	memory_end   = *(romvec->pv_sun3mem) + PAGE_OFFSET - 2*PAGE_SIZE;

	m68k_num_memory=1;
        m68k_memory[0].size=*(romvec->pv_sun3mem);
	
	sun3_bootmem_alloc(memory_start, memory_end);

	sun_serial_setup();


}

void __init sun3_sched_init(void (*timer_routine)(int, void *, struct pt_regs *))
{
	sun3_disable_interrupts();
        intersil_clock->cmd_reg=(INTERSIL_RUN|INTERSIL_INT_DISABLE|INTERSIL_24H_MODE);
        intersil_clock->int_reg=INTERSIL_HZ_100_MASK;
 	intersil_clear();
        sun3_enable_irq(5);
        intersil_clock->cmd_reg=(INTERSIL_RUN|INTERSIL_INT_ENABLE|INTERSIL_24H_MODE);
        sun3_enable_interrupts();
        intersil_clear();
}


/* dvma support routines */

#include <linux/kernel.h>
#include <linux/mm.h>
#include <linux/bootmem.h>
#include <linux/list.h>
#include <asm/page.h>
#include <asm/pgtable.h>
#include <asm/sun3mmu.h>
#include <asm/dvma.h>


static unsigned long ptelist[120];

inline unsigned long dvma_page(unsigned long kaddr, unsigned long vaddr)
{
	unsigned long pte;
	unsigned long j;
	pte_t ptep;
	
	j = *(volatile unsigned long *)kaddr;
	*(volatile unsigned long *)kaddr = j;

	ptep = __mk_pte(kaddr, PAGE_KERNEL);
	pte = pte_val(ptep);
//		printk("dvma_remap: addr %lx -> %lx pte %08lx len %x\n", 
//		       kaddr, vaddr, pte, len);
	if(ptelist[(vaddr & 0xff000) >> PAGE_SHIFT] != pte) {
		sun3_put_pte(vaddr, pte);
		ptelist[(vaddr & 0xff000) >> PAGE_SHIFT] = pte;
	}

	return (vaddr + (kaddr & ~PAGE_MASK));

}

int dvma_map_iommu(unsigned long kaddr, unsigned long baddr, 
			      int len)
{

	unsigned long end;
	unsigned long vaddr;

	vaddr = dvma_btov(baddr);

	end = vaddr + len;
	
	while(vaddr < end) {
		dvma_page(kaddr, vaddr);
		kaddr += PAGE_SIZE;
		vaddr += PAGE_SIZE;
	}

	return 0;

}

void sun3_dvma_init(void)
{

	memset(ptelist, 0, sizeof(ptelist));


}
/* $Id: idprom.c,v 1.22 1996/11/13 05:09:25 davem Exp $
 * idprom.c: Routines to load the idprom into kernel addresses and
 *           interpret the data contained within.
 *
 * Copyright (C) 1995 David S. Miller (davem@caip.rutgers.edu)
 * Sun3/3x models added by David Monro (davidm@psrg.cs.usyd.edu.au)
 */

#include <linux/kernel.h>
#include <linux/types.h>
#include <linux/init.h>
#include <linux/string.h>

#include <asm/oplib.h>
#include <asm/idprom.h>
#include <asm/machines.h>  /* Fun with Sun released architectures. */

struct idprom *idprom;
static struct idprom idprom_buffer;

/* Here is the master table of Sun machines which use some implementation
 * of the Sparc CPU and have a meaningful IDPROM machtype value that we
 * know about.  See asm-sparc/machines.h for empirical constants.
 */
struct Sun_Machine_Models Sun_Machines[NUM_SUN_MACHINES] = {
/* First, Sun3's */
{ "Sun 3/160 Series", (SM_SUN3 | SM_3_160) },
{ "Sun 3/50", (SM_SUN3 | SM_3_50) },
{ "Sun 3/260 Series", (SM_SUN3 | SM_3_260) },
{ "Sun 3/110 Series", (SM_SUN3 | SM_3_110) },
{ "Sun 3/60", (SM_SUN3 | SM_3_60) },
{ "Sun 3/E", (SM_SUN3 | SM_3_E) },
/* Now, Sun3x's */
{ "Sun 3/460 Series", (SM_SUN3 | SM_3_460) },
{ "Sun 3/80", (SM_SUN3 | SM_3_80) },
/* Then, Sun4's */
//{ "Sun 4/100 Series", (SM_SUN4 | SM_4_110) },
//{ "Sun 4/200 Series", (SM_SUN4 | SM_4_260) },
//{ "Sun 4/300 Series", (SM_SUN4 | SM_4_330) },
//{ "Sun 4/400 Series", (SM_SUN4 | SM_4_470) },
/* And now, Sun4c's */
//{ "Sun4c SparcStation 1", (SM_SUN4C | SM_4C_SS1) },
//{ "Sun4c SparcStation IPC", (SM_SUN4C | SM_4C_IPC) },
//{ "Sun4c SparcStation 1+", (SM_SUN4C | SM_4C_SS1PLUS) },
//{ "Sun4c SparcStation SLC", (SM_SUN4C | SM_4C_SLC) },
//{ "Sun4c SparcStation 2", (SM_SUN4C | SM_4C_SS2) },
//{ "Sun4c SparcStation ELC", (SM_SUN4C | SM_4C_ELC) },
//{ "Sun4c SparcStation IPX", (SM_SUN4C | SM_4C_IPX) },
/* Finally, early Sun4m's */
//{ "Sun4m SparcSystem600", (SM_SUN4M | SM_4M_SS60) },
//{ "Sun4m SparcStation10/20", (SM_SUN4M | SM_4M_SS50) },
//{ "Sun4m SparcStation5", (SM_SUN4M | SM_4M_SS40) },
/* One entry for the OBP arch's which are sun4d, sun4e, and newer sun4m's */
//{ "Sun4M OBP based system", (SM_SUN4M_OBP | 0x0) }
};

static void __init display_system_type(unsigned char machtype)
{
	register int i;

	for (i = 0; i < NUM_SUN_MACHINES; i++) {
		if(Sun_Machines[i].id_machtype == machtype) {
			if (machtype != (SM_SUN4M_OBP | 0x00))
				printk("TYPE: %s\n", Sun_Machines[i].name);
			else {
#if 0
				prom_getproperty(prom_root_node, "banner-name",
						 sysname, sizeof(sysname));
				printk("TYPE: %s\n", sysname);
#endif				
			}
			return;
		}
	}

	prom_printf("IDPROM: Bogus id_machtype value, 0x%x\n", machtype);
	prom_halt();
}

void sun3_get_model(unsigned char* model)
{
	register int i;

	for (i = 0; i < NUM_SUN_MACHINES; i++) {
		if(Sun_Machines[i].id_machtype == idprom->id_machtype) {
       		        strcpy(model, Sun_Machines[i].name);
			return;
		}
	}
}



/* Calculate the IDPROM checksum (xor of the data bytes). */
static unsigned char __init calc_idprom_cksum(struct idprom *idprom)
{
	unsigned char cksum, i, *ptr = (unsigned char *)idprom;

	for (i = cksum = 0; i <= 0x0E; i++)
		cksum ^= *ptr++;

	return cksum;
}

/* Create a local IDPROM copy, verify integrity, and display information. */
void __init idprom_init(void)
{
	prom_get_idprom((char *) &idprom_buffer, sizeof(idprom_buffer));

	idprom = &idprom_buffer;

	if (idprom->id_format != 0x01)  {
		prom_printf("IDPROM: Unknown format type!\n");
		prom_halt();
	}

	if (idprom->id_cksum != calc_idprom_cksum(idprom)) {
		prom_printf("IDPROM: Checksum failure (nvram=%x, calc=%x)!\n",
			    idprom->id_cksum, calc_idprom_cksum(idprom));
		prom_halt();
	}

	display_system_type(idprom->id_machtype);

	printk("Ethernet address: %x:%x:%x:%x:%x:%x\n",
		    idprom->id_ethaddr[0], idprom->id_ethaddr[1],
		    idprom->id_ethaddr[2], idprom->id_ethaddr[3],
		    idprom->id_ethaddr[4], idprom->id_ethaddr[5]);
}
#include <asm/contregs.h>
#include <asm/sun3mmu.h>
#include <asm/io.h>
#include <asm/movs.h>

#define FC_CONTROL 3    /* This should go somewhere else... */

void sun3_leds(unsigned char byte)
{
	unsigned char dfc;
	
	GET_DFC(dfc);
        SET_DFC(FC_CONTROL);
       	SET_CONTROL_BYTE(AC_LEDS,byte);
	SET_DFC(dfc);
}
/*
** Tablewalk MMU emulator
**
** by Toshiyasu Morita
**
** Started 1/16/98 @ 2:22 am
*/

#include <linux/mman.h>
#include <linux/mm.h>
#include <linux/kernel.h>
#include <linux/ptrace.h>
#include <linux/delay.h>
#include <linux/bootmem.h>

#include <asm/setup.h>
#include <asm/traps.h>
#include <asm/system.h>
#include <asm/uaccess.h>
#include <asm/page.h>
#include <asm/pgtable.h>
#include <asm/sun3mmu.h>
#include <asm/segment.h>
#include <asm/bitops.h>
#include <asm/oplib.h>
#include <asm/mmu_context.h>
#include <asm/dvma.h>

extern void prom_reboot (char *) __attribute__ ((__noreturn__));

#undef DEBUG_MMU_EMU
#define DEBUG_PROM_MAPS

/*
** Defines
*/

#define CONTEXTS_NUM		8
#define SEGMAPS_PER_CONTEXT_NUM 2048
#define PAGES_PER_SEGMENT	16
#define PMEGS_NUM		256
#define PMEG_MASK		0xFF

/*
** Globals
*/

unsigned long vmalloc_end = 0;
unsigned long pmeg_vaddr[PMEGS_NUM];
unsigned char pmeg_alloc[PMEGS_NUM];
unsigned char pmeg_ctx[PMEGS_NUM];

/* pointers to the mm structs for each task in each
   context. 0xffffffff is a marker for kernel context */
struct mm_struct *ctx_alloc[CONTEXTS_NUM] = {0xffffffff, 0, 0, 0, 0, 0, 0, 0};
/* has this context been mmdrop'd? */
static unsigned char ctx_avail = CONTEXTS_NUM-1;

/* array of pages to be marked off for the rom when we do mem_init later */
/* 256 pages lets the rom take up to 2mb of physical ram..  I really
   hope it never wants mote than that. */
unsigned long rom_pages[256];

/* Print a PTE value in symbolic form. For debugging. */
void print_pte (pte_t pte)
{
#if 0
	/* Verbose version. */
	unsigned long val = pte_val (pte);
	printk (" pte=%lx [addr=%lx",
		val, (val & SUN3_PAGE_PGNUM_MASK) << PAGE_SHIFT);
	if (val & SUN3_PAGE_VALID)	printk (" valid");
	if (val & SUN3_PAGE_WRITEABLE)	printk (" write");
	if (val & SUN3_PAGE_SYSTEM)	printk (" sys");
	if (val & SUN3_PAGE_NOCACHE)	printk (" nocache");
	if (val & SUN3_PAGE_ACCESSED)	printk (" accessed");
	if (val & SUN3_PAGE_MODIFIED)	printk (" modified");
	switch (val & SUN3_PAGE_TYPE_MASK) {
		case SUN3_PAGE_TYPE_MEMORY: printk (" memory"); break;
		case SUN3_PAGE_TYPE_IO:     printk (" io");     break;
		case SUN3_PAGE_TYPE_VME16:  printk (" vme16");  break;
		case SUN3_PAGE_TYPE_VME32:  printk (" vme32");  break;
	}
	printk ("]\n");
#else
	/* Terse version. More likely to fit on a line. */
	unsigned long val = pte_val (pte);
	char flags[7], *type;

	flags[0] = (val & SUN3_PAGE_VALID)     ? 'v' : '-';
	flags[1] = (val & SUN3_PAGE_WRITEABLE) ? 'w' : '-';
	flags[2] = (val & SUN3_PAGE_SYSTEM)    ? 's' : '-';
	flags[3] = (val & SUN3_PAGE_NOCACHE)   ? 'x' : '-';
	flags[4] = (val & SUN3_PAGE_ACCESSED)  ? 'a' : '-';
	flags[5] = (val & SUN3_PAGE_MODIFIED)  ? 'm' : '-';
	flags[6] = '\0';

	switch (val & SUN3_PAGE_TYPE_MASK) {
		case SUN3_PAGE_TYPE_MEMORY: type = "memory"; break;
		case SUN3_PAGE_TYPE_IO:     type = "io"    ; break;
		case SUN3_PAGE_TYPE_VME16:  type = "vme16" ; break;
		case SUN3_PAGE_TYPE_VME32:  type = "vme32" ; break;
		default: type = "unknown?"; break;
	}

	printk (" pte=%08lx [%07lx %s %s]\n",
		val, (val & SUN3_PAGE_PGNUM_MASK) << PAGE_SHIFT, flags, type);
#endif
}

/* Print the PTE value for a given virtual address. For debugging. */
void print_pte_vaddr (unsigned long vaddr)
{
	printk (" vaddr=%lx [%02lx]", vaddr, sun3_get_segmap (vaddr));
	print_pte (__pte (sun3_get_pte (vaddr)));
}

/*
 * Initialise the MMU emulator.
 */
void mmu_emu_init(unsigned long bootmem_end)
{
	unsigned long seg, num;
	int i,j;
	
	memset(rom_pages, 0, sizeof(rom_pages));
	memset(pmeg_vaddr, 0, sizeof(pmeg_vaddr));
	memset(pmeg_alloc, 0, sizeof(pmeg_alloc));
	memset(pmeg_ctx, 0, sizeof(pmeg_ctx));
	
	/* pmeg align the end of bootmem, adding another pmeg,
	 * later bootmem allocations will likely need it */
	bootmem_end = (bootmem_end + (2 * SUN3_PMEG_SIZE)) & ~SUN3_PMEG_MASK;

	/* mark all of the pmegs used thus far as reserved */
	for (i=0; i < __pa(bootmem_end) / SUN3_PMEG_SIZE ; ++i)
		pmeg_alloc[i] = 2;


	/* I'm thinking that most of the top pmeg's are going to be
	   used for something, and we probably shouldn't risk it */
	for(num = 0xf0; num <= 0xff; num++)
		pmeg_alloc[num] = 2;

	/* liberate all existing mappings in the rest of kernel space */
	for(seg = bootmem_end; seg < 0x0f800000; seg += SUN3_PMEG_SIZE) {
		i = sun3_get_segmap(seg);
		
		if(!pmeg_alloc[i]) {
#ifdef DEBUG_MMU_EMU
			printk("freed: ");
			print_pte_vaddr (seg);
#endif
			sun3_put_segmap(seg, SUN3_INVALID_PMEG);
		}
	}

	j = 0;
	for (num=0, seg=0x0F800000; seg<0x10000000; seg+=16*PAGE_SIZE) {
		if (sun3_get_segmap (seg) != SUN3_INVALID_PMEG) {
#ifdef DEBUG_PROM_MAPS
			for(i = 0; i < 16; i++) {
				printk ("mapped:");
				print_pte_vaddr (seg + (i*PAGE_SIZE));
				break;
			}
#endif
			// the lowest mapping here is the end of our
			// vmalloc region
			if(!vmalloc_end)
				vmalloc_end = seg;

			// mark the segmap alloc'd, and reserve any
			// of the first 0xbff pages the hardware is
			// already using...  does any sun3 support > 24mb?
			pmeg_alloc[sun3_get_segmap(seg)] = 2;
		}
	}

	
	dvma_init();
	
	
	/* blank everything below the kernel, and we've got the base
	   mapping to start all the contexts off with... */
	for(seg = 0; seg < PAGE_OFFSET; seg += SUN3_PMEG_SIZE) 
		sun3_put_segmap(seg, SUN3_INVALID_PMEG);

	set_fs(MAKE_MM_SEG(3));
	for(seg = 0; seg < 0x10000000; seg += SUN3_PMEG_SIZE) {
		i = sun3_get_segmap(seg);
		for(j = 1; j < CONTEXTS_NUM; j++)
			(*(romvec->pv_setctxt))(j, (void *)seg, i);
	}
	set_fs(KERNEL_DS);
	
}

/* erase the mappings for a dead context.  Uses the pg_dir for hints
   as the pmeg tables proved somewhat unreliable, and unmapping all of
   TASK_SIZE was much slower and no more stable. */
/* todo: find a better way to keep track of the pmegs used by a
   context for when they're cleared */
void clear_context(unsigned long context)
{
     unsigned char oldctx;
     unsigned long i;
    
     if(context) {
	     if(!ctx_alloc[context]) 
		     panic("clear_context: context not allocated\n");

	     ctx_alloc[context]->context = SUN3_INVALID_CONTEXT;
	     ctx_alloc[context] = (struct mm_struct *)0;
	     ctx_avail++;
     }

     oldctx = sun3_get_context();

     sun3_put_context(context);

     for(i = 0; i < SUN3_INVALID_PMEG; i++) {
	     if((pmeg_ctx[i] == context) && (pmeg_alloc[i] == 1)) {
		     sun3_put_segmap(pmeg_vaddr[i], SUN3_INVALID_PMEG);
		     pmeg_ctx[i] = 0;
		     pmeg_alloc[i] = 0;
		     pmeg_vaddr[i] = 0;
	     }
     }
     
     sun3_put_context(oldctx);
}

/* gets an empty context.  if full, kills the next context listed to
   die first */
/* This context invalidation scheme is, well, totally arbitrary, I'm
   sure it could be much more intellegent...  but it gets the job done
   for now without much overhead in making it's decision. */
/* todo: come up with optimized scheme for flushing contexts */
unsigned long get_free_context(struct mm_struct *mm) 
{
	unsigned long new = 1;
	static unsigned char next_to_die = 1;

	if(!ctx_avail) {
		/* kill someone to get our context */
		new = next_to_die;
		clear_context(new);
		next_to_die = (next_to_die + 1) & 0x7;
		if(!next_to_die)
			next_to_die++;
	} else {
		while(new < CONTEXTS_NUM) {
			if(ctx_alloc[new])
				new++;
			else
				break;
		}
		// check to make sure one was really free...
		if(new == CONTEXTS_NUM) 
			panic("get_free_context: failed to find free context");
	}

	ctx_alloc[new] = mm;
	ctx_avail--;

	return new;
}

/*
 * Dynamically select a `spare' PMEG and use it to map virtual `vaddr' in
 * `context'. Maintain internal PMEG management structures. This doesn't
 * actually map the physical address, but does clear the old mappings.
 */
//todo: better allocation scheme? but is extra complexity worthwhile?
//todo: only clear old entries if necessary? how to tell?

static inline void mmu_emu_map_pmeg (int context, int vaddr)
{
	static unsigned char curr_pmeg = 128;
	int i;

	/* Round address to PMEG boundary. */
	vaddr &= ~SUN3_PMEG_MASK;

	/* Find a spare one. */
	while (pmeg_alloc[curr_pmeg] == 2)
		++curr_pmeg;


#ifdef DEBUG_MMU_EMU
printk("mmu_emu_map_pmeg: pmeg %x to context %d vaddr %x\n",
       curr_pmeg, context, vaddr);
#endif

	/* Invalidate old mapping for the pmeg, if any */
	if (pmeg_alloc[curr_pmeg] == 1) {
		sun3_put_context(pmeg_ctx[curr_pmeg]);
		sun3_put_segmap (pmeg_vaddr[curr_pmeg], SUN3_INVALID_PMEG);
		sun3_put_context(context);
	}

	/* Update PMEG management structures. */
	// don't take pmeg's away from the kernel...
	if(vaddr >= PAGE_OFFSET) {
		/* map kernel pmegs into all contexts */
		unsigned char i;
		
		for(i = 0; i < CONTEXTS_NUM; i++) {
			sun3_put_context(i);
			sun3_put_segmap (vaddr, curr_pmeg);
		}
		sun3_put_context(context);
		pmeg_alloc[curr_pmeg] = 2;
		pmeg_ctx[curr_pmeg] = 0;
		
	}
	else {
		pmeg_alloc[curr_pmeg] = 1;
		pmeg_ctx[curr_pmeg] = context;
		sun3_put_segmap (vaddr, curr_pmeg);

	}
	pmeg_vaddr[curr_pmeg] = vaddr;

	/* Set hardware mapping and clear the old PTE entries. */
	for (i=0; i<SUN3_PMEG_SIZE; i+=SUN3_PTE_SIZE) 
		sun3_put_pte (vaddr + i, SUN3_PAGE_SYSTEM);

	/* Consider a different one next time. */
	++curr_pmeg;
}

/*
 * Handle a pagefault at virtual address `vaddr'; check if there should be a
 * page there (specifically, whether the software pagetables indicate that
 * there is). This is necessary due to the limited size of the second-level
 * Sun3 hardware pagetables (256 groups of 16 pages). If there should be a
 * mapping present, we select a `spare' PMEG and use it to create a mapping.
 * `read_flag' is nonzero for a read fault; zero for a write. Returns nonzero
 * if we successfully handled the fault.
 */
//todo: should we bump minor pagefault counter? if so, here or in caller?
//todo: possibly inline this into bus_error030 in <asm/buserror.h> ?

// kernel_fault is set when a kernel page couldn't be demand mapped,
// and forces another try using the kernel page table.  basically a
// hack so that vmalloc would work correctly.

int mmu_emu_handle_fault (unsigned long vaddr, int read_flag, int kernel_fault)
{
	unsigned long segment, offset;
	unsigned char context;
	pte_t *pte;
	pgd_t * crp;

	if(current->mm == NULL) {
		crp = swapper_pg_dir;
		context = 0;
	} else {
		context = current->mm->context;
		if(kernel_fault) 
			crp = swapper_pg_dir;
		else
			crp = current->mm->pgd;
	}

#ifdef DEBUG_MMU_EMU
	printk ("mmu_emu_handle_fault: vaddr=%lx type=%s crp=%p\n",
		vaddr, read_flag ? "read" : "write", crp);
#endif

	segment = (vaddr >> SUN3_PMEG_SIZE_BITS) & 0x7FF;
	offset  = (vaddr >> SUN3_PTE_SIZE_BITS) & 0xF;

#ifdef DEBUG_MMU_EMU
	printk ("mmu_emu_handle_fault: segment=%lx offset=%lx\n", segment, offset);
#endif

	pte = (pte_t *) pgd_val (*(crp + segment));

//todo: next line should check for valid pmd properly.
	if (!pte) {
//                printk ("mmu_emu_handle_fault: invalid pmd\n");
                return 0;
        }

	pte = (pte_t *) __va ((unsigned long)(pte + offset));

	/* Make sure this is a valid page */
	if (!(pte_val (*pte) & SUN3_PAGE_VALID)) 
		return 0;

	/* Make sure there's a pmeg allocated for the page */
	if (sun3_get_segmap (vaddr&~SUN3_PMEG_MASK) == SUN3_INVALID_PMEG) 
		mmu_emu_map_pmeg (context, vaddr);

	/* Write the pte value to hardware MMU */
	sun3_put_pte (vaddr&PAGE_MASK, pte_val (*pte));

	/* Update software copy of the pte value */
// I'm not sure this is necessary. If this is required, we ought to simply
// copy this out when we reuse the PMEG or at some other convenient time.
// Doing it here is fairly meaningless, anyway, as we only know about the
// first access to a given page. --m
	if (!read_flag) {
		if (pte_val (*pte) & SUN3_PAGE_WRITEABLE)
			pte_val (*pte) |= (SUN3_PAGE_ACCESSED
					   | SUN3_PAGE_MODIFIED);
		else 
			return 0;	/* Write-protect error. */
	} else
		pte_val (*pte) |= SUN3_PAGE_ACCESSED;

#ifdef DEBUG_MMU_EMU
	printk ("seg:%d crp:%p ->", get_fs().seg, crp);
	print_pte_vaddr (vaddr);
	printk ("\n");
#endif

	return 1;
}
# $Id: Makefile,v 1.5 1995/11/25 00:59:48 davem Exp $
# Makefile for the Sun Boot PROM interface library under
# Linux.
#
# Note! Dependencies are done automagically by 'make dep', which also
# removes any old dependencies. DON'T put your own dependencies here
# unless it's something special (ie not a .c file).
#
# Note 2! The CFLAGS definitions are now in the main makefile...

OBJS  = init.o console.o printf.o  misc.o
#bootstr.o init.o misc.o segment.o console.o printf.o
all: promlib.a

promlib.a: $(OBJS)
	$(AR) rcs promlib.a $(OBJS)
	sync

dep:
	$(CPP) $(CPPFLAGS) -M *.c > .depend

include $(TOPDIR)/Rules.make
/* $Id: console.c,v 1.10 1996/12/18 06:46:54 tridge Exp $
 * console.c: Routines that deal with sending and receiving IO
 *            to/from the current console device using the PROM.
 *
 * Copyright (C) 1995 David S. Miller (davem@caip.rutgers.edu)
 */

#include <linux/types.h>
#include <linux/kernel.h>
#include <linux/sched.h>
#include <asm/openprom.h>
#include <asm/oplib.h>
#include <asm/system.h>
#include <linux/string.h>

/* Non blocking get character from console input device, returns -1
 * if no input was taken.  This can be used for polling.
 */
int
prom_nbgetchar(void)
{
	int i = -1;
	unsigned long flags;

	save_flags(flags); cli();
		i = (*(romvec->pv_nbgetchar))();
	restore_flags(flags);
	return i; /* Ugh, we could spin forever on unsupported proms ;( */
}

/* Non blocking put character to console device, returns -1 if
 * unsuccessful.
 */
int
prom_nbputchar(char c)
{
	unsigned long flags;
	int i = -1;

	save_flags(flags); cli();
		i = (*(romvec->pv_nbputchar))(c);
	restore_flags(flags);	
	return i; /* Ugh, we could spin forever on unsupported proms ;( */
}

/* Blocking version of get character routine above. */
char
prom_getchar(void)
{
	int character;
	while((character = prom_nbgetchar()) == -1) ;
	return (char) character;
}

/* Blocking version of put character routine above. */
void
prom_putchar(char c)
{
	while(prom_nbputchar(c) == -1) ;
	return;
}

/* Query for input device type */
#if 0
enum prom_input_device
prom_query_input_device()
{
	unsigned long flags;
	int st_p;
	char propb[64];
	char *p;

	switch(prom_vers) {
	case PROM_V0:
	case PROM_V2:
	default:
		switch(*romvec->pv_stdin) {
		case PROMDEV_KBD:	return PROMDEV_IKBD;
		case PROMDEV_TTYA:	return PROMDEV_ITTYA;
		case PROMDEV_TTYB:	return PROMDEV_ITTYB;
		default:
			return PROMDEV_I_UNK;
		};
	case PROM_V3:
	case PROM_P1275:
		save_flags(flags); cli();
		st_p = (*romvec->pv_v2devops.v2_inst2pkg)(*romvec->pv_v2bootargs.fd_stdin);
		__asm__ __volatile__("ld [%0], %%g6\n\t" : :
				     "r" (&current_set[smp_processor_id()]) :
				     "memory");
		restore_flags(flags);
		if(prom_node_has_property(st_p, "keyboard"))
			return PROMDEV_IKBD;
		prom_getproperty(st_p, "device_type", propb, sizeof(propb));
		if(strncmp(propb, "serial", sizeof("serial")))
			return PROMDEV_I_UNK;
		prom_getproperty(prom_root_node, "stdin-path", propb, sizeof(propb));
		p = propb;
		while(*p) p++; p -= 2;
		if(p[0] == ':') {
			if(p[1] == 'a')
				return PROMDEV_ITTYA;
			else if(p[1] == 'b')
				return PROMDEV_ITTYB;
		}
		return PROMDEV_I_UNK;
	case PROM_AP1000:
		return PROMDEV_I_UNK;
	};
}
#endif

/* Query for output device type */

#if 0
enum prom_output_device
prom_query_output_device()
{
	unsigned long flags;
	int st_p;
	char propb[64];
	char *p;
	int propl;

	switch(prom_vers) {
	case PROM_V0:
		switch(*romvec->pv_stdin) {
		case PROMDEV_SCREEN:	return PROMDEV_OSCREEN;
		case PROMDEV_TTYA:	return PROMDEV_OTTYA;
		case PROMDEV_TTYB:	return PROMDEV_OTTYB;
		};
		break;
	case PROM_V2:
	case PROM_V3:
	case PROM_P1275:
		save_flags(flags); cli();
		st_p = (*romvec->pv_v2devops.v2_inst2pkg)(*romvec->pv_v2bootargs.fd_stdout);
		__asm__ __volatile__("ld [%0], %%g6\n\t" : :
				     "r" (&current_set[smp_processor_id()]) :
				     "memory");
		restore_flags(flags);
		propl = prom_getproperty(st_p, "device_type", propb, sizeof(propb));
		if (propl >= 0 && propl == sizeof("display") &&
			strncmp("display", propb, sizeof("display")) == 0)
		{
			return PROMDEV_OSCREEN;
		}
		if(prom_vers == PROM_V3) {
			if(strncmp("serial", propb, sizeof("serial")))
				return PROMDEV_O_UNK;
			prom_getproperty(prom_root_node, "stdout-path", propb, sizeof(propb));
			p = propb;
			while(*p) p++; p -= 2;
			if(p[0]==':') {
				if(p[1] == 'a')
					return PROMDEV_OTTYA;
				else if(p[1] == 'b')
					return PROMDEV_OTTYB;
			}
			return PROMDEV_O_UNK;
		} else {
			/* This works on SS-2 (an early OpenFirmware) still. */
			switch(*romvec->pv_stdin) {
			case PROMDEV_TTYA:	return PROMDEV_OTTYA;
			case PROMDEV_TTYB:	return PROMDEV_OTTYB;
			};
		}
		break;
	case PROM_AP1000:
		return PROMDEV_I_UNK;
	};
	return PROMDEV_O_UNK;
}
#endif
/* $Id: init.c,v 1.9 1996/12/18 06:46:55 tridge Exp $
 * init.c:  Initialize internal variables used by the PROM
 *          library functions.
 *
 * Copyright (C) 1995 David S. Miller (davem@caip.rutgers.edu)
 */

#include <linux/config.h>
#include <linux/kernel.h>
#include <linux/init.h>

#include <asm/openprom.h>
#include <asm/oplib.h>

struct linux_romvec *romvec;
enum prom_major_version prom_vers;
unsigned int prom_rev, prom_prev;

/* The root node of the prom device tree. */
int prom_root_node;

/* Pointer to the device tree operations structure. */
struct linux_nodeops *prom_nodeops;

/* You must call prom_init() before you attempt to use any of the
 * routines in the prom library.  It returns 0 on success, 1 on
 * failure.  It gets passed the pointer to the PROM vector.
 */

extern void prom_meminit(void);
extern void prom_ranges_init(void);

void __init prom_init(struct linux_romvec *rp)
{
#if CONFIG_AP1000
	extern struct linux_romvec *ap_prom_init(void);
	rp = ap_prom_init();
#endif

	romvec = rp;
#ifndef CONFIG_SUN3
	switch(romvec->pv_romvers) {
	case 0:
		prom_vers = PROM_V0;
		break;
	case 2:
		prom_vers = PROM_V2;
		break;
	case 3:
		prom_vers = PROM_V3;
		break;
	case 4:
		prom_vers = PROM_P1275;
		prom_printf("PROMLIB: Sun IEEE Prom not supported yet\n");
		prom_halt();
		break;
	case 42: /* why not :-) */
		prom_vers = PROM_AP1000;
		break;

	default:
		prom_printf("PROMLIB: Bad PROM version %d\n",
			    romvec->pv_romvers);
		prom_halt();
		break;
	};

	prom_rev = romvec->pv_plugin_revision;
	prom_prev = romvec->pv_printrev;
	prom_nodeops = romvec->pv_nodeops;

	prom_root_node = prom_getsibling(0);
	if((prom_root_node == 0) || (prom_root_node == -1))
		prom_halt();

	if((((unsigned long) prom_nodeops) == 0) || 
	   (((unsigned long) prom_nodeops) == -1))
		prom_halt();

	prom_meminit();

	prom_ranges_init();
#endif
//	printk("PROMLIB: Sun Boot Prom Version %d Revision %d\n",
//	       romvec->pv_romvers, prom_rev);

	/* Initialization successful. */
	return;
}
/* $Id: misc.c,v 1.15 1997/05/14 20:45:00 davem Exp $
 * misc.c:  Miscellaneous prom functions that don't belong
 *          anywhere else.
 *
 * Copyright (C) 1995 David S. Miller (davem@caip.rutgers.edu)
 */

#include <linux/types.h>
#include <linux/kernel.h>
#include <linux/sched.h>
#include <asm/sun3-head.h>
#include <asm/idprom.h>
#include <asm/openprom.h>
#include <asm/oplib.h>
#include <asm/movs.h>

/* Reset and reboot the machine with the command 'bcommand'. */
void
prom_reboot(char *bcommand)
{
	unsigned long flags;
	save_flags(flags); cli();
	(*(romvec->pv_reboot))(bcommand);
	restore_flags(flags);
}

/* Drop into the prom, with the chance to continue with the 'go'
 * prom command.
 */
void
prom_cmdline(void)
{
}

/* Drop into the prom, but completely terminate the program.
 * No chance of continuing.
 */
void
prom_halt(void)
{
	unsigned long flags;
again:
	save_flags(flags); cli();
	(*(romvec->pv_halt))();
	restore_flags(flags);
	goto again; /* PROM is out to get me -DaveM */
}

typedef void (*sfunc_t)(void);

/* Get the idprom and stuff it into buffer 'idbuf'.  Returns the
 * format type.  'num_bytes' is the number of bytes that your idbuf
 * has space for.  Returns 0xff on error.
 */
unsigned char
prom_get_idprom(char *idbuf, int num_bytes)
{
	int i, oldsfc;
	GET_SFC(oldsfc);
	SET_SFC(FC_CONTROL);
	for(i=0;i<num_bytes; i++)
	{
		/* There is a problem with the GET_CONTROL_BYTE
		macro; defining the extra variable
		gets around it.
		*/
		int c;
		GET_CONTROL_BYTE(SUN3_IDPROM_BASE + i, c);
		idbuf[i] = c;
	}
	SET_SFC(oldsfc);
	return idbuf[0];
}

/* Get the major prom version number. */
int
prom_version(void)
{
	return romvec->pv_romvers;
}

/* Get the prom plugin-revision. */
int
prom_getrev(void)
{
	return prom_rev;
}

/* Get the prom firmware print revision. */
int
prom_getprev(void)
{
	return prom_prev;
}
/* $Id: printf.c,v 1.5 1996/04/04 16:31:07 tridge Exp $
 * printf.c:  Internal prom library printf facility.
 *
 * Copyright (C) 1995 David S. Miller (davem@caip.rutgers.edu)
 */

/* This routine is internal to the prom library, no one else should know
 * about or use it!  It's simple and smelly anyway....
 */

#include <linux/config.h>
#include <linux/kernel.h>

#include <asm/openprom.h>
#include <asm/oplib.h>

#ifdef CONFIG_KGDB
extern int kgdb_initialized;
#endif

static char ppbuf[1024];

void
prom_printf(char *fmt, ...)
{
	va_list args;
	char ch, *bptr;
	int i;

	va_start(args, fmt);

#ifdef CONFIG_KGDB
	ppbuf[0] = 'O';
	i = vsprintf(ppbuf + 1, fmt, args) + 1;
#else
	i = vsprintf(ppbuf, fmt, args);
#endif

	bptr = ppbuf;

#if CONFIG_AP1000
        ap_write(1,bptr,strlen(bptr));
#else

#ifdef CONFIG_KGDB
	if (kgdb_initialized) {
		printk("kgdb_initialized = %d\n", kgdb_initialized);
		putpacket(bptr, 1);
	} else
#else
	while((ch = *(bptr++)) != 0) {
		if(ch == '\n')
			prom_putchar('\r');

		prom_putchar(ch);
	}
#endif
#endif
	va_end(args);
	return;
}
/*
 * SBus helper functions
 *
 * Sun3 don't have a sbus, but many of the used devices are also
 * used on Sparc machines with sbus. To avoid having a lot of
 * duplicate code, we provide necessary glue stuff to make using
 * of the sbus driver code possible.
 *
 * (C) 1999 Thomas Bogendoerfer (tsbogend@alpha.franken.de)
 */

#include <linux/types.h>
#include <linux/init.h>

extern void rs_init(void);

void __init sbus_init(void)
{

	rs_init();

}

void *sparc_alloc_io (u32 address, void *virtual, int len, char *name,
                      u32 bus_type, int rdonly)
{
	return (void *)address;
}

 /*
 * linux/arch/m68k/sun3/sun3ints.c -- Sun-3(x) Linux interrupt handling code
 *
 * This file is subject to the terms and conditions of the GNU General Public
 * License.  See the file COPYING in the main directory of this archive
 * for more details.
 */

#include <linux/types.h>
#include <linux/kernel.h>
#include <linux/sched.h>
#include <linux/kernel_stat.h>
#include <linux/interrupt.h>
#include <asm/segment.h>
#include <asm/intersil.h>
#include <asm/oplib.h>
#include <asm/sun3ints.h>

extern void sun3_leds (unsigned char);

void sun3_disable_interrupts(void)
{
	sun3_disable_irq(0);
}

void sun3_enable_interrupts(void)
{
	sun3_enable_irq(0);
}	

int led_pattern[8] = {
       ~(0x80), ~(0x01),
       ~(0x40), ~(0x02),
       ~(0x20), ~(0x04),
       ~(0x10), ~(0x08)
};

volatile unsigned char* sun3_intreg;

void sun3_insert_irq(irq_node_t **list, irq_node_t *node)
{
}

void sun3_delete_irq(irq_node_t **list, void *dev_id)
{
}

void sun3_enable_irq(unsigned int irq)
{
	*sun3_intreg |=  (1<<irq);
}

void sun3_disable_irq(unsigned int irq)
{
	*sun3_intreg &= ~(1<<irq);
}

inline void sun3_do_irq(int irq, struct pt_regs *fp)
{
	kstat.irqs[0][SYS_IRQS + irq]++;
	*sun3_intreg &= ~(1<<irq);
	*sun3_intreg |=  (1<<irq);
}

int sun3_get_irq_list(char *buf)
{
	return 0;
}

static void sun3_int7(int irq, void *dev_id, struct pt_regs *fp)
{
	sun3_do_irq(irq,fp);
	if(!(kstat.irqs[0][SYS_IRQS + irq] % 2000)) 
		sun3_leds(led_pattern[(kstat.irqs[0][SYS_IRQS+irq]%16000)/2000]);
}

static void sun3_int5(int irq, void *dev_id, struct pt_regs *fp)
{
        kstat.irqs[0][SYS_IRQS + irq]++;
#ifdef CONFIG_SUN3
	intersil_clear();
#endif
        *sun3_intreg &= ~(1<<irq);
        *sun3_intreg |=  (1<<irq);
#ifdef CONFIG_SUN3
	intersil_clear();
#endif
        do_timer(fp);
        if(!(kstat.irqs[0][SYS_IRQS + irq] % 20))
                sun3_leds(led_pattern[(kstat.irqs[0][SYS_IRQS+irq]%160)
                /20]);
}

/* handle requested ints, excepting 5 and 7, which always do the same
   thing */
static void *dev_ids[SYS_IRQS];
static void (*sun3_inthandler[SYS_IRQS])(int, void *, struct pt_regs *) = {
	NULL, NULL, NULL, NULL, NULL, sun3_int5, NULL, sun3_int7
};
static void (*sun3_vechandler[192])(int, void *, struct pt_regs *);
static void *vec_ids[192];
static char *vec_names[192];

static void sun3_inthandle(int irq, void *dev_id, struct pt_regs *fp)
{
	if(sun3_inthandler[irq] == NULL)
		panic ("bad interrupt %d received (id %p)\n",irq, dev_id);

        kstat.irqs[0][SYS_IRQS + irq]++;
        *sun3_intreg &= ~(1<<irq);

	sun3_inthandler[irq](irq, dev_ids[irq], fp);
}

static void sun3_vec255(int irq, void *dev_id, struct pt_regs *fp)
{
//	intersil_clear();
}

void (*sun3_default_handler[SYS_IRQS])(int, void *, struct pt_regs *) = {
	sun3_inthandle, sun3_inthandle, sun3_inthandle, sun3_inthandle,
	sun3_inthandle, sun3_int5, sun3_inthandle, sun3_int7
};

static char *dev_names[SYS_IRQS] = { NULL, NULL, NULL, NULL, 
				     NULL, "timer", NULL, NULL };

void sun3_init_IRQ(void)
{
	int i;

	*sun3_intreg = 1;

	for(i = 0; i < SYS_IRQS; i++)
	{
		if(dev_names[i])
			sys_request_irq(i, sun3_default_handler[i],
					0, dev_names[i], NULL);
	}

	for(i = 0; i < 192; i++) 
		sun3_vechandler[i] = NULL;
	
	sun3_vechandler[191] = sun3_vec255;
}
                                
int sun3_request_irq(unsigned int irq, void (*handler)(int, void *, struct pt_regs *),
                      unsigned long flags, const char *devname, void *dev_id)
{

	if(irq < SYS_IRQS) {
		if(sun3_inthandler[irq] != NULL) {
			printk("sun3_request_irq: request for irq %d -- already taken!\n", irq);
			return 1;
		}
		
		sun3_inthandler[irq] = handler;
		dev_ids[irq] = dev_id;
		dev_names[irq] = devname;
		
		/* setting devname would be nice */
		sys_request_irq(irq, sun3_default_handler[irq], 0, devname, NULL);

		return 0;
	} else {
		if((irq >= 64) && (irq <= 255)) {
		        int vec;

			vec = irq - 64;
			if(sun3_vechandler[vec] != NULL) {
				printk("sun3_request_irq: request for vec %d -- already taken!\n", irq);
				return 1;
			}

			sun3_vechandler[vec] = handler;
			vec_ids[vec] = dev_id;
			vec_names[vec] = devname;
			
			return 0;
		}
	}

	printk("sun3_request_irq: invalid irq %d\n", irq);
	return 1;

}
                        
void sun3_free_irq(unsigned int irq, void *dev_id)
{

	if(irq < SYS_IRQS) {
		if(sun3_inthandler[irq] == NULL) 
			panic("sun3_free_int: attempt to free unused irq %d\n", irq);
		if(dev_ids[irq] != dev_id)
			panic("sun3_free_int: incorrect dev_id for irq %d\n", irq);
		
		sun3_inthandler[irq] = NULL;
		return;
	} else if((irq >= 64) && (irq <= 255)) {
		int vec;

		vec = irq - 64;
		if(sun3_vechandler[vec] == NULL)
			panic("sun3_free_int: attempt to free unused vector %d\n", irq);
		if(vec_ids[irq] != dev_id)
			panic("sun3_free_int: incorrect dev_id for vec %d\n", irq);
		
		sun3_vechandler[vec] = NULL;
		return;
	} else {
		panic("sun3_free_irq: invalid irq %d\n", irq);
	}		
}

void sun3_process_int(int irq, struct pt_regs *regs)
{

	if((irq >= 64) && (irq <= 255)) {
		int vec;

		vec = irq - 64;
		if(sun3_vechandler[vec] == NULL) 
			panic ("bad interrupt vector %d received\n",irq);
			
		sun3_vechandler[vec](irq, vec_ids[vec], regs);
		return;
	} else {
		panic("sun3_process_int: unable to handle interrupt vector %d\n",
		      irq);
	}
}
/*
 * arch/m68k/sun3/intersil.c
 *
 * basic routines for accessing the intersil clock within the sun3 machines
 *
 * started 11/12/1999 Sam Creasey
 *
 * This file is subject to the terms and conditions of the GNU General Public
 * License.  See the file COPYING in the main directory of this archive
 * for more details.
 */

#include <linux/kernel.h>

#include <asm/system.h>
#include <asm/rtc.h>
#include <asm/intersil.h>


/* bits to set for start/run of the intersil */
#define STOP_VAL (INTERSIL_STOP | INTERSIL_INT_ENABLE | INTERSIL_24H_MODE)
#define START_VAL (INTERSIL_RUN | INTERSIL_INT_ENABLE | INTERSIL_24H_MODE)

/* does this need to be implemented? */
unsigned long sun3_gettimeoffset(void)
{ 
  return 1;
}

void sun3_gettod (int *yearp, int *monp, int *dayp,
                   int *hourp, int *minp, int *secp)
{
	unsigned char wday;
	volatile struct intersil_dt* todintersil;
	unsigned long flags;

        todintersil = (struct intersil_dt *) &intersil_clock->counter;

	save_and_cli(flags);

	intersil_clock->cmd_reg = STOP_VAL;

	*secp  = todintersil->csec;
        *hourp = todintersil->hour;
        *minp  = todintersil->minute;
        *secp  = todintersil->second; 
        *monp  = todintersil->month;
        *dayp  = todintersil->day;
        *yearp = todintersil->year+68; /* The base year for sun3 is 1968 */
	wday = todintersil->weekday;

	intersil_clock->cmd_reg = START_VAL;

	restore_flags(flags);
}


/* get/set hwclock */

int sun3_hwclk(int set, struct hwclk_time *t)
{
	volatile struct intersil_dt *todintersil;
	unsigned long flags;

        todintersil = (struct intersil_dt *) &intersil_clock->counter;

	save_and_cli(flags);

	intersil_clock->cmd_reg = STOP_VAL;

	/* set or read the clock */
	if(set) {
		todintersil->csec = 0;
		todintersil->hour = t->hour;
		todintersil->minute = t->min;
		todintersil->second = t->sec;
		todintersil->month = t->mon;
		todintersil->day = t->day;
		todintersil->year = t->year - 68;
		todintersil->weekday = t->wday;
	} else {
		/* read clock */
		t->sec = todintersil->csec;
		t->hour = todintersil->hour;
		t->min = todintersil->minute;
		t->sec = todintersil->second;
		t->mon = todintersil->month;
		t->day = todintersil->day;
		t->year = todintersil->year + 68;
		t->wday = todintersil->weekday;
	}

	intersil_clock->cmd_reg = START_VAL;

	restore_flags(flags);

	return 0;

}

#include <linux/module.h>
#include <linux/types.h>
#include <asm/dvma.h>
#include <asm/idprom.h>

/*
 * Add things here when you find the need for it.
 */
EXPORT_SYMBOL(dvma_map_align);
EXPORT_SYMBOL(dvma_unmap);
EXPORT_SYMBOL(dvma_malloc_align);
EXPORT_SYMBOL(dvma_free);
EXPORT_SYMBOL(idprom);
gister in half and do faster lookups.
 */

static void enable_crime_irq(unsigned int irq)
{
	u64 crime_mask;
	unsigned long flags;

	save_and_cli(flags);
	crime_mask = crime_read_64(CRIME_INT_MASK);
	crime_mask |= 1 << (irq - 1);
	crime_write_64(CRIME_INT_MASK, crime_mask);
	restore_flags(flags);
}

static unsigned int startup_crime_irq(unsigned int irq)
{
	enable_crime_irq(irq);
	return 0; /* This is probably not right; we could have pending irqs */
}

static void disable_crime_irq(unsigned int irq)
{
	u64 crime_mask;
	unsigned long flags;

	save_and_cli(flags);
	crime_mask = crime_read_64(CRIME_INT_MASK);
	crime_mask &= ~(1 << (irq - 1));
	crime_write_64(CRIME_INT_MASK, crime_mask);
	restore_flags(flags);
}

static void mask_and_ack_crime_irq (unsigned int irq)
{
	u64 crime_mask;
	unsigned long flags;

	/* Edge triggered interrupts must be cleared. */
	if ((irq <= CRIME_GBE0_IRQ && irq >= CRIME_GBE3_IRQ)
	    || (irq <= CRIME_RE_EMPTY_E_IRQ && irq >= CRIME_RE_IDLE_E_IRQ)
	    || (irq <= CRIME_SOFT0_IRQ && irq >= CRIME_SOFT2_IRQ)) {
		save_and_cli(flags);
		crime_mask = crime_read_64(CRIME_HARD_INT);
		crime_mask &= ~(1 << (irq - 1));
		crime_write_64(CRIME_HARD_INT, crime_mask);
		restore_flags(flags);
	}
	disable_crime_irq(irq);
}

static void end_crime_irq(unsigned int irq)
{
	if (!(irq_desc[irq].status & (IRQ_DISABLED|IRQ_INPROGRESS)))
		enable_crime_irq (irq);
}

#define shutdown_crime_irq disable_crime_irq

static struct hw_interrupt_type ip32_crime_interrupt = {
	"IP32 CRIME",
	startup_crime_irq,
	shutdown_crime_irq,
	enable_crime_irq,
	disable_crime_irq,
	mask_and_ack_crime_irq,
	end_crime_irq,
	NULL
};

/*
 * This is for MACE PCI interrupts.  We can decrease bus traffic by masking
 * as close to the source as possible.  This also means we can take the
 * next chunk of the CRIME register in one piece.
 */

static void enable_macepci_irq(unsigned int irq)
{
	u32 mace_mask;
	u64 crime_mask;
	unsigned long flags;

	save_and_cli(flags);
	mace_mask = mace_read_32(MACEPCI_CONTROL);
	mace_mask |= MACEPCI_CONTROL_INT(irq - 9);
	mace_write_32(MACEPCI_CONTROL, mace_mask);
	/*
	 * In case the CRIME interrupt isn't enabled, we must enable it;
	 * however, we never disable interrupts at that level.
	 */
	crime_mask = crime_read_64(CRIME_INT_MASK);
	crime_mask |= 1 << (irq - 1);
	crime_write_64(CRIME_INT_MASK, crime_mask);
	restore_flags(flags);
}

static unsigned int startup_macepci_irq(unsigned int irq)
{
	enable_macepci_irq (irq);

	return 0; /* XXX */
}

static void disable_macepci_irq(unsigned int irq)
{
	u32 mace_mask;
	unsigned long flags;

	save_and_cli(flags);
	mace_mask = mace_read_32(MACEPCI_CONTROL);
	mace_mask &= ~MACEPCI_CONTROL_INT(irq - 9);
	mace_write_32(MACEPCI_CONTROL, mace_mask);
	restore_flags(flags);
}

static void end_macepci_irq(unsigned int irq)
{
	if (!(irq_desc[irq].status & (IRQ_DISABLED|IRQ_INPROGRESS)))
		enable_macepci_irq (irq);
}

#define shutdown_macepci_irq disable_macepci_irq
#define mask_and_ack_macepci_irq disable_macepci_irq

static struct hw_interrupt_type ip32_macepci_interrupt = {
	"IP32 MACE PCI",
	startup_macepci_irq,
	shutdown_macepci_irq,
	enable_macepci_irq,
	disable_macepci_irq,
	mask_and_ack_macepci_irq,
	end_macepci_irq,
	NULL
};

/* This is used for MACE ISA interrupts.  That means bits 4-6 in the
 * CRIME register.
 */

static void enable_maceisa_irq (unsigned int irq)
{
	u64 crime_mask;
	u32 mace_mask;
	unsigned int crime_int = 0;
	unsigned long flags;

	DBG ("maceisa enable: %u\n", irq);
	
	switch (irq) {
	case MACEISA_AUDIO_SW_IRQ ... MACEISA_AUDIO3_MERR_IRQ:
		crime_int = MACE_AUDIO_INT;
		break;
	case MACEISA_RTC_IRQ ... MACEISA_TIMER2_IRQ:
		crime_int = MACE_MISC_INT;
		break;
	case MACEISA_PARALLEL_IRQ ... MACEISA_SERIAL2_RDMAOR_IRQ:
		crime_int = MACE_SUPERIO_INT;
		break;
	}
	DBG ("crime_int %016lx enabled\n", crime_int);
	save_and_cli(flags);
	crime_mask = crime_read_64(CRIME_INT_MASK);
	crime_mask |= crime_int;
	crime_write_64(CRIME_INT_MASK, crime_mask);
	mace_mask = mace_read_32(MACEISA_INT_MASK);
	mace_mask |= 1 << (irq - 33);
	mace_write_32(MACEISA_INT_MASK, mace_mask);
	restore_flags(flags);
}

static unsigned int startup_maceisa_irq (unsigned int irq)
{
	enable_maceisa_irq(irq);
	return 0;
}

static void disable_maceisa_irq(unsigned int irq)
{
	u32 mace_mask;
	unsigned long flags;

	save_and_cli (flags);
	mace_mask = mace_read_32(MACEISA_INT_MASK);
	mace_mask &= ~(1 << (irq - 33));
	mace_write_32(MACEISA_INT_MASK, mace_mask);
	restore_flags(flags);
}

static void mask_and_ack_maceisa_irq(unsigned int irq)
{
	u32 mace_mask;
	unsigned long flags;

	switch (irq) {
	case MACEISA_PARALLEL_IRQ:
	case MACEISA_SERIAL1_TDMAPR_IRQ:
	case MACEISA_SERIAL2_TDMAPR_IRQ:
		save_and_cli(flags);
		mace_mask = mace_read_32(MACEISA_INT_STAT);
		mace_mask &= ~(1 << (irq - 33));
		mace_write_32(MACEISA_INT_STAT, mace_mask);
		restore_flags(flags);
		break;
	}
	disable_maceisa_irq(irq);
}

static void end_maceisa_irq(unsigned irq)
{
	if (!(irq_desc[irq].status & (IRQ_DISABLED|IRQ_INPROGRESS)))
		enable_maceisa_irq (irq);
}

#define shutdown_maceisa_irq disable_maceisa_irq

static struct hw_interrupt_type ip32_maceisa_interrupt = {
	"IP32 MACE ISA",
	startup_maceisa_irq,
	shutdown_maceisa_irq,
	enable_maceisa_irq,
	disable_maceisa_irq,
	mask_and_ack_maceisa_irq,
	end_maceisa_irq,
	NULL
};

/* This is used for regular non-ISA, non-PCI MACE interrupts.  That means
 * bits 0-3 and 7 in the CRIME register.
 */

static void enable_mace_irq(unsigned int irq)
{
	u64 crime_mask;
	unsigned long flags;

	save_and_cli (flags);
	crime_mask = crime_read_64 (CRIME_INT_MASK);
	crime_mask |= 1 << (irq - 1);
	crime_write_64 (CRIME_INT_MASK, crime_mask);
	restore_flags (flags);
}

static unsigned int startup_mace_irq(unsigned int irq)
{
	enable_mace_irq(irq);
	return 0;
}

static void disable_mace_irq(unsigned int irq)
{
	u64 crime_mask;
	unsigned long flags;

	save_and_cli (flags);
	crime_mask = crime_read_64 (CRIME_INT_MASK);
	crime_mask &= ~(1 << (irq - 1));
	crime_write_64 (CRIME_INT_MASK, crime_mask);
	restore_flags(flags);
}

static void end_mace_irq(unsigned int irq)
{
	if (!(irq_desc[irq].status & (IRQ_DISABLED|IRQ_INPROGRESS)))
		enable_mace_irq (irq);
}

#define shutdown_mace_irq disable_mace_irq
#define mask_and_ack_mace_irq disable_mace_irq

static struct hw_interrupt_type ip32_mace_interrupt = {
	"IP32 MACE",
	startup_mace_irq,
	shutdown_mace_irq,
	enable_mace_irq,
	disable_mace_irq,
	mask_and_ack_mace_irq,
	end_mace_irq,
	NULL
};

static void ip32_unknown_interrupt (struct pt_regs *regs)
{
	u64 crime;
	u32 mace;
	
	printk ("Unknown interrupt occurred!\n");
	printk ("cp0_status: %08x\tcp0_cause: %08x\n",
		read_32bit_cp0_register (CP0_STATUS),
		read_32bit_cp0_register (CP0_CAUSE));
	crime = crime_read_64 (CRIME_INT_MASK);
	printk ("CRIME interrupt mask: %016lx\n", crime);
	crime = crime_read_64 (CRIME_INT_STAT);
	printk ("CRIME interrupt status: %016lx\n", crime);
	crime = crime_read_64 (CRIME_HARD_INT);
	printk ("CRIME hardware interrupt register: %016lx\n", crime);
	mace = mace_read_32 (MACEISA_INT_MASK);
	printk ("MACE ISA interrupt mask: %08x\n", mace);
	mace = mace_read_32 (MACEISA_INT_STAT);
	printk ("MACE ISA interrupt status: %08x\n", mace);
	mace = mace_read_32 (MACEPCI_CONTROL);
	printk ("MACE PCI control register: %08x\n", mace);

	printk("Register dump:\n");
	show_regs(regs);

	printk("Please mail this report to linux-mips@oss.sgi.com\n");
	printk("Spinning...");
	while(1) ;
}

/* CRIME 1.1 appears to deliver all interrupts to this one pin. */
void ip32_irq0(struct pt_regs *regs)
{
	u64 crime_int = crime_read_64 (CRIME_INT_STAT);
	int irq = 0;
	
	if (crime_int & CRIME_MACE_INT_MASK) {
		crime_int &= CRIME_MACE_INT_MASK;
		irq = ffs (crime_int);
	} else if (crime_int & CRIME_MACEISA_INT_MASK) {
		u32 mace_int;
		mace_int = mace_read_32 (MACEISA_INT_STAT);
		if (mace_int == 0)
			irq = 0;
		else
			irq = ffs (mace_int) + 32;
	} else if (crime_int & CRIME_MACEPCI_INT_MASK) {
		crime_int &= CRIME_MACEPCI_INT_MASK;
		crime_int >>= 8;
		irq = ffs (crime_int) + 8;
	} else if (crime_int & 0xffff0000) {
		crime_int >>= 16;
		irq = ffs (crime_int) + 16;
	}
	if (irq == 0)
		ip32_unknown_interrupt(reg/* ld script to make m68k Linux kernel */
OUTPUT_FORMAT("elf32-m68k", "elf32-m68k", "elf32-m68k")
OUTPUT_ARCH(m68k)
ENTRY(_start)
SECTIONS
{
  . = 0xE004000;
  _text = .;			/* Text and read-only data */
  .text : {
	*(.head)
	*(.text)
	*(.fixup)
	*(.gnu.warning)
	} = 0x4e75
  .kstrtab : { *(.kstrtab) }


  _etext = .;			/* End of text section */

  .data : {			/* Data */
	*(.rodata)
	*(.rodata.*)
	*(.data)
	CONSTRUCTORS
  	. = ALIGN(16);		/* Exception table */
  	__start___ex_table = .;
  	*(__ex_table) 
  	__stop___ex_table = .;
  	__start___ksymtab = .;	/* Kernel symbol table */
  	*(__ksymtab) 
  	__stop___ksymtab = .;
	}
  /* End of data goes *here* so that freeing init code works properly. */
  _edata = .;

  . = ALIGN(8192);	/* Init code and data */
__init_begin = .;
  	.text.init : { *(.text.init) }
  	.data.init : { *(.data.init) }
	. = ALIGN(16);
	__setup_start = .;
	.setup.init : { *(.setup.init) }
	__setup_end = .;
	__initcall_start = .;
	.initcall.init : { *(.initcall.init) }
	__initcall_end = .;
	. = ALIGN(8192);
	__init_end = .;
	.init.task : { *(init_task) }
	

  .bss : { *(.bss) }		/* BSS */

  _end = . ;

  .crap : {
  	/* Stabs debugging sections.  */
	*(.stab)
	*(.stabstr)
	*(.stab.excl)
	*(.stab.exclstr)
	*(.stab.index)
	*(.stab.indexstr)
	*(.comment)
	*(.note)
  }

}
ELF




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ELF




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��	�~xt����@x�D$ ��D$ ������!��H�P9P}
�������t&�F P�FhP��P��PU�D$\%���P�D$X%���P��T%���P��d%���P�L$`Q�l$`U1���t�CPP1���t�C<P1���t�C8P��P1���t�CdPW��
P���Pj��$�P��$�Q��
P���P���P���P��P��P��P��P�FLP��$�/* ld script to make UltraLinux kernel */
OUTPUT_FORMAT("elf64-sparc", "elf64-sparc", "elf64-sparc")
OUTPUT_ARCH(sparc:v9a)
ENTRY(_start)

SECTIONS
{
  swapper_pmd_dir = 0x0000000000402000;
  empty_pg_dir = 0x0000000000403000;
  . = 0x4000;
  .text 0x0000000000404000 :
  {
    *(.text)
    *(.gnu.warning)
  } =0
  _etext = .;
  PROVIDE (etext = .);
  .rodata    : { *(.rodata) *(.rodata.*) }
  .rodata1   : { *(.rodata1) }
  .data    :
  {
    *(.data)
    CONSTRUCTORS
  }
  .data1   : { *(.data1) }
  _edata  =  .;
  PROVIDE (edata = .);
  .fixup   : { *(.fixup) }
  . = ALIGN(16);
  __start___ex_table = .;
  __ex_table : { *(__ex_table) }
  __stop___ex_table = .;
  __start___ksymtab = .;
  __ksymtab  : { *(__ksymtab) }
  __stop___ksymtab = .;
  __kstrtab  : { *(.kstrtab) }
  __start___kallsyms = .;	/* All kernel symbols */
  __kallsyms : { *(__kallsyms) }
  __stop___kallsyms = .;
  . = ALIGN(8192);
  __init_begin = .;
  .text.init : { *(.text.init) }
  .data.init : { *(.data.init) }
  . = ALIGN(16);
  __setup_start = .;
  .setup_init : { *(.setup.init) }
  __setup_end = .;
  __initcall_start = .;
  .initcall.init : { *(.initcall.init) }
  __initcall_end = .;
  . = ALIGN(8192);
  __init_end = .;
  . = ALIGN(64);
  .data.cacheline_aligned : { *(.data.cacheline_aligned) }
  __bss_start = .;
  .sbss      : { *(.sbss) *(.scommon) }
  .bss       :
  {
   *(.dynbss)
   *(.bss)
   *(COMMON)
  }
  _end = . ;
  PROVIDE (end = .);
  /* Stabs debugging sections.  */
  .stab 0 : { *(.stab) }
  .stabstr 0 : { *(.stabstr) }
  .stab.excl 0 : { *(.stab.excl) }
  .stab.exclstr 0 : { *(.stab.exclstr) }
  .stab.index 0 : { *(.stab.index) }
  .stab.indexstr 0 : { *(.stab.indexstr) }
  .comment 0 : { *(.comment) }
  .debug          0 : { *(.debug) }
  .debug_srcinfo  0 : { *(.debug_srcinfo) }
  .debug_aranges  0 : { *(.debug_aranges) }
  .debug_pubnames 0 : { *(.debug_pubnames) }
  .debug_sfnames  0 : { *(.debug_sfnames) }
  .line           0 : { *(.line) }
  /DISCARD/ : { *(.text.exit) *(.data.exit) *(.exitcall.exit) }
}
# $Id: Makefile,v 1.69 2001/11/19 04:09:53 davem Exp $
# Makefile for the linux kernel.
#
# Note! Dependencies are done automagically by 'make dep', which also
# removes any old dependencies. DON'T put your own dependencies here
# unless it's something special (ie not a .c file).
#
# Note 2! The CFLAGS definitions are now in the main makefile...

SH = $(CONFIG_SHELL)

.S.s:
	$(CPP) $(AFLAGS) -ansi $< -o $*.s

.S.o:
	$(CC) $(AFLAGS) -ansi -c $< -o $*.o

all: kernel.o head.o init_task.o

O_TARGET := kernel.o

export-objs	:= sparc64_ksyms.o
obj-y		:= process.o setup.o cpu.o idprom.o \
		   traps.o devices.o auxio.o \
		   irq.o ptrace.o time.o sys_sparc.o signal.o \
		   unaligned.o central.o pci.o starfire.o semaphore.o \
		   power.o sbus.o iommu_common.o sparc64_ksyms.o chmc.o

obj-$(CONFIG_PCI)	 += ebus.o isa.o pci_common.o pci_iommu.o \
			    pci_psycho.o pci_sabre.o pci_schizo.o
obj-$(CONFIG_SMP)	 += smp.o trampoline.o
obj-$(CONFIG_SPARC32_COMPAT) += sys32.o sys_sparc32.o signal32.o ioctl32.o
obj-$(CONFIG_BINFMT_ELF32) += binfmt_elf32.o
obj-$(CONFIG_BINFMT_AOUT32) += binfmt_aout32.o

ifdef CONFIG_SUNOS_EMUL
  obj-y += sys_sunos32.o sunos_ioctl32.o
else
  ifdef CONFIG_SOLARIS_EMUL
    obj-y += sys_sunos32.o sunos_ioctl32.o
  endif
endif

head.o: head.S ttable.S itlb_base.S dtlb_base.S dtlb_backend.S dtlb_prot.S \
	etrap.S rtrap.S winfixup.S entry.S
	$(CC) $(AFLAGS) -ansi -c $*.S -o $*.o

#
# This is just to get the dependencies...
#
binfmt_elf32.o: $(TOPDIR)/fs/binfmt_elf.c

ifneq ($(NEW_GCC),y)
  CMODEL_CFLAG := -mmedlow
else
  CMODEL_CFLAG := -m64 -mcmodel=medlow
endif

check_asm: dummy
	@if [ ! -r $(HPATH)/asm/asm_offsets.h ] ; then \
	  touch $(HPATH)/asm/asm_offsets.h ; \
	fi
	@echo "/* Automatically generated. Do not edit. */" > asm_offsets.h
	@echo "#ifndef __ASM_OFFSETS_H__" >> asm_offsets.h
	@echo -e "#define __ASM_OFFSETS_H__\n" >> asm_offsets.h
	@echo -e "#include <linux/config.h>\n" >> asm_offsets.h
	@echo -e "#ifndef CONFIG_SMP\n" >> asm_offsets.h
	@echo "#include <linux/config.h>" > tmp.c
	@echo "#undef CONFIG_SMP" >> tmp.c
	@echo "#include <linux/sched.h>" >> tmp.c
	$(CPP) $(CPPFLAGS) -P tmp.c -o tmp.i
	@echo "/* Automatically generated. Do not edit. */" > check_asm_data.c
	@echo "#include <linux/config.h>" >> check_asm_data.c
	@echo "#undef CONFIG_SMP" >> check_asm_data.c
	@echo "#include <linux/sched.h>" >> check_asm_data.c
	@echo 'unsigned int check_asm_data[] = {' >> check_asm_data.c
	$(SH) ./check_asm.sh -data task tmp.i check_asm_data.c
	$(SH) ./check_asm.sh -data mm tmp.i check_asm_data.c
	$(SH) ./check_asm.sh -data thread tmp.i check_asm_data.c
	@echo '};' >> check_asm_data.c
	$(CC) $(CPPFLAGS) $(CMODEL_CFLAG) -ffixed-g4 -S -o check_asm_data.s check_asm_data.c
	@echo "/* Automatically generated. Do not edit. */" > check_asm.c
	@echo 'extern int printf(const char *fmt, ...);' >>check_asm.c
	@echo 'unsigned int check_asm_data[] = {' >> check_asm.c
	$(SH) ./check_asm.sh -ints check_asm_data.s check_asm.c
	@echo '};' >> check_asm.c
	@echo 'int main(void) {' >> check_asm.c
	@echo 'int i = 0;' >> check_asm.c
	$(SH) ./check_asm.sh -printf task tmp.i check_asm.c
	$(SH) ./check_asm.sh -printf mm tmp.i check_asm.c
	$(SH) ./check_asm.sh -printf thread tmp.i check_asm.c
	@echo 'return 0; }' >> check_asm.c
	@rm -f tmp.[ci] check_asm_data.[cs]
	$(HOSTCC) -o check_asm check_asm.c
	./check_asm >> asm_offsets.h
	@rm -f check_asm check_asm.c
	@echo -e "\n#else /* CONFIG_SMP */\n" >> asm_offsets.h
	@echo -e "#ifndef CONFIG_DEBUG_SPINLOCK\n" >>asm_offsets.h
	@echo "#include <linux/config.h>" > tmp.c
	@echo "#undef CONFIG_SMP" >> tmp.c
	@echo "#define CONFIG_SMP 1" >> tmp.c
	@echo "#include <linux/sched.h>" >> tmp.c
	$(CPP) $(CPPFLAGS) -P tmp.c -o tmp.i
	@echo "/* Automatically generated. Do not edit. */" > check_asm_data.c
	@echo "#include <linux/config.h>" >> check_asm_data.c
	@echo "#undef CONFIG_SMP" >> check_asm_data.c
	@echo "#define CONFIG_SMP 1" >> check_asm_data.c
	@echo "#include <linux/sched.h>" >> check_asm_data.c
	@echo 'unsigned int check_asm_data[] = {' >> check_asm_data.c
	$(SH) ./check_asm.sh -data U��$�P���P�F|P��$�Q��$�U��$�P�FxPh��$�P������ƁĤ��t	S���������[^_]��@Ív��UWVS�L$(�T$,;T$0�`
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	@echo 'extern int printf(const char *fmt, ...);' >>check_asm.c
	@echo 'unsigned int check_asm_data[] = {' >> check_asm.c
	$(SH) ./check_asm.sh -ints check_asm_data.s check_asm.c
	@echo '};' >> check_asm.c
	@echo 'int main(void) {' >> check_asm.c
	@echo 'int i = 0;' >> check_asm.c
	$(SH) ./check_asm.sh -printf task tmp.i check_asm.c
	$(SH) ./check_asm.sh -printf mm tmp.i check_asm.c
	$(SH) ./check_asm.sh -printf thread tmp.i check_asm.c
	@echo 'return 0; }' >> check_asm.c
	@rm -f tmp.[ci] check_asm_data.[cs]
	$(HOSTCC) -o check_asm check_asm.c
	./check_asm >> asm_offsets.h
	@rm -f check_asm check_asm.c
	@echo -e "#endif /* CONFIG_DEBUG_SPINLOCK */\n" >> asm_offsets.h
	@echo -e "#endif /* CONFIG_SMP */\n" >> asm_offsets.h
	@echo "#endif /* __ASM_OFFSETS_H__ */" >> asm_offsets.h
	@if test -r $(HPATH)/asm/asm_offsets.h; then \
	  if cmp -s asm_offsets.h $(HPATH)/asm/asm_offsets.h; then \
	    echo $(HPATH)/asm/asm_offsets.h is unchanged; \
	    rm -f asm_offsets.h; \
	  else \
	    mv -f asm_offsets.h $(HPATH)/asm/asm_offsets.h; \
	  fi; \
	else \
	  mv -f asm_offsets.h $(HPATH)/asm/asm_offsets.h; \
	fi

include $(TOPDIR)/Rules.make
/* $Id: dtlb_prot.S,v 1.22 2001/04/11 23:40:32 davem Exp $
 * dtlb_prot.S: DTLB protection trap strategy.
 *              This is included directly into the trap table.
 *
 * Copyright (C) 1996,1998 David S. Miller (davem@redhat.com)
 * Copyright (C) 1997,1998 Jakub Jelinek   (jj@ultra.linux.cz)
 */

/* Ways we can get here:
 *
 * [TL == 0] 1) User stores to readonly pages.
 * [TL == 0] 2) Nucleus stores to user readonly pages.
 * [TL >  0] 3) Nucleus stores to user readonly stack frame.
 */

/* PROT ** ICACHE line 1: User DTLB protection trap	*/
	stxa		%g0, [%g1] ASI_DMMU		! Clear SFSR FaultValid bit
	membar		#Sync				! Synchronize ASI stores
	rdpr		%pstate, %g5			! Move into alternate globals
	wrpr		%g5, PSTATE_AG|PSTATE_MG, %pstate
	rdpr		%tl, %g1			! Need to do a winfixup?
	cmp		%g1, 1				! Trap level >1?
	mov		TLB_TAG_ACCESS, %g4		! Prepare reload of vaddr
	nop

/* PROT ** ICACHE line 2: More real fault processing */
	bgu,pn		%xcc, winfix_trampoline		! Yes, perform winfixup
	 ldxa		[%g4] ASI_DMMU, %g5		! Put tagaccess in %g5
	ba,pt		%xcc, sparc64_realfault_common	! Nope, normal fault
	 mov		FAULT_CODE_DTLB | FAULT_CODE_WRITE, %g4
	nop
	nop
	nop
	nop

/* PROT ** ICACHE line 3: Unused...	*/
	nop
	nop
	nop
	nop
	nop
	nop
	nop
	nop

/* PROT ** ICACHE line 4: Unused...	*/
	nop
	nop
	nop
	nop
	nop
	nop
	nop
	nop
ldcard /home/me/kernel/linux/include/config/ppc.h) \
   $(wildcard /home/me/kernel/linux/include/config/scsi/logging.h)
sd.h: \
   scsi.h \
   /home/me/kernel/linux/include/linux/genhd.h
	@touch sd.h
seagate.o: seagate.c \
   /home/me/kernel/linux/include/linux/module.h \
   /home/me/kernel/linux/include/asm/io.h \
   /home/me/kernel/linux/include/asm/system.h \
   /home/me/kernel/linux/include/linux/spinlock.h \
   /home/me/kernel/linux/include/linux/signal.h \
   /home/me/kernel/linux/include/linux/sched.h \
   /home/me/kernel/linux/include/linux/string.h \
   /home/me/kernel/linux/include/linux/proc_fs.h \
   /home/me/kernel/linux/include/linux/init.h \
   /home/me/kernel/linux/include/linux/delay.h \
   /home/me/kernel/linux/include/linux/blk.h \
   scsi.h \
   hosts.h \
   seagate.h \
   constants.h \
   /home/me/kernel/linux/include/linux/stat.h \
   /home/me/kernel/linux/include/asm/uaccess.h \
   sd.h \
   /home/me/kernel/linux/include/scsi/scsi_ioctl.h \
   scsi_module.c
sg.o: sg.c \
   $(wildcard /home/me/kernel/linux/include/config/proc/fs.h) \
   /home/me/kernel/linux/include/linux/module.h \
   /home/me/kernel/linux/include/linux/fs.h \
   /home/me/kernel/linux/include/linux/kernel.h \
   /home/me/kernel/linux/include/linux/sched.h \
   /home/me/kernel/linux/include/linux/string.h \
   /home/me/kernel/linux/include/linux/mm.h \
   /home/me/kernel/linux/include/linux/errno.h \
   /home/me/kernel/linux/include/linux/mtio.h \
   /home/me/kernel/linux/include/linux/ioctl.h \
   /home/me/kernel/linux/include/linux/fcntl.h \
   /home/me/kernel/linux/include/linux/init.h \
   /home/me/kernel/linux/include/linux/poll.h \
   /home/me/kernel/linux/include/linux/smp_lock.h \
   /home/me/kernel/linux/include/asm/io.h \
   /home/me/kernel/linux/include/asm/uaccess.h \
   /home/me/kernel/linux/include/asm/system.h \
   /home/me/kernel/linux/include/linux/blk.h \
   scsi.h \
   hosts.h \
   /home/me/kernel/linux/include/scsi/scsi_ioctl.h \
   /home/me/kernel/linux/include/scsi/sg.h \
   /home/me/kernel/linux/include/linux/proc_fs.h \
   /home/me/kernel/linux/include/linux/version.h \
   /home/me/kernel/linux/include/linux/iobuf.h
sgiwd93.o: sgiwd93.c \
   /home/me/kernel/linux/include/linux/init.h \
   /home/me/kernel/linux/include/linux/types.h \
   /home/me/kernel/linux/include/linux/mm.h \
   /home/me/kernel/linux/include/linux/blk.h \
   /home/me/kernel/linux/include/linux/version.h \
   /home/me/kernel/linux/include/linux/delay.h \
   /home/me/kernel/linux/include/linux/spinlock.h \
   /home/me/kernel/linux/include/asm/page.h \
   /home/me/kernel/linux/include/asm/pgtable.h \
   /home/me/kernel/linux/include/asm/irq.h \
   /home/me/kernel/linux/include/asm/io.h \
   scsi.h \
   hosts.h \
   wd33c93.h \
   sgiwd93.h \
   /home/me/kernel/linux/include/linux/stat.h \
   sgiwd93.h \
   scsi_module.c
sim710.o: sim710.c \
   /home/me/kernel/linux/include/linux/module.h \
   /home/me/kernel/linux/include/linux/version.h \
   /home/me/kernel/linux/include/linux/kernel.h \
   /home/me/kernel/linux/include/linux/types.h \
   /home/me/kernel/linux/include/linux/string.h \
   /home/me/kernel/linux/include/linux/ioport.h \
   /home/me/kernel/linux/include/linux/delay.h \
   /home/me/kernel/linux/include/linux/sched.h \
   /home/me/kernel/linux/include/linux/proc_fs.h \
   /home/me/kernel/linux/include/linux/init.h \
   /home/me/kernel/linux/include/linux/mca.h \
   /home/me/kernel/linux/include/asm/dma.h \
   /home/me/kernel/linux/include/asm/system.h \
   /home/me/kernel/linux/include/linux/spinlock.h \
   /home/me/kernel/linux/include/asm/spinlock.h \
   /home/me/kernel/linux/include/asm/io.h \
   /home/me/kernel/linux/include/asm/pgtable.h \
   /home/me/kernel/linux/include/asm/byteorder.h \
   /home/me/kernel/linux/include/linux/blk.h \
   $(wildcard /home/me/kernel/linux/include/config/tp34v/scsi.h) \
   $(wildcard /home/me/kernel/linux/include/config/mca.h) \
   scsi.h \
   hosts.h \
   sim710.h \
   /home/me/kernel/linux/include/linux/stat.h \
   sim710_d.h \
   scsi_module.c
sim710.h: \
   /home/me/kernel/linux/include/linux/types.h \
   /home/me/kernel/linux/include/scsi/scsicam.h
	@touch sim710.h
sr.o: sr.c \
   /home/me/kernel/linux/include/linux/module.h \
   /home/me/kernel/linux/include/linux/fs.h \
   /home/me/kernel/linux/include/linux/kernel.h \
   /home/me/kernel/linux/include/linux/sched.h \
   /home/me/kernel/linux/include/linux/mm.h \
   /home/me/kernel/linux/include/linux/string.h \
   /home/me/kernel/linux/include/linux/errno.h \
   /home/me/kernel/linux/include/linux/cdrom.h \
   /home/me/kernel/linux/include/linux/interrupt.h \
   /home/me/kernel/linux/include/linux/init.h \
   /home/me/kernel/linux/include/asm/system.h \
   /home/me/kernel/linux/include/asm/io.h \
   /home/me/kernel/linux/include/asm/uaccess.h \
   /home/me/kernel/linux/include/linux/blk.h \
   scsi.h \
   hosts.h \
   sr.h \
   /home/me/kernel/linux/include/scsi/scsi_ioctl.h \
   constants.h
sr.h: \
   scsi.h
	@touch sr.h
sr_ioctl.o: sr_ioctl.c \
   /home/me/kernel/linux/include/linux/kernel.h \
   /home/me/kernel/linux/include/linux/sched.h \
   /home/me/kernel/linux/include/linux/mm.h \
   /home/me/kernel/linux/include/linux/fs.h \
   /home/me/kernel/linux/include/asm/uaccess.h \
   /home/me/kernel/linux/include/linux/errno.h \
   /home/me/kernel/linux/include/linux/string.h \
   /home/me/kernel/linux/include/linux/blk.h \
   /home/me/kernel/linux/include/linux/blkpg.h \
   scsi.h \
   hosts.h \
   /home/me/kernel/linux/include/scsi/scsi_ioctl.h \
   /home/me/kernel/linux/include/linux/cdrom.h \
   sr.h
sr_vendor.o: sr_vendor.c \
   /home/me/kernel/linux/include/linux/errno.h \
   /home/me/kernel/linux/include/linux/string.h \
   /home/me/kernel/linux/include/linux/blk.h \
   scsi.h \
   hosts.h \
   /home/me/kernel/linux/include/scsi/scsi_ioctl.h \
   /home/me/kernel/linux/include/linux/cdrom.h \
   sr.h \
   $(wildcard /home/me/kernel/linux/include/config/blk/dev/sr/vendor.h)
st.o: st.c \
   /home/me/kernel/linux/include/linux/module.h \
   /home/me/kernel/linux/include/linux/fs.h \
   /home/me/kernel/linux/include/linux/kernel.h \
   /home/me/kernel/linux/include/linux/sched.h \
   /home/me/kernel/linux/include/linux/mm.h \
   /home/me/kernel/linux/include/linux/init.h \
   /home/me/kernel/linux/include/linux/string.h \
   /home/me/kernel/linux/include/linux/errno.h \
   /home/me/kernel/linux/include/linux/mtio.h \
   /home/me/kernel/linux/include/linux/ioctl.h \
   /home/me/kernel/linux/include/linux/fcntl.h \
   /home/me/kernel/linux/include/linux/spinlock.h \
   /home/me/kernel/linux/include/linux/smp_lock.h \
   /home/me/kernel/linux/include/asm/uaccess.h \
   /home/me/kernel/linux/include/asm/dma.h \
   /home/me/kernel/linux/include/asm/system.h \
   /home/me/kernel/linux/include/linux/blk.h \
   scsi.h \
   hosts.h \
   /home/me/kernel/linux/include/scsi/scsi_ioctl.h \
   st_options.h \
   st.h \
   constants.h \
   osst_detect.h
st.h: \
   scsi.h \
   /home/me/kernel/linux/include/linux/devfs_fs_kernel.h \
   /home/me/kernel/linux/include/linux/completion.h
	@touch st.h
sun3_NCR5380.o: sun3_NCR5380.c \
   /home/me/kernel/linux/include/linux/delay.h \
   /home/me/kernel/linux/include/linux/tqueue.h \
   /home/me/kernel/linux/include/linux/interrupt.h \
   $(wildcard /home/me/kernel/linux/include/config/atari/scsi/toshiba/delay.h)
sun3_scsi.o: sun3_scsi.c \
   /home/me/kernel/linux/include/linux/types.h \
   /home/me/kernel/linux/include/linux/stddef.h \
   /home/me/kernel/linux/include/linux/ctype.h \
   /home/me/kernel/linux/include/linux/delay.h \
   /home/me/kernel/linux/include/linux/module.h \
   /home/me/kernel/linux/include/linux/signal.h \
   /home/me/kernel/linux/include/linux/sched.h \
   /home/me/kernel/linux/include/linux/ioport.h \
   /home/me/kernel/linux/include/linux/init.h \
   /home/me/kernel/linux/include/linux/blk.h \
   /home/me/kernel/linux/include/asm/io.h \
   /home/me/kernel/linux/include/asm/system.h \
   scsi.h \
   hosts.h \
   sun3_scsi.h \
   NCR5380.h \
   constants.h \
   sun3_NCR5380.c \
   scsi_module.c
sun3_scsi.h: \
   /home/me/kernel/linux/include/scsi/scsicam.h
	@touch sun3_scsi.h
sun3x_esp.o: sun3x_esp.c \
   /home/me/kernel/linux/include/linux/kernel.h \
   /home/me/kernel/linux/include/linux/types.h \
   /home/me/kernel/linux/include/linux/string.h \
   /home/me/kernel/linux/include/linux/slab.h \
   /home/me/kernel/linux/include/linux/blk.h \
   /home/me/kernel/linux/include/linux/proc_fs.h \
   /home/me/kernel/linux/include/linux/stat.h \
   /home/me/kernel/linux/include/linux/delay.h \
   scsi.h \
   hosts.h \
   NCR53C9x.h \
   sun3x_esp.h \
   /home/me/kernel/linux/include/asm/irq.h \
   scsi_module.c
sym53c416.o: sym53c416.c \
   /home/me/kernel/linux/include/linux/module.h \
   /home/me/kernel/linux/include/linux/kernel.h \
   /home/me/kernel/linux/include/linux/types.h \
   /home/me/kernel/linux/include/linux/string.h \
   /home/me/kernel/linux/include/linux/ioport.h \
   /home/me/kernel/linux/include/linux/sched.h \
   /home/me/kernel/linux/include/linux/interrupt.h \
   /home/me/kernel/linux/include/linux/delay.h \
   /home/me/kernel/linux/include/linux/proc_fs.h \
   /home/me/kernel/linux/include/linux/spinlock.h \
   /home/me/kernel/linux/include/asm/dma.h \
   /home/me/kernel/linux/include/asm/system.h \
   /home/me/kernel/linux/include/asm/io.h \
   /home/me/kernel/linux/include/linux/blk.h \
   /home/me/kernel/linux/include/linux/version.h \
   /home/me/kernel/linux/include/linux/isapnp.h \
   scsi.h \
   hosts.h \
   sd.h \
   sym53c416.h \
   scsi_module.c
sym53c416.h: \
   /home/me/kernel/linux/include/linux/version.h \
   /home/me/kernel/linux/include/linux/types.h \
   /home/me/kernel/linux/include/linux/kdev_t.h
	@touch sym53c416.h
sym53c8xx.o: sym53c8xx.c \
   /home/me/kernel/linux/include/linux/module.h \
   /home/me/kernel/linux/include/asm/dma.h \
   /home/me/kernel/linux/include/asm/io.h \
   /home/me/kernel/linux/include/asm/system.h \
   /home/me/kernel/linux/include/linux/spinlock.h \
   /home/me/kernel/linux/include/asm/spinlock.h \
   /home/me/kernel/linux/include/linux/delay.h \
   /home/me/kernel/linux/include/linux/signal.h \
   /home/me/kernel/linux/include/linux/sched.h \
   /home/me/kernel/linux/include/linux/errno.h \
   /home/me/kernel/linux/include/linux/pci.h \
   /home/me/kernel/linux/include/linux/string.h \
   /home/me/kernel/linux/include/linux/mm.h \
   /home/me/kernel/linux/include/linux/ioport.h \
   /home/me/kernel/linux/include/linux/time.h \
   /home/me/kernel/linux/include/linux/timer.h \
   /home/me/kernel/linux/include/linux/stat.h \
   /home/me/kernel/linux/include/linux/version.h \
   /home/me/kernel/linux/include/linux/blk.h \
   /home/me/kernel/linux/include/linux/init.h \
   scsi.h \
   hosts.h \
   constants.h \
   sd.h \
   /home/me/kernel/linux/include/linux/types.h \
   sym53c8xx.h \
   /home/me/kernel/linux/include/asm/irq.h \
   scsi_module.c
sym53c8xx.h: \
   sym53c8xx_defs.h \
   /home/me/kernel/linux/include/scsi/scsicam.h
	@touch sym53c8xx.h
sym53c8xx_comm.h: \
   /home/me/kernel/linux/include/asm/irq.h
	@touch sym53c8xx_comm.h
sym53c8xx_defs.h: \
   /home/me/kernel/linux/include/linux/version.h \
   $(wildcard /home/me/kernel/linux/include/config/scsi/ncr53c8xx/pqs/pds.h) \
   $(wildcard /home/me/kernel/linux/include/config/scsi/ncr53c8xx/nvram/detect.h) \
   $(wildcard /home/me/kernel/linux/include/config/scsi/ncr53c8xx/integrity/check.h) \
   $(wildcard /home/me/kernel/linux/include/config/scsi/ncr53c8xx/max/tags.h) \
   $(wildcard /home/me/kernel/linux/include/config/scsi/ncr53c8xx/default/tags.h) \
   $(wildcard /home/me/kernel/linux/include/config/scsi/ncr53c8xx/tagged/queue.h) \
   $(wildcard /home/me/kernel/linux/include/config/scsi/ncr53c8xx/iomapped.h) \
   $(wildcard /home/me/kernel/linux/include/config/scsi/ncr53c8xx/iarb.h) \
   $(wildcard /home/me/kernel/linux/include/config/scsi/ncr53c8xx/sync.h) \
   $(wildcard /home/me/kernel/linux/include/config/scsi/ncr53c8xx/no/disconnect.h) \
   $(wildcard /home/me/kernel/linux/include/config/scsi/ncr53c8xx/force/sync/nego.h) \
   $(wildcard /home/me/kernel/linux/include/config/scsi/ncr53c8xx/disable/mparity/check.h) \
   $(wildcard /home/me/kernel/linux/include/config/scsi/ncr53c8xx/disable/pari/* $Id: etrap.S,v 1.45 2001/09/07 21:04:40 kanoj Exp $
 * etrap.S: Preparing for entry into the kernel on Sparc V9.
 *
 * Copyright (C) 1996, 1997 David S. Miller (davem@caip.rutgers.edu)
 * Copyright (C) 1997, 1998, 1999 Jakub Jelinek (jj@ultra.linux.cz)
 */

#include <asm/asi.h>
#include <asm/pstate.h>
#include <asm/ptrace.h>
#include <asm/page.h>
#include <asm/spitfire.h>
#include <asm/head.h>
#include <asm/processor.h>

#define		TASK_REGOFF		(THREAD_SIZE-TRACEREG_SZ-REGWIN_SZ)
#define		ETRAP_PSTATE1		(PSTATE_RMO | PSTATE_PRIV)
#define		ETRAP_PSTATE2		(PSTATE_RMO | PSTATE_PEF | PSTATE_PRIV | PSTATE_IE)

/*
 * On entry, %g7 is return address - 0x4.
 * %g4 and %g5 will be preserved %l4 and %l5 respectively.
 */

		.text		
		.align	64
		.globl	etrap, etrap_irq, etraptl1

etrap:		rdpr	%pil, %g2						! Single 	Group
etrap_irq:	rdpr	%tstate, %g1						! Single 	Group
		sllx	%g2, 20, %g3						! IEU0		Group
		andcc	%g1, TSTATE_PRIV, %g0					! IEU1
		or	%g1, %g3, %g1						! IEU0		Group
		bne,pn	%xcc, 1f							! CTI
		 sub	%sp, REGWIN_SZ+TRACEREG_SZ-STACK_BIAS, %g2		! IEU1
		wrpr	%g0, 7, %cleanwin					! Single	Group+4bubbles

		sethi	%hi(TASK_REGOFF), %g2					! IEU0		Group		
		sethi	%hi(TSTATE_PEF), %g3					! IEU1
		or	%g2, %lo(TASK_REGOFF), %g2				! IEU0		Group
		and	%g1, %g3, %g3						! IEU1
		brnz,pn	%g3, 1f							! CTI+IEU1	Group
		 add	%g6, %g2, %g2						! IEU0
		wr	%g0, 0, %fprs						! Single	Group+4bubbles
1:		rdpr	%tpc, %g3						! Single	Group

		stx	%g1, [%g2 + REGWIN_SZ + PT_V9_TSTATE]			! Store		Group
		rdpr	%tnpc, %g1						! Single	Group
		stx	%g3, [%g2 + REGWIN_SZ + PT_V9_TPC]			! Store		Group
		rd	%y, %g3							! Single	Group+4bubbles
		stx	%g1, [%g2 + REGWIN_SZ + PT_V9_TNPC]			! Store		Group
		st	%g3, [%g2 + REGWIN_SZ + PT_V9_Y]			! Store		Group
		save	%g2, -STACK_BIAS, %sp	! Ordering here is critical	! Single	Group
		mov	%g6, %l6						! IEU0		Group

		bne,pn	%xcc, 3f						! CTI		
		 mov	PRIMARY_CONTEXT, %l4					! IEU1
		rdpr	%canrestore, %g3					! Single	Group+4bubbles
		rdpr	%wstate, %g2						! Single	Group+4bubbles
		wrpr	%g0, 0, %canrestore					! Single	Group+4bubbles
		sll	%g2, 3, %g2						! IEU0		Group
		mov	1, %l5							! IEU1
		stb	%l5, [%l6 + AOFF_task_thread + AOFF_thread_fpdepth]	! Store

		wrpr	%g3, 0, %otherwin					! Single	Group+4bubbles
		wrpr	%g2, 0, %wstate						! Single	Group+4bubbles
		stxa	%g0, [%l4] ASI_DMMU					! Store		Group
		flush	%l6							! Single	Group+9bubbles
		wr	%g0, ASI_AIUS, %asi					! Single	Group+4bubbles
2:		wrpr	%g0, 0x0, %tl						! Single	Group+4bubbles
		mov	%g4, %l4						! IEU1
		mov	%g5, %l5						! IEU0		Group

		mov	%g7, %l2						! IEU1
		wrpr	%g0, ETRAP_PSTATE1, %pstate				! Single	Group+4bubbles
		stx	%g1, [%sp + STACK_BIAS + REGWIN_SZ + PT_V9_G1]		! Store		Group
		stx	%g2, [%sp + STACK_BIAS + REGWIN_SZ + PT_V9_G2]		! Store		Group
		stx	%g3, [%sp + STACK_BIAS + REGWIN_SZ + PT_V9_G3]		! Store		Group
		stx	%g4, [%sp + STACK_BIAS + REGWIN_SZ + PT_V9_G4]		! Store		Group
		stx	%g5, [%sp + STACK_BIAS + REGWIN_SZ + PT_V9_G5]		! Store		Group
		stx	%g6, [%sp + STACK_BIAS + REGWIN_SZ + PT_V9_G6]		! Store		Group

		stx	%g7, [%sp + STACK_BIAS + REGWIN_SZ + PT_V9_G7]		! Store		Group
		stx	%i0, [%sp + STACK_BIAS + REGWIN_SZ + PT_V9_I0]		! Store		Group
		stx	%i1, [%sp + STACK_BIAS + REGWIN_SZ + PT_V9_I1]		! Store		Group
		stx	%i2, [%sp + STACK_BIAS + REGWIN_SZ + PT_V9_I2]		! Store		Group
		stx	%i3, [%sp + STACK_BIAS + REGWIN_SZ + PT_V9_I3]		! Store		Group
		stx	%i4, [%sp + STACK_BIAS + REGWIN_SZ + PT_V9_I4]		! Store		Group
		sethi	%uhi(PAGE_OFFSET), %g4					! IEU0
		stx	%i5, [%sp + STACK_BIAS + REGWIN_SZ + PT_V9_I5]		! Store		Group

		stx	%i6, [%sp + STACK_BIAS + REGWIN_SZ + PT_V9_I6]		! Store		Group
		sllx	%g4, 32, %g4						! IEU0
		stx	%i7, [%sp + STACK_BIAS + REGWIN_SZ + PT_V9_I7]		! Store		Group
		wrpr	%g0, ETRAP_PSTATE2, %pstate				! Single	Group+4bubbles
		jmpl	%l2 + 0x4, %g0						! CTI		Group
		 mov	%l6, %g6						! IEU0
		nop
		nop

3:		ldub	[%l6 + AOFF_task_thread + AOFF_thread_fpdepth], %l5	! Load		Group
		add	%l6, AOFF_task_thread + AOFF_thread_fpsaved + 1, %l4	! IEU0
		srl	%l5, 1, %l3						! IEU0		Group
		add	%l5, 2, %l5						! IEU1
		stb	%l5, [%l6 + AOFF_task_thread + AOFF_thread_fpdepth]	! Store
		ba,pt	%xcc, 2b						! CTI
		 stb	%g0, [%l4 + %l3]					! Store		Group
		nop

etraptl1:	rdpr	%tstate, %g1						! Single	Group+4bubbles
		sub	%sp, REGWIN_SZ + TRACEREG_SZ - STACK_BIAS, %g2		! IEU1
		ba,pt	%xcc, 1b						! CTI		Group
		 andcc	%g1, TSTATE_PRIV, %g0					! IEU0

		.align	64
		.globl	scetrap
scetrap:	rdpr	%pil, %g2						! Single 	Group
		rdpr	%tstate, %g1						! Single 	Group
		sllx	%g2, 20, %g3						! IEU0		Group
		andcc	%g1, TSTATE_PRIV, %g0					! IEU1
		or	%g1, %g3, %g1						! IEU0		Group
		bne,pn	%xcc, 1f						! CTI
		 sub	%sp, (REGWIN_SZ+TRACEREG_SZ-STACK_BIAS), %g2		! IEU1
		wrpr	%g0, 7, %cleanwin					! Single	Group+4bubbles

		sllx	%g1, 51, %g3						! IEU0		Group
		sethi	%hi(TASK_REGOFF), %g2					! IEU1
		or	%g2, %lo(TASK_REGOFF), %g2				! IEU0		Group
		brlz,pn	%g3, 1f							! CTI+IEU1
		 add	%g6, %g2, %g2						! IEU0		Group
		wr	%g0, 0, %fprs						! Single	Group+4bubbles
1:		rdpr	%tpc, %g3						! Single	Group
		stx	%g1, [%g2 + REGWIN_SZ + PT_V9_TSTATE]			! Store		Group

		rdpr	%tnpc, %g1						! Single	Group
		stx	%g3, [%g2 + REGWIN_SZ + PT_V9_TPC]			! Store		Group
		stx	%g1, [%g2 + REGWIN_SZ + PT_V9_TNPC]			! Store		Group
		save	%g2, -STACK_BIAS, %sp	! Ordering here is critical	! Single	Group
		mov	%g6, %l6						! IEU0		Group
		bne,pn	%xcc, 2f						! CTI		
		 mov	ASI_P, %l7						! IEU1
		rdpr	%canrestore, %g3					! Single	Group+4bubbles

		rdpr	%wstate, %g2						! Single	Group+4bubbles
		wrpr	%g0, 0, %canrestore					! Single	Group+4bubbles
		sll	%g2, 3, %g2						! IEU0		Group
		mov	PRIMARY_CONTEXT, %l4					! IEU1
		wrpr	%g3, 0, %otherwin					! Single	Group+4bubbles
		wrpr	%g2, 0, %wstate						! Single	Group+4bubbles
		stxa	%g0, [%l4] ASI_DMMU					! Store
		flush	%l6							! Single	Group+9bubbles

		mov	ASI_AIUS, %l7						! IEU0		Group
2:		mov	%g4, %l4						! IEU1
		mov	%g5, %l5						! IEU0		Group
		add	%g7, 0x4, %l2						! IEU1
		wrpr	%g0, ETRAP_PSTATE1, %pstate				! Single	Group+4bubbles
		stx	%g1, [%sp + STACK_BIAS + REGWIN_SZ + PT_V9_G1]		! Store		Group
		stx	%g2, [%sp + STACK_BIAS + REGWIN_SZ + PT_V9_G2]		! Store		Group
		sllx	%l7, 24, %l7						! IEU0

		stx	%g3, [%sp + STACK_BIAS + REGWIN_SZ + PT_V9_G3]		! Store		Group
		rdpr	%cwp, %l0						! Single	Group
		stx	%g4, [%sp + STACK_BIAS + REGWIN_SZ + PT_V9_G4]		! Store		Group
		stx	%g5, [%sp + STACK_BIAS + REGWIN_SZ + PT_V9_G5]		! Store		Group
		stx	%g6, [%sp + STACK_BIAS + REGWIN_SZ + PT_V9_G6]		! Store		Group
		stx	%g7, [%sp + STACK_BIAS + REGWIN_SZ + PT_V9_G7]		! Store		Group
		or	%l7, %l0, %l7						! IEU0
		sethi	%hi(TSTATE_RMO | TSTATE_PEF), %l0			! IEU1

		or	%l7, %l0, %l7						! IEU0		Group
		wrpr	%l2, %tnpc						! Single	Group+4bubbles
		wrpr	%l7, (TSTATE_PRIV | TSTATE_IE), %tstate			! Single	Group+4bubbles
		stx	%i0, [%sp + STACK_BIAS + REGWIN_SZ + PT_V9_I0]		! Store		Group
		stx	%i1, [%sp + STACK_BIAS + REGWIN_SZ + PT_V9_I1]		! Store		Group
		stx	%i2, [%sp + STACK_BIAS + REGWIN_SZ + PT_V9_I2]		! Store		Group
		stx	%i3, [%sp + STACK_BIAS + REGWIN_SZ + PT_V9_I3]		! Store		Group
		stx	%i4, [%sp + STACK_BIAS + REGWIN_SZ + PT_V9_I4]		! Store		Group

		sethi	%uhi(PAGE_OFFSET), %g4					! IEU0
		stx	%i5, [%sp + STACK_BIAS + REGWIN_SZ + PT_V9_I5]		! Store		Group
		stx	%i6, [%sp + STACK_BIAS + REGWIN_SZ + PT_V9_I6]		! Store		Group
		sllx	%g4, 32, %g4						! IEU0
		mov	%l6, %g6						! IEU1
		stx	%i7, [%sp + STACK_BIAS + REGWIN_SZ + PT_V9_I7]		! Store		Group
		done
		nop

#undef TASK_REGOFF
#undef ETRAP_PSTATE1
#undef ETRAP_PSTATE2
ELF




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�������|jjjXEnclosure        Unknown          Communications   Medium Changer   Optical Device   Scanner          CD-ROM           WORM             Processor        Printer          Sequential-AccessDirect-Access    <6>scsi_logging_setup : usage scsi_logging_level=n (n should be 0 or non-zero)
No device passed to scsi_allocate_request().
No device passed to scsi_allocate_device().
scsi.cInvalid or not present host.
<4>scsi_build_commandblocks: want=%d, space for=%d blocks
noneAttached devices: %s
scsidumpadd-single-device<6>scsi singledevice %d %d %d %d
remove-single-device<3>scsi: Failure to register low-level scsi driver<3>scsi: register failed.
<6>scsi%d : %s
<3>SCSI device not inactive - rq_status=%d, target=%d, pid=%ld, state=%d, owner=%d.
<3>Device busy???
<3>Attached usage count = %d
%ds<6>scsi : %d host%s left.
scsi_hostadapter<6>SCSI subsystem driver Revision: 1.00
<3>cannot init /proc/scsi
scsi/scsi<3>cannot init /proc/scsi/scsi
<6>scsi: host order: %s
Attempt to delete wrong device
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FILES_FLAGS_UP_TO_DATE += scsi.o
endif
ELF




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endif
ELF




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/* $Id: idprom.c,v 1.3 1999/08/31 06:54:53 davem Exp $
 * idprom.c: Routines to load the idprom into kernel addresses and
 *           interpret the data contained within.
 *
 * Copyright (C) 1995 David S. Miller (davem@caip.rutgers.edu)
 */

#include <linux/kernel.h>
#include <linux/types.h>
#include <linux/init.h>

#include <asm/oplib.h>
#include <asm/idprom.h>

struct idprom *idprom;
static struct idprom idprom_buffer;

/* Calculate the IDPROM checksum (xor of the data bytes). */
static unsigned char __init calc_idprom_cksum(struct idprom *idprom)
{
	unsigned char cksum, i, *ptr = (unsigned char *)idprom;

	for (i = cksum = 0; i <= 0x0E; i++)
		cksum ^= *ptr++;

	return cksum;
}

/* Create a local IDPROM copy and verify integrity. */
void __init idprom_init(void)
{
	prom_get_idprom((char *) &idprom_buffer, sizeof(idprom_buffer));

	idprom = &idprom_buffer;

	if (idprom->id_format != 0x01)  {
		prom_printf("IDPROM: Warning, unknown format type!\n");
	}

	if (idprom->id_cksum != calc_idprom_cksum(idprom)) {
		prom_printf("IDPROM: Warning, checksum failure (nvram=%x, calc=%x)!\n",
			    idprom->id_cksum, calc_idprom_cksum(idprom));
	}

	printk("Ethernet address: %02x:%02x:%02x:%02x:%02x:%02x\n",
	       idprom->id_ethaddr[0], idprom->id_ethaddr[1],
	       idprom->id_ethaddr[2], idprom->id_ethaddr[3],
	       idprom->id_ethaddr[4], idprom->id_ethaddr[5]);
}
ifeq (-D__KERNEL__ -I/home/me/kernel/linux/include -Wall -Wstrict-prototypes -Wno-trigraphs -O2 -fomit-frame-pointer -fno-strict-aliasing -fno-common -pipe -mpreferred-stack-boundary=2 -march=i686,$(strip $(subst $(comma),:,$(CFLAGS) $(EXTRA_CFLAGS) $(CFLAGS_hosts.o))))
FILES_FLAGS_UP_TO_DATE += hosts.o
endif
/*  $Id: process.c,v 1.125.2.1 2001/12/18 19:40:17 davem Exp $
 *  arch/sparc64/kernel/process.c
 *
 *  Copyright (C) 1995, 1996 David S. Miller (davem@caip.rutgers.edu)
 *  Copyright (C) 1996       Eddie C. Dost   (ecd@skynet.be)
 *  Copyright (C) 1997, 1998 Jakub Jelinek   (jj@sunsite.mff.cuni.cz)
 */

/*
 * This file handles the architecture-dependent parts of process handling..
 */

#define __KERNEL_SYSCALLS__
#include <stdarg.h>

#include <linux/errno.h>
#include <linux/sched.h>
#include <linux/kernel.h>
#include <linux/mm.h>
#include <linux/smp.h>
#include <linux/smp_lock.h>
#include <linux/stddef.h>
#include <linux/unistd.h>
#include <linux/ptrace.h>
#include <linux/slab.h>
#include <linux/user.h>
#include <linux/a.out.h>
#include <linux/config.h>
#include <linux/reboot.h>
#include <linux/delay.h>

#include <asm/oplib.h>
#include <asm/uaccess.h>
#include <asm/system.h>
#include <asm/page.h>
#include <asm/pgalloc.h>
#include <asm/pgtable.h>
#include <asm/processor.h>
#include <asm/pstate.h>
#include <asm/elf.h>
#include <asm/fpumacro.h>

/* #define VERBOSE_SHOWREGS */

#ifndef CONFIG_SMP

/*
 * the idle loop on a Sparc... ;)
 */
int cpu_idle(void)
{
	if (current->pid != 0)
		return -EPERM;

	/* endless idle loop with no priority at all */
	current->nice = 20;
	current->counter = -100;
	init_idle();

	for (;;) {
		/* If current->need_resched is zero we should really
		 * setup for a system wakup event and execute a shutdown
		 * instruction.
		 *
		 * But this requires writing back the contents of the
		 * L2 cache etc. so implement this later. -DaveM
		 */
		while (!current->need_resched)
			barrier();

		schedule();
		check_pgt_cache();
	}
	return 0;
}

#else

/*
 * the idle loop on a UltraMultiPenguin...
 */
#define idle_me_harder()	(cpu_data[current->processor].idle_volume += 1)
#define unidle_me()		(cpu_data[current->processor].idle_volume = 0)
int cpu_idle(void)
{
	current->nice = 20;
	current->counter = -100;
	init_idle();

	while(1) {
		if (current->need_resched != 0) {
			unidle_me();
			schedule();
			check_pgt_cache();
		}
		idle_me_harder();

		/* The store ordering is so that IRQ handlers on
		 * other cpus see our increasing idleness for the buddy
		 * redistribution algorithm.  -DaveM
		 */
		membar("#StoreStore | #StoreLoad");
	}
}

#endif

extern char reboot_command [];

#ifdef CONFIG_SUN_CONSOLE
extern void (*prom_palette)(int);
extern int serial_console;
#endif
extern void (*prom_keyboard)(void);

void machine_halt(void)
{
	sti();
	mdelay(8);
	cli();
#ifdef CONFIG_SUN_CONSOLE
	if (!serial_console && prom_palette)
		prom_palette (1);
#endif
	if (prom_keyboard)
		prom_keyboard();
	prom_halt();
	panic("Halt failed!");
}

void machine_restart(char * cmd)
{
	char *p;
	
	sti();
	mdelay(8);
	cli();

	p = strchr (reboot_command, '\n');
	if (p) *p = 0;
#ifdef CONFIG_SUN_CONSOLE
	if (!serial_console && prom_palette)
		prom_palette (1);
#endif
	if (prom_keyboard)
		prom_keyboard();
	if (cmd)
		prom_reboot(cmd);
	if (*reboot_command)
		prom_reboot(reboot_command);
	prom_reboot("");
	panic("Reboot failed!");
}

static void show_regwindow32(struct pt_regs *regs)
{
	struct reg_window32 *rw;
	struct reg_window32 r_w;
	mm_segment_t old_fs;
	
	__asm__ __volatile__ ("flushw");
	rw = (struct reg_window32 *)((long)(unsigned)regs->u_regs[14]);
	old_fs = get_fs();
	set_fs (USER_DS);
	if (copy_from_user (&r_w, rw, sizeof(r_w))) {
		set_fs (old_fs);
		return;
	}
	rw = &r_w;
	set_fs (old_fs);			
	printk("l0: %08x l1: %08x l2: %08x l3: %08x "
	       "l4: %08x l5: %08x l6: %08x l7: %08x\n",
	       rw->locals[0], rw->locals[1], rw->locals[2], rw->locals[3],
	       rw->locals[4], rw->locals[5], rw->locals[6], rw->locals[7]);
	printk("i0: %08x i1: %08x i2: %08x i3: %08x "
	       "i4: %08x i5: %08x i6: %08x i7: %08x\n",
	       rw->ins[0], rw->ins[1], rw->ins[2], rw->ins[3],
	       rw->ins[4], rw->ins[5], rw->ins[6], rw->ins[7]);
}

static void show_regwindow(struct pt_regs *regs)
{
	struct reg_window *rw;
	struct reg_window r_w;
	mm_segment_t old_fs;

	if ((regs->tstate & TSTATE_PRIV) || !(current->thread.flags & SPARC_FLAG_32BIT)) {
		__asm__ __volatile__ ("flushw");
		rw = (struct reg_window *)(regs->u_regs[14] + STACK_BIAS);
		if (!(regs->tstate & TSTATE_PRIV)) {
			old_fs = get_fs();
			set_fs (USER_DS);
			if (copy_from_user (&r_w, rw, sizeof(r_w))) {
				set_fs (old_fs);
				return;
			}
			rw = &r_w;
			set_fs (old_fs);			
		}
	} else {
		show_regwindow32(regs);
		return;
	}
	printk("l0: %016lx l1: %016lx l2: %016lx l3: %016lx\n",
	       rw->locals[0], rw->locals[1], rw->locals[2], rw->locals[3]);
	printk("l4: %016lx l5: %016lx l6: %016lx l7: %016lx\n",
	       rw->locals[4], rw->locals[5], rw->locals[6], rw->locals[7]);
	printk("i0: %016lx i1: %016lx i2: %016lx i3: %016lx\n",
	       rw->ins[0], rw->ins[1], rw->ins[2], rw->ins[3]);
	printk("i4: %016lx i5: %016lx i6: %016lx i7: %016lx\n",
	       rw->ins[4], rw->ins[5], rw->ins[6], rw->ins[7]);
}

void show_stackframe(struct sparc_stackf *sf)
{
	unsigned long size;
	unsigned long *stk;
	int i;

	printk("l0: %016lx l1: %016lx l2: %016lx l3: %016lx\n"
	       "l4: %016lx l5: %016lx l6: %016lx l7: %016lx\n",
	       sf->locals[0], sf->locals[1], sf->locals[2], sf->locals[3],
	       sf->locals[4], sf->locals[5], sf->locals[6], sf->locals[7]);
	printk("i0: %016lx i1: %016lx i2: %016lx i3: %016lx\n"
	       "i4: %016lx i5: %016lx fp: %016lx ret_pc: %016lx\n",
	       sf->ins[0], sf->ins[1], sf->ins[2], sf->ins[3],
	       sf->ins[4], sf->ins[5], (unsigned long)sf->fp, sf->callers_pc);
	printk("sp: %016lx x0: %016lx x1: %016lx x2: %016lx\n"
	       "x3: %016lx x4: %016lx x5: %016lx xx: %016lx\n",
	       (unsigned long)sf->structptr, sf->xargs[0], sf->xargs[1],
	       sf->xargs[2], sf->xargs[3], sf->xargs[4], sf->xargs[5],
	       sf->xxargs[0]);
	size = ((unsigned long)sf->fp) - ((unsigned long)sf);
	size -= STACKFRAME_SZ;
	stk = (unsigned long *)((unsigned long)sf + STACKFRAME_SZ);
	i = 0;
	do {
		printk("s%d: %016lx\n", i++, *stk++);
	} while ((size -= sizeof(unsigned long)));
}

void show_stackframe32(struct sparc_stackf32 *sf)
{
	unsigned long size;
	unsigned *stk;
	int i;

	printk("l0: %08x l1: %08x l2: %08x l3: %08x\n",
	       sf->locals[0], sf->locals[1], sf->locals[2], sf->locals[3]);
	printk("l4: %08x l5: %08x l6: %08x l7: %08x\n",
	       sf->locals[4], sf->locals[5], sf->locals[6], sf->locals[7]);
	printk("i0: %08x i1: %08x i2: %08x i3: %08x\n",
	       sf->ins[0], sf->ins[1], sf->ins[2], sf->ins[3]);
	printk("i4: %08x i5: %08x fp: %08x ret_pc: %08x\n",
	       sf->ins[4], sf->ins[5], sf->fp, sf->callers_pc);
	printk("sp: %08x x0: %08x x1: %08x x2: %08x\n"
	       "x3: %08x x4: %08x x5: %08x xx: %08x\n",
	       sf->structptr, sf->xargs[0], sf->xargs[1],
	       sf->xargs[2], sf->xargs[3], sf->xargs[4], sf->xargs[5],
	       sf->xxargs[0]);
	size = ((unsigned long)sf->fp) - ((unsigned long)sf);
	size -= STACKFRAME32_SZ;
	stk = (unsigned *)((unsigned long)sf + STACKFRAME32_SZ);
	i = 0;
	do {
		printk("s%d: %08x\n", i++, *stk++);
	} while ((size -= sizeof(unsigned)));
}

#ifdef CONFIG_SMP
static spinlock_t regdump_lock = SPIN_LOCK_UNLOCKED;
#endif

void __show_regs(struct pt_regs * regs)
{
#ifdef CONFIG_SMP
	unsigned long flags;

	/* Protect against xcall ipis which might lead to livelock on the lock */
	__asm__ __volatile__("rdpr      %%pstate, %0\n\t"
			     "wrpr      %0, %1, %%pstate"
			     : "=r" (flags)
			     : "i" (PSTATE_IE));
	spin_lock(&regdump_lock);
	printk("CPU[%d]: local_irq_count[%u] irqs_running[%d]\n",
	       smp_processor_id(),
	       local_irq_count(smp_processor_id()),
	       irqs_running());
#endif
	printk("TSTATE: %016lx TPC: %016lx TNPC: %016lx Y: %08x    %s\n", regs->tstate,
	       regs->tpc, regs->tnpc, regs->y, print_tainted());
	printk("g0: %016lx g1: %016lx g2: %016lx g3: %016lx\n",
	       regs->u_regs[0], regs->u_regs[1], regs->u_regs[2],
	       regs->u_regs[3]);
	printk("g4: %016lx g5: %016lx g6: %016lx g7: %016lx\n",
	       regs->u_regs[4], regs->u_regs[5], regs->u_regs[6],
	       regs->u_regs[7]);
	printk("o0: %016lx o1: %016lx o2: %016lx o3: %016lx\n",
	       regs->u_regs[8], regs->u_regs[9], regs->u_regs[10],
	       regs->u_regs[11]);
	printk("o4: %016lx o5: %016lx sp: %016lx ret_pc: %016lx\n",
	       regs->u_regs[12], regs->u_regs[13], regs->u_regs[14],
	       regs->u_regs[15]);
	show_regwindow(regs);
#ifdef CONFIG_SMP
	spin_unlock(&regdump_lock);
	__asm__ __volatile__("wrpr	%0, 0, %%pstate"
			     : : "r" (flags));
#endif
}

#ifdef VERBOSE_SHOWREGS
static void idump_from_user (unsigned int *pc)
{
	int i;
	int code;
	
	if((((unsigned long) pc) & 3))
		return;
	
	pc -= 3;
	for(i = -3; i < 6; i++) {
		get_user(code, pc);
		printk("%c%08x%c",i?' ':'<',code,i?' ':'>');
		pc++;
	}
	printk("\n");
}
#endif

void show_regs(struct pt_regs *regs)
{
#ifdef VERBOSE_SHOWREGS
	extern long etrap, etraptl1;
#endif
	__show_regs(regs);
#ifdef CONFIG_SMP
	{
		extern void smp_report_regs(void);

		smp_report_regs();
	}
#endif

#ifdef VERBOSE_SHOWREGS	
	if (regs->tpc >= &etrap && regs->tpc < &etraptl1 &&
	    regs->u_regs[14] >= (long)current - PAGE_SIZE &&
	    regs->u_regs[14] < (long)current + 6 * PAGE_SIZE) {
		printk ("*********parent**********\n");
		__show_regs((struct pt_regs *)(regs->u_regs[14] + STACK_BIAS + REGWIN_SZ));
		idump_from_user(((struct pt_regs *)(regs->u_regs[14] + STACK_BIAS + REGWIN_SZ))->tpc);
		printk ("*********endpar**********\n");
	}
#endif
}

void show_regs32(struct pt_regs32 *regs)
{
	printk("PSR: %08x PC: %08x NPC: %08x Y: %08x    %s\n", regs->psr,
	       regs->pc, regs->npc, regs->y, print_tainted());
	printk("g0: %08x g1: %08x g2: %08x g3: %08x ",
	       regs->u_regs[0], regs->u_regs[1], regs->u_regs[2],
	       regs->u_regs[3]);
	printk("g4: %08x g5: %08x g6: %08x g7: %08x\n",
	       regs->u_regs[4], regs->u_regs[5], regs->u_regs[6],
	       regs->u_regs[7]);
	printk("o0: %08x o1: %08x o2: %08x o3: %08x ",
	       regs->u_regs[8], regs->u_regs[9], regs->u_regs[10],
	       regs->u_regs[11]);
	printk("o4: %08x o5: %08x sp: %08x ret_pc: %08x\n",
	       regs->u_regs[12], regs->u_regs[13], regs->u_regs[14],
	       regs->u_regs[15]);
}

void show_thread(struct thread_struct *thread)
{
	int i;

#if 0
	printk("kregs:             0x%016lx\n", (unsigned long)thread->kregs);
	show_regs(thread->kregs);
#endif	
	printk("ksp:               0x%016lx\n", thread->ksp);

	if (thread->w_saved) {
		for (i = 0; i < NSWINS; i++) {
			if (!thread->rwbuf_stkptrs[i])
				continue;
			printk("reg_window[%d]:\n", i);
			printk("stack ptr:         0x%016lx\n", thread->rwbuf_stkptrs[i]);
		}
		printk("w_saved:           0x%04x\n", thread->w_saved);
	}

	printk("flags:             0x%08x\n", thread->flags);
	printk("current_ds:        0x%x\n", thread->current_ds.seg);
}

/* Free current thread data structures etc.. */
void exit_thread(void)
{
	struct thread_struct *t = &current->thread;

	if (t->utraps) {
		if (t->utraps[0] < 2)
			kfree (t->utraps);
		else
			t->utraps[0]--;
	}

	/* Turn off performance counters if on. */
	if (t->flags & SPARC_FLAG_PERFCTR) {
		t->user_cntd0 = t->user_cntd1 = NULL;
		t->pcr_reg = 0;
		t->flags &= ~(SPARC_FLAG_PERFCTR);
		write_pcr(0);
	}
}

void flush_thread(void)
{
	struct thread_struct *t = &current->thread;

	if (current->mm) {
		if (t->flags & SPARC_FLAG_32BIT) {
			struct mm_struct *mm = current->mm;
			pgd_t *pgd0 = &mm->pgd[0];
			unsigned long pgd_cache;

			if (pgd_none(*pgd0)) {
				pmd_t *page = pmd_alloc_one_fast(NULL, 0);
				if (!page)
					page = pmd_alloc_one(NULL, 0);
				pgd_set(pgd0, page);
			}
			pgd_cache = pgd_val(*pgd0) << 11UL;
			__asm__ __volatile__("stxa %0, [%1] %2\n\t"
					     "membar #Sync"
					     : /* no outputs */
					     : "r" (pgd_cache),
					       "r" (TSB_REG),
					       "i" (ASI_DMMU));
		}
	}
	t->w_saved = 0;

	/* Turn off performance counters if on. */
	if (t->flags & SPARC_FLAG_PERFCTR) {
		t->user_cntd0 = t->user_cntd1 = NULL;
		t->pcr_reg = 0;
		t->flags &= ~(SPARC_FLAG_PERFCTR);
		write_pcr(0);
	}

	/* Clear FPU register state. */
	t->fpsaved[0] = 0;
	
	if (t->current_ds.seg != ASI_AIUS)
		set_fs(USER_DS);

	/* Init new signal delivery disposition. */
	t->flags &= ~SPARC_FLAG_NEWSIGNALS;
}

/* It's a bit more tricky when 64-bit tasks are involved... */
static unsigned long clone_stackframe(unsigned long csp, unsigned long psp)
{
	unsigned long fp, distance, rval;

	if (!(current->thread.flags & SPARC_FLAG_32BIT)) {
		csp += STACK_BIAS;
		psp += STACK_BIAS;
		__get_user(fp, &(((struct reg_window *)psp)->ins[6]));
		fp += STACK_BIAS;
	} else
		__get_user(fp, &(((struct reg_window32 *)psp)->ins[6]));

	/* Now 8-byte align the stack as this is mandatory in the
	 * Sparc ABI due to how register windows work.  This hides
	 * the restriction from thread libraries etc.  -DaveM
	 */
	csp &= ~7UL;

	distance = fp - psp;
	rval = (csp - distance);
	if (copy_in_user(rval, psp, distance))
		rval = 0;
	else if (current->thread.flags & SPARC_FLAG_32BIT) {
		if (put_user(((u32)csp), &(((struct reg_window32 *)rval)->ins[6])))
			rval = 0;
	} else {
		if (put_user(((u64)csp - STACK_BIAS),
			     &(((struct reg_window *)rval)->ins[6])))
			rval = 0;
		else
			rval = rval - STACK_BIAS;
	}

	return rval;
}

/* Standard stuff. */
static inline void shift_window_buffer(int first_win, int last_win,
				       struct thread_struct *t)
{
	int i;

	for (i = first_win; i < last_win; i++) {
		t->rwbuf_stkptrs[i] = t->rwbuf_stkptrs[i+1];
		memcpy(&t->reg_window[i], &t->reg_window[i+1],
		       sizeof(struct reg_window));
	}
}

void synchronize_user_stack(void)
{
	struct thread_struct *t = &current->thread;
	unsigned long window;

	flush_user_windows();
	if ((window = t->w_saved) != 0) {
		int winsize = REGWIN_SZ;
		int bias = 0;

		if (t->flags & SPARC_FLAG_32BIT)
			winsize = REGWIN32_SZ;
		else
			bias = STACK_BIAS;

		window -= 1;
		do {
			unsigned long sp = (t->rwbuf_stkptrs[window] + bias);
			struct reg_window *rwin = &t->reg_window[window];

			if (!copy_to_user((char *)sp, rwin, winsize)) {
				shift_window_buffer(window, t->w_saved - 1, t);
				t->w_saved--;
			}
		} while (window--);
	}
}

void fault_in_user_windows(void)
{
	struct thread_struct *t = &current->thread;
	unsigned long window;
	int winsize = REGWIN_SZ;
	int bias = 0;

	if (t->flags & SPARC_FLAG_32BIT)
		winsize = REGWIN32_SZ;
	else
		bias = STACK_BIAS;

	flush_user_windows();
	window = t->w_saved;

	if (window != 0) {
		window -= 1;
		do {
			unsigned long sp = (t->rwbuf_stkptrs[window] + bias);
			struct reg_window *rwin = &t->reg_window[window];

			if (copy_to_user((char *)sp, rwin, winsize))
				goto barf;
		} while (window--);
	}
	t->w_saved = 0;
	return;

barf:
	t->w_saved = window + 1;
	do_exit(SIGILL);
}

/* Copy a Sparc thread.  The fork() return value conventions
 * under SunOS are nothing short of bletcherous:
 * Parent -->  %o0 == childs  pid, %o1 == 0
 * Child  -->  %o0 == parents pid, %o1 == 1
 *
 * NOTE: We have a separate fork kpsr/kwim because
 *       the parent could change these values between
 *       sys_fork invocation and when we reach here
 *       if the parent should sleep while trying to
 *       allocate the task_struct and kernel stack in
 *       do_fork().
 */
int copy_thread(int nr, unsigned long clone_flags, unsigned long sp,
		unsigned long unused,
		struct task_struct *p, struct pt_regs *regs)
{
	struct thread_struct *t = &p->thread;
	char *child_trap_frame;

#ifdef CONFIG_DEBUG_SPINLOCK
	t->smp_lock_count = 0;
	t->smp_lock_pc = 0;
#endif

	/* Calculate offset to stack_frame & pt_regs */
	child_trap_frame = ((char *)p) + (THREAD_SIZE - (TRACEREG_SZ+REGWIN_SZ));
	memcpy(child_trap_frame, (((struct reg_window *)regs)-1), (TRACEREG_SZ+REGWIN_SZ));
	t->ksp = ((unsigned long) child_trap_frame) - STACK_BIAS;
	t->flags |= SPARC_FLAG_NEWCHILD;
	t->kregs = (struct pt_regs *)(child_trap_frame+sizeof(struct reg_window));
	t->cwp = (regs->tstate + 1) & TSTATE_CWP;
	t->fpsaved[0] = 0;

	if (regs->tstate & TSTATE_PRIV) {
		/* Special case, if we are spawning a kernel thread from
		 * a userspace task (via KMOD, NFS, or similar) we must
		 * disable performance counters in the child because the
		 * address space and protection realm are changing.
		 */
		if (t->flags & SPARC_FLAG_PERFCTR) {
			t->user_cntd0 = t->user_cntd1 = NULL;
			t->pcr_reg = 0;
			t->flags &= ~(SPARC_FLAG_PERFCTR);
		}
		t->kregs->u_regs[UREG_FP] = p->thread.ksp;
		t->current_ds = KERNEL_DS;
		flush_register_windows();
		memcpy((void *)(t->ksp + STACK_BIAS),
		       (void *)(regs->u_regs[UREG_FP] + STACK_BIAS),
		       sizeof(struct reg_window));
		t->kregs->u_regs[UREG_G6] = (unsigned long) p;
	} else {
		if (t->flags & SPARC_FLAG_32BIT) {
			sp &= 0x00000000ffffffffUL;
			regs->u_regs[UREG_FP] &= 0x00000000ffffffffUL;
		}
		t->kregs->u_regs[UREG_FP] = sp;
		t->current_ds = USER_DS;
		if (sp != regs->u_regs[UREG_FP]) {
			unsigned long csp;

			csp = clone_stackframe(sp, regs->u_regs[UREG_FP]);
			if (!csp)
				return -EFAULT;
			t->kregs->u_regs[UREG_FP] = csp;
		}
		if (t->utraps)
			t->utraps[0]++;
	}

	/* Set the return value for the child. */
	t->kregs->u_regs[UREG_I0] = current->pid;
	t->kregs->u_regs[UREG_I1] = 1;

	/* Set the second return value for the parent. */
	regs->u_regs[UREG_I1] = 0;

	return 0;
}

/*
 * This is the mechanism for creating a new kernel thread.
 *
 * NOTE! Only a kernel-only process(ie the swapper or direct descendants
 * who haven't done an "execve()") should use this: it will work within
 * a system call from a "real" process, but the process memory space will
 * not be free'd until both the parent and the child have exited.
 */
pid_t kernel_thread(int (*fn)(void *), void * arg, unsigned long flags)
{
	long retval;

	/* If the parent runs before fn(arg) is called by the child,
	 * the input registers of this function can be clobbered.
	 * So we stash 'fn' and 'arg' into global registers which
	 * will not be modified by the parent.
	 */
	__asm__ __volatile("mov %4, %%g2\n\t"	   /* Save FN into global */
			   "mov %5, %%g3\n\t"	   /* Save ARG into global */
			   "mov %1, %%g1\n\t"	   /* Clone syscall nr. */
			   "mov %2, %%o0\n\t"	   /* Clone flags. */
			   "mov 0, %%o1\n\t"	   /* usp arg == 0 */
			   "t 0x6d\n\t"		   /* Linux/Sparc clone(). */
			   "brz,a,pn %%o1, 1f\n\t" /* Parent, just return. */
			   " mov %%o0, %0\n\t"
			   "jmpl %%g2, %%o7\n\t"   /* Call the function. */
			   " mov %%g3, %%o0\n\t"   /* Set arg in delay. */
			   "mov %3, %%g1\n\t"
			   "t 0x6d\n\t"		   /* Linux/Sparc exit(). */
			   /* Notreached by child. */
			   "1:" :
			   "=r" (retval) :
			   "i" (__NR_clone), "r" (flags | CLONE_VM),
			   "i" (__NR_exit),  "r" (fn), "r" (arg) :
			   "g1", "g2", "g3", "o0", "o1", "memory", "cc");
	return retval;
}

/*
 * fill in the user structure for a core dump..
 */
void dump_thread(struct pt_regs * regs, struct user * dump)
{
#if 1
	/* Only should be used for SunOS and ancient a.out
	 * SparcLinux binaries...  Fixme some day when bored.
	 * But for now at least plug the security hole :-)
	 */
	memset(dump, 0, sizeof(struct user));
#else
	unsigned long first_stack_page;
	dump->magic = SUNOS_CORE_MAGIC;
	dump->len = sizeof(struct user);
	dump->regs.psr = regs->psr;
	dump->regs.pc = regs->pc;
	dump->regs.npc = regs->npc;
	dump->regs.y = regs->y;
	/* fuck me plenty */
	memcpy(&dump->regs.regs[0], &regs->u_regs[1], (sizeof(unsigned long) * 15));
	dump->u_tsize = (((unsigned long) current->mm->end_code) -
		((unsigned long) current->mm->start_code)) & ~(PAGE_SIZE - 1);
	dump->u_dsize = ((unsigned long) (current->mm->brk + (PAGE_SIZE-1)));
	dump->u_dsize -= dump->u_tsize;
	dump->u_dsize &= ~(PAGE_SIZE - 1);
	first_stack_page = (regs->u_regs[UREG_FP] & ~(PAGE_SIZE - 1));
	dump->u_ssize = (TASK_SIZE - first_stack_page) & ~(PAGE_SIZE - 1);
	memcpy(&dump->fpu.fpstatus.fregs.regs[0], &current->thread.float_regs[0], (sizeof(unsigned long) * 32));
	dump->fpu.fpstatus.fsr = current->thread.fsr;
	dump->fpu.fpstatus.flags = dump->fpu.fpstatus.extra = 0;
#endif	
}

typedef struct {
	union {
		unsigned int	pr_regs[32];
		unsigned long	pr_dregs[16];
	} pr_fr;
	unsigned int __unused;
	unsigned int	pr_fsr;
	unsigned char	pr_qcnt;
	unsigned char	pr_q_entrysize;
	unsigned char	pr_en;
	unsigned int	pr_q[64];
} elf_fpregset_t32;

/*
 * fill in the fpu structure for a core dump.
 */
int dump_fpu (struct pt_regs * regs, elf_fpregset_t * fpregs)
{
	unsigned long *kfpregs = (unsigned long *)(((char *)current) + AOFF_task_fpregs);
	unsigned long fprs = current->thread.fpsaved[0];

	if ((current->thread.flags & SPARC_FLAG_32BIT) != 0) {
		elf_fpregset_t32 *fpregs32 = (elf_fpregset_t32 *)fpregs;

		if (fprs & FPRS_DL)
			memcpy(&fpregs32->pr_fr.pr_regs[0], kfpregs,
			       sizeof(unsigned int) * 32);
		else
			memset(&fpregs32->pr_fr.pr_regs[0], 0,
			       sizeof(unsigned int) * 32);
		fpregs32->pr_qcnt = 0;
		fpregs32->pr_q_entrysize = 8;
		memset(&fpregs32->pr_q[0], 0,
		       (sizeof(unsigned int) * 64));
		if (fprs & FPRS_FEF) {
			fpregs32->pr_fsr = (unsigned int) current->thread.xfsr[0];
			fpregs32->pr_en = 1;
		} else {
			fpregs32->pr_fsr = 0;
			fpregs32->pr_en = 0;
		}
	} else {
		if(fprs & FPRS_DL)
			memcpy(&fpregs->pr_regs[0], kfpregs,
			       sizeof(unsigned int) * 32);
		else
			memset(&fpregs->pr_regs[0], 0,
			       sizeof(unsigned int) * 32);
		if(fprs & FPRS_DU)
			memcpy(&fpregs->pr_regs[16], kfpregs+16,
			       sizeof(unsigned int) * 32);
		else
			memset(&fpregs->pr_regs[16], 0,
			       sizeof(unsigned int) * 32);
		if(fprs & FPRS_FEF) {
			fpregs->pr_fsr = current->thread.xfsr[0];
			fpregs->pr_gsr = current->thread.gsr[0];
		} else {
			fpregs->pr_fsr = fpregs->pr_gsr = 0;
		}
		fpregs->pr_fprs = fprs;
	}
	return 1;
}

/*
 * sparc_execve() executes a new program after the asm stub has set
 * things up for us.  This should basically do what I want it to.
 */
asmlinkage int sparc_execve(struct pt_regs *regs)
{
	int error, base = 0;
	char *filename;

	/* User register window flush is done by entry.S */

	/* Check for indirect call. */
	if (regs->u_regs[UREG_G1] == 0)
		base = 1;

	filename = getname((char *)regs->u_regs[base + UREG_I0]);
	error = PTR_ERR(filename);
	if (IS_ERR(filename))
		goto out;
	error = do_execve(filename, (char **) regs->u_regs[base + UREG_I1],
			  (char **) regs->u_regs[base + UREG_I2], regs);
	putname(filename);
	if (!error) {
		fprs_write(0);
		current->thread.xfsr[0] = 0;
		current->thread.fpsaved[0] = 0;
		regs->tstate &= ~TSTATE_PEF;
	}
out:
	return error;
}
#!/bin/sh
case $1 in
  -printf)
    sed -n -e '/^#/d;/struct[ 	]*'$2'_struct[ 	]*{/,/};/p' < $3 | sed '/struct[ 	]*'$2'_struct[ 	]*{/d;/:[0-9]*[ 	]*;/d;/^[ 	]*$/d;/};/d;s/^[ 	]*//;s/volatile[ 	]*//;s/\(unsigned\|signed\|struct\)[ 	]*//;s/\(\[\|__attribute__\).*;[ 	]*$//;s/(\*//;s/)(.*)//;s/;[ 	]*$//;s/^[^ 	]*[ 	]*//;s/,/\
/g' | sed 's/^[ 	*]*//;s/[ 	]*$//;s/^.*$/printf ("#define AOFF_'$2'_\0	0x%08x\\n", check_asm_data[i++]); printf("#define ASIZ_'$2'_\0	0x%08x\\n", check_asm_data[i++]);/' >> $4
    echo "printf (\"#define ASIZ_$2\\t0x%08x\\n\", check_asm_data[i++]);" >> $4
  ;;
  -data)
    sed -n -e '/^#/d;/struct[ 	]*'$2'_struct[ 	]*{/,/};/p' < $3 | sed '/struct[ 	]*'$2'_struct[ 	]*{/d;/:[0-9]*[ 	]*;/d;/^[ 	]*$/d;/};/d;s/^[ 	]*//;s/volatile[ 	]*//;s/\(unsigned\|signed\|struct\)[ 	]*//;s/\(\[\|__attribute__\).*;[ 	]*$//;s/(\*//;s/)(.*)//;s/;[ 	]*$//;s/^[^ 	]*[ 	]*//;s/,/\
/g' | sed 's/^[ 	*]*//;s/[ 	]*$//;s/^.*$/	((char *)\&((struct '$2'_struct *)0)->\0) - ((char *)((struct '$2'_struct *)0)),	sizeof(((struct '$2'_struct *)0)->\0),/' >> $4
    echo "	sizeof(struct $2_struct)," >> $4
  ;;
  -ints)
    sed -n -e '/check_asm_data:/,/\.size/p' <$2 | sed -e 's/check_asm_data://' -e 's/\.size.*//' -e 's/\.long[		]\([0-9]*\)/\1,/' | grep -v '\.ident' >>$3
  ;;
  *)
    exit 1
  ;;
esac
exit 0
/* auxio.c: Probing for the Sparc AUXIO register at boot time.
 *
 * Copyright (C) 1996 David S. Miller (davem@caip.rutgers.edu)
 */

#include <linux/config.h>
#include <linux/stddef.h>
#include <linux/kernel.h>
#include <linux/sched.h>
#include <linux/smp.h>
#include <linux/init.h>
#include <linux/delay.h>
#include <linux/ioport.h>

#include <asm/oplib.h>
#include <asm/io.h>
#include <asm/auxio.h>
#include <asm/sbus.h>
#include <asm/ebus.h>
#include <asm/fhc.h>
#include <asm/spitfire.h>
#include <asm/starfire.h>

/* Probe and map in the Auxiliary I/O register */
unsigned long auxio_register = 0;

void __init auxio_probe(void)
{
        struct sbus_bus *sbus;
        struct sbus_dev *sdev = 0;

        for_each_sbus(sbus) {
                for_each_sbusdev(sdev, sbus) {
                        if(!strcmp(sdev->prom_name, "auxio"))
				goto found_sdev;
                }
        }

found_sdev:
	if (!sdev) {
#ifdef CONFIG_PCI
		struct linux_ebus *ebus;
		struct linux_ebus_device *edev = 0;
		unsigned long led_auxio;

		for_each_ebus(ebus) {
			for_each_ebusdev(edev, ebus) {
				if (!strcmp(edev->prom_name, "auxio"))
					goto ebus_done;
			}
		}
	ebus_done:

		if (edev) {
			led_auxio = edev->resource[0].start;
			outl(0x01, led_auxio);
			return;
		}
#endif
		auxio_register = 0UL;
		return;
	}

	/* Map the register both read and write */
	auxio_register = sbus_ioremap(&sdev->resource[0], 0,
				      sdev->reg_addrs[0].reg_size, "auxiliaryIO");
	TURN_ON_LED;
}
/* $Id: entry.S,v 1.141 2001/12/05 23:56:32 davem Exp $
 * arch/sparc64/kernel/entry.S:  Sparc64 trap low-level entry points.
 *
 * Copyright (C) 1995,1997 David S. Miller (davem@caip.rutgers.edu)
 * Copyright (C) 1996 Eddie C. Dost        (ecd@skynet.be)
 * Copyright (C) 1996 Miguel de Icaza      (miguel@nuclecu.unam.mx)
 * Copyright (C) 1996,98,99 Jakub Jelinek  (jj@sunsite.mff.cuni.cz)
 */

#include <linux/config.h>
#include <linux/errno.h>

#include <asm/head.h>
#include <asm/asi.h>
#include <asm/smp.h>
#include <asm/ptrace.h>
#include <asm/page.h>
#include <asm/signal.h>
#include <asm/pgtable.h>
#include <asm/processor.h>
#include <asm/visasm.h>
#include <asm/estate.h>

/* #define SYSCALL_TRACING	1 */

#define curptr      g6

#define NR_SYSCALLS 256      /* Each OS is different... */

	.text
	.align		32

	.globl		sparc64_vpte_patchme1
	.globl		sparc64_vpte_patchme2
/*
 * On a second level vpte miss, check whether the original fault is to the OBP 
 * range (note that this is only possible for instruction miss, data misses to
 * obp range do not use vpte). If so, go back directly to the faulting address.
 * This is because we want to read the tpc, otherwise we have no way of knowing
 * the 8k aligned faulting address if we are using >8k kernel pagesize. This also
 * ensures no vpte range addresses are dropped into tlb while obp is executing
 * (see inherit_locked_prom_mappings() rant).
 */
sparc64_vpte_nucleus:
	mov		0xf, %g5
	sllx		%g5, 28, %g5			! Load 0xf0000000
	cmp		%g4, %g5			! Is addr >= LOW_OBP_ADDRESS?
	blu,pn		%xcc, sparc64_vpte_patchme1
	 mov		0x1, %g5
	sllx		%g5, 32, %g5			! Load 0x100000000
	cmp		%g4, %g5			! Is addr < HI_OBP_ADDRESS?
	blu,pn		%xcc, obp_iaddr_patch
	 nop
sparc64_vpte_patchme1:
	sethi		%hi(0), %g5			! This has to be patched
sparc64_vpte_patchme2:
	or		%g5, %lo(0), %g5		! This is patched too
	ba,pt		%xcc, sparc64_kpte_continue	! Part of dtlb_backend
	 add		%g1, %g1, %g1			! Finish PMD offset adjustment

vpte_noent:
	mov		TLB_SFSR, %g1			! Restore %g1 value
	stxa		%g4, [%g1 + %g1] ASI_DMMU	! Restore previous TAG_ACCESS
	done						! Slick trick

	.globl		obp_iaddr_patch
	.globl		obp_daddr_patch

obp_iaddr_patch:
	sethi		%hi(0), %g5			! This and following is patched
	or		%g5, %lo(0), %g5		! g5 now holds obp pmd base physaddr
	wrpr		%g0, 1, %tl			! Behave as if we are at TL0
	rdpr		%tpc, %g4			! Find original faulting iaddr
	srlx		%g4, 13, %g4			! Throw out context bits
	sllx		%g4, 13, %g4			! g4 has vpn + ctx0 now
	mov		TLB_SFSR, %g1			! Restore %g1 value
	stxa		%g4, [%g1 + %g1] ASI_IMMU	! Restore previous TAG_ACCESS
	srlx		%g4, 23, %g6			! Find pmd number
	and		%g6, 0x7ff, %g6			! Find pmd number
	sllx		%g6, 2, %g6			! Find pmd offset
	lduwa		[%g5 + %g6] ASI_PHYS_USE_EC, %g5! Load pmd, ie pagetable physaddr
	brz,pn		%g5, longpath			! Kill the PROM ? :-)
	 sllx		%g5, 11, %g5			! Shift into place
	srlx		%g4, 13, %g6			! find pte number in pagetable
	and		%g6, 0x3ff, %g6			! find pte number in pagetable
	sllx		%g6, 3, %g6			! find pte offset in pagetable
	ldxa		[%g5 + %g6] ASI_PHYS_USE_EC, %g5! Load pte
	brgez,pn	%g5, longpath			! Kill the PROM ? :-)
	 nop
	stxa		%g5, [%g0] ASI_ITLB_DATA_IN	! put into tlb
	retry						! go back to original fault

obp_daddr_patch:
	sethi		%hi(0), %g5			! This and following is patched
	or		%g5, %lo(0), %g5		! g5 now holds obp pmd base physaddr
	srlx		%g4, 23, %g6			! Find pmd number
	and		%g6, 0x7ff, %g6			! Find pmd number
	sllx		%g6, 2, %g6			! Find pmd offset
	lduwa		[%g5 + %g6] ASI_PHYS_USE_EC, %g5! Load pmd, ie pagetable physaddr
	brz,pn		%g5, longpath
	 sllx		%g5, 11, %g5			! Shift into place
	srlx		%g4, 13, %g6			! find pte number in pagetable
	and		%g6, 0x3ff, %g6			! find pte number in pagetable
	sllx		%g6, 3, %g6			! find pte offset in pagetable
	ldxa		[%g5 + %g6] ASI_PHYS_USE_EC, %g5! Load pte
	brgez,pn	%g5, longpath
	 nop
	stxa		%g5, [%g0] ASI_DTLB_DATA_IN	! put into tlb
	retry

/*
 * On a first level data miss, check whether this is to the OBP range (note that
 * such accesses can be made by prom, as well as by kernel using prom_getproperty
 * on "address"), and if so, do not use vpte access ... rather, use information
 * saved during inherit_prom_mappings() using 8k pagesize.
 */
kvmap:
	mov		0xf, %g5
	sllx		%g5, 28, %g5			! Load 0xf0000000
	cmp		%g4, %g5			! Is addr >= LOW_OBP_ADDRESS?
	blu,pn		%xcc, vmalloc_addr
	 mov		0x1, %g5
	sllx		%g5, 32, %g5			! Load 0x100000000
	cmp		%g4, %g5			! Is addr < HI_OBP_ADDRESS?
	blu,pn		%xcc, obp_daddr_patch
	 nop
vmalloc_addr:						! vmalloc addr accessed
	ldxa		[%g3 + %g6] ASI_N, %g5		! Yep, load k-vpte
	brgez,pn	%g5, longpath			! Valid, load into TLB
	 nop
	stxa		%g5, [%g0] ASI_DTLB_DATA_IN	! Reload TLB
	retry

	/* This is trivial with the new code... */
	.globl		do_fpdis
do_fpdis:
	sethi		%hi(TSTATE_PEF), %g4					! IEU0
	rdpr		%tstate, %g5
	andcc		%g5, %g4, %g0
	be,pt		%xcc, 1f
	 nop
	rd		%fprs, %g5
	andcc		%g5, FPRS_FEF, %g0
	be,pt		%xcc, 1f
	 nop

	/* Legal state when DCR_IFPOE is set in Cheetah %dcr. */
	sethi		%hi(109f), %g7
	ba,pt		%xcc, etrap
109:	 or		%g7, %lo(109b), %g7
	add		%g0, %g0, %g0
	ba,a,pt		%xcc, rtrap_clr_l6

1:	ldub		[%g6 + AOFF_task_thread + AOFF_thread_fpsaved], %g5	! Load	Group
	wr		%g0, FPRS_FEF, %fprs					! LSU	Group+4bubbles
	andcc		%g5, FPRS_FEF, %g0					! IEU1	Group
	be,a,pt		%icc, 1f						! CTI
	 clr		%g7							! IEU0
	ldx		[%g6 + AOFF_task_thread + AOFF_thread_gsr], %g7		! Load	Group
1:	andcc		%g5, FPRS_DL, %g0					! IEU1
	bne,pn		%icc, 2f						! CTI
	 fzero		%f0							! FPA
	andcc		%g5, FPRS_DU, %g0					! IEU1  Group
	bne,pn		%icc, 1f						! CTI
	 fzero		%f2							! FPA
	faddd		%f0, %f2, %f4
	fmuld		%f0, %f2, %f6
	faddd		%f0, %f2, %f8
	fmuld		%f0, %f2, %f10
	faddd		%f0, %f2, %f12
	fmuld		%f0, %f2, %f14
	faddd		%f0, %f2, %f16
	fmuld		%f0, %f2, %f18
	faddd		%f0, %f2, %f20
	fmuld		%f0, %f2, %f22
	faddd		%f0, %f2, %f24
	fmuld		%f0, %f2, %f26
	faddd		%f0, %f2, %f28
	fmuld		%f0, %f2, %f30
	faddd		%f0, %f2, %f32
	fmuld		%f0, %f2, %f34
	faddd		%f0, %f2, %f36
	fmuld		%f0, %f2, %f38
	faddd		%f0, %f2, %f40
	fmuld		%f0, %f2, %f42
	faddd		%f0, %f2, %f44
	fmuld		%f0, %f2, %f46
	faddd		%f0, %f2, %f48
	fmuld		%f0, %f2, %f50
	faddd		%f0, %f2, %f52
	fmuld		%f0, %f2, %f54
	faddd		%f0, %f2, %f56
	fmuld		%f0, %f2, %f58
	b,pt		%xcc, fpdis_exit2
	 faddd		%f0, %f2, %f60
1:	mov		SECONDARY_CONTEXT, %g3
	add		%g6, AOFF_task_fpregs + 0x80, %g1
	faddd		%f0, %f2, %f4
	fmuld		%f0, %f2, %f6
	ldxa		[%g3] ASI_DMMU, %g5
	add		%g6, AOFF_task_fpregs + 0xc0, %g2
	stxa		%g0, [%g3] ASI_DMMU
	membar		#Sync
	faddd		%f0, %f2, %f8
	fmuld		%f0, %f2, %f10
	ldda		[%g1] ASI_BLK_S, %f32	! grrr, where is ASI_BLK_NUCLEUS 8-(
	ldda		[%g2] ASI_BLK_S, %f48
	faddd		%f0, %f2, %f12
	fmuld		%f0, %f2, %f14
	faddd		%f0, %f2, %f16
	fmuld		%f0, %f2, %f18
	faddd		%f0, %f2, %f20
	fmuld		%f0, %f2, %f22
	faddd		%f0, %f2, %f24
	fmuld		%f0, %f2, %f26
	faddd		%f0, %f2, %f28
	fmuld		%f0, %f2, %f30
	b,pt		%xcc, fpdis_exit
	 membar		#Sync
2:	andcc		%g5, FPRS_DU, %g0
	bne,pt		%icc, 3f
	 fzero		%f32
	mov		SECONDARY_CONTEXT, %g3
	fzero		%f34
	ldxa		[%g3] ASI_DMMU, %g5
	add		%g6, AOFF_task_fpregs, %g1
	stxa		%g0, [%g3] ASI_DMMU
	membar		#Sync
	add		%g6, AOFF_task_fpregs + 0x40, %g2
	faddd		%f32, %f34, %f36
	fmuld		%f32, %f34, %f38
	ldda		[%g1] ASI_BLK_S, %f0	! grrr, where is ASI_BLK_NUCLEUS 8-(
	ldda		[%g2] ASI_BLK_S, %f16
	faddd		%f32, %f34, %f40
	fmuld		%f32, %f34, %f42
	faddd		%f32, %f34, %f44
	fmuld		%f32, %f34, %f46
	faddd		%f32, %f34, %f48
	fmuld		%f32, %f34, %f50
	faddd		%f32, %f34, %f52
	fmuld		%f32, %f34, %f54
	faddd		%f32, %f34, %f56
	fmuld		%f32, %f34, %f58
	faddd		%f32, %f34, %f60
	fmuld		%f32, %f34, %f62
	ba,pt		%xcc, fpdis_exit
	 membar		#Sync
3:	mov		SECONDARY_CONTEXT, %g3
	add		%g6, AOFF_task_fpregs, %g1
	ldxa		[%g3] ASI_DMMU, %g5
	mov		0x40, %g2
	stxa		%g0, [%g3] ASI_DMMU
	membar		#Sync
	ldda		[%g1] ASI_BLK_S, %f0		! grrr, where is ASI_BLK_NUCLEUS 8-(
	ldda		[%g1 + %g2] ASI_BLK_S, %f16
	add		%g1, 0x80, %g1
	ldda		[%g1] ASI_BLK_S, %f32
	ldda		[%g1 + %g2] ASI_BLK_S, %f48
	membar		#Sync
fpdis_exit:
	stxa		%g5, [%g3] ASI_DMMU
	membar		#Sync
fpdis_exit2:
	wr		%g7, 0, %gsr
	ldx		[%g6 + AOFF_task_thread + AOFF_thread_xfsr], %fsr
	rdpr		%tstate, %g3
	or		%g3, %g4, %g3		! anal...
	wrpr		%g3, %tstate
	wr		%g0, FPRS_FEF, %fprs	! clean DU/DL bits
	retry

	.align		32
fp_other_bounce:
	call		do_fpother
	 add		%sp, STACK_BIAS + REGWIN_SZ, %o0
	ba,pt		%xcc, rtrap
	 clr		%l6

	.globl		do_fpother_check_fitos
	.align		32
do_fpother_check_fitos:
	sethi		%hi(fp_other_bounce - 4), %g7
	or		%g7, %lo(fp_other_bounce - 4), %g7

	/* NOTE: Need to preserve %g7 until we fully commit
	 *       to the fitos fixup.
	 */
	stx		%fsr, [%g6 + AOFF_task_thread + AOFF_thread_xfsr]
	rdpr		%tstate, %g3
	andcc		%g3, TSTATE_PRIV, %g0
	bne,pn		%xcc, do_fptrap_after_fsr
	 nop
	ldx		[%g6 + AOFF_task_thread + AOFF_thread_xfsr], %g3
	srlx		%g3, 14, %g1
	and		%g1, 7, %g1
	cmp		%g1, 2			! Unfinished FP-OP
	bne,pn		%xcc, do_fptrap_after_fsr
	 sethi		%hi(1 << 23), %g1	! Inexact
	andcc		%g3, %g1, %g0
	bne,pn		%xcc, do_fptrap_after_fsr
	 rdpr		%tpc, %g1
	lduwa		[%g1] ASI_AIUP, %g3	! This cannot ever fail
#define FITOS_MASK	0xc1f83fe0
#define FITOS_COMPARE	0x81a01880
	sethi		%hi(FITOS_MASK), %g1
	or		%g1, %lo(FITOS_MASK), %g1
	and		%g3, %g1, %g1
	sethi		%hi(FITOS_COMPARE), %g2
	or		%g2, %lo(FITOS_COMPARE), %g2
	cmp		%g1, %g2
	bne,pn		%xcc, do_fptrap_after_fsr
	 nop
	std		%f62, [%g6 + AOFF_task_fpregs + (62 * 4)]
	sethi		%hi(fitos_table_1), %g1
	and		%g3, 0x1f, %g2
	or		%g1, %lo(fitos_table_1),  %g1
	sllx		%g2, 2, %g2
	jmpl		%g1 + %g2, %g0
	 ba,pt		%xcc, fitos_emul_continue

fitos_table_1:
	fitod		%f0, %f62
	fitod		%f1, %f62
	fitod		%f2, %f62
	fitod		%f3, %f62
	fitod		%f4, %f62
	fitod		%f5, %f62
	fitod		%f6, %f62
	fitod		%f7, %f62
	fitod		%f8, %f62
	fitod		%f9, %f62
	fitod		%f10, %f62
	fitod		%f11, %f62
	fitod		%f12, %f62
	fitod		%f13, %f62
	fitod		%f14, %f62
	fitod		%f15, %f62
	fitod		%f16, %f62
	fitod		%f17, %f62
	fitod		%f18, %f62
	fitod		%f19, %f62
	fitod		%f20, %f62
	fitod		%f21, %f62
	fitod		%f22, %f62
	fitod		%f23, %f62
	fitod		%f24, %f62
	fitod		%f25, %f62
	fitod		%f26, %f62
	fitod		%f27, %f62
	fitod		%f28, %f62
	fitod		%f29, %f62
	fitod		%f30, %f62
	fitod		%f31, %f62

fitos_emul_continue:
	sethi		%hi(fitos_table_2), %g1
	srl		%g3, 25, %g2
	or		%g1, %lo(fitos_table_2), %g1
	and		%g2, 0x1f, %g2
	sllx		%g2, 2, %g2
	jmpl		%g1 + %g2, %g0
	 ba,pt		%xcc, fitos_emul_fini

fitos_table_2:
	fdtos		%f62, %f0
	fdtos		%f62, %f1
	fdtos		%f62, %f2
	fdtos		%f62, %f3
	fdtos		%f62, %f4
	fdtos		%f62, %f5
	fdtos		%f62, %f6
	fdtos		%f62, %f7
	fdtos		%f62, %f8
	fdtos		%f62, %f9
	fdtos		%f62, %f10
	fdtos		%f62, %f11
	fdtos		%f62, %f12
	fdtos		%f62, %f13
	fdtos		%f62, %f14
	fdtos		%f62, %f15
	fdtos		%f62, %f16
	fdtos		%f62, %f17
	fdtos		%f62, %f18
	fdtos		%f62, %f19
	fdtos		%f62, %f20
	fdtos		%f62, %f21
	fdtos		%f62, %f22
	fdtos		%f62, %f23
	fdtos		%f62, %f24
	fdtos		%f62, %f25
	fdtos		%f62, %f26
	fdtos		%f62, %f27
	fdtos		%f62, %f28
	fdtos		%f62, %f29
	fdtos		%f62, %f30
	fdtos		%f62, %f31

fitos_emul_fini:
	ldd		[%g6 + AOFF_task_fpregs + (62 * 4)], %f62
	done

	.globl		do_fptrap
	.align		32
do_fptrap:
	stx		%fsr, [%g6 + AOFF_task_thread + AOFF_thread_xfsr]
do_fptrap_after_fsr:
	ldub		[%g6 + AOFF_task_thread + AOFF_thread_fpsaved], %g3
	rd		%fprs, %g1
	or		%g3, %g1, %g3
	stb		%g3, [%g6 + AOFF_task_thread + AOFF_thread_fpsaved]
	rd		%gsr, %g3
	stx		%g3, [%g6 + AOFF_task_thread + AOFF_thread_gsr]
	mov		SECONDARY_CONTEXT, %g3
	add		%g6, AOFF_task_fpregs, %g2
	ldxa		[%g3] ASI_DMMU, %g5
	stxa		%g0, [%g3] ASI_DMMU
	membar		#Sync
	andcc		%g1, FPRS_DL, %g0
	be,pn		%icc, 4f
	 mov		0x40, %g3
	stda		%f0, [%g2] ASI_BLK_S
	stda		%f16, [%g2 + %g3] ASI_BLK_S
	andcc		%g1, FPRS_DU, %g0
	be,pn		%icc, 5f
4:       add		%g2, 128, %g2
	stda		%f32, [%g2] ASI_BLK_S
	stda		%f48, [%g2 + %g3] ASI_BLK_S
5:	mov		SECONDARY_CONTEXT, %g1
	membar		#Sync
	stxa		%g5, [%g1] ASI_DMMU
	membar		#Sync
	ba,pt		%xcc, etrap
	 wr		%g0, 0, %fprs

	/* The registers for cross calls will be:
	 *
	 * DATA 0: [low 32-bits]  Address of function to call, jmp to this
	 *         [high 32-bits] MMU Context Argument 0, place in %g5
	 * DATA 1: Address Argument 1, place in %g6
	 * DATA 2: Address Argument 2, place in %g7
	 *
	 * With this method we can do most of the cross-call tlb/cache
	 * flushing very quickly.
	 *
	 * Current CPU's IRQ worklist table is locked into %g1,
	 * don't touch.
	 */
	.text
	.align		32
	.globl		do_ivec
do_ivec:
	mov		0x40, %g3
	ldxa		[%g3 + %g0] ASI_INTR_R, %g3
	sethi		%hi(KERNBASE), %g4
	cmp		%g3, %g4
	bgeu,pn		%xcc, do_ivec_xcall
	 srlx		%g3, 32, %g5
	stxa		%g0, [%g0] ASI_INTR_RECEIVE
	membar		#Sync

	sethi		%hi(ivector_table), %g2
	sllx		%g3, 5, %g3
	or		%g2, %lo(ivector_table), %g2
	add		%g2, %g3, %g3
	ldx		[%g3 + 0x08], %g2	/* irq_info */
	ldub		[%g3 + 0x04], %g4	/* pil */
	brz,pn		%g2, do_ivec_spurious
	 mov		1, %g2

	sllx		%g2, %g4, %g2
	sllx		%g4, 2, %g4
	lduw		[%g6 + %g4], %g5	/* g5 = irq_work(cpu, pil) */
	stw		%g5, [%g3 + 0x00]	/* bucket->irq_chain = g5 */
	stw		%g3, [%g6 + %g4]	/* irq_work(cpu, pil) = bucket */
	wr		%g2, 0x0, %set_softint
	retry
do_ivec_xcall:
	mov		0x50, %g1

	ldxa		[%g1 + %g0] ASI_INTR_R, %g1
	srl		%g3, 0, %g3
	mov		0x60, %g7
	ldxa		[%g7 + %g0] ASI_INTR_R, %g7
	stxa		%g0, [%g0] ASI_INTR_RECEIVE
	membar		#Sync
	ba,pt		%xcc, 1f
	 nop

	.align		32
1:	jmpl		%g3, %g0
	 nop

do_ivec_spurious:
	stw		%g3, [%g6 + 0x00]	/* irq_work(cpu, 0) = bucket */
	rdpr		%pstate, %g5

	wrpr		%g5, PSTATE_IG | PSTATE_AG, %pstate
	sethi		%hi(109f), %g7
	ba,pt		%xcc, etrap
109:	 or		%g7, %lo(109b), %g7
	call		catch_disabled_ivec
	 add		%sp, STACK_BIAS + REGWIN_SZ, %o0
	ba,pt		%xcc, rtrap
	 clr		%l6

	.globl		save_alternate_globals
save_alternate_globals: /* %o0 = save_area */
	rdpr		%pstate, %o5
	andn		%o5, PSTATE_IE, %o1
	wrpr		%o1, PSTATE_AG, %pstate
	stx		%g0, [%o0 + 0x00]
	stx		%g1, [%o0 + 0x08]
	stx		%g2, [%o0 + 0x10]
	stx		%g3, [%o0 + 0x18]
	stx		%g4, [%o0 + 0x20]
	stx		%g5, [%o0 + 0x28]
	stx		%g6, [%o0 + 0x30]
	stx		%g7, [%o0 + 0x38]
	wrpr		%o1, PSTATE_IG, %pstate
	stx		%g0, [%o0 + 0x40]
	stx		%g1, [%o0 + 0x48]
	stx		%g2, [%o0 + 0x50]
	stx		%g3, [%o0 + 0x58]
	stx		%g4, [%o0 + 0x60]
	stx		%g5, [%o0 + 0x68]
	stx		%g6, [%o0 + 0x70]
	stx		%g7, [%o0 + 0x78]
	wrpr		%o1, PSTATE_MG, %pstate
	stx		%g0, [%o0 + 0x80]
	stx		%g1, [%o0 + 0x88]
	stx		%g2, [%o0 + 0x90]
	stx		%g3, [%o0 + 0x98]
	stx		%g4, [%o0 + 0xa0]
	stx		%g5, [%o0 + 0xa8]
	stx		%g6, [%o0 + 0xb0]
	stx		%g7, [%o0 + 0xb8]
	wrpr		%o5, 0x0, %pstate
	retl
	 nop

	.globl		restore_alternate_globals
restore_alternate_globals: /* %o0 = save_area */
	rdpr		%pstate, %o5
	andn		%o5, PSTATE_IE, %o1
	wrpr		%o1, PSTATE_AG, %pstate
	ldx		[%o0 + 0x00], %g0
	ldx		[%o0 + 0x08], %g1
	ldx		[%o0 + 0x10], %g2
	ldx		[%o0 + 0x18], %g3
	ldx		[%o0 + 0x20], %g4
	ldx		[%o0 + 0x28], %g5
	ldx		[%o0 + 0x30], %g6
	ldx		[%o0 + 0x38], %g7
	wrpr		%o1, PSTATE_IG, %pstate
	ldx		[%o0 + 0x40], %g0
	ldx		[%o0 + 0x48], %g1
	ldx		[%o0 + 0x50], %g2
	ldx		[%o0 + 0x58], %g3
	ldx		[%o0 + 0x60], %g4
	ldx		[%o0 + 0x68], %g5
	ldx		[%o0 + 0x70], %g6
	ldx		[%o0 + 0x78], %g7
	wrpr		%o1, PSTATE_MG, %pstate
	ldx		[%o0 + 0x80], %g0
	ldx		[%o0 + 0x88], %g1
	ldx		[%o0 + 0x90], %g2
	ldx		[%o0 + 0x98], %g3
	ldx		[%o0 + 0xa0], %g4
	ldx		[%o0 + 0xa8], %g5
	ldx		[%o0 + 0xb0], %g6
	ldx		[%o0 + 0xb8], %g7
	wrpr		%o5, 0x0, %pstate
	retl
	 nop

	.globl		getcc, setcc
getcc:
	ldx		[%o0 + PT_V9_TSTATE], %o1
	srlx		%o1, 32, %o1
	and		%o1, 0xf, %o1
	retl
	 stx		%o1, [%o0 + PT_V9_G1]
setcc:
	ldx		[%o0 + PT_V9_TSTATE], %o1
	ldx		[%o0 + PT_V9_G1], %o2
	or		%g0, %ulo(TSTATE_ICC), %o3
	sllx		%o3, 32, %o3
	andn		%o1, %o3, %o1
	sllx		%o2, 32, %o2
	and		%o2, %o3, %o2
	or		%o1, %o2, %o1
	retl
	 stx		%o1, [%o0 + PT_V9_TSTATE]

	.globl		utrap, utrap_ill
utrap:	brz,pn		%g1, etrap
	 nop
	save		%sp, -128, %sp
	rdpr		%tstate, %l6
	rdpr		%cwp, %l7
	andn		%l6, TSTATE_CWP, %l6
	wrpr		%l6, %l7, %tstate
	rdpr		%tpc, %l6
	rdpr		%tnpc, %l7
	wrpr		%g1, 0, %tnpc
	done
utrap_ill:
        call		bad_trap
	 add		%sp, STACK_BIAS + REGWIN_SZ, %o0
	ba,pt		%xcc, rtrap
	 clr		%l6

#ifdef CONFIG_BLK_DEV_FD
	.globl		floppy_hardint
floppy_hardint:
	wr		%g0, (1 << 11), %clear_softint
	sethi		%hi(doing_pdma), %g1
	ld		[%g1 + %lo(doing_pdma)], %g2
	brz,pn		%g2, floppy_dosoftint
	 sethi		%hi(fdc_status), %g3
	ldx		[%g3 + %lo(fdc_status)], %g3
	sethi		%hi(pdma_vaddr), %g5
	ldx		[%g5 + %lo(pdma_vaddr)], %g4
	sethi		%hi(pdma_size), %g5
	ldx		[%g5 + %lo(pdma_size)], %g5

next_byte:
	lduba		[%g3] ASI_PHYS_BYPASS_EC_E, %g7
	andcc		%g7, 0x80, %g0
	be,pn		%icc, floppy_fifo_emptied
	 andcc		%g7, 0x20, %g0
	be,pn		%icc, floppy_overrun
	 andcc		%g7, 0x40, %g0
	be,pn		%icc, floppy_write
	 sub		%g5, 1, %g5

	inc		%g3
	lduba		[%g3] ASI_PHYS_BYPASS_EC_E, %g7
	dec		%g3
	orcc		%g0, %g5, %g0
	stb		%g7, [%g4]
	bne,pn		%xcc, next_byte
	 add		%g4, 1, %g4

	b,pt		%xcc, floppy_tdone
	 nop

floppy_write:
	ldub		[%g4], %g7
	orcc		%g0, %g5, %g0
	inc		%g3
	stba		%g7, [%g3] ASI_PHYS_BYPASS_EC_E
	dec		%g3
	bne,pn		%xcc, next_byte
	 add		%g4, 1, %g4

floppy_tdone:
	sethi		%hi(pdma_vaddr), %g1
	stx		%g4, [%g1 + %lo(pdma_vaddr)]
	sethi		%hi(pdma_size), %g1
	stx		%g5, [%g1 + %lo(pdma_size)]
	sethi		%hi(auxio_register), %g1
	ldx		[%g1 + %lo(auxio_register)], %g7
	lduba		[%g7] ASI_PHYS_BYPASS_EC_E, %g5
	or		%g5, 0xc2, %g5
	stba		%g5, [%g7] ASI_PHYS_BYPASS_EC_E
	andn		%g5, 0x02, %g5

	nop; nop;  nop; nop;  nop; nop;
	nop; nop;  nop; nop;  nop; nop;

	stba		%g5, [%g7] ASI_PHYS_BYPASS_EC_E
	sethi		%hi(doing_pdma), %g1
	b,pt		%xcc, floppy_dosoftint
	 st		%g0, [%g1 + %lo(doing_pdma)]

floppy_fifo_emptied:
	sethi		%hi(pdma_vaddr), %g1
	stx		%g4, [%g1 + %lo(pdma_vaddr)]
	sethi		%hi(pdma_size), %g1
	stx		%g5, [%g1 + %lo(pdma_size)]
	sethi		%hi(irq_action), %g1
	or		%g1, %lo(irq_action), %g1
	ldx		[%g1 + (11 << 3)], %g3		! irqaction[floppy_irq]
	ldx		[%g3 + 0x08], %g4		! action->flags>>48==ino
	sethi		%hi(ivector_table), %g3
	srlx		%g4, 48, %g4
	or		%g3, %lo(ivector_table), %g3
	sllx		%g4, 5, %g4
	ldx		[%g3 + %g4], %g4		! &ivector_table[ino]
	ldx		[%g4 + 0x10], %g4		! bucket->iclr
	stwa		%g0, [%g4] ASI_PHYS_BYPASS_EC_E	! ICLR_IDLE
	membar		#Sync				! probably not needed...
	retry

floppy_overrun:
	sethi		%hi(pdma_vaddr), %g1
	stx		%g4, [%g1 + %lo(pdma_vaddr)]
	sethi		%hi(pdma_size), %g1
	stx		%g5, [%g1 + %lo(pdma_size)]
	sethi		%hi(doing_pdma), %g1
	st		%g0, [%g1 + %lo(doing_pdma)]

floppy_dosoftint:
	rdpr		%pil, %g2
	wrpr		%g0, 15, %pil
	sethi		%hi(109f), %g7
	b,pt		%xcc, etrap_irq
109:	 or		%g7, %lo(109b), %g7

	mov		11, %o0
	mov		0, %o1
	call		sparc_floppy_irq
	 add		%sp, STACK_BIAS + REGWIN_SZ, %o2

	b,pt		%xcc, rtrap
	 clr		%l6

#endif /* CONFIG_BLK_DEV_FD */

	/* XXX Here is stuff we still need to write... -DaveM XXX */
	.globl		netbsd_syscall
netbsd_syscall:
	retl
	 nop

	/* These next few routines must be sure to clear the
	 * SFSR FaultValid bit so that the fast tlb data protection
	 * handler does not flush the wrong context and lock up the
	 * box.
	 */
	.globl		__do_data_access_exception
	.globl		__do_data_access_exception_tl1
__do_data_access_exception_tl1:
	rdpr		%pstate, %g4
	wrpr		%g4, PSTATE_MG|PSTATE_AG, %pstate
	mov		TLB_SFSR, %g3
	mov		DMMU_SFAR, %g5
	ldxa		[%g3] ASI_DMMU, %g4	! Get SFSR
	ldxa		[%g5] ASI_DMMU, %g5	! Get SFAR
	stxa		%g0, [%g3] ASI_DMMU	! Clear SFSR.FaultValid bit
	membar		#Sync
	ba,pt		%xcc, winfix_dax
	 rdpr		%tpc, %g3
__do_data_access_exception:
	rdpr		%pstate, %g4
	wrpr		%g4, PSTATE_MG|PSTATE_AG, %pstate
	mov		TLB_SFSR, %g3
	mov		DMMU_SFAR, %g5
	ldxa		[%g3] ASI_DMMU, %g4	! Get SFSR
	ldxa		[%g5] ASI_DMMU, %g5	! Get SFAR
	stxa		%g0, [%g3] ASI_DMMU	! Clear SFSR.FaultValid bit
	membar		#Sync
	sethi		%hi(109f), %g7
	ba,pt		%xcc, etrap
109:	 or		%g7, %lo(109b), %g7
	mov		%l4, %o1
	mov		%l5, %o2
	call		data_access_exception
	 add		%sp, STACK_BIAS + REGWIN_SZ, %o0
	ba,pt		%xcc, rtrap
	 clr		%l6

	.globl		__do_instruction_access_exception
	.globl		__do_instruction_access_exception_tl1
__do_instruction_access_exception_tl1:
	rdpr		%pstate, %g4
	wrpr		%g4, PSTATE_MG|PSTATE_AG, %pstate
	mov		TLB_SFSR, %g3
	mov		DMMU_SFAR, %g5
	ldxa		[%g3] ASI_DMMU, %g4	! Get SFSR
	ldxa		[%g5] ASI_DMMU, %g5	! Get SFAR
	stxa		%g0, [%g3] ASI_IMMU	! Clear FaultValid bit
	membar		#Sync
	sethi		%hi(109f), %g7
	ba,pt		%xcc, etraptl1
	 or		%g7, %lo(109f), %g7	! Merge in below
__do_instruction_access_exception:
	rdpr		%pstate, %g4
	wrpr		%g4, PSTATE_MG|PSTATE_AG, %pstate
	mov		TLB_SFSR, %g3
	mov		DMMU_SFAR, %g5
	ldxa		[%g3] ASI_DMMU, %g4	! Get SFSR
	ldxa		[%g5] ASI_DMMU, %g5	! Get SFAR
	stxa		%g0, [%g3] ASI_IMMU	! Clear FaultValid bit
	membar		#Sync
	sethi		%hi(109f), %g7
	ba,pt		%xcc, etrap
109:	 or		%g7, %lo(109b), %g7
	mov		%l4, %o1
	mov		%l5, %o2
	call		instruction_access_exception
	 add		%sp, STACK_BIAS + REGWIN_SZ, %o0
	ba,pt		%xcc, rtrap
	 clr		%l6

	/* This is the trap handler entry point for ECC correctable
	 * errors.  They are corrected, but we listen for the trap
	 * so that the event can be logged.
	 *
	 * Disrupting errors are either:
	 * 1) single-bit ECC errors during UDB reads to system
	 *    memory
	 * 2) data parity errors during write-back events
	 *
	 * As far as I can make out from the manual, the CEE trap
	 * is only for correctable errors during memory read
	 * accesses by the front-end of the processor.
	 *
	 * The code below is only for trap level 1 CEE events,
	 * as it is the only situation where we can safely record
	 * and log.  For trap level >1 we just clear the CE bit
	 * in the AFSR and return.
	 */

	/* Our trap handling infrastructure allows us to preserve
	 * two 64-bit values during etrap for arguments to
	 * subsequent C code.  Therefore we encode the information
	 * as follows:
	 *
	 * value 1) Full 64-bits of AFAR
	 * value 2) Low 33-bits of AFSR, then bits 33-->42
	 *          are UDBL error status and bits 43-->52
	 *          are UDBH error status
	 */
	.align	64
	.globl	cee_trap
cee_trap:
	ldxa	[%g0] ASI_AFSR, %g1		! Read AFSR
	ldxa	[%g0] ASI_AFAR, %g2		! Read AFAR
	sllx	%g1, 31, %g1			! Clear reserved bits
	srlx	%g1, 31, %g1			! in AFSR

	/* NOTE: UltraSparc-I/II have high and low UDB error
	 *       registers, corresponding to the two UDB units
	 *       present on those chips.  UltraSparc-IIi only
	 *       has a single UDB, called "SDB" in the manual.
	 *       For IIi the upper UDB register always reads
	 *       as zero so for our purposes things will just
	 *       work with the checks below.
	 */
	ldxa	[%g0] ASI_UDBL_ERROR_R, %g3	! Read UDB-Low error status
	andcc	%g3, (1 << 8), %g4		! Check CE bit
	sllx	%g3, (64 - 10), %g3		! Clear reserved bits
	srlx	%g3, (64 - 10), %g3		! in UDB-Low error status

	sllx	%g3, (33 + 0), %g3		! Shift up to encoding area
	or	%g1, %g3, %g1			! Or it in
	be,pn	%xcc, 1f			! Branch if CE bit was clear
	 nop
	stxa	%g4, [%g0] ASI_UDB_ERROR_W	! Clear CE sticky bit in UDBL
	membar	#Sync				! Synchronize ASI stores
1:	mov	0x18, %g5			! Addr of UDB-High error status
	ldxa	[%g5] ASI_UDBH_ERROR_R, %g3	! Read it

	andcc	%g3, (1 << 8), %g4		! Check CE bit
	sllx	%g3, (64 - 10), %g3		! Clear reserved bits
	srlx	%g3, (64 - 10), %g3		! in UDB-High error status
	sllx	%g3, (33 + 10), %g3		! Shift up to encoding area
	or	%g1, %g3, %g1			! Or it in
	be,pn	%xcc, 1f			! Branch if CE bit was clear
	 nop
	nop

	stxa	%g4, [%g5] ASI_UDB_ERROR_W	! Clear CE sticky bit in UDBH
	membar	#Sync				! Synchronize ASI stores
1:	mov	1, %g5				! AFSR CE bit is
	sllx	%g5, 20, %g5			! bit 20
	stxa	%g5, [%g0] ASI_AFSR		! Clear CE sticky bit in AFSR
	membar	#Sync				! Synchronize ASI stores
	sllx	%g2, (64 - 41), %g2		! Clear reserved bits
	srlx	%g2, (64 - 41), %g2		! in latched AFAR

	andn	%g2, 0x0f, %g2			! Finish resv bit clearing
	mov	%g1, %g4			! Move AFSR+UDB* into save reg
	mov	%g2, %g5			! Move AFAR into save reg
	rdpr	%pil, %g2
	wrpr	%g0, 15, %pil
	ba,pt	%xcc, etrap_irq
	 rd	%pc, %g7
	mov	%l4, %o0

	mov	%l5, %o1
	call	cee_log
	 add	%sp, STACK_BIAS + REGWIN_SZ, %o2
	ba,a,pt	%xcc, rtrap_clr_l6

	/* Capture I/D/E-cache state into per-cpu error scoreboard.
	 *
	 * %g1:		(TL>=0) ? 1 : 0
	 * %g2:		scratch
	 * %g3:		scratch
	 * %g4:		AFSR
	 * %g5:		AFAR
	 * %g6:		current thread ptr
	 * %g7:		scratch
	 */
#define CHEETAH_LOG_ERROR						\
	/* Put "TL1" software bit into AFSR. */				\
	and		%g1, 0x1, %g1;					\
	sllx		%g1, 63, %g2;					\
	or		%g4, %g2, %g4;					\
	/* Get log entry pointer for this cpu at this trap level. */	\
	ldxa		[%g0] ASI_SAFARI_CONFIG, %g2;			\
	srlx		%g2, 17, %g2;					\
	and		%g2, 0x3ff, %g2;				\
	sllx		%g2, 9, %g2;					\
	sethi		%hi(cheetah_error_log), %g3;			\
	ldx		[%g3 + %lo(cheetah_error_log)], %g3;		\
	brz,pn		%g3, 80f;					\
	 nop;								\
	add		%g3, %g2, %g3;					\
	sllx		%g1, 8, %g1;					\
	add		%g3, %g1, %g1;					\
	/* %g1 holds pointer to the top of the logging scoreboard */	\
	ldx		[%g1 + 0x0], %g7;				\
	cmp		%g7, -1;					\
	bne,pn		%xcc, 80f;					\
	 nop;								\
	stx		%g4, [%g1 + 0x0];				\
	stx		%g5, [%g1 + 0x8];				\
	add		%g1, 0x10, %g1;					\
	/* %g1 now points to D-cache logging area */			\
	set		0x3ff8, %g2;	/* DC_addr mask		*/	\
	and		%g5, %g2, %g2;	/* DC_addr bits of AFAR	*/	\
	srlx		%g5, 12, %g3;					\
	or		%g3, 1, %g3;	/* PHYS tag + valid	*/	\
10:	ldxa		[%g2] ASI_DCACHE_TAG, %g7;			\
	cmp		%g3, %g7;	/* TAG match?		*/	\
	bne,pt		%xcc, 13f;					\
	 nop;								\
	/* Yep, what we want, capture state. */				\
	stx		%g2, [%g1 + 0x20];				\
	stx		%g7, [%g1 + 0x28];				\
	/* A membar Sync is required before and after utag access. */	\
	membar		#Sync;						\
	ldxa		[%g2] ASI_DCACHE_UTAG, %g7;			\
	membar		#Sync;						\
	stx		%g7, [%g1 + 0x30];				\
	ldxa		[%g2] ASI_DCACHE_SNOOP_TAG, %g7;		\
	stx		%g7, [%g1 + 0x38];				\
	clr		%g3;						\
12:	ldxa		[%g2 + %g3] ASI_DCACHE_DATA, %g7;		\
	stx		%g7, [%g1];					\
	add		%g3, (1 << 5), %g3;				\
	cmp		%g3, (4 << 5);					\
	bl,pt		%xcc, 12b;					\
	 add		%g1, 0x8, %g1;					\
	ba,pt		%xcc, 20f;					\
	 add		%g1, 0x20, %g1;					\
13:	sethi		%hi(1 << 14), %g7;				\
	add		%g2, %g7, %g2;					\
	srlx		%g2, 14, %g7;					\
	cmp		%g7, 4;						\
	bl,pt		%xcc, 10b;					\
	 nop;								\
	add		%g1, 0x40, %g1;					\
20:	/* %g1 now points to I-cache logging area */			\
	set		0x1fe0, %g2;	/* IC_addr mask		*/	\
	and		%g5, %g2, %g2;	/* IC_addr bits of AFAR	*/	\
	sllx		%g2, 1, %g2;	/* IC_addr[13:6]==VA[12:5] */	\
	srlx		%g5, (13 - 8), %g3; /* Make PTAG */		\
	andn		%g3, 0xff, %g3;	/* Mask off undefined bits */	\
21:	ldxa		[%g2] ASI_IC_TAG, %g7;				\
	andn		%g7, 0xff, %g7;					\
	cmp		%g3, %g7;					\
	bne,pt		%xcc, 23f;					\
	 nop;								\
	/* Yep, what we want, capture state. */				\
	stx		%g2, [%g1 + 0x40];				\
	stx		%g7, [%g1 + 0x48];				\
	add		%g2, (1 << 3), %g2;				\
	ldxa		[%g2] ASI_IC_TAG, %g7;				\
	add		%g2, (1 << 3), %g2;				\
	stx		%g7, [%g1 + 0x50];				\
	ldxa		[%g2] ASI_IC_TAG, %g7;				\
	add		%g2, (1 << 3), %g2;				\
	stx		%g7, [%g1 + 0x60];				\
	ldxa		[%g2] ASI_IC_TAG, %g7;				\
	stx		%g7, [%g1 + 0x68];				\
	sub		%g2, (3 << 3), %g2;				\
	ldxa		[%g2] ASI_IC_STAG, %g7;				\
	stx		%g7, [%g1 + 0x58];				\
	clr		%g3;						\
	srlx		%g2, 2, %g2;					\
22:	ldxa		[%g2 + %g3] ASI_IC_INSTR, %g7;			\
	stx		%g7, [%g1];					\
	add		%g3, (1 << 3), %g3;				\
	cmp		%g3, (8 << 3);					\
	bl,pt		%xcc, 22b;					\
	 add		%g1, 0x8, %g1;					\
	ba,pt		%xcc, 30f;					\
	 add		%g1, 0x30, %g1;					\
23:	sethi		%hi(1 << 14), %g7;				\
	add		%g2, %g7, %g2;					\
	srlx		%g2, 14, %g7;					\
	cmp		%g7, 4;						\
	bl,pt		%xcc, 21b;					\
	 nop;								\
	add		%g1, 0x70, %g1;					\
30:	/* %g1 now points to E-cache logging area */			\
	andn		%g5, (32 - 1), %g2;	/* E-cache subblock */	\
	stx		%g2, [%g1 + 0x20];				\
	ldxa		[%g2] ASI_EC_TAG_DATA, %g7;			\
	stx		%g7, [%g1 + 0x28];				\
	ldxa		[%g2] ASI_EC_R, %g0;				\
	clr		%g3;						\
31:	ldxa		[%g3] ASI_EC_DATA, %g7;				\
	stx		%g7, [%g1 + %g3];				\
	add		%g3, 0x8, %g3;					\
	cmp		%g3, 0x20;					\
	bl,pt		%xcc, 31b;					\
	 nop;								\
80:	/* DONE */

	/* These get patched into the trap table at boot time
	 * once we know we have a cheetah processor.
	 */
	.globl		cheetah_fecc_trap_vector, cheetah_fecc_trap_vector_tl1
cheetah_fecc_trap_vector:
	membar		#Sync
	ldxa		[%g0] ASI_DCU_CONTROL_REG, %g1
	andn		%g1, DCU_DC | DCU_IC, %g1
	stxa		%g1, [%g0] ASI_DCU_CONTROL_REG
	membar		#Sync
	sethi		%hi(cheetah_fast_ecc), %g2
	jmpl		%g2 + %lo(cheetah_fast_ecc), %g0
	 mov		0, %g1
cheetah_fecc_trap_vector_tl1:
	membar		#Sync
	ldxa		[%g0] ASI_DCU_CONTROL_REG, %g1
	andn		%g1, DCU_DC | DCU_IC, %g1
	stxa		%g1, [%g0] ASI_DCU_CONTROL_REG
	membar		#Sync
	sethi		%hi(cheetah_fast_ecc), %g2
	jmpl		%g2 + %lo(cheetah_fast_ecc), %g0
	 mov		1, %g1
	.globl	cheetah_cee_trap_vector, cheetah_cee_trap_vector_tl1
cheetah_cee_trap_vector:
	membar		#Sync
	ldxa		[%g0] ASI_DCU_CONTROL_REG, %g1
	andn		%g1, DCU_IC, %g1
	stxa		%g1, [%g0] ASI_DCU_CONTROL_REG
	membar		#Sync
	sethi		%hi(cheetah_cee), %g2
	jmpl		%g2 + %lo(cheetah_cee), %g0
	 mov		0, %g1
cheetah_cee_trap_vector_tl1:
	membar		#Sync
	ldxa		[%g0] ASI_DCU_CONTROL_REG, %g1
	andn		%g1, DCU_IC, %g1
	stxa		%g1, [%g0] ASI_DCU_CONTROL_REG
	membar		#Sync
	sethi		%hi(cheetah_cee), %g2
	jmpl		%g2 + %lo(cheetah_cee), %g0
	 mov		1, %g1
	.globl	cheetah_deferred_trap_vector, cheetah_deferred_trap_vector_tl1
cheetah_deferred_trap_vector:
	membar		#Sync
	ldxa		[%g0] ASI_DCU_CONTROL_REG, %g1;
	andn		%g1, DCU_DC | DCU_IC, %g1;
	stxa		%g1, [%g0] ASI_DCU_CONTROL_REG;
	membar		#Sync;
	sethi		%hi(cheetah_deferred_trap), %g2
	jmpl		%g2 + %lo(cheetah_deferred_trap), %g0
	 mov		0, %g1
cheetah_deferred_trap_vector_tl1:
	membar		#Sync;
	ldxa		[%g0] ASI_DCU_CONTROL_REG, %g1;
	andn		%g1, DCU_DC | DCU_IC, %g1;
	stxa		%g1, [%g0] ASI_DCU_CONTROL_REG;
	membar		#Sync;
	sethi		%hi(cheetah_deferred_trap), %g2
	jmpl		%g2 + %lo(cheetah_deferred_trap), %g0
	 mov		1, %g1

	/* Cheetah FECC trap handling, we get here from tl{0,1}_fecc
	 * in the trap table.  That code has done a memory barrier
	 * and has disabled both the I-cache and D-cache in the DCU
	 * control register.  The I-cache is disabled so that we may
	 * capture the corrupted cache line, and the D-cache is disabled
	 * because corrupt data may have been placed there and we don't
	 * want to reference it.
	 *
	 * %g1 is one if this trap occured at %tl >= 1.
	 *
	 * Next, we turn off error reporting so that we don't recurse.
	 */
	.globl		cheetah_fast_ecc
cheetah_fast_ecc:
	ldxa		[%g0] ASI_ESTATE_ERROR_EN, %g2
	andn		%g2, ESTATE_ERROR_NCEEN | ESTATE_ERROR_CEEN, %g2
	stxa		%g2, [%g0] ASI_ESTATE_ERROR_EN
	membar		#Sync

	/* Fetch and clear AFSR/AFAR */
	ldxa		[%g0] ASI_AFSR, %g4
	ldxa		[%g0] ASI_AFAR, %g5
	stxa		%g4, [%g0] ASI_AFSR
	membar		#Sync

	CHEETAH_LOG_ERROR

	rdpr		%pil, %g2
	wrpr		%g0, 15, %pil
	ba,pt		%xcc, etrap_irq
	 rd		%pc, %g7
	mov		%l4, %o1
	mov		%l5, %o2
	call		cheetah_fecc_handler
	 add		%sp, STACK_BIAS + REGWIN_SZ, %o0
	ba,a,pt		%xcc, rtrap_clr_l6

	/* Our caller has disabled I-cache and performed membar Sync. */
	.globl		cheetah_cee
cheetah_cee:
	ldxa		[%g0] ASI_ESTATE_ERROR_EN, %g2
	andn		%g2, ESTATE_ERROR_CEEN, %g2
	stxa		%g2, [%g0] ASI_ESTATE_ERROR_EN
	membar		#Sync

	/* Fetch and clear AFSR/AFAR */
	ldxa		[%g0] ASI_AFSR, %g4
	ldxa		[%g0] ASI_AFAR, %g5
	stxa		%g4, [%g0] ASI_AFSR
	membar		#Sync

	CHEETAH_LOG_ERROR

	rdpr		%pil, %g2
	wrpr		%g0, 15, %pil
	ba,pt		%xcc, etrap_irq
	 rd		%pc, %g7
	mov		%l4, %o1
	mov		%l5, %o2
	call		cheetah_cee_handler
	 add		%sp, STACK_BIAS + REGWIN_SZ, %o0
	ba,a,pt		%xcc, rtrap_clr_l6

	/* Our caller has disabled I-cache+D-cache and performed membar Sync. */
	.globl		cheetah_deferred_trap
cheetah_deferred_trap:
	ldxa		[%g0] ASI_ESTATE_ERROR_EN, %g2
	andn		%g2, ESTATE_ERROR_NCEEN | ESTATE_ERROR_CEEN, %g2
	stxa		%g2, [%g0] ASI_ESTATE_ERROR_EN
	membar		#Sync

	/* Fetch and clear AFSR/AFAR */
	ldxa		[%g0] ASI_AFSR, %g4
	ldxa		[%g0] ASI_AFAR, %g5
	stxa		%g4, [%g0] ASI_AFSR
	membar		#Sync

	CHEETAH_LOG_ERROR

	rdpr		%pil, %g2
	wrpr		%g0, 15, %pil
	ba,pt		%xcc, etrap_irq
	 rd		%pc, %g7
	mov		%l4, %o1
	mov		%l5, %o2
	call		cheetah_deferred_handler
	 add		%sp, STACK_BIAS + REGWIN_SZ, %o0
	ba,a,pt		%xcc, rtrap_clr_l6

	.globl		__do_privact
__do_privact:
	mov		TLB_SFSR, %g3
	stxa		%g0, [%g3] ASI_DMMU	! Clear FaultValid bit
	membar		#Sync
	sethi		%hi(109f), %g7
	ba,pt		%xcc, etrap
109:	or		%g7, %lo(109b), %g7
	call		do_privact
	 add		%sp, STACK_BIAS + REGWIN_SZ, %o0
	ba,pt		%xcc, rtrap
	 clr		%l6

	.globl		do_mna
do_mna:
	rdpr		%tl, %g3
	cmp		%g3, 1

	/* Setup %g4/%g5 now as they are used in the
	 * winfixup code.
	 */
	mov		TLB_SFSR, %g3
	mov		DMMU_SFAR, %g4
	ldxa		[%g4] ASI_DMMU, %g4
	ldxa		[%g3] ASI_DMMU, %g5
	stxa		%g0, [%g3] ASI_DMMU	! Clear FaultValid bit
	membar		#Sync
	bgu,pn		%icc, winfix_mna
	 rdpr		%tpc, %g3

1:	sethi		%hi(109f), %g7
	ba,pt		%xcc, etrap
109:	 or		%g7, %lo(109b), %g7
	mov		%l4, %o1
	mov		%l5, %o2
	call		mem_address_unaligned
	 add		%sp, STACK_BIAS + REGWIN_SZ, %o0
	ba,pt		%xcc, rtrap
	 clr		%l6

	.globl		do_lddfmna
do_lddfmna:
	sethi		%hi(109f), %g7
	mov		TLB_SFSR, %g4
	ldxa		[%g4] ASI_DMMU, %g5
	stxa		%g0, [%g4] ASI_DMMU	! Clear FaultValid bit
	membar		#Sync
	mov		DMMU_SFAR, %g4
	ldxa		[%g4] ASI_DMMU, %g4
	ba,pt		%xcc, etrap
109:	 or		%g7, %lo(109b), %g7
	mov		%l4, %o1
	mov		%l5, %o2
	call		handle_lddfmna
	 add		%sp, STACK_BIAS + REGWIN_SZ, %o0
	ba,pt		%xcc, rtrap
	 clr		%l6

	.globl		do_stdfmna
do_stdfmna:
	sethi		%hi(109f), %g7
	mov		TLB_SFSR, %g4
	ldxa		[%g4] ASI_DMMU, %g5
	stxa		%g0, [%g4] ASI_DMMU	! Clear FaultValid bit
	membar		#Sync
	mov		DMMU_SFAR, %g4
	ldxa		[%g4] ASI_DMMU, %g4
	ba,pt		%xcc, etrap
109:	 or		%g7, %lo(109b), %g7
	mov		%l4, %o1
	mov		%l5, %o2
	call		handle_stdfmna
	 add		%sp, STACK_BIAS + REGWIN_SZ, %o0
	ba,pt		%xcc, rtrap
	 clr		%l6

	.globl	breakpoint_trap
breakpoint_trap:
	call		sparc_breakpoint
	 add		%sp, STACK_BIAS + REGWIN_SZ, %o0
	ba,pt		%xcc, rtrap
	 nop

#if defined(CONFIG_SUNOS_EMUL) || defined(CONFIG_SOLARIS_EMUL) || \
    defined(CONFIG_SOLARIS_EMUL_MODULE)
	/* SunOS uses syscall zero as the 'indirect syscall' it looks
	 * like indir_syscall(scall_num, arg0, arg1, arg2...);  etc.
	 * This is complete brain damage.
	 */
	.globl	sunos_indir
sunos_indir:
	srl		%o0, 0, %o0
	mov		%o7, %l4
	cmp		%o0, NR_SYSCALLS
	blu,a,pt	%icc, 1f
	 sll		%o0, 0x2, %o0
	sethi		%hi(sunos_nosys), %l6
	b,pt		%xcc, 2f
	 or		%l6, %lo(sunos_nosys), %l6
1:	sethi		%hi(sunos_sys_table), %l7
	or		%l7, %lo(sunos_sys_table), %l7
	lduw		[%l7 + %o0], %l6
2:	mov		%o1, %o0
	mov		%o2, %o1
	mov		%o3, %o2
	mov		%o4, %o3
	mov		%o5, %o4
	call		%l6
	 mov		%l4, %o7

	.globl	sunos_getpid
sunos_getpid:
	call	sys_getppid
	 nop
	call	sys_getpid
	 stx	%o0, [%sp + STACK_BIAS + REGWIN_SZ + PT_V9_I1]
	b,pt	%xcc, ret_sys_call
	 stx	%o0, [%sp + STACK_BIAS + REGWIN_SZ + PT_V9_I0]

	/* SunOS getuid() returns uid in %o0 and euid in %o1 */
	.globl	sunos_getuid
sunos_getuid:
	call	sys32_geteuid16
	 nop
	call	sys32_getuid16
	 stx	%o0, [%sp + STACK_BIAS + REGWIN_SZ + PT_V9_I1]
	b,pt	%xcc, ret_sys_call
	 stx	%o0, [%sp + STACK_BIAS + REGWIN_SZ + PT_V9_I0]

	/* SunOS getgid() returns gid in %o0 and egid in %o1 */
	.globl	sunos_getgid
sunos_getgid:
	call	sys32_getegid16
	 nop
	call	sys32_getgid16
	 stx	%o0, [%sp + STACK_BIAS + REGWIN_SZ + PT_V9_I1]
	b,pt	%xcc, ret_sys_call
	 stx	%o0, [%sp + STACK_BIAS + REGWIN_SZ + PT_V9_I0]
#endif

	/* SunOS's execv() call only specifies the argv argument, the
	 * environment settings are the same as the calling processes.
	 */
	.globl	sunos_execv, sys_execve, sys32_execve
sys_execve:
	sethi		%hi(sparc_execve), %g1
	ba,pt		%xcc, execve_merge
	 or		%g1, %lo(sparc_execve), %g1
sunos_execv:
	stx		%g0, [%sp + STACK_BIAS + REGWIN_SZ + PT_V9_I2]
sys32_execve:
	sethi		%hi(sparc32_execve), %g1
	or		%g1, %lo(sparc32_execve), %g1
execve_merge:
	flushw
	jmpl		%g1, %g0
	 add		%sp, STACK_BIAS + REGWIN_SZ, %o0

	.globl	sys_pipe, sys_sigpause, sys_nis_syscall
	.globl	sys_sigsuspend, sys_rt_sigsuspend, sys32_rt_sigsuspend
	.globl	sys_rt_sigreturn
	.globl	sys32_sigreturn, sys32_rt_sigreturn
	.globl	sys32_execve, sys_ptrace
	.globl	sys_sigaltstack, sys32_sigaltstack
	.globl	sys32_sigstack
	.align	32
sys_pipe:	ba,pt		%xcc, sparc_pipe
		 add		%sp, STACK_BIAS + REGWIN_SZ, %o0
sys_nis_syscall:ba,pt		%xcc, c_sys_nis_syscall
		 add		%sp, STACK_BIAS + REGWIN_SZ, %o0
sys_memory_ordering:
		ba,pt		%xcc, sparc_memory_ordering
		 add		%sp, STACK_BIAS + REGWIN_SZ, %o1
sys_sigaltstack:ba,pt		%xcc, do_sigaltstack
		 add		%i6, STACK_BIAS, %o2
sys32_sigstack:	ba,pt		%xcc, do_sys32_sigstack
		 mov		%i6, %o2
sys32_sigaltstack:
		ba,pt		%xcc, do_sys32_sigaltstack
		 mov		%i6, %o2

		.align		32
sys_sigsuspend:	add		%sp, STACK_BIAS + REGWIN_SZ, %o0
		call		do_sigsuspend
		 add		%o7, 1f-.-4, %o7
		nop
sys_rt_sigsuspend: /* NOTE: %o0,%o1 have a correct value already */
		add		%sp, STACK_BIAS + REGWIN_SZ, %o2
		call		do_rt_sigsuspend
		 add		%o7, 1f-.-4, %o7
		nop
sys32_rt_sigsuspend: /* NOTE: %o0,%o1 have a correct value already */
		srl		%o0, 0, %o0
		add		%sp, STACK_BIAS + REGWIN_SZ, %o2
		call		do_rt_sigsuspend32
		 add		%o7, 1f-.-4, %o7
		/* NOTE: %o0 has a correct value already */
sys_sigpause:	add		%sp, STACK_BIAS + REGWIN_SZ, %o1
		call		do_sigpause
		 add		%o7, 1f-.-4, %o7
		nop
sys32_sigreturn:
		add		%sp, STACK_BIAS + REGWIN_SZ, %o0
		call		do_sigreturn32
		 add		%o7, 1f-.-4, %o7
		nop
sys_rt_sigreturn:
		add		%sp, STACK_BIAS + REGWIN_SZ, %o0
		call		do_rt_sigreturn
		 add		%o7, 1f-.-4, %o7
		nop
sys32_rt_sigreturn:
		add		%sp, STACK_BIAS + REGWIN_SZ, %o0
		call		do_rt_sigreturn32
		 add		%o7, 1f-.-4, %o7
		nop
sys_ptrace:	add		%sp, STACK_BIAS + REGWIN_SZ, %o0
		call		do_ptrace
		 add		%o7, 1f-.-4, %o7
		nop
		.align		32
1:		ldx		[%curptr + AOFF_task_ptrace], %l5
		andcc		%l5, 0x02, %g0
		be,pt		%icc, rtrap
		 clr		%l6
		call		syscall_trace
		 nop

		ba,pt		%xcc, rtrap
		 clr		%l6

	/* This is how fork() was meant to be done, 8 instruction entry.
	 *
	 * I questioned the following code briefly, let me clear things
	 * up so you must not reason on it like I did.
	 *
	 * Know the fork_kpsr etc. we use in the sparc32 port?  We don't
	 * need it here because the only piece of window state we copy to
	 * the child is the CWP register.  Even if the parent sleeps,
	 * we are safe because we stuck it into pt_regs of the parent
	 * so it will not change.
	 *
	 * XXX This raises the question, whether we can do the same on
	 * XXX sparc32 to get rid of fork_kpsr _and_ fork_kwim.  The
	 * XXX answer is yes.  We stick fork_kpsr in UREG_G0 and
	 * XXX fork_kwim in UREG_G1 (global registers are considered
	 * XXX volatile across a system call in the sparc ABI I think
	 * XXX if it isn't we can use regs->y instead, anyone who depends
	 * XXX upon the Y register being preserved across a fork deserves
	 * XXX to lose).
	 *
	 * In fact we should take advantage of that fact for other things
	 * during system calls...
	 */
	.globl	sys_fork, sys_vfork, sys_clone, sparc_exit
	.globl	ret_from_syscall
	.align	32
sys_vfork:	/* Under Linux, vfork and fork are just special cases of clone. */
		sethi		%hi(0x4000 | 0x0100 | SIGCHLD), %o0
		or		%o0, %lo(0x4000 | 0x0100 | SIGCHLD), %o0
		ba,pt		%xcc, sys_clone
sys_fork:	 clr		%o1
		mov		SIGCHLD, %o0
sys_clone:	flushw
		movrz		%o1, %fp, %o1
		mov		0, %o3
		ba,pt		%xcc, do_fork
		 add		%sp, STACK_BIAS + REGWIN_SZ, %o2
ret_from_syscall:
		/* Clear SPARC_FLAG_NEWCHILD, switch_to leaves thread.flags in
		 * %o7 for us.  Check performance counter stuff too.
		 */
		andn		%o7, SPARC_FLAG_NEWCHILD, %l0
		mov		%g5, %o0	/* 'prev' */
		call		schedule_tail
		 stb		%l0, [%g6 + AOFF_task_thread + AOFF_thread_flags]
		andcc		%l0, SPARC_FLAG_PERFCTR, %g0
		be,pt		%icc, 1f
		 nop
		ldx		[%g6 + AOFF_task_thread + AOFF_thread_pcr_reg], %o7
		wr		%g0, %o7, %pcr

		/* Blackbird errata workaround.  See commentary in
		 * smp.c:smp_percpu_timer_interrupt() for more
		 * information.
		 */
		ba,pt		%xcc, 99f
		 nop
		.align		64
99:		wr		%g0, %g0, %pic
		rd		%pic, %g0

1:		b,pt		%xcc, ret_sys_call
		 ldx		[%sp + STACK_BIAS + REGWIN_SZ + PT_V9_I0], %o0
sparc_exit:	wrpr		%g0, (PSTATE_RMO | PSTATE_PEF | PSTATE_PRIV), %pstate
		rdpr		%otherwin, %g1
		rdpr		%cansave, %g3
		add		%g3, %g1, %g3
		wrpr		%g3, 0x0, %cansave
		wrpr		%g0, 0x0, %otherwin
		wrpr		%g0, (PSTATE_RMO | PSTATE_PEF | PSTATE_PRIV | PSTATE_IE), %pstate
		ba,pt		%xcc, sys_exit
		 stb		%g0, [%g6 + AOFF_task_thread + AOFF_thread_w_saved]

linux_sparc_ni_syscall:
	sethi		%hi(sys_ni_syscall), %l7
	b,pt		%xcc, 4f
	 or		%l7, %lo(sys_ni_syscall), %l7

linux_syscall_trace32:
	call		syscall_trace
	 nop
	srl		%i0, 0, %o0
	mov		%i4, %o4
	srl		%i1, 0, %o1
	srl		%i2, 0, %o2
	b,pt		%xcc, 2f
	 srl		%i3, 0, %o3

linux_syscall_trace:
	call		syscall_trace
	 nop
	mov		%i0, %o0
	mov		%i1, %o1
	mov		%i2, %o2
	mov		%i3, %o3
	b,pt		%xcc, 2f
	 mov		%i4, %o4


	/* Linux 32-bit and SunOS system calls enter here... */
	.align	32
	.globl	linux_sparc_syscall32
linux_sparc_syscall32:
	/* Direct access to user regs, much faster. */
	cmp		%g1, NR_SYSCALLS			! IEU1	Group
	bgeu,pn		%xcc, linux_sparc_ni_syscall		! CTI
	 srl		%i0, 0, %o0				! IEU0
	sll		%g1, 2, %l4				! IEU0	Group
#ifdef SYSCALL_TRACING
	call		syscall_trace_entry
	 add		%sp, STACK_BIAS + REGWIN_SZ, %o0
	srl		%i0, 0, %o0
#endif
	mov		%i4, %o4				! IEU1
	lduw		[%l7 + %l4], %l7			! Load
	srl		%i1, 0, %o1				! IEU0	Group
	ldx		[%curptr + AOFF_task_ptrace], %l0	! Load

	mov		%i5, %o5				! IEU1
	srl		%i2, 0, %o2				! IEU0	Group
	andcc		%l0, 0x02, %g0				! IEU0	Group
	bne,pn		%icc, linux_syscall_trace32		! CTI
	 mov		%i0, %l5				! IEU1
	call		%l7					! CTI	Group brk forced
	 srl		%i3, 0, %o3				! IEU0
	ba,a,pt		%xcc, 3f

	/* Linux native and SunOS system calls enter here... */
	.align	32
	.globl	linux_sparc_syscall, ret_sys_call
linux_sparc_syscall:
	/* Direct access to user regs, much faster. */
	cmp		%g1, NR_SYSCALLS			! IEU1	Group
	bgeu,pn		%xcc, linux_sparc_ni_syscall		! CTI
	 mov		%i0, %o0				! IEU0
	sll		%g1, 2, %l4				! IEU0	Group
#ifdef SYSCALL_TRACING
	call		syscall_trace_entry
	 add		%sp, STACK_BIAS + REGWIN_SZ, %o0
	mov		%i0, %o0
#endif
	mov		%i1, %o1				! IEU1
	lduw		[%l7 + %l4], %l7			! Load
4:	mov		%i2, %o2				! IEU0	Group
	ldx		[%curptr + AOFF_task_ptrace], %l0	! Load

	mov		%i3, %o3				! IEU1
	mov		%i4, %o4				! IEU0	Group
	andcc		%l0, 0x02, %g0				! IEU1	Group+1 bubble
	bne,pn		%icc, linux_syscall_trace		! CTI	Group
	 mov		%i0, %l5				! IEU0
2:	call		%l7					! CTI	Group brk forced
	 mov		%i5, %o5				! IEU0
	nop

3:	stx		%o0, [%sp + STACK_BIAS + REGWIN_SZ + PT_V9_I0]
ret_sys_call:
#ifdef SYSCALL_TRACING
	mov		%o0, %o1
	call		syscall_trace_exit
	 add		%sp, STACK_BIAS + REGWIN_SZ, %o0
	mov		%o1, %o0
#endif
	ldx		[%sp + STACK_BIAS + REGWIN_SZ + PT_V9_TSTATE], %g3
	ldx		[%sp + STACK_BIAS + REGWIN_SZ + PT_V9_TNPC], %l1 ! pc = npc
	sra		%o0, 0, %o0
	mov		%ulo(TSTATE_XCARRY | TSTATE_ICARRY), %g2
	cmp		%o0, -ENOIOCTLCMD
	sllx		%g2, 32, %g2
	bgeu,pn		%xcc, 1f

	 andcc		%l0, 0x02, %l6	
	andn		%g3, %g2, %g3		/* System call success, clear Carry condition code. */
	stx		%g3, [%sp + STACK_BIAS + REGWIN_SZ + PT_V9_TSTATE]	
	bne,pn		%icc, linux_syscall_trace2
	 add		%l1, 0x4, %l2				         ! npc = npc+4
	stx		%l1, [%sp + STACK_BIAS + REGWIN_SZ + PT_V9_TPC]
	ba,pt		%xcc, rtrap_clr_l6
	 stx		%l2, [%sp + STACK_BIAS + REGWIN_SZ + PT_V9_TNPC]

1:
	/* System call failure, set Carry condition code.
	 * Also, get abs(errno) to return to the process.
	 */
	sub		%g0, %o0, %o0
	or		%g3, %g2, %g3
	stx		%o0, [%sp + STACK_BIAS + REGWIN_SZ + PT_V9_I0]
	mov		1, %l6
	stx		%g3, [%sp + STACK_BIAS + REGWIN_SZ + PT_V9_TSTATE]
	bne,pn		%icc, linux_syscall_trace2
	 add		%l1, 0x4, %l2				         !npc = npc+4
	stx		%l1, [%sp + STACK_BIAS + REGWIN_SZ + PT_V9_TPC]

	b,pt		%xcc, rtrap
	 stx		%l2, [%sp + STACK_BIAS + REGWIN_SZ + PT_V9_TNPC]
linux_syscall_trace2:
	call		syscall_trace
	 nop
	stx		%l1, [%sp + STACK_BIAS + REGWIN_SZ + PT_V9_TPC]
	ba,pt		%xcc, rtrap
	 stx		%l2, [%sp + STACK_BIAS + REGWIN_SZ + PT_V9_TNPC]

	.align		32
	.globl		__flushw_user
__flushw_user:
	rdpr		%otherwin, %g1
	brz,pn		%g1, 2f
	 clr		%g2
1:	save		%sp, -128, %sp
	rdpr		%otherwin, %g1
	brnz,pt		%g1, 1b
	 add		%g2, 1, %g2
1:	sub		%g2, 1, %g2
	brnz,pt		%g2, 1b
	 restore	%g0, %g0, %g0
2:	retl
	 nop

/* This need not obtain the xtime_lock as it is coded in
 * an implicitly SMP safe way already.
 */
	.align		64
	.globl		do_gettimeofday
do_gettimeofday:	/* %o0 = timevalp */
	/* Load doubles must be used on xtime so that what we get
	 * is guarenteed to be atomic, this is why we can run this
	 * with interrupts on full blast.  Don't touch this... -DaveM
	 *
	 * Note with time_t changes to the timeval type, I must now use
	 * nucleus atomic quad 128-bit loads.
	 *
	 * If xtime was stored recently, I've seen crap from the
	 * quad load on Cheetah.  Putting a membar SYNC before
	 * the quad load seems to make the problem go away. -DaveM
	 * (we should nop out workarounds like this on spitfire)
	 */
	sethi	%hi(timer_tick_offset), %g3
	sethi	%hi(xtime), %g2
	sethi	%hi(timer_tick_compare), %g1
	ldx	[%g3 + %lo(timer_tick_offset)], %g3
	or	%g2, %lo(xtime), %g2
	or	%g1, %lo(timer_tick_compare), %g1
1:	rdpr	%ver, %o2
	sethi	%hi(0x003e0014), %o1
	srlx	%o2, 32, %o2
	or	%o1, %lo(0x003e0014), %o1
	membar	#Sync
	ldda	[%g2] ASI_NUCLEUS_QUAD_LDD, %o4
	cmp	%o2, %o1
	bne,pt	%xcc, 2f
	 nop
	ba,pt	%xcc, 3f
	 rd	%asr24, %o1
2:	rd	%tick, %o1
3:	ldx	[%g1], %g7
	membar	#Sync
	ldda	[%g2] ASI_NUCLEUS_QUAD_LDD, %o2
	xor	%o4, %o2, %o2
	xor	%o5, %o3, %o3
	orcc	%o2, %o3, %g0
	bne,pn	%xcc, 1b
	 sethi	%hi(wall_jiffies), %o2
	sethi	%hi(jiffies), %o3
	ldx	[%o2 + %lo(wall_jiffies)], %o2
	ldx	[%o3 + %lo(jiffies)], %o3
	sub	%o3, %o2, %o2
	sethi	%hi(timer_ticks_per_usec_quotient), %o3
	add	%g3, %o1, %o1
	ldx	[%o3 + %lo(timer_ticks_per_usec_quotient)], %o3
	sub	%o1, %g7, %o1
	mulx	%o3, %o1, %o1
	brz,pt	%o2, 1f
	 srlx	%o1, 32, %o1
	sethi	%hi(10000), %g2
	or	%g2, %lo(10000), %g2
	add	%o1, %g2, %o1
1:	sethi	%hi(1000000), %o2
	srlx	%o5, 32, %o5
	or	%o2, %lo(1000000), %o2
	add	%o5, %o1, %o5
	cmp	%o5, %o2
	bl,a,pn	%xcc, 1f
	 stx	%o4, [%o0 + 0x0]
	add	%o4, 0x1, %o4
	sub	%o5, %o2, %o5
	stx	%o4, [%o0 + 0x0]
1:	retl
	 st	%o5, [%o0 + 0x8]
/* cpu.c: Dinky routines to look for the kind of Sparc cpu
 *        we are on.
 *
 * Copyright (C) 1996 David S. Miller (davem@caip.rutgers.edu)
 */

#include <linux/config.h>
#include <linux/kernel.h>
#include <linux/init.h>
#include <linux/sched.h>
#include <linux/smp.h>
#include <asm/asi.h>
#include <asm/system.h>
#include <asm/fpumacro.h>

struct cpu_iu_info {
  short manuf;
  short impl;
  char* cpu_name;   /* should be enough I hope... */
};

struct cpu_fp_info {
  short manuf;
  short impl;
  char fpu_vers;
  char* fp_name;
};

/* In order to get the fpu type correct, you need to take the IDPROM's
 * machine type value into consideration too.  I will fix this.
 */
struct cpu_fp_info linux_sparc_fpu[] = {
  { 0x17, 0x10, 0, "UltraSparc I integrated FPU"},
  { 0x22, 0x10, 0, "UltraSparc II integrated FPU"},
  { 0x17, 0x11, 0, "UltraSparc II integrated FPU"},
  { 0x17, 0x12, 0, "UltraSparc IIi integrated FPU"},
  { 0x17, 0x13, 0, "UltraSparc IIe integrated FPU"},
  { 0x3e, 0x14, 0, "UltraSparc III integrated FPU"},
};

#define NSPARCFPU  (sizeof(linux_sparc_fpu)/sizeof(struct cpu_fp_info))

struct cpu_iu_info linux_sparc_chips[] = {
  { 0x17, 0x10, "TI UltraSparc I   (SpitFire)"},
  { 0x22, 0x10, "TI UltraSparc II  (BlackBird)"},
  { 0x17, 0x11, "TI UltraSparc II  (BlackBird)"},
  { 0x17, 0x12, "TI UltraSparc IIi"},
  { 0x17, 0x13, "TI UltraSparc IIe"},
  { 0x3e, 0x14, "TI UltraSparc III (Cheetah)"},
};

#define NSPARCCHIPS  (sizeof(linux_sparc_chips)/sizeof(struct cpu_iu_info))

#ifdef CONFIG_SMP
char *sparc_cpu_type[64] = { "cpu-oops", "cpu-oops1", "cpu-oops2", "cpu-oops3" };
char *sparc_fpu_type[64] = { "fpu-oops", "fpu-oops1", "fpu-oops2", "fpu-oops3" };
#else
char *sparc_cpu_type[64] = { "cpu-oops", };
char *sparc_fpu_type[64] = { "fpu-oops", };
#endif

unsigned int fsr_storage;

void __init cpu_probe(void)
{
	int manuf, impl;
	unsigned i, cpuid;
	long ver, fpu_vers;
	long fprs;
	
	cpuid = hard_smp_processor_id();

	fprs = fprs_read ();
	fprs_write (FPRS_FEF);
	__asm__ __volatile__ ("rdpr %%ver, %0; stx %%fsr, [%1]" : "=&r" (ver) : "r" (&fpu_vers));
	fprs_write (fprs);
	
	manuf = ((ver >> 48)&0xffff);
	impl = ((ver >> 32)&0xffff);

	fpu_vers = ((fpu_vers>>17)&0x7);

	for(i = 0; i<NSPARCCHIPS; i++) {
		if(linux_sparc_chips[i].manuf == manuf)
			if(linux_sparc_chips[i].impl == impl) {
				sparc_cpu_type[cpuid] = linux_sparc_chips[i].cpu_name;
				break;
			}
	}

	if(i==NSPARCCHIPS) {
		printk("DEBUG: manuf = 0x%x   impl = 0x%x\n", manuf, 
			    impl);
		sparc_cpu_type[cpuid] = "Unknown CPU";
	}

	for(i = 0; i<NSPARCFPU; i++) {
		if(linux_sparc_fpu[i].manuf == manuf && linux_sparc_fpu[i].impl == impl)
			if(linux_sparc_fpu[i].fpu_vers == fpu_vers) {
				sparc_fpu_type[cpuid] = linux_sparc_fpu[i].fp_name;
				break;
			}
	}

	if(i == NSPARCFPU) {
		printk("DEBUG: manuf = 0x%x  impl = 0x%x fsr.vers = 0x%x\n", manuf, impl,
			    (unsigned)fpu_vers);
		sparc_fpu_type[cpuid] = "Unknown FPU";
	}
}
/* devices.c: Initial scan of the prom device tree for important
 *            Sparc device nodes which we need to find.
 *
 * Copyright (C) 1996 David S. Miller (davem@caip.rutgers.edu)
 */

#include <linux/config.h>
#include <linux/kernel.h>
#include <linux/threads.h>
#include <linux/init.h>
#include <linux/ioport.h>
#include <linux/string.h>

#include <asm/page.h>
#include <asm/oplib.h>
#include <asm/system.h>
#include <asm/smp.h>
#include <asm/spitfire.h>

struct prom_cpuinfo linux_cpus[64] __initdata = { { 0 } };
unsigned prom_cpu_nodes[64];
int linux_num_cpus = 0;

extern void cpu_probe(void);
extern void central_probe(void);

void __init device_scan(void)
{
	char node_str[128];
	int nd, prom_node_cpu, thismid;
	int cpu_nds[64];  /* One node for each cpu */
	int cpu_ctr = 0;

	/* FIX ME FAST... -DaveM */
	ioport_resource.end = 0xffffffffffffffffUL;
	iomem_resource.end = 0xffffffffffffffffUL;

	prom_getstring(prom_root_node, "device_type", node_str, sizeof(node_str));

	prom_printf("Booting Linux...\n");
	if(strcmp(node_str, "cpu") == 0) {
		cpu_nds[0] = prom_root_node;
		linux_cpus[0].prom_node = prom_root_node;
		linux_cpus[0].mid = 0;
		cpu_ctr++;
	} else {
		int scan;
		scan = prom_getchild(prom_root_node);
		/* prom_printf("root child is %08x\n", (unsigned) scan); */
		nd = 0;
		while((scan = prom_getsibling(scan)) != 0) {
			prom_getstring(scan, "device_type", node_str, sizeof(node_str));
			if(strcmp(node_str, "cpu") == 0) {
				cpu_nds[cpu_ctr] = scan;
				linux_cpus[cpu_ctr].prom_node = scan;
				thismid = 0;
				if (tlb_type == spitfire) {
					prom_getproperty(scan, "upa-portid",
							 (char *) &thismid, sizeof(thismid));
				} else if (tlb_type == cheetah) {
					prom_getproperty(scan, "portid",
							 (char *) &thismid, sizeof(thismid));
				}
				linux_cpus[cpu_ctr].mid = thismid;
				printk("Found CPU %d (node=%08x,mid=%d)\n",
				       cpu_ctr, (unsigned) scan, thismid);
				cpu_ctr++;
			}
		};
		if(cpu_ctr == 0) {
			prom_printf("No CPU nodes found, cannot continue.\n");
			prom_halt();
		}
		printk("Found %d CPU prom device tree node(s).\n", cpu_ctr);
	}
	prom_node_cpu = cpu_nds[0];

	linux_num_cpus = cpu_ctr;
	
	prom_cpu_nodes[0] = prom_node_cpu;

#ifndef CONFIG_SMP
	{
		extern unsigned long up_clock_tick;
		up_clock_tick = prom_getintdefault(prom_node_cpu,
						   "clock-frequency",
						   0);
	}
#endif

	central_probe();

	cpu_probe();
}
#include <linux/mm.h>
#include <linux/sched.h>

#include <asm/pgtable.h>
#include <asm/uaccess.h>
#include <asm/processor.h>

static struct fs_struct init_fs = INIT_FS;
static struct files_struct init_files = INIT_FILES;
static struct signal_struct init_signals = INIT_SIGNALS;
struct mm_struct init_mm = INIT_MM(init_mm);

/* .text section in head.S is aligned at 2 page boundry and this gets linked
 * right after that so that the init_task_union is aligned properly as well.
 * We really don't need this special alignment like the Intel does, but
 * I do it anyways for completeness.
 */
__asm__ (".text");
union task_union init_task_union = { INIT_TASK(init_task_union.task) };

/*
 * This is to make the init_task+stack of the right size for >8k pagesize.
 * The definition of task_union in sched.h makes it 16k wide.
 */
#if PAGE_SHIFT != 13
char init_task_stack[THREAD_SIZE - INIT_TASK_SIZE] = { 0 };
#endif
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ENTAL == 1 || $CONFIG_EXPERIMENTAL == 2 || $CONFIG_EXPERIMENTAL == 4)} then {write_tristate $cfg $autocfg CONFIG_PLX_HERMES $CONFIG_PLX_HERMES [list $CONFIG_HERMES $CONFIG_EXPERIMENTAL] 2 }
	if {($CONFIG_NET == 1) && ($CONFIG_NETDEVICES == 1) && ($CONFIG_NET_RADIO == 1) && ($CONFIG_PCMCIA != 0)} then {write_comment $cfg $autocfg "Wireless Pcmcia cards support"}
	global CONFIG_PCMCIA_HERMES
	if {($CONFIG_NET == 1) && ($CONFIG_NETDEVICES == 1) && ($CONFIG_NET_RADIO == 1) && ($CONFIG_PCMCIA != 0) && ($CONFIG_HERMES == 1 || $CONFIG_HERMES == 2 || $CONFIG_HERMES == 4)} then {write_tristate $cfg $autocfg CONFIG_PCMCIA_HERMES $CONFIG_PCMCIA_HERMES [list $CONFIG_HERMES] 2 }
	global CONFIG_AIRO_CS
	if {($CONFIG_NET == 1) && ($CONFIG_NETDEVICES == 1) && ($CONFIG_NET_RADIO == 1) && ($CONFIG_PCMCIA != 0)} then {write_tristate $cfg $autocfg CONFIG_AIRO_CS $CONFIG_AIRO_CS [list $notmod] 2 }
	global CONFIG_NET_WIRELESS
	global CONFIG_ALL_PPC
	if {($CONFIG_NET == 1) && ($CONFIG_NETDEVICES == 1) && ($CONFIG_NET_RADIO == 1) && ($CONFIG_ISA == 1 || $CONFIG_PCI == 1 || $CONFIG_ALL_PPC == 1 || $CONFIG_PCMCIA != 0)} then {write_tristate $cfg $autocfg CONFIG_NET_WIRELESS $CONSTANT_Y [list $notmod] 2 }
	if {($CONFIG_NET == 1) && ($CONFIG_NETDEVICES == 1) && ($CONFIG_NET_RADIO == 1) && ($CONFIG_ISA != 1 && $CONFIG_PCI != 1 && $CONFIG_ALL_PPC != 1 && $CONFIG_PCMCIA == 0)} then {write_tristate $cfg $autocfg CONFIG_NET_WIRELESS $CONSTANT_N [list $notmod] 2 }
	if {($CONFIG_NET == 1) && ($CONFIG_NETDEVICES == 1)} then {write_comment $cfg $autocfg "Token Ring devices"}
	global CONFIG_TR
	if {($CONFIG_NET == 1) && ($CONFIG_NETDEVICES == 1) && ($CONFIG_PCI == 1 || $CONFIG_ISA == 1 || $CONFIG_MCA == 1)} then {write_tristate $cfg $autocfg CONFIG_TR $CONFIG_TR [list $notmod] 2 }
	if {($CONFIG_NET == 1) && ($CONFIG_NETDEVICES == 1) && ($CONFIG_PCI != 1 && $CONFIG_ISA != 1 && $CONFIG_MCA != 1)} then {write_tristate $cfg $autocfg CONFIG_TR $CONSTANT_N [list $notmod] 2 }
	global CONFIG_IBMTR
	if {($CONFIG_NET == 1) && ($CONFIG_NETDEVICES == 1) && ($CONFIG_TR != 0) && ($CONFIG_ISA == 1 || $CONFIG_MCA == 1)} then {write_tristate $cfg $autocfg CONFIG_IBMTR $CONFIG_IBMTR [list $notmod] 2 }
	global CONFIG_IBMOL
	if {($CONFIG_NET == 1) && ($CONFIG_NETDEVICES == 1) && ($CONFIG_TR != 0) && ($CONFIG_TR == 1 || $CONFIG_TR == 2 || $CONFIG_TR == 4) && ($CONFIG_PCI == 1 || $CONFIG_PCI == 2 || $CONFIG_PCI == 4)} then {write_tristate $cfg $autocfg CONFIG_IBMOL $CONFIG_IBMOL [list $CONFIG_TR $CONFIG_PCI] 2 }
	global CONFIG_IBMLS
	if {($CONFIG_NET == 1) && ($CONFIG_NETDEVICES == 1) && ($CONFIG_TR != 0) && ($CONFIG_TR == 1 || $CONFIG_TR == 2 || $CONFIG_TR == 4) && ($CONFIG_PCI == 1 || $CONFIG_PCI == 2 || $CONFIG_PCI == 4)} then {write_tristate $cfg $autocfg CONFIG_IBMLS $CONFIG_IBMLS [list $CONFIG_TR $CONFIG_PCI] 2 }
	global CONFIG_3C359
	if {($CONFIG_NET == 1) && ($CONFIG_NETDEVICES == 1) && ($CONFIG_TR != 0) && ($CONFIG_TR == 1 || $CONFIG_TR == 2 || $CONFIG_TR == 4) && ($CONFIG_PCI == 1 || $CONFIG_PCI == 2 || $CONFIG_PCI == 4)} then {write_tristate $cfg $autocfg CONFIG_3C359 $CONFIG_3C359 [list $CONFIG_TR $CONFIG_PCI] 2 }
	global CONFIG_TMS380TR
	if {($CONFIG_NET == 1) && ($CONFIG_NETDEVICES == 1) && ($CONFIG_TR != 0)} then {write_tristate $cfg $autocfg CONFIG_TMS380TR $CONFIG_TMS380TR [list $notmod] 2 }
	global CONFIG_TMSPCI
	if {($CONFIG_NET == 1) && ($CONFIG_NETDEVICES == 1) && ($CONFIG_TR != 0) && ($CONFIG_TMS380TR != 0) && ($CONFIG_PCI == 1 || $CONFIG_PCI == 2 || $CONFIG_PCI == 4)} then {write_tristate $cfg $autocfg CONFIG_TMSPCI $CONFIG_TMSPCI [list $CONFIG_PCI] 2 }
	global CONFIG_TMSISA
	if {($CONFIG_NET == 1) && ($CONFIG_NETDEVICES == 1) && ($CONFIG_TR != 0) && ($CONFIG_TMS380TR != 0) && ($CONFIG_ISA == 1 || $CONFIG_ISA == 2 || $CONFIG_ISA == 4)} then {write_tristate $cfg $autocfg CONFIG_TMSISA $CONFIG_TMSISA [list $CONFIG_ISA] 2 }
	global CONFIG_ABYSS
	if {($CONFIG_NET == 1) && ($CONFIG_NETDEVICES == 1) && ($CONFIG_TR != 0) && ($CONFIG_TMS380TR != 0) && ($CONFIG_PCI == 1 || $CONFIG_PCI == 2 || $CONFIG_PCI == 4)} then {write_tristate $cfg $autocfg CONFIG_ABYSS $CONFIG_ABYSS [list $CONFIG_PCI] 2 }
	global CONFIG_MADGEMC
	if {($CONFIG_NET == 1) && ($CONFIG_NETDEVICES == 1) && ($CONFIG_TR != 0) && ($CONFIG_TMS380TR != 0) && ($CONFIG_MCA == 1 || $CONFIG_MCA == 2 || $CONFIG_MCA == 4)} then {write_tristate $cfg $autocfg CONFIG_MADGEMC $CONFIG_MADGEMC [list $CONFIG_MCA] 2 }
	global CONFIG_SMCTR
	if {($CONFIG_NET == 1) && ($CONFIG_NETDEVICES == 1) && ($CONFIG_TR != 0) && ($CONFIG_ISA == 1 || $CONFIG_MCA == 1)} then {write_tristate $cfg $autocfg CONFIG_SMCTR $CONFIG_SMCTR [list $notmod] 2 }
	if {($CONFIG_NET == 1) && ($CONFIG_NETDEVICES == 1)} then {write_tristate $cfg $autocfg CONFIG_NET_FC $CONFIG_NET_FC [list $notmod] 2 }
	global CONFIG_IPHASE5526
	if {($CONFIG_NET == 1) && ($CONFIG_NETDEVICES == 1) && ($CONFIG_NET_FC == 1) && ($CONFIG_SCSI == 1 || $CONFIG_SCSI == 2 || $CONFIG_SCSI == 4) && ($CONFIG_PCI == 1 || $CONFIG_PCI == 2 || $CONFIG_PCI == 4)} then {write_tristate $cfg $autocfg CONFIG_IPHASE5526 $CONFIG_IPHASE5526 [list $CONFIG_SCSI $CONFIG_PCI] 2 }
	global CONFIG_RCPCI
	if {($CONFIG_NET == 1) && ($CONFIG_NETDEVICES == 1) && ($CONFIG_EXPERIMENTAL == 1) && ($CONFIG_PCI == 1 || $CONFIG_PCI == 2 || $CONFIG_PCI == 4)} then {write_tristate $cfg $autocfg CONFIG_RCPCI $CONFIG_RCPCI [list $CONFIG_PCI] 2 }
	global CONFIG_SHAPER
	if {($CONFIG_NET == 1) && ($CONFIG_NETDEVICES == 1) && ($CONFIG_EXPERIMENTAL == 1)} then {write_tristate $cfg $autocfg CONFIG_SHAPER $CONFIG_SHAPER [list $notmod] 2 }
	if {($CONFIG_NET == 1) && ($CONFIG_NETDEVICES == 1)} then {write_comment $cfg $autocfg "Wan interfaces"}
	global CONFIG_WAN
	if {($CONFIG_NET == 1) && ($CONFIG_NETDEVICES == 1)} then {write_tristate $cfg $autocfg CONFIG_WAN $CONFIG_WAN [list $notmod] 2 }
	global CONFIG_HOSTESS_SV11
	if {($CONFIG_NET == 1) && ($CONFIG_NETDEVICES == 1) && ($CONFIG_WAN == 1)} then {write_tristate $cfg $autocfg CONFIG_HOSTESS_SV11 $CONFIG_HOSTESS_SV11 [list $CONSTANT_M] 2 }
	global CONFIG_COSA
	if {($CONFIG_NET == 1) && ($CONFIG_NETDEVICES == 1) && ($CONFIG_WAN == 1)} then {write_tristate $cfg $autocfg CONFIG_COSA $CONFIG_COSA [list $CONSTANT_M] 2 }
	global CONFIG_COMX
	if {($CONFIG_NET == 1) && ($CONFIG_NETDEVICES == 1) && ($CONFIG_WAN == 1)} then {write_tristate $cfg $autocfg CONFIG_COMX $CONFIG_COMX [list $notmod] 2 }
	global CONFIG_COMX_HW_COMX
	if {($CONFIG_NET == 1) && ($CONFIG_NETDEVICES == 1) && ($CONFIG_WAN == 1) && ($CONFIG_COMX != 0) && ($CONFIG_COMX == 1 || $CONFIG_COMX == 2 || $CONFIG_COMX == 4)} then {write_tristate $cfg $autocfg CONFIG_COMX_HW_COMX $CONFIG_COMX_HW_COMX [list $CONFIG_COMX] 2 }
	global CONFIG_COMX_HW_LOCOMX
	if {($CONFIG_NET == 1) && ($CONFIG_NETDEVICES == 1) && ($CONFIG_WAN == 1) && ($CONFIG_COMX != 0) && ($CONFIG_COMX == 1 || $CONFIG_COMX == 2 || $CONFIG_COMX == 4)} then {write_tristate $cfg $autocfg CONFIG_COMX_HW_LOCOMX $CONFIG_COMX_HW_LOCOMX [list $CONFIG_COMX] 2 }
	global CONFIG_COMX_HW_MIXCOM
	if {($CONFIG_NET == 1) && ($CONFIG_NETDEVICES == 1) && ($CONFIG_WAN == 1) && ($CONFIG_COMX != 0) && ($CONFIG_COMX == 1 || $CONFIG_COMX == 2 || $CONFIG_COMX == 4)} then {write_tristate $cfg $autocfg CONFIG_COMX_HW_MIXCOM $CONFIG_COMX_HW_MIXCOM [list $CONFIG_COMX] 2 }
	global CONFIG_COMX_HW_MUNICH
	if {($CONFIG_NET == 1) && ($CONFIG_NETDEVICES == 1) && ($CONFIG_WAN == 1) && ($CONFIG_COMX != 0) && ($CONFIG_COMX == 1 || $CONFIG_COMX == 2 || $CONFIG_COMX == 4)} then {write_tristate $cfg $autocfg CONFIG_COMX_HW_MUNICH $CONFIG_COMX_HW_MUNICH [list $CONFIG_COMX] 2 }
	global CONFIG_COMX_PROTO_PPP
	if {($CONFIG_NET == 1) && ($CONFIG_NETDEVICES == 1) && ($CONFIG_WAN == 1) && ($CONFIG_COMX != 0) && ($CONFIG_COMX == 1 || $CONFIG_COMX == 2 || $CONFIG_COMX == 4)} then {write_tristate $cfg $autocfg CONFIG_COMX_PROTO_PPP $CONFIG_COMX_PROTO_PPP [list $CONFIG_COMX] 2 }
	global CONFIG_COMX_PROTO_LAPB
	if {($CONFIG_NET == 1) && ($CONFIG_NETDEVICES == 1) && ($CONFIG_WAN == 1) && ($CONFIG_COMX != 0) && ($CONFIG_LAPB == 1) && ($CONFIG_COMX == 1 || $CONFIG_COMX == 2 || $CONFIG_COMX == 4)} then {write_tristate $cfg $autocfg CONFIG_COMX_PROTO_LAPB $CONFIG_COMX_PROTO_LAPB [list $CONFIG_COMX] 2 }
	if {($CONFIG_NET == 1) && ($CONFIG_NETDEVICES == 1) && ($CONFIG_WAN == 1) && ($CONFIG_COMX != 0) && ($CONFIG_LAPB == 2) && ($CONFIG_LAPB == 1 || $CONFIG_LAPB == 2 || $CONFIG_LAPB == 4)} then {write_tristate $cfg $autocfg CONFIG_COMX_PROTO_LAPB $CONFIG_COMX_PROTO_LAPB [list $CONFIG_LAPB] 2 }
	global CONFIG_COMX_PROTO_FR
	if {($CONFIG_NET == 1) && ($CONFIG_NETDEVICES == 1) && ($CONFIG_WAN == 1) && ($CONFIG_COMX != 0) && ($CONFIG_COMX == 1 || $CONFIG_COMX == 2 || $CONFIG_COMX == 4)} then {write_tristate $cfg $autocfg CONFIG_COMX_PROTO_FR $CONFIG_COMX_PROTO_FR [list $CONFIG_COMX] 2 }
	global CONFIG_DSCC4
	if {($CONFIG_NET == 1) && ($CONFIG_NETDEVICES == 1) && ($CONFIG_WAN == 1)} then {write_tristate $cfg $autocfg CONFIG_DSCC4 $CONFIG_DSCC4 [list $CONSTANT_M] 2 }
	global CONFIG_FARSYNC
	if {($CONFIG_NET == 1) && ($CONFIG_NETDEVICES == 1) && ($CONFIG_WAN == 1)} then {write_tristate $cfg $autocfg CONFIG_FARSYNC $CONFIG_FARSYNC [list $notmod] 2 }
	global CONFIG_LANMEDIA
	if {($CONFIG_NET == 1) && ($CONFIG_NETDEVICES == 1) && ($CONFIG_WAN == 1)} then {write_tristate $cfg $autocfg CONFIG_LANMEDIA $CONFIG_LANMEDIA [list $notmod] 2 }
	global CONFIG_ATI_XX20
	if {($CONFIG_NET == 1) && ($CONFIG_NETDEVICES == 1) && ($CONFIG_WAN == 1)} then {write_tristate $cfg $autocfg CONFIG_ATI_XX20 $CONFIG_ATI_XX20 [list $notmod] 2 }
	global CONFIG_SEALEVEL_4021
	if {($CONFIG_NET == 1) && ($CONFIG_NETDEVICES == 1) && ($CONFIG_WAN == 1)} then {write_tristate $cfg $autocfg CONFIG_SEALEVEL_4021 $CONFIG_SEALEVEL_4021 [list $CONSTANT_M] 2 }
	global CONFIG_SYNCLINK_SYNCPPP
	if {($CONFIG_NET == 1) && ($CONFIG_NETDEVICES == 1) && ($CONFIG_WAN == 1)} then {write_tristate $cfg $autocfg CONFIG_SYNCLINK_SYNCPPP $CONFIG_SYNCLINK_SYNCPPP [list $notmod] 2 }
	global CONFIG_HDLC
	if {($CONFIG_NET == 1) && ($CONFIG_NETDEVICES == 1) && ($CONFIG_WAN == 1)} then {write_tristate $cfg $autocfg CONFIG_HDLC $CONFIG_HDLC [list $notmod] 2 }
	global CONFIG_HDLC_PPP
	if {($CONFIG_NET == 1) && ($CONFIG_NETDEVICES == 1) && ($CONFIG_WAN == 1) && ($CONFIG_HDLC != 0)} then {write_tristate $cfg $autocfg CONFIG_HDLC_PPP $CONFIG_HDLC_PPP [list $notmod] 2 }
	global CONFIG_HDLC_X25
	if {($CONFIG_NET == 1) && ($CONFIG_NETDEVICES == 1) && ($CONFIG_WAN == 1) && ($CONFIG_HDLC != 0) && ($CONFIG_LAPB == 2 && $CONFIG_HDLC == 2 || $CONFIG_LAPB == 1)} then {write_tristate $cfg $autocfg CONFIG_HDLC_X25 $CONFIG_HDLC_X25 [list $notmod] 2 }
	if {($CONFIG_NET == 1) && ($CONFIG_NETDEVICES == 1) && ($CONFIG_WAN == 1) && ($CONFIG_HDLC != 0) && ($CONFIG_LAPB != 2 || $CONFIG_HDLC != 2 && $CONFIG_LAPB != 1)} then {write_comment $cfg $autocfg "    X.25/LAPB support is disabled"}
	global CONFIG_N2
	if {($CONFIG_NET == 1) && ($CONFIG_NETDEVICES == 1) && ($CONFIG_WAN == 1) && ($CONFIG_HDLC != 0) && ($CONFIG_HDLC == 1 || $CONFIG_HDLC == 2 || $CONFIG_HDLC == 4)} then {write_tristate $cfg $autocfg CONFIG_N2 $CONFIG_N2 [list $CONFIG_HDLC] 2 }
	global CONFIG_C101
	if {($CONFIG_NET == 1) && ($CONFIG_NETDEVICES == 1) && ($CONFIG_WAN == 1) && ($CONFIG_HDLC != 0) && ($CONFIG_HDLC == 1 || $CONFIG_HDLC == 2 || $CONFIG_HDLC == 4)} then {write_tristate $cfg $autocfg CONFIG_C101 $CONFIG_C101 [list $CONFIG_HDLC] 2 }
	global CONFIG_DLCI
	if {($CONFIG_NET == 1) && ($CONFIG_NETDEVICES == 1) && ($CONFIG_WAN == 1)} then {write_tristate $cfg $autocfg CONFIG_DLCI $CONFIG_DLCI [list $notmod] 2 }
	global CONFIG_DLCI_COUNT
	if {($CONFIG_NET == 1) && ($CONFIG_NETDEVICES == 1) && ($CONFIG_WAN == 1) && ($CONFIG_DLCI != 0)} then {write_int $cfg $autocfg CONFIG_DLCI_COUNT $CONFIG_DLCI_COUNT $notmod }
	global CONFIG_DLCI_MAX
	if {($CONFIG_NET == 1) && ($CONFIG_NETDEVICES == 1) && ($CONFIG_WAN == 1) && ($CONFIG_DLCI != 0)} then {write_int $cfg $autocfg CONFIG_DLCI_MAX $CONFIG_DLCI_MAX $notmod }
	global CONFIG_SDLA
	if {($CONFIG_NET == 1) && ($CONFIG_NETDEVICES == 1) && ($CONFIG_WAN == 1) && ($CONFIG_DLCI != 0) && ($CONFIG_DLCI == 1 || $CONFIG_DLCI == 2 || $CONFIG_DLCI == 4)} then {write_tristate $cfg $autocfg CONFIG_SDLA $CONFIG_SDLA [list $CONFIG_DLCI] 2 }
	global CONFIG_WAN_ROUTER_DRIVERS
	if {($CONFIG_NET == 1) && ($CONFIG_NETDEVICES == 1) && ($CONFIG_WAN == 1) && ($CONFIG_WAN_ROUTER != 0)} then {write_tristate $cfg $autocfg CONFIG_WAN_ROUTER_DRIVERS $CONFIG_WAN_ROUTER_DRIVERS [list $notmod] 2 }
	global CONFIG_VENDOR_SANGOMA
	if {($CONFIG_NET == 1) && ($CONFIG_NETDEVICES == 1) && ($CONFIG_WAN == 1) && ($CONFIG_WAN_ROUTER != 0) && ($CONFIG_WAN_ROUTER_DRIVERS == 1) && ($CONFIG_WAN_ROUTER == 1 || $CONFIG_WAN_ROUTER == 2 || $CONFIG_WAN_ROUTER == 4)} then {write_tristate $cfg $autocfg CONFIG_VENDOR_SANGOMA $CONFIG_VENDOR_SANGOMA [list $CONFIG_WAN_ROUTER] 2 }
	global CONFIG_WANPIPE_CHDLC
	if {($CONFIG_NET == 1) && ($CONFIG_NETDEVICES == 1) && ($CONFIG_WAN == 1) && ($CONFIG_WAN_ROUTER != 0) && ($CONFIG_WAN_ROUTER_DRIVERS == 1) && ($CONFIG_VENDOR_SANGOMA != 0)} then {write_tristate $cfg $autocfg CONFIG_WANPIPE_CHDLC $CONFIG_WANPIPE_CHDLC [list $notmod] 2 }
	global CONFIG_WANPIPE_FR
	if {($CONFIG_NET == 1) && ($CONFIG_NETDEVICES == 1) && ($CONFIG_WAN == 1) && ($CONFIG_WAN_ROUTER != 0) && ($CONFIG_WAN_ROUTER_DRIVERS == 1) && ($CONFIG_VENDOR_SANGOMA != 0)} then {write_tristate $cfg $autocfg CONFIG_WANPIPE_FR $CONFIG_WANPIPE_FR [list $notmod] 2 }
	global CONFIG_WANPIPE_X25
	if {($CONFIG_NET == 1) && ($CONFIG_NETDEVICES == 1) && ($CONFIG_WAN == 1) && ($CONFIG_WAN_ROUTER != 0) && ($CONFIG_WAN_ROUTER_DRIVERS == 1) && ($CONFIG_VENDOR_SANGOMA != 0)} then {write_tristate $cfg $autocfg CONFIG_WANPIPE_X25 $CONFIG_WANPIPE_X25 [list $notmod] 2 }
	global CONFIG_WANPIPE_PPP
	if {($CONFIG_NET == 1) && ($CONFIG_NETDEVICES == 1) && ($CONFIG_WAN == 1) && ($CONFIG_WAN_ROUTER != 0) && ($CONFIG_WAN_ROUTER_DRIVERS == 1) && ($CONFIG_VENDOR_SANGOMA != 0)} then {write_tristate $cfg $autocfg CONFIG_WANPIPE_PPP $CONFIG_WANPIPE_PPP [list $notmod] 2 }
	global CONFIG_WANPIPE_MULTPPP
	if {($CONFIG_NET == 1) && ($CONFIG_NETDEVICES == 1) && ($CONFIG_WAN == 1) && ($CONFIG_WAN_ROUTER != 0) && ($CONFIG_WAN_ROUTER_DRIVERS == 1) && ($CONFIG_VENDOR_SANGOMA != 0)} then {write_tristate $cfg $autocfg CONFIG_WANPIPE_MULTPPP $CONFIG_WANPIPE_MULTPPP [list $notmod] 2 }
	global CONFIG_CYCLADES_SYNC
	if {($CONFIG_NET == 1) && ($CONFIG_NETDEVICES == 1) && ($CONFIG_WAN == 1) && ($CONFIG_WAN_ROUTER != 0) && ($CONFIG_WAN_ROUTER_DRIVERS == 1) && ($CONFIG_EXPERIMENTAL == 1) && ($CONFIG_WAN_ROUTER_DRIVERS == 1 || $CONFIG_WAN_ROUTER_DRIVERS == 2 || $CONFIG_WAN_ROUTER_DRIVERS == 4)} then {write_tristate $cfg $autocfg CONFIG_CYCLADES_SYNC $CONFIG_CYCLADES_SYNC [list $CONFIG_WAN_ROUTER_DRIVERS] 2 }
	global CONFIG_CYCLOMX_X25
	if {($CONFIG_NET == 1) && ($CONFIG_NETDEVICES == 1) && ($CONFIG_WAN == 1) && ($CONFIG_WAN_ROUTER != 0) && ($CONFIG_WAN_ROUTER_DRIVERS == 1) && ($CONFIG_EXPERIMENTAL == 1) && ($CONFIG_CYCLADES_SYNC != 0)} then {write_tristate $cfg $autocfg CONFIG_CYCLOMX_X25 $CONFIG_CYCLOMX_X25 [list $notmod] 2 }
	global CONFIG_LAPBETHER
	if {($CONFIG_NET == 1) && ($CONFIG_NETDEVICES == 1) && ($CONFIG_WAN == 1) && ($CONFIG_EXPERIMENTAL == 1) && ($CONFIG_LAPB == 1 || $CONFIG_LAPB == 2 || $CONFIG_LAPB == 4) && ($CONFIG_X25 == 1 || $CONFIG_X25 == 2 || $CONFIG_X25 == 4)} then {write_tristate $cfg $autocfg CONFIG_LAPBETHER $CONFIG_LAPBETHER [list $CONFIG_LAPB $CONFIG_X25] 2 }
	global CONFIG_X25_ASY
	if {($CONFIG_NET == 1) && ($CONFIG_NETDEVICES == 1) && ($CONFIG_WAN == 1) && ($CONFIG_EXPERIMENTAL == 1) && ($CONFIG_LAPB == 1 || $CONFIG_LAPB == 2 || $CONFIG_LAPB == 4) && ($CONFIG_X25 == 1 || $CONFIG_X25 == 2 || $CONFIG_X25 == 4)} then {write_tristate $cfg $autocfg CONFIG_X25_ASY $CONFIG_X25_ASY [list $CONFIG_LAPB $CONFIG_X25] 2 }
	global CONFIG_SBNI
	if {($CONFIG_NET == 1) && ($CONFIG_NETDEVICES == 1) && ($CONFIG_WAN == 1) && ($CONFIG_X86 == 1)} then {write_tristate $cfg $autocfg CONFIG_SBNI $CONFIG_SBNI [list $notmod] 2 }
	global CONFIG_SBNI_MULTILINE
	if {($CONFIG_NET == 1) && ($CONFIG_NETDEVICES == 1) && ($CONFIG_WAN == 1) && ($CONFIG_X86 == 1) && ($CONFIG_SBNI != 0)} then {write_tristate $cfg $autocfg CONFIG_SBNI_MULTILINE $CONFIG_SBNI_MULTILINE [list $notmod] 2 }
	if {($CONFIG_NET == 1) && ($CONFIG_NETDEVICES == 1) && ($CONFIG_HOTPLUG == 1 && $CONFIG_PCMCIA != 0)} then {write_comment $cfg $autocfg "PCMCIA network device support"}
	global CONFIG_NET_PCMCIA
	if {($CONFIG_NET == 1) && ($CONFIG_NETDEVICES == 1) && ($CONFIG_HOTPLUG == 1 && $CONFIG_PCMCIA != 0)} then {write_tristate $cfg $autocfg CONFIG_NET_PCMCIA $CONFIG_NET_PCMCIA [list $notmod] 2 }
	global CONFIG_PCMCIA_3C589
	if {($CONFIG_NET == 1) && ($CONFIG_NETDEVICES == 1) && ($CONFIG_HOTPLUG == 1 && $CONFIG_PCMCIA != 0) && ($CONFIG_NET_PCMCIA == 1) && ($CONFIG_PCMCIA == 1 || $CONFIG_PCMCIA == 2 || $CONFIG_PCMCIA == 4)} then {write_tristate $cfg $autocfg CONFIG_PCMCIA_3C589 $CONFIG_PCMCIA_3C589 [list $CONFIG_PCMCIA] 2 }
	global CONFIG_PCMCIA_3C574
	if {($CONFIG_NET == 1) && ($CONFIG_NETDEVICES == 1) && ($CONFIG_HOTPLUG == 1 && $CONFIG_PCMCIA != 0) && ($CONFIG_NET_PCMCIA == 1) && ($CONFIG_PCMCIA == 1 || $CONFIG_PCMCIA == 2 || $CONFIG_PCMCIA == 4)} then {write_tristate $cfg $autocfg CONFIG_PCMCIA_3C574 $CONFIG_PCMCIA_3C574 [list $CONFIG_PCMCIA] 2 }
	global CONFIG_PCMCIA_FMVJ18X
	if {($CONFIG_NET == 1) && ($CONFIG_NETDEVICES == 1) && ($CONFIG_HOTPLUG == 1 && $CONFIG_PCMCIA != 0) && ($CONFIG_NET_PCMCIA == 1) && ($CONFIG_PCMCIA == 1 || $CONFIG_PCMCIA == 2 || $CONFIG_PCMCIA == 4)} then {write_tristate $cfg $autocfg CONFIG_PCMCIA_FMVJ18X $CONFIG_PCMCIA_FMVJ18X [list $CONFIG_PCMCIA] 2 }
	global CONFIG_PCMCIA_PCNET
	if {($CONFIG_NET == 1) && ($CONFIG_NETDEVICES == 1) && ($CONFIG_HOTPLUG == 1 && $CONFIG_PCMCIA != 0) && ($CONFIG_NET_PCMCIA == 1) && ($CONFIG_PCMCIA == 1 || $CONFIG_PCMCIA == 2 || $CONFIG_PCMCIA == 4)} then {write_tristate $cfg $autocfg CONFIG_PCMCIA_PCNET $CONFIG_PCMCIA_PCNET [list $CONFIG_PCMCIA] 2 }
	global CONFIG_PCMCIA_AXNET
	if {($CONFIG_NET == 1) && ($CONFIG_NETDEVICES == 1) && ($CONFIG_HOTPLUG == 1 && $CONFIG_PCMCIA != 0) && ($CONFIG_NET_PCMCIA == 1) && ($CONFIG_PCMCIA == 1 || $CONFIG_PCMCIA == 2 || $CONFIG_PCMCIA == 4)} then {write_tristate $cfg $autocfg CONFIG_PCMCIA_AXNET $CONFIG_PCMCIA_AXNET [list $CONFIG_PCMCIA] 2 }
	global CONFIG_PCMCIA_NMCLAN
	if {($CONFIG_NET == 1) && ($CONFIG_NETDEVICES == 1) && ($CONFIG_HOTPLUG == 1 && $CONFIG_PCMCIA != 0) && ($CONFIG_NET_PCMCIA == 1) && ($CONFIG_PCMCIA == 1 || $CONFIG_PCMCIA == 2 || $CONFIG_PCMCIA == 4)} then {write_tristate $cfg $autocfg CONFIG_PCMCIA_NMCLAN $CONFIG_PCMCIA_NMCLAN [list $CONFIG_PCMCIA] 2 }
	global CONFIG_PCMCIA_SMC91C92
	if {($CONFIG_NET == 1) && ($CONFIG_NETDEVICES == 1) && ($CONFIG_HOTPLUG == 1 && $CONFIG_PCMCIA != 0) && ($CONFIG_NET_PCMCIA == 1) && ($CONFIG_PCMCIA == 1 || $CONFIG_PCMCIA == 2 || $CONFIG_PCMCIA == 4)} then {write_tristate $cfg $autocfg CONFIG_PCMCIA_SMC91C92 $CONFIG_PCMCIA_SMC91C92 [list $CONFIG_PCMCIA] 2 }
	global CONFIG_PCMCIA_XIRC2PS
	if {($CONFIG_NET == 1) && ($CONFIG_NETDEVICES == 1) && ($CONFIG_HOTPLUG == 1 && $CONFIG_PCMCIA != 0) && ($CONFIG_NET_PCMCIA == 1) && ($CONFIG_PCMCIA == 1 || $CONFIG_PCMCIA == 2 || $CONFIG_PCMCIA == 4)} then {write_tristate $cfg $autocfg CONFIG_PCMCIA_XIRC2PS $CONFIG_PCMCIA_XIRC2PS [list $CONFIG_PCMCIA] 2 }
	global CONFIG_ARCNET_COM20020_CS
	if {($CONFIG_NET == 1) && ($CONFIG_NETDEVICES == 1) && ($CONFIG_HOTPLUG == 1 && $CONFIG_PCMCIA != 0) && ($CONFIG_NET_PCMCIA == 1) && ($CONFIG_ARCNET_COM20020 == 1 || $CONFIG_ARCNET_COM20020 == 2 || $CONFIG_ARCNET_COM20020 == 4) && ($CONFIG_ARCNET == 1 || $CONFIG_ARCNET == 2 || $CONFIG_ARCNET == 4) && ($CONFIG_PCMCIA == 1 || $CONFIG_PCMCIA == 2 || $CONFIG_PCMCIA == 4)} then {write_tristate $cfg $autocfg CONFIG_ARCNET_COM20020_CS $CONFIG_ARCNET_COM20020_CS [list $CONFIG_ARCNET_COM20020 $CONFIG_ARCNET $CONFIG_PCMCIA] 2 }
	global CONFIG_PCMCIA_IBMTR
	if {($CONFIG_NET == 1) && ($CONFIG_NETDEVICES == 1) && ($CONFIG_HOTPLUG == 1 && $CONFIG_PCMCIA != 0) && ($CONFIG_NET_PCMCIA == 1) && ($CONFIG_IBMTR != 1) && ($CONFIG_TR == 1 || $CONFIG_TR == 2 || $CONFIG_TR == 4) && ($CONFIG_PCMCIA == 1 || $CONFIG_PCMCIA == 2 || $CONFIG_PCMCIA == 4)} then {write_tristate $cfg $autocfg CONFIG_PCMCIA_IBMTR $CONFIG_PCMCIA_IBMTR [list $CONFIG_TR $CONFIG_PCMCIA] 2 }
	global CONFIG_PCMCIA_XIRCOM
	if {($CONFIG_NET == 1) && ($CONFIG_NETDEVICES == 1) && ($CONFIG_HOTPLUG == 1 && $CONFIG_PCMCIA != 0) && ($CONFIG_NET_PCMCIA == 1) && ($CONFIG_CARDBUS == 1)} then {write_tristate $cfg $autocfg CONFIG_PCMCIA_XIRCOM $CONFIG_PCMCIA_XIRCOM [list $notmod] 2 }
	global CONFIG_PCMCIA_XIRTULIP
	if {($CONFIG_NET == 1) && ($CONFIG_NETDEVICES == 1) && ($CONFIG_HOTPLUG == 1 && $CONFIG_PCMCIA != 0) && ($CONFIG_NET_PCMCIA == 1) && ($CONFIG_CARDBUS == 1)} then {write_tristate $cfg $autocfg CONFIG_PCMCIA_XIRTULIP $CONFIG_PCMCIA_XIRTULIP [list $notmod] 2 }
	global CONFIG_NET_PCMCIA_RADIO
	if {($CONFIG_NET == 1) && ($CONFIG_NETDEVICES == 1) && ($CONFIG_HOTPLUG == 1 && $CONFIG_PCMCIA != 0) && ($CONFIG_NET_PCMCIA == 1)} then {write_tristate $cfg $autocfg CONFIG_NET_PCMCIA_RADIO $CONFIG_NET_PCMCIA_RADIO [list $notmod] 2 }
	global CONFIG_PCMCIA_RAYCS
	if {($CONFIG_NET == 1) && ($CONFIG_NETDEVICES == 1) && ($CONFIG_HOTPLUG == 1 && $CONFIG_PCMCIA != 0) && ($CONFIG_NET_PCMCIA == 1) && ($CONFIG_NET_PCMCIA_RADIO == 1) && ($CONFIG_PCMCIA == 1 || $CONFIG_PCMCIA == 2 || $CONFIG_PCMCIA == 4)} then {write_tristate $cfg $autocfg CONFIG_PCMCIA_RAYCS $CONFIG_PCMCIA_RAYCS [list $CONFIG_PCMCIA] 2 }
	global CONFIG_PCMCIA_NETWAVE
	if {($CONFIG_NET == 1) && ($CONFIG_NETDEVICES == 1) && ($CONFIG_HOTPLUG == 1 && $CONFIG_PCMCIA != 0) && ($CONFIG_NET_PCMCIA == 1) && ($CONFIG_NET_PCMCIA_RADIO == 1) && ($CONFIG_PCMCIA == 1 || $CONFIG_PCMCIA == 2 || $CONFIG_PCMCIA == 4)} then {write_tristate $cfg $autocfg CONFIG_PCMCIA_NETWAVE $CONFIG_PCMCIA_NETWAVE [list $CONFIG_PCMCIA] 2 }
	global CONFIG_PCMCIA_WAVELAN
	if {($CONFIG_NET == 1) && ($CONFIG_NETDEVICES == 1) && ($CONFIG_HOTPLUG == 1 && $CONFIG_PCMCIA != 0) && ($CONFIG_NET_PCMCIA == 1) && ($CONFIG_NET_PCMCIA_RADIO == 1) && ($CONFIG_PCMCIA == 1 || $CONFIG_PCMCIA == 2 || $CONFIG_PCMCIA == 4)} then {write_tristate $cfg $autocfg CONFIG_PCMCIA_WAVELAN $CONFIG_PCMCIA_WAVELAN [list $CONFIG_PCMCIA] 2 }
	global CONFIG_AIRONET4500_CS
	if {($CONFIG_NET == 1) && ($CONFIG_NETDEVICES == 1) && ($CONFIG_HOTPLUG == 1 && $CONFIG_PCMCIA != 0) && ($CONFIG_NET_PCMCIA == 1) && ($CONFIG_NET_PCMCIA_RADIO == 1) && ($CONFIG_AIRONET4500 == 1 || $CONFIG_AIRONET4500 == 2 || $CONFIG_AIRONET4500 == 4) && ($CONFIG_PCMCIA == 1 || $CONFIG_PCMCIA == 2 || $CONFIG_PCMCIA == 4)} then {write_tristate $cfg $autocfg CONFIG_AIRONET4500_CS $CONFIG_AIRONET4500_CS [list $CONFIG_AIRONET4500 $CONFIG_PCMCIA] 2 }
	if {($CONFIG_NET == 1) && ($CONFIG_NETDEVICES == 1) && ($CONFIG_ATM == 1)} then {write_comment $cfg $autocfg "ATM drivers"}
	global CONFIG_ATM_TCP
	if {($CONFIG_NET == 1) && ($CONFIG_NETDEVICES == 1) && ($CONFIG_ATM == 1) && ($CONFIG_INET == 1)} then {write_tristate $cfg $autocfg CONFIG_ATM_TCP $CONFIG_ATM_TCP [list $notmod] 2 }
	global CONFIG_ATM_LANAI
	if {($CONFIG_NET == 1) && ($CONFIG_NETDEVICES == 1) && ($CONFIG_ATM == 1) && ($CONFIG_PCI == 1)} then {write_tristate $cfg $autocfg CONFIG_ATM_LANAI $CONFIG_ATM_LANAI [list $notmod] 2 }
	global CONFIG_ATM_ENI
	if {($CONFIG_NET == 1) && ($CONFIG_NETDEVICES == 1) && ($CONFIG_ATM == 1) && ($CONFIG_PCI == 1)} then {write_tristate $cfg $autocfg CONFIG_ATM_ENI $CONFIG_ATM_ENI [list $notmod] 2 }
	global CONFIG_ATM_ENI_DEBUG
	if {($CONFIG_NET == 1) && ($CONFIG_NETDEVICES == 1) && ($CONFIG_ATM == 1) && ($CONFIG_PCI == 1) && ($CONFIG_ATM_ENI != 0)} then {write_tristate $cfg $autocfg CONFIG_ATM_ENI_DEBUG $CONFIG_ATM_ENI_DEBUG [list $notmod] 2 }
	global CONFIG_ATM_ENI_TUNE_BURST
	if {($CONFIG_NET == 1) && ($CONFIG_NETDEVICES == 1) && ($CONFIG_ATM == 1) && ($CONFIG_PCI == 1) && ($CONFIG_ATM_ENI != 0)} then {write_tristate $cfg $autocfg CONFIG_ATM_ENI_TUNE_BURST $CONFIG_ATM_ENI_TUNE_BURST [list $notmod] 2 }
	global CONFIG_ATM_ENI_BURST_TX_16W
	if {($CONFIG_NET == 1) && ($CONFIG_NETDEVICES == 1) && ($CONFIG_ATM == 1) && ($CONFIG_PCI == 1) && ($CONFIG_ATM_ENI != 0) && ($CONFIG_ATM_ENI_TUNE_BURST == 1)} then {write_tristate $cfg $autocfg CONFIG_ATM_ENI_BURST_TX_16W $CONFIG_ATM_ENI_BURST_TX_16W [list $notmod] 2 }
	global CONFIG_ATM_ENI_BURST_TX_8W
	if {($CONFIG_NET == 1) && ($CONFIG_NETDEVICES == 1) && ($CONFIG_ATM == 1) && ($CONFIG_PCI == 1) && ($CONFIG_ATM_ENI != 0) && ($CONFIG_ATM_ENI_TUNE_BURST == 1)} then {write_tristate $cfg $autocfg CONFIG_ATM_ENI_BURST_TX_8W $CONFIG_ATM_ENI_BURST_TX_8W [list $notmod] 2 }
	global CONFIG_ATM_ENI_BURST_TX_4W
	if {($CONFIG_NET == 1) && ($CONFIG_NETDEVICES == 1) && ($CONFIG_ATM == 1) && ($CONFIG_PCI == 1) && ($CONFIG_ATM_ENI != 0) && ($CONFIG_ATM_ENI_TUNE_BURST == 1)} then {write_tristate $cfg $autocfg CONFIG_ATM_ENI_BURST_TX_4W $CONFIG_ATM_ENI_BURST_TX_4W [list $notmod] 2 }
	global CONFIG_ATM_ENI_BURST_TX_2W
	if {($CONFIG_NET == 1) && ($CONFIG_NETDEVICES == 1) && ($CONFIG_ATM == 1) && ($CONFIG_PCI == 1) && ($CONFIG_ATM_ENI != 0) && ($CONFIG_ATM_ENI_TUNE_BURST == 1)} then {write_tristate $cfg $autocfg CONFIG_ATM_ENI_BURST_TX_2W $CONFIG_ATM_ENI_BURST_TX_2W [list $notmod] 2 }
	global CONFIG_ATM_ENI_BURST_RX_16W
	if {($CONFIG_NET == 1) && ($CONFIG_NETDEVICES == 1) && ($CONFIG_ATM == 1) && ($CONFIG_PCI == 1) && ($CONFIG_ATM_ENI != 0) && ($CONFIG_ATM_ENI_TUNE_BURST == 1)} then {write_tristate $cfg $autocfg CONFIG_ATM_ENI_BURST_RX_16W $CONFIG_ATM_ENI_BURST_RX_16W [list $notmod] 2 }
	global CONFIG_ATM_ENI_BURST_RX_8W
	if {($CONFIG_NET == 1) && ($CONFIG_NETDEVICES == 1) && ($CONFIG_ATM == 1) && ($CONFIG_PCI == 1) && ($CONFIG_ATM_ENI != 0) && ($CONFIG_ATM_ENI_TUNE_BURST == 1)} then {write_tristate $cfg $autocfg CONFIG_ATM_ENI_BURST_RX_8W $CONFIG_ATM_ENI_BURST_RX_8W [list $notmod] 2 }
	global CONFIG_ATM_ENI_BURST_RX_4W
	if {($CONFIG_NET == 1) && ($CONFIG_NETDEVICES == 1) && ($CONFIG_ATM == 1) && ($CONFIG_PCI == 1) && ($CONFIG_ATM_ENI != 0) && ($CONFIG_ATM_ENI_TUNE_BURST == 1)} then {write_tristate $cfg $autocfg CONFIG_ATM_ENI_BURST_RX_4W $CONFIG_ATM_ENI_BURST_RX_4W [list $notmod] 2 }
	global CONFIG_ATM_ENI_BURST_RX_2W
	if {($CONFIG_NET == 1) && ($CONFIG_NETDEVICES == 1) && ($CONFIG_ATM == 1) && ($CONFIG_PCI == 1) && ($CONFIG_ATM_ENI != 0) && ($CONFIG_ATM_ENI_TUNE_BURST == 1)} then {write_tristate $cfg $autocfg CONFIG_ATM_ENI_BURST_RX_2W $CONFIG_ATM_ENI_BURST_RX_2W [list $notmod] 2 }
	global CONFIG_ATM_FIRESTREAM
	if {($CONFIG_NET == 1) && ($CONFIG_NETDEVICES == 1) && ($CONFIG_ATM == 1) && ($CONFIG_PCI == 1)} then {write_tristate $cfg $autocfg CONFIG_ATM_FIRESTREAM $CONFIG_ATM_FIRESTREAM [list $notmod] 2 }
	global CONFIG_ATM_ZATM
	if {($CONFIG_NET == 1) && ($CONFIG_NETDEVICES == 1) && ($CONFIG_ATM == 1) && ($CONFIG_PCI == 1)} then {write_tristate $cfg $autocfg CONFIG_ATM_ZATM $CONFIG_ATM_ZATM [list $notmod] 2 }
	global CONFIG_ATM_ZATM_DEBUG
	if {($CONFIG_NET == 1) && ($CONFIG_NETDEVICES == 1) && ($CONFIG_ATM == 1) && ($CONFIG_PCI == 1) && ($CONFIG_ATM_ZATM != 0)} then {write_tristate $cfg $autocfg CONFIG_ATM_ZATM_DEBUG $CONFIG_ATM_ZATM_DEBUG [list $notmod] 2 }
	global CONFIG_ATM_ZATM_EXACT_TS
	if {($CONFIG_NET == 1) && ($CONFIG_NETDEVICES == 1) && ($CONFIG_ATM == 1) && ($CONFIG_PCI == 1) && ($CONFIG_ATM_ZATM != 0) && ($CONFIG_X86 == 1)} then {write_tristate $cfg $autocfg CONFIG_ATM_ZATM_EXACT_TS $CONFIG_ATM_ZATM_EXACT_TS [list $notmod] 2 }
	global CONFIG_ATM_NICSTAR
	if {($CONFIG_NET == 1) && ($CONFIG_NETDEVICES == 1) && ($CONFIG_ATM == 1) && ($CONFIG_PCI == 1)} then {write_tristate $cfg $autocfg CONFIG_ATM_NICSTAR $CONFIG_ATM_NICSTAR [list $notmod] 2 }
	global CONFIG_ATM_NICSTAR_USE_SUNI
	if {($CONFIG_NET == 1) && ($CONFIG_NETDEVICES == 1) && ($CONFIG_ATM == 1) && ($CONFIG_PCI == 1) && ($CONFIG_ATM_NICSTAR != 0)} then {write_tristate $cfg $autocfg CONFIG_ATM_NICSTAR_USE_SUNI $CONFIG_ATM_NICSTAR_USE_SUNI [list $notmod] 2 }
	global CONFIG_ATM_NICSTAR_USE_IDT77105
	if {($CONFIG_NET == 1) && ($CONFIG_NETDEVICES == 1) && ($CONFIG_ATM == 1) && ($CONFIG_PCI == 1) && ($CONFIG_ATM_NICSTAR != 0)} then {write_tristate $cfg $autocfg CONFIG_ATM_NICSTAR_USE_IDT77105 $CONFIG_ATM_NICSTAR_USE_IDT77105 [list $notmod] 2 }
	global CONFIG_ATM_IDT77252
	if {($CONFIG_NET == 1) && ($CONFIG_NETDEVICES == 1) && ($CONFIG_ATM == 1) && ($CONFIG_PCI == 1)} then {write_tristate $cfg $autocfg CONFIG_ATM_IDT77252 $CONFIG_ATM_IDT77252 [list $notmod] 2 }
	global CONFIG_ATM_IDT77252_DEBUG
	if {($CONFIG_NET == 1) && ($CONFIG_NETDEVICES == 1) && ($CONFIG_ATM == 1) && ($CONFIG_PCI == 1) && ($CONFIG_ATM_IDT77252 != 0)} then {write_tristate $cfg $autocfg CONFIG_ATM_IDT77252_DEBUG $CONFIG_ATM_IDT77252_DEBUG [list $notmod] 2 }
	global CONFIG_ATM_IDT77252_RCV_ALL
	if {($CONFIG_NET == 1) && ($CONFIG_NETDEVICES == 1) && ($CONFIG_ATM == 1) && ($CONFIG_PCI == 1) && ($CONFIG_ATM_IDT77252 != 0)} then {write_tristate $cfg $autocfg CONFIG_ATM_IDT77252_RCV_ALL $CONFIG_ATM_IDT77252_RCV_ALL [list $notmod] 2 }
	global CONFIG_ATM_IDT77252_USE_SUNI
	if {($CONFIG_NET == 1) && ($CONFIG_NETDEVICES == 1) && ($CONFIG_ATM == 1) && ($CONFIG_PCI == 1) && ($CONFIG_ATM_IDT77252 != 0)} then {write_tristate $cfg $autocfg CONFIG_ATM_IDT77252_USE_SUNI $CONSTANT_Y [list $notmod] 2 }
	global CONFIG_ATM_AMBASSADOR
	if {($CONFIG_NET == 1) && ($CONFIG_NETDEVICES == 1) && ($CONFIG_ATM == 1) && ($CONFIG_PCI == 1)} then {write_tristate $cfg $autocfg CONFIG_ATM_AMBASSADOR $CONFIG_ATM_AMBASSADOR [list $notmod] 2 }
	global CONFIG_ATM_AMBASSADOR_DEBUG
	if {($CONFIG_NET == 1) && ($CONFIG_NETDEVICES == 1) && ($CONFIG_ATM == 1) && ($CONFIG_PCI == 1) && ($CONFIG_ATM_AMBASSADOR != 0)} then {write_tristate $cfg $autocfg CONFIG_ATM_AMBASSADOR_DEBUG $CONFIG_ATM_AMBASSADOR_DEBUG [list $notmod] 2 }
	global CONFIG_ATM_HORIZON
	if {($CONFIG_NET == 1) && ($CONFIG_NETDEVICES == 1) && ($CONFIG_ATM == 1) && ($CONFIG_PCI == 1)} then {write_tristate $cfg $autocfg CONFIG_ATM_HORIZON $CONFIG_ATM_HORIZON [list $notmod] 2 }
	global CONFIG_ATM_HORIZON_DEBUG
	if {($CONFIG_NET == 1) && ($CONFIG_NETDEVICES == 1) && ($CONFIG_ATM == 1) && ($CONFIG_PCI == 1) && ($CONFIG_ATM_HORIZON != 0)} then {write_tristate $cfg $autocfg CONFIG_ATM_HORIZON_DEBUG $CONFIG_ATM_HORIZON_DEBUG [list $notmod] 2 }
	global CONFIG_ATM_IA
	if {($CONFIG_NET == 1) && ($CONFIG_NETDEVICES == 1) && ($CONFIG_ATM == 1) && ($CONFIG_PCI == 1)} then {write_tristate $cfg $autocfg CONFIG_ATM_IA $CONFIG_ATM_IA [list $notmod] 2 }
	global CONFIG_ATM_IA_DEBUG
	if {($CONFIG_NET == 1) && ($CONFIG_NETDEVICES == 1) && ($CONFIG_ATM == 1) && ($CONFIG_PCI == 1) && ($CONFIG_ATM_IA != 0)} then {write_tristate $cfg $autocfg CONFIG_ATM_IA_DEBUG $CONFIG_ATM_IA_DEBUG [list $notmod] 2 }
	global CONFIG_ATM_FORE200E_MAYBE
	if {($CONFIG_NET == 1) && ($CONFIG_NETDEVICES == 1) && ($CONFIG_ATM == 1) && ($CONFIG_PCI == 1 || $CONFIG_SBUS == 1)} then {write_tristate $cfg $autocfg CONFIG_ATM_FORE200E_MAYBE $CONFIG_ATM_FORE200E_MAYBE [list $notmod] 2 }
	global CONFIG_ATM_FORE200E_PCA
	if {($CONFIG_NET == 1) && ($CONFIG_NETDEVICES == 1) && ($CONFIG_ATM == 1) && ($CONFIG_PCI == 1 || $CONFIG_SBUS == 1) && ($CONFIG_ATM_FORE200E_MAYBE != 0) && ($CONFIG_PCI == 1)} then {write_tristate $cfg $autocfg CONFIG_ATM_FORE200E_PCA $CONFIG_ATM_FORE200E_PCA [list $notmod] 2 }
	global CONFIG_ATM_FORE200E_PCA_DEFAULT_FW
	if {($CONFIG_NET == 1) && ($CONFIG_NETDEVICES == 1) && ($CONFIG_ATM == 1) && ($CONFIG_PCI == 1 || $CONFIG_SBUS == 1) && ($CONFIG_ATM_FORE200E_MAYBE != 0) && ($CONFIG_PCI == 1) && ($CONFIG_ATM_FORE200E_PCA == 1)} then {write_tristate $cfg $autocfg CONFIG_ATM_FORE200E_PCA_DEFAULT_FW $CONFIG_ATM_FORE200E_PCA_DEFAULT_FW [list $notmod] 2 }
	global CONFIG_ATM_FORE200E_PCA_FW
	if {($CONFIG_NET == 1) && ($CONFIG_NETDEVICES == 1) && ($CONFIG_ATM == 1) && ($CONFIG_PCI == 1 || $CONFIG_SBUS == 1) && ($CONFIG_ATM_FORE200E_MAYBE != 0) && ($CONFIG_PCI == 1) && ($CONFIG_ATM_FORE200E_PCA == 1) && ($CONFIG_ATM_FORE200E_PCA_DEFAULT_FW == 0)} then {write_string $cfg $autocfg CONFIG_ATM_FORE200E_PCA_FW "$CONFIG_ATM_FORE200E_PCA_FW" $notmod }
	global CONFIG_ATM_FORE200E_SBA
	if {($CONFIG_NET == 1) && ($CONFIG_NETDEVICES == 1) && ($CONFIG_ATM == 1) && ($CONFIG_PCI == 1 || $CONFIG_SBUS == 1) && ($CONFIG_ATM_FORE200E_MAYBE != 0) && ($CONFIG_SBUS == 1)} then {write_tristate $cfg $autocfg CONFIG_ATM_FORE200E_SBA $CONFIG_ATM_FORE200E_SBA [list $notmod] 2 }
	global CONFIG_ATM_FORE200E_SBA_DEFAULT_FW
	if {($CONFIG_NET == 1) && ($CONFIG_NETDEVICES == 1) && ($CONFIG_ATM == 1) && ($CONFIG_PCI == 1 || $CONFIG_SBUS == 1) && ($CONFIG_ATM_FORE200E_MAYBE != 0) && ($CONFIG_SBUS == 1) && ($CONFIG_ATM_FORE200E_SBA == 1)} then {write_tristate $cfg $autocfg CONFIG_ATM_FORE200E_SBA_DEFAULT_FW $CONFIG_ATM_FORE200E_SBA_DEFAULT_FW [list $notmod] 2 }
	global CONFIG_ATM_FORE200E_SBA_FW
	if {($CONFIG_NET == 1) && ($CONFIG_NETDEVICES == 1) && ($CONifeq (-D__KERNEL__ -I/home/me/kernel/linux/include -Wall -Wstrict-prototypes -Wno-trigraphs -O2 -fomit-frame-pointer -fno-strict-aliasing -fno-common -pipe -mpreferred-stack-boundary=2 -march=i686,$(strip $(subst $(comma),:,$(CFLAGS) $(EXTRA_CFLAGS) $(CFLAGS_scsi_ioctl.o))))
FILES_FLAGS_UP_TO_DATE += scsi_ioctl.o
endif
/* $Id: traps.c,v 1.82 2001/11/18 00:12:56 davem Exp $
 * arch/sparc64/kernel/traps.c
 *
 * Copyright (C) 1995,1997 David S. Miller (davem@caip.rutgers.edu)
 * Copyright (C) 1997,1999,2000 Jakub Jelinek (jakub@redhat.com)
 */

/*
 * I like traps on v9, :))))
 */

#include <linux/config.h>
#include <linux/sched.h>  /* for jiffies */
#include <linux/kernel.h>
#include <linux/signal.h>
#include <linux/smp.h>
#include <linux/smp_lock.h>
#include <linux/mm.h>

#include <asm/delay.h>
#include <asm/system.h>
#include <asm/ptrace.h>
#include <asm/oplib.h>
#include <asm/page.h>
#include <asm/pgtable.h>
#include <asm/unistd.h>
#include <asm/uaccess.h>
#include <asm/fpumacro.h>
#include <asm/lsu.h>
#include <asm/dcu.h>
#include <asm/estate.h>
#include <asm/chafsr.h>
#include <asm/psrcompat.h>
#include <asm/processor.h>
#ifdef CONFIG_KMOD
#include <linux/kmod.h>
#endif

void bad_trap (struct pt_regs *regs, long lvl)
{
	char buffer[32];
	siginfo_t info;

	if (lvl < 0x100) {
		sprintf(buffer, "Bad hw trap %lx at tl0\n", lvl);
		die_if_kernel(buffer, regs);
	}

	lvl -= 0x100;
	if (regs->tstate & TSTATE_PRIV) {
		sprintf(buffer, "Kernel bad sw trap %lx", lvl);
		die_if_kernel (buffer, regs);
	}
	if ((current->thread.flags & SPARC_FLAG_32BIT) != 0) {
		regs->tpc &= 0xffffffff;
		regs->tnpc &= 0xffffffff;
	}
	info.si_signo = SIGILL;
	info.si_errno = 0;
	info.si_code = ILL_ILLTRP;
	info.si_addr = (void *)regs->tpc;
	info.si_trapno = lvl;
	force_sig_info(SIGILL, &info, current);
}

void bad_trap_tl1 (struct pt_regs *regs, long lvl)
{
	char buffer[24];
	
	sprintf (buffer, "Bad trap %lx at tl>0", lvl);
	die_if_kernel (buffer, regs);
}

#ifdef CONFIG_DEBUG_BUGVERBOSE
void do_BUG(const char *file, int line)
{
	bust_spinlocks(1);
	printk("kernel BUG at %s:%d!\n", file, line);
}
#endif

void instruction_access_exception (struct pt_regs *regs,
				   unsigned long sfsr, unsigned long sfar)
{
	siginfo_t info;

	if (regs->tstate & TSTATE_PRIV) {
		printk("instruction_access_exception: SFSR[%016lx] SFAR[%016lx], going.\n",
		       sfsr, sfar);
		die_if_kernel("Iax", regs);
	}
	if ((current->thread.flags & SPARC_FLAG_32BIT) != 0) {
		regs->tpc &= 0xffffffff;
		regs->tnpc &= 0xffffffff;
	}
	info.si_signo = SIGSEGV;
	info.si_errno = 0;
	info.si_code = SEGV_MAPERR;
	info.si_addr = (void *)regs->tpc;
	info.si_trapno = 0;
	force_sig_info(SIGSEGV, &info, current);
}

void data_access_exception (struct pt_regs *regs,
			    unsigned long sfsr, unsigned long sfar)
{
	siginfo_t info;

	if (regs->tstate & TSTATE_PRIV) {
		/* Test if this comes from uaccess places. */
		unsigned long fixup, g2;

		g2 = regs->u_regs[UREG_G2];
		if ((fixup = search_exception_table (regs->tpc, &g2))) {
			/* Ouch, somebody is trying ugly VM hole tricks on us... */
#ifdef DEBUG_EXCEPTIONS
			printk("Exception: PC<%016lx> faddr<UNKNOWN>\n", regs->tpc);
			printk("EX_TABLE: insn<%016lx> fixup<%016lx> "
			       "g2<%016lx>\n", regs->tpc, fixup, g2);
#endif
			regs->tpc = fixup;
			regs->tnpc = regs->tpc + 4;
			regs->u_regs[UREG_G2] = g2;
			return;
		}
		/* Shit... */
		printk("data_access_exception: SFSR[%016lx] SFAR[%016lx], going.\n",
		       sfsr, sfar);
		die_if_kernel("Dax", regs);
	}

	info.si_signo = SIGSEGV;
	info.si_errno = 0;
	info.si_code = SEGV_MAPERR;
	info.si_addr = (void *)sfar;
	info.si_trapno = 0;
	force_sig_info(SIGSEGV, &info, current);
}

#ifdef CONFIG_PCI
/* This is really pathetic... */
extern volatile int pci_poke_in_progress;
extern volatile int pci_poke_cpu;
extern volatile int pci_poke_faulted;
#endif

/* When access exceptions happen, we must do this. */
static void clean_and_reenable_l1_caches(void)
{
	unsigned long va;

	if (tlb_type == spitfire) {
		/* Clean 'em. */
		for (va =  0; va < (PAGE_SIZE << 1); va += 32) {
			spitfire_put_icache_tag(va, 0x0);
			spitfire_put_dcache_tag(va, 0x0);
		}

		/* Re-enable in LSU. */
		__asm__ __volatile__("flush %%g6\n\t"
				     "membar #Sync\n\t"
				     "stxa %0, [%%g0] %1\n\t"
				     "membar #Sync"
				     : /* no outputs */
				     : "r" (LSU_CONTROL_IC | LSU_CONTROL_DC |
					    LSU_CONTROL_IM | LSU_CONTROL_DM),
				     "i" (ASI_LSU_CONTROL)
				     : "memory");
	} else if (tlb_type == cheetah) {
		/* Flush D-cache */
		for (va = 0; va < (1 << 16); va += (1 << 5)) {
			__asm__ __volatile__("stxa %%g0, [%0] %1\n\t"
					     "membar #Sync"
					     : /* no outputs */
					     : "r" (va), "i" (ASI_DCACHE_TAG));
		}
	}
}

void do_iae(struct pt_regs *regs)
{
	siginfo_t info;

	clean_and_reenable_l1_caches();

	info.si_signo = SIGBUS;
	info.si_errno = 0;
	info.si_code = BUS_OBJERR;
	info.si_addr = (void *)0;
	info.si_trapno = 0;
	force_sig_info(SIGBUS, &info, current);
}

void do_dae(struct pt_regs *regs)
{
#ifdef CONFIG_PCI
	if (pci_poke_in_progress && pci_poke_cpu == smp_processor_id()) {
		clean_and_reenable_l1_caches();

		pci_poke_faulted = 1;

		/* Why the fuck did they have to change this? */
		if (tlb_type == cheetah)
			regs->tpc += 4;

		regs->tnpc = regs->tpc + 4;
		return;
	}
#endif
	do_iae(regs);
}

static char ecc_syndrome_table[] = {
	0x4c, 0x40, 0x41, 0x48, 0x42, 0x48, 0x48, 0x49,
	0x43, 0x48, 0x48, 0x49, 0x48, 0x49, 0x49, 0x4a,
	0x44, 0x48, 0x48, 0x20, 0x48, 0x39, 0x4b, 0x48,
	0x48, 0x25, 0x31, 0x48, 0x28, 0x48, 0x48, 0x2c,
	0x45, 0x48, 0x48, 0x21, 0x48, 0x3d, 0x04, 0x48,
	0x48, 0x4b, 0x35, 0x48, 0x2d, 0x48, 0x48, 0x29,
	0x48, 0x00, 0x01, 0x48, 0x0a, 0x48, 0x48, 0x4b,
	0x0f, 0x48, 0x48, 0x4b, 0x48, 0x49, 0x49, 0x48,
	0x46, 0x48, 0x48, 0x2a, 0x48, 0x3b, 0x27, 0x48,
	0x48, 0x4b, 0x33, 0x48, 0x22, 0x48, 0x48, 0x2e,
	0x48, 0x19, 0x1d, 0x48, 0x1b, 0x4a, 0x48, 0x4b,
	0x1f, 0x48, 0x4a, 0x4b, 0x48, 0x4b, 0x4b, 0x48,
	0x48, 0x4b, 0x24, 0x48, 0x07, 0x48, 0x48, 0x36,
	0x4b, 0x48, 0x48, 0x3e, 0x48, 0x30, 0x38, 0x48,
	0x49, 0x48, 0x48, 0x4b, 0x48, 0x4b, 0x16, 0x48,
	0x48, 0x12, 0x4b, 0x48, 0x49, 0x48, 0x48, 0x4b,
	0x47, 0x48, 0x48, 0x2f, 0x48, 0x3f, 0x4b, 0x48,
	0x48, 0x06, 0x37, 0x48, 0x23, 0x48, 0x48, 0x2b,
	0x48, 0x05, 0x4b, 0x48, 0x4b, 0x48, 0x48, 0x32,
	0x26, 0x48, 0x48, 0x3a, 0x48, 0x34, 0x3c, 0x48,
	0x48, 0x11, 0x15, 0x48, 0x13, 0x4a, 0x48, 0x4b,
	0x17, 0x48, 0x4a, 0x4b, 0x48, 0x4b, 0x4b, 0x48,
	0x49, 0x48, 0x48, 0x4b, 0x48, 0x4b, 0x1e, 0x48,
	0x48, 0x1a, 0x4b, 0x48, 0x49, 0x48, 0x48, 0x4b,
	0x48, 0x08, 0x0d, 0x48, 0x02, 0x48, 0x48, 0x49,
	0x03, 0x48, 0x48, 0x49, 0x48, 0x4b, 0x4b, 0x48,
	0x49, 0x48, 0x48, 0x49, 0x48, 0x4b, 0x10, 0x48,
	0x48, 0x14, 0x4b, 0x48, 0x4b, 0x48, 0x48, 0x4b,
	0x49, 0x48, 0x48, 0x49, 0x48, 0x4b, 0x18, 0x48,
	0x48, 0x1c, 0x4b, 0x48, 0x4b, 0x48, 0x48, 0x4b,
	0x4a, 0x0c, 0x09, 0x48, 0x0e, 0x48, 0x48, 0x4b,
	0x0b, 0x48, 0x48, 0x4b, 0x48, 0x4b, 0x4b, 0x4a
};

/* cee_trap in entry.S encodes AFSR/UDBH/UDBL error status
 * in the following format.  The AFAR is left as is, with
 * reserved bits cleared, and is a raw 40-bit physical
 * address.
 */
#define CE_STATUS_UDBH_UE		(1UL << (43 + 9))
#define CE_STATUS_UDBH_CE		(1UL << (43 + 8))
#define CE_STATUS_UDBH_ESYNDR		(0xffUL << 43)
#define CE_STATUS_UDBH_SHIFT		43
#define CE_STATUS_UDBL_UE		(1UL << (33 + 9))
#define CE_STATUS_UDBL_CE		(1UL << (33 + 8))
#define CE_STATUS_UDBL_ESYNDR		(0xffUL << 33)
#define CE_STATUS_UDBL_SHIFT		33
#define CE_STATUS_AFSR_MASK		(0x1ffffffffUL)
#define CE_STATUS_AFSR_ME		(1UL << 32)
#define CE_STATUS_AFSR_PRIV		(1UL << 31)
#define CE_STATUS_AFSR_ISAP		(1UL << 30)
#define CE_STATUS_AFSR_ETP		(1UL << 29)
#define CE_STATUS_AFSR_IVUE		(1UL << 28)
#define CE_STATUS_AFSR_TO		(1UL << 27)
#define CE_STATUS_AFSR_BERR		(1UL << 26)
#define CE_STATUS_AFSR_LDP		(1UL << 25)
#define CE_STATUS_AFSR_CP		(1UL << 24)
#define CE_STATUS_AFSR_WP		(1UL << 23)
#define CE_STATUS_AFSR_EDP		(1UL << 22)
#define CE_STATUS_AFSR_UE		(1UL << 21)
#define CE_STATUS_AFSR_CE		(1UL << 20)
#define CE_STATUS_AFSR_ETS		(0xfUL << 16)
#define CE_STATUS_AFSR_ETS_SHIFT	16
#define CE_STATUS_AFSR_PSYND		(0xffffUL << 0)
#define CE_STATUS_AFSR_PSYND_SHIFT	0

/* Layout of Ecache TAG Parity Syndrome of AFSR */
#define AFSR_ETSYNDROME_7_0		0x1UL /* E$-tag bus bits  <7:0> */
#define AFSR_ETSYNDROME_15_8		0x2UL /* E$-tag bus bits <15:8> */
#define AFSR_ETSYNDROME_21_16		0x4UL /* E$-tag bus bits <21:16> */
#define AFSR_ETSYNDROME_24_22		0x8UL /* E$-tag bus bits <24:22> */

static char *syndrome_unknown = "<Unknown>";

asmlinkage void cee_log(unsigned long ce_status,
			unsigned long afar,
			struct pt_regs *regs)
{
	char memmod_str[64];
	char *p;
	unsigned short scode, udb_reg;

	printk(KERN_WARNING "CPU[%d]: Correctable ECC Error "
	       "AFSR[%lx] AFAR[%016lx] UDBL[%lx] UDBH[%lx]\n",
	       smp_processor_id(),
	       (ce_status & CE_STATUS_AFSR_MASK),
	       afar,
	       ((ce_status >> CE_STATUS_UDBL_SHIFT) & 0x3ffUL),
	       ((ce_status >> CE_STATUS_UDBH_SHIFT) & 0x3ffUL));

	udb_reg = ((ce_status >> CE_STATUS_UDBL_SHIFT) & 0x3ffUL);
	if (udb_reg & (1 << 8)) {
		scode = ecc_syndrome_table[udb_reg & 0xff];
		if (prom_getunumber(scode, afar,
				    memmod_str, sizeof(memmod_str)) == -1)
			p = syndrome_unknown;
		else
			p = memmod_str;
		printk(KERN_WARNING "CPU[%d]: UDBL Syndrome[%x] "
		       "Memory Module \"%s\"\n",
		       smp_processor_id(), scode, p);
	}

	udb_reg = ((ce_status >> CE_STATUS_UDBH_SHIFT) & 0x3ffUL);
	if (udb_reg & (1 << 8)) {
		scode = ecc_syndrome_table[udb_reg & 0xff];
		if (prom_getunumber(scode, afar,
				    memmod_str, sizeof(memmod_str)) == -1)
			p = syndrome_unknown;
		else
			p = memmod_str;
		printk(KERN_WARNING "CPU[%d]: UDBH Syndrome[%x] "
		       "Memory Module \"%s\"\n",
		       smp_processor_id(), scode, p);
	}
}

/* Cheetah error trap handling. */
static unsigned long ecache_flush_physbase;
static unsigned long ecache_flush_linesize;
static unsigned long ecache_flush_size;

/* WARNING: The error trap handlers in assembly know the precise
 *	    layout of the following structure.
 *
 * C-level handlers below use this information to log the error
 * and then determine how to recover (if possible).
 */
struct cheetah_err_info {
/*0x00*/u64 afsr;
/*0x08*/u64 afar;

	/* D-cache state */
/*0x10*/u64 dcache_data[4];	/* The actual data	*/
/*0x30*/u64 dcache_index;	/* D-cache index	*/
/*0x38*/u64 dcache_tag;		/* D-cache tag/valid	*/
/*0x40*/u64 dcache_utag;	/* D-cache microtag	*/
/*0x48*/u64 dcache_stag;	/* D-cache snooptag	*/

	/* I-cache state */
/*0x50*/u64 icache_data[8];	/* The actual insns + predecode	*/
/*0x90*/u64 icache_index;	/* I-cache index	*/
/*0x98*/u64 icache_tag;		/* I-cache phys tag	*/
/*0xa0*/u64 icache_utag;	/* I-cache microtag	*/
/*0xa8*/u64 icache_stag;	/* I-cache snooptag	*/
/*0xb0*/u64 icache_upper;	/* I-cache upper-tag	*/
/*0xb8*/u64 icache_lower;	/* I-cache lower-tag	*/

	/* E-cache state */
/*0xc0*/u64 ecache_data[4];	/* 32 bytes from staging registers */
/*0xe0*/u64 ecache_index;	/* E-cache index	*/
/*0xe8*/u64 ecache_tag;		/* E-cache tag/state	*/

/*0xf0*/u64 __pad[32 - 30];
};
#define CHAFSR_INVALID		((u64)-1L)

/* This is allocated at boot time based upon the largest hardware
 * cpu ID in the system.  We allocate two entries per cpu, one for
 * TL==0 logging and one for TL >= 1 logging.
 */
struct cheetah_err_info *cheetah_error_log;

static __inline__ struct cheetah_err_info *cheetah_get_error_log(unsigned long afsr)
{
	struct cheetah_err_info *p;
	int cpu = smp_processor_id();

	if (!cheetah_error_log)
		return NULL;

	p = cheetah_error_log + (cpu * 2);
	if ((afsr & CHAFSR_TL1) != 0UL)
		p++;

	return p;
}

extern unsigned int tl0_fecc[], tl1_fecc[];
extern unsigned int tl0_cee[], tl1_cee[];
extern unsigned int tl0_iae[], tl1_iae[];
extern unsigned int tl0_dae[], tl1_dae[];
extern unsigned int cheetah_fecc_trap_vector[], cheetah_fecc_trap_vector_tl1[];
extern unsigned int cheetah_cee_trap_vector[], cheetah_cee_trap_vector_tl1[];
extern unsigned int cheetah_deferred_trap_vector[], cheetah_deferred_trap_vector_tl1[];

void cheetah_ecache_flush_init(void)
{
	unsigned long largest_size, smallest_linesize, order;
	char type[16];
	int node, highest_cpu, i;

	/* Scan all cpu device tree nodes, note two values:
	 * 1) largest E-cache size
	 * 2) smallest E-cache line size
	 */
	largest_size = 0UL;
	smallest_linesize = ~0UL;
	node = prom_getchild(prom_root_node);
	while ((node = prom_getsibling(node)) != 0) {
		prom_getstring(node, "device_type", type, sizeof(type));
		if (!strcmp(type, "cpu")) {
			unsigned long val;

			val = prom_getintdefault(node, "ecache-size",
						 (2 * 1024 * 1024));
			if (val > largest_size)
				largest_size = val;
			val = prom_getintdefault(node, "ecache-line-size", 64);
			if (val < smallest_linesize)
				smallest_linesize = val;
		}
	}
	if (largest_size == 0UL || smallest_linesize == ~0UL) {
		prom_printf("cheetah_ecache_flush_init: Cannot probe cpu E-cache "
			    "parameters.\n");
		prom_halt();
	}

	ecache_flush_size = (2 * largest_size);
	ecache_flush_linesize = smallest_linesize;

	/* Discover a physically contiguous chunk of physical
	 * memory in 'sp_banks' of size ecache_flush_size calculated
	 * above.  Store the physical base of this area at
	 * ecache_flush_physbase.
	 */
	for (node = 0; ; node++) {
		if (sp_banks[node].num_bytes == 0)
			break;
		if (sp_banks[node].num_bytes >= ecache_flush_size) {
			ecache_flush_physbase = sp_banks[node].base_addr;
			break;
		}
	}

	/* Note: Zero would be a valid value of ecache_flush_physbase so
	 * don't use that as the success test. :-)
	 */
	if (sp_banks[node].num_bytes == 0) {
		prom_printf("cheetah_ecache_flush_init: Cannot find %d byte "
			    "contiguous physical memory.\n", ecache_flush_size);
		prom_halt();
	}

	/* Now allocate error trap reporting scoreboard. */
	highest_cpu = 0;
#ifdef CONFIG_SMP
	for (i = 0; i < NR_CPUS; i++) {
		if ((1UL << i) & cpu_present_map)
			highest_cpu = i;
	}
#endif
	highest_cpu++;
	node = highest_cpu * (2 * sizeof(struct cheetah_err_info));
	for (order = 0; order < MAX_ORDER; order++) {
		if ((PAGE_SIZE << order) >= node)
			break;
	}
	cheetah_error_log = (struct cheetah_err_info *)
		__get_free_pages(GFP_KERNEL, order);
	if (!cheetah_error_log) {
		prom_printf("cheetah_ecache_flush_init: Failed to allocate "
			    "error logging scoreboard (%d bytes).\n", node);
		prom_halt();
	}
	memset(cheetah_error_log, 0, PAGE_SIZE << order);

	/* Mark all AFSRs as invalid so that the trap handler will
	 * log new new information there.
	 */
	for (i = 0; i < 2 * highest_cpu; i++)
		cheetah_error_log[i].afsr = CHAFSR_INVALID;

	/* Now patch trap tables. */
	memcpy(tl0_fecc, cheetah_fecc_trap_vector, (8 * 4));
	memcpy(tl1_fecc, cheetah_fecc_trap_vector_tl1, (8 * 4));
	memcpy(tl0_cee, cheetah_cee_trap_vector, (8 * 4));
	memcpy(tl1_cee, cheetah_cee_trap_vector_tl1, (8 * 4));
	memcpy(tl0_iae, cheetah_deferred_trap_vector, (8 * 4));
	memcpy(tl1_iae, cheetah_deferred_trap_vector_tl1, (8 * 4));
	memcpy(tl0_dae, cheetah_deferred_trap_vector, (8 * 4));
	memcpy(tl1_dae, cheetah_deferred_trap_vector_tl1, (8 * 4));
	flushi(PAGE_OFFSET);
}

static void cheetah_flush_ecache(void)
{
	unsigned long flush_base = ecache_flush_physbase;
	unsigned long flush_linesize = ecache_flush_linesize;
	unsigned long flush_size = ecache_flush_size;

	__asm__ __volatile__("1: subcc	%0, %4, %0\n\t"
			     "   bne,pt	%%xcc, 1b\n\t"
			     "    ldxa	[%2 + %0] %3, %%g0\n\t"
			     : "=&r" (flush_size)
			     : "0" (flush_size), "r" (flush_base),
			       "i" (ASI_PHYS_USE_EC), "r" (flush_linesize));
}

static void cheetah_flush_ecache_line(unsigned long physaddr)
{
	unsigned long alias;

	physaddr &= ~(8UL - 1UL);
	physaddr = (ecache_flush_physbase +
		    (physaddr & ((ecache_flush_size>>1UL) - 1UL)));
	alias = physaddr + (ecache_flush_size >> 1UL);
	__asm__ __volatile__("ldxa [%0] %2, %%g0\n\t"
			     "ldxa [%1] %2, %%g0\n\t"
			     "membar #Sync"
			     : /* no outputs */
			     : "r" (physaddr), "r" (alias),
			       "i" (ASI_PHYS_USE_EC));
}

/* Unfortunately, the diagnostic access to the I-cache tags we need to
 * use to clear the thing interferes with I-cache coherency transactions.
 *
 * So we must only flush the I-cache when it is disabled.
 */
static void cheetah_flush_icache(void)
{
	unsigned long dcu_save, i;

	/* Save current DCU, disable I-cache. */
	__asm__ __volatile__("ldxa [%%g0] %1, %0\n\t"
			     "or %0, %2, %%g1\n\t"
			     "stxa %%g1, [%%g0] %1\n\t"
			     "membar #Sync"
			     : "=r" (dcu_save)
			     : "i" (ASI_DCU_CONTROL_REG), "i" (DCU_IC)
			     : "g1");

	/* Clear the valid bits in all the tags. */
	for (i = 0; i < (1 << 16); i += (1 << 5)) {
		__asm__ __volatile__("stxa %%g0, [%0] %1\n\t"
				     "membar #Sync"
				     : /* no outputs */
				     : "r" (i | (2 << 3)), "i" (ASI_IC_TAG));
	}

	/* Restore DCU register */
	__asm__ __volatile__("stxa %0, [%%g0] %1\n\t"
			     "membar #Sync"
			     : /* no outputs */
			     : "r" (dcu_save), "i" (ASI_DCU_CONTROL_REG));
}

static void cheetah_flush_dcache(void)
{
	unsigned long i;

	for (i = 0; i < (1 << 16); i += (1 << 5)) {
		__asm__ __volatile__("stxa %%g0, [%0] %1\n\t"
				     "membar #Sync"
				     : /* no outputs */
				     : "r" (i), "i" (ASI_DCACHE_TAG));
	}
}

/* Conversion tables used to frob Cheetah AFSR syndrome values into
 * something palatable to the memory controller driver get_unumber
 * routine.
 */
#define MT0	137
#define MT1	138
#define MT2	139
#define NONE	254
#define MTC0	140
#define MTC1	141
#define MTC2	142
#define MTC3	143
#define C0	128
#define C1	129
#define C2	130
#define C3	131
#define C4	132
#define C5	133
#define C6	134
#define C7	135
#define C8	136
#define M2	144
#define M3	145
#define M4	146
#define M	147
static unsigned char cheetah_ecc_syntab[] = {
/*00*/NONE, C0, C1, M2, C2, M2, M3, 47, C3, M2, M2, 53, M2, 41, 29, M,
/*01*/C4, M, M, 50, M2, 38, 25, M2, M2, 33, 24, M2, 11, M, M2, 16,
/*02*/C5, M, M, 46, M2, 37, 19, M2, M, 31, 32, M, 7, M2, M2, 10,
/*03*/M2, 40, 13, M2, 59, M, M2, 66, M, M2, M2, 0, M2, 67, 71, M,
/*04*/C6, M, M, 43, M, 36, 18, M, M2, 49, 15, M, 63, M2, M2, 6,
/*05*/M2, 44, 28, M2, M, M2, M2, 52, 68, M2, M2, 62, M2, M3, M3, M4,
/*06*/M2, 26, 106, M2, 64, M, M2, 2, 120, M, M2, M3, M, M3, M3, M4,
/*07*/116, M2, M2, M3, M2, M3, M, M4, M2, 58, 54, M2, M, M4, M4, M3,
/*08*/C7, M2, M, 42, M, 35, 17, M2, M, 45, 14, M2, 21, M2, M2, 5,
/*09*/M, 27, M, M, 99, M, M, 3, 114, M2, M2, 20, M2, M3, M3, M,
/*0a*/M2, 23, 113, M2, 112, M2, M, 51, 95, M, M2, M3, M2, M3, M3, M2,
/*0b*/103, M, M2, M3, M2, M3, M3, M4, M2, 48, M, M, 73, M2, M, M3,
/*0c*/M2, 22, 110, M2, 109, M2, M, 9, 108, M2, M, M3, M2, M3, M3, M,
/*0d*/102, M2, M, M, M2, M3, M3, M, M2, M3, M3, M2, M, M4, M, M3,
/*0e*/98, M, M2, M3, M2, M, M3, M4, M2, M3, M3, M4, M3, M, M, M,
/*0f*/M2, M3, M3, M, M3, M, M, M, 56, M4, M, M3, M4, M, M, M,
/*10*/C8, M, M2, 39, M, 34, 105, M2, M, 30, 104, M, 101, M, M, 4,
/*11*/M, M, 100, M, 83, M, M2, 12, 87, M, M, 57, M2, M, M3, M,
/*12*/M2, 97, 82, M2, 78, M2, M2, 1, 96, M, M, M, M, M, M3, M2,
/*13*/94, M, M2, M3, M2, M, M3, M, M2, M, 79, M, 69, M, M4, M,
/*14*/M2, 93, 92, M, 91, M, M2, 8, 90, M2, M2, M, M, M, M, M4,
/*15*/89, M, M, M3, M2, M3, M3, M, M, M, M3, M2, M3, M2, M, M3,
/*16*/86, M, M2, M3, M2, M, M3, M, M2, M, M3, M, M3, M, M, M3,
/*17*/M, M, M3, M2, M3, M2, M4, M, 60, M, M2, M3, M4, M, M, M2,
/*18*/M2, 88, 85, M2, 84, M, M2, 55, 81, M2, M2, M3, M2, M3, M3, M4,
/*19*/77, M, M, M, M2, M3, M, M, M2, M3, M3, M4, M3, M2, M, M,
/*1a*/74, M, M2, M3, M, M, M3, M, M, M, M3, M, M3, M, M4, M3,
/*1b*/M2, 70, 107, M4, 65, M2, M2, M, 127, M, M, M, M2, M3, M3, M,
/*1c*/80, M2, M2, 72, M, 119, 118, M, M2, 126, 76, M, 125, M, M4, M3,
/*1d*/M2, 115, 124, M, 75, M, M, M3, 61, M, M4, M, M4, M, M, M,
/*1e*/M, 123, 122, M4, 121, M4, M, M3, 117, M2, M2, M3, M4, M3, M, M,
/*1f*/111, M, M, M, M4, M3, M3, M, M, M, M3, M, M3, M2, M, M
};
static unsigned char cheetah_mtag_syntab[] = {
       NONE, MTC0,
       MTC1, NONE,
       MTC2, NONE,
       NONE, MT0,
       MTC3, NONE,
       NONE, MT1,
       NONE, MT2,
       NONE, NONE
};

/* This table is ordered in priority of errors and matches the
 * AFAR overwrite policy as well.
 */
static struct {
	unsigned long mask;
	char *name;
} cheetah_error_table[] = {
	{	CHAFSR_PERR,	"System interface protocol error"			},
	{	CHAFSR_IERR,	"Internal processor error"				},
	{	CHAFSR_ISAP,	"System request parity error on incoming addresss"	},
	{	CHAFSR_UCU,	"Uncorrectable E-cache ECC error for ifetch/data"	},
	{	CHAFSR_UCC,	"SW Correctable E-cache ECC error for ifetch/data"	},
	{	CHAFSR_UE,	"Uncorrectable system bus data ECC error for read"	},
	{	CHAFSR_EDU,	"Uncorrectable E-cache ECC error for stmerge/blkld"	},
	{	CHAFSR_EMU,	"Uncorrectable system bus MTAG error"			},
	{	CHAFSR_WDU,	"Uncorrectable E-cache ECC error for writeback"		},
	{	CHAFSR_CPU,	"Uncorrectable ECC error for copyout"			},
	{	CHAFSR_CE,	"HW corrected system bus data ECC error for read"	},
	{	CHAFSR_EDC,	"HW corrected E-cache ECC error for stmerge/blkld"	},
	{	CHAFSR_EMC,	"HW corrected system bus MTAG ECC error"		},
	{	CHAFSR_WDC,	"HW corrected E-cache ECC error for writeback"		},
	{	CHAFSR_CPC,	"HW corrected ECC error for copyout"			},
	{	CHAFSR_TO,	"Unmapped error from system bus"			},
	{	CHAFSR_BERR,	"Bus error response from system bus"			},
	/* These two do not update the AFAR. */
	{	CHAFSR_IVC,	"HW corrected system bus data ECC error for ivec read"	},
	{	CHAFSR_IVU,	"Uncorrectable system bus data ECC error for ivec read"	},
	{	0,		NULL							}
};

/* Return the highest priority error conditon mentioned. */
static __inline__ unsigned long cheetah_get_hipri(unsigned long afsr)
{
	unsigned long tmp = 0;
	int i;

	for (i = 0; cheetah_error_table[i].mask; i++) {
		if ((tmp = (afsr & cheetah_error_table[i].mask)) != 0UL)
			return tmp;
	}
	return tmp;
}

static char *cheetah_get_string(unsigned long bit)
{
	int i;

	for (i = 0; cheetah_error_table[i].mask; i++) {
		if ((bit & cheetah_error_table[i].mask) != 0UL)
			return cheetah_error_table[i].name;
	}
	return "???";
}

extern int chmc_getunumber(int, unsigned long, char *, int);

static void cheetah_log_errors(struct pt_regs *regs, struct cheetah_err_info *info,
			       unsigned long afsr, unsigned long afar, int recoverable)
{
	unsigned long hipri;
	char unum[256];

	printk("%s" "ERROR(%d): Cheetah error trap taken afsr[%016lx] afar[%016lx] TL1(%d)\n",
	       (recoverable ? KERN_WARNING : KERN_CRIT), smp_processor_id(),
	       afsr, afar,
	       (afsr & CHAFSR_TL1) ? 1 : 0);
	printk("%s" "ERROR(%d): TPC[%016lx] TNPC[%016lx] TSTATE[%016lx]\n",
	       (recoverable ? KERN_WARNING : KERN_CRIT), smp_processor_id(),
	       regs->tpc, regs->tnpc, regs->tstate);
	printk("%s" "ERROR(%d): M_SYND(%lx),  E_SYND(%lx)%s%s\n",
	       (recoverable ? KERN_WARNING : KERN_CRIT), smp_processor_id(),
	       (afsr & CHAFSR_M_SYNDROME) >> CHAFSR_M_SYNDROME_SHIFT,
	       (afsr & CHAFSR_E_SYNDROME) >> CHAFSR_E_SYNDROME_SHIFT,
	       (afsr & CHAFSR_ME) ? ", Multiple Errors" : "",
	       (afsr & CHAFSR_PRIV) ? ", Privileged" : "");
	hipri = cheetah_get_hipri(afsr);
	printk("%s" "ERROR(%d): Highest priority error (%016lx) \"%s\"\n",
	       (recoverable ? KERN_WARNING : KERN_CRIT), smp_processor_id(),
	       hipri, cheetah_get_string(hipri));

	/* Try to get unumber if relevant. */
#define ESYND_ERRORS	(CHAFSR_IVC | CHAFSR_IVU | \
			 CHAFSR_CPC | CHAFSR_CPU | \
			 CHAFSR_UE  | CHAFSR_CE  | \
			 CHAFSR_EDC | CHAFSR_EDU  | \
			 CHAFSR_UCC | CHAFSR_UCU  | \
			 CHAFSR_WDU | CHAFSR_WDC)
#define MSYND_ERRORS	(CHAFSR_EMC | CHAFSR_EMU)
	if (afsr & ESYND_ERRORS) {
		int syndrome;
		int ret;

		syndrome = (afsr & CHAFSR_E_SYNDROME) >> CHAFSR_E_SYNDROME_SHIFT;
		syndrome = cheetah_ecc_syntab[syndrome];
		ret = chmc_getunumber(syndrome, afar, unum, sizeof(unum));
		if (ret != -1)
			printk("%s" "ERROR(%d): AFAR E-syndrome [%s]\n",
			       (recoverable ? KERN_WARNING : KERN_CRIT),
			       smp_processor_id(), unum);
	} else if (afsr & MSYND_ERRORS) {
		int syndrome;
		int ret;

		syndrome = (afsr & CHAFSR_M_SYNDROME) >> CHAFSR_M_SYNDROME_SHIFT;
		syndrome = cheetah_mtag_syntab[syndrome];
		ret = chmc_getunumber(syndrome, afar, unum, sizeof(unum));
		if (ret != -1)
			printk("%s" "ERROR(%d): AFAR M-syndrome [%s]\n",
			       (recoverable ? KERN_WARNING : KERN_CRIT),
			       smp_processor_id(), unum);
	}

	/* Now dump the cache snapshots. */
	printk("%s" "ERROR(%d): D-cache idx[%x] tag[%016lx] utag[%016lx] stag[%016lx]\n",
	       (recoverable ? KERN_WARNING : KERN_CRIT), smp_processor_id(),
	       (int) info->dcache_index,
	       info->dcache_tag,
	       info->dcache_utag,
	       info->dcache_stag);
	printk("%s" "ERROR(%d): D-cache data0[%016lx] data1[%016lx] data2[%016lx] data3[%016lx]\n",
	       (recoverable ? KERN_WARNING : KERN_CRIT), smp_processor_id(),
	       info->dcache_data[0],
	       info->dcache_data[1],
	       info->dcache_data[2],
	       info->dcache_data[3]);
	printk("%s" "ERROR(%d): I-cache idx[%x] tag[%016lx] utag[%016lx] stag[%016lx] "
	       "u[%016lx] l[%016lx]\n",
	       (recoverable ? KERN_WARNING : KERN_CRIT), smp_processor_id(),
	       (int) info->icache_index,
	       info->icache_tag,
	       info->icache_utag,
	       info->icache_stag,
	       info->icache_upper,
	       info->icache_lower);
	printk("%s" "ERROR(%d): I-cache INSN0[%016lx] INSN1[%016lx] INSN2[%016lx] INSN3[%016lx]\n",
	       (recoverable ? KERN_WARNING : KERN_CRIT), smp_processor_id(),
	       info->icache_data[0],
	       info->icache_data[1],
	       info->icache_data[2],
	       info->icache_data[3]);
	printk("%s" "ERROR(%d): I-cache INSN4[%016lx] INSN5[%016lx] INSN6[%016lx] INSN7[%016lx]\n",
	       (recoverable ? KERN_WARNING : KERN_CRIT), smp_processor_id(),
	       info->icache_data[4],
	       info->icache_data[5],
	       info->icache_data[6],
	       info->icache_data[7]);
	printk("%s" "ERROR(%d): E-cache idx[%x] tag[%016lx]\n",
	       (recoverable ? KERN_WARNING : KERN_CRIT), smp_processor_id(),
	       (int) info->ecache_index, info->ecache_tag);
	printk("%s" "ERROR(%d): E-cache data0[%016lx] data1[%016lx] data2[%016lx] data3[%016lx]\n",
	       (recoverable ? KERN_WARNING : KERN_CRIT), smp_processor_id(),
	       info->ecache_data[0],
	       info->ecache_data[1],
	       info->ecache_data[2],
	       info->ecache_data[3]);

	afsr = (afsr & ~hipri) & CHAFSR_ERRORS;
	while (afsr != 0UL) {
		unsigned long bit = cheetah_get_hipri(afsr);

		printk("%s" "ERROR: Multiple-error (%016lx) \"%s\"\n",
		       (recoverable ? KERN_WARNING : KERN_CRIT),
		       bit, cheetah_get_string(bit));

		afsr &= ~bit;
	}

	if (!recoverable)
		printk(KERN_CRIT "ERROR: This condition is not recoverable.\n");
}

static int cheetah_recheck_errors(struct cheetah_err_info *logp)
{
	unsigned long afsr, afar;
	int ret = 0;

	__asm__ __volatile__("ldxa [%%g0] %1, %0\n\t"
			     : "=r" (afsr)
			     : "i" (ASI_AFSR));
	if ((afsr & CHAFSR_ERRORS) != 0) {
		if (logp != NULL) {
			__asm__ __volatile__("ldxa [%%g0] %1, %0\n\t"
					     : "=r" (afar)
					     : "i" (ASI_AFAR));
			logp->afsr = afsr;
			logp->afar = afar;
		}
		ret = 1;
	}
	__asm__ __volatile__("stxa %0, [%%g0] %1\n\t"
			     "membar #Sync\n\t"
			     : : "r" (afsr), "i" (ASI_AFSR));

	return ret;
}

void cheetah_fecc_handler(struct pt_regs *regs, unsigned long afsr, unsigned long afar)
{
	struct cheetah_err_info local_snapshot, *p;
	int recoverable;

	/* Flush E-cache */
	cheetah_flush_ecache();

	p = cheetah_get_error_log(afsr);
	if (!p) {
		prom_printf("ERROR: Early Fast-ECC error afsr[%016lx] afar[%016lx]\n",
			    afsr, afar);
		prom_printf("ERROR: CPU(%d) TPC[%016lx] TNPC[%016lx] TSTATE[%016lx]\n",
			    smp_processor_id(), regs->tpc, regs->tnpc, regs->tstate);
		prom_halt();
	}

	/* Grab snapshot of logged error. */
	memcpy(&local_snapshot, p, sizeof(local_snapshot));

	/* If the current trap snapshot does not match what the
	 * trap handler passed along into our args, big trouble.
	 * In such a case, mark the local copy as invalid.
	 *
	 * Else, it matches and we mark the afsr in the non-local
	 * copy as invalid so we may log new error traps there.
	 */
	if (p->afsr != afsr || p->afar != afar)
		local_snapshot.afsr = CHAFSR_INVALID;
	else
		p->afsr = CHAFSR_INVALID;

	cheetah_flush_icache();
	cheetah_flush_dcache();

	/* Re-enable I-cache/D-cache */
	__asm__ __volatile__("ldxa [%%g0] %0, %%g1\n\t"
			     "or %%g1, %1, %%g1\n\t"
			     "stxa %%g1, [%%g0] %0\n\t"
			     "membar #Sync"
			     : /* no outputs */
			     : "i" (ASI_DCU_CONTROL_REG),
			       "i" (DCU_DC | DCU_IC)
			     : "g1");

	/* Re-enable error reporting */
	__asm__ __volatile__("ldxa [%%g0] %0, %%g1\n\t"
			     "or %%g1, %1, %%g1\n\t"
			     "stxa %%g1, [%%g0] %0\n\t"
			     "membar #Sync"
			     : /* no outputs */
			     : "i" (ASI_ESTATE_ERROR_EN),
			       "i" (ESTATE_ERROR_NCEEN | ESTATE_ERROR_CEEN)
			     : "g1");

	/* Decide if we can continue after handling this trap and
	 * logging the error.
	 */
	recoverable = 1;
	if (afsr & (CHAFSR_PERR | CHAFSR_IERR | CHAFSR_ISAP))
		recoverable = 0;

	/* Re-check AFSR/AFAR.  What we are looking for here is whether a new
	 * error was logged while we had error reporting traps disabled.
	 */
	if (cheetah_recheck_errors(&local_snapshot)) {
		unsigned long new_afsr = local_snapshot.afsr;

		/* If we got a new asynchronous error, die... */
		if (new_afsr & (CHAFSR_EMU | CHAFSR_EDU |
				CHAFSR_WDU | CHAFSR_CPU |
				CHAFSR_IVU | CHAFSR_UE |
				CHAFSR_BERR | CHAFSR_TO))
			recoverable = 0;
	}

	/* Log errors. */
	cheetah_log_errors(regs, &local_snapshot, afsr, afar, recoverable);

	if (!recoverable)
		panic("Irrecoverable Fast-ECC error trap.\n");

	/* Flush E-cache to kick the error trap handlers out. */
	cheetah_flush_ecache();
}

/* Try to fix a correctable error by pushing the line out from
 * the E-cache.  Recheck error reporting registers to see if the
 * problem is intermittent.
 */
static int cheetah_fix_ce(unsigned long physaddr)
{
	unsigned long orig_estate;
	unsigned long alias1, alias2;
	int ret;

	/* Make sure correctable error traps are disabled. */
	__asm__ __volatile__("ldxa	[%%g0] %2, %0\n\t"
			     "andn	%0, %1, %%g1\n\t"
			     "stxa	%%g1, [%%g0] %2\n\t"
			     "membar	#Sync"
			     : "=&r" (orig_estate)
			     : "i" (ESTATE_ERROR_CEEN),
			       "i" (ASI_ESTATE_ERROR_EN)
			     : "g1");

	/* We calculate alias addresses that will force the
	 * cache line in question out of the E-cache.  Then
	 * we bring it back in with an atomic instruction so
	 * that we get it in some modified/exclusive state,
	 * then we displace it again to try and get proper ECC
	 * pushed back into the system.
	 */
	physaddr &= ~(8UL - 1UL);
	alias1 = (ecache_flush_physbase +
		  (physaddr & ((ecache_flush_size >> 1) - 1)));
	alias2 = alias1 + (ecache_flush_size >> 1);
	__asm__ __volatile__("ldxa	[%0] %3, %%g0\n\t"
			     "ldxa	[%1] %3, %%g0\n\t"
			     "casxa	[%2] %3, %%g0, %%g0\n\t"
			     "membar	#StoreLoad | #StoreStore\n\t"
			     "ldxa	[%0] %3, %%g0\n\t"
			     "ldxa	[%1] %3, %%g0\n\t"
			     "membar	#Sync"
			     : /* no outputs */
			     : "r" (alias1), "r" (alias2),
			       "r" (physaddr), "i" (ASI_PHYS_USE_EC));

	/* Did that trigger another error? */
	if (cheetah_recheck_errors(NULL)) {
		/* Try one more time. */
		__asm__ __volatile__("ldxa [%0] %1, %%g0\n\t"
				     "membar #Sync"
				     : : "r" (physaddr), "i" (ASI_PHYS_USE_EC));
		if (cheetah_recheck_errors(NULL))
			ret = 2;
		else
			ret = 1;
	} else {
		/* No new error, intermittent problem. */
		ret = 0;
	}

	/* Restore error enables. */
	__asm__ __volatile__("stxa	%0, [%%g0] %1\n\t"
			     "membar	#Sync"
			     : : "r" (orig_estate), "i" (ASI_ESTATE_ERROR_EN));

	return ret;
}

/* Return non-zero if PADDR is a valid physical memory address. */
static int cheetah_check_main_memory(unsigned long paddr)
{
	int i;

	for (i = 0; ; i++) {
		if (sp_banks[i].num_bytes == 0)
			break;
		if (paddr >= sp_banks[i].base_addr &&
		    paddr < (sp_banks[i].base_addr + sp_banks[i].num_bytes))
			return 1;
	}
	return 0;
}

void cheetah_cee_handler(struct pt_regs *regs, unsigned long afsr, unsigned long afar)
{
	struct cheetah_err_info local_snapshot, *p;
	int recoverable, is_memory;

	p = cheetah_get_error_log(afsr);
	if (!p) {
		prom_printf("ERROR: Early CEE error afsr[%016lx] afar[%016lx]\n",
			    afsr, afar);
		prom_printf("ERROR: CPU(%d) TPC[%016lx] TNPC[%016lx] TSTATE[%016lx]\n",
			    smp_processor_id(), regs->tpc, regs->tnpc, regs->tstate);
		prom_halt();
	}

	/* Grab snapshot of logged error. */
	memcpy(&local_snapshot, p, sizeof(local_snapshot));

	/* If the current trap snapshot does not match what the
	 * trap handler passed along into our args, big trouble.
	 * In such a case, mark the local copy as invalid.
	 *
	 * Else, it matches and we mark the afsr in the non-local
	 * copy as invalid so we may log new error traps there.
	 */
	if (p->afsr != afsr || p->afar != afar)
		local_snapshot.afsr = CHAFSR_INVALID;
	else
		p->afsr = CHAFSR_INVALID;

	is_memory = cheetah_check_main_memory(afar);

	if (is_memory && (afsr & CHAFSR_CE) != 0UL) {
		/* XXX Might want to log the results of this operation
		 * XXX somewhere... -DaveM
		 */
		cheetah_fix_ce(afar);
	}

	{
		int flush_all, flush_line;

		flush_all = flush_line = 0;
		if ((afsr & CHAFSR_EDC) != 0UL) {
			if ((afsr & CHAFSR_ERRORS) == CHAFSR_EDC)
				flush_line = 1;
			else
				flush_all = 1;
		} else if ((afsr & CHAFSR_CPC) != 0UL) {
			if ((afsr & CHAFSR_ERRORS) == CHAFSR_CPC)
				flush_line = 1;
			else
				flush_all = 1;
		}

		/* Trap handler only disabled I-cache, flush it. */
		cheetah_flush_icache();

		/* Re-enable I-cache */
		__asm__ __volatile__("ldxa [%%g0] %0, %%g1\n\t"
				     "or %%g1, %1, %%g1\n\t"
				     "stxa %%g1, [%%g0] %0\n\t"
				     "membar #Sync"
				     : /* no outputs */
				     : "i" (ASI_DCU_CONTROL_REG),
				     "i" (DCU_IC)
				     : "g1");

		if (flush_all)
			cheetah_flush_ecache();
		else if (flush_line)
			cheetah_flush_ecache_line(afar);
	}

	/* Re-enable error reporting */
	__asm__ __volatile__("ldxa [%%g0] %0, %%g1\n\t"
			     "or %%g1, %1, %%g1\n\t"
			     "stxa %%g1, [%%g0] %0\n\t"
			     "membar #Sync"
			     : /* no outputs */
			     : "i" (ASI_ESTATE_ERROR_EN),
			       "i" (ESTATE_ERROR_CEEN)
			     : "g1");

	/* Decide if we can continue after handling this trap and
	 * logging the error.
	 */
	recoverable = 1;
	if (afsr & (CHAFSR_PERR | CHAFSR_IERR | CHAFSR_ISAP))
		recoverable = 0;

	/* Re-check AFSR/AFAR */
	(void) cheetah_recheck_errors(&local_snapshot);

	/* Log errors. */
	cheetah_log_errors(regs, &local_snapshot, afsr, afar, recoverable);

	if (!recoverable)
		panic("Irrecoverable Correctable-ECC error trap.\n");
}

void cheetah_deferred_handler(struct pt_regs *regs, unsigned long afsr, unsigned long afar)
{
	struct cheetah_err_info local_snapshot, *p;
	int recoverable, is_memory;

#ifdef CONFIG_PCI
	/* Check for the special PCI poke sequence. */
	if (pci_poke_in_progress && pci_poke_cpu == smp_processor_id()) {
		cheetah_flush_icache();
		cheetah_flush_dcache();

		/* Re-enable I-cache/D-cache */
		__asm__ __volatile__("ldxa [%%g0] %0, %%g1\n\t"
				     "or %%g1, %1, %%g1\n\t"
				     "stxa %%g1, [%%g0] %0\n\t"
				     "membar #Sync"
				     : /* no outputs */
				     : "i" (ASI_DCU_CONTROL_REG),
				       "i" (DCU_DC | DCU_IC)
				     : "g1");

		/* Re-enable error reporting */
		__asm__ __volatile__("ldxa [%%g0] %0, %%g1\n\t"
				     "or %%g1, %1, %%g1\n\t"
				     "stxa %%g1, [%%g0] %0\n\t"
				     "membar #Sync"
				     : /* no outputs */
				     : "i" (ASI_ESTATE_ERROR_EN),
				       "i" (ESTATE_ERROR_NCEEN | ESTATE_ERROR_CEEN)
				     : "g1");

		(void) cheetah_recheck_errors(NULL);

		pci_poke_faulted = 1;
		regs->tpc += 4;
		regs->tnpc = regs->tpc + 4;
		return;
	}
#endif

	p = cheetah_get_error_log(afsr);
	if (!p) {
		prom_printf("ERROR: Early deferred error afsr[%016lx] afar[%016lx]\n",
			    afsr, afar);
		prom_printf("ERROR: CPU(%d) TPC[%016lx] TNPC[%016lx] TSTATE[%016lx]\n",
			    smp_processor_id(), regs->tpc, regs->tnpc, regs->tstate);
		prom_halt();
	}

	/* Grab snapshot of logged error. */
	memcpy(&local_snapshot, p, sizeof(local_snapshot));

	/* If the current trap snapshot does not match what the
	 * trap handler passed along into our args, big trouble.
	 * In such a case, mark the local copy as invalid.
	 *
	 * Else, it matches and we mark the afsr in the non-local
	 * copy as invalid so we may log new error traps there.
	 */
	if (p->afsr != afsr || p->afar != afar)
		local_snapshot.afsr = CHAFSR_INVALID;
	else
		p->afsr = CHAFSR_INVALID;

	is_memory = cheetah_check_main_memory(afar);

	{
		int flush_all, flush_line;

		flush_all = flush_line = 0;
		if ((afsr & CHAFSR_EDU) != 0UL) {
			if ((afsr & CHAFSR_ERRORS) == CHAFSR_EDU)
				flush_line = 1;
			else
				flush_all = 1;
		} else if ((afsr & CHAFSR_BERR) != 0UL) {
			if ((afsr & CHAFSR_ERRORS) == CHAFSR_BERR)
				flush_line = 1;
			else
				flush_all = 1;
		}

		cheetah_flush_icache();
		cheetah_flush_dcache();

		/* Re-enable I/D caches */
		__asm__ __volatile__("ldxa [%%g0] %0, %%g1\n\t"
				     "or %%g1, %1, %%g1\n\t"
				     "stxa %%g1, [%%g0] %0\n\t"
				     "membar #Sync"
				     : /* no outputs */
				     : "i" (ASI_DCU_CONTROL_REG),
				     "i" (DCU_IC | DCU_DC)
				     : "g1");

		if (flush_all)
			cheetah_flush_ecache();
		else if (flush_line)
			cheetah_flush_ecache_line(afar);
	}

	/* Re-enable error reporting */
	__asm__ __volatile__("ldxa [%%g0] %0, %%g1\n\t"
			     "or %%g1, %1, %%g1\n\t"
			     "stxa %%g1, [%%g0] %0\n\t"
			     "membar #Sync"
			     : /* no outputs */
			     : "i" (ASI_ESTATE_ERROR_EN),
			     "i" (ESTATE_ERROR_NCEEN | ESTATE_ERROR_CEEN)
			     : "g1");

	/* Decide if we can continue after handling this trap and
	 * logging the error.
	 */
	recoverable = 1;
	if (afsr & (CHAFSR_PERR | CHAFSR_IERR | CHAFSR_ISAP))
		recoverable = 0;

	/* Re-check AFSR/AFAR.  What we are looking for here is whether a new
	 * error was logged while we had error reporting traps disabled.
	 */
	if (cheetah_recheck_errors(&local_snapshot)) {
		unsigned long new_afsr = local_snapshot.afsr;

		/* If we got a new asynchronous error, die... */
		if (new_afsr & (CHAFSR_EMU | CHAFSR_EDU |
				CHAFSR_WDU | CHAFSR_CPU |
				CHAFSR_IVU | CHAFSR_UE |
				CHAFSR_BERR | CHAFSR_TO))
			recoverable = 0;
	}

	/* Log errors. */
	cheetah_log_errors(regs, &local_snapshot, afsr, afar, recoverable);

	/* "Recoverable" here means we try to yank the page from ever
	 * being newly used again.  This depends upon a few things:
	 * 1) Must be main memory, and AFAR must be valid.
	 * 2) If we trapped from use, OK.
	 * 3) Else, if we trapped from kernel we must find exception
	 *    table entry (ie. we have to have been accessing user
	 *    space).
	 *
	 * If AFAR is not in main memory, or we trapped from kernel
	 * and cannot find an exception table entry, it is unacceptable
	 * to try and continue.
	 */
	if (recoverable && is_memory) {
		if ((regs->tstate & TSTATE_PRIV) == 0UL) {
			/* OK, usermode access. */
			recoverable = 1;
		} else {
			unsigned long g2 = regs->u_regs[UREG_G2];
			unsigned long fixup = search_exception_table(regs->tpc, &g2);

			if (fixup != 0UL) {
				/* OK, kernel access to userspace. */
				recoverable = 1;

			} else {
				/* BAD, privileged state is corrupted. */
				recoverable = 0;
			}

			if (recoverable) {
				struct page *page = virt_to_page(__va(afar));

				if (VALID_PAGE(page))
					get_page(page);
				else
					recoverable = 0;

				/* Only perform fixup if we still have a
				 * recoverable condition.
				 */
				if (fixup != 0UL && recoverable) {
					regs->tpc = fixup;
					regs->tnpc = regs->tpc + 4;
					regs->u_regs[UREG_G2] = g2;
				}
			}
		}
	} else {
		recoverable = 0;
	}

	if (!recoverable)
		panic("Irrecoverable deferred error trap.\n");
}

void do_fpe_common(struct pt_regs *regs)
{
	if(regs->tstate & TSTATE_PRIV) {
		regs->tpc = regs->tnpc;
		regs->tnpc += 4;
	} else {
		unsigned long fsr = current->thread.xfsr[0];
		siginfo_t info;

		if ((current->thread.flags & SPARC_FLAG_32BIT) != 0) {
			regs->tpc &= 0xffffffff;
			regs->tnpc &= 0xffffffff;
		}
		info.si_signo = SIGFPE;
		info.si_errno = 0;
		info.si_addr = (void *)regs->tpc;
		info.si_trapno = 0;
		info.si_code = __SI_FAULT;
		if ((fsr & 0x1c000) == (1 << 14)) {
			if (fsr & 0x10)
				info.si_code = FPE_FLTINV;
			else if (fsr & 0x08)
				info.si_code = FPE_FLTOVF;
			else if (fsr & 0x04)
				info.si_code = FPE_FLTUND;
			else if (fsr & 0x02)
				info.si_code = FPE_FLTDIV;
			else if (fsr & 0x01)
				info.si_code = FPE_FLTRES;
		}
		force_sig_info(SIGFPE, &info, current);
	}
}

void do_fpieee(struct pt_regs *regs)
{
	do_fpe_common(regs);
}

extern int do_mathemu(struct pt_regs *, struct fpustate *);

void do_fpother(struct pt_regs *regs)
{
	struct fpustate *f = FPUSTATE;
	int ret = 0;

	switch ((current->thread.xfsr[0] & 0x1c000)) {
	case (2 << 14): /* unfinished_FPop */
	case (3 << 14): /* unimplemented_FPop */
		ret = do_mathemu(regs, f);
		break;
	}
	if (ret)
		return;
	do_fpe_common(regs);
}

void do_tof(struct pt_regs *regs)
{
	siginfo_t info;

	if(regs->tstate & TSTATE_PRIV)
		die_if_kernel("Penguin overflow trap from kernel mode", regs);
	if ((current->thread.flags & SPARC_FLAG_32BIT) != 0) {
		regs->tpc &= 0xffffffff;
		regs->tnpc &= 0xffffffff;
	}
	info.si_signo = SIGEMT;
	info.si_errno = 0;
	info.si_code = EMT_TAGOVF;
	info.si_addr = (void *)regs->tpc;
	info.si_trapno = 0;
	force_sig_info(SIGEMT, &info, current);
}

void do_div0(struct pt_regs *regs)
{
	siginfo_t info;

	if ((current->thread.flags & SPARC_FLAG_32BIT) != 0) {
		regs->tpc &= 0xffffffff;
		regs->tnpc &= 0xffffffff;
	}
	info.si_signo = SIGFPE;
	info.si_errno = 0;
	info.si_code = FPE_INTDIV;
	info.si_addr = (void *)regs->tpc;
	info.si_trapno = 0;
	force_sig_info(SIGFPE, &info, current);
}

void instruction_dump (unsigned int *pc)
{
	int i;

	if((((unsigned long) pc) & 3))
		return;

	printk("Instruction DUMP:");
	for(i = -3; i < 6; i++)
		printk("%c%08x%c",i?' ':'<',pc[i],i?' ':'>');
	printk("\n");
}

void user_instruction_dump (unsigned int *pc)
{
	int i;
	unsigned int buf[9];
	
	if((((unsigned long) pc) & 3))
		return;
		
	if(copy_from_user(buf, pc - 3, sizeof(buf)))
		return;

	printk("Instruction DUMP:");
	for(i = 0; i < 9; i++)
		printk("%c%08x%c",i==3?' ':'<',buf[i],i==3?' ':'>');
	printk("\n");
}

void show_trace_task(struct task_struct *tsk)
{
	unsigned long pc, fp;
	unsigned long task_base = (unsigned long)tsk;
	struct reg_window *rw;
	int count = 0;

	if (!tsk)
		return;

	fp = tsk->thread.ksp + STACK_BIAS;
	do {
		/* Bogus frame pointer? */
		if (fp < (task_base + sizeof(struct task_struct)) ||
		    fp >= (task_base + THREAD_SIZE))
			break;
		rw = (struct reg_window *)fp;
		pc = rw->ins[7];
		printk("[%016lx] ", pc);
		fp = rw->ins[6] + STACK_BIAS;
	} while (++count < 16);
	printk("\n");
}

void die_if_kernel(char *str, struct pt_regs *regs)
{
	extern void __show_regs(struct pt_regs * regs);
	extern void smp_report_regs(void);
	int count = 0;
	struct reg_window *lastrw;
	
	/* Amuse the user. */
	printk(
"              \\|/ ____ \\|/\n"
"              \"@'/ .. \\`@\"\n"
"              /_| \\__/ |_\\\n"
"                 \\__U_/\n");

	printk("%s(%d): %s\n", current->comm, current->pid, str);
	__asm__ __volatile__("flushw");
	__show_regs(regs);
	if(regs->tstate & TSTATE_PRIV) {
		struct reg_window *rw = (struct reg_window *)
			(regs->u_regs[UREG_FP] + STACK_BIAS);

		/* Stop the back trace when we hit userland or we
		 * find some badly aligned kernel stack.
		 */
		lastrw = (struct reg_window *)current;
		while(rw					&&
		      count++ < 30				&&
		      rw >= lastrw				&&
		      (char *) rw < ((char *) current)
		        + sizeof (union task_union) 		&&
		      !(((unsigned long) rw) & 0x7)) {
			printk("Caller[%016lx]\n", rw->ins[7]);
			lastrw = rw;
			rw = (struct reg_window *)
				(rw->ins[6] + STACK_BIAS);
		}
		instruction_dump ((unsigned int *) regs->tpc);
	} else {
		if ((current->thread.flags & SPARC_FLAG_32BIT) != 0) {
			regs->tpc &= 0xffffffff;
			regs->tnpc &= 0xffffffff;
		}
		user_instruction_dump ((unsigned int *) regs->tpc);
	}
#ifdef CONFIG_SMP
	smp_report_regs();
#endif
                                                	
	if(regs->tstate & TSTATE_PRIV)
		do_exit(SIGKILL);
	do_exit(SIGSEGV);
}

extern int handle_popc(u32 insn, struct pt_regs *regs);
extern int handle_ldf_stq(u32 insn, struct pt_regs *regs);

void do_illegal_instruction(struct pt_regs *regs)
{
	unsigned long pc = regs->tpc;
	unsigned long tstate = regs->tstate;
	u32 insn;
	siginfo_t info;

	if(tstate & TSTATE_PRIV)
		die_if_kernel("Kernel illegal instruction", regs);
	if(current->thread.flags & SPARC_FLAG_32BIT)
		pc = (u32)pc;
	if (get_user(insn, (u32 *)pc) != -EFAULT) {
		if ((insn & 0xc1ffc000) == 0x81700000) /* POPC */ {
			if (handle_popc(insn, regs))
				return;
		} else if ((insn & 0xc1580000) == 0xc1100000) /* LDQ/STQ */ {
			if (handle_ldf_stq(insn, regs))
				return;
		}
	}
	info.si_signo = SIGILL;
	info.si_errno = 0;
	info.si_code = ILL_ILLOPC;
	info.si_addr = (void *)pc;
	info.si_trapno = 0;
	force_sig_info(SIGILL, &info, current);
}

void mem_address_unaligned(struct pt_regs *regs, unsigned long sfar, unsigned long sfsr)
{
	siginfo_t info;

	if(regs->tstate & TSTATE_PRIV) {
		extern void kernel_unaligned_trap(struct pt_regs *regs,
						  unsigned int insn, 
						  unsigned long sfar, unsigned long sfsr);

		return kernel_unaligned_trap(regs, *((unsigned int *)regs->tpc), sfar, sfsr);
	}
	info.si_signo = SIGBUS;
	info.si_errno = 0;
	info.si_code = BUS_ADRALN;
	info.si_addr = (void *)sfar;
	info.si_trapno = 0;
	force_sig_info(SIGBUS, &info, current);
}

void do_privop(struct pt_regs *regs)
{
	siginfo_t info;

	if ((current->thread.flags & SPARC_FLAG_32BIT) != 0) {
		regs->tpc &= 0xffffffff;
		regs->tnpc &= 0xffffffff;
	}
	info.si_signo = SIGILL;
	info.si_errno = 0;
	info.si_code = ILL_PRVOPC;
	info.si_addr = (void *)regs->tpc;
	info.si_trapno = 0;
	force_sig_info(SIGILL, &info, current);
}

void do_privact(struct pt_regs *regs)
{
	do_privop(regs);
}

/* Trap level 1 stuff or other traps we should never see... */
void do_cee(struct pt_regs *regs)
{
	die_if_kernel("TL0: Cache Error Exception", regs);
}

void do_cee_tl1(struct pt_regs *regs)
{
	die_if_kernel("TL1: Cache Error Exception", regs);
}

void do_dae_tl1(struct pt_regs *regs)
{
	die_if_kernel("TL1: Data Access Exception", regs);
}

void do_iae_tl1(struct pt_regs *regs)
{
	die_if_kernel("TL1: Instruction Access Exception", regs);
}

void do_div0_tl1(struct pt_regs *regs)
{
	die_if_kernel("TL1: DIV0 Exception", regs);
}

void do_fpdis_tl1(struct pt_regs *regs)
{
	die_if_kernel("TL1: FPU Disabled", regs);
}

void do_fpieee_tl1(struct pt_regs *regs)
{
	die_if_kernel("TL1: FPU IEEE Exception", regs);
}

void do_fpother_tl1(struct pt_regs *regs)
{
	die_if_kernel("TL1: FPU Other Exception", regs);
}

void do_ill_tl1(struct pt_regs *regs)
{
	die_if_kernel("TL1: Illegal Instruction Exception", regs);
}

void do_irq_tl1(struct pt_regs *regs)
{
	die_if_kernel("TL1: IRQ Exception", regs);
}

void do_lddfmna_tl1(struct pt_regs *regs)
{
	die_if_kernel("TL1: LDDF Exception", regs);
}

void do_stdfmna_tl1(struct pt_regs *regs)
{
	die_if_kernel("TL1: STDF Exception", regs);
}

void do_paw(struct pt_regs *regs)
{
	die_if_kernel("TL0: Phys Watchpoint Exception", regs);
}

void do_paw_tl1(struct pt_regs *regs)
{
	die_if_kernel("TL1: Phys Watchpoint Exception", regs);
}

void do_vaw(struct pt_regs *regs)
{
	die_if_kernel("TL0: Virt Watchpoint Exception", regs);
}

void do_vaw_tl1(struct pt_regs *regs)
{
	die_if_kernel("TL1: Virt Watchpoint Exception", regs);
}

void do_tof_tl1(struct pt_regs *regs)
{
	die_if_kernel("TL1: Tag Overflow Exception", regs);
}

void do_getpsr(struct pt_regs *regs)
{
	regs->u_regs[UREG_I0] = tstate_to_psr(regs->tstate);
	regs->tpc   = regs->tnpc;
	regs->tnpc += 4;
	if ((current->thread.flags & SPARC_FLAG_32BIT) != 0) {
		regs->tpc &= 0xffffffff;
		regs->tnpc &= 0xffffffff;
	}
}

void trap_init(void)
{
	/* Attach to the address space of init_task. */
	atomic_inc(&init_mm.mm_count);
	current->active_mm = &init_mm;

	/* NOTE: Other cpus have this done as they are started
	 *       up on SMP.
	 */
}
/* ptrace.c: Sparc process tracing support.
 *
 * Copyright (C) 1996 David S. Miller (davem@caipfs.rutgers.edu)
 * Copyright (C) 1997 Jakub Jelinek (jj@sunsite.mff.cuni.cz)
 *
 * Based upon code written by Ross Biro, Linus Torvalds, Bob Manson,
 * and David Mosberger.
 *
 * Added Linux support -miguel (weird, eh?, the orignal code was meant
 * to emulate SunOS).
 */

#include <linux/kernel.h>
#include <linux/sched.h>
#include <linux/mm.h>
#include <linux/errno.h>
#include <linux/ptrace.h>
#include <linux/user.h>
#include <linux/smp.h>
#include <linux/smp_lock.h>

#include <asm/asi.h>
#include <asm/pgtable.h>
#include <asm/system.h>
#include <asm/uaccess.h>
#include <asm/psrcompat.h>
#include <asm/visasm.h>
#include <asm/spitfire.h>

#define MAGIC_CONSTANT 0x80000000

/* Returning from ptrace is a bit tricky because the syscall return
 * low level code assumes any value returned which is negative and
 * is a valid errno will mean setting the condition codes to indicate
 * an error return.  This doesn't work, so we have this hook.
 */
static inline void pt_error_return(struct pt_regs *regs, unsigned long error)
{
	regs->u_regs[UREG_I0] = error;
	regs->tstate |= (TSTATE_ICARRY | TSTATE_XCARRY);
	regs->tpc = regs->tnpc;
	regs->tnpc += 4;
}

static inline void pt_succ_return(struct pt_regs *regs, unsigned long value)
{
	regs->u_regs[UREG_I0] = value;
	regs->tstate &= ~(TSTATE_ICARRY | TSTATE_XCARRY);
	regs->tpc = regs->tnpc;
	regs->tnpc += 4;
}

static inline void
pt_succ_return_linux(struct pt_regs *regs, unsigned long value, long *addr)
{
	if (current->thread.flags & SPARC_FLAG_32BIT) {
		if (put_user(value, (unsigned int *)addr))
			return pt_error_return(regs, EFAULT);
	} else {
		if (put_user(value, addr))
			return pt_error_return(regs, EFAULT);
	}
	regs->u_regs[UREG_I0] = 0;
	regs->tstate &= ~(TSTATE_ICARRY | TSTATE_XCARRY);
	regs->tpc = regs->tnpc;
	regs->tnpc += 4;
}

static void
pt_os_succ_return (struct pt_regs *regs, unsigned long val, long *addr)
{
	if (current->personality == PER_SUNOS)
		pt_succ_return (regs, val);
	else
		pt_succ_return_linux (regs, val, addr);
}

/* #define ALLOW_INIT_TRACING */
/* #define DEBUG_PTRACE */

#ifdef DEBUG_PTRACE
char *pt_rq [] = {
"TRACEME",
"PEEKTEXT",
"PEEKDATA",
"PEEKUSR",
"POKETEXT",
"POKEDATA",
"POKEUSR",
"CONT",
"KILL",
"SINGLESTEP",
"SUNATTACH",
"SUNDETACH",
"GETREGS",
"SETREGS",
"GETFPREGS",
"SETFPREGS",
"READDATA",
"WRITEDATA",
"READTEXT",
"WRITETEXT",
"GETFPAREGS",
"SETFPAREGS",
""
};
#endif

/*
 * Called by kernel/ptrace.c when detaching..
 *
 * Make sure single step bits etc are not set.
 */
void ptrace_disable(struct task_struct *child)
{
	/* nothing to do */
}

asmlinkage void do_ptrace(struct pt_regs *regs)
{
	int request = regs->u_regs[UREG_I0];
	pid_t pid = regs->u_regs[UREG_I1];
	unsigned long addr = regs->u_regs[UREG_I2];
	unsigned long data = regs->u_regs[UREG_I3];
	unsigned long addr2 = regs->u_regs[UREG_I4];
	struct task_struct *child;

	if (current->thread.flags & SPARC_FLAG_32BIT) {
		addr &= 0xffffffffUL;
		data &= 0xffffffffUL;
		addr2 &= 0xffffffffUL;
	}
	lock_kernel();
#ifdef DEBUG_PTRACE
	{
		char *s;

		if ((request > 0) && (request < 21))
			s = pt_rq [request];
		else
			s = "unknown";

		if (request == PTRACE_POKEDATA && data == 0x91d02001){
			printk ("do_ptrace: breakpoint pid=%d, addr=%016lx addr2=%016lx\n",
				pid, addr, addr2);
		} else 
			printk("do_ptrace: rq=%s(%d) pid=%d addr=%016lx data=%016lx addr2=%016lx\n",
			       s, request, pid, addr, data, addr2);
	}
#endif
	if (request == PTRACE_TRACEME) {
		/* are we already being traced? */
		if (current->ptrace & PT_PTRACED) {
			pt_error_return(regs, EPERM);
			goto out;
		}
		/* set the ptrace bit in the process flags. */
		current->ptrace |= PT_PTRACED;
		pt_succ_return(regs, 0);
		goto out;
	}
#ifndef ALLOW_INIT_TRACING
	if (pid == 1) {
		/* Can't dork with init. */
		pt_error_return(regs, EPERM);
		goto out;
	}
#endif
	read_lock(&tasklist_lock);
	child = find_task_by_pid(pid);
	if (child)
		get_task_struct(child);
	read_unlock(&tasklist_lock);

	if (!child) {
		pt_error_return(regs, ESRCH);
		goto out;
	}

	if ((current->personality == PER_SUNOS && request == PTRACE_SUNATTACH)
	    || (current->personality != PER_SUNOS && request == PTRACE_ATTACH)) {
		if (ptrace_attach(child)) {
			pt_error_return(regs, EPERM);
			goto out_tsk;
		}
		pt_succ_return(regs, 0);
		goto out_tsk;
	}
	if (!(child->ptrace & PT_PTRACED)) {
		pt_error_return(regs, ESRCH);
		goto out_tsk;
	}
	if (child->state != TASK_STOPPED) {
		if (request != PTRACE_KILL) {
			pt_error_return(regs, ESRCH);
			goto out_tsk;
		}
	}
	if (child->p_pptr != current) {
		pt_error_return(regs, ESRCH);
		goto out_tsk;
	}

	if (!(child->thread.flags & SPARC_FLAG_32BIT)	&&
	    ((request == PTRACE_READDATA64)		||
	     (request == PTRACE_WRITEDATA64)		||
	     (request == PTRACE_READTEXT64)		||
	     (request == PTRACE_WRITETEXT64)		||
	     (request == PTRACE_PEEKTEXT64)		||
	     (request == PTRACE_POKETEXT64)		||
	     (request == PTRACE_PEEKDATA64)		||
	     (request == PTRACE_POKEDATA64))) {
		addr = regs->u_regs[UREG_G2];
		addr2 = regs->u_regs[UREG_G3];
		request -= 30; /* wheee... */
	}

	switch(request) {
	case PTRACE_PEEKTEXT: /* read word at location addr. */ 
	case PTRACE_PEEKDATA: {
		unsigned long tmp64;
		unsigned int tmp32;
		int res, copied;

		res = -EIO;
		if (current->thread.flags & SPARC_FLAG_32BIT) {
			copied = access_process_vm(child, addr,
						   &tmp32, sizeof(tmp32), 0);
			tmp64 = (unsigned long) tmp32;
			if (copied == sizeof(tmp32))
				res = 0;
		} else {
			copied = access_process_vm(child, addr,
						   &tmp64, sizeof(tmp64), 0);
			if (copied == sizeof(tmp64))
				res = 0;
		}
		if (res < 0)
			pt_error_return(regs, -res);
		else
			pt_os_succ_return(regs, tmp64, (long *) data);
		goto flush_and_out;
	}

	case PTRACE_POKETEXT: /* write the word at location addr. */
	case PTRACE_POKEDATA: {
		unsigned long tmp64;
		unsigned int tmp32;
		int copied, res = -EIO;

		if (current->thread.flags & SPARC_FLAG_32BIT) {
			tmp32 = data;
			copied = access_process_vm(child, addr,
						   &tmp32, sizeof(tmp32), 1);
			if (copied == sizeof(tmp32))
				res = 0;
		} else {
			tmp64 = data;
			copied = access_process_vm(child, addr,
						   &tmp64, sizeof(tmp64), 1);
			if (copied == sizeof(tmp64))
				res = 0;
		}
		if (res < 0)
			pt_error_return(regs, -res);
		else
			pt_succ_return(regs, res);
		goto flush_and_out;
	}

	case PTRACE_GETREGS: {
		struct pt_regs32 *pregs = (struct pt_regs32 *) addr;
		struct pt_regs *cregs = child->thread.kregs;
		int rval;

		if (__put_user(tstate_to_psr(cregs->tstate), (&pregs->psr)) ||
		    __put_user(cregs->tpc, (&pregs->pc)) ||
		    __put_user(cregs->tnpc, (&pregs->npc)) ||
		    __put_user(cregs->y, (&pregs->y))) {
			pt_error_return(regs, EFAULT);
			goto out_tsk;
		}
		for (rval = 1; rval < 16; rval++)
			if (__put_user(cregs->u_regs[rval], (&pregs->u_regs[rval - 1]))) {
				pt_error_return(regs, EFAULT);
				goto out_tsk;
			}
		pt_succ_return(regs, 0);
#ifdef DEBUG_PTRACE
		printk ("PC=%lx nPC=%lx o7=%lx\n", cregs->tpc, cregs->tnpc, cregs->u_regs [15]);
#endif
		goto out_tsk;
	}

	case PTRACE_GETREGS64: {
		struct pt_regs *pregs = (struct pt_regs *) addr;
		struct pt_regs *cregs = child->thread.kregs;
		unsigned long tpc = cregs->tpc;
		int rval;

		if ((child->thread.flags & SPARC_FLAG_32BIT) != 0)
			tpc &= 0xffffffff;
		if (__put_user(cregs->tstate, (&pregs->tstate)) ||
		    __put_user(tpc, (&pregs->tpc)) ||
		    __put_user(cregs->tnpc, (&pregs->tnpc)) ||
		    __put_user(cregs->y, (&pregs->y))) {
			pt_error_return(regs, EFAULT);
			goto out_tsk;
		}
		for (rval = 1; rval < 16; rval++)
			if (__put_user(cregs->u_regs[rval], (&pregs->u_regs[rval - 1]))) {
				pt_error_return(regs, EFAULT);
				goto out_tsk;
			}
		pt_succ_return(regs, 0);
#ifdef DEBUG_PTRACE
		printk ("PC=%lx nPC=%lx o7=%lx\n", cregs->tpc, cregs->tnpc, cregs->u_regs [15]);
#endif
		goto out_tsk;
	}

	case PTRACE_SETREGS: {
		struct pt_regs32 *pregs = (struct pt_regs32 *) addr;
		struct pt_regs *cregs = child->thread.kregs;
		unsigned int psr, pc, npc, y;
		int i;

		/* Must be careful, tracing process can only set certain
		 * bits in the psr.
		 */
		if (__get_user(psr, (&pregs->psr)) ||
		    __get_user(pc, (&pregs->pc)) ||
		    __get_user(npc, (&pregs->npc)) ||
		    __get_user(y, (&pregs->y))) {
			pt_error_return(regs, EFAULT);
			goto out_tsk;
		}
		cregs->tstate &= ~(TSTATE_ICC);
		cregs->tstate |= psr_to_tstate_icc(psr);
               	if (!((pc | npc) & 3)) {
			cregs->tpc = pc;
			cregs->tnpc = npc;
		}
		cregs->y = y;
		for (i = 1; i < 16; i++) {
			if (__get_user(cregs->u_regs[i], (&pregs->u_regs[i-1]))) {
				pt_error_return(regs, EFAULT);
				goto out_tsk;
			}
		}
		pt_succ_return(regs, 0);
		goto out_tsk;
	}

	case PTRACE_SETREGS64: {
		struct pt_regs *pregs = (struct pt_regs *) addr;
		struct pt_regs *cregs = child->thread.kregs;
		unsigned long tstate, tpc, tnpc, y;
		int i;

		/* Must be careful, tracing process can only set certain
		 * bits in the psr.
		 */
		if (__get_user(tstate, (&pregs->tstate)) ||
		    __get_user(tpc, (&pregs->tpc)) ||
		    __get_user(tnpc, (&pregs->tnpc)) ||
		    __get_user(y, (&pregs->y))) {
			pt_error_return(regs, EFAULT);
			goto out_tsk;
		}
		if ((child->thread.flags & SPARC_FLAG_32BIT) != 0) {
			tpc &= 0xffffffff;
			tnpc &= 0xffffffff;
		}
		tstate &= (TSTATE_ICC | TSTATE_XCC);
		cregs->tstate &= ~(TSTATE_ICC | TSTATE_XCC);
		cregs->tstate |= tstate;
		if (!((tpc | tnpc) & 3)) {
			cregs->tpc = tpc;
			cregs->tnpc = tnpc;
		}
		cregs->y = y;
		for (i = 1; i < 16; i++) {
			if (__get_user(cregs->u_regs[i], (&pregs->u_regs[i-1]))) {
				pt_error_return(regs, EFAULT);
				goto out_tsk;
			}
		}
		pt_succ_return(regs, 0);
		goto out_tsk;
	}

	case PTRACE_GETFPREGS: {
		struct fps {
			unsigned int regs[32];
			unsigned int fsr;
			unsigned int flags;
			unsigned int extra;
			unsigned int fpqd;
			struct fq {
				unsigned int insnaddr;
				unsigned int insn;
			} fpq[16];
		} *fps = (struct fps *) addr;
		unsigned long *fpregs = (unsigned long *)(((char *)child) + AOFF_task_fpregs);

		if (copy_to_user(&fps->regs[0], fpregs,
				 (32 * sizeof(unsigned int))) ||
		    __put_user(child->thread.xfsr[0], (&fps->fsr)) ||
		    __put_user(0, (&fps->fpqd)) ||
		    __put_user(0, (&fps->flags)) ||
		    __put_user(0, (&fps->extra)) ||
		    clear_user(&fps->fpq[0], 32 * sizeof(unsigned int))) {
			pt_error_return(regs, EFAULT);
			goto out_tsk;
		}
		pt_succ_return(regs, 0);
		goto out_tsk;
	}

	case PTRACE_GETFPREGS64: {
		struct fps {
			unsigned int regs[64];
			unsigned long fsr;
		} *fps = (struct fps *) addr;
		unsigned long *fpregs = (unsigned long *)(((char *)child) + AOFF_task_fpregs);

		if (copy_to_user(&fps->regs[0], fpregs,
				 (64 * sizeof(unsigned int))) ||
		    __put_user(child->thread.xfsr[0], (&fps->fsr))) {
			pt_error_return(regs, EFAULT);
			goto out_tsk;
		}
		pt_succ_return(regs, 0);
		goto out_tsk;
	}

	case PTRACE_SETFPREGS: {
		struct fps {
			unsigned int regs[32];
			unsigned int fsr;
			unsigned int flags;
			unsigned int extra;
			unsigned int fpqd;
			struct fq {
				unsigned int insnaddr;
				unsigned int insn;
			} fpq[16];
		} *fps = (struct fps *) addr;
		unsigned long *fpregs = (unsigned long *)(((char *)child) + AOFF_task_fpregs);
		unsigned fsr;

		if (copy_from_user(fpregs, &fps->regs[0],
				   (32 * sizeof(unsigned int))) ||
		    __get_user(fsr, (&fps->fsr))) {
			pt_error_return(regs, EFAULT);
			goto out_tsk;
		}
		child->thread.xfsr[0] &= 0xffffffff00000000UL;
		child->thread.xfsr[0] |= fsr;
		if (!(child->thread.fpsaved[0] & FPRS_FEF))
			child->thread.gsr[0] = 0;
		child->thread.fpsaved[0] |= (FPRS_FEF | FPRS_DL);
		pt_succ_return(regs, 0);
		goto out_tsk;
	}

	case PTRACE_SETFPREGS64: {
		struct fps {
			unsigned int regs[64];
			unsigned long fsr;
		} *fps = (struct fps *) addr;
		unsigned long *fpregs = (unsigned long *)(((char *)child) + AOFF_task_fpregs);

		if (copy_from_user(fpregs, &fps->regs[0],
				   (64 * sizeof(unsigned int))) ||
		    __get_user(child->thread.xfsr[0], (&fps->fsr))) {
			pt_error_return(regs, EFAULT);
			goto out_tsk;
		}
		if (!(child->thread.fpsaved[0] & FPRS_FEF))
			child->thread.gsr[0] = 0;
		child->thread.fpsaved[0] |= (FPRS_FEF | FPRS_DL | FPRS_DU);
		pt_succ_return(regs, 0);
		goto out_tsk;
	}

	case PTRACE_READTEXT:
	case PTRACE_READDATA: {
		int res = ptrace_readdata(child, addr,
					  (void *)addr2, data);
		if (res == data) {
			pt_succ_return(regs, 0);
			goto flush_and_out;
		}
		if (res >= 0)
			res = -EIO;
		pt_error_return(regs, -res);
		goto flush_and_out;
	}

	case PTRACE_WRITETEXT:
	case PTRACE_WRITEDATA: {
		int res = ptrace_writedata(child, (void *) addr2,
					   addr, data);
		if (res == data) {
			pt_succ_return(regs, 0);
			goto flush_and_out;
		}
		if (res >= 0)
			res = -EIO;
		pt_error_return(regs, -res);
		goto flush_and_out;
	}
	case PTRACE_SYSCALL: /* continue and stop at (return from) syscall */
		addr = 1;

	case PTRACE_CONT: { /* restart after signal. */
		if (data > _NSIG) {
			pt_error_return(regs, EIO);
			goto out_tsk;
		}
		if (addr != 1) {
			unsigned long pc_mask = ~0UL;

			if ((child->thread.flags & SPARC_FLAG_32BIT) != 0)
				pc_mask = 0xffffffff;

			if (addr & 3) {
				pt_error_return(regs, EINVAL);
				goto out_tsk;
			}
#ifdef DEBUG_PTRACE
			printk ("Original: %016lx %016lx\n", child->thread.kregs->tpc, child->thread.kregs->tnpc);
			printk ("Continuing with %016lx %016lx\n", addr, addr+4);
#endif
			child->thread.kregs->tpc = (addr & pc_mask);
			child->thread.kregs->tnpc = ((addr + 4) & pc_mask);
		}

		if (request == PTRACE_SYSCALL)
			child->ptrace |= PT_TRACESYS;
		else
			child->ptrace &= ~PT_TRACESYS;

		child->exit_code = data;
#ifdef DEBUG_PTRACE
		printk("CONT: %s [%d]: set exit_code = %x %lx %lx\n", child->comm,
			child->pid, child->exit_code,
			child->thread.kregs->tpc,
			child->thread.kregs->tnpc);
		       
#endif
		wake_up_process(child);
		pt_succ_return(regs, 0);
		goto out_tsk;
	}

/*
 * make the child exit.  Best I can do is send it a sigkill. 
 * perhaps it should be put in the status that it wants to 
 * exit.
 */
	case PTRACE_KILL: {
		if (child->state == TASK_ZOMBIE) {	/* already dead */
			pt_succ_return(regs, 0);
			goto out_tsk;
		}
		child->exit_code = SIGKILL;
		wake_up_process(child);
		pt_succ_return(regs, 0);
		goto out_tsk;
	}

	case PTRACE_SUNDETACH: { /* detach a process that was attached. */
		int error = ptrace_detach(child, data);
		if (error) {
			pt_error_return(regs, EIO);
			goto out_tsk;
		}
		pt_succ_return(regs, 0);
		goto out_tsk;
	}

	/* PTRACE_DUMPCORE unsupported... */

	default:
		pt_error_return(regs, EIO);
		goto out_tsk;
	}
flush_and_out:
	{
		unsigned long va;

		if (tlb_type == cheetah) {
			for (va = 0; va < (1 << 16); va += (1 << 5))
				spitfire_put_dcache_tag(va, 0x0);
			/* No need to mess with I-cache on Cheetah. */
		} else {
			for (va =  0; va < L1DCACHE_SIZE; va += 32)
				spitfire_put_dcache_tag(va, 0x0);
			if (request == PTRACE_PEEKTEXT ||
			    request == PTRACE_POKETEXT ||
			    request == PTRACE_READTEXT ||
			    request == PTRACE_WRITETEXT) {
				for (va =  0; va < (PAGE_SIZE << 1); va += 32)
					spitfire_put_icache_tag(va, 0x0);
				__asm__ __volatile__("flush %g6");
			}
		}
	}
out_tsk:
	if (child)
		free_task_struct(child);
out:
	unlock_kernel();
}

asmlinkage void syscall_trace(void)
{
#ifdef DEBUG_PTRACE
	printk("%s [%d]: syscall_trace\n", current->comm, current->pid);
#endif
	if ((current->ptrace & (PT_PTRACED|PT_TRACESYS))
	    != (PT_PTRACED|PT_TRACESYS))
		return;
	current->exit_code = SIGTRAP;
	current->state = TASK_STOPPED;
	current->thread.flags ^= MAGIC_CONSTANT;
	notify_parent(current, SIGCHLD);
	schedule();
	/*
	 * this isn't the same as continuing with a signal, but it will do
	 * for normal use.  strace only continues with a signal if the
	 * stopping signal is not SIGTRAP.  -brl
	 */
#ifdef DEBUG_PTRACE
	printk("%s [%d]: syscall_trace exit= %x\n", current->comm,
		current->pid, current->exit_code);
#endif
	if (current->exit_code) {
		send_sig (current->exit_code, current, 1);
		current->exit_code = 0;
	}
}
/* $Id: winfixup.S,v 1.29 2000/03/26 09:13:48 davem Exp $
 *
 * winfixup.S: Handle cases where user stack pointer is found to be bogus.
 *
 * Copyright (C) 1997 David S. Miller (davem@caip.rutgers.edu)
 */

#include <asm/asi.h>
#include <asm/head.h>
#include <asm/page.h>
#include <asm/ptrace.h>
#include <asm/processor.h>
#include <asm/spitfire.h>
#include <asm/asm_offsets.h>

	.text
	.align	32

	/* Here are the rules, pay attention.
	 *
	 * The kernel is disallowed from touching user space while
	 * the trap level is greater than zero, except for from within
	 * the window spill/fill handlers.  This must be followed
	 * so that we can easily detect the case where we tried to
	 * spill/fill with a bogus (or unmapped) user stack pointer.
	 *
	 * These are layed out in a special way for cache reasons,
	 * don't touch...
	 */
	.globl	fill_fixup, spill_fixup
fill_fixup:
	rdpr		%tstate, %g1
	andcc		%g1, TSTATE_PRIV, %g0
	or		%g4, FAULT_CODE_WINFIXUP, %g4
	be,pt		%xcc, window_scheisse_from_user_common
	 and		%g1, TSTATE_CWP, %g1

	/* This is the extremely complex case, but it does happen from
	 * time to time if things are just right.  Essentially the restore
	 * done in rtrap right before going back to user mode, with tl=1
	 * and that levels trap stack registers all setup, took a fill trap,
	 * the user stack was not mapped in the tlb, and tlb miss occurred,
	 * the pte found was not valid, and a simple ref bit watch update
	 * could not satisfy the miss, so we got here.
	 *
	 * We must carefully unwind the state so we get back to tl=0, preserve
	 * all the register values we were going to give to the user.  Luckily
	 * most things are where they need to be, we also have the address
	 * which triggered the fault handy as well.
	 *
	 * Also note that we must preserve %l5 and %l6.  If the user was
	 * returning from a system call, we must make it look this way
	 * after we process the fill fault on the users stack.
	 *
	 * First, get into the window where the original restore was executed.
	 */

	rdpr		%wstate, %g2			! Grab user mode wstate.
	wrpr		%g1, %cwp			! Get into the right window.
	sll		%g2, 3, %g2			! NORMAL-->OTHER

	wrpr		%g0, 0x0, %canrestore		! Standard etrap stuff.
	wrpr		%g2, 0x0, %wstate		! This must be consistant.
	wrpr		%g0, 0x0, %otherwin		! We know this.
	mov		PRIMARY_CONTEXT, %g1		! Change contexts...
	stxa		%g0, [%g1] ASI_DMMU		! Back into the nucleus.
	flush		%g6				! Flush instruction buffers
	rdpr		%pstate, %l1			! Prepare to change globals.
	mov		%g6, %o7			! Get current.

	andn		%l1, PSTATE_MM, %l1		! We want to be in RMO
	stb		%g4, [%g6 + AOFF_task_thread + AOFF_thread_fault_code]
	stx		%g5, [%g6 + AOFF_task_thread + AOFF_thread_fault_address]
	wrpr		%g0, 0x0, %tl			! Out of trap levels.
	wrpr		%l1, (PSTATE_IE | PSTATE_AG | PSTATE_RMO), %pstate
	sethi		%uhi(PAGE_OFFSET), %g4		! Prepare page_offset global reg
	mov		%o7, %g6
	sllx		%g4, 32, %g4			! and finish it...

	/* This is the same as below, except we handle this a bit special
	 * since we must preserve %l5 and %l6, see comment above.
	 */
	call		do_sparc64_fault
	 add		%sp, STACK_BIAS + REGWIN_SZ, %o0
	ba,pt		%xcc, rtrap
	 nop						! yes, nop is correct

	/* Be very careful about usage of the alternate globals here.
	 * You cannot touch %g4/%g5 as that has the fault information
	 * should this be from usermode.  Also be careful for the case
	 * where we get here from the save instruction in etrap.S when
	 * coming from either user or kernel (does not matter which, it
	 * is the same problem in both cases).  Essentially this means
	 * do not touch %g7 or %g2 so we handle the two cases fine.
	 */
spill_fixup:
	ldub		[%g6 + AOFF_task_thread + AOFF_thread_flags], %g1
	andcc		%g1, SPARC_FLAG_32BIT, %g0
	ldub		[%g6 + AOFF_task_thread + AOFF_thread_w_saved], %g1

	sll		%g1, 3, %g3
	add		%g6, %g3, %g3
	stx		%sp, [%g3 + AOFF_task_thread + AOFF_thread_rwbuf_stkptrs]
	sll		%g1, 7, %g3
	bne,pt		%xcc, 1f
	 add		%g6, %g3, %g3
	stx		%l0, [%g3 + AOFF_task_thread + AOFF_thread_reg_window + 0x00]
	stx		%l1, [%g3 + AOFF_task_thread + AOFF_thread_reg_window + 0x08]

	stx		%l2, [%g3 + AOFF_task_thread + AOFF_thread_reg_window + 0x10]
	stx		%l3, [%g3 + AOFF_task_thread + AOFF_thread_reg_window + 0x18]
	stx		%l4, [%g3 + AOFF_task_thread + AOFF_thread_reg_window + 0x20]
	stx		%l5, [%g3 + AOFF_task_thread + AOFF_thread_reg_window + 0x28]
	stx		%l6, [%g3 + AOFF_task_thread + AOFF_thread_reg_window + 0x30]
	stx		%l7, [%g3 + AOFF_task_thread + AOFF_thread_reg_window + 0x38]
	stx		%i0, [%g3 + AOFF_task_thread + AOFF_thread_reg_window + 0x40]
	stx		%i1, [%g3 + AOFF_task_thread + AOFF_thread_reg_window + 0x48]

	stx		%i2, [%g3 + AOFF_task_thread + AOFF_thread_reg_window + 0x50]
	stx		%i3, [%g3 + AOFF_task_thread + AOFF_thread_reg_window + 0x58]
	stx		%i4, [%g3 + AOFF_task_thread + AOFF_thread_reg_window + 0x60]
	stx		%i5, [%g3 + AOFF_task_thread + AOFF_thread_reg_window + 0x68]
	stx		%i6, [%g3 + AOFF_task_thread + AOFF_thread_reg_window + 0x70]
	b,pt		%xcc, 2f
	 stx		%i7, [%g3 + AOFF_task_thread + AOFF_thread_reg_window + 0x78]
1:	stw		%l0, [%g3 + AOFF_task_thread + AOFF_thread_reg_window + 0x00]

	stw		%l1, [%g3 + AOFF_task_thread + AOFF_thread_reg_window + 0x04]
	stw		%l2, [%g3 + AOFF_task_thread + AOFF_thread_reg_window + 0x08]
	stw		%l3, [%g3 + AOFF_task_thread + AOFF_thread_reg_window + 0x0c]
	stw		%l4, [%g3 + AOFF_task_thread + AOFF_thread_reg_window + 0x10]
	stw		%l5, [%g3 + AOFF_task_thread + AOFF_thread_reg_window + 0x14]
	stw		%l6, [%g3 + AOFF_task_thread + AOFF_thread_reg_window + 0x18]
	stw		%l7, [%g3 + AOFF_task_thread + AOFF_thread_reg_window + 0x1c]
	stw		%i0, [%g3 + AOFF_task_thread + AOFF_thread_reg_window + 0x20]

	stw		%i1, [%g3 + AOFF_task_thread + AOFF_thread_reg_window + 0x24]
	stw		%i2, [%g3 + AOFF_task_thread + AOFF_thread_reg_window + 0x28]
	stw		%i3, [%g3 + AOFF_task_thread + AOFF_thread_reg_window + 0x2c]
	stw		%i4, [%g3 + AOFF_task_thread + AOFF_thread_reg_window + 0x30]
	stw		%i5, [%g3 + AOFF_task_thread + AOFF_thread_reg_window + 0x34]
	stw		%i6, [%g3 + AOFF_task_thread + AOFF_thread_reg_window + 0x38]
	stw		%i7, [%g3 + AOFF_task_thread + AOFF_thread_reg_window + 0x3c]
2:	add		%g1, 1, %g1

	stb		%g1, [%g6 + AOFF_task_thread + AOFF_thread_w_saved]
	rdpr		%tstate, %g1
	andcc		%g1, TSTATE_PRIV, %g0
	saved
	and		%g1, TSTATE_CWP, %g1
	be,pn		%xcc, window_scheisse_from_user_common
	 mov		FAULT_CODE_WRITE | FAULT_CODE_DTLB | FAULT_CODE_WINFIXUP, %g4
	retry

window_scheisse_from_user_common:
	stb		%g4, [%g6 + AOFF_task_thread + AOFF_thread_fault_code]
	stx		%g5, [%g6 + AOFF_task_thread + AOFF_thread_fault_address]
	wrpr		%g1, %cwp
	ba,pt		%xcc, etrap
	 rd		%pc, %g7
	call		do_sparc64_fault
	 add		%sp, STACK_BIAS + REGWIN_SZ, %o0
	ba,a,pt		%xcc, rtrap_clr_l6

	.globl		winfix_mna, fill_fixup_mna, spill_fixup_mna
winfix_mna:
	andn		%g3, 0x7f, %g3
	add		%g3, 0x78, %g3
	wrpr		%g3, %tnpc
	done
fill_fixup_mna:
	rdpr		%tstate, %g1
	andcc		%g1, TSTATE_PRIV, %g0
	be,pt		%xcc, window_mna_from_user_common
	 and		%g1, TSTATE_CWP, %g1

	/* Please, see fill_fixup commentary about why we must preserve
	 * %l5 and %l6 to preserve absolute correct semantics.
	 */
	rdpr		%wstate, %g2			! Grab user mode wstate.
	wrpr		%g1, %cwp			! Get into the right window.
	sll		%g2, 3, %g2			! NORMAL-->OTHER
	wrpr		%g0, 0x0, %canrestore		! Standard etrap stuff.

	wrpr		%g2, 0x0, %wstate		! This must be consistant.
	wrpr		%g0, 0x0, %otherwin		! We know this.
	mov		PRIMARY_CONTEXT, %g1		! Change contexts...
	stxa		%g0, [%g1] ASI_DMMU		! Back into the nucleus.
	flush		%g6				! Flush instruction buffers
	rdpr		%pstate, %l1			! Prepare to change globals.
	mov		%g4, %o2			! Setup args for
	mov		%g5, %o1			! final call to mem_address_unaligned.
	andn		%l1, PSTATE_MM, %l1		! We want to be in RMO

	mov		%g6, %o7			! Stash away current.
	wrpr		%g0, 0x0, %tl			! Out of trap levels.
	wrpr		%l1, (PSTATE_IE | PSTATE_AG | PSTATE_RMO), %pstate
	sethi		%uhi(PAGE_OFFSET), %g4		! Set page_offset global reg.
	mov		%o7, %g6			! Get current back.
	sllx		%g4, 32, %g4			! Finish it.
	call		mem_address_unaligned
	 add		%sp, STACK_BIAS + REGWIN_SZ, %o0

	b,pt		%xcc, rtrap
	 nop						! yes, the nop is correct
spill_fixup_mna:
	ldub		[%g6 + AOFF_task_thread + AOFF_thread_flags], %g1
	andcc		%g1, SPARC_FLAG_32BIT, %g0
	ldub		[%g6 + AOFF_task_thread + AOFF_thread_w_saved], %g1
	sll		%g1, 3, %g3
	add		%g6, %g3, %g3
	stx		%sp, [%g3 + AOFF_task_thread + AOFF_thread_rwbuf_stkptrs]

	sll		%g1, 7, %g3
	bne,pt		%xcc, 1f
	 add		%g6, %g3, %g3
	stx		%l0, [%g3 + AOFF_task_thread + AOFF_thread_reg_window + 0x00]
	stx		%l1, [%g3 + AOFF_task_thread + AOFF_thread_reg_window + 0x08]
	stx		%l2, [%g3 + AOFF_task_thread + AOFF_thread_reg_window + 0x10]
	stx		%l3, [%g3 + AOFF_task_thread + AOFF_thread_reg_window + 0x18]
	stx		%l4, [%g3 + AOFF_task_thread + AOFF_thread_reg_window + 0x20]

	stx		%l5, [%g3 + AOFF_task_thread + AOFF_thread_reg_window + 0x28]
	stx		%l6, [%g3 + AOFF_task_thread + AOFF_thread_reg_window + 0x30]
	stx		%l7, [%g3 + AOFF_task_thread + AOFF_thread_reg_window + 0x38]
	stx		%i0, [%g3 + AOFF_task_thread + AOFF_thread_reg_window + 0x40]
	stx		%i1, [%g3 + AOFF_task_thread + AOFF_thread_reg_window + 0x48]
	stx		%i2, [%g3 + AOFF_task_thread + AOFF_thread_reg_window + 0x50]
	stx		%i3, [%g3 + AOFF_task_thread + AOFF_thread_reg_window + 0x58]
	stx		%i4, [%g3 + AOFF_task_thread + AOFF_thread_reg_window + 0x60]

	stx		%i5, [%g3 + AOFF_task_thread + AOFF_thread_reg_window + 0x68]
	stx		%i6, [%g3 + AOFF_task_thread + AOFF_thread_reg_window + 0x70]
	stx		%i7, [%g3 + AOFF_task_thread + AOFF_thread_reg_window + 0x78]
	b,pt		%xcc, 2f
	 add		%g1, 1, %g1
1:	std		%l0, [%g3 + AOFF_task_thread + AOFF_thread_reg_window + 0x00]
	std		%l2, [%g3 + AOFF_task_thread + AOFF_thread_reg_window + 0x08]
	std		%l4, [%g3 + AOFF_task_thread + AOFF_thread_reg_window + 0x10]

	std		%l6, [%g3 + AOFF_task_thread + AOFF_thread_reg_window + 0x18]
	std		%i0, [%g3 + AOFF_task_thread + AOFF_thread_reg_window + 0x20]
	std		%i2, [%g3 + AOFF_task_thread + AOFF_thread_reg_window + 0x28]
	std		%i4, [%g3 + AOFF_task_thread + AOFF_thread_reg_window + 0x30]
	std		%i6, [%g3 + AOFF_task_thread + AOFF_thread_reg_window + 0x38]
	add		%g1, 1, %g1
2:	stb		%g1, [%g6 + AOFF_task_thread + AOFF_thread_w_saved]
	rdpr		%tstate, %g1

	andcc		%g1, TSTATE_PRIV, %g0
	saved
	be,pn		%xcc, window_mna_from_user_common
	 and		%g1, TSTATE_CWP, %g1
	retry
window_mna_from_user_common:
	wrpr		%g1, %cwp
	sethi		%hi(109f), %g7
	ba,pt		%xcc, etrap
109:	 or		%g7, %lo(109b), %g7
	mov		%l4, %o2
	mov		%l5, %o1
	call		mem_address_unaligned
	 add		%sp, STACK_BIAS + REGWIN_SZ, %o0
	ba,pt		%xcc, rtrap
	 clr		%l6
	
	/* These are only needed for 64-bit mode processes which
	 * put their stack pointer into the VPTE area and there
	 * happens to be a VPTE tlb entry mapped there during
	 * a spill/fill trap to that stack frame.
	 */
	.globl		winfix_dax, fill_fixup_dax, spill_fixup_dax
winfix_dax:
	andn		%g3, 0x7f, %g3
	add		%g3, 0x74, %g3
	wrpr		%g3, %tnpc
	done
fill_fixup_dax:
	rdpr		%tstate, %g1
	andcc		%g1, TSTATE_PRIV, %g0
	be,pt		%xcc, window_dax_from_user_common
	 and		%g1, TSTATE_CWP, %g1

	/* Please, see fill_fixup commentary about why we must preserve
	 * %l5 and %l6 to preserve absolute correct semantics.
	 */
	rdpr		%wstate, %g2			! Grab user mode wstate.
	wrpr		%g1, %cwp			! Get into the right window.
	sll		%g2, 3, %g2			! NORMAL-->OTHER
	wrpr		%g0, 0x0, %canrestore		! Standard etrap stuff.

	wrpr		%g2, 0x0, %wstate		! This must be consistant.
	wrpr		%g0, 0x0, %otherwin		! We know this.
	mov		PRIMARY_CONTEXT, %g1		! Change contexts...
	stxa		%g0, [%g1] ASI_DMMU		! Back into the nucleus.
	flush		%g6				! Flush instruction buffers
	rdpr		%pstate, %l1			! Prepare to change globals.
	mov		%g4, %o1			! Setup args for
	mov		%g5, %o2			! final call to data_access_exception.
	andn		%l1, PSTATE_MM, %l1		! We want to be in RMO

	mov		%g6, %o7			! Stash away current.
	wrpr		%g0, 0x0, %tl			! Out of trap levels.
	wrpr		%l1, (PSTATE_IE | PSTATE_AG | PSTATE_RMO), %pstate
	sethi		%uhi(PAGE_OFFSET), %g4		! Set page_offset global reg.
	mov		%o7, %g6			! Get current back.
	sllx		%g4, 32, %g4			! Finish it.
	call		data_access_exception
	 add		%sp, STACK_BIAS + REGWIN_SZ, %o0

	b,pt		%xcc, rtrap
	 nop						! yes, the nop is correct
spill_fixup_dax:
	ldub		[%g6 + AOFF_task_thread + AOFF_thread_flags], %g1
	andcc		%g1, SPARC_FLAG_32BIT, %g0
	ldub		[%g6 + AOFF_task_thread + AOFF_thread_w_saved], %g1
	sll		%g1, 3, %g3
	add		%g6, %g3, %g3
	stx		%sp, [%g3 + AOFF_task_thread + AOFF_thread_rwbuf_stkptrs]

	sll		%g1, 7, %g3
	bne,pt		%xcc, 1f
	 add		%g6, %g3, %g3
	stx		%l0, [%g3 + AOFF_task_thread + AOFF_thread_reg_window + 0x00]
	stx		%l1, [%g3 + AOFF_task_thread + AOFF_thread_reg_window + 0x08]
	stx		%l2, [%g3 + AOFF_task_thread + AOFF_thread_reg_window + 0x10]
	stx		%l3, [%g3 + AOFF_task_thread + AOFF_thread_reg_window + 0x18]
	stx		%l4, [%g3 + AOFF_task_thread + AOFF_thread_reg_window + 0x20]

	stx		%l5, [%g3 + AOFF_task_thread + AOFF_thread_reg_window + 0x28]
	stx		%l6, [%g3 + AOFF_task_thread + AOFF_thread_reg_window + 0x30]
	stx		%l7, [%g3 + AOFF_task_thread + AOFF_thread_reg_window + 0x38]
	stx		%i0, [%g3 + AOFF_task_thread + AOFF_thread_reg_window + 0x40]
	stx		%i1, [%g3 + AOFF_task_thread + AOFF_thread_reg_window + 0x48]
	stx		%i2, [%g3 + AOFF_task_thread + AOFF_thread_reg_window + 0x50]
	stx		%i3, [%g3 + AOFF_task_thread + AOFF_thread_reg_window + 0x58]
	stx		%i4, [%g3 + AOFF_task_thread + AOFF_thread_reg_window + 0x60]

	stx		%i5, [%g3 + AOFF_task_thread + AOFF_thread_reg_window + 0x68]
	stx		%i6, [%g3 + AOFF_task_thread + AOFF_thread_reg_window + 0x70]
	stx		%i7, [%g3 + AOFF_task_thread + AOFF_thread_reg_window + 0x78]
	b,pt		%xcc, 2f
	 add		%g1, 1, %g1
1:	std		%l0, [%g3 + AOFF_task_thread + AOFF_thread_reg_window + 0x00]
	std		%l2, [%g3 + AOFF_task_thread + AOFF_thread_reg_window + 0x08]
	std		%l4, [%g3 + AOFF_task_thread + AOFF_thread_reg_window + 0x10]

	std		%l6, [%g3 + AOFF_task_thread + AOFF_thread_reg_window + 0x18]
	std		%i0, [%g3 + AOFF_task_thread + AOFF_thread_reg_window + 0x20]
	std		%i2, [%g3 + AOFF_task_thread + AOFF_thread_reg_window + 0x28]
	std		%i4, [%g3 + AOFF_task_thread + AOFF_thread_reg_window + 0x30]
	std		%i6, [%g3 + AOFF_task_thread + AOFF_thread_reg_window + 0x38]
	add		%g1, 1, %g1
2:	stb		%g1, [%g6 + AOFF_task_thread + AOFF_thread_w_saved]
	rdpr		%tstate, %g1

	andcc		%g1, TSTATE_PRIV, %g0
	saved
	be,pn		%xcc, window_dax_from_user_common
	 and		%g1, TSTATE_CWP, %g1
	retry
window_dax_from_user_common:
	wrpr		%g1, %cwp
	sethi		%hi(109f), %g7
	ba,pt		%xcc, etrap
109:	 or		%g7, %lo(109b), %g7
	mov		%l4, %o1
	mov		%l5, %o2
	call		data_access_exception
	 add		%sp, STACK_BIAS + REGWIN_SZ, %o0
	ba,pt		%xcc, rtrap
	 clr		%l6
	
/*
 *  linux/fs/binfmt_aout.c
 *
 *  Copyright (C) 1991, 1992, 1996  Linus Torvalds
 *
 *  Hacked a bit by DaveM to make it work with 32-bit SunOS
 *  binaries on the sparc64 port.
 */

#include <linux/module.h>

#include <linux/sched.h>
#include <linux/kernel.h>
#include <linux/mm.h>
#include <linux/mman.h>
#include <linux/a.out.h>
#include <linux/errno.h>
#include <linux/signal.h>
#include <linux/string.h>
#include <linux/fs.h>
#include <linux/file.h>
#include <linux/stat.h>
#include <linux/fcntl.h>
#include <linux/ptrace.h>
#include <linux/user.h>
#include <linux/slab.h>
#include <linux/binfmts.h>
#include <linux/personality.h>
#include <linux/init.h>

#include <asm/system.h>
#include <asm/uaccess.h>
#include <asm/pgalloc.h>

static int load_aout32_binary(struct linux_binprm *, struct pt_regs * regs);
static int load_aout32_library(struct file*);
static int aout32_core_dump(long signr, struct pt_regs * regs, struct file *file);

extern void dump_thread(struct pt_regs *, struct user *);

static struct linux_binfmt aout32_format = {
	NULL, THIS_MODULE, load_aout32_binary, load_aout32_library, aout32_core_dump,
	PAGE_SIZE
};

static void set_brk(unsigned long start, unsigned long end)
{
	start = PAGE_ALIGN(start);
	end = PAGE_ALIGN(end);
	if (end <= start)
		return;
	do_brk(start, end - start);
}

/*
 * These are the only things you should do on a core-file: use only these
 * macros to write out all the necessary info.
 */

static int dump_write(struct file *file, const void *addr, int nr)
{
	return file->f_op->write(file, addr, nr, &file->f_pos) == nr;
}

#define DUMP_WRITE(addr, nr)	\
	if (!dump_write(file, (void *)(addr), (nr))) \
		goto end_coredump;

#define DUMP_SEEK(offset) \
if (file->f_op->llseek) { \
	if (file->f_op->llseek(file,(offset),0) != (offset)) \
 		goto end_coredump; \
} else file->f_pos = (offset)

/*
 * Routine writes a core dump image in the current directory.
 * Currently only a stub-function.
 *
 * Note that setuid/setgid files won't make a core-dump if the uid/gid
 * changed due to the set[u|g]id. It's enforced by the "current->mm->dumpable"
 * field, which also makes sure the core-dumps won't be recursive if the
 * dumping of the process results in another error..
 */

static int aout32_core_dump(long signr, struct pt_regs *regs, struct file *file)
{
	mm_segment_t fs;
	int has_dumped = 0;
	unsigned long dump_start, dump_size;
	struct user dump;
#       define START_DATA(u)    (u.u_tsize)
#       define START_STACK(u)   ((regs->u_regs[UREG_FP]) & ~(PAGE_SIZE - 1))

	fs = get_fs();
	set_fs(KERNEL_DS);
	has_dumped = 1;
	current->flags |= PF_DUMPCORE;
       	strncpy(dump.u_comm, current->comm, sizeof(current->comm));
	dump.signal = signr;
	dump_thread(regs, &dump);

/* If the size of the dump file exceeds the rlimit, then see what would happen
   if we wrote the stack, but not the data area.  */
	if ((dump.u_dsize+dump.u_ssize) >
	    current->rlim[RLIMIT_CORE].rlim_cur)
		dump.u_dsize = 0;

/* Make sure we have enough room to write the stack and data areas. */
	if ((dump.u_ssize) >
	    current->rlim[RLIMIT_CORE].rlim_cur)
		dump.u_ssize = 0;

/* make sure we actually have a data and stack area to dump */
	set_fs(USER_DS);
	if (verify_area(VERIFY_READ, (void *) START_DATA(dump), dump.u_dsize))
		dump.u_dsize = 0;
	if (verify_area(VERIFY_READ, (void *) START_STACK(dump), dump.u_ssize))
		dump.u_ssize = 0;

	set_fs(KERNEL_DS);
/* struct user */
	DUMP_WRITE(&dump,sizeof(dump));
/* now we start writing out the user space info */
	set_fs(USER_DS);
/* Dump the data area */
	if (dump.u_dsize != 0) {
		dump_start = START_DATA(dump);
		dump_size = dump.u_dsize;
		DUMP_WRITE(dump_start,dump_size);
	}
/* Now prepare to dump the stack area */
	if (dump.u_ssize != 0) {
		dump_start = START_STACK(dump);
		dump_size = dump.u_ssize;
		DUMP_WRITE(dump_start,dump_size);
	}
/* Finally dump the task struct.  Not be used by gdb, but could be useful */
	set_fs(KERNEL_DS);
	DUMP_WRITE(current,sizeof(*current));
end_coredump:
	set_fs(fs);
	return has_dumped;
}

/*
 * create_aout32_tables() parses the env- and arg-strings in new user
 * memory and creates the pointer tables from them, and puts their
 * addresses on the "stack", returning the new stack pointer value.
 */
#define A(__x) ((unsigned long)(__x))

static u32 *create_aout32_tables(char * p, struct linux_binprm * bprm)
{
	u32 *argv, *envp;
	u32 *sp;
	int argc = bprm->argc;
	int envc = bprm->envc;

	sp = (u32 *) ((-(unsigned long)sizeof(char *)) & (unsigned long) p);

	/* This imposes the proper stack alignment for a new process. */
	sp = (u32 *) (((unsigned long) sp) & ~7);
	if ((envc+argc+3)&1)
		--sp;

	sp -= envc+1;
	envp = (u32 *) sp;
	sp -= argc+1;
	argv = (u32 *) sp;
	put_user(argc,--sp);
	current->mm->arg_start = (unsigned long) p;
	while (argc-->0) {
		char c;
		put_user(((u32)A(p)),argv++);
		do {
			get_user(c,p++);
		} while (c);
	}
	put_user(NULL,argv);
	current->mm->arg_end = current->mm->env_start = (unsigned long) p;
	while (envc-->0) {
		char c;
		put_user(((u32)A(p)),envp++);
		do {
			get_user(c,p++);
		} while (c);
	}
	put_user(NULL,envp);
	current->mm->env_end = (unsigned long) p;
	return sp;
}

/*
 * These are the functions used to load a.out style executables and shared
 * libraries.  There is no binary dependent code anywhere else.
 */

static int load_aout32_binary(struct linux_binprm * bprm, struct pt_regs * regs)
{
	struct exec ex;
	unsigned long error;
	unsigned long fd_offset;
	unsigned long rlim;
	int retval;

	ex = *((struct exec *) bprm->buf);		/* exec-header */
	if ((N_MAGIC(ex) != ZMAGIC && N_MAGIC(ex) != OMAGIC &&
	     N_MAGIC(ex) != QMAGIC && N_MAGIC(ex) != NMAGIC) ||
	    N_TRSIZE(ex) || N_DRSIZE(ex) ||
	    bprm->file->f_dentry->d_inode->i_size < ex.a_text+ex.a_data+N_SYMSIZE(ex)+N_TXTOFF(ex)) {
		return -ENOEXEC;
	}

	fd_offset = N_TXTOFF(ex);

	/* Check initial limits. This avoids letting people circumvent
	 * size limits imposed on them by creating programs with large
	 * arrays in the data or bss.
	 */
	rlim = current->rlim[RLIMIT_DATA].rlim_cur;
	if (rlim >= RLIM_INFINITY)
		rlim = ~0;
	if (ex.a_data + ex.a_bss > rlim)
		return -ENOMEM;

	/* Flush all traces of the currently running executable */
	retval = flush_old_exec(bprm);
	if (retval)
		return retval;

	/* OK, This is the point of no return */
	set_personality(PER_SUNOS);

	current->mm->end_code = ex.a_text +
		(current->mm->start_code = N_TXTADDR(ex));
	current->mm->end_data = ex.a_data +
		(current->mm->start_data = N_DATADDR(ex));
	current->mm->brk = ex.a_bss +
		(current->mm->start_brk = N_BSSADDR(ex));

	current->mm->rss = 0;
	current->mm->mmap = NULL;
	compute_creds(bprm);
 	current->flags &= ~PF_FORKNOEXEC;
	if (N_MAGIC(ex) == NMAGIC) {
		loff_t pos = fd_offset;
		/* Fuck me plenty... */
		error = do_brk(N_TXTADDR(ex), ex.a_text);
		bprm->file->f_op->read(bprm->file, (char *) N_TXTADDR(ex),
			  ex.a_text, &pos);
		error = do_brk(N_DATADDR(ex), ex.a_data);
		bprm->file->f_op->read(bprm->file, (char *) N_DATADDR(ex),
			  ex.a_data, &pos);
		goto beyond_if;
	}

	if (N_MAGIC(ex) == OMAGIC) {
		loff_t pos = fd_offset;
		do_brk(N_TXTADDR(ex) & PAGE_MASK,
			ex.a_text+ex.a_data + PAGE_SIZE - 1);
		bprm->file->f_op->read(bprm->file, (char *) N_TXTADDR(ex),
			  ex.a_text+ex.a_data, &pos);
	} else {
		static unsigned long error_time;
		if ((ex.a_text & 0xfff || ex.a_data & 0xfff) &&
		    (N_MAGIC(ex) != NMAGIC) && (jiffies-error_time) > 5*HZ)
		{
			printk(KERN_NOTICE "executable not page aligned\n");
			error_time = jiffies;
		}

		if (!bprm->file->f_op->mmap) {
			loff_t pos = fd_offset;
			do_brk(0, ex.a_text+ex.a_data);
			bprm->file->f_op->read(bprm->file,(char *)N_TXTADDR(ex),
				  ex.a_text+ex.a_data, &pos);
			goto beyond_if;
		}

	        down_write(&current->mm->mmap_sem);
		error = do_mmap(bprm->file, N_TXTADDR(ex), ex.a_text,
			PROT_READ | PROT_EXEC,
			MAP_FIXED | MAP_PRIVATE | MAP_DENYWRITE | MAP_EXECUTABLE,
			fd_offset);
	        up_write(&current->mm->mmap_sem);

		if (error != N_TXTADDR(ex)) {
			send_sig(SIGKILL, current, 0);
			return error;
		}

	        down_write(&current->mm->mmap_sem);
 		error = do_mmap(bprm->file, N_DATADDR(ex), ex.a_data,
				PROT_READ | PROT_WRITE | PROT_EXEC,
				MAP_FIXED | MAP_PRIVATE | MAP_DENYWRITE | MAP_EXECUTABLE,
				fd_offset + ex.a_text);
	        up_write(&current->mm->mmap_sem);
		if (error != N_DATADDR(ex)) {
			send_sig(SIGKILL, current, 0);
			return error;
		}
	}
beyond_if:
	set_binfmt(&aout32_format);

	set_brk(current->mm->start_brk, current->mm->brk);

	retval = setup_arg_pages(bprm);
	if (retval < 0) { 
		/* Someone check-me: is this error path enough? */ 
		send_sig(SIGKILL, current, 0); 
		return retval;
	}

	current->mm->start_stack =
		(unsigned long) create_aout32_tables((char *)bprm->p, bprm);
	if (!(current->thread.flags & SPARC_FLAG_32BIT)) {
		unsigned long pgd_cache;

		pgd_cache = ((unsigned long)current->mm->pgd[0])<<11UL;
		__asm__ __volatile__("stxa\t%0, [%1] %2\n\t"
				     "membar #Sync"
				     : /* no outputs */
				     : "r" (pgd_cache),
				       "r" (TSB_REG), "i" (ASI_DMMU));
		current->thread.flags |= SPARC_FLAG_32BIT;
	}
	start_thread32(regs, ex.a_entry, current->mm->start_stack);
	if (current->ptrace & PT_PTRACED)
		send_sig(SIGTRAP, current, 0);
	return 0;
}

/* N.B. Move to .h file and use code in fs/binfmt_aout.c? */
static int load_aout32_library(struct file *file)
{
	struct inode * inode;
	unsigned long bss, start_addr, len;
	unsigned long error;
	int retval;
	struct exec ex;

	inode = file->f_dentry->d_inode;

	retval = -ENOEXEC;
	error = kernel_read(file, 0, (char *) &ex, sizeof(ex));
	if (error != sizeof(ex))
		goto out;

	/* We come in here for the regular a.out style of shared libraries */
	if ((N_MAGIC(ex) != ZMAGIC && N_MAGIC(ex) != QMAGIC) || N_TRSIZE(ex) ||
	    N_DRSIZE(ex) || ((ex.a_entry & 0xfff) && N_MAGIC(ex) == ZMAGIC) ||
	    inode->i_size < ex.a_text+ex.a_data+N_SYMSIZE(ex)+N_TXTOFF(ex)) {
		goto out;
	}

	if (N_MAGIC(ex) == ZMAGIC && N_TXTOFF(ex) &&
	    (N_TXTOFF(ex) < inode->i_sb->s_blocksize)) {
		printk("N_TXTOFF < BLOCK_SIZE. Please convert library\n");
		goto out;
	}

	if (N_FLAGS(ex))
		goto out;

	/* For  QMAGIC, the starting address is 0x20 into the page.  We mask
	   this off to get the starting address for the page */

	start_addr =  ex.a_entry & 0xfffff000;

	/* Now use mmap to map the library into memory. */
	down_write(&current->mm->mmap_sem);
	error = do_mmap(file, start_addr, ex.a_text + ex.a_data,
			PROT_READ | PROT_WRITE | PROT_EXEC,
			MAP_FIXED | MAP_PRIVATE | MAP_DENYWRITE,
			N_TXTOFF(ex));
	up_write(&current->mm->mmap_sem);
	retval = error;
	if (error != start_addr)
		goto out;

	len = PAGE_ALIGN(ex.a_text + ex.a_data);
	bss = ex.a_text + ex.a_data + ex.a_bss;
	if (bss > len) {
		error = do_brk(start_addr + len, bss - len);
		retval = error;
		if (error != start_addr + len)
			goto out;
	}
	retval = 0;
out:
	return retval;
}

static int __init init_aout32_binfmt(void)
{
	return register_binfmt(&aout32_format);
}

static void __exit exit_aout32_binfmt(void)
{
	unregister_binfmt(&aout32_format);
}

EXPORT_NO_SYMBOLS;

module_init(init_aout32_binfmt);
module_exit(exit_aout32_binfmt);
/* $Id: unaligned.c,v 1.23 2001/04/09 04:29:03 davem Exp $
 * unaligned.c: Unaligned load/store trap handling with special
 *              cases for the kernel to do them more quickly.
 *
 * Copyright (C) 1996 David S. Miller (davem@caip.rutgers.edu)
 * Copyright (C) 1996,1997 Jakub Jelinek (jj@sunsite.mff.cuni.cz)
 */


#include <linux/kernel.h>
#include <linux/sched.h>
#include <linux/mm.h>
#include <asm/asi.h>
#include <asm/ptrace.h>
#include <asm/pstate.h>
#include <asm/processor.h>
#include <asm/system.h>
#include <asm/uaccess.h>
#include <linux/smp.h>
#include <linux/smp_lock.h>
#include <asm/fpumacro.h>
#include <asm/bitops.h>

/* #define DEBUG_MNA */

enum direction {
	load,    /* ld, ldd, ldh, ldsh */
	store,   /* st, std, sth, stsh */
	both,    /* Swap, ldstub, cas, ... */
	fpld,
	fpst,
	invalid,
};

#ifdef DEBUG_MNA
static char *dirstrings[] = {
  "load", "store", "both", "fpload", "fpstore", "invalid"
};
#endif

static inline enum direction decode_direction(unsigned int insn)
{
	unsigned long tmp = (insn >> 21) & 1;

	if(!tmp)
		return load;
	else {
		switch ((insn>>19)&0xf) {
		case 15: /* swap* */
			return both;
		default:
			return store;
		}
	}
}

/* 16 = double-word, 8 = extra-word, 4 = word, 2 = half-word */
static inline int decode_access_size(unsigned int insn)
{
	unsigned int tmp;

	tmp = ((insn >> 19) & 0xf);
	if (tmp == 11 || tmp == 14) /* ldx/stx */
		return 8;
	tmp &= 3;
	if(!tmp)
		return 4;
	else if(tmp == 3)
		return 16;	/* ldd/std - Although it is actually 8 */
	else if(tmp == 2)
		return 2;
	else {
		printk("Impossible unaligned trap. insn=%08x\n", insn);
		die_if_kernel("Byte sized unaligned access?!?!", current->thread.kregs);
	}
}

static inline int decode_asi(unsigned int insn, struct pt_regs *regs)
{
	if (insn & 0x800000) {
		if (insn & 0x2000)
			return (unsigned char)(regs->tstate >> 24);	/* %asi */
		else
			return (unsigned char)(insn >> 5);		/* imm_asi */
	} else
		return ASI_P;
}

/* 0x400000 = signed, 0 = unsigned */
static inline int decode_signedness(unsigned int insn)
{
	return (insn & 0x400000);
}

static inline void maybe_flush_windows(unsigned int rs1, unsigned int rs2,
				       unsigned int rd, int from_kernel)
{
	if(rs2 >= 16 || rs1 >= 16 || rd >= 16) {
		if(from_kernel != 0)
			__asm__ __volatile__("flushw");
		else
			flushw_user();
	}
}

static inline long sign_extend_imm13(long imm)
{
	return imm << 51 >> 51;
}

static unsigned long fetch_reg(unsigned int reg, struct pt_regs *regs)
{
	unsigned long value;
	
	if(reg < 16)
		return (!reg ? 0 : regs->u_regs[reg]);
	if (regs->tstate & TSTATE_PRIV) {
		struct reg_window *win;
		win = (struct reg_window *)(regs->u_regs[UREG_FP] + STACK_BIAS);
		value = win->locals[reg - 16];
	} else if (current->thread.flags & SPARC_FLAG_32BIT) {
		struct reg_window32 *win32;
		win32 = (struct reg_window32 *)((unsigned long)((u32)regs->u_regs[UREG_FP]));
		get_user(value, &win32->locals[reg - 16]);
	} else {
		struct reg_window *win;
		win = (struct reg_window *)(regs->u_regs[UREG_FP] + STACK_BIAS);
		get_user(value, &win->locals[reg - 16]);
	}
	return value;
}

static unsigned long *fetch_reg_addr(unsigned int reg, struct pt_regs *regs)
{
	if(reg < 16)
		return &regs->u_regs[reg];
	if (regs->tstate & TSTATE_PRIV) {
		struct reg_window *win;
		win = (struct reg_window *)(regs->u_regs[UREG_FP] + STACK_BIAS);
		return &win->locals[reg - 16];
	} else if (current->thread.flags & SPARC_FLAG_32BIT) {
		struct reg_window32 *win32;
		win32 = (struct reg_window32 *)((unsigned long)((u32)regs->u_regs[UREG_FP]));
		return (unsigned long *)&win32->locals[reg - 16];
	} else {
		struct reg_window *win;
		win = (struct reg_window *)(regs->u_regs[UREG_FP] + STACK_BIAS);
		return &win->locals[reg - 16];
	}
}

static inline unsigned long compute_effective_address(struct pt_regs *regs,
						      unsigned int insn, unsigned int rd)
{
	unsigned int rs1 = (insn >> 14) & 0x1f;
	unsigned int rs2 = insn & 0x1f;
	int from_kernel = (regs->tstate & TSTATE_PRIV) != 0;

	if(insn & 0x2000) {
		maybe_flush_windows(rs1, 0, rd, from_kernel);
		return (fetch_reg(rs1, regs) + sign_extend_imm13(insn));
	} else {
		maybe_flush_windows(rs1, rs2, rd, from_kernel);
		return (fetch_reg(rs1, regs) + fetch_reg(rs2, regs));
	}
}

/* This is just to make gcc think die_if_kernel does return... */
static void unaligned_panic(char *str, struct pt_regs *regs)
{
	die_if_kernel(str, regs);
}

#define do_integer_load(dest_reg, size, saddr, is_signed, asi, errh) ({		\
__asm__ __volatile__ (								\
	"wr	%4, 0, %%asi\n\t"						\
	"cmp	%1, 8\n\t"							\
	"bge,pn	%%icc, 9f\n\t"							\
	" cmp	%1, 4\n\t"							\
	"be,pt	%%icc, 6f\n"							\
"4:\t"	" lduba	[%2] %%asi, %%l1\n"						\
"5:\t"	"lduba	[%2 + 1] %%asi, %%l2\n\t"					\
	"sll	%%l1, 8, %%l1\n\t"						\
	"brz,pt	%3, 3f\n\t"							\
	" add	%%l1, %%l2, %%l1\n\t"						\
	"sllx	%%l1, 48, %%l1\n\t"						\
	"srax	%%l1, 48, %%l1\n"						\
"3:\t"	"ba,pt	%%xcc, 0f\n\t"							\
	" stx	%%l1, [%0]\n"							\
"6:\t"	"lduba	[%2 + 1] %%asi, %%l2\n\t"					\
	"sll	%%l1, 24, %%l1\n"						\
"7:\t"	"lduba	[%2 + 2] %%asi, %%g7\n\t"					\
	"sll	%%l2, 16, %%l2\n"						\
"8:\t"	"lduba	[%2 + 3] %%asi, %%g1\n\t"					\
	"sll	%%g7, 8, %%g7\n\t"						\
	"or	%%l1, %%l2, %%l1\n\t"						\
	"or	%%g7, %%g1, %%g7\n\t"						\
	"or	%%l1, %%g7, %%l1\n\t"						\
	"brnz,a,pt %3, 3f\n\t"							\
	" sra	%%l1, 0, %%l1\n"						\
"3:\t"	"ba,pt	%%xcc, 0f\n\t"							\
	" stx	%%l1, [%0]\n"							\
"9:\t"	"lduba	[%2] %%asi, %%l1\n"						\
"10:\t"	"lduba	[%2 + 1] %%asi, %%l2\n\t"					\
	"sllx	%%l1, 56, %%l1\n"						\
"11:\t"	"lduba	[%2 + 2] %%asi, %%g7\n\t"					\
	"sllx	%%l2, 48, %%l2\n"						\
"12:\t"	"lduba	[%2 + 3] %%asi, %%g1\n\t"					\
	"sllx	%%g7, 40, %%g7\n\t"						\
	"sllx	%%g1, 32, %%g1\n\t"						\
	"or	%%l1, %%l2, %%l1\n\t"						\
	"or	%%g7, %%g1, %%g7\n"						\
"13:\t"	"lduba	[%2 + 4] %%asi, %%l2\n\t"					\
	"or	%%l1, %%g7, %%g7\n"						\
"14:\t"	"lduba	[%2 + 5] %%asi, %%g1\n\t"					\
	"sllx	%%l2, 24, %%l2\n"						\
"15:\t"	"lduba	[%2 + 6] %%asi, %%l1\n\t"					\
	"sllx	%%g1, 16, %%g1\n\t"						\
	"or	%%g7, %%l2, %%g7\n"						\
"16:\t"	"lduba	[%2 + 7] %%asi, %%l2\n\t"					\
	"sllx	%%l1, 8, %%l1\n\t"						\
	"or	%%g7, %%g1, %%g7\n\t"						\
	"or	%%l1, %%l2, %%l1\n\t"						\
	"or	%%g7, %%l1, %%g7\n\t"						\
	"cmp	%1, 8\n\t"							\
	"be,a,pt %%icc, 0f\n\t"							\
	" stx	%%g7, [%0]\n\t"							\
	"srlx	%%g7, 32, %%l1\n\t"						\
	"sra	%%g7, 0, %%g7\n\t"						\
	"stx	%%l1, [%0]\n\t"							\
	"stx	%%g7, [%0 + 8]\n"						\
"0:\n\t"									\
	"wr	%%g0, %5, %%asi\n\n\t"						\
	".section __ex_table\n\t"						\
	".word	4b, " #errh "\n\t"						\
	".word	5b, " #errh "\n\t"						\
	".word	6b, " #errh "\n\t"						\
	".word	7b, " #errh "\n\t"						\
	".word	8b, " #errh "\n\t"						\
	".word	9b, " #errh "\n\t"						\
	".word	10b, " #errh "\n\t"						\
	".word	11b, " #errh "\n\t"						\
	".word	12b, " #errh "\n\t"						\
	".word	13b, " #errh "\n\t"						\
	".word	14b, " #errh "\n\t"						\
	".word	15b, " #errh "\n\t"						\
	".word	16b, " #errh "\n\n\t"						\
	".previous\n\t"								\
	: : "r" (dest_reg), "r" (size), "r" (saddr), "r" (is_signed),		\
	  "r" (asi), "i" (ASI_AIUS)						\
	: "l1", "l2", "g7", "g1", "cc");					\
})
	
#define store_common(dst_addr, size, src_val, asi, errh) ({			\
__asm__ __volatile__ (								\
	"wr	%3, 0, %%asi\n\t"						\
	"ldx	[%2], %%l1\n"							\
	"cmp	%1, 2\n\t"							\
	"be,pn	%%icc, 2f\n\t"							\
	" cmp	%1, 4\n\t"							\
	"be,pt	%%icc, 1f\n\t"							\
	" srlx	%%l1, 24, %%l2\n\t"						\
	"srlx	%%l1, 56, %%g1\n\t"						\
	"srlx	%%l1, 48, %%g7\n"						\
"4:\t"	"stba	%%g1, [%0] %%asi\n\t"						\
	"srlx	%%l1, 40, %%g1\n"						\
"5:\t"	"stba	%%g7, [%0 + 1] %%asi\n\t"					\
	"srlx	%%l1, 32, %%g7\n"						\
"6:\t"	"stba	%%g1, [%0 + 2] %%asi\n"						\
"7:\t"	"stba	%%g7, [%0 + 3] %%asi\n\t"					\
	"srlx	%%l1, 16, %%g1\n"						\
"8:\t"	"stba	%%l2, [%0 + 4] %%asi\n\t"					\
	"srlx	%%l1, 8, %%g7\n"						\
"9:\t"	"stba	%%g1, [%0 + 5] %%asi\n"						\
"10:\t"	"stba	%%g7, [%0 + 6] %%asi\n\t"					\
	"ba,pt	%%xcc, 0f\n"							\
"11:\t"	" stba	%%l1, [%0 + 7] %%asi\n"						\
"1:\t"	"srl	%%l1, 16, %%g7\n"						\
"12:\t"	"stba	%%l2, [%0] %%asi\n\t"						\
	"srl	%%l1, 8, %%l2\n"						\
"13:\t"	"stba	%%g7, [%0 + 1] %%asi\n"						\
"14:\t"	"stba	%%l2, [%0 + 2] %%asi\n\t"					\
	"ba,pt	%%xcc, 0f\n"							\
"15:\t"	" stba	%%l1, [%0 + 3] %%asi\n"						\
"2:\t"	"srl	%%l1, 8, %%l2\n"						\
"16:\t"	"stba	%%l2, [%0] %%asi\n"						\
"17:\t"	"stba	%%l1, [%0 + 1] %%asi\n"						\
"0:\n\t"									\
	"wr	%%g0, %4, %%asi\n\n\t"						\
	".section __ex_table\n\t"						\
	".word	4b, " #errh "\n\t"						\
	".word	5b, " #errh "\n\t"						\
	".word	6b, " #errh "\n\t"						\
	".word	7b, " #errh "\n\t"						\
	".word	8b, " #errh "\n\t"						\
	".word	9b, " #errh "\n\t"						\
	".word	10b, " #errh "\n\t"						\
	".word	11b, " #errh "\n\t"						\
	".word	12b, " #errh "\n\t"						\
	".word	13b, " #errh "\n\t"						\
	".word	14b, " #errh "\n\t"						\
	".word	15b, " #errh "\n\t"						\
	".word	16b, " #errh "\n\t"						\
	".word	17b, " #errh "\n\n\t"						\
	".previous\n\t"								\
	: : "r" (dst_addr), "r" (size), "r" (src_val), "r" (asi), "i" (ASI_AIUS)\
	: "l1", "l2", "g7", "g1", "cc");					\
})

#define do_integer_store(reg_num, size, dst_addr, regs, asi, errh) ({		\
	unsigned long zero = 0;							\
	unsigned long *src_val = &zero;						\
										\
	if (size == 16) {							\
		size = 8;							\
		zero = (((long)(reg_num ? 					\
		        (unsigned)fetch_reg(reg_num, regs) : 0)) << 32) |	\
			(unsigned)fetch_reg(reg_num + 1, regs);			\
	} else if (reg_num) src_val = fetch_reg_addr(reg_num, regs);		\
	store_common(dst_addr, size, src_val, asi, errh);			\
})

/* XXX Need to capture/release other cpu's for SMP around this. */
#define do_atomic(srcdest_reg, mem, errh) ({					\
	unsigned long flags, tmp;						\
										\
	save_and_cli(flags);							\
	tmp = *srcdest_reg;							\
	do_integer_load(srcdest_reg, 4, mem, 0, errh);				\
	store_common(mem, 4, &tmp, errh);					\
	restore_flags(flags);							\
})

static inline void advance(struct pt_regs *regs)
{
	regs->tpc   = regs->tnpc;
	regs->tnpc += 4;
	if ((current->thread.flags & SPARC_FLAG_32BIT) != 0) {
		regs->tpc &= 0xffffffff;
		regs->tnpc &= 0xffffffff;
	}
}

static inline int floating_point_load_or_store_p(unsigned int insn)
{
	return (insn >> 24) & 1;
}

static inline int ok_for_kernel(unsigned int insn)
{
	return !floating_point_load_or_store_p(insn);
}

void kernel_mna_trap_fault(struct pt_regs *regs, unsigned int insn) __asm__ ("kernel_mna_trap_fault");

void kernel_mna_trap_fault(struct pt_regs *regs, unsigned int insn)
{
	unsigned long g2 = regs->u_regs [UREG_G2];
	unsigned long fixup = search_exception_table (regs->tpc, &g2);

	if (!fixup) {
		unsigned long address = compute_effective_address(regs, insn, ((insn >> 25) & 0x1f));
        	if(address < PAGE_SIZE) {
                	printk(KERN_ALERT "Unable to handle kernel NULL pointer dereference in mna handler");
        	} else
                	printk(KERN_ALERT "Unable to handle kernel paging request in mna handler");
	        printk(KERN_ALERT " at virtual address %016lx\n",address);
		printk(KERN_ALERT "current->{mm,active_mm}->context = %016lx\n",
			(current->mm ? current->mm->context :
			current->active_mm->context));
		printk(KERN_ALERT "current->{mm,active_mm}->pgd = %016lx\n",
			(current->mm ? (unsigned long) current->mm->pgd :
			(unsigned long) current->active_mm->pgd));
	        die_if_kernel("Oops", regs);
		/* Not reached */
	}
	regs->tpc = fixup;
	regs->tnpc = regs->tpc + 4;
	regs->u_regs [UREG_G2] = g2;

	regs->tstate &= ~TSTATE_ASI;
	regs->tstate |= (ASI_AIUS << 24UL);
}

asmlinkage void kernel_unaligned_trap(struct pt_regs *regs, unsigned int insn, unsigned long sfar, unsigned long sfsr)
{
	enum direction dir = decode_direction(insn);
	int size = decode_access_size(insn);

	if(!ok_for_kernel(insn) || dir == both) {
		printk("Unsupported unaligned load/store trap for kernel at <%016lx>.\n",
		       regs->tpc);
		unaligned_panic("Kernel does fpu/atomic unaligned load/store.", regs);

		__asm__ __volatile__ ("\n"
"kernel_unaligned_trap_fault:\n\t"
		"mov	%0, %%o0\n\t"
		"call	kernel_mna_trap_fault\n\t"
		" mov	%1, %%o1\n\t"
		:
		: "r" (regs), "r" (insn)
		: "o0", "o1", "o2", "o3", "o4", "o5", "o7",
		  "g1", "g2", "g3", "g4", "g5", "g7", "cc");
	} else {
		unsigned long addr = compute_effective_address(regs, insn, ((insn >> 25) & 0x1f));

#ifdef DEBUG_MNA
		printk("KMNA: pc=%016lx [dir=%s addr=%016lx size=%d] retpc[%016lx]\n",
		       regs->tpc, dirstrings[dir], addr, size, regs->u_regs[UREG_RETPC]);
#endif
		switch(dir) {
		case load:
			do_integer_load(fetch_reg_addr(((insn>>25)&0x1f), regs),
					size, (unsigned long *) addr,
					decode_signedness(insn), decode_asi(insn, regs),
					kernel_unaligned_trap_fault);
			break;

		case store:
			do_integer_store(((insn>>25)&0x1f), size,
					 (unsigned long *) addr, regs,
					 decode_asi(insn, regs),
					 kernel_unaligned_trap_fault);
			break;
#if 0 /* unsupported */
		case both:
			do_atomic(fetch_reg_addr(((insn>>25)&0x1f), regs),
				  (unsigned long *) addr,
				  kernel_unaligned_trap_fault);
			break;
#endif
		default:
			panic("Impossible kernel unaligned trap.");
			/* Not reached... */
		}
		advance(regs);
	}
}

static char popc_helper[] = {
0, 1, 1, 2, 1, 2, 2, 3,
1, 2, 2, 3, 2, 3, 3, 4, 
};

int handle_popc(u32 insn, struct pt_regs *regs)
{
	u64 value;
	int ret, i, rd = ((insn >> 25) & 0x1f);
	int from_kernel = (regs->tstate & TSTATE_PRIV) != 0;
	                        
	if (insn & 0x2000) {
		maybe_flush_windows(0, 0, rd, from_kernel);
		value = sign_extend_imm13(insn);
	} else {
		maybe_flush_windows(0, insn & 0x1f, rd, from_kernel);
		value = fetch_reg(insn & 0x1f, regs);
	}
	for (ret = 0, i = 0; i < 16; i++) {
		ret += popc_helper[value & 0xf];
		value >>= 4;
	}
	if(rd < 16) {
		if (rd)
			regs->u_regs[rd] = ret;
	} else {
		if (current->thread.flags & SPARC_FLAG_32BIT) {
			struct reg_window32 *win32;
			win32 = (struct reg_window32 *)((unsigned long)((u32)regs->u_regs[UREG_FP]));
			put_user(ret, &win32->locals[rd - 16]);
		} else {
			struct reg_window *win;
			win = (struct reg_window *)(regs->u_regs[UREG_FP] + STACK_BIAS);
			put_user(ret, &win->locals[rd - 16]);
		}
	}
	advance(regs);
	return 1;
}

extern void do_fpother(struct pt_regs *regs);
extern void do_privact(struct pt_regs *regs);
extern void data_access_exception(struct pt_regs *regs);

int handle_ldf_stq(u32 insn, struct pt_regs *regs)
{
	unsigned long addr = compute_effective_address(regs, insn, 0);
	int freg = ((insn >> 25) & 0x1e) | ((insn >> 20) & 0x20);
	struct fpustate *f = FPUSTATE;
	int asi = decode_asi(insn, regs);
	int flag = (freg < 32) ? FPRS_DL : FPRS_DU;

	save_and_clear_fpu();
	current->thread.xfsr[0] &= ~0x1c000;
	if (freg & 3) {
		current->thread.xfsr[0] |= (6 << 14) /* invalid_fp_register */;
		do_fpother(regs);
		return 0;
	}
	if (insn & 0x200000) {
		/* STQ */
		u64 first = 0, second = 0;
		
		if (current->thread.fpsaved[0] & flag) {
			first = *(u64 *)&f->regs[freg];
			second = *(u64 *)&f->regs[freg+2];
		}
		if (asi < 0x80) {
			do_privact(regs);
			return 1;
		}
		switch (asi) {
		case ASI_P:
		case ASI_S: break;
		case ASI_PL:
		case ASI_SL: 
			{
				/* Need to convert endians */
				u64 tmp = __swab64p(&first);
				
				first = __swab64p(&second);
				second = tmp;
				break;
			}
		default:
			data_access_exception(regs);
			return 1;
		}
		if (put_user (first >> 32, (u32 *)addr) ||
		    __put_user ((u32)first, (u32 *)(addr + 4)) ||
		    __put_user (second >> 32, (u32 *)(addr + 8)) ||
		    __put_user ((u32)second, (u32 *)(addr + 12))) {
		    	data_access_exception(regs);
		    	return 1;
		}
	} else {
		/* LDF, LDDF, LDQF */
		u32 data[4] __attribute__ ((aligned(8)));
		int size, i;
		int err;

		if (asi < 0x80) {
			do_privact(regs);
			return 1;
		} else if (asi > ASI_SNFL) {
			data_access_exception(regs);
			return 1;
		}
		switch (insn & 0x180000) {
		case 0x000000: size = 1; break;
		case 0x100000: size = 4; break;
		default: size = 2; break;
		}
		for (i = 0; i < size; i++)
			data[i] = 0;
		
		err = get_user (data[0], (u32 *)addr);
		if (!err) {
			for (i = 1; i < size; i++)
				err |= __get_user (data[i], (u32 *)(addr + 4*i));
		}
		if (err && !(asi & 0x2 /* NF */)) {
			data_access_exception(regs);
			return 1;
		}
		if (asi & 0x8) /* Little */ {
			u64 tmp;

			switch (size) {
			case 1: data[0] = le32_to_cpup(data + 0); break;
			default:*(u64 *)(data + 0) = le64_to_cpup((u64 *)(data + 0));
				break;
			case 4: tmp = le64_to_cpup((u64 *)(data + 0));
				*(u64 *)(data + 0) = le64_to_cpup((u64 *)(data + 2));
				*(u64 *)(data + 2) = tmp;
				break;
			}
		}
		if (!(current->thread.fpsaved[0] & FPRS_FEF)) {
			current->thread.fpsaved[0] = FPRS_FEF;
			current->thread.gsr[0] = 0;
		}
		if (!(current->thread.fpsaved[0] & flag)) {
			if (freg < 32)
				memset(f->regs, 0, 32*sizeof(u32));
			else
				memset(f->regs+32, 0, 32*sizeof(u32));
		}
		memcpy(f->regs + freg, data, size * 4);
		current->thread.fpsaved[0] |= flag;
	}
	advance(regs);
	return 1;
}

void handle_ld_nf(u32 insn, struct pt_regs *regs)
{
	int rd = ((insn >> 25) & 0x1f);
	int from_kernel = (regs->tstate & TSTATE_PRIV) != 0;
	unsigned long *reg;
	                        
	maybe_flush_windows(0, 0, rd, from_kernel);
	reg = fetch_reg_addr(rd, regs);
	if (from_kernel || rd < 16) {
		reg[0] = 0;
		if ((insn & 0x780000) == 0x180000)
			reg[1] = 0;
	} else if (current->thread.flags & SPARC_FLAG_32BIT) {
		put_user(0, (int *)reg);
		if ((insn & 0x780000) == 0x180000)
			put_user(0, ((int *)reg) + 1);
	} else {
		put_user(0, reg);
		if ((insn & 0x780000) == 0x180000)
			put_user(0, reg + 1);
	}
	advance(regs);
}

void handle_lddfmna(struct pt_regs *regs, unsigned long sfar, unsigned long sfsr)
{
	unsigned long pc = regs->tpc;
	unsigned long tstate = regs->tstate;
	u32 insn;
	u32 first, second;
	u64 value;
	u8 asi, freg;
	int flag;
	struct fpustate *f = FPUSTATE;

	if(tstate & TSTATE_PRIV)
		die_if_kernel("lddfmna from kernel", regs);
	if(current->thread.flags & SPARC_FLAG_32BIT)
		pc = (u32)pc;
	if (get_user(insn, (u32 *)pc) != -EFAULT) {
		asi = sfsr >> 16;
		if ((asi > ASI_SNFL) ||
		    (asi < ASI_P))
			goto daex;
		if (get_user(first, (u32 *)sfar) ||
		     get_user(second, (u32 *)(sfar + 4))) {
			if (asi & 0x2) /* NF */ {
				first = 0; second = 0;
			} else
				goto daex;
		}
		save_and_clear_fpu();
		freg = ((insn >> 25) & 0x1e) | ((insn >> 20) & 0x20);
		value = (((u64)first) << 32) | second;
		if (asi & 0x8) /* Little */
			value = __swab64p(&value);
		flag = (freg < 32) ? FPRS_DL : FPRS_DU;
		if (!(current->thread.fpsaved[0] & FPRS_FEF)) {
			current->thread.fpsaved[0] = FPRS_FEF;
			current->thread.gsr[0] = 0;
		}
		if (!(current->thread.fpsaved[0] & flag)) {
			if (freg < 32)
				memset(f->regs, 0, 32*sizeof(u32));
			else
				memset(f->regs+32, 0, 32*sizeof(u32));
		}
		*(u64 *)(f->regs + freg) = value;
		current->thread.fpsaved[0] |= flag;
	} else {
daex:		data_access_exception(regs);
		return;
	}
	advance(regs);
	return;
}

void handle_stdfmna(struct pt_regs *regs, unsigned long sfar, unsigned long sfsr)
{
	unsigned long pc = regs->tpc;
	unsigned long tstate = regs->tstate;
	u32 insn;
	u64 value;
	u8 asi, freg;
	int flag;
	struct fpustate *f = FPUSTATE;

	if(tstate & TSTATE_PRIV)
		die_if_kernel("stdfmna from kernel", regs);
	if(current->thread.flags & SPARC_FLAG_32BIT)
		pc = (u32)pc;
	if (get_user(insn, (u32 *)pc) != -EFAULT) {
		freg = ((insn >> 25) & 0x1e) | ((insn >> 20) & 0x20);
		asi = sfsr >> 16;
		value = 0;
		flag = (freg < 32) ? FPRS_DL : FPRS_DU;
		if ((asi > ASI_SNFL) ||
		    (asi < ASI_P))
			goto daex;
		save_and_clear_fpu();
		if (current->thread.fpsaved[0] & flag)
			value = *(u64 *)&f->regs[freg];
		switch (asi) {
		case ASI_P:
		case ASI_S: break;
		case ASI_PL:
		case ASI_SL: 
			value = __swab64p(&value); break;
		default: goto daex;
		}
		if (put_user (value >> 32, (u32 *)sfar) ||
		    __put_user ((u32)value, (u32 *)(sfar + 4)))
			goto daex;
	} else {
daex:		data_access_exception(regs);
		return;
	}
	advance(regs);
	return;
}
/* $Id: sys32.S,v 1.12 2000/03/24 04:17:37 davem Exp $
 * sys32.S: I-cache tricks for 32-bit compatability layer simple
 *          conversions.
 *
 * Copyright (C) 1997 David S. Miller (davem@caip.rutgers.edu)
 * Copyright (C) 1998 Jakub Jelinek   (jj@ultra.linux.cz)
 */

#include <asm/errno.h>

/* NOTE: call as jump breaks return stack, we have to avoid that */

	.text

	.align		32
	.globl		sys32_mmap
sys32_mmap:
	srl		%o4, 0, %o4
	sethi		%hi(sys_mmap), %g1
	jmpl		%g1 + %lo(sys_mmap), %g0
	 srl		%o5, 0, %o5

	.align		32
	.globl		sys32_lseek
	.globl		sys32_chmod, sys32_mknod
sys32_lseek:
	sra		%o1, 0, %o1
	sethi		%hi(sys_lseek), %g1
	jmpl		%g1 + %lo(sys_lseek), %g0
	 nop
sys32_chmod:
	sethi		%hi(0xffff), %g2
	sethi		%hi(sys_chmod), %g1
	orcc		%g2, %lo(0xffff), %g2
	jmpl		%g1 + %lo(sys_chmod), %g0
	 and		%o1, %g2, %o1
sys32_mknod:
	sethi		%hi(0xffff), %g2
	sethi		%hi(sys_mknod), %g1
	orcc		%g2, %lo(0xffff), %g2
	jmpl		%g1 + %lo(sys_mknod), %g0
	 and		%o2, %g2, %o2

	.align		32
	.globl		sys32_sendto, sys32_recvfrom, sys32_getsockopt
sys32_sendto:
	sethi		%hi(sys_sendto), %g1
	jmpl		%g1 + %lo(sys_sendto), %g0
	 srl		%o4, 0, %o4
sys32_recvfrom:
	srl		%o4, 0, %o4
	sethi		%hi(sys_recvfrom), %g1
	jmpl		%g1 + %lo(sys_recvfrom), %g0
	 srl		%o5, 0, %o5
sys32_getsockopt:
	sethi		%hi(sys_getsockopt), %g1
	jmpl		%g1 + %lo(sys_getsockopt), %g0
	 srl		%o4, 0, %o4

	.globl		sys32_bdflush
sys32_bdflush:
	sethi		%hi(sys_bdflush), %g1
	jmpl		%g1 + %lo(sys_bdflush), %g0
	 sra		%o1, 0, %o1

	.align		32
	.globl		sys32_mmap2
sys32_mmap2:
	srl		%o4, 0, %o4
	sethi		%hi(sys_mmap), %g1
	srl		%o5, 0, %o5
	jmpl		%g1 + %lo(sys_mmap), %g0
	 sllx		%o5, 12, %o5

	.align		32
	.globl		sys32_socketcall
sys32_socketcall:	/* %o0=call, %o1=args */
	cmp		%o0, 1
	bl,pn		%xcc, do_einval
	 cmp		%o0, 17
	bg,pn		%xcc, do_einval
	 sub		%o0, 1, %o0
	sllx		%o0, 5, %o0
	sethi		%hi(__socketcall_table_begin), %g2
	or		%g2, %lo(__socketcall_table_begin), %g2
	jmpl		%g2 + %o0, %g0
	 nop

	/* Each entry is exactly 32 bytes. */
	.align		32
__socketcall_table_begin:
do_sys_socket: /* sys_socket(int, int, int) */
	ldswa		[%o1 + 0x0] %asi, %o0
	sethi		%hi(sys_socket), %g1
	ldswa		[%o1 + 0x8] %asi, %o2
	jmpl		%g1 + %lo(sys_socket), %g0
	 ldswa		[%o1 + 0x4] %asi, %o1
	nop
	nop
	nop
do_sys_bind: /* sys_bind(int fd, struct sockaddr *, int) */
	ldswa		[%o1 + 0x0] %asi, %o0
	sethi		%hi(sys_bind), %g1
	ldswa		[%o1 + 0x8] %asi, %o2
	jmpl		%g1 + %lo(sys_bind), %g0
	 lduwa		[%o1 + 0x4] %asi, %o1
	nop
	nop
	nop
do_sys_connect: /* sys_connect(int, struct sockaddr *, int) */
	ldswa		[%o1 + 0x0] %asi, %o0
	sethi		%hi(sys_connect), %g1
	ldswa		[%o1 + 0x8] %asi, %o2
	jmpl		%g1 + %lo(sys_connect), %g0
	 lduwa		[%o1 + 0x4] %asi, %o1
	nop
	nop
	nop
do_sys_listen: /* sys_listen(int, int) */
	ldswa		[%o1 + 0x0] %asi, %o0
	sethi		%hi(sys_listen), %g1
	jmpl		%g1 + %lo(sys_listen), %g0
	 ldswa		[%o1 + 0x4] %asi, %o1
	nop
	nop
	nop
	nop
do_sys_accept: /* sys_accept(int, struct sockaddr *, int *) */
	ldswa		[%o1 + 0x0] %asi, %o0
	sethi		%hi(sys_accept), %g1
	lduwa		[%o1 + 0x8] %asi, %o2
	jmpl		%g1 + %lo(sys_accept), %g0
	 lduwa		[%o1 + 0x4] %asi, %o1
	nop
	nop
	nop
do_sys_getsockname: /* sys_getsockname(int, struct sockaddr *, int *) */
	ldswa		[%o1 + 0x0] %asi, %o0
	sethi		%hi(sys_getsockname), %g1
	lduwa		[%o1 + 0x8] %asi, %o2
	jmpl		%g1 + %lo(sys_getsockname), %g0
	 lduwa		[%o1 + 0x4] %asi, %o1
	nop
	nop
	nop
do_sys_getpeername: /* sys_getpeername(int, struct sockaddr *, int *) */
	ldswa		[%o1 + 0x0] %asi, %o0
	sethi		%hi(sys_getpeername), %g1
	lduwa		[%o1 + 0x8] %asi, %o2
	jmpl		%g1 + %lo(sys_getpeername), %g0
	 lduwa		[%o1 + 0x4] %asi, %o1
	nop
	nop
	nop
do_sys_socketpair: /* sys_socketpair(int, int, int, int *) */
	ldswa		[%o1 + 0x0] %asi, %o0
	sethi		%hi(sys_socketpair), %g1
	ldswa		[%o1 + 0x8] %asi, %o2
	lduwa		[%o1 + 0xc] %asi, %o3
	jmpl		%g1 + %lo(sys_socketpair), %g0
	 ldswa		[%o1 + 0x4] %asi, %o1
	nop
	nop
do_sys_send: /* sys_send(int, void *, size_t, unsigned int) */
	ldswa		[%o1 + 0x0] %asi, %o0
	sethi		%hi(sys_send), %g1
	lduwa		[%o1 + 0x8] %asi, %o2
	lduwa		[%o1 + 0xc] %asi, %o3
	jmpl		%g1 + %lo(sys_send), %g0
	 lduwa		[%o1 + 0x4] %asi, %o1
	nop
	nop
do_sys_recv: /* sys_recv(int, void *, size_t, unsigned int) */
	ldswa		[%o1 + 0x0] %asi, %o0
	sethi		%hi(sys_recv), %g1
	lduwa		[%o1 + 0x8] %asi, %o2
	lduwa		[%o1 + 0xc] %asi, %o3
	jmpl		%g1 + %lo(sys_recv), %g0
	 lduwa		[%o1 + 0x4] %asi, %o1
	nop
	nop
do_sys_sendto: /* sys32_sendto(int, u32, __kernel_size_t32, unsigned int, u32, int) */
	ldswa		[%o1 + 0x0] %asi, %o0
	sethi		%hi(sys32_sendto), %g1
	lduwa		[%o1 + 0x8] %asi, %o2
	lduwa		[%o1 + 0xc] %asi, %o3
	lduwa		[%o1 + 0x10] %asi, %o4
	ldswa		[%o1 + 0x14] %asi, %o5
	jmpl		%g1 + %lo(sys32_sendto), %g0
	 lduwa		[%o1 + 0x4] %asi, %o1
do_sys_recvfrom: /* sys32_recvfrom(int, u32, __kernel_size_t32, unsigned int, u32, u32) */
	ldswa		[%o1 + 0x0] %asi, %o0
	sethi		%hi(sys32_recvfrom), %g1
	lduwa		[%o1 + 0x8] %asi, %o2
	lduwa		[%o1 + 0xc] %asi, %o3
	lduwa		[%o1 + 0x10] %asi, %o4
	lduwa		[%o1 + 0x14] %asi, %o5
	jmpl		%g1 + %lo(sys32_recvfrom), %g0
	 lduwa		[%o1 + 0x4] %asi, %o1
do_sys_shutdown: /* sys_shutdown(int, int) */
	ldswa		[%o1 + 0x0] %asi, %o0
	sethi		%hi(sys_shutdown), %g1
	jmpl		%g1 + %lo(sys_shutdown), %g0
	 ldswa		[%o1 + 0x4] %asi, %o1
	nop
	nop
	nop
	nop
do_sys_setsockopt: /* sys32_setsockopt(int, int, int, char *, int) */
	ldswa		[%o1 + 0x0] %asi, %o0
	sethi		%hi(sys32_setsockopt), %g1
	ldswa		[%o1 + 0x8] %asi, %o2
	lduwa		[%o1 + 0xc] %asi, %o3
	ldswa		[%o1 + 0x10] %asi, %o4
	jmpl		%g1 + %lo(sys32_setsockopt), %g0
	 ldswa		[%o1 + 0x4] %asi, %o1
	nop
do_sys_getsockopt: /* sys32_getsockopt(int, int, int, u32, u32) */
	ldswa		[%o1 + 0x0] %asi, %o0
	sethi		%hi(sys32_getsockopt), %g1
	ldswa		[%o1 + 0x8] %asi, %o2
	lduwa		[%o1 + 0xc] %asi, %o3
	lduwa		[%o1 + 0x10] %asi, %o4
	jmpl		%g1 + %lo(sys32_getsockopt), %g0
	 ldswa		[%o1 + 0x4] %asi, %o1
	nop
do_sys_sendmsg: /* sys32_sendmsg(int, struct msghdr32 *, unsigned int) */
	ldswa		[%o1 + 0x0] %asi, %o0
	sethi		%hi(sys32_sendmsg), %g1
	lduwa		[%o1 + 0x8] %asi, %o2
	jmpl		%g1 + %lo(sys32_sendmsg), %g0
	 lduwa		[%o1 + 0x4] %asi, %o1
	nop
	nop
	nop
do_sys_recvmsg: /* sys32_recvmsg(int, struct msghdr32 *, unsigned int) */
	ldswa		[%o1 + 0x0] %asi, %o0
	sethi		%hi(sys32_recvmsg), %g1
	lduwa		[%o1 + 0x8] %asi, %o2
	jmpl		%g1 + %lo(sys32_recvmsg), %g0
	 lduwa		[%o1 + 0x4] %asi, %o1
	nop
	nop
	nop
__socketcall_table_end:

do_einval:
	retl
	 mov		-EINVAL, %o0
do_efault:
	retl
	 mov		-EFAULT, %o0

	.section	__ex_table
	.align		4
	.word		__socketcall_table_begin, 0, __socketcall_table_end, do_efault
	.previous
/* $Id: dtlb_backend.S,v 1.16 2001/10/09 04:02:11 davem Exp $
 * dtlb_backend.S: Back end to DTLB miss replacement strategy.
 *                 This is included directly into the trap table.
 *
 * Copyright (C) 1996,1998 David S. Miller (davem@redhat.com)
 * Copyright (C) 1997,1998 Jakub Jelinek   (jj@ultra.linux.cz)
 */

#include <asm/pgtable.h>

#if PAGE_SHIFT == 13
#define FILL_VALID_SZ_BITS1(r1) \
	 sllx		%g2, 62, r1
#define FILL_VALID_SZ_BITS2(r1)
#define FILL_VALID_SZ_BITS_NOP nop
#elif PAGE_SHIFT == 16
#define FILL_VALID_SZ_BITS1(r1) \
	or		%g0, 5, r1
#define FILL_VALID_SZ_BITS2(r1) \
	sllx		r1, 61, r1
#define FILL_VALID_SZ_BITS_NOP
#else
#error unsupported PAGE_SIZE
#endif /* PAGE_SHIFT */

#define VPTE_BITS		(_PAGE_CP | _PAGE_CV | _PAGE_P )
#define VPTE_SHIFT		(PAGE_SHIFT - 3)
#define TLB_PMD_SHIFT		(PAGE_SHIFT - 3 + 3)
#define TLB_PGD_SHIFT		(PMD_BITS + PAGE_SHIFT - 3 + 3)
#define TLB_PMD_MASK		(((1 << PMD_BITS) - 1) << 1)
#define TLB_PGD_MASK		(((1 << (VA_BITS - PAGE_SHIFT - (PAGE_SHIFT - 3) - PMD_BITS)) - 1) << 2)

/* Ways we can get here:
 *
 * 1) Nucleus loads and stores to/from PA-->VA direct mappings at tl>1.
 * 2) Nucleus loads and stores to/from user/kernel window save areas.
 * 3) VPTE misses from dtlb_base and itlb_base.
 */

/* TLB1 ** ICACHE line 1: tl1 DTLB and quick VPTE miss	*/
	ldxa		[%g1 + %g1] ASI_DMMU, %g4	! Get TAG_ACCESS
	add		%g3, %g3, %g5			! Compute VPTE base
	cmp		%g4, %g5			! VPTE miss?
	bgeu,pt		%xcc, 1f			! Continue here
	 andcc		%g4, TAG_CONTEXT_BITS, %g5	! From Nucleus? (for tl0 miss)
	ba,pt		%xcc, from_tl1_trap		! Fall to tl0 miss
	 rdpr		%tl, %g5			! For tl0 miss TL==3 test
1:	sllx		%g6, VPTE_SHIFT, %g4		! Position TAG_ACCESS

/* TLB1 ** ICACHE line 2: Quick VPTE miss	  	*/
	or		%g4, %g5, %g4			! Prepare TAG_ACCESS
	mov		TSB_REG, %g1			! Grab TSB reg
	ldxa		[%g1] ASI_DMMU, %g5		! Doing PGD caching?
	srlx		%g6, (TLB_PMD_SHIFT - 1), %g1	! Position PMD offset
	be,pn		%xcc, sparc64_vpte_nucleus	! Is it from Nucleus?
	 and		%g1, TLB_PMD_MASK, %g1		! Mask PMD offset bits
	brnz,pt		%g5, sparc64_vpte_continue	! Yep, go like smoke
	 add		%g1, %g1, %g1			! Position PMD offset some more

/* TLB1 ** ICACHE line 3: Quick VPTE miss	  	*/
	srlx		%g6, (TLB_PGD_SHIFT - 2), %g5	! Position PGD offset
	and		%g5, TLB_PGD_MASK, %g5		! Mask PGD offset
	lduwa		[%g7 + %g5] ASI_PHYS_USE_EC, %g5! Load PGD
	brz,pn		%g5, vpte_noent			! Valid?
sparc64_kpte_continue:
	 sllx		%g5, 11, %g5			! Shift into place
sparc64_vpte_continue:
	lduwa		[%g5 + %g1] ASI_PHYS_USE_EC, %g5! Load PMD
	sllx		%g5, 11, %g5			! Shift into place
	brz,pn		%g5, vpte_noent			! Valid?

/* TLB1 ** ICACHE line 4: Quick VPTE miss	  	*/
	 FILL_VALID_SZ_BITS1(%g1)			! Put _PAGE_VALID into %g1
	FILL_VALID_SZ_BITS2(%g1)			! Put _PAGE_VALID into %g1
	or		%g5, VPTE_BITS, %g5		! Prepare VPTE data
	or		%g5, %g1, %g5			! ...
	mov		TLB_SFSR, %g1			! Restore %g1 value
	stxa		%g5, [%g0] ASI_DTLB_DATA_IN	! Load VPTE into TLB
	stxa		%g4, [%g1 + %g1] ASI_DMMU	! Restore previous TAG_ACCESS
	retry						! Load PTE once again
	FILL_VALID_SZ_BITS_NOP

#undef VPTE_SHIFT
#undef TLB_PMD_SHIFT
#undef TLB_PGD_SHIFT
#undef VPTE_BITS
#undef TLB_PMD_MASK
#undef TLB_PGD_MASK
#undef FILL_VALID_SZ_BITS1
#undef FILL_VALID_SZ_BITS2
#undef FILL_VALID_SZ_BITS_NOP

/* $Id: dtlb_base.S,v 1.17 2001/10/11 22:33:52 davem Exp $
 * dtlb_base.S:	Front end to DTLB miss replacement strategy.
 *              This is included directly into the trap table.
 *
 * Copyright (C) 1996,1998 David S. Miller (davem@redhat.com)
 * Copyright (C) 1997,1998 Jakub Jelinek   (jj@ultra.linux.cz)
 */

/* %g1	TLB_SFSR	(%g1 + %g1 == TLB_TAG_ACCESS)
 * %g2	(KERN_HIGHBITS | KERN_LOWBITS)
 * %g3  VPTE base	(0xfffffffe00000000)	Spitfire/Blackbird (44-bit VA space)
 *			(0xffe0000000000000)	Cheetah		   (64-bit VA space)
 * %g7	__pa(current->mm->pgd)
 *
 * The VPTE base value is completely magic, but note that
 * few places in the kernel other than these TLB miss
 * handlers know anything about the VPTE mechanism or
 * how it works (see VPTE_SIZE, TASK_SIZE and PTRS_PER_PGD).
 * Consider the 44-bit VADDR Ultra-I/II case as an example:
 *
 * VA[0 :  (1<<43)] produce VPTE index [%g3                        :   0]
 * VA[0 : -(1<<43)] produce VPTE index [%g3-(1<<(43-PAGE_SHIFT+3)) : %g3]
 *
 * For Cheetah's 64-bit VADDR space this is:
 *
 * VA[0 :  (1<<63)] produce VPTE index [%g3                        :   0]
 * VA[0 : -(1<<63)] produce VPTE index [%g3-(1<<(63-PAGE_SHIFT+3)) : %g3]
 *
 * If you're paying attention you'll notice that this means half of
 * the VPTE table is above %g3 and half is below, low VA addresses
 * map progressively upwards from %g3, and high VA addresses map
 * progressively upwards towards %g3.  This trick was needed to make
 * the same 8 instruction handler work both for Spitfire/Blackbird's
 * peculiar VA space hole configuration and the full 64-bit VA space
 * one of Cheetah at the same time.
 */

/* Ways we can get here:
 *
 * 1) Nucleus loads and stores to/from PA-->VA direct mappings.
 * 2) Nucleus loads and stores to/from vmalloc() areas.
 * 3) User loads and stores.
 * 4) User space accesses by nucleus at tl0
 */

#if PAGE_SHIFT == 13
/*
 * To compute vpte offset, we need to do ((addr >> 13) << 3),
 * which can be optimized to (addr >> 10) if bits 10/11/12 can
 * be guaranteed to be 0 ... mmu_context.h does guarantee this
 * by only using 10 bits in the hwcontext value.
 */
#define CREATE_VPTE_OFFSET1(r1, r2)
#define CREATE_VPTE_OFFSET2(r1, r2) \
				srax	r1, 10, r2
#define CREATE_VPTE_NOP		nop
#else
#define CREATE_VPTE_OFFSET1(r1, r2) \
				srax	r1, PAGE_SHIFT, r2
#define CREATE_VPTE_OFFSET2(r1, r2) \
				sllx	r2, 3, r2
#define CREATE_VPTE_NOP
#endif

/* DTLB ** ICACHE line 1: Quick user TLB misses		*/
	ldxa		[%g1 + %g1] ASI_DMMU, %g4	! Get TAG_ACCESS
	andcc		%g4, TAG_CONTEXT_BITS, %g0	! From Nucleus?
	mov		1, %g5				! For TL==3 test
from_tl1_trap:
	CREATE_VPTE_OFFSET1(%g4, %g6)			! Create VPTE offset
	be,pn		%xcc, 3f			! Yep, special processing
	 CREATE_VPTE_OFFSET2(%g4, %g6)			! Create VPTE offset
	cmp		%g5, 3				! Last trap level?
	be,pn		%xcc, longpath			! Yep, cannot risk VPTE miss
	 nop						! delay slot

/* DTLB ** ICACHE line 2: User finish + quick kernel TLB misses	*/
	ldxa		[%g3 + %g6] ASI_S, %g5		! Load VPTE
1:	brgez,pn	%g5, longpath			! Invalid, branch out
	 nop						! Delay-slot
9:	stxa		%g5, [%g0] ASI_DTLB_DATA_IN	! Reload TLB
	retry						! Trap return
3:	brlz,pt		%g4, 9b				! Kernel virtual map?
	 xor		%g2, %g4, %g5			! Finish bit twiddles
	ba,a,pt		%xcc, kvmap			! Yep, go check for obp/vmalloc

/* DTLB ** ICACHE line 3: winfixups+real_faults		*/
longpath:
	rdpr		%pstate, %g5			! Move into alternate globals
	wrpr		%g5, PSTATE_AG|PSTATE_MG, %pstate
	rdpr		%tl, %g4			! See where we came from.
	cmp		%g4, 1				! Is etrap/rtrap window fault?
	mov		TLB_TAG_ACCESS, %g4		! Prepare for fault processing
	ldxa		[%g4] ASI_DMMU, %g5		! Load faulting VA page
	be,pt		%xcc, sparc64_realfault_common	! Jump to normal fault handling
	 mov		FAULT_CODE_DTLB, %g4		! It was read from DTLB

/* DTLB ** ICACHE line 4: Unused...	*/
	ba,a,pt		%xcc, winfix_trampoline		! Call window fixup code
	nop
	nop
	nop
	nop
	nop
	nop
	CREATE_VPTE_NOP

#undef CREATE_VPTE_OFFSET1
#undef CREATE_VPTE_OFFSET2
#undef CREATE_VPTE_NOP
/* $Id: itlb_base.S,v 1.11 2001/08/17 04:55:09 kanoj Exp $
 * itlb_base.S:	Front end to ITLB miss replacement strategy.
 *              This is included directly into the trap table.
 *
 * Copyright (C) 1996,1998 David S. Miller (davem@redhat.com)
 * Copyright (C) 1997,1998 Jakub Jelinek   (jj@ultra.linux.cz)
 */

#if PAGE_SHIFT == 13
/*
 * To compute vpte offset, we need to do ((addr >> 13) << 3),
 * which can be optimized to (addr >> 10) if bits 10/11/12 can
 * be guaranteed to be 0 ... mmu_context.h does guarantee this
 * by only using 10 bits in the hwcontext value.
 */
#define CREATE_VPTE_OFFSET1(r1, r2) \
				srax	r1, 10, r2
#define CREATE_VPTE_OFFSET2(r1, r2)
#define CREATE_VPTE_NOP		nop
#else /* PAGE_SHIFT */
#define CREATE_VPTE_OFFSET1(r1, r2) \
				srax	r1, PAGE_SHIFT, r2
#define CREATE_VPTE_OFFSET2(r1, r2) \
				sllx	r2, 3, r2
#define CREATE_VPTE_NOP
#endif /* PAGE_SHIFT */


/* Ways we can get here:
 *
 * 1) Nucleus instruction misses from module code.
 * 2) All user instruction misses.
 *
 * All real page faults merge their code paths to the
 * sparc64_realfault_common label below.
 */

/* ITLB ** ICACHE line 1: Quick user TLB misses		*/
	ldxa		[%g1 + %g1] ASI_IMMU, %g4	! Get TAG_ACCESS
	CREATE_VPTE_OFFSET1(%g4, %g6)			! Create VPTE offset
	CREATE_VPTE_OFFSET2(%g4, %g6)			! Create VPTE offset
	ldxa		[%g3 + %g6] ASI_P, %g5		! Load VPTE
1:	brgez,pn	%g5, 3f				! Not valid, branch out
	 nop						! Delay-slot
2:	stxa		%g5, [%g0] ASI_ITLB_DATA_IN	! Load PTE into TLB
	retry						! Trap return
3:	rdpr		%pstate, %g4			! Move into alternate globals

/* ITLB ** ICACHE line 2: Real faults			*/
	wrpr		%g4, PSTATE_AG|PSTATE_MG, %pstate
	rdpr		%tpc, %g5			! And load faulting VA
	mov		FAULT_CODE_ITLB, %g4		! It was read from ITLB
sparc64_realfault_common:				! Called by TL0 dtlb_miss too
	stb		%g4, [%g6 + AOFF_task_thread + AOFF_thread_fault_code]
	stx		%g5, [%g6 + AOFF_task_thread + AOFF_thread_fault_address]
	ba,pt		%xcc, etrap			! Save state
1:	 rd		%pc, %g7			! ...
	nop

/* ITLB ** ICACHE line 3: Finish faults + window fixups	*/
	call		do_sparc64_fault		! Call fault handler
	 add		%sp, STACK_BIAS + REGWIN_SZ, %o0! Compute pt_regs arg
	ba,pt		%xcc, rtrap_clr_l6		! Restore cpu state
	 nop
winfix_trampoline:
	rdpr		%tpc, %g3			! Prepare winfixup TNPC
	or		%g3, 0x7c, %g3			! Compute offset to branch
	wrpr		%g3, %tnpc			! Write it into TNPC
	done						! Do it to it

/* ITLB ** ICACHE line 4: Unused...	*/
	nop
	nop
	nop
	nop
	nop
	nop
	nop
	CREATE_VPTE_NOP

#undef CREATE_VPTE_OFFSET1
#undef CREATE_VPTE_OFFSET2
#undef CREATE_VPTE_NOP
/* $Id: starfire.c,v 1.10 2001/04/14 21:13:45 davem Exp $
 * starfire.c: Starfire/E10000 support.
 *
 * Copyright (C) 1998 David S. Miller (davem@redhat.com)
 * Copyright (C) 2000 Anton Blanchard (anton@samba.org)
 */

#include <linux/kernel.h>
#include <linux/slab.h>

#include <asm/page.h>
#include <asm/oplib.h>
#include <asm/smp.h>
#include <asm/upa.h>
#include <asm/starfire.h>

/*
 * A few places around the kernel check this to see if
 * they need to call us to do things in a Starfire specific
 * way.
 */
int this_is_starfire = 0;

void check_if_starfire(void)
{
	int ssnode = prom_finddevice("/ssp-serial");
	if(ssnode != 0 && ssnode != -1)
		this_is_starfire = 1;
}

void starfire_cpu_setup(void)
{
	if (this_is_starfire) {
/*
 * We do this in starfire_translate and xcall_deliver. When we fix our cpu
 * arrays to support > 64 processors we can use the real upaid instead
 * of the logical cpuid in __cpu_number_map etc, then we can get rid of
 * the translations everywhere. - Anton
 */
#if 0
		int i;

		/*
		 * Now must fixup cpu MIDs.  OBP gave us a logical
		 * linear cpuid number, not the real upaid.
		 */
		for(i = 0; i < linux_num_cpus; i++) {
			unsigned int mid = linux_cpus[i].mid;

			mid = (((mid & 0x3c) << 1) |
			       ((mid & 0x40) >> 4) |
			       (mid & 0x3));

			linux_cpus[i].mid = mid;
		}
#endif
	}
}

int starfire_hard_smp_processor_id(void)
{
	return upa_readl(0x1fff40000d0UL);
}

/*
 * Each Starfire board has 32 registers which perform translation
 * and delivery of traditional interrupt packets into the extended
 * Starfire hardware format.  Essentially UPAID's now have 2 more
 * bits than in all previous Sun5 systems.
 */
struct starfire_irqinfo {
	unsigned long imap_slots[32];
	unsigned long tregs[32];
	struct starfire_irqinfo *next;
	int upaid, hwmid;
};

static struct starfire_irqinfo *sflist = NULL;

/* Beam me up Scott(McNeil)y... */
void *starfire_hookup(int upaid)
{
	struct starfire_irqinfo *p;
	unsigned long treg_base, hwmid, i;

	p = kmalloc(sizeof(*p), GFP_KERNEL);
	if(!p) {
		prom_printf("starfire_hookup: No memory, this is insane.\n");
		prom_halt();
	}
	treg_base = 0x100fc000000UL;
	hwmid = ((upaid & 0x3c) << 1) |
		((upaid & 0x40) >> 4) |
		(upaid & 0x3);
	p->hwmid = hwmid;
	treg_base += (hwmid << 33UL);
	treg_base += 0x200UL;
	for(i = 0; i < 32; i++) {
		p->imap_slots[i] = 0UL;
		p->tregs[i] = treg_base + (i * 0x10UL);
		/* Lets play it safe and not overwrite existing mappings */
		if (upa_readl(p->tregs[i]) != 0)
			p->imap_slots[i] = 0xdeadbeaf;
	}
	p->upaid = upaid;
	p->next = sflist;
	sflist = p;

	return (void *) p;
}

unsigned int starfire_translate(unsigned long imap,
				unsigned int upaid)
{
	struct starfire_irqinfo *p;
	unsigned int bus_hwmid;
	unsigned int i;

	bus_hwmid = (((unsigned long)imap) >> 33) & 0x7f;
	for(p = sflist; p != NULL; p = p->next)
		if(p->hwmid == bus_hwmid)
			break;
	if(p == NULL) {
		prom_printf("XFIRE: Cannot find irqinfo for imap %016lx\n",
			    ((unsigned long)imap));
		prom_halt();
	}
	for(i = 0; i < 32; i++) {
		if(p->imap_slots[i] == imap ||
		   p->imap_slots[i] == 0UL)
			break;
	}
	if(i == 32) {
		printk("starfire_translate: Are you kidding me?\n");
		panic("Lucy in the sky....");
	}
	p->imap_slots[i] = imap;

	/* map to real upaid */
	upaid = (((upaid & 0x3c) << 1) |
	       ((upaid & 0x40) >> 4) |
	       (upaid & 0x3));

	upa_writel(upaid, p->tregs[i]);

	return i;
}
ELF




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endif
/* $Id: pci_impl.h,v 1.9 2001/06/13 06:34:30 davem Exp $
 * pci_impl.h: Helper definitions for PCI controller support.
 *
 * Copyright (C) 1999 David S. Miller (davem@redhat.com)
 */

#ifndef PCI_IMPL_H
#define PCI_IMPL_H

#include <linux/types.h>
#include <linux/spinlock.h>
#include <asm/io.h>

extern spinlock_t pci_controller_lock;
extern struct pci_controller_info *pci_controller_root;

extern struct pci_pbm_info *pci_bus2pbm[256];
extern unsigned char pci_highest_busnum;
extern int pci_num_controllers;

/* PCI bus scanning and fixup support. */
extern void pci_fixup_host_bridge_self(struct pci_bus *pbus);
extern void pci_fill_in_pbm_cookies(struct pci_bus *pbus,
				    struct pci_pbm_info *pbm,
				    int prom_node);
extern void pci_record_assignments(struct pci_pbm_info *pbm,
				   struct pci_bus *pbus);
extern void pci_assign_unassigned(struct pci_pbm_info *pbm,
				  struct pci_bus *pbus);
extern void pci_fixup_irq(struct pci_pbm_info *pbm,
			  struct pci_bus *pbus);
extern void pci_determine_66mhz_disposition(struct pci_pbm_info *pbm,
					    struct pci_bus *pbus);
extern void pci_setup_busmastering(struct pci_pbm_info *pbm,
				   struct pci_bus *pbus);
extern void pci_register_legacy_regions(struct resource *io_res,
					struct resource *mem_res);

/* Error reporting support. */
extern void pci_scan_for_target_abort(struct pci_controller_info *, struct pci_pbm_info *, struct pci_bus *);
extern void pci_scan_for_master_abort(struct pci_controller_info *, struct pci_pbm_info *, struct pci_bus *);
extern void pci_scan_for_parity_error(struct pci_controller_info *, struct pci_pbm_info *, struct pci_bus *);

/* Configuration space access. */
extern spinlock_t pci_poke_lock;
extern volatile int pci_poke_in_progress;
extern volatile int pci_poke_cpu;
extern volatile int pci_poke_faulted;

static __inline__ void pci_config_read8(u8 *addr, u8 *ret)
{
	unsigned long flags;
	u8 byte;

	spin_lock_irqsave(&pci_poke_lock, flags);
	pci_poke_cpu = smp_processor_id();
	pci_poke_in_progress = 1;
	pci_poke_faulted = 0;
	__asm__ __volatile__("membar #Sync\n\t"
			     "lduba [%1] %2, %0\n\t"
			     "membar #Sync"
			     : "=r" (byte)
			     : "r" (addr), "i" (ASI_PHYS_BYPASS_EC_E_L)
			     : "memory");
	pci_poke_in_progress = 0;
	pci_poke_cpu = -1;
	if (!pci_poke_faulted)
		*ret = byte;
	spin_unlock_irqrestore(&pci_poke_lock, flags);
}

static __inline__ void pci_config_read16(u16 *addr, u16 *ret)
{
	unsigned long flags;
	u16 word;

	spin_lock_irqsave(&pci_poke_lock, flags);
	pci_poke_cpu = smp_processor_id();
	pci_poke_in_progress = 1;
	pci_poke_faulted = 0;
	__asm__ __volatile__("membar #Sync\n\t"
			     "lduha [%1] %2, %0\n\t"
			     "membar #Sync"
			     : "=r" (word)
			     : "r" (addr), "i" (ASI_PHYS_BYPASS_EC_E_L)
			     : "memory");
	pci_poke_in_progress = 0;
	pci_poke_cpu = -1;
	if (!pci_poke_faulted)
		*ret = word;
	spin_unlock_irqrestore(&pci_poke_lock, flags);
}

static __inline__ void pci_config_read32(u32 *addr, u32 *ret)
{
	unsigned long flags;
	u32 dword;

	spin_lock_irqsave(&pci_poke_lock, flags);
	pci_poke_cpu = smp_processor_id();
	pci_poke_in_progress = 1;
	pci_poke_faulted = 0;
	__asm__ __volatile__("membar #Sync\n\t"
			     "lduwa [%1] %2, %0\n\t"
			     "membar #Sync"
			     : "=r" (dword)
			     : "r" (addr), "i" (ASI_PHYS_BYPASS_EC_E_L)
			     : "memory");
	pci_poke_in_progress = 0;
	pci_poke_cpu = -1;
	if (!pci_poke_faulted)
		*ret = dword;
	spin_unlock_irqrestore(&pci_poke_lock, flags);
}

static __inline__ void pci_config_write8(u8 *addr, u8 val)
{
	unsigned long flags;

	spin_lock_irqsave(&pci_poke_lock, flags);
	pci_poke_cpu = smp_processor_id();
	pci_poke_in_progress = 1;
	pci_poke_faulted = 0;
	__asm__ __volatile__("membar #Sync\n\t"
			     "stba %0, [%1] %2\n\t"
			     "membar #Sync"
			     : /* no outputs */
			     : "r" (val), "r" (addr), "i" (ASI_PHYS_BYPASS_EC_E_L)
			     : "memory");
	pci_poke_in_progress = 0;
	pci_poke_cpu = -1;
	spin_unlock_irqrestore(&pci_poke_lock, flags);
}

static __inline__ void pci_config_write16(u16 *addr, u16 val)
{
	unsigned long flags;

	spin_lock_irqsave(&pci_poke_lock, flags);
	pci_poke_cpu = smp_processor_id();
	pci_poke_in_progress = 1;
	pci_poke_faulted = 0;
	__asm__ __volatile__("membar #Sync\n\t"
			     "stha %0, [%1] %2\n\t"
			     "membar #Sync"
			     : /* no outputs */
			     : "r" (val), "r" (addr), "i" (ASI_PHYS_BYPASS_EC_E_L)
			     : "memory");
	pci_poke_in_progress = 0;
	pci_poke_cpu = -1;
	spin_unlock_irqrestore(&pci_poke_lock, flags);
}

static __inline__ void pci_config_write32(u32 *addr, u32 val)
{
	unsigned long flags;

	spin_lock_irqsave(&pci_poke_lock, flags);
	pci_poke_cpu = smp_processor_id();
	pci_poke_in_progress = 1;
	pci_poke_faulted = 0;
	__asm__ __volatile__("membar #Sync\n\t"
			     "stwa %0, [%1] %2\n\t"
			     "membar #Sync"
			     : /* no outputs */
			     : "r" (val), "r" (addr), "i" (ASI_PHYS_BYPASS_EC_E_L)
			     : "memory");
	pci_poke_in_progress = 0;
	pci_poke_cpu = -1;
	spin_unlock_irqrestore(&pci_poke_lock, flags);
}

#endif /* !(PCI_IMPL_H) */
/* $Id: pci_iommu.c,v 1.16 2001/10/09 02:24:33 davem Exp $
 * pci_iommu.c: UltraSparc PCI controller IOM/STC support.
 *
 * Copyright (C) 1999 David S. Miller (davem@redhat.com)
 * Copyright (C) 1999, 2000 Jakub Jelinek (jakub@redhat.com)
 */

#include <linux/kernel.h>
#include <linux/sched.h>
#include <linux/mm.h>

#include <asm/pbm.h>

#include "iommu_common.h"

#define PCI_STC_CTXMATCH_ADDR(STC, CTX)	\
	((STC)->strbuf_ctxmatch_base + ((CTX) << 3))

/* Accessing IOMMU and Streaming Buffer registers.
 * REG parameter is a physical address.  All registers
 * are 64-bits in size.
 */
#define pci_iommu_read(__reg) \
({	u64 __ret; \
	__asm__ __volatile__("ldxa [%1] %2, %0" \
			     : "=r" (__ret) \
			     : "r" (__reg), "i" (ASI_PHYS_BYPASS_EC_E) \
			     : "memory"); \
	__ret; \
})
#define pci_iommu_write(__reg, __val) \
	__asm__ __volatile__("stxa %0, [%1] %2" \
			     : /* no outputs */ \
			     : "r" (__val), "r" (__reg), \
			       "i" (ASI_PHYS_BYPASS_EC_E))

/* Must be invoked under the IOMMU lock. */
static void __iommu_flushall(struct pci_iommu *iommu)
{
	unsigned long tag;
	int entry;

	tag = iommu->iommu_flush + (0xa580UL - 0x0210UL);
	for (entry = 0; entry < 16; entry++) {
		pci_iommu_write(tag, 0);
		tag += 8;
	}

	/* Ensure completion of previous PIO writes. */
	(void) pci_iommu_read(iommu->write_complete_reg);

	/* Now update everyone's flush point. */
	for (entry = 0; entry < PBM_NCLUSTERS; entry++) {
		iommu->alloc_info[entry].flush =
			iommu->alloc_info[entry].next;
	}
}

static iopte_t *alloc_streaming_cluster(struct pci_iommu *iommu, unsigned long npages)
{
	iopte_t *iopte, *limit, *first;
	unsigned long cnum, ent, flush_point;

	cnum = 0;
	while ((1UL << cnum) < npages)
		cnum++;
	iopte  = (iommu->page_table +
		  (cnum << (iommu->page_table_sz_bits - PBM_LOGCLUSTERS)));

	if (cnum == 0)
		limit = (iommu->page_table +
			 iommu->lowest_consistent_map);
	else
		limit = (iopte +
			 (1 << (iommu->page_table_sz_bits - PBM_LOGCLUSTERS)));

	iopte += ((ent = iommu->alloc_info[cnum].next) << cnum);
	flush_point = iommu->alloc_info[cnum].flush;
	
	first = iopte;
	for (;;) {
		if (iopte_val(*iopte) == 0UL) {
			if ((iopte + (1 << cnum)) >= limit)
				ent = 0;
			else
				ent = ent + 1;
			iommu->alloc_info[cnum].next = ent;
			if (ent == flush_point)
				__iommu_flushall(iommu);
			break;
		}
		iopte += (1 << cnum);
		ent++;
		if (iopte >= limit) {
			iopte = (iommu->page_table +
				 (cnum <<
				  (iommu->page_table_sz_bits - PBM_LOGCLUSTERS)));
			ent = 0;
		}
		if (ent == flush_point)
			__iommu_flushall(iommu);
		if (iopte == first)
			goto bad;
	}

	/* I've got your streaming cluster right here buddy boy... */
	return iopte;

bad:
	printk(KERN_EMERG "pci_iommu: alloc_streaming_cluster of npages(%ld) failed!\n",
	       npages);
	return NULL;
}

static void free_streaming_cluster(struct pci_iommu *iommu, dma_addr_t base,
				   unsigned long npages, unsigned long ctx)
{
	unsigned long cnum, ent;

	cnum = 0;
	while ((1UL << cnum) < npages)
		cnum++;

	ent = (base << (32 - IO_PAGE_SHIFT + PBM_LOGCLUSTERS - iommu->page_table_sz_bits))
		>> (32 + PBM_LOGCLUSTERS + cnum - iommu->page_table_sz_bits);

	/* If the global flush might not have caught this entry,
	 * adjust the flush point such that we will flush before
	 * ever trying to reuse it.
	 */
#define between(X,Y,Z)	(((Z) - (Y)) >= ((X) - (Y)))
	if (between(ent, iommu->alloc_info[cnum].next, iommu->alloc_info[cnum].flush))
		iommu->alloc_info[cnum].flush = ent;
#undef between
}

/* We allocate consistent mappings from the end of cluster zero. */
static iopte_t *alloc_consistent_cluster(struct pci_iommu *iommu, unsigned long npages)
{
	iopte_t *iopte;

	iopte = iommu->page_table + (1 << (iommu->page_table_sz_bits - PBM_LOGCLUSTERS));
	while (iopte > iommu->page_table) {
		iopte--;
		if (!(iopte_val(*iopte) & IOPTE_VALID)) {
			unsigned long tmp = npages;

			while (--tmp) {
				iopte--;
				if (iopte_val(*iopte) & IOPTE_VALID)
					break;
			}
			if (tmp == 0) {
				u32 entry = (iopte - iommu->page_table);

				if (entry < iommu->lowest_consistent_map)
					iommu->lowest_consistent_map = entry;
				return iopte;
			}
		}
	}
	return NULL;
}

#define IOPTE_CONSISTENT(CTX) \
	(IOPTE_VALID | IOPTE_CACHE | \
	 (((CTX) << 47) & IOPTE_CONTEXT))

#define IOPTE_STREAMING(CTX) \
	(IOPTE_CONSISTENT(CTX) | IOPTE_STBUF)

#define IOPTE_INVALID	0UL

/* Allocate and map kernel buffer of size SIZE using consistent mode
 * DMA for PCI device PDEV.  Return non-NULL cpu-side address if
 * successful and set *DMA_ADDRP to the PCI side dma address.
 */
void *pci_alloc_consistent(struct pci_dev *pdev, size_t size, dma_addr_t *dma_addrp)
{
	struct pcidev_cookie *pcp;
	struct pci_iommu *iommu;
	iopte_t *iopte;
	unsigned long flags, order, first_page, ctx;
	void *ret;
	int npages;

	size = IO_PAGE_ALIGN(size);
	order = get_order(size);
	if (order >= 10)
		return NULL;

	first_page = __get_free_pages(GFP_ATOMIC, order);
	if (first_page == 0UL)
		return NULL;
	memset((char *)first_page, 0, PAGE_SIZE << order);

	pcp = pdev->sysdata;
	iommu = pcp->pbm->iommu;

	spin_lock_irqsave(&iommu->lock, flags);
	iopte = alloc_consistent_cluster(iommu, size >> IO_PAGE_SHIFT);
	if (iopte == NULL) {
		spin_unlock_irqrestore(&iommu->lock, flags);
		free_pages(first_page, order);
		return NULL;
	}

	*dma_addrp = (iommu->page_table_map_base +
		      ((iopte - iommu->page_table) << IO_PAGE_SHIFT));
	ret = (void *) first_page;
	npages = size >> IO_PAGE_SHIFT;
	ctx = 0;
	if (iommu->iommu_ctxflush)
		ctx = iommu->iommu_cur_ctx++;
	first_page = __pa(first_page);
	while (npages--) {
		iopte_val(*iopte) = (IOPTE_CONSISTENT(ctx) |
				     IOPTE_WRITE |
				     (first_page & IOPTE_PAGE));
		iopte++;
		first_page += IO_PAGE_SIZE;
	}

	{
		int i;
		u32 daddr = *dma_addrp;

		npages = size >> IO_PAGE_SHIFT;
		for (i = 0; i < npages; i++) {
			pci_iommu_write(iommu->iommu_flush, daddr);
			daddr += IO_PAGE_SIZE;
		}
	}

	spin_unlock_irqrestore(&iommu->lock, flags);

	return ret;
}

/* Free and unmap a consistent DMA translation. */
void pci_free_consistent(struct pci_dev *pdev, size_t size, void *cpu, dma_addr_t dvma)
{
	struct pcidev_cookie *pcp;
	struct pci_iommu *iommu;
	iopte_t *iopte;
	unsigned long flags, order, npages, i, ctx;

	npages = IO_PAGE_ALIGN(size) >> IO_PAGE_SHIFT;
	pcp = pdev->sysdata;
	iommu = pcp->pbm->iommu;
	iopte = iommu->page_table +
		((dvma - iommu->page_table_map_base) >> IO_PAGE_SHIFT);

	spin_lock_irqsave(&iommu->lock, flags);

	if ((iopte - iommu->page_table) ==
	    iommu->lowest_consistent_map) {
		iopte_t *walk = iopte + npages;
		iopte_t *limit;

		limit = (iommu->page_table +
			 (1 << (iommu->page_table_sz_bits - PBM_LOGCLUSTERS)));
		while (walk < limit) {
			if (iopte_val(*walk) != IOPTE_INVALID)
				break;
			walk++;
		}
		iommu->lowest_consistent_map =
			(walk - iommu->page_table);
	}

	/* Data for consistent mappings cannot enter the streaming
	 * buffers, so we only need to update the TSB.  We flush
	 * the IOMMU here as well to prevent conflicts with the
	 * streaming mapping deferred tlb flush scheme.
	 */

	ctx = 0;
	if (iommu->iommu_ctxflush)
		ctx = (iopte_val(*iopte) & IOPTE_CONTEXT) >> 47UL;

	for (i = 0; i < npages; i++, iopte++)
		iopte_val(*iopte) = IOPTE_INVALID;

	if (iommu->iommu_ctxflush) {
		pci_iommu_write(iommu->iommu_ctxflush, ctx);
	} else {
		for (i = 0; i < npages; i++) {
			u32 daddr = dvma + (i << IO_PAGE_SHIFT);

			pci_iommu_write(iommu->iommu_flush, daddr);
		}
	}

	spin_unlock_irqrestore(&iommu->lock, flags);

	order = get_order(size);
	if (order < 10)
		free_pages((unsigned long)cpu, order);
}

/* Map a single buffer at PTR of SZ bytes for PCI DMA
 * in streaming mode.
 */
dma_addr_t pci_map_single(struct pci_dev *pdev, void *ptr, size_t sz, int direction)
{
	struct pcidev_cookie *pcp;
	struct pci_iommu *iommu;
	struct pci_strbuf *strbuf;
	iopte_t *base;
	unsigned long flags, npages, oaddr;
	unsigned long i, base_paddr, ctx;
	u32 bus_addr, ret;
	unsigned long iopte_protection;

	pcp = pdev->sysdata;
	iommu = pcp->pbm->iommu;
	strbuf = &pcp->pbm->stc;

	if (direction == PCI_DMA_NONE)
		BUG();

	oaddr = (unsigned long)ptr;
	npages = IO_PAGE_ALIGN(oaddr + sz) - (oaddr & IO_PAGE_MASK);
	npages >>= IO_PAGE_SHIFT;

	spin_lock_irqsave(&iommu->lock, flags);

	base = alloc_streaming_cluster(iommu, npages);
	if (base == NULL)
		goto bad;
	bus_addr = (iommu->page_table_map_base +
		    ((base - iommu->page_table) << IO_PAGE_SHIFT));
	ret = bus_addr | (oaddr & ~IO_PAGE_MASK);
	base_paddr = __pa(oaddr & IO_PAGE_MASK);
	ctx = 0;
	if (iommu->iommu_ctxflush)
		ctx = iommu->iommu_cur_ctx++;
	if (strbuf->strbuf_enabled)
		iopte_protection = IOPTE_STREAMING(ctx);
	else
		iopte_protection = IOPTE_CONSISTENT(ctx);
	if (direction != PCI_DMA_TODEVICE)
		iopte_protection |= IOPTE_WRITE;

	for (i = 0; i < npages; i++, base++, base_paddr += IO_PAGE_SIZE)
		iopte_val(*base) = iopte_protection | base_paddr;

	spin_unlock_irqrestore(&iommu->lock, flags);

	return ret;

bad:
	spin_unlock_irqrestore(&iommu->lock, flags);
	BUG();
	return 0;
}

/* Unmap a single streaming mode DMA translation. */
void pci_unmap_single(struct pci_dev *pdev, dma_addr_t bus_addr, size_t sz, int direction)
{
	struct pcidev_cookie *pcp;
	struct pci_iommu *iommu;
	struct pci_strbuf *strbuf;
	iopte_t *base;
	unsigned long flags, npages, i, ctx;

	if (direction == PCI_DMA_NONE)
		BUG();

	pcp = pdev->sysdata;
	iommu = pcp->pbm->iommu;
	strbuf = &pcp->pbm->stc;

	npages = IO_PAGE_ALIGN(bus_addr + sz) - (bus_addr & IO_PAGE_MASK);
	npages >>= IO_PAGE_SHIFT;
	base = iommu->page_table +
		((bus_addr - iommu->page_table_map_base) >> IO_PAGE_SHIFT);
#ifdef DEBUG_PCI_IOMMU
	if (iopte_val(*base) == IOPTE_INVALID)
		printk("pci_unmap_single called on non-mapped region %08x,%08x from %016lx\n",
		       bus_addr, sz, __builtin_return_address(0));
#endif
	bus_addr &= IO_PAGE_MASK;

	spin_lock_irqsave(&iommu->lock, flags);

	/* Record the context, if any. */
	ctx = 0;
	if (iommu->iommu_ctxflush)
		ctx = (iopte_val(*base) & IOPTE_CONTEXT) >> 47UL;

	/* Step 1: Kick data out of streaming buffers if necessary. */
	if (strbuf->strbuf_enabled) {
		u32 vaddr = bus_addr;

		PCI_STC_FLUSHFLAG_INIT(strbuf);
		if (strbuf->strbuf_ctxflush &&
		    iommu->iommu_ctxflush) {
			unsigned long matchreg, flushreg;

			flushreg = strbuf->strbuf_ctxflush;
			matchreg = PCI_STC_CTXMATCH_ADDR(strbuf, ctx);
			do {
				pci_iommu_write(flushreg, ctx);
			} while(((long)pci_iommu_read(matchreg)) < 0L);
		} else {
			for (i = 0; i < npages; i++, vaddr += IO_PAGE_SIZE)
				pci_iommu_write(strbuf->strbuf_pflush, vaddr);
		}

		pci_iommu_write(strbuf->strbuf_fsync, strbuf->strbuf_flushflag_pa);
		(void) pci_iommu_read(iommu->write_complete_reg);
		while (!PCI_STC_FLUSHFLAG_SET(strbuf))
			membar("#LoadLoad");
	}

	/* Step 2: Clear out first TSB entry. */
	iopte_val(*base) = IOPTE_INVALID;

	free_streaming_cluster(iommu, bus_addr - iommu->page_table_map_base,
			       npages, ctx);

	spin_unlock_irqrestore(&iommu->lock, flags);
}

#define SG_ENT_PHYS_ADDRESS(SG)	\
	((SG)->address ? \
	 __pa((SG)->address) : \
	 (__pa(page_address((SG)->page)) + (SG)->offset))

static inline void fill_sg(iopte_t *iopte, struct scatterlist *sg,
			   int nused, int nelems, unsigned long iopte_protection)
{
	struct scatterlist *dma_sg = sg;
	struct scatterlist *sg_end = sg + nelems;
	int i;

	for (i = 0; i < nused; i++) {
		unsigned long pteval = ~0UL;
		u32 dma_npages;

		dma_npages = ((dma_sg->dma_address & (IO_PAGE_SIZE - 1UL)) +
			      dma_sg->dma_length +
			      ((IO_PAGE_SIZE - 1UL))) >> IO_PAGE_SHIFT;
		do {
			unsigned long offset;
			signed int len;

			/* If we are here, we know we have at least one
			 * more page to map.  So walk forward until we
			 * hit a page crossing, and begin creating new
			 * mappings from that spot.
			 */
			for (;;) {
				unsigned long tmp;

				tmp = SG_ENT_PHYS_ADDRESS(sg);
				len = sg->length;
				if (((tmp ^ pteval) >> IO_PAGE_SHIFT) != 0UL) {
					pteval = tmp & IO_PAGE_MASK;
					offset = tmp & (IO_PAGE_SIZE - 1UL);
					break;
				}
				if (((tmp ^ (tmp + len - 1UL)) >> IO_PAGE_SHIFT) != 0UL) {
					pteval = (tmp + IO_PAGE_SIZE) & IO_PAGE_MASK;
					offset = 0UL;
					len -= (IO_PAGE_SIZE - (tmp & (IO_PAGE_SIZE - 1UL)));
					break;
				}
				sg++;
			}

			pteval = iopte_protection | (pteval & IOPTE_PAGE);
			while (len > 0) {
				*iopte++ = __iopte(pteval);
				pteval += IO_PAGE_SIZE;
				len -= (IO_PAGE_SIZE - offset);
				offset = 0;
				dma_npages--;
			}

			pteval = (pteval & IOPTE_PAGE) + len;
			sg++;

			/* Skip over any tail mappings we've fully mapped,
			 * adjusting pteval along the way.  Stop when we
			 * detect a page crossing event.
			 */
			while (sg < sg_end &&
			       (pteval << (64 - IO_PAGE_SHIFT)) != 0UL &&
			       (pteval == SG_ENT_PHYS_ADDRESS(sg)) &&
			       ((pteval ^
				 (SG_ENT_PHYS_ADDRESS(sg) + sg->length - 1UL)) >> IO_PAGE_SHIFT) == 0UL) {
				pteval += sg->length;
				sg++;
			}
			if ((pteval << (64 - IO_PAGE_SHIFT)) == 0UL)
				pteval = ~0UL;
		} while (dma_npages != 0);
		dma_sg++;
	}
}

/* Map a set of buffers described by SGLIST with NELEMS array
 * elements in streaming mode for PCI DMA.
 * When making changes here, inspect the assembly output. I was having
 * hard time to kepp this routine out of using stack slots for holding variables.
 */
int pci_map_sg(struct pci_dev *pdev, struct scatterlist *sglist, int nelems, int direction)
{
	struct pcidev_cookie *pcp;
	struct pci_iommu *iommu;
	struct pci_strbuf *strbuf;
	unsigned long flags, ctx, npages, iopte_protection;
	iopte_t *base;
	u32 dma_base;
	struct scatterlist *sgtmp;
	int used;

	/* Fast path single entry scatterlists. */
	if (nelems == 1) {
		sglist->dma_address =
			pci_map_single(pdev,
				       (sglist->address ?
					sglist->address :
					(page_address(sglist->page) + sglist->offset)),
				       sglist->length, direction);
		sglist->dma_length = sglist->length;
		return 1;
	}

	pcp = pdev->sysdata;
	iommu = pcp->pbm->iommu;
	strbuf = &pcp->pbm->stc;
	
	if (direction == PCI_DMA_NONE)
		BUG();

	/* Step 1: Prepare scatter list. */

	npages = prepare_sg(sglist, nelems);

	/* Step 2: Allocate a cluster. */

	spin_lock_irqsave(&iommu->lock, flags);

	base = alloc_streaming_cluster(iommu, npages);
	if (base == NULL)
		goto bad;
	dma_base = iommu->page_table_map_base + ((base - iommu->page_table) << IO_PAGE_SHIFT);

	/* Step 3: Normalize DMA addresses. */
	used = nelems;

	sgtmp = sglist;
	while (used && sgtmp->dma_length) {
		sgtmp->dma_address += dma_base;
		sgtmp++;
		used--;
	}
	used = nelems - used;

	/* Step 4: Choose a context if necessary. */
	ctx = 0;
	if (iommu->iommu_ctxflush)
		ctx = iommu->iommu_cur_ctx++;

	/* Step 5: Create the mappings. */
	if (strbuf->strbuf_enabled)
		iopte_protection = IOPTE_STREAMING(ctx);
	else
		iopte_protection = IOPTE_CONSISTENT(ctx);
	if (direction != PCI_DMA_TODEVICE)
		iopte_protection |= IOPTE_WRITE;
	fill_sg (base, sglist, used, nelems, iopte_protection);
#ifdef VERIFY_SG
	verify_sglist(sglist, nelems, base, npages);
#endif

	spin_unlock_irqrestore(&iommu->lock, flags);

	return used;

bad:
	spin_unlock_irqrestore(&iommu->lock, flags);
	BUG();
	return 0;
}

/* Unmap a set of streaming mode DMA translations. */
void pci_unmap_sg(struct pci_dev *pdev, struct scatterlist *sglist, int nelems, int direction)
{
	struct pcidev_cookie *pcp;
	struct pci_iommu *iommu;
	struct pci_strbuf *strbuf;
	iopte_t *base;
	unsigned long flags, ctx, i, npages;
	u32 bus_addr;

	if (direction == PCI_DMA_NONE)
		BUG();

	pcp = pdev->sysdata;
	iommu = pcp->pbm->iommu;
	strbuf = &pcp->pbm->stc;
	
	bus_addr = sglist->dma_address & IO_PAGE_MASK;

	for (i = 1; i < nelems; i++)
		if (sglist[i].dma_length == 0)
			break;
	i--;
	npages = (IO_PAGE_ALIGN(sglist[i].dma_address + sglist[i].dma_length) - bus_addr) >> IO_PAGE_SHIFT;

	base = iommu->page_table +
		((bus_addr - iommu->page_table_map_base) >> IO_PAGE_SHIFT);

#ifdef DEBUG_PCI_IOMMU
	if (iopte_val(*base) == IOPTE_INVALID)
		printk("pci_unmap_sg called on non-mapped region %016lx,%d from %016lx\n", sglist->dma_address, nelems, __builtin_return_address(0));
#endif

	spin_lock_irqsave(&iommu->lock, flags);

	/* Record the context, if any. */
	ctx = 0;
	if (iommu->iommu_ctxflush)
		ctx = (iopte_val(*base) & IOPTE_CONTEXT) >> 47UL;

	/* Step 1: Kick data out of streaming buffers if necessary. */
	if (strbuf->strbuf_enabled) {
		u32 vaddr = (u32) bus_addr;

		PCI_STC_FLUSHFLAG_INIT(strbuf);
		if (strbuf->strbuf_ctxflush &&
		    iommu->iommu_ctxflush) {
			unsigned long matchreg, flushreg;

			flushreg = strbuf->strbuf_ctxflush;
			matchreg = PCI_STC_CTXMATCH_ADDR(strbuf, ctx);
			do {
				pci_iommu_write(flushreg, ctx);
			} while(((long)pci_iommu_read(matchreg)) < 0L);
		} else {
			for (i = 0; i < npages; i++, vaddr += IO_PAGE_SIZE)
				pci_iommu_write(strbuf->strbuf_pflush, vaddr);
		}

		pci_iommu_write(strbuf->strbuf_fsync, strbuf->strbuf_flushflag_pa);
		(void) pci_iommu_read(iommu->write_complete_reg);
		while (!PCI_STC_FLUSHFLAG_SET(strbuf))
			membar("#LoadLoad");
	}

	/* Step 2: Clear out first TSB entry. */
	iopte_val(*base) = IOPTE_INVALID;

	free_streaming_cluster(iommu, bus_addr - iommu->page_table_map_base,
			       npages, ctx);

	spin_unlock_irqrestore(&iommu->lock, flags);
}

/* Make physical memory consistent for a single
 * streaming mode DMA translation after a transfer.
 */
void pci_dma_sync_single(struct pci_dev *pdev, dma_addr_t bus_addr, size_t sz, int direction)
{
	struct pcidev_cookie *pcp;
	struct pci_iommu *iommu;
	struct pci_strbuf *strbuf;
	unsigned long flags, ctx, npages;

	pcp = pdev->sysdata;
	iommu = pcp->pbm->iommu;
	strbuf = &pcp->pbm->stc;

	if (!strbuf->strbuf_enabled)
		return;

	spin_lock_irqsave(&iommu->lock, flags);

	npages = IO_PAGE_ALIGN(bus_addr + sz) - (bus_addr & IO_PAGE_MASK);
	npages >>= IO_PAGE_SHIFT;
	bus_addr &= IO_PAGE_MASK;

	/* Step 1: Record the context, if any. */
	ctx = 0;
	if (iommu->iommu_ctxflush &&
	    strbuf->strbuf_ctxflush) {
		iopte_t *iopte;

		iopte = iommu->page_table +
			((bus_addr - iommu->page_table_map_base)>>IO_PAGE_SHIFT);
		ctx = (iopte_val(*iopte) & IOPTE_CONTEXT) >> 47UL;
	}

	/* Step 2: Kick data out of streaming buffers. */
	PCI_STC_FLUSHFLAG_INIT(strbuf);
	if (iommu->iommu_ctxflush &&
	    strbuf->strbuf_ctxflush) {
		unsigned long matchreg, flushreg;

		flushreg = strbuf->strbuf_ctxflush;
		matchreg = PCI_STC_CTXMATCH_ADDR(strbuf, ctx);
		do {
			pci_iommu_write(flushreg, ctx);
		} while(((long)pci_iommu_read(matchreg)) < 0L);
	} else {
		unsigned long i;

		for (i = 0; i < npages; i++, bus_addr += IO_PAGE_SIZE)
			pci_iommu_write(strbuf->strbuf_pflush, bus_addr);
	}

	/* Step 3: Perform flush synchronization sequence. */
	pci_iommu_write(strbuf->strbuf_fsync, strbuf->strbuf_flushflag_pa);
	(void) pci_iommu_read(iommu->write_complete_reg);
	while (!PCI_STC_FLUSHFLAG_SET(strbuf))
		membar("#LoadLoad");

	spin_unlock_irqrestore(&iommu->lock, flags);
}

/* Make physical memory consistent for a set of streaming
 * mode DMA translations after a transfer.
 */
void pci_dma_sync_sg(struct pci_dev *pdev, struct scatterlist *sglist, int nelems, int direction)
{
	struct pcidev_cookie *pcp;
	struct pci_iommu *iommu;
	struct pci_strbuf *strbuf;
	unsigned long flags, ctx;

	pcp = pdev->sysdata;
	iommu = pcp->pbm->iommu;
	strbuf = &pcp->pbm->stc;

	if (!strbuf->strbuf_enabled)
		return;

	spin_lock_irqsave(&iommu->lock, flags);

	/* Step 1: Record the context, if any. */
	ctx = 0;
	if (iommu->iommu_ctxflush &&
	    strbuf->strbuf_ctxflush) {
		iopte_t *iopte;

		iopte = iommu->page_table +
			((sglist[0].dma_address - iommu->page_table_map_base) >> IO_PAGE_SHIFT);
		ctx = (iopte_val(*iopte) & IOPTE_CONTEXT) >> 47UL;
	}

	/* Step 2: Kick data out of streaming buffers. */
	PCI_STC_FLUSHFLAG_INIT(strbuf);
	if (iommu->iommu_ctxflush &&
	    strbuf->strbuf_ctxflush) {
		unsigned long matchreg, flushreg;

		flushreg = strbuf->strbuf_ctxflush;
		matchreg = PCI_STC_CTXMATCH_ADDR(strbuf, ctx);
		do {
			pci_iommu_write(flushreg, ctx);
		} while (((long)pci_iommu_read(matchreg)) < 0L);
	} else {
		unsigned long i, npages;
		u32 bus_addr;

		bus_addr = sglist[0].dma_address & IO_PAGE_MASK;

		for(i = 1; i < nelems; i++)
			if (!sglist[i].dma_length)
				break;
		i--;
		npages = (IO_PAGE_ALIGN(sglist[i].dma_address + sglist[i].dma_length) - bus_addr) >> IO_PAGE_SHIFT;
		for (i = 0; i < npages; i++, bus_addr += IO_PAGE_SIZE)
			pci_iommu_write(strbuf->strbuf_pflush, bus_addr);
	}

	/* Step 3: Perform flush synchronization sequence. */
	pci_iommu_write(strbuf->strbuf_fsync, strbuf->strbuf_flushflag_pa);
	(void) pci_iommu_read(iommu->write_complete_reg);
	while (!PCI_STC_FLUSHFLAG_SET(strbuf))
		membar("#LoadLoad");

	spin_unlock_irqrestore(&iommu->lock, flags);
}

int pci_dma_supported(struct pci_dev *pdev, u64 device_mask)
{
	struct pcidev_cookie *pcp = pdev->sysdata;
	u64 dma_addr_mask;

	if (pdev == NULL) {
		dma_addr_mask = 0xffffffff;
	} else {
		struct pci_iommu *iommu = pcp->pbm->iommu;

		dma_addr_mask = iommu->dma_addr_mask;
	}

	return (device_mask & dma_addr_mask) == dma_addr_mask;
}
ty/check.h) \
   $(wildcard /home/me/kernel/linux/include/config/scsi/ncr53c8xx/symbios/compat.h)
	@touch sym53c8xx_defs.h
t128.o: t128.c \
   /home/me/kernel/linux/include/asm/system.h \
   /home/me/kernel/linux/include/linux/signal.h \
   /home/me/kernel/linux/include/linux/sched.h \
   /home/me/kernel/linux/include/asm/io.h \
   /home/me/kernel/linux/include/linux/blk.h \
   scsi.h \
   hosts.h \
   t128.h \
   NCR5380.h \
   constants.h \
   sd.h \
   /home/me/kernel/linux/include/linux/stat.h \
   /home/me/kernel/linux/include/linux/init.h \
   /home/me/kernel/linux/include/linux/module.h \
   NCR5380.c \
   scsi_module.c
tmscsim.o: tmscsim.c \
   /home/me/kernel/linux/include/linux/module.h \
   /home/me/kernel/linux/include/asm/dma.h \
   /home/me/kernel/linux/include/asm/io.h \
   /home/me/kernel/linux/include/asm/system.h \
   /home/me/kernel/linux/include/linux/delay.h \
   /home/me/kernel/linux/include/linux/signal.h \
   /home/me/kernel/linux/include/linux/sched.h \
   /home/me/kernel/linux/include/linux/errno.h \
   /home/me/kernel/linux/include/linux/kernel.h \
   /home/me/kernel/linux/include/linux/ioport.h \
   /home/me/kernel/linux/include/linux/pci.h \
   /home/me/kernel/linux/include/linux/proc_fs.h \
   /home/me/kernel/linux/include/linux/string.h \
   /home/me/kernel/linux/include/linux/ctype.h \
   /home/me/kernel/linux/include/linux/mm.h \
   /home/me/kernel/linux/include/linux/version.h \
   /home/me/kernel/linux/include/linux/blk.h \
   /home/me/kernel/linux/include/linux/timer.h \
   scsi.h \
   hosts.h \
   constants.h \
   sd.h \
   /home/me/kernel/linux/include/linux/stat.h \
   /home/me/kernel/linux/include/scsi/scsicam.h \
   dc390.h \
   /home/me/kernel/linux/include/linux/init.h \
   /home/me/kernel/linux/include/linux/spinlock.h \
   /home/me/kernel/linux/include/asm/spinlock.h \
   $(wildcard /home/me/kernel/linux/include/config/smp.h) \
   tmscsim.h \
   $(wildcard /home/me/kernel/linux/include/config/scsi/dc390t/nogensupp.h) \
   $(wildcard /home/me/kernel/linux/include/config/scsi/multi/lun.h) \
   $(wildcard /home/me/kernel/linux/include/config/scsi/dc390t/tradmap.h) \
   /home/me/kernel/linux/include/asm/unaligned.h \
   scsiiom.c \
   scsi_module.c
tmscsim.h: \
   /home/me/kernel/linux/include/linux/types.h \
   $(wildcard /home/me/kernel/linux/include/config/smp.h)
	@touch tmscsim.h
u14-34f.o: u14-34f.c \
   /home/me/kernel/linux/include/linux/version.h \
   /home/me/kernel/linux/include/linux/module.h \
   /home/me/kernel/linux/include/linux/string.h \
   /home/me/kernel/linux/include/linux/sched.h \
   /home/me/kernel/linux/include/linux/kernel.h \
   /home/me/kernel/linux/include/linux/ioport.h \
   /home/me/kernel/linux/include/linux/delay.h \
   /home/me/kernel/linux/include/asm/io.h \
   /home/me/kernel/linux/include/asm/system.h \
   /home/me/kernel/linux/include/asm/byteorder.h \
   /home/me/kernel/linux/include/linux/proc_fs.h \
   /home/me/kernel/linux/include/linux/blk.h \
   scsi.h \
   hosts.h \
   sd.h \
   /home/me/kernel/linux/include/asm/dma.h \
   /home/me/kernel/linux/include/asm/irq.h \
   u14-34f.h \
   /home/me/kernel/linux/include/linux/stat.h \
   /home/me/kernel/linux/include/linux/pci.h \
   /home/me/kernel/linux/include/linux/init.h \
   /home/me/kernel/linux/include/linux/ctype.h \
   /home/me/kernel/linux/include/linux/spinlock.h \
   $(wildcard /home/me/kernel/linux/include/config/scsi/u14/34f/linked/commands.h) \
   $(wildcard /home/me/kernel/linux/include/config/scsi/u14/34f/max/tags.h) \
   scsi_module.c
u14-34f.h: \
   /home/me/kernel/linux/include/scsi/scsicam.h
	@touch u14-34f.h
ultrastor.o: ultrastor.c \
   /home/me/kernel/linux/include/linux/module.h \
   /home/me/kernel/linux/include/linux/stddef.h \
   /home/me/kernel/linux/include/linux/string.h \
   /home/me/kernel/linux/include/linux/sched.h \
   /home/me/kernel/linux/include/linux/kernel.h \
   /home/me/kernel/linux/include/linux/ioport.h \
   /home/me/kernel/linux/include/linux/proc_fs.h \
   /home/me/kernel/linux/include/linux/spinlock.h \
   /home/me/kernel/linux/include/asm/io.h \
   /home/me/kernel/linux/include/asm/bitops.h \
   /home/me/kernel/linux/include/asm/system.h \
   /home/me/kernel/linux/include/asm/dma.h \
   /home/me/kernel/linux/include/linux/blk.h \
   scsi.h \
   hosts.h \
   ultrastor.h \
   sd.h \
   /home/me/kernel/linux/include/linux/stat.h \
   scsi_module.c
ultrastor.h: \
   /home/me/kernel/linux/include/linux/kdev_t.h
	@touch ultrastor.h
wd33c93.o: wd33c93.c \
   /home/me/kernel/linux/include/linux/module.h \
   /home/me/kernel/linux/include/asm/system.h \
   /home/me/kernel/linux/include/linux/sched.h \
   /home/me/kernel/linux/include/linux/string.h \
   /home/me/kernel/linux/include/linux/delay.h \
   /home/me/kernel/linux/include/linux/version.h \
   /home/me/kernel/linux/include/linux/init.h \
   /home/me/kernel/linux/include/asm/irq.h \
   /home/me/kernel/linux/include/linux/blk.h \
   scsi.h \
   hosts.h \
   wd33c93.h \
   $(wildcard /home/me/kernel/linux/include/config/sgi/ip22.h) \
   $(wildcard /home/me/kernel/linux/include/config/mvme147/scsi.h)
wd7000.o: wd7000.c \
   /home/me/kernel/linux/include/linux/module.h \
   /home/me/kernel/linux/include/linux/kernel.h \
   /home/me/kernel/linux/include/linux/types.h \
   /home/me/kernel/linux/include/linux/string.h \
   /home/me/kernel/linux/include/linux/sched.h \
   /home/me/kernel/linux/include/linux/slab.h \
   /home/me/kernel/linux/include/linux/spinlock.h \
   /home/me/kernel/linux/include/asm/system.h \
   /home/me/kernel/linux/include/asm/dma.h \
   /home/me/kernel/linux/include/asm/io.h \
   /home/me/kernel/linux/include/linux/ioport.h \
   /home/me/kernel/linux/include/linux/proc_fs.h \
   /home/me/kernel/linux/include/linux/blk.h \
   /home/me/kernel/linux/include/linux/version.h \
   /home/me/kernel/linux/include/linux/init.h \
   scsi.h \
   hosts.h \
   sd.h \
   /home/me/kernel/linux/include/scsi/scsicam.h \
   wd7000.h \
   /home/me/kernel/linux/include/linux/stat.h \
   scsi_module.c
wd7000.h: \
   /home/me/kernel/linux/include/linux/types.h \
   /home/me/kernel/linux/include/linux/kdev_t.h
	@touch wd7000.h
.PRECIOUS:	3w-xxxx.h \
	53c7,8xx.h \
	53c700.h \
	AM53C974.h \
	BusLogic.h \
	NCR53C9x.h \
	a2091.h \
	a3000.h \
	advansys.h \
	aha152x.h \
	aha1542.h \
	aha1740.h \
	amiga7xx.h \
	atp870u.h \
	blz1230.h \
	blz2060.h \
	bvme6000.h \
	cpqfcTS.h \
	cpqfcTSstructs.h \
	cyberstorm.h \
	cyberstormII.h \
	dc390.h \
	dec_esp.h \
	dpti.h \
	eata.h \
	eata_dma.h \
	eata_pio.h \
	esp.h \
	fastlane.h \
	fcal.h \
	g_NCR5380.h \
	gdth.h \
	gvp11.h \
	hosts.h \
	i60uscsi.h \
	i91uscsi.h \
	imm.h \
	in2000.h \
	ini9100u.h \
	inia100.h \
	ips.h \
	jazz_esp.h \
	mac_esp.h \
	mac_scsi.h \
	mca_53c9x.h \
	megaraid.h \
	mvme147.h \
	mvme16x.h \
	ncr53c8xx.h \
	oktagon_esp.h \
	osst.h \
	pci2000.h \
	pci2220i.h \
	pluto.h \
	ppa.h \
	psi240i.h \
	qla1280.h \
	scsi.h \
	scsi_debug.h \
	sd.h \
	sim710.h \
	sr.h \
	st.h \
	sun3_scsi.h \
	sym53c416.h \
	sym53c8xx.h \
	sym53c8xx_comm.h \
	sym53c8xx_defs.h \
	tmscsim.h \
	u14-34f.h \
	ultrastor.h \
	wd7000.h \

#define __ver_fas216_info	smp_c90d1256
#define fas216_info	_set_ver(fas216_info)
#define __ver_fas216_init	smp_a96ea862
#define fas216_init	_set_ver(fas216_init)
#define __ver_fas216_queue_command	smp_8e203fb9
#define fas216_queue_command	_set_ver(fas216_queue_command)
#define __ver_fas216_command	smp_eb0648f1
#define fas216_command	_set_ver(fas216_command)
#define __ver_fas216_intr	smp_76b678a5
#define fas216_intr	_set_ver(fas216_intr)
#define __ver_fas216_release	smp_8f72773e
#define fas216_release	_set_ver(fas216_release)
#define __ver_fas216_eh_abort	smp_0064675f
#define fas216_eh_abort	_set_ver(fas216_eh_abort)
#define __ver_fas216_eh_device_reset	smp_1d023234
#define fas216_eh_device_reset	_set_ver(fas216_eh_device_reset)
#define __ver_fas216_eh_bus_reset	smp_23aab44e
#define fas216_eh_bus_reset	_set_ver(fas216_eh_bus_reset)
#define __ver_fas216_eh_host_reset	smp_0cfd2f44
#define fas216_eh_host_reset	_set_ver(fas216_eh_host_reset)
#define __ver_fas216_print_host	smp_f9aa6c80
#define fas216_print_host	_set_ver(fas216_print_host)
#define __ver_fas216_print_stats	smp_f7d0ec32
#define fas216_print_stats	_set_ver(fas216_print_stats)
#define __ver_fas216_print_device	smp_e5ac7738
#define fas216_print_device	_set_ver(fas216_print_device)
#define __ver_queue_initialise	smp_efa10bb9
#define queue_initialise	_set_ver(queue_initialise)
#define __ver_queue_free	smp_7c8c084d
#define queue_free	_set_ver(queue_free)
#define __ver___queue_add	smp_f7e35046
#define __queue_add	_set_ver(__queue_add)
#define __ver_queue_remove	smp_9f793365
#define queue_remove	_set_ver(queue_remove)
#define __ver_queue_remove_exclude	smp_5aa7aaa7
#define queue_remove_exclude	_set_ver(queue_remove_exclude)
#define __ver_queue_remove_tgtluntag	smp_2c20fdbf
#define queue_remove_tgtluntag	_set_ver(queue_remove_tgtluntag)
#define __ver_queue_remove_cmd	smp_fba3f820
#define queue_remove_cmd	_set_ver(queue_remove_cmd)
#define __ver_queue_probetgtlun	smp_a74439a9
#define queue_probetgtlun	_set_ver(queue_probetgtlun)
#define __ver_msgqueue_initialise	smp_d9277bdf
#define msgqueue_initialise	_set_ver(msgqueue_initialise)
#define __ver_msgqueue_free	smp_a7d40332
#define msgqueue_free	_set_ver(msgqueue_free)
#define __ver_msgqueue_msglength	smp_00181e25
#define msgqueue_msglength	_set_ver(msgqueue_msglength)
#define __ver_msgqueue_getmsg	smp_c5798426
#define msgqueue_getmsg	_set_ver(msgqueue_getmsg)
#define __ver_msgqueue_addmsg	smp_01d6f7dd
#define msgqueue_addmsg	_set_ver(msgqueue_addmsg)
#define __ver_msgqueue_flush	smp_bb286fef
#define msgqueue_flush	_set_ver(msgqueue_flush)
acornscsi-io.o: acornscsi-io.S \
   /home/me/kernel/linux/include/linux/linkage.h
acornscsi.o: acornscsi.c \
   /home/me/kernel/linux/include/linux/module.h \
   /home/me/kernel/linux/include/linux/kernel.h \
   /home/me/kernel/linux/include/linux/sched.h \
   /home/me/kernel/linux/include/linux/string.h \
   /home/me/kernel/linux/include/linux/signal.h \
   /home/me/kernel/linux/include/linux/errno.h \
   /home/me/kernel/linux/include/linux/proc_fs.h \
   /home/me/kernel/linux/include/linux/stat.h \
   /home/me/kernel/linux/include/linux/ioport.h \
   /home/me/kernel/linux/include/linux/blk.h \
   /home/me/kernel/linux/include/linux/delay.h \
   /home/me/kernel/linux/include/linux/init.h \
   /home/me/kernel/linux/include/asm/bitops.h \
   /home/me/kernel/linux/include/asm/system.h \
   /home/me/kernel/linux/include/asm/io.h \
   /home/me/kernel/linux/include/asm/irq.h \
   ../../scsi/scsi.h \
   ../../scsi/hosts.h \
   ../../scsi/constants.h \
   acornscsi.h \
   msgqueue.h \
   /home/me/kernel/linux/include/scsi/scsicam.h \
   $(wildcard /home/me/kernel/linux/include/config/scsi/acornscsi/link.h) \
   $(wildcard /home/me/kernel/linux/include/config/acornscsi/constants.h) \
   $(wildcard /home/me/kernel/linux/include/config/scsi/acornscsi/tagged/queue.h) \
   $(wildcard /home/me/kernel/linux/include/config/scsi/acornscsi/sync.h)
acornscsi.h: \
   queue.h \
   msgqueue.h
	@touch acornscsi.h
arxescsi.o: arxescsi.c \
   /home/me/kernel/linux/include/linux/module.h \
   /home/me/kernel/linux/include/linux/blk.h \
   /home/me/kernel/linux/include/linux/kernel.h \
   /home/me/kernel/linux/include/linux/string.h \
   /home/me/kernel/linux/include/linux/ioport.h \
   /home/me/kernel/linux/include/linux/sched.h \
   /home/me/kernel/linux/include/linux/proc_fs.h \
   /home/me/kernel/linux/include/linux/unistd.h \
   /home/me/kernel/linux/include/linux/stat.h \
   /home/me/kernel/linux/include/linux/delay.h \
   /home/me/kernel/linux/include/linux/init.h \
   /home/me/kernel/linux/include/asm/dma.h \
   /home/me/kernel/linux/include/asm/io.h \
   /home/me/kernel/linux/include/asm/irq.h \
   ../../scsi/sd.h \
   ../../scsi/hosts.h \
   arxescsi.h \
   fas216.h
arxescsi.h: \
   /home/me/kernel/linux/include/scsi/scsicam.h \
   fas216.h
	@touch arxescsi.h
cumana_1.o: cumana_1.c \
   /home/me/kernel/linux/include/linux/module.h \
   /home/me/kernel/linux/include/linux/signal.h \
   /home/me/kernel/linux/include/linux/sched.h \
   /home/me/kernel/linux/include/linux/ioport.h \
   /home/me/kernel/linux/include/linux/blk.h \
   /home/me/kernel/linux/include/linux/init.h \
   /home/me/kernel/linux/include/asm/io.h \
   /home/me/kernel/linux/include/asm/irq.h \
   /home/me/kernel/linux/include/asm/system.h \
   ../../scsi/scsi.h \
   ../../scsi/hosts.h \
   ../../scsi/constants.h \
   /home/me/kernel/linux/include/scsi/scsicam.h \
   ../../scsi/NCR5380.h \
   ../../scsi/NCR5380.c
cumana_2.o: cumana_2.c \
   /home/me/kernel/linux/include/linux/module.h \
   /home/me/kernel/linux/include/linux/blk.h \
   /home/me/kernel/linux/include/linux/kernel.h \
   /home/me/kernel/linux/include/linux/string.h \
   /home/me/kernel/linux/include/linux/ioport.h \
   /home/me/kernel/linux/include/linux/sched.h \
   /home/me/kernel/linux/include/linux/proc_fs.h \
   /home/me/kernel/linux/include/linux/unistd.h \
   /home/me/kernel/linux/include/linux/stat.h \
   /home/me/kernel/linux/include/linux/delay.h \
   /home/me/kernel/linux/include/linux/pci.h \
   /home/me/kernel/linux/include/linux/init.h \
   /home/me/kernel/linux/include/asm/dma.h \
   /home/me/kernel/linux/include/asm/io.h \
   /home/me/kernel/linux/include/asm/irq.h \
   /home/me/kernel/linux/include/asm/pgtable.h \
   ../../scsi/sd.h \
   ../../scsi/hosts.h \
   fas216.h \
   /home/me/kernel/linux/include/scsi/scsicam.h
ecoscsi.o: ecoscsi.c \
   /home/me/kernel/linux/include/linux/module.h \
   /home/me/kernel/linux/include/linux/signal.h \
   /home/me/kernel/linux/include/linux/sched.h \
   /home/me/kernel/linux/include/linux/ioport.h \
   /home/me/kernel/linux/include/linux/init.h \
   /home/me/kernel/linux/include/linux/blk.h \
   /home/me/kernel/linux/include/asm/io.h \
   /home/me/kernel/linux/include/asm/system.h \
   ../../scsi/scsi.h \
   ../../scsi/hosts.h \
   ../../scsi/NCR5380.h \
   ../../scsi/constants.h \
   ../../scsi/NCR5380.c
eesox.o: eesox.c \
   /home/me/kernel/linux/include/linux/module.h \
   /home/me/kernel/linux/include/linux/blk.h \
   /home/me/kernel/linux/include/linux/kernel.h \
   /home/me/kernel/linux/include/linux/string.h \
   /home/me/kernel/linux/include/linux/ioport.h \
   /home/me/kernel/linux/include/linux/sched.h \
   /home/me/kernel/linux/include/linux/proc_fs.h \
   /home/me/kernel/linux/include/linux/unistd.h \
   /home/me/kernel/linux/include/linux/stat.h \
   /home/me/kernel/linux/include/linux/delay.h \
   /home/me/kernel/linux/include/linux/pci.h \
   /home/me/kernel/linux/include/linux/init.h \
   /home/me/kernel/linux/include/asm/io.h \
   /home/me/kernel/linux/include/asm/irq.h \
   /home/me/kernel/linux/include/asm/dma.h \
   /home/me/kernel/linux/include/asm/pgtable.h \
   ../../scsi/sd.h \
   ../../scsi/hosts.h \
   fas216.h \
   /home/me/kernel/linux/include/scsi/scsicam.h
fas216.o: fas216.c \
   /home/me/kernel/linux/include/linux/module.h \
   /home/me/kernel/linux/include/linux/blk.h \
   /home/me/kernel/linux/include/linux/kernel.h \
   /home/me/kernel/linux/include/linux/string.h \
   /home/me/kernel/linux/include/linux/ioport.h \
   /home/me/kernel/linux/include/linux/sched.h \
   /home/me/kernel/linux/include/linux/proc_fs.h \
   /home/me/kernel/linux/include/linux/unistd.h \
   /home/me/kernel/linux/include/linux/stat.h \
   /home/me/kernel/linux/include/linux/delay.h \
   /home/me/kernel/linux/include/linux/init.h \
   /home/me/kernel/linux/include/asm/dma.h \
   /home/me/kernel/linux/include/asm/io.h \
   /home/me/kernel/linux/include/asm/irq.h \
   ../../scsi/scsi.h \
   ../../scsi/hosts.h \
   fas216.h
fas216.h: \
   queue.h \
   msgqueue.h
	@touch fas216.h
msgqueue.o: msgqueue.c \
   /home/me/kernel/linux/include/linux/module.h \
   /home/me/kernel/linux/include/linux/kernel.h \
   /home/me/kernel/linux/include/linux/stddef.h \
   /home/me/kernel/linux/include/linux/init.h \
   msgqueue.h
oak.o: oak.c \
   /home/me/kernel/linux/include/linux/module.h \
   /home/me/kernel/linux/include/linux/signal.h \
   /home/me/kernel/linux/include/linux/sched.h \
   /home/me/kernel/linux/include/linux/ioport.h \
   /home/me/kernel/linux/include/linux/blk.h \
   /home/me/kernel/linux/include/linux/init.h \
   /home/me/kernel/linux/include/asm/io.h \
   /home/me/kernel/linux/include/asm/system.h \
   ../../scsi/scsi.h \
   ../../scsi/hosts.h \
   ../../scsi/constants.h \
   ../../scsi/NCR5380.h \
   ../../scsi/NCR5380.c
powertec.o: powertec.c \
   /home/me/kernel/linux/include/linux/module.h \
   /home/me/kernel/linux/include/linux/blk.h \
   /home/me/kernel/linux/include/linux/kernel.h \
   /home/me/kernel/linux/include/linux/string.h \
   /home/me/kernel/linux/include/linux/ioport.h \
   /home/me/kernel/linux/include/linux/sched.h \
   /home/me/kernel/linux/include/linux/proc_fs.h \
   /home/me/kernel/linux/include/linux/unistd.h \
   /home/me/kernel/linux/include/linux/stat.h \
   /home/me/kernel/linux/include/linux/delay.h \
   /home/me/kernel/linux/include/linux/pci.h \
   /home/me/kernel/linux/include/linux/init.h \
   /home/me/kernel/linux/include/asm/dma.h \
   /home/me/kernel/linux/include/asm/io.h \
   /home/me/kernel/linux/include/asm/irq.h \
   /home/me/kernel/linux/include/asm/pgtable.h \
   ../../scsi/sd.h \
   ../../scsi/hosts.h \
   fas216.h \
   /home/me/kernel/linux/include/scsi/scsicam.h
queue.o: queue.c \
   /home/me/kernel/linux/include/linux/module.h \
   /home/me/kernel/linux/include/linux/blk.h \
   /home/me/kernel/linux/include/linux/kernel.h \
   /home/me/kernel/linux/include/linux/string.h \
   /home/me/kernel/linux/include/linux/slab.h \
   /home/me/kernel/linux/include/linux/spinlock.h \
   /home/me/kernel/linux/include/linux/list.h \
   /home/me/kernel/linux/include/linux/init.h \
   ../../scsi/scsi.h \
   queue.h
.PRECIOUS:	acornscsi.h \
	arxescsi.h \
	fas216.h \

FIG_ATM == 1) && ($CONFIG_PCI == 1 || $CONFIG_SBUS == 1) && ($CONFIG_ATM_FORE200E_MAYBE != 0) && ($CONFIG_SBUS == 1) && ($CONFIG_ATM_FORE200E_SBA == 1) && ($CONFIG_ATM_FORE200E_SBA_DEFAULT_FW == 0)} then {write_string $cfg $autocfg CONFIG_ATM_FORE200E_SBA_FW "$CONFIG_ATM_FORE200E_SBA_FW" $notmod }
	global CONFIG_ATM_FORE200E_TX_RETRY
	if {($CONFIG_NET == 1) && ($CONFIG_NETDEVICES == 1) && ($CONFIG_ATM == 1) && ($CONFIG_PCI == 1 || $CONFIG_SBUS == 1) && ($CONFIG_ATM_FORE200E_PCA == 1 || $CONFIG_ATM_FORE200E_SBA == 1)} then {write_int $cfg $autocfg CONFIG_ATM_FORE200E_TX_RETRY $CONFIG_ATM_FORE200E_TX_RETRY $notmod }
	global CONFIG_ATM_FORE200E_DEBUG
	if {($CONFIG_NET == 1) && ($CONFIG_NETDEVICES == 1) && ($CONFIG_ATM == 1) && ($CONFIG_PCI == 1 || $CONFIG_SBUS == 1) && ($CONFIG_ATM_FORE200E_PCA == 1 || $CONFIG_ATM_FORE200E_SBA == 1)} then {write_int $cfg $autocfg CONFIG_ATM_FORE200E_DEBUG $CONFIG_ATM_FORE200E_DEBUG $notmod }
	global CONFIG_ATM_FORE200E
	if {($CONFIG_NET == 1) && ($CONFIG_NETDEVICES == 1) && ($CONFIG_ATM == 1) && ($CONFIG_PCI == 1 || $CONFIG_SBUS == 1) && ($CONFIG_ATM_FORE200E_PCA == 1 || $CONFIG_ATM_FORE200E_SBA == 1) && ($CONFIG_ATM_FORE200E_MAYBE == 1)} then {write_tristate $cfg $autocfg CONFIG_ATM_FORE200E $CONSTANT_Y [list $notmod] 2 }
	if {($CONFIG_NET == 1) && ($CONFIG_NETDEVICES == 1) && ($CONFIG_ATM == 1) && ($CONFIG_PCI == 1 || $CONFIG_SBUS == 1) && ($CONFIG_ATM_FORE200E_PCA == 1 || $CONFIG_ATM_FORE200E_SBA == 1) && ($CONFIG_ATM_FORE200E_MAYBE != 1)} then {write_tristate $cfg $autocfg CONFIG_ATM_FORE200E $CONSTANT_M [list $notmod] 2 }
	write_comment $cfg $autocfg "Amateur Radio support"
	global CONFIG_HAMRADIO
	write_tristate $cfg $autocfg CONFIG_HAMRADIO $CONFIG_HAMRADIO [list $notmod] 2
	if {($CONFIG_HAMRADIO != 0) && ($CONFIG_NET != 0)} then {write_comment $cfg $autocfg "Packet Radio protocols"}
	global CONFIG_AX25
	if {($CONFIG_HAMRADIO != 0) && ($CONFIG_NET != 0)} then {write_tristate $cfg $autocfg CONFIG_AX25 $CONFIG_AX25 [list $notmod] 2 }
	global CONFIG_AX25_DAMA_SLAVE
	if {($CONFIG_HAMRADIO != 0) && ($CONFIG_NET != 0) && ($CONFIG_AX25 != 0)} then {write_tristate $cfg $autocfg CONFIG_AX25_DAMA_SLAVE $CONFIG_AX25_DAMA_SLAVE [list $notmod] 2 }
	global CONFIG_NETROM
	if {($CONFIG_HAMRADIO != 0) && ($CONFIG_NET != 0) && ($CONFIG_AX25 != 0) && ($CONFIG_AX25 == 1 || $CONFIG_AX25 == 2 || $CONFIG_AX25 == 4)} then {write_tristate $cfg $autocfg CONFIG_NETROM $CONFIG_NETROM [list $CONFIG_AX25] 2 }
	global CONFIG_ROSE
	if {($CONFIG_HAMRADIO != 0) && ($CONFIG_NET != 0) && ($CONFIG_AX25 != 0) && ($CONFIG_AX25 == 1 || $CONFIG_AX25 == 2 || $CONFIG_AX25 == 4)} then {write_tristate $cfg $autocfg CONFIG_ROSE $CONFIG_ROSE [list $CONFIG_AX25] 2 }
	if {($CONFIG_HAMRADIO != 0) && ($CONFIG_NET != 0) && ($CONFIG_AX25 != 0)} then {write_comment $cfg $autocfg "AX.25 network device drivers"}
	if {($CONFIG_HAMRADIO != 0) && ($CONFIG_NET != 0) && ($CONFIG_AX25 != 0)} then {write_comment $cfg $autocfg "AX.25 network device drivers"}
	global CONFIG_MKISS
	if {($CONFIG_HAMRADIO != 0) && ($CONFIG_NET != 0) && ($CONFIG_AX25 != 0) && ($CONFIG_AX25 == 1 || $CONFIG_AX25 == 2 || $CONFIG_AX25 == 4)} then {write_tristate $cfg $autocfg CONFIG_MKISS $CONFIG_MKISS [list $CONFIG_AX25] 2 }
	global CONFIG_6PACK
	if {($CONFIG_HAMRADIO != 0) && ($CONFIG_NET != 0) && ($CONFIG_AX25 != 0) && ($CONFIG_AX25 == 1 || $CONFIG_AX25 == 2 || $CONFIG_AX25 == 4)} then {write_tristate $cfg $autocfg CONFIG_6PACK $CONFIG_6PACK [list $CONFIG_AX25] 2 }
	global CONFIG_BPQETHER
	if {($CONFIG_HAMRADIO != 0) && ($CONFIG_NET != 0) && ($CONFIG_AX25 != 0) && ($CONFIG_AX25 == 1 || $CONFIG_AX25 == 2 || $CONFIG_AX25 == 4)} then {write_tristate $cfg $autocfg CONFIG_BPQETHER $CONFIG_BPQETHER [list $CONFIG_AX25] 2 }
	global CONFIG_DMASCC
	if {($CONFIG_HAMRADIO != 0) && ($CONFIG_NET != 0) && ($CONFIG_AX25 != 0) && ($CONFIG_AX25 == 1 || $CONFIG_AX25 == 2 || $CONFIG_AX25 == 4)} then {write_tristate $cfg $autocfg CONFIG_DMASCC $CONFIG_DMASCC [list $CONFIG_AX25] 2 }
	global CONFIG_SCC
	if {($CONFIG_HAMRADIO != 0) && ($CONFIG_NET != 0) && ($CONFIG_AX25 != 0) && ($CONFIG_AX25 == 1 || $CONFIG_AX25 == 2 || $CONFIG_AX25 == 4)} then {write_tristate $cfg $autocfg CONFIG_SCC $CONFIG_SCC [list $CONFIG_AX25] 2 }
	global CONFIG_SCC_DELAY
	if {($CONFIG_HAMRADIO != 0) && ($CONFIG_NET != 0) && ($CONFIG_AX25 != 0) && ($CONFIG_SCC != 0)} then {write_tristate $cfg $autocfg CONFIG_SCC_DELAY $CONFIG_SCC_DELAY [list $notmod] 2 }
	global CONFIG_SCC_TRXECHO
	if {($CONFIG_HAMRADIO != 0) && ($CONFIG_NET != 0) && ($CONFIG_AX25 != 0) && ($CONFIG_SCC != 0)} then {write_tristate $cfg $autocfg CONFIG_SCC_TRXECHO $CONFIG_SCC_TRXECHO [list $notmod] 2 }
	global CONFIG_BAYCOM_SER_FDX
	if {($CONFIG_HAMRADIO != 0) && ($CONFIG_NET != 0) && ($CONFIG_AX25 != 0) && ($CONFIG_AX25 == 1 || $CONFIG_AX25 == 2 || $CONFIG_AX25 == 4)} then {write_tristate $cfg $autocfg CONFIG_BAYCOM_SER_FDX $CONFIG_BAYCOM_SER_FDX [list $CONFIG_AX25] 2 }
	global CONFIG_BAYCOM_SER_HDX
	if {($CONFIG_HAMRADIO != 0) && ($CONFIG_NET != 0) && ($CONFIG_AX25 != 0) && ($CONFIG_AX25 == 1 || $CONFIG_AX25 == 2 || $CONFIG_AX25 == 4)} then {write_tristate $cfg $autocfg CONFIG_BAYCOM_SER_HDX $CONFIG_BAYCOM_SER_HDX [list $CONFIG_AX25] 2 }
	global CONFIG_BAYCOM_PAR
	if {($CONFIG_HAMRADIO != 0) && ($CONFIG_NET != 0) && ($CONFIG_AX25 != 0) && ($CONFIG_PARPORT == 1 || $CONFIG_PARPORT == 2 || $CONFIG_PARPORT == 4) && ($CONFIG_AX25 == 1 || $CONFIG_AX25 == 2 || $CONFIG_AX25 == 4)} then {write_tristate $cfg $autocfg CONFIG_BAYCOM_PAR $CONFIG_BAYCOM_PAR [list $CONFIG_PARPORT $CONFIG_AX25] 2 }
	global CONFIG_BAYCOM_EPP
	if {($CONFIG_HAMRADIO != 0) && ($CONFIG_NET != 0) && ($CONFIG_AX25 != 0) && ($CONFIG_PARPORT == 1 || $CONFIG_PARPORT == 2 || $CONFIG_PARPORT == 4) && ($CONFIG_AX25 == 1 || $CONFIG_AX25 == 2 || $CONFIG_AX25 == 4)} then {write_tristate $cfg $autocfg CONFIG_BAYCOM_EPP $CONFIG_BAYCOM_EPP [list $CONFIG_PARPORT $CONFIG_AX25] 2 }
	global CONFIG_SOUNDMODEM
	if {($CONFIG_HAMRADIO != 0) && ($CONFIG_NET != 0) && ($CONFIG_AX25 != 0) && ($CONFIG_PARPORT == 1 || $CONFIG_PARPORT == 2 || $CONFIG_PARPORT == 4) && ($CONFIG_AX25 == 1 || $CONFIG_AX25 == 2 || $CONFIG_AX25 == 4)} then {write_tristate $cfg $autocfg CONFIG_SOUNDMODEM $CONFIG_SOUNDMODEM [list $CONFIG_PARPORT $CONFIG_AX25] 2 }
	global CONFIG_SOUNDMODEM_SBC
	if {($CONFIG_HAMRADIO != 0) && ($CONFIG_NET != 0) && ($CONFIG_AX25 != 0) && ($CONFIG_SOUNDMODEM != 0)} then {write_tristate $cfg $autocfg CONFIG_SOUNDMODEM_SBC $CONFIG_SOUNDMODEM_SBC [list $notmod] 2 }
	global CONFIG_SOUNDMODEM_WSS
	if {($CONFIG_HAMRADIO != 0) && ($CONFIG_NET != 0) && ($CONFIG_AX25 != 0) && ($CONFIG_SOUNDMODEM != 0)} then {write_tristate $cfg $autocfg CONFIG_SOUNDMODEM_WSS $CONFIG_SOUNDMODEM_WSS [list $notmod] 2 }
	global CONFIG_SOUNDMODEM_AFSK1200
	if {($CONFIG_HAMRADIO != 0) && ($CONFIG_NET != 0) && ($CONFIG_AX25 != 0) && ($CONFIG_SOUNDMODEM != 0)} then {write_tristate $cfg $autocfg CONFIG_SOUNDMODEM_AFSK1200 $CONFIG_SOUNDMODEM_AFSK1200 [list $notmod] 2 }
	global CONFIG_SOUNDMODEM_AFSK2400_7
	if {($CONFIG_HAMRADIO != 0) && ($CONFIG_NET != 0) && ($CONFIG_AX25 != 0) && ($CONFIG_SOUNDMODEM != 0)} then {write_tristate $cfg $autocfg CONFIG_SOUNDMODEM_AFSK2400_7 $CONFIG_SOUNDMODEM_AFSK2400_7 [list $notmod] 2 }
	global CONFIG_SOUNDMODEM_AFSK2400_8
	if {($CONFIG_HAMRADIO != 0) && ($CONFIG_NET != 0) && ($CONFIG_AX25 != 0) && ($CONFIG_SOUNDMODEM != 0)} then {write_tristate $cfg $autocfg CONFIG_SOUNDMODEM_AFSK2400_8 $CONFIG_SOUNDMODEM_AFSK2400_8 [list $notmod] 2 }
	global CONFIG_SOUNDMODEM_AFSK2666
	if {($CONFIG_HAMRADIO != 0) && ($CONFIG_NET != 0) && ($CONFIG_AX25 != 0) && ($CONFIG_SOUNDMODEM != 0)} then {write_tristate $cfg $autocfg CONFIG_SOUNDMODEM_AFSK2666 $CONFIG_SOUNDMODEM_AFSK2666 [list $notmod] 2 }
	global CONFIG_SOUNDMODEM_HAPN4800
	if {($CONFIG_HAMRADIO != 0) && ($CONFIG_NET != 0) && ($CONFIG_AX25 != 0) && ($CONFIG_SOUNDMODEM != 0)} then {write_tristate $cfg $autocfg CONFIG_SOUNDMODEM_HAPN4800 $CONFIG_SOUNDMODEM_HAPN4800 [list $notmod] 2 }
	global CONFIG_SOUNDMODEM_PSK4800
	if {($CONFIG_HAMRADIO != 0) && ($CONFIG_NET != 0) && ($CONFIG_AX25 != 0) && ($CONFIG_SOUNDMODEM != 0)} then {write_tristate $cfg $autocfg CONFIG_SOUNDMODEM_PSK4800 $CONFIG_SOUNDMODEM_PSK4800 [list $notmod] 2 }
	global CONFIG_SOUNDMODEM_FSK9600
	if {($CONFIG_HAMRADIO != 0) && ($CONFIG_NET != 0) && ($CONFIG_AX25 != 0) && ($CONFIG_SOUNDMODEM != 0)} then {write_tristate $cfg $autocfg CONFIG_SOUNDMODEM_FSK9600 $CONFIG_SOUNDMODEM_FSK9600 [list $notmod] 2 }
	global CONFIG_YAM
	if {($CONFIG_HAMRADIO != 0) && ($CONFIG_NET != 0) && ($CONFIG_AX25 != 0) && ($CONFIG_AX25 == 1 || $CONFIG_AX25 == 2 || $CONFIG_AX25 == 4)} then {write_tristate $cfg $autocfg CONFIG_YAM $CONFIG_YAM [list $CONFIG_AX25] 2 }
	if {($CONFIG_NET != 0)} then {write_comment $cfg $autocfg "IrDA (infrared) support"}
	global CONFIG_IRDA
	if {($CONFIG_NET != 0) && ($CONFIG_NET == 1 || $CONFIG_NET == 2 || $CONFIG_NET == 4)} then {write_tristate $cfg $autocfg CONFIG_IRDA $CONFIG_IRDA [list $CONFIG_NET] 2 }
	if {($CONFIG_NET != 0) && ($CONFIG_IRDA != 0)} then {write_comment $cfg $autocfg "IrDA protocols"}
	global CONFIG_IRLAN
	if {($CONFIG_NET != 0) && ($CONFIG_IRDA != 0) && ($CONFIG_IRDA == 1 || $CONFIG_IRDA == 2 || $CONFIG_IRDA == 4)} then {write_tristate $cfg $autocfg CONFIG_IRLAN $CONFIG_IRLAN [list $CONFIG_IRDA] 2 }
	global CONFIG_IRNET
	if {($CONFIG_NET != 0) && ($CONFIG_IRDA != 0) && ($CONFIG_NETDEVICES != 0) && ($CONFIG_IRDA == 1 || $CONFIG_IRDA == 2 || $CONFIG_IRDA == 4) && ($CONFIG_PPP == 1 || $CONFIG_PPP == 2 || $CONFIG_PPP == 4)} then {write_tristate $cfg $autocfg CONFIG_IRNET $CONFIG_IRNET [list $CONFIG_IRDA $CONFIG_PPP] 2 }
	global CONFIG_IRCOMM
	if {($CONFIG_NET != 0) && ($CONFIG_IRDA != 0) && ($CONFIG_IRDA == 1 || $CONFIG_IRDA == 2 || $CONFIG_IRDA == 4)} then {write_tristate $cfg $autocfg CONFIG_IRCOMM $CONFIG_IRCOMM [list $CONFIG_IRDA] 2 }
	global CONFIG_IRDA_ULTRA
	if {($CONFIG_NET != 0) && ($CONFIG_IRDA != 0)} then {write_tristate $cfg $autocfg CONFIG_IRDA_ULTRA $CONFIG_IRDA_ULTRA [list $notmod] 2 }
	if {($CONFIG_NET != 0) && ($CONFIG_IRDA != 0)} then {write_comment $cfg $autocfg "IrDA options"}
	global CONFIG_IRDA_CACHE_LAST_LSAP
	if {($CONFIG_NET != 0) && ($CONFIG_IRDA != 0)} then {write_tristate $cfg $autocfg CONFIG_IRDA_CACHE_LAST_LSAP $CONFIG_IRDA_CACHE_LAST_LSAP [list $notmod] 2 }
	global CONFIG_IRDA_FAST_RR
	if {($CONFIG_NET != 0) && ($CONFIG_IRDA != 0)} then {write_tristate $cfg $autocfg CONFIG_IRDA_FAST_RR $CONFIG_IRDA_FAST_RR [list $notmod] 2 }
	global CONFIG_IRDA_DEBUG
	if {($CONFIG_NET != 0) && ($CONFIG_IRDA != 0)} then {write_tristate $cfg $autocfg CONFIG_IRDA_DEBUG $CONFIG_IRDA_DEBUG [list $notmod] 2 }
	if {($CONFIG_NET != 0) && ($CONFIG_IRDA != 0)} then {write_comment $cfg $autocfg "Infrared-port device drivers"}
	if {($CONFIG_NET != 0) && ($CONFIG_IRDA != 0)} then {write_comment $cfg $autocfg "SIR device drivers"}
	global CONFIG_IRTTY_SIR
	if {($CONFIG_NET != 0) && ($CONFIG_IRDA != 0) && ($CONFIG_IRDA == 1 || $CONFIG_IRDA == 2 || $CONFIG_IRDA == 4)} then {write_tristate $cfg $autocfg CONFIG_IRTTY_SIR $CONFIG_IRTTY_SIR [list $CONFIG_IRDA] 2 }
	global CONFIG_IRPORT_SIR
	if {($CONFIG_NET != 0) && ($CONFIG_IRDA != 0) && ($CONFIG_IRDA == 1 || $CONFIG_IRDA == 2 || $CONFIG_IRDA == 4)} then {write_tristate $cfg $autocfg CONFIG_IRPORT_SIR $CONFIG_IRPORT_SIR [list $CONFIG_IRDA] 2 }
	if {($CONFIG_NET != 0) && ($CONFIG_IRDA != 0)} then {write_comment $cfg $autocfg "Dongle support"}
	global CONFIG_DONGLE
	if {($CONFIG_NET != 0) && ($CONFIG_IRDA != 0)} then {write_tristate $cfg $autocfg CONFIG_DONGLE $CONFIG_DONGLE [list $notmod] 2 }
	global CONFIG_ESI_DONGLE
	if {($CONFIG_NET != 0) && ($CONFIG_IRDA != 0) && ($CONFIG_DONGLE != 0) && ($CONFIG_IRDA == 1 || $CONFIG_IRDA == 2 || $CONFIG_IRDA == 4)} then {write_tristate $cfg $autocfg CONFIG_ESI_DONGLE $CONFIG_ESI_DONGLE [list $CONFIG_IRDA] 2 }
	global CONFIG_ACTISYS_DONGLE
	if {($CONFIG_NET != 0) && ($CONFIG_IRDA != 0) && ($CONFIG_DONGLE != 0) && ($CONFIG_IRDA == 1 || $CONFIG_IRDA == 2 || $CONFIG_IRDA == 4)} then {write_tristate $cfg $autocfg CONFIG_ACTISYS_DONGLE $CONFIG_ACTISYS_DONGLE [list $CONFIG_IRDA] 2 }
	global CONFIG_TEKRAM_DONGLE
	if {($CONFIG_NET != 0) && ($CONFIG_IRDA != 0) && ($CONFIG_DONGLE != 0) && ($CONFIG_IRDA == 1 || $CONFIG_IRDA == 2 || $CONFIG_IRDA == 4)} then {write_tristate $cfg $autocfg CONFIG_TEKRAM_DONGLE $CONFIG_TEKRAM_DONGLE [list $CONFIG_IRDA] 2 }
	global CONFIG_GIRBIL_DONGLE
	if {($CONFIG_NET != 0) && ($CONFIG_IRDA != 0) && ($CONFIG_DONGLE != 0) && ($CONFIG_IRDA == 1 || $CONFIG_IRDA == 2 || $CONFIG_IRDA == 4)} then {write_tristate $cfg $autocfg CONFIG_GIRBIL_DONGLE $CONFIG_GIRBIL_DONGLE [list $CONFIG_IRDA] 2 }
	global CONFIG_LITELINK_DONGLE
	if {($CONFIG_NET != 0) && ($CONFIG_IRDA != 0) && ($CONFIG_DONGLE != 0) && ($CONFIG_IRDA == 1 || $CONFIG_IRDA == 2 || $CONFIG_IRDA == 4)} then {write_tristate $cfg $autocfg CONFIG_LITELINK_DONGLE $CONFIG_LITELINK_DONGLE [list $CONFIG_IRDA] 2 }
	global CONFIG_OLD_BELKIN_DONGLE
	if {($CONFIG_NET != 0) && ($CONFIG_IRDA != 0) && ($CONFIG_DONGLE != 0) && ($CONFIG_IRDA == 1 || $CONFIG_IRDA == 2 || $CONFIG_IRDA == 4)} then {write_tristate $cfg $autocfg CONFIG_OLD_BELKIN_DONGLE $CONFIG_OLD_BELKIN_DONGLE [list $CONFIG_IRDA] 2 }
	if {($CONFIG_NET != 0) && ($CONFIG_IRDA != 0)} then {write_comment $cfg $autocfg "FIR device drivers"}
	global CONFIG_USB_IRDA
	global CONFIG_USB
	if {($CONFIG_NET != 0) && ($CONFIG_IRDA != 0) && ($CONFIG_IRDA == 1 || $CONFIG_IRDA == 2 || $CONFIG_IRDA == 4) && ($CONFIG_USB == 1 || $CONFIG_USB == 2 || $CONFIG_USB == 4) && ($CONFIG_EXPERIMENTAL == 1 || $CONFIG_EXPERIMENTAL == 2 || $CONFIG_EXPERIMENTAL == 4)} then {write_tristate $cfg $autocfg CONFIG_USB_IRDA $CONFIG_USB_IRDA [list $CONFIG_IRDA $CONFIG_USB $CONFIG_EXPERIMENTAL] 2 }
	global CONFIG_NSC_FIR
	if {($CONFIG_NET != 0) && ($CONFIG_IRDA != 0) && ($CONFIG_IRDA == 1 || $CONFIG_IRDA == 2 || $CONFIG_IRDA == 4)} then {write_tristate $cfg $autocfg CONFIG_NSC_FIR $CONFIG_NSC_FIR [list $CONFIG_IRDA] 2 }
	global CONFIG_WINBOND_FIR
	if {($CONFIG_NET != 0) && ($CONFIG_IRDA != 0) && ($CONFIG_IRDA == 1 || $CONFIG_IRDA == 2 || $CONFIG_IRDA == 4)} then {write_tristate $cfg $autocfg CONFIG_WINBOND_FIR $CONFIG_WINBOND_FIR [list $CONFIG_IRDA] 2 }
	global CONFIG_TOSHIBA_FIR
	if {($CONFIG_NET != 0) && ($CONFIG_IRDA != 0) && ($CONFIG_IRDA == 1 || $CONFIG_IRDA == 2 || $CONFIG_IRDA == 4)} then {write_tristate $cfg $autocfg CONFIG_TOSHIBA_FIR $CONFIG_TOSHIBA_FIR [list $CONFIG_IRDA] 2 }
	global CONFIG_SMC_IRCC_FIR
	if {($CONFIG_NET != 0) && ($CONFIG_IRDA != 0) && ($CONFIG_EXPERIMENTAL != 0) && ($CONFIG_IRDA == 1 || $CONFIG_IRDA == 2 || $CONFIG_IRDA == 4)} then {write_tristate $cfg $autocfg CONFIG_SMC_IRCC_FIR $CONFIG_SMC_IRCC_FIR [list $CONFIG_IRDA] 2 }
	global CONFIG_ALI_FIR
	if {($CONFIG_NET != 0) && ($CONFIG_IRDA != 0) && ($CONFIG_EXPERIMENTAL != 0) && ($CONFIG_IRDA == 1 || $CONFIG_IRDA == 2 || $CONFIG_IRDA == 4)} then {write_tristate $cfg $autocfg CONFIG_ALI_FIR $CONFIG_ALI_FIR [list $CONFIG_IRDA] 2 }
	global CONFIG_VLSI_FIR
	if {($CONFIG_NET != 0) && ($CONFIG_IRDA != 0) && ($CONFIG_EXPERIMENTAL != 0) && ($CONFIG_IRDA == 1 || $CONFIG_IRDA == 2 || $CONFIG_IRDA == 4)} then {write_tristate $cfg $autocfg CONFIG_VLSI_FIR $CONFIG_VLSI_FIR [list $CONFIG_IRDA] 2 }
	write_comment $cfg $autocfg "ISDN subsystem"
	global CONFIG_ISDN
	if {($CONFIG_NET != 0)} then {write_tristate $cfg $autocfg CONFIG_ISDN $CONFIG_ISDN [list $notmod] 2 }
	global CONFIG_ISDN_BOOL
	if {($CONFIG_NET != 0) && ($CONFIG_ISDN != 0)} then {write_tristate $cfg $autocfg CONFIG_ISDN_BOOL $CONSTANT_Y [list $notmod] 2 }
	global CONFIG_ISDN_PPP
	if {($CONFIG_NET != 0) && ($CONFIG_ISDN != 0) && ($CONFIG_INET != 0)} then {write_tristate $cfg $autocfg CONFIG_ISDN_PPP $CONFIG_ISDN_PPP [list $notmod] 2 }
	global CONFIG_ISDN_PPP_VJ
	if {($CONFIG_NET != 0) && ($CONFIG_ISDN != 0) && ($CONFIG_INET != 0) && ($CONFIG_ISDN_PPP != 0)} then {write_tristate $cfg $autocfg CONFIG_ISDN_PPP_VJ $CONFIG_ISDN_PPP_VJ [list $notmod] 2 }
	global CONFIG_ISDN_MPP
	if {($CONFIG_NET != 0) && ($CONFIG_ISDN != 0) && ($CONFIG_INET != 0) && ($CONFIG_ISDN_PPP != 0)} then {write_tristate $cfg $autocfg CONFIG_ISDN_MPP $CONFIG_ISDN_MPP [list $notmod] 2 }
	global CONFIG_ISDN_PPP_BSDCOMP
	if {($CONFIG_NET != 0) && ($CONFIG_ISDN != 0) && ($CONFIG_INET != 0) && ($CONFIG_ISDN_PPP != 0) && ($CONFIG_ISDN == 1 || $CONFIG_ISDN == 2 || $CONFIG_ISDN == 4)} then {write_tristate $cfg $autocfg CONFIG_ISDN_PPP_BSDCOMP $CONFIG_ISDN_PPP_BSDCOMP [list $CONFIG_ISDN] 2 }
	global CONFIG_ISDN_AUDIO
	if {($CONFIG_NET != 0) && ($CONFIG_ISDN != 0)} then {write_tristate $cfg $autocfg CONFIG_ISDN_AUDIO $CONFIG_ISDN_AUDIO [list $notmod] 2 }
	global CONFIG_ISDN_TTY_FAX
	if {($CONFIG_NET != 0) && ($CONFIG_ISDN != 0) && ($CONFIG_ISDN_AUDIO != 0)} then {write_tristate $cfg $autocfg CONFIG_ISDN_TTY_FAX $CONFIG_ISDN_TTY_FAX [list $notmod] 2 }
	global CONFIG_ISDN_X25
	if {($CONFIG_NET != 0) && ($CONFIG_ISDN != 0) && ($CONFIG_X25 != 0)} then {write_tristate $cfg $autocfg CONFIG_ISDN_X25 $CONFIG_ISDN_X25 [list $notmod] 2 }
	if {($CONFIG_NET != 0) && ($CONFIG_ISDN != 0)} then {write_comment $cfg $autocfg "ISDN feature submodules"}
	global CONFIG_ISDN_DRV_LOOP
	if {($CONFIG_NET != 0) && ($CONFIG_ISDN != 0) && ($CONFIG_ISDN == 1 || $CONFIG_ISDN == 2 || $CONFIG_ISDN == 4)} then {write_tristate $cfg $autocfg CONFIG_ISDN_DRV_LOOP $CONFIG_ISDN_DRV_LOOP [list $CONFIG_ISDN] 2 }
	global CONFIG_ISDN_DIVERSION
	if {($CONFIG_NET != 0) && ($CONFIG_ISDN != 0) && ($CONFIG_ISDN == 1 || $CONFIG_ISDN == 2 || $CONFIG_ISDN == 4)} then {write_tristate $cfg $autocfg CONFIG_ISDN_DIVERSION $CONFIG_ISDN_DIVERSION [list $CONFIG_ISDN] 2 }
	if {($CONFIG_NET != 0) && ($CONFIG_ISDN != 0)} then {write_comment $cfg $autocfg "low-level hardware drivers"}
	if {($CONFIG_NET != 0) && ($CONFIG_ISDN != 0)} then {write_comment $cfg $autocfg "Passive ISDN cards"}
	global CONFIG_ISDN_DRV_HISAX
	if {($CONFIG_NET != 0) && ($CONFIG_ISDN != 0) && ($CONFIG_ISDN == 1 || $CONFIG_ISDN == 2 || $CONFIG_ISDN == 4)} then {write_tristate $cfg $autocfg CONFIG_ISDN_DRV_HISAX $CONFIG_ISDN_DRV_HISAX [list $CONFIG_ISDN] 2 }
	global CONFIG_ISDN_HISAX
	if {($CONFIG_NET != 0) && ($CONFIG_ISDN != 0) && ($CONFIG_ISDN_DRV_HISAX != 0)} then {write_tristate $cfg $autocfg CONFIG_ISDN_HISAX $CONSTANT_Y [list $notmod] 2 }
	if {($CONFIG_NET != 0) && ($CONFIG_ISDN != 0) && ($CONFIG_ISDN_DRV_HISAX != 0)} then {write_comment $cfg $autocfg "  D-channel protocol features"}
	global CONFIG_HISAX_EURO
	if {($CONFIG_NET != 0) && ($CONFIG_ISDN != 0) && ($CONFIG_ISDN_DRV_HISAX != 0)} then {write_tristate $cfg $autocfg CONFIG_HISAX_EURO $CONFIG_HISAX_EURO [list $notmod] 2 }
	global CONFIG_DE_AOC
	if {($CONFIG_NET != 0) && ($CONFIG_ISDN != 0) && ($CONFIG_ISDN_DRV_HISAX != 0) && ($CONFIG_HISAX_EURO != 0)} then {write_tristate $cfg $autocfg CONFIG_DE_AOC $CONFIG_DE_AOC [list $notmod] 2 }
	global CONFIG_HISAX_NO_SENDCOMPLETE
	if {($CONFIG_NET != 0) && ($CONFIG_ISDN != 0) && ($CONFIG_ISDN_DRV_HISAX != 0) && ($CONFIG_HISAX_EURO != 0)} then {write_tristate $cfg $autocfg CONFIG_HISAX_NO_SENDCOMPLETE $CONFIG_HISAX_NO_SENDCOMPLETE [list $notmod] 2 }
	global CONFIG_HISAX_NO_LLC
	if {($CONFIG_NET != 0) && ($CONFIG_ISDN != 0) && ($CONFIG_ISDN_DRV_HISAX != 0) && ($CONFIG_HISAX_EURO != 0)} then {write_tristate $cfg $autocfg CONFIG_HISAX_NO_LLC $CONFIG_HISAX_NO_LLC [list $notmod] 2 }
	global CONFIG_HISAX_NO_KEYPAD
	if {($CONFIG_NET != 0) && ($CONFIG_ISDN != 0) && ($CONFIG_ISDN_DRV_HISAX != 0) && ($CONFIG_HISAX_EURO != 0)} then {write_tristate $cfg $autocfg CONFIG_HISAX_NO_KEYPAD $CONFIG_HISAX_NO_KEYPAD [list $notmod] 2 }
	global CONFIG_HISAX_1TR6
	if {($CONFIG_NET != 0) && ($CONFIG_ISDN != 0) && ($CONFIG_ISDN_DRV_HISAX != 0)} then {write_tristate $cfg $autocfg CONFIG_HISAX_1TR6 $CONFIG_HISAX_1TR6 [list $notmod] 2 }
	global CONFIG_HISAX_NI1
	if {($CONFIG_NET != 0) && ($CONFIG_ISDN != 0) && ($CONFIG_ISDN_DRV_HISAX != 0)} then {write_tristate $cfg $autocfg CONFIG_HISAX_NI1 $CONFIG_HISAX_NI1 [list $notmod] 2 }
	global CONFIG_HISAX_MAX_CARDS
	if {($CONFIG_NET != 0) && ($CONFIG_ISDN != 0) && ($CONFIG_ISDN_DRV_HISAX != 0)} then {write_int $cfg $autocfg CONFIG_HISAX_MAX_CARDS $CONFIG_HISAX_MAX_CARDS $notmod }
	if {($CONFIG_NET != 0) && ($CONFIG_ISDN != 0) && ($CONFIG_ISDN_DRV_HISAX != 0)} then {write_comment $cfg $autocfg "  HiSax supported cards"}
	global CONFIG_HISAX_16_0
	if {($CONFIG_NET != 0) && ($CONFIG_ISDN != 0) && ($CONFIG_ISDN_DRV_HISAX != 0)} then {write_tristate $cfg $autocfg CONFIG_HISAX_16_0 $CONFIG_HISAX_16_0 [list $notmod] 2 }
	global CONFIG_HISAX_16_3
	if {($CONFIG_NET != 0) && ($CONFIG_ISDN != 0) && ($CONFIG_ISDN_DRV_HISAX != 0)} then {write_tristate $cfg $autocfg CONFIG_HISAX_16_3 $CONFIG_HISAX_16_3 [list $notmod] 2 }
	global CONFIG_HISAX_TELESPCI
	if {($CONFIG_NET != 0) && ($CONFIG_ISDN != 0) && ($CONFIG_ISDN_DRV_HISAX != 0)} then {write_tristate $cfg $autocfg CONFIG_HISAX_TELESPCI $CONFIG_HISAX_TELESPCI [list $notmod] 2 }
	global CONFIG_HISAX_S0BOX
	if {($CONFIG_NET != 0) && ($CONFIG_ISDN != 0) && ($CONFIG_ISDN_DRV_HISAX != 0)} then {write_tristate $cfg $autocfg CONFIG_HISAX_S0BOX $CONFIG_HISAX_S0BOX [list $notmod] 2 }
	global CONFIG_HISAX_AVM_A1
	if {($CONFIG_NET != 0) && ($CONFIG_ISDN != 0) && ($CONFIG_ISDN_DRV_HISAX != 0)} then {write_tristate $cfg $autocfg CONFIG_HISAX_AVM_A1 $CONFIG_HISAX_AVM_A1 [list $notmod] 2 }
	global CONFIG_HISAX_FRITZPCI
	if {($CONFIG_NET != 0) && ($CONFIG_ISDN != 0) && ($CONFIG_ISDN_DRV_HISAX != 0)} then {write_tristate $cfg $autocfg CONFIG_HISAX_FRITZPCI $CONFIG_HISAX_FRITZPCI [list $notmod] 2 }
	global CONFIG_HISAX_AVM_A1_PCMCIA
	if {($CONFIG_NET != 0) && ($CONFIG_ISDN != 0) && ($CONFIG_ISDN_DRV_HISAX != 0)} then {write_tristate $cfg $autocfg CONFIG_HISAX_AVM_A1_PCMCIA $CONFIG_HISAX_AVM_A1_PCMCIA [list $notmod] 2 }
	global CONFIG_HISAX_ELSA
	if {($CONFIG_NET != 0) && ($CONFIG_ISDN != 0) && ($CONFIG_ISDN_DRV_HISAX != 0)} then {write_tristate $cfg $autocfg CONFIG_HISAX_ELSA $CONFIG_HISAX_ELSA [list $notmod] 2 }
	global CONFIG_HISAX_IX1MICROR2
	if {($CONFIG_NET != 0) && ($CONFIG_ISDN != 0) && ($CONFIG_ISDN_DRV_HISAX != 0)} then {write_tristate $cfg $autocfg CONFIG_HISAX_IX1MICROR2 $CONFIG_HISAX_IX1MICROR2 [list $notmod] 2 }
	global CONFIG_HISAX_DIEHLDIVA
	if {($CONFIG_NET != 0) && ($CONFIG_ISDN != 0) && ($CONFIG_ISDN_DRV_HISAX != 0)} then {write_tristate $cfg $autocfg CONFIG_HISAX_DIEHLDIVA $CONFIG_HISAX_DIEHLDIVA [list $notmod] 2 }
	global CONFIG_HISAX_ASUSCOM
	if {($CONFIG_NET != 0) && ($CONFIG_ISDN != 0) && ($CONFIG_ISDN_DRV_HISAX != 0)} then {write_tristate $cfg $autocfg CONFIG_HISAX_ASUSCOM $CONFIG_HISAX_ASUSCOM [list $notmod] 2 }
	global CONFIG_HISAX_TELEINT
	if {($CONFIG_NET != 0) && ($CONFIG_ISDN != 0) && ($CONFIG_ISDN_DRV_HISAX != 0)} then {write_tristate $cfg $autocfg CONFIG_HISAX_TELEINT $CONFIG_HISAX_TELEINT [list $notmod] 2 }
	global CONFIG_HISAX_HFCS
	if {($CONFIG_NET != 0) && ($CONFIG_ISDN != 0) && ($CONFIG_ISDN_DRV_HISAX != 0)} then {write_tristate $cfg $autocfg CONFIG_HISAX_HFCS $CONFIG_HISAX_HFCS [list $notmod] 2 }
	global CONFIG_HISAX_SEDLBAUER
	if {($CONFIG_NET != 0) && ($CONFIG_ISDN != 0) && ($CONFIG_ISDN_DRV_HISAX != 0)} then {write_tristate $cfg $autocfg CONFIG_HISAX_SEDLBAUER $CONFIG_HISAX_SEDLBAUER [list $notmod] 2 }
	global CONFIG_HISAX_SPORTSTER
	if {($CONFIG_NET != 0) && ($CONFIG_ISDN != 0) && ($CONFIG_ISDN_DRV_HISAX != 0)} then {write_tristate $cfg $autocfg CONFIG_HISAX_SPORTSTER $CONFIG_HISAX_SPORTSTER [list $notmod] 2 }
	global CONFIG_HISAX_MIC
	if {($CONFIG_NET != 0) && ($CONFIG_ISDN != 0) && ($CONFIG_ISDN_DRV_HISAX != 0)} then {write_tristate $cfg $autocfg CONFIG_HISAX_MIC $CONFIG_HISAX_MIC [list $notmod] 2 }
	global CONFIG_HISAX_NETJET
	if {($CONFIG_NET != 0) && ($CONFIG_ISDN != 0) && ($CONFIG_ISDN_DRV_HISAX != 0)} then {write_tristate $cfg $autocfg CONFIG_HISAX_NETJET $CONFIG_HISAX_NETJET [list $notmod] 2 }
	global CONFIG_HISAX_NETJET_U
	if {($CONFIG_NET != 0) && ($CONFIG_ISDN != 0) && ($CONFIG_ISDN_DRV_HISAX != 0)} then {write_tristate $cfg $autocfg CONFIG_HISAX_NETJET_U $CONFIG_HISAX_NETJET_U [list $notmod] 2 }
	global CONFIG_HISAX_NICCY
	if {($CONFIG_NET != 0) && ($CONFIG_ISDN != 0) && ($CONFIG_ISDN_DRV_HISAX != 0)} then {write_tristate $cfg $autocfg CONFIG_HISAX_NICCY $CONFIG_HISAX_NICCY [list $notmod] 2 }
	global CONFIG_HISAX_ISURF
	if {($CONFIG_NET != 0) && ($CONFIG_ISDN != 0) && ($CONFIG_ISDN_DRV_HISAX != 0)} then {write_tristate $cfg $autocfg CONFIG_HISAX_ISURF $CONFIG_HISAX_ISURF [list $notmod] 2 }
	global CONFIG_HISAX_HSTSAPHIR
	if {($CONFIG_NET != 0) && ($CONFIG_ISDN != 0) && ($CONFIG_ISDN_DRV_HISAX != 0)} then {write_tristate $cfg $autocfg CONFIG_HISAX_HSTSAPHIR $CONFIG_HISAX_HSTSAPHIR [list $notmod] 2 }
	global CONFIG_HISAX_BKM_A4T
	if {($CONFIG_NET != 0) && ($CONFIG_ISDN != 0) && ($CONFIG_ISDN_DRV_HISAX != 0)} then {write_tristate $cfg $autocfg CONFIG_HISAX_BKM_A4T $CONFIG_HISAX_BKM_A4T [list $notmod] 2 }
	global CONFIG_HISAX_SCT_QUADRO
	if {($CONFIG_NET != 0) && ($CONFIG_ISDN != 0) && ($CONFIG_ISDN_DRV_HISAX != 0)} then {write_tristate $cfg $autocfg CONFIG_HISAX_SCT_QUADRO $CONFIG_HISAX_SCT_QUADRO [list $notmod] 2 }
	global CONFIG_HISAX_GAZEL
	if {($CONFIG_NET != 0) && ($CONFIG_ISDN != 0) && ($CONFIG_ISDN_DRV_HISAX != 0)} then {write_tristate $cfg $autocfg CONFIG_HISAX_GAZEL $CONFIG_HISAX_GAZEL [list $notmod] 2 }
	global CONFIG_HISAX_HFC_PCI
	if {($CONFIG_NET != 0) && ($CONFIG_ISDN != 0) && ($CONFIG_ISDN_DRV_HISAX != 0)} then {write_tristate $cfg $autocfg CONFIG_HISAX_HFC_PCI $CONFIG_HISAX_HFC_PCI [list $notmod] 2 }
	global CONFIG_HISAX_W6692
	if {($CONFIG_NET != 0) && ($CONFIG_ISDN != 0) && ($CONFIG_ISDN_DRV_HISAX != 0)} then {write_tristate $cfg $autocfg CONFIG_HISAX_W6692 $CONFIG_HISAX_W6692 [list $notmod] 2 }
	global CONFIG_HISAX_HFC_SX
	if {($CONFIG_NET != 0) && ($CONFIG_ISDN != 0) && ($CONFIG_ISDN_DRV_HISAX != 0)} then {write_tristate $cfg $autocfg CONFIG_HISAX_HFC_SX $CONFIG_HISAX_HFC_SX [list $notmod] 2 }
	global CONFIG_HISAX_DEBUG
	if {($CONFIG_NET != 0) && ($CONFIG_ISDN != 0) && ($CONFIG_ISDN_DRV_HISAX != 0)} then {write_tristate $cfg $autocfg CONFIG_HISAX_DEBUG $CONFIG_HISAX_DEBUG [list $notmod] 2 }
	global CONFIG_HISAX_SEDLBAUER_CS
	if {($CONFIG_NET != 0) && ($CONFIG_ISDN != 0) && ($CONFIG_ISDN_DRV_HISAX != 0) && ($CONFIG_ISDN_DRV_HISAX == 1 || $CONFIG_ISDN_DRV_HISAX == 2 || $CONFIG_ISDN_DRV_HISAX == 4) && ($CONFIG_PCMCIA == 1 || $CONFIG_PCMCIA == 2 || $CONFIG_PCMCIA == 4)} then {write_tristate $cfg $autocfg CONFIG_HISAX_SEDLBAUER_CS $CONFIG_HISAX_SEDLBAUER_CS [list $CONFIG_ISDN_DRV_HISAX $CONFIG_PCMCIA] 2 }
	global CONFIG_HISAX_ELSA_CS
	if {($CONFIG_NET != 0) && ($CONFIG_ISDN != 0) && ($CONFIG_ISDN_DRV_HISAX != 0) && ($CONFIG_ISDN_DRV_HISAX == 1 || $CONFIG_ISDN_DRV_HISAX == 2 || $CONFIG_ISDN_DRV_HISAX == 4) && ($CONFIG_PCMCIA == 1 || $CONFIG_PCMCIA == 2 || $CONFIG_PCMCIA == 4)} then {write_tristate $cfg $autocfg CONFIG_HISAX_ELSA_CS $CONFIG_HISAX_ELSA_CS [list $CONFIG_ISDN_DRV_HISAX $CONFIG_PCMCIA] 2 }
	global CONFIG_HISAX_AVM_A1_CS
	if {($CONFIG_NET != 0) && ($CONFIG_ISDN != 0) && ($CONFIG_ISDN_DRV_HISAX != 0) && ($CONFIG_ISDN_DRV_HISAX == 1 || $CONFIG_ISDN_DRV_HISAX == 2 || $CONFIG_ISDN_DRV_HISAX == 4) && ($CONFIG_PCMCIA == 1 || $CONFIG_PCMCIA == 2 || $CONFIG_PCMCIA == 4) && ($CONFIG_HISAX_AVM_A1_PCMCIA == 1 || $CONFIG_HISAX_AVM_A1_PCMCIA == 2 || $CONFIG_HISAX_AVM_A1_PCMCIA == 4)} then {write_tristate $cfg $autocfg CONFIG_HISAX_AVM_A1_CS $CONFIG_HISAX_AVM_A1_CS [list $CONFIG_ISDN_DRV_HISAX $CONFIG_PCMCIA $CONFIG_HISAX_AVM_A1_PCMCIA] 2 }
	global CONFIG_HISAX_ST5481
	if {($CONFIG_NET != 0) && ($CONFIG_ISDN != 0) && ($CONFIG_ISDN_DRV_HISAX != 0) && ($CONFIG_ISDN_DRV_HISAX == 1 || $CONFIG_ISDN_DRV_HISAX == 2 || $CONFIG_ISDN_DRV_HISAX == 4) && ($CONFIG_USB == 1 || $CONFIG_USB == 2 || $CONFIG_USB == 4) && ($CONFIG_EXPERIMENTAL == 1 || $CONFIG_EXPERIMENTAL == 2 || $CONFIG_EXPERIMENTAL == 4)} then {write_tristate $cfg $autocfg CONFIG_HISAX_ST5481 $CONFIG_HISAX_ST5481 [list $CONFIG_ISDN_DRV_HISAX $CONFIG_USB $CONFIG_EXPERIMENTAL] 2 }
	global CONFIG_HISAX_FRITZ_PCIPNP
	if {($CONFIG_NET != 0) && ($CONFIG_ISDN != 0) && ($CONFIG_ISDN_DRV_HISAX != 0) && ($CONFIG_ISDN_DRV_HISAX == 1 || $CONFIG_ISDN_DRV_HISAX == 2 || $CONFIG_ISDN_DRV_HISAX == 4) && ($CONFIG_EXPERIMENTAL == 1 || $CONFIG_EXPERIMENTAL == 2 || $CONFIG_EXPERIMENTAL == 4)} then {write_tristate $cfg $autocfg CONFIG_HISAX_FRITZ_PCIPNP $CONFIG_HISAX_FRITZ_PCIPNP [list $CONFIG_ISDN_DRV_HISAX $CONFIG_EXPERIMENTAL] 2 }
	if {($CONFIG_NET != 0) && ($CONFIG_ISDN != 0)} then {write_comment $cfg $autocfg "Active ISDN cards"}
	global CONFIG_ISDN_DRV_ICN
	if {($CONFIG_NET != 0) && ($CONFIG_ISDN != 0) && ($CONFIG_ISDN == 1 || $CONFIG_ISDN == 2 || $CONFIG_ISDN == 4)} then {write_tristate $cfg $autocfg CONFIG_ISDN_DRV_ICN $CONFIG_ISDN_DRV_ICN [list $CONFIG_ISDN] 2 }
	global CONFIG_ISDN_DRV_PCBIT
	if {($CONFIG_NET != 0) && ($CONFIG_ISDN != 0) && ($CONFIG_ISDN == 1 || $CONFIG_ISDN == 2 || $CONFIG_ISDN == 4)} then {write_tristate $cfg $autocfg CONFIG_ISDN_DRV_PCBIT $CONFIG_ISDN_DRV_PCBIT [list $CONFIG_ISDN] 2 }
	global CONFIG_ISDN_DRV_SC
	if {($CONFIG_NET != 0) && ($CONFIG_ISDN != 0) && ($CONFIG_ISDN == 1 || $CONFIG_ISDN == 2 || $CONFIG_ISDN == 4)} then {write_tristate $cfg $autocfg CONFIG_ISDN_DRV_SC $CONFIG_ISDN_DRV_SC [list $CONFIG_ISDN] 2 }
	global CONFIG_ISDN_DRV_ACT2000
	if {($CONFIG_NET != 0) && ($CONFIG_ISDN != 0) && ($CONFIG_ISDN == 1 || $CONFIG_ISDN == 2 || $CONFIG_ISDN == 4)} then {write_tristate $cfg $autocfg CONFIG_ISDN_DRV_ACT2000 $CONFIG_ISDN_DRV_ACT2000 [list $CONFIG_ISDN] 2 }
	global CONFIG_ISDN_DRV_EICON
	if {($CONFIG_NET != 0) && ($CONFIG_ISDN != 0)} then {write_tristate $cfg $autocfg CONFIG_ISDN_DRV_EICON $CONFIG_ISDN_DRV_EICON [list $notmod] 2 }
	global CONFIG_ISDN_DRV_EICON_DIVAS
	global CONFIG_ISDN_DRV_EICON_OLD
	if {($CONFIG_NET != 0) && ($CONFIG_ISDN != 0) && ($CONFIG_ISDN_DRV_EICON != 0) && ($CONFIG_ISDN_DRV_EICON_OLD != 1) && ($CONFIG_ISDN == 1 || $CONFIG_ISDN == 2 || $CONFIG_ISDN == 4) && ($CONFIG_PCI == 1 || $CONFIG_PCI == 2 || $CONFIG_PCI == 4)} then {write_tristate $cfg $autocfg CONFIG_ISDN_DRV_EICON_DIVAS $CONFIG_ISDN_DRV_EICON_DIVAS [list $CONFIG_ISDN $CONFIG_PCI] 2 }
	if {($CONFIG_NET != 0) && ($CONFIG_ISDN != 0) && ($CONFIG_ISDN_DRV_EICON != 0) && ($CONFIG_ISDN_DRV_EICON_DIVAS != 1) && ($CONFIG_ISDN == 1 || $CONFIG_ISDN == 2 || $CONFIG_ISDN == 4)} then {write_tristate $cfg $autocfg CONFIG_ISDN_DRV_EICON_OLD $CONFIG_ISDN_DRV_EICON_OLD [list $CONFIG_ISDN] 2 }
	global CONFIG_ISDN_DRV_EICON_PCI
	if {($CONFIG_NET != 0) && ($CONFIG_ISDN != 0) && ($CONFIG_ISDN_DRV_EICON != 0) && ($CONFIG_ISDN_DRV_EICON_DIVAS != 1) && ($CONFIG_ISDN_DRV_EICON_OLD != 0) && ($CONFIG_PCI == 1 || $CONFIG_PCI == 4)} then {write_tristate $cfg $autocfg CONFIG_ISDN_DRV_EICON_PCI $CONFIG_ISDN_DRV_EICON_PCI [list $CONFIG_PCI] 2 }
	global CONFIG_ISDN_DRV_EICON_ISA
	if {($CONFIG_NET != 0) && ($CONFIG_ISDN != 0) && ($CONFIG_ISDN_DRV_EICON != 0) && ($CONFIG_ISDN_DRV_EICON_DIVAS != 1) && ($CONFIG_ISDN_DRV_EICON_OLD != 0)} then {write_tristate $cfg $autocfg CONFIG_ISDN_DRV_EICON_ISA $CONFIG_ISDN_DRV_EICON_ISA [list $notmod] 2 }
	global CONFIG_ISDN_DRV_TPAM
	if {($CONFIG_NET != 0) && ($CONFIG_ISDN != 0) && ($CONFIG_EXPERIMENTAL != 0) && ($CONFIG_ISDN == 1 || $CONFIG_ISDN == 2 || $CONFIG_ISDN == 4) && ($CONFIG_PCI == 1 || $CONFIG_PCI == 2 || $CONFIG_PCI == 4)} then {write_tristate $cfg $autocfg CONFIG_ISDN_DRV_TPAM $CONFIG_ISDN_DRV_TPAM [list $CONFIG_ISDN $CONFIG_PCI] 2 }
	global CONFIG_ISDN_CAPI
	if {($CONFIG_NET != 0) && ($CONFIG_ISDN != 0)} then {write_tristate $cfg $autocfg CONFIG_ISDN_CAPI $CONFIG_ISDN_CAPI [list $notmod] 2 }
	global CONFIG_ISDN_DRV_AVMB1_VERBOSE_REASON
	if {($CONFIG_NET != 0) && ($CONFIG_ISDN != 0) && ($CONFIG_ISDN_CAPI != 0)} then {write_tristate $cfg $autocfg CONFIG_ISDN_DRV_AVMB1_VERBOSE_REASON $CONFIG_ISDN_DRV_AVMB1_VERBOSE_REASON [list $notmod] 2 }
	global CONFIG_ISDN_CAPI_MIDDLEWARE
	if {($CONFIG_NET != 0) && ($CONFIG_ISDN != 0) && ($CONFIG_ISDN_CAPI != 0) && ($CONFIG_EXPERIMENTAL == 1 || $CONFIG_EXPERIMENTAL == 4)} then {write_tristate $cfg $autocfg CONFIG_ISDN_CAPI_MIDDLEWARE $CONFIG_ISDN_CAPI_MIDDLEWARE [list $CONFIG_EXPERIMENTAL] 2 }
	global CONFIG_ISDN_CAPI_CAPI20
	if {($CONFIG_NET != 0) && ($CONFIG_ISDN != 0) && ($CONFIG_ISDN_CAPI != 0) && ($CONFIG_ISDN_CAPI == 1 || $CONFIG_ISDN_CAPI == 2 || $CONFIG_ISDN_CAPI == 4)} then {write_tristate $cfg $autocfg CONFIG_ISDN_CAPI_CAPI20 $CONFIG_ISDN_CAPI_CAPI20 [list $CONFIG_ISDN_CAPI] 2 }
	global CONFIG_ISDN_CAPI_CAPIFS_BOOL
	if {($CONFIG_NET != 0) && ($CONFIG_ISDN != 0) && ($CONFIG_ISDN_CAPI != 0) && ($CONFIG_ISDN_CAPI_MIDDLEWARE == 1) && ($CONFIG_ISDN_CAPI_CAPI20 == 1 || $CONFIG_ISDN_CAPI_CAPI20 == 2 || $CONFIG_ISDN_CAPI_CAPI20 == 4)} then {write_tristate $cfg $autocfg CONFIG_ISDN_CAPI_CAPIFS_BOOL $CONFIG_ISDN_CAPI_CAPIFS_BOOL [list $CONFIG_ISDN_CAPI_CAPI20] 1 }
	gtModify Data PointerExtended Message, reserved code (0x%02x) pointer = %dperiod = %d ns, offset = %dwidth = 2^%d bytestarget routinelunnot Identify disconnect %sallowed %s %d reserved (%02x) %s %02x reserved two byte (%02x %02x) scsi%d : destination target %d, lun %d
        command = DID_SOFT_ERRORDID_PASSTHROUGHDID_BAD_INTRDID_RESETDID_ERRORDID_PARITYDID_ABORTDID_BAD_TARGETDID_TIME_OUTDID_BUS_BUSYDID_NO_CONNECTDID_OKHostbyte=0x%02xis invalid (%s) DRIVER_HARDDRIVER_TIMEOUTDRIVER_INVALIDDRIVER_ERRORDRIVER_MEDIADRIVER_SOFTDRIVER_BUSYDRIVER_OKSUGGEST_SENSESUGGEST_DIESUGGEST_REMAPSUGGEST_ABORTSUGGEST_RETRYSUGGEST_OKDriverbyte=0x%02xinvalid(%s,%s) GCC: (GNU) 2.95.4 20011002 (Debian prerelease).symtab.strtab.shstrtab.rel.text.rel.data.bss.note.rodata.comment
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01.01UNKNOWNPrevent/Allow Medium RemovalSend DiagnosticReceive DiagnosticStart/Stop UnitMode SenseEraseCopyReleaseReserveMode SelectRecover Buffered DataVerifyInquirySpaceWrite FilemarksRead ReverseSeek (6)Write (6)Read (6)Reasssign BlocksRead Block LimitsFormat UnitRequest SenseRezero UnitTest Unit ReadyWrite LongRead LongUpdate BlockRead BufferWrite BufferCopy VerifyCompareMedium ScanRead Defect DataLock/Unlock CacheSynchronize CachePrefetch or Read PositionSet LimitsSearch LowSearch EqualSearch HighWrite VerifyRead updated blockSeek (10)Write (10)Read GenerationRead (10)Read CapacityDefine window parametersMode Sense (10)Mode Select (10)Log SenseLog SelectPause/resumePlay track relative (10)Play audio track/indexPlay audio msfPlay audio (10)Read headerRead TOCRead sub-channelWrite SameChange DefinitionMemory Export Out (16)Memory Export In (16)Read element statusRead defect data(12)Send volume tagRequest volume element addressSet limits(12)Search data low(12)Search data equal(12)Search data high(12)Verify(12)Write and verify(12)Erase(12)Write(12)Play track relative(12)Read(12)Exchange mediumMove medium/play audio(12)RESERVEDVENDOR SPECIFIC%s(0x%02x) %s %02x 
Queue FullCommand TerminatedReservation ConflictIntermediate-Condition MetIntermediateBusyCondition MetCheck ConditionGoodPower-on or self-test failure (%x)Data path failure (%x)Diagnostic failure on component (%x)Ram failure (%x)RMA/PMA is fullProgram memory area is fullProgram memory area update failurePower calibration area errorPower calibration area is fullPower calibration area almost fullCd control errorNo more track reservations allowedEmpty or partially written reserved trackSession fixation error - incomplete track in sessionSession fixation error writing lead-outSession fixation error writing lead-inSession fixation errorDecompression exception long algorithm idDecompression exception short algorithm id of nnDrive region must be permanent/region reset count errorMedia region code is mismatched to logical unit regionRead of scrambled sector without authenticationCopy protection key exchange failure - key not establishedCopy protection key exchange failure - key not presentCopy protection key exchange failure - authentication failureCommand to logical unit failedRecalculate failure occurredRebuild failure occurredRedundancy level got worseRedundancy level got betterState change has occurredInformational,refer to logParity/data mismatchMultiple logical unit failuresData loss on logical unitLogical unit not configuredMultiply assigned logical unitAssign failure occurredCreation of logical unit failedAttachment of logical unit failedRemove of logical unit failedExchange of logical unit failedModification of logical unit failedAdd logical unit failedConfiguration of incapable logical units failedConfiguration failureDocument miss feed automatic in document feederDocument jam in automatic document feederAutomatic document feeder lift upAutomatic document feeder cover upVoltage faultInvalid packet sizeIllegal mode for this trackPacket does not fit in available spaceEnd of user area encountered on this trackScan head positioning errorOut of focusUnable to acquire videoVideo acquisition errorLamp failurePower state change to device controlPower state change to sleepPower state change to standbyPower state change to idlePower state change to activeStandby condition activated by commandIdle condition activated by commandStandby condition activated by timerIdle condition activated by timerLow power condition onFailure prediction threshold exceeded (false)Firmware impending failure drive calibration retry countFirmware impending failure spin-up retry countFirmware impending failure seek time performanceFirmware impending failure throughput performanceFirmware impending failure controller detectedFirmware impending failure channel parametricsFirmware impending failure start unit times too highFirmware impending failure access times too highFirmware impending failure too many block reassignsFirmware impending failure seek error rate too highFirmware impending failure data error rate too highFirmware impending failure drive error rate too highFirmware impending failure general hard drive failureSpindle impending failure drive calibration retry countSpindle impending failure spin-up retry countSpindle impending failure seek time performanceSpindle impending failure throughput performanceSpindle impending failure controller detectedSpindle impending failure channel parametricsSpindle impending failure start unit times too highSpindle impending failure access times too highSpindle impending failure too many block reassignsSpindle impending failure seek error rate too highSpindle impending failure data error rate too highSpindle impending failure drive error rate too highSpindle impending failure general hard drive failureServo impending failure drive calibration retry countServo impending failure spin-up retry countServo impending failure seek time performanceServo impending failure throughput performanceServo impending failure controller detectedServo impending failure channel parametricsServo impending failure start unit times too highServo impending failure access times too highServo impending failure too many block reassignsServo impending failure seek error rate too highServo impending failure data error rate too highServo impending failure drive error rate too highServo impending failure general hard drive failureData channel impending failure drive calibration retry countData channel impending failure spin-up retry countData channel impending failure seek time performanceData channel impending failure throughput performanceData channel impending failure controller detectedData channel impending failure channel parametricsData channel impending failure start unit times too highData channel impending failure access times too highData channel impending failure too many block reassignsData channel impending failure seek error rate too highData channel impending failure data error rate too highData channel impending failure drive error rate too highData channel impending failure general hard drive failureController impending failure drive calibration retry countController impending failure spin-up retry countController impending failure seek time performanceController impending failure throughput performanceController impending failure controller detectedController impending failure channel parametricsController impending failure start unit times too highController impending failure access times too highController impending failure too many block reassignsController impending failure seek error rate too highController impending failure data error rate too highController impending failure drive error rate too highController impending failure general hard drive failureHardware impending failure drive calibration retry countHardware impending failure spin-up retry countHardware impending failure seek time performanceHardware impending failure throughput performanceHardware impending failure controller detectedHardware impending failure channel parametricsHardware impending failure start unit times too highHardware impending failure access times too highHardware impending failure too many block reassignsHardware impending failure seek error rate too highHardware impending failure data error rate too highHardware impending failure drive error rate too highHardware impending failure general hard drive failureLogical unit failure prediction threshold exceededMedia failure prediction threshold exceededFailure prediction threshold exceededSpindles not synchronizedSpindles synchronizedRpl status changeLog list codes exhaustedLog counter at maximumThreshold condition metLog exceptionOperator selected write permitOperator selected write protectOperator medium removal requestOperator request or state change inputUpdated block readGeneration does not existUnable to recover table-of-contentsInsufficient registration resourcesInsufficient resourcesInsufficient reservation resourcesSystem buffer fullSystem resource failureScsi to host system interface failureMedium removal preventedUnload tape failureMedia load or eject failedCartridge faultErase failurePosition error related to timingWrite append position errorWrite append errorOverlapped commands attemptedTagged overlapped commands (nn = queue tag)Logical unit failed self-configurationData phase errorCommand phase errorInvalid message errorInitiator detected error message receivedAsynchronous information protection error detectedInformation unit CRC error detectedScsi parity error detected during st data phaseData phase CRC error detectedScsi parity errorUnsuccessful soft resetSelect or reselect failureInternal target failureMessage errorPower-on or self-test failure (should use 40 nn)Data path failure (should use 40 nn)Diagnostic failure on component nn (80h-ffh)Ram failure (should use 40 nn)Medium auxiliary memory accessibleMedium loadableReported luns data has changedVolume set reassignedVolume set deassignedVolume set deletedVolume set created or modifiedSpare deletedSpare created or modifiedRedundancy group deletedRedundancy group created or modifiedDevice identifier changedComponent device attachedInquiry data has changedChanged operating definitionMicrocode has been changedTarget operating conditions have changedLogical unit unable to update self-test logLogical unit failed self-testTimeout on logical unitLogical unit failureLogical unit has not self-configured yetInvalid bits in identify messageMechanical positioning or changer errorMedium magazine unlockedMedium magazine lockedMedium magazine insertedMedium magazine removedMedium magazine not accessibleEnd of medium reachedMedium source element emptyMedium destination element fullPosition past beginning of mediumPosition past end of mediumRead past beginning of mediumRead past end of mediumReposition errorFailed to sense bottom-of-formFailed to sense top-of-formPaper jamSlew failureTape or electronic vertical forms unit not readyTape position error at end-of-mediumTape position error at beginning-of-mediumSequential positioning errorMedium not present - medium auxiliary memory accessibleMedium not present - loadableMedium not present - tray openMedium not present - tray closedMedium not presentSaving parameters not supportedEsn - device busy class eventEsn - media class eventEsn - power management class eventEvent status notificationRounded parameterRibbon,ink,or toner failureEnclosure services transfer refusedEnclosure services transfer failureEnclosure services unavailableUnsupported enclosure functionEnclosure services failureEnclosure failureTape length errorDefect list update failureNo defect spare location availableFormat command failedMedium format corruptedCurrent session not fixated for appendCannot write - application code mismatchCleaning failureCannot format medium - incompatible mediumCannot write medium - incompatible formatCannot write medium - unknown formatCleaning cartridge installedCannot read medium - incompatible formatCannot read medium - unknown formatIncompatible medium installedCommands cleared by another initiatorOverwrite error on update in placeIllegal power condition requestCurrent program area is emptyCurrent program area is not emptyInvalid combination of windows specifiedToo many windows specifiedCommand sequence errorCopy cannot execute since host cannot disconnectRegistrations preemptedReservations releasedReservations preemptedLog parameters changedMode parameters changedParameters changedTransceiver mode changed to lvdTransceiver mode changed to single-endedDevice internal resetBus device reset function occurredScsi bus reset occurredPower on occurredPower on,reset,or bus device reset occurredImport or export element accessedNot ready to ready change,medium may have changedPermanent write protectPersistent write protectAssociated write protectLogical unit software write protectedHardware write protectedWrite protectedCopy segment granularity violationInvalid operation for copy source or destinationInline data length exceededUnexpected inexact segmentUnsupported segment descriptor type codeToo many segment descriptorsUnsupported target descriptor type codeToo many target descriptorsData decryption errorInvalid release of persistent reservationThreshold parameters not supportedParameter value invalidParameter not supportedInvalid field in parameter listLogical unit not supportedCDB decryption errorInvalid field in cdbIllegal function (use 20 00,24 00,or 26 00)Invalid element addressLogical block address out of rangeInvalid command operation codePartial defect list transferRecovered id with ecc correctionMiscompare during verify operationGrown defect list not foundPrimary defect list not foundDefect list not foundSynchronous data transfer errorParameter list length errorDefect list error in grown listDefect list error in primary listDefect list not availableDefect list errorRecovered data with ecc - data rewrittenRecovered data - recommend rewriteRecovered data - recommend reassignmentRecovered data with L-ECRecovered data with CIRCRecovered data - data auto-reallocatedRecovered data with error corr. & retries appliedRecovered data with error correction appliedRecovered data without ecc - data rewrittenRecovered data without ecc - recommend rewriteRecovered data without ecc - recommend reassignmentRecovered data without ecc - data auto-reallocatedRecovered data using previous sector idRecovered data with retries and/or circ appliedRecovered data with negative head offsetRecovered data with positive head offsetRecovered data with retriesRecovered data with no error correction appliedData sync error - recommend reassignmentData sync error - data auto-reallocatedData sync error - recommend rewriteData sync error - data rewrittenData synchronization mark errorPositioning error detected by read of mediumMechanical positioning errorRandom positioning errorRecord not found - data auto-reallocatedRecord not found - recommend reassignmentBlock sequence errorEnd-of-data not foundFilemark or setmark not foundRecord not foundRecorded entity not foundAddress mark not found for data fieldAddress mark not found for id fieldRead error - loss of streamingError reading ISRC numberError reading UPC/EAN numberCannot decompress using declared algorithmDe-compression CRC errorUnrecovered read error - recommend rewrite the dataUnrecovered read error - recommend reassignmentMiscorrected errorNo gap foundIncomplete block readData re-synchronization errorCIRC unrecovered errorL-EC uncorrectable errorUnrecovered read error - auto reallocate failedMultiple read errorsError too long to correctRead retries exhaustedUnrecovered read errorId CRC or ECC errorWrite error - padding blocks addedWrite error - loss of streamingWrite error - recovery failedWrite error - recovery neededBlock not compressibleData expansion occurred during compressionCompression check miscompare errorWrite error - recommend reassignmentWrite error - auto reallocation failedWrite error - recovered with auto reallocationWrite errorWarning - enclosure degradedWarning - specified temperature exceededWarningError log overflowHead select faultSpindle servo failureFocus servo failureTracking servo failureTrack following errorUnreachable copy targetLogical unit communication CRC error (Ultra-DMA/32)Logical unit communication parity errorLogical unit communication time-outLogical unit communication failureMultiple peripheral devices selectedNo reference position foundLogical unit does not respond to selectionLogical unit not ready,self-test in progressLogical unit not ready,long write in progressLogical unit not ready,operation in progressLogical unit not ready,recalculation in progressLogical unit not ready,rebuild in progressLogical unit not ready,format in progressLogical unit not ready,manual intervention requiredLogical unit not ready,initializing cmd. requiredLogical unit is in process of becoming readyLogical unit not ready,cause not reportableExcessive write errorsNo write currentPeripheral device write faultNo seek completeNo index/sector signalCleaning requestedOperation in progressNo current audio status to returnAudio play operation stopped due to errorAudio play operation successfully completedAudio play operation pausedAudio play operation in progressI/O process terminatedEnd-of-data detectedBeginning-of-partition/medium detectedSetmark detectedEnd-of-partition/medium detectedFilemark detectedNo additional sense informationKey=15MiscompareVolume OverflowEqualAborted CommandCopy AbortedKey=9Blank CheckData ProtectUnit AttentionIllegal RequestHardware ErrorMedium ErrorNot ReadyRecovered ErrorNoneInfo fld=0x%x (nonstd), FMK EOM ILI CurrentDeferredInvalid%s%s: sense key %s
Additional sense indicates %s
Additional sense indicates %s%s: old sense key %s
%s%s: sns = %2x %2x
Non-extended sense class %d code 0x%0x
Release RecoveryInitiate RecoveryClear QueueAbort TagBus device resetLinked Command Complete w/flagLinked Command CompleteMessage Parity ErrorNopMessage RejectAbortInitiator ErrorDisconnectRestore PointersSave PointersCommand CompleteOrdered Queue TagIgnore Wide ResidueHead of Queue TagSimple Queue TagWide Data Transfer RequestSCSI-I Extended IdentifySynchronous Data Transfer Reques 

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ifeq (-D__KERNEL__ -I/home/me/kernel/linux/include -Wall -Wstrict-prototypes -Wno-trigraphs -O2 -fomit-frame-pointer -fno-strict-aliasing -fno-common -pipe -mpreferred-stack-boundary=2 -march=i686,$(strip $(subst $(comma),:,$(CFLAGS) $(EXTRA_CFLAGS) $(CFLAGS_constants.o))))
FILES_FLAGS_UP_TO_DATE += constants.o
endif
VERSION = 2
PATCHLEVEL = 4
SUBLEVEL = 19
EXTRAVERSION = -pre5-ac3

KERNELRELEASE=$(VERSION).$(PATCHLEVEL).$(SUBLEVEL)$(EXTRAVERSION)

# SUBARCH tells the usermode build what the underlying arch is.  That is set
# first, and if a usermode build is happening, the "ARCH=um" on the command
# line overrides the setting of ARCH below.  If a native build is happening,
# then ARCH is assigned, getting whatever value it gets normally, and 
# SUBARCH is subsequently ignored.

SUBARCH := $(shell uname -m | sed -e s/i.86/i386/ -e s/sun4u/sparc64/ -e s/arm.*/arm/ -e s/sa110/arm/)
ARCH := $(SUBARCH)

KERNELPATH=kernel-$(shell echo $(KERNELRELEASE) | sed -e "s/-//g")

CONFIG_SHELL := $(shell if [ -x "$$BASH" ]; then echo $$BASH; \
	  else if [ -x /bin/bash ]; then echo /bin/bash; \
	  else echo sh; fi ; fi)
TOPDIR	:= $(shell /bin/pwd)

HPATH   	= $(TOPDIR)/include
FINDHPATH	= $(HPATH)/asm $(HPATH)/linux $(HPATH)/scsi $(HPATH)/net

HOSTCC  	= gcc
HOSTCFLAGS	= -Wall -Wstrict-prototypes -O2 -fomit-frame-pointer

CROSS_COMPILE 	=

#
# Include the make variables (CC, etc...)
#

AS		= $(CROSS_COMPILE)as
LD		= $(CROSS_COMPILE)ld
CC		= $(CROSS_COMPILE)gcc
CPP		= $(CC) -E
AR		= $(CROSS_COMPILE)ar
NM		= $(CROSS_COMPILE)nm
STRIP		= $(CROSS_COMPILE)strip
OBJCOPY		= $(CROSS_COMPILE)objcopy
OBJDUMP		= $(CROSS_COMPILE)objdump
MAKEFILES	= $(TOPDIR)/.config
GENKSYMS	= /sbin/genksyms
DEPMOD		= /sbin/depmod
MODFLAGS	= -DMODULE
CFLAGS_KERNEL	=
PERL		= perl

export	VERSION PATCHLEVEL SUBLEVEL EXTRAVERSION KERNELRELEASE ARCH \
	CONFIG_SHELL TOPDIR HPATH HOSTCC HOSTCFLAGS CROSS_COMPILE AS LD CC \
	CPP AR NM STRIP OBJCOPY OBJDUMP MAKE MAKEFILES GENKSYMS MODFLAGS PERL

all:	do-it-all

#
# Make "config" the default target if there is no configuration file or
# "depend" the target if there is no top-level dependency information.
#

ifeq (.config,$(wildcard .config))
include .config
ifeq (.depend,$(wildcard .depend))
include .depend
do-it-all:	Version vmlinux
else
CONFIGURATION = depend
do-it-all:	depend
endif
else
CONFIGURATION = config
do-it-all:	config
endif

#
# INSTALL_PATH specifies where to place the updated kernel and system map
# images.  Uncomment if you want to place them anywhere other than root.
#

#export	INSTALL_PATH=/boot

#
# INSTALL_MOD_PATH specifies a prefix to MODLIB for module directory
# relocations required by build roots.  This is not defined in the
# makefile but the arguement can be passed to make if needed.
#

MODLIB	:= $(INSTALL_MOD_PATH)/lib/modules/$(KERNELRELEASE)
export MODLIB

#
# standard CFLAGS
#

CPPFLAGS := -D__KERNEL__ -I$(HPATH)

CFLAGS := $(CPPFLAGS) -Wall -Wstrict-prototypes -Wno-trigraphs -O2 \
	  -fomit-frame-pointer -fno-strict-aliasing -fno-common
AFLAGS := -D__ASSEMBLY__ $(CPPFLAGS)

#
# ROOT_DEV specifies the default root-device when making the image.
# This can be either FLOPPY, CURRENT, /dev/xxxx or empty, in which case
# the default of FLOPPY is used by 'build'.
# This is i386 specific.
#

export ROOT_DEV = CURRENT

#
# If you want to preset the SVGA mode, uncomment the next line and
# set SVGA_MODE to whatever number you want.
# Set it to -DSVGA_MODE=NORMAL_VGA if you just want the EGA/VGA mode.
# The number is the same as you would ordinarily press at bootup.
# This is i386 specific.
#

export SVGA_MODE = -DSVGA_MODE=NORMAL_VGA

#
# If you want the RAM disk device, define this to be the size in blocks.
# This is i386 specific.
#

#export RAMDISK = -DRAMDISK=512

CORE_FILES	=kernel/kernel.o mm/mm.o fs/fs.o ipc/ipc.o
NETWORKS	=net/network.o

LIBS		=$(TOPDIR)/lib/lib.a
SUBDIRS		=kernel drivers mm fs net ipc lib

DRIVERS-n :=
DRIVERS-y :=
DRIVERS-m :=
DRIVERS-  :=

DRIVERS-$(CONFIG_ACPI) += drivers/acpi/acpi.o
DRIVERS-$(CONFIG_PARPORT) += drivers/parport/driver.o
DRIVERS-y += drivers/char/char.o \
	drivers/block/block.o \
	drivers/misc/misc.o \
	drivers/net/net.o \
	drivers/media/media.o
DRIVERS-$(CONFIG_AGP) += drivers/char/agp/agp.o
DRIVERS-$(CONFIG_DRM_NEW) += drivers/char/drm/drm.o
DRIVERS-$(CONFIG_DRM_OLD) += drivers/char/drm-4.0/drm.o
DRIVERS-$(CONFIG_NUBUS) += drivers/nubus/nubus.a
DRIVERS-$(CONFIG_NET_FC) += drivers/net/fc/fc.o
DRIVERS-$(CONFIG_APPLETALK) += drivers/net/appletalk/appletalk.o
DRIVERS-$(CONFIG_TR) += drivers/net/tokenring/tr.o
DRIVERS-$(CONFIG_WAN) += drivers/net/wan/wan.o
DRIVERS-$(CONFIG_ARCNET) += drivers/net/arcnet/arcnetdrv.o
DRIVERS-$(CONFIG_ATM) += drivers/atm/atm.o
DRIVERS-$(CONFIG_IDE) += drivers/ide/idedriver.o
DRIVERS-$(CONFIG_FC4) += drivers/fc4/fc4.a
DRIVERS-$(CONFIG_SCSI) += drivers/scsi/scsidrv.o
DRIVERS-$(CONFIG_FUSION_BOOT) += drivers/message/fusion/fusion.o
DRIVERS-$(CONFIG_IEEE1394) += drivers/ieee1394/ieee1394drv.o

ifneq ($(CONFIG_CD_NO_IDESCSI)$(CONFIG_BLK_DEV_IDECD)$(CONFIG_BLK_DEV_SR)$(CONFIG_PARIDE_PCD),)
DRIVERS-y += drivers/cdrom/driver.o
endif

DRIVERS-$(CONFIG_SOUND) += drivers/sound/sounddrivers.o
DRIVERS-$(CONFIG_PCI) += drivers/pci/driver.o
DRIVERS-$(CONFIG_MTD) += drivers/mtd/mtdlink.o
DRIVERS-$(CONFIG_PCMCIA) += drivers/pcmcia/pcmcia.o
DRIVERS-$(CONFIG_NET_PCMCIA) += drivers/net/pcmcia/pcmcia_net.o
DRIVERS-$(CONFIG_NET_WIRELESS) += drivers/net/wireless/wireless_net.o
DRIVERS-$(CONFIG_PCMCIA_CHRDEV) += drivers/char/pcmcia/pcmcia_char.o
DRIVERS-$(CONFIG_DIO) += drivers/dio/dio.a
DRIVERS-$(CONFIG_SBUS) += drivers/sbus/sbus_all.o
DRIVERS-$(CONFIG_ZORRO) += drivers/zorro/driver.o
DRIVERS-$(CONFIG_FC4) += drivers/fc4/fc4.a
DRIVERS-$(CONFIG_ALL_PPC) += drivers/macintosh/macintosh.o
DRIVERS-$(CONFIG_MAC) += drivers/macintosh/macintosh.o
DRIVERS-$(CONFIG_PNP) += drivers/pnp/pnp.o
DRIVERS-$(CONFIG_SGI_IP22) += drivers/sgi/sgi.a
DRIVERS-$(CONFIG_VT) += drivers/video/video.o
DRIVERS-$(CONFIG_PARIDE) += drivers/block/paride/paride.a
DRIVERS-$(CONFIG_HAMRADIO) += drivers/net/hamradio/hamradio.o
DRIVERS-$(CONFIG_TC) += drivers/tc/tc.a
DRIVERS-$(CONFIG_USB) += drivers/usb/usbdrv.o
DRIVERS-$(CONFIG_INPUT) += drivers/input/inputdrv.o
DRIVERS-$(CONFIG_I2O) += drivers/message/i2o/i2o.o
DRIVERS-$(CONFIG_IRDA) += drivers/net/irda/irda.o
DRIVERS-$(CONFIG_I2C) += drivers/i2c/i2c.o
DRIVERS-$(CONFIG_PHONE) += drivers/telephony/telephony.o
DRIVERS-$(CONFIG_MD) += drivers/md/mddev.o
DRIVERS-$(CONFIG_BLUEZ) += drivers/bluetooth/bluetooth.o
DRIVERS-$(CONFIG_HOTPLUG_PCI) += drivers/hotplug/vmlinux-obj.o
DRIVERS-$(CONFIG_ISDN_BOOL) += drivers/isdn/vmlinux-obj.o

DRIVERS-$(CONFIG_SENSORS) += drivers/sensors/sensor.o
DRIVERS := $(DRIVERS-y)


# files removed with 'make clean'
CLEAN_FILES = \
	kernel/ksyms.lst include/linux/compile.h \
	vmlinux System.map \
	.tmp* \
	scripts/mkconfigs kernel/configs.c kernel/configs.o \
	drivers/char/consolemap_deftbl.c drivers/video/promcon_tbl.c \
	drivers/char/conmakehash \
	drivers/char/drm/*-mod.c \
	drivers/pci/devlist.h drivers/pci/classlist.h drivers/pci/gen-devlist \
	drivers/zorro/devlist.h drivers/zorro/gen-devlist \
	drivers/sound/bin2hex drivers/sound/hex2hex \
	drivers/atm/fore200e_mkfirm drivers/atm/{pca,sba}*{.bin,.bin1,.bin2} \
	drivers/scsi/aic7xxx/aicasm/aicasm_gram.c \
	drivers/scsi/aic7xxx/aicasm/aicasm_scan.c \
	drivers/scsi/aic7xxx/aicasm/y.tab.h \
	drivers/scsi/aic7xxx/aicasm/aicasm \
	drivers/scsi/53c700_d.h \
	net/khttpd/make_times_h \
	net/khttpd/times.h \
	submenu*
# directories removed with 'make clean'
CLEAN_DIRS = \
	modules

# files removed with 'make mrproper'
MRPROPER_FILES = \
	include/linux/autoconf.h include/linux/version.h \
	drivers/net/hamradio/soundmodem/sm_tbl_{afsk1200,afsk2666,fsk9600}.h \
	drivers/net/hamradio/soundmodem/sm_tbl_{hapn4800,psk4800}.h \
	drivers/net/hamradio/soundmodem/sm_tbl_{afsk2400_7,afsk2400_8}.h \
	drivers/net/hamradio/soundmodem/gentbl \
	drivers/sound/*_boot.h drivers/sound/.*.boot \
	drivers/sound/msndinit.c \
	drivers/sound/msndperm.c \
	drivers/sound/pndsperm.c \
	drivers/sound/pndspini.c \
	drivers/atm/fore200e_*_fw.c drivers/atm/.fore200e_*.fw \
	.version .config* config.in config.old \
	scripts/tkparse scripts/kconfig.tk scripts/kconfig.tmp \
	scripts/lxdialog/*.o scripts/lxdialog/lxdialog \
	.menuconfig.log \
	include/asm \
	.hdepend scripts/mkdep scripts/split-include scripts/docproc \
	$(TOPDIR)/include/linux/modversions.h \
	scripts/mkconfigs kernel/configs.c kernel/configs.o \
	kernel.spec

# directories removed with 'make mrproper'
MRPROPER_DIRS = \
	include/config \
	$(TOPDIR)/include/linux/modules


include arch/$(ARCH)/Makefile

export	CPPFLAGS CFLAGS CFLAGS_KERNEL AFLAGS AFLAGS_KERNEL

export	NETWORKS DRIVERS LIBS HEAD LDFLAGS LINKFLAGS MAKEBOOT ASFLAGS

.S.s:
	$(CPP) $(AFLAGS) $(AFLAGS_KERNEL) -traditional -o $*.s $<
.S.o:
	$(CC) $(AFLAGS) $(AFLAGS_KERNEL) -traditional -c -o $*.o $<

Version: dummy
	@rm -f include/linux/compile.h

boot: vmlinux
	@$(MAKE) CFLAGS="$(CFLAGS) $(CFLAGS_KERNEL)" -C arch/$(ARCH)/boot

vmlinux: include/linux/version.h $(CONFIGURATION) init/main.o init/version.o init/do_mounts.o linuxsubdirs
	$(LD) $(LINKFLAGS) $(HEAD) init/main.o init/version.o init/do_mounts.o \
		--start-group \
		$(CORE_FILES) \
		$(DRIVERS) \
		$(NETWORKS) \
		$(LIBS) \
		--end-group \
		-o vmlinux
	$(NM) vmlinux | grep -v '\(compiled\)\|\(\.o$$\)\|\( [aUw] \)\|\(\.\.ng$$\)\|\(LASH[RL]DI\)' | sort > System.map

symlinks:
	rm -f include/asm
	( cd include ; ln -sf asm-$(ARCH) asm)
	@if [ ! -d include/linux/modules ]; then \
		mkdir include/linux/modules; \
	fi

oldconfig: symlinks
	$(CONFIG_SHELL) scripts/Configure -d arch/$(ARCH)/config.in

xconfig: symlinks
	$(MAKE) -C scripts kconfig.tk
	wish -f scripts/kconfig.tk

menuconfig: include/linux/version.h symlinks
	$(MAKE) -C scripts/lxdialog all
	$(CONFIG_SHELL) scripts/Menuconfig arch/$(ARCH)/config.in

config: symlinks
	$(CONFIG_SHELL) scripts/Configure arch/$(ARCH)/config.in

include/config/MARKER: scripts/split-include include/linux/autoconf.h
	scripts/split-include include/linux/autoconf.h include/config
	@ touch include/config/MARKER

linuxsubdirs: $(patsubst %, _dir_%, $(SUBDIRS))

$(patsubst %, _dir_%, $(SUBDIRS)) : dummy include/linux/version.h include/config/MARKER
	$(MAKE) CFLAGS="$(CFLAGS) $(CFLAGS_KERNEL)" -C $(patsubst _dir_%, %, $@)

$(TOPDIR)/include/linux/version.h: include/linux/version.h
$(TOPDIR)/include/linux/compile.h: include/linux/compile.h

newversion:
	. scripts/mkversion > .tmpversion
	@mv -f .tmpversion .version

include/linux/compile.h: $(CONFIGURATION) include/linux/version.h newversion
	@echo -n \#define UTS_VERSION \"\#`cat .version` > .ver
	@if [ -n "$(CONFIG_SMP)" ] ; then echo -n " SMP" >> .ver; fi
	@if [ -f .name ]; then  echo -n \-`cat .name` >> .ver; fi
	@echo ' '`date`'"' >> .ver
	@echo \#define LINUX_COMPILE_TIME \"`date +%T`\" >> .ver
	@echo \#define LINUX_COMPILE_BY \"`whoami`\" >> .ver
	@echo \#define LINUX_COMPILE_HOST \"`hostname`\" >> .ver
	@if [ -x /bin/dnsdomainname ]; then \
	   echo \#define LINUX_COMPILE_DOMAIN \"`dnsdomainname`\"; \
	 elif [ -x /bin/domainname ]; then \
	   echo \#define LINUX_COMPILE_DOMAIN \"`domainname`\"; \
	 else \
	   echo \#define LINUX_COMPILE_DOMAIN ; \
	 fi >> .ver
	@echo \#define LINUX_COMPILER \"`$(CC) $(CFLAGS) -v 2>&1 | tail -1`\" >> .ver
	@mv -f .ver $@

include/linux/version.h: ./Makefile
	@echo \#define UTS_RELEASE \"$(KERNELRELEASE)\" > .ver
	@echo \#define LINUX_VERSION_CODE `expr $(VERSION) \\* 65536 + $(PATCHLEVEL) \\* 256 + $(SUBLEVEL)` >> .ver
	@echo '#define KERNEL_VERSION(a,b,c) (((a) << 16) + ((b) << 8) + (c))' >>.ver
	@mv -f .ver $@

comma	:= ,

init/version.o: init/version.c include/linux/compile.h include/config/MARKER
	$(CC) $(CFLAGS) $(CFLAGS_KERNEL) -DUTS_MACHINE='"$(ARCH)"' -DKBUILD_BASENAME=$(subst $(comma),_,$(subst -,_,$(*F))) -c -o init/version.o init/version.c

init/main.o: init/main.c include/config/MARKER
	$(CC) $(CFLAGS) $(CFLAGS_KERNEL) $(PROFILING) -DKBUILD_BASENAME=$(subst $(comma),_,$(subst -,_,$(*F))) -c -o $*.o $<

init/do_mounts.o: init/do_mounts.c include/config/MARKER
	$(CC) $(CFLAGS) $(CFLAGS_KERNEL) $(PROFILING) -DKBUILD_BASENAME=$(subst $(comma),_,$(subst -,_,$(*F))) -c -o $*.o $<

fs lib mm ipc kernel drivers net: dummy
	$(MAKE) CFLAGS="$(CFLAGS) $(CFLAGS_KERNEL)" $(subst $@, _dir_$@, $@)

TAGS: dummy
	etags `find include/asm-$(ARCH) -name '*.h'`
	find include -type d \( -name "asm-*" -o -name config \) -prune -o -name '*.h' -print | xargs etags -a
	find $(SUBDIRS) init -name '*.[ch]' | xargs etags -a

# Exuberant ctags works better with -I
tags: dummy
	CTAGSF=`ctags --version | grep -i exuberant >/dev/null && echo "-I __initdata,__exitdata,EXPORT_SYMBOL,EXPORT_SYMBOL_NOVERS"`; \
	ctags $$CTAGSF `find include/asm-$(ARCH) -name '*.h'` && \
	find include -type d \( -name "asm-*" -o -name config \) -prune -o -name '*.h' -print | xargs ctags $$CTAGSF -a && \
	find $(SUBDIRS) init -name '*.[ch]' | xargs ctags $$CTAGSF -a

ifdef CONFIG_MODULES
ifdef CONFIG_MODVERSIONS
MODFLAGS += -DMODVERSIONS -include $(HPATH)/linux/modversions.h
endif

.PHONY: modules
modules: $(patsubst %, _mod_%, $(SUBDIRS))

.PHONY: $(patsubst %, _mod_%, $(SUBDIRS))
$(patsubst %, _mod_%, $(SUBDIRS)) : include/linux/version.h include/config/MARKER
	$(MAKE) -C $(patsubst _mod_%, %, $@) CFLAGS="$(CFLAGS) $(MODFLAGS)" MAKING_MODULES=1 modules

.PHONY: modules_install
modules_install: _modinst_ $(patsubst %, _modinst_%, $(SUBDIRS)) _modinst_post

.PHONY: _modinst_
_modinst_:
	@rm -rf $(MODLIB)/kernel
	@rm -f $(MODLIB)/build
	@mkdir -p $(MODLIB)/kernel
	@ln -s $(TOPDIR) $(MODLIB)/build

# If System.map exists, run depmod.  This deliberately does not have a
# dependency on System.map since that would run the dependency tree on
# vmlinux.  This depmod is only for convenience to give the initial
# boot a modules.dep even before / is mounted read-write.  However the
# boot script depmod is the master version.
ifeq "$(strip $(INSTALL_MOD_PATH))" ""
depmod_opts	:=
else
depmod_opts	:= -b $(INSTALL_MOD_PATH) -r
endif
.PHONY: _modinst_post
_modinst_post: _modinst_post_pcmcia
	if [ -r System.map ]; then $(DEPMOD) -ae -F System.map $(depmod_opts) $(KERNELRELEASE); fi

# Backwards compatibilty symlinks for people still using old versions
# of pcmcia-cs with hard coded pathnames on insmod.  Remove
# _modinst_post_pcmcia for kernel 2.4.1.
.PHONY: _modinst_post_pcmcia
_modinst_post_pcmcia:
	cd $(MODLIB); \
	mkdir -p pcmcia; \
	find kernel -path '*/pcmcia/*' -name '*.o' | xargs -i -r ln -sf ../{} pcmcia

.PHONY: $(patsubst %, _modinst_%, $(SUBDIRS))
$(patsubst %, _modinst_%, $(SUBDIRS)) :
	$(MAKE) -C $(patsubst _modinst_%, %, $@) modules_install

# modules disabled....

else
modules modules_install: dummy
	@echo
	@echo "The present kernel configuration has modules disabled."
	@echo "Type 'make config' and enable loadable module support."
	@echo "Then build a kernel with module support enabled."
	@echo
	@exit 1
endif

clean:	archclean
	find . \( -name '*.[oas]' -o -name core -o -name '.*.flags' \) -type f -print \
		| grep -v lxdialog/ | xargs rm -f
	rm -f $(CLEAN_FILES)
	rm -rf $(CLEAN_DIRS)
	$(MAKE) -C Documentation/DocBook clean

mrproper: clean archmrproper
	find . \( -size 0 -o -name .depend \) -type f -print | xargs rm -f
	rm -f $(MRPROPER_FILES)
	rm -rf $(MRPROPER_DIRS)
	$(MAKE) -C Documentation/DocBook mrproper

distclean: mrproper
	rm -f core `find . \( -not -type d \) -and \
		\( -name '*.orig' -o -name '*.rej' -o -name '*~' \
		-o -name '*.bak' -o -name '#*#' -o -name '.*.orig' \
		-o -name '.*.rej' -o -name '.SUMS' -o -size 0 \) -type f -print` TAGS tags

backup: mrproper
	cd .. && tar cf - linux/ | gzip -9 > backup.gz
	sync

sgmldocs: 
	chmod 755 $(TOPDIR)/scripts/docgen
	chmod 755 $(TOPDIR)/scripts/gen-all-syms
	chmod 755 $(TOPDIR)/scripts/kernel-doc
	$(MAKE) -C $(TOPDIR)/Documentation/DocBook books

psdocs: sgmldocs
	$(MAKE) -C Documentation/DocBook ps

pdfdocs: sgmldocs
	$(MAKE) -C Documentation/DocBook pdf

htmldocs: sgmldocs
	$(MAKE) -C Documentation/DocBook html

sums:
	find . -type f -print | sort | xargs sum > .SUMS

dep-files: scripts/mkdep archdep include/linux/version.h
	scripts/mkdep -- init/*.c > .depend
	scripts/mkdep -- `find $(FINDHPATH) -name SCCS -prune -o -follow -name \*.h ! -name modversions.h -print` > .hdepend
	$(MAKE) $(patsubst %,_sfdep_%,$(SUBDIRS)) _FASTDEP_ALL_SUB_DIRS="$(SUBDIRS)"
ifdef CONFIG_MODVERSIONS
	$(MAKE) update-modverfile
endif

ifdef CONFIG_MODVERSIONS
MODVERFILE := $(TOPDIR)/include/linux/modversions.h
else
MODVERFILE :=
endif
export	MODVERFILE

depend dep: dep-files

checkconfig:
	find * -name '*.[hcS]' -type f -print | sort | xargs $(PERL) -w scripts/checkconfig.pl

checkhelp:
	find * -name [cC]onfig.in -print | sort | xargs $(PERL) -w scripts/checkhelp.pl

checkincludes:
	find * -name '*.[hcS]' -type f -print | sort | xargs $(PERL) -w scripts/checkincludes.pl

ifdef CONFIGURATION
..$(CONFIGURATION):
	@echo
	@echo "You have a bad or nonexistent" .$(CONFIGURATION) ": running 'make" $(CONFIGURATION)"'"
	@echo
	$(MAKE) $(CONFIGURATION)
	@echo
	@echo "Successful. Try re-making (ignore the error that follows)"
	@echo
	exit 1

#dummy: ..$(CONFIGURATION)
dummy:

else

dummy:

endif

include Rules.make

#
# This generates dependencies for the .h files.
#

scripts/mkdep: scripts/mkdep.c
	$(HOSTCC) $(HOSTCFLAGS) -o scripts/mkdep scripts/mkdep.c

scripts/split-include: scripts/split-include.c
	$(HOSTCC) $(HOSTCFLAGS) -o scripts/split-include scripts/split-include.c

#
# RPM target
#
#	If you do a make spec before packing the tarball you can rpm -ta it
#
spec:
	. scripts/mkspec >kernel.spec

#
#	Build a tar ball, generate an rpm from it and pack the result
#	There arw two bits of magic here
#	1) The use of /. to avoid tar packing just the symlink
#	2) Removing the .dep files as they have source paths in them that
#	   will become invalid
#
rpm:	clean spec
	find . \( -size 0 -o -name .depend -o -name .hdepend \) -type f -print | xargs rm -f
	set -e; \
	cd $(TOPDIR)/.. ; \
	ln -sf $(TOPDIR) $(KERNELPATH) ; \
	tar -cvz --exclude CVS -f $(KERNELPATH).tar.gz $(KERNELPATH)/. ; \
	rm $(KERNELPATH) ; \
	cd $(TOPDIR) ; \
	. scripts/mkversion > .version ; \
	rpm -ta $(TOPDIR)/../$(KERNELPATH).tar.gz ; \
	rm $(TOPDIR)/../$(KERNELPATH).tar.gz
lobal CONFIG_ISDN_CAPI_CAPIFS
	if {($CONFIG_NET != 0) && ($CONFIG_ISDN != 0) && ($CONFIG_ISDN_CAPI != 0) && ($CONFIG_ISDN_CAPI_MIDDLEWARE == 1) && ($CONFIG_ISDN_CAPI_CAPIFS_BOOL == 1)} then {write_tristate $cfg $autocfg CONFIG_ISDN_CAPI_CAPIFS $CONFIG_ISDN_CAPI_CAPI20 [list $notmod] 2 }
	if {($CONFIG_NET != 0) && ($CONFIG_ISDN != 0) && ($CONFIG_ISDN_CAPI != 0) && ($CONFIG_ISDN_CAPI_MIDDLEWARE == 1) && ($CONFIG_ISDN_CAPI_CAPIFS_BOOL != 1)} then {write_tristate $cfg $autocfg CONFIG_ISDN_CAPI_CAPIFS $CONSTANT_N [list $notmod] 2 }
	global CONFIG_ISDN_CAPI_CAPIDRV
	if {($CONFIG_NET != 0) && ($CONFIG_ISDN != 0) && ($CONFIG_ISDN_CAPI != 0) && ($CONFIG_ISDN_CAPI == 1 || $CONFIG_ISDN_CAPI == 2 || $CONFIG_ISDN_CAPI == 4) && ($CONFIG_ISDN == 1 || $CONFIG_ISDN == 2 || $CONFIG_ISDN == 4)} then {write_tristate $cfg $autocfg CONFIG_ISDN_CAPI_CAPIDRV $CONFIG_ISDN_CAPI_CAPIDRV [list $CONFIG_ISDN_CAPI $CONFIG_ISDN] 2 }
	global CONFIG_ISDN_DRV_AVMB1_B1ISA
	if {($CONFIG_NET != 0) && ($CONFIG_ISDN != 0) && ($CONFIG_ISDN_CAPI != 0) && ($CONFIG_ISDN_CAPI == 1 || $CONFIG_ISDN_CAPI == 2 || $CONFIG_ISDN_CAPI == 4)} then {write_tristate $cfg $autocfg CONFIG_ISDN_DRV_AVMB1_B1ISA $CONFIG_ISDN_DRV_AVMB1_B1ISA [list $CONFIG_ISDN_CAPI] 2 }
	global CONFIG_ISDN_DRV_AVMB1_B1PCI
	if {($CONFIG_NET != 0) && ($CONFIG_ISDN != 0) && ($CONFIG_ISDN_CAPI != 0) && ($CONFIG_ISDN_CAPI == 1 || $CONFIG_ISDN_CAPI == 2 || $CONFIG_ISDN_CAPI == 4) && ($CONFIG_PCI == 1 || $CONFIG_PCI == 2 || $CONFIG_PCI == 4)} then {write_tristate $cfg $autocfg CONFIG_ISDN_DRV_AVMB1_B1PCI $CONFIG_ISDN_DRV_AVMB1_B1PCI [list $CONFIG_ISDN_CAPI $CONFIG_PCI] 2 }
	global CONFIG_ISDN_DRV_AVMB1_B1PCIV4
	if {($CONFIG_NET != 0) && ($CONFIG_ISDN != 0) && ($CONFIG_ISDN_CAPI != 0) && ($CONFIG_ISDN_DRV_AVMB1_B1PCI == 1 || $CONFIG_ISDN_DRV_AVMB1_B1PCI == 2 || $CONFIG_ISDN_DRV_AVMB1_B1PCI == 4)} then {write_tristate $cfg $autocfg CONFIG_ISDN_DRV_AVMB1_B1PCIV4 $CONFIG_ISDN_DRV_AVMB1_B1PCIV4 [list $CONFIG_ISDN_DRV_AVMB1_B1PCI] 1 }
	global CONFIG_ISDN_DRV_AVMB1_T1ISA
	if {($CONFIG_NET != 0) && ($CONFIG_ISDN != 0) && ($CONFIG_ISDN_CAPI != 0) && ($CONFIG_ISDN_CAPI == 1 || $CONFIG_ISDN_CAPI == 2 || $CONFIG_ISDN_CAPI == 4)} then {write_tristate $cfg $autocfg CONFIG_ISDN_DRV_AVMB1_T1ISA $CONFIG_ISDN_DRV_AVMB1_T1ISA [list $CONFIG_ISDN_CAPI] 2 }
	global CONFIG_ISDN_DRV_AVMB1_B1PCMCIA
	if {($CONFIG_NET != 0) && ($CONFIG_ISDN != 0) && ($CONFIG_ISDN_CAPI != 0) && ($CONFIG_ISDN_CAPI == 1 || $CONFIG_ISDN_CAPI == 2 || $CONFIG_ISDN_CAPI == 4)} then {write_tristate $cfg $autocfg CONFIG_ISDN_DRV_AVMB1_B1PCMCIA $CONFIG_ISDN_DRV_AVMB1_B1PCMCIA [list $CONFIG_ISDN_CAPI] 2 }
	global CONFIG_ISDN_DRV_AVMB1_AVM_CS
	if {($CONFIG_NET != 0) && ($CONFIG_ISDN != 0) && ($CONFIG_ISDN_CAPI != 0) && ($CONFIG_ISDN_DRV_AVMB1_B1PCMCIA == 1 || $CONFIG_ISDN_DRV_AVMB1_B1PCMCIA == 2 || $CONFIG_ISDN_DRV_AVMB1_B1PCMCIA == 4) && ($CONFIG_PCMCIA == 1 || $CONFIG_PCMCIA == 2 || $CONFIG_PCMCIA == 4)} then {write_tristate $cfg $autocfg CONFIG_ISDN_DRV_AVMB1_AVM_CS $CONFIG_ISDN_DRV_AVMB1_AVM_CS [list $CONFIG_ISDN_DRV_AVMB1_B1PCMCIA $CONFIG_PCMCIA] 2 }
	global CONFIG_ISDN_DRV_AVMB1_T1PCI
	if {($CONFIG_NET != 0) && ($CONFIG_ISDN != 0) && ($CONFIG_ISDN_CAPI != 0) && ($CONFIG_ISDN_CAPI == 1 || $CONFIG_ISDN_CAPI == 2 || $CONFIG_ISDN_CAPI == 4) && ($CONFIG_PCI == 1 || $CONFIG_PCI == 2 || $CONFIG_PCI == 4)} then {write_tristate $cfg $autocfg CONFIG_ISDN_DRV_AVMB1_T1PCI $CONFIG_ISDN_DRV_AVMB1_T1PCI [list $CONFIG_ISDN_CAPI $CONFIG_PCI] 2 }
	global CONFIG_ISDN_DRV_AVMB1_C4
	if {($CONFIG_NET != 0) && ($CONFIG_ISDN != 0) && ($CONFIG_ISDN_CAPI != 0) && ($CONFIG_ISDN_CAPI == 1 || $CONFIG_ISDN_CAPI == 2 || $CONFIG_ISDN_CAPI == 4) && ($CONFIG_PCI == 1 || $CONFIG_PCI == 2 || $CONFIG_PCI == 4)} then {write_tristate $cfg $autocfg CONFIG_ISDN_DRV_AVMB1_C4 $CONFIG_ISDN_DRV_AVMB1_C4 [list $CONFIG_ISDN_CAPI $CONFIG_PCI] 2 }
	global CONFIG_HYSDN
	if {($CONFIG_NET != 0) && ($CONFIG_ISDN != 0) && ($CONFIG_PROC_FS == 1 || $CONFIG_PROC_FS == 2 || $CONFIG_PROC_FS == 4)} then {write_tristate $cfg $autocfg CONFIG_HYSDN $CONFIG_HYSDN [list $CONSTANT_M $CONFIG_PROC_FS] 2 }
	global CONFIG_HYSDN_CAPI
	if {($CONFIG_NET != 0) && ($CONFIG_ISDN != 0) && ($CONFIG_HYSDN == 1 || $CONFIG_HYSDN == 2 || $CONFIG_HYSDN == 4) && ($CONFIG_ISDN_CAPI == 1 || $CONFIG_ISDN_CAPI == 2 || $CONFIG_ISDN_CAPI == 4)} then {write_tristate $cfg $autocfg CONFIG_HYSDN_CAPI $CONFIG_HYSDN_CAPI [list $CONFIG_HYSDN $CONFIG_ISDN_CAPI] 1 }
	write_comment $cfg $autocfg "Old CD-ROM drivers (not SCSI, not IDE)"
	global CONFIG_CD_NO_IDESCSI
	write_tristate $cfg $autocfg CONFIG_CD_NO_IDESCSI $CONFIG_CD_NO_IDESCSI [list $notmod] 2
	global CONFIG_AZTCD
	if {($CONFIG_CD_NO_IDESCSI != 0)} then {write_tristate $cfg $autocfg CONFIG_AZTCD $CONFIG_AZTCD [list $notmod] 2 }
	global CONFIG_GSCD
	if {($CONFIG_CD_NO_IDESCSI != 0)} then {write_tristate $cfg $autocfg CONFIG_GSCD $CONFIG_GSCD [list $notmod] 2 }
	global CONFIG_SBPCD
	if {($CONFIG_CD_NO_IDESCSI != 0)} then {write_tristate $cfg $autocfg CONFIG_SBPCD $CONFIG_SBPCD [list $notmod] 2 }
	global CONFIG_SBPCD2
	if {($CONFIG_CD_NO_IDESCSI != 0) && ($CONFIG_SBPCD == 1)} then {write_tristate $cfg $autocfg CONFIG_SBPCD2 $CONFIG_SBPCD2 [list $notmod] 2 }
	global CONFIG_SBPCD3
	if {($CONFIG_CD_NO_IDESCSI != 0) && ($CONFIG_SBPCD == 1) && ($CONFIG_SBPCD2 == 1)} then {write_tristate $cfg $autocfg CONFIG_SBPCD3 $CONFIG_SBPCD3 [list $notmod] 2 }
	global CONFIG_SBPCD4
	if {($CONFIG_CD_NO_IDESCSI != 0) && ($CONFIG_SBPCD == 1) && ($CONFIG_SBPCD2 == 1) && ($CONFIG_SBPCD3 == 1)} then {write_tristate $cfg $autocfg CONFIG_SBPCD4 $CONFIG_SBPCD4 [list $notmod] 2 }
	global CONFIG_MCD
	if {($CONFIG_CD_NO_IDESCSI != 0)} then {write_tristate $cfg $autocfg CONFIG_MCD $CONFIG_MCD [list $notmod] 2 }
	global CONFIG_MCD_IRQ
	if {($CONFIG_CD_NO_IDESCSI != 0) && ($CONFIG_MCD != 0)} then {write_int $cfg $autocfg CONFIG_MCD_IRQ $CONFIG_MCD_IRQ $notmod }
	global CONFIG_MCD_BASE
	if {($CONFIG_CD_NO_IDESCSI != 0) && ($CONFIG_MCD != 0)} then {write_hex $cfg $autocfg CONFIG_MCD_BASE $CONFIG_MCD_BASE $notmod }
	global CONFIG_MCDX
	if {($CONFIG_CD_NO_IDESCSI != 0)} then {write_tristate $cfg $autocfg CONFIG_MCDX $CONFIG_MCDX [list $notmod] 2 }
	global CONFIG_OPTCD
	if {($CONFIG_CD_NO_IDESCSI != 0)} then {write_tristate $cfg $autocfg CONFIG_OPTCD $CONFIG_OPTCD [list $notmod] 2 }
	global CONFIG_CM206
	if {($CONFIG_CD_NO_IDESCSI != 0)} then {write_tristate $cfg $autocfg CONFIG_CM206 $CONFIG_CM206 [list $notmod] 2 }
	global CONFIG_SJCD
	if {($CONFIG_CD_NO_IDESCSI != 0)} then {write_tristate $cfg $autocfg CONFIG_SJCD $CONFIG_SJCD [list $notmod] 2 }
	global CONFIG_ISP16_CDI
	if {($CONFIG_CD_NO_IDESCSI != 0)} then {write_tristate $cfg $autocfg CONFIG_ISP16_CDI $CONFIG_ISP16_CDI [list $notmod] 2 }
	global CONFIG_CDU31A
	if {($CONFIG_CD_NO_IDESCSI != 0)} then {write_tristate $cfg $autocfg CONFIG_CDU31A $CONFIG_CDU31A [list $notmod] 2 }
	global CONFIG_CDU535
	if {($CONFIG_CD_NO_IDESCSI != 0)} then {write_tristate $cfg $autocfg CONFIG_CDU535 $CONFIG_CDU535 [list $notmod] 2 }
	write_comment $cfg $autocfg "Input core support"
	global CONFIG_INPUT
	write_tristate $cfg $autocfg CONFIG_INPUT $CONFIG_INPUT [list $notmod] 2
	global CONFIG_INPUT_KEYBDEV
	if {($CONFIG_INPUT == 1 || $CONFIG_INPUT == 2 || $CONFIG_INPUT == 4)} then {write_tristate $cfg $autocfg CONFIG_INPUT_KEYBDEV $CONFIG_INPUT_KEYBDEV [list $CONFIG_INPUT] 2 }
	global CONFIG_INPUT_MOUSEDEV
	if {($CONFIG_INPUT == 1 || $CONFIG_INPUT == 2 || $CONFIG_INPUT == 4)} then {write_tristate $cfg $autocfg CONFIG_INPUT_MOUSEDEV $CONFIG_INPUT_MOUSEDEV [list $CONFIG_INPUT] 2 }
	global CONFIG_INPUT_MOUSEDEV_SCREEN_X
	if {($CONFIG_INPUT_MOUSEDEV != 0)} then {write_int $cfg $autocfg CONFIG_INPUT_MOUSEDEV_SCREEN_X $CONFIG_INPUT_MOUSEDEV_SCREEN_X $notmod }
	global CONFIG_INPUT_MOUSEDEV_SCREEN_Y
	if {($CONFIG_INPUT_MOUSEDEV != 0)} then {write_int $cfg $autocfg CONFIG_INPUT_MOUSEDEV_SCREEN_Y $CONFIG_INPUT_MOUSEDEV_SCREEN_Y $notmod }
	global CONFIG_INPUT_JOYDEV
	if {($CONFIG_INPUT == 1 || $CONFIG_INPUT == 2 || $CONFIG_INPUT == 4)} then {write_tristate $cfg $autocfg CONFIG_INPUT_JOYDEV $CONFIG_INPUT_JOYDEV [list $CONFIG_INPUT] 2 }
	global CONFIG_INPUT_EVDEV
	if {($CONFIG_INPUT == 1 || $CONFIG_INPUT == 2 || $CONFIG_INPUT == 4)} then {write_tristate $cfg $autocfg CONFIG_INPUT_EVDEV $CONFIG_INPUT_EVDEV [list $CONFIG_INPUT] 2 }
	write_comment $cfg $autocfg "Character devices"
	global CONFIG_VT
	write_tristate $cfg $autocfg CONFIG_VT $CONFIG_VT [list $notmod] 2
	global CONFIG_VT_CONSOLE
	if {($CONFIG_VT == 1)} then {write_tristate $cfg $autocfg CONFIG_VT_CONSOLE $CONFIG_VT_CONSOLE [list $notmod] 2 }
	write_tristate $cfg $autocfg CONFIG_SERIAL $CONFIG_SERIAL [list $notmod] 2
	global CONFIG_SERIAL_CONSOLE
	if {($CONFIG_SERIAL == 1)} then {write_tristate $cfg $autocfg CONFIG_SERIAL_CONSOLE $CONFIG_SERIAL_CONSOLE [list $notmod] 2 }
	global CONFIG_SERIAL_ACPI
	if {($CONFIG_ACPI == 1)} then {write_tristate $cfg $autocfg CONFIG_SERIAL_ACPI $CONFIG_SERIAL_ACPI [list $notmod] 2 }
	global CONFIG_SERIAL_EXTENDED
	if {($CONFIG_SERIAL == 1 || $CONFIG_SERIAL == 2 || $CONFIG_SERIAL == 4)} then {write_tristate $cfg $autocfg CONFIG_SERIAL_EXTENDED $CONFIG_SERIAL_EXTENDED [list $CONFIG_SERIAL] 1 }
	global CONFIG_SERIAL_MANY_PORTS
	if {($CONFIG_SERIAL_EXTENDED == 1)} then {write_tristate $cfg $autocfg CONFIG_SERIAL_MANY_PORTS $CONFIG_SERIAL_MANY_PORTS [list $notmod] 2 }
	global CONFIG_SERIAL_SHARE_IRQ
	if {($CONFIG_SERIAL_EXTENDED == 1)} then {write_tristate $cfg $autocfg CONFIG_SERIAL_SHARE_IRQ $CONFIG_SERIAL_SHARE_IRQ [list $notmod] 2 }
	global CONFIG_SERIAL_DETECT_IRQ
	if {($CONFIG_SERIAL_EXTENDED == 1)} then {write_tristate $cfg $autocfg CONFIG_SERIAL_DETECT_IRQ $CONFIG_SERIAL_DETECT_IRQ [list $notmod] 2 }
	global CONFIG_SERIAL_MULTIPORT
	if {($CONFIG_SERIAL_EXTENDED == 1)} then {write_tristate $cfg $autocfg CONFIG_SERIAL_MULTIPORT $CONFIG_SERIAL_MULTIPORT [list $notmod] 2 }
	global CONFIG_HUB6
	if {($CONFIG_SERIAL_EXTENDED == 1)} then {write_tristate $cfg $autocfg CONFIG_HUB6 $CONFIG_HUB6 [list $notmod] 2 }
	global CONFIG_SERIAL_NONSTANDARD
	write_tristate $cfg $autocfg CONFIG_SERIAL_NONSTANDARD $CONFIG_SERIAL_NONSTANDARD [list $notmod] 2
	global CONFIG_COMPUTONE
	if {($CONFIG_SERIAL_NONSTANDARD == 1)} then {write_tristate $cfg $autocfg CONFIG_COMPUTONE $CONFIG_COMPUTONE [list $notmod] 2 }
	global CONFIG_ROCKETPORT
	if {($CONFIG_SERIAL_NONSTANDARD == 1)} then {write_tristate $cfg $autocfg CONFIG_ROCKETPORT $CONFIG_ROCKETPORT [list $notmod] 2 }
	global CONFIG_CYCLADES
	if {($CONFIG_SERIAL_NONSTANDARD == 1)} then {write_tristate $cfg $autocfg CONFIG_CYCLADES $CONFIG_CYCLADES [list $notmod] 2 }
	global CONFIG_CYZ_INTR
	if {($CONFIG_SERIAL_NONSTANDARD == 1) && ($CONFIG_EXPERIMENTAL == 1 && $CONFIG_CYCLADES != 0)} then {write_tristate $cfg $autocfg CONFIG_CYZ_INTR $CONFIG_CYZ_INTR [list $notmod] 2 }
	global CONFIG_DIGIEPCA
	if {($CONFIG_SERIAL_NONSTANDARD == 1)} then {write_tristate $cfg $autocfg CONFIG_DIGIEPCA $CONFIG_DIGIEPCA [list $notmod] 2 }
	global CONFIG_DIGI
	if {($CONFIG_SERIAL_NONSTANDARD == 1) && ($CONFIG_DIGIEPCA == 0)} then {write_tristate $cfg $autocfg CONFIG_DIGI $CONFIG_DIGI [list $notmod] 2 }
	global CONFIG_ESPSERIAL
	if {($CONFIG_SERIAL_NONSTANDARD == 1)} then {write_tristate $cfg $autocfg CONFIG_ESPSERIAL $CONFIG_ESPSERIAL [list $notmod] 2 }
	global CONFIG_MOXA_INTELLIO
	if {($CONFIG_SERIAL_NONSTANDARD == 1)} then {write_tristate $cfg $autocfg CONFIG_MOXA_INTELLIO $CONFIG_MOXA_INTELLIO [list $notmod] 2 }
	global CONFIG_MOXA_SMARTIO
	if {($CONFIG_SERIAL_NONSTANDARD == 1)} then {write_tristate $cfg $autocfg CONFIG_MOXA_SMARTIO $CONFIG_MOXA_SMARTIO [list $notmod] 2 }
	global CONFIG_ISI
	if {($CONFIG_SERIAL_NONSTANDARD == 1) && ($CONFIG_EXPERIMENTAL == 1)} then {write_tristate $cfg $autocfg CONFIG_ISI $CONFIG_ISI [list $CONSTANT_M] 2 }
	global CONFIG_SYNCLINK
	if {($CONFIG_SERIAL_NONSTANDARD == 1)} then {write_tristate $cfg $autocfg CONFIG_SYNCLINK $CONFIG_SYNCLINK [list $notmod] 2 }
	global CONFIG_N_HDLC
	if {($CONFIG_SERIAL_NONSTANDARD == 1)} then {write_tristate $cfg $autocfg CONFIG_N_HDLC $CONFIG_N_HDLC [list $notmod] 2 }
	global CONFIG_RISCOM8
	if {($CONFIG_SERIAL_NONSTANDARD == 1)} then {write_tristate $cfg $autocfg CONFIG_RISCOM8 $CONFIG_RISCOM8 [list $notmod] 2 }
	global CONFIG_SPECIALIX
	if {($CONFIG_SERIAL_NONSTANDARD == 1)} then {write_tristate $cfg $autocfg CONFIG_SPECIALIX $CONFIG_SPECIALIX [list $notmod] 2 }
	global CONFIG_SPECIALIX_RTSCTS
	if {($CONFIG_SERIAL_NONSTANDARD == 1) && ($CONFIG_SPECIALIX != 0)} then {write_tristate $cfg $autocfg CONFIG_SPECIALIX_RTSCTS $CONFIG_SPECIALIX_RTSCTS [list $notmod] 2 }
	global CONFIG_SX
	if {($CONFIG_SERIAL_NONSTANDARD == 1)} then {write_tristate $cfg $autocfg CONFIG_SX $CONFIG_SX [list $notmod] 2 }
	global CONFIG_RIO
	if {($CONFIG_SERIAL_NONSTANDARD == 1)} then {write_tristate $cfg $autocfg CONFIG_RIO $CONFIG_RIO [list $notmod] 2 }
	global CONFIG_RIO_OLDPCI
	if {($CONFIG_SERIAL_NONSTANDARD == 1) && ($CONFIG_RIO != 0)} then {write_tristate $cfg $autocfg CONFIG_RIO_OLDPCI $CONFIG_RIO_OLDPCI [list $notmod] 2 }
	global CONFIG_STALDRV
	if {($CONFIG_SERIAL_NONSTANDARD == 1)} then {write_tristate $cfg $autocfg CONFIG_STALDRV $CONFIG_STALDRV [list $notmod] 2 }
	global CONFIG_STALLION
	if {($CONFIG_SERIAL_NONSTANDARD == 1) && ($CONFIG_STALDRV == 1)} then {write_tristate $cfg $autocfg CONFIG_STALLION $CONFIG_STALLION [list $notmod] 2 }
	global CONFIG_ISTALLION
	if {($CONFIG_SERIAL_NONSTANDARD == 1) && ($CONFIG_STALDRV == 1)} then {write_tristate $cfg $autocfg CONFIG_ISTALLION $CONFIG_ISTALLION [list $notmod] 2 }
	global CONFIG_A2232
	global CONFIG_ZORRO
	if {($CONFIG_EXPERIMENTAL == 1 && $CONFIG_ZORRO == 1)} then {write_tristate $cfg $autocfg CONFIG_A2232 $CONFIG_A2232 [list $notmod] 2 }
	global CONFIG_UNIX98_PTYS
	write_tristate $cfg $autocfg CONFIG_UNIX98_PTYS $CONFIG_UNIX98_PTYS [list $notmod] 2
	global CONFIG_UNIX98_PTY_COUNT
	if {($CONFIG_UNIX98_PTYS == 1)} then {write_int $cfg $autocfg CONFIG_UNIX98_PTY_COUNT $CONFIG_UNIX98_PTY_COUNT $notmod }
	global CONFIG_PRINTER
	if {($CONFIG_PARPORT != 0) && ($CONFIG_PARPORT == 1 || $CONFIG_PARPORT == 2 || $CONFIG_PARPORT == 4)} then {write_tristate $cfg $autocfg CONFIG_PRINTER $CONFIG_PRINTER [list $CONFIG_PARPORT] 2 }
	global CONFIG_LP_CONSOLE
	if {($CONFIG_PARPORT != 0) && ($CONFIG_PRINTER != 0)} then {write_tristate $cfg $autocfg CONFIG_LP_CONSOLE $CONFIG_LP_CONSOLE [list $notmod] 2 }
	global CONFIG_PPDEV
	if {($CONFIG_PARPORT != 0) && ($CONFIG_PARPORT == 1 || $CONFIG_PARPORT == 2 || $CONFIG_PARPORT == 4)} then {write_tristate $cfg $autocfg CONFIG_PPDEV $CONFIG_PPDEV [list $CONFIG_PARPORT] 2 }
	write_comment $cfg $autocfg "I2C support"
	global CONFIG_I2C
	write_tristate $cfg $autocfg CONFIG_I2C $CONFIG_I2C [list $notmod] 2
	global CONFIG_I2C_ALGOBIT
	if {($CONFIG_I2C != 0) && ($CONFIG_I2C == 1 || $CONFIG_I2C == 2 || $CONFIG_I2C == 4)} then {write_tristate $cfg $autocfg CONFIG_I2C_ALGOBIT $CONFIG_I2C_ALGOBIT [list $CONFIG_I2C] 2 }
	global CONFIG_I2C_BITLP
	if {($CONFIG_I2C != 0) && ($CONFIG_I2C_ALGOBIT != 0) && ($CONFIG_I2C_ALGOBIT == 1 || $CONFIG_I2C_ALGOBIT == 2 || $CONFIG_I2C_ALGOBIT == 4) && ($CONFIG_PARPORT == 1 || $CONFIG_PARPORT == 2 || $CONFIG_PARPORT == 4)} then {write_tristate $cfg $autocfg CONFIG_I2C_BITLP $CONFIG_I2C_BITLP [list $CONFIG_I2C_ALGOBIT $CONFIG_PARPORT] 2 }
	global CONFIG_I2C_BITELV
	if {($CONFIG_I2C != 0) && ($CONFIG_I2C_ALGOBIT != 0) && ($CONFIG_I2C_ALGOBIT == 1 || $CONFIG_I2C_ALGOBIT == 2 || $CONFIG_I2C_ALGOBIT == 4)} then {write_tristate $cfg $autocfg CONFIG_I2C_BITELV $CONFIG_I2C_BITELV [list $CONFIG_I2C_ALGOBIT] 2 }
	global CONFIG_I2C_BITVELLE
	if {($CONFIG_I2C != 0) && ($CONFIG_I2C_ALGOBIT != 0) && ($CONFIG_I2C_ALGOBIT == 1 || $CONFIG_I2C_ALGOBIT == 2 || $CONFIG_I2C_ALGOBIT == 4)} then {write_tristate $cfg $autocfg CONFIG_I2C_BITVELLE $CONFIG_I2C_BITVELLE [list $CONFIG_I2C_ALGOBIT] 2 }
	global CONFIG_I2C_ALGOPCF
	if {($CONFIG_I2C != 0) && ($CONFIG_I2C == 1 || $CONFIG_I2C == 2 || $CONFIG_I2C == 4)} then {write_tristate $cfg $autocfg CONFIG_I2C_ALGOPCF $CONFIG_I2C_ALGOPCF [list $CONFIG_I2C] 2 }
	global CONFIG_I2C_PCFISA
	if {($CONFIG_I2C != 0) && ($CONFIG_I2C_ALGOPCF != 0) && ($CONFIG_I2C_ALGOPCF == 1 || $CONFIG_I2C_ALGOPCF == 2 || $CONFIG_I2C_ALGOPCF == 4)} then {write_tristate $cfg $autocfg CONFIG_I2C_PCFISA $CONFIG_I2C_PCFISA [list $CONFIG_I2C_ALGOPCF] 2 }
	global CONFIG_I2C_MAINBOARD
	if {($CONFIG_I2C != 0)} then {write_tristate $cfg $autocfg CONFIG_I2C_MAINBOARD $CONFIG_I2C_MAINBOARD [list $notmod] 2 }
	global CONFIG_I2C_ALI1535
	if {($CONFIG_I2C != 0) && ($CONFIG_I2C_MAINBOARD == 1)} then {write_tristate $cfg $autocfg CONFIG_I2C_ALI1535 $CONFIG_I2C_ALI1535 [list $notmod] 2 }
	global CONFIG_I2C_ALI15X3
	if {($CONFIG_I2C != 0) && ($CONFIG_I2C_MAINBOARD == 1)} then {write_tristate $cfg $autocfg CONFIG_I2C_ALI15X3 $CONFIG_I2C_ALI15X3 [list $notmod] 2 }
	global CONFIG_I2C_HYDRA
	if {($CONFIG_I2C != 0) && ($CONFIG_I2C_MAINBOARD == 1) && ($CONFIG_I2C_ALGOBIT == 1 || $CONFIG_I2C_ALGOBIT == 2 || $CONFIG_I2C_ALGOBIT == 4)} then {write_tristate $cfg $autocfg CONFIG_I2C_HYDRA $CONFIG_I2C_HYDRA [list $CONFIG_I2C_ALGOBIT] 2 }
	global CONFIG_I2C_AMD756
	if {($CONFIG_I2C != 0) && ($CONFIG_I2C_MAINBOARD == 1)} then {write_tristate $cfg $autocfg CONFIG_I2C_AMD756 $CONFIG_I2C_AMD756 [list $notmod] 2 }
	global CONFIG_I2C_TSUNAMI
	if {($CONFIG_I2C != 0) && ($CONFIG_I2C_MAINBOARD == 1) && ($CONFIG_I2C_ALGOBIT == 1 || $CONFIG_I2C_ALGOBIT == 2 || $CONFIG_I2C_ALGOBIT == 4)} then {write_tristate $cfg $autocfg CONFIG_I2C_TSUNAMI $CONFIG_I2C_TSUNAMI [list $CONFIG_I2C_ALGOBIT] 2 }
	global CONFIG_I2C_I801
	if {($CONFIG_I2C != 0) && ($CONFIG_I2C_MAINBOARD == 1)} then {write_tristate $cfg $autocfg CONFIG_I2C_I801 $CONFIG_I2C_I801 [list $notmod] 2 }
	global CONFIG_I2C_I810
	if {($CONFIG_I2C != 0) && ($CONFIG_I2C_MAINBOARD == 1) && ($CONFIG_I2C_ALGOBIT == 1 || $CONFIG_I2C_ALGOBIT == 2 || $CONFIG_I2C_ALGOBIT == 4)} then {write_tristate $cfg $autocfg CONFIG_I2C_I810 $CONFIG_I2C_I810 [list $CONFIG_I2C_ALGOBIT] 2 }
	global CONFIG_I2C_PIIX4
	if {($CONFIG_I2C != 0) && ($CONFIG_I2C_MAINBOARD == 1)} then {write_tristate $cfg $autocfg CONFIG_I2C_PIIX4 $CONFIG_I2C_PIIX4 [list $notmod] 2 }
	global CONFIG_I2C_SIS5595
	if {($CONFIG_I2C != 0) && ($CONFIG_I2C_MAINBOARD == 1)} then {write_tristate $cfg $autocfg CONFIG_I2C_SIS5595 $CONFIG_I2C_SIS5595 [list $notmod] 2 }
	global CONFIG_I2C_VIA
	if {($CONFIG_I2C != 0) && ($CONFIG_I2C_MAINBOARD == 1) && ($CONFIG_I2C_ALGOBIT == 1 || $CONFIG_I2C_ALGOBIT == 2 || $CONFIG_I2C_ALGOBIT == 4)} then {write_tristate $cfg $autocfg CONFIG_I2C_VIA $CONFIG_I2C_VIA [list $CONFIG_I2C_ALGOBIT] 2 }
	global CONFIG_I2C_VIAPRO
	if {($CONFIG_I2C != 0) && ($CONFIG_I2C_MAINBOARD == 1)} then {write_tristate $cfg $autocfg CONFIG_I2C_VIAPRO $CONFIG_I2C_VIAPRO [list $notmod] 2 }
	global CONFIG_I2C_VOODOO3
	if {($CONFIG_I2C != 0) && ($CONFIG_I2C_MAINBOARD == 1) && ($CONFIG_I2C_ALGOBIT == 1 || $CONFIG_I2C_ALGOBIT == 2 || $CONFIG_I2C_ALGOBIT == 4)} then {write_tristate $cfg $autocfg CONFIG_I2C_VOODOO3 $CONFIG_I2C_VOODOO3 [list $CONFIG_I2C_ALGOBIT] 2 }
	global CONFIG_I2C_ISA
	if {($CONFIG_I2C != 0) && ($CONFIG_I2C_MAINBOARD == 1)} then {write_tristate $cfg $autocfg CONFIG_I2C_ISA $CONFIG_I2C_ISA [list $notmod] 2 }
	global CONFIG_I2C_CHARDEV
	if {($CONFIG_I2C != 0) && ($CONFIG_I2C == 1 || $CONFIG_I2C == 2 || $CONFIG_I2C == 4)} then {write_tristate $cfg $autocfg CONFIG_I2C_CHARDEV $CONFIG_I2C_CHARDEV [list $CONFIG_I2C] 2 }
	global CONFIG_I2C_PROC
	if {($CONFIG_I2C != 0) && ($CONFIG_I2C == 1 || $CONFIG_I2C == 2 || $CONFIG_I2C == 4) && ($CONFIG_SYSCTL == 1 || $CONFIG_SYSCTL == 2 || $CONFIG_SYSCTL == 4)} then {write_tristate $cfg $autocfg CONFIG_I2C_PROC $CONFIG_I2C_PROC [list $CONFIG_I2C $CONFIG_SYSCTL] 2 }
	if {($CONFIG_I2C == 2 || $CONFIG_I2C == 1) && ($CONFIG_I2C_PROC == 2 || $CONFIG_I2C_PROC == 1)} then {write_comment $cfg $autocfg "Hardware sensors support"}
	global CONFIG_SENSORS
	if {($CONFIG_I2C == 2 || $CONFIG_I2C == 1) && ($CONFIG_I2C_PROC == 2 || $CONFIG_I2C_PROC == 1) && ($CONFIG_I2C == 1 || $CONFIG_I2C == 2 || $CONFIG_I2C == 4) && ($CONFIG_I2C_PROC == 1 || $CONFIG_I2C_PROC == 2 || $CONFIG_I2C_PROC == 4)} then {write_tristate $cfg $autocfg CONFIG_SENSORS $CONFIG_SENSORS [list $CONFIG_I2C $CONFIG_I2C_PROC] 1 }
	global CONFIG_SENSORS_ADM1021
	if {($CONFIG_I2C == 2 || $CONFIG_I2C == 1) && ($CONFIG_I2C_PROC == 2 || $CONFIG_I2C_PROC == 1) && ($CONFIG_SENSORS != 0) && ($CONFIG_I2C == 1 || $CONFIG_I2C == 2 || $CONFIG_I2C == 4) && ($CONFIG_I2C_PROC == 1 || $CONFIG_I2C_PROC == 2 || $CONFIG_I2C_PROC == 4)} then {write_tristate $cfg $autocfg CONFIG_SENSORS_ADM1021 $CONFIG_SENSORS_ADM1021 [list $CONFIG_I2C $CONFIG_I2C_PROC] 2 }
	global CONFIG_SENSORS_ADM1024
	if {($CONFIG_I2C == 2 || $CONFIG_I2C == 1) && ($CONFIG_I2C_PROC == 2 || $CONFIG_I2C_PROC == 1) && ($CONFIG_SENSORS != 0) && ($CONFIG_I2C == 1 || $CONFIG_I2C == 2 || $CONFIG_I2C == 4) && ($CONFIG_I2C_PROC == 1 || $CONFIG_I2C_PROC == 2 || $CONFIG_I2C_PROC == 4)} then {write_tristate $cfg $autocfg CONFIG_SENSORS_ADM1024 $CONFIG_SENSORS_ADM1024 [list $CONFIG_I2C $CONFIG_I2C_PROC] 2 }
	global CONFIG_SENSORS_ADM1025
	if {($CONFIG_I2C == 2 || $CONFIG_I2C == 1) && ($CONFIG_I2C_PROC == 2 || $CONFIG_I2C_PROC == 1) && ($CONFIG_SENSORS != 0) && ($CONFIG_I2C == 1 || $CONFIG_I2C == 2 || $CONFIG_I2C == 4) && ($CONFIG_I2C_PROC == 1 || $CONFIG_I2C_PROC == 2 || $CONFIG_I2C_PROC == 4)} then {write_tristate $cfg $autocfg CONFIG_SENSORS_ADM1025 $CONFIG_SENSORS_ADM1025 [list $CONFIG_I2C $CONFIG_I2C_PROC] 2 }
	global CONFIG_SENSORS_ADM9240
	if {($CONFIG_I2C == 2 || $CONFIG_I2C == 1) && ($CONFIG_I2C_PROC == 2 || $CONFIG_I2C_PROC == 1) && ($CONFIG_SENSORS != 0) && ($CONFIG_I2C == 1 || $CONFIG_I2C == 2 || $CONFIG_I2C == 4) && ($CONFIG_I2C_PROC == 1 || $CONFIG_I2C_PROC == 2 || $CONFIG_I2C_PROC == 4)} then {write_tristate $cfg $autocfg CONFIG_SENSORS_ADM9240 $CONFIG_SENSORS_ADM9240 [list $CONFIG_I2C $CONFIG_I2C_PROC] 2 }
	global CONFIG_SENSORS_DS1621
	if {($CONFIG_I2C == 2 || $CONFIG_I2C == 1) && ($CONFIG_I2C_PROC == 2 || $CONFIG_I2C_PROC == 1) && ($CONFIG_SENSORS != 0) && ($CONFIG_I2C == 1 || $CONFIG_I2C == 2 || $CONFIG_I2C == 4) && ($CONFIG_I2C_PROC == 1 || $CONFIG_I2C_PROC == 2 || $CONFIG_I2C_PROC == 4)} then {write_tristate $cfg $autocfg CONFIG_SENSORS_DS1621 $CONFIG_SENSORS_DS1621 [list $CONFIG_I2C $CONFIG_I2C_PROC] 2 }
	global CONFIG_SENSORS_FSCPOS
	if {($CONFIG_I2C == 2 || $CONFIG_I2C == 1) && ($CONFIG_I2C_PROC == 2 || $CONFIG_I2C_PROC == 1) && ($CONFIG_SENSORS != 0) && ($CONFIG_I2C == 1 || $CONFIG_I2C == 2 || $CONFIG_I2C == 4) && ($CONFIG_I2C_PROC == 1 || $CONFIG_I2C_PROC == 2 || $CONFIG_I2C_PROC == 4)} then {write_tristate $cfg $autocfg CONFIG_SENSORS_FSCPOS $CONFIG_SENSORS_FSCPOS [list $CONFIG_I2C $CONFIG_I2C_PROC] 2 }
	global CONFIG_SENSORS_FSCSCY
	if {($CONFIG_I2C == 2 || $CONFIG_I2C == 1) && ($CONFIG_I2C_PROC == 2 || $CONFIG_I2C_PROC == 1) && ($CONFIG_SENSORS != 0) && ($CONFIG_I2C == 1 || $CONFIG_I2C == 2 || $CONFIG_I2C == 4) && ($CONFIG_I2C_PROC == 1 || $CONFIG_I2C_PROC == 2 || $CONFIG_I2C_PROC == 4)} then {write_tristate $cfg $autocfg CONFIG_SENSORS_FSCSCY $CONFIG_SENSORS_FSCSCY [list $CONFIG_I2C $CONFIG_I2C_PROC] 2 }
	global CONFIG_SENSORS_GL518SM
	if {($CONFIG_I2C == 2 || $CONFIG_I2C == 1) && ($CONFIG_I2C_PROC == 2 || $CONFIG_I2C_PROC == 1) && ($CONFIG_SENSORS != 0) && ($CONFIG_I2C == 1 || $CONFIG_I2C == 2 || $CONFIG_I2C == 4) && ($CONFIG_I2C_PROC == 1 || $CONFIG_I2C_PROC == 2 || $CONFIG_I2C_PROC == 4)} then {write_tristate $cfg $autocfg CONFIG_SENSORS_GL518SM $CONFIG_SENSORS_GL518SM [list $CONFIG_I2C $CONFIG_I2C_PROC] 2 }
	global CONFIG_SENSORS_GL520SM
	if {($CONFIG_I2C == 2 || $CONFIG_I2C == 1) && ($CONFIG_I2C_PROC == 2 || $CONFIG_I2C_PROC == 1) && ($CONFIG_SENSORS != 0) && ($CONFIG_I2C == 1 || $CONFIG_I2C == 2 || $CONFIG_I2C == 4) && ($CONFIG_I2C_PROC == 1 || $CONFIG_I2C_PROC == 2 || $CONFIG_I2C_PROC == 4)} then {write_tristate $cfg $autocfg CONFIG_SENSORS_GL520SM $CONFIG_SENSORS_GL520SM [list $CONFIG_I2C $CONFIG_I2C_PROC] 2 }
	global CONFIG_SENSORS_MAXILIFE
	if {($CONFIG_I2C == 2 || $CONFIG_I2C == 1) && ($CONFIG_I2C_PROC == 2 || $CONFIG_I2C_PROC == 1) && ($CONFIG_SENSORS != 0) && ($CONFIG_I2C == 1 || $CONFIG_I2C == 2 || $CONFIG_I2C == 4) && ($CONFIG_I2C_PROC == 1 || $CONFIG_I2C_PROC == 2 || $CONFIG_I2C_PROC == 4)} then {write_tristate $cfg $autocfg CONFIG_SENSORS_MAXILIFE $CONFIG_SENSORS_MAXILIFE [list $CONFIG_I2C $CONFIG_I2C_PROC] 2 }
	global CONFIG_SENSORS_IT87
	if {($CONFIG_I2C == 2 || $CONFIG_I2C == 1) && ($CONFIG_I2C_PROC == 2 || $CONFIG_I2C_PROC == 1) && ($CONFIG_SENSORS != 0) && ($CONFIG_I2C == 1 || $CONFIG_I2C == 2 || $CONFIG_I2C == 4) && ($CONFIG_I2C_PROC == 1 || $CONFIG_I2C_PROC == 2 || $CONFIG_I2C_PROC == 4)} then {write_tristate $cfg $autocfg CONFIG_SENSORS_IT87 $CONFIG_SENSORS_IT87 [list $CONFIG_I2C $CONFIG_I2C_PROC] 2 }
	global CONFIG_SENSORS_MTP008
	if {($CONFIG_I2C == 2 || $CONFIG_I2C == 1) && ($CONFIG_I2C_PROC == 2 || $CONFIG_I2C_PROC == 1) && ($CONFIG_SENSORS != 0) && ($CONFIG_I2C == 1 || $CONFIG_I2C == 2 || $CONFIG_I2C == 4) && ($CONFIG_I2C_PROC == 1 || $CONFIG_I2C_PROC == 2 || $CONFIG_I2C_PROC == 4)} then {write_tristate $cfg $autocfg CONFIG_SENSORS_MTP008 $CONFIG_SENSORS_MTP008 [list $CONFIG_I2C $CONFIG_I2C_PROC] 2 }
	global CONFIG_SENSORS_LM75
	if {($CONFIG_I2C == 2 || $CONFIG_I2C == 1) && ($CONFIG_I2C_PROC == 2 || $CONFIG_I2C_PROC == 1) && ($CONFIG_SENSORS != 0) && ($CONFIG_I2C == 1 || $CONFIG_I2C == 2 || $CONFIG_I2C == 4) && ($CONFIG_I2C_PROC == 1 || $CONFIG_I2C_PROC == 2 || $CONFIG_I2C_PROC == 4)} then {write_tristate $cfg $autocfg CONFIG_SENSORS_LM75 $CONFIG_SENSORS_LM75 [list $CONFIG_I2C $CONFIG_I2C_PROC] 2 }
	global CONFIG_SENSORS_LM78
	if {($CONFIG_I2C == 2 || $CONFIG_I2C == 1) && ($CONFIG_I2C_PROC == 2 || $CONFIG_I2C_PROC == 1) && ($CONFIG_SENSORS != 0) && ($CONFIG_I2C == 1 || $CONFIG_I2C == 2 || $CONFIG_I2C == 4) && ($CONFIG_I2C_PROC == 1 || $CONFIG_I2C_PROC == 2 || $CONFIG_I2C_PROC == 4)} then {write_tristate $cfg $autocfg CONFIG_SENSORS_LM78 $CONFIG_SENSORS_LM78 [list $CONFIG_I2C $CONFIG_I2C_PROC] 2 }
	global CONFIG_SENSORS_LM80
	if {($CONFIG_I2C == 2 || $CONFIG_I2C == 1) && ($CONFIG_I2C_PROC == 2 || $CONFIG_I2C_PROC == 1) && ($CONFIG_SENSORS != 0) && ($CONFIG_I2C == 1 || $CONFIG_I2C == 2 || $CONFIG_I2C == 4) && ($CONFIG_I2C_PROC == 1 || $CONFIG_I2C_PROC == 2 || $CONFIG_I2C_PROC == 4)} then {write_tristate $cfg $autocfg CONFIG_SENSORS_LM80 $CONFIG_SENSORS_LM80 [list $CONFIG_I2C $CONFIG_I2C_PROC] 2 }
	global CONFIG_SENSORS_LM87
	if {($CONFIG_I2C == 2 || $CONFIG_I2C == 1) && ($CONFIG_I2C_PROC == 2 || $CONFIG_I2C_PROC == 1) && ($CONFIG_SENSORS != 0) && ($CONFIG_I2C == 1 || $CONFIG_I2C == 2 || $CONFIG_I2C == 4) && ($CONFIG_I2C_PROC == 1 || $CONFIG_I2C_PROC == 2 || $CONFIG_I2C_PROC == 4)} then {write_tristate $cfg $autocfg CONFIG_SENSORS_LM87 $CONFIG_SENSORS_LM87 [list $CONFIG_I2C $CONFIG_I2C_PROC] 2 }
	global CONFIG_SENSORS_SIS5595
	if {($CONFIG_I2C == 2 || $CONFIG_I2C == 1) && ($CONFIG_I2C_PROC == 2 || $CONFIG_I2C_PROC == 1) && ($CONFIG_SENSORS != 0) && ($CONFIG_I2C == 1 || $CONFIG_I2C == 2 || $CONFIG_I2C == 4) && ($CONFIG_I2C_PROC == 1 || $CONFIG_I2C_PROC == 2 || $CONFIG_I2C_PROC == 4) && ($CONFIG_I2C_ISA == 1 || $CONFIG_I2C_ISA == 2 || $CONFIG_I2C_ISA == 4)} then {write_tristate $cfg $autocfg CONFIG_SENSORS_SIS5595 $CONFIG_SENSORS_SIS5595 [list $CONFIG_I2C $CONFIG_I2C_PROC $CONFIG_I2C_ISA] 2 }
	global CONFIG_SENSORS_THMC50
	if {($CONFIG_I2C == 2 || $CONFIG_I2C == 1) && ($CONFIG_I2C_PROC == 2 || $CONFIG_I2C_PROC == 1) && ($CONFIG_SENSORS != 0) && ($CONFIG_I2C == 1 || $CONFIG_I2C == 2 || $CONFIG_I2C == 4) && ($CONFIG_I2C_PROC == 1 || $CONFIG_I2C_PROC == 2 || $CONFIG_I2C_PROC == 4)} then {write_tristate $cfg $autocfg CONFIG_SENSORS_THMC50 $CONFIG_SENSORS_THMC50 [list $CONFIG_I2C $CONFIG_I2C_PROC] 2 }
	global CONFIG_SENSORS_VIA686A
	if {($CONFIG_I2C == 2 || $CONFIG_I2C == 1) && ($CONFIG_I2C_PROC == 2 || $CONFIG_I2C_PROC == 1) && ($CONFIG_SENSORS != 0) && ($CONFIG_I2C == 1 || $CONFIG_I2C == 2 || $CONFIG_I2C == 4) && ($CONFIG_I2C_PROC == 1 || $CONFIG_I2C_PROC == 2 || $CONFIG_I2C_PROC == 4) && ($CONFIG_I2C_ISA == 1 || $CONFIG_I2C_ISA == 2 || $CONFIG_I2C_ISA == 4)} then {write_tristate $cfg $autocfg CONFIG_SENSORS_VIA686A $CONFIG_SENSORS_VIA686A [list $CONFIG_I2C $CONFIG_I2C_PROC $CONFIG_I2C_ISA] 2 }
	global CONFIG_SENSORS_W83781D
	if {($CONFIG_I2C == 2 || $CONFIG_I2C == 1) && ($CONFIG_I2C_PROC == 2 || $CONFIG_I2C_PROC == 1) && ($CONFIG_SENSORS != 0) && ($CONFIG_I2C == 1 || $CONFIG_I2C == 2 || $CONFIG_I2C == 4) && ($CONFIG_I2C_PROC == 1 || $CONFIG_I2C_PROC == 2 || $CONFIG_I2C_PROC == 4)} then {write_tristate $cfg $autocfg CONFIG_SENSORS_W83781D $CONFIG_SENSORS_W83781D [list $CONFIG_I2C $CONFIG_I2C_PROC] 2 }
	global CONFIG_SENSORS_OTHER
	if {($CONFIG_I2C == 2 || $CONFIG_I2C == 1) && ($CONFIG_I2C_PROC == 2 || $CONFIG_I2C_PROC == 1) && ($CONFIG_SENSORS != 0)} then {write_tristate $cfg $autocfg CONFIG_SENSORS_OTHER $CONFIG_SENSORS_OTHER [list $notmod] 2 }
	global CONFIG_SENSORS_BT869
	if {($CONFIG_I2C == 2 || $CONFIG_I2C == 1) && ($CONFIG_I2C_PROC == 2 || $CONFIG_I2C_PROC == 1) && ($CONFIG_SENSORS != 0) && ($CONFIG_SENSORS_OTHER == 1) && ($CONFIG_I2C == 1 || $CONFIG_I2C == 2 || $CONFIG_I2C == 4) && ($CONFIG_I2C_PROC == 1 || $CONFIG_I2C_PROC == 2 || $CONFIG_I2C_PROC == 4)} then {write_tristate $cfg $autocfg CONFIG_SENSORS_BT869 $CONFIG_SENSORS_BT869 [list $CONFIG_I2C $CONFIG_I2C_PROC] 2 }
	global CONFIG_SENSORS_DDCMON
	if {($CONFIG_I2C == 2 || $CONFIG_I2C == 1) && ($CONFIG_I2C_PROC == 2 || $CONFIG_I2C_PROC == 1) && ($CONFIG_SENSORS != 0) && ($CONFIG_SENSORS_OTHER == 1) && ($CONFIG_I2C == 1 || $CONFIG_I2C == 2 || $CONFIG_I2C == 4) && ($CONFIG_I2C_PROC == 1 || $CONFIG_I2C_PROC == 2 || $CONFIG_I2C_PROC == 4)} then {write_tristate $cfg $autocfg CONFIG_SENSORS_DDCMON $CONFIG_SENSORS_DDCMON [list $CONFIG_I2C $CONFIG_I2C_PROC] 2 }
	global CONFIG_SENSORS_EEPROM
	if {($CONFIG_I2C == 2 || $CONFIG_I2C == 1) && ($CONFIG_I2C_PROC == 2 || $CONFIG_I2C_PROC == 1) && ($CONFIG_SENSORS != 0) && ($CONFIG_SENSORS_OTHER == 1) && ($CONFIG_I2C == 1 || $CONFIG_I2C == 2 || $CONFIG_I2C == 4) && ($CONFIG_I2C_PROC == 1 || $CONFIG_I2C_PROC == 2 || $CONFIG_I2C_PROC == 4)} then {write_tristate $cfg $autocfg CONFIG_SENSORS_EEPROM $CONFIG_SENSORS_EEPROM [list $CONFIG_I2C $CONFIG_I2C_PROC] 2 }
	global CONFIG_SENSORS_MATORB
	if {($CONFIG_I2C == 2 || $CONFIG_I2C == 1) && ($CONFIG_I2C_PROC == 2 || $CONFIG_I2C_PROC == 1) && ($CONFIG_SENSORS != 0) && ($CONFIG_SENSORS_OTHER == 1) && ($CONFIG_I2C == 1 || $CONFIG_I2C == 2 || $CONFIG_I2C == 4) && ($CONFIG_I2C_PROC == 1 || $CONFIG_I2C_PROC == 2 || $CONFIG_I2C_PROC == 4)} then {write_tristate $cfg $autocfg CONFIG_SENSORS_MATORB $CONFIG_SENSORS_MATORB [list $CONFIG_I2C $CONFIG_I2C_PROC] 2 }
	write_comment $cfg $autocfg "Mice"
	global CONFIG_BUSMOUSE
	write_tristate $cfg $autocfg CONFIG_BUSMOUSE $CONFIG_BUSMOUSE [list $notmod] 2
	global CONFIG_ATIXL_BUSMOUSE
	if {($CONFIG_BUSMOUSE != 0) && ($CONFIG_BUSMOUSE == 1 || $CONFIG_BUSMOUSE == 2 || $CONFIG_BUSMOUSE == 4)} then {write_tristate $cfg $autocfg CONFIG_ATIXL_BUSMOUSE $CONFIG_ATIXL_BUSMOUSE [list $CONFIG_BUSMOUSE] 2 }
	global CONFIG_LOGIBUSMOUSE
	if {($CONFIG_BUSMOUSE != 0) && ($CONFIG_BUSMOUSE == 1 || $CONFIG_BUSMOUSE == 2 || $CONFIG_BUSMOUSE == 4)} then {write_tristate $cfg $autocfg CONFIG_LOGIBUSMOUSE $CONFIG_LOGIBUSMOUSE [list $CONFIG_BUSMOUSE] 2 }
	global CONFIG_MS_BUSMOUSE
	if {($CONFIG_BUSMOUSE != 0) && ($CONFIG_BUSMOUSE == 1 || $CONFIG_BUSMOUSE == 2 || $CONFIG_BUSMOUSE == 4)} then {write_tristate $cfg $autocfg CONFIG_MS_BUSMOUSE $CONFIG_MS_BUSMOUSE [list $CONFIG_BUSMOUSE] 2 }
	global CONFIG_MOUSE
	write_tristate $cfg $autocfg CONFIG_MOUSE $CONFIG_MOUSE [list $notmod] 2
	global CONFIG_PSMOUSE
	if {($CONFIG_MOUSE != 0)} then {write_tristate $cfg $autocfg CONFIG_PSMOUSE $CONFIG_PSMOUSE [list $notmod] 2 }
	global CONFIG_82C710_MOUSE
	if {($CONFIG_MOUSE != 0)} then {write_tristate $cfg $autocfg CONFIG_82C710_MOUSE $CONFIG_82C710_MOUSE [list $notmod] 2 }
	global CONFIG_PC110_PAD
	if {($CONFIG_MOUSE != 0)} then {write_tristate $cfg $autocfg CONFIG_PC110_PAD $CONFIG_PC110_PAD [list $notmod] 2 }
	global CONFIG_MK712_MOUSE
	if {($CONFIG_MOUSE != 0)} then {write_tristate $cfg $autocfg CONFIG_MK712_MOUSE $CONFIG_MK712_MOUSE [list $notmod] 2 }
	write_comment $cfg $autocfg "Joysticks"
	global CONFIG_INPUT_GAMEPORT
	if {($CONFIG_INPUT != 0) && ($CONFIG_INPUT == 1 || $CONFIG_INPUT == 2 || $CONFIG_INPUT == 4)} then {write_tristate $cfg $autocfg CONFIG_INPUT_GAMEPORT $CONFIG_INPUT_GAMEPORT [list $CONFIG_INPUT] 2 }
	global CONFIG_INPUT_NS558
	if {($CONFIG_INPUT != 0) && ($CONFIG_INPUT_GAMEPORT == 1 || $CONFIG_INPUT_GAMEPORT == 2 || $CONFIG_INPUT_GAMEPORT == 4)} then {write_tristate $cfg $autocfg CONFIG_INPUT_NS558 $CONFIG_INPUT_NS558 [list $CONFIG_INPUT_GAMEPORT] 2 }
	global CONFIG_INPUT_LIGHTNING
	if {($CONFIG_INPUT != 0) && ($COELF




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ifeq (-D__KERNEL__ -I/home/me/kernel/linux/include -Wall -Wstrict-prototypes -Wno-trigraphs -O2 -fomit-frame-pointer -fno-strict-aliasing -fno-common -pipe -mpreferred-stack-boundary=2 -march=i686,$(strip $(subst $(comma),:,$(CFLAGS) $(EXTRA_CFLAGS) $(CFLAGS_scsicam.o))))
FILES_FLAGS_UP_TO_DATE += scsicam.o
endif
NFIG_INPUT_GAMEPORT == 1 || $CONFIG_INPUT_GAMEPORT == 2 || $CONFIG_INPUT_GAMEPORT == 4)} then {write_tristate $cfg $autocfg CONFIG_INPUT_LIGHTNING $CONFIG_INPUT_LIGHTNING [list $CONFIG_INPUT_GAMEPORT] 2 }
	global CONFIG_INPUT_PCIGAME
	if {($CONFIG_INPUT != 0) && ($CONFIG_INPUT_GAMEPORT == 1 || $CONFIG_INPUT_GAMEPORT == 2 || $CONFIG_INPUT_GAMEPORT == 4)} then {write_tristate $cfg $autocfg CONFIG_INPUT_PCIGAME $CONFIG_INPUT_PCIGAME [list $CONFIG_INPUT_GAMEPORT] 2 }
	global CONFIG_INPUT_CS461X
	if {($CONFIG_INPUT != 0) && ($CONFIG_INPUT_GAMEPORT == 1 || $CONFIG_INPUT_GAMEPORT == 2 || $CONFIG_INPUT_GAMEPORT == 4)} then {write_tristate $cfg $autocfg CONFIG_INPUT_CS461X $CONFIG_INPUT_CS461X [list $CONFIG_INPUT_GAMEPORT] 2 }
	global CONFIG_INPUT_EMU10K1
	if {($CONFIG_INPUT != 0) && ($CONFIG_INPUT_GAMEPORT == 1 || $CONFIG_INPUT_GAMEPORT == 2 || $CONFIG_INPUT_GAMEPORT == 4)} then {write_tristate $cfg $autocfg CONFIG_INPUT_EMU10K1 $CONFIG_INPUT_EMU10K1 [list $CONFIG_INPUT_GAMEPORT] 2 }
	global CONFIG_INPUT_SERIO
	if {($CONFIG_INPUT != 0)} then {write_tristate $cfg $autocfg CONFIG_INPUT_SERIO $CONFIG_INPUT_SERIO [list $notmod] 2 }
	global CONFIG_INPUT_SERPORT
	if {($CONFIG_INPUT != 0) && ($CONFIG_INPUT_SERIO == 1 || $CONFIG_INPUT_SERIO == 2 || $CONFIG_INPUT_SERIO == 4)} then {write_tristate $cfg $autocfg CONFIG_INPUT_SERPORT $CONFIG_INPUT_SERPORT [list $CONFIG_INPUT_SERIO] 2 }
	if {($CONFIG_INPUT == 0)} then {write_tristate $cfg $autocfg CONFIG_INPUT_GAMEPORT $CONSTANT_N [list $notmod] 2 }
	if {($CONFIG_INPUT == 0)} then {write_comment $cfg $autocfg "Input core support is needed for gameports"}
	if {($CONFIG_INPUT != 0)} then {write_comment $cfg $autocfg "Joysticks"}
	global CONFIG_INPUT_ANALOG
	if {($CONFIG_INPUT != 0) && ($CONFIG_INPUT == 1 || $CONFIG_INPUT == 2 || $CONFIG_INPUT == 4) && ($CONFIG_INPUT_GAMEPORT == 1 || $CONFIG_INPUT_GAMEPORT == 2 || $CONFIG_INPUT_GAMEPORT == 4)} then {write_tristate $cfg $autocfg CONFIG_INPUT_ANALOG $CONFIG_INPUT_ANALOG [list $CONFIG_INPUT $CONFIG_INPUT_GAMEPORT] 2 }
	global CONFIG_INPUT_A3D
	if {($CONFIG_INPUT != 0) && ($CONFIG_INPUT == 1 || $CONFIG_INPUT == 2 || $CONFIG_INPUT == 4) && ($CONFIG_INPUT_GAMEPORT == 1 || $CONFIG_INPUT_GAMEPORT == 2 || $CONFIG_INPUT_GAMEPORT == 4)} then {write_tristate $cfg $autocfg CONFIG_INPUT_A3D $CONFIG_INPUT_A3D [list $CONFIG_INPUT $CONFIG_INPUT_GAMEPORT] 2 }
	global CONFIG_INPUT_ADI
	if {($CONFIG_INPUT != 0) && ($CONFIG_INPUT == 1 || $CONFIG_INPUT == 2 || $CONFIG_INPUT == 4) && ($CONFIG_INPUT_GAMEPORT == 1 || $CONFIG_INPUT_GAMEPORT == 2 || $CONFIG_INPUT_GAMEPORT == 4)} then {write_tristate $cfg $autocfg CONFIG_INPUT_ADI $CONFIG_INPUT_ADI [list $CONFIG_INPUT $CONFIG_INPUT_GAMEPORT] 2 }
	global CONFIG_INPUT_COBRA
	if {($CONFIG_INPUT != 0) && ($CONFIG_INPUT == 1 || $CONFIG_INPUT == 2 || $CONFIG_INPUT == 4) && ($CONFIG_INPUT_GAMEPORT == 1 || $CONFIG_INPUT_GAMEPORT == 2 || $CONFIG_INPUT_GAMEPORT == 4)} then {write_tristate $cfg $autocfg CONFIG_INPUT_COBRA $CONFIG_INPUT_COBRA [list $CONFIG_INPUT $CONFIG_INPUT_GAMEPORT] 2 }
	global CONFIG_INPUT_GF2K
	if {($CONFIG_INPUT != 0) && ($CONFIG_INPUT == 1 || $CONFIG_INPUT == 2 || $CONFIG_INPUT == 4) && ($CONFIG_INPUT_GAMEPORT == 1 || $CONFIG_INPUT_GAMEPORT == 2 || $CONFIG_INPUT_GAMEPORT == 4)} then {write_tristate $cfg $autocfg CONFIG_INPUT_GF2K $CONFIG_INPUT_GF2K [list $CONFIG_INPUT $CONFIG_INPUT_GAMEPORT] 2 }
	global CONFIG_INPUT_GRIP
	if {($CONFIG_INPUT != 0) && ($CONFIG_INPUT == 1 || $CONFIG_INPUT == 2 || $CONFIG_INPUT == 4) && ($CONFIG_INPUT_GAMEPORT == 1 || $CONFIG_INPUT_GAMEPORT == 2 || $CONFIG_INPUT_GAMEPORT == 4)} then {write_tristate $cfg $autocfg CONFIG_INPUT_GRIP $CONFIG_INPUT_GRIP [list $CONFIG_INPUT $CONFIG_INPUT_GAMEPORT] 2 }
	global CONFIG_INPUT_INTERACT
	if {($CONFIG_INPUT != 0) && ($CONFIG_INPUT == 1 || $CONFIG_INPUT == 2 || $CONFIG_INPUT == 4) && ($CONFIG_INPUT_GAMEPORT == 1 || $CONFIG_INPUT_GAMEPORT == 2 || $CONFIG_INPUT_GAMEPORT == 4)} then {write_tristate $cfg $autocfg CONFIG_INPUT_INTERACT $CONFIG_INPUT_INTERACT [list $CONFIG_INPUT $CONFIG_INPUT_GAMEPORT] 2 }
	global CONFIG_INPUT_TMDC
	if {($CONFIG_INPUT != 0) && ($CONFIG_INPUT == 1 || $CONFIG_INPUT == 2 || $CONFIG_INPUT == 4) && ($CONFIG_INPUT_GAMEPORT == 1 || $CONFIG_INPUT_GAMEPORT == 2 || $CONFIG_INPUT_GAMEPORT == 4)} then {write_tristate $cfg $autocfg CONFIG_INPUT_TMDC $CONFIG_INPUT_TMDC [list $CONFIG_INPUT $CONFIG_INPUT_GAMEPORT] 2 }
	global CONFIG_INPUT_SIDEWINDER
	if {($CONFIG_INPUT != 0) && ($CONFIG_INPUT == 1 || $CONFIG_INPUT == 2 || $CONFIG_INPUT == 4) && ($CONFIG_INPUT_GAMEPORT == 1 || $CONFIG_INPUT_GAMEPORT == 2 || $CONFIG_INPUT_GAMEPORT == 4)} then {write_tristate $cfg $autocfg CONFIG_INPUT_SIDEWINDER $CONFIG_INPUT_SIDEWINDER [list $CONFIG_INPUT $CONFIG_INPUT_GAMEPORT] 2 }
	global CONFIG_INPUT_IFORCE_USB
	if {($CONFIG_INPUT != 0) && ($CONFIG_INPUT == 1 || $CONFIG_INPUT == 2 || $CONFIG_INPUT == 4) && ($CONFIG_USB == 1 || $CONFIG_USB == 2 || $CONFIG_USB == 4)} then {write_tristate $cfg $autocfg CONFIG_INPUT_IFORCE_USB $CONFIG_INPUT_IFORCE_USB [list $CONFIG_INPUT $CONFIG_USB] 2 }
	global CONFIG_INPUT_IFORCE_232
	if {($CONFIG_INPUT != 0) && ($CONFIG_INPUT == 1 || $CONFIG_INPUT == 2 || $CONFIG_INPUT == 4) && ($CONFIG_INPUT_SERIO == 1 || $CONFIG_INPUT_SERIO == 2 || $CONFIG_INPUT_SERIO == 4)} then {write_tristate $cfg $autocfg CONFIG_INPUT_IFORCE_232 $CONFIG_INPUT_IFORCE_232 [list $CONFIG_INPUT $CONFIG_INPUT_SERIO] 2 }
	global CONFIG_INPUT_WARRIOR
	if {($CONFIG_INPUT != 0) && ($CONFIG_INPUT == 1 || $CONFIG_INPUT == 2 || $CONFIG_INPUT == 4) && ($CONFIG_INPUT_SERIO == 1 || $CONFIG_INPUT_SERIO == 2 || $CONFIG_INPUT_SERIO == 4)} then {write_tristate $cfg $autocfg CONFIG_INPUT_WARRIOR $CONFIG_INPUT_WARRIOR [list $CONFIG_INPUT $CONFIG_INPUT_SERIO] 2 }
	global CONFIG_INPUT_MAGELLAN
	if {($CONFIG_INPUT != 0) && ($CONFIG_INPUT == 1 || $CONFIG_INPUT == 2 || $CONFIG_INPUT == 4) && ($CONFIG_INPUT_SERIO == 1 || $CONFIG_INPUT_SERIO == 2 || $CONFIG_INPUT_SERIO == 4)} then {write_tristate $cfg $autocfg CONFIG_INPUT_MAGELLAN $CONFIG_INPUT_MAGELLAN [list $CONFIG_INPUT $CONFIG_INPUT_SERIO] 2 }
	global CONFIG_INPUT_SPACEORB
	if {($CONFIG_INPUT != 0) && ($CONFIG_INPUT == 1 || $CONFIG_INPUT == 2 || $CONFIG_INPUT == 4) && ($CONFIG_INPUT_SERIO == 1 || $CONFIG_INPUT_SERIO == 2 || $CONFIG_INPUT_SERIO == 4)} then {write_tristate $cfg $autocfg CONFIG_INPUT_SPACEORB $CONFIG_INPUT_SPACEORB [list $CONFIG_INPUT $CONFIG_INPUT_SERIO] 2 }
	global CONFIG_INPUT_SPACEBALL
	if {($CONFIG_INPUT != 0) && ($CONFIG_INPUT == 1 || $CONFIG_INPUT == 2 || $CONFIG_INPUT == 4) && ($CONFIG_INPUT_SERIO == 1 || $CONFIG_INPUT_SERIO == 2 || $CONFIG_INPUT_SERIO == 4)} then {write_tristate $cfg $autocfg CONFIG_INPUT_SPACEBALL $CONFIG_INPUT_SPACEBALL [list $CONFIG_INPUT $CONFIG_INPUT_SERIO] 2 }
	global CONFIG_INPUT_STINGER
	if {($CONFIG_INPUT != 0) && ($CONFIG_INPUT == 1 || $CONFIG_INPUT == 2 || $CONFIG_INPUT == 4) && ($CONFIG_INPUT_SERIO == 1 || $CONFIG_INPUT_SERIO == 2 || $CONFIG_INPUT_SERIO == 4)} then {write_tristate $cfg $autocfg CONFIG_INPUT_STINGER $CONFIG_INPUT_STINGER [list $CONFIG_INPUT $CONFIG_INPUT_SERIO] 2 }
	global CONFIG_INPUT_DB9
	if {($CONFIG_INPUT != 0) && ($CONFIG_INPUT == 1 || $CONFIG_INPUT == 2 || $CONFIG_INPUT == 4) && ($CONFIG_PARPORT == 1 || $CONFIG_PARPORT == 2 || $CONFIG_PARPORT == 4)} then {write_tristate $cfg $autocfg CONFIG_INPUT_DB9 $CONFIG_INPUT_DB9 [list $CONFIG_INPUT $CONFIG_PARPORT] 2 }
	global CONFIG_INPUT_GAMECON
	if {($CONFIG_INPUT != 0) && ($CONFIG_INPUT == 1 || $CONFIG_INPUT == 2 || $CONFIG_INPUT == 4) && ($CONFIG_PARPORT == 1 || $CONFIG_PARPORT == 2 || $CONFIG_PARPORT == 4)} then {write_tristate $cfg $autocfg CONFIG_INPUT_GAMECON $CONFIG_INPUT_GAMECON [list $CONFIG_INPUT $CONFIG_PARPORT] 2 }
	global CONFIG_INPUT_TURBOGRAFX
	if {($CONFIG_INPUT != 0) && ($CONFIG_INPUT == 1 || $CONFIG_INPUT == 2 || $CONFIG_INPUT == 4) && ($CONFIG_PARPORT == 1 || $CONFIG_PARPORT == 2 || $CONFIG_PARPORT == 4)} then {write_tristate $cfg $autocfg CONFIG_INPUT_TURBOGRAFX $CONFIG_INPUT_TURBOGRAFX [list $CONFIG_INPUT $CONFIG_PARPORT] 2 }
	if {($CONFIG_INPUT == 0)} then {write_comment $cfg $autocfg "Input core support is needed for joysticks"}
	global CONFIG_QIC02_TAPE
	write_tristate $cfg $autocfg CONFIG_QIC02_TAPE $CONFIG_QIC02_TAPE [list $notmod] 2
	global CONFIG_QIC02_DYNCONF
	if {($CONFIG_QIC02_TAPE != 0)} then {write_tristate $cfg $autocfg CONFIG_QIC02_DYNCONF $CONFIG_QIC02_DYNCONF [list $notmod] 2 }
	if {($CONFIG_QIC02_TAPE != 0) && ($CONFIG_QIC02_DYNCONF != 1)} then {write_comment $cfg $autocfg "  Edit configuration parameters in ./include/linux/tpqic02.h!"}
	if {($CONFIG_QIC02_TAPE != 0) && ($CONFIG_QIC02_DYNCONF == 1)} then {write_comment $cfg $autocfg "  Setting runtime QIC-02 configuration is done with qic02conf"}
	if {($CONFIG_QIC02_TAPE != 0) && ($CONFIG_QIC02_DYNCONF == 1)} then {write_comment $cfg $autocfg "  from the tpqic02-support package.  It is available at"}
	if {($CONFIG_QIC02_TAPE != 0) && ($CONFIG_QIC02_DYNCONF == 1)} then {write_comment $cfg $autocfg "  metalab.unc.edu or ftp://titus.cfw.com/pub/Linux/util/"}
	write_comment $cfg $autocfg "Watchdog Cards"
	global CONFIG_WATCHDOG
	write_tristate $cfg $autocfg CONFIG_WATCHDOG $CONFIG_WATCHDOG [list $notmod] 2
	global CONFIG_WATCHDOG_NOWAYOUT
	if {($CONFIG_WATCHDOG != 0)} then {write_tristate $cfg $autocfg CONFIG_WATCHDOG_NOWAYOUT $CONFIG_WATCHDOG_NOWAYOUT [list $notmod] 2 }
	global CONFIG_ACQUIRE_WDT
	if {($CONFIG_WATCHDOG != 0)} then {write_tristate $cfg $autocfg CONFIG_ACQUIRE_WDT $CONFIG_ACQUIRE_WDT [list $notmod] 2 }
	global CONFIG_ADVANTECH_WDT
	if {($CONFIG_WATCHDOG != 0)} then {write_tristate $cfg $autocfg CONFIG_ADVANTECH_WDT $CONFIG_ADVANTECH_WDT [list $notmod] 2 }
	global CONFIG_ALIM7101_WDT
	if {($CONFIG_WATCHDOG != 0)} then {write_tristate $cfg $autocfg CONFIG_ALIM7101_WDT $CONFIG_ALIM7101_WDT [list $notmod] 2 }
	global CONFIG_SC520_WDT
	if {($CONFIG_WATCHDOG != 0)} then {write_tristate $cfg $autocfg CONFIG_SC520_WDT $CONFIG_SC520_WDT [list $notmod] 2 }
	global CONFIG_PCWATCHDOG
	if {($CONFIG_WATCHDOG != 0)} then {write_tristate $cfg $autocfg CONFIG_PCWATCHDOG $CONFIG_PCWATCHDOG [list $notmod] 2 }
	global CONFIG_EUROTECH_WDT
	if {($CONFIG_WATCHDOG != 0)} then {write_tristate $cfg $autocfg CONFIG_EUROTECH_WDT $CONFIG_EUROTECH_WDT [list $notmod] 2 }
	global CONFIG_IB700_WDT
	if {($CONFIG_WATCHDOG != 0)} then {write_tristate $cfg $autocfg CONFIG_IB700_WDT $CONFIG_IB700_WDT [list $notmod] 2 }
	global CONFIG_WAFER_WDT
	if {($CONFIG_WATCHDOG != 0)} then {write_tristate $cfg $autocfg CONFIG_WAFER_WDT $CONFIG_WAFER_WDT [list $notmod] 2 }
	global CONFIG_I810_TCO
	if {($CONFIG_WATCHDOG != 0)} then {write_tristate $cfg $autocfg CONFIG_I810_TCO $CONFIG_I810_TCO [list $notmod] 2 }
	global CONFIG_MIXCOMWD
	if {($CONFIG_WATCHDOG != 0)} then {write_tristate $cfg $autocfg CONFIG_MIXCOMWD $CONFIG_MIXCOMWD [list $notmod] 2 }
	global CONFIG_60XX_WDT
	if {($CONFIG_WATCHDOG != 0)} then {write_tristate $cfg $autocfg CONFIG_60XX_WDT $CONFIG_60XX_WDT [list $notmod] 2 }
	global CONFIG_SC1200_WDT
	if {($CONFIG_WATCHDOG != 0) && ($CONFIG_EXPERIMENTAL == 1 || $CONFIG_EXPERIMENTAL == 2 || $CONFIG_EXPERIMENTAL == 4)} then {write_tristate $cfg $autocfg CONFIG_SC1200_WDT $CONFIG_SC1200_WDT [list $CONFIG_EXPERIMENTAL] 2 }
	global CONFIG_SOFT_WATCHDOG
	if {($CONFIG_WATCHDOG != 0)} then {write_tristate $cfg $autocfg CONFIG_SOFT_WATCHDOG $CONFIG_SOFT_WATCHDOG [list $notmod] 2 }
	global CONFIG_W83877F_WDT
	if {($CONFIG_WATCHDOG != 0)} then {write_tristate $cfg $autocfg CONFIG_W83877F_WDT $CONFIG_W83877F_WDT [list $notmod] 2 }
	global CONFIG_WDT
	if {($CONFIG_WATCHDOG != 0)} then {write_tristate $cfg $autocfg CONFIG_WDT $CONFIG_WDT [list $notmod] 2 }
	global CONFIG_WDTPCI
	if {($CONFIG_WATCHDOG != 0)} then {write_tristate $cfg $autocfg CONFIG_WDTPCI $CONFIG_WDTPCI [list $notmod] 2 }
	global CONFIG_WDT_501
	if {($CONFIG_WATCHDOG != 0) && ($CONFIG_WDT != 0)} then {write_tristate $cfg $autocfg CONFIG_WDT_501 $CONFIG_WDT_501 [list $notmod] 2 }
	global CONFIG_WDT_501_FAN
	if {($CONFIG_WATCHDOG != 0) && ($CONFIG_WDT != 0) && ($CONFIG_WDT_501 == 1)} then {write_tristate $cfg $autocfg CONFIG_WDT_501_FAN $CONFIG_WDT_501_FAN [list $notmod] 2 }
	global CONFIG_MACHZ_WDT
	if {($CONFIG_WATCHDOG != 0)} then {write_tristate $cfg $autocfg CONFIG_MACHZ_WDT $CONFIG_MACHZ_WDT [list $notmod] 2 }
	global CONFIG_AMD_RNG
	if {($CONFIG_PCI == 1 || $CONFIG_PCI == 2 || $CONFIG_PCI == 4)} then {write_tristate $cfg $autocfg CONFIG_AMD_RNG $CONFIG_AMD_RNG [list $CONFIG_PCI] 2 }
	global CONFIG_INTEL_RNG
	if {($CONFIG_PCI == 1 || $CONFIG_PCI == 2 || $CONFIG_PCI == 4)} then {write_tristate $cfg $autocfg CONFIG_INTEL_RNG $CONFIG_INTEL_RNG [list $CONFIG_PCI] 2 }
	global CONFIG_AMD_PM768
	if {($CONFIG_PCI == 1 || $CONFIG_PCI == 2 || $CONFIG_PCI == 4)} then {write_tristate $cfg $autocfg CONFIG_AMD_PM768 $CONFIG_AMD_PM768 [list $CONFIG_PCI] 2 }
	global CONFIG_NVRAM
	write_tristate $cfg $autocfg CONFIG_NVRAM $CONFIG_NVRAM [list $notmod] 2
	global CONFIG_RTC
	write_tristate $cfg $autocfg CONFIG_RTC $CONFIG_RTC [list $notmod] 2
	global CONFIG_DTLK
	write_tristate $cfg $autocfg CONFIG_DTLK $CONFIG_DTLK [list $notmod] 2
	global CONFIG_R3964
	write_tristate $cfg $autocfg CONFIG_R3964 $CONFIG_R3964 [list $notmod] 2
	global CONFIG_APPLICOM
	write_tristate $cfg $autocfg CONFIG_APPLICOM $CONFIG_APPLICOM [list $notmod] 2
	global CONFIG_SONYPI
	if {($CONFIG_EXPERIMENTAL == 1 && $CONFIG_X86 == 1) && ($CONFIG_PCI == 1 || $CONFIG_PCI == 2 || $CONFIG_PCI == 4)} then {write_tristate $cfg $autocfg CONFIG_SONYPI $CONFIG_SONYPI [list $CONFIG_PCI] 2 }
	write_comment $cfg $autocfg "Ftape, the floppy tape device driver"
	global CONFIG_FTAPE
	write_tristate $cfg $autocfg CONFIG_FTAPE $CONFIG_FTAPE [list $notmod] 2
	global CONFIG_ZFTAPE
	if {($CONFIG_FTAPE != 0) && ($CONFIG_FTAPE == 1 || $CONFIG_FTAPE == 2 || $CONFIG_FTAPE == 4)} then {write_tristate $cfg $autocfg CONFIG_ZFTAPE $CONFIG_ZFTAPE [list $CONFIG_FTAPE] 2 }
	global CONFIG_ZFT_DFLT_BLK_SZ
	if {($CONFIG_FTAPE != 0) && ($CONFIG_ZFTAPE != 0)} then {write_int $cfg $autocfg CONFIG_ZFT_DFLT_BLK_SZ $CONFIG_ZFT_DFLT_BLK_SZ $notmod }
	if {($CONFIG_FTAPE != 0) && ($CONFIG_ZFTAPE != 0)} then {write_comment $cfg $autocfg "  The compressor will be built as a module only!"}
	global CONFIG_ZFT_COMPRESSOR
	if {($CONFIG_FTAPE != 0) && ($CONFIG_ZFTAPE != 0)} then {write_tristate $cfg $autocfg CONFIG_ZFT_COMPRESSOR $CONSTANT_M [list $notmod] 2 }
	global CONFIG_FT_NR_BUFFERS
	if {($CONFIG_FTAPE != 0) && ($CONFIG_EXPERIMENTAL == 1)} then {write_int $cfg $autocfg CONFIG_FT_NR_BUFFERS $CONFIG_FT_NR_BUFFERS $notmod }
	global CONFIG_FT_PROC_FS
	if {($CONFIG_FTAPE != 0) && ($CONFIG_PROC_FS == 1)} then {write_tristate $cfg $autocfg CONFIG_FT_PROC_FS $CONFIG_FT_PROC_FS [list $notmod] 2 }
	global tmpvar_9
	if {($CONFIG_FTAPE != 0)} then {
	if { $tmpvar_9 == "Normal" } then { write_tristate $cfg $autocfg CONFIG_FT_NORMAL_DEBUG 1 [list $notmod] 2 } else { write_tristate $cfg $autocfg CONFIG_FT_NORMAL_DEBUG 0 [list $notmod] 2 }
	if { $tmpvar_9 == "Excessive" } then { write_tristate $cfg $autocfg CONFIG_FT_FULL_DEBUG 1 [list $notmod] 2 } else { write_tristate $cfg $autocfg CONFIG_FT_FULL_DEBUG 0 [list $notmod] 2 }
	if { $tmpvar_9 == "Reduced" } then { write_tristate $cfg $autocfg CONFIG_FT_NO_TRACE 1 [list $notmod] 2 } else { write_tristate $cfg $autocfg CONFIG_FT_NO_TRACE 0 [list $notmod] 2 }
	if { $tmpvar_9 == "None" } then { write_tristate $cfg $autocfg CONFIG_FT_NO_TRACE_AT_ALL 1 [list $notmod] 2 } else { write_tristate $cfg $autocfg CONFIG_FT_NO_TRACE_AT_ALL 0 [list $notmod] 2 }}
	if {($CONFIG_FTAPE != 0)} then {write_comment $cfg $autocfg "Hardware configuration"}
	global tmpvar_10
	if {($CONFIG_FTAPE != 0)} then {
	if { $tmpvar_10 == "Standard" } then { write_tristate $cfg $autocfg CONFIG_FT_STD_FDC 1 [list $notmod] 2 } else { write_tristate $cfg $autocfg CONFIG_FT_STD_FDC 0 [list $notmod] 2 }
	if { $tmpvar_10 == "MACH-2" } then { write_tristate $cfg $autocfg CONFIG_FT_MACH2 1 [list $notmod] 2 } else { write_tristate $cfg $autocfg CONFIG_FT_MACH2 0 [list $notmod] 2 }
	if { $tmpvar_10 == "FC-10/FC-20" } then { write_tristate $cfg $autocfg CONFIG_FT_PROBE_FC10 1 [list $notmod] 2 } else { write_tristate $cfg $autocfg CONFIG_FT_PROBE_FC10 0 [list $notmod] 2 }
	if { $tmpvar_10 == "Alt/82078" } then { write_tristate $cfg $autocfg CONFIG_FT_ALT_FDC 1 [list $notmod] 2 } else { write_tristate $cfg $autocfg CONFIG_FT_ALT_FDC 0 [list $notmod] 2 }}
	global CONFIG_FT_STD_FDC
	if {($CONFIG_FTAPE != 0) && ($CONFIG_FT_STD_FDC != 1)} then {write_comment $cfg $autocfg "   Consult the manuals of your tape drive for the correct settings!"}
	global CONFIG_FT_FDC_BASE
	if {($CONFIG_FTAPE != 0) && ($CONFIG_FT_STD_FDC != 1)} then {write_hex $cfg $autocfg CONFIG_FT_FDC_BASE $CONFIG_FT_FDC_BASE $notmod }
	global CONFIG_FT_FDC_IRQ
	if {($CONFIG_FTAPE != 0) && ($CONFIG_FT_STD_FDC != 1)} then {write_int $cfg $autocfg CONFIG_FT_FDC_IRQ $CONFIG_FT_FDC_IRQ $notmod }
	global CONFIG_FT_FDC_DMA
	if {($CONFIG_FTAPE != 0) && ($CONFIG_FT_STD_FDC != 1)} then {write_int $cfg $autocfg CONFIG_FT_FDC_DMA $CONFIG_FT_FDC_DMA $notmod }
	global CONFIG_FT_FDC_THR
	if {($CONFIG_FTAPE != 0) && ($CONFIG_EXPERIMENTAL == 1)} then {write_int $cfg $autocfg CONFIG_FT_FDC_THR $CONFIG_FT_FDC_THR $notmod }
	global CONFIG_FT_FDC_MAX_RATE
	if {($CONFIG_FTAPE != 0) && ($CONFIG_EXPERIMENTAL == 1)} then {write_int $cfg $autocfg CONFIG_FT_FDC_MAX_RATE $CONFIG_FT_FDC_MAX_RATE $notmod }
	global CONFIG_FT_ALPHA_CLOCK
	if {($CONFIG_FTAPE != 0)} then {write_int $cfg $autocfg CONFIG_FT_ALPHA_CLOCK 0 $notmod }
	global CONFIG_AGP
	global CONFIG_DRM_AGP
	if {($CONFIG_DRM_AGP == 1 || $CONFIG_DRM_AGP == 2 || $CONFIG_DRM_AGP == 4)} then {write_tristate $cfg $autocfg CONFIG_AGP $CONFIG_AGP [list $CONFIG_DRM_AGP] 2 }
	global CONFIG_AGP_INTEL
	if {($CONFIG_AGP != 0)} then {write_tristate $cfg $autocfg CONFIG_AGP_INTEL $CONFIG_AGP_INTEL [list $notmod] 2 }
	global CONFIG_AGP_I810
	if {($CONFIG_AGP != 0)} then {write_tristate $cfg $autocfg CONFIG_AGP_I810 $CONFIG_AGP_I810 [list $notmod] 2 }
	global CONFIG_AGP_VIA
	if {($CONFIG_AGP != 0)} then {write_tristate $cfg $autocfg CONFIG_AGP_VIA $CONFIG_AGP_VIA [list $notmod] 2 }
	global CONFIG_AGP_AMD
	if {($CONFIG_AGP != 0)} then {write_tristate $cfg $autocfg CONFIG_AGP_AMD $CONFIG_AGP_AMD [list $notmod] 2 }
	global CONFIG_AGP_SIS
	if {($CONFIG_AGP != 0)} then {write_tristate $cfg $autocfg CONFIG_AGP_SIS $CONFIG_AGP_SIS [list $notmod] 2 }
	global CONFIG_AGP_ALI
	if {($CONFIG_AGP != 0)} then {write_tristate $cfg $autocfg CONFIG_AGP_ALI $CONFIG_AGP_ALI [list $notmod] 2 }
	global CONFIG_AGP_SWORKS
	if {($CONFIG_AGP != 0)} then {write_tristate $cfg $autocfg CONFIG_AGP_SWORKS $CONFIG_AGP_SWORKS [list $notmod] 2 }
	global CONFIG_DRM
	write_tristate $cfg $autocfg CONFIG_DRM $CONFIG_DRM [list $notmod] 2
	global CONFIG_DRM_OLD
	if {($CONFIG_DRM == 1)} then {write_tristate $cfg $autocfg CONFIG_DRM_OLD $CONFIG_DRM_OLD [list $notmod] 2 }
	if {($CONFIG_DRM == 1) && ($CONFIG_DRM_OLD == 1)} then {write_comment $cfg $autocfg "DRM 4.0 drivers"}
	global CONFIG_DRM40_TDFX
	if {($CONFIG_DRM == 1) && ($CONFIG_DRM_OLD == 1)} then {write_tristate $cfg $autocfg CONFIG_DRM40_TDFX $CONFIG_DRM40_TDFX [list $notmod] 2 }
	global CONFIG_DRM40_GAMMA
	if {($CONFIG_DRM == 1) && ($CONFIG_DRM_OLD == 1)} then {write_tristate $cfg $autocfg CONFIG_DRM40_GAMMA $CONFIG_DRM40_GAMMA [list $notmod] 2 }
	global CONFIG_DRM40_R128
	if {($CONFIG_DRM == 1) && ($CONFIG_DRM_OLD == 1) && ($CONFIG_AGP == 1 || $CONFIG_AGP == 2 || $CONFIG_AGP == 4)} then {write_tristate $cfg $autocfg CONFIG_DRM40_R128 $CONFIG_DRM40_R128 [list $CONFIG_AGP] 2 }
	global CONFIG_DRM40_RADEON
	if {($CONFIG_DRM == 1) && ($CONFIG_DRM_OLD == 1) && ($CONFIG_AGP == 1 || $CONFIG_AGP == 2 || $CONFIG_AGP == 4)} then {write_tristate $cfg $autocfg CONFIG_DRM40_RADEON $CONFIG_DRM40_RADEON [list $CONFIG_AGP] 2 }
	global CONFIG_DRM40_I810
	if {($CONFIG_DRM == 1) && ($CONFIG_DRM_OLD == 1) && ($CONFIG_AGP == 1 || $CONFIG_AGP == 2 || $CONFIG_AGP == 4)} then {write_tristate $cfg $autocfg CONFIG_DRM40_I810 $CONFIG_DRM40_I810 [list $CONFIG_AGP] 2 }
	global CONFIG_DRM40_MGA
	if {($CONFIG_DRM == 1) && ($CONFIG_DRM_OLD == 1) && ($CONFIG_AGP == 1 || $CONFIG_AGP == 2 || $CONFIG_AGP == 4)} then {write_tristate $cfg $autocfg CONFIG_DRM40_MGA $CONFIG_DRM40_MGA [list $CONFIG_AGP] 2 }
	if {($CONFIG_DRM == 1) && ($CONFIG_DRM_OLD != 1)} then {write_comment $cfg $autocfg "DRM 4.1 drivers"}
	global CONFIG_DRM_NEW
	if {($CONFIG_DRM == 1) && ($CONFIG_DRM_OLD != 1)} then {write_tristate $cfg $autocfg CONFIG_DRM_NEW $CONSTANT_Y [list $notmod] 2 }
	global CONFIG_DRM_TDFX
	if {($CONFIG_DRM == 1) && ($CONFIG_DRM_OLD != 1)} then {write_tristate $cfg $autocfg CONFIG_DRM_TDFX $CONFIG_DRM_TDFX [list $notmod] 2 }
	global CONFIG_DRM_R128
	if {($CONFIG_DRM == 1) && ($CONFIG_DRM_OLD != 1)} then {write_tristate $cfg $autocfg CONFIG_DRM_R128 $CONFIG_DRM_R128 [list $notmod] 2 }
	global CONFIG_DRM_RADEON
	if {($CONFIG_DRM == 1) && ($CONFIG_DRM_OLD != 1) && ($CONFIG_AGP == 1 || $CONFIG_AGP == 2 || $CONFIG_AGP == 4)} then {write_tristate $cfg $autocfg CONFIG_DRM_RADEON $CONFIG_DRM_RADEON [list $CONFIG_AGP] 2 }
	global CONFIG_DRM_I810
	if {($CONFIG_DRM == 1) && ($CONFIG_DRM_OLD != 1) && ($CONFIG_AGP == 1 || $CONFIG_AGP == 2 || $CONFIG_AGP == 4)} then {write_tristate $cfg $autocfg CONFIG_DRM_I810 $CONFIG_DRM_I810 [list $CONFIG_AGP] 2 }
	global CONFIG_DRM_I830
	if {($CONFIG_DRM == 1) && ($CONFIG_DRM_OLD != 1) && ($CONFIG_AGP == 1 || $CONFIG_AGP == 2 || $CONFIG_AGP == 4)} then {write_tristate $cfg $autocfg CONFIG_DRM_I830 $CONFIG_DRM_I830 [list $CONFIG_AGP] 2 }
	global CONFIG_DRM_MGA
	if {($CONFIG_DRM == 1) && ($CONFIG_DRM_OLD != 1) && ($CONFIG_AGP == 1 || $CONFIG_AGP == 2 || $CONFIG_AGP == 4)} then {write_tristate $cfg $autocfg CONFIG_DRM_MGA $CONFIG_DRM_MGA [list $CONFIG_AGP] 2 }
	global CONFIG_DRM_SIS
	if {($CONFIG_DRM == 1) && ($CONFIG_DRM_OLD != 1) && ($CONFIG_AGP == 1 || $CONFIG_AGP == 2 || $CONFIG_AGP == 4)} then {write_tristate $cfg $autocfg CONFIG_DRM_SIS $CONFIG_DRM_SIS [list $CONFIG_AGP] 2 }
	if {($CONFIG_HOTPLUG == 1 && $CONFIG_PCMCIA != 0)} then {write_comment $cfg $autocfg "PCMCIA character devices"}
	global CONFIG_PCMCIA_SERIAL_CS
	if {($CONFIG_HOTPLUG == 1 && $CONFIG_PCMCIA != 0) && ($CONFIG_SERIAL == 1 || $CONFIG_SERIAL == 2 || $CONFIG_SERIAL == 4)} then {write_tristate $cfg $autocfg CONFIG_PCMCIA_SERIAL_CS $CONFIG_PCMCIA_SERIAL_CS [list $CONFIG_SERIAL] 2 }
	global CONFIG_PCMCIA_CHRDEV
	if {($CONFIG_HOTPLUG == 1 && $CONFIG_PCMCIA != 0) && ($CONFIG_PCMCIA_SERIAL_CS == 1)} then {write_tristate $cfg $autocfg CONFIG_PCMCIA_CHRDEV $CONSTANT_Y [list $notmod] 2 }
	global CONFIG_MWAVE
	if {($CONFIG_X86 == 1)} then {write_tristate $cfg $autocfg CONFIG_MWAVE $CONFIG_MWAVE [list $notmod] 2 }
	write_comment $cfg $autocfg "Multimedia devices"
	global CONFIG_VIDEO_DEV
	write_tristate $cfg $autocfg CONFIG_VIDEO_DEV $CONFIG_VIDEO_DEV [list $notmod] 2
	if {($CONFIG_VIDEO_DEV != 0)} then {write_comment $cfg $autocfg "Video For Linux"}
	global CONFIG_VIDEO_PROC_FS
	if {($CONFIG_VIDEO_DEV != 0)} then {write_tristate $cfg $autocfg CONFIG_VIDEO_PROC_FS $CONFIG_VIDEO_PROC_FS [list $notmod] 2 }
	global CONFIG_I2C_PARPORT
	if {($CONFIG_VIDEO_DEV != 0) && ($CONFIG_PARPORT == 1 || $CONFIG_PARPORT == 2 || $CONFIG_PARPORT == 4) && ($CONFIG_I2C == 1 || $CONFIG_I2C == 2 || $CONFIG_I2C == 4)} then {write_tristate $cfg $autocfg CONFIG_I2C_PARPORT $CONFIG_I2C_PARPORT [list $CONFIG_PARPORT $CONFIG_I2C] 2 }
	if {($CONFIG_VIDEO_DEV != 0)} then {write_comment $cfg $autocfg "Video Adapters"}
	global CONFIG_VIDEO_BT848
	if {($CONFIG_VIDEO_DEV != 0) && ($CONFIG_I2C_ALGOBIT == 1 || $CONFIG_I2C_ALGOBIT == 2) && ($CONFIG_VIDEO_DEV == 1 || $CONFIG_VIDEO_DEV == 2 || $CONFIG_VIDEO_DEV == 4) && ($CONFIG_PCI == 1 || $CONFIG_PCI == 2 || $CONFIG_PCI == 4) && ($CONFIG_I2C_ALGOBIT == 1 || $CONFIG_I2C_ALGOBIT == 2 || $CONFIG_I2C_ALGOBIT == 4)} then {write_tristate $cfg $autocfg CONFIG_VIDEO_BT848 $CONFIG_VIDEO_BT848 [list $CONFIG_VIDEO_DEV $CONFIG_PCI $CONFIG_I2C_ALGOBIT] 2 }
	global CONFIG_VIDEO_LS220
	if {($CONFIG_VIDEO_DEV != 0) && ($CONFIG_VIDEO_DEV == 1 || $CONFIG_VIDEO_DEV == 2 || $CONFIG_VIDEO_DEV == 4)} then {write_tristate $cfg $autocfg CONFIG_VIDEO_LS220 $CONFIG_VIDEO_LS220 [list $CONFIG_VIDEO_DEV] 2 }
	global CONFIG_VIDEO_MARGI
	if {($CONFIG_VIDEO_DEV != 0) && ($CONFIG_PCMCIA == 1 || $CONFIG_PCMCIA == 2 || $CONFIG_PCMCIA == 4) && ($CONFIG_VIDEO_DEV == 1 || $CONFIG_VIDEO_DEV == 2 || $CONFIG_VIDEO_DEV == 4)} then {write_tristate $cfg $autocfg CONFIG_VIDEO_MARGI $CONFIG_VIDEO_MARGI [list $CONFIG_PCMCIA $CONFIG_VIDEO_DEV] 2 }
	global CONFIG_VIDEO_PMS
	if {($CONFIG_VIDEO_DEV != 0) && ($CONFIG_VIDEO_DEV == 1 || $CONFIG_VIDEO_DEV == 2 || $CONFIG_VIDEO_DEV == 4)} then {write_tristate $cfg $autocfg CONFIG_VIDEO_PMS $CONFIG_VIDEO_PMS [list $CONFIG_VIDEO_DEV] 2 }
	global CONFIG_VIDEO_BWQCAM
	if {($CONFIG_VIDEO_DEV != 0) && ($CONFIG_PARPORT != 0) && ($CONFIG_VIDEO_DEV == 1 || $CONFIG_VIDEO_DEV == 2 || $CONFIG_VIDEO_DEV == 4) && ($CONFIG_PARPORT == 1 || $CONFIG_PARPORT == 2 || $CONFIG_PARPORT == 4)} then {write_tristate $cfg $autocfg CONFIG_VIDEO_BWQCAM $CONFIG_VIDEO_BWQCAM [list $CONFIG_VIDEO_DEV $CONFIG_PARPORT] 2 }
	global CONFIG_VIDEO_CQCAM
	if {($CONFIG_VIDEO_DEV != 0) && ($CONFIG_PARPORT != 0) && ($CONFIG_EXPERIMENTAL == 1) && ($CONFIG_VIDEO_DEV == 1 || $CONFIG_VIDEO_DEV == 2 || $CONFIG_VIDEO_DEV == 4) && ($CONFIG_PARPORT == 1 || $CONFIG_PARPORT == 2 || $CONFIG_PARPORT == 4)} then {write_tristate $cfg $autocfg CONFIG_VIDEO_CQCAM $CONFIG_VIDEO_CQCAM [list $CONFIG_VIDEO_DEV $CONFIG_PARPORT] 2 }
	global CONFIG_VIDEO_W9966
	if {($CONFIG_VIDEO_DEV != 0) && ($CONFIG_PARPORT != 0) && ($CONFIG_PARPORT_1284 != 0) && ($CONFIG_VIDEO_DEV == 1 || $CONFIG_VIDEO_DEV == 2 || $CONFIG_VIDEO_DEV == 4) && ($CONFIG_PARPORT == 1 || $CONFIG_PARPORT == 2 || $CONFIG_PARPORT == 4)} then {write_tristate $cfg $autocfg CONFIG_VIDEO_W9966 $CONFIG_VIDEO_W9966 [list $CONFIG_VIDEO_DEV $CONFIG_PARPORT] 2 }
	global CONFIG_VIDEO_CPIA
	if {($CONFIG_VIDEO_DEV != 0) && ($CONFIG_VIDEO_DEV == 1 || $CONFIG_VIDEO_DEV == 2 || $CONFIG_VIDEO_DEV == 4)} then {write_tristate $cfg $autocfg CONFIG_VIDEO_CPIA $CONFIG_VIDEO_CPIA [list $CONFIG_VIDEO_DEV] 2 }
	global CONFIG_VIDEO_CPIA_PP
	if {($CONFIG_VIDEO_DEV != 0) && ($CONFIG_VIDEO_CPIA != 0) && ($CONFIG_PARPORT_1284 != 0) && ($CONFIG_VIDEO_CPIA == 1 || $CONFIG_VIDEO_CPIA == 2 || $CONFIG_VIDEO_CPIA == 4) && ($CONFIG_PARPORT == 1 || $CONFIG_PARPORT == 2 || $CONFIG_PARPORT == 4)} then {write_tristate $cfg $autocfg CONFIG_VIDEO_CPIA_PP $CONFIG_VIDEO_CPIA_PP [list $CONFIG_VIDEO_CPIA $CONFIG_PARPORT] 2 }
	global CONFIG_VIDEO_CPIA_USB
	if {($CONFIG_VIDEO_DEV != 0) && ($CONFIG_VIDEO_CPIA != 0) && ($CONFIG_USB != 0) && ($CONFIG_VIDEO_CPIA == 1 || $CONFIG_VIDEO_CPIA == 2 || $CONFIG_VIDEO_CPIA == 4) && ($CONFIG_USB == 1 || $CONFIG_USB == 2 || $CONFIG_USB == 4)} then {write_tristate $cfg $autocfg CONFIG_VIDEO_CPIA_USB $CONFIG_VIDEO_CPIA_USB [list $CONFIG_VIDEO_CPIA $CONFIG_USB] 2 }
	global CONFIG_VIDEO_SAA5249
	if {($CONFIG_VIDEO_DEV != 0) && ($CONFIG_VIDEO_DEV == 1 || $CONFIG_VIDEO_DEV == 2 || $CONFIG_VIDEO_DEV == 4) && ($CONFIG_I2C == 1 || $CONFIG_I2C == 2 || $CONFIG_I2C == 4)} then {write_tristate $cfg $autocfg CONFIG_VIDEO_SAA5249 $CONFIG_VIDEO_SAA5249 [list $CONFIG_VIDEO_DEV $CONFIG_I2C] 2 }
	global CONFIG_TUNER_3036
	if {($CONFIG_VIDEO_DEV != 0) && ($CONFIG_VIDEO_DEV == 1 || $CONFIG_VIDEO_DEV == 2 || $CONFIG_VIDEO_DEV == 4) && ($CONFIG_I2C == 1 || $CONFIG_I2C == 2 || $CONFIG_I2C == 4)} then {write_tristate $cfg $autocfg CONFIG_TUNER_3036 $CONFIG_TUNER_3036 [list $CONFIG_VIDEO_DEV $CONFIG_I2C] 2 }
	global CONFIG_VIDEO_STRADIS
	if {($CONFIG_VIDEO_DEV != 0) && ($CONFIG_EXPERIMENTAL == 1) && ($CONFIG_VIDEO_DEV == 1 || $CONFIG_VIDEO_DEV == 2 || $CONFIG_VIDEO_DEV == 4) && ($CONFIG_PCI == 1 || $CONFIG_PCI == 2 || $CONFIG_PCI == 4)} then {write_tristate $cfg $autocfg CONFIG_VIDEO_STRADIS $CONFIG_VIDEO_STRADIS [list $CONFIG_VIDEO_DEV $CONFIG_PCI] 2 }
	global CONFIG_VIDEO_ZORAN
	if {($CONFIG_VIDEO_DEV != 0) && ($CONFIG_VIDEO_DEV == 1 || $CONFIG_VIDEO_DEV == 2 || $CONFIG_VIDEO_DEV == 4) && ($CONFIG_PCI == 1 || $CONFIG_PCI == 2 || $CONFIG_PCI == 4) && ($CONFIG_I2C == 1 || $CONFIG_I2C == 2 || $CONFIG_I2C == 4)} then {write_tristate $cfg $autocfg CONFIG_VIDEO_ZORAN $CONFIG_VIDEO_ZORAN [list $CONFIG_VIDEO_DEV $CONFIG_PCI $CONFIG_I2C] 2 }
	global CONFIG_VIDEO_ZORAN_BUZ
	if {($CONFIG_VIDEO_DEV != 0) && ($CONFIG_VIDEO_ZORAN == 1 || $CONFIG_VIDEO_ZORAN == 2 || $CONFIG_VIDEO_ZORAN == 4) && ($CONFIG_VIDEO_DEV == 1 || $CONFIG_VIDEO_DEV == 2 || $CONFIG_VIDEO_DEV == 4) && ($CONFIG_PCI == 1 || $CONFIG_PCI == 2 || $CONFIG_PCI == 4) && ($CONFIG_I2C == 1 || $CONFIG_I2C == 2 || $CONFIG_I2C == 4)} then {write_tristate $cfg $autocfg CONFIG_VIDEO_ZORAN_BUZ $CONFIG_VIDEO_ZORAN_BUZ [list $CONFIG_VIDEO_ZORAN $CONFIG_VIDEO_DEV $CONFIG_PCI $CONFIG_I2C] 2 }
	global CONFIG_VIDEO_ZORAN_DC10
	if {($CONFIG_VIDEO_DEV != 0) && ($CONFIG_VIDEO_ZORAN == 1 || $CONFIG_VIDEO_ZORAN == 2 || $CONFIG_VIDEO_ZORAN == 4) && ($CONFIG_VIDEO_DEV == 1 || $CONFIG_VIDEO_DEV == 2 || $CONFIG_VIDEO_DEV == 4) && ($CONFIG_PCI == 1 || $CONFIG_PCI == 2 || $CONFIG_PCI == 4) && ($CONFIG_I2C == 1 || $CONFIG_I2C == 2 || $CONFIG_I2C == 4)} then {write_tristate $cfg $autocfg CONFIG_VIDEO_ZORAN_DC10 $CONFIG_VIDEO_ZORAN_DC10 [list $CONFIG_VIDEO_ZORAN $CONFIG_VIDEO_DEV $CONFIG_PCI $CONFIG_I2C] 2 }
	global CONFIG_VIDEO_ZORAN_LML33
	if {($CONFIG_VIDEO_DEV != 0) && ($CONFIG_VIDEO_ZORAN == 1 || $CONFIG_VIDEO_ZORAN == 2 || $CONFIG_VIDEO_ZORAN == 4) && ($CONFIG_VIDEO_DEV == 1 || $CONFIG_VIDEO_DEV == 2 || $CONFIG_VIDEO_DEV == 4) && ($CONFIG_PCI == 1 || $CONFIG_PCI == 2 || $CONFIG_PCI == 4) && ($CONFIG_I2C == 1 || $CONFIG_I2C == 2 || $CONFIG_I2C == 4)} then {write_tristate $cfg $autocfg CONFIG_VIDEO_ZORAN_LML33 $CONFIG_VIDEO_ZORAN_LML33 [list $CONFIG_VIDEO_ZORAN $CONFIG_VIDEO_DEV $CONFIG_PCI $CONFIG_I2C] 2 }
	global CONFIG_VIDEO_ZR36120
	if {($CONFIG_VIDEO_DEV != 0) && ($CONFIG_VIDEO_DEV == 1 || $CONFIG_VIDEO_DEV == 2 || $CONFIG_VIDEO_DEV == 4) && ($CONFIG_PCI == 1 || $CONFIG_PCI == 2 || $CONFIG_PCI == 4) && ($CONFIG_I2C == 1 || $CONFIG_I2C == 2 || $CONFIG_I2C == 4)} then {write_tristate $cfg $autocfg CONFIG_VIDEO_ZR36120 $CONFIG_VIDEO_ZR36120 [list $CONFIG_VIDEO_DEV $CONFIG_PCI $CONFIG_I2C] 2 }
	global CONFIG_VIDEO_MEYE
	if {($CONFIG_VIDEO_DEV != 0) && ($CONFIG_EXPERIMENTAL == 1) && ($CONFIG_VIDEO_DEV == 1 || $CONFIG_VIDEO_DEV == 2 || $CONFIG_VIDEO_DEV == 4) && ($CONFIG_PCI == 1 || $CONFIG_PCI == 2 || $CONFIG_PCI == 4) && ($CONFIG_SONYPI == 1 || $CONFIG_SONYPI == 2 || $CONFIG_SONYPI == 4)} then {write_tristate $cfg $autocfg CONFIG_VIDEO_MEYE $CONFIG_VIDEO_MEYE [list $CONFIG_VIDEO_DEV $CONFIG_PCI $CONFIG_SONYPI] 2 }
	if {($CONFIG_VIDEO_DEV != 0)} then {write_comment $cfg $autocfg "Radio Adapters"}
	global CONFIG_RADIO_CADET
	if {($CONFIG_VIDEO_DEV != 0) && ($CONFIG_VIDEO_DEV == 1 || $CONFIG_VIDEO_DEV == 2 || $CONFIG_VIDEO_DEV == 4)} then {write_tristate $cfg $autocfg CONFIG_RADIO_CADET $CONFIG_RADIO_CADET [list $CONFIG_VIDEO_DEV] 2 }
	global CONFIG_RADIO_RTRACK
	if {($CONFIG_VIDEO_DEV != 0) && ($CONFIG_VIDEO_DEV == 1 || $CONFIG_VIDEO_DEV == 2 || $CONFIG_VIDEO_DEV == 4)} then {write_tristate $cfg $autocfg CONFIG_RADIO_RTRACK $CONFIG_RADIO_RTRACK [list $CONFIG_VIDEO_DEV] 2 }
	global CONFIG_RADIO_RTRACK_PORT
	if {($CONFIG_VIDEO_DEV != 0) && ($CONFIG_RADIO_RTRACK == 1)} then {write_hex $cfg $autocfg CONFIG_RADIO_RTRACK_PORT $CONFIG_RADIO_RTRACK_PORT $notmod }
	global CONFIG_RADIO_RTRACK2
	if {($CONFIG_VIDEO_DEV != 0) && ($CONFIG_VIDEO_DEV == 1 || $CONFIG_VIDEO_DEV == 2 || $CONFIG_VIDEO_DEV == 4)} then {write_tristate $cfg $autocfg CONFIG_RADIO_RTRACK2 $CONFIG_RADIO_RTRACK2 [list $CONFIG_VIDEO_DEV] 2 }
	global CONFIG_RADIO_RTRACK2_PORT
	if {($CONFIG_VIDEO_DEV != 0) && ($CONFIG_RADIO_RTRACK2 == 1)} then {write_hex $cfg $autocfg CONFIG_RADIO_RTRACK2_PORT $CONFIG_RADIO_RTRACK2_PORT $notmod }
	global CONFIG_RADIO_AZTECH
	if {($CONFIG_VIDEO_DEV != 0) && ($CONFIG_VIDEO_DEV == 1 || $CONFIG_VIDEO_DEV == 2 || $CONFIG_VIDEO_DEV == 4)} then {write_tristate $cfg $autocfg CONFIG_RADIO_AZTECH $CONFIG_RADIO_AZTECH [list $CONFIG_VIDEO_DEV] 2 }
	global CONFIG_RADIO_AZTECH_PORT
	if {($CONFIG_VIDEO_DEV != 0) && ($CONFIG_RADIO_AZTECH == 1)} then {write_hex $cfg $autocfg CONFIG_RADIO_AZTECH_PORT $CONFIG_RADIO_AZTECH_PORT $notmod }
	global CONFIG_RADIO_GEMTEK
	if {($CONFIG_VIDEO_DEV != 0) && ($CONFIG_VIDEO_DEV == 1 || $CONFIG_VIDEO_DEV == 2 || $CONFIG_VIDEO_DEV == 4)} then {write_tristate $cfg $autocfg CONFIG_RADIO_GEMTEK $CONFIG_RADIO_GEMTEK [list $CONFIG_VIDEO_DEV] 2 }
	global CONFIG_RADIO_GEMTEK_PORT
	if {($CONFIG_VIDEO_DEV != 0) && ($CONFIG_RADIO_GEMTEK == 1)} then {write_hex $cfg $autocfg CONFIG_RADIO_GEMTEK_PORT $CONFIG_RADIO_GEMTEK_PORT $notmod }
	global CONFIG_RADIO_GEMTEK_PCI
	if {($CONFIG_VIDEO_/* $Id: semaphore.c,v 1.9 2001/11/18 00:12:56 davem Exp $
 * semaphore.c: Sparc64 semaphore implementation.
 *
 * This is basically the PPC semaphore scheme ported to use
 * the sparc64 atomic instructions, so see the PPC code for
 * credits.
 */

#include <linux/sched.h>

/*
 * Atomically update sem->count.
 * This does the equivalent of the following:
 *
 *	old_count = sem->count;
 *	tmp = MAX(old_count, 0) + incr;
 *	sem->count = tmp;
 *	return old_count;
 */
static __inline__ int __sem_update_count(struct semaphore *sem, int incr)
{
	int old_count, tmp;

	__asm__ __volatile__("\n"
"	! __sem_update_count old_count(%0) tmp(%1) incr(%4) &sem->count(%3)\n"
"1:	ldsw	[%3], %0\n"
"	mov	%0, %1\n"
"	cmp	%0, 0\n"
"	movl	%%icc, 0, %1\n"
"	add	%1, %4, %1\n"
"	cas	[%3], %0, %1\n"
"	cmp	%0, %1\n"
"	bne,pn	%%icc, 1b\n"
"	 membar #StoreLoad | #StoreStore\n"
	: "=&r" (old_count), "=&r" (tmp), "=m" (sem->count)
	: "r" (&sem->count), "r" (incr), "m" (sem->count)
	: "cc");

	return old_count;
}

void __up(struct semaphore *sem)
{
	__sem_update_count(sem, 1);
	wake_up(&sem->wait);
}

void __down(struct semaphore * sem)
{
	struct task_struct *tsk = current;
	DECLARE_WAITQUEUE(wait, tsk);

	tsk->state = TASK_UNINTERRUPTIBLE;
	add_wait_queue_exclusive(&sem->wait, &wait);

	while (__sem_update_count(sem, -1) <= 0) {
		schedule();
		tsk->state = TASK_UNINTERRUPTIBLE;
	}
	remove_wait_queue(&sem->wait, &wait);
	tsk->state = TASK_RUNNING;

	wake_up(&sem->wait);
}

int __down_interruptible(struct semaphore * sem)
{
	int retval = 0;
	struct task_struct *tsk = current;
	DECLARE_WAITQUEUE(wait, tsk);

	tsk->state = TASK_INTERRUPTIBLE;
	add_wait_queue_exclusive(&sem->wait, &wait);

	while (__sem_update_count(sem, -1) <= 0) {
		if (signal_pending(current)) {
			__sem_update_count(sem, 0);
			retval = -EINTR;
			break;
		}
		schedule();
		tsk->state = TASK_INTERRUPTIBLE;
	}
	tsk->state = TASK_RUNNING;
	remove_wait_queue(&sem->wait, &wait);
	wake_up(&sem->wait);
	return retval;
}
/* $Id: iommu_common.c,v 1.6.2.1 2001/12/11 22:47:27 davem Exp $
 * iommu_common.c: UltraSparc SBUS/PCI common iommu code.
 *
 * Copyright (C) 1999 David S. Miller (davem@redhat.com)
 */

#include "iommu_common.h"

/* You are _strongly_ advised to enable the following debugging code
 * any time you make changes to the sg code below, run it for a while
 * with filesystems mounted read-only before buying the farm... -DaveM
 */

#ifdef VERIFY_SG
static int verify_lengths(struct scatterlist *sg, int nents, int npages)
{
	int sg_len, dma_len;
	int i, pgcount;

	sg_len = 0;
	for (i = 0; i < nents; i++)
		sg_len += sg[i].length;

	dma_len = 0;
	for (i = 0; i < nents && sg[i].dma_length; i++)
		dma_len += sg[i].dma_length;

	if (sg_len != dma_len) {
		printk("verify_lengths: Error, different, sg[%d] dma[%d]\n",
		       sg_len, dma_len);
		return -1;
	}

	pgcount = 0;
	for (i = 0; i < nents && sg[i].dma_length; i++) {
		unsigned long start, end;

		start = sg[i].dma_address;
		start = start & IO_PAGE_MASK;

		end = sg[i].dma_address + sg[i].dma_length;
		end = (end + (IO_PAGE_SIZE - 1)) & IO_PAGE_MASK;

		pgcount += ((end - start) >> IO_PAGE_SHIFT);
	}

	if (pgcount != npages) {
		printk("verify_lengths: Error, page count wrong, "
		       "npages[%d] pgcount[%d]\n",
		       npages, pgcount);
		return -1;
	}

	/* This test passes... */
	return 0;
}

static int verify_one_map(struct scatterlist *dma_sg, struct scatterlist **__sg, int nents, iopte_t **__iopte)
{
	struct scatterlist *sg = *__sg;
	iopte_t *iopte = *__iopte;
	u32 dlen = dma_sg->dma_length;
	u32 daddr;
	unsigned int sglen;
	unsigned long sgaddr;

	daddr = dma_sg->dma_address;
	sglen = sg->length;
	sgaddr = (unsigned long) (sg->address ?
				  sg->address :
				  page_address(sg->page) + sg->offset);
	while (dlen > 0) {
		unsigned long paddr;

		/* SG and DMA_SG must begin at the same sub-page boundary. */
		if ((sgaddr & ~IO_PAGE_MASK) != (daddr & ~IO_PAGE_MASK)) {
			printk("verify_one_map: Wrong start offset "
			       "sg[%08lx] dma[%08x]\n",
			       sgaddr, daddr);
			nents = -1;
			goto out;
		}

		/* Verify the IOPTE points to the right page. */
		paddr = iopte_val(*iopte) & IOPTE_PAGE;
		if ((paddr + PAGE_OFFSET) != (sgaddr & IO_PAGE_MASK)) {
			printk("verify_one_map: IOPTE[%08lx] maps the "
			       "wrong page, should be [%08lx]\n",
			       iopte_val(*iopte), (sgaddr & IO_PAGE_MASK) - PAGE_OFFSET);
			nents = -1;
			goto out;
		}

		/* If this SG crosses a page, adjust to that next page
		 * boundary and loop.
		 */
		if ((sgaddr & IO_PAGE_MASK) ^ ((sgaddr + sglen - 1) & IO_PAGE_MASK)) {
			unsigned long next_page, diff;

			next_page = (sgaddr + IO_PAGE_SIZE) & IO_PAGE_MASK;
			diff = next_page - sgaddr;
			sgaddr += diff;
			daddr += diff;
			sglen -= diff;
			dlen -= diff;
			if (dlen > 0)
				iopte++;
			continue;
		}

		/* SG wholly consumed within this page. */
		daddr += sglen;
		dlen -= sglen;

		if (dlen > 0 && ((daddr & ~IO_PAGE_MASK) == 0))
			iopte++;

		sg++;
		if (--nents <= 0)
			break;
		sgaddr = (unsigned long) (sg->address ?
					  sg->address :
					  page_address(sg->page) + sg->offset);
		sglen = sg->length;
	}
	if (dlen < 0) {
		/* Transfer overrun, big problems. */
		printk("verify_one_map: Transfer overrun by %d bytes.\n",
		       -dlen);
		nents = -1;
	} else {
		/* Advance to next dma_sg implies that the next iopte will
		 * begin it.
		 */
		iopte++;
	}

out:
	*__sg = sg;
	*__iopte = iopte;
	return nents;
}

static int verify_maps(struct scatterlist *sg, int nents, iopte_t *iopte)
{
	struct scatterlist *dma_sg = sg;
	struct scatterlist *orig_dma_sg = dma_sg;
	int orig_nents = nents;

	for (;;) {
		nents = verify_one_map(dma_sg, &sg, nents, &iopte);
		if (nents <= 0)
			break;
		dma_sg++;
		if (dma_sg->dma_length == 0)
			break;
	}

	if (nents > 0) {
		printk("verify_maps: dma maps consumed by some sgs remain (%d)\n",
		       nents);
		return -1;
	}

	if (nents < 0) {
		printk("verify_maps: Error, messed up mappings, "
		       "at sg %d dma_sg %d\n",
		       (int) (orig_nents + nents), (int) (dma_sg - orig_dma_sg));
		return -1;
	}

	/* This test passes... */
	return 0;
}

void verify_sglist(struct scatterlist *sg, int nents, iopte_t *iopte, int npages)
{
	if (verify_lengths(sg, nents, npages) < 0 ||
	    verify_maps(sg, nents, iopte) < 0) {
		int i;

		printk("verify_sglist: Crap, messed up mappings, dumping, iodma at ");
		printk("%016lx.\n", sg->dma_address & IO_PAGE_MASK);

		for (i = 0; i < nents; i++) {
			printk("sg(%d): address(%p) length(%x) "
			       "dma_address[%016lx] dma_length[%016lx]\n",
			       i,
			       sg[i].address, sg[i].length,
			       sg[i].dma_address, sg[i].dma_length);
		}
	}

	/* Seems to be ok */
}
#endif

unsigned long prepare_sg(struct scatterlist *sg, int nents)
{
	struct scatterlist *dma_sg = sg;
	unsigned long prev;
	u32 dent_addr, dent_len;

	prev  = (unsigned long) (sg->address ?
				 sg->address :
				 page_address(sg->page) + sg->offset);
	prev += (unsigned long) (dent_len = sg->length);
	dent_addr = (u32) ((unsigned long)(sg->address ?
					   sg->address :
					   page_address(sg->page) + sg->offset)
			   & (IO_PAGE_SIZE - 1UL));
	while (--nents) {
		unsigned long addr;

		sg++;
		addr = (unsigned long) (sg->address ?
					sg->address :
					page_address(sg->page) + sg->offset);
		if (! VCONTIG(prev, addr)) {
			dma_sg->dma_address = dent_addr;
			dma_sg->dma_length = dent_len;
			dma_sg++;

			dent_addr = ((dent_addr +
				      dent_len +
				      (IO_PAGE_SIZE - 1UL)) >> IO_PAGE_SHIFT);
			dent_addr <<= IO_PAGE_SHIFT;
			dent_addr += addr & (IO_PAGE_SIZE - 1UL);
			dent_len = 0;
		}
		dent_len += sg->length;
		prev = addr + sg->length;
	}
	dma_sg->dma_address = dent_addr;
	dma_sg->dma_length = dent_len;

	return ((unsigned long) dent_addr +
		(unsigned long) dent_len +
		(IO_PAGE_SIZE - 1UL)) >> IO_PAGE_SHIFT;
}
/* $Id: iommu_common.h,v 1.4.2.1 2001/12/11 22:47:27 davem Exp $
 * iommu_common.h: UltraSparc SBUS/PCI common iommu declarations.
 *
 * Copyright (C) 1999 David S. Miller (davem@redhat.com)
 */

#include <linux/kernel.h>
#include <linux/types.h>
#include <linux/sched.h>
#include <linux/mm.h>

#include <asm/iommu.h>
#include <asm/scatterlist.h>

/*
 * These give mapping size of each iommu pte/tlb.
 */
#define IO_PAGE_SHIFT			13
#define IO_PAGE_SIZE			(1UL << IO_PAGE_SHIFT)
#define IO_PAGE_MASK			(~(IO_PAGE_SIZE-1))
#define IO_PAGE_ALIGN(addr)		(((addr)+IO_PAGE_SIZE-1)&IO_PAGE_MASK)

#define IO_TSB_ENTRIES			(128*1024)
#define IO_TSB_SIZE			(IO_TSB_ENTRIES * 8)

/*
 * This is the hardwired shift in the iotlb tag/data parts.
 */
#define IOMMU_PAGE_SHIFT		13

/* You are _strongly_ advised to enable the following debugging code
 * any time you make changes to the sg code below, run it for a while
 * with filesystems mounted read-only before buying the farm... -DaveM
 */
#undef VERIFY_SG

#ifdef VERIFY_SG
extern void verify_sglist(struct scatterlist *sg, int nents, iopte_t *iopte, int npages);
#endif

/* Two addresses are "virtually contiguous" if and only if:
 * 1) They are equal, or...
 * 2) They are both on a page boundry
 */
#define VCONTIG(__X, __Y)	(((__X) == (__Y)) || \
				 (((__X) | (__Y)) << (64UL - PAGE_SHIFT)) == 0UL)

extern unsigned long prepare_sg(struct scatterlist *sg, int nents);
aachba.o: aachba.c \
   /home/me/kernel/linux/include/linux/kernel.h \
   /home/me/kernel/linux/include/linux/init.h \
   /home/me/kernel/linux/include/linux/types.h \
   /home/me/kernel/linux/include/linux/sched.h \
   /home/me/kernel/linux/include/linux/pci.h \
   /home/me/kernel/linux/include/linux/spinlock.h \
   /home/me/kernel/linux/include/linux/slab.h \
   /home/me/kernel/linux/include/linux/completion.h \
   /home/me/kernel/linux/include/asm/semaphore.h \
   /home/me/kernel/linux/include/asm/uaccess.h \
   /home/me/kernel/linux/include/linux/blk.h \
   /home/me/kernel/linux/drivers/scsi/scsi.h \
   /home/me/kernel/linux/drivers/scsi/hosts.h \
   /home/me/kernel/linux/drivers/scsi/sd.h \
   aacraid.h
commctrl.o: commctrl.c \
   /home/me/kernel/linux/include/linux/kernel.h \
   /home/me/kernel/linux/include/linux/init.h \
   /home/me/kernel/linux/include/linux/types.h \
   /home/me/kernel/linux/include/linux/sched.h \
   /home/me/kernel/linux/include/linux/pci.h \
   /home/me/kernel/linux/include/linux/spinlock.h \
   /home/me/kernel/linux/include/linux/slab.h \
   /home/me/kernel/linux/include/linux/completion.h \
   /home/me/kernel/linux/include/linux/blk.h \
   /home/me/kernel/linux/include/asm/semaphore.h \
   /home/me/kernel/linux/include/asm/uaccess.h \
   /home/me/kernel/linux/drivers/scsi/scsi.h \
   /home/me/kernel/linux/drivers/scsi/hosts.h \
   aacraid.h
comminit.o: comminit.c \
   /home/me/kernel/linux/include/linux/kernel.h \
   /home/me/kernel/linux/include/linux/init.h \
   /home/me/kernel/linux/include/linux/types.h \
   /home/me/kernel/linux/include/linux/sched.h \
   /home/me/kernel/linux/include/linux/pci.h \
   /home/me/kernel/linux/include/linux/spinlock.h \
   /home/me/kernel/linux/include/linux/slab.h \
   /home/me/kernel/linux/include/linux/blk.h \
   /home/me/kernel/linux/include/asm/semaphore.h \
   /home/me/kernel/linux/drivers/scsi/scsi.h \
   /home/me/kernel/linux/drivers/scsi/hosts.h \
   aacraid.h
commsup.o: commsup.c \
   /home/me/kernel/linux/include/linux/kernel.h \
   /home/me/kernel/linux/include/linux/init.h \
   /home/me/kernel/linux/include/linux/types.h \
   /home/me/kernel/linux/include/linux/sched.h \
   /home/me/kernel/linux/include/linux/pci.h \
   /home/me/kernel/linux/include/linux/spinlock.h \
   /home/me/kernel/linux/include/linux/slab.h \
   /home/me/kernel/linux/include/linux/completion.h \
   /home/me/kernel/linux/include/asm/semaphore.h \
   /home/me/kernel/linux/include/linux/blk.h \
   /home/me/kernel/linux/drivers/scsi/scsi.h \
   /home/me/kernel/linux/drivers/scsi/hosts.h \
   aacraid.h
dpcsup.o: dpcsup.c \
   /home/me/kernel/linux/include/linux/kernel.h \
   /home/me/kernel/linux/include/linux/init.h \
   /home/me/kernel/linux/include/linux/types.h \
   /home/me/kernel/linux/include/linux/sched.h \
   /home/me/kernel/linux/include/linux/pci.h \
   /home/me/kernel/linux/include/linux/spinlock.h \
   /home/me/kernel/linux/include/linux/slab.h \
   /home/me/kernel/linux/include/linux/completion.h \
   /home/me/kernel/linux/include/linux/blk.h \
   /home/me/kernel/linux/include/asm/semaphore.h \
   /home/me/kernel/linux/drivers/scsi/scsi.h \
   /home/me/kernel/linux/drivers/scsi/hosts.h \
   aacraid.h
linit.o: linit.c \
   /home/me/kernel/linux/include/linux/module.h \
   /home/me/kernel/linux/include/linux/kernel.h \
   /home/me/kernel/linux/include/linux/init.h \
   /home/me/kernel/linux/include/linux/types.h \
   /home/me/kernel/linux/include/linux/sched.h \
   /home/me/kernel/linux/include/linux/pci.h \
   /home/me/kernel/linux/include/linux/spinlock.h \
   /home/me/kernel/linux/include/linux/slab.h \
   /home/me/kernel/linux/include/linux/completion.h \
   /home/me/kernel/linux/include/asm/semaphore.h \
   /home/me/kernel/linux/include/linux/blk.h \
   /home/me/kernel/linux/drivers/scsi/scsi.h \
   /home/me/kernel/linux/drivers/scsi/hosts.h \
   aacraid.h \
   /home/me/kernel/linux/drivers/scsi/sd.h \
   /home/me/kernel/linux/drivers/scsi/scsi_module.c
rx.o: rx.c \
   /home/me/kernel/linux/include/linux/kernel.h \
   /home/me/kernel/linux/include/linux/init.h \
   /home/me/kernel/linux/include/linux/types.h \
   /home/me/kernel/linux/include/linux/sched.h \
   /home/me/kernel/linux/include/linux/pci.h \
   /home/me/kernel/linux/include/linux/spinlock.h \
   /home/me/kernel/linux/include/linux/slab.h \
   /home/me/kernel/linux/include/linux/blk.h \
   /home/me/kernel/linux/include/linux/delay.h \
   /home/me/kernel/linux/include/linux/completion.h \
   /home/me/kernel/linux/include/asm/semaphore.h \
   /home/me/kernel/linux/drivers/scsi/scsi.h \
   /home/me/kernel/linux/drivers/scsi/hosts.h \
   aacraid.h
sap1sup.o: sap1sup.c \
   /home/me/kernel/linux/include/linux/kernel.h \
   /home/me/kernel/linux/include/linux/init.h \
   /home/me/kernel/linux/include/linux/types.h \
   /home/me/kernel/linux/include/linux/sched.h \
   /home/me/kernel/linux/include/linux/pci.h \
   /home/me/kernel/linux/include/linux/spinlock.h \
   /home/me/kernel/linux/include/linux/slab.h \
   /home/me/kernel/linux/include/linux/blk.h \
   /home/me/kernel/linux/include/linux/delay.h \
   /home/me/kernel/linux/include/linux/completion.h \
   /home/me/kernel/linux/include/asm/semaphore.h \
   /home/me/kernel/linux/drivers/scsi/scsi.h \
   /home/me/kernel/linux/drivers/scsi/hosts.h \
   aacraid.h
DEV != 0) && ($CONFIG_VIDEO_DEV == 1 || $CONFIG_VIDEO_DEV == 2 || $CONFIG_VIDEO_DEV == 4) && ($CONFIG_PCI == 1 || $CONFIG_PCI == 2 || $CONFIG_PCI == 4)} then {write_tristate $cfg $autocfg CONFIG_RADIO_GEMTEK_PCI $CONFIG_RADIO_GEMTEK_PCI [list $CONFIG_VIDEO_DEV $CONFIG_PCI] 2 }
	global CONFIG_RADIO_MAXIRADIO
	if {($CONFIG_VIDEO_DEV != 0) && ($CONFIG_VIDEO_DEV == 1 || $CONFIG_VIDEO_DEV == 2 || $CONFIG_VIDEO_DEV == 4)} then {write_tristate $cfg $autocfg CONFIG_RADIO_MAXIRADIO $CONFIG_RADIO_MAXIRADIO [list $CONFIG_VIDEO_DEV] 2 }
	global CONFIG_RADIO_MAESTRO
	if {($CONFIG_VIDEO_DEV != 0) && ($CONFIG_VIDEO_DEV == 1 || $CONFIG_VIDEO_DEV == 2 || $CONFIG_VIDEO_DEV == 4)} then {write_tristate $cfg $autocfg CONFIG_RADIO_MAESTRO $CONFIG_RADIO_MAESTRO [list $CONFIG_VIDEO_DEV] 2 }
	global CONFIG_RADIO_MIROPCM20
	global CONFIG_SOUND_ACI_MIXER
	if {($CONFIG_VIDEO_DEV != 0) && ($CONFIG_VIDEO_DEV == 1 || $CONFIG_VIDEO_DEV == 2 || $CONFIG_VIDEO_DEV == 4) && ($CONFIG_SOUND_ACI_MIXER == 1 || $CONFIG_SOUND_ACI_MIXER == 2 || $CONFIG_SOUND_ACI_MIXER == 4)} then {write_tristate $cfg $autocfg CONFIG_RADIO_MIROPCM20 $CONFIG_RADIO_MIROPCM20 [list $CONFIG_VIDEO_DEV $CONFIG_SOUND_ACI_MIXER] 2 }
	global CONFIG_RADIO_MIROPCM20_RDS
	if {($CONFIG_VIDEO_DEV != 0) && ($CONFIG_RADIO_MIROPCM20 == 1 || $CONFIG_RADIO_MIROPCM20 == 2 || $CONFIG_RADIO_MIROPCM20 == 4) && ($CONFIG_EXPERIMENTAL == 1 || $CONFIG_EXPERIMENTAL == 2 || $CONFIG_EXPERIMENTAL == 4)} then {write_tristate $cfg $autocfg CONFIG_RADIO_MIROPCM20_RDS $CONFIG_RADIO_MIROPCM20_RDS [list $CONFIG_RADIO_MIROPCM20 $CONFIG_EXPERIMENTAL] 2 }
	global CONFIG_RADIO_SF16FMI
	if {($CONFIG_VIDEO_DEV != 0) && ($CONFIG_VIDEO_DEV == 1 || $CONFIG_VIDEO_DEV == 2 || $CONFIG_VIDEO_DEV == 4)} then {write_tristate $cfg $autocfg CONFIG_RADIO_SF16FMI $CONFIG_RADIO_SF16FMI [list $CONFIG_VIDEO_DEV] 2 }
	global CONFIG_RADIO_TERRATEC
	if {($CONFIG_VIDEO_DEV != 0) && ($CONFIG_VIDEO_DEV == 1 || $CONFIG_VIDEO_DEV == 2 || $CONFIG_VIDEO_DEV == 4)} then {write_tristate $cfg $autocfg CONFIG_RADIO_TERRATEC $CONFIG_RADIO_TERRATEC [list $CONFIG_VIDEO_DEV] 2 }
	global CONFIG_RADIO_TERRATEC_PORT
	if {($CONFIG_VIDEO_DEV != 0) && ($CONFIG_RADIO_TERRATEC == 1)} then {write_hex $cfg $autocfg CONFIG_RADIO_TERRATEC_PORT $CONFIG_RADIO_TERRATEC_PORT $notmod }
	global CONFIG_RADIO_TRUST
	if {($CONFIG_VIDEO_DEV != 0) && ($CONFIG_VIDEO_DEV == 1 || $CONFIG_VIDEO_DEV == 2 || $CONFIG_VIDEO_DEV == 4)} then {write_tristate $cfg $autocfg CONFIG_RADIO_TRUST $CONFIG_RADIO_TRUST [list $CONFIG_VIDEO_DEV] 2 }
	global CONFIG_RADIO_TRUST_PORT
	if {($CONFIG_VIDEO_DEV != 0) && ($CONFIG_RADIO_TRUST == 1)} then {write_hex $cfg $autocfg CONFIG_RADIO_TRUST_PORT $CONFIG_RADIO_TRUST_PORT $notmod }
	global CONFIG_RADIO_TYPHOON
	if {($CONFIG_VIDEO_DEV != 0) && ($CONFIG_VIDEO_DEV == 1 || $CONFIG_VIDEO_DEV == 2 || $CONFIG_VIDEO_DEV == 4)} then {write_tristate $cfg $autocfg CONFIG_RADIO_TYPHOON $CONFIG_RADIO_TYPHOON [list $CONFIG_VIDEO_DEV] 2 }
	global CONFIG_RADIO_TYPHOON_PROC_FS
	if {($CONFIG_VIDEO_DEV != 0) && ($CONFIG_PROC_FS == 1) && ($CONFIG_RADIO_TYPHOON != 0)} then {write_tristate $cfg $autocfg CONFIG_RADIO_TYPHOON_PROC_FS $CONFIG_RADIO_TYPHOON_PROC_FS [list $notmod] 2 }
	global CONFIG_RADIO_TYPHOON_PORT
	if {($CONFIG_VIDEO_DEV != 0) && ($CONFIG_RADIO_TYPHOON == 1)} then {write_hex $cfg $autocfg CONFIG_RADIO_TYPHOON_PORT $CONFIG_RADIO_TYPHOON_PORT $notmod }
	global CONFIG_RADIO_TYPHOON_MUTEFREQ
	if {($CONFIG_VIDEO_DEV != 0) && ($CONFIG_RADIO_TYPHOON == 1)} then {write_int $cfg $autocfg CONFIG_RADIO_TYPHOON_MUTEFREQ $CONFIG_RADIO_TYPHOON_MUTEFREQ $notmod }
	global CONFIG_RADIO_ZOLTRIX
	if {($CONFIG_VIDEO_DEV != 0) && ($CONFIG_VIDEO_DEV == 1 || $CONFIG_VIDEO_DEV == 2 || $CONFIG_VIDEO_DEV == 4)} then {write_tristate $cfg $autocfg CONFIG_RADIO_ZOLTRIX $CONFIG_RADIO_ZOLTRIX [list $CONFIG_VIDEO_DEV] 2 }
	global CONFIG_RADIO_ZOLTRIX_PORT
	if {($CONFIG_VIDEO_DEV != 0) && ($CONFIG_RADIO_ZOLTRIX == 1)} then {write_hex $cfg $autocfg CONFIG_RADIO_ZOLTRIX_PORT $CONFIG_RADIO_ZOLTRIX_PORT $notmod }
	write_comment $cfg $autocfg "File systems"
	global CONFIG_QUOTA
	write_tristate $cfg $autocfg CONFIG_QUOTA $CONFIG_QUOTA [list $notmod] 2
	global CONFIG_AUTOFS_FS
	write_tristate $cfg $autocfg CONFIG_AUTOFS_FS $CONFIG_AUTOFS_FS [list $notmod] 2
	global CONFIG_AUTOFS4_FS
	write_tristate $cfg $autocfg CONFIG_AUTOFS4_FS $CONFIG_AUTOFS4_FS [list $notmod] 2
	global CONFIG_REISERFS_FS
	write_tristate $cfg $autocfg CONFIG_REISERFS_FS $CONFIG_REISERFS_FS [list $notmod] 2
	global CONFIG_REISERFS_CHECK
	if {($CONFIG_REISERFS_FS == 1 || $CONFIG_REISERFS_FS == 2 || $CONFIG_REISERFS_FS == 4)} then {write_tristate $cfg $autocfg CONFIG_REISERFS_CHECK $CONFIG_REISERFS_CHECK [list $CONFIG_REISERFS_FS] 1 }
	global CONFIG_REISERFS_PROC_INFO
	if {($CONFIG_REISERFS_FS == 1 || $CONFIG_REISERFS_FS == 2 || $CONFIG_REISERFS_FS == 4)} then {write_tristate $cfg $autocfg CONFIG_REISERFS_PROC_INFO $CONFIG_REISERFS_PROC_INFO [list $CONFIG_REISERFS_FS] 1 }
	global CONFIG_ADFS_FS
	if {($CONFIG_EXPERIMENTAL == 1 || $CONFIG_EXPERIMENTAL == 2 || $CONFIG_EXPERIMENTAL == 4)} then {write_tristate $cfg $autocfg CONFIG_ADFS_FS $CONFIG_ADFS_FS [list $CONFIG_EXPERIMENTAL] 2 }
	global CONFIG_ADFS_FS_RW
	if {($CONFIG_ADFS_FS == 1 || $CONFIG_ADFS_FS == 2 || $CONFIG_ADFS_FS == 4) && ($CONFIG_EXPERIMENTAL == 1 || $CONFIG_EXPERIMENTAL == 2 || $CONFIG_EXPERIMENTAL == 4)} then {write_tristate $cfg $autocfg CONFIG_ADFS_FS_RW $CONFIG_ADFS_FS_RW [list $CONFIG_ADFS_FS $CONFIG_EXPERIMENTAL] 1 }
	global CONFIG_AFFS_FS
	if {($CONFIG_EXPERIMENTAL == 1 || $CONFIG_EXPERIMENTAL == 2 || $CONFIG_EXPERIMENTAL == 4)} then {write_tristate $cfg $autocfg CONFIG_AFFS_FS $CONFIG_AFFS_FS [list $CONFIG_EXPERIMENTAL] 2 }
	global CONFIG_HFS_FS
	if {($CONFIG_EXPERIMENTAL == 1 || $CONFIG_EXPERIMENTAL == 2 || $CONFIG_EXPERIMENTAL == 4)} then {write_tristate $cfg $autocfg CONFIG_HFS_FS $CONFIG_HFS_FS [list $CONFIG_EXPERIMENTAL] 2 }
	global CONFIG_BEFS_FS
	if {($CONFIG_EXPERIMENTAL == 1 || $CONFIG_EXPERIMENTAL == 2 || $CONFIG_EXPERIMENTAL == 4)} then {write_tristate $cfg $autocfg CONFIG_BEFS_FS $CONFIG_BEFS_FS [list $CONFIG_EXPERIMENTAL] 2 }
	global CONFIG_BEFS_DEBUG
	if {($CONFIG_BEFS_FS == 1 || $CONFIG_BEFS_FS == 2 || $CONFIG_BEFS_FS == 4)} then {write_tristate $cfg $autocfg CONFIG_BEFS_DEBUG $CONFIG_BEFS_DEBUG [list $CONFIG_BEFS_FS] 1 }
	global CONFIG_BFS_FS
	if {($CONFIG_EXPERIMENTAL == 1 || $CONFIG_EXPERIMENTAL == 2 || $CONFIG_EXPERIMENTAL == 4)} then {write_tristate $cfg $autocfg CONFIG_BFS_FS $CONFIG_BFS_FS [list $CONFIG_EXPERIMENTAL] 2 }
	global CONFIG_EXT3_FS
	write_tristate $cfg $autocfg CONFIG_EXT3_FS $CONFIG_EXT3_FS [list $notmod] 2
	global CONFIG_JBD
	write_tristate $cfg $autocfg CONFIG_JBD $CONFIG_JBD [list $notmod] 2
	global CONFIG_JBD_DEBUG
	if {($CONFIG_JBD == 1 || $CONFIG_JBD == 2 || $CONFIG_JBD == 4)} then {write_tristate $cfg $autocfg CONFIG_JBD_DEBUG $CONFIG_JBD_DEBUG [list $CONFIG_JBD] 1 }
	global CONFIG_FAT_FS
	write_tristate $cfg $autocfg CONFIG_FAT_FS $CONFIG_FAT_FS [list $notmod] 2
	global CONFIG_MSDOS_FS
	if {($CONFIG_FAT_FS == 1 || $CONFIG_FAT_FS == 2 || $CONFIG_FAT_FS == 4)} then {write_tristate $cfg $autocfg CONFIG_MSDOS_FS $CONFIG_MSDOS_FS [list $CONFIG_FAT_FS] 2 }
	global CONFIG_UMSDOS_FS
	if {($CONFIG_MSDOS_FS == 1 || $CONFIG_MSDOS_FS == 2 || $CONFIG_MSDOS_FS == 4)} then {write_tristate $cfg $autocfg CONFIG_UMSDOS_FS $CONFIG_UMSDOS_FS [list $CONFIG_MSDOS_FS] 2 }
	global CONFIG_VFAT_FS
	if {($CONFIG_FAT_FS == 1 || $CONFIG_FAT_FS == 2 || $CONFIG_FAT_FS == 4)} then {write_tristate $cfg $autocfg CONFIG_VFAT_FS $CONFIG_VFAT_FS [list $CONFIG_FAT_FS] 2 }
	global CONFIG_EFS_FS
	if {($CONFIG_EXPERIMENTAL == 1 || $CONFIG_EXPERIMENTAL == 2 || $CONFIG_EXPERIMENTAL == 4)} then {write_tristate $cfg $autocfg CONFIG_EFS_FS $CONFIG_EFS_FS [list $CONFIG_EXPERIMENTAL] 2 }
	global CONFIG_JFFS_FS
	if {($CONFIG_MTD == 1 || $CONFIG_MTD == 2 || $CONFIG_MTD == 4)} then {write_tristate $cfg $autocfg CONFIG_JFFS_FS $CONFIG_JFFS_FS [list $CONFIG_MTD] 2 }
	global CONFIG_JFFS_FS_VERBOSE
	if {($CONFIG_JFFS_FS == 1 || $CONFIG_JFFS_FS == 2)} then {write_int $cfg $autocfg CONFIG_JFFS_FS_VERBOSE $CONFIG_JFFS_FS_VERBOSE $notmod }
	global CONFIG_JFFS_PROC_FS
	if {($CONFIG_JFFS_FS == 1 || $CONFIG_JFFS_FS == 2)} then {write_tristate $cfg $autocfg CONFIG_JFFS_PROC_FS $CONFIG_JFFS_PROC_FS [list $notmod] 2 }
	global CONFIG_JFFS2_FS
	if {($CONFIG_MTD == 1 || $CONFIG_MTD == 2 || $CONFIG_MTD == 4)} then {write_tristate $cfg $autocfg CONFIG_JFFS2_FS $CONFIG_JFFS2_FS [list $CONFIG_MTD] 2 }
	global CONFIG_JFFS2_FS_DEBUG
	if {($CONFIG_JFFS2_FS == 1 || $CONFIG_JFFS2_FS == 2)} then {write_int $cfg $autocfg CONFIG_JFFS2_FS_DEBUG $CONFIG_JFFS2_FS_DEBUG $notmod }
	global CONFIG_CRAMFS
	write_tristate $cfg $autocfg CONFIG_CRAMFS $CONFIG_CRAMFS [list $notmod] 2
	global CONFIG_TMPFS
	write_tristate $cfg $autocfg CONFIG_TMPFS $CONFIG_TMPFS [list $notmod] 2
	global CONFIG_RAMFS
	write_tristate $cfg $autocfg CONFIG_RAMFS $CONFIG_RAMFS [list $notmod] 2
	global CONFIG_ISO9660_FS
	write_tristate $cfg $autocfg CONFIG_ISO9660_FS $CONFIG_ISO9660_FS [list $notmod] 2
	global CONFIG_JOLIET
	if {($CONFIG_ISO9660_FS == 1 || $CONFIG_ISO9660_FS == 2 || $CONFIG_ISO9660_FS == 4)} then {write_tristate $cfg $autocfg CONFIG_JOLIET $CONFIG_JOLIET [list $CONFIG_ISO9660_FS] 1 }
	global CONFIG_ZISOFS
	if {($CONFIG_ISO9660_FS == 1 || $CONFIG_ISO9660_FS == 2 || $CONFIG_ISO9660_FS == 4)} then {write_tristate $cfg $autocfg CONFIG_ZISOFS $CONFIG_ZISOFS [list $CONFIG_ISO9660_FS] 1 }
	global CONFIG_JFS_FS
	write_tristate $cfg $autocfg CONFIG_JFS_FS $CONFIG_JFS_FS [list $notmod] 2
	global CONFIG_JFS_DEBUG
	if {($CONFIG_JFS_FS == 1 || $CONFIG_JFS_FS == 2 || $CONFIG_JFS_FS == 4)} then {write_tristate $cfg $autocfg CONFIG_JFS_DEBUG $CONFIG_JFS_DEBUG [list $CONFIG_JFS_FS] 1 }
	global CONFIG_JFS_STATISTICS
	if {($CONFIG_JFS_FS == 1 || $CONFIG_JFS_FS == 2 || $CONFIG_JFS_FS == 4)} then {write_tristate $cfg $autocfg CONFIG_JFS_STATISTICS $CONFIG_JFS_STATISTICS [list $CONFIG_JFS_FS] 1 }
	global CONFIG_MINIX_FS
	write_tristate $cfg $autocfg CONFIG_MINIX_FS $CONFIG_MINIX_FS [list $notmod] 2
	global CONFIG_VXFS_FS
	write_tristate $cfg $autocfg CONFIG_VXFS_FS $CONFIG_VXFS_FS [list $notmod] 2
	global CONFIG_NTFS_FS
	write_tristate $cfg $autocfg CONFIG_NTFS_FS $CONFIG_NTFS_FS [list $notmod] 2
	global CONFIG_NTFS_RW
	if {($CONFIG_NTFS_FS == 1 || $CONFIG_NTFS_FS == 2 || $CONFIG_NTFS_FS == 4) && ($CONFIG_EXPERIMENTAL == 1 || $CONFIG_EXPERIMENTAL == 2 || $CONFIG_EXPERIMENTAL == 4)} then {write_tristate $cfg $autocfg CONFIG_NTFS_RW $CONFIG_NTFS_RW [list $CONFIG_NTFS_FS $CONFIG_EXPERIMENTAL] 1 }
	global CONFIG_HPFS_FS
	write_tristate $cfg $autocfg CONFIG_HPFS_FS $CONFIG_HPFS_FS [list $notmod] 2
	write_tristate $cfg $autocfg CONFIG_PROC_FS $CONFIG_PROC_FS [list $notmod] 2
	global CONFIG_DEVFS_FS
	if {($CONFIG_EXPERIMENTAL == 1 || $CONFIG_EXPERIMENTAL == 4)} then {write_tristate $cfg $autocfg CONFIG_DEVFS_FS $CONFIG_DEVFS_FS [list $CONFIG_EXPERIMENTAL] 2 }
	global CONFIG_DEVFS_MOUNT
	if {($CONFIG_DEVFS_FS == 1 || $CONFIG_DEVFS_FS == 4)} then {write_tristate $cfg $autocfg CONFIG_DEVFS_MOUNT $CONFIG_DEVFS_MOUNT [list $CONFIG_DEVFS_FS] 2 }
	global CONFIG_DEVFS_DEBUG
	if {($CONFIG_DEVFS_FS == 1 || $CONFIG_DEVFS_FS == 4)} then {write_tristate $cfg $autocfg CONFIG_DEVFS_DEBUG $CONFIG_DEVFS_DEBUG [list $CONFIG_DEVFS_FS] 2 }
	global CONFIG_DEVPTS_FS
	if {($CONFIG_UNIX98_PTYS == 1 || $CONFIG_UNIX98_PTYS == 4)} then {write_tristate $cfg $autocfg CONFIG_DEVPTS_FS $CONFIG_DEVPTS_FS [list $CONFIG_UNIX98_PTYS] 2 }
	global CONFIG_QNX4FS_FS
	write_tristate $cfg $autocfg CONFIG_QNX4FS_FS $CONFIG_QNX4FS_FS [list $notmod] 2
	global CONFIG_QNX4FS_RW
	if {($CONFIG_QNX4FS_FS == 1 || $CONFIG_QNX4FS_FS == 2 || $CONFIG_QNX4FS_FS == 4) && ($CONFIG_EXPERIMENTAL == 1 || $CONFIG_EXPERIMENTAL == 2 || $CONFIG_EXPERIMENTAL == 4)} then {write_tristate $cfg $autocfg CONFIG_QNX4FS_RW $CONFIG_QNX4FS_RW [list $CONFIG_QNX4FS_FS $CONFIG_EXPERIMENTAL] 1 }
	global CONFIG_ROMFS_FS
	write_tristate $cfg $autocfg CONFIG_ROMFS_FS $CONFIG_ROMFS_FS [list $notmod] 2
	global CONFIG_EXT2_FS
	write_tristate $cfg $autocfg CONFIG_EXT2_FS $CONFIG_EXT2_FS [list $notmod] 2
	global CONFIG_SYSV_FS
	write_tristate $cfg $autocfg CONFIG_SYSV_FS $CONFIG_SYSV_FS [list $notmod] 2
	global CONFIG_UDF_FS
	write_tristate $cfg $autocfg CONFIG_UDF_FS $CONFIG_UDF_FS [list $notmod] 2
	global CONFIG_UDF_RW
	if {($CONFIG_UDF_FS == 1 || $CONFIG_UDF_FS == 2 || $CONFIG_UDF_FS == 4) && ($CONFIG_EXPERIMENTAL == 1 || $CONFIG_EXPERIMENTAL == 2 || $CONFIG_EXPERIMENTAL == 4)} then {write_tristate $cfg $autocfg CONFIG_UDF_RW $CONFIG_UDF_RW [list $CONFIG_UDF_FS $CONFIG_EXPERIMENTAL] 1 }
	global CONFIG_UFS_FS
	write_tristate $cfg $autocfg CONFIG_UFS_FS $CONFIG_UFS_FS [list $notmod] 2
	global CONFIG_UFS_FS_WRITE
	if {($CONFIG_UFS_FS == 1 || $CONFIG_UFS_FS == 2 || $CONFIG_UFS_FS == 4) && ($CONFIG_EXPERIMENTAL == 1 || $CONFIG_EXPERIMENTAL == 2 || $CONFIG_EXPERIMENTAL == 4)} then {write_tristate $cfg $autocfg CONFIG_UFS_FS_WRITE $CONFIG_UFS_FS_WRITE [list $CONFIG_UFS_FS $CONFIG_EXPERIMENTAL] 1 }
	if {($CONFIG_NET == 1)} then {write_comment $cfg $autocfg "Network File Systems"}
	global CONFIG_CODA_FS
	if {($CONFIG_NET == 1) && ($CONFIG_INET == 1 || $CONFIG_INET == 2 || $CONFIG_INET == 4)} then {write_tristate $cfg $autocfg CONFIG_CODA_FS $CONFIG_CODA_FS [list $CONFIG_INET] 2 }
	global CONFIG_INTERMEZZO_FS
	if {($CONFIG_NET == 1) && ($CONFIG_INET == 1 || $CONFIG_INET == 2 || $CONFIG_INET == 4) && ($CONFIG_EXPERIMENTAL == 1 || $CONFIG_EXPERIMENTAL == 2 || $CONFIG_EXPERIMENTAL == 4)} then {write_tristate $cfg $autocfg CONFIG_INTERMEZZO_FS $CONFIG_INTERMEZZO_FS [list $CONFIG_INET $CONFIG_EXPERIMENTAL] 2 }
	global CONFIG_NFS_FS
	if {($CONFIG_NET == 1) && ($CONFIG_INET == 1 || $CONFIG_INET == 2 || $CONFIG_INET == 4)} then {write_tristate $cfg $autocfg CONFIG_NFS_FS $CONFIG_NFS_FS [list $CONFIG_INET] 2 }
	global CONFIG_NFS_V3
	if {($CONFIG_NET == 1) && ($CONFIG_NFS_FS == 1 || $CONFIG_NFS_FS == 2 || $CONFIG_NFS_FS == 4)} then {write_tristate $cfg $autocfg CONFIG_NFS_V3 $CONFIG_NFS_V3 [list $CONFIG_NFS_FS] 1 }
	global CONFIG_ROOT_NFS
	if {($CONFIG_NET == 1) && ($CONFIG_NFS_FS == 1 || $CONFIG_NFS_FS == 4) && ($CONFIG_IP_PNP == 1 || $CONFIG_IP_PNP == 4)} then {write_tristate $cfg $autocfg CONFIG_ROOT_NFS $CONFIG_ROOT_NFS [list $CONFIG_NFS_FS $CONFIG_IP_PNP] 2 }
	global CONFIG_NFSD
	if {($CONFIG_NET == 1) && ($CONFIG_INET == 1 || $CONFIG_INET == 2 || $CONFIG_INET == 4)} then {write_tristate $cfg $autocfg CONFIG_NFSD $CONFIG_NFSD [list $CONFIG_INET] 2 }
	global CONFIG_NFSD_V3
	if {($CONFIG_NET == 1) && ($CONFIG_NFSD == 1 || $CONFIG_NFSD == 2 || $CONFIG_NFSD == 4)} then {write_tristate $cfg $autocfg CONFIG_NFSD_V3 $CONFIG_NFSD_V3 [list $CONFIG_NFSD] 1 }
	global CONFIG_NFSD_TCP
	if {($CONFIG_NET == 1) && ($CONFIG_NFSD == 1 || $CONFIG_NFSD == 2 || $CONFIG_NFSD == 4) && ($CONFIG_EXPERIMENTAL == 1 || $CONFIG_EXPERIMENTAL == 2 || $CONFIG_EXPERIMENTAL == 4)} then {write_tristate $cfg $autocfg CONFIG_NFSD_TCP $CONFIG_NFSD_TCP [list $CONFIG_NFSD $CONFIG_EXPERIMENTAL] 1 }
	global CONFIG_SUNRPC
	if {($CONFIG_NET == 1) && ($CONFIG_NFS_FS == 1 || $CONFIG_NFSD == 1)} then {write_tristate $cfg $autocfg CONFIG_SUNRPC $CONSTANT_Y [list $notmod] 2 }
	global CONFIG_LOCKD
	if {($CONFIG_NET == 1) && ($CONFIG_NFS_FS == 1 || $CONFIG_NFSD == 1)} then {write_tristate $cfg $autocfg CONFIG_LOCKD $CONSTANT_Y [list $notmod] 2 }
	if {($CONFIG_NET == 1) && ($CONFIG_NFS_FS != 1 && $CONFIG_NFSD != 1) && ($CONFIG_NFS_FS == 2 || $CONFIG_NFSD == 2)} then {write_tristate $cfg $autocfg CONFIG_SUNRPC $CONSTANT_M [list $notmod] 2 }
	if {($CONFIG_NET == 1) && ($CONFIG_NFS_FS != 1 && $CONFIG_NFSD != 1) && ($CONFIG_NFS_FS == 2 || $CONFIG_NFSD == 2)} then {write_tristate $cfg $autocfg CONFIG_LOCKD $CONSTANT_M [list $notmod] 2 }
	if {($CONFIG_NET == 1) && ($CONFIG_NFS_FS != 1 && $CONFIG_NFSD != 1) && ($CONFIG_NFS_FS != 2 && $CONFIG_NFSD != 2)} then {write_tristate $cfg $autocfg CONFIG_SUNRPC $CONSTANT_N [list $notmod] 2 }
	if {($CONFIG_NET == 1) && ($CONFIG_NFS_FS != 1 && $CONFIG_NFSD != 1) && ($CONFIG_NFS_FS != 2 && $CONFIG_NFSD != 2)} then {write_tristate $cfg $autocfg CONFIG_LOCKD $CONSTANT_N [list $notmod] 2 }
	global CONFIG_LOCKD_V4
	if {($CONFIG_NET == 1) && ($CONFIG_NFSD_V3 == 1 || $CONFIG_NFS_V3 == 1)} then {write_tristate $cfg $autocfg CONFIG_LOCKD_V4 $CONSTANT_Y [list $notmod] 2 }
	global CONFIG_SMB_FS
	if {($CONFIG_NET == 1) aic7770.o: aic7770.c \
   aic7xxx_osm.h \
   aic7xxx_inline.h \
   aic7xxx_93cx6.h
aic7770_osm.o: aic7770_osm.c \
   aic7xxx_osm.h
aic7xxx.h: \
   aic7xxx_reg.h
	@touch aic7xxx.h
aic7xxx_93cx6.o: aic7xxx_93cx6.c \
   aic7xxx_osm.h \
   aic7xxx_inline.h \
   aic7xxx_93cx6.h
aic7xxx_core.o: aic7xxx_core.c \
   aic7xxx_osm.h \
   aic7xxx_inline.h \
   aicasm/aicasm_insformat.h \
   aic7xxx_seq.h
aic7xxx_linux_pci.o: aic7xxx_linux_pci.c \
   aic7xxx_osm.h
aic7xxx_osm.o: aic7xxx_osm.c \
   aic7xxx_osm.h \
   aic7xxx_inline.h \
   /home/me/kernel/linux/include/linux/init.h \
   ../sd.h \
   /home/me/kernel/linux/include/linux/mm.h \
   /home/me/kernel/linux/include/linux/blk.h \
   $(wildcard /home/me/kernel/linux/include/config/aic7xxx/reset/delay/ms.h) \
   $(wildcard /home/me/kernel/linux/include/config/aic7xxx/proc/stats.h) \
   $(wildcard /home/me/kernel/linux/include/config/aic7xxx/cmds/per/device.h) \
   $(wildcard /home/me/kernel/linux/include/config/aic7xxx/probe/eisa/vl.h) \
   /home/me/kernel/linux/include/linux/notifier.h \
   /home/me/kernel/linux/include/linux/reboot.h \
   $(wildcard /home/me/kernel/linux/include/config/pci.h) \
   ../scsi_module.c
aic7xxx_osm.h: \
   /home/me/kernel/linux/include/linux/types.h \
   /home/me/kernel/linux/include/linux/blk.h \
   /home/me/kernel/linux/include/linux/blkdev.h \
   /home/me/kernel/linux/include/linux/delay.h \
   /home/me/kernel/linux/include/linux/ioport.h \
   /home/me/kernel/linux/include/linux/pci.h \
   /home/me/kernel/linux/include/linux/version.h \
   /home/me/kernel/linux/include/linux/module.h \
   /home/me/kernel/linux/include/asm/byteorder.h \
   /home/me/kernel/linux/include/linux/interrupt.h \
   /home/me/kernel/linux/include/linux/slab.h \
   /home/me/kernel/linux/include/linux/malloc.h \
   ../scsi.h \
   ../hosts.h \
   cam.h \
   queue.h \
   scsi_message.h \
   aic7xxx_host.h \
   aic7xxx.h \
   /home/me/kernel/linux/include/linux/spinlock.h \
   /home/me/kernel/linux/include/linux/smp.h \
   $(wildcard /home/me/kernel/linux/include/config/pci.h)
	@touch aic7xxx_osm.h
aic7xxx_osm_pci.o: aic7xxx_osm_pci.c \
   aic7xxx_osm.h
aic7xxx_pci.o: aic7xxx_pci.c \
   aic7xxx_osm.h \
   aic7xxx_inline.h \
   aic7xxx_93cx6.h
aic7xxx_proc.o: aic7xxx_proc.c \
   aic7xxx_osm.h \
   aic7xxx_inline.h
.PRECIOUS:	aic7xxx.h \
	aic7xxx_osm.h \

aha152x_stub.o: aha152x_stub.c \
   /home/me/kernel/linux/include/linux/module.h \
   /home/me/kernel/linux/include/linux/init.h \
   /home/me/kernel/linux/include/linux/kernel.h \
   /home/me/kernel/linux/include/linux/sched.h \
   /home/me/kernel/linux/include/linux/slab.h \
   /home/me/kernel/linux/include/linux/string.h \
   /home/me/kernel/linux/include/linux/timer.h \
   /home/me/kernel/linux/include/linux/ioport.h \
   /home/me/kernel/linux/include/scsi/scsi.h \
   /home/me/kernel/linux/include/linux/major.h \
   /home/me/kernel/linux/include/linux/blk.h \
   /home/me/kernel/linux/include/../drivers/scsi/scsi.h \
   /home/me/kernel/linux/include/../drivers/scsi/hosts.h \
   /home/me/kernel/linux/include/scsi/scsi_ioctl.h \
   /home/me/kernel/linux/include/../drivers/scsi/aha152x.h \
   /home/me/kernel/linux/include/pcmcia/version.h \
   /home/me/kernel/linux/include/pcmcia/cs_types.h \
   /home/me/kernel/linux/include/pcmcia/cs.h \
   /home/me/kernel/linux/include/pcmcia/cistpl.h \
   /home/me/kernel/linux/include/pcmcia/ds.h
fdomain_stub.o: fdomain_stub.c \
   /home/me/kernel/linux/include/linux/module.h \
   /home/me/kernel/linux/include/linux/init.h \
   /home/me/kernel/linux/include/linux/kernel.h \
   /home/me/kernel/linux/include/linux/sched.h \
   /home/me/kernel/linux/include/linux/slab.h \
   /home/me/kernel/linux/include/linux/string.h \
   /home/me/kernel/linux/include/linux/timer.h \
   /home/me/kernel/linux/include/linux/ioport.h \
   /home/me/kernel/linux/include/scsi/scsi.h \
   /home/me/kernel/linux/include/linux/major.h \
   /home/me/kernel/linux/include/linux/blk.h \
   /home/me/kernel/linux/include/../drivers/scsi/scsi.h \
   /home/me/kernel/linux/include/../drivers/scsi/hosts.h \
   /home/me/kernel/linux/include/scsi/scsi_ioctl.h \
   /home/me/kernel/linux/include/../drivers/scsi/fdomain.h \
   /home/me/kernel/linux/include/pcmcia/version.h \
   /home/me/kernel/linux/include/pcmcia/cs_types.h \
   /home/me/kernel/linux/include/pcmcia/cs.h \
   /home/me/kernel/linux/include/pcmcia/cistpl.h \
   /home/me/kernel/linux/include/pcmcia/ds.h
nsp_cs.o: nsp_cs.c \
   /home/me/kernel/linux/include/linux/module.h \
   /home/me/kernel/linux/include/linux/kernel.h \
   /home/me/kernel/linux/include/linux/init.h \
   /home/me/kernel/linux/include/linux/sched.h \
   /home/me/kernel/linux/include/linux/slab.h \
   /home/me/kernel/linux/include/linux/string.h \
   /home/me/kernel/linux/include/linux/timer.h \
   /home/me/kernel/linux/include/linux/ioport.h \
   /home/me/kernel/linux/include/linux/delay.h \
   /home/me/kernel/linux/include/linux/tqueue.h \
   /home/me/kernel/linux/include/linux/interrupt.h \
   /home/me/kernel/linux/include/linux/module.h \
   /home/me/kernel/linux/include/linux/major.h \
   /home/me/kernel/linux/include/linux/blk.h \
   /home/me/kernel/linux/include/linux/stat.h \
   /home/me/kernel/linux/include/asm/io.h \
   /home/me/kernel/linux/include/asm/irq.h \
   /home/me/kernel/linux/include/../drivers/scsi/scsi.h \
   /home/me/kernel/linux/include/../drivers/scsi/hosts.h \
   /home/me/kernel/linux/include/../drivers/scsi/sd.h \
   /home/me/kernel/linux/include/scsi/scsi.h \
   /home/me/kernel/linux/include/scsi/scsi_ioctl.h \
   /home/me/kernel/linux/include/pcmcia/version.h \
   /home/me/kernel/linux/include/pcmcia/cs_types.h \
   /home/me/kernel/linux/include/pcmcia/cs.h \
   /home/me/kernel/linux/include/pcmcia/cistpl.h \
   /home/me/kernel/linux/include/pcmcia/ds.h \
   nsp_cs.h \
   nsp_io.h \
   nsp_message.c \
   nsp_debug.c
qlogic_stub.o: qlogic_stub.c \
   /home/me/kernel/linux/include/linux/module.h \
   /home/me/kernel/linux/include/linux/init.h \
   /home/me/kernel/linux/include/linux/kernel.h \
   /home/me/kernel/linux/include/linux/sched.h \
   /home/me/kernel/linux/include/linux/slab.h \
   /home/me/kernel/linux/include/linux/string.h \
   /home/me/kernel/linux/include/linux/timer.h \
   /home/me/kernel/linux/include/linux/ioport.h \
   /home/me/kernel/linux/include/asm/io.h \
   /home/me/kernel/linux/include/asm/byteorder.h \
   /home/me/kernel/linux/include/scsi/scsi.h \
   /home/me/kernel/linux/include/linux/major.h \
   /home/me/kernel/linux/include/linux/blk.h \
   /home/me/kernel/linux/include/../drivers/scsi/scsi.h \
   /home/me/kernel/linux/include/../drivers/scsi/hosts.h \
   /home/me/kernel/linux/include/scsi/scsi_ioctl.h \
   /home/me/kernel/linux/include/../drivers/scsi/qlogicfas.h \
   /home/me/kernel/linux/include/pcmcia/version.h \
   /home/me/kernel/linux/include/pcmcia/cs_types.h \
   /home/me/kernel/linux/include/pcmcia/cs.h \
   /home/me/kernel/linux/include/pcmcia/cistpl.h \
   /home/me/kernel/linux/include/pcmcia/ds.h \
   /home/me/kernel/linux/include/pcmcia/ciscode.h
/* $Id: chmc.c,v 1.3 2001/04/03 12:49:47 davem Exp $
 * memctrlr.c: Driver for UltraSPARC-III memory controller.
 *
 * Copyright (C) 2001 David S. Miller (davem@redhat.com)
 */

#include <linux/module.h>
#include <linux/kernel.h>
#include <linux/types.h>
#include <linux/slab.h>
#include <linux/list.h>
#include <linux/init.h>
#include <asm/spitfire.h>
#include <asm/chmctrl.h>
#include <asm/oplib.h>
#include <asm/io.h>

#define CHMCTRL_NDGRPS	2
#define CHMCTRL_NDIMMS	4

#define DIMMS_PER_MC	(CHMCTRL_NDGRPS * CHMCTRL_NDIMMS)

/* OBP memory-layout property format. */
struct obp_map {
	unsigned char	dimm_map[144];
	unsigned char	pin_map[576];
};

#define DIMM_LABEL_SZ	8

struct obp_mem_layout {
	/* One max 8-byte string label per DIMM.  Usually
	 * this matches the label on the motherboard where
	 * that DIMM resides.
	 */
	char		dimm_labels[DIMMS_PER_MC][DIMM_LABEL_SZ];

	/* If symmetric use map[0], else it is
	 * asymmetric and map[1] should be used.
	 */
	char		symmetric;

	struct obp_map	map[2];
};

#define CHMCTRL_NBANKS	4

struct bank_info {
	struct mctrl_info	*mp;
	int			bank_id;

	u64			raw_reg;
	int			valid;
	int			uk;
	int			um;
	int			lk;
	int			lm;
	int			interleave;
	unsigned long		base;
	unsigned long		size;
};

struct mctrl_info {
	struct list_head	list;
	int			portid;
	int			index;

	struct obp_mem_layout	layout_prop;
	int			layout_size;

	void			*regs;

	u64			timing_control1;
	u64			timing_control2;
	u64			timing_control3;
	u64			timing_control4;
	u64			memaddr_control;

	struct bank_info	logical_banks[CHMCTRL_NBANKS];
};

static LIST_HEAD(mctrl_list);

/* Does BANK decode PHYS_ADDR? */
static int bank_match(struct bank_info *bp, unsigned long phys_addr)
{
	unsigned long upper_bits = (phys_addr & PA_UPPER_BITS) >> PA_UPPER_BITS_SHIFT;
	unsigned long lower_bits = (phys_addr & PA_LOWER_BITS) >> PA_LOWER_BITS_SHIFT;

	/* Bank must be enabled to match. */
	if (bp->valid == 0)
		return 0;

	/* Would BANK match upper bits? */
	upper_bits ^= bp->um;		/* What bits are different? */
	upper_bits  = ~upper_bits;	/* Invert. */
	upper_bits |= bp->uk;		/* What bits don't matter for matching? */
	upper_bits  = ~upper_bits;	/* Invert. */

	if (upper_bits)
		return 0;

	/* Would BANK match lower bits? */
	lower_bits ^= bp->lm;		/* What bits are different? */
	lower_bits  = ~lower_bits;	/* Invert. */
	lower_bits |= bp->lk;		/* What bits don't matter for matching? */
	lower_bits  = ~lower_bits;	/* Invert. */

	if (lower_bits)
		return 0;

	/* I always knew you'd be the one. */
	return 1;
}

/* Given PHYS_ADDR, search memory controller banks for a match. */
static struct bank_info *find_bank(unsigned long phys_addr)
{
	struct list_head *mctrl_head = &mctrl_list;
	struct list_head *mctrl_entry = mctrl_head->next;

	for (;;) {
		struct mctrl_info *mp =
			list_entry(mctrl_entry, struct mctrl_info, list);
		int bank_no;

		if (mctrl_entry == mctrl_head)
			break;
		mctrl_entry = mctrl_entry->next;

		for (bank_no = 0; bank_no < CHMCTRL_NBANKS; bank_no++) {
			struct bank_info *bp;

			bp = &mp->logical_banks[bank_no];
			if (bank_match(bp, phys_addr))
				return bp;
		}
	}

	return NULL;
}

/* This is the main purpose of this driver. */
#define SYNDROME_MIN	-1
#define SYNDROME_MAX	144
int chmc_getunumber(int syndrome_code,
		    unsigned long phys_addr,
		    char *buf, int buflen)
{
	struct bank_info *bp;
	struct obp_mem_layout *prop;
	int bank_in_controller, first_dimm;

	bp = find_bank(phys_addr);
	if (bp == NULL ||
	    syndrome_code < SYNDROME_MIN ||
	    syndrome_code > SYNDROME_MAX) {
		buf[0] = '?';
		buf[1] = '?';
		buf[2] = '?';
		buf[3] = '\0';
		return 0;
	}

	prop = &bp->mp->layout_prop;
	bank_in_controller = bp->bank_id & (CHMCTRL_NBANKS - 1);
	first_dimm  = (bank_in_controller & (CHMCTRL_NDGRPS - 1));
	first_dimm *= CHMCTRL_NDIMMS;

	if (syndrome_code != SYNDROME_MIN) {
		struct obp_map *map;
		int qword, where_in_line, where, map_index, map_offset;
		unsigned int map_val;

		/* Yaay, single bit error so we can figure out
		 * the exact dimm.
		 */
		if (prop->symmetric)
			map = &prop->map[0];
		else
			map = &prop->map[1];

		/* Covert syndrome code into the way the bits are
		 * positioned on the bus.
		 */
		if (syndrome_code < 144 - 16)
			syndrome_code += 16;
		else if (syndrome_code < 144)
			syndrome_code -= (144 - 7);
		else if (syndrome_code < (144 + 3))
			syndrome_code -= (144 + 3 - 4);
		else
			syndrome_code -= 144 + 3;

		/* All this magic has to do with how a cache line
		 * comes over the wire on Safari.  A 64-bit line
		 * comes over in 4 quadword cycles, each of which
		 * transmit ECC/MTAG info as well as the actual
		 * data.  144 bits per quadword, 576 total.
		 */
#define LINE_SIZE	64
#define LINE_ADDR_MSK	(LINE_SIZE - 1)
#define QW_PER_LINE	4
#define QW_BYTES	(LINE_SIZE / QW_PER_LINE)
#define QW_BITS		144
#define LAST_BIT	(576 - 1)

		qword = (phys_addr & LINE_ADDR_MSK) / QW_BYTES;
		where_in_line = ((3 - qword) * QW_BITS) + syndrome_code;
		where = (LAST_BIT - where_in_line);
		map_index = where >> 2;
		map_offset = where & 0x3;
		map_val = map->dimm_map[map_index];
		map_val = ((map_val >> ((3 - map_offset) << 1)) & (2 - 1));

		sprintf(buf, "%s, pin %3d",
			prop->dimm_labels[first_dimm + map_val],
			map->pin_map[where_in_line]);
	} else {
		int dimm;

		/* Multi-bit error, we just dump out all the
		 * dimm labels assosciated with this bank.
		 */
		for (dimm = 0; dimm < CHMCTRL_NDIMMS; dimm++) {
			sprintf(buf, "%s ",
				prop->dimm_labels[first_dimm + dimm]);
			buf += strlen(buf);
		}
	}
	return 0;
}

/* Accessing the registers is slightly complicated.  If you want
 * to get at the memory controller which is on the same processor
 * the code is executing, you must use special ASI load/store else
 * you go through the global mapping.
 */
static u64 read_mcreg(struct mctrl_info *mp, unsigned long offset)
{
	unsigned long ret;

	if (mp->portid == smp_processor_id()) {
		__asm__ __volatile__("ldxa	[%1] %2, %0"
				     : "=r" (ret)
				     : "r" (offset), "i" (ASI_MCU_CTRL_REG));
	} else {
		__asm__ __volatile__("ldxa	[%1] %2, %0"
				     : "=r" (ret)
				     : "r" (mp->regs + offset),
				       "i" (ASI_PHYS_BYPASS_EC_E));
	}
	return ret;
}

#if 0 /* currently unused */
static void write_mcreg(struct mctrl_info *mp, unsigned long offset, u64 val)
{
	if (mp->portid == smp_processor_id()) {
		__asm__ __volatile__("stxa	%0, [%1] %2"
				     : : "r" (val),
				         "r" (offset), "i" (ASI_MCU_CTRL_REG));
	} else {
		__asm__ __volatile__("ldxa	%0, [%1] %2"
				     : : "r" (val),
				         "r" (mp->regs + offset),
				         "i" (ASI_PHYS_BYPASS_EC_E));
	}
}
#endif

static void interpret_one_decode_reg(struct mctrl_info *mp, int which_bank, u64 val)
{
	struct bank_info *p = &mp->logical_banks[which_bank];

	p->mp = mp;
	p->bank_id = (CHMCTRL_NBANKS * mp->portid) + which_bank;
	p->raw_reg = val;
	p->valid = (val & MEM_DECODE_VALID) >> MEM_DECODE_VALID_SHIFT;
	p->uk = (val & MEM_DECODE_UK) >> MEM_DECODE_UK_SHIFT;
	p->um = (val & MEM_DECODE_UM) >> MEM_DECODE_UM_SHIFT;
	p->lk = (val & MEM_DECODE_LK) >> MEM_DECODE_LK_SHIFT;
	p->lm = (val & MEM_DECODE_LM) >> MEM_DECODE_LM_SHIFT;

	p->base  =  (p->um);
	p->base &= ~(p->uk);
	p->base <<= PA_UPPER_BITS_SHIFT;

	switch(p->lk) {
	case 0xf:
	default:
		p->interleave = 1;
		break;

	case 0xe:
		p->interleave = 2;
		break;

	case 0xc:
		p->interleave = 4;
		break;

	case 0x8:
		p->interleave = 8;
		break;

	case 0x0:
		p->interleave = 16;
		break;
	};

	/* UK[10] is reserved, and UK[11] is not set for the SDRAM
	 * bank size definition.
	 */
	p->size = (((unsigned long)p->uk &
		    ((1UL << 10UL) - 1UL)) + 1UL) << PA_UPPER_BITS_SHIFT;
	p->size /= p->interleave;
}

static void fetch_decode_regs(struct mctrl_info *mp)
{
	if (mp->layout_size == 0)
		return;

	interpret_one_decode_reg(mp, 0,
				 read_mcreg(mp, CHMCTRL_DECODE1));
	interpret_one_decode_reg(mp, 1,
				 read_mcreg(mp, CHMCTRL_DECODE2));
	interpret_one_decode_reg(mp, 2,
				 read_mcreg(mp, CHMCTRL_DECODE3));
	interpret_one_decode_reg(mp, 3,
				 read_mcreg(mp, CHMCTRL_DECODE4));
}

static int init_one_mctrl(int node, int index)
{
	struct mctrl_info *mp = kmalloc(sizeof(*mp), GFP_KERNEL);
	int portid = prom_getintdefault(node, "portid", -1);
	struct linux_prom64_registers p_reg_prop;
	int t;

	if (!mp)
		return -1;
	memset(mp, 0, sizeof(*mp));
	if (portid == -1)
		goto fail;

	mp->portid = portid;
	mp->layout_size = prom_getproplen(node, "memory-layout");
	if (mp->layout_size < 0)
		mp->layout_size = 0;
	if (mp->layout_size > sizeof(mp->layout_prop))
		goto fail;

	if (mp->layout_size > 0)
		prom_getproperty(node, "memory-layout",
				 (char *) &mp->layout_prop,
				 mp->layout_size);

	t = prom_getproperty(node, "reg",
			     (char *) &p_reg_prop,
			     sizeof(p_reg_prop));
	if (t < 0 || p_reg_prop.reg_size != 0x48)
		goto fail;

	mp->regs = ioremap(p_reg_prop.phys_addr, p_reg_prop.reg_size);
	if (mp->regs == NULL)
		goto fail;

	if (mp->layout_size != 0UL) {
		mp->timing_control1 = read_mcreg(mp, CHMCTRL_TCTRL1);
		mp->timing_control2 = read_mcreg(mp, CHMCTRL_TCTRL2);
		mp->timing_control3 = read_mcreg(mp, CHMCTRL_TCTRL3);
		mp->timing_control4 = read_mcreg(mp, CHMCTRL_TCTRL4);
		mp->memaddr_control = read_mcreg(mp, CHMCTRL_MACTRL);
	}

	fetch_decode_regs(mp);

	mp->index = index;

	list_add(&mp->list, &mctrl_list);

	/* Report the device. */
	printk(KERN_INFO "chmc%d: US3 memory controller at %p [%s]\n",
	       mp->index,
	       mp->regs, (mp->layout_size ? "ACTIVE" : "INACTIVE"));

	return 0;

fail:
	if (mp) {
		if (mp->regs != NULL)
			iounmap(mp->regs);
		kfree(mp);
	}
	return -1;
}

static int __init probe_for_string(char *name, int index)
{
	int node = prom_getchild(prom_root_node);

	while ((node = prom_searchsiblings(node, name)) != 0) {
		int ret = init_one_mctrl(node, index);

		if (!ret)
			index++;

		node = prom_getsibling(node);
		if (!node)
			break;
	}

	return index;
}

static int __init chmc_init(void)
{
	int index;

	/* This driver is only for cheetah platforms. */
	if (tlb_type != cheetah)
		return -ENODEV;

	index = probe_for_string("memory-controller", 0);
	index = probe_for_string("mc-us3", index);

	return 0;
}

static void __exit chmc_cleanup(void)
{
	struct list_head *head = &mctrl_list;
	struct list_head *tmp = head->next;

	for (;;) {
		struct mctrl_info *p =
			list_entry(tmp, struct mctrl_info, list);
		if (tmp == head)
			break;
		tmp = tmp->next;

		list_del(&p->list);
		iounmap(p->regs);
		kfree(p);
	}
}

module_init(chmc_init);
module_exit(chmc_cleanup);
#include <linux/kernel.h>
#include <linux/init.h>
#include <linux/pci.h>
#include <linux/slab.h>
#include <asm/oplib.h>
#include <asm/isa.h>

struct isa_bridge *isa_chain;

static void __init fatal_err(const char *reason)
{
	prom_printf("ISA: fatal error, %s.\n", reason);
}

static void __init report_dev(struct isa_device *isa_dev, int child)
{
	if (child)
		printk(" (%s)", isa_dev->prom_name);
	else
		printk(" [%s", isa_dev->prom_name);
}

static void __init isa_dev_get_resource(struct isa_device *isa_dev)
{
	struct linux_prom_registers regs[PROMREG_MAX];
	unsigned long base, len;
	int prop_len;

	prop_len = prom_getproperty(isa_dev->prom_node, "reg",
				    (char *) regs, sizeof(regs));

	if (prop_len <= 0)
		return;

	/* Only the first one is interesting. */
	len = regs[0].reg_size;
	base = (((unsigned long)regs[0].which_io << 32) |
		(unsigned long)regs[0].phys_addr);
	base += isa_dev->bus->parent->io_space.start;

	isa_dev->resource.start = base;
	isa_dev->resource.end   = (base + len - 1UL);
	isa_dev->resource.flags = IORESOURCE_IO;
	isa_dev->resource.name  = isa_dev->prom_name;

	request_resource(&isa_dev->bus->parent->io_space,
			 &isa_dev->resource);
}

/* I can't believe they didn't put a real INO in the isa device
 * interrupts property.  The whole point of the OBP properties
 * is to shield the kernel from IRQ routing details.
 *
 * The P1275 standard for ISA devices seems to also have been
 * totally ignored.
 */
static struct {
	int	obp_irq;
	int	pci_ino;
} grover_irq_table[] = {
	{ 1, 0x00 },	/* dma, unknown ino at this point */
	{ 2, 0x27 },	/* floppy */
	{ 3, 0x22 },	/* parallel */
	{ 4, 0x2b },	/* serial */
	{ 5, 0x25 },	/* acpi power management */

	{ 0, 0x00 }	/* end of table */
};

static void __init isa_dev_get_irq(struct isa_device *isa_dev)
{
	int irq_prop;

	irq_prop = prom_getintdefault(isa_dev->prom_node,
				      "interrupts", -1);
	if (irq_prop <= 0) {
		isa_dev->irq = PCI_IRQ_NONE;
	} else {
		int i;

		for (i = 0; grover_irq_table[i].obp_irq != 0; i++) {
			if (grover_irq_table[i].obp_irq == irq_prop) {
				struct pci_controller_info *pcic;
				struct pci_pbm_info *pbm;
				int ino = grover_irq_table[i].pci_ino;

				if (ino == 0) {
					isa_dev->irq = PCI_IRQ_NONE;
				} else {
					pbm = isa_dev->bus->parent;
					pcic = pbm->parent;
					isa_dev->irq = pcic->irq_build(pbm, NULL, ino);
				}
			}
		}
	}
}

static void __init isa_fill_children(struct isa_device *parent_isa_dev)
{
	int node = prom_getchild(parent_isa_dev->prom_node);

	if (node == 0)
		return;

	printk(" ->");
	while (node != 0) {
		struct isa_device *isa_dev;
		int prop_len;

		isa_dev = kmalloc(sizeof(*isa_dev), GFP_KERNEL);
		if (!isa_dev) {
			fatal_err("cannot allocate child isa_dev");
			prom_halt();
		}

		memset(isa_dev, 0, sizeof(*isa_dev));

		/* Link it in to parent. */
		isa_dev->next = parent_isa_dev->child;
		parent_isa_dev->child = isa_dev;

		isa_dev->bus = parent_isa_dev->bus;
		isa_dev->prom_node = node;
		prop_len = prom_getproperty(node, "name",
					    (char *) isa_dev->prom_name,
					    sizeof(isa_dev->prom_name));
		if (prop_len <= 0) {
			fatal_err("cannot get child isa_dev OBP node name");
			prom_halt();
		}

		prop_len = prom_getproperty(node, "compatible",
					    (char *) isa_dev->compatible,
					    sizeof(isa_dev->compatible));

		/* Not having this is OK. */
		if (prop_len <= 0)
			isa_dev->compatible[0] = '\0';

		isa_dev_get_resource(isa_dev);
		isa_dev_get_irq(isa_dev);

		report_dev(isa_dev, 1);

		node = prom_getsibling(node);
	}
}

static void __init isa_fill_devices(struct isa_bridge *isa_br)
{
	int node = prom_getchild(isa_br->prom_node);

	while (node != 0) {
		struct isa_device *isa_dev;
		int prop_len;

		isa_dev = kmalloc(sizeof(*isa_dev), GFP_KERNEL);
		if (!isa_dev) {
			fatal_err("cannot allocate isa_dev");
			prom_halt();
		}

		memset(isa_dev, 0, sizeof(*isa_dev));

		/* Link it in. */
		isa_dev->next = NULL;
		if (isa_br->devices == NULL) {
			isa_br->devices = isa_dev;
		} else {
			struct isa_device *tmp = isa_br->devices;

			while (tmp->next)
				tmp = tmp->next;&& ($CONFIG_INET == 1 || $CONFIG_INET == 2 || $CONFIG_INET == 4)} then {write_tristate $cfg $autocfg CONFIG_SMB_FS $CONFIG_SMB_FS [list $CONFIG_INET] 2 }
	global CONFIG_SMB_NLS_DEFAULT
	if {($CONFIG_NET == 1) && ($CONFIG_SMB_FS != 0)} then {write_tristate $cfg $autocfg CONFIG_SMB_NLS_DEFAULT $CONFIG_SMB_NLS_DEFAULT [list $notmod] 2 }
	global CONFIG_SMB_NLS_REMOTE
	if {($CONFIG_NET == 1) && ($CONFIG_SMB_FS != 0) && ($CONFIG_SMB_NLS_DEFAULT == 1)} then {write_string $cfg $autocfg CONFIG_SMB_NLS_REMOTE "$CONFIG_SMB_NLS_REMOTE" $notmod }
	global CONFIG_NCP_FS
	if {($CONFIG_NET == 1) && ($CONFIG_IPX != 0 || $CONFIG_INET != 0)} then {write_tristate $cfg $autocfg CONFIG_NCP_FS $CONFIG_NCP_FS [list $notmod] 2 }
	global CONFIG_NCPFS_PACKET_SIGNING
	if {($CONFIG_NET == 1) && ($CONFIG_IPX != 0 || $CONFIG_INET != 0) && ($CONFIG_NCP_FS == 1 || $CONFIG_NCP_FS == 2 || $CONFIG_NCP_FS == 4)} then {write_tristate $cfg $autocfg CONFIG_NCPFS_PACKET_SIGNING $CONFIG_NCPFS_PACKET_SIGNING [list $CONFIG_NCP_FS] 1 }
	global CONFIG_NCPFS_IOCTL_LOCKING
	if {($CONFIG_NET == 1) && ($CONFIG_IPX != 0 || $CONFIG_INET != 0) && ($CONFIG_NCP_FS == 1 || $CONFIG_NCP_FS == 2 || $CONFIG_NCP_FS == 4)} then {write_tristate $cfg $autocfg CONFIG_NCPFS_IOCTL_LOCKING $CONFIG_NCPFS_IOCTL_LOCKING [list $CONFIG_NCP_FS] 1 }
	global CONFIG_NCPFS_STRONG
	if {($CONFIG_NET == 1) && ($CONFIG_IPX != 0 || $CONFIG_INET != 0) && ($CONFIG_NCP_FS == 1 || $CONFIG_NCP_FS == 2 || $CONFIG_NCP_FS == 4)} then {write_tristate $cfg $autocfg CONFIG_NCPFS_STRONG $CONFIG_NCPFS_STRONG [list $CONFIG_NCP_FS] 1 }
	global CONFIG_NCPFS_NFS_NS
	if {($CONFIG_NET == 1) && ($CONFIG_IPX != 0 || $CONFIG_INET != 0) && ($CONFIG_NCP_FS == 1 || $CONFIG_NCP_FS == 2 || $CONFIG_NCP_FS == 4)} then {write_tristate $cfg $autocfg CONFIG_NCPFS_NFS_NS $CONFIG_NCPFS_NFS_NS [list $CONFIG_NCP_FS] 1 }
	global CONFIG_NCPFS_OS2_NS
	if {($CONFIG_NET == 1) && ($CONFIG_IPX != 0 || $CONFIG_INET != 0) && ($CONFIG_NCP_FS == 1 || $CONFIG_NCP_FS == 2 || $CONFIG_NCP_FS == 4)} then {write_tristate $cfg $autocfg CONFIG_NCPFS_OS2_NS $CONFIG_NCPFS_OS2_NS [list $CONFIG_NCP_FS] 1 }
	global CONFIG_NCPFS_SMALLDOS
	if {($CONFIG_NET == 1) && ($CONFIG_IPX != 0 || $CONFIG_INET != 0) && ($CONFIG_NCP_FS == 1 || $CONFIG_NCP_FS == 2 || $CONFIG_NCP_FS == 4)} then {write_tristate $cfg $autocfg CONFIG_NCPFS_SMALLDOS $CONFIG_NCPFS_SMALLDOS [list $CONFIG_NCP_FS] 1 }
	global CONFIG_NCPFS_NLS
	if {($CONFIG_NET == 1) && ($CONFIG_IPX != 0 || $CONFIG_INET != 0) && ($CONFIG_NCP_FS == 1 || $CONFIG_NCP_FS == 2 || $CONFIG_NCP_FS == 4)} then {write_tristate $cfg $autocfg CONFIG_NCPFS_NLS $CONFIG_NCPFS_NLS [list $CONFIG_NCP_FS] 1 }
	global CONFIG_NCPFS_EXTRAS
	if {($CONFIG_NET == 1) && ($CONFIG_IPX != 0 || $CONFIG_INET != 0) && ($CONFIG_NCP_FS == 1 || $CONFIG_NCP_FS == 2 || $CONFIG_NCP_FS == 4)} then {write_tristate $cfg $autocfg CONFIG_NCPFS_EXTRAS $CONFIG_NCPFS_EXTRAS [list $CONFIG_NCP_FS] 1 }
	if {($CONFIG_NET == 1) && ($CONFIG_IPX == 0 && $CONFIG_INET == 0)} then {write_tristate $cfg $autocfg CONFIG_NCPFS_NLS $CONSTANT_N [list $notmod] 2 }
	if {($CONFIG_NET != 1)} then {write_tristate $cfg $autocfg CONFIG_NCPFS_NLS $CONSTANT_N [list $notmod] 2 }
	if {($CONFIG_NET != 1)} then {write_tristate $cfg $autocfg CONFIG_SMB_FS $CONSTANT_N [list $notmod] 2 }
	global CONFIG_ZISOFS_FS
	if {($CONFIG_ZISOFS == 1)} then {write_tristate $cfg $autocfg CONFIG_ZISOFS_FS $CONFIG_ISO9660_FS [list $notmod] 2 }
	if {($CONFIG_ZISOFS != 1)} then {write_tristate $cfg $autocfg CONFIG_ZISOFS_FS $CONSTANT_N [list $notmod] 2 }
	write_comment $cfg $autocfg "Partition Types"
	global CONFIG_PARTITION_ADVANCED
	write_tristate $cfg $autocfg CONFIG_PARTITION_ADVANCED $CONFIG_PARTITION_ADVANCED [list $notmod] 2
	global CONFIG_ACORN_PARTITION
	if {($CONFIG_PARTITION_ADVANCED == 1)} then {write_tristate $cfg $autocfg CONFIG_ACORN_PARTITION $CONFIG_ACORN_PARTITION [list $notmod] 2 }
	global CONFIG_ACORN_PARTITION_ICS
	if {($CONFIG_PARTITION_ADVANCED == 1) && ($CONFIG_ACORN_PARTITION != 0)} then {write_tristate $cfg $autocfg CONFIG_ACORN_PARTITION_ICS $CONFIG_ACORN_PARTITION_ICS [list $notmod] 2 }
	global CONFIG_ACORN_PARTITION_ADFS
	if {($CONFIG_PARTITION_ADVANCED == 1) && ($CONFIG_ACORN_PARTITION != 0)} then {write_tristate $cfg $autocfg CONFIG_ACORN_PARTITION_ADFS $CONFIG_ACORN_PARTITION_ADFS [list $notmod] 2 }
	global CONFIG_ACORN_PARTITION_POWERTEC
	if {($CONFIG_PARTITION_ADVANCED == 1) && ($CONFIG_ACORN_PARTITION != 0)} then {write_tristate $cfg $autocfg CONFIG_ACORN_PARTITION_POWERTEC $CONFIG_ACORN_PARTITION_POWERTEC [list $notmod] 2 }
	global CONFIG_ACORN_PARTITION_RISCIX
	if {($CONFIG_PARTITION_ADVANCED == 1) && ($CONFIG_ACORN_PARTITION != 0)} then {write_tristate $cfg $autocfg CONFIG_ACORN_PARTITION_RISCIX $CONFIG_ACORN_PARTITION_RISCIX [list $notmod] 2 }
	global CONFIG_OSF_PARTITION
	if {($CONFIG_PARTITION_ADVANCED == 1)} then {write_tristate $cfg $autocfg CONFIG_OSF_PARTITION $CONFIG_OSF_PARTITION [list $notmod] 2 }
	global CONFIG_AMIGA_PARTITION
	if {($CONFIG_PARTITION_ADVANCED == 1)} then {write_tristate $cfg $autocfg CONFIG_AMIGA_PARTITION $CONFIG_AMIGA_PARTITION [list $notmod] 2 }
	global CONFIG_ATARI_PARTITION
	if {($CONFIG_PARTITION_ADVANCED == 1)} then {write_tristate $cfg $autocfg CONFIG_ATARI_PARTITION $CONFIG_ATARI_PARTITION [list $notmod] 2 }
	global CONFIG_MAC_PARTITION
	if {($CONFIG_PARTITION_ADVANCED == 1)} then {write_tristate $cfg $autocfg CONFIG_MAC_PARTITION $CONFIG_MAC_PARTITION [list $notmod] 2 }
	global CONFIG_MSDOS_PARTITION
	if {($CONFIG_PARTITION_ADVANCED == 1)} then {write_tristate $cfg $autocfg CONFIG_MSDOS_PARTITION $CONFIG_MSDOS_PARTITION [list $notmod] 2 }
	global CONFIG_BSD_DISKLABEL
	if {($CONFIG_PARTITION_ADVANCED == 1) && ($CONFIG_MSDOS_PARTITION == 1)} then {write_tristate $cfg $autocfg CONFIG_BSD_DISKLABEL $CONFIG_BSD_DISKLABEL [list $notmod] 2 }
	global CONFIG_MINIX_SUBPARTITION
	if {($CONFIG_PARTITION_ADVANCED == 1) && ($CONFIG_MSDOS_PARTITION == 1)} then {write_tristate $cfg $autocfg CONFIG_MINIX_SUBPARTITION $CONFIG_MINIX_SUBPARTITION [list $notmod] 2 }
	global CONFIG_SOLARIS_X86_PARTITION
	if {($CONFIG_PARTITION_ADVANCED == 1) && ($CONFIG_MSDOS_PARTITION == 1)} then {write_tristate $cfg $autocfg CONFIG_SOLARIS_X86_PARTITION $CONFIG_SOLARIS_X86_PARTITION [list $notmod] 2 }
	global CONFIG_UNIXWARE_DISKLABEL
	if {($CONFIG_PARTITION_ADVANCED == 1) && ($CONFIG_MSDOS_PARTITION == 1)} then {write_tristate $cfg $autocfg CONFIG_UNIXWARE_DISKLABEL $CONFIG_UNIXWARE_DISKLABEL [list $notmod] 2 }
	global CONFIG_LDM_PARTITION
	if {($CONFIG_PARTITION_ADVANCED == 1) && ($CONFIG_EXPERIMENTAL == 1 || $CONFIG_EXPERIMENTAL == 4)} then {write_tristate $cfg $autocfg CONFIG_LDM_PARTITION $CONFIG_LDM_PARTITION [list $CONFIG_EXPERIMENTAL] 2 }
	global CONFIG_LDM_DEBUG
	if {($CONFIG_PARTITION_ADVANCED == 1) && ($CONFIG_LDM_PARTITION == 1)} then {write_tristate $cfg $autocfg CONFIG_LDM_DEBUG $CONFIG_LDM_DEBUG [list $notmod] 2 }
	global CONFIG_SGI_PARTITION
	if {($CONFIG_PARTITION_ADVANCED == 1)} then {write_tristate $cfg $autocfg CONFIG_SGI_PARTITION $CONFIG_SGI_PARTITION [list $notmod] 2 }
	global CONFIG_ULTRIX_PARTITION
	if {($CONFIG_PARTITION_ADVANCED == 1)} then {write_tristate $cfg $autocfg CONFIG_ULTRIX_PARTITION $CONFIG_ULTRIX_PARTITION [list $notmod] 2 }
	global CONFIG_SUN_PARTITION
	if {($CONFIG_PARTITION_ADVANCED == 1)} then {write_tristate $cfg $autocfg CONFIG_SUN_PARTITION $CONFIG_SUN_PARTITION [list $notmod] 2 }
	global CONFIG_AMIGA
	global CONFIG_ATARI
	global CONFIG_MAC
	global CONFIG_SGI_IP22
	global CONFIG_SGI_IP27
	if {($CONFIG_PARTITION_ADVANCED != 1) && ($CONFIG_AMIGA != 1 && $CONFIG_ATARI != 1 && $CONFIG_MAC != 1 && $CONFIG_SGI_IP22 != 1 && $CONFIG_SGI_IP27 != 1)} then {write_tristate $cfg $autocfg CONFIG_MSDOS_PARTITION $CONSTANT_Y [list $notmod] 2 }
	if {($CONFIG_PARTITION_ADVANCED != 1) && ($CONFIG_AFFS_FS == 1)} then {write_tristate $cfg $autocfg CONFIG_AMIGA_PARTITION $CONSTANT_Y [list $notmod] 2 }
	global CONFIG_SMB_NLS
	if {($CONFIG_SMB_FS == 2 || $CONFIG_SMB_FS == 1)} then {write_tristate $cfg $autocfg CONFIG_SMB_NLS $CONSTANT_Y [list $notmod] 2 }
	if {($CONFIG_SMB_FS != 2 && $CONFIG_SMB_FS != 1)} then {write_tristate $cfg $autocfg CONFIG_SMB_NLS $CONSTANT_N [list $notmod] 2 }
	global CONFIG_NLS
	if {($CONFIG_JOLIET == 1 || $CONFIG_FAT_FS != 0 || $CONFIG_NTFS_FS != 0 || $CONFIG_NCPFS_NLS == 1 || $CONFIG_SMB_NLS == 1 || $CONFIG_JFS_FS != 0 || $CONFIG_BEFS_FS != 0)} then {write_tristate $cfg $autocfg CONFIG_NLS $CONSTANT_Y [list $notmod] 2 }
	if {($CONFIG_JOLIET != 1 && $CONFIG_FAT_FS == 0 && $CONFIG_NTFS_FS == 0 && $CONFIG_NCPFS_NLS != 1 && $CONFIG_SMB_NLS != 1 && $CONFIG_JFS_FS == 0 && $CONFIG_BEFS_FS == 0)} then {write_tristate $cfg $autocfg CONFIG_NLS $CONSTANT_N [list $notmod] 2 }
	if {($CONFIG_NLS == 1)} then {write_comment $cfg $autocfg "Native Language Support"}
	global CONFIG_NLS_DEFAULT
	if {($CONFIG_NLS == 1)} then {write_string $cfg $autocfg CONFIG_NLS_DEFAULT "$CONFIG_NLS_DEFAULT" $notmod }
	global CONFIG_NLS_CODEPAGE_437
	if {($CONFIG_NLS == 1)} then {write_tristate $cfg $autocfg CONFIG_NLS_CODEPAGE_437 $CONFIG_NLS_CODEPAGE_437 [list $notmod] 2 }
	global CONFIG_NLS_CODEPAGE_737
	if {($CONFIG_NLS == 1)} then {write_tristate $cfg $autocfg CONFIG_NLS_CODEPAGE_737 $CONFIG_NLS_CODEPAGE_737 [list $notmod] 2 }
	global CONFIG_NLS_CODEPAGE_775
	if {($CONFIG_NLS == 1)} then {write_tristate $cfg $autocfg CONFIG_NLS_CODEPAGE_775 $CONFIG_NLS_CODEPAGE_775 [list $notmod] 2 }
	global CONFIG_NLS_CODEPAGE_850
	if {($CONFIG_NLS == 1)} then {write_tristate $cfg $autocfg CONFIG_NLS_CODEPAGE_850 $CONFIG_NLS_CODEPAGE_850 [list $notmod] 2 }
	global CONFIG_NLS_CODEPAGE_852
	if {($CONFIG_NLS == 1)} then {write_tristate $cfg $autocfg CONFIG_NLS_CODEPAGE_852 $CONFIG_NLS_CODEPAGE_852 [list $notmod] 2 }
	global CONFIG_NLS_CODEPAGE_855
	if {($CONFIG_NLS == 1)} then {write_tristate $cfg $autocfg CONFIG_NLS_CODEPAGE_855 $CONFIG_NLS_CODEPAGE_855 [list $notmod] 2 }
	global CONFIG_NLS_CODEPAGE_857
	if {($CONFIG_NLS == 1)} then {write_tristate $cfg $autocfg CONFIG_NLS_CODEPAGE_857 $CONFIG_NLS_CODEPAGE_857 [list $notmod] 2 }
	global CONFIG_NLS_CODEPAGE_860
	if {($CONFIG_NLS == 1)} then {write_tristate $cfg $autocfg CONFIG_NLS_CODEPAGE_860 $CONFIG_NLS_CODEPAGE_860 [list $notmod] 2 }
	global CONFIG_NLS_CODEPAGE_861
	if {($CONFIG_NLS == 1)} then {write_tristate $cfg $autocfg CONFIG_NLS_CODEPAGE_861 $CONFIG_NLS_CODEPAGE_861 [list $notmod] 2 }
	global CONFIG_NLS_CODEPAGE_862
	if {($CONFIG_NLS == 1)} then {write_tristate $cfg $autocfg CONFIG_NLS_CODEPAGE_862 $CONFIG_NLS_CODEPAGE_862 [list $notmod] 2 }
	global CONFIG_NLS_CODEPAGE_863
	if {($CONFIG_NLS == 1)} then {write_tristate $cfg $autocfg CONFIG_NLS_CODEPAGE_863 $CONFIG_NLS_CODEPAGE_863 [list $notmod] 2 }
	global CONFIG_NLS_CODEPAGE_864
	if {($CONFIG_NLS == 1)} then {write_tristate $cfg $autocfg CONFIG_NLS_CODEPAGE_864 $CONFIG_NLS_CODEPAGE_864 [list $notmod] 2 }
	global CONFIG_NLS_CODEPAGE_865
	if {($CONFIG_NLS == 1)} then {write_tristate $cfg $autocfg CONFIG_NLS_CODEPAGE_865 $CONFIG_NLS_CODEPAGE_865 [list $notmod] 2 }
	global CONFIG_NLS_CODEPAGE_866
	if {($CONFIG_NLS == 1)} then {write_tristate $cfg $autocfg CONFIG_NLS_CODEPAGE_866 $CONFIG_NLS_CODEPAGE_866 [list $notmod] 2 }
	global CONFIG_NLS_CODEPAGE_869
	if {($CONFIG_NLS == 1)} then {write_tristate $cfg $autocfg CONFIG_NLS_CODEPAGE_869 $CONFIG_NLS_CODEPAGE_869 [list $notmod] 2 }
	global CONFIG_NLS_CODEPAGE_936
	if {($CONFIG_NLS == 1)} then {write_tristate $cfg $autocfg CONFIG_NLS_CODEPAGE_936 $CONFIG_NLS_CODEPAGE_936 [list $notmod] 2 }
	global CONFIG_NLS_CODEPAGE_950
	if {($CONFIG_NLS == 1)} then {write_tristate $cfg $autocfg CONFIG_NLS_CODEPAGE_950 $CONFIG_NLS_CODEPAGE_950 [list $notmod] 2 }
	global CONFIG_NLS_CODEPAGE_932
	if {($CONFIG_NLS == 1)} then {write_tristate $cfg $autocfg CONFIG_NLS_CODEPAGE_932 $CONFIG_NLS_CODEPAGE_932 [list $notmod] 2 }
	global CONFIG_NLS_CODEPAGE_949
	if {($CONFIG_NLS == 1)} then {write_tristate $cfg $autocfg CONFIG_NLS_CODEPAGE_949 $CONFIG_NLS_CODEPAGE_949 [list $notmod] 2 }
	global CONFIG_NLS_CODEPAGE_874
	if {($CONFIG_NLS == 1)} then {write_tristate $cfg $autocfg CONFIG_NLS_CODEPAGE_874 $CONFIG_NLS_CODEPAGE_874 [list $notmod] 2 }
	global CONFIG_NLS_ISO8859_8
	if {($CONFIG_NLS == 1)} then {write_tristate $cfg $autocfg CONFIG_NLS_ISO8859_8 $CONFIG_NLS_ISO8859_8 [list $notmod] 2 }
	global CONFIG_NLS_CODEPAGE_1250
	if {($CONFIG_NLS == 1)} then {write_tristate $cfg $autocfg CONFIG_NLS_CODEPAGE_1250 $CONFIG_NLS_CODEPAGE_1250 [list $notmod] 2 }
	global CONFIG_NLS_CODEPAGE_1251
	if {($CONFIG_NLS == 1)} then {write_tristate $cfg $autocfg CONFIG_NLS_CODEPAGE_1251 $CONFIG_NLS_CODEPAGE_1251 [list $notmod] 2 }
	global CONFIG_NLS_ISO8859_1
	if {($CONFIG_NLS == 1)} then {write_tristate $cfg $autocfg CONFIG_NLS_ISO8859_1 $CONFIG_NLS_ISO8859_1 [list $notmod] 2 }
	global CONFIG_NLS_ISO8859_2
	if {($CONFIG_NLS == 1)} then {write_tristate $cfg $autocfg CONFIG_NLS_ISO8859_2 $CONFIG_NLS_ISO8859_2 [list $notmod] 2 }
	global CONFIG_NLS_ISO8859_3
	if {($CONFIG_NLS == 1)} then {write_tristate $cfg $autocfg CONFIG_NLS_ISO8859_3 $CONFIG_NLS_ISO8859_3 [list $notmod] 2 }
	global CONFIG_NLS_ISO8859_4
	if {($CONFIG_NLS == 1)} then {write_tristate $cfg $autocfg CONFIG_NLS_ISO8859_4 $CONFIG_NLS_ISO8859_4 [list $notmod] 2 }
	global CONFIG_NLS_ISO8859_5
	if {($CONFIG_NLS == 1)} then {write_tristate $cfg $autocfg CONFIG_NLS_ISO8859_5 $CONFIG_NLS_ISO8859_5 [list $notmod] 2 }
	global CONFIG_NLS_ISO8859_6
	if {($CONFIG_NLS == 1)} then {write_tristate $cfg $autocfg CONFIG_NLS_ISO8859_6 $CONFIG_NLS_ISO8859_6 [list $notmod] 2 }
	global CONFIG_NLS_ISO8859_7
	if {($CONFIG_NLS == 1)} then {write_tristate $cfg $autocfg CONFIG_NLS_ISO8859_7 $CONFIG_NLS_ISO8859_7 [list $notmod] 2 }
	global CONFIG_NLS_ISO8859_9
	if {($CONFIG_NLS == 1)} then {write_tristate $cfg $autocfg CONFIG_NLS_ISO8859_9 $CONFIG_NLS_ISO8859_9 [list $notmod] 2 }
	global CONFIG_NLS_ISO8859_13
	if {($CONFIG_NLS == 1)} then {write_tristate $cfg $autocfg CONFIG_NLS_ISO8859_13 $CONFIG_NLS_ISO8859_13 [list $notmod] 2 }
	global CONFIG_NLS_ISO8859_14
	if {($CONFIG_NLS == 1)} then {write_tristate $cfg $autocfg CONFIG_NLS_ISO8859_14 $CONFIG_NLS_ISO8859_14 [list $notmod] 2 }
	global CONFIG_NLS_ISO8859_15
	if {($CONFIG_NLS == 1)} then {write_tristate $cfg $autocfg CONFIG_NLS_ISO8859_15 $CONFIG_NLS_ISO8859_15 [list $notmod] 2 }
	global CONFIG_NLS_KOI8_R
	if {($CONFIG_NLS == 1)} then {write_tristate $cfg $autocfg CONFIG_NLS_KOI8_R $CONFIG_NLS_KOI8_R [list $notmod] 2 }
	global CONFIG_NLS_KOI8_U
	if {($CONFIG_NLS == 1)} then {write_tristate $cfg $autocfg CONFIG_NLS_KOI8_U $CONFIG_NLS_KOI8_U [list $notmod] 2 }
	global CONFIG_NLS_UTF8
	if {($CONFIG_NLS == 1)} then {write_tristate $cfg $autocfg CONFIG_NLS_UTF8 $CONFIG_NLS_UTF8 [list $notmod] 2 }
	if {($CONFIG_VT == 1)} then {write_comment $cfg $autocfg "Console drivers"}
	global CONFIG_VGA_CONSOLE
	if {($CONFIG_VT == 1)} then {write_tristate $cfg $autocfg CONFIG_VGA_CONSOLE $CONFIG_VGA_CONSOLE [list $notmod] 2 }
	global CONFIG_VIDEO_SELECT
	if {($CONFIG_VT == 1)} then {write_tristate $cfg $autocfg CONFIG_VIDEO_SELECT $CONFIG_VIDEO_SELECT [list $notmod] 2 }
	global CONFIG_MDA_CONSOLE
	if {($CONFIG_VT == 1) && ($CONFIG_EXPERIMENTAL == 1)} then {write_tristate $cfg $autocfg CONFIG_MDA_CONSOLE $CONFIG_MDA_CONSOLE [list $notmod] 2 }
	if {($CONFIG_VT == 1) && ($CONFIG_EXPERIMENTAL == 1)} then {write_comment $cfg $autocfg "Frame-buffer support"}
	global CONFIG_FB
	if {($CONFIG_VT == 1) && ($CONFIG_EXPERIMENTAL == 1)} then {write_tristate $cfg $autocfg CONFIG_FB $CONFIG_FB [list $notmod] 2 }
	global CONFIG_DUMMY_CONSOLE
	if {($CONFIG_VT == 1) && ($CONFIG_EXPERIMENTAL == 1) && ($CONFIG_FB == 1)} then {write_tristate $cfg $autocfg CONFIG_DUMMY_CONSOLE $CONSTANT_Y [list $notmod] 2 }
	global CONFIG_FB_RIVA
	if {($CONFIG_VT == 1) && ($CONFIG_FB == 1) && ($CONFIG_EXPERIMENTAL == 1) && ($CONFIG_PCI == 1)} then {write_tristate $cfg $autocfg CONFIG_FB_RIVA $CONFIG_FB_RIVA [list $notmod] 2 }
	global CONFIG_FB_CLGEN
	if {($CONFIG_VT == 1) && ($CONFIG_FB == 1) && ($CONFIG_EXPERIMENTAL == 1) && ($CONFIG_PCI == 1)} then {write_tristate $cfg $autocfg CONFIG_FB_CLGEN $CONFIG_FB_CLGEN [list $notmod] 2 }
	global CONFIG_FB_PM2
	if {($CONFIG_VT == 1) && ($CONFIG_FB == 1) && ($CONFIG_EXPERIMENTAL == 1) && ($CONFIG_PCI == 1)} then {write_tristate $cfg $autocfg CONFIG_FB_PM2 $CONFIG_FB_PM2 [list $notmod] 2 }
	global CONFIG_FB_PM2_FIFO_DISCONNECT
	if {($CONFIG_VT == 1) && ($CONFIG_FB == 1) && ($CONFIG_EXPERIMENTAL == 1) && ($CONFIG_FB_PM2 == 1 || $CONFIG_FB_PM2 == 2) && ($CONFIG_PCI == 1)} then {write_tristate $cfg $autocfg CONFIG_FB_PM2_FIFO_DISCONNECT $CONFIG_FB_PM2_FIFO_DISCONNECT [list $notmod] 2 }
	global CONFIG_FB_PM2_PCI
	if {($CONFIG_VT == 1) && ($CONFIG_FB == 1) && ($CONFIG_EXPERIMENTAL == 1) && ($CONFIG_FB_PM2 == 1 || $CONFIG_FB_PM2 == 2) && ($CONFIG_PCI == 1)} then {write_tristate $cfg $autocfg CONFIG_FB_PM2_PCI $CONFIG_FB_PM2_PCI [list $notmod] 2 }
	global CONFIG_FB_PM3
	if {($CONFIG_VT == 1) && ($CONFIG_FB == 1) && ($CONFIG_EXPERIMENTAL == 1) && ($CONFIG_PCI == 1)} then {write_tristate $cfg $autocfg CONFIG_FB_PM3 $CONFIG_FB_PM3 [list $notmod] 2 }
	global CONFIG_FB_CYBER2000
	if {($CONFIG_VT == 1) && ($CONFIG_EXPERIMENTAL == 1) && ($CONFIG_FB == 1) && ($CONFIG_PCI == 1 || $CONFIG_PCI == 2 || $CONFIG_PCI == 4)} then {write_tristate $cfg $autocfg CONFIG_FB_CYBER2000 $CONFIG_FB_CYBER2000 [list $CONFIG_PCI] 2 }
	global CONFIG_FB_VESA
	if {($CONFIG_VT == 1) && ($CONFIG_EXPERIMENTAL == 1) && ($CONFIG_FB == 1)} then {write_tristate $cfg $autocfg CONFIG_FB_VESA $CONFIG_FB_VESA [list $notmod] 2 }
	global CONFIG_FB_VGA16
	if {($CONFIG_VT == 1) && ($CONFIG_EXPERIMENTAL == 1) && ($CONFIG_FB == 1)} then {write_tristate $cfg $autocfg CONFIG_FB_VGA16 $CONFIG_FB_VGA16 [list $notmod] 2 }
	global CONFIG_FB_HGA
	if {($CONFIG_VT == 1) && ($CONFIG_EXPERIMENTAL == 1) && ($CONFIG_FB == 1)} then {write_tristate $cfg $autocfg CONFIG_FB_HGA $CONFIG_FB_HGA [list $notmod] 2 }
	if {($CONFIG_VT == 1) && ($CONFIG_EXPERIMENTAL == 1) && ($CONFIG_FB == 1)} then {write_tristate $cfg $autocfg CONFIG_VIDEO_SELECT $CONSTANT_Y [list $notmod] 2 }
	global CONFIG_FB_MATROX
	if {($CONFIG_VT == 1) && ($CONFIG_FB == 1) && ($CONFIG_EXPERIMENTAL == 1) && ($CONFIG_PCI != 0)} then {write_tristate $cfg $autocfg CONFIG_FB_MATROX $CONFIG_FB_MATROX [list $notmod] 2 }
	global CONFIG_FB_MATROX_MILLENIUM
	if {($CONFIG_VT == 1) && ($CONFIG_FB == 1) && ($CONFIG_EXPERIMENTAL == 1) && ($CONFIG_PCI != 0) && ($CONFIG_FB_MATROX != 0)} then {write_tristate $cfg $autocfg CONFIG_FB_MATROX_MILLENIUM $CONFIG_FB_MATROX_MILLENIUM [list $notmod] 2 }
	global CONFIG_FB_MATROX_MYSTIQUE
	if {($CONFIG_VT == 1) && ($CONFIG_FB == 1) && ($CONFIG_EXPERIMENTAL == 1) && ($CONFIG_PCI != 0) && ($CONFIG_FB_MATROX != 0)} then {write_tristate $cfg $autocfg CONFIG_FB_MATROX_MYSTIQUE $CONFIG_FB_MATROX_MYSTIQUE [list $notmod] 2 }
	global CONFIG_FB_MATROX_G100
	if {($CONFIG_VT == 1) && ($CONFIG_FB == 1) && ($CONFIG_EXPERIMENTAL == 1) && ($CONFIG_PCI != 0) && ($CONFIG_FB_MATROX != 0)} then {write_tristate $cfg $autocfg CONFIG_FB_MATROX_G100 $CONFIG_FB_MATROX_G100 [list $notmod] 2 }
	global CONFIG_FB_MATROX_I2C
	if {($CONFIG_VT == 1) && ($CONFIG_FB == 1) && ($CONFIG_EXPERIMENTAL == 1) && ($CONFIG_PCI != 0) && ($CONFIG_FB_MATROX != 0) && ($CONFIG_I2C != 0) && ($CONFIG_FB_MATROX == 1 || $CONFIG_FB_MATROX == 2 || $CONFIG_FB_MATROX == 4) && ($CONFIG_I2C_ALGOBIT == 1 || $CONFIG_I2C_ALGOBIT == 2 || $CONFIG_I2C_ALGOBIT == 4)} then {write_tristate $cfg $autocfg CONFIG_FB_MATROX_I2C $CONFIG_FB_MATROX_I2C [list $CONFIG_FB_MATROX $CONFIG_I2C_ALGOBIT] 2 }
	global CONFIG_FB_MATROX_MAVEN
	if {($CONFIG_VT == 1) && ($CONFIG_FB == 1) && ($CONFIG_EXPERIMENTAL == 1) && ($CONFIG_PCI != 0) && ($CONFIG_FB_MATROX != 0) && ($CONFIG_I2C != 0) && ($CONFIG_FB_MATROX_G100 == 1) && ($CONFIG_FB_MATROX_I2C == 1 || $CONFIG_FB_MATROX_I2C == 2 || $CONFIG_FB_MATROX_I2C == 4)} then {write_tristate $cfg $autocfg CONFIG_FB_MATROX_MAVEN $CONFIG_FB_MATROX_MAVEN [list $CONFIG_FB_MATROX_I2C] 2 }
	global CONFIG_FB_MATROX_G450
	if {($CONFIG_VT == 1) && ($CONFIG_FB == 1) && ($CONFIG_EXPERIMENTAL == 1) && ($CONFIG_PCI != 0) && ($CONFIG_FB_MATROX != 0) && ($CONFIG_FB_MATROX_G100 == 1 || $CONFIG_FB_MATROX_G100 == 2 || $CONFIG_FB_MATROX_G100 == 4)} then {write_tristate $cfg $autocfg CONFIG_FB_MATROX_G450 $CONFIG_FB_MATROX_G450 [list $CONFIG_FB_MATROX_G100] 2 }
	global CONFIG_FB_MATROX_PROC
	if {($CONFIG_VT == 1) && ($CONFIG_FB == 1) && ($CONFIG_EXPERIMENTAL == 1) && ($CONFIG_PCI != 0) && ($CONFIG_FB_MATROX != 0) && ($CONFIG_FB_MATROX == 1 || $CONFIG_FB_MATROX == 2 || $CONFIG_FB_MATROX == 4)} then {write_tristate $cfg $autocfg CONFIG_FB_MATROX_PROC $CONFIG_FB_MATROX_PROC [list $CONFIG_FB_MATROX] 2 }
	global CONFIG_FB_MATROX_MULTIHEAD
	if {($CONFIG_VT == 1) && ($CONFIG_FB == 1) && ($CONFIG_EXPERIMENTAL == 1) && ($CONFIG_PCI != 0) && ($CONFIG_FB_MATROX != 0)} then {write_tristate $cfg $autocfg CONFIG_FB_MATROX_MULTIHEAD $CONFIG_FB_MATROX_MULTIHEAD [list $notmod] 2 }
	global CONFIG_FB_ATY
	if {($CONFIG_VT == 1) && ($CONFIG_FB == 1) && ($CONFIG_EXPERIMENTAL == 1) && ($CONFIG_PCI != 0)} then {write_tristate $cfg $autocfg CONFIG_FB_ATY $CONFIG_FB_ATY [list $notmod] 2 }
	global CONFIG_FB_ATY_GX
	if {($CONFIG_VT == 1) && ($CONFIG_FB == 1) && ($CONFIG_EXPERIMENTAL == 1) && ($CONFIG_PCI != 0) && ($CONFIG_FB_ATY != 0)} then {write_tristate $cfg $autocfg CONFIG_FB_ATY_GX $CONFIG_FB_ATY_GX [list $notmod] 2 }
	global CONFIG_FB_ATY_CT
	if {($CONFIG_VT == 1) && ($CONFIG_FB == 1) && ($CONFIG_EXPERIMENTAL == 1) && ($CONFIG_PCI != 0) && ($CONFIG_FB_ATY != 0)} then {write_tristate $cfg $autocfg CONFIG_FB_ATY_CT $CONFIG_FB_ATY_CT [list $notmod] 2 }
	global CONFIG_FB_RADEON
	if {($CONFIG_VT == 1) && ($CONFIG_FB == 1) && ($CONFIG_EXPERIMENTAL == 1) && ($CONFIG_PCI != 0)} then {write_tristate $cfg $autocfg CONFIG_FB_RADEON $CONFIG_FB_RADEON [list $notmod] 2 }
	global CONFIG_FB_ATY128
	if {($CONFIG_VT == 1) && ($CONFIG_FB == 1) && ($CONFIG_EXPERIMENTAL == 1) && ($CONFIG_PCI != 0)} then {write_tristate $cfg $autocfg CONFIG_FB_ATY128 $CONFIG_FB_ATY128 [list $notmod] 2 }
	global CONFIG_FB_SIS
	if {($CONFIG_VT == 1) && ($CONFIG_FB == 1) && ($CONFIG_EXPERIMENTAL == 1) && ($CONFIG_PCI != 0)} then {write_tristate $cfg $autocfg CONFIG_FB_SIS $CONFIG_FB_SIS [list $notmod] 2 }
	global CONFIG_FB_SIS_300
	if {($CONFIG_VT == 1) && ($CONFIG_FB == 1) && ($CONFIG_EXPERIMENTAL == 1) && ($CONFIG_PCI != 0) && ($CONFIG_FB_SIS != 0)} then {write_tristate $cfg $autocfg CONFIG_FB_SIS_300 $CONFIG_FB_SIS_300 [list $notmod] 2 }
	global CONFIG_FB_SIS_315
	if {($CONFIG_VT == 1) && ($CONFIG_FB == 1) && ($CONFIG_EXPERIMENTAL == 1) && ($CONFIG_PCI != 0) && ($CONFIG_FB_SIS != 0)} then {write_tristate $cfg $autocfg CONFIG_FB_SIS_315 $CONFIG_FB_SIS_315 [list $notmod] 2 }
	global CONFIG_FB_NEOMAGIC
	if {($CONFIG_VT == 1) && ($CONFIG_FB == 1) && ($CONFIG_EXPERIMENTAL == 1) && ($CONFIG_PCI != 0)} then {write_tristate $cfg $autocfg CONFIG_FB_NEOMAGIC $CONFIG_FB_NEOMAGIC [list $notmod] 2 }
	global CONFIG_FB_3DFX
	if {($CONFIG_VT == 1) && ($CONFIG_FB == 1) && ($CONFIG_EXPERIMENTAL == 1) && ($CONFIG_PCI != 0)} then {write_tristate $cfg $autocfg CONFIG_FB_3DFX $CONFIG_FB_3DFX [list $notmod] 2 }
	global CONFIG_FB_VOODOO1
	if {($CONFIG_VT == 1) && ($CONFIG_FB == 1) && ($CONFIG_EXPERIMENTAL == 1) && ($CONFIG_PCI != 0)} then {write_tristate $cfg $autocfg CONFIG_FB_VOODOO1 $CONFIG_FB_VOODOO1 [list $notmod] 2 }
	global CONFIG_FB_TRIDENT
	if {($CONFIG_VT == 1) && ($CONFIG_FB == 1) && ($CONFIG_EXPERIMENTAL == 1) && ($CONFIG_PCI != 0)} then {write_tristate $cfg $autocfg CONFIG_FB_TRIDENT $CONFIG_FB_TRIDENT [list $notmod] 2 }
	global CONFIG_FB_VIRTUAL
	if {($CONFIG_VT == 1) && ($CONFIG_FB == 1) && ($CONFIG_EXPERIMENTAL == 1)} then {write_tristate $cfg $autocfg CONFIG_FB_VIRTUAL $CONFIG_FB_VIRTUAL [list $notmod] 2 }
	global CONFIG_FBCON_ADVANCED
	if {($CONFIG_VT == 1) && ($CONFIG_EXPERIMENTAL == 1) && ($CONFIG_FB == 1)} then {write_tristate $cfg $autocfg CONFIG_FBCON_ADVANCED $CONFIG_FBCON_ADVANCED [list $notmod] 2 }
	global CONFIG_FBCON_MFB
	if {($CONFIG_VT == 1) && ($CONFIG_EXPERIMENTAL == 1) && ($CONFIG_FB == 1) && ($CONFIG_FBCON_ADVANCED == 1)} then {write_tristate $cfg $autocfg CONFIG_FBCON_MFB $CONFIG_FBCON_MFB [list $notmod] 2 }
	global CONFIG_FBCON_CFB2
	if {($CONFIG_VT == 1) && ($CONFIG_EXPERIMENTAL == 1) && ($CONFIG_FB == 1) && ($CONFIG_FBCON_ADVANCED == 1)} then {write_tristate $cfg $autocfg CONFIG_FBCON_CFB2 $CONFIG_FBCON_CFB2 [list $notmod] 2 }
	global CONFIG_FBCON_CFB4
	if {($CONFIG_VT == 1) && ($CONFIG_EXPERIMENTAL == 1) && ($CONFIG_FB == 1) && ($CONFIG_FBCON_ADVANCED == 1)} then {write_tristate $cfg $autocfg CONFIG_FBCON_CFB4 $CONFIG_FBCON_CFB4 [list $notmod] 2 }
	global CONFIG_FBCON_CFB8
	if {($CONFIG_VT == 1) && ($CONFIG_EXPERIMENTAL == 1) && ($CONFIG_FB == 1) && ($CONFIG_FBCON_ADVANCED == 1)} then {write_tristate $cfg $autocfg CONFIG_FBCON_CFB8 $CONFIG_FBCON_CFB8 [list $notmod] 2 }
	global CONFIG_FBCON_CFB16
	if {($CONFIG_VT == 1) && ($CONFIG_EXPERIMENTAL == 1) && ($CONFIG_FB == 1) && ($CONFIG_FBCON_ADVANCED == 1)} then {write_tristate $cfg $autocfg CONFIG_FBCON_CFB16 $CONFIG_FBCON_CFB16 [list $notmod] 2 }
	global CONFIG_FBCON_CFB24
	if {($CONFIG_VT == 1) && ($CONFIG_EXPERIMENTAL == 1) && ($CONFIG_FB == 1) && ($CONFIG_FBCON_ADVANCED == 1)} then {write_tristate $cfg $autocfg CONFIG_FBCON_CFB24 $CONFIG_FBCON_CFB24 [list $notmod] 2 }
	global CONFIG_FBCON_CFB32
	if {($CONFIG_VT == 1) && ($CONFIG_EXPERIMENTAL == 1) && ($CONFIG_FB == 1) && ($CONFIG_FBCON_ADVANCED == 1)} then {write_tristate $cfg $autocfg CONFIG_FBCON_CFB32 $CONFIG_FBCON_CFB32 [list $notmod] 2 }
	global CONFIG_FBCON_AFB
	if {($CONFIG_VT == 1) && ($CONFIG_EXPERIMENTAL == 1) && ($CONFIG_FB == 1) && ($CONFIG_FBCON_ADVANCED == 1)} then {write_tristate $cfg $autocfg CONFIG_FBCON_AFB $CONFIG_FBCON_AFB [list $notmod] 2 }
	global CONFIG_FBCON_ILBM
	if {($CONFIG_VT == 1) && ($CONFIG_EXPERIMENTAL == 1) && ($CONFIG_FB == 1) && ($CONFIG_FBCON_ADVANCED == 1)} then {write_tristate $cfg $autocfg CONFIG_FBCON_ILBM $CONFIG_FBCON_ILBM [list $notmod] 2 }
	global CONFIG_FBCON_IPLAN2P2
	if {($CONFIG_VT == 1) && ($CONFIG_EXPERIMENTAL == 1) && ($CONFIG_FB == 1) && ($CONFIG_FBCON_ADVANCED == 1)} then {write_tristate $cfg $autocfg CONFIG_FBCON_IPLAN2P2 $CONFIG_FBCON_IPLAN2P2 [list $notmod] 2 }
	global CONFIG_FBCON_IPLAN2P4
	if {($CONFIG_VT == 1) && ($CONFIG_EXPERIMENTAL == 1) && ($CONFIG_FB == 1) && ($CONFIG_FBCON_ADVANCED == 1)} then {write_tristate $cfg $autocfg CONFIG_FBCON_IPLAN2P4 $CONFIG_FBCON_IPLAN2P4 [list $notmod] 2 }
	global CONFIG_FBCON_IPLAN2P8
	if {($CONFIG_VT == 1) && ($CONFIG_EXPERIMENTAL == 1) && ($CONFIG_FB == 1) && ($CONFIG_FBCON_ADVANCED == 1)} then {write_tristate $cfg $autocfg CONFIG_FBCON_IPLAN2P8 $CONFIG_FBCON_IPLAN2P8 [list $notmod] 2 }
	global CONFIG_FBCON_MAC
	if {($CONFIG_VT == 1) && ($CONFIG_EXPERIMENTAL == 1) && ($CONFIG_FB == 1) && ($CONFIG_FBCON_ADVANCED == 1)} then {write_tristate $cfg $autocfg CONFIG_FBCON_MAC $CONFIG_FBCON_MAC [list $notmod] 2 }
	global CONFIG_FBCON_VGA_PLANES
	if {($CONFIG_VT == 1) && ($CONFIG_EXPERIMENTAL == 1) && ($CONFIG_FB == 1) && ($CONFIG_FBCON_ADVANCED == 1)} then {write_tristate $cfg $autocfg CONFIG_FBCON_VGA_PLANES $CONFIG_FBCON_VGA_PLANES [list $notmod] 2 }
	global CONFIG_FBCON_VGA
	if {($CONFIG_VT == 1) && ($CONFIG_EXPERIMENTAL == 1) && ($CONFIG_FB == 1) && ($CONFIG_FBCON_ADVANCED == 1)} then {write_tristate $cfg $autocfg CONFIG_FBCON_VGA $CONFIG_FBCON_VGA [list $notmod] 2 }
	global CONFIG_FBCON_HGA
	if {($CONFIG_VT == 1) && ($CONFIG_EXPERIMENTAL == 1) && ($CONFIG_FB == 1) && ($CONFIG_FBCON_ADVANCED == 1)} then {write_tristate $cfg $autocfg CONFIG_FBCON_HGA $CONFIG_FBCON_HGA [list $notmod] 2 }
	global CONFIG_FB_ACORN
	global CONFIG_FB_AMIGA
	global CONFIG_FB_ATARI
	global CONFIG_FB_CYBER
	global CONFIG_FB_MAC
	global CONFIG_FB_RETINAZ3
	global CONFIG_FB_VIRGE
	global CONFIG_FB_BWTWO
	global CONFIG_FB_TX3912
	if {($CONFIG_VT == 1) && ($CONFIG_EXPERIMENTAL == 1) && ($CONFIG_FB == 1) && ($CONFIG_FBCON_ADVANCED != 1) && ($CONFIG_FB_ACORN == 1 || $CONFIG_FB_AMIGA == 1 || $CONFIG_FB_ATARI == 1 || $CONFIG_FB_CYBER == 1 || $CONFIG_FB_MAC == 1 || $CONFIG_FB_RETINAZ3 == 1 || $CONFIG_FB_VIRGE == 1 || $CONFIG_FB_VIRTUAL == 1 || $CONFIG_FB_BWTWO == 1 || $CONFIG_FB_CLGEN == 1 || $CONFIG_FB_TX3912 == 1)} then {write_tristate $cfg $autocfg CONFIG_FBCON_MFB $CONSTANT_Y [list $notmod] 2 }
	if {($CONFIG_VT == 1) && ($CONFIG_EXPERIMENTAL == 1) && ($CONFIG_FB == 1) && ($CONFIG_FBCON_ADVANCED != 1) && ($CONFIG_FB_ACORN != 1 && $CONFIG_FB_AMIGA != 1 && $CONFIG_FB_ATARI != 1 && $CONFIG_FB_CYBER != 1 && $CONFIG_FB_MAC != 1 && $CONFIG_FB_RETINAZ3 != 1 && $CONFIG_FB_VIRGE != 1 && $CONFIG_FB_VIRTUAL != 1 && $CONFIG_FB_BWTWO != 1 && $CONFIG_FB_CLGEN != 1 && $CONFIG_FB_TX3912 != 1) && ($CONFIG_FB_ACORN == 2 || $CONFIG_FB_AMIGA == 2 || $CONFIG_FB_ATARI == 2 || $CONFIG_FB_CYBER == 2 || $CONFIG_FB_MAC == 2 || $CONFIG_FB_RETINAZ3 == 2 || $CONFIG_FB_VIRGE == 2 || $CONFIG_FB_VIRTUAL == 2 || $CONFIG_FB_BWTWO == 2 || $CONFIG_FB_CLGEN == 2 || $CONFIG_FB_TX3912 == 2)} then {write_tristate $cfg $autocfg CONFIG_FBCON_MFB $CONSTANT_M [list $notmod] 2 }
	global CONFIG_FB_SA1100
	if {($CONFIG_VT == 1) && ($CONFIG_EXPERIMENTAL == 1) && ($CONFIG_FB == 1) && ($CONFIG_FBCON_ADVANCED != 1) && ($CONFIG_FB_ACORN == 1 || $CONFIG_FB_MAC == 1 || $CONFIG_FB_SA1100 == 1 || $CONFIG_FB_VIRTUAL == 1 || $CONFIG_FB_TX3912 == 1)} then {write_tristate $cfg $autocfg CONFIG_FBCON_CFB2 $CONSTANT_Y [list $notmod] 2 }
	if {($CONFIG_VT == 1) && ($CONFIG_EXPERIMENTAL == 1) && ($CONFIG_FB == 1) && ($CONFIG_FBCON_ADVANCED != 1) && ($CONFIG_FB_ACORN == 1 || $CONFIG_FB_MAC == 1 || $CONFIG_FB_SA1100 == 1 || $CONFIG_FB_VIRTUAL == 1 || $CONFIG_FB_TX3912 == 1)} then {write_tristate $cfg $autocfg CONFIG_FBCON_CFB4 $CONSTANT_Y [list $notmod] 2 }
	if {($CONFIG_VT == 1) && ($CONFIG_EXPERIMENTAL == 1) && ($CONFIG_FB == 1) && ($CONFIG_FBCON_ADVANCED != 1) && ($CONFIG_FB_ACORN != 1 && $CONFIG_FB_MAC != 1 && $CONFIG_FB_SA1100 != 1 && $CONFIG_FB_VIRTUAL != 1 && $CONFIG_FB_TX3912 != 1) && ($CONFIG_FB_ACORN == 2 || $CONFIG_FB_MAC == 2 || $CONFIG_FB_SA1100 == 2 || $CONFIG_FB_VIRTUAL == 2 || $CONFIG_FB_TX3912 == 2)} then {write_tristate $cfg $autocfg CONFIG_FBCON_CFB2 $CONSTANT_M [list $notmod] 2 }
	if {($CONFIG_VT == 1) && ($CONFIG_EXPERIMENTAL == 1) && ($CONFIG_FB == 1) && ($CONFIG_FBCON_ADVANCED != 1) && ($CONFIG_FB_ACORN != 1 && $CONFIG_FB_MAC != 1 && $CONFIG_FB_SA1100 != 1 && $CONFIG_FB_VIRTUAL != 1 && $CONFIG_FB_TX3912 != 1) && ($CONFIG_FB_ACORN == 2 || $CONFIG_FB_MAC == 2 || $CONFIG_FB_SA1100 == 2 || $CONFIG_FB_VIRTUAL == 2 || $CONFIG_FB_TX3912 == 2)} then {write_tristate $cfg $autocfg CONFIG_FBCON_CFB4 $CONSTANT_M [list $notmod] 2 }
	global CONFIG_FB_OF
	global CONFIG_FB_TGA
	global CONFIG_FB_TCX
	global CONFIG_FB_CGTHREE
	global CONFIG_FB_CONTROL
	global CONFIG_FB_CGFOURTEEN
	global CONFIG_FB_G364
	global CONFIG_FB_VALKYRIE
	global CONFIG_FB_PLATINUM
	global CONFIG_FB_IGA
	global CONFIG_FB_CT65550
	global CONFIG_FB_P9100
	global CONFIG_FB_SGIVW
	global CONFIG_FB_PMAG_BA
	global CONFIG_FB_PMAGB_B
	global CONFIG_FB_MAXINE
	if {($CONFIG_VT == 1) && ($CONFIG_EXPERIMENTAL == 1) && ($CONFIG_FB == 1) && ($CONFIG_FBCON_ADVANCED != 1) && ($CONFIG_FB_ACORN == 1 || $CONFIG_FB_ATARI == 1 || $CONFIG_FB_ATY == 1 || $CONFIG_FB_MAC == 1 || $CONFIG_FB_OF == 1 || $CONFIG_FB_TGA == 1 || $CONFIG_FB_VESA == 1 || $CONFIG_FB_VIRTUAL == 1 || $CONFIG_FB_TCX == 1 || $CONFIG_FB_CGTHREE == 1 || $CONFIG_FB_CONTROL == 1 || $CONFIG_FB_CLGEN == 1 || $CONFIG_FB_CGFOURTEEN == 1 || $CONFIG_FB_G364 == 1 || $CONFIG_FB_VIRGE == 1 || $CONFIG_FB_CYBER == 1 || $CONFIG_FB_VALKYRIE == 1 || $CONFIG_FB_PLATINUM == 1 || $CONFIG_FB_IGA == 1 || $CONFIG_FB_MATROX == 1 || $CONFIG_FB_CT65550 == 1 || $CONFIG_FB_PM2 == 1 || $CONFIG_FB_PM3 == 1 || $CONFIG_FB_P9100 == 1 || $CONFIG_FB_ATY128 == 1 || $CONFIG_FB_RIVA == 1 || $CONFIG_FB_RADEON == 1 || $CONFIG_FB_SGIVW == 1 || $CONFIG_FB_CYBER2000 == 1 || $CONFIG_FB_SA1100 == 1 || $CONFIG_FB_3DFX == 1 || $CONFIG_FB_PMAG_BA == 1 || $CONFIG_FB_PMAGB_B == 1 || $CONFIG_FB_MAXINE == 1 || $CONFIG_FB_TX3912 == 1 || $CONFIG_FB_SIS == 1 || $CONFIG_FB_NEOMAGIC == 1)} then {write_tristate $cfg $autocfg CONFIG_FBCON_CFB8 $CONSTANT_Y [list $notmod] 2 }
	if {($CONFIG_VT == 1) && ($CONFIG_EXPERIMENTAL == 1) && ($CONFIG_FB == 1) && ($CONFIG_FBCON_ADVANCED != 1) && ($CONFIG_FB_ACORN != 1 && $CONFIG_FB_ATARI != 1 && $CONFIG_FB_ATY != 1 && $CONFIG_FB_MAC != 1 && $CONFIG_FB_OF != 1 && $CONFIG_FB_TGA != 1 && $CONFIG_FB_VESA != 1 && $CONFIG_FB_VIRTUAL != 1 && $CONFIG_FB_TCX != 1 && $CONFIG_FB_CGTHREE != 1 && $CONFIG_FB_CONTROL != 1 && $CONFIG_FB_CLGEN != 1 && $CONFIG_FB_CGFOURTEEN != 1 && $CONFIG_FB_G364 != 1 && $CONFIG_FB_VIRGE != 1 && $CONFIG_FB_CYBER != 1 && $CONFIG_FB_VALKYRIE != 1 && $CONFIG_FB_PLATINUM != 1 && $CONFIG_FB_IG

			tmp->next = isa_dev;
		}

		isa_dev->bus = isa_br;
		isa_dev->prom_node = node;
		prop_len = prom_getproperty(node, "name",
					    (char *) isa_dev->prom_name,
					    sizeof(isa_dev->prom_name));
		if (prop_len <= 0) {
			fatal_err("cannot get isa_dev OBP node name");
			prom_halt();
		}

		prop_len = prom_getproperty(node, "compatible",
					    (char *) isa_dev->compatible,
					    sizeof(isa_dev->compatible));

		/* Not having this is OK. */
		if (prop_len <= 0)
			isa_dev->compatible[0] = '\0';

		isa_dev_get_resource(isa_dev);
		isa_dev_get_irq(isa_dev);

		report_dev(isa_dev, 0);

		isa_fill_children(isa_dev);

		printk("]");

		node = prom_getsibling(node);
	}
}

void __init isa_init(void)
{
	struct pci_dev *pdev;
	unsigned short vendor, device;
	int index = 0;

	vendor = PCI_VENDOR_ID_AL;
	device = PCI_DEVICE_ID_AL_M1533;

	pdev = NULL;
	while ((pdev = pci_find_device(vendor, device, pdev)) != NULL) {
		struct pcidev_cookie *pdev_cookie;
		struct pci_pbm_info *pbm;
		struct isa_bridge *isa_br;
		int prop_len;

		pdev_cookie = pdev->sysdata;
		if (!pdev_cookie) {
			printk("ISA: Warning, ISA bridge ignored due to "
			       "lack of OBP data.\n");
			continue;
		}
		pbm = pdev_cookie->pbm;

		isa_br = kmalloc(sizeof(*isa_br), GFP_KERNEL);
		if (!isa_br) {
			fatal_err("cannot allocate isa_bridge");
			prom_halt();
		}

		memset(isa_br, 0, sizeof(*isa_br));

		/* Link it in. */
		isa_br->next = isa_chain;
		isa_chain = isa_br;

		isa_br->parent = pbm;
		isa_br->self = pdev;
		isa_br->index = index++;
		isa_br->prom_node = pdev_cookie->prom_node;
		strncpy(isa_br->prom_name, pdev_cookie->prom_name,
			sizeof(isa_br->prom_name));

		prop_len = prom_getproperty(isa_br->prom_node,
					    "ranges",
					    (char *) isa_br->isa_ranges,
					    sizeof(isa_br->isa_ranges));
		if (prop_len <= 0)
			isa_br->num_isa_ranges = 0;
		else
			isa_br->num_isa_ranges =
				(prop_len / sizeof(struct linux_prom_isa_ranges));

		printk("isa%d:", isa_br->index);

		isa_fill_devices(isa_br);

		printk("\n");
	}
}
/* $Id: blockops.S,v 1.41 2001/12/05 06:05:35 davem Exp $
 * blockops.S: UltraSparc block zero optimized routines.
 *
 * Copyright (C) 1996, 1998, 1999, 2000 David S. Miller (davem@redhat.com)
 * Copyright (C) 1997 Jakub Jelinek (jakub@redhat.com)
 */

#include "VIS.h"
#include <asm/visasm.h>
#include <asm/page.h>
#include <asm/pgtable.h>
#include <asm/asm_offsets.h>

#define TOUCH(reg0, reg1, reg2, reg3, reg4, reg5, reg6, reg7)	\
	fmovd	%reg0, %f48; 	fmovd	%reg1, %f50;		\
	fmovd	%reg2, %f52; 	fmovd	%reg3, %f54;		\
	fmovd	%reg4, %f56; 	fmovd	%reg5, %f58;		\
	fmovd	%reg6, %f60; 	fmovd	%reg7, %f62;

#define	DCACHE_SIZE	(PAGE_SIZE * 2)
#define TLBTEMP_ENT1	(60 << 3)
#define TLBTEMP_ENT2	(61 << 3)
#define TLBTEMP_ENTSZ	(1 << 3)

#if (PAGE_SHIFT == 13) || (PAGE_SHIFT == 19)
#define PAGE_SIZE_REM	0x80
#elif (PAGE_SHIFT == 16) || (PAGE_SHIFT == 22)
#define PAGE_SIZE_REM	0x100
#else
#error Wrong PAGE_SHIFT specified
#endif

	.text

	.align		32
	.globl		copy_user_page
	.type		copy_user_page,@function
copy_user_page: /* %o0=dest, %o1=src, %o2=vaddr */
	VISEntry
	sethi		%hi(PAGE_SIZE), %g3
	sub		%o0, %g4, %g1
	and		%o2, %g3, %o0
	sethi		%hi(TLBTEMP_BASE), %o3
	sethi		%uhi(_PAGE_VALID | _PAGE_SZBITS), %g3
	sub		%o1, %g4, %g2
	sllx		%g3, 32, %g3
	mov		TLB_TAG_ACCESS, %o2
	or		%g3, (_PAGE_CP | _PAGE_CV | _PAGE_P | _PAGE_L | _PAGE_W), %g3
	sethi		%hi(DCACHE_SIZE), %o1
	or		%g1, %g3, %g1
	or		%g2, %g3, %g2
	add		%o0, %o3, %o0
	add		%o0, %o1, %o1
#define FIX_INSN_1	0x96102060 /* mov (12 << 3), %o3 */
cheetah_patch_1:
	mov		TLBTEMP_ENT1, %o3
	rdpr		%pstate, %g3
	wrpr		%g3, PSTATE_IE, %pstate

	/* Do this now, before loading the fixed TLB entries for copying,
	 * so we do not risk a multiple TLB match condition later when
	 * restoring those entries.
	 */
	ldub		[%g6 + AOFF_task_thread + AOFF_thread_use_blkcommit], %g3

	/* Spitfire Errata #32 workaround */
	mov		0x8, %o4
	stxa		%g0, [%o4] ASI_DMMU
	membar		#Sync

	ldxa		[%o3] ASI_DTLB_TAG_READ, %o4

	/* Spitfire Errata #32 workaround */
	mov		0x8, %o5
	stxa		%g0, [%o5] ASI_DMMU
	membar		#Sync

	ldxa		[%o3] ASI_DTLB_DATA_ACCESS, %g0
	ldxa		[%o3] ASI_DTLB_DATA_ACCESS, %o5
	stxa		%o0, [%o2] ASI_DMMU
	stxa		%g1, [%o3] ASI_DTLB_DATA_ACCESS
	membar		#Sync
	add		%o3, (TLBTEMP_ENTSZ), %o3

	/* Spitfire Errata #32 workaround */
	mov		0x8, %g5
	stxa		%g0, [%g5] ASI_DMMU
	membar		#Sync

	ldxa		[%o3] ASI_DTLB_TAG_READ, %g5

	/* Spitfire Errata #32 workaround */
	mov		0x8, %g7
	stxa		%g0, [%g7] ASI_DMMU
	membar		#Sync

	ldxa		[%o3] ASI_DTLB_DATA_ACCESS, %g0
	ldxa		[%o3] ASI_DTLB_DATA_ACCESS, %g7
	stxa		%o1, [%o2] ASI_DMMU
	stxa		%g2, [%o3] ASI_DTLB_DATA_ACCESS
	membar		#Sync

	cmp		%g3, 0
	bne,pn		%xcc, copy_page_using_blkcommit
	 nop

	rdpr		%ver, %g3
	sllx		%g3, 16, %g3
	srlx		%g3, 32 + 16, %g3
	cmp		%g3, 0x14
	bne,pt		%icc, spitfire_copy_user_page
	 nop

cheetah_copy_user_page:
	sethi		%hi((PAGE_SIZE/64)-7), %o2	! A0 Group
	prefetch	[%o1 + 0x000], #one_read	! MS
	or		%o2, %lo((PAGE_SIZE/64)-7), %o2	! A1 Group
	prefetch	[%o1 + 0x040], #one_read	! MS
	prefetch	[%o1 + 0x080], #one_read	! MS Group
	prefetch	[%o1 + 0x0c0], #one_read	! MS Group
	ldd		[%o1 + 0x000], %f0		! MS Group
	prefetch	[%o1 + 0x100], #one_read	! MS Group
	ldd		[%o1 + 0x008], %f2		! AX
	prefetch	[%o1 + 0x140], #one_read	! MS Group
	ldd		[%o1 + 0x010], %f4		! AX
	prefetch	[%o1 + 0x180], #one_read	! MS Group
	fmovd		%f0, %f32			! FGA Group
	ldd		[%o1 + 0x018], %f6		! AX
	fmovd		%f2, %f34			! FGA Group
	ldd		[%o1 + 0x020], %f8		! MS
	fmovd		%f4, %f36			! FGA Group
	ldd		[%o1 + 0x028], %f10		! AX
	membar		#StoreStore			! MS
	fmovd		%f6, %f38			! FGA Group
	ldd		[%o1 + 0x030], %f12		! MS
	fmovd		%f8, %f40			! FGA Group
	ldd		[%o1 + 0x038], %f14		! AX
	fmovd		%f10, %f42			! FGA Group
	ldd		[%o1 + 0x040], %f16		! MS
1:	ldd		[%o1 + 0x048], %f2		! AX (Group)
	fmovd		%f12, %f44			! FGA
	ldd		[%o1 + 0x050], %f4		! MS
	fmovd		%f14, %f46			! FGA Group
	stda		%f32, [%o0] ASI_BLK_P		! MS
	ldd		[%o1 + 0x058], %f6		! AX
	fmovd		%f16, %f32			! FGA Group (8-cycle stall)
	ldd		[%o1 + 0x060], %f8		! MS
	fmovd		%f2, %f34			! FGA Group
	ldd		[%o1 + 0x068], %f10		! AX
	fmovd		%f4, %f36			! FGA Group
	ldd		[%o1 + 0x070], %f12		! MS
	fmovd		%f6, %f38			! FGA Group
	ldd		[%o1 + 0x078], %f14		! AX
	fmovd		%f8, %f40			! FGA Group
	ldd		[%o1 + 0x080], %f16		! AX
	prefetch	[%o1 + 0x180], #one_read	! MS
	fmovd		%f10, %f42			! FGA Group
	subcc		%o2, 1, %o2			! A0
	add		%o0, 0x40, %o0			! A1
	bne,pt		%xcc, 1b			! BR
	 add		%o1, 0x40, %o1			! A0 Group

	mov		5, %o2				! A0 Group
1:	ldd		[%o1 + 0x048], %f2		! AX
	fmovd		%f12, %f44			! FGA
	ldd		[%o1 + 0x050], %f4		! MS
	fmovd		%f14, %f46			! FGA Group
	stda		%f32, [%o0] ASI_BLK_P		! MS
	ldd		[%o1 + 0x058], %f6		! AX
	fmovd		%f16, %f32			! FGA Group (8-cycle stall)
	ldd		[%o1 + 0x060], %f8		! MS
	fmovd		%f2, %f34			! FGA Group
	ldd		[%o1 + 0x068], %f10		! AX
	fmovd		%f4, %f36			! FGA Group
	ldd		[%o1 + 0x070], %f12		! MS
	fmovd		%f6, %f38			! FGA Group
	ldd		[%o1 + 0x078], %f14		! AX
	fmovd		%f8, %f40			! FGA Group
	ldd		[%o1 + 0x080], %f16		! MS
	fmovd		%f10, %f42			! FGA Group
	subcc		%o2, 1, %o2			! A0
	add		%o0, 0x40, %o0			! A1
	bne,pt		%xcc, 1b			! BR
	 add		%o1, 0x40, %o1			! A0 Group

	ldd		[%o1 + 0x048], %f2		! AX
	fmovd		%f12, %f44			! FGA
	ldd		[%o1 + 0x050], %f4		! MS
	fmovd		%f14, %f46			! FGA Group
	stda		%f32, [%o0] ASI_BLK_P		! MS
	ldd		[%o1 + 0x058], %f6		! AX
	fmovd		%f16, %f32			! FGA Group (8-cycle stall)
	ldd		[%o1 + 0x060], %f8		! MS
	fmovd		%f2, %f34			! FGA Group
	ldd		[%o1 + 0x068], %f10		! AX
	fmovd		%f4, %f36			! FGA Group
	ldd		[%o1 + 0x070], %f12		! MS
	fmovd		%f6, %f38			! FGA Group
	add		%o0, 0x40, %o0			! A0
	ldd		[%o1 + 0x078], %f14		! AX
	fmovd		%f8, %f40			! FGA Group
	fmovd		%f10, %f42			! FGA Group
	fmovd		%f12, %f44			! FGA Group
	fmovd		%f14, %f46			! FGA Group
	stda		%f32, [%o0] ASI_BLK_P		! MS
	ba,a,pt		%xcc, copy_user_page_continue

spitfire_copy_user_page:
	ldda		[%o1] ASI_BLK_P, %f0
	add		%o1, 0x40, %o1
	ldda		[%o1] ASI_BLK_P, %f16
	add		%o1, 0x40, %o1
	sethi		%hi(PAGE_SIZE), %o2
1:	TOUCH(f0, f2, f4, f6, f8, f10, f12, f14)
	ldda		[%o1] ASI_BLK_P, %f32
	stda		%f48, [%o0] ASI_BLK_P
	add		%o1, 0x40, %o1
	sub		%o2, 0x40, %o2
	add		%o0, 0x40, %o0
	TOUCH(f16, f18, f20, f22, f24, f26, f28, f30)
	ldda		[%o1] ASI_BLK_P, %f0
	stda		%f48, [%o0] ASI_BLK_P
	add		%o1, 0x40, %o1
	sub		%o2, 0x40, %o2
	add		%o0, 0x40, %o0
	TOUCH(f32, f34, f36, f38, f40, f42, f44, f46)
	ldda		[%o1] ASI_BLK_P, %f16
	stda		%f48, [%o0] ASI_BLK_P
	sub		%o2, 0x40, %o2
	add		%o1, 0x40, %o1
	cmp		%o2, PAGE_SIZE_REM
	bne,pt		%xcc, 1b
	 add		%o0, 0x40, %o0
#if (PAGE_SHIFT == 16) || (PAGE_SHIFT == 22)
	TOUCH(f0, f2, f4, f6, f8, f10, f12, f14)
	ldda		[%o1] ASI_BLK_P, %f32
	stda		%f48, [%o0] ASI_BLK_P
	add		%o1, 0x40, %o1
	sub		%o2, 0x40, %o2
	add		%o0, 0x40, %o0
	TOUCH(f16, f18, f20, f22, f24, f26, f28, f30)
	ldda		[%o1] ASI_BLK_P, %f0
	stda		%f48, [%o0] ASI_BLK_P
	add		%o1, 0x40, %o1
	sub		%o2, 0x40, %o2
	add		%o0, 0x40, %o0
	membar		#Sync
	stda		%f32, [%o0] ASI_BLK_P
	add		%o0, 0x40, %o0
	stda		%f0, [%o0] ASI_BLK_P
#else
	membar		#Sync
	stda		%f0, [%o0] ASI_BLK_P
	add		%o0, 0x40, %o0
	stda		%f16, [%o0] ASI_BLK_P
#endif
copy_user_page_continue:
	membar		#Sync
	VISExit

	mov		TLB_TAG_ACCESS, %o2
	stxa		%g5, [%o2] ASI_DMMU
	stxa		%g7, [%o3] ASI_DTLB_DATA_ACCESS
	membar		#Sync
	sub		%o3, (TLBTEMP_ENTSZ), %o3
	stxa		%o4, [%o2] ASI_DMMU
	stxa		%o5, [%o3] ASI_DTLB_DATA_ACCESS
	membar		#Sync
	rdpr		%pstate, %g3
	jmpl		%o7 + 0x8, %g0
	 wrpr		%g3, PSTATE_IE, %pstate

copy_page_using_blkcommit:
	membar		#LoadStore | #StoreStore | #StoreLoad
	ldda		[%o1] ASI_BLK_P, %f0
	add		%o1, 0x40, %o1
	ldda		[%o1] ASI_BLK_P, %f16
	add		%o1, 0x40, %o1
	sethi		%hi(PAGE_SIZE), %o2
1:	TOUCH(f0, f2, f4, f6, f8, f10, f12, f14)
	ldda		[%o1] ASI_BLK_P, %f32
	stda		%f48, [%o0] ASI_BLK_COMMIT_P
	add		%o1, 0x40, %o1
	sub		%o2, 0x40, %o2
	add		%o0, 0x40, %o0
	TOUCH(f16, f18, f20, f22, f24, f26, f28, f30)
	ldda		[%o1] ASI_BLK_P, %f0
	stda		%f48, [%o0] ASI_BLK_COMMIT_P
	add		%o1, 0x40, %o1
	sub		%o2, 0x40, %o2
	add		%o0, 0x40, %o0
	TOUCH(f32, f34, f36, f38, f40, f42, f44, f46)
	ldda		[%o1] ASI_BLK_P, %f16
	stda		%f48, [%o0] ASI_BLK_COMMIT_P
	sub		%o2, 0x40, %o2
	add		%o1, 0x40, %o1
	cmp		%o2, PAGE_SIZE_REM
	bne,pt		%xcc, 1b
	 add		%o0, 0x40, %o0
#if (PAGE_SHIFT == 16) || (PAGE_SHIFT == 22)
	TOUCH(f0, f2, f4, f6, f8, f10, f12, f14)
	ldda		[%o1] ASI_BLK_P, %f32
	stda		%f48, [%o0] ASI_BLK_COMMIT_P
	add		%o1, 0x40, %o1
	sub		%o2, 0x40, %o2
	add		%o0, 0x40, %o0
	TOUCH(f16, f18, f20, f22, f24, f26, f28, f30)
	ldda		[%o1] ASI_BLK_P, %f0
	stda		%f48, [%o0] ASI_BLK_COMMIT_P
	add		%o1, 0x40, %o1
	sub		%o2, 0x40, %o2
	add		%o0, 0x40, %o0
	membar		#Sync
	stda		%f32, [%o0] ASI_BLK_COMMIT_P
	add		%o0, 0x40, %o0
	ba,pt		%xcc, copy_user_page_continue
	 stda		%f0, [%o0] ASI_BLK_COMMIT_P
#else
	membar		#Sync
	stda		%f0, [%o0] ASI_BLK_COMMIT_P
	add		%o0, 0x40, %o0
	ba,pt		%xcc, copy_user_page_continue
	 stda		%f16, [%o0] ASI_BLK_COMMIT_P
#endif

	.align		32
	.globl		_clear_page
	.type		_clear_page,@function
_clear_page:	/* %o0=dest */
	VISEntryHalf
	ba,pt		%xcc, clear_page_common
	 clr		%o4

	.align		32
	.globl		clear_user_page
	.type		clear_user_page,@function
clear_user_page:	/* %o0=dest, %o1=vaddr */
	VISEntryHalf
	sethi		%hi(PAGE_SIZE), %g3
	sub		%o0, %g4, %g1
	and		%o1, %g3, %o0
	mov		TLB_TAG_ACCESS, %o2
	sethi		%uhi(_PAGE_VALID | _PAGE_SZBITS), %g3
	sethi		%hi(TLBTEMP_BASE), %o3
	sllx		%g3, 32, %g3
	or		%g3, (_PAGE_CP | _PAGE_CV | _PAGE_P | _PAGE_L | _PAGE_W), %g3
	or		%g1, %g3, %g1
	add		%o0, %o3, %o0
#define FIX_INSN_2	0x96102068 /* mov (13 << 3), %o3 */
cheetah_patch_2:
	mov		TLBTEMP_ENT2, %o3
	rdpr		%pstate, %g3
	wrpr		%g3, PSTATE_IE, %pstate

	/* Spitfire Errata #32 workaround */
	mov		0x8, %g5
	stxa		%g0, [%g5] ASI_DMMU
	membar		#Sync

	ldxa		[%o3] ASI_DTLB_TAG_READ, %g5

	/* Spitfire Errata #32 workaround */
	mov		0x8, %g7
	stxa		%g0, [%g7] ASI_DMMU
	membar		#Sync

	ldxa		[%o3] ASI_DTLB_DATA_ACCESS, %g0
	ldxa		[%o3] ASI_DTLB_DATA_ACCESS, %g7
	stxa		%o0, [%o2] ASI_DMMU
	stxa		%g1, [%o3] ASI_DTLB_DATA_ACCESS
	membar		#Sync

	mov		1, %o4

clear_page_common:
	membar		#StoreLoad | #StoreStore | #LoadStore	! LSU	Group
	fzero		%f0				! FPA	Group
	sethi		%hi(PAGE_SIZE/256), %o1		! IEU0
	fzero		%f2				! FPA	Group
	or		%o1, %lo(PAGE_SIZE/256), %o1	! IEU0
	faddd		%f0, %f2, %f4			! FPA	Group
	fmuld		%f0, %f2, %f6			! FPM
	faddd		%f0, %f2, %f8			! FPA	Group
	fmuld		%f0, %f2, %f10			! FPM

	faddd		%f0, %f2, %f12			! FPA	Group
	fmuld		%f0, %f2, %f14			! FPM
1:	stda		%f0, [%o0 + %g0] ASI_BLK_P	! Store	Group
	add		%o0, 0x40, %o0			! IEU0
	stda		%f0, [%o0 + %g0] ASI_BLK_P	! Store	Group
	add		%o0, 0x40, %o0			! IEU0
	stda		%f0, [%o0 + %g0] ASI_BLK_P	! Store	Group

	add		%o0, 0x40, %o0			! IEU0	Group
	stda		%f0, [%o0 + %g0] ASI_BLK_P	! Store	Group
	subcc		%o1, 1, %o1			! IEU1
	bne,pt		%icc, 1b			! CTI
	 add		%o0, 0x40, %o0			! IEU0	Group
	membar		#Sync				! LSU	Group
	VISExitHalf

	brnz,pt		%o4, 1f
	 nop

	retl
	 nop

1:	stxa		%g5, [%o2] ASI_DMMU
	stxa		%g7, [%o3] ASI_DTLB_DATA_ACCESS
	membar		#Sync
	jmpl		%o7 + 0x8, %g0
	 wrpr		%g3, 0x0, %pstate

	.globl		cheetah_patch_pgcopyops
cheetah_patch_pgcopyops:
	sethi		%hi(FIX_INSN_1), %g1
	or		%g1, %lo(FIX_INSN_1), %g1
	sethi		%hi(cheetah_patch_1), %g2
	or		%g2, %lo(cheetah_patch_1), %g2
	stw		%g1, [%g2]
	flush		%g2
	sethi		%hi(FIX_INSN_2), %g1
	or		%g1, %lo(FIX_INSN_2), %g1
	sethi		%hi(cheetah_patch_2), %g2
	or		%g2, %lo(cheetah_patch_2), %g2
	stw		%g1, [%g2]
	flush		%g2
	retl
	 nop

#undef FIX_INSN1
#undef FIX_INSN2
#undef PAGE_SIZE_REM
/* checksum.S: Sparc V9 optimized checksum code.
 *
 *  Copyright(C) 1995 Linus Torvalds
 *  Copyright(C) 1995 Miguel de Icaza
 *  Copyright(C) 1996, 2000 David S. Miller
 *  Copyright(C) 1997 Jakub Jelinek
 *
 * derived from:
 *	Linux/Alpha checksum c-code
 *      Linux/ix86 inline checksum assembly
 *      RFC1071 Computing the Internet Checksum (esp. Jacobsons m68k code)
 *	David Mosberger-Tang for optimized reference c-code
 *	BSD4.4 portable checksum routine
 */

#include <asm/errno.h>
#include <asm/head.h>
#include <asm/ptrace.h>
#include <asm/asi.h>
#include <asm/page.h>
#include <asm/asm_offsets.h>

	/* The problem with the "add with carry" instructions on Ultra
	 * are two fold.  Firstly, they cannot pair with jack shit,
	 * and also they only add in the 32-bit carry condition bit
	 * into the accumulated sum.  The following is much better.
	 * For larger chunks we use VIS code, which is faster ;)
	 */

#define src o0
#define dst o1
#define len o2
#define sum o3

	.text
	/* I think I have an erection...  Once _AGAIN_ the SunSoft
	 * engineers are caught asleep at the keyboard, tsk tsk...
	 */

#define CSUMCOPY_LASTCHUNK(off, t0, t1)							\
	ldxa		[%src - off - 0x08] %asi, t0;					\
	ldxa		[%src - off - 0x00] %asi, t1;					\
	nop; nop;									\
	addcc		t0, %sum, %sum;							\
	stw		t0, [%dst - off - 0x04];					\
	srlx		t0, 32, t0;							\
	bcc,pt		%xcc, 51f;							\
	 stw		t0, [%dst - off - 0x08];					\
	add		%sum, 1, %sum;							\
51:	addcc		t1, %sum, %sum;							\
	stw		t1, [%dst - off + 0x04];					\
	srlx		t1, 32, t1;							\
	bcc,pt		%xcc, 52f;							\
	 stw		t1, [%dst - off - 0x00];					\
	add		%sum, 1, %sum;							\
52:

cpc_start:
cc_end_cruft:
	andcc		%g7, 8, %g0		! IEU1	Group
	be,pn		%icc, 1f		! CTI
	 and		%g7, 4, %g5		! IEU0
	ldxa		[%src + 0x00] %asi, %g2	! Load	Group
	add		%dst, 8, %dst		! IEU0
	add		%src, 8, %src		! IEU1
	addcc		%g2, %sum, %sum		! IEU1	Group + 2 bubbles
	stw		%g2, [%dst - 0x04]	! Store
	srlx		%g2, 32, %g2		! IEU0
	bcc,pt		%xcc, 1f		! CTI	Group
	 stw		%g2, [%dst - 0x08]	! Store
	add		%sum, 1, %sum		! IEU0
1:	brz,pt		%g5, 1f			! CTI	Group
	 clr		%g2			! IEU0
	lduwa		[%src + 0x00] %asi, %g2	! Load
	add		%dst, 4, %dst		! IEU0	Group
	add		%src, 4, %src		! IEU1
	stw		%g2, [%dst - 0x04]	! Store	Group + 2 bubbles
	sllx		%g2, 32, %g2		! IEU0
1:	andcc		%g7, 2, %g0		! IEU1
	be,pn		%icc, 1f		! CTI	Group
	 clr		%o4			! IEU1
	lduha		[%src + 0x00] %asi, %o4	! Load
	add		%src, 2, %src		! IEU0	Group
	add		%dst, 2, %dst		! IEU1
	sth		%o4, [%dst - 0x2]	! Store Group + 2 bubbles
	sll		%o4, 16, %o4		! IEU0
1:	andcc		%g7, 1, %g0		! IEU1
	be,pn		%icc, 1f		! CTI	Group
	 clr		%o5			! IEU0
	lduba		[%src + 0x00] %asi, %o5	! Load
	stb		%o5, [%dst + 0x00]	! Store	Group + 2 bubbles
	sll		%o5, 8, %o5		! IEU0
1:	or		%g2, %o4, %o4		! IEU1
	or		%o5, %o4, %o4		! IEU0	Group
	addcc		%o4, %sum, %sum		! IEU1
	bcc,pt		%xcc, ccfold		! CTI
	 sethi		%uhi(PAGE_OFFSET), %g4	! IEU0	Group
	b,pt		%xcc, ccfold		! CTI
	 add		%sum, 1, %sum		! IEU1

cc_fixit:
	cmp		%len, 6			! IEU1	Group
	bl,a,pn		%icc, ccte		! CTI
	 andcc		%len, 0xf, %g7		! IEU1	Group
	andcc		%src, 2, %g0		! IEU1	Group
	be,pn		%icc, 1f		! CTI
	 andcc		%src, 0x4, %g0		! IEU1	Group
	lduha		[%src + 0x00] %asi, %g4	! Load
	sub		%len, 2, %len		! IEU0
	add		%src, 2, %src		! IEU0	Group
	add		%dst, 2, %dst		! IEU1
	sll		%g4, 16, %g3		! IEU0	Group + 1 bubble
	addcc		%g3, %sum, %sum		! IEU1
	bcc,pt		%xcc, 0f		! CTI
	 srl		%sum, 16, %g3		! IEU0	Group
	add		%g3, 1, %g3		! IEU0	4 clocks (mispredict)
0:	andcc		%src, 0x4, %g0		! IEU1	Group
	sth		%g4, [%dst - 0x2]	! Store
	sll		%sum, 16, %sum		! IEU0
	sll		%g3, 16, %g3		! IEU0	Group
	srl		%sum, 16, %sum		! IEU0	Group
	or		%g3, %sum, %sum		! IEU0	Group (regdep)
1:	be,pt		%icc, ccmerge		! CTI
	 andcc		%len, 0xf0, %g1		! IEU1
	lduwa		[%src + 0x00] %asi, %g4	! Load	Group
	sub		%len, 4, %len		! IEU0
	add		%src, 4, %src		! IEU1
	add		%dst, 4, %dst		! IEU0	Group
	addcc		%g4, %sum, %sum		! IEU1	Group + 1 bubble
	stw		%g4, [%dst - 0x4]	! Store
	bcc,pt		%xcc, ccmerge		! CTI
	 andcc		%len, 0xf0, %g1		! IEU1	Group
	b,pt		%xcc, ccmerge		! CTI	4 clocks (mispredict)
	 add		%sum, 1, %sum		! IEU0

	.align		32
	.globl		csum_partial_copy_sparc64
csum_partial_copy_sparc64:			/* %o0=src, %o1=dest, %o2=len, %o3=sum */
	xorcc		%src, %dst, %o4		! IEU1	Group
	srl		%sum, 0, %sum		! IEU0
	andcc		%o4, 3, %g0		! IEU1	Group
	srl		%len, 0, %len		! IEU0
	bne,pn		%icc, ccslow		! CTI
	 andcc		%src, 1, %g0		! IEU1	Group
	bne,pn		%icc, ccslow		! CTI
	 cmp		%len, 256		! IEU1	Group
	bgeu,pt		%icc, csum_partial_copy_vis ! CTI
	 andcc		%src, 7, %g0		! IEU1	Group
	bne,pn		%icc, cc_fixit		! CTI
	 andcc		%len, 0xf0, %g1		! IEU1	Group
ccmerge:be,pn		%icc, ccte		! CTI
	 andcc		%len, 0xf, %g7		! IEU1	Group
	sll		%g1, 2, %o4		! IEU0
13:	sethi		%hi(12f), %o5		! IEU0	Group
	add		%src, %g1, %src		! IEU1	
	sub		%o5, %o4, %o5		! IEU0	Group
	jmpl		%o5 + %lo(12f), %g0	! CTI	Group brk forced
	 add		%dst, %g1, %dst		! IEU0	Group
cctbl:	CSUMCOPY_LASTCHUNK(0xe8,%g2,%g3)
	CSUMCOPY_LASTCHUNK(0xd8,%g2,%g3)
	CSUMCOPY_LASTCHUNK(0xc8,%g2,%g3)
	CSUMCOPY_LASTCHUNK(0xb8,%g2,%g3)
	CSUMCOPY_LASTCHUNK(0xa8,%g2,%g3)
	CSUMCOPY_LASTCHUNK(0x98,%g2,%g3)
	CSUMCOPY_LASTCHUNK(0x88,%g2,%g3)
	CSUMCOPY_LASTCHUNK(0x78,%g2,%g3)
	CSUMCOPY_LASTCHUNK(0x68,%g2,%g3)
	CSUMCOPY_LASTCHUNK(0x58,%g2,%g3)
	CSUMCOPY_LASTCHUNK(0x48,%g2,%g3)
	CSUMCOPY_LASTCHUNK(0x38,%g2,%g3)
	CSUMCOPY_LASTCHUNK(0x28,%g2,%g3)
	CSUMCOPY_LASTCHUNK(0x18,%g2,%g3)
	CSUMCOPY_LASTCHUNK(0x08,%g2,%g3)
12:
	andcc		%len, 0xf, %g7		! IEU1	Group
ccte:	bne,pn		%icc, cc_end_cruft	! CTI
	 sethi		%uhi(PAGE_OFFSET), %g4	! IEU0
ccfold:	sllx		%sum, 32, %o0		! IEU0	Group
	addcc		%sum, %o0, %o0		! IEU1	Group (regdep)
	srlx		%o0, 32, %o0		! IEU0	Group (regdep)
	bcs,a,pn	%xcc, 1f		! CTI
	 add		%o0, 1, %o0		! IEU1	4 clocks (mispredict)
1:	retl					! CTI	Group brk forced
	 sllx		%g4, 32, %g4		! IEU0	Group

ccslow:	mov	0, %g5
	brlez,pn %len, 4f
	 andcc	%src, 1, %o5		
	be,a,pt	%icc, 1f
	 srl	%len, 1, %g7		
	sub	%len, 1, %len	
	lduba [%src] %asi, %g5
	add	%src, 1, %src	
	stb	%g5, [%dst]
	srl	%len, 1, %g7
	add	%dst, 1, %dst
1:	brz,a,pn %g7, 3f
	 andcc	%len, 1, %g0
	andcc	%src, 2, %g0	
	be,a,pt	%icc, 1f
	 srl	%g7, 1, %g7
	lduha [%src] %asi, %o4
	sub	%len, 2, %len	
	srl	%o4, 8, %g2
	sub	%g7, 1, %g7	
	stb	%g2, [%dst]
	add	%o4, %g5, %g5
	stb	%o4, [%dst + 1]
	add	%src, 2, %src	
	srl	%g7, 1, %g7
	add	%dst, 2, %dst
1:	brz,a,pn %g7, 2f		
	 andcc	%len, 2, %g0
	lduwa	[%src] %asi, %o4
5:	srl	%o4, 24, %g2
	srl	%o4, 16, %g3
	stb	%g2, [%dst]
	srl	%o4, 8, %g2
	stb	%g3, [%dst + 1]
	add	%src, 4, %src
	stb	%g2, [%dst + 2]
	addcc	%o4, %g5, %g5
	stb	%o4, [%dst + 3]
	addc	%g5, %g0, %g5
	add	%dst, 4, %dst
	subcc	%g7, 1, %g7
	bne,a,pt %icc, 5b
	 lduwa [%src] %asi, %o4
	sll	%g5, 16, %g2
	srl	%g5, 16, %g5
	srl	%g2, 16, %g2
	andcc	%len, 2, %g0
	add	%g2, %g5, %g5 
2:	be,a,pt	%icc, 3f		
	 andcc	%len, 1, %g0
	lduha [%src] %asi, %o4
	andcc	%len, 1, %g0
	srl	%o4, 8, %g2
	add	%src, 2, %src	
	stb	%g2, [%dst]
	add	%g5, %o4, %g5
	stb	%o4, [%dst + 1]
	add	%dst, 2, %dst
3:	be,a,pt	%icc, 1f		
	 sll	%g5, 16, %o4
	lduba [%src] %asi, %g2
	sll	%g2, 8, %o4	
	stb	%g2, [%dst]
	add	%g5, %o4, %g5
	sll	%g5, 16, %o4
1:	addcc	%o4, %g5, %g5
	srl	%g5, 16, %o4
	addc	%g0, %o4, %g5
	brz,pt	%o5, 4f
	 srl	%g5, 8, %o4
	and	%g5, 0xff, %g2
	and	%o4, 0xff, %o4
	sll	%g2, 8, %g2
	or	%g2, %o4, %g5
4:	addcc	%sum, %g5, %sum
	addc	%g0, %sum, %o0
	retl	
	 srl	%o0, 0, %o0
cpc_end:

	/* Now the version with userspace as the destination */
#define CSUMCOPY_LASTCHUNK_USER(off, t0, t1)						\
	ldx		[%src - off - 0x08], t0;					\
	ldx		[%src - off - 0x00], t1;					\
	nop; nop;									\
	addcc		t0, %sum, %sum;							\
	stwa		t0, [%dst - off - 0x04] %asi;					\
	srlx		t0, 32, t0;							\
	bcc,pt		%xcc, 51f;							\
	 stwa		t0, [%dst - off - 0x08] %asi;					\
	add		%sum, 1, %sum;							\
51:	addcc		t1, %sum, %sum;							\
	stwa		t1, [%dst - off + 0x04] %asi;					\
	srlx		t1, 32, t1;							\
	bcc,pt		%xcc, 52f;							\
	 stwa		t1, [%dst - off - 0x00] %asi;					\
	add		%sum, 1, %sum;							\
52:

cpc_user_start:
cc_user_end_cruft:
	andcc		%g7, 8, %g0		! IEU1	Group
	be,pn		%icc, 1f		! CTI
	 and		%g7, 4, %g5		! IEU0
	ldx		[%src + 0x00], %g2	! Load	Group
	add		%dst, 8, %dst		! IEU0
	add		%src, 8, %src		! IEU1
	addcc		%g2, %sum, %sum		! IEU1	Group + 2 bubbles
	stwa		%g2, [%dst - 0x04] %asi	! Store
	srlx		%g2, 32, %g2		! IEU0
	bcc,pt		%xcc, 1f		! CTI	Group
	 stwa		%g2, [%dst - 0x08] %asi	! Store
	add		%sum, 1, %sum		! IEU0
1:	brz,pt		%g5, 1f			! CTI	Group
	 clr		%g2			! IEU0
	lduw		[%src + 0x00], %g2	! Load
	add		%dst, 4, %dst		! IEU0	Group
	add		%src, 4, %src		! IEU1
	stwa		%g2, [%dst - 0x04] %asi	! Store	Group + 2 bubbles
	sllx		%g2, 32, %g2		! IEU0
1:	andcc		%g7, 2, %g0		! IEU1
	be,pn		%icc, 1f		! CTI	Group
	 clr		%o4			! IEU1
	lduh		[%src + 0x00], %o4	! Load
	add		%src, 2, %src		! IEU0	Group
	add		%dst, 2, %dst		! IEU1
	stha		%o4, [%dst - 0x2] %asi	! Store Group + 2 bubbles
	sll		%o4, 16, %o4		! IEU0
1:	andcc		%g7, 1, %g0		! IEU1
	be,pn		%icc, 1f		! CTI	Group
	 clr		%o5			! IEU0
	ldub		[%src + 0x00], %o5	! Load
	stba		%o5, [%dst + 0x00] %asi	! Store	Group + 2 bubbles
	sll		%o5, 8, %o5		! IEU0
1:	or		%g2, %o4, %o4		! IEU1
	or		%o5, %o4, %o4		! IEU0	Group
	addcc		%o4, %sum, %sum		! IEU1
	bcc,pt		%xcc, ccuserfold	! CTI
	 sethi		%uhi(PAGE_OFFSET), %g4	! IEU0	Group
	b,pt		%xcc, ccuserfold	! CTI
	 add		%sum, 1, %sum		! IEU1

cc_user_fixit:
	cmp		%len, 6			! IEU1	Group
	bl,a,pn		%icc, ccuserte		! CTI
	 andcc		%len, 0xf, %g7		! IEU1	Group
	andcc		%src, 2, %g0		! IEU1	Group
	be,pn		%icc, 1f		! CTI
	 andcc		%src, 0x4, %g0		! IEU1	Group
	lduh		[%src + 0x00], %g4	! Load
	sub		%len, 2, %len		! IEU0
	add		%src, 2, %src		! IEU0	Group
	add		%dst, 2, %dst		! IEU1
	sll		%g4, 16, %g3		! IEU0	Group + 1 bubble
	addcc		%g3, %sum, %sum		! IEU1
	bcc,pt		%xcc, 0f		! CTI
	 srl		%sum, 16, %g3		! IEU0	Group
	add		%g3, 1, %g3		! IEU0	4 clocks (mispredict)
0:	andcc		%src, 0x4, %g0		! IEU1	Group
	stha		%g4, [%dst - 0x2] %asi	! Store
	sll		%sum, 16, %sum		! IEU0
	sll		%g3, 16, %g3		! IEU0	Group
	srl		%sum, 16, %sum		! IEU0	Group
	or		%g3, %sum, %sum		! IEU0	Group (regdep)
1:	be,pt		%icc, ccusermerge	! CTI
	 andcc		%len, 0xf0, %g1		! IEU1
	lduw		[%src + 0x00], %g4	! Load	Group
	sub		%len, 4, %len		! IEU0
	add		%src, 4, %src		! IEU1
	add		%dst, 4, %dst		! IEU0	Group
	addcc		%g4, %sum, %sum		! IEU1	Group + 1 bubble
	stwa		%g4, [%dst - 0x4] %asi	! Store
	bcc,pt		%xcc, ccusermerge	! CTI
	 andcc		%len, 0xf0, %g1		! IEU1	Group
	b,pt		%xcc, ccusermerge	! CTI	4 clocks (mispredict)
	 add		%sum, 1, %sum		! IEU0

	.align		32
	.globl		csum_partial_copy_user_sparc64
csum_partial_copy_user_sparc64:			/* %o0=src, %o1=dest, %o2=len, %o3=sum */
	xorcc		%src, %dst, %o4		! IEU1	Group
	srl		%sum, 0, %sum		! IEU0
	andcc		%o4, 3, %g0		! IEU1	Group
	srl		%len, 0, %len		! IEU0
	bne,pn		%icc, ccuserslow	! CTI
	 andcc		%src, 1, %g0		! IEU1	Group
	bne,pn		%icc, ccuserslow	! CTI
	 cmp		%len, 256		! IEU1	Group
	bgeu,pt		%icc, csum_partial_copy_user_vis ! CTI
	 andcc		%src, 7, %g0		! IEU1	Group
	bne,pn		%icc, cc_user_fixit	! CTI
	 andcc		%len, 0xf0, %g1		! IEU1	Group
ccusermerge:
	be,pn		%icc, ccuserte		! CTI
	 andcc		%len, 0xf, %g7		! IEU1	Group
	sll		%g1, 2, %o4		! IEU0
13:	sethi		%hi(12f), %o5		! IEU0	Group
	add		%src, %g1, %src		! IEU1	
	sub		%o5, %o4, %o5		! IEU0	Group
	jmpl		%o5 + %lo(12f), %g0	! CTI	Group brk forced
	 add		%dst, %g1, %dst		! IEU0	Group
ccusertbl:
	CSUMCOPY_LASTCHUNK_USER(0xe8,%g2,%g3)
	CSUMCOPY_LASTCHUNK_USER(0xd8,%g2,%g3)
	CSUMCOPY_LASTCHUNK_USER(0xc8,%g2,%g3)
	CSUMCOPY_LASTCHUNK_USER(0xb8,%g2,%g3)
	CSUMCOPY_LASTCHUNK_USER(0xa8,%g2,%g3)
	CSUMCOPY_LASTCHUNK_USER(0x98,%g2,%g3)
	CSUMCOPY_LASTCHUNK_USER(0x88,%g2,%g3)
	CSUMCOPY_LASTCHUNK_USER(0x78,%g2,%g3)
	CSUMCOPY_LASTCHUNK_USER(0x68,%g2,%g3)
	CSUMCOPY_LASTCHUNK_USER(0x58,%g2,%g3)
	CSUMCOPY_LASTCHUNK_USER(0x48,%g2,%g3)
	CSUMCOPY_LASTCHUNK_USER(0x38,%g2,%g3)
	CSUMCOPY_LASTCHUNK_USER(0x28,%g2,%g3)
	CSUMCOPY_LASTCHUNK_USER(0x18,%g2,%g3)
	CSUMCOPY_LASTCHUNK_USER(0x08,%g2,%g3)
12:
	andcc		%len, 0xf, %g7		! IEU1	Group
ccuserte:
	bne,pn		%icc, cc_user_end_cruft	! CTI
	 sethi		%uhi(PAGE_OFFSET), %g4	! IEU0
ccuserfold:
	sllx		%sum, 32, %o0		! IEU0	Group
	addcc		%sum, %o0, %o0		! IEU1	Group (regdep)
	srlx		%o0, 32, %o0		! IEU0	Group (regdep)
	bcs,a,pn	%xcc, 1f		! CTI
	 add		%o0, 1, sym53c8xx.h: \
   /home/me/kernel/linux/include/linux/version.h \
   $(wildcard /home/me/kernel/linux/include/config/scsi/sym53c8xx/iomapped.h) \
   $(wildcard /home/me/kernel/linux/include/config/scsi/ncr53c8xx/iomapped.h) \
   $(wildcard /home/me/kernel/linux/include/config/scsi/sym53c8xx/default/tags.h) \
   $(wildcard /home/me/kernel/linux/include/config/scsi/ncr53c8xx/default/tags.h) \
   $(wildcard /home/me/kernel/linux/include/config/scsi/sym53c8xx/max/tags.h) \
   $(wildcard /home/me/kernel/linux/include/config/scsi/ncr53c8xx/max/tags.h) \
   /home/me/kernel/linux/include/scsi/scsicam.h \
   $(wildcard /home/me/kernel/linux/include/config/scsi/sym53c8xx/dma/addressing/mode.h) \
   $(wildcard /home/me/kernel/linux/include/config/scsi/sym53c8xx/default/sync.h) \
   $(wildcard /home/me/kernel/linux/include/config/scsi/sym53c8xx/max/lun.h)
	@touch sym53c8xx.h
sym_fw.o: sym_fw.c \
   sym_glue.h \
   sym_fw1.h \
   sym_fw2.h
sym_glue.o: sym_glue.c \
   /home/me/kernel/linux/include/linux/module.h \
   sym_glue.h \
   ../scsi_module.c
sym_glue.h: \
   /home/me/kernel/linux/include/linux/version.h \
   /home/me/kernel/linux/include/asm/dma.h \
   /home/me/kernel/linux/include/asm/io.h \
   /home/me/kernel/linux/include/asm/system.h \
   /home/me/kernel/linux/include/linux/spinlock.h \
   /home/me/kernel/linux/include/asm/spinlock.h \
   /home/me/kernel/linux/include/linux/delay.h \
   /home/me/kernel/linux/include/linux/signal.h \
   /home/me/kernel/linux/include/linux/sched.h \
   /home/me/kernel/linux/include/linux/errno.h \
   /home/me/kernel/linux/include/linux/pci.h \
   /home/me/kernel/linux/include/linux/string.h \
   /home/me/kernel/linux/include/linux/mm.h \
   /home/me/kernel/linux/include/linux/ioport.h \
   /home/me/kernel/linux/include/linux/time.h \
   /home/me/kernel/linux/include/linux/timer.h \
   /home/me/kernel/linux/include/linux/stat.h \
   /home/me/kernel/linux/include/linux/blk.h \
   /home/me/kernel/linux/include/asm/irq.h \
   /home/me/kernel/linux/include/linux/init.h \
   ../scsi.h \
   ../hosts.h \
   ../constants.h \
   ../sd.h \
   /home/me/kernel/linux/include/linux/types.h \
   sym53c8xx.h \
   sym_misc.h \
   sym_conf.h \
   sym_defs.h \
   sym_fw.h \
   sym_hipd.h
	@touch sym_glue.h
sym_hipd.o: sym_hipd.c \
   sym_glue.h
sym_malloc.o: sym_malloc.c \
   sym_glue.h
sym_misc.o: sym_misc.c \
   sym_glue.h
sym_nvram.o: sym_nvram.c \
   sym_glue.h
.PRECIOUS:	sym53c8xx.h \
	sym_glue.h \

%o0		! IEU1	4 clocks (mispredict)
1:	retl					! CTI	Group brk forced
	 sllx		%g4, 32, %g4		! IEU0	Group

ccuserslow:
	mov	0, %g5
	brlez,pn %len, 4f
	 andcc	%src, 1, %o5		
	be,a,pt	%icc, 1f
	 srl	%len, 1, %g7		
	sub	%len, 1, %len	
	ldub [%src], %g5
	add	%src, 1, %src	
	stba	%g5, [%dst] %asi
	srl	%len, 1, %g7
	add	%dst, 1, %dst
1:	brz,a,pn %g7, 3f
	 andcc	%len, 1, %g0
	andcc	%src, 2, %g0	
	be,a,pt	%icc, 1f
	 srl	%g7, 1, %g7
	lduh [%src], %o4
	sub	%len, 2, %len	
	srl	%o4, 8, %g2
	sub	%g7, 1, %g7	
	stba	%g2, [%dst] %asi
	add	%o4, %g5, %g5
	stba	%o4, [%dst + 1] %asi
	add	%src, 2, %src	
	srl	%g7, 1, %g7
	add	%dst, 2, %dst
1:	brz,a,pn %g7, 2f		
	 andcc	%len, 2, %g0
	lduw	[%src], %o4
5:	srl	%o4, 24, %g2
	srl	%o4, 16, %g3
	stba	%g2, [%dst] %asi
	srl	%o4, 8, %g2
	stba	%g3, [%dst + 1] %asi
	add	%src, 4, %src
	stba	%g2, [%dst + 2] %asi
	addcc	%o4, %g5, %g5
	stba	%o4, [%dst + 3] %asi
	addc	%g5, %g0, %g5
	add	%dst, 4, %dst
	subcc	%g7, 1, %g7
	bne,a,pt %icc, 5b
	 lduw [%src], %o4
	sll	%g5, 16, %g2
	srl	%g5, 16, %g5
	srl	%g2, 16, %g2
	andcc	%len, 2, %g0
	add	%g2, %g5, %g5 
2:	be,a,pt	%icc, 3f		
	 andcc	%len, 1, %g0
	lduh [%src], %o4
	andcc	%len, 1, %g0
	srl	%o4, 8, %g2
	add	%src, 2, %src	
	stba	%g2, [%dst] %asi
	add	%g5, %o4, %g5
	stba	%o4, [%dst + 1] %asi
	add	%dst, 2, %dst
3:	be,a,pt	%icc, 1f		
	 sll	%g5, 16, %o4
	ldub [%src], %g2
	sll	%g2, 8, %o4	
	stba 	%g2, [%dst] %asi
	add	%g5, %o4, %g5
	sll	%g5, 16, %o4
1:	addcc	%o4, %g5, %g5
	srl	%g5, 16, %o4
	addc	%g0, %o4, %g5
	brz,pt	%o5, 4f
	 srl	%g5, 8, %o4
	and	%g5, 0xff, %g2
	and	%o4, 0xff, %o4
	sll	%g2, 8, %g2
	or	%g2, %o4, %g5
4:	addcc	%sum, %g5, %sum
	addc	%g0, %sum, %o0
	retl	
	 srl	%o0, 0, %o0
cpc_user_end:

	.globl	cpc_handler
cpc_handler:
	ldx	[%sp + 0x7ff + 128], %g1
	ldub	[%g6 + AOFF_task_thread + AOFF_thread_current_ds], %g3
	sub	%g0, EFAULT, %g2
	brnz,a,pt %g1, 1f
	 st	%g2, [%g1]
1:	sethi	%uhi(PAGE_OFFSET), %g4
	wr	%g3, %g0, %asi
	retl
	 sllx	%g4, 32, %g4

	.section __ex_table
	.align  4
	.word	cpc_start, 0, cpc_end, cpc_handler
	.word	cpc_user_start, 0, cpc_user_end, cpc_handler
/* strlen.S: Sparc64 optimized strlen code
 * Hand optimized from GNU libc's strlen
 * Copyright (C) 1991,1996 Free Software Foundation
 * Copyright (C) 1996 David S. Miller (davem@caip.rutgers.edu)
 * Copyright (C) 1996, 1997 Jakub Jelinek (jj@sunsite.mff.cuni.cz)
 */

#define LO_MAGIC 0x01010101
#define HI_MAGIC 0x80808080

	.align	32
	.global strlen, __strlen
strlen:
__strlen:
	mov	%o0, %o1
	andcc	%o0, 3, %g0
	be,pt	%icc, 9f
	 sethi	%hi(HI_MAGIC), %o4
	ldub	[%o0], %o5
	brz,pn	%o5, 11f
	 add	%o0, 1, %o0
	andcc	%o0, 3, %g0
	be,pn	%icc, 4f
	 or	%o4, %lo(HI_MAGIC), %o3
	ldub	[%o0], %o5
	brz,pn	%o5, 12f
	 add	%o0, 1, %o0
	andcc	%o0, 3, %g0
	be,pt	%icc, 5f
	 sethi	%hi(LO_MAGIC), %o4
	ldub	[%o0], %o5
	brz,pn	%o5, 13f
	 add	%o0, 1, %o0
	ba,pt	%icc, 8f
	 or	%o4, %lo(LO_MAGIC), %o2
9:
	or	%o4, %lo(HI_MAGIC), %o3
4:
	sethi	%hi(LO_MAGIC), %o4
5:
	or	%o4, %lo(LO_MAGIC), %o2
8:
	ld	[%o0], %o5
2:
	sub	%o5, %o2, %o4
	andcc	%o4, %o3, %g0
	be,pt	%icc, 8b
	 add	%o0, 4, %o0

	/* Check every byte. */
	srl	%o5, 24, %g5
	andcc	%g5, 0xff, %g0
	be,pn	%icc, 1f
	 add	%o0, -4, %o4
	srl	%o5, 16, %g5
	andcc	%g5, 0xff, %g0
	be,pn	%icc, 1f
	 add	%o4, 1, %o4
	srl	%o5, 8, %g5
	andcc	%g5, 0xff, %g0
	be,pn	%icc, 1f
	 add	%o4, 1, %o4
	andcc	%o5, 0xff, %g0
	bne,a,pt %icc, 2b
	 ld	[%o0], %o5
	add	%o4, 1, %o4
1:
	retl
	 sub	%o4, %o1, %o0
11:
	retl
	 mov	0, %o0
12:
	retl
	 mov	1, %o0
13:
	retl
	 mov	2, %o0
/* $Id: memcmp.S,v 1.3 2000/03/23 07:51:08 davem Exp $
 * Sparc64 optimized memcmp code.
 *
 * Copyright (C) 1997 Jakub Jelinek (jj@sunsite.mff.cuni.cz)
 * Copyright (C) 2000 David S. Miller (davem@redhat.com)
 */

	.text
	.align	32
	.globl	__memcmp, memcmp
__memcmp:
memcmp:
	cmp	%o2, 0		! IEU1	Group
loop:	be,pn	%icc, ret_0	! CTI
	 nop			! IEU0
	ldub	[%o0], %g5	! LSU	Group
	ldub	[%o1], %g3	! LSU	Group
	sub	%o2, 1, %o2	! IEU0
	add	%o0, 1, %o0	! IEU1
	add	%o1, 1, %o1	! IEU0	Group
	subcc	%g5, %g3, %g3	! IEU1	Group
	be,pt	%icc, loop	! CTI
	 cmp	%o2, 0		! IEU1	Group

ret_n0:	retl
	 mov	%g3, %o0
ret_0:	retl
	 mov	0, %o0
/* strlen_user.S: Sparc64 optimized strlen_user code
 *
 * Return length of string in userspace including terminating 0
 * or 0 for error
 *
 * Copyright (C) 1991,1996 Free Software Foundation
 * Copyright (C) 1996,1999 David S. Miller (davem@redhat.com)
 * Copyright (C) 1996,1997 Jakub Jelinek (jj@sunsite.mff.cuni.cz)
 */

#include <asm/asi.h>

#define LO_MAGIC 0x01010101
#define HI_MAGIC 0x80808080

	.align 4
	.global __strlen_user, __strnlen_user
__strlen_user:
	sethi	%hi(32768), %o1
__strnlen_user:	
	mov	%o1, %g1
	mov	%o0, %o1
	andcc	%o0, 3, %g0
	be,pt	%icc, 9f
	 sethi	%hi(HI_MAGIC), %o4
10:	lduba	[%o0] %asi, %o5
	brz,pn	%o5, 21f
	 add	%o0, 1, %o0
	andcc	%o0, 3, %g0
	be,pn	%icc, 4f
	 or	%o4, %lo(HI_MAGIC), %o3
11:	lduba	[%o0] %asi, %o5
	brz,pn	%o5, 22f
	 add	%o0, 1, %o0
	andcc	%o0, 3, %g0
	be,pt	%icc, 13f
	 srl	%o3, 7, %o2
12:	lduba	[%o0] %asi, %o5
	brz,pn	%o5, 23f
	 add	%o0, 1, %o0
	ba,pt	%icc, 2f
15:	 lda	[%o0] %asi, %o5
9:	or	%o4, %lo(HI_MAGIC), %o3
4:	srl	%o3, 7, %o2
13:	lda	[%o0] %asi, %o5
2:	sub	%o5, %o2, %o4
	andcc	%o4, %o3, %g0
	bne,pn	%icc, 82f
	 add	%o0, 4, %o0
	sub	%o0, %o1, %g2
81:	cmp	%g2, %g1
	blu,pt	%icc, 13b
	 mov	%o0, %o4
	ba,a,pt	%xcc, 1f

	/* Check every byte. */
82:	srl	%o5, 24, %g5
	andcc	%g5, 0xff, %g0
	be,pn	%icc, 1f
	 add	%o0, -3, %o4
	srl	%o5, 16, %g5
	andcc	%g5, 0xff, %g0
	be,pn	%icc, 1f
	 add	%o4, 1, %o4
	srl	%o5, 8, %g5
	andcc	%g5, 0xff, %g0
	be,pn	%icc, 1f
	 add	%o4, 1, %o4
	andcc	%o5, 0xff, %g0
	bne,pt	%icc, 81b
	 sub	%o0, %o1, %g2
	add	%o4, 1, %o4
1:	retl
	 sub	%o4, %o1, %o0
21:	retl
	 mov	1, %o0
22:	retl
	 mov	2, %o0
23:	retl
	 mov	3, %o0

        .section .fixup,#alloc,#execinstr
        .align  4
30:
        retl
         clr    %o0

	.section __ex_table,#alloc
	.align	4

	.word	10b, 30b
	.word	11b, 30b
	.word	12b, 30b
	.word	15b, 30b
	.word	13b, 30b
/* $Id: memscan.S,v 1.3 2000/01/31 04:59:10 davem Exp $
 * memscan.S: Optimized memscan for Sparc64.
 *
 * Copyright (C) 1997,1998 Jakub Jelinek (jj@ultra.linux.cz)
 * Copyright (C) 1998 David S. Miller (davem@redhat.com)
 */

#define HI_MAGIC	0x8080808080808080
#define LO_MAGIC	0x0101010101010101
#define ASI_PL		0x88

	.text
	.align	32
	.globl		__memscan_zero, __memscan_generic
	.globl		memscan

__memscan_zero:
	/* %o0 = bufp, %o1 = size */
	brlez,pn	%o1, szzero
	 andcc		%o0, 7, %g0
	be,pt		%icc, we_are_aligned
	 sethi		%hi(HI_MAGIC), %o4
	ldub		[%o0], %o5
1:	subcc		%o1, 1, %o1
	brz,pn		%o5, 10f
	 add		%o0, 1, %o0

	be,pn		%xcc, szzero
	 andcc		%o0, 7, %g0
	bne,a,pn	%icc, 1b
	 ldub		[%o0], %o5
we_are_aligned:
	ldxa		[%o0] ASI_PL, %o5
	or		%o4, %lo(HI_MAGIC), %o3
	sllx		%o3, 32, %o4
	or		%o4, %o3, %o3

	srlx		%o3, 7, %o2
msloop:
	sub		%o1, 8, %o1
	add		%o0, 8, %o0
	sub		%o5, %o2, %o4
	xor		%o4, %o5, %o4
	andcc		%o4, %o3, %g3
	bne,pn		%xcc, check_bytes
	 srlx		%o4, 32, %g3

	brgz,a,pt	%o1, msloop
	 ldxa		[%o0] ASI_PL, %o5
check_bytes:
	bne,a,pn	%icc, 2f
	 andcc		%o5, 0xff, %g0
	add		%o0, -5, %g2
	ba,pt		%xcc, 3f
	 srlx		%o5, 32, %g5

2:	srlx		%o5, 8, %g5
	be,pn		%icc, 1f
	 add		%o0, -8, %g2
	andcc		%g5, 0xff, %g0
	srlx		%g5, 8, %g5
	be,pn		%icc, 1f
	 inc		%g2
	andcc		%g5, 0xff, %g0

	srlx		%g5, 8, %g5
	be,pn		%icc, 1f
	 inc		%g2
	andcc		%g5, 0xff, %g0
	srlx		%g5, 8, %g5
	be,pn		%icc, 1f
	 inc		%g2
	andcc		%g3, %o3, %g0

	be,a,pn		%icc, 2f
	 mov		%o0, %g2
3:	andcc		%g5, 0xff, %g0
	srlx		%g5, 8, %g5
	be,pn		%icc, 1f
	 inc		%g2
	andcc		%g5, 0xff, %g0
	srlx		%g5, 8, %g5

	be,pn		%icc, 1f
	 inc		%g2
	andcc		%g5, 0xff, %g0
	srlx		%g5, 8, %g5
	be,pn		%icc, 1f
	 inc		%g2
	andcc		%g5, 0xff, %g0
	srlx		%g5, 8, %g5

	be,pn		%icc, 1f
	 inc		%g2
2:	brgz,a,pt	%o1, msloop
	 ldxa		[%o0] ASI_PL, %o5
	inc		%g2
1:	add		%o0, %o1, %o0
	cmp		%g2, %o0
	retl

	 movle		%xcc, %g2, %o0
10:	retl
	 sub		%o0, 1, %o0
szzero:	retl
	 nop

memscan:
__memscan_generic:
	/* %o0 = addr, %o1 = c, %o2 = size */
	brz,pn		%o2, 3f
	 add		%o0, %o2, %o3
	ldub		[%o0], %o5
	sub		%g0, %o2, %o4
1:
	cmp		%o5, %o1
	be,pn		%icc, 2f
	 addcc		%o4, 1, %o4
	bne,a,pt 	%xcc, 1b
	 ldub		[%o3 + %o4], %o5
	retl
	/* The delay slot is the same as the next insn, this is just to make it look more awful */
2:
	 add		%o3, %o4, %o0
	retl
	 sub		%o0, 1, %o0
3:
	retl
	 nop
/* $Id: strncpy_from_user.S,v 1.6 1999/05/25 16:53:05 jj Exp $
 * strncpy_from_user.S: Sparc64 strncpy from userspace.
 *
 *  Copyright (C) 1997, 1999 Jakub Jelinek (jj@ultra.linux.cz)
 */

#include <asm/asi.h>
#include <asm/errno.h>

	.data
	.align	8
0:	.xword	0x0101010101010101

	.text
	.align	4

	/* Must return:
	 *
	 * -EFAULT		for an exception
	 * count		if we hit the buffer limit
	 * bytes copied		if we hit a null byte
	 * (without the null byte)
	 *
	 * This implementation assumes:
	 * %o1 is 8 aligned => !(%o2 & 7)
	 * %o0 is 8 aligned (if not, it will be slooooow, but will work)
	 *
	 * This is optimized for the common case:
	 * in my stats, 90% of src are 8 aligned (even on sparc32)
	 * and average length is 18 or so.
	 */

	.globl	__strncpy_from_user
__strncpy_from_user:
	/* %o0=dest, %o1=src, %o2=count */
	sethi	%hi(0b), %o5		! IEU0	Group
	andcc	%o1, 7, %g0		! IEU1
	bne,pn	%icc, 30f		! CTI
	 ldx	[%o5 + %lo(0b)], %o4	! Load	Group
	add	%o0, %o2, %g3		! IEU0
60:	ldxa	[%o1] %asi, %g1		! Load	Group
	brlez,pn %o2, 10f		! CTI
	 sllx	%o4, 7, %o5		! IEU0	Group
	mov	%o0, %o3		! IEU1
1:	sub	%g1, %o4, %g2		! IEU0	Group
	stx	%g1, [%o0]		! Store
	add	%o0, 8, %o0		! IEU1
	andcc	%g2, %o5, %g0		! IEU1	Group
	bne,pn	%xcc, 5f		! CTI
	 add	%o1, 8, %o1		! IEU0
	cmp	%o0, %g3		! IEU1	Group
	bl,a,pt %xcc, 1b		! CTI
61:	 ldxa	[%o1] %asi, %g1		! Load
10:	retl				! CTI	Group
	 mov	%o2, %o0		! IEU0
5:	srlx	%g2, 32, %g7		! IEU0	Group
	sethi	%hi(0xff00), %g5	! IEU1
	andcc	%g7, %o5, %g0		! IEU1	Group
	be,pn	%icc, 2f		! CTI
	 or	%g5, %lo(0xff00), %g5	! IEU0
	srlx	%g1, 48, %g7		! IEU0	Group
	andcc	%g7, %g5, %g0		! IEU1	Group
	be,pn	%icc, 50f		! CTI
	 andcc	%g7, 0xff, %g0		! IEU1	Group
	be,pn	%icc, 51f		! CTI
	 srlx	%g1, 32, %g7		! IEU0
	andcc	%g7, %g5, %g0		! IEU1	Group
	be,pn	%icc, 52f		! CTI
	 andcc	%g7, 0xff, %g0		! IEU1	Group
	be,pn	%icc, 53f		! CTI
2:	 andcc	%g2, %o5, %g0		! IEU1	Group
	be,pn	%icc, 2f		! CTI
	 srl	%g1, 16, %g7		! IEU0
	andcc	%g7, %g5, %g0		! IEU1	Group
	be,pn	%icc, 54f		! CTI
	 andcc	%g7, 0xff, %g0		! IEU1	Group
	be,pn	%icc, 55f		! CTI
	 andcc	%g1, %g5, %g0		! IEU1	Group
	be,pn	%icc, 56f		! CTI
	 andcc	%g1, 0xff, %g0		! IEU1	Group
	be,a,pn	%icc, 57f		! CTI
	 sub	%o0, %o3, %o0		! IEU0
2:	cmp	%o0, %g3		! IEU1	Group
	bl,a,pt	%xcc, 1b		! CTI
62:	 ldxa	[%o1] %asi, %g1		! Load
	retl				! CTI	Group
	 mov	%o2, %o0		! IEU0
50:	sub	%o0, %o3, %o0
	retl
	 sub	%o0, 8, %o0
51:	sub	%o0, %o3, %o0
	retl
	 sub	%o0, 7, %o0
52:	sub	%o0, %o3, %o0
	retl
	 sub	%o0, 6, %o0
53:	sub	%o0, %o3, %o0
	retl
	 sub	%o0, 5, %o0
54:	sub	%o0, %o3, %o0
	retl
	 sub	%o0, 4, %o0
55:	sub	%o0, %o3, %o0
	retl
	 sub	%o0, 3, %o0
56:	sub	%o0, %o3, %o0
	retl
	 sub	%o0, 2, %o0
57:	retl
	 sub	%o0, 1, %o0
30:	brlez,pn %o2, 3f
	 sub	%g0, %o2, %o3
	add	%o0, %o2, %o0
63:	lduba	[%o1] %asi, %o4
1:	add	%o1, 1, %o1
	brz,pn	%o4, 2f
	 stb	%o4, [%o0 + %o3]
	addcc	%o3, 1, %o3
	bne,pt	%xcc, 1b
64:	 lduba	[%o1] %asi, %o4
3:	retl
	 mov	%o2, %o0
2:	retl
	 add	%o2, %o3, %o0

	.section .fixup,#alloc,#execinstr
	.align	4
4:	retl
	 mov	-EFAULT, %o0

	.section __ex_table,#alloc
	.align	4
	.word	60b, 4b
	.word	61b, 4b
	.word	62b, 4b
	.word	63b, 4b
	.word	64b, 4b
/* $Id: strncmp.S,v 1.2 1997/03/11 17:51:44 jj Exp $
 * Sparc64 optimized strncmp code.
 *
 * Copyright (C) 1997 Jakub Jelinek (jj@sunsite.mff.cuni.cz)
 */

#include <asm/asi.h>

	.text
	.align 4
	.global __strncmp, strncmp
__strncmp:
strncmp:
	brlez,pn %o2, 3f
	 lduba	[%o0] (ASI_PNF), %o3
1:
	add	%o0, 1, %o0
	ldub	[%o1], %o4
	brz,pn	%o3, 2f
	 add	%o1, 1, %o1
	cmp	%o3, %o4
	bne,pn	%icc, 2f
	 subcc	%o2, 1, %o2
	bne,a,pt %xcc, 1b
	 ldub	[%o0], %o3
2:
	retl
	 sub	%o3, %o4, %o0
3:
	retl
	 clr	%o0
/* $Id: VIS.h,v 1.4 1999/05/25 16:52:50 jj Exp $
 * VIS.h: High speed copy/clear operations utilizing the UltraSparc
 *        Visual Instruction Set.
 *
 * Copyright (C) 1997 David S. Miller (davem@caip.rutgers.edu)
 * Copyright (C) 1996, 1997, 1999 Jakub Jelinek (jj@ultra.linux.cz)
 */

	/* VIS code can be used for numerous copy/set operation variants.
	 * It can be made to work in the kernel, one single instance,
	 * for all of memcpy, copy_to_user, and copy_from_user by setting
	 * the ASI src/dest globals correctly.  Furthermore it can
	 * be used for kernel-->kernel page copies as well, a hook label
	 * is put in here just for this purpose.
	 *
	 * For userland, compiling this without __KERNEL__ defined makes
	 * it work just fine as a generic libc bcopy and memcpy.
	 * If for userland it is compiled with a 32bit gcc (but you need
	 * -Wa,-Av9a), the code will just rely on lower 32bits of
	 * IEU registers, if you compile it with 64bit gcc (ie. define
	 * __sparc_v9__), the code will use full 64bit.
	 */

#ifndef __VIS_H
#define __VIS_H
	 
#ifdef __KERNEL__
#include <asm/head.h>
#include <asm/asi.h>
#else
#define ASI_AIUS		0x11 /* Secondary, user				*/
#define ASI_BLK_AIUS		0x71 /* Secondary, user, blk ld/st		*/
#define ASI_P			0x80 /* Primary, implicit			*/
#define ASI_S			0x81 /* Secondary, implicit			*/
#define ASI_BLK_COMMIT_P	0xe0 /* Primary, blk store commit		*/
#define ASI_BLK_COMMIT_S	0xe1 /* Secondary, blk store commit		*/
#define ASI_BLK_P		0xf0 /* Primary, blk ld/st			*/
#define ASI_BLK_S		0xf1 /* Secondary, blk ld/st			*/
#define FPRS_FEF		0x04
#endif

	/* I'm telling you, they really did this chip right.
	 * Perhaps the SunSoft folks should visit some of the
	 * people in Sun Microelectronics and start some brain
	 * cell exchange program...
	 */
#define ASI_BLK_XOR		(ASI_P ^ ASI_BLK_P)
	/* Well, things get more hairy if we use ASI_AIUS as
	 * USER_DS and ASI_P as KERNEL_DS, we'd reach
	 * commit block stores this way which is not what we want...
	 */
	/* ASI_P->ASI_BLK_P && ASI_AIUS->ASI_BLK_AIUS transitions can be done
	 * as blkasi = asi | ASI_BLK_OR
	 */
#define ASI_BLK_OR		(ASI_BLK_P & ~ASI_P)
	/* Transition back from ASI_BLK_P->ASI_P && ASI_BLK_AIUS->ASI_AIUS is
	 * more complicated:
	 * asi = blkasi ^ (blkasi >> 3) ^ ASI_BLK_XOR1
	 */
#define ASI_BLK_XOR1		(ASI_BLK_P ^ (ASI_BLK_P >> 3) ^ ASI_P)

#define	asi_src			%o3
#define asi_dest		%o4

#ifdef __KERNEL__
#define ASI_SETSRC_BLK		wr	asi_src, 0, %asi;
#define ASI_SETSRC_NOBLK	wr	asi_src, 0, %asi;
#define ASI_SETDST_BLK		wr	asi_dest, 0, %asi;
#define ASI_SETDST_NOBLK	wr	asi_dest, 0, %asi;
#define ASIBLK			%asi
#define ASINORMAL		%asi
#define LDUB			lduba
#define LDUH			lduha
#define LDUW			lduwa
#define LDX			ldxa
#define LDD			ldda
#define LDDF			ldda
#define LDBLK			ldda
#define STB			stba
#define STH			stha
#define STW			stwa
#define STD			stda
#define STX			stxa
#define STDF			stda
#define STBLK			stda
#else
#define ASI_SETSRC_BLK
#define ASI_SETSRC_NOBLK
#define ASI_SETDST_BLK
#define ASI_SETDST_NOBLK
#define ASI_SETDST_SPECIAL
#define ASIBLK			%asi
#define ASINORMAL
#define LDUB			ldub
#define LDUH			lduh
#define LDUW			lduw
#define LDD			ldd
#define LDX			ldx
#define LDDF			ldd
#define LDBLK			ldda
#define STB			stb
#define STH			sth
#define STW			stw
#define STD			std
#define STX			stx
#define STDF			std
#define STBLK			stda
#endif

#ifdef __KERNEL__

#define REGS_64BIT

#else

#ifndef REGS_64BIT
#ifdef __sparc_v9__
#define REGS_64BIT
#endif
#endif

#endif

#ifndef REGS_64BIT
#define	xcc	icc
#endif

#endif
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01.01KERNEL: assertion (idev->addr_list==NULL) failed at addrconf.c(%d)
KERNEL: assertion (idev->mc_list==NULL) failed at addrconf.c(%d)
Freeing alive inet6 device %p
RTNL: assertion failed at addrconf.c(%d)
ipv6KERNEL: assertion (ifp->if_next==NULL) failed at addrconf.c(%d)
KERNEL: assertion (ifp->lst_next==NULL) failed at addrconf.c(%d)
Timer is still running, when freeing ifa=%p
Freeing alive inet6 address %p
<6>%s: duplicate address detected!
<4>addrconf: prefix option has invalid lifetime
<7>addrconf: device %s not configured
<7>IPv6 addrconf: prefix with wrong length %d
<7>init loopback: add_dev failed
<7>init sit: add_dev failed
�#D$W$W$W$D$ $<7>%s: no IPv6 routers present
%02x %02x %02x %02x %02x %8s
netconfallrouter_solicitation_delayrouter_solicitation_intervalrouter_solicitationsdad_transmitsautoconfaccept_redirectsaccept_ramtuhop_limitforwardingdefaultif_inet6QP1��XY���QP1��XY���DQP1��XY�����F� �Pjh����������t�@ h-��.�h������(�jh��������
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\ifeq (-D__KERNEL__ -I/home/me/kernel/linux/include -Wall -Wstrict-prototypes -Wno-trigraphs -O2 -fomit-frame-pointer -fno-strict-aliasing -fno-common -pipe -mpreferred-stack-boundary=2 -march=i686,$(strip $(subst $(comma),:,$(CFLAGS) $(EXTRA_CFLAGS) $(CFLAGS_addrconf.o))))
FILES_FLAGS_UP_TO_DATE += addrconf.o
endif
adm1021.o: adm1021.c \
   /home/me/kernel/linux/include/linux/version.h \
   /home/me/kernel/linux/include/linux/module.h \
   /home/me/kernel/linux/include/linux/slab.h \
   /home/me/kernel/linux/include/linux/i2c.h \
   /home/me/kernel/linux/include/linux/sensors.h \
   /home/me/kernel/linux/include/linux/init.h
adm1024.o: adm1024.c \
   /home/me/kernel/linux/include/linux/version.h \
   /home/me/kernel/linux/include/linux/module.h \
   /home/me/kernel/linux/include/linux/slab.h \
   /home/me/kernel/linux/include/linux/proc_fs.h \
   /home/me/kernel/linux/include/linux/ioport.h \
   /home/me/kernel/linux/include/linux/sysctl.h \
   /home/me/kernel/linux/include/asm/errno.h \
   /home/me/kernel/linux/include/asm/io.h \
   /home/me/kernel/linux/include/linux/types.h \
   /home/me/kernel/linux/include/linux/i2c.h \
   /home/me/kernel/linux/include/linux/sensors.h \
   /home/me/kernel/linux/include/linux/init.h
adm1025.o: adm1025.c \
   /home/me/kernel/linux/include/linux/version.h \
   /home/me/kernel/linux/include/linux/module.h \
   /home/me/kernel/linux/include/linux/slab.h \
   /home/me/kernel/linux/include/linux/proc_fs.h \
   /home/me/kernel/linux/include/linux/ioport.h \
   /home/me/kernel/linux/include/linux/sysctl.h \
   /home/me/kernel/linux/include/asm/errno.h \
   /home/me/kernel/linux/include/asm/io.h \
   /home/me/kernel/linux/include/linux/types.h \
   /home/me/kernel/linux/include/linux/i2c.h \
   /home/me/kernel/linux/include/linux/sensors.h \
   /home/me/kernel/linux/include/linux/init.h
adm9240.o: adm9240.c \
   /home/me/kernel/linux/include/linux/version.h \
   /home/me/kernel/linux/include/linux/module.h \
   /home/me/kernel/linux/include/linux/slab.h \
   /home/me/kernel/linux/include/linux/proc_fs.h \
   /home/me/kernel/linux/include/linux/ioport.h \
   /home/me/kernel/linux/include/linux/sysctl.h \
   /home/me/kernel/linux/include/asm/errno.h \
   /home/me/kernel/linux/include/asm/io.h \
   /home/me/kernel/linux/include/linux/types.h \
   /home/me/kernel/linux/include/linux/i2c.h \
   /home/me/kernel/linux/include/linux/sensors.h \
   /home/me/kernel/linux/include/linux/init.h
bt869.o: bt869.c \
   /home/me/kernel/linux/include/linux/version.h \
   /home/me/kernel/linux/include/linux/module.h \
   /home/me/kernel/linux/include/linux/slab.h \
   /home/me/kernel/linux/include/linux/i2c.h \
   /home/me/kernel/linux/include/linux/sensors.h \
   /home/me/kernel/linux/include/linux/init.h
ddcmon.o: ddcmon.c \
   /home/me/kernel/linux/include/linux/module.h \
   /home/me/kernel/linux/include/linux/version.h \
   /home/me/kernel/linux/include/linux/slab.h \
   /home/me/kernel/linux/include/linux/i2c.h \
   /home/me/kernel/linux/include/linux/sensors.h \
   /home/me/kernel/linux/include/linux/init.h
ds1621.o: ds1621.c \
   /home/me/kernel/linux/include/linux/version.h \
   /home/me/kernel/linux/include/linux/module.h \
   /home/me/kernel/linux/include/linux/slab.h \
   /home/me/kernel/linux/include/linux/i2c.h \
   /home/me/kernel/linux/include/linux/sensors.h \
   /home/me/kernel/linux/include/linux/init.h
eeprom.o: eeprom.c \
   /home/me/kernel/linux/include/linux/module.h \
   /home/me/kernel/linux/include/linux/version.h \
   /home/me/kernel/linux/include/linux/slab.h \
   /home/me/kernel/linux/include/linux/i2c.h \
   /home/me/kernel/linux/include/linux/sensors.h \
   /home/me/kernel/linux/include/linux/init.h
fscpos.o: fscpos.c \
   /home/me/kernel/linux/include/linux/version.h \
   /home/me/kernel/linux/include/linux/module.h \
   /home/me/kernel/linux/include/linux/slab.h \
   /home/me/kernel/linux/include/linux/proc_fs.h \
   /home/me/kernel/linux/include/linux/ioport.h \
   /home/me/kernel/linux/include/linux/sysctl.h \
   /home/me/kernel/linux/include/asm/errno.h \
   /home/me/kernel/linux/include/asm/io.h \
   /home/me/kernel/linux/include/linux/types.h \
   /home/me/kernel/linux/include/linux/i2c.h \
   /home/me/kernel/linux/include/linux/sensors.h \
   /home/me/kernel/linux/include/linux/init.h
fscscy.o: fscscy.c \
   /home/me/kernel/linux/include/linux/version.h \
   /home/me/kernel/linux/include/linux/module.h \
   /home/me/kernel/linux/include/linux/slab.h \
   /home/me/kernel/linux/include/linux/proc_fs.h \
   /home/me/kernel/linux/include/linux/ioport.h \
   /home/me/kernel/linux/include/linux/sysctl.h \
   /home/me/kernel/linux/include/asm/errno.h \
   /home/me/kernel/linux/include/asm/io.h \
   /home/me/kernel/linux/include/linux/types.h \
   /home/me/kernel/linux/include/linux/i2c.h \
   /home/me/kernel/linux/include/linux/sensors.h \
   /home/me/kernel/linux/include/linux/init.h
gl518sm.o: gl518sm.c \
   /home/me/kernel/linux/include/linux/module.h \
   /home/me/kernel/linux/include/linux/version.h \
   /home/me/kernel/linux/include/linux/slab.h \
   /home/me/kernel/linux/include/linux/i2c.h \
   /home/me/kernel/linux/include/linux/sensors.h \
   /home/me/kernel/linux/include/linux/init.h \
   /home/me/kernel/linux/include/linux/smp_lock.h
gl520sm.o: gl520sm.c \
   /home/me/kernel/linux/include/linux/version.h \
   /home/me/kernel/linux/include/linux/module.h \
   /home/me/kernel/linux/include/linux/slab.h \
   /home/me/kernel/linux/include/linux/i2c.h \
   /home/me/kernel/linux/include/linux/sensors.h \
   /home/me/kernel/linux/include/linux/init.h
it87.o: it87.c \
   /home/me/kernel/linux/include/linux/version.h \
   /home/me/kernel/linux/include/linux/module.h \
   /home/me/kernel/linux/include/linux/slab.h \
   /home/me/kernel/linux/include/linux/proc_fs.h \
   /home/me/kernel/linux/include/linux/ioport.h \
   /home/me/kernel/linux/include/linux/sysctl.h \
   /home/me/kernel/linux/include/asm/errno.h \
   /home/me/kernel/linux/include/asm/io.h \
   /home/me/kernel/linux/include/linux/types.h \
   /home/me/kernel/linux/include/linux/i2c.h \
   /home/me/kernel/linux/include/linux/sensors.h \
   /home/me/kernel/linux/include/linux/init.h
lm75.o: lm75.c \
   /home/me/kernel/linux/include/linux/version.h \
   /home/me/kernel/linux/include/linux/module.h \
   /home/me/kernel/linux/include/linux/slab.h \
   /home/me/kernel/linux/include/linux/i2c.h \
   /home/me/kernel/linux/include/linux/sensors.h \
   /home/me/kernel/linux/include/linux/init.h
lm78.o: lm78.c \
   /home/me/kernel/linux/include/linux/version.h \
   /home/me/kernel/linux/include/linux/module.h \
   /home/me/kernel/linux/include/linux/slab.h \
   /home/me/kernel/linux/include/linux/proc_fs.h \
   /home/me/kernel/linux/include/linux/ioport.h \
   /home/me/kernel/linux/include/linux/sysctl.h \
   /home/me/kernel/linux/include/asm/errno.h \
   /home/me/kernel/linux/include/asm/io.h \
   /home/me/kernel/linux/include/linux/types.h \
   /home/me/kernel/linux/include/linux/i2c.h \
   /home/me/kernel/linux/include/linux/sensors.h \
   /home/me/kernel/linux/include/linux/init.h
lm80.o: lm80.c \
   /home/me/kernel/linux/include/linux/version.h \
   /home/me/kernel/linux/include/linux/module.h \
   /home/me/kernel/linux/include/linux/slab.h \
   /home/me/kernel/linux/include/linux/proc_fs.h \
   /home/me/kernel/linux/include/linux/ioport.h \
   /home/me/kernel/linux/include/linux/sysctl.h \
   /home/me/kernel/linux/include/asm/errno.h \
   /home/me/kernel/linux/include/asm/io.h \
   /home/me/kernel/linux/include/linux/types.h \
   /home/me/kernel/linux/include/linux/i2c.h \
   /home/me/kernel/linux/include/linux/sensors.h \
   /home/me/kernel/linux/include/linux/init.h
lm87.o: lm87.c \
   /home/me/kernel/linux/include/linux/version.h \
   /home/me/kernel/linux/include/linux/module.h \
   /home/me/kernel/linux/include/linux/slab.h \
   /home/me/kernel/linux/include/linux/proc_fs.h \
   /home/me/kernel/linux/include/linux/ioport.h \
   /home/me/kernel/linux/include/linux/sysctl.h \
   /home/me/kernel/linux/include/asm/errno.h \
   /home/me/kernel/linux/include/asm/io.h \
   /home/me/kernel/linux/include/linux/types.h \
   /home/me/kernel/linux/include/linux/i2c.h \
   /home/me/kernel/linux/include/linux/sensors.h \
   /home/me/kernel/linux/include/linux/init.h
matorb.o: matorb.c \
   /home/me/kernel/linux/include/linux/version.h \
   /home/me/kernel/linux/include/linux/module.h \
   /home/me/kernel/linux/include/linux/slab.h \
   /home/me/kernel/linux/include/linux/i2c.h \
   /home/me/kernel/linux/include/linux/sensors.h \
   /home/me/kernel/linux/include/linux/init.h
maxilife.o: maxilife.c \
   /home/me/kernel/linux/include/linux/version.h \
   /home/me/kernel/linux/include/linux/module.h \
   /home/me/kernel/linux/include/linux/slab.h \
   /home/me/kernel/linux/include/linux/proc_fs.h \
   /home/me/kernel/linux/include/linux/ioport.h \
   /home/me/kernel/linux/include/linux/sysctl.h \
   /home/me/kernel/linux/include/asm/errno.h \
   /home/me/kernel/linux/include/asm/io.h \
   /home/me/kernel/linux/include/linux/types.h \
   /home/me/kernel/linux/include/linux/i2c.h \
   /home/me/kernel/linux/include/linux/sensors.h \
   /home/me/kernel/linux/include/linux/init.h \
   /home/me/kernel/linux/include/linux/vmalloc.h \
   /home/me/kernel/linux/include/linux/ctype.h
mtp008.o: mtp008.c \
   /home/me/kernel/linux/include/linux/version.h \
   /home/me/kernel/linux/include/linux/module.h \
   /home/me/kernel/linux/include/linux/slab.h \
   /home/me/kernel/linux/include/linux/proc_fs.h \
   /home/me/kernel/linux/include/linux/ioport.h \
   /home/me/kernel/linux/include/linux/sysctl.h \
   /home/me/kernel/linux/include/asm/errno.h \
   /home/me/kernel/linux/include/asm/io.h \
   /home/me/kernel/linux/include/linux/types.h \
   /home/me/kernel/linux/include/linux/i2c.h \
   /home/me/kernel/linux/include/linux/sensors.h \
   /home/me/kernel/linux/include/linux/init.h
sensors.o: sensors.c \
   /home/me/kernel/linux/include/linux/init.h \
   $(wildcard /home/me/kernel/linux/include/config/sensors/adm1021.h) \
   $(wildcard /home/me/kernel/linux/include/config/sensors/adm1025.h) \
   $(wildcard /home/me/kernel/linux/include/config/sensors/adm9240.h) \
   $(wildcard /home/me/kernel/linux/include/config/sensors/bt869.h) \
   $(wildcard /home/me/kernel/linux/include/config/sensors/ddcmon.h) \
   $(wildcard /home/me/kernel/linux/include/config/sensors/ds1621.h) \
   $(wildcard /home/me/kernel/linux/include/config/sensors/gl518sm.h) \
   $(wildcard /home/me/kernel/linux/include/config/sensors/gl520sm.h) \
   $(wildcard /home/me/kernel/linux/include/config/sensors/lm75.h) \
   $(wildcard /home/me/kernel/linux/include/config/sensors/lm78.h) \
   $(wildcard /home/me/kernel/linux/include/config/sensors/lm80.h) \
   $(wildcard /home/me/kernel/linux/include/config/sensors/lm87.h) \
   $(wildcard /home/me/kernel/linux/include/config/sensors/mtp008.h) \
   $(wildcard /home/me/kernel/linux/include/config/sensors/sis5595.h) \
   $(wildcard /home/me/kernel/linux/include/config/sensors/thmc50.h) \
   $(wildcard /home/me/kernel/linux/include/config/sensors/via686a.h) \
   $(wildcard /home/me/kernel/linux/include/config/sensors/w83781d.h) \
   $(wildcard /home/me/kernel/linux/include/config/sensors/eeprom.h) \
   $(wildcard /home/me/kernel/linux/include/config/sensors/ltc1710.h) \
   $(wildcard /home/me/kernel/linux/include/config/sensors/it87.h)
sis5595.o: sis5595.c \
   /home/me/kernel/linux/include/linux/version.h \
   /home/me/kernel/linux/include/linux/module.h \
   /home/me/kernel/linux/include/linux/slab.h \
   /home/me/kernel/linux/include/linux/proc_fs.h \
   /home/me/kernel/linux/include/linux/ioport.h \
   /home/me/kernel/linux/include/linux/sysctl.h \
   /home/me/kernel/linux/include/linux/pci.h \
   /home/me/kernel/linux/include/asm/errno.h \
   /home/me/kernel/linux/include/asm/io.h \
   /home/me/kernel/linux/include/linux/types.h \
   /home/me/kernel/linux/include/linux/i2c.h \
   /home/me/kernel/linux/include/linux/sensors.h \
   /home/me/kernel/linux/include/linux/init.h
thmc50.o: thmc50.c \
   /home/me/kernel/linux/include/linux/version.h \
   /home/me/kernel/linux/include/linux/module.h \
   /home/me/kernel/linux/include/linux/slab.h \
   /home/me/kernel/linux/include/linux/i2c.h \
   /home/me/kernel/linux/include/linux/sensors.h \
   /home/me/kernel/linux/include/linux/init.h
via686a.o: via686a.c \
   /home/me/kernel/linux/include/linux/version.h \
   /home/me/kernel/linux/include/linux/module.h \
   /home/me/kernel/linux/include/linux/slab.h \
   /home/me/kernel/linux/include/linux/proc_fs.h \
   /home/me/kernel/linux/include/linux/ioport.h \
   /home/me/kernel/linux/include/linux/sysctl.h \
   /home/me/kernel/linux/include/linux/pci.h \
   /home/me/kernel/linux/include/asm/errno.h \
   /home/me/kernel/linux/include/asm/io.h \
   /home/me/kernel/linux/include/linux/types.h \
   /home/me/kernel/linux/include/linux/delay.h \
   /home/me/kernel/linux/include/linux/i2c.h \
   /home/me/kernel/linux/include/linux/sensors.h \
   /home/me/kernel/linux/include/linux/init.h
w83781d.o: w83781d.c \
   /home/me/kernel/linux/include/linux/version.h \
   /home/me/kernel/linux/include/linux/module.h \
   /home/me/kernel/linux/include/linux/slab.h \
   /home/me/kernel/linux/include/linux/proc_fs.h \
   /home/me/kernel/linux/include/linux/ioport.h \
   /home/me/kernel/linux/include/linux/sysctl.h \
   /home/me/kernel/linux/include/asm/errno.h \
   /home/me/kernel/linux/include/asm/io.h \
   /home/me/kernel/linux/include/linux/types.h \
   /home/me/kernel/linux/include/linux/i2c.h \
   /home/me/kernel/linux/include/linux/sensors.h \
   /home/me/kernel/linux/include/linux/init.h
A != 1 && $CONFIG_FB_MATROX != 1 && $CONFIG_FB_CT65550 != 1 && $CONFIG_FB_PM2 != 1 && $CONFIG_FB_PM3 != 1 && $CONFIG_FB_P9100 != 1 && $CONFIG_FB_ATY128 != 1 && $CONFIG_FB_RIVA != 1 && $CONFIG_FB_RADEON != 1 && $CONFIG_FB_SGIVW != 1 && $CONFIG_FB_CYBER2000 != 1 && $CONFIG_FB_SA1100 != 1 && $CONFIG_FB_3DFX != 1 && $CONFIG_FB_PMAG_BA != 1 && $CONFIG_FB_PMAGB_B != 1 && $CONFIG_FB_MAXINE != 1 && $CONFIG_FB_TX3912 != 1 && $CONFIG_FB_SIS != 1 && $CONFIG_FB_NEOMAGIC != 1) && ($CONFIG_FB_ACORN == 2 || $CONFIG_FB_ATARI == 2 || $CONFIG_FB_ATY == 2 || $CONFIG_FB_MAC == 2 || $CONFIG_FB_OF == 2 || $CONFIG_FB_TGA == 2 || $CONFIG_FB_VESA == 2 || $CONFIG_FB_VIRTUAL == 2 || $CONFIG_FB_TCX == 2 || $CONFIG_FB_CGTHREE == 2 || $CONFIG_FB_CONTROL == 2 || $CONFIG_FB_CLGEN == 2 || $CONFIG_FB_CGFOURTEEN == 2 || $CONFIG_FB_G364 == 2 || $CONFIG_FB_VIRGE == 2 || $CONFIG_FB_CYBER == 2 || $CONFIG_FB_VALKYRIE == 2 || $CONFIG_FB_PLATINUM == 2 || $CONFIG_FB_IGA == 2 || $CONFIG_FB_MATROX == 2 || $CONFIG_FB_CT65550 == 2 || $CONFIG_FB_PM2 == 2 || $CONFIG_FB_PM3 == 2 || $CONFIG_FB_P9100 == 2 || $CONFIG_FB_ATY128 == 2 || $CONFIG_FB_RIVA == 2 || $CONFIG_FB_3DFX == 2 || $CONFIG_FB_SGIVW == 2 || $CONFIG_FB_CYBER2000 == 2 || $CONFIG_FB_PMAG_BA == 2 || $CONFIG_FB_PMAGB_B == 2 || $CONFIG_FB_MAXINE == 2 || $CONFIG_FB_RADEON == 2 || $CONFIG_FB_SA1100 == 2 || $CONFIG_FB_SIS == 2 || $CONFIG_FB_TX3912 == 2 || $CONFIG_FB_NEOMAGIC == 2)} then {write_tristate $cfg $autocfg CONFIG_FBCON_CFB8 $CONSTANT_M [list $notmod] 2 }
	global CONFIG_FB_TBOX
	global CONFIG_FB_Q40
	global CONFIG_FB_PVR2
	if {($CONFIG_VT == 1) && ($CONFIG_EXPERIMENTAL == 1) && ($CONFIG_FB == 1) && ($CONFIG_FBCON_ADVANCED != 1) && ($CONFIG_FB_ATARI == 1 || $CONFIG_FB_ATY == 1 || $CONFIG_FB_MAC == 1 || $CONFIG_FB_VESA == 1 || $CONFIG_FB_VIRTUAL == 1 || $CONFIG_FB_TBOX == 1 || $CONFIG_FB_Q40 == 1 || $CONFIG_FB_RADEON == 1 || $CONFIG_FB_CONTROL == 1 || $CONFIG_FB_CLGEN == 1 || $CONFIG_FB_VIRGE == 1 || $CONFIG_FB_CYBER == 1 || $CONFIG_FB_VALKYRIE == 1 || $CONFIG_FB_PLATINUM == 1 || $CONFIG_FB_CT65550 == 1 || $CONFIG_FB_MATROX == 1 || $CONFIG_FB_PM2 == 1 || $CONFIG_FB_SGIVW == 1 || $CONFIG_FB_PM3 == 1 || $CONFIG_FB_RIVA == 1 || $CONFIG_FB_ATY128 == 1 || $CONFIG_FB_CYBER2000 == 1 || $CONFIG_FB_3DFX == 1 || $CONFIG_FB_SIS == 1 || $CONFIG_FB_SA1100 == 1 || $CONFIG_FB_PVR2 == 1 || $CONFIG_FB_VOODOO1 == 1 || $CONFIG_FB_NEOMAGIC == 1)} then {write_tristate $cfg $autocfg CONFIG_FBCON_CFB16 $CONSTANT_Y [list $notmod] 2 }
	if {($CONFIG_VT == 1) && ($CONFIG_EXPERIMENTAL == 1) && ($CONFIG_FB == 1) && ($CONFIG_FBCON_ADVANCED != 1) && ($CONFIG_FB_ATARI != 1 && $CONFIG_FB_ATY != 1 && $CONFIG_FB_MAC != 1 && $CONFIG_FB_VESA != 1 && $CONFIG_FB_VIRTUAL != 1 && $CONFIG_FB_TBOX != 1 && $CONFIG_FB_Q40 != 1 && $CONFIG_FB_RADEON != 1 && $CONFIG_FB_CONTROL != 1 && $CONFIG_FB_CLGEN != 1 && $CONFIG_FB_VIRGE != 1 && $CONFIG_FB_CYBER != 1 && $CONFIG_FB_VALKYRIE != 1 && $CONFIG_FB_PLATINUM != 1 && $CONFIG_FB_CT65550 != 1 && $CONFIG_FB_MATROX != 1 && $CONFIG_FB_PM2 != 1 && $CONFIG_FB_SGIVW != 1 && $CONFIG_FB_PM3 != 1 && $CONFIG_FB_RIVA != 1 && $CONFIG_FB_ATY128 != 1 && $CONFIG_FB_CYBER2000 != 1 && $CONFIG_FB_3DFX != 1 && $CONFIG_FB_SIS != 1 && $CONFIG_FB_SA1100 != 1 && $CONFIG_FB_PVR2 != 1 && $CONFIG_FB_VOODOO1 != 1 && $CONFIG_FB_NEOMAGIC != 1) && ($CONFIG_FB_ATARI == 2 || $CONFIG_FB_ATY == 2 || $CONFIG_FB_MAC == 2 || $CONFIG_FB_VESA == 2 || $CONFIG_FB_VIRTUAL == 2 || $CONFIG_FB_TBOX == 2 || $CONFIG_FB_Q40 == 2 || $CONFIG_FB_3DFX == 2 || $CONFIG_FB_CONTROL == 2 || $CONFIG_FB_CLGEN == 2 || $CONFIG_FB_VIRGE == 2 || $CONFIG_FB_CYBER == 2 || $CONFIG_FB_VALKYRIE == 2 || $CONFIG_FB_PLATINUM == 2 || $CONFIG_FB_CT65550 == 2 || $CONFIG_FB_MATROX == 2 || $CONFIG_FB_PM2 == 2 || $CONFIG_FB_SGIVW == 2 || $CONFIG_FB_PM3 == 2 || $CONFIG_FB_RIVA == 2 || $CONFIG_FB_ATY128 == 2 || $CONFIG_FB_CYBER2000 == 2 || $CONFIG_FB_SIS == 2 || $CONFIG_FB_SA1100 == 2 || $CONFIG_FB_RADEON == 2 || $CONFIG_FB_PVR2 == 2 || $CONFIG_FB_VOODOO1 == 2 || $CONFIG_FB_NEOMAGIC == 2)} then {write_tristate $cfg $autocfg CONFIG_FBCON_CFB16 $CONSTANT_M [list $notmod] 2 }
	if {($CONFIG_VT == 1) && ($CONFIG_EXPERIMENTAL == 1) && ($CONFIG_FB == 1) && ($CONFIG_FBCON_ADVANCED != 1) && ($CONFIG_FB_ATY == 1 || $CONFIG_FB_VIRTUAL == 1 || $CONFIG_FB_CLGEN == 1 || $CONFIG_FB_VESA == 1 || $CONFIG_FB_MATROX == 1 || $CONFIG_FB_PM2 == 1 || $CONFIG_FB_ATY128 == 1 || $CONFIG_FB_RADEON == 1 || $CONFIG_FB_CYBER2000 == 1 || $CONFIG_FB_PVR2 == 1 || $CONFIG_FB_VOODOO1 == 1 || $CONFIG_FB_NEOMAGIC == 1)} then {write_tristate $cfg $autocfg CONFIG_FBCON_CFB24 $CONSTANT_Y [list $notmod] 2 }
	if {($CONFIG_VT == 1) && ($CONFIG_EXPERIMENTAL == 1) && ($CONFIG_FB == 1) && ($CONFIG_FBCON_ADVANCED != 1) && ($CONFIG_FB_ATY != 1 && $CONFIG_FB_VIRTUAL != 1 && $CONFIG_FB_CLGEN != 1 && $CONFIG_FB_VESA != 1 && $CONFIG_FB_MATROX != 1 && $CONFIG_FB_PM2 != 1 && $CONFIG_FB_ATY128 != 1 && $CONFIG_FB_RADEON != 1 && $CONFIG_FB_CYBER2000 != 1 && $CONFIG_FB_PVR2 != 1 && $CONFIG_FB_VOODOO1 != 1 && $CONFIG_FB_NEOMAGIC != 1) && ($CONFIG_FB_ATY == 2 || $CONFIG_FB_VIRTUAL == 2 || $CONFIG_FB_CLGEN == 2 || $CONFIG_FB_VESA == 2 || $CONFIG_FB_MATROX == 2 || $CONFIG_FB_PM2 == 2 || $CONFIG_FB_ATY128 == 2 || $CONFIG_FB_RADEON == 2 || $CONFIG_FB_CYBER2000 == 2 || $CONFIG_FB_PVR2 == 2 || $CONFIG_FB_VOODOO1 == 2 || $CONFIG_FB_NEOMAGIC == 1)} then {write_tristate $cfg $autocfg CONFIG_FBCON_CFB24 $CONSTANT_M [list $notmod] 2 }
	global CONFIG_FB_FM2
	if {($CONFIG_VT == 1) && ($CONFIG_EXPERIMENTAL == 1) && ($CONFIG_FB == 1) && ($CONFIG_FBCON_ADVANCED != 1) && ($CONFIG_FB_ATARI == 1 || $CONFIG_FB_ATY == 1 || $CONFIG_FB_VESA == 1 || $CONFIG_FB_VIRTUAL == 1 || $CONFIG_FB_CONTROL == 1 || $CONFIG_FB_CLGEN == 1 || $CONFIG_FB_TGA == 1 || $CONFIG_FB_PLATINUM == 1 || $CONFIG_FB_MATROX == 1 || $CONFIG_FB_PM2 == 1 || $CONFIG_FB_PM3 == 1 || $CONFIG_FB_RIVA == 1 || $CONFIG_FB_ATY128 == 1 || $CONFIG_FB_FM2 == 1 || $CONFIG_FB_SGIVW == 1 || $CONFIG_FB_RADEON == 1 || $CONFIG_FB_PVR2 == 1 || $CONFIG_FB_3DFX == 1 || $CONFIG_FB_SIS == 1 || $CONFIG_FB_VOODOO1 == 1)} then {write_tristate $cfg $autocfg CONFIG_FBCON_CFB32 $CONSTANT_Y [list $notmod] 2 }
	if {($CONFIG_VT == 1) && ($CONFIG_EXPERIMENTAL == 1) && ($CONFIG_FB == 1) && ($CONFIG_FBCON_ADVANCED != 1) && ($CONFIG_FB_ATARI != 1 && $CONFIG_FB_ATY != 1 && $CONFIG_FB_VESA != 1 && $CONFIG_FB_VIRTUAL != 1 && $CONFIG_FB_CONTROL != 1 && $CONFIG_FB_CLGEN != 1 && $CONFIG_FB_TGA != 1 && $CONFIG_FB_PLATINUM != 1 && $CONFIG_FB_MATROX != 1 && $CONFIG_FB_PM2 != 1 && $CONFIG_FB_PM3 != 1 && $CONFIG_FB_RIVA != 1 && $CONFIG_FB_ATY128 != 1 && $CONFIG_FB_FM2 != 1 && $CONFIG_FB_SGIVW != 1 && $CONFIG_FB_RADEON != 1 && $CONFIG_FB_PVR2 != 1 && $CONFIG_FB_3DFX != 1 && $CONFIG_FB_SIS != 1 && $CONFIG_FB_VOODOO1 != 1) && ($CONFIG_FB_ATARI == 2 || $CONFIG_FB_ATY == 2 || $CONFIG_FB_VESA == 2 || $CONFIG_FB_VIRTUAL == 2 || $CONFIG_FB_CONTROL == 2 || $CONFIG_FB_CLGEN == 2 || $CONFIG_FB_TGA == 2 || $CONFIG_FB_PLATINUM == 2 || $CONFIG_FB_MATROX == 2 || $CONFIG_FB_PM2 == 2 || $CONFIG_FB_PM3 == 2 || $CONFIG_FB_RIVA == 2 || $CONFIG_FB_ATY128 == 2 || $CONFIG_FB_3DFX == 2 || $CONFIG_FB_RADEON == 2 || $CONFIG_FB_SGIVW == 2 || $CONFIG_FB_SIS == 2 || $CONFIG_FB_PVR2 == 2 || $CONFIG_FB_VOODOO1 == 2)} then {write_tristate $cfg $autocfg CONFIG_FBCON_CFB32 $CONSTANT_M [list $notmod] 2 }
	if {($CONFIG_VT == 1) && ($CONFIG_EXPERIMENTAL == 1) && ($CONFIG_FB == 1) && ($CONFIG_FBCON_ADVANCED != 1) && ($CONFIG_FB_AMIGA == 1)} then {write_tristate $cfg $autocfg CONFIG_FBCON_AFB $CONSTANT_Y [list $notmod] 2 }
	if {($CONFIG_VT == 1) && ($CONFIG_EXPERIMENTAL == 1) && ($CONFIG_FB == 1) && ($CONFIG_FBCON_ADVANCED != 1) && ($CONFIG_FB_AMIGA == 1)} then {write_tristate $cfg $autocfg CONFIG_FBCON_ILBM $CONSTANT_Y [list $notmod] 2 }
	if {($CONFIG_VT == 1) && ($CONFIG_EXPERIMENTAL == 1) && ($CONFIG_FB == 1) && ($CONFIG_FBCON_ADVANCED != 1) && ($CONFIG_FB_AMIGA != 1) && ($CONFIG_FB_AMIGA == 2)} then {write_tristate $cfg $autocfg CONFIG_FBCON_AFB $CONSTANT_M [list $notmod] 2 }
	if {($CONFIG_VT == 1) && ($CONFIG_EXPERIMENTAL == 1) && ($CONFIG_FB == 1) && ($CONFIG_FBCON_ADVANCED != 1) && ($CONFIG_FB_AMIGA != 1) && ($CONFIG_FB_AMIGA == 2)} then {write_tristate $cfg $autocfg CONFIG_FBCON_ILBM $CONSTANT_M [list $notmod] 2 }
	if {($CONFIG_VT == 1) && ($CONFIG_EXPERIMENTAL == 1) && ($CONFIG_FB == 1) && ($CONFIG_FBCON_ADVANCED != 1) && ($CONFIG_FB_ATARI == 1)} then {write_tristate $cfg $autocfg CONFIG_FBCON_IPLAN2P2 $CONSTANT_Y [list $notmod] 2 }
	if {($CONFIG_VT == 1) && ($CONFIG_EXPERIMENTAL == 1) && ($CONFIG_FB == 1) && ($CONFIG_FBCON_ADVANCED != 1) && ($CONFIG_FB_ATARI == 1)} then {write_tristate $cfg $autocfg CONFIG_FBCON_IPLAN2P4 $CONSTANT_Y [list $notmod] 2 }
	if {($CONFIG_VT == 1) && ($CONFIG_EXPERIMENTAL == 1) && ($CONFIG_FB == 1) && ($CONFIG_FBCON_ADVANCED != 1) && ($CONFIG_FB_ATARI == 1)} then {write_tristate $cfg $autocfg CONFIG_FBCON_IPLAN2P8 $CONSTANT_Y [list $notmod] 2 }
	if {($CONFIG_VT == 1) && ($CONFIG_EXPERIMENTAL == 1) && ($CONFIG_FB == 1) && ($CONFIG_FBCON_ADVANCED != 1) && ($CONFIG_FB_ATARI != 1) && ($CONFIG_FB_ATARI == 2)} then {write_tristate $cfg $autocfg CONFIG_FBCON_IPLAN2P2 $CONSTANT_M [list $notmod] 2 }
	if {($CONFIG_VT == 1) && ($CONFIG_EXPERIMENTAL == 1) && ($CONFIG_FB == 1) && ($CONFIG_FBCON_ADVANCED != 1) && ($CONFIG_FB_ATARI != 1) && ($CONFIG_FB_ATARI == 2)} then {write_tristate $cfg $autocfg CONFIG_FBCON_IPLAN2P4 $CONSTANT_M [list $notmod] 2 }
	if {($CONFIG_VT == 1) && ($CONFIG_EXPERIMENTAL == 1) && ($CONFIG_FB == 1) && ($CONFIG_FBCON_ADVANCED != 1) && ($CONFIG_FB_ATARI != 1) && ($CONFIG_FB_ATARI == 2)} then {write_tristate $cfg $autocfg CONFIG_FBCON_IPLAN2P8 $CONSTANT_M [list $notmod] 2 }
	if {($CONFIG_VT == 1) && ($CONFIG_EXPERIMENTAL == 1) && ($CONFIG_FB == 1) && ($CONFIG_FBCON_ADVANCED != 1) && ($CONFIG_FB_MAC == 1 || $CONFIG_FB_VIRTUAL == 1)} then {write_tristate $cfg $autocfg CONFIG_FBCON_MAC $CONSTANT_Y [list $notmod] 2 }
	if {($CONFIG_VT == 1) && ($CONFIG_EXPERIMENTAL == 1) && ($CONFIG_FB == 1) && ($CONFIG_FBCON_ADVANCED != 1) && ($CONFIG_FB_MAC != 1 && $CONFIG_FB_VIRTUAL != 1) && ($CONFIG_FB_MAC == 2 || $CONFIG_FB_VIRTUAL == 2)} then {write_tristate $cfg $autocfg CONFIG_FBCON_MAC $CONSTANT_M [list $notmod] 2 }
	if {($CONFIG_VT == 1) && ($CONFIG_EXPERIMENTAL == 1) && ($CONFIG_FB == 1) && ($CONFIG_FBCON_ADVANCED != 1) && ($CONFIG_FB_VGA16 == 1)} then {write_tristate $cfg $autocfg CONFIG_FBCON_VGA_PLANES $CONSTANT_Y [list $notmod] 2 }
	if {($CONFIG_VT == 1) && ($CONFIG_EXPERIMENTAL == 1) && ($CONFIG_FB == 1) && ($CONFIG_FBCON_ADVANCED != 1) && ($CONFIG_FB_VGA16 != 1) && ($CONFIG_FB_VGA16 == 2)} then {write_tristate $cfg $autocfg CONFIG_FBCON_VGA_PLANES $CONSTANT_M [list $notmod] 2 }
	if {($CONFIG_VT == 1) && ($CONFIG_EXPERIMENTAL == 1) && ($CONFIG_FB == 1) && ($CONFIG_FBCON_ADVANCED != 1) && ($CONFIG_FB_HGA == 1)} then {write_tristate $cfg $autocfg CONFIG_FBCON_HGA $CONSTANT_Y [list $notmod] 2 }
	if {($CONFIG_VT == 1) && ($CONFIG_EXPERIMENTAL == 1) && ($CONFIG_FB == 1) && ($CONFIG_FBCON_ADVANCED != 1) && ($CONFIG_FB_HGA != 1) && ($CONFIG_FB_HGA == 2)} then {write_tristate $cfg $autocfg CONFIG_FBCON_HGA $CONSTANT_M [list $notmod] 2 }
	global CONFIG_FBCON_STI
	global CONFIG_FB_STI
	if {($CONFIG_VT == 1) && ($CONFIG_EXPERIMENTAL == 1) && ($CONFIG_FB == 1) && ($CONFIG_FBCON_ADVANCED != 1) && ($CONFIG_FB_STI == 1)} then {write_tristate $cfg $autocfg CONFIG_FBCON_STI $CONSTANT_Y [list $notmod] 2 }
	global CONFIG_FBCON_FONTWIDTH8_ONLY
	if {($CONFIG_VT == 1) && ($CONFIG_EXPERIMENTAL == 1) && ($CONFIG_FB == 1)} then {write_tristate $cfg $autocfg CONFIG_FBCON_FONTWIDTH8_ONLY $CONFIG_FBCON_FONTWIDTH8_ONLY [list $notmod] 2 }
	global CONFIG_FBCON_FONTS
	if {($CONFIG_VT == 1) && ($CONFIG_EXPERIMENTAL == 1) && ($CONFIG_FB == 1)} then {write_tristate $cfg $autocfg CONFIG_FBCON_FONTS $CONFIG_FBCON_FONTS [list $notmod] 2 }
	global CONFIG_FONT_8x8
	if {($CONFIG_VT == 1) && ($CONFIG_EXPERIMENTAL == 1) && ($CONFIG_FB == 1) && ($CONFIG_FBCON_FONTS == 1)} then {write_tristate $cfg $autocfg CONFIG_FONT_8x8 $CONFIG_FONT_8x8 [list $notmod] 2 }
	global CONFIG_FONT_8x16
	if {($CONFIG_VT == 1) && ($CONFIG_EXPERIMENTAL == 1) && ($CONFIG_FB == 1) && ($CONFIG_FBCON_FONTS == 1)} then {write_tristate $cfg $autocfg CONFIG_FONT_8x16 $CONFIG_FONT_8x16 [list $notmod] 2 }
	global CONFIG_FONT_SUN8x16
	if {($CONFIG_VT == 1) && ($CONFIG_EXPERIMENTAL == 1) && ($CONFIG_FB == 1) && ($CONFIG_FBCON_FONTS == 1)} then {write_tristate $cfg $autocfg CONFIG_FONT_SUN8x16 $CONFIG_FONT_SUN8x16 [list $notmod] 2 }
	global CONFIG_FONT_SUN12x22
	if {($CONFIG_VT == 1) && ($CONFIG_EXPERIMENTAL == 1) && ($CONFIG_FB == 1) && ($CONFIG_FBCON_FONTS == 1) && ($CONFIG_FBCON_FONTWIDTH8_ONLY == 0)} then {write_tristate $cfg $autocfg CONFIG_FONT_SUN12x22 $CONFIG_FONT_SUN12x22 [list $notmod] 2 }
	global CONFIG_FONT_6x11
	if {($CONFIG_VT == 1) && ($CONFIG_EXPERIMENTAL == 1) && ($CONFIG_FB == 1) && ($CONFIG_FBCON_FONTS == 1) && ($CONFIG_FBCON_FONTWIDTH8_ONLY == 0)} then {write_tristate $cfg $autocfg CONFIG_FONT_6x11 $CONFIG_FONT_6x11 [list $notmod] 2 }
	global CONFIG_FONT_PEARL_8x8
	if {($CONFIG_VT == 1) && ($CONFIG_EXPERIMENTAL == 1) && ($CONFIG_FB == 1) && ($CONFIG_FBCON_FONTS == 1)} then {write_tristate $cfg $autocfg CONFIG_FONT_PEARL_8x8 $CONFIG_FONT_PEARL_8x8 [list $notmod] 2 }
	global CONFIG_FONT_ACORN_8x8
	if {($CONFIG_VT == 1) && ($CONFIG_EXPERIMENTAL == 1) && ($CONFIG_FB == 1) && ($CONFIG_FBCON_FONTS == 1)} then {write_tristate $cfg $autocfg CONFIG_FONT_ACORN_8x8 $CONFIG_FONT_ACORN_8x8 [list $notmod] 2 }
	if {($CONFIG_VT == 1) && ($CONFIG_EXPERIMENTAL == 1) && ($CONFIG_FB == 1) && ($CONFIG_FBCON_FONTS != 1)} then {write_tristate $cfg $autocfg CONFIG_FONT_8x8 $CONSTANT_Y [list $notmod] 2 }
	if {($CONFIG_VT == 1) && ($CONFIG_EXPERIMENTAL == 1) && ($CONFIG_FB == 1) && ($CONFIG_FBCON_FONTS != 1)} then {write_tristate $cfg $autocfg CONFIG_FONT_8x16 $CONSTANT_Y [list $notmod] 2 }
	write_comment $cfg $autocfg "Sound"
	global CONFIG_SOUND
	write_tristate $cfg $autocfg CONFIG_SOUND $CONFIG_SOUND [list $notmod] 2
	global CONFIG_SOUND_BT878
	if {($CONFIG_SOUND != 0) && ($CONFIG_SOUND == 1 || $CONFIG_SOUND == 2 || $CONFIG_SOUND == 4)} then {write_tristate $cfg $autocfg CONFIG_SOUND_BT878 $CONFIG_SOUND_BT878 [list $CONFIG_SOUND] 2 }
	global CONFIG_SOUND_CMPCI
	if {($CONFIG_SOUND != 0) && ($CONFIG_SOUND == 1 || $CONFIG_SOUND == 2 || $CONFIG_SOUND == 4) && ($CONFIG_PCI == 1 || $CONFIG_PCI == 2 || $CONFIG_PCI == 4)} then {write_tristate $cfg $autocfg CONFIG_SOUND_CMPCI $CONFIG_SOUND_CMPCI [list $CONFIG_SOUND $CONFIG_PCI] 2 }
	global CONFIG_SOUND_CMPCI_FM
	if {($CONFIG_SOUND != 0) && ($CONFIG_SOUND_CMPCI == 1 || $CONFIG_SOUND_CMPCI == 2)} then {write_tristate $cfg $autocfg CONFIG_SOUND_CMPCI_FM $CONFIG_SOUND_CMPCI_FM [list $notmod] 2 }
	global CONFIG_SOUND_CMPCI_FMIO
	if {($CONFIG_SOUND != 0) && ($CONFIG_SOUND_CMPCI == 1 || $CONFIG_SOUND_CMPCI == 2) && ($CONFIG_SOUND_CMPCI_FM == 1)} then {write_hex $cfg $autocfg CONFIG_SOUND_CMPCI_FMIO 388 $notmod }
	if {($CONFIG_SOUND != 0) && ($CONFIG_SOUND_CMPCI == 1 || $CONFIG_SOUND_CMPCI == 2) && ($CONFIG_SOUND_CMPCI_FM == 1)} then {write_hex $cfg $autocfg CONFIG_SOUND_CMPCI_FMIO $CONFIG_SOUND_CMPCI_FMIO $notmod }
	global CONFIG_SOUND_CMPCI_MIDI
	if {($CONFIG_SOUND != 0) && ($CONFIG_SOUND_CMPCI == 1 || $CONFIG_SOUND_CMPCI == 2)} then {write_tristate $cfg $autocfg CONFIG_SOUND_CMPCI_MIDI $CONFIG_SOUND_CMPCI_MIDI [list $notmod] 2 }
	global CONFIG_SOUND_CMPCI_MPUIO
	if {($CONFIG_SOUND != 0) && ($CONFIG_SOUND_CMPCI == 1 || $CONFIG_SOUND_CMPCI == 2) && ($CONFIG_SOUND_CMPCI_MIDI == 1)} then {write_hex $cfg $autocfg CONFIG_SOUND_CMPCI_MPUIO $CONFIG_SOUND_CMPCI_MPUIO $notmod }
	global CONFIG_SOUND_CMPCI_JOYSTICK
	if {($CONFIG_SOUND != 0) && ($CONFIG_SOUND_CMPCI == 1 || $CONFIG_SOUND_CMPCI == 2)} then {write_tristate $cfg $autocfg CONFIG_SOUND_CMPCI_JOYSTICK $CONFIG_SOUND_CMPCI_JOYSTICK [list $notmod] 2 }
	global CONFIG_SOUND_CMPCI_CM8738
	if {($CONFIG_SOUND != 0) && ($CONFIG_SOUND_CMPCI == 1 || $CONFIG_SOUND_CMPCI == 2)} then {write_tristate $cfg $autocfg CONFIG_SOUND_CMPCI_CM8738 $CONFIG_SOUND_CMPCI_CM8738 [list $notmod] 2 }
	global CONFIG_SOUND_CMPCI_SPDIFINVERSE
	if {($CONFIG_SOUND != 0) && ($CONFIG_SOUND_CMPCI == 1 || $CONFIG_SOUND_CMPCI == 2) && ($CONFIG_SOUND_CMPCI_CM8738 == 1)} then {write_tristate $cfg $autocfg CONFIG_SOUND_CMPCI_SPDIFINVERSE $CONFIG_SOUND_CMPCI_SPDIFINVERSE [list $notmod] 2 }
	global CONFIG_SOUND_CMPCI_SPDIFLOOP
	if {($CONFIG_SOUND != 0) && ($CONFIG_SOUND_CMPCI == 1 || $CONFIG_SOUND_CMPCI == 2) && ($CONFIG_SOUND_CMPCI_CM8738 == 1)} then {write_tristate $cfg $autocfg CONFIG_SOUND_CMPCI_SPDIFLOOP $CONFIG_SOUND_CMPCI_SPDIFLOOP [list $notmod] 2 }
	global CONFIG_SOUND_CMPCI_SPEAKERS
	if {($CONFIG_SOUND != 0) && ($CONFIG_SOUND_CMPCI == 1 || $CONFIG_SOUND_CMPCI == 2) && ($CONFIG_SOUND_CMPCI_CM8738 == 1)} then {write_int $cfg $autocfg CONFIG_SOUND_CMPCI_SPEAKERS $CONFIG_SOUND_CMPCI_SPEAKERS $notmod }
	global CONFIG_SOUND_CMPCI_LINE_REAR
	if {($CONFIG_SOUND != 0) && ($CONFIG_SOUND_CMPCI == 1 || $CONFIG_SOUND_CMPCI == 2) && ($CONFIG_SOUND_CMPCI_CM8738 == 1) && ($CONFIG_SOUND_CMPCI_SPEAKERS != "2")} then {write_tristate $cfg $autocfg CONFIG_SOUND_CMPCI_LINE_REAR $CONFIG_SOUND_CMPCI_LINE_REAR [list $notmod] 2 }
	global CONFIG_SOUND_CMPCI_LINE_BASS
	if {($CONFIG_SOUND != 0) && ($CONFIG_SOUND_CMPCI == 1 || $CONFIG_SOUND_CMPCI == 2) && ($CONFIG_SOUND_CMPCI_CM8738 == 1) && ($CONFIG_SOUND_CMPCI_SPEAKERS != "2")} then {write_tristate $cfg $autocfg CONFIG_SOUND_CMPCI_LINE_BASS $CONFIG_SOUND_CMPCI_LINE_BASS [list $notmod] 2 }
	global CONFIG_SOUND_EMU10K1
	if {($CONFIG_SOUND != 0) && ($CONFIG_SOUND == 1 || $CONFIG_SOUND == 2 || $CONFIG_SOUND == 4) && ($CONFIG_PCI == 1 || $CONFIG_PCI == 2 || $CONFIG_PCI == 4)} then {write_tristate $cfg $autocfg CONFIG_SOUND_EMU10K1 $CONFIG_SOUND_EMU10K1 [list $CONFIG_SOUND $CONFIG_PCI] 2 }
	global CONFIG_MIDI_EMU10K1
	if {($CONFIG_SOUND != 0) && ($CONFIG_SOUND_EMU10K1 == 1 || $CONFIG_SOUND_EMU10K1 == 2 || $CONFIG_SOUND_EMU10K1 == 4) && ($CONFIG_EXPERIMENTAL == 1 || $CONFIG_EXPERIMENTAL == 2 || $CONFIG_EXPERIMENTAL == 4)} then {write_tristate $cfg $autocfg CONFIG_MIDI_EMU10K1 $CONFIG_MIDI_EMU10K1 [list $CONFIG_SOUND_EMU10K1 $CONFIG_EXPERIMENTAL] 1 }
	global CONFIG_SOUND_FUSION
	if {($CONFIG_SOUND != 0) && ($CONFIG_SOUND == 1 || $CONFIG_SOUND == 2 || $CONFIG_SOUND == 4)} then {write_tristate $cfg $autocfg CONFIG_SOUND_FUSION $CONFIG_SOUND_FUSION [list $CONFIG_SOUND] 2 }
	global CONFIG_SOUND_CS4281
	if {($CONFIG_SOUND != 0) && ($CONFIG_SOUND == 1 || $CONFIG_SOUND == 2 || $CONFIG_SOUND == 4)} then {write_tristate $cfg $autocfg CONFIG_SOUND_CS4281 $CONFIG_SOUND_CS4281 [list $CONFIG_SOUND] 2 }
	global CONFIG_SOUND_ES1370
	if {($CONFIG_SOUND != 0) && ($CONFIG_SOUND == 1 || $CONFIG_SOUND == 2 || $CONFIG_SOUND == 4) && ($CONFIG_PCI == 1 || $CONFIG_PCI == 2 || $CONFIG_PCI == 4)} then {write_tristate $cfg $autocfg CONFIG_SOUND_ES1370 $CONFIG_SOUND_ES1370 [list $CONFIG_SOUND $CONFIG_PCI] 2 }
	global CONFIG_SOUND_ES1371
	if {($CONFIG_SOUND != 0) && ($CONFIG_SOUND == 1 || $CONFIG_SOUND == 2 || $CONFIG_SOUND == 4) && ($CONFIG_PCI == 1 || $CONFIG_PCI == 2 || $CONFIG_PCI == 4)} then {write_tristate $cfg $autocfg CONFIG_SOUND_ES1371 $CONFIG_SOUND_ES1371 [list $CONFIG_SOUND $CONFIG_PCI] 2 }
	global CONFIG_SOUND_ESSSOLO1
	if {($CONFIG_SOUND != 0) && ($CONFIG_SOUND == 1 || $CONFIG_SOUND == 2 || $CONFIG_SOUND == 4)} then {write_tristate $cfg $autocfg CONFIG_SOUND_ESSSOLO1 $CONFIG_SOUND_ESSSOLO1 [list $CONFIG_SOUND] 2 }
	global CONFIG_SOUND_MAESTRO
	if {($CONFIG_SOUND != 0) && ($CONFIG_SOUND == 1 || $CONFIG_SOUND == 2 || $CONFIG_SOUND == 4)} then {write_tristate $cfg $autocfg CONFIG_SOUND_MAESTRO $CONFIG_SOUND_MAESTRO [list $CONFIG_SOUND] 2 }
	global CONFIG_SOUND_MAESTRO3
	if {($CONFIG_SOUND != 0) && ($CONFIG_SOUND == 1 || $CONFIG_SOUND == 2 || $CONFIG_SOUND == 4) && ($CONFIG_PCI == 1 || $CONFIG_PCI == 2 || $CONFIG_PCI == 4) && ($CONFIG_EXPERIMENTAL == 1 || $CONFIG_EXPERIMENTAL == 2 || $CONFIG_EXPERIMENTAL == 4)} then {write_tristate $cfg $autocfg CONFIG_SOUND_MAESTRO3 $CONFIG_SOUND_MAESTRO3 [list $CONFIG_SOUND $CONFIG_PCI $CONFIG_EXPERIMENTAL] 2 }
	global CONFIG_SOUND_ICH
	if {($CONFIG_SOUND != 0) && ($CONFIG_PCI == 1 || $CONFIG_PCI == 2 || $CONFIG_PCI == 4)} then {write_tristate $cfg $autocfg CONFIG_SOUND_ICH $CONFIG_SOUND_ICH [list $CONFIG_PCI] 2 }
	global CONFIG_SOUND_RME96XX
	if {($CONFIG_SOUND != 0) && ($CONFIG_SOUND == 1 || $CONFIG_SOUND == 2 || $CONFIG_SOUND == 4) && ($CONFIG_PCI == 1 || $CONFIG_PCI == 2 || $CONFIG_PCI == 4) && ($CONFIG_EXPERIMENTAL == 1 || $CONFIG_EXPERIMENTAL == 2 || $CONFIG_EXPERIMENTAL == 4)} then {write_tristate $cfg $autocfg CONFIG_SOUND_RME96XX $CONFIG_SOUND_RME96XX [list $CONFIG_SOUND $CONFIG_PCI $CONFIG_EXPERIMENTAL] 2 }
	global CONFIG_SOUND_SONICVIBES
	if {($CONFIG_SOUND != 0) && ($CONFIG_SOUND == 1 || $CONFIG_SOUND == 2 || $CONFIG_SOUND == 4)} then {write_tristate $cfg $autocfg CONFIG_SOUND_SONICVIBES $CONFIG_SOUND_SONICVIBES [list $CONFIG_SOUND] 2 }
	global CONFIG_SOUND_TRIDENT
	if {($CONFIG_SOUND != 0) && ($CONFIG_SOUND == 1 || $CONFIG_SOUND == 2 || $CONFIG_SOUND == 4)} then {write_tristate $cfg $autocfg CONFIG_SOUND_TRIDENT $CONFIG_SOUND_TRIDENT [list $CONFIG_SOUND] 2 }
	global CONFIG_SOUND_MSNDCLAS
	if {($CONFIG_SOUND != 0) && ($CONFIG_SOUND == 1 || $CONFIG_SOUND == 2 || $CONFIG_SOUND == 4)} then {write_tristate $cfg $autocfg CONFIG_SOUND_MSNDCLAS $CONFIG_SOUND_MSNDCLAS [list $CONFIG_SOUND] 2 }
	if {($CONFIG_SOUND != 0) && ($CONFIG_SOUND_MSNDCLAS == 1 || $CONFIG_SOUND_MSNDCLAS == 2) && ($CONFIG_SOUND_MSNDCLAS == 1)} then {write_comment $cfg $autocfg "  Compiled-in MSND Classic support requires firmware during compilation."}
	global CONFIG_MSNDCLAS_HAVE_BOOT
	if {($CONFIG_SOUND != 0) && ($CONFIG_SOUND_MSNDCLAS == 1 || $CONFIG_SOUND_MSNDCLAS == 2) && ($CONFIG_SOUND_MSNDCLAS == 1)} then {write_tristate $cfg $autocfg CONFIG_MSNDCLAS_HAVE_BOOT $CONSTANT_Y [list $notmod] 2 }
	if {($CONFIG_SOUND != 0) && ($CONFIG_SOUND_MSNDCLAS == 1 || $CONFIG_SOUND_MSNDCLAS == 2) && ($CONFIG_SOUND_MSNDCLAS != 1)} then {write_tristate $cfg $autocfg CONFIG_MSNDCLAS_HAVE_BOOT $CONSTANT_N [list $notmod] 2 }
	global CONFIG_MSNDCLAS_INIT_FILE
	if {($CONFIG_SOUND != 0) && ($CONFIG_SOUND_MSNDCLAS == 1 || $CONFIG_SOUND_MSNDCLAS == 2)} then {write_string $cfg $autocfg CONFIG_MSNDCLAS_INIT_FILE "$CONFIG_MSNDCLAS_INIT_FILE" $notmod }
	global CONFIG_MSNDCLAS_PERM_FILE
	if {($CONFIG_SOUND != 0) && ($CONFIG_SOUND_MSNDCLAS == 1 || $CONFIG_SOUND_MSNDCLAS == 2)} then {write_string $cfg $autocfg CONFIG_MSNDCLAS_PERM_FILE "$CONFIG_MSNDCLAS_PERM_FILE" $notmod }
	global CONFIG_MSNDCLAS_IRQ
	if {($CONFIG_SOUND != 0) && ($CONFIG_SOUND_MSNDCLAS == 1)} then {write_int $cfg $autocfg CONFIG_MSNDCLAS_IRQ $CONFIG_MSNDCLAS_IRQ $notmod }
	global CONFIG_MSNDCLAS_MEM
	if {($CONFIG_SOUND != 0) && ($CONFIG_SOUND_MSNDCLAS == 1)} then {write_hex $cfg $autocfg CONFIG_MSNDCLAS_MEM $CONFIG_MSNDCLAS_MEM $notmod }
	global CONFIG_MSNDCLAS_IO
	if {($CONFIG_SOUND != 0) && ($CONFIG_SOUND_MSNDCLAS == 1)} then {write_hex $cfg $autocfg CONFIG_MSNDCLAS_IO $CONFIG_MSNDCLAS_IO $notmod }
	global CONFIG_SOUND_MSNDPIN
	if {($CONFIG_SOUND != 0) && ($CONFIG_SOUND == 1 || $CONFIG_SOUND == 2 || $CONFIG_SOUND == 4)} then {write_tristate $cfg $autocfg CONFIG_SOUND_MSNDPIN $CONFIG_SOUND_MSNDPIN [list $CONFIG_SOUND] 2 }
	if {($CONFIG_SOUND != 0) && ($CONFIG_SOUND_MSNDPIN == 1 || $CONFIG_SOUND_MSNDPIN == 2) && ($CONFIG_SOUND_MSNDPIN == 1)} then {write_comment $cfg $autocfg "Compiled-in MSND Pinnacle support requires firmware during compilation."}
	global CONFIG_MSNDPIN_HAVE_BOOT
	if {($CONFIG_SOUND != 0) && ($CONFIG_SOUND_MSNDPIN == 1 || $CONFIG_SOUND_MSNDPIN == 2) && ($CONFIG_SOUND_MSNDPIN == 1)} then {write_tristate $cfg $autocfg CONFIG_MSNDPIN_HAVE_BOOT $CONSTANT_Y [list $notmod] 2 }
	if {($CONFIG_SOUND != 0) && ($CONFIG_SOUND_MSNDPIN == 1 || $CONFIG_SOUND_MSNDPIN == 2) && ($CONFIG_SOUND_MSNDPIN != 1)} then {write_tristate $cfg $autocfg CONFIG_MSNDPIN_HAVE_BOOT $CONSTANT_N [list $notmod] 2 }
	global CONFIG_MSNDPIN_INIT_FILE
	if {($CONFIG_SOUND != 0) && ($CONFIG_SOUND_MSNDPIN == 1 || $CONFIG_SOUND_MSNDPIN == 2)} then {write_string $cfg $autocfg CONFIG_MSNDPIN_INIT_FILE "$CONFIG_MSNDPIN_INIT_FILE" $notmod }
	global CONFIG_MSNDPIN_PERM_FILE
	if {($CONFIG_SOUND != 0) && ($CONFIG_SOUND_MSNDPIN == 1 || $CONFIG_SOUND_MSNDPIN == 2)} then {write_string $cfg $autocfg CONFIG_MSNDPIN_PERM_FILE "$CONFIG_MSNDPIN_PERM_FILE" $notmod }
	global CONFIG_MSNDPIN_IRQ
	if {($CONFIG_SOUND != 0) && ($CONFIG_SOUND_MSNDPIN == 1)} then {write_int $cfg $autocfg CONFIG_MSNDPIN_IRQ $CONFIG_MSNDPIN_IRQ $notmod }
	global CONFIG_MSNDPIN_MEM
	if {($CONFIG_SOUND != 0) && ($CONFIG_SOUND_MSNDPIN == 1)} then {write_hex $cfg $autocfg CONFIG_MSNDPIN_MEM $CONFIG_MSNDPIN_MEM $notmod }
	global CONFIG_MSNDPIN_IO
	if {($CONFIG_SOUND != 0) && ($CONFIG_SOUND_MSNDPIN == 1)} then {write_hex $cfg $autocfg CONFIG_MSNDPIN_IO $CONFIG_MSNDPIN_IO $notmod }
	global CONFIG_MSNDPIN_DIGITAL
	if {($CONFIG_SOUND != 0) && ($CONFIG_SOUND_MSNDPIN == 1)} then {write_tristate $cfg $autocfg CONFIG_MSNDPIN_DIGITAL $CONFIG_MSNDPIN_DIGITAL [list $notmod] 2 }
	global CONFIG_MSNDPIN_NONPNP
	if {($CONFIG_SOUND != 0) && ($CONFIG_SOUND_MSNDPIN == 1)} then {write_tristate $cfg $autocfg CONFIG_MSNDPIN_NONPNP $CONFIG_MSNDPIN_NONPNP [list $notmod] 2 }
	if {($CONFIG_SOUND != 0) && ($CONFIG_SOUND_MSNDPIN == 1) && ($CONFIG_MSNDPIN_NONPNP == 1)} then {write_comment $cfg $autocfg "MSND Pinnacle DSP section will be configured to above parameters."}
	global CONFIG_MSNDPIN_CFG
	if {($CONFIG_SOUND != 0) && ($CONFIG_SOUND_MSNDPIN == 1) && ($CONFIG_MSNDPIN_NONPNP == 1)} then {write_hex $cfg $autocfg CONFIG_MSNDPIN_CFG $CONFIG_MSNDPIN_CFG $notmod }
	if {($CONFIG_SOUND != 0) && ($CONFIG_SOUND_MSNDPIN == 1) && ($CONFIG_MSNDPIN_NONPNP == 1)} then {write_comment $cfg $autocfg "Pinnacle-specific Device Configuration (0 disables)"}
	global CONFIG_MSNDPIN_MPU_IO
	if {($CONFIG_SOUND != 0) && ($CONFIG_SOUND_MSNDPIN == 1) && ($CONFIG_MSNDPIN_NONPNP == 1)} then {write_hex $cfg $autocfg CONFIG_MSNDPIN_MPU_IO $CONFIG_MSNDPIN_MPU_IO $notmod }
	global CONFIG_MSNDPIN_MPU_IRQ
	if {($CONFIG_SOUND != 0) && ($CONFIG_SOUND_MSNDPIN == 1) && ($CONFIG_MSNDPIN_NONPNP == 1)} then {write_int $cfg $autocfg CONFIG_MSNDPIN_MPU_IRQ $CONFIG_MSNDPIN_MPU_IRQ $notmod }
	global CONFIG_MSNDPIN_IDE_IO0
	if {($CONFIG_SOUND != 0) && ($CONFIG_SOUND_MSNDPIN == 1) && ($CONFIG_MSNDPIN_NONPNP == 1)} then {write_hex $cfg $autocfg CONFIG_MSNDPIN_IDE_IO0 $CONFIG_MSNDPIN_IDE_IO0 $notmod }
	global CONFIG_MSNDPIN_IDE_IO1
	if {($CONFIG_SOUND != 0) && ($CONFIG_SOUND_MSNDPIN == 1) && ($CONFIG_MSNDPIN_NONPNP == 1)} then {write_hex $cfg $autocfg CONFIG_MSNDPIN_IDE_IO1 $CONFIG_MSNDPIN_IDE_IO1 $notmod }
	global CONFIG_MSNDPIN_IDE_IRQ
	if {($CONFIG_SOUND != 0) && ($CONFIG_SOUND_MSNDPIN == 1) && ($CONFIG_MSNDPIN_NONPNP == 1)} then {write_int $cfg $autocfg CONFIG_MSNDPIN_IDE_IRQ $CONFIG_MSNDPIN_IDE_IRQ $notmod }
	global CONFIG_MSNDPIN_JOYSTICK_IO
	if {($CONFIG_SOUND != 0) && ($CONFIG_SOUND_MSNDPIN == 1) && ($CONFIG_MSNDPIN_NONPNP == 1)} then {write_hex $cfg $autocfg CONFIG_MSNDPIN_JOYSTICK_IO $CONFIG_MSNDPIN_JOYSTICK_IO $notmod }
	global CONFIG_MSND_FIFOSIZE
	if {($CONFIG_SOUND != 0) && ($CONFIG_SOUND_MSNDPIN == 1 || $CONFIG_SOUND_MSNDCLAS == 1)} then {write_int $cfg $autocfg CONFIG_MSND_FIFOSIZE $CONFIG_MSND_FIFOSIZE $notmod }
	global CONFIG_SOUND_VIA82CXXX
	if {($CONFIG_SOUND != 0) && ($CONFIG_PCI == 1 || $CONFIG_PCI == 2 || $CONFIG_PCI == 4)} then {write_tristate $cfg $autocfg CONFIG_SOUND_VIA82CXXX $CONFIG_SOUND_VIA82CXXX [list $CONFIG_PCI] 2 }
	global CONFIG_MIDI_VIA82CXXX
	if {($CONFIG_SOUND != 0) && ($CONFIG_SOUND_VIA82CXXX == 1 || $CONFIG_SOUND_VIA82CXXX == 2 || $CONFIG_SOUND_VIA82CXXX == 4)} then {write_tristate $cfg $autocfg CONFIG_MIDI_VIA82CXXX $CONFIG_MIDI_VIA82CXXX [list $CONFIG_SOUND_VIA82CXXX] 1 }
	global CONFIG_SOUND_OSS
	if {($CONFIG_SOUND != 0) && ($CONFIG_SOUND == 1 || $CONFIG_SOUND == 2 || $CONFIG_SOUND == 4)} then {write_tristate $cfg $autocfg CONFIG_SOUND_OSS $CONFIG_SOUND_OSS [list $CONFIG_SOUND] 2 }
	global CONFIG_SOUND_TRACEINIT
	if {($CONFIG_SOUND != 0) && ($CONFIG_SOUND_OSS == 1 || $CONFIG_SOUND_OSS == 2)} then {write_tristate $cfg $autocfg CONFIG_SOUND_TRACEINIT $CONFIG_SOUND_TRACEINIT [list $notmod] 2 }
	global CONFIG_SOUND_DMAP
	if {($CONFIG_SOUND != 0) && ($CONFIG_SOUND_OSS == 1 || $CONFIG_SOUND_OSS == 2)} then {write_tristate $cfg $autocfg CONFIG_SOUND_DMAP $CONFIG_SOUND_DMAP [list $notmod] 2 }
	global CONFIG_SOUND_AD1816
	if {($CONFIG_SOUND != 0) && ($CONFIG_SOUND_OSS == 1 || $CONFIG_SOUND_OSS == 2) && ($CONFIG_EXPERIMENTAL == 1) && ($CONFIG_SOUND_OSS == 1 || $CONFIG_SOUND_OSS == 2 || $CONFIG_SOUND_OSS == 4)} then {write_tristate $cfg $autocfg CONFIG_SOUND_AD1816 $CONFIG_SOUND_AD1816 [list $CONFIG_SOUND_OSS] 2 }
	global CONFIG_SOUND_SGALAXY
	if {($CONFIG_SOUND != 0) && ($CONFIG_SOUND_OSS == 1 || $CONFIG_SOUND_OSS == 2) && ($CONFIG_SOUND_OSS == 1 || $CONFIG_SOUND_OSS == 2 || $CONFIG_SOUND_OSS == 4)} then {write_tristate $cfg $autocfg CONFIG_SOUND_SGALAXY $CONFIG_SOUND_SGALAXY [list $CONFIG_SOUND_OSS] 2 }
	global CONFIG_SOUND_ADLIB
	if {($CONFIG_SOUND != 0) && ($CONFIG_SOUND_OSS == 1 || $CONFIG_SOUND_OSS == 2) && ($CONFIG_SOUND_OSS == 1 || $CONFIG_SOUND_OSS == 2 || $CONFIG_SOUND_OSS == 4)} then {write_tristate $cfg $autocfg CONFIG_SOUND_ADLIB $CONFIG_SOUND_ADLIB [list $CONFIG_SOUND_OSS] 2 }
	if {($CONFIG_SOUND != 0) && ($CONFIG_SOUND_OSS == 1 || $CONFIG_SOUND_OSS == 2) && ($CONFIG_SOUND_OSS == 1 || $CONFIG_SOUND_OSS == 2 || $CONFIG_SOUND_OSS == 4)} then {write_tristate $cfg $autocfg CONFIG_SOUND_ACI_MIXER $CONFIG_SOUND_ACI_MIXER [list $CONFIG_SOUND_OSS] 2 }
	global CONFIG_SOUND_CS4232
	if {($CONFIG_SOUND != 0) && ($CONFIG_SOUND_OSS == 1 || $CONFIG_SOUND_OSS == 2) && ($CONFIG_SOUND_OSS == 1 || $CONFIG_SOUND_OSS == 2 || $CONFIG_SOUND_OSS == 4)} then {write_tristate $cfg $autocfg CONFIG_SOUND_CS4232 $CONFIG_SOUND_CS4232 [list $CONFIG_SOUND_OSS] 2 }
	global CONFIG_SOUND_SSCAPE
	if {($CONFIG_SOUND != 0) && ($CONFIG_SOUND_OSS == 1 || $CONFIG_SOUND_OSS == 2) && ($CONFIG_SOUND_OSS == 1 || $CONFIG_SOUND_OSS == 2 || $CONFIG_SOUND_OSS == 4)} then {write_tristate $cfg $autocfg CONFIG_SOUND_SSCAPE $CONFIG_SOUND_SSCAPE [list $CONFIG_SOUND_OSS] 2 }
	global CONFIG_SOUND_GUS
	if {($CONFIG_SOUND != 0) && ($CONFIG_SOUND_OSS == 1 || $CONFIG_SOUND_OSS == 2) && ($CONFIG_SOUND_OSS == 1 || $CONFIG_SOUND_OSS == 2 || $CONFIG_SOUND_OSS == 4)} then {write_tristate $cfg $autocfg CONFIG_SOUND_GUS $CONFIG_SOUND_GUS [list $CONFIG_SOUND_OSS] 2 }
	global CONFIG_SOUND_GUS16
	if {($CONFIG_SOUND != 0) && ($CONFIG_SOUND_OSS == 1 || $CONFIG_SOUND_OSS == 2) && ($CONFIG_SOUND_GUS != 0)} then {write_tristate $cfg $autocfg CONFIG_SOUND_GUS16 $CONFIG_SOUND_GUS16 [list $notmod] 2 }
	global CONFIG_SOUND_GUSMAX
	if {($CONFIG_SOUND != 0) && ($CONFIG_SOUND_OSS == 1 || $CONFIG_SOUND_OSS == 2) && ($CONFIG_SOUND_GUS != 0)} then {write_tristate $cfg $autocfg CONFIG_SOUND_GUSMAX $CONFIG_SOUND_GUSMAX [list $notmod] 2 }
	global CONFIG_SOUND_VMIDI
	if {($CONFIG_SOUND != 0) && ($CONFIG_SOUND_OSS == 1 || $CONFIG_SOUND_OSS == 2) && ($CONFIG_SOUND_OSS == 1 || $CONFIG_SOUND_OSS == 2 || $CONFIG_SOUND_OSS == 4)} then {write_tristate $cfg $autocfg CONFIG_SOUND_VMIDI $CONFIG_SOUND_VMIDI [list $CONFIG_SOUND_OSS] 2 }
	global CONFIG_SOUND_TRIX
	if {($CONFIG_SOUND != 0) && ($CONFIG_SOUND_OSS == 1 || $CONFIG_SOUND_OSS == 2) && ($CONFIG_SOUND_OSS == 1 || $CONFIG_SOUND_OSS == 2 || $CONFIG_SOUND_OSS == 4)} then {write_tristate $cfg $autocfg CONFIG_SOUND_TRIX $CONFIG_SOUND_TRIX [list $CONFIG_SOUND_OSS] 2 }
	global CONFIG_TRIX_HAVE_BOOT
	if {($CONFIG_SOUND != 0) && ($CONFIG_SOUND_OSS == 1 || $CONFIG_SOUND_OSS == 2) && ($CONFIG_SOUND_TRIX == 1)} then {write_tristate $cfg $autocfg CONFIG_TRIX_HAVE_BOOT $CONFIG_TRIX_HAVE_BOOT [list $notmod] 2 }
	global CONFIG_TRIX_BOOT_FILE
	if {($CONFIG_SOUND != 0) && ($CONFIG_SOUND_OSS == 1 || $CONFIG_SOUND_OSS == 2) && ($CONFIG_SOUND_TRIX == 1) && ($CONFIG_TRIX_HAVE_BOOT == 1)} then {write_string $cfg $autocfg CONFIG_TRIX_BOOT_FILE "$CONFIG_TRIX_BOOT_FILE" $notmod }
	global CONFIG_SOUND_MSS
	if {($CONFIG_SOUND != 0) && ($CONFIG_SOUND_OSS == 1 || $CONFIG_SOUND_OSS == 2) && ($CONFIG_SOUND_OSS == 1 || $CONFIG_SOUND_OSS == 2 || $CONFIG_SOUND_OSS == 4)} then {write_tristate $cfg $autocfg CONFIG_SOUND_MSS $CONFIG_SOUND_MSS [list $CONFIG_SOUND_OSS] 2 }
	global CONFIG_SOUND_MPU401
	if {($CONFIG_SOUND != 0) && ($CONFIG_SOUND_OSS == 1 || $CONFIG_SOUND_OSS == 2) && ($CONFIG_SOUND_OSS == 1 || $CONFIG_SOUND_OSS == 2 || $CONFIG_SOUND_OSS == 4)} then {write_tristate $cfg $autocfg CONFIG_SOUND_MPU401 $CONFIG_SOUND_MPU401 [list $CONFIG_SOUND_OSS] 2 }
	global CONFIG_SOUND_NM256
	if {($CONFIG_SOUND != 0) && ($CONFIG_SOUND_OSS == 1 || $CONFIG_SOUND_OSS == 2) && ($CONFIG_SOUND_OSS == 1 || $CONFIG_SOUND_OSS == 2 || $CONFIG_&<DQ_e}���������sr.cgcc2_compiled.sr_templatesr_detectsr_initsr_finishsr_attachsr_detachsr_init_commandsr_releasesr_dopssr_opensr_media_changesr_packetrw_intrsr_sizessr_find_queuesr_scatter_padloadmech.1218sr_registeredsr_blocksizessr_hardsizesinit_srexit_sr__initcall_init_sr__exitcall_exit_srscsi_CDssr_set_blocklengthsr_drive_statussr_tray_movesr_lock_doorsr_select_speedsr_get_last_sessionsr_get_mcnsr_resetsr_audio_ioctlsr_dev_ioctlscsi_ioctlsr_cd_checkprint_sensescsi_io_completionscsi_mallocscsi_freeprintkirq_statblk_devsr_bdopscdrom_opencdrom_releasecdrom_ioctlcdrom_media_changedcheck_disk_changescsi_block_when_processing_errorsget_sectorsizepanicscsi_allocate_requestscsi_release_requestscsi_wait_reqget_capabilitiessr_do_ioctlcdrom_number_of_slotsdevfs_register_blkdevkmallocblksize_sizehardsect_sizekfreedevfs_unregister_blkdevblk_sizesr_vendor_initsprintfdevfs_registerregister_cdromread_aheadinvalidate_deviceunregister_cdromscsi_register_modulescsi_unregister_module

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01.01cdroms/cdrom%dcdromsrsr: ran out of mem for scatter pad
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cartridge changerchangerpop-uptraycaddy<3>sr: out of memory.
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ifeq (-D__KERNEL__ -I/home/me/kernel/linux/include -Wall -Wstrict-prototypes -Wno-trigraphs -O2 -fomit-frame-pointer -fno-strict-aliasing -fno-common -pipe -mpreferred-stack-boundary=2 -march=i686,$(strip $(subst $(comma),:,$(CFLAGS) $(EXTRA_CFLAGS) $(CFLAGS_sr.o))))
FILES_FLAGS_UP_TO_DATE += sr.o
endif
/* $Id: VISbzero.S,v 1.11 2001/03/15 08:51:24 anton Exp $
 * VISbzero.S: High speed clear operations utilizing the UltraSparc
 *        Visual Instruction Set.
 *
 * Copyright (C) 1997 David S. Miller (davem@caip.rutgers.edu)
 * Copyright (C) 1996, 1997, 1999 Jakub Jelinek (jj@ultra.linux.cz)
 */

#include "VIS.h"

#ifdef __KERNEL__
#include <asm/visasm.h>

#define EXN(x,y,a,b,z) 				\
98: 	x,y;					\
	.section .fixup;			\
	.align	4;				\
99:	ba	VISbzerofixup_ret##z;		\
	 a, b, %o0;				\
	.section __ex_table;			\
	.align	4;				\
	.word	98b, 99b;			\
	.text;					\
	.align	4;
#define EXC(x,y,a,b,c...) 			\
98: 	x,y;					\
	.section .fixup;			\
	.align	4;				\
99:	c;					\
	ba	VISbzerofixup_ret0;		\
	 a, b, %o0;				\
	.section __ex_table;			\
	.align	4;				\
	.word	98b, 99b;			\
	.text;					\
	.align	4;
#define EXO1(x,y) 				\
98: 	x,y;					\
	.section __ex_table;			\
	.align	4;				\
	.word	98b, VISbzerofixup_reto1;	\
	.text;					\
	.align	4;
#define EX(x,y,a,b) EXN(x,y,a,b,0)
#define EX1(x,y,a,b) EXN(x,y,a,b,1)
#define EX2(x,y,a,b) EXN(x,y,a,b,2)
#define EXT(start,end,handler) 			\
	.section __ex_table;			\
	.align	4;				\
	.word	start, 0, end, handler;		\
	.text;					\
	.align	4
#else
#define EX(x,y,a,b)		x,y
#define EX1(x,y,a,b)		x,y
#define EX2(x,y,a,b)		x,y
#define EXC(x,y,a,b,c...)	x,y
#define EXO1(x,y)		x,y
#define EXT(a,b,c)
#endif

#define ZERO_BLOCKS(base, offset, source)			\
	STX	source, [base - offset - 0x38] ASINORMAL;	\
	STX	source, [base - offset - 0x30] ASINORMAL;	\
	STX	source, [base - offset - 0x28] ASINORMAL;	\
	STX	source, [base - offset - 0x20] ASINORMAL;	\
	STX	source, [base - offset - 0x18] ASINORMAL;	\
	STX	source, [base - offset - 0x10] ASINORMAL;	\
	STX	source, [base - offset - 0x08] ASINORMAL;	\
	STX	source, [base - offset - 0x00] ASINORMAL;

#ifdef __KERNEL__
#define RETL	clr %o0
#else
#define RETL	mov %g3, %o0
#endif

	/* Well, bzero is a lot easier to get right than bcopy... */
#ifdef __KERNEL__
	.section	__ex_table,#alloc
	.section	.fixup,#alloc,#execinstr
#endif
	.text
	.align		32
#ifdef __KERNEL__
	.globl		__bzero_begin
__bzero_begin:
	.globl		__bzero, __bzero_noasi
__bzero_noasi:
	rd		%asi, %g5
	ba,pt		%xcc, __bzero+12
	 mov		%g5, %o4
__bzero:
	rd		%asi, %g5
	wr		%g0, ASI_P, %asi		! LSU	Group
	mov		ASI_P, %o4
#else
	.globl		bzero
bzero_private:
bzero:
#ifndef REGS_64BIT
	srl		%o1, 0, %o1
#endif
	mov		%o0, %g3
#endif
	cmp		%o1, 7
	bleu,pn		%xcc, 17f
	 andcc		%o0, 3, %o2
	be,a,pt		%xcc, 4f
	 andcc		%o0, 4, %g0
	cmp		%o2, 3
	be,pn		%xcc, 2f
	 EXO1(STB	%g0, [%o0 + 0x00] ASINORMAL)
	cmp		%o2, 2
	be,pt		%xcc, 2f
	 EX(STB		%g0, [%o0 + 0x01] ASINORMAL, sub %o1, 1)
	EX(STB		%g0, [%o0 + 0x02] ASINORMAL, sub %o1, 2)
2:	sub		%o2, 4, %o2
	sub		%o0, %o2, %o0
	add		%o1, %o2, %o1
	andcc		%o0, 4, %g0
4:	be,pt		%xcc, 2f
	 cmp		%o1, 128
	EXO1(STW	%g0, [%o0] ASINORMAL)
	sub		%o1, 4, %o1
	add		%o0, 4, %o0
2:	blu,pn		%xcc, 9f
	 andcc		%o0, 0x38, %o2
	be,pn		%icc, 6f
	 mov		64, %o5
	andcc		%o0, 8, %g0
	be,pn		%icc, 1f
	 sub		%o5, %o2, %o5
	EX(STX		%g0, [%o0] ASINORMAL, sub %o1, 0)
	add		%o0, 8, %o0
1:	andcc		%o5, 16, %g0
	be,pn		%icc, 1f
	 sub		%o1, %o5, %o1
	EX1(STX		%g0, [%o0] ASINORMAL, add %g0, 0)
	EX1(STX		%g0, [%o0 + 8] ASINORMAL, sub %g0, 8)
	add		%o0, 16, %o0
1:	andcc		%o5, 32, %g0
	be,pn		%icc, 7f
	 andncc		%o1, 0x3f, %o3
	EX(STX		%g0, [%o0] ASINORMAL, add %o1, 32)
	EX(STX		%g0, [%o0 + 8] ASINORMAL, add %o1, 24)
	EX(STX		%g0, [%o0 + 16] ASINORMAL, add %o1, 16)
	EX(STX		%g0, [%o0 + 24] ASINORMAL, add %o1, 8)
	add		%o0, 32, %o0
6:	andncc		%o1, 0x3f, %o3
7:	be,pn		%xcc, 9f
#ifdef __KERNEL__
	 or		%o4, ASI_BLK_OR, %g7 
	wr		%g7, %g0, %asi
	VISEntryHalf
#else
	 wr		%g0, ASI_BLK_P, %asi
#endif
	membar		#StoreLoad | #StoreStore | #LoadStore
	fzero		%f0
	andcc		%o3, 0xc0, %o2
	and		%o1, 0x3f, %o1
	fzero		%f2
	andn		%o3, 0xff, %o3
	faddd		%f0, %f2, %f4
	fmuld		%f0, %f2, %f6
	cmp		%o2, 64
	faddd		%f0, %f2, %f8
	fmuld		%f0, %f2, %f10
	faddd		%f0, %f2, %f12
	brz,pn		%o2, 10f
	 fmuld		%f0, %f2, %f14
	be,pn		%icc, 2f
	 EXC(STBLK	%f0, [%o0 + 0x00] ASIBLK, add %o3, %o2, add %o2, %o1, %o2)
	cmp		%o2, 128
	be,pn		%icc, 2f
	 EXC(STBLK	%f0, [%o0 + 0x40] ASIBLK, add %o3, %o2, add %o2, %o1, %o2; sub %o2, 64, %o2)
	EXC(STBLK	%f0, [%o0 + 0x80] ASIBLK, add %o3, %o2, add %o2, %o1, %o2; sub %o2, 128, %o2)
2:	brz,pn		%o3, 12f
	 add		%o0, %o2, %o0
10:	EX(STBLK	%f0, [%o0 + 0x00] ASIBLK, add %o3, %o1)
	EXC(STBLK	%f0, [%o0 + 0x40] ASIBLK, add %o3, %o1, sub %o1, 64, %o1)
	EXC(STBLK	%f0, [%o0 + 0x80] ASIBLK, add %o3, %o1, sub %o1, 128, %o1)
	EXC(STBLK	%f0, [%o0 + 0xc0] ASIBLK, add %o3, %o1, sub %o1, 192, %o1)
11:	subcc		%o3, 256, %o3
	bne,pt		%xcc, 10b
	 add		%o0, 256, %o0
12:
#ifdef __KERNEL__
	VISExitHalf
	wr		%o4, 0x0, %asi
#else
#ifndef REGS_64BIT
	wr		%g0, FPRS_FEF, %fprs
#endif
#endif
	membar		#StoreLoad | #StoreStore
9:	andcc		%o1, 0xf8, %o2
	be,pn		%xcc, 13f
	 andcc		%o1, 7, %o1
#ifdef __KERNEL__
14:	sethi		%hi(13f), %o4
	srl		%o2, 1, %o3
	sub		%o4, %o3, %o4
	jmpl		%o4 + %lo(13f), %g0
	 add		%o0, %o2, %o0
#else
14:	rd		%pc, %o4
	srl		%o2, 1, %o3
	sub		%o4, %o3, %o4
	jmpl		%o4 + (13f - 14b), %g0
	 add		%o0, %o2, %o0
#endif
12:	ZERO_BLOCKS(%o0, 0xc8, %g0)
	ZERO_BLOCKS(%o0, 0x88, %g0)
	ZERO_BLOCKS(%o0, 0x48, %g0)
	ZERO_BLOCKS(%o0, 0x08, %g0)
	EXT(12b,13f,VISbzerofixup_zb)
13:	be,pn		%xcc, 8f
	 andcc		%o1, 4, %g0
	be,pn		%xcc, 1f
	 andcc		%o1, 2, %g0
	EX(STW		%g0, [%o0] ASINORMAL, and %o1, 7)
	add		%o0, 4, %o0
1:	be,pn		%xcc, 1f
	 andcc		%o1, 1, %g0
	EX(STH		%g0, [%o0] ASINORMAL, and %o1, 3)
	add		%o0, 2, %o0
1:	bne,a,pn	%xcc, 8f
	 EX(STB		%g0, [%o0] ASINORMAL, add %g0, 1)
8:
#ifdef __KERNEL__
	wr		%g5, %g0, %asi
#endif
	retl
	 RETL
17:	be,pn		%xcc, 13b
	 orcc		%o1, 0, %g0
	be,pn		%xcc, 0f
8:	 add		%o0, 1, %o0
	subcc		%o1, 1, %o1
	bne,pt		%xcc, 8b
	 EX(STB		%g0, [%o0 - 1] ASINORMAL, add %o1, 1)
0:
#ifdef __KERNEL__
	wr		%g5, %g0, %asi
#endif
	retl
	 RETL

#ifdef __KERNEL__
	.section	.fixup
	.align		4
VISbzerofixup_reto1:
	mov		%o1, %o0
VISbzerofixup_ret0:
	wr		%g5, %g0, %asi
	retl
	 wr		%g0, 0, %fprs
VISbzerofixup_ret1:
	and		%o5, 0x30, %o5
	add		%o5, %o1, %o5
	ba,pt		%xcc, VISbzerofixup_ret0
	 add		%o0, %o5, %o0
VISbzerofixup_ret2:
	and		%o5, 0x20, %o5
	add		%o5, %o1, %o5
	ba,pt		%xcc, VISbzerofixup_ret0
	 add		%o0, %o5, %o0
VISbzerofixup_zb:
	andcc		%o1, 7, %o1
	sll		%g2, 3, %g2
	add		%o1, 256, %o1
	ba,pt		%xcc, VISbzerofixup_ret0
	 sub		%o1, %g2, %o0
#endif
	.globl		__bzero_end
__bzero_end:
/* $Id: VIScopy.S,v 1.26 2001/09/27 04:36:24 kanoj Exp $
 * VIScopy.S: High speed copy operations utilizing the UltraSparc
 *            Visual Instruction Set.
 *
 * Copyright (C) 1997 David S. Miller (davem@caip.rutgers.edu)
 * Copyright (C) 1996, 1997, 1998, 1999 Jakub Jelinek (jj@ultra.linux.cz)
 */

#include "VIS.h"

	/* VIS code can be used for numerous copy/set operation variants.
	 * It can be made to work in the kernel, one single instance,
	 * for all of memcpy, copy_to_user, and copy_from_user by setting
	 * the ASI src/dest globals correctly.  Furthermore it can
	 * be used for kernel-->kernel page copies as well, a hook label
	 * is put in here just for this purpose.
	 *
	 * For userland, compiling this without __KERNEL__ defined makes
	 * it work just fine as a generic libc bcopy and memcpy.
	 * If for userland it is compiled with a 32bit gcc (but you need
	 * -Wa,-Av9a for as), the code will just rely on lower 32bits of
	 * IEU registers, if you compile it with 64bit gcc (ie. define
	 * __sparc_v9__), the code will use full 64bit.
	 */
	 
#ifdef __KERNEL__

#include <asm/visasm.h>
#include <asm/asm_offsets.h>

#define FPU_CLEAN_RETL								\
	ldub		[%g6 + AOFF_task_thread + AOFF_thread_current_ds], %o1;	\
	VISExit									\
	clr		%o0;							\
	retl;									\
	 wr		%o1, %g0, %asi;
#define FPU_RETL								\
	ldub		[%g6 + AOFF_task_thread + AOFF_thread_current_ds], %o1;	\
	VISExit									\
	clr		%o0;							\
	retl;									\
	 wr		%o1, %g0, %asi;
#define NORMAL_RETL								\
	ldub		[%g6 + AOFF_task_thread + AOFF_thread_current_ds], %o1;	\
	clr		%o0;							\
	retl;									\
	 wr		%o1, %g0, %asi;
#define EX(x,y,a,b) 				\
98: 	x,y;					\
	.section .fixup;			\
	.align	4;				\
99:	ba	VIScopyfixup_ret;		\
	 a, b, %o1;				\
	.section __ex_table;			\
	.align	4;				\
	.word	98b, 99b;			\
	.text;					\
	.align	4;
#define EX2(x,y,c,d,e,a,b) 			\
98: 	x,y;					\
	.section .fixup;			\
	.align	4;				\
99:	c, d, e;				\
	ba	VIScopyfixup_ret;		\
	 a, b, %o1;				\
	.section __ex_table;			\
	.align	4;				\
	.word	98b, 99b;			\
	.text;					\
	.align	4;
#define EXO2(x,y) 				\
98: 	x,y;					\
	.section __ex_table;			\
	.align	4;				\
	.word	98b, VIScopyfixup_reto2;	\
	.text;					\
	.align	4;
#define EXVISN(x,y,n) 				\
98: 	x,y;					\
	.section __ex_table;			\
	.align	4;				\
	.word	98b, VIScopyfixup_vis##n;	\
	.text;					\
	.align	4;
#define EXT(start,end,handler) 			\
	.section __ex_table;			\
	.align	4;				\
	.word	start, 0, end, handler;		\
	.text;					\
	.align	4;
#else
#ifdef REGS_64BIT
#define FPU_CLEAN_RETL				\
	retl;					\
	 mov	%g6, %o0;
#define FPU_RETL				\
	retl;					\
	 mov	%g6, %o0;
#else
#define FPU_CLEAN_RETL				\
	wr	%g0, FPRS_FEF, %fprs;		\
	retl;					\
	 mov	%g6, %o0;
#define FPU_RETL				\
	wr	%g0, FPRS_FEF, %fprs;		\
	retl;					\
	 mov	%g6, %o0;
#endif
#define NORMAL_RETL	\
	retl;		\
	 mov	%g6, %o0;
#define EX(x,y,a,b)		x,y
#define EX2(x,y,c,d,e,a,b)	x,y
#define EXO2(x,y)		x,y
#define EXVISN(x,y,n)		x,y
#define EXT(a,b,c)
#endif
#define EXVIS(x,y) EXVISN(x,y,0)
#define EXVIS1(x,y) EXVISN(x,y,1)
#define EXVIS2(x,y) EXVISN(x,y,2)
#define EXVIS3(x,y) EXVISN(x,y,3)
#define EXVIS4(x,y) EXVISN(x,y,4)
#define EXVIS5(x,y) EXVISN(x,y,5)

#define FREG_FROB(f1, f2, f3, f4, f5, f6, f7, f8, f9)		\
	faligndata		%f1, %f2, %f48;			\
	faligndata		%f2, %f3, %f50;			\
	faligndata		%f3, %f4, %f52;			\
	faligndata		%f4, %f5, %f54;			\
	faligndata		%f5, %f6, %f56;			\
	faligndata		%f6, %f7, %f58;			\
	faligndata		%f7, %f8, %f60;			\
	faligndata		%f8, %f9, %f62;

#define MAIN_LOOP_CHUNK(src, dest, fdest, fsrc, len, jmptgt)	\
	EXVIS(LDBLK		[%src] ASIBLK, %fdest);		\
	ASI_SETDST_BLK						\
	EXVIS2(STBLK		%fsrc, [%dest] ASIBLK);		\
	add			%src, 0x40, %src;		\
	subcc			%len, 0x40, %len;		\
	be,pn			%xcc, jmptgt;			\
	 add			%dest, 0x40, %dest;		\
	ASI_SETSRC_BLK

#define LOOP_CHUNK1(src, dest, len, branch_dest)		\
	MAIN_LOOP_CHUNK(src, dest, f0,  f48, len, branch_dest)
#define LOOP_CHUNK2(src, dest, len, branch_dest)		\
	MAIN_LOOP_CHUNK(src, dest, f16, f48, len, branch_dest)
#define LOOP_CHUNK3(src, dest, len, branch_dest)		\
	MAIN_LOOP_CHUNK(src, dest, f32, f48, len, branch_dest)

#define STORE_SYNC(dest, fsrc)					\
	EXVIS(STBLK		%fsrc, [%dest] ASIBLK);		\
	add			%dest, 0x40, %dest;

#ifdef __KERNEL__
#define STORE_JUMP(dest, fsrc, target)				\
	srl			asi_dest, 3, %g5;		\
	EXVIS3(STBLK		%fsrc, [%dest] ASIBLK);		\
	xor		       asi_dest, ASI_BLK_XOR1, asi_dest;\
	add			%dest, 0x40, %dest;		\
	xor			asi_dest, %g5, asi_dest;	\
	ba,pt			%xcc, target;
#else
#define STORE_JUMP(dest, fsrc, target)				\
	EXVIS3(STBLK		%fsrc, [%dest] ASIBLK);		\
	add			%dest, 0x40, %dest;		\
	ba,pt			%xcc, target;
#endif

#ifndef __KERNEL__
#define VISLOOP_PAD nop; nop; nop; nop; \
		    nop; nop; nop; nop; \
		    nop; nop; nop; nop; \
		    nop; nop; nop;
#else
#define VISLOOP_PAD
#endif

#define FINISH_VISCHUNK(dest, f0, f1, left)			\
	ASI_SETDST_NOBLK					\
	subcc			%left, 8, %left;		\
	bl,pn			%xcc, vis_out;			\
	 faligndata		%f0, %f1, %f48;			\
	EXVIS4(STDF		%f48, [%dest] ASINORMAL);	\
	add			%dest, 8, %dest;

#define UNEVEN_VISCHUNK_LAST(dest, f0, f1, left)		\
	subcc			%left, 8, %left;		\
	bl,pn			%xcc, vis_out;			\
	 fsrc1			%f0, %f1;
#define UNEVEN_VISCHUNK(dest, f0, f1, left)			\
	UNEVEN_VISCHUNK_LAST(dest, f0, f1, left)		\
	ba,a,pt			%xcc, vis_out_slk;

	/* Macros for non-VIS memcpy code. */
#ifdef REGS_64BIT

#define MOVE_BIGCHUNK(src, dst, offset, t0, t1, t2, t3)			\
	ASI_SETSRC_NOBLK						\
	LDX			[%src + offset + 0x00] ASINORMAL, %t0; 	\
	LDX			[%src + offset + 0x08] ASINORMAL, %t1; 	\
	LDX			[%src + offset + 0x10] ASINORMAL, %t2; 	\
	LDX			[%src + offset + 0x18] ASINORMAL, %t3; 	\
	ASI_SETDST_NOBLK						\
	STW			%t0, [%dst + offset + 0x04] ASINORMAL; 	\
	srlx			%t0, 32, %t0;				\
	STW			%t0, [%dst + offset + 0x00] ASINORMAL; 	\
	STW			%t1, [%dst + offset + 0x0c] ASINORMAL; 	\
	srlx			%t1, 32, %t1;				\
	STW			%t1, [%dst + offset + 0x08] ASINORMAL; 	\
	STW			%t2, [%dst + offset + 0x14] ASINORMAL; 	\
	srlx			%t2, 32, %t2;				\
	STW			%t2, [%dst + offset + 0x10] ASINORMAL; 	\
	STW			%t3, [%dst + offset + 0x1c] ASINORMAL;	\
	srlx			%t3, 32, %t3;				\
	STW			%t3, [%dst + offset + 0x18] ASINORMAL;

#define MOVE_BIGALIGNCHUNK(src, dst, offset, t0, t1, t2, t3)		\
	ASI_SETSRC_NOBLK						\
	LDX			[%src + offset + 0x00] ASINORMAL, %t0; 	\
	LDX			[%src + offset + 0x08] ASINORMAL, %t1; 	\
	LDX			[%src + offset + 0x10] ASINORMAL, %t2; 	\
	LDX			[%src + offset + 0x18] ASINORMAL, %t3; 	\
	ASI_SETDST_NOBLK						\
	STX			%t0, [%dst + offset + 0x00] ASINORMAL; 	\
	STX			%t1, [%dst + offset + 0x08] ASINORMAL; 	\
	STX			%t2, [%dst + offset + 0x10] ASINORMAL; 	\
	STX			%t3, [%dst + offset + 0x18] ASINORMAL; 	\
	ASI_SETSRC_NOBLK						\
	LDX			[%src + offset + 0x20] ASINORMAL, %t0; 	\
	LDX			[%src + offset + 0x28] ASINORMAL, %t1; 	\
	LDX			[%src + offset + 0x30] ASINORMAL, %t2; 	\
	LDX			[%src + offset + 0x38] ASINORMAL, %t3; 	\
	ASI_SETDST_NOBLK						\
	STX			%t0, [%dst + offset + 0x20] ASINORMAL; 	\
	STX			%t1, [%dst + offset + 0x28] ASINORMAL; 	\
	STX			%t2, [%dst + offset + 0x30] ASINORMAL; 	\
	STX			%t3, [%dst + offset + 0x38] ASINORMAL;

#define MOVE_LASTCHUNK(src, dst, offset, t0, t1, t2, t3)		\
	ASI_SETSRC_NOBLK						\
	LDX			[%src - offset - 0x10] ASINORMAL, %t0;	\
	LDX			[%src - offset - 0x08] ASINORMAL, %t1; 	\
	ASI_SETDST_NOBLK						\
	STW			%t0, [%dst - offset - 0x0c] ASINORMAL; 	\
	srlx			%t0, 32, %t2;				\
	STW			%t2, [%dst - offset - 0x10] ASINORMAL; 	\
	STW			%t1, [%dst - offset - 0x04] ASINORMAL; 	\
	srlx			%t1, 32, %t3;				\
	STW			%t3, [%dst - offset - 0x08] ASINORMAL;

#define MOVE_LASTALIGNCHUNK(src, dst, offset, t0, t1)			\
	ASI_SETSRC_NOBLK						\
	LDX			[%src - offset - 0x10] ASINORMAL, %t0; 	\
	LDX			[%src - offset - 0x08] ASINORMAL, %t1; 	\
	ASI_SETDST_NOBLK						\
	STX			%t0, [%dst - offset - 0x10] ASINORMAL; 	\
	STX			%t1, [%dst - offset - 0x08] ASINORMAL;

#else /* !REGS_64BIT */

#define MOVE_BIGCHUNK(src, dst, offset, t0, t1, t2, t3)			\
	lduw			[%src + offset + 0x00], %t0; 		\
	lduw			[%src + offset + 0x04], %t1; 		\
	lduw			[%src + offset + 0x08], %t2; 		\
	lduw			[%src + offset + 0x0c], %t3; 		\
	stw			%t0, [%dst + offset + 0x00]; 		\
	stw			%t1, [%dst + offset + 0x04]; 		\
	stw			%t2, [%dst + offset + 0x08]; 		\
	stw			%t3, [%dst + offset + 0x0c]; 		\
	lduw			[%src + offset + 0x10], %t0; 		\
	lduw			[%src + offset + 0x14], %t1; 		\
	lduw			[%src + offset + 0x18], %t2; 		\
	lduw			[%src + offset + 0x1c], %t3; 		\
	stw			%t0, [%dst + offset + 0x10]; 		\
	stw			%t1, [%dst + offset + 0x14]; 		\
	stw			%t2, [%dst + offset + 0x18]; 		\
	stw			%t3, [%dst + offset + 0x1c];

#define MOVE_LASTCHUNK(src, dst, offset, t0, t1, t2, t3)		\
	lduw			[%src - offset - 0x10], %t0; 		\
	lduw			[%src - offset - 0x0c], %t1; 		\
	lduw			[%src - offset - 0x08], %t2; 		\
	lduw			[%src - offset - 0x04], %t3; 		\
	stw			%t0, [%dst - offset - 0x10]; 		\
	stw			%t1, [%dst - offset - 0x0c]; 		\
	stw			%t2, [%dst - offset - 0x08]; 		\
	stw			%t3, [%dst - offset - 0x04];

#endif /* !REGS_64BIT */

#ifdef __KERNEL__
		.section	__ex_table,#alloc
		.section	.fixup,#alloc,#execinstr
#endif

		.text
		.align			32
		.globl			memcpy
		.type			memcpy,@function

		.globl			bcopy
		.type			bcopy,@function

#ifdef __KERNEL__
		.globl			__memcpy_begin
__memcpy_begin:

		.globl			__memcpy
		.type			__memcpy,@function

memcpy_private:
__memcpy:
memcpy:		mov		ASI_P, asi_src			! IEU0	Group
		brnz,pt		%o2, __memcpy_entry		! CTI
		 mov		ASI_P, asi_dest			! IEU1
		retl
		 clr		%o0

		.align			32
		.globl			__copy_from_user
		.type			__copy_from_user,@function
__copy_from_user:rd		%asi, asi_src			! IEU0	Group
		brnz,pt		%o2, __memcpy_entry		! CTI
		 mov		ASI_P, asi_dest			! IEU1

		.globl			__copy_to_user
		.type			__copy_to_user,@function
__copy_to_user:	mov		ASI_P, asi_src			! IEU0	Group
		brnz,pt		%o2, __memcpy_entry		! CTI
		 rd		%asi, asi_dest			! IEU1
		retl						! CTI	Group
		 clr		%o0				! IEU0	Group

		.globl			__copy_in_user
		.type			__copy_in_user,@function
__copy_in_user:	rd		%asi, asi_src			! IEU0	Group
		brnz,pt		%o2, __memcpy_entry		! CTI
		 mov		asi_src, asi_dest		! IEU1
		retl						! CTI	Group
		 clr		%o0				! IEU0	Group
#endif

bcopy:		or		%o0, 0, %g3			! IEU0	Group
		addcc		%o1, 0, %o0			! IEU1
		brgez,pt	%o2, memcpy_private		! CTI
		 or		%g3, 0, %o1			! IEU0	Group
		retl						! CTI	Group brk forced
		 clr		%o0				! IEU0


#ifdef __KERNEL__
#define BRANCH_ALWAYS	0x10680000
#define NOP		0x01000000
#define ULTRA3_DO_PATCH(OLD, NEW)	\
	sethi	%hi(NEW), %g1; \
	or	%g1, %lo(NEW), %g1; \
	sethi	%hi(OLD), %g2; \
	or	%g2, %lo(OLD), %g2; \
	sub	%g1, %g2, %g1; \
	sethi	%hi(BRANCH_ALWAYS), %g3; \
	srl	%g1, 2, %g1; \
	or	%g3, %lo(BRANCH_ALWAYS), %g3; \
	or	%g3, %g1, %g3; \
	stw	%g3, [%g2]; \
	sethi	%hi(NOP), %g3; \
	or	%g3, %lo(NOP), %g3; \
	stw	%g3, [%g2 + 0x4]; \
	flush	%g2;

	.globl	cheetah_patch_copyops
cheetah_patch_copyops:
	ULTRA3_DO_PATCH(memcpy, U3memcpy)
	ULTRA3_DO_PATCH(__copy_from_user, U3copy_from_user)
	ULTRA3_DO_PATCH(__copy_to_user, U3copy_to_user)
	ULTRA3_DO_PATCH(__copy_in_user, U3copy_in_user)
	retl
	 nop
#undef BRANCH_ALWAYS
#undef NOP
#undef ULTRA3_DO_PATCH
#endif /* __KERNEL__ */

	.align			32
#ifdef __KERNEL__
	andcc			%o0, 7, %g2			! IEU1	Group
#endif
VIS_enter:
	be,pt			%xcc, dest_is_8byte_aligned	! CTI
#ifdef __KERNEL__
	 nop							! IEU0	Group
#else
	 andcc			%o0, 0x38, %g5			! IEU1	Group
#endif
do_dest_8byte_align:
	mov			8, %g1				! IEU0
	sub			%g1, %g2, %g2			! IEU0	Group
	andcc			%o0, 1, %g0			! IEU1
	be,pt			%icc, 2f			! CTI
	 sub			%o2, %g2, %o2			! IEU0	Group
1:	ASI_SETSRC_NOBLK					! LSU	Group
	EX(LDUB			[%o1] ASINORMAL, %o5, 
				add %o2, %g2)			! Load	Group
	add			%o1, 1, %o1			! IEU0
	add			%o0, 1, %o0			! IEU1
	ASI_SETDST_NOBLK					! LSU	Group
	subcc			%g2, 1, %g2			! IEU1	Group
	be,pn			%xcc, 3f			! CTI
	 EX2(STB		%o5, [%o0 - 1] ASINORMAL,
				add %g2, 1, %g2,
				add %o2, %g2)			! Store
2:	ASI_SETSRC_NOBLK					! LSU	Group
	EX(LDUB			[%o1] ASINORMAL, %o5, 
				add %o2, %g2)			! Load	Group
	add			%o0, 2, %o0			! IEU0
	EX2(LDUB		[%o1 + 1] ASINORMAL, %g3,
				sub %o0, 2, %o0,
				add %o2, %g2)			! Load	Group
	ASI_SETDST_NOBLK					! LSU	Group
	subcc			%g2, 2, %g2			! IEU1	Group
	EX2(STB			%o5, [%o0 - 2] ASINORMAL,
				add %g2, 2, %g2,
				add %o2, %g2)			! Store
	add			%o1, 2, %o1			! IEU0
	bne,pt			%xcc, 2b			! CTI	Group
	 EX2(STB		%g3, [%o0 - 1] ASINORMAL,
				add %g2, 1, %g2,
				add %o2, %g2)			! Store
#ifdef __KERNEL__
3:
dest_is_8byte_aligned:
	VISEntry
	andcc			%o0, 0x38, %g5			! IEU1	Group
#else
3:	andcc			%o0, 0x38, %g5			! IEU1	Group
dest_is_8byte_aligned:
#endif
	be,pt			%icc, dest_is_64byte_aligned	! CTI
	 mov			64, %g1				! IEU0
	fmovd			%f0, %f2			! FPU
	sub			%g1, %g5, %g5			! IEU0	Group
	ASI_SETSRC_NOBLK					! LSU	Group
	alignaddr		%o1, %g0, %g1			! GRU	Group
	EXO2(LDDF		[%g1] ASINORMAL, %f4)		! Load	Group
	sub			%o2, %g5, %o2			! IEU0
1:	EX(LDDF			[%g1 + 0x8] ASINORMAL, %f6,
				add %o2, %g5)			! Load	Group
	add			%g1, 0x8, %g1			! IEU0	Group
	subcc			%g5, 8, %g5			! IEU1
	ASI_SETDST_NOBLK					! LSU	Group
	faligndata		%f4, %f6, %f0			! GRU	Group
	EX2(STDF		%f0, [%o0] ASINORMAL,
				add %g5, 8, %g5,
				add %o2, %g5)			! Store
	add			%o1, 8, %o1			! IEU0	Group
	be,pn			%xcc, dest_is_64byte_aligned	! CTI
	 add			%o0, 8, %o0			! IEU1
	ASI_SETSRC_NOBLK					! LSU	Group
	EX(LDDF			[%g1 + 0x8] ASINORMAL, %f4,
				add %o2, %g5)			! Load	Group
	add			%g1, 8, %g1			! IEU0
	subcc			%g5, 8, %g5			! IEU1
	ASI_SETDST_NOBLK					! LSU	Group
	faligndata		%f6, %f4, %f0			! GRU	Group
	EX2(STDF		%f0, [%o0] ASINORMAL,
				add %g5, 8, %g5,
				add %o2, %g5)			! Store
	add			%o1, 8, %o1			! IEU0
	ASI_SETSRC_NOBLK					! LSU	Group
	bne,pt			%xcc, 1b			! CTI	Group
	 add			%o0, 8, %o0			! IEU0
dest_is_64byte_aligned:
	membar		  #LoadStore | #StoreStore | #StoreLoad	! LSU	Group
#ifndef __KERNEL__
	wr			%g0, ASI_BLK_P, %asi		! LSU	Group
#endif
	subcc			%o2, 0x40, %g7			! IEU1	Group
	mov			%o1, %g1			! IEU0
	andncc			%g7, (0x40 - 1), %g7		! IEU1	Group
	srl			%g1, 3, %g2			! IEU0
	sub			%o2, %g7, %g3			! IEU0	Group
	andn			%o1, (0x40 - 1), %o1		! IEU1
	and			%g2, 7, %g2			! IEU0	Group
	andncc			%g3, 0x7, %g3			! IEU1
	fmovd			%f0, %f2			! FPU
	sub			%g3, 0x10, %g3			! IEU0	Group
	sub			%o2, %g7, %o2			! IEU1
#ifdef __KERNEL__
	or			asi_src, ASI_BLK_OR, asi_src	! IEU0	Group
	or			asi_dest, ASI_BLK_OR, asi_dest	! IEU1
#endif
	alignaddr		%g1, %g0, %g0			! GRU	Group
	add			%g1, %g7, %g1			! IEU0	Group
	subcc			%o2, %g3, %o2			! IEU1
	ASI_SETSRC_BLK						! LSU	Group
	EXVIS1(LDBLK		[%o1 + 0x00] ASIBLK, %f0)	! LSU	Group
	add			%g1, %g3, %g1			! IEU0
	EXVIS1(LDBLK		[%o1 + 0x40] ASIBLK, %f16)	! LSU	Group
	sub			%g7, 0x80, %g7			! IEU0
	EXVIS(LDBLK		[%o1 + 0x80] ASIBLK, %f32)	! LSU	Group
#ifdef __KERNEL__
vispc:	sll			%g2, 9, %g2			! IEU0	Group
	sethi			%hi(vis00), %g5			! IEU1
	or			%g5, %lo(vis00), %g5		! IEU0	Group
	jmpl			%g5 + %g2, %g0			! CTI	Group brk forced
	 addcc			%o1, 0xc0, %o1			! IEU1	Group
#else
								! Clk1	Group 8-(
								! Clk2	Group 8-(
								! Clk3	Group 8-(
								! Clk4	Group 8-(
vispc:	rd			%pc, %g5			! PDU	Group 8-(
	addcc			%g5, %lo(vis00 - vispc), %g5	! IEU1	Group
	sll			%g2, 9, %g2			! IEU0
	jmpl			%g5 + %g2, %g0			! CTI	Group brk forced
	 addcc			%o1, 0xc0, %o1			! IEU1	Group
#endif
	.align			512		/* OK, here comes the fun part... */
vis00:FREG_FROB(f0, f2, f4, f6, f8, f10,f12,f14,f16) LOOP_CHUNK1(o1, o0, g7, vis01)
      FREG_FROB(f16,f18,f20,f22,f24,f26,f28,f30,f32) LOOP_CHUNK2(o1, o0, g7, vis02)
      FREG_FROB(f32,f34,f36,f38,f40,f42,f44,f46,f0)  LOOP_CHUNK3(o1, o0, g7, vis03)
      b,pt			%xcc, vis00+4; faligndata %f0, %f2, %f48
vis01:FREG_FROB(f16,f18,f20,f22,f24,f26,f28,f30,f32) STORE_SYNC(o0, f48) membar #Sync
      FREG_FROB(f32,f34,f36,f38,f40,f42,f44,f46,f0)  STORE_JUMP(o0, f48, finish_f0) membar #Sync
vis02:FREG_FROB(f32,f34,f36,f38,f40,f42,f44,f46,f0)  STORE_SYNC(o0, f48) membar #Sync
      FREG_FROB(f0, f2, f4, f6, f8, f10,f12,f14,f16) STORE_JUMP(o0, f48, finish_f16) membar #Sync
vis03:FREG_FROB(f0, f2, f4, f6, f8, f10,f12,f14,f16) STORE_SYNC(o0, f48) membar #Sync
      FREG_FROB(f16,f18,f20,f22,f24,f26,f28,f30,f32) STORE_JUMP(o0, f48, finish_f32) membar #Sync
      VISLOOP_PAD
vis10:FREG_FROB(f2, f4, f6, f8, f10,f12,f14,f16,f18) LOOP_CHUNK1(o1, o0, g7, vis11)
      FREG_FROB(f18,f20,f22,f24,f26,f28,f30,f32,f34) LOOP_CHUNK2(o1, o0, g7, vis12)
      FREG_FROB(f34,f36,f38,f40,f42,f44,f46,f0, f2)  LOOP_CHUNK3(o1, o0, g7, vis13)
      b,pt			%xcc, vis10+4; faligndata %f2, %f4, %f48
vis11:FREG_FROB(f18,f20,f22,f24,f26,f28,f30,f32,f34) STORE_SYNC(o0, f48) membar #Sync
      FREG_FROB(f34,f36,f38,f40,f42,f44,f46,f0, f2)  STORE_JUMP(o0, f48, finish_f2) membar #Sync
vis12:FREG_FROB(f34,f36,f38,f40,f42,f44,f46,f0, f2)  STORE_SYNC(o0, f48) membar #Sync
      FREG_FROB(f2, f4, f6, f8, f10,f12,f14,f16,f18) STORE_JUMP(o0, f48, finish_f18) membar #Sync
vis13:FREG_FROB(f2, f4, f6, f8, f10,f12,f14,f16,f18) STORE_SYNC(o0, f48) membar #Sync
      FREG_FROB(f18,f20,f22,f24,f26,f28,f30,f32,f34) STORE_JUMP(o0, f48, finish_f34) membar #Sync
      VISLOOP_PAD
vis20:FREG_FROB(f4, f6, f8, f10,f12,f14,f16,f18,f20) LOOP_CHUNK1(o1, o0, g7, vis21)
      FREG_FROB(f20,f22,f24,f26,f28,f30,f32,f34,f36) LOOP_CHUNK2(o1, o0, g7, vis22)
      FREG_FROB(f36,f38,f40,f42,f44,f46,f0, f2, f4)  LOOP_CHUNK3(o1, o0, g7, vis23)
      b,pt			%xcc, vis20+4; faligndata %f4, %f6, %f48
vis21:FREG_FROB(f20,f22,f24,f26,f28,f30,f32,f34,f36) STORE_SYNC(o0, f48) membar #Sync
      FREG_FROB(f36,f38,f40,f42,f44,f46,f0, f2, f4)  STORE_JUMP(o0, f48, finish_f4) membar #Sync
vis22:FREG_FROB(f36,f38,f40,f42,f44,f46,f0, f2, f4)  STORE_SYNC(o0, f48) membar #Sync
      FREG_FROB(f4, f6, f8, f10,f12,f14,f16,f18,f20) STORE_JUMP(o0, f48, finish_f20) membar #Sync
vis23:FREG_FROB(f4, f6, f8, f10,f12,f14,f16,f18,f20) STORE_SYNC(o0, f48) membar #Sync
      FREG_FROB(f20,f22,f24,f26,f28,f30,f32,f34,f36) STORE_JUMP(o0, f48, finish_f36) membar #Sync
      VISLOOP_PAD
vis30:FREG_FROB(f6, f8, f10,f12,f14,f16,f18,f20,f22) LOOP_CHUNK1(o1, o0, g7, vis31)
      FREG_FROB(f22,f24,f26,f28,f30,f32,f34,f36,f38) LOOP_CHUNK2(o1, o0, g7, vis32)
      FREG_FROB(f38,f40,f42,f44,f46,f0, f2, f4, f6)  LOOP_CHUNK3(o1, o0, g7, vis33)
      b,pt			%xcc, vis30+4; faligndata %f6, %f8, %f48
vis31:FREG_FROB(f22,f24,f26,f28,f30,f32,f34,f36,f38) STORE_SYNC(o0, f48) membar #Sync
      FREG_FROB(f38,f40,f42,f44,f46,f0, f2, f4, f6)  STORE_JUMP(o0, f48, finish_f6) membar #Sync
vis32:FREG_FROB(f38,f40,f42,f44,f46,f0, f2, f4, f6)  STORE_SYNC(o0, f48) membar #Sync
      FREG_FROB(f6, f8, f10,f12,f14,f16,f18,f20,f22) STORE_JUMP(o0, f48, finish_f22) membar #Sync
vis33:FREG_FROB(f6, f8, f10,f12,f14,f16,f18,f20,f22) STORE_SYNC(o0, f48) membar #Sync
      FREG_FROB(f22,f24,f26,f28,f30,f32,f34,f36,f38) STORE_JUMP(o0, f48, finish_f38) membar #Sync
      VISLOOP_PAD
vis40:FREG_FROB(f8, f10,f12,f14,f16,f18,f20,f22,f24) LOOP_CHUNK1(o1, o0, g7, vis41)
      FREG_FROB(f24,f26,f28,f30,f32,f34,f36,f38,f40) LOOP_CHUNK2(o1, o0, g7, vis42)
      FREG_FROB(f40,f42,f44,f46,f0, f2, f4, f6, f8)  LOOP_CHUNK3(o1, o0, g7, vis43)
      b,pt			%xcc, vis40+4; faligndata %f8, %f10, %f48
vis41:FREG_FROB(f24,f26,f28,f30,f32,f34,f36,f38,f40) STORE_SYNC(o0, f48) membar #Sync
      FREG_FROB(f40,f42,f44,f46,f0, f2, f4, f6, f8)  STORE_JUMP(o0, f48, finish_f8) membar #Sync
vis42:FREG_FROB(f40,f42,f44,f46,f0, f2, f4, f6, f8)  STORE_SYNC(o0, f48) membar #Sync
      FREG_FROB(f8, f10,f12,f14,f16,f18,f20,f22,f24) STORE_JUMP(o0, f48, finish_f24) membar #Sync
vis43:FREG_FROB(f8, f10,f12,f14,f16,f18,f20,f22,f24) STORE_SYNC(o0, f48) membar #Sync
      FREG_FROB(f24,f26,f28,f30,f32,f34,f36,f38,f40) STORE_JUMP(o0, f48, finish_f40) membar #Sync
      VISLOOP_PAD
vis50:FREG_FROB(f10,f12,f14,f16,f18,f20,f22,f24,f26) LOOP_CHUNK1(o1, o0, g7, vis51)
      FREG_FROB(f26,f28,f30,f32,f34,f36,f38,f40,f42) LOOP_CHUNK2(o1, o0, g7, vis52)
      FREG_FROB(f42,f44,f46,f0, f2, f4, f6, f8, f10) LOOP_CHUNK3(o1, o0, g7, vis53)
      b,pt			%xcc, vis50+4; faligndata %f10, %f12, %f48
vis51:FREG_FROB(f26,f28,f30,f32,f34,f36,f38,f40,f42) STORE_SYNC(o0, f48) membar #Sync
      FREG_FROB(f42,f44,f46,f0, f2, f4, f6, f8, f10) STORE_JUMP(o0, f48, finish_f10) membar #Sync
vis52:FREG_FROB(f42,f44,f46,f0, f2, f4, f6, f8, f10) STORE_SYNC(o0, f48) membar #Sync
      FREG_FROB(f10,f12,f14,f16,f18,f20,f22,f24,f26) STORE_JUMP(o0, f48, finish_f26) membar #Sync
vis53:FREG_FROB(f10,f12,f14,f16,f18,f20,f22,f24,f26) STORE_SYNC(o0, f48) membar #Sync
      FREG_FROB(f26,f28,f30,f32,f34,f36,f38,f40,f42) STORE_JUMP(o0, f48, finish_f42) membar #Sync
      VISLOOP_PAD
vis60:FREG_FROB(f12,f14,f16,f18,f20,f22,f24,f26,f28) LOOP_CHUNK1(o1, o0, g7, vis61)
      FREG_FROB(f28,f30,f32,f34,f36,f38,f40,f42,f44) LOOP_CHUNK2(o1, o0, g7, vis62)
      FREG_FROB(f44,f46,f0, f2, f4, f6, f8, f10,f12) LOOP_CHUNK3(o1, o0, g7, vis63)
      b,pt			%xcc, vis60+4; faligndata %f12, %f14, %f48
vis61:FREG_FROB(f28,f30,f32,f34,f36,f38,f40,f42,f44) STORE_SYNC(o0, f48) membar #Sync
      FREG_FROB(f44,f46,f0, f2, f4, f6, f8, f10,f12) STORE_JUMP(o0, f48, finish_f12) membar #Sync
vis62:FREG_FROB(f44,f46,f0, f2, f4, f6, f8, f10,f12) STORE_SYNC(o0, f48) membar #Sync
      FREG_FROB(f12,f14,f16,f18,f20,f22,f24,f26,f28) STORE_JUMP(o0, f48, finish_f28) membar #Sync
vis63:FREG_FROB(f12,f14,f16,f18,f20,f22,f24,f26,f28) STORE_SYNC(o0, f48) membar #Sync
      FREG_FROB(f28,f30,f32,f34,f36,f38,f40,f42,f44) STORE_JUMP(o0, f48, finish_f44) membar #Sync
      VISLOOP_PAD
vis70:FREG_FROB(f14,f16,f18,f20,f22,f24,f26,f28,f30) LOOP_CHUNK1(o1, o0, g7, vis71)
      FREG_FROB(f30,f32,f34,f36,f38,f40,f42,f44,f46) LOOP_CHUNK2(o1, o0, g7, vis72)
      FREG_FROB(f46,f0, f2, f4, f6, f8, f10,f12,f14) LOOP_CHUNK3(o1, o0, g7, vis73)
      b,pt			%xcc, vis70+4; faligndata %f14, %f16, %f48
vis71:FREG_FROB(f30,f32,f34,f36,f38,f40,f42,f44,f46) STORE_SYNC(o0, f48) membar #Sync
      FREG_FROB(f46,f0, f2, f4, f6, f8, f10,f12,f14) STORE_JUMP(o0, f48, finish_f14) membar #Sync
vis72:FREG_FROB(f46,f0, f2, f4, f6, f8, f10,f12,f14) STORE_SYNC(o0, f48) membar #Sync
      FREG_FROB(f14,f16,f18,f20,f22,f24,f26,f28,f30) STORE_JUMP(o0, f48, finish_f30) membar #Sync
vis73:FREG_FROB(f14,f16,f18,f20,f22,f24,f26,f28,f30) STORE_SYNC(o0, f48) membar #Sync
      FREG_FROB(f30,f32,f34,f36,f38,f40,f42,f44,f46) STORE_JUMP(o0, f48, finish_f46) membar #Sync
      VISLOOP_PAD
finish_f0:	FINISH_VISCHUNK(o0, f0,  f2,  g3)
finish_f2:	FINISH_VISCHUNK(o0, f2,  f4,  g3)
finish_f4:	FINISH_VISCHUNK(o0, f4,  f6,  g3)
finish_f6:	FINISH_VISCHUNK(o0, f6,  f8,  g3)
finish_f8:	FINISH_VISCHUNK(o0, f8,  f10, g3)
finish_f10:	FINISH_VISCHUNK(o0, f10, f12, g3)
finish_f12:	FINISH_VISCHUNK(o0, f12, f14, g3)
finish_f14:	UNEVEN_VISCHUNK(o0, f14, f0,  g3)
finish_f16:	FINISH_VISCHUNK(o0, f16, f18, g3)
finish_f18:	FINISH_VISCHUNK(o0, f18, f20, g3)
finish_f20:	FINISH_VISCHUNK(o0, f20, f22, g3)
finish_f22:	FINISH_VISCHUNK(o0, f22, f24, g3)
finish_f24:	FINISH_VISCHUNK(o0, f24, f26, g3)
finish_f26:	FINISH_VISCHUNK(o0, f26, f28, g3)
finish_f28:	FINISH_VISCHUNK(o0, f28, f30, g3)
finish_f30:	UNEVEN_VISCHUNK(o0, f30, f0,  g3)
finish_f32:	FINISH_VISCHUNK(o0, f32, f34, g3)
finish_f34:	FINISH_VISCHUNK(o0, f34, f36, g3)
finish_f36:	FINISH_VISCHUNK(o0, f36, f38, g3)
finish_f38:	FINISH_VISCHUNK(o0, f38, f40, g3)
finish_f40:	FINISH_VISCHUNK(o0, f40, f42, g3)
finish_f42:	FINISH_VISCHUNK(o0, f42, f44, g3)
finish_f44:	FINISH_VISCHUNK(o0, f44, f46, g3)
finish_f46:	UNEVEN_VISCHUNK_LAST(o0, f46, f0,  g3)
vis_out_slk:
#ifdef __KERNEL__
	srl		asi_src, 3, %g5				! IEU0	Group
	xor		asi_src, ASI_BLK_XOR1, asi_src		! IEU1
	xor		asi_src, %g5, asi_src			! IEU0	Group
#endif
vis_slk:ASI_SETSRC_NOBLK					! LSU	Group
	EXVIS4(LDDF	[%o1] ASINORMAL, %f2)			! Load	Group
	add		%o1, 8, %o1				! IEU0
	subcc		%g3, 8, %g3				! IEU1
	ASI_SETDST_NOBLK					! LSU	Group
	faligndata	%f0, %f2, %f8				! GRU	Group
	EXVIS5(STDF	%f8, [%o0] ASINORMAL)			! Store
	bl,pn		%xcc, vis_out_slp			! CTI
	 add		%o0, 8, %o0				! IEU0	Group
	ASI_SETSRC_NOBLK					! LSU	Group
	EXVIS4(LDDF	[%o1] ASINORMAL, %f0)			! Load	Group
	add		%o1, 8, %o1				! IEU0
	subcc		%g3, 8, %g3				! IEU1
	ASI_SETDST_NOBLK					! LSU	Group
	faligndata	%f2, %f0, %f8				! GRU	Group
	EXVIS5(STDF	%f8, [%o0] ASINORMAL)			! Store
	bge,pt		%xcc, vis_slk				! CTI
	 add		%o0, 8, %o0				! IEU0	Group
vis_out_slp:
#ifdef __KERNEL__
	brz,pt		%o2, vis_ret				! CTI	Group
	 mov		%g1, %o1				! IEU0
	ba,pt		%xcc, vis_slp+4				! CTI	Group
	 ASI_SETSRC_NOBLK					! LSU	Group
#endif
vis_out:brz,pt		%o2, vis_ret				! CTI	Group
	 mov		%g1, %o1				! IEU0
#ifdef __KERNEL__
	srl		asi_src, 3, %g5				! IEU0	Group
	xor		asi_src, ASI_BLK_XOR1, asi_src		! IEU1
	xor		asi_src, %g5, asi_src			! IEU0	Group
#endif
vis_slp:ASI_SETSRC_NOBLK					! LSU	Group
	EXO2(LDUB	[%o1] ASINORMAL, %g5)			! LOAD
	add		%o1, 1, %o1				! IEU0
	add		%o0, 1, %o0				! IEU1
	ASI_SETDST_NOBLK					! LSU	Group
	subcc		%o2, 1, %o2				! IEU1
	bne,pt		%xcc, vis_slp				! CTI
	 EX(STB		%g5, [%o0 - 1] ASINORMAL,
			add %o2, 1)				! Store	Group
vis_ret:membar		#StoreLoad | #StoreStore		! LSU	Group
	FPU_CLEAN_RETL


__memcpy_short:
	andcc		%o2, 1, %g0				! IEU1	Group
	be,pt		%icc, 2f				! CTI
1:	 ASI_SETSRC_NOBLK					! LSU	Group
	EXO2(LDUB	[%o1] ASINORMAL, %g5)			! LOAD	Group
	add		%o1, 1, %o1				! IEU0
	add		%o0, 1, %o0				! IEU1
	ASI_SETDST_NOBLK					! LSU	Group
	subcc		%o2, 1, %o2				! IEU1	Group
	be,pn		%xcc, short_ret				! CTI
	 EX(STB		%g5, [%o0 - 1] ASINORMAL,
			add %o2, 1)				! Store
2:	ASI_SETSRC_NOBLK					! LSU	Group
	EXO2(LDUB	[%o1] ASINORMAL, %g5)			! LOAD	Group
	add		%o0, 2, %o0				! IEU0
	EX2(LDUB	[%o1 + 1] ASINORMAL, %o5,
			sub %o0, 2, %o0,
			add %o2, %g0)				! LOAD	Group
	add		%o1, 2, %o1				! IEU0
	ASI_SETDST_NOBLK					! LSU	Group
	subcc		%o2, 2, %o2				! IEU1	Group
	EX(STB		%g5, [%o0 - 2] ASINORMAL,
			add %o2, 2)				! Store
	bne,pt		%xcc, 2b				! CTI
	 EX(STB		%o5, [%o0 - 1] ASINORMAL,
			add %o2, 1)				! Store
short_ret:
	NORMAL_RETL

#ifndef __KERNEL__
memcpy_private:
memcpy:
#ifndef REGS_64BIT
	srl		%o2, 0, %o2				! IEU1	Group
#endif	
	brz,pn		%o2, short_ret				! CTI	Group
	 mov		%o0, %g6				! IEU0
#endif
__memcpy_entry:
	cmp		%o2, 15					! IEU1	Group
	bleu,pn		%xcc, __memcpy_short			! CTI
	 cmp		%o2, (64 * 6)				! IEU1	Group
	bgeu,pn		%xcc, VIS_enter				! CTI
	 andcc		%o0, 7, %g2				! IEU1	Group
	sub		%o0, %o1, %g5				! IEU0
	andcc		%g5, 3, %o5				! IEU1	Group
	bne,pn		%xcc, memcpy_noVIS_misaligned		! CTI
	 andcc		%o1, 3, %g0				! IEU1	Group
#ifdef REGS_64BIT
	be,a,pt		%xcc, 3f				! CTI
	 andcc		%o1, 4, %g0				! IEU1	Group
	andcc		%o1, 1, %g0				! IEU1	Group
#else /* !REGS_64BIT */
	be,pt		%xcc, 5f				! CTI
	 andcc		%o1, 1, %g0				! IEU1	Group
#endif /* !REGS_64BIT */
	be,pn		%xcc, 4f				! CTI
	 andcc		%o1, 2, %g0				! IEU1	Group
	ASI_SETSRC_NOBLK					! LSU	Group
	EXO2(LDUB	[%o1] ASINORMAL, %g2)			! Load	Group
	add		%o1, 1, %o1				! IEU0
	add		%o0, 1, %o0				! IEU1
	sub		%o2, 1, %o2				! IEU0	Group
	ASI_SETDST_NOBLK					! LSU	Group
	bne,pn		%xcc, 5f				! CTI	Group
	 EX(STB		%g2, [%o0 - 1] ASINORMAL,
			add %o2, 1)				! Store
4:	ASI_SETSRC_NOBLK					! LSU	Group
	EXO2(LDUH	[%o1] ASINORMAL, %g2)			! Load	Group
	add		%o1, 2, %o1				! IEU0
	add		%o0, 2, %o0				! IEU1
	ASI_SETDST_NOBLK					! LSU	Group
	sub		%o2, 2, %o2				! IEU0
	EX(STH		%g2, [%o0 - 2] ASINORMAL,
			add %o2, 2)				! Store	Group + bubble
#ifdef REGS_64BIT
5:	andcc		%o1, 4, %g0				! IEU1
3:	be,a,pn		%xcc, 2f				! CTI
	 andcc		%o2, -128, %g7				! IEU1	Group
	ASI_SETSRC_NOBLK					! LSU	Group
	EXO2(LDUW	[%o1] ASINORMAL, %g5)			! Load	Group
	add		%o1, 4, %o1				! IEU0
	add		%o0, 4, %o0				! IEU1
	ASI_SETDST_NOBLK					! LSU	Group
	sub		%o2, 4, %o2				! IEU0	Group
	EX(STW		%g5, [%o0 - 4] ASINORMAL,
			add %o2, 4)				! Store
	andcc		%o2, -128, %g7				! IEU1	Group
2:	be,pn		%xcc, 3f				! CTI
	 andcc		%o0, 4, %g0				! IEU1	Group
	be,pn		%xcc, 82f + 4				! CTI	Group
#else /* !REGS_64BIT */
5:	andcc		%o2, -128, %g7				! IEU1
	be,a,pn		%xcc, 41f				! CTI
	 andcc		%o2, 0x70, %g7				! IEU1	Group
#endif /* !REGS_64BIT */
5:	MOVE_BIGCHUNK(o1, o0, 0x00, g1, g3, g5, o5)
	MOVE_BIGCHUNK(o1, o0, 0x20, g1, g3, g5, o5)
	MOVE_BIGCHUNK(o1, o0, 0x40, g1, g3, g5, o5)
	MOVE_BIGCHUNK(o1, o0, 0x60, g1, g3, g5, o5)
	EXT(5b,35f,VIScopyfixup1)
35:	subcc		%g7, 128, %g7				! IEU1	Group
	add		%o1, 128, %o1				! IEU0
	bne,pt		%xcc, 5b				! CTI
	 add		%o0, 128, %o0				! IEU0	Group
3:	andcc		%o2, 0x70, %g7				! IEU1	Group
41:	be,pn		%xcc, 80f				! CTI
	 andcc		%o2, 8, %g0				! IEU1	Group
#ifdef __KERNEL__
79:	sethi		%hi(80f), %o5				! IEU0
	sll		%g7, 1, %g5				! IEU0	Group
	add		%o1, %g7, %o1				! IEU1
	srl		%g7, 1, %g2				! IEU0  Group
	sub		%o5, %g5, %o5				! IEU1
	sub		%o5, %g2, %o5				! IEU0  Group
	jmpl		%o5 + %lo(80f), %g0			! CTI	Group brk forced
	 add		%o0, %g7, %o0				! IEU0	Group
#else
								! Clk1 8-(
								! Clk2 8-(
								! Clk3 8-(
								! Clk4 8-(
79:	rd		%pc, %o5				! PDU	Group
	sll		%g7, 1, %g5				! IEU0	Group
	add		%o1, %g7, %o1				! IEU1
	sub		%o5, %g5, %o5				! IEU0  Group
	jmpl		%o5 + %lo(80f - 79b), %g0		! CTI	Group brk forced
	 add		%o0, %g7, %o0				! IEU0	Group
#endif
36:	MOVE_LASTCHUNK(o1, o0, 0x60, g2, g3, g5, o5)
	MOVE_LASTCHUNK(o1, o0, 0x50, g2, g3, g5, o5)
	MOVE_LASTCHUNK(o1, o0, 0x40, g2, g3, g5, o5)
	MOVE_LASTCHUNK(o1, o0, 0x30, g2, g3, g5, o5)
	MOVE_LASTCHUNK(o1, o0, 0x20, g2, g3, g5, o5)
	MOVE_LASTCHUNK(o1, o0, 0x10, g2, g3, g5, o5)
	MOVE_LASTCHUNK(o1, o0, 0x00, g2, g3, g5, o5)
	EXT(36b,80f,VIScopyfixup2)
80:	be,pt		%xcc, 81f				! CTI
	 andcc		%o2, 4, %g0				! IEU1
#ifdef REGS_64BIT
	ASI_SETSRC_NOBLK					! LSU	Group
	EX(LDX		[%o1] ASINORMAL, %g2,
			and %o2, 0xf)				! Load	Group
	add		%o0, 8, %o0				! IEU0
	ASI_SETDST_NOBLK					! LSU	Group
	EX(STW		%g2, [%o0 - 0x4] ASINORMAL,
			and %o2, 0xf)				! Store	Group
	add		%o1, 8, %o1				! IEU1
	srlx		%g2, 32, %g2				! IEU0	Group
	EX2(STW		%g2, [%o0 - 0x8] ASINORMAL,
			and %o2, 0xf, %o2,
			sub %o2, 4)				! Store
#else /* !REGS_64BIT */
	lduw		[%o1], %g2				! Load	Group
	add		%o0, 8, %o0				! IEU0
	lduw		[%o1 + 0x4], %g3			! Load	Group
	add		%o1, 8, %o1				! IEU0
	stw		%g2, [%o0 - 0x8]			! Store	Group
	stw		%g3, [%o0 - 0x4]			! Store	Group
#endif /* !REGS_64BIT */
81:	be,pt		%xcc, 1f				! CTI
	 andcc		%o2, 2, %g0				! IEU1	Group
	ASI_SETSRC_NOBLK					! LSU	Group
	EX(LDUW		[%o1] ASINORMAL, %g2,
			and %o2, 0x7)				! Load	Group
	add		%o1, 4, %o1				! IEU0
	ASI_SETDST_NOBLK					! LSU	Group
	EX(STW		%g2, [%o0] ASINORMAL,
			and %o2, 0x7)				! Store	Group
	add		%o0, 4, %o0				! IEU0
1:	be,pt		%xcc, 1f				! CTI
	 andcc		%o2, 1, %g0				! IEU1	Group
	ASI_SETSRC_NOBLK					! LSU	Group
	EX(LDUH		[%o1] ASINORMAL, %g2,
			and %o2, 0x3)				! Load	Group
	add		%o1, 2, %o1				! IEU0
	ASI_SETDST_NOBLK					! LSU	Group
	EX(STH		%g2, [%o0] ASINORMAL,
			and %o2, 0x3)				! Store	Group
	add		%o0, 2, %o0				! IEU0
1:	be,pt		%xcc, normal_retl			! CTI
	 nop							! IEU1
	ASI_SETSRC_NOBLK					! LSU	Group
	EX(LDUB		[%o1] ASINORMAL, %g2,
			add %g0, 1)				! Load	Group
	ASI_SETDST_NOBLK					! LSU	Group
	EX(STB		%g2, [%o0] ASINORMAL,
			add %g0, 1)				! Store	Group + bubble
normal_retl:
	NORMAL_RETL

#ifdef REGS_64BIT
82:	MOVE_BIGALIGNCHUNK(o1, o0, 0x00, g1, g3, g5, o5)
	MOVE_BIGALIGNCHUNK(o1, o0, 0x40, g1, g3, g5, o5)
	EXT(82b,37f,VIScopyfixup3)
37:	subcc		%g7, 128, %g7				! IEU1	Group
	add		%o1, 128, %o1				! IEU0
	bne,pt		%xcc, 82b				! CTI
	 add		%o0, 128, %o0				! IEU0	Group
	andcc		%o2, 0x70, %g7				! IEU1
	be,pn		%xcc, 84f				! CTI
	 andcc		%o2, 8, %g0				! IEU1	Group
#ifdef __KERNEL__
83:	srl		%g7, 1, %g5				! IEU0
	sethi		%hi(84f), %o5				! IEU0	Group
	add		%g7, %g5, %g5				! IEU1
	add		%o1, %g7, %o1				! IEU0	Group
	sub		%o5, %g5, %o5				! IEU1
	jmpl		%o5 + %lo(84f), %g0			! CTI	Group brk forced
	 add		%o0, %g7, %o0				! IEU0	Group
#else
								! Clk1 8-(
								! Clk2 8-(
								! Clk3 8-(
								! Clk4 8-(
83:	rd		%pc, %o5				! PDU	Group
	add		%o1, %g7, %o1				! IEU0	Group
	sub		%o5, %g7, %o5				! IEU1
	jmpl		%o5 + %lo(84f - 83b), %g0		! CTI	Group brk forced
	 add		%o0, %g7, %o0				! IEU0	Group
#endif
38:	MOVE_LASTALIGNCHUNK(o1, o0, 0x60, g2, g3)
	MOVE_LASTALIGNCHUNK(o1, o0, 0x50, g2, g3)
	MOVE_LASTALIGNCHUNK(o1, o0, 0x40, g2, g3)
	MOVE_LASTALIGNCHUNK(o1, o0, 0x30, g2, g3)
	MOVE_LASTALIGNCHUNK(o1, o0, 0x20, g2, g3)
	MOVE_LASTALIGNCHUNK(o1, o0, 0x10, g2, g3)
	MOVE_LASTALIGNCHUNK(o1, o0, 0x00, g2, g3)
	EXT(38b,84f,VIScopyfixup4)
84:	be,pt		%xcc, 85f				! CTI	Group
	 andcc		%o2, 4, %g0				! IEU1
	ASI_SETSRC_NOBLK					! LSU	Group
	EX(LDX		[%o1] ASINORMAL, %g2,
			and %o2, 0xf)				! Load	Group
	add		%o0, 8, %o0				! IEU0
	ASI_SETDST_NOBLK					! LSU	Group
	add		%o1, 8, %o1				! IEU0	Group
	EX(STX		%g2, [%o0 - 0x8] ASINORMAL,
			and %o2, 0xf)				! Store
85:	be,pt		%xcc, 1f				! CTI
	 andcc		%o2, 2, %g0				! IEU1	Group
	ASI_SETSRC_NOBLK					! LSU	Group
	EX(LDUW		[%o1] ASINORMAL, %g2,
			and %o2, 0x7)				! Load	Group
	add		%o0, 4, %o0				! IEU0
	ASI_SETDST_NOBLK					! LSU	Group
	add		%o1, 4, %o1				! IEU0	Group
	EX(STW		%g2, [%o0 - 0x4] ASINORMAL,
			and %o2, 0x7)				! Store
1:	be,pt		%xcc, 1f				! CTI
	 andcc		%o2, 1, %g0				! IEU1	Group
	ASI_SETSRC_NOBLK					! LSU	Group
	EX(LDUH		[%o1] ASINORMAL, %g2,
			and %o2, 0x3)				! Load	Group
	add		%o0, 2, %o0				! IEU0
	ASI_SETDST_NOBLK					! LSU	Group
	add		%o1, 2, %o1				! IEU0	Group
	EX(STH		%g2, [%o0 - 0x2] ASINORMAL,
			and %o2, 0x3)				! Store
1:	be,pt		%xcc, 1f				! CTI
	 nop							! IEU0	Group
	ASI_SETSRC_NOBLK					! LSU	Group
	EX(LDUB		[%o1] ASINORMAL, %g2,
			add %g0, 1)				! Load	Group
	ASI_SETDST_NOBLK					! LSU	Group
	EX(STB		%g2, [%o0] ASINORMAL,
			add %g0, 1)				! Store	Group + bubble
1:	NORMAL_RETL
#endif	/* REGS_64BIT */

memcpy_noVIS_misaligned:
	brz,pt			%g2, 2f				! CTI	Group
	 mov			8, %g1				! IEU0
	sub			%g1, %g2, %g2			! IEU0	Group
	sub			%o2, %g2, %o2			! IEU0	Group
1:	ASI_SETSRC_NOBLK					! LSU	Group
	EX(LDUB			[%o1] ASINORMAL, %g5,
				add %o2, %g2)			! Load	Group
	add			%o1, 1, %o1			! IEU0
	add			%o0, 1, %o0			! IEU1
	ASI_SETDST_NOBLK					! LSU	Group
	subcc			%g2, 1, %g2			! IEU1	Group
	bne,pt			%xcc, 1b			! CTI
	 EX2(STB		%g5, [%o0 - 1] ASINORMAL,
				add %o2, %g2, %o2,
				add %o2, 1)			! Store
2:
#ifdef __KERNEL__
	VISEntry
#endif
	andn			%o2, 7, %g5 			! IEU0	Group
	and			%o2, 7, %o2			! IEU1
	fmovd			%f0, %f2			! FPU
	ASI_SETSRC_NOBLK					! LSU	Group
	alignaddr		%o1, %g0, %g1			! GRU	Group
	EXO2(LDDF		[%g1] ASINORMAL, %f4)		! Load	Group
1:	EX(LDDF			[%g1 + 0x8] ASINORMAL, %f6,
				add %o2, %g5)			! Load	Group
	add			%g1, 0x8, %g1			! IEU0	Group
	subcc			%g5, 8, %g5			! IEU1
	ASI_SETDST_NOBLK					! LSU	Group
	faligndata		%f4, %f6, %f0			! GRU	Group
	EX2(STDF		%f0, [%o0] ASINORMAL,
				add %o2, %g5, %o2,
				add %o2, 8)			! Store
	add			%o1, 8, %o1			! IEU0	Group
	be,pn			%xcc, end_cruft			! CTI
	 add			%o0, 8, %o0			! IEU1
	ASI_SETSRC_NOBLK					! LSU	Group
	EX(LDDF			[%g1 + 0x8] ASINORMAL, %f4,
				add %o2, %g5)			! Load	Group
	add			%g1, 8, %g1			! IEU0
	subcc			%g5, 8, %g5			! IEU1
	ASI_SETDST_NOBLK					! LSU	Group
	faligndata		%f6, %f4, %f0			! GRU	Group
	EX2(STDF		%f0, [%o0] ASINORMAL,
				add %o2, %g5, %o2,
				add %o2, 8)			! Store
	add			%o1, 8, %o1			! IEU0
	ASI_SETSRC_NOBLK					! LSU	Group
	bne,pn			%xcc, 1b			! CTI	Group
	 add			%o0, 8, %o0			! IEU0
end_cruft:
	brz,pn			%o2, fpu_retl			! CTI	Group
#ifndef __KERNEL__
	 nop							! IEU0
#else
	 ASI_SETSRC_NOBLK					! LSU	Group
#endif
	EXO2(LDUB	[%o1] ASINORMAL, %g5)			! LOAD
	add		%o1, 1, %o1				! IEU0
	add		%o0, 1, %o0				! IEU1
	ASI_SETDST_NOBLK					! LSU	Group
	subcc		%o2, 1, %o2				! IEU1
	bne,pt		%xcc, vis_slp				! CTI
	 EX(STB		%g5, [%o0 - 1] ASINORMAL,
			add %o2, 1)				! Store	Group
fpu_retl:
	FPU_RETL

#ifdef __KERNEL__
	.globl		__memcpy_end
__memcpy_end:

		.section	.fixup
		.align		4
VIScopyfixup_reto2:
		mov		%o2, %o1
VIScopyfixup_ret:
		/* If this is copy_from_user(), zero out the rest of the
		 * kernel buffer.
		 */
		ldub		[%g6 + AOFF_task_thread + AOFF_thread_current_ds], %o4
		andcc		asi_src, 0x1, %g0
		be,pt		%icc, 1f
		 VISExit
		andcc		asi_dest, 0x1, %g0
		bne,pn		%icc, 1f
		 nop
		save		%sp, -160, %sp
		mov		%i0, %o0
		call		__bzero
		 mov		%i1, %o1
		restore
1:		mov		%o1, %o0
		retl
		 wr		%o4, %g0, %asi
VIScopyfixup1:	subcc		%g2, 18, %g2
		add		%o0, 32, %o0
		bgeu,a,pt	%icc, VIScopyfixup1
		 sub		%g7, 32, %g7
		sub		%o0, 32, %o0
		rd		%pc, %g5
		add		%g2, (18 + 16), %g2
		ldub		[%g5 + %g2], %g2
		ba,a,pt		%xcc, 2f
.byte		0, 0, 0, 0, 0, 0, 0, 4, 4, 8, 12, 12, 16, 20, 20, 24, 28, 28
		.align		4
VIScopyfixup2:	mov		(7 * 16), %g7
1:		subcc		%g2, 10, %g2
		bgeu,a,pt	%icc, 1b
		 sub		%g7, 16, %g7
		sub		%o0, %g7, %o0
		rd		%pc, %g5
		add		%g2, (10 + 16), %g2
		ldub		[%g5 + %g2], %g2
		ba,a,pt		%xcc, 4f
.byte		0, 0, 0, 0, 0, 4, 4, 8, 12, 12
		.align		4
VIScopyfixup3:	subcc		%g2, 10, %g2
		add		%o0, 32, %o0
		bgeu,a,pt	%icc, VIScopyfixup3
		 sub		%g7, 32, %g7
		sub		%o0, 32, %o0
		rd		%pc, %g5
		add		%g2, (10 + 16), %g2
		ldub		[%g5 + %g2], %g2
		ba,a,pt		%xcc, 2f
.byte		0, 0, 0, 0, 0, 0, 0, 8, 16, 24
		.align		4
2:		and		%o2, 0x7f, %o2
		sub		%g7, %g2, %g7
		ba,pt		%xcc, VIScopyfixup_ret
		 add		%g7, %o2, %o1
VIScopyfixup4:	mov		(7 * 16), %g7
3:		subcc		%g2, 6, %g2
		bgeu,a,pt	%icc, 3b
		 sub		%g7, 16, %g7
		sub		%o0, %g7, %o0
		rd		%pc, %g5
		add		%g2, (6 + 16), %g2
		ldub		[%g5 + %g2], %g2
		ba,a,pt		%xcc, 4f
.byte		0, 0, 0, 0, 0, 8
		.align		4
4:		and		%o2, 0xf, %o2
		sub		%g7, %g2, %g7
		ba,pt		%xcc, VIScopyfixup_ret
		 add		%g7, %o2, %o1
VIScopyfixup_vis3:
		sub		%o2, 0x80, %o2
VIScopyfixup_vis2:
		add		%o2, 0x40, %o2
VIScopyfixup_vis0:
		add		%o2, 0x80, %o2
VIScopyfixup_vis1:
		add		%g7, %g3, %g7
		ba,pt		%xcc, VIScopyfixup_ret
		 add		%o2, %g7, %o1
VIScopyfixup_vis5:
		add		%g3, 8, %g3
VIScopyfixup_vis4:
		add		%g3, 8, %g3
		ba,pt		%xcc, VIScopyfixup_ret
		 add		%o2, %g3, %o1
#endif

#ifdef __KERNEL__
		.text
		.align		32

		.globl		__memmove
		.type		__memmove,@function

		.globl		memmove
		.type		memmove,@function

memmove:
__memmove:	cmp		%o0, %o1
		blu,pt		%xcc, memcpy_private
		 sub		%o0, %o1, %g5
		add		%o1, %o2, %g3
		cmp		%g3, %o0
		bleu,pt		%xcc, memcpy_private
		 add		%o1, %o2, %g5
		add		%o0, %o2, %o5

		sub		%g5, 1, %o1
		sub		%o5, 1, %o0
1:		ldub		[%o1], %g5
		subcc		%o2, 1, %o2
		sub		%o1, 1, %o1
		stb		%g5, [%o0]
		bne,pt		%icc, 1b
		 sub		%o0, 1, %o0

		retl
		 clr		%o0
#endif
/* $Id: VISmemset.S,v 1.10 1999/12/23 17:02:16 jj Exp $
 * VISmemset.S: High speed memset operations utilizing the UltraSparc
 *        Visual Instruction Set.
 *
 * Copyright (C) 1997 David S. Miller (davem@caip.rutgers.edu)
 * Copyright (C) 1996, 1997, 1999 Jakub Jelinek (jakub@redhat.com)
 */

#include "VIS.h"

#ifdef REGS_64BIT
#define SET_BLOCKS(base, offset, source)	\
	stx	source, [base - offset - 0x18];	\
	stx	source, [base - offset - 0x10];	\
	stx	source, [base - offset - 0x08];	\
	stx	source, [base - offset - 0x00];
#else
#define SET_BLOCKS(base, offset, source)	\
	stw	source, [base - offset - 0x18];	\
	stw	source, [base - offset - 0x14];	\
	stw	source, [base - offset - 0x10];	\
	stw	source, [base - offset - 0x0c];	\
	stw	source, [base - offset - 0x08];	\
	stw	source, [base - offset - 0x04];	\
	stw	source, [base - offset - 0x00];	\
	stw	source, [base - offset + 0x04];
#endif

#ifndef __KERNEL__
/* So that the brz,a,pt in memset doesn't have to get through PLT, here we go... */
#include "VISbzero.S"
#endif

#ifdef __KERNEL__
#include <asm/visasm.h>
#endif

	/* Well, memset is a lot easier to get right than bcopy... */
	.text
	.align		32
#ifdef __KERNEL__
	.globl		__memset
__memset:
#endif
	.globl		memset
memset:
#ifndef __KERNEL__
	brz,a,pt	%o1, bzero_private
	 mov		%o2, %o1
#ifndef REGS_64BIT
	srl		%o2, 0, %o2
#endif
#endif
	mov		%o0, %o4
	cmp		%o2, 7
	bleu,pn		%xcc, 17f
	 andcc		%o0, 3, %g5
	be,pt		%xcc, 4f
	 and		%o1, 0xff, %o1
	cmp		%g5, 3
	be,pn		%xcc, 2f
	 stb		%o1, [%o0 + 0x00]
	cmp		%g5, 2
	be,pt		%xcc, 2f
	 stb		%o1, [%o0 + 0x01]
	stb		%o1, [%o0 + 0x02]
2:	sub		%g5, 4, %g5
	sub		%o0, %g5, %o0
	add		%o2, %g5, %o2
4:	sllx		%o1, 8, %g1
	andcc		%o0, 4, %g0
	or		%o1, %g1, %o1
	sllx		%o1, 16, %g1
	or		%o1, %g1, %o1
	be,pt		%xcc, 2f
#ifdef REGS_64BIT
	 sllx		%o1, 32, %g1
#else
	 cmp		%o2, 128
#endif
	stw		%o1, [%o0]
	sub		%o2, 4, %o2
	add		%o0, 4, %o0
2:
#ifdef REGS_64BIT
	cmp		%o2, 128
	or		%o1, %g1, %o1
#endif
	blu,pn		%xcc, 9f
	 andcc		%o0, 0x38, %g5
	be,pn		%icc, 6f
	 mov		64, %o5
	andcc		%o0, 8, %g0
	be,pn		%icc, 1f
	 sub		%o5, %g5, %o5
#ifdef REGS_64BIT
	stx		%o1, [%o0]
#else
	stw		%o1, [%o0]
	stw		%o1, [%o0 + 4]
#endif
	add		%o0, 8, %o0
1:	andcc		%o5, 16, %g0
	be,pn		%icc, 1f
	 sub		%o2, %o5, %o2
#ifdef REGS_64BIT
	stx		%o1, [%o0]
	stx		%o1, [%o0 + 8]
#else
	stw		%o1, [%o0]
	stw		%o1, [%o0 + 4]
	stw		%o1, [%o0 + 8]
	stw		%o1, [%o0 + 12]
#endif
	add		%o0, 16, %o0
1:	andcc		%o5, 32, %g0
	be,pn		%icc, 7f
	 andncc		%o2, 0x3f, %o3
#ifdef REGS_64BIT
	stx		%o1, [%o0]
	stx		%o1, [%o0 + 8]
	stx		%o1, [%o0 + 16]
	stx		%o1, [%o0 + 24]
#else
	stw		%o1, [%o0]
	stw		%o1, [%o0 + 4]
	stw		%o1, [%o0 + 8]
	stw		%o1, [%o0 + 12]
	stw		%o1, [%o0 + 16]
	stw		%o1, [%o0 + 20]
	stw		%o1, [%o0 + 24]
	stw		%o1, [%o0 + 28]
#endif
	add		%o0, 32, %o0
7:	be,pn		%xcc, 9f
	 nop
#ifdef __KERNEL__
	VISEntryHalf
#endif
	ldd		[%o0 - 8], %f0
18:	rd		%asi, %g2
	wr		%g0, ASI_BLK_P, %asi
	membar		#StoreStore | #LoadStore
	andcc		%o3, 0xc0, %g5
	and		%o2, 0x3f, %o2
	fmovd		%f0, %f2
	fmovd		%f0, %f4
	andn		%o3, 0xff, %o3
	fmovd		%f0, %f6
	cmp		%g5, 64
	fmovd		%f0, %f8
	fmovd		%f0, %f10
	fmovd		%f0, %f12
	brz,pn		%g5, 10f
	 fmovd		%f0, %f14
	be,pn		%icc, 2f
	 stda		%f0, [%o0 + 0x00] %asi
	cmp		%g5, 128
	be,pn		%icc, 2f
	 stda		%f0, [%o0 + 0x40] %asi
	stda		%f0, [%o0 + 0x80] %asi
2:	brz,pn		%o3, 12f
	 add		%o0, %g5, %o0
10:	stda		%f0, [%o0 + 0x00] %asi
	stda		%f0, [%o0 + 0x40] %asi
	stda		%f0, [%o0 + 0x80] %asi
	stda		%f0, [%o0 + 0xc0] %asi
11:	subcc		%o3, 256, %o3
	bne,pt		%xcc, 10b
	 add		%o0, 256, %o0
12:
#ifdef __KERNEL__
	wr		%g2, %g0, %asi
	VISExitHalf
#else
#ifndef REGS_64BIT
	wr		%g0, FPRS_FEF, %fprs
#endif
#endif
	membar		#StoreLoad | #StoreStore
9:	andcc		%o2, 0x78, %g5
	be,pn		%xcc, 13f
	 andcc		%o2, 7, %o2
#ifdef __KERNEL__
14:	srl		%g5, 1, %o3
	sethi		%hi(13f), %g3
	sub		%g3, %o3, %g3
	jmpl		%g3 + %lo(13f), %g0
	 add		%o0, %g5, %o0
#else
14:	rd		%pc, %g3
#ifdef REGS_64BIT
	srl		%g5, 1, %o3
	sub		%g3, %o3, %g3
#else
	sub		%g3, %g5, %g3
#endif
	jmpl		%g3 + (13f - 14b), %g0
	 add		%o0, %g5, %o0
#endif
12:	SET_BLOCKS(%o0, 0x68, %o1)
	SET_BLOCKS(%o0, 0x48, %o1)
	SET_BLOCKS(%o0, 0x28, %o1)
	SET_BLOCKS(%o0, 0x08, %o1)
13:	be,pn		%xcc, 8f
	 andcc		%o2, 4, %g0
	be,pn		%xcc, 1f
	 andcc		%o2, 2, %g0
	stw		%o1, [%o0]
	add		%o0, 4, %o0
1:	be,pn		%xcc, 1f
	 andcc		%o2, 1, %g0
	sth		%o1, [%o0]
	add		%o0, 2, %o0
1:	bne,a,pn	%xcc, 8f
	 stb		%o1, [%o0]
8:	retl
	 mov		%o4, %o0
17:	brz,pn		%o2, 0f
8:	 add		%o0, 1, %o0
	subcc		%o2, 1, %o2
	bne,pt		%xcc, 8b
	 stb		%o1, [%o0 - 1]
0:	retl
	 mov		%o4, %o0
6:
#ifdef REGS_64BIT
	stx		%o1, [%o0]
#else
	stw		%o1, [%o0]
	stw		%o1, [%o0 + 4]
#endif
	andncc		%o2, 0x3f, %o3
	be,pn		%xcc, 9b
	 nop
#ifdef __KERNEL__
	VISEntryHalf
#endif
	ba,pt		%xcc, 18b
	 ldd		[%o0], %f0
#define __ver_npregs	smp_f7e03752
#define npregs	_set_ver(npregs)
#define __ver_rrm_command	smp_86387e79
#define rrm_command	_set_ver(rrm_command)
#define __ver_rrm_close	smp_642e8851
#define rrm_close	_set_ver(rrm_close)
SOUND_OSS == 4)} then {write_tristate $cfg $autocfg CONFIG_SOUND_NM256 $CONFIG_SOUND_NM256 [list $CONFIG_SOUND_OSS] 2 }
	global CONFIG_SOUND_MAD16
	if {($CONFIG_SOUND != 0) && ($CONFIG_SOUND_OSS == 1 || $CONFIG_SOUND_OSS == 2) && ($CONFIG_SOUND_OSS == 1 || $CONFIG_SOUND_OSS == 2 || $CONFIG_SOUND_OSS == 4)} then {write_tristate $cfg $autocfg CONFIG_SOUND_MAD16 $CONFIG_SOUND_MAD16 [list $CONFIG_SOUND_OSS] 2 }
	global CONFIG_MAD16_OLDCARD
	if {($CONFIG_SOUND != 0) && ($CONFIG_SOUND_OSS == 1 || $CONFIG_SOUND_OSS == 2) && ($CONFIG_SOUND_MAD16 == 1 || $CONFIG_SOUND_MAD16 == 2)} then {write_tristate $cfg $autocfg CONFIG_MAD16_OLDCARD $CONFIG_MAD16_OLDCARD [list $notmod] 2 }
	global CONFIG_SOUND_PAS
	if {($CONFIG_SOUND != 0) && ($CONFIG_SOUND_OSS == 1 || $CONFIG_SOUND_OSS == 2) && ($CONFIG_SOUND_OSS == 1 || $CONFIG_SOUND_OSS == 2 || $CONFIG_SOUND_OSS == 4)} then {write_tristate $cfg $autocfg CONFIG_SOUND_PAS $CONFIG_SOUND_PAS [list $CONFIG_SOUND_OSS] 2 }
	global CONFIG_PAS_JOYSTICK
	if {($CONFIG_SOUND != 0) && ($CONFIG_SOUND_OSS == 1 || $CONFIG_SOUND_OSS == 2) && ($CONFIG_SOUND_PAS == 1 || $CONFIG_SOUND_PAS == 4)} then {write_tristate $cfg $autocfg CONFIG_PAS_JOYSTICK $CONFIG_PAS_JOYSTICK [list $CONFIG_SOUND_PAS] 2 }
	global CONFIG_SOUND_PSS
	if {($CONFIG_SOUND != 0) && ($CONFIG_SOUND_OSS == 1 || $CONFIG_SOUND_OSS == 2) && ($CONFIG_SOUND_OSS == 1 || $CONFIG_SOUND_OSS == 2 || $CONFIG_SOUND_OSS == 4)} then {write_tristate $cfg $autocfg CONFIG_SOUND_PSS $CONFIG_SOUND_PSS [list $CONFIG_SOUND_OSS] 2 }
	global CONFIG_PSS_MIXER
	if {($CONFIG_SOUND != 0) && ($CONFIG_SOUND_OSS == 1 || $CONFIG_SOUND_OSS == 2) && ($CONFIG_SOUND_PSS == 1 || $CONFIG_SOUND_PSS == 2)} then {write_tristate $cfg $autocfg CONFIG_PSS_MIXER $CONFIG_PSS_MIXER [list $notmod] 2 }
	global CONFIG_PSS_HAVE_BOOT
	if {($CONFIG_SOUND != 0) && ($CONFIG_SOUND_OSS == 1 || $CONFIG_SOUND_OSS == 2) && ($CONFIG_SOUND_PSS == 1 || $CONFIG_SOUND_PSS == 2)} then {write_tristate $cfg $autocfg CONFIG_PSS_HAVE_BOOT $CONFIG_PSS_HAVE_BOOT [list $notmod] 2 }
	global CONFIG_PSS_BOOT_FILE
	if {($CONFIG_SOUND != 0) && ($CONFIG_SOUND_OSS == 1 || $CONFIG_SOUND_OSS == 2) && ($CONFIG_SOUND_PSS == 1 || $CONFIG_SOUND_PSS == 2) && ($CONFIG_PSS_HAVE_BOOT == 1)} then {write_string $cfg $autocfg CONFIG_PSS_BOOT_FILE "$CONFIG_PSS_BOOT_FILE" $notmod }
	global CONFIG_SOUND_SB
	if {($CONFIG_SOUND != 0) && ($CONFIG_SOUND_OSS == 1 || $CONFIG_SOUND_OSS == 2) && ($CONFIG_SOUND_OSS == 1 || $CONFIG_SOUND_OSS == 2 || $CONFIG_SOUND_OSS == 4)} then {write_tristate $cfg $autocfg CONFIG_SOUND_SB $CONFIG_SOUND_SB [list $CONFIG_SOUND_OSS] 2 }
	global CONFIG_SOUND_AWE32_SYNTH
	if {($CONFIG_SOUND != 0) && ($CONFIG_SOUND_OSS == 1 || $CONFIG_SOUND_OSS == 2) && ($CONFIG_SOUND_OSS == 1 || $CONFIG_SOUND_OSS == 2 || $CONFIG_SOUND_OSS == 4)} then {write_tristate $cfg $autocfg CONFIG_SOUND_AWE32_SYNTH $CONFIG_SOUND_AWE32_SYNTH [list $CONFIG_SOUND_OSS] 2 }
	global CONFIG_SOUND_WAVEFRONT
	if {($CONFIG_SOUND != 0) && ($CONFIG_SOUND_OSS == 1 || $CONFIG_SOUND_OSS == 2) && ($CONFIG_SOUND_OSS == 1 || $CONFIG_SOUND_OSS == 2 || $CONFIG_SOUND_OSS == 4)} then {write_tristate $cfg $autocfg CONFIG_SOUND_WAVEFRONT $CONFIG_SOUND_WAVEFRONT [list $CONFIG_SOUND_OSS $CONSTANT_M] 2 }
	global CONFIG_SOUND_MAUI
	if {($CONFIG_SOUND != 0) && ($CONFIG_SOUND_OSS == 1 || $CONFIG_SOUND_OSS == 2) && ($CONFIG_SOUND_OSS == 1 || $CONFIG_SOUND_OSS == 2 || $CONFIG_SOUND_OSS == 4)} then {write_tristate $cfg $autocfg CONFIG_SOUND_MAUI $CONFIG_SOUND_MAUI [list $CONFIG_SOUND_OSS] 2 }
	global CONFIG_MAUI_HAVE_BOOT
	if {($CONFIG_SOUND != 0) && ($CONFIG_SOUND_OSS == 1 || $CONFIG_SOUND_OSS == 2) && ($CONFIG_SOUND_MAUI == 1)} then {write_tristate $cfg $autocfg CONFIG_MAUI_HAVE_BOOT $CONFIG_MAUI_HAVE_BOOT [list $notmod] 2 }
	global CONFIG_MAUI_BOOT_FILE
	if {($CONFIG_SOUND != 0) && ($CONFIG_SOUND_OSS == 1 || $CONFIG_SOUND_OSS == 2) && ($CONFIG_SOUND_MAUI == 1) && ($CONFIG_MAUI_HAVE_BOOT == 1)} then {write_string $cfg $autocfg CONFIG_MAUI_BOOT_FILE "$CONFIG_MAUI_BOOT_FILE" $notmod }
	global CONFIG_SOUND_YM3812
	if {($CONFIG_SOUND != 0) && ($CONFIG_SOUND_OSS == 1 || $CONFIG_SOUND_OSS == 2) && ($CONFIG_SOUND_OSS == 1 || $CONFIG_SOUND_OSS == 2 || $CONFIG_SOUND_OSS == 4)} then {write_tristate $cfg $autocfg CONFIG_SOUND_YM3812 $CONFIG_SOUND_YM3812 [list $CONFIG_SOUND_OSS] 2 }
	global CONFIG_SOUND_OPL3SA1
	if {($CONFIG_SOUND != 0) && ($CONFIG_SOUND_OSS == 1 || $CONFIG_SOUND_OSS == 2) && ($CONFIG_SOUND_OSS == 1 || $CONFIG_SOUND_OSS == 2 || $CONFIG_SOUND_OSS == 4)} then {write_tristate $cfg $autocfg CONFIG_SOUND_OPL3SA1 $CONFIG_SOUND_OPL3SA1 [list $CONFIG_SOUND_OSS] 2 }
	global CONFIG_SOUND_OPL3SA2
	if {($CONFIG_SOUND != 0) && ($CONFIG_SOUND_OSS == 1 || $CONFIG_SOUND_OSS == 2) && ($CONFIG_SOUND_OSS == 1 || $CONFIG_SOUND_OSS == 2 || $CONFIG_SOUND_OSS == 4)} then {write_tristate $cfg $autocfg CONFIG_SOUND_OPL3SA2 $CONFIG_SOUND_OPL3SA2 [list $CONFIG_SOUND_OSS] 2 }
	global CONFIG_SOUND_YMFPCI
	if {($CONFIG_SOUND != 0) && ($CONFIG_SOUND_OSS == 1 || $CONFIG_SOUND_OSS == 2) && ($CONFIG_SOUND_OSS == 1 || $CONFIG_SOUND_OSS == 2 || $CONFIG_SOUND_OSS == 4) && ($CONFIG_PCI == 1 || $CONFIG_PCI == 2 || $CONFIG_PCI == 4)} then {write_tristate $cfg $autocfg CONFIG_SOUND_YMFPCI $CONFIG_SOUND_YMFPCI [list $CONFIG_SOUND_OSS $CONFIG_PCI] 2 }
	global CONFIG_SOUND_YMFPCI_LEGACY
	if {($CONFIG_SOUND != 0) && ($CONFIG_SOUND_OSS == 1 || $CONFIG_SOUND_OSS == 2) && ($CONFIG_SOUND_YMFPCI == 1 || $CONFIG_SOUND_YMFPCI == 2 || $CONFIG_SOUND_YMFPCI == 4)} then {write_tristate $cfg $autocfg CONFIG_SOUND_YMFPCI_LEGACY $CONFIG_SOUND_YMFPCI_LEGACY [list $CONFIG_SOUND_YMFPCI] 1 }
	global CONFIG_SOUND_UART6850
	if {($CONFIG_SOUND != 0) && ($CONFIG_SOUND_OSS == 1 || $CONFIG_SOUND_OSS == 2) && ($CONFIG_SOUND_OSS == 1 || $CONFIG_SOUND_OSS == 2 || $CONFIG_SOUND_OSS == 4)} then {write_tristate $cfg $autocfg CONFIG_SOUND_UART6850 $CONFIG_SOUND_UART6850 [list $CONFIG_SOUND_OSS] 2 }
	global CONFIG_SOUND_AEDSP16
	if {($CONFIG_SOUND != 0) && ($CONFIG_SOUND_OSS == 1 || $CONFIG_SOUND_OSS == 2) && ($CONFIG_SOUND_OSS == 1 || $CONFIG_SOUND_OSS == 2 || $CONFIG_SOUND_OSS == 4)} then {write_tristate $cfg $autocfg CONFIG_SOUND_AEDSP16 $CONFIG_SOUND_AEDSP16 [list $CONFIG_SOUND_OSS] 2 }
	global CONFIG_SC6600
	if {($CONFIG_SOUND != 0) && ($CONFIG_SOUND_OSS == 1 || $CONFIG_SOUND_OSS == 2) && ($CONFIG_SOUND_AEDSP16 == 1 || $CONFIG_SOUND_AEDSP16 == 2)} then {write_tristate $cfg $autocfg CONFIG_SC6600 $CONFIG_SC6600 [list $notmod] 2 }
	global CONFIG_SC6600_JOY
	if {($CONFIG_SOUND != 0) && ($CONFIG_SOUND_OSS == 1 || $CONFIG_SOUND_OSS == 2) && ($CONFIG_SOUND_AEDSP16 == 1 || $CONFIG_SOUND_AEDSP16 == 2) && ($CONFIG_SC6600 == 1)} then {write_tristate $cfg $autocfg CONFIG_SC6600_JOY $CONFIG_SC6600_JOY [list $notmod] 2 }
	global CONFIG_SC6600_CDROM
	if {($CONFIG_SOUND != 0) && ($CONFIG_SOUND_OSS == 1 || $CONFIG_SOUND_OSS == 2) && ($CONFIG_SOUND_AEDSP16 == 1 || $CONFIG_SOUND_AEDSP16 == 2) && ($CONFIG_SC6600 == 1)} then {write_int $cfg $autocfg CONFIG_SC6600_CDROM $CONFIG_SC6600_CDROM $notmod }
	global CONFIG_SC6600_CDROMBASE
	if {($CONFIG_SOUND != 0) && ($CONFIG_SOUND_OSS == 1 || $CONFIG_SOUND_OSS == 2) && ($CONFIG_SOUND_AEDSP16 == 1 || $CONFIG_SOUND_AEDSP16 == 2) && ($CONFIG_SC6600 == 1)} then {write_hex $cfg $autocfg CONFIG_SC6600_CDROMBASE $CONFIG_SC6600_CDROMBASE $notmod }
	global CONFIG_AEDSP16_SBPRO
	global CONFIG_AEDSP16_MSS
	if {($CONFIG_SOUND != 0) && ($CONFIG_SOUND_OSS == 1 || $CONFIG_SOUND_OSS == 2) && ($CONFIG_SOUND_AEDSP16 == 1 || $CONFIG_SOUND_AEDSP16 == 2) && ($CONFIG_SOUND_SB == 1 || $CONFIG_SOUND_SB == 2) && ($CONFIG_AEDSP16_MSS != 1)} then {write_tristate $cfg $autocfg CONFIG_AEDSP16_SBPRO $CONFIG_AEDSP16_SBPRO [list $notmod] 2 }
	if {($CONFIG_SOUND != 0) && ($CONFIG_SOUND_OSS == 1 || $CONFIG_SOUND_OSS == 2) && ($CONFIG_SOUND_AEDSP16 == 1 || $CONFIG_SOUND_AEDSP16 == 2) && ($CONFIG_SOUND_MSS == 1 || $CONFIG_SOUND_MSS == 2) && ($CONFIG_AEDSP16_SBPRO != 1)} then {write_tristate $cfg $autocfg CONFIG_AEDSP16_MSS $CONFIG_AEDSP16_MSS [list $notmod] 2 }
	global CONFIG_AEDSP16_MPU401
	if {($CONFIG_SOUND != 0) && ($CONFIG_SOUND_OSS == 1 || $CONFIG_SOUND_OSS == 2) && ($CONFIG_SOUND_AEDSP16 == 1 || $CONFIG_SOUND_AEDSP16 == 2) && ($CONFIG_SOUND_MPU401 == 1 || $CONFIG_SOUND_MPU401 == 2)} then {write_tristate $cfg $autocfg CONFIG_AEDSP16_MPU401 $CONFIG_AEDSP16_MPU401 [list $notmod] 2 }
	global CONFIG_SOUND_TVMIXER
	if {($CONFIG_SOUND != 0) && ($CONFIG_SOUND == 1 || $CONFIG_SOUND == 2 || $CONFIG_SOUND == 4) && ($CONFIG_I2C == 1 || $CONFIG_I2C == 2 || $CONFIG_I2C == 4)} then {write_tristate $cfg $autocfg CONFIG_SOUND_TVMIXER $CONFIG_SOUND_TVMIXER [list $CONFIG_SOUND $CONFIG_I2C] 2 }
	if {($CONFIG_SOUND != 0) && ($CONFIG_INPUT_GAMEPORT != 0) && ($CONFIG_SOUND_ESSSOLO1 == 1 || $CONFIG_SOUND_ES1370 == 1 || $CONFIG_SOUND_ES1371 == 1 || $CONFIG_SOUND_SONICVIBES == 1)} then {write_tristate $cfg $autocfg CONFIG_INPUT_GAMEPORT $CONSTANT_Y [list $notmod] 2 }
	write_comment $cfg $autocfg "USB support"
	if {($CONFIG_PCI == 1 || $CONFIG_PCI == 2 || $CONFIG_PCI == 4)} then {write_tristate $cfg $autocfg CONFIG_USB $CONFIG_USB [list $CONFIG_PCI] 2 }
	global CONFIG_USB_DEBUG
	if {($CONFIG_USB == 1 || $CONFIG_USB == 2)} then {write_tristate $cfg $autocfg CONFIG_USB_DEBUG $CONFIG_USB_DEBUG [list $notmod] 2 }
	if {($CONFIG_USB == 1 || $CONFIG_USB == 2)} then {write_comment $cfg $autocfg "Miscellaneous USB options"}
	global CONFIG_USB_DEVICEFS
	if {($CONFIG_USB == 1 || $CONFIG_USB == 2)} then {write_tristate $cfg $autocfg CONFIG_USB_DEVICEFS $CONFIG_USB_DEVICEFS [list $notmod] 2 }
	global CONFIG_USB_BANDWIDTH
	if {($CONFIG_USB == 1 || $CONFIG_USB == 2) && ($CONFIG_EXPERIMENTAL == 1)} then {write_tristate $cfg $autocfg CONFIG_USB_BANDWIDTH $CONFIG_USB_BANDWIDTH [list $notmod] 2 }
	if {($CONFIG_USB == 1 || $CONFIG_USB == 2) && ($CONFIG_EXPERIMENTAL != 1)} then {write_tristate $cfg $autocfg CONFIG_USB_BANDWIDTH $CONSTANT_N [list $notmod] 2 }
	global CONFIG_USB_LONG_TIMEOUT
	if {($CONFIG_USB == 1 || $CONFIG_USB == 2)} then {write_tristate $cfg $autocfg CONFIG_USB_LONG_TIMEOUT $CONFIG_USB_LONG_TIMEOUT [list $notmod] 2 }
	if {($CONFIG_USB == 1 || $CONFIG_USB == 2)} then {write_comment $cfg $autocfg "USB Host Controller Drivers"}
	global CONFIG_USB_EHCI_HCD
	if {($CONFIG_USB == 1 || $CONFIG_USB == 2) && ($CONFIG_USB == 1 || $CONFIG_USB == 2 || $CONFIG_USB == 4) && ($CONFIG_EXPERIMENTAL == 1 || $CONFIG_EXPERIMENTAL == 2 || $CONFIG_EXPERIMENTAL == 4)} then {write_tristate $cfg $autocfg CONFIG_USB_EHCI_HCD $CONFIG_USB_EHCI_HCD [list $CONFIG_USB $CONFIG_EXPERIMENTAL] 2 }
	global CONFIG_USB_UHCI
	global CONFIG_USB_UHCI_ALT
	if {($CONFIG_USB == 1 || $CONFIG_USB == 2) && ($CONFIG_USB_UHCI_ALT != 1) && ($CONFIG_USB == 1 || $CONFIG_USB == 2 || $CONFIG_USB == 4)} then {write_tristate $cfg $autocfg CONFIG_USB_UHCI $CONFIG_USB_UHCI [list $CONFIG_USB] 2 }
	if {($CONFIG_USB == 1 || $CONFIG_USB == 2) && ($CONFIG_USB_UHCI != 1) && ($CONFIG_USB == 1 || $CONFIG_USB == 2 || $CONFIG_USB == 4)} then {write_tristate $cfg $autocfg CONFIG_USB_UHCI_ALT $CONFIG_USB_UHCI_ALT [list $CONFIG_USB] 2 }
	if {($CONFIG_USB == 1 || $CONFIG_USB == 2) && ($CONFIG_USB_UHCI == 1)} then {write_tristate $cfg $autocfg CONFIG_USB_UHCI_ALT $CONSTANT_N [list $notmod] 2 }
	global CONFIG_USB_OHCI
	if {($CONFIG_USB == 1 || $CONFIG_USB == 2) && ($CONFIG_USB == 1 || $CONFIG_USB == 2 || $CONFIG_USB == 4)} then {write_tristate $cfg $autocfg CONFIG_USB_OHCI $CONFIG_USB_OHCI [list $CONFIG_USB] 2 }
	if {($CONFIG_USB == 1 || $CONFIG_USB == 2)} then {write_comment $cfg $autocfg "USB Device Class drivers"}
	global CONFIG_USB_AUDIO
	if {($CONFIG_USB == 1 || $CONFIG_USB == 2) && ($CONFIG_USB == 1 || $CONFIG_USB == 2 || $CONFIG_USB == 4) && ($CONFIG_SOUND == 1 || $CONFIG_SOUND == 2 || $CONFIG_SOUND == 4)} then {write_tristate $cfg $autocfg CONFIG_USB_AUDIO $CONFIG_USB_AUDIO [list $CONFIG_USB $CONFIG_SOUND] 2 }
	global CONFIG_USB_EMI26
	if {($CONFIG_USB == 1 || $CONFIG_USB == 2) && ($CONFIG_USB_AUDIO == 1 || $CONFIG_USB_AUDIO == 2 || $CONFIG_USB_AUDIO == 4)} then {write_tristate $cfg $autocfg CONFIG_USB_EMI26 $CONFIG_USB_EMI26 [list $CONFIG_USB_AUDIO] 2 }
	global CONFIG_USB_BLUETOOTH
	if {($CONFIG_USB == 1 || $CONFIG_USB == 2) && ($CONFIG_USB == 1 || $CONFIG_USB == 2 || $CONFIG_USB == 4) && ($CONFIG_EXPERIMENTAL == 1 || $CONFIG_EXPERIMENTAL == 2 || $CONFIG_EXPERIMENTAL == 4)} then {write_tristate $cfg $autocfg CONFIG_USB_BLUETOOTH $CONFIG_USB_BLUETOOTH [list $CONFIG_USB $CONFIG_EXPERIMENTAL] 2 }
	if {($CONFIG_USB == 1 || $CONFIG_USB == 2) && ($CONFIG_SCSI == 0)} then {write_comment $cfg $autocfg "  SCSI support is needed for USB Storage"}
	global CONFIG_USB_STORAGE
	if {($CONFIG_USB == 1 || $CONFIG_USB == 2) && ($CONFIG_USB == 1 || $CONFIG_USB == 2 || $CONFIG_USB == 4) && ($CONFIG_SCSI == 1 || $CONFIG_SCSI == 2 || $CONFIG_SCSI == 4)} then {write_tristate $cfg $autocfg CONFIG_USB_STORAGE $CONFIG_USB_STORAGE [list $CONFIG_USB $CONFIG_SCSI] 2 }
	global CONFIG_USB_STORAGE_DEBUG
	if {($CONFIG_USB == 1 || $CONFIG_USB == 2) && ($CONFIG_USB_STORAGE == 1 || $CONFIG_USB_STORAGE == 2 || $CONFIG_USB_STORAGE == 4)} then {write_tristate $cfg $autocfg CONFIG_USB_STORAGE_DEBUG $CONFIG_USB_STORAGE_DEBUG [list $CONFIG_USB_STORAGE] 1 }
	global CONFIG_USB_STORAGE_DATAFAB
	if {($CONFIG_USB == 1 || $CONFIG_USB == 2) && ($CONFIG_USB_STORAGE == 1 || $CONFIG_USB_STORAGE == 2 || $CONFIG_USB_STORAGE == 4) && ($CONFIG_EXPERIMENTAL == 1 || $CONFIG_EXPERIMENTAL == 2 || $CONFIG_EXPERIMENTAL == 4)} then {write_tristate $cfg $autocfg CONFIG_USB_STORAGE_DATAFAB $CONFIG_USB_STORAGE_DATAFAB [list $CONFIG_USB_STORAGE $CONFIG_EXPERIMENTAL] 1 }
	global CONFIG_USB_STORAGE_FREECOM
	if {($CONFIG_USB == 1 || $CONFIG_USB == 2) && ($CONFIG_USB_STORAGE == 1 || $CONFIG_USB_STORAGE == 2 || $CONFIG_USB_STORAGE == 4)} then {write_tristate $cfg $autocfg CONFIG_USB_STORAGE_FREECOM $CONFIG_USB_STORAGE_FREECOM [list $CONFIG_USB_STORAGE] 1 }
	global CONFIG_USB_STORAGE_ISD200
	if {($CONFIG_USB == 1 || $CONFIG_USB == 2) && ($CONFIG_USB_STORAGE == 1 || $CONFIG_USB_STORAGE == 2 || $CONFIG_USB_STORAGE == 4)} then {write_tristate $cfg $autocfg CONFIG_USB_STORAGE_ISD200 $CONFIG_USB_STORAGE_ISD200 [list $CONFIG_USB_STORAGE] 1 }
	global CONFIG_USB_STORAGE_DPCM
	if {($CONFIG_USB == 1 || $CONFIG_USB == 2) && ($CONFIG_USB_STORAGE == 1 || $CONFIG_USB_STORAGE == 2 || $CONFIG_USB_STORAGE == 4)} then {write_tristate $cfg $autocfg CONFIG_USB_STORAGE_DPCM $CONFIG_USB_STORAGE_DPCM [list $CONFIG_USB_STORAGE] 1 }
	global CONFIG_USB_STORAGE_HP8200e
	if {($CONFIG_USB == 1 || $CONFIG_USB == 2) && ($CONFIG_USB_STORAGE == 1 || $CONFIG_USB_STORAGE == 2 || $CONFIG_USB_STORAGE == 4) && ($CONFIG_EXPERIMENTAL == 1 || $CONFIG_EXPERIMENTAL == 2 || $CONFIG_EXPERIMENTAL == 4)} then {write_tristate $cfg $autocfg CONFIG_USB_STORAGE_HP8200e $CONFIG_USB_STORAGE_HP8200e [list $CONFIG_USB_STORAGE $CONFIG_EXPERIMENTAL] 1 }
	global CONFIG_USB_STORAGE_SDDR09
	if {($CONFIG_USB == 1 || $CONFIG_USB == 2) && ($CONFIG_USB_STORAGE == 1 || $CONFIG_USB_STORAGE == 2 || $CONFIG_USB_STORAGE == 4) && ($CONFIG_EXPERIMENTAL == 1 || $CONFIG_EXPERIMENTAL == 2 || $CONFIG_EXPERIMENTAL == 4)} then {write_tristate $cfg $autocfg CONFIG_USB_STORAGE_SDDR09 $CONFIG_USB_STORAGE_SDDR09 [list $CONFIG_USB_STORAGE $CONFIG_EXPERIMENTAL] 1 }
	global CONFIG_USB_STORAGE_JUMPSHOT
	if {($CONFIG_USB == 1 || $CONFIG_USB == 2) && ($CONFIG_USB_STORAGE == 1 || $CONFIG_USB_STORAGE == 2 || $CONFIG_USB_STORAGE == 4) && ($CONFIG_EXPERIMENTAL == 1 || $CONFIG_EXPERIMENTAL == 2 || $CONFIG_EXPERIMENTAL == 4)} then {write_tristate $cfg $autocfg CONFIG_USB_STORAGE_JUMPSHOT $CONFIG_USB_STORAGE_JUMPSHOT [list $CONFIG_USB_STORAGE $CONFIG_EXPERIMENTAL] 1 }
	global CONFIG_USB_ACM
	if {($CONFIG_USB == 1 || $CONFIG_USB == 2) && ($CONFIG_USB == 1 || $CONFIG_USB == 2 || $CONFIG_USB == 4)} then {write_tristate $cfg $autocfg CONFIG_USB_ACM $CONFIG_USB_ACM [list $CONFIG_USB] 2 }
	global CONFIG_USB_PRINTER
	if {($CONFIG_USB == 1 || $CONFIG_USB == 2) && ($CONFIG_USB == 1 || $CONFIG_USB == 2 || $CONFIG_USB == 4)} then {write_tristate $cfg $autocfg CONFIG_USB_PRINTER $CONFIG_USB_PRINTER [list $CONFIG_USB] 2 }
	if {($CONFIG_USB == 1 || $CONFIG_USB == 2)} then {write_comment $cfg $autocfg "USB Human Interface Devices (HID)"}
	if {($CONFIG_USB == 1 || $CONFIG_USB == 2) && ($CONFIG_INPUT == 0)} then {write_comment $cfg $autocfg "  Input core support is needed for USB HID"}
	global CONFIG_USB_HID
	if {($CONFIG_USB == 1 || $CONFIG_USB == 2) && ($CONFIG_INPUT != 0) && ($CONFIG_USB == 1 || $CONFIG_USB == 2 || $CONFIG_USB == 4) && ($CONFIG_INPUT == 1 || $CONFIG_INPUT == 2 || $CONFIG_INPUT == 4)} then {write_tristate $cfg $autocfg CONFIG_USB_HID $CONFIG_USB_HID [list $CONFIG_USB $CONFIG_INPUT] 2 }
	global CONFIG_USB_HIDDEV
	if {($CONFIG_USB == 1 || $CONFIG_USB == 2) && ($CONFIG_INPUT != 0) && ($CONFIG_USB_HID == 1 || $CONFIG_USB_HID == 2 || $CONFIG_USB_HID == 4)} then {write_tristate $cfg $autocfg CONFIG_USB_HIDDEV $CONFIG_USB_HIDDEV [list $CONFIG_USB_HID] 1 }
	global CONFIG_USB_KBD
	if {($CONFIG_USB == 1 || $CONFIG_USB == 2) && ($CONFIG_INPUT != 0) && ($CONFIG_USB_HID != 1) && ($CONFIG_USB == 1 || $CONFIG_USB == 2 || $CONFIG_USB == 4) && ($CONFIG_INPUT == 1 || $CONFIG_INPUT == 2 || $CONFIG_INPUT == 4)} then {write_tristate $cfg $autocfg CONFIG_USB_KBD $CONFIG_USB_KBD [list $CONFIG_USB $CONFIG_INPUT] 2 }
	global CONFIG_USB_MOUSE
	if {($CONFIG_USB == 1 || $CONFIG_USB == 2) && ($CONFIG_INPUT != 0) && ($CONFIG_USB_HID != 1) && ($CONFIG_USB == 1 || $CONFIG_USB == 2 || $CONFIG_USB == 4) && ($CONFIG_INPUT == 1 || $CONFIG_INPUT == 2 || $CONFIG_INPUT == 4)} then {write_tristate $cfg $autocfg CONFIG_USB_MOUSE $CONFIG_USB_MOUSE [list $CONFIG_USB $CONFIG_INPUT] 2 }
	global CONFIG_USB_WACOM
	if {($CONFIG_USB == 1 || $CONFIG_USB == 2) && ($CONFIG_INPUT != 0) && ($CONFIG_USB == 1 || $CONFIG_USB == 2 || $CONFIG_USB == 4) && ($CONFIG_INPUT == 1 || $CONFIG_INPUT == 2 || $CONFIG_INPUT == 4)} then {write_tristate $cfg $autocfg CONFIG_USB_WACOM $CONFIG_USB_WACOM [list $CONFIG_USB $CONFIG_INPUT] 2 }
	if {($CONFIG_USB == 1 || $CONFIG_USB == 2)} then {write_comment $cfg $autocfg "USB Imaging devices"}
	global CONFIG_USB_DC2XX
	if {($CONFIG_USB == 1 || $CONFIG_USB == 2) && ($CONFIG_USB == 1 || $CONFIG_USB == 2 || $CONFIG_USB == 4)} then {write_tristate $cfg $autocfg CONFIG_USB_DC2XX $CONFIG_USB_DC2XX [list $CONFIG_USB] 2 }
	global CONFIG_USB_MDC800
	if {($CONFIG_USB == 1 || $CONFIG_USB == 2) && ($CONFIG_USB == 1 || $CONFIG_USB == 2 || $CONFIG_USB == 4) && ($CONFIG_EXPERIMENTAL == 1 || $CONFIG_EXPERIMENTAL == 2 || $CONFIG_EXPERIMENTAL == 4)} then {write_tristate $cfg $autocfg CONFIG_USB_MDC800 $CONFIG_USB_MDC800 [list $CONFIG_USB $CONFIG_EXPERIMENTAL] 2 }
	global CONFIG_USB_SCANNER
	if {($CONFIG_USB == 1 || $CONFIG_USB == 2) && ($CONFIG_USB == 1 || $CONFIG_USB == 2 || $CONFIG_USB == 4)} then {write_tristate $cfg $autocfg CONFIG_USB_SCANNER $CONFIG_USB_SCANNER [list $CONFIG_USB] 2 }
	global CONFIG_USB_MICROTEK
	if {($CONFIG_USB == 1 || $CONFIG_USB == 2) && ($CONFIG_USB == 1 || $CONFIG_USB == 2 || $CONFIG_USB == 4) && ($CONFIG_SCSI == 1 || $CONFIG_SCSI == 2 || $CONFIG_SCSI == 4)} then {write_tristate $cfg $autocfg CONFIG_USB_MICROTEK $CONFIG_USB_MICROTEK [list $CONFIG_USB $CONFIG_SCSI] 2 }
	global CONFIG_USB_HPUSBSCSI
	if {($CONFIG_USB == 1 || $CONFIG_USB == 2) && ($CONFIG_USB == 1 || $CONFIG_USB == 2 || $CONFIG_USB == 4) && ($CONFIG_SCSI == 1 || $CONFIG_SCSI == 2 || $CONFIG_SCSI == 4) && ($CONFIG_EXPERIMENTAL == 1 || $CONFIG_EXPERIMENTAL == 2 || $CONFIG_EXPERIMENTAL == 4)} then {write_tristate $cfg $autocfg CONFIG_USB_HPUSBSCSI $CONFIG_USB_HPUSBSCSI [list $CONFIG_USB $CONFIG_SCSI $CONFIG_EXPERIMENTAL] 2 }
	if {($CONFIG_USB == 1 || $CONFIG_USB == 2)} then {write_comment $cfg $autocfg "USB Multimedia devices"}
	if {($CONFIG_USB == 1 || $CONFIG_USB == 2) && ($CONFIG_VIDEO_DEV == 0)} then {write_comment $cfg $autocfg "  Video4Linux support is needed for USB Multimedia device support"}
	global CONFIG_USB_IBMCAM
	if {($CONFIG_USB == 1 || $CONFIG_USB == 2) && ($CONFIG_VIDEO_DEV != 0) && ($CONFIG_USB == 1 || $CONFIG_USB == 2 || $CONFIG_USB == 4) && ($CONFIG_VIDEO_DEV == 1 || $CONFIG_VIDEO_DEV == 2 || $CONFIG_VIDEO_DEV == 4)} then {write_tristate $cfg $autocfg CONFIG_USB_IBMCAM $CONFIG_USB_IBMCAM [list $CONFIG_USB $CONFIG_VIDEO_DEV] 2 }
	global CONFIG_USB_OV511
	if {($CONFIG_USB == 1 || $CONFIG_USB == 2) && ($CONFIG_VIDEO_DEV != 0) && ($CONFIG_USB == 1 || $CONFIG_USB == 2 || $CONFIG_USB == 4) && ($CONFIG_VIDEO_DEV == 1 || $CONFIG_VIDEO_DEV == 2 || $CONFIG_VIDEO_DEV == 4)} then {write_tristate $cfg $autocfg CONFIG_USB_OV511 $CONFIG_USB_OV511 [list $CONFIG_USB $CONFIG_VIDEO_DEV] 2 }
	global CONFIG_USB_PWC
	if {($CONFIG_USB == 1 || $CONFIG_USB == 2) && ($CONFIG_VIDEO_DEV != 0) && ($CONFIG_USB == 1 || $CONFIG_USB == 2 || $CONFIG_USB == 4) && ($CONFIG_VIDEO_DEV == 1 || $CONFIG_VIDEO_DEV == 2 || $CONFIG_VIDEO_DEV == 4)} then {write_tristate $cfg $autocfg CONFIG_USB_PWC $CONFIG_USB_PWC [list $CONFIG_USB $CONFIG_VIDEO_DEV] 2 }
	global CONFIG_USB_SE401
	if {($CONFIG_USB == 1 || $CONFIG_USB == 2) && ($CONFIG_VIDEO_DEV != 0) && ($CONFIG_USB == 1 || $CONFIG_USB == 2 || $CONFIG_USB == 4) && ($CONFIG_VIDEO_DEV == 1 || $CONFIG_VIDEO_DEV == 2 || $CONFIG_VIDEO_DEV == 4)} then {write_tristate $cfg $autocfg CONFIG_USB_SE401 $CONFIG_USB_SE401 [list $CONFIG_USB $CONFIG_VIDEO_DEV] 2 }
	global CONFIG_USB_STV680
	if {($CONFIG_USB == 1 || $CONFIG_USB == 2) && ($CONFIG_VIDEO_DEV != 0) && ($CONFIG_USB == 1 || $CONFIG_USB == 2 || $CONFIG_USB == 4) && ($CONFIG_VIDEO_DEV == 1 || $CONFIG_VIDEO_DEV == 2 || $CONFIG_VIDEO_DEV == 4)} then {write_tristate $cfg $autocfg CONFIG_USB_STV680 $CONFIG_USB_STV680 [list $CONFIG_USB $CONFIG_VIDEO_DEV] 2 }
	global CONFIG_USB_VICAM
	if {($CONFIG_USB == 1 || $CONFIG_USB == 2) && ($CONFIG_VIDEO_DEV != 0) && ($CONFIG_USB == 1 || $CONFIG_USB == 2 || $CONFIG_USB == 4) && ($CONFIG_VIDEO_DEV == 1 || $CONFIG_VIDEO_DEV == 2 || $CONFIG_VIDEO_DEV == 4) && ($CONFIG_EXPERIMENTAL == 1 || $CONFIG_EXPERIMENTAL == 2 || $CONFIG_EXPERIMENTAL == 4)} then {write_tristate $cfg $autocfg CONFIG_USB_VICAM $CONFIG_USB_VICAM [list $CONFIG_USB $CONFIG_VIDEO_DEV $CONFIG_EXPERIMENTAL] 2 }
	global CONFIG_USB_DSBR
	if {($CONFIG_USB == 1 || $CONFIG_USB == 2) && ($CONFIG_VIDEO_DEV != 0) && ($CONFIG_USB == 1 || $CONFIG_USB == 2 || $CONFIG_USB == 4) && ($CONFIG_VIDEO_DEV == 1 || $CONFIG_VIDEO_DEV == 2 || $CONFIG_VIDEO_DEV == 4) && ($CONFIG_EXPERIMENTAL == 1 || $CONFIG_EXPERIMENTAL == 2 || $CONFIG_EXPERIMENTAL == 4)} then {write_tristate $cfg $autocfg CONFIG_USB_DSBR $CONFIG_USB_DSBR [list $CONFIG_USB $CONFIG_VIDEO_DEV $CONFIG_EXPERIMENTAL] 2 }
	global CONFIG_USB_DABUSB
	if {($CONFIG_USB == 1 || $CONFIG_USB == 2) && ($CONFIG_VIDEO_DEV != 0) && ($CONFIG_USB == 1 || $CONFIG_USB == 2 || $CONFIG_USB == 4)} then {write_tristate $cfg $autocfg CONFIG_USB_DABUSB $CONFIG_USB_DABUSB [list $CONFIG_USB] 2 }
	if {($CONFIG_USB == 1 || $CONFIG_USB == 2)} then {write_comment $cfg $autocfg "USB Network adaptors"}
	if {($CONFIG_USB == 1 || $CONFIG_USB == 2) && ($CONFIG_NET == 0)} then {write_comment $cfg $autocfg "  Networking support is needed for USB Networking device support"}
	global CONFIG_USB_PEGASUS
	if {($CONFIG_USB == 1 || $CONFIG_USB == 2) && ($CONFIG_NET != 0) && ($CONFIG_USB == 1 || $CONFIG_USB == 2 || $CONFIG_USB == 4) && ($CONFIG_NET == 1 || $CONFIG_NET == 2 || $CONFIG_NET == 4) && ($CONFIG_EXPERIMENTAL == 1 || $CONFIG_EXPERIMENTAL == 2 || $CONFIG_EXPERIMENTAL == 4)} then {write_tristate $cfg $autocfg CONFIG_USB_PEGASUS $CONFIG_USB_PEGASUS [list $CONFIG_USB $CONFIG_NET $CONFIG_EXPERIMENTAL] 2 }
	global CONFIG_USB_KAWETH
	if {($CONFIG_USB == 1 || $CONFIG_USB == 2) && ($CONFIG_NET != 0) && ($CONFIG_USB == 1 || $CONFIG_USB == 2 || $CONFIG_USB == 4) && ($CONFIG_NET == 1 || $CONFIG_NET == 2 || $CONFIG_NET == 4) && ($CONFIG_EXPERIMENTAL == 1 || $CONFIG_EXPERIMENTAL == 2 || $CONFIG_EXPERIMENTAL == 4)} then {write_tristate $cfg $autocfg CONFIG_USB_KAWETH $CONFIG_USB_KAWETH [list $CONFIG_USB $CONFIG_NET $CONFIG_EXPERIMENTAL] 2 }
	global CONFIG_USB_CATC
	if {($CONFIG_USB == 1 || $CONFIG_USB == 2) && ($CONFIG_NET != 0) && ($CONFIG_USB == 1 || $CONFIG_USB == 2 || $CONFIG_USB == 4) && ($CONFIG_NET == 1 || $CONFIG_NET == 2 || $CONFIG_NET == 4) && ($CONFIG_EXPERIMENTAL == 1 || $CONFIG_EXPERIMENTAL == 2 || $CONFIG_EXPERIMENTAL == 4)} then {write_tristate $cfg $autocfg CONFIG_USB_CATC $CONFIG_USB_CATC [list $CONFIG_USB $CONFIG_NET $CONFIG_EXPERIMENTAL] 2 }
	global CONFIG_USB_CDCETHER
	if {($CONFIG_USB == 1 || $CONFIG_USB == 2) && ($CONFIG_NET != 0) && ($CONFIG_USB == 1 || $CONFIG_USB == 2 || $CONFIG_USB == 4) && ($CONFIG_NET == 1 || $CONFIG_NET == 2 || $CONFIG_NET == 4) && ($CONFIG_EXPERIMENTAL == 1 || $CONFIG_EXPERIMENTAL == 2 || $CONFIG_EXPERIMENTAL == 4)} then {write_tristate $cfg $autocfg CONFIG_USB_CDCETHER $CONFIG_USB_CDCETHER [list $CONFIG_USB $CONFIG_NET $CONFIG_EXPERIMENTAL] 2 }
	global CONFIG_USB_USBNET
	if {($CONFIG_USB == 1 || $CONFIG_USB == 2) && ($CONFIG_NET != 0) && ($CONFIG_USB == 1 || $CONFIG_USB == 2 || $CONFIG_USB == 4) && ($CONFIG_NET == 1 || $CONFIG_NET == 2 || $CONFIG_NET == 4) && ($CONFIG_EXPERIMENTAL == 1 || $CONFIG_EXPERIMENTAL == 2 || $CONFIG_EXPERIMENTAL == 4)} then {write_tristate $cfg $autocfg CONFIG_USB_USBNET $CONFIG_USB_USBNET [list $CONFIG_USB $CONFIG_NET $CONFIG_EXPERIMENTAL] 2 }
	if {($CONFIG_USB == 1 || $CONFIG_USB == 2)} then {write_comment $cfg $autocfg "USB port drivers"}
	global CONFIG_USB_USS720
	if {($CONFIG_USB == 1 || $CONFIG_USB == 2) && ($CONFIG_USB == 1 || $CONFIG_USB == 2 || $CONFIG_USB == 4) && ($CONFIG_PARPORT == 1 || $CONFIG_PARPORT == 2 || $CONFIG_PARPORT == 4)} then {write_tristate $cfg $autocfg CONFIG_USB_USS720 $CONFIG_USB_USS720 [list $CONFIG_USB $CONFIG_PARPORT] 2 }
	if {($CONFIG_USB == 1 || $CONFIG_USB == 2)} then {write_comment $cfg $autocfg "USB Serial Converter support"}
	global CONFIG_USB_SERIAL
	if {($CONFIG_USB == 1 || $CONFIG_USB == 2) && ($CONFIG_USB == 1 || $CONFIG_USB == 2 || $CONFIG_USB == 4)} then {write_tristate $cfg $autocfg CONFIG_USB_SERIAL $CONFIG_USB_SERIAL [list $CONFIG_USB] 2 }
	global CONFIG_USB_SERIAL_DEBUG
	if {($CONFIG_USB == 1 || $CONFIG_USB == 2) && ($CONFIG_USB_SERIAL == 1) && ($CONFIG_USB_SERIAL == 1 || $CONFIG_USB_SERIAL == 2 || $CONFIG_USB_SERIAL == 4)} then {write_tristate $cfg $autocfg CONFIG_USB_SERIAL_DEBUG $CONFIG_USB_SERIAL_DEBUG [list $CONFIG_USB_SERIAL] 1 }
	global CONFIG_USB_SERIAL_GENERIC
	if {($CONFIG_USB == 1 || $CONFIG_USB == 2) && ($CONFIG_USB_SERIAL == 1 || $CONFIG_USB_SERIAL == 2 || $CONFIG_USB_SERIAL == 4)} then {write_tristate $cfg $autocfg CONFIG_USB_SERIAL_GENERIC $CONFIG_USB_SERIAL_GENERIC [list $CONFIG_USB_SERIAL] 1 }
	global CONFIG_USB_SERIAL_BELKIN
	if {($CONFIG_USB == 1 || $CONFIG_USB == 2) && ($CONFIG_USB_SERIAL == 1 || $CONFIG_USB_SERIAL == 2 || $CONFIG_USB_SERIAL == 4) && ($CONFIG_EXPERIMENTAL == 1 || $CONFIG_EXPERIMENTAL == 2 || $CONFIG_EXPERIMENTAL == 4)} then {write_tristate $cfg $autocfg CONFIG_USB_SERIAL_BELKIN $CONFIG_USB_SERIAL_BELKIN [list $CONFIG_USB_SERIAL $CONFIG_EXPERIMENTAL] 2 }
	global CONFIG_USB_SERIAL_WHITEHEAT
	if {($CONFIG_USB == 1 || $CONFIG_USB == 2) && ($CONFIG_USB_SERIAL == 1 || $CONFIG_USB_SERIAL == 2 || $CONFIG_USB_SERIAL == 4) && ($CONFIG_EXPERIMENTAL == 1 || $CONFIG_EXPERIMENTAL == 2 || $CONFIG_EXPERIMENTAL == 4)} then {write_tristate $cfg $autocfg CONFIG_USB_SERIAL_WHITEHEAT $CONFIG_USB_SERIAL_WHITEHEAT [list $CONFIG_USB_SERIAL $CONFIG_EXPERIMENTAL] 2 }
	global CONFIG_USB_SERIAL_DIGI_ACCELEPORT
	if {($CONFIG_USB == 1 || $CONFIG_USB == 2) && ($CONFIG_USB_SERIAL == 1 || $CONFIG_USB_SERIAL == 2 || $CONFIG_USB_SERIAL == 4)} then {write_tristate $cfg $autocfg CONFIG_USB_SERIAL_DIGI_ACCELEPORT $CONFIG_USB_SERIAL_DIGI_ACCELEPORT [list $CONFIG_USB_SERIAL] 2 }
	global CONFIG_USB_SERIAL_EMPEG
	if {($CONFIG_USB == 1 || $CONFIG_USB == 2) && ($CONFIG_USB_SERIAL == 1 || $CONFIG_USB_SERIAL == 2 || $CONFIG_USB_SERIAL == 4) && ($CONFIG_EXPERIMENTAL == 1 || $CONFIG_EXPERIMENTAL == 2 || $CONFIG_EXPERIMENTAL == 4)} then {write_tristate $cfg $autocfg CONFIG_USB_SERIAL_EMPEG $CONFIG_USB_SERIAL_EMPEG [list $CONFIG_USB_SERIAL $CONFIG_EXPERIMENTAL] 2 }
	global CONFIG_USB_SERIAL_FTDI_SIO
	if {($CONFIG_USB == 1 || $CONFIG_USB == 2) && ($CONFIG_USB_SERIAL == 1 || $CONFIG_USB_SERIAL == 2 || $CONFIG_USB_SERIAL == 4) && ($CONFIG_EXPERIMENTAL == 1 || $CONFIG_EXPERIMENTAL == 2 || $CONFIG_EXPERIMENTAL == 4)} then {write_tristate $cfg $autocfg CONFIG_USB_SERIAL_FTDI_SIO $CONFIG_USB_SERIAL_FTDI_SIO [list $CONFIG_USB_SERIAL $CONFIG_EXPERIMENTAL] 2 }
	global CONFIG_USB_SERIAL_VISOR
	if {($CONFIG_USB == 1 || $CONFIG_USB == 2) && ($CONFIG_USB_SERIAL == 1 || $CONFIG_USB_SERIAL == 2 || $CONFIG_USB_SERIAL == 4)} then {write_tristate $cfg $autocfg CONFIG_USB_SERIAL_VISOR $CONFIG_USB_SERIAL_VISOR [list $CONFIG_USB_SERIAL] 2 }
	global CONFIG_USB_SERIAL_IPAQ
	if {($CONFIG_USB == 1 || $CONFIG_USB == 2) && ($CONFIG_USB_SERIAL == 1 || $CONFIG_USB_SERIAL == 2 || $CONFIG_USB_SERIAL == 4)} then {write_tristate $cfg $autocfg CONFIG_USB_SERIAL_IPAQ $CONFIG_USB_SERIAL_IPAQ [list $CONFIG_USB_SERIAL] 2 }
	global CONFIG_USB_SERIAL_IR
	if {($CONFIG_USB == 1 || $CONFIG_USB == 2) && ($CONFIG_USB_SERIAL == 1 || $CONFIG_USB_SERIAL == 2 || $CONFIG_USB_SERIAL == 4) && ($CONFIG_EXPERIMENTAL == 1 || $CONFIG_EXPERIMENTAL == 2 || $CONFIG_EXPERIMENTAL == 4)} then {write_tristate $cfg $autocfg CONFIG_USB_SERIAL_IR $CONFIG_USB_SERIAL_IR [list $CONFIG_USB_SERIAL $CONFIG_EXPERIMENTAL] 2 }
	global CONFIG_USB_SERIAL_EDGEPORT
	if {($CONFIG_USB == 1 || $CONFIG_USB == 2) && ($CONFIG_USB_SERIAL == 1 || $CONFIG_USB_SERIAL == 2 || $CONFIG_USB_SERIAL == 4) && ($CONFIG_EXPERIMENTAL == 1 || $CONFIG_EXPERIMENTAL == 2 || $CONFIG_EXPERIMENTAL == 4)} then {write_tristate $cfg $autocfg CONFIG_USB_SERIAL_EDGEPORT $CONFIG_USB_SERIAL_EDGEPORT [list $CONFIG_USB_SERIAL $CONFIG_EXPERIMENTAL] 2 }
	global CONFIG_USB_SERIAL_KEYSPAN_PDA
	if {($CONFIG_USB == 1 || $CONFIG_USB == 2) && ($CONFIG_USB_SERIAL == 1 || $CONFIG_USB_SERIAL == 2 || $CONFIG_USB_SERIAL == 4) && ($CONFIG_EXPERIMENTAL == 1 || $CONFIG_EXPERIMENTAL == 2 || $CONFIG_EXPERIMENTAL == 4)} then {write_tristate $cfg $autocfg CONFIG_USB_SERIAL_KEYSPAN_PDA $CONFIG_USB_SERIAL_KEYSPAN_PDA [list $CONFIG_USB_SERIAL $CONFIG_EXPERIMENTAL] 2 }
	global CONFIG_USB_SERIAL_KEYSPAN
	if {($CONFIG_USB == 1 || $CONFIG_USB == 2) && ($CONFIG_USB_SERIAL == 1 || $CONFIG_USB_SERIAL == 2 || $CONFIG_USB_SERIAL == 4) && ($CONFIG_EXPERIMENTAL == 1 || $CONFIG_EXPERIMENTAL == 2 || $CONFIG_EXPERIMENTAL == 4)} then {write_tristate $cfg $autocfg CONFIG_USB_SERIAL_KEYSPAN $CONFIG_USB_SERIAL_KEYSPAN [list $CONFIG_USB_SERIAL $CONFIG_EXPERIMENTAL] 2 }
	global CONFIG_USB_SERIAL_KEYSPAN_USA28
	if {($CONFIG_USB == 1 || $CONFIG_USB == 2) && ($CONFIG_USB_SERIAL_KEYSPAN == 1 || $CONFIG_USB_SERIAL_KEYSPAN == 2 || $CONFIG_USB_SERIAL_KEYSPAN == 4)} then {write_tristate $cfg $autocfg CONFIG_USB_SERIAL_KEYSPAN_USA28 $CONFIG_USB_SERIAL_KEYSPAN_USA28 [list $CONFIG_USB_SERIAL_KEYSPAN] 1 }
	global CONFIG_USB_SERIAL_KEYSPAN_USA28X
	if {($CONFIG_USB == 1 || $CONFIG_USB == 2) && ($CONFIG_USB_SERIAL_KEYSPAN == 1 || $CONFIG_USB_SERIAL_KEYSPAN == 2 || $CONFIG_USB_SERIAL_KEYSPAN == 4)} then {write_tristate $cfg $autocfg CONFIG_USB_SERIAL_KEYSPAN_USA28X $CONFIG_USB_SERIAL_KEYSPAN_USA28X [list $CONFIG_USB_SERIAL_KEYSPAN] 1 }
	global CONFIG_USB_SERIAL_KEYSPAN_USA28XA
	if {($CONFIG_USB == 1 || $CONFIG_USB == 2) && ($CONFIG_USB_SERIAL_KEYSPAN == 1 || $CONFIG_USB_SERIAL_KEYSPAN == 2 || $CONFIG_USB_SERIAL_KEYSPAN == 4)} then {write_tristate $cfg $autocfg CONFIG_USB_SERIAL_KEYSPAN_USA28XA $CONFIG_USB_SERIAL_KEYSPAN_USA28XA [list $CONFIG_USB_SERIAL_KEYSPAN] 1 }
	global CONFIG_USB_SERIAL_KEYSPAN_USA28XB
	if {($CONFIG_USB == 1 || $CONFIG_USB == 2) && ($CONFIG_USB_SERIAL_KEYSPAN == 1 || $CONFIG_USB_SERIAL_KEYSPAN == 2 || $CONFIG_USB_SERIAL_KEYSPAN == 4)} then {write_tristate $cfg $autocfg CONFIG_USB_SERIAL_KEYSPAN_USA28XB $CONFIG_USB_SERIAL_KEYSPAN_USA28XB [list $CONFIG_USB_SERIAL_KEYSPAN] 1 }
	global CONFIG_USB_SERIAL_KEYSPAN_USA19
	if {($CONFIG_USB == 1 || $CONFIG_USB == 2) && ($CONFIG_USB_SERIAL_KEYSPAN == 1 || $CONFIG_USB_SERIAL_KEYSPAN == 2 || $CONFIG_USB_SERIAL_KEYSPAN == 4)} then {write_tristate $cfg $autocfg CONFIG_USB_SERIAL_KEYSPAN_USA19 $CONFIG_USB_SERIAL_KEYSPAN_USA19 [list $CONFIG_USB_SERIAL_KEYSPAN] 1 }
	global CONFIG_USB_SERIAL_KEYSPAN_USA18X
	if {($CONFIG_USB == 1 || $CONFIG_USB == 2) && ($CONFIG_USB_SERIAL_KEYSPAN == 1 || $CONFIG_USB_SERIAL_KEYSPAN == 2 || $CONFIG_USB_SERIAL_KEYSPAN == 4)} then {write_tristate $cfg $autocfg CONFIG_USB_SERIAL_KEYSPAN_USA18X $CONFIG_USB_SERIAL_KEYSPAN_USA18X [list $CONFIG_USB_SERIAL_KEYSPAN] 1 }
	global CONFIG_USB_SERIAL_KEYSPAN_USA19W
	if {($CONFIG_USB == 1 || $CONFIG_USB == 2) && ($CONFIG_USB_SERIAL_KEYSPAN == 1 || $CONFIG_USB_SERIAL_KEYSPAN == 2 || $CONFIG_USB_SERIAL_KEYSPAN == 4)} then {write_tristate $cfg $autocfg CONFIG_USB#define __ver_shmiq_init	smp_e3ad2081
#define shmiq_init	_set_ver(shmiq_init)
#define __ver_disable_gconsole	smp_e3789ed6
#define disable_gconsole	_set_ver(disable_gconsole)
#define __ver_enable_gconsole	smp_1ac6778f
#define enable_gconsole	_set_ver(enable_gconsole)
s);
	DBG("*irq %u*\n", irq);
	do_IRQ(irq, regs);
}

void ip32_irq1(struct pt_regs *regs)
{
	ip32_unknown_interrupt (regs);
}

void ip32_irq2(struct pt_regs *regs)
{
	ip32_unknown_interrupt (regs);
}

void ip32_irq3(struct pt_regs *regs)
{
	ip32_unknown_interrupt (regs);
}

void ip32_irq4(struct pt_regs *regs)
{
	ip32_unknown_interrupt (regs);
}

void ip32_irq5(struct pt_regs *regs)
{
	do_IRQ (CLOCK_IRQ, regs);
}

void __init init_IRQ(void)
{
	unsigned int irq;
	int i;

	/* Install our interrupt handler, then clear and disable all
	 * CRIME and MACE interrupts.
	 */
	crime_write_64(CRIME_INT_MASK, 0);
	crime_write_64(CRIME_HARD_INT, 0);
	crime_write_64(CRIME_SOFT_INT, 0);
	mace_write_32(MACEISA_INT_STAT, 0);
	mace_write_32(MACEISA_INT_MASK, 0);
	set_except_vector(0, ip32_handle_int);

	for (i = 0; i < NR_IRQS; i++) {
		irq_desc[i].status  = IRQ_DISABLED;
		irq_desc[i].action  = NULL;
		irq_desc[i].depth   = 1;
		irq_desc[i].handler = &no_irq_type;
	}

	for (irq = 0; irq <= IP32_IRQ_MAX; irq++) {
		hw_irq_controller *controller;

		if (irq == CLOCK_IRQ)
			controller = &ip32_cpu_interrupt;
		else if (irq <= MACE_PCI_BRIDGE_IRQ && irq >= MACE_VID_IN1_IRQ)
			controller = &ip32_mace_interrupt;
		else if (irq <= MACEPCI_SHARED2_IRQ && irq >= MACEPCI_SCSI0_IRQ)
			controller = &ip32_macepci_interrupt;
		else if (irq <= CRIME_VICE_IRQ && irq >= CRIME_GBE0_IRQ)
			controller = &ip32_crime_interrupt;
		else
			controller = &ip32_maceisa_interrupt;

		irq_desc[irq].status = IRQ_DISABLED;
		irq_desc[irq].action = 0;
		irq_desc[irq].depth = 0;
		irq_desc[irq].handler = controller;
	}
	setup_irq(CRIME_MEMERR_IRQ, &memerr_irq);
	setup_irq(CRIME_CPUERR_IRQ, &cpuerr_irq);
}
#define __ver_usema_init	smp_5c45aa2f
#define usema_init	_set_ver(usema_init)
_SERIAL_KEYSPAN_USA19W $CONFIG_USB_SERIAL_KEYSPAN_USA19W [list $CONFIG_USB_SERIAL_KEYSPAN] 1 }
	global CONFIG_USB_SERIAL_KEYSPAN_USA49W
	if {($CONFIG_USB == 1 || $CONFIG_USB == 2) && ($CONFIG_USB_SERIAL_KEYSPAN == 1 || $CONFIG_USB_SERIAL_KEYSPAN == 2 || $CONFIG_USB_SERIAL_KEYSPAN == 4)} then {write_tristate $cfg $autocfg CONFIG_USB_SERIAL_KEYSPAN_USA49W $CONFIG_USB_SERIAL_KEYSPAN_USA49W [list $CONFIG_USB_SERIAL_KEYSPAN] 1 }
	global CONFIG_USB_SERIAL_MCT_U232
	if {($CONFIG_USB == 1 || $CONFIG_USB == 2) && ($CONFIG_USB_SERIAL == 1 || $CONFIG_USB_SERIAL == 2 || $CONFIG_USB_SERIAL == 4) && ($CONFIG_EXPERIMENTAL == 1 || $CONFIG_EXPERIMENTAL == 2 || $CONFIG_EXPERIMENTAL == 4)} then {write_tristate $cfg $autocfg CONFIG_USB_SERIAL_MCT_U232 $CONFIG_USB_SERIAL_MCT_U232 [list $CONFIG_USB_SERIAL $CONFIG_EXPERIMENTAL] 2 }
	global CONFIG_USB_SERIAL_KLSI
	if {($CONFIG_USB == 1 || $CONFIG_USB == 2) && ($CONFIG_USB_SERIAL == 1 || $CONFIG_USB_SERIAL == 2 || $CONFIG_USB_SERIAL == 4) && ($CONFIG_EXPERIMENTAL == 1 || $CONFIG_EXPERIMENTAL == 2 || $CONFIG_EXPERIMENTAL == 4)} then {write_tristate $cfg $autocfg CONFIG_USB_SERIAL_KLSI $CONFIG_USB_SERIAL_KLSI [list $CONFIG_USB_SERIAL $CONFIG_EXPERIMENTAL] 2 }
	global CONFIG_USB_SERIAL_PL2303
	if {($CONFIG_USB == 1 || $CONFIG_USB == 2) && ($CONFIG_USB_SERIAL == 1 || $CONFIG_USB_SERIAL == 2 || $CONFIG_USB_SERIAL == 4) && ($CONFIG_EXPERIMENTAL == 1 || $CONFIG_EXPERIMENTAL == 2 || $CONFIG_EXPERIMENTAL == 4)} then {write_tristate $cfg $autocfg CONFIG_USB_SERIAL_PL2303 $CONFIG_USB_SERIAL_PL2303 [list $CONFIG_USB_SERIAL $CONFIG_EXPERIMENTAL] 2 }
	global CONFIG_USB_SERIAL_CYBERJACK
	if {($CONFIG_USB == 1 || $CONFIG_USB == 2) && ($CONFIG_USB_SERIAL == 1 || $CONFIG_USB_SERIAL == 2 || $CONFIG_USB_SERIAL == 4) && ($CONFIG_EXPERIMENTAL == 1 || $CONFIG_EXPERIMENTAL == 2 || $CONFIG_EXPERIMENTAL == 4)} then {write_tristate $cfg $autocfg CONFIG_USB_SERIAL_CYBERJACK $CONFIG_USB_SERIAL_CYBERJACK [list $CONFIG_USB_SERIAL $CONFIG_EXPERIMENTAL] 2 }
	global CONFIG_USB_SERIAL_XIRCOM
	if {($CONFIG_USB == 1 || $CONFIG_USB == 2) && ($CONFIG_USB_SERIAL == 1 || $CONFIG_USB_SERIAL == 2 || $CONFIG_USB_SERIAL == 4) && ($CONFIG_EXPERIMENTAL == 1 || $CONFIG_EXPERIMENTAL == 2 || $CONFIG_EXPERIMENTAL == 4)} then {write_tristate $cfg $autocfg CONFIG_USB_SERIAL_XIRCOM $CONFIG_USB_SERIAL_XIRCOM [list $CONFIG_USB_SERIAL $CONFIG_EXPERIMENTAL] 2 }
	global CONFIG_USB_SERIAL_OMNINET
	if {($CONFIG_USB == 1 || $CONFIG_USB == 2) && ($CONFIG_USB_SERIAL == 1 || $CONFIG_USB_SERIAL == 2 || $CONFIG_USB_SERIAL == 4) && ($CONFIG_EXPERIMENTAL == 1 || $CONFIG_EXPERIMENTAL == 2 || $CONFIG_EXPERIMENTAL == 4)} then {write_tristate $cfg $autocfg CONFIG_USB_SERIAL_OMNINET $CONFIG_USB_SERIAL_OMNINET [list $CONFIG_USB_SERIAL $CONFIG_EXPERIMENTAL] 2 }
	if {($CONFIG_USB == 1 || $CONFIG_USB == 2)} then {write_comment $cfg $autocfg "USB Miscellaneous drivers"}
	global CONFIG_USB_RIO500
	if {($CONFIG_USB == 1 || $CONFIG_USB == 2) && ($CONFIG_USB == 1 || $CONFIG_USB == 2 || $CONFIG_USB == 4) && ($CONFIG_EXPERIMENTAL == 1 || $CONFIG_EXPERIMENTAL == 2 || $CONFIG_EXPERIMENTAL == 4)} then {write_tristate $cfg $autocfg CONFIG_USB_RIO500 $CONFIG_USB_RIO500 [list $CONFIG_USB $CONFIG_EXPERIMENTAL] 2 }
	global CONFIG_USB_AUERSWALD
	if {($CONFIG_USB == 1 || $CONFIG_USB == 2) && ($CONFIG_USB == 1 || $CONFIG_USB == 2 || $CONFIG_USB == 4) && ($CONFIG_EXPERIMENTAL == 1 || $CONFIG_EXPERIMENTAL == 2 || $CONFIG_EXPERIMENTAL == 4)} then {write_tristate $cfg $autocfg CONFIG_USB_AUERSWALD $CONFIG_USB_AUERSWALD [list $CONFIG_USB $CONFIG_EXPERIMENTAL] 2 }
	if {($CONFIG_EXPERIMENTAL == 1) && ($CONFIG_NET != 0)} then {write_comment $cfg $autocfg "Bluetooth support"}
	global CONFIG_BLUEZ
	if {($CONFIG_EXPERIMENTAL == 1) && ($CONFIG_NET != 0) && ($CONFIG_NET == 1 || $CONFIG_NET == 2 || $CONFIG_NET == 4)} then {write_tristate $cfg $autocfg CONFIG_BLUEZ $CONFIG_BLUEZ [list $CONFIG_NET] 2 }
	global CONFIG_BLUEZ_L2CAP
	if {($CONFIG_EXPERIMENTAL == 1) && ($CONFIG_NET != 0) && ($CONFIG_BLUEZ != 0) && ($CONFIG_BLUEZ == 1 || $CONFIG_BLUEZ == 2 || $CONFIG_BLUEZ == 4)} then {write_tristate $cfg $autocfg CONFIG_BLUEZ_L2CAP $CONFIG_BLUEZ_L2CAP [list $CONFIG_BLUEZ] 2 }
	if {($CONFIG_EXPERIMENTAL == 1) && ($CONFIG_NET != 0) && ($CONFIG_BLUEZ != 0)} then {write_comment $cfg $autocfg "Bluetooth device drivers"}
	global CONFIG_BLUEZ_HCIUSB
	if {($CONFIG_EXPERIMENTAL == 1) && ($CONFIG_NET != 0) && ($CONFIG_BLUEZ != 0) && ($CONFIG_BLUEZ == 1 || $CONFIG_BLUEZ == 2 || $CONFIG_BLUEZ == 4) && ($CONFIG_USB == 1 || $CONFIG_USB == 2 || $CONFIG_USB == 4)} then {write_tristate $cfg $autocfg CONFIG_BLUEZ_HCIUSB $CONFIG_BLUEZ_HCIUSB [list $CONFIG_BLUEZ $CONFIG_USB] 2 }
	global CONFIG_BLUEZ_HCIUART
	if {($CONFIG_EXPERIMENTAL == 1) && ($CONFIG_NET != 0) && ($CONFIG_BLUEZ != 0) && ($CONFIG_BLUEZ == 1 || $CONFIG_BLUEZ == 2 || $CONFIG_BLUEZ == 4)} then {write_tristate $cfg $autocfg CONFIG_BLUEZ_HCIUART $CONFIG_BLUEZ_HCIUART [list $CONFIG_BLUEZ] 2 }
	global CONFIG_BLUEZ_HCIVHCI
	if {($CONFIG_EXPERIMENTAL == 1) && ($CONFIG_NET != 0) && ($CONFIG_BLUEZ != 0) && ($CONFIG_BLUEZ == 1 || $CONFIG_BLUEZ == 2 || $CONFIG_BLUEZ == 4)} then {write_tristate $cfg $autocfg CONFIG_BLUEZ_HCIVHCI $CONFIG_BLUEZ_HCIVHCI [list $CONFIG_BLUEZ] 2 }
	write_comment $cfg $autocfg "Kernel hacking"
	global CONFIG_SOFTWARE_SUSPEND
	if {($CONFIG_EXPERIMENTAL == 1) && ($CONFIG_PM == 1 || $CONFIG_PM == 4)} then {write_tristate $cfg $autocfg CONFIG_SOFTWARE_SUSPEND $CONFIG_SOFTWARE_SUSPEND [list $CONFIG_PM] 2 }
	global CONFIG_DEBUG_KERNEL
	write_tristate $cfg $autocfg CONFIG_DEBUG_KERNEL $CONFIG_DEBUG_KERNEL [list $notmod] 2
	global CONFIG_DEBUG_HIGHMEM
	if {($CONFIG_DEBUG_KERNEL != 0)} then {write_tristate $cfg $autocfg CONFIG_DEBUG_HIGHMEM $CONFIG_DEBUG_HIGHMEM [list $notmod] 2 }
	global CONFIG_DEBUG_SLAB
	if {($CONFIG_DEBUG_KERNEL != 0)} then {write_tristate $cfg $autocfg CONFIG_DEBUG_SLAB $CONFIG_DEBUG_SLAB [list $notmod] 2 }
	global CONFIG_DEBUG_IOVIRT
	if {($CONFIG_DEBUG_KERNEL != 0)} then {write_tristate $cfg $autocfg CONFIG_DEBUG_IOVIRT $CONFIG_DEBUG_IOVIRT [list $notmod] 2 }
	global CONFIG_MAGIC_SYSRQ
	if {($CONFIG_DEBUG_KERNEL != 0)} then {write_tristate $cfg $autocfg CONFIG_MAGIC_SYSRQ $CONFIG_MAGIC_SYSRQ [list $notmod] 2 }
	global CONFIG_DEBUG_SPINLOCK
	if {($CONFIG_DEBUG_KERNEL != 0)} then {write_tristate $cfg $autocfg CONFIG_DEBUG_SPINLOCK $CONFIG_DEBUG_SPINLOCK [list $notmod] 2 }
	global CONFIG_EARLY_CONSOLE_3F8
	if {($CONFIG_DEBUG_KERNEL != 0)} then {write_tristate $cfg $autocfg CONFIG_EARLY_CONSOLE_3F8 $CONFIG_EARLY_CONSOLE_3F8 [list $notmod] 2 }
	global CONFIG_EARLY_CONSOLE_3E8
	if {($CONFIG_DEBUG_KERNEL != 0)} then {write_tristate $cfg $autocfg CONFIG_EARLY_CONSOLE_3E8 $CONFIG_EARLY_CONSOLE_3E8 [list $notmod] 2 }
	global CONFIG_EARLY_CONSOLE_VGA
	if {($CONFIG_DEBUG_KERNEL != 0)} then {write_tristate $cfg $autocfg CONFIG_EARLY_CONSOLE_VGA $CONFIG_EARLY_CONSOLE_VGA [list $notmod] 2 }
	global CONFIG_EARLY_CONSOLE_BOCHS_E9_HACK
	if {($CONFIG_DEBUG_KERNEL != 0)} then {write_tristate $cfg $autocfg CONFIG_EARLY_CONSOLE_BOCHS_E9_HACK $CONFIG_EARLY_CONSOLE_BOCHS_E9_HACK [list $notmod] 2 }
	global CONFIG_HIGHMEM_EMULATION
	if {($CONFIG_DEBUG_KERNEL != 0) && ($CONFIG_HIGHMEM == 1)} then {write_tristate $cfg $autocfg CONFIG_HIGHMEM_EMULATION $CONFIG_HIGHMEM_EMULATION [list $notmod] 2 }
	write_comment $cfg $autocfg "Library routines"
	global CONFIG_ZLIB_INFLATE
	if {($CONFIG_CRAMFS == 1 || $CONFIG_PPP_DEFLATE == 1 || $CONFIG_JFFS2_FS == 1 || $CONFIG_ZISOFS_FS == 1)} then {write_tristate $cfg $autocfg CONFIG_ZLIB_INFLATE $CONSTANT_Y [list $notmod] 2 }
	if {($CONFIG_CRAMFS != 1 && $CONFIG_PPP_DEFLATE != 1 && $CONFIG_JFFS2_FS != 1 && $CONFIG_ZISOFS_FS != 1) && ($CONFIG_CRAMFS == 2 || $CONFIG_PPP_DEFLATE == 2 || $CONFIG_JFFS2_FS == 2 || $CONFIG_ZISOFS_FS == 2)} then {write_tristate $cfg $autocfg CONFIG_ZLIB_INFLATE $CONSTANT_M [list $notmod] 2 }
	if {($CONFIG_CRAMFS != 1 && $CONFIG_PPP_DEFLATE != 1 && $CONFIG_JFFS2_FS != 1 && $CONFIG_ZISOFS_FS != 1) && ($CONFIG_CRAMFS != 2 && $CONFIG_PPP_DEFLATE != 2 && $CONFIG_JFFS2_FS != 2 && $CONFIG_ZISOFS_FS != 2)} then {write_tristate $cfg $autocfg CONFIG_ZLIB_INFLATE $CONFIG_ZLIB_INFLATE [list $notmod] 2 }
	global CONFIG_ZLIB_DEFLATE
	if {($CONFIG_PPP_DEFLATE == 1 || $CONFIG_JFFS2_FS == 1)} then {write_tristate $cfg $autocfg CONFIG_ZLIB_DEFLATE $CONSTANT_Y [list $notmod] 2 }
	if {($CONFIG_PPP_DEFLATE != 1 && $CONFIG_JFFS2_FS != 1) && ($CONFIG_PPP_DEFLATE == 2 || $CONFIG_JFFS2_FS == 2)} then {write_tristate $cfg $autocfg CONFIG_ZLIB_DEFLATE $CONSTANT_M [list $notmod] 2 }
	if {($CONFIG_PPP_DEFLATE != 1 && $CONFIG_JFFS2_FS != 1) && ($CONFIG_PPP_DEFLATE != 2 && $CONFIG_JFFS2_FS != 2)} then {write_tristate $cfg $autocfg CONFIG_ZLIB_DEFLATE $CONFIG_ZLIB_DEFLATE [list $notmod] 2 }
	close $cfg
	close $autocfg
}


proc clear_choices { } {
	global CONFIG_M386; set CONFIG_M386 0
	global CONFIG_M486; set CONFIG_M486 0
	global CONFIG_M586; set CONFIG_M586 0
	global CONFIG_M586TSC; set CONFIG_M586TSC 0
	global CONFIG_M586MMX; set CONFIG_M586MMX 0
	global CONFIG_M686; set CONFIG_M686 0
	global CONFIG_MPENTIUMIII; set CONFIG_MPENTIUMIII 0
	global CONFIG_MPENTIUM4; set CONFIG_MPENTIUM4 0
	global CONFIG_MK6; set CONFIG_MK6 0
	global CONFIG_MK7; set CONFIG_MK7 0
	global CONFIG_MELAN; set CONFIG_MELAN 0
	global CONFIG_MCRUSOE; set CONFIG_MCRUSOE 0
	global CONFIG_MWINCHIPC6; set CONFIG_MWINCHIPC6 0
	global CONFIG_MWINCHIP2; set CONFIG_MWINCHIP2 0
	global CONFIG_MWINCHIP3D; set CONFIG_MWINCHIP3D 0
	global CONFIG_MCYRIXIII; set CONFIG_MCYRIXIII 0
	global CONFIG_NOHIGHMEM; set CONFIG_NOHIGHMEM 0
	global CONFIG_HIGHMEM4G; set CONFIG_HIGHMEM4G 0
	global CONFIG_HIGHMEM64G; set CONFIG_HIGHMEM64G 0
	global CONFIG_1GB; set CONFIG_1GB 0
	global CONFIG_2GB; set CONFIG_2GB 0
	global CONFIG_3GB; set CONFIG_3GB 0
	global CONFIG_1GB; set CONFIG_1GB 0
	global CONFIG_2GB; set CONFIG_2GB 0
	global CONFIG_3GB; set CONFIG_3GB 0
	global CONFIG_05GB; set CONFIG_05GB 0
	global CONFIG_PCI_GOBIOS; set CONFIG_PCI_GOBIOS 0
	global CONFIG_PCI_GODIRECT; set CONFIG_PCI_GODIRECT 0
	global CONFIG_PCI_GOANY; set CONFIG_PCI_GOANY 0
	global CONFIG_KCORE_ELF; set CONFIG_KCORE_ELF 0
	global CONFIG_KCORE_AOUT; set CONFIG_KCORE_AOUT 0
	global CONFIG_MTD_CFI_NOSWAP; set CONFIG_MTD_CFI_NOSWAP 0
	global CONFIG_MTD_CFI_BE_BYTE_SWAP; set CONFIG_MTD_CFI_BE_BYTE_SWAP 0
	global CONFIG_MTD_CFI_LE_BYTE_SWAP; set CONFIG_MTD_CFI_LE_BYTE_SWAP 0
	global CONFIG_IDE_8xx_PCCARD; set CONFIG_IDE_8xx_PCCARD 0
	global CONFIG_IDE_8xx_DIRECT; set CONFIG_IDE_8xx_DIRECT 0
	global CONFIG_IDE_EXT_DIRECT; set CONFIG_IDE_EXT_DIRECT 0
	global CONFIG_SCSI_G_NCR5380_PORT; set CONFIG_SCSI_G_NCR5380_PORT 0
	global CONFIG_SCSI_G_NCR5380_MEM; set CONFIG_SCSI_G_NCR5380_MEM 0
	global CONFIG_FT_NORMAL_DEBUG; set CONFIG_FT_NORMAL_DEBUG 0
	global CONFIG_FT_FULL_DEBUG; set CONFIG_FT_FULL_DEBUG 0
	global CONFIG_FT_NO_TRACE; set CONFIG_FT_NO_TRACE 0
	global CONFIG_FT_NO_TRACE_AT_ALL; set CONFIG_FT_NO_TRACE_AT_ALL 0
	global CONFIG_FT_STD_FDC; set CONFIG_FT_STD_FDC 0
	global CONFIG_FT_MACH2; set CONFIG_FT_MACH2 0
	global CONFIG_FT_PROBE_FC10; set CONFIG_FT_PROBE_FC10 0
	global CONFIG_FT_ALT_FDC; set CONFIG_FT_ALT_FDC 0
}


proc update_choices { } {
	global tmpvar_0
	set tmpvar_0 "Pentium-Pro/Celeron/Pentium-II"
	global CONFIG_M386
	if { $CONFIG_M386 == 1 } then { set tmpvar_0 "386" }
	global CONFIG_M486
	if { $CONFIG_M486 == 1 } then { set tmpvar_0 "486" }
	global CONFIG_M586
	if { $CONFIG_M586 == 1 } then { set tmpvar_0 "586/K5/5x86/6x86/6x86MX" }
	global CONFIG_M586TSC
	if { $CONFIG_M586TSC == 1 } then { set tmpvar_0 "Pentium-Classic" }
	global CONFIG_M586MMX
	if { $CONFIG_M586MMX == 1 } then { set tmpvar_0 "Pentium-MMX" }
	global CONFIG_M686
	if { $CONFIG_M686 == 1 } then { set tmpvar_0 "Pentium-Pro/Celeron/Pentium-II" }
	global CONFIG_MPENTIUMIII
	if { $CONFIG_MPENTIUMIII == 1 } then { set tmpvar_0 "Pentium-III/Celeron(Coppermine)" }
	global CONFIG_MPENTIUM4
	if { $CONFIG_MPENTIUM4 == 1 } then { set tmpvar_0 "Pentium-4" }
	global CONFIG_MK6
	if { $CONFIG_MK6 == 1 } then { set tmpvar_0 "K6/K6-II/K6-III" }
	global CONFIG_MK7
	if { $CONFIG_MK7 == 1 } then { set tmpvar_0 "Athlon/Duron/K7" }
	global CONFIG_MELAN
	if { $CONFIG_MELAN == 1 } then { set tmpvar_0 "Elan" }
	global CONFIG_MCRUSOE
	if { $CONFIG_MCRUSOE == 1 } then { set tmpvar_0 "Crusoe" }
	global CONFIG_MWINCHIPC6
	if { $CONFIG_MWINCHIPC6 == 1 } then { set tmpvar_0 "Winchip-C6" }
	global CONFIG_MWINCHIP2
	if { $CONFIG_MWINCHIP2 == 1 } then { set tmpvar_0 "Winchip-2" }
	global CONFIG_MWINCHIP3D
	if { $CONFIG_MWINCHIP3D == 1 } then { set tmpvar_0 "Winchip-2A/Winchip-3" }
	global CONFIG_MCYRIXIII
	if { $CONFIG_MCYRIXIII == 1 } then { set tmpvar_0 "CyrixIII/C3" }
	global tmpvar_1
	set tmpvar_1 "off"
	global CONFIG_NOHIGHMEM
	if { $CONFIG_NOHIGHMEM == 1 } then { set tmpvar_1 "off" }
	global CONFIG_HIGHMEM4G
	if { $CONFIG_HIGHMEM4G == 1 } then { set tmpvar_1 "4GB" }
	global CONFIG_HIGHMEM64G
	if { $CONFIG_HIGHMEM64G == 1 } then { set tmpvar_1 "64GB" }
	global tmpvar_2
	set tmpvar_2 "3GB"
	global CONFIG_1GB
	if { $CONFIG_1GB == 1 } then { set tmpvar_2 "3GB" }
	global CONFIG_2GB
	if { $CONFIG_2GB == 1 } then { set tmpvar_2 "2GB" }
	global CONFIG_3GB
	if { $CONFIG_3GB == 1 } then { set tmpvar_2 "1GB" }
	global tmpvar_3
	set tmpvar_3 "3GB"
	global CONFIG_1GB
	if { $CONFIG_1GB == 1 } then { set tmpvar_3 "3GB" }
	global CONFIG_2GB
	if { $CONFIG_2GB == 1 } then { set tmpvar_3 "2GB" }
	global CONFIG_3GB
	if { $CONFIG_3GB == 1 } then { set tmpvar_3 "1GB" }
	global CONFIG_05GB
	if { $CONFIG_05GB == 1 } then { set tmpvar_3 "3.5GB" }
	global tmpvar_4
	set tmpvar_4 "Any"
	global CONFIG_PCI_GOBIOS
	if { $CONFIG_PCI_GOBIOS == 1 } then { set tmpvar_4 "BIOS" }
	global CONFIG_PCI_GODIRECT
	if { $CONFIG_PCI_GODIRECT == 1 } then { set tmpvar_4 "Direct" }
	global CONFIG_PCI_GOANY
	if { $CONFIG_PCI_GOANY == 1 } then { set tmpvar_4 "Any" }
	global tmpvar_5
	set tmpvar_5 "ELF"
	global CONFIG_KCORE_ELF
	if { $CONFIG_KCORE_ELF == 1 } then { set tmpvar_5 "ELF" }
	global CONFIG_KCORE_AOUT
	if { $CONFIG_KCORE_AOUT == 1 } then { set tmpvar_5 "A.OUT" }
	global tmpvar_6
	set tmpvar_6 "NO"
	global CONFIG_MTD_CFI_NOSWAP
	if { $CONFIG_MTD_CFI_NOSWAP == 1 } then { set tmpvar_6 "NO" }
	global CONFIG_MTD_CFI_BE_BYTE_SWAP
	if { $CONFIG_MTD_CFI_BE_BYTE_SWAP == 1 } then { set tmpvar_6 "BIG_ENDIAN_BYTE" }
	global CONFIG_MTD_CFI_LE_BYTE_SWAP
	if { $CONFIG_MTD_CFI_LE_BYTE_SWAP == 1 } then { set tmpvar_6 "LITTLE_ENDIAN_BYTE" }
	global tmpvar_7
	set tmpvar_7 "8xx_PCCARD"
	global CONFIG_IDE_8xx_PCCARD
	if { $CONFIG_IDE_8xx_PCCARD == 1 } then { set tmpvar_7 "8xx_PCCARD" }
	global CONFIG_IDE_8xx_DIRECT
	if { $CONFIG_IDE_8xx_DIRECT == 1 } then { set tmpvar_7 "8xx_DIRECT" }
	global CONFIG_IDE_EXT_DIRECT
	if { $CONFIG_IDE_EXT_DIRECT == 1 } then { set tmpvar_7 "EXT_DIRECT" }
	global tmpvar_8
	set tmpvar_8 "Port"
	global CONFIG_SCSI_G_NCR5380_PORT
	if { $CONFIG_SCSI_G_NCR5380_PORT == 1 } then { set tmpvar_8 "Port" }
	global CONFIG_SCSI_G_NCR5380_MEM
	if { $CONFIG_SCSI_G_NCR5380_MEM == 1 } then { set tmpvar_8 "Memory" }
	global tmpvar_9
	set tmpvar_9 "Normal"
	global CONFIG_FT_NORMAL_DEBUG
	if { $CONFIG_FT_NORMAL_DEBUG == 1 } then { set tmpvar_9 "Normal" }
	global CONFIG_FT_FULL_DEBUG
	if { $CONFIG_FT_FULL_DEBUG == 1 } then { set tmpvar_9 "Excessive" }
	global CONFIG_FT_NO_TRACE
	if { $CONFIG_FT_NO_TRACE == 1 } then { set tmpvar_9 "Reduced" }
	global CONFIG_FT_NO_TRACE_AT_ALL
	if { $CONFIG_FT_NO_TRACE_AT_ALL == 1 } then { set tmpvar_9 "None" }
	global tmpvar_10
	set tmpvar_10 "Standard"
	global CONFIG_FT_STD_FDC
	if { $CONFIG_FT_STD_FDC == 1 } then { set tmpvar_10 "Standard" }
	global CONFIG_FT_MACH2
	if { $CONFIG_FT_MACH2 == 1 } then { set tmpvar_10 "MACH-2" }
	global CONFIG_FT_PROBE_FC10
	if { $CONFIG_FT_PROBE_FC10 == 1 } then { set tmpvar_10 "FC-10/FC-20" }
	global CONFIG_FT_ALT_FDC
	if { $CONFIG_FT_ALT_FDC == 1 } then { set tmpvar_10 "Alt/82078" }
}


proc update_define_mainmenu {} {
	global CONFIG_MODULES
	global CONFIG_X86
	global CONFIG_ISA
	global CONFIG_SBUS
	global CONFIG_UID16
	global CONSTANT_Y
	set CONFIG_X86 $CONSTANT_Y
	set CONFIG_ISA $CONSTANT_Y
	global CONSTANT_N
	set CONFIG_SBUS $CONSTANT_N
	set CONFIG_UID16 $CONSTANT_Y
}


set defaults "arch/i386/defconfig"
set ARCH "i386"
# FILE: tail.tk
# This file is boilerplate TCL/TK function definitions for 'make xconfig'.
#
# CHANGES
# =======
#
# 8 January 1998, Michael Elizabeth Chastain, <mec@shout.net>
# Arrange buttons in three columns for better screen fitting.
#

#
# Read the user's settings from .config.  These will override whatever is
# in config.in.  Don't do this if the user specified a -D to force
# the defaults.
#
if { [file readable .config] == 1} then {
	if { $argc > 0 } then {
		if { [lindex $argv 0] != "-D" } then {
			read_config .config
		}
		else
		{
			read_config $defaults
		}
	} else {
		read_config .config
	}
} else {
	read_config $defaults
}

update_define 1 $total_menus 0
update_mainmenu

button .f0.right.save -anchor w -text "Save and Exit" -underline 0\
    -command { catch {exec cp -f .config .config.old}; \
		writeconfig .config include/linux/autoconf.h; wrapup .wrap }

button .f0.right.quit -anchor w -text "Quit Without Saving" -underline 0\
    -command { maybe_exit .maybe }

button .f0.right.load -anchor w -text "Load Configuration from File" \
    -command { load_configfile .load "Load Configuration from file" read_config_file
}

button .f0.right.store -anchor w -text "Store Configuration to File" \
    -command { load_configfile .load "Store Configuration to file" write_config_file }

#
# Now pack everything.
#

pack .f0.right.store .f0.right.load .f0.right.quit .f0.right.save \
    -padx 0 -pady 0 -side bottom -fill x
pack .f0.left .f0.middle .f0.right -side left -padx 5 -pady 0 -fill y
pack .f0 -padx 5 -pady 5

update idletasks
set winy [expr 10 + [winfo reqheight .f0]]
set scry [lindex [wm maxsize .] 1]
set winx [expr 10 + [winfo reqwidth .f0]]
set scrx [lindex [wm maxsize .] 0]
if {$winx < $scrx} then {set maxx -1} else {set maxx $winx}
if {$winy < $scry} then {set maxy -1} else {set maxy $winy}
.f0 configure -width $winx -height $winy 
wm maxsize . $maxx $maxy

#
# If we cannot write our config files, disable the write button.
#
if { [file exists .config] == 1 } then {
		if { [file writable .config] == 0 } then {
			.f0.right.save configure -state disabled
		}
	} else {
		if { [file writable .] == 0 } then {
			.f0.right.save configure -state disabled
		}
	}

if { [file exists include/linux/autoconf.h] == 1 } then {
		if { [file writable include/linux/autoconf.h] == 0 } then {
			.f0.right.save configure -state disabled
		}
	} else {
		if { [file writable include/linux/] == 0 } then {
			.f0.right.save configure -state disabled
		}
	}
#
# Automatically generated make config: don't edit
#
CONFIG_X86=y
CONFIG_ISA=y
# CONFIG_SBUS is not set
CONFIG_UID16=y

#
# Code maturity level options
#
CONFIG_EXPERIMENTAL=y

#
# Loadable module support
#
CONFIG_MODULES=y
CONFIG_MODVERSIONS=y
CONFIG_KMOD=y

#
# Processor type and features
#
# CONFIG_M386 is not set
# CONFIG_M486 is not set
# CONFIG_M586 is not set
# CONFIG_M586TSC is not set
# CONFIG_M586MMX is not set
# CONFIG_M686 is not set
CONFIG_MPENTIUMIII=y
# CONFIG_MPENTIUM4 is not set
# CONFIG_MK6 is not set
# CONFIG_MK7 is not set
# CONFIG_MELAN is not set
# CONFIG_MCRUSOE is not set
# CONFIG_MWINCHIPC6 is not set
# CONFIG_MWINCHIP2 is not set
# CONFIG_MWINCHIP3D is not set
# CONFIG_MCYRIXIII is not set
CONFIG_X86_WP_WORKS_OK=y
CONFIG_X86_INVLPG=y
CONFIG_X86_CMPXCHG=y
CONFIG_X86_XADD=y
CONFIG_X86_BSWAP=y
CONFIG_X86_POPAD_OK=y
# CONFIG_RWSEM_GENERIC_SPINLOCK is not set
CONFIG_RWSEM_XCHGADD_ALGORITHM=y
CONFIG_X86_L1_CACHE_SHIFT=5
CONFIG_X86_TSC=y
CONFIG_X86_GOOD_APIC=y
CONFIG_X86_PGE=y
CONFIG_X86_USE_PPRO_CHECKSUM=y
CONFIG_X86_MCE=y
# CONFIG_TOSHIBA is not set
# CONFIG_I8K is not set
CONFIG_MICROCODE=y
CONFIG_X86_MSR=y
CONFIG_X86_CPUID=y
CONFIG_NOHIGHMEM=y
# CONFIG_HIGHMEM4G is not set
# CONFIG_HIGHMEM64G is not set
# CONFIG_HIGHMEM is not set
# CONFIG_1GB is not set
# CONFIG_2GB is not set
# CONFIG_3GB is not set
CONFIG_05GB=y
# CONFIG_MATH_EMULATION is not set
CONFIG_MTRR=y
CONFIG_SMP=y
CONFIG_PREEMPT=y
# CONFIG_MULTIQUAD is not set
CONFIG_HAVE_DEC_LOCK=y

#
# General setup
#
CONFIG_NET=y
CONFIG_X86_IO_APIC=y
CONFIG_X86_LOCAL_APIC=y
CONFIG_PCI=y
# CONFIG_PCI_GOBIOS is not set
# CONFIG_PCI_GODIRECT is not set
CONFIG_PCI_GOANY=y
CONFIG_PCI_BIOS=y
CONFIG_PCI_DIRECT=y
CONFIG_PCI_NAMES=y
# CONFIG_EISA is not set
# CONFIG_MCA is not set
CONFIG_HOTPLUG=y

#
# PCMCIA/CardBus support
#
# CONFIG_PCMCIA is not set

#
# PCI Hotplug Support
#
# CONFIG_HOTPLUG_PCI is not set
# CONFIG_HOTPLUG_PCI_COMPAQ is not set
# CONFIG_HOTPLUG_PCI_COMPAQ_NVRAM is not set
# CONFIG_HOTPLUG_PCI_IBM is not set
# CONFIG_HOTPLUG_PCI_ACPI is not set
CONFIG_SYSVIPC=y
CONFIG_BSD_PROCESS_ACCT=y
CONFIG_SYSCTL=y
CONFIG_KCORE_ELF=y
# CONFIG_KCORE_AOUT is not set
CONFIG_BINFMT_AOUT=y
CONFIG_BINFMT_ELF=y
CONFIG_BINFMT_MISC=y
CONFIG_IKCONFIG=y
CONFIG_PM=y
# CONFIG_ACPI is not set
# CONFIG_APM is not set

#
# Memory Technology Devices (MTD)
#
# CONFIG_MTD is not set

#
# Parallel port support
#
CONFIG_PARPORT=y
CONFIG_PARPORT_PC=y
CONFIG_PARPORT_PC_CML1=y
# CONFIG_PARPORT_SERIAL is not set
CONFIG_PARPORT_PC_FIFO=y
# CONFIG_PARPORT_PC_SUPERIO is not set
# CONFIG_PARPORT_AMIGA is not set
# CONFIG_PARPORT_MFC3 is not set
# CONFIG_PARPORT_ATARI is not set
# CONFIG_PARPORT_GSC is not set
# CONFIG_PARPORT_SUNBPP is not set
CONFIG_PARPORT_OTHER=y
CONFIG_PARPORT_1284=y

#
# Plug and Play configuration
#
CONFIG_PNP=y
CONFIG_ISAPNP=y
CONFIG_PNPBIOS=y

#
# Block devices
#
CONFIG_BLK_DEV_FD=y
# CONFIG_BLK_DEV_XD is not set
# CONFIG_PARIDE is not set
# CONFIG_BLK_CPQ_DA is not set
# CONFIG_BLK_CPQ_CISS_DA is not set
# CONFIG_CISS_SCSI_TAPE is not set
# CONFIG_BLK_DEV_DAC960 is not set
CONFIG_BLK_DEV_LOOP=y
CONFIG_BLK_DEV_NBD=y
CONFIG_BLK_DEV_RAM=y
CONFIG_BLK_DEV_RAM_SIZE=4096
# CONFIG_BLK_DEV_INITRD is not set

#
# Multi-device support (RAID and LVM)
#
CONFIG_MD=y
CONFIG_BLK_DEV_MD=y
CONFIG_MD_LINEAR=y
CONFIG_MD_RAID0=y
CONFIG_MD_RAID1=y
CONFIG_MD_RAID5=y
CONFIG_MD_MULTIPATH=y
CONFIG_BLK_DEV_LVM=y

#
# Networking options
#
CONFIG_PACKET=y
CONFIG_PACKET_MMAP=y
CONFIG_NETLINK_DEV=y
# CONFIG_NETFILTER is not set
CONFIG_FILTER=y
CONFIG_UNIX=y
CONFIG_INET=y
CONFIG_IP_MULTICAST=y
# CONFIG_IP_ADVANCED_ROUTER is not set
CONFIG_IP_PNP=y
CONFIG_IP_PNP_DHCP=y
# CONFIG_IP_PNP_BOOTP is not set
# CONFIG_IP_PNP_RARP is not set
CONFIG_NET_IPIP=y
# CONFIG_NET_IPGRE is not set
CONFIG_IP_MROUTE=y
# CONFIG_IP_PIMSM_V1 is not set
CONFIG_IP_PIMSM_V2=y
# CONFIG_ARPD is not set
CONFIG_INET_ECN=y
CONFIG_SYN_COOKIES=y
CONFIG_IPV6=y
# CONFIG_KHTTPD is not set
# CONFIG_ATM is not set
CONFIG_VLAN_8021Q=y

#
#  
#
CONFIG_IPX=y
# CONFIG_IPX_INTERN is not set
CONFIG_ATALK=y
# CONFIG_DECNET is not set
# CONFIG_BRIDGE is not set
# CONFIG_X25 is not set
# CONFIG_LAPB is not set
# CONFIG_LLC is not set
# CONFIG_NET_DIVERT is not set
# CONFIG_ECONET is not set
# CONFIG_WAN_ROUTER is not set
CONFIG_NET_FASTROUTE=y
CONFIG_NET_HW_FLOWCONTROL=y

#
# QoS and/or fair queueing
#
# CONFIG_NET_SCHED is not set

#
# Network testing
#
CONFIG_NET_PKTGEN=y

#
# Telephony Support
#
# CONFIG_PHONE is not set
# CONFIG_PHONE_IXJ is not set
# CONFIG_PHONE_IXJ_PCMCIA is not set

#
# ATA/IDE/MFM/RLL support
#
CONFIG_IDE=y

#
# IDE, ATA and ATAPI Block devices
#
CONFIG_BLK_DEV_IDE=y

#
# Please see Documentation/ide.txt for help/info on IDE drives
#
# CONFIG_BLK_DEV_HD_IDE is not set
# CONFIG_BLK_DEV_HD is not set
CONFIG_BLK_DEV_IDEDISK=y
CONFIG_IDEDISK_MULTI_MODE=y
CONFIG_IDEDISK_STROKE=y
# CONFIG_BLK_DEV_IDEDISK_VENDOR is not set
# CONFIG_BLK_DEV_IDEDISK_FUJITSU is not set
# CONFIG_BLK_DEV_IDEDISK_IBM is not set
# CONFIG_BLK_DEV_IDEDISK_MAXTOR is not set
# CONFIG_BLK_DEV_IDEDISK_QUANTUM is not set
# CONFIG_BLK_DEV_IDEDISK_SEAGATE is not set
# CONFIG_BLK_DEV_IDEDISK_WD is not set
# CONFIG_BLK_DEV_COMMERIAL is not set
# CONFIG_BLK_DEV_TIVO is not set
# CONFIG_BLK_DEV_IDECS is not set
CONFIG_BLK_DEV_IDECD=m
# CONFIG_BLK_DEV_IDETAPE is not set
# CONFIG_BLK_DEV_IDEFLOPPY is not set
CONFIG_BLK_DEV_IDESCSI=y
CONFIG_IDE_TASK_IOCTL=y
CONFIG_IDE_TASKFILE_IO=y

#
# IDE chipset support/bugfixes
#
CONFIG_BLK_DEV_CMD640=y
# CONFIG_BLK_DEV_CMD640_ENHANCED is not set
# CONFIG_BLK_DEV_ISAPNP is not set
CONFIG_BLK_DEV_RZ1000=y
CONFIG_BLK_DEV_IDEPCI=y
CONFIG_IDEPCI_SHARE_IRQ=y
CONFIG_BLK_DEV_IDEDMA_PCI=y
# CONFIG_BLK_DEV_OFFBOARD is not set
# CONFIG_BLK_DEV_IDEDMA_FORCED is not set
CONFIG_IDEDMA_PCI_AUTO=y
# CONFIG_IDEDMA_ONLYDISK is not set
CONFIG_BLK_DEV_IDEDMA=y
# CONFIG_IDEDMA_PCI_WIP is not set
# CONFIG_BLK_DEV_IDEDMA_TIMEOUT is not set
# CONFIG_IDEDMA_NEW_DRIVE_LISTINGS is not set
CONFIG_BLK_DEV_ADMA=y
# CONFIG_BLK_DEV_AEC62XX is not set
# CONFIG_AEC62XX_TUNING is not set
# CONFIG_BLK_DEV_ALI15X3 is not set
# CONFIG_WDC_ALI15X3 is not set
# CONFIG_BLK_DEV_AMD74XX is not set
# CONFIG_AMD74XX_OVERRIDE is not set
# CONFIG_BLK_DEV_CMD64X is not set
# CONFIG_BLK_DEV_CMD680 is not set
# CONFIG_BLK_DEV_CY82C693 is not set
# CONFIG_BLK_DEV_CS5530 is not set
# CONFIG_BLK_DEV_HPT34X is not set
# CONFIG_HPT34X_AUTODMA is not set
CONFIG_BLK_DEV_HPT366=y
# CONFIG_BLK_DEV_PIIX is not set
# CONFIG_PIIX_TUNING is not set
# CONFIG_BLK_DEV_NS87415 is not set
# CONFIG_BLK_DEV_OPTI621 is not set
# CONFIG_BLK_DEV_PDC202XX is not set
# CONFIG_PDC202XX_BURST is not set
# CONFIG_PDC202XX_FORCE is not set
# CONFIG_BLK_DEV_SVWKS is not set
# CONFIG_BLK_DEV_SIS5513 is not set
# CONFIG_BLK_DEV_SLC90E66 is not set
# CONFIG_BLK_DEV_TRM290 is not set
CONFIG_BLK_DEV_VIA82CXXX=y
# CONFIG_IDE_CHIPSETS is not set
CONFIG_IDEDMA_AUTO=y
CONFIG_IDEDMA_IVB=y
# CONFIG_DMA_NONPCI is not set
CONFIG_BLK_DEV_IDE_MODES=y
CONFIG_BLK_DEV_ATARAID=y
# CONFIG_BLK_DEV_ATARAID_PDC is not set
CONFIG_BLK_DEV_ATARAID_HPT=y

#
# SCSI support
#
CONFIG_SCSI=y

#
# SCSI support type (disk, tape, CD-ROM)
#
CONFIG_BLK_DEV_SD=y
CONFIG_SD_EXTRA_DEVS=40
# CONFIG_CHR_DEV_ST is not set
# CONFIG_CHR_DEV_OSST is not set
CONFIG_BLK_DEV_SR=y
# CONFIG_BLK_DEV_SR_VENDOR is not set
CONFIG_SR_EXTRA_DEVS=2
CONFIG_CHR_DEV_SG=y

#
# Some SCSI devices (e.g. CD jukebox) support multiple LUNs
#
CONFIG_SCSI_DEBUG_QUEUES=y
CONFIG_SCSI_MULTI_LUN=y
CONFIG_SCSI_CONSTANTS=y
# CONFIG_SCSI_LOGGING is not set

#
# SCSI low-level drivers
#
# CONFIG_BLK_DEV_3W_XXXX_RAID is not set
# CONFIG_SCSI_7000FASST is not set
# CONFIG_SCSI_ACARD is not set
# CONFIG_SCSI_AHA152X is not set
# CONFIG_SCSI_AHA1542 is not set
# CONFIG_SCSI_AHA1740 is not set
# CONFIG_SCSI_AACRAID is not set
# CONFIG_SCSI_AIC7XXX is not set
# CONFIG_SCSI_AIC7XXX_OLD is not set
# CONFIG_SCSI_DPT_I2O is not set
# CONFIG_SCSI_ADVANSYS is not set
# CONFIG_SCSI_IN2000 is not set
# CONFIG_SCSI_AM53C974 is not set
# CONFIG_SCSI_MEGARAID is not set
# CONFIG_SCSI_BUSLOGIC is not set
# CONFIG_SCSI_CPQFCTS is not set
# CONFIG_SCSI_DMX3191D is not set
# CONFIG_SCSI_DTC3280 is not setds1286.o: ds1286.c \
   /home/me/kernel/linux/include/linux/types.h \
   /home/me/kernel/linux/include/linux/errno.h \
   /home/me/kernel/linux/include/linux/miscdevice.h \
   /home/me/kernel/linux/include/linux/slab.h \
   /home/me/kernel/linux/include/linux/ioport.h \
   /home/me/kernel/linux/include/linux/fcntl.h \
   /home/me/kernel/linux/include/linux/init.h \
   /home/me/kernel/linux/include/linux/poll.h \
   /home/me/kernel/linux/include/linux/rtc.h \
   /home/me/kernel/linux/include/linux/spinlock.h \
   /home/me/kernel/linux/include/asm/io.h \
   /home/me/kernel/linux/include/asm/uaccess.h \
   /home/me/kernel/linux/include/asm/system.h
graphics.o: graphics.c \
   /home/me/kernel/linux/include/linux/kernel.h \
   /home/me/kernel/linux/include/linux/fs.h \
   /home/me/kernel/linux/include/linux/init.h \
   /home/me/kernel/linux/include/linux/miscdevice.h \
   /home/me/kernel/linux/include/linux/sched.h \
   /home/me/kernel/linux/include/linux/mm.h \
   /home/me/kernel/linux/include/linux/mman.h \
   /home/me/kernel/linux/include/linux/slab.h \
   /home/me/kernel/linux/include/linux/module.h \
   /home/me/kernel/linux/include/linux/smp_lock.h \
   /home/me/kernel/linux/include/asm/uaccess.h \
   gconsole.h \
   graphics.h \
   usema.h \
   /home/me/kernel/linux/include/asm/page.h \
   /home/me/kernel/linux/include/asm/pgtable.h \
   /home/me/kernel/linux/include/video/newport.h
newport.o: newport.c \
   /home/me/kernel/linux/include/linux/errno.h \
   /home/me/kernel/linux/include/linux/sched.h \
   /home/me/kernel/linux/include/asm/types.h \
   /home/me/kernel/linux/include/asm/uaccess.h \
   /home/me/kernel/linux/include/video/newport.h \
   /home/me/kernel/linux/include/linux/module.h
rrm.o: rrm.c \
   /home/me/kernel/linux/include/linux/module.h \
   /home/me/kernel/linux/include/asm/uaccess.h
sgicons.o: sgicons.c \
   /home/me/kernel/linux/include/linux/init.h \
   /home/me/kernel/linux/include/linux/kernel.h \
   /home/me/kernel/linux/include/linux/errno.h \
   /home/me/kernel/linux/include/linux/module.h \
   /home/me/kernel/linux/include/asm/uaccess.h \
   gconsole.h
sgiserial.o: sgiserial.c \
   /home/me/kernel/linux/include/linux/errno.h \
   /home/me/kernel/linux/include/linux/signal.h \
   /home/me/kernel/linux/include/linux/sched.h \
   /home/me/kernel/linux/include/linux/timer.h \
   /home/me/kernel/linux/include/linux/interrupt.h \
   /home/me/kernel/linux/include/linux/tty.h \
   /home/me/kernel/linux/include/linux/tty_flip.h \
   /home/me/kernel/linux/include/linux/major.h \
   /home/me/kernel/linux/include/linux/string.h \
   /home/me/kernel/linux/include/linux/fcntl.h \
   /home/me/kernel/linux/include/linux/mm.h \
   /home/me/kernel/linux/include/linux/kernel.h \
   /home/me/kernel/linux/include/linux/delay.h \
   /home/me/kernel/linux/include/linux/console.h \
   /home/me/kernel/linux/include/linux/init.h \
   /home/me/kernel/linux/include/asm/io.h \
   /home/me/kernel/linux/include/asm/irq.h \
   /home/me/kernel/linux/include/asm/system.h \
   /home/me/kernel/linux/include/asm/bitops.h \
   /home/me/kernel/linux/include/asm/uaccess.h \
   sgiserial.h \
   $(wildcard /home/me/kernel/linux/include/config/remote/debug.h)
shmiq.o: shmiq.c \
   /home/me/kernel/linux/include/linux/fs.h \
   /home/me/kernel/linux/include/linux/miscdevice.h \
   /home/me/kernel/linux/include/linux/sched.h \
   /home/me/kernel/linux/include/linux/file.h \
   /home/me/kernel/linux/include/linux/interrupt.h \
   /home/me/kernel/linux/include/linux/poll.h \
   /home/me/kernel/linux/include/linux/vmalloc.h \
   /home/me/kernel/linux/include/linux/wait.h \
   /home/me/kernel/linux/include/linux/major.h \
   /home/me/kernel/linux/include/linux/module.h \
   /home/me/kernel/linux/include/linux/smp_lock.h \
   /home/me/kernel/linux/include/linux/devfs_fs_kernel.h \
   /home/me/kernel/linux/include/asm/mman.h \
   /home/me/kernel/linux/include/asm/uaccess.h \
   /home/me/kernel/linux/include/asm/poll.h \
   graphics.h
streamable.o: streamable.c \
   /home/me/kernel/linux/include/linux/fs.h \
   /home/me/kernel/linux/include/linux/miscdevice.h \
   /home/me/kernel/linux/include/linux/sched.h \
   /home/me/kernel/linux/include/linux/kbd_kern.h \
   /home/me/kernel/linux/include/linux/vt_kern.h \
   /home/me/kernel/linux/include/linux/smp_lock.h \
   /home/me/kernel/linux/include/asm/uaccess.h \
   /home/me/kernel/linux/include/asm/keyboard.h \
   graphics.h
usema.o: usema.c \
   /home/me/kernel/linux/include/linux/fs.h \
   /home/me/kernel/linux/include/linux/miscdevice.h \
   /home/me/kernel/linux/include/linux/sched.h \
   /home/me/kernel/linux/include/linux/file.h \
   /home/me/kernel/linux/include/linux/major.h \
   /home/me/kernel/linux/include/linux/poll.h \
   /home/me/kernel/linux/include/linux/string.h \
   /home/me/kernel/linux/include/linux/dcache.h \
   /home/me/kernel/linux/include/linux/mm.h \
   /home/me/kernel/linux/include/linux/module.h \
   /home/me/kernel/linux/include/linux/slab.h \
   /home/me/kernel/linux/include/linux/smp_lock.h \
   usema.h \
   /home/me/kernel/linux/include/asm/mman.h \
   /home/me/kernel/linux/include/asm/uaccess.h
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ifeq (-D__KERNEL__ -I/home/me/kernel/linux/include -Wall -Wstrict-prototypes -Wno-trigraphs -O2 -fomit-frame-pointer -fno-strict-aliasing -fno-common -pipe -mpreferred-stack-boundary=2 -march=i686,$(strip $(subst $(comma),:,$(CFLAGS) $(EXTRA_CFLAGS) $(CFLAGS_sit.o))))
FILES_FLAGS_UP_TO_DATE += sit.o
endif

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01.01cdroms/cdrom%dUnable to allocate SCSI request in sr_do_ioctlSCSI DMA pool exhausted.<6>sr%d: disc change detected.
<6>sr%d: CDROM not ready yet.
<6>sr%d: CDROM not ready.  Make sure there is a disc in the drive.
<3>sr%d: CDROM (ioctl) reports ILLEGAL REQUEST.
<3>sr%d: CDROM (ioctl) error, command: srCDROM does'nt support READ CD (0xbe) command
������}�������
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GCC: (GNU) 2.95.4 20011002 (Debian prerelease).symtab.strtab.shstrtab.rel.text.data.bss.note.rodata.rel.fixup.rel__ex_table.commentifeq (-D__KERNEL__ -I/home/me/kernel/linux/include -Wall -Wstrict-prototypes -Wno-trigraphs -O2 -fomit-frame-pointer -fno-strict-aliasing -fno-common -pipe -mpreferred-stack-boundary=2 -march=i686,$(strip $(subst $(comma),:,$(CFLAGS) $(EXTRA_CFLAGS) $(CFLAGS_sr_ioctl.o))))
FILES_FLAGS_UP_TO_DATE += sr_ioctl.o
endif

# CONFIG_SCSI_EATA is not set
# CONFIG_SCSI_EATA_DMA is not set
# CONFIG_SCSI_EATA_PIO is not set
# CONFIG_SCSI_FUTURE_DOMAIN is not set
# CONFIG_SCSI_GDTH is not set
# CONFIG_SCSI_GENERIC_NCR5380 is not set
# CONFIG_SCSI_IPS is not set
# CONFIG_SCSI_INITIO is not set
# CONFIG_SCSI_INIA100 is not set
# CONFIG_SCSI_PPA is not set
# CONFIG_SCSI_IMM is not set
# CONFIG_SCSI_NCR53C406A is not set
# CONFIG_SCSI_NCR53C7xx is not set
# CONFIG_SCSI_SYM53C8XX_2 is not set
# CONFIG_SCSI_NCR53C8XX is not set
# CONFIG_SCSI_SYM53C8XX is not set
# CONFIG_SCSI_PAS16 is not set
# CONFIG_SCSI_PCI2000 is not set
# CONFIG_SCSI_PCI2220I is not set
# CONFIG_SCSI_PSI240I is not set
# CONFIG_SCSI_QLOGIC_FAS is not set
# CONFIG_SCSI_QLOGIC_ISP is not set
# CONFIG_SCSI_QLOGIC_FC is not set
# CONFIG_SCSI_QLOGIC_1280 is not set
# CONFIG_SCSI_SEAGATE is not set
# CONFIG_SCSI_SIM710 is not set
# CONFIG_SCSI_SYM53C416 is not set
# CONFIG_SCSI_DC390T is not set
# CONFIG_SCSI_T128 is not set
# CONFIG_SCSI_U14_34F is not set
# CONFIG_SCSI_ULTRASTOR is not set
# CONFIG_SCSI_DEBUG is not set

#
# Fusion MPT device support
#
# CONFIG_FUSION is not set
# CONFIG_FUSION_BOOT is not set
# CONFIG_FUSION_ISENSE is not set
# CONFIG_FUSION_CTL is not set
# CONFIG_FUSION_LAN is not set

#
# IEEE 1394 (FireWire) support (EXPERIMENTAL)
#
# CONFIG_IEEE1394 is not set

#
# I2O device support
#
# CONFIG_I2O is not set
# CONFIG_I2O_PCI is not set
# CONFIG_I2O_BLOCK is not set
# CONFIG_I2O_LAN is not set
# CONFIG_I2O_SCSI is not set
# CONFIG_I2O_PROC is not set

#
# Network device support
#
CONFIG_NETDEVICES=y

#
# ARCnet devices
#
# CONFIG_ARCNET is not set

#
# Appletalk devices
#
# CONFIG_APPLETALK is not set
# CONFIG_LTPC is not set
# CONFIG_COPS is not set
# CONFIG_IPDDP is not set
CONFIG_DUMMY=m
# CONFIG_BONDING is not set
CONFIG_EQUALIZER=y
CONFIG_TUN=y
CONFIG_NET_RANDOM=y
# CONFIG_ETHERTAP is not set
# CONFIG_NET_SB1000 is not set

#
# Ethernet (10 or 100Mbit)
#
CONFIG_NET_ETHERNET=y
# CONFIG_SUNLANCE is not set
# CONFIG_HAPPYMEAL is not set
# CONFIG_SUNBMAC is not set
# CONFIG_SUNQE is not set
# CONFIG_SUNGEM is not set
# CONFIG_NET_VENDOR_3COM is not set
# CONFIG_LANCE is not set
# CONFIG_NET_VENDOR_SMC is not set
# CONFIG_NET_VENDOR_RACAL is not set
# CONFIG_AT1700 is not set
# CONFIG_DEPCA is not set
# CONFIG_HP100 is not set
# CONFIG_NET_ISA is not set
CONFIG_NET_PCI=y
CONFIG_PCNET32=m
# CONFIG_ADAPTEC_STARFIRE is not set
# CONFIG_AC3200 is not set
# CONFIG_APRICOT is not set
# CONFIG_CS89x0 is not set
# CONFIG_TULIP is not set
# CONFIG_TC35815 is not set
# CONFIG_DE4X5 is not set
# CONFIG_DGRS is not set
# CONFIG_DM9102 is not set
CONFIG_EEPRO100=y
# CONFIG_LNE390 is not set
# CONFIG_FEALNX is not set
# CONFIG_NATSEMI is not set
# CONFIG_NE2K_PCI is not set
# CONFIG_NE3210 is not set
# CONFIG_ES3210 is not set
# CONFIG_8139CP is not set
# CONFIG_8139TOO is not set
# CONFIG_8139TOO_PIO is not set
# CONFIG_8139TOO_TUNE_TWISTER is not set
# CONFIG_8139TOO_8129 is not set
# CONFIG_8139_NEW_RX_RESET is not set
# CONFIG_SIS900 is not set
# CONFIG_EPIC100 is not set
# CONFIG_SUNDANCE is not set
# CONFIG_TLAN is not set
CONFIG_VIA_RHINE=m
# CONFIG_VIA_RHINE_MMIO is not set
# CONFIG_WINBOND_840 is not set
# CONFIG_NET_POCKET is not set

#
# Ethernet (1000 Mbit)
#
# CONFIG_ACENIC is not set
# CONFIG_DL2K is not set
# CONFIG_MYRI_SBUS is not set
# CONFIG_NS83820 is not set
# CONFIG_HAMACHI is not set
# CONFIG_YELLOWFIN is not set
# CONFIG_SK98LIN is not set
# CONFIG_TIGON3 is not set
# CONFIG_FDDI is not set
CONFIG_NETCONSOLE=y
# CONFIG_HIPPI is not set
# CONFIG_PLIP is not set
CONFIG_PPP=m
CONFIG_PPP_MULTILINK=y
CONFIG_PPP_FILTER=y
CONFIG_PPP_ASYNC=m
CONFIG_PPP_SYNC_TTY=m
CONFIG_PPP_DEFLATE=m
CONFIG_PPP_BSDCOMP=m
# CONFIG_PPPOE is not set
# CONFIG_SLIP is not set

#
# Wireless LAN (non-hamradio)
#
# CONFIG_NET_RADIO is not set

#
# Token Ring devices
#
# CONFIG_TR is not set
# CONFIG_NET_FC is not set
# CONFIG_RCPCI is not set
# CONFIG_SHAPER is not set

#
# Wan interfaces
#
# CONFIG_WAN is not set

#
# Amateur Radio support
#
# CONFIG_HAMRADIO is not set

#
# IrDA (infrared) support
#
# CONFIG_IRDA is not set

#
# ISDN subsystem
#
# CONFIG_ISDN is not set

#
# Old CD-ROM drivers (not SCSI, not IDE)
#
# CONFIG_CD_NO_IDESCSI is not set

#
# Input core support
#
CONFIG_INPUT=y
CONFIG_INPUT_KEYBDEV=y
CONFIG_INPUT_MOUSEDEV=y
CONFIG_INPUT_MOUSEDEV_SCREEN_X=1024
CONFIG_INPUT_MOUSEDEV_SCREEN_Y=768
CONFIG_INPUT_JOYDEV=y
CONFIG_INPUT_EVDEV=y

#
# Character devices
#
CONFIG_VT=y
CONFIG_VT_CONSOLE=y
CONFIG_SERIAL=y
# CONFIG_SERIAL_CONSOLE is not set
# CONFIG_SERIAL_EXTENDED is not set
# CONFIG_SERIAL_NONSTANDARD is not set
CONFIG_UNIX98_PTYS=y
CONFIG_UNIX98_PTY_COUNT=256
# CONFIG_PRINTER is not set
# CONFIG_PPDEV is not set

#
# I2C support
#
CONFIG_I2C=y
CONFIG_I2C_ALGOBIT=y
# CONFIG_I2C_BITLP is not set
# CONFIG_I2C_BITELV is not set
# CONFIG_I2C_BITVELLE is not set
CONFIG_I2C_ALGOPCF=y
# CONFIG_I2C_PCFISA is not set
CONFIG_I2C_MAINBOARD=y
# CONFIG_I2C_ALI1535 is not set
# CONFIG_I2C_ALI15X3 is not set
# CONFIG_I2C_HYDRA is not set
# CONFIG_I2C_AMD756 is not set
# CONFIG_I2C_TSUNAMI is not set
# CONFIG_I2C_I801 is not set
# CONFIG_I2C_I810 is not set
# CONFIG_I2C_PIIX4 is not set
# CONFIG_I2C_SIS5595 is not set
# CONFIG_I2C_VIA is not set
# CONFIG_I2C_VIAPRO is not set
# CONFIG_I2C_VOODOO3 is not set
# CONFIG_I2C_ISA is not set
CONFIG_I2C_CHARDEV=y
CONFIG_I2C_PROC=y

#
# Hardware sensors support
#
CONFIG_SENSORS=y
# CONFIG_SENSORS_ADM1021 is not set
# CONFIG_SENSORS_ADM1024 is not set
# CONFIG_SENSORS_ADM1025 is not set
# CONFIG_SENSORS_ADM9240 is not set
# CONFIG_SENSORS_DS1621 is not set
# CONFIG_SENSORS_FSCPOS is not set
# CONFIG_SENSORS_FSCSCY is not set
# CONFIG_SENSORS_GL518SM is not set
# CONFIG_SENSORS_GL520SM is not set
# CONFIG_SENSORS_MAXILIFE is not set
# CONFIG_SENSORS_IT87 is not set
# CONFIG_SENSORS_MTP008 is not set
# CONFIG_SENSORS_LM75 is not set
# CONFIG_SENSORS_LM78 is not set
# CONFIG_SENSORS_LM80 is not set
# CONFIG_SENSORS_LM87 is not set
# CONFIG_SENSORS_SIS5595 is not set
# CONFIG_SENSORS_THMC50 is not set
# CONFIG_SENSORS_VIA686A is not set
CONFIG_SENSORS_W83781D=y
CONFIG_SENSORS_OTHER=y
# CONFIG_SENSORS_BT869 is not set
CONFIG_SENSORS_DDCMON=y
CONFIG_SENSORS_EEPROM=y
# CONFIG_SENSORS_MATORB is not set

#
# Mice
#
# CONFIG_BUSMOUSE is not set
CONFIG_MOUSE=y
CONFIG_PSMOUSE=y
# CONFIG_82C710_MOUSE is not set
# CONFIG_PC110_PAD is not set
# CONFIG_MK712_MOUSE is not set

#
# Joysticks
#
# CONFIG_INPUT_GAMEPORT is not set
# CONFIG_INPUT_NS558 is not set
# CONFIG_INPUT_LIGHTNING is not set
# CONFIG_INPUT_PCIGAME is not set
# CONFIG_INPUT_CS461X is not set
# CONFIG_INPUT_EMU10K1 is not set
# CONFIG_INPUT_SERIO is not set
# CONFIG_INPUT_SERPORT is not set

#
# Joysticks
#
# CONFIG_INPUT_ANALOG is not set
# CONFIG_INPUT_A3D is not set
# CONFIG_INPUT_ADI is not set
# CONFIG_INPUT_COBRA is not set
# CONFIG_INPUT_GF2K is not set
# CONFIG_INPUT_GRIP is not set
# CONFIG_INPUT_INTERACT is not set
# CONFIG_INPUT_TMDC is not set
# CONFIG_INPUT_SIDEWINDER is not set
# CONFIG_INPUT_IFORCE_USB is not set
# CONFIG_INPUT_IFORCE_232 is not set
# CONFIG_INPUT_WARRIOR is not set
# CONFIG_INPUT_MAGELLAN is not set
# CONFIG_INPUT_SPACEORB is not set
# CONFIG_INPUT_SPACEBALL is not set
# CONFIG_INPUT_STINGER is not set
# CONFIG_INPUT_DB9 is not set
# CONFIG_INPUT_GAMECON is not set
# CONFIG_INPUT_TURBOGRAFX is not set
# CONFIG_QIC02_TAPE is not set

#
# Watchdog Cards
#
# CONFIG_WATCHDOG is not set
# CONFIG_AMD_RNG is not set
# CONFIG_INTEL_RNG is not set
# CONFIG_AMD_PM768 is not set
CONFIG_NVRAM=y
CONFIG_RTC=y
# CONFIG_DTLK is not set
# CONFIG_R3964 is not set
# CONFIG_APPLICOM is not set
# CONFIG_SONYPI is not set

#
# Ftape, the floppy tape device driver
#
# CONFIG_FTAPE is not set
# CONFIG_AGP is not set
# CONFIG_DRM is not set
# CONFIG_MWAVE is not set

#
# Multimedia devices
#
# CONFIG_VIDEO_DEV is not set

#
# File systems
#
CONFIG_QUOTA=y
# CONFIG_AUTOFS_FS is not set
CONFIG_AUTOFS4_FS=y
CONFIG_REISERFS_FS=y
# CONFIG_REISERFS_CHECK is not set
CONFIG_REISERFS_PROC_INFO=y
# CONFIG_ADFS_FS is not set
# CONFIG_ADFS_FS_RW is not set
# CONFIG_AFFS_FS is not set
CONFIG_HFS_FS=y
CONFIG_BEFS_FS=y
# CONFIG_BEFS_DEBUG is not set
# CONFIG_BFS_FS is not set
CONFIG_EXT3_FS=y
CONFIG_JBD=y
# CONFIG_JBD_DEBUG is not set
# CONFIG_FAT_FS is not set
# CONFIG_MSDOS_FS is not set
# CONFIG_UMSDOS_FS is not set
# CONFIG_VFAT_FS is not set
# CONFIG_EFS_FS is not set
# CONFIG_JFFS_FS is not set
# CONFIG_JFFS2_FS is not set
# CONFIG_CRAMFS is not set
CONFIG_TMPFS=y
# CONFIG_RAMFS is not set
CONFIG_ISO9660_FS=y
CONFIG_JOLIET=y
CONFIG_ZISOFS=y
CONFIG_JFS_FS=y
# CONFIG_JFS_DEBUG is not set
CONFIG_JFS_STATISTICS=y
# CONFIG_MINIX_FS is not set
# CONFIG_VXFS_FS is not set
CONFIG_NTFS_FS=y
# CONFIG_NTFS_RW is not set
# CONFIG_HPFS_FS is not set
CONFIG_PROC_FS=y
CONFIG_DEVFS_FS=y
# CONFIG_DEVFS_MOUNT is not set
# CONFIG_DEVFS_DEBUG is not set
CONFIG_DEVPTS_FS=y
# CONFIG_QNX4FS_FS is not set
# CONFIG_QNX4FS_RW is not set
# CONFIG_ROMFS_FS is not set
CONFIG_EXT2_FS=y
# CONFIG_SYSV_FS is not set
CONFIG_UDF_FS=y
# CONFIG_UDF_RW is not set
# CONFIG_UFS_FS is not set
# CONFIG_UFS_FS_WRITE is not set

#
# Network File Systems
#
# CONFIG_CODA_FS is not set
# CONFIG_INTERMEZZO_FS is not set
CONFIG_NFS_FS=y
# CONFIG_NFS_V3 is not set
# CONFIG_ROOT_NFS is not set
CONFIG_NFSD=y
# CONFIG_NFSD_V3 is not set
# CONFIG_NFSD_TCP is not set
CONFIG_SUNRPC=y
CONFIG_LOCKD=y
CONFIG_SMB_FS=y
# CONFIG_SMB_NLS_DEFAULT is not set
# CONFIG_NCP_FS is not set
# CONFIG_NCPFS_PACKET_SIGNING is not set
# CONFIG_NCPFS_IOCTL_LOCKING is not set
# CONFIG_NCPFS_STRONG is not set
# CONFIG_NCPFS_NFS_NS is not set
# CONFIG_NCPFS_OS2_NS is not set
# CONFIG_NCPFS_SMALLDOS is not set
# CONFIG_NCPFS_NLS is not set
# CONFIG_NCPFS_EXTRAS is not set
CONFIG_ZISOFS_FS=y

#
# Partition Types
#
CONFIG_PARTITION_ADVANCED=y
# CONFIG_ACORN_PARTITION is not set
# CONFIG_OSF_PARTITION is not set
# CONFIG_AMIGA_PARTITION is not set
# CONFIG_ATARI_PARTITION is not set
CONFIG_MAC_PARTITION=y
CONFIG_MSDOS_PARTITION=y
CONFIG_BSD_DISKLABEL=y
# CONFIG_MINIX_SUBPARTITION is not set
# CONFIG_SOLARIS_X86_PARTITION is not set
# CONFIG_UNIXWARE_DISKLABEL is not set
CONFIG_LDM_PARTITION=y
# CONFIG_LDM_DEBUG is not set
# CONFIG_SGI_PARTITION is not set
# CONFIG_ULTRIX_PARTITION is not set
# CONFIG_SUN_PARTITION is not set
CONFIG_SMB_NLS=y
CONFIG_NLS=y

#
# Native Language Support
#
CONFIG_NLS_DEFAULT="iso8859-1"
# CONFIG_NLS_CODEPAGE_437 is not set
# CONFIG_NLS_CODEPAGE_737 is not set
# CONFIG_NLS_CODEPAGE_775 is not set
# CONFIG_NLS_CODEPAGE_850 is not set
# CONFIG_NLS_CODEPAGE_852 is not set
# CONFIG_NLS_CODEPAGE_855 is not set
# CONFIG_NLS_CODEPAGE_857 is not set
# CONFIG_NLS_CODEPAGE_860 is not set
# CONFIG_NLS_CODEPAGE_861 is not set
# CONFIG_NLS_CODEPAGE_862 is not set
# CONFIG_NLS_CODEPAGE_863 is not set
# CONFIG_NLS_CODEPAGE_864 is not set
# CONFIG_NLS_CODEPAGE_865 is not set
# CONFIG_NLS_CODEPAGE_866 is not set
# CONFIG_NLS_CODEPAGE_869 is not set
# CONFIG_NLS_CODEPAGE_936 is not set
# CONFIG_NLS_CODEPAGE_950 is not set
# CONFIG_NLS_CODEPAGE_932 is not set
# CONFIG_NLS_CODEPAGE_949 is not set
# CONFIG_NLS_CODEPAGE_874 is not set
# CONFIG_NLS_ISO8859_8 is not set
# CONFIG_NLS_CODEPAGE_1250 is not set
# CONFIG_NLS_CODEPAGE_1251 is not set
# CONFIG_NLS_ISO8859_1 is not set
# CONFIG_NLS_ISO8859_2 is not set
# CONFIG_NLS_ISO8859_3 is not set
# CONFIG_NLS_ISO8859_4 is not set
# CONFIG_NLS_ISO8859_5 is not set
# CONFIG_NLS_ISO8859_6 is not set
# CONFIG_NLS_ISO8859_7 is not set
# CONFIG_NLS_ISO8859_9 is not set
# CONFIG_NLS_ISO8859_13 is not set
# CONFIG_NLS_ISO8859_14 is not set
# CONFIG_NLS_ISO8859_15 is not set
# CONFIG_NLS_KOI8_R is not set
# CONFIG_NLS_KOI8_U is not set
# CONFIG_NLS_UTF8 is not set

#
# Console drivers
#
CONFIG_VGA_CONSOLE=y
# CONFIG_VIDEO_SELECT is not set
# CONFIG_MDA_CONSOLE is not set

#
# Frame-buffer support
#
# CONFIG_FB is not set

#
# Sound
#
CONFIG_SOUND=y
# CONFIG_SOUND_BT878 is not set
CONFIG_SOUND_CMPCI=m
CONFIG_SOUND_CMPCI_FM=y
CONFIG_SOUND_CMPCI_FMIO=388
CONFIG_SOUND_CMPCI_FMIO=388
CONFIG_SOUND_CMPCI_MIDI=y
CONFIG_SOUND_CMPCI_MPUIO=330
CONFIG_SOUND_CMPCI_JOYSTICK=y
CONFIG_SOUND_CMPCI_CM8738=y
# CONFIG_SOUND_CMPCI_SPDIFINVERSE is not set
# CONFIG_SOUND_CMPCI_SPDIFLOOP is not set
CONFIG_SOUND_CMPCI_SPEAKERS=2
# CONFIG_SOUND_EMU10K1 is not set
# CONFIG_MIDI_EMU10K1 is not set
# CONFIG_SOUND_FUSION is not set
# CONFIG_SOUND_CS4281 is not set
# CONFIG_SOUND_ES1370 is not set
CONFIG_SOUND_ES1371=y
# CONFIG_SOUND_ESSSOLO1 is not set
# CONFIG_SOUND_MAESTRO is not set
# CONFIG_SOUND_MAESTRO3 is not set
# CONFIG_SOUND_ICH is not set
# CONFIG_SOUND_RME96XX is not set
# CONFIG_SOUND_SONICVIBES is not set
# CONFIG_SOUND_TRIDENT is not set
# CONFIG_SOUND_MSNDCLAS is not set
# CONFIG_SOUND_MSNDPIN is not set
# CONFIG_SOUND_VIA82CXXX is not set
# CONFIG_MIDI_VIA82CXXX is not set
# CONFIG_SOUND_OSS is not set
# CONFIG_SOUND_TVMIXER is not set

#
# USB support
#
CONFIG_USB=y
# CONFIG_USB_DEBUG is not set

#
# Miscellaneous USB options
#
# CONFIG_USB_DEVICEFS is not set
# CONFIG_USB_BANDWIDTH is not set
# CONFIG_USB_LONG_TIMEOUT is not set

#
# USB Host Controller Drivers
#
# CONFIG_USB_EHCI_HCD is not set
CONFIG_USB_UHCI=y
# CONFIG_USB_UHCI_ALT is not set
# CONFIG_USB_OHCI is not set

#
# USB Device Class drivers
#
# CONFIG_USB_AUDIO is not set
# CONFIG_USB_EMI26 is not set
# CONFIG_USB_BLUETOOTH is not set
# CONFIG_USB_STORAGE is not set
# CONFIG_USB_STORAGE_DEBUG is not set
# CONFIG_USB_STORAGE_DATAFAB is not set
# CONFIG_USB_STORAGE_FREECOM is not set
# CONFIG_USB_STORAGE_ISD200 is not set
# CONFIG_USB_STORAGE_DPCM is not set
# CONFIG_USB_STORAGE_HP8200e is not set
# CONFIG_USB_STORAGE_SDDR09 is not set
# CONFIG_USB_STORAGE_JUMPSHOT is not set
# CONFIG_USB_ACM is not set
# CONFIG_USB_PRINTER is not set

#
# USB Human Interface Devices (HID)
#
CONFIG_USB_HID=y
CONFIG_USB_HIDDEV=y
# CONFIG_USB_WACOM is not set

#
# USB Imaging devices
#
# CONFIG_USB_DC2XX is not set
# CONFIG_USB_MDC800 is not set
# CONFIG_USB_SCANNER is not set
# CONFIG_USB_MICROTEK is not set
# CONFIG_USB_HPUSBSCSI is not set

#
# USB Multimedia devices
#

#
#   Video4Linux support is needed for USB Multimedia device support
#

#
# USB Network adaptors
#
# CONFIG_USB_PEGASUS is not set
# CONFIG_USB_KAWETH is not set
# CONFIG_USB_CATC is not set
# CONFIG_USB_CDCETHER is not set
# CONFIG_USB_USBNET is not set

#
# USB port drivers
#
# CONFIG_USB_USS720 is not set

#
# USB Serial Converter support
#
# CONFIG_USB_SERIAL is not set
# CONFIG_USB_SERIAL_GENERIC is not set
# CONFIG_USB_SERIAL_BELKIN is not set
# CONFIG_USB_SERIAL_WHITEHEAT is not set
# CONFIG_USB_SERIAL_DIGI_ACCELEPORT is not set
# CONFIG_USB_SERIAL_EMPEG is not set
# CONFIG_USB_SERIAL_FTDI_SIO is not set
# CONFIG_USB_SERIAL_VISOR is not set
# CONFIG_USB_SERIAL_IPAQ is not set
# CONFIG_USB_SERIAL_IR is not set
# CONFIG_USB_SERIAL_EDGEPORT is not set
# CONFIG_USB_SERIAL_KEYSPAN_PDA is not set
# CONFIG_USB_SERIAL_KEYSPAN is not set
# CONFIG_USB_SERIAL_KEYSPAN_USA28 is not set
# CONFIG_USB_SERIAL_KEYSPAN_USA28X is not set
# CONFIG_USB_SERIAL_KEYSPAN_USA28XA is not set
# CONFIG_USB_SERIAL_KEYSPAN_USA28XB is not set
# CONFIG_USB_SERIAL_KEYSPAN_USA19 is not set
# CONFIG_USB_SERIAL_KEYSPAN_USA18X is not set
# CONFIG_USB_SERIAL_KEYSPAN_USA19W is not set
# CONFIG_USB_SERIAL_KEYSPAN_USA49W is not set
# CONFIG_USB_SERIAL_MCT_U232 is not set
# CONFIG_USB_SERIAL_KLSI is not set
# CONFIG_USB_SERIAL_PL2303 is not set
# CONFIG_USB_SERIAL_CYBERJACK is not set
# CONFIG_USB_SERIAL_XIRCOM is not set
# CONFIG_USB_SERIAL_OMNINET is not set

#
# USB Miscellaneous drivers
#
# CONFIG_USB_RIO500 is not set
# CONFIG_USB_AUERSWALD is not set

#
# Bluetooth support
#
# CONFIG_BLUEZ is not set

#
# Kernel hacking
#
CONFIG_SOFTWARE_SUSPEND=y
CONFIG_DEBUG_KERNEL=y
# CONFIG_DEBUG_HIGHMEM is not set
# CONFIG_DEBUG_SLAB is not set
# CONFIG_DEBUG_IOVIRT is not set
# CONFIG_MAGIC_SYSRQ is not set
# CONFIG_DEBUG_SPINLOCK is not set
# CONFIG_EARLY_CONSOLE_3F8 is not set
# CONFIG_EARLY_CONSOLE_3E8 is not set
CONFIG_EARLY_CONSOLE_VGA=y
# CONFIG_EARLY_CONSOLE_BOCHS_E9_HACK is not set

#
# Library routines
#
CONFIG_ZLIB_INFLATE=y
CONFIG_ZLIB_DEFLATE=m
/*
 * Automatically generated C config: don't edit
 */
#define AUTOCONF_INCLUDED
#define CONFIG_X86 1
#define CONFIG_ISA 1
#undef  CONFIG_SBUS
#define CONFIG_UID16 1
/*
 * Code maturity level options
 */
#define CONFIG_EXPERIMENTAL 1
/*
 * Loadable module support
 */
#define CONFIG_MODULES 1
#define CONFIG_MODVERSIONS 1
#define CONFIG_KMOD 1
/*
 * Processor type and features
 */
#undef  CONFIG_M386
#undef  CONFIG_M486
#undef  CONFIG_M586
#undef  CONFIG_M586TSC
#undef  CONFIG_M586MMX
#undef  CONFIG_M686
#define CONFIG_MPENTIUMIII 1
#undef  CONFIG_MPENTIUM4
#undef  CONFIG_MK6
#undef  CONFIG_MK7
#undef  CONFIG_MELAN
#undef  CONFIG_MCRUSOE
#undef  CONFIG_MWINCHIPC6
#undef  CONFIG_MWINCHIP2
#undef  CONFIG_MWINCHIP3D
#undef  CONFIG_MCYRIXIII
#define CONFIG_X86_WP_WORKS_OK 1
#define CONFIG_X86_INVLPG 1
#define CONFIG_X86_CMPXCHG 1
#define CONFIG_X86_XADD 1
#define CONFIG_X86_BSWAP 1
#define CONFIG_X86_POPAD_OK 1
#undef  CONFIG_RWSEM_GENERIC_SPINLOCK
#define CONFIG_RWSEM_XCHGADD_ALGORITHM 1
#define CONFIG_X86_L1_CACHE_SHIFT (5)
#define CONFIG_X86_TSC 1
#define CONFIG_X86_GOOD_APIC 1
#define CONFIG_X86_PGE 1
#define CONFIG_X86_USE_PPRO_CHECKSUM 1
#define CONFIG_X86_MCE 1
#undef  CONFIG_TOSHIBA
#undef  CONFIG_I8K
#define CONFIG_MICROCODE 1
#define CONFIG_X86_MSR 1
#define CONFIG_X86_CPUID 1
#define CONFIG_NOHIGHMEM 1
#undef  CONFIG_HIGHMEM4G
#undef  CONFIG_HIGHMEM64G
#undef  CONFIG_HIGHMEM
#undef  CONFIG_1GB
#undef  CONFIG_2GB
#undef  CONFIG_3GB
#define CONFIG_05GB 1
#undef  CONFIG_MATH_EMULATION
#define CONFIG_MTRR 1
#define CONFIG_SMP 1
#define CONFIG_PREEMPT 1
#undef  CONFIG_MULTIQUAD
#define CONFIG_HAVE_DEC_LOCK 1
/*
 * General setup
 */
#define CONFIG_NET 1
#define CONFIG_X86_IO_APIC 1
#define CONFIG_X86_LOCAL_APIC 1
#define CONFIG_PCI 1
#undef  CONFIG_PCI_GOBIOS
#undef  CONFIG_PCI_GODIRECT
#define CONFIG_PCI_GOANY 1
#define CONFIG_PCI_BIOS 1
#define CONFIG_PCI_DIRECT 1
#define CONFIG_PCI_NAMES 1
#undef  CONFIG_EISA
#undef  CONFIG_MCA
#define CONFIG_HOTPLUG 1
/*
 * PCMCIA/CardBus support
 */
#undef  CONFIG_PCMCIA
/*
 * PCI Hotplug Support
 */
#undef  CONFIG_HOTPLUG_PCI
#define CONFIG_SYSVIPC 1
#define CONFIG_BSD_PROCESS_ACCT 1
#define CONFIG_SYSCTL 1
#define CONFIG_KCORE_ELF 1
#undef  CONFIG_KCORE_AOUT
#define CONFIG_BINFMT_AOUT 1
#define CONFIG_BINFMT_ELF 1
#define CONFIG_BINFMT_MISC 1
#define CONFIG_IKCONFIG 1
#define CONFIG_PM 1
#undef  CONFIG_ACPI
#undef  CONFIG_APM
/*
 * Memory Technology Devices (MTD)
 */
#undef  CONFIG_MTD
/*
 * Parallel port support
 */
#define CONFIG_PARPORT 1
#define CONFIG_PARPORT_PC 1
#define CONFIG_PARPORT_PC_CML1 1
#undef  CONFIG_PARPORT_SERIAL
#define CONFIG_PARPORT_PC_FIFO 1
#undef  CONFIG_PARPORT_PC_SUPERIO
#undef  CONFIG_PARPORT_AMIGA
#undef  CONFIG_PARPORT_MFC3
#undef  CONFIG_PARPORT_ATARI
#undef  CONFIG_PARPORT_GSC
#undef  CONFIG_PARPORT_SUNBPP
#define CONFIG_PARPORT_OTHER 1
#define CONFIG_PARPORT_1284 1
/*
 * Plug and Play configuration
 */
#define CONFIG_PNP 1
#define CONFIG_ISAPNP 1
#define CONFIG_PNPBIOS 1
/*
 * Block devices
 */
#define CONFIG_BLK_DEV_FD 1
#undef  CONFIG_BLK_DEV_XD
#undef  CONFIG_PARIDE
#undef  CONFIG_BLK_CPQ_DA
#undef  CONFIG_BLK_CPQ_CISS_DA
#undef  CONFIG_BLK_DEV_DAC960
#define CONFIG_BLK_DEV_LOOP 1
#define CONFIG_BLK_DEV_NBD 1
#define CONFIG_BLK_DEV_RAM 1
#define CONFIG_BLK_DEV_RAM_SIZE (4096)
#undef  CONFIG_BLK_DEV_INITRD
/*
 * Multi-device support (RAID and LVM)
 */
#define CONFIG_MD 1
#define CONFIG_BLK_DEV_MD 1
#define CONFIG_MD_LINEAR 1
#define CONFIG_MD_RAID0 1
#define CONFIG_MD_RAID1 1
#define CONFIG_MD_RAID5 1
#define CONFIG_MD_MULTIPATH 1
#define CONFIG_BLK_DEV_LVM 1
/*
 * Networking options
 */
#define CONFIG_PACKET 1
#define CONFIG_PACKET_MMAP 1
#define CONFIG_NETLINK_DEV 1
#undef  CONFIG_NETFILTER
#define CONFIG_FILTER 1
#define CONFIG_UNIX 1
#define CONFIG_INET 1
#define CONFIG_IP_MULTICAST 1
#undef  CONFIG_IP_ADVANCED_ROUTER
#define CONFIG_IP_PNP 1
#define CONFIG_IP_PNP_DHCP 1
#undef  CONFIG_IP_PNP_BOOTP
#undef  CONFIG_IP_PNP_RARP
#define CONFIG_NET_IPIP 1
#undef  CONFIG_NET_IPGRE
#define CONFIG_IP_MROUTE 1
#undef  CONFIG_IP_PIMSM_V1
#define CONFIG_IP#
# Automatically generated make config: don't edit
#
CONFIG_X86=y
CONFIG_ISA=y
# CONFIG_SBUS is not set
CONFIG_UID16=y

#
# Code maturity level options
#
CONFIG_EXPERIMENTAL=y

#
# Loadable module support
#
CONFIG_MODULES=y
CONFIG_MODVERSIONS=y
CONFIG_KMOD=y

#
# Processor type and features
#
# CONFIG_M386 is not set
# CONFIG_M486 is not set
# CONFIG_M586 is not set
# CONFIG_M586TSC is not set
# CONFIG_M586MMX is not set
# CONFIG_M686 is not set
CONFIG_MPENTIUMIII=y
# CONFIG_MPENTIUM4 is not set
# CONFIG_MK6 is not set
# CONFIG_MK7 is not set
# CONFIG_MELAN is not set
# CONFIG_MCRUSOE is not set
# CONFIG_MWINCHIPC6 is not set
# CONFIG_MWINCHIP2 is not set
# CONFIG_MWINCHIP3D is not set
# CONFIG_MCYRIXIII is not set
CONFIG_X86_WP_WORKS_OK=y
CONFIG_X86_INVLPG=y
CONFIG_X86_CMPXCHG=y
CONFIG_X86_XADD=y
CONFIG_X86_BSWAP=y
CONFIG_X86_POPAD_OK=y
# CONFIG_RWSEM_GENERIC_SPINLOCK is not set
CONFIG_RWSEM_XCHGADD_ALGORITHM=y
CONFIG_X86_L1_CACHE_SHIFT=5
CONFIG_X86_TSC=y
CONFIG_X86_GOOD_APIC=y
CONFIG_X86_PGE=y
CONFIG_X86_USE_PPRO_CHECKSUM=y
CONFIG_X86_MCE=y
# CONFIG_TOSHIBA is not set
# CONFIG_I8K is not set
CONFIG_MICROCODE=y
CONFIG_X86_MSR=y
CONFIG_X86_CPUID=y
CONFIG_NOHIGHMEM=y
# CONFIG_HIGHMEM4G is not set
# CONFIG_HIGHMEM64G is not set
# CONFIG_HIGHMEM is not set
# CONFIG_1GB is not set
# CONFIG_2GB is not set
# CONFIG_3GB is not set
CONFIG_05GB=y
# CONFIG_MATH_EMULATION is not set
CONFIG_MTRR=y
CONFIG_SMP=y
CONFIG_PREEMPT=y
# CONFIG_MULTIQUAD is not set
CONFIG_HAVE_DEC_LOCK=y

#
# General setup
#
CONFIG_NET=y
CONFIG_X86_IO_APIC=y
CONFIG_X86_LOCAL_APIC=y
CONFIG_PCI=y
# CONFIG_PCI_GOBIOS is not set
# CONFIG_PCI_GODIRECT is not set
CONFIG_PCI_GOANY=y
CONFIG_PCI_BIOS=y
CONFIG_PCI_DIRECT=y
CONFIG_PCI_NAMES=y
# CONFIG_EISA is not set
# CONFIG_MCA is not set
CONFIG_HOTPLUG=y

#
# PCMCIA/CardBus support
#
# CONFIG_PCMCIA is not set

#
# PCI Hotplug Support
#
# CONFIG_HOTPLUG_PCI is not set
CONFIG_SYSVIPC=y
CONFIG_BSD_PROCESS_ACCT=y
CONFIG_SYSCTL=y
CONFIG_KCORE_ELF=y
# CONFIG_KCORE_AOUT is not set
CONFIG_BINFMT_AOUT=y
CONFIG_BINFMT_ELF=y
CONFIG_BINFMT_MISC=y
CONFIG_IKCONFIG=y
CONFIG_PM=y
# CONFIG_ACPI is not set
# CONFIG_APM is not set

#
# Memory Technology Devices (MTD)
#
# CONFIG_MTD is not set

#
# Parallel port support
#
CONFIG_PARPORT=y
CONFIG_PARPORT_PC=y
CONFIG_PARPORT_PC_CML1=y
# CONFIG_PARPORT_SERIAL is not set
CONFIG_PARPORT_PC_FIFO=y
# CONFIG_PARPORT_PC_SUPERIO is not set
# CONFIG_PARPORT_AMIGA is not set
# CONFIG_PARPORT_MFC3 is not set
# CONFIG_PARPORT_ATARI is not set
# CONFIG_PARPORT_GSC is not set
# CONFIG_PARPORT_SUNBPP is not set
CONFIG_PARPORT_OTHER=y
CONFIG_PARPORT_1284=y

#
# Plug and Play configuration
#
CONFIG_PNP=y
CONFIG_ISAPNP=y
CONFIG_PNPBIOS=y

#
# Block devices
#
CONFIG_BLK_DEV_FD=y
# CONFIG_BLK_DEV_XD is not set
# CONFIG_PARIDE is not set
# CONFIG_BLK_CPQ_DA is not set
# CONFIG_BLK_CPQ_CISS_DA is not set
# CONFIG_BLK_DEV_DAC960 is not set
CONFIG_BLK_DEV_LOOP=y
CONFIG_BLK_DEV_NBD=y
CONFIG_BLK_DEV_RAM=y
CONFIG_BLK_DEV_RAM_SIZE=4096
# CONFIG_BLK_DEV_INITRD is not set

#
# Multi-device support (RAID and LVM)
#
CONFIG_MD=y
CONFIG_BLK_DEV_MD=y
CONFIG_MD_LINEAR=y
CONFIG_MD_RAID0=y
CONFIG_MD_RAID1=y
CONFIG_MD_RAID5=y
CONFIG_MD_MULTIPATH=y
CONFIG_BLK_DEV_LVM=y

#
# Networking options
#
CONFIG_PACKET=y
CONFIG_PACKET_MMAP=y
CONFIG_NETLINK_DEV=y
# CONFIG_NETFILTER is not set
CONFIG_FILTER=y
CONFIG_UNIX=y
CONFIG_INET=y
CONFIG_IP_MULTICAST=y
# CONFIG_IP_ADVANCED_ROUTER is not set
CONFIG_IP_PNP=y
CONFIG_IP_PNP_DHCP=y
# CONFIG_IP_PNP_BOOTP is not set
# CONFIG_IP_PNP_RARP is not set
CONFIG_NET_IPIP=y
# CONFIG_NET_IPGRE is not set
CONFIG_IP_MROUTE=y
# CONFIG_IP_PIMSM_V1 is not set
CONFIG_IP_PIMSM_V2=y
# CONFIG_ARPD is not set
CONFIG_INET_ECN=y
CONFIG_SYN_COOKIES=y
CONFIG_IPV6=y
# CONFIG_KHTTPD is not set
# CONFIG_ATM is not set
CONFIG_VLAN_8021Q=y

#
#  
#
CONFIG_IPX=y
# CONFIG_IPX_INTERN is not set
CONFIG_ATALK=y
# CONFIG_DECNET is not set
# CONFIG_BRIDGE is not set
# CONFIG_X25 is not set
# CONFIG_LAPB is not set
# CONFIG_LLC is not set
# CONFIG_NET_DIVERT is not set
# CONFIG_ECONET is not set
# CONFIG_WAN_ROUTER is not se_PIMSM_V2 1
#undef  CONFIG_ARPD
#define CONFIG_INET_ECN 1
#define CONFIG_SYN_COOKIES 1
#define CONFIG_IPV6 1
#undef  CONFIG_KHTTPD
#undef  CONFIG_ATM
#define CONFIG_VLAN_8021Q 1
/*
 *  
 */
#define CONFIG_IPX 1
#undef  CONFIG_IPX_INTERN
#define CONFIG_ATALK 1
#undef  CONFIG_DECNET
#undef  CONFIG_BRIDGE
#undef  CONFIG_X25
#undef  CONFIG_LAPB
#undef  CONFIG_LLC
#undef  CONFIG_NET_DIVERT
#undef  CONFIG_ECONET
#undef  CONFIG_WAN_ROUTER
#define CONFIG_NET_FASTROUTE 1
#define CONFIG_NET_HW_FLOWCONTROL 1
/*
 * QoS and/or fair queueing
 */
#undef  CONFIG_NET_SCHED
/*
 * Network testing
 */
#define CONFIG_NET_PKTGEN 1
/*
 * Telephony Support
 */
#undef  CONFIG_PHONE
/*
 * ATA/IDE/MFM/RLL support
 */
#define CONFIG_IDE 1
/*
 * IDE, ATA and ATAPI Block devices
 */
#define CONFIG_BLK_DEV_IDE 1
/*
 * Please see Documentation/ide.txt for help/info on IDE drives
 */
#undef  CONFIG_BLK_DEV_HD_IDE
#undef  CONFIG_BLK_DEV_HD
#define CONFIG_BLK_DEV_IDEDISK 1
#define CONFIG_IDEDISK_MULTI_MODE 1
#define CONFIG_IDEDISK_STROKE 1
#undef  CONFIG_BLK_DEV_IDEDISK_VENDOR
#undef  CONFIG_BLK_DEV_COMMERIAL
#undef  CONFIG_BLK_DEV_IDECD
#define CONFIG_BLK_DEV_IDECD_MODULE 1
#undef  CONFIG_BLK_DEV_IDETAPE
#undef  CONFIG_BLK_DEV_IDEFLOPPY
#define CONFIG_BLK_DEV_IDESCSI 1
#define CONFIG_IDE_TASK_IOCTL 1
#define CONFIG_IDE_TASKFILE_IO 1
/*
 * IDE chipset support/bugfixes
 */
#define CONFIG_BLK_DEV_CMD640 1
#undef  CONFIG_BLK_DEV_CMD640_ENHANCED
#undef  CONFIG_BLK_DEV_ISAPNP
#define CONFIG_BLK_DEV_RZ1000 1
#define CONFIG_BLK_DEV_IDEPCI 1
#define CONFIG_IDEPCI_SHARE_IRQ 1
#define CONFIG_BLK_DEV_IDEDMA_PCI 1
#undef  CONFIG_BLK_DEV_OFFBOARD
#undef  CONFIG_BLK_DEV_IDEDMA_FORCED
#define CONFIG_IDEDMA_PCI_AUTO 1
#undef  CONFIG_IDEDMA_ONLYDISK
#define CONFIG_BLK_DEV_IDEDMA 1
#undef  CONFIG_IDEDMA_PCI_WIP
#define CONFIG_BLK_DEV_ADMA 1
#undef  CONFIG_BLK_DEV_AEC62XX
#undef  CONFIG_BLK_DEV_ALI15X3
#undef  CONFIG_BLK_DEV_AMD74XX
#undef  CONFIG_BLK_DEV_CMD64X
#undef  CONFIG_BLK_DEV_CY82C693
#undef  CONFIG_BLK_DEV_CS5530
#undef  CONFIG_BLK_DEV_HPT34X
#define CONFIG_BLK_DEV_HPT366 1
#undef  CONFIG_BLK_DEV_PIIX
#undef  CONFIG_BLK_DEV_NS87415
#undef  CONFIG_BLK_DEV_OPTI621
#undef  CONFIG_BLK_DEV_PDC202XX
#undef  CONFIG_BLK_DEV_SVWKS
#undef  CONFIG_BLK_DEV_SIS5513
#undef  CONFIG_BLK_DEV_SLC90E66
#undef  CONFIG_BLK_DEV_TRM290
#define CONFIG_BLK_DEV_VIA82CXXX 1
#undef  CONFIG_IDE_CHIPSETS
#define CONFIG_IDEDMA_AUTO 1
#define CONFIG_IDEDMA_IVB 1
#undef  CONFIG_DMA_NONPCI
#define CONFIG_BLK_DEV_IDE_MODES 1
#define CONFIG_BLK_DEV_ATARAID 1
#undef  CONFIG_BLK_DEV_ATARAID_PDC
#define CONFIG_BLK_DEV_ATARAID_HPT 1
/*
 * SCSI support
 */
#define CONFIG_SCSI 1
/*
 * SCSI support type (disk, tape, CD-ROM)
 */
#define CONFIG_BLK_DEV_SD 1
#define CONFIG_SD_EXTRA_DEVS (40)
#undef  CONFIG_CHR_DEV_ST
#undef  CONFIG_CHR_DEV_OSST
#define CONFIG_BLK_DEV_SR 1
#undef  CONFIG_BLK_DEV_SR_VENDOR
#define CONFIG_SR_EXTRA_DEVS (2)
#define CONFIG_CHR_DEV_SG 1
/*
 * Some SCSI devices (e.g. CD jukebox) support multiple LUNs
 */
#define CONFIG_SCSI_DEBUG_QUEUES 1
#define CONFIG_SCSI_MULTI_LUN 1
#define CONFIG_SCSI_CONSTANTS 1
#undef  CONFIG_SCSI_LOGGING
/*
 * SCSI low-level drivers
 */
#undef  CONFIG_BLK_DEV_3W_XXXX_RAID
#undef  CONFIG_SCSI_7000FASST
#undef  CONFIG_SCSI_ACARD
#undef  CONFIG_SCSI_AHA152X
#undef  CONFIG_SCSI_AHA1542
#undef  CONFIG_SCSI_AHA1740
#undef  CONFIG_SCSI_AACRAID
#undef  CONFIG_SCSI_AIC7XXX
#undef  CONFIG_SCSI_AIC7XXX_OLD
#undef  CONFIG_SCSI_DPT_I2O
#undef  CONFIG_SCSI_ADVANSYS
#undef  CONFIG_SCSI_IN2000
#undef  CONFIG_SCSI_AM53C974
#undef  CONFIG_SCSI_MEGARAID
#undef  CONFIG_SCSI_BUSLOGIC
#undef  CONFIG_SCSI_CPQFCTS
#undef  CONFIG_SCSI_DMX3191D
#undef  CONFIG_SCSI_DTC3280
#undef  CONFIG_SCSI_EATA
#undef  CONFIG_SCSI_EATA_DMA
#undef  CONFIG_SCSI_EATA_PIO
#undef  CONFIG_SCSI_FUTURE_DOMAIN
#undef  CONFIG_SCSI_GDTH
#undef  CONFIG_SCSI_GENERIC_NCR5380
#undef  CONFIG_SCSI_IPS
#undef  CONFIG_SCSI_INITIO
#undef  CONFIG_SCSI_INIA100
#undef  CONFIG_SCSI_PPA
#undef  CONFIG_SCSI_IMM
#undef  CONFIG_SCSI_NCR53C406A
#undef  CONFIG_SCSI_NCR53C7xx
#undef  CONFIG_SCSI_SYM53C8XX_2
#undef  CONFIG_SCSI_Nt
CONFIG_NET_FASTROUTE=y
CONFIG_NET_HW_FLOWCONTROL=y

#
# QoS and/or fair queueing
#
# CONFIG_NET_SCHED is not set

#
# Network testing
#
CONFIG_NET_PKTGEN=y

#
# Telephony Support
#
# CONFIG_PHONE is not set

#
# ATA/IDE/MFM/RLL support
#
CONFIG_IDE=y

#
# IDE, ATA and ATAPI Block devices
#
CONFIG_BLK_DEV_IDE=y

#
# Please see Documentation/ide.txt for help/info on IDE drives
#
# CONFIG_BLK_DEV_HD_IDE is not set
# CONFIG_BLK_DEV_HD is not set
CONFIG_BLK_DEV_IDEDISK=y
CONFIG_IDEDISK_MULTI_MODE=y
CONFIG_IDEDISK_STROKE=y
# CONFIG_BLK_DEV_IDEDISK_VENDOR is not set
# CONFIG_BLK_DEV_COMMERIAL is not set
CONFIG_BLK_DEV_IDECD=m
# CONFIG_BLK_DEV_IDETAPE is not set
# CONFIG_BLK_DEV_IDEFLOPPY is not set
CONFIG_BLK_DEV_IDESCSI=y
CONFIG_IDE_TASK_IOCTL=y
CONFIG_IDE_TASKFILE_IO=y

#
# IDE chipset support/bugfixes
#
CONFIG_BLK_DEV_CMD640=y
# CONFIG_BLK_DEV_CMD640_ENHANCED is not set
# CONFIG_BLK_DEV_ISAPNP is not set
CONFIG_BLK_DEV_RZ1000=y
CONFIG_BLK_DEV_IDEPCI=y
CONFIG_IDEPCI_SHARE_IRQ=y
CONFIG_BLK_DEV_IDEDMA_PCI=y
# CONFIG_BLK_DEV_OFFBOARD is not set
# CONFIG_BLK_DEV_IDEDMA_FORCED is not set
CONFIG_IDEDMA_PCI_AUTO=y
# CONFIG_IDEDMA_ONLYDISK is not set
CONFIG_BLK_DEV_IDEDMA=y
# CONFIG_IDEDMA_PCI_WIP is not set
CONFIG_BLK_DEV_ADMA=y
# CONFIG_BLK_DEV_AEC62XX is not set
# CONFIG_BLK_DEV_ALI15X3 is not set
# CONFIG_BLK_DEV_AMD74XX is not set
# CONFIG_BLK_DEV_CMD64X is not set
# CONFIG_BLK_DEV_CY82C693 is not set
# CONFIG_BLK_DEV_CS5530 is not set
# CONFIG_BLK_DEV_HPT34X is not set
CONFIG_BLK_DEV_HPT366=y
# CONFIG_BLK_DEV_PIIX is not set
# CONFIG_BLK_DEV_NS87415 is not set
# CONFIG_BLK_DEV_OPTI621 is not set
# CONFIG_BLK_DEV_PDC202XX is not set
# CONFIG_BLK_DEV_SVWKS is not set
# CONFIG_BLK_DEV_SIS5513 is not set
# CONFIG_BLK_DEV_SLC90E66 is not set
# CONFIG_BLK_DEV_TRM290 is not set
CONFIG_BLK_DEV_VIA82CXXX=y
# CONFIG_IDE_CHIPSETS is not set
CONFIG_IDEDMA_AUTO=y
CONFIG_IDEDMA_IVB=y
# CONFIG_DMA_NONPCI is not set
CONFIG_BLK_DEV_IDE_MODES=y
CONFIG_BLK_DEV_ATARAID=y
# CONFIG_BLK_DEV_ATARAID_PDC is not set
CONFIG_BLK_DEV_ATARAID_HPT=y

#
# SCSI support
#
CONFIG_SCSI=y

#
# SCSI support type (disk, tape, CD-ROM)
#
CONFIG_BLK_DEV_SD=y
CONFIG_SD_EXTRA_DEVS=40
# CONFIG_CHR_DEV_ST is not set
# CONFIG_CHR_DEV_OSST is not set
CONFIG_BLK_DEV_SR=y
# CONFIG_BLK_DEV_SR_VENDOR is not set
CONFIG_SR_EXTRA_DEVS=2
CONFIG_CHR_DEV_SG=y

#
# Some SCSI devices (e.g. CD jukebox) support multiple LUNs
#
CONFIG_SCSI_DEBUG_QUEUES=y
CONFIG_SCSI_MULTI_LUN=y
CONFIG_SCSI_CONSTANTS=y
# CONFIG_SCSI_LOGGING is not set

#
# SCSI low-level drivers
#
# CONFIG_BLK_DEV_3W_XXXX_RAID is not set
# CONFIG_SCSI_7000FASST is not set
# CONFIG_SCSI_ACARD is not set
# CONFIG_SCSI_AHA152X is not set
# CONFIG_SCSI_AHA1542 is not set
# CONFIG_SCSI_AHA1740 is not set
# CONFIG_SCSI_AACRAID is not set
# CONFIG_SCSI_AIC7XXX is not set
# CONFIG_SCSI_AIC7XXX_OLD is not set
# CONFIG_SCSI_DPT_I2O is not set
# CONFIG_SCSI_ADVANSYS is not set
# CONFIG_SCSI_IN2000 is not set
# CONFIG_SCSI_AM53C974 is not set
# CONFIG_SCSI_MEGARAID is not set
# CONFIG_SCSI_BUSLOGIC is not set
# CONFIG_SCSI_CPQFCTS is not set
# CONFIG_SCSI_DMX3191D is not set
# CONFIG_SCSI_DTC3280 is not set
# CONFIG_SCSI_EATA is not set
# CONFIG_SCSI_EATA_DMA is not set
# CONFIG_SCSI_EATA_PIO is not set
# CONFIG_SCSI_FUTURE_DOMAIN is not set
# CONFIG_SCSI_GDTH is not set
# CONFIG_SCSI_GENERIC_NCR5380 is not set
# CONFIG_SCSI_IPS is not set
# CONFIG_SCSI_INITIO is not set
# CONFIG_SCSI_INIA100 is not set
# CONFIG_SCSI_PPA is not set
# CONFIG_SCSI_IMM is not set
# CONFIG_SCSI_NCR53C406A is not set
# CONFIG_SCSI_NCR53C7xx is not set
# CONFIG_SCSI_SYM53C8XX_2 is not set
# CONFIG_SCSI_NCR53C8XX is not set
# CONFIG_SCSI_SYM53C8XX is not set
# CONFIG_SCSI_PAS16 is not set
# CONFIG_SCSI_PCI2000 is not set
# CONFIG_SCSI_PCI2220I is not set
# CONFIG_SCSI_PSI240I is not set
# CONFIG_SCSI_QLOGIC_FAS is not set
# CONFIG_SCSI_QLOGIC_ISP is not set
# CONFIG_SCSI_QLOGIC_FC is not set
# CONFIG_SCSI_QLOGIC_1280 is not set
# CONFIG_SCSI_SEAGATE is not set
# CONFIG_SCSI_SIM710 is not set
# CONFIG_SCSI_SYM53C416 is not set
# CONFIG_SCSI_DC390T is not set#define __ver_ad1848_detect	smp_3e0356ab
#define ad1848_detect	_set_ver(ad1848_detect)
#define __ver_ad1848_init	smp_73f4849a
#define ad1848_init	_set_ver(ad1848_init)
#define __ver_ad1848_unload	smp_9bf1cc62
#define ad1848_unload	_set_ver(ad1848_unload)
#define __ver_ad1848_control	smp_c04f6f67
#define ad1848_control	_set_ver(ad1848_control)
#define __ver_adintr	smp_9fa1e3f6
#define adintr	_set_ver(adintr)
#define __ver_probe_ms_sound	smp_37773bb0
#define probe_ms_sound	_set_ver(probe_ms_sound)
#define __ver_attach_ms_sound	smp_eead1815
#define attach_ms_sound	_set_ver(attach_ms_sound)
#define __ver_unload_ms_sound	smp_b29a9148
#define unload_ms_sound	_set_ver(unload_ms_sound)
#define __ver_DMAbuf_start_dma	smp_e056b71c
#define DMAbuf_start_dma	_set_ver(DMAbuf_start_dma)
#define __ver_DMAbuf_open_dma	smp_06b3013d
#define DMAbuf_open_dma	_set_ver(DMAbuf_open_dma)
#define __ver_DMAbuf_close_dma	smp_c88b42ab
#define DMAbuf_close_dma	_set_ver(DMAbuf_close_dma)
#define __ver_DMAbuf_inputintr	smp_eb315d99
#define DMAbuf_inputintr	_set_ver(DMAbuf_inputintr)
#define __ver_DMAbuf_outputintr	smp_987bcf12
#define DMAbuf_outputintr	_set_ver(DMAbuf_outputintr)
#define __ver_dma_ioctl	smp_fa21d662
#define dma_ioctl	_set_ver(dma_ioctl)
#define __ver_audio_open	smp_a385f1fb
#define audio_open	_set_ver(audio_open)
#define __ver_audio_release	smp_510fb725
#define audio_release	_set_ver(audio_release)
/* $Id: VIScsum.S,v 1.6 2000/02/20 23:21:39 davem Exp $
 * VIScsum.S: High bandwidth IP checksumming utilizing the UltraSparc
 *            Visual Instruction Set.
 *
 * Copyright (C) 1997 Jakub Jelinek (jj@sunsite.mff.cuni.cz)
 * Copyright (C) 2000 David S. Miller (davem@redhat.com)
 *
 * Based on older sparc32/sparc64 checksum.S, which is:
 *
 *      Copyright(C) 1995 Linus Torvalds
 *      Copyright(C) 1995 Miguel de Icaza
 *      Copyright(C) 1996, 1997 David S. Miller
 *    derived from:
 *	  Linux/Alpha checksum c-code
 *        Linux/ix86 inline checksum assembly
 *        RFC1071 Computing the Internet Checksum (esp. Jacobsons m68k code)
 *	  David Mosberger-Tang for optimized reference c-code
 *	  BSD4.4 portable checksum routine
 */

#ifdef __sparc_v9__
#define STACKOFF	2175
#else
#define STACKOFF	64
#endif

#ifdef __KERNEL__
#include <asm/head.h>
#include <asm/asi.h>
#include <asm/visasm.h>
#include <asm/asm_offsets.h>
#else
#define ASI_BLK_P	0xf0
#define FRPS_FEF	0x04
#endif

/* Dobrou noc, SunSoft engineers. Spete sladce.
 * This has a couple of tricks in and those
 * tricks are UltraLinux trade secrets :))
 */

#define START_THE_TRICK(fz,f0,f2,f4,f6,f8,f10)						\
	fcmpgt32	%fz, %f0, %g1		/*  FPM		Group	*/;		\
	fcmpgt32	%fz, %f2, %g2		/*  FPM		Group	*/;		\
	fcmpgt32	%fz, %f4, %g3		/*  FPM		Group	*/;		\
	inc		%g1			/*  IEU0	Group	*/;		\
	fcmpgt32	%fz, %f6, %g5		/*  FPM			*/;		\
	srl		%g1, 1, %g1		/*  IEU0	Group	*/;		\
	fcmpgt32	%fz, %f8, %g7		/*  FPM			*/;		\
	inc		%g2			/*  IEU0	Group	*/;		\
	fcmpgt32	%fz, %f10, %o3		/*  FPM			*/;		\
	srl		%g2, 1, %g2		/*  IEU0	Group	*/;		\
	inc		%g3			/*  IEU1		*/;		\
	srl		%g3, 1, %g3		/*  IEU0	Group	*/;		\
	add		%o2, %g1, %o2		/*  IEU1		*/;		\
	add		%o2, %g2, %o2		/*  IEU0	Group	*/;		\
	inc		%g5			/*  IEU1		*/;		\
	add		%o2, %g3, %o2		/*  IEU0	Group	*/;

#define DO_THE_TRICK(O12,O14,f0,f2,f4,f6,f8,f10,f12,f14,F0,F2,F4,F6,F8,F10,F12,F14)	\
	srl		%g5, 1, %g5		/*  IEU0	Group	*/;		\
	fpadd32		%F0, %f0, %F0		/*  FPA			*/;		\
	fcmpgt32	%O12, %f12, %o4		/*  FPM			*/;		\
	inc		%g7			/*  IEU0	Group	*/;		\
	fpadd32		%F2, %f2, %F2		/*  FPA			*/;		\
	fcmpgt32	%O14, %f14, %o5		/*  FPM			*/;		\
	add		%o2, %g5, %o2		/*  IEU1	Group	*/;		\
	fpadd32		%F4, %f4, %F4		/*  FPA			*/;		\
	fcmpgt32	%f0, %F0, %g1		/*  FPM			*/;		\
	srl		%g7, 1, %g7		/*  IEU0	Group	*/;		\
	fpadd32		%F6, %f6, %F6		/*  FPA			*/;		\
	fcmpgt32	%f2, %F2, %g2		/*  FPM			*/;		\
	add		%o2, %g7, %o2		/*  IEU0	Group	*/;		\
	fpadd32		%F8, %f8, %F8		/*  FPA			*/;		\
	fcmpgt32	%f4, %F4, %g3		/*  FPM			*/;		\
	inc		%o3			/*  IEU0	Group	*/;		\
	fpadd32		%F10, %f10, %F10	/*  FPA			*/;		\
	fcmpgt32	%f6, %F6, %g5		/*  FPM			*/;		\
	srl		%o3, 1, %o3		/*  IEU0	Group	*/;		\
	fpadd32		%F12, %f12, %F12	/*  FPA			*/;		\
	fcmpgt32	%f8, %F8, %g7		/*  FPM			*/;		\
	add		%o2, %o3, %o2		/*  IEU0	Group	*/;		\
	fpadd32		%F14, %f14, %F14	/*  FPA			*/;		\
	fcmpgt32	%f10, %F10, %o3		/*  FPM			*/;		\
	inc		%o4			/*  IEU0	Group	*/;		\
	inc		%o5			/*  IEU1		*/;		\
	srl		%o4, 1, %o4		/*  IEU0	Group	*/;		\
	inc		%g1			/*  IEU1		*/;		\
	srl		%o5, 1, %o5		/*  IEU0	Group	*/;		\
	add		%o2, %o4, %o2		/*  IEU1		*/;		\
	srl		%g1, 1, %g1		/*  IEU0	Group	*/;		\
	add		%o2, %o5, %o2		/*  IEU1		*/;		\
	inc		%g2			/*  IEU0	Group	*/;		\
	add		%o2, %g1, %o2		/*  IEU1		*/;		\
	srl		%g2, 1, %g2		/*  IEU0	Group	*/;		\
	inc		%g3			/*  IEU1		*/;		\
	srl		%g3, 1, %g3		/*  IEU0	Group	*/;		\
	add		%o2, %g2, %o2		/*  IEU1		*/;		\
	inc		%g5			/*  IEU0	Group	*/;		\
	add		%o2, %g3, %o2		/*  IEU0		*/;

#define END_THE_TRICK(O12,O14,f0,f2,f4,f6,f8,f10,f12,f14,S0,S1,S2,S3,T0,T1,U0,fz)	\
	srl		%g5, 1, %g5		/*  IEU0	Group	*/;		\
	fpadd32		%f2, %f0, %S0		/*  FPA			*/;		\
	fcmpgt32	%O12, %f12, %o4		/*  FPM			*/;		\
	inc		%g7			/*  IEU0	Group	*/;		\
	fpadd32		%f6, %f4, %S1		/*  FPA			*/;		\
	fcmpgt32	%O14, %f14, %o5		/*  FPM			*/;		\
	srl		%g7, 1, %g7		/*  IEU0	Group	*/;		\
	fpadd32		%f10, %f8, %S2		/*  FPA			*/;		\
	fcmpgt32	%f0, %S0, %g1		/*  FPM			*/;		\
	inc		%o3			/*  IEU0	Group	*/;		\
	fpadd32		%f14, %f12, %S3		/*  FPA			*/;		\
	fcmpgt32	%f4, %S1, %g2		/*  FPM			*/;		\
	add		%o2, #define __ver_do_midi_msg	smp_b51587f6
#define do_midi_msg	_set_ver(do_midi_msg)
#define __ver_midi_synth_open	smp_f6b3a2fb
#define midi_synth_open	_set_ver(midi_synth_open)
#define __ver_midi_synth_close	smp_ad45df73
#define midi_synth_close	_set_ver(midi_synth_close)
#define __ver_midi_synth_ioctl	smp_b66d1f67
#define midi_synth_ioctl	_set_ver(midi_synth_ioctl)
#define __ver_midi_synth_kill_note	smp_2aa31695
#define midi_synth_kill_note	_set_ver(midi_synth_kill_note)
#define __ver_midi_synth_start_note	smp_9bdaf24d
#define midi_synth_start_note	_set_ver(midi_synth_start_note)
#define __ver_midi_synth_set_instr	smp_d85be938
#define midi_synth_set_instr	_set_ver(midi_synth_set_instr)
#define __ver_midi_synth_reset	smp_56504ca2
#define midi_synth_reset	_set_ver(midi_synth_reset)
#define __ver_midi_synth_hw_control	smp_b14b22cd
#define midi_synth_hw_control	_set_ver(midi_synth_hw_control)
#define __ver_midi_synth_aftertouch	smp_f1ea8a20
#define midi_synth_aftertouch	_set_ver(midi_synth_aftertouch)
#define __ver_midi_synth_controller	smp_892093e0
#define midi_synth_controller	_set_ver(midi_synth_controller)
#define __ver_midi_synth_panning	smp_db400afa
#define midi_synth_panning	_set_ver(midi_synth_panning)
#define __ver_midi_synth_setup_voice	smp_4ff47e9d
#define midi_synth_setup_voice	_set_ver(midi_synth_setup_voice)
#define __ver_midi_synth_send_sysex	smp_fddcbfb3
#define midi_synth_send_sysex	_set_ver(midi_synth_send_sysex)
#define __ver_midi_synth_bender	smp_ba7dd041
#define midi_synth_bender	_set_ver(midi_synth_bender)
#define __ver_midi_synth_load_patch	smp_f7426da3
#define midi_synth_load_patch	_set_ver(midi_synth_load_patch)
#define __ver_MIDIbuf_avail	smp_1f395686
#define MIDIbuf_avail	_set_ver(MIDIbuf_avail)
#define __ver_probe_mpu401	smp_cd91465c
#define probe_mpu401	_set_ver(probe_mpu401)
#define __ver_attach_mpu401	smp_541ac2d2
#define attach_mpu401	_set_ver(attach_mpu401)
#define __ver_unload_mpu401	smp_5febf284
#define unload_mpu401	_set_ver(unload_mpu401)
#define __ver_intchk_mpu401	smp_5fe6dd42
#define intchk_mpu401	_set_ver(intchk_mpu401)
#define __ver_mpuintr	smp_57ca69ca
#define mpuintr	_set_ver(mpuintr)
CR53C8XX
#undef  CONFIG_SCSI_SYM53C8XX
#undef  CONFIG_SCSI_PAS16
#undef  CONFIG_SCSI_PCI2000
#undef  CONFIG_SCSI_PCI2220I
#undef  CONFIG_SCSI_PSI240I
#undef  CONFIG_SCSI_QLOGIC_FAS
#undef  CONFIG_SCSI_QLOGIC_ISP
#undef  CONFIG_SCSI_QLOGIC_FC
#undef  CONFIG_SCSI_QLOGIC_1280
#undef  CONFIG_SCSI_SEAGATE
#undef  CONFIG_SCSI_SIM710
#undef  CONFIG_SCSI_SYM53C416
#undef  CONFIG_SCSI_DC390T
#undef  CONFIG_SCSI_T128
#undef  CONFIG_SCSI_U14_34F
#undef  CONFIG_SCSI_ULTRASTOR
#undef  CONFIG_SCSI_DEBUG
/*
 * Fusion MPT device support
 */
#undef  CONFIG_FUSION
#undef  CONFIG_FUSION_BOOT
#undef  CONFIG_FUSION_ISENSE
#undef  CONFIG_FUSION_CTL
#undef  CONFIG_FUSION_LAN
/*
 * IEEE 1394 (FireWire) support (EXPERIMENTAL)
 */
#undef  CONFIG_IEEE1394
/*
 * I2O device support
 */
#undef  CONFIG_I2O
/*
 * Network device support
 */
#define CONFIG_NETDEVICES 1
/*
 * ARCnet devices
 */
#undef  CONFIG_ARCNET
/*
 * Appletalk devices
 */
#undef  CONFIG_APPLETALK
#undef  CONFIG_LTPC
#undef  CONFIG_COPS
#undef  CONFIG_IPDDP
#undef  CONFIG_DUMMY
#define CONFIG_DUMMY_MODULE 1
#undef  CONFIG_BONDING
#define CONFIG_EQUALIZER 1
#define CONFIG_TUN 1
#define CONFIG_NET_RANDOM 1
#undef  CONFIG_ETHERTAP
#undef  CONFIG_NET_SB1000
/*
 * Ethernet (10 or 100Mbit)
 */
#define CONFIG_NET_ETHERNET 1
#undef  CONFIG_HAPPYMEAL
#undef  CONFIG_SUNGEM
#undef  CONFIG_NET_VENDOR_3COM
#undef  CONFIG_LANCE
#undef  CONFIG_NET_VENDOR_SMC
#undef  CONFIG_NET_VENDOR_RACAL
#undef  CONFIG_AT1700
#undef  CONFIG_DEPCA
#undef  CONFIG_HP100
#undef  CONFIG_NET_ISA
#define CONFIG_NET_PCI 1
#undef  CONFIG_PCNET32
#define CONFIG_PCNET32_MODULE 1
#undef  CONFIG_ADAPTEC_STARFIRE
#undef  CONFIG_AC3200
#undef  CONFIG_APRICOT
#undef  CONFIG_CS89x0
#undef  CONFIG_TULIP
#undef  CONFIG_TC35815
#undef  CONFIG_DE4X5
#undef  CONFIG_DGRS
#undef  CONFIG_DM9102
#define CONFIG_EEPRO100 1
#undef  CONFIG_FEALNX
#undef  CONFIG_NATSEMI
#undef  CONFIG_NE2K_PCI
#undef  CONFIG_8139CP
#undef  CONFIG_8139TOO
#undef  CONFIG_SIS900
#undef  CONFIG_EPIC100
#undef  CONFIG_SUNDANCE
#undef  CONFIG_TLAN
#undef  CONFIG_VIA_RHINE
#define CONFIG_VIA_RHINE_MODULE 1
#undef  CONFIG_VIA_RHINE_MMIO
#undef  CONFIG_WINBOND_840
#undef  CONFIG_NET_POCKET
/*
 * Ethernet (1000 Mbit)
 */
#undef  CONFIG_ACENIC
#undef  CONFIG_DL2K
#undef  CONFIG_NS83820
#undef  CONFIG_HAMACHI
#undef  CONFIG_YELLOWFIN
#undef  CONFIG_SK98LIN
#undef  CONFIG_TIGON3
#undef  CONFIG_FDDI
#define CONFIG_NETCONSOLE 1
#undef  CONFIG_HIPPI
#undef  CONFIG_PLIP
#undef  CONFIG_PPP
#define CONFIG_PPP_MODULE 1
#define CONFIG_PPP_MULTILINK 1
#define CONFIG_PPP_FILTER 1
#undef  CONFIG_PPP_ASYNC
#define CONFIG_PPP_ASYNC_MODULE 1
#undef  CONFIG_PPP_SYNC_TTY
#define CONFIG_PPP_SYNC_TTY_MODULE 1
#undef  CONFIG_PPP_DEFLATE
#define CONFIG_PPP_DEFLATE_MODULE 1
#undef  CONFIG_PPP_BSDCOMP
#define CONFIG_PPP_BSDCOMP_MODULE 1
#undef  CONFIG_PPPOE
#undef  CONFIG_SLIP
/*
 * Wireless LAN (non-hamradio)
 */
#undef  CONFIG_NET_RADIO
/*
 * Token Ring devices
 */
#undef  CONFIG_TR
#undef  CONFIG_NET_FC
#undef  CONFIG_RCPCI
#undef  CONFIG_SHAPER
/*
 * Wan interfaces
 */
#undef  CONFIG_WAN
/*
 * Amateur Radio support
 */
#undef  CONFIG_HAMRADIO
/*
 * IrDA (infrared) support
 */
#undef  CONFIG_IRDA
/*
 * ISDN subsystem
 */
#undef  CONFIG_ISDN
/*
 * Old CD-ROM drivers (not SCSI, not IDE)
 */
#undef  CONFIG_CD_NO_IDESCSI
/*
 * Input core support
 */
#define CONFIG_INPUT 1
#define CONFIG_INPUT_KEYBDEV 1
#define CONFIG_INPUT_MOUSEDEV 1
#define CONFIG_INPUT_MOUSEDEV_SCREEN_X (1024)
#define CONFIG_INPUT_MOUSEDEV_SCREEN_Y (768)
#define CONFIG_INPUT_JOYDEV 1
#define CONFIG_INPUT_EVDEV 1
/*
 * Character devices
 */
#define CONFIG_VT 1
#define CONFIG_VT_CONSOLE 1
#define CONFIG_SERIAL 1
#undef  CONFIG_SERIAL_CONSOLE
#undef  CONFIG_SERIAL_EXTENDED
#undef  CONFIG_SERIAL_NONSTANDARD
#define CONFIG_UNIX98_PTYS 1
#define CONFIG_UNIX98_PTY_COUNT (256)
#undef  CONFIG_PRINTER
#undef  CONFIG_PPDEV
/*
 * I2C support
 */
#define CONFIG_I2C 1
#define CONFIG_I2C_ALGOBIT 1
#undef  CONFIG_I2C_BITLP
#undef  CONFIG_I2C_BITELV
#undef  CONFIG_I2C_BITVELLE
#define CONFIG_I2C_ALGOPCF 1
#undef  CONFIG_I2C_PCFISA
#define CONFI
# CONFIG_SCSI_T128 is not set
# CONFIG_SCSI_U14_34F is not set
# CONFIG_SCSI_ULTRASTOR is not set
# CONFIG_SCSI_DEBUG is not set

#
# Fusion MPT device support
#
# CONFIG_FUSION is not set
# CONFIG_FUSION_BOOT is not set
# CONFIG_FUSION_ISENSE is not set
# CONFIG_FUSION_CTL is not set
# CONFIG_FUSION_LAN is not set

#
# IEEE 1394 (FireWire) support (EXPERIMENTAL)
#
# CONFIG_IEEE1394 is not set

#
# I2O device support
#
# CONFIG_I2O is not set

#
# Network device support
#
CONFIG_NETDEVICES=y

#
# ARCnet devices
#
# CONFIG_ARCNET is not set

#
# Appletalk devices
#
# CONFIG_APPLETALK is not set
# CONFIG_LTPC is not set
# CONFIG_COPS is not set
# CONFIG_IPDDP is not set
CONFIG_DUMMY=m
# CONFIG_BONDING is not set
CONFIG_EQUALIZER=y
CONFIG_TUN=y
CONFIG_NET_RANDOM=y
# CONFIG_ETHERTAP is not set
# CONFIG_NET_SB1000 is not set

#
# Ethernet (10 or 100Mbit)
#
CONFIG_NET_ETHERNET=y
# CONFIG_HAPPYMEAL is not set
# CONFIG_SUNGEM is not set
# CONFIG_NET_VENDOR_3COM is not set
# CONFIG_LANCE is not set
# CONFIG_NET_VENDOR_SMC is not set
# CONFIG_NET_VENDOR_RACAL is not set
# CONFIG_AT1700 is not set
# CONFIG_DEPCA is not set
# CONFIG_HP100 is not set
# CONFIG_NET_ISA is not set
CONFIG_NET_PCI=y
CONFIG_PCNET32=m
# CONFIG_ADAPTEC_STARFIRE is not set
# CONFIG_AC3200 is not set
# CONFIG_APRICOT is not set
# CONFIG_CS89x0 is not set
# CONFIG_TULIP is not set
# CONFIG_TC35815 is not set
# CONFIG_DE4X5 is not set
# CONFIG_DGRS is not set
# CONFIG_DM9102 is not set
CONFIG_EEPRO100=y
# CONFIG_FEALNX is not set
# CONFIG_NATSEMI is not set
# CONFIG_NE2K_PCI is not set
# CONFIG_8139CP is not set
# CONFIG_8139TOO is not set
# CONFIG_SIS900 is not set
# CONFIG_EPIC100 is not set
# CONFIG_SUNDANCE is not set
# CONFIG_TLAN is not set
CONFIG_VIA_RHINE=m
# CONFIG_VIA_RHINE_MMIO is not set
# CONFIG_WINBOND_840 is not set
# CONFIG_NET_POCKET is not set

#
# Ethernet (1000 Mbit)
#
# CONFIG_ACENIC is not set
# CONFIG_DL2K is not set
# CONFIG_NS83820 is not set
# CONFIG_HAMACHI is not set
# CONFIG_YELLOWFIN is not set
# CONFIG_SK98LIN is not set
# CONFIG_TIGON3 is not set
# CONFIG_FDDI is not set
CONFIG_NETCONSOLE=y
# CONFIG_HIPPI is not set
# CONFIG_PLIP is not set
CONFIG_PPP=m
CONFIG_PPP_MULTILINK=y
CONFIG_PPP_FILTER=y
CONFIG_PPP_ASYNC=m
CONFIG_PPP_SYNC_TTY=m
CONFIG_PPP_DEFLATE=m
CONFIG_PPP_BSDCOMP=m
# CONFIG_PPPOE is not set
# CONFIG_SLIP is not set

#
# Wireless LAN (non-hamradio)
#
# CONFIG_NET_RADIO is not set

#
# Token Ring devices
#
# CONFIG_TR is not set
# CONFIG_NET_FC is not set
# CONFIG_RCPCI is not set
# CONFIG_SHAPER is not set

#
# Wan interfaces
#
# CONFIG_WAN is not set

#
# Amateur Radio support
#
# CONFIG_HAMRADIO is not set

#
# IrDA (infrared) support
#
# CONFIG_IRDA is not set

#
# ISDN subsystem
#
# CONFIG_ISDN is not set

#
# Old CD-ROM drivers (not SCSI, not IDE)
#
# CONFIG_CD_NO_IDESCSI is not set

#
# Input core support
#
CONFIG_INPUT=y
CONFIG_INPUT_KEYBDEV=y
CONFIG_INPUT_MOUSEDEV=y
CONFIG_INPUT_MOUSEDEV_SCREEN_X=1024
CONFIG_INPUT_MOUSEDEV_SCREEN_Y=768
CONFIG_INPUT_JOYDEV=y
CONFIG_INPUT_EVDEV=y

#
# Character devices
#
CONFIG_VT=y
CONFIG_VT_CONSOLE=y
CONFIG_SERIAL=y
# CONFIG_SERIAL_CONSOLE is not set
# CONFIG_SERIAL_EXTENDED is not set
# CONFIG_SERIAL_NONSTANDARD is not set
CONFIG_UNIX98_PTYS=y
CONFIG_UNIX98_PTY_COUNT=256
# CONFIG_PRINTER is not set
# CONFIG_PPDEV is not set

#
# I2C support
#
CONFIG_I2C=y
CONFIG_I2C_ALGOBIT=y
# CONFIG_I2C_BITLP is not set
# CONFIG_I2C_BITELV is not set
# CONFIG_I2C_BITVELLE is not set
CONFIG_I2C_ALGOPCF=y
# CONFIG_I2C_PCFISA is not set
CONFIG_I2C_MAINBOARD=y
# CONFIG_I2C_ALI1535 is not set
# CONFIG_I2C_ALI15X3 is not set
# CONFIG_I2C_HYDRA is not set
# CONFIG_I2C_AMD756 is not set
# CONFIG_I2C_TSUNAMI is not set
# CONFIG_I2C_I801 is not set
# CONFIG_I2C_I810 is not set
# CONFIG_I2C_PIIX4 is not set
# CONFIG_I2C_SIS5595 is not set
# CONFIG_I2C_VIA is not set
# CONFIG_I2C_VIAPRO is not set
# CONFIG_I2C_VOODOO3 is not set
# CONFIG_I2C_ISA is not set
CONFIG_I2C_CHARDEV=y
CONFIG_I2C_PROC=y

#
# Hardware sensors support
#
CONFIG_SENSORS=y
# CONFIG_SENSORS_ADM1021 is not set
# CONFIG_SENSORS_ADM1024 G_I2C_MAINBOARD 1
#undef  CONFIG_I2C_ALI1535
#undef  CONFIG_I2C_ALI15X3
#undef  CONFIG_I2C_HYDRA
#undef  CONFIG_I2C_AMD756
#undef  CONFIG_I2C_TSUNAMI
#undef  CONFIG_I2C_I801
#undef  CONFIG_I2C_I810
#undef  CONFIG_I2C_PIIX4
#undef  CONFIG_I2C_SIS5595
#undef  CONFIG_I2C_VIA
#undef  CONFIG_I2C_VIAPRO
#undef  CONFIG_I2C_VOODOO3
#undef  CONFIG_I2C_ISA
#define CONFIG_I2C_CHARDEV 1
#define CONFIG_I2C_PROC 1
/*
 * Hardware sensors support
 */
#define CONFIG_SENSORS 1
#undef  CONFIG_SENSORS_ADM1021
#undef  CONFIG_SENSORS_ADM1024
#undef  CONFIG_SENSORS_ADM1025
#undef  CONFIG_SENSORS_ADM9240
#undef  CONFIG_SENSORS_DS1621
#undef  CONFIG_SENSORS_FSCPOS
#undef  CONFIG_SENSORS_FSCSCY
#undef  CONFIG_SENSORS_GL518SM
#undef  CONFIG_SENSORS_GL520SM
#undef  CONFIG_SENSORS_MAXILIFE
#undef  CONFIG_SENSORS_IT87
#undef  CONFIG_SENSORS_MTP008
#undef  CONFIG_SENSORS_LM75
#undef  CONFIG_SENSORS_LM78
#undef  CONFIG_SENSORS_LM80
#undef  CONFIG_SENSORS_LM87
#undef  CONFIG_SENSORS_THMC50
#define CONFIG_SENSORS_W83781D 1
#define CONFIG_SENSORS_OTHER 1
#undef  CONFIG_SENSORS_BT869
#define CONFIG_SENSORS_DDCMON 1
#define CONFIG_SENSORS_EEPROM 1
#undef  CONFIG_SENSORS_MATORB
/*
 * Mice
 */
#undef  CONFIG_BUSMOUSE
#define CONFIG_MOUSE 1
#define CONFIG_PSMOUSE 1
#undef  CONFIG_82C710_MOUSE
#undef  CONFIG_PC110_PAD
#undef  CONFIG_MK712_MOUSE
/*
 * Joysticks
 */
#undef  CONFIG_INPUT_GAMEPORT
#undef  CONFIG_INPUT_SERIO
/*
 * Joysticks
 */
#undef  CONFIG_INPUT_IFORCE_USB
#undef  CONFIG_INPUT_DB9
#undef  CONFIG_INPUT_GAMECON
#undef  CONFIG_INPUT_TURBOGRAFX
#undef  CONFIG_QIC02_TAPE
/*
 * Watchdog Cards
 */
#undef  CONFIG_WATCHDOG
#undef  CONFIG_AMD_RNG
#undef  CONFIG_INTEL_RNG
#undef  CONFIG_AMD_PM768
#define CONFIG_NVRAM 1
#define CONFIG_RTC 1
#undef  CONFIG_DTLK
#undef  CONFIG_R3964
#undef  CONFIG_APPLICOM
#undef  CONFIG_SONYPI
/*
 * Ftape, the floppy tape device driver
 */
#undef  CONFIG_FTAPE
#undef  CONFIG_AGP
#undef  CONFIG_DRM
#undef  CONFIG_MWAVE
/*
 * Multimedia devices
 */
#undef  CONFIG_VIDEO_DEV
/*
 * File systems
 */
#define CONFIG_QUOTA 1
#undef  CONFIG_AUTOFS_FS
#define CONFIG_AUTOFS4_FS 1
#define CONFIG_REISERFS_FS 1
#undef  CONFIG_REISERFS_CHECK
#define CONFIG_REISERFS_PROC_INFO 1
#undef  CONFIG_ADFS_FS
#undef  CONFIG_AFFS_FS
#define CONFIG_HFS_FS 1
#define CONFIG_BEFS_FS 1
#undef  CONFIG_BEFS_DEBUG
#undef  CONFIG_BFS_FS
#define CONFIG_EXT3_FS 1
#define CONFIG_JBD 1
#undef  CONFIG_JBD_DEBUG
#undef  CONFIG_FAT_FS
#undef  CONFIG_EFS_FS
#undef  CONFIG_CRAMFS
#define CONFIG_TMPFS 1
#undef  CONFIG_RAMFS
#define CONFIG_ISO9660_FS 1
#define CONFIG_JOLIET 1
#define CONFIG_ZISOFS 1
#define CONFIG_JFS_FS 1
#undef  CONFIG_JFS_DEBUG
#define CONFIG_JFS_STATISTICS 1
#undef  CONFIG_MINIX_FS
#undef  CONFIG_VXFS_FS
#define CONFIG_NTFS_FS 1
#undef  CONFIG_NTFS_RW
#undef  CONFIG_HPFS_FS
#define CONFIG_PROC_FS 1
#define CONFIG_DEVFS_FS 1
#undef  CONFIG_DEVFS_MOUNT
#undef  CONFIG_DEVFS_DEBUG
#define CONFIG_DEVPTS_FS 1
#undef  CONFIG_QNX4FS_FS
#undef  CONFIG_ROMFS_FS
#define CONFIG_EXT2_FS 1
#undef  CONFIG_SYSV_FS
#define CONFIG_UDF_FS 1
#undef  CONFIG_UDF_RW
#undef  CONFIG_UFS_FS
/*
 * Network File Systems
 */
#undef  CONFIG_CODA_FS
#undef  CONFIG_INTERMEZZO_FS
#define CONFIG_NFS_FS 1
#undef  CONFIG_NFS_V3
#undef  CONFIG_ROOT_NFS
#define CONFIG_NFSD 1
#undef  CONFIG_NFSD_V3
#undef  CONFIG_NFSD_TCP
#define CONFIG_SUNRPC 1
#define CONFIG_LOCKD 1
#define CONFIG_SMB_FS 1
#undef  CONFIG_SMB_NLS_DEFAULT
#undef  CONFIG_NCP_FS
#define CONFIG_ZISOFS_FS 1
/*
 * Partition Types
 */
#define CONFIG_PARTITION_ADVANCED 1
#undef  CONFIG_ACORN_PARTITION
#undef  CONFIG_OSF_PARTITION
#undef  CONFIG_AMIGA_PARTITION
#undef  CONFIG_ATARI_PARTITION
#define CONFIG_MAC_PARTITION 1
#define CONFIG_MSDOS_PARTITION 1
#define CONFIG_BSD_DISKLABEL 1
#undef  CONFIG_MINIX_SUBPARTITION
#undef  CONFIG_SOLARIS_X86_PARTITION
#undef  CONFIG_UNIXWARE_DISKLABEL
#define CONFIG_LDM_PARTITION 1
#undef  CONFIG_LDM_DEBUG
#undef  CONFIG_SGI_PARTITION
#undef  CONFIG_ULTRIX_PARTITION
#undef  CONFIG_SUN_PARTITION
#define CONFIG_SMB_NLS 1
#define CONFIG_NLS 1
/*
 * Native Language Support
 */
#define CONFIG_NLS_DEFis not set
# CONFIG_SENSORS_ADM1025 is not set
# CONFIG_SENSORS_ADM9240 is not set
# CONFIG_SENSORS_DS1621 is not set
# CONFIG_SENSORS_FSCPOS is not set
# CONFIG_SENSORS_FSCSCY is not set
# CONFIG_SENSORS_GL518SM is not set
# CONFIG_SENSORS_GL520SM is not set
# CONFIG_SENSORS_MAXILIFE is not set
# CONFIG_SENSORS_IT87 is not set
# CONFIG_SENSORS_MTP008 is not set
# CONFIG_SENSORS_LM75 is not set
# CONFIG_SENSORS_LM78 is not set
# CONFIG_SENSORS_LM80 is not set
# CONFIG_SENSORS_LM87 is not set
# CONFIG_SENSORS_THMC50 is not set
CONFIG_SENSORS_W83781D=y
CONFIG_SENSORS_OTHER=y
# CONFIG_SENSORS_BT869 is not set
CONFIG_SENSORS_DDCMON=y
CONFIG_SENSORS_EEPROM=y
# CONFIG_SENSORS_MATORB is not set

#
# Mice
#
# CONFIG_BUSMOUSE is not set
CONFIG_MOUSE=y
CONFIG_PSMOUSE=y
# CONFIG_82C710_MOUSE is not set
# CONFIG_PC110_PAD is not set
# CONFIG_MK712_MOUSE is not set

#
# Joysticks
#
# CONFIG_INPUT_GAMEPORT is not set
# CONFIG_INPUT_SERIO is not set

#
# Joysticks
#
# CONFIG_INPUT_IFORCE_USB is not set
# CONFIG_INPUT_DB9 is not set
# CONFIG_INPUT_GAMECON is not set
# CONFIG_INPUT_TURBOGRAFX is not set
# CONFIG_QIC02_TAPE is not set

#
# Watchdog Cards
#
# CONFIG_WATCHDOG is not set
# CONFIG_AMD_RNG is not set
# CONFIG_INTEL_RNG is not set
# CONFIG_AMD_PM768 is not set
CONFIG_NVRAM=y
CONFIG_RTC=y
# CONFIG_DTLK is not set
# CONFIG_R3964 is not set
# CONFIG_APPLICOM is not set
# CONFIG_SONYPI is not set

#
# Ftape, the floppy tape device driver
#
# CONFIG_FTAPE is not set
# CONFIG_AGP is not set
# CONFIG_DRM is not set
# CONFIG_MWAVE is not set

#
# Multimedia devices
#
# CONFIG_VIDEO_DEV is not set

#
# File systems
#
CONFIG_QUOTA=y
# CONFIG_AUTOFS_FS is not set
CONFIG_AUTOFS4_FS=y
CONFIG_REISERFS_FS=y
# CONFIG_REISERFS_CHECK is not set
CONFIG_REISERFS_PROC_INFO=y
# CONFIG_ADFS_FS is not set
# CONFIG_AFFS_FS is not set
CONFIG_HFS_FS=y
CONFIG_BEFS_FS=y
# CONFIG_BEFS_DEBUG is not set
# CONFIG_BFS_FS is not set
CONFIG_EXT3_FS=y
CONFIG_JBD=y
# CONFIG_JBD_DEBUG is not set
# CONFIG_FAT_FS is not set
# CONFIG_EFS_FS is not set
# CONFIG_CRAMFS is not set
CONFIG_TMPFS=y
# CONFIG_RAMFS is not set
CONFIG_ISO9660_FS=y
CONFIG_JOLIET=y
CONFIG_ZISOFS=y
CONFIG_JFS_FS=y
# CONFIG_JFS_DEBUG is not set
CONFIG_JFS_STATISTICS=y
# CONFIG_MINIX_FS is not set
# CONFIG_VXFS_FS is not set
CONFIG_NTFS_FS=y
# CONFIG_NTFS_RW is not set
# CONFIG_HPFS_FS is not set
CONFIG_PROC_FS=y
CONFIG_DEVFS_FS=y
# CONFIG_DEVFS_MOUNT is not set
# CONFIG_DEVFS_DEBUG is not set
CONFIG_DEVPTS_FS=y
# CONFIG_QNX4FS_FS is not set
# CONFIG_ROMFS_FS is not set
CONFIG_EXT2_FS=y
# CONFIG_SYSV_FS is not set
CONFIG_UDF_FS=y
# CONFIG_UDF_RW is not set
# CONFIG_UFS_FS is not set

#
# Network File Systems
#
# CONFIG_CODA_FS is not set
# CONFIG_INTERMEZZO_FS is not set
CONFIG_NFS_FS=y
# CONFIG_NFS_V3 is not set
# CONFIG_ROOT_NFS is not set
CONFIG_NFSD=y
# CONFIG_NFSD_V3 is not set
# CONFIG_NFSD_TCP is not set
CONFIG_SUNRPC=y
CONFIG_LOCKD=y
CONFIG_SMB_FS=y
# CONFIG_SMB_NLS_DEFAULT is not set
# CONFIG_NCP_FS is not set
CONFIG_ZISOFS_FS=y

#
# Partition Types
#
CONFIG_PARTITION_ADVANCED=y
# CONFIG_ACORN_PARTITION is not set
# CONFIG_OSF_PARTITION is not set
# CONFIG_AMIGA_PARTITION is not set
# CONFIG_ATARI_PARTITION is not set
CONFIG_MAC_PARTITION=y
CONFIG_MSDOS_PARTITION=y
CONFIG_BSD_DISKLABEL=y
# CONFIG_MINIX_SUBPARTITION is not set
# CONFIG_SOLARIS_X86_PARTITION is not set
# CONFIG_UNIXWARE_DISKLABEL is not set
CONFIG_LDM_PARTITION=y
# CONFIG_LDM_DEBUG is not set
# CONFIG_SGI_PARTITION is not set
# CONFIG_ULTRIX_PARTITION is not set
# CONFIG_SUN_PARTITION is not set
CONFIG_SMB_NLS=y
CONFIG_NLS=y

#
# Native Language Support
#
CONFIG_NLS_DEFAULT="iso8859-1"
# CONFIG_NLS_CODEPAGE_437 is not set
# CONFIG_NLS_CODEPAGE_737 is not set
# CONFIG_NLS_CODEPAGE_775 is not set
# CONFIG_NLS_CODEPAGE_850 is not set
# CONFIG_NLS_CODEPAGE_852 is not set
# CONFIG_NLS_CODEPAGE_855 is not set
# CONFIG_NLS_CODEPAGE_857 is not set
# CONFIG_NLS_CODEPAGE_860 is not set
# CONFIG_NLS_CODEPAGE_861 is not set
# CONFIG_NLS_CODEPAGE_862 is not set
# CONFIG_NLS_CODEPAGE_863 is not set
# CONFIG_NLS_CODEPAGE_864 is not set
# CON%g5, %o2		/*  IEU0	Group	*/;		\
	fpadd32		%S0, %S1, %T0		/*  FPA			*/;		\
	fcmpgt32	%f8, %S2, %g3		/*  FPM			*/;		\
	add		%o2, %g7, %o2		/*  IEU0	Group	*/;		\
	fzero		%fz			/*  FPA			*/;		\
	fcmpgt32	%f12, %S3, %g5		/*  FPM			*/;		\
	srl		%o3, 1, %o3		/*  IEU0	Group	*/;		\
	fpadd32		%S2, %S3, %T1		/*  FPA			*/;		\
	fcmpgt32	%S0, %T0, %g7		/*  FPM			*/;		\
	add		%o2, %o3, %o2		/*  IEU0	Group	*/;		\
	fpadd32		%T0, %T1, %U0		/*  FPA			*/;		\
	fcmpgt32	%S2, %T1, %o3		/*  FPM			*/;		\
	inc		%o4			/*  IEU0	Group	*/;		\
	inc		%o5			/*  IEU1		*/;		\
	srl		%o4, 1, %o4		/*  IEU0	Group	*/;		\
	inc		%g1			/*  IEU1		*/;		\
	add		%o2, %o4, %o2		/*  IEU0	Group	*/;		\
	fcmpgt32	%fz, %f2, %o4		/*  FPM			*/;		\
	srl		%o5, 1, %o5		/*  IEU0	Group	*/;		\
	inc		%g2			/*  IEU1		*/;		\
	add		%o2, %o5, %o2		/*  IEU0	Group	*/;		\
	fcmpgt32	%fz, %f6, %o5		/*  FPM			*/;		\
	srl		%g1, 1, %g1		/*  IEU0	Group	*/;		\
	inc		%g3			/*  IEU1		*/;		\
	add		%o2, %g1, %o2		/*  IEU0	Group	*/;		\
	fcmpgt32	%fz, %f10, %g1		/*  FPM			*/;		\
	srl		%g2, 1, %g2		/*  IEU0	Group	*/;		\
	inc		%g5			/*  IEU1		*/;		\
	add		%o2, %g2, %o2		/*  IEU0	Group	*/;		\
	fcmpgt32	%fz, %f14, %g2		/*  FPM			*/;		\
	srl		%g3, 1, %g3		/*  IEU0	Group	*/;		\
	inc		%g7			/*  IEU1		*/;		\
	add		%o2, %g3, %o2		/*  IEU0	Group	*/;		\
	fcmpgt32	%fz, %S1, %g3		/*  FPM			*/;		\
	srl		%g5, 1, %g5		/*  IEU0	Group	*/;		\
	inc		%o3			/*  IEU1		*/;		\
	add		%o2, %g5, %o2		/*  IEU0	Group	*/;		\
	fcmpgt32	%fz, %S3, %g5		/*  FPM			*/;		\
	srl		%g7, 1, %g7		/*  IEU0	Group	*/;		\
	inc		%o4			/*  IEU1		*/;		\
	add		%o2, %g7, %o2		/*  IEU0	Group	*/;		\
	fcmpgt32	%fz, %T1, %g7		/*  FPM			*/;		\
	srl		%o3, 1, %o3		/*  IEU0	Group	*/;		\
	inc		%o5			/*  IEU1		*/;		\
	add		%o2, %o3, %o2		/*  IEU0	Group	*/;		\
	fcmpgt32	%T0, %U0, %o3		/*  FPM			*/;		\
	srl		%o4, 1, %o4		/*  IEU0	Group	*/;		\
	inc		%g1			/*  IEU1		*/;		\
	sub		%o2, %o4, %o2		/*  IEU0	Group	*/;		\
	fcmpgt32	%fz, %U0, %o4		/*  FPM			*/;		\
	srl		%o5, 1, %o5		/*  IEU0	Group	*/;		\
	inc		%g2			/*  IEU1		*/;		\
	srl		%g1, 1, %g1		/*  IEU0	Group	*/;		\
	sub		%o2, %o5, %o2		/*  IEU1		*/;		\
	std		%U0, [%sp + STACKOFF]	/*  Store		*/;		\
	srl		%g2, 1, %g2		/*  IEU0	Group	*/;		\
	sub		%o2, %g1, %o2		/*  IEU1		*/;		\
	inc		%g3			/*  IEU0	Group	*/;		\
	sub		%o2, %g2, %o2		/*  IEU1		*/;		\
	srl		%g3, 1, %g3		/*  IEU0	Group	*/;		\
	inc		%g5			/*  IEU1		*/;		\
	srl		%g5, 1, %g5		/*  IEU0	Group	*/;		\
	sub		%o2, %g3, %o2		/*  IEU1		*/;		\
	ldx		[%sp + STACKOFF], %o5	/*  Load	Group	*/;		\
	inc		%g7			/*  IEU0		*/;		\
	sub		%o2, %g5, %o2		/*  IEU1		*/;		\
	srl		%g7, 1, %g7		/*  IEU0	Group	*/;		\
	inc		%o3			/*  IEU1		*/;		\
	srl		%o3, 1, %o3		/*  IEU0	Group	*/;		\
	sub		%o2, %g7, %o2		/*  IEU1		*/;		\
	inc		%o4			/*  IEU0	Group	*/;		\
	add		%o2, %o3, %o2		/*  IEU1		*/;		\
	srl		%o4, 1, %o4		/*  IEU0	Group	*/;		\
	sub		%o2, %o4, %o2		/*  IEU0	Group	*/;		\
	addcc		%o2, %o5, %o2		/*  IEU1	Group	*/;		\
	bcs,a,pn	%xcc, 33f		/*  CTI			*/;		\
	 add		%o2, 1, %o2		/*  IEU0		*/;		\
33:						/*  That's it		*/;

#define CSUM_LASTCHUNK(offset)								\
        ldx             [%o0 - offset - 0x10], %g2;					\
        ldx             [%o0 - offset - 0x08], %g3;					\
        addcc           %g2, %o2, %o2;							\
        bcs,a,pn        %xcc, 31f;							\
         add            %o2, 1, %o2;							\
31:     addcc           %g3, %o2, %o2;							\
        bcs,a,pn        %xcc, 32f;							\
         add            %o2, 1, %o2;							\
32:

	.text
	.globl		csum_partial
	.align		32
csum_partial:
	andcc		%o0, 7, %g0		/*  IEU1	Group		*/
	be,pt		%icc, 4f		/*  CTI				*/
	 andcc		%o0, 0x38, %g3		/*  IEU1			*/
	mov		1, %g5			/*  IEU0	Group		*/
	cmp		%o1, 6			/*  IEU1			*/
	bl,pn		%icc, 21f		/*  CTI				*/
	 andcc		%o0, 2, %g0		/*  IEU1	Group		*/
	be,pt		%icc, 1f		/*  CTI				*/
	 and		%o0, 4, %g7		/*  IEU0			*/
	lduh		[%o0], %g2		/*  Load			*/
	sub		%o1, 2, %o1		/*  IEU0	Group		*/
	add		%o0, 2, %o0		/*  IEU1			*/
	andcc		%o0, 4, %g7		/*  IEU1	Group		*/
	sll		%g5, 16, %g5		/*  IEU0			*/
	sll		%g2, 16, %g2		/*  IEU0	Group 		*/
	addcc		%g2, %o2, %o2		/*  IEU1	Group (regdep)	*/
	bcs,a,pn	%icc, 1f		/*  CTI				*/
	 add		%o2, %g5, %o2		/*  IEU0			*/
1:	ld		[%o0], %g2		/*  Load			*/
	brz,a,pn	%g7, 4f			/*  CTI+IEU1	Group		*/
	 and		%o0, 0x38, %g3		/*  IEU0			*/
	add		%o0, 4, %o0		/*  IEU0	Group		*/
	sub		%o1, 4, %o1		/*  IEU1			*/
	addcc		%g2, %o2, %o2		/*  IEU1	Group		*/
	bcs,a,pn	%icc, 1f		/*  CTI				*/
	 add		%o2, 1, %o2		/*  IEU0			*/
1:	and		%o0, 0x38, %g3		/*  IEU1	Group		*/
4:	srl		%o2, 0, %o2		/*  IEU0	Group		*/
	mov		0x40, %g1		/*  IEU1			*/
	brz,pn		%g3, 3f			/*  CTI+IEU1	Group		*/
	 sub		%g1, %g3, %g1		/*  IEU0			*/
	cmp		%o1, 56			/*  IEU1	Group		*/
	blu,pn		%icc, 20f		/*  CTI				*/
	 andcc		%o0, 8, %g0		/*  IEU1	Group		*/
	be,pn		%icc, 1f		/*  CTI				*/
	 ldx		[%o0], %g2		/*  Load			*/
	add		%o0, 8, %o0		/*  IEU0	Group		*/
	sub		%o1, 8, %o1		/*  IEU1			*/
	addcc		%g2, %o2, %o2		/*  IEU1	Group		*/
	bcs,a,pn	%xcc, 1f		/*  CTI				*/
	 add		%o2, 1, %o2		/*  IEU0			*/
1:	andcc		%g1, 0x10, %g0		/*  IEU1	Group		*/
	be,pn		%icc, 2f		/*  CTI				*/
	 and		%g1, 0x20, %g1		/*  IEU0			*/
	ldx		[%o0], %g2		/*  Load			*/
	ldx		[%o0+8], %g3		/*  Load	Group		*/
	add		%o0, 16, %o0		/*  IEU0			*/
	sub		%o1, 16, %o1		/*  IEU1			*/
	addcc		%g2, %o2, %o2		/*  IEU1	Group		*/
	bcs,a,pn	%xcc, 1f		/*  CTI				*/
	 add		%o2, 1, %o2		/*  IEU0			*/
1:	addcc		%g3, %o2, %o2		/*  IEU1	Group		*/
	bcs,a,pn	%xcc, 2f		/*  CTI				*/
	 add		%o2, 1, %o2		/*  IEU0			*/
2:	brz,pn		%g1, 3f			/*  CTI+IEU1	Group		*/
	 ldx		[%o0], %g2		/*  Load			*/
	ldx		[%o0+8], %g3		/*  Load	Group		*/
	ldx		[%o0+16], %g5		/*  Load	Group		*/
	ldx		[%o0+24], %g7		/*  Load	Group		*/
	add		%o0, 32, %o0		/*  IEU0			*/
	sub		%o1, 32, %o1		/*  IEU1			*/
	addcc		%g2, %o2, %o2		/*  IEU1	Group		*/
	bcs,a,pn	%xcc, 1f		/*  CTI				*/
	 add		%o2, 1, %o2		/*  IEU0			*/
1:	addcc		%g3, %o2, %o2		/*  IEU1	Group		*/
	bcs,a,pn	%xcc, 1f		/*  CTI				*/
	 add		%o2, 1, %o2		/*  IEU0			*/
1:	addcc		%g5, %o2, %o2		/*  IEU1	Group		*/
	bcs,a,pn	%xcc, 1f		/*  CTI				*/
	 add		%o2, 1, %o2		/*  IEU0			*/
1:	addcc		%g7, %o2, %o2		/*  IEU1	Group		*/
	bcs,a,pn	%xcc, 3f		/*  CTI				*/
	 add		%o2, 1, %o2		/*  IEU0			*/
3:	cmp		%o1, 0xc0		/*  IEU1	Group		*/
	blu,pn		%icc, 20f		/*  CTI				*/
	 sllx		%o2, 32, %g5		/*  IEU0			*/
#ifdef __KERNEL__
	VISEntry
#endif
	addcc		%o2, %g5, %o2		/*  IEU1	Group		*/
	sub		%o1, 0xc0, %o1		/*  IEU0			*/
	wr		%g0, ASI_BLK_P, %asi	/*  LSU		Group		*/
	membar		#StoreLoad		/*  LSU		Group		*/
	srlx		%o2, 32, %o2		/*  IEU0	Group		*/
	bcs,a,pn	%xcc, 1f		/*  CTI				*/
	 add		%o2, 1, %o2		/*  IEU1			*/
1:	andcc		%o1, 0x80, %g0		/*  IEU1	Group		*/
	bne,pn		%icc, 7f		/*  CTI				*/
	 andcc		%o1, 0x40, %g0		/*  IEU1	Group		*/
	be,pn		%icc, 6f		/*  CTI				*/
	 fzero		%f12			/*  FPA				*/
	fzero		%f14			/*  FPA		Group		*/
	ldda		[%o0 + 0x000] %asi, %f16
	ldda		[%o0 + 0x040] %asi, %f32
	ldda		[%o0 + 0x080] %asi, %f48
	START_THE_TRICK(f12,f16,f18,f20,f22,f24,f26)
	ba,a,pt		%xcc, 3f
6:	sub		%o0, 0x40, %o0		/*  IEU0	Group		*/
	fzero		%f28			/*  FPA				*/
	fzero		%f30			/*  FPA		Group		*/
	ldda		[%o0 + 0x040] %asi, %f32
	ldda		[%o0 + 0x080] %asi, %f48
	ldda		[%o0 + 0x0c0] %asi, %f0
	START_THE_TRICK(f28,f32,f34,f36,f38,f40,f42)
	ba,a,pt		%xcc, 4f
7:	bne,pt		%icc, 8f		/*  CTI				*/
	 fzero		%f44			/*  FPA				*/
	add		%o0, 0x40, %o0		/*  IEU0	Group		*/
	fzero		%f60			/*  FPA				*/
	fzero		%f62			/*  FPA		Group		*/
	ldda		[%o0 - 0x040] %asi, %f0
	ldda		[%o0 + 0x000] %asi, %f16
	ldda		[%o0 + 0x040] %asi, %f32
	START_THE_TRICK(f60,f0,f2,f4,f6,f8,f10)
	ba,a,pt		%xcc, 2f
8:	add		%o0, 0x80, %o0		/*  IEU0	Group		*/
	fzero		%f46			/*  FPA				*/
	ldda		[%o0 - 0x080] %asi, %f48
	ldda		[%o0 - 0x040] %asi, %f0
	ldda		[%o0 + 0x000] %asi, %f16
	START_THE_TRICK(f44,f48,f50,f52,f54,f56,f58)
1:	DO_THE_TRICK(f44,f46,f48,f50,f52,f54,f56,f58,f60,f62,f0,f2,f4,f6,f8,f10,f12,f14)
	ldda		[%o0 + 0x040] %asi, %f32
2:	DO_THE_TRICK(f60,f62,f0,f2,f4,f6,f8,f10,f12,f14,f16,f18,f20,f22,f24,f26,f28,f30)
	ldda		[%o0 + 0x080] %asi, %f48
3:	DO_THE_TRICK(f12,f14,f16,f18,f20,f22,f24,f26,f28,f30,f32,f34,f36,f38,f40,f42,f44,f46)
	ldda		[%o0 + 0x0c0] %asi, %f0
4:	DO_THE_TRICK(f28,f30,f32,f34,f36,f38,f40,f42,f44,f46,f48,f50,f52,f54,f56,f58,f60,f62)
	add		%o0, 0x100, %o0		/*  IEU0	Group		*/
	subcc		%o1, 0x100, %o1		/*  IEU1			*/
	bgeu,a,pt	%icc, 1b		/*  CTI				*/
	 ldda		[%o0 + 0x000] %asi, %f16
	membar		#Sync			/*  LSU		Group		*/
	DO_THE_TRICK(f44,f46,f48,f50,f52,f54,f56,f58,f60,f62,f0,f2,f4,f6,f8,f10,f12,f14)
	END_THE_TRICK(f60,f62,f0,f2,f4,f6,f8,f10,f12,f14,f16,f18,f20,f22,f24,f26,f28,f30)
#ifdef __KERNEL__
	ldub		[%g6 + AOFF_task_thread + AOFF_thread_current_ds], %g7
#endif
	and		%o1, 0x3f, %o1		/*  IEU0	Group		*/
#ifdef __KERNEL__
	VISExit
	wr		%g7, %g0, %asi
#endif
20:	andcc		%o1, 0xf0, %g1		/*  IEU1	Group		*/
	be,pn		%icc, 23f		/*  CTI				*/
	 and		%o1, 0xf, %o3		/*  IEU0			*/
#ifdef __KERNEL__
22:	sll		%g1, 1, %o4		/*  IEU0	Group		*/
	sethi		%hi(23f), %g7		/*  IEU1			*/
	sub		%g7, %o4, %g7		/*  IEU0	Group		*/
	jmpl		%g7 + %lo(23f), %g0	/*  CTI		Group brk forced*/
	 add		%o0, %g1, %o0		/*  IEU0			*/
#else
22:	rd		%pc, %g7		/*  LSU		Group+4bubbles	*/
	sll		%g1, 1, %o4		/*  IEU0	Group		*/
	sub		%g7, %o4, %g7		/*  IEU0	Group (regdep)	*/
	jmpl		%g7 + (23f - 22b), %g0	/*  CTI		Group brk forced*/
	 add		%o0, %g1, %o0		/*  IEU0			*/
#endif
	CSUM_LASTCHUNK(0xe0)
	CSUM_LASTCHUNK(0xd0)
	CSUM_LASTCHUNK(0xc0)
	CSUM_LASTCHUNK(0xb0)
	CSUM_LASTCHUNK(0xa0)
	CSUM_LASTCHUNK(0x90)
	CSUM_LASTCHUNK(0x80)
	CSUM_LASTCHUNK(0x70)
	CSUM_LASTCHUNK(0x60)
	CSUM_LASTCHUNK(0x50)
	CSUM_LASTCHUNK(0x40)
	CSUM_LASTCHUNK(0x30)
	CSUM_LASTCHUNK(0x20)
	CSUM_LASTCHUNK(0x10)
	CSUM_LASTCHUNK(0x00)
23:	brnz,pn		%o3, 26f		/*  CTI+IEU1	Group		*/
24:	 sllx		%o2, 32, %g1		/*  IEU0			*/
25:	addcc		%o2, %g1, %o0		/*  IEU1	Group		*/
	srlx		%o0, 32, %o0		/*  IEU0	Group (regdep)	*/
	bcs,a,pn	%xcc, 1f		/*  CTI				*/
	 add		%o0, 1, %o0		/*  IEU1			*/
1:	retl					/*  CTI		Group brk forced*/
	 srl		%o0, 0, %o0		/*  IEU0			*/
26:	andcc		%o1, 8, %g0		/*  IEU1	Group		*/
	be,pn		%icc, 1f		/*  CTI				*/
	 ldx		[%o0], %g3		/*  Load			*/
	add		%o0, 8, %o0		/*  IEU0	Group		*/
	addcc		%g3, %o2, %o2		/*  IEU1	Group		*/
	bcs,a,pn	%xcc, 1f		/*  CTI				*/
	 add		%o2, 1, %o2		/*  IEU0			*/
1:	andcc		%o1, 4, %g0		/*  IEU1	Group		*/
	be,a,pn		%icc, 1f		/*  CTI				*/
	 clr		%g2			/*  IEU0			*/
	ld		[%o0], %g2		/*  Load			*/
	add		%o0, 4, %o0		/*  IEU0	Group		*/
	sllx		%g2, 32, %g2		/*  IEU0	Group		*/
1:	andcc		%o1, 2, %g0		/*  IEU1			*/
	be,a,pn		%icc, 1f		/*  CTI				*/
	 clr		%o4			/*  IEU0	Group		*/
	lduh		[%o0], %o4		/*  Load			*/
	add		%o0, 2, %o0		/*  IEU1			*/
	sll		%o4, 16, %o4		/*  IEU0	Group		*/
1:	andcc		%o1, 1, %g0		/*  IEU1			*/
	be,a,pn		%icc, 1f		/*  CTI				*/
	 clr		%o5			/*  IEU0	Group		*/
	ldub		[%o0], %o5		/*  Load			*/
	sll		%o5, 8, %o5		/*  IEU0	Group		*/
1:	or		%g2, %o4, %o4		/*  IEU1			*/
	or		%o5, %o4, %o4		/*  IEU0	Group (regdep)	*/
	addcc		%o4, %o2, %o2		/*  IEU1	Group (regdep)	*/
	bcs,a,pn	%xcc, 1f		/*  CTI				*/
	 add		%o2, 1, %o2		/*  IEU0			*/
1:	ba,pt		%xcc, 25b		/*  CTI		Group		*/
	 sllx		%o2, 32, %g1		/*  IEU0			*/
21:	srl		%o2, 0, %o2		/*  IEU0	Group		*/
	cmp		%o1, 0			/*  IEU1			*/
	be,pn		%icc, 24b		/*  CTI				*/
	 andcc		%o1, 4, %g0		/*  IEU1	Group		*/
	be,a,pn		%icc, 1f		/*  CTI				*/
	 clr		%g2			/*  IEU0			*/
	lduh		[%o0], %g3		/*  Load			*/
	lduh		[%o0+2], %g2		/*  Load	Group		*/
	add		%o0, 4, %o0		/*  IEU0	Group		*/
	sllx		%g3, 48, %g3		/*  IEU0	Group		*/
	sllx		%g2, 32, %g2		/*  IEU0	Group		*/
	or		%g3, %g2, %g2		/*  IEU0	Group		*/
1:	andcc		%o1, 2, %g0		/*  IEU1			*/
	be,a,pn		%icc, 1f		/*  CTI				*/
	 clr		%o4			/*  IEU0	Group		*/
	lduh		[%o0], %o4		/*  Load			*/
	add		%o0, 2, %o0		/*  IEU1			*/
	sll		%o4, 16, %o4		/*  IEU0	Group		*/
1:	andcc		%o1, 1, %g0		/*  IEU1			*/
	be,a,pn		%icc, 1f		/*  CTI				*/
	 clr		%o5			/*  IEU0	Group		*/
	ldub		[%o0], %o5		/*  Load			*/
	sll		%o5, 8, %o5		/*  IEU0	Group		*/
1:	or		%g2, %o4, %o4		/*  IEU1			*/
	or		%o5, %o4, %o4		/*  IEU0	Group (regdep)	*/
	addcc		%o4, %o2, %o2		/*  IEU1	Group (regdep)	*/
	bcs,a,pn	%xcc, 1f		/*  CTI				*/
	 add		%o2, 1, %o2		/*  IEU0			*/
1:	ba,pt		%xcc, 25b		/*  CTI		Group		*/
	 sllx		%o2, 32, %g1		/*  IEU0			*/
#define __ver_msnd_register	smp_7fc68512
#define msnd_register	_set_ver(msnd_register)
#define __ver_msnd_unregister	smp_f8892c3d
#define msnd_unregister	_set_ver(msnd_unregister)
#define __ver_msnd_get_num_devs	smp_3d5731ae
#define msnd_get_num_devs	_set_ver(msnd_get_num_devs)
#define __ver_msnd_get_dev	smp_9eac629c
#define msnd_get_dev	_set_ver(msnd_get_dev)
#define __ver_msnd_init_queue	smp_9f56022e
#define msnd_init_queue	_set_ver(msnd_init_queue)
#define __ver_msnd_fifo_init	smp_b3520772
#define msnd_fifo_init	_set_ver(msnd_fifo_init)
#define __ver_msnd_fifo_free	smp_9274d677
#define msnd_fifo_free	_set_ver(msnd_fifo_free)
#define __ver_msnd_fifo_alloc	smp_ade99e25
#define msnd_fifo_alloc	_set_ver(msnd_fifo_alloc)
#define __ver_msnd_fifo_make_empty	smp_6601493b
#define msnd_fifo_make_empty	_set_ver(msnd_fifo_make_empty)
#define __ver_msnd_fifo_write	smp_a8f5796d
#define msnd_fifo_write	_set_ver(msnd_fifo_write)
#define __ver_msnd_fifo_read	smp_d4678641
#define msnd_fifo_read	_set_ver(msnd_fifo_read)
#define __ver_msnd_wait_TXDE	smp_e250b52f
#define msnd_wait_TXDE	_set_ver(msnd_wait_TXDE)
#define __ver_msnd_wait_HC0	smp_e5edce29
#define msnd_wait_HC0	_set_ver(msnd_wait_HC0)
#define __ver_msnd_send_dsp_cmd	smp_6d1865cf
#define msnd_send_dsp_cmd	_set_ver(msnd_send_dsp_cmd)
#define __ver_msnd_send_word	smp_83763d2f
#define msnd_send_word	_set_ver(msnd_send_word)
#define __ver_msnd_upload_host	smp_22f3d360
#define msnd_upload_host	_set_ver(msnd_upload_host)
#define __ver_msnd_enable_irq	smp_b75da5d9
#define msnd_enable_irq	_set_ver(msnd_enable_irq)
#define __ver_msnd_disable_irq	smp_b1bcf878
#define msnd_disable_irq	_set_ver(msnd_disable_irq)
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#define __ver_opl3_init	smp_1afd20ac
#define opl3_init	_set_ver(opl3_init)
#define __ver_opl3_detect	smp_67481767
#define opl3_detect	_set_ver(opl3_detect)
#define __ver_sb_dsp_init	smp_e986438b
#define sb_dsp_init	_set_ver(sb_dsp_init)
#define __ver_sb_dsp_detect	smp_d8a2731c
#define sb_dsp_detect	_set_ver(sb_dsp_detect)
#define __ver_sb_dsp_unload	smp_c4884969
#define sb_dsp_unload	_set_ver(sb_dsp_unload)
#define __ver_sb_dsp_disable_midi	smp_732f38df
#define sb_dsp_disable_midi	_set_ver(sb_dsp_disable_midi)
#define __ver_sb_be_quiet	smp_42424109
#define sb_be_quiet	_set_ver(sb_be_quiet)
#define __ver_probe_sbmpu	smp_ddc8ad00
#define probe_sbmpu	_set_ver(probe_sbmpu)
#define __ver_unload_sbmpu	smp_74afd69c
#define unload_sbmpu	_set_ver(unload_sbmpu)
#define __ver_smw_free	smp_450f9aea
#define smw_free	_set_ver(smw_free)
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bh:   %d [ ]
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enable_irq(%u) unbalanced from %p
Bad boy: %s (at 0x%x) called us without a dev_id!
Trying to free free IRQ%d
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 %s: %016Lx - %016Lx (usable)
(reserved)
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(ACPI NVS)
type %lu
BIOS-e820BIOS-88BIOS-e801<6>BIOS-provided physical RAM map:
mem=nopentiumexactmapacpismp=forcehighmem=<6>user-defined physical RAM map:
useronly %luMB highmem pages available, ignoring highmem size of %uMB.
<4>Warning only %ldMB will be used.
<4>Use a PAE enabled kernel.
<4>Use a HIGHMEM enabled kernel.
<3>ignoring highmem size on non-highmem kernel!
<5>%ldMB LOWMEM available.
System RAMACPI TablesACPI Non-volatile Storagereserved<6>CPU: L1 I Cache: %dK (%d bytes/line), D cache %dK (%d bytes/line)
<6>CPU: L2 Cache: %dK (%d bytes/line)
<6>AMD K6 stepping B detected - <6>K6 BUG %ld %d (Report these if test report is incorrect)
system stability may be impaired when more than 32 MB are used.
probably OK (after B9730xxxx).
<6>Please see http://www.mygale.com/~poulot/k6bug.html
<6>Enabling old style K6 write allocation for %d Mb
<6>Enabling new style K6 write allocation for %d Mb
<6>Enabling Disabled K7/SSE Support...
<6>Recalibrating delay loop with SLOP bit reset
<6>Working around Cyrix MediaGX virtual DMA bugs.
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22A2B34??<6>Centaur FCR was 0x%X now 0x%X
<6>Centaur FCR is 0x%X
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<6>CPU: Code Morphing Software revision %u.%u.%u-%u-%u
<6>CPU: %s
CPU: Rise iDragon II
<5>Intel Pentium with F0 0F bug - workaround enabled.
<6>CPU: L1 I cache: %dK, L1 D cache: %dK
<6>CPU: L2 cache: %dK
<6>CPU: L3 cache: %dK
Celeron (Covington)Mobile Pentium II (Dixon)Celeron (Mendocino)Celeron (Coppermine)<6>CPU: Hyper-Threading is disabled
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��9P���ȍ|$�|$�86 SX/2486 SL486 DX/2486 SX486 DX-50486 DX-25/33<5>CPU serial number disabled.
<6>Enabling CPUID on Cyrix processor.
<7>CPU: Before vendor init, caps: %08x %08x %08x, vendor = %d
486386<7>CPU: After vendor init, caps: %08x %08x %08x %08x
%02x/%02x<7>CPU:     After generic, caps: %08x %08x %08x %08x
<7>CPU:             Common caps: %08x %08x %08x %08x
NSCTransmetaRiseCentaurNexGenUMCAMDCyrixIntel%s %d86%s stepping %02x
centaur_mcrcyrix_arrk6_mtrrcxmmxlrtilongrunrecovery3dnow3dnowextlmmmxextsyscallia64tmhtsssse2ssefxsrmmxacpidtsclflushpnpse36patcmovmcapgemtrrsepapiccx8mcepaemsrtscpsedevmeunknownprocessor	: %d
vendor_id	: %s
cpu family	: %d
model		: %d
model name	: %s
stepping	: %d
stepping	: unknown
cpu MHz		: %lu.%03lu
cache size	: %d KB
yesnofdiv_bug	: %s
hlt_bug		: %s
f00f_bug	: %s
coma_bug	: %s
fpu		: %s
fpu_exception	: %s
cpuid level	: %d
wp		: %s
flags		: %s
bogomips	: %lu.%02lu

<4>CPU#%d already initialized!
<6>Initializing CPU#%d
setup.cIntelInside<6>Pentium Pro with Errata#50 detected. Taking evasive action.
<6>Your Pentium Pro seems ok.
<4>set_rtc_mmss: can't update from %d to %d
��������timerDetected %lu.%03lu MHz processor.
 @E�E�E�E�E�E�E�t�2�P�E�E�E�E�E�E�h���0�<0>CPU %d: Machine Check Exception: %08x%08x
<0>Bank %d: %08x%08x[%08x%08x] at %08x%08x
CPU context corruptUnable to continue<0>Attempting to continue.
<0>CPU#%d: Machine Check Exception:  0x%8X (type 0x%8X).
<0>CPU#%d: Possible thermal failure (CPU on fire ?).
<0>CPU#%d: Machine Check Exception.
<3>CPU#%d: Unexpected int18 (Machine Check).
<6>Intel old style machine check architecture supported.
<6>Intel old style machine check reporting enabled on CPU#%d.
<6>Intel machine check architecture supported.
<6>Intel machine check reporting enabled on CPU#%d.
<6>Winchip machine check reporting enabled on CPU#%d.
_DMI_<3>dmi_save_ident: out of memory.
<6>%s series board detected. Disabling IDE DMA.
<6>%s series board detected. Selecting BIOS-method for reboots.
<6>%s series board detected. Selecting SMP-method for reboots.
<6>%s bios detected. Using realmode poweroff only.
<6>%s machine detected. Enabling interrupts during APM calls.
<6>%s machine detected. Disabling APM.
<4>%s with broken BIOS detected. Refusing to enable the local APIC.
<4>%s with broken BIOS detected. The local APIC timer will not be used.
<4>BIOS strings suggest APM bugs, disabling power status reporting.
<6>%s laptop detected.
<4>BIOS strings suggest APM reports battery life in minutes and wrong byte order.
<6> *** Possibly defective BIOS detected (irqtable)
<6> *** Many BIOSes matching this signature have incorrect IRQ routing tables.
<6> *** If you see IRQ problems, in paticular SCSI resets and hangs at boot
<6> *** contact your hardware vendor and ask about updates.
<6> *** Building an SMP kernel may evade the bug some of the time.
<4>Detected ASUS mainboard with broken ACPI sleep table
<4>Toshiba with broken keyboard detected. If your keyboard sometimes generates 3 keypresses instead of one, contact pavel@ucw.cz
<4>Toshiba with broken S1 detected.
<6>%s machine detected. Mousepad Resume Bug workaround enabled.
<6>%s detected - fixing broken IRQ routing
%s
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щMl�D$Phz�E,P��������B���E��3��|.�/* $Id: PeeCeeI.c,v 1.4 1999/09/06 01:17:35 davem Exp $
 * PeeCeeI.c: The emerging standard...
 *
 * Copyright (C) 1997 David S. Miller (davem@caip.rutgers.edu)
 */

#include <linux/config.h>

#ifdef CONFIG_PCI

#include <asm/io.h>
#include <asm/byteorder.h>

void outsb(unsigned long addr, const void *src, unsigned long count)
{
	const u8 *p = src;

	while(count--)
		outb(*p++, addr);
}

void outsw(unsigned long addr, const void *src, unsigned long count)
{
	if(count) {
		u16 *ps = (u16 *)src;
		u32 *pi;

		if(((u64)src) & 0x2) {
			u16 val = le16_to_cpup(ps);
			outw(val, addr);
			ps++;
			count--;
		}
		pi = (u32 *)ps;
		while(count >= 2) {
			u32 w = le32_to_cpup(pi);

			pi++;
			outw(w >> 0, addr);
			outw(w >> 16, addr);
			count -= 2;
		}
		ps = (u16 *)pi;
		if(count) {
			u16 val = le16_to_cpup(ps);
			outw(val, addr);
		}
	}
}

void outsl(unsigned long addr, const void *src, unsigned long count)
{
	if(count) {
		if((((u64)src) & 0x3) == 0) {
			u32 *p = (u32 *)src;
			while(count--) {
				u32 val = cpu_to_le32p(p);
				outl(val, addr);
				p++;
			}
		} else {
			u8 *pb;
			u16 *ps = (u16 *)src;
			u32 l = 0, l2;
			u32 *pi;

			switch(((u64)src) & 0x3) {
			case 0x2:
				count -= 1;
				l = cpu_to_le16p(ps) << 16;
				ps++;
				pi = (u32 *)ps;
				while(count--) {
					l2 = cpu_to_le32p(pi);
					pi++;
					outl(((l >> 16) | (l2 << 16)), addr);
					l = l2;
				}
				ps = (u16 *)pi;
				l2 = cpu_to_le16p(ps);
				outl(((l >> 16) | (l2 << 16)), addr);
				break;

			case 0x1:
				count -= 1;
				pb = (u8 *)src;
				l = (*pb++ << 8);
				ps = (u16 *)pb;
				l2 = cpu_to_le16p(ps);
				ps++;
				l |= (l2 << 16);
				pi = (u32 *)ps;
				while(count--) {
					l2 = cpu_to_le32p(pi);
					pi++;
					outl(((l >> 8) | (l2 << 24)), addr);
					l = l2;
				}
				pb = (u8 *)pi;
				outl(((l >> 8) | (*pb << 24)), addr);
				break;

			case 0x3:
				count -= 1;
				pb = (u8 *)src;
				l = (*pb++ << 24);
				pi = (u32 *)pb;
				while(count--) {
					l2 = cpu_to_le32p(pi);
					pi++;
					outl(((l >> 24) | (l2 << 8)), addr);
					l = l2;
				}
				ps = (u16 *)pi;
				l2 = cpu_to_le16p(ps);
				ps++;
				pb = (u8 *)ps;
				l2 |= (*pb << 16);
				outl(((l >> 24) | (l2 << 8)), addr);
				break;
			}
		}
	}
}

void insb(unsigned long addr, void *dst, unsigned long count)
{
	if(count) {
		u32 *pi;
		u8 *pb = dst;

		while((((unsigned long)pb) & 0x3) && count--)
			*pb++ = inb(addr);
		pi = (u32 *)pb;
		while(count >= 4) {
			u32 w;

			w  = (inb(addr) << 24);
			w |= (inb(addr) << 16);
			w |= (inb(addr) << 8);
			w |= (inb(addr) << 0);
			*pi++ = w;
			count -= 4;
		}
		pb = (u8 *)pi;
		while(count--)
			*pb++ = inb(addr);
	}
}

void insw(unsigned long addr, void *dst, unsigned long count)
{
	if(count) {
		u16 *ps = dst;
		u32 *pi;

		if(((unsigned long)ps) & 0x2) {
			*ps++ = le16_to_cpu(inw(addr));
			count--;
		}
		pi = (u32 *)ps;
		while(count >= 2) {
			u32 w;

			w  = (le16_to_cpu(inw(addr)) << 16);
			w |= (le16_to_cpu(inw(addr)) << 0);
			*pi++ = w;
			count -= 2;
		}
		ps = (u16 *)pi;
		if(count)
			*ps = le16_to_cpu(inw(addr));
	}
}

void insl(unsigned long addr, void *dst, unsigned long count)
{
	if(count) {
		if((((unsigned long)dst) & 0x3) == 0) {
			u32 *pi = dst;
			while(count--)
				*pi++ = le32_to_cpu(inl(addr));
		} else {
			u32 l = 0, l2, *pi;
			u16 *ps;
			u8 *pb;

			switch(((unsigned long)dst) & 3) {
			case 0x2:
				ps = dst;
				count -= 1;
				l = le32_to_cpu(inl(addr));
				*ps++ = l;
				pi = (u32 *)ps;
				while(count--) {
					l2 = le32_to_cpu(inl(addr));
					*pi++ = (l << 16) | (l2 >> 16);
					l = l2;
				}
				ps = (u16 *)pi;
				*ps = l;
				break;

			case 0x1:
				pb = dst;
				count -= 1;
				l = le32_to_cpu(inl(addr));
				*pb++ = l >> 24;
				ps = (u16 *)pb;
				*ps++ = ((l >> 8) & 0xffff);
				pi = (u32 *)ps;
				while(count--) {
					l2 = le32_to_cpu(inl(addr));
					*pi++ = (l << 24) | (l2 >> 8);
					l = l2;
				}
				pb = (u8 *)pi;
				*pb = l;
				break;

			case 0x3:
				pb = (u8 *)dst;
				count -= 1;
				l = le32_to_cpu(inl(addr));
				*pb++ = l >> 24;
				pi = (u32 *)pb;
				while(count--) {
					l2 = le32_to_cpu(inl(addr));
					*pi++ = (l << 8) | (l2 >> 24);
					l = l2;
				}
				ps = (u16 *)pi;
				*ps++ = ((l >> 8) & 0xffff);
				pb = (u8 *)ps;
				*pb = l;
				break;
			}
		}
	}
}

#endif /* CONFIG_PCI */
/* $Id: VIScsumcopy.S,v 1.8 2000/02/20 23:21:39 davem Exp $
 * VIScsumcopy.S: High bandwidth IP checksumming with simultaneous
 *            copying utilizing the UltraSparc Visual Instruction Set.
 *
 * Copyright (C) 1997, 1999 Jakub Jelinek (jj@ultra.linux.cz)
 *
 * Based on older sparc32/sparc64 checksum.S, which is:
 *
 *      Copyright(C) 1995 Linus Torvalds
 *      Copyright(C) 1995 Miguel de Icaza
 *      Copyright(C) 1996,1997 David S. Miller
 *    derived from:
 *	  Linux/Alpha checksum c-code
 *        Linux/ix86 inline checksum assembly
 *        RFC1071 Computing the Internet Checksum (esp. Jacobsons m68k code)
 *	  David Mosberger-Tang for optimized reference c-code
 *	  BSD4.4 portable checksum routine
 */

#ifdef __sparc_v9__
#define STACKOFF	0x7ff+128
#else
#define STACKOFF	64
#endif

#ifdef __KERNEL__
#include <asm/head.h>
#include <asm/asi.h>
#include <asm/page.h>
#include <asm/visasm.h>
#define ASI_BLK_XOR	0
#define ASI_BLK_XOR1	(ASI_BLK_P ^ (ASI_BLK_P >> 3) ^ ASI_P)
#define ASI_BLK_OR	(ASI_BLK_P & ~ASI_P)
#else
#define ASI_P		0x80
#define ASI_BLK_P	0xf0
#define FRPS_FEF	0x04
#define FPRS_DU		0x02
#define FPRS_DL		0x01
#define ASI_BLK_XOR	(ASI_BLK_P ^ ASI_P)
#endif

#define src		o0
#define dst		o1
#define	len		o2
#define sum		o3
#define x1		g1
#define x2		g2
#define x3		o4
#define x4		g4
#define x5		g5
#define x6		g7
#define x7		g3
#define x8		o5

/* Dobrou noc, SunSoft engineers. Spete sladce.
 * This has a couple of tricks in and those
 * tricks are UltraLinux trade secrets :))
 * Once AGAIN, the SunSoft engineers are caught
 * asleep at the keyboard :)).
 * The main loop does about 20 superscalar cycles
 * per 64bytes checksummed/copied.
 */

#define LDBLK(O0)									\
	ldda		[%src] %asi, %O0 	/*  Load	Group		*/

#define STBLK										\
	stda		%f48, [%dst] ASI_BLK_P	/*  Store			*/

#define ST(fx,off)									\
	std		%fx, [%dst + off]	/*  Store			*/

#define SYNC										\
	membar		#Sync


#define DO_THE_TRICK(f0,f2,f4,f6,f8,f10,f12,f14,F0,F2,F4,F6,F8,F10,F12,F14,DUMMY1,A0,A2,A4,A6,A8,A10,A12,A14,B14,DUMMY2,LOAD,STORE1,STORE2,STORE3,STORE4,STORE5,STORE6,STORE7,STORE8,DUMMY3,BRANCH...)	\
	LOAD					/*  Load	(Group)		*/;	\
	faligndata	%A14, %F0, %A14		/*  FPA		Group		*/;	\
	inc		%x5			/*  IEU0			*/;	\
	STORE1					/*  Store (optional)		*/;	\
	faligndata	%F0, %F2, %A0		/*  FPA		Group		*/;	\
	srl		%x5, 1, %x5		/*  IEU0			*/;	\
	add		%sum, %x4, %sum		/*  IEU1			*/;	\
	fpadd32		%F0, %f0, %F0		/*  FPA		Group		*/;	\
	inc		%x6			/*  IEU0			*/;	\
	STORE2					/*  Store (optional)		*/;	\
	faligndata	%F2, %F4, %A2		/*  FPA		Group		*/;	\
	srl		%x6, 1, %x6		/*  IEU0			*/;	\
	add		%sum, %x5, %sum		/*  IEU1			*/;	\
	fpadd32		%F2, %f2, %F2		/*  FPA		Group		*/;	\
	add		%src, 64, %src		/*  IEU0			*/;	\
	fcmpgt32	%f0, %F0, %x1		/*  FPM				*/;	\
	add		%dst, 64, %dst		/*  IEU1	Group		*/;	\
	inc		%x7			/*  IEU0			*/;	\
	STORE3					/*  Store (optional)		*/;	\
	faligndata	%F4, %F6, %A4		/*  FPA				*/;	\
	fpadd32		%F4, %f4, %F4		/*  FPA		Group		*/;	\
	add		%sum, %x6, %sum		/*  IEU1			*/;	\
	fcmpgt32	%f2, %F2, %x2		/*  FPM				*/;	\
	srl		%x7, 1, %x7		/*  IEU0	Group		*/;	\
	inc		%x8			/*  IEU1			*/;	\
	STORE4					/*  Store (optional)		*/;	\
	faligndata	%F6, %F8, %A6		/*  FPA				*/;	\
	fpadd32		%F6, %f6, %F6		/*  FPA		Group		*/;	\
	srl		%x8, 1, %x8		/*  IEU0			*/;	\
	fcmpgt32	%f4, %F4, %x3		/*  FPM				*/;	\
	add		%sum, %x7, %sum		/*  IEU0	Group		*/;	\
	inc		%x1			/*  IEU1			*/;	\
	STORE5					/*  Store (optional)		*/;	\
	faligndata	%F8, %F10, %A8		/*  FPA				*/;	\
	fpadd32		%F8, %f8, %F8		/*  FPA		Group		*/;	\
	srl		%x1, 1, %x1		/*  IEU0			*/;	\
	fcmpgt32	%f6, %F6, %x4		/*  FPM				*/;	\
	add		%sum, %x8, %sum		/*  IEU0	Group		*/;	\
	inc		%x2			/*  IEU1			*/;	\
	STORE6					/*  Store (optional)		*/;	\
	faligndata	%F10, %F12, %A10	/*  FPA				*/;	\
	fpadd32		%F10, %f10, %F10	/*  FPA		Group		*/;	\
	srl		%x2, 1, %x2		/*  IEU0			*/;	\
	fcmpgt32	%f8, %F8, %x5		/*  FPM				*/;	\
	add		%sum, %x1, %sum		/*  IEU0	Group		*/;	\
	inc		%x3			/*  IEU1			*/;	\
	STORE7					/*  Store (optional)		*/;	\
	faligndata	%F12, %F14, %A12	/*  FPA				*/;	\
	fpa#define __ver_note_to_freq	smp_5d986fc9
#define note_to_freq	_set_ver(note_to_freq)
#define __ver_compute_finetune	smp_04c87ec8
#define compute_finetune	_set_ver(compute_finetune)
#define __ver_seq_copy_to_input	smp_7679ee76
#define seq_copy_to_input	_set_ver(seq_copy_to_input)
#define __ver_seq_input_event	smp_17ba231d
#define seq_input_event	_set_ver(seq_input_event)
#define __ver_sequencer_init	smp_f78f6363
#define sequencer_init	_set_ver(sequencer_init)
#define __ver_sequencer_timer	smp_90bd9714
#define sequencer_timer	_set_ver(sequencer_timer)
#define __ver_sound_timer_init	smp_2161d5e8
#define sound_timer_init	_set_ver(sound_timer_init)
#define __ver_sound_timer_interrupt	smp_e2675a79
#define sound_timer_interrupt	_set_ver(sound_timer_interrupt)
#define __ver_sound_timer_syncinterval	smp_fa6871be
#define sound_timer_syncinterval	_set_ver(sound_timer_syncinterval)
#define __ver_reprogram_timer	smp_c68b568e
#define reprogram_timer	_set_ver(reprogram_timer)
#define __ver_cent_tuning	smp_03ce7ff7
#define cent_tuning	_set_ver(cent_tuning)
#define __ver_semitone_tuning	smp_8b84aeb1
#define semitone_tuning	_set_ver(semitone_tuning)
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#define __ver_register_sound_special	smp_bd5ee743
#define register_sound_special	_set_ver(register_sound_special)
#define __ver_register_sound_mixer	smp_c73c5dd7
#define register_sound_mixer	_set_ver(register_sound_mixer)
#define __ver_register_sound_midi	smp_26500c72
#define register_sound_midi	_set_ver(register_sound_midi)
#define __ver_register_sound_dsp	smp_2fa4ed9a
#define register_sound_dsp	_set_ver(register_sound_dsp)
#define __ver_register_sound_synth	smp_1845e0a6
#define register_sound_synth	_set_ver(register_sound_synth)
#define __ver_unregister_sound_special	smp_99c95fa5
#define unregister_sound_special	_set_ver(unregister_sound_special)
#define __ver_unregister_sound_mixer	smp_7afc9d8a
#define unregister_sound_mixer	_set_ver(unregister_sound_mixer)
#define __ver_unregister_sound_midi	smp_fdab6de3
#define unregister_sound_midi	_set_ver(unregister_sound_midi)
#define __ver_unregister_sound_dsp	smp_cd083b10
#define unregister_sound_dsp	_set_ver(unregister_sound_dsp)
#define __ver_unregister_sound_synth	smp_df03108a
#define unregister_sound_synth	_set_ver(unregister_sound_synth)
#define __ver_mod_firmware_load	smp_39e3dd23
#define mod_firmware_load	_set_ver(mod_firmware_load)
#define __ver_mixer_devs	smp_89b2aba6
#define mixer_devs	_set_ver(mixer_devs)
#define __ver_audio_devs	smp_433bd495
#define audio_devs	_set_ver(audio_devs)
#define __ver_num_mixers	smp_9d845b18
#define num_mixers	_set_ver(num_mixers)
#define __ver_num_audiodevs	smp_4cd01bdd
#define num_audiodevs	_set_ver(num_audiodevs)
#define __ver_midi_devs	smp_b3ae63d0
#define midi_devs	_set_ver(midi_devs)
#define __ver_num_midis	smp_a1eae7cf
#define num_midis	_set_ver(num_midis)
#define __ver_synth_devs	smp_9cc5eb09
#define synth_devs	_set_ver(synth_devs)
#define __ver_num_synths	smp_bf07ca6e
#define num_synths	_set_ver(num_synths)
#define __ver_sound_timer_devs	smp_b039ee76
#define sound_timer_devs	_set_ver(sound_timer_devs)
#define __ver_num_sound_timers	smp_98edb1e0
#define num_sound_timers	_set_ver(num_sound_timers)
#define __ver_sound_install_audiodrv	smp_d25afb61
#define sound_install_audiodrv	_set_ver(sound_install_audiodrv)
#define __ver_sound_install_mixer	smp_a2081e33
#define sound_install_mixer	_set_ver(sound_install_mixer)
#define __ver_sound_alloc_dma	smp_9a95733f
#define sound_alloc_dma	_set_ver(sound_alloc_dma)
#define __ver_sound_free_dma	smp_394cb088
#define sound_free_dma	_set_ver(sound_free_dma)
#define __ver_sound_open_dma	smp_cc4b8797
#define sound_open_dma	_set_ver(sound_open_dma)
#define __ver_sound_close_dma	smp_418f5fbe
#define sound_close_dma	_set_ver(sound_close_dma)
#define __ver_sound_alloc_audiodev	smp_5035736c
#define sound_alloc_audiodev	_set_ver(sound_alloc_audiodev)
#define __ver_sound_alloc_mididev	smp_ba413f87
#define sound_alloc_mididev	_set_ver(sound_alloc_mididev)
#define __ver_sound_alloc_mixerdev	smp_1b3df3cf
#define sound_alloc_mixerdev	_set_ver(sound_alloc_mixerdev)
#define __ver_sound_alloc_timerdev	smp_51e354b2
#define sound_alloc_timerdev	_set_ver(sound_alloc_timerdev)
#define __ver_sound_alloc_synthdev	smp_c748d109
#define sound_alloc_synthdev	_set_ver(sound_alloc_synthdev)
#define __ver_sound_unload_audiodev	smp_a948751e
#define sound_unload_audiodev	_set_ver(sound_unload_audiodev)
#define __ver_sound_unload_mididev	smp_a6bb414c
#define sound_unload_mididev	_set_ver(sound_unload_mididev)
#define __ver_sound_unload_mixerdev	smp_a51c913b
#define sound_unload_mixerdev	_set_ver(sound_unload_mixerdev)
#define __ver_sound_unload_timerdev	smp_a41ead5f
#define sound_unload_timerdev	_set_ver(sound_unload_timerdev)
#define __ver_sound_unload_synthdev	smp_06339815
#define sound_unload_synthdev	_set_ver(sound_unload_synthdev)
#define __ver_load_mixer_volumes	smp_a1d5f04f
#define load_mixer_volumes	_set_ver(load_mixer_volumes)
#define __ver_conf_printf	smp_0f280035
#define conf_printf	_set_ver(conf_printf)
#define __ver_conf_printf2	smp_7bdf0907
#define conf_printf2	_set_ver(conf_printf2)

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�������	����!��D$,�L$,���@�9A��1��������D�����dd32		%F12, %f12, %F12	/*  FPA		Group		*/;	\
	srl		%x3, 1, %x3		/*  IEU0			*/;	\
	fcmpgt32	%f10, %F10, %x6		/*  FPM				*/;	\
	add		%sum, %x2, %sum		/*  IEU0	Group		*/;	\
	inc		%x4			/*  IEU1			*/;	\
	STORE8					/*  Store (optional)		*/;	\
	fmovd		%F14, %B14		/*  FPA				*/;	\
	fpadd32		%F14, %f14, %F14	/*  FPA		Group		*/;	\
	srl		%x4, 1, %x4		/*  IEU0			*/;	\
	fcmpgt32	%f12, %F12, %x7		/*  FPM				*/;	\
	add		%sum, %x3, %sum		/*  IEU0	Group		*/;	\
	subcc		%len, 64, %len		/*  IEU1			*/;	\
	BRANCH					/*  CTI				*/;	\
	fcmpgt32	%f14, %F14, %x8		/*  FPM		Group		*/;

#define END_THE_TRICK(f0,f2,f4,f6,f8,f10,f12,f14,FA,FB,S0,S1,S2,S3,T0,T1,U0,fz) \
	inc		%x5			/*  IEU0	Group		*/;	\
	fpadd32		%f2, %f0, %S0		/*  FPA				*/;	\
	add		%sum, %x4, %sum		/*  IEU1			*/;	\
	srl		%x5, 1, %x5		/*  IEU0	Group		*/;	\
	fpadd32		%f6, %f4, %S1		/*  FPA				*/;	\
	inc		%x6			/*  IEU1			*/;	\
	fpadd32		%f10, %f8, %S2		/*  FPA		Group		*/;	\
	add		%sum, %x5, %sum		/*  IEU0			*/;	\
	fcmpgt32	%f0, %S0, %x1		/*  FPM				*/;	\
	fpadd32		%f14, %f12, %S3		/*  FPA		Group		*/;	\
	srl		%x6, 1, %x6		/*  IEU0			*/;	\
	fcmpgt32	%f4, %S1, %x2		/*  FPM				*/;	\
	add		%sum, %x6, %sum		/*  IEU0	Group		*/;	\
	fzero		%fz			/*  FPA				*/;	\
	fcmpgt32	%f8, %S2, %x3		/*  FPM				*/;	\
	inc		%x7			/*  IEU0	Group		*/;	\
	inc		%x8			/*  IEU1			*/;	\
	srl		%x7, 1, %x7		/*  IEU0	Group		*/;	\
	inc		%x1			/*  IEU1			*/;	\
	fpadd32		%S0, %S1, %T0		/*  FPA				*/;	\
	fpadd32		%S2, %S3, %T1		/*  FPA		Group		*/;	\
	add		%sum, %x7, %sum		/*  IEU0			*/;	\
	fcmpgt32	%f12, %S3, %x4		/*  FPM				*/;	\
	srl		%x8, 1, %x8		/*  IEU0	Group		*/;	\
	inc		%x2			/*  IEU1			*/;	\
	srl		%x1, 1, %x1		/*  IEU0	Group		*/;	\
	add		%sum, %x8, %sum		/*  IEU1			*/;	\
	add		%sum, %x1, %sum		/*  IEU0	Group		*/;	\
	fcmpgt32	%S0, %T0, %x5		/*  FPM				*/;	\
	srl		%x2, 1, %x2		/*  IEU0	Group		*/;	\
	fcmpgt32	%S2, %T1, %x6		/*  FPM				*/;	\
	inc		%x3			/*  IEU0	Group		*/;	\
	add		%sum, %x2, %sum		/*  IEU1			*/;	\
	srl		%x3, 1, %x3		/*  IEU0	Group		*/;	\
	inc		%x4			/*  IEU1			*/;	\
	fpadd32		%T0, %T1, %U0		/*  FPA		Group		*/;	\
	add		%sum, %x3, %sum		/*  IEU0			*/;	\
	fcmpgt32	%fz, %f2, %x7		/*  FPM				*/;	\
	srl		%x4, 1, %x4		/*  IEU0	Group		*/;	\
	fcmpgt32	%fz, %f6, %x8		/*  FPM				*/;	\
	inc		%x5			/*  IEU0	Group		*/;	\
	add		%sum, %x4, %sum		/*  IEU1			*/;	\
	srl		%x5, 1, %x5		/*  IEU0	Group		*/;	\
	fcmpgt32	%fz, %f10, %x1		/*  FPM				*/;	\
	inc		%x6			/*  IEU0	Group		*/;	\
	add		%sum, %x5, %sum		/*  IEU1			*/;	\
	fmovd		%FA, %FB		/*  FPA		Group		*/;	\
	fcmpgt32	%fz, %f14, %x2		/*  FPM				*/;	\
	srl		%x6, 1, %x6		/*  IEU0	Group		*/;	\
	ba,pt		%xcc, ett		/*  CTI				*/;	\
	 inc		%x7			/*  IEU1			*/;

#define END_THE_TRICK1(f0,f2,f4,f6,f8,f10,f12,f14,FA,FB) 				\
	END_THE_TRICK(f0,f2,f4,f6,f8,f10,f12,f14,FA,FB,f48,f50,f52,f54,f56,f58,f60,f62)

#define END_THE_TRICK2(S0,S1,S2,S3,T0,T1,U0,U1,V0,fz) 					\
	fpadd32		%U0, %U1, %V0		/*  FPA		Group		*/;	\
	srl		%x7, 1, %x7		/*  IEU0			*/;	\
	add		%sum, %x6, %sum		/*  IEU1			*/;	\
	std		%V0, [%sp + STACKOFF]	/*  Store	Group		*/;	\
	inc		%x8			/*  IEU0			*/;	\
	sub		%sum, %x7, %sum		/*  IEU1			*/;	\
	srl		%x8, 1, %x8		/*  IEU0	Group		*/;	\
	fcmpgt32	%fz, %S1, %x3		/*  FPM				*/;	\
	inc		%x1			/*  IEU0	Group		*/;	\
	fcmpgt32	%fz, %S3, %x4		/*  FPM				*/;	\
	srl		%x1, 1, %x1		/*  IEU0	Group		*/;	\
	sub		%sum, %x8, %sum		/*  IEU1			*/;	\
	ldx		[%sp + STACKOFF], %x8	/*  Load	Group		*/;	\
	inc		%x2			/*  IEU0			*/;	\
	sub		%sum, %x1, %sum		/*  IEU1			*/;	\
	srl		%x2, 1, %x2		/*  IEU0	Group		*/;	\
	fcmpgt32	%fz, %T1, %x5		/*  FPM				*/;	\
	inc		%x3			/*  IEU0	Group		*/;	\
	fcmpgt32	%T0, %U0, %x6		/*  FPM				*/;	\
	srl		%x3, 1, %x3		/*  IEU0	Group		*/;	\
	sub		%sum, %x2, %sum		/*  IEU1			*/;	\
	inc		%x4			/*  IEU0	Group		*/;	\
	sub		%sum, %x3, %sum		/*  IEU1			*/;	\
	srl		%x4, 1, %x4		/*  IEU0	Group		*/;	\
	fcmpgt32	%fz, %U1, %x7		/*  FPM				*/;	\
	inc		%x5			/*  IEU0	Group		*/;	\
	fcmpgt32	%U0, %V0, %x1		/*  FPM				*/;	\
	srl		%x5, 1, %x5		/*  IEU0	Group		*/;	\
	sub		%sum, %x4, %sum		/*  IEU1			*/;	\
	sub		%sum, %x5, %sum		/*  IEU0	Group		*/;	\
	fcmpgt32	%fz, %V0, %x2		/*  FPM				*/;	\
	inc		%x6			/*  IEU0	Group		*/;	\
	inc		%x7			/*  IEU1			*/;	\
	srl		%x6, 1, %x6		/*  IEU0	Group		*/;	\
	inc		%x1			/*  IEU1			*/;	\
	srl		%x7, 1, %x7		/*  IEU0	Group		*/;	\
	add		%sum, %x6, %sum		/*  IEU1			*/;	\
	srl		%x1, 1, %x1		/*  IEU0	Group		*/;	\
	sub		%sum, %x7, %sum		/*  IEU1			*/;	\
	inc		%x2			/*  IEU0	Group		*/;	\
	add		%sum, %x1, %sum		/*  IEU1			*/;	\
	srl		%x2, 1, %x2		/*  IEU0	Group		*/;	\
	sub		%sum, %x2, %sum		/*  IEU0	Group		*/;	\
	addcc		%sum, %x8, %sum		/*  IEU1	Group		*/;	\
	bcs,a,pn	%xcc, 33f		/*  CTI				*/;	\
	 add		%sum, 1, %sum		/*  IEU0	(Group)		*/;	\
33:						/*  That's it			*/;

	.text
	.globl		csum_partial_copy_vis
	.align		32
/* %asi should be either ASI_P or ASI_AIUS for csum_partial_copy resp.
 * csum_partial_copy_from_user
 * This assumes that !((%src^%dst)&3) && !((%src|%dst)&1) && %len >= 256
 */
csum_partial_copy_vis:
	andcc		%dst, 7, %g0		/*  IEU1	Group		*/
	be,pt		%icc, 4f		/*  CTI				*/
	 and		%dst, 0x38, %o4		/*  IEU0			*/
	mov		1, %g5			/*  IEU0	Group		*/
	andcc		%dst, 2, %g0		/*  IEU1			*/
	be,pt		%icc, 1f		/*  CTI				*/
	 and		%dst, 4, %g7		/*  IEU0	Group		*/
	lduha		[%src] %asi, %g2	/*  Load			*/
	sub		%len, 2, %len		/*  IEU0	Group		*/
	add		%dst, 2, %dst		/*  IEU1			*/
	andcc		%dst, 4, %g7		/*  IEU1	Group		*/
	sll		%g5, 16, %g5		/*  IEU0			*/
	sth		%g2, [%dst - 2]		/*  Store	Group		*/
	sll		%g2, 16, %g2		/*  IEU0	 		*/
	add		%src, 2, %src		/*  IEU1			*/
	addcc		%g2, %sum, %sum		/*  IEU1	Group		*/
	bcs,a,pn	%icc, 1f		/*  CTI				*/
	 add		%sum, %g5, %sum		/*  IEU0			*/
1:	lduwa		[%src] %asi, %g2	/*  Load			*/
	brz,a,pn	%g7, 4f			/*  CTI+IEU1	Group		*/
	 and		%dst, 0x38, %o4		/*  IEU0			*/
	add		%dst, 4, %dst		/*  IEU0	Group		*/
	sub		%len, 4, %len		/*  IEU1			*/
	addcc		%g2, %sum, %sum		/*  IEU1	Group		*/
	bcs,a,pn	%icc, 1f		/*  CTI				*/
	 add		%sum, 1, %sum		/*  IEU0			*/
1:	and		%dst, 0x38, %o4		/*  IEU0	Group		*/
	stw		%g2, [%dst - 4]		/*  Store			*/
	add		%src, 4, %src		/*  IEU1			*/
4:
#ifdef __KERNEL__
	VISEntry
#endif
	mov		%src, %g7		/*  IEU1	Group		*/
	fzero		%f48			/*  FPA				*/
	alignaddr	%src, %g0, %src		/*  Single	Group		*/
	subcc		%g7, %src, %g7		/*  IEU1	Group		*/
	be,pt		%xcc, 1f		/*  CTI				*/
	 mov		0x40, %g1		/*  IEU0			*/
	lduwa		[%src] %asi, %g2	/*  Load	Group		*/
	subcc		%sum, %g2, %sum		/*  IEU1	Group+load stall*/
	bcs,a,pn	%icc, 1f		/*  CTI				*/
	 sub		%sum, 1, %sum		/*  IEU0			*/
1:	srl		%sum, 0, %sum		/*  IEU0	Group		*/
	clr		%g5			/*  IEU1			*/
	brz,pn		%o4, 3f			/*  CTI+IEU1	Group		*/
	 sub		%g1, %o4, %g1		/*  IEU0			*/
	ldda		[%src] %asi, %f0	/*  Load			*/
	clr		%o4			/*  IEU0	Group		*/
	andcc		%dst, 8, %g0		/*  IEU1			*/
	be,pn		%icc, 1f		/*  CTI				*/
	 ldda		[%src + 8] %asi, %f2	/*  Load	Group		*/
	add		%src, 8, %src		/*  IEU0			*/
	sub		%len, 8, %len		/*  IEU1			*/
	fpadd32		%f0, %f48, %f50		/*  FPA				*/
	addcc		%dst, 8, %dst		/*  IEU1	Group		*/
	faligndata	%f0, %f2, %f16		/*  FPA				*/
	fcmpgt32	%f48, %f50, %o4		/*  FPM		Group		*/
	fmovd		%f2, %f0		/*  FPA		Group		*/
	ldda		[%src + 8] %asi, %f2	/*  Load			*/
	std		%f16, [%dst - 8]	/*  Store			*/
	fmovd		%f50, %f48		/*  FPA				*/
1:	andcc		%g1, 0x10, %g0		/*  IEU1	Group		*/
	be,pn		%icc, 1f		/*  CTI				*/
	 and		%g1, 0x20, %g1		/*  IEU0			*/
	fpadd32		%f0, %f48, %f50		/*  FPA				*/
	ldda		[%src + 16] %asi, %f4	/*  Load	Group		*/
	add		%src, 16, %src		/*  IEU0			*/
	add		%dst, 16, %dst		/*  IEU1			*/
	faligndata	%f0, %f2, %f16		/*  FPA				*/
	fcmpgt32	%f48, %f50, %g5		/*  FPM		Group		*/
	sub		%len, 16, %len		/*  IEU0			*/
	inc		%o4			/*  IEU1			*/
	std		%f16, [%dst - 16]	/*  Store	Group		*/
	fpadd32		%f2, %f50, %f48		/*  FPA				*/
	srl		%o4, 1, %o5		/*  IEU0			*/
	faligndata	%f2, %f4, %f18		/*  FPA		Group		*/
	std		%f18, [%dst - 8]	/*  Store			*/
	fcmpgt32	%f50, %f48, %o4		/*  FPM		Group		*/
	add		%o5, %sum, %sum		/*  IEU0			*/
	ldda		[%src + 8] %asi, %f2	/*  Load			*/
	fmovd		%f4, %f0		/*  FPA				*/
1:	brz,a,pn	%g1, 4f			/*  CTI+IEU1	Group		*/
	 rd		%asi, %g2		/*  LSU		Group + 4 bubbles*/
	inc		%g5			/*  IEU0			*/
	fpadd32		%f0, %f48, %f50		/*  FPA				*/
	ldda		[%src + 16] %asi, %f4	/*  Load	Group		*/
	srl		%g5, 1, %g5		/*  IEU0			*/
	add		%dst, 32, %dst		/*  IEU1			*/
	faligndata	%f0, %f2, %f16		/*  FPA				*/
	fcmpgt32	%f48, %f50, %o5		/*  FPM		Group		*/
	inc		%o4			/*  IEU0			*/
	ldda		[%src + 24] %asi, %f6	/*  Load			*/
	srl		%o4, 1, %o4		/*  IEU0	Group		*/
	add		%g5, %sum, %sum		/*  IEU1			*/
	ldda		[%src + 32] %asi, %f8	/*  Load			*/
	fpadd32		%f2, %f50, %f48		/*  FPA				*/
	faligndata	%f2, %f4, %f18		/*  FPA		Group		*/
	sub		%len, 32, %len		/*  IEU0			*/
	std		%f16, [%dst - 32]	/*  Store			*/
	fcmpgt32	%f50, %f48, %g3		/*  FPM		Group		*/
	inc		%o5			/*  IEU0			*/
	add		%o4, %sum, %sum		/*  IEU1			*/
	fpadd32		%f4, %f48, %f50		/*  FPA				*/
	faligndata	%f4, %f6, %f20		/*  FPA		Group		*/
	srl		%o5, 1, %o5		/*  IEU0			*/
	fcmpgt32	%f48, %f50, %g5		/*  FPM		Group		*/
	add		%o5, %sum, %sum		/*  IEU0			*/
	std		%f18, [%dst - 24]	/*  Store			*/
	fpadd32		%f6, %f50, %f48		/*  FPA				*/
	inc		%g3			/*  IEU0	Group		*/
	std		%f20, [%dst - 16]	/*  Store			*/
	add		%src, 32, %src		/*  IEU1			*/
	faligndata	%f6, %f8, %f22		/*  FPA				*/
	fcmpgt32	%f50, %f48, %o4		/*  FPM		Group		*/
	srl		%g3, 1, %g3		/*  IEU0			*/
	std		%f22, [%dst - 8]	/*  Store			*/	
	add		%g3, %sum, %sum		/*  IEU0	Group		*/
3:	rd		%asi, %g2		/*  LSU		Group + 4 bubbles*/
#ifdef __KERNEL__
4:	sethi		%hi(vis0s), %g7		/*  IEU0	Group		*/
	or		%g2, ASI_BLK_OR, %g2	/*  IEU1			*/
#else
4:	rd		%pc, %g7		/*  LSU		Group + 4 bubbles*/
#endif
	inc		%g5			/*  IEU0	Group		*/
	and		%src, 0x38, %g3		/*  IEU1			*/	
	membar		#StoreLoad		/*  LSU		Group		*/
	srl		%g5, 1, %g5		/*  IEU0			*/
	inc		%o4			/*  IEU1			*/
	sll		%g3, 8, %g3		/*  IEU0	Group		*/
	sub		%len, 0xc0, %len	/*  IEU1			*/
	addcc		%g5, %sum, %sum		/*  IEU1	Group		*/
	srl		%o4, 1, %o4		/*  IEU0			*/
	add		%g7, %g3, %g7		/*  IEU0	Group		*/
	add		%o4, %sum, %sum		/*  IEU1			*/
#ifdef __KERNEL__
	jmpl		%g7 + %lo(vis0s), %g0	/*  CTI+IEU1	Group		*/
#else
	jmpl		%g7 + (vis0s - 4b), %g0	/*  CTI+IEU1	Group		*/
#endif
	 fzero		%f32			/*  FPA				*/

	.align		2048
vis0s:	wr		%g2, ASI_BLK_XOR, %asi	/*  LSU		Group		*/
	add		%src, 128, %src		/*  IEU0	Group		*/
	ldda		[%src-128] %asi, %f0	/*  Load	Group		*/
	ldda		[%src-64] %asi, %f16	/*  Load	Group		*/
	fmovd		%f48, %f62		/*  FPA		Group	f0 available*/
	faligndata	%f0, %f2, %f48		/*  FPA		Group	f2 available*/
	fcmpgt32	%f32, %f2, %x1		/*  FPM		Group	f4 available*/
	fpadd32		%f0, %f62, %f0		/*  FPA				*/
	fcmpgt32	%f32, %f4, %x2		/*  FPM		Group	f6 available*/
	faligndata	%f2, %f4, %f50		/*  FPA				*/
	fcmpgt32	%f62, %f0, %x3		/*  FPM		Group	f8 available*/
	faligndata	%f4, %f6, %f52		/*  FPA				*/
	fcmpgt32	%f32, %f6, %x4		/*  FPM		Group	f10 available*/
	inc		%x1			/*  IEU0			*/
	faligndata	%f6, %f8, %f54		/*  FPA				*/
	fcmpgt32	%f32, %f8, %x5		/*  FPM		Group	f12 available*/
	srl		%x1, 1, %x1		/*  IEU0			*/
	inc		%x2			/*  IEU1			*/
	faligndata	%f8, %f10, %f56		/*  FPA				*/
	fcmpgt32	%f32, %f10, %x6		/*  FPM		Group	f14 available*/
	srl		%x2, 1, %x2		/*  IEU0			*/
	add		%sum, %x1, %sum		/*  IEU1			*/
	faligndata	%f10, %f12, %f58	/*  FPA				*/
	fcmpgt32	%f32, %f12, %x7		/*  FPM		Group		*/
	inc		%x3			/*  IEU0			*/
	add		%sum, %x2, %sum		/*  IEU1			*/
	faligndata	%f12, %f14, %f60	/*  FPA				*/
	fcmpgt32	%f32, %f14, %x8		/*  FPM		Group		*/
	srl		%x3, 1, %x3		/*  IEU0			*/
	inc		%x4			/*  IEU1			*/
	fmovd		%f14, %f62		/*  FPA				*/
	srl		%x4, 1, %x4		/*  IEU0	Group		*/
	add		%sum, %x3, %sum		/*  IEU1			*/
vis0:	DO_THE_TRICK(	f0,f2,f4,f6,f8,f10,f12,f14,f16,f18,f20,f22,f24,f26,f28,f30,
			,f48,f50,f52,f54,f56,f58,f60,f62,f62,
			,LDBLK(f32),	STBLK,,,,,,,,
			,bcs,pn %icc, vis0e1)
	DO_THE_TRICK(	f16,f18,f20,f22,f24,f26,f28,f30,f32,f34,f36,f38,f40,f42,f44,f46,
			,f48,f50,f52,f54,f56,f58,f60,f62,f62,
			,LDBLK(f0),	STBLK,,,,,,,,
			,bcs,pn %icc, vis0e2)
	DO_THE_TRICK(	f32,f34,f36,f38,f40,f42,f44,f46,f0,f2,f4,f6,f8,f10,f12,f14,
			,f48,f50,f52,f54,f56,f58,f60,f62,f62,
			,LDBLK(f16),	STBLK,,,,,,,,
			,bcc,pt %icc, vis0)
vis0e3:	DO_THE_TRICK(	f0,f2,f4,f6,f8,f10,f12,f14,f16,f18,f20,f22,f24,f26,f28,f30,
			,f48,f50,f52,f54,f56,f58,f60,f62,f32,
			,SYNC,		STBLK,ST(f48,64),ST(f50,8),ST(f52,16),ST(f54,24),ST(f56,32),ST(f58,40),ST(f60,48),
			,add %dst, 56, %dst; add %len, 192 - 8*8, %len; ba,pt %icc, e2)
vis0e1:	DO_THE_TRICK(	f16,f18,f20,f22,f24,f26,f28,f30,f32,f34,f36,f38,f40,f42,f44,f46,
			,f48,f50,f52,f54,f56,f58,f60,f62,f0,
			,SYNC,		STBLK,ST(f48,64),ST(f50,8),ST(f52,16),ST(f54,24),ST(f56,32),ST(f58,40),ST(f60,48),
			,add %dst, 56, %dst; add %len, 192 - 8*8, %len; ba,pt %icc, e3)
vis0e2:	DO_THE_TRICK(	f32,f34,f36,f38,f40,f42,f44,f46,f0,f2,f4,f6,f8,f10,f12,f14,
			,f48,f50,f52,f54,f56,f58,f60,f62,f16,
			,SYNC,		STBLK,ST(f48,64),ST(f50,8),ST(f52,16),ST(f54,24),ST(f56,32),ST(f58,40),ST(f60,48),
			,add %dst, 56, %dst; add %len, 192 - 8*8, %len; ba,pt %icc, e1)
	.align		2048
vis1s:	wr		%g2, ASI_BLK_XOR, %asi	/*  LSU		Group		*/
	add		%src, 128 - 8, %src	/*  IEU0	Group		*/
	ldda		[%src-128] %asi, %f0	/*  Load	Group		*/
	ldda		[%src-64] %asi, %f16	/*  Load	Group		*/
	fmovd		%f0, %f58		/*  FPA		Group		*/
	fmovd		%f48, %f0		/*  FPA		Group		*/
	fcmpgt32	%f32, %f2, %x2		/*  FPM		Group		*/
	faligndata	%f2, %f4, %f48		/*  FPA				*/
	fcmpgt32	%f32, %f4, %x3		/*  FPM		Group		*/
	faligndata	%f4, %f6, %f50		/*  FPA				*/
	fcmpgt32	%f32, %f6, %x4		/*  FPM		Group		*/
	faligndata	%f6, %f8, %f52		/*  FPA				*/
	fcmpgt32	%f32, %f8, %x5		/*  FPM		Group		*/
	inc		%x2			/*  IEU1			*/
	faligndata	%f8, %f10, %f54		/*  FPA				*/
	fcmpgt32	%f32, %f10, %x6		/*  FPM		Group		*/
	srl		%x2, 1, %x2		/*  IEU0			*/
	faligndata	%f10, %f12, %f56	/*  FPA				*/
	fcmpgt32	%f32, %f12, %x7		/*  FPM		Group		*/
	inc		%x3			/*  IEU0			*/
	add		%sum, %x2, %sum		/*  IEU1			*/
	faligndata	%f12, %f14, %f58	/*  FPA				*/
	fcmpgt32	%f32, %f14, %x8		/*  FPM		Group		*/
	srl		%x3, 1, %x3		/*  IEU0			*/
	inc		%x4			/*  IEU1			*/
	fmovd		%f14, %f60		/*  FPA				*/
	srl		%x4, 1, %x4		/*  IEU0	Group		*/
	add		%sum, %x3, %sum		/*  IEU1			*/
vis1:	DO_THE_TRICK(	f0,f2,f4,f6,f8,f10,f12,f14,f16,f18,f20,f22,f24,f26,f28,f30,	
			,f62,f48,f50,f52,f54,f56,f58,f60,f60,
			,LDBLK(f32),	,STBLK,,,,,,,
			,bcs,pn %icc, vis1e1)
	DO_THE_TRICK(	f16,f18,f20,f22,f24,f26,f28,f30,f32,f34,f36,f38,f40,f42,f44,f46,
			,f62,f48,f50,f52,f54,f56,f58,f60,f60,
			,LDBLK(f0),	,STBLK,,,,,,,
			,bcs,pn %icc, vis1e2)
	DO_THE_TRICK(	f32,f34,f36,f38,f40,f42,f44,f46,f0,f2,f4,f6,f8,f10,f12,f14,	
			,f62,f48,f50,f52,f54,f56,f58,f60,f60,
			,LDBLK(f16),	,STBLK,,,,,,,
			,bcc,pt %icc, vis1)
vis1e3:	DO_THE_TRICK(	f0,f2,f4,f6,f8,f10,f12,f14,f16,f18,f20,f22,f24,f26,f28,f30,	
			,f62,f48,f50,f52,f54,f56,f58,f60,f32,
			,SYNC,		,STBLK,ST(f48,0),ST(f50,8),ST(f52,16),ST(f54,24),ST(f56,32),ST(f58,40),
			,add %dst, 48, %dst; add %len, 192 - 7*8, %len; ba,pt %icc, e2)
vis1e1:	DO_THE_TRICK(	f16,f18,f20,f22,f24,f26,f28,f30,f32,f34,f36,f38,f40,f42,f44,f46,
			,f62,f48,f50,f52,f54,f56,f58,f60,f0,
			,SYNC,		,STBLK,ST(f48,0),ST(f50,8),ST(f52,16),ST(f54,24),ST(f56,32),ST(f58,40),
			,add %dst, 48, %dst; add %len, 192 - 7*8, %len; ba,pt %icc, e3)
vis1e2:	DO_THE_TRICK(	f32,f34,f36,f38,f40,f42,f44,f46,f0,f2,f4,f6,f8,f10,f12,f14,	
			,f62,f48,f50,f52,f54,f56,f58,f60,f16,
			,SYNC,		,STBLK,ST(f48,0),ST(f50,8),ST(f52,16),ST(f54,24),ST(f56,32),ST(f58,40),
			,add %dst, 48, %dst; add %len, 192 - 7*8, %len; ba,pt %icc, e1)
	.align		2048
vis2s:	wr		%g2, ASI_BLK_XOR, %asi	/*  LSU		Group		*/
	add		%src, 128 - 16, %src	/*  IEU0	Group		*/
	ldda		[%src-128] %asi, %f0	/*  Load	Group		*/
	ldda		[%src-64] %asi, %f16	/*  Load	Group		*/
	fmovd		%f0, %f56		/*  FPA		Group		*/
	fmovd		%f48, %f0		/*  FPA		Group		*/	
	sub		%dst, 64, %dst		/*  IEU0			*/
	fpsub32		%f2, %f2, %f2		/*  FPA		Group		*/
	fcmpgt32	%f32, %f4, %x3		/*  FPM		Group		*/
	faligndata	%f4, %f6, %f48		/*  FPA				*/
	fcmpgt32	%f32, %f6, %x4		/*  FPM		Group		*/
	faligndata	%f6, %f8, %f50		/*  FPA				*/
	fcmpgt32	%f32, %f8, %x5		/*  FPM		Group		*/
	faligndata	%f8, %f10, %f52		/*  FPA				*/
	fcmpgt32	%f32, %f10, %x6		/*  FPM		Group		*/
	faligndata	%f10, %f12, %f54	/*  FPA				*/
	fcmpgt32	%f32, %f12, %x7		/*  FPM		Group		*/
	inc		%x3			/*  IEU0			*/
	faligndata	%f12, %f14, %f56	/*  FPA				*/
	fcmpgt32	%f32, %f14, %x8		/*  FPM		Group		*/
	srl		%x3, 1, %x3		/*  IEU0			*/
	inc		%x4			/*  IEU1			*/
	fmovd		%f14, %f58		/*  FPA				*/
	srl		%x4, 1, %x4		/*  IEU0	Group		*/
	add		%sum, %x3, %sum		/*  IEU1			*/
vis2:	DO_THE_TRICK(	f0,f2,f4,f6,f8,f10,f12,f14,f16,f18,f20,f22,f24,f26,f28,f30,	
			,f60,f62,f48,f50,f52,f54,f56,f58,f58,
			,LDBLK(f32),	,,STBLK,,,,,,
			,bcs,pn %icc, vis2e1)
	DO_THE_TRICK(	f16,f18,f20,f22,f24,f26,f28,f30,f32,f34,f36,f38,f40,f42,f44,f46,
			,f60,f62,f48,f50,f52,f54,f56,f58,f58,
			,LDBLK(f0),	,,STBLK,,,,,,
			,bcs,pn %icc, vis2e2)
	DO_THE_TRICK(	f32,f34,f36,f38,f40,f42,f44,f46,f0,f2,f4,f6,f8,f10,f12,f14,	
			,f60,f62,f48,f50,f52,f54,f56,f58,f58,
			,LDBLK(f16),	,,STBLK,,,,,,
			,bcc,pt %icc, vis2)
vis2e3:	DO_THE_TRICK(	f0,f2,f4,f6,f8,f10,f12,f14,f16,f18,f20,f22,f24,f26,f28,f30,	
			,f60,f62,f48,f50,f52,f54,f56,f58,f32,
			,SYNC,		,,STBLK,ST(f48,64),ST(f50,72),ST(f52,80),ST(f54,88),ST(f56,96),
			,add %dst, 104, %dst; add %len, 192 - 6*8, %len; ba,pt %icc, e2)
vis2e1:	DO_THE_TRICK(	f16,f18,f20,f22,f24,f26,f28,f30,f32,f34,f36,f38,f40,f42,f44,f46,
			,f60,f62,f48,f50,f52,f54,f56,f58,f0,
			,SYNC,		,,STBLK,ST(f48,64),ST(f50,72),ST(f52,80),ST(f54,88),ST(f56,96),
			,add %dst, 104, %dst; add %len, 192 - 6*8, %len; ba,pt %icc, e3)
vis2e2:	DO_THE_TRICK(	f32,f34,f36,f38,f40,f42,f44,f46,f0,f2,f4,f6,f8,f10,f12,f14,	
			,f60,f62,f48,f50,f52,f54,f56,f58,f16,
			,SYNC,		,,STBLK,ST(f48,64),ST(f50,72),ST(f52,80),ST(f54,88),ST(f56,96),
			,add %dst, 104, %dst; add %len, 192 - 6*8, %len; ba,pt %icc, e1)
	.align		2048
vis3s:	wr		%g2, ASI_BLK_XOR, %asi	/*  LSU		Group		*/
	add		%src, 128 - 24, %src	/*  IEU0	Group		*/
	ldda		[%src-128] %asi, %f0	/*  Load	Group		*/
	ldda		[%src-64] %asi, %f16	/*  Load	Group		*/
	fmovd		%f0, %f54		/*  FPA		Group		*/
	fmovd		%f48, %f0		/*  FPA		Group		*/
	sub		%dst, 64, %dst		/*  IEU0			*/
	fpsub32		%f2, %f2, %f2		/*  FPA		Group		*/
	fpsub32		%f4, %f4, %f4		/*  FPA		Group		*/
	fcmpgt32	%f32, %f6, %x4		/*  FPM		Group		*/
	faligndata	%f6, %f8, %f48		/*  FPA				*/
	fcmpgt32	%f32, %f8, %x5		/*  FPM		Group		*/
	faligndata	%f8, %f10, %f50		/*  FPA				*/
	fcmpgt32	%f32, %f10, %x6		/*  FPM		Group		*/
	faligndata	%f10, %f12, %f52	/*  FPA				*/
	fcmpgt32	%f32, %f12, %x7		/*  FPM		Group		*/
	faligndata	%f12, %f14, %f54	/*  FPA				*/
	fcmpgt32	%f32, %f14, %x8		/*  FPM		Group		*/
	fmovd		%f14, %f56		/*  FPA				*/
	inc		%x4			/*  IEU0			*/
	srl		%x4, 1, %x4		/*  IEU0	Group		*/
vis3:	DO_THE_TRICK(	f0,f2,f4,f6,f8,f10,f12,f14,f16,f18,f20,f22,f24,f26,f28,f30,	
			,f58,f60,f62,f48,f50,f52,f54,f56,f56,
			,LDBLK(f32),	,,,STBLK,,,,,
			,bcs,pn %icc, vis3e1)
	DO_THE_TRICK(	f16,f18,f20,f22,f24,f26,f28,f30,f32,f34,f36,f38,f40,f42,f44,f46,
			,f58,f60,f62,f48,f50,f52,f54,f56,f56,
			,LDBLK(f0),	,,,STBLK,,,,,
			,bcs,pn %icc, vis3e2)
	DO_THE_TRICK(	f32,f34,f36,f38,f40,f42,f44,f46,f0,f2,f4,f6,f8,f10,f12,f14,	
			,f58,f60,f62,f48,f50,f52,f54,f56,f56,
			,LDBLK(f16),	,,,STBLK,,,,,
			,bcc,pt %icc, vis3)
vis3e3:	DO_THE_TRICK(	f0,f2,f4,f6,f8,f10,f12,f14,f16,f18,f20,f22,f24,f26,f28,f30,	
			,f58,f60,f62,f48,f50,f52,f54,f56,f32,
			,SYNC,		,,,STBLK,ST(f48,64),ST(f50,72),ST(f52,80),ST(f54,88),
			,add %dst, 96, %dst; add %len, 192 - 5*8, %len; ba,pt %icc, e2)
vis3e1:	DO_THE_TRICK(	f16,f18,f20,f22,f24,f26,f28,f30,f32,f34,f36,f38,f40,f42,f44,f46,
			,f58,f60,f62,f48,f50,f52,f54,f56,f0,
			,SYNC,		,,,STBLK,ST(f48,64),ST(f50,72),ST(f52,80),ST(f54,88),
			,add %dst, 96, %dst; add %len, 192 - 5*8, %len; ba,pt %icc, e3)
vis3e2:	DO_THE_TRICK(	f32,f34,f36,f38,f40,f42,f44,f46,f0,f2,f4,f6,f8,f10,f12,f14,	
			,f58,f60,f62,f48,f50,f52,f54,f56,f16,
			,SYNC,		,,,STBLK,ST(f48,64),ST(f50,72),ST(f52,80),ST(f54,88),
			,add %dst, 96, %dst; add %len, 192 - 5*8, %len; ba,pt %icc, e1)
	.align		2048
vis4s:	wr		%g2, ASI_BLK_XOR, %asi	/*  LSU		Group		*/
	add		%src, 128 - 32, %src	/*  IEU0	Group		*/
	ldda		[%src-128] %asi, %f0	/*  Load	Group		*/
	ldda		[%src-64] %asi, %f16	/*  Load	Group		*/
	fmovd		%f0, %f52		/*  FPA		Group		*/
	fmovd		%f48, %f0		/*  FPA		Group		*/
	sub		%dst, 64, %dst		/*  IEU0			*/
	fpsub32		%f2, %f2, %f2		/*  FPA		Group		*/
	fpsub32		%f4, %f4, %f4		/*  FPA		Group		*/
	fpsub32		%f6, %f6, %f6		/*  FPA		Group		*/
	clr		%x4			/*  IEU0			*/
	fcmpgt32	%f32, %f8, %x5		/*  FPM		Group		*/
	faligndata	%f8, %f10, %f48		/*  FPA				*/
	fcmpgt32	%f32, %f10, %x6		/*  FPM		Group		*/
	faligndata	%f10, %f12, %f50	/*  FPA				*/
	fcmpgt32	%f32, %f12, %x7		/*  FPM		Group		*/
	faligndata	%f12, %f14, %f52	/*  FPA				*/
	fcmpgt32	%f32, %f14, %x8		/*  FPM		Group		*/
	fmovd		%f14, %f54		/*  FPA				*/
vis4:	DO_THE_TRICK(	f0,f2,f4,f6,f8,f10,f12,f14,f16,f18,f20,f22,f24,f26,f28,f30,	
			,f56,f58,f60,f62,f48,f50,f52,f54,f54,
			,LDBLK(f32),	,,,,STBLK,,,,
			,bcs,pn %icc, vis4e1)
	DO_THE_TRICK(	f16,f18,f20,f22,f24,f26,f28,f30,f32,f34,f36,f38,f40,f42,f44,f46,
			,f56,f58,f60,f62,f48,f50,f52,f54,f54,
			,LDBLK(f0),	,,,,STBLK,,,,
			,bcs,pn %icc, vis4e2)
	DO_THE_TRICK(	f32,f34,f36,f38,f40,f42,f44,f46,f0,f2,f4,f6,f8,f10,f12,f14,	
			,f56,f58,f60,f62,f48,f50,f52,f54,f54,
			,LDBLK(f16),	,,,,STBLK,,,,
			,bcc,pt %icc, vis4)
vis4e3:	DO_THE_TRICK(	f0,f2,f4,f6,f8,f10,f12,f14,f16,f18,f20,f22,f24,f26,f28,f30,	
			,f56,f58,f60,f62,f48,f50,f52,f54,f32,
			,SYNC,		,,,,STBLK,ST(f48,64),ST(f50,72),ST(f52,80),
			,add %dst, 88, %dst; add %len, 192 - 4*8, %len; ba,pt %icc, e2)
vis4e1:	DO_THE_TRICK(	f16,f18,f20,f22,f24,f26,f28,f30,f32,f34,f36,f38,f40,f42,f44,f46,
			,f56,f58,f60,f62,f48,f50,f52,f54,f0,
			,SYNC,		,,,,STBLK,ST(f48,64),ST(f50,72),ST(f52,80),
			,add %dst, 88, %dst; add %len, 192 - 4*8, %len; ba,pt %icc, e3)
vis4e2:	DO_THE_TRICK(	f32,f34,f36,f38,f40,f42,f44,f46,f0,f2,f4,f6,f8,f10,f12,f14,	
			,f56,f58,f60,f62,f48,f50,f52,f54,f16,
			,SYNC,		,,,,STBLK,ST(f48,64),ST(f50,72),ST(f52,80),
			,add %dst, 88, %dst; add %len, 192 - 4*8, %len; ba,pt %icc, e1)
	.align		2048
vis5s:	add		%src, 128 - 40, %src	/*  IEU0	Group		*/
	ldda		[%src-88] %asi, %f10	/*  Load	Group		*/
	ldda		[%src-80] %asi, %f12	/*  Load	Group		*/
	ldda		[%src-72] %asi, %f14	/*  Load	Group		*/
	wr		%g2, ASI_BLK_XOR, %asi	/*  LSU		Group		*/
	ldda		[%src-64] %asi, %f16	/*  Load	Group		*/
	fmovd		%f48, %f0		/*  FPA		Group		*/
	fmuld		%f32, %f32, %f2		/*  FPM				*/
	clr		%x4			/*  IEU0			*/
	faddd		%f32, %f32, %f4		/*  FPA		Group		*/
	fmuld		%f32, %f32, %f6		/*  FPM				*/
	clr		%x5			/*  IEU0			*/
	faddd		%f32, %f32, %f8		/*  FPA		Group		*/
	fcmpgt32	%f32, %f10, %x6		/*  FPM		Group		*/
	sub		%dst, 64, %dst		/*  IEU0			*/
	faligndata	%f10, %f12, %f48	/*  FPA				*/
	fcmpgt32	%f32, %f12, %x7		/*  FPM		Group		*/
	faligndata	%f12, %f14, %f50	/*  FPA				*/
	fcmpgt32	%f32, %f14, %x8		/*  FPM		Group		*/
	fmovd		%f14, %f52		/*  FPA				*/
vis5:	DO_THE_TRICK(	f0,f2,f4,f6,f8,f10,f12,f14,f16,f18,f20,f22,f24,f26,f28,f30,	
			,f54,f56,f58,f60,f62,f48,f50,f52,f52,
			,LDBLK(f32),	,,,,,STBLK,,,
			,bcs,pn %icc, vis5e1)
	DO_THE_TRICK(	f16,f18,f20,f22,f24,f26,f28,f30,f32,f34,f36,f38,f40,f42,f44,f46,
			,f54,f56,f58,f60,f62,f48,f50,f52,f52,
			,LDBLK(f0),	,,,,,STBLK,,,
			,bcs,pn %icc, vis5e2)
	DO_THE_TRICK(	f32,f34,f36,f38,f40,f42,f44,f46,f0,f2,f4,f6,f8,f10,f12,f14,	
			,f54,f56,f58,f60,f62,f48,f50,f52,f52,
			,LDBLK(f16),	,,,,,STBLK,,,
			,bcc,pt %icc, vis5)
vis5e3:	DO_THE_TRICK(	f0,f2,f4,f6,f8,f10,f12,f14,f16,f18,f20,f22,f24,f26,f28,f30,	
			,f54,f56,f58,f60,f62,f48,f50,f52,f32,
			,SYNC,		,,,,,STBLK,ST(f48,64),ST(f50,72),
			,add %dst, 80, %dst; add %len, 192 - 3*8, %len; ba,pt %icc, e2)
vis5e1:	DO_THE_TRICK(	f16,f18,f20,f22,f24,f26,f28,f30,f32,f34,f36,f38,f40,f42,f44,f46,
			,f54,f56,f58,f60,f62,f48,f50,f52,f0,
			,SYNC,		,,,,,STBLK,ST(f48,64),ST(f50,72),
			,add %dst, 80, %dst; add %len, 192 - 3*8, %len; ba,pt %icc, e3)
vis5e2:	DO_THE_TRICK(	f32,f34,f36,f38,f40,f42,f44,f46,f0,f2,f4,f6,f8,f10,f12,f14,	
			,f54,f56,f58,f60,f62,f48,f50,f52,f16,
			,SYNC,		,,,,,STBLK,ST(f48,64),ST(f50,72),
			,add %dst, 80, %dst; add %len, 192 - 3*8, %len; ba,pt %icc, e1)
	.align		2048
vis6s:	add		%src, 128 - 48, %src	/*  IEU0	Group		*/
	ldda		[%src-80] %asi, %f12	/*  Load	Group		*/
	ldda		[%src-72] %asi, %f14	/*  Load	Group		*/
	wr		%g2, ASI_BLK_XOR, %asi	/*  LSU		Group		*/
	ldda		[%src-64] %asi, %f16	/*  Load	Group		*/
	fmovd		%f48, %f0		/*  FPA		Group		*/
	fmuld		%f32, %f32, %f2		/*  FPM				*/
	clr		%x4			/*  IEU0			*/
	faddd		%f32, %f32, %f4		/*  FPA		Group		*/
	fmuld		%f32, %f32, %f6		/*  FPM				*/
	clr		%x5			/*  IEU0			*/
	faddd		%f32, %f32, %f8		/*  FPA		Group		*/
	fmuld		%f32, %f32, %f10	/*  FPM				*/
	clr		%x6			/*  IEU0			*/
	fcmpgt32	%f32, %f12, %x7		/*  FPM		Group		*/
	sub		%dst, 64, %dst		/*  IEU0			*/
	fcmpgt32	%f32, %f14, %x8		/*  FPM		Group		*/
	faligndata	%f12, %f14, %f48	/*  FPA				*/
	fmovd		%f14, %f50		/*  FPA		Group		*/
vis6:	DO_THE_TRICK(	f0,f2,f4,f6,f8,f10,f12,f14,f16,f18,f20,f22,f24,f26,f28,f30,	
			,f52,f54,f56,f58,f60,f62,f48,f50,f50,
			,LDBLK(f32),	,,,,,,STBLK,,
			,bcs,pn %icc, vis6e1)
	DO_THE_TRICK(	f16,f18,f20,f22,f24,f26,f28,f30,f32,f34,f36,f38,f40,f42,f44,f46,
			,f52,f54,f56,f58,f60,f62,f48,f50,f50,
			,LDBLK(f0),	,,,,,,STBLK,,
			,bcs,pn %icc, vis6e2)
	DO_THE_TRICK(	f32,f34,f36,f38,f40,f42,f44,f46,f0,f2,f4,f6,f8,f10,f12,f14,	
			,f52,f54,f56,f58,f60,f62,f48,f50,f50,
			,LDBLK(f16),	,,,,,,STBLK,,
			,bcc,pt %icc, vis6)
vis6e3:	DO_THE_TRICK(	f0,f2,f4,f6,f8,f10,f12,f14,f16,f18,f20,f22,f24,f26,f28,f30,	
			,f52,f54,f56,f58,f60,f62,f48,f50,f32,
			,SYNC,		,,,,,,STBLK,ST(f48,64),
			,add %dst, 72, %dst; add %len, 192 - 2*8, %len; ba,pt %icc, e2)
vis6e1:	DO_THE_TRICK(	f16,f18,f20,f22,f24,f26,f28,f30,f32,f34,f36,f38,f40,f42,f44,f46,
			,f52,f54,f56,f58,f60,f62,f48,f50,f0,
			,SYNC,		,,,,,,STBLK,ST(f48,64),
			,add %dst, 72, %dst; add %len, 192 - 2*8, %len; ba,pt %icc, e3)
vis6e2:	DO_THE_TRICK(	f32,f34,f36,f38,f40,f42,f44,f46,f0,f2,f4,f6,f8,f10,f12,f14,	
			,f52,f54,f56,f58,f60,f62,f48,f50,f16,
			,SYNC,		,,,,,,STBLK,ST(f48,64),
			,add %dst, 72, %dst; add %len, 192 - 2*8, %len; ba,pt %icc, e1)
	.align		2048
vis7s:	add		%src, 128 - 56, %src	/*  IEU0	Group		*/
	ldda		[%src-72] %asi, %f14	/*  Load	Group		*/
	wr		%g2, ASI_BLK_XOR, %asi	/*  LSU		Group		*/
	ldda		[%src-64] %asi, %f16	/*  Load	Group		*/
	fmovd		%f48, %f0		/*  FPA		Group		*/
	fmuld		%f32, %f32, %f2		/*  FPM				*/
	clr		%x4			/*  IEU0			*/
	faddd		%f32, %f32, %f4		/*  FPA		Group		*/
	fmuld		%f32, %f32, %f6		/*  FPM				*/
	clr		%x5			/*  IEU0			*/
	faddd		%f32, %f32, %f8		/*  FPA		Group		*/
	fmuld		%f32, %f32, %f10	/*  FPM				*/
	clr		%x6			/*  IEU0			*/
	faddd		%f32, %f32, %f12	/*  FPA		Group		*/
	clr		%x7			/*  IEU0			*/
	fcmpgt32	%f32, %f14, %x8		/*  FPM		Group		*/
	sub		%dst, 64, %dst		/*  IEU0			*/
	fmovd		%f14, %f48		/*  FPA				*/
vis7:	DO_THE_TRICK(	f0,f2,f4,f6,f8,f10,f12,f14,f16,f18,f20,f22,f24,f26,f28,f30,	
			,f50,f52,f54,f56,f58,f60,f62,f48,f48,
			,LDBLK(f32),	,,,,,,,STBLK,
			,bcs,pn %icc, vis7e1)
	DO_THE_TRICK(	f16,f18,f20,f22,f24,f26,f28,f30,f32,f34,f36,f38,f40,f42,f44,f46,
			,f50,f52,f54,f56,f58,f60,f62,f48,f48,
			,LDBLK(f0),	,,,,,,,STBLK,
			,bcs,pn %icc, vis7e2)
	DO_THE_TRICK(	f32,f34,f36,f38,f40,f42,f44,f46,f0,f2,f4,f6,f8,f10,f12,f14,	
			,f50,f52,f54,f56,f58,f60,f62,f48,f48,
			,LDBLK(f16),	,,,,,,,STBLK,
			,bcc,pt %icc, vis7)
vis7e3:	DO_THE_TRICK(	f0,f2,f4,f6,f8,f10,f12,f14,f16,f18,f20,f22,f24,f26,f28,f30,	
			,f50,f52,f54,f56,f58,f60,f62,f48,f32,
			,SYNC,		,,,,,,,STBLK,
			,add %dst, 64, %dst; add %len, 192 - 1*8, %len; ba,pt %icc, e2)
vis7e1:	DO_THE_TRICK(	f16,f18,f20,f22,f24,f26,f28,f30,f32,f34,f36,f38,f40,f42,f44,f46,
			,f50,f52,f54,f56,f58,f60,f62,f48,f0,
			,SYNC,		,,,,,,,STBLK,
			,add %dst, 64, %dst; add %len, 192 - 1*8, %len; ba,pt %icc, e3)
vis7e2:	DO_THE_TRICK(	f32,f34,f36,f38,f40,f42,f44,f46,f0,f2,f4,f6,f8,f10,f12,f14,	
			,f50,f52,f54,f56,f58,f60,f62,f48,f16,
			,SYNC,		,,,,,,,STBLK,
			,add %dst, 64, %dst; add %len, 192 - 1*8, %len; ba,pt %icc, e1)
e1:	END_THE_TRICK1(	f0,f2,f4,f6,f8,f10,f12,f14,f16,f6)
e2:	END_THE_TRICK1(	f16,f18,f20,f22,f24,f26,f28,f30,f32,f6)
e3:	END_THE_TRICK1(	f32,f34,f36,f38,f40,f42,f44,f46,f0,f6)
ett:	rd		%asi, %x4		/*  LSU		Group+4bubbles	*/
	rd		%gsr, %x3		/*  LSU		Group+4bubbles	*/
#ifdef __KERNEL__
	srl		%x4, 3, %x5		/*  IEU0	Group		*/
	xor		%x4, ASI_BLK_XOR1, %x4	/*  IEU1			*/
	wr		%x4, %x5, %asi		/*  LSU		Group+4bubbles	*/
#else
	wr		%x4, ASI_BLK_XOR, %asi	/*  LSU		Group+4bubbles	*/
#endif
	andcc		%x3, 7, %x3		/*  IEU1	Group		*/
	add		%dst, 8, %dst		/*  IEU0			*/
	bne,pn		%icc, 1f		/*  CTI				*/
	 fzero		%f10			/*  FPA				*/
	brz,a,pn	%len, 2f		/*  CTI+IEU1	Group		*/
	 std		%f6, [%dst - 8]		/*  Store			*/
1:	cmp		%len, 8			/*  IEU1			*/
	blu,pn		%icc, 3f		/*  CTI				*/
	 sub		%src, 64, %src		/*  IEU0	Group		*/
1:	ldda		[%src] %asi, %f2	/*  Load	Group		*/
	fpadd32		%f10, %f2, %f12		/*  FPA		Group+load stall*/
	add		%src, 8, %src		/*  IEU0			*/
	add		%dst, 8, %dst		/*  IEU1			*/
	faligndata	%f6, %f2, %f14		/*  FPA		Group		*/
	fcmpgt32	%f10, %f12, %x5		/*  FPM		Group		*/
	std		%f14, [%dst - 16]	/*  Store			*/
	fmovd		%f2, %f6		/*  FPA				*/
	fmovd		%f12, %f10		/*  FPA		Group		*/
	sub		%len, 8, %len		/*  IEU1			*/
	fzero		%f16			/*  FPA		Group - FPU nop	*/
	fzero		%f18			/*  FPA		Group - FPU nop	*/
	inc		%x5			/*  IEU0			*/
	srl		%x5, 1, %x5		/*  IEU0	Group (regdep)	*/
	cmp		%len, 8			/*  IEU1			*/
	bgeu,pt		%icc, 1b		/*  CTI				*/
	 add		%x5, %sum, %sum		/*  IEU0	Group		*/
3:	brz,a,pt	%x3, 2f			/*  CTI+IEU1			*/
	 std		%f6, [%dst - 8]		/*  Store	Group		*/
	st		%f7, [%dst - 8]		/*  Store	Group		*/
	sub		%dst, 4, %dst		/*  IEU0			*/
	add		%len, 4, %len		/*  IEU1			*/
2:
#ifdef __KERNEL__
	sub		%sp, 8, %sp		/*  IEU0	Group		*/
#endif
	END_THE_TRICK2(	f48,f50,f52,f54,f56,f58,f60,f10,f12,f62)
	membar		#Sync			/*  LSU		Group		*/
#ifdef __KERNEL__
	VISExit
	add		%sp, 8, %sp		/*  IEU0	Group		*/
#endif
23:	brnz,pn		%len, 26f		/*  CTI+IEU1	Group		*/
24:	 sllx		%sum, 32, %g1		/*  IEU0			*/
25:	addcc		%sum, %g1, %src		/*  IEU1	Group		*/
	srlx		%src, 32, %src		/*  IEU0	Group (regdep)	*/
	bcs,a,pn	%xcc, 1f		/*  CTI				*/
	 add		%src, 1, %src		/*  IEU1			*/
#ifndef __KERNEL__
1:	retl					/*  CTI		Group brk forced*/
	 srl		%src, 0, %src		/*  IEU0			*/
#else
1:	sethi		%uhi(PAGE_OFFSET), %g4	/*  IEU0	Group		*/
	retl					/*  CTI		Group brk forced*/
	 sllx		%g4, 32, %g4		/*  IEU0			*/
#endif
26:	andcc		%len, 8, %g0		/*  IEU1	Group		*/
	be,pn		%icc, 1f		/*  CTI				*/
	 lduwa		[%src] %asi, %o4	/*  Load			*/
	lduwa		[%src+4] %asi, %g2	/*  Load	Group		*/
	add		%src, 8, %src		/*  IEU0			*/
	add		%dst, 8, %dst		/*  IEU1			*/
	sllx		%o4, 32, %g5		/*  IEU0	Group		*/
	stw		%o4, [%dst - 8]		/*  Store			*/
	or		%g5, %g2, %g5		/*  IEU0	Group		*/
	stw		%g2, [%dst - 4]		/*  Store			*/
	addcc		%g5, %sum, %sum		/*  IEU1	Group		*/
	bcs,a,pn	%xcc, 1f		/*  CTI				*/
	 add		%sum, 1, %sum		/*  IEU0			*/
1:	andcc		%len, 4, %g0		/*  IEU1	Group		*/
	be,a,pn		%icc, 1f		/*  CTI				*/
	 clr		%g2			/*  IEU0			*/
	lduwa		[%src] %asi, %g7	/*  Load			*/
	add		%src, 4, %src		/*  IEU0	Group		*/
	add		%dst, 4, %dst		/*  IEU1			*/
	sllx		%g7, 32, %g2		/*  IEU0	Group		*/
	stw		%g7, [%dst - 4]		/*  Store			*/
1:	andcc		%len, 2, %g0		/*  IEU1			*/
	be,a,pn		%icc, 1f		/*  CTI				*/
	 clr		%g3			/*  IEU0	Group		*/
	lduha		[%src] %asi, %g7	/*  Load			*/
	add		%src, 2, %src		/*  IEU1			*/
	add		%dst, 2, %dst		/*  IEU0	Group		*/
	sll		%g7, 16, %g3		/*  IEU0	Group		*/
	sth		%g7, [%dst - 2]		/*  Store			*/
1:	andcc		%len, 1, %g0		/*  IEU1			*/
	be,a,pn		%icc, 1f		/*  CTI				*/
	 clr		%o5			/*  IEU0	Group		*/
	lduba		[%src] %asi, %g7	/*  Load			*/
	sll		%g7, 8, %o5		/*  IEU0	Group		*/
	stb		%g7, [%dst]		/*  Store			*/
1:	or		%g2, %g3, %g3		/*  IEU1			*/
	or		%o5, %g3, %g3		/*  IEU0	Group (regdep)	*/
	addcc		%g3, %sum, %sum		/*  IEU1	Group (regdep)	*/
	bcs,a,pn	%xcc, 1f		/*  CTI				*/
	 add		%sum, 1, %sum		/*  IEU0			*/
1:	ba,pt		%xcc, 25b		/*  CTI		Group		*/
	 sllx		%sum, 32, %g1		/*  IEU0			*/

#ifdef __KERNEL__
end:

	.section	__ex_table
	.align		4
	.word		csum_partial_copy_vis, 0, end, cpc_handler
#endif
#define __ver_probe_uart401	smp_63d781ea
#define probe_uart401	_set_ver(probe_uart401)
#define __ver_unload_uart401	smp_ecfdd9c9
#define unload_uart401	_set_ver(unload_uart401)
#define __ver_uart401intr	smp_6391d066
#define uart401intr	_set_ver(uart401intr)
/* $Id: VISsave.S,v 1.5 2001/03/08 22:08:51 davem Exp $
 * VISsave.S: Code for saving FPU register state for
 *            VIS routines. One should not call this directly,
 *            but use macros provided in <asm/visasm.h>.
 *
 * Copyright (C) 1998 Jakub Jelinek (jj@ultra.linux.cz)
 */

#include <asm/asi.h>
#include <asm/page.h>
#include <asm/ptrace.h>
#include <asm/visasm.h>

	.text
	.globl		VISenter, VISenterhalf

	/* On entry: %o5=current FPRS value, %g7 is callers address */
	/* May clobber %o5, %g1, %g2, %g3, %g7, %icc, %xcc */

	.align		32
VISenter:
	ldub		[%g6 + AOFF_task_thread + AOFF_thread_fpdepth], %g1
	brnz,a,pn	%g1, 1f
	 cmp		%g1, 1
	stb		%g0, [%g6 + AOFF_task_thread + AOFF_thread_fpsaved]
	stx		%fsr, [%g6 + AOFF_task_thread + AOFF_thread_xfsr]
9:	jmpl		%g7 + %g0, %g0
	 nop
1:	bne,pn		%icc, 2f

	 srl		%g1, 1, %g1
vis1:	ldub		[%g6 + AOFF_task_thread + AOFF_thread_fpsaved], %g3
	stx		%fsr, [%g6 + AOFF_task_thread + AOFF_thread_xfsr]
	or		%g3, %o5, %g3
	stb		%g3, [%g6 + AOFF_task_thread + AOFF_thread_fpsaved]
	rd		%gsr, %g3
	clr		%g1
	ba,pt		%xcc, 3f

	 stx		%g3, [%g6 + AOFF_task_thread + AOFF_thread_gsr]
2:	add		%g6, %g1, %g3
	cmp		%o5, FPRS_DU
	be,pn		%icc, 6f
	 sll		%g1, 3, %g1
	stb		%o5, [%g3 + AOFF_task_thread + AOFF_thread_fpsaved]
	rd		%gsr, %g2
	add		%g6, %g1, %g3
	stx		%g2, [%g3 + AOFF_task_thread + AOFF_thread_gsr]

	add		%g6, %g1, %g2
	stx		%fsr, [%g2 + AOFF_task_thread + AOFF_thread_xfsr]
	sll		%g1, 5, %g1
3:	andcc		%o5, FPRS_DL|FPRS_DU, %g0
	be,pn		%icc, 9b
	 add		%g6, AOFF_task_fpregs, %g2
	andcc		%o5, FPRS_DL, %g0
	membar		#StoreStore | #LoadStore

	be,pn		%icc, 4f
	 add		%g6, AOFF_task_fpregs+0x40, %g3
	stda		%f0, [%g2 + %g1] ASI_BLK_P
	stda		%f16, [%g3 + %g1] ASI_BLK_P
	andcc		%o5, FPRS_DU, %g0
	be,pn		%icc, 5f
4:	 add		%g1, 128, %g1
	stda		%f32, [%g2 + %g1] ASI_BLK_P

	stda		%f48, [%g3 + %g1] ASI_BLK_P
5:	membar		#Sync
	jmpl		%g7 + %g0, %g0
	 nop

6:	ldub		[%g3 + AOFF_task_thread + AOFF_thread_fpsaved], %o5
	or		%o5, FPRS_DU, %o5
	add		%g6, AOFF_task_fpregs+0x80, %g2
	stb		%o5, [%g3 + AOFF_task_thread + AOFF_thread_fpsaved]

	sll		%g1, 5, %g1
	add		%g6, AOFF_task_fpregs+0xc0, %g3
	wr		%g0, FPRS_FEF, %fprs
	membar		#StoreStore | #LoadStore
	stda		%f32, [%g2 + %g1] ASI_BLK_P
	stda		%f48, [%g3 + %g1] ASI_BLK_P
	membar		#Sync
	jmpl		%g7 + %g0, %g0

	 nop

	.align		32
VISenterhalf:
	ldub		[%g6 + AOFF_task_thread + AOFF_thread_fpdepth], %g1
	brnz,a,pn	%g1, 1f
	 cmp		%g1, 1
	stb		%g0, [%g6 + AOFF_task_thread + AOFF_thread_fpsaved]
	stx		%fsr, [%g6 + AOFF_task_thread + AOFF_thread_xfsr]
	clr		%o5
	jmpl		%g7 + %g0, %g0
	 wr		%g0, FPRS_FEF, %fprs

1:	bne,pn		%icc, 2f
	 srl		%g1, 1, %g1
	ba,pt		%xcc, vis1
	 sub		%g7, 8, %g7
2:	addcc		%g6, %g1, %g3
	sll		%g1, 3, %g1
	andn		%o5, FPRS_DU, %g2
	stb		%g2, [%g3 + AOFF_task_thread + AOFF_thread_fpsaved]

	rd		%gsr, %g2
	add		%g6, %g1, %g3
	stx		%g2, [%g3 + AOFF_task_thread + AOFF_thread_gsr]
	add		%g6, %g1, %g2
	stx		%fsr, [%g2 + AOFF_task_thread + AOFF_thread_xfsr]
	sll		%g1, 5, %g1
3:	andcc		%o5, FPRS_DL, %g0
	be,pn		%icc, 4f
	 add		%g6, AOFF_task_fpregs, %g2

	membar		#StoreStore | #LoadStore
	add		%g6, AOFF_task_fpregs+0x40, %g3
	stda		%f0, [%g2 + %g1] ASI_BLK_P
	stda		%f16, [%g3 + %g1] ASI_BLK_P
	membar		#Sync
4:	and		%o5, FPRS_DU, %o5
	jmpl		%g7 + %g0, %g0
	 wr		%o5, FPRS_FEF, %fprs
/* $Id: debuglocks.c,v 1.9 2001/11/17 00:10:48 davem Exp $
 * debuglocks.c: Debugging versions of SMP locking primitives.
 *
 * Copyright (C) 1998 David S. Miller (davem@redhat.com)
 */

#include <linux/config.h>
#include <linux/kernel.h>
#include <linux/sched.h>
#include <linux/spinlock.h>
#include <asm/system.h>

#if defined(CONFIG_SMP) && defined(CONFIG_DEBUG_SPINLOCK)

#define GET_CALLER(PC) __asm__ __volatile__("mov %%i7, %0" : "=r" (PC))

static inline void show (char *str, spinlock_t *lock, unsigned long caller)
{
	int cpu = smp_processor_id();

	printk("%s(%p) CPU#%d stuck at %08x, owner PC(%08x):CPU(%x)\n",
	       str, lock, cpu, (unsigned int) caller,
	       lock->owner_pc, lock->owner_cpu);
}

static inline void show_read (char *str, rwlock_t *lock, unsigned long caller)
{
	int cpu = smp_processor_id();

	printk("%s(%p) CPU#%d stuck at %08x, writer PC(%08x):CPU(%x)\n",
	       str, lock, cpu, (unsigned int) caller,
	       lock->writer_pc, lock->writer_cpu);
}

static inline void show_write (char *str, rwlock_t *lock, unsigned long caller)
{
	int cpu = smp_processor_id();

	printk("%s(%p) CPU#%d stuck at %08x\n",
	       str, lock, cpu, (unsigned int) caller);
	printk("Writer: PC(%08x):CPU(%x)\n",
	       lock->writer_pc, lock->writer_cpu);
	printk("Readers: 0[%08x] 1[%08x] 2[%08x] 4[%08x]\n",
	       lock->reader_pc[0], lock->reader_pc[1],
	       lock->reader_pc[2], lock->reader_pc[3]);
}

#undef INIT_STUCK
#define INIT_STUCK 100000000

void _do_spin_lock(spinlock_t *lock, char *str)
{
	unsigned long caller, val;
	int stuck = INIT_STUCK;
	int cpu = smp_processor_id();
	int shown = 0;

	GET_CALLER(caller);
again:
	__asm__ __volatile__("ldstub [%1], %0"
			     : "=r" (val)
			     : "r" (&(lock->lock))
			     : "memory");
	membar("#StoreLoad | #StoreStore");
	if (val) {
		while (lock->lock) {
			if (!--stuck) {
				if (shown++ <= 2)
					show(str, lock, caller);
				stuck = INIT_STUCK;
			}
			membar("#LoadLoad");
		}
		goto again;
	}
	lock->owner_pc = ((unsigned int)caller);
	lock->owner_cpu = cpu;
	current->thread.smp_lock_count++;
	current->thread.smp_lock_pc = ((unsigned int)caller);
}

int _spin_trylock(spinlock_t *lock)
{
	unsigned long val, caller;
	int cpu = smp_processor_id();

	GET_CALLER(caller);
	__asm__ __volatile__("ldstub [%1], %0"
			     : "=r" (val)
			     : "r" (&(lock->lock))
			     : "memory");
	membar("#StoreLoad | #StoreStore");
	if (!val) {
		lock->owner_pc = ((unsigned int)caller);
		lock->owner_cpu = cpu;
		current->thread.smp_lock_count++;
		current->thread.smp_lock_pc = ((unsigned int)caller);
	}
	return val == 0;
}

void _do_spin_unlock(spinlock_t *lock)
{
	lock->owner_pc = 0;
	lock->owner_cpu = NO_PROC_ID;
	membar("#StoreStore | #LoadStore");
	lock->lock = 0;
	current->thread.smp_lock_count--;
}

/* Keep INIT_STUCK the same... */

void _do_read_lock (rwlock_t *rw, char *str)
{
	unsigned long caller, val;
	int stuck = INIT_STUCK;
	int cpu = smp_processor_id();
	int shown = 0;

	GET_CALLER(caller);
wlock_again:
	/* Wait for any writer to go away.  */
	while (((long)(rw->lock)) < 0) {
		if (!--stuck) {
			if (shown++ <= 2)
				show_read(str, rw, caller);
			stuck = INIT_STUCK;
		}
		membar("#LoadLoad");
	}
	/* Try once to increment the counter.  */
	__asm__ __volatile__(
"	ldx		[%0], %%g5\n"
"	brlz,a,pn	%%g5, 2f\n"
"	 mov		1, %0\n"
"	add		%%g5, 1, %%g7\n"
"	casx		[%0], %%g5, %%g7\n"
"	sub		%%g5, %%g7, %0\n"
"2:"	: "=r" (val)
	: "0" (&(rw->lock))
	: "g5", "g7", "memory");
	membar("#StoreLoad | #StoreStore");
	if (val)
		goto wlock_again;
	rw->reader_pc[cpu] = ((unsigned int)caller);
	current->thread.smp_lock_count++;
	current->thread.smp_lock_pc = ((unsigned int)caller);
}

void _do_read_unlock (rwlock_t *rw, char *str)
{
	unsigned long caller, val;
	int stuck = INIT_STUCK;
	int cpu = smp_processor_id();
	int shown = 0;

	GET_CALLER(caller);

	/* Drop our identity _first_. */
	rw->reader_pc[cpu] = 0;
	current->thread.smp_lock_count--;
runlock_again:
	/* Spin trying to decrement the counter using casx.  */
	__asm__ __volatile__(
"	ldx	[%0], %%g5\n"
"	sub	%%g5, 1, %%g7\n"
"	casx	[%0], %%g5, %%g7\n"
"	membar	#StoreLoad | #StoreStore\n"
"	sub	%%g5, %%g7, %0\n"
	: "=r" (val)
	: "0" (&(rw->lock))
	: "g5", "g7", "memory");
	if (val) {
		if (!--stuck) {
			if (shown++ <= 2)
				show_read(str, rw, caller);
			stuck = INIT_STUCK;
		}
		goto runlock_again;
	}
}

void _do_write_lock (rwlock_t *rw, char *str)
{
	unsigned long caller, val;
	int stuck = INIT_STUCK;
	int cpu = smp_processor_id();
	int shown = 0;

	GET_CALLER(caller);
wlock_again:
	/* Spin while there is another writer. */
	while (((long)rw->lock) < 0) {
		if (!--stuck) {
			if (shown++ <= 2)
				show_write(str, rw, caller);
			stuck = INIT_STUCK;
		}
		membar("#LoadLoad");
	}

	/* Try to acuire the write bit.  */
	__asm__ __volatile__(
"	mov	1, %%g3\n"
"	sllx	%%g3, 63, %%g3\n"
"	ldx	[%0], %%g5\n"
"	brlz,pn	%%g5, 1f\n"
"	 or	%%g5, %%g3, %%g7\n"
"	casx	[%0], %%g5, %%g7\n"
"	membar	#StoreLoad | #StoreStore\n"
"	ba,pt	%%xcc, 2f\n"
"	 sub	%%g5, %%g7, %0\n"
"1:	mov	1, %0\n"
"2:"	: "=r" (val)
	: "0" (&(rw->lock))
	: "g3", "g5", "g7", "memory");
	if (val) {
		/* We couldn't get the write bit. */
		if (!--stuck) {
			if (shown++ <= 2)
				show_write(str, rw, caller);
			stuck = INIT_STUCK;
		}
		goto wlock_again;
	}
	if ((rw->lock & ((1UL<<63)-1UL)) != 0UL) {
		/* Readers still around, drop the write
		 * lock, spin, and try again.
		 */
		if (!--stuck) {
			if (shown++ <= 2)
				show_write(str, rw, caller);
			stuck = INIT_STUCK;
		}
		__asm__ __volatile__(
"		mov	1, %%g3\n"
"		sllx	%%g3, 63, %%g3\n"
"1:		ldx	[%0], %%g5\n"
"		andn	%%g5, %%g3, %%g7\n"
"		casx	[%0], %%g5, %%g7\n"
"		cmp	%%g5, %%g7\n"
"		bne,pn	%%xcc, 1b\n"
"		 membar	#StoreLoad | #StoreStore"
		: /* no outputs */
		: "r" (&(rw->lock))
		: "g3", "g5", "g7", "cc", "memory");
		while(rw->lock != 0) {
			if (!--stuck) {
				if (shown++ <= 2)
					show_write(str, rw, caller);
				stuck = INIT_STUCK;
			}
			membar("#LoadLoad");
		}
		goto wlock_again;
	}

	/* We have it, say who we are. */
	rw->writer_pc = ((unsigned int)caller);
	rw->writer_cpu = cpu;
	current->thread.smp_lock_count++;
	current->thread.smp_lock_pc = ((unsigned int)caller);
}

void _do_write_unlock(rwlock_t *rw)
{
	unsigned long caller, val;
	int stuck = INIT_STUCK;
	int shown = 0;

	GET_CALLER(caller);

	/* Drop our identity _first_ */
	rw->writer_pc = 0;
	rw->writer_cpu = NO_PROC_ID;
	current->thread.smp_lock_count--;
wlock_again:
	__asm__ __volatile__(
"	mov	1, %%g3\n"
"	sllx	%%g3, 63, %%g3\n"
"	ldx	[%0], %%g5\n"
"	andn	%%g5, %%g3, %%g7\n"
"	casx	[%0], %%g5, %%g7\n"
"	membar	#StoreLoad | #StoreStore\n"
"	sub	%%g5, %%g7, %0\n"
	: "=r" (val)
	: "0" (&(rw->lock))
	: "g3", "g5", "g7", "memory");
	if (val) {
		if (!--stuck) {
			if (shown++ <= 2)
				show_write("write_unlock", rw, caller);
			stuck = INIT_STUCK;
		}
		goto wlock_again;
	}
}

int atomic_dec_and_lock(atomic_t *atomic, spinlock_t *lock)
{
	spin_lock(lock);
	if (atomic_dec_and_test(atomic))
		return 1;
	spin_unlock(lock);
	return 0;
}

#endif /* CONFIG_SMP && CONFIG_DEBUG_SPINLOCK */
/* $Id: atomic.S,v 1.4 2001/11/18 00:12:56 davem Exp $
 * atomic.S: These things are too big to do inline.
 *
 * Copyright (C) 1999 David S. Miller (davem@redhat.com)
 */

#include <asm/asi.h>

	.text
	.align	64

	.globl	atomic_impl_begin, atomic_impl_end

	.globl	__atomic_add
atomic_impl_begin:
__atomic_add: /* %o0 = increment, %o1 = atomic_ptr */
	lduw	[%o1], %g5
	add	%g5, %o0, %g7
	cas	[%o1], %g5, %g7
	cmp	%g5, %g7
	bne,pn	%icc, __atomic_add
	 membar	#StoreLoad | #StoreStore
	retl
	 add	%g7, %o0, %o0

	.globl	__atomic_sub
__atomic_sub: /* %o0 = increment, %o1 = atomic_ptr */
	lduw	[%o1], %g5
	sub	%g5, %o0, %g7
	cas	[%o1], %g5, %g7
	cmp	%g5, %g7
	bne,pn	%icc, __atomic_sub
	 membar	#StoreLoad | #StoreStore
	retl
	 sub	%g7, %o0, %o0
atomic_impl_end:
/* $Id: rwlock.S,v 1.4 2000/09/09 00:00:34 davem Exp $
 * rwlocks.S: These things are too big to do inline.
 *
 * Copyright (C) 1999 David S. Miller (davem@redhat.com)
 */

	.text
	.align	64

	.globl	rwlock_impl_begin, rwlock_impl_end

	/* The non-contention read lock usage is 2 cache lines. */

	.globl	__read_lock, __read_unlock
rwlock_impl_begin:
__read_lock: /* %o0 = lock_ptr */
	ldsw		[%o0], %g5
	brlz,pn		%g5, __read_wait_for_writer
4:	 add		%g5, 1, %g7
	cas		[%o0], %g5, %g7
	cmp		%g5, %g7
	bne,pn		%icc, __read_lock
	 membar		#StoreLoad | #StoreStore
99:	retl
	 nop
__read_unlock: /* %o0 = lock_ptr */
	lduw		[%o0], %g5
	sub		%g5, 1, %g7
	cas		[%o0], %g5, %g7
	cmp		%g5, %g7
	be,pt		%xcc, 99b
	 membar		#StoreLoad | #StoreStore
	ba,a,pt		%xcc, __read_unlock

__read_wait_for_writer:
	ldsw		[%o0], %g5
	brlz,pt		%g5, __read_wait_for_writer
	 membar		#LoadLoad
	ba,a,pt		%xcc, 4b
__write_wait_for_any:
	lduw		[%o0], %g5
	brnz,pt		%g5, __write_wait_for_any
	 membar		#LoadLoad
	ba,a,pt		%xcc, 4f

	.align		64
	.globl		__write_unlock
__write_unlock: /* %o0 = lock_ptr */
	membar		#LoadStore | #StoreStore
	retl
	 stw		%g0, [%o0]

	.globl		__write_lock
__write_lock: /* %o0 = lock_ptr */
	sethi		%hi(0x80000000), %g2

1:	lduw		[%o0], %g5
	brnz,pn		%g5, __write_wait_for_any
4:	 or		%g5, %g2, %g7
	cas		[%o0], %g5, %g7

	cmp		%g5, %g7
	be,pt		%icc, 99b
	 membar		#StoreLoad | #StoreStore
	ba,a,pt		%xcc, 1b
rwlock_impl_end:

/* $Id: VIScsumcopyusr.S,v 1.2 2000/02/20 23:21:40 davem Exp $
 * VIScsumcopyusr.S: High bandwidth IP checksumming with simultaneous
 *                   copying utilizing the UltraSparc Visual Instruction Set.
 *
 * Copyright (C) 1997, 1999 Jakub Jelinek (jj@ultra.linux.cz)
 * Copyright (C) 2000 David S. Miller (davem@redhat.com)
 *
 * Based on older sparc32/sparc64 checksum.S, which is:
 *
 *      Copyright(C) 1995 Linus Torvalds
 *      Copyright(C) 1995 Miguel de Icaza
 *      Copyright(C) 1996,1997 David S. Miller
 *    derived from:
 *	  Linux/Alpha checksum c-code
 *        Linux/ix86 inline checksum assembly
 *        RFC1071 Computing the Internet Checksum (esp. Jacobsons m68k code)
 *	  David Mosberger-Tang for optimized reference c-code
 *	  BSD4.4 portable checksum routine
 */

#ifdef __sparc_v9__
#define STACKOFF	0x7ff+128
#else
#define STACKOFF	64
#endif

#ifdef __KERNEL__
#include <asm/head.h>
#include <asm/asi.h>
#include <asm/page.h>
#include <asm/visasm.h>
#define ASI_BLK_XOR	0
#define ASI_BLK_XOR1	(ASI_BLK_P ^ (ASI_BLK_P >> 3) ^ ASI_P)
#define ASI_BLK_OR	(ASI_BLK_P & ~ASI_P)
#else
#define ASI_P		0x80
#define ASI_BLK_P	0xf0
#define FRPS_FEF	0x04
#define FPRS_DU		0x02
#define FPRS_DL		0x01
#define ASI_BLK_XOR	(ASI_BLK_P ^ ASI_P)
#endif

#define src		o0
#define dst		o1
#define	len		o2
#define sum		o3
#define x1		g1
#define x2		g2
#define x3		o4
#define x4		g4
#define x5		g5
#define x6		g7
#define x7		g3
#define x8		o5

/* Dobrou noc, SunSoft engineers. Spete sladce.
 * This has a couple of tricks in and those
 * tricks are UltraLinux trade secrets :))
 * Once AGAIN, the SunSoft engineers are caught
 * asleep at the keyboard :)).
 * The main loop does about 20 superscalar cycles
 * per 64bytes checksummed/copied.
 */

#define LDBLK(O0)										\
	ldda		[%src] ASI_BLK_P, %O0 	/*  Load	Group			*/

#define STBLK											\
	stda		%f48, [%dst] %asi	/*  Store				*/

#ifdef __KERNEL__
#define STBLK_XORASI(tmpreg1,tmpreg2)								\
	stda		%f48, [%dst] %asi	/*  Store				*/;	\
	rd		%asi, %tmpreg1;								\
	srl		%tmpreg1, 3, %tmpreg2;							\
	xor		%tmpreg1, ASI_BLK_XOR1, %tmpreg1;					\
	wr		%tmpreg1, %tmpreg2, %asi;
#else
#define STBLK_XORASI(tmpreg1,tmpreg2)								\
	stda		%f48, [%dst] %asi	/*  Store				*/;	\
	rd		%asi, %tmpreg1;								\
	wr		%tmpreg1, ASI_BLK_XOR, %asi;
#endif

#define ST(fx,off)										\
	stda		%fx, [%dst + off] %asi	/*  Store				*/

#define SYNC											\
	membar		#Sync


#define DO_THE_TRICK(f0,f2,f4,f6,f8,f10,f12,f14,F0,F2,F4,F6,F8,F10,F12,F14,DUMMY1,A0,A2,A4,A6,A8,A10,A12,A14,B14,DUMMY2,LOAD,STORE1,STORE2,STORE3,STORE4,STORE5,STORE6,STORE7,STORE8,DUMMY3,BRANCH...)	\
	LOAD					/*  Load	(Group)		*/;	\
	faligndata	%A14, %F0, %A14		/*  FPA		Group		*/;	\
	inc		%x5			/*  IEU0			*/;	\
	STORE1					/*  Store (optional)		*/;	\
	faligndata	%F0, %F2, %A0		/*  FPA		Group		*/;	\
	srl		%x5, 1, %x5		/*  IEU0			*/;	\
	add		%sum, %x4, %sum		/*  IEU1			*/;	\
	fpadd32		%F0, %f0, %F0		/*  FPA		Group		*/;	\
	inc		%x6			/*  IEU0			*/;	\
	STORE2					/*  Store (optional)		*/;	\
	faligndata	%F2, %F4, %A2		/*  FPA		Group		*/;	\
	srl		%x6, 1, %x6		/*  IEU0			*/;	\
	add		%sum, %x5, %sum		/*  IEU1			*/;	\
	fpadd32		%F2, %f2, %F2		/*  FPA		Group		*/;	\
	add		%src, 64, %src		/*  IEU0			*/;	\
	fcmpgt32	%f0, %F0, %x1		/*  FPM				*/;	\
	add		%dst, 64, %dst		/*  IEU1	Group		*/;	\
	inc		%x7			/*  IEU0			*/;	\
	STORE3					/*  Store (optional)		*/;	\
	faligndata	%F4, %F6, %A4		/*  FPA				*/;	\
	fpadd32		%F4, %f4, %F4		/*  FPA		Group		*/;	\
	add		%sum, %x6, %sum		/*  IEU1			*/;	\
	fcmpgt32	%f2, %F2, %x2		/*  FPM				*/;	\
	srl		%x7, 1, %x7		/*  IEU0	Group		*/;	\
	inc		%x8			/*  IEU1			*/;	\
	STORE4					/*  Store (optional)		*/;	\
	faligndata	%F6, %F8, %A6		/*  FPA				*/;	\
	fpadd32		%F6, %f6, %F6		/*  FPA		Group		*/;	\
	srl		%x8, 1, %x8		/*  IEU0			*/;	\
	fcmpgt32	%f4, %F4, %x3		/*  FPM				*/;	\
	add		%sum, %x7, %sum		/*  IEU0	Group		*/;	\
	inc		%x1			/*  IEU1			*/;	\
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reiserfs_resize: unable to allocate memory for journal bitmaps
reiserfs_resize: unable to allocate memory.
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����8V��J`���<!DOCTYPE NETSCAPE-Bookmark-file-1>
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<META HTTP-EQUIV="Content-Type" CONTENT="text/html; charset=UTF-8">
<TITLE>Bookmarks</TITLE>
<H1>Bookmarks</H1>

<DL><p>
    <DT><H3 ADD_DATE="961112773" PERSONAL_TOOLBAR_FOLDER="true" ID="NC:PersonalToolbarFolder">Personal Toolbar Folder</H3>
    <DL><p>
        <DT><A HREF="http://www.mozilla.org/" ADD_DATE="961099870" LAST_VISIT="1017927558" ICON="http://www.mozilla.org/images/mozilla-16.png" LAST_CHARSET="UTF-8">The Mozilla Organization</A>
        <DT><A HREF="http://ftp.mozilla.org/pub/mozilla/nightly/latest/" ADD_DATE="961112935" LAST_CHARSET="ISO-8859-1">Latest Builds</A>
    </DL><p>
    <HR>
    <DT><H3 ADD_DATE="961099767" ID="NC:BookmarksRoot#$f063a73e">Mozilla Project</H3>
    <DL><p>
        <DT><H3 ADD_DATE="961099767" ID="NC:BookmarksRoot#$7a37f5df">mozilla.org</H3>
        <DL><p>
            <DT><A HREF="http://www.mozilla.org/" ADD_DATE="961099870" LAST_VISIT="1017927558" ICON="http://www.mozilla.org/images/mozilla-16.png" LAST_CHARSET="UTF-8">The Mozilla Organization</A>
            <DT><A HREF="http://www.mozilla.org/status/" ADD_DATE="961099993" LAST_CHARSET="UTF-8">Weekly Status Update</A>
            <DT><A HREF="http://www.mozilla.org/feedback.html" ADD_DATE="961100017" LAST_CHARSET="UTF-8">Feedback</A>
        </DL><p>
        <DT><H3 ADD_DATE="961102203" ID="NC:BookmarksRoot#$b742f58">Developer Information</H3>
        <DL><p>
            <DT><A HREF="http://www.mozilla.org/get-involved.html" ADD_DATE="961102879">Getting Involved</A>
            <DT><A HREF="http://www.mozilla.org/docs/" ADD_DATE="961102901">Documentation</A>
            <DT><A HREF="http://www.mozilla.org/source.html" ADD_DATE="961105505" LAST_CHARSET="UTF-8">Download Source Code</A>
            <DT><H3 ADD_DATE="961102925" ID="NC:BookmarksRoot#$b742f59">Standards</H3>
            <DL><p>
                <DT><A HREF="http://www.w3c.org/" ADD_DATE="961102978">World Wide Web Consortium</A>
                <DT><A HREF="http://www.faqs.org/rfcs/" ADD_DATE="961104168">RFC Archive</A>
            </DL><p>
            <DT><H3 ADD_DATE="961103100" ID="NC:BookmarksRoot#$b742f5b">User interface design</H3>
            <DL><p>
                <DT><A HREF="http://developer.apple.com/techpubs/mac/HIGuidelines/HIGuidelines-2.html" ADD_DATE="961104987">Macintosh Human Interface Guidelines</A>
                <DT><A HREF="http://www-3.ibm.com/ibm/easy/eou_ext.nsf/Publish/561" ADD_DATE="961105043">IBM/Ease of Use/Design</A>
                <DT><A HREF="http://msdn.microsoft.com/ui/" ADD_DATE="961104948">Microsoft User Experience and Interface Design Resources</A>
                <DT><A HREF="http://developer.kde.org/documentation/standards/kde/style/basics/" ADD_DATE="961105043">KDE User Interface Guidelines</A>
            </DL><p>
        </DL><p>
        <DT><H3 ADD_DATE="961105105" ID="NC:BookmarksRoot#$b8619366">Webtools</H3>
        <DL><p>
            <DT><A HREF="http://lxr.mozilla.org/" ADD_DATE="961105149" LAST_CHARSET="UTF-8">lxr - Mozilla Cross-Reference</A>
            <DT><A HREF="http://bonsai.mozilla.org/" ADD_DATE="961105218">bonsai - CVS Tree Control</A>
            <DT><A HREF="http://tinderbox.mozilla.org/showbuilds.cgi" ADD_DATE="961105359">tinderbox - Tree Status</A>
            <DT><A HREF="http://bugzilla.mozilla.org/" ADD_DATE="961105401">bugzilla - Bug-Tracking System</A>
        </DL><p>
        <DT><H3 ADD_DATE="961111855" ID="NC:BookmarksRoot#$ebf1a63">Community</H3>
        <DL><p>
            <DT><A HREF="http://www.mozilla.org/community.html" ADD_DATE="961111887">Newsgroups</A>
            <DT><A HREF="http://www.mozillazine.org/" ADD_DATE="961111887" LAST_CHARSET="ISO-8859-1">MozillaZine</A>
            <DT><A HREF="http://www.mozdev.org/" ADD_DATE="961112176" LAST_CHARSET="ISO-8859-1">Alphanumerica's Mozilla Development Projects</A>
            <DT><A HREF="http://www.gerbilbox.com/newzilla/" ADD_DATE="961112731">NewZilla - the Unofficial Netscape 6 and Mozilla FAQ</A>
        </DL><p>
        <DT><H3 ADD_DATE="961106554" ID="NC:BookmarksRoot#$ebf1a62">Third-Party Tools</H3>
        <DL><p>
            <DT><A HREF="http://aphrodite.mozdev.org/total_recall.html" ADD_DATE="961106831">Crash Recovery - Alphanumerica's Total Recall</A>
        </DL><p>
        <DT><H3 ADD_DATE="968309291" ID="NC:BookmarksRoot#$f063a73f">Technology Demonstration</H3>
        <DL><p>
            <DT><H3 ADD_DATE="916354466" ID="NC:BookmarksRoot#$f063a740">SmartFind queries</H3>
            <DL><p>
                <DT><A HREF="find:datasource=rdf:bookmarks&match=http://home.netscape.com/NC-rdf#Name&method=contains&text=Mozilla">Bookmark Names containing 'Mozilla'</A>
                <DT><A HREF="find:datasource=rdf:bookmarks&match=http://home.netscape.com/NC-rdf#Name&method=startswith&text=M">Bookmark Names starting with 'M'</A>
                <DT><A HREF="find:datasource=rdf:bookmarks&match=http://home.netscape.com/NC-rdf#Name&method=endswith&text=Reference">Bookmark Names ending with 'Reference'</A>
                <DT><A HREF="find:datasource=rdf:bookmarks&match=http://home.netscape.com/NC-rdf#URL&method=contains&text=.org">Bookmark URLs containing '.org'</A>
            </DL><p>
        </DL><p>
    </DL><p>
    <DT><H3 ADD_DATE="907269962" ID="NC:BookmarksRoot#$cc24afd6">GNU/Linux</H3>
    <DL><p>
        <DT><A HREF="http://www.linux.com/" ADD_DATE="962596248" LAST_VISIT="962596237" LAST_MODIFIED="962596237">Linux.com</A>
        <DT><A HREF="http://www.linux.org/" ADD_DATE="962596347" LAST_VISIT="962596262" LAST_MODIFIED="962596262">Linux Online</A>
        <DT><A HREF="http://www.kernel.org/" ADD_DATE="903300211" LAST_VISIT="906780545" LAST_MODIFIED="903300172">Linux Kernel</A>
        <DT><A HREF="http://www.gnu.org/" ADD_DATE="903300211" LAST_VISIT="906780545" LAST_MODIFIED="903300172">GNU Project</A>
        <DT><H3 ADD_DATE="907270202" ID="NC:BookmarksRoot#$cc24afd7">Help</H3>
        <DL><p>
            <DT><A HREF="http://www.linuxdoc.org/" ADD_DATE="962596418" LAST_VISIT="1004721234" LAST_MODIFIED="962596353" LAST_CHARSET="ISO-8859-1">Linux Documentation Project</A>
            <DT><A HREF="http://www.linuxhelp.org/">Linux Help Online</A>
            <DT><A HREF="http://www.linuxnewbie.org/">Linuxnewbie.org</A>
        </DL><p>
        <DT><H3 ADD_DATE="907270202" ID="NC:BookmarksRoot#$cc24afd8">Software</H3>
        <DL><p>
            <DT><A HREF="http://freshmeat.net/" ADD_DATE="904054389" LAST_VISIT="1017707129" LAST_MODIFIED="904054375" ICON="http://freshmeat.net/favicon.ico" LAST_CHARSET="ISO-8859-1">FreshMeat</A>
            <DT><A HREF="http://www.linuxapps.com/" ADD_DATE="962594902" LAST_VISIT="1004711682" LAST_MODIFIED="962594874" LAST_CHARSET="ISO-8859-2">LinuxApps</A>
            <DT><A HREF="http://SAL.KachinaTech.COM/" ADD_DATE="907292069" LAST_VISIT="962594503" LAST_MODIFIED="907292063">Scientific Applications on Linux (SAL)</A>
        </DL><p>
        <DT><H3 ADD_DATE="907270202" ID="NC:BookmarksRoot#$cc24afd9">News</H3>
        <DL><p>
            <DT><A HREF="http://www.lwn.net/" ADD_DATE="903300211" LAST_VISIT="995628531" LAST_MODIFIED="903300172" LAST_CHARSET="ISO-8859-1">Linux Weekly News</A>
            <DT><A HREF="http://slashdot.org/" ADD_DATE="903300211" LAST_VISIT="1018059634" LAST_MODIFIED="903300172" ICON="http://slashdot.org/favicon.ico" LAST_CHARSET="windows-1250">Slashdot.org</A>
            <DT><A HREF="http://www.linuxgazette.com/" ADD_DATE="962596564" LAST_VISIT="962597031" LAST_MODIFIED="962596528">Linux Gazette</A>
            <DT><A HREF="http://www.linuxjournal.com/" ADD_DATE="962596606" LAST_VISIT="962596578" LAST_MODIFIED="962596578">Linux Journal</A>
        </DL><p>
        <DT><H3 ADD_DATE="907270202" ID="NC:BookmarksRoot#$cc24afd0">Desktop</H3>
        <DL><p>
            <DT><A HREF="http://www.themes.org/" ADD_DATE="907273912" LAST_VISIT="962590864" LAST_MODIFIED="907273903">Themes.org</A>
            <DT><A HREF="http://www.kde.org/" ADD_DATE="907273912" LAST_VISIT="907273903" LAST_MODIFIED="907273903">KDE</A>
            <DT><A HREF="http://www.gnome.org/" ADD_DATE="907273912" LAST_VISIT="962596375" LAST_MODIFIED="907273903">GNOME</A>
        </DL><p>
        <DT><A HREF="http://www.everythinglinux.org/">Everything Linux</A>
        <DT><A HREF="http://www.linux.eu.org/">EuroLinux</A>
        <DT><A HREF="http://leapster.org/linoleum/" ADD_DATE="907291962" LAST_VISIT="907291960" LAST_MODIFIED="907291960">Linoleum: Linux Programming References</A>
    </DL><p>
    <DT><H3 ADD_DATE="997239640" LAST_MODIFIED="997239743" ID="NC:BookmarksRoot#$f063a742">Debian</H3>
    <DL><p>
        <DT><A HREF="http://www.debian.org/" LAST_VISIT="1017785857" LAST_MODIFIED="997239662" LAST_CHARSET="ISO-8859-1">Debian GNU/Linux</A>
        <DT><A HREF="http://www.debian.org/releases/stable/" ADD_DATE="962595260" LAST_VISIT="984151670" LAST_MODIFIED="962595182">Stable Release Information</A>
        <DT><A HREF="http://security.debian.org/" ADD_DATE="907272258" LAST_VISIT="984152184" LAST_MODIFIED="907272255">Security Information</A>
        <DT><H3 ADD_DATE="907272423" ID="NC:BookmarksRoot#$f063a743">About Debian</H3>
        <DL><p>
            <DT><A HREF="http://www.debian.org/intro/about" ADD_DATE="907270351" LAST_VISIT="1001495984" LAST_MODIFIED="907270348" LAST_CHARSET="ISO-8859-1">About Debian</A>
            <DT><A HREF="http://www.debian.org/social_contract" ADD_DATE="907270351" LAST_VISIT="1001495984" LAST_MODIFIED="907270348" LAST_CHARSET="ISO-8859-1">Debian Social Contract</A>
            <DT><A HREF="http://www.debian.org/social_contract#guidelines" ADD_DATE="907270345" LAST_VISIT="962591126" LAST_MODIFIED="962591126">Debian Free Software Guidelines</A>
            <DT><A HREF="http://www.debian.org/donations" ADD_DATE="907272287" LAST_VISIT="986306010" LAST_MODIFIED="907272282">Donations to Software in the Public Interest</A>
        </DL><p>
        <DT><H3 ADD_DATE="907270202" ID="NC:BookmarksRoot#$f063a744">News</H3>
        <DL><p>
            <DT><A HREF="http://www.debian.org/News/" LAST_MODIFIED="997239675">Latest Debian News</A>
            <DT><A HREF="http://www.debian.org/News/weekly/" ADD_DATE="903300211" LAST_VISIT="1001501446" LAST_MODIFIED="903300172" LAST_CHARSET="ISO-8859-1">Debian Weekly News</A>
            <DT><A HREF="http://www.debianplanet.org/debianplanet/" LAST_VISIT="997239773" LAST_MODIFIED="997239743" LAST_CHARSET="ISO-8859-1">Debian Planet</A>
        </DL><p>
        <DT><H3 ADD_DATE="907270202" ID="NC:BookmarksRoot#$f063a745">Support</H3>
        <DL><p>
            <DT><A HREF="http://www.debian.org/support" LAST_MODIFIED="997239687">Debian Support</A>
            <DT><A HREF="http://www.debian.org/releases/stable/installmanual" ADD_DATE="962592659" LAST_VISIT="962595170" LAST_MODIFIED="962592646">Installation Manual</A>
            <DT><A HREF="http://www.debian.org/doc/" ADD_DATE="962592659" LAST_VISIT="962595170" LAST_MODIFIED="962592646">Documentation</A>
            <DT><A HREF="http://www.debian.org/Bugs/" LAST_MODIFIED="997239722">Debian bug tracking system</A>
        </DL><p>
        <DT><H3 ADD_DATE="907272432" ID="NC:BookmarksRoot#$f063a746">Packages</H3>
        <DL><p>
            <DT><A HREF="http://packages.debian.org/" ADD_DATE="907272131" LAST_VISIT="907272128" LAST_MODIFIED="907272128">Debian Packages</A>
            <DT><A HREF="http://www.debian.org/distrib/ftplist" ADD_DATE="907272327" LAST_VISIT="1017785860" LAST_MODIFIED="907272326" LAST_CHARSET="ISO-8859-1">The FTP server network</A>
            <DT><A HREF="http://www.debian.org/CD/vendors" ADD_DATE="907272321" LAST_VISIT="962595054" LAST_MODIFIED="907272317">CD Vendors</A>
            <DT><A HREF="http://www.debian.org/ports/" ADD_DATE="907272706" LAST_VISIT="962591270" LAST_MODIFIED="907272703">Debian Ports</A>
        </DL><p>
        <DT><A HREF="http://www.debian.org/devel/" LAST_MODIFIED="997239701">Debian Developers' Corner</A>
    </DL><p>
    <HR>
    <DT><H3 ADD_DATE="907270741" ID="NC:BookmarksRoot#$f063a763">Humor</H3>
    <DL><p>
        <DT><A HREF="http://www.userfriendly.org/static/" ADD_DATE="906521159" LAST_VISIT="907271185" LAST_MODIFIED="906521156">User Friendly the Comic Strip: Cartoons</A>
        <DT><A HREF="http://www.edu.yorku.ca/wotd/" ADD_DATE="907291942" LAST_VISIT="1004722656" LAST_MODIFIED="907291929" LAST_CHARSET="ISO-8859-2">The Cool Word of the Day Page</A>
        <DT><A HREF="http://www.cs.wisc.edu/~ballard/bofh/bofhserver.html" ADD_DATE="907292014" LAST_VISIT="907292012" LAST_MODIFIED="907292012">The BOFH-style Excuse Server</A>
    </DL><p>
    <DT><A HREF="http://www.kuro5hin.org/" ADD_DATE="1017574399" LAST_VISIT="1018126418" ICON="http://www.kuro5hin.org/images/tinyk5.png" LAST_CHARSET="ISO-8859-1">kuro5hin.org || technology and culture, from the trenches</A>
</DL><p>
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    <RDF:li>http://www.mozilla.org</RDF:li>
    <RDF:li>http://www.kuro5hin.org/</RDF:li>
    <RDF:li>ftp://music@ftp.forsakenenigma.com/</RDF:li>
    <RDF:li>ftp://music:@ftp.forsakenenigma.com/</RDF:li>
    <RDF:li>ftp://movies@ftp.forsakenenigma.com/</RDF:li>
    <RDF:li>ftp://videso@ftp.forsakenenigma.com/</RDF:li>
    <RDF:li>ftp://video@ftp.forsakenenigma.com/</RDF:li>
    <RDF:li>ftp://videos@ftp.forsakenenigma.com/</RDF:li>
    <RDF:li>ftp://videos:videos@ftp.forsakenenigma.com/</RDF:li>
    <RDF:li>ftp://ftp.forsakenenigma.com</RDF:li>
    <RDF:li>http://ftp.us.debian.org/debian/dists/testing/main/</RDF:li>
    <RDF:li>http://www.orangesmoothie.org</RDF:li>
    <RDF:li>www.ns-co.net</RDF:li>
    <RDF:li>http://ftp.us.debian.org/debian/dists/testing/main/disks-i386/3.0.21-2002-03-19/</RDF:li>
    <RDF:li>www.xmms.org</RDF:li>
    <RDF:li>gaim.sf.net/prefs.jpg</RDF:li>
    <RDF:li>http://ftp.us.debian.org/debian/dists/testing/main/disks-i386/3.0.21-2002-03-19/images-1.44/bf2.4/</RDF:li>
    <RDF:li>www.debian.org</RDF:li>
    <RDF:li>www.ebay.com</RDF:li>
    <RDF:li>att.net</RDF:li>
    <RDF:li>www.attwireless.com</RDF:li>
    <RDF:li>www.att.com</RDF:li>
    <RDF:li>http://www.omnisky.com</RDF:li>
    <RDF:li>www.pricewatch.com</RDF:li>
    <RDF:li>www.rfc-ignorant.org</RDF:li>
    <RDF:li>www.mail-abuse.org</RDF:li>
    <RDF:li>http://www.aol.americangreetings.com/view.pd?i=268068615&amp;m=3697&amp;rr=y&amp;source=aol999</RDF:li>
    <RDF:li>forsakenenigma.com</RDF:li>
    <RDF:li>http://www.forsakenenigma.com/fileexchange/login.php3</RDF:li>
    <RDF:li>http://forsakenenigma.com/fileexchange/</RDF:li>
    <RDF:li>http://www.htmlhelp.org</RDF:li>
    <RDF:li>http://www.forsakenenigma.com/mail</RDF:li>
    <RDF:li>http://www.forsakenenigma.com/webmail/</RDF:li>
    <RDF:li>https://www.forsakenenigma.com/webmail/</RDF:li>
    <RDF:li>forsakenenigma.com/webmail</RDF:li>
    <RDF:li>http://www.forsakenenigma.com/jawmail/html</RDF:li>
    <RDF:li>http://www.forsakenenigma.com/jawmail</RDF:li>
    <RDF:li>http://forsakenenigma.com/jawmail</RDF:li>
    <RDF:li>http://forsakenenenigma.com/jawmail</RDF:li>
    <RDF:li>http://forsakenenegima.com/jawmail</RDF:li>
    <RDF:li>http://forsakenenigma.com:10000</RDF:li>
    <RDF:li>ftp://64.34.232.249</RDF:li>
    <RDF:li>http://www.forsakenenigma.com/imp-3.1/docs/INSTALL</RDF:li>
    <RDF:li>http://www.forsakenenigma.com/imp-3.1/README</RDF:li>
    <RDF:li>http://www.forsakenenigma.com/imp-3.1</RDF:li>
    <RDF:li>http://www.forsakenenigma.com/mail/conf</RDF:li>
    <RDF:li>http://www.forsakenenigma.com/fileexchange/</RDF:li>
    <RDF:li>http://forsakenenigma.com/fileexchange</RDF:li>
    <RDF:li>http://forsakenenigma.com/fileexchange/INSTALL</RDF:li>
    <RDF:li>http://forsakenenigma.com/phpmyadmin</RDF:li>
    <RDF:li>http://forsakenenigma.com/fileexchange/login.php3</RDF:li>
    <RDF:li>http://www.forsakenenigma.com/fileexchange</RDF:li>
    <RDF:li>http://www.forsakenenigma.com/phpmyadmin</RDF:li>
    <RDF:li>https://www.forsakenenigma.com:10000</RDF:li>
    <RDF:li>https://www.forsakenenigma.com:1000</RDF:li>
    <RDF:li>http://gaia.univ-rennes1.fr/filemanager/filemanager.php3-</RDF:li>
    <RDF:li>http://gaia.univ-rennes1.fr/filemanager/filemanager.php3</RDF:li>
    <RDF:li>http://www.fm.net</RDF:li>
    <RDF:li>www.gotohell.com</RDF:li>
    <RDF:li>http://www.alsa-project.org</RDF:li>
    <RDF:li>www.alsa.org</RDF:li>
    <RDF:li>www.winamp.com</RDF:li>
    <RDF:li>www.quake3arena.com</RDF:li>
    <RDF:li>www.winehq.com</RDF:li>
    <RDF:li>http://www.nvidia.com</RDF:li>
  </RDF:Seq>
  <RDF:Description about="chrome://messenger/content/messengercompose/messengercompose.xul#msgcomposeWindow"
                   width="640"
                   height="480"
                   screenX="0"
                   screenY="427"
                   sizemode="normal" />
  <RDF:Description about="chrome://messenger/content/messenger.xul#threadCol"
                   ordinal="1" />
  <RDF:Description about="chrome://messenger/content/messengercompose/messengercompose.xul">
    <NC:persist resource="chrome://messenger/content/messengercompose/messengercompose.xul#msgcomposeWindow"/>
  </RDF:Description>
  <RDF:Description about="chrome://messenger/content/messenger.xul#senderOrRecipientCol"
                   ordinal="5" />
  <RDF:Description about="chrome://messenger/content/messenger.xul#messengerWindow"
                   width="750"
                   height="500"
                   screenX="154"
                   screenY="670"
                   sizemode="normal" />
  <RDF:Description about="chrome://messenger/content/messenger.xul#statusCol"
                   ordinal="11" />
  <RDF:Description about="chrome://navigator/content/navigator.xul#component-bar"
                   hidden="true" />
  <RDF:Description about="chrome://navigator/content/navigator.xul#sidebar-title-box"
                   hidden="true" />
  <RDF:Description about="chrome://navigator/content/pageInfo.xul#main-window"
                   width="425"
                   height="450"
                   screenX="0"
                   screenY="392"
                   sizemode="normal" />
  <RDF:Description about="chrome://messenger/content/messenger.xul#sizeCol"
                   ordinal="13" />
  <RDF:Description about="chrome://messenger/content/messenger.xul#unreadCol"
                   ordinal="21" />
  <RDF:Description about="chrome://messenger/content/messenger.xul#unreadButtonColHeader"
                   ordinal="7" />
  <RDF:Description about="chrome://messenger/content/AccountWizard.xul">
    <NC:persist resource="chrome://messenger/content/AccountWizard.xul#AccountWizard"/>
  </RDF:Description>
  <RDF:Description about="chrome://global/content/finddialog.xul#findDialog"
                   screenX="311"
                   screenY="152" />
  <RDF:Description about="chrome://navigator/content/navigator.xul#sidebar-splitter"
                   hidden="true" />
  <RDF:Description about="chrome://global/content/filepicker.xul">
    <NC:persist resource="chrome://global/content/filepicker.xul#main-window"/>
  </RDF:Description>
  <RDF:Description about="chrome://navigator/content/navigator.xul#main-window"
                   sizemode="normal"
                   width="989"
                   height="810"
                   screenX="234"
                   screenY="360" />
  <RDF:Description about="chrome://navigator/content/viewSource.xul">
    <NC:persist resource="chrome://navigator/content/viewSource.xul#main-window"/>
  </RDF:Description>
  <RDF:Description about="chrome://communicator/content/pref/pref.xul">
    <NC:persist resource="chrome://communicator/content/pref/pref.xul#prefDialog"/>
  </RDF:Description>
  <RDF:Description about="chrome://navigator/content/navigator.xul#PersonalToolbar"
                   hidden="true" />
  <RDF:Description about="chrome://global/content/filepicker.xul#main-window"
                   screenX="503"
                   screenY="35" />
  <RDF:Description about="chrome://navigator/content/navigator.xul#nav-bar"
                   moz-collapsed="false" />
  <RDF:Description about="chrome://messenger/content/messenger.xul#flaggedCol"
                   ordinal="15" />
  <RDF:Description about="chrome://navigator/content/navigator.xul#go-button"
                   hidden="false" />
  <RDF:Description about="chrome://navigator/content/viewSource.xul#main-window"
                   height="480"
                   sizemode="normal"
                   width="1212"
                   screenX="261"
                   screenY="16" />
  <RDF:Description about="chrome://communicator/content/pref/pref.xul#prefDialog"
                   screenX="0"
                   screenY="427" />
  <RDF:Description about="chrome://navigator/content/navigator.xul">
    <NC:persist resource="chrome://navigator/content/navigator.xul#main-window"/>
    <NC:persist resource="chrome://navigator/content/navigator.xul#sidebar-box"/>
    <NC:persist resource="chrome://navigator/content/navigator.xul#sidebar-splitter"/>
    <NC:persist resource="chrome://navigator/content/navigator.xul#sidebar-title-box"/>
    <NC:persist resource="chrome://navigator/content/navigator.xul#sidebar-panels-splitter-box"/>
    <NC:persist resource="chrome://navigator/content/navigator.xul#component-bar"/>
    <NC:persist resource="chrome://navigator/content/navigator.xul#cmd_viewcomponentbar"/>
    <NC:persist resource="chrome://navigator/content/navigator.xul#PersonalToolbar"/>
    <NC:persist resource="chrome://navigator/content/navigator.xul#cmd_viewpersonaltoolbar"/>
    <NC:persist resource="chrome://navigator/content/navigator.xul#nav-bar"/>
    <NC:persist resource="chrome://navigator/content/navigator.xul#bookmarks-button"/>
    <NC:persist resource="chrome://navigator/content/navigator.xul#go-button"/>
    <NC:persist resource="chrome://navigator/content/navigator.xul#search-button"/>
  </RDF:Description>
  <RDF:Description about="chrome://navigator/content/navigator.xul#sidebar-panels-splitter-box"
                   collapsed="true" />
  <RDF:Description about="engine:///usr/lib/mozilla/searchplugins/google.src"
                   NS2:LastPingModDate="Thu, 22 Nov 2001 02:36:08 GMT"
                   NS2:LastPingContentLen="265"
                   NS2:LastPingDate="1017917990" />
</RDF:RDF>
# Mozilla User Preferences
// This is a generated file!

user_pref("browser.cache.disk.parent_directory", "/home/me/.mozilla/default/e7sewxnw.slt");
user_pref("browser.download.dir", "/home/me");
user_pref("browser.download.progressDnldDialog.keepAlive", false);
user_pref("browser.history.last_page_visited", "http://www.zwire.com/site/news.cfm?newsid=3759557&brd=2185&PAG=699&dept_id=416046&startrow=1&MaxRows=10");
user_pref("browser.search.defaultengine", "engine:///usr/lib/mozilla/searchplugins/NetscapeSearch.src");
user_pref("browser.startup.homepage", "http://www.kuro5hin.org/");
user_pref("browser.startup.homepage_override.mstone", "rv:0.9.9");
user_pref("browser.tabs.loadInBackground", true);
user_pref("browser.tabs.opentabfor.middleclick", true);
user_pref("browser.tabs.opentabfor.urlbar", true);
user_pref("browser.tabs.opentabfor.windowopen", true);
user_pref("browser.toolbars.showbutton.bookmarks", false);
user_pref("browser.toolbars.showbutton.go", true);
user_pref("browser.toolbars.showbutton.search", false);
user_pref("dom.disable_open_during_load", true);
user_pref("font.name.cursive.x-western", "Agfa Monotype-andale mono-iso8859-1");
user_pref("font.name.fantasy.x-western", "Agfa Monotype-andale mono-iso8859-1");
user_pref("font.name.serif.x-western", "monotype-times new roman-iso8859-1");
user_pref("ldap_2.prefs_migrated", true);
user_pref("mail.ui.folderpane.version", 2);
user_pref("mailnews.ui.threadpane.version", 2);
user_pref("plugin.soname.list", "libXt.so:libXext.so");
user_pref("prefs.converted-to-utf8", true);
user_pref("print.selection_radio_enabled", false);
user_pref("print.tmp.printerfeatures.default.has_special_printerfeatures", false);
user_pref("security.warn_entering_secure", false);
user_pref("security.warn_leaving_secure", false);
user_pref("security.warn_submit_insecure", false);
user_pref("signon.SignonFileName", "17536275.s");
user_pref("timebomb.first_launch_time", "1017536203496796");
user_pref("update_notifications.provider.0.last_checked", 1018336223);
user_pref("wallet.SchemaValueFileName", "17536275.w");
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#define ac97_init	_set_ver(ac97_init)
#define __ver_ac97_set_values	smp_b54d50b4
#define ac97_set_values	_set_ver(ac97_set_values)
#define __ver_ac97_set_mixer	smp_9516d1c3
#define ac97_set_mixer	_set_ver(ac97_set_mixer)
#define __ver_ac97_get_register	smp_73c292c2
#define ac97_get_register	_set_ver(ac97_get_register)
#define __ver_ac97_put_register	smp_b691a03d
#define ac97_put_register	_set_ver(ac97_put_register)
#define __ver_ac97_get_mixer_scaled	smp_e221a32a
#define ac97_get_mixer_scaled	_set_ver(ac97_get_mixer_scaled)
#define __ver_ac97_mixer_ioctl	smp_6b77dc5c
#define ac97_mixer_ioctl	_set_ver(ac97_mixer_ioctl)
#define __ver_ac97_reset	smp_d566eebe
#define ac97_reset	_set_ver(ac97_reset)
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	STORE7					/*  Store (optional)		*/;	\
	faligndata	%F12, %F14, %A12	/*  FPA				*/;	\
	fpadd32		%F12, %f12, %F12	/*  FPA		Group		*/;	\
	srl		%x3, 1, %x3		/*  IEU0			*/;	\
	fcmpgt32	%f10, %F10, %x6		/*  FPM				*/;	\
	add		%sum, %x2, %sum		/*  IEU0	Group		*/;	\
	inc		%x4			/*  IEU1			*/;	\
	STORE8					/*  Store (optional)		*/;	\
	fmovd		%F14, %B14		/*  FPA				*/;	\
	fpadd32		%F14, %f14, %F14	/*  FPA		Group		*/;	\
	srl		%x4, 1, %x4		/*  IEU0			*/;	\
	fcmpgt32	%f12, %F12, %x7		/*  FPM				*/;	\
	add		%sum, %x3, %sum		/*  IEU0	Group		*/;	\
	subcc		%len, 64, %len		/*  IEU1			*/;	\
	BRANCH					/*  CTI				*/;	\
	fcmpgt32	%f14, %F14, %x8		/*  FPM		Group		*/;

#define END_THE_TRICK(f0,f2,f4,f6,f8,f10,f12,f14,FA,FB,S0,S1,S2,S3,T0,T1,U0,fz) \
	inc		%x5			/*  IEU0	Group		*/;	\
	fpadd32		%f2, %f0, %S0		/*  FPA				*/;	\
	add		%sum, %x4, %sum		/*  IEU1			*/;	\
	srl		%x5, 1, %x5		/*  IEU0	Group		*/;	\
	fpadd32		%f6, %f4, %S1		/*  FPA				*/;	\
	inc		%x6			/*  IEU1			*/;	\
	fpadd32		%f10, %f8, %S2		/*  FPA		Group		*/;	\
	add		%sum, %x5, %sum		/*  IEU0			*/;	\
	fcmpgt32	%f0, %S0, %x1		/*  FPM				*/;	\
	fpadd32		%f14, %f12, %S3		/*  FPA		Group		*/;	\
	srl		%x6, 1, %x6		/*  IEU0			*/;	\
	fcmpgt32	%f4, %S1, %x2		/*  FPM				*/;	\
	add		%sum, %x6, %sum		/*  IEU0	Group		*/;	\
	fzero		%fz			/*  FPA				*/;	\
	fcmpgt32	%f8, %S2, %x3		/*  FPM				*/;	\
	inc		%x7			/*  IEU0	Group		*/;	\
	inc		%x8			/*  IEU1			*/;	\
	srl		%x7, 1, %x7		/*  IEU0	Group		*/;	\
	inc		%x1			/*  IEU1			*/;	\
	fpadd32		%S0, %S1, %T0		/*  FPA				*/;	\
	fpadd32		%S2, %S3, %T1		/*  FPA		Group		*/;	\
	add		%sum, %x7, %sum		/*  IEU0			*/;	\
	fcmpgt32	%f12, %S3, %x4		/*  FPM				*/;	\
	srl		%x8, 1, %x8		/*  IEU0	Group		*/;	\
	inc		%x2			/*  IEU1			*/;	\
	srl		%x1, 1, %x1		/*  IEU0	Group		*/;	\
	add		%sum, %x8, %sum		/*  IEU1			*/;	\
	add		%sum, %x1, %sum		/*  IEU0	Group		*/;	\
	fcmpgt32	%S0, %T0, %x5		/*  FPM				*/;	\
	srl		%x2, 1, %x2		/*  IEU0	Group		*/;	\
	fcmpgt32	%S2, %T1, %x6		/*  FPM				*/;	\
	inc		%x3			/*  IEU0	Group		*/;	\
	add		%sum, %x2, %sum		/*  IEU1			*/;	\
	srl		%x3, 1, %x3		/*  IEU0	Group		*/;	\
	inc		%x4			/*  IEU1			*/;	\
	fpadd32		%T0, %T1, %U0		/*  FPA		Group		*/;	\
	add		%sum, %x3, %sum		/*  IEU0			*/;	\
	fcmpgt32	%fz, %f2, %x7		/*  FPM				*/;	\
	srl		%x4, 1, %x4		/*  IEU0	Group		*/;	\
	fcmpgt32	%fz, %f6, %x8		/*  FPM				*/;	\
	inc		%x5			/*  IEU0	Group		*/;	\
	add		%sum, %x4, %sum		/*  IEU1			*/;	\
	srl		%x5, 1, %x5		/*  IEU0	Group		*/;	\
	fcmpgt32	%fz, %f10, %x1		/*  FPM				*/;	\
	inc		%x6			/*  IEU0	Group		*/;	\
	add		%sum, %x5, %sum		/*  IEU1			*/;	\
	fmovd		%FA, %FB		/*  FPA		Group		*/;	\
	fcmpgt32	%fz, %f14, %x2		/*  FPM				*/;	\
	srl		%x6, 1, %x6		/*  IEU0	Group		*/;	\
	ba,pt		%xcc, ett		/*  CTI				*/;	\
	 inc		%x7			/*  IEU1			*/;

#define END_THE_TRICK1(f0,f2,f4,f6,f8,f10,f12,f14,FA,FB) 				\
	END_THE_TRICK(f0,f2,f4,f6,f8,f10,f12,f14,FA,FB,f48,f50,f52,f54,f56,f58,f60,f62)

#define END_THE_TRICK2(S0,S1,S2,S3,T0,T1,U0,U1,V0,fz) 					\
	fpadd32		%U0, %U1, %V0		/*  FPA		Group		*/;	\
	srl		%x7, 1, %x7		/*  IEU0			*/;	\
	add		%sum, %x6, %sum		/*  IEU1			*/;	\
	std		%V0, [%sp + STACKOFF]	/*  Store	Group		*/;	\
	inc		%x8			/*  IEU0			*/;	\
	sub		%sum, %x7, %sum		/*  IEU1			*/;	\
	srl		%x8, 1, %x8		/*  IEU0	Group		*/;	\
	fcmpgt32	%fz, %S1, %x3		/*  FPM				*/;	\
	inc		%x1			/*  IEU0	Group		*/;	\
	fcmpgt32	%fz, %S3, %x4		/*  FPM				*/;	\
	srl		%x1, 1, %x1		/*  IEU0	Group		*/;	\
	sub		%sum, %x8, %sum		/*  IEU1			*/;	\
	ldx		[%sp + STACKOFF], %x8	/*  Load	Group		*/;	\
	inc		%x2			/*  IEU0			*/;	\
	sub		%sum, %x1, %sum		/*  IEU1			*/;	\
	srl		%x2, 1, %x2		/*  IEU0	Group		*/;	\
	fcmpgt32	%fz, %T1, %x5		/*  FPM				*/;	\
	inc		%x3			/*  IEU0	Group		*/;	\
	fcmpgt32	%T0, %U0, %x6		/*  FPM				*/;	\
	srl		%x3, 1, %x3		/*  IEU0	Group		*/;	\
	sub		%sum, %x2, %sum		/*  IEU1			*/;	\
	inc		%x4			/*  IEU0	Group		*/;	\
	sub		%sum, %x3, %sum		/*  IEU1			*/;	\
	srl		%x4, 1, %x4		/*  IEU0	Group		*/;	\
	fcmpgt32	%fz, %U1, %x7		/*  FPM				*/;	\
	inc		%x5			/*  IEU0	Group		*/;	\
	fcmpgt32	%U0, %V0, %x1		/*  FPM				*/;	\
	srl		%x5, 1, %x5		/*  IEU0	Group		*/;	\
	sub		%sum, %x4, %sum		/*  IEU1			*/;	\
	sub		%sum, %x5, %sum		/*  IEU0	Group		*/;	\
	fcmpgt32	%fz, %V0, %x2		/*  FPM				*/;	\
	inc		%x6			/*  IEU0	Group		*/;	\
	inc		%x7			/*  IEU1			*/;	\
	srl		%x6, 1, %x6		/*  IEU0	Group		*/;	\
	inc		%x1			/*  IEU1			*/;	\
	srl		%x7, 1, %x7		/*  IEU0	Group		*/;	\
	add		%sum, %x6, %sum		/*  IEU1			*/;	\
	srl		%x1, 1, %x1		/*  IEU0	Group		*/;	\
	sub		%sum, %x7, %sum		/*  IEU1			*/;	\
	inc		%x2			/*  IEU0	Group		*/;	\
	add		%sum, %x1, %sum		/*  IEU1			*/;	\
	srl		%x2, 1, %x2		/*  IEU0	Group		*/;	\
	sub		%sum, %x2, %sum		/*  IEU0	Group		*/;	\
	addcc		%sum, %x8, %sum		/*  IEU1	Group		*/;	\
	bcs,a,pn	%xcc, 33f		/*  CTI				*/;	\
	 add		%sum, 1, %sum		/*  IEU0	(Group)		*/;	\
33:						/*  That's it			*/;

	.text
	.globl		csum_partial_copy_user_vis
	.align		32
/* %asi should be either ASI_P or ASI_AIUS for csum_partial_copy resp.
 * csum_partial_copy_from_user
 * This assumes that !((%src^%dst)&3) && !((%src|%dst)&1) && %len >= 256
 */
csum_partial_copy_user_vis:
	andcc		%dst, 7, %g0		/*  IEU1	Group		*/
	be,pt		%icc, 4f		/*  CTI				*/
	 and		%dst, 0x38, %o4		/*  IEU0			*/
	mov		1, %g5			/*  IEU0	Group		*/
	andcc		%dst, 2, %g0		/*  IEU1			*/
	be,pt		%icc, 1f		/*  CTI				*/
	 and		%dst, 4, %g7		/*  IEU0	Group		*/
	lduh		[%src], %g2		/*  Load			*/
	sub		%len, 2, %len		/*  IEU0	Group		*/
	add		%dst, 2, %dst		/*  IEU1			*/
	andcc		%dst, 4, %g7		/*  IEU1	Group		*/
	sll		%g5, 16, %g5		/*  IEU0			*/
	stha		%g2, [%dst - 2]	%asi	/*  Store	Group		*/
	sll		%g2, 16, %g2		/*  IEU0	 		*/
	add		%src, 2, %src		/*  IEU1			*/
	addcc		%g2, %sum, %sum		/*  IEU1	Group		*/
	bcs,a,pn	%icc, 1f		/*  CTI				*/
	 add		%sum, %g5, %sum		/*  IEU0			*/
1:	lduw		[%src], %g2		/*  Load			*/
	brz,a,pn	%g7, 4f			/*  CTI+IEU1	Group		*/
	 and		%dst, 0x38, %o4		/*  IEU0			*/
	add		%dst, 4, %dst		/*  IEU0	Group		*/
	sub		%len, 4, %len		/*  IEU1			*/
	addcc		%g2, %sum, %sum		/*  IEU1	Group		*/
	bcs,a,pn	%icc, 1f		/*  CTI				*/
	 add		%sum, 1, %sum		/*  IEU0			*/
1:	and		%dst, 0x38, %o4		/*  IEU0	Group		*/
	stwa		%g2, [%dst - 4] %asi	/*  Store			*/
	add		%src, 4, %src		/*  IEU1			*/
4:
#ifdef __KERNEL__
	VISEntry
#endif
	mov		%src, %g7		/*  IEU1	Group		*/
	fzero		%f48			/*  FPA				*/
	alignaddr	%src, %g0, %src		/*  Single	Group		*/
	subcc		%g7, %src, %g7		/*  IEU1	Group		*/
	be,pt		%xcc, 1f		/*  CTI				*/
	 mov		0x40, %g1		/*  IEU0			*/
	lduw		[%src], %g2		/*  Load	Group		*/
	subcc		%sum, %g2, %sum		/*  IEU1	Group+load stall*/
	bcs,a,pn	%icc, 1f		/*  CTI				*/
	 sub		%sum, 1, %sum		/*  IEU0			*/
1:	srl		%sum, 0, %sum		/*  IEU0	Group		*/
	clr		%g5			/*  IEU1			*/
	brz,pn		%o4, 3f			/*  CTI+IEU1	Group		*/
	 sub		%g1, %o4, %g1		/*  IEU0			*/
	ldd		[%src], %f0		/*  Load			*/
	clr		%o4			/*  IEU0	Group		*/
	andcc		%dst, 8, %g0		/*  IEU1			*/
	be,pn		%icc, 1f		/*  CTI				*/
	 ldd		[%src + 8], %f2		/*  Load	Group		*/
	add		%src, 8, %src		/*  IEU0			*/
	sub		%len, 8, %len		/*  IEU1			*/
	fpadd32		%f0, %f48, %f50		/*  FPA				*/
	addcc		%dst, 8, %dst		/*  IEU1	Group		*/
	faligndata	%f0, %f2, %f16		/*  FPA				*/
	fcmpgt32	%f48, %f50, %o4		/*  FPM		Group		*/
	fmovd		%f2, %f0		/*  FPA		Group		*/
	ldd		[%src + 8], %f2		/*  Load			*/
	stda		%f16, [%dst - 8] %asi	/*  Store			*/
	fmovd		%f50, %f48		/*  FPA				*/
1:	andcc		%g1, 0x10, %g0		/*  IEU1	Group		*/
	be,pn		%icc, 1f		/*  CTI				*/
	 and		%g1, 0x20, %g1		/*  IEU0			*/
	fpadd32		%f0, %f48, %f50		/*  FPA				*/
	ldd		[%src + 16], %f4	/*  Load	Group		*/
	add		%src, 16, %src		/*  IEU0			*/
	add		%dst, 16, %dst		/*  IEU1			*/
	faligndata	%f0, %f2, %f16		/*  FPA				*/
	fcmpgt32	%f48, %f50, %g5		/*  FPM		Group		*/
	sub		%len, 16, %len		/*  IEU0			*/
	inc		%o4			/*  IEU1			*/
	stda		%f16, [%dst - 16] %asi	/*  Store	Group		*/
	fpadd32		%f2, %f50, %f48		/*  FPA				*/
	srl		%o4, 1, %o5		/*  IEU0			*/
	faligndata	%f2, %f4, %f18		/*  FPA		Group		*/
	stda		%f18, [%dst - 8] %asi	/*  Store			*/
	fcmpgt32	%f50, %f48, %o4		/*  FPM		Group		*/
	add		%o5, %sum, %sum		/*  IEU0			*/
	ldd		[%src + 8], %f2		/*  Load			*/
	fmovd		%f4, %f0		/*  FPA				*/
1:	brz,a,pn	%g1, 4f			/*  CTI+IEU1	Group		*/
	 rd		%asi, %g2		/*  LSU		Group + 4 bubbles*/
	inc		%g5			/*  IEU0			*/
	fpadd32		%f0, %f48, %f50		/*  FPA				*/
	ldd		[%src + 16], %f4	/*  Load	Group		*/
	srl		%g5, 1, %g5		/*  IEU0			*/
	add		%dst, 32, %dst		/*  IEU1			*/
	faligndata	%f0, %f2, %f16		/*  FPA				*/
	fcmpgt32	%f48, %f50, %o5		/*  FPM		Group		*/
	inc		%o4			/*  IEU0			*/
	ldd		[%src + 24], %f6	/*  Load			*/
	srl		%o4, 1, %o4		/*  IEU0	Group		*/
	add		%g5, %sum, %sum		/*  IEU1			*/
	ldd		[%src + 32], %f8	/*  Load			*/
	fpadd32		%f2, %f50, %f48		/*  FPA				*/
	faligndata	%f2, %f4, %f18		/*  FPA		Group		*/
	sub		%len, 32, %len		/*  IEU0			*/
	stda		%f16, [%dst - 32] %asi	/*  Store			*/
	fcmpgt32	%f50, %f48, %g3		/*  FPM		Group		*/
	inc		%o5			/*  IEU0			*/
	add		%o4, %sum, %sum		/*  IEU1			*/
	fpadd32		%f4, %f48, %f50		/*  FPA				*/
	faligndata	%f4, %f6, %f20		/*  FPA		Group		*/
	srl		%o5, 1, %o5		/*  IEU0			*/
	fcmpgt32	%f48, %f50, %g5		/*  FPM		Group		*/
	add		%o5, %sum, %sum		/*  IEU0			*/
	stda		%f18, [%dst - 24] %asi	/*  Store			*/
	fpadd32		%f6, %f50, %f48		/*  FPA				*/
	inc		%g3			/*  IEU0	Group		*/
	stda		%f20, [%dst - 16] %asi	/*  Store			*/
	add		%src, 32, %src		/*  IEU1			*/
	faligndata	%f6, %f8, %f22		/*  FPA				*/
	fcmpgt32	%f50, %f48, %o4		/*  FPM		Group		*/
	srl		%g3, 1, %g3		/*  IEU0			*/
	stda		%f22, [%dst - 8] %asi	/*  Store			*/	
	add		%g3, %sum, %sum		/*  IEU0	Group		*/
3:	rd		%asi, %g2		/*  LSU		Group + 4 bubbles*/
#ifdef __KERNEL__
4:	sethi		%hi(vis0s), %g7		/*  IEU0	Group		*/
	or		%g2, ASI_BLK_OR, %g2	/*  IEU1			*/
#else
4:	rd		%pc, %g7		/*  LSU		Group + 4 bubbles*/
#endif
	inc		%g5			/*  IEU0	Group		*/
	and		%src, 0x38, %g3		/*  IEU1			*/	
	membar		#StoreLoad		/*  LSU		Group		*/
	srl		%g5, 1, %g5		/*  IEU0			*/
	inc		%o4			/*  IEU1			*/
	sll		%g3, 8, %g3		/*  IEU0	Group		*/
	sub		%len, 0xc0, %len	/*  IEU1			*/
	addcc		%g5, %sum, %sum		/*  IEU1	Group		*/
	srl		%o4, 1, %o4		/*  IEU0			*/
	add		%g7, %g3, %g7		/*  IEU0	Group		*/
	add		%o4, %sum, %sum		/*  IEU1			*/
#ifdef __KERNEL__
	jmpl		%g7 + %lo(vis0s), %g0	/*  CTI+IEU1	Group		*/
#else
	jmpl		%g7 + (vis0s - 4b), %g0	/*  CTI+IEU1	Group		*/
#endif
	 fzero		%f32			/*  FPA				*/

	.align		2048
vis0s:	wr		%g2, ASI_BLK_XOR, %asi	/*  LSU		Group		*/
	ldda		[%src] ASI_BLK_P, %f0	/*  Load	Group		*/
	add		%src, 64, %src		/*  IEU0	Group		*/
	ldda		[%src] ASI_BLK_P, %f16	/*  Load	Group		*/
	add		%src, 64, %src		/*  IEU0	Group		*/
	fmovd		%f48, %f62		/*  FPA		Group	f0 available*/
	faligndata	%f0, %f2, %f48		/*  FPA		Group	f2 available*/
	fcmpgt32	%f32, %f2, %x1		/*  FPM		Group	f4 available*/
	fpadd32		%f0, %f62, %f0		/*  FPA				*/
	fcmpgt32	%f32, %f4, %x2		/*  FPM		Group	f6 available*/
	faligndata	%f2, %f4, %f50		/*  FPA				*/
	fcmpgt32	%f62, %f0, %x3		/*  FPM		Group	f8 available*/
	faligndata	%f4, %f6, %f52		/*  FPA				*/
	fcmpgt32	%f32, %f6, %x4		/*  FPM		Group	f10 available*/
	inc		%x1			/*  IEU0			*/
	faligndata	%f6, %f8, %f54		/*  FPA				*/
	fcmpgt32	%f32, %f8, %x5		/*  FPM		Group	f12 available*/
	srl		%x1, 1, %x1		/*  IEU0			*/
	inc		%x2			/*  IEU1			*/
	faligndata	%f8, %f10, %f56		/*  FPA				*/
	fcmpgt32	%f32, %f10, %x6		/*  FPM		Group	f14 available*/
	srl		%x2, 1, %x2		/*  IEU0			*/
	add		%sum, %x1, %sum		/*  IEU1			*/
	faligndata	%f10, %f12, %f58	/*  FPA				*/
	fcmpgt32	%f32, %f12, %x7		/*  FPM		Group		*/
	inc		%x3			/*  IEU0			*/
	add		%sum, %x2, %sum		/*  IEU1			*/
	faligndata	%f12, %f14, %f60	/*  FPA				*/
	fcmpgt32	%f32, %f14, %x8		/*  FPM		Group		*/
	srl		%x3, 1, %x3		/*  IEU0			*/
	inc		%x4			/*  IEU1			*/
	fmovd		%f14, %f62		/*  FPA				*/
	srl		%x4, 1, %x4		/*  IEU0	Group		*/
	add		%sum, %x3, %sum		/*  IEU1			*/
vis0:	DO_THE_TRICK(	f0,f2,f4,f6,f8,f10,f12,f14,f16,f18,f20,f22,f24,f26,f28,f30,
			,f48,f50,f52,f54,f56,f58,f60,f62,f62,								
			,LDBLK(f32),	STBLK,,,,,,,,									
			,bcs,pn %icc, vis0e1)
	DO_THE_TRICK(	f16,f18,f20,f22,f24,f26,f28,f30,f32,f34,f36,f38,f40,f42,f44,f46,
			,f48,f50,f52,f54,f56,f58,f60,f62,f62,								
			,LDBLK(f0),	STBLK,,,,,,,,									
			,bcs,pn %icc, vis0e2)
	DO_THE_TRICK(	f32,f34,f36,f38,f40,f42,f44,f46,f0,f2,f4,f6,f8,f10,f12,f14,	
			,f48,f50,f52,f54,f56,f58,f60,f62,f62,
			,LDBLK(f16),	STBLK,,,,,,,,
			,bcc,pt %icc, vis0)
vis0e3:	DO_THE_TRICK(	f0,f2,f4,f6,f8,f10,f12,f14,f16,f18,f20,f22,f24,f26,f28,f30,	
			,f48,f50,f52,f54,f56,f58,f60,f62,f32,
			,SYNC,		STBLK_XORASI(x1,x2),ST(f48,64),ST(f50,8),ST(f52,16),ST(f54,24),ST(f56,32),ST(f58,40),ST(f60,48),
			,add %dst, 56, %dst; add %len, 192 - 8*8, %len; ba,pt %icc, e2)
vis0e1:	DO_THE_TRICK(	f16,f18,f20,f22,f24,f26,f28,f30,f32,f34,f36,f38,f40,f42,f44,f46,
			,f48,f50,f52,f54,f56,f58,f60,f62,f0,
			,SYNC,		STBLK_XORASI(x1,x2),ST(f48,64),ST(f50,8),ST(f52,16),ST(f54,24),ST(f56,32),ST(f58,40),ST(f60,48),
			,add %dst, 56, %dst; add %len, 192 - 8*8, %len; ba,pt %icc, e3)
vis0e2:	DO_THE_TRICK(	f32,f34,f36,f38,f40,f42,f44,f46,f0,f2,f4,f6,f8,f10,f12,f14,	
			,f48,f50,f52,f54,f56,f58,f60,f62,f16,
			,SYNC,		STBLK_XORASI(x1,x2),ST(f48,64),ST(f50,8),ST(f52,16),ST(f54,24),ST(f56,32),ST(f58,40),ST(f60,48),
			,add %dst, 56, %dst; add %len, 192 - 8*8, %len; ba,pt %icc, e1)
	.align		2048
vis1s:	wr		%g2, ASI_BLK_XOR, %asi	/*  LSU		Group		*/
	sub		%src, 8, %src		/*  IEU0	Group		*/
	ldda		[%src] ASI_BLK_P, %f0	/*  Load	Group		*/
	add		%src, 64, %src		/*  IEU0	Group		*/
	ldda		[%src] ASI_BLK_P, %f16	/*  Load	Group		*/
	add		%src, 64, %src		/*  IEU0	Group		*/
	fmovd		%f0, %f58		/*  FPA		Group		*/
	fmovd		%f48, %f0		/*  FPA		Group		*/
	fcmpgt32	%f32, %f2, %x2		/*  FPM		Group		*/
	faligndata	%f2, %f4, %f48		/*  FPA				*/
	fcmpgt32	%f32, %f4, %x3		/*  FPM		Group		*/
	faligndata	%f4, %f6, %f50		/*  FPA				*/
	fcmpgt32	%f32, %f6, %x4		/*  FPM		Group		*/
	faligndata	%f6, %f8, %f52		/*  FPA				*/
	fcmpgt32	%f32, %f8, %x5		/*  FPM		Group		*/
	inc		%x2			/*  IEU1			*/
	faligndata	%f8, %f10, %f54		/*  FPA				*/
	fcmpgt32	%f32, %f10, %x6		/*  FPM		Group		*/
	srl		%x2, 1, %x2		/*  IEU0			*/
	faligndata	%f10, %f12, %f56	/*  FPA				*/
	fcmpgt32	%f32, %f12, %x7		/*  FPM		Group		*/
	inc		%x3			/*  IEU0			*/
	add		%sum, %x2, %sum		/*  IEU1			*/
	faligndata	%f12, %f14, %f58	/*  FPA				*/
	fcmpgt32	%f32, %f14, %x8		/*  FPM		Group		*/
	srl		%x3, 1, %x3		/*  IEU0			*/
	inc		%x4			/*  IEU1			*/
	fmovd		%f14, %f60		/*  FPA				*/
	srl		%x4, 1, %x4		/*  IEU0	Group		*/
	add		%sum, %x3, %sum		/*  IEU1			*/
vis1:	DO_THE_TRICK(	f0,f2,f4,f6,f8,f10,f12,f14,f16,f18,f20,f22,f24,f26,f28,f30,	
			,f62,f48,f50,f52,f54,f56,f58,f60,f60,
			,LDBLK(f32),	,STBLK,,,,,,,
			,bcs,pn %icc, vis1e1)
	DO_THE_TRICK(	f16,f18,f20,f22,f24,f26,f28,f30,f32,f34,f36,f38,f40,f42,f44,f46,
			,f62,f48,f50,f52,f54,f56,f58,f60,f60,
			,LDBLK(f0),	,STBLK,,,,,,,
			,bcs,pn %icc, vis1e2)
	DO_THE_TRICK(	f32,f34,f36,f38,f40,f42,f44,f46,f0,f2,f4,f6,f8,f10,f12,f14,	
			,f62,f48,f50,f52,f54,f56,f58,f60,f60,
			,LDBLK(f16),	,STBLK,,,,,,,
			,bcc,pt %icc, vis1)
vis1e3:	DO_THE_TRICK(	f0,f2,f4,f6,f8,f10,f12,f14,f16,f18,f20,f22,f24,f26,f28,f30,	
			,f62,f48,f50,f52,f54,f56,f58,f60,f32,
			,SYNC,		,STBLK_XORASI(x1,x2),ST(f48,0),ST(f50,8),ST(f52,16),ST(f54,24),ST(f56,32),ST(f58,40),
			,add %dst, 48, %dst; add %len, 192 - 7*8, %len; ba,pt %icc, e2)
vis1e1:	DO_THE_TRICK(	f16,f18,f20,f22,f24,f26,f28,f30,f32,f34,f36,f38,f40,f42,f44,f46,
			,f62,f48,f50,f52,f54,f56,f58,f60,f0,
			,SYNC,		,STBLK_XORASI(x1,x2),ST(f48,0),ST(f50,8),ST(f52,16),ST(f54,24),ST(f56,32),ST(f58,40),
			,add %dst, 48, %dst; add %len, 192 - 7*8, %len; ba,pt %icc, e3)
vis1e2:	DO_THE_TRICK(	f32,f34,f36,f38,f40,f42,f44,f46,f0,f2,f4,f6,f8,f10,f12,f14,	
			,f62,f48,f50,f52,f54,f56,f58,f60,f16,
			,SYNC,		,STBLK_XORASI(x1,x2),ST(f48,0),ST(f50,8),ST(f52,16),ST(f54,24),ST(f56,32),ST(f58,40),
			,add %dst, 48, %dst; add %len, 192 - 7*8, %len; ba,pt %icc, e1)
	.align		2048
vis2s:	wr		%g2, ASI_BLK_XOR, %asi	/*  LSU		Group		*/
	sub		%src, 16, %src		/*  IEU0	Group		*/
	ldda		[%src] ASI_BLK_P, %f0	/*  Load	Group		*/
	add		%src, 64, %src		/*  IEU0	Group		*/
	ldda		[%src] ASI_BLK_P, %f16	/*  Load	Group		*/
	add		%src, 64, %src		/*  IEU0	Group		*/
	fmovd		%f0, %f56		/*  FPA		Group		*/
	fmovd		%f48, %f0		/*  FPA		Group		*/	
	sub		%dst, 64, %dst		/*  IEU0			*/
	fpsub32		%f2, %f2, %f2		/*  FPA		Group		*/
	fcmpgt32	%f32, %f4, %x3		/*  FPM		Group		*/
	faligndata	%f4, %f6, %f48		/*  FPA				*/
	fcmpgt32	%f32, %f6, %x4		/*  FPM		Group		*/
	faligndata	%f6, %f8, %f50		/*  FPA				*/
	fcmpgt32	%f32, %f8, %x5		/*  FPM		Group		*/
	faligndata	%f8, %f10, %f52		/*  FPA				*/
	fcmpgt32	%f32, %f10, %x6		/*  FPM		Group		*/
	faligndata	%f10, %f12, %f54	/*  FPA				*/
	fcmpgt32	%f32, %f12, %x7		/*  FPM		Group		*/
	inc		%x3			/*  IEU0			*/
	faligndata	%f12, %f14, %f56	/*  FPA				*/
	fcmpgt32	%f32, %f14, %x8		/*  FPM		Group		*/
	srl		%x3, 1, %x3		/*  IEU0			*/
	inc		%x4			/*  IEU1			*/
	fmovd		%f14, %f58		/*  FPA				*/
	srl		%x4, 1, %x4		/*  IEU0	Group		*/
	add		%sum, %x3, %sum		/*  IEU1			*/
vis2:	DO_THE_TRICK(	f0,f2,f4,f6,f8,f10,f12,f14,f16,f18,f20,f22,f24,f26,f28,f30,	
			,f60,f62,f48,f50,f52,f54,f56,f58,f58,
			,LDBLK(f32),	,,STBLK,,,,,,
			,bcs,pn %icc, vis2e1)
	DO_THE_TRICK(	f16,f18,f20,f22,f24,f26,f28,f30,f32,f34,f36,f38,f40,f42,f44,f46,
			,f60,f62,f48,f50,f52,f54,f56,f58,f58,
			,LDBLK(f0),	,,STBLK,,,,,,
			,bcs,pn %icc, vis2e2)
	DO_THE_TRICK(	f32,f34,f36,f38,f40,f42,f44,f46,f0,f2,f4,f6,f8,f10,f12,f14,	
			,f60,f62,f48,f50,f52,f54,f56,f58,f58,
			,LDBLK(f16),	,,STBLK,,,,,,
			,bcc,pt %icc, vis2)
vis2e3:	DO_THE_TRICK(	f0,f2,f4,f6,f8,f10,f12,f14,f16,f18,f20,f22,f24,f26,f28,f30,	
			,f60,f62,f48,f50,f52,f54,f56,f58,f32,
			,SYNC,		,,STBLK_XORASI(x2,x3),ST(f48,64),ST(f50,72),ST(f52,80),ST(f54,88),ST(f56,96),
			,add %dst, 104, %dst; add %len, 192 - 6*8, %len; ba,pt %icc, e2)
vis2e1:	DO_THE_TRICK(	f16,f18,f20,f22,f24,f26,f28,f30,f32,f34,f36,f38,f40,f42,f44,f46,
			,f60,f62,f48,f50,f52,f54,f56,f58,f0,
			,SYNC,		,,STBLK_XORASI(x2,x3),ST(f48,64),ST(f50,72),ST(f52,80),ST(f54,88),ST(f56,96),
			,add %dst, 104, %dst; add %len, 192 - 6*8, %len; ba,pt %icc, e3)
vis2e2:	DO_THE_TRICK(	f32,f34,f36,f38,f40,f42,f44,f46,f0,f2,f4,f6,f8,f10,f12,f14,	
			,f60,f62,f48,f50,f52,f54,f56,f58,f16,
			,SYNC,		,,STBLK_XORASI(x2,x3),ST(f48,64),ST(f50,72),ST(f52,80),ST(f54,88),ST(f56,96),
			,add %dst, 104, %dst; add %len, 192 - 6*8, %len; ba,pt %icc, e1)
	.align		2048
vis3s:	wr		%g2, ASI_BLK_XOR, %asi	/*  LSU		Group		*/
	sub		%src, 24, %src		/*  IEU0	Group		*/
	ldda		[%src] ASI_BLK_P, %f0	/*  Load	Group		*/
	add		%src, 64, %src		/*  IEU0	Group		*/
	ldda		[%src] ASI_BLK_P, %f16	/*  Load	Group		*/
	add		%src, 64, %src		/*  IEU0	Group		*/
	fmovd		%f0, %f54		/*  FPA		Group		*/
	fmovd		%f48, %f0		/*  FPA		Group		*/
	sub		%dst, 64, %dst		/*  IEU0			*/
	fpsub32		%f2, %f2, %f2		/*  FPA		Group		*/
	fpsub32		%f4, %f4, %f4		/*  FPA		Group		*/
	fcmpgt32	%f32, %f6, %x4		/*  FPM		Group		*/
	faligndata	%f6, %f8, %f48		/*  FPA				*/
	fcmpgt32	%f32, %f8, %x5		/*  FPM		Group		*/
	faligndata	%f8, %f10, %f50		/*  FPA				*/
	fcmpgt32	%f32, %f10, %x6		/*  FPM		Group		*/
	faligndata	%f10, %f12, %f52	/*  FPA				*/
	fcmpgt32	%f32, %f12, %x7		/*  FPM		Group		*/
	faligndata	%f12, %f14, %f54	/*  FPA				*/
	fcmpgt32	%f32, %f14, %x8		/*  FPM		Group		*/
	fmovd		%f14, %f56		/*  FPA				*/
	inc		%x4			/*  IEU0			*/
	srl		%x4, 1, %x4		/*  IEU0	Group		*/
vis3:	DO_THE_TRICK(	f0,f2,f4,f6,f8,f10,f12,f14,f16,f18,f20,f22,f24,f26,f28,f30,	
			,f58,f60,f62,f48,f50,f52,f54,f56,f56,
			,LDBLK(f32),	,,,STBLK,,,,,
			,bcs,pn %icc, vis3e1)
	DO_THE_TRICK(	f16,f18,f20,f22,f24,f26,f28,f30,f32,f34,f36,f38,f40,f42,f44,f46,
			,f58,f60,f62,f48,f50,f52,f54,f56,f56,
			,LDBLK(f0),	,,,STBLK,,,,,
			,bcs,pn %icc, vis3e2)
	DO_THE_TRICK(	f32,f34,f36,f38,f40,f42,f44,f46,f0,f2,f4,f6,f8,f10,f12,f14,	
			,f58,f60,f62,f48,f50,f52,f54,f56,f56,
			,LDBLK(f16),	,,,STBLK,,,,,
			,bcc,pt %icc, vis3)
vis3e3:	DO_THE_TRICK(	f0,f2,f4,f6,f8,f10,f12,f14,f16,f18,f20,f22,f24,f26,f28,f30,	
			,f58,f60,f62,f48,f50,f52,f54,f56,f32,
			,SYNC,		,,,STBLK_XORASI(x3,x4),ST(f48,64),ST(f50,72),ST(f52,80),ST(f54,88),
			,add %dst, 96, %dst; add %len, 192 - 5*8, %len; ba,pt %icc, e2)
vis3e1:	DO_THE_TRICK(	f16,f18,f20,f22,f24,f26,f28,f30,f32,f34,f36,f38,f40,f42,f44,f46,
			,f58,f60,f62,f48,f50,f52,f54,f56,f0,
			,SYNC,		,,,STBLK_XORASI(x3,x4),ST(f48,64),ST(f50,72),ST(f52,80),ST(f54,88),
			,add %dst, 96, %dst; add %len, 192 - 5*8, %len; ba,pt %icc, e3)
vis3e2:	DO_THE_TRICK(	f32,f34,f36,f38,f40,f42,f44,f46,f0,f2,f4,f6,f8,f10,f12,f14,	
			,f58,f60,f62,f48,f50,f52,f54,f56,f16,
			,SYNC,		,,,STBLK_XORASI(x3,x4),ST(f48,64),ST(f50,72),ST(f52,80),ST(f54,88),
			,add %dst, 96, %dst; add %len, 192 - 5*8, %len; ba,pt %icc, e1)
	.align		2048
vis4s:	wr		%g2, ASI_BLK_XOR, %asi	/*  LSU		Group		*/
	sub		%src, 32, %src		/*  IEU0	Group		*/
	ldda		[%src] ASI_BLK_P, %f0	/*  Load	Group		*/
	add		%src, 64, %src		/*  IEU0	Group		*/
	ldda		[%src] ASI_BLK_P, %f16	/*  Load	Group		*/
	add		%src, 64, %src		/*  IEU0	Group		*/
	fmovd		%f0, %f52		/*  FPA		Group		*/
	fmovd		%f48, %f0		/*  FPA		Group		*/
	sub		%dst, 64, %dst		/*  IEU0			*/
	fpsub32		%f2, %f2, %f2		/*  FPA		Group		*/
	fpsub32		%f4, %f4, %f4		/*  FPA		Group		*/
	fpsub32		%f6, %f6, %f6		/*  FPA		Group		*/
	clr		%x4			/*  IEU0			*/
	fcmpgt32	%f32, %f8, %x5		/*  FPM		Group		*/
	faligndata	%f8, %f10, %f48		/*  FPA				*/
	fcmpgt32	%f32, %f10, %x6		/*  FPM		Group		*/
	faligndata	%f10, %f12, %f50	/*  FPA				*/
	fcmpgt32	%f32, %f12, %x7		/*  FPM		Group		*/
	faligndata	%f12, %f14, %f52	/*  FPA				*/
	fcmpgt32	%f32, %f14, %x8		/*  FPM		Group		*/
	fmovd		%f14, %f54		/*  FPA				*/
vis4:	DO_THE_TRICK(	f0,f2,f4,f6,f8,f10,f12,f14,f16,f18,f20,f22,f24,f26,f28,f30,	
			,f56,f58,f60,f62,f48,f50,f52,f54,f54,
			,LDBLK(f32),	,,,,STBLK,,,,
			,bcs,pn %icc, vis4e1)
	DO_THE_TRICK(	f16,f18,f20,f22,f24,f26,f28,f30,f32,f34,f36,f38,f40,f42,f44,f46,
			,f56,f58,f60,f62,f48,f50,f52,f54,f54,
			,LDBLK(f0),	,,,,STBLK,,,,
			,bcs,pn %icc, vis4e2)
	DO_THE_TRICK(	f32,f34,f36,f38,f40,f42,f44,f46,f0,f2,f4,f6,f8,f10,f12,f14,	
			,f56,f58,f60,f62,f48,f50,f52,f54,f54,
			,LDBLK(f16),	,,,,STBLK,,,,
			,bcc,pt %icc, vis4)
vis4e3:	DO_THE_TRICK(	f0,f2,f4,f6,f8,f10,f12,f14,f16,f18,f20,f22,f24,f26,f28,f30,	
			,f56,f58,f60,f62,f48,f50,f52,f54,f32,
			,SYNC,		,,,,STBLK_XORASI(x4,x5),ST(f48,64),ST(f50,72),ST(f52,80),
			,add %dst, 88, %dst; add %len, 192 - 4*8, %len; ba,pt %icc, e2)
vis4e1:	DO_THE_TRICK(	f16,f18,f20,f22,f24,f26,f28,f30,f32,f34,f36,f38,f40,f42,f44,f46,
			,f56,f58,f60,f62,f48,f50,f52,f54,f0,
			,SYNC,		,,,,STBLK_XORASI(x4,x5),ST(f48,64),ST(f50,72),ST(f52,80),
			,add %dst, 88, %dst; add %len, 192 - 4*8, %len; ba,pt %icc, e3)
vis4e2:	DO_THE_TRICK(	f32,f34,f36,f38,f40,f42,f44,f46,f0,f2,f4,f6,f8,f10,f12,f14,	
			,f56,f58,f60,f62,f48,f50,f52,f54,f16,
			,SYNC,		,,,,STBLK_XORASI(x4,x5),ST(f48,64),ST(f50,72),ST(f52,80),
			,add %dst, 88, %dst; add %len, 192 - 4*8, %len; ba,pt %icc, e1)
	.align		2048
vis5s:	ldd		[%src+0], %f10		/*  Load	Group		*/
	ldd		[%src+8], %f12		/*  Load	Group		*/
	ldd		[%src+16], %f14		/*  Load	Group		*/
	add		%src, 24, %src		/*  IEU0	Group		*/
	wr		%g2, ASI_BLK_XOR, %asi	/*  LSU		Group		*/
	ldda		[%src] ASI_BLK_P, %f16	/*  Load	Group		*/
	add		%src, 64, %src		/*  IEU0	Group		*/
	fmovd		%f48, %f0		/*  FPA		Group		*/
	fmuld		%f32, %f32, %f2		/*  FPM				*/
	clr		%x4			/*  IEU0			*/
	faddd		%f32, %f32, %f4		/*  FPA		Group		*/
	fmuld		%f32, %f32, %f6		/*  FPM				*/
	clr		%x5			/*  IEU0			*/
	faddd		%f32, %f32, %f8		/*  FPA		Group		*/
	fcmpgt32	%f32, %f10, %x6		/*  FPM		Group		*/
	sub		%dst, 64, %dst		/*  IEU0			*/
	faligndata	%f10, %f12, %f48	/*  FPA				*/
	fcmpgt32	%f32, %f12, %x7		/*  FPM		Group		*/
	faligndata	%f12, %f14, %f50	/*  FPA				*/
	fcmpgt32	%f32, %f14, %x8		/*  FPM		Group		*/
	fmovd		%f14, %f52		/*  FPA				*/
vis5:	DO_THE_TRICK(	f0,f2,f4,f6,f8,f10,f12,f14,f16,f18,f20,f22,f24,f26,f28,f30,	
			,f54,f56,f58,f60,f62,f48,f50,f52,f52,
			,LDBLK(f32),	,,,,,STBLK,,,
			,bcs,pn %icc, vis5e1)
	DO_THE_TRICK(	f16,f18,f20,f22,f24,f26,f28,f30,f32,f34,f36,f38,f40,f42,f44,f46,
			,f54,f56,f58,f60,f62,f48,f50,f52,f52,
			,LDBLK(f0),	,,,,,STBLK,,,
			,bcs,pn %icc, vis5e2)
	DO_THE_TRICK(	f32,f34,f36,f38,f40,f42,f44,f46,f0,f2,f4,f6,f8,f10,f12,f14,	
			,f54,f56,f58,f60,f62,f48,f50,f52,f52,
			,LDBLK(f16),	,,,,,STBLK,,,
			,bcc,pt %icc, vis5)
vis5e3:	DO_THE_TRICK(	f0,f2,f4,f6,f8,f10,f12,f14,f16,f18,f20,f22,f24,f26,f28,f30,	
			,f54,f56,f58,f60,f62,f48,f50,f52,f32,
			,SYNC,		,,,,,STBLK_XORASI(x5,x6),ST(f48,64),ST(f50,72),
			,add %dst, 80, %dst; add %len, 192 - 3*8, %len; ba,pt %icc, e2)
vis5e1:	DO_THE_TRICK(	f16,f18,f20,f22,f24,f26,f28,f30,f32,f34,f36,f38,f40,f42,f44,f46,
			,f54,f56,f58,f60,f62,f48,f50,f52,f0,
			,SYNC,		,,,,,STBLK_XORASI(x5,x6),ST(f48,64),ST(f50,72),
			,add %dst, 80, %dst; add %len, 192 - 3*8, %len; ba,pt %icc, e3)
vis5e2:	DO_THE_TRICK(	f32,f34,f36,f38,f40,f42,f44,f46,f0,f2,f4,f6,f8,f10,f12,f14,	
			,f54,f56,f58,f60,f62,f48,f50,f52,f16,
			,SYNC,		,,,,,STBLK_XORASI(x5,x6),ST(f48,64),ST(f50,72),
			,add %dst, 80, %dst; add %len, 192 - 3*8, %len; ba,pt %icc, e1)
	.align		2048
vis6s:	ldd		[%src+0], %f12		/*  Load	Group		*/
	ldd		[%src+8], %f14		/*  Load	Group		*/
	add		%src, 16, %src		/*  IEU0	Group		*/
	wr		%g2, ASI_BLK_XOR, %asi	/*  LSU		Group		*/
	ldda		[%src] ASI_BLK_P, %f16	/*  Load	Group		*/
	add		%src, 64, %src		/*  IEU0	Group		*/
	fmovd		%f48, %f0		/*  FPA		Group		*/
	fmuld		%f32, %f32, %f2		/*  FPM				*/
	clr		%x4			/*  IEU0			*/
	faddd		%f32, %f32, %f4		/*  FPA		Group		*/
	fmuld		%f32, %f32, %f6		/*  FPM				*/
	clr		%x5			/*  IEU0			*/
	faddd		%f32, %f32, %f8		/*  FPA		Group		*/
	fmuld		%f32, %f32, %f10	/*  FPM				*/
	clr		%x6			/*  IEU0			*/
	fcmpgt32	%f32, %f12, %x7		/*  FPM		Group		*/
	sub		%dst, 64, %dst		/*  IEU0			*/
	fcmpgt32	%f32, %f14, %x8		/*  FPM		Group		*/
	faligndata	%f12, %f14, %f48	/*  FPA				*/
	fmovd		%f14, %f50		/*  FPA		Group		*/
vis6:	DO_THE_TRICK(	f0,f2,f4,f6,f8,f10,f12,f14,f16,f18,f20,f22,f24,f26,f28,f30,	
			,f52,f54,f56,f58,f60,f62,f48,f50,f50,
			,LDBLK(f32),	,,,,,,STBLK,,
			,bcs,pn %icc, vis6e1)
	DO_THE_TRICK(	f16,f18,f20,f22,f24,f26,f28,f30,f32,f34,f36,f38,f40,f42,f44,f46,
			,f52,f54,f56,f58,f60,f62,f48,f50,f50,
			,LDBLK(f0),	,,,,,,STBLK,,
			,bcs,pn %icc, vis6e2)
	DO_THE_TRICK(	f32,f34,f36,f38,f40,f42,f44,f46,f0,f2,f4,f6,f8,f10,f12,f14,	
			,f52,f54,f56,f58,f60,f62,f48,f50,f50,
			,LDBLK(f16),	,,,,,,STBLK,,
			,bcc,pt %icc, vis6)
vis6e3:	DO_THE_TRICK(	f0,f2,f4,f6,f8,f10,f12,f14,f16,f18,f20,f22,f24,f26,f28,f30,	
			,f52,f54,f56,f58,f60,f62,f48,f50,f32,
			,SYNC,		,,,,,,STBLK_XORASI(x6,x7),ST(f48,64),
			,add %dst, 72, %dst; add %len, 192 - 2*8, %len; ba,pt %icc, e2)
vis6e1:	DO_THE_TRICK(	f16,f18,f20,f22,f24,f26,f28,f30,f32,f34,f36,f38,f40,f42,f44,f46,
			,f52,f54,f56,f58,f60,f62,f48,f50,f0,
			,SYNC,		,,,,,,STBLK_XORASI(x6,x7),ST(f48,64),
			,add %dst, 72, %dst; add %len, 192 - 2*8, %len; ba,pt %icc, e3)
vis6e2:	DO_THE_TRICK(	f32,f34,f36,f38,f40,f42,f44,f46,f0,f2,f4,f6,f8,f10,f12,f14,	
			,f52,f54,f56,f58,f60,f62,f48,f50,f16,
			,SYNC,		,,,,,,STBLK_XORASI(x6,x7),ST(f48,64),
			,add %dst, 72, %dst; add %len, 192 - 2*8, %len; ba,pt %icc, e1)
	.align		2048
vis7s:	ldd		[%src+0], %f14		/*  Load	Group		*/
	add		%src, 8, %src		/*  IEU0	Group		*/
	wr		%g2, ASI_BLK_XOR, %asi	/*  LSU		Group		*/
	ldda		[%src] ASI_BLK_P, %f16	/*  Load	Group		*/
	add		%src, 64, %src		/*  IEU0	Group		*/
	fmovd		%f48, %f0		/*  FPA		Group		*/
	fmuld		%f32, %f32, %f2		/*  FPM				*/
	clr		%x4			/*  IEU0			*/
	faddd		%f32, %f32, %f4		/*  FPA		Group		*/
	fmuld		%f32, %f32, %f6		/*  FPM				*/
	clr		%x5			/*  IEU0			*/
	faddd		%f32, %f32, %f8		/*  FPA		Group		*/
	fmuld		%f32, %f32, %f10	/*  FPM				*/
	clr		%x6			/*  IEU0			*/
	faddd		%f32, %f32, %f12	/*  FPA		Group		*/
	clr		%x7			/*  IEU0			*/
	fcmpgt32	%f32, %f14, %x8		/*  FPM		Group		*/
	sub		%dst, 64, %dst		/*  IEU0			*/
	fmovd		%f14, %f48		/*  FPA				*/
vis7:	DO_THE_TRICK(	f0,f2,f4,f6,f8,f10,f12,f14,f16,f18,f20,f22,f24,f26,f28,f30,	
			,f50,f52,f54,f56,f58,f60,f62,f48,f48,
			,LDBLK(f32),	,,,,,,,STBLK,
			,bcs,pn %icc, vis7e1)
	DO_THE_TRICK(	f16,f18,f20,f22,f24,f26,f28,f30,f32,f34,f36,f38,f40,f42,f44,f46,
			,f50,f52,f54,f56,f58,f60,f62,f48,f48,
			,LDBLK(f0),	,,,,,,,STBLK,
			,bcs,pn %icc, vis7e2)
	DO_THE_TRICK(	f32,f34,f36,f38,f40,f42,f44,f46,f0,f2,f4,f6,f8,f10,f12,f14,	
			,f50,f52,f54,f56,f58,f60,f62,f48,f48,
			,LDBLK(f16),	,,,,,,,STBLK,
			,bcc,pt %icc, vis7)
vis7e3:	DO_THE_TRICK(	f0,f2,f4,f6,f8,f10,f12,f14,f16,f18,f20,f22,f24,f26,f28,f30,	
			,f50,f52,f54,f56,f58,f60,f62,f48,f32,
			,SYNC,		,,,,,,,STBLK_XORASI(x7,x8),
			,add %dst, 64, %dst; add %len, 192 - 1*8, %len; ba,pt %icc, e2)
vis7e1:	DO_THE_TRICK(	f16,f18,f20,f22,f24,f26,f28,f30,f32,f34,f36,f38,f40,f42,f44,f46,
			,f50,f52,f54,f56,f58,f60,f62,f48,f0,
			,SYNC,		,,,,,,,STBLK_XORASI(x7,x8),
			,add %dst, 64, %dst; add %len, 192 - 1*8, %len; ba,pt %icc, e3)
vis7e2:	DO_THE_TRICK(	f32,f34,f36,f38,f40,f42,f44,f46,f0,f2,f4,f6,f8,f10,f12,f14,	
			,f50,f52,f54,f56,f58,f60,f62,f48,f16,
			,SYNC,		,,,,,,,STBLK_XORASI(x7,x8),
			,add %dst, 64, %dst; add %len, 192 - 1*8, %len; ba,pt %icc, e1)
e1:	END_THE_TRICK1(	f0,f2,f4,f6,f8,f10,f12,f14,f16,f6)
e2:	END_THE_TRICK1(	f16,f18,f20,f22,f24,f26,f28,f30,f32,f6)
e3:	END_THE_TRICK1(	f32,f34,f36,f38,f40,f42,f44,f46,f0,f6)
ett:	rd		%gsr, %x3		/*  LSU		Group+4bubbles	*/
	andcc		%x3, 7, %x3		/*  IEU1	Group		*/
	add		%dst, 8, %dst		/*  IEU0			*/
	bne,pn		%icc, 1f		/*  CTI				*/
	 fzero		%f10			/*  FPA				*/
	brz,a,pn	%len, 2f		/*  CTI+IEU1	Group		*/
	 stda		%f6, [%dst - 8] %asi	/*  Store			*/
1:	cmp		%len, 8			/*  IEU1			*/
	blu,pn		%icc, 3f		/*  CTI				*/
	 sub		%src, 64, %src		/*  IEU0	Group		*/
1:	ldd		[%src], %f2		/*  Load	Group		*/
	fpadd32		%f10, %f2, %f12		/*  FPA		Group+load stall*/
	add		%src, 8, %src		/*  IEU0			*/
	add		%dst, 8, %dst		/*  IEU1			*/
	faligndata	%f6, %f2, %f14		/*  FPA		Group		*/
	fcmpgt32	%f10, %f12, %x5		/*  FPM		Group		*/
	stda		%f14, [%dst - 16] %asi	/*  Store			*/
	fmovd		%f2, %f6		/*  FPA				*/
	fmovd		%f12, %f10		/*  FPA		Group		*/
	sub		%len, 8, %len		/*  IEU1			*/
	fzero		%f16			/*  FPA		Group - FPU nop	*/
	fzero		%f18			/*  FPA		Group - FPU nop	*/
	inc		%x5			/*  IEU0			*/
	srl		%x5, 1, %x5		/*  IEU0	Group (regdep)	*/
	cmp		%len, 8			/*  IEU1			*/
	bgeu,pt		%icc, 1b		/*  CTI				*/
	 add		%x5, %sum, %sum		/*  IEU0	Group		*/
3:	brz,a,pt	%x3, 2f			/*  CTI+IEU1			*/
	 stda		%f6, [%dst - 8] %asi	/*  Store	Group		*/
	sta		%f7, [%dst - 8]	%asi	/*  Store	Group		*/
	sub		%dst, 4, %dst		/*  IEU0			*/
	add		%len, 4, %len		/*  IEU1			*/
2:
#ifdef __KERNEL__
	sub		%sp, 8, %sp		/*  IEU0	Group		*/
#endif
	END_THE_TRICK2(	f48,f50,f52,f54,f56,f58,f60,f10,f12,f62)
	membar		#Sync			/*  LSU		Group		*/
#ifdef __KERNEL__
	VISExit
	add		%sp, 8, %sp		/*  IEU0	Group		*/
#endif
23:	brnz,pn		%len, 26f		/*  CTI+IEU1	Group		*/
24:	 sllx		%sum, 32, %g1		/*  IEU0			*/
25:	addcc		%sum, %g1, %src		/*  IEU1	Group		*/
	srlx		%src, 32, %src		/*  IEU0	Group (regdep)	*/
	bcs,a,pn	%xcc, 1f		/*  CTI				*/
	 add		%src, 1, %src		/*  IEU1			*/
#ifndef __KERNEL__
1:	retl					/*  CTI		Group brk forced*/
	 srl		%src, 0, %src		/*  IEU0			*/
#else
1:	sethi		%uhi(PAGE_OFFSET), %g4	/*  IEU0	Group		*/
	retl					/*  CTI		Group brk forced*/
	 sllx		%g4, 32, %g4		/*  IEU0			*/
#endif
26:	andcc		%len, 8, %g0		/*  IEU1	Group		*/
	be,pn		%icc, 1f		/*  CTI				*/
	 lduw		[%src], %o4		/*  Load			*/
	lduw		[%src+4], %g2		/*  Load	Group		*/
	add		%src, 8, %src		/*  IEU0			*/
	add		%dst, 8, %dst		/*  IEU1			*/
	sllx		%o4, 32, %g5		/*  IEU0	Group		*/
	stwa		%o4, [%dst - 8] %asi	/*  Store			*/
	or		%g5, %g2, %g5		/*  IEU0	Group		*/
	stwa		%g2, [%dst - 4]	%asi	/*  Store			*/
	addcc		%g5, %sum, %sum		/*  IEU1	Group		*/
	bcs,a,pn	%xcc, 1f		/*  CTI				*/
	 add		%sum, 1, %sum		/*  IEU0			*/
1:	andcc		%len, 4, %g0		/*  IEU1	Group		*/
	be,a,pn		%icc, 1f		/*  CTI				*/
	 clr		%g2			/*  IEU0			*/
	lduw		[%src], %g7		/*  Load			*/
	add		%src, 4, %src		/*  IEU0	Group		*/
	add		%dst, 4, %dst		/*  IEU1			*/
	sllx		%g7, 32, %g2		/*  IEU0	Group		*/
	stwa		%g7, [%dst - 4] %asi	/*  Store			*/
1:	andcc		%len, 2, %g0		/*  IEU1			*/
	be,a,pn		%icc, 1f		/*  CTI				*/
	 clr		%g3			/*  IEU0	Group		*/
	lduh		[%src], %g7		/*  Load			*/
	add		%src, 2, %src		/*  IEU1			*/
	add		%dst, 2, %dst		/*  IEU0	Group		*/
	sll		%g7, 16, %g3		/*  IEU0	Group		*/
	stha		%g7, [%dst - 2] %asi	/*  Store			*/
1:	andcc		%len, 1, %g0		/*  IEU1			*/
	be,a,pn		%icc, 1f		/*  CTI				*/
	 clr		%o5			/*  IEU0	Group		*
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#define ac97_probe_codec	_set_ver(ac97_probe_codec)
#define __ver_ac97_set_dac_rate	smp_42924aaa
#define ac97_set_dac_rate	_set_ver(ac97_set_dac_rate)
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#define ac97_set_adc_rate	_set_ver(ac97_set_adc_rate)
#define __ver_ac97_save_state	smp_32a87bac
#define ac97_save_state	_set_ver(ac97_save_state)
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	ldub		[%src], %g7		/*  Load			*/
	sll		%g7, 8, %o5		/*  IEU0	Group		*/
	stba		%g7, [%dst] %asi	/*  Store			*/
1:	or		%g2, %g3, %g3		/*  IEU1			*/
	or		%o5, %g3, %g3		/*  IEU0	Group (regdep)	*/
	addcc		%g3, %sum, %sum		/*  IEU1	Group (regdep)	*/
	bcs,a,pn	%xcc, 1f		/*  CTI				*/
	 add		%sum, 1, %sum		/*  IEU0			*/
1:	ba,pt		%xcc, 25b		/*  CTI		Group		*/
	 sllx		%sum, 32, %g1		/*  IEU0			*/

#ifdef __KERNEL__
end:

	.section	__ex_table
	.align		4
	.word		csum_partial_copy_user_vis, 0, end, cpc_handler
#endif
/* $Id: bitops.S,v 1.3 2001/11/18 00:12:56 davem Exp $
 * bitops.S: Sparc64 atomic bit operations.
 *
 * Copyright (C) 2000 David S. Miller (davem@redhat.com)
 */

#include <asm/asi.h>

	.text
	.align	64
	.globl	__bitops_begin
__bitops_begin:

	.globl	___test_and_set_bit
___test_and_set_bit:	/* %o0=nr, %o1=addr */
	srlx	%o0, 6, %g1
	mov	1, %g5
	sllx	%g1, 3, %g3
	and	%o0, 63, %g2
	sllx	%g5, %g2, %g5
	add	%o1, %g3, %o1
	ldx	[%o1], %g7
1:	andcc	%g7, %g5, %o0
	bne,pn	%xcc, 2f
	 xor	%g7, %g5, %g1
	casx	[%o1], %g7, %g1
	cmp	%g7, %g1
	bne,a,pn %xcc, 1b
	 ldx	[%o1], %g7
2:	retl
	 membar	#StoreLoad | #StoreStore

	.globl	___test_and_clear_bit
___test_and_clear_bit:	/* %o0=nr, %o1=addr */
	srlx	%o0, 6, %g1
	mov	1, %g5
	sllx	%g1, 3, %g3
	and	%o0, 63, %g2
	sllx	%g5, %g2, %g5
	add	%o1, %g3, %o1
	ldx	[%o1], %g7
1:	andcc	%g7, %g5, %o0
	be,pn	%xcc, 2f
	 xor	%g7, %g5, %g1
	casx	[%o1], %g7, %g1
	cmp	%g7, %g1
	bne,a,pn %xcc, 1b
	 ldx	[%o1], %g7
2:	retl
	 membar	#StoreLoad | #StoreStore

	.globl	___test_and_change_bit
___test_and_change_bit:	/* %o0=nr, %o1=addr */
	srlx	%o0, 6, %g1
	mov	1, %g5
	sllx	%g1, 3, %g3
	and	%o0, 63, %g2
	sllx	%g5, %g2, %g5
	add	%o1, %g3, %o1
	ldx	[%o1], %g7
1:	and	%g7, %g5, %o0
	xor	%g7, %g5, %g1
	casx	[%o1], %g7, %g1
	cmp	%g7, %g1
	bne,a,pn %xcc, 1b
	 ldx	[%o1], %g7
2:	retl
	 membar	#StoreLoad | #StoreStore
	nop

	.globl	___test_and_set_le_bit
___test_and_set_le_bit:	/* %o0=nr, %o1=addr */
	srlx	%o0, 5, %g1
	mov	1, %g5
	sllx	%g1, 2, %g3
	and	%o0, 31, %g2
	sllx	%g5, %g2, %g5
	add	%o1, %g3, %o1
	lduwa	[%o1] ASI_PL, %g7
1:	andcc	%g7, %g5, %o0
	bne,pn	%icc, 2f
	 xor	%g7, %g5, %g1
	casa	[%o1] ASI_PL, %g7, %g1
	cmp	%g7, %g1
	bne,a,pn %icc, 1b
	 lduwa	[%o1] ASI_PL, %g7
2:	retl
	 membar	#StoreLoad | #StoreStore

	.globl	___test_and_clear_le_bit
___test_and_clear_le_bit:	/* %o0=nr, %o1=addr */
	srlx	%o0, 5, %g1
	mov	1, %g5
	sllx	%g1, 2, %g3
	and	%o0, 31, %g2
	sllx	%g5, %g2, %g5
	add	%o1, %g3, %o1
	lduwa	[%o1] ASI_PL, %g7
1:	andcc	%g7, %g5, %o0
	be,pn	%icc, 2f
	 xor	%g7, %g5, %g1
	casa	[%o1] ASI_PL, %g7, %g1
	cmp	%g7, %g1
	bne,a,pn %icc, 1b
	 lduwa	[%o1] ASI_PL, %g7
2:	retl
	 membar	#StoreLoad | #StoreStore

	.globl	__bitops_end
__bitops_end:
/* $Id: dec_and_lock.S,v 1.5 2001/11/18 00:12:56 davem Exp $
 * dec_and_lock.S: Sparc64 version of "atomic_dec_and_lock()"
 *                 using cas and ldstub instructions.
 *
 * Copyright (C) 2000 David S. Miller (davem@redhat.com)
 */
#include <linux/config.h>

#ifndef CONFIG_DEBUG_SPINLOCK
	.text
	.align	64

	/* CAS basically works like this:
	 *
	 * void CAS(MEM, REG1, REG2)
	 * {
	 *   START_ATOMIC();
	 *   if (*(MEM) == REG1) {
	 *     TMP = *(MEM);
	 *     *(MEM) = REG2;
	 *     REG2 = TMP;
	 *   } else
	 *     REG2 = *(MEM);
	 *   END_ATOMIC();
	 * }
	 */

	.globl	atomic_dec_and_lock
atomic_dec_and_lock:	/* %o0 = counter, %o1 = lock */
loop1:	lduw	[%o0], %g5
	subcc	%g5, 1, %g7
	be,pn	%icc, to_zero
	 nop
nzero:	cas	[%o0], %g5, %g7
	cmp	%g5, %g7
	bne,pn	%icc, loop1
	 mov	0, %g1

out:
	membar	#StoreLoad | #StoreStore
	retl
	 mov	%g1, %o0
to_zero:
	ldstub	[%o1], %g3
	brnz,pn	%g3, spin_on_lock
	 membar	#StoreLoad | #StoreStore
loop2:	cas	[%o0], %g5, %g7		/* ASSERT(g7 == 0) */
	cmp	%g5, %g7

	be,pt	%icc, out
	 mov	1, %g1
	lduw	[%o0], %g5
	subcc	%g5, 1, %g7
	be,pn	%icc, loop2
	 nop
	membar	#StoreStore | #LoadStore
	stb	%g0, [%o1]

	b,pt	%xcc, nzero
	 nop
spin_on_lock:
	ldub	[%o1], %g3
	brnz,pt	%g3, spin_on_lock
	 membar	#LoadLoad
	ba,pt	%xcc, to_zero
	 nop
	nop

#endif /* !(CONFIG_DEBUG_SPINLOCK) */
/* $Id: U3copy_from_user.S,v 1.3.2.1 2002/01/15 07:17:47 davem Exp $
 * U3memcpy.S: UltraSparc-III optimized copy from userspace.
 *
 * Copyright (C) 1999, 2000 David S. Miller (davem@redhat.com)
 */

#ifdef __KERNEL__
#include <asm/visasm.h>
#include <asm/asi.h>
#undef SMALL_COPY_USES_FPU
#define EXNV(x,y,a,b)			\
98:	x,y;				\
	.section .fixup;		\
	.align 4;			\
99:	VISExitHalf;			\
	ba U3cfu_fixup;			\
	 a, b, %o1;			\
	.section __ex_table;		\
	.align 4;			\
	.word 98b, 99b;			\
	.text;				\
	.align 4;
#define EX(x,y,a,b)			\
98:	x,y;				\
	.section .fixup;		\
	.align 4;			\
99:	VISExitHalf;			\
	ba U3cfu_fixup;			\
	 a, b, %o1;			\
	.section __ex_table;		\
	.align 4;			\
	.word 98b, 99b;			\
	.text;				\
	.align 4;
#define EX2(x,y)			\
98:	x,y;				\
	.section .fixup;		\
	.align 4;			\
99:	VISExitHalf;			\
	and %o2, (0x40 - 1), %o1;	\
	add %o1, %o4, %o1;		\
	ba U3cfu_fixup;			\
	 add %o1, 0x1c0, %o1;		\
	.section __ex_table;		\
	.align 4;			\
	.word 98b, 99b;			\
	.text;				\
	.align 4;
#define EX3(x,y)			\
98:	x,y;				\
	.section .fixup;		\
	.align 4;			\
99:	VISExitHalf;			\
	and %o2, (0x40 - 1), %o1;	\
	sll %g3, 6, %g3;		\
	add %o1, 0x80, %o1;		\
	ba U3cfu_fixup;			\
	 add %o1, %g3, %o1;		\
	.section __ex_table;		\
	.align 4;			\
	.word 98b, 99b;			\
	.text;				\
	.align 4;
#define EX4(x,y)			\
98:	x,y;				\
	.section .fixup;		\
	.align 4;			\
99:	VISExitHalf;			\
	and %o2, (0x40 - 1), %o1;	\
	add %o1, 0x40, %o1;		\
	ba U3cfu_fixup;			\
	 add %o1, %g3, %o1;		\
	.section __ex_table;		\
	.align 4;			\
	.word 98b, 99b;			\
	.text;				\
	.align 4;
#else
#define ASI_BLK_P 0xf0
#define FPRS_FEF  0x04
#define VISEntryHalf rd %fprs, %o5; wr %g0, FPRS_FEF, %fprs
#define VISExitHalf and %o5, FPRS_FEF, %o5; wr %o5, 0x0, %fprs
#define SMALL_COPY_USES_FPU
#define EXNV(x,y,a,b)	x,y;
#define EX(x,y,a,b)	x,y;
#define EX2(x,y)	x,y;
#define EX3(x,y)	x,y;
#define EX4(x,y)	x,y;
#endif

	/* Special/non-trivial issues of this code:
	 *
	 * 1) %o5 is preserved from VISEntryHalf to VISExitHalf
	 * 2) Only low 32 FPU registers are used so that only the
	 *    lower half of the FPU register set is dirtied by this
	 *    code.  This is especially important in the kernel.
	 * 3) This code never prefetches cachelines past the end
	 *    of the source buffer.
	 */

	.text
	.align	32

	/* The cheetah's flexible spine, oversized liver, enlarged heart,
	 * slender muscular body, and claws make it the swiftest hunter
	 * in Africa and the fastest animal on land.  Can reach speeds
	 * of up to 2.4GB per second.
	 */

	.globl		U3copy_from_user
U3copy_from_user: /* %o0=dst, %o1=src, %o2=len */
#ifndef __KERNEL__
	/* Save away original 'dst' for memcpy return value. */
	mov		%o0, %g3			! A0	Group
#endif
	/* Anything to copy at all? */
	cmp		%o2, 0				! A1
	ble,pn		%icc, U3copy_from_user_short_ret! BR

	/* Extremely small copy? */
	 cmp		%o2, 31				! A0	Group
	ble,pn		%icc, U3copy_from_user_short	! BR

	/* Large enough to use unrolled prefetch loops? */
	 cmp		%o2, 0x100			! A1
	bge,a,pt	%icc, U3copy_from_user_enter	! BR	Group
	 andcc		%o0, 0x3f, %g2			! A0

	ba,pt		%xcc, U3copy_from_user_toosmall	! BR	Group
	 andcc		%o0, 0x7, %g2			! A0

	.align		32
U3copy_from_user_short:
	/* Copy %o2 bytes from src to dst, one byte at a time. */
	EXNV(lduba [%o1 + 0x00] %asi, %o3, add %o2, %g0)! MS	Group
	add		%o1, 0x1, %o1			! A0
	add		%o0, 0x1, %o0			! A1
	subcc		%o2, 1, %o2			! A0	Group

	bg,pt		%icc, U3copy_from_user_short	! BR
	 stb		%o3, [%o0 + -1]			! MS	Group (1-cycle stall)

U3copy_from_user_short_ret:
#ifdef __KERNEL__
	retl						! BR	Group (0-4 cycle stall)
	 clr		%o0				! A0
#else
	retl						! BR	Group (0-4 cycle stall)
	 mov		%g3, %o0			! A0
#endif

	/* Here len >= (6 * 64) and condition codes reflect execution
	 * of "andcc %o0, 0x7, %g2", done by caller.
	 */
	.align		64
U3copy_from_user_enter:
	/* Is 'dst' already aligned on an 64-byte boundary? */
	be,pt		%xcc, 2f			! BR

	/* Compute abs((dst & 0x3f) - 0x40) into %g2.  This is the number
	 * of bytes to copy to make 'dst' 64-byte aligned.  We pre-
	 * subtract this from 'len'.
	 */
	 sub		%g2, 0x40, %g2			! A0	Group
	sub		%g0, %g2, %g2			! A0	Group
	sub		%o2, %g2, %o2			! A0	Group

	/* Copy %g2 bytes from src to dst, one byte at a time. */
1:	EXNV(lduba [%o1 + 0x00] %asi, %o3, add %o2, %g2)! MS	(Group)
	add		%o1, 0x1, %o1			! A1
	add		%o0, 0x1, %o0			! A0	Group
	subcc		%g2, 0x1, %g2			! A1

	bg,pt		%icc, 1b			! BR	Group
	 stb		%o3, [%o0 + -1]			! MS	Group

2:	VISEntryHalf					! MS+MS
	and		%o1, 0x7, %g1			! A1
	ba,pt		%xcc, U3copy_from_user_begin		! BR
	 alignaddr	%o1, %g0, %o1			! MS	      (Break-after)

	.align		64
U3copy_from_user_begin:
	prefetcha	[%o1 + 0x000] %asi, #one_read	! MS	Group1
	prefetcha	[%o1 + 0x040] %asi, #one_read	! MS	Group2
	andn		%o2, (0x40 - 1), %o4		! A0
	prefetcha	[%o1 + 0x080] %asi, #one_read	! MS	Group3
	cmp		%o4, 0x140			! A0
	prefetcha	[%o1 + 0x0c0] %asi, #one_read	! MS	Group4
	EX(ldda [%o1 + 0x000] %asi, %f0, add %o2, %g0)	! MS	Group5 (%f0 results at G8)
	bge,a,pt	%icc, 1f			! BR

	prefetcha	[%o1 + 0x100] %asi, #one_read	! MS	Group6
1:	EX(ldda [%o1 + 0x008] %asi, %f2, add %o2, %g0)	! AX	       (%f2 results at G9)
	cmp		%o4, 0x180			! A1
	bge,a,pt	%icc, 1f			! BR
	 prefetcha	[%o1 + 0x140] %asi, #one_read	! MS	Group7
1:	EX(ldda [%o1 + 0x010] %asi, %f4, add %o2, %g0)	! AX	       (%f4 results at G10)
	cmp		%o4, 0x1c0			! A1
	bge,a,pt	%icc, 1f			! BR

	 prefetcha	[%o1 + 0x180] %asi, #one_read	! MS	Group8
1:	faligndata	%f0, %f2, %f16			! FGA	Group9 (%f16 at G12)
	EX(ldda [%o1 + 0x018] %asi, %f6, add %o2, %g0)	! AX	       (%f6 results at G12)
	faligndata	%f2, %f4, %f18			! FGA	Group10 (%f18 results at G13)
	EX(ldda [%o1 + 0x020] %asi, %f8, add %o2, %g0)	! MS	        (%f8 results at G13)
	faligndata	%f4, %f6, %f20			! FGA	Group12	(1-cycle stall,%f20 at G15)
	EX(ldda [%o1 + 0x028] %asi, %f10, add %o2, %g0)	! MS		(%f10 results at G15)
	faligndata	%f6, %f8, %f22			! FGA	Group13 (%f22 results at G16)

	EX(ldda [%o1 + 0x030] %asi, %f12, add %o2, %g0)	! MS		(%f12 results at G16)
	faligndata	%f8, %f10, %f24			! FGA	Group15 (1-cycle stall,%f24 at G18)
	EX(ldda [%o1 + 0x038] %asi, %f14, add %o2, %g0)	! MS		(%f14 results at G18)
	faligndata	%f10, %f12, %f26		! FGA	Group16 (%f26 results at G19)
	EX(ldda [%o1 + 0x040] %asi, %f0, add %o2, %g0)	! MS		(%f0 results at G19)

	/* We only use the first loop if len > (7 * 64). */
	subcc		%o4, 0x1c0, %o4			! A0	Group17
	bg,pt		%icc, U3copy_from_user_loop1	! BR
	 add		%o1, 0x40, %o1			! A1

	add		%o4, 0x140, %o4			! A0	Group18
	ba,pt		%xcc, U3copy_from_user_loop2	! BR
	 srl		%o4, 6, %o3			! A0	Group19
	nop
	nop
	nop
	nop
	nop

	nop
	nop

	/* This loop performs the copy and queues new prefetches.
	 * We drop into the second loop when len <= (5 * 64).  Note
	 * that this (5 * 64) factor has been subtracted from len
	 * already.
	 */
U3copy_from_user_loop1:
	EX2(ldda [%o1 + 0x008] %asi, %f2)		! MS	Group2	(%f2 results at G5)
	faligndata	%f12, %f14, %f28		! FGA		(%f28 results at G5)
	EX2(ldda [%o1 + 0x010] %asi, %f4)		! MS	Group3	(%f4 results at G6)
	faligndata	%f14, %f0, %f30			! FGA	Group4	(1-cycle stall, %f30 at G7)
	stda		%f16, [%o0] ASI_BLK_P		! MS
	EX2(ldda [%o1 + 0x018] %asi, %f6)		! AX		(%f6 results at G7)

	faligndata	%f0, %f2, %f16			! FGA	Group12 (7-cycle stall)
	EX2(ldda [%o1 + 0x020] %asi, %f8)		! MS	        (%f8 results at G15)
	faligndata	%f2, %f4, %f18			! FGA	Group13	(%f18 results at G16)
	EX2(ldda [%o1 + 0x028] %asi, %f10)		! MS		(%f10 results at G16)
	faligndata	%f4, %f6, %f20			! FGA	Group14	(%f20 results at G17)
	EX2(ldda [%o1 + 0x030] %asi, %f12)		! MS		(%f12 results at G17)
	faligndata	%f6, %f8, %f22			! FGA	Group15	(%f22 results at G18)
	EX2(ldda [%o1 + 0x038] %asi, %f14)		! MS		(%f14 results at G18)

	faligndata	%f8, %f10, %f24			! FGA	Group16	(%f24 results at G19)
	EX2(ldda [%o1 + 0x040] %asi, %f0)		! AX		(%f0 results at G19)
	prefetcha	[%o1 + 0x180] %asi, #one_read	! MS
	faligndata	%f10, %f12, %f26		! FGA	Group17	(%f26 results at G20)
	subcc		%o4, 0x40, %o4			! A0
	add		%o1, 0x40, %o1			! A1
	bg,pt		%xcc, U3copy_from_user_loop1	! BR
	 add		%o0, 0x40, %o0			! A0	Group18

U3copy_from_user_loop2_enter:
	mov		5, %o3				! A1

	/* This loop performs ��������������v��e��U�iK�O=�;.�'!���
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�����9a����Yw�����{�0�p����9��������
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{�;W��9����?l��������� ��]�������g���P�
��?��X��Z��T��S��U��^��hq�lG�h8�VT�9�����2����[��$��x�W��k�����u�`��&*��_����"��e)����	#�N��}��_�������j��������������������&�Nx����?c#define __ver_aci_port	smp_0d82adb6
#define aci_port	_set_ver(aci_port)
#define __ver_aci_idcode	smp_2f4dcdce
#define aci_idcode	_set_ver(aci_idcode)
#define __ver_aci_version	smp_93350c87
#define aci_version	_set_ver(aci_version)
#define __ver_aci_rw_cmd	smp_cc7c4cd8
#define aci_rw_cmd	_set_ver(aci_rw_cmd)
ac97.o: ac97.c \
   /home/me/kernel/linux/include/linux/module.h \
   /home/me/kernel/linux/include/linux/kernel.h \
   /home/me/kernel/linux/include/linux/init.h \
   ac97.h
ac97.h: \
   sound_config.h \
   sound_calls.h
	@touch ac97.h
ac97_codec.o: ac97_codec.c \
   /home/me/kernel/linux/include/linux/module.h \
   /home/me/kernel/linux/include/linux/version.h \
   /home/me/kernel/linux/include/linux/kernel.h \
   /home/me/kernel/linux/include/linux/string.h \
   /home/me/kernel/linux/include/linux/errno.h \
   /home/me/kernel/linux/include/linux/bitops.h \
   /home/me/kernel/linux/include/linux/delay.h \
   /home/me/kernel/linux/include/linux/ac97_codec.h \
   /home/me/kernel/linux/include/asm/uaccess.h
aci.o: aci.c \
   /home/me/kernel/linux/include/linux/kernel.h \
   /home/me/kernel/linux/include/linux/init.h \
   /home/me/kernel/linux/include/linux/module.h \
   /home/me/kernel/linux/include/linux/proc_fs.h \
   /home/me/kernel/linux/include/linux/slab.h \
   /home/me/kernel/linux/include/asm/semaphore.h \
   /home/me/kernel/linux/include/asm/io.h \
   /home/me/kernel/linux/include/asm/uaccess.h \
   sound_config.h \
   aci.h
ad1816.o: ad1816.c \
   /home/me/kernel/linux/include/linux/module.h \
   /home/me/kernel/linux/include/linux/init.h \
   /home/me/kernel/linux/include/linux/isapnp.h \
   /home/me/kernel/linux/include/linux/stddef.h \
   sound_config.h \
   $(wildcard /home/me/kernel/linux/include/config/isapnp.h) \
   $(wildcard /home/me/kernel/linux/include/config/isapnp/module.h)
ad1848.o: ad1848.c \
   /home/me/kernel/linux/include/linux/init.h \
   /home/me/kernel/linux/include/linux/module.h \
   /home/me/kernel/linux/include/linux/stddef.h \
   /home/me/kernel/linux/include/linux/pm.h \
   /home/me/kernel/linux/include/linux/isapnp.h \
   sound_config.h \
   ad1848.h \
   ad1848_mixer.h \
   $(wildcard /home/me/kernel/linux/include/config/isapnp.h) \
   $(wildcard /home/me/kernel/linux/include/config/isapnp/module.h) \
   $(wildcard /home/me/kernel/linux/include/config/smp.h)
adlib_card.o: adlib_card.c \
   /home/me/kernel/linux/include/linux/module.h \
   /home/me/kernel/linux/include/linux/init.h \
   sound_config.h \
   opl3.h
aedsp16.o: aedsp16.c \
   /home/me/kernel/linux/include/linux/delay.h \
   /home/me/kernel/linux/include/linux/module.h \
   /home/me/kernel/linux/include/linux/init.h \
   sound_config.h \
   $(wildcard /home/me/kernel/linux/include/config/sound/aedsp16/sbpro.h) \
   $(wildcard /home/me/kernel/linux/include/config/sound/aedsp16/mss.h) \
   $(wildcard /home/me/kernel/linux/include/config/sc6600.h) \
   $(wildcard /home/me/kernel/linux/include/config/sc6600/joy.h) \
   $(wildcard /home/me/kernel/linux/include/config/sc6600/cdrom.h) \
   $(wildcard /home/me/kernel/linux/include/config/sc6600/cdrombase.h)
au1000.o: au1000.c \
   /home/me/kernel/linux/include/linux/version.h \
   /home/me/kernel/linux/include/linux/module.h \
   /home/me/kernel/linux/include/linux/string.h \
   /home/me/kernel/linux/include/linux/ioport.h \
   /home/me/kernel/linux/include/linux/sched.h \
   /home/me/kernel/linux/include/linux/delay.h \
   /home/me/kernel/linux/include/linux/sound.h \
   /home/me/kernel/linux/include/linux/malloc.h \
   /home/me/kernel/linux/include/linux/soundcard.h \
   /home/me/kernel/linux/include/linux/init.h \
   /home/me/kernel/linux/include/linux/poll.h \
   /home/me/kernel/linux/include/linux/pci.h \
   /home/me/kernel/linux/include/linux/bitops.h \
   /home/me/kernel/linux/include/linux/proc_fs.h \
   /home/me/kernel/linux/include/linux/spinlock.h \
   /home/me/kernel/linux/include/linux/smp_lock.h \
   /home/me/kernel/linux/include/linux/ac97_codec.h \
   /home/me/kernel/linux/include/linux/wrapper.h \
   /home/me/kernel/linux/include/asm/io.h \
   /home/me/kernel/linux/include/asm/uaccess.h \
   /home/me/kernel/linux/include/asm/hardirq.h
audio.o: audio.c \
   /home/me/kernel/linux/include/linux/stddef.h \
   /home/me/kernel/linux/include/linux/string.h \
   /home/me/kernel/linux/include/linux/kmod.h \
   sound_config.h \
   ulaw.h \
   coproc.h
audio_syms.o: audio_syV
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�����ms.c \
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   sound_config.h \
   sound_calls.h
awe_wave.o: awe_wave.c \
   /home/me/kernel/linux/include/linux/awe_voice.h \
   /home/me/kernel/linux/include/linux/init.h \
   /home/me/kernel/linux/include/linux/module.h \
   /home/me/kernel/linux/include/linux/string.h \
   $(wildcard /home/me/kernel/linux/include/config/isapnp.h) \
   $(wildcard /home/me/kernel/linux/include/config/isapnp/module.h) \
   /home/me/kernel/linux/include/linux/isapnp.h \
   sound_config.h \
   awe_wave.h \
   awe_hw.h \
   tuning.h \
   /home/me/kernel/linux/include/linux/ultrasound.h \
   $(wildcard /home/me/kernel/linux/include/config/awe32/mixer.h) \
   $(wildcard /home/me/kernel/linux/include/config/awe32/midiemu.h)
btaudio.o: btaudio.c \
   /home/me/kernel/linux/include/linux/version.h \
   /home/me/kernel/linux/include/linux/module.h \
   /home/me/kernel/linux/include/linux/errno.h \
   /home/me/kernel/linux/include/linux/pci.h \
   /home/me/kernel/linux/include/linux/sched.h \
   /home/me/kernel/linux/include/linux/signal.h \
   /home/me/kernel/linux/include/linux/types.h \
   /home/me/kernel/linux/include/linux/wrapper.h \
   /home/me/kernel/linux/include/linux/interrupt.h \
   /home/me/kernel/linux/include/linux/init.h \
   /home/me/kernel/linux/include/linux/poll.h \
   /home/me/kernel/linux/include/linux/sound.h \
   /home/me/kernel/linux/include/linux/soundcard.h \
   /home/me/kernel/linux/include/linux/slab.h \
   /home/me/kernel/linux/include/linux/kdev_t.h \
   /home/me/kernel/linux/include/asm/uaccess.h \
   /home/me/kernel/linux/include/asm/io.h
cmpci.o: cmpci.c \
   /home/me/kernel/linux/include/linux/version.h \
   /home/me/kernel/linux/include/linux/module.h \
   /home/me/kernel/linux/include/linux/string.h \
   /home/me/kernel/linux/include/linux/ioport.h \
   /home/me/kernel/linux/include/linux/sched.h \
   /home/me/kernel/linux/include/linux/delay.h \
   /home/me/kernel/linux/include/linux/sound.h \
   /home/me/kernel/linux/include/linux/slab.h \
   /home/me/kernel/linux/include/linux/soundcard.h \
   /home/me/kernel/linux/include/linux/pci.h \
   /home/me/kernel/linux/include/linux/wrapper.h \
   /home/me/kernel/linux/include/asm/io.h \
   /home/me/kernel/linux/include/asm/dma.h \
   /home/me/kernel/linux/include/linux/init.h \
   /home/me/kernel/linux/include/linux/poll.h \
   /home/me/kernel/linux/include/linux/spinlock.h \
   /home/me/kernel/linux/include/linux/smp_lock.h \
   /home/me/kernel/linux/include/asm/uaccess.h \
   /home/me/kernel/linux/include/asm/hardirq.h \
   /home/me/kernel/linux/include/linux/bitops.h \
   dm.h \
   $(wildcard /home/me/kernel/linux/include/config/sound/cmpci/midi.h) \
   $(wildcard /home/me/kernel/linux/include/config/sound/cmpci.h) \
   $(wildcard /home/me/kernel/linux/include/config/sound/cmpci/fm.h) \
   $(wildcard /home/me/kernel/linux/include/config/sound/cmpci/mpuio.h) \
   $(wildcard /home/me/kernel/linux/include/config/sound/cmpci/fmio.h) \
   $(wildcard /home/me/kernel/linux/include/config/sound/cmpci/spdifinverse.h) \
   $(wildcard /home/me/kernel/linux/include/config/sound/cmpci/spdifloop.h) \
   $(wildcard /home/me/kernel/linux/include/config/sound/cmpci/speakers.h) \
   $(wildcard /home/me/kernel/linux/include/config/sound/cmpci/line/rear.h) \
   $(wildcard /home/me/kernel/linux/include/config/sound/cmpci/line/bass.h) \
   $(wildcard /home/me/kernel/linux/include/config/sound/cmpci/joystick.h) \
   $(wildcard /home/me/kernel/linux/include/config/pci.h)
cs4232.o: cs4232.c \
   /home/me/kernel/linux/include/linux/isapnp.h \
   /home/me/kernel/linux/include/linux/module.h \
   /home/me/kernel/linux/include/linux/init.h \
   sound_config.h \
   cs4232.h \
   ad1848.h \
   mpu401.h \
   $(wildcard /home/me/kernel/linux/include/config/sound/wavefront/module.h)
cs46xx.o: cs46xx.c \
   /home/me/kernel/linux/include/linux/list.h \
   /home/me/kernel/linux/include/linux/version.h \
   /home/me/kernel/linux/include/linux/module.h \
   /home/me/kernel/linux/include/linux/string.h \
   /home/me/kernel/linux/include/linux/ioport.h \
   /home/me/kernel/linux/include/linux/sched.h \
   /home/me/kernel/linux/include/linux/delay.h \
   /home/me/kernel/linux/include/linux/sound.h \
   /home/me/kernel/linux/include/linux/slab.h \
   /home/me/kernel/linux/include/linux/soundcard.h \
   /home/me/kernel/linux/include/linux/pci.h \
   /home/me/kernel/linux/include/linux/bitops.h \
   /home/me/kernel/linux/include/asm/io.h \
   /home/me/kernel/linux/include/asm/dma.h \
   /home/me/kernel/linux/include/linux/init.h \
   /home/me/kernel/linux/include/linux/poll.h \
   /home/me/kernel/linux/include/linux/smp_lock.h \
   /home/me/kernel/linux/include/linux/wrapper.h \
   /home/me/kernel/linux/include/asm/uaccess.h \
   /home/me/kernel/linux/include/asm/hardirq.h \
   /home/me/kernel/linux/include/linux/ac97_codec.h \
   cs46xxpm-24.h \
   cs46xx_wrapper-24.h \
   cs461x.h \
   cs461x_image.h
cs46xx_wrapper-24.h: \
   /home/me/kernel/linux/include/linux/spinlock.h
	@touch cs46xx_wrapper-24.h
cs46xxpm-24.h: \
   /home/me/kernel/linux/include/linux/pm.h \
   cs46xxpm.h
	@touch cs46xxpm-24.h
dev_table.o: dev_table.c \
   /home/me/kernel/linux/include/linux/init.h \
   sound_config.h
dmabuf.o: dmabuf.c \
   sound_config.h \
   /home/me/kernel/linux/include/linux/wrapper.h
es1370.o: es1370.c \
   /home/me/kernel/linux/include/linux/version.h \
   /home/me/kernel/linux/include/linux/module.h \
   /home/me/kernel/linux/include/linux/string.h \
   /home/me/kernel/linux/include/linux/ioport.h \
   /home/me/kernel/linux/include/linux/sched.h \
   /home/me/kernel/linux/include/linux/delay.h \
   /home/me/kernel/linux/include/linux/sound.h \
   /home/me/kernel/linux/include/linux/slab.h \
   /home/me/kernel/linux/include/linux/soundcard.h \
   /home/me/kernel/linux/include/linux/pci.h \
   /home/me/kernel/linux/include/linux/smp_lock.h \
   /home/me/kernel/linux/include/linux/wrapper.h \
   /home/me/kernel/linux/include/asm/io.h \
   /home/me/kernel/linux/include/asm/dma.h \
   /home/me/kernel/linux/include/linux/init.h \
   /home/me/kernel/linux/include/linux/poll.h \
   /home/me/kernel/linux/include/linux/spinlock.h \
   /home/me/kernel/linux/include/asm/uaccess.h \
   /home/me/kernel/linux/include/asm/hardirq.h \
   /home/me/kernel/linux/include/linux/gameport.h
es1371.o: es1371.c \
   /home/me/kernel/linux/include/linux/version.h \
   /home/me/kernel/linux/include/linux/module.h \
   /home/me/kernel/linux/include/linux/string.h \
   /home/me/kernel/linux/include/linux/ioport.h \
   /home/me/kernel/linux/include/linux/sched.h \
   /home/me/kernel/linux/include/linux/delay.h \
   /home/me/kernel/linux/include/linux/sound.h \
   /home/me/kernel/linux/include/linux/slab.h \
   /home/me/kernel/linux/include/linux/soundcard.h \
   /home/me/kernel/linux/include/linux/pci.h \
   /home/me/kernel/linux/include/linux/init.h \
   /home/me/kernel/linux/include/linux/poll.h \
   /home/me/kernel/linux/include/linux/bitops.h \
   /home/me/kernel/linux/include/linux/proc_fs.h \
   /home/me/kernel/linux/include/linux/spinlock.h \
   /home/me/kernel/linux/include/linux/smp_lock.h \
   /home/me/kernel/linux/include/linux/ac97_codec.h \
   /home/me/kernel/linux/include/linux/wrapper.h \
   /home/me/kernel/linux/include/asm/io.h \
   /home/me/kernel/linux/include/asm/dma.h \
   /home/me/kernel/linux/include/asm/uaccess.h \
   /home/me/kernel/linux/include/asm/hardirq.h \
   /home/me/kernel/linux/include/linux/gameport.h
esssolo1.o: esssolo1.c \
   /home/me/kernel/linux/include/linux/version.h \
   /home/me/kernel/linux/include/linux/module.h \
   /home/me/kernel/linux/include/linux/string.h \
   /home/me/kernel/linux/include/linux/ioport.h \
   /home/me/kernel/linux/include/linux/sched.h \
   /home/me/kernel/linux/include/linux/delay.h \
   /home/me/kernel/linux/include/linux/sound.h \
   /home/me/kernel/linux/include/linux/slab.h \
   /home/me/kernel/linux/include/linux/soundcard.h \
   /home/me/kernel/linux/include/linux/pci.h \
   /home/me/kernel/linux/include/linux/bitops.h \
   /home/me/kernel/linux/include/asm/io.h \
   /home/me/kernel/linux/include/asm/dma.h \
   /home/me/kernel/linux/inclu��9���������k�������S�����
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green-16005: Invalid item type observed, run fsck ASAP
green-16006: Invalid item type observed, run fsck ASAP
green-16007: Invalid item type observed, run fsck ASAP
green-16008: Invalid item type observed, run fsck ASAP
green-16009: Invalid item type observed, run fsck ASAP
green-16010: Invalid item type observed, run fsck ASAP
green-16011: Invalid item type observed, run fsck ASAP
GCC: (GNU) 2.95.4 20011002 (Debian prerelease).symtab.strtab.shstrtab.rel.text.rel.data.bss.note.rodata.comment
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.��	���r�v:�J���!��C��
r����h��`�d�i�����R���de/linux/init.h \
   /home/me/kernel/linux/include/linux/poll.h \
   /home/me/kernel/linux/include/linux/spinlock.h \
   /home/me/kernel/linux/include/linux/smp_lock.h \
   /home/me/kernel/linux/include/linux/wrapper.h \
   /home/me/kernel/linux/include/asm/uaccess.h \
   /home/me/kernel/linux/include/asm/hardirq.h \
   /home/me/kernel/linux/include/linux/gameport.h \
   dm.h
gus.h: \
   ad1848.h
	@touch gus.h
gus_card.o: gus_card.c \
   /home/me/kernel/linux/include/linux/init.h \
   /home/me/kernel/linux/include/linux/module.h \
   sound_config.h \
   gus.h \
   gus_hw.h \
   $(wildcard /home/me/kernel/linux/include/config/sound/gus16.h) \
   $(wildcard /home/me/kernel/linux/include/config/sound/gusmax.h)
gus_midi.o: gus_midi.c \
   /home/me/kernel/linux/include/linux/init.h \
   sound_config.h \
   gus.h \
   gus_hw.h \
   midi_synth.h
gus_vol.o: gus_vol.c \
   sound_config.h \
   gus.h \
   gus_linearvol.h
gus_wave.o: gus_wave.c \
   /home/me/kernel/linux/include/linux/init.h \
   sound_config.h \
   /home/me/kernel/linux/include/linux/ultrasound.h \
   gus.h \
   gus_hw.h \
   iwmem.h \
   $(wildcard /home/me/kernel/linux/include/config/sound/gusmax.h)
hal2.o: hal2.c \
   /home/me/kernel/linux/include/linux/module.h \
   /home/me/kernel/linux/include/linux/sched.h \
   /home/me/kernel/linux/include/linux/init.h \
   /home/me/kernel/linux/include/linux/slab.h \
   /home/me/kernel/linux/include/linux/poll.h \
   /home/me/kernel/linux/include/linux/sound.h \
   /home/me/kernel/linux/include/linux/soundcard.h \
   /home/me/kernel/linux/include/asm/io.h \
   /home/me/kernel/linux/include/asm/uaccess.h \
   hal2.h
hal2.h: \
   /home/me/kernel/linux/include/linux/spinlock.h \
   /home/me/kernel/linux/include/linux/types.h
	@touch hal2.h
i810_audio.o: i810_audio.c \
   /home/me/kernel/linux/include/linux/module.h \
   /home/me/kernel/linux/include/linux/version.h \
   /home/me/kernel/linux/include/linux/string.h \
   /home/me/kernel/linux/include/linux/ctype.h \
   /home/me/kernel/linux/include/linux/ioport.h \
   /home/me/kernel/linux/include/linux/sched.h \
   /home/me/kernel/linux/include/linux/delay.h \
   /home/me/kernel/linux/include/linux/sound.h \
   /home/me/kernel/linux/include/linux/slab.h \
   /home/me/kernel/linux/include/linux/soundcard.h \
   /home/me/kernel/linux/include/linux/pci.h \
   /home/me/kernel/linux/include/asm/io.h \
   /home/me/kernel/linux/include/asm/dma.h \
   /home/me/kernel/linux/include/linux/init.h \
   /home/me/kernel/linux/include/linux/poll.h \
   /home/me/kernel/linux/include/linux/spinlock.h \
   /home/me/kernel/linux/include/linux/smp_lock.h \
   /home/me/kernel/linux/include/linux/ac97_codec.h \
   /home/me/kernel/linux/include/linux/wrapper.h \
   /home/me/kernel/linux/include/asm/uaccess.h \
   /home/me/kernel/linux/include/asm/hardirq.h \
   $(wildcard /home/me/kernel/linux/include/config/pm.h)
ics2101.o: ics2101.c \
   /home/me/kernel/linux/include/linux/init.h \
   sound_config.h \
   /home/me/kernel/linux/include/linux/ultrasound.h \
   gus.h \
   gus_hw.h
ite8172.o: ite8172.c \
   /home/me/kernel/linux/include/linux/version.h \
   /home/me/kernel/linux/include/linux/module.h \
   /home/me/kernel/linux/include/linux/string.h \
   /home/me/kernel/linux/include/linux/ioport.h \
   /home/me/kernel/linux/include/linux/sched.h \
   /home/me/kernel/linux/include/linux/delay.h \
   /home/me/kernel/linux/include/linux/sound.h \
   /home/me/kernel/linux/include/linux/malloc.h \
   /home/me/kernel/linux/include/linux/soundcard.h \
   /home/me/kernel/linux/include/linux/pci.h \
   /home/me/kernel/linux/include/linux/init.h \
   /home/me/kernel/linux/include/linux/poll.h \
   /home/me/kernel/linux/include/linux/bitops.h \
   /home/me/kernel/linux/include/linux/proc_fs.h \
   /home/me/kernel/linux/include/linux/spinlock.h \
   /home/me/kernel/linux/include/linux/smp_lock.h \
   /home/me/kernel/linux/include/linux/ac97_codec.h \
   /home/me/kernel/linux/include/linux/wrapper.h \
   /home/me/kernel/linux/include/asm/io.h \
   /home/me/kernel/linux/include/asm/dma.h \
   /home/me/kernel/linux/include/asm/uaccess.h \
   /home/me/kernel/linux/include/asm/hardirq.h
mad16.o: mad16.c \
   /home/me/kernel/linux/include/linux/init.h \
   /home/me/kernel/linux/include/linux/module.h \
   /home/me/kernel/linux/include/linux/gameport.h \
   sound_config.h \
   ad1848.h \
   sb.h \
   mpu401.h \
   $(wildcard /home/me/kernel/linux/include/config/mad16/oldcard.h)
maestro.o: maestro.c \
   /home/me/kernel/linux/include/linux/version.h \
   /home/me/kernel/linux/include/linux/module.h \
   /home/me/kernel/linux/include/linux/sched.h \
   /home/me/kernel/linux/include/linux/smp_lock.h \
   /home/me/kernel/linux/include/linux/wrapper.h \
   /home/me/kernel/linux/include/linux/string.h \
   /home/me/kernel/linux/include/linux/ctype.h \
   /home/me/kernel/linux/include/linux/ioport.h \
   /home/me/kernel/linux/include/linux/delay.h \
   /home/me/kernel/linux/include/linux/sound.h \
   /home/me/kernel/linux/include/linux/slab.h \
   /home/me/kernel/linux/include/linux/soundcard.h \
   /home/me/kernel/linux/include/linux/pci.h \
   /home/me/kernel/linux/include/linux/spinlock.h \
   /home/me/kernel/linux/include/asm/io.h \
   /home/me/kernel/linux/include/asm/dma.h \
   /home/me/kernel/linux/include/linux/init.h \
   /home/me/kernel/linux/include/linux/poll.h \
   /home/me/kernel/linux/include/linux/reboot.h \
   /home/me/kernel/linux/include/asm/uaccess.h \
   /home/me/kernel/linux/include/asm/hardirq.h \
   /home/me/kernel/linux/include/linux/bitops.h \
   /home/me/kernel/linux/include/linux/pm.h \
   maestro.h
maestro3.o: maestro3.c \
   /home/me/kernel/linux/include/linux/module.h \
   /home/me/kernel/linux/include/linux/kernel.h \
   /home/me/kernel/linux/include/linux/string.h \
   /home/me/kernel/linux/include/linux/ctype.h \
   /home/me/kernel/linux/include/linux/ioport.h \
   /home/me/kernel/linux/include/linux/sched.h \
   /home/me/kernel/linux/include/linux/delay.h \
   /home/me/kernel/linux/include/linux/sound.h \
   /home/me/kernel/linux/include/linux/slab.h \
   /home/me/kernel/linux/include/linux/soundcard.h \
   /home/me/kernel/linux/include/linux/pci.h \
   /home/me/kernel/linux/include/linux/vmalloc.h \
   /home/me/kernel/linux/include/asm/io.h \
   /home/me/kernel/linux/include/asm/dma.h \
   /home/me/kernel/linux/include/linux/init.h \
   /home/me/kernel/linux/include/linux/poll.h \
   /home/me/kernel/linux/include/linux/reboot.h \
   /home/me/kernel/linux/include/asm/uaccess.h \
   /home/me/kernel/linux/include/asm/hardirq.h \
   /home/me/kernel/linux/include/linux/spinlock.h \
   /home/me/kernel/linux/include/linux/ac97_codec.h \
   /home/me/kernel/linux/include/linux/wrapper.h \
   maestro3.h \
   $(wildcard /home/me/kernel/linux/include/config/pm.h)
maui.o: maui.c \
   /home/me/kernel/linux/include/linux/module.h \
   /home/me/kernel/linux/include/linux/init.h \
   sound_config.h \
   sound_firmware.h \
   mpu401.h \
   $(wildcard /home/me/kernel/linux/include/config/smp.h)
midi_syms.o: midi_syms.c \
   /home/me/kernel/linux/include/linux/module.h \
   sound_config.h \
   midi_synth.h
midi_synth.o: midi_synth.c \
   sound_config.h \
   midi_synth.h
midibuf.o: midibuf.c \
   /home/me/kernel/linux/include/linux/stddef.h \
   /home/me/kernel/linux/include/linux/kmod.h \
   sound_config.h
mpu401.o: mpu401.c \
   /home/me/kernel/linux/include/linux/module.h \
   /home/me/kernel/linux/include/linux/init.h \
   sound_config.h \
   coproc.h \
   mpu401.h \
   midi_synth.h
msnd.o: msnd.c \
   /home/me/kernel/linux/include/linux/version.h \
   /home/me/kernel/linux/include/linux/module.h \
   /home/me/kernel/linux/include/linux/kernel.h \
   /home/me/kernel/linux/include/linux/slab.h \
   /home/me/kernel/linux/include/linux/vmalloc.h \
   /home/me/kernel/linux/include/linux/types.h \
   /home/me/kernel/linux/include/linux/delay.h \
   /home/me/kernel/linux/include/linux/mm.h \
   /home/me/kernel/linux/include/linux/major.h \
   /home/me/kernel/linux/include/linux/fs.h \
   /home/me/kernel/linux/include/linux/sound.h \
   /home/me/kernel/linux/include/asm/segment.h \
   sound_config.h \
   /home/me/kernel/linux/include/linux/init.h \
   /home/me/kernel/linux/include/asm/io.h \
   /home/me/kernel/linux/include/asm/uaccess.h \
   /home/me/kernel/linux/include/linux/spinlock.h \
   /home/me/kernel/linux/include/asm/irq.h \
   msnd.h
msnd_classic.o: msnd_classic.c \
   msnd_pinnacle.c
msnd_classic.h: \
   $(wildcard /home/me/kernel/linux/include/config/msndclas/init/file.h) \
   $(wildcard /home/me/kernel/linux/include/config/msndclas/perm/file.h)
	@touch msnd_classic.h
msnd_pinnacle.o: msnd_pinnacle.c \
   /home/me/kernel/linux/include/linux/kernel.h \
   /home/me/kernel/linux/include/linux/version.h \
   /home/me/kernel/linux/include/linux/module.h \
   /home/me/kernel/linux/include/linux/slab.h \
   /home/me/kernel/linux/include/linux/types.h \
   /home/me/kernel/linux/include/linux/delay.h \
   /home/me/kernel/linux/include/linux/init.h \
   /home/me/kernel/linux/include/linux/smp_lock.h \
   /home/me/kernel/linux/include/asm/irq.h \
   /home/me/kernel/linux/include/asm/io.h \
   sound_config.h \
   sound_firmware.h \
   msnd.h \
   $(wildcard /home/me/kernel/linux/include/config/msndclas/have/boot.h) \
   msnd_classic.h \
   $(wildcard /home/me/kernel/linux/include/config/msndpin/have/boot.h) \
   msnd_pinnacle.h \
   $(wildcard /home/me/kernel/linux/include/config/msnd/write/ndelay.h) \
   $(wildcard /home/me/kernel/linux/include/config/msndclas/io.h) \
   $(wildcard /home/me/kernel/linux/include/config/msndclas/irq.h) \
   $(wildcard /home/me/kernel/linux/include/config/msndclas/mem.h) \
   $(wildcard /home/me/kernel/linux/include/config/msndpin/io.h) \
   $(wildcard /home/me/kernel/linux/include/config/msndpin/irq.h) \
   $(wildcard /home/me/kernel/linux/include/config/msndpin/mem.h) \
   $(wildcard /home/me/kernel/linux/include/config/msndpin/nonpnp.h) \
   $(wildcard /home/me/kernel/linux/include/config/msndpin/cfg.h) \
   $(wildcard /home/me/kernel/linux/include/config/msndpin/mpu/io.h) \
   $(wildcard /home/me/kernel/linux/include/config/msndpin/mpu/irq.h) \
   $(wildcard /home/me/kernel/linux/include/config/msndpin/ide/io0.h) \
   $(wildcard /home/me/kernel/linux/include/config/msndpin/ide/io1.h) \
   $(wildcard /home/me/kernel/linux/include/config/msndpin/ide/irq.h) \
   $(wildcard /home/me/kernel/linux/include/config/msndpin/joystick/io.h) \
   $(wildcard /home/me/kernel/linux/include/config/msndpin/digital.h) \
   $(wildcard /home/me/kernel/linux/include/config/msnd/fifosize.h) \
   $(wildcard /home/me/kernel/linux/include/config/msnd/calsignal.h)
msnd_pinnacle.h: \
   $(wildcard /home/me/kernel/linux/include/config/msndpin/init/file.h) \
   $(wildcard /home/me/kernel/linux/include/config/msndpin/perm/file.h)
	@touch msnd_pinnacle.h
nec_vrc5477.o: nec_vrc5477.c \
   /home/me/kernel/linux/include/linux/version.h \
   /home/me/kernel/linux/include/linux/module.h \
   /home/me/kernel/linux/include/linux/string.h \
   /home/me/kernel/linux/include/linux/kernel.h \
   /home/me/kernel/linux/include/linux/ioport.h \
   /home/me/kernel/linux/include/linux/sched.h \
   /home/me/kernel/linux/include/linux/delay.h \
   /home/me/kernel/linux/include/linux/sound.h \
   /home/me/kernel/linux/include/linux/slab.h \
   /home/me/kernel/linux/include/linux/soundcard.h \
   /home/me/kernel/linux/include/linux/pci.h \
   /home/me/kernel/linux/include/linux/init.h \
   /home/me/kernel/linux/include/linux/poll.h \
   /home/me/kernel/linux/include/linux/bitops.h \
   /home/me/kernel/linux/include/linux/proc_fs.h \
   /home/me/kernel/linux/include/linux/spinlock.h \
   /home/me/kernel/linux/include/linux/smp_lock.h \
   /home/me/kernel/linux/include/linux/ac97_codec.h \
   /home/me/kernel/linux/include/linux/wrapper.h \
   /home/me/kernel/linux/include/asm/io.h \
   /home/me/kernel/linux/include/asm/dma.h \
   /home/me/kernel/linux/include/asm/uaccess.h \
   /home/me/kernel/linux/include/asm/hardirq.h \
   /home/me/kernel/linux/include/linux/kernel.h
nm256.h: \
   ac97.h
	@touch nm256.h
nm256_audio.o: nm256_audio.c \
   /home/me/kernel/linux/include/linux/pci.h \
   /home/me/kernel/linux/include/linux/init.h \
   /home/me/kernel/linux/include/linux/module.h \
   /home/me/kernel/linux/include/linux/pm.h \
   /home/me/kernel/linux/include/linux/delay.h \
   sound_config.h \
   nm256.h \
   nm256_coeff.h
opl3.o: opl3.c \
   /home/me/kernel/linux/include/linux/init.h \
   /home/me/kernel/linux/include/linux/module.h \
   /home/me/kernel/linux/include/linux/delay.h \
   sound_config.h \
   opl3.h \
   opl3_hw.h
opl3sa.o: opl3sa.c \
   /home/me/kernel/linux/include/linux/init.h \
   /home/me/kernel/linux/include/linux/module.h \
   sound_config.h \
   ad1848.h \
   mpu401.h \
   sb.h
opl3sa2.o: opl3sa2.c \
   /home/me/kernel/linux/include/linux/init.h \
   /home/me/kernel/linux/include/linux/module.h \
   /home/me/kernel/linux/include/linux/isapnp.h \
   /home/me/kernel/linux/include/linux/pm.h \
   /home/me/kernel/linux/include/linux/delay.h \
   sound_config.h \
   ad1848.h \
   mpu401.h \
   $(wildcard /home/me/kernel/linux/include/config/isapnp.h) \
   $(wildcard /home/me/kernel/linux/include/config/isapnp/module.h) \
   $(wildcard /home/me/kernel/linux/include/config/pm.h)
os.h: \
   /home/me/kernel/linux/include/linux/module.h \
   /home/me/kernel/linux/include/linux/version.h \
   /home/me/kernel/linux/include/linux/utsname.h \
   /home/me/kernel/linux/include/linux/string.h \
   /home/me/kernel/linux/include/linux/fs.h \
   /home/me/kernel/linux/include/asm/dma.h \
   /home/me/kernel/linux/include/asm/io.h \
   /home/me/kernel/linux/include/asm/param.h \
   /home/me/kernel/linux/include/linux/ptrace.h \
   /home/me/kernel/linux/include/linux/sched.h \
   /home/me/kernel/linux/include/linux/slab.h \
   /home/me/kernel/linux/include/linux/ioport.h \
   /home/me/kernel/linux/include/asm/page.h \
   /home/me/kernel/linux/include/asm/system.h \
   /home/me/kernel/linux/include/asm/segment.h \
   /home/me/kernel/linux/include/linux/vmalloc.h \
   /home/me/kernel/linux/include/asm/uaccess.h \
   /home/me/kernel/linux/include/linux/poll.h \
   /home/me/kernel/linux/include/linux/pci.h \
   /home/me/kernel/linux/include/linux/wrapper.h \
   /home/me/kernel/linux/include/linux/soundcard.h
	@touch os.h
pas2_card.o: pas2_card.c \
   /home/me/kernel/linux/include/linux/init.h \
   /home/me/kernel/linux/include/linux/module.h \
   sound_config.h \
   pas2.h \
   sb.h \
   $(wildcard /home/me/kernel/linux/include/config/pas/joystick.h)
pas2_midi.o: pas2_midi.c \
   /home/me/kernel/linux/include/linux/init.h \
   sound_config.h \
   pas2.h \
   midi_synth.h
pas2_mixer.o: pas2_mixer.c \
   /home/me/kernel/linux/include/linux/init.h \
   sound_config.h \
   pas2.h
pas2_pcm.o: pas2_pcm.c \
   /home/me/kernel/linux/include/linux/init.h \
   sound_config.h \
   pas2.h
pss.o: pss.c \
   /home/me/kernel/linux/include/linux/init.h \
   /home/me/kernel/linux/include/linux/module.h \
   sound_config.h \
   sound_firmware.h \
   ad1848.h \
   mpu401.h \
   coproc.h \
   $(wildcard /home/me/kernel/linux/include/config/pss/mixer.h)
rme96xx.o: rme96xx.c \
   /home/me/kernel/linux/include/linux/version.h \
   /home/me/kernel/linux/include/linux/module.h \
   /home/me/kernel/linux/include/linux/string.h \
   /home/me/kernel/linux/include/linux/sched.h \
   /home/me/kernel/linux/include/linux/sound.h \
   /home/me/kernel/linux/include/linux/soundcard.h \
   /home/me/kernel/linux/include/linux/pci.h \
   /home/me/kernel/linux/include/linux/smp_lock.h \
   /home/me/kernel/linux/include/linux/delay.h \
   /home/me/kernel/linux/include/linux/slab.h \
   /home/me/kernel/linux/include/asm/dma.h \
   /home/me/kernel/linux/include/linux/init.h \
   /home/me/kernel/linux/include/linux/poll.h \
   rme96xx.h
sb_audio.o: sb_audio.c \
   /home/me/kernel/linux/include/linux/spinlock.h \
   sound_config.h \
   sb_mixer.h \
   sb.h \
   sb_ess.h
sb_card.o: sb_card.c \
   /home/me/kernel/linux/include/linux/mca.h \
   /home/me/kernel/linux/include/linux/module.h \
   /home/me/kernel/linux/include/linux/init.h \
   /home/me/kernel/linux/include/linux/isapnp.h \
   sound_config.h \
   sb_mixer.h \
   sb.h \
   $(wildcard /home/me/kernel/linux/include/config/isapnp.h) \
   $(wildcard /home/me/kernel/linux/include/config/isapnp/module.h) \
   $(wildcard /home/me/kernel/linux/include/config/mca.h)
sb_common.o: sb_common.c \
   /home/me/kernel/linux/include/linux/init.h \
   /home/me/kernel/linux/include/linux/module.h \
   /home/me/kernel/linux/include/linux/delay.h \
   /home/me/kernel/linux/include/linux/spinlock.h \
   sound_config.h \
   sound_firmware.h \
   mpu401.h \
   sb_mixer.h \
   sb.h \
   sb_ess.h \
   $(wildcard /home/me/kernel/linux/include/config/sound/mpu401.h)
sb_ess.o: sb_ess.c \
   /home/me/kernel/linux/include/linux/delay.h \
   /home/me/kernel/linux/include/linux/spinlock.h \
   sound_config.h \
   sb_mixer.h \
   sb.h \
   sb_ess.h
sb_midi.o: sb_midi.c \
   /home/me/kernel/linux/include/linux/spinlock.h \
   sound_config.h \
   sb.h \
   midi_synth.h
sb_mixer.o: sb_mixer.c \
   sound_config.h \
   sb.h \
   sb_mixer.h \
   sb_ess.h
sequencer.o: sequencer.c \
   /home/me/kernel/linux/include/linux/kmod.h \
   sound_config.h \
   midi_ctrl.h \
   tuning.h
sequencer_syms.o: sequencer_syms.c \
   /home/me/kernel/linux/include/linux/module.h \
   sound_config.h \
   sound_calls.h \
   tuning.h
sgalaxy.o: sgalaxy.c \
   /home/me/kernel/linux/include/linux/init.h \
   /home/me/kernel/linux/include/linux/module.h \
   sound_config.h \
   ad1848.h
skeleton.o: skeleton.c \
   /home/me/kernel/linux/include/linux/module.h \
   /home/me/kernel/linux/include/linux/delay.h \
   /home/me/kernel/linux/include/linux/errno.h \
   /home/me/kernel/linux/include/linux/fs.h \
   /home/me/kernel/linux/include/linux/kernel.h \
   /home/me/kernel/linux/include/linux/pci.h \
   /home/me/kernel/linux/include/asm/io.h \
   sound_config.h
sonicvibes.o: sonicvibes.c \
   /home/me/kernel/linux/include/linux/version.h \
   /home/me/kernel/linux/include/linux/module.h \
   /home/me/kernel/linux/include/linux/string.h \
   /home/me/kernel/linux/include/linux/ioport.h \
   /home/me/kernel/linux/include/linux/sched.h \
   /home/me/kernel/linux/include/linux/delay.h \
   /home/me/kernel/linux/include/linux/sound.h \
   /home/me/kernel/linux/include/linux/slab.h \
   /home/me/kernel/linux/include/linux/soundcard.h \
   /home/me/kernel/linux/include/linux/pci.h \
   /home/me/kernel/linux/include/asm/io.h \
   /home/me/kernel/linux/include/asm/dma.h \
   /home/me/kernel/linux/include/linux/init.h \
   /home/me/kernel/linux/include/linux/poll.h \
   /home/me/kernel/linux/include/linux/spinlock.h \
   /home/me/kernel/linux/include/linux/smp_lock.h \
   /home/me/kernel/linux/include/linux/wrapper.h \
   /home/me/kernel/linux/include/asm/uaccess.h \
   /home/me/kernel/linux/include/asm/hardirq.h \
   /home/me/kernel/linux/include/linux/gameport.h \
   dm.h
sound_config.h: \
   /home/me/kernel/linux/include/linux/fs.h \
   /home/me/kernel/linux/include/linux/sound.h \
   os.h \
   soundvers.h \
   $(wildcard /home/me/kernel/linux/include/config/pas/base.h) \
   sound_calls.h \
   dev_table.h
	@touch sound_config.h
sound_core.o: sound_core.c \
   /home/me/kernel/linux/include/linux/module.h \
   /home/me/kernel/linux/include/linux/init.h \
   /home/me/kernel/linux/include/linux/sched.h \
   /home/me/kernel/linux/include/linux/slab.h \
   /home/me/kernel/linux/include/linux/types.h \
   /home/me/kernel/linux/include/linux/kernel.h \
   /home/me/kernel/linux/include/linux/fs.h \
   /home/me/kernel/linux/include/linux/sound.h \
   /home/me/kernel/linux/include/linux/major.h \
   /home/me/kernel/linux/include/linux/kmod.h \
   /home/me/kernel/linux/include/linux/devfs_fs_kernel.h \
   $(wildcard /home/me/kernel/linux/include/config/sound/msndclas.h) \
   $(wildcard /home/me/kernel/linux/include/config/sound/msndpin.h)
sound_firmware.o: sound_firmware.c \
   os.h \
   /home/me/kernel/linux/include/linux/module.h \
   /home/me/kernel/linux/include/linux/fs.h \
   /home/me/kernel/linux/include/linux/mm.h \
   /home/me/kernel/linux/include/linux/slab.h \
   /home/me/kernel/linux/include/linux/unistd.h \
   /home/me/kernel/linux/include/asm/uaccess.h
sound_syms.o: sound_syms.c \
   /home/me/kernel/linux/include/linux/module.h \
   sound_config.h \
   sound_calls.h
sound_timer.o: sound_timer.c \
   /home/me/kernel/linux/include/linux/string.h \
   sound_config.h
soundcard.o: soundcard.c \
   sound_config.h \
   /home/me/kernel/linux/include/linux/init.h \
   /home/me/kernel/linux/include/linux/types.h \
   /home/me/kernel/linux/include/linux/errno.h \
   /home/me/kernel/linux/include/linux/signal.h \
   /home/me/kernel/linux/include/linux/fcntl.h \
   /home/me/kernel/linux/include/linux/ctype.h \
   /home/me/kernel/linux/include/linux/stddef.h \
   /home/me/kernel/linux/include/linux/kmod.h \
   /home/me/kernel/linux/include/asm/dma.h \
   /home/me/kernel/linux/include/asm/io.h \
   /home/me/kernel/linux/include/asm/segment.h \
   /home/me/kernel/linux/include/linux/wait.h \
   /home/me/kernel/linux/include/linux/slab.h \
   /home/me/kernel/linux/include/linux/ioport.h \
   /home/me/kernel/linux/include/linux/devfs_fs_kernel.h \
   /home/me/kernel/linux/include/linux/major.h \
   /home/me/kernel/linux/include/linux/delay.h \
   /home/me/kernel/linux/include/linux/proc_fs.h \
   /home/me/kernel/linux/include/linux/smp_lock.h \
   /home/me/kernel/linux/include/linux/module.h \
   $(wildcard /home/me/kernel/linux/include/config/sound/dmap.h) \
   $(wildcard /home/me/kernel/linux/include/config/pci.h) \
   $(wildcard /home/me/kernel/linux/include/config/sound/traceinit.h)
sscape.o: sscape.c \
   /home/me/kernel/linux/include/linux/init.h \
   /home/me/kernel/linux/include/linux/module.h \
   sound_config.h \
   sound_firmware.h \
   /home/me/kernel/linux/include/linux/types.h \
   /home/me/kernel/linux/include/linux/errno.h \
   /home/me/kernel/linux/include/linux/signal.h \
   /home/me/kernel/linux/include/linux/fcntl.h \
   /home/me/kernel/linux/include/linux/ctype.h \
   /home/me/kernel/linux/include/linux/stddef.h \
   /home/me/kernel/linux/include/linux/kmod.h \
   /home/me/kernel/linux/include/asm/dma.h \
   /home/me/kernel/linux/include/asm/io.h \
   /home/me/kernel/linux/include/asm/segment.h \
   /home/me/kernel/linux/include/linux/wait.h \
   /home/me/kernel/linux/include/linux/slab.h \
   /home/me/kernel/linux/include/linux/ioport.h \
   /home/me/kernel/linux/include/linux/delay.h \
   /home/me/kernel/linux/include/linux/proc_fs.h \
   /home/me/kernel/linux/include/linux/wrapper.h \
   coproc.h \
   ad1848.h \
   mpu401.h
swarm_cs4297a.o: swarm_cs4297a.c \
   /home/me/kernel/linux/include/linux/list.h \
   /home/me/kernel/linux/include/linux/version.h \
   /home/me/kernel/linux/include/linux/module.h \
   /home/me/kernel/linux/include/linux/string.h \
   /home/me/kernel/linux/include/linux/ioport.h \
   /home/me/kernel/linux/include/linux/sched.h \
   /home/me/kernel/linux/include/linux/delay.h \
   /home/me/kernel/linux/include/linux/sound.h \
   /home/me/kernel/linux/include/linux/malloc.h \
   /home/me/kernel/linux/include/linux/soundcard.h \
   /home/me/kernel/linux/include/linux/ac97_codec.h \
   /home/me/kernel/linux/include/linux/pci.h \
   /home/me/kernel/linux/include/linux/bitops.h \
   /home/me/kernel/linux/include/asm/io.h \
   /home/me/kernel/linux/include/asm/dma.h \
   /home/me/kernel/linux/include/linux/init.h \
   /home/me/kernel/linux/include/linux/poll.h \
   /home/me/kernel/linux/include/linux/smp_lock.h \
   /home/me/kernel/linux/include/linux/wrapper.h \
   /home/me/kernel/linux/include/asm/uaccess.h \
   /home/me/kernel/linux/include/asm/hardirq.h
sys_timer.o: sys_timer.c \
   sound_config.h
trident.o: trident.c \
   /home/me/kernel/linux/include/linux/module.h \
   /home/me/kernel/linux/include/linux/version.h \
   /home/me/kernel/linux/include/linux/string.h \
   /home/me/kernel/linux/include/linux/ctype.h \
   /home/me/kernel/linux/include/linux/ioport.h \
   /home/me/kernel/linux/include/linux/sched.h \
   /home/me/kernel/linux/include/linux/delay.h \
   /home/me/kernel/linux/include/linux/sound.h \
   /home/me/kernel/linux/include/linux/slab.h \
   /home/me/kernel/linux/include/linux/soundcard.h \
   /home/me/kernel/linux/include/linux/pci.h \
   /home/me/kernel/linux/include/asm/io.h \
   /home/me/kernel/linux/include/asm/dma.h \
   /home/me/kernel/linux/include/linux/init.h \
   /home/me/kernel/linux/include/linux/poll.h \
   /home/me/kernel/linux/include/linux/spinlock.h \
   /home/me/kernel/linux/include/linux/smp_lock.h \
   /home/me/kernel/linux/include/linux/ac97_codec.h \
   /home/me/kernel/linux/include/linux/wrapper.h \
   /home/me/kernel/linux/include/asm/uaccess.h \
   /home/me/kernel/linux/include/asm/hardirq.h \
   /home/me/kernel/linux/include/linux/bitops.h \
   /home/me/kernel/linux/include/linux/proc_fs.h \
   /home/me/kernel/linux/include/linux/interrupt.h \
   $(wildcard /home/me/kernel/linux/include/config/alpha/nautilus.h) \
   $(wildcard /home/me/kernel/linux/include/config/alpha/generic.h) \
   trident.h \
   /home/me/kernel/linux/include/linux/pm.h \
   $(wildcard /home/me/kernel/linux/include/config/proc/fs.h)
trix.o: trix.c \
   /home/me/kernel/linux/include/linux/init.h \
   /home/me/kernel/linux/include/linux/module.h \
   sound_config.h \
   sb.h \
   sound_firmware.h \
   ad1848.h \
   mpu401.h
uart401.o: uart401.c \
   /home/me/kernel/linux/include/linux/init.h \
   /home/me/kernel/linux/include/linux/module.h \
   sound_config.h \
   mpu401.h \
   midi_synth.h
uart6850.o: uart6850.c \
   /home/me/kernel/linux/include/linux/init.h \
   /home/me/kernel/linux/include/linux/module.h \
   sound_config.h \
   midi_synth.h
v_midi.o: v_midi.c \
   /home/me/kernel/linux/include/linux/init.h \
   /home/me/kernel/linux/include/linux/module.h \
   sound_config.h \
   v_midi.h \
   midi_synth.h
via82cxxx_audio.o: via82cxxx_audio.c \
   /home/me/kernel/linux/include/linux/module.h \
   /home/me/kernel/linux/include/linux/kernel.h \
   /home/me/kernel/linux/include/linux/fs.h \
   /home/me/kernel/linux/include/linux/mm.h \
   /home/me/kernel/linux/include/linux/pci.h \
   /home/me/kernel/linux/include/linux/init.h \
   /home/me/kernel/linux/include/linux/proc_fs.h \
   /home/me/kernel/linux/include/linux/spinlock.h \
   /home/me/kernel/linux/include/linux/sound.h \
   /home/me/kernel/linux/include/linux/poll.h \
   /home/me/kernel/linux/include/linux/soundcard.h \
   /home/me/kernel/linux/include/linux/ac97_codec.h \
   /home/me/kernel/linux/include/linux/smp_lock.h \
   /home/me/kernel/linux/include/linux/ioport.h \
   /home/me/kernel/linux/include/linux/wrapper.h \
   /home/me/kernel/linux/include/linux/delay.h \
   /home/me/kernel/linux/include/asm/io.h \
   /home/me/kernel/linux/include/asm/uaccess.h \
   /home/me/kernel/linux/include/asm/hardirq.h \
   /home/me/kernel/linux/include/asm/semaphore.h \
   sound_config.h \
   dev_table.h \
   mpu401.h \
   $(wildcard /home/me/kernel/linux/include/config/proc/fs.h) \
   $(wildcard /home/me/kernel/linux/include/config/sound/via82cxxx/procfs.h) \
   $(wildcard /home/me/kernel/linux/include/config/midi/via82cxxx.h)
vidc.o: vidc.c \
   /home/me/kernel/linux/include/linux/init.h \
   /home/me/kernel/linux/include/linux/module.h \
   /home/me/kernel/linux/include/linux/kernel.h \
   /home/me/kernel/linux/include/asm/dma.h \
   /home/me/kernel/linux/include/asm/io.h \
   /home/me/kernel/linux/include/asm/irq.h \
   /home/me/kernel/linux/include/asm/system.h \
   sound_config.h \
   vidc.h \
   $(wildcard /home/me/kernel/linux/include/config/sound/softoss.h) \
   $(wildcard /home/me/kernel/linux/include/config/sound/softoss/module.h)
vidc_fill.o: vidc_fill.S \
   /home/me/kernel/linux/include/linux/linkage.h
vwsnd.o: vwsnd.c \
   /home/me/kernel/linux/include/linux/module.h \
   /home/me/kernel/linux/include/linux/init.h \
   /home/me/kernel/linux/include/linux/sched.h \
   /home/me/kernel/linux/include/linux/stddef.h \
   /home/me/kernel/linux/include/linux/spinlock.h \
   /home/me/kernel/linux/include/linux/smp_lock.h \
   /home/me/kernel/linux/include/asm/fixmap.h \
   /home/me/kernel/linux/include/asm/cobalt.h \
   /home/me/kernel/linux/include/asm/semaphore.h \
   sound_config.h \
   /home/me/kernel/linux/include/linux/interrupt.h
waveartist.o: waveartist.c \
   /home/me/kernel/linux/include/linux/module.h \
   /home/me/kernel/linux/include/linux/init.h \
   /home/me/kernel/linux/include/linux/sched.h \
   /home/me/kernel/linux/include/linux/interrupt.h \
   /home/me/kernel/linux/include/linux/delay.h \
   /home/me/kernel/linux/include/linux/spinlock.h \
   /home/me/kernel/linux/include/linux/bitops.h \
   /home/me/kernel/linux/include/asm/system.h \
   sound_config.h \
   waveartist.h \
   $(wildcard /home/me/kernel/linux/include/config/arm.h) \
   $(wildcard /home/me/kernel/linux/include/config/arch/netwinder.h)
wavfront.o: wavfront.c \
   /home/me/kernel/linux/include/linux/module.h \
   /home/me/kernel/linux/include/linux/kernel.h \
   /home/me/kernel/linux/include/linux/init.h \
   /home/me/kernel/linux/include/linux/sched.h \
   /home/me/kernel/linux/include/linux/smp_lock.h \
   /home/me/kernel/linux/include/linux/ptrace.h \
   /home/me/kernel/linux/include/linux/fcntl.h \
   /home/me/kernel/linux/include/linux/ioport.h \
   /home/me/kernel/linux/include/linux/interrupt.h \
   /home/me/kernel/linux/include/linux/delay.h \
   sound_config.h \
   /home/me/kernel/linux/include/linux/wavefront.h \
   midi_synth.h \
   os.h \
   /home/me/kernel/linux/include/linux/fs.h \
   /home/me/kernel/linux/include/linux/mm.h \
   /home/me/kernel/linux/include/linux/slab.h \
   /home/me/kernel/linux/include/linux/unistd.h \
   /home/me/kernel/linux/include/asm/uaccess.h \
   yss225.h
wf_midi.o: wf_midi.c \
   /home/me/kernel/linux/include/linux/init.h \
   sound_config.h \
   /home/me/kernel/linux/include/linux/wavefront.h \
   midi_synth.h
ymfpci.o: ymfpci.c \
   /home/me/kernel/linux/include/linux/module.h \
   /home/me/kernel/linux/include/linux/init.h \
   /home/me/kernel/linux/include/linux/ioport.h \
   /home/me/kernel/linux/include/linux/delay.h \
   /home/me/kernel/linux/include/linux/pci.h \
   /home/me/kernel/linux/include/linux/slab.h \
   /home/me/kernel/linux/include/linux/poll.h \
   /home/me/kernel/linux/include/linux/soundcard.h \
   /home/me/kernel/linux/include/linux/ac97_codec.h \
   /home/me/kernel/linux/include/linux/sound.h \
   /home/me/kernel/linux/include/asm/io.h \
   /home/me/kernel/linux/include/asm/dma.h \
   /home/me/kernel/linux/include/asm/uaccess.h \
   $(wildcard /home/me/kernel/linux/include/config/sound/ymfpci/legacy.h) \
   sound_config.h \
   mpu401.h \
   ymfpci.h \
   ymfpci_image.h
ymfpci.h: \
   $(wildcard /home/me/kernel/linux/include/config/sound/ymfpci/legacy.h)
	@touch ymfpci.h
yss225.o: yss225.c \
   /home/me/kernel/linux/include/linux/init.h
.PRECIOUS:	ac97.h \
	cs46xx_wrapper-24.h \
	cs46xxpm-24.h \
	gus.h \
	hal2.h \
	msnd_classic.h \
	msnd_pinnacle.h \
	nm256.h \
	os.h \
	sound_config.h \
	ymfpci.h \

cs4281m.o: cs4281m.c \
   /home/me/kernel/linux/include/linux/list.h \
   /home/me/kernel/linux/include/linux/version.h \
   /home/me/kernel/linux/include/linux/module.h \
   /home/me/kernel/linux/include/linux/string.h \
   /home/me/kernel/linux/include/linux/ioport.h \
   /home/me/kernel/linux/include/linux/sched.h \
   /home/me/kernel/linux/include/linux/delay.h \
   /home/me/kernel/linux/include/linux/sound.h \
   /home/me/kernel/linux/include/linux/slab.h \
   /home/me/kernel/linux/include/linux/soundcard.h \
   /home/me/kernel/linux/include/linux/pci.h \
   /home/me/kernel/linux/include/linux/bitops.h \
   /home/me/kernel/linux/include/asm/io.h \
   /home/me/kernel/linux/include/asm/dma.h \
   /home/me/kernel/linux/include/linux/init.h \
   /home/me/kernel/linux/include/linux/poll.h \
   /home/me/kernel/linux/include/linux/smp_lock.h \
   /home/me/kernel/linux/include/linux/wrapper.h \
   /home/me/kernel/linux/include/asm/uaccess.h \
   /home/me/kernel/linux/include/asm/hardirq.h \
   cs4281_hwdefs.h \
   cs4281_wrapper.h \
   cs4281pm-24.h \
   cs4281pm-24.c
cs4281pm-24.h: \
   /home/me/kernel/linux/include/linux/pm.h \
   cs4281pm.h \
   $(wildcard /home/me/kernel/linux/include/config/pm.h)
	@touch cs4281pm-24.h
.PRECIOUS:	cs4281pm-24.h \

AULT "iso8859-1"
#undef  CONFIG_NLS_CODEPAGE_437
#undef  CONFIG_NLS_CODEPAGE_737
#undef  CONFIG_NLS_CODEPAGE_775
#undef  CONFIG_NLS_CODEPAGE_850
#undef  CONFIG_NLS_CODEPAGE_852
#undef  CONFIG_NLS_CODEPAGE_855
#undef  CONFIG_NLS_CODEPAGE_857
#undef  CONFIG_NLS_CODEPAGE_860
#undef  CONFIG_NLS_CODEPAGE_861
#undef  CONFIG_NLS_CODEPAGE_862
#undef  CONFIG_NLS_CODEPAGE_863
#undef  CONFIG_NLS_CODEPAGE_864
#undef  CONFIG_NLS_CODEPAGE_865
#undef  CONFIG_NLS_CODEPAGE_866
#undef  CONFIG_NLS_CODEPAGE_869
#undef  CONFIG_NLS_CODEPAGE_936
#undef  CONFIG_NLS_CODEPAGE_950
#undef  CONFIG_NLS_CODEPAGE_932
#undef  CONFIG_NLS_CODEPAGE_949
#undef  CONFIG_NLS_CODEPAGE_874
#undef  CONFIG_NLS_ISO8859_8
#undef  CONFIG_NLS_CODEPAGE_1250
#undef  CONFIG_NLS_CODEPAGE_1251
#undef  CONFIG_NLS_ISO8859_1
#undef  CONFIG_NLS_ISO8859_2
#undef  CONFIG_NLS_ISO8859_3
#undef  CONFIG_NLS_ISO8859_4
#undef  CONFIG_NLS_ISO8859_5
#undef  CONFIG_NLS_ISO8859_6
#undef  CONFIG_NLS_ISO8859_7
#undef  CONFIG_NLS_ISO8859_9
#undef  CONFIG_NLS_ISO8859_13
#undef  CONFIG_NLS_ISO8859_14
#undef  CONFIG_NLS_ISO8859_15
#undef  CONFIG_NLS_KOI8_R
#undef  CONFIG_NLS_KOI8_U
#undef  CONFIG_NLS_UTF8
/*
 * Console drivers
 */
#define CONFIG_VGA_CONSOLE 1
#undef  CONFIG_VIDEO_SELECT
#undef  CONFIG_MDA_CONSOLE
/*
 * Frame-buffer support
 */
#undef  CONFIG_FB
/*
 * Sound
 */
#define CONFIG_SOUND 1
#undef  CONFIG_SOUND_BT878
#undef  CONFIG_SOUND_CMPCI
#define CONFIG_SOUND_CMPCI_MODULE 1
#define CONFIG_SOUND_CMPCI_FM 1
#define CONFIG_SOUND_CMPCI_FMIO 0x388
#define CONFIG_SOUND_CMPCI_FMIO 0x388
#define CONFIG_SOUND_CMPCI_MIDI 1
#define CONFIG_SOUND_CMPCI_MPUIO 0x330
#define CONFIG_SOUND_CMPCI_JOYSTICK 1
#define CONFIG_SOUND_CMPCI_CM8738 1
#undef  CONFIG_SOUND_CMPCI_SPDIFINVERSE
#undef  CONFIG_SOUND_CMPCI_SPDIFLOOP
#define CONFIG_SOUND_CMPCI_SPEAKERS (2)
#undef  CONFIG_SOUND_EMU10K1
#undef  CONFIG_SOUND_FUSION
#undef  CONFIG_SOUND_CS4281
#undef  CONFIG_SOUND_ES1370
#define CONFIG_SOUND_ES1371 1
#undef  CONFIG_SOUND_ESSSOLO1
#undef  CONFIG_SOUND_MAESTRO
#undef  CONFIG_SOUND_MAESTRO3
#undef  CONFIG_SOUND_ICH
#undef  CONFIG_SOUND_RME96XX
#undef  CONFIG_SOUND_SONICVIBES
#undef  CONFIG_SOUND_TRIDENT
#undef  CONFIG_SOUND_MSNDCLAS
#undef  CONFIG_SOUND_MSNDPIN
#undef  CONFIG_SOUND_VIA82CXXX
#undef  CONFIG_SOUND_OSS
#undef  CONFIG_SOUND_TVMIXER
/*
 * USB support
 */
#define CONFIG_USB 1
#undef  CONFIG_USB_DEBUG
/*
 * Miscellaneous USB options
 */
#undef  CONFIG_USB_DEVICEFS
#undef  CONFIG_USB_BANDWIDTH
#undef  CONFIG_USB_LONG_TIMEOUT
/*
 * USB Host Controller Drivers
 */
#undef  CONFIG_USB_EHCI_HCD
#define CONFIG_USB_UHCI 1
#undef  CONFIG_USB_UHCI_ALT
#undef  CONFIG_USB_OHCI
/*
 * USB Device Class drivers
 */
#undef  CONFIG_USB_AUDIO
#undef  CONFIG_USB_BLUETOOTH
#undef  CONFIG_USB_STORAGE
#undef  CONFIG_USB_ACM
#undef  CONFIG_USB_PRINTER
/*
 * USB Human Interface Devices (HID)
 */
#define CONFIG_USB_HID 1
#define CONFIG_USB_HIDDEV 1
#undef  CONFIG_USB_WACOM
/*
 * USB Imaging devices
 */
#undef  CONFIG_USB_DC2XX
#undef  CONFIG_USB_MDC800
#undef  CONFIG_USB_SCANNER
#undef  CONFIG_USB_MICROTEK
#undef  CONFIG_USB_HPUSBSCSI
/*
 * USB Multimedia devices
 */
/*
 *   Video4Linux support is needed for USB Multimedia device support
 */
/*
 * USB Network adaptors
 */
#undef  CONFIG_USB_PEGASUS
#undef  CONFIG_USB_KAWETH
#undef  CONFIG_USB_CATC
#undef  CONFIG_USB_CDCETHER
#undef  CONFIG_USB_USBNET
/*
 * USB port drivers
 */
#undef  CONFIG_USB_USS720
/*
 * USB Serial Converter support
 */
#undef  CONFIG_USB_SERIAL
/*
 * USB Miscellaneous drivers
 */
#undef  CONFIG_USB_RIO500
#undef  CONFIG_USB_AUERSWALD
/*
 * Bluetooth support
 */
#undef  CONFIG_BLUEZ
/*
 * Kernel hacking
 */
#undef  CONFIG_SOFTWARE_SUSPEND
#define CONFIG_DEBUG_KERNEL 1
#undef  CONFIG_DEBUG_HIGHMEM
#undef  CONFIG_DEBUG_SLAB
#undef  CONFIG_DEBUG_IOVIRT
#undef  CONFIG_MAGIC_SYSRQ
#undef  CONFIG_DEBUG_SPINLOCK
#undef  CONFIG_EARLY_CONSOLE_3F8
#undef  CONFIG_EARLY_CONSOLE_3E8
#define CONFIG_EARLY_CONSOLE_VGA 1
#undef  CONFIG_EARLY_CONSOLE_BOCHS_E9_HACK
/*
 * Library routines
 */
#define CONFIG_ZLIB_INFLATE 1
#undef  CONFIG_ZLIB_DEFLATE
#define CONFIG_ZLIB_DEFLATE_MODULE 1
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����v�9�m�e�h���Y���J��C�L�D���T���j�����:���o������������3�n�.��8��<�?M�A��F��F��6FIG_NLS_CODEPAGE_865 is not set
# CONFIG_NLS_CODEPAGE_866 is not set
# CONFIG_NLS_CODEPAGE_869 is not set
# CONFIG_NLS_CODEPAGE_936 is not set
# CONFIG_NLS_CODEPAGE_950 is not set
# CONFIG_NLS_CODEPAGE_932 is not set
# CONFIG_NLS_CODEPAGE_949 is not set
# CONFIG_NLS_CODEPAGE_874 is not set
# CONFIG_NLS_ISO8859_8 is not set
# CONFIG_NLS_CODEPAGE_1250 is not set
# CONFIG_NLS_CODEPAGE_1251 is not set
# CONFIG_NLS_ISO8859_1 is not set
# CONFIG_NLS_ISO8859_2 is not set
# CONFIG_NLS_ISO8859_3 is not set
# CONFIG_NLS_ISO8859_4 is not set
# CONFIG_NLS_ISO8859_5 is not set
# CONFIG_NLS_ISO8859_6 is not set
# CONFIG_NLS_ISO8859_7 is not set
# CONFIG_NLS_ISO8859_9 is not set
# CONFIG_NLS_ISO8859_13 is not set
# CONFIG_NLS_ISO8859_14 is not set
# CONFIG_NLS_ISO8859_15 is not set
# CONFIG_NLS_KOI8_R is not set
# CONFIG_NLS_KOI8_U is not set
# CONFIG_NLS_UTF8 is not set

#
# Console drivers
#
CONFIG_VGA_CONSOLE=y
# CONFIG_VIDEO_SELECT is not set
# CONFIG_MDA_CONSOLE is not set

#
# Frame-buffer support
#
# CONFIG_FB is not set

#
# Sound
#
CONFIG_SOUND=y
# CONFIG_SOUND_BT878 is not set
CONFIG_SOUND_CMPCI=m
CONFIG_SOUND_CMPCI_FM=y
CONFIG_SOUND_CMPCI_FMIO=388
CONFIG_SOUND_CMPCI_FMIO=388
CONFIG_SOUND_CMPCI_MIDI=y
CONFIG_SOUND_CMPCI_MPUIO=330
CONFIG_SOUND_CMPCI_JOYSTICK=y
CONFIG_SOUND_CMPCI_CM8738=y
# CONFIG_SOUND_CMPCI_SPDIFINVERSE is not set
# CONFIG_SOUND_CMPCI_SPDIFLOOP is not set
CONFIG_SOUND_CMPCI_SPEAKERS=2
# CONFIG_SOUND_EMU10K1 is not set
# CONFIG_SOUND_FUSION is not set
# CONFIG_SOUND_CS4281 is not set
# CONFIG_SOUND_ES1370 is not set
CONFIG_SOUND_ES1371=y
# CONFIG_SOUND_ESSSOLO1 is not set
# CONFIG_SOUND_MAESTRO is not set
# CONFIG_SOUND_MAESTRO3 is not set
# CONFIG_SOUND_ICH is not set
# CONFIG_SOUND_RME96XX is not set
# CONFIG_SOUND_SONICVIBES is not set
# CONFIG_SOUND_TRIDENT is not set
# CONFIG_SOUND_MSNDCLAS is not set
# CONFIG_SOUND_MSNDPIN is not set
# CONFIG_SOUND_VIA82CXXX is not set
# CONFIG_SOUND_OSS is not set
# CONFIG_SOUND_TVMIXER is not set

#
# USB support
#
CONFIG_USB=y
# CONFIG_USB_DEBUG is not set

#
# Miscellaneous USB options
#
# CONFIG_USB_DEVICEFS is not set
# CONFIG_USB_BANDWIDTH is not set
# CONFIG_USB_LONG_TIMEOUT is not set

#
# USB Host Controller Drivers
#
# CONFIG_USB_EHCI_HCD is not set
CONFIG_USB_UHCI=y
# CONFIG_USB_UHCI_ALT is not set
# CONFIG_USB_OHCI is not set

#
# USB Device Class drivers
#
# CONFIG_USB_AUDIO is not set
# CONFIG_USB_BLUETOOTH is not set
# CONFIG_USB_STORAGE is not set
# CONFIG_USB_ACM is not set
# CONFIG_USB_PRINTER is not set

#
# USB Human Interface Devices (HID)
#
CONFIG_USB_HID=y
CONFIG_USB_HIDDEV=y
# CONFIG_USB_WACOM is not set

#
# USB Imaging devices
#
# CONFIG_USB_DC2XX is not set
# CONFIG_USB_MDC800 is not set
# CONFIG_USB_SCANNER is not set
# CONFIG_USB_MICROTEK is not set
# CONFIG_USB_HPUSBSCSI is not set

#
# USB Multimedia devices
#

#
#   Video4Linux support is needed for USB Multimedia device support
#

#
# USB Network adaptors
#
# CONFIG_USB_PEGASUS is not set
# CONFIG_USB_KAWETH is not set
# CONFIG_USB_CATC is not set
# CONFIG_USB_CDCETHER is not set
# CONFIG_USB_USBNET is not set

#
# USB port drivers
#
# CONFIG_USB_USS720 is not set

#
# USB Serial Converter support
#
# CONFIG_USB_SERIAL is not set

#
# USB Miscellaneous drivers
#
# CONFIG_USB_RIO500 is not set
# CONFIG_USB_AUERSWALD is not set

#
# Bluetooth support
#
# CONFIG_BLUEZ is not set

#
# Kernel hacking
#
# CONFIG_SOFTWARE_SUSPEND is not set
CONFIG_DEBUG_KERNEL=y
# CONFIG_DEBUG_HIGHMEM is not set
# CONFIG_DEBUG_SLAB is not set
# CONFIG_DEBUG_IOVIRT is not set
# CONFIG_MAGIC_SYSRQ is not set
# CONFIG_DEBUG_SPINLOCK is not set
# CONFIG_EARLY_CONSOLE_3F8 is not set
# CONFIG_EARLY_CONSOLE_3E8 is not set
CONFIG_EARLY_CONSOLE_VGA=y
# CONFIG_EARLY_CONSOLE_BOCHS_E9_HACK is not set

#
# Library routines
#
CONFIG_ZLIB_INFLATE=y
CONFIG_ZLIB_DEFLATE=m
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	stda		%f16, [%o0] ASI_BLK_P		! MS
	EX3(ldda [%o1 + 0x018] %asi, %f6)		! AX
	faligndata	%f0, %f2, %f16			! FGA	Group12 (7-cycle stall)

	EX3(ldda [%o1 + 0x020] %asi, %f8)		! MS
	faligndata	%f2, %f4, %f18			! FGA	Group13
	EX3(ldda [%o1 + 0x028] %asi, %f10)		! MS
	faligndata	%f4, %f6, %f20			! FGA	Group14
	EX3(ldda [%o1 + 0x030] %asi, %f12)		! MS
	faligndata	%f6, %f8, %f22			! FGA	Group15
	EX3(ldda [%o1 + 0x038] %asi, %f14)		! MS
	faligndata	%f8, %f10, %f24			! FGA	Group16

	EX3(ldda [%o1 + 0x040] %asi, %f0)		! AX
	faligndata	%f10, %f12, %f26		! FGA	Group17
	subcc		%o3, 0x01, %o3			! A0
	add		%o1, 0x40, %o1			! A1
	bg,pt		%xcc, U3copy_from_user_loop2	! BR
	 add		%o0, 0x40, %o0			! A0	Group18

	/* Finally we copy the last full 64-byte block. */
U3copy_from_user_loopfini:
	EX3(ldda [%o1 + 0x008] %asi, %f2)		! MS
	faligndata	%f12, %f14, %f28		! FGA
	EX3(ldda [%o1 + 0x010] %asi, %f4)		! MS	Group19
	faligndata	%f14, %f0, %f30			! FGA
	stda		%f16, [%o0] ASI_BLK_P		! MS	Group20
	EX3(ldda [%o1 + 0x018] %asi, %f6)		! AX
	faligndata	%f0, %f2, %f16			! FGA	Group11 (7-cycle stall)
	EX3(ldda [%o1 + 0x020] %asi, %f8)		! MS
	faligndata	%f2, %f4, %f18			! FGA	Group12
	EX3(ldda [%o1 + 0x028] %asi, %f10)		! MS
	faligndata	%f4, %f6, %f20			! FGA	Group13
	EX3(ldda [%o1 + 0x030] %asi, %f12)		! MS
	faligndata	%f6, %f8, %f22			! FGA	Group14
	EX3(ldda [%o1 + 0x038] %asi, %f14)		! MS
	faligndata	%f8, %f10, %f24			! FGA	Group15
	cmp		%g1, 0				! A0
	be,pt		%icc, 1f			! BR
	 add		%o0, 0x40, %o0			! A1
	EX4(ldda [%o1 + 0x040] %asi, %f0)		! MS
1:	faligndata	%f10, %f12, %f26		! FGA	Group16
	faligndata	%f12, %f14, %f28		! FGA	Group17
	faligndata	%f14, %f0, %f30			! FGA	Group18
	stda		%f16, [%o0] ASI_BLK_P		! MS
	add		%o0, 0x40, %o0			! A0
	add		%o1, 0x40, %o1			! A1
	membar		#Sync				! MS	Group26 (7-cycle stall)

	/* Now we copy the (len modulo 64) bytes at the end.
	 * Note how we borrow the %f0 loaded above.
	 *
	 * Also notice how this code is careful not to perform a
	 * load past the end of the src buffer just like similar
	 * code found in U3copy_from_user_toosmall processing.
	 */
U3copy_from_user_loopend:
	and		%o2, 0x3f, %o2			! A0	Group
	andcc		%o2, 0x38, %g2			! A0	Group
	be,pn		%icc, U3copy_from_user_endcruft	! BR
	 subcc		%g2, 0x8, %g2			! A1
	be,pn		%icc, U3copy_from_user_endcruft	! BR	Group
	 cmp		%g1, 0				! A0

	be,a,pt		%icc, 1f			! BR	Group
	 EX(ldda [%o1 + 0x00] %asi, %f0, add %o2, %g0)	! MS

1:	EX(ldda [%o1 + 0x08] %asi, %f2, add %o2, %g0)	! MS	Group
	add		%o1, 0x8, %o1			! A0
	sub		%o2, 0x8, %o2			! A1
	subcc		%g2, 0x8, %g2			! A0	Group
	faligndata	%f0, %f2, %f8			! FGA	Group
	std		%f8, [%o0 + 0x00]		! MS	(XXX does it stall here? XXX)
	be,pn		%icc, U3copy_from_user_endcruft	! BR
	 add		%o0, 0x8, %o0			! A0
	EX(ldda [%o1 + 0x08] %asi, %f0, add %o2, %g0)	! MS	Group
	add		%o1, 0x8, %o1			! A0
	sub		%o2, 0x8, %o2			! A1
	subcc		%g2, 0x8, %g2			! A0	Group
	faligndata	%f2, %f0, %f8			! FGA
	std		%f8, [%o0 + 0x00]		! MS	(XXX does it stall here? XXX)
	bne,pn		%icc, 1b			! BR
	 add		%o0, 0x8, %o0			! A0	Group

	/* If anything is left, we copy it one byte at a time.
	 * Note that %g1 is (src & 0x3) saved above before the
	 * alignaddr was performed.
	 */
U3copy_from_user_endcruft:
	cmp		%o2, 0
	add		%o1, %g1, %o1
	VISExitHalf
	be,pn		%icc, U3copy_from_user_short_ret
	 nop
	ba,a,pt		%xcc, U3copy_from_user_short

	/* If we get here, then 32 <= len < (6 * 64) */
U3copy_from_user_toosmall:

#ifdef SMALL_COPY_USES_FPU

	/* Is 'dst' already aligned on an 8-byte boundary? */
	be,pt		%xcc, 2f			! BR	Group

	/* Compute abs((dst & 7) - 8) into %g2.  This is the number
	 * of bytes to copy to make 'dst' 8-byte aligned.  We pre-
	 * subtract this from 'len'.
	 */
	 sub		%g2, 0x8, %g2			! A0
ifeq (-D__KERNEL__ -I/home/me/kernel/linux/include -Wall -Wstrict-prototypes -Wno-trigraphs -O2 -fomit-frame-pointer -fno-strict-aliasing -fno-common -pipe -mpreferred-stack-boundary=2 -march=i686,$(strip $(subst $(comma),:,$(CFLAGS) $(EXTRA_CFLAGS) $(CFLAGS_item_ops.o))))
FILES_FLAGS_UP_TO_DATE += item_ops.o
endif
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