diff -Nru a/Documentation/io_ordering.txt b/Documentation/io_ordering.txt --- /dev/null Wed Dec 31 16:00:00 1969 +++ b/Documentation/io_ordering.txt Wed Apr 16 18:32:26 2003 @@ -0,0 +1,47 @@ +On some platforms, so-called memory-mapped I/O is weakly ordered. On such +platforms, driver writers are responsible for ensuring that I/O writes to +memory-mapped addresses on their device arrive in the order intended. This is +typically done by reading a 'safe' device or bridge register, causing the I/O +chipset to flush pending writes to the device before any reads are posted. A +driver would usually use this technique immediately prior to the exit of a +critical section of code protected by spinlocks. This would ensure that +subsequent writes to I/O space arrived only after all prior writes (much like a +memory barrier op, mb(), only with respect to I/O). + +A more concrete example from a hypothetical device driver: + + ... +CPU A: spin_lock_irqsave(&dev_lock, flags) +CPU A: val = readl(my_status); +CPU A: ... +CPU A: writel(newval, ring_ptr); +CPU A: spin_unlock_irqrestore(&dev_lock, flags) + ... +CPU B: spin_lock_irqsave(&dev_lock, flags) +CPU B: val = readl(my_status); +CPU B: ... +CPU B: writel(newval2, ring_ptr); +CPU B: spin_unlock_irqrestore(&dev_lock, flags) + ... + +In the case above, the device may receive newval2 before it receives newval, +which could cause problems. Fixing it is easy enough though: + + ... +CPU A: spin_lock_irqsave(&dev_lock, flags) +CPU A: val = readl(my_status); +CPU A: ... +CPU A: writel(newval, ring_ptr); +CPU A: (void)readl(safe_register); /* maybe a config register? */ +CPU A: spin_unlock_irqrestore(&dev_lock, flags) + ... +CPU B: spin_lock_irqsave(&dev_lock, flags) +CPU B: val = readl(my_status); +CPU B: ... +CPU B: writel(newval2, ring_ptr); +CPU B: (void)readl(safe_register); /* maybe a config register? */ +CPU B: spin_unlock_irqrestore(&dev_lock, flags) + +Here, the reads from safe_register will cause the I/O chipset to flush any +pending writes before actually posting the read to the chipset, preventing +possible data corruption. diff -Nru a/Makefile b/Makefile --- a/Makefile Wed Apr 16 18:32:26 2003 +++ b/Makefile Wed Apr 16 18:32:26 2003 @@ -180,7 +180,7 @@ NOSTDINC_FLAGS = -nostdinc -iwithprefix include CPPFLAGS := -D__KERNEL__ -Iinclude -CFLAGS := $(CPPFLAGS) -Wall -Wstrict-prototypes -Wno-trigraphs -O2 \ +CFLAGS := $(CPPFLAGS) -Wall -Wstrict-prototypes -Wno-trigraphs -g -O2 \ -fno-strict-aliasing -fno-common AFLAGS := -D__ASSEMBLY__ $(CPPFLAGS) diff -Nru a/arch/alpha/kernel/module.c b/arch/alpha/kernel/module.c --- a/arch/alpha/kernel/module.c Wed Apr 16 18:32:25 2003 +++ b/arch/alpha/kernel/module.c Wed Apr 16 18:32:25 2003 @@ -300,3 +300,8 @@ { return 0; } + +void +module_arch_cleanup(struct module *mod) +{ +} diff -Nru a/arch/arm/kernel/module.c b/arch/arm/kernel/module.c --- a/arch/arm/kernel/module.c Wed Apr 16 18:32:25 2003 +++ b/arch/arm/kernel/module.c Wed Apr 16 18:32:25 2003 @@ -159,3 +159,8 @@ { return 0; } + +void +module_arch_cleanup(struct module *mod) +{ +} diff -Nru a/arch/i386/kernel/module.c b/arch/i386/kernel/module.c --- a/arch/i386/kernel/module.c Wed Apr 16 18:32:26 2003 +++ b/arch/i386/kernel/module.c Wed Apr 16 18:32:26 2003 @@ -110,3 +110,7 @@ { return 0; } + +void module_arch_cleanup(struct module *mod) +{ +} diff -Nru a/arch/ia64/Kconfig b/arch/ia64/Kconfig --- a/arch/ia64/Kconfig Wed Apr 16 18:32:26 2003 +++ b/arch/ia64/Kconfig Wed Apr 16 18:32:26 2003 @@ -401,6 +401,15 @@ endchoice +config IA64_PAL_IDLE + bool "Use PAL_HALT_LIGHT in idle loop" + ---help--- + Say Y here to enable use of PAL_HALT_LIGHT in the cpu_idle loop. + This allows the CPU to enter a low power state when idle. You + can enable CONFIG_IA64_PALINFO and check /proc/pal/cpu0/power_info + to see the power consumption and latency for this state. If you're + unsure your firmware supports it, answer N. + config SMP bool "SMP support" ---help--- diff -Nru a/arch/ia64/Makefile b/arch/ia64/Makefile --- a/arch/ia64/Makefile Wed Apr 16 18:32:25 2003 +++ b/arch/ia64/Makefile Wed Apr 16 18:32:25 2003 @@ -14,6 +14,7 @@ OBJCOPYFLAGS := --strip-all LDFLAGS_vmlinux := -static +LDFLAGS_MODULE += -T arch/ia64/module.lds AFLAGS_KERNEL := -mconstant-gp EXTRA := @@ -23,7 +24,7 @@ GCC_VERSION=$(shell $(CC) -v 2>&1 | fgrep 'gcc version' | cut -f3 -d' ' | cut -f1 -d'.') -GAS_STATUS=$(shell arch/ia64/scripts/check-gas $(CC)) +GAS_STATUS=$(shell arch/ia64/scripts/check-gas $(CC) $(OBJDUMP)) ifeq ($(GAS_STATUS),buggy) $(error Sorry, you need a newer version of the assember, one that is built from \ @@ -47,17 +48,14 @@ core-y += arch/ia64/kernel/ arch/ia64/mm/ core-$(CONFIG_IA32_SUPPORT) += arch/ia64/ia32/ core-$(CONFIG_IA64_DIG) += arch/ia64/dig/ -core-$(CONFIG_IA64_GENERIC) += arch/ia64/dig/ arch/ia64/hp/common/ arch/ia64/hp/zx1/ \ - arch/ia64/hp/sim/ +core-$(CONFIG_IA64_GENERIC) += arch/ia64/dig/ core-$(CONFIG_IA64_HP_ZX1) += arch/ia64/dig/ -core-$(CONFIG_IA64_SGI_SN) += arch/ia64/sn/kernel/ \ - arch/ia64/sn/io/ \ - arch/ia64/sn/io/sn2/ \ - arch/ia64/sn/io/sn2/pcibr/ \ - arch/ia64/sn/kernel/sn2/ +core-$(CONFIG_IA64_SGI_SN) += arch/ia64/sn/ + drivers-$(CONFIG_PCI) += arch/ia64/pci/ drivers-$(CONFIG_IA64_HP_SIM) += arch/ia64/hp/sim/ drivers-$(CONFIG_IA64_HP_ZX1) += arch/ia64/hp/common/ arch/ia64/hp/zx1/ +drivers-$(CONFIG_IA64_GENERIC) += arch/ia64/hp/common/ arch/ia64/hp/zx1/ arch/ia64/hp/sim/ boot := arch/ia64/boot tools := arch/ia64/tools diff -Nru a/arch/ia64/boot/Makefile b/arch/ia64/boot/Makefile --- a/arch/ia64/boot/Makefile Wed Apr 16 18:32:26 2003 +++ b/arch/ia64/boot/Makefile Wed Apr 16 18:32:26 2003 @@ -9,7 +9,6 @@ # targets-$(CONFIG_IA64_HP_SIM) += bootloader -targets-$(CONFIG_IA64_GENERIC) += bootloader targets := vmlinux.bin vmlinux.gz $(targets-y) quiet_cmd_cptotop = LN $@ diff -Nru a/arch/ia64/hp/common/sba_iommu.c b/arch/ia64/hp/common/sba_iommu.c --- a/arch/ia64/hp/common/sba_iommu.c Wed Apr 16 18:32:25 2003 +++ b/arch/ia64/hp/common/sba_iommu.c Wed Apr 16 18:32:25 2003 @@ -1,9 +1,9 @@ /* ** IA64 System Bus Adapter (SBA) I/O MMU manager ** -** (c) Copyright 2002 Alex Williamson -** (c) Copyright 2002 Grant Grundler -** (c) Copyright 2002 Hewlett-Packard Company +** (c) Copyright 2002-2003 Alex Williamson +** (c) Copyright 2002-2003 Grant Grundler +** (c) Copyright 2002-2003 Hewlett-Packard Company ** ** Portions (c) 2000 Grant Grundler (from parisc I/O MMU code) ** Portions (c) 1999 Dave S. Miller (from sparc64 I/O MMU code) @@ -30,17 +30,38 @@ #include #include #include +#include #include #include /* ia64_get_itc() */ #include #include /* PAGE_OFFSET */ +#include +#include /* wmb() */ +#include -#define DRIVER_NAME "SBA" +#define PFX "IOC: " +/* +** This option allows cards capable of 64bit DMA to bypass the IOMMU. If +** not defined, all DMA will be 32bit and go through the TLB. +*/ #define ALLOW_IOV_BYPASS + +/* +** If a device prefetches beyond the end of a valid pdir entry, it will cause +** a hard failure, ie. MCA. Version 3.0 and later of the zx1 LBA should +** disconnect on 4k boundaries and prevent such issues. If the device is +** particularly agressive, this option will keep the entire pdir valid such +** that prefetching will hit a valid address. This could severely impact +** error containment, and is therefore off by default. The page that is +** used for spill-over is poisoned, so that should help debugging somewhat. +*/ +#undef FULL_VALID_PDIR + #define ENABLE_MARK_CLEAN + /* ** The number of debug flags is a clue - this code is fragile. */ @@ -52,6 +73,10 @@ #undef DEBUG_LARGE_SG_ENTRIES #undef DEBUG_BYPASS +#if defined(FULL_VALID_PDIR) && defined(ASSERT_PDIR_SANITY) +#error FULL_VALID_PDIR and ASSERT_PDIR_SANITY are mutually exclusive +#endif + #define SBA_INLINE __inline__ /* #define SBA_INLINE */ @@ -96,10 +121,6 @@ #define ASSERT(expr) #endif -#define KB(x) ((x) * 1024) -#define MB(x) (KB (KB (x))) -#define GB(x) (MB (KB (x))) - /* ** The number of pdir entries to "free" before issueing ** a read to PCOM register to flush out PCOM writes. @@ -109,30 +130,23 @@ */ #define DELAYED_RESOURCE_CNT 16 -#define DEFAULT_DMA_HINT_REG(d) 0 - -#define ZX1_FUNC_ID_VALUE ((PCI_DEVICE_ID_HP_ZX1_SBA << 16) | PCI_VENDOR_ID_HP) -#define ZX1_MC_ID ((PCI_DEVICE_ID_HP_ZX1_MC << 16) | PCI_VENDOR_ID_HP) +#define DEFAULT_DMA_HINT_REG 0 -#define SBA_FUNC_ID 0x0000 /* function id */ -#define SBA_FCLASS 0x0008 /* function class, bist, header, rev... */ +#define ZX1_IOC_ID ((PCI_DEVICE_ID_HP_ZX1_IOC << 16) | PCI_VENDOR_ID_HP) +#define REO_IOC_ID ((PCI_DEVICE_ID_HP_REO_IOC << 16) | PCI_VENDOR_ID_HP) -#define SBA_FUNC_SIZE 0x10000 /* SBA configuration function reg set */ - -unsigned int __initdata zx1_func_offsets[] = {0x1000, 0x4000, 0x8000, - 0x9000, 0xa000, -1}; - -#define SBA_IOC_OFFSET 0x1000 - -#define MAX_IOC 1 /* we only have 1 for now*/ +#define ZX1_IOC_OFFSET 0x1000 /* ACPI reports SBA, we want IOC */ +#define IOC_FUNC_ID 0x000 +#define IOC_FCLASS 0x008 /* function class, bist, header, rev... */ #define IOC_IBASE 0x300 /* IO TLB */ #define IOC_IMASK 0x308 #define IOC_PCOM 0x310 #define IOC_TCNFG 0x318 #define IOC_PDIR_BASE 0x320 -#define IOC_IOVA_SPACE_BASE 0x40000000 /* IOVA ranges start at 1GB */ +/* AGP GART driver looks for this */ +#define ZX1_SBA_IOMMU_COOKIE 0x0000badbadc0ffeeUL /* ** IOC supports 4/8/16/64KB page sizes (see TCNFG register) @@ -152,7 +166,7 @@ #define IOVP_MASK PAGE_MASK struct ioc { - unsigned long ioc_hpa; /* I/O MMU base address */ + void *ioc_hpa; /* I/O MMU base address */ char *res_map; /* resource map, bit == pdir entry */ u64 *pdir_base; /* physical base address */ unsigned long ibase; /* pdir IOV Space base */ @@ -193,37 +207,32 @@ #endif #endif - /* STUFF We don't need in performance path */ + /* Stuff we don't need in performance path */ + struct ioc *next; /* list of IOC's in system */ + acpi_handle handle; /* for multiple IOC's */ + const char *name; + unsigned int func_id; + unsigned int rev; /* HW revision of chip */ + u32 iov_size; unsigned int pdir_size; /* in bytes, determined by IOV Space size */ + struct pci_dev *sac_only_dev; }; -struct sba_device { - struct sba_device *next; /* list of SBA's in system */ - const char *name; - unsigned long sba_hpa; /* base address */ - spinlock_t sba_lock; - unsigned int flags; /* state/functionality enabled */ - unsigned int hw_rev; /* HW revision of chip */ - - unsigned int num_ioc; /* number of on-board IOC's */ - struct ioc ioc[MAX_IOC]; -}; +static struct ioc *ioc_list; +static int reserve_sba_gart = 1; +#if LINUX_VERSION_CODE >= KERNEL_VERSION(2,5,0) +#define sba_sg_address(sg) (page_address((sg)->page) + (sg)->offset) +#else +#define sba_sg_address(sg) ((sg)->address ? (sg)->address : \ + page_address((sg)->page) + (sg)->offset) +#endif -static struct sba_device *sba_list; -static int sba_count; -static int reserve_sba_gart = 1; -static struct pci_dev sac_only_dev; +#ifdef FULL_VALID_PDIR +static u64 prefetch_spill_page; +#endif -#define sba_sg_address(sg) (page_address((sg)->page) + (sg)->offset) -#define sba_sg_len(sg) (sg->length) -#define sba_sg_iova(sg) (sg->dma_address) -#define sba_sg_iova_len(sg) (sg->dma_length) - -/* REVISIT - fix me for multiple SBAs/IOCs */ -#define GET_IOC(dev) (sba_list->ioc) -#define SBA_SET_AGP(sba_dev) (sba_dev->flags |= 0x1) -#define SBA_GET_AGP(sba_dev) (sba_dev->flags & 0x1) +#define GET_IOC(dev) ((struct ioc *) PCI_CONTROLLER(dev)->iommu) /* ** DMA_CHUNK_SIZE is used by the SCSI mid-layer to break up @@ -232,10 +241,7 @@ ** rather than the HW. I/O MMU allocation alogorithms can be ** faster with smaller size is (to some degree). */ -#define DMA_CHUNK_SIZE (BITS_PER_LONG*IOVP_SIZE) - -/* Looks nice and keeps the compiler happy */ -#define SBA_DEV(d) ((struct sba_device *) (d)) +#define DMA_CHUNK_SIZE (BITS_PER_LONG*PAGE_SIZE) #define ROUNDUP(x,y) ((x + ((y)-1)) & ~((y)-1)) @@ -255,7 +261,7 @@ * sba_dump_tlb - debugging only - print IOMMU operating parameters * @hpa: base address of the IOMMU * - * Print the size/location of the IO MMU Pdir. + * Print the size/location of the IO MMU PDIR. */ static void sba_dump_tlb(char *hpa) @@ -273,19 +279,19 @@ #ifdef ASSERT_PDIR_SANITY /** - * sba_dump_pdir_entry - debugging only - print one IOMMU Pdir entry + * sba_dump_pdir_entry - debugging only - print one IOMMU PDIR entry * @ioc: IO MMU structure which owns the pdir we are interested in. * @msg: text to print ont the output line. * @pide: pdir index. * - * Print one entry of the IO MMU Pdir in human readable form. + * Print one entry of the IO MMU PDIR in human readable form. */ static void sba_dump_pdir_entry(struct ioc *ioc, char *msg, uint pide) { /* start printing from lowest pde in rval */ - u64 *ptr = &(ioc->pdir_base[pide & ~(BITS_PER_LONG - 1)]); - unsigned long *rptr = (unsigned long *) &(ioc->res_map[(pide >>3) & ~(sizeof(unsigned long) - 1)]); + u64 *ptr = &ioc->pdir_base[pide & ~(BITS_PER_LONG - 1)]; + unsigned long *rptr = (unsigned long *) &ioc->res_map[(pide >>3) & -sizeof(unsigned long)]; uint rcnt; printk(KERN_DEBUG "SBA: %s rp %p bit %d rval 0x%lx\n", @@ -296,7 +302,7 @@ printk(KERN_DEBUG "%s %2d %p %016Lx\n", (rcnt == (pide & (BITS_PER_LONG - 1))) ? " -->" : " ", - rcnt, ptr, *ptr ); + rcnt, ptr, (unsigned long long) *ptr ); rcnt++; ptr++; } @@ -359,17 +365,18 @@ * print the SG list so we can verify it's correct by hand. */ static void -sba_dump_sg(struct ioc *ioc, struct scatterlist *startsg, int nents) +sba_dump_sg( struct ioc *ioc, struct scatterlist *startsg, int nents) { while (nents-- > 0) { printk(KERN_DEBUG " %d : DMA %08lx/%05x CPU %p\n", nents, - (unsigned long) sba_sg_iova(startsg), sba_sg_iova_len(startsg), + startsg->dma_address, startsg->dma_length, sba_sg_address(startsg)); startsg++; } } + static void -sba_check_sg(struct ioc *ioc, struct scatterlist *startsg, int nents) +sba_check_sg( struct ioc *ioc, struct scatterlist *startsg, int nents) { struct scatterlist *the_sg = startsg; int the_nents = nents; @@ -398,9 +405,11 @@ #define PAGES_PER_RANGE 1 /* could increase this to 4 or 8 if needed */ /* Convert from IOVP to IOVA and vice versa. */ -#define SBA_IOVA(ioc,iovp,offset,hint_reg) ((ioc->ibase) | (iovp) | (offset) | ((hint_reg)<<(ioc->hint_shift_pdir))) +#define SBA_IOVA(ioc,iovp,offset,hint_reg) ((ioc->ibase) | (iovp) | (offset) | \ + ((hint_reg)<<(ioc->hint_shift_pdir))) #define SBA_IOVP(ioc,iova) (((iova) & ioc->hint_mask_pdir) & ~(ioc->ibase)) +/* FIXME : review these macros to verify correctness and usage */ #define PDIR_INDEX(iovp) ((iovp)>>IOVP_SHIFT) #define RESMAP_MASK(n) ~(~0UL << (n)) @@ -408,7 +417,7 @@ /** - * sba_search_bitmap - find free space in IO Pdir resource bitmap + * sba_search_bitmap - find free space in IO PDIR resource bitmap * @ioc: IO MMU structure which owns the pdir we are interested in. * @bits_wanted: number of entries we need. * @@ -445,7 +454,7 @@ ** We need the alignment to invalidate I/O TLB using ** SBA HW features in the unmap path. */ - unsigned long o = 1UL << get_order(bits_wanted << IOVP_SHIFT); + unsigned long o = 1 << get_order(bits_wanted << PAGE_SHIFT); uint bitshiftcnt = ROUNDUP(ioc->res_bitshift, o); unsigned long mask; @@ -491,7 +500,7 @@ /** - * sba_alloc_range - find free bits and mark them in IO Pdir resource bitmap + * sba_alloc_range - find free bits and mark them in IO PDIR resource bitmap * @ioc: IO MMU structure which owns the pdir we are interested in. * @size: number of bytes to create a mapping for * @@ -520,7 +529,8 @@ if (pide >= (ioc->res_size << 3)) { pide = sba_search_bitmap(ioc, pages_needed); if (pide >= (ioc->res_size << 3)) - panic(__FILE__ ": I/O MMU @ %lx is out of mapping resources\n", ioc->ioc_hpa); + panic(__FILE__ ": I/O MMU @ %p is out of mapping resources\n", + ioc->ioc_hpa); } #ifdef ASSERT_PDIR_SANITY @@ -553,7 +563,7 @@ /** - * sba_free_range - unmark bits in IO Pdir resource bitmap + * sba_free_range - unmark bits in IO PDIR resource bitmap * @ioc: IO MMU structure which owns the pdir we are interested in. * @iova: IO virtual address which was previously allocated. * @size: number of bytes to create a mapping for @@ -600,14 +610,14 @@ /** - * sba_io_pdir_entry - fill in one IO Pdir entry - * @pdir_ptr: pointer to IO Pdir entry - * @phys_page: phys CPU address of page to map + * sba_io_pdir_entry - fill in one IO PDIR entry + * @pdir_ptr: pointer to IO PDIR entry + * @vba: Virtual CPU address of buffer to map * * SBA Mapping Routine * - * Given a physical address (phys_page, arg1) sba_io_pdir_entry() - * loads the I/O Pdir entry pointed to by pdir_ptr (arg0). + * Given a virtual address (vba, arg1) sba_io_pdir_entry() + * loads the I/O PDIR entry pointed to by pdir_ptr (arg0). * Each IO Pdir entry consists of 8 bytes as shown below * (LSB == bit 0): * @@ -619,12 +629,21 @@ * V == Valid Bit * U == Unused * PPN == Physical Page Number + * + * The physical address fields are filled with the results of virt_to_phys() + * on the vba. */ -#define SBA_VALID_MASK 0x80000000000000FFULL -#define sba_io_pdir_entry(pdir_ptr, phys_page) *pdir_ptr = (phys_page | SBA_VALID_MASK) -#define sba_io_page(pdir_ptr) (*pdir_ptr & ~SBA_VALID_MASK) - +#if 1 +#define sba_io_pdir_entry(pdir_ptr, vba) *pdir_ptr = ((vba & ~0xE000000000000FFFULL) \ + | 0x8000000000000000ULL) +#else +void SBA_INLINE +sba_io_pdir_entry(u64 *pdir_ptr, unsigned long vba) +{ + *pdir_ptr = ((vba & ~0xE000000000000FFFULL) | 0x80000000000000FFULL); +} +#endif #ifdef ENABLE_MARK_CLEAN /** @@ -640,7 +659,7 @@ pg_addr = PAGE_ALIGN((unsigned long) addr); end = (unsigned long) addr + size; while (pg_addr + PAGE_SIZE <= end) { - struct page *page = virt_to_page(pg_addr); + struct page *page = virt_to_page((void *)pg_addr); set_bit(PG_arch_1, &page->flags); pg_addr += PAGE_SIZE; } @@ -648,12 +667,12 @@ #endif /** - * sba_mark_invalid - invalidate one or more IO Pdir entries + * sba_mark_invalid - invalidate one or more IO PDIR entries * @ioc: IO MMU structure which owns the pdir we are interested in. * @iova: IO Virtual Address mapped earlier * @byte_cnt: number of bytes this mapping covers. * - * Marking the IO Pdir entry(ies) as Invalid and invalidate + * Marking the IO PDIR entry(ies) as Invalid and invalidate * corresponding IO TLB entry. The PCOM (Purge Command Register) * is to purge stale entries in the IO TLB when unmapping entries. * @@ -687,15 +706,24 @@ iovp |= IOVP_SHIFT; /* set "size" field for PCOM */ +#ifndef FULL_VALID_PDIR /* - ** clear I/O Pdir entry "valid" bit + ** clear I/O PDIR entry "valid" bit ** Do NOT clear the rest - save it for debugging. ** We should only clear bits that have previously ** been enabled. */ - ioc->pdir_base[off] &= ~SBA_VALID_MASK; + ioc->pdir_base[off] &= ~(0x80000000000000FFULL); +#else + /* + ** If we want to maintain the PDIR as valid, put in + ** the spill page so devices prefetching won't + ** cause a hard fail. + */ + ioc->pdir_base[off] = (0x80000000000000FFULL | prefetch_spill_page); +#endif } else { - u32 t = get_order(byte_cnt) + IOVP_SHIFT; + u32 t = get_order(byte_cnt) + PAGE_SHIFT; iovp |= t; ASSERT(t <= 31); /* 2GB! Max value of "size" field */ @@ -703,14 +731,18 @@ do { /* verify this pdir entry is enabled */ ASSERT(ioc->pdir_base[off] >> 63); +#ifndef FULL_VALID_PDIR /* clear I/O Pdir entry "valid" bit first */ - ioc->pdir_base[off] &= ~SBA_VALID_MASK; + ioc->pdir_base[off] &= ~(0x80000000000000FFULL); +#else + ioc->pdir_base[off] = (0x80000000000000FFULL | prefetch_spill_page); +#endif off++; byte_cnt -= IOVP_SIZE; } while (byte_cnt > 0); } - WRITE_REG(iovp, ioc->ioc_hpa+IOC_PCOM); + WRITE_REG(iovp | ioc->ibase, ioc->ioc_hpa+IOC_PCOM); } /** @@ -726,18 +758,15 @@ sba_map_single(struct pci_dev *dev, void *addr, size_t size, int direction) { struct ioc *ioc; - unsigned long flags; + unsigned long flags; dma_addr_t iovp; dma_addr_t offset; u64 *pdir_start; int pide; #ifdef ALLOW_IOV_BYPASS - unsigned long phys_addr = virt_to_phys(addr); + unsigned long pci_addr = virt_to_phys(addr); #endif - if (!sba_list) - panic("sba_map_single: no SBA found!\n"); - ioc = GET_IOC(dev); ASSERT(ioc); @@ -745,7 +774,7 @@ /* ** Check if the PCI device can DMA to ptr... if so, just return ptr */ - if ((phys_addr & ~dev->dma_mask) == 0) { + if ((pci_addr & ~dev->dma_mask) == 0) { /* ** Device is bit capable of DMA'ing to the buffer... ** just return the PCI address of ptr @@ -756,8 +785,8 @@ spin_unlock_irqrestore(&ioc->res_lock, flags); #endif DBG_BYPASS("sba_map_single() bypass mask/addr: 0x%lx/0x%lx\n", - dev->dma_mask, phys_addr); - return phys_addr; + dev->dma_mask, pci_addr); + return pci_addr; } #endif @@ -790,8 +819,7 @@ while (size > 0) { ASSERT(((u8 *)pdir_start)[7] == 0); /* verify availability */ - - sba_io_pdir_entry(pdir_start, virt_to_phys(addr)); + sba_io_pdir_entry(pdir_start, (unsigned long) addr); DBG_RUN(" pdir 0x%p %lx\n", pdir_start, *pdir_start); @@ -799,12 +827,15 @@ size -= IOVP_SIZE; pdir_start++; } + /* force pdir update */ + wmb(); + /* form complete address */ #ifdef ASSERT_PDIR_SANITY sba_check_pdir(ioc,"Check after sba_map_single()"); #endif spin_unlock_irqrestore(&ioc->res_lock, flags); - return SBA_IOVA(ioc, iovp, offset, DEFAULT_DMA_HINT_REG(direction)); + return SBA_IOVA(ioc, iovp, offset, DEFAULT_DMA_HINT_REG); } /** @@ -823,12 +854,9 @@ #if DELAYED_RESOURCE_CNT > 0 struct sba_dma_pair *d; #endif - unsigned long flags; + unsigned long flags; dma_addr_t offset; - if (!sba_list) - panic("sba_map_single: no SBA found!\n"); - ioc = GET_IOC(dev); ASSERT(ioc); @@ -861,29 +889,6 @@ size += offset; size = ROUNDUP(size, IOVP_SIZE); -#ifdef ENABLE_MARK_CLEAN - /* - ** Don't need to hold the spinlock while telling VM pages are "clean". - ** The pages are "busy" in the resource map until we mark them free. - ** But tell VM pages are clean *before* releasing the resource - ** in order to avoid race conditions. - */ - if (direction == PCI_DMA_FROMDEVICE) { - u32 iovp = (u32) SBA_IOVP(ioc,iova); - unsigned int pide = PDIR_INDEX(iovp); - u64 *pdirp = &(ioc->pdir_base[pide]); - size_t byte_cnt = size; - void *addr; - - do { - addr = phys_to_virt(sba_io_page(pdirp)); - mark_clean(addr, min(byte_cnt, IOVP_SIZE)); - pdirp++; - byte_cnt -= IOVP_SIZE; - } while (byte_cnt > 0); - } -#endif - spin_lock_irqsave(&ioc->res_lock, flags); #ifdef CONFIG_PROC_FS ioc->usingle_calls++; @@ -909,7 +914,40 @@ sba_free_range(ioc, iova, size); READ_REG(ioc->ioc_hpa+IOC_PCOM); /* flush purges */ #endif /* DELAYED_RESOURCE_CNT == 0 */ +#ifdef ENABLE_MARK_CLEAN + if (direction == PCI_DMA_FROMDEVICE) { + u32 iovp = (u32) SBA_IOVP(ioc,iova); + int off = PDIR_INDEX(iovp); + void *addr; + + if (size <= IOVP_SIZE) { + addr = phys_to_virt(ioc->pdir_base[off] & + ~0xE000000000000FFFULL); + mark_clean(addr, size); + } else { + size_t byte_cnt = size; + + do { + addr = phys_to_virt(ioc->pdir_base[off] & + ~0xE000000000000FFFULL); + mark_clean(addr, min(byte_cnt, IOVP_SIZE)); + off++; + byte_cnt -= IOVP_SIZE; + + } while (byte_cnt > 0); + } + } +#endif spin_unlock_irqrestore(&ioc->res_lock, flags); + + /* XXX REVISIT for 2.5 Linux - need syncdma for zero-copy support. + ** For Astro based systems this isn't a big deal WRT performance. + ** As long as 2.4 kernels copyin/copyout data from/to userspace, + ** we don't need the syncdma. The issue here is I/O MMU cachelines + ** are *not* coherent in all cases. May be hwrev dependent. + ** Need to investigate more. + asm volatile("syncdma"); + */ } @@ -924,6 +962,7 @@ void * sba_alloc_consistent(struct pci_dev *hwdev, size_t size, dma_addr_t *dma_handle) { + struct ioc *ioc; void *ret; if (!hwdev) { @@ -941,7 +980,8 @@ * than dma_mask from the device, this needs to be * updated. */ - *dma_handle = sba_map_single(&sac_only_dev, ret, size, 0); + ioc = GET_IOC(hwdev); + *dma_handle = sba_map_single(ioc->sac_only_dev, ret, size, 0); } return ret; @@ -965,109 +1005,238 @@ } +/* +** Since 0 is a valid pdir_base index value, can't use that +** to determine if a value is valid or not. Use a flag to indicate +** the SG list entry contains a valid pdir index. +*/ +#define PIDE_FLAG 0x1UL + #ifdef DEBUG_LARGE_SG_ENTRIES int dump_run_sg = 0; #endif -#define SG_ENT_VIRT_PAGE(sg) page_address((sg)->page) -#define SG_ENT_PHYS_PAGE(SG) virt_to_phys(SG_ENT_VIRT_PAGE(SG)) - /** - * sba_coalesce_chunks - preprocess the SG list + * sba_fill_pdir - write allocated SG entries into IO PDIR * @ioc: IO MMU structure which owns the pdir we are interested in. - * @startsg: input=SG list output=DMA addr/len pairs filled in + * @startsg: list of IOVA/size pairs * @nents: number of entries in startsg list - * @direction: R/W or both. - * - * Walk the SG list and determine where the breaks are in the DMA stream. - * Allocate IO Pdir resources and fill them in separate loop. - * Returns the number of DMA streams used for output IOVA list. - * Note each DMA stream can consume multiple IO Pdir entries. * - * Code is written assuming some coalescing is possible. + * Take preprocessed SG list and write corresponding entries + * in the IO PDIR. */ + static SBA_INLINE int -sba_coalesce_chunks(struct ioc *ioc, struct scatterlist *startsg, - int nents, int direction) +sba_fill_pdir( + struct ioc *ioc, + struct scatterlist *startsg, + int nents) { - struct scatterlist *dma_sg = startsg; /* return array */ + struct scatterlist *dma_sg = startsg; /* pointer to current DMA */ int n_mappings = 0; + u64 *pdirp = 0; + unsigned long dma_offset = 0; - ASSERT(nents > 1); + dma_sg--; + while (nents-- > 0) { + int cnt = startsg->dma_length; + startsg->dma_length = 0; - do { - unsigned int dma_cnt = 1; /* number of pages in DMA stream */ - unsigned int pide; /* index into IO Pdir array */ - u64 *pdirp; /* pointer into IO Pdir array */ - unsigned long dma_offset, dma_len; /* cumulative DMA stream */ +#ifdef DEBUG_LARGE_SG_ENTRIES + if (dump_run_sg) + printk(" %2d : %08lx/%05x %p\n", + nents, startsg->dma_address, cnt, + sba_sg_address(startsg)); +#else + DBG_RUN_SG(" %d : %08lx/%05x %p\n", + nents, startsg->dma_address, cnt, + sba_sg_address(startsg)); +#endif + /* + ** Look for the start of a new DMA stream + */ + if (startsg->dma_address & PIDE_FLAG) { + u32 pide = startsg->dma_address & ~PIDE_FLAG; + dma_offset = (unsigned long) pide & ~IOVP_MASK; + startsg->dma_address = 0; + dma_sg++; + dma_sg->dma_address = pide | ioc->ibase; + pdirp = &(ioc->pdir_base[pide >> IOVP_SHIFT]); + n_mappings++; + } /* - ** Prepare for first/next DMA stream + ** Look for a VCONTIG chunk */ - dma_len = sba_sg_len(startsg); - dma_offset = (unsigned long) sba_sg_address(startsg); + if (cnt) { + unsigned long vaddr = (unsigned long) sba_sg_address(startsg); + ASSERT(pdirp); + + /* Since multiple Vcontig blocks could make up + ** one DMA stream, *add* cnt to dma_len. + */ + dma_sg->dma_length += cnt; + cnt += dma_offset; + dma_offset=0; /* only want offset on first chunk */ + cnt = ROUNDUP(cnt, IOVP_SIZE); +#ifdef CONFIG_PROC_FS + ioc->msg_pages += cnt >> IOVP_SHIFT; +#endif + do { + sba_io_pdir_entry(pdirp, vaddr); + vaddr += IOVP_SIZE; + cnt -= IOVP_SIZE; + pdirp++; + } while (cnt > 0); + } startsg++; - nents--; + } + /* force pdir update */ + wmb(); + +#ifdef DEBUG_LARGE_SG_ENTRIES + dump_run_sg = 0; +#endif + return(n_mappings); +} + + +/* +** Two address ranges are DMA contiguous *iff* "end of prev" and +** "start of next" are both on a page boundry. +** +** (shift left is a quick trick to mask off upper bits) +*/ +#define DMA_CONTIG(__X, __Y) \ + (((((unsigned long) __X) | ((unsigned long) __Y)) << (BITS_PER_LONG - PAGE_SHIFT)) == 0UL) + + +/** + * sba_coalesce_chunks - preprocess the SG list + * @ioc: IO MMU structure which owns the pdir we are interested in. + * @startsg: list of IOVA/size pairs + * @nents: number of entries in startsg list + * + * First pass is to walk the SG list and determine where the breaks are + * in the DMA stream. Allocates PDIR entries but does not fill them. + * Returns the number of DMA chunks. + * + * Doing the fill seperate from the coalescing/allocation keeps the + * code simpler. Future enhancement could make one pass through + * the sglist do both. + */ +static SBA_INLINE int +sba_coalesce_chunks( struct ioc *ioc, + struct scatterlist *startsg, + int nents) +{ + struct scatterlist *vcontig_sg; /* VCONTIG chunk head */ + unsigned long vcontig_len; /* len of VCONTIG chunk */ + unsigned long vcontig_end; + struct scatterlist *dma_sg; /* next DMA stream head */ + unsigned long dma_offset, dma_len; /* start/len of DMA stream */ + int n_mappings = 0; + + while (nents > 0) { + unsigned long vaddr = (unsigned long) sba_sg_address(startsg); /* - ** We want to know how many entries can be coalesced - ** before trying to allocate IO Pdir space. - ** IOVAs can then be allocated "naturally" aligned - ** to take advantage of the block IO TLB flush. + ** Prepare for first/next DMA stream */ - while (nents) { - unsigned long end_offset = dma_offset + dma_len; + dma_sg = vcontig_sg = startsg; + dma_len = vcontig_len = vcontig_end = startsg->length; + vcontig_end += vaddr; + dma_offset = vaddr & ~IOVP_MASK; - /* prev entry must end on a page boundary */ - if (end_offset & IOVP_MASK) - break; + /* PARANOID: clear entries */ + startsg->dma_address = startsg->dma_length = 0; - /* next entry start on a page boundary? */ - if (startsg->offset) - break; + /* + ** This loop terminates one iteration "early" since + ** it's always looking one "ahead". + */ + while (--nents > 0) { + unsigned long vaddr; /* tmp */ + + startsg++; + + /* PARANOID */ + startsg->dma_address = startsg->dma_length = 0; + + /* catch brokenness in SCSI layer */ + ASSERT(startsg->length <= DMA_CHUNK_SIZE); /* - ** make sure current dma stream won't exceed - ** DMA_CHUNK_SIZE if coalescing entries. + ** First make sure current dma stream won't + ** exceed DMA_CHUNK_SIZE if we coalesce the + ** next entry. */ - if (((end_offset + startsg->length + ~IOVP_MASK) - & IOVP_MASK) - > DMA_CHUNK_SIZE) + if (((dma_len + dma_offset + startsg->length + ~IOVP_MASK) & IOVP_MASK) + > DMA_CHUNK_SIZE) break; - dma_len += sba_sg_len(startsg); - startsg++; - nents--; - dma_cnt++; - } + /* + ** Then look for virtually contiguous blocks. + ** + ** append the next transaction? + */ + vaddr = (unsigned long) sba_sg_address(startsg); + if (vcontig_end == vaddr) + { + vcontig_len += startsg->length; + vcontig_end += startsg->length; + dma_len += startsg->length; + continue; + } - ASSERT(dma_len <= DMA_CHUNK_SIZE); +#ifdef DEBUG_LARGE_SG_ENTRIES + dump_run_sg = (vcontig_len > IOVP_SIZE); +#endif - /* allocate IO Pdir resource. - ** returns index into (u64) IO Pdir array. - ** IOVA is formed from this. - */ - pide = sba_alloc_range(ioc, dma_cnt << IOVP_SHIFT); - pdirp = &(ioc->pdir_base[pide]); + /* + ** Not virtually contigous. + ** Terminate prev chunk. + ** Start a new chunk. + ** + ** Once we start a new VCONTIG chunk, dma_offset + ** can't change. And we need the offset from the first + ** chunk - not the last one. Ergo Successive chunks + ** must start on page boundaries and dove tail + ** with it's predecessor. + */ + vcontig_sg->dma_length = vcontig_len; - /* fill_pdir: write stream into IO Pdir */ - while (dma_cnt--) { - sba_io_pdir_entry(pdirp, SG_ENT_PHYS_PAGE(startsg)); - startsg++; - pdirp++; - } + vcontig_sg = startsg; + vcontig_len = startsg->length; - /* "output" IOVA */ - sba_sg_iova(dma_sg) = SBA_IOVA(ioc, - ((dma_addr_t) pide << IOVP_SHIFT), - dma_offset, - DEFAULT_DMA_HINT_REG(direction)); - sba_sg_iova_len(dma_sg) = dma_len; + /* + ** 3) do the entries end/start on page boundaries? + ** Don't update vcontig_end until we've checked. + */ + if (DMA_CONTIG(vcontig_end, vaddr)) + { + vcontig_end = vcontig_len + vaddr; + dma_len += vcontig_len; + continue; + } else { + break; + } + } - dma_sg++; + /* + ** End of DMA Stream + ** Terminate last VCONTIG block. + ** Allocate space for DMA stream. + */ + vcontig_sg->dma_length = vcontig_len; + dma_len = (dma_len + dma_offset + ~IOVP_MASK) & IOVP_MASK; + ASSERT(dma_len <= DMA_CHUNK_SIZE); + dma_sg->dma_address = (dma_addr_t) (PIDE_FLAG + | (sba_alloc_range(ioc, dma_len) << IOVP_SHIFT) + | dma_offset); n_mappings++; - } while (nents); + } return n_mappings; } @@ -1075,60 +1244,52 @@ /** * sba_map_sg - map Scatter/Gather list - * @dev: instance of PCI device owned by the driver that's asking. + * @dev: instance of PCI owned by the driver that's asking. * @sglist: array of buffer/length pairs * @nents: number of entries in list * @direction: R/W or both. * * See Documentation/DMA-mapping.txt */ -int sba_map_sg(struct pci_dev *dev, struct scatterlist *sglist, int nents, - int direction) +int sba_map_sg(struct pci_dev *dev, struct scatterlist *sglist, int nents, int direction) { struct ioc *ioc; - int filled = 0; + int coalesced, filled = 0; unsigned long flags; #ifdef ALLOW_IOV_BYPASS struct scatterlist *sg; #endif - DBG_RUN_SG("%s() START %d entries, 0x%p,0x%x\n", __FUNCTION__, nents, - sba_sg_address(sglist), sba_sg_len(sglist)); - - if (!sba_list) - panic("sba_map_single: no SBA found!\n"); - + DBG_RUN_SG("%s() START %d entries\n", __FUNCTION__, nents); ioc = GET_IOC(dev); ASSERT(ioc); #ifdef ALLOW_IOV_BYPASS if (dev->dma_mask >= ioc->dma_mask) { - for (sg = sglist ; filled < nents ; filled++, sg++) { - sba_sg_iova(sg) = virt_to_phys(sba_sg_address(sg)); - sba_sg_iova_len(sg) = sba_sg_len(sg); + for (sg = sglist ; filled < nents ; filled++, sg++){ + sg->dma_length = sg->length; + sg->dma_address = virt_to_phys(sba_sg_address(sg)); } #ifdef CONFIG_PROC_FS spin_lock_irqsave(&ioc->res_lock, flags); ioc->msg_bypass++; spin_unlock_irqrestore(&ioc->res_lock, flags); #endif - DBG_RUN_SG("%s() DONE %d mappings bypassed\n", __FUNCTION__, filled); return filled; } #endif /* Fast path single entry scatterlists. */ if (nents == 1) { - sba_sg_iova(sglist) = sba_map_single(dev, - (void *) sba_sg_iova(sglist), - sba_sg_len(sglist), direction); - sba_sg_iova_len(sglist) = sba_sg_len(sglist); + sglist->dma_length = sglist->length; + sglist->dma_address = sba_map_single(dev, + sba_sg_address(sglist), + sglist->length, direction); #ifdef CONFIG_PROC_FS /* ** Should probably do some stats counting, but trying to ** be precise quickly starts wasting CPU time. */ #endif - DBG_RUN_SG("%s() DONE 1 mapping\n", __FUNCTION__); return 1; } @@ -1145,11 +1306,26 @@ #ifdef CONFIG_PROC_FS ioc->msg_calls++; #endif - + + /* + ** First coalesce the chunks and allocate I/O pdir space + ** + ** If this is one DMA stream, we can properly map using the + ** correct virtual address associated with each DMA page. + ** w/o this association, we wouldn't have coherent DMA! + ** Access to the virtual address is what forces a two pass algorithm. + */ + coalesced = sba_coalesce_chunks(ioc, sglist, nents); + /* - ** coalesce and program the I/O Pdir + ** Program the I/O Pdir + ** + ** map the virtual addresses to the I/O Pdir + ** o dma_address will contain the pdir index + ** o dma_len will contain the number of bytes to map + ** o address contains the virtual address. */ - filled = sba_coalesce_chunks(ioc, sglist, nents, direction); + filled = sba_fill_pdir(ioc, sglist, nents); #ifdef ASSERT_PDIR_SANITY if (sba_check_pdir(ioc,"Check after sba_map_sg()")) @@ -1161,6 +1337,7 @@ spin_unlock_irqrestore(&ioc->res_lock, flags); + ASSERT(coalesced == filled); DBG_RUN_SG("%s() DONE %d mappings\n", __FUNCTION__, filled); return filled; @@ -1184,11 +1361,8 @@ unsigned long flags; #endif - DBG_RUN_SG("%s() START %d entries, 0x%p,0x%x\n", - __FUNCTION__, nents, sba_sg_address(sglist), sba_sg_len(sglist)); - - if (!sba_list) - panic("sba_map_single: no SBA found!\n"); + DBG_RUN_SG("%s() START %d entries, %p,%x\n", + __FUNCTION__, nents, sba_sg_address(sglist), sglist->length); ioc = GET_IOC(dev); ASSERT(ioc); @@ -1203,10 +1377,10 @@ spin_unlock_irqrestore(&ioc->res_lock, flags); #endif - while (sba_sg_len(sglist) && nents--) { + while (nents && sglist->dma_length) { - sba_unmap_single(dev, (dma_addr_t)sba_sg_iova(sglist), - sba_sg_iova_len(sglist), direction); + sba_unmap_single(dev, sglist->dma_address, + sglist->dma_length, direction); #ifdef CONFIG_PROC_FS /* ** This leaves inconsistent data in the stats, but we can't @@ -1214,9 +1388,11 @@ ** were coalesced to a single entry. The stats are fun, ** but speed is more important. */ - ioc->usg_pages += (((u64)sba_sg_iova(sglist) & ~IOVP_MASK) + sba_sg_len(sglist) + IOVP_SIZE - 1) >> IOVP_SHIFT; + ioc->usg_pages += ((sglist->dma_address & ~IOVP_MASK) + sglist->dma_length + + IOVP_SIZE - 1) >> PAGE_SHIFT; #endif - ++sglist; + sglist++; + nents--; } DBG_RUN_SG("%s() DONE (nents %d)\n", __FUNCTION__, nents); @@ -1229,87 +1405,90 @@ } -unsigned long -sba_dma_address (struct scatterlist *sg) -{ - return ((unsigned long)sba_sg_iova(sg)); -} - -int -sba_dma_supported (struct pci_dev *dev, u64 mask) -{ - return 1; -} - /************************************************************** * * Initialization and claim * ***************************************************************/ - -static void -sba_ioc_init(struct sba_device *sba_dev, struct ioc *ioc, int ioc_num) +static void __init +ioc_iova_init(struct ioc *ioc) { - u32 iova_space_size, iova_space_mask; - void * pdir_base; - int pdir_size, iov_order, tcnfg; + u32 iova_space_mask; + int iov_order, tcnfg; + int agp_found = 0; + struct pci_dev *device; +#ifdef FULL_VALID_PDIR + unsigned long index; +#endif /* - ** Firmware programs the maximum IOV space size into the imask reg + ** Firmware programs the base and size of a "safe IOVA space" + ** (one that doesn't overlap memory or LMMIO space) in the + ** IBASE and IMASK registers. */ - iova_space_size = ~(READ_REG(ioc->ioc_hpa + IOC_IMASK) & 0xFFFFFFFFUL) + 1; + ioc->ibase = READ_REG(ioc->ioc_hpa + IOC_IBASE) & ~0x1UL; + ioc->iov_size = ~(READ_REG(ioc->ioc_hpa + IOC_IMASK) & 0xFFFFFFFFUL) + 1; + + if (ioc->ibase == 0) { + if (((unsigned long) ioc->ioc_hpa & 0x3000UL) == 0x2000) + ioc->ibase = 0xc0000000; + else + ioc->ibase = 0x80000000; + printk("WARNING: IBASE is zero; setting to 0x%lx\n", ioc->ibase); + } + + if (ioc->ibase < 0xfed00000UL && ioc->ibase + ioc->iov_size >= 0xfee00000UL) { + printk("WARNING: IOV space overlaps local config and interrupt message, " + "truncating\n"); + ioc->iov_size /= 2; + } /* ** iov_order is always based on a 1GB IOVA space since we want to ** turn on the other half for AGP GART. */ - iov_order = get_order(iova_space_size >> (IOVP_SHIFT-PAGE_SHIFT)); - ioc->pdir_size = pdir_size = (iova_space_size/IOVP_SIZE) * sizeof(u64); + iov_order = get_order(ioc->iov_size >> (IOVP_SHIFT - PAGE_SHIFT)); + ioc->pdir_size = (ioc->iov_size / IOVP_SIZE) * sizeof(u64); - DBG_INIT("%s() hpa 0x%lx IOV %dMB (%d bits) PDIR size 0x%0x\n", - __FUNCTION__, ioc->ioc_hpa, iova_space_size>>20, - iov_order + PAGE_SHIFT, ioc->pdir_size); + DBG_INIT("%s() hpa %p IOV %dMB (%d bits) PDIR size 0x%0x\n", + __FUNCTION__, ioc->ioc_hpa, ioc->iov_size >> 20, + iov_order + PAGE_SHIFT, ioc->pdir_size); - /* XXX DMA HINTs not used */ + /* FIXME : DMA HINTs not used */ ioc->hint_shift_pdir = iov_order + PAGE_SHIFT; ioc->hint_mask_pdir = ~(0x3 << (iov_order + PAGE_SHIFT)); - ioc->pdir_base = pdir_base = - (void *) __get_free_pages(GFP_KERNEL, get_order(pdir_size)); - if (NULL == pdir_base) - { - panic(__FILE__ ":%s() could not allocate I/O Page Table\n", __FUNCTION__); - } - memset(pdir_base, 0, pdir_size); + ioc->pdir_base = (void *) __get_free_pages(GFP_KERNEL, + get_order(ioc->pdir_size)); + if (!ioc->pdir_base) + panic(PFX "Couldn't allocate I/O Page Table\n"); + + memset(ioc->pdir_base, 0, ioc->pdir_size); DBG_INIT("%s() pdir %p size %x hint_shift_pdir %x hint_mask_pdir %lx\n", - __FUNCTION__, pdir_base, pdir_size, + __FUNCTION__, ioc->pdir_base, ioc->pdir_size, ioc->hint_shift_pdir, ioc->hint_mask_pdir); - ASSERT((((unsigned long) pdir_base) & PAGE_MASK) == (unsigned long) pdir_base); - WRITE_REG(virt_to_phys(pdir_base), ioc->ioc_hpa + IOC_PDIR_BASE); + ASSERT((((unsigned long) ioc->pdir_base) & PAGE_MASK) == (unsigned long) ioc->pdir_base); + WRITE_REG(virt_to_phys(ioc->pdir_base), ioc->ioc_hpa + IOC_PDIR_BASE); - DBG_INIT(" base %p\n", pdir_base); + DBG_INIT(" base %p\n", ioc->pdir_base); /* build IMASK for IOC and Elroy */ iova_space_mask = 0xffffffff; - iova_space_mask <<= (iov_order + IOVP_SHIFT); - - ioc->ibase = READ_REG(ioc->ioc_hpa + IOC_IBASE) & 0xFFFFFFFEUL; - - ioc->imask = iova_space_mask; /* save it */ + iova_space_mask <<= (iov_order + PAGE_SHIFT); + ioc->imask = iova_space_mask; DBG_INIT("%s() IOV base 0x%lx mask 0x%0lx\n", __FUNCTION__, ioc->ibase, ioc->imask); /* - ** XXX DMA HINT registers are programmed with default hint + ** FIXME: Hint registers are programmed with default hint ** values during boot, so hints should be sane even if we ** can't reprogram them the way drivers want. */ - - WRITE_REG(ioc->imask, ioc->ioc_hpa+IOC_IMASK); + WRITE_REG(ioc->imask, ioc->ioc_hpa + IOC_IMASK); /* ** Setting the upper bits makes checking for bypass addresses @@ -1317,34 +1496,30 @@ */ ioc->imask |= 0xFFFFFFFF00000000UL; - /* Set I/O Pdir page size to system page size */ - switch (IOVP_SHIFT) { - case 12: /* 4K */ - tcnfg = 0; - break; - case 13: /* 8K */ - tcnfg = 1; - break; - case 14: /* 16K */ - tcnfg = 2; - break; - case 16: /* 64K */ - tcnfg = 3; + /* Set I/O PDIR Page size to system page size */ + switch (PAGE_SHIFT) { + case 12: tcnfg = 0; break; /* 4K */ + case 13: tcnfg = 1; break; /* 8K */ + case 14: tcnfg = 2; break; /* 16K */ + case 16: tcnfg = 3; break; /* 64K */ + default: + panic(PFX "Unsupported system page size %d", + 1 << PAGE_SHIFT); break; } - WRITE_REG(tcnfg, ioc->ioc_hpa+IOC_TCNFG); + WRITE_REG(tcnfg, ioc->ioc_hpa + IOC_TCNFG); /* ** Program the IOC's ibase and enable IOVA translation ** Bit zero == enable bit. */ - WRITE_REG(ioc->ibase | 1, ioc->ioc_hpa+IOC_IBASE); + WRITE_REG(ioc->ibase | 1, ioc->ioc_hpa + IOC_IBASE); /* ** Clear I/O TLB of any possible entries. ** (Yes. This is a bit paranoid...but so what) */ - WRITE_REG(0 | 31, ioc->ioc_hpa+IOC_PCOM); + WRITE_REG(ioc->ibase | (iov_order+PAGE_SHIFT), ioc->ioc_hpa + IOC_PCOM); /* ** If an AGP device is present, only use half of the IOV space @@ -1354,213 +1529,267 @@ ** We program the next pdir index after we stop w/ a key for ** the GART code to handshake on. */ - if (SBA_GET_AGP(sba_dev)) { - DBG_INIT("%s() AGP Device found, reserving 512MB for GART support\n", __FUNCTION__); - ioc->pdir_size /= 2; - ((u64 *)pdir_base)[PDIR_INDEX(iova_space_size/2)] = 0x0000badbadc0ffeeULL; + pci_for_each_dev(device) + agp_found |= pci_find_capability(device, PCI_CAP_ID_AGP); + + if (agp_found && reserve_sba_gart) { + DBG_INIT("%s: AGP device found, reserving half of IOVA for GART support\n", + __FUNCTION__); + ioc->pdir_size /= 2; + ((u64 *)ioc->pdir_base)[PDIR_INDEX(ioc->iov_size/2)] = ZX1_SBA_IOMMU_COOKIE; + } +#ifdef FULL_VALID_PDIR + /* + ** Check to see if the spill page has been allocated, we don't need more than + ** one across multiple SBAs. + */ + if (!prefetch_spill_page) { + char *spill_poison = "SBAIOMMU POISON"; + int poison_size = 16; + void *poison_addr, *addr; + + addr = (void *)__get_free_pages(GFP_KERNEL, get_order(IOVP_SIZE)); + if (!addr) + panic(PFX "Couldn't allocate PDIR spill page\n"); + + poison_addr = addr; + for ( ; (u64) poison_addr < addr + IOVP_SIZE; poison_addr += poison_size) + memcpy(poison_addr, spill_poison, poison_size); + + prefetch_spill_page = virt_to_phys(addr); + + DBG_INIT("%s() prefetch spill addr: 0x%lx\n", __FUNCTION__, prefetch_spill_page); } + /* + ** Set all the PDIR entries valid w/ the spill page as the target + */ + for (index = 0 ; index < (ioc->pdir_size / sizeof(u64)) ; index++) + ((u64 *)ioc->pdir_base)[index] = (0x80000000000000FF | prefetch_spill_page); +#endif - DBG_INIT("%s() DONE\n", __FUNCTION__); } +static void __init +ioc_resource_init(struct ioc *ioc) +{ + spin_lock_init(&ioc->res_lock); + /* resource map size dictated by pdir_size */ + ioc->res_size = ioc->pdir_size / sizeof(u64); /* entries */ + ioc->res_size >>= 3; /* convert bit count to byte count */ + DBG_INIT("%s() res_size 0x%x\n", __FUNCTION__, ioc->res_size); -/************************************************************************** -** -** SBA initialization code (HW and SW) -** -** o identify SBA chip itself -** o FIXME: initialize DMA hints for reasonable defaults -** -**************************************************************************/ + ioc->res_map = (char *) __get_free_pages(GFP_KERNEL, + get_order(ioc->res_size)); + if (!ioc->res_map) + panic(PFX "Couldn't allocate resource map\n"); -static void -sba_hw_init(struct sba_device *sba_dev) -{ - int i; - int num_ioc; - u64 dma_mask; - u32 func_id; + memset(ioc->res_map, 0, ioc->res_size); + /* next available IOVP - circular search */ + ioc->res_hint = (unsigned long *) ioc->res_map; - /* - ** Identify the SBA so we can set the dma_mask. We can make a virtual - ** dma_mask of the memory subsystem such that devices not implmenting - ** a full 64bit mask might still be able to bypass efficiently. - */ - func_id = READ_REG(sba_dev->sba_hpa + SBA_FUNC_ID); +#ifdef ASSERT_PDIR_SANITY + /* Mark first bit busy - ie no IOVA 0 */ + ioc->res_map[0] = 0x1; + ioc->pdir_base[0] = 0x8000000000000000ULL | ZX1_SBA_IOMMU_COOKIE; +#endif +#ifdef FULL_VALID_PDIR + /* Mark the last resource used so we don't prefetch beyond IOVA space */ + ioc->res_map[ioc->res_size - 1] |= 0x80UL; /* res_map is chars */ + ioc->pdir_base[(ioc->pdir_size / sizeof(u64)) - 1] = (0x80000000000000FF + | prefetch_spill_page); +#endif - if (func_id == ZX1_FUNC_ID_VALUE) { - dma_mask = 0xFFFFFFFFFFUL; - } else { - dma_mask = 0xFFFFFFFFFFFFFFFFUL; - } + DBG_INIT("%s() res_map %x %p\n", __FUNCTION__, + ioc->res_size, (void *) ioc->res_map); +} + +static void __init +ioc_sac_init(struct ioc *ioc) +{ + struct pci_dev *sac = NULL; + struct pci_controller *controller = NULL; - DBG_INIT("%s(): ioc->dma_mask == 0x%lx\n", __FUNCTION__, dma_mask); - /* - ** Leaving in the multiple ioc code from parisc for the future, - ** currently there are no muli-ioc mckinley sbas - */ - sba_dev->ioc[0].ioc_hpa = SBA_IOC_OFFSET; - num_ioc = 1; + * pci_alloc_consistent() must return a DMA address which is + * SAC (single address cycle) addressable, so allocate a + * pseudo-device to enforce that. + */ + sac = kmalloc(sizeof(*sac), GFP_KERNEL); + if (!sac) + panic(PFX "Couldn't allocate struct pci_dev"); + memset(sac, 0, sizeof(*sac)); - sba_dev->num_ioc = num_ioc; - for (i = 0; i < num_ioc; i++) { - sba_dev->ioc[i].dma_mask = dma_mask; - sba_dev->ioc[i].ioc_hpa += sba_dev->sba_hpa; - sba_ioc_init(sba_dev, &(sba_dev->ioc[i]), i); - } + controller = kmalloc(sizeof(*controller), GFP_KERNEL); + if (!controller) + panic(PFX "Couldn't allocate struct pci_controller"); + memset(controller, 0, sizeof(*controller)); + + controller->iommu = ioc; + sac->sysdata = controller; + sac->dma_mask = 0xFFFFFFFFUL; + ioc->sac_only_dev = sac; } -static void -sba_common_init(struct sba_device *sba_dev) +static void __init +ioc_zx1_init(struct ioc *ioc) { - int i; + if (ioc->rev < 0x20) + panic(PFX "IOC 2.0 or later required for IOMMU support\n"); - /* add this one to the head of the list (order doesn't matter) - ** This will be useful for debugging - especially if we get coredumps - */ - sba_dev->next = sba_list; - sba_list = sba_dev; - sba_count++; - - for(i=0; i< sba_dev->num_ioc; i++) { - int res_size; - - /* resource map size dictated by pdir_size */ - res_size = sba_dev->ioc[i].pdir_size/sizeof(u64); /* entries */ - res_size >>= 3; /* convert bit count to byte count */ - DBG_INIT("%s() res_size 0x%x\n", - __FUNCTION__, res_size); - - sba_dev->ioc[i].res_size = res_size; - sba_dev->ioc[i].res_map = (char *) __get_free_pages(GFP_KERNEL, get_order(res_size)); - - if (NULL == sba_dev->ioc[i].res_map) - { - panic(__FILE__ ":%s() could not allocate resource map\n", __FUNCTION__ ); - } + ioc->dma_mask = 0xFFFFFFFFFFUL; +} - memset(sba_dev->ioc[i].res_map, 0, res_size); - /* next available IOVP - circular search */ - if ((sba_dev->hw_rev & 0xFF) >= 0x20) { - sba_dev->ioc[i].res_hint = (unsigned long *) - sba_dev->ioc[i].res_map; - } else { - u64 reserved_iov; +typedef void (initfunc)(struct ioc *); - /* Yet another 1.x hack */ - printk(KERN_DEBUG "zx1 1.x: Starting resource hint offset into " - "IOV space to avoid initial zero value IOVA\n"); - sba_dev->ioc[i].res_hint = (unsigned long *) - &(sba_dev->ioc[i].res_map[L1_CACHE_BYTES]); - - sba_dev->ioc[i].res_map[0] = 0x1; - sba_dev->ioc[i].pdir_base[0] = 0x8000badbadc0ffeeULL; - - for (reserved_iov = 0xA0000 ; reserved_iov < 0xC0000 ; reserved_iov += IOVP_SIZE) { - u64 *res_ptr = (u64 *) sba_dev->ioc[i].res_map; - int index = PDIR_INDEX(reserved_iov); - int res_word; - u64 mask; - - res_word = (int)(index / BITS_PER_LONG); - mask = 0x1UL << (index - (res_word * BITS_PER_LONG)); - res_ptr[res_word] |= mask; - sba_dev->ioc[i].pdir_base[PDIR_INDEX(reserved_iov)] = (SBA_VALID_MASK | reserved_iov); +struct ioc_iommu { + u32 func_id; + char *name; + initfunc *init; +}; - } - } +static struct ioc_iommu ioc_iommu_info[] __initdata = { + { ZX1_IOC_ID, "zx1", ioc_zx1_init }, + { REO_IOC_ID, "REO" }, +}; -#ifdef ASSERT_PDIR_SANITY - /* Mark first bit busy - ie no IOVA 0 */ - sba_dev->ioc[i].res_map[0] = 0x1; - sba_dev->ioc[i].pdir_base[0] = 0x8000badbadc0ffeeULL; -#endif +static struct ioc * __init +ioc_init(u64 hpa, void *handle) +{ + struct ioc *ioc; + struct ioc_iommu *info; - DBG_INIT("%s() %d res_map %x %p\n", __FUNCTION__, - i, res_size, (void *)sba_dev->ioc[i].res_map); + ioc = kmalloc(sizeof(*ioc), GFP_KERNEL); + if (!ioc) + return NULL; + + memset(ioc, 0, sizeof(*ioc)); + + ioc->next = ioc_list; + ioc_list = ioc; + + ioc->handle = handle; + ioc->ioc_hpa = ioremap(hpa, 0x1000); + + ioc->func_id = READ_REG(ioc->ioc_hpa + IOC_FUNC_ID); + ioc->rev = READ_REG(ioc->ioc_hpa + IOC_FCLASS) & 0xFFUL; + ioc->dma_mask = 0xFFFFFFFFFFFFFFFFUL; /* conservative */ + + for (info = ioc_iommu_info; info < ioc_iommu_info + ARRAY_SIZE(ioc_iommu_info); info++) { + if (ioc->func_id == info->func_id) { + ioc->name = info->name; + if (info->init) + (info->init)(ioc); + } } - sba_dev->sba_lock = SPIN_LOCK_UNLOCKED; + if (!ioc->name) + ioc->name = "Unknown"; + + ioc_iova_init(ioc); + ioc_resource_init(ioc); + ioc_sac_init(ioc); + + printk(KERN_INFO PFX + "Found %s IOC %d.%d HPA 0x%lx IOVA space %dMb at 0x%lx\n", + ioc->name, (ioc->rev >> 4) & 0xF, ioc->rev & 0xF, + hpa, ioc->iov_size >> 20, ioc->ibase); + + return ioc; } + + +/************************************************************************** +** +** SBA initialization code (HW and SW) +** +** o identify SBA chip itself +** o FIXME: initialize DMA hints for reasonable defaults +** +**************************************************************************/ + #ifdef CONFIG_PROC_FS -static int sba_proc_info(char *buf, char **start, off_t offset, int len) +static int +sba_proc_info_one(char *buf, struct ioc *ioc) { - struct sba_device *sba_dev; - struct ioc *ioc; - int total_pages; + int total_pages = (int) (ioc->res_size << 3); /* 8 bits per byte */ unsigned long i = 0, avg = 0, min, max; - for (sba_dev = sba_list; sba_dev; sba_dev = sba_dev->next) { - ioc = &sba_dev->ioc[0]; /* FIXME: Multi-IOC support! */ - total_pages = (int) (ioc->res_size << 3); /* 8 bits per byte */ - - sprintf(buf, "%s rev %d.%d\n", "Hewlett Packard zx1 SBA", - ((sba_dev->hw_rev >> 4) & 0xF), (sba_dev->hw_rev & 0xF)); - sprintf(buf, "%sIO PDIR size : %d bytes (%d entries)\n", buf, - (int) ((ioc->res_size << 3) * sizeof(u64)), /* 8 bits/byte */ total_pages); - - sprintf(buf, "%sIO PDIR entries : %ld free %ld used (%d%%)\n", buf, - total_pages - ioc->used_pages, ioc->used_pages, - (int) (ioc->used_pages * 100 / total_pages)); - - sprintf(buf, "%sResource bitmap : %d bytes (%d pages)\n", - buf, ioc->res_size, ioc->res_size << 3); /* 8 bits per byte */ - - min = max = ioc->avg_search[0]; - for (i = 0; i < SBA_SEARCH_SAMPLE; i++) { - avg += ioc->avg_search[i]; - if (ioc->avg_search[i] > max) max = ioc->avg_search[i]; - if (ioc->avg_search[i] < min) min = ioc->avg_search[i]; - } - avg /= SBA_SEARCH_SAMPLE; - sprintf(buf, "%s Bitmap search : %ld/%ld/%ld (min/avg/max CPU Cycles)\n", - buf, min, avg, max); - - sprintf(buf, "%spci_map_single(): %12ld calls %12ld pages (avg %d/1000)\n", - buf, ioc->msingle_calls, ioc->msingle_pages, - (int) ((ioc->msingle_pages * 1000)/ioc->msingle_calls)); + sprintf(buf, "Hewlett Packard %s IOC rev %d.%d\n", + ioc->name, ((ioc->rev >> 4) & 0xF), (ioc->rev & 0xF)); + sprintf(buf, "%sIO PDIR size : %d bytes (%d entries)\n", + buf, + (int) ((ioc->res_size << 3) * sizeof(u64)), /* 8 bits/byte */ + total_pages); + + sprintf(buf, "%sIO PDIR entries : %ld free %ld used (%d%%)\n", buf, + total_pages - ioc->used_pages, ioc->used_pages, + (int) (ioc->used_pages * 100 / total_pages)); + + sprintf(buf, "%sResource bitmap : %d bytes (%d pages)\n", + buf, ioc->res_size, ioc->res_size << 3); /* 8 bits per byte */ + + min = max = ioc->avg_search[0]; + for (i = 0; i < SBA_SEARCH_SAMPLE; i++) { + avg += ioc->avg_search[i]; + if (ioc->avg_search[i] > max) max = ioc->avg_search[i]; + if (ioc->avg_search[i] < min) min = ioc->avg_search[i]; + } + avg /= SBA_SEARCH_SAMPLE; + sprintf(buf, "%s Bitmap search : %ld/%ld/%ld (min/avg/max CPU Cycles)\n", + buf, min, avg, max); + + sprintf(buf, "%spci_map_single(): %12ld calls %12ld pages (avg %d/1000)\n", + buf, ioc->msingle_calls, ioc->msingle_pages, + (int) ((ioc->msingle_pages * 1000)/ioc->msingle_calls)); #ifdef ALLOW_IOV_BYPASS - sprintf(buf, "%spci_map_single(): %12ld bypasses\n", - buf, ioc->msingle_bypass); + sprintf(buf, "%spci_map_single(): %12ld bypasses\n", + buf, ioc->msingle_bypass); #endif - sprintf(buf, "%spci_unmap_single: %12ld calls %12ld pages (avg %d/1000)\n", - buf, ioc->usingle_calls, ioc->usingle_pages, - (int) ((ioc->usingle_pages * 1000)/ioc->usingle_calls)); + sprintf(buf, "%spci_unmap_single: %12ld calls %12ld pages (avg %d/1000)\n", + buf, ioc->usingle_calls, ioc->usingle_pages, + (int) ((ioc->usingle_pages * 1000)/ioc->usingle_calls)); #ifdef ALLOW_IOV_BYPASS - sprintf(buf, "%spci_unmap_single: %12ld bypasses\n", - buf, ioc->usingle_bypass); + sprintf(buf, "%spci_unmap_single: %12ld bypasses\n", + buf, ioc->usingle_bypass); #endif - sprintf(buf, "%spci_map_sg() : %12ld calls %12ld pages (avg %d/1000)\n", - buf, ioc->msg_calls, ioc->msg_pages, - (int) ((ioc->msg_pages * 1000)/ioc->msg_calls)); + sprintf(buf, "%spci_map_sg() : %12ld calls %12ld pages (avg %d/1000)\n", + buf, ioc->msg_calls, ioc->msg_pages, + (int) ((ioc->msg_pages * 1000)/ioc->msg_calls)); #ifdef ALLOW_IOV_BYPASS - sprintf(buf, "%spci_map_sg() : %12ld bypasses\n", - buf, ioc->msg_bypass); + sprintf(buf, "%spci_map_sg() : %12ld bypasses\n", + buf, ioc->msg_bypass); #endif - sprintf(buf, "%spci_unmap_sg() : %12ld calls %12ld pages (avg %d/1000)\n", - buf, ioc->usg_calls, ioc->usg_pages, - (int) ((ioc->usg_pages * 1000)/ioc->usg_calls)); - } + sprintf(buf, "%spci_unmap_sg() : %12ld calls %12ld pages (avg %d/1000)\n", + buf, ioc->usg_calls, ioc->usg_pages, + (int) ((ioc->usg_pages * 1000)/ioc->usg_calls)); + return strlen(buf); } static int -sba_resource_map(char *buf, char **start, off_t offset, int len) +sba_proc_info(char *buf, char **start, off_t offset, int len) { - struct ioc *ioc = sba_list->ioc; /* FIXME: Multi-IOC support! */ - unsigned int *res_ptr; - int i; + struct ioc *ioc; + char *base = buf; - if (!ioc) - return 0; + for (ioc = ioc_list; ioc; ioc = ioc->next) { + buf += sba_proc_info_one(buf, ioc); + } + + return strlen(base); +} + +static int +sba_resource_map_one(char *buf, struct ioc *ioc) +{ + unsigned int *res_ptr = (unsigned int *)ioc->res_map; + int i; - res_ptr = (unsigned int *)ioc->res_map; buf[0] = '\0'; for(i = 0; i < (ioc->res_size / sizeof(unsigned int)); ++i, ++res_ptr) { if ((i & 7) == 0) @@ -1571,129 +1800,146 @@ return strlen(buf); } -#endif -/* -** Determine if sba should claim this chip (return 0) or not (return 1). -** If so, initialize the chip and tell other partners in crime they -** have work to do. -*/ -void __init sba_init(void) +static int +sba_resource_map(char *buf, char **start, off_t offset, int len) { - struct sba_device *sba_dev; - u32 func_id, hw_rev; - u32 *func_offset = NULL; - int i, agp_found = 0; - static char sba_rev[6]; - struct pci_dev *device = NULL; - u64 hpa = 0; - - if (!(device = pci_find_device(PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_ZX1_SBA, NULL))) - return; + struct ioc *ioc; + char *base = buf; - for (i = 0; i < PCI_NUM_RESOURCES; i++) { - if (pci_resource_flags(device, i) == IORESOURCE_MEM) { - hpa = (u64) ioremap(pci_resource_start(device, i), - pci_resource_len(device, i)); - break; - } + for (ioc = ioc_list; ioc; ioc = ioc->next) { + buf += sba_resource_map_one(buf, ioc); } - func_id = READ_REG(hpa + SBA_FUNC_ID); - if (func_id != ZX1_FUNC_ID_VALUE) - return; - - strcpy(sba_rev, "zx1"); - func_offset = zx1_func_offsets; + return strlen(base); +} - /* Read HW Rev First */ - hw_rev = READ_REG(hpa + SBA_FCLASS) & 0xFFUL; +static void __init +sba_proc_init(void) +{ + if (ioc_list) { + struct proc_dir_entry * proc_mckinley_root; - /* - * Not all revision registers of the chipset are updated on every - * turn. Must scan through all functions looking for the highest rev - */ - if (func_offset) { - for (i = 0 ; func_offset[i] != -1 ; i++) { - u32 func_rev; - - func_rev = READ_REG(hpa + SBA_FCLASS + func_offset[i]) & 0xFFUL; - DBG_INIT("%s() func offset: 0x%x rev: 0x%x\n", - __FUNCTION__, func_offset[i], func_rev); - if (func_rev > hw_rev) - hw_rev = func_rev; - } + proc_mckinley_root = proc_mkdir("bus/mckinley",0); + create_proc_info_entry(ioc_list->name, 0, proc_mckinley_root, sba_proc_info); + create_proc_info_entry("bitmap", 0, proc_mckinley_root, sba_resource_map); } +} +#endif - printk(KERN_INFO "%s found %s %d.%d at %s, HPA 0x%lx\n", DRIVER_NAME, - sba_rev, ((hw_rev >> 4) & 0xF), (hw_rev & 0xF), - device->slot_name, hpa); +void +sba_connect_bus(struct pci_bus *bus) +{ + acpi_handle handle, parent; + acpi_status status; + struct ioc *ioc; - if ((hw_rev & 0xFF) < 0x20) { - printk(KERN_INFO "%s: SBA rev less than 2.0 not supported", DRIVER_NAME); + if (!PCI_CONTROLLER(bus)) + panic(PFX "no sysdata on bus %d!\n",bus->number); + + if (PCI_CONTROLLER(bus)->iommu) return; - } - sba_dev = kmalloc(sizeof(struct sba_device), GFP_KERNEL); - if (NULL == sba_dev) { - printk(KERN_ERR DRIVER_NAME " - couldn't alloc sba_device\n"); + handle = PCI_CONTROLLER(bus)->acpi_handle; + if (!handle) return; - } - memset(sba_dev, 0, sizeof(struct sba_device)); + /* + * The IOC scope encloses PCI root bridges in the ACPI + * namespace, so work our way out until we find an IOC we + * claimed previously. + */ + do { + for (ioc = ioc_list; ioc; ioc = ioc->next) + if (ioc->handle == handle) { + PCI_CONTROLLER(bus)->iommu = ioc; + return; + } - for(i=0; iioc[i].res_lock)); + status = acpi_get_parent(handle, &parent); + handle = parent; + } while (ACPI_SUCCESS(status)); - sba_dev->hw_rev = hw_rev; - sba_dev->sba_hpa = hpa; + printk("No IOC for PCI Bus %d in ACPI\n", bus->number); +} - /* - * We pass this fake device from alloc_consistent to ensure - * we only use SAC for alloc_consistent mappings. - */ - sac_only_dev.dma_mask = 0xFFFFFFFFUL; +static int __init +acpi_sba_ioc_add(struct acpi_device *device) +{ + struct ioc *ioc; + acpi_status status; + u64 hpa, length; + struct acpi_device_info dev_info; /* - * We need to check for an AGP device, if we find one, then only - * use part of the IOVA space for PCI DMA, the rest is for GART. - * REVISIT for multiple IOC. + * Only SBA appears in ACPI namespace. It encloses the PCI + * root bridges, and its CSR space includes the IOC function. */ - pci_for_each_dev(device) - agp_found |= pci_find_capability(device, PCI_CAP_ID_AGP); + status = hp_acpi_csr_space(device->handle, &hpa, &length); + if (ACPI_FAILURE(status)) + return 1; - if (agp_found && reserve_sba_gart) - SBA_SET_AGP(sba_dev); + status = acpi_get_object_info(device->handle, &dev_info); + if (ACPI_FAILURE(status)) + return 1; - sba_hw_init(sba_dev); - sba_common_init(sba_dev); + if (strncmp("HWP0001", dev_info.hardware_id, 7) == 0) + hpa += ZX1_IOC_OFFSET; -#ifdef CONFIG_PROC_FS - { - struct proc_dir_entry * proc_mckinley_root; + ioc = ioc_init(hpa, device->handle); + if (!ioc) + return 1; - proc_mckinley_root = proc_mkdir("bus/mckinley",0); - create_proc_info_entry(sba_rev, 0, proc_mckinley_root, sba_proc_info); - create_proc_info_entry("bitmap", 0, proc_mckinley_root, sba_resource_map); - } + return 0; +} + +static struct acpi_driver acpi_sba_ioc_driver = { + name: "IOC IOMMU Driver", + ids: "HWP0001,HWP0004", + ops: { + add: acpi_sba_ioc_add, + }, +}; + +static int __init +sba_init(void) +{ + struct pci_bus *b; + MAX_DMA_ADDRESS = ~0UL; + + acpi_bus_register_driver(&acpi_sba_ioc_driver); + + pci_for_each_bus(b) + sba_connect_bus(b); + +#ifdef CONFIG_PROC_FS + sba_proc_init(); #endif + return 0; } +subsys_initcall(sba_init); /* must be initialized after ACPI etc., but before any drivers... */ + static int __init -nosbagart (char *str) +nosbagart(char *str) { reserve_sba_gart = 0; return 1; } -__setup("nosbagart",nosbagart); +int +sba_dma_supported (struct pci_dev *dev, u64 mask) +{ + /* make sure it's at least 32bit capable */ + return ((mask & 0xFFFFFFFFUL) == 0xFFFFFFFFUL); +} + +__setup("nosbagart", nosbagart); -EXPORT_SYMBOL(sba_init); EXPORT_SYMBOL(sba_map_single); EXPORT_SYMBOL(sba_unmap_single); EXPORT_SYMBOL(sba_map_sg); EXPORT_SYMBOL(sba_unmap_sg); -EXPORT_SYMBOL(sba_dma_address); EXPORT_SYMBOL(sba_dma_supported); EXPORT_SYMBOL(sba_alloc_consistent); EXPORT_SYMBOL(sba_free_consistent); diff -Nru a/arch/ia64/hp/zx1/Makefile b/arch/ia64/hp/zx1/Makefile --- a/arch/ia64/hp/zx1/Makefile Wed Apr 16 18:32:26 2003 +++ b/arch/ia64/hp/zx1/Makefile Wed Apr 16 18:32:26 2003 @@ -5,5 +5,4 @@ # Copyright (C) Alex Williamson (alex_williamson@hp.com) # -obj-y := hpzx1_misc.o obj-$(CONFIG_IA64_GENERIC) += hpzx1_machvec.o diff -Nru a/arch/ia64/hp/zx1/hpzx1_misc.c b/arch/ia64/hp/zx1/hpzx1_misc.c --- a/arch/ia64/hp/zx1/hpzx1_misc.c Wed Apr 16 18:32:26 2003 +++ /dev/null Wed Dec 31 16:00:00 1969 @@ -1,348 +0,0 @@ -/* - * Misc. support for HP zx1 chipset support - * - * Copyright (C) 2002-2003 Hewlett-Packard Co - * Alex Williamson - * Bjorn Helgaas - */ - - -#include -#include -#include -#include -#include -#include - -#include -#include - -extern acpi_status acpi_evaluate_integer (acpi_handle, acpi_string, struct acpi_object_list *, - unsigned long *); - -#define PFX "hpzx1: " - -static int hpzx1_devices; - -struct fake_pci_dev { - struct fake_pci_dev *next; - struct pci_dev *pci_dev; - unsigned long csr_base; - unsigned long csr_size; - unsigned long mapped_csrs; // ioremapped - int sizing; // in middle of BAR sizing operation? -} *fake_pci_dev_list; - -static struct pci_ops *orig_pci_ops; - -struct fake_pci_dev * -lookup_fake_dev (struct pci_bus *bus, unsigned int devfn) -{ - struct fake_pci_dev *fake_dev; - - for (fake_dev = fake_pci_dev_list; fake_dev; fake_dev = fake_dev->next) - if (fake_dev->pci_dev->bus == bus && fake_dev->pci_dev->devfn == devfn) - return fake_dev; - return NULL; -} - -static int -hp_cfg_read (struct pci_bus *bus, unsigned int devfn, int where, int size, u32 *value) -{ - struct fake_pci_dev *fake_dev = lookup_fake_dev(bus, devfn); - - if (!fake_dev) - return (*orig_pci_ops->read)(bus, devfn, where, size, value); - - if (where == PCI_BASE_ADDRESS_0) { - if (fake_dev->sizing) - *value = ~(fake_dev->csr_size - 1); - else - *value = ((fake_dev->csr_base & PCI_BASE_ADDRESS_MEM_MASK) - | PCI_BASE_ADDRESS_SPACE_MEMORY); - fake_dev->sizing = 0; - return PCIBIOS_SUCCESSFUL; - } - switch (size) { - case 1: *value = readb(fake_dev->mapped_csrs + where); break; - case 2: *value = readw(fake_dev->mapped_csrs + where); break; - case 4: *value = readl(fake_dev->mapped_csrs + where); break; - default: - printk(KERN_WARNING"hp_cfg_read: bad size = %d bytes", size); - break; - } - if (where == PCI_COMMAND) - *value |= PCI_COMMAND_MEMORY; /* SBA omits this */ - return PCIBIOS_SUCCESSFUL; -} - -static int -hp_cfg_write (struct pci_bus *bus, unsigned int devfn, int where, int size, u32 value) -{ - struct fake_pci_dev *fake_dev = lookup_fake_dev(bus, devfn); - - if (!fake_dev) - return (*orig_pci_ops->write)(bus, devfn, where, size, value); - - if (where == PCI_BASE_ADDRESS_0) { - if (value == ((1UL << 8*size) - 1)) - fake_dev->sizing = 1; - return PCIBIOS_SUCCESSFUL; - } - switch (size) { - case 1: writeb(value, fake_dev->mapped_csrs + where); break; - case 2: writew(value, fake_dev->mapped_csrs + where); break; - case 4: writel(value, fake_dev->mapped_csrs + where); break; - default: - printk(KERN_WARNING"hp_cfg_write: bad size = %d bytes", size); - break; - } - return PCIBIOS_SUCCESSFUL; -} - -static struct pci_ops hp_pci_conf = { - .read = hp_cfg_read, - .write = hp_cfg_write -}; - -static void -hpzx1_fake_pci_dev(char *name, unsigned int busnum, unsigned long addr, unsigned int size) -{ - struct fake_pci_dev *fake; - int slot, ret; - struct pci_dev *dev; - struct pci_bus *b, *bus = NULL; - u8 hdr; - - fake = kmalloc(sizeof(*fake), GFP_KERNEL); - if (!fake) { - printk(KERN_ERR PFX "No memory for %s (0x%p) sysdata\n", name, (void *) addr); - return; - } - - memset(fake, 0, sizeof(*fake)); - fake->csr_base = addr; - fake->csr_size = size; - fake->mapped_csrs = (unsigned long) ioremap(addr, size); - fake->sizing = 0; - - pci_for_each_bus(b) - if (busnum == b->number) { - bus = b; - break; - } - - if (!bus) { - printk(KERN_ERR PFX "No host bus 0x%02x for %s (0x%p)\n", - busnum, name, (void *) addr); - kfree(fake); - return; - } - - for (slot = 0x1e; slot; slot--) - if (!pci_find_slot(busnum, PCI_DEVFN(slot, 0))) - break; - - if (slot < 0) { - printk(KERN_ERR PFX "No space for %s (0x%p) on bus 0x%02x\n", - name, (void *) addr, busnum); - kfree(fake); - return; - } - - dev = kmalloc(sizeof(*dev), GFP_KERNEL); - if (!dev) { - printk(KERN_ERR PFX "No memory for %s (0x%p)\n", name, (void *) addr); - kfree(fake); - return; - } - - bus->ops = &hp_pci_conf; // replace pci ops for this bus - - fake->pci_dev = dev; - fake->next = fake_pci_dev_list; - fake_pci_dev_list = fake; - - memset(dev, 0, sizeof(*dev)); - dev->bus = bus; - dev->sysdata = fake; - dev->dev.parent = bus->dev; - dev->dev.bus = &pci_bus_type; - dev->devfn = PCI_DEVFN(slot, 0); - pci_read_config_word(dev, PCI_VENDOR_ID, &dev->vendor); - pci_read_config_word(dev, PCI_DEVICE_ID, &dev->device); - pci_read_config_byte(dev, PCI_HEADER_TYPE, &hdr); - dev->hdr_type = hdr & 0x7f; - - pci_setup_device(dev); - - // pci_insert_device() without running /sbin/hotplug - list_add_tail(&dev->bus_list, &bus->devices); - list_add_tail(&dev->global_list, &pci_devices); - - strcpy(dev->dev.bus_id, dev->slot_name); - ret = device_register(&dev->dev); - if (ret < 0) - printk(KERN_INFO PFX "fake device registration failed (%d)\n", ret); - - printk(KERN_INFO PFX "%s at 0x%lx; pci dev %s\n", name, addr, dev->slot_name); - - hpzx1_devices++; -} - -struct acpi_hp_vendor_long { - u8 guid_id; - u8 guid[16]; - u8 csr_base[8]; - u8 csr_length[8]; -}; - -#define HP_CCSR_LENGTH 0x21 -#define HP_CCSR_TYPE 0x2 -#define HP_CCSR_GUID EFI_GUID(0x69e9adf9, 0x924f, 0xab5f, \ - 0xf6, 0x4a, 0x24, 0xd2, 0x01, 0x37, 0x0e, 0xad) - -extern acpi_status acpi_get_crs(acpi_handle, struct acpi_buffer *); -extern struct acpi_resource *acpi_get_crs_next(struct acpi_buffer *, int *); -extern union acpi_resource_data *acpi_get_crs_type(struct acpi_buffer *, int *, int); -extern void acpi_dispose_crs(struct acpi_buffer *); - -static acpi_status -hp_csr_space(acpi_handle obj, u64 *csr_base, u64 *csr_length) -{ - int i, offset = 0; - acpi_status status; - struct acpi_buffer buf; - struct acpi_resource_vendor *res; - struct acpi_hp_vendor_long *hp_res; - efi_guid_t vendor_guid; - - *csr_base = 0; - *csr_length = 0; - - status = acpi_get_crs(obj, &buf); - if (ACPI_FAILURE(status)) { - printk(KERN_ERR PFX "Unable to get _CRS data on object\n"); - return status; - } - - res = (struct acpi_resource_vendor *)acpi_get_crs_type(&buf, &offset, ACPI_RSTYPE_VENDOR); - if (!res) { - printk(KERN_ERR PFX "Failed to find config space for device\n"); - acpi_dispose_crs(&buf); - return AE_NOT_FOUND; - } - - hp_res = (struct acpi_hp_vendor_long *)(res->reserved); - - if (res->length != HP_CCSR_LENGTH || hp_res->guid_id != HP_CCSR_TYPE) { - printk(KERN_ERR PFX "Unknown Vendor data\n"); - acpi_dispose_crs(&buf); - return AE_TYPE; /* Revisit error? */ - } - - memcpy(&vendor_guid, hp_res->guid, sizeof(efi_guid_t)); - if (efi_guidcmp(vendor_guid, HP_CCSR_GUID) != 0) { - printk(KERN_ERR PFX "Vendor GUID does not match\n"); - acpi_dispose_crs(&buf); - return AE_TYPE; /* Revisit error? */ - } - - for (i = 0 ; i < 8 ; i++) { - *csr_base |= ((u64)(hp_res->csr_base[i]) << (i * 8)); - *csr_length |= ((u64)(hp_res->csr_length[i]) << (i * 8)); - } - - acpi_dispose_crs(&buf); - - return AE_OK; -} - -static acpi_status -hpzx1_sba_probe(acpi_handle obj, u32 depth, void *context, void **ret) -{ - u64 csr_base = 0, csr_length = 0; - acpi_status status; - char *name = context; - char fullname[16]; - - status = hp_csr_space(obj, &csr_base, &csr_length); - if (ACPI_FAILURE(status)) - return status; - - /* - * Only SBA shows up in ACPI namespace, so its CSR space - * includes both SBA and IOC. Make SBA and IOC show up - * separately in PCI space. - */ - sprintf(fullname, "%s SBA", name); - hpzx1_fake_pci_dev(fullname, 0, csr_base, 0x1000); - sprintf(fullname, "%s IOC", name); - hpzx1_fake_pci_dev(fullname, 0, csr_base + 0x1000, 0x1000); - - return AE_OK; -} - -static acpi_status -hpzx1_lba_probe(acpi_handle obj, u32 depth, void *context, void **ret) -{ - u64 csr_base = 0, csr_length = 0; - acpi_status status; - acpi_native_uint busnum; - char *name = context; - char fullname[32]; - - status = hp_csr_space(obj, &csr_base, &csr_length); - if (ACPI_FAILURE(status)) - return status; - - status = acpi_evaluate_integer(obj, METHOD_NAME__BBN, NULL, &busnum); - if (ACPI_FAILURE(status)) { - printk(KERN_WARNING PFX "evaluate _BBN fail=0x%x\n", status); - busnum = 0; // no _BBN; stick it on bus 0 - } - - sprintf(fullname, "%s _BBN 0x%02x", name, (unsigned int) busnum); - hpzx1_fake_pci_dev(fullname, busnum, csr_base, csr_length); - - return AE_OK; -} - -static void -hpzx1_acpi_dev_init(void) -{ - extern struct pci_ops *pci_root_ops; - - orig_pci_ops = pci_root_ops; - - /* - * Make fake PCI devices for the following hardware in the - * ACPI namespace. This makes it more convenient for drivers - * because they can claim these devices based on PCI - * information, rather than needing to know about ACPI. The - * 64-bit "HPA" space for this hardware is available as BAR - * 0/1. - * - * HWP0001: Single IOC SBA w/o IOC in namespace - * HWP0002: LBA device - * HWP0003: AGP LBA device - */ - acpi_get_devices("HWP0001", hpzx1_sba_probe, "HWP0001", NULL); - acpi_get_devices("HWP0002", hpzx1_lba_probe, "HWP0002 PCI LBA", NULL); - acpi_get_devices("HWP0003", hpzx1_lba_probe, "HWP0003 AGP LBA", NULL); -} - -extern void sba_init(void); - -static int -hpzx1_init (void) -{ - /* zx1 has a hardware I/O TLB which lets us DMA from any device to any address */ - MAX_DMA_ADDRESS = ~0UL; - - hpzx1_acpi_dev_init(); - sba_init(); - return 0; -} - -subsys_initcall(hpzx1_init); diff -Nru a/arch/ia64/ia32/ia32_entry.S b/arch/ia64/ia32/ia32_entry.S --- a/arch/ia64/ia32/ia32_entry.S Wed Apr 16 18:32:26 2003 +++ b/arch/ia64/ia32/ia32_entry.S Wed Apr 16 18:32:26 2003 @@ -253,7 +253,7 @@ data8 sys_umount /* recycled never used phys( */ data8 sys32_ni_syscall /* old lock syscall holder */ data8 sys32_ioctl - data8 sys32_fcntl /* 55 */ + data8 compat_sys_fcntl /* 55 */ data8 sys32_ni_syscall /* old mpx syscall holder */ data8 sys_setpgid data8 sys32_ni_syscall /* old ulimit syscall holder */ @@ -419,7 +419,7 @@ data8 sys_mincore data8 sys_madvise data8 sys_getdents64 /* 220 */ - data8 sys32_fcntl64 + data8 compat_sys_fcntl64 data8 sys_ni_syscall /* reserved for TUX */ data8 sys_ni_syscall /* reserved for Security */ data8 sys_gettid diff -Nru a/arch/ia64/ia32/ia32_signal.c b/arch/ia64/ia32/ia32_signal.c --- a/arch/ia64/ia32/ia32_signal.c Wed Apr 16 18:32:25 2003 +++ b/arch/ia64/ia32/ia32_signal.c Wed Apr 16 18:32:25 2003 @@ -114,6 +114,7 @@ int copy_siginfo_to_user32 (siginfo_t32 *to, siginfo_t *from) { + unsigned int addr; int err; if (!access_ok(VERIFY_WRITE, to, sizeof(siginfo_t32))) @@ -147,6 +148,12 @@ case __SI_POLL >> 16: err |= __put_user(from->si_band, &to->si_band); err |= __put_user(from->si_fd, &to->si_fd); + break; + case __SI_TIMER >> 16: + err |= __put_user(from->si_tid, &to->si_tid); + err |= __put_user(from->si_overrun, &to->si_overrun); + addr = (unsigned long) from->si_ptr; + err |= __put_user(addr, &to->si_ptr); break; /* case __SI_RT: This is not generated by the kernel as of now. */ } diff -Nru a/arch/ia64/ia32/sys_ia32.c b/arch/ia64/ia32/sys_ia32.c --- a/arch/ia64/ia32/sys_ia32.c Wed Apr 16 18:32:26 2003 +++ b/arch/ia64/ia32/sys_ia32.c Wed Apr 16 18:32:26 2003 @@ -119,10 +119,8 @@ asmlinkage long sys32_execve (char *filename, unsigned int argv, unsigned int envp, - int dummy3, int dummy4, int dummy5, int dummy6, int dummy7, - int stack) + struct pt_regs *regs) { - struct pt_regs *regs = (struct pt_regs *)&stack; unsigned long old_map_base, old_task_size, tssd; char **av, **ae; int na, ne, len; @@ -245,8 +243,7 @@ return -ENOMEM; if (old_prot) - if (copy_from_user(page, (void *) PAGE_START(start), PAGE_SIZE)) - return -EFAULT; + copy_from_user(page, (void *) PAGE_START(start), PAGE_SIZE); down_write(¤t->mm->mmap_sem); { @@ -1701,7 +1698,7 @@ return shmctl32(first, second, (void *)AA(ptr)); default: - return -EINVAL; + return -ENOSYS; } return -EINVAL; } @@ -2156,26 +2153,23 @@ ret = -ESRCH; read_lock(&tasklist_lock); child = find_task_by_pid(pid); + if (child) + get_task_struct(child); read_unlock(&tasklist_lock); if (!child) goto out; ret = -EPERM; if (pid == 1) /* no messing around with init! */ - goto out; + goto out_tsk; if (request == PTRACE_ATTACH) { ret = sys_ptrace(request, pid, addr, data, arg4, arg5, arg6, arg7, stack); - goto out; - } - ret = -ESRCH; - if (!(child->ptrace & PT_PTRACED)) - goto out; - if (child->state != TASK_STOPPED) { - if (request != PTRACE_KILL) - goto out; + goto out_tsk; } - if (child->parent != current) - goto out; + + ret = ptrace_check_attach(child, request == PTRACE_KILL); + if (ret < 0) + goto out_tsk; switch (request) { case PTRACE_PEEKTEXT: @@ -2185,12 +2179,12 @@ ret = put_user(value, (unsigned int *) A(data)); else ret = -EIO; - goto out; + goto out_tsk; case PTRACE_POKETEXT: case PTRACE_POKEDATA: /* write the word at location addr */ ret = ia32_poke(regs, child, addr, data); - goto out; + goto out_tsk; case PTRACE_PEEKUSR: /* read word at addr in USER area */ ret = -EIO; @@ -2265,43 +2259,13 @@ break; } + out_tsk: + put_task_struct(child); out: unlock_kernel(); return ret; } -extern asmlinkage long sys_fcntl (unsigned int fd, unsigned int cmd, unsigned long arg); - -asmlinkage long -sys32_fcntl (unsigned int fd, unsigned int cmd, unsigned int arg) -{ - mm_segment_t old_fs; - struct flock f; - long ret; - - switch (cmd) { - case F_GETLK: - case F_SETLK: - case F_SETLKW: - if (get_compat_flock(&f, (struct compat_flock *) A(arg))) - return -EFAULT; - old_fs = get_fs(); - set_fs(KERNEL_DS); - ret = sys_fcntl(fd, cmd, (unsigned long) &f); - set_fs(old_fs); - if (cmd == F_GETLK && put_compat_flock(&f, (struct compat_flock *) A(arg))) - return -EFAULT; - return ret; - - default: - /* - * `sys_fcntl' lies about arg, for the F_SETOWN - * sub-function arg can have a negative value. - */ - return sys_fcntl(fd, cmd, arg); - } -} - asmlinkage long sys_ni_syscall(void); asmlinkage long @@ -2593,66 +2557,6 @@ set_fs(KERNEL_DS); ret = sys_setgroups(gidsetsize, gl); set_fs(old_fs); - return ret; -} - -/* - * Unfortunately, the x86 compiler aligns variables of type "long long" to a 4 byte boundary - * only, which means that the x86 version of "struct flock64" doesn't match the ia64 version - * of struct flock. - */ - -static inline long -ia32_put_flock (struct flock *l, unsigned long addr) -{ - return (put_user(l->l_type, (short *) addr) - | put_user(l->l_whence, (short *) (addr + 2)) - | put_user(l->l_start, (long *) (addr + 4)) - | put_user(l->l_len, (long *) (addr + 12)) - | put_user(l->l_pid, (int *) (addr + 20))); -} - -static inline long -ia32_get_flock (struct flock *l, unsigned long addr) -{ - unsigned int start_lo, start_hi, len_lo, len_hi; - int err = (get_user(l->l_type, (short *) addr) - | get_user(l->l_whence, (short *) (addr + 2)) - | get_user(start_lo, (int *) (addr + 4)) - | get_user(start_hi, (int *) (addr + 8)) - | get_user(len_lo, (int *) (addr + 12)) - | get_user(len_hi, (int *) (addr + 16)) - | get_user(l->l_pid, (int *) (addr + 20))); - l->l_start = ((unsigned long) start_hi << 32) | start_lo; - l->l_len = ((unsigned long) len_hi << 32) | len_lo; - return err; -} - -asmlinkage long -sys32_fcntl64 (unsigned int fd, unsigned int cmd, unsigned int arg) -{ - mm_segment_t old_fs; - struct flock f; - long ret; - - switch (cmd) { - case F_GETLK64: - case F_SETLK64: - case F_SETLKW64: - if (ia32_get_flock(&f, arg)) - return -EFAULT; - old_fs = get_fs(); - set_fs(KERNEL_DS); - ret = sys_fcntl(fd, cmd, (unsigned long) &f); - set_fs(old_fs); - if (cmd == F_GETLK && ia32_put_flock(&f, arg)) - return -EFAULT; - break; - - default: - ret = sys32_fcntl(fd, cmd, arg); - break; - } return ret; } diff -Nru a/arch/ia64/kernel/Makefile b/arch/ia64/kernel/Makefile --- a/arch/ia64/kernel/Makefile Wed Apr 16 18:32:26 2003 +++ b/arch/ia64/kernel/Makefile Wed Apr 16 18:32:26 2003 @@ -4,16 +4,17 @@ extra-y := head.o init_task.o -obj-y := acpi.o entry.o gate.o efi.o efi_stub.o ia64_ksyms.o \ - irq.o irq_ia64.o irq_lsapic.o ivt.o \ - machvec.o pal.o process.o perfmon.o ptrace.o sal.o \ - semaphore.o setup.o \ - signal.o sys_ia64.o traps.o time.o unaligned.o unwind.o +obj-y := acpi.o entry.o efi.o efi_stub.o gate.o ia64_ksyms.o irq.o irq_ia64.o irq_lsapic.o \ + ivt.o machvec.o pal.o perfmon.o process.o ptrace.o sal.o semaphore.o setup.o signal.o \ + sys_ia64.o time.o traps.o unaligned.o unwind.o -obj-$(CONFIG_FSYS) += fsys.o -obj-$(CONFIG_IOSAPIC) += iosapic.o -obj-$(CONFIG_IA64_PALINFO) += palinfo.o -obj-$(CONFIG_EFI_VARS) += efivars.o -obj-$(CONFIG_SMP) += smp.o smpboot.o -obj-$(CONFIG_IA64_MCA) += mca.o mca_asm.o -obj-$(CONFIG_IA64_BRL_EMU) += brl_emu.o +obj-$(CONFIG_EFI_VARS) += efivars.o +obj-$(CONFIG_FSYS) += fsys.o +obj-$(CONFIG_IA64_BRL_EMU) += brl_emu.o +obj-$(CONFIG_IA64_GENERIC) += acpi-ext.o +obj-$(CONFIG_IA64_HP_ZX1) += acpi-ext.o +obj-$(CONFIG_IA64_MCA) += mca.o mca_asm.o +obj-$(CONFIG_IA64_PALINFO) += palinfo.o +obj-$(CONFIG_IOSAPIC) += iosapic.o +obj-$(CONFIG_MODULES) += module.o +obj-$(CONFIG_SMP) += smp.o smpboot.o diff -Nru a/arch/ia64/kernel/acpi-ext.c b/arch/ia64/kernel/acpi-ext.c --- /dev/null Wed Dec 31 16:00:00 1969 +++ b/arch/ia64/kernel/acpi-ext.c Wed Apr 16 18:32:26 2003 @@ -0,0 +1,74 @@ +/* + * arch/ia64/kernel/acpi-ext.c + * + * Copyright (C) 2003 Hewlett-Packard + * Copyright (C) Alex Williamson + * + * Vendor specific extensions to ACPI. These are used by both + * HP and NEC. + */ + +#include +#include +#include +#include +#include + +#include + +/* + * Note: Strictly speaking, this is only needed for HP and NEC machines. + * However, NEC machines identify themselves as DIG-compliant, so there is + * no easy way to #ifdef this out. + */ +acpi_status +hp_acpi_csr_space (acpi_handle obj, u64 *csr_base, u64 *csr_length) +{ + int i, offset = 0; + acpi_status status; + struct acpi_buffer buf; + struct acpi_resource_vendor *res; + struct acpi_hp_vendor_long *hp_res; + efi_guid_t vendor_guid; + + *csr_base = 0; + *csr_length = 0; + + status = acpi_get_crs(obj, &buf); + if (ACPI_FAILURE(status)) { + printk(KERN_ERR PREFIX "Unable to get _CRS data on object\n"); + return status; + } + + res = (struct acpi_resource_vendor *)acpi_get_crs_type(&buf, &offset, ACPI_RSTYPE_VENDOR); + if (!res) { + printk(KERN_ERR PREFIX "Failed to find config space for device\n"); + acpi_dispose_crs(&buf); + return AE_NOT_FOUND; + } + + hp_res = (struct acpi_hp_vendor_long *)(res->reserved); + + if (res->length != HP_CCSR_LENGTH || hp_res->guid_id != HP_CCSR_TYPE) { + printk(KERN_ERR PREFIX "Unknown Vendor data\n"); + acpi_dispose_crs(&buf); + return AE_TYPE; /* Revisit error? */ + } + + memcpy(&vendor_guid, hp_res->guid, sizeof(efi_guid_t)); + if (efi_guidcmp(vendor_guid, HP_CCSR_GUID) != 0) { + printk(KERN_ERR PREFIX "Vendor GUID does not match\n"); + acpi_dispose_crs(&buf); + return AE_TYPE; /* Revisit error? */ + } + + for (i = 0 ; i < 8 ; i++) { + *csr_base |= ((u64)(hp_res->csr_base[i]) << (i * 8)); + *csr_length |= ((u64)(hp_res->csr_length[i]) << (i * 8)); + } + + acpi_dispose_crs(&buf); + return AE_OK; +} + +EXPORT_SYMBOL(hp_acpi_csr_space); diff -Nru a/arch/ia64/kernel/acpi.c b/arch/ia64/kernel/acpi.c --- a/arch/ia64/kernel/acpi.c Wed Apr 16 18:32:26 2003 +++ b/arch/ia64/kernel/acpi.c Wed Apr 16 18:32:26 2003 @@ -9,7 +9,7 @@ * Copyright (C) 2000,2001 J.I. Lee * Copyright (C) 2001 Paul Diefenbaugh * Copyright (C) 2001 Jenna Hall - * Copyright (C) 2001 Takayoshi Kochi + * Copyright (C) 2001 Takayoshi Kochi * Copyright (C) 2002 Erich Focht * * ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ @@ -109,8 +109,6 @@ return "sn2"; # elif defined (CONFIG_IA64_DIG) return "dig"; -# elif defined (CONFIG_IA64_HP_ZX1) - return "hpzx1"; # else # error Unknown platform. Fix acpi.c. # endif @@ -154,6 +152,10 @@ return NULL; res = buf->pointer + *offset; + + if (res->length <= 0) + return NULL; + *offset += res->length; return res; } @@ -176,6 +178,73 @@ kfree(buf->pointer); } +void +acpi_get_crs_addr (struct acpi_buffer *buf, int type, u64 *base, u64 *size, u64 *tra) +{ + int offset = 0; + struct acpi_resource_address16 *addr16; + struct acpi_resource_address32 *addr32; + struct acpi_resource_address64 *addr64; + + for (;;) { + struct acpi_resource *res = acpi_get_crs_next(buf, &offset); + if (!res) + return; + switch (res->id) { + case ACPI_RSTYPE_ADDRESS16: + addr16 = (struct acpi_resource_address16 *) &res->data; + + if (type == addr16->resource_type) { + *base = addr16->min_address_range; + *size = addr16->address_length; + *tra = addr16->address_translation_offset; + return; + } + break; + case ACPI_RSTYPE_ADDRESS32: + addr32 = (struct acpi_resource_address32 *) &res->data; + if (type == addr32->resource_type) { + *base = addr32->min_address_range; + *size = addr32->address_length; + *tra = addr32->address_translation_offset; + return; + } + break; + case ACPI_RSTYPE_ADDRESS64: + addr64 = (struct acpi_resource_address64 *) &res->data; + if (type == addr64->resource_type) { + *base = addr64->min_address_range; + *size = addr64->address_length; + *tra = addr64->address_translation_offset; + return; + } + break; + } + } +} + +int +acpi_get_addr_space(void *obj, u8 type, u64 *base, u64 *length, u64 *tra) +{ + acpi_status status; + struct acpi_buffer buf; + + *base = 0; + *length = 0; + *tra = 0; + + status = acpi_get_crs((acpi_handle)obj, &buf); + if (ACPI_FAILURE(status)) { + printk(KERN_ERR PREFIX "Unable to get _CRS data on object\n"); + return status; + } + + acpi_get_crs_addr(&buf, type, base, length, tra); + + acpi_dispose_crs(&buf); + + return AE_OK; +} #endif /* CONFIG_ACPI */ #ifdef CONFIG_ACPI_BOOT @@ -808,6 +877,7 @@ list_for_each(node, &acpi_prt.entries) { entry = (struct acpi_prt_entry *)node; + vector[i].segment = entry->id.segment; vector[i].bus = entry->id.bus; vector[i].pci_id = ((u32) entry->id.device << 16) | 0xffff; vector[i].pin = entry->pin; diff -Nru a/arch/ia64/kernel/brl_emu.c b/arch/ia64/kernel/brl_emu.c --- a/arch/ia64/kernel/brl_emu.c Wed Apr 16 18:32:26 2003 +++ b/arch/ia64/kernel/brl_emu.c Wed Apr 16 18:32:26 2003 @@ -59,7 +59,7 @@ unsigned long next_ip; struct siginfo siginfo; struct illegal_op_return rv; - int tmp_taken, unimplemented_address; + long tmp_taken, unimplemented_address; rv.fkt = (unsigned long) -1; diff -Nru a/arch/ia64/kernel/entry.S b/arch/ia64/kernel/entry.S --- a/arch/ia64/kernel/entry.S Wed Apr 16 18:32:26 2003 +++ b/arch/ia64/kernel/entry.S Wed Apr 16 18:32:26 2003 @@ -91,7 +91,7 @@ END(ia64_execve) /* - * sys_clone2(u64 flags, u64 ustack_base, u64 ustack_size, u64 child_tidptr, u64 parent_tidptr, + * sys_clone2(u64 flags, u64 ustack_base, u64 ustack_size, u64 parent_tidptr, u64 child_tidptr, * u64 tls) */ GLOBAL_ENTRY(sys_clone2) @@ -105,10 +105,10 @@ mov out1=in1 mov out3=in2 tbit.nz p6,p0=in0,CLONE_SETTLS_BIT - mov out4=in3 // child_tidptr: valid only w/CLONE_CHILD_SETTID or CLONE_CHILD_CLEARTID + mov out4=in3 // parent_tidptr: valid only w/CLONE_PARENT_SETTID ;; (p6) st8 [r2]=in5 // store TLS in r16 for copy_thread() - mov out5=in4 // parent_tidptr: valid only w/CLONE_PARENT_SETTID + mov out5=in4 // child_tidptr: valid only w/CLONE_CHILD_SETTID or CLONE_CHILD_CLEARTID adds out2=IA64_SWITCH_STACK_SIZE+16,sp // out2 = ®s dep out0=0,in0,CLONE_IDLETASK_BIT,1 // out0 = clone_flags & ~CLONE_IDLETASK br.call.sptk.many rp=do_fork @@ -126,12 +126,12 @@ END(sys_clone2) /* - * sys_clone(u64 flags, u64 ustack_base, u64 user_tid, u64 tls) + * sys_clone(u64 flags, u64 ustack_base, u64 parent_tidptr, u64 child_tidptr, u64 tls) * Deprecated. Use sys_clone2() instead. */ GLOBAL_ENTRY(sys_clone) .prologue ASM_UNW_PRLG_RP|ASM_UNW_PRLG_PFS, ASM_UNW_PRLG_GRSAVE(2) - alloc r16=ar.pfs,4,2,5,0 + alloc r16=ar.pfs,5,2,6,0 DO_SAVE_SWITCH_STACK adds r2=PT(R16)+IA64_SWITCH_STACK_SIZE+16,sp mov loc0=rp @@ -140,9 +140,10 @@ mov out1=in1 mov out3=16 // stacksize (compensates for 16-byte scratch area) tbit.nz p6,p0=in0,CLONE_SETTLS_BIT - mov out4=in2 // out4 = user_tid (optional) + mov out4=in2 // parent_tidptr: valid only w/CLONE_PARENT_SETTID ;; -(p6) st8 [r2]=in3 // store TLS in r13 (tp) +(p6) st8 [r2]=in4 // store TLS in r13 (tp) + mov out5=in3 // child_tidptr: valid only w/CLONE_CHILD_SETTID or CLONE_CHILD_CLEARTID adds out2=IA64_SWITCH_STACK_SIZE+16,sp // out2 = ®s dep out0=0,in0,CLONE_IDLETASK_BIT,1 // out0 = clone_flags & ~CLONE_IDLETASK br.call.sptk.many rp=do_fork diff -Nru a/arch/ia64/kernel/fsys.S b/arch/ia64/kernel/fsys.S --- a/arch/ia64/kernel/fsys.S Wed Apr 16 18:32:25 2003 +++ b/arch/ia64/kernel/fsys.S Wed Apr 16 18:32:25 2003 @@ -533,15 +533,15 @@ data8 fsys_fallback_syscall // epoll_wait // 1245 data8 fsys_fallback_syscall // restart_syscall data8 fsys_fallback_syscall // semtimedop - data8 fsys_fallback_syscall - data8 fsys_fallback_syscall - data8 fsys_fallback_syscall // 1250 - data8 fsys_fallback_syscall - data8 fsys_fallback_syscall - data8 fsys_fallback_syscall - data8 fsys_fallback_syscall - data8 fsys_fallback_syscall // 1255 - data8 fsys_fallback_syscall + data8 fsys_fallback_syscall // timer_create + data8 fsys_fallback_syscall // timer_settime + data8 fsys_fallback_syscall // timer_gettime // 1250 + data8 fsys_fallback_syscall // timer_getoverrun + data8 fsys_fallback_syscall // timer_delete + data8 fsys_fallback_syscall // clock_settime + data8 fsys_fallback_syscall // clock_gettime + data8 fsys_fallback_syscall // clock_getres // 1255 + data8 fsys_fallback_syscall // clock_nanosleep data8 fsys_fallback_syscall data8 fsys_fallback_syscall data8 fsys_fallback_syscall diff -Nru a/arch/ia64/kernel/head.S b/arch/ia64/kernel/head.S --- a/arch/ia64/kernel/head.S Wed Apr 16 18:32:26 2003 +++ b/arch/ia64/kernel/head.S Wed Apr 16 18:32:26 2003 @@ -733,73 +733,3 @@ SET_REG(b5); #endif /* CONFIG_IA64_BRL_EMU */ - -#ifdef CONFIG_SMP - - /* - * This routine handles spinlock contention. It uses a simple exponential backoff - * algorithm to reduce unnecessary bus traffic. The initial delay is selected from - * the low-order bits of the cycle counter (a cheap "randomizer"). I'm sure this - * could use additional tuning, especially on systems with a large number of CPUs. - * Also, I think the maximum delay should be made a function of the number of CPUs in - * the system. --davidm 00/08/05 - * - * WARNING: This is not a normal procedure. It gets called from C code without - * the compiler knowing about it. Thus, we must not use any scratch registers - * beyond those that were declared "clobbered" at the call-site (see spin_lock() - * macro). We may not even use the stacked registers, because that could overwrite - * output registers. Similarly, we can't use the scratch stack area as it may be - * in use, too. - * - * Inputs: - * ar.ccv = 0 (and available for use) - * r28 = available for use - * r29 = available for use - * r30 = non-zero (and available for use) - * r31 = address of lock we're trying to acquire - * p15 = available for use - */ - -# define delay r28 -# define timeout r29 -# define tmp r30 - -GLOBAL_ENTRY(ia64_spinlock_contention) - mov tmp=ar.itc - ;; - and delay=0x3f,tmp - ;; - -.retry: add timeout=tmp,delay - shl delay=delay,1 - ;; - dep delay=delay,r0,0,13 // limit delay to 8192 cycles - ;; - // delay a little... -.wait: sub tmp=tmp,timeout - or delay=0xf,delay // make sure delay is non-zero (otherwise we get stuck with 0) - ;; - cmp.lt p15,p0=tmp,r0 - mov tmp=ar.itc -(p15) br.cond.sptk .wait - ;; - ld4 tmp=[r31] - ;; - cmp.ne p15,p0=tmp,r0 - mov tmp=ar.itc -(p15) br.cond.sptk .retry // lock is still busy - ;; - // try acquiring lock (we know ar.ccv is still zero!): - mov tmp=1 - ;; - cmpxchg4.acq tmp=[r31],tmp,ar.ccv - ;; - cmp.eq p15,p0=tmp,r0 - - mov tmp=ar.itc -(p15) br.ret.sptk.many b7 // got lock -> return - br .retry // still no luck, retry - -END(ia64_spinlock_contention) - -#endif diff -Nru a/arch/ia64/kernel/ia64_ksyms.c b/arch/ia64/kernel/ia64_ksyms.c --- a/arch/ia64/kernel/ia64_ksyms.c Wed Apr 16 18:32:26 2003 +++ b/arch/ia64/kernel/ia64_ksyms.c Wed Apr 16 18:32:26 2003 @@ -56,10 +56,14 @@ #include EXPORT_SYMBOL(clear_page); +#ifdef CONFIG_VIRTUAL_MEM_MAP +#include +EXPORT_SYMBOL(vmalloc_end); +EXPORT_SYMBOL(ia64_pfn_valid); +#endif + #include -# ifndef CONFIG_NUMA EXPORT_SYMBOL(cpu_info__per_cpu); -# endif EXPORT_SYMBOL(kernel_thread); #include @@ -147,3 +151,19 @@ EXPORT_SYMBOL(pfm_install_alternate_syswide_subsystem); EXPORT_SYMBOL(pfm_remove_alternate_syswide_subsystem); #endif + +#ifdef CONFIG_NUMA +#include +EXPORT_SYMBOL(cpu_to_node_map); +#endif + +#include +EXPORT_SYMBOL(unw_init_from_blocked_task); +EXPORT_SYMBOL(unw_init_running); +EXPORT_SYMBOL(unw_unwind); +EXPORT_SYMBOL(unw_unwind_to_user); +EXPORT_SYMBOL(unw_access_gr); +EXPORT_SYMBOL(unw_access_br); +EXPORT_SYMBOL(unw_access_fr); +EXPORT_SYMBOL(unw_access_ar); +EXPORT_SYMBOL(unw_access_pr); diff -Nru a/arch/ia64/kernel/iosapic.c b/arch/ia64/kernel/iosapic.c --- a/arch/ia64/kernel/iosapic.c Wed Apr 16 18:32:26 2003 +++ b/arch/ia64/kernel/iosapic.c Wed Apr 16 18:32:26 2003 @@ -581,9 +581,8 @@ register_intr(gsi, vector, IOSAPIC_LOWEST_PRIORITY, polarity, trigger); DBG("ISA: IRQ %u -> GSI 0x%x (%s,%s) -> CPU 0x%04x vector %d\n", - isa_irq, gsi, - polarity == IOSAPIC_POL_HIGH ? "high" : "low", trigger == IOSAPIC_EDGE ? "edge" : "level", - dest, vector); + isa_irq, gsi, polarity == IOSAPIC_POL_HIGH ? "high" : "low", + trigger == IOSAPIC_EDGE ? "edge" : "level", dest, vector); /* program the IOSAPIC routing table */ set_rte(vector, dest); @@ -635,7 +634,6 @@ (ver & 0xf0) >> 4, (ver & 0x0f), phys_addr, gsi_base, gsi_base + num_rte - 1); if ((gsi_base == 0) && pcat_compat) { - /* * Map the legacy ISA devices into the IOSAPIC data. Some of these may * get reprogrammed later on with data from the ACPI Interrupt Source @@ -711,6 +709,9 @@ vector = gsi_to_vector(gsi); if (vector < 0) { + if (find_iosapic(gsi) < 0) + continue; + /* allocate a vector for this interrupt line */ if (pcat_compat && (gsi < 16)) vector = isa_irq_to_vector(gsi); diff -Nru a/arch/ia64/kernel/mca.c b/arch/ia64/kernel/mca.c --- a/arch/ia64/kernel/mca.c Wed Apr 16 18:32:26 2003 +++ b/arch/ia64/kernel/mca.c Wed Apr 16 18:32:26 2003 @@ -3,6 +3,9 @@ * Purpose: Generic MCA handling layer * * Updated for latest kernel + * Copyright (C) 2003 Hewlett-Packard Co + * David Mosberger-Tang + * * Copyright (C) 2002 Dell Computer Corporation * Copyright (C) Matt Domsch (Matt_Domsch@dell.com) * @@ -18,6 +21,7 @@ * Copyright (C) 1999 Silicon Graphics, Inc. * Copyright (C) Vijay Chander(vijay@engr.sgi.com) * + * 03/04/15 D. Mosberger Added INIT backtrace support. * 02/03/25 M. Domsch GUID cleanups * * 02/01/04 J. Hall Aligned MCA stack to 16 bytes, added platform vs. CPU @@ -39,10 +43,16 @@ #include #include #include +#include #include #include #include +#include +#include +#include +#include +#include #include #include #include @@ -67,7 +77,7 @@ u64 ia64_mca_stack[1024] __attribute__((aligned(16))); u64 ia64_mca_stackframe[32]; u64 ia64_mca_bspstore[1024]; -u64 ia64_init_stack[KERNEL_STACK_SIZE] __attribute__((aligned(16))); +u64 ia64_init_stack[KERNEL_STACK_SIZE/8] __attribute__((aligned(16))); u64 ia64_mca_sal_data_area[1356]; u64 ia64_tlb_functional; u64 ia64_os_mca_recovery_successful; @@ -105,6 +115,19 @@ .name = "cpe_hndlr" }; +#define MAX_CPE_POLL_INTERVAL (15*60*HZ) /* 15 minutes */ +#define MIN_CPE_POLL_INTERVAL (2*60*HZ) /* 2 minutes */ +#define CMC_POLL_INTERVAL (1*60*HZ) /* 1 minute */ +#define CMC_HISTORY_LENGTH 5 + +static struct timer_list cpe_poll_timer; +static struct timer_list cmc_poll_timer; +/* + * Start with this in the wrong state so we won't play w/ timers + * before the system is ready. + */ +static int cmc_polling_enabled = 1; + /* * ia64_mca_log_sal_error_record * @@ -122,7 +145,7 @@ /* Get the MCA error record */ if (!ia64_log_get(sal_info_type, (prfunc_t)printk)) - return platform_err; // no record retrieved + return platform_err; /* no record retrieved */ /* TODO: * 1. analyze error logs to determine recoverability @@ -152,24 +175,175 @@ void ia64_mca_cpe_int_handler (int cpe_irq, void *arg, struct pt_regs *ptregs) { - IA64_MCA_DEBUG("ia64_mca_cpe_int_handler: received interrupt. vector = %#x\n", cpe_irq); + IA64_MCA_DEBUG("ia64_mca_cpe_int_handler: received interrupt. CPU:%d vector = %#x\n", + smp_processor_id(), cpe_irq); /* Get the CMC error record and log it */ ia64_mca_log_sal_error_record(SAL_INFO_TYPE_CPE, 0); } -/* - * This routine will be used to deal with platform specific handling - * of the init, i.e. drop into the kernel debugger on server machine, - * or if the processor is part of some parallel machine without a - * console, then we would call the appropriate debug hooks here. - */ +static void +show_min_state (pal_min_state_area_t *minstate) +{ + u64 iip = minstate->pmsa_iip + ((struct ia64_psr *)(&minstate->pmsa_ipsr))->ri; + u64 xip = minstate->pmsa_xip + ((struct ia64_psr *)(&minstate->pmsa_xpsr))->ri; + + printk("NaT bits\t%016lx\n", minstate->pmsa_nat_bits); + printk("pr\t\t%016lx\n", minstate->pmsa_pr); + printk("b0\t\t%016lx ", minstate->pmsa_br0); print_symbol("%s\n", minstate->pmsa_br0); + printk("ar.rsc\t\t%016lx\n", minstate->pmsa_rsc); + printk("cr.iip\t\t%016lx ", iip); print_symbol("%s\n", iip); + printk("cr.ipsr\t\t%016lx\n", minstate->pmsa_ipsr); + printk("cr.ifs\t\t%016lx\n", minstate->pmsa_ifs); + printk("xip\t\t%016lx ", xip); print_symbol("%s\n", xip); + printk("xpsr\t\t%016lx\n", minstate->pmsa_xpsr); + printk("xfs\t\t%016lx\n", minstate->pmsa_xfs); + printk("b1\t\t%016lx ", minstate->pmsa_br1); + print_symbol("%s\n", minstate->pmsa_br1); + + printk("\nstatic registers r0-r15:\n"); + printk(" r0- 3 %016lx %016lx %016lx %016lx\n", + 0UL, minstate->pmsa_gr[0], minstate->pmsa_gr[1], minstate->pmsa_gr[2]); + printk(" r4- 7 %016lx %016lx %016lx %016lx\n", + minstate->pmsa_gr[3], minstate->pmsa_gr[4], + minstate->pmsa_gr[5], minstate->pmsa_gr[6]); + printk(" r8-11 %016lx %016lx %016lx %016lx\n", + minstate->pmsa_gr[7], minstate->pmsa_gr[8], + minstate->pmsa_gr[9], minstate->pmsa_gr[10]); + printk("r11-15 %016lx %016lx %016lx %016lx\n", + minstate->pmsa_gr[11], minstate->pmsa_gr[12], + minstate->pmsa_gr[13], minstate->pmsa_gr[14]); + + printk("\nbank 0:\n"); + printk("r16-19 %016lx %016lx %016lx %016lx\n", + minstate->pmsa_bank0_gr[0], minstate->pmsa_bank0_gr[1], + minstate->pmsa_bank0_gr[2], minstate->pmsa_bank0_gr[3]); + printk("r20-23 %016lx %016lx %016lx %016lx\n", + minstate->pmsa_bank0_gr[4], minstate->pmsa_bank0_gr[5], + minstate->pmsa_bank0_gr[6], minstate->pmsa_bank0_gr[7]); + printk("r24-27 %016lx %016lx %016lx %016lx\n", + minstate->pmsa_bank0_gr[8], minstate->pmsa_bank0_gr[9], + minstate->pmsa_bank0_gr[10], minstate->pmsa_bank0_gr[11]); + printk("r28-31 %016lx %016lx %016lx %016lx\n", + minstate->pmsa_bank0_gr[12], minstate->pmsa_bank0_gr[13], + minstate->pmsa_bank0_gr[14], minstate->pmsa_bank0_gr[15]); + + printk("\nbank 1:\n"); + printk("r16-19 %016lx %016lx %016lx %016lx\n", + minstate->pmsa_bank1_gr[0], minstate->pmsa_bank1_gr[1], + minstate->pmsa_bank1_gr[2], minstate->pmsa_bank1_gr[3]); + printk("r20-23 %016lx %016lx %016lx %016lx\n", + minstate->pmsa_bank1_gr[4], minstate->pmsa_bank1_gr[5], + minstate->pmsa_bank1_gr[6], minstate->pmsa_bank1_gr[7]); + printk("r24-27 %016lx %016lx %016lx %016lx\n", + minstate->pmsa_bank1_gr[8], minstate->pmsa_bank1_gr[9], + minstate->pmsa_bank1_gr[10], minstate->pmsa_bank1_gr[11]); + printk("r28-31 %016lx %016lx %016lx %016lx\n", + minstate->pmsa_bank1_gr[12], minstate->pmsa_bank1_gr[13], + minstate->pmsa_bank1_gr[14], minstate->pmsa_bank1_gr[15]); +} + +static void +fetch_min_state (pal_min_state_area_t *ms, struct pt_regs *pt, struct switch_stack *sw) +{ + u64 *dst_banked, *src_banked, bit, shift, nat_bits; + int i; + + /* + * First, update the pt-regs and switch-stack structures with the contents stored + * in the min-state area: + */ + if (((struct ia64_psr *) &ms->pmsa_ipsr)->ic == 0) { + pt->cr_ipsr = ms->pmsa_xpsr; + pt->cr_iip = ms->pmsa_xip; + pt->cr_ifs = ms->pmsa_xfs; + } else { + pt->cr_ipsr = ms->pmsa_ipsr; + pt->cr_iip = ms->pmsa_iip; + pt->cr_ifs = ms->pmsa_ifs; + } + pt->ar_rsc = ms->pmsa_rsc; + pt->pr = ms->pmsa_pr; + pt->r1 = ms->pmsa_gr[0]; + pt->r2 = ms->pmsa_gr[1]; + pt->r3 = ms->pmsa_gr[2]; + sw->r4 = ms->pmsa_gr[3]; + sw->r5 = ms->pmsa_gr[4]; + sw->r6 = ms->pmsa_gr[5]; + sw->r7 = ms->pmsa_gr[6]; + pt->r8 = ms->pmsa_gr[7]; + pt->r9 = ms->pmsa_gr[8]; + pt->r10 = ms->pmsa_gr[9]; + pt->r11 = ms->pmsa_gr[10]; + pt->r12 = ms->pmsa_gr[11]; + pt->r13 = ms->pmsa_gr[12]; + pt->r14 = ms->pmsa_gr[13]; + pt->r15 = ms->pmsa_gr[14]; + dst_banked = &pt->r16; /* r16-r31 are contiguous in struct pt_regs */ + src_banked = ms->pmsa_bank1_gr; + for (i = 0; i < 16; ++i) + *dst_banked = *src_banked; + pt->b0 = ms->pmsa_br0; + sw->b1 = ms->pmsa_br1; + + /* construct the NaT bits for the pt-regs structure: */ +# define PUT_NAT_BIT(dst, addr) \ + do { \ + bit = nat_bits & 1; nat_bits >>= 1; \ + shift = ((unsigned long) addr >> 3) & 0x3f; \ + dst = ((dst) & ~(1UL << shift)) | (bit << shift); \ + } while (0) + + /* Rotate the saved NaT bits such that bit 0 corresponds to pmsa_gr[0]: */ + shift = ((unsigned long) &ms->pmsa_gr[0] >> 3) & 0x3f; + nat_bits = (ms->pmsa_nat_bits >> shift) | (ms->pmsa_nat_bits << (64 - shift)); + + PUT_NAT_BIT(sw->caller_unat, &pt->r1); + PUT_NAT_BIT(sw->caller_unat, &pt->r2); + PUT_NAT_BIT(sw->caller_unat, &pt->r3); + PUT_NAT_BIT(sw->ar_unat, &sw->r4); + PUT_NAT_BIT(sw->ar_unat, &sw->r5); + PUT_NAT_BIT(sw->ar_unat, &sw->r6); + PUT_NAT_BIT(sw->ar_unat, &sw->r7); + PUT_NAT_BIT(sw->caller_unat, &pt->r8); PUT_NAT_BIT(sw->caller_unat, &pt->r9); + PUT_NAT_BIT(sw->caller_unat, &pt->r10); PUT_NAT_BIT(sw->caller_unat, &pt->r11); + PUT_NAT_BIT(sw->caller_unat, &pt->r12); PUT_NAT_BIT(sw->caller_unat, &pt->r13); + PUT_NAT_BIT(sw->caller_unat, &pt->r14); PUT_NAT_BIT(sw->caller_unat, &pt->r15); + nat_bits >>= 16; /* skip over bank0 NaT bits */ + PUT_NAT_BIT(sw->caller_unat, &pt->r16); PUT_NAT_BIT(sw->caller_unat, &pt->r17); + PUT_NAT_BIT(sw->caller_unat, &pt->r18); PUT_NAT_BIT(sw->caller_unat, &pt->r19); + PUT_NAT_BIT(sw->caller_unat, &pt->r20); PUT_NAT_BIT(sw->caller_unat, &pt->r21); + PUT_NAT_BIT(sw->caller_unat, &pt->r22); PUT_NAT_BIT(sw->caller_unat, &pt->r23); + PUT_NAT_BIT(sw->caller_unat, &pt->r24); PUT_NAT_BIT(sw->caller_unat, &pt->r25); + PUT_NAT_BIT(sw->caller_unat, &pt->r26); PUT_NAT_BIT(sw->caller_unat, &pt->r27); + PUT_NAT_BIT(sw->caller_unat, &pt->r28); PUT_NAT_BIT(sw->caller_unat, &pt->r29); + PUT_NAT_BIT(sw->caller_unat, &pt->r30); PUT_NAT_BIT(sw->caller_unat, &pt->r31); +} + void -init_handler_platform (struct pt_regs *regs) +init_handler_platform (sal_log_processor_info_t *proc_ptr, + struct pt_regs *pt, struct switch_stack *sw) { + struct unw_frame_info info; + /* if a kernel debugger is available call it here else just dump the registers */ - show_regs(regs); /* dump the state info */ + /* + * Wait for a bit. On some machines (e.g., HP's zx2000 and zx6000, INIT can be + * generated via the BMC's command-line interface, but since the console is on the + * same serial line, the user will need some time to switch out of the BMC before + * the dump begins. + */ + printk("Delaying for 5 seconds...\n"); + udelay(5*1000000); + show_min_state(&SAL_LPI_PSI_INFO(proc_ptr)->min_state_area); + + fetch_min_state(&SAL_LPI_PSI_INFO(proc_ptr)->min_state_area, pt, sw); + + unw_init_from_interruption(&info, current, pt, sw); + ia64_do_show_stack(&info, NULL); + + printk("\nINIT dump complete. Please reboot now.\n"); while (1); /* hang city if no debugger */ } @@ -245,7 +419,6 @@ /* * routine to process and prepare to dump min_state_save * information for debugging purposes. - * */ void ia64_process_min_state_save (pal_min_state_area_t *pmss) @@ -254,8 +427,6 @@ u64 *tpmss_ptr = (u64 *)pmss; u64 *return_min_state_ptr = ia64_mca_min_state_save_info; - /* dump out the min_state_area information */ - for (i=0;i= CMC_HISTORY_LENGTH) { + /* + * CMC threshold exceeded, clear the history + * so we have a fresh start when we return + */ + for (index = 0 ; index < CMC_HISTORY_LENGTH; index++) + cmc_history[index] = 0; + index = 0; + + /* Switch to polling mode */ + cmc_polling_enabled = 1; + + /* + * Unlock & enable interrupts before + * smp_call_function or risk deadlock + */ + spin_unlock(&cmc_history_lock); + ia64_mca_cmc_vector_disable(NULL); + + local_irq_enable(); + smp_call_function(ia64_mca_cmc_vector_disable, NULL, 1, 1); + + /* + * Corrected errors will still be corrected, but + * make sure there's a log somewhere that indicates + * something is generating more than we can handle. + */ + printk(KERN_WARNING "ia64_mca_cmc_int_handler: WARNING: Switching to polling CMC handler, error records may be lost\n"); + + + mod_timer(&cmc_poll_timer, jiffies + CMC_POLL_INTERVAL); + + /* lock already released, get out now */ + return; + } else { + cmc_history[index++] = now; + if (index == CMC_HISTORY_LENGTH) + index = 0; + } + } + spin_unlock(&cmc_history_lock); } /* @@ -768,6 +1045,7 @@ { spinlock_t isl_lock; int isl_index; + unsigned long isl_count; ia64_err_rec_t *isl_log[IA64_MAX_LOGS]; /* need space to store header + error log */ } ia64_state_log_t; @@ -784,11 +1062,145 @@ #define IA64_LOG_NEXT_INDEX(it) ia64_state_log[it].isl_index #define IA64_LOG_CURR_INDEX(it) 1 - ia64_state_log[it].isl_index #define IA64_LOG_INDEX_INC(it) \ - ia64_state_log[it].isl_index = 1 - ia64_state_log[it].isl_index + {ia64_state_log[it].isl_index = 1 - ia64_state_log[it].isl_index; \ + ia64_state_log[it].isl_count++;} #define IA64_LOG_INDEX_DEC(it) \ ia64_state_log[it].isl_index = 1 - ia64_state_log[it].isl_index #define IA64_LOG_NEXT_BUFFER(it) (void *)((ia64_state_log[it].isl_log[IA64_LOG_NEXT_INDEX(it)])) #define IA64_LOG_CURR_BUFFER(it) (void *)((ia64_state_log[it].isl_log[IA64_LOG_CURR_INDEX(it)])) +#define IA64_LOG_COUNT(it) ia64_state_log[it].isl_count + +/* + * ia64_mca_cmc_int_caller + * + * Call CMC interrupt handler, only purpose is to have a + * smp_call_function callable entry. + * + * Inputs : dummy(unused) + * Outputs : None + * */ +static void +ia64_mca_cmc_int_caller(void *dummy) +{ + ia64_mca_cmc_int_handler(0, NULL, NULL); +} + +/* + * ia64_mca_cmc_poll + * + * Poll for Corrected Machine Checks (CMCs) + * + * Inputs : dummy(unused) + * Outputs : None + * + */ +static void +ia64_mca_cmc_poll (unsigned long dummy) +{ + int start_count; + + start_count = IA64_LOG_COUNT(SAL_INFO_TYPE_CMC); + + /* Call the interrupt handler */ + smp_call_function(ia64_mca_cmc_int_caller, NULL, 1, 1); + local_irq_disable(); + ia64_mca_cmc_int_caller(NULL); + local_irq_enable(); + + /* + * If no log recored, switch out of polling mode. + */ + if (start_count == IA64_LOG_COUNT(SAL_INFO_TYPE_CMC)) { + printk(KERN_WARNING "ia64_mca_cmc_poll: Returning to interrupt driven CMC handler\n"); + cmc_polling_enabled = 0; + smp_call_function(ia64_mca_cmc_vector_enable, NULL, 1, 1); + ia64_mca_cmc_vector_enable(NULL); + } else { + mod_timer(&cmc_poll_timer, jiffies + CMC_POLL_INTERVAL); + } +} + +/* + * ia64_mca_cpe_int_caller + * + * Call CPE interrupt handler, only purpose is to have a + * smp_call_function callable entry. + * + * Inputs : dummy(unused) + * Outputs : None + * */ +static void +ia64_mca_cpe_int_caller(void *dummy) +{ + ia64_mca_cpe_int_handler(0, NULL, NULL); +} + +/* + * ia64_mca_cpe_poll + * + * Poll for Corrected Platform Errors (CPEs), dynamically adjust + * polling interval based on occurance of an event. + * + * Inputs : dummy(unused) + * Outputs : None + * + */ +static void +ia64_mca_cpe_poll (unsigned long dummy) +{ + int start_count; + static int poll_time = MAX_CPE_POLL_INTERVAL; + + start_count = IA64_LOG_COUNT(SAL_INFO_TYPE_CPE); + + /* Call the interrupt handler */ + smp_call_function(ia64_mca_cpe_int_caller, NULL, 1, 1); + local_irq_disable(); + ia64_mca_cpe_int_caller(NULL); + local_irq_enable(); + + /* + * If a log was recorded, increase our polling frequency, + * otherwise, backoff. + */ + if (start_count != IA64_LOG_COUNT(SAL_INFO_TYPE_CPE)) { + poll_time = max(MIN_CPE_POLL_INTERVAL, poll_time/2); + } else { + poll_time = min(MAX_CPE_POLL_INTERVAL, poll_time * 2); + } + mod_timer(&cpe_poll_timer, jiffies + poll_time); +} + +/* + * ia64_mca_late_init + * + * Opportunity to setup things that require initialization later + * than ia64_mca_init. Setup a timer to poll for CPEs if the + * platform doesn't support an interrupt driven mechanism. + * + * Inputs : None + * Outputs : Status + */ +static int __init +ia64_mca_late_init(void) +{ + init_timer(&cmc_poll_timer); + cmc_poll_timer.function = ia64_mca_cmc_poll; + + /* Reset to the correct state */ + cmc_polling_enabled = 0; + + init_timer(&cpe_poll_timer); + cpe_poll_timer.function = ia64_mca_cpe_poll; + + /* If platform doesn't support CPEI, get the timer going. */ + if (acpi_request_vector(ACPI_INTERRUPT_CPEI) < 0) + ia64_mca_cpe_poll(0UL); + + return 0; +} + +device_initcall(ia64_mca_late_init); /* * C portion of the OS INIT handler @@ -803,7 +1215,7 @@ * */ void -ia64_init_handler (struct pt_regs *regs) +ia64_init_handler (struct pt_regs *pt, struct switch_stack *sw) { sal_log_processor_info_t *proc_ptr; ia64_err_rec_t *plog_ptr; @@ -830,7 +1242,7 @@ /* Clear the INIT SAL logs now that they have been saved in the OS buffer */ ia64_sal_clear_state_info(SAL_INFO_TYPE_INIT); - init_handler_platform(regs); /* call platform specific routines */ + init_handler_platform(proc_ptr, pt, sw); /* call platform specific routines */ } /* @@ -949,7 +1361,6 @@ return total_len; } else { IA64_LOG_UNLOCK(sal_info_type); - prfunc("ia64_log_get: No SAL error record available for type %d\n", sal_info_type); return 0; } } @@ -1881,7 +2292,8 @@ switch(sal_info_type) { case SAL_INFO_TYPE_MCA: prfunc("+BEGIN HARDWARE ERROR STATE AT MCA\n"); - platform_err = ia64_log_platform_info_print(IA64_LOG_CURR_BUFFER(sal_info_type), prfunc); + platform_err = ia64_log_platform_info_print(IA64_LOG_CURR_BUFFER(sal_info_type), + prfunc); prfunc("+END HARDWARE ERROR STATE AT MCA\n"); break; case SAL_INFO_TYPE_INIT: diff -Nru a/arch/ia64/kernel/mca_asm.S b/arch/ia64/kernel/mca_asm.S --- a/arch/ia64/kernel/mca_asm.S Wed Apr 16 18:32:26 2003 +++ b/arch/ia64/kernel/mca_asm.S Wed Apr 16 18:32:26 2003 @@ -766,8 +766,6 @@ // stash the information the SAL passed to os SAL_TO_OS_MCA_HANDOFF_STATE_SAVE(r2) ;; - -// now we want to save information so we can dump registers SAVE_MIN_WITH_COVER ;; mov r8=cr.ifa @@ -798,10 +796,12 @@ // // Let's call the C handler to get the rest of the state info // - alloc r14=ar.pfs,0,0,1,0 // now it's safe (must be first in insn group!) - ;; // + alloc r14=ar.pfs,0,0,2,0 // now it's safe (must be first in insn group!) + ;; adds out0=16,sp // out0 = pointer to pt_regs ;; + DO_SAVE_SWITCH_STACK + adds out1=16,sp // out0 = pointer to switch_stack br.call.sptk.many rp=ia64_init_handler .ret1: diff -Nru a/arch/ia64/kernel/module.c b/arch/ia64/kernel/module.c --- /dev/null Wed Dec 31 16:00:00 1969 +++ b/arch/ia64/kernel/module.c Wed Apr 16 18:32:26 2003 @@ -0,0 +1,889 @@ +/* + * IA-64-specific support for kernel module loader. + * + * Copyright (C) 2003 Hewlett-Packard Co + * David Mosberger-Tang + * + * Loosely based on patch by Rusty Russell. + */ + +/* relocs tested so far: + + DIR64LSB + FPTR64LSB + GPREL22 + LDXMOV + LDXMOV + LTOFF22 + LTOFF22X + LTOFF22X + LTOFF_FPTR22 + PCREL21B + PCREL64LSB + SECREL32LSB + SEGREL64LSB + */ + +#include + +#include +#include +#include +#include +#include +#include + +#include + +#define ARCH_MODULE_DEBUG 0 + +#if ARCH_MODULE_DEBUG +# define DEBUGP printk +# define inline +#else +# define DEBUGP(fmt , a...) +#endif + +#ifdef CONFIG_ITANIUM +# define USE_BRL 0 +#else +# define USE_BRL 1 +#endif + +#define MAX_LTOFF ((uint64_t) (1 << 22)) /* max. allowable linkage-table offset */ + +/* Define some relocation helper macros/types: */ + +#define FORMAT_SHIFT 0 +#define FORMAT_BITS 3 +#define FORMAT_MASK ((1 << FORMAT_BITS) - 1) +#define VALUE_SHIFT 3 +#define VALUE_BITS 5 +#define VALUE_MASK ((1 << VALUE_BITS) - 1) + +enum reloc_target_format { + /* direct encoded formats: */ + RF_NONE = 0, + RF_INSN14 = 1, + RF_INSN22 = 2, + RF_INSN64 = 3, + RF_32MSB = 4, + RF_32LSB = 5, + RF_64MSB = 6, + RF_64LSB = 7, + + /* formats that cannot be directly decoded: */ + RF_INSN60, + RF_INSN21B, /* imm21 form 1 */ + RF_INSN21M, /* imm21 form 2 */ + RF_INSN21F /* imm21 form 3 */ +}; + +enum reloc_value_formula { + RV_DIRECT = 4, /* S + A */ + RV_GPREL = 5, /* @gprel(S + A) */ + RV_LTREL = 6, /* @ltoff(S + A) */ + RV_PLTREL = 7, /* @pltoff(S + A) */ + RV_FPTR = 8, /* @fptr(S + A) */ + RV_PCREL = 9, /* S + A - P */ + RV_LTREL_FPTR = 10, /* @ltoff(@fptr(S + A)) */ + RV_SEGREL = 11, /* @segrel(S + A) */ + RV_SECREL = 12, /* @secrel(S + A) */ + RV_BDREL = 13, /* BD + A */ + RV_LTV = 14, /* S + A (like RV_DIRECT, except frozen at static link-time) */ + RV_PCREL2 = 15, /* S + A - P */ + RV_SPECIAL = 16, /* various (see below) */ + RV_RSVD17 = 17, + RV_TPREL = 18, /* @tprel(S + A) */ + RV_LTREL_TPREL = 19, /* @ltoff(@tprel(S + A)) */ + RV_DTPMOD = 20, /* @dtpmod(S + A) */ + RV_LTREL_DTPMOD = 21, /* @ltoff(@dtpmod(S + A)) */ + RV_DTPREL = 22, /* @dtprel(S + A) */ + RV_LTREL_DTPREL = 23, /* @ltoff(@dtprel(S + A)) */ + RV_RSVD24 = 24, + RV_RSVD25 = 25, + RV_RSVD26 = 26, + RV_RSVD27 = 27 + /* 28-31 reserved for implementation-specific purposes. */ +}; + +#define N(reloc) [R_IA64_##reloc] = #reloc + +static const char *reloc_name[256] = { + N(NONE), N(IMM14), N(IMM22), N(IMM64), + N(DIR32MSB), N(DIR32LSB), N(DIR64MSB), N(DIR64LSB), + N(GPREL22), N(GPREL64I), N(GPREL32MSB), N(GPREL32LSB), + N(GPREL64MSB), N(GPREL64LSB), N(LTOFF22), N(LTOFF64I), + N(PLTOFF22), N(PLTOFF64I), N(PLTOFF64MSB), N(PLTOFF64LSB), + N(FPTR64I), N(FPTR32MSB), N(FPTR32LSB), N(FPTR64MSB), + N(FPTR64LSB), N(PCREL60B), N(PCREL21B), N(PCREL21M), + N(PCREL21F), N(PCREL32MSB), N(PCREL32LSB), N(PCREL64MSB), + N(PCREL64LSB), N(LTOFF_FPTR22), N(LTOFF_FPTR64I), N(LTOFF_FPTR32MSB), + N(LTOFF_FPTR32LSB), N(LTOFF_FPTR64MSB), N(LTOFF_FPTR64LSB), N(SEGREL32MSB), + N(SEGREL32LSB), N(SEGREL64MSB), N(SEGREL64LSB), N(SECREL32MSB), + N(SECREL32LSB), N(SECREL64MSB), N(SECREL64LSB), N(REL32MSB), + N(REL32LSB), N(REL64MSB), N(REL64LSB), N(LTV32MSB), + N(LTV32LSB), N(LTV64MSB), N(LTV64LSB), N(PCREL21BI), + N(PCREL22), N(PCREL64I), N(IPLTMSB), N(IPLTLSB), + N(COPY), N(LTOFF22X), N(LDXMOV), N(TPREL14), + N(TPREL22), N(TPREL64I), N(TPREL64MSB), N(TPREL64LSB), + N(LTOFF_TPREL22), N(DTPMOD64MSB), N(DTPMOD64LSB), N(LTOFF_DTPMOD22), + N(DTPREL14), N(DTPREL22), N(DTPREL64I), N(DTPREL32MSB), + N(DTPREL32LSB), N(DTPREL64MSB), N(DTPREL64LSB), N(LTOFF_DTPREL22) +}; + +#undef N + +struct got_entry { + uint64_t val; +}; + +struct fdesc { + uint64_t ip; + uint64_t gp; +}; + +/* Opaque struct for insns, to protect against derefs. */ +struct insn; + +static inline uint64_t +bundle (const struct insn *insn) +{ + return (uint64_t) insn & ~0xfUL; +} + +static inline int +slot (const struct insn *insn) +{ + return (uint64_t) insn & 0x3; +} + +/* Patch instruction with "val" where "mask" has 1 bits. */ +static void +apply (struct insn *insn, uint64_t mask, uint64_t val) +{ + uint64_t m0, m1, v0, v1, b0, b1, *b = (uint64_t *) bundle(insn); +# define insn_mask ((1UL << 41) - 1) + unsigned long shift; + + b0 = b[0]; b1 = b[1]; + shift = 5 + 41 * slot(insn); /* 5 bits of template, then 3 x 41-bit instructions */ + if (shift >= 64) { + m1 = mask << (shift - 64); + v1 = val << (shift - 64); + } else { + m0 = mask << shift; m1 = mask >> (64 - shift); + v0 = val << shift; v1 = val >> (64 - shift); + b[0] = (b0 & ~m0) | (v0 & m0); + } + b[1] = (b1 & ~m1) | (v1 & m1); +} + +static int +apply_imm64 (struct module *mod, struct insn *insn, uint64_t val) +{ + if (slot(insn) != 2) { + printk(KERN_ERR "%s: illegal slot number %d for IMM64\n", + mod->name, slot(insn)); + return 0; + } + apply(insn, 0x01fffefe000, ( ((val & 0x8000000000000000) >> 27) /* bit 63 -> 36 */ + | ((val & 0x0000000000200000) << 0) /* bit 21 -> 21 */ + | ((val & 0x00000000001f0000) << 6) /* bit 16 -> 22 */ + | ((val & 0x000000000000ff80) << 20) /* bit 7 -> 27 */ + | ((val & 0x000000000000007f) << 13) /* bit 0 -> 13 */)); + apply((void *) insn - 1, 0x1ffffffffff, val >> 22); + return 1; +} + +static int +apply_imm60 (struct module *mod, struct insn *insn, uint64_t val) +{ + if (slot(insn) != 2) { + printk(KERN_ERR "%s: illegal slot number %d for IMM60\n", + mod->name, slot(insn)); + return 0; + } + if (val + ((uint64_t) 1 << 59) >= (1UL << 60)) { + printk(KERN_ERR "%s: value %ld out of IMM60 range\n", mod->name, (int64_t) val); + return 0; + } + apply(insn, 0x011ffffe000, ( ((val & 0x1000000000000000) >> 24) /* bit 60 -> 36 */ + | ((val & 0x00000000000fffff) << 13) /* bit 0 -> 13 */)); + apply((void *) insn - 1, 0x1fffffffffc, val >> 18); + return 1; +} + +static int +apply_imm22 (struct module *mod, struct insn *insn, uint64_t val) +{ + if (val + (1 << 21) >= (1 << 22)) { + printk(KERN_ERR "%s: value %li out of IMM22 range\n", mod->name, (int64_t)val); + return 0; + } + apply(insn, 0x01fffcfe000, ( ((val & 0x200000) << 15) /* bit 21 -> 36 */ + | ((val & 0x1f0000) << 6) /* bit 16 -> 22 */ + | ((val & 0x00ff80) << 20) /* bit 7 -> 27 */ + | ((val & 0x00007f) << 13) /* bit 0 -> 13 */)); + return 1; +} + +static int +apply_imm21b (struct module *mod, struct insn *insn, uint64_t val) +{ + if (val + (1 << 20) >= (1 << 21)) { + printk(KERN_ERR "%s: value %li out of IMM21b range\n", mod->name, (int64_t)val); + return 0; + } + apply(insn, 0x11ffffe000, ( ((val & 0x100000) << 16) /* bit 20 -> 36 */ + | ((val & 0x0fffff) << 13) /* bit 0 -> 13 */)); + return 1; +} + +#if USE_BRL + +struct plt_entry { + /* Three instruction bundles in PLT. */ + unsigned char bundle[2][16]; +}; + +static const struct plt_entry ia64_plt_template = { + { + { + 0x04, 0x00, 0x00, 0x00, 0x01, 0x00, /* [MLX] nop.m 0 */ + 0x00, 0x00, 0x00, 0x00, 0x00, 0x20, /* movl gp=TARGET_GP */ + 0x00, 0x00, 0x00, 0x60 + }, + { + 0x05, 0x00, 0x00, 0x00, 0x01, 0x00, /* [MLX] nop.m 0 */ + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, /* brl.many gp=TARGET_GP */ + 0x08, 0x00, 0x00, 0xc0 + } + } +}; + +static int +patch_plt (struct module *mod, struct plt_entry *plt, long target_ip, unsigned long target_gp) +{ + if (apply_imm64(mod, (struct insn *) (plt->bundle[0] + 2), target_gp) + && apply_imm60(mod, (struct insn *) (plt->bundle[1] + 2), + (target_ip - (int64_t) plt->bundle[1]) / 16)) + return 1; + return 0; +} + +unsigned long +plt_target (struct plt_entry *plt) +{ + uint64_t b0, b1, *b = (uint64_t *) plt->bundle[1]; + long off; + + b0 = b[0]; b1 = b[1]; + off = ( ((b1 & 0x00fffff000000000) >> 36) /* imm20b -> bit 0 */ + | ((b0 >> 48) << 20) | ((b1 & 0x7fffff) << 36) /* imm39 -> bit 20 */ + | ((b1 & 0x0800000000000000) << 1)); /* i -> bit 60 */ + return (long) plt->bundle[1] + 16*off; +} + +#else /* !USE_BRL */ + +struct plt_entry { + /* Three instruction bundles in PLT. */ + unsigned char bundle[3][16]; +}; + +static const struct plt_entry ia64_plt_template = { + { + { + 0x05, 0x00, 0x00, 0x00, 0x01, 0x00, /* [MLX] nop.m 0 */ + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, /* movl r16=TARGET_IP */ + 0x02, 0x00, 0x00, 0x60 + }, + { + 0x04, 0x00, 0x00, 0x00, 0x01, 0x00, /* [MLX] nop.m 0 */ + 0x00, 0x00, 0x00, 0x00, 0x00, 0x20, /* movl gp=TARGET_GP */ + 0x00, 0x00, 0x00, 0x60 + }, + { + 0x11, 0x00, 0x00, 0x00, 0x01, 0x00, /* [MIB] nop.m 0 */ + 0x60, 0x80, 0x04, 0x80, 0x03, 0x00, /* mov b6=r16 */ + 0x60, 0x00, 0x80, 0x00 /* br.few b6 */ + } + } +}; + +static int +patch_plt (struct module *mod, struct plt_entry *plt, long target_ip, unsigned long target_gp) +{ + if (apply_imm64(mod, (struct insn *) (plt->bundle[0] + 2), target_ip) + && apply_imm64(mod, (struct insn *) (plt->bundle[1] + 2), target_gp)) + return 1; + return 0; +} + +unsigned long +plt_target (struct plt_entry *plt) +{ + uint64_t b0, b1, *b = (uint64_t *) plt->bundle[0]; + + b0 = b[0]; b1 = b[1]; + return ( ((b1 & 0x000007f000000000) >> 36) /* imm7b -> bit 0 */ + | ((b1 & 0x07fc000000000000) >> 43) /* imm9d -> bit 7 */ + | ((b1 & 0x0003e00000000000) >> 29) /* imm5c -> bit 16 */ + | ((b1 & 0x0000100000000000) >> 23) /* ic -> bit 21 */ + | ((b0 >> 46) << 22) | ((b1 & 0x7fffff) << 40) /* imm41 -> bit 22 */ + | ((b1 & 0x0800000000000000) << 4)); /* i -> bit 63 */ +} + +#endif /* !USE_BRL */ + +void * +module_alloc (unsigned long size) +{ + if (!size) + return NULL; + return vmalloc(size); +} + +void +module_free (struct module *mod, void *module_region) +{ + vfree(module_region); +} + +/* Have we already seen one of these relocations? */ +/* FIXME: we could look in other sections, too --RR */ +static int +duplicate_reloc (const Elf64_Rela *rela, unsigned int num) +{ + unsigned int i; + + for (i = 0; i < num; i++) { + if (rela[i].r_info == rela[num].r_info && rela[i].r_addend == rela[num].r_addend) + return 1; + } + return 0; +} + +/* Count how many GOT entries we may need */ +static unsigned int +count_gots (const Elf64_Rela *rela, unsigned int num) +{ + unsigned int i, ret = 0; + + /* Sure, this is order(n^2), but it's usually short, and not + time critical */ + for (i = 0; i < num; i++) { + switch (ELF64_R_TYPE(rela[i].r_info)) { + case R_IA64_LTOFF22: + case R_IA64_LTOFF22X: + case R_IA64_LTOFF64I: + case R_IA64_LTOFF_FPTR22: + case R_IA64_LTOFF_FPTR64I: + case R_IA64_LTOFF_FPTR32MSB: + case R_IA64_LTOFF_FPTR32LSB: + case R_IA64_LTOFF_FPTR64MSB: + case R_IA64_LTOFF_FPTR64LSB: + if (!duplicate_reloc(rela, i)) + ret++; + break; + } + } + return ret; +} + +/* Count how many PLT entries we may need */ +static unsigned int +count_plts (const Elf64_Rela *rela, unsigned int num) +{ + unsigned int i, ret = 0; + + /* Sure, this is order(n^2), but it's usually short, and not + time critical */ + for (i = 0; i < num; i++) { + switch (ELF64_R_TYPE(rela[i].r_info)) { + case R_IA64_PCREL21B: + case R_IA64_PLTOFF22: + case R_IA64_PLTOFF64I: + case R_IA64_PLTOFF64MSB: + case R_IA64_PLTOFF64LSB: + case R_IA64_IPLTMSB: + case R_IA64_IPLTLSB: + if (!duplicate_reloc(rela, i)) + ret++; + break; + } + } + return ret; +} + +/* We need to create an function-descriptors for any internal function + which is referenced. */ +static unsigned int +count_fdescs (const Elf64_Rela *rela, unsigned int num) +{ + unsigned int i, ret = 0; + + /* Sure, this is order(n^2), but it's usually short, and not time critical. */ + for (i = 0; i < num; i++) { + switch (ELF64_R_TYPE(rela[i].r_info)) { + case R_IA64_FPTR64I: + case R_IA64_FPTR32LSB: + case R_IA64_FPTR32MSB: + case R_IA64_FPTR64LSB: + case R_IA64_FPTR64MSB: + case R_IA64_LTOFF_FPTR22: + case R_IA64_LTOFF_FPTR32LSB: + case R_IA64_LTOFF_FPTR32MSB: + case R_IA64_LTOFF_FPTR64I: + case R_IA64_LTOFF_FPTR64LSB: + case R_IA64_LTOFF_FPTR64MSB: + case R_IA64_IPLTMSB: + case R_IA64_IPLTLSB: + /* + * Jumps to static functions sometimes go straight to their + * offset. Of course, that may not be possible if the jump is + * from init -> core or vice. versa, so we need to generate an + * FDESC (and PLT etc) for that. + */ + case R_IA64_PCREL21B: + if (!duplicate_reloc(rela, i)) + ret++; + break; + } + } + return ret; +} + +int +module_frob_arch_sections (Elf_Ehdr *ehdr, Elf_Shdr *sechdrs, char *secstrings, + struct module *mod) +{ + unsigned long core_plts = 0, init_plts = 0, gots = 0, fdescs = 0; + Elf64_Shdr *s, *sechdrs_end = sechdrs + ehdr->e_shnum; + + /* + * To store the PLTs and function-descriptors, we expand the .text section for + * core module-code and the .init.text section for initialization code. + */ + for (s = sechdrs; s < sechdrs_end; ++s) + if (strcmp(".core.plt", secstrings + s->sh_name) == 0) + mod->arch.core_plt = s; + else if (strcmp(".init.plt", secstrings + s->sh_name) == 0) + mod->arch.init_plt = s; + else if (strcmp(".got", secstrings + s->sh_name) == 0) + mod->arch.got = s; + else if (strcmp(".opd", secstrings + s->sh_name) == 0) + mod->arch.opd = s; + else if (strcmp(".IA_64.unwind", secstrings + s->sh_name) == 0) + mod->arch.unwind = s; + + if (!mod->arch.core_plt || !mod->arch.init_plt || !mod->arch.got || !mod->arch.opd) { + printk(KERN_ERR "%s: sections missing\n", mod->name); + return -ENOEXEC; + } + + /* GOT and PLTs can occur in any relocated section... */ + for (s = sechdrs + 1; s < sechdrs_end; ++s) { + const Elf64_Rela *rels = (void *)ehdr + s->sh_offset; + unsigned long numrels = s->sh_size/sizeof(Elf64_Rela); + + if (s->sh_type != SHT_RELA) + continue; + + gots += count_gots(rels, numrels); + fdescs += count_fdescs(rels, numrels); + if (strstr(secstrings + s->sh_name, ".init")) + init_plts += count_plts(rels, numrels); + else + core_plts += count_plts(rels, numrels); + } + + mod->arch.core_plt->sh_type = SHT_NOBITS; + mod->arch.core_plt->sh_flags = SHF_EXECINSTR | SHF_ALLOC; + mod->arch.core_plt->sh_addralign = 16; + mod->arch.core_plt->sh_size = core_plts * sizeof(struct plt_entry); + mod->arch.init_plt->sh_type = SHT_NOBITS; + mod->arch.init_plt->sh_flags = SHF_EXECINSTR | SHF_ALLOC; + mod->arch.init_plt->sh_addralign = 16; + mod->arch.init_plt->sh_size = init_plts * sizeof(struct plt_entry); + mod->arch.got->sh_type = SHT_NOBITS; + mod->arch.got->sh_flags = ARCH_SHF_SMALL | SHF_ALLOC; + mod->arch.got->sh_addralign = 8; + mod->arch.got->sh_size = gots * sizeof(struct got_entry); + mod->arch.opd->sh_type = SHT_NOBITS; + mod->arch.opd->sh_flags = SHF_ALLOC; + mod->arch.opd->sh_addralign = 8; + mod->arch.opd->sh_size = fdescs * sizeof(struct fdesc); + DEBUGP("%s: core.plt=%lx, init.plt=%lx, got=%lx, fdesc=%lx\n", + __FUNCTION__, mod->arch.core_plt->sh_size, mod->arch.init_plt->sh_size, + mod->arch.got->sh_size, mod->arch.opd->sh_size); + return 0; +} + +static inline int +in_init (const struct module *mod, uint64_t addr) +{ + return addr - (uint64_t) mod->module_init < mod->init_size; +} + +static inline int +in_core (const struct module *mod, uint64_t addr) +{ + return addr - (uint64_t) mod->module_core < mod->core_size; +} + +static inline int +is_internal (const struct module *mod, uint64_t value) +{ + return in_init(mod, value) || in_core(mod, value); +} + +/* + * Get gp-relative offset for the linkage-table entry of VALUE. + */ +static uint64_t +get_ltoff (struct module *mod, uint64_t value, int *okp) +{ + struct got_entry *got, *e; + + if (!*okp) + return 0; + + got = (void *) mod->arch.got->sh_addr; + for (e = got; e < got + mod->arch.next_got_entry; ++e) + if (e->val == value) + goto found; + + /* Not enough GOT entries? */ + if (e >= (struct got_entry *) (mod->arch.got->sh_addr + mod->arch.got->sh_size)) + BUG(); + + e->val = value; + ++mod->arch.next_got_entry; + found: + return (uint64_t) e - mod->arch.gp; +} + +static inline int +gp_addressable (struct module *mod, uint64_t value) +{ + return value - mod->arch.gp + MAX_LTOFF/2 < MAX_LTOFF; +} + +/* Get PC-relative PLT entry for this value. Returns 0 on failure. */ +static uint64_t +get_plt (struct module *mod, const struct insn *insn, uint64_t value, int *okp) +{ + struct plt_entry *plt, *plt_end; + uint64_t target_ip, target_gp; + + if (!*okp) + return 0; + + if (in_init(mod, (uint64_t) insn)) { + plt = (void *) mod->arch.init_plt->sh_addr; + plt_end = (void *) plt + mod->arch.init_plt->sh_size; + } else { + plt = (void *) mod->arch.core_plt->sh_addr; + plt_end = (void *) plt + mod->arch.core_plt->sh_size; + } + + /* "value" is a pointer to a function-descriptor; fetch the target ip/gp from it: */ + target_ip = ((uint64_t *) value)[0]; + target_gp = ((uint64_t *) value)[1]; + + /* Look for existing PLT entry. */ + while (plt->bundle[0][0]) { + if (plt_target(plt) == target_ip) + goto found; + if (++plt >= plt_end) + BUG(); + } + *plt = ia64_plt_template; + if (!patch_plt(mod, plt, target_ip, target_gp)) { + *okp = 0; + return 0; + } +#if ARCH_MODULE_DEBUG + if (plt_target(plt) != target_ip) { + printk("%s: mistargeted PLT: wanted %lx, got %lx\n", + __FUNCTION__, target_ip, plt_target(plt)); + *okp = 0; + return 0; + } +#endif + found: + return (uint64_t) plt; +} + +/* Get function descriptor for VALUE. */ +static uint64_t +get_fdesc (struct module *mod, uint64_t value, int *okp) +{ + struct fdesc *fdesc = (void *) mod->arch.opd->sh_addr; + + if (!*okp) + return 0; + + if (!value) { + printk(KERN_ERR "%s: fdesc for zero requested!\n", mod->name); + return 0; + } + + if (!is_internal(mod, value)) + /* + * If it's not a module-local entry-point, "value" already points to a + * function-descriptor. + */ + return value; + + /* Look for existing function descriptor. */ + while (fdesc->ip) { + if (fdesc->ip == value) + return (uint64_t)fdesc; + if ((uint64_t) ++fdesc >= mod->arch.opd->sh_addr + mod->arch.opd->sh_size) + BUG(); + } + + /* Create new one */ + fdesc->ip = value; + fdesc->gp = mod->arch.gp; + return (uint64_t) fdesc; +} + +static inline int +do_reloc (struct module *mod, uint8_t r_type, Elf64_Sym *sym, uint64_t addend, + Elf64_Shdr *sec, void *location) +{ + enum reloc_target_format format = (r_type >> FORMAT_SHIFT) & FORMAT_MASK; + enum reloc_value_formula formula = (r_type >> VALUE_SHIFT) & VALUE_MASK; + uint64_t val; + int ok = 1; + + val = sym->st_value + addend; + + switch (formula) { + case RV_SEGREL: /* segment base is arbitrarily chosen to be 0 for kernel modules */ + case RV_DIRECT: + break; + + case RV_GPREL: val -= mod->arch.gp; break; + case RV_LTREL: val = get_ltoff(mod, val, &ok); break; + case RV_PLTREL: val = get_plt(mod, location, val, &ok); break; + case RV_FPTR: val = get_fdesc(mod, val, &ok); break; + case RV_SECREL: val -= sec->sh_addr; break; + case RV_LTREL_FPTR: val = get_ltoff(mod, get_fdesc(mod, val, &ok), &ok); break; + + case RV_PCREL: + switch (r_type) { + case R_IA64_PCREL21B: + /* special because it can cross into other module/kernel-core. */ + if (!is_internal(mod, val)) + val = get_plt(mod, location, val, &ok); + /* FALL THROUGH */ + default: + val -= bundle(location); + break; + + case R_IA64_PCREL32MSB: + case R_IA64_PCREL32LSB: + case R_IA64_PCREL64MSB: + case R_IA64_PCREL64LSB: + val -= (uint64_t) location; + break; + + } + switch (r_type) { + case R_IA64_PCREL60B: format = RF_INSN60; break; + case R_IA64_PCREL21B: format = RF_INSN21B; break; + case R_IA64_PCREL21M: format = RF_INSN21M; break; + case R_IA64_PCREL21F: format = RF_INSN21F; break; + default: break; + } + break; + + case RV_BDREL: + val -= (uint64_t) (in_init(mod, val) ? mod->module_init : mod->module_core); + break; + + case RV_LTV: + /* can link-time value relocs happen here? */ + BUG(); + break; + + case RV_PCREL2: + if (r_type == R_IA64_PCREL21BI) { + if (!is_internal(mod, val)) { + printk(KERN_ERR "%s: %s reloc against non-local symbol (%lx)\n", + __FUNCTION__, reloc_name[r_type], val); + return -ENOEXEC; + } + format = RF_INSN21B; + } + val -= bundle(location); + break; + + case RV_SPECIAL: + switch (r_type) { + case R_IA64_IPLTMSB: + case R_IA64_IPLTLSB: + val = get_fdesc(mod, get_plt(mod, location, val, &ok), &ok); + format = RF_64LSB; + if (r_type == R_IA64_IPLTMSB) + format = RF_64MSB; + break; + + case R_IA64_SUB: + val = addend - sym->st_value; + format = RF_INSN64; + break; + + case R_IA64_LTOFF22X: + if (gp_addressable(mod, val)) + val -= mod->arch.gp; + else + val = get_ltoff(mod, val, &ok); + format = RF_INSN22; + break; + + case R_IA64_LDXMOV: + if (gp_addressable(mod, val)) { + /* turn "ld8" into "mov": */ + DEBUGP("%s: patching ld8 at %p to mov\n", __FUNCTION__, location); + apply(location, 0x1fff80fe000, 0x10000000000); + } + return 0; + + default: + if (reloc_name[r_type]) + printk(KERN_ERR "%s: special reloc %s not supported", + mod->name, reloc_name[r_type]); + else + printk(KERN_ERR "%s: unknown special reloc %x\n", + mod->name, r_type); + return -ENOEXEC; + } + break; + + case RV_TPREL: + case RV_LTREL_TPREL: + case RV_DTPMOD: + case RV_LTREL_DTPMOD: + case RV_DTPREL: + case RV_LTREL_DTPREL: + printk(KERN_ERR "%s: %s reloc not supported\n", + mod->name, reloc_name[r_type] ? reloc_name[r_type] : "?"); + return -ENOEXEC; + + default: + printk(KERN_ERR "%s: unknown reloc %x\n", mod->name, r_type); + return -ENOEXEC; + } + + if (!ok) + return -ENOEXEC; + + DEBUGP("%s: [%p]<-%016lx = %s(%lx)\n", __FUNCTION__, location, val, + reloc_name[r_type] ? reloc_name[r_type] : "?", sym->st_value + addend); + + switch (format) { + case RF_INSN21B: ok = apply_imm21b(mod, location, (int64_t) val / 16); break; + case RF_INSN22: ok = apply_imm22(mod, location, val); break; + case RF_INSN64: ok = apply_imm64(mod, location, val); break; + case RF_INSN60: ok = apply_imm60(mod, location, (int64_t) val / 16); break; + case RF_32LSB: put_unaligned(val, (uint32_t *) location); break; + case RF_64LSB: put_unaligned(val, (uint64_t *) location); break; + case RF_32MSB: /* ia64 Linux is little-endian... */ + case RF_64MSB: /* ia64 Linux is little-endian... */ + case RF_INSN14: /* must be within-module, i.e., resolved by "ld -r" */ + case RF_INSN21M: /* must be within-module, i.e., resolved by "ld -r" */ + case RF_INSN21F: /* must be within-module, i.e., resolved by "ld -r" */ + printk(KERN_ERR "%s: format %u needed by %s reloc is not supported\n", + mod->name, format, reloc_name[r_type] ? reloc_name[r_type] : "?"); + return -ENOEXEC; + + default: + printk(KERN_ERR "%s: relocation %s resulted in unknown format %u\n", + mod->name, reloc_name[r_type] ? reloc_name[r_type] : "?", format); + return -ENOEXEC; + } + return ok ? 0 : -ENOEXEC; +} + +int +apply_relocate_add (Elf64_Shdr *sechdrs, const char *strtab, unsigned int symindex, + unsigned int relsec, struct module *mod) +{ + unsigned int i, n = sechdrs[relsec].sh_size / sizeof(Elf64_Rela); + Elf64_Rela *rela = (void *) sechdrs[relsec].sh_addr; + Elf64_Shdr *target_sec; + int ret; + + DEBUGP("%s: applying section %u (%u relocs) to %u\n", __FUNCTION__, + relsec, n, sechdrs[relsec].sh_info); + + target_sec = sechdrs + sechdrs[relsec].sh_info; + + if (target_sec->sh_entsize == ~0UL) + /* + * If target section wasn't allocated, we don't need to relocate it. + * Happens, e.g., for debug sections. + */ + return 0; + + if (!mod->arch.gp) { + /* + * XXX Should have an arch-hook for running this after final section + * addresses have been selected... + */ + /* See if gp can cover the entire core module: */ + uint64_t gp = (uint64_t) mod->module_core + MAX_LTOFF / 2; + if (mod->core_size >= MAX_LTOFF) + /* + * This takes advantage of fact that SHF_ARCH_SMALL gets allocated + * at the end of the module. + */ + gp = (uint64_t) mod->module_core + mod->core_size - MAX_LTOFF / 2; + mod->arch.gp = gp; + DEBUGP("%s: placing gp at 0x%lx\n", __FUNCTION__, gp); + } + + for (i = 0; i < n; i++) { + ret = do_reloc(mod, ELF64_R_TYPE(rela[i].r_info), + ((Elf64_Sym *) sechdrs[symindex].sh_addr + + ELF64_R_SYM(rela[i].r_info)), + rela[i].r_addend, target_sec, + (void *) target_sec->sh_addr + rela[i].r_offset); + if (ret < 0) + return ret; + } + return 0; +} + +int +apply_relocate (Elf64_Shdr *sechdrs, const char *strtab, unsigned int symindex, + unsigned int relsec, struct module *mod) +{ + printk(KERN_ERR "module %s: REL relocs in section %u unsupported\n", mod->name, relsec); + return -ENOEXEC; +} + +int +module_finalize (const Elf_Ehdr *hdr, const Elf_Shdr *sechdrs, struct module *mod) +{ + DEBUGP("%s: init: entry=%p\n", __FUNCTION__, mod->init); + if (mod->arch.unwind) + mod->arch.unw_table = unw_add_unwind_table(mod->name, 0, mod->arch.gp, + (void *) mod->arch.unwind->sh_addr, + ((void *) mod->arch.unwind->sh_addr + + mod->arch.unwind->sh_size)); + return 0; +} + +void +module_arch_cleanup (struct module *mod) +{ + if (mod->arch.unwind) + unw_remove_unwind_table(mod->arch.unw_table); +} diff -Nru a/arch/ia64/kernel/palinfo.c b/arch/ia64/kernel/palinfo.c --- a/arch/ia64/kernel/palinfo.c Wed Apr 16 18:32:25 2003 +++ b/arch/ia64/kernel/palinfo.c Wed Apr 16 18:32:25 2003 @@ -27,9 +27,7 @@ #include #include #include -#ifdef CONFIG_SMP #include -#endif MODULE_AUTHOR("Stephane Eranian "); MODULE_DESCRIPTION("/proc interface to IA-64 PAL"); @@ -37,12 +35,6 @@ #define PALINFO_VERSION "0.5" -#ifdef CONFIG_SMP -#define cpu_is_online(i) (cpu_online_map & (1UL << i)) -#else -#define cpu_is_online(i) 1 -#endif - typedef int (*palinfo_func_t)(char*); typedef struct { @@ -933,7 +925,7 @@ */ for (i=0; i < NR_CPUS; i++) { - if (!cpu_is_online(i)) continue; + if (!cpu_online(i)) continue; sprintf(cpustr,CPUSTR, i); diff -Nru a/arch/ia64/kernel/perfmon.c b/arch/ia64/kernel/perfmon.c --- a/arch/ia64/kernel/perfmon.c Wed Apr 16 18:32:26 2003 +++ b/arch/ia64/kernel/perfmon.c Wed Apr 16 18:32:26 2003 @@ -24,6 +24,7 @@ #include #include #include +#include #include #include @@ -134,12 +135,6 @@ #define PFM_CPUINFO_CLEAR(v) __get_cpu_var(pfm_syst_info) &= ~(v) #define PFM_CPUINFO_SET(v) __get_cpu_var(pfm_syst_info) |= (v) -#ifdef CONFIG_SMP -#define cpu_is_online(i) (cpu_online_map & (1UL << i)) -#else -#define cpu_is_online(i) (i==0) -#endif - /* * debugging */ @@ -1082,7 +1077,7 @@ * and it must be a valid CPU */ cpu = ffz(~pfx->ctx_cpu_mask); - if (cpu_is_online(cpu) == 0) { + if (cpu_online(cpu) == 0) { DBprintk(("CPU%d is not online\n", cpu)); return -EINVAL; } @@ -3153,7 +3148,7 @@ p += sprintf(p, "ovfl_mask : 0x%lx\n", pmu_conf.ovfl_val); for(i=0; i < NR_CPUS; i++) { - if (cpu_is_online(i) == 0) continue; + if (cpu_online(i) == 0) continue; p += sprintf(p, "CPU%-2d overflow intrs : %lu\n", i, pfm_stats[i].pfm_ovfl_intr_count); p += sprintf(p, "CPU%-2d spurious intrs : %lu\n", i, pfm_stats[i].pfm_spurious_ovfl_intr_count); p += sprintf(p, "CPU%-2d recorded samples : %lu\n", i, pfm_stats[i].pfm_recorded_samples_count); diff -Nru a/arch/ia64/kernel/process.c b/arch/ia64/kernel/process.c --- a/arch/ia64/kernel/process.c Wed Apr 16 18:32:26 2003 +++ b/arch/ia64/kernel/process.c Wed Apr 16 18:32:26 2003 @@ -43,8 +43,8 @@ #include "sigframe.h" -static void -do_show_stack (struct unw_frame_info *info, void *arg) +void +ia64_do_show_stack (struct unw_frame_info *info, void *arg) { unsigned long ip, sp, bsp; char buf[80]; /* don't make it so big that it overflows the stack! */ @@ -57,7 +57,7 @@ unw_get_sp(info, &sp); unw_get_bsp(info, &bsp); - snprintf(buf, sizeof(buf), " [<%016lx>] %%s sp=0x%016lx bsp=0x%016lx\n", + snprintf(buf, sizeof(buf), " [<%016lx>] %%s\n\t\t\t\tsp=%016lx bsp=%016lx\n", ip, sp, bsp); print_symbol(buf, ip); } while (unw_unwind(info) >= 0); @@ -66,22 +66,19 @@ void show_trace_task (struct task_struct *task) { - struct unw_frame_info info; - - unw_init_from_blocked_task(&info, task); - do_show_stack(&info, 0); + show_stack(task); } void show_stack (struct task_struct *task) { if (!task) - unw_init_running(do_show_stack, 0); + unw_init_running(ia64_do_show_stack, 0); else { struct unw_frame_info info; unw_init_from_blocked_task(&info, task); - do_show_stack(&info, 0); + ia64_do_show_stack(&info, 0); } } @@ -138,7 +135,7 @@ ((i == sof - 1) || (i % 3) == 2) ? "\n" : " "); } } else - show_stack(0); + show_stack(NULL); } void @@ -169,7 +166,10 @@ void default_idle (void) { - /* may want to do PAL_LIGHT_HALT here... */ +#ifdef CONFIG_IA64_PAL_IDLE + if (!need_resched()) + safe_halt(); +#endif } void __attribute__((noreturn)) @@ -177,6 +177,10 @@ { /* endless idle loop with no priority at all */ while (1) { + void (*idle)(void) = pm_idle; + if (!idle) + idle = default_idle; + #ifdef CONFIG_SMP if (!need_resched()) min_xtp(); @@ -186,10 +190,7 @@ #ifdef CONFIG_IA64_SGI_SN snidle(); #endif - if (pm_idle) - (*pm_idle)(); - else - default_idle(); + (*idle)(); } #ifdef CONFIG_IA64_SGI_SN @@ -581,6 +582,15 @@ tid = clone(flags | CLONE_VM | CLONE_UNTRACED, 0); if (parent != current) { +#ifdef CONFIG_IA32_SUPPORT + if (IS_IA32_PROCESS(ia64_task_regs(current))) { + /* A kernel thread is always a 64-bit process. */ + current->thread.map_base = DEFAULT_MAP_BASE; + current->thread.task_size = DEFAULT_TASK_SIZE; + ia64_set_kr(IA64_KR_IO_BASE, current->thread.old_iob); + ia64_set_kr(IA64_KR_TSSD, current->thread.old_k1); + } +#endif result = (*fn)(arg); _exit(result); } @@ -751,7 +761,7 @@ } void -__put_task_struct (struct task_struct *tsk) +free_task_struct (struct task_struct *tsk) { free_pages((unsigned long) tsk, KERNEL_STACK_SIZE_ORDER); } diff -Nru a/arch/ia64/kernel/setup.c b/arch/ia64/kernel/setup.c --- a/arch/ia64/kernel/setup.c Wed Apr 16 18:32:25 2003 +++ b/arch/ia64/kernel/setup.c Wed Apr 16 18:32:25 2003 @@ -424,7 +424,7 @@ #ifdef CONFIG_ACPI_BOOT acpi_boot_init(); #endif -#ifdef CONFIG_SERIAL_HCDP +#ifdef CONFIG_SERIAL_8250_HCDP if (efi.hcdp) { void setup_serial_hcdp(void *); diff -Nru a/arch/ia64/kernel/signal.c b/arch/ia64/kernel/signal.c --- a/arch/ia64/kernel/signal.c Wed Apr 16 18:32:26 2003 +++ b/arch/ia64/kernel/signal.c Wed Apr 16 18:32:26 2003 @@ -191,6 +191,10 @@ err |= __put_user(from->si_pfm_ovfl[2], &to->si_pfm_ovfl[2]); err |= __put_user(from->si_pfm_ovfl[3], &to->si_pfm_ovfl[3]); } + case __SI_TIMER >> 16: + err |= __put_user(from->si_tid, &to->si_tid); + err |= __put_user(from->si_overrun, &to->si_overrun); + err |= __put_user(from->si_value, &to->si_value); break; default: err |= __put_user(from->si_uid, &to->si_uid); diff -Nru a/arch/ia64/kernel/smpboot.c b/arch/ia64/kernel/smpboot.c --- a/arch/ia64/kernel/smpboot.c Wed Apr 16 18:32:26 2003 +++ b/arch/ia64/kernel/smpboot.c Wed Apr 16 18:32:26 2003 @@ -280,12 +280,6 @@ smp_setup_percpu_timer(); /* - * Synchronize the ITC with the BP - */ - Dprintk("Going to syncup ITC with BP.\n"); - - ia64_sync_itc(0); - /* * Get our bogomips. */ ia64_init_itm(); @@ -307,6 +301,18 @@ local_irq_enable(); calibrate_delay(); local_cpu_data->loops_per_jiffy = loops_per_jiffy; + + if (!(sal_platform_features & IA64_SAL_PLATFORM_FEATURE_ITC_DRIFT)) { + /* + * Synchronize the ITC with the BP. Need to do this after irqs are + * enabled because ia64_sync_itc() calls smp_call_function_single(), which + * calls spin_unlock_bh(), which calls spin_unlock_bh(), which calls + * local_bh_enable(), which bugs out if irqs are not enabled... + */ + Dprintk("Going to syncup ITC with BP.\n"); + ia64_sync_itc(0); + } + /* * Allow the master to continue. */ diff -Nru a/arch/ia64/kernel/time.c b/arch/ia64/kernel/time.c --- a/arch/ia64/kernel/time.c Wed Apr 16 18:32:25 2003 +++ b/arch/ia64/kernel/time.c Wed Apr 16 18:32:25 2003 @@ -60,7 +60,7 @@ } /* - * Return the number of micro-seconds that elapsed since the last update to jiffy. The + * Return the number of nano-seconds that elapsed since the last update to jiffy. The * xtime_lock must be at least read-locked when calling this routine. */ static inline unsigned long @@ -86,6 +86,9 @@ void do_settimeofday (struct timeval *tv) { + time_t sec = tv->tv_sec; + long nsec = tv->tv_usec * 1000; + write_seqlock_irq(&xtime_lock); { /* @@ -94,22 +97,22 @@ * Discover what correction gettimeofday would have done, and then undo * it! */ - tv->tv_usec -= gettimeoffset(); - tv->tv_usec -= (jiffies - wall_jiffies) * (1000000 / HZ); + nsec -= gettimeoffset(); - while (tv->tv_usec < 0) { - tv->tv_usec += 1000000; - tv->tv_sec--; + while (nsec < 0) { + nsec += 1000000000; + sec--; } - xtime.tv_sec = tv->tv_sec; - xtime.tv_nsec = 1000 * tv->tv_usec; + xtime.tv_sec = sec; + xtime.tv_nsec = nsec; time_adjust = 0; /* stop active adjtime() */ time_status |= STA_UNSYNC; time_maxerror = NTP_PHASE_LIMIT; time_esterror = NTP_PHASE_LIMIT; } write_sequnlock_irq(&xtime_lock); + clock_was_set(); } void diff -Nru a/arch/ia64/kernel/traps.c b/arch/ia64/kernel/traps.c --- a/arch/ia64/kernel/traps.c Wed Apr 16 18:32:26 2003 +++ b/arch/ia64/kernel/traps.c Wed Apr 16 18:32:26 2003 @@ -338,8 +338,8 @@ fpu_swa_count = 0; if ((++fpu_swa_count < 5) && !(current->thread.flags & IA64_THREAD_FPEMU_NOPRINT)) { last_time = jiffies; - printk(KERN_WARNING "%s(%d): floating-point assist fault at ip %016lx\n", - current->comm, current->pid, regs->cr_iip + ia64_psr(regs)->ri); + printk(KERN_WARNING "%s(%d): floating-point assist fault at ip %016lx, isr %016lx\n", + current->comm, current->pid, regs->cr_iip + ia64_psr(regs)->ri, isr); } exception = fp_emulate(fp_fault, bundle, ®s->cr_ipsr, ®s->ar_fpsr, &isr, ®s->pr, diff -Nru a/arch/ia64/kernel/unwind.c b/arch/ia64/kernel/unwind.c --- a/arch/ia64/kernel/unwind.c Wed Apr 16 18:32:26 2003 +++ b/arch/ia64/kernel/unwind.c Wed Apr 16 18:32:26 2003 @@ -253,6 +253,11 @@ struct pt_regs *pt; if ((unsigned) regnum - 1 >= 127) { + if (regnum == 0 && !write) { + *val = 0; /* read r0 always returns 0 */ + *nat = 0; + return 0; + } UNW_DPRINT(0, "unwind.%s: trying to access non-existent r%u\n", __FUNCTION__, regnum); return -1; @@ -318,13 +323,8 @@ } } else { /* access a scratch register */ - if (!info->pt) { - UNW_DPRINT(0, "unwind.%s: no pt-regs; cannot access r%d\n", - __FUNCTION__, regnum); - return -1; - } pt = get_scratch_regs(info); - addr = (unsigned long *) (pt + pt_regs_off(regnum)); + addr = (unsigned long *) ((unsigned long)pt + pt_regs_off(regnum)); if (info->pri_unat_loc) nat_addr = info->pri_unat_loc; else @@ -1888,22 +1888,21 @@ return -1; } -void -unw_init_frame_info (struct unw_frame_info *info, struct task_struct *t, struct switch_stack *sw) +static void +init_frame_info (struct unw_frame_info *info, struct task_struct *t, + struct switch_stack *sw, unsigned long stktop) { - unsigned long rbslimit, rbstop, stklimit, stktop, sol; + unsigned long rbslimit, rbstop, stklimit; STAT(unsigned long start, flags;) STAT(local_irq_save(flags); ++unw.stat.api.inits; start = ia64_get_itc()); /* - * Subtle stuff here: we _could_ unwind through the - * switch_stack frame but we don't want to do that because it - * would be slow as each preserved register would have to be - * processed. Instead, what we do here is zero out the frame - * info and start the unwind process at the function that - * created the switch_stack frame. When a preserved value in - * switch_stack needs to be accessed, run_script() will + * Subtle stuff here: we _could_ unwind through the switch_stack frame but we + * don't want to do that because it would be slow as each preserved register would + * have to be processed. Instead, what we do here is zero out the frame info and + * start the unwind process at the function that created the switch_stack frame. + * When a preserved value in switch_stack needs to be accessed, run_script() will * initialize the appropriate pointer on demand. */ memset(info, 0, sizeof(*info)); @@ -1914,7 +1913,6 @@ rbstop = rbslimit; stklimit = (unsigned long) t + IA64_STK_OFFSET; - stktop = (unsigned long) sw - 16; if (stktop <= rbstop) stktop = rbstop; @@ -1924,34 +1922,56 @@ info->memstk.top = stktop; info->task = t; info->sw = sw; - info->sp = info->psp = (unsigned long) (sw + 1) - 16; - info->pt = 0; + info->sp = info->psp = stktop; + info->pr = sw->pr; + UNW_DPRINT(3, "unwind.%s:\n" + " task 0x%lx\n" + " rbs = [0x%lx-0x%lx)\n" + " stk = [0x%lx-0x%lx)\n" + " pr 0x%lx\n" + " sw 0x%lx\n" + " sp 0x%lx\n", + __FUNCTION__, (unsigned long) task, rbslimit, rbstop, stktop, stklimit, + info->pr, (unsigned long) info->sw, info->sp); + STAT(unw.stat.api.init_time += ia64_get_itc() - start; local_irq_restore(flags)); +} + +void +unw_init_from_interruption (struct unw_frame_info *info, struct task_struct *t, + struct pt_regs *pt, struct switch_stack *sw) +{ + unsigned long sof; + + init_frame_info(info, t, sw, pt->r12); + info->cfm_loc = &pt->cr_ifs; + sof = *info->cfm_loc & 0x7f; + info->bsp = (unsigned long) ia64_rse_skip_regs((unsigned long *) info->regstk.top, -sof); + info->ip = pt->cr_iip + ia64_psr(pt)->ri; + info->pt = (unsigned long) pt; + UNW_DPRINT(3, "unwind.%s:\n" + " bsp 0x%lx\n" + " sof 0x%lx\n" + " ip 0x%lx\n", + info->bsp, sof, info->ip); + find_save_locs(info); +} + +void +unw_init_frame_info (struct unw_frame_info *info, struct task_struct *t, struct switch_stack *sw) +{ + unsigned long sol; + + init_frame_info(info, t, sw, (unsigned long) (sw + 1) - 16); info->cfm_loc = &sw->ar_pfs; sol = (*info->cfm_loc >> 7) & 0x7f; info->bsp = (unsigned long) ia64_rse_skip_regs((unsigned long *) info->regstk.top, -sol); info->ip = sw->b0; - info->pr = sw->pr; - UNW_DPRINT(3, - "unwind.%s\n" - " rbslimit 0x%lx\n" - " rbstop 0x%lx\n" - " stklimit 0x%lx\n" - " stktop 0x%lx\n" - " task 0x%lx\n" - " sw 0x%lx\n", - __FUNCTION__, rbslimit, rbstop, stklimit, stktop, - (unsigned long)(info->task), - (unsigned long)(info->sw)); - UNW_DPRINT(3, - " sp/psp 0x%lx\n" - " sol 0x%lx\n" - " bsp 0x%lx\n" - " ip 0x%lx\n" - " pr 0x%lx\n", - info->sp, sol, info->bsp, info->ip, info->pr); - + UNW_DPRINT(3, "unwind.%s:\n" + " bsp 0x%lx\n" + " sol 0x%lx\n" + " ip 0x%lx\n", + info->bsp, sol, info->ip); find_save_locs(info); - STAT(unw.stat.api.init_time += ia64_get_itc() - start; local_irq_restore(flags)); } void diff -Nru a/arch/ia64/lib/io.c b/arch/ia64/lib/io.c --- a/arch/ia64/lib/io.c Wed Apr 16 18:32:25 2003 +++ b/arch/ia64/lib/io.c Wed Apr 16 18:32:25 2003 @@ -87,12 +87,31 @@ __ia64_outl(val, port); } -void -ia64_mmiob (void) +unsigned char +ia64_readb (void *addr) { - __ia64_mmiob(); + return __ia64_readb (addr); } +unsigned short +ia64_readw (void *addr) +{ + return __ia64_readw (addr); +} + +unsigned int +ia64_readl (void *addr) +{ + return __ia64_readl (addr); +} + +unsigned long +ia64_readq (void *addr) +{ + return __ia64_readq (addr); +} + + /* define aliases: */ asm (".global __ia64_inb, __ia64_inw, __ia64_inl"); @@ -105,7 +124,11 @@ asm ("__ia64_outw = ia64_outw"); asm ("__ia64_outl = ia64_outl"); -asm (".global __ia64_mmiob"); -asm ("__ia64_mmiob = ia64_mmiob"); +asm (".global __ia64_readb, __ia64_readw, __ia64_readl, __ia64_readq"); +asm ("__ia64_readb = ia64_readb"); +asm ("__ia64_readw = ia64_readw"); +asm ("__ia64_readl = ia64_readl"); +asm ("__ia64_readq = ia64_readq"); + #endif /* CONFIG_IA64_GENERIC */ diff -Nru a/arch/ia64/lib/swiotlb.c b/arch/ia64/lib/swiotlb.c --- a/arch/ia64/lib/swiotlb.c Wed Apr 16 18:32:26 2003 +++ b/arch/ia64/lib/swiotlb.c Wed Apr 16 18:32:26 2003 @@ -473,12 +473,6 @@ sync_single(hwdev, (void *) sg->dma_address, sg->dma_length, direction); } -unsigned long -swiotlb_dma_address (struct scatterlist *sg) -{ - return sg->dma_address; -} - /* * Return whether the given PCI device DMA address mask can be supported properly. For * example, if your device can only drive the low 24-bits during PCI bus mastering, then @@ -497,7 +491,6 @@ EXPORT_SYMBOL(swiotlb_unmap_sg); EXPORT_SYMBOL(swiotlb_sync_single); EXPORT_SYMBOL(swiotlb_sync_sg); -EXPORT_SYMBOL(swiotlb_dma_address); EXPORT_SYMBOL(swiotlb_alloc_consistent); EXPORT_SYMBOL(swiotlb_free_consistent); EXPORT_SYMBOL(swiotlb_pci_dma_supported); diff -Nru a/arch/ia64/mm/fault.c b/arch/ia64/mm/fault.c --- a/arch/ia64/mm/fault.c Wed Apr 16 18:32:26 2003 +++ b/arch/ia64/mm/fault.c Wed Apr 16 18:32:26 2003 @@ -58,6 +58,18 @@ if (in_atomic() || !mm) goto no_context; +#ifdef CONFIG_VIRTUAL_MEM_MAP + /* + * If fault is in region 5 and we are in the kernel, we may already + * have the mmap_sem (pfn_valid macro is called during mmap). There + * is no vma for region 5 addr's anyway, so skip getting the semaphore + * and go directly to the exception handling code. + */ + + if ((REGION_NUMBER(address) == 5) && !user_mode(regs)) + goto bad_area_no_up; +#endif + down_read(&mm->mmap_sem); vma = find_vma_prev(mm, address, &prev_vma); @@ -139,6 +151,9 @@ bad_area: up_read(&mm->mmap_sem); +#ifdef CONFIG_VIRTUAL_MEM_MAP + bad_area_no_up: +#endif if ((isr & IA64_ISR_SP) || ((isr & IA64_ISR_NA) && (isr & IA64_ISR_CODE_MASK) == IA64_ISR_CODE_LFETCH)) { @@ -194,6 +209,7 @@ up_read(&mm->mmap_sem); if (current->pid == 1) { yield(); + down_read(&mm->mmap_sem); goto survive; } printk(KERN_CRIT "VM: killing process %s\n", current->comm); diff -Nru a/arch/ia64/mm/init.c b/arch/ia64/mm/init.c --- a/arch/ia64/mm/init.c Wed Apr 16 18:32:26 2003 +++ b/arch/ia64/mm/init.c Wed Apr 16 18:32:26 2003 @@ -38,6 +38,13 @@ unsigned long MAX_DMA_ADDRESS = PAGE_OFFSET + 0x100000000UL; +#ifdef CONFIG_VIRTUAL_MEM_MAP +# define LARGE_GAP 0x40000000 /* Use virtual mem map if hole is > than this */ + unsigned long vmalloc_end = VMALLOC_END_INIT; + static struct page *vmem_map; + static unsigned long num_dma_physpages; +#endif + static int pgt_cache_water[2] = { 25, 50 }; void @@ -338,6 +345,144 @@ ia64_tlb_init(); } +#ifdef CONFIG_VIRTUAL_MEM_MAP + +static int +create_mem_map_page_table (u64 start, u64 end, void *arg) +{ + unsigned long address, start_page, end_page; + struct page *map_start, *map_end; + pgd_t *pgd; + pmd_t *pmd; + pte_t *pte; + + map_start = vmem_map + (__pa(start) >> PAGE_SHIFT); + map_end = vmem_map + (__pa(end) >> PAGE_SHIFT); + + start_page = (unsigned long) map_start & PAGE_MASK; + end_page = PAGE_ALIGN((unsigned long) map_end); + + for (address = start_page; address < end_page; address += PAGE_SIZE) { + pgd = pgd_offset_k(address); + if (pgd_none(*pgd)) + pgd_populate(&init_mm, pgd, alloc_bootmem_pages(PAGE_SIZE)); + pmd = pmd_offset(pgd, address); + + if (pmd_none(*pmd)) + pmd_populate_kernel(&init_mm, pmd, alloc_bootmem_pages(PAGE_SIZE)); + pte = pte_offset_kernel(pmd, address); + + if (pte_none(*pte)) + set_pte(pte, pfn_pte(__pa(alloc_bootmem_pages(PAGE_SIZE)) >> PAGE_SHIFT, + PAGE_KERNEL)); + } + return 0; +} + +struct memmap_init_callback_data { + memmap_init_callback_t *memmap_init; + struct page *start; + struct page *end; + int nid; + unsigned long zone; +}; + +static int +virtual_memmap_init (u64 start, u64 end, void *arg) +{ + struct memmap_init_callback_data *args; + struct page *map_start, *map_end; + + args = (struct memmap_init_callback_data *) arg; + + map_start = vmem_map + (__pa(start) >> PAGE_SHIFT); + map_end = vmem_map + (__pa(end) >> PAGE_SHIFT); + + if (map_start < args->start) + map_start = args->start; + if (map_end > args->end) + map_end = args->end; + + /* + * We have to initialize "out of bounds" struct page elements + * that fit completely on the same pages that were allocated + * for the "in bounds" elements because they may be referenced + * later (and found to be "reserved"). + */ + + map_start -= ((unsigned long) map_start & (PAGE_SIZE - 1)) / sizeof(struct page); + map_end += ((PAGE_ALIGN((unsigned long) map_end) - (unsigned long) map_end) + / sizeof(struct page)); + + if (map_start < map_end) + (*args->memmap_init)(map_start, (unsigned long)(map_end - map_start), + args->nid,args->zone,page_to_pfn(map_start)); + return 0; +} + +void +arch_memmap_init (memmap_init_callback_t *memmap_init, + struct page *start, unsigned long size, int nid, + unsigned long zone, unsigned long start_pfn) +{ + if (!vmem_map) + memmap_init(start,size,nid,zone,start_pfn); + else { + struct memmap_init_callback_data args; + + args.memmap_init = memmap_init; + args.start = start; + args.end = start + size; + args.nid = nid; + args.zone = zone; + + efi_memmap_walk(virtual_memmap_init, &args); + } +} + +int +ia64_pfn_valid (unsigned long pfn) +{ + char byte; + + return __get_user(byte, (char *) pfn_to_page(pfn)) == 0; +} + +static int +count_dma_pages (u64 start, u64 end, void *arg) +{ + unsigned long *count = arg; + + if (end <= MAX_DMA_ADDRESS) + *count += (end - start) >> PAGE_SHIFT; + return 0; +} + +static int +find_largest_hole (u64 start, u64 end, void *arg) +{ + u64 *max_gap = arg; + + static u64 last_end = PAGE_OFFSET; + + /* NOTE: this algorithm assumes efi memmap table is ordered */ + + if (*max_gap < (start - last_end)) + *max_gap = start - last_end; + last_end = end; + return 0; +} +#endif /* CONFIG_VIRTUAL_MEM_MAP */ + +static int +count_pages (u64 start, u64 end, void *arg) +{ + unsigned long *count = arg; + + *count += (end - start) >> PAGE_SHIFT; + return 0; +} + /* * Set up the page tables. */ @@ -349,18 +494,71 @@ extern void discontig_paging_init(void); discontig_paging_init(); + efi_memmap_walk(count_pages, &num_physpages); } #else /* !CONFIG_DISCONTIGMEM */ void paging_init (void) { - unsigned long max_dma, zones_size[MAX_NR_ZONES]; + unsigned long max_dma; + unsigned long zones_size[MAX_NR_ZONES]; +# ifdef CONFIG_VIRTUAL_MEM_MAP + unsigned long zholes_size[MAX_NR_ZONES]; + unsigned long max_gap; +# endif /* initialize mem_map[] */ memset(zones_size, 0, sizeof(zones_size)); + num_physpages = 0; + efi_memmap_walk(count_pages, &num_physpages); + max_dma = virt_to_phys((void *) MAX_DMA_ADDRESS) >> PAGE_SHIFT; + +# ifdef CONFIG_VIRTUAL_MEM_MAP + memset(zholes_size, 0, sizeof(zholes_size)); + + num_dma_physpages = 0; + efi_memmap_walk(count_dma_pages, &num_dma_physpages); + + if (max_low_pfn < max_dma) { + zones_size[ZONE_DMA] = max_low_pfn; + zholes_size[ZONE_DMA] = max_low_pfn - num_dma_physpages; + } + else { + zones_size[ZONE_DMA] = max_dma; + zholes_size[ZONE_DMA] = max_dma - num_dma_physpages; + if (num_physpages > num_dma_physpages) { + zones_size[ZONE_NORMAL] = max_low_pfn - max_dma; + zholes_size[ZONE_NORMAL] = ((max_low_pfn - max_dma) + - (num_physpages - num_dma_physpages)); + } + } + + max_gap = 0; + efi_memmap_walk(find_largest_hole, (u64 *)&max_gap); + if (max_gap < LARGE_GAP) { + vmem_map = (struct page *) 0; + free_area_init_node(0, &contig_page_data, NULL, zones_size, 0, zholes_size); + mem_map = contig_page_data.node_mem_map; + } + else { + unsigned long map_size; + + /* allocate virtual_mem_map */ + + map_size = PAGE_ALIGN(max_low_pfn * sizeof(struct page)); + vmalloc_end -= map_size; + vmem_map = (struct page *) vmalloc_end; + efi_memmap_walk(create_mem_map_page_table, 0); + + free_area_init_node(0, &contig_page_data, vmem_map, zones_size, 0, zholes_size); + + mem_map = contig_page_data.node_mem_map; + printk("Virtual mem_map starts at 0x%p\n", mem_map); + } +# else /* !CONFIG_VIRTUAL_MEM_MAP */ if (max_low_pfn < max_dma) zones_size[ZONE_DMA] = max_low_pfn; else { @@ -368,19 +566,11 @@ zones_size[ZONE_NORMAL] = max_low_pfn - max_dma; } free_area_init(zones_size); +# endif /* !CONFIG_VIRTUAL_MEM_MAP */ } #endif /* !CONFIG_DISCONTIGMEM */ static int -count_pages (u64 start, u64 end, void *arg) -{ - unsigned long *count = arg; - - *count += (end - start) >> PAGE_SHIFT; - return 0; -} - -static int count_reserved_pages (u64 start, u64 end, void *arg) { unsigned long num_reserved = 0; @@ -415,9 +605,6 @@ BUG(); max_mapnr = max_low_pfn; #endif - - num_physpages = 0; - efi_memmap_walk(count_pages, &num_physpages); high_memory = __va(max_low_pfn * PAGE_SIZE); diff -Nru a/arch/ia64/module.lds b/arch/ia64/module.lds --- /dev/null Wed Dec 31 16:00:00 1969 +++ b/arch/ia64/module.lds Wed Apr 16 18:32:26 2003 @@ -0,0 +1,13 @@ +SECTIONS { + /* Group unwind sections into a single section: */ + .IA_64.unwind_info : { *(.IA_64.unwind_info*) } + .IA_64.unwind : { *(.IA_64.unwind*) } + /* + * Create place-holder sections to hold the PLTs, GOT, and + * official procedure-descriptors (.opd). + */ + .core.plt : { BYTE(0) } + .init.plt : { BYTE(0) } + .got : { BYTE(0) } + .opd : { BYTE(0) } +} diff -Nru a/arch/ia64/pci/pci.c b/arch/ia64/pci/pci.c --- a/arch/ia64/pci/pci.c Wed Apr 16 18:32:26 2003 +++ b/arch/ia64/pci/pci.c Wed Apr 16 18:32:26 2003 @@ -49,11 +49,13 @@ /* * Low-level SAL-based PCI configuration access functions. Note that SAL * calls are already serialized (via sal_lock), so we don't need another - * synchronization mechanism here. Not using segment number (yet). + * synchronization mechanism here. */ -#define PCI_SAL_ADDRESS(bus, dev, fn, reg) \ - ((u64)(bus << 16) | (u64)(dev << 11) | (u64)(fn << 8) | (u64)(reg)) +#define PCI_SAL_ADDRESS(seg, bus, dev, fn, reg) \ + ((u64)(seg << 24) | (u64)(bus << 16) | \ + (u64)(dev << 11) | (u64)(fn << 8) | (u64)(reg)) + static int __pci_sal_read (int seg, int bus, int dev, int fn, int reg, int len, u32 *value) @@ -61,10 +63,10 @@ int result = 0; u64 data = 0; - if (!value || (bus > 255) || (dev > 31) || (fn > 7) || (reg > 255)) + if (!value || (seg > 255) || (bus > 255) || (dev > 31) || (fn > 7) || (reg > 255)) return -EINVAL; - result = ia64_sal_pci_config_read(PCI_SAL_ADDRESS(bus, dev, fn, reg), len, &data); + result = ia64_sal_pci_config_read(PCI_SAL_ADDRESS(seg, bus, dev, fn, reg), len, &data); *value = (u32) data; @@ -74,24 +76,24 @@ static int __pci_sal_write (int seg, int bus, int dev, int fn, int reg, int len, u32 value) { - if ((bus > 255) || (dev > 31) || (fn > 7) || (reg > 255)) + if ((seg > 255) || (bus > 255) || (dev > 31) || (fn > 7) || (reg > 255)) return -EINVAL; - return ia64_sal_pci_config_write(PCI_SAL_ADDRESS(bus, dev, fn, reg), len, value); + return ia64_sal_pci_config_write(PCI_SAL_ADDRESS(seg, bus, dev, fn, reg), len, value); } static int pci_sal_read (struct pci_bus *bus, unsigned int devfn, int where, int size, u32 *value) { - return __pci_sal_read(0, bus->number, PCI_SLOT(devfn), PCI_FUNC(devfn), + return __pci_sal_read(PCI_SEGMENT(bus), bus->number, PCI_SLOT(devfn), PCI_FUNC(devfn), where, size, value); } static int pci_sal_write (struct pci_bus *bus, unsigned int devfn, int where, int size, u32 value) { - return __pci_sal_write(0, bus->number, PCI_SLOT(devfn), PCI_FUNC(devfn), + return __pci_sal_write(PCI_SEGMENT(bus), bus->number, PCI_SLOT(devfn), PCI_FUNC(devfn), where, size, value); } @@ -114,24 +116,91 @@ subsys_initcall(pci_acpi_init); +static void __init +pcibios_fixup_resource(struct resource *res, u64 offset) +{ + res->start += offset; + res->end += offset; +} + +void __init +pcibios_fixup_device_resources(struct pci_dev *dev, struct pci_bus *bus) +{ + int i; + + for (i = 0; i < PCI_NUM_RESOURCES; i++) { + if (!dev->resource[i].start) + continue; + if (dev->resource[i].flags & IORESOURCE_MEM) + pcibios_fixup_resource(&dev->resource[i], + PCI_CONTROLLER(dev)->mem_offset); + } +} + /* Called by ACPI when it finds a new root bus. */ + +static struct pci_controller * +alloc_pci_controller(int seg) +{ + struct pci_controller *controller; + + controller = kmalloc(sizeof(*controller), GFP_KERNEL); + if (!controller) + return NULL; + + memset(controller, 0, sizeof(*controller)); + controller->segment = seg; + return controller; +} + struct pci_bus * -pcibios_scan_root (int bus) +scan_root_bus(int bus, struct pci_ops *ops, void *sysdata) { - struct list_head *list; - struct pci_bus *pci_bus; + struct pci_bus *b; - list_for_each(list, &pci_root_buses) { - pci_bus = pci_bus_b(list); - if (pci_bus->number == bus) { - /* Already scanned */ - printk("PCI: Bus (%02x) already probed\n", bus); - return pci_bus; - } - } + /* + * We know this is a new root bus we haven't seen before, so + * scan it, even if we've seen the same bus number in a different + * segment. + */ + b = kmalloc(sizeof(*b), GFP_KERNEL); + if (!b) + return NULL; + + memset(b, 0, sizeof(*b)); + INIT_LIST_HEAD(&b->children); + INIT_LIST_HEAD(&b->devices); + + list_add_tail(&b->node, &pci_root_buses); + + b->number = b->secondary = bus; + b->resource[0] = &ioport_resource; + b->resource[1] = &iomem_resource; + + b->sysdata = sysdata; + b->ops = ops; + b->subordinate = pci_do_scan_bus(b); + + return b; +} + +struct pci_bus * +pcibios_scan_root(void *handle, int seg, int bus) +{ + struct pci_controller *controller; + u64 base, size, offset; + + printk("PCI: Probing PCI hardware on bus (%02x:%02x)\n", seg, bus); + controller = alloc_pci_controller(seg); + if (!controller) + return NULL; + + controller->acpi_handle = handle; - printk("PCI: Probing PCI hardware on bus (%02x)\n", bus); - return pci_scan_bus(bus, pci_root_ops, NULL); + acpi_get_addr_space(handle, ACPI_MEMORY_RANGE, &base, &size, &offset); + controller->mem_offset = offset; + + return scan_root_bus(bus, pci_root_ops, controller); } /* @@ -140,6 +209,11 @@ void __devinit pcibios_fixup_bus (struct pci_bus *b) { + struct list_head *ln; + + for (ln = b->devices.next; ln != &b->devices; ln = ln->next) + pcibios_fixup_device_resources(pci_dev_b(ln), b); + return; } diff -Nru a/arch/ia64/scripts/check-gas b/arch/ia64/scripts/check-gas --- a/arch/ia64/scripts/check-gas Wed Apr 16 18:32:26 2003 +++ b/arch/ia64/scripts/check-gas Wed Apr 16 18:32:26 2003 @@ -1,8 +1,9 @@ #!/bin/sh dir=$(dirname $0) CC=$1 +OBJDUMP=$2 $CC -c $dir/check-gas-asm.S -res=$(objdump -r --section .data check-gas-asm.o | fgrep 00004 | tr -s ' ' |cut -f3 -d' ') +res=$($OBJDUMP -r --section .data check-gas-asm.o | fgrep 00004 | tr -s ' ' |cut -f3 -d' ') if [ $res != ".text" ]; then echo buggy else diff -Nru a/arch/ia64/sn/Makefile b/arch/ia64/sn/Makefile --- /dev/null Wed Dec 31 16:00:00 1969 +++ b/arch/ia64/sn/Makefile Wed Apr 16 18:32:26 2003 @@ -0,0 +1,14 @@ +# arch/ia64/sn/Makefile +# +# This file is subject to the terms and conditions of the GNU General Public +# License. See the file "COPYING" in the main directory of this archive +# for more details. +# +# Copyright (C) 2003 Silicon Graphics, Inc. All Rights Reserved. +# +# Makefile for the sn ia64 subplatform +# + +EXTRA_CFLAGS := -DLITTLE_ENDIAN + +obj-y += kernel/ # io/ diff -Nru a/arch/ia64/sn/fakeprom/Makefile b/arch/ia64/sn/fakeprom/Makefile --- a/arch/ia64/sn/fakeprom/Makefile Wed Apr 16 18:32:26 2003 +++ b/arch/ia64/sn/fakeprom/Makefile Wed Apr 16 18:32:26 2003 @@ -1,20 +1,29 @@ +# arch/ia64/sn/fakeprom/Makefile # # This file is subject to the terms and conditions of the GNU General Public # License. See the file "COPYING" in the main directory of this archive # for more details. # -# Copyright (c) 2000-2001 Silicon Graphics, Inc. All rights reserved. +# Copyright (c) 2000-2003 Silicon Graphics, Inc. All rights reserved. # +# Medusa fake PROM support +# + +EXTRA_TARGETS := fpromasm.o main.o fw-emu.o fpmem.o klgraph_init.o \ + fprom vmlinux.sym + +OBJS := $(obj)/fpromasm.o $(obj)/main.o $(obj)/fw-emu.o $(obj)/fpmem.o \ + $(obj)/klgraph_init.o + +LDFLAGS_fprom = -static -T -obj-y=fpromasm.o main.o fw-emu.o fpmem.o klgraph_init.o +.PHONY: fprom -fprom: $(OBJ) - $(LD) -static -Tfprom.lds -o fprom $(OBJ) $(LIB) +fprom: $(obj)/fprom -.S.o: - $(CC) -D__ASSEMBLY__ $(AFLAGS) $(AFLAGS_KERNEL) -c -o $*.o $< -.c.o: - $(CC) $(CFLAGS) $(CFLAGS_KERNEL) -c -o $*.o $< +$(obj)/fprom: $(src)/fprom.lds $(OBJS) arch/ia64/lib/lib.a FORCE + $(call if_changed,ld) -clean: - rm -f *.o fprom +$(obj)/vmlinux.sym: $(src)/make_textsym System.map + $(src)/make_textsym vmlinux > vmlinux.sym + $(call cmd,cptotop) diff -Nru a/arch/ia64/sn/fakeprom/README b/arch/ia64/sn/fakeprom/README --- a/arch/ia64/sn/fakeprom/README Wed Apr 16 18:32:26 2003 +++ b/arch/ia64/sn/fakeprom/README Wed Apr 16 18:32:26 2003 @@ -1,3 +1,35 @@ +/* + * Copyright (c) 2002-2003 Silicon Graphics, Inc. All Rights Reserved. + * + * This program is free software; you can redistribute it and/or modify it + * under the terms of version 2 of the GNU General Public License + * as published by the Free Software Foundation. + * + * This program is distributed in the hope that it would be useful, but + * WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. + * + * Further, this software is distributed without any warranty that it is + * free of the rightful claim of any third person regarding infringement + * or the like. Any license provided herein, whether implied or + * otherwise, applies only to this software file. Patent licenses, if + * any, provided herein do not apply to combinations of this program with + * other software, or any other product whatsoever. + * + * You should have received a copy of the GNU General Public + * License along with this program; if not, write the Free Software + * Foundation, Inc., 59 Temple Place - Suite 330, Boston MA 02111-1307, USA. + * + * Contact information: Silicon Graphics, Inc., 1600 Amphitheatre Pkwy, + * Mountain View, CA 94043, or: + * + * http://www.sgi.com + * + * For further information regarding this notice, see: + * + * http://oss.sgi.com/projects/GenInfo/NoticeExplan + */ + This directory contains the files required to build the fake PROM image that is currently being used to boot IA64 kernels running under the SGI Medusa kernel. diff -Nru a/arch/ia64/sn/fakeprom/fpmem.c b/arch/ia64/sn/fakeprom/fpmem.c --- a/arch/ia64/sn/fakeprom/fpmem.c Wed Apr 16 18:32:26 2003 +++ b/arch/ia64/sn/fakeprom/fpmem.c Wed Apr 16 18:32:26 2003 @@ -4,7 +4,7 @@ * License. See the file "COPYING" in the main directory of this archive * for more details. * - * Copyright (C) 2000-2002 Silicon Graphics, Inc. All rights reserved. + * Copyright (C) 2000-2003 Silicon Graphics, Inc. All rights reserved. */ @@ -168,13 +168,13 @@ #endif void -build_mem_desc(efi_memory_desc_t *md, int type, long paddr, long numbytes) +build_mem_desc(efi_memory_desc_t *md, int type, long paddr, long numbytes, long attr) { md->type = type; md->phys_addr = paddr; md->virt_addr = 0; md->num_pages = numbytes >> 12; - md->attribute = EFI_MEMORY_WB; + md->attribute = attr; } int @@ -236,28 +236,40 @@ */ if (bank == 0) { if (cnode == 0) { + hole = 2*1024*1024; + build_mem_desc(md, EFI_PAL_CODE, paddr, hole, EFI_MEMORY_WB|EFI_MEMORY_WB); + numbytes -= hole; + paddr += hole; + count++ ; + md += mdsize; hole = 1*1024*1024; - build_mem_desc(md, EFI_PAL_CODE, paddr, hole); + build_mem_desc(md, EFI_CONVENTIONAL_MEMORY, paddr, hole, EFI_MEMORY_UC); numbytes -= hole; paddr += hole; count++ ; md += mdsize; - hole = 3*1024*1024; - build_mem_desc(md, EFI_RUNTIME_SERVICES_DATA, paddr, hole); + hole = 1*1024*1024; + build_mem_desc(md, EFI_RUNTIME_SERVICES_DATA, paddr, hole, EFI_MEMORY_WB|EFI_MEMORY_WB); numbytes -= hole; paddr += hole; count++ ; md += mdsize; } else { - hole = PROMRESERVED_SIZE; - build_mem_desc(md, EFI_RUNTIME_SERVICES_DATA, paddr, hole); + hole = 2*1024*1024; + build_mem_desc(md, EFI_RUNTIME_SERVICES_DATA, paddr, hole, EFI_MEMORY_WB|EFI_MEMORY_WB); + numbytes -= hole; + paddr += hole; + count++ ; + md += mdsize; + hole = 2*1024*1024; + build_mem_desc(md, EFI_RUNTIME_SERVICES_DATA, paddr, hole, EFI_MEMORY_UC); numbytes -= hole; paddr += hole; count++ ; md += mdsize; } } - build_mem_desc(md, EFI_CONVENTIONAL_MEMORY, paddr, numbytes); + build_mem_desc(md, EFI_CONVENTIONAL_MEMORY, paddr, numbytes, EFI_MEMORY_WB|EFI_MEMORY_WB); md += mdsize ; count++ ; diff -Nru a/arch/ia64/sn/fakeprom/fprom.lds b/arch/ia64/sn/fakeprom/fprom.lds --- a/arch/ia64/sn/fakeprom/fprom.lds Wed Apr 16 18:32:26 2003 +++ b/arch/ia64/sn/fakeprom/fprom.lds Wed Apr 16 18:32:26 2003 @@ -1,3 +1,34 @@ +/* + * Copyright (c) 2002-2003 Silicon Graphics, Inc. All Rights Reserved. + * + * This program is free software; you can redistribute it and/or modify it + * under the terms of version 2 of the GNU General Public License + * as published by the Free Software Foundation. + * + * This program is distributed in the hope that it would be useful, but + * WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. + * + * Further, this software is distributed without any warranty that it is + * free of the rightful claim of any third person regarding infringement + * or the like. Any license provided herein, whether implied or + * otherwise, applies only to this software file. Patent licenses, if + * any, provided herein do not apply to combinations of this program with + * other software, or any other product whatsoever. + * + * You should have received a copy of the GNU General Public + * License along with this program; if not, write the Free Software + * Foundation, Inc., 59 Temple Place - Suite 330, Boston MA 02111-1307, USA. + * + * Contact information: Silicon Graphics, Inc., 1600 Amphitheatre Pkwy, + * Mountain View, CA 94043, or: + * + * http://www.sgi.com + * + * For further information regarding this notice, see: + * + * http://oss.sgi.com/projects/GenInfo/NoticeExplan + */ OUTPUT_FORMAT("elf64-ia64-little") OUTPUT_ARCH(ia64) diff -Nru a/arch/ia64/sn/fakeprom/make_textsym b/arch/ia64/sn/fakeprom/make_textsym --- /dev/null Wed Dec 31 16:00:00 1969 +++ b/arch/ia64/sn/fakeprom/make_textsym Wed Apr 16 18:32:25 2003 @@ -0,0 +1,171 @@ +#!/bin/sh +# +# Build a textsym file for use in the Arium ITP probe. +# +# +# This file is subject to the terms and conditions of the GNU General Public +# License. See the file "COPYING" in the main directory of this archive +# for more details. +# +# Copyright (c) 2001-2002 Silicon Graphics, Inc. All rights reserved. +# + +help() { +cat < []] + If no input file is specified, it defaults to vmlinux. + If no output file name is specified, it defaults to "textsym". +END +exit 1 +} + +err () { + echo "ERROR - $*" >&2 + exit 1 +} + + +OPTS="H" +while getopts "$OPTS" c ; do + case $c in + H) help;; + \?) help;; + esac + +done +shift `expr $OPTIND - 1` + +LINUX=${1:-vmlinux} +TEXTSYM=${2:-${LINUX}.sym} +TMPSYM=${2:-${LINUX}.sym.tmp} +trap "/bin/rm -f $TMPSYM" 0 + +[ -f $VMLINUX ] || help + +$OBJDUMP -t $LINUX | egrep -v '__ks' | sort > $TMPSYM +SN1=`egrep "dig_setup|Synergy_da_indr" $TMPSYM|wc -l` + +# Dataprefix and textprefix correspond to the VGLOBAL_BASE and VPERNODE_BASE. +# Eventually, these values should be: +# dataprefix ffffffff +# textprefix fffffffe +# but right now they're still changing, so make them dynamic. +dataprefix=`awk ' / \.data / { print substr($1, 0, 8) ; exit ; }' $TMPSYM` +textprefix=`awk ' / \.text / { print substr($1, 0, 8) ; exit ; }' $TMPSYM` + +# pipe everything thru sort +echo "TEXTSYM V1.0" +(cat < 0) { + n = n*16 + substr(s,1,1) + s = substr(s,2) + } + printf "GLOBAL | %s | DATA | %s | %d\n", $1, $NF, n + } + } + if($NF == "_end") + exit + +} +' $TMPSYM ) | egrep -v " __device| __vendor" | awk -v sn1="$SN1" ' +/GLOBAL/ { + print $0 + if (sn1 != 0) { + /* 32 bits of sn1 physical addrs, */ + print substr($0,1,9) "04" substr($0,20,16) "Phy_" substr($0,36) + } else { + /* 38 bits of sn2 physical addrs, need addr space bits */ + print substr($0,1,9) "3004" substr($0,20,16) "Phy_" substr($0,36) + } + +} ' | sort -k3 + +N=`wc -l $TEXTSYM|awk '{print $1}'` +echo "Generated TEXTSYM file" >&2 +echo " $LINUX --> $TEXTSYM" >&2 +echo " Found $N symbols" >&2 diff -Nru a/arch/ia64/sn/io/Makefile b/arch/ia64/sn/io/Makefile --- a/arch/ia64/sn/io/Makefile Wed Apr 16 18:32:26 2003 +++ b/arch/ia64/sn/io/Makefile Wed Apr 16 18:32:26 2003 @@ -1,3 +1,4 @@ +# arch/ia64/sn/io/Makefile # # This file is subject to the terms and conditions of the GNU General Public # License. See the file "COPYING" in the main directory of this archive @@ -5,7 +6,8 @@ # # Copyright (C) 2000-2002 Silicon Graphics, Inc. All Rights Reserved. # -# Makefile for the sn kernel routines. +# Makefile for the sn io routines. +# EXTRA_CFLAGS := -DLITTLE_ENDIAN @@ -19,4 +21,6 @@ alenlist.o pci.o pci_dma.o ate_utils.o \ ifconfig_net.o io.o ioconfig_bus.o -obj-$(CONFIG_PCIBA) += pciba.o +obj-$(CONFIG_IA64_SGI_SN2) += sn2/ + +obj-$(CONFIG_PCIBA) += pciba.o diff -Nru a/arch/ia64/sn/io/sn2/Makefile b/arch/ia64/sn/io/sn2/Makefile --- a/arch/ia64/sn/io/sn2/Makefile Wed Apr 16 18:32:26 2003 +++ b/arch/ia64/sn/io/sn2/Makefile Wed Apr 16 18:32:26 2003 @@ -1,3 +1,4 @@ +# arch/ia64/sn/io/sn2/Makefile # # This file is subject to the terms and conditions of the GNU General Public # License. See the file "COPYING" in the main directory of this archive @@ -6,14 +7,14 @@ # Copyright (C) 2002-2003 Silicon Graphics, Inc. All Rights Reserved. # # Makefile for the sn2 specific io routines. +# -EXTRA_CFLAGS := -DLITTLE_ENDIAN +EXTRA_CFLAGS := -DLITTLE_ENDIAN -obj-y += bte_error.o geo_op.o klconflib.o klgraph.o l1.o \ +obj-y += pcibr/ bte_error.o geo_op.o klconflib.o klgraph.o l1.o \ l1_command.o ml_iograph.o ml_SN_init.o ml_SN_intr.o module.o \ pci_bus_cvlink.o pciio.o pic.o sgi_io_init.o shub.o shuberror.o \ shub_intr.o shubio.o xbow.o xtalk.o obj-$(CONFIG_KDB) += kdba_io.o - obj-$(CONFIG_SHUB_1_0_SPECIFIC) += efi-rtc.o diff -Nru a/arch/ia64/sn/io/sn2/l1_command.c b/arch/ia64/sn/io/sn2/l1_command.c --- a/arch/ia64/sn/io/sn2/l1_command.c Wed Apr 16 18:32:26 2003 +++ b/arch/ia64/sn/io/sn2/l1_command.c Wed Apr 16 18:32:26 2003 @@ -154,7 +154,7 @@ return ret; } - +#ifdef CONFIG_PCI /* * iobrick_module_get_nasid() returns a module_id which has the brick * type encoded in bits 15-12, but this is not the true brick type... @@ -185,7 +185,7 @@ return -1; /* unknown brick */ } - +#endif int iobrick_module_get_nasid(nasid_t nasid) { int io_moduleid; diff -Nru a/arch/ia64/sn/io/sn2/pcibr/Makefile b/arch/ia64/sn/io/sn2/pcibr/Makefile --- a/arch/ia64/sn/io/sn2/pcibr/Makefile Wed Apr 16 18:32:26 2003 +++ b/arch/ia64/sn/io/sn2/pcibr/Makefile Wed Apr 16 18:32:26 2003 @@ -1,3 +1,4 @@ +# arch/ia64/sn/io/sn2/pcibr/Makefile # # This file is subject to the terms and conditions of the GNU General Public # License. See the file "COPYING" in the main directory of this archive @@ -6,6 +7,7 @@ # Copyright (C) 2002-2003 Silicon Graphics, Inc. All Rights Reserved. # # Makefile for the sn2 specific pci bridge routines. +# EXTRA_CFLAGS := -DLITTLE_ENDIAN diff -Nru a/arch/ia64/sn/kernel/Makefile b/arch/ia64/sn/kernel/Makefile --- a/arch/ia64/sn/kernel/Makefile Wed Apr 16 18:32:25 2003 +++ b/arch/ia64/sn/kernel/Makefile Wed Apr 16 18:32:25 2003 @@ -1,46 +1,18 @@ # arch/ia64/sn/kernel/Makefile # -# Copyright (C) 1999,2001-2002 Silicon Graphics, Inc. All Rights Reserved. +# This file is subject to the terms and conditions of the GNU General Public +# License. See the file "COPYING" in the main directory of this archive +# for more details. # -# This program is free software; you can redistribute it and/or modify it -# under the terms of version 2 of the GNU General Public License -# as published by the Free Software Foundation. -# -# This program is distributed in the hope that it would be useful, but -# WITHOUT ANY WARRANTY; without even the implied warranty of -# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. -# -# Further, this software is distributed without any warranty that it is -# free of the rightful claim of any third person regarding infringement -# or the like. Any license provided herein, whether implied or -# otherwise, applies only to this software file. Patent licenses, if -# any, provided herein do not apply to combinations of this program with -# other software, or any other product whatsoever. -# -# You should have received a copy of the GNU General Public -# License along with this program; if not, write the Free Software -# Foundation, Inc., 59 Temple Place - Suite 330, Boston MA 02111-1307, USA. -# -# Contact information: Silicon Graphics, Inc., 1600 Amphitheatre Pkwy, -# Mountain View, CA 94043, or: -# -# http://www.sgi.com -# -# For further information regarding this notice, see: -# -# http://oss.sgi.com/projects/GenInfo/NoticeExplan +# Copyright (C) 1999,2001-2003 Silicon Graphics, Inc. All Rights Reserved. # -EXTRA_CFLAGS := -DLITTLE_ENDIAN +EXTRA_CFLAGS := -DLITTLE_ENDIAN -.S.s: - $(CPP) $(AFLAGS) $(AFLAGS_KERNEL) -o $*.s $< -.S.o: - $(CC) $(AFLAGS) $(AFLAGS_KERNEL) -c -o $*.o $< +obj-y := probe.o setup.o sn_asm.o sv.o bte.o iomv.o \ + irq.o mca.o -obj-y = probe.o setup.o sn_asm.o sv.o bte.o iomv.o -obj-$(CONFIG_IA64_SGI_SN1) += irq.o mca.o -obj-$(CONFIG_IA64_SGI_SN2) += irq.o mca.o +obj-$(CONFIG_IA64_SGI_SN2) += sn2/ obj-$(CONFIG_IA64_SGI_AUTOTEST) += llsc4.o misctest.o obj-$(CONFIG_IA64_GENERIC) += machvec.o obj-$(CONFIG_MODULES) += sn_ksyms.o diff -Nru a/arch/ia64/sn/kernel/setup.c b/arch/ia64/sn/kernel/setup.c --- a/arch/ia64/sn/kernel/setup.c Wed Apr 16 18:32:26 2003 +++ b/arch/ia64/sn/kernel/setup.c Wed Apr 16 18:32:26 2003 @@ -237,7 +237,7 @@ "%x.%02x\n", SN_SAL_MIN_MAJOR, SN_SAL_MIN_MINOR); panic("PROM version too old\n"); } - +#ifdef CONFIG_PCI #ifdef CONFIG_IA64_SGI_SN2 { extern void io_sh_swapper(int, int); @@ -253,7 +253,7 @@ (void)get_master_baseio_nasid(); } #endif - +#endif /* CONFIG_PCI */ status = ia64_sal_freq_base(SAL_FREQ_BASE_REALTIME_CLOCK, &ticks_per_sec, &drift); if (status != 0 || ticks_per_sec < 100000) { printk(KERN_WARNING "unable to determine platform RTC clock frequency, guessing.\n"); @@ -349,7 +349,7 @@ for (cnode=0; cnode < numnodes; cnode++) memcpy(nodepdaindr[cnode]->pernode_pdaindr, nodepdaindr, sizeof(nodepdaindr)); - +#ifdef CONFIG_PCI /* * Set up IO related platform-dependent nodepda fields. * The following routine actually sets up the hubinfo struct @@ -359,6 +359,7 @@ init_platform_nodepda(nodepdaindr[cnode], cnode); bte_init_node (nodepdaindr[cnode], cnode); } +#endif } /** diff -Nru a/arch/ia64/sn/kernel/sn2/Makefile b/arch/ia64/sn/kernel/sn2/Makefile --- a/arch/ia64/sn/kernel/sn2/Makefile Wed Apr 16 18:32:26 2003 +++ b/arch/ia64/sn/kernel/sn2/Makefile Wed Apr 16 18:32:26 2003 @@ -1,38 +1,14 @@ -# # arch/ia64/sn/kernel/sn2/Makefile # +# This file is subject to the terms and conditions of the GNU General Public +# License. See the file "COPYING" in the main directory of this archive +# for more details. +# # Copyright (C) 1999,2001-2002 Silicon Graphics, Inc. All rights reserved. # -# This program is free software; you can redistribute it and/or modify it -# under the terms of version 2 of the GNU General Public License -# as published by the Free Software Foundation. -# -# This program is distributed in the hope that it would be useful, but -# WITHOUT ANY WARRANTY; without even the implied warranty of -# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. -# -# Further, this software is distributed without any warranty that it is -# free of the rightful claim of any third person regarding infringement -# or the like. Any license provided herein, whether implied or -# otherwise, applies only to this software file. Patent licenses, if -# any, provided herein do not apply to combinations of this program with -# other software, or any other product whatsoever. -# -# You should have received a copy of the GNU General Public -# License along with this program; if not, write the Free Software -# Foundation, Inc., 59 Temple Place - Suite 330, Boston MA 02111-1307, USA. -# -# Contact information: Silicon Graphics, Inc., 1600 Amphitheatre Pkwy, -# Mountain View, CA 94043, or: -# -# http://www.sgi.com -# -# For further information regarding this notice, see: -# -# http://oss.sgi.com/projects/GenInfo/NoticeExplan +# sn2 specific kernel files # -EXTRA_CFLAGS := -DLITTLE_ENDIAN +EXTRA_CFLAGS := -DLITTLE_ENDIAN -obj-y += cache.o iomv.o ptc_deadlock.o sn2_smp.o \ - sn_proc_fs.o +obj-y += cache.o iomv.o ptc_deadlock.o sn2_smp.o sn_proc_fs.o diff -Nru a/arch/ia64/sn/kernel/sn2/io.c b/arch/ia64/sn/kernel/sn2/io.c --- /dev/null Wed Dec 31 16:00:00 1969 +++ b/arch/ia64/sn/kernel/sn2/io.c Wed Apr 16 18:32:26 2003 @@ -0,0 +1,98 @@ +/* + * This file is subject to the terms and conditions of the GNU General Public + * License. See the file "COPYING" in the main directory of this archive + * for more details. + * + * Copyright (C) 2003 Silicon Graphics, Inc. All rights reserved. + * + * The generic kernel requires function pointers to these routines, so + * we wrap the inlines from asm/ia64/sn/sn2/io.h here. + */ + +#include +#include + +#include + +#ifdef CONFIG_IA64_GENERIC + +unsigned int +sn_inb (unsigned long port) +{ + return __sn_inb(port); +} + +unsigned int +sn_inw (unsigned long port) +{ + return __sn_inw(port); +} + +unsigned int +sn_inl (unsigned long port) +{ + return __sn_inl(port); +} + +void +sn_outb (unsigned char val, unsigned long port) +{ + __sn_outb(val, port); +} + +void +sn_outw (unsigned short val, unsigned long port) +{ + __sn_outw(val, port); +} + +void +sn_outl (unsigned int val, unsigned long port) +{ + __sn_outl(val, port); +} + +unsigned char +sn_readb (void *addr) +{ + return __sn_readb (addr); +} + +unsigned short +sn_readw (void *addr) +{ + return __sn_readw (addr); +} + +unsigned int +sn_readl (void *addr) +{ + return __sn_readl (addr); +} + +unsigned long +sn_readq (void *addr) +{ + return __sn_readq (addr) +} + + +/* define aliases: */ + +asm (".global __sn_inb, __sn_inw, __sn_inl"); +asm ("__sn_inb = sn_inb"); +asm ("__sn_inw = sn_inw"); +asm ("__sn_inl = sn_inl"); + +asm (".global __sn_outb, __sn_outw, __sn_outl"); +asm ("__sn_outb = sn_outb"); +asm ("__sn_outw = sn_outw"); +asm ("__sn_outl = sn_outl"); + +asm (".global __sn_readb, __sn_readw, __sn_readl, __sn_readq"); +asm ("__sn_readb = sn_readb"); +asm ("__sn_readw = sn_readw"); +asm ("__sn_readl = sn_readl"); +asm ("__sn_readq = sn_readq"); + +#endif /* CONFIG_IA64_GENERIC */ diff -Nru a/arch/ia64/sn/kernel/sn2/iomv.c b/arch/ia64/sn/kernel/sn2/iomv.c --- a/arch/ia64/sn/kernel/sn2/iomv.c Wed Apr 16 18:32:26 2003 +++ b/arch/ia64/sn/kernel/sn2/iomv.c Wed Apr 16 18:32:26 2003 @@ -3,10 +3,11 @@ * License. See the file "COPYING" in the main directory of this archive * for more details. * - * Copyright (C) 2000-2002 Silicon Graphics, Inc. All rights reserved. + * Copyright (C) 2000-2003 Silicon Graphics, Inc. All rights reserved. */ #include +#include #include #include #include @@ -46,8 +47,10 @@ } } +EXPORT_SYMBOL(sn_io_addr); + /** - * sn2_mmiob - I/O space memory barrier + * sn_mmiob - I/O space memory barrier * * Acts as a memory mapped I/O barrier for platforms that queue writes to * I/O space. This ensures that subsequent writes to I/O space arrive after @@ -60,9 +63,9 @@ * */ void -sn2_mmiob (void) +sn_mmiob (void) { - while ((((volatile unsigned long) (*pda->pio_write_status_addr)) & SH_PIO_WRITE_STATUS_0_PENDING_WRITE_COUNT_MASK) != + while ((((volatile unsigned long) (*pda.pio_write_status_addr)) & SH_PIO_WRITE_STATUS_0_PENDING_WRITE_COUNT_MASK) != SH_PIO_WRITE_STATUS_0_PENDING_WRITE_COUNT_MASK) udelay(1); } diff -Nru a/arch/ia64/sn/tools/make_textsym b/arch/ia64/sn/tools/make_textsym --- a/arch/ia64/sn/tools/make_textsym Wed Apr 16 18:32:25 2003 +++ /dev/null Wed Dec 31 16:00:00 1969 @@ -1,171 +0,0 @@ -#!/bin/sh -# -# Build a textsym file for use in the Arium ITP probe. -# -# -# This file is subject to the terms and conditions of the GNU General Public -# License. See the file "COPYING" in the main directory of this archive -# for more details. -# -# Copyright (c) 2001-2002 Silicon Graphics, Inc. All rights reserved. -# - -help() { -cat < []] - If no input file is specified, it defaults to vmlinux. - If no output file name is specified, it defaults to "textsym". -END -exit 1 -} - -err () { - echo "ERROR - $*" >&2 - exit 1 -} - - -OPTS="H" -while getopts "$OPTS" c ; do - case $c in - H) help;; - \?) help;; - esac - -done -shift `expr $OPTIND - 1` - -LINUX=${1:-vmlinux} -TEXTSYM=${2:-${LINUX}.sym} -TMPSYM=${2:-${LINUX}.sym.tmp} -trap "/bin/rm -f $TMPSYM" 0 - -[ -f $VMLINUX ] || help - -$OBJDUMP -t $LINUX | egrep -v '__ks' | sort > $TMPSYM -SN1=`egrep "dig_setup|Synergy_da_indr" $TMPSYM|wc -l` - -# Dataprefix and textprefix correspond to the VGLOBAL_BASE and VPERNODE_BASE. -# Eventually, these values should be: -# dataprefix ffffffff -# textprefix fffffffe -# but right now they're still changing, so make them dynamic. -dataprefix=`awk ' / \.data / { print substr($1, 0, 8) ; exit ; }' $TMPSYM` -textprefix=`awk ' / \.text / { print substr($1, 0, 8) ; exit ; }' $TMPSYM` - -# pipe everything thru sort -echo "TEXTSYM V1.0" -(cat < 0) { - n = n*16 + substr(s,1,1) - s = substr(s,2) - } - printf "GLOBAL | %s | DATA | %s | %d\n", $1, $NF, n - } - } - if($NF == "_end") - exit - -} -' $TMPSYM ) | egrep -v " __device| __vendor" | awk -v sn1="$SN1" ' -/GLOBAL/ { - print $0 - if (sn1 != 0) { - /* 32 bits of sn1 physical addrs, */ - print substr($0,1,9) "04" substr($0,20,16) "Phy_" substr($0,36) - } else { - /* 38 bits of sn2 physical addrs, need addr space bits */ - print substr($0,1,9) "3004" substr($0,20,16) "Phy_" substr($0,36) - } - -} ' | sort -k3 - -N=`wc -l $TEXTSYM|awk '{print $1}'` -echo "Generated TEXTSYM file" >&2 -echo " $LINUX --> $TEXTSYM" >&2 -echo " Found $N symbols" >&2 diff -Nru a/arch/parisc/kernel/module.c b/arch/parisc/kernel/module.c --- a/arch/parisc/kernel/module.c Wed Apr 16 18:32:26 2003 +++ b/arch/parisc/kernel/module.c Wed Apr 16 18:32:26 2003 @@ -568,3 +568,7 @@ #endif return 0; } + +void module_arch_cleanup(struct module *mod) +{ +} diff -Nru a/arch/ppc/kernel/module.c b/arch/ppc/kernel/module.c --- a/arch/ppc/kernel/module.c Wed Apr 16 18:32:26 2003 +++ b/arch/ppc/kernel/module.c Wed Apr 16 18:32:26 2003 @@ -269,3 +269,7 @@ { return 0; } + +void module_arch_cleanup(struct module *mod) +{ +} diff -Nru a/arch/ppc64/kernel/module.c b/arch/ppc64/kernel/module.c --- a/arch/ppc64/kernel/module.c Wed Apr 16 18:32:26 2003 +++ b/arch/ppc64/kernel/module.c Wed Apr 16 18:32:26 2003 @@ -386,3 +386,7 @@ me->extable.entry + me->extable.num_entries); return 0; } + +void module_arch_cleanup(struct module *mod) +{ +} diff -Nru a/arch/s390/kernel/module.c b/arch/s390/kernel/module.c --- a/arch/s390/kernel/module.c Wed Apr 16 18:32:26 2003 +++ b/arch/s390/kernel/module.c Wed Apr 16 18:32:26 2003 @@ -348,3 +348,7 @@ kfree(me->arch.syminfo); return 0; } + +void module_arch_cleanup(struct module *mod) +{ +} diff -Nru a/arch/s390x/kernel/module.c b/arch/s390x/kernel/module.c --- a/arch/s390x/kernel/module.c Wed Apr 16 18:32:26 2003 +++ b/arch/s390x/kernel/module.c Wed Apr 16 18:32:26 2003 @@ -374,3 +374,7 @@ kfree(me->arch.syminfo); return 0; } + +void module_arch_cleanup(struct module *mod) +{ +} diff -Nru a/arch/sparc/kernel/module.c b/arch/sparc/kernel/module.c --- a/arch/sparc/kernel/module.c Wed Apr 16 18:32:25 2003 +++ b/arch/sparc/kernel/module.c Wed Apr 16 18:32:25 2003 @@ -145,3 +145,7 @@ { return 0; } + +void module_arch_cleanup(struct module *mod) +{ +} diff -Nru a/arch/sparc64/kernel/module.c b/arch/sparc64/kernel/module.c --- a/arch/sparc64/kernel/module.c Wed Apr 16 18:32:26 2003 +++ b/arch/sparc64/kernel/module.c Wed Apr 16 18:32:26 2003 @@ -273,3 +273,7 @@ { return 0; } + +void module_arch_cleanup(struct module *mod) +{ +} diff -Nru a/arch/v850/kernel/module.c b/arch/v850/kernel/module.c --- a/arch/v850/kernel/module.c Wed Apr 16 18:32:26 2003 +++ b/arch/v850/kernel/module.c Wed Apr 16 18:32:26 2003 @@ -230,3 +230,8 @@ return 0; } + +void +module_arch_cleanup(struct module *mod) +{ +} diff -Nru a/arch/x86_64/kernel/module.c b/arch/x86_64/kernel/module.c --- a/arch/x86_64/kernel/module.c Wed Apr 16 18:32:26 2003 +++ b/arch/x86_64/kernel/module.c Wed Apr 16 18:32:26 2003 @@ -231,3 +231,7 @@ { return 0; } + +void module_arch_cleanup(struct module *mod) +{ +} diff -Nru a/drivers/acpi/osl.c b/drivers/acpi/osl.c --- a/drivers/acpi/osl.c Wed Apr 16 18:32:26 2003 +++ b/drivers/acpi/osl.c Wed Apr 16 18:32:26 2003 @@ -251,7 +251,14 @@ irq = acpi_fadt.sci_int; #ifdef CONFIG_IA64 - irq = gsi_to_vector(irq); + int vector; + + vector = acpi_irq_to_vector(irq); + if (vector < 0) { + printk(KERN_ERR PREFIX "SCI (IRQ%d) not registerd\n", irq); + return AE_OK; + } + irq = vector; #endif acpi_irq_irq = irq; acpi_irq_handler = handler; @@ -269,7 +276,7 @@ { if (acpi_irq_handler) { #ifdef CONFIG_IA64 - irq = gsi_to_vector(irq); + irq = acpi_irq_to_vector(irq); #endif free_irq(irq, acpi_irq); acpi_irq_handler = NULL; @@ -454,6 +461,9 @@ int result = 0; int size = 0; struct pci_bus bus; +#ifdef CONFIG_IA64 + struct pci_controller ctrl; +#endif if (!value) return AE_BAD_PARAMETER; @@ -473,6 +483,10 @@ } bus.number = pci_id->bus; +#ifdef CONFIG_IA64 + ctrl.segment = pci_id->segment; + bus.sysdata = &ctrl; +#endif result = pci_root_ops->read(&bus, PCI_DEVFN(pci_id->device, pci_id->function), reg, size, value); @@ -490,6 +504,9 @@ int result = 0; int size = 0; struct pci_bus bus; +#ifdef CONFIG_IA64 + struct pci_controller ctrl; +#endif switch (width) { case 8: @@ -506,6 +523,10 @@ } bus.number = pci_id->bus; +#ifdef CONFIG_IA64 + ctrl.segment = pci_id->segment; + bus.sysdata = &ctrl; +#endif result = pci_root_ops->write(&bus, PCI_DEVFN(pci_id->device, pci_id->function), reg, size, value); diff -Nru a/drivers/acpi/pci_irq.c b/drivers/acpi/pci_irq.c --- a/drivers/acpi/pci_irq.c Wed Apr 16 18:32:26 2003 +++ b/drivers/acpi/pci_irq.c Wed Apr 16 18:32:26 2003 @@ -36,6 +36,9 @@ #ifdef CONFIG_X86_IO_APIC #include #endif +#ifdef CONFIG_IOSAPIC +# include +#endif #include #include @@ -250,6 +253,8 @@ return_VALUE(0); } + entry->irq = entry->link.index; + if (!entry->irq && entry->link.handle) { entry->irq = acpi_pci_link_get_irq(entry->link.handle, entry->link.index); if (!entry->irq) { @@ -288,7 +293,7 @@ while (!irq && bridge->bus->self) { pin = (pin + PCI_SLOT(bridge->devfn)) % 4; bridge = bridge->bus->self; - irq = acpi_pci_irq_lookup(0, bridge->bus->number, PCI_SLOT(bridge->devfn), pin); + irq = acpi_pci_irq_lookup(PCI_SEGMENT(bridge), bridge->bus->number, PCI_SLOT(bridge->devfn), pin); } if (!irq) { @@ -331,7 +336,7 @@ * First we check the PCI IRQ routing table (PRT) for an IRQ. PRT * values override any BIOS-assigned IRQs set during boot. */ - irq = acpi_pci_irq_lookup(0, dev->bus->number, PCI_SLOT(dev->devfn), pin); + irq = acpi_pci_irq_lookup(PCI_SEGMENT(dev), dev->bus->number, PCI_SLOT(dev->devfn), pin); /* * If no PRT entry was found, we'll try to derive an IRQ from the @@ -357,7 +362,7 @@ } } - dev->irq = irq; + dev->irq = gsi_to_irq(irq); ACPI_DEBUG_PRINT((ACPI_DB_INFO, "Device %s using IRQ %d\n", dev->slot_name, dev->irq)); diff -Nru a/drivers/acpi/pci_root.c b/drivers/acpi/pci_root.c --- a/drivers/acpi/pci_root.c Wed Apr 16 18:32:26 2003 +++ b/drivers/acpi/pci_root.c Wed Apr 16 18:32:26 2003 @@ -202,8 +202,6 @@ switch (status) { case AE_OK: root->id.segment = (u16) value; - printk("_SEG exists! Unsupported. Abort.\n"); - BUG(); break; case AE_NOT_FOUND: ACPI_DEBUG_PRINT((ACPI_DB_INFO, @@ -265,7 +263,8 @@ * PCI namespace does not get created until this call is made (and * thus the root bridge's pci_dev does not exist). */ - root->bus = pcibios_scan_root(root->id.bus); + root->bus = pcibios_scan_root(root->handle, + root->id.segment, root->id.bus); if (!root->bus) { ACPI_DEBUG_PRINT((ACPI_DB_ERROR, "Bus %02x:%02x not present in PCI namespace\n", diff -Nru a/drivers/char/agp/backend.c b/drivers/char/agp/backend.c --- a/drivers/char/agp/backend.c Wed Apr 16 18:32:26 2003 +++ b/drivers/char/agp/backend.c Wed Apr 16 18:32:26 2003 @@ -252,7 +252,9 @@ /* FIXME: What to do with this? */ inter_module_register("drm_agp", THIS_MODULE, &drm_agp); +#if 0 pm_register(PM_PCI_DEV, PM_PCI_ID(agp_bridge->dev), agp_power); +#endif agp_count++; return 0; diff -Nru a/drivers/char/agp/generic.c b/drivers/char/agp/generic.c --- a/drivers/char/agp/generic.c Wed Apr 16 18:32:26 2003 +++ b/drivers/char/agp/generic.c Wed Apr 16 18:32:26 2003 @@ -34,6 +34,7 @@ #include #include #include +#include #include "agp.h" __u32 *agp_gatt_table; diff -Nru a/drivers/char/agp/hp-agp.c b/drivers/char/agp/hp-agp.c --- a/drivers/char/agp/hp-agp.c Wed Apr 16 18:32:26 2003 +++ b/drivers/char/agp/hp-agp.c Wed Apr 16 18:32:26 2003 @@ -1,17 +1,36 @@ /* - * HP AGPGART routines. + * HP AGPGART routines. + * Copyright (C) 2002-2003 Hewlett-Packard Co + * Bjorn Helgaas */ +#include +#include +#include #include #include -#include -#include + +#include + #include "agp.h" #ifndef log2 #define log2(x) ffz(~(x)) #endif +#define HP_ZX1_IOC_OFFSET 0x1000 /* ACPI reports SBA, we want IOC */ + +/* HP ZX1 IOC registers */ +#define HP_ZX1_IBASE 0x300 +#define HP_ZX1_IMASK 0x308 +#define HP_ZX1_PCOM 0x310 +#define HP_ZX1_TCNFG 0x318 +#define HP_ZX1_PDIR_BASE 0x320 + +/* HP ZX1 LBA registers */ +#define HP_ZX1_AGP_STATUS 0x64 +#define HP_ZX1_AGP_COMMAND 0x68 + #define HP_ZX1_IOVA_BASE GB(1UL) #define HP_ZX1_IOVA_SIZE GB(1UL) #define HP_ZX1_GART_SIZE (HP_ZX1_IOVA_SIZE / 2) @@ -20,6 +39,9 @@ #define HP_ZX1_PDIR_VALID_BIT 0x8000000000000000UL #define HP_ZX1_IOVA_TO_PDIR(va) ((va - hp_private.iova_base) >> hp_private.io_tlb_shift) +/* AGP bridge need not be PCI device, but DRM thinks it is. */ +static struct pci_dev fake_bridge_dev; + static struct aper_size_info_fixed hp_zx1_sizes[] = { {0, 0, 0}, /* filled in by hp_zx1_fetch_size() */ @@ -31,8 +53,8 @@ }; static struct _hp_private { - struct pci_dev *ioc; - volatile u8 *registers; + volatile u8 *ioc_regs; + volatile u8 *lba_regs; u64 *io_pdir; // PDIR for entire IOVA u64 *gatt; // PDIR just for GART (subset of above) u64 gatt_entries; @@ -47,7 +69,8 @@ int io_pages_per_kpage; } hp_private; -static int __init hp_zx1_ioc_shared(void) +static int __init +hp_zx1_ioc_shared (void) { struct _hp_private *hp = &hp_private; @@ -59,7 +82,7 @@ * - IOVA space is 1Gb in size * - first 512Mb is IOMMU, second 512Mb is GART */ - hp->io_tlb_ps = INREG64(hp->registers, HP_ZX1_TCNFG); + hp->io_tlb_ps = INREG64(hp->ioc_regs, HP_ZX1_TCNFG); switch (hp->io_tlb_ps) { case 0: hp->io_tlb_shift = 12; break; case 1: hp->io_tlb_shift = 13; break; @@ -75,13 +98,13 @@ hp->io_page_size = 1 << hp->io_tlb_shift; hp->io_pages_per_kpage = PAGE_SIZE / hp->io_page_size; - hp->iova_base = INREG64(hp->registers, HP_ZX1_IBASE) & ~0x1; + hp->iova_base = INREG64(hp->ioc_regs, HP_ZX1_IBASE) & ~0x1; hp->gart_base = hp->iova_base + HP_ZX1_IOVA_SIZE - HP_ZX1_GART_SIZE; hp->gart_size = HP_ZX1_GART_SIZE; hp->gatt_entries = hp->gart_size / hp->io_page_size; - hp->io_pdir = phys_to_virt(INREG64(hp->registers, HP_ZX1_PDIR_BASE)); + hp->io_pdir = phys_to_virt(INREG64(hp->ioc_regs, HP_ZX1_PDIR_BASE)); hp->gatt = &hp->io_pdir[HP_ZX1_IOVA_TO_PDIR(hp->gart_base)]; if (hp->gatt[0] != HP_ZX1_SBA_IOMMU_COOKIE) { @@ -95,7 +118,8 @@ return 0; } -static int __init hp_zx1_ioc_owner(u8 ioc_rev) +static int __init +hp_zx1_ioc_owner (void) { struct _hp_private *hp = &hp_private; @@ -130,47 +154,28 @@ return 0; } -static int __init hp_zx1_ioc_init(void) +static int __init +hp_zx1_ioc_init (u64 ioc_hpa, u64 lba_hpa) { struct _hp_private *hp = &hp_private; - struct pci_dev *ioc; - int i; - u8 ioc_rev; - ioc = pci_find_device(PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_ZX1_IOC, NULL); - if (!ioc) { - printk(KERN_ERR PFX "Detected HP ZX1 AGP bridge but no IOC\n"); - return -ENODEV; - } - hp->ioc = ioc; - - pci_read_config_byte(ioc, PCI_REVISION_ID, &ioc_rev); - - for (i = 0; i < PCI_NUM_RESOURCES; i++) { - if (pci_resource_flags(ioc, i) == IORESOURCE_MEM) { - hp->registers = (u8 *) ioremap(pci_resource_start(ioc, i), - pci_resource_len(ioc, i)); - break; - } - } - if (!hp->registers) { - printk(KERN_ERR PFX "Detected HP ZX1 AGP bridge but no CSRs\n"); - return -ENODEV; - } + hp->ioc_regs = ioremap(ioc_hpa, 1024); + hp->lba_regs = ioremap(lba_hpa, 256); /* * If the IOTLB is currently disabled, we can take it over. * Otherwise, we have to share with sba_iommu. */ - hp->io_pdir_owner = (INREG64(hp->registers, HP_ZX1_IBASE) & 0x1) == 0; + hp->io_pdir_owner = (INREG64(hp->ioc_regs, HP_ZX1_IBASE) & 0x1) == 0; if (hp->io_pdir_owner) - return hp_zx1_ioc_owner(ioc_rev); + return hp_zx1_ioc_owner(); return hp_zx1_ioc_shared(); } -static int hp_zx1_fetch_size(void) +static int +hp_zx1_fetch_size (void) { int size; @@ -180,47 +185,49 @@ return size; } -static int hp_zx1_configure(void) +static int +hp_zx1_configure (void) { struct _hp_private *hp = &hp_private; agp_bridge->gart_bus_addr = hp->gart_base; - agp_bridge->capndx = pci_find_capability(agp_bridge->dev, PCI_CAP_ID_AGP); - pci_read_config_dword(agp_bridge->dev, - agp_bridge->capndx + PCI_AGP_STATUS, &agp_bridge->mode); + agp_bridge->mode = INREG32(hp->lba_regs, HP_ZX1_AGP_STATUS); if (hp->io_pdir_owner) { - OUTREG64(hp->registers, HP_ZX1_PDIR_BASE, + OUTREG64(hp->ioc_regs, HP_ZX1_PDIR_BASE, virt_to_phys(hp->io_pdir)); - OUTREG64(hp->registers, HP_ZX1_TCNFG, hp->io_tlb_ps); - OUTREG64(hp->registers, HP_ZX1_IMASK, ~(HP_ZX1_IOVA_SIZE - 1)); - OUTREG64(hp->registers, HP_ZX1_IBASE, hp->iova_base | 0x1); - OUTREG64(hp->registers, HP_ZX1_PCOM, + OUTREG64(hp->ioc_regs, HP_ZX1_TCNFG, hp->io_tlb_ps); + OUTREG64(hp->ioc_regs, HP_ZX1_IMASK, ~(HP_ZX1_IOVA_SIZE - 1)); + OUTREG64(hp->ioc_regs, HP_ZX1_IBASE, hp->iova_base | 0x1); + OUTREG64(hp->ioc_regs, HP_ZX1_PCOM, hp->iova_base | log2(HP_ZX1_IOVA_SIZE)); - INREG64(hp->registers, HP_ZX1_PCOM); + INREG64(hp->ioc_regs, HP_ZX1_PCOM); } return 0; } -static void hp_zx1_cleanup(void) +static void +hp_zx1_cleanup (void) { struct _hp_private *hp = &hp_private; if (hp->io_pdir_owner) - OUTREG64(hp->registers, HP_ZX1_IBASE, 0); - iounmap((void *) hp->registers); + OUTREG64(hp->ioc_regs, HP_ZX1_IBASE, 0); + iounmap((void *) hp->ioc_regs); } -static void hp_zx1_tlbflush(agp_memory * mem) +static void +hp_zx1_tlbflush (agp_memory * mem) { struct _hp_private *hp = &hp_private; - OUTREG64(hp->registers, HP_ZX1_PCOM, hp->gart_base | log2(hp->gart_size)); - INREG64(hp->registers, HP_ZX1_PCOM); + OUTREG64(hp->ioc_regs, HP_ZX1_PCOM, hp->gart_base | log2(hp->gart_size)); + INREG64(hp->ioc_regs, HP_ZX1_PCOM); } -static int hp_zx1_create_gatt_table(void) +static int +hp_zx1_create_gatt_table (void) { struct _hp_private *hp = &hp_private; int i; @@ -247,7 +254,8 @@ return 0; } -static int hp_zx1_free_gatt_table(void) +static int +hp_zx1_free_gatt_table (void) { struct _hp_private *hp = &hp_private; @@ -259,7 +267,8 @@ return 0; } -static int hp_zx1_insert_memory(agp_memory * mem, off_t pg_start, int type) +static int +hp_zx1_insert_memory (agp_memory * mem, off_t pg_start, int type) { struct _hp_private *hp = &hp_private; int i, k; @@ -304,7 +313,8 @@ return 0; } -static int hp_zx1_remove_memory(agp_memory * mem, off_t pg_start, int type) +static int +hp_zx1_remove_memory (agp_memory * mem, off_t pg_start, int type) { struct _hp_private *hp = &hp_private; int i, io_pg_start, io_pg_count; @@ -323,12 +333,30 @@ return 0; } -static unsigned long hp_zx1_mask_memory(unsigned long addr, int type) +static unsigned long +hp_zx1_mask_memory(unsigned long addr, int type) { return HP_ZX1_PDIR_VALID_BIT | addr; } -static int __init hp_zx1_setup (struct pci_dev *pdev __attribute__((unused))) +static void +hp_zx1_agp_enable (u32 mode) +{ + struct _hp_private *hp = &hp_private; + u32 command; + + command = INREG32(hp->lba_regs, HP_ZX1_AGP_STATUS); + + command = agp_collect_device_status(mode, command); + command |= 0x00000100; + + OUTREG32(hp->lba_regs, HP_ZX1_AGP_COMMAND, command); + + agp_device_command(command, 0); +} + +static int __init +hp_zx1_setup (u64 ioc_hpa, u64 lba_hpa) { agp_bridge->masks = hp_zx1_masks; agp_bridge->dev_private_data = NULL; @@ -339,7 +367,7 @@ agp_bridge->cleanup = hp_zx1_cleanup; agp_bridge->tlb_flush = hp_zx1_tlbflush; agp_bridge->mask_memory = hp_zx1_mask_memory; - agp_bridge->agp_enable = agp_generic_agp_enable; + agp_bridge->agp_enable = hp_zx1_agp_enable; agp_bridge->cache_flush = global_cache_flush; agp_bridge->create_gatt_table = hp_zx1_create_gatt_table; agp_bridge->free_gatt_table = hp_zx1_free_gatt_table; @@ -350,73 +378,79 @@ agp_bridge->agp_alloc_page = agp_generic_alloc_page; agp_bridge->agp_destroy_page = agp_generic_destroy_page; agp_bridge->cant_use_aperture = 1; - return hp_zx1_ioc_init(); + + return hp_zx1_ioc_init(ioc_hpa, lba_hpa); } -static int __init agp_find_supported_device(struct pci_dev *dev) +static acpi_status __init +zx1_gart_probe (acpi_handle obj, u32 depth, void *context, void **ret) { - agp_bridge->dev = dev; - - /* ZX1 LBAs can be either PCI or AGP bridges */ - if (pci_find_capability(dev, PCI_CAP_ID_AGP)) { - printk(KERN_INFO PFX "Detected HP ZX1 AGP chipset at %s\n", - dev->slot_name); - agp_bridge->type = HP_ZX1; - agp_bridge->dev = dev; - return hp_zx1_setup(dev); - } - return -ENODEV; -} + acpi_handle handle, parent; + acpi_status status; + struct acpi_device_info info; + u64 lba_hpa, sba_hpa, length; + + status = hp_acpi_csr_space(obj, &lba_hpa, &length); + if (ACPI_FAILURE(status)) + return 1; + + /* Look for an enclosing IOC scope and find its CSR space */ + handle = obj; + do { + status = acpi_get_object_info(handle, &info); + if (ACPI_SUCCESS(status)) { + /* TBD check _CID also */ + info.hardware_id[sizeof(info.hardware_id)-1] = '\0'; + if (!strcmp(info.hardware_id, "HWP0001")) { + status = hp_acpi_csr_space(handle, &sba_hpa, &length); + if (ACPI_SUCCESS(status)) + break; + else { + printk(KERN_ERR PFX "Detected HP ZX1 " + "AGP LBA but no IOC.\n"); + return status; + } + } + } -static struct agp_driver hp_agp_driver = { - .owner = THIS_MODULE; -}; + status = acpi_get_parent(handle, &parent); + handle = parent; + } while (ACPI_SUCCESS(status)); -static int __init agp_hp_probe (struct pci_dev *dev, const struct pci_device_id *ent) -{ - if (agp_find_supported_device(dev) == 0) { - hp_agp_driver.dev = dev; - agp_register_driver(&hp_agp_driver); - return 0; - } - return -ENODEV; -} - -static struct pci_device_id agp_hp_pci_table[] __initdata = { - { - .class = (PCI_CLASS_BRIDGE_HOST << 8), - .class_mask = ~0, - .vendor = PCI_VENDOR_ID_HP, - .device = PCI_DEVICE_ID_HP_ZX1_LBA, - .subvendor = PCI_ANY_ID, - .subdevice = PCI_ANY_ID, - }, - { } -}; + if (hp_zx1_setup(sba_hpa + HP_ZX1_IOC_OFFSET, lba_hpa)) + return 1; -MODULE_DEVICE_TABLE(pci, agp_pci_table); + return 0; +} -static struct __initdata pci_driver agp_hp_pci_driver = { - .name = "agpgart-hp", - .id_table = agp_hp_pci_table, - .probe = agp_hp_probe, +static struct agp_driver hp_agp_driver = { + .owner = THIS_MODULE, }; -static int __init agp_hp_init(void) +static int __init +agp_hp_init (void) { - int ret_val; + acpi_status status; - ret_val = pci_module_init(&agp_hp_pci_driver); - if (ret_val) + status = acpi_get_devices("HWP0003", zx1_gart_probe, "HWP0003 AGP LBA", NULL); + if (!(ACPI_SUCCESS(status))) { agp_bridge->type = NOT_SUPPORTED; + printk(KERN_INFO PFX "Didn't find an HP ZX1 Chipset.\n"); + return -ENODEV; + } - return ret_val; + fake_bridge_dev.vendor = PCI_VENDOR_ID_HP; + fake_bridge_dev.device = PCI_DEVICE_ID_HP_ZX1_LBA; + hp_agp_driver.dev = &fake_bridge_dev; + agp_bridge->type = HP_ZX1; + agp_bridge->dev = &fake_bridge_dev; + return agp_register_driver(&hp_agp_driver); } -static void __exit agp_hp_cleanup(void) +static void __exit +agp_hp_cleanup (void) { agp_unregister_driver(&hp_agp_driver); - pci_unregister_driver(&agp_hp_pci_driver); } module_init(agp_hp_init); diff -Nru a/drivers/char/agp/i460-agp.c b/drivers/char/agp/i460-agp.c --- a/drivers/char/agp/i460-agp.c Wed Apr 16 18:32:26 2003 +++ b/drivers/char/agp/i460-agp.c Wed Apr 16 18:32:26 2003 @@ -560,7 +560,7 @@ } static struct agp_driver i460_agp_driver = { - .owner = THIS_MODULE; + .owner = THIS_MODULE, }; static int __init agp_intel_i460_probe (struct pci_dev *dev, const struct pci_device_id *ent) diff -Nru a/drivers/char/drm/drmP.h b/drivers/char/drm/drmP.h --- a/drivers/char/drm/drmP.h Wed Apr 16 18:32:26 2003 +++ b/drivers/char/drm/drmP.h Wed Apr 16 18:32:26 2003 @@ -230,16 +230,16 @@ if (len > DRM_PROC_LIMIT) { ret; *eof = 1; return len - offset; } /* Mapping helper macros */ -#define DRM_IOREMAP(map) \ - (map)->handle = DRM(ioremap)( (map)->offset, (map)->size ) +#define DRM_IOREMAP(map, dev) \ + (map)->handle = DRM(ioremap)( (map)->offset, (map)->size, (dev) ) -#define DRM_IOREMAP_NOCACHE(map) \ - (map)->handle = DRM(ioremap_nocache)((map)->offset, (map)->size) +#define DRM_IOREMAP_NOCACHE(map, dev) \ + (map)->handle = DRM(ioremap_nocache)((map)->offset, (map)->size, (dev)) -#define DRM_IOREMAPFREE(map) \ - do { \ - if ( (map)->handle && (map)->size ) \ - DRM(ioremapfree)( (map)->handle, (map)->size ); \ +#define DRM_IOREMAPFREE(map, dev) \ + do { \ + if ( (map)->handle && (map)->size ) \ + DRM(ioremapfree)( (map)->handle, (map)->size, (dev) ); \ } while (0) #define DRM_FIND_MAP(_map, _o) \ @@ -708,9 +708,10 @@ extern unsigned long DRM(alloc_pages)(int order, int area); extern void DRM(free_pages)(unsigned long address, int order, int area); -extern void *DRM(ioremap)(unsigned long offset, unsigned long size); -extern void *DRM(ioremap_nocache)(unsigned long offset, unsigned long size); -extern void DRM(ioremapfree)(void *pt, unsigned long size); +extern void *DRM(ioremap)(unsigned long offset, unsigned long size, drm_device_t *dev); +extern void *DRM(ioremap_nocache)(unsigned long offset, unsigned long size, + drm_device_t *dev); +extern void DRM(ioremapfree)(void *pt, unsigned long size, drm_device_t *dev); #if __REALLY_HAVE_AGP extern agp_memory *DRM(alloc_agp)(int pages, u32 type); diff -Nru a/drivers/char/drm/drm_bufs.h b/drivers/char/drm/drm_bufs.h --- a/drivers/char/drm/drm_bufs.h Wed Apr 16 18:32:25 2003 +++ b/drivers/char/drm/drm_bufs.h Wed Apr 16 18:32:25 2003 @@ -106,7 +106,7 @@ switch ( map->type ) { case _DRM_REGISTERS: case _DRM_FRAME_BUFFER: -#if !defined(__sparc__) && !defined(__alpha__) +#if !defined(__sparc__) && !defined(__alpha__) && !defined(__ia64__) if ( map->offset + map->size < map->offset || map->offset < virt_to_phys(high_memory) ) { DRM(free)( map, sizeof(*map), DRM_MEM_MAPS ); @@ -123,7 +123,7 @@ MTRR_TYPE_WRCOMB, 1 ); } #endif - map->handle = DRM(ioremap)( map->offset, map->size ); + map->handle = DRM(ioremap)( map->offset, map->size, dev ); break; case _DRM_SHM: @@ -245,7 +245,7 @@ DRM_DEBUG("mtrr_del = %d\n", retcode); } #endif - DRM(ioremapfree)(map->handle, map->size); + DRM(ioremapfree)(map->handle, map->size, dev); break; case _DRM_SHM: vfree(map->handle); diff -Nru a/drivers/char/drm/drm_drv.h b/drivers/char/drm/drm_drv.h --- a/drivers/char/drm/drm_drv.h Wed Apr 16 18:32:26 2003 +++ b/drivers/char/drm/drm_drv.h Wed Apr 16 18:32:26 2003 @@ -443,7 +443,7 @@ DRM_DEBUG( "mtrr_del=%d\n", retcode ); } #endif - DRM(ioremapfree)( map->handle, map->size ); + DRM(ioremapfree)( map->handle, map->size, dev ); break; case _DRM_SHM: vfree(map->handle); diff -Nru a/drivers/char/drm/drm_memory.h b/drivers/char/drm/drm_memory.h --- a/drivers/char/drm/drm_memory.h Wed Apr 16 18:32:25 2003 +++ b/drivers/char/drm/drm_memory.h Wed Apr 16 18:32:25 2003 @@ -32,6 +32,10 @@ #include #include "drmP.h" #include +#include + +#include +#include typedef struct drm_mem_stats { const char *name; @@ -290,17 +294,117 @@ } } -void *DRM(ioremap)(unsigned long offset, unsigned long size) +#if __REALLY_HAVE_AGP + +/* + * Find the drm_map that covers the range [offset, offset+size). + */ +static inline drm_map_t * +drm_lookup_map (unsigned long offset, unsigned long size, drm_device_t *dev) { + struct list_head *list; + drm_map_list_t *r_list; + drm_map_t *map; + + list_for_each(list, &dev->maplist->head) { + r_list = (drm_map_list_t *) list; + map = r_list->map; + if (!map) + continue; + if (map->offset <= offset && (offset + size) <= (map->offset + map->size)) + return map; + } + return NULL; +} + +static inline void * +agp_remap (unsigned long offset, unsigned long size, drm_device_t *dev) +{ + unsigned long *phys_addr_map, i, num_pages = PAGE_ALIGN(size) / PAGE_SIZE; + struct page **page_map, **page_map_ptr; + struct drm_agp_mem *agpmem; + struct vm_struct *area; + + + size = PAGE_ALIGN(size); + + for (agpmem = dev->agp->memory; agpmem; agpmem = agpmem->next) + if (agpmem->bound <= offset + && (agpmem->bound + (agpmem->pages << PAGE_SHIFT)) >= (offset + size)) + break; + if (!agpmem) + return NULL; + + /* + * OK, we're mapping AGP space on a chipset/platform on which memory accesses by + * the CPU do not get remapped by the GART. We fix this by using the kernel's + * page-table instead (that's probably faster anyhow...). + */ + area = get_vm_area(size, VM_IOREMAP); + if (!area) + return NULL; + + flush_cache_all(); + + /* note: use vmalloc() because num_pages could be large... */ + page_map = vmalloc(num_pages * sizeof(struct page *)); + if (!page_map) + return NULL; + + phys_addr_map = agpmem->memory->memory + (offset - agpmem->bound) / PAGE_SIZE; + for (i = 0; i < num_pages; ++i) + page_map[i] = pfn_to_page(phys_addr_map[i] >> PAGE_SHIFT); + page_map_ptr = page_map; + if (map_vm_area(area, PAGE_AGP, &page_map_ptr) < 0) { + vunmap(area->addr); + vfree(page_map); + return NULL; + } + vfree(page_map); + + flush_tlb_kernel_range(area->addr, area->addr + size); + return area->addr; +} + +static inline unsigned long +drm_follow_page (void *vaddr) +{ + pgd_t *pgd = pgd_offset_k((unsigned long) vaddr); + pmd_t *pmd = pmd_offset(pgd, (unsigned long) vaddr); + pte_t *ptep = pte_offset_kernel(pmd, (unsigned long) vaddr); + return pte_pfn(*ptep) << PAGE_SHIFT; +} + +#else /* !__REALLY_HAVE_AGP */ + +static inline void * +agp_remap (unsigned long offset, unsigned long size, drm_device_t *dev) { return NULL; } + +#endif /* !__REALLY_HAVE_AGP */ + +void *DRM(ioremap)(unsigned long offset, unsigned long size, drm_device_t *dev) +{ + int remap_aperture = 0; void *pt; if (!size) { - DRM_MEM_ERROR(DRM_MEM_MAPPINGS, - "Mapping 0 bytes at 0x%08lx\n", offset); + DRM_MEM_ERROR(DRM_MEM_MAPPINGS, "Mapping 0 bytes at 0x%08lx\n", offset); return NULL; } - if (!(pt = ioremap(offset, size))) { +#if __REALLY_HAVE_AGP + if (dev->agp && dev->agp->cant_use_aperture) { + drm_map_t *map = drm_lookup_map(offset, size, dev); + + if (map && map->type == _DRM_AGP) + remap_aperture = 1; + } +#endif + if (remap_aperture) + pt = agp_remap(offset, size, dev); + else + pt = ioremap(offset, size); + if (!pt) { spin_lock(&DRM(mem_lock)); ++DRM(mem_stats)[DRM_MEM_MAPPINGS].fail_count; spin_unlock(&DRM(mem_lock)); @@ -313,8 +417,9 @@ return pt; } -void *DRM(ioremap_nocache)(unsigned long offset, unsigned long size) +void *DRM(ioremap_nocache)(unsigned long offset, unsigned long size, drm_device_t *dev) { + int remap_aperture = 0; void *pt; if (!size) { @@ -323,7 +428,19 @@ return NULL; } - if (!(pt = ioremap_nocache(offset, size))) { +#if __REALLY_HAVE_AGP + if (dev->agp && dev->agp->cant_use_aperture) { + drm_map_t *map = drm_lookup_map(offset, size, dev); + + if (map && map->type == _DRM_AGP) + remap_aperture = 1; + } +#endif + if (remap_aperture) + pt = agp_remap(offset, size, dev); + else + pt = ioremap_nocache(offset, size); + if (!pt) { spin_lock(&DRM(mem_lock)); ++DRM(mem_stats)[DRM_MEM_MAPPINGS].fail_count; spin_unlock(&DRM(mem_lock)); @@ -336,7 +453,7 @@ return pt; } -void DRM(ioremapfree)(void *pt, unsigned long size) +void DRM(ioremapfree)(void *pt, unsigned long size, drm_device_t *dev) { int alloc_count; int free_count; @@ -344,8 +461,29 @@ if (!pt) DRM_MEM_ERROR(DRM_MEM_MAPPINGS, "Attempt to free NULL pointer\n"); - else - iounmap(pt); + else { + int unmap_aperture = 0; +#if __REALLY_HAVE_AGP + /* + * This is rather ugly. It would be much cleaner if the DRM API would use + * separate routines for handling mappings in the AGP space. Hopefully this + * can be done in a future revision of the interface... + */ + if (dev->agp && dev->agp->cant_use_aperture + && ((unsigned long) pt >= VMALLOC_START && (unsigned long) pt < VMALLOC_END)) + { + unsigned long offset = (drm_follow_page(pt) + | ((unsigned long) pt & ~PAGE_MASK)); + drm_map_t *map = drm_lookup_map(offset, size, dev); + if (map && map->type == _DRM_AGP) + unmap_aperture = 1; + } +#endif + if (unmap_aperture) + vunmap(pt); + else + iounmap(pt); + } spin_lock(&DRM(mem_lock)); DRM(mem_stats)[DRM_MEM_MAPPINGS].bytes_freed += size; diff -Nru a/drivers/char/drm/drm_vm.h b/drivers/char/drm/drm_vm.h --- a/drivers/char/drm/drm_vm.h Wed Apr 16 18:32:26 2003 +++ b/drivers/char/drm/drm_vm.h Wed Apr 16 18:32:26 2003 @@ -107,12 +107,12 @@ * Get the page, inc the use count, and return it */ offset = (baddr - agpmem->bound) >> PAGE_SHIFT; - agpmem->memory->memory[offset] &= dev->agp->page_mask; page = virt_to_page(__va(agpmem->memory->memory[offset])); get_page(page); - DRM_DEBUG("baddr = 0x%lx page = 0x%p, offset = 0x%lx\n", - baddr, __va(agpmem->memory->memory[offset]), offset); + DRM_DEBUG("baddr = 0x%lx page = 0x%p, offset = 0x%lx, count=%d\n", + baddr, __va(agpmem->memory->memory[offset]), offset, + atomic_read(&page->count)); return page; } @@ -206,7 +206,7 @@ DRM_DEBUG("mtrr_del = %d\n", retcode); } #endif - DRM(ioremapfree)(map->handle, map->size); + DRM(ioremapfree)(map->handle, map->size, dev); break; case _DRM_SHM: vfree(map->handle); @@ -420,15 +420,16 @@ switch (map->type) { case _DRM_AGP: -#if defined(__alpha__) +#if __REALLY_HAVE_AGP + if (dev->agp->cant_use_aperture) { /* - * On Alpha we can't talk to bus dma address from the - * CPU, so for memory of type DRM_AGP, we'll deal with - * sorting out the real physical pages and mappings - * in nopage() + * On some platforms we can't talk to bus dma address from the CPU, so for + * memory of type DRM_AGP, we'll deal with sorting out the real physical + * pages and mappings in nopage() */ vma->vm_ops = &DRM(vm_ops); break; + } #endif /* fall through to _DRM_FRAME_BUFFER... */ case _DRM_FRAME_BUFFER: @@ -439,15 +440,15 @@ pgprot_val(vma->vm_page_prot) |= _PAGE_PCD; pgprot_val(vma->vm_page_prot) &= ~_PAGE_PWT; } -#elif defined(__ia64__) - if (map->type != _DRM_AGP) - vma->vm_page_prot = - pgprot_writecombine(vma->vm_page_prot); #elif defined(__powerpc__) pgprot_val(vma->vm_page_prot) |= _PAGE_NO_CACHE | _PAGE_GUARDED; #endif vma->vm_flags |= VM_IO; /* not in core dump */ } +#if defined(__ia64__) + if (map->type != _DRM_AGP) + vma->vm_page_prot = pgprot_writecombine(vma->vm_page_prot); +#endif offset = DRIVER_GET_REG_OFS(); #ifdef __sparc__ if (io_remap_page_range(DRM_RPR_ARG(vma) vma->vm_start, diff -Nru a/drivers/char/drm/gamma_dma.c b/drivers/char/drm/gamma_dma.c --- a/drivers/char/drm/gamma_dma.c Wed Apr 16 18:32:26 2003 +++ b/drivers/char/drm/gamma_dma.c Wed Apr 16 18:32:26 2003 @@ -637,7 +637,7 @@ } else { DRM_FIND_MAP( dev_priv->buffers, init->buffers_offset ); - DRM_IOREMAP( dev_priv->buffers ); + DRM_IOREMAP( dev_priv->buffers, dev ); buf = dma->buflist[GLINT_DRI_BUF_COUNT]; pgt = buf->address; @@ -667,7 +667,7 @@ if ( dev->dev_private ) { drm_gamma_private_t *dev_priv = dev->dev_private; - DRM_IOREMAPFREE( dev_priv->buffers ); + DRM_IOREMAPFREE( dev_priv->buffers, dev ); DRM(free)( dev->dev_private, sizeof(drm_gamma_private_t), DRM_MEM_DRIVER ); diff -Nru a/drivers/char/drm/i810_dma.c b/drivers/char/drm/i810_dma.c --- a/drivers/char/drm/i810_dma.c Wed Apr 16 18:32:26 2003 +++ b/drivers/char/drm/i810_dma.c Wed Apr 16 18:32:26 2003 @@ -240,7 +240,7 @@ if(dev_priv->ring.virtual_start) { DRM(ioremapfree)((void *) dev_priv->ring.virtual_start, - dev_priv->ring.Size); + dev_priv->ring.Size, dev); } if(dev_priv->hw_status_page != 0UL) { pci_free_consistent(dev->pdev, PAGE_SIZE, @@ -256,7 +256,7 @@ for (i = 0; i < dma->buf_count; i++) { drm_buf_t *buf = dma->buflist[ i ]; drm_i810_buf_priv_t *buf_priv = buf->dev_private; - DRM(ioremapfree)(buf_priv->kernel_virtual, buf->total); + DRM(ioremapfree)(buf_priv->kernel_virtual, buf->total, dev); } } return 0; @@ -326,7 +326,7 @@ *buf_priv->in_use = I810_BUF_FREE; buf_priv->kernel_virtual = DRM(ioremap)(buf->bus_address, - buf->total); + buf->total, dev); } return 0; } @@ -379,7 +379,7 @@ dev_priv->ring.virtual_start = DRM(ioremap)(dev->agp->base + init->ring_start, - init->ring_size); + init->ring_size, dev); if (dev_priv->ring.virtual_start == NULL) { dev->dev_private = (void *) dev_priv; diff -Nru a/drivers/char/drm/i830_dma.c b/drivers/char/drm/i830_dma.c --- a/drivers/char/drm/i830_dma.c Wed Apr 16 18:32:25 2003 +++ b/drivers/char/drm/i830_dma.c Wed Apr 16 18:32:25 2003 @@ -248,7 +248,7 @@ if(dev_priv->ring.virtual_start) { DRM(ioremapfree)((void *) dev_priv->ring.virtual_start, - dev_priv->ring.Size); + dev_priv->ring.Size, dev); } if(dev_priv->hw_status_page != 0UL) { pci_free_consistent(dev->pdev, PAGE_SIZE, @@ -273,7 +273,7 @@ for (i = 0; i < dma->buf_count; i++) { drm_buf_t *buf = dma->buflist[ i ]; drm_i830_buf_priv_t *buf_priv = buf->dev_private; - DRM(ioremapfree)(buf_priv->kernel_virtual, buf->total); + DRM(ioremapfree)(buf_priv->kernel_virtual, buf->total, dev); } } return 0; @@ -349,7 +349,7 @@ *buf_priv->in_use = I830_BUF_FREE; buf_priv->kernel_virtual = DRM(ioremap)(buf->bus_address, - buf->total); + buf->total, dev); } return 0; } @@ -403,7 +403,7 @@ dev_priv->ring.virtual_start = DRM(ioremap)(dev->agp->base + init->ring_start, - init->ring_size); + init->ring_size, dev); if (dev_priv->ring.virtual_start == NULL) { dev->dev_private = (void *) dev_priv; diff -Nru a/drivers/char/drm/mga_dma.c b/drivers/char/drm/mga_dma.c --- a/drivers/char/drm/mga_dma.c Wed Apr 16 18:32:26 2003 +++ b/drivers/char/drm/mga_dma.c Wed Apr 16 18:32:26 2003 @@ -554,9 +554,9 @@ (drm_mga_sarea_t *)((u8 *)dev_priv->sarea->handle + init->sarea_priv_offset); - DRM_IOREMAP( dev_priv->warp ); - DRM_IOREMAP( dev_priv->primary ); - DRM_IOREMAP( dev_priv->buffers ); + DRM_IOREMAP( dev_priv->warp, dev ); + DRM_IOREMAP( dev_priv->primary, dev ); + DRM_IOREMAP( dev_priv->buffers, dev ); if(!dev_priv->warp->handle || !dev_priv->primary->handle || @@ -642,9 +642,9 @@ if ( dev->dev_private ) { drm_mga_private_t *dev_priv = dev->dev_private; - DRM_IOREMAPFREE( dev_priv->warp ); - DRM_IOREMAPFREE( dev_priv->primary ); - DRM_IOREMAPFREE( dev_priv->buffers ); + DRM_IOREMAPFREE( dev_priv->warp, dev ); + DRM_IOREMAPFREE( dev_priv->primary, dev ); + DRM_IOREMAPFREE( dev_priv->buffers, dev ); if ( dev_priv->head != NULL ) { mga_freelist_cleanup( dev ); diff -Nru a/drivers/char/drm/mga_drv.h b/drivers/char/drm/mga_drv.h --- a/drivers/char/drm/mga_drv.h Wed Apr 16 18:32:26 2003 +++ b/drivers/char/drm/mga_drv.h Wed Apr 16 18:32:26 2003 @@ -226,7 +226,7 @@ if ( MGA_VERBOSE ) { \ DRM_INFO( "BEGIN_DMA( %d ) in %s\n", \ (n), __FUNCTION__ ); \ - DRM_INFO( " space=0x%x req=0x%x\n", \ + DRM_INFO( " space=0x%x req=0x%Zx\n", \ dev_priv->prim.space, (n) * DMA_BLOCK_SIZE ); \ } \ prim = dev_priv->prim.start; \ @@ -276,7 +276,7 @@ #define DMA_WRITE( offset, val ) \ do { \ if ( MGA_VERBOSE ) { \ - DRM_INFO( " DMA_WRITE( 0x%08x ) at 0x%04x\n", \ + DRM_INFO( " DMA_WRITE( 0x%08x ) at 0x%04Zx\n", \ (u32)(val), write + (offset) * sizeof(u32) ); \ } \ *(volatile u32 *)(prim + write + (offset) * sizeof(u32)) = val; \ diff -Nru a/drivers/char/drm/r128_cce.c b/drivers/char/drm/r128_cce.c --- a/drivers/char/drm/r128_cce.c Wed Apr 16 18:32:25 2003 +++ b/drivers/char/drm/r128_cce.c Wed Apr 16 18:32:25 2003 @@ -350,8 +350,8 @@ R128_WRITE( R128_PM4_BUFFER_DL_RPTR_ADDR, entry->busaddr[page_ofs]); - DRM_DEBUG( "ring rptr: offset=0x%08x handle=0x%08lx\n", - entry->busaddr[page_ofs], + DRM_DEBUG( "ring rptr: offset=0x%08lx handle=0x%08lx\n", + (unsigned long) entry->busaddr[page_ofs], entry->handle + tmp_ofs ); } @@ -540,9 +540,9 @@ init->sarea_priv_offset); if ( !dev_priv->is_pci ) { - DRM_IOREMAP( dev_priv->cce_ring ); - DRM_IOREMAP( dev_priv->ring_rptr ); - DRM_IOREMAP( dev_priv->buffers ); + DRM_IOREMAP( dev_priv->cce_ring, dev ); + DRM_IOREMAP( dev_priv->ring_rptr, dev ); + DRM_IOREMAP( dev_priv->buffers, dev ); if(!dev_priv->cce_ring->handle || !dev_priv->ring_rptr->handle || !dev_priv->buffers->handle) { @@ -619,9 +619,9 @@ #if __REALLY_HAVE_SG if ( !dev_priv->is_pci ) { #endif - DRM_IOREMAPFREE( dev_priv->cce_ring ); - DRM_IOREMAPFREE( dev_priv->ring_rptr ); - DRM_IOREMAPFREE( dev_priv->buffers ); + DRM_IOREMAPFREE( dev_priv->cce_ring, dev ); + DRM_IOREMAPFREE( dev_priv->ring_rptr, dev ); + DRM_IOREMAPFREE( dev_priv->buffers, dev ); #if __REALLY_HAVE_SG } else { if (!DRM(ati_pcigart_cleanup)( dev, diff -Nru a/drivers/char/drm/radeon_cp.c b/drivers/char/drm/radeon_cp.c --- a/drivers/char/drm/radeon_cp.c Wed Apr 16 18:32:25 2003 +++ b/drivers/char/drm/radeon_cp.c Wed Apr 16 18:32:25 2003 @@ -904,8 +904,8 @@ RADEON_WRITE( RADEON_CP_RB_RPTR_ADDR, entry->busaddr[page_ofs]); - DRM_DEBUG( "ring rptr: offset=0x%08x handle=0x%08lx\n", - entry->busaddr[page_ofs], + DRM_DEBUG( "ring rptr: offset=0x%08lx handle=0x%08lx\n", + (unsigned long) entry->busaddr[page_ofs], entry->handle + tmp_ofs ); } @@ -1157,9 +1157,9 @@ init->sarea_priv_offset); if ( !dev_priv->is_pci ) { - DRM_IOREMAP( dev_priv->cp_ring ); - DRM_IOREMAP( dev_priv->ring_rptr ); - DRM_IOREMAP( dev_priv->buffers ); + DRM_IOREMAP( dev_priv->cp_ring, dev ); + DRM_IOREMAP( dev_priv->ring_rptr, dev ); + DRM_IOREMAP( dev_priv->buffers, dev ); if(!dev_priv->cp_ring->handle || !dev_priv->ring_rptr->handle || !dev_priv->buffers->handle) { @@ -1279,9 +1279,9 @@ drm_radeon_private_t *dev_priv = dev->dev_private; if ( !dev_priv->is_pci ) { - DRM_IOREMAPFREE( dev_priv->cp_ring ); - DRM_IOREMAPFREE( dev_priv->ring_rptr ); - DRM_IOREMAPFREE( dev_priv->buffers ); + DRM_IOREMAPFREE( dev_priv->cp_ring, dev ); + DRM_IOREMAPFREE( dev_priv->ring_rptr, dev ); + DRM_IOREMAPFREE( dev_priv->buffers, dev ); } else { #if __REALLY_HAVE_SG if (!DRM(ati_pcigart_cleanup)( dev, diff -Nru a/drivers/char/mem.c b/drivers/char/mem.c --- a/drivers/char/mem.c Wed Apr 16 18:32:26 2003 +++ b/drivers/char/mem.c Wed Apr 16 18:32:26 2003 @@ -70,7 +70,8 @@ unsigned long p = *ppos; unsigned long end_mem; ssize_t read; - + void *addr; + end_mem = __pa(high_memory); if (p >= end_mem) return 0; @@ -93,8 +94,14 @@ } } #endif - if (copy_to_user(buf, __va(p), count)) + if (file->f_flags & O_SYNC) + addr = ioremap(p, count); + else + addr = __va(p); + if (copy_to_user(buf, addr, count)) return -EFAULT; + if (file->f_flags & O_SYNC) + iounmap(addr); read += count; *ppos += read; return read; @@ -105,13 +112,22 @@ { unsigned long p = *ppos; unsigned long end_mem; + ssize_t ret; + void *addr; end_mem = __pa(high_memory); if (p >= end_mem) return 0; if (count > end_mem - p) count = end_mem - p; - return do_write_mem(file, __va(p), p, buf, count, ppos); + if (file->f_flags & O_SYNC) + addr = ioremap(p, count); + else + addr = __va(p); + ret = do_write_mem(file, addr, p, buf, count, ppos); + if (file->f_flags & O_SYNC) + iounmap(addr); + return ret; } #ifndef pgprot_noncached @@ -521,17 +537,19 @@ */ static loff_t memory_lseek(struct file * file, loff_t offset, int orig) { - int ret; + loff_t ret; lock_kernel(); switch (orig) { case 0: file->f_pos = offset; ret = file->f_pos; + force_successful_syscall_return(); break; case 1: file->f_pos += offset; ret = file->f_pos; + force_successful_syscall_return(); break; default: ret = -EINVAL; diff -Nru a/drivers/media/radio/Makefile b/drivers/media/radio/Makefile --- a/drivers/media/radio/Makefile Wed Apr 16 18:32:26 2003 +++ b/drivers/media/radio/Makefile Wed Apr 16 18:32:26 2003 @@ -2,6 +2,8 @@ # Makefile for the kernel character device drivers. # +obj-y := dummy.o + miropcm20-objs := miropcm20-rds-core.o miropcm20-radio.o obj-$(CONFIG_RADIO_AZTECH) += radio-aztech.o diff -Nru a/drivers/media/radio/dummy.c b/drivers/media/radio/dummy.c --- /dev/null Wed Dec 31 16:00:00 1969 +++ b/drivers/media/radio/dummy.c Wed Apr 16 18:32:26 2003 @@ -0,0 +1 @@ +/* just so the linker knows what kind of object files it's deadling with... */ diff -Nru a/drivers/media/video/Makefile b/drivers/media/video/Makefile --- a/drivers/media/video/Makefile Wed Apr 16 18:32:26 2003 +++ b/drivers/media/video/Makefile Wed Apr 16 18:32:26 2003 @@ -6,6 +6,8 @@ bttv-risc.o bttv-vbi.o zoran-objs := zr36120.o zr36120_i2c.o zr36120_mem.o +obj-y := dummy.o + obj-$(CONFIG_VIDEO_DEV) += videodev.o v4l2-common.o v4l1-compat.o obj-$(CONFIG_VIDEO_BT848) += bttv.o msp3400.o tvaudio.o \ diff -Nru a/drivers/media/video/dummy.c b/drivers/media/video/dummy.c --- /dev/null Wed Dec 31 16:00:00 1969 +++ b/drivers/media/video/dummy.c Wed Apr 16 18:32:26 2003 @@ -0,0 +1 @@ +/* just so the linker knows what kind of object files it's deadling with... */ diff -Nru a/drivers/net/tulip/media.c b/drivers/net/tulip/media.c --- a/drivers/net/tulip/media.c Wed Apr 16 18:32:26 2003 +++ b/drivers/net/tulip/media.c Wed Apr 16 18:32:26 2003 @@ -278,6 +278,10 @@ for (i = 0; i < init_length; i++) outl(init_sequence[i], ioaddr + CSR12); } + + (void) inl(ioaddr + CSR6); /* flush CSR12 writes */ + udelay(500); /* Give MII time to recover */ + tmp_info = get_u16(&misc_info[1]); if (tmp_info) tp->advertising[phy_num] = tmp_info | 1; diff -Nru a/drivers/scsi/megaraid.c b/drivers/scsi/megaraid.c --- a/drivers/scsi/megaraid.c Wed Apr 16 18:32:25 2003 +++ b/drivers/scsi/megaraid.c Wed Apr 16 18:32:25 2003 @@ -2045,7 +2045,7 @@ return; mbox = (mega_mailbox *) pScb->mboxData; - printk ("%u cmd:%x id:%x #scts:%x lba:%x addr:%x logdrv:%x #sg:%x\n", + printk ("%lu cmd:%x id:%x #scts:%x lba:%x addr:%x logdrv:%x #sg:%x\n", pScb->SCpnt->pid, mbox->cmd, mbox->cmdid, mbox->numsectors, mbox->lba, mbox->xferaddr, mbox->logdrv, mbox->numsgelements); @@ -3351,9 +3351,13 @@ mbox[0] = IS_BIOS_ENABLED; mbox[2] = GET_BIOS; - mboxpnt->xferaddr = virt_to_bus ((void *) megacfg->mega_buffer); + mboxpnt->xferaddr = pci_map_single(megacfg->dev, + (void *) megacfg->mega_buffer, (2 * 1024L), + PCI_DMA_FROMDEVICE); ret = megaIssueCmd (megacfg, mbox, NULL, 0); + + pci_unmap_single(megacfg->dev, mboxpnt->xferaddr, 2 * 1024L, PCI_DMA_FROMDEVICE); return (*(char *) megacfg->mega_buffer); } diff -Nru a/drivers/scsi/scsi_ioctl.c b/drivers/scsi/scsi_ioctl.c --- a/drivers/scsi/scsi_ioctl.c Wed Apr 16 18:32:26 2003 +++ b/drivers/scsi/scsi_ioctl.c Wed Apr 16 18:32:26 2003 @@ -219,6 +219,9 @@ unsigned int needed, buf_needed; int timeout, retries, result; int data_direction, gfp_mask = GFP_KERNEL; +#if __GNUC__ < 3 + int foo; +#endif if (!sic) return -EINVAL; @@ -232,11 +235,21 @@ if (verify_area(VERIFY_READ, sic, sizeof(Scsi_Ioctl_Command))) return -EFAULT; +#if __GNUC__ < 3 + foo = __get_user(inlen, &sic->inlen); + if (foo) + return -EFAULT; + + foo = __get_user(outlen, &sic->outlen); + if (foo) + return -EFAULT; +#else if(__get_user(inlen, &sic->inlen)) return -EFAULT; if(__get_user(outlen, &sic->outlen)) return -EFAULT; +#endif /* * We do not transfer more than MAX_BUF with this interface. diff -Nru a/drivers/scsi/sym53c8xx_2/sym_glue.c b/drivers/scsi/sym53c8xx_2/sym_glue.c --- a/drivers/scsi/sym53c8xx_2/sym_glue.c Wed Apr 16 18:32:26 2003 +++ b/drivers/scsi/sym53c8xx_2/sym_glue.c Wed Apr 16 18:32:26 2003 @@ -295,11 +295,7 @@ #ifndef SYM_LINUX_DYNAMIC_DMA_MAPPING typedef u_long bus_addr_t; #else -#if SYM_CONF_DMA_ADDRESSING_MODE > 0 -typedef dma64_addr_t bus_addr_t; -#else typedef dma_addr_t bus_addr_t; -#endif #endif /* diff -Nru a/drivers/scsi/sym53c8xx_2/sym_malloc.c b/drivers/scsi/sym53c8xx_2/sym_malloc.c --- a/drivers/scsi/sym53c8xx_2/sym_malloc.c Wed Apr 16 18:32:26 2003 +++ b/drivers/scsi/sym53c8xx_2/sym_malloc.c Wed Apr 16 18:32:26 2003 @@ -150,7 +150,6 @@ ((m_link_p) a)->next = h[i].next; h[i].next = (m_link_p) a; #endif - break; } b = a ^ s; q = &h[i]; diff -Nru a/drivers/serial/8250.c b/drivers/serial/8250.c --- a/drivers/serial/8250.c Wed Apr 16 18:32:25 2003 +++ b/drivers/serial/8250.c Wed Apr 16 18:32:25 2003 @@ -2065,9 +2065,11 @@ return __register_serial(req, -1); } -int __init early_serial_setup(struct serial_struct *req) +int __init early_serial_setup(struct uart_port *port) { - __register_serial(req, req->line); + serial8250_isa_init_ports(); + serial8250_ports[port->line].port = *port; + serial8250_ports[port->line].port.ops = &serial8250_pops; return 0; } diff -Nru a/drivers/serial/8250_acpi.c b/drivers/serial/8250_acpi.c --- /dev/null Wed Dec 31 16:00:00 1969 +++ b/drivers/serial/8250_acpi.c Wed Apr 16 18:32:26 2003 @@ -0,0 +1,178 @@ +/* + * linux/drivers/char/acpi_serial.c + * + * Copyright (C) 2000, 2002 Hewlett-Packard Co. + * Khalid Aziz + * + * Detect and initialize the headless console serial port defined in SPCR table and debug + * serial port defined in DBGP table. + * + * 2002/08/29 davidm Adjust it to new 2.5 serial driver infrastructure. + */ +#include +#include +#include +#include +#include +#include +#include +#include + +#include +#include + +#undef SERIAL_DEBUG_ACPI + +#define ACPI_SERIAL_CONSOLE_PORT 0 +#define ACPI_SERIAL_DEBUG_PORT 5 + +/* + * Query ACPI tables for a debug and a headless console serial port. If found, add them to + * rs_table[]. A pointer to either SPCR or DBGP table is passed as parameter. This + * function should be called before serial_console_init() is called to make sure the SPCR + * serial console will be available for use. IA-64 kernel calls this function from within + * acpi.c when it encounters SPCR or DBGP tables as it parses the ACPI 2.0 tables during + * bootup. + */ +void __init +setup_serial_acpi (void *tablep) +{ + acpi_ser_t *acpi_ser_p; + struct uart_port port; + unsigned long iobase; + int gsi; + +#ifdef SERIAL_DEBUG_ACPI + printk("Entering setup_serial_acpi()\n"); +#endif + + /* Now get the table */ + if (!tablep) + return; + + memset(&port, 0, sizeof(port)); + + acpi_ser_p = (acpi_ser_t *) tablep; + + /* + * Perform a sanity check on the table. Table should have a signature of "SPCR" or + * "DBGP" and it should be atleast 52 bytes long. + */ + if (strncmp(acpi_ser_p->signature, ACPI_SPCRT_SIGNATURE, ACPI_SIG_LEN) != 0 && + strncmp(acpi_ser_p->signature, ACPI_DBGPT_SIGNATURE, ACPI_SIG_LEN) != 0) + return; + if (acpi_ser_p->length < 52) + return; + + iobase = (((u64) acpi_ser_p->base_addr.addrh) << 32) | acpi_ser_p->base_addr.addrl; + gsi = ( (acpi_ser_p->global_int[3] << 24) | (acpi_ser_p->global_int[2] << 16) + | (acpi_ser_p->global_int[1] << 8) | (acpi_ser_p->global_int[0] << 0)); + +#ifdef SERIAL_DEBUG_ACPI + printk("setup_serial_acpi(): table pointer = 0x%p\n", acpi_ser_p); + printk(" sig = '%c%c%c%c'\n", acpi_ser_p->signature[0], + acpi_ser_p->signature[1], acpi_ser_p->signature[2], acpi_ser_p->signature[3]); + printk(" length = %d\n", acpi_ser_p->length); + printk(" Rev = %d\n", acpi_ser_p->rev); + printk(" Interface type = %d\n", acpi_ser_p->intfc_type); + printk(" Base address = 0x%lX\n", iobase); + printk(" IRQ = %d\n", acpi_ser_p->irq); + printk(" Global System Int = %d\n", gsi); + printk(" Baud rate = "); + switch (acpi_ser_p->baud) { + case ACPI_SERIAL_BAUD_9600: + printk("9600\n"); + break; + + case ACPI_SERIAL_BAUD_19200: + printk("19200\n"); + break; + + case ACPI_SERIAL_BAUD_57600: + printk("57600\n"); + break; + + case ACPI_SERIAL_BAUD_115200: + printk("115200\n"); + break; + + default: + printk("Huh (%d)\n", acpi_ser_p->baud); + break; + } + if (acpi_ser_p->base_addr.space_id == ACPI_SERIAL_PCICONF_SPACE) { + printk(" PCI serial port:\n"); + printk(" Bus %d, Device %d, Vendor ID 0x%x, Dev ID 0x%x\n", + acpi_ser_p->pci_bus, acpi_ser_p->pci_dev, + acpi_ser_p->pci_vendor_id, acpi_ser_p->pci_dev_id); + } +#endif + /* + * Now build a serial_req structure to update the entry in rs_table for the + * headless console port. + */ + switch (acpi_ser_p->intfc_type) { + case ACPI_SERIAL_INTFC_16550: + port.type = PORT_16550; + port.uartclk = BASE_BAUD * 16; + break; + + case ACPI_SERIAL_INTFC_16450: + port.type = PORT_16450; + port.uartclk = BASE_BAUD * 16; + break; + + default: + port.type = PORT_UNKNOWN; + break; + } + if (strncmp(acpi_ser_p->signature, ACPI_SPCRT_SIGNATURE, ACPI_SIG_LEN) == 0) + port.line = ACPI_SERIAL_CONSOLE_PORT; + else if (strncmp(acpi_ser_p->signature, ACPI_DBGPT_SIGNATURE, ACPI_SIG_LEN) == 0) + port.line = ACPI_SERIAL_DEBUG_PORT; + /* + * Check if this is an I/O mapped address or a memory mapped address + */ + if (acpi_ser_p->base_addr.space_id == ACPI_SERIAL_MEM_SPACE) { + port.iobase = 0; + port.mapbase = iobase; + port.membase = ioremap(iobase, 64); + port.iotype = SERIAL_IO_MEM; + } else if (acpi_ser_p->base_addr.space_id == ACPI_SERIAL_IO_SPACE) { + port.iobase = iobase; + port.mapbase = 0; + port.membase = NULL; + port.iotype = SERIAL_IO_PORT; + } else if (acpi_ser_p->base_addr.space_id == ACPI_SERIAL_PCICONF_SPACE) { + printk("WARNING: No support for PCI serial console\n"); + return; + } + + /* + * If the table does not have IRQ information, use 0 for IRQ. This will force + * rs_init() to probe for IRQ. + */ + if (acpi_ser_p->length < 53) + port.irq = 0; + else { + port.flags = UPF_SKIP_TEST | UPF_BOOT_AUTOCONF | UPF_AUTO_IRQ; + if (acpi_ser_p->int_type & (ACPI_SERIAL_INT_APIC | ACPI_SERIAL_INT_SAPIC)) + port.irq = gsi; + else if (acpi_ser_p->int_type & ACPI_SERIAL_INT_PCAT) + port.irq = acpi_ser_p->irq; + else + /* + * IRQ type not being set would mean UART will run in polling + * mode. Do not probe for IRQ in that case. + */ + port.flags &= UPF_AUTO_IRQ; + } + if (early_serial_setup(&port) < 0) { + printk("early_serial_setup() for ACPI serial console port failed\n"); + return; + } + +#ifdef SERIAL_DEBUG_ACPI + printk("Leaving setup_serial_acpi()\n"); +#endif +} diff -Nru a/drivers/serial/8250_hcdp.c b/drivers/serial/8250_hcdp.c --- /dev/null Wed Dec 31 16:00:00 1969 +++ b/drivers/serial/8250_hcdp.c Wed Apr 16 18:32:26 2003 @@ -0,0 +1,215 @@ +/* + * linux/drivers/char/hcdp_serial.c + * + * Copyright (C) 2002 Hewlett-Packard Co. + * Khalid Aziz + * + * Parse the EFI HCDP table to locate serial console and debug ports and initialize them. + * + * 2002/08/29 davidm Adjust it to new 2.5 serial driver infrastructure (untested). + */ +#include + +#include +#include +#include +#include +#include +#include +#include + +#include +#include + +#include "8250_hcdp.h" + +#undef SERIAL_DEBUG_HCDP + +/* + * Parse the HCDP table to find descriptions for headless console and debug serial ports + * and add them to rs_table[]. A pointer to HCDP table is passed as parameter. This + * function should be called before serial_console_init() is called to make sure the HCDP + * serial console will be available for use. IA-64 kernel calls this function from + * setup_arch() after the EFI and ACPI tables have been parsed. + */ +void __init +setup_serial_hcdp (void *tablep) +{ + hcdp_dev_t *hcdp_dev; + struct uart_port port; + unsigned long iobase; + hcdp_t hcdp; + int gsi, nr; +#if 0 + static int shift_once = 1; +#endif + +#ifdef SERIAL_DEBUG_HCDP + printk("Entering setup_serial_hcdp()\n"); +#endif + + /* Verify we have a valid table pointer */ + if (!tablep) + return; + + memset(&port, 0, sizeof(port)); + + /* + * Don't trust firmware to give us a table starting at an aligned address. Make a + * local copy of the HCDP table with aligned structures. + */ + memcpy(&hcdp, tablep, sizeof(hcdp)); + + /* + * Perform a sanity check on the table. Table should have a signature of "HCDP" + * and it should be atleast 82 bytes long to have any useful information. + */ + if ((strncmp(hcdp.signature, HCDP_SIGNATURE, HCDP_SIG_LEN) != 0)) + return; + if (hcdp.len < 82) + return; + +#ifdef SERIAL_DEBUG_HCDP + printk("setup_serial_hcdp(): table pointer = 0x%p, sig = '%.4s'\n", + tablep, hcdp.signature); + printk(" length = %d, rev = %d, ", hcdp.len, hcdp.rev); + printk("OEM ID = %.6s, # of entries = %d\n", hcdp.oemid, hcdp.num_entries); +#endif + + /* + * Parse each device entry + */ + for (nr = 0; nr < hcdp.num_entries; nr++) { + hcdp_dev = hcdp.hcdp_dev + nr; + /* + * We will parse only the primary console device which is the first entry + * for these devices. We will ignore rest of the entries for the same type + * device that has already been parsed and initialized + */ + if (hcdp_dev->type != HCDP_DEV_CONSOLE) + continue; + + iobase = ((u64) hcdp_dev->base_addr.addrhi << 32) | hcdp_dev->base_addr.addrlo; + gsi = hcdp_dev->global_int; + + /* See PCI spec v2.2, Appendix D (Class Codes): */ + switch (hcdp_dev->pci_prog_intfc) { + case 0x00: port.type = PORT_8250; break; + case 0x01: port.type = PORT_16450; break; + case 0x02: port.type = PORT_16550; break; + case 0x03: port.type = PORT_16650; break; + case 0x04: port.type = PORT_16750; break; + case 0x05: port.type = PORT_16850; break; + case 0x06: port.type = PORT_16C950; break; + default: + printk(KERN_WARNING"warning: EFI HCDP table reports unknown serial " + "programming interface 0x%02x; will autoprobe.\n", + hcdp_dev->pci_prog_intfc); + port.type = PORT_UNKNOWN; + break; + } + +#ifdef SERIAL_DEBUG_HCDP + printk(" type = %s, uart = %d\n", ((hcdp_dev->type == HCDP_DEV_CONSOLE) + ? "Headless Console" : ((hcdp_dev->type == HCDP_DEV_DEBUG) + ? "Debug port" : "Huh????")), + port.type); + printk(" base address space = %s, base address = 0x%lx\n", + ((hcdp_dev->base_addr.space_id == ACPI_MEM_SPACE) + ? "Memory Space" : ((hcdp_dev->base_addr.space_id == ACPI_IO_SPACE) + ? "I/O space" : "PCI space")), + iobase); + printk(" gsi = %d, baud rate = %lu, bits = %d, clock = %d\n", + gsi, (unsigned long) hcdp_dev->baud, hcdp_dev->bits, hcdp_dev->clock_rate); + if (hcdp_dev->base_addr.space_id == ACPI_PCICONF_SPACE) + printk(" PCI id: %02x:%02x:%02x, vendor ID=0x%x, dev ID=0x%x\n", + hcdp_dev->pci_seg, hcdp_dev->pci_bus, hcdp_dev->pci_dev, + hcdp_dev->pci_vendor_id, hcdp_dev->pci_dev_id); +#endif + /* + * Now fill in a port structure to update the 8250 port table.. + */ + if (hcdp_dev->clock_rate) + port.uartclk = hcdp_dev->clock_rate; + else + port.uartclk = BASE_BAUD * 16; + + /* + * Check if this is an I/O mapped address or a memory mapped address + */ + if (hcdp_dev->base_addr.space_id == ACPI_MEM_SPACE) { + port.iobase = 0; + port.mapbase = iobase; + port.membase = ioremap(iobase, 64); + port.iotype = SERIAL_IO_MEM; + } else if (hcdp_dev->base_addr.space_id == ACPI_IO_SPACE) { + port.iobase = iobase; + port.mapbase = 0; + port.membase = NULL; + port.iotype = SERIAL_IO_PORT; + } else if (hcdp_dev->base_addr.space_id == ACPI_PCICONF_SPACE) { + printk(KERN_WARNING"warning: No support for PCI serial console\n"); + return; + } + port.irq = gsi; + port.flags = UPF_SKIP_TEST | UPF_BOOT_AUTOCONF; + if (gsi) + port.flags |= ASYNC_AUTO_IRQ; + + /* + * Note: the above memset() initializes port.line to 0, so we register + * this port as ttyS0. + */ + if (early_serial_setup(&port) < 0) { + printk("setup_serial_hcdp(): early_serial_setup() for HCDP serial " + "console port failed. Will try any additional consoles in HCDP.\n"); + continue; + } + break; + } + +#ifdef SERIAL_DEBUG_HCDP + printk("Leaving setup_serial_hcdp()\n"); +#endif +} + +#ifdef CONFIG_IA64_EARLY_PRINTK_UART +unsigned long +hcdp_early_uart (void) +{ + efi_system_table_t *systab; + efi_config_table_t *config_tables; + unsigned long addr = 0; + hcdp_t *hcdp = 0; + hcdp_dev_t *dev; + int i; + + systab = (efi_system_table_t *) ia64_boot_param->efi_systab; + if (!systab) + return 0; + systab = __va(systab); + + config_tables = (efi_config_table_t *) systab->tables; + if (!config_tables) + return 0; + config_tables = __va(config_tables); + + for (i = 0; i < systab->nr_tables; i++) { + if (efi_guidcmp(config_tables[i].guid, HCDP_TABLE_GUID) == 0) { + hcdp = (hcdp_t *) config_tables[i].table; + break; + } + } + if (!hcdp) + return 0; + hcdp = __va(hcdp); + + for (i = 0, dev = hcdp->hcdp_dev; i < hcdp->num_entries; i++, dev++) { + if (dev->type == HCDP_DEV_CONSOLE) { + addr = (u64) dev->base_addr.addrhi << 32 | dev->base_addr.addrlo; + break; + } + } + return addr; +} +#endif /* CONFIG_IA64_EARLY_PRINTK_UART */ diff -Nru a/drivers/serial/8250_hcdp.h b/drivers/serial/8250_hcdp.h --- /dev/null Wed Dec 31 16:00:00 1969 +++ b/drivers/serial/8250_hcdp.h Wed Apr 16 18:32:26 2003 @@ -0,0 +1,79 @@ +/* + * drivers/serial/8250_hcdp.h + * + * Copyright (C) 2002 Hewlett-Packard Co. + * Khalid Aziz + * + * Definitions for HCDP defined serial ports (Serial console and debug + * ports) + */ + +/* ACPI table signatures */ +#define HCDP_SIG_LEN 4 +#define HCDP_SIGNATURE "HCDP" + +/* Space ID as defined in ACPI generic address structure */ +#define ACPI_MEM_SPACE 0 +#define ACPI_IO_SPACE 1 +#define ACPI_PCICONF_SPACE 2 + +/* + * Maximum number of HCDP devices we want to read in + */ +#define MAX_HCDP_DEVICES 6 + +/* + * Default UART clock rate if clock rate is 0 in HCDP table. + */ +#define DEFAULT_UARTCLK 115200 + +/* + * ACPI Generic Address Structure + */ +typedef struct { + u8 space_id; + u8 bit_width; + u8 bit_offset; + u8 resv; + u32 addrlo; + u32 addrhi; +} acpi_gen_addr; + +/* HCDP Device descriptor entry types */ +#define HCDP_DEV_CONSOLE 0 +#define HCDP_DEV_DEBUG 1 + +/* HCDP Device descriptor type */ +typedef struct { + u8 type; + u8 bits; + u8 parity; + u8 stop_bits; + u8 pci_seg; + u8 pci_bus; + u8 pci_dev; + u8 pci_func; + u64 baud; + acpi_gen_addr base_addr; + u16 pci_dev_id; + u16 pci_vendor_id; + u32 global_int; + u32 clock_rate; + u8 pci_prog_intfc; + u8 resv; +} hcdp_dev_t; + +/* HCDP Table format */ +typedef struct { + u8 signature[4]; + u32 len; + u8 rev; + u8 chksum; + u8 oemid[6]; + u8 oem_tabid[8]; + u32 oem_rev; + u8 creator_id[4]; + u32 creator_rev; + u32 num_entries; + hcdp_dev_t hcdp_dev[MAX_HCDP_DEVICES]; +} hcdp_t; diff -Nru a/drivers/serial/Kconfig b/drivers/serial/Kconfig --- a/drivers/serial/Kconfig Wed Apr 16 18:32:26 2003 +++ b/drivers/serial/Kconfig Wed Apr 16 18:32:26 2003 @@ -39,6 +39,18 @@ Most people will say Y or M here, so that they can use serial mice, modems and similar devices connecting to the standard serial ports. +config SERIAL_8250_ACPI + tristate "8250/16550 device discovery support via ACPI SPCR/DBGP tables" + depends on IA64 + help + Locate serial ports via the Microsoft proprietary ACPI SPCR/DBGP tables. + This table has been superseded by the EFI HCDP table and this option + should be turned off unless you have a very old prototype of an + HP ZX1-based machine. If you don't know what that is, you definitely + want to turn it off. Also, you must turn this off if you + have a remote management console card such as the HP ECI + card. The kernel will get stuck otherwise. + config SERIAL_8250_CONSOLE bool "Console on 8250/16550 and compatible serial port (EXPERIMENTAL)" depends on SERIAL_8250=y @@ -76,6 +88,15 @@ The module will be called serial_cs. If you want to compile it as a module, say M here and read . If unsure, say N. + +config SERIAL_8250_HCDP + bool "8250/16550 device discovery support via EFI HCDP table" + depends on IA64 + ---help--- + If you wish to make the serial console port described by the EFI + HCDP table available for use as serial console or general + purpose port, say Y here. See + . config SERIAL_8250_EXTENDED bool "Extended 8250/16550 serial driver options" diff -Nru a/drivers/serial/Makefile b/drivers/serial/Makefile --- a/drivers/serial/Makefile Wed Apr 16 18:32:26 2003 +++ b/drivers/serial/Makefile Wed Apr 16 18:32:26 2003 @@ -8,6 +8,8 @@ serial-8250-$(CONFIG_GSC) += 8250_gsc.o serial-8250-$(CONFIG_PCI) += 8250_pci.o serial-8250-$(CONFIG_PNP) += 8250_pnp.o +serial-8250-$(CONFIG_ACPI) += acpi.o +serial-8250-$(CONFIG_SERIAL_8250_HCDP) += 8250_hcdp.o obj-$(CONFIG_SERIAL_CORE) += core.o obj-$(CONFIG_SERIAL_21285) += 21285.o obj-$(CONFIG_SERIAL_8250) += 8250.o $(serial-8250-y) @@ -28,3 +30,4 @@ obj-$(CONFIG_SERIAL_COLDFIRE) += mcfserial.o obj-$(CONFIG_V850E_NB85E_UART) += nb85e_uart.o obj-$(CONFIG_SERIAL98) += serial98.o +serial-8250-$(CONFIG_SERIAL_8250_ACPI) += 8250_acpi.o diff -Nru a/drivers/serial/acpi.c b/drivers/serial/acpi.c --- /dev/null Wed Dec 31 16:00:00 1969 +++ b/drivers/serial/acpi.c Wed Apr 16 18:32:26 2003 @@ -0,0 +1,110 @@ +/* + * serial/acpi.c + * Copyright (c) 2002-2003 Matthew Wilcox for Hewlett-Packard + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License, or + * (at your option) any later version. + */ + +#include +#include +#include +#include + +#include + +#include +#include + +static void acpi_serial_address(struct serial_struct *req, struct acpi_resource_address32 *addr32) +{ + unsigned long size; + + size = addr32->max_address_range - addr32->min_address_range + 1; + req->iomap_base = addr32->min_address_range; + req->iomem_base = ioremap(req->iomap_base, size); + req->io_type = SERIAL_IO_MEM; +} + +static void acpi_serial_irq(struct serial_struct *req, struct acpi_resource_ext_irq *ext_irq) +{ + if (ext_irq->number_of_interrupts > 0) { +#ifdef CONFIG_IA64 + req->irq = acpi_register_irq(ext_irq->interrupts[0], + ext_irq->active_high_low == ACPI_ACTIVE_HIGH, + ext_irq->edge_level == ACPI_EDGE_SENSITIVE); +#else + req->irq = ext_irq->interrupts[0]; +#endif + } +} + +static int acpi_serial_add(struct acpi_device *device) +{ + acpi_status result; + struct acpi_buffer buffer = { ACPI_ALLOCATE_BUFFER, NULL }; + struct serial_struct serial_req; + int line, offset = 0; + + memset(&serial_req, 0, sizeof(serial_req)); + result = acpi_get_current_resources(device->handle, &buffer); + if (ACPI_FAILURE(result)) { + result = -ENODEV; + goto out; + } + + while (offset <= buffer.length) { + struct acpi_resource *res = buffer.pointer + offset; + if (res->length == 0) + break; + offset += res->length; + if (res->id == ACPI_RSTYPE_ADDRESS32) { + acpi_serial_address(&serial_req, &res->data.address32); + } else if (res->id == ACPI_RSTYPE_EXT_IRQ) { + acpi_serial_irq(&serial_req, &res->data.extended_irq); + } + } + + serial_req.baud_base = BASE_BAUD; + serial_req.flags = ASYNC_SKIP_TEST|ASYNC_BOOT_AUTOCONF|ASYNC_AUTO_IRQ; + + result = 0; + line = register_serial(&serial_req); + if (line < 0) + result = -ENODEV; + + out: + acpi_os_free(buffer.pointer); + return result; +} + +static int acpi_serial_remove(struct acpi_device *device, int type) +{ + return 0; +} + +static struct acpi_driver acpi_serial_driver = { + .name = "serial", + .class = "", + .ids = "PNP0501", + .ops = { + .add = acpi_serial_add, + .remove = acpi_serial_remove, + }, +}; + +static int __init acpi_serial_init(void) +{ + acpi_bus_register_driver(&acpi_serial_driver); + return 0; +} + +static void __exit acpi_serial_exit(void) +{ + acpi_bus_unregister_driver(&acpi_serial_driver); +} + +module_init(acpi_serial_init); +module_exit(acpi_serial_exit); diff -Nru a/drivers/video/radeonfb.c b/drivers/video/radeonfb.c --- a/drivers/video/radeonfb.c Wed Apr 16 18:32:26 2003 +++ b/drivers/video/radeonfb.c Wed Apr 16 18:32:26 2003 @@ -716,6 +716,7 @@ radeon_sleep_notify, SLEEP_LEVEL_VIDEO, }; #endif /* CONFIG_PMAC_PBOOK */ + #ifdef CONFIG_PMAC_BACKLIGHT static int radeon_set_backlight_enable(int on, int level, void *data); static int radeon_set_backlight_level(int level, void *data); @@ -724,7 +725,6 @@ radeon_set_backlight_level }; #endif /* CONFIG_PMAC_BACKLIGHT */ - #endif /* CONFIG_ALL_PPC */ diff -Nru a/fs/exec.c b/fs/exec.c --- a/fs/exec.c Wed Apr 16 18:32:26 2003 +++ b/fs/exec.c Wed Apr 16 18:32:26 2003 @@ -407,7 +407,7 @@ mpnt->vm_start = PAGE_MASK & (unsigned long) bprm->p; mpnt->vm_end = STACK_TOP; #endif - mpnt->vm_page_prot = PAGE_COPY; + mpnt->vm_page_prot = protection_map[VM_STACK_FLAGS & 0x7]; mpnt->vm_flags = VM_STACK_FLAGS; mpnt->vm_ops = NULL; mpnt->vm_pgoff = 0; diff -Nru a/fs/fcntl.c b/fs/fcntl.c --- a/fs/fcntl.c Wed Apr 16 18:32:26 2003 +++ b/fs/fcntl.c Wed Apr 16 18:32:26 2003 @@ -320,6 +320,7 @@ * to fix this will be in libc. */ err = filp->f_owner.pid; + force_successful_syscall_return(); break; case F_SETOWN: err = f_setown(filp, arg, 1); diff -Nru a/fs/namei.c b/fs/namei.c --- a/fs/namei.c Wed Apr 16 18:32:26 2003 +++ b/fs/namei.c Wed Apr 16 18:32:26 2003 @@ -847,6 +847,7 @@ read_unlock(¤t->fs->lock); if (__emul_lookup_dentry(name,nd)) return 0; + read_lock(¤t->fs->lock); } nd->mnt = mntget(current->fs->rootmnt); nd->dentry = dget(current->fs->root); diff -Nru a/fs/proc/base.c b/fs/proc/base.c --- a/fs/proc/base.c Wed Apr 16 18:32:26 2003 +++ b/fs/proc/base.c Wed Apr 16 18:32:26 2003 @@ -534,7 +534,24 @@ } #endif +static loff_t mem_lseek(struct file * file, loff_t offset, int orig) +{ + switch (orig) { + case 0: + file->f_pos = offset; + break; + case 1: + file->f_pos += offset; + break; + default: + return -EINVAL; + } + force_successful_syscall_return(); + return file->f_pos; +} + static struct file_operations proc_mem_operations = { + .llseek = mem_lseek, .read = mem_read, .write = mem_write, .open = mem_open, diff -Nru a/fs/proc/proc_misc.c b/fs/proc/proc_misc.c --- a/fs/proc/proc_misc.c Wed Apr 16 18:32:25 2003 +++ b/fs/proc/proc_misc.c Wed Apr 16 18:32:25 2003 @@ -388,7 +388,7 @@ extern int show_interrupts(struct seq_file *p, void *v); static int interrupts_open(struct inode *inode, struct file *file) { - unsigned size = PAGE_SIZE * (1 + NR_CPUS / 8); + unsigned size = 4096 * (1 + NR_CPUS / 8); char *buf = kmalloc(size, GFP_KERNEL); struct seq_file *m; int res; diff -Nru a/fs/select.c b/fs/select.c --- a/fs/select.c Wed Apr 16 18:32:25 2003 +++ b/fs/select.c Wed Apr 16 18:32:25 2003 @@ -176,7 +176,7 @@ { struct poll_wqueues table; poll_table *wait; - int retval, i, off; + int retval, i; long __timeout = *timeout; read_lock(¤t->files->file_lock); @@ -193,38 +193,53 @@ wait = NULL; retval = 0; for (;;) { + unsigned long *rinp, *routp, *rexp, *inp, *outp, *exp; set_current_state(TASK_INTERRUPTIBLE); - for (i = 0 ; i < n; i++) { - unsigned long bit = BIT(i); - unsigned long mask; - struct file *file; - off = i / __NFDBITS; - if (!(bit & BITS(fds, off))) + inp = fds->in; outp = fds->out; exp = fds->ex; + rinp = fds->res_in; routp = fds->res_out; rexp = fds->res_ex; + + for (i = 0; i < n; ++rinp, ++routp, ++rexp) { + unsigned long in, out, ex, all_bits, bit = 1, mask, j; + unsigned long res_in = 0, res_out = 0, res_ex = 0; + struct file_operations *f_op = NULL; + struct file *file = NULL; + + in = *inp++; out = *outp++; ex = *exp++; + all_bits = in | out | ex; + if (all_bits == 0) continue; - file = fget(i); - mask = POLLNVAL; - if (file) { + + for (j = 0; j < __NFDBITS; ++j, ++i, bit <<= 1) { + if (i >= n) + break; + if (!(bit & all_bits)) + continue; + file = fget(i); + if (file) + f_op = file->f_op; mask = DEFAULT_POLLMASK; - if (file->f_op && file->f_op->poll) - mask = file->f_op->poll(file, wait); - fput(file); - } - if ((mask & POLLIN_SET) && ISSET(bit, __IN(fds,off))) { - SET(bit, __RES_IN(fds,off)); - retval++; - wait = NULL; - } - if ((mask & POLLOUT_SET) && ISSET(bit, __OUT(fds,off))) { - SET(bit, __RES_OUT(fds,off)); - retval++; - wait = NULL; - } - if ((mask & POLLEX_SET) && ISSET(bit, __EX(fds,off))) { - SET(bit, __RES_EX(fds,off)); - retval++; - wait = NULL; + if (file) { + if (f_op && f_op->poll) + mask = (*f_op->poll)(file, retval ? NULL : wait); + fput(file); + if ((mask & POLLIN_SET) && (in & bit)) { + res_in |= bit; + retval++; + } + if ((mask & POLLOUT_SET) && (out & bit)) { + res_out |= bit; + retval++; + } + if ((mask & POLLEX_SET) && (ex & bit)) { + res_ex |= bit; + retval++; + } + } } + if (res_in) *rinp = res_in; + if (res_out) *routp = res_out; + if (res_ex) *rexp = res_ex; } wait = NULL; if (retval || !__timeout || signal_pending(current)) diff -Nru a/include/asm-alpha/agp.h b/include/asm-alpha/agp.h --- a/include/asm-alpha/agp.h Wed Apr 16 18:32:25 2003 +++ b/include/asm-alpha/agp.h Wed Apr 16 18:32:25 2003 @@ -10,4 +10,11 @@ #define flush_agp_mappings() #define flush_agp_cache() mb() +/* + * Page-protection value to be used for AGP memory mapped into kernel space. For + * platforms which use coherent AGP DMA, this can be PAGE_KERNEL. For others, it needs to + * be an uncached mapping (such as write-combining). + */ +#define PAGE_AGP PAGE_KERNEL_NOCACHE /* XXX fix me */ + #endif diff -Nru a/include/asm-i386/agp.h b/include/asm-i386/agp.h --- a/include/asm-i386/agp.h Wed Apr 16 18:32:25 2003 +++ b/include/asm-i386/agp.h Wed Apr 16 18:32:25 2003 @@ -20,4 +20,11 @@ worth it. Would need a page for it. */ #define flush_agp_cache() asm volatile("wbinvd":::"memory") +/* + * Page-protection value to be used for AGP memory mapped into kernel space. For + * platforms which use coherent AGP DMA, this can be PAGE_KERNEL. For others, it needs to + * be an uncached mapping (such as write-combining). + */ +#define PAGE_AGP PAGE_KERNEL_NOCACHE + #endif diff -Nru a/include/asm-i386/hw_irq.h b/include/asm-i386/hw_irq.h --- a/include/asm-i386/hw_irq.h Wed Apr 16 18:32:26 2003 +++ b/include/asm-i386/hw_irq.h Wed Apr 16 18:32:26 2003 @@ -117,4 +117,6 @@ static inline void hw_resend_irq(struct hw_interrupt_type *h, unsigned int i) {} #endif +extern irq_desc_t irq_desc [NR_IRQS]; + #endif /* _ASM_HW_IRQ_H */ diff -Nru a/include/asm-i386/ptrace.h b/include/asm-i386/ptrace.h --- a/include/asm-i386/ptrace.h Wed Apr 16 18:32:25 2003 +++ b/include/asm-i386/ptrace.h Wed Apr 16 18:32:25 2003 @@ -57,6 +57,7 @@ #ifdef __KERNEL__ #define user_mode(regs) ((VM_MASK & (regs)->eflags) || (3 & (regs)->xcs)) #define instruction_pointer(regs) ((regs)->eip) +#define force_successful_syscall_return() do { } while (0) #endif #endif diff -Nru a/include/asm-ia64/acpi-ext.h b/include/asm-ia64/acpi-ext.h --- /dev/null Wed Dec 31 16:00:00 1969 +++ b/include/asm-ia64/acpi-ext.h Wed Apr 16 18:32:26 2003 @@ -0,0 +1,32 @@ +/* + * ia64/platform/hp/common/hp_acpi.h + * + * Copyright (C) 2003 Hewlett-Packard + * Copyright (C) Alex Williamson + * + * Vendor specific extensions to ACPI. The HP-specific extensiosn are also used by NEC. + */ +#ifndef _ASM_IA64_ACPI_EXT_H +#define _ASM_IA64_ACPI_EXT_H + +#include + +#define HP_CCSR_LENGTH 0x21 +#define HP_CCSR_TYPE 0x2 +#define HP_CCSR_GUID EFI_GUID(0x69e9adf9, 0x924f, 0xab5f, \ + 0xf6, 0x4a, 0x24, 0xd2, 0x01, 0x37, 0x0e, 0xad) + +struct acpi_hp_vendor_long { + u8 guid_id; + u8 guid[16]; + u8 csr_base[8]; + u8 csr_length[8]; +}; + +extern acpi_status hp_acpi_csr_space (acpi_handle, u64 *base, u64 *length); +extern acpi_status acpi_get_crs (acpi_handle, struct acpi_buffer *); +extern struct acpi_resource *acpi_get_crs_next (struct acpi_buffer *, int *); +extern union acpi_resource_data *acpi_get_crs_type (struct acpi_buffer *, int *, int); +extern void acpi_dispose_crs (struct acpi_buffer *); + +#endif /* _ASM_IA64_ACPI_EXT_H */ diff -Nru a/include/asm-ia64/acpi.h b/include/asm-ia64/acpi.h --- a/include/asm-ia64/acpi.h Wed Apr 16 18:32:26 2003 +++ b/include/asm-ia64/acpi.h Wed Apr 16 18:32:26 2003 @@ -100,7 +100,9 @@ int acpi_request_vector (u32 int_type); int acpi_get_prt (struct pci_vector_struct **vectors, int *count); int acpi_get_interrupt_model (int *type); +int acpi_register_irq (u32 gsi, u32 polarity, u32 trigger); int acpi_irq_to_vector (u32 irq); +int acpi_get_addr_space (void *obj, u8 type, u64 *base, u64 *length,u64 *tra); #ifdef CONFIG_ACPI_NUMA #include diff -Nru a/include/asm-ia64/atomic.h b/include/asm-ia64/atomic.h --- a/include/asm-ia64/atomic.h Wed Apr 16 18:32:25 2003 +++ b/include/asm-ia64/atomic.h Wed Apr 16 18:32:25 2003 @@ -55,6 +55,13 @@ return new; } +#define atomic_add_return(i,v) \ + ((__builtin_constant_p(i) && \ + ( (i == 1) || (i == 4) || (i == 8) || (i == 16) \ + || (i == -1) || (i == -4) || (i == -8) || (i == -16))) \ + ? ia64_fetch_and_add(i, &(v)->counter) \ + : ia64_atomic_add(i, v)) + /* * Atomically add I to V and return TRUE if the resulting value is * negative. @@ -62,15 +69,9 @@ static __inline__ int atomic_add_negative (int i, atomic_t *v) { - return ia64_atomic_add(i, v) < 0; + return atomic_add_return(i, v) < 0; } -#define atomic_add_return(i,v) \ - ((__builtin_constant_p(i) && \ - ( (i == 1) || (i == 4) || (i == 8) || (i == 16) \ - || (i == -1) || (i == -4) || (i == -8) || (i == -16))) \ - ? ia64_fetch_and_add(i, &(v)->counter) \ - : ia64_atomic_add(i, v)) #define atomic_sub_return(i,v) \ ((__builtin_constant_p(i) && \ diff -Nru a/include/asm-ia64/bitops.h b/include/asm-ia64/bitops.h --- a/include/asm-ia64/bitops.h Wed Apr 16 18:32:26 2003 +++ b/include/asm-ia64/bitops.h Wed Apr 16 18:32:26 2003 @@ -275,7 +275,7 @@ } static __inline__ int -test_bit (int nr, volatile void *addr) +test_bit (int nr, const volatile void *addr) { return 1 & (((const volatile __u32 *) addr)[nr >> 5] >> (nr & 31)); } diff -Nru a/include/asm-ia64/compat.h b/include/asm-ia64/compat.h --- a/include/asm-ia64/compat.h Wed Apr 16 18:32:26 2003 +++ b/include/asm-ia64/compat.h Wed Apr 16 18:32:26 2003 @@ -27,6 +27,11 @@ typedef u32 compat_caddr_t; typedef __kernel_fsid_t compat_fsid_t; +typedef s32 compat_int_t; +typedef s32 compat_long_t; +typedef u32 compat_uint_t; +typedef u32 compat_ulong_t; + struct compat_timespec { compat_time_t tv_sec; s32 tv_nsec; @@ -68,6 +73,22 @@ compat_pid_t l_pid; }; +#define F_GETLK64 12 +#define F_SETLK64 13 +#define F_SETLKW64 14 + +/* + * IA32 uses 4 byte alignment for 64 bit quantities, + * so we need to pack this structure. + */ +struct compat_flock64 { + short l_type; + short l_whence; + compat_loff_t l_start; + compat_loff_t l_len; + compat_pid_t l_pid; +} __attribute__((packed)); + struct compat_statfs { int f_type; int f_bsize; @@ -87,5 +108,21 @@ #define _COMPAT_NSIG_BPW 32 typedef u32 compat_sigset_word; + +#define COMPAT_OFF_T_MAX 0x7fffffff +#define COMPAT_LOFF_T_MAX 0x7fffffffffffffffL + +/* + * A pointer passed in from user mode. This should not be used for syscall parameters, + * just declare them as pointers because the syscall entry code will have appropriately + * comverted them already. + */ +typedef u32 compat_uptr_t; + +static inline void * +compat_ptr (compat_uptr_t uptr) +{ + return (void *) (unsigned long) uptr; +} #endif /* _ASM_IA64_COMPAT_H */ diff -Nru a/include/asm-ia64/fcntl.h b/include/asm-ia64/fcntl.h --- a/include/asm-ia64/fcntl.h Wed Apr 16 18:32:26 2003 +++ b/include/asm-ia64/fcntl.h Wed Apr 16 18:32:26 2003 @@ -78,9 +78,6 @@ pid_t l_pid; }; -#ifdef __KERNEL__ -# define flock64 flock -#endif - #define F_LINUX_SPECIFIC_BASE 1024 + #endif /* _ASM_IA64_FCNTL_H */ diff -Nru a/include/asm-ia64/fpu.h b/include/asm-ia64/fpu.h --- a/include/asm-ia64/fpu.h Wed Apr 16 18:32:26 2003 +++ b/include/asm-ia64/fpu.h Wed Apr 16 18:32:26 2003 @@ -2,7 +2,7 @@ #define _ASM_IA64_FPU_H /* - * Copyright (C) 1998, 1999, 2002 Hewlett-Packard Co + * Copyright (C) 1998, 1999, 2002, 2003 Hewlett-Packard Co * David Mosberger-Tang */ @@ -57,8 +57,9 @@ struct ia64_fpreg { union { unsigned long bits[2]; + long double __dummy; /* force 16-byte alignment */ } u; -} __attribute__ ((aligned (16))); +}; # endif /* __ASSEMBLY__ */ diff -Nru a/include/asm-ia64/ia32.h b/include/asm-ia64/ia32.h --- a/include/asm-ia64/ia32.h Wed Apr 16 18:32:26 2003 +++ b/include/asm-ia64/ia32.h Wed Apr 16 18:32:26 2003 @@ -18,10 +18,6 @@ #define IA32_PAGE_ALIGN(addr) (((addr) + IA32_PAGE_SIZE - 1) & IA32_PAGE_MASK) #define IA32_CLOCKS_PER_SEC 100 /* Cast in stone for IA32 Linux */ -#define F_GETLK64 12 -#define F_SETLK64 13 -#define F_SETLKW64 14 - /* sigcontext.h */ /* * As documented in the iBCS2 standard.. @@ -214,8 +210,11 @@ /* POSIX.1b timers */ struct { - unsigned int _timer1; - unsigned int _timer2; + timer_t _tid; /* timer id */ + int _overrun; /* overrun count */ + char _pad[sizeof(unsigned int) - sizeof(int)]; + sigval_t32 _sigval; /* same as below */ + int _sys_private; /* not to be passed to user */ } _timer; /* POSIX.1b signals */ diff -Nru a/include/asm-ia64/intrinsics.h b/include/asm-ia64/intrinsics.h --- a/include/asm-ia64/intrinsics.h Wed Apr 16 18:32:26 2003 +++ b/include/asm-ia64/intrinsics.h Wed Apr 16 18:32:26 2003 @@ -17,16 +17,16 @@ extern unsigned long __bad_size_for_ia64_fetch_and_add (void); extern unsigned long __bad_increment_for_ia64_fetch_and_add (void); -#define IA64_FETCHADD(tmp,v,n,sz) \ +#define IA64_FETCHADD(tmp,v,n,sz,sem) \ ({ \ switch (sz) { \ case 4: \ - __asm__ __volatile__ ("fetchadd4.rel %0=[%1],%2" \ + __asm__ __volatile__ ("fetchadd4."sem" %0=[%1],%2" \ : "=r"(tmp) : "r"(v), "i"(n) : "memory"); \ break; \ \ case 8: \ - __asm__ __volatile__ ("fetchadd8.rel %0=[%1],%2" \ + __asm__ __volatile__ ("fetchadd8."sem" %0=[%1],%2" \ : "=r"(tmp) : "r"(v), "i"(n) : "memory"); \ break; \ \ @@ -35,35 +35,33 @@ } \ }) -#define ia64_fetch_and_add(i,v) \ +#define ia64_fetchadd(i,v,sem) \ ({ \ __u64 _tmp; \ volatile __typeof__(*(v)) *_v = (v); \ /* Can't use a switch () here: gcc isn't always smart enough for that... */ \ if ((i) == -16) \ - IA64_FETCHADD(_tmp, _v, -16, sizeof(*(v))); \ + IA64_FETCHADD(_tmp, _v, -16, sizeof(*(v)), sem); \ else if ((i) == -8) \ - IA64_FETCHADD(_tmp, _v, -8, sizeof(*(v))); \ + IA64_FETCHADD(_tmp, _v, -8, sizeof(*(v)), sem); \ else if ((i) == -4) \ - IA64_FETCHADD(_tmp, _v, -4, sizeof(*(v))); \ - else if ((i) == -2) \ - IA64_FETCHADD(_tmp, _v, -2, sizeof(*(v))); \ + IA64_FETCHADD(_tmp, _v, -4, sizeof(*(v)), sem); \ else if ((i) == -1) \ - IA64_FETCHADD(_tmp, _v, -1, sizeof(*(v))); \ + IA64_FETCHADD(_tmp, _v, -1, sizeof(*(v)), sem); \ else if ((i) == 1) \ - IA64_FETCHADD(_tmp, _v, 1, sizeof(*(v))); \ - else if ((i) == 2) \ - IA64_FETCHADD(_tmp, _v, 2, sizeof(*(v))); \ + IA64_FETCHADD(_tmp, _v, 1, sizeof(*(v)), sem); \ else if ((i) == 4) \ - IA64_FETCHADD(_tmp, _v, 4, sizeof(*(v))); \ + IA64_FETCHADD(_tmp, _v, 4, sizeof(*(v)), sem); \ else if ((i) == 8) \ - IA64_FETCHADD(_tmp, _v, 8, sizeof(*(v))); \ + IA64_FETCHADD(_tmp, _v, 8, sizeof(*(v)), sem); \ else if ((i) == 16) \ - IA64_FETCHADD(_tmp, _v, 16, sizeof(*(v))); \ + IA64_FETCHADD(_tmp, _v, 16, sizeof(*(v)), sem); \ else \ _tmp = __bad_increment_for_ia64_fetch_and_add(); \ - (__typeof__(*(v))) (_tmp + (i)); /* return new value */ \ + (__typeof__(*(v))) (_tmp); /* return old value */ \ }) + +#define ia64_fetch_and_add(i,v) (ia64_fetchadd(i, v, "rel") + (i)) /* return new value */ /* * This function doesn't exist, so you'll get a linker error if diff -Nru a/include/asm-ia64/io.h b/include/asm-ia64/io.h --- a/include/asm-ia64/io.h Wed Apr 16 18:32:25 2003 +++ b/include/asm-ia64/io.h Wed Apr 16 18:32:25 2003 @@ -69,22 +69,6 @@ */ #define __ia64_mf_a() __asm__ __volatile__ ("mf.a" ::: "memory") -/** - * __ia64_mmiob - I/O space memory barrier - * - * Acts as a memory mapped I/O barrier for platforms that queue writes to - * I/O space. This ensures that subsequent writes to I/O space arrive after - * all previous writes. For most ia64 platforms, this is a simple - * 'mf.a' instruction, so the address is ignored. For other platforms, - * the address may be required to ensure proper ordering of writes to I/O space - * since a 'dummy' read might be necessary to barrier the write operation. - */ -static inline void -__ia64_mmiob (void) -{ - __ia64_mf_a(); -} - static inline const unsigned long __ia64_get_io_port_base (void) { @@ -287,7 +271,6 @@ #define __outb platform_outb #define __outw platform_outw #define __outl platform_outl -#define __mmiob platform_mmiob #define inb(p) __inb(p) #define inw(p) __inw(p) @@ -301,31 +284,35 @@ #define outsb(p,s,c) __outsb(p,s,c) #define outsw(p,s,c) __outsw(p,s,c) #define outsl(p,s,c) __outsl(p,s,c) -#define mmiob() __mmiob() /* * The address passed to these functions are ioremap()ped already. + * + * We need these to be machine vectors since some platforms don't provide + * DMA coherence via PIO reads (PCI drivers and the spec imply that this is + * a good idea). Writes are ok though for all existing ia64 platforms (and + * hopefully it'll stay that way). */ static inline unsigned char -__readb (void *addr) +__ia64_readb (void *addr) { return *(volatile unsigned char *)addr; } static inline unsigned short -__readw (void *addr) +__ia64_readw (void *addr) { return *(volatile unsigned short *)addr; } static inline unsigned int -__readl (void *addr) +__ia64_readl (void *addr) { return *(volatile unsigned int *) addr; } static inline unsigned long -__readq (void *addr) +__ia64_readq (void *addr) { return *(volatile unsigned long *) addr; } @@ -353,6 +340,11 @@ { *(volatile unsigned long *) addr = val; } + +#define __readb platform_readb +#define __readw platform_readw +#define __readl platform_readl +#define __readq platform_readq #define readb(a) __readb((void *)(a)) #define readw(a) __readw((void *)(a)) diff -Nru a/include/asm-ia64/machvec.h b/include/asm-ia64/machvec.h --- a/include/asm-ia64/machvec.h Wed Apr 16 18:32:26 2003 +++ b/include/asm-ia64/machvec.h Wed Apr 16 18:32:26 2003 @@ -43,7 +43,6 @@ typedef void ia64_mv_pci_unmap_sg (struct pci_dev *, struct scatterlist *, int, int); typedef void ia64_mv_pci_dma_sync_single (struct pci_dev *, dma_addr_t, size_t, int); typedef void ia64_mv_pci_dma_sync_sg (struct pci_dev *, struct scatterlist *, int, int); -typedef unsigned long ia64_mv_pci_dma_address (struct scatterlist *); typedef int ia64_mv_pci_dma_supported (struct pci_dev *, u64); /* @@ -61,7 +60,10 @@ typedef void ia64_mv_outb_t (unsigned char, unsigned long); typedef void ia64_mv_outw_t (unsigned short, unsigned long); typedef void ia64_mv_outl_t (unsigned int, unsigned long); -typedef void ia64_mv_mmiob_t (void); +typedef unsigned char ia64_mv_readb_t (void *); +typedef unsigned short ia64_mv_readw_t (void *); +typedef unsigned int ia64_mv_readl_t (void *); +typedef unsigned long ia64_mv_readq_t (void *); extern void machvec_noop (void); @@ -99,7 +101,6 @@ # define platform_pci_unmap_sg ia64_mv.unmap_sg # define platform_pci_dma_sync_single ia64_mv.sync_single # define platform_pci_dma_sync_sg ia64_mv.sync_sg -# define platform_pci_dma_address ia64_mv.dma_address # define platform_pci_dma_supported ia64_mv.dma_supported # define platform_irq_desc ia64_mv.irq_desc # define platform_irq_to_vector ia64_mv.irq_to_vector @@ -110,7 +111,10 @@ # define platform_outb ia64_mv.outb # define platform_outw ia64_mv.outw # define platform_outl ia64_mv.outl -# define platofrm_mmiob ia64_mv.mmiob +# define platform_readb ia64_mv.readb +# define platform_readw ia64_mv.readw +# define platform_readl ia64_mv.readl +# define platform_readq ia64_mv.readq # endif /* __attribute__((__aligned__(16))) is required to make size of the @@ -138,7 +142,6 @@ ia64_mv_pci_unmap_sg *unmap_sg; ia64_mv_pci_dma_sync_single *sync_single; ia64_mv_pci_dma_sync_sg *sync_sg; - ia64_mv_pci_dma_address *dma_address; ia64_mv_pci_dma_supported *dma_supported; ia64_mv_irq_desc *irq_desc; ia64_mv_irq_to_vector *irq_to_vector; @@ -149,8 +152,11 @@ ia64_mv_outb_t *outb; ia64_mv_outw_t *outw; ia64_mv_outl_t *outl; - ia64_mv_mmiob_t *mmiob; -} __attribute__((__aligned__(16))); + ia64_mv_readb_t *readb; + ia64_mv_readw_t *readw; + ia64_mv_readl_t *readl; + ia64_mv_readq_t *readq; +}; #define MACHVEC_INIT(name) \ { \ @@ -173,7 +179,6 @@ platform_pci_unmap_sg, \ platform_pci_dma_sync_single, \ platform_pci_dma_sync_sg, \ - platform_pci_dma_address, \ platform_pci_dma_supported, \ platform_irq_desc, \ platform_irq_to_vector, \ @@ -184,7 +189,10 @@ platform_outb, \ platform_outw, \ platform_outl, \ - platform_mmiob \ + platform_readb, \ + platform_readw, \ + platform_readl, \ + platform_readq, \ } extern struct ia64_machine_vector ia64_mv; @@ -206,7 +214,6 @@ extern ia64_mv_pci_unmap_sg swiotlb_unmap_sg; extern ia64_mv_pci_dma_sync_single swiotlb_sync_single; extern ia64_mv_pci_dma_sync_sg swiotlb_sync_sg; -extern ia64_mv_pci_dma_address swiotlb_dma_address; extern ia64_mv_pci_dma_supported swiotlb_pci_dma_supported; /* @@ -267,9 +274,6 @@ #ifndef platform_pci_dma_sync_sg # define platform_pci_dma_sync_sg swiotlb_sync_sg #endif -#ifndef platform_pci_dma_address -# define platform_pci_dma_address swiotlb_dma_address -#endif #ifndef platform_pci_dma_supported # define platform_pci_dma_supported swiotlb_pci_dma_supported #endif @@ -300,8 +304,17 @@ #ifndef platform_outl # define platform_outl __ia64_outl #endif -#ifndef platform_mmiob -# define platform_mmiob __ia64_mmiob +#ifndef platform_readb +# define platform_readb __ia64_readb +#endif +#ifndef platform_readw +# define platform_readw __ia64_readw +#endif +#ifndef platform_readl +# define platform_readl __ia64_readl +#endif +#ifndef platform_readq +# define platform_readq __ia64_readq #endif #endif /* _ASM_IA64_MACHVEC_H */ diff -Nru a/include/asm-ia64/machvec_hpzx1.h b/include/asm-ia64/machvec_hpzx1.h --- a/include/asm-ia64/machvec_hpzx1.h Wed Apr 16 18:32:25 2003 +++ b/include/asm-ia64/machvec_hpzx1.h Wed Apr 16 18:32:25 2003 @@ -8,7 +8,6 @@ extern ia64_mv_pci_unmap_single sba_unmap_single; extern ia64_mv_pci_map_sg sba_map_sg; extern ia64_mv_pci_unmap_sg sba_unmap_sg; -extern ia64_mv_pci_dma_address sba_dma_address; extern ia64_mv_pci_dma_supported sba_dma_supported; /* @@ -29,7 +28,6 @@ #define platform_pci_unmap_sg sba_unmap_sg #define platform_pci_dma_sync_single ((ia64_mv_pci_dma_sync_single *) machvec_noop) #define platform_pci_dma_sync_sg ((ia64_mv_pci_dma_sync_sg *) machvec_noop) -#define platform_pci_dma_address sba_dma_address #define platform_pci_dma_supported sba_dma_supported #endif /* _ASM_IA64_MACHVEC_HPZX1_h */ diff -Nru a/include/asm-ia64/machvec_init.h b/include/asm-ia64/machvec_init.h --- a/include/asm-ia64/machvec_init.h Wed Apr 16 18:32:25 2003 +++ b/include/asm-ia64/machvec_init.h Wed Apr 16 18:32:25 2003 @@ -16,7 +16,10 @@ extern ia64_mv_outb_t __ia64_outb; extern ia64_mv_outw_t __ia64_outw; extern ia64_mv_outl_t __ia64_outl; -extern ia64_mv_mmiob_t __ia64_mmiob; +extern ia64_mv_readb_t __ia64_readb; +extern ia64_mv_readw_t __ia64_readw; +extern ia64_mv_readl_t __ia64_readl; +extern ia64_mv_readq_t __ia64_readq; #define MACHVEC_HELPER(name) \ struct ia64_machine_vector machvec_##name __attribute__ ((unused, __section__ (".machvec"))) \ diff -Nru a/include/asm-ia64/machvec_sn1.h b/include/asm-ia64/machvec_sn1.h --- a/include/asm-ia64/machvec_sn1.h Wed Apr 16 18:32:26 2003 +++ b/include/asm-ia64/machvec_sn1.h Wed Apr 16 18:32:26 2003 @@ -44,7 +44,6 @@ extern ia64_mv_outb_t sn1_outb; extern ia64_mv_outw_t sn1_outw; extern ia64_mv_outl_t sn1_outl; -extern ia64_mv_mmiob_t sn_mmiob; extern ia64_mv_pci_alloc_consistent sn1_pci_alloc_consistent; extern ia64_mv_pci_free_consistent sn1_pci_free_consistent; extern ia64_mv_pci_map_single sn1_pci_map_single; @@ -53,7 +52,6 @@ extern ia64_mv_pci_unmap_sg sn1_pci_unmap_sg; extern ia64_mv_pci_dma_sync_single sn1_pci_dma_sync_single; extern ia64_mv_pci_dma_sync_sg sn1_pci_dma_sync_sg; -extern ia64_mv_pci_dma_address sn1_dma_address; /* * This stuff has dual use! @@ -74,7 +72,6 @@ #define platform_outb sn1_outb #define platform_outw sn1_outw #define platform_outl sn1_outl -#define platform_mmiob sn_mmiob #define platform_pci_dma_init machvec_noop #define platform_pci_alloc_consistent sn1_pci_alloc_consistent #define platform_pci_free_consistent sn1_pci_free_consistent @@ -84,6 +81,5 @@ #define platform_pci_unmap_sg sn1_pci_unmap_sg #define platform_pci_dma_sync_single sn1_pci_dma_sync_single #define platform_pci_dma_sync_sg sn1_pci_dma_sync_sg -#define platform_pci_dma_address sn1_dma_address #endif /* _ASM_IA64_MACHVEC_SN1_h */ diff -Nru a/include/asm-ia64/machvec_sn2.h b/include/asm-ia64/machvec_sn2.h --- a/include/asm-ia64/machvec_sn2.h Wed Apr 16 18:32:26 2003 +++ b/include/asm-ia64/machvec_sn2.h Wed Apr 16 18:32:26 2003 @@ -1,5 +1,5 @@ /* - * Copyright (c) 2002 Silicon Graphics, Inc. All Rights Reserved. + * Copyright (c) 2002-2003 Silicon Graphics, Inc. All Rights Reserved. * * This program is free software; you can redistribute it and/or modify it * under the terms of version 2 of the GNU General Public License @@ -41,13 +41,16 @@ extern ia64_mv_irq_desc sn_irq_desc; extern ia64_mv_irq_to_vector sn_irq_to_vector; extern ia64_mv_local_vector_to_irq sn_local_vector_to_irq; -extern ia64_mv_inb_t sn_inb; -extern ia64_mv_inw_t sn_inw; -extern ia64_mv_inl_t sn_inl; -extern ia64_mv_outb_t sn_outb; -extern ia64_mv_outw_t sn_outw; -extern ia64_mv_outl_t sn_outl; -extern ia64_mv_mmiob_t sn2_mmiob; +extern ia64_mv_inb_t __sn_inb; +extern ia64_mv_inw_t __sn_inw; +extern ia64_mv_inl_t __sn_inl; +extern ia64_mv_outb_t __sn_outb; +extern ia64_mv_outw_t __sn_outw; +extern ia64_mv_outl_t __sn_outl; +extern ia64_mv_readb_t __sn_readb; +extern ia64_mv_readw_t __sn_readw; +extern ia64_mv_readl_t __sn_readl; +extern ia64_mv_readq_t __sn_readq; extern ia64_mv_pci_alloc_consistent sn_pci_alloc_consistent; extern ia64_mv_pci_free_consistent sn_pci_free_consistent; extern ia64_mv_pci_map_single sn_pci_map_single; @@ -56,7 +59,6 @@ extern ia64_mv_pci_unmap_sg sn_pci_unmap_sg; extern ia64_mv_pci_dma_sync_single sn_pci_dma_sync_single; extern ia64_mv_pci_dma_sync_sg sn_pci_dma_sync_sg; -extern ia64_mv_pci_dma_address sn_dma_address; extern ia64_mv_pci_dma_supported sn_pci_dma_supported; /* @@ -72,13 +74,17 @@ #define platform_irq_init sn_irq_init #define platform_send_ipi sn2_send_IPI #define platform_global_tlb_purge sn2_global_tlb_purge -#define platform_inb sn_inb -#define platform_inw sn_inw -#define platform_inl sn_inl -#define platform_outb sn_outb -#define platform_outw sn_outw -#define platform_outl sn_outl -#define platform_mmiob sn2_mmiob +#define platform_pci_fixup sn_pci_fixup +#define platform_inb __sn_inb +#define platform_inw __sn_inw +#define platform_inl __sn_inl +#define platform_outb __sn_outb +#define platform_outw __sn_outw +#define platform_outl __sn_outl +#define platform_readb __sn_readb +#define platform_readw __sn_readw +#define platform_readl __sn_readl +#define platform_readq __sn_readq #define platform_irq_desc sn_irq_desc #define platform_irq_to_vector sn_irq_to_vector #define platform_local_vector_to_irq sn_local_vector_to_irq @@ -91,7 +97,6 @@ #define platform_pci_unmap_sg sn_pci_unmap_sg #define platform_pci_dma_sync_single sn_pci_dma_sync_single #define platform_pci_dma_sync_sg sn_pci_dma_sync_sg -#define platform_pci_dma_address sn_dma_address #define platform_pci_dma_supported sn_pci_dma_supported #endif /* _ASM_IA64_MACHVEC_SN2_H */ diff -Nru a/include/asm-ia64/mca.h b/include/asm-ia64/mca.h --- a/include/asm-ia64/mca.h Wed Apr 16 18:32:25 2003 +++ b/include/asm-ia64/mca.h Wed Apr 16 18:32:25 2003 @@ -24,7 +24,7 @@ IA64_MCA_FAILURE = 1 }; -#define IA64_MCA_RENDEZ_TIMEOUT (100 * HZ) /* 1000 milliseconds */ +#define IA64_MCA_RENDEZ_TIMEOUT (20 * 1000) /* value in milliseconds - 20 seconds */ #define IA64_CMC_INT_DISABLE 0 #define IA64_CMC_INT_ENABLE 1 diff -Nru a/include/asm-ia64/module.h b/include/asm-ia64/module.h --- a/include/asm-ia64/module.h Wed Apr 16 18:32:26 2003 +++ b/include/asm-ia64/module.h Wed Apr 16 18:32:26 2003 @@ -1,6 +1,34 @@ #ifndef _ASM_IA64_MODULE_H #define _ASM_IA64_MODULE_H -/* Module support currently broken (due to in-kernel module loader). */ +/* + * IA-64-specific support for kernel module loader. + * + * Copyright (C) 2003 Hewlett-Packard Co + * David Mosberger-Tang + */ + +struct elf64_shdr; /* forward declration */ + +struct mod_arch_specific { + struct elf64_shdr *core_plt; /* core PLT section */ + struct elf64_shdr *init_plt; /* init PLT section */ + struct elf64_shdr *got; /* global offset table */ + struct elf64_shdr *opd; /* official procedure descriptors */ + struct elf64_shdr *unwind; /* unwind-table section */ + unsigned long gp; /* global-pointer for module */ + + void *unw_table; /* unwind-table cookie returned by unwinder */ + unsigned int next_got_entry; /* index of next available got entry */ +}; + +#define Elf_Shdr Elf64_Shdr +#define Elf_Sym Elf64_Sym +#define Elf_Ehdr Elf64_Ehdr + +#define MODULE_PROC_FAMILY "ia64" +#define MODULE_ARCH_VERMAGIC MODULE_PROC_FAMILY + +#define ARCH_SHF_SMALL SHF_IA_64_SHORT #endif /* _ASM_IA64_MODULE_H */ diff -Nru a/include/asm-ia64/page.h b/include/asm-ia64/page.h --- a/include/asm-ia64/page.h Wed Apr 16 18:32:25 2003 +++ b/include/asm-ia64/page.h Wed Apr 16 18:32:25 2003 @@ -89,7 +89,12 @@ #define virt_addr_valid(kaddr) pfn_valid(__pa(kaddr) >> PAGE_SHIFT) #ifndef CONFIG_DISCONTIGMEM -#define pfn_valid(pfn) ((pfn) < max_mapnr) +# ifdef CONFIG_VIRTUAL_MEM_MAP + extern int ia64_pfn_valid (unsigned long pfn); +# define pfn_valid(pfn) (((pfn) < max_mapnr) && ia64_pfn_valid(pfn)) +# else +# define pfn_valid(pfn) ((pfn) < max_mapnr) +# endif #define virt_to_page(kaddr) pfn_to_page(__pa(kaddr) >> PAGE_SHIFT) #define page_to_pfn(page) ((unsigned long) (page - mem_map)) #define pfn_to_page(pfn) (mem_map + (pfn)) diff -Nru a/include/asm-ia64/pal.h b/include/asm-ia64/pal.h --- a/include/asm-ia64/pal.h Wed Apr 16 18:32:26 2003 +++ b/include/asm-ia64/pal.h Wed Apr 16 18:32:26 2003 @@ -622,7 +622,8 @@ u64 pmsa_xip; /* previous iip */ u64 pmsa_xpsr; /* previous psr */ u64 pmsa_xfs; /* previous ifs */ - u64 pmsa_reserved[71]; /* pal_min_state_area should total to 1KB */ + u64 pmsa_br1; /* branch register 1 */ + u64 pmsa_reserved[70]; /* pal_min_state_area should total to 1KB */ } pal_min_state_area_t; diff -Nru a/include/asm-ia64/pci.h b/include/asm-ia64/pci.h --- a/include/asm-ia64/pci.h Wed Apr 16 18:32:26 2003 +++ b/include/asm-ia64/pci.h Wed Apr 16 18:32:26 2003 @@ -21,7 +21,7 @@ #define PCIBIOS_MIN_MEM 0x10000000 void pcibios_config_init(void); -struct pci_bus * pcibios_scan_root(int bus); +struct pci_bus * pcibios_scan_root(void *acpi_handle, int segment, int bus); struct pci_dev; @@ -58,7 +58,6 @@ #define pci_unmap_sg platform_pci_unmap_sg #define pci_dma_sync_single platform_pci_dma_sync_single #define pci_dma_sync_sg platform_pci_dma_sync_sg -#define sg_dma_address platform_pci_dma_address #define pci_dma_supported platform_pci_dma_supported /* pci_unmap_{single,page} is not a nop, thus... */ @@ -92,10 +91,22 @@ #define pci_controller_num(PDEV) (0) #define sg_dma_len(sg) ((sg)->dma_length) +#define sg_dma_address(sg) ((sg)->dma_address) #define HAVE_PCI_MMAP extern int pci_mmap_page_range (struct pci_dev *dev, struct vm_area_struct *vma, enum pci_mmap_state mmap_state, int write_combine); + +struct pci_controller { + void *acpi_handle; + void *iommu; + int segment; + + u64 mem_offset; +}; + +#define PCI_CONTROLLER(busdev) ((struct pci_controller *) busdev->sysdata) +#define PCI_SEGMENT(busdev) (PCI_CONTROLLER(busdev)->segment) /* generic pci stuff */ #include diff -Nru a/include/asm-ia64/pgtable.h b/include/asm-ia64/pgtable.h --- a/include/asm-ia64/pgtable.h Wed Apr 16 18:32:26 2003 +++ b/include/asm-ia64/pgtable.h Wed Apr 16 18:32:26 2003 @@ -59,6 +59,9 @@ #define _PAGE_ED (__IA64_UL(1) << 52) /* exception deferral */ #define _PAGE_PROTNONE (__IA64_UL(1) << 63) +/* Valid only for a PTE with the present bit cleared: */ +#define _PAGE_FILE (1 << 1) /* see swap & file pte remarks below */ + #define _PFN_MASK _PAGE_PPN_MASK #define _PAGE_CHG_MASK (_PFN_MASK | _PAGE_A | _PAGE_D) @@ -204,7 +207,13 @@ #define VMALLOC_START (0xa000000000000000 + 3*PERCPU_PAGE_SIZE) #define VMALLOC_VMADDR(x) ((unsigned long)(x)) -#define VMALLOC_END (0xa000000000000000 + (1UL << (4*PAGE_SHIFT - 9))) +#ifdef CONFIG_VIRTUAL_MEM_MAP +# define VMALLOC_END_INIT (0xa000000000000000 + (1UL << (4*PAGE_SHIFT - 9))) +# define VMALLOC_END vmalloc_end + extern unsigned long vmalloc_end; +#else +# define VMALLOC_END (0xa000000000000000 + (1UL << (4*PAGE_SHIFT - 9))) +#endif /* * Conversion functions: convert page frame number (pfn) and a protection value to a page @@ -253,6 +262,7 @@ #define pte_exec(pte) ((pte_val(pte) & _PAGE_AR_RX) != 0) #define pte_dirty(pte) ((pte_val(pte) & _PAGE_D) != 0) #define pte_young(pte) ((pte_val(pte) & _PAGE_A) != 0) +#define pte_file(pte) ((pte_val(pte) & _PAGE_FILE) != 0) /* * Note: we convert AR_RWX to AR_RX and AR_RW to AR_R by clearing the 2nd bit in the * access rights: @@ -402,12 +412,35 @@ extern pgd_t swapper_pg_dir[PTRS_PER_PGD]; extern void paging_init (void); -#define __swp_type(entry) (((entry).val >> 1) & 0xff) +/* + * Note: The macros below rely on the fact that MAX_SWAPFILES_SHIFT <= number of + * bits in the swap-type field of the swap pte. It would be nice to + * enforce that, but we can't easily include here. + * (Of course, better still would be to define MAX_SWAPFILES_SHIFT here...). + * + * Format of swap pte: + * bit 0 : present bit (must be zero) + * bit 1 : _PAGE_FILE (must be zero) + * bits 2- 8: swap-type + * bits 9-62: swap offset + * bit 63 : _PAGE_PROTNONE bit + * + * Format of file pte: + * bit 0 : present bit (must be zero) + * bit 1 : _PAGE_FILE (must be one) + * bits 2-62: file_offset/PAGE_SIZE + * bit 63 : _PAGE_PROTNONE bit + */ +#define __swp_type(entry) (((entry).val >> 2) & 0x7f) #define __swp_offset(entry) (((entry).val << 1) >> 10) -#define __swp_entry(type,offset) ((swp_entry_t) { ((type) << 1) | ((long) (offset) << 9) }) +#define __swp_entry(type,offset) ((swp_entry_t) { ((type) << 2) | ((long) (offset) << 9) }) #define __pte_to_swp_entry(pte) ((swp_entry_t) { pte_val(pte) }) #define __swp_entry_to_pte(x) ((pte_t) { (x).val }) +#define PTE_FILE_MAX_BITS 61 +#define pte_to_pgoff(pte) ((pte_val(pte) << 1) >> 3) +#define pgoff_to_pte(off) ((pte_t) { ((off) << 2) | _PAGE_FILE }) + #define io_remap_page_range remap_page_range /* XXX is this right? */ /* @@ -422,6 +455,18 @@ typedef pte_t *pte_addr_t; +# ifdef CONFIG_VIRTUAL_MEM_MAP + + /* arch mem_map init routine is needed due to holes in a virtual mem_map */ +# define HAVE_ARCH_MEMMAP_INIT + + typedef void memmap_init_callback_t (struct page *start, unsigned long size, + int nid, unsigned long zone, unsigned long start_pfn); + + extern void arch_memmap_init (memmap_init_callback_t *callback, struct page *start, + unsigned long size, int nid, unsigned long zone, + unsigned long start_pfn); +# endif /* CONFIG_VIRTUAL_MEM_MAP */ # endif /* !__ASSEMBLY__ */ /* diff -Nru a/include/asm-ia64/processor.h b/include/asm-ia64/processor.h --- a/include/asm-ia64/processor.h Wed Apr 16 18:32:26 2003 +++ b/include/asm-ia64/processor.h Wed Apr 16 18:32:26 2003 @@ -379,7 +379,7 @@ static inline unsigned long ia64_get_kr (unsigned long regnum) { - unsigned long r; + unsigned long r = 0; switch (regnum) { case 0: asm volatile ("mov %0=ar.k0" : "=r"(r)); break; @@ -915,13 +915,13 @@ #define ARCH_HAS_SPINLOCK_PREFETCH #define PREFETCH_STRIDE 256 -extern inline void +static inline void prefetch (const void *x) { __asm__ __volatile__ ("lfetch [%0]" : : "r"(x)); } -extern inline void +static inline void prefetchw (const void *x) { __asm__ __volatile__ ("lfetch.excl [%0]" : : "r"(x)); diff -Nru a/include/asm-ia64/ptrace.h b/include/asm-ia64/ptrace.h --- a/include/asm-ia64/ptrace.h Wed Apr 16 18:32:26 2003 +++ b/include/asm-ia64/ptrace.h Wed Apr 16 18:32:26 2003 @@ -227,8 +227,10 @@ }) struct task_struct; /* forward decl */ + struct unw_frame_info; /* forward decl */ extern void show_regs (struct pt_regs *); + extern void ia64_do_show_stack (struct unw_frame_info *, void *); extern unsigned long ia64_get_user_rbs_end (struct task_struct *, struct pt_regs *, unsigned long *); extern long ia64_peek (struct task_struct *, struct switch_stack *, unsigned long, diff -Nru a/include/asm-ia64/sal.h b/include/asm-ia64/sal.h --- a/include/asm-ia64/sal.h Wed Apr 16 18:32:26 2003 +++ b/include/asm-ia64/sal.h Wed Apr 16 18:32:26 2003 @@ -36,14 +36,24 @@ #define __SAL_CALL(result,a0,a1,a2,a3,a4,a5,a6,a7) \ result = (*ia64_sal)(a0,a1,a2,a3,a4,a5,a6,a7) -# define SAL_CALL(result,args...) do { \ - unsigned long flags; \ - struct ia64_fpreg fr[6]; \ - ia64_save_scratch_fpregs(fr); \ - spin_lock_irqsave(&sal_lock, flags); \ - __SAL_CALL(result,args); \ - spin_unlock_irqrestore(&sal_lock, flags); \ - ia64_load_scratch_fpregs(fr); \ +# define SAL_CALL(result,args...) do { \ + unsigned long __ia64_sc_flags; \ + struct ia64_fpreg __ia64_sc_fr[6]; \ + ia64_save_scratch_fpregs(__ia64_sc_fr); \ + spin_lock_irqsave(&sal_lock, __ia64_sc_flags); \ + __SAL_CALL(result, args); \ + spin_unlock_irqrestore(&sal_lock, __ia64_sc_flags); \ + ia64_load_scratch_fpregs(__ia64_sc_fr); \ +} while (0) + +# define SAL_CALL_NOLOCK(result,args...) do { \ + unsigned long __ia64_scn_flags; \ + struct ia64_fpreg __ia64_scn_fr[6]; \ + ia64_save_scratch_fpregs(__ia64_scn_fr); \ + local_irq_save(__ia64_scn_flags); \ + __SAL_CALL(result, args); \ + local_irq_restore(__ia64_scn_flags); \ + ia64_load_scratch_fpregs(__ia64_scn_fr); \ } while (0) #define SAL_SET_VECTORS 0x01000000 @@ -686,13 +696,14 @@ /* * Causes the processor to go into a spin loop within SAL where SAL awaits a wakeup from - * the monarch processor. + * the monarch processor. Must not lock, because it will not return on any cpu until the + * monarch processor sends a wake up. */ static inline s64 ia64_sal_mc_rendez (void) { struct ia64_sal_retval isrv; - SAL_CALL(isrv, SAL_MC_RENDEZ, 0, 0, 0, 0, 0, 0, 0); + SAL_CALL_NOLOCK(isrv, SAL_MC_RENDEZ, 0, 0, 0, 0, 0, 0, 0); return isrv.status; } diff -Nru a/include/asm-ia64/serial.h b/include/asm-ia64/serial.h --- a/include/asm-ia64/serial.h Wed Apr 16 18:32:26 2003 +++ b/include/asm-ia64/serial.h Wed Apr 16 18:32:26 2003 @@ -59,7 +59,6 @@ { 0, BASE_BAUD, 0x3E8, 4, STD_COM_FLAGS }, /* ttyS2 */ \ { 0, BASE_BAUD, 0x2E8, 3, STD_COM4_FLAGS }, /* ttyS3 */ - #ifdef CONFIG_SERIAL_MANY_PORTS #define EXTRA_SERIAL_PORT_DEFNS \ { 0, BASE_BAUD, 0x1A0, 9, FOURPORT_FLAGS }, /* ttyS4 */ \ diff -Nru a/include/asm-ia64/smp.h b/include/asm-ia64/smp.h --- a/include/asm-ia64/smp.h Wed Apr 16 18:32:26 2003 +++ b/include/asm-ia64/smp.h Wed Apr 16 18:32:26 2003 @@ -3,7 +3,7 @@ * * Copyright (C) 1999 VA Linux Systems * Copyright (C) 1999 Walt Drummond - * Copyright (C) 2001-2002 Hewlett-Packard Co + * Copyright (C) 2001-2003 Hewlett-Packard Co * David Mosberger-Tang */ #ifndef _ASM_IA64_SMP_H @@ -74,7 +74,7 @@ int i; for (i = 0; i < NR_CPUS; ++i) - if (cpu_physical_id(i) == (__u32) cpuid) + if (cpu_physical_id(i) == cpuid) break; return i; } diff -Nru a/include/asm-ia64/sn/io.h b/include/asm-ia64/sn/io.h --- a/include/asm-ia64/sn/io.h Wed Apr 16 18:32:25 2003 +++ b/include/asm-ia64/sn/io.h Wed Apr 16 18:32:25 2003 @@ -3,8 +3,8 @@ * License. See the file "COPYING" in the main directory of this archive * for more details. * + * Copyright (C) 2000-2003 Silicon Graphics, Inc. All Rights Reserved. * Copyright (C) 2000 Ralf Baechle - * Copyright (C) 2000-2001 Silicon Graphics, Inc. */ #ifndef _ASM_IA64_SN_IO_H #define _ASM_IA64_SN_IO_H @@ -77,5 +77,10 @@ #include #include #endif + +/* + * Used to ensure write ordering (like mb(), but for I/O space) + */ +extern void sn_mmiob(void); #endif /* _ASM_IA64_SN_IO_H */ diff -Nru a/include/asm-ia64/sn/sn2/io.h b/include/asm-ia64/sn/sn2/io.h --- /dev/null Wed Dec 31 16:00:00 1969 +++ b/include/asm-ia64/sn/sn2/io.h Wed Apr 16 18:32:26 2003 @@ -0,0 +1,206 @@ +/* + * This file is subject to the terms and conditions of the GNU General Public + * License. See the file "COPYING" in the main directory of this archive + * for more details. + * + * Copyright (C) 2000-2003 Silicon Graphics, Inc. All rights reserved. + */ + +#ifndef _ASM_SN_SN2_IO_H +#define _ASM_SN_SN2_IO_H + +extern void * sn_io_addr(unsigned long port); /* Forward definition */ +extern void sn_mmiob(void); /* Forward definition */ + +#define __sn_mf_a() __asm__ __volatile__ ("mf.a" ::: "memory") + +extern void sn_dma_flush(unsigned long); + +/* + * The following routines are SN Platform specific, called when + * a reference is made to inX/outX set macros. SN Platform + * inX set of macros ensures that Posted DMA writes on the + * Bridge is flushed. + * + * The routines should be self explainatory. + */ + +static inline unsigned int +__sn_inb (unsigned long port) +{ + volatile unsigned char *addr = sn_io_addr(port); + unsigned char ret; + + ret = *addr; + sn_dma_flush((unsigned long)addr); + __sn_mf_a(); + return ret; +} + +static inline unsigned int +__sn_inw (unsigned long port) +{ + volatile unsigned short *addr = sn_io_addr(port); + unsigned short ret; + + ret = *addr; + sn_dma_flush((unsigned long)addr); + __sn_mf_a(); + return ret; +} + +static inline unsigned int +__sn_inl (unsigned long port) +{ + volatile unsigned int *addr = sn_io_addr(port); + unsigned int ret; + + ret = *addr; + sn_dma_flush((unsigned long)addr); + __sn_mf_a(); + return ret; +} + +static inline void +__sn_outb (unsigned char val, unsigned long port) +{ + volatile unsigned char *addr = sn_io_addr(port); + + *addr = val; + sn_mmiob(); +} + +static inline void +__sn_outw (unsigned short val, unsigned long port) +{ + volatile unsigned short *addr = sn_io_addr(port); + + *addr = val; + sn_mmiob(); +} + +static inline void +__sn_outl (unsigned int val, unsigned long port) +{ + volatile unsigned int *addr = sn_io_addr(port); + + *addr = val; + sn_mmiob(); +} + +/* + * The following routines are SN Platform specific, called when + * a reference is made to readX/writeX set macros. SN Platform + * readX set of macros ensures that Posted DMA writes on the + * Bridge is flushed. + * + * The routines should be self explainatory. + */ + +static inline unsigned char +__sn_readb (void *addr) +{ + unsigned char val; + + val = *(volatile unsigned char *)addr; + sn_dma_flush((unsigned long)addr); + return val; +} + +static inline unsigned short +__sn_readw (void *addr) +{ + unsigned short val; + + val = *(volatile unsigned short *)addr; + sn_dma_flush((unsigned long)addr); + return val; +} + +static inline unsigned int +__sn_readl (void *addr) +{ + unsigned int val; + + val = *(volatile unsigned int *) addr; + sn_dma_flush((unsigned long)addr); + return val; +} + +static inline unsigned long +__sn_readq (void *addr) +{ + unsigned long val; + + val = *(volatile unsigned long *) addr; + sn_dma_flush((unsigned long)addr); + return val; +} + +/* + * For generic and SN2 kernels, we have a set of fast access + * PIO macros. These macros are provided on SN Platform + * because the normal inX and readX macros perform an + * additional task of flushing Post DMA request on the Bridge. + * + * These routines should be self explainatory. + */ + +static inline unsigned int +sn_inb_fast (unsigned long port) +{ + volatile unsigned char *addr = (unsigned char *)port; + unsigned char ret; + + ret = *addr; + __sn_mf_a(); + return ret; +} + +static inline unsigned int +sn_inw_fast (unsigned long port) +{ + volatile unsigned short *addr = (unsigned short *)port; + unsigned short ret; + + ret = *addr; + __sn_mf_a(); + return ret; +} + +static inline unsigned int +sn_inl_fast (unsigned long port) +{ + volatile unsigned int *addr = (unsigned int *)port; + unsigned int ret; + + ret = *addr; + __sn_mf_a(); + return ret; +} + +static inline unsigned char +sn_readb_fast (void *addr) +{ + return *(volatile unsigned char *)addr; +} + +static inline unsigned short +sn_readw_fast (void *addr) +{ + return *(volatile unsigned short *)addr; +} + +static inline unsigned int +sn_readl_fast (void *addr) +{ + return *(volatile unsigned int *) addr; +} + +static inline unsigned long +sn_readq_fast (void *addr) +{ + return *(volatile unsigned long *) addr; +} + +#endif diff -Nru a/include/asm-ia64/spinlock.h b/include/asm-ia64/spinlock.h --- a/include/asm-ia64/spinlock.h Wed Apr 16 18:32:25 2003 +++ b/include/asm-ia64/spinlock.h Wed Apr 16 18:32:25 2003 @@ -2,7 +2,7 @@ #define _ASM_IA64_SPINLOCK_H /* - * Copyright (C) 1998-2002 Hewlett-Packard Co + * Copyright (C) 1998-2003 Hewlett-Packard Co * David Mosberger-Tang * Copyright (C) 1999 Walt Drummond * @@ -15,58 +15,6 @@ #include #include -#undef NEW_LOCK - -#ifdef NEW_LOCK - -typedef struct { - volatile unsigned int lock; -} spinlock_t; - -#define SPIN_LOCK_UNLOCKED (spinlock_t) { 0 } -#define spin_lock_init(x) ((x)->lock = 0) - -/* - * Streamlined test_and_set_bit(0, (x)). We use test-and-test-and-set - * rather than a simple xchg to avoid writing the cache-line when - * there is contention. - */ -#define _raw_spin_lock(x) \ -{ \ - register char *addr __asm__ ("r31") = (char *) &(x)->lock; \ - \ - __asm__ __volatile__ ( \ - "mov r30=1\n" \ - "mov ar.ccv=r0\n" \ - ";;\n" \ - "cmpxchg4.acq r30=[%0],r30,ar.ccv\n" \ - ";;\n" \ - "cmp.ne p15,p0=r30,r0\n" \ - "(p15) br.call.spnt.few b7=ia64_spinlock_contention\n" \ - ";;\n" \ - "1:\n" /* force a new bundle */ \ - :: "r"(addr) \ - : "ar.ccv", "ar.pfs", "b7", "p15", "r28", "r29", "r30", "memory"); \ -} - -#define _raw_spin_trylock(x) \ -({ \ - register long result; \ - \ - __asm__ __volatile__ ( \ - "mov ar.ccv=r0\n" \ - ";;\n" \ - "cmpxchg4.acq %0=[%2],%1,ar.ccv\n" \ - : "=r"(result) : "r"(1), "r"(&(x)->lock) : "ar.ccv", "memory"); \ - (result == 0); \ -}) - -#define spin_is_locked(x) ((x)->lock != 0) -#define _raw_spin_unlock(x) do { barrier(); ((spinlock_t *) x)->lock = 0;} while (0) -#define spin_unlock_wait(x) do { barrier(); } while ((x)->lock) - -#else /* !NEW_LOCK */ - typedef struct { volatile unsigned int lock; } spinlock_t; @@ -123,46 +71,32 @@ #define _raw_spin_trylock(x) (cmpxchg_acq(&(x)->lock, 0, 1) == 0) #define spin_unlock_wait(x) do { barrier(); } while ((x)->lock) -#endif /* !NEW_LOCK */ - typedef struct { - volatile int read_counter:31; - volatile int write_lock:1; + volatile int read_counter : 31; + volatile int write_lock : 1; } rwlock_t; #define RW_LOCK_UNLOCKED (rwlock_t) { 0, 0 } #define rwlock_init(x) do { *(x) = RW_LOCK_UNLOCKED; } while(0) #define rwlock_is_locked(x) (*(volatile int *) (x) != 0) -#define _raw_read_lock(rw) \ -do { \ - int tmp = 0; \ - __asm__ __volatile__ ("1:\tfetchadd4.acq %0 = [%1], 1\n" \ - ";;\n" \ - "tbit.nz p6,p0 = %0, 31\n" \ - "(p6) br.cond.sptk.few 2f\n" \ - ".section .text.lock,\"ax\"\n" \ - "2:\tfetchadd4.rel %0 = [%1], -1\n" \ - ";;\n" \ - "3:\tld4.acq %0 = [%1]\n" \ - ";;\n" \ - "tbit.nz p6,p0 = %0, 31\n" \ - "(p6) br.cond.sptk.few 3b\n" \ - "br.cond.sptk.few 1b\n" \ - ";;\n" \ - ".previous\n" \ - : "=&r" (tmp) \ - : "r" (rw) : "p6", "memory"); \ -} while(0) - -#define _raw_read_unlock(rw) \ -do { \ - int tmp = 0; \ - __asm__ __volatile__ ("fetchadd4.rel %0 = [%1], -1\n" \ - : "=r" (tmp) \ - : "r" (rw) \ - : "memory"); \ -} while(0) +#define _raw_read_lock(rw) \ +do { \ + rwlock_t *__read_lock_ptr = (rw); \ + \ + while (unlikely(ia64_fetchadd(1, (int *) __read_lock_ptr, "acq") < 0)) { \ + ia64_fetchadd(-1, (int *) __read_lock_ptr, "rel"); \ + while (*(volatile int *)__read_lock_ptr < 0) \ + barrier(); \ + \ + } \ +} while (0) + +#define _raw_read_unlock(rw) \ +do { \ + rwlock_t *__read_lock_ptr = (rw); \ + ia64_fetchadd(-1, (int *) __read_lock_ptr, "rel"); \ +} while (0) #define _raw_write_lock(rw) \ do { \ diff -Nru a/include/asm-ia64/system.h b/include/asm-ia64/system.h --- a/include/asm-ia64/system.h Wed Apr 16 18:32:26 2003 +++ b/include/asm-ia64/system.h Wed Apr 16 18:32:26 2003 @@ -31,6 +31,7 @@ #include struct pci_vector_struct { + __u16 segment; /* PCI Segment number */ __u16 bus; /* PCI Bus number */ __u32 pci_id; /* ACPI split 16 bits device, 16 bits function (see section 6.1.1) */ __u8 pin; /* PCI PIN (0 = A, 1 = B, 2 = C, 3 = D) */ @@ -108,7 +109,7 @@ #define set_mb(var, value) do { (var) = (value); mb(); } while (0) #define set_wmb(var, value) do { (var) = (value); mb(); } while (0) -#define safe_halt() ia64_pal_halt(1) /* PAL_HALT */ +#define safe_halt() ia64_pal_halt_light() /* PAL_HALT_LIGHT */ /* * The group barrier in front of the rsm & ssm are necessary to ensure diff -Nru a/include/asm-ia64/unaligned.h b/include/asm-ia64/unaligned.h --- a/include/asm-ia64/unaligned.h Wed Apr 16 18:32:26 2003 +++ b/include/asm-ia64/unaligned.h Wed Apr 16 18:32:26 2003 @@ -7,8 +7,8 @@ * The main single-value unaligned transfer routines. Derived from * the Linux/Alpha version. * - * Copyright (C) 1998, 1999 Hewlett-Packard Co - * Copyright (C) 1998, 1999 David Mosberger-Tang + * Copyright (C) 1998, 1999, 2003 Hewlett-Packard Co + * David Mosberger-Tang */ #define get_unaligned(ptr) \ ((__typeof__(*(ptr)))ia64_get_unaligned((ptr), sizeof(*(ptr)))) @@ -16,110 +16,105 @@ #define put_unaligned(x,ptr) \ ia64_put_unaligned((unsigned long)(x), (ptr), sizeof(*(ptr))) -/* - * EGCS 1.1 knows about arbitrary unaligned loads. Define some - * packed structures to talk about such things with. - */ struct __una_u64 { __u64 x __attribute__((packed)); }; struct __una_u32 { __u32 x __attribute__((packed)); }; struct __una_u16 { __u16 x __attribute__((packed)); }; static inline unsigned long -__uldq (const unsigned long * r11) +__uld8 (const unsigned long * addr) { - const struct __una_u64 *ptr = (const struct __una_u64 *) r11; + const struct __una_u64 *ptr = (const struct __una_u64 *) addr; return ptr->x; } static inline unsigned long -__uldl (const unsigned int * r11) +__uld4 (const unsigned int * addr) { - const struct __una_u32 *ptr = (const struct __una_u32 *) r11; + const struct __una_u32 *ptr = (const struct __una_u32 *) addr; return ptr->x; } static inline unsigned long -__uldw (const unsigned short * r11) +__uld2 (const unsigned short * addr) { - const struct __una_u16 *ptr = (const struct __una_u16 *) r11; + const struct __una_u16 *ptr = (const struct __una_u16 *) addr; return ptr->x; } static inline void -__ustq (unsigned long r5, unsigned long * r11) +__ust8 (unsigned long val, unsigned long * addr) { - struct __una_u64 *ptr = (struct __una_u64 *) r11; - ptr->x = r5; + struct __una_u64 *ptr = (struct __una_u64 *) addr; + ptr->x = val; } static inline void -__ustl (unsigned long r5, unsigned int * r11) +__ust4 (unsigned long val, unsigned int * addr) { - struct __una_u32 *ptr = (struct __una_u32 *) r11; - ptr->x = r5; + struct __una_u32 *ptr = (struct __una_u32 *) addr; + ptr->x = val; } static inline void -__ustw (unsigned long r5, unsigned short * r11) +__ust2 (unsigned long val, unsigned short * addr) { - struct __una_u16 *ptr = (struct __una_u16 *) r11; - ptr->x = r5; + struct __una_u16 *ptr = (struct __una_u16 *) addr; + ptr->x = val; } /* - * This function doesn't actually exist. The idea is that when - * someone uses the macros below with an unsupported size (datatype), - * the linker will alert us to the problem via an unresolved reference - * error. + * This function doesn't actually exist. The idea is that when someone uses the macros + * below with an unsupported size (datatype), the linker will alert us to the problem via + * an unresolved reference error. */ extern unsigned long ia64_bad_unaligned_access_length (void); -#define ia64_get_unaligned(_ptr,size) \ -({ \ - const void *ptr = (_ptr); \ - unsigned long val; \ - \ - switch (size) { \ - case 1: \ - val = *(const unsigned char *) ptr; \ - break; \ - case 2: \ - val = __uldw((const unsigned short *)ptr); \ - break; \ - case 4: \ - val = __uldl((const unsigned int *)ptr); \ - break; \ - case 8: \ - val = __uldq((const unsigned long *)ptr); \ - break; \ - default: \ - val = ia64_bad_unaligned_access_length(); \ - } \ - val; \ +#define ia64_get_unaligned(_ptr,size) \ +({ \ + const void *__ia64_ptr = (_ptr); \ + unsigned long __ia64_val; \ + \ + switch (size) { \ + case 1: \ + __ia64_val = *(const unsigned char *) __ia64_ptr; \ + break; \ + case 2: \ + __ia64_val = __uld2((const unsigned short *)__ia64_ptr); \ + break; \ + case 4: \ + __ia64_val = __uld4((const unsigned int *)__ia64_ptr); \ + break; \ + case 8: \ + __ia64_val = __uld8((const unsigned long *)__ia64_ptr); \ + break; \ + default: \ + __ia64_val = ia64_bad_unaligned_access_length(); \ + } \ + __ia64_val; \ }) -#define ia64_put_unaligned(_val,_ptr,size) \ -do { \ - const void *ptr = (_ptr); \ - unsigned long val = (_val); \ - \ - switch (size) { \ - case 1: \ - *(unsigned char *)ptr = (val); \ - break; \ - case 2: \ - __ustw(val, (unsigned short *)ptr); \ - break; \ - case 4: \ - __ustl(val, (unsigned int *)ptr); \ - break; \ - case 8: \ - __ustq(val, (unsigned long *)ptr); \ - break; \ - default: \ - ia64_bad_unaligned_access_length(); \ - } \ +#define ia64_put_unaligned(_val,_ptr,size) \ +do { \ + const void *__ia64_ptr = (_ptr); \ + unsigned long __ia64_val = (_val); \ + \ + switch (size) { \ + case 1: \ + *(unsigned char *)__ia64_ptr = (__ia64_val); \ + break; \ + case 2: \ + __ust2(__ia64_val, (unsigned short *)__ia64_ptr); \ + break; \ + case 4: \ + __ust4(__ia64_val, (unsigned int *)__ia64_ptr); \ + break; \ + case 8: \ + __ust8(__ia64_val, (unsigned long *)__ia64_ptr); \ + break; \ + default: \ + ia64_bad_unaligned_access_length(); \ + } \ } while (0) #endif /* _ASM_IA64_UNALIGNED_H */ diff -Nru a/include/asm-ia64/unwind.h b/include/asm-ia64/unwind.h --- a/include/asm-ia64/unwind.h Wed Apr 16 18:32:26 2003 +++ b/include/asm-ia64/unwind.h Wed Apr 16 18:32:26 2003 @@ -2,8 +2,8 @@ #define _ASM_IA64_UNWIND_H /* - * Copyright (C) 1999-2000 Hewlett-Packard Co - * Copyright (C) 1999-2000 David Mosberger-Tang + * Copyright (C) 1999-2000, 2003 Hewlett-Packard Co + * David Mosberger-Tang * * A simple API for unwinding kernel stacks. This is used for * debugging and error reporting purposes. The kernel doesn't need @@ -106,6 +106,13 @@ * Prepare to unwind blocked task t. */ extern void unw_init_from_blocked_task (struct unw_frame_info *info, struct task_struct *t); + +/* + * Prepare to unwind from interruption. The pt-regs and switch-stack structures must have + * be "adjacent" (no state modifications between pt-regs and switch-stack). + */ +extern void unw_init_from_interruption (struct unw_frame_info *info, struct task_struct *t, + struct pt_regs *pt, struct switch_stack *sw); extern void unw_init_frame_info (struct unw_frame_info *info, struct task_struct *t, struct switch_stack *sw); diff -Nru a/include/asm-sparc64/agp.h b/include/asm-sparc64/agp.h --- a/include/asm-sparc64/agp.h Wed Apr 16 18:32:25 2003 +++ b/include/asm-sparc64/agp.h Wed Apr 16 18:32:25 2003 @@ -8,4 +8,11 @@ #define flush_agp_mappings() #define flush_agp_cache() mb() +/* + * Page-protection value to be used for AGP memory mapped into kernel space. For + * platforms which use coherent AGP DMA, this can be PAGE_KERNEL. For others, it needs to + * be an uncached mapping (such as write-combining). + */ +#define PAGE_AGP PAGE_KERNEL_NOCACHE + #endif diff -Nru a/include/asm-x86_64/agp.h b/include/asm-x86_64/agp.h --- a/include/asm-x86_64/agp.h Wed Apr 16 18:32:25 2003 +++ b/include/asm-x86_64/agp.h Wed Apr 16 18:32:25 2003 @@ -20,4 +20,11 @@ worth it. Would need a page for it. */ #define flush_agp_cache() asm volatile("wbinvd":::"memory") +/* + * Page-protection value to be used for AGP memory mapped into kernel space. For + * platforms which use coherent AGP DMA, this can be PAGE_KERNEL. For others, it needs to + * be an uncached mapping (such as write-combining). + */ +#define PAGE_AGP PAGE_KERNEL_NOCACHE + #endif diff -Nru a/include/linux/acpi_serial.h b/include/linux/acpi_serial.h --- a/include/linux/acpi_serial.h Wed Apr 16 18:32:26 2003 +++ b/include/linux/acpi_serial.h Wed Apr 16 18:32:26 2003 @@ -9,6 +9,8 @@ * */ +#include + extern void setup_serial_acpi(void *); #define ACPI_SIG_LEN 4 diff -Nru a/include/linux/bootmem.h b/include/linux/bootmem.h --- a/include/linux/bootmem.h Wed Apr 16 18:32:26 2003 +++ b/include/linux/bootmem.h Wed Apr 16 18:32:26 2003 @@ -32,6 +32,8 @@ void *node_bootmem_map; unsigned long last_offset; unsigned long last_pos; + unsigned long last_success; /* Previous allocation point. To speed + * up searching */ } bootmem_data_t; extern unsigned long __init bootmem_bootmap_pages (unsigned long); diff -Nru a/include/linux/elf.h b/include/linux/elf.h --- a/include/linux/elf.h Wed Apr 16 18:32:25 2003 +++ b/include/linux/elf.h Wed Apr 16 18:32:25 2003 @@ -226,6 +226,90 @@ #define R_386_GOTPC 10 #define R_386_NUM 11 +#define R_IA64_NONE 0x00 /* none */ +#define R_IA64_IMM14 0x21 /* symbol + addend, add imm14 */ +#define R_IA64_IMM22 0x22 /* symbol + addend, add imm22 */ +#define R_IA64_IMM64 0x23 /* symbol + addend, mov imm64 */ +#define R_IA64_DIR32MSB 0x24 /* symbol + addend, data4 MSB */ +#define R_IA64_DIR32LSB 0x25 /* symbol + addend, data4 LSB */ +#define R_IA64_DIR64MSB 0x26 /* symbol + addend, data8 MSB */ +#define R_IA64_DIR64LSB 0x27 /* symbol + addend, data8 LSB */ +#define R_IA64_GPREL22 0x2a /* @gprel(sym+add), add imm22 */ +#define R_IA64_GPREL64I 0x2b /* @gprel(sym+add), mov imm64 */ +#define R_IA64_GPREL32MSB 0x2c /* @gprel(sym+add), data4 MSB */ +#define R_IA64_GPREL32LSB 0x2d /* @gprel(sym+add), data4 LSB */ +#define R_IA64_GPREL64MSB 0x2e /* @gprel(sym+add), data8 MSB */ +#define R_IA64_GPREL64LSB 0x2f /* @gprel(sym+add), data8 LSB */ +#define R_IA64_LTOFF22 0x32 /* @ltoff(sym+add), add imm22 */ +#define R_IA64_LTOFF64I 0x33 /* @ltoff(sym+add), mov imm64 */ +#define R_IA64_PLTOFF22 0x3a /* @pltoff(sym+add), add imm22 */ +#define R_IA64_PLTOFF64I 0x3b /* @pltoff(sym+add), mov imm64 */ +#define R_IA64_PLTOFF64MSB 0x3e /* @pltoff(sym+add), data8 MSB */ +#define R_IA64_PLTOFF64LSB 0x3f /* @pltoff(sym+add), data8 LSB */ +#define R_IA64_FPTR64I 0x43 /* @fptr(sym+add), mov imm64 */ +#define R_IA64_FPTR32MSB 0x44 /* @fptr(sym+add), data4 MSB */ +#define R_IA64_FPTR32LSB 0x45 /* @fptr(sym+add), data4 LSB */ +#define R_IA64_FPTR64MSB 0x46 /* @fptr(sym+add), data8 MSB */ +#define R_IA64_FPTR64LSB 0x47 /* @fptr(sym+add), data8 LSB */ +#define R_IA64_PCREL60B 0x48 /* @pcrel(sym+add), brl */ +#define R_IA64_PCREL21B 0x49 /* @pcrel(sym+add), ptb, call */ +#define R_IA64_PCREL21M 0x4a /* @pcrel(sym+add), chk.s */ +#define R_IA64_PCREL21F 0x4b /* @pcrel(sym+add), fchkf */ +#define R_IA64_PCREL32MSB 0x4c /* @pcrel(sym+add), data4 MSB */ +#define R_IA64_PCREL32LSB 0x4d /* @pcrel(sym+add), data4 LSB */ +#define R_IA64_PCREL64MSB 0x4e /* @pcrel(sym+add), data8 MSB */ +#define R_IA64_PCREL64LSB 0x4f /* @pcrel(sym+add), data8 LSB */ +#define R_IA64_LTOFF_FPTR22 0x52 /* @ltoff(@fptr(s+a)), imm22 */ +#define R_IA64_LTOFF_FPTR64I 0x53 /* @ltoff(@fptr(s+a)), imm64 */ +#define R_IA64_LTOFF_FPTR32MSB 0x54 /* @ltoff(@fptr(s+a)), 4 MSB */ +#define R_IA64_LTOFF_FPTR32LSB 0x55 /* @ltoff(@fptr(s+a)), 4 LSB */ +#define R_IA64_LTOFF_FPTR64MSB 0x56 /* @ltoff(@fptr(s+a)), 8 MSB */ +#define R_IA64_LTOFF_FPTR64LSB 0x57 /* @ltoff(@fptr(s+a)), 8 LSB */ +#define R_IA64_SEGREL32MSB 0x5c /* @segrel(sym+add), data4 MSB */ +#define R_IA64_SEGREL32LSB 0x5d /* @segrel(sym+add), data4 LSB */ +#define R_IA64_SEGREL64MSB 0x5e /* @segrel(sym+add), data8 MSB */ +#define R_IA64_SEGREL64LSB 0x5f /* @segrel(sym+add), data8 LSB */ +#define R_IA64_SECREL32MSB 0x64 /* @secrel(sym+add), data4 MSB */ +#define R_IA64_SECREL32LSB 0x65 /* @secrel(sym+add), data4 LSB */ +#define R_IA64_SECREL64MSB 0x66 /* @secrel(sym+add), data8 MSB */ +#define R_IA64_SECREL64LSB 0x67 /* @secrel(sym+add), data8 LSB */ +#define R_IA64_REL32MSB 0x6c /* data 4 + REL */ +#define R_IA64_REL32LSB 0x6d /* data 4 + REL */ +#define R_IA64_REL64MSB 0x6e /* data 8 + REL */ +#define R_IA64_REL64LSB 0x6f /* data 8 + REL */ +#define R_IA64_LTV32MSB 0x74 /* symbol + addend, data4 MSB */ +#define R_IA64_LTV32LSB 0x75 /* symbol + addend, data4 LSB */ +#define R_IA64_LTV64MSB 0x76 /* symbol + addend, data8 MSB */ +#define R_IA64_LTV64LSB 0x77 /* symbol + addend, data8 LSB */ +#define R_IA64_PCREL21BI 0x79 /* @pcrel(sym+add), ptb, call */ +#define R_IA64_PCREL22 0x7a /* @pcrel(sym+add), imm22 */ +#define R_IA64_PCREL64I 0x7b /* @pcrel(sym+add), imm64 */ +#define R_IA64_IPLTMSB 0x80 /* dynamic reloc, imported PLT, MSB */ +#define R_IA64_IPLTLSB 0x81 /* dynamic reloc, imported PLT, LSB */ +#define R_IA64_COPY 0x84 /* dynamic reloc, data copy */ +#define R_IA64_SUB 0x85 /* -symbol + addend, add imm22 */ +#define R_IA64_LTOFF22X 0x86 /* LTOFF22, relaxable. */ +#define R_IA64_LDXMOV 0x87 /* Use of LTOFF22X. */ +#define R_IA64_TPREL14 0x91 /* @tprel(sym+add), add imm14 */ +#define R_IA64_TPREL22 0x92 /* @tprel(sym+add), add imm22 */ +#define R_IA64_TPREL64I 0x93 /* @tprel(sym+add), add imm64 */ +#define R_IA64_TPREL64MSB 0x96 /* @tprel(sym+add), data8 MSB */ +#define R_IA64_TPREL64LSB 0x97 /* @tprel(sym+add), data8 LSB */ +#define R_IA64_LTOFF_TPREL22 0x9a /* @ltoff(@tprel(s+a)), add imm22 */ +#define R_IA64_DTPMOD64MSB 0xa6 /* @dtpmod(sym+add), data8 MSB */ +#define R_IA64_DTPMOD64LSB 0xa7 /* @dtpmod(sym+add), data8 LSB */ +#define R_IA64_LTOFF_DTPMOD22 0xaa /* @ltoff(@dtpmod(s+a)), imm22 */ +#define R_IA64_DTPREL14 0xb1 /* @dtprel(sym+add), imm14 */ +#define R_IA64_DTPREL22 0xb2 /* @dtprel(sym+add), imm22 */ +#define R_IA64_DTPREL64I 0xb3 /* @dtprel(sym+add), imm64 */ +#define R_IA64_DTPREL32MSB 0xb4 /* @dtprel(sym+add), data4 MSB */ +#define R_IA64_DTPREL32LSB 0xb5 /* @dtprel(sym+add), data4 LSB */ +#define R_IA64_DTPREL64MSB 0xb6 /* @dtprel(sym+add), data8 MSB */ +#define R_IA64_DTPREL64LSB 0xb7 /* @dtprel(sym+add), data8 LSB */ +#define R_IA64_LTOFF_DTPREL22 0xba /* @ltoff(@dtprel(s+a)), imm22 */ + +#define SHF_IA_64_SHORT 0x10000000 /* section near gp */ + #define R_MIPS_NONE 0 #define R_MIPS_16 1 #define R_MIPS_32 2 diff -Nru a/include/linux/highmem.h b/include/linux/highmem.h --- a/include/linux/highmem.h Wed Apr 16 18:32:26 2003 +++ b/include/linux/highmem.h Wed Apr 16 18:32:26 2003 @@ -3,6 +3,8 @@ #include #include +#include + #include #ifdef CONFIG_HIGHMEM diff -Nru a/include/linux/irq.h b/include/linux/irq.h --- a/include/linux/irq.h Wed Apr 16 18:32:26 2003 +++ b/include/linux/irq.h Wed Apr 16 18:32:26 2003 @@ -56,15 +56,13 @@ * * Pad this out to 32 bytes for cache and indexing reasons. */ -typedef struct { +typedef struct irq_desc { unsigned int status; /* IRQ status */ hw_irq_controller *handler; struct irqaction *action; /* IRQ action list */ unsigned int depth; /* nested irq disables */ spinlock_t lock; } ____cacheline_aligned irq_desc_t; - -extern irq_desc_t irq_desc [NR_IRQS]; #include /* the arch dependent stuff */ diff -Nru a/include/linux/irq_cpustat.h b/include/linux/irq_cpustat.h --- a/include/linux/irq_cpustat.h Wed Apr 16 18:32:26 2003 +++ b/include/linux/irq_cpustat.h Wed Apr 16 18:32:26 2003 @@ -24,7 +24,7 @@ #define __IRQ_STAT(cpu, member) (irq_stat[cpu].member) #else #define __IRQ_STAT(cpu, member) ((void)(cpu), irq_stat[0].member) -#endif +#endif #endif /* arch independent irq_stat fields */ @@ -34,5 +34,10 @@ #define ksoftirqd_task(cpu) __IRQ_STAT((cpu), __ksoftirqd_task) /* arch dependent irq_stat fields */ #define nmi_count(cpu) __IRQ_STAT((cpu), __nmi_count) /* i386, ia64 */ + +#define local_softirq_pending() softirq_pending(smp_processor_id()) +#define local_syscall_count() syscall_count(smp_processor_id()) +#define local_ksoftirqd_task() ksoftirqd_task(smp_processor_id()) +#define local_nmi_count() nmi_count(smp_processor_id()) #endif /* __irq_cpustat_h */ diff -Nru a/include/linux/moduleloader.h b/include/linux/moduleloader.h --- a/include/linux/moduleloader.h Wed Apr 16 18:32:26 2003 +++ b/include/linux/moduleloader.h Wed Apr 16 18:32:26 2003 @@ -41,4 +41,7 @@ const Elf_Shdr *sechdrs, struct module *mod); +/* Any cleanup needed when module leaves. */ +void module_arch_cleanup(struct module *mod); + #endif diff -Nru a/include/linux/nfsd/syscall.h b/include/linux/nfsd/syscall.h --- a/include/linux/nfsd/syscall.h Wed Apr 16 18:32:26 2003 +++ b/include/linux/nfsd/syscall.h Wed Apr 16 18:32:26 2003 @@ -91,6 +91,13 @@ struct nfsctl_export u_export; struct nfsctl_fdparm u_getfd; struct nfsctl_fsparm u_getfs; + /* + * The following dummy member is needed to preserve binary compatibility + * on platforms where alignof(void*)>alignof(int). It's needed because + * this union used to contain a member (u_umap) which contained a + * pointer. + */ + void *u_ptr; } u; #define ca_svc u.u_svc #define ca_client u.u_client diff -Nru a/include/linux/pci_ids.h b/include/linux/pci_ids.h --- a/include/linux/pci_ids.h Wed Apr 16 18:32:26 2003 +++ b/include/linux/pci_ids.h Wed Apr 16 18:32:26 2003 @@ -597,6 +597,8 @@ #define PCI_DEVICE_ID_HP_DIVA_TOSCA1 0x1049 #define PCI_DEVICE_ID_HP_DIVA_TOSCA2 0x104A #define PCI_DEVICE_ID_HP_DIVA_MAESTRO 0x104B +#define PCI_DEVICE_ID_HP_REO_SBA 0x10f0 +#define PCI_DEVICE_ID_HP_REO_IOC 0x10f1 #define PCI_DEVICE_ID_HP_VISUALIZE_FXE 0x108b #define PCI_DEVICE_ID_HP_DIVA_HALFDOME 0x1223 #define PCI_DEVICE_ID_HP_DIVA_KEYSTONE 0x1226 diff -Nru a/include/linux/percpu.h b/include/linux/percpu.h --- a/include/linux/percpu.h Wed Apr 16 18:32:26 2003 +++ b/include/linux/percpu.h Wed Apr 16 18:32:26 2003 @@ -1,9 +1,8 @@ #ifndef __LINUX_PERCPU_H #define __LINUX_PERCPU_H -#include /* For preempt_disable() */ +#include /* For preempt_disable() */ #include /* For kmalloc_percpu() */ #include - /* Must be an lvalue. */ #define get_cpu_var(var) (*({ preempt_disable(); &__get_cpu_var(var); })) #define put_cpu_var(var) preempt_enable() diff -Nru a/include/linux/sched.h b/include/linux/sched.h --- a/include/linux/sched.h Wed Apr 16 18:32:25 2003 +++ b/include/linux/sched.h Wed Apr 16 18:32:25 2003 @@ -148,8 +148,8 @@ extern void init_idle(task_t *idle, int cpu); extern void show_state(void); -extern void show_trace(unsigned long *stack); -extern void show_stack(unsigned long *stack); +extern void show_trace(struct task_struct *); +extern void show_stack(struct task_struct *); extern void show_regs(struct pt_regs *); void io_schedule(void); @@ -495,14 +495,14 @@ #ifndef INIT_THREAD_SIZE # define INIT_THREAD_SIZE 2048*sizeof(long) -#endif - union thread_union { struct thread_info thread_info; unsigned long stack[INIT_THREAD_SIZE/sizeof(long)]; }; extern union thread_union init_thread_union; +#endif + extern struct task_struct init_task; extern struct mm_struct init_mm; diff -Nru a/include/linux/serial.h b/include/linux/serial.h --- a/include/linux/serial.h Wed Apr 16 18:32:25 2003 +++ b/include/linux/serial.h Wed Apr 16 18:32:25 2003 @@ -180,14 +180,9 @@ extern int register_serial(struct serial_struct *req); extern void unregister_serial(int line); -/* Allow complicated architectures to specify rs_table[] at run time */ -extern int early_serial_setup(struct serial_struct *req); - -#ifdef CONFIG_ACPI -/* tty ports reserved for the ACPI serial console port and debug port */ -#define ACPI_SERIAL_CONSOLE_PORT 4 -#define ACPI_SERIAL_DEBUG_PORT 5 -#endif +/* Allow architectures to override entries in serial8250_ports[] at run time: */ +struct uart_port; /* forward declaration */ +extern int early_serial_setup(struct uart_port *port); #endif /* __KERNEL__ */ #endif /* _LINUX_SERIAL_H */ diff -Nru a/include/linux/smp.h b/include/linux/smp.h --- a/include/linux/smp.h Wed Apr 16 18:32:26 2003 +++ b/include/linux/smp.h Wed Apr 16 18:32:26 2003 @@ -74,10 +74,6 @@ */ extern int smp_threads_ready; -extern volatile unsigned long smp_msg_data; -extern volatile int smp_src_cpu; -extern volatile int smp_msg_id; - #define MSG_ALL_BUT_SELF 0x8000 /* Assume <32768 CPU's */ #define MSG_ALL 0x8001 diff -Nru a/include/linux/sunrpc/svc.h b/include/linux/sunrpc/svc.h --- a/include/linux/sunrpc/svc.h Wed Apr 16 18:32:26 2003 +++ b/include/linux/sunrpc/svc.h Wed Apr 16 18:32:26 2003 @@ -73,7 +73,7 @@ * This assumes that the non-page part of an rpc reply will fit * in a page - NFSd ensures this. lockd also has no trouble. */ -#define RPCSVC_MAXPAGES ((RPCSVC_MAXPAYLOAD+PAGE_SIZE-1)/PAGE_SIZE + 1) +#define RPCSVC_MAXPAGES ((RPCSVC_MAXPAYLOAD+PAGE_SIZE-1)/PAGE_SIZE + 2) static inline u32 svc_getu32(struct iovec *iov) { diff -Nru a/kernel/fork.c b/kernel/fork.c --- a/kernel/fork.c Wed Apr 16 18:32:25 2003 +++ b/kernel/fork.c Wed Apr 16 18:32:25 2003 @@ -38,8 +38,6 @@ #include #include -static kmem_cache_t *task_struct_cachep; - extern int copy_semundo(unsigned long clone_flags, struct task_struct *tsk); extern void exit_semundo(struct task_struct *tsk); @@ -53,13 +51,6 @@ rwlock_t tasklist_lock __cacheline_aligned = RW_LOCK_UNLOCKED; /* outer */ -/* - * A per-CPU task cache - this relies on the fact that - * the very last portion of sys_exit() is executed with - * preemption turned off. - */ -static task_t *task_cache[NR_CPUS] __cacheline_aligned; - int nr_processes(void) { int cpu; @@ -72,6 +63,22 @@ return total; } +#ifdef CONFIG_IA64 +# define HAVE_ARCH_DUP_TASK_STRUCT +#endif + +#ifdef HAVE_ARCH_DUP_TASK_STRUCT +extern void free_task_struct (struct task_struct *tsk); +#else +static kmem_cache_t *task_struct_cachep; + +/* + * A per-CPU task cache - this relies on the fact that + * the very last portion of sys_exit() is executed with + * preemption turned off. + */ +static task_t *task_cache[NR_CPUS] __cacheline_aligned; + static void free_task_struct(struct task_struct *tsk) { /* @@ -95,6 +102,7 @@ put_cpu(); } } +#endif /* HAVE_ARCH_DUP_TASK_STRUCT */ void __put_task_struct(struct task_struct *tsk) { @@ -184,6 +192,7 @@ void __init fork_init(unsigned long mempages) { +#ifndef HAVE_ARCH_DUP_TASK_STRUCT /* create a slab on which task_structs can be allocated */ task_struct_cachep = kmem_cache_create("task_struct", @@ -191,6 +200,7 @@ SLAB_MUST_HWCACHE_ALIGN, NULL, NULL); if (!task_struct_cachep) panic("fork_init(): cannot create task_struct SLAB cache"); +#endif /* * The default maximum number of threads is set to a safe @@ -208,7 +218,11 @@ init_task.rlim[RLIMIT_NPROC].rlim_max = max_threads/2; } -static struct task_struct *dup_task_struct(struct task_struct *orig) +#ifdef HAVE_ARCH_DUP_TASK_STRUCT +extern struct task_struct *dup_task_struct (struct task_struct *orig); +#else /* !HAVE_ARCH_DUP_TASK_STRUCT */ + +struct task_struct *dup_task_struct(struct task_struct *orig) { struct task_struct *tsk; struct thread_info *ti; @@ -242,6 +256,8 @@ return tsk; } +#endif /* !HAVE_ARCH_DUP_TASK_STRUCT */ + #ifdef CONFIG_MMU static inline int dup_mmap(struct mm_struct * mm, struct mm_struct * oldmm) { @@ -881,11 +897,15 @@ if (clone_flags & CLONE_CHILD_SETTID) p->set_child_tid = child_tidptr; + else + p->set_child_tid = NULL; /* * Clear TID on mm_release()? */ if (clone_flags & CLONE_CHILD_CLEARTID) p->clear_child_tid = child_tidptr; + else + p->clear_child_tid = NULL; /* * Syscall tracing should be turned off in the child regardless diff -Nru a/kernel/ksyms.c b/kernel/ksyms.c --- a/kernel/ksyms.c Wed Apr 16 18:32:25 2003 +++ b/kernel/ksyms.c Wed Apr 16 18:32:25 2003 @@ -109,6 +109,8 @@ EXPORT_SYMBOL(vunmap); EXPORT_SYMBOL(vmalloc_to_page); EXPORT_SYMBOL(remap_page_range); +EXPORT_SYMBOL(map_vm_area); +EXPORT_SYMBOL(get_vm_area); #ifndef CONFIG_DISCONTIGMEM EXPORT_SYMBOL(contig_page_data); EXPORT_SYMBOL(mem_map); @@ -398,7 +400,9 @@ EXPORT_SYMBOL(del_timer); EXPORT_SYMBOL(request_irq); EXPORT_SYMBOL(free_irq); +#if !defined(CONFIG_IA64) EXPORT_SYMBOL(irq_stat); +#endif /* waitqueue handling */ EXPORT_SYMBOL(add_wait_queue); @@ -597,7 +601,9 @@ /* init task, for moving kthread roots - ought to export a function ?? */ EXPORT_SYMBOL(init_task); +#ifndef CONFIG_IA64 EXPORT_SYMBOL(init_thread_union); +#endif EXPORT_SYMBOL(tasklist_lock); EXPORT_SYMBOL(find_task_by_pid); diff -Nru a/kernel/module.c b/kernel/module.c --- a/kernel/module.c Wed Apr 16 18:32:26 2003 +++ b/kernel/module.c Wed Apr 16 18:32:26 2003 @@ -165,7 +165,7 @@ if (gplok) { for (i = 0; i < mod->num_gpl_syms; i++) { if (strcmp(mod->gpl_syms[i].name, name) == 0) { - *crc = symversion(mod->crcs, i); + *crc = symversion(mod->gpl_crcs, i); return mod->gpl_syms[i].value; } } @@ -909,6 +909,9 @@ list_del(&mod->list); spin_unlock_irq(&modlist_lock); + /* Arch-specific cleanup. */ + module_arch_cleanup(mod); + /* Module unload stuff */ module_unload_free(mod); @@ -1241,6 +1244,7 @@ mod->module_init = ptr; /* Transfer each section which specifies SHF_ALLOC */ + DEBUGP("final section addresses:\n"); for (i = 0; i < hdr->e_shnum; i++) { void *dest; @@ -1258,6 +1262,7 @@ sechdrs[i].sh_size); /* Update sh_addr to point to copy in image. */ sechdrs[i].sh_addr = (unsigned long)dest; + DEBUGP("\t0x%lx %s\n", sechdrs[i].sh_addr, secstrings + sechdrs[i].sh_name); } /* Module has been moved. */ mod = (void *)sechdrs[modindex].sh_addr; diff -Nru a/kernel/printk.c b/kernel/printk.c --- a/kernel/printk.c Wed Apr 16 18:32:26 2003 +++ b/kernel/printk.c Wed Apr 16 18:32:26 2003 @@ -308,6 +308,12 @@ __call_console_drivers(start, end); } } +#ifdef CONFIG_IA64_EARLY_PRINTK + if (!console_drivers) { + void early_printk (const char *str, size_t len); + early_printk(&LOG_BUF(start), end - start); + } +#endif } /* @@ -625,7 +631,11 @@ * for us. */ spin_lock_irqsave(&logbuf_lock, flags); +#ifdef CONFIG_IA64_EARLY_PRINTK + con_start = log_end; +#else con_start = log_start; +#endif spin_unlock_irqrestore(&logbuf_lock, flags); } release_console_sem(); @@ -678,3 +688,110 @@ tty->driver.write(tty, 0, msg, strlen(msg)); return; } + +#ifdef CONFIG_IA64_EARLY_PRINTK + +#include + +# ifdef CONFIG_IA64_EARLY_PRINTK_VGA + + +#define VGABASE ((char *)0xc0000000000b8000) +#define VGALINES 24 +#define VGACOLS 80 + +static int current_ypos = VGALINES, current_xpos = 0; + +static void +early_printk_vga (const char *str, size_t len) +{ + char c; + int i, k, j; + + while (len-- > 0) { + c = *str++; + if (current_ypos >= VGALINES) { + /* scroll 1 line up */ + for (k = 1, j = 0; k < VGALINES; k++, j++) { + for (i = 0; i < VGACOLS; i++) { + writew(readw(VGABASE + 2*(VGACOLS*k + i)), + VGABASE + 2*(VGACOLS*j + i)); + } + } + for (i = 0; i < VGACOLS; i++) { + writew(0x720, VGABASE + 2*(VGACOLS*j + i)); + } + current_ypos = VGALINES-1; + } + if (c == '\n') { + current_xpos = 0; + current_ypos++; + } else if (c != '\r') { + writew(((0x7 << 8) | (unsigned short) c), + VGABASE + 2*(VGACOLS*current_ypos + current_xpos++)); + if (current_xpos >= VGACOLS) { + current_xpos = 0; + current_ypos++; + } + } + } +} + +# endif /* CONFIG_IA64_EARLY_PRINTK_VGA */ + +# ifdef CONFIG_IA64_EARLY_PRINTK_UART + +#include +#include + +static void early_printk_uart(const char *str, size_t len) +{ + static char *uart = NULL; + unsigned long uart_base; + char c; + + if (!uart) { + uart_base = 0; +# ifdef CONFIG_SERIAL_8250_HCDP + { + extern unsigned long hcdp_early_uart(void); + uart_base = hcdp_early_uart(); + } +# endif +# if CONFIG_IA64_EARLY_PRINTK_UART_BASE + if (!uart_base) + uart_base = CONFIG_IA64_EARLY_PRINTK_UART_BASE; +# endif + if (!uart_base) + return; + + uart = ioremap(uart_base, 64); + if (!uart) + return; + } + + while (len-- > 0) { + c = *str++; + while ((readb(uart + UART_LSR) & UART_LSR_TEMT) == 0) + cpu_relax(); /* spin */ + + writeb(c, uart + UART_TX); + + if (c == '\n') + writeb('\r', uart + UART_TX); + } +} + +# endif /* CONFIG_IA64_EARLY_PRINTK_UART */ + +void early_printk(const char *str, size_t len) +{ +#ifdef CONFIG_IA64_EARLY_PRINTK_UART + early_printk_uart(str, len); +#endif +#ifdef CONFIG_IA64_EARLY_PRINTK_VGA + early_printk_vga(str, len); +#endif +} + +#endif /* CONFIG_IA64_EARLY_PRINTK */ diff -Nru a/kernel/softirq.c b/kernel/softirq.c --- a/kernel/softirq.c Wed Apr 16 18:32:26 2003 +++ b/kernel/softirq.c Wed Apr 16 18:32:26 2003 @@ -33,7 +33,10 @@ - Tasklets: serialized wrt itself. */ +/* No separate irq_stat for ia64, it is part of PSA */ +#if !defined(CONFIG_IA64) irq_cpustat_t irq_stat[NR_CPUS] ____cacheline_aligned; +#endif /* CONFIG_IA64 */ static struct softirq_action softirq_vec[32] __cacheline_aligned_in_smp; @@ -321,7 +324,7 @@ __set_current_state(TASK_INTERRUPTIBLE); mb(); - ksoftirqd_task(cpu) = current; + local_ksoftirqd_task() = current; for (;;) { if (!local_softirq_pending()) diff -Nru a/kernel/time.c b/kernel/time.c --- a/kernel/time.c Wed Apr 16 18:32:25 2003 +++ b/kernel/time.c Wed Apr 16 18:32:25 2003 @@ -35,7 +35,7 @@ */ struct timezone sys_tz; -extern unsigned long last_time_offset; +extern unsigned long last_nsec_offset; #if !defined(__alpha__) && !defined(__ia64__) @@ -79,7 +79,7 @@ write_seqlock_irq(&xtime_lock); xtime.tv_sec = value; xtime.tv_nsec = 0; - last_time_offset = 0; + last_nsec_offset = 0; time_adjust = 0; /* stop active adjtime() */ time_status |= STA_UNSYNC; time_maxerror = NTP_PHASE_LIMIT; @@ -125,7 +125,7 @@ { write_seqlock_irq(&xtime_lock); xtime.tv_sec += sys_tz.tz_minuteswest * 60; - last_time_offset = 0; + last_nsec_offset = 0; write_sequnlock_irq(&xtime_lock); } @@ -381,7 +381,7 @@ txc->calcnt = pps_calcnt; txc->errcnt = pps_errcnt; txc->stbcnt = pps_stbcnt; - last_time_offset = 0; + last_nsec_offset = 0; write_sequnlock_irq(&xtime_lock); do_gettimeofday(&txc->time); return(result); diff -Nru a/kernel/timer.c b/kernel/timer.c --- a/kernel/timer.c Wed Apr 16 18:32:26 2003 +++ b/kernel/timer.c Wed Apr 16 18:32:26 2003 @@ -56,6 +56,7 @@ spinlock_t lock; unsigned long timer_jiffies; struct timer_list *running_timer; + struct list_head *run_timer_list_running; tvec_root_t tv1; tvec_t tv2; tvec_t tv3; @@ -100,6 +101,14 @@ check_timer_failed(timer); } +/* + * If a timer handler re-adds the timer with expires == jiffies, the timer + * running code can lock up. So here we detect that situation and park the + * timer onto base->run_timer_list_running. It will be added to the main timer + * structures later, by __run_timers(). + */ + +int monitor_timer; static void internal_add_timer(tvec_base_t *base, struct timer_list *timer) { @@ -107,7 +116,9 @@ unsigned long idx = expires - base->timer_jiffies; struct list_head *vec; - if (idx < TVR_SIZE) { + if (base->run_timer_list_running) { + vec = base->run_timer_list_running; + } else if (idx < TVR_SIZE) { int i = expires & TVR_MASK; vec = base->tv1.vec + i; } else if (idx < 1 << (TVR_BITS + TVN_BITS)) { @@ -397,6 +408,7 @@ spin_lock_irq(&base->lock); while (time_after_eq(jiffies, base->timer_jiffies)) { + LIST_HEAD(deferred_timers); struct list_head *head; int index = base->timer_jiffies & TVR_MASK; @@ -408,7 +420,7 @@ (!cascade(base, &base->tv3, INDEX(1))) && !cascade(base, &base->tv4, INDEX(2))) cascade(base, &base->tv5, INDEX(3)); - ++base->timer_jiffies; + base->run_timer_list_running = &deferred_timers; repeat: head = base->tv1.vec + index; if (!list_empty(head)) { @@ -427,6 +439,14 @@ spin_lock_irq(&base->lock); goto repeat; } + base->run_timer_list_running = NULL; + ++base->timer_jiffies; + while (!list_empty(&deferred_timers)) { + timer = list_entry(deferred_timers.prev, + struct timer_list, entry); + list_del(&timer->entry); + internal_add_timer(base, timer); + } } set_running_timer(base, NULL); spin_unlock_irq(&base->lock); @@ -442,6 +462,7 @@ /* The current time */ struct timespec xtime __attribute__ ((aligned (16))); +unsigned long last_nsec_offset; /* Don't completely fail for HZ > 500. */ int tickadj = 500/HZ ? : 1; /* microsecs */ @@ -594,7 +615,7 @@ /* in the NTP reference this is called "hardclock()" */ static void update_wall_time_one_tick(void) { - long time_adjust_step; + long time_adjust_step, delta_nsec; if ( (time_adjust_step = time_adjust) != 0 ) { /* We are doing an adjtime thing. @@ -610,11 +631,11 @@ time_adjust_step = tickadj; else if (time_adjust < -tickadj) time_adjust_step = -tickadj; - + /* Reduce by this step the amount of time left */ time_adjust -= time_adjust_step; } - xtime.tv_nsec += tick_nsec + time_adjust_step * 1000; + delta_nsec = tick_nsec + time_adjust_step * 1000; /* * Advance the phase, once it gets to one microsecond, then * advance the tick more. @@ -623,13 +644,33 @@ if (time_phase <= -FINEUSEC) { long ltemp = -time_phase >> (SHIFT_SCALE - 10); time_phase += ltemp << (SHIFT_SCALE - 10); - xtime.tv_nsec -= ltemp; + delta_nsec -= ltemp; } else if (time_phase >= FINEUSEC) { long ltemp = time_phase >> (SHIFT_SCALE - 10); time_phase -= ltemp << (SHIFT_SCALE - 10); - xtime.tv_nsec += ltemp; + delta_nsec += ltemp; + } + xtime.tv_nsec += delta_nsec; + + /* + * The whole point of last_nsec_offset is that it can be updated atomically and + * lock-free. Thus, arches that don't have __HAVE_ARCH_CMPXCHG probably can't use + * last_nsec_offset anyhow... --davidm 2003-Feb-11 + */ +#ifdef __HAVE_ARCH_CMPXCHG + if (last_nsec_offset > 0) { + unsigned long new, old; + + do { + old = last_nsec_offset; + if (old > delta_nsec) + new = old - delta_nsec; + else + new = 0; + } while (cmpxchg(&last_nsec_offset, old, new) != old); } +#endif } /* @@ -766,7 +807,6 @@ #ifndef ARCH_HAVE_XTIME_LOCK seqlock_t xtime_lock __cacheline_aligned_in_smp = SEQLOCK_UNLOCKED; #endif -unsigned long last_time_offset; /* * This function runs timers and the timer-tq in bottom half context. @@ -800,7 +840,6 @@ wall_jiffies += ticks; update_wall_time(ticks); } - last_time_offset = 0; calc_load(ticks); } diff -Nru a/mm/bootmem.c b/mm/bootmem.c --- a/mm/bootmem.c Wed Apr 16 18:32:26 2003 +++ b/mm/bootmem.c Wed Apr 16 18:32:26 2003 @@ -115,6 +115,9 @@ if (end > bdata->node_low_pfn) BUG(); + if (addr < bdata->last_success) + bdata->last_success = addr; + /* * Round up the beginning of the address. */ @@ -135,26 +138,23 @@ * is not a problem. * * On low memory boxes we get it right in 100% of the cases. - */ - -/* + * * alignment has to be a power of 2 value. + * + * NOTE: This function is _not_ reenetrant. */ -static void * __init __alloc_bootmem_core (bootmem_data_t *bdata, - unsigned long size, unsigned long align, unsigned long goal) +static void * __init +__alloc_bootmem_core(struct bootmem_data *bdata, unsigned long size, + unsigned long align, unsigned long goal) { - unsigned long i, start = 0; + unsigned long offset, remaining_size, areasize, preferred; + unsigned long i, start = 0, incr, eidx; void *ret; - unsigned long offset, remaining_size; - unsigned long areasize, preferred, incr; - unsigned long eidx = bdata->node_low_pfn - (bdata->node_boot_start >> - PAGE_SHIFT); - if (!size) BUG(); - - if (align & (align-1)) - BUG(); + BUG_ON(!size); + BUG_ON(align & (align-1)); + eidx = bdata->node_low_pfn - (bdata->node_boot_start >> PAGE_SHIFT); offset = 0; if (align && (bdata->node_boot_start & (align - 1UL)) != 0) @@ -166,8 +166,11 @@ * first, then we try to allocate lower pages. */ if (goal && (goal >= bdata->node_boot_start) && - ((goal >> PAGE_SHIFT) < bdata->node_low_pfn)) { + ((goal >> PAGE_SHIFT) < bdata->node_low_pfn)) { preferred = goal - bdata->node_boot_start; + + if (bdata->last_success >= preferred) + preferred = bdata->last_success; } else preferred = 0; @@ -179,6 +182,8 @@ restart_scan: for (i = preferred; i < eidx; i += incr) { unsigned long j; + i = find_next_zero_bit(bdata->node_bootmem_map, eidx, i); + i = (i + incr - 1) & -incr; if (test_bit(i, bdata->node_bootmem_map)) continue; for (j = i + 1; j < i + areasize; ++j) { @@ -189,31 +194,33 @@ } start = i; goto found; - fail_block:; + fail_block: + ; } + if (preferred) { preferred = offset; goto restart_scan; } return NULL; + found: - if (start >= eidx) - BUG(); + bdata->last_success = start << PAGE_SHIFT; + BUG_ON(start >= eidx); /* * Is the next page of the previous allocation-end the start * of this allocation's buffer? If yes then we can 'merge' * the previous partial page with this allocation. */ - if (align < PAGE_SIZE - && bdata->last_offset && bdata->last_pos+1 == start) { + if (align < PAGE_SIZE && + bdata->last_offset && bdata->last_pos+1 == start) { offset = (bdata->last_offset+align-1) & ~(align-1); - if (offset > PAGE_SIZE) - BUG(); + BUG_ON(offset > PAGE_SIZE); remaining_size = PAGE_SIZE-offset; if (size < remaining_size) { areasize = 0; - // last_pos unchanged + /* last_pos unchanged */ bdata->last_offset = offset+size; ret = phys_to_virt(bdata->last_pos*PAGE_SIZE + offset + bdata->node_boot_start); @@ -231,11 +238,12 @@ bdata->last_offset = size & ~PAGE_MASK; ret = phys_to_virt(start * PAGE_SIZE + bdata->node_boot_start); } + /* * Reserve the area now: */ for (i = start; i < start+areasize; i++) - if (test_and_set_bit(i, bdata->node_bootmem_map)) + if (unlikely(test_and_set_bit(i, bdata->node_bootmem_map))) BUG(); memset(ret, 0, size); return ret; @@ -256,21 +264,21 @@ map = bdata->node_bootmem_map; for (i = 0; i < idx; ) { unsigned long v = ~map[i / BITS_PER_LONG]; - if (v) { + if (v) { unsigned long m; - for (m = 1; m && i < idx; m<<=1, page++, i++) { + for (m = 1; m && i < idx; m<<=1, page++, i++) { if (v & m) { - count++; - ClearPageReserved(page); - set_page_count(page, 1); - __free_page(page); - } - } + count++; + ClearPageReserved(page); + set_page_count(page, 1); + __free_page(page); + } + } } else { i+=BITS_PER_LONG; - page+=BITS_PER_LONG; - } - } + page += BITS_PER_LONG; + } + } total += count; /* diff -Nru a/mm/memory.c b/mm/memory.c --- a/mm/memory.c Wed Apr 16 18:32:26 2003 +++ b/mm/memory.c Wed Apr 16 18:32:26 2003 @@ -113,8 +113,10 @@ } pmd = pmd_offset(dir, 0); pgd_clear(dir); - for (j = 0; j < PTRS_PER_PMD ; j++) + for (j = 0; j < PTRS_PER_PMD ; j++) { + prefetchw(pmd + j + PREFETCH_STRIDE/sizeof(*pmd)); free_one_pmd(tlb, pmd+j); + } pmd_free_tlb(tlb, pmd); } diff -Nru a/mm/page_alloc.c b/mm/page_alloc.c --- a/mm/page_alloc.c Wed Apr 16 18:32:25 2003 +++ b/mm/page_alloc.c Wed Apr 16 18:32:25 2003 @@ -1141,6 +1141,41 @@ memset(pgdat->valid_addr_bitmap, 0, size); } +static void __init memmap_init(struct page *start, unsigned long size, + int nid, unsigned long zone, unsigned long start_pfn) +{ + struct page *page; + + /* + * Initially all pages are reserved - free ones are freed + * up by free_all_bootmem() once the early boot process is + * done. Non-atomic initialization, single-pass. + */ + + for (page = start; page < (start + size); page++) { + set_page_zone(page, nid * MAX_NR_ZONES + zone); + set_page_count(page, 0); + SetPageReserved(page); + INIT_LIST_HEAD(&page->list); +#ifdef WANT_PAGE_VIRTUAL + if (zone != ZONE_HIGHMEM) + /* + * The shift left won't overflow because the + * ZONE_NORMAL is below 4G. + */ + set_page_address(page, __va(start_pfn << PAGE_SHIFT)); +#endif + start_pfn++; + } +} + +#ifdef HAVE_ARCH_MEMMAP_INIT +#define MEMMAP_INIT(start, size, nid, zone, start_pfn) \ + arch_memmap_init(memmap_init, start, size, nid, zone, start_pfn) +#else +#define MEMMAP_INIT(start, size, nid, zone, start_pfn) \ + memmap_init(start, size, nid, zone, start_pfn) +#endif /* * Set up the zone data structures: * - mark all pages reserved @@ -1252,28 +1287,8 @@ if ((zone_start_pfn) & (zone_required_alignment-1)) printk("BUG: wrong zone alignment, it will crash\n"); - /* - * Initially all pages are reserved - free ones are freed - * up by free_all_bootmem() once the early boot process is - * done. Non-atomic initialization, single-pass. - */ - for (i = 0; i < size; i++) { - struct page *page = lmem_map + local_offset + i; - set_page_zone(page, nid * MAX_NR_ZONES + j); - set_page_count(page, 0); - SetPageReserved(page); - INIT_LIST_HEAD(&page->list); -#ifdef WANT_PAGE_VIRTUAL - if (j != ZONE_HIGHMEM) - /* - * The shift left won't overflow because the - * ZONE_NORMAL is below 4G. - */ - set_page_address(page, - __va(zone_start_pfn << PAGE_SHIFT)); -#endif - zone_start_pfn++; - } + MEMMAP_INIT(lmem_map + local_offset,size,nid,j,zone_start_pfn); + zone_start_pfn += size; local_offset += size; for (i = 0; ; i++) { diff -Nru a/mm/slab.c b/mm/slab.c --- a/mm/slab.c Wed Apr 16 18:32:26 2003 +++ b/mm/slab.c Wed Apr 16 18:32:26 2003 @@ -383,18 +383,19 @@ } malloc_sizes[] = { #define CACHE(x) { .cs_size = (x) }, #include + {0, } #undef CACHE }; /* Must match cache_sizes above. Out of line to keep cache footprint low. */ -static struct { - char *name; +static struct { + char *name; char *name_dma; -} cache_names[] = { +} cache_names[] = { #define CACHE(x) { .name = "size-" #x, .name_dma = "size-" #x "(DMA)" }, #include #undef CACHE -}; +}; struct arraycache_init initarray_cache __initdata = { { 0, BOOT_CPUCACHE_ENTRIES, 1, 0} }; struct arraycache_init initarray_generic __initdata = { { 0, BOOT_CPUCACHE_ENTRIES, 1, 0} }; @@ -603,7 +604,7 @@ if (num_physpages > (32 << 20) >> PAGE_SHIFT) slab_break_gfp_order = BREAK_GFP_ORDER_HI; - for (i = 0; i < ARRAY_SIZE(malloc_sizes); i++) { + for (i = 0; i < ARRAY_SIZE(malloc_sizes) - 1; i++) { struct cache_sizes *sizes = malloc_sizes + i; /* For performance, all the general caches are L1 aligned. * This should be particularly beneficial on SMP boxes, as it diff -Nru a/sound/oss/cs4281/cs4281m.c b/sound/oss/cs4281/cs4281m.c --- a/sound/oss/cs4281/cs4281m.c Wed Apr 16 18:32:26 2003 +++ b/sound/oss/cs4281/cs4281m.c Wed Apr 16 18:32:26 2003 @@ -1946,8 +1946,8 @@ len -= x; } CS_DBGOUT(CS_WAVE_WRITE, 4, printk(KERN_INFO - "cs4281: clear_advance(): memset %d at 0x%.8x for %d size \n", - (unsigned)c, (unsigned)((char *) buf) + bptr, len)); + "cs4281: clear_advance(): memset %d at %p for %d size \n", + (unsigned)c, ((char *) buf) + bptr, len)); memset(((char *) buf) + bptr, c, len); } @@ -1982,9 +1982,8 @@ wake_up(&s->dma_adc.wait); } CS_DBGOUT(CS_PARMS, 8, printk(KERN_INFO - "cs4281: cs4281_update_ptr(): s=0x%.8x hwptr=%d total_bytes=%d count=%d \n", - (unsigned)s, s->dma_adc.hwptr, - s->dma_adc.total_bytes, s->dma_adc.count)); + "cs4281: cs4281_update_ptr(): s=%p hwptr=%d total_bytes=%d count=%d \n", + s, s->dma_adc.hwptr, s->dma_adc.total_bytes, s->dma_adc.count)); } // update DAC pointer // @@ -2016,11 +2015,10 @@ // Continue to play silence until the _release. // CS_DBGOUT(CS_WAVE_WRITE, 6, printk(KERN_INFO - "cs4281: cs4281_update_ptr(): memset %d at 0x%.8x for %d size \n", + "cs4281: cs4281_update_ptr(): memset %d at %p for %d size \n", (unsigned)(s->prop_dac.fmt & (AFMT_U8 | AFMT_U16_LE)) ? 0x80 : 0, - (unsigned)s->dma_dac.rawbuf, - s->dma_dac.dmasize)); + s->dma_dac.rawbuf, s->dma_dac.dmasize)); memset(s->dma_dac.rawbuf, (s->prop_dac. fmt & (AFMT_U8 | AFMT_U16_LE)) ? @@ -2051,9 +2049,8 @@ } } CS_DBGOUT(CS_PARMS, 8, printk(KERN_INFO - "cs4281: cs4281_update_ptr(): s=0x%.8x hwptr=%d total_bytes=%d count=%d \n", - (unsigned) s, s->dma_dac.hwptr, - s->dma_dac.total_bytes, s->dma_dac.count)); + "cs4281: cs4281_update_ptr(): s=%p hwptr=%d total_bytes=%d count=%d \n", + s, s->dma_dac.hwptr, s->dma_dac.total_bytes, s->dma_dac.count)); } } @@ -2184,8 +2181,7 @@ VALIDATE_STATE(s); CS_DBGOUT(CS_FUNCTION, 4, printk(KERN_INFO - "cs4281: mixer_ioctl(): s=0x%.8x cmd=0x%.8x\n", - (unsigned) s, cmd)); + "cs4281: mixer_ioctl(): s=%p cmd=0x%.8x\n", s, cmd)); #if CSDEBUG cs_printioctl(cmd); #endif @@ -2750,9 +2746,8 @@ CS_DBGOUT(CS_FUNCTION, 2, printk(KERN_INFO "cs4281: CopySamples()+ ")); CS_DBGOUT(CS_WAVE_READ, 8, printk(KERN_INFO - " dst=0x%x src=0x%x count=%d iChannels=%d fmt=0x%x\n", - (unsigned) dst, (unsigned) src, (unsigned) count, - (unsigned) iChannels, (unsigned) fmt)); + " dst=%p src=%p count=%d iChannels=%d fmt=0x%x\n", + dst, src, (unsigned) count, (unsigned) iChannels, (unsigned) fmt)); // Gershwin does format conversion in hardware so normally // we don't do any host based coversion. The data formatter @@ -2832,9 +2827,9 @@ void *src = hwsrc; //default to the standard destination buffer addr CS_DBGOUT(CS_FUNCTION, 6, printk(KERN_INFO - "cs_copy_to_user()+ fmt=0x%x fmt_o=0x%x cnt=%d dest=0x%.8x\n", + "cs_copy_to_user()+ fmt=0x%x fmt_o=0x%x cnt=%d dest=%p\n", s->prop_adc.fmt, s->prop_adc.fmt_original, - (unsigned) cnt, (unsigned) dest)); + (unsigned) cnt, dest)); if (cnt > s->dma_adc.dmasize) { cnt = s->dma_adc.dmasize; @@ -2879,7 +2874,7 @@ unsigned copied = 0; CS_DBGOUT(CS_FUNCTION | CS_WAVE_READ, 2, - printk(KERN_INFO "cs4281: cs4281_read()+ %d \n", count)); + printk(KERN_INFO "cs4281: cs4281_read()+ %Zu \n", count)); VALIDATE_STATE(s); if (ppos != &file->f_pos) @@ -2902,7 +2897,7 @@ // while (count > 0) { CS_DBGOUT(CS_WAVE_READ, 8, printk(KERN_INFO - "_read() count>0 count=%d .count=%d .swptr=%d .hwptr=%d \n", + "_read() count>0 count=%Zu .count=%d .swptr=%d .hwptr=%d \n", count, s->dma_adc.count, s->dma_adc.swptr, s->dma_adc.hwptr)); spin_lock_irqsave(&s->lock, flags); @@ -2959,11 +2954,10 @@ // the "cnt" is the number of bytes to read. CS_DBGOUT(CS_WAVE_READ, 2, printk(KERN_INFO - "_read() copy_to cnt=%d count=%d ", cnt, count)); + "_read() copy_to cnt=%d count=%Zu ", cnt, count)); CS_DBGOUT(CS_WAVE_READ, 8, printk(KERN_INFO - " .dmasize=%d .count=%d buffer=0x%.8x ret=%d\n", - s->dma_adc.dmasize, s->dma_adc.count, - (unsigned) buffer, ret)); + " .dmasize=%d .count=%d buffer=%p ret=%Zd\n", + s->dma_adc.dmasize, s->dma_adc.count, buffer, ret)); if (cs_copy_to_user (s, buffer, s->dma_adc.rawbuf + swptr, cnt, &copied)) @@ -2979,7 +2973,7 @@ start_adc(s); } CS_DBGOUT(CS_FUNCTION | CS_WAVE_READ, 2, - printk(KERN_INFO "cs4281: cs4281_read()- %d\n", ret)); + printk(KERN_INFO "cs4281: cs4281_read()- %Zd\n", ret)); return ret; } @@ -2995,7 +2989,7 @@ int cnt; CS_DBGOUT(CS_FUNCTION | CS_WAVE_WRITE, 2, - printk(KERN_INFO "cs4281: cs4281_write()+ count=%d\n", + printk(KERN_INFO "cs4281: cs4281_write()+ count=%Zu\n", count)); VALIDATE_STATE(s); @@ -3051,7 +3045,7 @@ start_dac(s); } CS_DBGOUT(CS_FUNCTION | CS_WAVE_WRITE, 2, - printk(KERN_INFO "cs4281: cs4281_write()- %d\n", ret)); + printk(KERN_INFO "cs4281: cs4281_write()- %Zd\n", ret)); return ret; } @@ -3172,8 +3166,7 @@ int val, mapped, ret; CS_DBGOUT(CS_FUNCTION, 4, printk(KERN_INFO - "cs4281: cs4281_ioctl(): file=0x%.8x cmd=0x%.8x\n", - (unsigned) file, cmd)); + "cs4281: cs4281_ioctl(): file=%p cmd=0x%.8x\n", file, cmd)); #if CSDEBUG cs_printioctl(cmd); #endif @@ -3603,8 +3596,8 @@ (struct cs4281_state *) file->private_data; CS_DBGOUT(CS_FUNCTION | CS_RELEASE, 2, printk(KERN_INFO - "cs4281: cs4281_release(): inode=0x%.8x file=0x%.8x f_mode=%d\n", - (unsigned) inode, (unsigned) file, file->f_mode)); + "cs4281: cs4281_release(): inode=%p file=%p f_mode=%d\n", + inode, file, file->f_mode)); VALIDATE_STATE(s); @@ -3638,8 +3631,8 @@ struct list_head *entry; CS_DBGOUT(CS_FUNCTION | CS_OPEN, 2, printk(KERN_INFO - "cs4281: cs4281_open(): inode=0x%.8x file=0x%.8x f_mode=0x%x\n", - (unsigned) inode, (unsigned) file, file->f_mode)); + "cs4281: cs4281_open(): inode=%p file=%p f_mode=0x%x\n", + inode, file, file->f_mode)); list_for_each(entry, &cs4281_devs) { @@ -4348,10 +4341,8 @@ CS_DBGOUT(CS_INIT, 2, printk(KERN_INFO - "cs4281: probe() BA0=0x%.8x BA1=0x%.8x pBA0=0x%.8x pBA1=0x%.8x \n", - (unsigned) temp1, (unsigned) temp2, - (unsigned) s->pBA0, (unsigned) s->pBA1)); - + "cs4281: probe() BA0=0x%.8x BA1=0x%.8x pBA0=%p pBA1=%p \n", + (unsigned) temp1, (unsigned) temp2, s->pBA0, s->pBA1)); CS_DBGOUT(CS_INIT, 2, printk(KERN_INFO "cs4281: probe() pBA0phys=0x%.8x pBA1phys=0x%.8x\n", @@ -4398,15 +4389,13 @@ if (pmdev) { CS_DBGOUT(CS_INIT | CS_PM, 4, printk(KERN_INFO - "cs4281: probe() pm_register() succeeded (0x%x).\n", - (unsigned)pmdev)); + "cs4281: probe() pm_register() succeeded (%p).\n", pmdev)); pmdev->data = s; } else { CS_DBGOUT(CS_INIT | CS_PM | CS_ERROR, 0, printk(KERN_INFO - "cs4281: probe() pm_register() failed (0x%x).\n", - (unsigned)pmdev)); + "cs4281: probe() pm_register() failed (%p).\n", pmdev)); s->pm.flags |= CS4281_PM_NOT_REGISTERED; } #endif diff -Nru a/sound/oss/cs4281/cs4281pm-24.c b/sound/oss/cs4281/cs4281pm-24.c --- a/sound/oss/cs4281/cs4281pm-24.c Wed Apr 16 18:32:26 2003 +++ b/sound/oss/cs4281/cs4281pm-24.c Wed Apr 16 18:32:26 2003 @@ -46,8 +46,8 @@ struct cs4281_state *state; CS_DBGOUT(CS_PM, 2, printk(KERN_INFO - "cs4281: cs4281_pm_callback dev=0x%x rqst=0x%x state=%d\n", - (unsigned)dev,(unsigned)rqst,(unsigned)data)); + "cs4281: cs4281_pm_callback dev=%p rqst=0x%x state=%p\n", + dev,(unsigned)rqst,data)); state = (struct cs4281_state *) dev->data; if (state) { switch(rqst) { diff -Nru a/usr/Makefile b/usr/Makefile --- a/usr/Makefile Wed Apr 16 18:32:26 2003 +++ b/usr/Makefile Wed Apr 16 18:32:26 2003 @@ -5,11 +5,9 @@ clean-files := initramfs_data.cpio.gz -LDFLAGS_initramfs_data.o := $(LDFLAGS_BLOB) -r -T - -$(obj)/initramfs_data.o: $(src)/initramfs_data.scr \ - $(obj)/initramfs_data.cpio.gz FORCE - $(call if_changed,ld) +$(obj)/initramfs_data.S: $(obj)/initramfs_data.cpio.gz + echo '.section ".init.ramfs", "a"' > $@ + od -v -An -t x1 -w8 $^ | cut -c2- | sed -e s"/ /,0x/g" -e s"/^/.byte 0x"/ >> $@ # initramfs-y are the programs which will be copied into the CPIO # archive. Currently, the filenames are hardcoded in gen_init_cpio,