diff -Nru a/Documentation/mmio_barrier.txt b/Documentation/mmio_barrier.txt --- /dev/null Wed Dec 31 16:00:00 1969 +++ b/Documentation/mmio_barrier.txt Mon Apr 15 15:07:57 2002 @@ -0,0 +1,15 @@ +On some platforms, so-called memory-mapped I/O is weakly ordered. For +example, the following might occur: + +CPU A writes 0x1 to Device #1 +CPU B writes 0x2 to Device #1 +Device #1 sees 0x2 +Device #1 sees 0x1 + +On such platforms, driver writers are responsible for ensuring that I/O +writes to memory-mapped addresses on their device arrive in the order +intended. The mmiob() macro is provided for this purpose. A typical use +of this macro might be immediately prior to the exit of a critical +section of code proteced by spinlocks. This would ensure that subsequent +writes to I/O space arrived only after all prior writes (much like a +typical memory barrier op, mb(), only with respect to I/O). diff -Nru a/Makefile b/Makefile --- a/Makefile Mon Apr 15 15:07:56 2002 +++ b/Makefile Mon Apr 15 15:07:56 2002 @@ -88,7 +88,7 @@ CPPFLAGS := -D__KERNEL__ -I$(HPATH) -CFLAGS := $(CPPFLAGS) -Wall -Wstrict-prototypes -Wno-trigraphs -O2 \ +CFLAGS := $(CPPFLAGS) -Wall -Wstrict-prototypes -Wno-trigraphs -g -O2 \ -fomit-frame-pointer -fno-strict-aliasing -fno-common AFLAGS := -D__ASSEMBLY__ $(CPPFLAGS) diff -Nru a/arch/i386/mm/fault.c b/arch/i386/mm/fault.c --- a/arch/i386/mm/fault.c Mon Apr 15 15:07:56 2002 +++ b/arch/i386/mm/fault.c Mon Apr 15 15:07:56 2002 @@ -27,8 +27,6 @@ extern void die(const char *,struct pt_regs *,long); -extern int console_loglevel; - /* * Ugly, ugly, but the goto's result in better assembly.. */ diff -Nru a/arch/ia64/Config.help b/arch/ia64/Config.help --- a/arch/ia64/Config.help Mon Apr 15 15:07:57 2002 +++ b/arch/ia64/Config.help Mon Apr 15 15:07:57 2002 @@ -414,12 +414,18 @@ HP-simulator For the HP simulator (). + HP-zx1 For HP zx1 platforms. SN1-simulator For the SGI SN1 simulator. DIG-compliant For DIG ("Developer's Interface Guide") compliant - system. + systems. If you don't know what to do, choose "generic". +CONFIG_IA64_HP_ZX1 + Build a kernel that runs on HP zx1-based systems. This adds support + for the zx1 IOMMU and makes root bus bridges appear in PCI config space + (required for zx1 agpgart support). + CONFIG_IA64_PAGE_SIZE_4KB This lets you select the page size of the kernel. For best IA-64 performance, a page size of 8KB or 16KB is recommended. For best @@ -439,6 +445,32 @@ Select this option to build a kernel for an Itanium prototype system with a B-step CPU. You have a B-step CPU if the "revision" field in /proc/cpuinfo has a value in the range from 1 to 4. + +CONFIG_IA64_SGI_AUTOTEST + Build a kernel used for hardware validation. If you include the + keyword "autotest" on the boot command line, the kernel does NOT boot. + Instead, it starts all cpus and runs cache coherency tests instead. + + If unsure, say N. + +CONFIG_IA64_SGI_SN_DEBUG + Turns on extra debugging code in the SGI SN (Scalable NUMA) platform + for IA64. Unless you are debugging problems on an SGI SN IA64 box, + say N. + +CONFIG_IA64_SGI_SN_SIM + If you are compiling a kernel that will run under SGI's IA64 + simulator (Medusa) then say Y, otherwise say N. + +CONFIG_SERIAL_SGI_L1_PROTOCOL + Uses protocol mode instead of raw mode for the level 1 console on the + SGI SN (Scalable NUMA) platform for IA64. If you are compiling for + an SGI SN box then Y is the recommended value, otherwise say N. + +CONFIG_PCIBA + IRIX PCIBA-inspired user mode PCI interface for the SGI SN (Scalable + NUMA) platform for IA64. Unless you are compiling a kernel for an + SGI SN IA64 box, say N. CONFIG_IA64_MCA Say Y here to enable machine check support for IA-64. If you're diff -Nru a/arch/ia64/Makefile b/arch/ia64/Makefile --- a/arch/ia64/Makefile Mon Apr 15 15:07:56 2002 +++ b/arch/ia64/Makefile Mon Apr 15 15:07:56 2002 @@ -22,7 +22,7 @@ # -ffunction-sections CFLAGS_KERNEL := -mconstant-gp -GCC_VERSION=$(shell $(CROSS_COMPILE)$(HOSTCC) -v 2>&1 | fgrep 'gcc version' | cut -f3 -d' ' | cut -f1 -d'.') +GCC_VERSION=$(shell $(CC) -v 2>&1 | fgrep 'gcc version' | cut -f3 -d' ' | cut -f1 -d'.') ifneq ($(GCC_VERSION),2) CFLAGS += -frename-registers --param max-inline-insns=2000 @@ -33,16 +33,11 @@ endif ifdef CONFIG_IA64_GENERIC - CORE_FILES := arch/$(ARCH)/hp/hp.a \ - arch/$(ARCH)/sn/sn.o \ - arch/$(ARCH)/dig/dig.a \ - arch/$(ARCH)/sn/io/sgiio.o \ + CORE_FILES := arch/$(ARCH)/hp/hp.o \ + arch/$(ARCH)/dig/dig.a \ $(CORE_FILES) SUBDIRS := arch/$(ARCH)/hp \ - arch/$(ARCH)/sn/sn1 \ - arch/$(ARCH)/sn \ arch/$(ARCH)/dig \ - arch/$(ARCH)/sn/io \ $(SUBDIRS) else # !GENERIC @@ -50,7 +45,16 @@ ifdef CONFIG_IA64_HP_SIM SUBDIRS := arch/$(ARCH)/hp \ $(SUBDIRS) - CORE_FILES := arch/$(ARCH)/hp/hp.a \ + CORE_FILES := arch/$(ARCH)/hp/hp.o \ + $(CORE_FILES) +endif + +ifdef CONFIG_IA64_HP_ZX1 + SUBDIRS := arch/$(ARCH)/hp \ + arch/$(ARCH)/dig \ + $(SUBDIRS) + CORE_FILES := arch/$(ARCH)/hp/hp.o \ + arch/$(ARCH)/dig/dig.a \ $(CORE_FILES) endif diff -Nru a/arch/ia64/config.in b/arch/ia64/config.in --- a/arch/ia64/config.in Mon Apr 15 15:07:57 2002 +++ b/arch/ia64/config.in Mon Apr 15 15:07:57 2002 @@ -22,6 +22,7 @@ "generic CONFIG_IA64_GENERIC \ DIG-compliant CONFIG_IA64_DIG \ HP-simulator CONFIG_IA64_HP_SIM \ + HP-zx1 CONFIG_IA64_HP_ZX1 \ SGI-SN1 CONFIG_IA64_SGI_SN1 \ SGI-SN2 CONFIG_IA64_SGI_SN2" generic @@ -56,7 +57,7 @@ fi fi -if [ "$CONFIG_IA64_DIG" = "y" ]; then +if [ "$CONFIG_IA64_GENERIC" = "y" ] || [ "$CONFIG_IA64_DIG" = "y" ] || [ "$CONFIG_IA64_HP_ZX1" = "y" ]; then bool ' Enable IA-64 Machine Check Abort' CONFIG_IA64_MCA define_bool CONFIG_PM y fi diff -Nru a/arch/ia64/defconfig b/arch/ia64/defconfig --- a/arch/ia64/defconfig Mon Apr 15 15:07:56 2002 +++ b/arch/ia64/defconfig Mon Apr 15 15:07:56 2002 @@ -23,7 +23,7 @@ # CONFIG_KMOD is not set # -# General setup +# Processor type and features # CONFIG_IA64=y # CONFIG_ISA is not set @@ -32,21 +32,22 @@ # CONFIG_SBUS is not set CONFIG_RWSEM_GENERIC_SPINLOCK=y # CONFIG_RWSEM_XCHGADD_ALGORITHM is not set -CONFIG_ACPI=y -CONFIG_ACPI_EFI=y -CONFIG_ACPI_INTERPRETER=y -CONFIG_ACPI_KERNEL_CONFIG=y CONFIG_ITANIUM=y # CONFIG_MCKINLEY is not set # CONFIG_IA64_GENERIC is not set CONFIG_IA64_DIG=y # CONFIG_IA64_HP_SIM is not set +# CONFIG_IA64_HP_ZX1 is not set # CONFIG_IA64_SGI_SN1 is not set # CONFIG_IA64_SGI_SN2 is not set # CONFIG_IA64_PAGE_SIZE_4KB is not set # CONFIG_IA64_PAGE_SIZE_8KB is not set CONFIG_IA64_PAGE_SIZE_16KB=y # CONFIG_IA64_PAGE_SIZE_64KB is not set +CONFIG_ACPI=y +CONFIG_ACPI_EFI=y +CONFIG_ACPI_INTERPRETER=y +CONFIG_ACPI_KERNEL_CONFIG=y CONFIG_IA64_BRL_EMU=y # CONFIG_ITANIUM_BSTEP_SPECIFIC is not set CONFIG_IA64_L1_CACHE_SHIFT=6 @@ -60,15 +61,23 @@ CONFIG_EFI_VARS=y CONFIG_BINFMT_ELF=y # CONFIG_BINFMT_MISC is not set -# CONFIG_ACPI_DEBUG is not set -CONFIG_ACPI_BUSMGR=y -CONFIG_ACPI_SYS=y -CONFIG_ACPI_CPU=y + +# +# ACPI Support +# +CONFIG_ACPI=y +CONFIG_ACPI_EFI=y +CONFIG_ACPI_BOOT=y +CONFIG_ACPI_BUS=y +CONFIG_ACPI_INTERPRETER=y +CONFIG_ACPI_PCI=y +CONFIG_ACPI_POWER=y +CONFIG_ACPI_SYSTEM=y CONFIG_ACPI_BUTTON=y -CONFIG_ACPI_AC=y -CONFIG_ACPI_EC=y -CONFIG_ACPI_CMBATT=y -CONFIG_ACPI_THERMAL=y +CONFIG_ACPI_FAN=m +CONFIG_ACPI_PROCESSOR=m +CONFIG_ACPI_THERMAL=m +# CONFIG_ACPI_DEBUG is not set CONFIG_PCI=y CONFIG_PCI_NAMES=y # CONFIG_HOTPLUG is not set @@ -231,15 +240,13 @@ # CONFIG_BLK_DEV_ALI15X3 is not set # CONFIG_WDC_ALI15X3 is not set # CONFIG_BLK_DEV_AMD74XX is not set -# CONFIG_AMD74XX_OVERRIDE is not set # CONFIG_BLK_DEV_CMD64X is not set # CONFIG_BLK_DEV_CY82C693 is not set # CONFIG_BLK_DEV_CS5530 is not set # CONFIG_BLK_DEV_HPT34X is not set # CONFIG_HPT34X_AUTODMA is not set # CONFIG_BLK_DEV_HPT366 is not set -CONFIG_BLK_DEV_PIIX=y -# CONFIG_PIIX_TUNING is not set +# CONFIG_BLK_DEV_PIIX is not set # CONFIG_BLK_DEV_NS87415 is not set # CONFIG_BLK_DEV_OPTI621 is not set # CONFIG_BLK_DEV_PDC_ADMA is not set @@ -254,7 +261,6 @@ # CONFIG_IDEDMA_IVB is not set # CONFIG_IDEDMA_AUTO is not set # CONFIG_DMA_NONPCI is not set -CONFIG_BLK_DEV_IDE_MODES=y # CONFIG_BLK_DEV_ATARAID is not set # CONFIG_BLK_DEV_ATARAID_PDC is not set # CONFIG_BLK_DEV_ATARAID_HPT is not set @@ -691,8 +697,6 @@ # CONFIG_MINIX_SUBPARTITION is not set # CONFIG_SOLARIS_X86_PARTITION is not set # CONFIG_UNIXWARE_DISKLABEL is not set -CONFIG_EFI_PARTITION=y -# CONFIG_DEVFS_GUID is not set # CONFIG_LDM_PARTITION is not set # CONFIG_SGI_PARTITION is not set # CONFIG_ULTRIX_PARTITION is not set @@ -726,6 +730,7 @@ # CONFIG_NLS_CODEPAGE_949 is not set # CONFIG_NLS_CODEPAGE_874 is not set # CONFIG_NLS_ISO8859_8 is not set +# CONFIG_NLS_CODEPAGE_1250 is not set # CONFIG_NLS_CODEPAGE_1251 is not set # CONFIG_NLS_ISO8859_1 is not set # CONFIG_NLS_ISO8859_2 is not set @@ -814,8 +819,9 @@ # USB Device Class drivers # # CONFIG_USB_AUDIO is not set -# CONFIG_USB_EMI26 is not set -# CONFIG_USB_BLUETOOTH is not set +# CONFIG_USB_BLUETOOTH_TTY is not set +# CONFIG_USB_ACM is not set +# CONFIG_USB_PRINTER is not set # CONFIG_USB_STORAGE is not set # CONFIG_USB_STORAGE_DEBUG is not set # CONFIG_USB_STORAGE_DATAFAB is not set @@ -825,13 +831,12 @@ # CONFIG_USB_STORAGE_HP8200e is not set # CONFIG_USB_STORAGE_SDDR09 is not set # CONFIG_USB_STORAGE_JUMPSHOT is not set -# CONFIG_USB_ACM is not set -# CONFIG_USB_PRINTER is not set # # USB Human Interface Devices (HID) # CONFIG_USB_HID=m +CONFIG_USB_HIDINPUT=y CONFIG_USB_HIDDEV=y CONFIG_USB_KBD=m CONFIG_USB_MOUSE=m @@ -849,23 +854,24 @@ # # USB Multimedia devices # +# CONFIG_USB_DABUSB is not set +# CONFIG_USB_VICAM is not set +# CONFIG_USB_DSBR is not set # CONFIG_USB_IBMCAM is not set +# CONFIG_USB_KONICAWC is not set # CONFIG_USB_OV511 is not set # CONFIG_USB_PWC is not set # CONFIG_USB_SE401 is not set # CONFIG_USB_STV680 is not set -# CONFIG_USB_VICAM is not set -# CONFIG_USB_DSBR is not set -# CONFIG_USB_DABUSB is not set -# CONFIG_USB_KONICAWC is not set # # USB Network adaptors # -# CONFIG_USB_PEGASUS is not set -# CONFIG_USB_KAWETH is not set # CONFIG_USB_CATC is not set # CONFIG_USB_CDCETHER is not set +# CONFIG_USB_KAWETH is not set +# CONFIG_USB_PEGASUS is not set +# CONFIG_USB_RTL8150 is not set # CONFIG_USB_USBNET is not set # @@ -897,9 +903,11 @@ # CONFIG_USB_SERIAL_KEYSPAN_USA18X is not set # CONFIG_USB_SERIAL_KEYSPAN_USA19W is not set # CONFIG_USB_SERIAL_KEYSPAN_USA49W is not set -# CONFIG_USB_SERIAL_MCT_U232 is not set # CONFIG_USB_SERIAL_KLSI is not set +# CONFIG_USB_SERIAL_MCT_U232 is not set # CONFIG_USB_SERIAL_PL2303 is not set +# CONFIG_USB_SERIAL_SAFE is not set +# CONFIG_USB_SERIAL_SAFE_PADDED is not set # CONFIG_USB_SERIAL_CYBERJACK is not set # CONFIG_USB_SERIAL_XIRCOM is not set # CONFIG_USB_SERIAL_OMNINET is not set @@ -907,8 +915,10 @@ # # USB Miscellaneous drivers # -# CONFIG_USB_RIO500 is not set +# CONFIG_USB_EMI26 is not set +# CONFIG_USB_TIGL is not set # CONFIG_USB_AUERSWALD is not set +# CONFIG_USB_RIO500 is not set # # Library routines @@ -936,11 +946,3 @@ # CONFIG_DEBUG_SPINLOCK is not set # CONFIG_IA64_DEBUG_CMPXCHG is not set # CONFIG_IA64_DEBUG_IRQ is not set -CONFIG_KDB=y -# CONFIG_KDB_MODULES is not set -# CONFIG_KDB_OFF is not set - -# -# Load all symbols for debugging is required for KDB -# -CONFIG_KALLSYMS=y diff -Nru a/arch/ia64/dig/setup.c b/arch/ia64/dig/setup.c --- a/arch/ia64/dig/setup.c Mon Apr 15 15:07:57 2002 +++ b/arch/ia64/dig/setup.c Mon Apr 15 15:07:57 2002 @@ -33,9 +33,6 @@ * is sufficient (the IDE driver will autodetect the drive geometry). */ char drive_info[4*16]; -extern int pcat_compat; - -unsigned char aux_device_present = 0xaa; /* XXX remove this when legacy I/O is gone */ void __init dig_setup (char **cmdline_p) @@ -85,16 +82,4 @@ void __init dig_irq_init (void) { - if (pcat_compat) { - /* - * Disable the compatibility mode interrupts (8259 style), needs IN/OUT support - * enabled. - */ - printk("%s: Disabling PC-AT compatible 8259 interrupts\n", __FUNCTION__); - outb(0xff, 0xA1); - outb(0xff, 0x21); - } else { - printk("%s: System doesn't have PC-AT compatible dual-8259 setup. " - "Nothing to be done\n", __FUNCTION__); - } } diff -Nru a/arch/ia64/hp/Config.in b/arch/ia64/hp/Config.in --- /dev/null Wed Dec 31 16:00:00 1969 +++ b/arch/ia64/hp/Config.in Mon Apr 15 15:07:57 2002 @@ -0,0 +1,9 @@ +mainmenu_option next_comment +comment 'HP Simulator drivers' + +bool 'Simulated Ethernet ' CONFIG_HP_SIMETH +bool 'Simulated serial driver support' CONFIG_HP_SIMSERIAL +if [ "$CONFIG_SCSI" != "n" ]; then + bool 'Simulated SCSI disk' CONFIG_HP_SIMSCSI +fi +endmenu diff -Nru a/arch/ia64/hp/Makefile b/arch/ia64/hp/Makefile --- a/arch/ia64/hp/Makefile Mon Apr 15 15:07:57 2002 +++ b/arch/ia64/hp/Makefile Mon Apr 15 15:07:57 2002 @@ -1,23 +1,15 @@ -# -# ia64/platform/hp/Makefile -# -# Copyright (C) 2002 Hewlett-Packard Co. -# David Mosberger-Tang -# Copyright (C) 1999 Silicon Graphics, Inc. -# Copyright (C) Srinivasa Thirumalachar (sprasad@engr.sgi.com) -# +# arch/ia64/hp/Makefile +# Copyright (c) 2002 Matthew Wilcox for Hewlett Packard -all: hp.a +ALL_SUB_DIRS := sim zx1 common -O_TARGET := hp.a +O_TARGET := hp.o -obj-y := hpsim_console.o hpsim_irq.o hpsim_setup.o -obj-$(CONFIG_IA64_GENERIC) += hpsim_machvec.o +subdir-$(CONFIG_IA64_GENERIC) += $(ALL_SUB_DIRS) +subdir-$(CONFIG_IA64_HP_SIM) += sim +subdir-$(CONFIG_IA64_HP_ZX1) += zx1 common -obj-$(CONFIG_SIMETH) += simeth.o -obj-$(CONFIG_SIM_SERIAL) += simserial.o -obj-$(CONFIG_SCSI_SIM) += simscsi.o - -clean:: +SUB_DIRS := $(subdir-y) +obj-y += $(join $(subdir-y),$(subdir-y:%=/%.o)) include $(TOPDIR)/Rules.make diff -Nru a/arch/ia64/hp/common/Makefile b/arch/ia64/hp/common/Makefile --- /dev/null Wed Dec 31 16:00:00 1969 +++ b/arch/ia64/hp/common/Makefile Mon Apr 15 15:07:57 2002 @@ -0,0 +1,28 @@ +# +# ia64/platform/hp/common/Makefile +# +# Copyright (C) 2002 Hewlett Packard +# Copyright (C) Alex Williamson (alex_williamson@hp.com) +# + +O_TARGET := common.o + +export-objs := sba_iommu.o + +obj-y := sba_iommu.o + +include $(TOPDIR)/Rules.make +# +# ia64/platform/hp/common/Makefile +# +# Copyright (C) 2002 Hewlett Packard +# Copyright (C) Alex Williamson (alex_williamson@hp.com) +# + +O_TARGET := common.o + +export-objs := sba_iommu.o + +obj-y := sba_iommu.o + +include $(TOPDIR)/Rules.make diff -Nru a/arch/ia64/hp/common/sba_iommu.c b/arch/ia64/hp/common/sba_iommu.c --- /dev/null Wed Dec 31 16:00:00 1969 +++ b/arch/ia64/hp/common/sba_iommu.c Mon Apr 15 15:07:57 2002 @@ -0,0 +1,3700 @@ +/* +** IA64 System Bus Adapter (SBA) I/O MMU manager +** +** (c) Copyright 2002 Alex Williamson +** (c) Copyright 2002 Hewlett-Packard Company +** +** Portions (c) 2000 Grant Grundler (from parisc I/O MMU code) +** Portions (c) 1999 Dave S. Miller (from sparc64 I/O MMU code) +** +** This program is free software; you can redistribute it and/or modify +** it under the terms of the GNU General Public License as published by +** the Free Software Foundation; either version 2 of the License, or +** (at your option) any later version. +** +** +** This module initializes the IOC (I/O Controller) found on HP +** McKinley machines and their successors. +** +*/ + +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include + +#include /* ia64_get_itc() */ +#include +#include /* PAGE_OFFSET */ +#include + + +#define DRIVER_NAME "SBA" + +#ifndef CONFIG_IA64_HP_PROTO +#define ALLOW_IOV_BYPASS +#endif +#define ENABLE_MARK_CLEAN +/* +** The number of debug flags is a clue - this code is fragile. +*/ +#undef DEBUG_SBA_INIT +#undef DEBUG_SBA_RUN +#undef DEBUG_SBA_RUN_SG +#undef DEBUG_SBA_RESOURCE +#undef ASSERT_PDIR_SANITY +#undef DEBUG_LARGE_SG_ENTRIES +#undef DEBUG_BYPASS + +#define SBA_INLINE __inline__ +/* #define SBA_INLINE */ + +#ifdef DEBUG_SBA_INIT +#define DBG_INIT(x...) printk(x) +#else +#define DBG_INIT(x...) +#endif + +#ifdef DEBUG_SBA_RUN +#define DBG_RUN(x...) printk(x) +#else +#define DBG_RUN(x...) +#endif + +#ifdef DEBUG_SBA_RUN_SG +#define DBG_RUN_SG(x...) printk(x) +#else +#define DBG_RUN_SG(x...) +#endif + + +#ifdef DEBUG_SBA_RESOURCE +#define DBG_RES(x...) printk(x) +#else +#define DBG_RES(x...) +#endif + +#ifdef DEBUG_BYPASS +#define DBG_BYPASS(x...) printk(x) +#else +#define DBG_BYPASS(x...) +#endif + +#ifdef ASSERT_PDIR_SANITY +#define ASSERT(expr) \ + if(!(expr)) { \ + printk( "\n" __FILE__ ":%d: Assertion " #expr " failed!\n",__LINE__); \ + panic(#expr); \ + } +#else +#define ASSERT(expr) +#endif + +#define KB(x) ((x) * 1024) +#define MB(x) (KB (KB (x))) +#define GB(x) (MB (KB (x))) + +/* +** The number of pdir entries to "free" before issueing +** a read to PCOM register to flush out PCOM writes. +** Interacts with allocation granularity (ie 4 or 8 entries +** allocated and free'd/purged at a time might make this +** less interesting). +*/ +#define DELAYED_RESOURCE_CNT 16 + +#define DEFAULT_DMA_HINT_REG 0 + +#define ZX1_FUNC_ID_VALUE ((PCI_DEVICE_ID_HP_ZX1_SBA << 16) | PCI_VENDOR_ID_HP) +#define ZX1_MC_ID ((PCI_DEVICE_ID_HP_ZX1_MC << 16) | PCI_VENDOR_ID_HP) + +#define SBA_FUNC_ID 0x0000 /* function id */ +#define SBA_FCLASS 0x0008 /* function class, bist, header, rev... */ + +#define SBA_FUNC_SIZE 0x10000 /* SBA configuration function reg set */ + +unsigned int __initdata zx1_func_offsets[] = {0x1000, 0x4000, 0x8000, + 0x9000, 0xa000, -1}; + +#define SBA_IOC_OFFSET 0x1000 + +#define MAX_IOC 1 /* we only have 1 for now*/ + +#define IOC_IBASE 0x300 /* IO TLB */ +#define IOC_IMASK 0x308 +#define IOC_PCOM 0x310 +#define IOC_TCNFG 0x318 +#define IOC_PDIR_BASE 0x320 + +#define IOC_IOVA_SPACE_BASE 0x40000000 /* IOVA ranges start at 1GB */ + +/* +** IOC supports 4/8/16/64KB page sizes (see TCNFG register) +** It's safer (avoid memory corruption) to keep DMA page mappings +** equivalently sized to VM PAGE_SIZE. +** +** We really can't avoid generating a new mapping for each +** page since the Virtual Coherence Index has to be generated +** and updated for each page. +** +** IOVP_SIZE could only be greater than PAGE_SIZE if we are +** confident the drivers really only touch the next physical +** page iff that driver instance owns it. +*/ +#define IOVP_SIZE PAGE_SIZE +#define IOVP_SHIFT PAGE_SHIFT +#define IOVP_MASK PAGE_MASK + +struct ioc { + unsigned long ioc_hpa; /* I/O MMU base address */ + char *res_map; /* resource map, bit == pdir entry */ + u64 *pdir_base; /* physical base address */ + unsigned long ibase; /* pdir IOV Space base */ + unsigned long imask; /* pdir IOV Space mask */ + + unsigned long *res_hint; /* next avail IOVP - circular search */ + spinlock_t res_lock; + unsigned long hint_mask_pdir; /* bits used for DMA hints */ + unsigned int res_bitshift; /* from the RIGHT! */ + unsigned int res_size; /* size of resource map in bytes */ + unsigned int hint_shift_pdir; + unsigned long dma_mask; +#if DELAYED_RESOURCE_CNT > 0 + int saved_cnt; + struct sba_dma_pair { + dma_addr_t iova; + size_t size; + } saved[DELAYED_RESOURCE_CNT]; +#endif + +#ifdef CONFIG_PROC_FS +#define SBA_SEARCH_SAMPLE 0x100 + unsigned long avg_search[SBA_SEARCH_SAMPLE]; + unsigned long avg_idx; /* current index into avg_search */ + unsigned long used_pages; + unsigned long msingle_calls; + unsigned long msingle_pages; + unsigned long msg_calls; + unsigned long msg_pages; + unsigned long usingle_calls; + unsigned long usingle_pages; + unsigned long usg_calls; + unsigned long usg_pages; +#ifdef ALLOW_IOV_BYPASS + unsigned long msingle_bypass; + unsigned long usingle_bypass; + unsigned long msg_bypass; +#endif +#endif + + /* STUFF We don't need in performance path */ + unsigned int pdir_size; /* in bytes, determined by IOV Space size */ +}; + +struct sba_device { + struct sba_device *next; /* list of SBA's in system */ + const char *name; + unsigned long sba_hpa; /* base address */ + spinlock_t sba_lock; + unsigned int flags; /* state/functionality enabled */ + unsigned int hw_rev; /* HW revision of chip */ + + unsigned int num_ioc; /* number of on-board IOC's */ + struct ioc ioc[MAX_IOC]; +}; + + +static struct sba_device *sba_list; +static int sba_count; +static int reserve_sba_gart = 1; + +#define sba_sg_iova(sg) (sg->address) +#define sba_sg_len(sg) (sg->length) +#define sba_sg_buffer(sg) (sg->orig_address) + +/* REVISIT - fix me for multiple SBAs/IOCs */ +#define GET_IOC(dev) (sba_list->ioc) +#define SBA_SET_AGP(sba_dev) (sba_dev->flags |= 0x1) +#define SBA_GET_AGP(sba_dev) (sba_dev->flags & 0x1) + +/* +** DMA_CHUNK_SIZE is used by the SCSI mid-layer to break up +** (or rather not merge) DMA's into managable chunks. +** On parisc, this is more of the software/tuning constraint +** rather than the HW. I/O MMU allocation alogorithms can be +** faster with smaller size is (to some degree). +*/ +#define DMA_CHUNK_SIZE (BITS_PER_LONG*PAGE_SIZE) + +/* Looks nice and keeps the compiler happy */ +#define SBA_DEV(d) ((struct sba_device *) (d)) + +#define ROUNDUP(x,y) ((x + ((y)-1)) & ~((y)-1)) + +/************************************ +** SBA register read and write support +** +** BE WARNED: register writes are posted. +** (ie follow writes which must reach HW with a read) +** +*/ +#define READ_REG(addr) __raw_readq(addr) +#define WRITE_REG(val, addr) __raw_writeq(val, addr) + +#ifdef DEBUG_SBA_INIT + +/** + * sba_dump_tlb - debugging only - print IOMMU operating parameters + * @hpa: base address of the IOMMU + * + * Print the size/location of the IO MMU PDIR. + */ +static void +sba_dump_tlb(char *hpa) +{ + DBG_INIT("IO TLB at 0x%p\n", (void *)hpa); + DBG_INIT("IOC_IBASE : %016lx\n", READ_REG(hpa+IOC_IBASE)); + DBG_INIT("IOC_IMASK : %016lx\n", READ_REG(hpa+IOC_IMASK)); + DBG_INIT("IOC_TCNFG : %016lx\n", READ_REG(hpa+IOC_TCNFG)); + DBG_INIT("IOC_PDIR_BASE: %016lx\n", READ_REG(hpa+IOC_PDIR_BASE)); + DBG_INIT("\n"); +} +#endif + + +#ifdef ASSERT_PDIR_SANITY + +/** + * sba_dump_pdir_entry - debugging only - print one IOMMU PDIR entry + * @ioc: IO MMU structure which owns the pdir we are interested in. + * @msg: text to print ont the output line. + * @pide: pdir index. + * + * Print one entry of the IO MMU PDIR in human readable form. + */ +static void +sba_dump_pdir_entry(struct ioc *ioc, char *msg, uint pide) +{ + /* start printing from lowest pde in rval */ + u64 *ptr = &(ioc->pdir_base[pide & ~(BITS_PER_LONG - 1)]); + unsigned long *rptr = (unsigned long *) &(ioc->res_map[(pide >>3) & ~(sizeof(unsigned long) - 1)]); + uint rcnt; + + /* printk(KERN_DEBUG "SBA: %s rp %p bit %d rval 0x%lx\n", */ + printk("SBA: %s rp %p bit %d rval 0x%lx\n", + msg, rptr, pide & (BITS_PER_LONG - 1), *rptr); + + rcnt = 0; + while (rcnt < BITS_PER_LONG) { + printk("%s %2d %p %016Lx\n", + (rcnt == (pide & (BITS_PER_LONG - 1))) + ? " -->" : " ", + rcnt, ptr, *ptr ); + rcnt++; + ptr++; + } + printk("%s", msg); +} + + +/** + * sba_check_pdir - debugging only - consistency checker + * @ioc: IO MMU structure which owns the pdir we are interested in. + * @msg: text to print ont the output line. + * + * Verify the resource map and pdir state is consistent + */ +static int +sba_check_pdir(struct ioc *ioc, char *msg) +{ + u64 *rptr_end = (u64 *) &(ioc->res_map[ioc->res_size]); + u64 *rptr = (u64 *) ioc->res_map; /* resource map ptr */ + u64 *pptr = ioc->pdir_base; /* pdir ptr */ + uint pide = 0; + + while (rptr < rptr_end) { + u64 rval; + int rcnt; /* number of bits we might check */ + + rval = *rptr; + rcnt = 64; + + while (rcnt) { + /* Get last byte and highest bit from that */ + u32 pde = ((u32)((*pptr >> (63)) & 0x1)); + if ((rval & 0x1) ^ pde) + { + /* + ** BUMMER! -- res_map != pdir -- + ** Dump rval and matching pdir entries + */ + sba_dump_pdir_entry(ioc, msg, pide); + return(1); + } + rcnt--; + rval >>= 1; /* try the next bit */ + pptr++; + pide++; + } + rptr++; /* look at next word of res_map */ + } + /* It'd be nice if we always got here :^) */ + return 0; +} + + +/** + * sba_dump_sg - debugging only - print Scatter-Gather list + * @ioc: IO MMU structure which owns the pdir we are interested in. + * @startsg: head of the SG list + * @nents: number of entries in SG list + * + * print the SG list so we can verify it's correct by hand. + */ +static void +sba_dump_sg( struct ioc *ioc, struct scatterlist *startsg, int nents) +{ + while (nents-- > 0) { + printk(" %d : %08lx/%05x %p\n", + nents, + (unsigned long) sba_sg_iova(startsg), + sba_sg_len(startsg), + sba_sg_buffer(startsg)); + startsg++; + } +} +static void +sba_check_sg( struct ioc *ioc, struct scatterlist *startsg, int nents) +{ + struct scatterlist *the_sg = startsg; + int the_nents = nents; + + while (the_nents-- > 0) { + if (sba_sg_buffer(the_sg) == 0x0UL) + sba_dump_sg(NULL, startsg, nents); + the_sg++; + } +} + +#endif /* ASSERT_PDIR_SANITY */ + + + + +/************************************************************** +* +* I/O Pdir Resource Management +* +* Bits set in the resource map are in use. +* Each bit can represent a number of pages. +* LSbs represent lower addresses (IOVA's). +* +***************************************************************/ +#define PAGES_PER_RANGE 1 /* could increase this to 4 or 8 if needed */ + +/* Convert from IOVP to IOVA and vice versa. */ +#define SBA_IOVA(ioc,iovp,offset,hint_reg) ((ioc->ibase) | (iovp) | (offset) | ((hint_reg)<<(ioc->hint_shift_pdir))) +#define SBA_IOVP(ioc,iova) (((iova) & ioc->hint_mask_pdir) & ~(ioc->ibase)) + +/* FIXME : review these macros to verify correctness and usage */ +#define PDIR_INDEX(iovp) ((iovp)>>IOVP_SHIFT) + +#define RESMAP_MASK(n) ~(~0UL << (n)) +#define RESMAP_IDX_MASK (sizeof(unsigned long) - 1) + + +/** + * sba_search_bitmap - find free space in IO PDIR resource bitmap + * @ioc: IO MMU structure which owns the pdir we are interested in. + * @bits_wanted: number of entries we need. + * + * Find consecutive free bits in resource bitmap. + * Each bit represents one entry in the IO Pdir. + * Cool perf optimization: search for log2(size) bits at a time. + */ +static SBA_INLINE unsigned long +sba_search_bitmap(struct ioc *ioc, unsigned long bits_wanted) +{ + unsigned long *res_ptr = ioc->res_hint; + unsigned long *res_end = (unsigned long *) &(ioc->res_map[ioc->res_size]); + unsigned long pide = ~0UL; + + ASSERT(((unsigned long) ioc->res_hint & (sizeof(unsigned long) - 1UL)) == 0); + ASSERT(res_ptr < res_end); + if (bits_wanted > (BITS_PER_LONG/2)) { + /* Search word at a time - no mask needed */ + for(; res_ptr < res_end; ++res_ptr) { + if (*res_ptr == 0) { + *res_ptr = RESMAP_MASK(bits_wanted); + pide = ((unsigned long)res_ptr - (unsigned long)ioc->res_map); + pide <<= 3; /* convert to bit address */ + break; + } + } + /* point to the next word on next pass */ + res_ptr++; + ioc->res_bitshift = 0; + } else { + /* + ** Search the resource bit map on well-aligned values. + ** "o" is the alignment. + ** We need the alignment to invalidate I/O TLB using + ** SBA HW features in the unmap path. + */ + unsigned long o = 1 << get_order(bits_wanted << PAGE_SHIFT); + uint bitshiftcnt = ROUNDUP(ioc->res_bitshift, o); + unsigned long mask; + + if (bitshiftcnt >= BITS_PER_LONG) { + bitshiftcnt = 0; + res_ptr++; + } + mask = RESMAP_MASK(bits_wanted) << bitshiftcnt; + + DBG_RES("%s() o %ld %p", __FUNCTION__, o, res_ptr); + while(res_ptr < res_end) + { + DBG_RES(" %p %lx %lx\n", res_ptr, mask, *res_ptr); + ASSERT(0 != mask); + if(0 == ((*res_ptr) & mask)) { + *res_ptr |= mask; /* mark resources busy! */ + pide = ((unsigned long)res_ptr - (unsigned long)ioc->res_map); + pide <<= 3; /* convert to bit address */ + pide += bitshiftcnt; + break; + } + mask <<= o; + bitshiftcnt += o; + if (0 == mask) { + mask = RESMAP_MASK(bits_wanted); + bitshiftcnt=0; + res_ptr++; + } + } + /* look in the same word on the next pass */ + ioc->res_bitshift = bitshiftcnt + bits_wanted; + } + + /* wrapped ? */ + if (res_end <= res_ptr) { + ioc->res_hint = (unsigned long *) ioc->res_map; + ioc->res_bitshift = 0; + } else { + ioc->res_hint = res_ptr; + } + return (pide); +} + + +/** + * sba_alloc_range - find free bits and mark them in IO PDIR resource bitmap + * @ioc: IO MMU structure which owns the pdir we are interested in. + * @size: number of bytes to create a mapping for + * + * Given a size, find consecutive unmarked and then mark those bits in the + * resource bit map. + */ +static int +sba_alloc_range(struct ioc *ioc, size_t size) +{ + unsigned int pages_needed = size >> IOVP_SHIFT; +#ifdef CONFIG_PROC_FS + unsigned long itc_start = ia64_get_itc(); +#endif + unsigned long pide; + + ASSERT(pages_needed); + ASSERT((pages_needed * IOVP_SIZE) <= DMA_CHUNK_SIZE); + ASSERT(pages_needed <= BITS_PER_LONG); + ASSERT(0 == (size & ~IOVP_MASK)); + + /* + ** "seek and ye shall find"...praying never hurts either... + */ + + pide = sba_search_bitmap(ioc, pages_needed); + if (pide >= (ioc->res_size << 3)) { + pide = sba_search_bitmap(ioc, pages_needed); + if (pide >= (ioc->res_size << 3)) + panic(__FILE__ ": I/O MMU @ %lx is out of mapping resources\n", ioc->ioc_hpa); + } + +#ifdef ASSERT_PDIR_SANITY + /* verify the first enable bit is clear */ + if(0x00 != ((u8 *) ioc->pdir_base)[pide*sizeof(u64) + 7]) { + sba_dump_pdir_entry(ioc, "sba_search_bitmap() botched it?", pide); + } +#endif + + DBG_RES("%s(%x) %d -> %lx hint %x/%x\n", + __FUNCTION__, size, pages_needed, pide, + (uint) ((unsigned long) ioc->res_hint - (unsigned long) ioc->res_map), + ioc->res_bitshift ); + +#ifdef CONFIG_PROC_FS + { + unsigned long itc_end = ia64_get_itc(); + unsigned long tmp = itc_end - itc_start; + /* check for roll over */ + itc_start = (itc_end < itc_start) ? -(tmp) : (tmp); + } + ioc->avg_search[ioc->avg_idx++] = itc_start; + ioc->avg_idx &= SBA_SEARCH_SAMPLE - 1; + + ioc->used_pages += pages_needed; +#endif + + return (pide); +} + + +/** + * sba_free_range - unmark bits in IO PDIR resource bitmap + * @ioc: IO MMU structure which owns the pdir we are interested in. + * @iova: IO virtual address which was previously allocated. + * @size: number of bytes to create a mapping for + * + * clear bits in the ioc's resource map + */ +static SBA_INLINE void +sba_free_range(struct ioc *ioc, dma_addr_t iova, size_t size) +{ + unsigned long iovp = SBA_IOVP(ioc, iova); + unsigned int pide = PDIR_INDEX(iovp); + unsigned int ridx = pide >> 3; /* convert bit to byte address */ + unsigned long *res_ptr = (unsigned long *) &((ioc)->res_map[ridx & ~RESMAP_IDX_MASK]); + + int bits_not_wanted = size >> IOVP_SHIFT; + + /* 3-bits "bit" address plus 2 (or 3) bits for "byte" == bit in word */ + unsigned long m = RESMAP_MASK(bits_not_wanted) << (pide & (BITS_PER_LONG - 1)); + + DBG_RES("%s( ,%x,%x) %x/%lx %x %p %lx\n", + __FUNCTION__, (uint) iova, size, + bits_not_wanted, m, pide, res_ptr, *res_ptr); + +#ifdef CONFIG_PROC_FS + ioc->used_pages -= bits_not_wanted; +#endif + + ASSERT(m != 0); + ASSERT(bits_not_wanted); + ASSERT((bits_not_wanted * IOVP_SIZE) <= DMA_CHUNK_SIZE); + ASSERT(bits_not_wanted <= BITS_PER_LONG); + ASSERT((*res_ptr & m) == m); /* verify same bits are set */ + *res_ptr &= ~m; +} + + +/************************************************************** +* +* "Dynamic DMA Mapping" support (aka "Coherent I/O") +* +***************************************************************/ + +#define SBA_DMA_HINT(ioc, val) ((val) << (ioc)->hint_shift_pdir) + + +/** + * sba_io_pdir_entry - fill in one IO PDIR entry + * @pdir_ptr: pointer to IO PDIR entry + * @vba: Virtual CPU address of buffer to map + * + * SBA Mapping Routine + * + * Given a virtual address (vba, arg1) sba_io_pdir_entry() + * loads the I/O PDIR entry pointed to by pdir_ptr (arg0). + * Each IO Pdir entry consists of 8 bytes as shown below + * (LSB == bit 0): + * + * 63 40 11 7 0 + * +-+---------------------+----------------------------------+----+--------+ + * |V| U | PPN[39:12] | U | FF | + * +-+---------------------+----------------------------------+----+--------+ + * + * V == Valid Bit + * U == Unused + * PPN == Physical Page Number + * + * The physical address fields are filled with the results of virt_to_phys() + * on the vba. + */ + +#if 1 +#define sba_io_pdir_entry(pdir_ptr, vba) *pdir_ptr = ((vba & ~0xE000000000000FFFULL) | 0x80000000000000FFULL) +#else +void SBA_INLINE +sba_io_pdir_entry(u64 *pdir_ptr, unsigned long vba) +{ + *pdir_ptr = ((vba & ~0xE000000000000FFFULL) | 0x80000000000000FFULL); +} +#endif + +#ifdef ENABLE_MARK_CLEAN +/** + * Since DMA is i-cache coherent, any (complete) pages that were written via + * DMA can be marked as "clean" so that update_mmu_cache() doesn't have to + * flush them when they get mapped into an executable vm-area. + */ +static void +mark_clean (void *addr, size_t size) +{ + unsigned long pg_addr, end; + + pg_addr = PAGE_ALIGN((unsigned long) addr); + end = (unsigned long) addr + size; + while (pg_addr + PAGE_SIZE <= end) { + struct page *page = virt_to_page(pg_addr); + set_bit(PG_arch_1, &page->flags); + pg_addr += PAGE_SIZE; + } +} +#endif + +/** + * sba_mark_invalid - invalidate one or more IO PDIR entries + * @ioc: IO MMU structure which owns the pdir we are interested in. + * @iova: IO Virtual Address mapped earlier + * @byte_cnt: number of bytes this mapping covers. + * + * Marking the IO PDIR entry(ies) as Invalid and invalidate + * corresponding IO TLB entry. The PCOM (Purge Command Register) + * is to purge stale entries in the IO TLB when unmapping entries. + * + * The PCOM register supports purging of multiple pages, with a minium + * of 1 page and a maximum of 2GB. Hardware requires the address be + * aligned to the size of the range being purged. The size of the range + * must be a power of 2. The "Cool perf optimization" in the + * allocation routine helps keep that true. + */ +static SBA_INLINE void +sba_mark_invalid(struct ioc *ioc, dma_addr_t iova, size_t byte_cnt) +{ + u32 iovp = (u32) SBA_IOVP(ioc,iova); + + int off = PDIR_INDEX(iovp); + + /* Must be non-zero and rounded up */ + ASSERT(byte_cnt > 0); + ASSERT(0 == (byte_cnt & ~IOVP_MASK)); + +#ifdef ASSERT_PDIR_SANITY + /* Assert first pdir entry is set */ + if (!(ioc->pdir_base[off] >> 60)) { + sba_dump_pdir_entry(ioc,"sba_mark_invalid()", PDIR_INDEX(iovp)); + } +#endif + + if (byte_cnt <= IOVP_SIZE) + { + ASSERT(off < ioc->pdir_size); + + iovp |= IOVP_SHIFT; /* set "size" field for PCOM */ + + /* + ** clear I/O PDIR entry "valid" bit + ** Do NOT clear the rest - save it for debugging. + ** We should only clear bits that have previously + ** been enabled. + */ + ioc->pdir_base[off] &= ~(0x80000000000000FFULL); + } else { + u32 t = get_order(byte_cnt) + PAGE_SHIFT; + + iovp |= t; + ASSERT(t <= 31); /* 2GB! Max value of "size" field */ + + do { + /* verify this pdir entry is enabled */ + ASSERT(ioc->pdir_base[off] >> 63); + /* clear I/O Pdir entry "valid" bit first */ + ioc->pdir_base[off] &= ~(0x80000000000000FFULL); + off++; + byte_cnt -= IOVP_SIZE; + } while (byte_cnt > 0); + } + + WRITE_REG(iovp, ioc->ioc_hpa+IOC_PCOM); +} + +/** + * sba_map_single - map one buffer and return IOVA for DMA + * @dev: instance of PCI owned by the driver that's asking. + * @addr: driver buffer to map. + * @size: number of bytes to map in driver buffer. + * @direction: R/W or both. + * + * See Documentation/DMA-mapping.txt + */ +dma_addr_t +sba_map_single(struct pci_dev *dev, void *addr, size_t size, int direction) +{ + struct ioc *ioc; + unsigned long flags; + dma_addr_t iovp; + dma_addr_t offset; + u64 *pdir_start; + int pide; +#ifdef ALLOW_IOV_BYPASS + unsigned long pci_addr = virt_to_phys(addr); +#endif + + ioc = GET_IOC(dev); + ASSERT(ioc); + +#ifdef ALLOW_IOV_BYPASS + /* + ** Check if the PCI device can DMA to ptr... if so, just return ptr + */ + if ((pci_addr & ~dev->dma_mask) == 0) { + /* + ** Device is bit capable of DMA'ing to the buffer... + ** just return the PCI address of ptr + */ +#ifdef CONFIG_PROC_FS + spin_lock_irqsave(&ioc->res_lock, flags); + ioc->msingle_bypass++; + spin_unlock_irqrestore(&ioc->res_lock, flags); +#endif + DBG_BYPASS("sba_map_single() bypass mask/addr: 0x%lx/0x%lx\n", + dev->dma_mask, pci_addr); + return pci_addr; + } +#endif + + ASSERT(size > 0); + ASSERT(size <= DMA_CHUNK_SIZE); + + /* save offset bits */ + offset = ((dma_addr_t) (long) addr) & ~IOVP_MASK; + + /* round up to nearest IOVP_SIZE */ + size = (size + offset + ~IOVP_MASK) & IOVP_MASK; + + spin_lock_irqsave(&ioc->res_lock, flags); +#ifdef ASSERT_PDIR_SANITY + if (sba_check_pdir(ioc,"Check before sba_map_single()")) + panic("Sanity check failed"); +#endif + +#ifdef CONFIG_PROC_FS + ioc->msingle_calls++; + ioc->msingle_pages += size >> IOVP_SHIFT; +#endif + pide = sba_alloc_range(ioc, size); + iovp = (dma_addr_t) pide << IOVP_SHIFT; + + DBG_RUN("%s() 0x%p -> 0x%lx\n", + __FUNCTION__, addr, (long) iovp | offset); + + pdir_start = &(ioc->pdir_base[pide]); + + while (size > 0) { + ASSERT(((u8 *)pdir_start)[7] == 0); /* verify availability */ + sba_io_pdir_entry(pdir_start, (unsigned long) addr); + + DBG_RUN(" pdir 0x%p %lx\n", pdir_start, *pdir_start); + + addr += IOVP_SIZE; + size -= IOVP_SIZE; + pdir_start++; + } + /* form complete address */ +#ifdef ASSERT_PDIR_SANITY + sba_check_pdir(ioc,"Check after sba_map_single()"); +#endif + spin_unlock_irqrestore(&ioc->res_lock, flags); + return SBA_IOVA(ioc, iovp, offset, DEFAULT_DMA_HINT_REG); +} + +/** + * sba_unmap_single - unmap one IOVA and free resources + * @dev: instance of PCI owned by the driver that's asking. + * @iova: IOVA of driver buffer previously mapped. + * @size: number of bytes mapped in driver buffer. + * @direction: R/W or both. + * + * See Documentation/DMA-mapping.txt + */ +void sba_unmap_single(struct pci_dev *dev, dma_addr_t iova, size_t size, + int direction) +{ + struct ioc *ioc; +#if DELAYED_RESOURCE_CNT > 0 + struct sba_dma_pair *d; +#endif + unsigned long flags; + dma_addr_t offset; + + ioc = GET_IOC(dev); + ASSERT(ioc); + +#ifdef ALLOW_IOV_BYPASS + if ((iova & ioc->imask) != ioc->ibase) { + /* + ** Address does not fall w/in IOVA, must be bypassing + */ +#ifdef CONFIG_PROC_FS + spin_lock_irqsave(&ioc->res_lock, flags); + ioc->usingle_bypass++; + spin_unlock_irqrestore(&ioc->res_lock, flags); +#endif + DBG_BYPASS("sba_unmap_single() bypass addr: 0x%lx\n", iova); + +#ifdef ENABLE_MARK_CLEAN + if (direction == PCI_DMA_FROMDEVICE) { + mark_clean(phys_to_virt(iova), size); + } +#endif + return; + } +#endif + offset = iova & ~IOVP_MASK; + + DBG_RUN("%s() iovp 0x%lx/%x\n", + __FUNCTION__, (long) iova, size); + + iova ^= offset; /* clear offset bits */ + size += offset; + size = ROUNDUP(size, IOVP_SIZE); + + spin_lock_irqsave(&ioc->res_lock, flags); +#ifdef CONFIG_PROC_FS + ioc->usingle_calls++; + ioc->usingle_pages += size >> IOVP_SHIFT; +#endif + +#if DELAYED_RESOURCE_CNT > 0 + d = &(ioc->saved[ioc->saved_cnt]); + d->iova = iova; + d->size = size; + if (++(ioc->saved_cnt) >= DELAYED_RESOURCE_CNT) { + int cnt = ioc->saved_cnt; + while (cnt--) { + sba_mark_invalid(ioc, d->iova, d->size); + sba_free_range(ioc, d->iova, d->size); + d--; + } + ioc->saved_cnt = 0; + READ_REG(ioc->ioc_hpa+IOC_PCOM); /* flush purges */ + } +#else /* DELAYED_RESOURCE_CNT == 0 */ + sba_mark_invalid(ioc, iova, size); + sba_free_range(ioc, iova, size); + READ_REG(ioc->ioc_hpa+IOC_PCOM); /* flush purges */ +#endif /* DELAYED_RESOURCE_CNT == 0 */ +#ifdef ENABLE_MARK_CLEAN + if (direction == PCI_DMA_FROMDEVICE) { + u32 iovp = (u32) SBA_IOVP(ioc,iova); + int off = PDIR_INDEX(iovp); + void *addr; + + if (size <= IOVP_SIZE) { + addr = phys_to_virt(ioc->pdir_base[off] & + ~0xE000000000000FFFULL); + mark_clean(addr, size); + } else { + size_t byte_cnt = size; + + do { + addr = phys_to_virt(ioc->pdir_base[off] & + ~0xE000000000000FFFULL); + mark_clean(addr, min(byte_cnt, IOVP_SIZE)); + off++; + byte_cnt -= IOVP_SIZE; + + } while (byte_cnt > 0); + } + } +#endif + spin_unlock_irqrestore(&ioc->res_lock, flags); + + /* XXX REVISIT for 2.5 Linux - need syncdma for zero-copy support. + ** For Astro based systems this isn't a big deal WRT performance. + ** As long as 2.4 kernels copyin/copyout data from/to userspace, + ** we don't need the syncdma. The issue here is I/O MMU cachelines + ** are *not* coherent in all cases. May be hwrev dependent. + ** Need to investigate more. + asm volatile("syncdma"); + */ +} + + +/** + * sba_alloc_consistent - allocate/map shared mem for DMA + * @hwdev: instance of PCI owned by the driver that's asking. + * @size: number of bytes mapped in driver buffer. + * @dma_handle: IOVA of new buffer. + * + * See Documentation/DMA-mapping.txt + */ +void * +sba_alloc_consistent(struct pci_dev *hwdev, size_t size, dma_addr_t *dma_handle) +{ + void *ret; + + if (!hwdev) { + /* only support PCI */ + *dma_handle = 0; + return 0; + } + + ret = (void *) __get_free_pages(GFP_ATOMIC, get_order(size)); + + if (ret) { + memset(ret, 0, size); + *dma_handle = sba_map_single(hwdev, ret, size, 0); + } + + return ret; +} + + +/** + * sba_free_consistent - free/unmap shared mem for DMA + * @hwdev: instance of PCI owned by the driver that's asking. + * @size: number of bytes mapped in driver buffer. + * @vaddr: virtual address IOVA of "consistent" buffer. + * @dma_handler: IO virtual address of "consistent" buffer. + * + * See Documentation/DMA-mapping.txt + */ +void sba_free_consistent(struct pci_dev *hwdev, size_t size, void *vaddr, + dma_addr_t dma_handle) +{ + sba_unmap_single(hwdev, dma_handle, size, 0); + free_pages((unsigned long) vaddr, get_order(size)); +} + + +/* +** Since 0 is a valid pdir_base index value, can't use that +** to determine if a value is valid or not. Use a flag to indicate +** the SG list entry contains a valid pdir index. +*/ +#define PIDE_FLAG 0x1UL + +#ifdef DEBUG_LARGE_SG_ENTRIES +int dump_run_sg = 0; +#endif + + +/** + * sba_fill_pdir - write allocated SG entries into IO PDIR + * @ioc: IO MMU structure which owns the pdir we are interested in. + * @startsg: list of IOVA/size pairs + * @nents: number of entries in startsg list + * + * Take preprocessed SG list and write corresponding entries + * in the IO PDIR. + */ + +static SBA_INLINE int +sba_fill_pdir( + struct ioc *ioc, + struct scatterlist *startsg, + int nents) +{ + struct scatterlist *dma_sg = startsg; /* pointer to current DMA */ + int n_mappings = 0; + u64 *pdirp = 0; + unsigned long dma_offset = 0; + + dma_sg--; + while (nents-- > 0) { + int cnt = sba_sg_len(startsg); + sba_sg_len(startsg) = 0; + +#ifdef DEBUG_LARGE_SG_ENTRIES + if (dump_run_sg) + printk(" %2d : %08lx/%05x %p\n", + nents, + (unsigned long) sba_sg_iova(startsg), cnt, + sba_sg_buffer(startsg) + ); +#else + DBG_RUN_SG(" %d : %08lx/%05x %p\n", + nents, + (unsigned long) sba_sg_iova(startsg), cnt, + sba_sg_buffer(startsg) + ); +#endif + /* + ** Look for the start of a new DMA stream + */ + if ((u64)sba_sg_iova(startsg) & PIDE_FLAG) { + u32 pide = (u64)sba_sg_iova(startsg) & ~PIDE_FLAG; + dma_offset = (unsigned long) pide & ~IOVP_MASK; + sba_sg_iova(startsg) = 0; + dma_sg++; + sba_sg_iova(dma_sg) = (char *)(pide | ioc->ibase); + pdirp = &(ioc->pdir_base[pide >> IOVP_SHIFT]); + n_mappings++; + } + + /* + ** Look for a VCONTIG chunk + */ + if (cnt) { + unsigned long vaddr = (unsigned long) sba_sg_buffer(startsg); + ASSERT(pdirp); + + /* Since multiple Vcontig blocks could make up + ** one DMA stream, *add* cnt to dma_len. + */ + sba_sg_len(dma_sg) += cnt; + cnt += dma_offset; + dma_offset=0; /* only want offset on first chunk */ + cnt = ROUNDUP(cnt, IOVP_SIZE); +#ifdef CONFIG_PROC_FS + ioc->msg_pages += cnt >> IOVP_SHIFT; +#endif + do { + sba_io_pdir_entry(pdirp, vaddr); + vaddr += IOVP_SIZE; + cnt -= IOVP_SIZE; + pdirp++; + } while (cnt > 0); + } + startsg++; + } +#ifdef DEBUG_LARGE_SG_ENTRIES + dump_run_sg = 0; +#endif + return(n_mappings); +} + + +/* +** Two address ranges are DMA contiguous *iff* "end of prev" and +** "start of next" are both on a page boundry. +** +** (shift left is a quick trick to mask off upper bits) +*/ +#define DMA_CONTIG(__X, __Y) \ + (((((unsigned long) __X) | ((unsigned long) __Y)) << (BITS_PER_LONG - PAGE_SHIFT)) == 0UL) + + +/** + * sba_coalesce_chunks - preprocess the SG list + * @ioc: IO MMU structure which owns the pdir we are interested in. + * @startsg: list of IOVA/size pairs + * @nents: number of entries in startsg list + * + * First pass is to walk the SG list and determine where the breaks are + * in the DMA stream. Allocates PDIR entries but does not fill them. + * Returns the number of DMA chunks. + * + * Doing the fill seperate from the coalescing/allocation keeps the + * code simpler. Future enhancement could make one pass through + * the sglist do both. + */ +static SBA_INLINE int +sba_coalesce_chunks( struct ioc *ioc, + struct scatterlist *startsg, + int nents) +{ + struct scatterlist *vcontig_sg; /* VCONTIG chunk head */ + unsigned long vcontig_len; /* len of VCONTIG chunk */ + unsigned long vcontig_end; + struct scatterlist *dma_sg; /* next DMA stream head */ + unsigned long dma_offset, dma_len; /* start/len of DMA stream */ + int n_mappings = 0; + + while (nents > 0) { + unsigned long vaddr = (unsigned long) (startsg->address); + + /* + ** Prepare for first/next DMA stream + */ + dma_sg = vcontig_sg = startsg; + dma_len = vcontig_len = vcontig_end = sba_sg_len(startsg); + vcontig_end += vaddr; + dma_offset = vaddr & ~IOVP_MASK; + + /* PARANOID: clear entries */ + sba_sg_buffer(startsg) = sba_sg_iova(startsg); + sba_sg_iova(startsg) = 0; + sba_sg_len(startsg) = 0; + + /* + ** This loop terminates one iteration "early" since + ** it's always looking one "ahead". + */ + while (--nents > 0) { + unsigned long vaddr; /* tmp */ + + startsg++; + + /* catch brokenness in SCSI layer */ + ASSERT(startsg->length <= DMA_CHUNK_SIZE); + + /* + ** First make sure current dma stream won't + ** exceed DMA_CHUNK_SIZE if we coalesce the + ** next entry. + */ + if (((dma_len + dma_offset + startsg->length + ~IOVP_MASK) & IOVP_MASK) > DMA_CHUNK_SIZE) + break; + + /* + ** Then look for virtually contiguous blocks. + ** + ** append the next transaction? + */ + vaddr = (unsigned long) sba_sg_iova(startsg); + if (vcontig_end == vaddr) + { + vcontig_len += sba_sg_len(startsg); + vcontig_end += sba_sg_len(startsg); + dma_len += sba_sg_len(startsg); + sba_sg_buffer(startsg) = (char *)vaddr; + sba_sg_iova(startsg) = 0; + sba_sg_len(startsg) = 0; + continue; + } + +#ifdef DEBUG_LARGE_SG_ENTRIES + dump_run_sg = (vcontig_len > IOVP_SIZE); +#endif + + /* + ** Not virtually contigous. + ** Terminate prev chunk. + ** Start a new chunk. + ** + ** Once we start a new VCONTIG chunk, dma_offset + ** can't change. And we need the offset from the first + ** chunk - not the last one. Ergo Successive chunks + ** must start on page boundaries and dove tail + ** with it's predecessor. + */ + sba_sg_len(vcontig_sg) = vcontig_len; + + vcontig_sg = startsg; + vcontig_len = sba_sg_len(startsg); + + /* + ** 3) do the entries end/start on page boundaries? + ** Don't update vcontig_end until we've checked. + */ + if (DMA_CONTIG(vcontig_end, vaddr)) + { + vcontig_end = vcontig_len + vaddr; + dma_len += vcontig_len; + sba_sg_buffer(startsg) = (char *)vaddr; + sba_sg_iova(startsg) = 0; + continue; + } else { + break; + } + } + + /* + ** End of DMA Stream + ** Terminate last VCONTIG block. + ** Allocate space for DMA stream. + */ + sba_sg_len(vcontig_sg) = vcontig_len; + dma_len = (dma_len + dma_offset + ~IOVP_MASK) & IOVP_MASK; + ASSERT(dma_len <= DMA_CHUNK_SIZE); + sba_sg_iova(dma_sg) = (char *) (PIDE_FLAG + | (sba_alloc_range(ioc, dma_len) << IOVP_SHIFT) + | dma_offset); + n_mappings++; + } + + return n_mappings; +} + + +/** + * sba_map_sg - map Scatter/Gather list + * @dev: instance of PCI owned by the driver that's asking. + * @sglist: array of buffer/length pairs + * @nents: number of entries in list + * @direction: R/W or both. + * + * See Documentation/DMA-mapping.txt + */ +int sba_map_sg(struct pci_dev *dev, struct scatterlist *sglist, int nents, + int direction) +{ + struct ioc *ioc; + int coalesced, filled = 0; + unsigned long flags; +#ifdef ALLOW_IOV_BYPASS + struct scatterlist *sg; +#endif + + DBG_RUN_SG("%s() START %d entries\n", __FUNCTION__, nents); + ioc = GET_IOC(dev); + ASSERT(ioc); + +#ifdef ALLOW_IOV_BYPASS + if (dev->dma_mask >= ioc->dma_mask) { + for (sg = sglist ; filled < nents ; filled++, sg++){ + sba_sg_buffer(sg) = sba_sg_iova(sg); + sba_sg_iova(sg) = (char *)virt_to_phys(sba_sg_buffer(sg)); + } +#ifdef CONFIG_PROC_FS + spin_lock_irqsave(&ioc->res_lock, flags); + ioc->msg_bypass++; + spin_unlock_irqrestore(&ioc->res_lock, flags); +#endif + return filled; + } +#endif + /* Fast path single entry scatterlists. */ + if (nents == 1) { + sba_sg_buffer(sglist) = sba_sg_iova(sglist); + sba_sg_iova(sglist) = (char *)sba_map_single(dev, + sba_sg_buffer(sglist), + sba_sg_len(sglist), direction); +#ifdef CONFIG_PROC_FS + /* + ** Should probably do some stats counting, but trying to + ** be precise quickly starts wasting CPU time. + */ +#endif + return 1; + } + + spin_lock_irqsave(&ioc->res_lock, flags); + +#ifdef ASSERT_PDIR_SANITY + if (sba_check_pdir(ioc,"Check before sba_map_sg()")) + { + sba_dump_sg(ioc, sglist, nents); + panic("Check before sba_map_sg()"); + } +#endif + +#ifdef CONFIG_PROC_FS + ioc->msg_calls++; +#endif + + /* + ** First coalesce the chunks and allocate I/O pdir space + ** + ** If this is one DMA stream, we can properly map using the + ** correct virtual address associated with each DMA page. + ** w/o this association, we wouldn't have coherent DMA! + ** Access to the virtual address is what forces a two pass algorithm. + */ + coalesced = sba_coalesce_chunks(ioc, sglist, nents); + + /* + ** Program the I/O Pdir + ** + ** map the virtual addresses to the I/O Pdir + ** o dma_address will contain the pdir index + ** o dma_len will contain the number of bytes to map + ** o address contains the virtual address. + */ + filled = sba_fill_pdir(ioc, sglist, nents); + +#ifdef ASSERT_PDIR_SANITY + if (sba_check_pdir(ioc,"Check after sba_map_sg()")) + { + sba_dump_sg(ioc, sglist, nents); + panic("Check after sba_map_sg()\n"); + } +#endif + + spin_unlock_irqrestore(&ioc->res_lock, flags); + + ASSERT(coalesced == filled); + DBG_RUN_SG("%s() DONE %d mappings\n", __FUNCTION__, filled); + + return filled; +} + + +/** + * sba_unmap_sg - unmap Scatter/Gather list + * @dev: instance of PCI owned by the driver that's asking. + * @sglist: array of buffer/length pairs + * @nents: number of entries in list + * @direction: R/W or both. + * + * See Documentation/DMA-mapping.txt + */ +void sba_unmap_sg(struct pci_dev *dev, struct scatterlist *sglist, int nents, + int direction) +{ + struct ioc *ioc; +#ifdef ASSERT_PDIR_SANITY + unsigned long flags; +#endif + + DBG_RUN_SG("%s() START %d entries, %p,%x\n", + __FUNCTION__, nents, sba_sg_buffer(sglist), sglist->length); + + ioc = GET_IOC(dev); + ASSERT(ioc); + +#ifdef CONFIG_PROC_FS + ioc->usg_calls++; +#endif + +#ifdef ASSERT_PDIR_SANITY + spin_lock_irqsave(&ioc->res_lock, flags); + sba_check_pdir(ioc,"Check before sba_unmap_sg()"); + spin_unlock_irqrestore(&ioc->res_lock, flags); +#endif + + while (sba_sg_len(sglist) && nents--) { + + sba_unmap_single(dev, (dma_addr_t)sba_sg_iova(sglist), + sba_sg_len(sglist), direction); +#ifdef CONFIG_PROC_FS + /* + ** This leaves inconsistent data in the stats, but we can't + ** tell which sg lists were mapped by map_single and which + ** were coalesced to a single entry. The stats are fun, + ** but speed is more important. + */ + ioc->usg_pages += (((u64)sba_sg_iova(sglist) & ~IOVP_MASK) + sba_sg_len(sglist) + IOVP_SIZE - 1) >> PAGE_SHIFT; +#endif + ++sglist; + } + + DBG_RUN_SG("%s() DONE (nents %d)\n", __FUNCTION__, nents); + +#ifdef ASSERT_PDIR_SANITY + spin_lock_irqsave(&ioc->res_lock, flags); + sba_check_pdir(ioc,"Check after sba_unmap_sg()"); + spin_unlock_irqrestore(&ioc->res_lock, flags); +#endif + +} + +unsigned long +sba_dma_address (struct scatterlist *sg) +{ + return ((unsigned long)sba_sg_iova(sg)); +} + +/************************************************************** +* +* Initialization and claim +* +***************************************************************/ + + +static void +sba_ioc_init(struct sba_device *sba_dev, struct ioc *ioc, int ioc_num) +{ + u32 iova_space_size, iova_space_mask; + void * pdir_base; + int pdir_size, iov_order, tcnfg; + + /* + ** Firmware programs the maximum IOV space size into the imask reg + */ + iova_space_size = ~(READ_REG(ioc->ioc_hpa + IOC_IMASK) & 0xFFFFFFFFUL) + 1; +#ifdef CONFIG_IA64_HP_PROTO + if (!iova_space_size) + iova_space_size = GB(1); +#endif + + /* + ** iov_order is always based on a 1GB IOVA space since we want to + ** turn on the other half for AGP GART. + */ + iov_order = get_order(iova_space_size >> (IOVP_SHIFT-PAGE_SHIFT)); + ioc->pdir_size = pdir_size = (iova_space_size/IOVP_SIZE) * sizeof(u64); + + DBG_INIT("%s() hpa 0x%lx IOV %dMB (%d bits) PDIR size 0x%0x\n", + __FUNCTION__, ioc->ioc_hpa, iova_space_size>>20, + iov_order + PAGE_SHIFT, ioc->pdir_size); + + /* FIXME : DMA HINTs not used */ + ioc->hint_shift_pdir = iov_order + PAGE_SHIFT; + ioc->hint_mask_pdir = ~(0x3 << (iov_order + PAGE_SHIFT)); + + ioc->pdir_base = + pdir_base = (void *) __get_free_pages(GFP_KERNEL, get_order(pdir_size)); + if (NULL == pdir_base) + { + panic(__FILE__ ":%s() could not allocate I/O Page Table\n", __FUNCTION__); + } + memset(pdir_base, 0, pdir_size); + + DBG_INIT("%s() pdir %p size %x hint_shift_pdir %x hint_mask_pdir %lx\n", + __FUNCTION__, pdir_base, pdir_size, + ioc->hint_shift_pdir, ioc->hint_mask_pdir); + + ASSERT((((unsigned long) pdir_base) & PAGE_MASK) == (unsigned long) pdir_base); + WRITE_REG(virt_to_phys(pdir_base), ioc->ioc_hpa + IOC_PDIR_BASE); + + DBG_INIT(" base %p\n", pdir_base); + + /* build IMASK for IOC and Elroy */ + iova_space_mask = 0xffffffff; + iova_space_mask <<= (iov_order + PAGE_SHIFT); + +#ifdef CONFIG_IA64_HP_PROTO + /* + ** REVISIT - this is a kludge, but we won't be supporting anything but + ** zx1 2.0 or greater for real. When fw is in shape, ibase will + ** be preprogrammed w/ the IOVA hole base and imask will give us + ** the size. + */ + if ((sba_dev->hw_rev & 0xFF) < 0x20) { + DBG_INIT("%s() Found SBA rev < 2.0, setting IOVA base to 0. This device will not be supported in the future.\n", __FUNCTION__); + ioc->ibase = 0x0; + } else +#endif + ioc->ibase = READ_REG(ioc->ioc_hpa + IOC_IBASE) & 0xFFFFFFFEUL; + + ioc->imask = iova_space_mask; /* save it */ + + DBG_INIT("%s() IOV base 0x%lx mask 0x%0lx\n", + __FUNCTION__, ioc->ibase, ioc->imask); + + /* + ** FIXME: Hint registers are programmed with default hint + ** values during boot, so hints should be sane even if we + ** can't reprogram them the way drivers want. + */ + + WRITE_REG(ioc->imask, ioc->ioc_hpa+IOC_IMASK); + + /* + ** Setting the upper bits makes checking for bypass addresses + ** a little faster later on. + */ + ioc->imask |= 0xFFFFFFFF00000000UL; + + /* Set I/O PDIR Page size to system page size */ + switch (PAGE_SHIFT) { + case 12: /* 4K */ + tcnfg = 0; + break; + case 13: /* 8K */ + tcnfg = 1; + break; + case 14: /* 16K */ + tcnfg = 2; + break; + case 16: /* 64K */ + tcnfg = 3; + break; + } + WRITE_REG(tcnfg, ioc->ioc_hpa+IOC_TCNFG); + + /* + ** Program the IOC's ibase and enable IOVA translation + ** Bit zero == enable bit. + */ + WRITE_REG(ioc->ibase | 1, ioc->ioc_hpa+IOC_IBASE); + + /* + ** Clear I/O TLB of any possible entries. + ** (Yes. This is a bit paranoid...but so what) + */ + WRITE_REG(0 | 31, ioc->ioc_hpa+IOC_PCOM); + + /* + ** If an AGP device is present, only use half of the IOV space + ** for PCI DMA. Unfortunately we can't know ahead of time + ** whether GART support will actually be used, for now we + ** can just key on an AGP device found in the system. + ** We program the next pdir index after we stop w/ a key for + ** the GART code to handshake on. + */ + if (SBA_GET_AGP(sba_dev)) { + DBG_INIT("%s() AGP Device found, reserving 512MB for GART support\n", __FUNCTION__); + ioc->pdir_size /= 2; + ((u64 *)pdir_base)[PDIR_INDEX(iova_space_size/2)] = 0x0000badbadc0ffeeULL; + } + + DBG_INIT("%s() DONE\n", __FUNCTION__); +} + + + +/************************************************************************** +** +** SBA initialization code (HW and SW) +** +** o identify SBA chip itself +** o FIXME: initialize DMA hints for reasonable defaults +** +**************************************************************************/ + +static void +sba_hw_init(struct sba_device *sba_dev) +{ + int i; + int num_ioc; + u64 dma_mask; + u32 func_id; + + /* + ** Identify the SBA so we can set the dma_mask. We can make a virtual + ** dma_mask of the memory subsystem such that devices not implmenting + ** a full 64bit mask might still be able to bypass efficiently. + */ + func_id = READ_REG(sba_dev->sba_hpa + SBA_FUNC_ID); + + if (func_id == ZX1_FUNC_ID_VALUE) { + dma_mask = 0xFFFFFFFFFFUL; + } else { + dma_mask = 0xFFFFFFFFFFFFFFFFUL; + } + + DBG_INIT("%s(): ioc->dma_mask == 0x%lx\n", __FUNCTION__, dma_mask); + + /* + ** Leaving in the multiple ioc code from parisc for the future, + ** currently there are no muli-ioc mckinley sbas + */ + sba_dev->ioc[0].ioc_hpa = SBA_IOC_OFFSET; + num_ioc = 1; + + sba_dev->num_ioc = num_ioc; + for (i = 0; i < num_ioc; i++) { + sba_dev->ioc[i].dma_mask = dma_mask; + sba_dev->ioc[i].ioc_hpa += sba_dev->sba_hpa; + sba_ioc_init(sba_dev, &(sba_dev->ioc[i]), i); + } +} + +static void +sba_common_init(struct sba_device *sba_dev) +{ + int i; + + /* add this one to the head of the list (order doesn't matter) + ** This will be useful for debugging - especially if we get coredumps + */ + sba_dev->next = sba_list; + sba_list = sba_dev; + sba_count++; + + for(i=0; i< sba_dev->num_ioc; i++) { + int res_size; + + /* resource map size dictated by pdir_size */ + res_size = sba_dev->ioc[i].pdir_size/sizeof(u64); /* entries */ + res_size >>= 3; /* convert bit count to byte count */ + DBG_INIT("%s() res_size 0x%x\n", + __FUNCTION__, res_size); + + sba_dev->ioc[i].res_size = res_size; + sba_dev->ioc[i].res_map = (char *) __get_free_pages(GFP_KERNEL, get_order(res_size)); + + if (NULL == sba_dev->ioc[i].res_map) + { + panic(__FILE__ ":%s() could not allocate resource map\n", __FUNCTION__ ); + } + + memset(sba_dev->ioc[i].res_map, 0, res_size); + /* next available IOVP - circular search */ + if ((sba_dev->hw_rev & 0xFF) >= 0x20) { + sba_dev->ioc[i].res_hint = (unsigned long *) + sba_dev->ioc[i].res_map; + } else { + u64 reserved_iov; + + /* Yet another 1.x hack */ + printk("zx1 1.x: Starting resource hint offset into IOV space to avoid initial zero value IOVA\n"); + sba_dev->ioc[i].res_hint = (unsigned long *) + &(sba_dev->ioc[i].res_map[L1_CACHE_BYTES]); + + sba_dev->ioc[i].res_map[0] = 0x1; + sba_dev->ioc[i].pdir_base[0] = 0x8000badbadc0ffeeULL; + + for (reserved_iov = 0xA0000 ; reserved_iov < 0xC0000 ; reserved_iov += IOVP_SIZE) { + u64 *res_ptr = sba_dev->ioc[i].res_map; + int index = PDIR_INDEX(reserved_iov); + int res_word; + u64 mask; + + res_word = (int)(index / BITS_PER_LONG); + mask = 0x1UL << (index - (res_word * BITS_PER_LONG)); + res_ptr[res_word] |= mask; + sba_dev->ioc[i].pdir_base[PDIR_INDEX(reserved_iov)] = (0x80000000000000FFULL | reserved_iov); + + } + } + +#ifdef ASSERT_PDIR_SANITY + /* Mark first bit busy - ie no IOVA 0 */ + sba_dev->ioc[i].res_map[0] = 0x1; + sba_dev->ioc[i].pdir_base[0] = 0x8000badbadc0ffeeULL; +#endif + + DBG_INIT("%s() %d res_map %x %p\n", __FUNCTION__, + i, res_size, (void *)sba_dev->ioc[i].res_map); + } + + sba_dev->sba_lock = SPIN_LOCK_UNLOCKED; +} + +#ifdef CONFIG_PROC_FS +static int sba_proc_info(char *buf, char **start, off_t offset, int len) +{ + struct sba_device *sba_dev = sba_list; + struct ioc *ioc = &sba_dev->ioc[0]; /* FIXME: Multi-IOC support! */ + int total_pages = (int) (ioc->res_size << 3); /* 8 bits per byte */ + unsigned long i = 0, avg = 0, min, max; + + sprintf(buf, "%s rev %d.%d\n", + "Hewlett Packard zx1 SBA", + ((sba_dev->hw_rev >> 4) & 0xF), + (sba_dev->hw_rev & 0xF) + ); + sprintf(buf, "%sIO PDIR size : %d bytes (%d entries)\n", + buf, + (int) ((ioc->res_size << 3) * sizeof(u64)), /* 8 bits/byte */ + total_pages); + + sprintf(buf, "%sIO PDIR entries : %ld free %ld used (%d%%)\n", buf, + total_pages - ioc->used_pages, ioc->used_pages, + (int) (ioc->used_pages * 100 / total_pages)); + + sprintf(buf, "%sResource bitmap : %d bytes (%d pages)\n", + buf, ioc->res_size, ioc->res_size << 3); /* 8 bits per byte */ + + min = max = ioc->avg_search[0]; + for (i = 0; i < SBA_SEARCH_SAMPLE; i++) { + avg += ioc->avg_search[i]; + if (ioc->avg_search[i] > max) max = ioc->avg_search[i]; + if (ioc->avg_search[i] < min) min = ioc->avg_search[i]; + } + avg /= SBA_SEARCH_SAMPLE; + sprintf(buf, "%s Bitmap search : %ld/%ld/%ld (min/avg/max CPU Cycles)\n", + buf, min, avg, max); + + sprintf(buf, "%spci_map_single(): %12ld calls %12ld pages (avg %d/1000)\n", + buf, ioc->msingle_calls, ioc->msingle_pages, + (int) ((ioc->msingle_pages * 1000)/ioc->msingle_calls)); +#ifdef ALLOW_IOV_BYPASS + sprintf(buf, "%spci_map_single(): %12ld bypasses\n", + buf, ioc->msingle_bypass); +#endif + + sprintf(buf, "%spci_unmap_single: %12ld calls %12ld pages (avg %d/1000)\n", + buf, ioc->usingle_calls, ioc->usingle_pages, + (int) ((ioc->usingle_pages * 1000)/ioc->usingle_calls)); +#ifdef ALLOW_IOV_BYPASS + sprintf(buf, "%spci_unmap_single: %12ld bypasses\n", + buf, ioc->usingle_bypass); +#endif + + sprintf(buf, "%spci_map_sg() : %12ld calls %12ld pages (avg %d/1000)\n", + buf, ioc->msg_calls, ioc->msg_pages, + (int) ((ioc->msg_pages * 1000)/ioc->msg_calls)); +#ifdef ALLOW_IOV_BYPASS + sprintf(buf, "%spci_map_sg() : %12ld bypasses\n", + buf, ioc->msg_bypass); +#endif + + sprintf(buf, "%spci_unmap_sg() : %12ld calls %12ld pages (avg %d/1000)\n", + buf, ioc->usg_calls, ioc->usg_pages, + (int) ((ioc->usg_pages * 1000)/ioc->usg_calls)); + + return strlen(buf); +} + +static int +sba_resource_map(char *buf, char **start, off_t offset, int len) +{ + struct ioc *ioc = sba_list->ioc; /* FIXME: Multi-IOC support! */ + unsigned int *res_ptr = (unsigned int *)ioc->res_map; + int i; + + buf[0] = '\0'; + for(i = 0; i < (ioc->res_size / sizeof(unsigned int)); ++i, ++res_ptr) { + if ((i & 7) == 0) + strcat(buf,"\n "); + sprintf(buf, "%s %08x", buf, *res_ptr); + } + strcat(buf, "\n"); + + return strlen(buf); +} +#endif + +/* +** Determine if sba should claim this chip (return 0) or not (return 1). +** If so, initialize the chip and tell other partners in crime they +** have work to do. +*/ +void __init sba_init(void) +{ + struct sba_device *sba_dev; + u32 func_id, hw_rev; + u32 *func_offset = NULL; + int i, agp_found = 0; + static char sba_rev[6]; + struct pci_dev *device = NULL; + u64 hpa = 0; + + if (!(device = pci_find_device(PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_ZX1_SBA, NULL))) + return; + + for (i = 0; i < PCI_NUM_RESOURCES; i++) { + if (pci_resource_flags(device, i) == IORESOURCE_MEM) { + hpa = ioremap(pci_resource_start(device, i), + pci_resource_len(device, i)); + break; + } + } + + func_id = READ_REG(hpa + SBA_FUNC_ID); + + if (func_id == ZX1_FUNC_ID_VALUE) { + (void)strcpy(sba_rev, "zx1"); + func_offset = zx1_func_offsets; + } else { + return; + } + + /* Read HW Rev First */ + hw_rev = READ_REG(hpa + SBA_FCLASS) & 0xFFUL; + + /* + * Not all revision registers of the chipset are updated on every + * turn. Must scan through all functions looking for the highest rev + */ + if (func_offset) { + for (i = 0 ; func_offset[i] != -1 ; i++) { + u32 func_rev; + + func_rev = READ_REG(hpa + SBA_FCLASS + func_offset[i]) & 0xFFUL; + DBG_INIT("%s() func offset: 0x%x rev: 0x%x\n", + __FUNCTION__, func_offset[i], func_rev); + if (func_rev > hw_rev) + hw_rev = func_rev; + } + } + + printk(KERN_INFO "%s found %s %d.%d at %s, HPA 0x%lx\n", DRIVER_NAME, + sba_rev, ((hw_rev >> 4) & 0xF), (hw_rev & 0xF), + device->slot_name, hpa); + + if ((hw_rev & 0xFF) < 0x20) { + printk(KERN_INFO "%s WARNING rev 2.0 or greater will be required for IO MMU support in the future\n", DRIVER_NAME); +#ifndef CONFIG_IA64_HP_PROTO + panic("%s: CONFIG_IA64_HP_PROTO MUST be enabled to support SBA rev less than 2.0", DRIVER_NAME); +#endif + } + + sba_dev = kmalloc(sizeof(struct sba_device), GFP_KERNEL); + if (NULL == sba_dev) { + printk(KERN_ERR DRIVER_NAME " - couldn't alloc sba_device\n"); + return; + } + + memset(sba_dev, 0, sizeof(struct sba_device)); + + for(i=0; iioc[i].res_lock)); + + sba_dev->hw_rev = hw_rev; + sba_dev->sba_hpa = hpa; + + /* + * We need to check for an AGP device, if we find one, then only + * use part of the IOVA space for PCI DMA, the rest is for GART. + * REVISIT for multiple IOC. + */ + pci_for_each_dev(device) + agp_found |= pci_find_capability(device, PCI_CAP_ID_AGP); + + if (agp_found && reserve_sba_gart) + SBA_SET_AGP(sba_dev); + + sba_hw_init(sba_dev); + sba_common_init(sba_dev); + +#ifdef CONFIG_PROC_FS + { + struct proc_dir_entry * proc_mckinley_root; + + proc_mckinley_root = proc_mkdir("bus/mckinley",0); + create_proc_info_entry(sba_rev, 0, proc_mckinley_root, sba_proc_info); + create_proc_info_entry("bitmap", 0, proc_mckinley_root, sba_resource_map); + } +#endif +} + +static int __init +nosbagart (char *str) +{ + reserve_sba_gart = 0; + return 1; +} + +__setup("nosbagart",nosbagart); + +EXPORT_SYMBOL(sba_init); +EXPORT_SYMBOL(sba_map_single); +EXPORT_SYMBOL(sba_unmap_single); +EXPORT_SYMBOL(sba_map_sg); +EXPORT_SYMBOL(sba_unmap_sg); +EXPORT_SYMBOL(sba_dma_address); +EXPORT_SYMBOL(sba_alloc_consistent); +EXPORT_SYMBOL(sba_free_consistent); +/* +** IA64 System Bus Adapter (SBA) I/O MMU manager +** +** (c) Copyright 2002 Alex Williamson +** (c) Copyright 2002 Hewlett-Packard Company +** +** Portions (c) 2000 Grant Grundler (from parisc I/O MMU code) +** Portions (c) 1999 Dave S. Miller (from sparc64 I/O MMU code) +** +** This program is free software; you can redistribute it and/or modify +** it under the terms of the GNU General Public License as published by +** the Free Software Foundation; either version 2 of the License, or +** (at your option) any later version. +** +** +** This module initializes the IOC (I/O Controller) found on HP +** McKinley machines and their successors. +** +*/ + +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include + +#include /* ia64_get_itc() */ +#include +#include /* PAGE_OFFSET */ +#include + + +#define DRIVER_NAME "SBA" + +#ifndef CONFIG_IA64_HP_PROTO +#define ALLOW_IOV_BYPASS +#endif +#define ENABLE_MARK_CLEAN +/* +** The number of debug flags is a clue - this code is fragile. +*/ +#undef DEBUG_SBA_INIT +#undef DEBUG_SBA_RUN +#undef DEBUG_SBA_RUN_SG +#undef DEBUG_SBA_RESOURCE +#undef ASSERT_PDIR_SANITY +#undef DEBUG_LARGE_SG_ENTRIES +#undef DEBUG_BYPASS + +#define SBA_INLINE __inline__ +/* #define SBA_INLINE */ + +#ifdef DEBUG_SBA_INIT +#define DBG_INIT(x...) printk(x) +#else +#define DBG_INIT(x...) +#endif + +#ifdef DEBUG_SBA_RUN +#define DBG_RUN(x...) printk(x) +#else +#define DBG_RUN(x...) +#endif + +#ifdef DEBUG_SBA_RUN_SG +#define DBG_RUN_SG(x...) printk(x) +#else +#define DBG_RUN_SG(x...) +#endif + + +#ifdef DEBUG_SBA_RESOURCE +#define DBG_RES(x...) printk(x) +#else +#define DBG_RES(x...) +#endif + +#ifdef DEBUG_BYPASS +#define DBG_BYPASS(x...) printk(x) +#else +#define DBG_BYPASS(x...) +#endif + +#ifdef ASSERT_PDIR_SANITY +#define ASSERT(expr) \ + if(!(expr)) { \ + printk( "\n" __FILE__ ":%d: Assertion " #expr " failed!\n",__LINE__); \ + panic(#expr); \ + } +#else +#define ASSERT(expr) +#endif + +#define KB(x) ((x) * 1024) +#define MB(x) (KB (KB (x))) +#define GB(x) (MB (KB (x))) + +/* +** The number of pdir entries to "free" before issueing +** a read to PCOM register to flush out PCOM writes. +** Interacts with allocation granularity (ie 4 or 8 entries +** allocated and free'd/purged at a time might make this +** less interesting). +*/ +#define DELAYED_RESOURCE_CNT 16 + +#define DEFAULT_DMA_HINT_REG 0 + +#define ZX1_FUNC_ID_VALUE ((PCI_DEVICE_ID_HP_ZX1_SBA << 16) | PCI_VENDOR_ID_HP) +#define ZX1_MC_ID ((PCI_DEVICE_ID_HP_ZX1_MC << 16) | PCI_VENDOR_ID_HP) + +#define SBA_FUNC_ID 0x0000 /* function id */ +#define SBA_FCLASS 0x0008 /* function class, bist, header, rev... */ + +#define SBA_FUNC_SIZE 0x10000 /* SBA configuration function reg set */ + +unsigned int __initdata zx1_func_offsets[] = {0x1000, 0x4000, 0x8000, + 0x9000, 0xa000, -1}; + +#define SBA_IOC_OFFSET 0x1000 + +#define MAX_IOC 1 /* we only have 1 for now*/ + +#define IOC_IBASE 0x300 /* IO TLB */ +#define IOC_IMASK 0x308 +#define IOC_PCOM 0x310 +#define IOC_TCNFG 0x318 +#define IOC_PDIR_BASE 0x320 + +#define IOC_IOVA_SPACE_BASE 0x40000000 /* IOVA ranges start at 1GB */ + +/* +** IOC supports 4/8/16/64KB page sizes (see TCNFG register) +** It's safer (avoid memory corruption) to keep DMA page mappings +** equivalently sized to VM PAGE_SIZE. +** +** We really can't avoid generating a new mapping for each +** page since the Virtual Coherence Index has to be generated +** and updated for each page. +** +** IOVP_SIZE could only be greater than PAGE_SIZE if we are +** confident the drivers really only touch the next physical +** page iff that driver instance owns it. +*/ +#define IOVP_SIZE PAGE_SIZE +#define IOVP_SHIFT PAGE_SHIFT +#define IOVP_MASK PAGE_MASK + +struct ioc { + unsigned long ioc_hpa; /* I/O MMU base address */ + char *res_map; /* resource map, bit == pdir entry */ + u64 *pdir_base; /* physical base address */ + unsigned long ibase; /* pdir IOV Space base */ + unsigned long imask; /* pdir IOV Space mask */ + + unsigned long *res_hint; /* next avail IOVP - circular search */ + spinlock_t res_lock; + unsigned long hint_mask_pdir; /* bits used for DMA hints */ + unsigned int res_bitshift; /* from the RIGHT! */ + unsigned int res_size; /* size of resource map in bytes */ + unsigned int hint_shift_pdir; + unsigned long dma_mask; +#if DELAYED_RESOURCE_CNT > 0 + int saved_cnt; + struct sba_dma_pair { + dma_addr_t iova; + size_t size; + } saved[DELAYED_RESOURCE_CNT]; +#endif + +#ifdef CONFIG_PROC_FS +#define SBA_SEARCH_SAMPLE 0x100 + unsigned long avg_search[SBA_SEARCH_SAMPLE]; + unsigned long avg_idx; /* current index into avg_search */ + unsigned long used_pages; + unsigned long msingle_calls; + unsigned long msingle_pages; + unsigned long msg_calls; + unsigned long msg_pages; + unsigned long usingle_calls; + unsigned long usingle_pages; + unsigned long usg_calls; + unsigned long usg_pages; +#ifdef ALLOW_IOV_BYPASS + unsigned long msingle_bypass; + unsigned long usingle_bypass; + unsigned long msg_bypass; +#endif +#endif + + /* STUFF We don't need in performance path */ + unsigned int pdir_size; /* in bytes, determined by IOV Space size */ +}; + +struct sba_device { + struct sba_device *next; /* list of SBA's in system */ + const char *name; + unsigned long sba_hpa; /* base address */ + spinlock_t sba_lock; + unsigned int flags; /* state/functionality enabled */ + unsigned int hw_rev; /* HW revision of chip */ + + unsigned int num_ioc; /* number of on-board IOC's */ + struct ioc ioc[MAX_IOC]; +}; + + +static struct sba_device *sba_list; +static int sba_count; +static int reserve_sba_gart = 1; + +#define sba_sg_iova(sg) (sg->address) +#define sba_sg_len(sg) (sg->length) +#define sba_sg_buffer(sg) (sg->orig_address) + +/* REVISIT - fix me for multiple SBAs/IOCs */ +#define GET_IOC(dev) (sba_list->ioc) +#define SBA_SET_AGP(sba_dev) (sba_dev->flags |= 0x1) +#define SBA_GET_AGP(sba_dev) (sba_dev->flags & 0x1) + +/* +** DMA_CHUNK_SIZE is used by the SCSI mid-layer to break up +** (or rather not merge) DMA's into managable chunks. +** On parisc, this is more of the software/tuning constraint +** rather than the HW. I/O MMU allocation alogorithms can be +** faster with smaller size is (to some degree). +*/ +#define DMA_CHUNK_SIZE (BITS_PER_LONG*PAGE_SIZE) + +/* Looks nice and keeps the compiler happy */ +#define SBA_DEV(d) ((struct sba_device *) (d)) + +#define ROUNDUP(x,y) ((x + ((y)-1)) & ~((y)-1)) + +/************************************ +** SBA register read and write support +** +** BE WARNED: register writes are posted. +** (ie follow writes which must reach HW with a read) +** +*/ +#define READ_REG(addr) __raw_readq(addr) +#define WRITE_REG(val, addr) __raw_writeq(val, addr) + +#ifdef DEBUG_SBA_INIT + +/** + * sba_dump_tlb - debugging only - print IOMMU operating parameters + * @hpa: base address of the IOMMU + * + * Print the size/location of the IO MMU PDIR. + */ +static void +sba_dump_tlb(char *hpa) +{ + DBG_INIT("IO TLB at 0x%p\n", (void *)hpa); + DBG_INIT("IOC_IBASE : %016lx\n", READ_REG(hpa+IOC_IBASE)); + DBG_INIT("IOC_IMASK : %016lx\n", READ_REG(hpa+IOC_IMASK)); + DBG_INIT("IOC_TCNFG : %016lx\n", READ_REG(hpa+IOC_TCNFG)); + DBG_INIT("IOC_PDIR_BASE: %016lx\n", READ_REG(hpa+IOC_PDIR_BASE)); + DBG_INIT("\n"); +} +#endif + + +#ifdef ASSERT_PDIR_SANITY + +/** + * sba_dump_pdir_entry - debugging only - print one IOMMU PDIR entry + * @ioc: IO MMU structure which owns the pdir we are interested in. + * @msg: text to print ont the output line. + * @pide: pdir index. + * + * Print one entry of the IO MMU PDIR in human readable form. + */ +static void +sba_dump_pdir_entry(struct ioc *ioc, char *msg, uint pide) +{ + /* start printing from lowest pde in rval */ + u64 *ptr = &(ioc->pdir_base[pide & ~(BITS_PER_LONG - 1)]); + unsigned long *rptr = (unsigned long *) &(ioc->res_map[(pide >>3) & ~(sizeof(unsigned long) - 1)]); + uint rcnt; + + /* printk(KERN_DEBUG "SBA: %s rp %p bit %d rval 0x%lx\n", */ + printk("SBA: %s rp %p bit %d rval 0x%lx\n", + msg, rptr, pide & (BITS_PER_LONG - 1), *rptr); + + rcnt = 0; + while (rcnt < BITS_PER_LONG) { + printk("%s %2d %p %016Lx\n", + (rcnt == (pide & (BITS_PER_LONG - 1))) + ? " -->" : " ", + rcnt, ptr, *ptr ); + rcnt++; + ptr++; + } + printk("%s", msg); +} + + +/** + * sba_check_pdir - debugging only - consistency checker + * @ioc: IO MMU structure which owns the pdir we are interested in. + * @msg: text to print ont the output line. + * + * Verify the resource map and pdir state is consistent + */ +static int +sba_check_pdir(struct ioc *ioc, char *msg) +{ + u64 *rptr_end = (u64 *) &(ioc->res_map[ioc->res_size]); + u64 *rptr = (u64 *) ioc->res_map; /* resource map ptr */ + u64 *pptr = ioc->pdir_base; /* pdir ptr */ + uint pide = 0; + + while (rptr < rptr_end) { + u64 rval; + int rcnt; /* number of bits we might check */ + + rval = *rptr; + rcnt = 64; + + while (rcnt) { + /* Get last byte and highest bit from that */ + u32 pde = ((u32)((*pptr >> (63)) & 0x1)); + if ((rval & 0x1) ^ pde) + { + /* + ** BUMMER! -- res_map != pdir -- + ** Dump rval and matching pdir entries + */ + sba_dump_pdir_entry(ioc, msg, pide); + return(1); + } + rcnt--; + rval >>= 1; /* try the next bit */ + pptr++; + pide++; + } + rptr++; /* look at next word of res_map */ + } + /* It'd be nice if we always got here :^) */ + return 0; +} + + +/** + * sba_dump_sg - debugging only - print Scatter-Gather list + * @ioc: IO MMU structure which owns the pdir we are interested in. + * @startsg: head of the SG list + * @nents: number of entries in SG list + * + * print the SG list so we can verify it's correct by hand. + */ +static void +sba_dump_sg( struct ioc *ioc, struct scatterlist *startsg, int nents) +{ + while (nents-- > 0) { + printk(" %d : %08lx/%05x %p\n", + nents, + (unsigned long) sba_sg_iova(startsg), + sba_sg_len(startsg), + sba_sg_buffer(startsg)); + startsg++; + } +} +static void +sba_check_sg( struct ioc *ioc, struct scatterlist *startsg, int nents) +{ + struct scatterlist *the_sg = startsg; + int the_nents = nents; + + while (the_nents-- > 0) { + if (sba_sg_buffer(the_sg) == 0x0UL) + sba_dump_sg(NULL, startsg, nents); + the_sg++; + } +} + +#endif /* ASSERT_PDIR_SANITY */ + + + + +/************************************************************** +* +* I/O Pdir Resource Management +* +* Bits set in the resource map are in use. +* Each bit can represent a number of pages. +* LSbs represent lower addresses (IOVA's). +* +***************************************************************/ +#define PAGES_PER_RANGE 1 /* could increase this to 4 or 8 if needed */ + +/* Convert from IOVP to IOVA and vice versa. */ +#define SBA_IOVA(ioc,iovp,offset,hint_reg) ((ioc->ibase) | (iovp) | (offset) | ((hint_reg)<<(ioc->hint_shift_pdir))) +#define SBA_IOVP(ioc,iova) (((iova) & ioc->hint_mask_pdir) & ~(ioc->ibase)) + +/* FIXME : review these macros to verify correctness and usage */ +#define PDIR_INDEX(iovp) ((iovp)>>IOVP_SHIFT) + +#define RESMAP_MASK(n) ~(~0UL << (n)) +#define RESMAP_IDX_MASK (sizeof(unsigned long) - 1) + + +/** + * sba_search_bitmap - find free space in IO PDIR resource bitmap + * @ioc: IO MMU structure which owns the pdir we are interested in. + * @bits_wanted: number of entries we need. + * + * Find consecutive free bits in resource bitmap. + * Each bit represents one entry in the IO Pdir. + * Cool perf optimization: search for log2(size) bits at a time. + */ +static SBA_INLINE unsigned long +sba_search_bitmap(struct ioc *ioc, unsigned long bits_wanted) +{ + unsigned long *res_ptr = ioc->res_hint; + unsigned long *res_end = (unsigned long *) &(ioc->res_map[ioc->res_size]); + unsigned long pide = ~0UL; + + ASSERT(((unsigned long) ioc->res_hint & (sizeof(unsigned long) - 1UL)) == 0); + ASSERT(res_ptr < res_end); + if (bits_wanted > (BITS_PER_LONG/2)) { + /* Search word at a time - no mask needed */ + for(; res_ptr < res_end; ++res_ptr) { + if (*res_ptr == 0) { + *res_ptr = RESMAP_MASK(bits_wanted); + pide = ((unsigned long)res_ptr - (unsigned long)ioc->res_map); + pide <<= 3; /* convert to bit address */ + break; + } + } + /* point to the next word on next pass */ + res_ptr++; + ioc->res_bitshift = 0; + } else { + /* + ** Search the resource bit map on well-aligned values. + ** "o" is the alignment. + ** We need the alignment to invalidate I/O TLB using + ** SBA HW features in the unmap path. + */ + unsigned long o = 1 << get_order(bits_wanted << PAGE_SHIFT); + uint bitshiftcnt = ROUNDUP(ioc->res_bitshift, o); + unsigned long mask; + + if (bitshiftcnt >= BITS_PER_LONG) { + bitshiftcnt = 0; + res_ptr++; + } + mask = RESMAP_MASK(bits_wanted) << bitshiftcnt; + + DBG_RES("%s() o %ld %p", __FUNCTION__, o, res_ptr); + while(res_ptr < res_end) + { + DBG_RES(" %p %lx %lx\n", res_ptr, mask, *res_ptr); + ASSERT(0 != mask); + if(0 == ((*res_ptr) & mask)) { + *res_ptr |= mask; /* mark resources busy! */ + pide = ((unsigned long)res_ptr - (unsigned long)ioc->res_map); + pide <<= 3; /* convert to bit address */ + pide += bitshiftcnt; + break; + } + mask <<= o; + bitshiftcnt += o; + if (0 == mask) { + mask = RESMAP_MASK(bits_wanted); + bitshiftcnt=0; + res_ptr++; + } + } + /* look in the same word on the next pass */ + ioc->res_bitshift = bitshiftcnt + bits_wanted; + } + + /* wrapped ? */ + if (res_end <= res_ptr) { + ioc->res_hint = (unsigned long *) ioc->res_map; + ioc->res_bitshift = 0; + } else { + ioc->res_hint = res_ptr; + } + return (pide); +} + + +/** + * sba_alloc_range - find free bits and mark them in IO PDIR resource bitmap + * @ioc: IO MMU structure which owns the pdir we are interested in. + * @size: number of bytes to create a mapping for + * + * Given a size, find consecutive unmarked and then mark those bits in the + * resource bit map. + */ +static int +sba_alloc_range(struct ioc *ioc, size_t size) +{ + unsigned int pages_needed = size >> IOVP_SHIFT; +#ifdef CONFIG_PROC_FS + unsigned long itc_start = ia64_get_itc(); +#endif + unsigned long pide; + + ASSERT(pages_needed); + ASSERT((pages_needed * IOVP_SIZE) <= DMA_CHUNK_SIZE); + ASSERT(pages_needed <= BITS_PER_LONG); + ASSERT(0 == (size & ~IOVP_MASK)); + + /* + ** "seek and ye shall find"...praying never hurts either... + */ + + pide = sba_search_bitmap(ioc, pages_needed); + if (pide >= (ioc->res_size << 3)) { + pide = sba_search_bitmap(ioc, pages_needed); + if (pide >= (ioc->res_size << 3)) + panic(__FILE__ ": I/O MMU @ %lx is out of mapping resources\n", ioc->ioc_hpa); + } + +#ifdef ASSERT_PDIR_SANITY + /* verify the first enable bit is clear */ + if(0x00 != ((u8 *) ioc->pdir_base)[pide*sizeof(u64) + 7]) { + sba_dump_pdir_entry(ioc, "sba_search_bitmap() botched it?", pide); + } +#endif + + DBG_RES("%s(%x) %d -> %lx hint %x/%x\n", + __FUNCTION__, size, pages_needed, pide, + (uint) ((unsigned long) ioc->res_hint - (unsigned long) ioc->res_map), + ioc->res_bitshift ); + +#ifdef CONFIG_PROC_FS + { + unsigned long itc_end = ia64_get_itc(); + unsigned long tmp = itc_end - itc_start; + /* check for roll over */ + itc_start = (itc_end < itc_start) ? -(tmp) : (tmp); + } + ioc->avg_search[ioc->avg_idx++] = itc_start; + ioc->avg_idx &= SBA_SEARCH_SAMPLE - 1; + + ioc->used_pages += pages_needed; +#endif + + return (pide); +} + + +/** + * sba_free_range - unmark bits in IO PDIR resource bitmap + * @ioc: IO MMU structure which owns the pdir we are interested in. + * @iova: IO virtual address which was previously allocated. + * @size: number of bytes to create a mapping for + * + * clear bits in the ioc's resource map + */ +static SBA_INLINE void +sba_free_range(struct ioc *ioc, dma_addr_t iova, size_t size) +{ + unsigned long iovp = SBA_IOVP(ioc, iova); + unsigned int pide = PDIR_INDEX(iovp); + unsigned int ridx = pide >> 3; /* convert bit to byte address */ + unsigned long *res_ptr = (unsigned long *) &((ioc)->res_map[ridx & ~RESMAP_IDX_MASK]); + + int bits_not_wanted = size >> IOVP_SHIFT; + + /* 3-bits "bit" address plus 2 (or 3) bits for "byte" == bit in word */ + unsigned long m = RESMAP_MASK(bits_not_wanted) << (pide & (BITS_PER_LONG - 1)); + + DBG_RES("%s( ,%x,%x) %x/%lx %x %p %lx\n", + __FUNCTION__, (uint) iova, size, + bits_not_wanted, m, pide, res_ptr, *res_ptr); + +#ifdef CONFIG_PROC_FS + ioc->used_pages -= bits_not_wanted; +#endif + + ASSERT(m != 0); + ASSERT(bits_not_wanted); + ASSERT((bits_not_wanted * IOVP_SIZE) <= DMA_CHUNK_SIZE); + ASSERT(bits_not_wanted <= BITS_PER_LONG); + ASSERT((*res_ptr & m) == m); /* verify same bits are set */ + *res_ptr &= ~m; +} + + +/************************************************************** +* +* "Dynamic DMA Mapping" support (aka "Coherent I/O") +* +***************************************************************/ + +#define SBA_DMA_HINT(ioc, val) ((val) << (ioc)->hint_shift_pdir) + + +/** + * sba_io_pdir_entry - fill in one IO PDIR entry + * @pdir_ptr: pointer to IO PDIR entry + * @vba: Virtual CPU address of buffer to map + * + * SBA Mapping Routine + * + * Given a virtual address (vba, arg1) sba_io_pdir_entry() + * loads the I/O PDIR entry pointed to by pdir_ptr (arg0). + * Each IO Pdir entry consists of 8 bytes as shown below + * (LSB == bit 0): + * + * 63 40 11 7 0 + * +-+---------------------+----------------------------------+----+--------+ + * |V| U | PPN[39:12] | U | FF | + * +-+---------------------+----------------------------------+----+--------+ + * + * V == Valid Bit + * U == Unused + * PPN == Physical Page Number + * + * The physical address fields are filled with the results of virt_to_phys() + * on the vba. + */ + +#if 1 +#define sba_io_pdir_entry(pdir_ptr, vba) *pdir_ptr = ((vba & ~0xE000000000000FFFULL) | 0x80000000000000FFULL) +#else +void SBA_INLINE +sba_io_pdir_entry(u64 *pdir_ptr, unsigned long vba) +{ + *pdir_ptr = ((vba & ~0xE000000000000FFFULL) | 0x80000000000000FFULL); +} +#endif + +#ifdef ENABLE_MARK_CLEAN +/** + * Since DMA is i-cache coherent, any (complete) pages that were written via + * DMA can be marked as "clean" so that update_mmu_cache() doesn't have to + * flush them when they get mapped into an executable vm-area. + */ +static void +mark_clean (void *addr, size_t size) +{ + unsigned long pg_addr, end; + + pg_addr = PAGE_ALIGN((unsigned long) addr); + end = (unsigned long) addr + size; + while (pg_addr + PAGE_SIZE <= end) { + struct page *page = virt_to_page(pg_addr); + set_bit(PG_arch_1, &page->flags); + pg_addr += PAGE_SIZE; + } +} +#endif + +/** + * sba_mark_invalid - invalidate one or more IO PDIR entries + * @ioc: IO MMU structure which owns the pdir we are interested in. + * @iova: IO Virtual Address mapped earlier + * @byte_cnt: number of bytes this mapping covers. + * + * Marking the IO PDIR entry(ies) as Invalid and invalidate + * corresponding IO TLB entry. The PCOM (Purge Command Register) + * is to purge stale entries in the IO TLB when unmapping entries. + * + * The PCOM register supports purging of multiple pages, with a minium + * of 1 page and a maximum of 2GB. Hardware requires the address be + * aligned to the size of the range being purged. The size of the range + * must be a power of 2. The "Cool perf optimization" in the + * allocation routine helps keep that true. + */ +static SBA_INLINE void +sba_mark_invalid(struct ioc *ioc, dma_addr_t iova, size_t byte_cnt) +{ + u32 iovp = (u32) SBA_IOVP(ioc,iova); + + int off = PDIR_INDEX(iovp); + + /* Must be non-zero and rounded up */ + ASSERT(byte_cnt > 0); + ASSERT(0 == (byte_cnt & ~IOVP_MASK)); + +#ifdef ASSERT_PDIR_SANITY + /* Assert first pdir entry is set */ + if (!(ioc->pdir_base[off] >> 60)) { + sba_dump_pdir_entry(ioc,"sba_mark_invalid()", PDIR_INDEX(iovp)); + } +#endif + + if (byte_cnt <= IOVP_SIZE) + { + ASSERT(off < ioc->pdir_size); + + iovp |= IOVP_SHIFT; /* set "size" field for PCOM */ + + /* + ** clear I/O PDIR entry "valid" bit + ** Do NOT clear the rest - save it for debugging. + ** We should only clear bits that have previously + ** been enabled. + */ + ioc->pdir_base[off] &= ~(0x80000000000000FFULL); + } else { + u32 t = get_order(byte_cnt) + PAGE_SHIFT; + + iovp |= t; + ASSERT(t <= 31); /* 2GB! Max value of "size" field */ + + do { + /* verify this pdir entry is enabled */ + ASSERT(ioc->pdir_base[off] >> 63); + /* clear I/O Pdir entry "valid" bit first */ + ioc->pdir_base[off] &= ~(0x80000000000000FFULL); + off++; + byte_cnt -= IOVP_SIZE; + } while (byte_cnt > 0); + } + + WRITE_REG(iovp, ioc->ioc_hpa+IOC_PCOM); +} + +/** + * sba_map_single - map one buffer and return IOVA for DMA + * @dev: instance of PCI owned by the driver that's asking. + * @addr: driver buffer to map. + * @size: number of bytes to map in driver buffer. + * @direction: R/W or both. + * + * See Documentation/DMA-mapping.txt + */ +dma_addr_t +sba_map_single(struct pci_dev *dev, void *addr, size_t size, int direction) +{ + struct ioc *ioc; + unsigned long flags; + dma_addr_t iovp; + dma_addr_t offset; + u64 *pdir_start; + int pide; +#ifdef ALLOW_IOV_BYPASS + unsigned long pci_addr = virt_to_phys(addr); +#endif + + ioc = GET_IOC(dev); + ASSERT(ioc); + +#ifdef ALLOW_IOV_BYPASS + /* + ** Check if the PCI device can DMA to ptr... if so, just return ptr + */ + if ((pci_addr & ~dev->dma_mask) == 0) { + /* + ** Device is bit capable of DMA'ing to the buffer... + ** just return the PCI address of ptr + */ +#ifdef CONFIG_PROC_FS + spin_lock_irqsave(&ioc->res_lock, flags); + ioc->msingle_bypass++; + spin_unlock_irqrestore(&ioc->res_lock, flags); +#endif + DBG_BYPASS("sba_map_single() bypass mask/addr: 0x%lx/0x%lx\n", + dev->dma_mask, pci_addr); + return pci_addr; + } +#endif + + ASSERT(size > 0); + ASSERT(size <= DMA_CHUNK_SIZE); + + /* save offset bits */ + offset = ((dma_addr_t) (long) addr) & ~IOVP_MASK; + + /* round up to nearest IOVP_SIZE */ + size = (size + offset + ~IOVP_MASK) & IOVP_MASK; + + spin_lock_irqsave(&ioc->res_lock, flags); +#ifdef ASSERT_PDIR_SANITY + if (sba_check_pdir(ioc,"Check before sba_map_single()")) + panic("Sanity check failed"); +#endif + +#ifdef CONFIG_PROC_FS + ioc->msingle_calls++; + ioc->msingle_pages += size >> IOVP_SHIFT; +#endif + pide = sba_alloc_range(ioc, size); + iovp = (dma_addr_t) pide << IOVP_SHIFT; + + DBG_RUN("%s() 0x%p -> 0x%lx\n", + __FUNCTION__, addr, (long) iovp | offset); + + pdir_start = &(ioc->pdir_base[pide]); + + while (size > 0) { + ASSERT(((u8 *)pdir_start)[7] == 0); /* verify availability */ + sba_io_pdir_entry(pdir_start, (unsigned long) addr); + + DBG_RUN(" pdir 0x%p %lx\n", pdir_start, *pdir_start); + + addr += IOVP_SIZE; + size -= IOVP_SIZE; + pdir_start++; + } + /* form complete address */ +#ifdef ASSERT_PDIR_SANITY + sba_check_pdir(ioc,"Check after sba_map_single()"); +#endif + spin_unlock_irqrestore(&ioc->res_lock, flags); + return SBA_IOVA(ioc, iovp, offset, DEFAULT_DMA_HINT_REG); +} + +/** + * sba_unmap_single - unmap one IOVA and free resources + * @dev: instance of PCI owned by the driver that's asking. + * @iova: IOVA of driver buffer previously mapped. + * @size: number of bytes mapped in driver buffer. + * @direction: R/W or both. + * + * See Documentation/DMA-mapping.txt + */ +void sba_unmap_single(struct pci_dev *dev, dma_addr_t iova, size_t size, + int direction) +{ + struct ioc *ioc; +#if DELAYED_RESOURCE_CNT > 0 + struct sba_dma_pair *d; +#endif + unsigned long flags; + dma_addr_t offset; + + ioc = GET_IOC(dev); + ASSERT(ioc); + +#ifdef ALLOW_IOV_BYPASS + if ((iova & ioc->imask) != ioc->ibase) { + /* + ** Address does not fall w/in IOVA, must be bypassing + */ +#ifdef CONFIG_PROC_FS + spin_lock_irqsave(&ioc->res_lock, flags); + ioc->usingle_bypass++; + spin_unlock_irqrestore(&ioc->res_lock, flags); +#endif + DBG_BYPASS("sba_unmap_single() bypass addr: 0x%lx\n", iova); + +#ifdef ENABLE_MARK_CLEAN + if (direction == PCI_DMA_FROMDEVICE) { + mark_clean(phys_to_virt(iova), size); + } +#endif + return; + } +#endif + offset = iova & ~IOVP_MASK; + + DBG_RUN("%s() iovp 0x%lx/%x\n", + __FUNCTION__, (long) iova, size); + + iova ^= offset; /* clear offset bits */ + size += offset; + size = ROUNDUP(size, IOVP_SIZE); + + spin_lock_irqsave(&ioc->res_lock, flags); +#ifdef CONFIG_PROC_FS + ioc->usingle_calls++; + ioc->usingle_pages += size >> IOVP_SHIFT; +#endif + +#if DELAYED_RESOURCE_CNT > 0 + d = &(ioc->saved[ioc->saved_cnt]); + d->iova = iova; + d->size = size; + if (++(ioc->saved_cnt) >= DELAYED_RESOURCE_CNT) { + int cnt = ioc->saved_cnt; + while (cnt--) { + sba_mark_invalid(ioc, d->iova, d->size); + sba_free_range(ioc, d->iova, d->size); + d--; + } + ioc->saved_cnt = 0; + READ_REG(ioc->ioc_hpa+IOC_PCOM); /* flush purges */ + } +#else /* DELAYED_RESOURCE_CNT == 0 */ + sba_mark_invalid(ioc, iova, size); + sba_free_range(ioc, iova, size); + READ_REG(ioc->ioc_hpa+IOC_PCOM); /* flush purges */ +#endif /* DELAYED_RESOURCE_CNT == 0 */ +#ifdef ENABLE_MARK_CLEAN + if (direction == PCI_DMA_FROMDEVICE) { + u32 iovp = (u32) SBA_IOVP(ioc,iova); + int off = PDIR_INDEX(iovp); + void *addr; + + if (size <= IOVP_SIZE) { + addr = phys_to_virt(ioc->pdir_base[off] & + ~0xE000000000000FFFULL); + mark_clean(addr, size); + } else { + size_t byte_cnt = size; + + do { + addr = phys_to_virt(ioc->pdir_base[off] & + ~0xE000000000000FFFULL); + mark_clean(addr, min(byte_cnt, IOVP_SIZE)); + off++; + byte_cnt -= IOVP_SIZE; + + } while (byte_cnt > 0); + } + } +#endif + spin_unlock_irqrestore(&ioc->res_lock, flags); + + /* XXX REVISIT for 2.5 Linux - need syncdma for zero-copy support. + ** For Astro based systems this isn't a big deal WRT performance. + ** As long as 2.4 kernels copyin/copyout data from/to userspace, + ** we don't need the syncdma. The issue here is I/O MMU cachelines + ** are *not* coherent in all cases. May be hwrev dependent. + ** Need to investigate more. + asm volatile("syncdma"); + */ +} + + +/** + * sba_alloc_consistent - allocate/map shared mem for DMA + * @hwdev: instance of PCI owned by the driver that's asking. + * @size: number of bytes mapped in driver buffer. + * @dma_handle: IOVA of new buffer. + * + * See Documentation/DMA-mapping.txt + */ +void * +sba_alloc_consistent(struct pci_dev *hwdev, size_t size, dma_addr_t *dma_handle) +{ + void *ret; + + if (!hwdev) { + /* only support PCI */ + *dma_handle = 0; + return 0; + } + + ret = (void *) __get_free_pages(GFP_ATOMIC, get_order(size)); + + if (ret) { + memset(ret, 0, size); + *dma_handle = sba_map_single(hwdev, ret, size, 0); + } + + return ret; +} + + +/** + * sba_free_consistent - free/unmap shared mem for DMA + * @hwdev: instance of PCI owned by the driver that's asking. + * @size: number of bytes mapped in driver buffer. + * @vaddr: virtual address IOVA of "consistent" buffer. + * @dma_handler: IO virtual address of "consistent" buffer. + * + * See Documentation/DMA-mapping.txt + */ +void sba_free_consistent(struct pci_dev *hwdev, size_t size, void *vaddr, + dma_addr_t dma_handle) +{ + sba_unmap_single(hwdev, dma_handle, size, 0); + free_pages((unsigned long) vaddr, get_order(size)); +} + + +/* +** Since 0 is a valid pdir_base index value, can't use that +** to determine if a value is valid or not. Use a flag to indicate +** the SG list entry contains a valid pdir index. +*/ +#define PIDE_FLAG 0x1UL + +#ifdef DEBUG_LARGE_SG_ENTRIES +int dump_run_sg = 0; +#endif + + +/** + * sba_fill_pdir - write allocated SG entries into IO PDIR + * @ioc: IO MMU structure which owns the pdir we are interested in. + * @startsg: list of IOVA/size pairs + * @nents: number of entries in startsg list + * + * Take preprocessed SG list and write corresponding entries + * in the IO PDIR. + */ + +static SBA_INLINE int +sba_fill_pdir( + struct ioc *ioc, + struct scatterlist *startsg, + int nents) +{ + struct scatterlist *dma_sg = startsg; /* pointer to current DMA */ + int n_mappings = 0; + u64 *pdirp = 0; + unsigned long dma_offset = 0; + + dma_sg--; + while (nents-- > 0) { + int cnt = sba_sg_len(startsg); + sba_sg_len(startsg) = 0; + +#ifdef DEBUG_LARGE_SG_ENTRIES + if (dump_run_sg) + printk(" %2d : %08lx/%05x %p\n", + nents, + (unsigned long) sba_sg_iova(startsg), cnt, + sba_sg_buffer(startsg) + ); +#else + DBG_RUN_SG(" %d : %08lx/%05x %p\n", + nents, + (unsigned long) sba_sg_iova(startsg), cnt, + sba_sg_buffer(startsg) + ); +#endif + /* + ** Look for the start of a new DMA stream + */ + if ((u64)sba_sg_iova(startsg) & PIDE_FLAG) { + u32 pide = (u64)sba_sg_iova(startsg) & ~PIDE_FLAG; + dma_offset = (unsigned long) pide & ~IOVP_MASK; + sba_sg_iova(startsg) = 0; + dma_sg++; + sba_sg_iova(dma_sg) = (char *)(pide | ioc->ibase); + pdirp = &(ioc->pdir_base[pide >> IOVP_SHIFT]); + n_mappings++; + } + + /* + ** Look for a VCONTIG chunk + */ + if (cnt) { + unsigned long vaddr = (unsigned long) sba_sg_buffer(startsg); + ASSERT(pdirp); + + /* Since multiple Vcontig blocks could make up + ** one DMA stream, *add* cnt to dma_len. + */ + sba_sg_len(dma_sg) += cnt; + cnt += dma_offset; + dma_offset=0; /* only want offset on first chunk */ + cnt = ROUNDUP(cnt, IOVP_SIZE); +#ifdef CONFIG_PROC_FS + ioc->msg_pages += cnt >> IOVP_SHIFT; +#endif + do { + sba_io_pdir_entry(pdirp, vaddr); + vaddr += IOVP_SIZE; + cnt -= IOVP_SIZE; + pdirp++; + } while (cnt > 0); + } + startsg++; + } +#ifdef DEBUG_LARGE_SG_ENTRIES + dump_run_sg = 0; +#endif + return(n_mappings); +} + + +/* +** Two address ranges are DMA contiguous *iff* "end of prev" and +** "start of next" are both on a page boundry. +** +** (shift left is a quick trick to mask off upper bits) +*/ +#define DMA_CONTIG(__X, __Y) \ + (((((unsigned long) __X) | ((unsigned long) __Y)) << (BITS_PER_LONG - PAGE_SHIFT)) == 0UL) + + +/** + * sba_coalesce_chunks - preprocess the SG list + * @ioc: IO MMU structure which owns the pdir we are interested in. + * @startsg: list of IOVA/size pairs + * @nents: number of entries in startsg list + * + * First pass is to walk the SG list and determine where the breaks are + * in the DMA stream. Allocates PDIR entries but does not fill them. + * Returns the number of DMA chunks. + * + * Doing the fill seperate from the coalescing/allocation keeps the + * code simpler. Future enhancement could make one pass through + * the sglist do both. + */ +static SBA_INLINE int +sba_coalesce_chunks( struct ioc *ioc, + struct scatterlist *startsg, + int nents) +{ + struct scatterlist *vcontig_sg; /* VCONTIG chunk head */ + unsigned long vcontig_len; /* len of VCONTIG chunk */ + unsigned long vcontig_end; + struct scatterlist *dma_sg; /* next DMA stream head */ + unsigned long dma_offset, dma_len; /* start/len of DMA stream */ + int n_mappings = 0; + + while (nents > 0) { + unsigned long vaddr = (unsigned long) (startsg->address); + + /* + ** Prepare for first/next DMA stream + */ + dma_sg = vcontig_sg = startsg; + dma_len = vcontig_len = vcontig_end = sba_sg_len(startsg); + vcontig_end += vaddr; + dma_offset = vaddr & ~IOVP_MASK; + + /* PARANOID: clear entries */ + sba_sg_buffer(startsg) = sba_sg_iova(startsg); + sba_sg_iova(startsg) = 0; + sba_sg_len(startsg) = 0; + + /* + ** This loop terminates one iteration "early" since + ** it's always looking one "ahead". + */ + while (--nents > 0) { + unsigned long vaddr; /* tmp */ + + startsg++; + + /* catch brokenness in SCSI layer */ + ASSERT(startsg->length <= DMA_CHUNK_SIZE); + + /* + ** First make sure current dma stream won't + ** exceed DMA_CHUNK_SIZE if we coalesce the + ** next entry. + */ + if (((dma_len + dma_offset + startsg->length + ~IOVP_MASK) & IOVP_MASK) > DMA_CHUNK_SIZE) + break; + + /* + ** Then look for virtually contiguous blocks. + ** + ** append the next transaction? + */ + vaddr = (unsigned long) sba_sg_iova(startsg); + if (vcontig_end == vaddr) + { + vcontig_len += sba_sg_len(startsg); + vcontig_end += sba_sg_len(startsg); + dma_len += sba_sg_len(startsg); + sba_sg_buffer(startsg) = (char *)vaddr; + sba_sg_iova(startsg) = 0; + sba_sg_len(startsg) = 0; + continue; + } + +#ifdef DEBUG_LARGE_SG_ENTRIES + dump_run_sg = (vcontig_len > IOVP_SIZE); +#endif + + /* + ** Not virtually contigous. + ** Terminate prev chunk. + ** Start a new chunk. + ** + ** Once we start a new VCONTIG chunk, dma_offset + ** can't change. And we need the offset from the first + ** chunk - not the last one. Ergo Successive chunks + ** must start on page boundaries and dove tail + ** with it's predecessor. + */ + sba_sg_len(vcontig_sg) = vcontig_len; + + vcontig_sg = startsg; + vcontig_len = sba_sg_len(startsg); + + /* + ** 3) do the entries end/start on page boundaries? + ** Don't update vcontig_end until we've checked. + */ + if (DMA_CONTIG(vcontig_end, vaddr)) + { + vcontig_end = vcontig_len + vaddr; + dma_len += vcontig_len; + sba_sg_buffer(startsg) = (char *)vaddr; + sba_sg_iova(startsg) = 0; + continue; + } else { + break; + } + } + + /* + ** End of DMA Stream + ** Terminate last VCONTIG block. + ** Allocate space for DMA stream. + */ + sba_sg_len(vcontig_sg) = vcontig_len; + dma_len = (dma_len + dma_offset + ~IOVP_MASK) & IOVP_MASK; + ASSERT(dma_len <= DMA_CHUNK_SIZE); + sba_sg_iova(dma_sg) = (char *) (PIDE_FLAG + | (sba_alloc_range(ioc, dma_len) << IOVP_SHIFT) + | dma_offset); + n_mappings++; + } + + return n_mappings; +} + + +/** + * sba_map_sg - map Scatter/Gather list + * @dev: instance of PCI owned by the driver that's asking. + * @sglist: array of buffer/length pairs + * @nents: number of entries in list + * @direction: R/W or both. + * + * See Documentation/DMA-mapping.txt + */ +int sba_map_sg(struct pci_dev *dev, struct scatterlist *sglist, int nents, + int direction) +{ + struct ioc *ioc; + int coalesced, filled = 0; + unsigned long flags; +#ifdef ALLOW_IOV_BYPASS + struct scatterlist *sg; +#endif + + DBG_RUN_SG("%s() START %d entries\n", __FUNCTION__, nents); + ioc = GET_IOC(dev); + ASSERT(ioc); + +#ifdef ALLOW_IOV_BYPASS + if (dev->dma_mask >= ioc->dma_mask) { + for (sg = sglist ; filled < nents ; filled++, sg++){ + sba_sg_buffer(sg) = sba_sg_iova(sg); + sba_sg_iova(sg) = (char *)virt_to_phys(sba_sg_buffer(sg)); + } +#ifdef CONFIG_PROC_FS + spin_lock_irqsave(&ioc->res_lock, flags); + ioc->msg_bypass++; + spin_unlock_irqrestore(&ioc->res_lock, flags); +#endif + return filled; + } +#endif + /* Fast path single entry scatterlists. */ + if (nents == 1) { + sba_sg_buffer(sglist) = sba_sg_iova(sglist); + sba_sg_iova(sglist) = (char *)sba_map_single(dev, + sba_sg_buffer(sglist), + sba_sg_len(sglist), direction); +#ifdef CONFIG_PROC_FS + /* + ** Should probably do some stats counting, but trying to + ** be precise quickly starts wasting CPU time. + */ +#endif + return 1; + } + + spin_lock_irqsave(&ioc->res_lock, flags); + +#ifdef ASSERT_PDIR_SANITY + if (sba_check_pdir(ioc,"Check before sba_map_sg()")) + { + sba_dump_sg(ioc, sglist, nents); + panic("Check before sba_map_sg()"); + } +#endif + +#ifdef CONFIG_PROC_FS + ioc->msg_calls++; +#endif + + /* + ** First coalesce the chunks and allocate I/O pdir space + ** + ** If this is one DMA stream, we can properly map using the + ** correct virtual address associated with each DMA page. + ** w/o this association, we wouldn't have coherent DMA! + ** Access to the virtual address is what forces a two pass algorithm. + */ + coalesced = sba_coalesce_chunks(ioc, sglist, nents); + + /* + ** Program the I/O Pdir + ** + ** map the virtual addresses to the I/O Pdir + ** o dma_address will contain the pdir index + ** o dma_len will contain the number of bytes to map + ** o address contains the virtual address. + */ + filled = sba_fill_pdir(ioc, sglist, nents); + +#ifdef ASSERT_PDIR_SANITY + if (sba_check_pdir(ioc,"Check after sba_map_sg()")) + { + sba_dump_sg(ioc, sglist, nents); + panic("Check after sba_map_sg()\n"); + } +#endif + + spin_unlock_irqrestore(&ioc->res_lock, flags); + + ASSERT(coalesced == filled); + DBG_RUN_SG("%s() DONE %d mappings\n", __FUNCTION__, filled); + + return filled; +} + + +/** + * sba_unmap_sg - unmap Scatter/Gather list + * @dev: instance of PCI owned by the driver that's asking. + * @sglist: array of buffer/length pairs + * @nents: number of entries in list + * @direction: R/W or both. + * + * See Documentation/DMA-mapping.txt + */ +void sba_unmap_sg(struct pci_dev *dev, struct scatterlist *sglist, int nents, + int direction) +{ + struct ioc *ioc; +#ifdef ASSERT_PDIR_SANITY + unsigned long flags; +#endif + + DBG_RUN_SG("%s() START %d entries, %p,%x\n", + __FUNCTION__, nents, sba_sg_buffer(sglist), sglist->length); + + ioc = GET_IOC(dev); + ASSERT(ioc); + +#ifdef CONFIG_PROC_FS + ioc->usg_calls++; +#endif + +#ifdef ASSERT_PDIR_SANITY + spin_lock_irqsave(&ioc->res_lock, flags); + sba_check_pdir(ioc,"Check before sba_unmap_sg()"); + spin_unlock_irqrestore(&ioc->res_lock, flags); +#endif + + while (sba_sg_len(sglist) && nents--) { + + sba_unmap_single(dev, (dma_addr_t)sba_sg_iova(sglist), + sba_sg_len(sglist), direction); +#ifdef CONFIG_PROC_FS + /* + ** This leaves inconsistent data in the stats, but we can't + ** tell which sg lists were mapped by map_single and which + ** were coalesced to a single entry. The stats are fun, + ** but speed is more important. + */ + ioc->usg_pages += (((u64)sba_sg_iova(sglist) & ~IOVP_MASK) + sba_sg_len(sglist) + IOVP_SIZE - 1) >> PAGE_SHIFT; +#endif + ++sglist; + } + + DBG_RUN_SG("%s() DONE (nents %d)\n", __FUNCTION__, nents); + +#ifdef ASSERT_PDIR_SANITY + spin_lock_irqsave(&ioc->res_lock, flags); + sba_check_pdir(ioc,"Check after sba_unmap_sg()"); + spin_unlock_irqrestore(&ioc->res_lock, flags); +#endif + +} + +unsigned long +sba_dma_address (struct scatterlist *sg) +{ + return ((unsigned long)sba_sg_iova(sg)); +} + +/************************************************************** +* +* Initialization and claim +* +***************************************************************/ + + +static void +sba_ioc_init(struct sba_device *sba_dev, struct ioc *ioc, int ioc_num) +{ + u32 iova_space_size, iova_space_mask; + void * pdir_base; + int pdir_size, iov_order, tcnfg; + + /* + ** Firmware programs the maximum IOV space size into the imask reg + */ + iova_space_size = ~(READ_REG(ioc->ioc_hpa + IOC_IMASK) & 0xFFFFFFFFUL) + 1; +#ifdef CONFIG_IA64_HP_PROTO + if (!iova_space_size) + iova_space_size = GB(1); +#endif + + /* + ** iov_order is always based on a 1GB IOVA space since we want to + ** turn on the other half for AGP GART. + */ + iov_order = get_order(iova_space_size >> (IOVP_SHIFT-PAGE_SHIFT)); + ioc->pdir_size = pdir_size = (iova_space_size/IOVP_SIZE) * sizeof(u64); + + DBG_INIT("%s() hpa 0x%lx IOV %dMB (%d bits) PDIR size 0x%0x\n", + __FUNCTION__, ioc->ioc_hpa, iova_space_size>>20, + iov_order + PAGE_SHIFT, ioc->pdir_size); + + /* FIXME : DMA HINTs not used */ + ioc->hint_shift_pdir = iov_order + PAGE_SHIFT; + ioc->hint_mask_pdir = ~(0x3 << (iov_order + PAGE_SHIFT)); + + ioc->pdir_base = + pdir_base = (void *) __get_free_pages(GFP_KERNEL, get_order(pdir_size)); + if (NULL == pdir_base) + { + panic(__FILE__ ":%s() could not allocate I/O Page Table\n", __FUNCTION__); + } + memset(pdir_base, 0, pdir_size); + + DBG_INIT("%s() pdir %p size %x hint_shift_pdir %x hint_mask_pdir %lx\n", + __FUNCTION__, pdir_base, pdir_size, + ioc->hint_shift_pdir, ioc->hint_mask_pdir); + + ASSERT((((unsigned long) pdir_base) & PAGE_MASK) == (unsigned long) pdir_base); + WRITE_REG(virt_to_phys(pdir_base), ioc->ioc_hpa + IOC_PDIR_BASE); + + DBG_INIT(" base %p\n", pdir_base); + + /* build IMASK for IOC and Elroy */ + iova_space_mask = 0xffffffff; + iova_space_mask <<= (iov_order + PAGE_SHIFT); + +#ifdef CONFIG_IA64_HP_PROTO + /* + ** REVISIT - this is a kludge, but we won't be supporting anything but + ** zx1 2.0 or greater for real. When fw is in shape, ibase will + ** be preprogrammed w/ the IOVA hole base and imask will give us + ** the size. + */ + if ((sba_dev->hw_rev & 0xFF) < 0x20) { + DBG_INIT("%s() Found SBA rev < 2.0, setting IOVA base to 0. This device will not be supported in the future.\n", __FUNCTION__); + ioc->ibase = 0x0; + } else +#endif + ioc->ibase = READ_REG(ioc->ioc_hpa + IOC_IBASE) & 0xFFFFFFFEUL; + + ioc->imask = iova_space_mask; /* save it */ + + DBG_INIT("%s() IOV base 0x%lx mask 0x%0lx\n", + __FUNCTION__, ioc->ibase, ioc->imask); + + /* + ** FIXME: Hint registers are programmed with default hint + ** values during boot, so hints should be sane even if we + ** can't reprogram them the way drivers want. + */ + + WRITE_REG(ioc->imask, ioc->ioc_hpa+IOC_IMASK); + + /* + ** Setting the upper bits makes checking for bypass addresses + ** a little faster later on. + */ + ioc->imask |= 0xFFFFFFFF00000000UL; + + /* Set I/O PDIR Page size to system page size */ + switch (PAGE_SHIFT) { + case 12: /* 4K */ + tcnfg = 0; + break; + case 13: /* 8K */ + tcnfg = 1; + break; + case 14: /* 16K */ + tcnfg = 2; + break; + case 16: /* 64K */ + tcnfg = 3; + break; + } + WRITE_REG(tcnfg, ioc->ioc_hpa+IOC_TCNFG); + + /* + ** Program the IOC's ibase and enable IOVA translation + ** Bit zero == enable bit. + */ + WRITE_REG(ioc->ibase | 1, ioc->ioc_hpa+IOC_IBASE); + + /* + ** Clear I/O TLB of any possible entries. + ** (Yes. This is a bit paranoid...but so what) + */ + WRITE_REG(0 | 31, ioc->ioc_hpa+IOC_PCOM); + + /* + ** If an AGP device is present, only use half of the IOV space + ** for PCI DMA. Unfortunately we can't know ahead of time + ** whether GART support will actually be used, for now we + ** can just key on an AGP device found in the system. + ** We program the next pdir index after we stop w/ a key for + ** the GART code to handshake on. + */ + if (SBA_GET_AGP(sba_dev)) { + DBG_INIT("%s() AGP Device found, reserving 512MB for GART support\n", __FUNCTION__); + ioc->pdir_size /= 2; + ((u64 *)pdir_base)[PDIR_INDEX(iova_space_size/2)] = 0x0000badbadc0ffeeULL; + } + + DBG_INIT("%s() DONE\n", __FUNCTION__); +} + + + +/************************************************************************** +** +** SBA initialization code (HW and SW) +** +** o identify SBA chip itself +** o FIXME: initialize DMA hints for reasonable defaults +** +**************************************************************************/ + +static void +sba_hw_init(struct sba_device *sba_dev) +{ + int i; + int num_ioc; + u64 dma_mask; + u32 func_id; + + /* + ** Identify the SBA so we can set the dma_mask. We can make a virtual + ** dma_mask of the memory subsystem such that devices not implmenting + ** a full 64bit mask might still be able to bypass efficiently. + */ + func_id = READ_REG(sba_dev->sba_hpa + SBA_FUNC_ID); + + if (func_id == ZX1_FUNC_ID_VALUE) { + dma_mask = 0xFFFFFFFFFFUL; + } else { + dma_mask = 0xFFFFFFFFFFFFFFFFUL; + } + + DBG_INIT("%s(): ioc->dma_mask == 0x%lx\n", __FUNCTION__, dma_mask); + + /* + ** Leaving in the multiple ioc code from parisc for the future, + ** currently there are no muli-ioc mckinley sbas + */ + sba_dev->ioc[0].ioc_hpa = SBA_IOC_OFFSET; + num_ioc = 1; + + sba_dev->num_ioc = num_ioc; + for (i = 0; i < num_ioc; i++) { + sba_dev->ioc[i].dma_mask = dma_mask; + sba_dev->ioc[i].ioc_hpa += sba_dev->sba_hpa; + sba_ioc_init(sba_dev, &(sba_dev->ioc[i]), i); + } +} + +static void +sba_common_init(struct sba_device *sba_dev) +{ + int i; + + /* add this one to the head of the list (order doesn't matter) + ** This will be useful for debugging - especially if we get coredumps + */ + sba_dev->next = sba_list; + sba_list = sba_dev; + sba_count++; + + for(i=0; i< sba_dev->num_ioc; i++) { + int res_size; + + /* resource map size dictated by pdir_size */ + res_size = sba_dev->ioc[i].pdir_size/sizeof(u64); /* entries */ + res_size >>= 3; /* convert bit count to byte count */ + DBG_INIT("%s() res_size 0x%x\n", + __FUNCTION__, res_size); + + sba_dev->ioc[i].res_size = res_size; + sba_dev->ioc[i].res_map = (char *) __get_free_pages(GFP_KERNEL, get_order(res_size)); + + if (NULL == sba_dev->ioc[i].res_map) + { + panic(__FILE__ ":%s() could not allocate resource map\n", __FUNCTION__ ); + } + + memset(sba_dev->ioc[i].res_map, 0, res_size); + /* next available IOVP - circular search */ + if ((sba_dev->hw_rev & 0xFF) >= 0x20) { + sba_dev->ioc[i].res_hint = (unsigned long *) + sba_dev->ioc[i].res_map; + } else { + u64 reserved_iov; + + /* Yet another 1.x hack */ + printk("zx1 1.x: Starting resource hint offset into IOV space to avoid initial zero value IOVA\n"); + sba_dev->ioc[i].res_hint = (unsigned long *) + &(sba_dev->ioc[i].res_map[L1_CACHE_BYTES]); + + sba_dev->ioc[i].res_map[0] = 0x1; + sba_dev->ioc[i].pdir_base[0] = 0x8000badbadc0ffeeULL; + + for (reserved_iov = 0xA0000 ; reserved_iov < 0xC0000 ; reserved_iov += IOVP_SIZE) { + u64 *res_ptr = sba_dev->ioc[i].res_map; + int index = PDIR_INDEX(reserved_iov); + int res_word; + u64 mask; + + res_word = (int)(index / BITS_PER_LONG); + mask = 0x1UL << (index - (res_word * BITS_PER_LONG)); + res_ptr[res_word] |= mask; + sba_dev->ioc[i].pdir_base[PDIR_INDEX(reserved_iov)] = (0x80000000000000FFULL | reserved_iov); + + } + } + +#ifdef ASSERT_PDIR_SANITY + /* Mark first bit busy - ie no IOVA 0 */ + sba_dev->ioc[i].res_map[0] = 0x1; + sba_dev->ioc[i].pdir_base[0] = 0x8000badbadc0ffeeULL; +#endif + + DBG_INIT("%s() %d res_map %x %p\n", __FUNCTION__, + i, res_size, (void *)sba_dev->ioc[i].res_map); + } + + sba_dev->sba_lock = SPIN_LOCK_UNLOCKED; +} + +#ifdef CONFIG_PROC_FS +static int sba_proc_info(char *buf, char **start, off_t offset, int len) +{ + struct sba_device *sba_dev = sba_list; + struct ioc *ioc = &sba_dev->ioc[0]; /* FIXME: Multi-IOC support! */ + int total_pages = (int) (ioc->res_size << 3); /* 8 bits per byte */ + unsigned long i = 0, avg = 0, min, max; + + sprintf(buf, "%s rev %d.%d\n", + "Hewlett Packard zx1 SBA", + ((sba_dev->hw_rev >> 4) & 0xF), + (sba_dev->hw_rev & 0xF) + ); + sprintf(buf, "%sIO PDIR size : %d bytes (%d entries)\n", + buf, + (int) ((ioc->res_size << 3) * sizeof(u64)), /* 8 bits/byte */ + total_pages); + + sprintf(buf, "%sIO PDIR entries : %ld free %ld used (%d%%)\n", buf, + total_pages - ioc->used_pages, ioc->used_pages, + (int) (ioc->used_pages * 100 / total_pages)); + + sprintf(buf, "%sResource bitmap : %d bytes (%d pages)\n", + buf, ioc->res_size, ioc->res_size << 3); /* 8 bits per byte */ + + min = max = ioc->avg_search[0]; + for (i = 0; i < SBA_SEARCH_SAMPLE; i++) { + avg += ioc->avg_search[i]; + if (ioc->avg_search[i] > max) max = ioc->avg_search[i]; + if (ioc->avg_search[i] < min) min = ioc->avg_search[i]; + } + avg /= SBA_SEARCH_SAMPLE; + sprintf(buf, "%s Bitmap search : %ld/%ld/%ld (min/avg/max CPU Cycles)\n", + buf, min, avg, max); + + sprintf(buf, "%spci_map_single(): %12ld calls %12ld pages (avg %d/1000)\n", + buf, ioc->msingle_calls, ioc->msingle_pages, + (int) ((ioc->msingle_pages * 1000)/ioc->msingle_calls)); +#ifdef ALLOW_IOV_BYPASS + sprintf(buf, "%spci_map_single(): %12ld bypasses\n", + buf, ioc->msingle_bypass); +#endif + + sprintf(buf, "%spci_unmap_single: %12ld calls %12ld pages (avg %d/1000)\n", + buf, ioc->usingle_calls, ioc->usingle_pages, + (int) ((ioc->usingle_pages * 1000)/ioc->usingle_calls)); +#ifdef ALLOW_IOV_BYPASS + sprintf(buf, "%spci_unmap_single: %12ld bypasses\n", + buf, ioc->usingle_bypass); +#endif + + sprintf(buf, "%spci_map_sg() : %12ld calls %12ld pages (avg %d/1000)\n", + buf, ioc->msg_calls, ioc->msg_pages, + (int) ((ioc->msg_pages * 1000)/ioc->msg_calls)); +#ifdef ALLOW_IOV_BYPASS + sprintf(buf, "%spci_map_sg() : %12ld bypasses\n", + buf, ioc->msg_bypass); +#endif + + sprintf(buf, "%spci_unmap_sg() : %12ld calls %12ld pages (avg %d/1000)\n", + buf, ioc->usg_calls, ioc->usg_pages, + (int) ((ioc->usg_pages * 1000)/ioc->usg_calls)); + + return strlen(buf); +} + +static int +sba_resource_map(char *buf, char **start, off_t offset, int len) +{ + struct ioc *ioc = sba_list->ioc; /* FIXME: Multi-IOC support! */ + unsigned int *res_ptr = (unsigned int *)ioc->res_map; + int i; + + buf[0] = '\0'; + for(i = 0; i < (ioc->res_size / sizeof(unsigned int)); ++i, ++res_ptr) { + if ((i & 7) == 0) + strcat(buf,"\n "); + sprintf(buf, "%s %08x", buf, *res_ptr); + } + strcat(buf, "\n"); + + return strlen(buf); +} +#endif + +/* +** Determine if sba should claim this chip (return 0) or not (return 1). +** If so, initialize the chip and tell other partners in crime they +** have work to do. +*/ +void __init sba_init(void) +{ + struct sba_device *sba_dev; + u32 func_id, hw_rev; + u32 *func_offset = NULL; + int i, agp_found = 0; + static char sba_rev[6]; + struct pci_dev *device = NULL; + u64 hpa = 0; + + if (!(device = pci_find_device(PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_ZX1_SBA, NULL))) + return; + + for (i = 0; i < PCI_NUM_RESOURCES; i++) { + if (pci_resource_flags(device, i) == IORESOURCE_MEM) { + hpa = ioremap(pci_resource_start(device, i), + pci_resource_len(device, i)); + break; + } + } + + func_id = READ_REG(hpa + SBA_FUNC_ID); + + if (func_id == ZX1_FUNC_ID_VALUE) { + (void)strcpy(sba_rev, "zx1"); + func_offset = zx1_func_offsets; + } else { + return; + } + + /* Read HW Rev First */ + hw_rev = READ_REG(hpa + SBA_FCLASS) & 0xFFUL; + + /* + * Not all revision registers of the chipset are updated on every + * turn. Must scan through all functions looking for the highest rev + */ + if (func_offset) { + for (i = 0 ; func_offset[i] != -1 ; i++) { + u32 func_rev; + + func_rev = READ_REG(hpa + SBA_FCLASS + func_offset[i]) & 0xFFUL; + DBG_INIT("%s() func offset: 0x%x rev: 0x%x\n", + __FUNCTION__, func_offset[i], func_rev); + if (func_rev > hw_rev) + hw_rev = func_rev; + } + } + + printk(KERN_INFO "%s found %s %d.%d at %s, HPA 0x%lx\n", DRIVER_NAME, + sba_rev, ((hw_rev >> 4) & 0xF), (hw_rev & 0xF), + device->slot_name, hpa); + + if ((hw_rev & 0xFF) < 0x20) { + printk(KERN_INFO "%s WARNING rev 2.0 or greater will be required for IO MMU support in the future\n", DRIVER_NAME); +#ifndef CONFIG_IA64_HP_PROTO + panic("%s: CONFIG_IA64_HP_PROTO MUST be enabled to support SBA rev less than 2.0", DRIVER_NAME); +#endif + } + + sba_dev = kmalloc(sizeof(struct sba_device), GFP_KERNEL); + if (NULL == sba_dev) { + printk(KERN_ERR DRIVER_NAME " - couldn't alloc sba_device\n"); + return; + } + + memset(sba_dev, 0, sizeof(struct sba_device)); + + for(i=0; iioc[i].res_lock)); + + sba_dev->hw_rev = hw_rev; + sba_dev->sba_hpa = hpa; + + /* + * We need to check for an AGP device, if we find one, then only + * use part of the IOVA space for PCI DMA, the rest is for GART. + * REVISIT for multiple IOC. + */ + pci_for_each_dev(device) + agp_found |= pci_find_capability(device, PCI_CAP_ID_AGP); + + if (agp_found && reserve_sba_gart) + SBA_SET_AGP(sba_dev); + + sba_hw_init(sba_dev); + sba_common_init(sba_dev); + +#ifdef CONFIG_PROC_FS + { + struct proc_dir_entry * proc_mckinley_root; + + proc_mckinley_root = proc_mkdir("bus/mckinley",0); + create_proc_info_entry(sba_rev, 0, proc_mckinley_root, sba_proc_info); + create_proc_info_entry("bitmap", 0, proc_mckinley_root, sba_resource_map); + } +#endif +} + +static int __init +nosbagart (char *str) +{ + reserve_sba_gart = 0; + return 1; +} + +__setup("nosbagart",nosbagart); + +EXPORT_SYMBOL(sba_init); +EXPORT_SYMBOL(sba_map_single); +EXPORT_SYMBOL(sba_unmap_single); +EXPORT_SYMBOL(sba_map_sg); +EXPORT_SYMBOL(sba_unmap_sg); +EXPORT_SYMBOL(sba_dma_address); +EXPORT_SYMBOL(sba_alloc_consistent); +EXPORT_SYMBOL(sba_free_consistent); diff -Nru a/arch/ia64/hp/hpsim_console.c b/arch/ia64/hp/hpsim_console.c --- a/arch/ia64/hp/hpsim_console.c Mon Apr 15 15:07:57 2002 +++ /dev/null Wed Dec 31 16:00:00 1969 @@ -1,64 +0,0 @@ -/* - * Platform dependent support for HP simulator. - * - * Copyright (C) 1998, 1999, 2002 Hewlett-Packard Co - * David Mosberger-Tang - * Copyright (C) 1999 Vijay Chander - */ -#include - -#include -#include -#include -#include -#include -#include -#include -#include - -#include -#include -#include -#include -#include -#include - -#include "hpsim_ssc.h" - -static int simcons_init (struct console *, char *); -static void simcons_write (struct console *, const char *, unsigned); -static kdev_t simcons_console_device (struct console *); - -struct console hpsim_cons = { - name: "simcons", - write: simcons_write, - device: simcons_console_device, - setup: simcons_init, - flags: CON_PRINTBUFFER, - index: -1, -}; - -static int -simcons_init (struct console *cons, char *options) -{ - return 0; -} - -static void -simcons_write (struct console *cons, const char *buf, unsigned count) -{ - unsigned long ch; - - while (count-- > 0) { - ch = *buf++; - ia64_ssc(ch, 0, 0, 0, SSC_PUTCHAR); - if (ch == '\n') - ia64_ssc('\r', 0, 0, 0, SSC_PUTCHAR); - } -} - -static kdev_t -simcons_console_device (struct console *c) -{ - return mk_kdev(TTY_MAJOR, 64 + c->index); -} diff -Nru a/arch/ia64/hp/hpsim_irq.c b/arch/ia64/hp/hpsim_irq.c --- a/arch/ia64/hp/hpsim_irq.c Mon Apr 15 15:07:57 2002 +++ /dev/null Wed Dec 31 16:00:00 1969 @@ -1,46 +0,0 @@ -/* - * Platform dependent support for HP simulator. - * - * Copyright (C) 1998-2001 Hewlett-Packard Co - * Copyright (C) 1998-2001 David Mosberger-Tang - */ - -#include -#include -#include -#include - -static unsigned int -hpsim_irq_startup (unsigned int irq) -{ - return 0; -} - -static void -hpsim_irq_noop (unsigned int irq) -{ -} - -static struct hw_interrupt_type irq_type_hp_sim = { - typename: "hpsim", - startup: hpsim_irq_startup, - shutdown: hpsim_irq_noop, - enable: hpsim_irq_noop, - disable: hpsim_irq_noop, - ack: hpsim_irq_noop, - end: hpsim_irq_noop, - set_affinity: (void (*)(unsigned int, unsigned long)) hpsim_irq_noop, -}; - -void __init -hpsim_irq_init (void) -{ - irq_desc_t *idesc; - int i; - - for (i = 0; i < NR_IRQS; ++i) { - idesc = irq_desc(i); - if (idesc->handler == &no_irq_type) - idesc->handler = &irq_type_hp_sim; - } -} diff -Nru a/arch/ia64/hp/hpsim_machvec.c b/arch/ia64/hp/hpsim_machvec.c --- a/arch/ia64/hp/hpsim_machvec.c Mon Apr 15 15:07:57 2002 +++ /dev/null Wed Dec 31 16:00:00 1969 @@ -1,2 +0,0 @@ -#define MACHVEC_PLATFORM_NAME hpsim -#include diff -Nru a/arch/ia64/hp/hpsim_setup.c b/arch/ia64/hp/hpsim_setup.c --- a/arch/ia64/hp/hpsim_setup.c Mon Apr 15 15:07:57 2002 +++ /dev/null Wed Dec 31 16:00:00 1969 @@ -1,58 +0,0 @@ -/* - * Platform dependent support for HP simulator. - * - * Copyright (C) 1998, 1999 Hewlett-Packard Co - * Copyright (C) 1998, 1999 David Mosberger-Tang - * Copyright (C) 1999 Vijay Chander - */ -#include -#include -#include -#include -#include -#include -#include - -#include -#include -#include -#include -#include -#include - -#include "hpsim_ssc.h" - -extern struct console hpsim_cons; - -/* - * Simulator system call. - */ -asm (".text\n" - ".align 32\n" - ".global ia64_ssc\n" - ".proc ia64_ssc\n" - "ia64_ssc:\n" - "mov r15=r36\n" - "break 0x80001\n" - "br.ret.sptk.many rp\n" - ".endp\n"); - -void -ia64_ssc_connect_irq (long intr, long irq) -{ - ia64_ssc(intr, irq, 0, 0, SSC_CONNECT_INTERRUPT); -} - -void -ia64_ctl_trace (long on) -{ - ia64_ssc(on, 0, 0, 0, SSC_CTL_TRACE); -} - -void __init -hpsim_setup (char **cmdline_p) -{ - ROOT_DEV = to_kdev_t(0x0801); /* default to first SCSI drive */ - - register_console (&hpsim_cons); -} diff -Nru a/arch/ia64/hp/hpsim_ssc.h b/arch/ia64/hp/hpsim_ssc.h --- a/arch/ia64/hp/hpsim_ssc.h Mon Apr 15 15:07:57 2002 +++ /dev/null Wed Dec 31 16:00:00 1969 @@ -1,36 +0,0 @@ -/* - * Platform dependent support for HP simulator. - * - * Copyright (C) 1998, 1999 Hewlett-Packard Co - * Copyright (C) 1998, 1999 David Mosberger-Tang - * Copyright (C) 1999 Vijay Chander - */ -#ifndef _IA64_PLATFORM_HPSIM_SSC_H -#define _IA64_PLATFORM_HPSIM_SSC_H - -/* Simulator system calls: */ - -#define SSC_CONSOLE_INIT 20 -#define SSC_GETCHAR 21 -#define SSC_PUTCHAR 31 -#define SSC_CONNECT_INTERRUPT 58 -#define SSC_GENERATE_INTERRUPT 59 -#define SSC_SET_PERIODIC_INTERRUPT 60 -#define SSC_GET_RTC 65 -#define SSC_EXIT 66 -#define SSC_LOAD_SYMBOLS 69 -#define SSC_GET_TOD 74 -#define SSC_CTL_TRACE 76 - -#define SSC_NETDEV_PROBE 100 -#define SSC_NETDEV_SEND 101 -#define SSC_NETDEV_RECV 102 -#define SSC_NETDEV_ATTACH 103 -#define SSC_NETDEV_DETACH 104 - -/* - * Simulator system call. - */ -extern long ia64_ssc (long arg0, long arg1, long arg2, long arg3, int nr); - -#endif /* _IA64_PLATFORM_HPSIM_SSC_H */ diff -Nru a/arch/ia64/hp/sim/Makefile b/arch/ia64/hp/sim/Makefile --- /dev/null Wed Dec 31 16:00:00 1969 +++ b/arch/ia64/hp/sim/Makefile Mon Apr 15 15:07:57 2002 @@ -0,0 +1,19 @@ +# +# ia64/platform/hp/sim/Makefile +# +# Copyright (C) 2002 Hewlett-Packard Co. +# David Mosberger-Tang +# Copyright (C) 1999 Silicon Graphics, Inc. +# Copyright (C) Srinivasa Thirumalachar (sprasad@engr.sgi.com) +# + +O_TARGET := sim.o + +obj-y := hpsim_console.o hpsim_irq.o hpsim_setup.o +obj-$(CONFIG_IA64_GENERIC) += hpsim_machvec.o + +obj-$(CONFIG_HP_SIMETH) += simeth.o +obj-$(CONFIG_HP_SIMSERIAL) += simserial.o +obj-$(CONFIG_HP_SIMSCSI) += simscsi.o + +include $(TOPDIR)/Rules.make diff -Nru a/arch/ia64/hp/sim/hpsim_console.c b/arch/ia64/hp/sim/hpsim_console.c --- /dev/null Wed Dec 31 16:00:00 1969 +++ b/arch/ia64/hp/sim/hpsim_console.c Mon Apr 15 15:07:57 2002 @@ -0,0 +1,64 @@ +/* + * Platform dependent support for HP simulator. + * + * Copyright (C) 1998, 1999, 2002 Hewlett-Packard Co + * David Mosberger-Tang + * Copyright (C) 1999 Vijay Chander + */ +#include + +#include +#include +#include +#include +#include +#include +#include +#include + +#include +#include +#include +#include +#include +#include + +#include "hpsim_ssc.h" + +static int simcons_init (struct console *, char *); +static void simcons_write (struct console *, const char *, unsigned); +static kdev_t simcons_console_device (struct console *); + +struct console hpsim_cons = { + name: "simcons", + write: simcons_write, + device: simcons_console_device, + setup: simcons_init, + flags: CON_PRINTBUFFER, + index: -1, +}; + +static int +simcons_init (struct console *cons, char *options) +{ + return 0; +} + +static void +simcons_write (struct console *cons, const char *buf, unsigned count) +{ + unsigned long ch; + + while (count-- > 0) { + ch = *buf++; + ia64_ssc(ch, 0, 0, 0, SSC_PUTCHAR); + if (ch == '\n') + ia64_ssc('\r', 0, 0, 0, SSC_PUTCHAR); + } +} + +static kdev_t +simcons_console_device (struct console *c) +{ + return mk_kdev(TTY_MAJOR, 64 + c->index); +} diff -Nru a/arch/ia64/hp/sim/hpsim_irq.c b/arch/ia64/hp/sim/hpsim_irq.c --- /dev/null Wed Dec 31 16:00:00 1969 +++ b/arch/ia64/hp/sim/hpsim_irq.c Mon Apr 15 15:07:57 2002 @@ -0,0 +1,46 @@ +/* + * Platform dependent support for HP simulator. + * + * Copyright (C) 1998-2001 Hewlett-Packard Co + * Copyright (C) 1998-2001 David Mosberger-Tang + */ + +#include +#include +#include +#include + +static unsigned int +hpsim_irq_startup (unsigned int irq) +{ + return 0; +} + +static void +hpsim_irq_noop (unsigned int irq) +{ +} + +static struct hw_interrupt_type irq_type_hp_sim = { + typename: "hpsim", + startup: hpsim_irq_startup, + shutdown: hpsim_irq_noop, + enable: hpsim_irq_noop, + disable: hpsim_irq_noop, + ack: hpsim_irq_noop, + end: hpsim_irq_noop, + set_affinity: (void (*)(unsigned int, unsigned long)) hpsim_irq_noop, +}; + +void __init +hpsim_irq_init (void) +{ + irq_desc_t *idesc; + int i; + + for (i = 0; i < NR_IRQS; ++i) { + idesc = irq_desc(i); + if (idesc->handler == &no_irq_type) + idesc->handler = &irq_type_hp_sim; + } +} diff -Nru a/arch/ia64/hp/sim/hpsim_machvec.c b/arch/ia64/hp/sim/hpsim_machvec.c --- /dev/null Wed Dec 31 16:00:00 1969 +++ b/arch/ia64/hp/sim/hpsim_machvec.c Mon Apr 15 15:07:57 2002 @@ -0,0 +1,2 @@ +#define MACHVEC_PLATFORM_NAME hpsim +#include diff -Nru a/arch/ia64/hp/sim/hpsim_setup.c b/arch/ia64/hp/sim/hpsim_setup.c --- /dev/null Wed Dec 31 16:00:00 1969 +++ b/arch/ia64/hp/sim/hpsim_setup.c Mon Apr 15 15:07:57 2002 @@ -0,0 +1,58 @@ +/* + * Platform dependent support for HP simulator. + * + * Copyright (C) 1998, 1999 Hewlett-Packard Co + * Copyright (C) 1998, 1999 David Mosberger-Tang + * Copyright (C) 1999 Vijay Chander + */ +#include +#include +#include +#include +#include +#include +#include + +#include +#include +#include +#include +#include +#include + +#include "hpsim_ssc.h" + +extern struct console hpsim_cons; + +/* + * Simulator system call. + */ +asm (".text\n" + ".align 32\n" + ".global ia64_ssc\n" + ".proc ia64_ssc\n" + "ia64_ssc:\n" + "mov r15=r36\n" + "break 0x80001\n" + "br.ret.sptk.many rp\n" + ".endp\n"); + +void +ia64_ssc_connect_irq (long intr, long irq) +{ + ia64_ssc(intr, irq, 0, 0, SSC_CONNECT_INTERRUPT); +} + +void +ia64_ctl_trace (long on) +{ + ia64_ssc(on, 0, 0, 0, SSC_CTL_TRACE); +} + +void __init +hpsim_setup (char **cmdline_p) +{ + ROOT_DEV = to_kdev_t(0x0801); /* default to first SCSI drive */ + + register_console (&hpsim_cons); +} diff -Nru a/arch/ia64/hp/sim/hpsim_ssc.h b/arch/ia64/hp/sim/hpsim_ssc.h --- /dev/null Wed Dec 31 16:00:00 1969 +++ b/arch/ia64/hp/sim/hpsim_ssc.h Mon Apr 15 15:07:57 2002 @@ -0,0 +1,36 @@ +/* + * Platform dependent support for HP simulator. + * + * Copyright (C) 1998, 1999 Hewlett-Packard Co + * Copyright (C) 1998, 1999 David Mosberger-Tang + * Copyright (C) 1999 Vijay Chander + */ +#ifndef _IA64_PLATFORM_HPSIM_SSC_H +#define _IA64_PLATFORM_HPSIM_SSC_H + +/* Simulator system calls: */ + +#define SSC_CONSOLE_INIT 20 +#define SSC_GETCHAR 21 +#define SSC_PUTCHAR 31 +#define SSC_CONNECT_INTERRUPT 58 +#define SSC_GENERATE_INTERRUPT 59 +#define SSC_SET_PERIODIC_INTERRUPT 60 +#define SSC_GET_RTC 65 +#define SSC_EXIT 66 +#define SSC_LOAD_SYMBOLS 69 +#define SSC_GET_TOD 74 +#define SSC_CTL_TRACE 76 + +#define SSC_NETDEV_PROBE 100 +#define SSC_NETDEV_SEND 101 +#define SSC_NETDEV_RECV 102 +#define SSC_NETDEV_ATTACH 103 +#define SSC_NETDEV_DETACH 104 + +/* + * Simulator system call. + */ +extern long ia64_ssc (long arg0, long arg1, long arg2, long arg3, int nr); + +#endif /* _IA64_PLATFORM_HPSIM_SSC_H */ diff -Nru a/arch/ia64/hp/sim/simeth.c b/arch/ia64/hp/sim/simeth.c --- /dev/null Wed Dec 31 16:00:00 1969 +++ b/arch/ia64/hp/sim/simeth.c Mon Apr 15 15:07:56 2002 @@ -0,0 +1,533 @@ +/* + * Simulated Ethernet Driver + * + * Copyright (C) 1999-2001 Hewlett-Packard Co + * Stephane Eranian + */ +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include + +#define SIMETH_RECV_MAX 10 + +/* + * Maximum possible received frame for Ethernet. + * We preallocate an sk_buff of that size to avoid costly + * memcpy for temporary buffer into sk_buff. We do basically + * what's done in other drivers, like eepro with a ring. + * The difference is, of course, that we don't have real DMA !!! + */ +#define SIMETH_FRAME_SIZE ETH_FRAME_LEN + + +#define SSC_NETDEV_PROBE 100 +#define SSC_NETDEV_SEND 101 +#define SSC_NETDEV_RECV 102 +#define SSC_NETDEV_ATTACH 103 +#define SSC_NETDEV_DETACH 104 + +#define NETWORK_INTR 8 + +struct simeth_local { + struct net_device_stats stats; + int simfd; /* descriptor in the simulator */ +}; + +static int simeth_probe1(void); +static int simeth_open(struct net_device *dev); +static int simeth_close(struct net_device *dev); +static int simeth_tx(struct sk_buff *skb, struct net_device *dev); +static int simeth_rx(struct net_device *dev); +static struct net_device_stats *simeth_get_stats(struct net_device *dev); +static void simeth_interrupt(int irq, void *dev_id, struct pt_regs * regs); +static void set_multicast_list(struct net_device *dev); +static int simeth_device_event(struct notifier_block *this,unsigned long event, void *ptr); + +static char *simeth_version="0.3"; + +/* + * This variable is used to establish a mapping between the Linux/ia64 kernel + * and the host linux kernel. + * + * As of today, we support only one card, even though most of the code + * is ready for many more. The mapping is then: + * linux/ia64 -> linux/x86 + * eth0 -> eth1 + * + * In the future, we some string operations, we could easily support up + * to 10 cards (0-9). + * + * The default mapping can be changed on the kernel command line by + * specifying simeth=ethX (or whatever string you want). + */ +static char *simeth_device="eth0"; /* default host interface to use */ + + + +static volatile unsigned int card_count; /* how many cards "found" so far */ +static int simeth_debug; /* set to 1 to get debug information */ + +/* + * Used to catch IFF_UP & IFF_DOWN events + */ +static struct notifier_block simeth_dev_notifier = { + simeth_device_event, + 0 +}; + + +/* + * Function used when using a kernel command line option. + * + * Format: simeth=interface_name (like eth0) + */ +static int __init +simeth_setup(char *str) +{ + simeth_device = str; + return 1; +} + +__setup("simeth=", simeth_setup); + +/* + * Function used to probe for simeth devices when not installed + * as a loadable module + */ + +int __init +simeth_probe (void) +{ + int r; + + printk("simeth: v%s\n", simeth_version); + + r = simeth_probe1(); + + if (r == 0) register_netdevice_notifier(&simeth_dev_notifier); + + return r; +} + +extern long ia64_ssc (long, long, long, long, int); +extern void ia64_ssc_connect_irq (long intr, long irq); + +static inline int +netdev_probe(char *name, unsigned char *ether) +{ + return ia64_ssc(__pa(name), __pa(ether), 0,0, SSC_NETDEV_PROBE); +} + + +static inline int +netdev_connect(int irq) +{ + /* XXX Fix me + * this does not support multiple cards + * also no return value + */ + ia64_ssc_connect_irq(NETWORK_INTR, irq); + return 0; +} + +static inline int +netdev_attach(int fd, int irq, unsigned int ipaddr) +{ + /* this puts the host interface in the right mode (start interupting) */ + return ia64_ssc(fd, ipaddr, 0,0, SSC_NETDEV_ATTACH); +} + + +static inline int +netdev_detach(int fd) +{ + /* + * inactivate the host interface (don't interrupt anymore) */ + return ia64_ssc(fd, 0,0,0, SSC_NETDEV_DETACH); +} + +static inline int +netdev_send(int fd, unsigned char *buf, unsigned int len) +{ + return ia64_ssc(fd, __pa(buf), len, 0, SSC_NETDEV_SEND); +} + +static inline int +netdev_read(int fd, unsigned char *buf, unsigned int len) +{ + return ia64_ssc(fd, __pa(buf), len, 0, SSC_NETDEV_RECV); +} + +/* + * Function shared with module code, so cannot be in init section + * + * So far this function "detects" only one card (test_&_set) but could + * be extended easily. + * + * Return: + * - -ENODEV is no device found + * - -ENOMEM is no more memory + * - 0 otherwise + */ +static int +simeth_probe1(void) +{ + unsigned char mac_addr[ETH_ALEN]; + struct simeth_local *local; + struct net_device *dev; + int fd, i; + + /* + * XXX Fix me + * let's support just one card for now + */ + if (test_and_set_bit(0, &card_count)) + return -ENODEV; + + /* + * check with the simulator for the device + */ + fd = netdev_probe(simeth_device, mac_addr); + if (fd == -1) + return -ENODEV; + + dev = init_etherdev(NULL, sizeof(struct simeth_local)); + if (!dev) + return -ENOMEM; + + memcpy(dev->dev_addr, mac_addr, sizeof(mac_addr)); + + dev->irq = ia64_alloc_irq(); + + /* + * attach the interrupt in the simulator, this does enable interrupts + * until a netdev_attach() is called + */ + netdev_connect(dev->irq); + + memset(dev->priv, 0, sizeof(struct simeth_local)); + + local = dev->priv; + local->simfd = fd; /* keep track of underlying file descriptor */ + + dev->open = simeth_open; + dev->stop = simeth_close; + dev->hard_start_xmit = simeth_tx; + dev->get_stats = simeth_get_stats; + dev->set_multicast_list = set_multicast_list; /* no yet used */ + + /* Fill in the fields of the device structure with ethernet-generic values. */ + ether_setup(dev); + + printk("%s: hosteth=%s simfd=%d, HwAddr", dev->name, simeth_device, local->simfd); + for(i = 0; i < ETH_ALEN; i++) { + printk(" %2.2x", dev->dev_addr[i]); + } + printk(", IRQ %d\n", dev->irq); + + return 0; +} + +/* + * actually binds the device to an interrupt vector + */ +static int +simeth_open(struct net_device *dev) +{ + if (request_irq(dev->irq, simeth_interrupt, 0, "simeth", dev)) { + printk ("simeth: unable to get IRQ %d.\n", dev->irq); + return -EAGAIN; + } + + netif_start_queue(dev); + + return 0; +} + +/* copied from lapbether.c */ +static __inline__ int dev_is_ethdev(struct net_device *dev) +{ + return ( dev->type == ARPHRD_ETHER && strncmp(dev->name, "dummy", 5)); +} + + +/* + * Handler for IFF_UP or IFF_DOWN + * + * The reason for that is that we don't want to be interrupted when the + * interface is down. There is no way to unconnect in the simualtor. Instead + * we use this function to shutdown packet processing in the frame filter + * in the simulator. Thus no interrupts are generated + * + * + * That's also the place where we pass the IP address of this device to the + * simulator so that that we can start filtering packets for it + * + * There may be a better way of doing this, but I don't know which yet. + */ +static int +simeth_device_event(struct notifier_block *this,unsigned long event, void *ptr) +{ + struct net_device *dev = (struct net_device *)ptr; + struct simeth_local *local; + struct in_device *in_dev; + struct in_ifaddr **ifap = NULL; + struct in_ifaddr *ifa = NULL; + int r; + + + if ( ! dev ) { + printk(KERN_WARNING "simeth_device_event dev=0\n"); + return NOTIFY_DONE; + } + + if ( event != NETDEV_UP && event != NETDEV_DOWN ) return NOTIFY_DONE; + + /* + * Check whether or not it's for an ethernet device + * + * XXX Fixme: This works only as long as we support one + * type of ethernet device. + */ + if ( !dev_is_ethdev(dev) ) return NOTIFY_DONE; + + if ((in_dev=dev->ip_ptr) != NULL) { + for (ifap=&in_dev->ifa_list; (ifa=*ifap) != NULL; ifap=&ifa->ifa_next) + if (strcmp(dev->name, ifa->ifa_label) == 0) break; + } + if ( ifa == NULL ) { + printk("simeth_open: can't find device %s's ifa\n", dev->name); + return NOTIFY_DONE; + } + + printk("simeth_device_event: %s ipaddr=0x%x\n", dev->name, htonl(ifa->ifa_local)); + + /* + * XXX Fix me + * if the device was up, and we're simply reconfiguring it, not sure + * we get DOWN then UP. + */ + + local = dev->priv; + /* now do it for real */ + r = event == NETDEV_UP ? + netdev_attach(local->simfd, dev->irq, htonl(ifa->ifa_local)): + netdev_detach(local->simfd); + + printk("simeth: netdev_attach/detach: event=%s ->%d\n", event == NETDEV_UP ? "attach":"detach", r); + + return NOTIFY_DONE; +} + +static int +simeth_close(struct net_device *dev) +{ + netif_stop_queue(dev); + + free_irq(dev->irq, dev); + + return 0; +} + +/* + * Only used for debug + */ +static void +frame_print(unsigned char *from, unsigned char *frame, int len) +{ + int i; + + printk("%s: (%d) %02x", from, len, frame[0] & 0xff); + for(i=1; i < 6; i++ ) { + printk(":%02x", frame[i] &0xff); + } + printk(" %2x", frame[6] &0xff); + for(i=7; i < 12; i++ ) { + printk(":%02x", frame[i] &0xff); + } + printk(" [%02x%02x]\n", frame[12], frame[13]); + + for(i=14; i < len; i++ ) { + printk("%02x ", frame[i] &0xff); + if ( (i%10)==0) printk("\n"); + } + printk("\n"); +} + + +/* + * Function used to transmit of frame, very last one on the path before + * going to the simulator. + */ +static int +simeth_tx(struct sk_buff *skb, struct net_device *dev) +{ + struct simeth_local *local = (struct simeth_local *)dev->priv; + +#if 0 + /* ensure we have at least ETH_ZLEN bytes (min frame size) */ + unsigned int length = ETH_ZLEN < skb->len ? skb->len : ETH_ZLEN; + /* Where do the extra padding bytes comes from inthe skbuff ? */ +#else + /* the real driver in the host system is going to take care of that + * or maybe it's the NIC itself. + */ + unsigned int length = skb->len; +#endif + + local->stats.tx_bytes += skb->len; + local->stats.tx_packets++; + + + if (simeth_debug > 5) frame_print("simeth_tx", skb->data, length); + + netdev_send(local->simfd, skb->data, length); + + /* + * we are synchronous on write, so we don't simulate a + * trasnmit complete interrupt, thus we don't need to arm a tx + */ + + dev_kfree_skb(skb); + return 0; +} + +static inline struct sk_buff * +make_new_skb(struct net_device *dev) +{ + struct sk_buff *nskb; + + /* + * The +2 is used to make sure that the IP header is nicely + * aligned (on 4byte boundary I assume 14+2=16) + */ + nskb = dev_alloc_skb(SIMETH_FRAME_SIZE + 2); + if ( nskb == NULL ) { + printk(KERN_NOTICE "%s: memory squeeze. dropping packet.\n", dev->name); + return NULL; + } + nskb->dev = dev; + + skb_reserve(nskb, 2); /* Align IP on 16 byte boundaries */ + + skb_put(nskb,SIMETH_FRAME_SIZE); + + return nskb; +} + +/* + * called from interrupt handler to process a received frame + */ +static int +simeth_rx(struct net_device *dev) +{ + struct simeth_local *local; + struct sk_buff *skb; + int len; + int rcv_count = SIMETH_RECV_MAX; + + local = (struct simeth_local *)dev->priv; + /* + * the loop concept has been borrowed from other drivers + * looks to me like it's a throttling thing to avoid pushing to many + * packets at one time into the stack. Making sure we can process them + * upstream and make forward progress overall + */ + do { + if ( (skb=make_new_skb(dev)) == NULL ) { + printk(KERN_NOTICE "%s: memory squeeze. dropping packet.\n", dev->name); + local->stats.rx_dropped++; + return 0; + } + /* + * Read only one frame at a time + */ + len = netdev_read(local->simfd, skb->data, SIMETH_FRAME_SIZE); + if ( len == 0 ) { + if ( simeth_debug > 0 ) printk(KERN_WARNING "%s: count=%d netdev_read=0\n", dev->name, SIMETH_RECV_MAX-rcv_count); + break; + } +#if 0 + /* + * XXX Fix me + * Should really do a csum+copy here + */ + memcpy(skb->data, frame, len); +#endif + skb->protocol = eth_type_trans(skb, dev); + + if ( simeth_debug > 6 ) frame_print("simeth_rx", skb->data, len); + + /* + * push the packet up & trigger software interrupt + */ + netif_rx(skb); + + local->stats.rx_packets++; + local->stats.rx_bytes += len; + + } while ( --rcv_count ); + + return len; /* 0 = nothing left to read, otherwise, we can try again */ +} + +/* + * Interrupt handler (Yes, we can do it too !!!) + */ +static void +simeth_interrupt(int irq, void *dev_id, struct pt_regs * regs) +{ + struct net_device *dev = dev_id; + + if ( dev == NULL ) { + printk(KERN_WARNING "simeth: irq %d for unknown device\n", irq); + return; + } + + /* + * very simple loop because we get interrupts only when receving + */ + while (simeth_rx(dev)); +} + +static struct net_device_stats * +simeth_get_stats(struct net_device *dev) +{ + struct simeth_local *local = (struct simeth_local *) dev->priv; + + return &local->stats; +} + +/* fake multicast ability */ +static void +set_multicast_list(struct net_device *dev) +{ + printk(KERN_WARNING "%s: set_multicast_list called\n", dev->name); +} + +#ifdef CONFIG_NET_FASTROUTE +static int +simeth_accept_fastpath(struct net_device *dev, struct dst_entry *dst) +{ + printk(KERN_WARNING "%s: simeth_accept_fastpath called\n", dev->name); + return -1; +} +#endif + +__initcall(simeth_probe); diff -Nru a/arch/ia64/hp/sim/simscsi.c b/arch/ia64/hp/sim/simscsi.c --- /dev/null Wed Dec 31 16:00:00 1969 +++ b/arch/ia64/hp/sim/simscsi.c Mon Apr 15 15:07:57 2002 @@ -0,0 +1,368 @@ +/* + * Simulated SCSI driver. + * + * Copyright (C) 1999, 2001-2002 Hewlett-Packard Co + * David Mosberger-Tang + * Stephane Eranian + * + * 02/01/15 David Mosberger Updated for v2.5.1 + * 99/12/18 David Mosberger Added support for READ10/WRITE10 needed by linux v2.3.33 + */ +#include +#include +#include +#include +#include +#include + +#include + +#include + +#include "../drivers/scsi/scsi.h" +#include "../drivers/scsi/sd.h" +#include "../drivers/scsi/hosts.h" +#include "simscsi.h" + +#define DEBUG_SIMSCSI 1 + +/* Simulator system calls: */ + +#define SSC_OPEN 50 +#define SSC_CLOSE 51 +#define SSC_READ 52 +#define SSC_WRITE 53 +#define SSC_GET_COMPLETION 54 +#define SSC_WAIT_COMPLETION 55 + +#define SSC_WRITE_ACCESS 2 +#define SSC_READ_ACCESS 1 + +#if DEBUG_SIMSCSI + int simscsi_debug; +# define DBG simscsi_debug +#else +# define DBG 0 +#endif + +static struct Scsi_Host *host; + +static void simscsi_interrupt (unsigned long val); +DECLARE_TASKLET(simscsi_tasklet, simscsi_interrupt, 0); + +struct disk_req { + unsigned long addr; + unsigned len; +}; + +struct disk_stat { + int fd; + unsigned count; +}; + +extern long ia64_ssc (long arg0, long arg1, long arg2, long arg3, int nr); + +static int desc[8] = { -1, -1, -1, -1, -1, -1, -1, -1 }; + +static struct queue_entry { + Scsi_Cmnd *sc; +} queue[SIMSCSI_REQ_QUEUE_LEN]; + +static int rd, wr; +static atomic_t num_reqs = ATOMIC_INIT(0); + +/* base name for default disks */ +static char *simscsi_root = DEFAULT_SIMSCSI_ROOT; + +#define MAX_ROOT_LEN 128 + +/* + * used to setup a new base for disk images + * to use /foo/bar/disk[a-z] as disk images + * you have to specify simscsi=/foo/bar/disk on the command line + */ +static int __init +simscsi_setup (char *s) +{ + /* XXX Fix me we may need to strcpy() ? */ + if (strlen(s) > MAX_ROOT_LEN) { + printk("simscsi_setup: prefix too long---using default %s\n", simscsi_root); + } + simscsi_root = s; + return 1; +} + +__setup("simscsi=", simscsi_setup); + +static void +simscsi_interrupt (unsigned long val) +{ + Scsi_Cmnd *sc; + + while ((sc = queue[rd].sc) != 0) { + atomic_dec(&num_reqs); + queue[rd].sc = 0; + if (DBG) + printk("simscsi_interrupt: done with %ld\n", sc->serial_number); + (*sc->scsi_done)(sc); + rd = (rd + 1) % SIMSCSI_REQ_QUEUE_LEN; + } +} + +int +simscsi_detect (Scsi_Host_Template *templ) +{ + templ->proc_name = "simscsi"; + host = scsi_register(templ, 0); + return 1; /* fake one SCSI host adapter */ +} + +int +simscsi_release (struct Scsi_Host *host) +{ + return 0; /* this is easy... */ +} + +const char * +simscsi_info (struct Scsi_Host *host) +{ + return "simulated SCSI host adapter"; +} + +int +simscsi_abort (Scsi_Cmnd *cmd) +{ + printk ("simscsi_abort: unimplemented\n"); + return SCSI_ABORT_SUCCESS; +} + +int +simscsi_reset (Scsi_Cmnd *cmd, unsigned int reset_flags) +{ + printk ("simscsi_reset: unimplemented\n"); + return SCSI_RESET_SUCCESS; +} + +int +simscsi_biosparam (Disk *disk, kdev_t n, int ip[]) +{ + int size = disk->capacity; + + ip[0] = 64; + ip[1] = 32; + ip[2] = size >> 11; + return 0; +} + +static void +simscsi_readwrite (Scsi_Cmnd *sc, int mode, unsigned long offset, unsigned long len) +{ + struct disk_stat stat; + struct disk_req req; + + req.addr = __pa(sc->request_buffer); + req.len = len; /* # of bytes to transfer */ + + if (sc->request_bufflen < req.len) + return; + + stat.fd = desc[sc->target]; + if (DBG) + printk("simscsi_%s @ %lx (off %lx)\n", + mode == SSC_READ ? "read":"write", req.addr, offset); + ia64_ssc(stat.fd, 1, __pa(&req), offset, mode); + ia64_ssc(__pa(&stat), 0, 0, 0, SSC_WAIT_COMPLETION); + + if (stat.count == req.len) { + sc->result = GOOD; + } else { + sc->result = DID_ERROR << 16; + } +} + +static void +simscsi_sg_readwrite (Scsi_Cmnd *sc, int mode, unsigned long offset) +{ + int list_len = sc->use_sg; + struct scatterlist *sl = (struct scatterlist *)sc->buffer; + struct disk_stat stat; + struct disk_req req; + + stat.fd = desc[sc->target]; + + while (list_len) { + req.addr = __pa(page_address(sl->page) + sl->offset); + req.len = sl->length; + if (DBG) + printk("simscsi_sg_%s @ %lx (off %lx) use_sg=%d len=%d\n", + mode == SSC_READ ? "read":"write", req.addr, offset, + list_len, sl->length); + ia64_ssc(stat.fd, 1, __pa(&req), offset, mode); + ia64_ssc(__pa(&stat), 0, 0, 0, SSC_WAIT_COMPLETION); + + /* should not happen in our case */ + if (stat.count != req.len) { + sc->result = DID_ERROR << 16; + return; + } + offset += sl->length; + sl++; + list_len--; + } + sc->result = GOOD; +} + +/* + * function handling both READ_6/WRITE_6 (non-scatter/gather mode) + * commands. + * Added 02/26/99 S.Eranian + */ +static void +simscsi_readwrite6 (Scsi_Cmnd *sc, int mode) +{ + unsigned long offset; + + offset = (((sc->cmnd[1] & 0x1f) << 16) | (sc->cmnd[2] << 8) | sc->cmnd[3])*512; + if (sc->use_sg > 0) + simscsi_sg_readwrite(sc, mode, offset); + else + simscsi_readwrite(sc, mode, offset, sc->cmnd[4]*512); +} + + +static void +simscsi_readwrite10 (Scsi_Cmnd *sc, int mode) +{ + unsigned long offset; + + offset = ( (sc->cmnd[2] << 24) | (sc->cmnd[3] << 16) + | (sc->cmnd[4] << 8) | (sc->cmnd[5] << 0))*512; + if (sc->use_sg > 0) + simscsi_sg_readwrite(sc, mode, offset); + else + simscsi_readwrite(sc, mode, offset, ((sc->cmnd[7] << 8) | sc->cmnd[8])*512); +} + +int +simscsi_queuecommand (Scsi_Cmnd *sc, void (*done)(Scsi_Cmnd *)) +{ + char fname[MAX_ROOT_LEN+16]; + char *buf; +#if DEBUG_SIMSCSI + register long sp asm ("sp"); + + if (DBG) + printk("simscsi_queuecommand: target=%d,cmnd=%u,sc=%lu,sp=%lx,done=%p\n", + sc->target, sc->cmnd[0], sc->serial_number, sp, done); +#endif + + sc->result = DID_BAD_TARGET << 16; + sc->scsi_done = done; + if (sc->target <= 7 && sc->lun == 0) { + switch (sc->cmnd[0]) { + case INQUIRY: + if (sc->request_bufflen < 35) { + break; + } + sprintf (fname, "%s%c", simscsi_root, 'a' + sc->target); + desc[sc->target] = ia64_ssc (__pa(fname), SSC_READ_ACCESS|SSC_WRITE_ACCESS, + 0, 0, SSC_OPEN); + if (desc[sc->target] < 0) { + /* disk doesn't exist... */ + break; + } + buf = sc->request_buffer; + buf[0] = 0; /* magnetic disk */ + buf[1] = 0; /* not a removable medium */ + buf[2] = 2; /* SCSI-2 compliant device */ + buf[3] = 2; /* SCSI-2 response data format */ + buf[4] = 31; /* additional length (bytes) */ + buf[5] = 0; /* reserved */ + buf[6] = 0; /* reserved */ + buf[7] = 0; /* various flags */ + memcpy(buf + 8, "HP SIMULATED DISK 0.00", 28); + sc->result = GOOD; + break; + + case TEST_UNIT_READY: + sc->result = GOOD; + break; + + case READ_6: + if (desc[sc->target] < 0 ) + break; + simscsi_readwrite6(sc, SSC_READ); + break; + + case READ_10: + if (desc[sc->target] < 0 ) + break; + simscsi_readwrite10(sc, SSC_READ); + break; + + case WRITE_6: + if (desc[sc->target] < 0) + break; + simscsi_readwrite6(sc, SSC_WRITE); + break; + + case WRITE_10: + if (desc[sc->target] < 0) + break; + simscsi_readwrite10(sc, SSC_WRITE); + break; + + + case READ_CAPACITY: + if (desc[sc->target] < 0 || sc->request_bufflen < 8) { + break; + } + buf = sc->request_buffer; + + /* pretend to be a 1GB disk (partition table contains real stuff): */ + buf[0] = 0x00; + buf[1] = 0x1f; + buf[2] = 0xff; + buf[3] = 0xff; + /* set block size of 512 bytes: */ + buf[4] = 0; + buf[5] = 0; + buf[6] = 2; + buf[7] = 0; + sc->result = GOOD; + break; + + case MODE_SENSE: + printk("MODE_SENSE\n"); + break; + + case START_STOP: + printk("START_STOP\n"); + break; + + default: + panic("simscsi: unknown SCSI command %u\n", sc->cmnd[0]); + } + } + if (sc->result == DID_BAD_TARGET) { + sc->result |= DRIVER_SENSE << 24; + sc->sense_buffer[0] = 0x70; + sc->sense_buffer[2] = 0x00; + } + if (atomic_read(&num_reqs) >= SIMSCSI_REQ_QUEUE_LEN) { + panic("Attempt to queue command while command is pending!!"); + } + atomic_inc(&num_reqs); + queue[wr].sc = sc; + wr = (wr + 1) % SIMSCSI_REQ_QUEUE_LEN; + + tasklet_schedule(&simscsi_tasklet); + return 0; +} + + +static Scsi_Host_Template driver_template = SIMSCSI; + +#define __initcall(fn) late_initcall(fn) + +#include "../drivers/scsi/scsi_module.c" diff -Nru a/arch/ia64/hp/sim/simscsi.h b/arch/ia64/hp/sim/simscsi.h --- /dev/null Wed Dec 31 16:00:00 1969 +++ b/arch/ia64/hp/sim/simscsi.h Mon Apr 15 15:07:56 2002 @@ -0,0 +1,39 @@ +/* + * Simulated SCSI driver. + * + * Copyright (C) 1999 Hewlett-Packard Co + * David Mosberger-Tang + */ +#ifndef SIMSCSI_H +#define SIMSCSI_H + +#define SIMSCSI_REQ_QUEUE_LEN 64 + +#define DEFAULT_SIMSCSI_ROOT "/var/ski-disks/sd" + +extern int simscsi_detect (Scsi_Host_Template *); +extern int simscsi_release (struct Scsi_Host *); +extern const char *simscsi_info (struct Scsi_Host *); +extern int simscsi_queuecommand (Scsi_Cmnd *, void (*done)(Scsi_Cmnd *)); +extern int simscsi_abort (Scsi_Cmnd *); +extern int simscsi_reset (Scsi_Cmnd *, unsigned int); +extern int simscsi_biosparam (Disk *, kdev_t, int[]); + +#define SIMSCSI { \ + detect: simscsi_detect, \ + release: simscsi_release, \ + info: simscsi_info, \ + queuecommand: simscsi_queuecommand, \ + abort: simscsi_abort, \ + reset: simscsi_reset, \ + bios_param: simscsi_biosparam, \ + can_queue: SIMSCSI_REQ_QUEUE_LEN, \ + this_id: -1, \ + sg_tablesize: SG_ALL, \ + cmd_per_lun: SIMSCSI_REQ_QUEUE_LEN, \ + present: 0, \ + unchecked_isa_dma: 0, \ + use_clustering: DISABLE_CLUSTERING \ +} + +#endif /* SIMSCSI_H */ diff -Nru a/arch/ia64/hp/sim/simserial.c b/arch/ia64/hp/sim/simserial.c --- /dev/null Wed Dec 31 16:00:00 1969 +++ b/arch/ia64/hp/sim/simserial.c Mon Apr 15 15:07:57 2002 @@ -0,0 +1,1104 @@ +/* + * Simulated Serial Driver (fake serial) + * + * This driver is mostly used for bringup purposes and will go away. + * It has a strong dependency on the system console. All outputs + * are rerouted to the same facility as the one used by printk which, in our + * case means sys_sim.c console (goes via the simulator). The code hereafter + * is completely leveraged from the serial.c driver. + * + * Copyright (C) 1999-2000 Hewlett-Packard Co + * Copyright (C) 1999 Stephane Eranian + * Copyright (C) 2000 David Mosberger-Tang + * + * 02/04/00 D. Mosberger Merged in serial.c bug fixes in rs_close(). + * 02/25/00 D. Mosberger Synced up with 2.3.99pre-5 version of serial.c. + */ + +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include + +#include +#include + +#ifdef CONFIG_KDB +# include +#endif + +#undef SIMSERIAL_DEBUG /* define this to get some debug information */ + +#define KEYBOARD_INTR 3 /* must match with simulator! */ + +#define NR_PORTS 1 /* only one port for now */ +#define SERIAL_INLINE 1 + +#ifdef SERIAL_INLINE +#define _INLINE_ inline +#endif + +#ifndef MIN +#define MIN(a,b) ((a) < (b) ? (a) : (b)) +#endif + +#define IRQ_T(info) ((info->flags & ASYNC_SHARE_IRQ) ? SA_SHIRQ : SA_INTERRUPT) + +#define SSC_GETCHAR 21 + +extern long ia64_ssc (long, long, long, long, int); +extern void ia64_ssc_connect_irq (long intr, long irq); + +static char *serial_name = "SimSerial driver"; +static char *serial_version = "0.6"; + +/* + * This has been extracted from asm/serial.h. We need one eventually but + * I don't know exactly what we're going to put in it so just fake one + * for now. + */ +#define BASE_BAUD ( 1843200 / 16 ) + +#define STD_COM_FLAGS (ASYNC_BOOT_AUTOCONF | ASYNC_SKIP_TEST) + +/* + * Most of the values here are meaningless to this particular driver. + * However some values must be preserved for the code (leveraged from serial.c + * to work correctly). + * port must not be 0 + * type must not be UNKNOWN + * So I picked arbitrary (guess from where?) values instead + */ +static struct serial_state rs_table[NR_PORTS]={ + /* UART CLK PORT IRQ FLAGS */ + { 0, BASE_BAUD, 0x3F8, 0, STD_COM_FLAGS,0,PORT_16550 } /* ttyS0 */ +}; + +/* + * Just for the fun of it ! + */ +static struct serial_uart_config uart_config[] = { + { "unknown", 1, 0 }, + { "8250", 1, 0 }, + { "16450", 1, 0 }, + { "16550", 1, 0 }, + { "16550A", 16, UART_CLEAR_FIFO | UART_USE_FIFO }, + { "cirrus", 1, 0 }, + { "ST16650", 1, UART_CLEAR_FIFO | UART_STARTECH }, + { "ST16650V2", 32, UART_CLEAR_FIFO | UART_USE_FIFO | + UART_STARTECH }, + { "TI16750", 64, UART_CLEAR_FIFO | UART_USE_FIFO}, + { 0, 0} +}; + +static struct tty_driver serial_driver, callout_driver; +static int serial_refcount; + +static struct async_struct *IRQ_ports[NR_IRQS]; +static struct tty_struct *serial_table[NR_PORTS]; +static struct termios *serial_termios[NR_PORTS]; +static struct termios *serial_termios_locked[NR_PORTS]; + +static struct console *console; + +static unsigned char *tmp_buf; +static DECLARE_MUTEX(tmp_buf_sem); + +extern struct console *console_drivers; /* from kernel/printk.c */ + +/* + * ------------------------------------------------------------ + * rs_stop() and rs_start() + * + * This routines are called before setting or resetting tty->stopped. + * They enable or disable transmitter interrupts, as necessary. + * ------------------------------------------------------------ + */ +static void rs_stop(struct tty_struct *tty) +{ +#ifdef SIMSERIAL_DEBUG + printk("rs_stop: tty->stopped=%d tty->hw_stopped=%d tty->flow_stopped=%d\n", + tty->stopped, tty->hw_stopped, tty->flow_stopped); +#endif + +} + +static void rs_start(struct tty_struct *tty) +{ +#if SIMSERIAL_DEBUG + printk("rs_start: tty->stopped=%d tty->hw_stopped=%d tty->flow_stopped=%d\n", + tty->stopped, tty->hw_stopped, tty->flow_stopped); +#endif +} + +static void receive_chars(struct tty_struct *tty, struct pt_regs *regs) +{ + unsigned char ch; + static unsigned char seen_esc = 0; + + while ( (ch = ia64_ssc(0, 0, 0, 0, SSC_GETCHAR)) ) { + if ( ch == 27 && seen_esc == 0 ) { + seen_esc = 1; + continue; + } else { + if ( seen_esc==1 && ch == 'O' ) { + seen_esc = 2; + continue; + } else if ( seen_esc == 2 ) { + if ( ch == 'P' ) show_state(); /* F1 key */ + if ( ch == 'Q' ) show_buffers(); /* F2 key */ +#ifdef CONFIG_KDB + if ( ch == 'S' ) + kdb(KDB_REASON_KEYBOARD, 0, (kdb_eframe_t) regs); +#endif + + seen_esc = 0; + continue; + } + } + seen_esc = 0; + if (tty->flip.count >= TTY_FLIPBUF_SIZE) break; + + *tty->flip.char_buf_ptr = ch; + + *tty->flip.flag_buf_ptr = 0; + + tty->flip.flag_buf_ptr++; + tty->flip.char_buf_ptr++; + tty->flip.count++; + } + tty_flip_buffer_push(tty); +} + +/* + * This is the serial driver's interrupt routine for a single port + */ +static void rs_interrupt_single(int irq, void *dev_id, struct pt_regs * regs) +{ + struct async_struct * info; + + /* + * I don't know exactly why they don't use the dev_id opaque data + * pointer instead of this extra lookup table + */ + info = IRQ_ports[irq]; + if (!info || !info->tty) { + printk("simrs_interrupt_single: info|tty=0 info=%p problem\n", info); + return; + } + /* + * pretty simple in our case, because we only get interrupts + * on inbound traffic + */ + receive_chars(info->tty, regs); +} + +/* + * ------------------------------------------------------------------- + * Here ends the serial interrupt routines. + * ------------------------------------------------------------------- + */ + +#if 0 +/* + * not really used in our situation so keep them commented out for now + */ +static DECLARE_TASK_QUEUE(tq_serial); /* used to be at the top of the file */ +static void do_serial_bh(void) +{ + run_task_queue(&tq_serial); + printk("do_serial_bh: called\n"); +} +#endif + +static void do_softint(void *private_) +{ + printk("simserial: do_softint called\n"); +} + +static void rs_put_char(struct tty_struct *tty, unsigned char ch) +{ + struct async_struct *info = (struct async_struct *)tty->driver_data; + unsigned long flags; + + if (!tty || !info->xmit.buf) return; + + save_flags(flags); cli(); + if (CIRC_SPACE(info->xmit.head, info->xmit.tail, SERIAL_XMIT_SIZE) == 0) { + restore_flags(flags); + return; + } + info->xmit.buf[info->xmit.head] = ch; + info->xmit.head = (info->xmit.head + 1) & (SERIAL_XMIT_SIZE-1); + restore_flags(flags); +} + +static _INLINE_ void transmit_chars(struct async_struct *info, int *intr_done) +{ + int count; + unsigned long flags; + + save_flags(flags); cli(); + + if (info->x_char) { + char c = info->x_char; + + console->write(console, &c, 1); + + info->state->icount.tx++; + info->x_char = 0; + + goto out; + } + + if (info->xmit.head == info->xmit.tail || info->tty->stopped || info->tty->hw_stopped) { +#ifdef SIMSERIAL_DEBUG + printk("transmit_chars: head=%d, tail=%d, stopped=%d\n", + info->xmit.head, info->xmit.tail, info->tty->stopped); +#endif + goto out; + } + /* + * We removed the loop and try to do it in to chunks. We need + * 2 operations maximum because it's a ring buffer. + * + * First from current to tail if possible. + * Then from the beginning of the buffer until necessary + */ + + count = MIN(CIRC_CNT(info->xmit.head, info->xmit.tail, SERIAL_XMIT_SIZE), + SERIAL_XMIT_SIZE - info->xmit.tail); + console->write(console, info->xmit.buf+info->xmit.tail, count); + + info->xmit.tail = (info->xmit.tail+count) & (SERIAL_XMIT_SIZE-1); + + /* + * We have more at the beginning of the buffer + */ + count = CIRC_CNT(info->xmit.head, info->xmit.tail, SERIAL_XMIT_SIZE); + if (count) { + console->write(console, info->xmit.buf, count); + info->xmit.tail += count; + } +out: + restore_flags(flags); +} + +static void rs_flush_chars(struct tty_struct *tty) +{ + struct async_struct *info = (struct async_struct *)tty->driver_data; + + if (info->xmit.head == info->xmit.tail || tty->stopped || tty->hw_stopped || + !info->xmit.buf) + return; + + transmit_chars(info, NULL); +} + + +static int rs_write(struct tty_struct * tty, int from_user, + const unsigned char *buf, int count) +{ + int c, ret = 0; + struct async_struct *info = (struct async_struct *)tty->driver_data; + unsigned long flags; + + if (!tty || !info->xmit.buf || !tmp_buf) return 0; + + save_flags(flags); + if (from_user) { + down(&tmp_buf_sem); + while (1) { + int c1; + c = CIRC_SPACE_TO_END(info->xmit.head, info->xmit.tail, SERIAL_XMIT_SIZE); + if (count < c) + c = count; + if (c <= 0) + break; + + c -= copy_from_user(tmp_buf, buf, c); + if (!c) { + if (!ret) + ret = -EFAULT; + break; + } + cli(); + c1 = CIRC_SPACE_TO_END(info->xmit.head, info->xmit.tail, SERIAL_XMIT_SIZE); + if (c1 < c) + c = c1; + memcpy(info->xmit.buf + info->xmit.head, tmp_buf, c); + info->xmit.head = ((info->xmit.head + c) & + (SERIAL_XMIT_SIZE-1)); + restore_flags(flags); + buf += c; + count -= c; + ret += c; + } + up(&tmp_buf_sem); + } else { + cli(); + while (1) { + c = CIRC_SPACE_TO_END(info->xmit.head, info->xmit.tail, SERIAL_XMIT_SIZE); + if (count < c) + c = count; + if (c <= 0) { + break; + } + memcpy(info->xmit.buf + info->xmit.head, buf, c); + info->xmit.head = ((info->xmit.head + c) & + (SERIAL_XMIT_SIZE-1)); + buf += c; + count -= c; + ret += c; + } + restore_flags(flags); + } + /* + * Hey, we transmit directly from here in our case + */ + if (CIRC_CNT(info->xmit.head, info->xmit.tail, SERIAL_XMIT_SIZE) + && !tty->stopped && !tty->hw_stopped) { + transmit_chars(info, NULL); + } + return ret; +} + +static int rs_write_room(struct tty_struct *tty) +{ + struct async_struct *info = (struct async_struct *)tty->driver_data; + + return CIRC_SPACE(info->xmit.head, info->xmit.tail, SERIAL_XMIT_SIZE); +} + +static int rs_chars_in_buffer(struct tty_struct *tty) +{ + struct async_struct *info = (struct async_struct *)tty->driver_data; + + return CIRC_CNT(info->xmit.head, info->xmit.tail, SERIAL_XMIT_SIZE); +} + +static void rs_flush_buffer(struct tty_struct *tty) +{ + struct async_struct *info = (struct async_struct *)tty->driver_data; + unsigned long flags; + + save_flags(flags); cli(); + info->xmit.head = info->xmit.tail = 0; + restore_flags(flags); + + wake_up_interruptible(&tty->write_wait); + + if ((tty->flags & (1 << TTY_DO_WRITE_WAKEUP)) && + tty->ldisc.write_wakeup) + (tty->ldisc.write_wakeup)(tty); +} + +/* + * This function is used to send a high-priority XON/XOFF character to + * the device + */ +static void rs_send_xchar(struct tty_struct *tty, char ch) +{ + struct async_struct *info = (struct async_struct *)tty->driver_data; + + info->x_char = ch; + if (ch) { + /* + * I guess we could call console->write() directly but + * let's do that for now. + */ + transmit_chars(info, NULL); + } +} + +/* + * ------------------------------------------------------------ + * rs_throttle() + * + * This routine is called by the upper-layer tty layer to signal that + * incoming characters should be throttled. + * ------------------------------------------------------------ + */ +static void rs_throttle(struct tty_struct * tty) +{ + if (I_IXOFF(tty)) rs_send_xchar(tty, STOP_CHAR(tty)); + + printk("simrs_throttle called\n"); +} + +static void rs_unthrottle(struct tty_struct * tty) +{ + struct async_struct *info = (struct async_struct *)tty->driver_data; + + if (I_IXOFF(tty)) { + if (info->x_char) + info->x_char = 0; + else + rs_send_xchar(tty, START_CHAR(tty)); + } + printk("simrs_unthrottle called\n"); +} + +/* + * rs_break() --- routine which turns the break handling on or off + */ +static void rs_break(struct tty_struct *tty, int break_state) +{ +} + +static int rs_ioctl(struct tty_struct *tty, struct file * file, + unsigned int cmd, unsigned long arg) +{ + if ((cmd != TIOCGSERIAL) && (cmd != TIOCSSERIAL) && + (cmd != TIOCSERCONFIG) && (cmd != TIOCSERGSTRUCT) && + (cmd != TIOCMIWAIT) && (cmd != TIOCGICOUNT)) { + if (tty->flags & (1 << TTY_IO_ERROR)) + return -EIO; + } + + switch (cmd) { + case TIOCMGET: + printk("rs_ioctl: TIOCMGET called\n"); + return -EINVAL; + case TIOCMBIS: + case TIOCMBIC: + case TIOCMSET: + printk("rs_ioctl: TIOCMBIS/BIC/SET called\n"); + return -EINVAL; + case TIOCGSERIAL: + printk("simrs_ioctl TIOCGSERIAL called\n"); + return 0; + case TIOCSSERIAL: + printk("simrs_ioctl TIOCSSERIAL called\n"); + return 0; + case TIOCSERCONFIG: + printk("rs_ioctl: TIOCSERCONFIG called\n"); + return -EINVAL; + + case TIOCSERGETLSR: /* Get line status register */ + printk("rs_ioctl: TIOCSERGETLSR called\n"); + return -EINVAL; + + case TIOCSERGSTRUCT: + printk("rs_ioctl: TIOCSERGSTRUCT called\n"); +#if 0 + if (copy_to_user((struct async_struct *) arg, + info, sizeof(struct async_struct))) + return -EFAULT; +#endif + return 0; + + /* + * Wait for any of the 4 modem inputs (DCD,RI,DSR,CTS) to change + * - mask passed in arg for lines of interest + * (use |'ed TIOCM_RNG/DSR/CD/CTS for masking) + * Caller should use TIOCGICOUNT to see which one it was + */ + case TIOCMIWAIT: + printk("rs_ioctl: TIOCMIWAIT: called\n"); + return 0; + /* + * Get counter of input serial line interrupts (DCD,RI,DSR,CTS) + * Return: write counters to the user passed counter struct + * NB: both 1->0 and 0->1 transitions are counted except for + * RI where only 0->1 is counted. + */ + case TIOCGICOUNT: + printk("rs_ioctl: TIOCGICOUNT called\n"); + return 0; + + case TIOCSERGWILD: + case TIOCSERSWILD: + /* "setserial -W" is called in Debian boot */ + printk ("TIOCSER?WILD ioctl obsolete, ignored.\n"); + return 0; + + default: + return -ENOIOCTLCMD; + } + return 0; +} + +#define RELEVANT_IFLAG(iflag) (iflag & (IGNBRK|BRKINT|IGNPAR|PARMRK|INPCK)) + +static void rs_set_termios(struct tty_struct *tty, struct termios *old_termios) +{ + unsigned int cflag = tty->termios->c_cflag; + + if ( (cflag == old_termios->c_cflag) + && ( RELEVANT_IFLAG(tty->termios->c_iflag) + == RELEVANT_IFLAG(old_termios->c_iflag))) + return; + + + /* Handle turning off CRTSCTS */ + if ((old_termios->c_cflag & CRTSCTS) && + !(tty->termios->c_cflag & CRTSCTS)) { + tty->hw_stopped = 0; + rs_start(tty); + } +} +/* + * This routine will shutdown a serial port; interrupts are disabled, and + * DTR is dropped if the hangup on close termio flag is on. + */ +static void shutdown(struct async_struct * info) +{ + unsigned long flags; + struct serial_state *state; + int retval; + + if (!(info->flags & ASYNC_INITIALIZED)) return; + + state = info->state; + +#ifdef SIMSERIAL_DEBUG + printk("Shutting down serial port %d (irq %d)....", info->line, + state->irq); +#endif + + save_flags(flags); cli(); /* Disable interrupts */ + + /* + * First unlink the serial port from the IRQ chain... + */ + if (info->next_port) + info->next_port->prev_port = info->prev_port; + if (info->prev_port) + info->prev_port->next_port = info->next_port; + else + IRQ_ports[state->irq] = info->next_port; + + /* + * Free the IRQ, if necessary + */ + if (state->irq && (!IRQ_ports[state->irq] || + !IRQ_ports[state->irq]->next_port)) { + if (IRQ_ports[state->irq]) { + free_irq(state->irq, NULL); + retval = request_irq(state->irq, rs_interrupt_single, + IRQ_T(info), "serial", NULL); + + if (retval) + printk("serial shutdown: request_irq: error %d" + " Couldn't reacquire IRQ.\n", retval); + } else + free_irq(state->irq, NULL); + } + + if (info->xmit.buf) { + free_page((unsigned long) info->xmit.buf); + info->xmit.buf = 0; + } + + if (info->tty) set_bit(TTY_IO_ERROR, &info->tty->flags); + + info->flags &= ~ASYNC_INITIALIZED; + restore_flags(flags); +} + +/* + * ------------------------------------------------------------ + * rs_close() + * + * This routine is called when the serial port gets closed. First, we + * wait for the last remaining data to be sent. Then, we unlink its + * async structure from the interrupt chain if necessary, and we free + * that IRQ if nothing is left in the chain. + * ------------------------------------------------------------ + */ +static void rs_close(struct tty_struct *tty, struct file * filp) +{ + struct async_struct * info = (struct async_struct *)tty->driver_data; + struct serial_state *state; + unsigned long flags; + + if (!info ) return; + + state = info->state; + + save_flags(flags); cli(); + + if (tty_hung_up_p(filp)) { +#ifdef SIMSERIAL_DEBUG + printk("rs_close: hung_up\n"); +#endif + MOD_DEC_USE_COUNT; + restore_flags(flags); + return; + } +#ifdef SIMSERIAL_DEBUG + printk("rs_close ttys%d, count = %d\n", info->line, state->count); +#endif + if ((tty->count == 1) && (state->count != 1)) { + /* + * Uh, oh. tty->count is 1, which means that the tty + * structure will be freed. state->count should always + * be one in these conditions. If it's greater than + * one, we've got real problems, since it means the + * serial port won't be shutdown. + */ + printk("rs_close: bad serial port count; tty->count is 1, " + "state->count is %d\n", state->count); + state->count = 1; + } + if (--state->count < 0) { + printk("rs_close: bad serial port count for ttys%d: %d\n", + info->line, state->count); + state->count = 0; + } + if (state->count) { + MOD_DEC_USE_COUNT; + restore_flags(flags); + return; + } + info->flags |= ASYNC_CLOSING; + restore_flags(flags); + + /* + * Now we wait for the transmit buffer to clear; and we notify + * the line discipline to only process XON/XOFF characters. + */ + shutdown(info); + if (tty->driver.flush_buffer) tty->driver.flush_buffer(tty); + if (tty->ldisc.flush_buffer) tty->ldisc.flush_buffer(tty); + info->event = 0; + info->tty = 0; + if (info->blocked_open) { + if (info->close_delay) { + current->state = TASK_INTERRUPTIBLE; + schedule_timeout(info->close_delay); + } + wake_up_interruptible(&info->open_wait); + } + info->flags &= ~(ASYNC_NORMAL_ACTIVE|ASYNC_CALLOUT_ACTIVE|ASYNC_CLOSING); + wake_up_interruptible(&info->close_wait); + MOD_DEC_USE_COUNT; +} + +/* + * rs_wait_until_sent() --- wait until the transmitter is empty + */ +static void rs_wait_until_sent(struct tty_struct *tty, int timeout) +{ +} + + +/* + * rs_hangup() --- called by tty_hangup() when a hangup is signaled. + */ +static void rs_hangup(struct tty_struct *tty) +{ + struct async_struct * info = (struct async_struct *)tty->driver_data; + struct serial_state *state = info->state; + +#ifdef SIMSERIAL_DEBUG + printk("rs_hangup: called\n"); +#endif + + state = info->state; + + rs_flush_buffer(tty); + if (info->flags & ASYNC_CLOSING) + return; + shutdown(info); + + info->event = 0; + state->count = 0; + info->flags &= ~(ASYNC_NORMAL_ACTIVE|ASYNC_CALLOUT_ACTIVE); + info->tty = 0; + wake_up_interruptible(&info->open_wait); +} + + +static int get_async_struct(int line, struct async_struct **ret_info) +{ + struct async_struct *info; + struct serial_state *sstate; + + sstate = rs_table + line; + sstate->count++; + if (sstate->info) { + *ret_info = sstate->info; + return 0; + } + info = kmalloc(sizeof(struct async_struct), GFP_KERNEL); + if (!info) { + sstate->count--; + return -ENOMEM; + } + memset(info, 0, sizeof(struct async_struct)); + init_waitqueue_head(&info->open_wait); + init_waitqueue_head(&info->close_wait); + init_waitqueue_head(&info->delta_msr_wait); + info->magic = SERIAL_MAGIC; + info->port = sstate->port; + info->flags = sstate->flags; + info->xmit_fifo_size = sstate->xmit_fifo_size; + info->line = line; + info->tqueue.routine = do_softint; + info->tqueue.data = info; + info->state = sstate; + if (sstate->info) { + kfree(info); + *ret_info = sstate->info; + return 0; + } + *ret_info = sstate->info = info; + return 0; +} + +static int +startup(struct async_struct *info) +{ + unsigned long flags; + int retval=0; + void (*handler)(int, void *, struct pt_regs *); + struct serial_state *state= info->state; + unsigned long page; + + page = get_free_page(GFP_KERNEL); + if (!page) + return -ENOMEM; + + save_flags(flags); cli(); + + if (info->flags & ASYNC_INITIALIZED) { + free_page(page); + goto errout; + } + + if (!state->port || !state->type) { + if (info->tty) set_bit(TTY_IO_ERROR, &info->tty->flags); + free_page(page); + goto errout; + } + if (info->xmit.buf) + free_page(page); + else + info->xmit.buf = (unsigned char *) page; + +#ifdef SIMSERIAL_DEBUG + printk("startup: ttys%d (irq %d)...", info->line, state->irq); +#endif + + /* + * Allocate the IRQ if necessary + */ + if (state->irq && (!IRQ_ports[state->irq] || + !IRQ_ports[state->irq]->next_port)) { + if (IRQ_ports[state->irq]) { + retval = -EBUSY; + goto errout; + } else + handler = rs_interrupt_single; + + retval = request_irq(state->irq, handler, IRQ_T(info), + "simserial", NULL); + if (retval) { + if (capable(CAP_SYS_ADMIN)) { + if (info->tty) + set_bit(TTY_IO_ERROR, + &info->tty->flags); + retval = 0; + } + goto errout; + } + } + + /* + * Insert serial port into IRQ chain. + */ + info->prev_port = 0; + info->next_port = IRQ_ports[state->irq]; + if (info->next_port) + info->next_port->prev_port = info; + IRQ_ports[state->irq] = info; + + if (info->tty) clear_bit(TTY_IO_ERROR, &info->tty->flags); + + info->xmit.head = info->xmit.tail = 0; + +#if 0 + /* + * Set up serial timers... + */ + timer_table[RS_TIMER].expires = jiffies + 2*HZ/100; + timer_active |= 1 << RS_TIMER; +#endif + + /* + * Set up the tty->alt_speed kludge + */ + if (info->tty) { + if ((info->flags & ASYNC_SPD_MASK) == ASYNC_SPD_HI) + info->tty->alt_speed = 57600; + if ((info->flags & ASYNC_SPD_MASK) == ASYNC_SPD_VHI) + info->tty->alt_speed = 115200; + if ((info->flags & ASYNC_SPD_MASK) == ASYNC_SPD_SHI) + info->tty->alt_speed = 230400; + if ((info->flags & ASYNC_SPD_MASK) == ASYNC_SPD_WARP) + info->tty->alt_speed = 460800; + } + + info->flags |= ASYNC_INITIALIZED; + restore_flags(flags); + return 0; + +errout: + restore_flags(flags); + return retval; +} + + +/* + * This routine is called whenever a serial port is opened. It + * enables interrupts for a serial port, linking in its async structure into + * the IRQ chain. It also performs the serial-specific + * initialization for the tty structure. + */ +static int rs_open(struct tty_struct *tty, struct file * filp) +{ + struct async_struct *info; + int retval, line; + unsigned long page; + + MOD_INC_USE_COUNT; + line = minor(tty->device) - tty->driver.minor_start; + if ((line < 0) || (line >= NR_PORTS)) { + MOD_DEC_USE_COUNT; + return -ENODEV; + } + retval = get_async_struct(line, &info); + if (retval) { + MOD_DEC_USE_COUNT; + return retval; + } + tty->driver_data = info; + info->tty = tty; + +#ifdef SIMSERIAL_DEBUG + printk("rs_open %s%d, count = %d\n", tty->driver.name, info->line, + info->state->count); +#endif + info->tty->low_latency = (info->flags & ASYNC_LOW_LATENCY) ? 1 : 0; + + if (!tmp_buf) { + page = get_free_page(GFP_KERNEL); + if (!page) { + /* MOD_DEC_USE_COUNT; "info->tty" will cause this? */ + return -ENOMEM; + } + if (tmp_buf) + free_page(page); + else + tmp_buf = (unsigned char *) page; + } + + /* + * If the port is the middle of closing, bail out now + */ + if (tty_hung_up_p(filp) || + (info->flags & ASYNC_CLOSING)) { + if (info->flags & ASYNC_CLOSING) + interruptible_sleep_on(&info->close_wait); + /* MOD_DEC_USE_COUNT; "info->tty" will cause this? */ +#ifdef SERIAL_DO_RESTART + return ((info->flags & ASYNC_HUP_NOTIFY) ? + -EAGAIN : -ERESTARTSYS); +#else + return -EAGAIN; +#endif + } + + /* + * Start up serial port + */ + retval = startup(info); + if (retval) { + /* MOD_DEC_USE_COUNT; "info->tty" will cause this? */ + return retval; + } + + if ((info->state->count == 1) && + (info->flags & ASYNC_SPLIT_TERMIOS)) { + if (tty->driver.subtype == SERIAL_TYPE_NORMAL) + *tty->termios = info->state->normal_termios; + else + *tty->termios = info->state->callout_termios; + } + + /* + * figure out which console to use (should be one already) + */ + console = console_drivers; + while (console) { + if ((console->flags & CON_ENABLED) && console->write) break; + console = console->next; + } + + info->session = current->session; + info->pgrp = current->pgrp; + +#ifdef SIMSERIAL_DEBUG + printk("rs_open ttys%d successful\n", info->line); +#endif + return 0; +} + +/* + * /proc fs routines.... + */ + +static inline int line_info(char *buf, struct serial_state *state) +{ + return sprintf(buf, "%d: uart:%s port:%lX irq:%d\n", + state->line, uart_config[state->type].name, + state->port, state->irq); +} + +static int rs_read_proc(char *page, char **start, off_t off, int count, + int *eof, void *data) +{ + int i, len = 0, l; + off_t begin = 0; + + len += sprintf(page, "simserinfo:1.0 driver:%s\n", serial_version); + for (i = 0; i < NR_PORTS && len < 4000; i++) { + l = line_info(page + len, &rs_table[i]); + len += l; + if (len+begin > off+count) + goto done; + if (len+begin < off) { + begin += len; + len = 0; + } + } + *eof = 1; +done: + if (off >= len+begin) + return 0; + *start = page + (begin-off); + return ((count < begin+len-off) ? count : begin+len-off); +} + +/* + * --------------------------------------------------------------------- + * rs_init() and friends + * + * rs_init() is called at boot-time to initialize the serial driver. + * --------------------------------------------------------------------- + */ + +/* + * This routine prints out the appropriate serial driver version + * number, and identifies which options were configured into this + * driver. + */ +static inline void show_serial_version(void) +{ + printk(KERN_INFO "%s version %s with", serial_name, serial_version); + printk(" no serial options enabled\n"); +} + +/* + * The serial driver boot-time initialization code! + */ +static int __init +simrs_init (void) +{ + int i; + struct serial_state *state; + + show_serial_version(); + + /* Initialize the tty_driver structure */ + + memset(&serial_driver, 0, sizeof(struct tty_driver)); + serial_driver.magic = TTY_DRIVER_MAGIC; + serial_driver.driver_name = "simserial"; + serial_driver.name = "ttyS"; + serial_driver.major = TTY_MAJOR; + serial_driver.minor_start = 64; + serial_driver.num = 1; + serial_driver.type = TTY_DRIVER_TYPE_SERIAL; + serial_driver.subtype = SERIAL_TYPE_NORMAL; + serial_driver.init_termios = tty_std_termios; + serial_driver.init_termios.c_cflag = + B9600 | CS8 | CREAD | HUPCL | CLOCAL; + serial_driver.flags = TTY_DRIVER_REAL_RAW; + serial_driver.refcount = &serial_refcount; + serial_driver.table = serial_table; + serial_driver.termios = serial_termios; + serial_driver.termios_locked = serial_termios_locked; + + serial_driver.open = rs_open; + serial_driver.close = rs_close; + serial_driver.write = rs_write; + serial_driver.put_char = rs_put_char; + serial_driver.flush_chars = rs_flush_chars; + serial_driver.write_room = rs_write_room; + serial_driver.chars_in_buffer = rs_chars_in_buffer; + serial_driver.flush_buffer = rs_flush_buffer; + serial_driver.ioctl = rs_ioctl; + serial_driver.throttle = rs_throttle; + serial_driver.unthrottle = rs_unthrottle; + serial_driver.send_xchar = rs_send_xchar; + serial_driver.set_termios = rs_set_termios; + serial_driver.stop = rs_stop; + serial_driver.start = rs_start; + serial_driver.hangup = rs_hangup; + serial_driver.break_ctl = rs_break; + serial_driver.wait_until_sent = rs_wait_until_sent; + serial_driver.read_proc = rs_read_proc; + + /* + * Let's have a little bit of fun ! + */ + for (i = 0, state = rs_table; i < NR_PORTS; i++,state++) { + + if (state->type == PORT_UNKNOWN) continue; + + if (!state->irq) { + state->irq = ia64_alloc_irq(); + ia64_ssc_connect_irq(KEYBOARD_INTR, state->irq); + } + + printk(KERN_INFO "ttyS%02d at 0x%04lx (irq = %d) is a %s\n", + state->line, + state->port, state->irq, + uart_config[state->type].name); + } + /* + * The callout device is just like normal device except for + * major number and the subtype code. + */ + callout_driver = serial_driver; + callout_driver.name = "cua"; + callout_driver.major = TTYAUX_MAJOR; + callout_driver.subtype = SERIAL_TYPE_CALLOUT; + callout_driver.read_proc = 0; + callout_driver.proc_entry = 0; + + if (tty_register_driver(&serial_driver)) + panic("Couldn't register simserial driver\n"); + + if (tty_register_driver(&callout_driver)) + panic("Couldn't register callout driver\n"); + + return 0; +} + +#ifndef MODULE +__initcall(simrs_init); +#endif diff -Nru a/arch/ia64/hp/simeth.c b/arch/ia64/hp/simeth.c --- a/arch/ia64/hp/simeth.c Mon Apr 15 15:07:56 2002 +++ /dev/null Wed Dec 31 16:00:00 1969 @@ -1,533 +0,0 @@ -/* - * Simulated Ethernet Driver - * - * Copyright (C) 1999-2001 Hewlett-Packard Co - * Stephane Eranian - */ -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include - -#define SIMETH_RECV_MAX 10 - -/* - * Maximum possible received frame for Ethernet. - * We preallocate an sk_buff of that size to avoid costly - * memcpy for temporary buffer into sk_buff. We do basically - * what's done in other drivers, like eepro with a ring. - * The difference is, of course, that we don't have real DMA !!! - */ -#define SIMETH_FRAME_SIZE ETH_FRAME_LEN - - -#define SSC_NETDEV_PROBE 100 -#define SSC_NETDEV_SEND 101 -#define SSC_NETDEV_RECV 102 -#define SSC_NETDEV_ATTACH 103 -#define SSC_NETDEV_DETACH 104 - -#define NETWORK_INTR 8 - -struct simeth_local { - struct net_device_stats stats; - int simfd; /* descriptor in the simulator */ -}; - -static int simeth_probe1(void); -static int simeth_open(struct net_device *dev); -static int simeth_close(struct net_device *dev); -static int simeth_tx(struct sk_buff *skb, struct net_device *dev); -static int simeth_rx(struct net_device *dev); -static struct net_device_stats *simeth_get_stats(struct net_device *dev); -static void simeth_interrupt(int irq, void *dev_id, struct pt_regs * regs); -static void set_multicast_list(struct net_device *dev); -static int simeth_device_event(struct notifier_block *this,unsigned long event, void *ptr); - -static char *simeth_version="0.3"; - -/* - * This variable is used to establish a mapping between the Linux/ia64 kernel - * and the host linux kernel. - * - * As of today, we support only one card, even though most of the code - * is ready for many more. The mapping is then: - * linux/ia64 -> linux/x86 - * eth0 -> eth1 - * - * In the future, we some string operations, we could easily support up - * to 10 cards (0-9). - * - * The default mapping can be changed on the kernel command line by - * specifying simeth=ethX (or whatever string you want). - */ -static char *simeth_device="eth0"; /* default host interface to use */ - - - -static volatile unsigned int card_count; /* how many cards "found" so far */ -static int simeth_debug; /* set to 1 to get debug information */ - -/* - * Used to catch IFF_UP & IFF_DOWN events - */ -static struct notifier_block simeth_dev_notifier = { - simeth_device_event, - 0 -}; - - -/* - * Function used when using a kernel command line option. - * - * Format: simeth=interface_name (like eth0) - */ -static int __init -simeth_setup(char *str) -{ - simeth_device = str; - return 1; -} - -__setup("simeth=", simeth_setup); - -/* - * Function used to probe for simeth devices when not installed - * as a loadable module - */ - -int __init -simeth_probe (void) -{ - int r; - - printk("simeth: v%s\n", simeth_version); - - r = simeth_probe1(); - - if (r == 0) register_netdevice_notifier(&simeth_dev_notifier); - - return r; -} - -extern long ia64_ssc (long, long, long, long, int); -extern void ia64_ssc_connect_irq (long intr, long irq); - -static inline int -netdev_probe(char *name, unsigned char *ether) -{ - return ia64_ssc(__pa(name), __pa(ether), 0,0, SSC_NETDEV_PROBE); -} - - -static inline int -netdev_connect(int irq) -{ - /* XXX Fix me - * this does not support multiple cards - * also no return value - */ - ia64_ssc_connect_irq(NETWORK_INTR, irq); - return 0; -} - -static inline int -netdev_attach(int fd, int irq, unsigned int ipaddr) -{ - /* this puts the host interface in the right mode (start interupting) */ - return ia64_ssc(fd, ipaddr, 0,0, SSC_NETDEV_ATTACH); -} - - -static inline int -netdev_detach(int fd) -{ - /* - * inactivate the host interface (don't interrupt anymore) */ - return ia64_ssc(fd, 0,0,0, SSC_NETDEV_DETACH); -} - -static inline int -netdev_send(int fd, unsigned char *buf, unsigned int len) -{ - return ia64_ssc(fd, __pa(buf), len, 0, SSC_NETDEV_SEND); -} - -static inline int -netdev_read(int fd, unsigned char *buf, unsigned int len) -{ - return ia64_ssc(fd, __pa(buf), len, 0, SSC_NETDEV_RECV); -} - -/* - * Function shared with module code, so cannot be in init section - * - * So far this function "detects" only one card (test_&_set) but could - * be extended easily. - * - * Return: - * - -ENODEV is no device found - * - -ENOMEM is no more memory - * - 0 otherwise - */ -static int -simeth_probe1(void) -{ - unsigned char mac_addr[ETH_ALEN]; - struct simeth_local *local; - struct net_device *dev; - int fd, i; - - /* - * XXX Fix me - * let's support just one card for now - */ - if (test_and_set_bit(0, &card_count)) - return -ENODEV; - - /* - * check with the simulator for the device - */ - fd = netdev_probe(simeth_device, mac_addr); - if (fd == -1) - return -ENODEV; - - dev = init_etherdev(NULL, sizeof(struct simeth_local)); - if (!dev) - return -ENOMEM; - - memcpy(dev->dev_addr, mac_addr, sizeof(mac_addr)); - - dev->irq = ia64_alloc_irq(); - - /* - * attach the interrupt in the simulator, this does enable interrupts - * until a netdev_attach() is called - */ - netdev_connect(dev->irq); - - memset(dev->priv, 0, sizeof(struct simeth_local)); - - local = dev->priv; - local->simfd = fd; /* keep track of underlying file descriptor */ - - dev->open = simeth_open; - dev->stop = simeth_close; - dev->hard_start_xmit = simeth_tx; - dev->get_stats = simeth_get_stats; - dev->set_multicast_list = set_multicast_list; /* no yet used */ - - /* Fill in the fields of the device structure with ethernet-generic values. */ - ether_setup(dev); - - printk("%s: hosteth=%s simfd=%d, HwAddr", dev->name, simeth_device, local->simfd); - for(i = 0; i < ETH_ALEN; i++) { - printk(" %2.2x", dev->dev_addr[i]); - } - printk(", IRQ %d\n", dev->irq); - - return 0; -} - -/* - * actually binds the device to an interrupt vector - */ -static int -simeth_open(struct net_device *dev) -{ - if (request_irq(dev->irq, simeth_interrupt, 0, "simeth", dev)) { - printk ("simeth: unable to get IRQ %d.\n", dev->irq); - return -EAGAIN; - } - - netif_start_queue(dev); - - return 0; -} - -/* copied from lapbether.c */ -static __inline__ int dev_is_ethdev(struct net_device *dev) -{ - return ( dev->type == ARPHRD_ETHER && strncmp(dev->name, "dummy", 5)); -} - - -/* - * Handler for IFF_UP or IFF_DOWN - * - * The reason for that is that we don't want to be interrupted when the - * interface is down. There is no way to unconnect in the simualtor. Instead - * we use this function to shutdown packet processing in the frame filter - * in the simulator. Thus no interrupts are generated - * - * - * That's also the place where we pass the IP address of this device to the - * simulator so that that we can start filtering packets for it - * - * There may be a better way of doing this, but I don't know which yet. - */ -static int -simeth_device_event(struct notifier_block *this,unsigned long event, void *ptr) -{ - struct net_device *dev = (struct net_device *)ptr; - struct simeth_local *local; - struct in_device *in_dev; - struct in_ifaddr **ifap = NULL; - struct in_ifaddr *ifa = NULL; - int r; - - - if ( ! dev ) { - printk(KERN_WARNING "simeth_device_event dev=0\n"); - return NOTIFY_DONE; - } - - if ( event != NETDEV_UP && event != NETDEV_DOWN ) return NOTIFY_DONE; - - /* - * Check whether or not it's for an ethernet device - * - * XXX Fixme: This works only as long as we support one - * type of ethernet device. - */ - if ( !dev_is_ethdev(dev) ) return NOTIFY_DONE; - - if ((in_dev=dev->ip_ptr) != NULL) { - for (ifap=&in_dev->ifa_list; (ifa=*ifap) != NULL; ifap=&ifa->ifa_next) - if (strcmp(dev->name, ifa->ifa_label) == 0) break; - } - if ( ifa == NULL ) { - printk("simeth_open: can't find device %s's ifa\n", dev->name); - return NOTIFY_DONE; - } - - printk("simeth_device_event: %s ipaddr=0x%x\n", dev->name, htonl(ifa->ifa_local)); - - /* - * XXX Fix me - * if the device was up, and we're simply reconfiguring it, not sure - * we get DOWN then UP. - */ - - local = dev->priv; - /* now do it for real */ - r = event == NETDEV_UP ? - netdev_attach(local->simfd, dev->irq, htonl(ifa->ifa_local)): - netdev_detach(local->simfd); - - printk("simeth: netdev_attach/detach: event=%s ->%d\n", event == NETDEV_UP ? "attach":"detach", r); - - return NOTIFY_DONE; -} - -static int -simeth_close(struct net_device *dev) -{ - netif_stop_queue(dev); - - free_irq(dev->irq, dev); - - return 0; -} - -/* - * Only used for debug - */ -static void -frame_print(unsigned char *from, unsigned char *frame, int len) -{ - int i; - - printk("%s: (%d) %02x", from, len, frame[0] & 0xff); - for(i=1; i < 6; i++ ) { - printk(":%02x", frame[i] &0xff); - } - printk(" %2x", frame[6] &0xff); - for(i=7; i < 12; i++ ) { - printk(":%02x", frame[i] &0xff); - } - printk(" [%02x%02x]\n", frame[12], frame[13]); - - for(i=14; i < len; i++ ) { - printk("%02x ", frame[i] &0xff); - if ( (i%10)==0) printk("\n"); - } - printk("\n"); -} - - -/* - * Function used to transmit of frame, very last one on the path before - * going to the simulator. - */ -static int -simeth_tx(struct sk_buff *skb, struct net_device *dev) -{ - struct simeth_local *local = (struct simeth_local *)dev->priv; - -#if 0 - /* ensure we have at least ETH_ZLEN bytes (min frame size) */ - unsigned int length = ETH_ZLEN < skb->len ? skb->len : ETH_ZLEN; - /* Where do the extra padding bytes comes from inthe skbuff ? */ -#else - /* the real driver in the host system is going to take care of that - * or maybe it's the NIC itself. - */ - unsigned int length = skb->len; -#endif - - local->stats.tx_bytes += skb->len; - local->stats.tx_packets++; - - - if (simeth_debug > 5) frame_print("simeth_tx", skb->data, length); - - netdev_send(local->simfd, skb->data, length); - - /* - * we are synchronous on write, so we don't simulate a - * trasnmit complete interrupt, thus we don't need to arm a tx - */ - - dev_kfree_skb(skb); - return 0; -} - -static inline struct sk_buff * -make_new_skb(struct net_device *dev) -{ - struct sk_buff *nskb; - - /* - * The +2 is used to make sure that the IP header is nicely - * aligned (on 4byte boundary I assume 14+2=16) - */ - nskb = dev_alloc_skb(SIMETH_FRAME_SIZE + 2); - if ( nskb == NULL ) { - printk(KERN_NOTICE "%s: memory squeeze. dropping packet.\n", dev->name); - return NULL; - } - nskb->dev = dev; - - skb_reserve(nskb, 2); /* Align IP on 16 byte boundaries */ - - skb_put(nskb,SIMETH_FRAME_SIZE); - - return nskb; -} - -/* - * called from interrupt handler to process a received frame - */ -static int -simeth_rx(struct net_device *dev) -{ - struct simeth_local *local; - struct sk_buff *skb; - int len; - int rcv_count = SIMETH_RECV_MAX; - - local = (struct simeth_local *)dev->priv; - /* - * the loop concept has been borrowed from other drivers - * looks to me like it's a throttling thing to avoid pushing to many - * packets at one time into the stack. Making sure we can process them - * upstream and make forward progress overall - */ - do { - if ( (skb=make_new_skb(dev)) == NULL ) { - printk(KERN_NOTICE "%s: memory squeeze. dropping packet.\n", dev->name); - local->stats.rx_dropped++; - return 0; - } - /* - * Read only one frame at a time - */ - len = netdev_read(local->simfd, skb->data, SIMETH_FRAME_SIZE); - if ( len == 0 ) { - if ( simeth_debug > 0 ) printk(KERN_WARNING "%s: count=%d netdev_read=0\n", dev->name, SIMETH_RECV_MAX-rcv_count); - break; - } -#if 0 - /* - * XXX Fix me - * Should really do a csum+copy here - */ - memcpy(skb->data, frame, len); -#endif - skb->protocol = eth_type_trans(skb, dev); - - if ( simeth_debug > 6 ) frame_print("simeth_rx", skb->data, len); - - /* - * push the packet up & trigger software interrupt - */ - netif_rx(skb); - - local->stats.rx_packets++; - local->stats.rx_bytes += len; - - } while ( --rcv_count ); - - return len; /* 0 = nothing left to read, otherwise, we can try again */ -} - -/* - * Interrupt handler (Yes, we can do it too !!!) - */ -static void -simeth_interrupt(int irq, void *dev_id, struct pt_regs * regs) -{ - struct net_device *dev = dev_id; - - if ( dev == NULL ) { - printk(KERN_WARNING "simeth: irq %d for unknown device\n", irq); - return; - } - - /* - * very simple loop because we get interrupts only when receving - */ - while (simeth_rx(dev)); -} - -static struct net_device_stats * -simeth_get_stats(struct net_device *dev) -{ - struct simeth_local *local = (struct simeth_local *) dev->priv; - - return &local->stats; -} - -/* fake multicast ability */ -static void -set_multicast_list(struct net_device *dev) -{ - printk(KERN_WARNING "%s: set_multicast_list called\n", dev->name); -} - -#ifdef CONFIG_NET_FASTROUTE -static int -simeth_accept_fastpath(struct net_device *dev, struct dst_entry *dst) -{ - printk(KERN_WARNING "%s: simeth_accept_fastpath called\n", dev->name); - return -1; -} -#endif - -__initcall(simeth_probe); diff -Nru a/arch/ia64/hp/simscsi.c b/arch/ia64/hp/simscsi.c --- a/arch/ia64/hp/simscsi.c Mon Apr 15 15:07:57 2002 +++ /dev/null Wed Dec 31 16:00:00 1969 @@ -1,368 +0,0 @@ -/* - * Simulated SCSI driver. - * - * Copyright (C) 1999, 2001-2002 Hewlett-Packard Co - * David Mosberger-Tang - * Stephane Eranian - * - * 02/01/15 David Mosberger Updated for v2.5.1 - * 99/12/18 David Mosberger Added support for READ10/WRITE10 needed by linux v2.3.33 - */ -#include -#include -#include -#include -#include -#include - -#include - -#include - -#include "../drivers/scsi/scsi.h" -#include "../drivers/scsi/sd.h" -#include "../drivers/scsi/hosts.h" -#include "simscsi.h" - -#define DEBUG_SIMSCSI 1 - -/* Simulator system calls: */ - -#define SSC_OPEN 50 -#define SSC_CLOSE 51 -#define SSC_READ 52 -#define SSC_WRITE 53 -#define SSC_GET_COMPLETION 54 -#define SSC_WAIT_COMPLETION 55 - -#define SSC_WRITE_ACCESS 2 -#define SSC_READ_ACCESS 1 - -#if DEBUG_SIMSCSI - int simscsi_debug; -# define DBG simscsi_debug -#else -# define DBG 0 -#endif - -static struct Scsi_Host *host; - -static void simscsi_interrupt (unsigned long val); -DECLARE_TASKLET(simscsi_tasklet, simscsi_interrupt, 0); - -struct disk_req { - unsigned long addr; - unsigned len; -}; - -struct disk_stat { - int fd; - unsigned count; -}; - -extern long ia64_ssc (long arg0, long arg1, long arg2, long arg3, int nr); - -static int desc[8] = { -1, -1, -1, -1, -1, -1, -1, -1 }; - -static struct queue_entry { - Scsi_Cmnd *sc; -} queue[SIMSCSI_REQ_QUEUE_LEN]; - -static int rd, wr; -static atomic_t num_reqs = ATOMIC_INIT(0); - -/* base name for default disks */ -static char *simscsi_root = DEFAULT_SIMSCSI_ROOT; - -#define MAX_ROOT_LEN 128 - -/* - * used to setup a new base for disk images - * to use /foo/bar/disk[a-z] as disk images - * you have to specify simscsi=/foo/bar/disk on the command line - */ -static int __init -simscsi_setup (char *s) -{ - /* XXX Fix me we may need to strcpy() ? */ - if (strlen(s) > MAX_ROOT_LEN) { - printk("simscsi_setup: prefix too long---using default %s\n", simscsi_root); - } - simscsi_root = s; - return 1; -} - -__setup("simscsi=", simscsi_setup); - -static void -simscsi_interrupt (unsigned long val) -{ - Scsi_Cmnd *sc; - - while ((sc = queue[rd].sc) != 0) { - atomic_dec(&num_reqs); - queue[rd].sc = 0; - if (DBG) - printk("simscsi_interrupt: done with %ld\n", sc->serial_number); - (*sc->scsi_done)(sc); - rd = (rd + 1) % SIMSCSI_REQ_QUEUE_LEN; - } -} - -int -simscsi_detect (Scsi_Host_Template *templ) -{ - templ->proc_name = "simscsi"; - host = scsi_register(templ, 0); - return 1; /* fake one SCSI host adapter */ -} - -int -simscsi_release (struct Scsi_Host *host) -{ - return 0; /* this is easy... */ -} - -const char * -simscsi_info (struct Scsi_Host *host) -{ - return "simulated SCSI host adapter"; -} - -int -simscsi_abort (Scsi_Cmnd *cmd) -{ - printk ("simscsi_abort: unimplemented\n"); - return SCSI_ABORT_SUCCESS; -} - -int -simscsi_reset (Scsi_Cmnd *cmd, unsigned int reset_flags) -{ - printk ("simscsi_reset: unimplemented\n"); - return SCSI_RESET_SUCCESS; -} - -int -simscsi_biosparam (Disk *disk, kdev_t n, int ip[]) -{ - int size = disk->capacity; - - ip[0] = 64; - ip[1] = 32; - ip[2] = size >> 11; - return 0; -} - -static void -simscsi_readwrite (Scsi_Cmnd *sc, int mode, unsigned long offset, unsigned long len) -{ - struct disk_stat stat; - struct disk_req req; - - req.addr = __pa(sc->request_buffer); - req.len = len; /* # of bytes to transfer */ - - if (sc->request_bufflen < req.len) - return; - - stat.fd = desc[sc->target]; - if (DBG) - printk("simscsi_%s @ %lx (off %lx)\n", - mode == SSC_READ ? "read":"write", req.addr, offset); - ia64_ssc(stat.fd, 1, __pa(&req), offset, mode); - ia64_ssc(__pa(&stat), 0, 0, 0, SSC_WAIT_COMPLETION); - - if (stat.count == req.len) { - sc->result = GOOD; - } else { - sc->result = DID_ERROR << 16; - } -} - -static void -simscsi_sg_readwrite (Scsi_Cmnd *sc, int mode, unsigned long offset) -{ - int list_len = sc->use_sg; - struct scatterlist *sl = (struct scatterlist *)sc->buffer; - struct disk_stat stat; - struct disk_req req; - - stat.fd = desc[sc->target]; - - while (list_len) { - req.addr = __pa(page_address(sl->page) + sl->offset); - req.len = sl->length; - if (DBG) - printk("simscsi_sg_%s @ %lx (off %lx) use_sg=%d len=%d\n", - mode == SSC_READ ? "read":"write", req.addr, offset, - list_len, sl->length); - ia64_ssc(stat.fd, 1, __pa(&req), offset, mode); - ia64_ssc(__pa(&stat), 0, 0, 0, SSC_WAIT_COMPLETION); - - /* should not happen in our case */ - if (stat.count != req.len) { - sc->result = DID_ERROR << 16; - return; - } - offset += sl->length; - sl++; - list_len--; - } - sc->result = GOOD; -} - -/* - * function handling both READ_6/WRITE_6 (non-scatter/gather mode) - * commands. - * Added 02/26/99 S.Eranian - */ -static void -simscsi_readwrite6 (Scsi_Cmnd *sc, int mode) -{ - unsigned long offset; - - offset = (((sc->cmnd[1] & 0x1f) << 16) | (sc->cmnd[2] << 8) | sc->cmnd[3])*512; - if (sc->use_sg > 0) - simscsi_sg_readwrite(sc, mode, offset); - else - simscsi_readwrite(sc, mode, offset, sc->cmnd[4]*512); -} - - -static void -simscsi_readwrite10 (Scsi_Cmnd *sc, int mode) -{ - unsigned long offset; - - offset = ( (sc->cmnd[2] << 24) | (sc->cmnd[3] << 16) - | (sc->cmnd[4] << 8) | (sc->cmnd[5] << 0))*512; - if (sc->use_sg > 0) - simscsi_sg_readwrite(sc, mode, offset); - else - simscsi_readwrite(sc, mode, offset, ((sc->cmnd[7] << 8) | sc->cmnd[8])*512); -} - -int -simscsi_queuecommand (Scsi_Cmnd *sc, void (*done)(Scsi_Cmnd *)) -{ - char fname[MAX_ROOT_LEN+16]; - char *buf; -#if DEBUG_SIMSCSI - register long sp asm ("sp"); - - if (DBG) - printk("simscsi_queuecommand: target=%d,cmnd=%u,sc=%lu,sp=%lx,done=%p\n", - sc->target, sc->cmnd[0], sc->serial_number, sp, done); -#endif - - sc->result = DID_BAD_TARGET << 16; - sc->scsi_done = done; - if (sc->target <= 7 && sc->lun == 0) { - switch (sc->cmnd[0]) { - case INQUIRY: - if (sc->request_bufflen < 35) { - break; - } - sprintf (fname, "%s%c", simscsi_root, 'a' + sc->target); - desc[sc->target] = ia64_ssc (__pa(fname), SSC_READ_ACCESS|SSC_WRITE_ACCESS, - 0, 0, SSC_OPEN); - if (desc[sc->target] < 0) { - /* disk doesn't exist... */ - break; - } - buf = sc->request_buffer; - buf[0] = 0; /* magnetic disk */ - buf[1] = 0; /* not a removable medium */ - buf[2] = 2; /* SCSI-2 compliant device */ - buf[3] = 2; /* SCSI-2 response data format */ - buf[4] = 31; /* additional length (bytes) */ - buf[5] = 0; /* reserved */ - buf[6] = 0; /* reserved */ - buf[7] = 0; /* various flags */ - memcpy(buf + 8, "HP SIMULATED DISK 0.00", 28); - sc->result = GOOD; - break; - - case TEST_UNIT_READY: - sc->result = GOOD; - break; - - case READ_6: - if (desc[sc->target] < 0 ) - break; - simscsi_readwrite6(sc, SSC_READ); - break; - - case READ_10: - if (desc[sc->target] < 0 ) - break; - simscsi_readwrite10(sc, SSC_READ); - break; - - case WRITE_6: - if (desc[sc->target] < 0) - break; - simscsi_readwrite6(sc, SSC_WRITE); - break; - - case WRITE_10: - if (desc[sc->target] < 0) - break; - simscsi_readwrite10(sc, SSC_WRITE); - break; - - - case READ_CAPACITY: - if (desc[sc->target] < 0 || sc->request_bufflen < 8) { - break; - } - buf = sc->request_buffer; - - /* pretend to be a 1GB disk (partition table contains real stuff): */ - buf[0] = 0x00; - buf[1] = 0x1f; - buf[2] = 0xff; - buf[3] = 0xff; - /* set block size of 512 bytes: */ - buf[4] = 0; - buf[5] = 0; - buf[6] = 2; - buf[7] = 0; - sc->result = GOOD; - break; - - case MODE_SENSE: - printk("MODE_SENSE\n"); - break; - - case START_STOP: - printk("START_STOP\n"); - break; - - default: - panic("simscsi: unknown SCSI command %u\n", sc->cmnd[0]); - } - } - if (sc->result == DID_BAD_TARGET) { - sc->result |= DRIVER_SENSE << 24; - sc->sense_buffer[0] = 0x70; - sc->sense_buffer[2] = 0x00; - } - if (atomic_read(&num_reqs) >= SIMSCSI_REQ_QUEUE_LEN) { - panic("Attempt to queue command while command is pending!!"); - } - atomic_inc(&num_reqs); - queue[wr].sc = sc; - wr = (wr + 1) % SIMSCSI_REQ_QUEUE_LEN; - - tasklet_schedule(&simscsi_tasklet); - return 0; -} - - -static Scsi_Host_Template driver_template = SIMSCSI; - -#define __initcall(fn) late_initcall(fn) - -#include "../drivers/scsi/scsi_module.c" diff -Nru a/arch/ia64/hp/simscsi.h b/arch/ia64/hp/simscsi.h --- a/arch/ia64/hp/simscsi.h Mon Apr 15 15:07:56 2002 +++ /dev/null Wed Dec 31 16:00:00 1969 @@ -1,39 +0,0 @@ -/* - * Simulated SCSI driver. - * - * Copyright (C) 1999 Hewlett-Packard Co - * David Mosberger-Tang - */ -#ifndef SIMSCSI_H -#define SIMSCSI_H - -#define SIMSCSI_REQ_QUEUE_LEN 64 - -#define DEFAULT_SIMSCSI_ROOT "/var/ski-disks/sd" - -extern int simscsi_detect (Scsi_Host_Template *); -extern int simscsi_release (struct Scsi_Host *); -extern const char *simscsi_info (struct Scsi_Host *); -extern int simscsi_queuecommand (Scsi_Cmnd *, void (*done)(Scsi_Cmnd *)); -extern int simscsi_abort (Scsi_Cmnd *); -extern int simscsi_reset (Scsi_Cmnd *, unsigned int); -extern int simscsi_biosparam (Disk *, kdev_t, int[]); - -#define SIMSCSI { \ - detect: simscsi_detect, \ - release: simscsi_release, \ - info: simscsi_info, \ - queuecommand: simscsi_queuecommand, \ - abort: simscsi_abort, \ - reset: simscsi_reset, \ - bios_param: simscsi_biosparam, \ - can_queue: SIMSCSI_REQ_QUEUE_LEN, \ - this_id: -1, \ - sg_tablesize: SG_ALL, \ - cmd_per_lun: SIMSCSI_REQ_QUEUE_LEN, \ - present: 0, \ - unchecked_isa_dma: 0, \ - use_clustering: DISABLE_CLUSTERING \ -} - -#endif /* SIMSCSI_H */ diff -Nru a/arch/ia64/hp/simserial.c b/arch/ia64/hp/simserial.c --- a/arch/ia64/hp/simserial.c Mon Apr 15 15:07:57 2002 +++ /dev/null Wed Dec 31 16:00:00 1969 @@ -1,1104 +0,0 @@ -/* - * Simulated Serial Driver (fake serial) - * - * This driver is mostly used for bringup purposes and will go away. - * It has a strong dependency on the system console. All outputs - * are rerouted to the same facility as the one used by printk which, in our - * case means sys_sim.c console (goes via the simulator). The code hereafter - * is completely leveraged from the serial.c driver. - * - * Copyright (C) 1999-2000 Hewlett-Packard Co - * Copyright (C) 1999 Stephane Eranian - * Copyright (C) 2000 David Mosberger-Tang - * - * 02/04/00 D. Mosberger Merged in serial.c bug fixes in rs_close(). - * 02/25/00 D. Mosberger Synced up with 2.3.99pre-5 version of serial.c. - */ - -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include - -#include -#include - -#ifdef CONFIG_KDB -# include -#endif - -#undef SIMSERIAL_DEBUG /* define this to get some debug information */ - -#define KEYBOARD_INTR 3 /* must match with simulator! */ - -#define NR_PORTS 1 /* only one port for now */ -#define SERIAL_INLINE 1 - -#ifdef SERIAL_INLINE -#define _INLINE_ inline -#endif - -#ifndef MIN -#define MIN(a,b) ((a) < (b) ? (a) : (b)) -#endif - -#define IRQ_T(info) ((info->flags & ASYNC_SHARE_IRQ) ? SA_SHIRQ : SA_INTERRUPT) - -#define SSC_GETCHAR 21 - -extern long ia64_ssc (long, long, long, long, int); -extern void ia64_ssc_connect_irq (long intr, long irq); - -static char *serial_name = "SimSerial driver"; -static char *serial_version = "0.6"; - -/* - * This has been extracted from asm/serial.h. We need one eventually but - * I don't know exactly what we're going to put in it so just fake one - * for now. - */ -#define BASE_BAUD ( 1843200 / 16 ) - -#define STD_COM_FLAGS (ASYNC_BOOT_AUTOCONF | ASYNC_SKIP_TEST) - -/* - * Most of the values here are meaningless to this particular driver. - * However some values must be preserved for the code (leveraged from serial.c - * to work correctly). - * port must not be 0 - * type must not be UNKNOWN - * So I picked arbitrary (guess from where?) values instead - */ -static struct serial_state rs_table[NR_PORTS]={ - /* UART CLK PORT IRQ FLAGS */ - { 0, BASE_BAUD, 0x3F8, 0, STD_COM_FLAGS,0,PORT_16550 } /* ttyS0 */ -}; - -/* - * Just for the fun of it ! - */ -static struct serial_uart_config uart_config[] = { - { "unknown", 1, 0 }, - { "8250", 1, 0 }, - { "16450", 1, 0 }, - { "16550", 1, 0 }, - { "16550A", 16, UART_CLEAR_FIFO | UART_USE_FIFO }, - { "cirrus", 1, 0 }, - { "ST16650", 1, UART_CLEAR_FIFO | UART_STARTECH }, - { "ST16650V2", 32, UART_CLEAR_FIFO | UART_USE_FIFO | - UART_STARTECH }, - { "TI16750", 64, UART_CLEAR_FIFO | UART_USE_FIFO}, - { 0, 0} -}; - -static struct tty_driver serial_driver, callout_driver; -static int serial_refcount; - -static struct async_struct *IRQ_ports[NR_IRQS]; -static struct tty_struct *serial_table[NR_PORTS]; -static struct termios *serial_termios[NR_PORTS]; -static struct termios *serial_termios_locked[NR_PORTS]; - -static struct console *console; - -static unsigned char *tmp_buf; -static DECLARE_MUTEX(tmp_buf_sem); - -extern struct console *console_drivers; /* from kernel/printk.c */ - -/* - * ------------------------------------------------------------ - * rs_stop() and rs_start() - * - * This routines are called before setting or resetting tty->stopped. - * They enable or disable transmitter interrupts, as necessary. - * ------------------------------------------------------------ - */ -static void rs_stop(struct tty_struct *tty) -{ -#ifdef SIMSERIAL_DEBUG - printk("rs_stop: tty->stopped=%d tty->hw_stopped=%d tty->flow_stopped=%d\n", - tty->stopped, tty->hw_stopped, tty->flow_stopped); -#endif - -} - -static void rs_start(struct tty_struct *tty) -{ -#if SIMSERIAL_DEBUG - printk("rs_start: tty->stopped=%d tty->hw_stopped=%d tty->flow_stopped=%d\n", - tty->stopped, tty->hw_stopped, tty->flow_stopped); -#endif -} - -static void receive_chars(struct tty_struct *tty, struct pt_regs *regs) -{ - unsigned char ch; - static unsigned char seen_esc = 0; - - while ( (ch = ia64_ssc(0, 0, 0, 0, SSC_GETCHAR)) ) { - if ( ch == 27 && seen_esc == 0 ) { - seen_esc = 1; - continue; - } else { - if ( seen_esc==1 && ch == 'O' ) { - seen_esc = 2; - continue; - } else if ( seen_esc == 2 ) { - if ( ch == 'P' ) show_state(); /* F1 key */ - if ( ch == 'Q' ) show_buffers(); /* F2 key */ -#ifdef CONFIG_KDB - if ( ch == 'S' ) - kdb(KDB_REASON_KEYBOARD, 0, (kdb_eframe_t) regs); -#endif - - seen_esc = 0; - continue; - } - } - seen_esc = 0; - if (tty->flip.count >= TTY_FLIPBUF_SIZE) break; - - *tty->flip.char_buf_ptr = ch; - - *tty->flip.flag_buf_ptr = 0; - - tty->flip.flag_buf_ptr++; - tty->flip.char_buf_ptr++; - tty->flip.count++; - } - tty_flip_buffer_push(tty); -} - -/* - * This is the serial driver's interrupt routine for a single port - */ -static void rs_interrupt_single(int irq, void *dev_id, struct pt_regs * regs) -{ - struct async_struct * info; - - /* - * I don't know exactly why they don't use the dev_id opaque data - * pointer instead of this extra lookup table - */ - info = IRQ_ports[irq]; - if (!info || !info->tty) { - printk("simrs_interrupt_single: info|tty=0 info=%p problem\n", info); - return; - } - /* - * pretty simple in our case, because we only get interrupts - * on inbound traffic - */ - receive_chars(info->tty, regs); -} - -/* - * ------------------------------------------------------------------- - * Here ends the serial interrupt routines. - * ------------------------------------------------------------------- - */ - -#if 0 -/* - * not really used in our situation so keep them commented out for now - */ -static DECLARE_TASK_QUEUE(tq_serial); /* used to be at the top of the file */ -static void do_serial_bh(void) -{ - run_task_queue(&tq_serial); - printk("do_serial_bh: called\n"); -} -#endif - -static void do_softint(void *private_) -{ - printk("simserial: do_softint called\n"); -} - -static void rs_put_char(struct tty_struct *tty, unsigned char ch) -{ - struct async_struct *info = (struct async_struct *)tty->driver_data; - unsigned long flags; - - if (!tty || !info->xmit.buf) return; - - save_flags(flags); cli(); - if (CIRC_SPACE(info->xmit.head, info->xmit.tail, SERIAL_XMIT_SIZE) == 0) { - restore_flags(flags); - return; - } - info->xmit.buf[info->xmit.head] = ch; - info->xmit.head = (info->xmit.head + 1) & (SERIAL_XMIT_SIZE-1); - restore_flags(flags); -} - -static _INLINE_ void transmit_chars(struct async_struct *info, int *intr_done) -{ - int count; - unsigned long flags; - - save_flags(flags); cli(); - - if (info->x_char) { - char c = info->x_char; - - console->write(console, &c, 1); - - info->state->icount.tx++; - info->x_char = 0; - - goto out; - } - - if (info->xmit.head == info->xmit.tail || info->tty->stopped || info->tty->hw_stopped) { -#ifdef SIMSERIAL_DEBUG - printk("transmit_chars: head=%d, tail=%d, stopped=%d\n", - info->xmit.head, info->xmit.tail, info->tty->stopped); -#endif - goto out; - } - /* - * We removed the loop and try to do it in to chunks. We need - * 2 operations maximum because it's a ring buffer. - * - * First from current to tail if possible. - * Then from the beginning of the buffer until necessary - */ - - count = MIN(CIRC_CNT(info->xmit.head, info->xmit.tail, SERIAL_XMIT_SIZE), - SERIAL_XMIT_SIZE - info->xmit.tail); - console->write(console, info->xmit.buf+info->xmit.tail, count); - - info->xmit.tail = (info->xmit.tail+count) & (SERIAL_XMIT_SIZE-1); - - /* - * We have more at the beginning of the buffer - */ - count = CIRC_CNT(info->xmit.head, info->xmit.tail, SERIAL_XMIT_SIZE); - if (count) { - console->write(console, info->xmit.buf, count); - info->xmit.tail += count; - } -out: - restore_flags(flags); -} - -static void rs_flush_chars(struct tty_struct *tty) -{ - struct async_struct *info = (struct async_struct *)tty->driver_data; - - if (info->xmit.head == info->xmit.tail || tty->stopped || tty->hw_stopped || - !info->xmit.buf) - return; - - transmit_chars(info, NULL); -} - - -static int rs_write(struct tty_struct * tty, int from_user, - const unsigned char *buf, int count) -{ - int c, ret = 0; - struct async_struct *info = (struct async_struct *)tty->driver_data; - unsigned long flags; - - if (!tty || !info->xmit.buf || !tmp_buf) return 0; - - save_flags(flags); - if (from_user) { - down(&tmp_buf_sem); - while (1) { - int c1; - c = CIRC_SPACE_TO_END(info->xmit.head, info->xmit.tail, SERIAL_XMIT_SIZE); - if (count < c) - c = count; - if (c <= 0) - break; - - c -= copy_from_user(tmp_buf, buf, c); - if (!c) { - if (!ret) - ret = -EFAULT; - break; - } - cli(); - c1 = CIRC_SPACE_TO_END(info->xmit.head, info->xmit.tail, SERIAL_XMIT_SIZE); - if (c1 < c) - c = c1; - memcpy(info->xmit.buf + info->xmit.head, tmp_buf, c); - info->xmit.head = ((info->xmit.head + c) & - (SERIAL_XMIT_SIZE-1)); - restore_flags(flags); - buf += c; - count -= c; - ret += c; - } - up(&tmp_buf_sem); - } else { - cli(); - while (1) { - c = CIRC_SPACE_TO_END(info->xmit.head, info->xmit.tail, SERIAL_XMIT_SIZE); - if (count < c) - c = count; - if (c <= 0) { - break; - } - memcpy(info->xmit.buf + info->xmit.head, buf, c); - info->xmit.head = ((info->xmit.head + c) & - (SERIAL_XMIT_SIZE-1)); - buf += c; - count -= c; - ret += c; - } - restore_flags(flags); - } - /* - * Hey, we transmit directly from here in our case - */ - if (CIRC_CNT(info->xmit.head, info->xmit.tail, SERIAL_XMIT_SIZE) - && !tty->stopped && !tty->hw_stopped) { - transmit_chars(info, NULL); - } - return ret; -} - -static int rs_write_room(struct tty_struct *tty) -{ - struct async_struct *info = (struct async_struct *)tty->driver_data; - - return CIRC_SPACE(info->xmit.head, info->xmit.tail, SERIAL_XMIT_SIZE); -} - -static int rs_chars_in_buffer(struct tty_struct *tty) -{ - struct async_struct *info = (struct async_struct *)tty->driver_data; - - return CIRC_CNT(info->xmit.head, info->xmit.tail, SERIAL_XMIT_SIZE); -} - -static void rs_flush_buffer(struct tty_struct *tty) -{ - struct async_struct *info = (struct async_struct *)tty->driver_data; - unsigned long flags; - - save_flags(flags); cli(); - info->xmit.head = info->xmit.tail = 0; - restore_flags(flags); - - wake_up_interruptible(&tty->write_wait); - - if ((tty->flags & (1 << TTY_DO_WRITE_WAKEUP)) && - tty->ldisc.write_wakeup) - (tty->ldisc.write_wakeup)(tty); -} - -/* - * This function is used to send a high-priority XON/XOFF character to - * the device - */ -static void rs_send_xchar(struct tty_struct *tty, char ch) -{ - struct async_struct *info = (struct async_struct *)tty->driver_data; - - info->x_char = ch; - if (ch) { - /* - * I guess we could call console->write() directly but - * let's do that for now. - */ - transmit_chars(info, NULL); - } -} - -/* - * ------------------------------------------------------------ - * rs_throttle() - * - * This routine is called by the upper-layer tty layer to signal that - * incoming characters should be throttled. - * ------------------------------------------------------------ - */ -static void rs_throttle(struct tty_struct * tty) -{ - if (I_IXOFF(tty)) rs_send_xchar(tty, STOP_CHAR(tty)); - - printk("simrs_throttle called\n"); -} - -static void rs_unthrottle(struct tty_struct * tty) -{ - struct async_struct *info = (struct async_struct *)tty->driver_data; - - if (I_IXOFF(tty)) { - if (info->x_char) - info->x_char = 0; - else - rs_send_xchar(tty, START_CHAR(tty)); - } - printk("simrs_unthrottle called\n"); -} - -/* - * rs_break() --- routine which turns the break handling on or off - */ -static void rs_break(struct tty_struct *tty, int break_state) -{ -} - -static int rs_ioctl(struct tty_struct *tty, struct file * file, - unsigned int cmd, unsigned long arg) -{ - if ((cmd != TIOCGSERIAL) && (cmd != TIOCSSERIAL) && - (cmd != TIOCSERCONFIG) && (cmd != TIOCSERGSTRUCT) && - (cmd != TIOCMIWAIT) && (cmd != TIOCGICOUNT)) { - if (tty->flags & (1 << TTY_IO_ERROR)) - return -EIO; - } - - switch (cmd) { - case TIOCMGET: - printk("rs_ioctl: TIOCMGET called\n"); - return -EINVAL; - case TIOCMBIS: - case TIOCMBIC: - case TIOCMSET: - printk("rs_ioctl: TIOCMBIS/BIC/SET called\n"); - return -EINVAL; - case TIOCGSERIAL: - printk("simrs_ioctl TIOCGSERIAL called\n"); - return 0; - case TIOCSSERIAL: - printk("simrs_ioctl TIOCSSERIAL called\n"); - return 0; - case TIOCSERCONFIG: - printk("rs_ioctl: TIOCSERCONFIG called\n"); - return -EINVAL; - - case TIOCSERGETLSR: /* Get line status register */ - printk("rs_ioctl: TIOCSERGETLSR called\n"); - return -EINVAL; - - case TIOCSERGSTRUCT: - printk("rs_ioctl: TIOCSERGSTRUCT called\n"); -#if 0 - if (copy_to_user((struct async_struct *) arg, - info, sizeof(struct async_struct))) - return -EFAULT; -#endif - return 0; - - /* - * Wait for any of the 4 modem inputs (DCD,RI,DSR,CTS) to change - * - mask passed in arg for lines of interest - * (use |'ed TIOCM_RNG/DSR/CD/CTS for masking) - * Caller should use TIOCGICOUNT to see which one it was - */ - case TIOCMIWAIT: - printk("rs_ioctl: TIOCMIWAIT: called\n"); - return 0; - /* - * Get counter of input serial line interrupts (DCD,RI,DSR,CTS) - * Return: write counters to the user passed counter struct - * NB: both 1->0 and 0->1 transitions are counted except for - * RI where only 0->1 is counted. - */ - case TIOCGICOUNT: - printk("rs_ioctl: TIOCGICOUNT called\n"); - return 0; - - case TIOCSERGWILD: - case TIOCSERSWILD: - /* "setserial -W" is called in Debian boot */ - printk ("TIOCSER?WILD ioctl obsolete, ignored.\n"); - return 0; - - default: - return -ENOIOCTLCMD; - } - return 0; -} - -#define RELEVANT_IFLAG(iflag) (iflag & (IGNBRK|BRKINT|IGNPAR|PARMRK|INPCK)) - -static void rs_set_termios(struct tty_struct *tty, struct termios *old_termios) -{ - unsigned int cflag = tty->termios->c_cflag; - - if ( (cflag == old_termios->c_cflag) - && ( RELEVANT_IFLAG(tty->termios->c_iflag) - == RELEVANT_IFLAG(old_termios->c_iflag))) - return; - - - /* Handle turning off CRTSCTS */ - if ((old_termios->c_cflag & CRTSCTS) && - !(tty->termios->c_cflag & CRTSCTS)) { - tty->hw_stopped = 0; - rs_start(tty); - } -} -/* - * This routine will shutdown a serial port; interrupts are disabled, and - * DTR is dropped if the hangup on close termio flag is on. - */ -static void shutdown(struct async_struct * info) -{ - unsigned long flags; - struct serial_state *state; - int retval; - - if (!(info->flags & ASYNC_INITIALIZED)) return; - - state = info->state; - -#ifdef SIMSERIAL_DEBUG - printk("Shutting down serial port %d (irq %d)....", info->line, - state->irq); -#endif - - save_flags(flags); cli(); /* Disable interrupts */ - - /* - * First unlink the serial port from the IRQ chain... - */ - if (info->next_port) - info->next_port->prev_port = info->prev_port; - if (info->prev_port) - info->prev_port->next_port = info->next_port; - else - IRQ_ports[state->irq] = info->next_port; - - /* - * Free the IRQ, if necessary - */ - if (state->irq && (!IRQ_ports[state->irq] || - !IRQ_ports[state->irq]->next_port)) { - if (IRQ_ports[state->irq]) { - free_irq(state->irq, NULL); - retval = request_irq(state->irq, rs_interrupt_single, - IRQ_T(info), "serial", NULL); - - if (retval) - printk("serial shutdown: request_irq: error %d" - " Couldn't reacquire IRQ.\n", retval); - } else - free_irq(state->irq, NULL); - } - - if (info->xmit.buf) { - free_page((unsigned long) info->xmit.buf); - info->xmit.buf = 0; - } - - if (info->tty) set_bit(TTY_IO_ERROR, &info->tty->flags); - - info->flags &= ~ASYNC_INITIALIZED; - restore_flags(flags); -} - -/* - * ------------------------------------------------------------ - * rs_close() - * - * This routine is called when the serial port gets closed. First, we - * wait for the last remaining data to be sent. Then, we unlink its - * async structure from the interrupt chain if necessary, and we free - * that IRQ if nothing is left in the chain. - * ------------------------------------------------------------ - */ -static void rs_close(struct tty_struct *tty, struct file * filp) -{ - struct async_struct * info = (struct async_struct *)tty->driver_data; - struct serial_state *state; - unsigned long flags; - - if (!info ) return; - - state = info->state; - - save_flags(flags); cli(); - - if (tty_hung_up_p(filp)) { -#ifdef SIMSERIAL_DEBUG - printk("rs_close: hung_up\n"); -#endif - MOD_DEC_USE_COUNT; - restore_flags(flags); - return; - } -#ifdef SIMSERIAL_DEBUG - printk("rs_close ttys%d, count = %d\n", info->line, state->count); -#endif - if ((tty->count == 1) && (state->count != 1)) { - /* - * Uh, oh. tty->count is 1, which means that the tty - * structure will be freed. state->count should always - * be one in these conditions. If it's greater than - * one, we've got real problems, since it means the - * serial port won't be shutdown. - */ - printk("rs_close: bad serial port count; tty->count is 1, " - "state->count is %d\n", state->count); - state->count = 1; - } - if (--state->count < 0) { - printk("rs_close: bad serial port count for ttys%d: %d\n", - info->line, state->count); - state->count = 0; - } - if (state->count) { - MOD_DEC_USE_COUNT; - restore_flags(flags); - return; - } - info->flags |= ASYNC_CLOSING; - restore_flags(flags); - - /* - * Now we wait for the transmit buffer to clear; and we notify - * the line discipline to only process XON/XOFF characters. - */ - shutdown(info); - if (tty->driver.flush_buffer) tty->driver.flush_buffer(tty); - if (tty->ldisc.flush_buffer) tty->ldisc.flush_buffer(tty); - info->event = 0; - info->tty = 0; - if (info->blocked_open) { - if (info->close_delay) { - current->state = TASK_INTERRUPTIBLE; - schedule_timeout(info->close_delay); - } - wake_up_interruptible(&info->open_wait); - } - info->flags &= ~(ASYNC_NORMAL_ACTIVE|ASYNC_CALLOUT_ACTIVE|ASYNC_CLOSING); - wake_up_interruptible(&info->close_wait); - MOD_DEC_USE_COUNT; -} - -/* - * rs_wait_until_sent() --- wait until the transmitter is empty - */ -static void rs_wait_until_sent(struct tty_struct *tty, int timeout) -{ -} - - -/* - * rs_hangup() --- called by tty_hangup() when a hangup is signaled. - */ -static void rs_hangup(struct tty_struct *tty) -{ - struct async_struct * info = (struct async_struct *)tty->driver_data; - struct serial_state *state = info->state; - -#ifdef SIMSERIAL_DEBUG - printk("rs_hangup: called\n"); -#endif - - state = info->state; - - rs_flush_buffer(tty); - if (info->flags & ASYNC_CLOSING) - return; - shutdown(info); - - info->event = 0; - state->count = 0; - info->flags &= ~(ASYNC_NORMAL_ACTIVE|ASYNC_CALLOUT_ACTIVE); - info->tty = 0; - wake_up_interruptible(&info->open_wait); -} - - -static int get_async_struct(int line, struct async_struct **ret_info) -{ - struct async_struct *info; - struct serial_state *sstate; - - sstate = rs_table + line; - sstate->count++; - if (sstate->info) { - *ret_info = sstate->info; - return 0; - } - info = kmalloc(sizeof(struct async_struct), GFP_KERNEL); - if (!info) { - sstate->count--; - return -ENOMEM; - } - memset(info, 0, sizeof(struct async_struct)); - init_waitqueue_head(&info->open_wait); - init_waitqueue_head(&info->close_wait); - init_waitqueue_head(&info->delta_msr_wait); - info->magic = SERIAL_MAGIC; - info->port = sstate->port; - info->flags = sstate->flags; - info->xmit_fifo_size = sstate->xmit_fifo_size; - info->line = line; - info->tqueue.routine = do_softint; - info->tqueue.data = info; - info->state = sstate; - if (sstate->info) { - kfree(info); - *ret_info = sstate->info; - return 0; - } - *ret_info = sstate->info = info; - return 0; -} - -static int -startup(struct async_struct *info) -{ - unsigned long flags; - int retval=0; - void (*handler)(int, void *, struct pt_regs *); - struct serial_state *state= info->state; - unsigned long page; - - page = get_free_page(GFP_KERNEL); - if (!page) - return -ENOMEM; - - save_flags(flags); cli(); - - if (info->flags & ASYNC_INITIALIZED) { - free_page(page); - goto errout; - } - - if (!state->port || !state->type) { - if (info->tty) set_bit(TTY_IO_ERROR, &info->tty->flags); - free_page(page); - goto errout; - } - if (info->xmit.buf) - free_page(page); - else - info->xmit.buf = (unsigned char *) page; - -#ifdef SIMSERIAL_DEBUG - printk("startup: ttys%d (irq %d)...", info->line, state->irq); -#endif - - /* - * Allocate the IRQ if necessary - */ - if (state->irq && (!IRQ_ports[state->irq] || - !IRQ_ports[state->irq]->next_port)) { - if (IRQ_ports[state->irq]) { - retval = -EBUSY; - goto errout; - } else - handler = rs_interrupt_single; - - retval = request_irq(state->irq, handler, IRQ_T(info), - "simserial", NULL); - if (retval) { - if (capable(CAP_SYS_ADMIN)) { - if (info->tty) - set_bit(TTY_IO_ERROR, - &info->tty->flags); - retval = 0; - } - goto errout; - } - } - - /* - * Insert serial port into IRQ chain. - */ - info->prev_port = 0; - info->next_port = IRQ_ports[state->irq]; - if (info->next_port) - info->next_port->prev_port = info; - IRQ_ports[state->irq] = info; - - if (info->tty) clear_bit(TTY_IO_ERROR, &info->tty->flags); - - info->xmit.head = info->xmit.tail = 0; - -#if 0 - /* - * Set up serial timers... - */ - timer_table[RS_TIMER].expires = jiffies + 2*HZ/100; - timer_active |= 1 << RS_TIMER; -#endif - - /* - * Set up the tty->alt_speed kludge - */ - if (info->tty) { - if ((info->flags & ASYNC_SPD_MASK) == ASYNC_SPD_HI) - info->tty->alt_speed = 57600; - if ((info->flags & ASYNC_SPD_MASK) == ASYNC_SPD_VHI) - info->tty->alt_speed = 115200; - if ((info->flags & ASYNC_SPD_MASK) == ASYNC_SPD_SHI) - info->tty->alt_speed = 230400; - if ((info->flags & ASYNC_SPD_MASK) == ASYNC_SPD_WARP) - info->tty->alt_speed = 460800; - } - - info->flags |= ASYNC_INITIALIZED; - restore_flags(flags); - return 0; - -errout: - restore_flags(flags); - return retval; -} - - -/* - * This routine is called whenever a serial port is opened. It - * enables interrupts for a serial port, linking in its async structure into - * the IRQ chain. It also performs the serial-specific - * initialization for the tty structure. - */ -static int rs_open(struct tty_struct *tty, struct file * filp) -{ - struct async_struct *info; - int retval, line; - unsigned long page; - - MOD_INC_USE_COUNT; - line = minor(tty->device) - tty->driver.minor_start; - if ((line < 0) || (line >= NR_PORTS)) { - MOD_DEC_USE_COUNT; - return -ENODEV; - } - retval = get_async_struct(line, &info); - if (retval) { - MOD_DEC_USE_COUNT; - return retval; - } - tty->driver_data = info; - info->tty = tty; - -#ifdef SIMSERIAL_DEBUG - printk("rs_open %s%d, count = %d\n", tty->driver.name, info->line, - info->state->count); -#endif - info->tty->low_latency = (info->flags & ASYNC_LOW_LATENCY) ? 1 : 0; - - if (!tmp_buf) { - page = get_free_page(GFP_KERNEL); - if (!page) { - /* MOD_DEC_USE_COUNT; "info->tty" will cause this? */ - return -ENOMEM; - } - if (tmp_buf) - free_page(page); - else - tmp_buf = (unsigned char *) page; - } - - /* - * If the port is the middle of closing, bail out now - */ - if (tty_hung_up_p(filp) || - (info->flags & ASYNC_CLOSING)) { - if (info->flags & ASYNC_CLOSING) - interruptible_sleep_on(&info->close_wait); - /* MOD_DEC_USE_COUNT; "info->tty" will cause this? */ -#ifdef SERIAL_DO_RESTART - return ((info->flags & ASYNC_HUP_NOTIFY) ? - -EAGAIN : -ERESTARTSYS); -#else - return -EAGAIN; -#endif - } - - /* - * Start up serial port - */ - retval = startup(info); - if (retval) { - /* MOD_DEC_USE_COUNT; "info->tty" will cause this? */ - return retval; - } - - if ((info->state->count == 1) && - (info->flags & ASYNC_SPLIT_TERMIOS)) { - if (tty->driver.subtype == SERIAL_TYPE_NORMAL) - *tty->termios = info->state->normal_termios; - else - *tty->termios = info->state->callout_termios; - } - - /* - * figure out which console to use (should be one already) - */ - console = console_drivers; - while (console) { - if ((console->flags & CON_ENABLED) && console->write) break; - console = console->next; - } - - info->session = current->session; - info->pgrp = current->pgrp; - -#ifdef SIMSERIAL_DEBUG - printk("rs_open ttys%d successful\n", info->line); -#endif - return 0; -} - -/* - * /proc fs routines.... - */ - -static inline int line_info(char *buf, struct serial_state *state) -{ - return sprintf(buf, "%d: uart:%s port:%lX irq:%d\n", - state->line, uart_config[state->type].name, - state->port, state->irq); -} - -static int rs_read_proc(char *page, char **start, off_t off, int count, - int *eof, void *data) -{ - int i, len = 0, l; - off_t begin = 0; - - len += sprintf(page, "simserinfo:1.0 driver:%s\n", serial_version); - for (i = 0; i < NR_PORTS && len < 4000; i++) { - l = line_info(page + len, &rs_table[i]); - len += l; - if (len+begin > off+count) - goto done; - if (len+begin < off) { - begin += len; - len = 0; - } - } - *eof = 1; -done: - if (off >= len+begin) - return 0; - *start = page + (begin-off); - return ((count < begin+len-off) ? count : begin+len-off); -} - -/* - * --------------------------------------------------------------------- - * rs_init() and friends - * - * rs_init() is called at boot-time to initialize the serial driver. - * --------------------------------------------------------------------- - */ - -/* - * This routine prints out the appropriate serial driver version - * number, and identifies which options were configured into this - * driver. - */ -static inline void show_serial_version(void) -{ - printk(KERN_INFO "%s version %s with", serial_name, serial_version); - printk(" no serial options enabled\n"); -} - -/* - * The serial driver boot-time initialization code! - */ -static int __init -simrs_init (void) -{ - int i; - struct serial_state *state; - - show_serial_version(); - - /* Initialize the tty_driver structure */ - - memset(&serial_driver, 0, sizeof(struct tty_driver)); - serial_driver.magic = TTY_DRIVER_MAGIC; - serial_driver.driver_name = "simserial"; - serial_driver.name = "ttyS"; - serial_driver.major = TTY_MAJOR; - serial_driver.minor_start = 64; - serial_driver.num = 1; - serial_driver.type = TTY_DRIVER_TYPE_SERIAL; - serial_driver.subtype = SERIAL_TYPE_NORMAL; - serial_driver.init_termios = tty_std_termios; - serial_driver.init_termios.c_cflag = - B9600 | CS8 | CREAD | HUPCL | CLOCAL; - serial_driver.flags = TTY_DRIVER_REAL_RAW; - serial_driver.refcount = &serial_refcount; - serial_driver.table = serial_table; - serial_driver.termios = serial_termios; - serial_driver.termios_locked = serial_termios_locked; - - serial_driver.open = rs_open; - serial_driver.close = rs_close; - serial_driver.write = rs_write; - serial_driver.put_char = rs_put_char; - serial_driver.flush_chars = rs_flush_chars; - serial_driver.write_room = rs_write_room; - serial_driver.chars_in_buffer = rs_chars_in_buffer; - serial_driver.flush_buffer = rs_flush_buffer; - serial_driver.ioctl = rs_ioctl; - serial_driver.throttle = rs_throttle; - serial_driver.unthrottle = rs_unthrottle; - serial_driver.send_xchar = rs_send_xchar; - serial_driver.set_termios = rs_set_termios; - serial_driver.stop = rs_stop; - serial_driver.start = rs_start; - serial_driver.hangup = rs_hangup; - serial_driver.break_ctl = rs_break; - serial_driver.wait_until_sent = rs_wait_until_sent; - serial_driver.read_proc = rs_read_proc; - - /* - * Let's have a little bit of fun ! - */ - for (i = 0, state = rs_table; i < NR_PORTS; i++,state++) { - - if (state->type == PORT_UNKNOWN) continue; - - if (!state->irq) { - state->irq = ia64_alloc_irq(); - ia64_ssc_connect_irq(KEYBOARD_INTR, state->irq); - } - - printk(KERN_INFO "ttyS%02d at 0x%04lx (irq = %d) is a %s\n", - state->line, - state->port, state->irq, - uart_config[state->type].name); - } - /* - * The callout device is just like normal device except for - * major number and the subtype code. - */ - callout_driver = serial_driver; - callout_driver.name = "cua"; - callout_driver.major = TTYAUX_MAJOR; - callout_driver.subtype = SERIAL_TYPE_CALLOUT; - callout_driver.read_proc = 0; - callout_driver.proc_entry = 0; - - if (tty_register_driver(&serial_driver)) - panic("Couldn't register simserial driver\n"); - - if (tty_register_driver(&callout_driver)) - panic("Couldn't register callout driver\n"); - - return 0; -} - -#ifndef MODULE -__initcall(simrs_init); -#endif diff -Nru a/arch/ia64/hp/zx1/Makefile b/arch/ia64/hp/zx1/Makefile --- /dev/null Wed Dec 31 16:00:00 1969 +++ b/arch/ia64/hp/zx1/Makefile Mon Apr 15 15:07:57 2002 @@ -0,0 +1,26 @@ +# +# ia64/platform/hp/zx1/Makefile +# +# Copyright (C) 2002 Hewlett Packard +# Copyright (C) Alex Williamson (alex_williamson@hp.com) +# + +O_TARGET := zx1.o + +obj-y := hpzx1_misc.o +obj-$(CONFIG_IA64_GENERIC) += hpzx1_machvec.o + +include $(TOPDIR)/Rules.make +# +# ia64/platform/hp/zx1/Makefile +# +# Copyright (C) 2002 Hewlett Packard +# Copyright (C) Alex Williamson (alex_williamson@hp.com) +# + +O_TARGET := zx1.o + +obj-y := hpzx1_misc.o +obj-$(CONFIG_IA64_GENERIC) += hpzx1_machvec.o + +include $(TOPDIR)/Rules.make diff -Nru a/arch/ia64/hp/zx1/hpzx1_machvec.c b/arch/ia64/hp/zx1/hpzx1_machvec.c --- /dev/null Wed Dec 31 16:00:00 1969 +++ b/arch/ia64/hp/zx1/hpzx1_machvec.c Mon Apr 15 15:07:57 2002 @@ -0,0 +1,4 @@ +#define MACHVEC_PLATFORM_NAME hpzx1 +#include +#define MACHVEC_PLATFORM_NAME hpzx1 +#include diff -Nru a/arch/ia64/hp/zx1/hpzx1_misc.c b/arch/ia64/hp/zx1/hpzx1_misc.c --- /dev/null Wed Dec 31 16:00:00 1969 +++ b/arch/ia64/hp/zx1/hpzx1_misc.c Mon Apr 15 15:07:57 2002 @@ -0,0 +1,800 @@ +/* + * Misc. support for HP zx1 chipset support + * + * Copyright (C) 2002 Hewlett-Packard Co + * Copyright (C) 2002 Alex Williamson + * Copyright (C) 2002 Bjorn Helgaas + */ + + +#include +#include +#include +#include +#include +#include +#include + +#include "../drivers/acpi/include/platform/acgcc.h" +#include "../drivers/acpi/include/actypes.h" +#include "../drivers/acpi/include/acexcep.h" +#include "../drivers/acpi/include/acpixf.h" +#include "../drivers/acpi/include/actbl.h" +#include "../drivers/acpi/include/acconfig.h" +#include "../drivers/acpi/include/acmacros.h" +#include "../drivers/acpi/include/aclocal.h" +#include "../drivers/acpi/include/acobject.h" +#include "../drivers/acpi/include/acstruct.h" +#include "../drivers/acpi/include/acnamesp.h" +#include "../drivers/acpi/include/acutils.h" + +#define PFX "hpzx1: " + +struct fake_pci_dev { + struct fake_pci_dev *next; + unsigned char bus; + unsigned int devfn; + int sizing; // in middle of BAR sizing operation? + unsigned long csr_base; + unsigned int csr_size; + unsigned long mapped_csrs; // ioremapped +}; + +static struct fake_pci_dev *fake_pci_head, **fake_pci_tail = &fake_pci_head; + +static struct pci_ops orig_pci_ops; + +static inline struct fake_pci_dev * +fake_pci_find_slot(unsigned char bus, unsigned int devfn) +{ + struct fake_pci_dev *dev; + + for (dev = fake_pci_head; dev; dev = dev->next) + if (dev->bus == bus && dev->devfn == devfn) + return dev; + return NULL; +} + +static struct fake_pci_dev * +alloc_fake_pci_dev(void) +{ + struct fake_pci_dev *dev; + + dev = kmalloc(sizeof(*dev), GFP_KERNEL); + if (!dev) + return NULL; + + memset(dev, 0, sizeof(*dev)); + + *fake_pci_tail = dev; + fake_pci_tail = &dev->next; + + return dev; +} + +#define HP_CFG_RD(sz, bits, name) \ +static int hp_cfg_read##sz (struct pci_dev *dev, int where, u##bits *value) \ +{ \ + struct fake_pci_dev *fake_dev; \ + if (!(fake_dev = fake_pci_find_slot(dev->bus->number, dev->devfn))) \ + return orig_pci_ops.name(dev, where, value); \ + \ + switch (where) { \ + case PCI_COMMAND: \ + *value = read##sz(fake_dev->mapped_csrs + where); \ + *value |= PCI_COMMAND_MEMORY; /* SBA omits this */ \ + break; \ + case PCI_BASE_ADDRESS_0: \ + if (fake_dev->sizing) \ + *value = ~(fake_dev->csr_size - 1); \ + else \ + *value = (fake_dev->csr_base & \ + PCI_BASE_ADDRESS_MEM_MASK) | \ + PCI_BASE_ADDRESS_SPACE_MEMORY; \ + fake_dev->sizing = 0; \ + break; \ + default: \ + *value = read##sz(fake_dev->mapped_csrs + where); \ + break; \ + } \ + return PCIBIOS_SUCCESSFUL; \ +} + +#define HP_CFG_WR(sz, bits, name) \ +static int hp_cfg_write##sz (struct pci_dev *dev, int where, u##bits value) \ +{ \ + struct fake_pci_dev *fake_dev; \ + if (!(fake_dev = fake_pci_find_slot(dev->bus->number, dev->devfn))) \ + return orig_pci_ops.name(dev, where, value); \ + \ + switch (where) { \ + case PCI_BASE_ADDRESS_0: \ + if (value == ~0) \ + fake_dev->sizing = 1; \ + break; \ + default: \ + write##sz(value, fake_dev->mapped_csrs + where); \ + break; \ + } \ + return PCIBIOS_SUCCESSFUL; \ +} + +HP_CFG_RD(b, 8, read_byte) +HP_CFG_RD(w, 16, read_word) +HP_CFG_RD(l, 32, read_dword) +HP_CFG_WR(b, 8, write_byte) +HP_CFG_WR(w, 16, write_word) +HP_CFG_WR(l, 32, write_dword) + +static struct pci_ops hp_pci_conf = { + hp_cfg_readb, + hp_cfg_readw, + hp_cfg_readl, + hp_cfg_writeb, + hp_cfg_writew, + hp_cfg_writel, +}; + +/* + * Assume we'll never have a physical slot higher than 0x10, so we can + * use slots above that for "fake" PCI devices to represent things + * that only show up in the ACPI namespace. + */ +#define HP_MAX_SLOT 0x10 + +static struct fake_pci_dev * +hpzx1_fake_pci_dev(unsigned long addr, unsigned int bus, unsigned int size) +{ + struct fake_pci_dev *dev; + int slot; + + // Note: lspci thinks 0x1f is invalid + for (slot = 0x1e; slot > HP_MAX_SLOT; slot--) { + if (!fake_pci_find_slot(bus, PCI_DEVFN(slot, 0))) + break; + } + if (slot == HP_MAX_SLOT) { + printk(KERN_ERR PFX + "no slot space for device (0x%p) on bus 0x%02x\n", + (void *) addr, bus); + return NULL; + } + + dev = alloc_fake_pci_dev(); + if (!dev) { + printk(KERN_ERR PFX + "no memory for device (0x%p) on bus 0x%02x\n", + (void *) addr, bus); + return NULL; + } + + dev->bus = bus; + dev->devfn = PCI_DEVFN(slot, 0); + dev->csr_base = addr; + dev->csr_size = size; + + /* + * Drivers should ioremap what they need, but we have to do + * it here, too, so PCI config accesses work. + */ + dev->mapped_csrs = ioremap(dev->csr_base, dev->csr_size); + + return dev; +} + +typedef struct { + u8 guid_id; + u8 guid[16]; + u8 csr_base[8]; + u8 csr_length[8]; +} acpi_hp_vendor_long; + +#define HP_CCSR_LENGTH 0x21 +#define HP_CCSR_TYPE 0x2 +#define HP_CCSR_GUID EFI_GUID(0x69e9adf9, 0x924f, 0xab5f, \ + 0xf6, 0x4a, 0x24, 0xd2, 0x01, 0x37, 0x0e, 0xad) + +extern acpi_status acpi_get_crs(acpi_handle, acpi_buffer *); +extern acpi_resource *acpi_get_crs_next(acpi_buffer *, int *); +extern acpi_resource_data *acpi_get_crs_type(acpi_buffer *, int *, int); +extern void acpi_dispose_crs(acpi_buffer *); +extern acpi_status acpi_cf_evaluate_method(acpi_handle, UINT8 *, NATIVE_UINT *); + +static acpi_status +hp_csr_space(acpi_handle obj, u64 *csr_base, u64 *csr_length) +{ + int i, offset = 0; + acpi_status status; + acpi_buffer buf; + acpi_resource_vendor *res; + acpi_hp_vendor_long *hp_res; + efi_guid_t vendor_guid; + + *csr_base = 0; + *csr_length = 0; + + status = acpi_get_crs(obj, &buf); + if (status != AE_OK) { + printk(KERN_ERR PFX "Unable to get _CRS data on object\n"); + return status; + } + + res = (acpi_resource_vendor *)acpi_get_crs_type(&buf, &offset, ACPI_RSTYPE_VENDOR); + if (!res) { + printk(KERN_ERR PFX "Failed to find config space for device\n"); + acpi_dispose_crs(&buf); + return AE_NOT_FOUND; + } + + hp_res = (acpi_hp_vendor_long *)(res->reserved); + + if (res->length != HP_CCSR_LENGTH || hp_res->guid_id != HP_CCSR_TYPE) { + printk(KERN_ERR PFX "Unknown Vendor data\n"); + acpi_dispose_crs(&buf); + return AE_TYPE; /* Revisit error? */ + } + + memcpy(&vendor_guid, hp_res->guid, sizeof(efi_guid_t)); + if (efi_guidcmp(vendor_guid, HP_CCSR_GUID) != 0) { + printk(KERN_ERR PFX "Vendor GUID does not match\n"); + acpi_dispose_crs(&buf); + return AE_TYPE; /* Revisit error? */ + } + + for (i = 0 ; i < 8 ; i++) { + *csr_base |= ((u64)(hp_res->csr_base[i]) << (i * 8)); + *csr_length |= ((u64)(hp_res->csr_length[i]) << (i * 8)); + } + + acpi_dispose_crs(&buf); + + return AE_OK; +} + +static acpi_status +hpzx1_sba_probe(acpi_handle obj, u32 depth, void *context, void **ret) +{ + u64 csr_base = 0, csr_length = 0; + char *name = context; + struct fake_pci_dev *dev; + acpi_status status; + + status = hp_csr_space(obj, &csr_base, &csr_length); + + if (status != AE_OK) + return status; + + /* + * Only SBA shows up in ACPI namespace, so its CSR space + * includes both SBA and IOC. Make SBA and IOC show up + * separately in PCI space. + */ + if ((dev = hpzx1_fake_pci_dev(csr_base, 0, 0x1000))) + printk(KERN_INFO PFX "%s SBA at 0x%lx; pci dev %02x:%02x.%d\n", + name, csr_base, dev->bus, + PCI_SLOT(dev->devfn), PCI_FUNC(dev->devfn)); + if ((dev = hpzx1_fake_pci_dev(csr_base + 0x1000, 0, 0x1000))) + printk(KERN_INFO PFX "%s IOC at 0x%lx; pci dev %02x:%02x.%d\n", + name, csr_base + 0x1000, dev->bus, + PCI_SLOT(dev->devfn), PCI_FUNC(dev->devfn)); + + return AE_OK; +} + +static acpi_status +hpzx1_lba_probe(acpi_handle obj, u32 depth, void *context, void **ret) +{ + acpi_status status; + u64 csr_base = 0, csr_length = 0; + char *name = context; + NATIVE_UINT busnum = 0; + struct fake_pci_dev *dev; + + status = hp_csr_space(obj, &csr_base, &csr_length); + + if (status != AE_OK) + return status; + + status = acpi_cf_evaluate_method(obj, METHOD_NAME__BBN, &busnum); + if (ACPI_FAILURE(status)) { + printk(KERN_ERR PFX "evaluate _BBN fail=0x%x\n", status); + busnum = 0; // no _BBN; stick it on bus 0 + } + + if ((dev = hpzx1_fake_pci_dev(csr_base, busnum, csr_length))) + printk(KERN_INFO PFX "%s LBA at 0x%lx, _BBN 0x%02x; " + "pci dev %02x:%02x.%d\n", + name, csr_base, busnum, dev->bus, + PCI_SLOT(dev->devfn), PCI_FUNC(dev->devfn)); + + return AE_OK; +} + +static void +hpzx1_acpi_dev_init(void) +{ + extern struct pci_ops pci_conf; + + /* + * Make fake PCI devices for the following hardware in the + * ACPI namespace. This makes it more convenient for drivers + * because they can claim these devices based on PCI + * information, rather than needing to know about ACPI. The + * 64-bit "HPA" space for this hardware is available as BAR + * 0/1. + * + * HWP0001: Single IOC SBA w/o IOC in namespace + * HWP0002: LBA device + * HWP0003: AGP LBA device + */ + acpi_get_devices("HWP0001", hpzx1_sba_probe, "HWP0001", NULL); +#ifdef CONFIG_IA64_HP_PROTO + if (fake_pci_tail != &fake_pci_head) { +#endif + acpi_get_devices("HWP0002", hpzx1_lba_probe, "HWP0002", NULL); + acpi_get_devices("HWP0003", hpzx1_lba_probe, "HWP0003", NULL); + +#ifdef CONFIG_IA64_HP_PROTO + } + +#define ZX1_FUNC_ID_VALUE (PCI_DEVICE_ID_HP_ZX1_SBA << 16) | PCI_VENDOR_ID_HP + /* + * Early protos don't have bridges in the ACPI namespace, so + * if we didn't find anything, add the things we know are + * there. + */ + if (fake_pci_tail == &fake_pci_head) { + u64 hpa, csr_base; + struct fake_pci_dev *dev; + + csr_base = 0xfed00000UL; + hpa = (u64) ioremap(csr_base, 0x1000); + if (__raw_readl(hpa) == ZX1_FUNC_ID_VALUE) { + if ((dev = hpzx1_fake_pci_dev(csr_base, 0, 0x1000))) + printk(KERN_INFO PFX "HWP0001 SBA at 0x%lx; " + "pci dev %02x:%02x.%d\n", csr_base, + dev->bus, PCI_SLOT(dev->devfn), + PCI_FUNC(dev->devfn)); + if ((dev = hpzx1_fake_pci_dev(csr_base + 0x1000, 0, + 0x1000))) + printk(KERN_INFO PFX "HWP0001 IOC at 0x%lx; " + "pci dev %02x:%02x.%d\n", + csr_base + 0x1000, + dev->bus, PCI_SLOT(dev->devfn), + PCI_FUNC(dev->devfn)); + + csr_base = 0xfed24000UL; + iounmap(hpa); + hpa = (u64) ioremap(csr_base, 0x1000); + if ((dev = hpzx1_fake_pci_dev(csr_base, 0x40, 0x1000))) + printk(KERN_INFO PFX "HWP0003 AGP LBA at " + "0x%lx; pci dev %02x:%02x.%d\n", + csr_base, + dev->bus, PCI_SLOT(dev->devfn), + PCI_FUNC(dev->devfn)); + } + iounmap(hpa); + } +#endif + + if (fake_pci_tail == &fake_pci_head) + return; + + /* + * Replace PCI ops, but only if we made fake devices. + */ + orig_pci_ops = pci_conf; + pci_conf = hp_pci_conf; +} + +extern void sba_init(void); + +void +hpzx1_pci_fixup (int phase) +{ + if (phase == 0) + hpzx1_acpi_dev_init(); + iosapic_pci_fixup(phase); + if (phase == 1) + sba_init(); +} +/* + * Misc. support for HP zx1 chipset support + * + * Copyright (C) 2002 Hewlett-Packard Co + * Copyright (C) 2002 Alex Williamson + * Copyright (C) 2002 Bjorn Helgaas + */ + + +#include +#include +#include +#include +#include +#include +#include + +#include "../drivers/acpi/include/platform/acgcc.h" +#include "../drivers/acpi/include/actypes.h" +#include "../drivers/acpi/include/acexcep.h" +#include "../drivers/acpi/include/acpixf.h" +#include "../drivers/acpi/include/actbl.h" +#include "../drivers/acpi/include/acconfig.h" +#include "../drivers/acpi/include/acmacros.h" +#include "../drivers/acpi/include/aclocal.h" +#include "../drivers/acpi/include/acobject.h" +#include "../drivers/acpi/include/acstruct.h" +#include "../drivers/acpi/include/acnamesp.h" +#include "../drivers/acpi/include/acutils.h" + +#define PFX "hpzx1: " + +struct fake_pci_dev { + struct fake_pci_dev *next; + unsigned char bus; + unsigned int devfn; + int sizing; // in middle of BAR sizing operation? + unsigned long csr_base; + unsigned int csr_size; + unsigned long mapped_csrs; // ioremapped +}; + +static struct fake_pci_dev *fake_pci_head, **fake_pci_tail = &fake_pci_head; + +static struct pci_ops orig_pci_ops; + +static inline struct fake_pci_dev * +fake_pci_find_slot(unsigned char bus, unsigned int devfn) +{ + struct fake_pci_dev *dev; + + for (dev = fake_pci_head; dev; dev = dev->next) + if (dev->bus == bus && dev->devfn == devfn) + return dev; + return NULL; +} + +static struct fake_pci_dev * +alloc_fake_pci_dev(void) +{ + struct fake_pci_dev *dev; + + dev = kmalloc(sizeof(*dev), GFP_KERNEL); + if (!dev) + return NULL; + + memset(dev, 0, sizeof(*dev)); + + *fake_pci_tail = dev; + fake_pci_tail = &dev->next; + + return dev; +} + +#define HP_CFG_RD(sz, bits, name) \ +static int hp_cfg_read##sz (struct pci_dev *dev, int where, u##bits *value) \ +{ \ + struct fake_pci_dev *fake_dev; \ + if (!(fake_dev = fake_pci_find_slot(dev->bus->number, dev->devfn))) \ + return orig_pci_ops.name(dev, where, value); \ + \ + switch (where) { \ + case PCI_COMMAND: \ + *value = read##sz(fake_dev->mapped_csrs + where); \ + *value |= PCI_COMMAND_MEMORY; /* SBA omits this */ \ + break; \ + case PCI_BASE_ADDRESS_0: \ + if (fake_dev->sizing) \ + *value = ~(fake_dev->csr_size - 1); \ + else \ + *value = (fake_dev->csr_base & \ + PCI_BASE_ADDRESS_MEM_MASK) | \ + PCI_BASE_ADDRESS_SPACE_MEMORY; \ + fake_dev->sizing = 0; \ + break; \ + default: \ + *value = read##sz(fake_dev->mapped_csrs + where); \ + break; \ + } \ + return PCIBIOS_SUCCESSFUL; \ +} + +#define HP_CFG_WR(sz, bits, name) \ +static int hp_cfg_write##sz (struct pci_dev *dev, int where, u##bits value) \ +{ \ + struct fake_pci_dev *fake_dev; \ + if (!(fake_dev = fake_pci_find_slot(dev->bus->number, dev->devfn))) \ + return orig_pci_ops.name(dev, where, value); \ + \ + switch (where) { \ + case PCI_BASE_ADDRESS_0: \ + if (value == ~0) \ + fake_dev->sizing = 1; \ + break; \ + default: \ + write##sz(value, fake_dev->mapped_csrs + where); \ + break; \ + } \ + return PCIBIOS_SUCCESSFUL; \ +} + +HP_CFG_RD(b, 8, read_byte) +HP_CFG_RD(w, 16, read_word) +HP_CFG_RD(l, 32, read_dword) +HP_CFG_WR(b, 8, write_byte) +HP_CFG_WR(w, 16, write_word) +HP_CFG_WR(l, 32, write_dword) + +static struct pci_ops hp_pci_conf = { + hp_cfg_readb, + hp_cfg_readw, + hp_cfg_readl, + hp_cfg_writeb, + hp_cfg_writew, + hp_cfg_writel, +}; + +/* + * Assume we'll never have a physical slot higher than 0x10, so we can + * use slots above that for "fake" PCI devices to represent things + * that only show up in the ACPI namespace. + */ +#define HP_MAX_SLOT 0x10 + +static struct fake_pci_dev * +hpzx1_fake_pci_dev(unsigned long addr, unsigned int bus, unsigned int size) +{ + struct fake_pci_dev *dev; + int slot; + + // Note: lspci thinks 0x1f is invalid + for (slot = 0x1e; slot > HP_MAX_SLOT; slot--) { + if (!fake_pci_find_slot(bus, PCI_DEVFN(slot, 0))) + break; + } + if (slot == HP_MAX_SLOT) { + printk(KERN_ERR PFX + "no slot space for device (0x%p) on bus 0x%02x\n", + (void *) addr, bus); + return NULL; + } + + dev = alloc_fake_pci_dev(); + if (!dev) { + printk(KERN_ERR PFX + "no memory for device (0x%p) on bus 0x%02x\n", + (void *) addr, bus); + return NULL; + } + + dev->bus = bus; + dev->devfn = PCI_DEVFN(slot, 0); + dev->csr_base = addr; + dev->csr_size = size; + + /* + * Drivers should ioremap what they need, but we have to do + * it here, too, so PCI config accesses work. + */ + dev->mapped_csrs = (unsigned long) ioremap(dev->csr_base, dev->csr_size); + + return dev; +} + +typedef struct { + u8 guid_id; + u8 guid[16]; + u8 csr_base[8]; + u8 csr_length[8]; +} acpi_hp_vendor_long; + +#define HP_CCSR_LENGTH 0x21 +#define HP_CCSR_TYPE 0x2 +#define HP_CCSR_GUID \ + ((efi_guid_t) { 0x69e9adf9, 0x924f, 0xab5f, { 0xf6, 0x4a, 0x24, 0xd2, 0x01, 0x37, 0x0e, 0xad }}) + +extern acpi_status acpi_get_crs(acpi_handle, acpi_buffer *); +extern acpi_resource *acpi_get_crs_next(acpi_buffer *, int *); +extern acpi_resource_data *acpi_get_crs_type(acpi_buffer *, int *, int); +extern void acpi_dispose_crs(acpi_buffer *); +extern acpi_status acpi_cf_evaluate_method(acpi_handle, UINT8 *, NATIVE_UINT *); + +static acpi_status +hp_csr_space(acpi_handle obj, u64 *csr_base, u64 *csr_length) +{ + int i, offset = 0; + acpi_status status; + acpi_buffer buf; + acpi_resource_vendor *res; + acpi_hp_vendor_long *hp_res; + efi_guid_t vendor_guid; + + *csr_base = 0; + *csr_length = 0; + + status = acpi_get_crs(obj, &buf); + if (status != AE_OK) { + printk(KERN_ERR PFX "Unable to get _CRS data on object\n"); + return status; + } + + res = (acpi_resource_vendor *)acpi_get_crs_type(&buf, &offset, ACPI_RSTYPE_VENDOR); + if (!res) { + printk(KERN_ERR PFX "Failed to find config space for device\n"); + acpi_dispose_crs(&buf); + return AE_NOT_FOUND; + } + + hp_res = (acpi_hp_vendor_long *)(res->reserved); + + if (res->length != HP_CCSR_LENGTH || hp_res->guid_id != HP_CCSR_TYPE) { + printk(KERN_ERR PFX "Unknown Vendor data\n"); + acpi_dispose_crs(&buf); + return AE_TYPE; /* Revisit error? */ + } + + memcpy(&vendor_guid, hp_res->guid, sizeof(efi_guid_t)); + if (efi_guidcmp(vendor_guid, HP_CCSR_GUID) != 0) { + printk(KERN_ERR PFX "Vendor GUID does not match\n"); + acpi_dispose_crs(&buf); + return AE_TYPE; /* Revisit error? */ + } + + for (i = 0 ; i < 8 ; i++) { + *csr_base |= ((u64)(hp_res->csr_base[i]) << (i * 8)); + *csr_length |= ((u64)(hp_res->csr_length[i]) << (i * 8)); + } + + acpi_dispose_crs(&buf); + + return AE_OK; +} + +static acpi_status +hpzx1_sba_probe(acpi_handle obj, u32 depth, void *context, void **ret) +{ + u64 csr_base = 0, csr_length = 0; + char *name = context; + struct fake_pci_dev *dev; + acpi_status status; + + status = hp_csr_space(obj, &csr_base, &csr_length); + + if (status != AE_OK) + return status; + + /* + * Only SBA shows up in ACPI namespace, so its CSR space + * includes both SBA and IOC. Make SBA and IOC show up + * separately in PCI space. + */ + if ((dev = hpzx1_fake_pci_dev(csr_base, 0, 0x1000))) + printk(KERN_INFO PFX "%s SBA at 0x%lx; pci dev %02x:%02x.%d\n", + name, csr_base, dev->bus, + PCI_SLOT(dev->devfn), PCI_FUNC(dev->devfn)); + if ((dev = hpzx1_fake_pci_dev(csr_base + 0x1000, 0, 0x1000))) + printk(KERN_INFO PFX "%s IOC at 0x%lx; pci dev %02x:%02x.%d\n", + name, csr_base + 0x1000, dev->bus, + PCI_SLOT(dev->devfn), PCI_FUNC(dev->devfn)); + + return AE_OK; +} + +static acpi_status +hpzx1_lba_probe(acpi_handle obj, u32 depth, void *context, void **ret) +{ + acpi_status status; + u64 csr_base = 0, csr_length = 0; + char *name = context; + NATIVE_UINT busnum = 0; + struct fake_pci_dev *dev; + + status = hp_csr_space(obj, &csr_base, &csr_length); + + if (status != AE_OK) + return status; + + status = acpi_cf_evaluate_method(obj, METHOD_NAME__BBN, &busnum); + if (ACPI_FAILURE(status)) { + printk(KERN_ERR PFX "evaluate _BBN fail=0x%x\n", status); + busnum = 0; // no _BBN; stick it on bus 0 + } + + if ((dev = hpzx1_fake_pci_dev(csr_base, busnum, csr_length))) + printk(KERN_INFO PFX "%s LBA at 0x%lx, _BBN 0x%02x; " + "pci dev %02x:%02x.%d\n", + name, csr_base, busnum, dev->bus, + PCI_SLOT(dev->devfn), PCI_FUNC(dev->devfn)); + + return AE_OK; +} + +static void +hpzx1_acpi_dev_init(void) +{ + extern struct pci_ops pci_conf; + + /* + * Make fake PCI devices for the following hardware in the + * ACPI namespace. This makes it more convenient for drivers + * because they can claim these devices based on PCI + * information, rather than needing to know about ACPI. The + * 64-bit "HPA" space for this hardware is available as BAR + * 0/1. + * + * HWP0001: Single IOC SBA w/o IOC in namespace + * HWP0002: LBA device + * HWP0003: AGP LBA device + */ + acpi_get_devices("HWP0001", hpzx1_sba_probe, "HWP0001", NULL); +#ifdef CONFIG_IA64_HP_PROTO + if (fake_pci_tail != &fake_pci_head) { +#endif + acpi_get_devices("HWP0002", hpzx1_lba_probe, "HWP0002", NULL); + acpi_get_devices("HWP0003", hpzx1_lba_probe, "HWP0003", NULL); + +#ifdef CONFIG_IA64_HP_PROTO + } + +#define ZX1_FUNC_ID_VALUE (PCI_DEVICE_ID_HP_ZX1_SBA << 16) | PCI_VENDOR_ID_HP + /* + * Early protos don't have bridges in the ACPI namespace, so + * if we didn't find anything, add the things we know are + * there. + */ + if (fake_pci_tail == &fake_pci_head) { + u64 hpa, csr_base; + struct fake_pci_dev *dev; + + csr_base = 0xfed00000UL; + hpa = (u64) ioremap(csr_base, 0x1000); + if (__raw_readl(hpa) == ZX1_FUNC_ID_VALUE) { + if ((dev = hpzx1_fake_pci_dev(csr_base, 0, 0x1000))) + printk(KERN_INFO PFX "HWP0001 SBA at 0x%lx; " + "pci dev %02x:%02x.%d\n", csr_base, + dev->bus, PCI_SLOT(dev->devfn), + PCI_FUNC(dev->devfn)); + if ((dev = hpzx1_fake_pci_dev(csr_base + 0x1000, 0, + 0x1000))) + printk(KERN_INFO PFX "HWP0001 IOC at 0x%lx; " + "pci dev %02x:%02x.%d\n", + csr_base + 0x1000, + dev->bus, PCI_SLOT(dev->devfn), + PCI_FUNC(dev->devfn)); + + csr_base = 0xfed24000UL; + iounmap(hpa); + hpa = (u64) ioremap(csr_base, 0x1000); + if ((dev = hpzx1_fake_pci_dev(csr_base, 0x40, 0x1000))) + printk(KERN_INFO PFX "HWP0003 AGP LBA at " + "0x%lx; pci dev %02x:%02x.%d\n", + csr_base, + dev->bus, PCI_SLOT(dev->devfn), + PCI_FUNC(dev->devfn)); + } + iounmap(hpa); + } +#endif + + if (fake_pci_tail == &fake_pci_head) + return; + + /* + * Replace PCI ops, but only if we made fake devices. + */ + orig_pci_ops = pci_conf; + pci_conf = hp_pci_conf; +} + +extern void sba_init(void); + +void +hpzx1_pci_fixup (int phase) +{ + if (phase == 0) + hpzx1_acpi_dev_init(); + iosapic_pci_fixup(phase); + if (phase == 1) + sba_init(); +} diff -Nru a/arch/ia64/ia32/binfmt_elf32.c b/arch/ia64/ia32/binfmt_elf32.c --- a/arch/ia64/ia32/binfmt_elf32.c Mon Apr 15 15:07:57 2002 +++ b/arch/ia64/ia32/binfmt_elf32.c Mon Apr 15 15:07:57 2002 @@ -47,6 +47,8 @@ #define ELF_PLAT_INIT(_r) ia64_elf32_init(_r) #define setup_arg_pages(bprm) ia32_setup_arg_pages(bprm) #define elf_map elf32_map + +#undef SET_PERSONALITY #define SET_PERSONALITY(ex, ibcs2) elf32_set_personality() /* Ugly but avoids duplication */ diff -Nru a/arch/ia64/ia32/sys_ia32.c b/arch/ia64/ia32/sys_ia32.c --- a/arch/ia64/ia32/sys_ia32.c Mon Apr 15 15:07:56 2002 +++ b/arch/ia64/ia32/sys_ia32.c Mon Apr 15 15:07:56 2002 @@ -3003,7 +3003,7 @@ if (request != PTRACE_KILL) goto out; } - if (child->p_pptr != current) + if (child->parent != current) goto out; switch (request) { diff -Nru a/arch/ia64/kernel/Makefile b/arch/ia64/kernel/Makefile --- a/arch/ia64/kernel/Makefile Mon Apr 15 15:07:57 2002 +++ b/arch/ia64/kernel/Makefile Mon Apr 15 15:07:57 2002 @@ -17,6 +17,7 @@ machvec.o pal.o process.o perfmon.o ptrace.o sal.o semaphore.o setup.o \ signal.o sys_ia64.o traps.o time.o unaligned.o unwind.o obj-$(CONFIG_IA64_GENERIC) += iosapic.o +obj-$(CONFIG_IA64_HP_ZX1) += iosapic.o obj-$(CONFIG_IA64_DIG) += iosapic.o obj-$(CONFIG_IA64_PALINFO) += palinfo.o obj-$(CONFIG_EFI_VARS) += efivars.o diff -Nru a/arch/ia64/kernel/acpi.c b/arch/ia64/kernel/acpi.c --- a/arch/ia64/kernel/acpi.c Mon Apr 15 15:07:57 2002 +++ b/arch/ia64/kernel/acpi.c Mon Apr 15 15:07:57 2002 @@ -1,21 +1,34 @@ /* - * Advanced Configuration and Power Interface + * acpi.c - Architecture-Specific Low-Level ACPI Support * - * Based on 'ACPI Specification 1.0b' February 2, 1999 and - * 'IA-64 Extensions to ACPI Specification' Revision 0.6 + * Copyright (C) 1999 VA Linux Systems + * Copyright (C) 1999,2000 Walt Drummond + * Copyright (C) 2000 Hewlett-Packard Co. + * Copyright (C) 2000 David Mosberger-Tang + * Copyright (C) 2000 Intel Corp. + * Copyright (C) 2000,2001 J.I. Lee + * Copyright (C) 2001 Paul Diefenbaugh * - * Copyright (C) 1999 VA Linux Systems - * Copyright (C) 1999, 2000 Walt Drummond - * Copyright (C) 2000, 2002 Hewlett-Packard Co. - * David Mosberger-Tang - * Copyright (C) 2000 Intel Corp. - * Copyright (C) 2000, 2001 J.I. Lee - * ACPI based kernel configuration manager. - * ACPI 2.0 & IA64 ext 0.71 + * ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License, or + * (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA + * + * ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ */ #include - #include #include #include @@ -23,31 +36,16 @@ #include #include #include -#ifdef CONFIG_SERIAL_ACPI -#include -#endif - -#include -#include +#include #include #include #include #include #include +#include -#undef ACPI_DEBUG /* Guess what this does? */ - -/* global array to record platform interrupt vectors for generic int routing */ -int platform_irq_list[ACPI_MAX_PLATFORM_IRQS]; -/* These are ugly but will be reclaimed by the kernel */ -int __initdata available_cpus; -int __initdata total_cpus; - -int __initdata pcat_compat; - -void (*pm_idle) (void); -void (*pm_power_off) (void); +#define PREFIX "ACPI: " asm (".weak iosapic_register_irq"); asm (".weak iosapic_register_legacy_irq"); @@ -55,10 +53,16 @@ asm (".weak iosapic_init"); asm (".weak iosapic_version"); +void (*pm_idle) (void); +void (*pm_power_off) (void); + + +/* + * TBD: Should go away once we have an ACPI parser. + */ const char * acpi_get_sysname (void) { - /* the following should go away once we have an ACPI parser: */ #ifdef CONFIG_IA64_GENERIC return "hpsim"; #else @@ -74,16 +78,21 @@ # error Unknown platform. Fix acpi.c. # endif #endif - } +#ifdef CONFIG_ACPI_BOOT + +#define ACPI_MAX_PLATFORM_IRQS 256 + +/* Array to record platform interrupt vectors for generic interrupt routing. */ +int platform_irq_list[ACPI_MAX_PLATFORM_IRQS]; + /* - * Interrupt routing API for device drivers. - * Provides the interrupt vector for a generic platform event - * (currently only CPEI implemented) + * Interrupt routing API for device drivers. Provides interrupt vector for + * a generic platform event. Currently only CPEI is implemented. */ int -acpi_request_vector(u32 int_type) +acpi_request_vector (u32 int_type) { int vector = -1; @@ -96,586 +105,494 @@ return vector; } -/* - * Configure legacy IRQ information. - */ -static void __init -acpi_legacy_irq (char *p) + +/* -------------------------------------------------------------------------- + Boot-time Table Parsing + -------------------------------------------------------------------------- */ + +static int total_cpus __initdata; +static int available_cpus __initdata; +struct acpi_table_madt * acpi_madt __initdata; + + +static int __init +acpi_parse_lapic_addr_ovr (acpi_table_entry_header *header) { - acpi_entry_int_override_t *legacy = (acpi_entry_int_override_t *) p; - unsigned long polarity = 0, edge_triggered = 0; + struct acpi_table_lapic_addr_ovr *lapic = NULL; - /* - * If the platform we're running doesn't define - * iosapic_register_legacy_irq(), we ignore this info... - */ - if (!iosapic_register_legacy_irq) - return; + lapic = (struct acpi_table_lapic_addr_ovr *) header; + if (!lapic) + return -EINVAL; + + acpi_table_print_madt_entry(header); - switch (legacy->flags) { - case 0x5: polarity = 1; edge_triggered = 1; break; - case 0x7: polarity = 0; edge_triggered = 1; break; - case 0xd: polarity = 1; edge_triggered = 0; break; - case 0xf: polarity = 0; edge_triggered = 0; break; - default: - printk(" ACPI Legacy IRQ 0x%02x: Unknown flags 0x%x\n", legacy->isa_irq, - legacy->flags); - break; + if (lapic->address) { + iounmap((void *) ipi_base_addr); + ipi_base_addr = (unsigned long) ioremap(lapic->address, 0); } - iosapic_register_legacy_irq(legacy->isa_irq, legacy->pin, polarity, edge_triggered); + + return 0; } -/* - * ACPI 2.0 tables parsing functions - */ -static unsigned long -readl_unaligned(void *p) +static int __init +acpi_parse_lsapic (acpi_table_entry_header *header) { - unsigned long ret; + struct acpi_table_lsapic *lsapic = NULL; - memcpy(&ret, p, sizeof(long)); - return ret; -} + lsapic = (struct acpi_table_lsapic *) header; + if (!lsapic) + return -EINVAL; -/* - * Identify usable CPU's and remember them for SMP bringup later. - */ -static void __init -acpi20_lsapic (char *p) -{ - int add = 1; + acpi_table_print_madt_entry(header); - acpi20_entry_lsapic_t *lsapic = (acpi20_entry_lsapic_t *) p; - printk(" CPU %.04x:%.04x: ", lsapic->eid, lsapic->id); + printk("CPU %d (0x%04x)", total_cpus, (lsapic->id << 8) | lsapic->eid); - if ((lsapic->flags & LSAPIC_ENABLED) == 0) { - printk("disabled.\n"); - add = 0; - } - -#ifdef CONFIG_SMP - smp_boot_data.cpu_phys_id[total_cpus] = -1; -#endif - if (add) { + if (lsapic->flags.enabled) { available_cpus++; - printk("available"); + printk(" enabled"); #ifdef CONFIG_SMP smp_boot_data.cpu_phys_id[total_cpus] = (lsapic->id << 8) | lsapic->eid; if (hard_smp_processor_id() == smp_boot_data.cpu_phys_id[total_cpus]) printk(" (BSP)"); #endif - printk(".\n"); } + else { + printk(" disabled"); +#ifdef CONFIG_SMP + smp_boot_data.cpu_phys_id[total_cpus] = -1; +#endif + } + + printk("\n"); + total_cpus++; + return 0; } -/* - * Extract iosapic info from madt (again) to determine which iosapic - * this platform interrupt resides in - */ + +static int __init +acpi_parse_lapic_nmi (acpi_table_entry_header *header) +{ + struct acpi_table_lapic_nmi *lacpi_nmi = NULL; + + lacpi_nmi = (struct acpi_table_lapic_nmi*) header; + if (!lacpi_nmi) + return -EINVAL; + + acpi_table_print_madt_entry(header); + + /* TBD: Support lapic_nmi entries */ + + return 0; +} + + static int __init -acpi20_which_iosapic (int global_vector, acpi_madt_t *madt, u32 *irq_base, char **iosapic_address) +acpi_find_iosapic (int global_vector, u32 *irq_base, char **iosapic_address) { - acpi_entry_iosapic_t *iosapic; - char *p, *end; - int ver, max_pin; + struct acpi_table_iosapic *iosapic = NULL; + int ver = 0; + int max_pin = 0; + char *p = 0; + char *end = 0; - p = (char *) (madt + 1); - end = p + (madt->header.length - sizeof(acpi_madt_t)); + if (!irq_base || !iosapic_address) + return -ENODEV; + + p = (char *) (acpi_madt + 1); + end = p + (acpi_madt->header.length - sizeof(struct acpi_table_madt)); while (p < end) { - switch (*p) { - case ACPI20_ENTRY_IO_SAPIC: - /* collect IOSAPIC info for platform int use later */ - iosapic = (acpi_entry_iosapic_t *)p; - *irq_base = iosapic->irq_base; + if (*p == ACPI_MADT_IOSAPIC) { + iosapic = (struct acpi_table_iosapic *) p; + + *irq_base = iosapic->global_irq_base; *iosapic_address = ioremap(iosapic->address, 0); - /* is this the iosapic we're looking for? */ + ver = iosapic_version(*iosapic_address); max_pin = (ver >> 16) & 0xff; + if ((global_vector - *irq_base) <= max_pin) - return 0; /* found it! */ - break; - default: - break; + return 0; /* Found it! */ } p += p[1]; } - return 1; + return -ENODEV; } -/* - * Info on platform interrupt sources: NMI, PMI, INIT, etc. - */ -static void __init -acpi20_platform (char *p, acpi_madt_t *madt) + +static int __init +acpi_parse_iosapic (acpi_table_entry_header *header) { - int vector; - u32 irq_base; - char *iosapic_address; - unsigned long polarity = 0, trigger = 0; - acpi20_entry_platform_src_t *plat = (acpi20_entry_platform_src_t *) p; + struct acpi_table_iosapic *iosapic; - printk("PLATFORM: IOSAPIC %x -> Vector %x on CPU %.04u:%.04u\n", - plat->iosapic_vector, plat->global_vector, plat->eid, plat->id); + iosapic = (struct acpi_table_iosapic *) header; + if (!iosapic) + return -EINVAL; - /* record platform interrupt vectors for generic int routing code */ + acpi_table_print_madt_entry(header); + + if (iosapic_init) { +#ifndef CONFIG_ITANIUM + /* PCAT_COMPAT flag indicates dual-8259 setup */ + iosapic_init(iosapic->address, iosapic->global_irq_base, + acpi_madt->flags.pcat_compat); +#else + /* Firmware on old Itanium systems is broken */ + iosapic_init(iosapic->address, iosapic->global_irq_base, 1); +#endif + } + return 0; +} + + +static int __init +acpi_parse_plat_int_src (acpi_table_entry_header *header) +{ + struct acpi_table_plat_int_src *plintsrc = NULL; + int vector = 0; + u32 irq_base = 0; + char *iosapic_address = NULL; + + plintsrc = (struct acpi_table_plat_int_src *) header; + if (!plintsrc) + return -EINVAL; + + acpi_table_print_madt_entry(header); if (!iosapic_register_platform_irq) { - printk("acpi20_platform(): no ACPI platform IRQ support\n"); - return; + printk(KERN_WARNING PREFIX "No ACPI platform IRQ support\n"); + return -ENODEV; } - /* extract polarity and trigger info from flags */ - switch (plat->flags) { - case 0x5: polarity = 1; trigger = 1; break; - case 0x7: polarity = 0; trigger = 1; break; - case 0xd: polarity = 1; trigger = 0; break; - case 0xf: polarity = 0; trigger = 0; break; - default: - printk("acpi20_platform(): unknown flags 0x%x\n", plat->flags); - break; - } - - /* which iosapic does this IRQ belong to? */ - if (acpi20_which_iosapic(plat->global_vector, madt, &irq_base, &iosapic_address)) { - printk("acpi20_platform(): I/O SAPIC not found!\n"); - return; + if (0 != acpi_find_iosapic(plintsrc->global_irq, &irq_base, &iosapic_address)) { + printk(KERN_WARNING PREFIX "IOSAPIC not found\n"); + return -ENODEV; } /* - * get vector assignment for this IRQ, set attributes, and program the IOSAPIC - * routing table + * Get vector assignment for this IRQ, set attributes, and program the + * IOSAPIC routing table. */ - vector = iosapic_register_platform_irq(plat->int_type, - plat->global_vector, - plat->iosapic_vector, - plat->eid, - plat->id, - polarity, - trigger, - irq_base, - iosapic_address); - platform_irq_list[plat->int_type] = vector; + vector = iosapic_register_platform_irq (plintsrc->type, + plintsrc->global_irq, + plintsrc->iosapic_vector, + plintsrc->eid, + plintsrc->id, + (plintsrc->flags.polarity == 1) ? 1 : 0, + (plintsrc->flags.trigger == 1) ? 1 : 0, + irq_base, + iosapic_address); + + platform_irq_list[plintsrc->type] = vector; + return 0; } -/* - * Override the physical address of the local APIC in the MADT stable header. - */ -static void __init -acpi20_lapic_addr_override (char *p) + +static int __init +acpi_parse_int_src_ovr (acpi_table_entry_header *header) { - acpi20_entry_lapic_addr_override_t * lapic = (acpi20_entry_lapic_addr_override_t *) p; + struct acpi_table_int_src_ovr *p = NULL; - if (lapic->lapic_address) { - iounmap((void *)ipi_base_addr); - ipi_base_addr = (unsigned long) ioremap(lapic->lapic_address, 0); + p = (struct acpi_table_int_src_ovr *) header; + if (!p) + return -EINVAL; - printk("LOCAL ACPI override to 0x%lx(p=0x%lx)\n", - ipi_base_addr, lapic->lapic_address); - } + acpi_table_print_madt_entry(header); + + /* Ignore if the platform doesn't support overrides */ + if (!iosapic_register_legacy_irq) + return 0; + + iosapic_register_legacy_irq(p->bus_irq, p->global_irq, + (p->flags.polarity == 1) ? 1 : 0, + (p->flags.trigger == 1) ? 1 : 0); + + return 0; } -/* - * Parse the ACPI Multiple APIC Description Table - */ -static void __init -acpi20_parse_madt (acpi_madt_t *madt) + +static int __init +acpi_parse_nmi_src (acpi_table_entry_header *header) { - acpi_entry_iosapic_t *iosapic = NULL; - acpi20_entry_lsapic_t *lsapic = NULL; - char *p, *end; - int i; - - /* Base address of IPI Message Block */ - if (madt->lapic_address) { - ipi_base_addr = (unsigned long) ioremap(madt->lapic_address, 0); - printk("Lapic address set to 0x%lx\n", ipi_base_addr); - } else - printk("Lapic address set to default 0x%lx\n", ipi_base_addr); + struct acpi_table_nmi_src *nmi_src = NULL; - /* - * The PCAT_COMPAT flag indicates that the system has a dual-8259 compatible - * setup. - */ -#ifdef CONFIG_ITANIUM - pcat_compat = 1; /* fw on some Itanium systems is broken... */ -#else - pcat_compat = (madt->flags & MADT_PCAT_COMPAT); -#endif + nmi_src = (struct acpi_table_nmi_src*) header; + if (!nmi_src) + return -EINVAL; - p = (char *) (madt + 1); - end = p + (madt->header.length - sizeof(acpi_madt_t)); + acpi_table_print_madt_entry(header); - /* Initialize platform interrupt vector array */ - for (i = 0; i < ACPI_MAX_PLATFORM_IRQS; i++) - platform_irq_list[i] = -1; + /* TBD: Support nimsrc entries */ - /* - * Split-up entry parsing to ensure ordering. - */ - while (p < end) { - switch (*p) { - case ACPI20_ENTRY_LOCAL_APIC_ADDR_OVERRIDE: - printk("ACPI 2.0 MADT: LOCAL APIC Override\n"); - acpi20_lapic_addr_override(p); - break; - - case ACPI20_ENTRY_LOCAL_SAPIC: - printk("ACPI 2.0 MADT: LOCAL SAPIC\n"); - lsapic = (acpi20_entry_lsapic_t *) p; - acpi20_lsapic(p); - break; - - case ACPI20_ENTRY_IO_SAPIC: - iosapic = (acpi_entry_iosapic_t *) p; - if (iosapic_init) - iosapic_init(iosapic->address, iosapic->irq_base, pcat_compat); - break; - - case ACPI20_ENTRY_PLATFORM_INT_SOURCE: - printk("ACPI 2.0 MADT: PLATFORM INT SOURCE\n"); - acpi20_platform(p, madt); - break; - - case ACPI20_ENTRY_LOCAL_APIC: - printk("ACPI 2.0 MADT: LOCAL APIC entry\n"); break; - case ACPI20_ENTRY_IO_APIC: - printk("ACPI 2.0 MADT: IO APIC entry\n"); break; - case ACPI20_ENTRY_NMI_SOURCE: - printk("ACPI 2.0 MADT: NMI SOURCE entry\n"); break; - case ACPI20_ENTRY_LOCAL_APIC_NMI: - printk("ACPI 2.0 MADT: LOCAL APIC NMI entry\n"); break; - case ACPI20_ENTRY_INT_SRC_OVERRIDE: - break; - default: - printk("ACPI 2.0 MADT: unknown entry skip\n"); break; - break; - } - p += p[1]; - } + return 0; +} - p = (char *) (madt + 1); - end = p + (madt->header.length - sizeof(acpi_madt_t)); - while (p < end) { - switch (*p) { - case ACPI20_ENTRY_LOCAL_APIC: - if (lsapic) break; - printk("ACPI 2.0 MADT: LOCAL APIC entry\n"); - /* parse local apic if there's no local Sapic */ - break; - case ACPI20_ENTRY_IO_APIC: - if (iosapic) break; - printk("ACPI 2.0 MADT: IO APIC entry\n"); - /* parse ioapic if there's no ioSapic */ - break; - default: - break; - } - p += p[1]; - } +static int __init +acpi_parse_madt (unsigned long phys_addr, unsigned long size) +{ + int i = 0; - p = (char *) (madt + 1); - end = p + (madt->header.length - sizeof(acpi_madt_t)); + if (!phys_addr || !size) + return -EINVAL; - while (p < end) { - switch (*p) { - case ACPI20_ENTRY_INT_SRC_OVERRIDE: - printk("ACPI 2.0 MADT: INT SOURCE Override\n"); - acpi_legacy_irq(p); - break; - default: - break; - } - p += p[1]; + acpi_madt = (struct acpi_table_madt *) __va(phys_addr); + if (!acpi_madt) { + printk(KERN_WARNING PREFIX "Unable to map MADT\n"); + return -ENODEV; } - /* Make bootup pretty */ - printk(" %d CPUs available, %d CPUs total\n", - available_cpus, total_cpus); + /* Initialize platform interrupt vector array */ + + for (i = 0; i < ACPI_MAX_PLATFORM_IRQS; i++) + platform_irq_list[i] = -1; + + /* Get base address of IPI Message Block */ + + if (acpi_madt->lapic_address) + ipi_base_addr = (unsigned long) + ioremap(acpi_madt->lapic_address, 0); + + printk(KERN_INFO PREFIX "Local APIC address 0x%lx\n", ipi_base_addr); + + return 0; } + int __init -acpi20_parse (acpi20_rsdp_t *rsdp20) +acpi_find_rsdp (unsigned long *rsdp_phys) { -# ifdef CONFIG_ACPI - acpi_xsdt_t *xsdt; - acpi_desc_table_hdr_t *hdrp; - acpi_madt_t *madt = NULL; - int tables, i; + if (!rsdp_phys) + return -EINVAL; - if (strncmp(rsdp20->signature, ACPI_RSDP_SIG, ACPI_RSDP_SIG_LEN)) { - printk("ACPI 2.0 RSDP signature incorrect!\n"); + if (efi.acpi20) { + (*rsdp_phys) = __pa(efi.acpi20); return 0; - } else { - printk("ACPI 2.0 Root System Description Ptr at 0x%lx\n", - (unsigned long)rsdp20); } - - xsdt = __va(rsdp20->xsdt); - hdrp = &xsdt->header; - if (strncmp(hdrp->signature, - ACPI_XSDT_SIG, ACPI_XSDT_SIG_LEN)) { - printk("ACPI 2.0 XSDT signature incorrect. Trying RSDT\n"); - /* RSDT parsing here */ - return 0; - } else { - printk("ACPI 2.0 XSDT at 0x%lx (p=0x%lx)\n", - (unsigned long)xsdt, (unsigned long)rsdp20->xsdt); + else if (efi.acpi) { + printk(KERN_WARNING PREFIX "v1.0/r0.71 tables no longer supported\n"); } - printk("ACPI 2.0: %.6s %.8s %d.%d\n", - hdrp->oem_id, - hdrp->oem_table_id, - hdrp->oem_revision >> 16, - hdrp->oem_revision & 0xffff); + return -ENODEV; +} + - acpi_cf_init((void *)rsdp20); +#ifdef CONFIG_SERIAL_ACPI - tables =(hdrp->length -sizeof(acpi_desc_table_hdr_t))>>3; +#include - for (i = 0; i < tables; i++) { - hdrp = (acpi_desc_table_hdr_t *) __va(readl_unaligned(&xsdt->entry_ptrs[i])); - printk(" :table %4.4s found\n", hdrp->signature); +static int __init +acpi_parse_spcr (unsigned long phys_addr, unsigned long size) +{ + acpi_ser_t *spcr = NULL; + unsigned long global_int = 0; - /* Only interested int the MADT table for now ... */ - if (strncmp(hdrp->signature, - ACPI_MADT_SIG, ACPI_MADT_SIG_LEN) != 0) - continue; + if (!phys_addr || !size) + return -EINVAL; - /* Save MADT pointer for later */ - madt = (acpi_madt_t *) hdrp; - acpi20_parse_madt(madt); - } + if (!iosapic_register_irq) + return -ENODEV; -#ifdef CONFIG_SERIAL_ACPI /* - * Now we're interested in other tables. We want the iosapics already - * initialized, so we do it in a separate loop. + * ACPI is able to describe serial ports that live at non-standard + * memory addresses and use non-standard interrupts, either via + * direct SAPIC mappings or via PCI interrupts. We handle interrupt + * routing for SAPIC-based (non-PCI) devices here. Interrupt routing + * for PCI devices will be handled when processing the PCI Interrupt + * Routing Table (PRT). */ - for (i = 0; i < tables; i++) { - hdrp = (acpi_desc_table_hdr_t *) __va(readl_unaligned(&xsdt->entry_ptrs[i])); - /* - * search for SPCR and DBGP table entries so we can enable - * non-pci interrupts to IO-SAPICs. - */ - if (!strncmp(hdrp->signature, ACPI_SPCRT_SIG, ACPI_SPCRT_SIG_LEN) || - !strncmp(hdrp->signature, ACPI_DBGPT_SIG, ACPI_DBGPT_SIG_LEN)) - { - acpi_ser_t *spcr = (void *)hdrp; - unsigned long global_int; - - setup_serial_acpi(hdrp); - - /* - * ACPI is able to describe serial ports that live at non-standard - * memory space addresses and use SAPIC interrupts. If not also - * PCI devices, there would be no interrupt vector information for - * them. This checks for and fixes that situation. - */ - if (spcr->length < sizeof(acpi_ser_t)) - /* table is not long enough for full info, thus no int */ - break; - - /* - * If the device is not in PCI space, but uses a SAPIC interrupt, - * we need to program the SAPIC so that serial can autoprobe for - * the IA64 interrupt vector later on. If the device is in PCI - * space, it should already be setup via the PCI vectors - */ - if (spcr->base_addr.space_id != ACPI_SERIAL_PCICONF_SPACE && - spcr->int_type == ACPI_SERIAL_INT_SAPIC) - { - u32 irq_base; - char *iosapic_address; - int vector; - - /* We have a UART in memory space with a SAPIC interrupt */ - global_int = ( (spcr->global_int[3] << 24) - | (spcr->global_int[2] << 16) - | (spcr->global_int[1] << 8) - | spcr->global_int[0]); - - if (!iosapic_register_irq) - continue; - - /* which iosapic does this IRQ belong to? */ - if (acpi20_which_iosapic(global_int, madt, &irq_base, - &iosapic_address) == 0) - { - vector = iosapic_register_irq(global_int, - 1, /* active high polarity */ - 1, /* edge triggered */ - irq_base, - iosapic_address); - } - } - } + + spcr = (acpi_ser_t *) __va(phys_addr); + if (!spcr) { + printk(KERN_WARNING PREFIX "Unable to map SPCR\n"); + return -ENODEV; } -#endif - acpi_cf_terminate(); -# ifdef CONFIG_SMP - if (available_cpus == 0) { - printk("ACPI: Found 0 CPUS; assuming 1\n"); - available_cpus = 1; /* We've got at least one of these, no? */ + setup_serial_acpi(spcr); + + if (spcr->length < sizeof(acpi_ser_t)) + /* Table not long enough for full info, thus no interrupt */ + return -ENODEV; + + if ((spcr->base_addr.space_id != ACPI_SERIAL_PCICONF_SPACE) && + (spcr->int_type == ACPI_SERIAL_INT_SAPIC)) + { + u32 irq_base = 0; + char *iosapic_address = NULL; + int vector = 0; + + /* We have a UART in memory space with an SAPIC interrupt */ + + global_int = ( (spcr->global_int[3] << 24) | + (spcr->global_int[2] << 16) | + (spcr->global_int[1] << 8) | + (spcr->global_int[0]) ); + + /* Which iosapic does this IRQ belong to? */ + + if (0 == acpi_find_iosapic(global_int, &irq_base, &iosapic_address)) { + vector = iosapic_register_irq (global_int, 1, 1, + irq_base, iosapic_address); + } } - smp_boot_data.cpu_count = total_cpus; -# endif -# endif /* CONFIG_ACPI */ - return 1; + return 0; } -/* - * ACPI 1.0b with 0.71 IA64 extensions functions; should be removed once all - * platforms start supporting ACPI 2.0 - */ -/* - * Identify usable CPU's and remember them for SMP bringup later. - */ -static void __init -acpi_lsapic (char *p) +#endif /*CONFIG_SERIAL_ACPI*/ + + +int __init +acpi_boot_init (char *cmdline) { - int add = 1; + int result = 0; + + /* Initialize the ACPI boot-time table parser */ + result = acpi_table_init(cmdline); + if (0 != result) + return result; - acpi_entry_lsapic_t *lsapic = (acpi_entry_lsapic_t *) p; + /* + * MADT + * ---- + * Parse the Multiple APIC Description Table (MADT), if exists. + * Note that this table provides platform SMP configuration + * information -- the successor to MPS tables. + */ - if ((lsapic->flags & LSAPIC_PRESENT) == 0) - return; + result = acpi_table_parse(ACPI_APIC, acpi_parse_madt); + if (1 > result) + return result; - printk(" CPU %d (%.04x:%.04x): ", total_cpus, lsapic->eid, lsapic->id); + /* Local APIC */ - if ((lsapic->flags & LSAPIC_ENABLED) == 0) { - printk("Disabled.\n"); - add = 0; - } else if (lsapic->flags & LSAPIC_PERFORMANCE_RESTRICTED) { - printk("Performance Restricted; ignoring.\n"); - add = 0; + result = acpi_table_parse_madt(ACPI_MADT_LAPIC_ADDR_OVR, acpi_parse_lapic_addr_ovr); + if (0 > result) { + printk(KERN_ERR PREFIX "Error parsing LAPIC address override entry\n"); + return result; } -#ifdef CONFIG_SMP - smp_boot_data.cpu_phys_id[total_cpus] = -1; -#endif - if (add) { - printk("Available.\n"); - available_cpus++; -#ifdef CONFIG_SMP - smp_boot_data.cpu_phys_id[total_cpus] = (lsapic->id << 8) | lsapic->eid; -#endif /* CONFIG_SMP */ + result = acpi_table_parse_madt(ACPI_MADT_LSAPIC, acpi_parse_lsapic); + if (1 > result) { + printk(KERN_ERR PREFIX "Error parsing MADT - no LAPIC entries!\n"); + return -ENODEV; } - total_cpus++; -} -/* - * Info on platform interrupt sources: NMI. PMI, INIT, etc. - */ -static void __init -acpi_platform (char *p) -{ - acpi_entry_platform_src_t *plat = (acpi_entry_platform_src_t *) p; + result = acpi_table_parse_madt(ACPI_MADT_LAPIC_NMI, acpi_parse_lapic_nmi); + if (0 > result) { + printk(KERN_ERR PREFIX "Error parsing LAPIC NMI entry\n"); + return result; + } - printk("PLATFORM: IOSAPIC %x -> Vector %x on CPU %.04u:%.04u\n", - plat->iosapic_vector, plat->global_vector, plat->eid, plat->id); -} + /* I/O APIC */ -/* - * Parse the ACPI Multiple SAPIC Table - */ -static void __init -acpi_parse_msapic (acpi_sapic_t *msapic) -{ - acpi_entry_iosapic_t *iosapic; - char *p, *end; + result = acpi_table_parse_madt(ACPI_MADT_IOSAPIC, acpi_parse_iosapic); + if (1 > result) { + printk(KERN_ERR PREFIX "Error parsing MADT - no IOAPIC entries!\n"); + return ((result == 0) ? -ENODEV : result); + } - /* Base address of IPI Message Block */ - ipi_base_addr = (unsigned long) ioremap(msapic->interrupt_block, 0); + /* System-Level Interrupt Routing */ - p = (char *) (msapic + 1); - end = p + (msapic->header.length - sizeof(acpi_sapic_t)); + result = acpi_table_parse_madt(ACPI_MADT_PLAT_INT_SRC, acpi_parse_plat_int_src); + if (0 > result) { + printk(KERN_ERR PREFIX "Error parsing platform interrupt source entry\n"); + return result; + } - while (p < end) { - switch (*p) { - case ACPI_ENTRY_LOCAL_SAPIC: - acpi_lsapic(p); - break; - - case ACPI_ENTRY_IO_SAPIC: - iosapic = (acpi_entry_iosapic_t *) p; - if (iosapic_init) - /* - * The ACPI I/O SAPIC table doesn't have a PCAT_COMPAT - * flag like the MADT table, but we can safely assume that - * ACPI 1.0b systems have a dual-8259 setup. - */ - iosapic_init(iosapic->address, iosapic->irq_base, 1); - break; - - case ACPI_ENTRY_INT_SRC_OVERRIDE: - acpi_legacy_irq(p); - break; - - case ACPI_ENTRY_PLATFORM_INT_SOURCE: - acpi_platform(p); - break; + result = acpi_table_parse_madt(ACPI_MADT_INT_SRC_OVR, acpi_parse_int_src_ovr); + if (0 > result) { + printk(KERN_ERR PREFIX "Error parsing interrupt source overrides entry\n"); + return result; + } - default: - break; - } + result = acpi_table_parse_madt(ACPI_MADT_NMI_SRC, acpi_parse_nmi_src); + if (0 > result) { + printk(KERN_ERR PREFIX "Error parsing NMI SRC entry\n"); + return result; + } - /* Move to next table entry. */ - p += p[1]; +#ifdef CONFIG_SERIAL_ACPI + /* + * TBD: Need phased approach to table parsing (only do those absolutely + * required during boot-up). Recommend expanding concept of fix- + * feature devices (LDM) to include table-based devices such as + * serial ports, EC, SMBus, etc. + */ + acpi_table_parse(ACPI_SPCR, acpi_parse_spcr); +#endif /*CONFIG_SERIAL_ACPI*/ + +#ifdef CONFIG_SMP + if (available_cpus == 0) { + printk("ACPI: Found 0 CPUS; assuming 1\n"); + available_cpus = 1; /* We've got at least one of these, no? */ } + smp_boot_data.cpu_count = total_cpus; +#endif + /* Make boot-up look pretty */ + printk("%d CPUs available, %d CPUs total\n", available_cpus, total_cpus); - /* Make bootup pretty */ - printk(" %d CPUs available, %d CPUs total\n", available_cpus, total_cpus); + return 0; } + +/* -------------------------------------------------------------------------- + PCI Interrupt Routing + -------------------------------------------------------------------------- */ + int __init -acpi_parse (acpi_rsdp_t *rsdp) +acpi_get_prt (struct pci_vector_struct **vectors, int *count) { -# ifdef CONFIG_ACPI - acpi_rsdt_t *rsdt; - acpi_desc_table_hdr_t *hdrp; - long tables, i; + struct pci_vector_struct *vector = NULL; + struct list_head *node = NULL; + struct acpi_prt_entry *entry = NULL; + int i = 0; - if (strncmp(rsdp->signature, ACPI_RSDP_SIG, ACPI_RSDP_SIG_LEN)) { - printk("Uh-oh, ACPI RSDP signature incorrect!\n"); - return 0; - } + if (!vectors || !count) + return -EINVAL; - rsdt = __va(rsdp->rsdt); - if (strncmp(rsdt->header.signature, ACPI_RSDT_SIG, ACPI_RSDT_SIG_LEN)) { - printk("Uh-oh, ACPI RDST signature incorrect!\n"); - return 0; + *vectors = NULL; + *count = 0; + + if (acpi_prts.count < 0) { + printk(KERN_ERR PREFIX "No PCI IRQ routing entries\n"); + return -ENODEV; } - printk("ACPI: %.6s %.8s %d.%d\n", rsdt->header.oem_id, rsdt->header.oem_table_id, - rsdt->header.oem_revision >> 16, rsdt->header.oem_revision & 0xffff); + /* Allocate vectors */ - acpi_cf_init(rsdp); + *vectors = kmalloc(sizeof(struct pci_vector_struct) * acpi_prts.count, GFP_KERNEL); + if (!(*vectors)) + return -ENOMEM; - tables = (rsdt->header.length - sizeof(acpi_desc_table_hdr_t)) / 8; - for (i = 0; i < tables; i++) { - hdrp = (acpi_desc_table_hdr_t *) __va(rsdt->entry_ptrs[i]); + /* Convert PRT entries to IOSAPIC PCI vectors */ - /* Only interested int the MSAPIC table for now ... */ - if (strncmp(hdrp->signature, ACPI_SAPIC_SIG, ACPI_SAPIC_SIG_LEN) != 0) - continue; + vector = *vectors; - acpi_parse_msapic((acpi_sapic_t *) hdrp); + list_for_each(node, &acpi_prts.entries) { + entry = (struct acpi_prt_entry *)node; + vector[i].bus = (u16) entry->id.bus; + vector[i].pci_id = (u32) entry->id.dev << 16 | 0xffff; + vector[i].pin = (u8) entry->id.pin; + vector[i].irq = (u8) entry->source.index; + i++; } + *count = acpi_prts.count; + return 0; +} - acpi_cf_terminate(); +/* Assume IA64 always use I/O SAPIC */ -# ifdef CONFIG_SMP - if (available_cpus == 0) { - printk("ACPI: Found 0 CPUS; assuming 1\n"); - available_cpus = 1; /* We've got at least one of these, no? */ - } - smp_boot_data.cpu_count = total_cpus; -# endif -# endif /* CONFIG_ACPI */ - return 1; +int __init +acpi_get_interrupt_model (int *type) +{ + if (!type) + return -EINVAL; + + *type = ACPI_INT_MODEL_IOSAPIC; + + return 0; } + +#endif /* CONFIG_ACPI_BOOT */ diff -Nru a/arch/ia64/kernel/brl_emu.c b/arch/ia64/kernel/brl_emu.c --- a/arch/ia64/kernel/brl_emu.c Mon Apr 15 15:07:57 2002 +++ b/arch/ia64/kernel/brl_emu.c Mon Apr 15 15:07:57 2002 @@ -55,7 +55,7 @@ ia64_emulate_brl (struct pt_regs *regs, unsigned long ar_ec) { unsigned long bundle[2]; - unsigned long opcode, btype, qp, offset; + unsigned long opcode, btype, qp, offset, cpl; unsigned long next_ip; struct siginfo siginfo; struct illegal_op_return rv; @@ -158,9 +158,9 @@ * AR[PFS].pec = AR[EC] * AR[PFS].ppl = PSR.cpl */ + cpl = ia64_psr(regs)->cpl; regs->ar_pfs = ((regs->cr_ifs & 0x3fffffffff) - | (ar_ec << 52) - | ((unsigned long) ia64_psr(regs)->cpl << 62)); + | (ar_ec << 52) | (cpl << 62)); /* * CFM.sof -= CFM.sol diff -Nru a/arch/ia64/kernel/efi.c b/arch/ia64/kernel/efi.c --- a/arch/ia64/kernel/efi.c Mon Apr 15 15:07:56 2002 +++ b/arch/ia64/kernel/efi.c Mon Apr 15 15:07:56 2002 @@ -155,10 +155,10 @@ case EFI_CONVENTIONAL_MEMORY: if (!(md->attribute & EFI_MEMORY_WB)) continue; - if (md->phys_addr + (md->num_pages << 12) > mem_limit) { + if (md->phys_addr + (md->num_pages << EFI_PAGE_SHIFT) > mem_limit) { if (md->phys_addr > mem_limit) continue; - md->num_pages = (mem_limit - md->phys_addr) >> 12; + md->num_pages = (mem_limit - md->phys_addr) >> EFI_PAGE_SHIFT; } if (md->num_pages == 0) { printk("efi_memmap_walk: ignoring empty region at 0x%lx", @@ -167,7 +167,7 @@ } curr.start = PAGE_OFFSET + md->phys_addr; - curr.end = curr.start + (md->num_pages << 12); + curr.end = curr.start + (md->num_pages << EFI_PAGE_SHIFT); if (!prev_valid) { prev = curr; @@ -250,16 +250,17 @@ * dedicated ITR for the PAL code. */ if ((vaddr & mask) == (KERNEL_START & mask)) { - printk(__FUNCTION__ ": no need to install ITR for PAL code\n"); + printk("%s: no need to install ITR for PAL code\n", __FUNCTION__); continue; } - if (md->num_pages << 12 > IA64_GRANULE_SIZE) + if (md->num_pages << EFI_PAGE_SHIFT > IA64_GRANULE_SIZE) panic("Woah! PAL code size bigger than a granule!"); mask = ~((1 << IA64_GRANULE_SHIFT) - 1); printk("CPU %d: mapping PAL code [0x%lx-0x%lx) into [0x%lx-0x%lx)\n", - smp_processor_id(), md->phys_addr, md->phys_addr + (md->num_pages << 12), + smp_processor_id(), md->phys_addr, + md->phys_addr + (md->num_pages << EFI_PAGE_SHIFT), vaddr & mask, (vaddr & mask) + IA64_GRANULE_SIZE); /* @@ -375,7 +376,8 @@ md = p; printk("mem%02u: type=%u, attr=0x%lx, range=[0x%016lx-0x%016lx) (%luMB)\n", i, md->type, md->attribute, md->phys_addr, - md->phys_addr + (md->num_pages<<12) - 1, md->num_pages >> 8); + md->phys_addr + (md->num_pages << EFI_PAGE_SHIFT) - 1, + md->num_pages >> (20 - EFI_PAGE_SHIFT)); } } #endif @@ -482,8 +484,50 @@ return 0; } +u32 +efi_mem_type (u64 phys_addr) +{ + void *efi_map_start, *efi_map_end, *p; + efi_memory_desc_t *md; + u64 efi_desc_size; + + efi_map_start = __va(ia64_boot_param->efi_memmap); + efi_map_end = efi_map_start + ia64_boot_param->efi_memmap_size; + efi_desc_size = ia64_boot_param->efi_memdesc_size; + + for (p = efi_map_start; p < efi_map_end; p += efi_desc_size) { + md = p; + + if ((md->phys_addr <= phys_addr) && (phys_addr <= + (md->phys_addr + (md->num_pages << EFI_PAGE_SHIFT) - 1))) + return md->type; + } + return 0; +} + +u64 +efi_mem_attributes (u64 phys_addr) +{ + void *efi_map_start, *efi_map_end, *p; + efi_memory_desc_t *md; + u64 efi_desc_size; + + efi_map_start = __va(ia64_boot_param->efi_memmap); + efi_map_end = efi_map_start + ia64_boot_param->efi_memmap_size; + efi_desc_size = ia64_boot_param->efi_memdesc_size; + + for (p = efi_map_start; p < efi_map_end; p += efi_desc_size) { + md = p; + + if ((md->phys_addr <= phys_addr) && (phys_addr <= + (md->phys_addr + (md->num_pages << EFI_PAGE_SHIFT) - 1))) + return md->attribute; + } + return 0; +} + static void __exit -efivars_exit(void) +efivars_exit (void) { #ifdef CONFIG_PROC_FS remove_proc_entry(efi_dir->name, NULL); diff -Nru a/arch/ia64/kernel/entry.S b/arch/ia64/kernel/entry.S --- a/arch/ia64/kernel/entry.S Mon Apr 15 15:07:57 2002 +++ b/arch/ia64/kernel/entry.S Mon Apr 15 15:07:57 2002 @@ -36,6 +36,7 @@ #include #include #include +#include #include #include #include @@ -214,62 +215,80 @@ .save @priunat,r17 mov r17=ar.unat // preserve caller's .body - adds r3=80,sp +#ifdef CONFIG_ITANIUM + adds r2=16+128,sp + adds r3=16+64,sp + adds r14=SW(R4)+16,sp ;; + st8.spill [r14]=r4,16 // spill r4 lfetch.fault.excl.nt1 [r3],128 - mov ar.rsc=0 // put RSE in mode: enforced lazy, little endian, pl 0 - adds r2=16+128,sp ;; lfetch.fault.excl.nt1 [r2],128 lfetch.fault.excl.nt1 [r3],128 - adds r14=SW(R4)+16,sp ;; lfetch.fault.excl [r2] lfetch.fault.excl [r3] adds r15=SW(R5)+16,sp +#else + add r2=16+3*128,sp + add r3=16,sp + add r14=SW(R4)+16,sp + ;; + st8.spill [r14]=r4,SW(R6)-SW(R4) // spill r4 and prefetch offset 0x1c0 + lfetch.fault.excl.nt1 [r3],128 // prefetch offset 0x010 + ;; + lfetch.fault.excl.nt1 [r3],128 // prefetch offset 0x090 + lfetch.fault.excl.nt1 [r2],128 // prefetch offset 0x190 + ;; + lfetch.fault.excl.nt1 [r3] // prefetch offset 0x110 + lfetch.fault.excl.nt1 [r2] // prefetch offset 0x210 + adds r15=SW(R5)+16,sp +#endif ;; - mov r18=ar.fpsr // preserve fpsr - mov r19=ar.rnat - add r2=SW(F2)+16,sp // r2 = &sw->f2 -.mem.offset 0,0; st8.spill [r14]=r4,16 // spill r4 -.mem.offset 8,0; st8.spill [r15]=r5,16 // spill r5 - add r3=SW(F3)+16,sp // r3 = &sw->f3 + st8.spill [r15]=r5,SW(R7)-SW(R5) // spill r5 + mov.m ar.rsc=0 // put RSE in mode: enforced lazy, little endian, pl 0 + add r2=SW(F2)+16,sp // r2 = &sw->f2 + ;; + st8.spill [r14]=r6,SW(B0)-SW(R6) // spill r6 + mov.m r18=ar.fpsr // preserve fpsr + add r3=SW(F3)+16,sp // r3 = &sw->f3 ;; stf.spill [r2]=f2,32 - stf.spill [r3]=f3,32 + mov.m r19=ar.rnat mov r21=b0 -.mem.offset 0,0; st8.spill [r14]=r6,16 // spill r6 -.mem.offset 8,0; st8.spill [r15]=r7,16 // spill r7 + + stf.spill [r3]=f3,32 + st8.spill [r15]=r7,SW(B2)-SW(R7) // spill r7 mov r22=b1 ;; // since we're done with the spills, read and save ar.unat: - mov r29=ar.unat // M-unit - mov r20=ar.bspstore // M-unit + mov.m r29=ar.unat + mov.m r20=ar.bspstore mov r23=b2 stf.spill [r2]=f4,32 stf.spill [r3]=f5,32 mov r24=b3 ;; - st8 [r14]=r21,16 // save b0 - st8 [r15]=r22,16 // save b1 + st8 [r14]=r21,SW(B1)-SW(B0) // save b0 + st8 [r15]=r23,SW(B3)-SW(B2) // save b2 mov r25=b4 stf.spill [r2]=f10,32 stf.spill [r3]=f11,32 mov r26=b5 ;; - st8 [r14]=r23,16 // save b2 - st8 [r15]=r24,16 // save b3 + st8 [r14]=r22,SW(B4)-SW(B1) // save b1 + st8 [r15]=r24,SW(AR_PFS)-SW(B3) // save b3 mov r21=ar.lc // I-unit stf.spill [r2]=f12,32 stf.spill [r3]=f13,32 ;; - st8 [r14]=r25,16 // save b4 - st8 [r15]=r26,16 // save b5 + st8 [r14]=r25,SW(B5)-SW(B4) // save b4 + st8 [r15]=r16,SW(AR_LC)-SW(AR_PFS) // save ar.pfs stf.spill [r2]=f14,32 stf.spill [r3]=f15,32 ;; - st8 [r14]=r16 // save ar.pfs - st8 [r15]=r21 // save ar.lc + st8 [r14]=r26 // save b5 + st8 [r15]=r21 // save ar.lc stf.spill [r2]=f16,32 stf.spill [r3]=f17,32 ;; @@ -284,26 +303,26 @@ ;; stf.spill [r2]=f24,32 stf.spill [r3]=f25,32 - add r14=SW(CALLER_UNAT)+16,sp ;; stf.spill [r2]=f26,32 stf.spill [r3]=f27,32 - add r15=SW(AR_FPSR)+16,sp ;; stf.spill [r2]=f28,32 stf.spill [r3]=f29,32 - st8 [r14]=r17 // save caller_unat - st8 [r15]=r18 // save fpsr - mov r21=pr ;; - stf.spill [r2]=f30,(SW(AR_UNAT)-SW(F30)) - stf.spill [r3]=f31,(SW(AR_RNAT)-SW(F31)) + stf.spill [r2]=f30,SW(AR_UNAT)-SW(F30) + stf.spill [r3]=f31,SW(PR)-SW(F31) + add r14=SW(CALLER_UNAT)+16,sp + ;; + st8 [r2]=r29,SW(AR_RNAT)-SW(AR_UNAT) // save ar.unat + st8 [r14]=r17,SW(AR_FPSR)-SW(CALLER_UNAT) // save caller_unat + mov r21=pr ;; - st8 [r2]=r29,16 // save ar.unat - st8 [r3]=r19,16 // save ar.rnat + st8 [r2]=r19,SW(AR_BSPSTORE)-SW(AR_RNAT) // save ar.rnat + st8 [r3]=r21 // save predicate registers ;; - st8 [r2]=r20 // save ar.bspstore - st8 [r3]=r21 // save predicate registers + st8 [r2]=r20 // save ar.bspstore + st8 [r14]=r18 // save fpsr mov ar.rsc=3 // put RSE back into eager mode, pl 0 br.cond.sptk.many b7 END(save_switch_stack) @@ -647,23 +666,38 @@ /* * To prevent leaking bits between the kernel and user-space, * we must clear the stacked registers in the "invalid" partition here. - * Not pretty, but at least it's fast (3.34 registers/cycle). - * Architecturally, this loop could go at 4.67 registers/cycle, but that would - * oversubscribe Itanium. + * Not pretty, but at least it's fast (3.34 registers/cycle on Itanium, + * 5 registers/cycle on McKinley). */ # define pRecurse p6 # define pReturn p7 +#ifdef CONFIG_ITANIUM # define Nregs 10 +#else +# define Nregs 14 +#endif alloc loc0=ar.pfs,2,Nregs-2,2,0 shr.u loc1=r18,9 // RNaTslots <= dirtySize / (64*8) + 1 sub r17=r17,r18 // r17 = (physStackedSize + 8) - dirtySize ;; +#if 1 + .align 32 // see comment below about gas bug... +#endif mov ar.rsc=r19 // load ar.rsc to be used for "loadrs" shladd in0=loc1,3,r17 mov in1=0 +#if 0 + // gas-2.12.90 is unable to generate a stop bit after .align, which is bad, + // because alloc must be at the beginning of an insn-group. + .align 32 +#else + nop 0 + nop 0 + nop 0 +#endif ;; -// .align 32 // gas-2.11.90 is unable to generate a stop bit after .align rse_clear_invalid: +#ifdef CONFIG_ITANIUM // cycle 0 { .mii alloc loc0=ar.pfs,2,Nregs-2,2,0 @@ -692,9 +726,31 @@ mov loc7=0 (pReturn) br.ret.sptk.many b6 } +#else /* !CONFIG_ITANIUM */ + alloc loc0=ar.pfs,2,Nregs-2,2,0 + cmp.lt pRecurse,p0=Nregs*8,in0 // if more than Nregs regs left to clear, (re)curse + add out0=-Nregs*8,in0 + add out1=1,in1 // increment recursion count + mov loc1=0 + mov loc2=0 + ;; + mov loc3=0 + mov loc4=0 + mov loc9=0 + mov loc5=0 + mov loc6=0 +(pRecurse) br.call.sptk.many b6=rse_clear_invalid + ;; + mov loc7=0 + mov loc8=0 + cmp.ne pReturn,p0=r0,in1 // if recursion count != 0, we need to do a br.ret + mov loc10=0 + mov loc11=0 +(pReturn) br.ret.sptk.many b6 +#endif /* !CONFIG_ITANIUM */ # undef pRecurse # undef pReturn - + ;; alloc r17=ar.pfs,0,0,0,0 // drop current register frame ;; loadrs @@ -1087,7 +1143,11 @@ data8 sys_sched_get_priority_min data8 sys_sched_rr_get_interval data8 sys_nanosleep +#if defined(CONFIG_NFSD) || defined(CONFIG_NFSD_MODULE) data8 sys_nfsservctl +#else + data8 sys_ni_syscall +#endif data8 sys_prctl // 1170 data8 sys_getpagesize data8 sys_mmap2 @@ -1147,14 +1207,10 @@ data8 sys_removexattr data8 sys_lremovexattr data8 sys_fremovexattr -#if 0 data8 sys_tkill -#else - data8 ia64_ni_syscall -#endif - data8 ia64_ni_syscall // 1230 - data8 ia64_ni_syscall - data8 ia64_ni_syscall + data8 sys_futex // 1230 + data8 sys_sched_setaffinity + data8 sys_sched_getaffinity data8 ia64_ni_syscall data8 ia64_ni_syscall data8 ia64_ni_syscall // 1235 diff -Nru a/arch/ia64/kernel/head.S b/arch/ia64/kernel/head.S --- a/arch/ia64/kernel/head.S Mon Apr 15 15:07:57 2002 +++ b/arch/ia64/kernel/head.S Mon Apr 15 15:07:57 2002 @@ -560,137 +560,114 @@ END(__ia64_load_fpu) GLOBAL_ENTRY(__ia64_init_fpu) - alloc r2=ar.pfs,0,0,0,0 - stf.spill [sp]=f0 - mov f32=f0 - ;; - ldf.fill f33=[sp] - ldf.fill f34=[sp] - mov f35=f0 - ;; - ldf.fill f36=[sp] - ldf.fill f37=[sp] - mov f38=f0 - ;; - ldf.fill f39=[sp] - ldf.fill f40=[sp] - mov f41=f0 - ;; - ldf.fill f42=[sp] - ldf.fill f43=[sp] - mov f44=f0 - ;; - ldf.fill f45=[sp] - ldf.fill f46=[sp] - mov f47=f0 - ;; - ldf.fill f48=[sp] - ldf.fill f49=[sp] - mov f50=f0 - ;; - ldf.fill f51=[sp] - ldf.fill f52=[sp] - mov f53=f0 - ;; - ldf.fill f54=[sp] - ldf.fill f55=[sp] - mov f56=f0 - ;; - ldf.fill f57=[sp] - ldf.fill f58=[sp] - mov f59=f0 - ;; - ldf.fill f60=[sp] - ldf.fill f61=[sp] - mov f62=f0 - ;; - ldf.fill f63=[sp] - ldf.fill f64=[sp] - mov f65=f0 - ;; - ldf.fill f66=[sp] - ldf.fill f67=[sp] - mov f68=f0 - ;; - ldf.fill f69=[sp] - ldf.fill f70=[sp] - mov f71=f0 - ;; - ldf.fill f72=[sp] - ldf.fill f73=[sp] - mov f74=f0 - ;; - ldf.fill f75=[sp] - ldf.fill f76=[sp] - mov f77=f0 - ;; - ldf.fill f78=[sp] - ldf.fill f79=[sp] - mov f80=f0 - ;; - ldf.fill f81=[sp] - ldf.fill f82=[sp] - mov f83=f0 - ;; - ldf.fill f84=[sp] - ldf.fill f85=[sp] - mov f86=f0 - ;; - ldf.fill f87=[sp] - ldf.fill f88=[sp] - mov f89=f0 - ;; - ldf.fill f90=[sp] - ldf.fill f91=[sp] - mov f92=f0 - ;; - ldf.fill f93=[sp] - ldf.fill f94=[sp] - mov f95=f0 - ;; - ldf.fill f96=[sp] - ldf.fill f97=[sp] - mov f98=f0 - ;; - ldf.fill f99=[sp] - ldf.fill f100=[sp] - mov f101=f0 - ;; - ldf.fill f102=[sp] - ldf.fill f103=[sp] - mov f104=f0 - ;; - ldf.fill f105=[sp] - ldf.fill f106=[sp] - mov f107=f0 - ;; - ldf.fill f108=[sp] - ldf.fill f109=[sp] - mov f110=f0 - ;; - ldf.fill f111=[sp] - ldf.fill f112=[sp] - mov f113=f0 - ;; - ldf.fill f114=[sp] - ldf.fill f115=[sp] - mov f116=f0 - ;; - ldf.fill f117=[sp] - ldf.fill f118=[sp] - mov f119=f0 - ;; - ldf.fill f120=[sp] - ldf.fill f121=[sp] - mov f122=f0 - ;; - ldf.fill f123=[sp] - ldf.fill f124=[sp] - mov f125=f0 - ;; - ldf.fill f126=[sp] - mov f127=f0 - br.ret.sptk.many rp + stf.spill [sp]=f0 // M3 + mov f32=f0 // F + nop.b 0 + + ldfps f33,f34=[sp] // M0 + ldfps f35,f36=[sp] // M1 + mov f37=f0 // F + ;; + + setf.s f38=r0 // M2 + setf.s f39=r0 // M3 + mov f40=f0 // F + + ldfps f41,f42=[sp] // M0 + ldfps f43,f44=[sp] // M1 + mov f45=f0 // F + + setf.s f46=r0 // M2 + setf.s f47=r0 // M3 + mov f48=f0 // F + + ldfps f49,f50=[sp] // M0 + ldfps f51,f52=[sp] // M1 + mov f53=f0 // F + + setf.s f54=r0 // M2 + setf.s f55=r0 // M3 + mov f56=f0 // F + + ldfps f57,f58=[sp] // M0 + ldfps f59,f60=[sp] // M1 + mov f61=f0 // F + + setf.s f62=r0 // M2 + setf.s f63=r0 // M3 + mov f64=f0 // F + + ldfps f65,f66=[sp] // M0 + ldfps f67,f68=[sp] // M1 + mov f69=f0 // F + + setf.s f70=r0 // M2 + setf.s f71=r0 // M3 + mov f72=f0 // F + + ldfps f73,f74=[sp] // M0 + ldfps f75,f76=[sp] // M1 + mov f77=f0 // F + + setf.s f78=r0 // M2 + setf.s f79=r0 // M3 + mov f80=f0 // F + + ldfps f81,f82=[sp] // M0 + ldfps f83,f84=[sp] // M1 + mov f85=f0 // F + + setf.s f86=r0 // M2 + setf.s f87=r0 // M3 + mov f88=f0 // F + + /* + * When the instructions are cached, it would be faster to initialize + * the remaining registers with simply mov instructions (F-unit). + * This gets the time down to ~29 cycles. However, this would use up + * 33 bundles, whereas continuing with the above pattern yields + * 10 bundles and ~30 cycles. + */ + + ldfps f89,f90=[sp] // M0 + ldfps f91,f92=[sp] // M1 + mov f93=f0 // F + + setf.s f94=r0 // M2 + setf.s f95=r0 // M3 + mov f96=f0 // F + + ldfps f97,f98=[sp] // M0 + ldfps f99,f100=[sp] // M1 + mov f101=f0 // F + + setf.s f102=r0 // M2 + setf.s f103=r0 // M3 + mov f104=f0 // F + + ldfps f105,f106=[sp] // M0 + ldfps f107,f108=[sp] // M1 + mov f109=f0 // F + + setf.s f110=r0 // M2 + setf.s f111=r0 // M3 + mov f112=f0 // F + + ldfps f113,f114=[sp] // M0 + ldfps f115,f116=[sp] // M1 + mov f117=f0 // F + + setf.s f118=r0 // M2 + setf.s f119=r0 // M3 + mov f120=f0 // F + + ldfps f121,f122=[sp] // M0 + ldfps f123,f124=[sp] // M1 + mov f125=f0 // F + + setf.s f126=r0 // M2 + setf.s f127=r0 // M3 + br.ret.sptk.many rp // F END(__ia64_init_fpu) /* diff -Nru a/arch/ia64/kernel/ia64_ksyms.c b/arch/ia64/kernel/ia64_ksyms.c --- a/arch/ia64/kernel/ia64_ksyms.c Mon Apr 15 15:07:57 2002 +++ b/arch/ia64/kernel/ia64_ksyms.c Mon Apr 15 15:07:57 2002 @@ -6,7 +6,11 @@ #include #include -EXPORT_SYMBOL_NOVERS(memset); +#undef memset +extern void *memset (void *, int, size_t); +EXPORT_SYMBOL_NOVERS(memset); /* gcc generates direct calls to memset()... */ +EXPORT_SYMBOL_NOVERS(__memset_generic); +EXPORT_SYMBOL_NOVERS(__bzero); EXPORT_SYMBOL(memchr); EXPORT_SYMBOL(memcmp); EXPORT_SYMBOL_NOVERS(memcpy); @@ -67,7 +71,7 @@ EXPORT_SYMBOL(last_cli_ip); #endif -#include +#include EXPORT_SYMBOL(flush_tlb_range); @@ -147,3 +151,10 @@ #include extern struct proc_dir_entry *efi_dir; EXPORT_SYMBOL(efi_dir); + +#include +#ifdef CONFIG_IA64_GENERIC +EXPORT_SYMBOL(ia64_mv); +#endif +EXPORT_SYMBOL(machvec_noop); + diff -Nru a/arch/ia64/kernel/iosapic.c b/arch/ia64/kernel/iosapic.c --- a/arch/ia64/kernel/iosapic.c Mon Apr 15 15:07:57 2002 +++ b/arch/ia64/kernel/iosapic.c Mon Apr 15 15:07:57 2002 @@ -22,6 +22,7 @@ * 02/01/07 E. Focht Redirectable interrupt vectors in * iosapic_set_affinity(), initializations for * /proc/irq/#/smp_affinity + * 02/04/02 P. Diefenbaugh Cleaned up ACPI PCI IRQ routing. */ /* * Here is what the interrupt logic between a PCI device and the CPU looks like: @@ -56,9 +57,8 @@ #include #include #include +#include -#include -#include #include #include #include @@ -92,11 +92,37 @@ unsigned char trigger : 1; /* trigger mode (see iosapic.h) */ } iosapic_irq[IA64_NUM_VECTORS]; +static struct iosapic { + char *addr; /* base address of IOSAPIC */ + unsigned char pcat_compat; /* 8259 compatibility flag */ + unsigned char base_irq; /* first irq assigned to this IOSAPIC */ + unsigned short max_pin; /* max input pin supported in this IOSAPIC */ +} iosapic_lists[256] __initdata; + +static int num_iosapic = 0; + + +/* + * Find an IOSAPIC associated with an IRQ + */ +static inline int __init +find_iosapic (unsigned int irq) +{ + int i; + + for (i = 0; i < num_iosapic; i++) { + if ((irq - iosapic_lists[i].base_irq) < iosapic_lists[i].max_pin) + return i; + } + + return -1; +} + /* * Translate IOSAPIC irq number to the corresponding IA-64 interrupt vector. If no * entry exists, return -1. */ -int +static int iosapic_irq_to_vector (int irq) { int vector; @@ -479,7 +505,7 @@ int vector; switch (int_type) { - case ACPI20_ENTRY_PIS_PMI: + case ACPI_INTERRUPT_PMI: vector = iosapic_vector; /* * since PMI vector is alloc'd by FW(ACPI) not by kernel, @@ -488,15 +514,15 @@ iosapic_reassign_vector(vector); delivery = IOSAPIC_PMI; break; - case ACPI20_ENTRY_PIS_CPEI: - vector = IA64_PCE_VECTOR; - delivery = IOSAPIC_LOWEST_PRIORITY; - break; - case ACPI20_ENTRY_PIS_INIT: + case ACPI_INTERRUPT_INIT: vector = ia64_alloc_irq(); delivery = IOSAPIC_INIT; break; - default: + case ACPI_INTERRUPT_CPEI: + vector = IA64_PCE_VECTOR; + delivery = IOSAPIC_LOWEST_PRIORITY; + break; + default: printk("iosapic_register_platform_irq(): invalid int type\n"); return -1; } @@ -542,31 +568,41 @@ void __init iosapic_init (unsigned long phys_addr, unsigned int base_irq, int pcat_compat) { - int i, irq, max_pin, vector, pin; + int irq, max_pin, vector, pin; unsigned int ver; char *addr; static int first_time = 1; if (first_time) { first_time = 0; - for (vector = 0; vector < IA64_NUM_VECTORS; ++vector) iosapic_irq[vector].pin = -1; /* mark as unused */ + } + if (pcat_compat) { /* - * Fetch the PCI interrupt routing table: + * Disable the compatibility mode interrupts (8259 style), needs IN/OUT support + * enabled. */ - acpi_cf_get_pci_vectors(&pci_irq.route, &pci_irq.num_routes); + printk("%s: Disabling PC-AT compatible 8259 interrupts\n", __FUNCTION__); + outb(0xff, 0xA1); + outb(0xff, 0x21); } addr = ioremap(phys_addr, 0); ver = iosapic_version(addr); max_pin = (ver >> 16) & 0xff; + iosapic_lists[num_iosapic].addr = addr; + iosapic_lists[num_iosapic].pcat_compat = pcat_compat; + iosapic_lists[num_iosapic].base_irq = base_irq; + iosapic_lists[num_iosapic].max_pin = max_pin; + num_iosapic++; + printk("IOSAPIC: version %x.%x, address 0x%lx, IRQs 0x%02x-0x%02x\n", (ver & 0xf0) >> 4, (ver & 0x0f), phys_addr, base_irq, base_irq + max_pin); - if ((base_irq == 0) && pcat_compat) + if ((base_irq == 0) && pcat_compat) { /* * Map the legacy ISA devices into the IOSAPIC data. Some of these may * get reprogrammed later on with data from the ACPI Interrupt Source @@ -590,11 +626,37 @@ /* program the IOSAPIC routing table: */ set_rte(vector, (ia64_get_lid() >> 16) & 0xffff); } + } +} + +void __init +iosapic_init_pci_irq (void) +{ + int i, index, vector, pin; + int base_irq, max_pin, pcat_compat; + unsigned int irq; + char *addr; + + if (0 != acpi_get_prt(&pci_irq.route, &pci_irq.num_routes)) + return; for (i = 0; i < pci_irq.num_routes; i++) { + irq = pci_irq.route[i].irq; - if ((irq < (int)base_irq) || (irq > (int)(base_irq + max_pin))) + index = find_iosapic(irq); + if (index < 0) { + printk("PCI: IRQ %u has no IOSAPIC mapping\n", irq); + continue; + } + + addr = iosapic_lists[index].addr; + base_irq = iosapic_lists[index].base_irq; + max_pin = iosapic_lists[index].max_pin; + pcat_compat = iosapic_lists[index].pcat_compat; + pin = irq - base_irq; + + if ((unsigned) pin > max_pin) /* the interrupt route is for another controller... */ continue; @@ -607,18 +669,13 @@ vector = ia64_alloc_irq(); } - register_irq(irq, vector, irq - base_irq, - /* IOSAPIC_POL_LOW, IOSAPIC_LEVEL */ - IOSAPIC_LOWEST_PRIORITY, 0, 0, base_irq, addr); + register_irq(irq, vector, pin, IOSAPIC_LOWEST_PRIORITY, 0, 0, base_irq, addr); -# ifdef DEBUG_IRQ_ROUTING +#ifdef DEBUG_IRQ_ROUTING printk("PCI: (B%d,I%d,P%d) -> IOSAPIC irq 0x%02x -> vector 0x%02x\n", pci_irq.route[i].bus, pci_irq.route[i].pci_id>>16, pci_irq.route[i].pin, iosapic_irq[vector].base_irq + iosapic_irq[vector].pin, vector); -# endif - - /* program the IOSAPIC routing table: */ - set_rte(vector, (ia64_get_lid() >> 16) & 0xffff); +#endif } } @@ -631,6 +688,11 @@ struct hw_interrupt_type *irq_type; irq_desc_t *idesc; + if (phase == 0) { + iosapic_init_pci_irq(); + return; + } + if (phase != 1) return; @@ -670,10 +732,10 @@ irq_type = &irq_type_iosapic_level; idesc = irq_desc(vector); - if (idesc->handler != irq_type){ + if (idesc->handler != irq_type) { if (idesc->handler != &no_irq_type) - printk("iosapic_pci_fixup: changing vector 0x%02x from " - "%s to %s\n", vector, + printk("iosapic_pci_fixup: changing vector 0x%02x " + "from %s to %s\n", vector, idesc->handler->typename, irq_type->typename); idesc->handler = irq_type; diff -Nru a/arch/ia64/kernel/irq.c b/arch/ia64/kernel/irq.c --- a/arch/ia64/kernel/irq.c Mon Apr 15 15:07:57 2002 +++ b/arch/ia64/kernel/irq.c Mon Apr 15 15:07:57 2002 @@ -68,6 +68,23 @@ irq_desc_t _irq_desc[NR_IRQS] __cacheline_aligned = { [0 ... NR_IRQS-1] = { IRQ_DISABLED, &no_irq_type, NULL, 0, SPIN_LOCK_UNLOCKED}}; +#ifdef CONFIG_IA64_GENERIC +struct irq_desc * __ia64_irq_desc (unsigned int irq) +{ + return _irq_desc + irq; +} + +ia64_vector __ia64_irq_to_vector (unsigned int irq) +{ + return (ia64_vector) irq; +} + +unsigned int __ia64_local_vector_to_irq (ia64_vector vec) +{ + return (unsigned int) vec; +} +#endif + static void register_irq_proc (unsigned int irq); /* diff -Nru a/arch/ia64/kernel/ivt.S b/arch/ia64/kernel/ivt.S --- a/arch/ia64/kernel/ivt.S Mon Apr 15 15:07:56 2002 +++ b/arch/ia64/kernel/ivt.S Mon Apr 15 15:07:56 2002 @@ -127,7 +127,7 @@ ;; (p7) dep r17=r17,r19,(PAGE_SHIFT-3),3 // put region number bits in place srlz.d // ensure "rsm psr.dt" has taken effect -(p6) movl r19=__pa(SWAPPER_PGD_ADDR) // region 5 is rooted at swapper_pg_dir +(p6) movl r19=__pa(swapper_pg_dir) // region 5 is rooted at swapper_pg_dir (p6) shr.u r21=r21,PGDIR_SHIFT+PAGE_SHIFT (p7) shr.u r21=r21,PGDIR_SHIFT+PAGE_SHIFT-3 ;; @@ -413,7 +413,7 @@ ;; (p7) dep r17=r17,r19,(PAGE_SHIFT-3),3 // put region number bits in place srlz.d -(p6) movl r19=__pa(SWAPPER_PGD_ADDR) // region 5 is rooted at swapper_pg_dir +(p6) movl r19=__pa(swapper_pg_dir) // region 5 is rooted at swapper_pg_dir (p6) shr.u r21=r21,PGDIR_SHIFT+PAGE_SHIFT (p7) shr.u r21=r21,PGDIR_SHIFT+PAGE_SHIFT-3 ;; diff -Nru a/arch/ia64/kernel/mca.c b/arch/ia64/kernel/mca.c --- a/arch/ia64/kernel/mca.c Mon Apr 15 15:07:57 2002 +++ b/arch/ia64/kernel/mca.c Mon Apr 15 15:07:57 2002 @@ -41,6 +41,7 @@ #include #include #include +#include #include #include @@ -51,7 +52,6 @@ #include #include -#include #undef MCA_PRT_XTRA_DATA @@ -353,7 +353,9 @@ verify_guid (efi_guid_t *test, efi_guid_t *target) { int rc; +#ifdef IA64_MCA_DEBUG_INFO char out[40]; +#endif if ((rc = efi_guidcmp(*test, *target))) { IA64_MCA_DEBUG(KERN_DEBUG @@ -497,7 +499,7 @@ { irq_desc_t *desc; unsigned int irq; - int cpev = acpi_request_vector(ACPI20_ENTRY_PIS_CPEI); + int cpev = acpi_request_vector(ACPI_INTERRUPT_CPEI); if (cpev >= 0) { for (irq = 0; irq < NR_IRQS; ++irq) diff -Nru a/arch/ia64/kernel/minstate.h b/arch/ia64/kernel/minstate.h --- a/arch/ia64/kernel/minstate.h Mon Apr 15 15:07:57 2002 +++ b/arch/ia64/kernel/minstate.h Mon Apr 15 15:07:57 2002 @@ -1,5 +1,7 @@ #include +#include + #include "entry.h" /* @@ -28,18 +30,19 @@ * on interrupts. */ #define MINSTATE_START_SAVE_MIN_VIRT \ - dep r1=-1,r1,61,3; /* r1 = current (virtual) */ \ (pUser) mov ar.rsc=0; /* set enforced lazy mode, pl 0, little-endian, loadrs=0 */ \ + dep r1=-1,r1,61,3; /* r1 = current (virtual) */ \ ;; \ +(pUser) mov.m rARRNAT=ar.rnat; \ (pUser) addl rKRBS=IA64_RBS_OFFSET,r1; /* compute base of RBS */ \ -(pUser) mov rARRNAT=ar.rnat; \ (pKern) mov r1=sp; /* get sp */ \ ;; \ -(pUser) addl r1=IA64_STK_OFFSET-IA64_PT_REGS_SIZE,r1; /* compute base of memory stack */ \ +(pUser) lfetch.fault.excl.nt1 [rKRBS]; \ (pUser) mov rARBSPSTORE=ar.bspstore; /* save ar.bspstore */ \ +(pUser) addl r1=IA64_STK_OFFSET-IA64_PT_REGS_SIZE,r1; /* compute base of memory stack */ \ ;; \ -(pKern) addl r1=-IA64_PT_REGS_SIZE,r1; /* if in kernel mode, use sp (r12) */ \ (pUser) mov ar.bspstore=rKRBS; /* switch to kernel RBS */ \ +(pKern) addl r1=-IA64_PT_REGS_SIZE,r1; /* if in kernel mode, use sp (r12) */ \ ;; \ (pUser) mov r18=ar.bsp; \ (pUser) mov ar.rsc=0x3; /* set eager mode, pl 0, little-endian, loadrs=0 */ \ @@ -125,52 +128,58 @@ ;; \ SAVE_IFS; \ MINSTATE_START_SAVE_MIN \ + add r17=L1_CACHE_BYTES,r1 /* really: biggest cache-line size */ \ ;; \ - mov r16=r1; /* initialize first base pointer */ \ - adds r17=8,r1; /* initialize second base pointer */ \ + st8 [r1]=rCRIPSR; /* save cr.ipsr */ \ + lfetch.fault.excl.nt1 [r17],L1_CACHE_BYTES; \ + add r16=16,r1; /* initialize first base pointer */ \ ;; \ - st8 [r16]=rCRIPSR,16; /* save cr.ipsr */ \ - st8 [r17]=rCRIIP,16; /* save cr.iip */ \ + lfetch.fault.excl.nt1 [r17],L1_CACHE_BYTES; \ + ;; \ + lfetch.fault.excl.nt1 [r17]; \ + adds r17=8,r1; /* initialize second base pointer */ \ (pKern) mov r18=r0; /* make sure r18 isn't NaT */ \ ;; \ + st8 [r17]=rCRIIP,16; /* save cr.iip */ \ st8 [r16]=rCRIFS,16; /* save cr.ifs */ \ - st8 [r17]=rARUNAT,16; /* save ar.unat */ \ (pUser) sub r18=r18,rKRBS; /* r18=RSE.ndirty*8 */ \ ;; \ + st8 [r17]=rARUNAT,16; /* save ar.unat */ \ st8 [r16]=rARPFS,16; /* save ar.pfs */ \ + shl r18=r18,16; /* compute ar.rsc to be used for "loadrs" */ \ + ;; \ st8 [r17]=rARRSC,16; /* save ar.rsc */ \ - tbit.nz p15,p0=rCRIPSR,IA64_PSR_I_BIT \ - ;; /* avoid RAW on r16 & r17 */ \ -(pKern) adds r16=16,r16; /* skip over ar_rnat field */ \ -(pKern) adds r17=16,r17; /* skip over ar_bspstore field */ \ (pUser) st8 [r16]=rARRNAT,16; /* save ar.rnat */ \ +(pKern) adds r16=16,r16; /* skip over ar_rnat field */ \ + ;; /* avoid RAW on r16 & r17 */ \ (pUser) st8 [r17]=rARBSPSTORE,16; /* save ar.bspstore */ \ - ;; \ st8 [r16]=rARPR,16; /* save predicates */ \ - st8 [r17]=rB6,16; /* save b6 */ \ - shl r18=r18,16; /* compute ar.rsc to be used for "loadrs" */ \ +(pKern) adds r17=16,r17; /* skip over ar_bspstore field */ \ ;; \ + st8 [r17]=rB6,16; /* save b6 */ \ st8 [r16]=r18,16; /* save ar.rsc value for "loadrs" */ \ - st8.spill [r17]=rR1,16; /* save original r1 */ \ + tbit.nz p15,p0=rCRIPSR,IA64_PSR_I_BIT \ ;; \ +.mem.offset 8,0; st8.spill [r17]=rR1,16; /* save original r1 */ \ .mem.offset 0,0; st8.spill [r16]=r2,16; \ + ;; \ .mem.offset 8,0; st8.spill [r17]=r3,16; \ +.mem.offset 0,0; st8.spill [r16]=r12,16; \ adds r2=IA64_PT_REGS_R16_OFFSET,r1; \ ;; \ -.mem.offset 0,0; st8.spill [r16]=r12,16; \ -.mem.offset 8,0; st8.spill [r17]=r13,16; \ +.mem.offset 8,0; st8.spill [r17]=r13,16; \ +.mem.offset 0,0; st8.spill [r16]=r14,16; \ cmp.eq pNonSys,pSys=r0,r0 /* initialize pSys=0, pNonSys=1 */ \ ;; \ -.mem.offset 0,0; st8.spill [r16]=r14,16; \ -.mem.offset 8,0; st8.spill [r17]=r15,16; \ +.mem.offset 8,0; st8.spill [r17]=r15,16; \ +.mem.offset 0,0; st8.spill [r16]=r8,16; \ dep r14=-1,r0,61,3; \ ;; \ -.mem.offset 0,0; st8.spill [r16]=r8,16; \ -.mem.offset 8,0; st8.spill [r17]=r9,16; \ +.mem.offset 8,0; st8.spill [r17]=r9,16; \ +.mem.offset 0,0; st8.spill [r16]=r10,16; \ adds r12=-16,r1; /* switch to kernel memory stack (with 16 bytes of scratch) */ \ ;; \ -.mem.offset 0,0; st8.spill [r16]=r10,16; \ -.mem.offset 8,0; st8.spill [r17]=r11,16; \ +.mem.offset 8,0; st8.spill [r17]=r11,16; \ mov r13=IA64_KR(CURRENT); /* establish `current' */ \ ;; \ EXTRA; \ @@ -190,10 +199,12 @@ */ #define SAVE_REST \ .mem.offset 0,0; st8.spill [r2]=r16,16; \ -.mem.offset 8,0; st8.spill [r3]=r17,16; \ ;; \ +.mem.offset 8,0; st8.spill [r3]=r17,16; \ .mem.offset 0,0; st8.spill [r2]=r18,16; \ + ;; \ .mem.offset 8,0; st8.spill [r3]=r19,16; \ +.mem.offset 0,0; st8.spill [r2]=r20,16; \ ;; \ mov r16=ar.ccv; /* M-unit */ \ movl r18=FPSR_DEFAULT /* L-unit */ \ @@ -201,30 +212,29 @@ mov r17=ar.fpsr; /* M-unit */ \ mov ar.fpsr=r18; /* M-unit */ \ ;; \ -.mem.offset 0,0; st8.spill [r2]=r20,16; \ .mem.offset 8,0; st8.spill [r3]=r21,16; \ +.mem.offset 0,0; st8.spill [r2]=r22,16; \ mov r18=b0; \ ;; \ -.mem.offset 0,0; st8.spill [r2]=r22,16; \ .mem.offset 8,0; st8.spill [r3]=r23,16; \ +.mem.offset 0,0; st8.spill [r2]=r24,16; \ mov r19=b7; \ ;; \ -.mem.offset 0,0; st8.spill [r2]=r24,16; \ .mem.offset 8,0; st8.spill [r3]=r25,16; \ - ;; \ .mem.offset 0,0; st8.spill [r2]=r26,16; \ -.mem.offset 8,0; st8.spill [r3]=r27,16; \ ;; \ +.mem.offset 8,0; st8.spill [r3]=r27,16; \ .mem.offset 0,0; st8.spill [r2]=r28,16; \ -.mem.offset 8,0; st8.spill [r3]=r29,16; \ ;; \ +.mem.offset 8,0; st8.spill [r3]=r29,16; \ .mem.offset 0,0; st8.spill [r2]=r30,16; \ -.mem.offset 8,0; st8.spill [r3]=r31,16; \ ;; \ +.mem.offset 8,0; st8.spill [r3]=r31,16; \ st8 [r2]=r16,16; /* ar.ccv */ \ - st8 [r3]=r17,16; /* ar.fpsr */ \ ;; \ + st8 [r3]=r17,16; /* ar.fpsr */ \ st8 [r2]=r18,16; /* b0 */ \ + ;; \ st8 [r3]=r19,16+8; /* b7 */ \ ;; \ stf.spill [r2]=f6,32; \ diff -Nru a/arch/ia64/kernel/pci.c b/arch/ia64/kernel/pci.c --- a/arch/ia64/kernel/pci.c Mon Apr 15 15:07:57 2002 +++ b/arch/ia64/kernel/pci.c Mon Apr 15 15:07:57 2002 @@ -42,101 +42,183 @@ extern void ia64_mca_check_errors( void ); #endif +struct pci_fixup pcibios_fixups[1]; + +struct pci_ops *pci_root_ops; + +int (*pci_config_read)(int seg, int bus, int dev, int fn, int reg, int len, u32 *value); +int (*pci_config_write)(int seg, int bus, int dev, int fn, int reg, int len, u32 value); + + /* - * This interrupt-safe spinlock protects all accesses to PCI - * configuration space. + * Low-level SAL-based PCI configuration access functions. Note that SAL + * calls are already serialized (via sal_lock), so we don't need another + * synchronization mechanism here. Not using segment number (yet). */ -static spinlock_t pci_lock = SPIN_LOCK_UNLOCKED; -struct pci_fixup pcibios_fixups[] = { - { 0 } -}; +#define PCI_SAL_ADDRESS(bus, dev, fn, reg) \ + ((u64)(bus << 16) | (u64)(dev << 11) | (u64)(fn << 8) | (u64)(reg)) -/* Macro to build a PCI configuration address to be passed as a parameter to SAL. */ +static int +pci_sal_read (int seg, int bus, int dev, int fn, int reg, int len, u32 *value) +{ + int result = 0; + u64 data = 0; -#define PCI_CONFIG_ADDRESS(dev, where) \ - (((u64) dev->bus->number << 16) | ((u64) (dev->devfn & 0xff) << 8) | (where & 0xff)) + if (!value || (bus > 255) || (dev > 31) || (fn > 7) || (reg > 255)) + return -EINVAL; + + result = ia64_sal_pci_config_read(PCI_SAL_ADDRESS(bus, dev, fn, reg), len, &data); + + *value = (u32) data; + + return result; +} static int -pci_conf_read_config_byte(struct pci_dev *dev, int where, u8 *value) +pci_sal_write (int seg, int bus, int dev, int fn, int reg, int len, u32 value) { - s64 status; - u64 lval; + if ((bus > 255) || (dev > 31) || (fn > 7) || (reg > 255)) + return -EINVAL; - status = ia64_sal_pci_config_read(PCI_CONFIG_ADDRESS(dev, where), 1, &lval); - *value = lval; - return status; + return ia64_sal_pci_config_write(PCI_SAL_ADDRESS(bus, dev, fn, reg), len, value); } + static int -pci_conf_read_config_word(struct pci_dev *dev, int where, u16 *value) +pci_sal_read_config_byte (struct pci_dev *dev, int where, u8 *value) { - s64 status; - u64 lval; + int result = 0; + u32 data = 0; + + if (!value) + return -EINVAL; - status = ia64_sal_pci_config_read(PCI_CONFIG_ADDRESS(dev, where), 2, &lval); - *value = lval; - return status; + result = pci_sal_read(0, dev->bus->number, PCI_SLOT(dev->devfn), + PCI_FUNC(dev->devfn), where, 1, &data); + + *value = (u8) data; + + return result; } static int -pci_conf_read_config_dword(struct pci_dev *dev, int where, u32 *value) +pci_sal_read_config_word (struct pci_dev *dev, int where, u16 *value) { - s64 status; - u64 lval; + int result = 0; + u32 data = 0; + + if (!value) + return -EINVAL; + + result = pci_sal_read(0, dev->bus->number, PCI_SLOT(dev->devfn), + PCI_FUNC(dev->devfn), where, 2, &data); + + *value = (u16) data; - status = ia64_sal_pci_config_read(PCI_CONFIG_ADDRESS(dev, where), 4, &lval); - *value = lval; - return status; + return result; } static int -pci_conf_write_config_byte (struct pci_dev *dev, int where, u8 value) +pci_sal_read_config_dword (struct pci_dev *dev, int where, u32 *value) { - return ia64_sal_pci_config_write(PCI_CONFIG_ADDRESS(dev, where), 1, value); + if (!value) + return -EINVAL; + + return pci_sal_read(0, dev->bus->number, PCI_SLOT(dev->devfn), + PCI_FUNC(dev->devfn), where, 4, value); } static int -pci_conf_write_config_word (struct pci_dev *dev, int where, u16 value) +pci_sal_write_config_byte (struct pci_dev *dev, int where, u8 value) { - return ia64_sal_pci_config_write(PCI_CONFIG_ADDRESS(dev, where), 2, value); + return pci_sal_write(0, dev->bus->number, PCI_SLOT(dev->devfn), + PCI_FUNC(dev->devfn), where, 1, value); } static int -pci_conf_write_config_dword (struct pci_dev *dev, int where, u32 value) +pci_sal_write_config_word (struct pci_dev *dev, int where, u16 value) { - return ia64_sal_pci_config_write(PCI_CONFIG_ADDRESS(dev, where), 4, value); + return pci_sal_write(0, dev->bus->number, PCI_SLOT(dev->devfn), + PCI_FUNC(dev->devfn), where, 2, value); } -struct pci_ops pci_conf = { - pci_conf_read_config_byte, - pci_conf_read_config_word, - pci_conf_read_config_dword, - pci_conf_write_config_byte, - pci_conf_write_config_word, - pci_conf_write_config_dword +static int +pci_sal_write_config_dword (struct pci_dev *dev, int where, u32 value) +{ + return pci_sal_write(0, dev->bus->number, PCI_SLOT(dev->devfn), + PCI_FUNC(dev->devfn), where, 4, value); +} + +struct pci_ops pci_sal_ops = { + pci_sal_read_config_byte, + pci_sal_read_config_word, + pci_sal_read_config_dword, + pci_sal_write_config_byte, + pci_sal_write_config_word, + pci_sal_write_config_dword }; + /* * Initialization. Uses the SAL interface */ + +struct pci_bus * +pcibios_scan_root(int seg, int bus) +{ + struct list_head *list = NULL; + struct pci_bus *pci_bus = NULL; + + list_for_each(list, &pci_root_buses) { + pci_bus = pci_bus_b(list); + if (pci_bus->number == bus) { + /* Already scanned */ + printk("PCI: Bus (%02x:%02x) already probed\n", seg, bus); + return pci_bus; + } + } + + printk("PCI: Probing PCI hardware on bus (%02x:%02x)\n", seg, bus); + + return pci_scan_bus(bus, pci_root_ops, NULL); +} + +void __init +pcibios_config_init (void) +{ + if (pci_root_ops) + return; + + printk("PCI: Using SAL to access configuration space\n"); + + pci_root_ops = &pci_sal_ops; + pci_config_read = pci_sal_read; + pci_config_write = pci_sal_write; + + return; +} + void __init pcibios_init (void) { # define PCI_BUSES_TO_SCAN 255 - int i; + int i = 0; #ifdef CONFIG_IA64_MCA ia64_mca_check_errors(); /* For post-failure MCA error logging */ #endif - platform_pci_fixup(0); /* phase 0 initialization (before PCI bus has been scanned) */ + pcibios_config_init(); + + platform_pci_fixup(0); /* phase 0 fixups (before buses scanned) */ printk("PCI: Probing PCI hardware\n"); for (i = 0; i < PCI_BUSES_TO_SCAN; i++) - pci_scan_bus(i, &pci_conf, NULL); + pci_scan_bus(i, pci_root_ops, NULL); + + platform_pci_fixup(1); /* phase 1 fixups (after buses scanned) */ - platform_pci_fixup(1); /* phase 1 initialization (after PCI bus has been scanned) */ return; } @@ -186,7 +268,12 @@ int pcibios_enable_device (struct pci_dev *dev) { + if (!dev) + return -EINVAL; + /* Not needed, since we enable all devices at startup. */ + + printk(KERN_INFO "PCI: Found IRQ %d for device %s\n", dev->irq, dev->slot_name); return 0; } @@ -233,8 +320,7 @@ vma->vm_page_prot = pgprot_noncached(vma->vm_page_prot); if (remap_page_range(vma, vma->vm_start, vma->vm_pgoff << PAGE_SHIFT, - vma->vm_end - vma->vm_start, - vma->vm_page_prot)) + vma->vm_end - vma->vm_start, vma->vm_page_prot)) return -EAGAIN; return 0; diff -Nru a/arch/ia64/kernel/process.c b/arch/ia64/kernel/process.c --- a/arch/ia64/kernel/process.c Mon Apr 15 15:07:57 2002 +++ b/arch/ia64/kernel/process.c Mon Apr 15 15:07:57 2002 @@ -24,7 +24,7 @@ #include #include #include -#include +#include #include #include #include @@ -145,7 +145,7 @@ /* * We use this if we don't have any better idle routine.. */ -static void +void default_idle (void) { /* may want to do PAL_LIGHT_HALT here... */ @@ -660,7 +660,7 @@ { struct task_struct *tsk; - tsk = __get_free_pages(GFP_KERNEL, KERNEL_STACK_SIZE_ORDER); + tsk = (void *) __get_free_pages(GFP_KERNEL, KERNEL_STACK_SIZE_ORDER); if (!tsk) return NULL; diff -Nru a/arch/ia64/kernel/semaphore.c b/arch/ia64/kernel/semaphore.c --- a/arch/ia64/kernel/semaphore.c Mon Apr 15 15:07:57 2002 +++ b/arch/ia64/kernel/semaphore.c Mon Apr 15 15:07:57 2002 @@ -1,8 +1,8 @@ /* * IA-64 semaphore implementation (derived from x86 version). * - * Copyright (C) 1999-2000 Hewlett-Packard Co - * Copyright (C) 1999-2000 David Mosberger-Tang + * Copyright (C) 1999-2000, 2002 Hewlett-Packard Co + * David Mosberger-Tang */ /* @@ -25,6 +25,7 @@ */ #include +#include #include /* diff -Nru a/arch/ia64/kernel/setup.c b/arch/ia64/kernel/setup.c --- a/arch/ia64/kernel/setup.c Mon Apr 15 15:07:56 2002 +++ b/arch/ia64/kernel/setup.c Mon Apr 15 15:07:56 2002 @@ -19,6 +19,7 @@ #include #include +#include #include #include #include @@ -30,7 +31,6 @@ #include #include -#include #include #include #include @@ -54,7 +54,10 @@ extern char _end; +#ifdef CONFIG_SMP unsigned long __per_cpu_offset[NR_CPUS]; +#endif + struct cpuinfo_ia64 cpu_info __per_cpu_data; unsigned long ia64_phys_stacked_size_p8; @@ -64,6 +67,8 @@ unsigned long ia64_iobase; /* virtual address for I/O accesses */ +unsigned char aux_device_present = 0xaa; /* XXX remove this when legacy I/O is gone */ + #define COMMAND_LINE_SIZE 512 char saved_command_line[COMMAND_LINE_SIZE]; /* used in proc filesystem */ @@ -282,6 +287,7 @@ setup_arch (char **cmdline_p) { extern unsigned long ia64_iobase; + unsigned long phys_iobase; unw_init(); @@ -314,24 +320,23 @@ #endif /* - * Set `iobase' to the appropriate address in region 6 - * (uncached access range) + * Set `iobase' to the appropriate address in region 6 (uncached access range). * - * The EFI memory map is the "prefered" location to get the I/O port - * space base, rather the relying on AR.KR0. This should become more - * clear in future SAL specs. We'll fall back to getting it out of - * AR.KR0 if no appropriate entry is found in the memory map. + * The EFI memory map is the "preferred" location to get the I/O port space base, + * rather the relying on AR.KR0. This should become more clear in future SAL + * specs. We'll fall back to getting it out of AR.KR0 if no appropriate entry is + * found in the memory map. */ - ia64_iobase = efi_get_iobase(); - if (ia64_iobase) + phys_iobase = efi_get_iobase(); + if (phys_iobase) /* set AR.KR0 since this is all we use it for anyway */ - ia64_set_kr(IA64_KR_IO_BASE, ia64_iobase); + ia64_set_kr(IA64_KR_IO_BASE, phys_iobase); else { - ia64_iobase = ia64_get_kr(IA64_KR_IO_BASE); + phys_iobase = ia64_get_kr(IA64_KR_IO_BASE); printk("No I/O port range found in EFI memory map, falling back to AR.KR0\n"); - printk("I/O port base = 0x%lx\n", ia64_iobase); + printk("I/O port base = 0x%lx\n", phys_iobase); } - ia64_iobase = __IA64_UNCACHED_OFFSET | (ia64_iobase & ~PAGE_OFFSET); + ia64_iobase = (unsigned long) ioremap(phys_iobase, 0); #ifdef CONFIG_SMP cpu_physical_id(0) = hard_smp_processor_id(); @@ -339,20 +344,23 @@ cpu_init(); /* initialize the bootstrap CPU */ - if (efi.acpi20) { - /* Parse the ACPI 2.0 tables */ - acpi20_parse(efi.acpi20); - } else if (efi.acpi) { - /* Parse the ACPI tables */ - acpi_parse(efi.acpi); - } - +#ifdef CONFIG_ACPI_BOOT + acpi_boot_init(*cmdline_p); +#endif #ifdef CONFIG_VT -# if defined(CONFIG_VGA_CONSOLE) - conswitchp = &vga_con; -# elif defined(CONFIG_DUMMY_CONSOLE) +# if defined(CONFIG_DUMMY_CONSOLE) conswitchp = &dummy_con; # endif +# if defined(CONFIG_VGA_CONSOLE) + /* + * Non-legacy systems may route legacy VGA MMIO range to system + * memory. vga_con probes the MMIO hole, so memory looks like + * a VGA device to it. The EFI memory map can tell us if it's + * memory so we can avoid this problem. + */ + if (efi_mem_type(0xA0000) != EFI_CONVENTIONAL_MEMORY) + conswitchp = &vga_con; +# endif #endif #ifdef CONFIG_IA64_MCA @@ -522,20 +530,25 @@ void cpu_init (void) { - extern char __per_cpu_start[], __phys_per_cpu_start[], __per_cpu_end[]; + extern char __per_cpu_start[], __phys_per_cpu_start[]; extern void __init ia64_mmu_init (void *); unsigned long num_phys_stacked; pal_vm_info_2_u_t vmi; unsigned int max_ctx; struct cpuinfo_ia64 *my_cpu_info; void *my_cpu_data; + +#ifdef CONFIG_SMP + extern char __per_cpu_end[]; int cpu = smp_processor_id(); my_cpu_data = alloc_bootmem_pages(__per_cpu_end - __per_cpu_start); memcpy(my_cpu_data, __phys_per_cpu_start, __per_cpu_end - __per_cpu_start); - __per_cpu_offset[cpu] = (char *) my_cpu_data - __per_cpu_start; - + my_cpu_info = my_cpu_data + ((char *) &cpu_info - __per_cpu_start); +#else + my_cpu_data = __phys_per_cpu_start; +#endif my_cpu_info = my_cpu_data + ((char *) &cpu_info - __per_cpu_start); /* diff -Nru a/arch/ia64/kernel/signal.c b/arch/ia64/kernel/signal.c --- a/arch/ia64/kernel/signal.c Mon Apr 15 15:07:56 2002 +++ b/arch/ia64/kernel/signal.c Mon Apr 15 15:07:56 2002 @@ -530,8 +530,8 @@ info.si_signo = signr; info.si_errno = 0; info.si_code = SI_USER; - info.si_pid = current->p_pptr->pid; - info.si_uid = current->p_pptr->uid; + info.si_pid = current->parent->pid; + info.si_uid = current->parent->uid; } /* If the (new) signal is now blocked, requeue it. */ @@ -570,7 +570,7 @@ case SIGSTOP: current->state = TASK_STOPPED; current->exit_code = signr; - sig = current->p_pptr->sig; + sig = current->parent->sig; if (sig && !(sig->action[SIGCHLD-1].sa.sa_flags & SA_NOCLDSTOP)) notify_parent(current, SIGCHLD); schedule(); diff -Nru a/arch/ia64/kernel/smp.c b/arch/ia64/kernel/smp.c --- a/arch/ia64/kernel/smp.c Mon Apr 15 15:07:57 2002 +++ b/arch/ia64/kernel/smp.c Mon Apr 15 15:07:57 2002 @@ -48,6 +48,7 @@ #include #include #include +#include #include #include @@ -236,7 +237,7 @@ int cpus = 1; if (cpuid == smp_processor_id()) { - printk(__FUNCTION__" trying to call self\n"); + printk("%s: trying to call self\n", __FUNCTION__); return -EBUSY; } diff -Nru a/arch/ia64/kernel/smpboot.c b/arch/ia64/kernel/smpboot.c --- a/arch/ia64/kernel/smpboot.c Mon Apr 15 15:07:56 2002 +++ b/arch/ia64/kernel/smpboot.c Mon Apr 15 15:07:56 2002 @@ -68,6 +68,7 @@ extern void __init calibrate_delay(void); extern void start_ap(void); +extern unsigned long ia64_iobase; int cpucount; task_t *task_for_booting_cpu; @@ -344,6 +345,11 @@ * Get our bogomips. */ ia64_init_itm(); + + /* + * Set I/O port base per CPU + */ + ia64_set_kr(IA64_KR_IO_BASE, __pa(ia64_iobase)); #ifdef CONFIG_IA64_MCA ia64_mca_cmc_vector_setup(); /* Setup vector on AP & enable */ diff -Nru a/arch/ia64/kernel/sys_ia64.c b/arch/ia64/kernel/sys_ia64.c --- a/arch/ia64/kernel/sys_ia64.c Mon Apr 15 15:07:57 2002 +++ b/arch/ia64/kernel/sys_ia64.c Mon Apr 15 15:07:57 2002 @@ -47,7 +47,7 @@ /* At this point: (!vmm || addr < vmm->vm_end). */ if (TASK_SIZE - len < addr) return -ENOMEM; - if (rgn_offset(addr) + len > RGN_MAP_LIMIT) /* no risk of overflow here... */ + if (REGION_OFFSET(addr) + len > RGN_MAP_LIMIT) /* no risk of overflow here... */ return -ENOMEM; if (!vmm || addr + len <= vmm->vm_start) return addr; @@ -126,7 +126,7 @@ } /* Check against unimplemented/unmapped addresses: */ - if ((newbrk - oldbrk) > RGN_MAP_LIMIT || rgn_offset(newbrk) > RGN_MAP_LIMIT) + if ((newbrk - oldbrk) > RGN_MAP_LIMIT || REGION_OFFSET(newbrk) > RGN_MAP_LIMIT) goto out; /* Check against rlimit.. */ @@ -206,7 +206,7 @@ * or across a region boundary. Note: RGN_MAP_LIMIT is equal to 2^n-PAGE_SIZE * (for some integer n <= 61) and len > 0. */ - roff = rgn_offset(addr); + roff = REGION_OFFSET(addr); if ((len > RGN_MAP_LIMIT) || (roff > (RGN_MAP_LIMIT - len))) { addr = -EINVAL; goto out; diff -Nru a/arch/ia64/kernel/traps.c b/arch/ia64/kernel/traps.c --- a/arch/ia64/kernel/traps.c Mon Apr 15 15:07:57 2002 +++ b/arch/ia64/kernel/traps.c Mon Apr 15 15:07:57 2002 @@ -214,7 +214,8 @@ { struct pt_regs *regs = (struct pt_regs *) &stack; - printk("\n", regs->r15, arg0, arg1, arg2, arg3); + printk("%s(%d): \n", current->comm, current->pid, + regs->r15, arg0, arg1, arg2, arg3); return -ENOSYS; } diff -Nru a/arch/ia64/kernel/unwind_i.h b/arch/ia64/kernel/unwind_i.h --- a/arch/ia64/kernel/unwind_i.h Mon Apr 15 15:07:57 2002 +++ b/arch/ia64/kernel/unwind_i.h Mon Apr 15 15:07:57 2002 @@ -103,7 +103,7 @@ unsigned int in_body : 1; /* are we inside a body (as opposed to a prologue)? */ unsigned long flags; /* see UNW_FLAG_* in unwind.h */ - u8 *imask; /* imask of of spill_mask record or NULL */ + u8 *imask; /* imask of spill_mask record or NULL */ unsigned long pr_val; /* predicate values */ unsigned long pr_mask; /* predicate mask */ long spill_offset; /* psp-relative offset for spill base */ diff -Nru a/arch/ia64/lib/Makefile b/arch/ia64/lib/Makefile --- a/arch/ia64/lib/Makefile Mon Apr 15 15:07:57 2002 +++ b/arch/ia64/lib/Makefile Mon Apr 15 15:07:57 2002 @@ -16,6 +16,9 @@ flush.o io.o do_csum.o \ memcpy.o memset.o strlen.o swiotlb.o +obj-$(CONFIG_ITANIUM) += copy_page.o +obj-$(CONFIG_MCKINLEY) += copy_page_mck.o + IGNORE_FLAGS_OBJS = __divsi3.o __udivsi3.o __modsi3.o __umodsi3.o \ __divdi3.o __udivdi3.o __moddi3.o __umoddi3.o diff -Nru a/arch/ia64/lib/copy_page_mck.S b/arch/ia64/lib/copy_page_mck.S --- /dev/null Wed Dec 31 16:00:00 1969 +++ b/arch/ia64/lib/copy_page_mck.S Mon Apr 15 15:07:57 2002 @@ -0,0 +1,185 @@ +/* + * McKinley-optimized version of copy_page(). + * + * Copyright (C) 2002 Hewlett-Packard Co + * David Mosberger + * + * Inputs: + * in0: address of target page + * in1: address of source page + * Output: + * no return value + * + * General idea: + * - use regular loads and stores to prefetch data to avoid consuming M-slot just for + * lfetches => good for in-cache performance + * - avoid l2 bank-conflicts by not storing into the same 16-byte bank within a single + * cycle + * + * Principle of operation: + * First, note that L1 has a line-size of 64 bytes and L2 a line-size of 128 bytes. + * To avoid secondary misses in L2, we prefetch both source and destination with a line-size + * of 128 bytes. When both of these lines are in the L2 and the first half of the + * source line is in L1, we start copying the remaining words. The second half of the + * source line is prefetched in an earlier iteration, so that by the time we start + * accessing it, it's also present in the L1. + * + * We use a software-pipelined loop to control the overall operation. The pipeline + * has 2*PREFETCH_DIST+K stages. The first PREFETCH_DIST stages are used for prefetching + * source cache-lines. The second PREFETCH_DIST stages are used for prefetching destination + * cache-lines, the last K stages are used to copy the cache-line words not copied by + * the prefetches. The four relevant points in the pipelined are called A, B, C, D: + * p[A] is TRUE if a source-line should be prefetched, p[B] is TRUE if a destination-line + * should be prefetched, p[C] is TRUE if the second half of an L2 line should be brought + * into L1D and p[D] is TRUE if a cacheline needs to be copied. + * + * This all sounds very complicated, but thanks to the modulo-scheduled loop support, + * the resulting code is very regular and quite easy to follow (once you get the idea). + * + * As a secondary optimization, the first 2*PREFETCH_DIST iterations are implemented + * as the separate .prefetch_loop. Logically, this loop performs exactly like the + * main-loop (.line_copy), but has all known-to-be-predicated-off instructions removed, + * so that each loop iteration is faster (again, good for cached case). + * + * When reading the code, it helps to keep the following picture in mind: + * + * word 0 word 1 + * +------+------+--- + * | v[x] | t1 | ^ + * | t2 | t3 | | + * | t4 | t5 | | + * | t6 | t7 | | 128 bytes + * | n[y] | t9 | | (L2 cache line) + * | t10 | t11 | | + * | t12 | t13 | | + * | t14 | t15 | v + * +------+------+--- + * + * Here, v[x] is copied by the (memory) prefetch. n[y] is loaded at p[C] + * to fetch the second-half of the L2 cache line into L1, and the tX words are copied in + * an order that avoids bank conflicts. + */ +#include +#include + +#define PREFETCH_DIST 8 // McKinley sustains 16 outstanding L2 misses (8 ld, 8 st) + +#define src0 r2 +#define src1 r3 +#define dst0 r9 +#define dst1 r10 +#define src_pre_mem r11 +#define dst_pre_mem r14 +#define src_pre_l2 r15 +#define dst_pre_l2 r16 +#define t1 r17 +#define t2 r18 +#define t3 r19 +#define t4 r20 +#define t5 t1 // alias! +#define t6 t2 // alias! +#define t7 t3 // alias! +#define t9 t5 // alias! +#define t10 t4 // alias! +#define t11 t7 // alias! +#define t12 t6 // alias! +#define t14 t10 // alias! +#define t13 r21 +#define t15 r22 + +#define saved_lc r23 +#define saved_pr r24 + +#define A 0 +#define B (PREFETCH_DIST) +#define C (B + PREFETCH_DIST) +#define D (C + 3) +#define N (D + 1) +#define Nrot ((N + 7) & ~7) + +GLOBAL_ENTRY(copy_page) + .prologue + alloc r8 = ar.pfs, 2, Nrot-2, 0, Nrot + + .rotr v[2*PREFETCH_DIST], n[D-C+1] + .rotp p[N] + + .save ar.lc, saved_lc + mov saved_lc = ar.lc + .save pr, saved_pr + mov saved_pr = pr + .body + + mov src_pre_mem = in1 + mov pr.rot = 0x10000 + mov ar.ec = 1 // special unrolled loop + + mov dst_pre_mem = in0 + mov ar.lc = 2*PREFETCH_DIST - 1 + + add src_pre_l2 = 8*8, in1 + add dst_pre_l2 = 8*8, in0 + add src0 = 8, in1 // first t1 src + add src1 = 3*8, in1 // first t3 src + add dst0 = 8, in0 // first t1 dst + add dst1 = 3*8, in0 // first t3 dst + mov t1 = (PAGE_SIZE/128) - (2*PREFETCH_DIST) - 1 + nop.m 0 + nop.i 0 + ;; + // same as .line_copy loop, but with all predicated-off instructions removed: +.prefetch_loop: +(p[A]) ld8 v[A] = [src_pre_mem], 128 // M0 +(p[B]) st8 [dst_pre_mem] = v[B], 128 // M2 + br.ctop.sptk .prefetch_loop + ;; + cmp.eq p16, p0 = r0, r0 // reset p16 to 1 (br.ctop cleared it to zero) + mov ar.lc = t1 // with 64KB pages, t1 is too big to fit in 8 bits! + mov ar.ec = N // # of stages in pipeline + ;; +.line_copy: +(p[D]) ld8 t2 = [src0], 3*8 // M0 +(p[D]) ld8 t4 = [src1], 3*8 // M1 +(p[B]) st8 [dst_pre_mem] = v[B], 128 // M2 prefetch dst from memory +(p[D]) st8 [dst_pre_l2] = n[D-C], 128 // M3 prefetch dst from L2 + ;; +(p[A]) ld8 v[A] = [src_pre_mem], 128 // M0 prefetch src from memory +(p[C]) ld8 n[0] = [src_pre_l2], 128 // M1 prefetch src from L2 +(p[D]) st8 [dst0] = t1, 8 // M2 +(p[D]) st8 [dst1] = t3, 8 // M3 + ;; +(p[D]) ld8 t5 = [src0], 8 +(p[D]) ld8 t7 = [src1], 3*8 +(p[D]) st8 [dst0] = t2, 3*8 +(p[D]) st8 [dst1] = t4, 3*8 + ;; +(p[D]) ld8 t6 = [src0], 3*8 +(p[D]) ld8 t10 = [src1], 8 +(p[D]) st8 [dst0] = t5, 8 +(p[D]) st8 [dst1] = t7, 3*8 + ;; +(p[D]) ld8 t9 = [src0], 3*8 +(p[D]) ld8 t11 = [src1], 3*8 +(p[D]) st8 [dst0] = t6, 3*8 +(p[D]) st8 [dst1] = t10, 8 + ;; +(p[D]) ld8 t12 = [src0], 8 +(p[D]) ld8 t14 = [src1], 8 +(p[D]) st8 [dst0] = t9, 3*8 +(p[D]) st8 [dst1] = t11, 3*8 + ;; +(p[D]) ld8 t13 = [src0], 4*8 +(p[D]) ld8 t15 = [src1], 4*8 +(p[D]) st8 [dst0] = t12, 8 +(p[D]) st8 [dst1] = t14, 8 + ;; +(p[D-1])ld8 t1 = [src0], 8 +(p[D-1])ld8 t3 = [src1], 8 +(p[D]) st8 [dst0] = t13, 4*8 +(p[D]) st8 [dst1] = t15, 4*8 + br.ctop.sptk .line_copy + ;; + mov ar.lc = saved_lc + mov pr = saved_pr, -1 + br.ret.sptk.many rp +END(copy_page) diff -Nru a/arch/ia64/lib/do_csum.S b/arch/ia64/lib/do_csum.S --- a/arch/ia64/lib/do_csum.S Mon Apr 15 15:07:56 2002 +++ b/arch/ia64/lib/do_csum.S Mon Apr 15 15:07:56 2002 @@ -8,9 +8,11 @@ * in0: address of buffer to checksum (char *) * in1: length of the buffer (int) * - * Copyright (C) 1999, 2001 Hewlett-Packard Co - * Copyright (C) 1999 Stephane Eranian + * Copyright (C) 1999, 2001-2002 Hewlett-Packard Co + * Stephane Eranian * + * 02/04/08 David Mosberger + * More cleanup and tuning. * 01/04/18 Jun Nakajima * Clean up and optimize and the software pipeline, loading two * back-to-back 8-byte words per loop. Clean up the initialization @@ -71,8 +73,6 @@ // calculating the Internet checksum. // // NOT YET DONE: -// - use the lfetch instruction to augment the chances of the data being in -// the cache when we need it. // - Maybe another algorithm which would take care of the folding at the // end in a different manner // - Work with people more knowledgeable than me on the network stack @@ -102,10 +102,6 @@ #define buf in0 #define len in1 -#ifndef CONFIG_IA64_LOAD_LATENCY -#define CONFIG_IA64_LOAD_LATENCY 2 -#endif - #define LOAD_LATENCY 2 // XXX fix me #if (LOAD_LATENCY != 1) && (LOAD_LATENCY != 2) @@ -122,45 +118,46 @@ .prologue .save ar.pfs, saved_pfs alloc saved_pfs=ar.pfs,2,16,1,16 - .rotr word1[4], word2[4],result1[4],result2[4] - .rotp p[PIPE_DEPTH] + .rotr word1[4], word2[4],result1[LOAD_LATENCY+2],result2[LOAD_LATENCY+2] + .rotp p[PIPE_DEPTH], pC1[2], pC2[2] mov ret0=r0 // in case we have zero length cmp.lt p0,p6=r0,len // check for zero length or negative (32bit len) - ;; // avoid WAW on CFM - mov tmp3=0x7 // a temporary mask/value + ;; add tmp1=buf,len // last byte's address -(p6) br.ret.spnt.many rp // return if true (hope we can avoid that) + .save pr, saved_pr + mov saved_pr=pr // preserve predicates (rotation) +(p6) br.ret.spnt.many rp // return if zero or negative length - and firstoff=7,buf // how many bytes off for first1 element - tbit.nz p15,p0=buf,0 // is buf an odd address ? mov hmask=-1 // intialize head mask - ;; - andcm first1=buf,tmp3 // 8byte aligned down address of first1 element + tbit.nz p15,p0=buf,0 // is buf an odd address? + and first1=-8,buf // 8-byte align down address of first1 element + + and firstoff=7,buf // how many bytes off for first1 element mov tmask=-1 // initialize tail mask - adds tmp2=-1,tmp1 // last-1 + ;; + adds tmp2=-1,tmp1 // last-1 and lastoff=7,tmp1 // how many bytes off for last element - andcm last=tmp2,tmp3 // address of word containing last byte - .save pr, saved_pr - mov saved_pr=pr // preserve predicates (rotation) + ;; + sub tmp1=8,lastoff // complement to lastoff + and last=-8,tmp2 // address of word containing last byte ;; sub tmp3=last,first1 // tmp3=distance from first1 to last + .save ar.lc, saved_lc + mov saved_lc=ar.lc // save lc cmp.eq p8,p9=last,first1 // everything fits in one word ? - sub tmp1=8,lastoff // complement to lastoff - ld8 firstval=[first1],8 // load,ahead of time, "first1" word + + ld8 firstval=[first1],8 // load, ahead of time, "first1" word + and tmp1=7, tmp1 // make sure that if tmp1==8 -> tmp1=0 shl tmp2=firstoff,3 // number of bits ;; - and tmp1=7, tmp1 // make sure that if tmp1==8 -> tmp1=0 -(p9) ld8 lastval=[last] // load,ahead of time, "last" word, if needed +(p9) ld8 lastval=[last] // load, ahead of time, "last" word, if needed + shl tmp1=tmp1,3 // number of bits (p9) adds tmp3=-8,tmp3 // effectively loaded ;; (p8) mov lastval=r0 // we don't need lastval if first1==last - shl tmp1=tmp1,3 // number of bits shl hmask=hmask,tmp2 // build head mask, mask off [0,first1off[ - ;; shr.u tmask=tmask,tmp1 // build tail mask, mask off ]8,lastoff] - .save ar.lc, saved_lc - mov saved_lc=ar.lc // save lc ;; .body #define count tmp3 @@ -171,8 +168,8 @@ ;; // If count is odd, finish this 8-byte word so that we can // load two back-to-back 8-byte words per loop thereafter. - tbit.nz p10,p11=count,0 // if (count is odd) and word1[0]=firstval,hmask // and mask it as appropriate + tbit.nz p10,p11=count,0 // if (count is odd) ;; (p8) mov result1[0]=word1[0] (p9) add result1[0]=word1[0],word2[0] @@ -181,9 +178,8 @@ ;; (p6) adds result1[0]=1,result1[0] (p8) br.cond.dptk .do_csum_exit // if (within an 8-byte word) - ;; (p11) br.cond.dptk .do_csum16 // if (count is even) - ;; + // Here count is odd. ld8 word1[1]=[first1],8 // load an 8-byte word cmp.eq p9,p10=1,count // if (count == 1) @@ -194,11 +190,9 @@ cmp.ltu p6,p0=result1[0],word1[1] ;; (p6) adds result1[0]=1,result1[0] - ;; (p9) br.cond.sptk .do_csum_exit // if (count == 1) exit // Fall through to caluculate the checksum, feeding result1[0] as // the initial value in result1[0]. - ;; // // Calculate the checksum loading two 8-byte words per loop. // @@ -207,45 +201,36 @@ shr.u count=count,1 // we do 16 bytes per loop ;; cmp.eq p9,p10=r0,count // if (count == 0) + adds count=-1,count brp.loop.imp 1f,2f ;; - adds count=-1,count mov ar.ec=PIPE_DEPTH - ;; mov ar.lc=count // set lc - ;; + // result1[0] must be initialized in advance. mov result2[0]=r0 - ;; mov pr.rot=1<<16 - ;; mov carry1=r0 mov carry2=r0 - ;; add first2=8,first1 - ;; (p9) br.cond.sptk .do_csum_exit ;; - nop.m 0 - nop.i 0 - ;; .align 32 1: -(ELD_1) cmp.ltu p31,p0=result1[LOAD_LATENCY],word1[LOAD_LATENCY+1] -(p32) adds carry1=1,carry1 -(ELD_1) cmp.ltu p47,p0=result2[LOAD_LATENCY],word2[LOAD_LATENCY+1] -(p48) adds carry2=1,carry2 +(ELD_1) cmp.ltu pC1[0],p0=result1[LOAD_LATENCY],word1[LOAD_LATENCY+1] +(pC1[1])adds carry1=1,carry1 +(ELD_1) cmp.ltu pC2[0],p0=result2[LOAD_LATENCY],word2[LOAD_LATENCY+1] +(pC2[1])adds carry2=1,carry2 (ELD) add result1[LOAD_LATENCY-1]=result1[LOAD_LATENCY],word1[LOAD_LATENCY] (ELD) add result2[LOAD_LATENCY-1]=result2[LOAD_LATENCY],word2[LOAD_LATENCY] -2: -(p16) ld8 word1[0]=[first1],16 -(p16) ld8 word2[0]=[first2],16 +[2:] +(p[0]) ld8 word1[0]=[first1],16 +(p[0]) ld8 word2[0]=[first2],16 br.ctop.sptk 1b ;; - // Since len is a 32-bit value, carry cannot be larger than - // a 64-bit value. -(p32) adds carry1=1,carry1 // since we miss the last one -(p48) adds carry2=1,carry2 + // Since len is a 32-bit value, carry cannot be larger than a 64-bit value. +(pC1[1])adds carry1=1,carry1 // since we miss the last one +(pC2[1])adds carry2=1,carry2 ;; add result1[LOAD_LATENCY+1]=result1[LOAD_LATENCY+1],carry1 add result2[LOAD_LATENCY+1]=result2[LOAD_LATENCY+1],carry2 @@ -263,18 +248,15 @@ (p6) adds result1[0]=1,result1[0] ;; .do_csum_exit: - movl tmp3=0xffffffff - ;; - // XXX Fixme // // now fold 64 into 16 bits taking care of carry // that's not very good because it has lots of sequentiality // - and tmp1=result1[0],tmp3 + mov tmp3=0xffff + zxt4 tmp1=result1[0] shr.u tmp2=result1[0],32 ;; add result1[0]=tmp1,tmp2 - shr.u tmp3=tmp3,16 ;; and tmp1=result1[0],tmp3 shr.u tmp2=result1[0],16 diff -Nru a/arch/ia64/lib/memset.S b/arch/ia64/lib/memset.S --- a/arch/ia64/lib/memset.S Mon Apr 15 15:07:57 2002 +++ b/arch/ia64/lib/memset.S Mon Apr 15 15:07:57 2002 @@ -9,8 +9,8 @@ * in1: byte value to use for storing * in2: length of the buffer * - * Copyright (C) 1999, 2001 Hewlett-Packard Co - * Copyright (C) 1999 Stephane Eranian + * Copyright (C) 1999, 2001, 2002 Hewlett-Packard Co + * Stephane Eranian */ #include @@ -30,7 +30,19 @@ #define saved_lc r20 #define tmp r21 -GLOBAL_ENTRY(memset) +GLOBAL_ENTRY(__bzero) + .prologue + .save ar.pfs, saved_pfs + alloc saved_pfs=ar.pfs,0,0,3,0 + mov out2=out1 + mov out1=0 + /* FALL THROUGH (explicit NOPs so that next alloc is preceded by stop bit!) */ + nop.m 0 + nop.f 0 + nop.i 0 + ;; +END(__bzero) +GLOBAL_ENTRY(__memset_generic) .prologue .save ar.pfs, saved_pfs alloc saved_pfs=ar.pfs,3,0,0,0 // cnt is sink here @@ -105,4 +117,7 @@ ;; (p6) st1 [buf]=val // only 1 byte left br.ret.sptk.many rp -END(memset) +END(__memset_generic) + + .global memset +memset = __memset_generic // alias needed for gcc diff -Nru a/arch/ia64/lib/swiotlb.c b/arch/ia64/lib/swiotlb.c --- a/arch/ia64/lib/swiotlb.c Mon Apr 15 15:07:57 2002 +++ b/arch/ia64/lib/swiotlb.c Mon Apr 15 15:07:57 2002 @@ -10,6 +10,7 @@ * unnecessary i-cache flushing. */ +#include #include #include #include @@ -24,9 +25,6 @@ #include #include -#define ALIGN(val, align) ((unsigned long) \ - (((unsigned long) (val) + ((align) - 1)) & ~((align) - 1))) - #define OFFSET(val,align) ((unsigned long) \ ( (val) & ( (align) - 1))) @@ -276,8 +274,11 @@ int gfp = GFP_ATOMIC; void *ret; - if (!hwdev || hwdev->dma_mask <= 0xffffffff) - gfp |= GFP_DMA; /* XXX fix me: should change this to GFP_32BIT or ZONE_32BIT */ + /* + * Alloc_consistent() is defined to return memory < 4GB, no matter what the DMA + * mask says. + */ + gfp |= GFP_DMA; /* XXX fix me: should change this to GFP_32BIT or ZONE_32BIT */ ret = (void *)__get_free_pages(gfp, get_order(size)); if (!ret) return NULL; diff -Nru a/arch/ia64/mm/fault.c b/arch/ia64/mm/fault.c --- a/arch/ia64/mm/fault.c Mon Apr 15 15:07:57 2002 +++ b/arch/ia64/mm/fault.c Mon Apr 15 15:07:57 2002 @@ -120,15 +120,15 @@ if (!(prev_vma && (prev_vma->vm_flags & VM_GROWSUP) && (address == prev_vma->vm_end))) { if (!(vma->vm_flags & VM_GROWSDOWN)) goto bad_area; - if (rgn_index(address) != rgn_index(vma->vm_start) - || rgn_offset(address) >= RGN_MAP_LIMIT) + if (REGION_NUMBER(address) != REGION_NUMBER(vma->vm_start) + || REGION_OFFSET(address) >= RGN_MAP_LIMIT) goto bad_area; if (expand_stack(vma, address)) goto bad_area; } else { vma = prev_vma; - if (rgn_index(address) != rgn_index(vma->vm_start) - || rgn_offset(address) >= RGN_MAP_LIMIT) + if (REGION_NUMBER(address) != REGION_NUMBER(vma->vm_start) + || REGION_OFFSET(address) >= RGN_MAP_LIMIT) goto bad_area; if (expand_backing_store(vma, address)) goto bad_area; diff -Nru a/arch/ia64/mm/init.c b/arch/ia64/mm/init.c --- a/arch/ia64/mm/init.c Mon Apr 15 15:07:57 2002 +++ b/arch/ia64/mm/init.c Mon Apr 15 15:07:57 2002 @@ -40,10 +40,10 @@ static int pgt_cache_water[2] = { 25, 50 }; -int +void check_pgt_cache (void) { - int low, high, freed = 0; + int low, high; low = pgt_cache_water[0]; high = pgt_cache_water[1]; @@ -51,12 +51,11 @@ if (pgtable_cache_size > high) { do { if (pgd_quicklist) - free_page((unsigned long)pgd_alloc_one_fast(0)), ++freed; + free_page((unsigned long)pgd_alloc_one_fast(0)); if (pmd_quicklist) - free_page((unsigned long)pmd_alloc_one_fast(0, 0)), ++freed; + free_page((unsigned long)pmd_alloc_one_fast(0, 0)); } while (pgtable_cache_size > low); } - return freed; } /* @@ -347,8 +346,6 @@ paging_init (void) { unsigned long max_dma, zones_size[MAX_NR_ZONES]; - - clear_page((void *) ZERO_PAGE_ADDR); /* initialize mem_map[] */ diff -Nru a/arch/ia64/mm/tlb.c b/arch/ia64/mm/tlb.c --- a/arch/ia64/mm/tlb.c Mon Apr 15 15:07:57 2002 +++ b/arch/ia64/mm/tlb.c Mon Apr 15 15:07:57 2002 @@ -16,10 +16,11 @@ #include #include +#include #include #include #include -#include +#include #define SUPPORTED_PGBITS ( \ 1 << _PAGE_SIZE_256M | \ @@ -79,7 +80,7 @@ flush_tlb_all(); } -static inline void +void ia64_global_tlb_purge (unsigned long start, unsigned long end, unsigned long nbits) { static spinlock_t ptcg_lock = SPIN_LOCK_UNLOCKED; diff -Nru a/arch/ia64/vmlinux.lds.S b/arch/ia64/vmlinux.lds.S --- a/arch/ia64/vmlinux.lds.S Mon Apr 15 15:07:57 2002 +++ b/arch/ia64/vmlinux.lds.S Mon Apr 15 15:07:57 2002 @@ -28,11 +28,6 @@ .text : AT(ADDR(.text) - PAGE_OFFSET) { *(.text.ivt) - /* these are not really text pages, but they need to be page aligned: */ - *(__special_page_section) - __start_gate_section = .; - *(.text.gate) - __stop_gate_section = .; *(.text) } .text2 : AT(ADDR(.text2) - PAGE_OFFSET) @@ -119,6 +114,13 @@ /* The initial task and kernel stack */ .data.init_task : AT(ADDR(.data.init_task) - PAGE_OFFSET) { *(.data.init_task) } + + .data.page_aligned : AT(ADDR(.data.page_aligned) - PAGE_OFFSET) + { *(__special_page_section) + __start_gate_section = .; + *(.text.gate) + __stop_gate_section = .; + } . = ALIGN(SMP_CACHE_BYTES); .data.cacheline_aligned : AT(ADDR(.data.cacheline_aligned) - PAGE_OFFSET) diff -Nru a/arch/parisc/kernel/traps.c b/arch/parisc/kernel/traps.c --- a/arch/parisc/kernel/traps.c Mon Apr 15 15:07:57 2002 +++ b/arch/parisc/kernel/traps.c Mon Apr 15 15:07:57 2002 @@ -43,7 +43,6 @@ static inline void console_verbose(void) { - extern int console_loglevel; console_loglevel = 15; } diff -Nru a/drivers/acpi/acpi_system.c b/drivers/acpi/acpi_system.c --- a/drivers/acpi/acpi_system.c Mon Apr 15 15:07:57 2002 +++ b/drivers/acpi/acpi_system.c Mon Apr 15 15:07:57 2002 @@ -177,7 +177,7 @@ #endif /* flush caches */ - wbinvd(); + ACPI_FLUSH_CPU_CACHE(); /* Do arch specific saving of state. */ if (state > ACPI_STATE_S1) { @@ -305,7 +305,7 @@ /* disable interrupts and flush caches */ ACPI_DISABLE_IRQS(); - wbinvd(); + ACPI_FLUSH_CPU_CACHE(); /* perform OS-specific sleep actions */ status = acpi_system_suspend(state); diff -Nru a/drivers/acpi/include/platform/aclinux.h b/drivers/acpi/include/platform/aclinux.h --- a/drivers/acpi/include/platform/aclinux.h Mon Apr 15 15:07:57 2002 +++ b/drivers/acpi/include/platform/aclinux.h Mon Apr 15 15:07:57 2002 @@ -42,7 +42,7 @@ #define strtoul simple_strtoul -#ifdef _IA64 +#ifdef CONFIG_IA64 #define ACPI_FLUSH_CPU_CACHE() #else #define ACPI_FLUSH_CPU_CACHE() wbinvd() diff -Nru a/drivers/char/Config.help b/drivers/char/Config.help --- a/drivers/char/Config.help Mon Apr 15 15:07:57 2002 +++ b/drivers/char/Config.help Mon Apr 15 15:07:57 2002 @@ -127,6 +127,10 @@ 815 and 830m chipset boards for their on-board integrated graphics. This is required to do any useful video modes with these boards. +CONFIG_AGP_I460 + This option gives you AGP GART support for the Intel 460GX chipset + for IA64 processors. + CONFIG_AGP_VIA This option gives you AGP support for the GLX component of the XFree86 4.x on VIA MPV3/Apollo Pro chipsets. @@ -169,6 +173,10 @@ You should say Y here if you use XFree86 3.3.6 or 4.x and want to use GLX or DRI. If unsure, say N. + +CONFIG_AGP_HP_ZX1 + This option gives you AGP GART support for the HP ZX1 chipset + for IA64 processors. CONFIG_I810_TCO Hardware driver for the TCO timer built into the Intel i810 and i815 diff -Nru a/drivers/char/Config.in b/drivers/char/Config.in --- a/drivers/char/Config.in Mon Apr 15 15:07:56 2002 +++ b/drivers/char/Config.in Mon Apr 15 15:07:56 2002 @@ -209,6 +209,10 @@ dep_tristate '/dev/agpgart (AGP Support)' CONFIG_AGP $CONFIG_DRM_AGP if [ "$CONFIG_AGP" != "n" ]; then bool ' Intel 440LX/BX/GX and I815/I820/I830M/I840/I845/I850/I860 support' CONFIG_AGP_INTEL + if [ "$CONFIG_IA64" = "y" ]; then + bool ' Intel 460GX support' CONFIG_AGP_I460 + bool ' HP ZX1 AGP support' CONFIG_AGP_HP_ZX1 + fi bool ' Intel I810/I815/I830M (on-board) support' CONFIG_AGP_I810 bool ' VIA chipset support' CONFIG_AGP_VIA bool ' AMD Irongate, 761, and 762 support' CONFIG_AGP_AMD diff -Nru a/drivers/char/agp/agp.h b/drivers/char/agp/agp.h --- a/drivers/char/agp/agp.h Mon Apr 15 15:07:57 2002 +++ b/drivers/char/agp/agp.h Mon Apr 15 15:07:57 2002 @@ -84,8 +84,8 @@ void *dev_private_data; struct pci_dev *dev; gatt_mask *masks; - unsigned long *gatt_table; - unsigned long *gatt_table_real; + u32 *gatt_table; + u32 *gatt_table_real; unsigned long scratch_page; unsigned long gart_bus_addr; unsigned long gatt_bus_addr; @@ -99,7 +99,6 @@ int needs_scratch_page; int aperture_size_idx; int num_aperture_sizes; - int num_of_masks; int capndx; int cant_use_aperture; @@ -111,6 +110,7 @@ void (*cleanup) (void); void (*tlb_flush) (agp_memory *); unsigned long (*mask_memory) (unsigned long, int); + unsigned long (*unmask_memory) (unsigned long); void (*cache_flush) (void); int (*create_gatt_table) (void); int (*free_gatt_table) (void); @@ -125,10 +125,12 @@ }; +#define OUTREG64(mmap, addr, val) __raw_writeq((val), (mmap)+(addr)) #define OUTREG32(mmap, addr, val) __raw_writel((val), (mmap)+(addr)) #define OUTREG16(mmap, addr, val) __raw_writew((val), (mmap)+(addr)) #define OUTREG8(mmap, addr, val) __raw_writeb((val), (mmap)+(addr)) +#define INREG64(mmap, addr) __raw_readq((mmap)+(addr)) #define INREG32(mmap, addr) __raw_readl((mmap)+(addr)) #define INREG16(mmap, addr) __raw_readw((mmap)+(addr)) #define INREG8(mmap, addr) __raw_readb((mmap)+(addr)) @@ -221,6 +223,9 @@ #ifndef PCI_DEVICE_ID_INTEL_82443GX_1 #define PCI_DEVICE_ID_INTEL_82443GX_1 0x71a1 #endif +#ifndef PCI_DEVICE_ID_INTEL_460GX +#define PCI_DEVICE_ID_INTEL_460GX 0x84ea +#endif #ifndef PCI_DEVICE_ID_AMD_IRONGATE_0 #define PCI_DEVICE_ID_AMD_IRONGATE_0 0x7006 #endif @@ -263,6 +268,15 @@ #define INTEL_NBXCFG 0x50 #define INTEL_ERRSTS 0x91 +/* Intel 460GX Registers */ +#define INTEL_I460_APBASE 0x10 +#define INTEL_I460_BAPBASE 0x98 +#define INTEL_I460_GXBCTL 0xa0 +#define INTEL_I460_AGPSIZ 0xa2 +#define INTEL_I460_ATTBASE 0xfe200000 +#define INTEL_I460_GATT_VALID (1UL << 24) +#define INTEL_I460_GATT_COHERENT (1UL << 25) + /* intel i830 registers */ #define I830_GMCH_CTRL 0x52 #define I830_GMCH_ENABLED 0x4 @@ -374,5 +388,14 @@ #define SVWRKS_TLBFLUSH 0x10 #define SVWRKS_POSTFLUSH 0x14 #define SVWRKS_DIRFLUSH 0x0c + +/* HP ZX1 SBA registers */ +#define HP_ZX1_CTRL 0x200 +#define HP_ZX1_IBASE 0x300 +#define HP_ZX1_IMASK 0x308 +#define HP_ZX1_PCOM 0x310 +#define HP_ZX1_TCNFG 0x318 +#define HP_ZX1_PDIR_BASE 0x320 +#define HP_ZX1_CACHE_FLUSH 0x428 #endif /* _AGP_BACKEND_PRIV_H */ diff -Nru a/drivers/char/agp/agpgart_be.c b/drivers/char/agp/agpgart_be.c --- a/drivers/char/agp/agpgart_be.c Mon Apr 15 15:07:56 2002 +++ b/drivers/char/agp/agpgart_be.c Mon Apr 15 15:07:56 2002 @@ -17,11 +17,12 @@ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS * OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL - * JEFF HARTMANN, OR ANY OTHER CONTRIBUTORS BE LIABLE FOR ANY CLAIM, - * DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR - * OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE + * JEFF HARTMANN, OR ANY OTHER CONTRIBUTORS BE LIABLE FOR ANY CLAIM, + * DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR + * OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE * OR THE USE OR OTHER DEALINGS IN THE SOFTWARE. * + * 460GX support by Chris Ahna */ #include #include @@ -43,6 +44,9 @@ #include #include #include +#include +#include +#include #include #include "agp.h" @@ -59,33 +63,44 @@ EXPORT_SYMBOL(agp_backend_acquire); EXPORT_SYMBOL(agp_backend_release); -static void flush_cache(void); +static void flush_cache (void); + +/* Declare these with attribute unused so the compiler doesn't complain if the + routines are not used. It would be even better if they weren't compiled + into the kernel at all. */ +static void agp_generic_agp_enable (u32) __attribute__((unused)); +static int agp_generic_create_gatt_table (void) __attribute__((unused)); +static int agp_generic_suspend (void) __attribute__((unused)); +static void agp_generic_resume (void) __attribute__((unused)); +static int agp_generic_free_gatt_table (void) __attribute__((unused)); +static int agp_generic_insert_memory (agp_memory *, off_t, int) __attribute__((unused)); +static int agp_generic_remove_memory (agp_memory *, off_t, int) __attribute__((unused)); +static agp_memory *agp_generic_alloc_by_type (size_t, int) __attribute__((unused)); +static void agp_generic_free_by_type (agp_memory *) __attribute__((unused)); +static unsigned long agp_generic_alloc_page (void) __attribute__((unused)); +static void agp_generic_destroy_page (unsigned long) __attribute__((unused)); +static unsigned long agp_generic_unmask_memory (unsigned long) __attribute__((unused)); + static struct agp_bridge_data agp_bridge; static int agp_try_unsupported __initdata = 0; +#if defined(__alpha__) || defined(__ia64__) || defined(__sparc__) -static inline void flush_cache(void) +static inline void flush_cache (void) { -#if defined(__i386__) || defined(__x86_64__) - asm volatile ("wbinvd":::"memory"); -#elif defined(__alpha__) || defined(__ia64__) || defined(__sparc__) - /* ??? I wonder if we'll really need to flush caches, or if the - core logic can manage to keep the system coherent. The ARM - speaks only of using `cflush' to get things in memory in - preparation for power failure. + mb(); +} - If we do need to call `cflush', we'll need a target page, - as we can only flush one page at a time. +#define smp_flush_cache flush_cache - Ditto for IA-64. --davidm 00/08/07 */ - mb(); -#else -#error "Please define flush_cache." -#endif +#elif defined(__i386__) || defined(__x86_64__) + +static inline void flush_cache(void) +{ + asm volatile ("wbinvd":::"memory"); } -#ifdef CONFIG_SMP static atomic_t cpus_waiting; static void ipi_handler(void *null) @@ -105,10 +120,15 @@ while (atomic_read(&cpus_waiting) > 0) barrier(); } -#define global_cache_flush smp_flush_cache -#else /* CONFIG_SMP */ -#define global_cache_flush flush_cache -#endif /* CONFIG_SMP */ +#else +# error "Please define flush_cache." +#endif + +#ifdef CONFIG_SMP +# define global_cache_flush smp_flush_cache +#else +# define global_cache_flush flush_cache +#endif int agp_backend_acquire(void) { @@ -134,13 +154,12 @@ MOD_DEC_USE_COUNT; } -/* +/* * Generic routines for handling agp_memory structures - * They use the basic page allocation routines to do the * brunt of the work. */ - static void agp_free_key(int key) { @@ -205,13 +224,17 @@ agp_bridge.free_by_type(curr); return; } - if (curr->page_count != 0) { - for (i = 0; i < curr->page_count; i++) { - curr->memory[i] &= ~(0x00000fff); - agp_bridge.agp_destroy_page((unsigned long) - phys_to_virt(curr->memory[i])); + if (!agp_bridge.cant_use_aperture) { + if (curr->page_count != 0) { + for (i = 0; i < curr->page_count; i++) { + agp_bridge.agp_destroy_page((unsigned long) + phys_to_virt(curr->memory[i])); + } } + } else { + vfree(curr->vmptr); } + agp_free_key(curr->key); vfree(curr->memory); kfree(curr); @@ -247,26 +270,48 @@ scratch_pages = (page_count + ENTRIES_PER_PAGE - 1) / ENTRIES_PER_PAGE; new = agp_create_memory(scratch_pages); - if (new == NULL) { MOD_DEC_USE_COUNT; return NULL; } - for (i = 0; i < page_count; i++) { - new->memory[i] = agp_bridge.agp_alloc_page(); - if (new->memory[i] == 0) { - /* Free this structure */ - agp_free_memory(new); + if (!agp_bridge.cant_use_aperture) { + for (i = 0; i < page_count; i++) { + new->memory[i] = agp_bridge.agp_alloc_page(); + + if (new->memory[i] == 0) { + /* Free this structure */ + agp_free_memory(new); + return NULL; + } + new->memory[i] = virt_to_phys((void *) new->memory[i]); + new->page_count++; + } + } else { + void *vmblock, *vaddr; + unsigned long paddr; + struct page *page; + + vmblock = __vmalloc(page_count << PAGE_SHIFT, GFP_KERNEL, PAGE_KERNEL); + if (vmblock == NULL) { + MOD_DEC_USE_COUNT; return NULL; } - new->memory[i] = - agp_bridge.mask_memory( - virt_to_phys((void *) new->memory[i]), - type); - new->page_count++; - } + new->vmptr = vmblock; + vaddr = vmblock; + + for (i = 0; i < page_count; i++, vaddr += PAGE_SIZE) { + page = vmalloc_to_page(vaddr); + if (!page) { + MOD_DEC_USE_COUNT; + return NULL; + } + paddr = virt_to_phys(page_address(page)); + new->memory[i] = paddr; + } + new->page_count = page_count; + } return new; } @@ -307,9 +352,6 @@ void agp_copy_info(agp_kern_info * info) { - unsigned long page_mask = 0; - int i; - memset(info, 0, sizeof(agp_kern_info)); if (agp_bridge.type == NOT_SUPPORTED) { info->chipset = agp_bridge.type; @@ -325,11 +367,7 @@ info->max_memory = agp_bridge.max_memory_agp; info->current_memory = atomic_read(&agp_bridge.current_memory_agp); info->cant_use_aperture = agp_bridge.cant_use_aperture; - - for(i = 0; i < agp_bridge.num_of_masks; i++) - page_mask |= agp_bridge.mask_memory(page_mask, i); - - info->page_mask = ~page_mask; + info->page_mask = ~0UL; } /* End - Routine to copy over information structure */ @@ -359,6 +397,7 @@ } curr->is_bound = TRUE; curr->pg_start = pg_start; + return 0; } @@ -377,6 +416,7 @@ if (ret_val != 0) { return ret_val; } + curr->is_bound = FALSE; curr->pg_start = 0; return 0; @@ -384,12 +424,12 @@ /* End - Routines for handling swapping of agp_memory into the GATT */ -/* +/* * Driver routines - start * Currently this module supports the following chipsets: - * i810, i815, 440lx, 440bx, 440gx, i830, i840, i845, i850, i860, via vp3, + * i810, i815, 440lx, 440bx, 440gx, 460gx, i830, i840, i845, i850, i860, via vp3, * via mvp3, via kx133, via kt133, amd irongate, amd 761, amd 762, ALi M1541, - * and generic support for the SiS chipsets. + * chipsets. */ /* Generic Agp routines - Start */ @@ -397,7 +437,7 @@ static void agp_generic_agp_enable(u32 mode) { struct pci_dev *device = NULL; - u32 command, scratch; + u32 command, scratch; u8 cap_ptr; pci_read_config_dword(agp_bridge.dev, @@ -414,7 +454,7 @@ cap_ptr = pci_find_capability(device, PCI_CAP_ID_AGP); if (cap_ptr != 0x00) { /* - * Ok, here we have a AGP device. Disable impossible + * Ok, here we have a AGP device. Disable impossible * settings, and adjust the readqueue to the minimum. */ @@ -551,8 +591,8 @@ case U32_APER_SIZE: agp_bridge.current_size = A_IDX32(); break; - /* This case will never really - * happen. + /* This case will never really + * happen. */ case FIXED_APER_SIZE: case LVL2_APER_SIZE: @@ -581,7 +621,7 @@ for (page = virt_to_page(table); page <= virt_to_page(table_end); page++) SetPageReserved(page); - agp_bridge.gatt_table_real = (unsigned long *) table; + agp_bridge.gatt_table_real = (u32 *) table; CACHE_FLUSH(); agp_bridge.gatt_table = ioremap_nocache(virt_to_phys(table), (PAGE_SIZE * (1 << page_order))); @@ -713,7 +753,8 @@ mem->is_flushed = TRUE; } for (i = 0, j = pg_start; i < mem->page_count; i++, j++) { - agp_bridge.gatt_table[j] = mem->memory[i]; + agp_bridge.gatt_table[j] = + agp_bridge.mask_memory(mem->memory[i], mem->type); } agp_bridge.tlb_flush(mem); @@ -752,10 +793,10 @@ kfree(curr); } -/* +/* * Basic Page Allocation Routines - * These routines handle page allocation - * and by default they reserve the allocated + * and by default they reserve the allocated * memory. They also handle incrementing the * current_memory_agp value, Which is checked * against a maximum value. @@ -764,7 +805,7 @@ static unsigned long agp_generic_alloc_page(void) { struct page * page; - + page = alloc_page(GFP_KERNEL); if (page == NULL) return 0; @@ -798,6 +839,11 @@ agp_bridge.agp_enable(mode); } +static unsigned long agp_generic_unmask_memory(unsigned long addr) +{ + return addr & ~0x00000fffUL; +} + /* End - Generic Agp routines */ #ifdef CONFIG_AGP_I810 @@ -937,7 +983,7 @@ agp_bridge.tlb_flush(mem); return 0; } - if((type == AGP_PHYS_MEMORY) && + if ((type == AGP_PHYS_MEMORY) && (mem->type == AGP_PHYS_MEMORY)) { goto insert; } @@ -948,7 +994,8 @@ CACHE_FLUSH(); for (i = 0, j = pg_start; i < mem->page_count; i++, j++) { OUTREG32(intel_i810_private.registers, - I810_PTE_BASE + (j * 4), mem->memory[i]); + I810_PTE_BASE + (j * 4), + agp_bridge.mask_memory(mem->memory[i], mem->type)); } CACHE_FLUSH(); @@ -992,7 +1039,7 @@ MOD_INC_USE_COUNT; return new; } - if(type == AGP_PHYS_MEMORY) { + if (type == AGP_PHYS_MEMORY) { /* The I810 requires a physical address to program * it's mouse pointer into hardware. However the * Xserver still writes to it through the agp @@ -1014,24 +1061,21 @@ agp_free_memory(new); return NULL; } - new->memory[0] = - agp_bridge.mask_memory( - virt_to_phys((void *) new->memory[0]), - type); + new->memory[0] = virt_to_phys((void *) new->memory[0]); new->page_count = 1; new->num_scratch_pages = 1; new->type = AGP_PHYS_MEMORY; new->physical = virt_to_phys((void *) new->memory[0]); return new; } - + return NULL; } static void intel_i810_free_by_type(agp_memory * curr) { agp_free_key(curr->key); - if(curr->type == AGP_PHYS_MEMORY) { + if (curr->type == AGP_PHYS_MEMORY) { agp_bridge.agp_destroy_page((unsigned long) phys_to_virt(curr->memory[0])); vfree(curr->memory); @@ -1051,7 +1095,6 @@ intel_i810_private.i810_dev = i810_dev; agp_bridge.masks = intel_i810_masks; - agp_bridge.num_of_masks = 2; agp_bridge.aperture_sizes = (void *) intel_i810_sizes; agp_bridge.size_type = FIXED_APER_SIZE; agp_bridge.num_aperture_sizes = 2; @@ -1062,6 +1105,7 @@ agp_bridge.cleanup = intel_i810_cleanup; agp_bridge.tlb_flush = intel_i810_tlbflush; agp_bridge.mask_memory = intel_i810_mask_memory; + agp_bridge.unmask_memory = agp_generic_unmask_memory; agp_bridge.agp_enable = intel_i810_agp_enable; agp_bridge.cache_flush = global_cache_flush; agp_bridge.create_gatt_table = agp_generic_create_gatt_table; @@ -1253,7 +1297,8 @@ CACHE_FLUSH(); for (i = 0, j = pg_start; i < mem->page_count; i++, j++) - OUTREG32(intel_i830_private.registers,I810_PTE_BASE + (j * 4),mem->memory[i]); + OUTREG32(intel_i830_private.registers,I810_PTE_BASE + (j * 4), + agp_bridge.mask_memory(mem->memory[i], mem->type)); CACHE_FLUSH(); @@ -1314,7 +1359,7 @@ return(NULL); } - nw->memory[0] = agp_bridge.mask_memory(virt_to_phys((void *) nw->memory[0]),type); + nw->memory[0] = virt_to_phys((void *) nw->memory[0]); nw->page_count = 1; nw->num_scratch_pages = 1; nw->type = AGP_PHYS_MEMORY; @@ -1330,7 +1375,6 @@ intel_i830_private.i830_dev = i830_dev; agp_bridge.masks = intel_i810_masks; - agp_bridge.num_of_masks = 3; agp_bridge.aperture_sizes = (void *) intel_i830_sizes; agp_bridge.size_type = FIXED_APER_SIZE; agp_bridge.num_aperture_sizes = 2; @@ -1365,6 +1409,575 @@ #endif /* CONFIG_AGP_I810 */ +#ifdef CONFIG_AGP_I460 + +/* BIOS configures the chipset so that one of two apbase registers are used */ +static u8 intel_i460_dynamic_apbase = 0x10; + +/* 460 supports multiple GART page sizes, so GART pageshift is dynamic */ +static u8 intel_i460_pageshift = 12; +static u32 intel_i460_pagesize; + +/* Keep track of which is larger, chipset or kernel page size. */ +static u32 intel_i460_cpk = 1; + +/* Structure for tracking partial use of 4MB GART pages */ +static u32 **i460_pg_detail = NULL; +static u32 *i460_pg_count = NULL; + +#define I460_CPAGES_PER_KPAGE (PAGE_SIZE >> intel_i460_pageshift) +#define I460_KPAGES_PER_CPAGE ((1 << intel_i460_pageshift) >> PAGE_SHIFT) + +#define I460_SRAM_IO_DISABLE (1 << 4) +#define I460_BAPBASE_ENABLE (1 << 3) +#define I460_AGPSIZ_MASK 0x7 +#define I460_4M_PS (1 << 1) + +#define log2(x) ffz(~(x)) + +static inline void intel_i460_read_back (volatile u32 *entry) +{ + /* + * The 460 spec says we have to read the last location written to + * make sure that all writes have taken effect + */ + *entry; +} + +static int intel_i460_fetch_size(void) +{ + int i; + u8 temp; + aper_size_info_8 *values; + + /* Determine the GART page size */ + pci_read_config_byte(agp_bridge.dev, INTEL_I460_GXBCTL, &temp); + intel_i460_pageshift = (temp & I460_4M_PS) ? 22 : 12; + intel_i460_pagesize = 1UL << intel_i460_pageshift; + + values = A_SIZE_8(agp_bridge.aperture_sizes); + + pci_read_config_byte(agp_bridge.dev, INTEL_I460_AGPSIZ, &temp); + + /* Exit now if the IO drivers for the GART SRAMS are turned off */ + if (temp & I460_SRAM_IO_DISABLE) { + printk(KERN_ERR PFX "GART SRAMS disabled on 460GX chipset\n"); + printk(KERN_ERR PFX "AGPGART operation not possible\n"); + return 0; + } + + /* Make sure we don't try to create an 2 ^ 23 entry GATT */ + if ((intel_i460_pageshift == 0) && ((temp & I460_AGPSIZ_MASK) == 4)) { + printk(KERN_ERR PFX "We can't have a 32GB aperture with 4KB GART pages\n"); + return 0; + } + + /* Determine the proper APBASE register */ + if (temp & I460_BAPBASE_ENABLE) + intel_i460_dynamic_apbase = INTEL_I460_BAPBASE; + else + intel_i460_dynamic_apbase = INTEL_I460_APBASE; + + for (i = 0; i < agp_bridge.num_aperture_sizes; i++) { + /* + * Dynamically calculate the proper num_entries and page_order values for + * the define aperture sizes. Take care not to shift off the end of + * values[i].size. + */ + values[i].num_entries = (values[i].size << 8) >> (intel_i460_pageshift - 12); + values[i].page_order = log2((sizeof(u32)*values[i].num_entries) >> PAGE_SHIFT); + } + + for (i = 0; i < agp_bridge.num_aperture_sizes; i++) { + /* Neglect control bits when matching up size_value */ + if ((temp & I460_AGPSIZ_MASK) == values[i].size_value) { + agp_bridge.previous_size = agp_bridge.current_size = (void *) (values + i); + agp_bridge.aperture_size_idx = i; + return values[i].size; + } + } + + return 0; +} + +/* There isn't anything to do here since 460 has no GART TLB. */ +static void intel_i460_tlb_flush(agp_memory * mem) +{ + return; +} + +/* + * This utility function is needed to prevent corruption of the control bits + * which are stored along with the aperture size in 460's AGPSIZ register + */ +static void intel_i460_write_agpsiz(u8 size_value) +{ + u8 temp; + + pci_read_config_byte(agp_bridge.dev, INTEL_I460_AGPSIZ, &temp); + pci_write_config_byte(agp_bridge.dev, INTEL_I460_AGPSIZ, + ((temp & ~I460_AGPSIZ_MASK) | size_value)); +} + +static void intel_i460_cleanup(void) +{ + aper_size_info_8 *previous_size; + + previous_size = A_SIZE_8(agp_bridge.previous_size); + intel_i460_write_agpsiz(previous_size->size_value); + + if (intel_i460_cpk == 0) { + vfree(i460_pg_detail); + vfree(i460_pg_count); + } +} + + +/* Control bits for Out-Of-GART coherency and Burst Write Combining */ +#define I460_GXBCTL_OOG (1UL << 0) +#define I460_GXBCTL_BWC (1UL << 2) + +static int intel_i460_configure(void) +{ + union { + u32 small[2]; + u64 large; + } temp; + u8 scratch; + int i; + + aper_size_info_8 *current_size; + + temp.large = 0; + + current_size = A_SIZE_8(agp_bridge.current_size); + intel_i460_write_agpsiz(current_size->size_value); + + /* + * Do the necessary rigmarole to read all eight bytes of APBASE. + * This has to be done since the AGP aperture can be above 4GB on + * 460 based systems. + */ + pci_read_config_dword(agp_bridge.dev, intel_i460_dynamic_apbase, &(temp.small[0])); + pci_read_config_dword(agp_bridge.dev, intel_i460_dynamic_apbase + 4, &(temp.small[1])); + + /* Clear BAR control bits */ + agp_bridge.gart_bus_addr = temp.large & ~((1UL << 3) - 1); + + pci_read_config_byte(agp_bridge.dev, INTEL_I460_GXBCTL, &scratch); + pci_write_config_byte(agp_bridge.dev, INTEL_I460_GXBCTL, + (scratch & 0x02) | I460_GXBCTL_OOG | I460_GXBCTL_BWC); + + /* + * Initialize partial allocation trackers if a GART page is bigger than + * a kernel page. + */ + if (I460_CPAGES_PER_KPAGE >= 1) { + intel_i460_cpk = 1; + } else { + intel_i460_cpk = 0; + + i460_pg_detail = vmalloc(sizeof(*i460_pg_detail) * current_size->num_entries); + i460_pg_count = vmalloc(sizeof(*i460_pg_count) * current_size->num_entries); + + for (i = 0; i < current_size->num_entries; i++) { + i460_pg_count[i] = 0; + i460_pg_detail[i] = NULL; + } + } + return 0; +} + +static int intel_i460_create_gatt_table(void) +{ + char *table; + int i; + int page_order; + int num_entries; + void *temp; + + /* + * Load up the fixed address of the GART SRAMS which hold our + * GATT table. + */ + table = (char *) __va(INTEL_I460_ATTBASE); + + temp = agp_bridge.current_size; + page_order = A_SIZE_8(temp)->page_order; + num_entries = A_SIZE_8(temp)->num_entries; + + agp_bridge.gatt_table_real = (u32 *) table; + agp_bridge.gatt_table = ioremap_nocache(virt_to_phys(table), + (PAGE_SIZE * (1 << page_order))); + agp_bridge.gatt_bus_addr = virt_to_phys(agp_bridge.gatt_table_real); + + for (i = 0; i < num_entries; i++) { + agp_bridge.gatt_table[i] = 0; + } + + intel_i460_read_back(agp_bridge.gatt_table + i - 1); + return 0; +} + +static int intel_i460_free_gatt_table(void) +{ + int num_entries; + int i; + void *temp; + + temp = agp_bridge.current_size; + + num_entries = A_SIZE_8(temp)->num_entries; + + for (i = 0; i < num_entries; i++) { + agp_bridge.gatt_table[i] = 0; + } + + intel_i460_read_back(agp_bridge.gatt_table + i - 1); + + iounmap(agp_bridge.gatt_table); + return 0; +} + +/* These functions are called when PAGE_SIZE exceeds the GART page size */ + +static int intel_i460_insert_memory_cpk(agp_memory * mem, off_t pg_start, int type) +{ + int i, j, k, num_entries; + void *temp; + unsigned long paddr; + + /* + * The rest of the kernel will compute page offsets in terms of + * PAGE_SIZE. + */ + pg_start = I460_CPAGES_PER_KPAGE * pg_start; + + temp = agp_bridge.current_size; + num_entries = A_SIZE_8(temp)->num_entries; + + if ((pg_start + I460_CPAGES_PER_KPAGE * mem->page_count) > num_entries) { + printk(KERN_ERR PFX "Looks like we're out of AGP memory\n"); + return -EINVAL; + } + + j = pg_start; + while (j < (pg_start + I460_CPAGES_PER_KPAGE * mem->page_count)) { + if (!PGE_EMPTY(agp_bridge.gatt_table[j])) { + return -EBUSY; + } + j++; + } + +#if 0 + /* not necessary since 460 GART is operated in coherent mode... */ + if (mem->is_flushed == FALSE) { + CACHE_FLUSH(); + mem->is_flushed = TRUE; + } +#endif + + for (i = 0, j = pg_start; i < mem->page_count; i++) { + paddr = mem->memory[i]; + for (k = 0; k < I460_CPAGES_PER_KPAGE; k++, j++, paddr += intel_i460_pagesize) + agp_bridge.gatt_table[j] = (u32) agp_bridge.mask_memory(paddr, mem->type); + } + + intel_i460_read_back(agp_bridge.gatt_table + j - 1); + return 0; +} + +static int intel_i460_remove_memory_cpk(agp_memory * mem, off_t pg_start, int type) +{ + int i; + + pg_start = I460_CPAGES_PER_KPAGE * pg_start; + + for (i = pg_start; i < (pg_start + I460_CPAGES_PER_KPAGE * mem->page_count); i++) + agp_bridge.gatt_table[i] = 0; + + intel_i460_read_back(agp_bridge.gatt_table + i - 1); + return 0; +} + +/* + * These functions are called when the GART page size exceeds PAGE_SIZE. + * + * This situation is interesting since AGP memory allocations that are + * smaller than a single GART page are possible. The structures i460_pg_count + * and i460_pg_detail track partial allocation of the large GART pages to + * work around this issue. + * + * i460_pg_count[pg_num] tracks the number of kernel pages in use within + * GART page pg_num. i460_pg_detail[pg_num] is an array containing a + * psuedo-GART entry for each of the aforementioned kernel pages. The whole + * of i460_pg_detail is equivalent to a giant GATT with page size equal to + * that of the kernel. + */ + +static void *intel_i460_alloc_large_page(int pg_num) +{ + int i; + void *bp, *bp_end; + struct page *page; + + i460_pg_detail[pg_num] = (void *) vmalloc(sizeof(u32) * I460_KPAGES_PER_CPAGE); + if (i460_pg_detail[pg_num] == NULL) { + printk(KERN_ERR PFX "Out of memory, we're in trouble...\n"); + return NULL; + } + + for (i = 0; i < I460_KPAGES_PER_CPAGE; i++) + i460_pg_detail[pg_num][i] = 0; + + bp = (void *) __get_free_pages(GFP_KERNEL, intel_i460_pageshift - PAGE_SHIFT); + if (bp == NULL) { + printk(KERN_ERR PFX "Couldn't alloc 4M GART page...\n"); + return NULL; + } + + bp_end = bp + ((PAGE_SIZE * (1 << (intel_i460_pageshift - PAGE_SHIFT))) - 1); + + for (page = virt_to_page(bp); page <= virt_to_page(bp_end); page++) { + atomic_inc(&page->count); + set_bit(PG_locked, &page->flags); + atomic_inc(&agp_bridge.current_memory_agp); + } + return bp; +} + +static void intel_i460_free_large_page(int pg_num, unsigned long addr) +{ + struct page *page; + void *bp, *bp_end; + + bp = (void *) __va(addr); + bp_end = bp + (PAGE_SIZE * (1 << (intel_i460_pageshift - PAGE_SHIFT))); + + vfree(i460_pg_detail[pg_num]); + i460_pg_detail[pg_num] = NULL; + + for (page = virt_to_page(bp); page < virt_to_page(bp_end); page++) { + atomic_dec(&page->count); + clear_bit(PG_locked, &page->flags); + wake_up_page(page); + atomic_dec(&agp_bridge.current_memory_agp); + } + + free_pages((unsigned long) bp, intel_i460_pageshift - PAGE_SHIFT); +} + +static int intel_i460_insert_memory_kpc(agp_memory * mem, off_t pg_start, int type) +{ + int i, pg, start_pg, end_pg, start_offset, end_offset, idx; + int num_entries; + void *temp; + unsigned long paddr; + + temp = agp_bridge.current_size; + num_entries = A_SIZE_8(temp)->num_entries; + + /* Figure out what pg_start means in terms of our large GART pages */ + start_pg = pg_start / I460_KPAGES_PER_CPAGE; + start_offset = pg_start % I460_KPAGES_PER_CPAGE; + end_pg = (pg_start + mem->page_count - 1) / I460_KPAGES_PER_CPAGE; + end_offset = (pg_start + mem->page_count - 1) % I460_KPAGES_PER_CPAGE; + + if (end_pg > num_entries) { + printk(KERN_ERR PFX "Looks like we're out of AGP memory\n"); + return -EINVAL; + } + + /* Check if the requested region of the aperture is free */ + for (pg = start_pg; pg <= end_pg; pg++) { + /* Allocate new GART pages if necessary */ + if (i460_pg_detail[pg] == NULL) { + temp = intel_i460_alloc_large_page(pg); + if (temp == NULL) + return -ENOMEM; + agp_bridge.gatt_table[pg] = agp_bridge.mask_memory((unsigned long) temp, + 0); + intel_i460_read_back(agp_bridge.gatt_table + pg); + } + + for (idx = ((pg == start_pg) ? start_offset : 0); + idx < ((pg == end_pg) ? (end_offset + 1) : I460_KPAGES_PER_CPAGE); + idx++) + { + if (i460_pg_detail[pg][idx] != 0) + return -EBUSY; + } + } + +#if 0 + /* not necessary since 460 GART is operated in coherent mode... */ + if (mem->is_flushed == FALSE) { + CACHE_FLUSH(); + mem->is_flushed = TRUE; + } +#endif + + for (pg = start_pg, i = 0; pg <= end_pg; pg++) { + paddr = agp_bridge.unmask_memory(agp_bridge.gatt_table[pg]); + for (idx = ((pg == start_pg) ? start_offset : 0); + idx < ((pg == end_pg) ? (end_offset + 1) : I460_KPAGES_PER_CPAGE); + idx++, i++) + { + mem->memory[i] = paddr + (idx * PAGE_SIZE); + i460_pg_detail[pg][idx] = agp_bridge.mask_memory(mem->memory[i], + mem->type); + i460_pg_count[pg]++; + } + } + + return 0; +} + +static int intel_i460_remove_memory_kpc(agp_memory * mem, off_t pg_start, int type) +{ + int i, pg, start_pg, end_pg, start_offset, end_offset, idx; + int num_entries; + void *temp; + unsigned long paddr; + + temp = agp_bridge.current_size; + num_entries = A_SIZE_8(temp)->num_entries; + + /* Figure out what pg_start means in terms of our large GART pages */ + start_pg = pg_start / I460_KPAGES_PER_CPAGE; + start_offset = pg_start % I460_KPAGES_PER_CPAGE; + end_pg = (pg_start + mem->page_count - 1) / I460_KPAGES_PER_CPAGE; + end_offset = (pg_start + mem->page_count - 1) % I460_KPAGES_PER_CPAGE; + + for (i = 0, pg = start_pg; pg <= end_pg; pg++) { + for (idx = ((pg == start_pg) ? start_offset : 0); + idx < ((pg == end_pg) ? (end_offset + 1) : I460_KPAGES_PER_CPAGE); + idx++, i++) + { + mem->memory[i] = 0; + i460_pg_detail[pg][idx] = 0; + i460_pg_count[pg]--; + } + + /* Free GART pages if they are unused */ + if (i460_pg_count[pg] == 0) { + paddr = agp_bridge.unmask_memory(agp_bridge.gatt_table[pg]); + agp_bridge.gatt_table[pg] = agp_bridge.scratch_page; + intel_i460_read_back(agp_bridge.gatt_table + pg); + intel_i460_free_large_page(pg, paddr); + } + } + return 0; +} + +/* Dummy routines to call the approriate {cpk,kpc} function */ + +static int intel_i460_insert_memory(agp_memory * mem, off_t pg_start, int type) +{ + if (intel_i460_cpk) + return intel_i460_insert_memory_cpk(mem, pg_start, type); + else + return intel_i460_insert_memory_kpc(mem, pg_start, type); +} + +static int intel_i460_remove_memory(agp_memory * mem, off_t pg_start, int type) +{ + if (intel_i460_cpk) + return intel_i460_remove_memory_cpk(mem, pg_start, type); + else + return intel_i460_remove_memory_kpc(mem, pg_start, type); +} + +/* + * If the kernel page size is smaller that the chipset page size, we don't + * want to allocate memory until we know where it is to be bound in the + * aperture (a multi-kernel-page alloc might fit inside of an already + * allocated GART page). Consequently, don't allocate or free anything + * if i460_cpk (meaning chipset pages per kernel page) isn't set. + * + * Let's just hope nobody counts on the allocated AGP memory being there + * before bind time (I don't think current drivers do)... + */ +static unsigned long intel_i460_alloc_page(void) +{ + if (intel_i460_cpk) + return agp_generic_alloc_page(); + + /* Returning NULL would cause problems */ + return ~0UL; +} + +static void intel_i460_destroy_page(unsigned long page) +{ + if (intel_i460_cpk) + agp_generic_destroy_page(page); +} + +static gatt_mask intel_i460_masks[] = +{ + { + INTEL_I460_GATT_VALID | INTEL_I460_GATT_COHERENT, + 0 + } +}; + +static unsigned long intel_i460_mask_memory(unsigned long addr, int type) +{ + /* Make sure the returned address is a valid GATT entry */ + return (agp_bridge.masks[0].mask + | (((addr & ~((1 << intel_i460_pageshift) - 1)) & 0xffffff000) >> 12)); +} + +static unsigned long intel_i460_unmask_memory(unsigned long addr) +{ + /* Turn a GATT entry into a physical address */ + return ((addr & 0xffffff) << 12); +} + +static aper_size_info_8 intel_i460_sizes[3] = +{ + /* + * The 32GB aperture is only available with a 4M GART page size. + * Due to the dynamic GART page size, we can't figure out page_order + * or num_entries until runtime. + */ + {32768, 0, 0, 4}, + {1024, 0, 0, 2}, + {256, 0, 0, 1} +}; + +static int __init intel_i460_setup (struct pci_dev *pdev __attribute__((unused))) +{ + agp_bridge.masks = intel_i460_masks; + agp_bridge.aperture_sizes = (void *) intel_i460_sizes; + agp_bridge.size_type = U8_APER_SIZE; + agp_bridge.num_aperture_sizes = 3; + agp_bridge.dev_private_data = NULL; + agp_bridge.needs_scratch_page = FALSE; + agp_bridge.configure = intel_i460_configure; + agp_bridge.fetch_size = intel_i460_fetch_size; + agp_bridge.cleanup = intel_i460_cleanup; + agp_bridge.tlb_flush = intel_i460_tlb_flush; + agp_bridge.mask_memory = intel_i460_mask_memory; + agp_bridge.unmask_memory = intel_i460_unmask_memory; + agp_bridge.agp_enable = agp_generic_agp_enable; + agp_bridge.cache_flush = global_cache_flush; + agp_bridge.create_gatt_table = intel_i460_create_gatt_table; + agp_bridge.free_gatt_table = intel_i460_free_gatt_table; + agp_bridge.insert_memory = intel_i460_insert_memory; + agp_bridge.remove_memory = intel_i460_remove_memory; + agp_bridge.alloc_by_type = agp_generic_alloc_by_type; + agp_bridge.free_by_type = agp_generic_free_by_type; + agp_bridge.agp_alloc_page = intel_i460_alloc_page; + agp_bridge.agp_destroy_page = intel_i460_destroy_page; + agp_bridge.suspend = agp_generic_suspend; + agp_bridge.resume = agp_generic_resume; + agp_bridge.cant_use_aperture = 1; + return 0; +} + +#endif /* CONFIG_AGP_I460 */ + #ifdef CONFIG_AGP_INTEL static int intel_fetch_size(void) @@ -1497,7 +2110,7 @@ previous_size = A_SIZE_8(agp_bridge.previous_size); pci_read_config_byte(agp_bridge.dev, INTEL_I820_RDCR, &temp); - pci_write_config_byte(agp_bridge.dev, INTEL_I820_RDCR, + pci_write_config_byte(agp_bridge.dev, INTEL_I820_RDCR, temp & ~(1 << 1)); pci_write_config_byte(agp_bridge.dev, INTEL_APSIZE, previous_size->size_value); @@ -1507,14 +2120,14 @@ static int intel_820_configure(void) { u32 temp; - u8 temp2; + u8 temp2; aper_size_info_8 *current_size; current_size = A_SIZE_8(agp_bridge.current_size); /* aperture size */ pci_write_config_byte(agp_bridge.dev, INTEL_APSIZE, - current_size->size_value); + current_size->size_value); /* address to map to */ pci_read_config_dword(agp_bridge.dev, INTEL_APBASE, &temp); @@ -1522,19 +2135,19 @@ /* attbase - aperture base */ pci_write_config_dword(agp_bridge.dev, INTEL_ATTBASE, - agp_bridge.gatt_bus_addr); + agp_bridge.gatt_bus_addr); /* agpctrl */ - pci_write_config_dword(agp_bridge.dev, INTEL_AGPCTRL, 0x0000); + pci_write_config_dword(agp_bridge.dev, INTEL_AGPCTRL, 0x0000); /* global enable aperture access */ /* This flag is not accessed through MCHCFG register as in */ /* i850 chipset. */ pci_read_config_byte(agp_bridge.dev, INTEL_I820_RDCR, &temp2); - pci_write_config_byte(agp_bridge.dev, INTEL_I820_RDCR, + pci_write_config_byte(agp_bridge.dev, INTEL_I820_RDCR, temp2 | (1 << 1)); /* clear any possible AGP-related error conditions */ - pci_write_config_word(agp_bridge.dev, INTEL_I820_ERRSTS, 0x001c); + pci_write_config_word(agp_bridge.dev, INTEL_I820_ERRSTS, 0x001c); return 0; } @@ -1548,7 +2161,7 @@ /* aperture size */ pci_write_config_byte(agp_bridge.dev, INTEL_APSIZE, - current_size->size_value); + current_size->size_value); /* address to map to */ pci_read_config_dword(agp_bridge.dev, INTEL_APBASE, &temp); @@ -1556,17 +2169,17 @@ /* attbase - aperture base */ pci_write_config_dword(agp_bridge.dev, INTEL_ATTBASE, - agp_bridge.gatt_bus_addr); + agp_bridge.gatt_bus_addr); /* agpctrl */ - pci_write_config_dword(agp_bridge.dev, INTEL_AGPCTRL, 0x0000); + pci_write_config_dword(agp_bridge.dev, INTEL_AGPCTRL, 0x0000); /* mcgcfg */ pci_read_config_word(agp_bridge.dev, INTEL_I840_MCHCFG, &temp2); pci_write_config_word(agp_bridge.dev, INTEL_I840_MCHCFG, temp2 | (1 << 9)); /* clear any possible error conditions */ - pci_write_config_word(agp_bridge.dev, INTEL_I840_ERRSTS, 0xc000); + pci_write_config_word(agp_bridge.dev, INTEL_I840_ERRSTS, 0xc000); return 0; } @@ -1580,7 +2193,7 @@ /* aperture size */ pci_write_config_byte(agp_bridge.dev, INTEL_APSIZE, - current_size->size_value); + current_size->size_value); /* address to map to */ pci_read_config_dword(agp_bridge.dev, INTEL_APBASE, &temp); @@ -1588,17 +2201,17 @@ /* attbase - aperture base */ pci_write_config_dword(agp_bridge.dev, INTEL_ATTBASE, - agp_bridge.gatt_bus_addr); + agp_bridge.gatt_bus_addr); /* agpctrl */ - pci_write_config_dword(agp_bridge.dev, INTEL_AGPCTRL, 0x0000); + pci_write_config_dword(agp_bridge.dev, INTEL_AGPCTRL, 0x0000); /* agpm */ pci_read_config_byte(agp_bridge.dev, INTEL_I845_AGPM, &temp2); pci_write_config_byte(agp_bridge.dev, INTEL_I845_AGPM, temp2 | (1 << 1)); /* clear any possible error conditions */ - pci_write_config_word(agp_bridge.dev, INTEL_I845_ERRSTS, 0x001c); + pci_write_config_word(agp_bridge.dev, INTEL_I845_ERRSTS, 0x001c); return 0; } @@ -1612,7 +2225,7 @@ /* aperture size */ pci_write_config_byte(agp_bridge.dev, INTEL_APSIZE, - current_size->size_value); + current_size->size_value); /* address to map to */ pci_read_config_dword(agp_bridge.dev, INTEL_APBASE, &temp); @@ -1620,17 +2233,17 @@ /* attbase - aperture base */ pci_write_config_dword(agp_bridge.dev, INTEL_ATTBASE, - agp_bridge.gatt_bus_addr); + agp_bridge.gatt_bus_addr); /* agpctrl */ - pci_write_config_dword(agp_bridge.dev, INTEL_AGPCTRL, 0x0000); + pci_write_config_dword(agp_bridge.dev, INTEL_AGPCTRL, 0x0000); /* mcgcfg */ pci_read_config_word(agp_bridge.dev, INTEL_I850_MCHCFG, &temp2); pci_write_config_word(agp_bridge.dev, INTEL_I850_MCHCFG, temp2 | (1 << 9)); /* clear any possible AGP-related error conditions */ - pci_write_config_word(agp_bridge.dev, INTEL_I850_ERRSTS, 0x001c); + pci_write_config_word(agp_bridge.dev, INTEL_I850_ERRSTS, 0x001c); return 0; } @@ -1738,7 +2351,7 @@ {4, 1024, 0, 63} }; -static aper_size_info_8 intel_830mp_sizes[4] = +static aper_size_info_8 intel_830mp_sizes[4] = { {256, 65536, 6, 0}, {128, 32768, 5, 32}, @@ -1746,10 +2359,9 @@ {32, 8192, 3, 56} }; -static int __init intel_generic_setup (struct pci_dev *pdev) +static int __init intel_generic_setup (struct pci_dev *pdev __attribute__((unused)) { agp_bridge.masks = intel_generic_masks; - agp_bridge.num_of_masks = 1; agp_bridge.aperture_sizes = (void *) intel_generic_sizes; agp_bridge.size_type = U16_APER_SIZE; agp_bridge.num_aperture_sizes = 7; @@ -1760,6 +2372,7 @@ agp_bridge.cleanup = intel_cleanup; agp_bridge.tlb_flush = intel_tlbflush; agp_bridge.mask_memory = intel_mask_memory; + agp_bridge.unmask_memory = agp_generic_unmask_memory; agp_bridge.agp_enable = agp_generic_agp_enable; agp_bridge.cache_flush = global_cache_flush; agp_bridge.create_gatt_table = agp_generic_create_gatt_table; @@ -1775,15 +2388,11 @@ agp_bridge.cant_use_aperture = 0; return 0; - - (void) pdev; /* unused */ } - -static int __init intel_820_setup (struct pci_dev *pdev) +static int __init intel_820_setup (struct pci_dev *pdev __attribute__((unused)) { agp_bridge.masks = intel_generic_masks; - agp_bridge.num_of_masks = 1; agp_bridge.aperture_sizes = (void *) intel_8xx_sizes; agp_bridge.size_type = U8_APER_SIZE; agp_bridge.num_aperture_sizes = 7; @@ -1806,17 +2415,16 @@ agp_bridge.agp_destroy_page = agp_generic_destroy_page; agp_bridge.suspend = agp_generic_suspend; agp_bridge.resume = agp_generic_resume; + agp_bridge.suspend = agp_generic_suspend; + agp_bridge.resume = agp_generic_resume; agp_bridge.cant_use_aperture = 0; return 0; - - (void) pdev; /* unused */ } -static int __init intel_830mp_setup (struct pci_dev *pdev) +static int __init intel_830mp_setup (struct pci_dev *pdev __attribute__((unused)) { agp_bridge.masks = intel_generic_masks; - agp_bridge.num_of_masks = 1; agp_bridge.aperture_sizes = (void *) intel_830mp_sizes; agp_bridge.size_type = U8_APER_SIZE; agp_bridge.num_aperture_sizes = 4; @@ -1839,17 +2447,16 @@ agp_bridge.agp_destroy_page = agp_generic_destroy_page; agp_bridge.suspend = agp_generic_suspend; agp_bridge.resume = agp_generic_resume; + agp_bridge.suspend = agp_generic_suspend; + agp_bridge.resume = agp_generic_resume; agp_bridge.cant_use_aperture = 0; return 0; - - (void) pdev; /* unused */ } -static int __init intel_840_setup (struct pci_dev *pdev) +static int __init intel_840_setup (struct pci_dev *pdev __attribute__((unused)) { agp_bridge.masks = intel_generic_masks; - agp_bridge.num_of_masks = 1; agp_bridge.aperture_sizes = (void *) intel_8xx_sizes; agp_bridge.size_type = U8_APER_SIZE; agp_bridge.num_aperture_sizes = 7; @@ -1875,14 +2482,11 @@ agp_bridge.cant_use_aperture = 0; return 0; - - (void) pdev; /* unused */ } -static int __init intel_845_setup (struct pci_dev *pdev) +static int __init intel_845_setup (struct pci_dev *pdev __attribute__((unused)) { agp_bridge.masks = intel_generic_masks; - agp_bridge.num_of_masks = 1; agp_bridge.aperture_sizes = (void *) intel_8xx_sizes; agp_bridge.size_type = U8_APER_SIZE; agp_bridge.num_aperture_sizes = 7; @@ -1893,6 +2497,7 @@ agp_bridge.cleanup = intel_8xx_cleanup; agp_bridge.tlb_flush = intel_8xx_tlbflush; agp_bridge.mask_memory = intel_mask_memory; + agp_bridge.unmask_memory = agp_generic_unmask_memory; agp_bridge.agp_enable = agp_generic_agp_enable; agp_bridge.cache_flush = global_cache_flush; agp_bridge.create_gatt_table = agp_generic_create_gatt_table; @@ -1908,14 +2513,11 @@ agp_bridge.cant_use_aperture = 0; return 0; - - (void) pdev; /* unused */ } -static int __init intel_850_setup (struct pci_dev *pdev) +static int __init intel_850_setup (struct pci_dev *pdev __attribute__((unused)) { agp_bridge.masks = intel_generic_masks; - agp_bridge.num_of_masks = 1; agp_bridge.aperture_sizes = (void *) intel_8xx_sizes; agp_bridge.size_type = U8_APER_SIZE; agp_bridge.num_aperture_sizes = 7; @@ -1926,6 +2528,7 @@ agp_bridge.cleanup = intel_8xx_cleanup; agp_bridge.tlb_flush = intel_8xx_tlbflush; agp_bridge.mask_memory = intel_mask_memory; + agp_bridge.unmask_memory = agp_generic_unmask_memory; agp_bridge.agp_enable = agp_generic_agp_enable; agp_bridge.cache_flush = global_cache_flush; agp_bridge.create_gatt_table = agp_generic_create_gatt_table; @@ -1941,14 +2544,11 @@ agp_bridge.cant_use_aperture = 0; return 0; - - (void) pdev; /* unused */ } -static int __init intel_860_setup (struct pci_dev *pdev) +static int __init intel_860_setup (struct pci_dev *pdev __attribute__((unused)) { agp_bridge.masks = intel_generic_masks; - agp_bridge.num_of_masks = 1; agp_bridge.aperture_sizes = (void *) intel_8xx_sizes; agp_bridge.size_type = U8_APER_SIZE; agp_bridge.num_aperture_sizes = 7; @@ -1974,8 +2574,6 @@ agp_bridge.cant_use_aperture = 0; return 0; - - (void) pdev; /* unused */ } #endif /* CONFIG_AGP_INTEL */ @@ -2065,10 +2663,9 @@ {0x00000000, 0} }; -static int __init via_generic_setup (struct pci_dev *pdev) +static int __init via_generic_setup (struct pci_dev *pdev __attribute__((unused)) { agp_bridge.masks = via_generic_masks; - agp_bridge.num_of_masks = 1; agp_bridge.aperture_sizes = (void *) via_generic_sizes; agp_bridge.size_type = U8_APER_SIZE; agp_bridge.num_aperture_sizes = 7; @@ -2079,6 +2676,7 @@ agp_bridge.cleanup = via_cleanup; agp_bridge.tlb_flush = via_tlbflush; agp_bridge.mask_memory = via_mask_memory; + agp_bridge.unmask_memory = agp_generic_unmask_memory; agp_bridge.agp_enable = agp_generic_agp_enable; agp_bridge.cache_flush = global_cache_flush; agp_bridge.create_gatt_table = agp_generic_create_gatt_table; @@ -2094,8 +2692,6 @@ agp_bridge.cant_use_aperture = 0; return 0; - - (void) pdev; /* unused */ } #endif /* CONFIG_AGP_VIA */ @@ -2182,7 +2778,6 @@ static int __init sis_generic_setup (struct pci_dev *pdev) { agp_bridge.masks = sis_generic_masks; - agp_bridge.num_of_masks = 1; agp_bridge.aperture_sizes = (void *) sis_generic_sizes; agp_bridge.size_type = U8_APER_SIZE; agp_bridge.num_aperture_sizes = 7; @@ -2193,6 +2788,7 @@ agp_bridge.cleanup = sis_cleanup; agp_bridge.tlb_flush = sis_tlbflush; agp_bridge.mask_memory = sis_mask_memory; + agp_bridge.unmask_memory = agp_generic_unmask_memory; agp_bridge.agp_enable = agp_generic_agp_enable; agp_bridge.cache_flush = global_cache_flush; agp_bridge.create_gatt_table = agp_generic_create_gatt_table; @@ -2215,8 +2811,8 @@ #ifdef CONFIG_AGP_AMD typedef struct _amd_page_map { - unsigned long *real; - unsigned long *remapped; + u32 *real; + u32 *remapped; } amd_page_map; static struct _amd_irongate_private { @@ -2229,14 +2825,13 @@ { int i; - page_map->real = (unsigned long *) __get_free_page(GFP_KERNEL); + page_map->real = (u32 *) __get_free_page(GFP_KERNEL); if (page_map->real == NULL) { return -ENOMEM; } SetPageReserved(virt_to_page(page_map->real)); CACHE_FLUSH(); - page_map->remapped = ioremap_nocache(virt_to_phys(page_map->real), - PAGE_SIZE); + page_map->remapped = ioremap_nocache(virt_to_phys(page_map->real), PAGE_SIZE); if (page_map->remapped == NULL) { ClearPageReserved(virt_to_page(page_map->real)); free_page((unsigned long) page_map->real); @@ -2245,7 +2840,7 @@ } CACHE_FLUSH(); - for(i = 0; i < PAGE_SIZE / sizeof(unsigned long); i++) { + for (i = 0; i < PAGE_SIZE / sizeof(unsigned long); i++) { page_map->remapped[i] = agp_bridge.scratch_page; } @@ -2266,7 +2861,7 @@ amd_page_map *entry; tables = amd_irongate_private.gatt_pages; - for(i = 0; i < amd_irongate_private.num_tables; i++) { + for (i = 0; i < amd_irongate_private.num_tables; i++) { entry = tables[i]; if (entry != NULL) { if (entry->real != NULL) { @@ -2285,8 +2880,7 @@ int retval = 0; int i; - tables = kmalloc((nr_tables + 1) * sizeof(amd_page_map *), - GFP_KERNEL); + tables = kmalloc((nr_tables + 1) * sizeof(amd_page_map *), GFP_KERNEL); if (tables == NULL) { return -ENOMEM; } @@ -2315,11 +2909,9 @@ */ #define GET_PAGE_DIR_OFF(addr) (addr >> 22) -#define GET_PAGE_DIR_IDX(addr) (GET_PAGE_DIR_OFF(addr) - \ - GET_PAGE_DIR_OFF(agp_bridge.gart_bus_addr)) -#define GET_GATT_OFF(addr) ((addr & 0x003ff000) >> 12) -#define GET_GATT(addr) (amd_irongate_private.gatt_pages[\ - GET_PAGE_DIR_IDX(addr)]->remapped) +#define GET_PAGE_DIR_IDX(addr) (GET_PAGE_DIR_OFF(addr) - GET_PAGE_DIR_OFF(agp_bridge.gart_bus_addr)) +#define GET_GATT_OFF(addr) ((addr & 0x003ff000) >> 12) +#define GET_GATT(addr) (amd_irongate_private.gatt_pages[GET_PAGE_DIR_IDX(addr)]->remapped) static int amd_create_gatt_table(void) { @@ -2356,7 +2948,7 @@ agp_bridge.gart_bus_addr = addr; /* Calculate the agp offset */ - for(i = 0; i < value->num_entries / 1024; i++, addr += 0x00400000) { + for (i = 0; i < value->num_entries / 1024; i++, addr += 0x00400000) { page_dir.remapped[GET_PAGE_DIR_OFF(addr)] = virt_to_phys(amd_irongate_private.gatt_pages[i]->real); page_dir.remapped[GET_PAGE_DIR_OFF(addr)] |= 0x00000001; @@ -2368,7 +2960,7 @@ static int amd_free_gatt_table(void) { amd_page_map page_dir; - + page_dir.real = agp_bridge.gatt_table_real; page_dir.remapped = agp_bridge.gatt_table; @@ -2418,7 +3010,7 @@ /* Write the Sync register */ pci_write_config_byte(agp_bridge.dev, AMD_MODECNTL, 0x80); - + /* Set indexing mode */ pci_write_config_byte(agp_bridge.dev, AMD_MODECNTL2, 0x00); @@ -2482,7 +3074,7 @@ off_t pg_start, int type) { int i, j, num_entries; - unsigned long *cur_gatt; + u32 *cur_gatt; unsigned long addr; num_entries = A_SIZE_LVL2(agp_bridge.current_size)->num_entries; @@ -2512,17 +3104,17 @@ for (i = 0, j = pg_start; i < mem->page_count; i++, j++) { addr = (j * PAGE_SIZE) + agp_bridge.gart_bus_addr; cur_gatt = GET_GATT(addr); - cur_gatt[GET_GATT_OFF(addr)] = mem->memory[i]; + cur_gatt[GET_GATT_OFF(addr)] = + agp_bridge.mask_memory(mem->memory[i], mem->type); } agp_bridge.tlb_flush(mem); return 0; } -static int amd_remove_memory(agp_memory * mem, off_t pg_start, - int type) +static int amd_remove_memory(agp_memory * mem, off_t pg_start, int type) { int i; - unsigned long *cur_gatt; + u32 *cur_gatt; unsigned long addr; if (type != 0 || mem->type != 0) { @@ -2531,8 +3123,7 @@ for (i = pg_start; i < (mem->page_count + pg_start); i++) { addr = (i * PAGE_SIZE) + agp_bridge.gart_bus_addr; cur_gatt = GET_GATT(addr); - cur_gatt[GET_GATT_OFF(addr)] = - (unsigned long) agp_bridge.scratch_page; + cur_gatt[GET_GATT_OFF(addr)] = (unsigned long) agp_bridge.scratch_page; } agp_bridge.tlb_flush(mem); @@ -2555,10 +3146,9 @@ {0x00000001, 0} }; -static int __init amd_irongate_setup (struct pci_dev *pdev) +static int __init amd_irongate_setup (struct pci_dev *pdev __attribute__((unused)) { agp_bridge.masks = amd_irongate_masks; - agp_bridge.num_of_masks = 1; agp_bridge.aperture_sizes = (void *) amd_irongate_sizes; agp_bridge.size_type = LVL2_APER_SIZE; agp_bridge.num_aperture_sizes = 7; @@ -2569,6 +3159,7 @@ agp_bridge.cleanup = amd_irongate_cleanup; agp_bridge.tlb_flush = amd_irongate_tlbflush; agp_bridge.mask_memory = amd_irongate_mask_memory; + agp_bridge.unmask_memory = agp_generic_unmask_memory; agp_bridge.agp_enable = agp_generic_agp_enable; agp_bridge.cache_flush = global_cache_flush; agp_bridge.create_gatt_table = amd_create_gatt_table; @@ -2584,8 +3175,6 @@ agp_bridge.cant_use_aperture = 0; return 0; - - (void) pdev; /* unused */ } #endif /* CONFIG_AGP_AMD */ @@ -2667,7 +3256,6 @@ * next couple of lines below it. I suspect this was an oversight, * but you might want to check up on this? */ - pci_read_config_dword(agp_bridge.dev, ALI_APBASE, &temp); agp_bridge.gart_bus_addr = (temp & PCI_BASE_ADDRESS_MEM_MASK); @@ -2802,10 +3390,9 @@ {4, 1024, 0, 3} }; -static int __init ali_generic_setup (struct pci_dev *pdev) +static int __init ali_generic_setup (struct pci_dev *pdev __attribute__((unused)) { agp_bridge.masks = ali_generic_masks; - agp_bridge.num_of_masks = 1; agp_bridge.aperture_sizes = (void *) ali_generic_sizes; agp_bridge.size_type = U32_APER_SIZE; agp_bridge.num_aperture_sizes = 7; @@ -2816,6 +3403,7 @@ agp_bridge.cleanup = ali_cleanup; agp_bridge.tlb_flush = ali_tlbflush; agp_bridge.mask_memory = ali_mask_memory; + agp_bridge.unmask_memory = agp_generic_unmask_memory; agp_bridge.agp_enable = agp_generic_agp_enable; agp_bridge.cache_flush = ali_cache_flush; agp_bridge.create_gatt_table = agp_generic_create_gatt_table; @@ -2831,8 +3419,6 @@ agp_bridge.cant_use_aperture = 0; return 0; - - (void) pdev; /* unused */ } #endif /* CONFIG_AGP_ALI */ @@ -2864,8 +3450,7 @@ } SetPageReserved(virt_to_page(page_map->real)); CACHE_FLUSH(); - page_map->remapped = ioremap_nocache(virt_to_phys(page_map->real), - PAGE_SIZE); + page_map->remapped = ioremap_nocache(virt_to_phys(page_map->real), PAGE_SIZE); if (page_map->remapped == NULL) { ClearPageReserved(virt_to_page(page_map->real)); free_page((unsigned long) page_map->real); @@ -2874,7 +3459,7 @@ } CACHE_FLUSH(); - for(i = 0; i < PAGE_SIZE / sizeof(unsigned long); i++) { + for (i = 0; i < PAGE_SIZE / sizeof(unsigned long); i++) { page_map->remapped[i] = agp_bridge.scratch_page; } @@ -2895,7 +3480,7 @@ serverworks_page_map *entry; tables = serverworks_private.gatt_pages; - for(i = 0; i < serverworks_private.num_tables; i++) { + for (i = 0; i < serverworks_private.num_tables; i++) { entry = tables[i]; if (entry != NULL) { if (entry->real != NULL) { @@ -2914,8 +3499,7 @@ int retval = 0; int i; - tables = kmalloc((nr_tables + 1) * sizeof(serverworks_page_map *), - GFP_KERNEL); + tables = kmalloc((nr_tables + 1) * sizeof(serverworks_page_map *), GFP_KERNEL); if (tables == NULL) { return -ENOMEM; } @@ -2974,8 +3558,9 @@ return retval; } /* Create a fake scratch directory */ - for(i = 0; i < 1024; i++) { - serverworks_private.scratch_dir.remapped[i] = (unsigned long) agp_bridge.scratch_page; + for (i = 0; i < 1024; i++) { + serverworks_private.scratch_dir.remapped[i] + = (unsigned long) agp_bridge.scratch_page; page_dir.remapped[i] = virt_to_phys(serverworks_private.scratch_dir.real); page_dir.remapped[i] |= 0x00000001; @@ -3002,9 +3587,9 @@ &temp); agp_bridge.gart_bus_addr = (temp & PCI_BASE_ADDRESS_MEM_MASK); - /* Calculate the agp offset */ + /* Calculate the agp offset */ - for(i = 0; i < value->num_entries / 1024; i++) { + for (i = 0; i < value->num_entries / 1024; i++) { page_dir.remapped[i] = virt_to_phys(serverworks_private.gatt_pages[i]->real); page_dir.remapped[i] |= 0x00000001; @@ -3016,7 +3601,7 @@ static int serverworks_free_gatt_table(void) { serverworks_page_map page_dir; - + page_dir.real = agp_bridge.gatt_table_real; page_dir.remapped = agp_bridge.gatt_table; @@ -3081,7 +3666,7 @@ OUTREG8(serverworks_private.registers, SVWRKS_GART_CACHE, 0x0a); - OUTREG32(serverworks_private.registers, SVWRKS_GATTBASE, + OUTREG32(serverworks_private.registers, SVWRKS_GATTBASE, agp_bridge.gatt_bus_addr); cap_reg = INREG16(serverworks_private.registers, SVWRKS_COMMAND); @@ -3152,18 +3737,16 @@ OUTREG8(serverworks_private.registers, SVWRKS_POSTFLUSH, 0x01); end = jiffies + 3*HZ; - while(INREG8(serverworks_private.registers, - SVWRKS_POSTFLUSH) == 0x01) { - if((signed)(end - jiffies) <= 0) { + while(INREG8(serverworks_private.registers, SVWRKS_POSTFLUSH) == 0x01) { + if ((signed)(end - jiffies) <= 0) { printk(KERN_ERR "Posted write buffer flush took more" "then 3 seconds\n"); } } OUTREG32(serverworks_private.registers, SVWRKS_DIRFLUSH, 0x00000001); end = jiffies + 3*HZ; - while(INREG32(serverworks_private.registers, - SVWRKS_DIRFLUSH) == 0x00000001) { - if((signed)(end - jiffies) <= 0) { + while(INREG32(serverworks_private.registers, SVWRKS_DIRFLUSH) == 0x00000001) { + if ((signed)(end - jiffies) <= 0) { printk(KERN_ERR "TLB flush took more" "then 3 seconds\n"); } @@ -3177,8 +3760,7 @@ return addr | agp_bridge.masks[0].mask; } -static int serverworks_insert_memory(agp_memory * mem, - off_t pg_start, int type) +static int serverworks_insert_memory(agp_memory * mem, off_t pg_start, int type) { int i, j, num_entries; unsigned long *cur_gatt; @@ -3211,14 +3793,14 @@ for (i = 0, j = pg_start; i < mem->page_count; i++, j++) { addr = (j * PAGE_SIZE) + agp_bridge.gart_bus_addr; cur_gatt = SVRWRKS_GET_GATT(addr); - cur_gatt[GET_GATT_OFF(addr)] = mem->memory[i]; + cur_gatt[GET_GATT_OFF(addr)] = + agp_bridge.mask_memory(mem->memory[i], mem->type); } agp_bridge.tlb_flush(mem); return 0; } -static int serverworks_remove_memory(agp_memory * mem, off_t pg_start, - int type) +static int serverworks_remove_memory(agp_memory * mem, off_t pg_start, int type) { int i; unsigned long *cur_gatt; @@ -3234,8 +3816,7 @@ for (i = pg_start; i < (mem->page_count + pg_start); i++) { addr = (i * PAGE_SIZE) + agp_bridge.gart_bus_addr; cur_gatt = SVRWRKS_GET_GATT(addr); - cur_gatt[GET_GATT_OFF(addr)] = - (unsigned long) agp_bridge.scratch_page; + cur_gatt[GET_GATT_OFF(addr)] = (unsigned long) agp_bridge.scratch_page; } agp_bridge.tlb_flush(mem); @@ -3288,7 +3869,7 @@ } if (cap_ptr != 0x00) { /* - * Ok, here we have a AGP device. Disable impossible + * Ok, here we have a AGP device. Disable impossible * settings, and adjust the readqueue to the minimum. */ @@ -3368,7 +3949,6 @@ serverworks_private.svrwrks_dev = pdev; agp_bridge.masks = serverworks_masks; - agp_bridge.num_of_masks = 1; agp_bridge.aperture_sizes = (void *) serverworks_sizes; agp_bridge.size_type = LVL2_APER_SIZE; agp_bridge.num_aperture_sizes = 7; @@ -3399,11 +3979,11 @@ serverworks_private.gart_addr_ofs = 0x10; - if(temp & PCI_BASE_ADDRESS_MEM_TYPE_64) { + if (temp & PCI_BASE_ADDRESS_MEM_TYPE_64) { pci_read_config_dword(agp_bridge.dev, SVWRKS_APSIZE + 4, &temp2); - if(temp2 != 0) { + if (temp2 != 0) { printk("Detected 64 bit aperture address, but top " "bits are not zero. Disabling agp\n"); return -ENODEV; @@ -3416,11 +3996,11 @@ pci_read_config_dword(agp_bridge.dev, serverworks_private.mm_addr_ofs, &temp); - if(temp & PCI_BASE_ADDRESS_MEM_TYPE_64) { + if (temp & PCI_BASE_ADDRESS_MEM_TYPE_64) { pci_read_config_dword(agp_bridge.dev, serverworks_private.mm_addr_ofs + 4, &temp2); - if(temp2 != 0) { + if (temp2 != 0) { printk("Detected 64 bit MMIO address, but top " "bits are not zero. Disabling agp\n"); return -ENODEV; @@ -3432,6 +4012,362 @@ #endif /* CONFIG_AGP_SWORKS */ +#ifdef CONFIG_AGP_HP_ZX1 + +#ifndef log2 +#define log2(x) ffz(~(x)) +#endif + +#define HP_ZX1_IOVA_BASE GB(1UL) +#define HP_ZX1_IOVA_SIZE GB(1UL) +#define HP_ZX1_GART_SIZE (HP_ZX1_IOVA_SIZE / 2) +#define HP_ZX1_SBA_IOMMU_COOKIE 0x0000badbadc0ffeeUL + +#define HP_ZX1_PDIR_VALID_BIT 0x8000000000000000UL +#define HP_ZX1_IOVA_TO_PDIR(va) ((va - hp_private.iova_base) >> hp_private.io_tlb_shift) + +static aper_size_info_fixed hp_zx1_sizes[] = +{ + {0, 0, 0}, /* filled in by hp_zx1_fetch_size() */ +}; + +static gatt_mask hp_zx1_masks[] = +{ + {HP_ZX1_PDIR_VALID_BIT, 0} +}; + +static struct _hp_private { + struct pci_dev *ioc; + volatile u8 *registers; + u64 *io_pdir; // PDIR for entire IOVA + u64 *gatt; // PDIR just for GART (subset of above) + u64 gatt_entries; + u64 iova_base; + u64 gart_base; + u64 gart_size; + u64 io_pdir_size; + int io_pdir_owner; // do we own it, or share it with sba_iommu? + int io_page_size; + int io_tlb_shift; + int io_tlb_ps; // IOC ps config + int io_pages_per_kpage; +} hp_private; + +static int __init hp_zx1_ioc_shared(void) +{ + struct _hp_private *hp = &hp_private; + + printk(KERN_INFO PFX "HP ZX1 IOC: IOPDIR shared with sba_iommu\n"); + + /* + * IOC already configured by sba_iommu module; just use + * its setup. We assume: + * - IOVA space is 1Gb in size + * - first 512Mb is IOMMU, second 512Mb is GART + */ + hp->io_tlb_ps = INREG64(hp->registers, HP_ZX1_TCNFG); + switch (hp->io_tlb_ps) { + case 0: hp->io_tlb_shift = 12; break; + case 1: hp->io_tlb_shift = 13; break; + case 2: hp->io_tlb_shift = 14; break; + case 3: hp->io_tlb_shift = 16; break; + default: + printk(KERN_ERR PFX "Invalid IOTLB page size " + "configuration 0x%x\n", hp->io_tlb_ps); + hp->gatt = 0; + hp->gatt_entries = 0; + return -ENODEV; + } + hp->io_page_size = 1 << hp->io_tlb_shift; + hp->io_pages_per_kpage = PAGE_SIZE / hp->io_page_size; + + hp->iova_base = INREG64(hp->registers, HP_ZX1_IBASE) & ~0x1; + hp->gart_base = hp->iova_base + HP_ZX1_IOVA_SIZE - HP_ZX1_GART_SIZE; + + hp->gart_size = HP_ZX1_GART_SIZE; + hp->gatt_entries = hp->gart_size / hp->io_page_size; + + hp->io_pdir = phys_to_virt(INREG64(hp->registers, HP_ZX1_PDIR_BASE)); + hp->gatt = &hp->io_pdir[HP_ZX1_IOVA_TO_PDIR(hp->gart_base)]; + + if (hp->gatt[0] != HP_ZX1_SBA_IOMMU_COOKIE) { + hp->gatt = 0; + hp->gatt_entries = 0; + printk(KERN_ERR PFX "No reserved IO PDIR entry found; " + "GART disabled\n"); + return -ENODEV; + } + + return 0; +} + +static int __init hp_zx1_ioc_owner(u8 ioc_rev) +{ + struct _hp_private *hp = &hp_private; + + printk(KERN_INFO PFX "HP ZX1 IOC: IOPDIR dedicated to GART\n"); + + /* + * Select an IOV page size no larger than system page size. + */ + if (PAGE_SIZE >= KB(64)) { + hp->io_tlb_shift = 16; + hp->io_tlb_ps = 3; + } else if (PAGE_SIZE >= KB(16)) { + hp->io_tlb_shift = 14; + hp->io_tlb_ps = 2; + } else if (PAGE_SIZE >= KB(8)) { + hp->io_tlb_shift = 13; + hp->io_tlb_ps = 1; + } else { + hp->io_tlb_shift = 12; + hp->io_tlb_ps = 0; + } + hp->io_page_size = 1 << hp->io_tlb_shift; + hp->io_pages_per_kpage = PAGE_SIZE / hp->io_page_size; + + hp->iova_base = HP_ZX1_IOVA_BASE; + hp->gart_size = HP_ZX1_GART_SIZE; + hp->gart_base = hp->iova_base + HP_ZX1_IOVA_SIZE - hp->gart_size; + + hp->gatt_entries = hp->gart_size / hp->io_page_size; + hp->io_pdir_size = (HP_ZX1_IOVA_SIZE / hp->io_page_size) * sizeof(u64); + + return 0; +} + +static int __init hp_zx1_ioc_init(void) +{ + struct _hp_private *hp = &hp_private; + struct pci_dev *ioc; + int i; + u8 ioc_rev; + + ioc = pci_find_device(PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_ZX1_IOC, NULL); + if (!ioc) { + printk(KERN_ERR PFX "Detected HP ZX1 AGP bridge but no IOC\n"); + return -ENODEV; + } + hp->ioc = ioc; + + pci_read_config_byte(ioc, PCI_REVISION_ID, &ioc_rev); + + for (i = 0; i < PCI_NUM_RESOURCES; i++) { + if (pci_resource_flags(ioc, i) == IORESOURCE_MEM) { + hp->registers = (u8 *) ioremap(pci_resource_start(ioc, + i), + pci_resource_len(ioc, i)); + break; + } + } + if (!hp->registers) { + printk(KERN_ERR PFX "Detected HP ZX1 AGP bridge but no CSRs\n"); + + return -ENODEV; + } + + /* + * If the IOTLB is currently disabled, we can take it over. + * Otherwise, we have to share with sba_iommu. + */ + hp->io_pdir_owner = (INREG64(hp->registers, HP_ZX1_IBASE) & 0x1) == 0; + + if (hp->io_pdir_owner) + return hp_zx1_ioc_owner(ioc_rev); + + return hp_zx1_ioc_shared(); +} + +static int hp_zx1_fetch_size(void) +{ + int size; + + size = hp_private.gart_size / MB(1); + hp_zx1_sizes[0].size = size; + agp_bridge.current_size = (void *) &hp_zx1_sizes[0]; + return size; +} + +static int hp_zx1_configure(void) +{ + struct _hp_private *hp = &hp_private; + + agp_bridge.gart_bus_addr = hp->gart_base; + agp_bridge.capndx = pci_find_capability(agp_bridge.dev, PCI_CAP_ID_AGP); + pci_read_config_dword(agp_bridge.dev, + agp_bridge.capndx + PCI_AGP_STATUS, &agp_bridge.mode); + + if (hp->io_pdir_owner) { + OUTREG64(hp->registers, HP_ZX1_PDIR_BASE, virt_to_phys(hp->io_pdir)); + OUTREG64(hp->registers, HP_ZX1_TCNFG, hp->io_tlb_ps); + OUTREG64(hp->registers, HP_ZX1_IMASK, ~(HP_ZX1_IOVA_SIZE - 1)); + OUTREG64(hp->registers, HP_ZX1_IBASE, hp->iova_base | 0x1); + OUTREG64(hp->registers, HP_ZX1_PCOM, hp->iova_base | log2(HP_ZX1_IOVA_SIZE)); + INREG64(hp->registers, HP_ZX1_PCOM); + } + + return 0; +} + +static void hp_zx1_cleanup(void) +{ + struct _hp_private *hp = &hp_private; + + if (hp->io_pdir_owner) + OUTREG64(hp->registers, HP_ZX1_IBASE, 0); + iounmap((void *) hp->registers); +} + +static void hp_zx1_tlbflush(agp_memory * mem) +{ + struct _hp_private *hp = &hp_private; + + OUTREG64(hp->registers, HP_ZX1_PCOM, hp->gart_base | log2(hp->gart_size)); + INREG64(hp->registers, HP_ZX1_PCOM); +} + +static int hp_zx1_create_gatt_table(void) +{ + struct _hp_private *hp = &hp_private; + int i; + + if (hp->io_pdir_owner) { + hp->io_pdir = (u64 *) __get_free_pages(GFP_KERNEL, + get_order(hp->io_pdir_size)); + if (!hp->io_pdir) { + printk(KERN_ERR PFX "Couldn't allocate contiguous memory for I/O PDIR\n"); + hp->gatt = 0; + hp->gatt_entries = 0; + return -ENOMEM; + } + memset(hp->io_pdir, 0, hp->io_pdir_size); + + hp->gatt = &hp->io_pdir[HP_ZX1_IOVA_TO_PDIR(hp->gart_base)]; + } + + for (i = 0; i < hp->gatt_entries; i++) { + hp->gatt[i] = (unsigned long) agp_bridge.scratch_page; + } + + return 0; +} + +static int hp_zx1_free_gatt_table(void) +{ + struct _hp_private *hp = &hp_private; + + if (hp->io_pdir_owner) + free_pages((unsigned long) hp->io_pdir, + get_order(hp->io_pdir_size)); + else + hp->gatt[0] = HP_ZX1_SBA_IOMMU_COOKIE; + return 0; +} + +static int hp_zx1_insert_memory(agp_memory * mem, off_t pg_start, int type) +{ + struct _hp_private *hp = &hp_private; + int i, k; + off_t j, io_pg_start; + int io_pg_count; + + if (type != 0 || mem->type != 0) { + return -EINVAL; + } + + io_pg_start = hp->io_pages_per_kpage * pg_start; + io_pg_count = hp->io_pages_per_kpage * mem->page_count; + if ((io_pg_start + io_pg_count) > hp->gatt_entries) { + return -EINVAL; + } + + j = io_pg_start; + while (j < (io_pg_start + io_pg_count)) { + if (hp->gatt[j]) { + return -EBUSY; + } + j++; + } + + if (mem->is_flushed == FALSE) { + CACHE_FLUSH(); + mem->is_flushed = TRUE; + } + + for (i = 0, j = io_pg_start; i < mem->page_count; i++) { + unsigned long paddr; + + paddr = mem->memory[i]; + for (k = 0; + k < hp->io_pages_per_kpage; + k++, j++, paddr += hp->io_page_size) { + hp->gatt[j] = agp_bridge.mask_memory(paddr, type); + } + } + + agp_bridge.tlb_flush(mem); + return 0; +} + +static int hp_zx1_remove_memory(agp_memory * mem, off_t pg_start, int type) +{ + struct _hp_private *hp = &hp_private; + int i, io_pg_start, io_pg_count; + + if (type != 0 || mem->type != 0) { + return -EINVAL; + } + + io_pg_start = hp->io_pages_per_kpage * pg_start; + io_pg_count = hp->io_pages_per_kpage * mem->page_count; + for (i = io_pg_start; i < io_pg_count + io_pg_start; i++) { + hp->gatt[i] = agp_bridge.scratch_page; + } + + agp_bridge.tlb_flush(mem); + return 0; +} + +static unsigned long hp_zx1_mask_memory(unsigned long addr, int type) +{ + return HP_ZX1_PDIR_VALID_BIT | addr; +} + +static unsigned long hp_zx1_unmask_memory(unsigned long addr) +{ + return addr & ~(HP_ZX1_PDIR_VALID_BIT); +} + +static int __init hp_zx1_setup (struct pci_dev *pdev __attribute__((unused)) +{ + agp_bridge.masks = hp_zx1_masks; + agp_bridge.dev_private_data = NULL; + agp_bridge.size_type = FIXED_APER_SIZE; + agp_bridge.needs_scratch_page = FALSE; + agp_bridge.configure = hp_zx1_configure; + agp_bridge.fetch_size = hp_zx1_fetch_size; + agp_bridge.cleanup = hp_zx1_cleanup; + agp_bridge.tlb_flush = hp_zx1_tlbflush; + agp_bridge.mask_memory = hp_zx1_mask_memory; + agp_bridge.unmask_memory = hp_zx1_unmask_memory; + agp_bridge.agp_enable = agp_generic_agp_enable; + agp_bridge.cache_flush = global_cache_flush; + agp_bridge.create_gatt_table = hp_zx1_create_gatt_table; + agp_bridge.free_gatt_table = hp_zx1_free_gatt_table; + agp_bridge.insert_memory = hp_zx1_insert_memory; + agp_bridge.remove_memory = hp_zx1_remove_memory; + agp_bridge.alloc_by_type = agp_generic_alloc_by_type; + agp_bridge.free_by_type = agp_generic_free_by_type; + agp_bridge.agp_alloc_page = agp_generic_alloc_page; + agp_bridge.agp_destroy_page = agp_generic_destroy_page; + agp_bridge.suspend = agp_generic_suspend; + agp_bridge.resume = agp_generic_resume; + agp_bridge.cant_use_aperture = 1; + + return hp_zx1_ioc_init(); +} + +#endif /* CONFIG_AGP_HP_ZX1 */ /* per-chipset initialization data. * note -- all chipsets for a single vendor MUST be grouped together @@ -3452,7 +4388,7 @@ "Ali", "M1541", ali_generic_setup }, - { PCI_DEVICE_ID_AL_M1621_0, + { PCI_DEVICE_ID_AL_M1621_0, PCI_VENDOR_ID_AL, ALI_M1621, "Ali", @@ -3487,7 +4423,7 @@ ALI_M1651, "Ali", "M1651", - ali_generic_setup }, + ali_generic_setup }, { 0, PCI_VENDOR_ID_AL, ALI_GENERIC, @@ -3599,6 +4535,15 @@ #endif /* CONFIG_AGP_INTEL */ +#ifdef CONFIG_AGP_I460 + { PCI_DEVICE_ID_INTEL_460GX, + PCI_VENDOR_ID_INTEL, + INTEL_460GX, + "Intel", + "460GX", + intel_i460_setup }, +#endif + #ifdef CONFIG_AGP_SIS { PCI_DEVICE_ID_SI_740, PCI_VENDOR_ID_SI, @@ -3654,7 +4599,7 @@ "SiS", "530", sis_generic_setup }, - { PCI_DEVICE_ID_SI_550, + { PCI_DEVICE_ID_SI_550, PCI_VENDOR_ID_SI, SIS_GENERIC, "SiS", @@ -3719,6 +4664,15 @@ via_generic_setup }, #endif /* CONFIG_AGP_VIA */ +#ifdef CONFIG_AGP_HP_ZX1 + { PCI_DEVICE_ID_HP_ZX1_LBA, + PCI_VENDOR_ID_HP, + HP_ZX1, + "HP", + "ZX1", + hp_zx1_setup }, +#endif + { 0, }, /* dummy final entry, always present */ }; @@ -3727,7 +4681,7 @@ static int __init agp_lookup_host_bridge (struct pci_dev *pdev) { int i; - + for (i = 0; i < ARRAY_SIZE (agp_bridge_info); i++) if (pdev->vendor == agp_bridge_info[i].vendor_id) break; @@ -3775,7 +4729,7 @@ agp_bridge.type = agp_bridge_info[i].chipset; return agp_bridge_info[i].chipset_setup (pdev); } - + i++; } @@ -3797,6 +4751,18 @@ return -ENODEV; } +static int agp_check_supported_device(struct pci_dev *dev) { + + int i; + + for (i = 0; i < ARRAY_SIZE (agp_bridge_info); i++) { + if (dev->vendor == agp_bridge_info[i].vendor_id && + dev->device == agp_bridge_info[i].device_id) + return 1; + } + + return 0; +} /* Supported Device Scanning routine */ @@ -3805,8 +4771,14 @@ struct pci_dev *dev = NULL; u8 cap_ptr = 0x00; - if ((dev = pci_find_class(PCI_CLASS_BRIDGE_HOST << 8, NULL)) == NULL) - return -ENODEV; + /* + * Some systems have multiple host bridges (i.e. BigSur), so + * we can't just use the first one we find. + */ + do { + if ((dev = pci_find_class(PCI_CLASS_BRIDGE_HOST << 8, dev)) == NULL) + return -ENODEV; + } while(!agp_check_supported_device(dev)); agp_bridge.dev = dev; @@ -3884,12 +4856,12 @@ case PCI_DEVICE_ID_INTEL_830_M_0: i810_dev = pci_find_device(PCI_VENDOR_ID_INTEL, - PCI_DEVICE_ID_INTEL_830_M_1, - NULL); - if(i810_dev && PCI_FUNC(i810_dev->devfn) != 0) { + PCI_DEVICE_ID_INTEL_830_M_1, + NULL); + if (i810_dev && PCI_FUNC(i810_dev->devfn) != 0) { i810_dev = pci_find_device(PCI_VENDOR_ID_INTEL, - PCI_DEVICE_ID_INTEL_830_M_1, - i810_dev); + PCI_DEVICE_ID_INTEL_830_M_1, + i810_dev); } if (i810_dev == NULL) { @@ -3913,9 +4885,8 @@ if (dev->vendor == PCI_VENDOR_ID_SERVERWORKS) { struct pci_dev *bridge_dev; - bridge_dev = pci_find_slot ((unsigned int)dev->bus->number, - PCI_DEVFN(0, 1)); - if(bridge_dev == NULL) { + bridge_dev = pci_find_slot ((unsigned int)dev->bus->number, PCI_DEVFN(0, 1)); + if (bridge_dev == NULL) { printk(KERN_INFO PFX "agpgart: Detected a Serverworks " "Chipset, but could not find the secondary " "device.\n"); @@ -3933,7 +4904,7 @@ return serverworks_setup(bridge_dev); default: - if(agp_try_unsupported) { + if (agp_try_unsupported) { agp_bridge.type = SVWRKS_GENERIC; return serverworks_setup(bridge_dev); } @@ -3943,6 +4914,23 @@ #endif /* CONFIG_AGP_SWORKS */ +#ifdef CONFIG_AGP_HP_ZX1 + if (dev->vendor == PCI_VENDOR_ID_HP) { + do { + /* ZX1 LBAs can be either PCI or AGP bridges */ + if (pci_find_capability(dev, PCI_CAP_ID_AGP)) { + printk(KERN_INFO PFX "Detected HP ZX1 AGP " + "chipset at %s\n", dev->slot_name); + agp_bridge.type = HP_ZX1; + agp_bridge.dev = dev; + return hp_zx1_setup(dev); + } + dev = pci_find_class(PCI_CLASS_BRIDGE_HOST << 8, dev); + } while (dev); + return -ENODEV; + } +#endif /* CONFIG_AGP_HP_ZX1 */ + /* find capndx */ cap_ptr = pci_find_capability(dev, PCI_CAP_ID_AGP); if (cap_ptr == 0x00) @@ -4052,7 +5040,7 @@ goto err_out; } got_gatt = 1; - + agp_bridge.key_list = vmalloc(PAGE_SIZE * 4); if (agp_bridge.key_list == NULL) { printk(KERN_ERR PFX "error allocating memory for key lists.\n"); @@ -4060,7 +5048,7 @@ goto err_out; } got_keylist = 1; - + /* FIXME vmalloc'd memory not guaranteed contiguous */ memset(agp_bridge.key_list, 0, PAGE_SIZE * 4); @@ -4105,14 +5093,13 @@ static int agp_power(struct pm_dev *dev, pm_request_t rq, void *data) { - switch(rq) - { + switch(rq) { case PM_SUSPEND: return agp_bridge.suspend(); case PM_RESUME: agp_bridge.resume(); return 0; - } + } return 0; } @@ -4150,7 +5137,7 @@ } inter_module_register("drm_agp", THIS_MODULE, &drm_agp); - + pm_register(PM_PCI_DEV, PM_PCI_ID(agp_bridge.dev), agp_power); return 0; } diff -Nru a/drivers/char/drm/ati_pcigart.h b/drivers/char/drm/ati_pcigart.h --- a/drivers/char/drm/ati_pcigart.h Mon Apr 15 15:07:57 2002 +++ b/drivers/char/drm/ati_pcigart.h Mon Apr 15 15:07:57 2002 @@ -30,14 +30,20 @@ #define __NO_VERSION__ #include "drmP.h" -#if PAGE_SIZE == 8192 +#if PAGE_SIZE == 65536 +# define ATI_PCIGART_TABLE_ORDER 0 +# define ATI_PCIGART_TABLE_PAGES (1 << 0) +#elif PAGE_SIZE == 16384 +# define ATI_PCIGART_TABLE_ORDER 1 +# define ATI_PCIGART_TABLE_PAGES (1 << 1) +#elif PAGE_SIZE == 8192 # define ATI_PCIGART_TABLE_ORDER 2 # define ATI_PCIGART_TABLE_PAGES (1 << 2) #elif PAGE_SIZE == 4096 # define ATI_PCIGART_TABLE_ORDER 3 # define ATI_PCIGART_TABLE_PAGES (1 << 3) #else -# error - PAGE_SIZE not 8K or 4K +# error - PAGE_SIZE not 64K, 16K, 8K or 4K #endif # define ATI_MAX_PCIGART_PAGES 8192 /* 32 MB aperture, 4K pages */ @@ -103,6 +109,7 @@ goto done; } +#if defined(__alpha__) && (LINUX_VERSION_CODE >= 0x020400) if ( !dev->pdev ) { DRM_ERROR( "PCI device unknown!\n" ); goto done; @@ -117,6 +124,9 @@ address = 0; goto done; } +#else + bus_address = virt_to_bus( (void *)address ); +#endif pci_gart = (u32 *)address; @@ -126,6 +136,7 @@ memset( pci_gart, 0, ATI_MAX_PCIGART_PAGES * sizeof(u32) ); for ( i = 0 ; i < pages ; i++ ) { +#if defined(__alpha__) && (LINUX_VERSION_CODE >= 0x020400) /* we need to support large memory configurations */ entry->busaddr[i] = pci_map_single(dev->pdev, page_address( entry->pagelist[i] ), @@ -139,7 +150,9 @@ goto done; } page_base = (u32) entry->busaddr[i]; - +#else + page_base = page_to_bus( entry->pagelist[i] ); +#endif for (j = 0; j < (PAGE_SIZE / ATI_PCIGART_PAGE_SIZE); j++) { *pci_gart++ = cpu_to_le32( page_base ); page_base += ATI_PCIGART_PAGE_SIZE; @@ -164,6 +177,7 @@ unsigned long addr, dma_addr_t bus_addr) { +#if defined(__alpha__) && (LINUX_VERSION_CODE >= 0x020400) drm_sg_mem_t *entry = dev->sg; unsigned long pages; int i; @@ -188,6 +202,8 @@ PAGE_SIZE, PCI_DMA_TODEVICE); } } + +#endif if ( addr ) { DRM(ati_free_pcigart_table)( addr ); diff -Nru a/drivers/char/drm/drmP.h b/drivers/char/drm/drmP.h --- a/drivers/char/drm/drmP.h Mon Apr 15 15:07:57 2002 +++ b/drivers/char/drm/drmP.h Mon Apr 15 15:07:57 2002 @@ -366,13 +366,13 @@ if (len > DRM_PROC_LIMIT) { ret; *eof = 1; return len - offset; } /* Mapping helper macros */ -#define DRM_IOREMAP(map) \ - (map)->handle = DRM(ioremap)( (map)->offset, (map)->size ) +#define DRM_IOREMAP(map, dev) \ + (map)->handle = DRM(ioremap)( (map)->offset, (map)->size, (dev) ) -#define DRM_IOREMAPFREE(map) \ +#define DRM_IOREMAPFREE(map, dev) \ do { \ if ( (map)->handle && (map)->size ) \ - DRM(ioremapfree)( (map)->handle, (map)->size ); \ + DRM(ioremapfree)( (map)->handle, (map)->size, (dev) ); \ } while (0) #define DRM_FIND_MAP(_map, _o) \ @@ -826,8 +826,8 @@ extern unsigned long DRM(alloc_pages)(int order, int area); extern void DRM(free_pages)(unsigned long address, int order, int area); -extern void *DRM(ioremap)(unsigned long offset, unsigned long size); -extern void DRM(ioremapfree)(void *pt, unsigned long size); +extern void *DRM(ioremap)(unsigned long offset, unsigned long size, drm_device_t *dev); +extern void DRM(ioremapfree)(void *pt, unsigned long size, drm_device_t *dev); #if __REALLY_HAVE_AGP extern agp_memory *DRM(alloc_agp)(int pages, u32 type); diff -Nru a/drivers/char/drm/drm_agpsupport.h b/drivers/char/drm/drm_agpsupport.h --- a/drivers/char/drm/drm_agpsupport.h Mon Apr 15 15:07:56 2002 +++ b/drivers/char/drm/drm_agpsupport.h Mon Apr 15 15:07:56 2002 @@ -277,6 +277,7 @@ case INTEL_I840: head->chipset = "Intel i840"; break; case INTEL_I845: head->chipset = "Intel i845"; break; case INTEL_I850: head->chipset = "Intel i850"; break; + case INTEL_460GX: head->chipset = "Intel 460GX"; break; #endif case VIA_GENERIC: head->chipset = "VIA"; break; @@ -315,6 +316,8 @@ case SVWRKS_GENERIC: head->chipset = "Serverworks Generic"; break; #endif + + case HP_ZX1: head->chipset = "HP ZX1"; break; default: head->chipset = "Unknown"; break; } diff -Nru a/drivers/char/drm/drm_bufs.h b/drivers/char/drm/drm_bufs.h --- a/drivers/char/drm/drm_bufs.h Mon Apr 15 15:07:56 2002 +++ b/drivers/char/drm/drm_bufs.h Mon Apr 15 15:07:56 2002 @@ -107,7 +107,7 @@ switch ( map->type ) { case _DRM_REGISTERS: case _DRM_FRAME_BUFFER: -#if !defined(__sparc__) && !defined(__alpha__) +#if !defined(__sparc__) && !defined(__alpha__) && !defined(__ia64__) if ( map->offset + map->size < map->offset || map->offset < virt_to_phys(high_memory) ) { DRM(free)( map, sizeof(*map), DRM_MEM_MAPS ); @@ -124,7 +124,7 @@ MTRR_TYPE_WRCOMB, 1 ); } #endif - map->handle = DRM(ioremap)( map->offset, map->size ); + map->handle = DRM(ioremap)( map->offset, map->size, dev ); break; case _DRM_SHM: @@ -249,7 +249,7 @@ DRM_DEBUG("mtrr_del = %d\n", retcode); } #endif - DRM(ioremapfree)(map->handle, map->size); + DRM(ioremapfree)(map->handle, map->size, dev); break; case _DRM_SHM: vfree(map->handle); diff -Nru a/drivers/char/drm/drm_drv.h b/drivers/char/drm/drm_drv.h --- a/drivers/char/drm/drm_drv.h Mon Apr 15 15:07:57 2002 +++ b/drivers/char/drm/drm_drv.h Mon Apr 15 15:07:57 2002 @@ -439,7 +439,7 @@ DRM_DEBUG( "mtrr_del=%d\n", retcode ); } #endif - DRM(ioremapfree)( map->handle, map->size ); + DRM(ioremapfree)( map->handle, map->size, dev ); break; case _DRM_SHM: vfree(map->handle); diff -Nru a/drivers/char/drm/drm_memory.h b/drivers/char/drm/drm_memory.h --- a/drivers/char/drm/drm_memory.h Mon Apr 15 15:07:56 2002 +++ b/drivers/char/drm/drm_memory.h Mon Apr 15 15:07:56 2002 @@ -306,9 +306,14 @@ } } -void *DRM(ioremap)(unsigned long offset, unsigned long size) +void *DRM(ioremap)(unsigned long offset, unsigned long size, drm_device_t *dev) { void *pt; +#if __REALLY_HAVE_AGP + drm_map_t *map = NULL; + drm_map_list_t *r_list; + struct list_head *list; +#endif if (!size) { DRM_MEM_ERROR(DRM_MEM_MAPPINGS, @@ -316,12 +321,51 @@ return NULL; } +#if __REALLY_HAVE_AGP + if(!dev->agp || dev->agp->cant_use_aperture == 0) + goto standard_ioremap; + + list_for_each(list, &dev->maplist->head) { + r_list = (drm_map_list_t *)list; + map = r_list->map; + if (!map) continue; + if (map->offset <= offset && + (map->offset + map->size) >= (offset + size)) + break; + } + + if(map && map->type == _DRM_AGP) { + struct drm_agp_mem *agpmem; + + for(agpmem = dev->agp->memory; agpmem; + agpmem = agpmem->next) { + if(agpmem->bound <= offset && + (agpmem->bound + (agpmem->pages + << PAGE_SHIFT)) >= (offset + size)) + break; + } + + if(agpmem == NULL) + goto ioremap_failure; + + pt = agpmem->memory->vmptr + (offset - agpmem->bound); + goto ioremap_success; + } + +standard_ioremap: +#endif if (!(pt = ioremap(offset, size))) { +#if __REALLY_HAVE_AGP +ioremap_failure: +#endif spin_lock(&DRM(mem_lock)); ++DRM(mem_stats)[DRM_MEM_MAPPINGS].fail_count; spin_unlock(&DRM(mem_lock)); return NULL; } +#if __REALLY_HAVE_AGP +ioremap_success: +#endif spin_lock(&DRM(mem_lock)); ++DRM(mem_stats)[DRM_MEM_MAPPINGS].succeed_count; DRM(mem_stats)[DRM_MEM_MAPPINGS].bytes_allocated += size; @@ -329,7 +373,7 @@ return pt; } -void DRM(ioremapfree)(void *pt, unsigned long size) +void DRM(ioremapfree)(void *pt, unsigned long size, drm_device_t *dev) { int alloc_count; int free_count; @@ -337,7 +381,11 @@ if (!pt) DRM_MEM_ERROR(DRM_MEM_MAPPINGS, "Attempt to free NULL pointer\n"); +#if __REALLY_HAVE_AGP + else if(!dev->agp || dev->agp->cant_use_aperture == 0) +#else else +#endif iounmap(pt); spin_lock(&DRM(mem_lock)); diff -Nru a/drivers/char/drm/drm_scatter.h b/drivers/char/drm/drm_scatter.h --- a/drivers/char/drm/drm_scatter.h Mon Apr 15 15:07:56 2002 +++ b/drivers/char/drm/drm_scatter.h Mon Apr 15 15:07:56 2002 @@ -47,9 +47,11 @@ vfree( entry->virtual ); +#if defined(__alpha__) && (LINUX_VERSION_CODE >= 0x020400) DRM(free)( entry->busaddr, entry->pages * sizeof(*entry->busaddr), DRM_MEM_PAGES ); +#endif DRM(free)( entry->pagelist, entry->pages * sizeof(*entry->pagelist), DRM_MEM_PAGES ); @@ -94,6 +96,7 @@ return -ENOMEM; } +#if defined(__alpha__) && (LINUX_VERSION_CODE >= 0x020400) entry->busaddr = DRM(alloc)( pages * sizeof(*entry->busaddr), DRM_MEM_PAGES ); if ( !entry->busaddr ) { @@ -106,12 +109,15 @@ return -ENOMEM; } memset( (void *)entry->busaddr, 0, pages * sizeof(*entry->busaddr) ); +#endif entry->virtual = vmalloc_32( pages << PAGE_SHIFT ); if ( !entry->virtual ) { +#if defined(__alpha__) && (LINUX_VERSION_CODE >= 0x020400) DRM(free)( entry->busaddr, entry->pages * sizeof(*entry->busaddr), DRM_MEM_PAGES ); +#endif DRM(free)( entry->pagelist, entry->pages * sizeof(*entry->pagelist), DRM_MEM_PAGES ); diff -Nru a/drivers/char/drm/drm_vm.h b/drivers/char/drm/drm_vm.h --- a/drivers/char/drm/drm_vm.h Mon Apr 15 15:07:57 2002 +++ b/drivers/char/drm/drm_vm.h Mon Apr 15 15:07:57 2002 @@ -78,7 +78,7 @@ * Find the right map */ - if(!dev->agp->cant_use_aperture) goto vm_nopage_error; + if(!dev->agp || !dev->agp->cant_use_aperture) goto vm_nopage_error; list_for_each(list, &dev->maplist->head) { r_list = (drm_map_list_t *)list; @@ -244,7 +244,7 @@ DRM_DEBUG("mtrr_del = %d\n", retcode); } #endif - DRM(ioremapfree)(map->handle, map->size); + DRM(ioremapfree)(map->handle, map->size, dev); break; case _DRM_SHM: vfree(map->handle); @@ -491,15 +491,17 @@ switch (map->type) { case _DRM_AGP: -#if defined(__alpha__) - /* - * On Alpha we can't talk to bus dma address from the - * CPU, so for memory of type DRM_AGP, we'll deal with - * sorting out the real physical pages and mappings - * in nopage() - */ - vma->vm_ops = &DRM(vm_ops); - break; +#if __REALLY_HAVE_AGP + if(dev->agp->cant_use_aperture == 1) { + /* + * On some systems we can't talk to bus dma address from + * the CPU, so for memory of type DRM_AGP, we'll deal + * with sorting out the real physical pages and mappings + * in nopage() + */ + vma->vm_ops = &DRM(vm_ops); + goto mapswitch_out; + } #endif /* fall through to _DRM_FRAME_BUFFER... */ case _DRM_FRAME_BUFFER: @@ -511,8 +513,7 @@ pgprot_val(vma->vm_page_prot) &= ~_PAGE_PWT; } #elif defined(__ia64__) - if (map->type != _DRM_AGP) - vma->vm_page_prot = + vma->vm_page_prot = pgprot_writecombine(vma->vm_page_prot); #elif defined(__powerpc__) pgprot_val(vma->vm_page_prot) |= _PAGE_NO_CACHE | _PAGE_GUARDED; @@ -556,11 +557,14 @@ #else vma->vm_pte = (unsigned long)map; #endif - vma->vm_flags |= VM_RESERVED; + vma->vm_flags |= VM_RESERVED; break; default: return -EINVAL; /* This should never happen. */ } +#if __REALLY_HAVE_AGP +mapswitch_out: +#endif vma->vm_flags |= VM_RESERVED; /* Don't swap */ #if LINUX_VERSION_CODE < 0x020203 /* KERNEL_VERSION(2,2,3) */ diff -Nru a/drivers/char/drm/i810_dma.c b/drivers/char/drm/i810_dma.c --- a/drivers/char/drm/i810_dma.c Mon Apr 15 15:07:57 2002 +++ b/drivers/char/drm/i810_dma.c Mon Apr 15 15:07:57 2002 @@ -313,7 +313,7 @@ if(dev_priv->ring.virtual_start) { DRM(ioremapfree)((void *) dev_priv->ring.virtual_start, - dev_priv->ring.Size); + dev_priv->ring.Size, dev); } if(dev_priv->hw_status_page != 0UL) { i810_free_page(dev, dev_priv->hw_status_page); @@ -327,7 +327,8 @@ for (i = 0; i < dma->buf_count; i++) { drm_buf_t *buf = dma->buflist[ i ]; drm_i810_buf_priv_t *buf_priv = buf->dev_private; - DRM(ioremapfree)(buf_priv->kernel_virtual, buf->total); + DRM(ioremapfree)(buf_priv->kernel_virtual, + buf->total, dev); } } return 0; @@ -400,7 +401,7 @@ *buf_priv->in_use = I810_BUF_FREE; buf_priv->kernel_virtual = DRM(ioremap)(buf->bus_address, - buf->total); + buf->total, dev); } return 0; } @@ -456,7 +457,7 @@ dev_priv->ring.virtual_start = DRM(ioremap)(dev->agp->base + init->ring_start, - init->ring_size); + init->ring_size, dev); if (dev_priv->ring.virtual_start == NULL) { dev->dev_private = (void *) dev_priv; diff -Nru a/drivers/char/drm/mga_dma.c b/drivers/char/drm/mga_dma.c --- a/drivers/char/drm/mga_dma.c Mon Apr 15 15:07:57 2002 +++ b/drivers/char/drm/mga_dma.c Mon Apr 15 15:07:57 2002 @@ -557,9 +557,9 @@ (drm_mga_sarea_t *)((u8 *)dev_priv->sarea->handle + init->sarea_priv_offset); - DRM_IOREMAP( dev_priv->warp ); - DRM_IOREMAP( dev_priv->primary ); - DRM_IOREMAP( dev_priv->buffers ); + DRM_IOREMAP( dev_priv->warp, dev ); + DRM_IOREMAP( dev_priv->primary, dev ); + DRM_IOREMAP( dev_priv->buffers, dev ); if(!dev_priv->warp->handle || !dev_priv->primary->handle || @@ -647,9 +647,9 @@ if ( dev->dev_private ) { drm_mga_private_t *dev_priv = dev->dev_private; - DRM_IOREMAPFREE( dev_priv->warp ); - DRM_IOREMAPFREE( dev_priv->primary ); - DRM_IOREMAPFREE( dev_priv->buffers ); + DRM_IOREMAPFREE( dev_priv->warp, dev ); + DRM_IOREMAPFREE( dev_priv->primary, dev ); + DRM_IOREMAPFREE( dev_priv->buffers, dev ); if ( dev_priv->head != NULL ) { mga_freelist_cleanup( dev ); diff -Nru a/drivers/char/drm/r128_cce.c b/drivers/char/drm/r128_cce.c --- a/drivers/char/drm/r128_cce.c Mon Apr 15 15:07:56 2002 +++ b/drivers/char/drm/r128_cce.c Mon Apr 15 15:07:56 2002 @@ -216,7 +216,23 @@ int i; for ( i = 0 ; i < dev_priv->usec_timeout ; i++ ) { +#ifndef CONFIG_AGP_I460 if ( GET_RING_HEAD( &dev_priv->ring ) == dev_priv->ring.tail ) { +#else + /* + * XXX - this is (I think) a 460GX specific hack + * + * When doing texturing, ring.tail sometimes gets ahead of + * PM4_BUFFER_DL_WPTR by 2; consequently, the card processes + * its whole quota of instructions and *ring.head is still 2 + * short of ring.tail. Work around this for now in lieu of + * a better solution. + */ + if ( GET_RING_HEAD( &dev_priv->ring ) == dev_priv->ring.tail + || ( dev->agp->agp_info.chipset == INTEL_460GX + && ( dev_priv->ring.tail - GET_RING_HEAD( &dev_priv->ring ) ) == 2 ) ) + { +#endif int pm4stat = R128_READ( R128_PM4_STAT ); if ( ( (pm4stat & R128_PM4_FIFOCNT_MASK) >= dev_priv->cce_fifo_size ) && @@ -317,7 +333,7 @@ static void r128_cce_init_ring_buffer( drm_device_t *dev, drm_r128_private_t *dev_priv ) { - u32 ring_start; + u32 ring_start, rptr_addr; u32 tmp; DRM_DEBUG( "%s\n", __FUNCTION__ ); @@ -341,8 +357,28 @@ SET_RING_HEAD( &dev_priv->ring, 0 ); if ( !dev_priv->is_pci ) { - R128_WRITE( R128_PM4_BUFFER_DL_RPTR_ADDR, - dev_priv->ring_rptr->offset ); +#ifdef CONFIG_AGP_I460 + /* + * XXX - This is a 460GX specific hack + * + * We have to hack this right now. 460GX isn't claiming PCI + * writes from the card into the AGP aperture. Because of this, + * we have to get space outside of the aperture for RPTR_ADDR. + */ + if (dev->agp->agp_info.chipset == INTEL_460GX ) { + unsigned long alt_rh_off; + + alt_rh_off = __get_free_page(GFP_KERNEL | GFP_DMA); + atomic_inc(&virt_to_page(alt_rh_off)->count); + set_bit(PG_locked, &virt_to_page(alt_rh_off)->flags); + + dev_priv->ring.head = (__volatile__ u32 *) alt_rh_off; + SET_RING_HEAD( &dev_priv->ring, 0 ); + rptr_addr = __pa( dev_priv->ring.head ); + } else +#endif + rptr_addr = dev_priv->ring_rptr->offset; + R128_WRITE( R128_PM4_BUFFER_DL_RPTR_ADDR, rptr_addr ); } else { drm_sg_mem_t *entry = dev->sg; unsigned long tmp_ofs, page_ofs; @@ -350,11 +386,20 @@ tmp_ofs = dev_priv->ring_rptr->offset - dev->sg->handle; page_ofs = tmp_ofs >> PAGE_SHIFT; +#if defined(__alpha__) && (LINUX_VERSION_CODE >= 0x020400) R128_WRITE( R128_PM4_BUFFER_DL_RPTR_ADDR, entry->busaddr[page_ofs]); DRM_DEBUG( "ring rptr: offset=0x%08x handle=0x%08lx\n", entry->busaddr[page_ofs], entry->handle + tmp_ofs ); +#else + R128_WRITE( R128_PM4_BUFFER_DL_RPTR_ADDR, + page_to_bus(entry->pagelist[page_ofs])); + + DRM_DEBUG( "ring rptr: offset=0x%08lx handle=0x%08lx\n", + page_to_bus(entry->pagelist[page_ofs]), + entry->handle + tmp_ofs ); +#endif } /* Set watermark control */ @@ -550,9 +595,9 @@ init->sarea_priv_offset); if ( !dev_priv->is_pci ) { - DRM_IOREMAP( dev_priv->cce_ring ); - DRM_IOREMAP( dev_priv->ring_rptr ); - DRM_IOREMAP( dev_priv->buffers ); + DRM_IOREMAP( dev_priv->cce_ring, dev ); + DRM_IOREMAP( dev_priv->ring_rptr, dev ); + DRM_IOREMAP( dev_priv->buffers, dev ); if(!dev_priv->cce_ring->handle || !dev_priv->ring_rptr->handle || !dev_priv->buffers->handle) { @@ -624,9 +669,9 @@ drm_r128_private_t *dev_priv = dev->dev_private; if ( !dev_priv->is_pci ) { - DRM_IOREMAPFREE( dev_priv->cce_ring ); - DRM_IOREMAPFREE( dev_priv->ring_rptr ); - DRM_IOREMAPFREE( dev_priv->buffers ); + DRM_IOREMAPFREE( dev_priv->cce_ring, dev ); + DRM_IOREMAPFREE( dev_priv->ring_rptr, dev ); + DRM_IOREMAPFREE( dev_priv->buffers, dev ); } else { if (!DRM(ati_pcigart_cleanup)( dev, dev_priv->phys_pci_gart, @@ -634,6 +679,21 @@ DRM_ERROR( "failed to cleanup PCI GART!\n" ); } +#if defined(CONFIG_AGP_I460) && defined(__ia64__) + /* + * Free the page we grabbed for RPTR_ADDR + */ + if( !dev_priv->is_pci && dev->agp->agp_info.chipset == INTEL_460GX ) { + unsigned long alt_rh_off = + (unsigned long) dev_priv->ring.head; + + atomic_dec(&virt_to_page(alt_rh_off)->count); + clear_bit(PG_locked, &virt_to_page(alt_rh_off)->flags); + wake_up(&virt_to_page(alt_rh_off)->wait); + free_page(alt_rh_off); + } +#endif + DRM(free)( dev->dev_private, sizeof(drm_r128_private_t), DRM_MEM_DRIVER ); dev->dev_private = NULL; diff -Nru a/drivers/char/drm/radeon_cp.c b/drivers/char/drm/radeon_cp.c --- a/drivers/char/drm/radeon_cp.c Mon Apr 15 15:07:56 2002 +++ b/drivers/char/drm/radeon_cp.c Mon Apr 15 15:07:56 2002 @@ -575,7 +575,7 @@ static void radeon_cp_init_ring_buffer( drm_device_t *dev, drm_radeon_private_t *dev_priv ) { - u32 ring_start, cur_read_ptr; + u32 ring_start, cur_read_ptr, rptr_addr; u32 tmp; /* Initialize the memory controller */ @@ -612,8 +612,28 @@ dev_priv->ring.tail = cur_read_ptr; if ( !dev_priv->is_pci ) { - RADEON_WRITE( RADEON_CP_RB_RPTR_ADDR, - dev_priv->ring_rptr->offset ); +#ifdef CONFIG_AGP_I460 + /* + * XXX - This is a 460GX specific hack + * + * We have to hack this right now. 460GX isn't claiming PCI + * writes from the card into the AGP aperture. Because of this, + * we have to get space outside of the aperture for RPTR_ADDR. + */ + if( dev->agp->agp_info.chipset == INTEL_460GX ) { + unsigned long alt_rh_off; + + alt_rh_off = __get_free_page(GFP_KERNEL | GFP_DMA); + atomic_inc(&virt_to_page(alt_rh_off)->count); + set_bit(PG_locked, &virt_to_page(alt_rh_off)->flags); + + dev_priv->ring.head = (__volatile__ u32 *) alt_rh_off; + *dev_priv->ring.head = cur_read_ptr; + rptr_addr = __pa( dev_priv->ring.head ); + } else +#endif + rptr_addr = dev_priv->ring_rptr->offset; + RADEON_WRITE( RADEON_CP_RB_RPTR_ADDR, rptr_addr ); } else { drm_sg_mem_t *entry = dev->sg; unsigned long tmp_ofs, page_ofs; @@ -621,11 +641,19 @@ tmp_ofs = dev_priv->ring_rptr->offset - dev->sg->handle; page_ofs = tmp_ofs >> PAGE_SHIFT; +#if defined(__alpha__) && (LINUX_VERSION_CODE >= 0x020400) + RADEON_WRITE( RADEON_CP_RB_RPTR_ADDR, + entry->busaddr[page_ofs]); + DRM_DEBUG( "ring rptr: offset=0x%08x handle=0x%08lx\n", + entry->busaddr[page_ofs], + entry->handle + tmp_ofs ); +#else RADEON_WRITE( RADEON_CP_RB_RPTR_ADDR, entry->busaddr[page_ofs]); DRM_DEBUG( "ring rptr: offset=0x%08x handle=0x%08lx\n", entry->busaddr[page_ofs], entry->handle + tmp_ofs ); +#endif } /* Set ring buffer size */ @@ -836,9 +864,9 @@ init->sarea_priv_offset); if ( !dev_priv->is_pci ) { - DRM_IOREMAP( dev_priv->cp_ring ); - DRM_IOREMAP( dev_priv->ring_rptr ); - DRM_IOREMAP( dev_priv->buffers ); + DRM_IOREMAP( dev_priv->cp_ring, dev ); + DRM_IOREMAP( dev_priv->ring_rptr, dev ); + DRM_IOREMAP( dev_priv->buffers, dev ); if(!dev_priv->cp_ring->handle || !dev_priv->ring_rptr->handle || !dev_priv->buffers->handle) { @@ -983,9 +1011,9 @@ drm_radeon_private_t *dev_priv = dev->dev_private; if ( !dev_priv->is_pci ) { - DRM_IOREMAPFREE( dev_priv->cp_ring ); - DRM_IOREMAPFREE( dev_priv->ring_rptr ); - DRM_IOREMAPFREE( dev_priv->buffers ); + DRM_IOREMAPFREE( dev_priv->cp_ring, dev ); + DRM_IOREMAPFREE( dev_priv->ring_rptr, dev ); + DRM_IOREMAPFREE( dev_priv->buffers, dev ); } else { if (!DRM(ati_pcigart_cleanup)( dev, dev_priv->phys_pci_gart, @@ -993,8 +1021,20 @@ DRM_ERROR( "failed to cleanup PCI GART!\n" ); } - DRM(free)( dev->dev_private, sizeof(drm_radeon_private_t), - DRM_MEM_DRIVER ); +#ifdef CONFIG_AGP_I460 + /* + * Free the page we grabbed for RPTR_ADDR + */ + if( !dev_priv->is_pci && dev->agp->agp_info.chipset == INTEL_460GX ) { + unsigned long alt_rh_off = (unsigned long) dev_priv->ring.head; + + atomic_dec(&virt_to_page(alt_rh_off)->count); + clear_bit(PG_locked, &virt_to_page(alt_rh_off)->flags); + wake_up(&virt_to_page(alt_rh_off)->wait); + free_page(alt_rh_off); + } +#endif + DRM(free)( dev->dev_private, sizeof(drm_radeon_private_t), DRM_MEM_DRIVER ); dev->dev_private = NULL; } diff -Nru a/drivers/char/mem.c b/drivers/char/mem.c --- a/drivers/char/mem.c Mon Apr 15 15:07:57 2002 +++ b/drivers/char/mem.c Mon Apr 15 15:07:57 2002 @@ -518,6 +518,7 @@ default: ret = -EINVAL; } + force_successful_syscall_return(); unlock_kernel(); return ret; } diff -Nru a/drivers/ide/ide-geometry.c b/drivers/ide/ide-geometry.c --- a/drivers/ide/ide-geometry.c Mon Apr 15 15:07:56 2002 +++ b/drivers/ide/ide-geometry.c Mon Apr 15 15:07:56 2002 @@ -9,8 +9,11 @@ #include #include #include -#include #include + +#ifndef CONFIG_IA64 +# include +#endif #if defined(CONFIG_BLK_DEV_IDE) || defined(CONFIG_BLK_DEV_IDE_MODULE) diff -Nru a/drivers/media/radio/Makefile b/drivers/media/radio/Makefile --- a/drivers/media/radio/Makefile Mon Apr 15 15:07:56 2002 +++ b/drivers/media/radio/Makefile Mon Apr 15 15:07:56 2002 @@ -11,7 +11,7 @@ # Object file lists. -obj-y := +obj-y := dummy.o obj-m := obj-n := obj- := diff -Nru a/drivers/media/radio/dummy.c b/drivers/media/radio/dummy.c --- /dev/null Wed Dec 31 16:00:00 1969 +++ b/drivers/media/radio/dummy.c Mon Apr 15 15:07:57 2002 @@ -0,0 +1 @@ +/* just so the linker knows what kind of object files it's deadling with... */ diff -Nru a/drivers/media/video/Makefile b/drivers/media/video/Makefile --- a/drivers/media/video/Makefile Mon Apr 15 15:07:57 2002 +++ b/drivers/media/video/Makefile Mon Apr 15 15:07:57 2002 @@ -11,7 +11,7 @@ # Object file lists. -obj-y := +obj-y := dummy.o obj-m := obj-n := obj- := diff -Nru a/drivers/media/video/dummy.c b/drivers/media/video/dummy.c --- /dev/null Wed Dec 31 16:00:00 1969 +++ b/drivers/media/video/dummy.c Mon Apr 15 15:07:57 2002 @@ -0,0 +1 @@ +/* just so the linker knows what kind of object files it's deadling with... */ diff -Nru a/drivers/net/eepro100.c b/drivers/net/eepro100.c --- a/drivers/net/eepro100.c Mon Apr 15 15:07:57 2002 +++ b/drivers/net/eepro100.c Mon Apr 15 15:07:57 2002 @@ -25,6 +25,8 @@ Disabled FC and ER, to avoid lockups when when we get FCP interrupts. 2000 Jul 17 Goutham Rao PCI DMA API fixes, adding pci_dma_sync_single calls where neccesary + 2000 Aug 31 David Mosberger + RX_ALIGN support: enables rx DMA without causing unaligned accesses. */ static const char *version = @@ -41,14 +43,18 @@ static int txdmacount = 128; static int rxdmacount /* = 0 */; +#if defined(__ia64__) || defined(__alpha__) || defined(__sparc__) || defined(__mips__) || \ + defined(__arm__) + /* align rx buffers to 2 bytes so that IP header is aligned */ +# define RX_ALIGN +# define RxFD_ALIGNMENT __attribute__ ((aligned (2), packed)) +#else +# define RxFD_ALIGNMENT +#endif + /* Set the copy breakpoint for the copy-only-tiny-buffer Rx method. Lower values use more memory, but are faster. */ -#if defined(__alpha__) || defined(__sparc__) || defined(__mips__) || \ - defined(__arm__) -static int rx_copybreak = 1518; -#else static int rx_copybreak = 200; -#endif /* Maximum events (Rx packets, etc.) to handle at each interrupt. */ static int max_interrupt_work = 20; @@ -377,18 +383,18 @@ /* The Speedo3 Rx and Tx frame/buffer descriptors. */ struct descriptor { /* A generic descriptor. */ - s32 cmd_status; /* All command and status fields. */ + volatile s32 cmd_status; /* All command and status fields. */ u32 link; /* struct descriptor * */ unsigned char params[0]; }; /* The Speedo3 Rx and Tx buffer descriptors. */ struct RxFD { /* Receive frame descriptor. */ - s32 status; + volatile s32 status; u32 link; /* struct RxFD * */ u32 rx_buf_addr; /* void * */ u32 count; -}; +} RxFD_ALIGNMENT; /* Selected elements of the Tx/RxFD.status word. */ enum RxFD_bits { @@ -523,7 +529,9 @@ static int eepro100_init_one(struct pci_dev *pdev, const struct pci_device_id *ent); +#if defined(MODULE) || defined(CONFIG_HOTPLUG) static void eepro100_remove_one (struct pci_dev *pdev); +#endif #ifdef CONFIG_PM static int eepro100_suspend (struct pci_dev *pdev, u32 state); static int eepro100_resume (struct pci_dev *pdev); @@ -1233,6 +1241,9 @@ for (i = 0; i < RX_RING_SIZE; i++) { struct sk_buff *skb; skb = dev_alloc_skb(PKT_BUF_SZ + sizeof(struct RxFD)); +#ifdef RX_ALIGN + skb_reserve(skb, 2); /* Align IP on 16 byte boundary */ +#endif sp->rx_skbuff[i] = skb; if (skb == NULL) break; /* OK. Just initially short of Rx bufs. */ @@ -1624,6 +1635,9 @@ struct sk_buff *skb; /* Get a fresh skbuff to replace the consumed one. */ skb = dev_alloc_skb(PKT_BUF_SZ + sizeof(struct RxFD)); +#ifdef RX_ALIGN + skb_reserve(skb, 2); /* Align IP on 16 byte boundary */ +#endif sp->rx_skbuff[entry] = skb; if (skb == NULL) { sp->rx_ringp[entry] = NULL; @@ -2307,7 +2321,9 @@ name: "eepro100", id_table: eepro100_pci_tbl, probe: eepro100_init_one, +# if defined(MODULE) || defined(CONFIG_HOTPLUG) remove: __devexit_p(eepro100_remove_one), +# endif #ifdef CONFIG_PM suspend: eepro100_suspend, resume: eepro100_resume, diff -Nru a/drivers/pci/pci.ids b/drivers/pci/pci.ids --- a/drivers/pci/pci.ids Mon Apr 15 15:07:56 2002 +++ b/drivers/pci/pci.ids Mon Apr 15 15:07:56 2002 @@ -931,6 +931,9 @@ 121a NetServer SMIC Controller 121b NetServer Legacy COM Port Decoder 121c NetServer PCI COM Port Decoder + 1229 zx1 System Bus Adapter + 122a zx1 I/O Controller + 122e zx1 Local Bus Adapter 2910 E2910A 2925 E2925A 103e Solliday Engineering diff -Nru a/drivers/scsi/Config.in b/drivers/scsi/Config.in --- a/drivers/scsi/Config.in Mon Apr 15 15:07:57 2002 +++ b/drivers/scsi/Config.in Mon Apr 15 15:07:57 2002 @@ -175,6 +175,7 @@ bool ' Include loadable firmware in driver' CONFIG_SCSI_QLOGIC_FC_FIRMWARE fi dep_tristate 'Qlogic QLA 1280 SCSI support' CONFIG_SCSI_QLOGIC_1280 $CONFIG_SCSI + dep_tristate 'Qlogic QLA 2100 driver support' CONFIG_SCSI_QLOGIC_QLA2100 $CONFIG_SCSI fi if [ "$CONFIG_X86" = "y" ]; then dep_tristate 'Seagate ST-02 and Future Domain TMC-8xx SCSI support' CONFIG_SCSI_SEAGATE $CONFIG_SCSI diff -Nru a/drivers/scsi/Makefile b/drivers/scsi/Makefile --- a/drivers/scsi/Makefile Mon Apr 15 15:07:57 2002 +++ b/drivers/scsi/Makefile Mon Apr 15 15:07:57 2002 @@ -80,6 +80,7 @@ obj-$(CONFIG_SCSI_QLOGIC_ISP) += qlogicisp.o obj-$(CONFIG_SCSI_QLOGIC_FC) += qlogicfc.o obj-$(CONFIG_SCSI_QLOGIC_1280) += qla1280.o +obj-$(CONFIG_SCSI_QLOGIC_QLA2100) += qla2x00.o obj-$(CONFIG_SCSI_PAS16) += pas16.o obj-$(CONFIG_SCSI_SEAGATE) += seagate.o obj-$(CONFIG_SCSI_FD_8xx) += seagate.o diff -Nru a/drivers/scsi/ql2100_fw.h b/drivers/scsi/ql2100_fw.h --- /dev/null Wed Dec 31 16:00:00 1969 +++ b/drivers/scsi/ql2100_fw.h Mon Apr 15 15:07:57 2002 @@ -0,0 +1,4740 @@ +/************************************************************************ + * * + * --- ISP2100 Fabric Initiator/Target Firmware --- * + * with expanded LUN addressing * + * and FcTape (FCP-2) support * + * * + * * + ************************************************************************ + Copyright (C) 2000 and 2001 Qlogic Corporation + (www.qlogic.com) + + This program is distributed in the hope that it will be useful, but + WITHOUT ANY WARRANTY; without even the implied warranty of + MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU + General Public License for more details. +************************************************************************/ +/* + * Firmware Version 1.19.16 (10:36 Nov 02, 2000) + */ + +#ifdef UNIQUE_FW_NAME +unsigned short fw2100tp_version = 1*1024+19; +#else +unsigned short risc_code_version = 1*1024+19; +#endif + +#ifdef UNIQUE_FW_NAME +unsigned char fw2100tp_version_str[] = {1,19,16}; +#else +unsigned char firmware_version[] = {1,19,16}; +#endif + +#ifdef UNIQUE_FW_NAME +#define fw2100tp_VERSION_STRING "1.19.16" +#else +#define FW_VERSION_STRING "1.19.16" +#endif + +#ifdef UNIQUE_FW_NAME +unsigned short fw2100tp_addr01 = 0x1000 ; +#else +unsigned short risc_code_addr01 = 0x1000 ; +#endif + +#ifdef UNIQUE_FW_NAME +unsigned short fw2100tp_code01[] = { +#else +unsigned short risc_code01[] = { +#endif + 0x0078, 0x102d, 0x0000, 0x9260, 0x0000, 0x0001, 0x0013, 0x0010, + 0x0017, 0x2043, 0x4f50, 0x5952, 0x4947, 0x4854, 0x2031, 0x3939, + 0x3920, 0x514c, 0x4f47, 0x4943, 0x2043, 0x4f52, 0x504f, 0x5241, + 0x5449, 0x4f4e, 0x2049, 0x5350, 0x3231, 0x3030, 0x2046, 0x6972, + 0x6d77, 0x6172, 0x6520, 0x2056, 0x6572, 0x7369, 0x6f6e, 0x2030, + 0x312e, 0x3139, 0x2020, 0x2020, 0x2400, 0x2091, 0x2000, 0x20c1, + 0x0021, 0x2039, 0xffff, 0x2019, 0xaaaa, 0x2760, 0x2069, 0x7fff, + 0x20c1, 0x0020, 0x2c2c, 0x2d34, 0x2762, 0x236a, 0x2c24, 0x2d04, + 0x266a, 0x2562, 0xa406, 0x00c0, 0x1052, 0x20c1, 0x0021, 0x2c2c, + 0x2362, 0x2c04, 0x2562, 0xa306, 0x0040, 0x1052, 0x20c1, 0x0020, + 0x2039, 0x8fff, 0x20a1, 0xaa00, 0x2708, 0x810d, 0x810d, 0x810d, + 0x810d, 0xa18c, 0x000f, 0x2001, 0x000a, 0xa112, 0xa00e, 0x21a8, + 0x41a4, 0x3400, 0x8211, 0x00c0, 0x105f, 0x2708, 0x3400, 0xa102, + 0x0040, 0x106f, 0x0048, 0x106f, 0x20a8, 0xa00e, 0x41a4, 0x20a1, + 0xa260, 0x2009, 0x0000, 0x20a9, 0x07a0, 0x41a4, 0x3400, 0x20c9, + 0xa7ff, 0x2059, 0x0000, 0x2b78, 0x7823, 0x0004, 0x2089, 0x255d, + 0x2051, 0xa300, 0x2a70, 0x775e, 0xa786, 0x8fff, 0x0040, 0x1092, + 0x705b, 0xca00, 0x7057, 0xc9f1, 0x7063, 0x0200, 0x7067, 0x0200, + 0x0078, 0x109a, 0x7057, 0xba01, 0x7063, 0x0100, 0x7067, 0x0100, + 0x705b, 0xba00, 0x1078, 0x12df, 0x1078, 0x13c0, 0x1078, 0x1569, + 0x1078, 0x1ca4, 0x1078, 0x4229, 0x1078, 0x74cf, 0x1078, 0x134b, + 0x1078, 0x2a3f, 0x1078, 0x4da2, 0x1078, 0x48b2, 0x1078, 0x57df, + 0x1078, 0x21f7, 0x1078, 0x5abf, 0x1078, 0x5369, 0x1078, 0x210d, + 0x1078, 0x21d4, 0x2091, 0x3009, 0x7823, 0x0000, 0x0090, 0x10cf, + 0x7820, 0xa086, 0x0002, 0x00c0, 0x10cf, 0x7823, 0x4000, 0x0068, + 0x10c7, 0x781b, 0x0001, 0x2091, 0x5000, 0x2091, 0x4080, 0x2a70, + 0x7003, 0x0000, 0x2001, 0x017f, 0x2003, 0x0000, 0x2a70, 0x7000, + 0xa08e, 0x0003, 0x00c0, 0x10ef, 0x1078, 0x35bc, 0x1078, 0x2a67, + 0x1078, 0x4df2, 0x1078, 0x4a75, 0x2009, 0x0100, 0x2104, 0xa082, + 0x0002, 0x0048, 0x10f3, 0x1078, 0x57fb, 0x0078, 0x10d6, 0x1079, + 0x10f7, 0x0078, 0x10dc, 0x1078, 0x6fa9, 0x0078, 0x10eb, 0x1101, + 0x1102, 0x11be, 0x10ff, 0x1246, 0x12dc, 0x12dd, 0x12de, 0x1078, + 0x1328, 0x007c, 0x127e, 0x0f7e, 0x2091, 0x8000, 0x7000, 0xa086, + 0x0001, 0x00c0, 0x1198, 0x1078, 0x3a43, 0x2079, 0x0100, 0x7844, + 0xa005, 0x00c0, 0x1198, 0x2011, 0x4129, 0x1078, 0x58d4, 0x1078, + 0x1ab1, 0x780f, 0x00ff, 0x7840, 0xa084, 0xfffb, 0x7842, 0x2011, + 0x8010, 0x73c0, 0x1078, 0x3579, 0x2001, 0xffff, 0x1078, 0x5975, + 0x7238, 0xc284, 0x723a, 0x2001, 0xa30c, 0x2014, 0xc2ac, 0x2202, + 0x1078, 0x6db5, 0x2011, 0x0004, 0x1078, 0x8a59, 0x1078, 0x47ce, + 0x1078, 0x4211, 0x0040, 0x1144, 0x7083, 0x0001, 0x70bb, 0x0000, + 0x1078, 0x3bf5, 0x0078, 0x1198, 0x1078, 0x4897, 0x0040, 0x114d, + 0x7a0c, 0xc2b4, 0x7a0e, 0x0078, 0x1159, 0x1078, 0x8ddf, 0x70c8, + 0xd09c, 0x00c0, 0x1159, 0x7094, 0xa005, 0x0040, 0x1159, 0x1078, + 0x41f5, 0x70d3, 0x0000, 0x70cf, 0x0000, 0x72c8, 0x2079, 0xa351, + 0x7804, 0xd0ac, 0x0040, 0x1165, 0xc295, 0x72ca, 0xa296, 0x0004, + 0x0040, 0x1186, 0x2011, 0x0001, 0x1078, 0x8a59, 0x708f, 0x0000, + 0x7093, 0xffff, 0x7003, 0x0002, 0x0f7f, 0x1078, 0x260d, 0x2011, + 0x0005, 0x1078, 0x6ef2, 0x1078, 0x6109, 0x0c7e, 0x2061, 0x0100, + 0x60e3, 0x0008, 0x0c7f, 0x127f, 0x0078, 0x119a, 0x708f, 0x0000, + 0x7093, 0xffff, 0x7003, 0x0002, 0x2011, 0x0005, 0x1078, 0x6ef2, + 0x1078, 0x6109, 0x0c7e, 0x2061, 0x0100, 0x60e3, 0x0008, 0x0c7f, + 0x0f7f, 0x127f, 0x007c, 0x0c7e, 0x20a9, 0x0082, 0x2009, 0x007e, + 0x017e, 0x027e, 0x037e, 0x2110, 0x027e, 0x2019, 0x0029, 0x1078, + 0x71e0, 0x027f, 0x1078, 0xa190, 0x037f, 0x027f, 0x017f, 0x1078, + 0x2921, 0x8108, 0x00f0, 0x11a0, 0x0c7f, 0x706b, 0x0000, 0x706c, + 0xa084, 0x00ff, 0x706e, 0x7097, 0x0000, 0x007c, 0x127e, 0x2091, + 0x8000, 0x7000, 0xa086, 0x0002, 0x00c0, 0x1244, 0x7090, 0xa086, + 0xffff, 0x0040, 0x11d1, 0x1078, 0x260d, 0x1078, 0x6109, 0x0078, + 0x1244, 0x70c8, 0xd09c, 0x0040, 0x11fd, 0xd084, 0x0040, 0x11fd, + 0x0f7e, 0x2079, 0x0100, 0x790c, 0xc1b5, 0x790e, 0x0f7f, 0xd08c, + 0x0040, 0x11fd, 0x70cc, 0xa086, 0xffff, 0x0040, 0x11f9, 0x1078, + 0x278a, 0x1078, 0x6109, 0x70c8, 0xd094, 0x00c0, 0x1244, 0x2011, + 0x0001, 0x2019, 0x0000, 0x1078, 0x27c2, 0x1078, 0x6109, 0x0078, + 0x1244, 0x70d0, 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0x9f56, 0x9f56, 0x9f56, + 0x9f56, 0x9f56, 0x9f56, 0x9f61, 0x9f56, 0x9f56, 0x6007, 0x003b, + 0x602b, 0x0009, 0x6013, 0x2a00, 0x6003, 0x0001, 0x1078, 0x5bf8, + 0x007c, 0x0c7e, 0x2260, 0x1078, 0xa134, 0x603f, 0x0000, 0x6024, + 0xc0f4, 0xc0cc, 0x6026, 0x0c7f, 0x0d7e, 0x2268, 0xa186, 0x0007, + 0x00c0, 0x9fc2, 0x6810, 0xa005, 0x0040, 0x9f7f, 0xa080, 0x0013, + 0x2004, 0xd0fc, 0x00c0, 0x9f7f, 0x0d7f, 0x0078, 0x9f56, 0x6007, + 0x003a, 0x6003, 0x0001, 0x1078, 0x5bf8, 0x1078, 0x6109, 0x0c7e, + 0x2d60, 0x6100, 0xa186, 0x0002, 0x00c0, 0xa050, 0x6010, 0xa005, + 0x00c0, 0x9f99, 0x6000, 0xa086, 0x0007, 0x10c0, 0x1328, 0x0078, + 0xa050, 0xa08c, 0xf000, 0x00c0, 0x9fa5, 0x0078, 0x9fa5, 0x2068, + 0x6800, 0xa005, 0x00c0, 0x9f9f, 0x2d00, 0xa080, 0x0013, 0x2004, + 0xa084, 0x0003, 0xa086, 0x0002, 0x00c0, 0x9fbe, 0x6010, 0x2068, + 0x684c, 0xc0dc, 0xc0f4, 0x684e, 0x6850, 0xc0f4, 0xc0fc, 0x6852, + 0x2009, 0x0043, 0x1078, 0x98c1, 0x0078, 0xa050, 0x2009, 0x0041, + 0x0078, 0xa04a, 0xa186, 0x0005, 0x00c0, 0xa009, 0x6810, 0xa080, + 0x0013, 0x2004, 0xd0bc, 0x00c0, 0x9fd0, 0x0d7f, 0x0078, 0x9f56, + 0xd0b4, 0x0040, 0x9fd8, 0xd0fc, 0x1040, 0x1328, 0x0078, 0x9f72, + 0x6007, 0x003a, 0x6003, 0x0001, 0x1078, 0x5bf8, 0x1078, 0x6109, + 0x0c7e, 0x2d60, 0x6100, 0xa186, 0x0002, 0x0040, 0x9feb, 0xa186, + 0x0004, 0x00c0, 0xa050, 0x2071, 0xa5e1, 0x7000, 0xa086, 0x0003, + 0x00c0, 0x9ff8, 0x7004, 0xac06, 0x00c0, 0x9ff8, 0x7003, 0x0000, + 0x6810, 0xa080, 0x0013, 0x200c, 0xc1f4, 0xc1dc, 0x2102, 0x8000, + 0x200c, 0xc1f4, 0xc1fc, 0xc1bc, 0x2102, 0x2009, 0x0042, 0x0078, + 0xa04a, 0x037e, 0x0d7e, 0x0d7e, 0x1078, 0x1381, 0x037f, 0x1040, + 0x1328, 0x6837, 0x010d, 0x6803, 0x0000, 0x683b, 0x0000, 0x685b, + 0x0000, 0x6b5e, 0x6857, 0x0045, 0x2c00, 0x6862, 0x6034, 0x6872, + 0x2360, 0x6024, 0xc0dd, 0x6026, 0x6018, 0xa080, 0x0028, 0x2004, + 0xa084, 0x00ff, 0x8007, 0x6320, 0x6b4a, 0x6846, 0x684f, 0x0000, + 0x6d6a, 0x6e66, 0x686f, 0x0001, 0x1078, 0x4982, 0x2019, 0x0045, + 0x6008, 0x2068, 0x1078, 0x9a6a, 0x2d00, 0x600a, 0x601f, 0x0006, + 0x6003, 0x0007, 0x6017, 0x0000, 0x603f, 0x0000, 0x0d7f, 0x037f, + 0x0078, 0xa051, 0x603f, 0x0000, 0x6003, 0x0007, 0x1078, 0x98c1, + 0x0c7f, 0x0d7f, 0x007c, 0xa186, 0x0013, 0x00c0, 0xa05d, 0x6004, + 0xa082, 0x0085, 0x2008, 0x0079, 0xa077, 0xa186, 0x0027, 0x00c0, + 0xa070, 0x1078, 0x6010, 0x037e, 0x0d7e, 0x6010, 0x2068, 0x2019, + 0x0004, 0x1078, 0x9e70, 0x0d7f, 0x037f, 0x1078, 0x6109, 0x007c, + 0xa186, 0x0014, 0x0040, 0xa061, 0x1078, 0x7583, 0x007c, 0xa080, + 0xa07e, 0xa07e, 0xa07e, 0xa07e, 0xa07e, 0xa080, 0x1078, 0x1328, + 0x1078, 0x6010, 0x6003, 0x000c, 0x1078, 0x6109, 0x007c, 0xa182, + 0x008c, 0x00c8, 0xa091, 0xa182, 0x0085, 0x0048, 0xa091, 0x0079, + 0xa094, 0x1078, 0x7583, 0x007c, 0xa09b, 0xa09b, 0xa09b, 0xa09b, + 0xa09d, 0xa0bc, 0xa09b, 0x1078, 0x1328, 0x0d7e, 0x2c68, 0x1078, + 0x74d7, 0x0040, 0xa0b7, 0x6003, 0x0001, 0x6007, 0x001e, 0x2009, + 0xa88e, 0x210c, 0x6136, 0x2009, 0xa88f, 0x210c, 0x613a, 0x600b, + 0xffff, 0x6918, 0x611a, 0x601f, 0x0004, 0x1078, 0x5bf8, 0x2d60, + 0x1078, 0x753d, 0x0d7f, 0x007c, 0x1078, 0x753d, 0x007c, 0x0e7e, + 0x6018, 0x2070, 0x7000, 0xd0ec, 0x0e7f, 0x007c, 0x6010, 0xa080, + 0x0013, 0x200c, 0xd1ec, 0x0040, 0xa110, 0x2001, 0xa371, 0x2004, + 0xd0ec, 0x0040, 0xa110, 0x6003, 0x0002, 0x6024, 0xc0e5, 0x6026, + 0xd1ac, 0x0040, 0xa0ee, 0x0f7e, 0x2c78, 0x1078, 0x488f, 0x0f7f, + 0x0040, 0xa0ee, 0x2001, 0xa5a2, 0x2004, 0x603e, 0x2009, 0xa371, + 0x210c, 0xd1f4, 0x00c0, 0xa10e, 0x0078, 0xa100, 0x2009, 0xa371, + 0x210c, 0xd1f4, 0x0040, 0xa0fa, 0x6024, 0xc0e4, 0x6026, 0xa006, + 0x0078, 0xa110, 0x2001, 0xa5a2, 0x200c, 0x8103, 0xa100, 0x603e, + 0x6018, 0xa088, 0x002b, 0x2104, 0xa005, 0x0040, 0xa10b, 0xa088, + 0x0003, 0x0078, 0xa103, 0x2c0a, 0x600f, 0x0000, 0xa085, 0x0001, + 0x007c, 0x017e, 0x0c7e, 0x0e7e, 0x6120, 0xa2f0, 0x002b, 0x2e04, + 0x2060, 0x8cff, 0x0040, 0xa130, 0x84ff, 0x00c0, 0xa123, 0x6020, + 0xa106, 0x00c0, 0xa12b, 0x600c, 0x2072, 0x1078, 0x5a41, 0x1078, + 0x753d, 0x0078, 0xa12d, 0xacf0, 0x0003, 0x2e64, 0x0078, 0xa119, + 0x0e7f, 0x0c7f, 0x017f, 0x007c, 0x0d7e, 0x6018, 0xa0e8, 0x002b, + 0x2d04, 0xa005, 0x0040, 0xa146, 0xac06, 0x0040, 0xa144, 0x2d04, + 0xa0e8, 0x0003, 0x0078, 0xa138, 0x600c, 0x206a, 0x0d7f, 0x007c, + 0x027e, 0x037e, 0x157e, 0x2011, 0xa325, 0x2204, 0xa084, 0x00ff, + 0x2019, 0xa88e, 0x2334, 0xa636, 0x00c0, 0xa174, 0x8318, 0x2334, + 0x2204, 0xa084, 0xff00, 0xa636, 0x00c0, 0xa174, 0x2011, 0xa890, + 0x6018, 0xa098, 0x000a, 0x20a9, 0x0004, 0x1078, 0x7e55, 0x00c0, + 0xa174, 0x2011, 0xa894, 0x6018, 0xa098, 0x0006, 0x20a9, 0x0004, + 0x1078, 0x7e55, 0x00c0, 0xa174, 0x157f, 0x037f, 0x027f, 0x007c, + 0x0e7e, 0x2071, 0xa300, 0x1078, 0x41f5, 0x1078, 0x260d, 0x0e7f, + 0x007c, 0x0e7e, 0x6018, 0x2070, 0x7000, 0xd0fc, 0x0040, 0xa18a, + 0x1078, 0xa18c, 0x0e7f, 0x007c, 0x6850, 0xc0e5, 0x6852, 0x007c, + 0x0e7e, 0x0c7e, 0x077e, 0x067e, 0x057e, 0x047e, 0x027e, 0x017e, + 0x127e, 0x2091, 0x8000, 0x2029, 0xa5b4, 0x252c, 0x2021, 0xa5ba, + 0x2424, 0x2061, 0xaa00, 0x2071, 0xa300, 0x7644, 0x7060, 0xa606, + 0x0040, 0xa1e4, 0x671c, 0xa786, 0x0001, 0x0040, 0xa1b3, 0xa786, + 0x0008, 0x00c0, 0xa1da, 0x2500, 0xac06, 0x0040, 0xa1da, 0x2400, + 0xac06, 0x0040, 0xa1da, 0x1078, 0x9ee5, 0x0040, 0xa1da, 0x1078, + 0x9ef9, 0x00c0, 0xa1da, 0x6000, 0xa086, 0x0004, 0x00c0, 0xa1cc, + 0x017e, 0x1078, 0x1749, 0x017f, 0x1078, 0x8c27, 0x00c0, 0xa1d2, + 0x1078, 0x2839, 0x1078, 0x8c3b, 0x00c0, 0xa1d8, 0x1078, 0x7a05, + 0x1078, 0x8c01, 0xace0, 0x0010, 0x2001, 0xa315, 0x2004, 0xac02, + 0x00c8, 0xa1e4, 0x0078, 0xa1a3, 0x127f, 0x017f, 0x027f, 0x047f, + 0x057f, 0x067f, 0x077f, 0x0c7f, 0x0e7f, 0x007c, 0x127e, 0x007e, + 0x0e7e, 0x2091, 0x8000, 0x2071, 0xa340, 0xd5a4, 0x0040, 0xa1fb, + 0x7034, 0x8000, 0x7036, 0xd5b4, 0x0040, 0xa201, 0x7030, 0x8000, + 0x7032, 0xd5ac, 0x0040, 0xa208, 0x2071, 0xa34a, 0x1078, 0xa237, + 0x0e7f, 0x007f, 0x127f, 0x007c, 0x127e, 0x007e, 0x0e7e, 0x2091, + 0x8000, 0x2071, 0xa340, 0xd5a4, 0x0040, 0xa219, 0x7034, 0x8000, + 0x7036, 0xd5b4, 0x0040, 0xa21f, 0x7030, 0x8000, 0x7032, 0xd5ac, + 0x0040, 0xa226, 0x2071, 0xa34a, 0x1078, 0xa237, 0x0e7f, 0x007f, + 0x127f, 0x007c, 0x127e, 0x007e, 0x0e7e, 0x2091, 0x8000, 0x2071, + 0xa342, 0x1078, 0xa237, 0x0e7f, 0x007f, 0x127f, 0x007c, 0x2e04, + 0x8000, 0x2072, 0x00c8, 0xa240, 0x8e70, 0x2e04, 0x8000, 0x2072, + 0x007c, 0x0e7e, 0x2071, 0xa340, 0x1078, 0xa237, 0x0e7f, 0x007c, + 0x0e7e, 0x2071, 0xa344, 0x1078, 0xa237, 0x0e7f, 0x007c, 0x0001, + 0x0002, 0x0004, 0x0008, 0x0010, 0x0020, 0x0040, 0x0080, 0x0100, + 0x0200, 0x0400, 0x0800, 0x1000, 0x2000, 0x4000, 0x8000, 0x6286 +}; +#ifdef UNIQUE_FW_NAME +unsigned short fw2100tp_length01 = 0x9260; +#else +unsigned short risc_code_length01 = 0x9260; +#endif + diff -Nru a/drivers/scsi/ql2200_fw.h b/drivers/scsi/ql2200_fw.h --- /dev/null Wed Dec 31 16:00:00 1969 +++ b/drivers/scsi/ql2200_fw.h Mon Apr 15 15:07:57 2002 @@ -0,0 +1,5179 @@ +/************************************************************************ + * * + * --- ISP2200 Initiator/Target Firmware --- * + * with Fabric (Public Loop), Point-point, and * + * expanded LUN addressing for FCTAPE * + * * + ************************************************************************ + Copyright (C) 2000,2001 Qlogic Corporation + (www.qlogic.com) + + This program is distributed in the hope that it will be useful, but + WITHOUT ANY WARRANTY; without even the implied warranty of + MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU + General Public License for more details. + ************************************************************************/ +/* + * Firmware Version 2.01.34 (18:00 Jun 05, 2001) + */ + +#ifdef UNIQUE_FW_NAME +unsigned short fw2200tp_version = 2*1024+1; +#else +unsigned short risc_code_version = 2*1024+1; +#endif + +#ifdef UNIQUE_FW_NAME +unsigned char fw2200tp_version_str[] = {2,1,34}; +#else +unsigned char firmware_version[] = {2,1,34}; +#endif + +#ifdef UNIQUE_FW_NAME +#define fw2200tp_VERSION_STRING "2.01.34" +#else +#define FW_VERSION_STRING "2.01.34" +#endif + +#ifdef UNIQUE_FW_NAME +unsigned short fw2200tp_addr01 = 0x1000 ; +#else +unsigned short risc_code_addr01 = 0x1000 ; +#endif + +#ifdef UNIQUE_FW_NAME +unsigned short fw2200tp_code01[] = { +#else +unsigned short risc_code01[] = { +#endif + 0x0470, 0x0000, 0x0000, 0xa019, 0x0000, 0x0002, 0x0001, 0x0022, + 0x0017, 0x2043, 0x4f50, 0x5952, 0x4947, 0x4854, 0x2032, 0x3030, + 0x3120, 0x514c, 0x4f47, 0x4943, 0x2043, 0x4f52, 0x504f, 0x5241, + 0x5449, 0x4f4e, 0x2049, 0x5350, 0x3232, 0x3030, 0x2046, 0x6972, + 0x6d77, 0x6172, 0x6520, 0x2056, 0x6572, 0x7369, 0x6f6e, 0x2030, + 0x322e, 0x3031, 0x2e33, 0x3420, 0x2020, 0x2020, 0x2400, 0x20c1, + 0x0005, 0x2001, 0x017f, 0x2003, 0x0000, 0x20c9, 0xb5ff, 0x2091, + 0x2000, 0x2059, 0x0000, 0x2b78, 0x7823, 0x0004, 0x2089, 0x2843, + 0x2051, 0xb100, 0x2a70, 0x2029, 0xe800, 0x2031, 0xffff, 0x2039, + 0xe7e9, 0x2021, 0x0200, 0x0804, 0x144d, 0x20a1, 0xb019, 0xa00e, + 0x20a9, 0x07e7, 0x41a4, 0x3400, 0x755e, 0x7662, 0x775a, 0x7466, + 0x746a, 0x20a1, 0xb800, 0x7160, 0x810d, 0x810d, 0x810d, 0x810d, + 0xa18c, 0x000f, 0x2001, 0x000b, 0xa112, 0xa00e, 0x21a8, 0x41a4, + 0x3400, 0x8211, 0x1dd8, 0x7160, 0x3400, 0xa102, 0x0120, 0x0218, + 0x20a8, 0xa00e, 0x41a4, 0x3800, 0xd08c, 0x01d8, 0x2009, 0xb100, + 0x810d, 0x810d, 0x810d, 0x810d, 0xa18c, 0x000f, 0x2001, 0x0001, + 0xa112, 0x20a1, 0x1000, 0xa00e, 0x21a8, 0x41a4, 0x8211, 0x1de0, + 0x2009, 0xb100, 0x3400, 0xa102, 0x0120, 0x0218, 0x20a8, 0xa00e, + 0x41a4, 0x080c, 0x1400, 0x080c, 0x1617, 0x080c, 0x17b0, 0x080c, + 0x1ebd, 0x080c, 0x4a74, 0x080c, 0x828d, 0x080c, 0x15a0, 0x080c, + 0x2d8c, 0x080c, 0x5b8b, 0x080c, 0x51aa, 0x080c, 0x668a, 0x080c, + 0x23ea, 0x080c, 0x68d4, 0x080c, 0x6194, 0x080c, 0x22de, 0x080c, + 0x23b8, 0x2091, 0x3009, 0x7823, 0x0000, 0x1004, 0x10c5, 0x7820, + 0xa086, 0x0002, 0x1150, 0x7823, 0x4000, 0x0e04, 0x10bd, 0x781b, + 0x0001, 0x2091, 0x5000, 0x2091, 0x4080, 0x2a70, 0x7003, 0x0000, + 0x2a70, 0x7000, 0xa08e, 0x0003, 0x1158, 0x080c, 0x3d97, 0x080c, + 0x2db3, 0x080c, 0x5bd9, 0x080c, 0x5359, 0x080c, 0x66b4, 0x0c80, + 0x000b, 0x0c98, 0x10e4, 0x10e5, 0x1207, 0x10e2, 0x12d0, 0x13fd, + 0x13fe, 0x13ff, 0x080c, 0x14fa, 0x0005, 0x0126, 0x00f6, 0x2091, + 0x8000, 0x7000, 0xa086, 0x0001, 0x1904, 0x11d5, 0x080c, 0x156d, + 0x080c, 0x58d5, 0x0150, 0x080c, 0x58fb, 0x15a0, 0x2079, 0x0100, + 0x7828, 0xa085, 0x1800, 0x782a, 0x0468, 0x080c, 0x5816, 0x7000, + 0xa086, 0x0001, 0x1904, 0x11d5, 0x7088, 0xa086, 0x0028, 0x1904, + 0x11d5, 0x2001, 0x0161, 0x2003, 0x0001, 0x2079, 0x0100, 0x7827, + 0xffff, 0x7a28, 0xa295, 0x1e2f, 0x7a2a, 0x2011, 0x57ea, 0x080c, + 0x6742, 0x2011, 0x57f7, 0x080c, 0x6742, 0x2011, 0x494f, 0x080c, + 0x6742, 0x2011, 0x8030, 0x2019, 0x0000, 0x7087, 0x0000, 0x080c, + 0x1d33, 0x00e8, 0x080c, 0x4305, 0x2079, 0x0100, 0x7844, 0xa005, + 0x1904, 0x11d5, 0x2011, 0x494f, 0x080c, 0x6742, 0x2011, 0x57f7, + 0x080c, 0x6742, 0x080c, 0x1d33, 0x2001, 0xb38d, 0x2004, 0x780e, + 0x7840, 0xa084, 0xfffb, 0x7842, 0x2011, 0x8010, 0x73c8, 0x080c, + 0x3d5b, 0x7238, 0xc284, 0x723a, 0x2001, 0xb10c, 0x200c, 0xc1ac, + 0x2102, 0x080c, 0x7c1d, 0x2011, 0x0004, 0x080c, 0x9870, 0x080c, + 0x50bf, 0x080c, 0x58d5, 0x0158, 0x080c, 0x4a5d, 0x0140, 0x7087, + 0x0001, 0x70c3, 0x0000, 0x080c, 0x44a2, 0x0804, 0x11d5, 0x080c, + 0x517b, 0x0120, 0x7a0c, 0xc2b4, 0x7a0e, 0x0050, 0x080c, 0x9c16, + 0x70d0, 0xd09c, 0x1128, 0x709c, 0xa005, 0x0110, 0x080c, 0x4a3b, + 0x70db, 0x0000, 0x70d7, 0x0000, 0x72d0, 0x080c, 0x58d5, 0x1178, + 0x2011, 0x0000, 0x0016, 0x080c, 0x27c4, 0x2019, 0xb38f, 0x211a, + 0x001e, 0x704f, 0xffff, 0x7053, 0x00ef, 0x7073, 0x0000, 0x2079, + 0xb152, 0x7804, 0xd0ac, 0x0108, 0xc295, 0x72d2, 0x080c, 0x58d5, + 0x0118, 0xa296, 0x0004, 0x0508, 0x2011, 0x0001, 0x080c, 0x9870, + 0x7097, 0x0000, 0x709b, 0xffff, 0x7003, 0x0002, 0x00fe, 0x080c, + 0x2991, 0x2011, 0x0005, 0x080c, 0x7d52, 0x080c, 0x6e9e, 0x080c, + 0x58d5, 0x0148, 0x00c6, 0x2061, 0x0100, 0x0016, 0x080c, 0x27c4, + 0x61e2, 0x001e, 0x00ce, 0x012e, 0x00d0, 0x7097, 0x0000, 0x709b, + 0xffff, 0x7003, 0x0002, 0x2011, 0x0005, 0x080c, 0x7d52, 0x080c, + 0x6e9e, 0x080c, 0x58d5, 0x0148, 0x00c6, 0x2061, 0x0100, 0x0016, + 0x080c, 0x27c4, 0x61e2, 0x001e, 0x00ce, 0x00fe, 0x012e, 0x0005, + 0x00c6, 0x080c, 0x58d5, 0x1118, 0x20a9, 0x0100, 0x0010, 0x20a9, + 0x0082, 0x080c, 0x58d5, 0x1118, 0x2009, 0x0000, 0x0010, 0x2009, + 0x007e, 0x0016, 0x0026, 0x0036, 0x2110, 0x0026, 0x2019, 0x0029, + 0x080c, 0x7f67, 0x002e, 0x080c, 0xaf53, 0x003e, 0x002e, 0x001e, + 0x080c, 0x2c6e, 0x8108, 0x1f04, 0x11e9, 0x00ce, 0x706f, 0x0000, + 0x7070, 0xa084, 0x00ff, 0x7072, 0x709f, 0x0000, 0x0005, 0x0126, + 0x2091, 0x8000, 0x7000, 0xa086, 0x0002, 0x1904, 0x12ce, 0x7098, + 0xa086, 0xffff, 0x0130, 0x080c, 0x2991, 0x080c, 0x6e9e, 0x0804, + 0x12ce, 0x70d0, 0xd0ac, 0x1110, 0xd09c, 0x0540, 0xd084, 0x0530, + 0x0006, 0x0016, 0x2001, 0x0103, 0x2009, 0xb38d, 0x210c, 0x2102, + 0x001e, 0x000e, 0xd08c, 0x01d0, 0x70d4, 0xa086, 0xffff, 0x0190, + 0x080c, 0x2af0, 0x080c, 0x6e9e, 0x70d0, 0xd094, 0x1904, 0x12ce, + 0x2011, 0x0001, 0x2019, 0x0000, 0x080c, 0x2b26, 0x080c, 0x6e9e, + 0x0804, 0x12ce, 0x70d8, 0xa005, 0x1904, 0x12ce, 0x7094, 0xa005, + 0x1904, 0x12ce, 0x70d0, 0xd0a4, 0x0118, 0xd0b4, 0x0904, 0x12ce, + 0x080c, 0x517b, 0x1904, 0x12ce, 0x2001, 0xb153, 0x2004, 0xd0ac, + 0x01c8, 0x0156, 0x00c6, 0x20a9, 0x007f, 0x2009, 0x0000, 0x0016, + 0x080c, 0x4e21, 0x1118, 0x6000, 0xd0ec, 0x1138, 0x001e, 0x8108, + 0x1f04, 0x125f, 0x00ce, 0x015e, 0x0028, 0x001e, 0x00ce, 0x015e, + 0x0804, 0x12ce, 0x0006, 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0x000e, 0x0005, 0xa182, 0x0085, 0x0002, + 0x9311, 0x930f, 0x930f, 0x931d, 0x930f, 0x930f, 0x930f, 0x080c, + 0x14fa, 0x6003, 0x0001, 0x6106, 0x080c, 0x69f6, 0x0126, 0x2091, + 0x8000, 0x080c, 0x6e9e, 0x012e, 0x0005, 0x0026, 0x0056, 0x00d6, + 0x00e6, 0x2071, 0xb680, 0x7224, 0x6212, 0x7220, 0x080c, 0x985a, + 0x01a0, 0x2268, 0x6800, 0xa086, 0x0000, 0x0178, 0x6018, 0x6d18, + 0xa52e, 0x1158, 0x00c6, 0x2d60, 0x080c, 0x954f, 0x00ce, 0x0128, + 0x6803, 0x0002, 0x6007, 0x0086, 0x0010, 0x6007, 0x0087, 0x6003, + 0x0001, 0x080c, 0x69f6, 0x080c, 0x6e9e, 0x00f6, 0x2278, 0x080c, + 0x5177, 0x00fe, 0x0150, 0x6820, 0xd0ec, 0x0138, 0x00c6, 0x2260, + 0x603f, 0x0000, 0x080c, 0x9b43, 0x00ce, 0x00ee, 0x00de, 0x005e, + 0x002e, 0x0005, 0xa186, 0x0013, 0x1160, 0x6004, 0xa08a, 0x0085, + 0x0a0c, 0x14fa, 0xa08a, 0x008c, 0x1a0c, 0x14fa, 0xa082, 0x0085, + 0x0072, 0xa186, 0x0027, 0x0120, 0xa186, 0x0014, 0x190c, 0x14fa, + 0x080c, 0x6dc1, 0x080c, 0x9a2b, 0x080c, 0x6e9e, 0x0005, 0x937e, + 0x9380, 0x9380, 0x937e, 0x937e, 0x937e, 0x937e, 0x080c, 0x14fa, + 0x080c, 0x6dc1, 0x080c, 0x9a2b, 0x080c, 0x6e9e, 0x0005, 0xa186, + 0x0013, 0x1128, 0x6004, 0xa082, 0x0085, 0x2008, 0x04a8, 0xa186, + 0x0027, 0x11e8, 0x080c, 0x6dc1, 0x080c, 0x2b73, 0x00d6, 0x6010, + 0x2068, 0x080c, 0x986a, 0x0150, 0x6837, 0x0103, 0x6847, 0x0000, + 0x684b, 0x0029, 0x080c, 0x5271, 0x080c, 0x9a1f, 0x00de, 0x080c, + 0x82eb, 0x080c, 0x6e9e, 0x0005, 0x080c, 0x8331, 0x0ce0, 0xa186, + 0x0014, 0x1dd0, 0x080c, 0x6dc1, 0x00d6, 0x6010, 0x2068, 0x080c, + 0x986a, 0x0d60, 0x6837, 0x0103, 0x6847, 0x0000, 0x684b, 0x0006, + 0x6850, 0xc0ec, 0x6852, 0x08f0, 0x0002, 0x93ce, 0x93cc, 0x93cc, + 0x93cc, 0x93cc, 0x93cc, 0x93e6, 0x080c, 0x14fa, 0x080c, 0x6dc1, + 0x6030, 0xa08c, 0xff00, 0x810f, 0xa186, 0x0039, 0x0118, 0xa186, + 0x0035, 0x1118, 0x2001, 0xb3b5, 0x0010, 0x2001, 0xb3b6, 0x2004, + 0x6016, 0x6003, 0x000c, 0x080c, 0x6e9e, 0x0005, 0x080c, 0x6dc1, + 0x6030, 0xa08c, 0xff00, 0x810f, 0xa186, 0x0039, 0x0118, 0xa186, + 0x0035, 0x1118, 0x2001, 0xb3b5, 0x0010, 0x2001, 0xb3b6, 0x2004, + 0x6016, 0x6003, 0x000e, 0x080c, 0x6e9e, 0x0005, 0xa182, 0x008c, + 0x1220, 0xa182, 0x0085, 0x0208, 0x001a, 0x080c, 0x8331, 0x0005, + 0x940f, 0x940f, 0x940f, 0x940f, 0x9411, 0x9464, 0x940f, 0x080c, + 0x14fa, 0x00d6, 0x00f6, 0x2c78, 0x080c, 0x5177, 0x00fe, 0x0168, + 0x6030, 0xa08c, 0xff00, 0x810f, 0xa186, 0x0039, 0x0118, 0xa186, + 0x0035, 0x1118, 0x00de, 0x0804, 0x9477, 0x080c, 0x9a1f, 0x080c, + 0x986a, 0x01c8, 0x6010, 0x2068, 0x6837, 0x0103, 0x6850, 0xd0b4, + 0x0128, 0x684b, 0x0006, 0xc0ec, 0x6852, 0x0048, 0xd0bc, 0x0118, + 0x684b, 0x0002, 0x0020, 0x684b, 0x0005, 0x080c, 0x9ae0, 0x6847, + 0x0000, 0x080c, 0x5271, 0x2c68, 0x080c, 0x8295, 0x01c0, 0x6003, + 0x0001, 0x6007, 0x001e, 0x600b, 0xffff, 0x2009, 0xb68e, 0x210c, + 0x6136, 0x2009, 0xb68f, 0x210c, 0x613a, 0x6918, 0x611a, 0x080c, + 0x9c35, 0x6950, 0x6152, 0x601f, 0x0001, 0x080c, 0x69f6, 0x2d60, + 0x080c, 0x82eb, 0x00de, 0x0005, 0x00f6, 0x2c78, 0x080c, 0x5177, + 0x00fe, 0x0598, 0x6030, 0xa08c, 0xff00, 0x810f, 0xa186, 0x0035, + 0x0130, 0xa186, 0x001e, 0x0118, 0xa186, 0x0039, 0x1530, 0x00d6, + 0x2c68, 0x080c, 0x9d16, 0x1904, 0x94bc, 0x080c, 0x8295, 0x01d8, + 0x6106, 0x6003, 0x0001, 0x601f, 0x0001, 0x6918, 0x611a, 0x6928, + 0x612a, 0x692c, 0x612e, 0x6930, 0xa18c, 0x00ff, 0x6132, 0x6934, + 0x6136, 0x6938, 0x613a, 0x6950, 0x6152, 0x080c, 0x9c35, 0x080c, + 0x69f6, 0x080c, 0x6e9e, 0x2d60, 0x00f8, 0x00d6, 0x6010, 0x2068, + 0x080c, 0x986a, 0x01c8, 0x6837, 0x0103, 0x6850, 0xd0b4, 0x0128, + 0xc0ec, 0x6852, 0x684b, 0x0006, 0x0048, 0xd0bc, 0x0118, 0x684b, + 0x0002, 0x0020, 0x684b, 0x0005, 0x080c, 0x9ae0, 0x6847, 0x0000, + 0x080c, 0x5271, 0x080c, 0x9a1f, 0x00de, 0x080c, 0x82eb, 0x0005, + 0x0016, 0x00d6, 0x6010, 0x2068, 0x080c, 0x986a, 0x0140, 0x6837, + 0x0103, 0x684b, 0x0028, 0x6847, 0x0000, 0x080c, 0x5271, 0x00de, + 0x001e, 0xa186, 0x0013, 0x0148, 0xa186, 0x0014, 0x0130, 0xa186, + 0x0027, 0x0118, 0x080c, 0x8331, 0x0030, 0x080c, 0x6dc1, 0x080c, + 0x9a2b, 0x080c, 0x6e9e, 0x0005, 0x0056, 0x0066, 0x00d6, 0x00f6, + 0x2029, 0x0001, 0xa182, 0x0101, 0x1208, 0x0010, 0x2009, 0x0100, + 0x2130, 0x2069, 0xb698, 0x831c, 0x2300, 0xad18, 0x2009, 0x0020, + 0xaf90, 0x001d, 0x080c, 0x953f, 0xa6b2, 0x0020, 0x7804, 0xa06d, + 0x0110, 0x080c, 0x1604, 0x080c, 0x15dd, 0x0500, 0x8528, 0x6837, + 0x0110, 0x683b, 0x0000, 0x2d20, 0x7c06, 0xa68a, 0x003d, 0x1228, + 0x2608, 0xad90, 0x000f, 0x0459, 0x0088, 0xa6b2, 0x003c, 0x2009, + 0x003c, 0x2d78, 0xad90, 0x000f, 0x0411, 0x0c28, 0x00fe, 0x852f, + 0xa5ad, 0x0003, 0x7d36, 0xa5ac, 0x0000, 0x0028, 0x00fe, 0x852f, + 0xa5ad, 0x0003, 0x7d36, 0x00de, 0x006e, 0x005e, 0x0005, 0x00f6, + 0x8dff, 0x0158, 0x6804, 0xa07d, 0x0130, 0x6807, 0x0000, 0x080c, + 0x5271, 0x2f68, 0x0cb8, 0x080c, 0x5271, 0x00fe, 0x0005, 0x0156, + 0xa184, 0x0001, 0x0108, 0x8108, 0x810c, 0x21a8, 0x2304, 0x8007, + 0x2012, 0x8318, 0x8210, 0x1f04, 0x9546, 0x015e, 0x0005, 0x0066, + 0x0126, 0x2091, 0x8000, 0x2031, 0x0001, 0x601c, 0xa084, 0x000f, + 0x0083, 0x012e, 0x006e, 0x0005, 0x0126, 0x2091, 0x8000, 0x0066, + 0x2031, 0x0000, 0x601c, 0xa084, 0x000f, 0x001b, 0x006e, 0x012e, + 0x0005, 0x9586, 0x9586, 0x9581, 0x95a8, 0x9574, 0x9581, 0x95a8, + 0x9581, 0x9581, 0x9574, 0x9581, 0x080c, 0x14fa, 0x0036, 0x2019, + 0x0010, 0x080c, 0xa8af, 0x601f, 0x0006, 0x6003, 0x0007, 0x003e, + 0x0005, 0xa006, 0x0005, 0xa085, 0x0001, 0x0005, 0x00d6, 0x86ff, + 0x11d8, 0x6010, 0x2068, 0x080c, 0x986a, 0x01c0, 0x6834, 0xa086, + 0x0139, 0x1128, 0x684b, 0x0005, 0x6853, 0x0000, 0x0028, 0xa00e, + 0x2001, 0x0005, 0x080c, 0x5344, 0x080c, 0x9ae0, 0x080c, 0x5271, + 0x080c, 0x82eb, 0xa085, 0x0001, 0x00de, 0x0005, 0xa006, 0x0ce0, + 0x6000, 0xa08a, 0x0010, 0x1a0c, 0x14fa, 0x000b, 0x0005, 0x95bf, + 0x95e0, 0x95c1, 0x95ff, 0x95dd, 0x95bf, 0x9581, 0x9586, 0x9586, + 0x9581, 0x9581, 0x9581, 0x9581, 0x9581, 0x9581, 0x9581, 0x080c, + 0x14fa, 0x86ff, 0x11b8, 0x601c, 0xa086, 0x0006, 0x0198, 0x00d6, + 0x6010, 0x2068, 0x080c, 0x986a, 0x0110, 0x080c, 0x9ae0, 0x00de, + 0x6007, 0x0085, 0x6003, 0x000b, 0x601f, 0x0002, 0x080c, 0x69f6, + 0x080c, 0x6e9e, 0xa085, 0x0001, 0x0005, 0x080c, 0x190f, 0x0c08, + 0x00e6, 0x2071, 0xb3d9, 0x7024, 0xac06, 0x1110, 0x080c, 0x7c41, + 0x601c, 0xa084, 0x000f, 0xa086, 0x0006, 0x1150, 0x0086, 0x0096, + 0x2049, 0x0001, 0x2c40, 0x080c, 0x7e0d, 0x009e, 0x008e, 0x0010, + 0x080c, 0x7b3e, 0x00ee, 0x1928, 0x080c, 0x9581, 0x0005, 0x0036, + 0x00e6, 0x2071, 0xb3d9, 0x703c, 0xac06, 0x1140, 0x2019, 0x0000, + 0x080c, 0x7cc4, 0x00ee, 0x003e, 0x0804, 0x95c1, 0x080c, 0x7f2b, + 0x00ee, 0x003e, 0x1904, 0x95c1, 0x080c, 0x9581, 0x0005, 0x00c6, + 0x601c, 0xa084, 0x000f, 0x0013, 0x00ce, 0x0005, 0x9630, 0x969a, + 0x97c8, 0x963b, 0x9a2b, 0x9630, 0xa8a1, 0x82eb, 0x969a, 0x9629, + 0x9833, 0x080c, 0x14fa, 0x080c, 0x9a66, 0x1110, 0x080c, 0x8890, + 0x0005, 0x080c, 0x6dc1, 0x080c, 0x6e9e, 0x080c, 0x82eb, 0x0005, + 0x6017, 0x0001, 0x0005, 0x6010, 0xa080, 0x0019, 0x2c02, 0x6000, + 0xa08a, 0x0010, 0x1a0c, 0x14fa, 0x000b, 0x0005, 0x9656, 0x9658, + 0x9678, 0x968a, 0x9697, 0x9656, 0x9630, 0x9630, 0x9630, 0x968a, + 0x968a, 0x9656, 0x9656, 0x9656, 0x9656, 0x9694, 0x080c, 0x14fa, + 0x00e6, 0x6010, 0x2070, 0x7050, 0xc0b5, 0x7052, 0x2071, 0xb3d9, + 0x7024, 0xac06, 0x0190, 0x080c, 0x7b3e, 0x6007, 0x0085, 0x6003, + 0x000b, 0x601f, 0x0002, 0x2001, 0xb3b6, 0x2004, 0x6016, 0x080c, + 0x69f6, 0x080c, 0x6e9e, 0x00ee, 0x0005, 0x6017, 0x0001, 0x0cd8, + 0x00d6, 0x6010, 0x2068, 0x6850, 0xc0b5, 0x6852, 0x00de, 0x6007, + 0x0085, 0x6003, 0x000b, 0x601f, 0x0002, 0x080c, 0x69f6, 0x080c, + 0x6e9e, 0x0005, 0x00d6, 0x6017, 0x0001, 0x6010, 0x2068, 0x6850, + 0xc0b5, 0x6852, 0x00de, 0x0005, 0x080c, 0x82eb, 0x0005, 0x080c, + 0x190f, 0x08f0, 0x6000, 0xa08a, 0x0010, 0x1a0c, 0x14fa, 0x000b, + 0x0005, 0x96b1, 0x9638, 0x96b3, 0x96b1, 0x96b3, 0x96b3, 0x9631, + 0x96b1, 0x962b, 0x962b, 0x96b1, 0x96b1, 0x96b1, 0x96b1, 0x96b1, + 0x96b1, 0x080c, 0x14fa, 0x00d6, 0x6018, 0x2068, 0x6804, 0xa084, + 0x00ff, 0x00de, 0xa08a, 0x000c, 0x1a0c, 0x14fa, 0x000b, 0x0005, + 0x96cc, 0x976e, 0x96ce, 0x9708, 0x96ce, 0x9708, 0x96ce, 0x96d8, + 0x96cc, 0x9708, 0x96cc, 0x96f4, 0x080c, 0x14fa, 0x6004, 0xa08e, + 0x0016, 0x0588, 0xa08e, 0x0004, 0x0570, 0xa08e, 0x0002, 0x0558, + 0x6004, 0x080c, 0x9a66, 0x0904, 0x9787, 0xa08e, 0x0021, 0x0904, + 0x978b, 0xa08e, 0x0022, 0x0904, 0x9787, 0xa08e, 0x003d, 0x0904, + 0x978b, 0xa08e, 0x0039, 0x0904, 0x978f, 0xa08e, 0x0035, 0x0904, + 0x978f, 0xa08e, 0x001e, 0x0188, 0xa08e, 0x0001, 0x1150, 0x00d6, + 0x6018, 0x2068, 0x6804, 0xa084, 0x00ff, 0x00de, 0xa086, 0x0006, + 0x0110, 0x080c, 0x2b73, 0x080c, 0x8890, 0x080c, 0x9a2b, 0x0005, + 0x00c6, 0x00d6, 0x6104, 0xa186, 0x0016, 0x0904, 0x975f, 0xa186, + 0x0002, 0x1518, 0x6018, 0x2068, 0x2001, 0xb134, 0x2004, 0xd0ac, + 0x1904, 0x97b1, 0x68a0, 0xd0bc, 0x1904, 0x97b1, 0x6840, 0xa084, + 0x00ff, 0xa005, 0x0190, 0x8001, 0x6842, 0x6013, 0x0000, 0x601f, + 0x0007, 0x6017, 0x0398, 0x603f, 0x0000, 0x080c, 0x8295, 0x0128, + 0x2d00, 0x601a, 0x601f, 0x0001, 0x0450, 0x00de, 0x00ce, 0x6004, + 0xa08e, 0x0002, 0x11a8, 0x6018, 0xa080, 0x0028, 0x2004, 0xa086, + 0x007e, 0x1170, 0x2009, 0xb134, 0x2104, 0xc085, 0x200a, 0x00e6, + 0x2071, 0xb100, 0x080c, 0x4a3b, 0x00ee, 0x080c, 0x8890, 0x0020, + 0x080c, 0x8890, 0x080c, 0x2b73, 0x00e6, 0x0126, 0x2091, 0x8000, + 0x080c, 0x2b99, 0x012e, 0x00ee, 0x080c, 0x9a2b, 0x0005, 0x2001, + 0x0002, 0x080c, 0x4d75, 0x6003, 0x0001, 0x6007, 0x0002, 0x080c, + 0x6a3c, 0x080c, 0x6e9e, 0x00de, 0x00ce, 0x0c80, 0x00c6, 0x00d6, + 0x6104, 0xa186, 0x0016, 0x0d58, 0x6018, 0x2068, 0x6840, 0xa084, + 0x00ff, 0xa005, 0x0904, 0x9735, 0x8001, 0x6842, 0x6003, 0x0001, + 0x080c, 0x6a3c, 0x080c, 0x6e9e, 0x00de, 0x00ce, 0x08b8, 0x080c, + 0x8890, 0x0804, 0x9705, 0x080c, 0x88be, 0x0804, 0x9705, 0x00d6, + 0x2c68, 0x6104, 0x080c, 0x9d16, 0x00de, 0x0118, 0x080c, 0x82eb, + 0x00b8, 0x6004, 0x8007, 0x6130, 0xa18c, 0x00ff, 0xa105, 0x6032, + 0x6007, 0x0085, 0x6003, 0x000b, 0x601f, 0x0002, 0x6038, 0x600a, + 0x2001, 0xb3b6, 0x2004, 0x6016, 0x080c, 0x69f6, 0x080c, 0x6e9e, + 0x0005, 0x00de, 0x00ce, 0x080c, 0x8890, 0x080c, 0x2b73, 0x00e6, + 0x0126, 0x2091, 0x8000, 0x080c, 0x2b99, 0x6013, 0x0000, 0x601f, + 0x0007, 0x6017, 0x0398, 0x603f, 0x0000, 0x012e, 0x00ee, 0x0005, + 0x6000, 0xa08a, 0x0010, 0x1a0c, 0x14fa, 0x000b, 0x0005, 0x97df, + 0x97df, 0x97df, 0x97df, 0x97df, 0x97df, 0x97df, 0x97df, 0x97df, + 0x9630, 0x97df, 0x9638, 0x97e1, 0x9638, 0x97ee, 0x97df, 0x080c, + 0x14fa, 0x6004, 0xa086, 0x008b, 0x0148, 0x6007, 0x008b, 0x6003, + 0x000d, 0x080c, 0x69f6, 0x080c, 0x6e9e, 0x0005, 0x080c, 0x9a1f, + 0x080c, 0x986a, 0x0580, 0x080c, 0x2b73, 0x00d6, 0x080c, 0x986a, + 0x0168, 0x6010, 0x2068, 0x6837, 0x0103, 0x684b, 0x0006, 0x6847, + 0x0000, 0x6850, 0xc0ed, 0x6852, 0x080c, 0x5271, 0x2c68, 0x080c, + 0x8295, 0x0150, 0x6818, 0x601a, 0x080c, 0x9c35, 0x00c6, 0x2d60, + 0x080c, 0x9a2b, 0x00ce, 0x0008, 0x2d60, 0x00de, 0x6013, 0x0000, + 0x601f, 0x0001, 0x6007, 0x0001, 0x6003, 0x0001, 0x080c, 0x6a3c, + 0x080c, 0x6e9e, 0x0078, 0x6030, 0xa08c, 0xff00, 0x810f, 0xa186, + 0x0039, 0x0118, 0xa186, 0x0035, 0x1118, 0x080c, 0x2b73, 0x08b0, + 0x080c, 0x9a2b, 0x0005, 0x6000, 0xa08a, 0x0010, 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0x0076, 0x0056, 0x6218, 0x0086, 0x2041, 0x0000, 0x2029, 0x0001, + 0x2019, 0x0048, 0x0096, 0x2049, 0x0000, 0x080c, 0x7e0d, 0x009e, + 0x008e, 0x2039, 0x0000, 0x080c, 0x7ea7, 0x2c20, 0x080c, 0xab57, + 0x005e, 0x007e, 0x0005, 0x0026, 0x0046, 0x0056, 0x0076, 0x00c6, + 0x0156, 0x2c20, 0x20a9, 0x007f, 0x2009, 0x0000, 0x0016, 0x0036, + 0x080c, 0x4e21, 0x11c0, 0x2c10, 0x0086, 0x2041, 0x0000, 0x2828, + 0x0046, 0x2021, 0x0001, 0x080c, 0xaee2, 0x004e, 0x0096, 0x2049, + 0x0000, 0x080c, 0x7e0d, 0x009e, 0x008e, 0x2039, 0x0000, 0x080c, + 0x7ea7, 0x080c, 0xab57, 0x003e, 0x001e, 0x8108, 0x1f04, 0xac36, + 0x015e, 0x00ce, 0x007e, 0x005e, 0x004e, 0x002e, 0x0005, 0x0016, + 0x00f6, 0x3800, 0xd08c, 0x0130, 0xad82, 0x1000, 0x02b0, 0xad82, + 0xb100, 0x0230, 0xad82, 0xe800, 0x0280, 0xad82, 0xffff, 0x1268, + 0x6800, 0xa07d, 0x0138, 0x6803, 0x0000, 0x6b52, 0x080c, 0x5271, + 0x2f68, 0x0cb0, 0x6b52, 0x080c, 0x5271, 0x00fe, 0x001e, 0x0005, + 0x00e6, 0x0046, 0x0036, 0x2061, 0xb800, 0xa005, 0x1138, 0x2071, + 0xb100, 0x7444, 0x7064, 0x8001, 0xa402, 0x12d8, 0x2100, 0xac06, + 0x0168, 0x6000, 0xa086, 0x0000, 0x0148, 0x6008, 0xa206, 0x1130, + 0x6018, 0xa1a0, 0x0006, 0x2424, 0xa406, 0x0140, 0xace0, 0x0018, + 0x2001, 0xb116, 0x2004, 0xac02, 0x1220, 0x0c40, 0xa085, 0x0001, + 0x0008, 0xa006, 0x003e, 0x004e, 0x00ee, 0x0005, 0x00d6, 0x0006, + 0x080c, 0x15dd, 0x000e, 0x090c, 0x14fa, 0x6837, 0x010d, 0x685e, + 0x0026, 0x2010, 0x080c, 0x985a, 0x2001, 0x0000, 0x0120, 0x2200, + 0xa080, 0x0014, 0x2004, 0x002e, 0x684a, 0x6956, 0x6c46, 0x684f, + 0x0000, 0x2001, 0xb3bd, 0x2004, 0x6852, 0xa006, 0x68b2, 0x6802, + 0x683a, 0x685a, 0x080c, 0x5271, 0x00de, 0x0005, 0x6700, 0xa786, + 0x0000, 0x0158, 0xa786, 0x0001, 0x0140, 0xa786, 0x000a, 0x0128, + 0xa786, 0x0009, 0x0110, 0xa085, 0x0001, 0x0005, 0x00e6, 0x6018, + 0x2070, 0x70a0, 0xa206, 0x00ee, 0x0005, 0x0016, 0x6004, 0xa08e, + 0x001e, 0x11a0, 0x8007, 0x6130, 0xa18c, 0x00ff, 0xa105, 0x6032, + 0x6007, 0x0085, 0x6003, 0x000b, 0x601f, 0x0005, 0x2001, 0xb3b6, + 0x2004, 0x6016, 0x080c, 0x69f6, 0x080c, 0x6e9e, 0x001e, 0x0005, + 0xe000, 0xe000, 0x0005, 0x6020, 0xd0e4, 0x0158, 0xd0cc, 0x0118, + 0x080c, 0x9b43, 0x0030, 0x080c, 0xaf00, 0x080c, 0x6866, 0x080c, + 0x82eb, 0x0005, 0xa280, 0x0007, 0x2004, 0xa084, 0x000f, 0x0002, + 0xad29, 0xad29, 0xad29, 0xad2e, 0xad29, 0xad2b, 0xad2b, 0xad29, + 0xad2b, 0xa006, 0x0005, 0x00c6, 0x2260, 0x00ce, 0xa085, 0x0001, + 0x0005, 0xa280, 0x0007, 0x2004, 0xa084, 0x000f, 0x0002, 0xad40, + 0xad40, 0xad40, 0xad40, 0xad40, 0xad40, 0xad4b, 0xad40, 0xad40, + 0x6007, 0x003b, 0x602b, 0x0009, 0x6013, 0x2a00, 0x6003, 0x0001, + 0x080c, 0x69f6, 0x0005, 0x00c6, 0x2260, 0x080c, 0xaf00, 0x603f, + 0x0000, 0x6020, 0xc0f4, 0xc0cc, 0x6022, 0x6037, 0x0000, 0x00ce, + 0x00d6, 0x2268, 0xa186, 0x0007, 0x1904, 0xada6, 0x6810, 0xa005, + 0x0138, 0xa080, 0x0013, 0x2004, 0xd0fc, 0x1110, 0x00de, 0x08c0, + 0x6007, 0x003a, 0x6003, 0x0001, 0x080c, 0x69f6, 0x080c, 0x6e9e, + 0x00c6, 0x2d60, 0x6100, 0xa186, 0x0002, 0x1904, 0xae2f, 0x6010, + 0xa005, 0x1138, 0x6000, 0xa086, 0x0007, 0x190c, 0x14fa, 0x0804, + 0xae2f, 0xa08c, 0xf000, 0x1130, 0x0028, 0x2068, 0x6800, 0xa005, + 0x1de0, 0x2d00, 0xa080, 0x0013, 0x2004, 0xa084, 0x0003, 0xa086, + 0x0002, 0x1180, 0x6010, 0x2068, 0x684c, 0xc0dc, 0xc0f4, 0x684e, + 0x6850, 0xc0f4, 0xc0fc, 0x6852, 0x2009, 0x0043, 0x080c, 0xa727, + 0x0804, 0xae2f, 0x2009, 0x0041, 0x0804, 0xae29, 0xa186, 0x0005, + 0x15f0, 0x6810, 0xa080, 0x0013, 0x2004, 0xd0bc, 0x1118, 0x00de, + 0x0804, 0xad40, 0xd0b4, 0x0128, 0xd0fc, 0x090c, 0x14fa, 0x0804, + 0xad5e, 0x6007, 0x003a, 0x6003, 0x0001, 0x080c, 0x69f6, 0x080c, + 0x6e9e, 0x00c6, 0x2d60, 0x6100, 0xa186, 0x0002, 0x0120, 0xa186, + 0x0004, 0x1904, 0xae2f, 0x2071, 0xb419, 0x7000, 0xa086, 0x0003, + 0x1128, 0x7004, 0xac06, 0x1110, 0x7003, 0x0000, 0x6810, 0xa080, + 0x0013, 0x200c, 0xc1f4, 0xc1dc, 0x2102, 0x8000, 0x200c, 0xc1f4, + 0xc1fc, 0xc1bc, 0x2102, 0x2009, 0x0042, 0x0804, 0xae29, 0x0036, + 0x00d6, 0x00d6, 0x080c, 0x15dd, 0x003e, 0x090c, 0x14fa, 0x6837, + 0x010d, 0x6803, 0x0000, 0x683b, 0x0000, 0x685b, 0x0000, 0x6b5e, + 0x6857, 0x0045, 0x2c00, 0x6862, 0x6034, 0x6872, 0x2360, 0x6020, + 0xc0dd, 0x6022, 0x6018, 0xa080, 0x0028, 0x2004, 0xa084, 0x00ff, + 0x8007, 0x6350, 0x6b4a, 0x6846, 0x684f, 0x0000, 0x6853, 0x0000, + 0x6d6a, 0x6e66, 0x686f, 0x0001, 0x080c, 0x5271, 0x2019, 0x0045, + 0x6008, 0x2068, 0x080c, 0xa8af, 0x2d00, 0x600a, 0x601f, 0x0006, + 0x6003, 0x0007, 0x6017, 0x0000, 0x603f, 0x0000, 0x00de, 0x003e, + 0x0038, 0x603f, 0x0000, 0x6003, 0x0007, 0x080c, 0xa727, 0x00ce, + 0x00de, 0x0005, 0xa186, 0x0013, 0x1128, 0x6004, 0xa082, 0x0085, + 0x2008, 0x00c2, 0xa186, 0x0027, 0x1178, 0x080c, 0x6dc1, 0x0036, + 0x00d6, 0x6010, 0x2068, 0x2019, 0x0004, 0x080c, 0xac5f, 0x00de, + 0x003e, 0x080c, 0x6e9e, 0x0005, 0xa186, 0x0014, 0x0d70, 0x080c, + 0x8331, 0x0005, 0xae5b, 0xae59, 0xae59, 0xae59, 0xae59, 0xae59, + 0xae5b, 0x080c, 0x14fa, 0x080c, 0x6dc1, 0x6003, 0x000c, 0x080c, + 0x6e9e, 0x0005, 0xa182, 0x008c, 0x1220, 0xa182, 0x0085, 0x0208, + 0x001a, 0x080c, 0x8331, 0x0005, 0xae73, 0xae73, 0xae73, 0xae73, + 0xae75, 0xae93, 0xae73, 0x080c, 0x14fa, 0x00d6, 0x2c68, 0x080c, + 0x8295, 0x01a0, 0x6003, 0x0001, 0x6007, 0x001e, 0x2009, 0xb68e, + 0x210c, 0x6136, 0x2009, 0xb68f, 0x210c, 0x613a, 0x600b, 0xffff, + 0x6918, 0x611a, 0x601f, 0x0004, 0x080c, 0x69f6, 0x2d60, 0x080c, + 0x82eb, 0x00de, 0x0005, 0x080c, 0x82eb, 0x0005, 0x00e6, 0x6018, + 0x2070, 0x7000, 0xd0ec, 0x00ee, 0x0005, 0x6010, 0xa08c, 0xf000, + 0x0904, 0xaee1, 0xa080, 0x0013, 0x200c, 0xd1ec, 0x05d0, 0x2001, + 0xb172, 0x2004, 0xd0ec, 0x05a8, 0x6003, 0x0002, 0x6020, 0xc0e5, + 0x6022, 0xd1ac, 0x0180, 0x00f6, 0x2c78, 0x080c, 0x5173, 0x00fe, + 0x0150, 0x2001, 0xb3b7, 0x2004, 0x603e, 0x2009, 0xb172, 0x210c, + 0xd1f4, 0x11e8, 0x0080, 0x2009, 0xb172, 0x210c, 0xd1f4, 0x0128, + 0x6020, 0xc0e4, 0x6022, 0xa006, 0x00a0, 0x2001, 0xb3b7, 0x200c, + 0x8103, 0xa100, 0x603e, 0x6018, 0xa088, 0x002b, 0x2104, 0xa005, + 0x0118, 0xa088, 0x0003, 0x0cd0, 0x2c0a, 0x600f, 0x0000, 0xa085, + 0x0001, 0x0005, 0x0016, 0x00c6, 0x00e6, 0x6150, 0xa2f0, 0x002b, + 0x2e04, 0x2060, 0x8cff, 0x0180, 0x84ff, 0x1118, 0x6050, 0xa106, + 0x1138, 0x600c, 0x2072, 0x080c, 0x6866, 0x080c, 0x82eb, 0x0010, + 0xacf0, 0x0003, 0x2e64, 0x0c70, 0x00ee, 0x00ce, 0x001e, 0x0005, + 0x00d6, 0x6018, 0xa0e8, 0x002b, 0x2d04, 0xa005, 0x0140, 0xac06, + 0x0120, 0x2d04, 0xa0e8, 0x0003, 0x0cb8, 0x600c, 0x206a, 0x00de, + 0x0005, 0x0026, 0x0036, 0x0156, 0x2011, 0xb127, 0x2204, 0xa084, + 0x00ff, 0x2019, 0xb68e, 0x2334, 0xa636, 0x11d8, 0x8318, 0x2334, + 0x2204, 0xa084, 0xff00, 0xa636, 0x11a0, 0x2011, 0xb690, 0x6018, + 0xa098, 0x000a, 0x20a9, 0x0004, 0x080c, 0x8d2b, 0x1150, 0x2011, + 0xb694, 0x6018, 0xa098, 0x0006, 0x20a9, 0x0004, 0x080c, 0x8d2b, + 0x1100, 0x015e, 0x003e, 0x002e, 0x0005, 0x00e6, 0x2071, 0xb100, + 0x080c, 0x4a3b, 0x080c, 0x2991, 0x00ee, 0x0005, 0x00e6, 0x6018, + 0x2070, 0x7000, 0xd0fc, 0x0108, 0x0011, 0x00ee, 0x0005, 0x6850, + 0xc0e5, 0x6852, 0x0005, 0x00e6, 0x00c6, 0x0076, 0x0066, 0x0056, + 0x0046, 0x0026, 0x0016, 0x0126, 0x2091, 0x8000, 0x2029, 0xb3e2, + 0x252c, 0x2021, 0xb3e8, 0x2424, 0x2061, 0xb800, 0x2071, 0xb100, + 0x7644, 0x7064, 0xa606, 0x0578, 0x671c, 0xa786, 0x0001, 0x0118, + 0xa786, 0x0008, 0x1500, 0x2500, 0xac06, 0x01e8, 0x2400, 0xac06, + 0x01d0, 0x080c, 0xacd6, 0x01b8, 0x080c, 0xace6, 0x11a0, 0x6000, + 0xa086, 0x0004, 0x1120, 0x0016, 0x080c, 0x190f, 0x001e, 0x080c, + 0x9a55, 0x1110, 0x080c, 0x2b99, 0x080c, 0x9a66, 0x1110, 0x080c, + 0x8890, 0x080c, 0x9a2b, 0xace0, 0x0018, 0x2001, 0xb116, 0x2004, + 0xac02, 0x1208, 0x0858, 0x012e, 0x001e, 0x002e, 0x004e, 0x005e, + 0x006e, 0x007e, 0x00ce, 0x00ee, 0x0005, 0x0126, 0x0006, 0x00e6, + 0x2091, 0x8000, 0x2071, 0xb140, 0xd5a4, 0x0118, 0x7034, 0x8000, + 0x7036, 0xd5b4, 0x0118, 0x7030, 0x8000, 0x7032, 0xd5ac, 0x0118, + 0x2071, 0xb14a, 0x0451, 0x00ee, 0x000e, 0x012e, 0x0005, 0x0126, + 0x0006, 0x00e6, 0x2091, 0x8000, 0x2071, 0xb140, 0xd5a4, 0x0118, + 0x7034, 0x8000, 0x7036, 0xd5b4, 0x0118, 0x7030, 0x8000, 0x7032, + 0xd5ac, 0x0118, 0x2071, 0xb14a, 0x0081, 0x00ee, 0x000e, 0x012e, + 0x0005, 0x0126, 0x0006, 0x00e6, 0x2091, 0x8000, 0x2071, 0xb142, + 0x0021, 0x00ee, 0x000e, 0x012e, 0x0005, 0x2e04, 0x8000, 0x2072, + 0x1220, 0x8e70, 0x2e04, 0x8000, 0x2072, 0x0005, 0x00e6, 0x2071, + 0xb140, 0x0c99, 0x00ee, 0x0005, 0x00e6, 0x2071, 0xb144, 0x0c69, + 0x00ee, 0x0005, 0x0126, 0x0006, 0x00e6, 0x2091, 0x8000, 0x2071, + 0xb140, 0x7044, 0x8000, 0x7046, 0x00ee, 0x000e, 0x012e, 0x0005, + 0x0001, 0x0002, 0x0004, 0x0008, 0x0010, 0x0020, 0x0040, 0x0080, + 0x0100, 0x0200, 0x0400, 0x0800, 0x1000, 0x2000, 0x4000, 0x8000, + 0x5790 +}; +#ifdef UNIQUE_FW_NAME +unsigned short fw2200tp_length01 = 0xa019; +#else +unsigned short risc_code_length01 = 0xa019; +#endif + diff -Nru a/drivers/scsi/ql2300_fw.h b/drivers/scsi/ql2300_fw.h --- /dev/null Wed Dec 31 16:00:00 1969 +++ b/drivers/scsi/ql2300_fw.h Mon Apr 15 15:07:57 2002 @@ -0,0 +1,5486 @@ +/************************************************************************ + * * + * --- ISP2300 Initiator/Target Firmware --- * + * with Fabric (Public Loop), Point-point, and * + * expanded LUN addressing for FCTAPE * + * * + ************************************************************************ + Copyright (C) 2000 and 2001 Qlogic Corporation + (www.qlogic.com) + + This program is distributed in the hope that it will be useful, but + WITHOUT ANY WARRANTY; without even the implied warranty of + MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU + General Public License for more details. + ************************************************************************/ +/* + * Firmware Version 3.00.24 (14:18 Jun 05, 2001) + */ + +#ifdef UNIQUE_FW_NAME +unsigned short fw2300tp_version = 3*1024+0; +#else +unsigned short risc_code_version = 3*1024+0; +#endif + +#ifdef UNIQUE_FW_NAME +unsigned char fw2300tp_version_str[] = {3, 0,24}; +#else +unsigned char firmware_version[] = {3, 0,24}; +#endif + +#ifdef UNIQUE_FW_NAME +#define fw2300tp_VERSION_STRING "3.00.24" +#else +#define FW_VERSION_STRING "3.00.24" +#endif + +#ifdef UNIQUE_FW_NAME +unsigned short fw2300tp_addr01 = 0x0800 ; +#else +unsigned short risc_code_addr01 = 0x0800 ; +#endif + +#ifdef UNIQUE_FW_NAME +unsigned short fw2300tp_code01[] = { +#else +unsigned short risc_code01[] = { +#endif + 0x0470, 0x0000, 0x0000, 0xa9b8, 0x0000, 0x0003, 0x0000, 0x0018, + 0x0017, 0x2043, 0x4f50, 0x5952, 0x4947, 0x4854, 0x2032, 0x3030, + 0x3120, 0x514c, 0x4f47, 0x4943, 0x2043, 0x4f52, 0x504f, 0x5241, + 0x5449, 0x4f4e, 0x2049, 0x5350, 0x3233, 0x3030, 0x2046, 0x6972, + 0x6d77, 0x6172, 0x6520, 0x2056, 0x6572, 0x7369, 0x6f6e, 0x2030, + 0x332e, 0x3030, 0x2e32, 0x3420, 0x2020, 0x2020, 0x2400, 0x20a9, + 0x000f, 0x2001, 0x0000, 0x400f, 0x2091, 0x2200, 0x20a9, 0x000f, + 0x2001, 0x0000, 0x400f, 0x2091, 0x2400, 0x20a9, 0x000f, 0x2001, + 0x0000, 0x400f, 0x2091, 0x2600, 0x20a9, 0x000f, 0x2001, 0x0000, + 0x400f, 0x2091, 0x2800, 0x20a9, 0x000f, 0x2001, 0x0000, 0x400f, + 0x2091, 0x2a00, 0x20a9, 0x000f, 0x2001, 0x0000, 0x400f, 0x2091, + 0x2c00, 0x20a9, 0x000f, 0x2001, 0x0000, 0x400f, 0x2091, 0x2e00, + 0x20a9, 0x000f, 0x2001, 0x0000, 0x400f, 0x2091, 0x2000, 0x2001, + 0x0000, 0x20c1, 0x0004, 0x2001, 0x017f, 0x2003, 0x0000, 0x20c9, + 0x14ff, 0x2059, 0x0000, 0x2b78, 0x7883, 0x0004, 0x2089, 0x2102, + 0x2051, 0x1100, 0x2a70, 0x20e1, 0x0001, 0x20e9, 0x0001, 0x2029, + 0x45c0, 0x2031, 0xffff, 0x2039, 0x45a9, 0x2021, 0x0200, 0x20e9, + 0x0001, 0x20a1, 0x1000, 0x900e, 0x20a9, 0x05c0, 0x4104, 0x755e, + 0x7662, 0x775a, 0x7466, 0x746a, 0x20a1, 0x15c0, 0x7160, 0x810d, + 0x810d, 0x810d, 0x810d, 0x918c, 0x000f, 0x2001, 0x0001, 0x9112, + 0x900e, 0x21a8, 0x4104, 0x8211, 0x1de0, 0x7160, 0x3400, 0x8001, + 0x9102, 0x0120, 0x0218, 0x20a8, 0x900e, 0x4104, 0x2009, 0x1100, + 0x810d, 0x810d, 0x810d, 0x810d, 0x810d, 0x918c, 0x001f, 0x2001, + 0x0001, 0x9112, 0x20e9, 0x0001, 0x20a1, 0x0800, 0x900e, 0x20a9, + 0x0800, 0x4104, 0x8211, 0x1dd8, 0x2009, 0x1100, 0x3400, 0x9102, + 0x0120, 0x0218, 0x20a8, 0x900e, 0x4104, 0x080c, 0x0e42, 0x080c, + 0x0f8f, 0x080c, 0x13a2, 0x080c, 0x0c8a, 0x080c, 0x4721, 0x080c, + 0x7ebf, 0x080c, 0x0dae, 0x080c, 0x27c1, 0x080c, 0x5a05, 0x080c, + 0x4e0f, 0x080c, 0x64ba, 0x080c, 0x1956, 0x080c, 0x6721, 0x080c, + 0x5fe8, 0x080c, 0x1768, 0x080c, 0x18cb, 0x080c, 0x194b, 0x2091, + 0x3009, 0x7883, 0x0000, 0x1004, 0x0905, 0x7880, 0x9086, 0x0002, + 0x1160, 0x7883, 0x4000, 0x7837, 0x4000, 0x7833, 0x0010, 0x0e04, + 0x08ff, 0x2091, 0x5000, 0x2091, 0x4080, 0x2a70, 0x7003, 0x0000, + 0x2a70, 0x7000, 0x908e, 0x0003, 0x1168, 0x080c, 0x3816, 0x080c, + 0x27e5, 0x080c, 0x5a60, 0x080c, 0x52b6, 0x080c, 0x64e0, 0x080c, + 0x20a5, 0x0c70, 0x000b, 0x0c88, 0x0926, 0x0927, 0x0a62, 0x0924, + 0x0b34, 0x0c87, 0x0c88, 0x0c89, 0x080c, 0x0cf1, 0x0005, 0x0126, + 0x00f6, 0x2091, 0x8000, 0x7000, 0x9086, 0x0001, 0x1904, 0x0a30, + 0x7034, 0xd0b4, 0x1130, 0x0026, 0x2011, 0x0080, 0x080c, 0x0d63, + 0x002e, 0x080c, 0x5745, 0x0150, 0x080c, 0x576b, 0x1570, 0x2079, + 0x0100, 0x7828, 0x9085, 0x1800, 0x782a, 0x0438, 0x080c, 0x5682, + 0x7000, 0x9086, 0x0001, 0x1904, 0x0a30, 0x7088, 0x9086, 0x0028, + 0x1904, 0x0a30, 0x2001, 0x0161, 0x2003, 0x0001, 0x2079, 0x0100, + 0x7827, 0xffff, 0x7a28, 0x9295, 0x1e2f, 0x7a2a, 0x2011, 0x5654, + 0x080c, 0x655b, 0x2011, 0x4586, 0x080c, 0x655b, 0x2011, 0x8030, + 0x2019, 0x0000, 0x7087, 0x0000, 0x00d8, 0x080c, 0x3e5a, 0x2079, + 0x0100, 0x7844, 0x9005, 0x1904, 0x0a30, 0x2011, 0x4586, 0x080c, + 0x655b, 0x2001, 0x0265, 0x2001, 0x0205, 0x2003, 0x0000, 0x780f, + 0x006b, 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0x190c, 0x8dfb, 0x6878, 0x787a, + 0x6890, 0x7892, 0x688c, 0x788e, 0x9d90, 0x0019, 0x9f98, 0x0019, + 0x2009, 0x0020, 0x0156, 0x21a8, 0x2304, 0x2012, 0x8318, 0x8210, + 0x1f04, 0x8f54, 0x015e, 0x00fe, 0x000e, 0x6882, 0x000e, 0x687e, + 0x001e, 0x6874, 0x0006, 0x2168, 0x080c, 0x0e06, 0x001e, 0x0804, + 0x8fd3, 0x0016, 0x00f6, 0x2178, 0x7974, 0x9184, 0x00ff, 0x90b6, + 0x0002, 0x01e0, 0x9086, 0x0028, 0x1128, 0x687b, 0x001c, 0x787b, + 0x001c, 0x00e0, 0xd1dc, 0x0158, 0x687b, 0x0015, 0x787b, 0x0015, + 0x080c, 0x9a64, 0x0118, 0x7974, 0xc1dc, 0x7976, 0x0078, 0xd1d4, + 0x0128, 0x687b, 0x0007, 0x787b, 0x0007, 0x0040, 0x687c, 0xd0ac, + 0x0128, 0x6834, 0x6938, 0x9115, 0x190c, 0x8dfb, 0x6890, 0x7892, + 0x688c, 0x788e, 0x687c, 0x787e, 0x00fe, 0x080c, 0x0e06, 0x00de, + 0x6974, 0x0016, 0x080c, 0x926a, 0x001e, 0x0468, 0x6867, 0x0103, + 0x6974, 0x9184, 0x00ff, 0x90b6, 0x0002, 0x01b0, 0x9086, 0x0028, + 0x1118, 0x687b, 0x001c, 0x00d0, 0xd1dc, 0x0148, 0x687b, 0x0015, + 0x080c, 0x9a64, 0x0118, 0x6974, 0xc1dc, 0x6976, 0x0078, 0xd1d4, + 0x0118, 0x687b, 0x0007, 0x0050, 0x687b, 0x0000, 0x687c, 0xd0ac, + 0x0128, 0x6834, 0x6938, 0x9115, 0x190c, 0x8dfb, 0x6974, 0x0016, + 0x080c, 0x4ed6, 0x001e, 0xd1e4, 0x1120, 0x080c, 0x7f1e, 0x00de, + 0x0005, 0x080c, 0x987a, 0x0cd8, 0x0005, 0x080c, 0x6c56, 0x0010, + 0x080c, 0x6cf2, 0x080c, 0x95d2, 0x01c0, 0x00d6, 0x6114, 0x2168, + 0x6867, 0x0103, 0x2009, 0x110c, 0x210c, 0xd18c, 0x11c0, 0xd184, + 0x1198, 0x6108, 0x697a, 0x918e, 0x0029, 0x1110, 0x080c, 0xad5f, + 0x6877, 0x0000, 0x080c, 0x50a5, 0x00de, 0x080c, 0x7f1e, 0x080c, + 0x6d42, 0x080c, 0x6e10, 0x0005, 0x687b, 0x0004, 0x0c88, 0x687b, + 0x0004, 0x0c70, 0x9182, 0x0040, 0x0002, 0x9020, 0x9020, 0x9020, + 0x9020, 0x9020, 0x9022, 0x9020, 0x9025, 0x9020, 0x9020, 0x9020, + 0x9020, 0x9020, 0x9020, 0x9020, 0x9020, 0x9020, 0x9020, 0x9020, + 0x080c, 0x0cf1, 0x080c, 0x7f1e, 0x0005, 0x0006, 0x0026, 0x9016, + 0x080c, 0x119a, 0x002e, 0x000e, 0x0005, 0x9182, 0x0085, 0x0002, + 0x903d, 0x903b, 0x903b, 0x9049, 0x903b, 0x903b, 0x903b, 0x903b, + 0x903b, 0x903b, 0x903b, 0x080c, 0x0cf1, 0x6003, 0x0001, 0x6106, + 0x080c, 0x6886, 0x0126, 0x2091, 0x8000, 0x080c, 0x6d42, 0x012e, + 0x0005, 0x0026, 0x0056, 0x00d6, 0x00e6, 0x2071, 0x0260, 0x7224, + 0x6216, 0x7220, 0x080c, 0x95c2, 0x01a0, 0x2268, 0x6800, 0x9086, + 0x0000, 0x0178, 0x6010, 0x6d10, 0x952e, 0x1158, 0x00c6, 0x2d60, + 0x080c, 0x9297, 0x00ce, 0x0128, 0x6803, 0x0002, 0x6007, 0x0086, + 0x0010, 0x6007, 0x0087, 0x6003, 0x0001, 0x080c, 0x6886, 0x080c, + 0x6d42, 0x9280, 0x0004, 0x2004, 0xd0bc, 0x0150, 0x6824, 0xd0ec, + 0x0138, 0x00c6, 0x2260, 0x6043, 0x0000, 0x080c, 0x98aa, 0x00ce, + 0x00ee, 0x00de, 0x005e, 0x002e, 0x0005, 0x9186, 0x0013, 0x1160, + 0x6004, 0x908a, 0x0085, 0x0a0c, 0x0cf1, 0x908a, 0x0090, 0x1a0c, + 0x0cf1, 0x9082, 0x0085, 0x0072, 0x9186, 0x0027, 0x0120, 0x9186, + 0x0014, 0x190c, 0x0cf1, 0x080c, 0x6c56, 0x080c, 0x97a3, 0x080c, + 0x6d42, 0x0005, 0x90ad, 0x90af, 0x90af, 0x90ad, 0x90ad, 0x90ad, + 0x90ad, 0x90ad, 0x90ad, 0x90ad, 0x90ad, 0x080c, 0x0cf1, 0x080c, + 0x6c56, 0x080c, 0x97a3, 0x080c, 0x6d42, 0x0005, 0x9186, 0x0013, + 0x1128, 0x6004, 0x9082, 0x0085, 0x2008, 0x04a8, 0x9186, 0x0027, + 0x11e8, 0x080c, 0x6c56, 0x080c, 0x25ad, 0x00d6, 0x6014, 0x2068, + 0x080c, 0x95d2, 0x0150, 0x6867, 0x0103, 0x6877, 0x0000, 0x687b, + 0x0029, 0x080c, 0x50a5, 0x080c, 0x9797, 0x00de, 0x080c, 0x7f1e, + 0x080c, 0x6d42, 0x0005, 0x080c, 0x7f68, 0x0ce0, 0x9186, 0x0014, + 0x1dd0, 0x080c, 0x6c56, 0x00d6, 0x6014, 0x2068, 0x080c, 0x95d2, + 0x0d60, 0x6867, 0x0103, 0x6877, 0x0000, 0x687b, 0x0006, 0x6880, + 0xc0ec, 0x6882, 0x08f0, 0x0002, 0x9101, 0x90ff, 0x90ff, 0x90ff, + 0x90ff, 0x90ff, 0x9119, 0x90ff, 0x90ff, 0x90ff, 0x90ff, 0x080c, + 0x0cf1, 0x080c, 0x6c56, 0x6034, 0x908c, 0xff00, 0x810f, 0x9186, + 0x0039, 0x0118, 0x9186, 0x0035, 0x1118, 0x2001, 0x12a6, 0x0010, + 0x2001, 0x12a7, 0x2004, 0x601a, 0x6003, 0x000c, 0x080c, 0x6d42, + 0x0005, 0x080c, 0x6c56, 0x6034, 0x908c, 0xff00, 0x810f, 0x9186, + 0x0039, 0x0118, 0x9186, 0x0035, 0x1118, 0x2001, 0x12a6, 0x0010, + 0x2001, 0x12a7, 0x2004, 0x601a, 0x6003, 0x000e, 0x080c, 0x6d42, + 0x0005, 0x9182, 0x0090, 0x1220, 0x9182, 0x0085, 0x0208, 0x001a, + 0x080c, 0x7f68, 0x0005, 0x9146, 0x9146, 0x9146, 0x9146, 0x9148, + 0x919b, 0x9146, 0x9146, 0x9146, 0x9146, 0x9146, 0x080c, 0x0cf1, + 0x00d6, 0x6010, 0x2004, 0xd0bc, 0x0168, 0x6034, 0x908c, 0xff00, + 0x810f, 0x9186, 0x0039, 0x0118, 0x9186, 0x0035, 0x1118, 0x00de, + 0x0804, 0x91ac, 0x080c, 0x9797, 0x080c, 0x95d2, 0x01c8, 0x6014, + 0x2068, 0x6867, 0x0103, 0x6880, 0xd0b4, 0x0128, 0x687b, 0x0006, + 0xc0ec, 0x6882, 0x0048, 0xd0bc, 0x0118, 0x687b, 0x0002, 0x0020, + 0x687b, 0x0005, 0x080c, 0x9849, 0x6877, 0x0000, 0x080c, 0x50a5, + 0x2c68, 0x080c, 0x7ec8, 0x01d0, 0x6003, 0x0001, 0x6007, 0x001e, + 0x600b, 0xffff, 0x2009, 0x026e, 0x210c, 0x613a, 0x2009, 0x026f, + 0x210c, 0x613e, 0x6910, 0x6112, 0x080c, 0x99cc, 0x6954, 0x6156, + 0x6023, 0x0001, 0x080c, 0x6886, 0x080c, 0x6d42, 0x2d60, 0x080c, + 0x7f1e, 0x00de, 0x0005, 0x6010, 0x2004, 0xd0bc, 0x0598, 0x6034, + 0x908c, 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0x0578, 0x6720, 0x9786, 0x0001, + 0x0118, 0x9786, 0x0008, 0x1500, 0x2500, 0x9c06, 0x01e8, 0x2400, + 0x9c06, 0x01d0, 0x080c, 0xaaf2, 0x01b8, 0x080c, 0xab02, 0x11a0, + 0x6000, 0x9086, 0x0004, 0x1120, 0x0016, 0x080c, 0x12c7, 0x001e, + 0x080c, 0x97bc, 0x1110, 0x080c, 0x25d1, 0x080c, 0x97cd, 0x1110, + 0x080c, 0x8576, 0x080c, 0x97a3, 0x9ce0, 0x0018, 0x2001, 0x1116, + 0x2004, 0x9c02, 0x1208, 0x0858, 0x012e, 0x001e, 0x002e, 0x004e, + 0x005e, 0x006e, 0x007e, 0x00ce, 0x00ee, 0x0005, 0x0126, 0x0006, + 0x00e6, 0x2091, 0x8000, 0x2071, 0x1140, 0xd5a4, 0x0118, 0x7034, + 0x8000, 0x7036, 0xd5b4, 0x0118, 0x7030, 0x8000, 0x7032, 0xd5ac, + 0x0118, 0x2071, 0x114a, 0x0451, 0x00ee, 0x000e, 0x012e, 0x0005, + 0x0126, 0x0006, 0x00e6, 0x2091, 0x8000, 0x2071, 0x1140, 0xd5a4, + 0x0118, 0x7034, 0x8000, 0x7036, 0xd5b4, 0x0118, 0x7030, 0x8000, + 0x7032, 0xd5ac, 0x0118, 0x2071, 0x114a, 0x0081, 0x00ee, 0x000e, + 0x012e, 0x0005, 0x0126, 0x0006, 0x00e6, 0x2091, 0x8000, 0x2071, + 0x1142, 0x0021, 0x00ee, 0x000e, 0x012e, 0x0005, 0x2e04, 0x8000, + 0x2072, 0x1220, 0x8e70, 0x2e04, 0x8000, 0x2072, 0x0005, 0x00e6, + 0x2071, 0x1140, 0x0c99, 0x00ee, 0x0005, 0x00e6, 0x2071, 0x1144, + 0x0c69, 0x00ee, 0x0005, 0x0126, 0x0006, 0x00e6, 0x2091, 0x8000, + 0x2071, 0x1140, 0x7044, 0x8000, 0x7046, 0x00ee, 0x000e, 0x012e, + 0x0005, 0x8064, 0x0008, 0x0010, 0x0000, 0x8066, 0x0000, 0x0101, + 0x0008, 0x4404, 0x0003, 0x8060, 0x0000, 0x0400, 0x0000, 0x580a, + 0x0003, 0x791e, 0x0003, 0x507c, 0x0003, 0x4c07, 0x000b, 0xbac0, + 0x0009, 0x0082, 0x0008, 0x0c07, 0x0003, 0x15fe, 0x0008, 0x3407, + 0x000b, 0x808c, 0x0008, 0x0001, 0x0000, 0x0000, 0x0007, 0x4047, + 0x000a, 0x808c, 0x0008, 0x0002, 0x0000, 0x0819, 0x000b, 0x4022, + 0x0000, 0x001a, 0x0003, 0x4122, 0x0008, 0x0bfe, 0x0008, 0x11a0, + 0x0001, 0x11a5, 0x000b, 0x0ca0, 0x0001, 0x11a5, 0x000b, 0x9180, + 0x0001, 0x0005, 0x0008, 0x7f62, 0x0008, 0x8066, 0x0000, 0x0019, + 0x0000, 0x4424, 0x000b, 0x0240, 0x0002, 0x099f, 0x000b, 0x00fe, + 0x0000, 0x31a2, 0x000b, 0x112a, 0x0000, 0x002e, 0x0008, 0x022c, + 0x0008, 0x3a44, 0x0002, 0x0c07, 0x0003, 0x1734, 0x0000, 0x1530, + 0x0000, 0x1632, 0x0008, 0x0d2a, 0x0008, 0x9a80, 0x0009, 0x000f, + 0x0008, 0x7f62, 0x0008, 0x8066, 0x0000, 0x0011, 0x0008, 0x4437, + 0x0003, 0x808c, 0x0008, 0x0002, 0x0000, 0x01fe, 0x0008, 0x42e0, + 0x0009, 0x0d98, 0x000b, 0x00fe, 0x0000, 0x43e0, 0x0001, 0x0d98, + 0x000b, 0x9880, 0x0001, 0x0010, 0x0000, 0x7f62, 0x0008, 0x8066, + 0x0000, 0x1e0a, 0x0008, 0x4445, 0x0003, 0x808a, 0x0008, 0x0003, + 0x0008, 0x9a80, 0x0009, 0x0002, 0x0000, 0x7f62, 0x0008, 0x584b, + 0x0003, 0x8066, 0x0000, 0x3679, 0x0000, 0x444e, 0x000b, 0x584f, + 0x000b, 0x8054, 0x0008, 0x0011, 0x0008, 0x8074, 0x0000, 0x1010, + 0x0008, 0x1efe, 0x0000, 0x3007, 0x0003, 0x0058, 0x000c, 0x0007, + 0x0003, 0x1cfe, 0x0008, 0x1b80, 0x0009, 0x7f62, 0x0008, 0x8066, + 0x0000, 0x0231, 0x0008, 0x445d, 0x0003, 0x585e, 0x000b, 0x0140, + 0x0008, 0x0140, 0x0008, 0x0242, 0x0000, 0x0242, 0x0000, 0x1f43, + 0x0002, 0x0c6e, 0x0003, 0x0d44, 0x0000, 0x0d44, 0x0000, 0x0d46, + 0x0008, 0x0d46, 0x0008, 0x0348, 0x0008, 0x0348, 0x0008, 0x044a, + 0x0008, 0x044a, 0x0008, 0x0076, 0x0003, 0x0344, 0x0008, 0x0344, + 0x0008, 0x0446, 0x0008, 0x0446, 0x0008, 0x0548, 0x0008, 0x0548, + 0x0008, 0x064a, 0x0000, 0x064a, 0x0000, 0x5876, 0x000b, 0x8054, + 0x0008, 0x0001, 0x0000, 0x8074, 0x0000, 0x2020, 0x0008, 0x4000, + 0x000f, 0x3a40, 0x000a, 0x0c0a, 0x000b, 0x2b24, 0x0008, 0x2b24, + 0x0008, 0x5880, 0x000b, 0x8054, 0x0008, 0x0002, 0x0000, 0x1242, + 0x0002, 0x08ca, 0x0003, 0x3a45, 0x000a, 0x08bb, 0x0003, 0x1e10, + 0x000a, 0x7f3c, 0x0000, 0x08b8, 0x0003, 0x1d00, 0x0002, 0x7f3a, + 0x0000, 0x0d60, 0x0000, 0x7f62, 0x0008, 0x8066, 0x0000, 0x0009, + 0x0008, 0x4490, 0x000b, 0x8060, 0x0000, 0x0400, 0x0000, 0x00fe, + 0x0000, 0x34b5, 0x000b, 0x1cfe, 0x0008, 0xff80, 0x0009, 0x0001, + 0x0000, 0x7f62, 0x0008, 0x8066, 0x0000, 0x0009, 0x0008, 0x449b, + 0x0003, 0x00fe, 0x0000, 0x318b, 0x0003, 0x0038, 0x0000, 0x00fe, + 0x0000, 0xff80, 0x0009, 0x0019, 0x0000, 0x7f62, 0x0008, 0x8066, + 0x0000, 0x0009, 0x0008, 0x44a5, 0x000b, 0x80c0, 0x0009, 0x00ff, + 0x0008, 0x7f3e, 0x0008, 0x0d60, 0x0000, 0x0efe, 0x0008, 0x1f80, + 0x0001, 0x7f62, 0x0008, 0x8066, 0x0000, 0x0009, 0x0008, 0x44af, + 0x000b, 0x8060, 0x0000, 0x0400, 0x0000, 0x003a, 0x0008, 0x1dfe, + 0x0000, 0x008c, 0x0003, 0x0036, 0x0008, 0x0058, 0x000c, 0x00ca, + 0x000b, 0x8074, 0x0000, 0x2000, 0x0000, 0x00ca, 0x000b, 0x3a44, + 0x0002, 0x09a8, 0x0003, 0x8074, 0x0000, 0x1000, 0x0000, 0x2d0e, + 0x0000, 0x2d0e, 0x0000, 0x358b, 0x000b, 0x26fe, 0x0008, 0x26fe, + 0x0008, 0x2700, 0x0008, 0x2700, 0x0008, 0x00d0, 0x0009, 0x0cd8, + 0x000b, 0x8074, 0x0000, 0x4040, 0x0008, 0x58ca, 0x0003, 0x507c, + 0x0003, 0x3a46, 0x000a, 0x0cd8, 0x000b, 0x3a47, 0x0002, 0x08d5, + 0x000b, 0x8054, 0x0008, 0x0004, 0x0000, 0x8074, 0x0000, 0x8000, + 0x0000, 0x0112, 0x0003, 0x92c0, 0x0009, 0x0f88, 0x0008, 0x0807, + 0x000b, 0x9a80, 0x0009, 0x0002, 0x0000, 0x7f62, 0x0008, 0x8066, + 0x0000, 0x362a, 0x0000, 0x44dd, 0x000b, 0x2000, 0x0000, 0x2000, + 0x0000, 0x2102, 0x0000, 0x2102, 0x0000, 0x2204, 0x0000, 0x2204, + 0x0000, 0x2306, 0x0000, 0x2306, 0x0000, 0x2408, 0x0000, 0x2408, + 0x0000, 0x250a, 0x0000, 0x250a, 0x0000, 0x260c, 0x0000, 0x260c, + 0x0000, 0x270e, 0x0000, 0x270e, 0x0000, 0x2810, 0x0000, 0x2810, + 0x0000, 0x2912, 0x0000, 0x2912, 0x0000, 0x9a80, 0x0009, 0x0007, + 0x0000, 0x7f62, 0x0008, 0x8066, 0x0000, 0x0052, 0x0000, 0x44f7, + 0x0003, 0x92c0, 0x0009, 0x0780, 0x0008, 0x0d92, 0x000b, 0x124b, + 0x0002, 0x0900, 0x000b, 0x2e4d, 0x0002, 0x2e4d, 0x0002, 0x098b, + 0x000b, 0x5900, 0x000b, 0x8054, 0x0008, 0x0004, 0x0000, 0x3a46, + 0x000a, 0x0d0d, 0x000b, 0x1243, 0x000a, 0x0910, 0x0003, 0x8010, + 0x0008, 0x000d, 0x0000, 0x017c, 0x0004, 0x1810, 0x0000, 0x017c, + 0x0004, 0x0110, 0x000b, 0x0173, 0x0004, 0x1810, 0x0000, 0x017c, + 0x0004, 0x8074, 0x0000, 0xf000, 0x0008, 0x3a42, 0x0002, 0x0d18, + 0x0003, 0x15fe, 0x0008, 0x342e, 0x0003, 0x0d30, 0x0000, 0x0007, + 0x0003, 0x8074, 0x0000, 0x0501, 0x0000, 0x8010, 0x0008, 0x000c, + 0x0008, 0x017c, 0x0004, 0x0007, 0x0003, 0xbbe0, 0x0009, 0x0030, + 0x0008, 0x0d2e, 0x0003, 0x18fe, 0x0000, 0x3ce0, 0x0009, 0x092b, + 0x000b, 0x15fe, 0x0008, 0x3ce0, 0x0009, 0x092b, 0x000b, 0x016e, + 0x0004, 0x8076, 0x0008, 0x0040, 0x0000, 0x016b, 0x000b, 0x8076, + 0x0008, 0x0041, 0x0008, 0x016b, 0x000b, 0xbbe0, 0x0009, 0x0032, + 0x0000, 0x0d33, 0x0003, 0x3c1e, 0x0008, 0x016b, 0x000b, 0xbbe0, + 0x0009, 0x0037, 0x0000, 0x0d50, 0x0003, 0x18fe, 0x0000, 0x3ce0, + 0x0009, 0x0d2b, 0x0003, 0x1afe, 0x0008, 0xff80, 0x0009, 0x000d, + 0x0000, 0x7f62, 0x0008, 0x2604, 0x0008, 0x2604, 0x0008, 0x2706, + 0x0008, 0x2706, 0x0008, 0x2808, 0x0000, 0x2808, 0x0000, 0x290a, + 0x0000, 0x290a, 0x0000, 0x8066, 0x0000, 0x0422, 0x0000, 0x4547, + 0x0003, 0x0173, 0x0004, 0x8054, 0x0008, 0x0004, 0x0000, 0x8074, + 0x0000, 0xf000, 0x0008, 0x8072, 0x0000, 0x8000, 0x0000, 0x0112, + 0x0003, 0xbbe0, 0x0009, 0x0038, 0x0000, 0x0d62, 0x000b, 0x18fe, + 0x0000, 0x3ce0, 0x0009, 0x095f, 0x000b, 0x15fe, 0x0008, 0x3ce0, + 0x0009, 0x0d27, 0x0003, 0x016e, 0x0004, 0x8076, 0x0008, 0x0040, + 0x0000, 0x8072, 0x0000, 0x8000, 0x0000, 0x019f, 0x0003, 0x8076, + 0x0008, 0x0042, 0x0008, 0x016b, 0x000b, 0xbbe0, 0x0009, 0x0016, + 0x0000, 0x0d6b, 0x000b, 0x3a44, 0x0002, 0x0c09, 0x000b, 0x8072, + 0x0000, 0x8000, 0x0000, 0x8000, 0x000f, 0x0007, 0x0003, 0x8072, + 0x0000, 0x8000, 0x0000, 0x0007, 0x0003, 0x3d30, 0x000a, 0x7f00, + 0x0000, 0xbc80, 0x0001, 0x0007, 0x0000, 0x0177, 0x0003, 0x1930, + 0x000a, 0x7f00, 0x0000, 0x9880, 0x0001, 0x0007, 0x0000, 0x7f62, + 0x0008, 0x8066, 0x0000, 0x000a, 0x0008, 0x457a, 0x000b, 0x4000, + 0x000f, 0x217c, 0x0003, 0x0870, 0x0008, 0x4000, 0x000f, 0xbac0, + 0x0009, 0x0090, 0x0008, 0x0985, 0x0003, 0x8074, 0x0000, 0x0706, + 0x0000, 0x0187, 0x0003, 0x8074, 0x0000, 0x0703, 0x0000, 0x4000, + 0x000f, 0x8010, 0x0008, 0x0008, 0x0000, 0x01ad, 0x000b, 0x0173, + 0x0004, 0x8010, 0x0008, 0x0007, 0x0000, 0x017c, 0x0004, 0x1810, + 0x0000, 0x017c, 0x0004, 0x01b7, 0x0003, 0x8010, 0x0008, 0x0009, + 0x0008, 0x01ad, 0x000b, 0x8010, 0x0008, 0x0005, 0x0008, 0x01ad, + 0x000b, 0x808c, 0x0008, 0x0001, 0x0000, 0x8010, 0x0008, 0x0004, + 0x0000, 0x4143, 0x000a, 0x0840, 0x000b, 0x01ad, 0x000b, 0x8010, + 0x0008, 0x0003, 0x0008, 0x01af, 0x0003, 0x8010, 0x0008, 0x000b, + 0x0000, 0x01af, 0x0003, 0x8010, 0x0008, 0x0002, 0x0000, 0x01af, + 0x0003, 0x3a47, 0x0002, 0x0cca, 0x000b, 0x8010, 0x0008, 0x0006, + 0x0008, 0x01af, 0x0003, 0x8074, 0x0000, 0xf000, 0x0008, 0x017c, + 0x0004, 0x017f, 0x0004, 0x3a40, 0x000a, 0x0807, 0x000b, 0x8010, + 0x0008, 0x000c, 0x0008, 0x017c, 0x0004, 0x0007, 0x0003, 0x8074, + 0x0000, 0xf080, 0x0000, 0x0d30, 0x0000, 0x2e4d, 0x0002, 0x2e4d, + 0x0002, 0x09c0, 0x000b, 0x8054, 0x0008, 0x0019, 0x0000, 0x0007, + 0x0003, 0x8054, 0x0008, 0x0009, 0x0008, 0x0007, 0x0003, 0x0001, + 0x0002, 0x0004, 0x0008, 0x0010, 0x0020, 0x0040, 0x0080, 0x0100, + 0x0200, 0x0400, 0x0800, 0x1000, 0x2000, 0x4000, 0x8000, 0xbb4d +}; +#ifdef UNIQUE_FW_NAME +unsigned short fw2300tp_length01 = 0xa9b8; +#else +unsigned short risc_code_length01 = 0xa9b8; +#endif + diff -Nru a/drivers/scsi/qla2x00.c b/drivers/scsi/qla2x00.c --- /dev/null Wed Dec 31 16:00:00 1969 +++ b/drivers/scsi/qla2x00.c Mon Apr 15 15:07:57 2002 @@ -0,0 +1,12823 @@ +/******************************************************************************** +* QLOGIC LINUX SOFTWARE +* +* QLogic QLA2x00 device driver for Linux 2.2.x and 2.4.x +* Copyright (C) 2000 and 2001 Qlogic Corporation +* (www.qlogic.com) +* +* This program is free software; you can redistribute it and/or modify it +* under the terms of the GNU General Public License as published by the +* Free Software Foundation; either version 2, or (at your option) any +* later version. +* +* This program is distributed in the hope that it will be useful, but +* WITHOUT ANY WARRANTY; without even the implied warranty of +* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU +* General Public License for more details. +** +******************************************************************************/ +#define QLA2100_VERSION "4.31.7b" +/**************************************************************************** +Revision History: + Rev. 4.31.7b June 8, 2001 DG QLogic + - Fixed issue when loop id for target is changed to a different + loop id. + Rev. 4.31.6 June 1, 2001 DG QLogic + - Official 2200 firmware: v2.01.34 + - Official 2300 firmware: v3.00.24 + Rev. 4.31.5b May 30, 2001 DG QLogic + - Reset SRB_SENT flag in all isr routines. + - Fix displaying garbage when using /proc. + Rev. 4.31.3b May 15, 2001 DG QLogic + - Using test 2200 firmware: v204.01.33 + Rev. 4.31.2b May 15, 2001 DG QLogic + - Using test 2200 firmware: v203.01.33 + Rev. 4.31.1b May 15, 2001 DG QLogic + - Upgrade FC firmware to: 2200 v209.01.27 + - Changed logic to handle a topology of 4 after issuing the + "Get Host loop id". + Rev. 4.31b May 15, 2001 RL QLogic + - Added code to export PCI device info via a new ioctl function + in kernel 2.4.4. + - Redirect console messages to the OS messages file only. + - Additional fix in ioctl functions for node/port name endianess + problem. + Rev. 4.30b May 3, 2001 RL QLogic + - Moved the allocation of host database to outside of the adapter + structure allocation to avoid the allocation size limitation in the + scsi_register function. + Rev. 4.29b April 27, 2001 RL QLogic + - Fixed endianess of the node and port names read from the config + file for persistent binding entries. + Rev. 4.28b April 26, 2001 DG QLogic + - Fixed persistent binding of target devices. + Rev. 4.27 April 26, 2001 DG QLogic + - Fixed Mailbox timeout logic + - Fixed to compile on 2.4.x RedHat systems. + Rev. 4.25 March 15, 2001 DG QLogic + - released + Rev. 4.25 Beta March 9, 2001 DG QLogic + - incl new qlavendor.c file. + Rev. 4.24 Beta Test32 February 22, 2001 BN QLogic + - Added code for scanning of missing LUN to let the + SCSI layer skip it. + - Revised init_cb_t structure in qla2x00.h for the new + QLA2300 as well as QLA2200 devices. + - Changed criteria of 64/32 Bit mode of HBA + operation according to BITS_PER_LONG rather + than HBA's NVRAM setting of >4Gig memory bit; + so that the HBA auto-configures without the need + to setup each system individually. + - Merged changes for proper compile and operation in Alpha systems. + - Upgrade FC firmware to: QLA2300 v3.00.18 *new + and enabled FC Loopback test on QLA2300 HBAs. + - Add statistics counters and IOCTL support for + HBA Error Count, LIP Resets, and total ISR count. + - Changed qla2100_reinit on loop down after 4 minutes + specific to QLA2100 HBAs only. + - Added code and Makefile option to handle RISC code + download differently for ia-64 platforms than x86 or alpha. + Rev. 4.23 Beta January 12, 2001 BN QLogic + - Use cmd->sc_data_direction for setting of HBA data transfer + direction for 2.4.0 and higher kernels. + Note: Users must set the reply_len in sg_header. + For Writes and no data transfer; reply_len should + be the lenght of sg_header. + For Reads, reply_len should be the length of sg_header + plus the number of bytes to be read. + - Added check of SCSI_RESET_SUGGEST_BUS_RESET during + qla2100_reset() and perform BUS_RESET. + Also perform DEVICE_RESET on else of flag checking. + - Added new /proc/scsi/qla2x00/HbaApiNode for IOCTL interface + for 2.4.x kernels; so driver can be accessed with out need + to have at least one mapped scsi drive. + - Modified qla2100_mailbox_command's second parameter + to 32 bits for use by Loop-Back Diagnostic function + - Increase MAILBOX_REGISTER_COUNT to 32 + - Added Loop-Back Diagnostic function to qla2x00ioctl.c + for QLA2200 HBAs only. + - Order HBA detection as follows: + QLA2300, QLA2200, QLA2100. + - Changed queue_task() to queue_task_irq() in + qla2100_intr_handler() for proper usage. + - In qla2100_register_with_Linux() put check and getting + device iobase before registering of interrupt with Linux; + to help with driver loading/unloading when ramdisk is also loaded. + - Change IOCTL support to SDM_VERSION 5 in qla2x00ioctl.c + to be support SNIA HBA API 1.0 Library + - Upgrade FC firmware to: QLA2200 v2.01.27 *new + QLA2300 v3.00.17 *new + - Added copy of HBA Serial Number to /proc entry + - Added sigmask(SIGKILL) as second parameter to + siginitsetinv() function called during qla2100_do_dpc(); + so that the driver can be unloaded for 2.4.0 kernels. + Rev. 4.22 Beta November 22, 2000 BN QLogic + - Change IOCTL support to SDM_VERSION 4 in qla2x00_v4_ioctl.c + to be compatible with ln_rel-1.0Beta API library + Rev. 4.21 Beta November 15, 2000 BN QLogic + - Upgrade FC firmware to: 2100 v1.19.16 + 2200 v2.01.24 + 2300 v3.00.12 + - Merge of qla2x00 driver 2.19.16Beta changes. + - Updated qlavendor.c for vendor unique command + decoding. + Rev. 4.20 Beta October 17, 2000 BN QLogic + - QLA2300 Support added. + Rev. 4.14 Beta October 16, 2000 BN QLogic + - Added setting of higher address bits for + MBC_INITIALIZE_FIRMWARE operation. + - Release also contains newer qlavendor.c file + - Move to the new SCSI initialization scheme + and always declare the static driver_template + for kernels 2.4.0 and higher + Rev. 4.13 Beta September 21, 2000 BN QLogic + - Added "quiet" option to keep from printing LIP + occurred messages on systems that specify it. + - Added option to choose tp or ef, FC firmware + Rev. 4.12 Beta September 18, 2000 BN QLogic + - Added pci_set_master() to qla2100_pci_config + function to make sure all systems are supported + Rev. 4.11 Beta September 6, 2000 BN QLogic + - Enabled IOCTLs for external IOCTL and APIs + Rev. 4.10 Beta August 28, 2000 BN Qlogic + - Use new PCI DMA mapping APIs for 2.4.x kernel + - Added driver IOCTL support code; but disabled + it with #if 0 for next release + - Verified correct 64 bit addressing with NVRAM: + enable_64bit_addressing (>4GByte Addressing) + enabled in BIOS advanced settings option. + Rev. 4.0 July 24, 2000 BN Qlogic + - Added FC Tape Support by use of new FC Firmware + ql2100_fw.h must be v1.19.12 or greater + ql2200_fw.h must be v2.01.16 or greater + - Corrected HBA Node Name equal to zero + - Changed QLBoardTbl to QLBoardTbl_fc to avoid + double definition error with regards to qla1280 + on new 2.4.0 kernel build tools + Rev. 3.90 Beta July 21, 2000 BN Qlogic + - Added 64 bit OS and IA-64 hardware support + - Move to new major revision number + Rev. 2.22 July 14, 2000 BN Qlogic + - Updated 2100 FW to 1.19.10 + - Updated 2200 FW to 2.01.14 + - Move version to 2.22 for release to DVT + Rev. 2.19.8 July 11, 2000 DG Qlogic + - Fixed 2100 issue of login retry when no fabric is attached. + Rev. 2.19.7 July 6, 2000 DG + - Set queue depth per lun to 16 instead of throttle which is a + port max queue size and added an option "ql2xmaxqdepth=xx" + to allow user to change queue depth. This prevents us from + exceeding the adapter's throttle size which causes requests + to sit in the input queue for long periods of time. + Rev. 2.19.6 June 28, 2000 DG Qlogic + - GA release + - Fixed panic in putq_t routine when called from abort. + Rev. 2.19.5b7 June 27, 2000 DG + - Add logic to wait reset delay if no fabric devices are found. + Rev. 2.19.5b6 June 26, 2000 DG + - Fixed Fw ready issue. + - Clear sent flag in SRB, so we will abort commands in Lun + queue that were previously sent. + - Flush input queue when an isp_abort occurs. + Rev. 2.19.5b5 June 16, 2000 DG + - Fixed issue of not holding off request if multiple RSCN or + PORT updates occur while process the currect RSCN. + Rev. 2.19.5b4 June 16, 2000 DG + - Added lock for done_q to prevent losing requests in timer. + Rev. 2.19.5b3 June 16, 2000 DG + - Added routine to set the correct direction for vendor specific + commands. Set the new option "QLA_SCSI_VENDOR_DIR". + - Fixed issue of retrying continuously on a Missing SCSI device. + - Fixed multiple adapter issue. Only login into adapter node + once and never again. + - Change code not to use loop id 0 for Fabric nodes. + Rev. 2.19.5b2 June 15, 2000 DG + - Added code to reset port down count on good requests. + Rev. 2.19.5 June 8, 2000 DG + - Added code to display the connection type F, FL, or N. + - Reaarange code in DPC routine to put "retry login" + further down in the routine and skip is loop is down. + - Check the returned status after GAN (qla2100_sns_device) + and retry on ISP TX timeout (0x4005). + Rev. 2.19.4 June 6, 2000 DG + - Fixed for panic that occurs when system is shutdown. + Rev. 2.19.3 June 5, 2000 DG + - Fixed retry logic for user configured targets. + Rev. 2.19.2 May 31, 2000 DG + - Remove spinlock in qla2100_timer. + - Change the jiffies timer to loop timer in fw_ready. + Rev. 2.19.1 May 6, 2000 DG + - Change risc code 2200 from 2.1.12 to 2.1.13 to correct issue + of getting mailbox timeouts. + - Change mailbox timer to get correct timeout. + - Added qla2100_cmd_wait to wait for outstanding commands to + complete before querying the name server after a LIP. + Rev. 2.19 May 6, 2000 DG + - Fixed mailbox timeout recovery logic. + Rev. 2.18 May 1, 2000 DG + - Changes from Fabric testing + Rev. 2.18b4 Apr 21, 2000 DG + - Fixed login retry count to retry count. + - If the loop is down for more than 4 minutes then restart + queues and reset adpater if enabled. + - In qla2100_queuecommand we no longer return new requests + immediately back to kernel when loop is down. This causes + SYSTEM to HANG when a lot of requests are outstanding. We + now put them in the done queue and let the DPC routine + return them to kernel. + - Fixed panic cause by changing the timeout value of new request + when the loop is down. + - Cleanup qla2100_next. + Rev. 2.18b3 Apr 18, 2000 DG + - After the GAN, check returned status in resp buffer. + Rev. 2.18b2 Apr 12, 2000 DG + - Added handling of firmware bug when we use connection mode + 1 (P2P). The firmware tries to change to loop mode after + encountering some IO failures/resets. + - Added logic to reset all modules during a chip reset. + - After the GAN, if we lost devices or have a device that was + configured by the user then retry the login. This is a + work-a-round for Brocade switches. It sometimes does + not return all the devices in the port list. + Rev. 2.18b1 Apr 1, 2000 DG + - Added logic to ignore device types other than FL/F + from gan list. Mcdata switch returns a bogus port of + type 85 in the list. + - Added firmware 2.1.11 to fix issues with reusing loop ids. + Rev. 2.17 Mar 21, 2000 DG + - Fixed mailbox timeout timer. + - Added counters to record timeouts and aborts. + Rev. 2.16 Mar 8, 2000 DG + - Fixed Profiling code to reduced output of inactive devices. + - Fixed driver name in "/proc/scsi/qla2x00" instead of "qla". + - Fixed extended timeout value for loop down retries. + - Fixed code that search for target binding in command line to search + for all occurences instead of the first four. + - Disable the reinit of adapter when the LOOP is DOWN + for more than 4 minutes. It can be enabled with the command + line option "reinit_on_loopdown". + - Fixed issue of not setting HBA instance number before + calling HBA initialized. + Rev. 2.15 Feb 19, 2000 DG + - Fixed 2100 issue of driver not seeing storage when switch is connected + to loop. + Rev. 2.14 Feb 11, 2000 DG + - Added new logic to accept persistent binding information from the command line. + - Modified command parser to handle properties on the command line after + the regular options. + Rev. 2.13 Jan 27, 2000 TT + - Modify to use makefile parameter "IP=1" to enanle IP support. + - Fix SNS mailbox cmd parameter in qla2x00_register_ip_device. + - Reverse byte order on ha->port_id to match NT and fix compare bugs. + Rev. 2.12 Jan 26, 2000 TT+DG + - Updated Qlogic Linux sofware license. + - Added IP support for qla2xip driver. + - Fix host adapter structure initialization in qla2100_detect. + - Fix port name byte order in qla2100_update_fc_db. + - Fix the issue of not returning "NO_CONNECT" back to the user + when the loop is down after the loop down timer has expired. + - Added option QLA2100_EXT_TIMEOUT to extend timeout of each command. + default if OFF. + - Change device high water mark (hiwat) to execution throttle. + Rev. 2.11 Dec 8, 1999 DG + - Added Qlogic Linux sofware license. + Rev. 2.10 Oct 31, 1999 DG + - Fixed issue of not releasing requests if port is down (DPC issue). + - Ignore BIOS setting for MAX number of luns unless USE_BIOS_MAX_LUNS + is set. +*****************************************************************************/ + +/* +* Compile time Options: +* 0 - Disable and 1 - Enable +*/ +#define QL2100_TARGET_MODE_SUPPORT 0 /* Target mode support */ +#define MEMORY_MAPPED_IO 0 +#define DEBUG_QLA2100_INTR 0 +#define USE_NVRAM_DEFAULTS 0 +#define DEBUG_PRINT_NVRAM 0 +#define LOADING_RISC_ACTIVITY 0 +#define AUTO_ESCALATE_RESET 0 /* Automatically escalate resets */ +#define AUTO_ESCALATE_ABORT 0 /* Automatically escalate aborts */ +#define STOP_ON_ERROR 0 /* Stop on aborts and resets */ +#define STOP_ON_RESET 0 +#define STOP_ON_ABORT 0 +#define QLA2100_COMTRACE 0 /* One char tracing */ +#define WATCH_THREADS_SIZ 0 /* watch size of pending queue */ +#define USE_PORTNAME 1 /* option to use port names for targets */ +#define QLA2100_EXT_TIMEOUT 0 /* Extend timeout for commands up to 1 min*/ +#define LUN_MASKING 0 +#define USE_FLASH 0 +#define QLA2100_PROFILE 1 +#define QLA_SCSI_VENDOR_DIR 0 /* Decode vendor specific opcodes for direction */ +#define QLA2100_LIPTEST 0 +#define REQ_TRACE 1 + +#undef TRACECODE /* include tracing code in watchdog routines */ +#define CHECK_BINDING + +#define DEBUG_QLA2100 0 /* For Debug of qla2x00 */ +#define DEBUG_GET_FW_DUMP 0 /* also set DEBUG_QLA2100 and + use COM1 and capture it */ +#define USE_TP_FW 1 /* use tp or ef firmware */ + +/* The following WORD_FW_LOAD is defined in Makefile for ia-64 builds + and can also be decommented here for Word by Word confirmation of + RISC code download operation */ +/* #define WORD_FW_LOAD 0 */ + +/* +* String arrays +*/ +#define LINESIZE 256 +#define MAXARGS 26 + +/* +* Include files +*/ +#include +#ifdef MODULE +#include +#endif + +#ifndef LINUX_VERSION_CODE +#include +#endif /* LINUX_VERSION_CODE not defined */ + +static int num_hosts; /* ioctl related */ +static int apiHBAInstance = 0; /* ioctl related keeps track of API HBA Instance */ + + +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include + + +#ifndef KERNEL_VERSION +# define KERNEL_VERSION(x,y,z) (((x)<<16)+((y)<<8)+(z)) +#endif + +#if LINUX_VERSION_CODE > KERNEL_VERSION(2,3,18) +#define APIDEV 1 +#endif + +#if LINUX_VERSION_CODE < KERNEL_VERSION(2,1,95) +#include +# include +#else +/*#include */ + +#define __KERNEL_SYSCALLS__ + +#include +#include + +#include +#define SHUTDOWN_SIGS (sigmask(SIGKILL)|sigmask(SIGINT)|sigmask(SIGTERM)) +#endif +#include "sd.h" +#include "scsi.h" +#include "hosts.h" + +#ifdef FC_IP_SUPPORT +#include +#include "qlcommon.h" +#endif + +#include "qla2x00.h" +#define UNIQUE_FW_NAME /* unique F/W array names */ +#ifdef UNIQUE_FW_NAME +#include "ql2100_fw.h" /* ISP RISC code */ +#ifdef FC_IP_SUPPORT +#include "ql2200ip_fw.h" /* ISP RISC 2200 code */ +#include "ql2300ip_fw.h" /* ISP RISC 2300 code */ +#else +#include "ql2200_fw.h" /* ISP RISC 2200 code */ +#include "ql2300_fw.h" /* ISP RISC 2300 code */ +#endif +#else +#include "isp_fw.h" /* ISP RISC code */ +#include "isp1_fw.h" /* ISP RISC 2200 code */ +#endif +#include +#include + + +#define BZERO(ptr, amt) memset((void *)(ptr), 0, amt) +#define BCMP(s1, s2, amt) memcmp((void *)(s1), (void *)(s2), amt) +#define BCOPY(src, dst, amt) memcpy((void *)(dst), (void *)(src), amt) +#define KMALLOC(siz) kmalloc((siz), GFP_ATOMIC | GFP_DMA) +#define KMFREE(ip,siz) kfree((ip)) +#define SYS_DELAY(x) udelay(x);barrier() +#define QLA2100_DELAY(sec) mdelay(sec * HZ) + +/* 4.10 */ +#if BITS_PER_LONG > 32 +#define pci_dma_lo32(a) (a & 0xffffffff) +#define pci_dma_hi32(a) ((a >> 32) & 0xffffffff) +#else +#define pci_dma_lo32(a) (a & 0xffffffff) +#define pci_dma_hi32(a) 0 +#endif + +#define VIRT_TO_BUS(a) virt_to_bus((a)) + +#if BITS_PER_LONG <= 32 +#define VIRT_TO_BUS_LOW(a) (uint32_t)virt_to_bus(((void *)a)) +#define VIRT_TO_BUS_HIGH(a) (uint32_t)(0x0) +#else +#define VIRT_TO_BUS_LOW(a) (uint32_t)(0xffffffff & virt_to_bus((void *)(a))) +#define VIRT_TO_BUS_HIGH(a) (uint32_t)(0xffffffff & (virt_to_bus((void *)(a))>>32)) +#endif + +#define CACHE_FLUSH(a) (RD_REG_WORD(a)) +#define INVALID_HANDLE (MAX_OUTSTANDING_COMMANDS+1) + +#define STATIC + +#if BITS_PER_LONG <= 32 +#define LS_64BITS(x) (uint32_t)((unsigned long)x) +#define MS_64BITS(x) (uint32_t)((unsigned long) 0x0) +#else +#define LS_64BITS(x) (uint32_t)(0xffffffff & ((unsigned long)x)) +#define MS_64BITS(x) (uint32_t)(0xffffffff & (((unsigned long)x)>>32) ) +#endif + +#if BITS_PER_LONG <= 32 +#define MSB(x) (uint8_t)(((uint16_t)(x) >> 8) & 0xff) +#define LSB(x) (uint8_t)(x & 0xff) +#define MSW(x) (uint16_t)(((uint32_t)(x) >> 16) & 0xffff) +#define LSW(x) (uint16_t)(x & 0xffff) +#define QL21_64BITS_3RDWD(x) ((uint16_t) 0) +#define QL21_64BITS_4THWD(x) ((uint16_t) 0) +#else +#define MSB(x) (uint8_t)(((uint16_t)(x) >> 8) & 0xff) +#define LSB(x) (uint8_t)(x & 0xff) +#define MSW(x) (uint16_t)(((uint32_t)(x) >> 16) & 0xffff) +#define LSW(x) (uint16_t)(x & 0xffff) +#define QL21_64BITS_3RDWD(x) ((uint16_t) (x >> 32) & 0xffff) +#define QL21_64BITS_4THWD(x) ((uint16_t) (x >> 48) & 0xffff) +#endif + +#define OFFSET(w) (((u_long) &w) & 0xFFFF) /* 256 byte offsets */ +#define SCSI_BUS_32(scp) ((scp)->channel) +#define SCSI_TCN_32(scp) ((scp)->target) +#define SCSI_LUN_32(scp) ((scp)->lun) + +/* +* TIMER MACROS +*/ +#define QLA2100_TIMER_LOCK(ap) spin_lock_irqsave(&(ap)->retry_lock, cpu_flags); +#define QLA2100_TIMER_UNLOCK(ap) spin_unlock_irqrestore(&(ap)->retry_lock, cpu_flags); + + +#define WATCH_INTERVAL 1 /* number of seconds */ +#define START_TIMER(f, h, w) \ +{ \ +init_timer(&(h)->timer); \ +(h)->timer.expires = jiffies + w * HZ;\ +(h)->timer.data = (unsigned long) h; \ +(h)->timer.function = (void (*)(unsigned long))f; \ +(h)->flags.start_timer = FALSE; \ +add_timer(&(h)->timer); \ +(h)->timer_active = 1;\ +} + +#define RESTART_TIMER(f, h, w) \ +{ \ +(h)->timer.expires = jiffies + w * HZ;\ +(h)->flags.start_timer = FALSE; \ +add_timer(&(h)->timer); \ +} + +#define STOP_TIMER(f, h) \ +{ \ +del_timer(&(h)->timer); \ +(h)->timer_active = 0;\ +} + +#define NVRAM_DELAY() udelay(500) /* 2 microsecond delay */ + +typedef unsigned long paddr32_t; + +/* +* Qlogic Driver support Function Prototypes. +*/ +STATIC uint8_t qla2100_register_with_Linux(scsi_qla_host_t *ha, uint8_t maxchannels); +STATIC void qla2100_done(scsi_qla_host_t *, srb_t **, srb_t **), +qla2100_next(scsi_qla_host_t *, scsi_lu_t *), +qla2100_select_queue_depth(struct Scsi_Host *, Scsi_Device *); + +STATIC void qla2100_done_q_put(scsi_qla_host_t *, srb_t *, srb_t **, srb_t **), +qla2100_putq_b(scsi_lu_t *, srb_t *), +qla2100_putq_t(scsi_lu_t *, srb_t *), +qla2100_removeq(scsi_lu_t *, srb_t *), +qla2100_timer(scsi_qla_host_t *), +qla2100_timeout_insert(scsi_qla_host_t *, srb_t *), +qla2100_timeout_remove(scsi_qla_host_t *, srb_t *); + +STATIC uint8_t qla2100_mem_alloc(scsi_qla_host_t *); + +static void qla2100_dump_regs(struct Scsi_Host *host); +#if STOP_ON_ERROR +static void qla2100_panic(char *, struct Scsi_Host *host); +#endif +void qla2100_print_scsi_cmd(Scsi_Cmnd *cmd); +STATIC void qla2100_abort_queue_single(scsi_qla_host_t *,uint32_t,uint32_t,uint32_t,uint32_t); + +STATIC int qla2100_return_status(scsi_qla_host_t *ha, sts_entry_t *sts, Scsi_Cmnd *cp); +STATIC void qla2100_removeq(scsi_lu_t *q, srb_t *sp); +STATIC void qla2100_mem_free(scsi_qla_host_t *ha); +void qla2100_do_dpc(void *p); + +static inline void qla2100_callback(scsi_qla_host_t *ha, srb_t *sp, uint8_t dec), +qla2100_tgt_dealloc(scsi_qla_host_t *, tgt_t *), +qla2100_lun_dealloc(scsi_lu_t *); +static inline tgt_t *qla2100_tgt_alloc(scsi_qla_host_t *); +static inline scsi_lu_t *qla2100_lun_alloc(void); + +static inline void qla2100_enable_intrs(scsi_qla_host_t *); +static inline void qla2100_disable_intrs(scsi_qla_host_t *); +#if QLA2100_EXT_TIMEOUT +static void qla2100_extend_timeout(Scsi_Cmnd *cmd, int timeout); +#endif +static int qla2100_get_tokens(char *line, char **argv, int maxargs ); + +/* +* QLogic ISP2100 Hardware Support Function Prototypes. +*/ +STATIC uint8_t qla2100_initialize_adapter(scsi_qla_host_t *), +qla2100_isp_firmware(scsi_qla_host_t *), +qla2100_pci_config(scsi_qla_host_t *), +qla2100_set_cache_line(scsi_qla_host_t *), +qla2100_chip_diag(scsi_qla_host_t *), +qla2100_setup_chip(scsi_qla_host_t *), +qla2100_init_rings(scsi_qla_host_t *), +qla2100_fw_ready(scsi_qla_host_t *), +qla2100_nvram_config(scsi_qla_host_t *), +qla2200_nvram_config(scsi_qla_host_t *), +qla2100_mailbox_command(scsi_qla_host_t *, uint32_t, uint16_t *), +qla2100_update_device_data(scsi_qla_host_t *, device_data_t *, u_char), +qla2100_sns_device(scsi_qla_host_t *, u_char), +qla2100_update_fc_db(scsi_qla_host_t *, u_char), +qla2100_map_targets(scsi_qla_host_t *), +#if USE_FLASH +qla2100_get_database(scsi_qla_host_t *), +qla2100_save_database(scsi_qla_host_t *), +qla2100_program_flash_address(scsi_qla_host_t *, uint32_t, u_char), +qla2100_erase_flash_sector(scsi_qla_host_t *, uint32_t), +qla2100_poll_flash(scsi_qla_host_t *, uint32_t, u_char), +#endif +qla2100_loop_reset(scsi_qla_host_t *), +qla2100_device_reset(scsi_qla_host_t *, uint32_t, uint32_t), +qla2100_abort_device(scsi_qla_host_t *, uint32_t, uint32_t, uint32_t), +qla2100_abort_command(scsi_qla_host_t *, srb_t *), +qla2100_64bit_start_scsi(scsi_qla_host_t *, srb_t *), +qla2100_32bit_start_scsi(scsi_qla_host_t *, srb_t *), +qla2100_abort_isp(scsi_qla_host_t *), +qla2100_loop_resync(scsi_qla_host_t *); +STATIC uint8_t qla2100_cmd_wait(scsi_qla_host_t *ha); + +STATIC void qla2100_nv_write(scsi_qla_host_t *, uint16_t), +qla2100_nv_delay(void), +qla2100_poll(scsi_qla_host_t *), +qla2100_init_fc_db(scsi_qla_host_t *), +qla2100_init_tgt_map(scsi_qla_host_t *), +#if USE_FLASH +qla2100_flash_enable(scsi_qla_host_t *), +qla2100_flash_disable(scsi_qla_host_t *), +qla2100_write_flash_byte(scsi_qla_host_t *, uint32_t, u_char), +#endif +qla2100_reset_adapter(scsi_qla_host_t *), +qla2100_marker(scsi_qla_host_t *, uint32_t, uint32_t, uint32_t, +u_char), +qla2100_enable_lun(scsi_qla_host_t *), +qla2100_notify_ack(scsi_qla_host_t *, notify_entry_t *), +qla2100_64bit_continue_io(scsi_qla_host_t *, atio_entry_t *, + uint32_t, u_long *), +qla2100_32bit_continue_io(scsi_qla_host_t *, atio_entry_t *, + uint32_t, u_long *), +qla2100_isp_cmd(scsi_qla_host_t *), +qla2100_isr(scsi_qla_host_t *, srb_t **, srb_t **), +qla2100_rst_aen(scsi_qla_host_t *), +qla2100_atio_entry(scsi_qla_host_t *, atio_entry_t *), +qla2100_status_entry(scsi_qla_host_t *, sts_entry_t *, srb_t **, +srb_t **), +qla2100_error_entry(scsi_qla_host_t *, response_t *, srb_t **, +srb_t **), +qla2100_restart_queues(scsi_qla_host_t *, uint8_t), +qla2100_restart_watchdog_queue(scsi_qla_host_t *), +qla2100_abort_queues(scsi_qla_host_t *, uint8_t); + +STATIC uint16_t qla2100_get_nvram_word(scsi_qla_host_t *, uint32_t), +qla2100_nvram_request(scsi_qla_host_t *, uint32_t), +qla2100_read_flash_byte(scsi_qla_host_t *, uint32_t), +qla2100_debounce_register(volatile uint16_t *); + +STATIC request_t *qla2100_req_pkt(scsi_qla_host_t *); +STATIC request_t *qla2100_ms_req_pkt(scsi_qla_host_t *, srb_t *); +uint8_t qla2100_update_config(scsi_qla_host_t *ha); +STATIC uint8_t qla2100_configure_hba(scsi_qla_host_t *ha); +STATIC uint8_t qla2100_configure_loop(scsi_qla_host_t *ha, uint8_t ); +STATIC void qla2100_reset_chip(scsi_qla_host_t *ha); +#if QL2100_TARGET_MODE_SUPPORT +qla2100_enable_lun(scsi_qla_host_t *, uint8_t, uint32_t), +qla2100_notify_ack(scsi_qla_host_t *, notify_entry_t *), +qla2100_immed_notify(scsi_qla_host_t *, notify_entry_t *), +qla2100_accept_io(scsi_qla_host_t *, ctio_ret_entry_t *), +qla2100_64bit_continue_io(scsi_qla_host_t *, atio_entry_t *, uint32_t, + u_long *), +qla2100_32bit_continue_io(scsi_qla_host_t *, atio_entry_t *, uint32_t, + u_long *), +qla2100_atio_entry(scsi_qla_host_t *, atio_entry_t *), +qla2100_notify_entry(scsi_qla_host_t *, notify_entry_t *), + +#endif /* QLA2100_TARGET_MODE_SUPPORT */ +STATIC uint8_t qla2100_sns_get_name( scsi_qla_host_t *ha, device_data_t *device, uint8_t flag ); +STATIC void qla2100_display_fc_names(scsi_qla_host_t *ha); +void ql2100_dump_requests(scsi_qla_host_t *ha); +static void qla2100_get_properties(scsi_qla_host_t *ha, char *string); +STATIC uint8_t qla2100_find_propname(scsi_qla_host_t *ha, char *propname, char *propstr, char *db); +static int qla2100_get_prop_16chars(scsi_qla_host_t *ha, char *propname, char *propval, char *cmdline); +static char *qla2100_get_line(char *str, char *line); +void qla2100_check_fabric_devices(scsi_qla_host_t *ha); + +#ifdef FC_IP_SUPPORT + +/* Entry points for IP network driver */ +int qla2x00_ip_inquiry(uint16_t wAdapterNumber, BD_INQUIRY_DATA *pInquiryData); +int qla2x00_ip_enable(scsi_qla_host_t *ha, BD_ENABLE_DATA *pEnableData); +void qla2x00_ip_disable(scsi_qla_host_t *ha); +void qla2x00_add_buffers(scsi_qla_host_t *ha, uint16_t wBufferCount); +int qla2x00_send_packet(scsi_qla_host_t *ha, SEND_CB *pSendCB); + +static int qla2x00_ip_initialize(scsi_qla_host_t *ha); +static int qla2x00_add_new_ip_device(scsi_qla_host_t *ha, +uint16_t wLoopId, +uint8_t *pPortId, +uint8_t *pPortName, +int bForceAdd); +static int qla2x00_convert_to_arp(scsi_qla_host_t *ha, SEND_CB *pSendCB); +static void qla2x00_free_ip_block(scsi_qla_host_t *ha, +IP_DEVICE_BLOCK *pIpDevice); +static int qla2x00_get_ip_loopid(scsi_qla_host_t *ha, +uint8_t *pNodeName, +uint8_t *pLoopId); +static int qla2x00_send_farp_request(scsi_qla_host_t *ha, +uint8_t *pPortName); +static int qla2x00_register_ip_device(scsi_qla_host_t *ha); +static int qla2x00_reserve_ip_block(scsi_qla_host_t *ha, +PIP_DEVICE_BLOCK *pIpDevBlk); +static int qla2x00_update_ip_device_data(scsi_qla_host_t *ha, +device_data_t *pDeviceData); +static int qla2x00_reserve_loopid(scsi_qla_host_t *ha, uint16_t *pLoopId); +static void qla2x00_free_loopid(scsi_qla_host_t *ha, uint16_t wLoopId); +static int qla2x00_login_public_device(scsi_qla_host_t *ha, +uint16_t *pLoopId, +uint8_t *pPortID, +uint16_t wOptions); +static int qla2x00_logout_public_device(scsi_qla_host_t *ha, +uint16_t wLoopId, +uint16_t wOptions); +#else +/* v2.19.8 */ +static int qla2x00_login_public_device(scsi_qla_host_t *ha, +uint16_t *pLoopId, +uint8_t *pPortID, +uint16_t wOptions); +static int qla2x00_reserve_loopid(scsi_qla_host_t *ha, uint16_t *pLoopId); +static void qla2x00_free_loopid(scsi_qla_host_t *ha, uint16_t wLoopId); +#endif + +#if APIDEV +static int apidev_init(struct Scsi_Host*); +static int apidev_cleanup(void); +#endif + +void qla2100_print_q_info(scsi_lu_t *q); + +#if DEBUG_QLA2100 +#ifndef QL_DEBUG_ROUTINES +#define QL_DEBUG_ROUTINES +#endif +#endif +#ifdef QL_DEBUG_ROUTINES +/* +* Driver Debug Function Prototypes. +*/ +STATIC uint8_t qla2100_getbyte(uint8_t *); +STATIC uint16_t qla2100_getword(uint16_t *); +STATIC uint32_t qla2100_getdword(uint32_t *); +STATIC void qla2100_putbyte(uint8_t *, uint8_t), +qla2100_putword(uint16_t *, uint16_t), +qla2100_putdword(uint32_t *, uint32_t), +qla2100_print(int8_t *), +qla2100_output_number(u_long, uint8_t), +qla2100_putc(int8_t); +#endif +#if DEBUG_GET_FW_DUMP +STATIC void qla2300_dump_isp(scsi_qla_host_t *ha), +qla2100_dump_word(uint8_t *, uint32_t, uint32_t); +#endif + +/* Debug print buffer */ +char debug_buff[LINESIZE]; +#if DEBUG_QLA2100 +STATIC uint8_t ql2x_debug_print = 1; +#else +STATIC uint8_t ql2x_debug_print = 0; +#endif + +/* +* insmod needs to find the variable and make it point to something +*/ +static char *ql2xdevconf = NULL; +static int ql2xretrycount = 8; +#ifdef MODULE +static char *ql2xopts = NULL; +static int ql2xmaxqdepth = 0; +#if LINUX_VERSION_CODE > KERNEL_VERSION(2,1,18) + +/* insmod qla2100 ql2xopts=verbose" */ +MODULE_PARM(ql2xopts, "s"); +MODULE_PARM(ql2xmaxqdepth, "i"); +#endif +/* +* Just in case someone uses commas to separate items on the insmod +* command line, we define a dummy buffer here to avoid having insmod +* write wild stuff into our code segment +*/ +static char dummy_buffer[60] = "Please don't add commas in your insmod command!!\n"; + +#endif + +/* +* Macros to change names of OS remapping routines. +*/ +#if LINUX_VERSION_CODE < KERNEL_VERSION(2,1,0) +#define ioremap vremap +#define iounmap vfree +#endif + + +/* +* This is the pointer to the /proc/scsi/qla2100 code. +* access the driver. +*/ +#if LINUX_VERSION_CODE < KERNEL_VERSION(2,3,18) +#if CONFIG_PROC_FS +/* this definition is normally in proc_fs.h PROC_SCSI_QL2100 */ +#define PROC_SCSI_QL2100 PROC_SCSI_QLOGICISP + +struct proc_dir_entry proc_scsi_qla2100 = { +PROC_SCSI_QL2100, 7, "qla2x00", +S_IFDIR | S_IRUGO | S_IXUGO, 2, +0, 0, 0, NULL, NULL, NULL, NULL, NULL, NULL, NULL +}; +#endif +#endif +static int qla2100_lip = 0; + +#include +#include + +/* multi-OS QLOGIC IOCTL definition file */ +#include "qla2x00exioct.h" + + +#if QLA_SCSI_VENDOR_DIR +/* Include routine to set direction for vendor specific commands */ +#include "qlavendor.c" +#endif +/*********************************************************************** +* We use the Scsi_Pointer structure that's included with each command +* SCSI_Cmnd as a scratchpad for our SRB. This allows us to accept +* an unlimited number of commands. +* +* SCp will always point to the SRB structure (defined in qla2100.h). +* It is defined as follows: +* - SCp.ptr -- > pointer back to the cmd +* - SCp.this_residual --> used as forward pointer to next srb +* - SCp.buffer --> used as backward pointer to next srb +* - SCp.buffers_residual --> used as flags field +* - SCp.have_data_in --> not used +* - SCp.sent_command --> not used +* - SCp.phase --> not used +***********************************************************************/ +#define CMD_SP(Cmnd) (&(Cmnd)->SCp) +#define CMD_XFRLEN(Cmnd) (Cmnd)->request_bufflen +#define CMD_CDBLEN(Cmnd) (Cmnd)->cmd_len +#define CMD_CDBP(Cmnd) (Cmnd)->cmnd +#define CMD_SNSP(Cmnd) (Cmnd)->sense_buffer +#define CMD_SNSLEN(Cmnd) (sizeof (Cmnd)->sense_buffer) +#define CMD_RESULT(Cmnd) ((Cmnd)->result) +#define CMD_HANDLE(Cmnd) ((Cmnd)->host_scribble) +#define CMD_TIMEOUT(Cmnd) ((Cmnd)->timeout_per_command) + +#define DID_RETRY DID_ERROR + + +/* +* Macros use for debugging the driver. +*/ +#ifdef QL_DEBUG_LEVEL_3 +#define ENTER(x) sprintf(debug_buff,"qla2100 : Entering %s()\n\r", x); \ +qla2100_print(debug_buff); +#define LEAVE(x) sprintf(debug_buff,"qla2100 : Leaving %s()\n\r", x); \ +qla2100_print(debug_buff); +#define ENTER_INTR(x) sprintf(debug_buff,"qla2100 : Entering %s()\n\r", x); \ +qla2100_print(debug_buff); +#define LEAVE_INTR(x) sprintf(debug_buff,"qla2100 : Leaving %s()\n\r", x); \ +qla2100_print(debug_buff); +#define DEBUG3(x) x +#else +#define ENTER(x) +#define LEAVE(x) +#define ENTER_INTR(x) +#define LEAVE_INTR(x) +#define DEBUG3(x) +#endif + +#if QLA2100_COMTRACE +#define COMTRACE(x) qla2100_putc(x); +#else +#define COMTRACE(x) +#endif + +#if DEBUG_QLA2100 +#define DEBUG(x) x +#define DEBUG4(x) +#else +#define DEBUG(x) +#define DEBUG4(x) +#endif + +#ifdef QL_DEBUG_LEVEL_2 +#define DEBUG2(x) x +#else +#define DEBUG2(x) +#endif +#ifdef QL_DEBUG_LEVEL_5 +#define DEBUG5(x) x +#else +#define DEBUG5(x) +#endif + +uint8_t copyright[48] = "Copyright 1999-2001, Qlogic Corporation"; + +/****************************************************************************/ +/* LINUX - Loadable Module Functions. */ +/****************************************************************************/ + +/*****************************************/ +/* ISP Boards supported by this driver */ +/*****************************************/ +#define QLA2100_VENDOR_ID 0x1077 +#define QLA2100_DEVICE_ID 0x2100 +#define QLA2200_DEVICE_ID 0x2200 +#define QLA2200A_DEVICE_ID 0x2200A +#define QLA2300_DEVICE_ID 0x2300 +#define QLA2200A_RISC_ROM_VER 4 + +#define NUM_OF_ISP_DEVICES 4 + +typedef struct _qlaboards +{ +unsigned char bdName[9]; /* Board ID String */ +unsigned long device_id; /* Device ID */ +int numPorts; /* number of loops on adapter */ +unsigned short *fwcode; /* pointer to FW array */ +unsigned long *fwlen; /* number of words in array */ +unsigned short *fwstart; /* start address for F/W */ +unsigned char *fwver; /* Ptr to F/W version array */ +} qla_boards_t; + + +#if USE_TP_FW +struct _qlaboards QLBoardTbl_fc[NUM_OF_ISP_DEVICES] = +{ +/* Name , Board PCI Device ID, Number of ports */ +{"QLA2300 ", QLA2300_DEVICE_ID, MAX_BUSES, +#ifdef FC_IP_SUPPORT +&fw2300ip_code01[0], (unsigned long *)&fw2300ip_length01, &fw2300ip_addr01, &fw2300ip_version_str[0] }, +#else +&fw2300tp_code01[0], (unsigned long *)&fw2300tp_length01, &fw2300tp_addr01, &fw2300tp_version_str[0] }, +#endif +{"QLA2200 ", QLA2200_DEVICE_ID, MAX_BUSES, +#ifdef FC_IP_SUPPORT +&fw2200ip_code01[0], (unsigned long *)&fw2200ip_length01, &fw2200ip_addr01, &fw2200ip_version_str[0] }, +#else +&fw2200tp_code01[0], (unsigned long *)&fw2200tp_length01, &fw2200tp_addr01, &fw2200tp_version_str[0] }, +#endif +{"QLA2100 ", QLA2100_DEVICE_ID, MAX_BUSES, +&fw2100tp_code01[0], (unsigned long *)&fw2100tp_length01,&fw2100tp_addr01, &fw2100tp_version_str[0] }, +{" ", 0, 0} +}; + +#else /* USE_TP_FW */ + +struct _qlaboards QLBoardTbl_fc[NUM_OF_ISP_DEVICES] = +{ +/* Name , Board PCI Device ID, Number of ports */ +{"QLA2300 ", QLA2300_DEVICE_ID, MAX_BUSES, +#ifdef FC_IP_SUPPORT +&fw2300ip_code01[0], (unsigned long *)&fw2300ip_length01, &fw2300ip_addr01, &fw2300ip_version_str[0] }, +#else +&fw2300ef_code01[0], (unsigned long *)&fw2300ef_length01, &fw2300ef_addr01, &fw2300ef_version_str[0] }, +#endif +{"QLA2200 ", QLA2200_DEVICE_ID, MAX_BUSES, +#ifdef FC_IP_SUPPORT +&fw2200ip_code01[0], (unsigned long *)&fw2200ip_length01, &fw2200ip_addr01, &fw2200ip_version_str[0] }, +#else +&fw2200ef_code01[0], (unsigned long *)&fw2200ef_length01, &fw2200ef_addr01, &fw2200ef_version_str[0] }, +#endif +{"QLA2100 ", QLA2100_DEVICE_ID, MAX_BUSES, +&fw2100ef_code01[0], (unsigned long *)&fw2100ef_length01,&fw2100ef_addr01, &fw2100ef_version_str[0] }, +{" ", 0, 0} +}; +#endif /* USE_TP_FW */ + +/* +* Stat info +*/ +static struct _qla2100stats { +unsigned long mboxtout; /* mailbox timeouts */ +unsigned long mboxerr; /* mailbox errors */ +unsigned long ispAbort; /* ISP aborts */ +unsigned long debugNo; +unsigned long loop_resync; +unsigned long outarray_full; +unsigned long retry_q_cnt; +unsigned long done_q_cnt; +scsi_qla_host_t *irqhba; +} qla2100_stats; + +/* +* Command line options +*/ +static unsigned long qla2100_verbose = 1L; +static unsigned long qla2100_quiet = 0L; +static unsigned long qla2100_reinit = 1L; +static unsigned long qla2100_req_dmp = 0L; +static scsi_qla_host_t *qla2100_hostlist = NULL; + +#ifdef QLA2100_PROFILE +static int qla2100_buffer_size = 0; +static char *qla2100_buffer = NULL; +#endif + +#include +#include +#include + +/************************************************************************* +* qla2100_set_info +* +* Description: +* Set parameters for the driver from the /proc filesystem. +* +* Returns: +*************************************************************************/ +int +qla2100_set_info(char *buffer, int length, struct Scsi_Host *HBAptr) { + return (-ENOSYS); /* Currently this is a no-op */ +} + + +#include "qla2x00ioctl.c" + + +/************************************************************************* +* qla2100_proc_info +* +* Description: +* Return information to handle /proc support for the driver. +* +* inout : decides on the direction of the dataflow and the meaning of the +* variables +* buffer: If inout==FALSE data is being written to it else read from it +* (ptrs to a page buffer) +* *start: If inout==FALSE start of the valid data in the buffer +* offset: If inout==FALSE offset from the beginning of the imaginary file +* from which we start writing into the buffer +* length: If inout==FALSE max number of bytes to be written into the buffer +* else number of bytes in the buffer +* Returns: +*************************************************************************/ +#define PROC_BUF (&qla2100_buffer[len]) +int +qla2100_proc_info( char *buffer, char **start, off_t offset, int length, +int hostno, int inout) { +#if QLA2100_PROFILE + struct Scsi_Host *host; + scsi_qla_host_t *ha; + int size = 0; + scsi_lu_t *up; + int len = 0; + qla_boards_t *bdp; + uint32_t t, l; + +#if REQ_TRACE + Scsi_Cmnd *cp; + srb_t *sp; + int i; +#endif + + DEBUG5(printk("Entering proc_info 0x%x,0x%lx,0x%x,0x%x\n",(int)buffer,offset,length,hostno);) + host = NULL; + + /* Find the host that was specified */ + for( ha=qla2100_hostlist; (ha != NULL) && ha->host->host_no != hostno; ha=ha->next ) + ; + + /* if host wasn't found then exit */ + if( !ha ) { + size = sprintf(buffer, "Can't find adapter for host number %d\n", hostno); + if( size > length ) { + return (size); + } else { + return (0); + } + } + + host = ha->host; + + if( inout == TRUE ) /* Has data been written to the file? */ + { + printk(KERN_INFO "qla2100_proc: has data been written to the file. \n"); + return (qla2100_set_info(buffer, length, host)); + } + + + /* + * if our old buffer is the right size use it otherwise + * allocate a new one. + */ + size = 4096; /* get a page */ + if( qla2100_buffer_size != size ) { + /* deallocate this buffer and get a new one */ + if( qla2100_buffer != NULL ) { + kfree(qla2100_buffer); + qla2100_buffer_size = 0; + } + qla2100_buffer = kmalloc(size, GFP_KERNEL); + } + if( qla2100_buffer == NULL ) { + size = sprintf(buffer, "qla2100 - kmalloc error at line %d\n", + __LINE__); + return size; + } + /* save the size of our buffer */ + qla2100_buffer_size = size; + + /* start building the print buffer */ + bdp = &QLBoardTbl_fc[ha->devnum]; + qla2100_lip = 1; + size = sprintf(PROC_BUF, + "QLogic PCI to Fibre Channel Host Adapter for ISP2100/ISP2200/ISP2300:\n" /* 72 */ + " Firmware version: %2d.%02d.%02d, Driver version %s\n", /* 66 */ + bdp->fwver[0], bdp->fwver[1], bdp->fwver[2], QLA2100_VERSION); + len += size; + +#if 0 + size = sprintf(PROC_BUF, + "FC HBA: %s; HBA Serial# %x%x%x\n", + bdp->bdName, + ha->serial0, + ha->serial1, + ha->serial2); + len += size; + + size = sprintf(PROC_BUF, + "[%c%c%c%c%c%c]; Part#%c%c%c%c%c%c%c%c; FRU#%c%c%c%c%c%c%c%c; EC#%c%c%c%c%c%c%c%c\n", + ha->oem_string[0], + ha->oem_string[1], + ha->oem_string[2], + ha->oem_string[3], + ha->oem_string[4], + ha->oem_string[5], + + ha->oem_part[0], + ha->oem_part[1], + ha->oem_part[2], + ha->oem_part[3], + ha->oem_part[4], + ha->oem_part[5], + ha->oem_part[6], + ha->oem_part[7], + + ha->oem_fru[0], + ha->oem_fru[1], + ha->oem_fru[2], + ha->oem_fru[3], + ha->oem_fru[4], + ha->oem_fru[5], + ha->oem_fru[6], + ha->oem_fru[7], + + ha->oem_ec[0], + ha->oem_ec[1], + ha->oem_ec[2], + ha->oem_ec[3], + ha->oem_ec[4], + ha->oem_ec[5], + ha->oem_ec[6], + ha->oem_ec[7]); + len += size; +#endif + + size = sprintf(PROC_BUF, "Request Queue = 0x%lx, Response Queue = 0x%lx\n", + (long unsigned int)ha->request_dma, + (long unsigned int)ha->response_dma); + len += size; + size = sprintf(PROC_BUF, "Request Queue count= %ld, Response Queue count= %ld\n", + (long)REQUEST_ENTRY_CNT, + (long)RESPONSE_ENTRY_CNT); + len += size; + size = sprintf(PROC_BUF, "Number of pending commands = 0x%lx\n", ha->actthreads); + len += size; + size = sprintf(PROC_BUF, "Number of queued commands = 0x%lx\n", ha->qthreads); + len += size; + size = sprintf(PROC_BUF, "Number of free request entries = %d\n",ha->req_q_cnt); + len += size; + size = sprintf(PROC_BUF, "Number of mailbox timeouts = %ld\n",qla2100_stats.mboxtout); + len += size; + size = sprintf(PROC_BUF, "Number of ISP aborts = %ld\n",qla2100_stats.ispAbort); + len += size; + size = sprintf(PROC_BUF, "Number of loop resyncs = %ld\n",qla2100_stats.ispAbort); + len += size; + size = sprintf(PROC_BUF, "Number of retries for empty slots = %ld\n",qla2100_stats.outarray_full); + len += size; + size = sprintf(PROC_BUF, "Number of reqs in retry_q = %ld\n",qla2100_stats.retry_q_cnt); + len += size; + size = sprintf(PROC_BUF, "Number of reqs in done_q = %ld\n",qla2100_stats.done_q_cnt); + len += size; + +#if REQ_TRACE + if ( qla2100_req_dmp ) { + size = sprintf(PROC_BUF,"Outstanding Commands on controller:\n"); + len += size; + for( i=0; i < MAX_OUTSTANDING_COMMANDS; i++ ) { + if( (sp = ha->outstanding_cmds[i]) == NULL ) + continue; + if( (cp = sp->cmd) == NULL ) + continue; + size = sprintf(PROC_BUF, + "(%d): Pid=%ld, sp flags=0x%x, cmd=0x%p, state=%x handle=%x\n\r", + i, (int)sp->cmd->pid, (long)sp->flags, + CMD_SP(sp->cmd),(int)sp->state,CMD_HANDLE(sp->cmd)); + + len += size; + if( len >= qla2100_buffer_size ) + goto profile_stop; + } + } +#endif + + /* 2.25 node/port display to proc */ + /* Display the node name for adapter */ + size = sprintf(PROC_BUF, "\nSCSI Device Information:\n"); + len += size; + size = sprintf(PROC_BUF, + "scsi-qla%d-adapter-node=%02x%02x%02x%02x%02x%02x%02x%02x;\n", + (int)ha->instance, + ha->init_cb->node_name[0], + ha->init_cb->node_name[1], + ha->init_cb->node_name[2], + ha->init_cb->node_name[3], + ha->init_cb->node_name[4], + ha->init_cb->node_name[5], + ha->init_cb->node_name[6], + ha->init_cb->node_name[7]); + len += size; + + /* display the port name for adapter */ + size = sprintf(PROC_BUF, + "scsi-qla%d-adapter-port=%02x%02x%02x%02x%02x%02x%02x%02x;\n", + (int)ha->instance, + ha->init_cb->port_name[0], + ha->init_cb->port_name[1], + ha->init_cb->port_name[2], + ha->init_cb->port_name[3], + ha->init_cb->port_name[4], + ha->init_cb->port_name[5], + ha->init_cb->port_name[6], + ha->init_cb->port_name[7]); + len += size; + + /* Print out device port names */ + for (i = 0; i < MAX_FIBRE_DEVICES; i++) { + if (ha->fc_db[i].loop_id == PORT_UNUSED) + continue; + +#if USE_PORTNAME + size = sprintf(PROC_BUF, + "scsi-qla%d-target-%d=%02x%02x%02x%02x%02x%02x%02x%02x;\n", + (int)ha->instance, i, + ha->fc_db[i].wwn[0], + ha->fc_db[i].wwn[1], + ha->fc_db[i].wwn[2], + ha->fc_db[i].wwn[3], + ha->fc_db[i].wwn[4], + ha->fc_db[i].wwn[5], + ha->fc_db[i].wwn[6], + ha->fc_db[i].wwn[7]); +#else + size = sprintf(PROC_BUF, + "scsi-qla%d-target-%d=%02x%02x%02x%02x%02x%02x%02x%02x;\n", + (int)ha->instance, i, + ha->fc_db[i].name[0], + ha->fc_db[i].name[1], + ha->fc_db[i].name[2], + ha->fc_db[i].name[3], + ha->fc_db[i].name[4], + ha->fc_db[i].name[5], + ha->fc_db[i].name[6], + ha->fc_db[i].name[7]); +#endif + len += size; + } /* 2.25 node/port display to proc */ + + size = sprintf(PROC_BUF, "\nSCSI LUN Information:\n"); + len += size; + size = sprintf(PROC_BUF, "(Id:Lun)\n"); + len += size; + /* scan for all equipment stats */ + for (t = 0; t < MAX_FIBRE_DEVICES; t++) { + /* valid target */ + if (ha->fc_db[t].loop_id == PORT_UNUSED) + continue; + /* scan all luns */ + for( l = 0; l < ha->max_luns; l++ ) { + up = (scsi_lu_t *) GET_LU_Q(ha, 0, t, l); + if( up == NULL ) + continue; + if( up->io_cnt == 0 || up->io_cnt < 5) + continue; + /* total reads since boot */ + /* total writes since boot */ + /* total requests since boot */ + size = sprintf(PROC_BUF, "(%2d:%2d): Total reqs %ld,",t,l,up->io_cnt); + len += size; + /* current number of pending requests */ + size = sprintf(PROC_BUF, " Pending reqs %d,",up->q_outcnt); + len += size; + + /* current number of pending requests */ + size = sprintf(PROC_BUF, " Queued reqs %d,",(int)up->q_incnt); + len += size; + size = sprintf(PROC_BUF, "\n"); + len += size; + if( len >= qla2100_buffer_size ) + goto profile_stop; + } + if( len >= qla2100_buffer_size ) + break; + } + + profile_stop: + if( len >= qla2100_buffer_size ) { + printk(KERN_WARNING "qla2100: Overflow buffer in qla2100_proc.c\n"); + } + + if( offset > len - 1 ) { + kfree(qla2100_buffer); + qla2100_buffer = NULL; + qla2100_buffer_size = length = 0; + *start = NULL; + } else { + if( len - offset < length ) { + length = len - offset; + } +#if LINUX_VERSION_CODE < KERNEL_VERSION(2,3,18) + *start = &qla2100_buffer[offset]; /* Start of wanted data */ +#else + *start = buffer; + memcpy(buffer, &qla2100_buffer[offset], length); +#endif + } + return (length); +#else + return (0); +#endif + +} + +/************************************************************************** +* qla2100_detect +* +* Description: +* This routine will probe for Qlogic FC SCSI host adapters. +* It returns the number of host adapters of a particular +* type that were found. It also initialize all data necessary for +* the driver. It is passed-in the host number, so that it +* knows where its first entry is in the scsi_hosts[] array. +* +* Input: +* template - pointer to SCSI template +* +* Returns: +* num - number of host adapters found. +**************************************************************************/ +int +qla2100_detect(Scsi_Host_Template *template) +{ + struct Scsi_Host *host; + scsi_qla_host_t *ha, *cur_ha; + struct _qlaboards *bdp; + int i, j; +#if LINUX_VERSION_CODE < KERNEL_VERSION(2,3,18) + unsigned short subsys; +#endif +#if LINUX_VERSION_CODE <= KERNEL_VERSION(2,1,95) + unsigned int piobase; + unsigned char pci_bus, pci_devfn, pci_irq; + config_reg_t *cfgp = 0; +#endif + device_reg_t *reg; + char *cp; +#if LINUX_VERSION_CODE > KERNEL_VERSION(2,1,95) + struct pci_dev *pdev = NULL; +#else + int index; +#endif +#if LINUX_VERSION_CODE < KERNEL_VERSION(2,3,18) + struct semaphore sem = MUTEX_LOCKED; +#else + DECLARE_MUTEX_LOCKED(sem); +#endif + + unsigned long wait_switch = 0; + + ENTER("qla2100_detect"); + + if( sizeof(srb_t) > sizeof(Scsi_Pointer) ) + printk(KERN_WARNING "qla2x00: srb_t must be re-defined " + "- it's too big"); + +#ifdef CODECHECK + if( sizeof(srb_t) > sizeof(Scsi_Pointer) ) { + printk(KERN_WARNING "Redefine srb_t - its too big"); + return 0; + } +#endif + +#ifdef MODULE + DEBUG2(sprintf(debug_buff, + "DEBUG: qla2100_detect starts at address = 0x%8lx\n", + (uint32_t)qla2100_detect);) + DEBUG2(qla2100_print(debug_buff);) + /* + * If we are called as a module, the qla2100 pointer may not be null + * and it would point to our bootup string, just like on the lilo + * command line. IF not NULL, then process this config string with + * qla2100_setup + * + * Boot time Options + * To add options at boot time add a line to your lilo.conf file like: + * append="qla2100=verbose,tag_info:{{32,32,32,32},{32,32,32,32}}" + * which will result in the first four devices on the first two + * controllers being set to a tagged queue depth of 32. + */ + if( ql2xopts ) + qla2100_setup(ql2xopts, NULL); + if( dummy_buffer[0] != 'P' ) + printk(KERN_WARNING "qla2100: Please read the file " + "/usr/src/linux/drivers/scsi/README.qla2100\n" + "qla2100: to see the proper way to specify options to " + "the qla2100 module\n" + "qla2100: Specifically, don't use any commas when passing " + "arguments to\n" + "qla2100: insmod or else it might trash certain memory " + "areas.\n"); +#endif + +#if LINUX_VERSION_CODE < KERNEL_VERSION(2,3,18) + if( (int) !pcibios_present() ) +#else + if (!pci_present()) +#endif + { + printk(KERN_WARNING "scsi: [ERROR] PCI not present\n"); + return 0; + } /* end of IF */ + + bdp = &QLBoardTbl_fc[0]; + qla2100_hostlist = NULL; +#if LINUX_VERSION_CODE < KERNEL_VERSION(2,3,18) + template->proc_dir = &proc_scsi_qla2100; +#else + template->proc_name = "qla2x00"; +#endif + + /* Try and find each different type of adapter we support */ + for( i=0; bdp->device_id != 0 && i < NUM_OF_ISP_DEVICES; i++, bdp++ ) { + +#if LINUX_VERSION_CODE > KERNEL_VERSION(2,1,95) +#if LINUX_VERSION_CODE > KERNEL_VERSION(2,3,18) + /* PCI_SUBSYSTEM_IDS supported */ + while ((pdev = pci_find_subsys(QLA2100_VENDOR_ID, + bdp->device_id, PCI_ANY_ID, PCI_ANY_ID, pdev) )) { + if (pci_enable_device(pdev)) continue; +#else + while ((pdev = pci_find_device(QLA2100_VENDOR_ID, + bdp->device_id, pdev ) )) { +#endif /* 2,3,18 */ + +#else /* less than 2,1,95 */ + while (!(pcibios_find_device(QLA2100_VENDOR_ID, + bdp->device_id, index++, &pci_bus, &pci_devfn)) ) { +#endif /* 2,1,95 */ + + /* found an adapter */ +#if LINUX_VERSION_CODE > KERNEL_VERSION(2,3,18) + printk(KERN_INFO "qla2x00: detect() found an HBA\n"); + printk(KERN_INFO + "qla2x00: VID=%x DID=%x SSVID=%x SSDID=%x\n", + pdev->vendor, pdev->device, + pdev->subsystem_vendor, + pdev->subsystem_device); + + /* If it's an XXX SubSys Vendor ID adapter, skip it. */ + /* if (pdev->subsystem_vendor == PCI_VENDOR_ID_XXX) + { + printk(KERN_INFO "qla2x00: Skip XXX SubSys " + "Vendor ID Controller\n"); + continue; + } + */ +#else +#if LINUX_VERSION_CODE > KERNEL_VERSION(2,1,95) + pci_read_config_word(pdev, PCI_SUBSYSTEM_VENDOR_ID, + &subsys); + + /* Bypass all XXX SUBSYS VENDOR IDs */ + /* if (subsys == PCI_VENDOR_ID_XXX) + { + printk(KERN_INFO "qla2x00:Skip XXX SubSys " + "Vendor ID Controller\n"); + continue; + } + */ +#endif /* 2,1,95 */ +#endif /* 2,3,18 */ + host = scsi_register(template, sizeof(scsi_qla_host_t)); + ha = (scsi_qla_host_t *) host->hostdata; + + /* Clear our data area */ + for( j = 0, cp = (char *)ha; + j < sizeof(scsi_qla_host_t); j++, cp++ ) + *cp = 0; + + /* Sanitize the information from PCI BIOS. */ +#if LINUX_VERSION_CODE > KERNEL_VERSION(2,1,95) + host->irq = pdev->irq; +#if LINUX_VERSION_CODE < KERNEL_VERSION(2,3,18) + host->io_port = (unsigned long) pdev->base_address[0]; +#else + host->io_port = pdev->resource[0].start; +#endif + ha->pci_bus = pdev->bus->number; + ha->pci_device_fn = pdev->devfn; + ha->pdev = pdev; +#if LINUX_VERSION_CODE >= KERNEL_VERSION(2,4,4) + scsi_set_pci_device(host, pdev); +#endif +#else + pcibios_read_config_byte(pci_bus, pci_devfn, + OFFSET(cfgp->interrupt_line), &pci_irq); + pcibios_read_config_dword(pci_bus, pci_devfn, + OFFSET(cfgp->base_port), &piobase); + host->irq = pci_irq; + host->io_port = (unsigned int) piobase; + ha->pci_bus = pci_bus; + ha->pci_device_fn = pci_devfn; +#endif + ha->device_id = bdp->device_id; + host->io_port &= PCI_BASE_ADDRESS_IO_MASK; + ha->devnum = i; + if( qla2100_verbose ) { + printk(KERN_INFO "(scsi): Found a %s @ bus %d, " + "device 0x%x, irq %d, iobase 0x%lx\n", + bdp->bdName, ha->pci_bus, + (ha->pci_device_fn & 0xf8) >> 3, + host->irq, (unsigned long)host->io_port); + } + + ha->iobase = (device_reg_t *) host->io_port; + ha->iobase2300 = (device2300_reg_t *) host->io_port; + ha->host = host; + + /* 4.23 Initialize /proc/scsi/qla2x00 counters */ + ha->actthreads = 0; + ha->qthreads = 0; + ha->dump_done = 0; + ha->isp_aborts = 0; + ha->lip_count = 0; + + if( qla2100_mem_alloc(ha) ) { + printk(KERN_INFO "qla2100: Failed to allocate " + "memory for adapter\n"); + } + ha->prev_topology = 0; + ha->ports = bdp->numPorts; + ha->host_no = host->host_no; + + /* 4.10 */ +#if LINUX_VERSION_CODE < KERNEL_VERSION(2,3,18) + ha->ioctl_mem = (void *)KMALLOC(PAGE_SIZE); + ha->ioctl_mem_phys = VIRT_TO_BUS(ha->ioctl_mem); +#else + /* get consistent memory allocated for ioctl I/O + * operations + */ + ha->ioctl_mem = pci_alloc_consistent(ha->pdev, + PAGE_SIZE, &ha->ioctl_mem_phys); +#endif + + if (ha->ioctl_mem == NULL) { + printk(KERN_WARNING "qla2100: ERROR in ioctl " + "physical memory allocation\n"); + return(0); + } + + if( ha->device_id == QLA2100_DEVICE_ID ) + ha->max_targets = MAX_TARGETS_2100; + else + ha->max_targets = MAX_TARGETS_2200; + + /* load the F/W, read paramaters, and init the H/W */ + ha->instance = num_hosts; + + if( qla2100_initialize_adapter(ha) ) { + printk(KERN_WARNING + "qla2100_detect: [ERROR] Failed to " + "initialize adapter\n"); + + qla2100_mem_free(ha); + scsi_unregister(host); + continue; + } + + ha->next = NULL; + /* Mark preallocated Loop IDs in use. */ + ha->fabricid[SNS_FL_PORT].in_use = TRUE; + ha->fabricid[FABRIC_CONTROLLER].in_use = TRUE; + ha->fabricid[SIMPLE_NAME_SERVER].in_use = TRUE; + + /* Register our resources with Linux */ + if( qla2100_register_with_Linux(ha, bdp->numPorts-1) ) { + printk(KERN_WARNING + "qla2100: [ERROR] Failed to register our " + "resources\n"); + qla2100_mem_free(ha); + scsi_unregister(host); + continue; + } + + /* reg uses here in detect() are common: + * 2100/2200/2300 + */ + reg = ha->iobase; + + /* Disable ISP interrupts. */ + qla2100_disable_intrs(ha); + + /* + * Startup the kernel thread for this host adapter + */ + + ha->dpc_notify = &sem; + kernel_thread((int (*)(void *))qla2100_do_dpc, + (void *) ha, 0); + + /* + * Now wait for the kernel dpc thread to initialize + * and go to sleep. + */ + down(&sem); + ha->dpc_notify = NULL; + + /* + * These locks are used to prevent more than one + * CPU from modifying the queue at the same time. + * The higher level "io_request_lock" will reduce + * most contention for these locks. + */ + ha->retry_lock = SPIN_LOCK_UNLOCKED; + + /* Insure mailbox registers are free. */ + WRT_REG_WORD(®->semaphore, 0); + WRT_REG_WORD(®->host_cmd, HC_CLR_RISC_INT); + WRT_REG_WORD(®->host_cmd, HC_CLR_HOST_INT); + + /* Wait around max 5 secs for the devices to come + * on-line we don't want Linux scanning before we + * are ready. + */ + /* v2.19.5b6 */ + for (wait_switch = jiffies+(ha->loop_reset_delay * HZ); + wait_switch > jiffies && + !(ha->device_flags & DFLG_FABRIC_DEVICES) ; ) { + + qla2100_check_fabric_devices(ha); + } + /* just in case we turned it on */ + ha->dpc_flags &= ~COMMAND_WAIT_NEEDED; + + /* List the target we have found */ + qla2100_display_fc_names(ha); + + /* Enable chip interrupts. */ + qla2100_enable_intrs(ha); + + /* Insert new entry into the list of adapters */ + ha->next = NULL; + if( qla2100_hostlist == NULL ) { + qla2100_hostlist = ha; + } else { + cur_ha = qla2100_hostlist; + + while( cur_ha->next != NULL ) + cur_ha = cur_ha->next; + + cur_ha->next = ha; + } + num_hosts++; + } + } /* end of FOR */ + + LEAVE("qla2100_detect"); + return num_hosts; +} + +/************************************************************************** +* qla2100_register_with_Linux +* +* Description: +* Free the passed in Scsi_Host memory structures prior to unloading the +* module. +* +* Input: +* ha - pointer to host adapter structure +* maxchannels - MAX number of channels. +* +* Returns: +* 0 - Sucessfully reserved resources. +* 1 - Failed to reserved a resource. +**************************************************************************/ +STATIC uint8_t qla2100_register_with_Linux(scsi_qla_host_t *ha, uint8_t maxchannels) { + + struct Scsi_Host *host = ha->host; + char drvname[9]; + + host->can_queue = 0xfffff; /* unlimited */ + host->cmd_per_lun = 1; + host->select_queue_depths = qla2100_select_queue_depth; + host->n_io_port = 0xFF; +#if LINUX_VERSION_CODE < KERNEL_VERSION(2,3,18) + host->base = (unsigned char *) ha->mmpbase; +#else + host->base = (u_long) ha->mmpbase; +#endif + host->max_channel = maxchannels; + /* fix: 07/31 host->max_lun = MAX_LUNS-1; */ + host->max_lun = ha->max_luns; + host->unique_id = ha->instance; + host->max_id = ha->max_targets; + + /* set our host ID (need to do something about our two IDs) */ + host->this_id = 255; + + /* Register the I/O space with Linux */ + if( check_region(host->io_port, 0xff) ) { + printk(KERN_WARNING "qla2100 : [ERROR] Failed to reserved i/o region " + "0x%04lx-0x%04lx already in use\n", + host->io_port, host->io_port + 0xff); + /* 4.31.5 - deleted free_irq(host->irq, NULL); */ + return 1; + } + + /* ER# 4368 */ + sprintf(drvname,"qla2x00#%02d",host->unique_id); + + request_region(host->io_port, 0xff, drvname); + + + /* Register the IRQ with Linux (sharable) */ + if( request_irq(host->irq, qla2100_intr_handler, SA_INTERRUPT| SA_SHIRQ, "qla2x00", ha) ) { + printk(KERN_WARNING "qla2100 : [ERROR] Failed to reserved interrupt %d " + "already in use\n", host->irq); + return 1; + } + + /* Initialized the timer */ + START_TIMER(qla2100_timer,ha,WATCH_INTERVAL); + + return 0; +} + + +/************************************************************************** +* qla2100_release +* +* Description: +* Free the passed in Scsi_Host memory structures prior to unloading the +* module. +* +* Input: +* ha - pointer to host adapter structure +* +* Returns: +* 0 - Always returns good status +**************************************************************************/ +int +qla2100_release(struct Scsi_Host *host) { + scsi_qla_host_t *ha = (scsi_qla_host_t *) host->hostdata; + + ENTER("qla2100_release"); + /* if adpater is running and online */ + if( !ha->flags.online ) + return(0); + + /* turn-off interrupts on the card */ + qla2100_disable_intrs(ha); + + /* Detach interrupts */ + if( host->irq ) + free_irq(host->irq, ha); + + /* release io space registers */ + if( host->io_port ) + release_region(host->io_port, 0xff); + + /* Disable timer */ + if( ha->timer_active ) + STOP_TIMER(qla2100_timer,ha) + + /* Kill the kernel thread for this host */ + if( ha->dpc_handler != NULL ) { +#if LINUX_VERSION_CODE < KERNEL_VERSION(2,3,18) + struct semaphore sem = MUTEX_LOCKED; +#else + DECLARE_MUTEX_LOCKED(sem); +#endif + + ha->dpc_notify = &sem; + send_sig(SIGKILL, ha->dpc_handler, 1); + down(&sem); + ha->dpc_notify = NULL; + } +#if USE_FLASH + /* Move driver database to flash, if enabled. */ + if( ha->flags.enable_flash_db_update && ha->flags.updated_fc_db ) { + ha->flags.updated_fc_db = FALSE; + qla2100_save_database(ha); + } +#endif +#if MEMORY_MAPPED_IO + if( ha->mmpbase ) { + iounmap((void *) (((unsigned long) ha->mmpbase) & PAGE_MASK)); + } +#endif /* MEMORY_MAPPED_IO */ + +#if APIDEV + apidev_cleanup(); +#endif + + qla2100_mem_free(ha); + ha->flags.online = FALSE; + + LEAVE("qla2100_release"); + return(0); +} + +/************************************************************************** +* qla2100_info +* +* Description: +* +* Input: +* host - pointer to Scsi host adapter structure +* +* Returns: +* Return a text string describing the driver. +**************************************************************************/ +const char * +qla2100_info(struct Scsi_Host *host) { + static char qla2100_buffer[255]; + char *bp; + scsi_qla_host_t *ha; + qla_boards_t *bdp; + +#if APIDEV +/* We must create the api node here instead of qla2100_detect since we want + the api node to be subdirectory of /proc/scsi/qla2x00 which will not + have been created when qla2100_detect exits, but which will have been + created by this point. */ + + apidev_init(host); +#endif + bp = &qla2100_buffer[0]; + ha = (scsi_qla_host_t *)host->hostdata; + bdp = &QLBoardTbl_fc[ha->devnum]; + memset(bp, 0, sizeof(qla2100_buffer)); + sprintf(bp, + "QLogic %sPCI to Fibre Channel Host Adapter: bus %d device %d irq %d\n" + " Firmware version: %2d.%02d.%02d, Driver version %s", + (char *)&bdp->bdName[0], ha->pci_bus, (ha->pci_device_fn & 0xf8) >> 3, host->irq, + bdp->fwver[0], bdp->fwver[1], bdp->fwver[2], QLA2100_VERSION); + return(bp); +} + +/************************************************************************** +* qla1200_queuecommand +* +* Description: +* Queue a command to the controller. +* +* Input: +* cmd - pointer to Scsi cmd structure +* fn - pointer to Scsi done function +* +* Returns: +* 0 - Always +* +* Note: +* The mid-level driver tries to ensures that queuecommand never gets invoked +* concurrently with itself or the interrupt handler (although the +* interrupt handler may call this routine as part of request-completion +* handling). +**************************************************************************/ +int +qla2100_queuecommand(Scsi_Cmnd *cmd, void (*fn)(Scsi_Cmnd *)) { + scsi_qla_host_t *ha; + srb_t *sp; +#if LINUX_VERSION_CODE < KERNEL_VERSION(2,1,95) + unsigned long cpu_flags = 0; +#endif + struct Scsi_Host *host; + uint32_t b, t, l; + scsi_lu_t *q; + u_long handle; + + ENTER("qla2100_queuecommand"); + COMTRACE('C') + + host = cmd->host; + ha = (scsi_qla_host_t *) host->hostdata; + /* Get our SCSI request pointer + * SCp always point to it - see definition in qla2100.h. + */ + sp = (srb_t *) CMD_SP(cmd); + sp->cmd = cmd; + cmd->scsi_done = fn; + + /* If we not trying to do a recovery procedure of some sort + * then this is probably a new command. + */ + if( cmd->flags == 0 && + cmd->retries == 0 ) + sp->flags = 0; + + /* Generate LU queue on bus, target, LUN */ + b = SCSI_BUS_32(cmd); + t = SCSI_TCN_32(cmd); + l = SCSI_LUN_32(cmd); + + DEBUG5(qla2100_print_scsi_cmd(cmd);) + DEBUG5(sprintf(debug_buff,"qla2100_queuecmd: pid=%d, opcode=%d, timeout=%d\n",cmd->pid,cmd->cmnd[0],CMD_TIMEOUT(cmd));) + DEBUG5(qla2100_print(debug_buff);) + +#if defined(QL_DEBUG_LEVEL_2) || defined(QL_DEBUG_LEVEL_3) + /*DEBUG(sprintf(debug_buff,"\n\nQC: t=%x CDB=%x Size=%x\n\r", + t,cmd->cmnd[0],CMD_XFRLEN(cmd));) + DEBUG(qla2100_print(debug_buff)); */ +#endif + /* + * We found all the devices at LIP time, and created a device + * table for them, so we only need to check the table to see + * if the device is present. if PORT_AVAILABLE or PORT_UNUSED + * then no target exists. + * + * We return DID_NO_CONNECT if the loop is down after loop down + * timer has expired. + */ + if( TGT_Q(ha,b,t) == NULL || + (TGT_Q(ha,b,t) && TGT_Q(ha,b,t)->loop_id > LAST_SNS_LOOP_ID) ) { + /* DEBUG2(printk("scsi(%2d:%2d:%2d:%2d): port unavailable\n", + (int)ha->host_no,b,t,l);) */ + CMD_RESULT(sp->cmd) = DID_NO_CONNECT << 16; + qla2100_callback(ha,sp,FALSE); + LEAVE("qla2100_queuecommand"); + return(0); + } + /* v218b4 */ + if (ha->loop_down_timer == 0 && + ha->loop_state == LOOP_DOWN ){ /* 01/21/00 DG */ + DEBUG2(printk("scsi(%2d:%2d:%2d:%2d): Loop down - returning pid=%ld \n",(int)ha->host_no,b,t,l,cmd->pid);) + CMD_RESULT(sp->cmd) = DID_NO_CONNECT << 16; + ha->flags.done_requests_needed = TRUE; + qla2100_done_q_put(ha, sp, (srb_t **)&ha->done_q_first, (srb_t **)&ha->done_q_last); + LEAVE("qla2100_queuecommand"); + return(0); + } + + /* + * Allocate a LUN/DEVICE queue from this request if we haven't + * already did it on a previous command. + */ + if( (q = GET_LU_Q(ha, b, t,l)) == NULL ) { + DRIVER_LOCK + if( (q = qla2100_lun_alloc()) == NULL ) { + CMD_RESULT(sp->cmd) = DID_RETRY << 16; + qla2100_callback(ha,sp,FALSE); + return(0); + } + LU_Q(ha, b, t, l) = q; + DEBUG(sprintf(debug_buff,"Allocate new device queue 0x%x\n",q)); + DEBUG(qla2100_print(debug_buff)); + DRIVER_UNLOCK + } + + /* Set an invalid handle until we issue the command to ISP */ + /* then we will set the real handle value. */ + handle = INVALID_HANDLE; + CMD_HANDLE(cmd) = (unsigned char *)handle; + +#if QLA2100_EXT_TIMEOUT + /* Extend timeout for this request */ + qla2100_extend_timeout(cmd,60*HZ); +#endif + + /* + * SCSI Kluge + * ======== + * Whenever, we need to wait for an event such as loop down + * (i.e. loop_down_timer ) or port down (i.e. LUN request qeueue is + * suspended) then we will recycle new commands back to the SCSI layer. + * We do this because this is normally a temporary condition and we don't + * want the mid-level scsi.c driver to get upset and start aborting + * commands. + + * The timeout value is extracted from the command minus 1-second + * and put on a retry queue (watchdog). Once the command timeout it + * is returned to the mid-level with a BUSY status, so the mid-level + * will retry it. This process continues until the LOOP DOWN time + * expires or the condition goes away. + */ + if( ha->loop_down_timer || + ha->loop_state == LOOP_DOWN || + (PORT_DOWN(ha,t) > 0) || + ha->loop_state != LOOP_READY || + (q->q_flag & QLA2100_QSUSP) ) { + /* Insert command into watchdog queue */ + qla2100_timeout_insert(ha, sp); + LEAVE("qla2100_queuecommand"); + return (0); + } + /* Set retry count if this is a new command */ + if( sp->flags == 0 && + !(q->q_flag & QLA2100_QSUSP) ) { + sp->retry_count = ha->retry_count; + if( TGT_Q(ha, b, t)->down_timer == 0 ) + sp->port_down_retry_count = ha->port_down_retry_count; + } + + /* No timeout necessary, because the upper layer is doing it for us */ + sp->wdg_time = 0; + + /* add the command to our queue */ + ha->qthreads++; + qla2100_putq_t(q,sp); + + DEBUG5(sprintf(debug_buff,"\nQC: queue pid=%d, hndl=0x%x\n\r", + cmd->pid,handle)); + DEBUG5(qla2100_print(debug_buff)); + + /* send command to adapter */ + qla2100_restart_queues(ha,FALSE); + + COMTRACE('c') + LEAVE("qla2100_queuecommand"); + return (0); +} + +/************************************************************************** +* qla1200_abort +* +* Description: +* Abort the specified SCSI command. +* +* Input: +* cmd - pointer to Scsi cmd structure +* +* Returns: +**************************************************************************/ +int +qla2100_abort(Scsi_Cmnd *cmd) { + scsi_qla_host_t *ha; + srb_t *sp; + srb_t *rp, *rp_next; +#if LINUX_VERSION_CODE < KERNEL_VERSION(2,1,95) + unsigned long cpu_flags = 0; +#endif + struct Scsi_Host *host; + uint32_t b, t, l; + scsi_lu_t *q; + int return_status = SCSI_ABORT_SUCCESS; + int found = 0; + int i; + u_long handle; + + uint16_t data; + + ENTER("qla2100_abort"); + COMTRACE('A') + + ha = (scsi_qla_host_t *) cmd->host->hostdata; + host = cmd->host; + +#if DEBUG_GET_FW_DUMP + if (ha->device_id == QLA2300_DEVICE_ID) + { + if (ha->dump_done != 1) { + DEBUG(sprintf(debug_buff,"\nqla2100_abort handle=%x: >>>>>>> DUMP 2300 FW <<<<<<<\n",CMD_HANDLE(cmd));) + DEBUG(qla2100_print(debug_buff);) + qla2300_dump_isp(ha); + ha->dump_done = 1; + } + } +#endif + + DRIVER_LOCK + /* Get the SCSI request ptr */ + sp = (srb_t *) CMD_SP(cmd); + + /* + * if the handle is NULL then we already completed the command. + * We always give the handle a value of "INVALID_HANDLE" when + * we received it. + */ + if( (u_long) CMD_HANDLE(cmd) == 0L ) { + + DRIVER_UNLOCK +#if STOP_ON_ABORT + qla2100_panic("qla2100_abort",ha->host); +#endif + return(SCSI_ABORT_NOT_RUNNING); /* no action - we don't have command */ + } + + /* Check for a pending interrupt. */ + if (ha->device_id == QLA2300_DEVICE_ID) + data = qla2100_debounce_register((uint16_t *)&ha->iobase2300->host_status) & RISC_2300_INT; + else data = qla2100_debounce_register(&ha->iobase->istatus) & + RISC_INT; + + /* Check for pending interrupts. */ + if( !(ha->flags.in_isr) && (data)) { + /* Add any completed commands in the done queue */ + DEBUG(qla2100_print("qla2100_abort: Calling isr\n");) + qla2100_isr(ha, (srb_t **)&ha->done_q_first, (srb_t **)&ha->done_q_last); + } + + /* + * if no LUN queue then something is very wrong!!! + */ + handle = (u_long) CMD_HANDLE(cmd); + + /* Generate LU queue on bus, target, LUN */ + b = SCSI_BUS_32(cmd); + t = SCSI_TCN_32(cmd); + l = SCSI_LUN_32(cmd); + if( (q = GET_LU_Q(ha, b, t, l)) == NULL ) { + COMTRACE('a') + + DRIVER_UNLOCK + printk(KERN_WARNING "qla2100 (%d:%d:%d): No LUN queue for the specified device\n",(int)b,(int)t,(int)l); + return(SCSI_ABORT_NOT_RUNNING); /* no action - we don't have command */ + } + +#if AUTO_ESCALATE_ABORT + if( (sp->flags & SRB_ABORTED) ) { + DRIVER_UNLOCK + DEBUG(qla2100_print("qla2100_abort: Abort escalayted - returning SCSI_ABORT_SNOOZE.\n\r")); + return(SCSI_ABORT_SNOOZE); + } +#endif + /* + * if the command ahs a abort pending then tell the upper layer + */ + if( (sp->flags & SRB_ABORT_PENDING) ) { + COMTRACE('a') + DRIVER_UNLOCK + if( qla2100_verbose ) + printk(KERN_INFO "scsi(): Command has a pending abort " + "message - ABORT_PENDING.\n"); + DEBUG(qla2100_print("qla2100: Command has a pending abort message - ABORT_PENDING.\n\r")); + return(SCSI_ABORT_PENDING); + } + + DEBUG(sprintf(debug_buff,"ABORTing command= 0x%x, sp=%x sp->state=%x\n", + (int)cmd,sp,sp->state);) + DEBUG(qla2100_print(debug_buff);) + DEBUG(qla2100_print_scsi_cmd(cmd)); + + for( rp = ha->retry_q_first; (rp); rp = rp_next ) { + rp_next = rp->s_next; + if( sp != rp ) + continue; + qla2100_timeout_remove(ha, sp); + CMD_RESULT(sp->cmd) = DID_BUS_BUSY << 16; + CMD_HANDLE(sp->cmd) = (unsigned char *) NULL; + qla2100_done_q_put(ha, sp, (srb_t **)&ha->done_q_first, (srb_t **)&ha->done_q_last); + found++; + } + + /* + * Our SP pointer points at the command we want to remove from the + * LUN queue providing we haven't already sent it to the adapter. + */ + if( found ) + return_status = SCSI_ABORT_SUCCESS; + else if( !(sp->flags&SRB_SENT) ) { + found++; + DEBUG(sprintf(debug_buff,"qla2100: Cmd in LUN queue aborted pid %d.\n\r",sp->cmd->pid);) + DEBUG(qla2100_print(debug_buff);) + /* Remove srb from SCSI LU queue. */ + qla2100_removeq(q, sp); + sp->flags |= SRB_ABORTED; + CMD_RESULT(cmd) = DID_ABORT << 16; + qla2100_done_q_put(ha, sp, &ha->done_q_first, &ha->done_q_last); + return_status = SCSI_ABORT_SUCCESS; + found++; + } else { /* find the command in our active list */ + for( i = 1; i < MAX_OUTSTANDING_COMMANDS; i++ ) { + if( sp == ha->outstanding_cmds[i] ) { + found++; + DEBUG(sprintf(debug_buff, + "qla2100: RISC aborting pid %d sp->state=%x\n\r", + sp->cmd->pid,sp->state);) + DEBUG(qla2100_print(debug_buff);) + /* DEBUG(qla2100_print_scsi_cmd(cmd)); */ + DEBUG(qla2100_print_q_info(q);) + /* v2.19.8 Ignore abort request if port is down */ + if ( qla2100_abort_command(ha,sp) ) { + DEBUG(printk("qla2100: Failed to abort pid %ld.\n",sp->cmd->pid);) + return_status = SCSI_ABORT_NOT_RUNNING; /* no action */ + } + else + return_status = SCSI_ABORT_PENDING; + break; + } + } + } + +#if STOP_ON_ABORT + qla2100_panic("qla2100_abort",ha->host); +#endif + if( found == 0 ) + return_status = SCSI_ABORT_NOT_RUNNING; /* no action */ + + DEBUG(sprintf(debug_buff, "qla2100_abort: Aborted status returned = 0x%x.\n\r",return_status)); + DEBUG(qla2100_print(debug_buff)); + /* + * Complete any commands + */ + if( ha->done_q_first ) + qla2100_done(ha, (srb_t **)&ha->done_q_first, (srb_t **)&ha->done_q_last); + + if( found ) { + qla2100_restart_queues(ha,TRUE); + } + DRIVER_UNLOCK + + LEAVE("qla2100_abort"); + COMTRACE('a') + return(return_status); +} + +/************************************************************************** +* qla1200_reset +* +* Description: +* The reset function will reset the SCSI bus and abort any executing +* commands. +* +* Input: +* cmd = Linux SCSI command packet of the command that cause the +* bus reset. +* flags = SCSI bus reset option flags (see scsi.h) +* +* Returns: +* DID_RESET in cmd.host_byte of aborted command(s) +* +* Note: +* Resetting the bus always succeeds - is has to, otherwise the +* kernel will panic! Try a surgical technique - sending a BUS +* DEVICE RESET message - on the offending target before pulling +* the SCSI bus reset line. +**************************************************************************/ +int +qla2100_reset(Scsi_Cmnd *cmd, unsigned int flags) { + scsi_qla_host_t *ha; +#if LINUX_VERSION_CODE < KERNEL_VERSION(2,1,95) + unsigned long cpu_flags = 0; +#endif + uint32_t b, t, l; + srb_t *sp; + typedef enum { + ABORT_DEVICE = 1, + DEVICE_RESET = 2, + BUS_RESET = 3, + ADAPTER_RESET= 4, + RESET_DELAYED= 5, + FAIL = 6 + } action_t; + action_t action = ADAPTER_RESET; + uint16_t data; + scsi_lu_t *q; + int result; + + + ENTER("qla2100_reset"); + COMTRACE('R') + if( cmd == NULL ) { + printk(KERN_WARNING "(scsi?:?:?:?) Reset called with NULL Scsi_Cmnd " + "pointer, failing.\n"); + return(SCSI_RESET_SNOOZE); + } + ha = (scsi_qla_host_t *) cmd->host->hostdata; + sp = (srb_t *) CMD_SP(cmd); + +#if STOP_ON_RESET + sprintf(debug_buff,"ABORTing command= 0x%x\n",(int)cmd); + qla2100_print(debug_buff); + qla2100_print_scsi_cmd(cmd); + qla2100_panic("qla2100_reset",ha->host); +#endif + + + DRIVER_LOCK + if (ha->device_id == QLA2300_DEVICE_ID) + data = qla2100_debounce_register((uint16_t *)&ha->iobase2300->host_status) & + RISC_2300_INT; + else data = qla2100_debounce_register(&ha->iobase->istatus) & + RISC_INT; + + /* Check for pending interrupts. */ + if( !(ha->flags.in_isr) && (data) ) { + DEBUG(qla2100_print("qla2100_reset: Calling isr\n");) + qla2100_isr(ha, (srb_t **)&ha->done_q_first, (srb_t **)&ha->done_q_last); + } + DRIVER_UNLOCK + + /* + * Determine the suggested action that the mid-level driver wants + * us to perform. + */ + if( CMD_HANDLE(cmd) == (unsigned char *) 0 ) { + /* + * if mid-level driver called reset with a orphan SCSI_Cmnd + * (i.e. a command that's not pending ), so perform the + * function specified. + */ + /* 4.23 */ + if( (flags & SCSI_RESET_SUGGEST_HOST_RESET) ) + action = ADAPTER_RESET; + else if( flags & SCSI_RESET_SUGGEST_BUS_RESET ) + action = BUS_RESET; + else + action = DEVICE_RESET; + } else { /* + * Mid-level driver has called reset with this SCSI_Cmnd and + * its pending. + */ + if( flags & SCSI_RESET_SUGGEST_HOST_RESET ) + action = ADAPTER_RESET; + else if( flags & SCSI_RESET_SUGGEST_BUS_RESET ) + action = BUS_RESET; + else + action = DEVICE_RESET; + } + + b = SCSI_BUS_32(cmd); + t = SCSI_TCN_32(cmd); + l = SCSI_LUN_32(cmd); + q = GET_LU_Q(ha, b, t, l); + +#if AUTO_ESCALATE_RESET + if( (action & DEVICE_RESET) && (q->q_flag & QLA2100_QRESET) ) { + printk(KERN_INFO "qla2100(%d): Bus device reset already sent to " "device, escalating.\n", (int)ha->host_no); + action = BUS_RESET; + } + if( (action & DEVICE_RESET) && (sp->flags & SRB_ABORT_PENDING) ) { + printk(KERN_INFO "qla2100(%d):Have already attempted to reach " "device with abort device\n", (int)ha->host_no); + printk(KERN_INFO "qla2100(%d):message, will escalate to BUS " "RESET.\n",(int) ha->host_no); + action = BUS_RESET; + } +#endif + + /* + * By this point, we want to already know what we are going to do, + * so we only need to perform the course of action. + */ + + DRIVER_LOCK + result = SCSI_RESET_ERROR; + switch( action ) { + case FAIL: + break; + + case RESET_DELAYED: + result = SCSI_RESET_PENDING; + break; + + case ABORT_DEVICE: + if( qla2100_verbose ) + printk(KERN_INFO "scsi(%d:%d:%d:%d): ABORT DEVICE ISSUED.\n", (int)ha->host_no,(int)b,(int)t,(int)l); + qla2100_abort_queue_single(ha,b,t,l,DID_ABORT); + if( !ha->loop_down_timer ) + if( qla2100_abort_device(ha, b, t, l) == 0 ) + result = SCSI_RESET_PENDING; + break; + + case DEVICE_RESET: + if( qla2100_verbose ) + printk(KERN_INFO "scsi(%d:%d:%d:%d): DEVICE RESET ISSUED.\n",(int) ha->host_no,(int)b,(int)t,(int)l); + for( l = 0; l < ha->max_luns; l++ ) + qla2100_abort_queue_single(ha,b,t,l,DID_ABORT); + if( !ha->loop_down_timer ) + if( qla2100_device_reset(ha, b, t) == 0 ) + result = SCSI_RESET_PENDING; + q->q_flag |= QLA2100_QRESET; + break; + + case BUS_RESET: + if( qla2100_verbose ) + printk(KERN_INFO "scsi(%d:%d:%d:%d): LOOP RESET ISSUED.\n",(int) ha->host_no,(int)b,(int)t,(int)l); + for( t = 0; t < ha->max_targets; t++ ) + for( l = 0; l < ha->max_luns; l++ ) + qla2100_abort_queue_single(ha,b,t,l,DID_RESET); + if( !ha->loop_down_timer ) + if( qla2100_loop_reset(ha) == 0 ) + result = SCSI_RESET_SUCCESS | SCSI_RESET_BUS_RESET; + /* + * The reset loop routine returns all the outstanding commands back + * with "DID_RESET" in the status field. + */ + if( flags & SCSI_RESET_SYNCHRONOUS ) { + CMD_RESULT(cmd) = (int) (DID_BUS_BUSY << 16); + (*(cmd)->scsi_done)(cmd); + } + + /* ha->reset_start = jiffies; */ + break; + + case ADAPTER_RESET: + default: + if( qla2100_verbose ) { + printk(KERN_INFO "scsi(%d:%d:%d:%d): ADAPTER RESET ISSUED.\n",(int) ha->host_no,(int)b,(int)t,(int)l); + } + ha->flags.reset_active = TRUE; + /* + * We restarted all of the commands automatically, so the mid-level code can expect + * completions momentitarily. + */ + if( qla2100_abort_isp(ha) == 0 ) + result = SCSI_RESET_SUCCESS | SCSI_RESET_HOST_RESET; + + ha->flags.reset_active = FALSE; + } + + if( ha->done_q_first ) + qla2100_done(ha, (srb_t **)&ha->done_q_first, (srb_t **)&ha->done_q_last); + qla2100_restart_queues(ha,TRUE); + DRIVER_UNLOCK + + COMTRACE('r') + LEAVE("qla2100_reset"); + return(result); +} + +/************************************************************************** +* qla1200_biosparam +* +* Description: +* Return the disk geometry for the given SCSI device. +**************************************************************************/ +int +qla2100_biosparam(Disk *disk, kdev_t dev, int geom[]) { + int heads, sectors, cylinders; + + heads = 64; + sectors = 32; + cylinders = disk->capacity / (heads * sectors); + if( cylinders > 1024 ) { + heads = 255; + sectors = 63; + cylinders = disk->capacity / (heads * sectors); + } + + geom[0] = heads; + geom[1] = sectors; + geom[2] = cylinders; + + return (0); +} + +/************************************************************************** +* qla2100_intr_handler +* +* Description: +* Handles the actual interrupt from the adapter. +* +* Context: Interrupt +**************************************************************************/ +void +qla2100_intr_handler(int irq, void *dev_id, struct pt_regs *regs) { +#if LINUX_VERSION_CODE >= KERNEL_VERSION(2,1,95) + unsigned long cpu_flags = 0; +#endif + scsi_qla_host_t *ha; + uint16_t data; + device_reg_t *reg; + device2300_reg_t *reg2300; + + ENTER_INTR("qla2100_intr_handler"); + COMTRACE('I') + ha = (scsi_qla_host_t *) dev_id; + if( !ha ) { + printk(KERN_INFO "qla2100_intr_handler: NULL host ptr\n"); + COMTRACE('X') + return; + } + ha->isr_count++; + qla2100_stats.irqhba = ha; + +#if LINUX_VERSION_CODE >= KERNEL_VERSION(2,1,95) + /* Prevent concurrent access to adapters register */ + spin_lock_irqsave(&io_request_lock, cpu_flags); + qla2100_disable_intrs(ha); + + if (ha->device_id == QLA2300_DEVICE_ID) { + reg2300 = ha->iobase2300; + data = qla2100_debounce_register( + (uint16_t *)®2300->host_status) & RISC_2300_INT; + } else { + reg = ha->iobase; + data = qla2100_debounce_register(®->istatus) & + RISC_INT; + } + + /* Check for pending interrupts. */ + if( data ) { + /*DEBUG(qla2100_print("qla2100_intr_handler: Int active, Calling isr\n");)*/ + qla2100_isr(ha, + (srb_t **)&ha->done_q_first, + (srb_t **)&ha->done_q_last); + } + + if( ha->done_q_first ) + qla2100_done(ha, (srb_t **)&ha->done_q_first, (srb_t **)&ha->done_q_last); + + spin_unlock_irqrestore(&io_request_lock, cpu_flags); + qla2100_enable_intrs(ha); + + /* Wakeup the DPC routine */ + if( (!ha->flags.mbox_busy && (ha->flags.isp_abort_needed || + ha->flags.reset_marker || + ha->flags.update_config_needed || + ( !ha->flags.loop_resync_active && + ha->flags.loop_resync_needed) ) ) + && ha->dpc_wait && !ha->dpc_active ) { /* v2.19.4 */ + up(ha->dpc_wait); + } + +#else /* LINUX_VERSION_CODE < KERNEL_VERSION(2,1,95) */ + + /* Prevent concurrent access to istatus register */ + if( test_bit(QLA2100_IN_ISR_BIT, (int *)&ha->flags) ) { + COMTRACE('X') + DEBUG(printk("scsi%d: Already in interrupt - returning \n", (int)ha->host_no);) + return; + } + set_bit(QLA2100_IN_ISR_BIT, (int *)&ha->flags); + qla2100_disable_intrs(ha); + + if (ha->device_id == QLA2300_DEVICE_ID) { + reg2300 = ha->iobase2300; + data = qla2100_debounce_register( + (uint16_t *)®2300->host_status) & RISC_2300_INT; + } else { + reg = ha->iobase; + data = qla2100_debounce_register(®->istatus) & + RISC_INT; + } + + /* Check for pending interrupts. */ + if( data ) { + DEBUG(qla2100_print("qla2100_intr_handler_2: Int active, Calling isr\n");) + qla2100_isr(ha, + (srb_t **)&ha->done_q_first, + (srb_t **)&ha->done_q_last); + } + + if( ha->done_q_first ) + qla2100_done(ha, (srb_t **)&ha->done_q_first, (srb_t **)&ha->done_q_last); + + + /* Schedule the DPC routine */ + if( (ha->flags.isp_abort_needed || + ha->flags.reset_marker || + ( !ha->flags.loop_resync_active && + ha->flags.loop_resync_needed) || + ha->done_q_first ) && !ha->flags.dpc_sched ) { + + ha->run_qla_bh.data = (void *) ha; + ha->run_qla_bh.routine = qla2100_do_dpc; + + COMTRACE('P') + queue_task_irq(&ha->run_qla_bh,&tq_scheduler); + ha->flags.dpc_sched = TRUE; + } + clear_bit(QLA2100_IN_ISR_BIT, (int *)&ha->flags); + qla2100_enable_intrs(ha); +#endif + + COMTRACE('i') + LEAVE_INTR("qla2100_intr_handler"); +} + +/************************************************************************** +* qla2100_do_dpc +* This kernel thread is a task that is schedule by the interrupt handler +* to perform the background processing for interrupts. +* +* Notes: +* This task always run in the context of a kernel thread. It +* is kick-off by the driver's detect code and starts up +* up one per adapter. It immediately goes to sleep and waits for +* some fibre event. When either the interrupt handler or +* the timer routine detects a event it will one of the task +* bits then wake us up. +**************************************************************************/ +void +qla2100_do_dpc(void *p) { + scsi_qla_host_t *ha = (scsi_qla_host_t *) p; +#if LINUX_VERSION_CODE < KERNEL_VERSION(2,3,18) + struct semaphore sem = MUTEX_LOCKED; +#else + DECLARE_MUTEX_LOCKED(sem); +#endif + unsigned long flags; + srb_t *sp, *sp_next; + uint32_t b, t, l; + scsi_lu_t *q; + int status; + + lock_kernel(); + + /* + * If we were started as result of loading a module, close all of the + * user space pages. We don't need them, and if we didn't close them + * they would be locked into memory. + */ + exit_mm(current); + +#if LINUX_VERSION_CODE > KERNEL_VERSION(2,3,18) + + daemonize(); + +#endif + current->session = 1; + current->pgrp = 1; + /* + * FIXME(dg) this is still a child process of the one that did the insmod. + * This needs to be attached to task[0] instead. + */ + +#if LINUX_VERSION_CODE < KERNEL_VERSION(2,3,18) + siginitsetinv(¤t->blocked, SHUTDOWN_SIGS); +#else + siginitsetinv(¤t->blocked, sigmask(SIGKILL)); +#endif + current->fs->umask = 0; + + /* + * Set the name of this process. + */ + sprintf(current->comm, "qla2100_dpc_%d", (int)ha->host_no); + + ha->dpc_wait = &sem; + ha->dpc_handler = current; + + unlock_kernel(); + + /* + * Wake up the thread that created us. + */ + DEBUG(printk("qla2100_dpc: Wake up parent %d\n", ha->dpc_notify->count.counter)); + + up(ha->dpc_notify); + + while( 1 ) { + /* + * If we get a signal, it means we are supposed to go + * away and die. This typically happens if the user is + * trying to unload a module. + */ + DEBUG(printk("qla2100 %d: DPC handler sleeping\n",(int)ha->host_no)); + down_interruptible(&sem); + + if( signal_pending(current) ) + break; /* get out */ + + DEBUG(printk("qla2100 %d: DPC handler waking up\n",(int)ha->host_no);) + + if (ha->dpc_flags & COMMAND_WAIT_NEEDED) { + /* Release task daemon lock. */ + DEBUG(printk("Waiting on commands to complete\n");) + if( qla2100_cmd_wait(ha) ) + continue; + /* Acquire task daemon lock. */ + } + spin_lock_irqsave(&io_request_lock, flags); + ha->dpc_active = 1; + + /* Determine what action is necessary */ + + /* Flush all commands in watchdog queue */ + if( ha->flags.port_restart_needed ) { + DEBUG(qla2100_print("qla2100: DPC port restarting - flushing all cmds in watchdog queue.\n");) + ha->flags.port_restart_needed = FALSE; + for( sp = ha->retry_q_first; (sp != NULL); sp = sp_next ) { + sp_next = sp->s_next; + b = SCSI_BUS_32(sp->cmd); + t = SCSI_TCN_32(sp->cmd); + l = SCSI_LUN_32(sp->cmd); + if( (q = GET_LU_Q(ha, b, t,l)) == NULL || + !(q->q_flag & QLA2100_QSUSP) ) + continue; + q->q_flag &= ~QLA2100_QSUSP; + qla2100_timeout_remove(ha, sp); + CMD_RESULT(sp->cmd) = DID_BUS_BUSY << 16; + CMD_HANDLE(sp->cmd) = (unsigned char *) NULL; + qla2100_done_q_put(ha, sp, (srb_t **)&ha->done_q_first, (srb_t **)&ha->done_q_last); + } + + /* v2.19 - We want to wait until the end to + * return all requests back to OS. + */ + /* deleted: qla2100_restart_queues(ha, FALSE); */ + ha->flags.restart_queues_needed = TRUE; + } + + /* Process any pending mailbox commands */ + if( !ha->flags.mbox_busy ) { + if( ha->flags.isp_abort_needed ) { + DEBUG(printk("dpc: qla2100_abort_isp ha = %p\n", ha);) + ha->flags.isp_abort_needed = FALSE; + qla2100_abort_isp(ha); + } + + if( ha->flags.reset_marker ) { + DEBUG(printk("dpc: qla2100_reset_marker \n");) + qla2100_rst_aen(ha); + } + + if( ha->flags.update_config_needed ) { + DEBUG(printk("dpc: qla2100_update_config\n");) + qla2100_update_config(ha); + } + + /* v2.19.8 Retry each device up to login retry count */ + if ( (ha->device_flags & RELOGIN_NEEDED) && + !ha->loop_state != LOOP_DOWN ) { /* v2.19.5 */ + DEBUG(printk("dpc: qla2100_login\n");) + ha->device_flags &= ~RELOGIN_NEEDED; + for (t = 0; t < MAX_FIBRE_DEVICES; t++) { + /* check if fabric logic retry needed */ + if ( (ha->fc_db[t].flag & DEV_PUBLIC) && + (ha->fc_db[t].flag & DEV_RELOGIN) ) { + if ( PORT_DOWN(ha,t) ) { + PORT_DOWN(ha,t)--; + if ( (status = qla2x00_login_public_device(ha, + &ha->fc_db[t].loop_id, + &ha->fc_db[t].port_id[0], + (uint16_t) MBC_NO_PLOGI_IF_LOGGED_IN)) == QL_STATUS_SUCCESS ) { + DEBUG(printk("dpc: logged in ID %x\n",ha->fc_db[t].loop_id);) + /* restart ports */ + ha->fc_db[t].flag &= ~DEV_RELOGIN; + PORT_DOWN(ha,t) = 0; + } else if ( status == QL_STATUS_FATAL_ERROR ) { + ha->flags.isp_abort_needed = TRUE; + ha->fc_db[t].flag &= ~DEV_RELOGIN; + PORT_DOWN(ha,t) = 0; + } else { + /* retry the login again */ + ha->device_flags |= RELOGIN_NEEDED; + DEBUG(printk("dpc: Retry %d logged in ID %x\n",PORT_DOWN(ha,t), + ha->fc_db[t].loop_id);) + } + } + } + } + DEBUG(printk("dpc: qla2100_login_end.\n");) + } + + /* v2.19.5 */ + if ( (ha->device_flags & LOGIN_RETRY_NEEDED) && + !ha->loop_state != LOOP_DOWN ) { /* v2.19.5 */ + ha->device_flags &= ~LOGIN_RETRY_NEEDED; + DEBUG(printk("dpc: qla2100_login_retry\n");) + qla2100_loop_resync(ha); + DEBUG(printk("dpc: qla2100_login_retry end.\n");) + } + + /* v2.19.5b5 */ + if( ha->flags.loop_resync_needed ) { + if( (ha->device_flags & RSCN_UPDATE ) ) { + DEBUG(printk("dpc: qla2100_rscn_update\n");) + ha->device_flags &= ~RSCN_UPDATE; + } + else + DEBUG(printk("dpc: qla2100_loop_resync\n");) + qla2100_loop_resync(ha); + DEBUG(printk("dpc: qla2100_loop_resync/rscn_update done\n");) + } + + if( ha->flags.restart_queues_needed ) { + DEBUG(printk("dpc: calling qla2100_restart_queues\n");) + qla2100_restart_queues(ha,FALSE); + } + + if( ha->flags.abort_queue_needed ) { + DEBUG(printk("dpc: qla2100_abort_queues\n");) + qla2100_abort_queues(ha, FALSE); + } + if( !ha->interrupts_on ) + qla2100_enable_intrs(ha); + } + + if( ha->flags.done_requests_needed ) + ha->flags.done_requests_needed = FALSE; + + if( ha->done_q_first ) { + qla2100_done(ha, (srb_t **)&ha->done_q_first, (srb_t **)&ha->done_q_last); + } + + ha->dpc_active = 0; + + /* The spinlock is really needed up to this point. (DB) */ + spin_unlock_irqrestore(&io_request_lock, flags); + } + DEBUG(qla2100_print("dpc: DPC handler exiting\n");) + + /* + * Make sure that nobody tries to wake us up again. + */ + ha->dpc_wait = NULL; + ha->dpc_handler = NULL; + ha->dpc_active = 0; + + /* + * If anyone is waiting for us to exit (i.e. someone trying to unload + * a driver), then wake up that process to let them know we are on + * the way out the door. This may be overkill - I *think* that we + * could probably just unload the driver and send the signal, and when + * the error handling thread wakes up that it would just exit without + * needing to touch any memory associated with the driver itself. + */ + if( ha->dpc_notify != NULL ) + up(ha->dpc_notify); + + +} + +/************************************************************************** +* qla2100_device_queue_depth +* Determines the queue depth for a given device. There are two ways +* a queue depth can be obtained for a tagged queueing device. One +* way is the default queue depth which is determined by whether +* If it is defined, then it is used +* as the default queue depth. Otherwise, we use either 4 or 8 as the +* default queue depth (dependent on the number of hardware SCBs). +**************************************************************************/ +STATIC void qla2100_device_queue_depth(scsi_qla_host_t *p, Scsi_Device *device) { + int default_depth = 16; + + device->queue_depth = default_depth; + if( device->tagged_supported ) { + device->tagged_queue = 1; + device->current_tag = 0; +#ifdef MODULE + if( !(ql2xmaxqdepth == 0 || ql2xmaxqdepth > 256) ) + device->queue_depth = ql2xmaxqdepth; +#endif + + printk(KERN_INFO "scsi(%d:%d:%d:%d): Enabled tagged queuing, queue depth %d.\n", + (int)p->host_no, device->channel, device->id, + device->lun, device->queue_depth); + } else { + printk(KERN_WARNING "scsi(%d:%d:%d:%d):Device does not supoort tags queuing!!!.\n", + (int)p->host_no, device->channel, device->id, + device->lun); + } +} + +/************************************************************************** +* qla2100_select_queue_depth +* +* Description: +* Sets the queue depth for each SCSI device hanging off the input +* host adapter. We use a queue depth of 2 for devices that do not +* support tagged queueing. +**************************************************************************/ +STATIC void +qla2100_select_queue_depth(struct Scsi_Host *host, Scsi_Device *scsi_devs) { + Scsi_Device *device; + scsi_qla_host_t *p = (scsi_qla_host_t *) host->hostdata; + + ENTER("qla2100_select_queue_depth"); + for( device = scsi_devs; device != NULL; device = device->next ) { + if( device->host == host ) + qla2100_device_queue_depth(p, device); + } + LEAVE("qla2100_select_queue_depth"); +} + +/************************************************************************** +* ** Driver Support Routines ** +* +* qla2100_enable_intrs +* qla2100_disable_intrs +**************************************************************************/ +static inline void qla2100_enable_intrs(scsi_qla_host_t *ha) { + device_reg_t *reg; + + reg = ha->iobase; + ha->interrupts_on = 1; + /* enable risc and host interrupts */ + WRT_REG_WORD(®->ictrl, (ISP_EN_INT+ ISP_EN_RISC)); +} + +static inline void qla2100_disable_intrs(scsi_qla_host_t *ha) { + device_reg_t *reg; + + reg = ha->iobase; + ha->interrupts_on = 0; + /* disable risc and host interrupts */ + WRT_REG_WORD(®->ictrl, 0); +} + +#if LINUX_VERSION_CODE < KERNEL_VERSION(2,1,0) +/************************************************************************** +* mdelay +* Delay in milliseconds +* +**************************************************************************/ +STATIC inline void +mdelay(int milliseconds) { + int i; + + for( i=0; is_next) ) + *done_q_last = NULL; + else + (*done_q_first)->s_prev = NULL; + qla2100_stats.done_q_cnt--; + DEBUG(sp->state = 5;) +#if LINUX_VERSION_CODE < KERNEL_VERSION(2,1,95) + DRIVER_UNLOCK +#endif + QLA2100_TIMER_UNLOCK(ha); + cmd = sp->cmd; + b = SCSI_BUS_32(cmd); + t = SCSI_TCN_32(cmd); + l = SCSI_LUN_32(cmd); + q = GET_LU_Q(ha, b, t, l); + + /* Decrement outstanding commands on device. */ + if( q->q_outcnt ) + q->q_outcnt--; + if( q->q_outcnt < ha->hiwat ) { + q->q_flag &= ~QLA2100_QBUSY; + } + + q->io_cnt++; + + switch( (CMD_RESULT(cmd)>>16) ) { + case DID_RESET: + q->q_flag &= ~QLA2100_QRESET; + /* Issue marker command. */ + qla2100_marker(ha, b, t, 0, MK_SYNC_ID); + break; + case DID_ABORT: + sp->flags &= ~SRB_ABORT_PENDING; + sp->flags |= SRB_ABORTED; + if( sp->flags & SRB_TIMEOUT ) + CMD_RESULT(sp->cmd)= DID_TIME_OUT << 16; + break; + default: + break; + } + + /* 4.10 64 and 32 bit */ + /* Release memory used for this I/O */ +#if LINUX_VERSION_CODE >= KERNEL_VERSION(2,3,18) + if (cmd->use_sg) { + /* DEBUG(sprintf(debug_buff, + "S/G unmap_sg cmd=%x\n\r",cmd);) + DEBUG(qla2100_print(debug_buff)); */ + pci_unmap_sg(ha->pdev, cmd->request_buffer, + cmd->use_sg, + scsi_to_pci_dma_dir(cmd->sc_data_direction)); + } + else if (cmd->request_bufflen) { + /* DEBUG(sprintf(debug_buff, + "No S/G unmap_single cmd=%x saved_dma_handle=%lx\n\r", + cmd,sp->saved_dma_handle);) + DEBUG(qla2100_print(debug_buff);) */ + pci_unmap_single(ha->pdev,sp->saved_dma_handle, + cmd->request_bufflen, + scsi_to_pci_dma_dir(cmd->sc_data_direction)); + } +#endif + /* Call the mid-level driver interrupt handler */ + /* DEBUG(sprintf(debug_buff," [%d] ",cmd->pid);) + DEBUG(qla2100_print(debug_buff);) */ + + qla2100_callback(ha,sp,TRUE); + qla2100_next(ha, q); + } + + + COMTRACE('d') + /* LEAVE("qla2100_done"); */ +} + +/************************************************************************** +* qla2100_return_status +* Translates a ISP error to a Linux SCSI error +**************************************************************************/ +STATIC int qla2100_return_status(scsi_qla_host_t *ha, + sts_entry_t *sts, Scsi_Cmnd *cp) { + int host_status = DID_ERROR; + int scsi_status; + int comp_status; + unsigned resid; + srb_t *sp; + uint32_t t; + uint8_t *strp; + scsi_lu_t *up; + +#if DEBUG_QLA2100_INTR + STATIC char *reason[] = { + "DID_OK", + "DID_NO_CONNECT", + "DID_BUS_BUSY", + "DID_TIME_OUT", + "DID_BAD_TARGET", + "DID_ABORT", + "DID_PARITY", + "DID_ERROR", + "DID_RESET", + "DID_BAD_INTR" + }; +#endif /* DEBUG_QLA2100_INTR */ + + ENTER("qla2100_return_status"); + +#if DEBUG_QLA2100_INTR + /* + DEBUG(printk("qla2100: compl status = 0x%04x\n", sts->comp_status)); + */ +#endif + scsi_status = sts->scsi_status; + comp_status = sts->comp_status; + sp = (srb_t *) CMD_SP(cp); + + if( (scsi_status & SS_RESIDUAL_OVER) ) + comp_status = CS_DATA_OVERRUN; + else if( (scsi_status & SS_RESPONSE_INFO_LEN_VALID) && + sts->rsp_info[3] == (uint8_t) 0 ) + comp_status = CS_COMPLETE; + + /* If scanning and missing lun then let the scsi layer skip it */ + /* 4.24 dg 01/18/2001 */ + if( cp->cmnd[0] == 0x12 && + cp->lun == 0 ) { /* inquiry */ + strp = (uint8_t *)cp->request_buffer; + up = (scsi_lu_t *) GET_LU_Q(ha, 0, cp->target, cp->lun); + if( *strp == 0x7f && up->io_cnt < 5) { + /* Make lun unassigned and wrong type */ + *strp = 0x23; + } + } + + switch( comp_status ) { + case CS_COMPLETE: + host_status = DID_OK; + /* v2.19.5b2 Reset port down retry on success. */ + sp->port_down_retry_count = ha->port_down_retry_count; + break; + case CS_PORT_UNAVAILABLE: + /* release target data structure */ + host_status = DID_NO_CONNECT; + DEBUG(sprintf(debug_buff,"scsi: Unavail port detected 0x%x-0x%x.\n", + sts->comp_status, sts->scsi_status); ) + DEBUG(qla2100_print(debug_buff);) + break; + case CS_PORT_LOGGED_OUT: + case CS_PORT_CONFIG_CHG: + case CS_PORT_BUSY: + case CS_INCOMPLETE: + host_status = DID_NO_CONNECT; + DEBUG(sprintf(debug_buff,"scsi: Port Error detected 0x%x-0x%x.\n", + sts->comp_status, sts->scsi_status); ) + DEBUG(qla2100_print(debug_buff);) + break; + case CS_RESET: + host_status = DID_RESET; + break; + case CS_ABORTED: + /* v2.19.12 - DID_ABORT does not retry the request */ + /* if we aborted this request then abort otherwise it must be a reset */ + if ( (sp->flags & SRB_ABORT_PENDING) ) + host_status = DID_ABORT; + else + host_status = DID_RESET; + break; + case CS_TIMEOUT: + host_status = DID_ERROR; + /* v2.19.8 if timeout then check to see if logout occurred*/ + t = SCSI_TCN_32(cp); + if ( (ha->fc_db[t].flag & DEV_PUBLIC) && + (sts->status_flags & IOCBSTAT_SF_LOGO) ) { + ha->fc_db[t].flag |= DEV_RELOGIN; + DEBUG(printk("scsi: Timeout occurred with Logo, status flag (%x) with public device loop id (%x), attempt new recovery\n", + sts->status_flags, ha->fc_db[t].loop_id);) + /* Suspend port */ + PORT_DOWN(ha,t) = ha->port_down_retry_count; + ha->device_flags |= RELOGIN_NEEDED; + } + break; + case CS_DATA_UNDERRUN: + resid = sts->residual_length; + /* if RISC reports underrun and target does not report it + * then we must have a lost frame, so tell upper layer + * to retry it by reporting an error. + */ + if( !(sts->scsi_status & SS_RESIDUAL_UNDER) ) { + resid = (unsigned)(CMD_XFRLEN(cp)); + } + + if( (unsigned)(CMD_XFRLEN(cp) - resid) < cp->underflow ) { + host_status = DID_ERROR; + DEBUG3(sprintf(debug_buff,"scsi: Underflow detected - retrying command.\n");) + DEBUG3(qla2100_print(debug_buff);) + } else { + /* v2.19.5b2 Reset port down retry on success. */ + sp->port_down_retry_count = ha->port_down_retry_count; + host_status = DID_OK; + } + break; + + default: + DEBUG3(printk("scsi: Error detected 0x%x-0x%x.\n", + sts->comp_status, sts->scsi_status);) + host_status = DID_ERROR; + break; + } + +#if DEBUG_QLA2100_INTR + sprintf(debug_buff, "qla2100 ISP status: host status (%s) scsi status %x\n\r", reason[host_status], scsi_status); + DEBUG(qla2100_print(debug_buff);) +#endif + + LEAVE("qla2100_return_status"); + + return ((scsi_status & STATUS_MASK) | (host_status << 16) ); +} + +/* +* qla2100_done_q_put +* Place SRB command on done queue. +* +* Input: +* ha = host pointer +* sp = srb pointer. +* done_q_first = done queue first pointer. +* done_q_last = done queue last pointer. +*/ +STATIC void +qla2100_done_q_put(scsi_qla_host_t *ha, srb_t *sp, srb_t **done_q_first, srb_t **done_q_last) { + + unsigned long cpu_flags = 0; + +#ifdef QL_DEBUG_LEVEL_3 + ENTER("qla2100_put_done_q"); +#endif +#if LINUX_VERSION_CODE < KERNEL_VERSION(2,1,95) + DRIVER_LOCK +#else + QLA2100_TIMER_LOCK(ha); +#endif + /* Place block on done queue */ + sp->s_next = NULL; + sp->s_prev = *done_q_last; + if( !*done_q_first ) + *done_q_first = sp; + else + (*done_q_last)->s_next = sp; + *done_q_last = sp; + + qla2100_stats.done_q_cnt++; + DEBUG(sp->state = 3;) +#if LINUX_VERSION_CODE < KERNEL_VERSION(2,1,95) + DRIVER_LOCK +#else + QLA2100_TIMER_UNLOCK(ha); +#endif + +#ifdef QL_DEBUG_LEVEL_3 + LEAVE("qla2100_put_done_q"); +#endif +} + + +/************************************************************************** +* qla2100_timer +* +* Description: +* One second timer +* +* Context: Interrupt +**************************************************************************/ +STATIC void +qla2100_timer(scsi_qla_host_t *ha) { + + srb_t *sp, *sp_next; + int stop_timer, kick_off = 0; + int cnt; + int t; + /* unsigned long cpu_flags = 0; */ + + + /* ENTER("qla2100_timer"); */ + + /* v2.19.02 spin_lock_irqsave(&io_request_lock, cpu_flags); */ + + stop_timer = 0; + + for( t = 0; t < ha->max_targets; t++ ) { + if( TGT_Q(ha, 0, t) == NULL ) + continue; + if( TGT_Q(ha, 0, t)->down_timer > 0 ) + TGT_Q(ha, 0, t)->down_timer--; + } + + /* Port Down Handler. */ + if( ha->queue_restart_timer > 0 ) { + ha->queue_restart_timer--; +#ifdef TRACECODE + sprintf(debug_buff,"timer: Port down time in secs %d\n",ha->queue_restart_timer); + qla2100_print(debug_buff); +#endif + /* + * When a port goes DOWN, we suspend the queue and wait 1 second + * (one timer tick) before trying to kick off the commands again. + * We will do this for "port_down_retry_count" times per + * command before giving up on the command altogether. + */ + if( !ha->queue_restart_timer ) { + ha->flags.port_restart_needed = TRUE; + DEBUG(qla2100_print("qla2100_timer: Port Down complete - restarting commands in the queues\n");) + stop_timer++; + } + } + /* Loop down handler. */ + if( ha->loop_down_timer > 0 && + !ha->flags.abort_isp_active && + ha->flags.online ) { + if( ha->loop_down_timer == LOOP_DOWN_TIME ) { + DEBUG(printk("qla2100_timer: Loop Down time expired - aborting the queues before time expire\n");) +#ifdef TRACECODE + qla2100_print("qla2100_timer: Loop Down - aborting the queues before time expire\n"); +#endif +#if 1 + ha->flags.abort_queue_needed = TRUE; +#else + qla2100_abort_queues(ha, TRUE); +#endif + } + + ha->loop_down_timer--; +#ifdef TRACECODE + sprintf(debug_buff,"qla2100_timer: Loop Down - seconds remainning %d\n",ha->loop_down_timer); + qla2100_print(debug_buff); +#endif + /* if the loop has been down for 4 minutes on QLA2100, + reinit adapter */ + if( !ha->loop_down_timer ) { +#ifdef TRACECODE + qla2100_print("qla2100_timer: Loop down for 4 mins \n"); +#endif + DEBUG(printk("qla2100_timer: Loop down exceed 4 mins -restarting queues and abort ISP.\n");) + ha->flags.restart_queues_needed = TRUE; + if ( (ha->device_id == QLA2100_DEVICE_ID) && + (qla2100_reinit == 1 )) + ha->flags.isp_abort_needed = TRUE; + stop_timer++; + } + } + + /* + * Retry Handler -- This handler will recycle queued requests until the + * temporary loop down condition terminates. + */ + if( !ha->flags.abort_isp_active ) { +#ifdef TRACECODE + if( ha->retry_q_first ) + qla2100_print("qla2100_timer: Scanning for timed out commands\n"); +#endif + for( cnt=0, sp = ha->retry_q_first; (sp); sp = sp_next ) { + if( sp->wdg_time ) + sp->wdg_time--; + sp_next = sp->s_next; + if( sp->wdg_time == 0 ) { + kick_off++; + DEBUG3(sprintf(debug_buff,"timer: CMD timeout %p, pid %d\n",sp, sp->cmd->pid);) + DEBUG3(qla2100_print(debug_buff);) + cnt++; + qla2100_timeout_remove(ha, sp); + CMD_RESULT(sp->cmd) = DID_BUS_BUSY << 16; + CMD_HANDLE(sp->cmd) = (unsigned char *) NULL; + qla2100_done_q_put(ha, sp, (srb_t **)&ha->done_q_first, (srb_t **)&ha->done_q_last); + } + } + + if( cnt > 0 ) { + DEBUG2(sprintf(debug_buff,"timer: found %d requests\n",cnt);) + DEBUG2(qla2100_print(debug_buff);) + } + } + + if( ha->done_q_first ) + ha->flags.done_requests_needed = TRUE; + + if( ha->dpc_flags & ISP_RESET_NEEDED) { + ha->dpc_flags &= ~ISP_RESET_NEEDED; + ha->flags.isp_abort_needed = TRUE; + } + + +#if QLA2100_LIPTEST + if( (ha->forceLip++) == (60*3) && qla2100_lip) { + /* qla2100_loop_reset(ha); */ + qla2100_abort_isp(ha); + ha->forceLip = 0; + } +#endif + /* v2.19.02 spin_unlock_irqrestore(&io_request_lock, cpu_flags); */ + + /* Schedule the DPC routine if needed */ + if( ( ha->flags.isp_abort_needed || + (!ha->flags.loop_resync_active && ha->flags.loop_resync_needed) || + ha->flags.restart_queues_needed || + ha->flags.port_restart_needed || + ha->flags.done_requests_needed || + (ha->device_flags & RELOGIN_NEEDED) || + (ha->dpc_flags & COMMAND_WAIT_NEEDED) || + (ha->device_flags & LOGIN_RETRY_NEEDED) || + kick_off > 0 || + ha->flags.abort_queue_needed ) && + ha->dpc_wait && !ha->dpc_active ) { /* v2.19.4 */ + up(ha->dpc_wait); + } + + /* IOCTL SCSI Pass Thru Handler. */ + if (ha->IoctlPassThru_InProgress) { + if (ha->ioctl_timer) ha->ioctl_timer--; + } + + /* IOCTL FCCT Pass Thru Handler. */ + if (ha->IoctlPassFCCT_InProgress) { + if (ha->ioctl_timer) ha->ioctl_timer--; + } + + /* ha->flags.watchdog_enabled = FALSE; */ + RESTART_TIMER(qla2100_timer,ha,WATCH_INTERVAL); + + /* LEAVE("qla2100_timer"); */ +} + +/* +* qla2100_timeout_insert +* Function used to insert a command block onto the +* watchdog timer queue. +* +* Note: Must insure that sc_time is not zero +* before calling qla2100_timeout_insert. +* +* Input: +* ha = adapter block pointer. +* sp = srb pointer. +*/ +STATIC void +qla2100_timeout_insert(scsi_qla_host_t *ha, srb_t *sp) { + unsigned long cpu_flags = 0; + uint8_t timeoutcnt; + +#ifdef QL_DEBUG_LEVEL_3 + /* ENTER("qla2100_timeout_insert"); */ +#endif + + /* Compute number of time intervals */ + timeoutcnt = (uint8_t) (CMD_TIMEOUT(sp->cmd)/(WATCH_INTERVAL * HZ)); + if( timeoutcnt >= 3 ) /* 3 or more */ + /* sp->wdg_time = timeoutcnt - 3; */ + sp->wdg_time = 3; + else + sp->wdg_time = 1; + + DEBUG3(sprintf(debug_buff,"Watchdog (insert) - pid=%d, tmo=%d \n",sp->cmd->pid,sp->wdg_time);) + DEBUG3(qla2100_print(debug_buff);) + + /* Acquire watchdoq queue specific lock */ +#if LINUX_VERSION_CODE < KERNEL_VERSION(2,1,95) + DRIVER_LOCK +#else + QLA2100_TIMER_LOCK(ha); +#endif + /* Add command to queue */ + if (ha->retry_q_first == NULL) { + ha->retry_q_first = sp; + ha->retry_q_last = sp; + } else { + ha->retry_q_last->s_next = sp; + ha->retry_q_last = sp; + } + sp->s_next = NULL; + qla2100_stats.retry_q_cnt++; + sp->state = 0xd0; + + sp->flags |= SRB_WATCHDOG; + ha->flags.watchdog_enabled = TRUE; + + /* Release watchdog queue specific lock */ +#if LINUX_VERSION_CODE < KERNEL_VERSION(2,1,95) + DRIVER_UNLOCK +#else + QLA2100_TIMER_UNLOCK(ha); +#endif + +#ifdef QL_DEBUG_LEVEL_3 + /* LEAVE("qla2100_timeout_insert"); */ +#endif +} + +/* +* qla2100_timeout_remove +* Function used to remove a command block from the +* watchdog timer queue. +* +* Note: Must insure that command is on watchdog +* list before calling qla2100_timeout_remove. +* if (sp->flags & SRB_WATCHDOG) +* +* Input: +* ha = adapter block pointer. +* sp = srb pointer. +*/ +STATIC void +qla2100_timeout_remove(scsi_qla_host_t *ha, srb_t *sp) { + unsigned long cpu_flags = 0; + srb_t *nextsp; + +#ifdef QL_DEBUG_LEVEL_3 + /* ENTER("qla2100_timeout_remove"); */ +#endif + + DEBUG3(sprintf(debug_buff,"Watchdog (remove) pid=%d time%d\n",sp->cmd->pid,sp->wdg_time);) + DEBUG3(qla2100_print(debug_buff);) + + /* Acquire watchdoq queue specific lock */ +#if LINUX_VERSION_CODE < KERNEL_VERSION(2,1,95) + DRIVER_LOCK +#else + QLA2100_TIMER_LOCK(ha); +#endif + /* Remove command block from watchdog queue. */ + if (ha->retry_q_first != NULL) { + if (ha->retry_q_first == sp) { + /* Remove from top of queue */ + ha->retry_q_first = sp->s_next; + if (ha->retry_q_first == NULL) { + + ha->retry_q_last = NULL; + ha->flags.watchdog_enabled = FALSE; + } + } else { + /* Remove from middle of queue or bottom of queue */ + for (nextsp = ha->retry_q_first; nextsp->s_next != NULL; + nextsp = nextsp->s_next) { + if (nextsp->s_next == sp) { + nextsp->s_next = sp->s_next; + if (nextsp->s_next == NULL) + ha->retry_q_last = nextsp; + break; + } + } + } + sp->flags &= ~SRB_WATCHDOG; + qla2100_stats.retry_q_cnt--; + } + + /* Release watchdog queue specific lock */ +#if LINUX_VERSION_CODE < KERNEL_VERSION(2,1,95) + DRIVER_UNLOCK +#else + QLA2100_TIMER_UNLOCK(ha); +#endif + +#ifdef QL_DEBUG_LEVEL_3 + /* LEAVE("qla2100_timeout_remove"); */ +#endif +} + +/* +* qla2100_next +* Retrieve and process next job in the queue. +* +* Input: +* ha = adapter block pointer. +* q = SCSI LU pointer. +* SCSI_LU_Q lock must be already obtained and no other locks. +* +* Output: +* Releases SCSI_LU_Q upon exit. +*/ +STATIC void +qla2100_next(scsi_qla_host_t *ha, scsi_lu_t *q) { + srb_t *sp; +#if LINUX_VERSION_CODE < KERNEL_VERSION(2,1,95) + unsigned long cpu_flags = 0; +#endif + uint8_t status; + +#ifdef QL_DEBUG_LEVEL_3 + ENTER("qla2100_next"); +#endif + + DRIVER_LOCK + COMTRACE('N') + while( ((sp = q->q_first) != NULL) && /* we have a pending cmds */ + !(q->q_flag & QLA2100_QBUSY) && /* device can accept more cmds */ + !((q->q_flag & QLA2100_QSUSP) && /* device queue not suspended */ + !ha->flags.abort_isp_active && /* adapter abort active */ + !ha->loop_down_timer) ) /* down timer not active */ + { + /* Remove srb from SCSI LU queue. */ + qla2100_removeq(q, sp); + sp->state = 0x32; + /* Set busy flag if reached high water mark. */ + q->q_outcnt++; + if( q->q_outcnt >= ha->hiwat ) { + q->q_flag |= QLA2100_QBUSY; + } + +#if LINUX_VERSION_CODE >= KERNEL_VERSION(2,3,18) + if( ha->flags.enable_64bit_addressing ) + status = qla2100_64bit_start_scsi(ha, sp); + else +#endif + status = qla2100_32bit_start_scsi(ha, sp); + + if( status ) { + qla2100_putq_t(q, sp); + + if( q->q_outcnt ) + q->q_outcnt--; + if( q->q_outcnt < ha->hiwat ) + q->q_flag &= ~QLA2100_QBUSY; + break; + } + } + + COMTRACE('n') + DRIVER_UNLOCK + /* Release SCSI LU queue specific lock */ + +#ifdef QL_DEBUG_LEVEL_3 + LEAVE("qla2100_next"); +#endif +} +#if 0 +/******************************************************* +v4.10 +* This function has been de-implemented +* All DMAable memory is allocated on the spot +* according to what kernel version is in effect. +******************************************************** +* qla2100_alloc_phys +* Function used to allocate physical memory +* and zero it. +* +* Input: +* size = size in bytes. +* flag = sleep flag. +* phy_addr = physical address pointer. +* +* Returns: +* not NULL = success +*/ +STATIC void * +qla2100_alloc_phys(int siz, u_long *phy_addr) { + void *mem = NULL; + +#ifdef QL_DEBUG_LEVEL_3 + ENTER("qla2100_alloc_phys"); +#endif + mem = KMALLOC(siz); + if( mem != NULL ) { + *phy_addr = VIRT_TO_BUS(mem); + BZERO((caddr_t)mem, siz); + DEBUG5(sprintf(debug_buff,"qla2100: get phys mem =0x%lx\n\r",(long)*phy_addr)); + DEBUG5(qla2100_print(debug_buff);) + } + +#if defined(QL_DEBUG_LEVEL_2) || defined(QL_DEBUG_LEVEL_3) + if( mem == NULL ) + qla2100_print("qla2100_alloc_phys: **** FAILED ****\n\r"); +#endif +#ifdef QL_DEBUG_LEVEL_3 + else + LEAVE("qla2100_alloc_phys"); +#endif + return(mem); +} +#endif + +/* +* qla2100_putq_t +* Add the standard SCB job to the top of standard SCB commands. +* +* Input: +* q = SCSI LU pointer. +* sp = srb pointer. +* SCSI_LU_Q lock must be already obtained. +*/ +STATIC void +qla2100_putq_t(scsi_lu_t *q, srb_t *sp) { + srb_t *srb_p; +#if LINUX_VERSION_CODE < KERNEL_VERSION(2,1,95) + unsigned long cpu_flags = 0; +#endif + +#ifdef QL_DEBUG_LEVEL_3 + /* ENTER("qla2100_putq_t"); */ +#endif + DRIVER_LOCK + DEBUG5(sprintf(debug_buff,"Adding to queue 0x%x<-(0x%x)\n\r",q,sp)); + DEBUG5(qla2100_print(debug_buff)); + sp->s_next = NULL; + q->q_incnt++; + sp->state = 2; + /* v2.19.6 */ + if( !q->q_first || !q->q_last) /* If queue empty */ + { + sp->s_prev = NULL; + q->q_first = sp; + q->q_last = sp; + } else { + srb_p = q->q_first; + while( srb_p ) + srb_p = srb_p->s_next; + + if( srb_p ) { + sp->s_prev = srb_p->s_prev; + if( srb_p->s_prev ) + srb_p->s_prev->s_next = sp; + else + q->q_first = sp; + srb_p->s_prev = sp; + sp->s_next = srb_p; + } else { + sp->s_prev = q->q_last; + q->q_last->s_next = sp; + q->q_last = sp; + } + } + + DRIVER_UNLOCK +#ifdef QL_DEBUG_LEVEL_3 + /* LEAVE("qla2100_putq_t"); */ +#endif +} + +/* +* qla2100_removeq +* Function used to remove a command block from the +* LU queue. +* +* Input: +* q = SCSI LU pointer. +* sp = srb pointer. +* SCSI_LU_Q lock must be already obtained. +*/ +STATIC void +qla2100_removeq(scsi_lu_t *q, srb_t *sp) { +#if LINUX_VERSION_CODE < KERNEL_VERSION(2,1,95) + unsigned long cpu_flags = 0; +#endif + DEBUG5(sprintf(debug_buff,"Removing from device_q (0x%x)->(0x%x)\n\r",q,sp)); + DEBUG5(qla2100_print(debug_buff)); + DRIVER_LOCK + if( sp->s_prev ) { + if( (sp->s_prev->s_next = sp->s_next) != NULL ) + sp->s_next->s_prev = sp->s_prev; + else + q->q_last = sp->s_prev; + } else if( !(q->q_first = sp->s_next) ) + q->q_last = NULL; + else + q->q_first->s_prev = NULL; + q->q_incnt--; + DRIVER_UNLOCK +} + +/* +* qla2100_callback +* Returns the completed SCSI command to LINUX. +* +* Returns: +* None +*/ +static inline void qla2100_callback(scsi_qla_host_t *ha, srb_t *sp, uint8_t dec) { +#if LINUX_VERSION_CODE < KERNEL_VERSION(2,1,95) + unsigned long cpu_flags = 0; +#endif + + CMD_HANDLE(sp->cmd) = (unsigned char *) NULL; + sp->flags &= ~SRB_SENT; + +#if LINUX_VERSION_CODE < KERNEL_VERSION(2,1,95) + DRIVER_LOCK +#endif +#if 0 + if( dec ) + ha->actthreads--; +#endif + + /* v2.19.14 + * Perform internal retries, if needed. + */ + switch( (CMD_RESULT(sp->cmd)>>16) ) { + case DID_ERROR: + if( sp->retry_count > 0 ) { + sp->retry_count--; + DEBUG3(printk("qla2100: RETRY - os retry %d, drv retry %d, port retry %d\n\r",sp->cmd->retries,sp->retry_count,sp->port_down_retry_count)); + CMD_RESULT(sp->cmd) = (int) DID_BUS_BUSY << 16; + } else { + sp->retry_count = ha->retry_count; + /* all resetted commands must return with RESET */ + if(sp->cmd->flags & IS_RESETTING ) { + CMD_RESULT(sp->cmd) = (int) DID_RESET << 16; + DEBUG3(printk("qla2100: RESET cmd %p\n",sp->cmd)); + } + DEBUG3(printk("qla2100: OSerr = %p\n\r",sp->cmd)); + } + break; + default: + break; + } + + /* Call the mid-level driver interrupt handler */ +#if LINUX_VERSION_CODE < KERNEL_VERSION(2,1,95) + sti(); + (*(sp->cmd)->scsi_done)(sp->cmd); + cli(); +#else + (*(sp->cmd)->scsi_done)(sp->cmd); +#endif +#if LINUX_VERSION_CODE < KERNEL_VERSION(2,1,95) + DRIVER_UNLOCK +#endif +} + +/* +* qla2100_mem_alloc +* Allocates adapter memory. +* +* Returns: +* 0 = success. +* 1 = failure. +*/ +STATIC uint8_t +qla2100_mem_alloc(scsi_qla_host_t *ha) { + + uint8_t status = 1; + +#ifdef QL_DEBUG_LEVEL_3 + ENTER("qla2100_mem_alloc"); +#endif + + /* 4.10 */ + /* get consistent memory allocated for request/response rings */ +#if LINUX_VERSION_CODE < KERNEL_VERSION(2,3,18) + ha->request_ring = &ha->req[0]; + ha->request_dma = VIRT_TO_BUS(&ha->req[0]); + ha->response_ring = &ha->res[0]; + ha->response_dma = VIRT_TO_BUS(&ha->res[0]); +#ifdef FC_IP_SUPPORT + ha->pIpBufferQueue = &ha->asIpBuffers[0]; + ha->ppIpBufferQueueLow = VIRT_TO_BUS_LOW(&ha->asIpBuffers[0]); + ha->ppIpBufferQueueHigh = VIRT_TO_BUS_HIGH(&ha->asIpBuffers[0]); +#endif /* FC_IP_SUPPORT */ +#else /* KERNEL >= 2.3.18 */ + ha->request_ring = pci_alloc_consistent(ha->pdev, + ((REQUEST_ENTRY_CNT+1)*(sizeof(request_t))), + &ha->request_dma); + ha->response_ring = pci_alloc_consistent(ha->pdev, + ((RESPONSE_ENTRY_CNT+1)*(sizeof(response_t))), + &ha->response_dma); +#ifdef FC_IP_SUPPORT + /* not ported yet to new pci_alloc_consistent */ + ha->pIpBufferQueue = &ha->asIpBuffers[0]; + ha->ppIpBufferQueueLow = VIRT_TO_BUS_LOW(&ha->asIpBuffers[0]); + ha->ppIpBufferQueueHigh = VIRT_TO_BUS_HIGH(&ha->asIpBuffers[0]); +#endif +#endif + /* 4.10 */ + /* get consistent memory allocated for init control block */ +#if LINUX_VERSION_CODE < KERNEL_VERSION(2,3,18) + ha->init_cb = KMALLOC(sizeof(init_cb_t)); + if( ha->init_cb != NULL ) { + ha->init_cb_dma = VIRT_TO_BUS(ha->init_cb); + BZERO((caddr_t)ha->init_cb, sizeof(init_cb_t)); + } +#else + ha->init_cb = pci_alloc_consistent(ha->pdev, + sizeof(init_cb_t), + &ha->init_cb_dma); + BZERO((caddr_t)ha->init_cb, sizeof(init_cb_t)); +#endif + if( ha->init_cb ) status = 0; + + if( status ) + printk(KERN_WARNING "qla2100_mem_alloc: **** FAILED ****\n"); + +#ifdef QL_DEBUG_LEVEL_3 + else + LEAVE("qla2100_mem_alloc"); +#endif + return(status); +} + +/* +* qla2100_mem_free +* Frees all adapter allocated memory. +* +* Input: +* ha = adapter block pointer. +*/ +STATIC void +qla2100_mem_free(scsi_qla_host_t *ha) { + tgt_t *tgt; + uint32_t b, t; + +#ifdef QL_DEBUG_LEVEL_3 + ENTER("qla2100_mem_free"); +#endif + if( ha ) { + /* Free the target queues */ + b = 0; + for( t = 0; t < MAX_FIBRE_DEVICES; t++ ) { + tgt = TGT_Q(ha, b, t); + if( tgt ) + qla2100_tgt_dealloc(ha, tgt); + } + + /* Free host database. */ + if (ha->phost_db != NULL) { + KMFREE(ha->phost_db, sizeof(fcdev_t) * MAX_HOST_COUNT); + } + + /* 4.10 */ + /* free consistent memory allocated for request and response rings */ +#if LINUX_VERSION_CODE >= KERNEL_VERSION(2,3,18) + pci_free_consistent(ha->pdev, + ((REQUEST_ENTRY_CNT+1)*(sizeof(request_t))), + ha->request_ring, ha->request_dma); + + pci_free_consistent(ha->pdev, + ((RESPONSE_ENTRY_CNT+1)*(sizeof(response_t))), + ha->response_ring, ha->response_dma); +#endif + /* free memory allocated for ioctl operations */ +#if LINUX_VERSION_CODE < KERNEL_VERSION(2,3,18) + KMFREE(ha->ioctl_mem, PAGE_SIZE); +#else + pci_free_consistent(ha->pdev, PAGE_SIZE, + ha->ioctl_mem, ha->ioctl_mem_phys); +#endif + /* free memory allocated for init_cb */ +#if LINUX_VERSION_CODE < KERNEL_VERSION(2,3,18) + KMFREE(ha->init_cb, sizeof(init_cb_t)); +#else + pci_free_consistent(ha->pdev, sizeof(init_cb_t), + ha->init_cb, ha->init_cb_dma); +#endif + } + +#ifdef QL_DEBUG_LEVEL_3 + LEAVE("qla2100_mem_free"); +#endif +} + +/* +* qla2100_tgt_alloc +* Allocates a target queue structure. +* +* Input: +* ha = adapter block pointer. +* +* Returns +* target queue structure = success: +* NULL = otherwise +*/ +static inline tgt_t * +qla2100_tgt_alloc(scsi_qla_host_t *ha) { + tgt_t *tgt; + +#ifdef QL_DEBUG_LEVEL_3 + ENTER("qla2100_tgt_alloc"); +#endif + + tgt = (tgt_t *)KMALLOC(sizeof(tgt_t)); /* Could Sleep here */ + if( tgt != NULL ) { + BZERO(tgt,sizeof(tgt_t)); + DEBUG(sprintf(debug_buff,"Alloc Target @ %08x \n",tgt);) + DEBUG(qla2100_print(debug_buff);) + } + +#ifdef QL_DEBUG_LEVEL_3 + LEAVE("qla2100_tgt_alloc"); +#endif + return(tgt); +} + +/* +* qla2100_lun_alloc +* Allocates a logical device queue structure and lock +* +* Returns: +* SCSI LU structure pointer +*/ +STATIC inline scsi_lu_t * +qla2100_lun_alloc(void) { + scsi_lu_t *q; + +#ifdef QL_DEBUG_LEVEL_3 + ENTER("qla2100_lun_alloc"); +#endif + + q = (scsi_lu_t *)KMALLOC(sizeof(scsi_lu_t)); /* Sleep */ + BZERO(q,sizeof(struct scsi_lu)); + DEBUG(sprintf(debug_buff,"Alloc Lun @ %08x \n",q);) + DEBUG(qla2100_print(debug_buff);) + +#ifdef QL_DEBUG_LEVEL_3 + LEAVE("qla2100_lun_alloc"); +#endif + return(q); +} + +/* +* qla2100_tgt_dealloc +* Deallocates a target and all logical device queue structures. +* +* Input: +* ha = adapter block pointer. +* tgt = Target queue structure pointer +*/ +static inline void +qla2100_tgt_dealloc(scsi_qla_host_t *ha, tgt_t *tgt) { + uint32_t l; + +#ifdef QL_DEBUG_LEVEL_3 + ENTER("qla2100_tgt_dealloc"); +#endif + + if( tgt != NULL ) { + /* Insure all LUN memory is released. */ + for( l = 0; l < ha->max_luns; l++ ) { + if( tgt->luns[l] ) + qla2100_lun_dealloc(tgt->luns[l]); + } + KMFREE(tgt, sizeof(tgt_t)); + } + +#ifdef QL_DEBUG_LEVEL_3 + LEAVE("qla2100_tgt_dealloc"); +#endif +} + +/* +* qla2100_lun_dealloc +* Deallocates a logical unit queue structure. +* +* Input: +* q = SCSI LU structure pointer +*/ +static inline void +qla2100_lun_dealloc(scsi_lu_t *q) { +#ifdef QL_DEBUG_LEVEL_3 + ENTER("qla2100_lun_dealloc"); +#endif + if( q != NULL ) { + DEBUG(sprintf(debug_buff,"Dealloc Lun @ %08x -- deleted\n",q);) + DEBUG(qla2100_print(debug_buff);) + KMFREE(q, sizeof(scsi_lu_t)); + } +#ifdef QL_DEBUG_LEVEL_3 + ENTER("qla2100_lun_dealloc"); +#endif + +} + +/* +* qla2100_abort_queue_single +* Abort all commands on a device queues. +* +* Input: +* ha = adapter block pointer. +*/ +STATIC void qla2100_abort_queue_single(scsi_qla_host_t *ha,uint32_t b,uint32_t t,uint32_t l,uint32_t stat) { + scsi_lu_t *q; + srb_t *sp; + + ENTER("qla2100_abort_queue_single"); + /* dg - 08/23/99 + * We don't want to try and abort queues that don't exists + * (i.e. the device is not configure on the loop ) + */ + if( ha->loop_down_timer > 0 ) { + return; + } + DEBUG5(sprintf(debug_buff,"Abort queue single %2d:%2d:%2d:%2d\n", + ha->host_no,b,t,l);) + DEBUG5(qla2100_print(debug_buff);) + q = (scsi_lu_t * )GET_LU_Q(ha, b, t, l); + while( q != NULL && (sp = q->q_first) != NULL ) { + /* Acquire LU queue specific lock */ + + qla2100_removeq(q, sp); + + /* Release LU queue specific lock */ + CMD_RESULT(sp->cmd) = stat; + qla2100_done_q_put(ha, sp, (srb_t **)&ha->done_q_first, (srb_t **)&ha->done_q_last); + } + LEAVE("qla2100_abort_queue_single"); +} + +/****************************************************************************/ +/* QLogic ISP2100 Hardware Support Functions. */ +/****************************************************************************/ + +/* +* qla2100_initialize_adapter +* Initialize board. +* +* Input: +* ha = adapter block pointer. +* +* Returns: +* 0 = success +*/ +uint8_t +qla2100_initialize_adapter(scsi_qla_host_t *ha) +{ + uint8_t status = QL_STATUS_SUCCESS; + uint8_t isp_init = 0; + uint8_t restart_risc = 0; + uint8_t retry; + +#ifdef QL_DEBUG_LEVEL_3 + ENTER("qla2100_initialize_adapter"); +#endif + + /* Clear adapter flags. */ + ha->forceLip = 0; + ha->flags.online = FALSE; + ha->flags.isp_abort_needed = FALSE; + ha->flags.disable_host_adapter = FALSE; + ha->flags.loop_resync_active = FALSE; + ha->flags.reset_active = FALSE; + ha->flags.abort_isp_active = FALSE; + ha->flags.watchdog_enabled = FALSE; + ha->loop_down_timer = LOOP_DOWN_TIME; + ha->loop_state = LOOP_DOWN; + ha->flags.start_timer = FALSE; + ha->flags.done_requests_needed = FALSE; + ha->device_flags = 0; + ha->dpc_flags = 0; + ha->sns_retry_cnt = 0; + ha->host_db_ptr = 0; + ha->device_flags = 0; + /* 4.11 */ + ha->flags.managment_server_logged_in = 0; + + /* Allocate host database */ + ha->phost_db = (fcdev_t *)KMALLOC(sizeof(fcdev_t) * MAX_HOST_COUNT); + if (ha->phost_db != NULL) { + BZERO(ha->phost_db, sizeof(fcdev_t) * MAX_HOST_COUNT); + DEBUG(sprintf(debug_buff,"Alloc Host DB success. Max Cnt=%d.", + MAX_HOST_COUNT);) + DEBUG(qla2100_print(debug_buff);) + } else { + status = QL_STATUS_RESOURCE_ERROR; + } + + DEBUG(printk("Configure PCI space for adapter...\n")); + + if ( status == QL_STATUS_SUCCESS && + (status = qla2100_pci_config(ha)) == QL_STATUS_SUCCESS ) { + + qla2100_reset_chip(ha); + + /* Initialize Fibre Channel database. */ + qla2100_init_fc_db(ha); + + /* Initialize target map database. */ + qla2100_init_tgt_map(ha); + if( qla2100_verbose ) + printk(KERN_INFO + "scsi(%d): Configure NVRAM parameters...\n", + (int)ha->host_no); + + if( ha->device_id == QLA2100_DEVICE_ID ) + qla2100_nvram_config(ha); + else + qla2200_nvram_config(ha); + + /* v2.19.12 */ + ha->retry_count = ql2xretrycount; + + if( qla2100_verbose ) + printk(KERN_INFO + "scsi(%d): Verifying loaded RISC code...\n", + (int)ha->host_no); + + qla2100_set_cache_line(ha); + + /* If the user specified a device configuration on + * the command line then use it as the configuration. + * Otherwise, we scan for all devices. + */ + if ( ql2xdevconf ) { + qla2100_get_properties(ha, ql2xdevconf); + } + + retry = 10; + /* + * Try an configure the loop. + */ + do { + DEBUG(qla2100_print("qla2100_initialize_adapter: check " + "if firmware needs to be loaded\n");) + + /* If firmware needs to be loaded */ + if( qla2100_isp_firmware(ha) ) { + if( qla2100_verbose ) + printk(KERN_INFO + "scsi(%d): Verifying chip...\n", + (int)ha->host_no); + + if( (status = qla2100_chip_diag(ha)) == + QL_STATUS_SUCCESS ) + status = qla2100_setup_chip(ha); + + if( status == QL_STATUS_SUCCESS ) + DEBUG(printk("scsi(%d): Chip verified " + "and RISC loaded...\n", + (int)ha->host_no)); + } + + if ( status != QL_STATUS_SUCCESS ) + continue; + + status = qla2100_init_rings(ha); + + if ( status != QL_STATUS_SUCCESS ) + continue; + + /* dg - 7/3/1999 + * Wait for a successful LIP up to a maximum of + * (in seconds): RISC login timeout value, RISC + * retry count value, and port down retry value + * OR a minimum of 4 seconds OR If no cable, + * only 5 seconds. + */ + DEBUG(printk("scsi(%d): qla2100_init_rings OK, " + "call qla2100_fw_ready...\n", + (int)ha->host_no)); + DEBUG(qla2100_print("qla2100_init_rings OK, " + "call qla2100_fw_ready...\n");) + + if ( qla2100_fw_ready(ha) == QL_STATUS_SUCCESS ) { + ha->flags.reset_marker = FALSE; + + /* Go setup flash database devices + * with proper Loop ID's. + */ + do { + ha->flags.loop_resync_needed = FALSE; + status = qla2100_update_fc_db(ha, + FALSE); + } while( !ha->loop_down_timer && + ha->flags.loop_resync_needed ); + + /* If database was full and a device + * was not configured, try and reuse + * the slots. + */ + + if( status == QL_STATUS_FATAL_ERROR ) { + do { + ha->flags.loop_resync_needed = + FALSE; + status = + qla2100_update_fc_db(ha, + TRUE); + } while( !ha->loop_down_timer && + ha->flags.loop_resync_needed ); + } + } + if( ha->flags.update_config_needed ) { + ha->init_cb->additional_firmware_options.connection_options = ha->operating_mode; + restart_risc = 1; + } + isp_init = 1; + + } while( restart_risc && retry-- ); + + if( isp_init ) { + ha->flags.reset_marker = FALSE; + qla2100_marker(ha, 0, 0, 0, MK_SYNC_ALL); + + ha->flags.online = TRUE; + + /* Enable target response to SCSI bus. */ + if( ha->flags.enable_target_mode ) + qla2100_enable_lun(ha); + } + } + +#if defined(QL_DEBUG_LEVEL_2) || defined(QL_DEBUG_LEVEL_3) + if ( status != QL_STATUS_SUCCESS ) + qla2100_print("qla2100_initialize_adapter: **** FAILED ****\n"); +#endif +#ifdef QL_DEBUG_LEVEL_3 + else + LEAVE("qla2100_initialize_adapter"); +#endif + + return(status); +} + +/* +* ISP Firmware Test +* Checks if present version of RISC firmware is older than +* driver firmware. +* +* Input: +* ha = adapter block pointer. +* +* Returns: +* 0 = firmware does not need to be loaded. +*/ +STATIC uint8_t +qla2100_isp_firmware(scsi_qla_host_t *ha) { + uint8_t status; + uint16_t mb[MAILBOX_REGISTER_COUNT]; + +#ifdef QL_DEBUG_LEVEL_3 + ENTER("qla2x00_isp_firmware"); +#endif + + if( ha->flags.disable_risc_code_load ) { + /* Verify checksum of loaded RISC code. */ + mb[0] = MBC_VERIFY_CHECKSUM; + mb[1] = *QLBoardTbl_fc[ha->devnum].fwstart; + if( !(status = qla2100_mailbox_command(ha, BIT_1|BIT_0, &mb[0])) ) { + /* Start firmware execution. */ + mb[0] = MBC_EXECUTE_FIRMWARE; + mb[1] = *QLBoardTbl_fc[ha->devnum].fwstart; + qla2100_mailbox_command(ha, BIT_1|BIT_0, &mb[0]); + } + } else + status = 1; + +#if defined(QL_DEBUG_LEVEL_2) || defined(QL_DEBUG_LEVEL_3) + if( status ) + qla2100_print( + "qla2100_isp_firmware: **** Return status=1; RISC Load Needed ****\n"); +#endif +#ifdef QL_DEBUG_LEVEL_3 + LEAVE("qla2x00_isp_firmware"); +#endif + return(status); +} + +/* +* (08/05/99) +* +* PCI configuration +* Setup device PCI configuration registers. +* +* Input: +* ha = adapter block pointer. +* +* Returns: +* 0 = success. +*/ +#if LINUX_VERSION_CODE > KERNEL_VERSION(2,1,95) +STATIC uint8_t +qla2100_pci_config(scsi_qla_host_t *ha) { + uint8_t status = 1; + uint32_t command; +#if MEMORY_MAPPED_IO + uint32_t page_offset, base; + uint32_t mmapbase; +#endif + config_reg_t *creg = 0; + uint16_t buf_wd; + + ENTER("qla2100_pci_config"); +#if LINUX_VERSION_CODE > KERNEL_VERSION(2,1,95) +/* 4.12 */ + /* turn on PCI master; for system BIOSes that don't turn + it on by default */ + pci_set_master(ha->pdev); + + if (ha->device_id == QLA2300_DEVICE_ID) { + pci_read_config_word(ha->pdev,OFFSET(creg->command), &buf_wd); + buf_wd = buf_wd | + PCI_COMMAND_IO | + PCI_COMMAND_MEMORY | + PCI_COMMAND_MASTER | + PCI_COMMAND_INVALIDATE | + PCI_COMMAND_PARITY | + PCI_COMMAND_SERR; + buf_wd = buf_wd & ~PCI_COMMAND_INVALIDATE; + pci_write_config_word(ha->pdev,OFFSET(creg->command), buf_wd); + /* temporary: set upper 32 bits of 64 bit address to 0 */ + buf_wd = 0; + pci_write_config_word(ha->pdev,PCI_BASE_ADDRESS_2, buf_wd); + } +#endif + pci_read_config_word(ha->pdev,OFFSET(creg->revision_id), &buf_wd); + ha->revision = buf_wd; + if( !ha->iobase ) { + /* Get command register. */ +#if LINUX_VERSION_CODE < KERNEL_VERSION(2,3,18) + if( pci_read_config_word(ha->pdev,OFFSET(creg->command), &buf_wd) == PCIBIOS_SUCCESSFUL ) { +#else + if( pci_read_config_word(ha->pdev,OFFSET(creg->command), &buf_wd) == PCIBIOS_SUCCESSFUL ) { +#endif + command = buf_wd; + /* + * Set Bus Master Enable (bit-2), Memory Address Space Enable and + * reset any error bits. + */ + buf_wd &= ~0x7; +#if MEMORY_MAPPED_IO + DEBUG(printk("qla2100: I/O SPACE and MEMORY MAPPED IO is enabled.\n")); + buf_wd |= BIT_2 + BIT_1 + BIT_0; +#else + DEBUG(printk("qla2100: I/O SPACE Enabled and MEMORY MAPPED IO is disabled.\n")); + buf_wd |= BIT_2 + BIT_0; +#endif + if( pci_write_config_word(ha->pdev,OFFSET(creg->command), buf_wd) ) { + printk(KERN_WARNING "qla2100: Could not write config word.\n"); + } + /* Get expansion ROM address. */ + if( pci_read_config_word(ha->pdev, OFFSET(creg->expansion_rom), &buf_wd) == PCIBIOS_SUCCESSFUL ) { + /* Reset expansion ROM address decode enable. */ + buf_wd &= ~BIT_0; + if( pci_write_config_word(ha->pdev, OFFSET(creg->expansion_rom), buf_wd) == PCIBIOS_SUCCESSFUL ) { +#if MEMORY_MAPPED_IO + /* Get memory mapped I/O address. */ + pcibios_read_config_dword(ha->pci_bus, ha->pci_device_fn,OFFSET(cfgp->mem_base_addr), &mmapbase); + mmapbase &= PCI_BASE_ADDRESS_MEM_MASK; + + /* Find proper memory chunk for memory map I/O reg. */ + base = mmapbase & PAGE_MASK; + page_offset = mmapbase - base; + /* Get virtual address for I/O registers. */ + ha->mmpbase = ioremap(base,page_offset + 256); + if( ha->mmpbase ) { + ha->mmpbase += page_offset; + /* ha->iobase = ha->mmpbase; */ + status = 0; + } +#else /* MEMORY_MAPPED_IO */ + status = 0; +#endif /* MEMORY_MAPPED_IO */ + } + } + } + } else + status = 0; + + + LEAVE("qla2100_pci_config"); + return(status); +} +#else +STATIC uint8_t +qla2100_pci_config(scsi_qla_host_t *ha) { + uint8_t status = 1; + uint32_t command; +#if MEMORY_MAPPED_IO + uint32_t page_offset, base; + uint32_t mmapbase; +#endif + config_reg_t *creg = 0; + uint16_t buf_wd; + + ENTER("qla2100_pci_config"); + + pcibios_read_config_word(ha->pci_bus,ha->pci_device_fn, OFFSET(creg->revision_id), &buf_wd); + ha->revision = buf_wd; + if( !ha->iobase ) { + /* Get command register. */ + if( pcibios_read_config_word(ha->pci_bus,ha->pci_device_fn, OFFSET(creg->command), &buf_wd) == PCIBIOS_SUCCESSFUL ) { + command = buf_wd; + + /* + * Set Bus Master Enable (bit-2), Memory Address Space Enable and + * reset any error bits. + */ + buf_wd &= ~0x7; +#if MEMORY_MAPPED_IO + DEBUG(printk("qla2100: I/O SPACE and MEMORY MAPPED IO is enabled.\n")); + buf_wd |= BIT_2 + BIT_1 + BIT_0; +#else + DEBUG(printk("qla2100: I/O SPACE Enabled and MEMORY MAPPED IO is disabled.\n")); + buf_wd |= BIT_2 + BIT_0; +#endif + if( pcibios_write_config_word(ha->pci_bus,ha->pci_device_fn, OFFSET(creg->command), buf_wd) ) { + printk(KERN_WARNING "qla2100: Could not write config word.\n"); + } + /* Get expansion ROM address. */ + if( pcibios_read_config_word(ha->pci_bus,ha->pci_device_fn, OFFSET(creg->expansion_rom), &buf_wd) == PCIBIOS_SUCCESSFUL ) { + /* Reset expansion ROM address decode enable. */ + buf_wd &= ~BIT_0; + if( pcibios_write_config_word(ha->pci_bus,ha->pci_device_fn, OFFSET(creg->expansion_rom), buf_wd) == PCIBIOS_SUCCESSFUL ) { +#if MEMORY_MAPPED_IO + /* Get memory mapped I/O address. */ + pcibios_read_config_dword(ha->pci_bus, ha->pci_device_fn,OFFSET(cfgp->mem_base_addr), &mmapbase); + mmapbase &= PCI_BASE_ADDRESS_MEM_MASK; + + /* Find proper memory chunk for memory map I/O reg. */ + base = mmapbase & PAGE_MASK; + page_offset = mmapbase - base; + /* Get virtual address for I/O registers. */ + ha->mmpbase = ioremap(base,page_offset + 256); + if( ha->mmpbase ) { + ha->mmpbase += page_offset; + /* ha->iobase = ha->mmpbase; */ + status = 0; + } +#else /* MEMORY_MAPPED_IO */ + status = 0; +#endif /* MEMORY_MAPPED_IO */ + } + } + } + } else + status = 0; + + + LEAVE("qla2100_pci_config"); + return(status); +} +#endif + + +/* +* qla2100_set_cache_line +* Sets PCI cache line parameter. +* +* Input: +* ha = adapter block pointer. +* +* Returns: +* 0 = success. +*/ +STATIC uint8_t +qla2100_set_cache_line(scsi_qla_host_t *ha) { + int status = 0; + uint8_t buf; + config_reg_t *creg = 0; + +#ifdef QL_DEBUG_LEVEL_3 + ENTER("qla2100_set_cache_line"); +#endif + /* Set the cache line. */ + if( ha->flags.set_cache_line_size_1 ) { + buf = 1; + if( pcibios_write_config_byte(ha->pci_bus, + ha->pci_device_fn, + (u_long)&creg->cache_line,buf) != PCIBIOS_SUCCESSFUL ) + status = 1; + } + +#if defined(QL_DEBUG_LEVEL_2) || defined(QL_DEBUG_LEVEL_3) + if( status ) + qla2100_print("qla2100_set_cache_line: **** FAILED ****\n\r"); +#endif +#ifdef QL_DEBUG_LEVEL_3 + else + LEAVE("qla2100_set_cache_line"); +#endif + return(status); +} + +/* +* Chip diagnostics +* Test chip for proper operation. +* +* Input: +* ha = adapter block pointer. +* +* Returns: +* 0 = success. +*/ +STATIC uint8_t +qla2100_chip_diag(scsi_qla_host_t *ha) { + device_reg_t *reg = ha->iobase; + device2300_reg_t *reg2300 = ha->iobase2300; + uint8_t status = 0; + uint16_t data; + uint32_t cnt; + uint16_t mb[MAILBOX_REGISTER_COUNT]; + + ENTER("qla2100_chip_diag"); +#ifdef QL_DEBUG_LEVEL_3 + qla2100_print("qla2100_chip_diag: testing device at "); + qla2100_output_number((u_long)®->flash_address, 16); + qla2100_print("\n"); +#endif + + /* Reset ISP chip. */ + WRT_REG_WORD(®->ctrl_status, ISP_RESET); + data = qla2100_debounce_register(®->ctrl_status); + for( cnt = 6000000 ; cnt && (data & ISP_RESET); cnt-- ) { + SYS_DELAY(5); + data = RD_REG_WORD(®->ctrl_status); + } + + if( cnt ) { +#if defined(QL_DEBUG_LEVEL_2) + qla2100_print("{{{qla2100_chip_diag: Reset register cleared by chip}}}\n\r"); +#endif + /* Reset RISC processor. */ + WRT_REG_WORD(®->host_cmd, HC_RESET_RISC); + WRT_REG_WORD(®->host_cmd, HC_RELEASE_RISC); + data = qla2100_debounce_register(®->mailbox0); + for( cnt = 6000000; cnt && (data == MBS_BUSY); cnt-- ) { + SYS_DELAY(5); + data = RD_REG_WORD(®->mailbox0); + } + + if( cnt ) { + /* Check product ID of chip */ +#if defined(QL_DEBUG_LEVEL_2) + qla2100_print("{{{qla2100_chip_diag: Checking product ID of chip}}}\n\r"); +#endif + if (ha->device_id != QLA2300_DEVICE_ID) { + if( RD_REG_WORD(®->mailbox1) != PROD_ID_1 || + (RD_REG_WORD(®->mailbox2) != PROD_ID_2 && + RD_REG_WORD(®->mailbox2) != PROD_ID_2a) || + RD_REG_WORD(®->mailbox3) != PROD_ID_3 || + qla2100_debounce_register(®->mailbox4) != PROD_ID_4 ) { + printk(KERN_WARNING "qla2100: [ERROR] Wrong product ID = 0x%x,0x%x,0x%x,0x%x\n", + RD_REG_WORD(®->mailbox1), + RD_REG_WORD(®->mailbox2), + RD_REG_WORD(®->mailbox3), + RD_REG_WORD(®->mailbox4)); + status = 1; + } else { + /* Now determine if we have a 2200A board */ + if( ( ha->device_id == QLA2200_DEVICE_ID || + ha->device_id == QLA2200A_DEVICE_ID ) && + RD_REG_WORD(®->mailbox7) == + QLA2200A_RISC_ROM_VER ) { + ha->device_id = QLA2200A_DEVICE_ID; +#if defined(QL_DEBUG_LEVEL_2) + qla2100_print("qla2100_chip_diag: Found QLA2200A chip.\n\r"); +#endif + } + } + } else { /* check prod id of 2300 here */ + if( RD_REG_WORD(®2300->mailbox1) != PROD_ID_1 || + (RD_REG_WORD(®2300->mailbox2) != PROD_ID_2 && + RD_REG_WORD(®2300->mailbox2) != PROD_ID_2a) || + RD_REG_WORD(®2300->mailbox3) != PROD_ID_3 || + qla2100_debounce_register(®2300->mailbox4) != PROD_ID_4 ) { + printk(KERN_WARNING "qla2300: [ERROR] Wrong product ID = 0x%x,0x%x,0x%x,0x%x\n", + RD_REG_WORD(®2300->mailbox1), + RD_REG_WORD(®2300->mailbox2), + RD_REG_WORD(®2300->mailbox3), + RD_REG_WORD(®2300->mailbox4)); + status = 1; + } + DEBUG(printk("qla2100_chip_diag: Do MBC_MAILBOX_REGISTER_TEST\n")); +#if defined(QL_DEBUG_LEVEL_2) + qla2100_print("qla2100_chip_diag: Do MBC_MAILBOX_REGISTER_TEST\n\r"); +#endif + /* Wrap Incoming Mailboxes Test. */ + mb[0] = MBC_MAILBOX_REGISTER_TEST; + mb[1] = 0xAAAA; + mb[2] = 0x5555; + mb[3] = 0xAA55; + mb[4] = 0x55AA; + mb[5] = 0xA5A5; + mb[6] = 0x5A5A; + mb[7] = 0x2525; + if( !(status = qla2100_mailbox_command(ha, + BIT_7|BIT_6|BIT_5|BIT_4|BIT_3|BIT_2|BIT_1|BIT_0, + &mb[0])) ) { + if( mb[1] != 0xAAAA || mb[2] != 0x5555 || + mb[3] != 0xAA55 || mb[4] != 0x55AA ) + status = 1; + if( mb[5] != 0xA5A5 || mb[6] != 0x5A5A || + mb[7] != 0x2525 ) + status = 1; + if( status ) { + printk(KERN_WARNING "qla2100_chip_diag: [ERROR] *** Failed mailbox register test ***\n\r"); + DEBUG(qla2100_print("qla2100_chip_diag: *** Failed mailbox register test ***\n\r");) + } + } else { + printk(KERN_WARNING "qla2100_chip_diag: [ERROR] failed mailbox send register test\n"); + DEBUG(qla2100_print("qla2100_chip_diag: Failed mailbox send register test\n\r");) + } + } + } else + status = 1; + } else + status = 1; + +#if defined(QL_DEBUG_LEVEL_2) || defined(QL_DEBUG_LEVEL_3) + if( status ) + qla2100_print("qla2100_chip_diag: **** FAILED ****\n"); + else qla2100_print("qla2100_chip_diag: Returning Good Status \n"); +#endif +#ifdef QL_DEBUG_LEVEL_3 + LEAVE("qla2100_chip_diag"); +#endif + return(status); +} + +/* +* Setup chip +* Load and start RISC firmware. +* +* Input: +* ha = adapter block pointer. +* +* Returns: +* 0 = success. +*/ +STATIC uint8_t +qla2100_setup_chip(scsi_qla_host_t *ha) { + uint16_t cnt; + uint16_t risc_address; + uint16_t *risc_code_address; + long risc_code_size; + uint16_t mb[MAILBOX_REGISTER_COUNT]; + uint8_t status = 0; + int num, temp; +#ifdef WORD_FW_LOAD + uint16_t *ql21_risc_code_addr01; + uint16_t ql21_risc_code_length01; + uint8_t dump_status; +#endif + +#ifdef QL_DEBUG_LEVEL_3 + ENTER("qla2100_setup_chip"); +#endif + + /* Load RISC code. */ + risc_address = *QLBoardTbl_fc[ha->devnum].fwstart; + risc_code_address = QLBoardTbl_fc[ha->devnum].fwcode; + risc_code_size = (long)(*QLBoardTbl_fc[ha->devnum].fwlen & 0xffff); + + DEBUG(printk("qla2100_setup_chip: Loading RISC code size =(0x%lx)\n",risc_code_size);) + DEBUG(qla2100_print("qla2100_setup_chip: Loading RISC code now in silent mode!\n\r");) + num = 0; + DEBUG(sprintf(debug_buff,"virt=%x phys=%x\n\r",ha->request_ring,ha->request_dma);) + DEBUG(qla2100_print(debug_buff);) + /* go into silent mode */ + temp = ql2x_debug_print; + if( ql2x_debug_print ) ql2x_debug_print = 0; + + while( risc_code_size > 0 && !status ) { + /* for 2200A set transfer size to 128 bytes */ + if( ha->device_id == QLA2200A_DEVICE_ID ) + cnt = 128 >> 1; + else + cnt = REQUEST_ENTRY_SIZE * REQUEST_ENTRY_CNT >> 1; + if( cnt > risc_code_size ) + cnt = risc_code_size; + + DEBUG(sprintf(debug_buff,"qla2100_setup_chip:loading risc segment@ addr 0x%x, number of bytes 0x%x, offset 0x%x.\n\r",risc_code_address,cnt,risc_address);) + DEBUG(qla2100_print(debug_buff);) + + BCOPY((caddr_t) risc_code_address,(caddr_t) ha->request_ring, (cnt <<1)); + + flush_cache_all(); /* flush written firmware to the + ha->request_ring buffer before DMA */ + + mb[0] = MBC_LOAD_RAM; + mb[1] = risc_address; + mb[3] = (uint16_t)(ha->request_dma & 0xffff); + mb[2] = (uint16_t)((ha->request_dma >> 16) & 0xffff); + mb[4] = cnt; + status = qla2100_mailbox_command(ha, BIT_4|BIT_3|BIT_2|BIT_1|BIT_0, + &mb[0]); + + if( status ) { + qla2100_dump_regs(ha->host); + printk(KERN_WARNING "qla2x00: [ERROR] Failed to load segment %d of FW\n",num); + DEBUG(qla2100_print("qla2100_setup_chip: Failed to load segment of FW\n");) + break; + } + risc_address += cnt; + risc_code_size -= cnt; + risc_code_address += cnt; + num++; + } + ql2x_debug_print = temp; + +#ifdef WORD_FW_LOAD + { + int i; + uint8_t temp; + + temp = ql2x_debug_print; + if( ql2x_debug_print ) ql2x_debug_print = 0; + risc_address = *QLBoardTbl_fc[ha->devnum].fwstart; + ql21_risc_code_addr01 = QLBoardTbl_fc[ha->devnum].fwcode; + ql21_risc_code_length01= (long)(*QLBoardTbl_fc[ha->devnum].fwlen & 0xffff); + + for( i = 0; i < ql21_risc_code_length01 ; i++ ) { + + mb[0] = MBC_WRITE_RAM_WORD; + mb[1] = risc_address + i; + mb[2] = *(ql21_risc_code_addr01 + i); + + dump_status = qla2100_mailbox_command(ha,BIT_2|BIT_1|BIT_0, + &mb[0]); + if( dump_status ) { + printk(KERN_WARNING "qla2x00 : [ERROR] firmware load failure\n"); + break; + } + + mb[0] = MBC_READ_RAM_WORD; + mb[1] = risc_address + i; + mb[2] = 0; + + dump_status = qla2100_mailbox_command(ha,BIT_2|BIT_1|BIT_0, + &mb[0]); + if( dump_status ) { + printk(KERN_WARNING "qla2x00: [ERROR] RISC FW Read Failure\n"); + break; + } + if( mb[2] != *(ql21_risc_code_addr01 + i) ) + printk(KERN_WARNING "qla2x00: [ERROR] RISC FW Compare ERROR @ (0x%p)\n", + (void *) (ql21_risc_code_addr01+i)); + } + ql2x_debug_print = temp; + printk(KERN_INFO "qla2x00: RISC FW download confirmed... \n"); + } +#endif + /* Verify checksum of loaded RISC code. */ + if( !status ) { + DEBUG(printk("qla2100_setup_chip: Verifying Check Sum of loaded RISC code.\n");) + mb[0] = MBC_VERIFY_CHECKSUM; + mb[1] = *QLBoardTbl_fc[ha->devnum].fwstart; + if( !(status = qla2100_mailbox_command(ha, BIT_1|BIT_0, &mb[0])) ) { + /* Start firmware execution. */ + DEBUG(qla2100_print("qla2100_setup_chip: CS Ok, Start firmware running\n\r");) + mb[0] = MBC_EXECUTE_FIRMWARE; + mb[1]= *QLBoardTbl_fc[ha->devnum].fwstart; + status = qla2100_mailbox_command(ha, BIT_1|BIT_0, &mb[0]); + } +#if defined(QL_DEBUG_LEVEL_2) + else + qla2100_print("qla2100_setup_chip: ISP FW Failed Check Sum\n"); +#endif + } + +#if defined(QL_DEBUG_LEVEL_2) || defined(QL_DEBUG_LEVEL_3) + if( status ) + qla2100_print("qla2100_setup_chip: **** FAILED ****\n"); + else qla2100_print("qla2100_setup_chip: Returning Good Status\n"); +#endif +#ifdef QL_DEBUG_LEVEL_3 + LEAVE("qla2100_setup_chip"); +#endif + return(status); +} + +/* +* qla2100_init_rings +* Initializes firmware. +* +* Beginning of request ring has initialization control block +* already built by nvram config routine. +* +* Input: +* ha = adapter block pointer. +* ha->request_ring = request ring virtual address +* ha->response_ring = response ring virtual address +* ha->request_dma = request ring physical address +* ha->response_dma = response ring physical address +* +* Returns: +* 0 = success. +*/ +STATIC uint8_t +qla2100_init_rings(scsi_qla_host_t *ha) { + uint8_t status; + uint16_t mb[MAILBOX_REGISTER_COUNT]; + int cnt; + device2300_reg_t *reg2300 = ha->iobase2300; + +#ifdef QL_DEBUG_LEVEL_3 + ENTER("qla2100_init_rings"); +#endif + /* Clear outstanding commands array. */ + for( cnt = 0; cnt < MAX_OUTSTANDING_COMMANDS; cnt++ ) + ha->outstanding_cmds[cnt] = 0; + +#ifdef RSCN + /* Clear RSCN queue. */ + ha->rscn_in_ptr = 0; + ha->rscn_out_ptr = 0; +#endif + + /* Initialize firmware. */ + ha->request_ring_ptr = ha->request_ring; + ha->req_ring_index = 0; + ha->req_q_cnt = REQUEST_ENTRY_CNT; + ha->response_ring_ptr = ha->response_ring; + ha->rsp_ring_index = 0; + mb[0] = MBC_INITIALIZE_FIRMWARE; + mb[3] = LSW(ha->init_cb_dma); + mb[2] = MSW(ha->init_cb_dma); + mb[4] = 0; /* set request queue in ptr for 2100/2200 */ + mb[5] = 0; /* set response queue out ptr for 2100/2200*/ + mb[7] = QL21_64BITS_3RDWD(ha->init_cb_dma); + mb[6] = QL21_64BITS_4THWD(ha->init_cb_dma); + + if (ha->device_id == QLA2300_DEVICE_ID) { + /* set request queue in ptr , response queue out ptr for 2300 */ + WRT_REG_WORD(®2300->req_q_in, 0); + WRT_REG_WORD(®2300->rsp_q_out, 0); + } + + DEBUG(qla2100_print("qla2100_init_rings: Issue MBC_INIT_FIRMWARE op\n");) + status = qla2100_mailbox_command(ha, + BIT_7|BIT_6|BIT_5|BIT_4|BIT_3|BIT_2|BIT_0, + &mb[0]); + +#if defined(QL_DEBUG_LEVEL_2) || defined(QL_DEBUG_LEVEL_3) + if( status ) + qla2100_print("qla2100_init_rings: **** FAILED ****\n"); +#endif +#ifdef QL_DEBUG_LEVEL_3 + LEAVE("qla2100_init_rings"); +#endif + return(status); +} + +/* +* qla2100_fw_ready +* Waits for firmware ready. +* +* Input: +* ha = adapter block pointer. +* +* Returns: +* 0 = success. +*/ +STATIC uint8_t +qla2100_fw_ready(scsi_qla_host_t *ha) { + uint8_t status = 0; + uint32_t cnt, cnt1; + uint16_t mb[MAILBOX_REGISTER_COUNT]; + uint16_t timeout; + +#ifdef QL_DEBUG_LEVEL_3 + ENTER("qla2100_fw_ready"); +#endif + timeout = (ha->retry_count * ha->login_timeout) + 5; + cnt1 = 0x350; /* 25 secs */ + /* Wait for ISP to finish LIP */ + if(!qla2100_quiet) printk(KERN_INFO "scsi(%d): Waiting for LIP to complete...\n", (int)ha->host->host_no); + if( timeout ) + cnt = 36 * timeout; + else + cnt = 0x700; + + for( ; cnt; cnt-- ) { + mb[0] = MBC_GET_FIRMWARE_STATE; + if( !(status = qla2100_mailbox_command(ha, BIT_0, &mb[0])) ) { + if( ha->loop_down_timer || mb[1] != FSTATE_READY ) { + status = 1; + /* Exit if no cable connected after 10 seconds. */ + if( !cnt1-- ) + if( mb[1] == FSTATE_CONFIG_WAIT || mb[1] == FSTATE_LOSS_OF_SYNC ) { + + break; + } + } else { + DEBUG(printk("qla2100_fw_ready: F/W Ready - OK \n");) + status = 0; /* dg 09/15/99 */ + break; + } + } + + if( ha->flags.online ) { + status = 0; /* dg 09/15/99 */ + break; + } + + /* Delay for a while */ + udelay(10); + +#ifdef QL_DEBUG_LEVEL_2 +/* qla2100_print("qla2100_fw_ready: mailbox_out[1] = "); + qla2100_output_number((uint32_t)mb[1], 16); + qla2100_print("\n");*/ +#endif + } + +#if defined(QL_DEBUG_LEVEL_2) || defined(QL_DEBUG_LEVEL_3) + if( status ) + qla2100_print("qla2100_fw_ready: **** FAILED ****\n"); +#endif +#ifdef QL_DEBUG_LEVEL_3 + else + LEAVE("qla2100_fw_ready"); +#endif + return(status); +} + +/* +* qla2100_configure_hba +* Setup adapter context. +* +* Input: +* ha = adapter state pointer. +* +* Returns: +* 0 = success +* 1 = failed +* +* Context: +* Kernel context. +*/ +STATIC uint8_t +qla2100_configure_hba(scsi_qla_host_t *ha) { + uint8_t rval; + uint16_t mb[MAILBOX_REGISTER_COUNT]; + uint8_t connect_type[22]; + +#ifdef QL_DEBUG_LEVEL_3 + ENTER("qla2100_configure_hba"); +#endif + + /* Get host addresses. */ + mb[0] = MBC_GET_ADAPTER_LOOP_ID; + rval = qla2100_mailbox_command(ha, BIT_0, &mb[0]); + if( !rval ) { + if( mb[6] == 4 ) { + printk(KERN_INFO "scsi%d: Can't get topology - retrying\n",(int)ha->host_no); + return(1); + } + ha->loop_id = mb[1]; + + /* Get loop topology. */ + if( ha->device_id == QLA2100_DEVICE_ID ) { + mb[6] = 0; + } + ha->min_external_loopid = SNS_FIRST_LOOP_ID; + ha->operating_mode = LOOP; + switch( mb[6] ) { + case 0: + ha->current_topology = ISP_CFG_NL; + strcpy((char *)&connect_type[0],"(Loop)"); + break; + case 1: + ha->current_topology = ISP_CFG_FL; + strcpy((char *)&connect_type[0],"(FL_Port)"); + break; + case 2: + ha->operating_mode = P2P; + ha->current_topology = ISP_CFG_N; + ha->min_external_loopid = 1; /* v2.19.5b3 */ + strcpy((char *)&connect_type[0],"(N_Port-to-N_Port)"); + break; + case 3: + ha->operating_mode = P2P; + ha->current_topology = ISP_CFG_F; + ha->min_external_loopid = 1; /* v2.19.5b3 */ + strcpy((char *)&connect_type[0],"(F_Port)"); + break; + default: + ha->current_topology = ISP_CFG_NL; + strcpy((char *)&connect_type[0],"(Loop)"); + break; + } + + /* Save Host port and loop ID. */ + /* Reverse byte order - TT */ + ha->port_id[2] = LSB(mb[2]); + ha->port_id[1] = MSB(mb[2]); + ha->port_id[0] = LSB(mb[3]); + if (!qla2100_quiet) printk(KERN_INFO "scsi%d: Topology - %s, Host Loop address 0x%x\n",(int)ha->host_no,connect_type, ha->loop_id); + } else + printk(KERN_WARNING "qla2100_configure_hba: [ERROR] Get host loop ID failed\n"); + +#if defined(QL_DEBUG_LEVEL_2) || defined(QL_DEBUG_LEVEL_3) + if( rval != 0 ) + qla2100_print("qla2100_configure_hba: **** FAILED ****\n"); +#endif +#ifdef QL_DEBUG_LEVEL_3 + else + LEAVE("qla2100_configure_hba"); +#endif + return(rval); +} + +/* +* NVRAM configuration for 2100. +* +* Input: +* ha = adapter block pointer. +* ha->request_ring = request ring virtual address +* ha->response_ring = response ring virtual address +* ha->request_dma = request ring physical address +* ha->response_dma = response ring physical address +* +* Output: +* initialization control block in response_ring +* host adapters parameters in host adapter block +* +* Returns: +* 0 = success. +*/ +STATIC uint8_t +qla2100_nvram_config(scsi_qla_host_t *ha) { + uint8_t status = 0; + uint16_t cnt; + caddr_t dptr1, dptr2; + init_cb_t *icb = ha->init_cb; + nvram21_t *nv = (nvram21_t *)ha->request_ring; + uint16_t *wptr = (uint16_t *)ha->request_ring; + uint8_t chksum = 0; + +#ifdef QL_DEBUG_LEVEL_3 + ENTER("qla2100_nvram_config"); +#endif + + /* Verify valid NVRAM checksum. */ + for( cnt = 0; cnt < sizeof(nvram21_t)/2; cnt++ ) { + *wptr = qla2100_get_nvram_word(ha, cnt); + chksum += (uint8_t)*wptr; + chksum += (uint8_t)(*wptr >> 8); + wptr++; + } + +#if DEBUG_PRINT_NVRAM + qla2100_print( + "qla2100_nvram_config: Contents of NVRAM "); + qla2100_print("\n\r"); + qla2100_dump_buffer((uint8_t *)ha->request_ring, sizeof(nvram21_t)); +#endif + + /* Bad NVRAM data, set defaults parameters. */ + if( chksum || nv->id[0] != 'I' || nv->id[1] != 'S' || nv->id[2] != 'P' || + nv->id[3] != ' ' || nv->nvram_version < 1 ) { + /* Reset NVRAM data. */ + DEBUG(printk("Using defaults for NVRAM: \n")); + DEBUG(printk("checksum=0x%x, Id=%c, version=0x%x\n",chksum,nv->id[0],nv->nvram_version)); + wptr = (uint16_t *)ha->request_ring; + for( cnt = 0; cnt < sizeof(nvram21_t)/2; cnt++ ) + *wptr++ = 0; + + /* + * Set default initialization control block. + */ + nv->parameter_block_version = ICB_VERSION; + nv->firmware_options.enable_fairness = 1; + nv->firmware_options.enable_fast_posting = 1; + nv->firmware_options.enable_full_login_on_lip = 1; + + nv->frame_payload_size = 1024; + nv->max_iocb_allocation = 256; + nv->execution_throttle = 16; + nv->retry_count = 8; + nv->retry_delay = 1; + nv->node_name[0] = 32; + nv->node_name[3] = 224; + nv->node_name[4] = 139; + nv->login_timeout = 4; + + /* + * Set default host adapter parameters + */ + nv->host_p.enable_lip_full_login = 1; + nv->reset_delay = 5; + nv->port_down_retry_count = 8; + nv->maximum_luns_per_target = 8; + status = 1; + } + + /* + * Copy over NVRAM RISC parameter block + * to initialization control block. + */ + dptr1 = (caddr_t)icb; + dptr2 = (caddr_t)&nv->parameter_block_version; + cnt = (caddr_t)&nv->host_p - (caddr_t)&nv->parameter_block_version; + while( cnt-- ) + *dptr1++ = *dptr2++; + + /* HBA node name 0 correction */ + for (cnt=0 ; cnt<8 ; cnt++) { + if (icb->node_name[cnt] != 0) + break; + } + if (cnt == 8) { + for ( cnt= 0 ; cnt < 8 ; cnt++) + icb->node_name[cnt] = icb->port_name[cnt]; + icb->node_name[0] = icb->node_name[0] & ~BIT_0; + icb->port_name[0] = icb->port_name[0] | BIT_0; + } + + /* + * Setup driver firmware options. + */ +#if QL2100_TARGET_MODE_SUPPORT + icb->firmware_options.enable_target_mode = 1; +#else + icb->firmware_options.enable_target_mode = 0; +#endif + icb->firmware_options.disable_initiator_mode = 0; + icb->firmware_options.enable_port_update_event = 1; + icb->firmware_options.enable_full_login_on_lip = 1; + + /* + * Set host adapter parameters + */ + ha->flags.enable_target_mode = icb->firmware_options.enable_target_mode; + ha->flags.disable_luns = nv->host_p.disable_luns; + ha->flags.disable_risc_code_load = nv->host_p.disable_risc_code_load; + ha->flags.set_cache_line_size_1 = nv->host_p.set_cache_line_size_1; + ha->flags.enable_64bit_addressing = nv->host_p.enable_64bit_addressing; + +#if BITS_PER_LONG > 32 + /* Enable 64bit addressing for OS/System combination supporting it */ + /* actual NVRAM bit is: nv->cntr_flags_1.enable_64bit_addressing */ + /* but we will ignore it and use BITS_PER_LONG macro to setup for */ + /* 64 or 32 bit access of host memory in all x86/ia-64/Alpha systems */ + ha->flags.enable_64bit_addressing = 1; +#else + ha->flags.enable_64bit_addressing = 0; +#endif + +#if LINUX_VERSION_CODE >= KERNEL_VERSION(2,3,18) + if (ha->flags.enable_64bit_addressing) + printk(KERN_INFO "[[[ qla2x00: 64 Bit PCI Addressing Enabled ]]]\n"); + +#if BITS_PER_LONG > 32 + /* Update our PCI device dma_mask for full 64 bit mask */ + /* ha->pdev->dma_mask = (pci_dma_t) 0xffffffffffffffffull; */ + ha->pdev->dma_mask = 0xffffffffffffffff; +#endif +#endif + ha->flags.enable_lip_reset = nv->host_p.enable_lip_reset; + ha->flags.enable_lip_full_login = nv->host_p.enable_lip_full_login; + ha->flags.enable_target_reset = nv->host_p.enable_target_reset; + ha->flags.enable_flash_db_update = nv->host_p.enable_database_storage; + + /* new for IOCTL support of APIs */ + ha->node_name[0] = icb->node_name[0]; + ha->node_name[1] = icb->node_name[1]; + ha->node_name[2] = icb->node_name[2]; + ha->node_name[3] = icb->node_name[3]; + ha->node_name[4] = icb->node_name[4]; + ha->node_name[5] = icb->node_name[5]; + ha->node_name[6] = icb->node_name[6]; + ha->node_name[7] = icb->node_name[7]; + ha->nvram_version = nv->nvram_version; + + /* empty data for QLA2100s OEM stuff */ + ha->oem_id = 0; + ha->oem_spare0 = 0; + for ( cnt= 0 ; cnt < 8 ; cnt++) { + ha->oem_string[cnt] = 0; + ha->oem_part[cnt] = 0; + ha->oem_fru[cnt] = 0; + ha->oem_ec[cnt] = 0; + } + + ha->hiwat = icb->iocb_allocation; + ha->execution_throttle = nv->execution_throttle; + + ha->retry_count = nv->retry_count; + ha->login_timeout = nv->login_timeout; + /* Set minimum login_timeout to 4 seconds. */ + if( ha->login_timeout < 4 ) + ha->login_timeout = 4; + ha->port_down_retry_count = nv->port_down_retry_count; + ha->minimum_timeout = (ha->login_timeout * ha->retry_count) + + ha->port_down_retry_count; + ha->loop_reset_delay = nv->reset_delay; + /* Will get the value from nvram. */ + ha->loop_down_timeout = LOOP_DOWN_TIMEOUT; + ha->loop_down_abort_time = LOOP_DOWN_TIME - ha->loop_down_timeout; + + /* save HBA serial number */ + ha->serial0 = nv->node_name[5]; + ha->serial1 = nv->node_name[6]; + ha->serial2 = nv->node_name[7]; + +#if USE_BIOS_MAX_LUNS + if( !nv->maximum_luns_per_target ) + ha->max_luns = MAX_LUNS-1; + else + ha->max_luns = nv->maximum_luns_per_target; +#else + ha->max_luns = MAX_LUNS-1; +#endif + + /* + * Setup ring parameters in initialization control block + */ + icb->request_q_outpointer = 0; + icb->response_q_inpointer = 0; + icb->request_q_length = REQUEST_ENTRY_CNT; + icb->response_q_length = RESPONSE_ENTRY_CNT; + icb->request_q_address[0] = LS_64BITS(ha->request_dma); + icb->request_q_address[1] = MS_64BITS(ha->request_dma); + icb->response_q_address[0] = LS_64BITS(ha->response_dma); + icb->response_q_address[1] = MS_64BITS(ha->response_dma); + +#if defined(QL_DEBUG_LEVEL_2) || defined(QL_DEBUG_LEVEL_3) + if( status ) + qla2100_print("qla2100_nvram_config: **** FAILED ****\n"); +#endif +#ifdef QL_DEBUG_LEVEL_3 + else + LEAVE("qla2100_nvram_config"); +#endif + return(status); +} + +/* +* NVRAM configuration for the 2200. +* +* Input: +* ha = adapter block pointer. +* ha->request_ring = request ring virtual address +* ha->response_ring = response ring virtual address +* ha->request_dma = request ring physical address +* ha->response_dma = response ring physical address +* +* Output: +* initialization control block in response_ring +* host adapters parameters in host adapter block +* +* Returns: +* 0 = success. +*/ +STATIC uint8_t +qla2200_nvram_config(scsi_qla_host_t *ha) { + uint8_t status = 0; + uint16_t cnt; + caddr_t dptr1, dptr2; + init_cb_t *icb = ha->init_cb; + nvram22_t *nv = (nvram22_t *)ha->request_ring; + uint16_t *wptr = (uint16_t *)ha->request_ring; + uint8_t chksum = 0; + +#ifdef QL_DEBUG_LEVEL_3 + ENTER("qla2200/2300_nvram_config"); +#endif + + if( !ha->flags.nvram_config_done ) { + + /* Verify valid NVRAM checksum. */ + for( cnt = 0; cnt < sizeof(nvram22_t)/2; cnt++ ) { + *wptr = qla2100_get_nvram_word(ha, cnt); + chksum += (uint8_t)*wptr; + chksum += (uint8_t)(*wptr >> 8); + wptr++; + } + +#if DEBUG_PRINT_NVRAM + qla2100_print( + "qla2200_nvram_config: Contents of NVRAM "); + qla2100_print("\n\r"); + qla2100_dump_buffer((uint8_t *)ha->request_ring, sizeof(nvram22_t)); +#endif + + /* Bad NVRAM data, set defaults parameters. */ + if( chksum || nv->id[0] != 'I' || nv->id[1] != 'S' || nv->id[2] != 'P' || + nv->id[3] != ' ' || nv->nvram_version < 1 ) { + /* Reset NVRAM data. */ + DEBUG(printk("Using defaults for 2200/2300 NVRAM: \n")); + DEBUG(printk("checksum=0x%x, Id0=%c Id1=%c Id2=%x, version=0x%x\n",chksum,nv->id[0],nv->id[1],nv->id[2],nv->nvram_version)); + wptr = (uint16_t *)nv; + for( cnt = 0; cnt < sizeof(nvram21_t)/2; cnt++ ) + *wptr++ = 0; + + /* + * Set default initialization control block. + */ + nv->parameter_block_version = ICB_VERSION; + nv->firmware_options.enable_fairness = 1; + nv->firmware_options.enable_fast_posting = 1; + nv->firmware_options.enable_full_login_on_lip = 1; + nv->firmware_options.enable_name_change = 1; + nv->firmware_options.expanded_ifwcb = 1; + + nv->frame_payload_size = 1024; + nv->max_iocb_allocation = 256; + nv->execution_throttle = 16; + nv->retry_count = 8; + nv->retry_delay = 1; + nv->port_name[0] = 32; + nv->port_name[3] = 224; + nv->port_name[4] = 139; + nv->login_timeout = 4; + nv->additional_firmware_options.connection_options = P2P_LOOP; + /* + * Set default host adapter parameters + */ + nv->host_p.enable_lip_full_login = 1; + nv->reset_delay = 5; + nv->port_down_retry_count = 8; + nv->maximum_luns_per_target = 8; + status = 1; + } + + /* Reset icb data */ + BZERO((caddr_t)icb, sizeof(init_cb_t)); + /* + * Copy over NVRAM RISC parameter block + * to initialization control block. + */ + dptr1 = (caddr_t)icb; + dptr2 = (caddr_t)&nv->parameter_block_version; + cnt = (caddr_t)&nv->additional_firmware_options - (caddr_t)&nv->parameter_block_version; + while( cnt-- ) + *dptr1++ = *dptr2++; + + dptr1 += (caddr_t)&icb->additional_firmware_options - (caddr_t)&icb->request_q_outpointer; + cnt = (caddr_t)&nv->host_p - (caddr_t)&nv->additional_firmware_options; + while( cnt-- ) + *dptr1++ = *dptr2++; + + /* HBA node name 0 correction */ + for (cnt=0 ; cnt<8 ; cnt++) { + if (icb->node_name[cnt] != 0) + break; + } + if (cnt == 8) { + for ( cnt= 0 ; cnt < 8 ; cnt++) + icb->node_name[cnt] = icb->port_name[cnt]; + icb->node_name[0] = icb->node_name[0] & ~BIT_0; + icb->port_name[0] = icb->port_name[0] | BIT_0; + } + + /* + * Setup driver firmware options. + */ + icb->firmware_options.enable_full_duplex = 0; +#if QL2100_TARGET_MODE_SUPPORT + icb->firmware_options.enable_target_mode = 1; +#else + icb->firmware_options.enable_target_mode = 0; +#endif + icb->firmware_options.disable_initiator_mode = 0; + icb->firmware_options.enable_port_update_event = 1; + icb->firmware_options.enable_full_login_on_lip = 1; +#if USE_TP_FW + icb->firmware_options.enable_name_change = 1; + icb->firmware_options.expanded_ifwcb = 1; +#endif + /* + * Set host adapter parameters + */ + ha->flags.enable_target_mode = icb->firmware_options.enable_target_mode; + ha->flags.disable_luns = nv->host_p.disable_luns; + ha->flags.disable_risc_code_load = nv->host_p.disable_risc_code_load; + ha->flags.set_cache_line_size_1 = nv->host_p.set_cache_line_size_1; + ha->flags.enable_64bit_addressing = nv->host_p.enable_64bit_addressing; + +#if BITS_PER_LONG > 32 + /* Enable 64bit addressing for OS/System combination supporting it */ + /* actual NVRAM bit is: nv->cntr_flags_1.enable_64bit_addressing */ + /* but we will ignore it and use BITS_PER_LONG macro to setup for */ + /* 64 or 32 bit access of host memory in all x86/ia-64/Alpha systems */ + ha->flags.enable_64bit_addressing = 1; +#else + ha->flags.enable_64bit_addressing = 0; +#endif + +#if LINUX_VERSION_CODE >= KERNEL_VERSION(2,3,18) + if (ha->flags.enable_64bit_addressing) + printk(KERN_INFO "[[[ qla2x00: 64 Bit PCI Addressing Enabled ]]]\n"); + +#if BITS_PER_LONG > 32 + /* Update our PCI device dma_mask for full 64 bit mask */ + ha->pdev->dma_mask = 0xffffffffffffffff; +#endif +#endif + ha->flags.enable_lip_reset = nv->host_p.enable_lip_reset; + ha->flags.enable_lip_full_login = nv->host_p.enable_lip_full_login; + ha->flags.enable_target_reset = nv->host_p.enable_target_reset; + ha->flags.enable_flash_db_update = nv->host_p.enable_database_storage; + ha->operating_mode = icb->additional_firmware_options.connection_options; + + /* new for IOCTL support of APIs */ + ha->node_name[0] = icb->node_name[0]; + ha->node_name[1] = icb->node_name[1]; + ha->node_name[2] = icb->node_name[2]; + ha->node_name[3] = icb->node_name[3]; + ha->node_name[4] = icb->node_name[4]; + ha->node_name[5] = icb->node_name[5]; + ha->node_name[6] = icb->node_name[6]; + ha->node_name[7] = icb->node_name[7]; + ha->nvram_version = nv->nvram_version; + + + ha->hiwat = icb->iocb_allocation; + ha->execution_throttle = nv->execution_throttle; + + ha->retry_count = nv->retry_count; + ha->login_timeout = nv->login_timeout; + /* Set minimum login_timeout to 4 seconds. */ + if( ha->login_timeout < 4 ) + ha->login_timeout = 4; + ha->port_down_retry_count = nv->port_down_retry_count; + ha->minimum_timeout = (ha->login_timeout * ha->retry_count) + + ha->port_down_retry_count; + ha->loop_reset_delay = nv->reset_delay; + /* Will get the value from nvram. */ + ha->loop_down_timeout = LOOP_DOWN_TIMEOUT; + ha->loop_down_abort_time = LOOP_DOWN_TIME - ha->loop_down_timeout; + + /* save HBA serial number */ + ha->serial0 = nv->port_name[5]; + ha->serial1 = nv->port_name[6]; + ha->serial2 = nv->port_name[7]; + + /* save OEM related items for QLA2200s and QLA2300s */ + ha->oem_id = nv->oem_id; + ha->oem_spare0 = nv->oem_spare0; + + for ( cnt= 2 ; cnt < 8 ; cnt++ ) + ha->oem_string[cnt] = nv->oem_string[cnt]; + + for ( cnt= 0 ; cnt < 8 ; cnt++ ) { + ha->oem_part[cnt] = nv->oem_part[cnt]; + ha->oem_fru[cnt] = nv->oem_fru[cnt]; + ha->oem_ec[cnt] = nv->oem_ec[cnt]; + } + +#ifdef FC_IP_SUPPORT + for (cnt = 0; cnt < 8; cnt++) + ha->acPortName[cnt] = nv->port_name[cnt]; +#endif + +#if USE_BIOS_MAX_LUNS + if( !nv->maximum_luns_per_target ) + ha->max_luns = MAX_LUNS; + else if( nv->maximum_luns_per_target < MAX_LUNS ) + ha->max_luns = nv->maximum_luns_per_target; + else + ha->max_luns = MAX_LUNS; +#else + ha->max_luns = MAX_LUNS; +#endif + + /* + * Setup ring parameters in initialization control block + */ + icb->request_q_outpointer = 0; + icb->response_q_inpointer = 0; + icb->request_q_length = REQUEST_ENTRY_CNT; + icb->response_q_length = RESPONSE_ENTRY_CNT; + icb->request_q_address[0] = LS_64BITS(ha->request_dma); + icb->request_q_address[1] = MS_64BITS(ha->request_dma); + icb->response_q_address[0] = LS_64BITS(ha->response_dma); + icb->response_q_address[1] = MS_64BITS(ha->response_dma); + + icb->lun_enables = 0; + icb->command_resource_count = 0; + icb->immediate_notify_resource_count = 0; + icb->timeout = 0; + icb->reserved_2 = 0; + + ha->flags.nvram_config_done = 1; + } + +#if defined(QL_DEBUG_LEVEL_2) || defined(QL_DEBUG_LEVEL_3) + if( status ) + qla2100_print("qla2200_nvram_config: **** FAILED ****\n"); +#endif +#ifdef QL_DEBUG_LEVEL_3 + else + LEAVE("qla2200_nvram_config"); +#endif + return(status); +} + +/* +* Get NVRAM data word +* Calculates word position in NVRAM and calls request routine to +* get the word from NVRAM. +* +* Input: +* ha = adapter block pointer. +* address = NVRAM word address. +* +* Returns: +* data word. +*/ +STATIC uint16_t +qla2100_get_nvram_word(scsi_qla_host_t *ha, uint32_t address) { + uint32_t nv_cmd; + uint16_t data; + +#ifdef QL_DEBUG_ROUTINES + uint8_t saved_print_status = ql2x_debug_print; +#endif +#ifdef QL_DEBUG_LEVEL_4 + qla2100_print("qla2100_get_nvram_word: entered\n"); +#endif + + nv_cmd = address << 16; + nv_cmd |= NV_READ_OP; + +#ifdef QL_DEBUG_ROUTINES + ql2x_debug_print = FALSE; +#endif + data = qla2100_nvram_request(ha, nv_cmd); +#ifdef QL_DEBUG_ROUTINES + ql2x_debug_print = saved_print_status; +#endif + +#ifdef QL_DEBUG_LEVEL_4 + qla2100_print("qla2100_get_nvram_word: exiting normally NVRAM data = "); + qla2100_output_number((u_long)data, 16); + qla2100_print("\n"); +#endif + return(data); +} + +/* +* NVRAM request +* Sends read command to NVRAM and gets data from NVRAM. +* +* Input: +* ha = adapter block pointer. +* nv_cmd = Bit 26 = start bit +* Bit 25, 24 = opcode +* Bit 23-16 = address +* Bit 15-0 = write data +* +* Returns: +* data word. +*/ +STATIC uint16_t +qla2100_nvram_request(scsi_qla_host_t *ha, uint32_t nv_cmd) { + uint8_t cnt; + device_reg_t *reg = ha->iobase; + uint16_t data = 0; + uint16_t reg_data; + + /* Send command to NVRAM. */ + + nv_cmd <<= 5; + for( cnt = 0; cnt < 11; cnt++ ) { + if( nv_cmd & BIT_31 ) + qla2100_nv_write(ha, NV_DATA_OUT); + else + qla2100_nv_write(ha, 0); + nv_cmd <<= 1; + } + + /* Read data from NVRAM. */ + + for( cnt = 0; cnt < 16; cnt++ ) { + WRT_REG_WORD(®->nvram, NV_SELECT+NV_CLOCK); + /* qla2100_nv_delay(ha); */ + NVRAM_DELAY(); + data <<= 1; + reg_data = RD_REG_WORD(®->nvram); + if( reg_data & NV_DATA_IN ) + data |= BIT_0; + WRT_REG_WORD(®->nvram, NV_SELECT); + /* qla2100_nv_delay(ha); */ + NVRAM_DELAY(); + } + + /* Deselect chip. */ + + WRT_REG_WORD(®->nvram, NV_DESELECT); + /* qla2100_nv_delay(ha); */ + NVRAM_DELAY(); + + return(data); +} + +STATIC void +qla2100_nv_write(scsi_qla_host_t *ha, uint16_t data) { + device_reg_t *reg = ha->iobase; + + WRT_REG_WORD(®->nvram, data | NV_SELECT); + NVRAM_DELAY(); + /* qla2100_nv_delay(ha); */ + WRT_REG_WORD(®->nvram, data | NV_SELECT | NV_CLOCK); + /* qla2100_nv_delay(ha); */ + NVRAM_DELAY(); + WRT_REG_WORD(®->nvram, data | NV_SELECT); + /* qla2100_nv_delay(ha); */ + NVRAM_DELAY(); +} + +STATIC void +qla2100_nv_delay(void) { + SYS_DELAY(NV_DELAY_COUNT); +} + + +/* +* Mailbox Command +* Issue mailbox command and waits for completion. +* +* Input: +* ha = adapter block pointer. +* mr = mailbox registers to load. +* mb = data pointer for mailbox registers. +* +* Output: +* mb[MAILBOX_REGISTER_COUNT] = returned mailbox data. +* +* Returns: +* 0 = success +* 1 = failed (mbox status != 0x4000) +*/ +STATIC uint8_t +qla2100_mailbox_command(scsi_qla_host_t *ha, uint32_t mr, uint16_t *mb) { + device_reg_t *reg = ha->iobase; + device2300_reg_t *reg2300 = ha->iobase2300; + uint8_t status = 0; + uint32_t cnt; + uint16_t *optr, *iptr; + uint16_t data, command, intreq; + srb_t *done_q_first = 0; + srb_t *done_q_last = 0; + uint32_t longdata = 0; + +#ifdef QL_DEBUG_LEVEL_3 + ENTER("qla2100_mailbox_command"); +#endif + + /* Acquire interrupt specific lock */ + QLA2100_INTR_LOCK(ha); + + DRIVER_LOCK + ha->flags.mbox_busy = TRUE; + +#ifdef QL_DEBUG_LEVEL_5 + sprintf(debug_buff,"scsi%d ",(int)ha->host_no); + qla2100_print(debug_buff); + qla2100_print("qla2100_mailbox_command: [[Start]] mbox_out[0] = "); + qla2100_output_number((u_long)*mb, 16); + qla2100_print("\n"); +#endif + /* Load mailbox registers. */ + if (ha->device_id != QLA2300_DEVICE_ID) + optr = (uint16_t *)®->mailbox0; + else + optr = (uint16_t *)®2300->mailbox0; + +#ifdef QL_DEBUG_LEVEL_5 + qla2100_print( + "qla2100_mailbox_command: Load MB word registers (displayed in bytes) = \n"); + qla2100_dump_buffer((uint8_t *)mb, 16); + qla2100_print("\n"); + qla2100_dump_buffer(((uint8_t *)mb + 0x10), 16); + qla2100_print("\n"); + qla2100_dump_buffer(((uint8_t *)mb + 0x20), 8); + qla2100_print("\n"); + qla2100_print("qla2100_mailbox_command: I/O address = "); + qla2100_output_number((u_long)optr, 16); + qla2100_print("\n"); +#endif + iptr = mb; + command = *(mb); + for( cnt = 0; cnt < MAILBOX_REGISTER_COUNT; cnt++ ) { + if( mr & BIT_0 ) { + WRT_REG_WORD(optr, (*iptr)); + } + mr >>= 1; + optr++; + iptr++; + } +#ifdef QL_DEBUG_LEVEL_5 + qla2100_dump_regs(ha->host); +#endif + + /* Issue set host interrupt command. */ + ha->flags.mbox_int = FALSE; + WRT_REG_WORD(®->host_cmd, HC_SET_HOST_INT); + + /* Wait for 30 seconds for command to finish. */ + if (ha->device_id == QLA2300_DEVICE_ID) + data = qla2100_debounce_register((uint16_t *)®2300->host_status); + else data = qla2100_debounce_register(®->istatus); + + cnt = 0x100000*2; /* 22 secs */ + + for( ; cnt > 0 && !ha->flags.mbox_int; cnt-- ) { + /* Check for pending interrupts. */ + if (ha->device_id == QLA2300_DEVICE_ID) { + switch (*mb) { + case MBC_LOAD_RAM: + case MBC_EXECUTE_FIRMWARE: + case MBC_MAILBOX_REGISTER_TEST: + case MBC_VERIFY_CHECKSUM: + case MBC_ABOUT_FIRMWARE: + /* handle ROM commands the old way */ + data = RD_REG_WORD(®->istatus); + intreq = data & RISC_INT; + break; + default: + /* handle non-ROM commands the new way */ + data = RD_REG_WORD(®->istatus); + longdata = RD_REG_DWORD(®2300->host_status); + intreq = longdata & RISC_2300_INT; + break; + } + } else { + /* QLA2100 or QLA2200 */ + data = RD_REG_WORD(®->istatus); + intreq = data & RISC_INT; + } + if ( intreq != 0 ) { + qla2100_isr(ha, + (srb_t **)&done_q_first, + (srb_t **)&done_q_last); + /* udelay(10); */ + } + udelay(10); /* v4.27 */ + } /* for */ + + /* Check for mailbox command timeout. */ + if( !cnt ) { +#ifdef QL_DEBUG_LEVEL_2 + qla2100_print( + "qla2100_mailbox_command: **** MB Command Timeout for cmd = "); + qla2100_output_number((u_long)mb[0], 16); + qla2100_print(" ****\n"); + qla2100_print( + "qla2100_mailbox_command: **** icontrol = "); + qla2100_output_number(RD_REG_WORD(®->ictrl), 16); + qla2100_print(" ****\n"); + qla2100_print( + "qla2100_mailbox_command: **** istatus = "); + qla2100_output_number((u_long)data, 16); + qla2100_print(" ****\n"); + qla2100_print( + "qla2100_mailbox_command: **** chip mailbox[0] = "); + qla2100_output_number((u_long)RD_REG_WORD(optr), 16); + qla2100_print(" ****\n"); + qla2100_dump_regs(ha->host); +#endif + ha->flags.isp_abort_needed = TRUE; + qla2100_stats.mboxtout++; + status = 1; + } else if( ha->mailbox_out[0] != MBS_CMD_CMP ) { + qla2100_stats.mboxerr++; + status = 1; + } + + /* Load return mailbox registers. */ + optr = mb; + iptr = (uint16_t *)&ha->mailbox_out[0]; + + mr = MAILBOX_REGISTER_COUNT; + while( mr-- ) + *optr++ = *iptr++; + + /* Go check for any response interrupts pending. */ + ha->flags.mbox_busy = FALSE; + + qla2100_isr(ha,(srb_t **)&done_q_first,(srb_t **)&done_q_last); + + /* Release interrupt specific lock */ + QLA2100_INTR_UNLOCK(ha); + DRIVER_UNLOCK + + if( ha->flags.isp_abort_needed ) + qla2100_abort_isp(ha); + + if( ha->flags.reset_marker ) + qla2100_rst_aen(ha); + if( ha->flags.update_config_needed ) + qla2100_update_config(ha); + if( ha->flags.loop_resync_needed ) + qla2100_loop_resync(ha); + + if( done_q_first ) + qla2100_done(ha, (srb_t **)&done_q_first, (srb_t **)&done_q_last); + +#if defined(QL_DEBUG_LEVEL_2) || defined(QL_DEBUG_LEVEL_3) + if( status ) { + qla2100_print("qla2100_mailbox_command: **** FAILED, mailbox0 = "); + qla2100_output_number((u_long)mb[0], 16); + qla2100_print(" ****\n"); + } else { +/* DEBUG(qla2100_print("qla2100_mbc: Completed OK operation=");) +DEBUG(qla2100_output_number((u_long)command, 16);) +DEBUG(qla2100_print(" \n");) +DEBUG(qla2100_print("qla2100_mbc: mailbox[1]=");) +DEBUG(qla2100_output_number((u_long)mb[1], 16);) +DEBUG(qla2100_print(" \n");) +DEBUG(qla2100_print("mbc: +++ rsp_q_in= ");) +DEBUG(qla2100_output_number(RD_REG_WORD(&ha->iobase2300->rsp_q_in), 16);) +DEBUG(qla2100_print(" +++ \n");) +DEBUG(qla2100_print("mbc: +++ rsp_q_out= ");) +DEBUG(qla2100_output_number(RD_REG_WORD(&ha->iobase2300->rsp_q_out), 16);) +DEBUG(qla2100_print(" +++ \n\n");) +DEBUG(printk("qla2100_mbc: Completed OK operation=%x\n\n",command);) */ + } +#endif +#ifdef QL_DEBUG_LEVEL_3 + LEAVE("qla2100_mailbox_command"); +#endif + return(status); +} + + + /* + * qla2100_poll + * Polls ISP for interrupts. + * + * Input: + * ha = adapter block pointer. + */ +STATIC void +qla2100_poll(scsi_qla_host_t *ha) { + device_reg_t *reg = ha->iobase; + device2300_reg_t *reg2300 = ha->iobase2300; + uint16_t data; + srb_t *done_q_first = 0; + srb_t *done_q_last = 0; + +#ifdef QL_DEBUG_LEVEL_3 + ENTER("qla2100_poll"); +#endif + + /* Acquire interrupt specific lock */ + QLA2100_INTR_LOCK(ha); + + /* Check for pending interrupts. */ + if (ha->device_id == QLA2300_DEVICE_ID) + data = qla2100_debounce_register((uint16_t *)®2300->host_status) & + RISC_2300_INT; + else data = qla2100_debounce_register(®->istatus) & + RISC_INT; + + /* Check for pending interrupts. */ + if( data ) { + DEBUG(qla2100_print("qla2100_poll: Calling isr\n");) + qla2100_isr(ha, + (srb_t **)&done_q_first, + (srb_t **)&done_q_last); + } + + /* Release interrupt specific lock */ + QLA2100_INTR_UNLOCK(ha); + + if( !ha->flags.mbox_busy ) { + if( ha->flags.isp_abort_needed ) + qla2100_abort_isp(ha); + if( ha->flags.reset_marker ) + qla2100_rst_aen(ha); + if( ha->flags.update_config_needed ) + qla2100_update_config(ha); + if( ha->flags.loop_resync_needed ) + qla2100_loop_resync(ha); + } + + if( done_q_first ) + qla2100_done(ha, (srb_t **)&done_q_first, (srb_t **)&done_q_last); + +#ifdef QL_DEBUG_LEVEL_3 + LEAVE("qla2100_poll"); +#endif +} + +/* +* qla2100_find_host +* This routine searches the host adapter database +* and return either TRUE or FALSE. +* +* Input: +* ha = adapter block pointer. +* device = device data pointer. +* +* Returns: +* TRUE - found +*/ +STATIC uint8_t +qla2100_find_host(scsi_qla_host_t *ha, device_data_t *device) { + fcdev_t *pdb; + uint16_t cnt; + + pdb = ha->phost_db; + for (cnt = 0; cnt < ha->host_db_ptr; cnt++) { + /* if nodename/portname in database */ +#if USE_PORTNAME + if (BCMP(device->wwn, pdb[cnt].name, 8) == 0) { +#else + if (BCMP(device->name, pdb[cnt].name, 8) == 0) { +#endif + return TRUE; + } + } + return FALSE; +} + +/* +* qla2100_update_host_data +* This routine updates the host device database +* +* Input: +* ha = adapter block pointer. +* device = device data pointer. +* +* Returns: +* 0 = success, if device found or added to database. +* 1 = error +* 2 = database was full and device was not configured. +*/ +STATIC uint8_t +qla2100_update_host_data(scsi_qla_host_t *ha, device_data_t *device, + uint8_t enable_slot_reuse) +{ + fcdev_t *pdb; + uint8_t status = 0; + uint8_t index; + +#ifdef QL_DEBUG_LEVEL_3 + ENTER("qla2100_update_host"); +#endif + + pdb = ha->phost_db; + index = ha->host_db_ptr; + if (index != MAX_HOST_COUNT) { + index++; +#if USE_PORTNAME + BCOPY(device->wwn, pdb[index].name, 8); +#else + BCOPY(device->name, pdb[index].name, 8); +#endif + } else if ( enable_slot_reuse ) { + index = 0; + printk(KERN_INFO "qla2100_update_host: Host table Full." + " Overwriting slot 0."); +#if USE_PORTNAME + BCOPY(device->wwn, pdb[index].name, 8); +#else + BCOPY(device->name, pdb[index].name, 8); +#endif + } else { + printk(KERN_INFO "qla2100_update_host: Host table Full."); + status = 2; + } + ha->host_db_ptr = index; + +#if defined(QL_DEBUG_LEVEL_2) || defined(QL_DEBUG_LEVEL_3) + if( status ) + qla2100_print("qla2100_update_host: **** FAILED ****\n"); +#endif +#ifdef QL_DEBUG_LEVEL_3 + else + LEAVE("qla2100_update_host"); +#endif + return(status); + +} + +/* +* qla2100_update_device_data +* This routine updates the device data in the database and logs +* onto the device if necessary. +* +* Input: +* ha = adapter block pointer. +* device = device data pointer. +* +* Returns: +* 0 = success, if device found or added to database. +* 1 = error +* 2 = database was full and device was not configured. +*/ +STATIC uint8_t +qla2100_update_device_data(scsi_qla_host_t *ha, device_data_t *device, uint8_t enable_slot_reuse) { + uint8_t status = 0; + uint8_t hostflag = 0; + uint8_t dev_configured; + uint16_t cnt, i; + uint16_t mb[MAILBOX_REGISTER_COUNT]; + +#ifdef QL_DEBUG_LEVEL_3 + ENTER("qla2100_update_device"); +#endif + + dev_configured = FALSE; + if( ha->device_id == QLA2100_DEVICE_ID ) { + ha->min_external_loopid = 1; /* v2.19.5b3 */ + ha->max_public_loop_ids = LAST_SNS_LOOP_ID - SNS_FIRST_LOOP_ID + 1; + } else { + ha->max_public_loop_ids = LAST_SNS_LOOP_ID + 1; + } + + DEBUG(sprintf(debug_buff, + "qla2100: Found device - portname=%02x%02x%02x%02x%02x%02x%02x%02x," + " nodename=%02x%02x%02x%02x%02x%02x%02x%02x," + " port Id=%06lx, loop id=%04x\n", + device->wwn[0], device->wwn[1], + device->wwn[2], device->wwn[3], + device->wwn[4], device->wwn[5], + device->wwn[6], device->wwn[7], + device->name[0], device->name[1], + device->name[2], device->name[3], + device->name[4], device->name[5], + device->name[6], device->name[7], + device->port_id[0] << 16 | device->port_id[1] << 8 | device->port_id[2], device->loop_id);) + DEBUG(qla2100_print(debug_buff);) + + /* if we already login to the host adapter then skip it */ + if ( qla2100_find_host(ha, device) ) { + DEBUG(printk("update_db: Skipping host adapter..\n");) + return( status ); + } + + /* Search to see if node name is already in database. If found then change loop ID in database. */ + for( cnt = 0; cnt < MAX_FIBRE_DEVICES && !dev_configured; cnt++ ) { + /* if nodename/portname in database then replace it */ +#if USE_PORTNAME /* updated for ioctl merge */ + if (BCMP(device->wwn, ha->fc_db[cnt].wwn, 8) == 0) { +#else + if (BCMP(device->name, ha->fc_db[cnt].name, 8) == 0) { +#endif + ha->fc_db[cnt].flag &= ~DEV_MISSING; + /* if device was configured by user then find and assign a loop ID for it */ + if( ha->fc_db[cnt].loop_id == PORT_AVAILABLE ) { + DEBUG(qla2100_print("Port marked as already assigned.\n");) + /* If device found is on the public loop. */ + /* then find the next available fabric loop ID */ + if( device->loop_id == 0xffff ) { + status = 1; + /* Search the public database for first available slot. */ + for( i = ha->min_external_loopid; i < ha->max_public_loop_ids; i++ ) { + if( !ha->fabricid[i].in_use ) { + ha->fabricid[i].in_use = TRUE; + if( ha->device_id == QLA2100_DEVICE_ID ) + device->loop_id = SNS_FIRST_LOOP_ID + i; + else + device->loop_id = i; + ha->fc_db[cnt].loop_id = device->loop_id; + ha->fc_db[cnt].port_id[0] = device->port_id[0]; + ha->fc_db[cnt].port_id[1] = device->port_id[1]; + ha->fc_db[cnt].port_id[2] = device->port_id[2]; + ha->fc_db[cnt].flag |= DEV_PUBLIC; + status = 0; + break; + } + } /* end of for */ + } else { /* change the local loop ID in database */ + ha->fc_db[cnt].loop_id = device->loop_id; + } + } else /* loop id may have been previously used */ + { + /* If device is on public loop. */ + if( device->loop_id == 0xffff ) { + /* It was previously public, so use previously assigned loop id. */ + if( ha->fc_db[cnt].flag & DEV_PUBLIC ) + if( ha->device_id == QLA2100_DEVICE_ID ) + device->loop_id = ha->fc_db[cnt].loop_id; + else { + /* if the same topology and public loop */ + /* search for the next avaiable public loop ID */ + DEBUG(printk("update_db: topology prev %d, curr %d\n", + ha->prev_topology, ha->current_topology );) + if( ha->prev_topology == ha->current_topology ) { + if( (ha->min_external_loopid) && + (ha->fc_db[cnt].loop_id < ha->min_external_loopid) ) { + status = 1; + /* find a loop ID for the Public device */ + for( i = ha->min_external_loopid; i < ha->max_public_loop_ids; i++ ) + if( !ha->fabricid[i].in_use ) { + ha->fabricid[i].in_use = TRUE; + device->loop_id = i; + ha->fc_db[cnt].loop_id = device->loop_id; + status = 0; + break; + } + } else + device->loop_id = ha->fc_db[cnt].loop_id; + } else { + status = 1; + /* Find an unused loop ID */ + for( i = ha->min_external_loopid; i < ha->max_public_loop_ids; i++ ) + if( !ha->fabricid[i].in_use ) { + ha->fabricid[i].in_use = TRUE; + device->loop_id = i; + ha->fc_db[cnt].loop_id = device->loop_id; + status = 0; + break; + } + } + + } else { + /* If it moved from private to public loop, assign new public loop id. */ + status = 1; + /* Find an unused loop ID */ + for( i = ha->min_external_loopid; i < ha->max_public_loop_ids; i++ ) + if( !ha->fabricid[i].in_use ) { + ha->fabricid[i].in_use = TRUE; + if( ha->device_id == QLA2100_DEVICE_ID ) + + device->loop_id = SNS_FIRST_LOOP_ID + i; + else + device->loop_id = i; + ha->fc_db[cnt].loop_id = device->loop_id; + ha->fc_db[cnt].flag |= DEV_PUBLIC; + ha->fc_db[cnt].port_id[0] = device->port_id[0]; + ha->fc_db[cnt].port_id[1] = device->port_id[1]; + ha->fc_db[cnt].port_id[2] = device->port_id[2]; + status = 0; + break; + } + } + } else { + /* The found device is on private loop but was + previously on public loop, so free public loop id. */ + if( ha->fc_db[cnt].flag & DEV_PUBLIC ) { + ha->fc_db[cnt].flag &= ~DEV_PUBLIC; + i = ha->fc_db[cnt].loop_id - SNS_FIRST_LOOP_ID; + ha->fabricid[i].in_use = 0; + } + ha->fc_db[cnt].loop_id = device->loop_id; + } + } + + /* If public device in database */ + if( !status && (ha->fc_db[cnt].flag) & DEV_PUBLIC ) { + + + /* If public loop device, compare port id to see if + device moves to another NL/N port. */ + if( ha->fc_db[cnt].port_id[0] != device->port_id[0] || + ha->fc_db[cnt].port_id[1] != device->port_id[1] || + ha->fc_db[cnt].port_id[2] != device->port_id[2] ) { + if( ha->prev_topology == ha->current_topology ) { + /* Port id changed, log device out then log back + in with new port id but same loop id. */ + mb[0] = MBC_LOGOUT_FABRIC_PORT; + mb[1] = ha->fc_db[cnt].loop_id << 8; + qla2100_mailbox_command(ha, BIT_1|BIT_0, &mb[0]); + ha->fc_db[cnt].port_id[0] = device->port_id[0]; + ha->fc_db[cnt].port_id[1] = device->port_id[1]; + ha->fc_db[cnt].port_id[2] = device->port_id[2]; + } + } + /* + * Try and find a loop Id for the given + * fabric port. We keep trying Ids until we find + * a good one. + */ + mb[0] = 0x4008; + while( !status && mb[0] == 0x4008 ) { + DEBUG(printk("update_db: Trying Fabric Login @ loop id= %d, port id= %06x\n", device->loop_id,device->port_id);) + mb[0] = MBC_LOGIN_FABRIC_PORT; + mb[1] = device->loop_id << 8 | 0x01; + mb[2] = device->port_id[0]; + mb[3] = device->port_id[1] << 8 | device->port_id[2]; + qla2100_mailbox_command(ha, BIT_3|BIT_2|BIT_1|BIT_0, + &mb[0]); + /* Command parameter error or all IDS used */ + if ( mb[0] == 0x4006 || mb[0] == 0x4009 ) { + status = 1; + DEBUG(printk("update_db: (1) Failed Fabric login with Loop ID = %d\n", device->loop_id);) + } + /* + * if loop Id is in use then try the next Id . + */ + if( mb[0] == 0x4008 ) { + DEBUG(printk("update_db: Used Loop ID = %04x, port id=%06x - trying next id\n", device->loop_id, + ((mb[1] << 16) | (((mb[2] >>8 ) &0xff) << 8) | (mb[2] & 0xff)));) + if( device->loop_id++ <= LAST_SNS_LOOP_ID ) + ha->fabricid[device->loop_id].in_use = TRUE; + else + status = 1; + } + } + /* Login succuessful */ + if( !status ) { + /* if different host */ + if( (mb[1] & 0x1) ) { /* v2.19.05b3 */ + DEBUG(printk("update_db: Warning -- Adapter found: port id=%06x, tgt=%d\n", + ((mb[1] << 16) | (((mb[2] >>8 ) &0xff) << 8) | (mb[2] & 0xff)),cnt);) + qla2100_update_host_data(ha, device, enable_slot_reuse); + ha->fabricid[device->loop_id].in_use = FALSE; + hostflag++; + } else { + /* 4.31.8 update loop id in database */ + ha->fc_db[cnt].loop_id = device->loop_id; + } + } +#if 0 + /* Command error */ + if( !status && mb[0] != 0x4005 ) { + /* Issue Abort target command to cause RISC to + flush all commands outstanding for this device. + Commands will be returned with "Aborted" status. */ + mb[0] = MBC_ABORT_TARGET; + mb[1] = device->loop_id << 8; + mb[2] = 1; + status = qla2100_mailbox_command(ha, BIT_2|BIT_1|BIT_0, &mb[0]); + } +#endif + } + dev_configured = TRUE; + } + } + + /* Device not already in database so find */ + /* an empty slot and loop id for it. */ + if( !dev_configured ) { + DEBUG(printk("qla2100_db_update: New Device - not in database.\n");) + + /* If device is on public loop. */ + /* First find an unused Fabric loop ID */ + /* then find a slot. */ + if( device->loop_id == 0xffff ) { + status = 1; + for( i = ha->min_external_loopid; i < ha->max_public_loop_ids; i++ ) { + if( !ha->fabricid[i].in_use ) { + ha->fabricid[i].in_use = TRUE; + if( ha->device_id == QLA2100_DEVICE_ID ) + device->loop_id = SNS_FIRST_LOOP_ID + i; + else + device->loop_id = i; + status = 0; + break; + } + } + /* Preset status to Loop ID used */ + mb[0] = 0x4008; + /* Check to insure loop ID for fabric device is good */ + while( !status && mb[0] == 0x4008 ) { + DEBUG(printk("update_db: Trying Fabric Login @ loop id %d\n", device->loop_id);) + mb[0] = MBC_LOGIN_FABRIC_PORT; + mb[1] = device->loop_id << 8 | 0x01; + mb[2] = device->port_id[0]; + mb[3] = device->port_id[1] << 8 | device->port_id[2]; + qla2100_mailbox_command(ha, BIT_3|BIT_2|BIT_1|BIT_0, &mb[0]); + if ( mb[0] == 0x4006 || mb[0] == 0x4009 ) { + status = 1; + DEBUG(printk("update_db: (2) Failed Fabric login with Loop ID = %d\n", device->loop_id);) + } + if( mb[0] == 0x4008 ) { + DEBUG(printk("update_db: (2) Used Fabric Loop ID = %04x, port id=%06x\n", device->loop_id, + ((mb[1] << 16) | (((mb[2] >>8 ) &0xff) << 8) | (mb[2] & 0xff)));) + if( device->loop_id++ <= LAST_SNS_LOOP_ID ) + ha->fabricid[device->loop_id].in_use = TRUE; /* v2.19.05b3 */ + else + status = 1; + } + if( (mb[1] & 0x1) ) { /* v2.19.05b3 */ + qla2100_update_host_data(ha, device, enable_slot_reuse); + DEBUG(printk("update_db: Adapter found: port id=%06x\n", + (device->port_id[0] <<16) | + (device->port_id[1] << 8) | (device->port_id[2])) ); + ha->fabricid[device->loop_id].in_use = FALSE; + hostflag++; + } + } + } + /* Now find an empty slot for the device */ + if( !status && hostflag == 0 ) { + if( ha->device_id == QLA2100_DEVICE_ID ) + ha->min_external_loopid = SNS_FIRST_LOOP_ID; + /* Find a empty slot and add device into database. */ + for( i = 0; i < MAX_FIBRE_DEVICES; i++ ) + if( ha->fc_db[i].loop_id == PORT_UNUSED ) { + ha->fc_db[i].flag &= ~DEV_MISSING; + + /* get and set both wwnn and wwpn */ + BCOPY(device->name, ha->fc_db[i].name, 8); + BCOPY(device->wwn, ha->fc_db[i].wwn, 8); + + ha->fc_db[i].loop_id = device->loop_id; + if( device->loop_id >= ha->min_external_loopid ) { + ha->fc_db[i].flag |= DEV_PUBLIC; + ha->fc_db[i].port_id[0] = device->port_id[0]; + ha->fc_db[i].port_id[1] = device->port_id[1]; + ha->fc_db[i].port_id[2] = device->port_id[2]; + } + ha->flags.updated_fc_db = TRUE; + dev_configured = TRUE; + break; + } + if( !dev_configured ) { + if( enable_slot_reuse ) { + for( i = 0; i < MAX_FIBRE_DEVICES; i++ ) + if( ha->fc_db[i].loop_id == PORT_AVAILABLE ) { + ha->fc_db[i].flag &= ~DEV_MISSING; +#if USE_PORTNAME /* ioctl support change */ + BCOPY(device->wwn, ha->fc_db[i].wwn, 8); +#else + BCOPY(device->name, ha->fc_db[i].name, 8); +#endif + ha->fc_db[i].loop_id = device->loop_id; + if( device->loop_id >= ha->min_external_loopid ) { + ha->fc_db[i].flag |= DEV_PUBLIC; + ha->fc_db[i].port_id[0] = device->port_id[0]; + ha->fc_db[i].port_id[1] = device->port_id[1]; + ha->fc_db[i].port_id[2] = device->port_id[2]; + } + ha->flags.updated_fc_db = TRUE; + break; + } + } else { + ha->fabricid[device->loop_id].in_use = FALSE; + status = 2; + } + + } + + } + } +#if defined(QL_DEBUG_LEVEL_2) || defined(QL_DEBUG_LEVEL_3) + if( status ) + qla2100_print("qla2100_update_device: **** FAILED ****\n"); +#endif +#ifdef QL_DEBUG_LEVEL_3 + else + LEAVE("qla2100_update_device"); +#endif + return(status); + } + +/* +* qla2100_sns_device +* Setup Simple Name Server devices with loop ID's. +* +* Input: +* ha = adapter block pointer. +* +* Returns: +* 0 = success. +* 1 = error +* 2 = database was full and device was not configured. +*/ +STATIC uint8_t +qla2100_sns_device(scsi_qla_host_t *ha, uint8_t enable_slot_reuse) { + uint8_t status = 1; + uint8_t first_port_id[3]; + uint8_t next_port_id[3]; + uint8_t host_port_id[3]; + sns_data_t *sns; +#if BITS_PER_LONG > 32 + uint64_t phys_address = 0; +#else + uint32_t phys_address = 0; +#endif + uint16_t mb[MAILBOX_REGISTER_COUNT]; + uint8_t use_gan = 1; + uint8_t retry_count = 0; + gp_idnn_t *gp_idnn; + uint16_t i; + device_data_t device; + uint8_t db_full = 0; + uint16_t public_count; + uint32_t fabric_devices = 0; + +#ifdef QL_DEBUG_LEVEL_3 + ENTER("qla2100_sns_device"); +#endif + + /* If FL port exists, then SNS is present */ + DEBUG(printk("qla2100_sns_device: Checking for Fabric.\n");) + mb[0] = MBC_GET_PORT_NAME; + mb[1] = SNS_FL_PORT << 8; /* port name */ + if( !qla2100_mailbox_command(ha, BIT_1|BIT_0, &mb[0]) ) { + +#ifdef RCSN + /* Mark devices that need re-synchronization. */ + qla2100_device_resync(ha); +#endif + + /* Fl port is present */ + host_port_id[0] = ha->port_id[0]; + host_port_id[1] = ha->port_id[1]; + host_port_id[2] = ha->port_id[2]; + + /* Calculate the max number of public ports */ + if( ha->device_id == QLA2100_DEVICE_ID ) + public_count = ha->max_public_loop_ids; + else + public_count = ha->max_public_loop_ids - ha->min_external_loopid; + + /* Register with name server as type fc4 device */ + +#ifdef FC_IP_SUPPORT + /* Register with name server as type 5 device */ + if (ha->flags.enable_ip == TRUE) { + qla2x00_register_ip_device(ha); + } + + /* If IP enable, skip GP_IDNN and just use GAN */ + if (ha->flags.enable_ip == TRUE) + goto tryGan; +#endif /* FC_IP_SUPPORT */ + + /* Find out if this is a Brocade switch, if so do GP_IDNN. */ + /* otherwise use the GAN */ + mb[0] = MBC_GET_PORT_NAME; + mb[1] = SNS_FL_PORT << 8 | BIT_0; /* node name */ + qla2100_mailbox_command(ha, BIT_1|BIT_0, &mb[0]); + if( mb[2] == 0x0010 && mb[3] == 0x6000 && + (mb[6] & 0x00FF) == 0x0069 ) { +/* 4.10 */ +#if LINUX_VERSION_CODE < KERNEL_VERSION(2,3,18) + gp_idnn = KMALLOC(GP_IDNN_LENGTH); + if ( gp_idnn != NULL ) { + phys_address = VIRT_TO_BUS(gp_idnn); + BZERO((caddr_t)gp_idnn, GP_IDNN_LENGTH); + } +#else + gp_idnn = pci_alloc_consistent(ha->pdev, + GP_IDNN_LENGTH, + &phys_address); + BZERO((caddr_t)gp_idnn, GP_IDNN_LENGTH); +#endif + if ( gp_idnn != NULL ) { + /* Retry GP_IDNN til valid list or retries done */ + while( retry_count++ < 10 ) { + /* + * Issue GP_IDNN to get list of port IDs and + * node names from name server. + */ + gp_idnn->req.buffer_length = GP_IDNN_LENGTH/2; + /* 4.10 */ + gp_idnn->req.buffer_address[0] = + LS_64BITS(phys_address); + gp_idnn->req.buffer_address[1] = + MS_64BITS(phys_address); + gp_idnn->req.subcommand_length = 6; + gp_idnn->req.subcommand = 0x173; + gp_idnn->req.length = GP_IDNN_LENGTH / 4; + gp_idnn->req.protocol = 0x08; + + mb[0] = MBC_SEND_SNS_COMMAND; + mb[1] = 14; + mb[3] = LSW(phys_address); + mb[2] = MSW(phys_address); + mb[7] = QL21_64BITS_3RDWD(phys_address); + mb[6] = QL21_64BITS_4THWD(phys_address); + if( !qla2100_mailbox_command(ha, + BIT_7|BIT_6|BIT_3|BIT_2|BIT_1|BIT_0, + &mb[0]) ) { + if( gp_idnn->rsp.response == SNS_ACCEPT ) { + DEBUG3(printk("Sns: Get all Fabric devices:\n");) + /* Go down device list and add devices to database. */ + for( i = 0; i < public_count; i++ ) { + /* if not host port id then add it to the database */ + if( gp_idnn->rsp.port_data[i].port_id[0] != host_port_id[0] || + gp_idnn->rsp.port_data[i].port_id[1] != host_port_id[1] || + gp_idnn->rsp.port_data[i].port_id[2] != host_port_id[2] ) { + BCOPY(gp_idnn->rsp.port_data[i].nodename, device.name, 8); + /* get loop id */ + device.port_id[0] = gp_idnn->rsp.port_data[i].port_id[0]; + device.port_id[1] = gp_idnn->rsp.port_data[i].port_id[1]; + device.port_id[2] = gp_idnn->rsp.port_data[i].port_id[2]; +#if USE_PORTNAME + /* Get portname */ + if( qla2100_sns_get_name(ha, &device, 0) ) { + status = 1; /* v2.19.5b4 */ + break; + } +#endif + device.loop_id = 0xffff; + /* Update device database and login to device. */ + fabric_devices++; + if( (status = qla2100_update_device_data(ha, &device, enable_slot_reuse)) ) { + if( status == 2 ) + db_full = 1; + else + break; + } + } + if( gp_idnn->rsp.port_data[i].controlbyte == 0x80 ) + break; + } + use_gan = 0; + break; + } + } + /* Wait for 100ms before retrying */ + for( i = 0; i <= 10000; i++ ) { + udelay(10); + } + } +#if LINUX_VERSION_CODE < KERNEL_VERSION(2,3,18) + KMFREE(gp_idnn, GP_IDNN_LENGTH); +#else + pci_free_consistent(ha->pdev, GP_IDNN_LENGTH, + gp_idnn, phys_address); +#endif + } else { + use_gan = 0; +#ifdef QL_DEBUG_LEVEL_2 + qla2100_print( + "qla2100_sns_device: Failed to allocate memory, No FL Port\n"); +#endif + } + } + /* Use the GAN (GA_NXT) Name server request to discover the ports */ + + /* + * Go through GAN list to find all fabric devices. Will perform + * necessary logout of previously existed devices that have changed + * and save new devices in a new device list. + * + */ + + if( use_gan ) { +#ifdef FC_IP_SUPPORT + tryGan: +#endif + + /* Find all registered ports in the Fabric */ +/* 4.10 */ +#if LINUX_VERSION_CODE < KERNEL_VERSION(2,3,18) + sns = KMALLOC(sizeof(sns_data_t)); + if ( sns != NULL ) { + phys_address = VIRT_TO_BUS(sns); + BZERO((caddr_t)sns, sizeof(sns_data_t)); + } +#else + sns = pci_alloc_consistent(ha->pdev, + sizeof(sns_data_t), + &phys_address); + BZERO((caddr_t)sns, sizeof(sns_data_t)); +#endif + if ( sns != NULL ) { + DEBUG(printk("qla2100_sns_device: Performing a GAN (%d)\n",public_count);) + status = 0; + /* start with port ID = 0 */ + first_port_id[0] = first_port_id[1] = first_port_id[2] = 0; + next_port_id[0] = next_port_id[1] = next_port_id[2] = 0; + mb[0] = 0; + for( i = 0; i < public_count && !ha->loop_down_timer && + !ha->flags.loop_resync_needed; i++ ) { + /* GAN Get all next entries for the selected port ID from SNS. */ + BZERO((caddr_t)sns, sizeof(sns_data_t)); + sns->p.req.hdr.buffer_length = 318; /*304*/ + sns->p.req.hdr.buffer_address[0] = + LS_64BITS(phys_address); + sns->p.req.hdr.buffer_address[1] = + MS_64BITS(phys_address); + sns->p.req.hdr.subcommand_length = 6; + sns->p.req.subcommand = 0x100; + sns->p.req.param[6] = next_port_id[2]; + sns->p.req.param[7] = next_port_id[1]; + sns->p.req.param[8] = next_port_id[0]; + + mb[0] = MBC_SEND_SNS_COMMAND; + mb[1] = 14; + mb[3] = LSW(phys_address); + mb[2] = MSW(phys_address); + mb[7] = QL21_64BITS_3RDWD(phys_address); + mb[6] = QL21_64BITS_4THWD(phys_address); + if( !qla2100_mailbox_command(ha, + BIT_7|BIT_6|BIT_3|BIT_2|BIT_1|BIT_0, + &mb[0]) ) { + if( sns->p.rsp[8] != 0x80 || /* SNS_ACCEPT */ + sns->p.rsp[9] != 0x02 ) { /* 04/18/00 */ + printk(KERN_INFO "qla2100_sns_device: SEND_SNS_COMMAND Failed - 0x%2x%2x mb_res=%x\n", + sns->p.rsp[8],sns->p.rsp[9],mb[0]); + status = 1; + break; + } + /* save next port ID */ + next_port_id[0] = sns->p.rsp[17]; + next_port_id[1] = sns->p.rsp[18]; + next_port_id[2] = sns->p.rsp[19]; + + } else { +#ifdef QL_DEBUG_LEVEL_2 + qla2100_print( + "qla2100_sns_device: MBC_SEND_SNS_COMMAND Failed, No FL Port\n"); +#endif + /* v2.19.5 */ + DEBUG(printk("qla2100_sns_device: Failed Performing a GAN mb0=0x%x, mb1=0x%x\n", + mb[0],mb[1]);) + status = 1; + break; + } + + /* Assign loop ID for device on SNS. */ + if( (next_port_id[0] != first_port_id[0] || + next_port_id[1] != first_port_id[1] || + next_port_id[2] != first_port_id[2]) + && (sns->p.rsp[284] || sns->p.rsp[285] || + sns->p.rsp[286] || sns->p.rsp[287] || + sns->p.rsp[288] || sns->p.rsp[289] || + sns->p.rsp[290] || sns->p.rsp[291]) ) { + /* if port Id local loop skip this ID */ + if( next_port_id[0] != host_port_id[0] || + next_port_id[1] != host_port_id[1] || + next_port_id[2] != host_port_id[2] ) { +#if USE_PORTNAME + /* Extract portname */ + BCOPY(&sns->p.rsp[20], device.wwn, 8); +#endif + /* Extract nodename */ + BCOPY(&sns->p.rsp[284], device.name, 8); + /* extract port ID */ + device.port_id[0] = next_port_id[0]; + device.port_id[1] = next_port_id[1]; + device.port_id[2] = next_port_id[2]; + device.loop_id = 0xffff; + + /* Update device database and login device in */ + + /* if McData, skip all port types except 1 (N_port) & 2 (NL_port) */ + if ( !( (sns->p.rsp[16] == 0x01) || + (sns->p.rsp[16] == 0x02) ) ) { + DEBUG(printk("qla2100_sns_device: Skipping port type %x\n", sns->p.rsp[16]);) + } + +#ifdef FC_IP_SUPPORT + else if (sns->p.rsp[579] & 0x20) { + fabric_devices++; + /* Update IP device */ + if (qla2x00_update_ip_device_data(ha, &device) == QL_STATUS_FATAL_ERROR) { + status = 1; + break; + } + /* Update SCSI device */ + } +#endif + else { + fabric_devices++; + if( (status = qla2100_update_device_data(ha, &device, enable_slot_reuse)) ) { + if( status == 2 ) + db_full = 1; + break; + } + } +#ifdef FC_IP_SUPPORT + } +#endif + } + + /* + * Save first port if not repeating port + * on another Loop ID. + */ + if( !(first_port_id[0] || first_port_id[1] || + first_port_id[2]) ) { + first_port_id[0] = next_port_id[0]; + first_port_id[1] = next_port_id[1]; + first_port_id[2] = next_port_id[2]; + } + } else + break; + } +#if LINUX_VERSION_CODE < KERNEL_VERSION(2,3,18) + KMFREE(sns, sizeof(sns_data_t)); +#else + pci_free_consistent(ha->pdev, sizeof(sns_data_t), + sns, phys_address); +#endif + + } +#ifdef QL_DEBUG_LEVEL_2 + else + qla2100_print( + "qla2100_sns_device: Failed to allocate memory, No FL Port\n"); +#endif + } + } else +#ifdef QL_DEBUG_LEVEL_2 + qla2100_print( + "qla2100_sns_device: MBC_GET_PORT_NAME Failed, No FL Port\n"); +#else + DEBUG(printk("No Fabric found.\n");) +#endif + + if( fabric_devices > 0) + ha->device_flags |= DFLG_FABRIC_DEVICES; + + if( db_full ) + status = 2; + + /* Update iff F/FL found and update O.K. */ + if( !status ) + ha->prev_topology = ha->current_topology; + +#if defined(QL_DEBUG_LEVEL_2) || defined(QL_DEBUG_LEVEL_3) + if( status ) + qla2100_print("qla2100_sns_device: **** FAILED ****\n"); +#endif +#ifdef QL_DEBUG_LEVEL_3 + else + LEAVE("qla2100_sns_device"); +#endif + return(status); +} + +#if USE_PORTNAME +/* +* qla2100_sns_get_name +* This routine is called tot do the SNS Get Port/Name command +* of the specified port. +* +* Input: +* ha = adapter block pointer. +* flag = 0 - port name , 1 - node name +* +* Output: +* +*/ +STATIC uint8_t qla2100_sns_get_name( scsi_qla_host_t *ha, device_data_t *device, uint8_t flag ) { + uint8_t lStatus = 0; + uint16_t wRetryCount; +#if BITS_PER_LONG > 32 + uint64_t phys_address = 0; +#else + uint32_t phys_address = 0; +#endif + uint16_t mb[MAILBOX_REGISTER_COUNT]; + uint16_t subCmd, response; + sns_data_t *sns; + + /* Set retry count */ + if ( flag ) + subCmd = 0x113; + else + subCmd = 0x112; + DEBUG2(printk("qla2100_SnsGetName: Get opcode %x - name for port Id %06x\n", subCmd, + (uint32_t)(device->port_id[0] << 16 | device->port_id[1] << 8 | device->port_id[2]));) + + wRetryCount = 2; + while (wRetryCount--) { + /* Do 'Get Port/Node name' mailbox command for the FL attached device */ +/* 4.10 */ +#if LINUX_VERSION_CODE < KERNEL_VERSION(2,3,18) + sns = KMALLOC(sizeof(sns_data_t)); + if ( sns != NULL ) { + phys_address = VIRT_TO_BUS(sns); + BZERO((caddr_t)sns, sizeof(sns_data_t)); + } +#else + sns = pci_alloc_consistent(ha->pdev, + sizeof(sns_data_t), + &phys_address); + BZERO((caddr_t)sns, sizeof(sns_data_t)); +#endif + if ( sns != NULL ) { + BZERO((caddr_t)sns, sizeof(sns_data_t)); + sns->p.req.hdr.buffer_length = 12; + /* 4.10 */ + sns->p.req.hdr.buffer_address[0] = + LS_64BITS(phys_address); + sns->p.req.hdr.buffer_address[1] = + MS_64BITS(phys_address); + sns->p.req.hdr.subcommand_length = 6; + sns->p.req.subcommand = subCmd; + sns->p.req.param[6] = device->port_id[2]; + sns->p.req.param[7] = device->port_id[1]; + sns->p.req.param[8] = device->port_id[0]; + sns->p.req.param[9] = 0; + + mb[0] = MBC_SEND_SNS_COMMAND; + mb[1] = 14; + mb[3] = LSW(phys_address); + mb[2] = MSW(phys_address); + mb[7] = QL21_64BITS_3RDWD(phys_address); + mb[6] = QL21_64BITS_4THWD(phys_address); + if( !qla2100_mailbox_command(ha, + BIT_7|BIT_6|BIT_3|BIT_2|BIT_1|BIT_0, + &mb[0]) ) { + + response = sns->p.rsp[8] | (sns->p.rsp[9] << 8); + if( response == SNS_ACCEPT ) { + if ( flag ) { + BCOPY(&sns->p.rsp[16], device->name, 8); + } else { + BCOPY(&sns->p.rsp[16], device->wwn, 8); + } + } else { + printk(KERN_WARNING "qla2100_SnsGetName: [ERROR] Get Name mb cmd response is not accept - status %x\n", mb[0]); + } + } else if (mb[0] == MBS_FATAL_ERROR) { + printk(KERN_WARNING "qla2100_SnsGetName: [ERROR] Get Name mb cmd fatal error - status %x\n", mb[0]); + lStatus = 1; + break; + } else { + printk(KERN_WARNING "qla2100_SnsGetName: [ERROR] Get Name mb cmd failed - status %x\n", mb[0]); + } + + } +#if LINUX_VERSION_CODE < KERNEL_VERSION(2,3,18) + KMFREE(sns, sizeof(sns_data_t)); +#else + pci_free_consistent(ha->pdev, sizeof(sns_data_t), + sns, phys_address); +#endif + } + return(lStatus); + +} +#endif + +/* +* qla2100_init_fc_db +* Initializes Fibre Channel Device Database. +* +* Input: +* ha = adapter block pointer. +* +* Output: +* ha->fc_db = initialized +*/ +STATIC void +qla2100_init_fc_db(scsi_qla_host_t *ha) { + uint16_t cnt; + +#ifdef QL_DEBUG_LEVEL_3 + ENTER("qla2100_init_fc_db"); +#endif + + /* Initialize fc database if it is not initialized. */ + if( !ha->fc_db[0].loop_id && !ha->fc_db[1].loop_id ) { + ha->flags.updated_fc_db = FALSE; + + /* Initialize target database. */ + for( cnt = 0; cnt < MAX_FIBRE_DEVICES; cnt++ ) { + ha->fc_db[cnt].name[0] = 0L; + ha->fc_db[cnt].name[1] = 0L; + ha->fc_db[cnt].loop_id = PORT_UNUSED; + ha->fc_db[cnt].port_login_retry_count = 8; + ha->fc_db[cnt].flag = 0; /* v2.19.5b3 */ + ha->fc_db[cnt].port_timer = 0; /* v2.19.8 */ + } + +#if USE_FLASH + /* Move flash database to driver database. */ + qla2100_get_database(ha); +#endif + } + +#ifdef QL_DEBUG_LEVEL_3 + LEAVE("qla2100_init_fc_db"); +#endif +} + +/* +* qla2100_configure_fabric +* Setup fabric devices with loop ID's. +* +* Input: +* ha = adapter block pointer. +* enable_slot_reuse = allows the use of PORT_AVAILABLE slots. +* +* Returns: +* 0 = success. +* 1 = error. +* 2 = database was full and a device was not configured. +* +* Context: +* Kernel context. +*/ +STATIC uint8_t +qla2100_configure_fabric(scsi_qla_host_t *ha, + uint8_t enable_slot_reuse) +{ + uint8_t status = 0; + uint16_t i; + + /* get public loop devices */ + if( !ha->loop_down_timer && !ha->flags.loop_resync_needed ){ + /* Configure loop */ + if( !qla2100_configure_hba(ha) ) { + if( ha->device_id == QLA2100_DEVICE_ID ) { + ha->max_public_loop_ids = LAST_SNS_LOOP_ID - SNS_FIRST_LOOP_ID + 1; + } else { + ha->max_public_loop_ids = LAST_SNS_LOOP_ID + 1; + /* dg 09/15 */ + /* if the topology have change then make all devices available */ + if( ha->prev_topology != ha->current_topology ) { + /* Mark all fabric devices that where present as AVAILABLE */ + for( i = 0; i < ha->max_public_loop_ids; i++ ) + if( (i != SNS_FL_PORT) && (i != FABRIC_CONTROLLER) + && (i != SIMPLE_NAME_SERVER) ) + ha->fabricid[i].in_use = FALSE; + } + } + status = qla2100_sns_device(ha, enable_slot_reuse); + qla2100_restart_queues(ha,TRUE); + } + status = 1; + } + return( status ); +} + +/* +* qla2100_check_devices +* Check devices with loop ID's. +* +* Input: +* ha = adapter block pointer. +* +* Returns: +* 0 = success. +* 1 = retry needed +* +* Context: +* Kernel context. +*/ +STATIC uint8_t +qla2100_check_devices(scsi_qla_host_t *ha) { + int cnt; + uint8_t ret = 0; + uint16_t mb[MAILBOX_REGISTER_COUNT]; + + /* + * Retry any devices that wasn't found but as a WWN. + */ + /* v2.19.05b6 */ + for( cnt = 0; cnt < MAX_FIBRE_DEVICES; cnt++ ) { + if( (ha->fc_db[cnt].flag & DEV_MISSING) && + !(ha->fc_db[cnt].flag & DEV_OFFLINE) ) { + /* + * This dev was not detected but its WWN + * is valid. To handle the case where + * the switch may not be giving us the + * device list correctly, schedule for + * a login retry later if not previously + * done so. + */ + DEBUG(printk("qla2100_sns:Port login retry - target %d, count=%d\n",cnt, + ha->fc_db[cnt].port_login_retry_count); ) + if( ha->fc_db[cnt].port_login_retry_count ) + ha->fc_db[cnt].port_login_retry_count--; + + /* + * If after decrement the retry count + * becomes 0, mark this device OFFLINE so + * no more retries will be done based + * on this device. + */ + if (ha->fc_db[cnt].port_login_retry_count == 0) { + DEBUG(printk("qla2100_sns:Port set to OFFLINE - target %d\n",cnt); ) + ha->fc_db[cnt].flag |= DEV_OFFLINE; + } + ret = 1; + } + } + + /* + * Mark devices as DEV_MISSING if they were present + * before and have a loop ID. + */ + for( cnt = 0; cnt < MAX_FIBRE_DEVICES && + !ha->loop_down_timer && + !ha->flags.loop_resync_needed; cnt++ ) { + /* if this slot is used (i.e. loop ID 0 - 0xfe) */ + if( ha->fc_db[cnt].loop_id <= LAST_SNS_LOOP_ID ) { + /* Get port name */ + mb[0] = MBC_GET_PORT_NAME; + mb[1] = ha->fc_db[cnt].loop_id << 8 | BIT_0; + if( qla2100_mailbox_command(ha, BIT_1|BIT_0, &mb[0]) ) { + /* Flag as missing only once */ + if ( !(ha->fc_db[cnt].flag & DEV_MISSING) ) { + if ( ha->fc_db[cnt].port_login_retry_count ) { /* v2.19.05b3 */ + ha->fc_db[cnt].port_login_retry_count--; + ha->fc_db[cnt].flag |= DEV_MISSING; + DEBUG(printk("qla2100_sns: Missing port %d @ loop ID: %x\n", + cnt, ha->fc_db[cnt].loop_id);) + ret++; + } + } + } else if (ha->fc_db[cnt].flag & DEV_MISSING) { + ha->fc_db[cnt].flag &= ~DEV_MISSING; + ha->fc_db[cnt].flag &= ~DEV_OFFLINE; + ha->fc_db[cnt].flag |= DEV_RETURN; + ha->fc_db[cnt].port_login_retry_count = 8; + DEBUG(printk("qla2100_sns: Device %d returned\n", cnt);) + } + } + } + return( ret ); +} + +/* +* qla2100_update_fc_db +* Updates Fibre Channel Device Database with what is actually on loop. +* +* Input: +* ha = adapter block pointer. +* enable_slot_reuse = allows the use of PORT_AVAILABLE slots. +* +* Output: +* ha->fc_db = updated +* +* Returns: +* 0 = success. +* 1 = error. +* 2 = database was full and device was not configured. +*/ +STATIC uint8_t +qla2100_update_fc_db(scsi_qla_host_t *ha, uint8_t enable_slot_reuse) { + uint8_t status = 0; + uint8_t ret = 0; + uint8_t db_full = 0; + uint16_t cnt; + uint16_t mb[MAILBOX_REGISTER_COUNT]; + port_list_entry_t *gn_list, *port_entry; + device_data_t device; +#if BITS_PER_LONG > 32 + uint64_t phys_address = 0; +#else + uint32_t phys_address = 0; +#endif + uint16_t i, size; + uint16_t localdevices = 0; + int retry_needed = 0; + +#ifdef FC_IP_SUPPORT + PIP_DEVICE_BLOCK pIpDevice; +#endif + + +#ifdef QL_DEBUG_LEVEL_3 + ENTER("qla2100_update_fc_db"); +#endif + + /* Configure loop */ + if( !qla2100_configure_hba(ha) ) { + if( ha->device_id == QLA2100_DEVICE_ID ) { + ha->max_public_loop_ids = LAST_SNS_LOOP_ID - SNS_FIRST_LOOP_ID + 1; + } else { + ha->max_public_loop_ids = LAST_SNS_LOOP_ID + 1; + /* dg 09/15 */ + /* if the topology have change then make all devices available */ + if( ha->prev_topology != ha->current_topology ) { + /* Mark all fabric devices that where present as AVAILABLE */ + for( i = 0; i < ha->max_public_loop_ids; i++ ) + if( (i != SNS_FL_PORT) && (i != FABRIC_CONTROLLER) + && (i != SIMPLE_NAME_SERVER) ) + ha->fabricid[i].in_use = FALSE; + + /* Mark all local devices that where present as AVAILABLE */ + if( ha->current_topology == ISP_CFG_F ) + for( cnt = 0; cnt < MAX_FIBRE_DEVICES && !ha->loop_down_timer + && !ha->flags.loop_resync_needed; cnt++ ) + if( ha->fc_db[cnt].loop_id < SNS_FIRST_LOOP_ID ) { + ha->fc_db[cnt].loop_id = PORT_AVAILABLE; + ha->fc_db[cnt].flag &= ~DEV_PUBLIC; + } + } + } + /* v2.19.03 - Mark all devices missing if configured */ + for( cnt = 0; cnt < MAX_FIBRE_DEVICES; cnt++ ) + if( ha->fc_db[cnt].flag & DEV_CONFIGURED) + ha->fc_db[cnt].flag |= DEV_MISSING; + +#ifdef FC_IP_SUPPORT + /* Disable all IP devices in linked list */ + for (pIpDevice = ha->pIpDeviceTop; pIpDevice != NULL; + pIpDevice = pIpDevice->pNextIpDevice) { + pIpDevice->lDeviceFlags &= ~IP_DEV_FLAG_PRESENT; + } +#endif /* FC_IP_SUPPORT */ + + /* Configure local */ + /* Get the port list of devices on the local loop */ +/* 4.10 */ +#if LINUX_VERSION_CODE < KERNEL_VERSION(2,3,18) + gn_list = KMALLOC(GN_LIST_LENGTH); + if ( gn_list != NULL ) { + phys_address = VIRT_TO_BUS(gn_list); + BZERO((caddr_t)gn_list, GN_LIST_LENGTH); + } +#else + gn_list = pci_alloc_consistent(ha->pdev, + GN_LIST_LENGTH, + &phys_address); + BZERO((caddr_t)gn_list, GN_LIST_LENGTH); +#endif + if( gn_list != NULL ) { + + if( !ha->loop_down_timer && !ha->flags.loop_resync_needed ) { + /* Get port list.*/ + mb[0] = MBC_GET_PORT_LIST; +#ifdef FC_IP_SUPPORT + if (ha->flags.enable_ip == FALSE) + mb[1] = BIT_0; /* Bit 0 - return node names */ + else + mb[1] = BIT_0|BIT_1;/* Bit 0 - return node names, Bit 1 - loop IDs 0-255 */ +#else + mb[1] = BIT_0; +#endif + mb[3] = LSW(phys_address); + mb[2] = MSW(phys_address); + mb[7] = QL21_64BITS_3RDWD(phys_address); + mb[6] = QL21_64BITS_4THWD(phys_address); + if( !qla2100_mailbox_command(ha, BIT_7|BIT_6|BIT_3|BIT_2|BIT_1|BIT_0, &mb[0]) ) { + if ( mb[0] == MBS_COMMAND_COMPLETE ) { + port_entry = gn_list; + size = mb[1]; + /* dg 10/29/99 - check for empty list */ + if ( size/sizeof(port_list_entry_t) == 0 ) { + /* Local devices were present, but may not be reponding, + so retry them later */ + DEBUG(qla2100_print("qla2100_update_fc_db: local port list - empty\n");) + } else + /* Scan through the port list and add devices to the database */ + for( ; size >= sizeof(port_list_entry_t); + size -= sizeof(port_list_entry_t), port_entry++ ) { + /* Skip the known ports. */ +#ifdef FC_IP_SUPPORT + if( ((port_entry->loop_id & LOOP_ID_MASK) == SNS_FL_PORT) || + ((port_entry->loop_id & LOOP_ID_MASK) == FABRIC_CONTROLLER) || + ((port_entry->loop_id & LOOP_ID_MASK) == SIMPLE_NAME_SERVER) ) +#else + if( (port_entry->loop_id == SNS_FL_PORT) || + (port_entry->loop_id == FABRIC_CONTROLLER) || + (port_entry->loop_id == SIMPLE_NAME_SERVER) ) +#endif + continue; + + /* if we are on a public loop then logout the public devices. */ + if( ((ha->current_topology == ISP_CFG_FL) + || (ha->current_topology == ISP_CFG_F)) +#ifdef FC_IP_SUPPORT + && !(port_entry->loop_id & PLE_NOT_SCSI_DEVICE) + && ((port_entry->loop_id & LOOP_ID_MASK) >= ha->min_external_loopid)) { +#else + && (port_entry->loop_id >= ha->min_external_loopid) ) { +#endif + mb[0] = MBC_LOGOUT_FABRIC_PORT; +#ifdef FC_IP_SUPPORT + mb[1] = (port_entry->loop_id & LOOP_ID_MASK) << 8; +#else + mb[1] = port_entry->loop_id << 8; +#endif + qla2100_mailbox_command(ha, BIT_1|BIT_0, &mb[0]); + } else { + /* We are on a local loop */ + /* update the database with the loop */ + /* ID and login to the device. */ +#ifdef FC_IP_SUPPORT + device.loop_id = port_entry->loop_id & LOOP_ID_MASK; +#else + device.loop_id = port_entry->loop_id; +#endif + +#if USE_PORTNAME + /* Get port name */ + mb[0] = MBC_GET_PORT_NAME; + /* mb[1] = device.loop_id << 8 | BIT_0; */ + mb[1] = device.loop_id << 8; + if( !qla2100_mailbox_command(ha, BIT_1|BIT_0, &mb[0]) ) { + /* dg 09/15/99 */ + if ( mb[0] == MBS_COMMAND_COMPLETE ) { + /* tt 1/18/00 */ + mb[2] = (mb[2] & 0x00FF) << 8 | mb[2] >> 8; + mb[3] = (mb[3] & 0x00FF) << 8 | mb[3] >> 8; + mb[6] = (mb[6] & 0x00FF) << 8 | mb[6] >> 8; + mb[7] = (mb[7] & 0x00FF) << 8 | mb[7] >> 8; + + BCOPY(&mb[7], &device.wwn[0], 2); + BCOPY(&mb[6], &device.wwn[2], 2); + BCOPY(&mb[3], &device.wwn[4], 2); + BCOPY(&mb[2], &device.wwn[6], 2); + } else { + status = 1; + printk(KERN_WARNING "qla2100_update_fc_db: [ERROR] GET PORT NAME - bad status.\n"); + goto qla2100_update_fc_db_exit; + } + + } else { /* dg 10/29/99 */ + if ( mb[0] == MBS_FATAL_ERROR ) { + status = 1; + goto qla2100_update_fc_db_exit; + } + continue; + } +#endif + /* Get the node name */ + BCOPY(port_entry->name, device.name, 8); + + +#ifdef FC_IP_SUPPORT + if (!(port_entry->loop_id & PLE_NOT_SCSI_DEVICE)) { + /* SCSI type device */ + DEBUG(sprintf(debug_buff, "qla2100_update_fc_db: SCSI device at ID %x\n\r", + device.loop_id)); + DEBUG(qla2100_print(debug_buff)); +#endif + if( (status = qla2100_update_device_data(ha, &device, enable_slot_reuse)) ) { + /* if not configured or full */ + if( status == 2 ) + db_full = 1; + else + break; + } else + localdevices++; +#ifdef FC_IP_SUPPORT + } else if (ha->flags.enable_ip == TRUE) { + /* SCSI login failed, assume it is IP device */ + DEBUG(sprintf(debug_buff, "qla2100_update_fc_db: IP device at ID %x\n\r", + device.loop_id)); + DEBUG(qla2100_print(debug_buff)); + + /* Update IP device database */ + if (qla2x00_update_ip_device_data(ha, &device) == QL_STATUS_SUCCESS) { + localdevices++; + } else { + status = 1; + break; + } + } +#endif + } + } /* end of For */ + } + } + } +#if LINUX_VERSION_CODE < KERNEL_VERSION(2,3,18) + KMFREE(gn_list, GN_LIST_LENGTH); +#else + pci_free_consistent(ha->pdev, GN_LIST_LENGTH, + gn_list, phys_address); +#endif + /* + * if topology is a direct attached local loop then + * don't serach for public devices, unless its a 2100. + */ + if( ((ha->current_topology == ISP_CFG_N) || + (ha->current_topology == ISP_CFG_NL)) && + ha->device_id != QLA2100_DEVICE_ID ) { /* 2/21/00 - dg */ + ha->prev_topology = ha->current_topology; + } else { + /* dgER - we need to add logic to register + * our adapter with the Name server, so we + * can send Command Transport commands (FC4). + * (target mode) + */ + + /* get public loop devices */ + if( !ha->loop_down_timer && !ha->flags.loop_resync_needed ){ + /* v2.19.5 */ + if( (ret = qla2100_sns_device(ha, enable_slot_reuse)) == 2 ) + db_full = 1; + /* v2.19.5b3 */ + if( ret == 1 ) { + if( ha->device_id != QLA2100_DEVICE_ID ) { + status = ret; + ha->sns_retry_cnt++; + if( ha->sns_retry_cnt > 8 ) { + if( !(ha->dpc_flags & ISP_RESET_ONCE) ) + ha->dpc_flags |= ISP_RESET_NEEDED; + } + else + retry_needed++; + } + } + } + + } + + /* Set local loop devices present flag, clear retry flag */ + if (localdevices > 0 ) { + ha->device_flags |= DFLG_LOCAL_DEVICES; + ha->device_flags &= ~DFLG_RETRY_LOCAL_DEVICES; + } + + if( qla2100_check_devices(ha) ){ + DEBUG(printk("qla2100: Devices are missing or configured - retrying\n");) + retry_needed++; + } +#ifdef FC_IP_SUPPORT + /* Clean up active IP device list */ + for (pIpDevice = ha->pIpDeviceBottom; pIpDevice != NULL; + pIpDevice = pIpDevice->pLastIpDevice) { + if (!(pIpDevice->lDeviceFlags & IP_DEV_FLAG_PRESENT)) { + /* Device not present, remove it from list and free resources */ + DEBUG(sprintf(debug_buff, "qla2100_update_fc_db: removing IP device, loop ID: %x, port ID: %x\n\r", + pIpDevice->wLoopId, + pIpDevice->acPortId[0]<<16 | pIpDevice->acPortId[1]<<8 | pIpDevice->acPortId[2])); + DEBUG(qla2100_print(debug_buff)); + + if (pIpDevice->lDeviceFlags & IP_DEV_FLAG_PUBLIC_DEVICE) { + /* Do fabric logout and free loop ID */ + if (qla2x00_logout_public_device(ha, pIpDevice->wLoopId, 0) == QL_STATUS_FATAL_ERROR) { + status = 1; + break; + } + qla2x00_free_loopid(ha, pIpDevice->wLoopId); + } + qla2x00_free_ip_block(ha, pIpDevice); + } + } +#endif /* FC_IP_SUPPORT */ + + } else { +#ifdef QL_DEBUG_LEVEL_2 + qla2100_print( + "qla2100_update_fc_db: Failed to allocate memory, No local loop\n"); +#endif + status = 1; + } + /* Map the devices to target IDs */ + if( !ha->loop_down_timer && !ha->flags.loop_resync_needed ) + qla2100_map_targets(ha); + } else + status = 1; + + if( db_full ) + status = 2; + + if( retry_needed ) { + ha->device_flags |= LOGIN_RETRY_NEEDED; + /* v2.19.5 */ + status = 1; + } + + qla2100_update_fc_db_exit: + + if( status == 0 ) { + ha->loop_state = LOOP_READY; + ha->sns_retry_cnt = 0; + for( cnt = 0; cnt < MAX_FIBRE_DEVICES; cnt++ ) + ha->fc_db[cnt].port_login_retry_count = 8; + DEBUG(printk("qla2100_update_fc_db: LOOP READY\n");) + } + +#if defined(QL_DEBUG_LEVEL_2) || defined(QL_DEBUG_LEVEL_3) + if( status ) + qla2100_print("qla2100_update_fc_db: **** FAILED ****\n"); +#endif +#ifdef QL_DEBUG_LEVEL_3 + else + LEAVE("qla2100_update_fc_db"); +#endif + return(status); +} + +/* +* qla2100_init_tgt_map +* Initializes target map. +* +* Input: +* ha = adapter block pointer. +* +* Output: +* TGT_Q initialized +*/ +STATIC void +qla2100_init_tgt_map(scsi_qla_host_t *ha) { + uint32_t b, t; + +#ifdef QL_DEBUG_LEVEL_3 + ENTER("qla2100_init_tgt_map"); +#endif + + for( b = 0; b < MAX_BUSES; b++ ) + for( t = 0; t < MAX_FIBRE_DEVICES; t++ ) + TGT_Q(ha, b, t) = (tgt_t *) NULL; + +#ifdef QL_DEBUG_LEVEL_3 + LEAVE("qla2100_init_tgt_map"); +#endif +} + +/* +* qla2100_map_targets +* Setup target queues. +* +* Input: +* ha = adapter block pointer. +* +* Returns: +* 0 = success. +*/ +STATIC uint8_t +qla2100_map_targets(scsi_qla_host_t *ha) { + tgt_t *tgt; + uint32_t b; + uint32_t t; + uint8_t status = 0; + +#ifdef QL_DEBUG_LEVEL_3 + ENTER("qla2100_map_targets"); +#endif + + b = 0; + for( t = 0; t < MAX_FIBRE_DEVICES; t++ ) { + /* if Port never been used. OR */ + /* Device does not exist on port. */ + if( ha->fc_db[t].loop_id != PORT_UNUSED && + ha->fc_db[t].loop_id != PORT_AVAILABLE ) { /* dg 10/29/99 */ + + if( (tgt = TGT_Q(ha, b, t)) != NULL ) { + DEBUG2(sprintf(debug_buff,"Target %d already allocated\n",t)); + DEBUG2(qla2100_print(debug_buff)); + } else + tgt = qla2100_tgt_alloc(ha); + DEBUG(sprintf(debug_buff,"Assigning target ID %02x:%02x @ (%08x) to loop id: 0x%04x\n",b,t,tgt,ha->fc_db[t].loop_id);) + DEBUG(qla2100_print(debug_buff)); + TGT_Q(ha, b, t) = tgt; + tgt->loop_id = ha->fc_db[t].loop_id; + tgt->down_timer = 0; + } + } + +#if defined(QL_DEBUG_LEVEL_2) || defined(QL_DEBUG_LEVEL_3) + if( status ) + qla2100_print("qla2100_map_targets: **** FAILED ****\n"); +#endif +#ifdef QL_DEBUG_LEVEL_3 + else + LEAVE("qla2100_map_targets"); +#endif + return(status); +} +#if USE_FLASH +/* +* qla2100_get_database +* Copies and converts flash database to driver database. +* (may sleep) +* +* Input: +* ha = adapter block pointer. +* +* Returns: +* 0 = success. +*/ +STATIC uint8_t +qla2100_get_database(scsi_qla_host_t *ha) { + flash_database_t *fptr; + uint8_t status = 1; + uint32_t addr; + uint16_t cnt; + uint8_t *bptr; + uint8_t checksum; + uint32_t b, t; + +#ifdef QL_DEBUG_LEVEL_3 + ENTER("qla2100_get_database"); +#endif + + /* Default setup. */ + ha->flash_db = FLASH_DATABASE_0; + ha->flash_seq = 0; + + if( (fptr = (flash_database_t *)KMALLOC(sizeof(flash_database_t))) ) { + /* Enable Flash Read/Write. */ + qla2100_flash_enable(ha); + + /* Start with flash database with the highest sequence number. */ + b = qla2100_read_flash_byte(ha, FLASH_DATABASE_0); + b |= qla2100_read_flash_byte(ha, FLASH_DATABASE_0 + 1) << 8; + b |= qla2100_read_flash_byte(ha, FLASH_DATABASE_0 + 1) << 16; + b |= qla2100_read_flash_byte(ha, FLASH_DATABASE_0 + 1) << 24; + t = qla2100_read_flash_byte(ha, FLASH_DATABASE_1); + t |= qla2100_read_flash_byte(ha, FLASH_DATABASE_1 + 1) << 8; + t |= qla2100_read_flash_byte(ha, FLASH_DATABASE_1 + 1) << 16; + t |= qla2100_read_flash_byte(ha, FLASH_DATABASE_1 + 1) << 24; + if( t > b ) { + ha->flash_db = FLASH_DATABASE_1; + } + + /* Select the flash database with the good checksum. */ + for( t = 0; t < 2; t++ ) { + checksum = 0; + addr = ha->flash_db; + bptr = (uint8_t *)fptr; + fptr->hdr.size = sizeof(flash_database_t); + + /* Read flash database to driver. */ + for( cnt = 0; cnt < fptr->hdr.size; cnt++ ) { + *bptr = (uint8_t)qla2100_read_flash_byte(ha, addr++); + checksum += *bptr++; + if( bptr == &fptr->hdr.spares[0] && + (fptr->hdr.size > sizeof(flash_database_t) || + fptr->hdr.size < sizeof(flash_hdr_t) || + !fptr->hdr.version) ) { + checksum = 1; + break; + } + } + + if( !checksum ) { + status = 0; + break; + } + /* trying other database */ + if( ha->flash_db == FLASH_DATABASE_0 ) { + ha->flash_db = FLASH_DATABASE_1; + } else { + ha->flash_db = FLASH_DATABASE_0; + } + } + + if( !status ) { + ha->flash_seq = fptr->hdr.seq; + + /* Convert flash database to driver database format. */ + if( fptr->hdr.size -= sizeof(flash_hdr_t) ) { + for( cnt = 0; cnt < MAX_FIBRE_DEVICES; cnt++ ) { + ha->fc_db[cnt].name[0] = fptr->node[cnt].name[0]; + ha->fc_db[cnt].name[1] = fptr->node[cnt].name[1]; + cnt, + ha->fc_db[cnt].name[1], + ha->fc_db[cnt].name[0]); + + ha->fc_db[cnt].loop_id = PORT_AVAILABLE; + ha->fc_db[cnt].flag = 0; /* v2.19.05b3 */ + if( !(fptr->hdr.size -= sizeof(flash_node_t)) ) + break; + } + } + } + + qla2100_flash_disable(ha); + + KMFREE(fptr, sizeof(flash_database_t)); + } + +#if defined(QL_DEBUG_LEVEL_2) || defined(QL_DEBUG_LEVEL_3) + if( status ) + qla2100_print("qla2100_get_database: **** FAILED ****\n"); +#endif +#ifdef QL_DEBUG_LEVEL_3 + else + LEAVE("qla2100_get_database"); +#endif + return(status); +} + +/* +* qla2100_save_database +* Copies and converts driver database to flash database. +* (may sleep) +* +* Input: +* ha = adapter block pointer. +* +* Returns: +* 0 = success. +*/ +STATIC uint8_t +qla2100_save_database(scsi_qla_host_t *ha) { + flash_database_t *fptr; + uint8_t status = 1; + uint32_t addr; + uint16_t cnt; + uint8_t *bptr; + uint8_t checksum; + +#ifdef QL_DEBUG_LEVEL_3 + ENTER("qla2100_save_database"); +#endif + + if( (fptr = (flash_database_t *)KMALLOC(sizeof(flash_database_t)) ) ) { + /* Enable Flash Read/Write. */ + qla2100_flash_enable(ha); + + fptr->hdr.seq = ++ha->flash_seq; + fptr->hdr.version = FLASH_DATABASE_VERSION; + fptr->hdr.size = sizeof(flash_hdr_t); + + /* Copy and convert driver database to flash database. */ + for( cnt = 0; cnt < MAX_FIBRE_DEVICES; cnt++ ) { + if( ha->fc_db[cnt].loop_id == PORT_UNUSED ) + break; + else { + fptr->node[cnt].name[0] = ha->fc_db[cnt].name[0]; + fptr->node[cnt].name[1] = ha->fc_db[cnt].name[1]; + fptr->hdr.size += sizeof(flash_node_t); + } + } + + /* Calculate checksum. */ + checksum = 0; + bptr = (uint8_t *)fptr; + for( cnt = 0; cnt < fptr->hdr.size; cnt++ ) + checksum += *bptr++; + fptr->hdr.checksum = ~checksum + 1; + + /* Setup next sector address for flash */ + if( ha->flash_db == FLASH_DATABASE_0 ) + addr = FLASH_DATABASE_1; + else + addr = FLASH_DATABASE_0; + ha->flash_db = addr; + + /* Erase flash sector prior to write. */ + status = qla2100_erase_flash_sector(ha, addr); + + /* Write database to flash. */ + bptr = (uint8_t *)fptr; + for( cnt = 0; cnt < fptr->hdr.size && !status; cnt++ ) + status = qla2100_program_flash_address(ha, addr++, *bptr++); + + qla2100_flash_disable(ha); + + KMFREE(fptr, sizeof(flash_database_t)); + } + +#if defined(QL_DEBUG_LEVEL_2) || defined(QL_DEBUG_LEVEL_3) + if( status ) + qla2100_print("qla2100_save_database: **** FAILED ****\n"); +#endif +#ifdef QL_DEBUG_LEVEL_3 + else + LEAVE("qla2100_save_database"); +#endif + return(status); +} + +/* +* qla2100_program_flash_address +* Program flash address. +* +* Input: +* ha = adapter block pointer. +* addr = flash byte address. +* data = data to be written to flash. +* +* Returns: +* 0 = success. +*/ +STATIC uint8_t +qla2100_program_flash_address(scsi_qla_host_t *ha, uint32_t addr, uint8_t data) { + uint8_t status; + + /* Write Program Command Sequence */ + qla2100_write_flash_byte(ha, 0x5555, 0xaa); + qla2100_write_flash_byte(ha, 0x2aaa, 0x55); + qla2100_write_flash_byte(ha, 0x5555, 0xa0); + qla2100_write_flash_byte(ha, addr, data); + + /* Wait for write to complete. */ + status = qla2100_poll_flash(ha, addr, data); + +#ifdef QL_DEBUG_LEVEL_2 + if( status ) + qla2100_print("qla2100_program_flash_address: **** FAILED ****\n"); +#endif + return(status); +} + +/* +* qla2100_erase_flash_sector +* Erases flash sector. +* +* Input: +* ha = adapter block pointer. +* addr = sector address. +* +* Returns: +* 0 = success. +*/ +STATIC uint8_t +qla2100_erase_flash_sector(scsi_qla_host_t *ha, uint32_t addr) { + uint8_t status; + + addr &= 0x1c000; + + /* Individual Sector Erase Command Sequence */ + qla2100_write_flash_byte(ha, 0x5555, 0xaa); + qla2100_write_flash_byte(ha, 0x2aaa, 0x55); + qla2100_write_flash_byte(ha, 0x5555, 0x80); + qla2100_write_flash_byte(ha, 0x5555, 0xaa); + qla2100_write_flash_byte(ha, 0x2aaa, 0x55); + qla2100_write_flash_byte(ha, addr, 0x30); + + SYS_DELAY(150); + + /* Wait for erase to complete. */ + status = qla2100_poll_flash(ha, addr, 0x80); + +#ifdef QL_DEBUG_LEVEL_2 + if( status ) + qla2100_print("qla2100_erase_flash_sector: **** FAILED ****\n"); +#endif + return(status); +} + +/* +* qla2100_poll_flash +* Polls flash for completion. +* +* Input: +* ha = adapter block pointer. +* addr = flash byte address. +* data = data to be polled. +* +* Returns: +* 0 = success. +*/ +STATIC uint8_t +qla2100_poll_flash(scsi_qla_host_t *ha, uint32_t addr, uint8_t poll_data) { + uint8_t status = 1; + uint8_t flash_data; + uint32_t cnt; + + poll_data &= BIT_7; + + /* Wait for 30 seconds for command to finish. */ + for( cnt = 3000000; cnt; cnt-- ) { + flash_data = (uint8_t)qla2100_read_flash_byte(ha, addr); + + if( (flash_data & BIT_7) == poll_data ) { + status = 0; + break; + } + if( flash_data & BIT_5 && cnt > 2 ) + cnt = 2; + SYS_DELAY(10); + } + + return(status); +} + +/* +* qla2100_flash_enable +* Setup flash for reading/writing. +* +* Input: +* ha = adapter block pointer. +*/ +STATIC void +qla2100_flash_enable(scsi_qla_host_t *ha) { + device_reg_t *reg = ha->iobase; + + /* Setup bit 16 of flash address. */ + WRT_REG_WORD(®->nvram, NV_SELECT); + + /* Enable Flash Read/Write. */ + WRT_REG_WORD(®->ctrl_status, ISP_FLASH_ENABLE); + + /* Read/Reset Command Sequence */ + qla2100_write_flash_byte(ha, 0x5555, 0xaa); + qla2100_write_flash_byte(ha, 0x2aaa, 0x55); + qla2100_write_flash_byte(ha, 0x5555, 0xf0); + qla2100_read_flash_byte(ha, FLASH_DATABASE_0); +} + +/* +* qla2100_flash_disable +* Disable flash and allow RISC to run. +* +* Input: +* ha = adapter block pointer. +*/ +STATIC void +qla2100_flash_disable(scsi_qla_host_t *ha) { + device_reg_t *reg = ha->iobase; + + /* Restore chip registers. */ + WRT_REG_WORD(®->ctrl_status, 0); + WRT_REG_WORD(®->nvram, 0); +} + +/* +* qla2100_write_flash_byte +* Write byte to flash. +* +* Input: +* ha = adapter block pointer. +* addr = flash byte address. +* data = data to be written. +*/ +STATIC void +qla2100_write_flash_byte(scsi_qla_host_t *ha, uint32_t addr, uint8_t data) { + device_reg_t *reg = ha->iobase; + + WRT_REG_WORD(®->flash_address, (uint16_t)addr); + WRT_REG_WORD(®->flash_data, (uint16_t)data); +} + +/* +* qla2100_read_flash_byte +* Reads byte from flash, but must read a word from chip. +* +* Input: +* ha = adapter block pointer. +* addr = flash byte address. +* +* Returns: +* byte from flash. +*/ +STATIC uint16_t +qla2100_read_flash_byte(scsi_qla_host_t *ha, uint32_t addr) { + device_reg_t *reg = ha->iobase; + uint16_t data; + + WRT_REG_WORD(®->flash_address, (uint16_t)addr); + data = qla2100_debounce_register(®->flash_data); + + return(data); +} +#endif + +/* +* qla2100_reset_adapter +* Reset adapter. +* +* Input: +* ha = adapter block pointer. +*/ +STATIC void +qla2100_reset_adapter(scsi_qla_host_t *ha) { + device_reg_t *reg = ha->iobase; + +#ifdef QL_DEBUG_LEVEL_3 + ENTER("qla2100_reset_adapter"); +#endif + + ha->flags.online = FALSE; + qla2100_disable_intrs(ha); + /* WRT_REG_WORD(®->ictrl, 0); */ + /* Reset RISC processor. */ + WRT_REG_WORD(®->host_cmd, HC_RESET_RISC); + WRT_REG_WORD(®->host_cmd, HC_RELEASE_RISC); +#ifdef QL_DEBUG_LEVEL_3 + LEAVE("qla2100_reset_adapter"); +#endif +} + +/* +* qla2100_loop_reset +* Issue loop reset. +* +* Input: +* ha = adapter block pointer. +* +* Returns: +* 0 = success +*/ +STATIC uint8_t +qla2100_loop_reset(scsi_qla_host_t *ha) { + uint8_t status = 0; + uint16_t mb[MAILBOX_REGISTER_COUNT]; + +#ifdef QL_DEBUG_LEVEL_3 + ENTER("qla2100_loop_reset"); +#endif + + if( ha->flags.enable_lip_reset ) { + mb[0] = MBC_LIP_RESET; + mb[1] = 0xff00; + mb[2] = ha->loop_reset_delay; + status |= qla2100_mailbox_command(ha, BIT_2|BIT_1|BIT_0, &mb[0]); + } + if( ha->flags.enable_target_reset ) { + mb[0] = MBC_TARGET_RESET; + mb[1] = ha->loop_reset_delay; + status |= qla2100_mailbox_command(ha, BIT_1|BIT_0, &mb[0]); + } + if( (!ha->flags.enable_target_reset && !ha->flags.enable_lip_reset ) || + ha->flags.enable_lip_full_login ) { + mb[0] = MBC_LIP_FULL_LOGIN; + status |= qla2100_mailbox_command(ha, BIT_0, &mb[0]); + } + + /* Issue marker command. */ + qla2100_marker(ha, 0, 0, 0, MK_SYNC_ALL); + +#if defined(QL_DEBUG_LEVEL_2) || defined(QL_DEBUG_LEVEL_3) + if( status ) + qla2100_print("qla2100_loop_reset: **** FAILED ****\n"); +#endif +#ifdef QL_DEBUG_LEVEL_3 + else + LEAVE("qla2100_loop_reset"); +#endif + return(status); +} + +/* +* qla2100_device_reset +* Issue bus device reset message to the target. +* +* Input: +* ha = adapter block pointer. +* b = BUS number. +* t = SCSI ID. +* +* Returns: +* 0 = success +*/ +STATIC uint8_t +qla2100_device_reset(scsi_qla_host_t *ha, uint32_t b, uint32_t t) { + tgt_t *tgt; + uint8_t status; + uint16_t mb[MAILBOX_REGISTER_COUNT]; + +#ifdef QL_DEBUG_LEVEL_3 + ENTER("qla2100_device_reset"); +#endif + + tgt = TGT_Q(ha, b, t); + + mb[0] = MBC_ABORT_TARGET; + mb[1] = tgt->loop_id << 8; + mb[2] = 1; + status = qla2100_mailbox_command(ha, BIT_2|BIT_1|BIT_0, &mb[0]); + + /* Issue marker command. */ + qla2100_marker(ha, b, t, 0, MK_SYNC_ID); + +#if defined(QL_DEBUG_LEVEL_2) || defined(QL_DEBUG_LEVEL_3) + if( status ) + qla2100_print("qla2100_device_reset: **** FAILED ****\n"); +#endif +#ifdef QL_DEBUG_LEVEL_3 + else + LEAVE("qla2100_device_reset"); +#endif + return(status); +} + +/* +* qla2100_abort_device +* Issue an abort message to the device +* +* Input: +* ha = adapter block pointer. +* b = BUS number. +* t = SCSI ID. +* l = SCSI LUN. +* +* Returns: +* 0 = success +*/ +STATIC uint8_t +qla2100_abort_device(scsi_qla_host_t *ha, uint32_t b, uint32_t t, uint32_t l) { + tgt_t *tgt; + uint8_t status; + uint16_t mb[MAILBOX_REGISTER_COUNT]; + +#ifdef QL_DEBUG_LEVEL_3 + ENTER("qla2100_abort_device"); +#endif + + tgt = TGT_Q(ha, b, t); + + mb[0] = MBC_ABORT_DEVICE; + mb[1] = tgt->loop_id << 8; + mb[2] = l; + status = qla2100_mailbox_command(ha, BIT_2|BIT_1|BIT_0, &mb[0]); + + /* Issue marker command. */ + qla2100_marker(ha, b, t, l, MK_SYNC_ID_LUN); + +#if defined(QL_DEBUG_LEVEL_2) || defined(QL_DEBUG_LEVEL_3) + if( status ) + qla2100_print("qla2100_abort_device: **** FAILED ****\n"); +#endif +#ifdef QL_DEBUG_LEVEL_3 + else + LEAVE("qla2100_abort_device"); +#endif + return(status); +} + +/* +* qla2100_abort_command +* Abort command aborts a specified IOCB. +* +* Input: +* ha = adapter block pointer. +* sp = SB structure pointer. +* +* Returns: +* 0 = success +*/ +STATIC uint8_t +qla2100_abort_command(scsi_qla_host_t *ha, srb_t *sp) { + uint8_t status; + uint16_t mb[MAILBOX_REGISTER_COUNT]; + uint32_t b, t, l; + uint32_t handle; + tgt_t *tgt; + +#ifdef QL_DEBUG_LEVEL_3 + ENTER("qla2100_abort_command"); +#endif + /* v2.19.8 */ + t = SCSI_TCN_32(sp->cmd); + if( ha->loop_state == LOOP_DOWN || + PORT_DOWN(ha,t) > 0 ) { + return(0); + } + + /* Locate handle number. */ + for( handle = 0; handle < MAX_OUTSTANDING_COMMANDS; handle++ ) + if( ha->outstanding_cmds[handle] == sp ) + break; + + DEBUG(qla2100_print("qla2100_abort_command: Sending Abort Command for Handle = ");) + DEBUG(qla2100_output_number((u_long) handle, 16);) + DEBUG(qla2100_print("\n");) + + /* Get a pointer to the SCSI address */ + b = SCSI_BUS_32(sp->cmd); + l = SCSI_LUN_32(sp->cmd); + + tgt = TGT_Q(ha, b, t); + + mb[0] = MBC_ABORT_COMMAND; + mb[1] = tgt->loop_id << 8; + mb[2] = (uint16_t)handle; + mb[3] = handle >> 16; + mb[6] = l; + if( !(status = qla2100_mailbox_command(ha, BIT_6|BIT_3|BIT_2|BIT_1|BIT_0, + &mb[0])) ) + sp->flags |= SRB_ABORT_PENDING; + + +#if defined(QL_DEBUG_LEVEL_2) || defined(QL_DEBUG_LEVEL_3) + if( status ) + qla2100_print("qla2100_abort_command: **** FAILED ****\n"); +#endif +#ifdef QL_DEBUG_LEVEL_3 + else + LEAVE("qla2100_abort_command"); +#endif + return(status); +} + +/* +* Issue marker command. +* Function issues marker IOCB. +* +* Input: +* ha = adapter block pointer. +* b = BUS number. +* t = SCSI ID +* l = SCSI LUN +* type = marker modifier +*/ +STATIC void +qla2100_marker(scsi_qla_host_t *ha, uint32_t b, uint32_t t, uint32_t l, uint8_t type) { + mrk_entry_t *pkt; + tgt_t *tgt; + +#ifdef QL_DEBUG_LEVEL_3 + ENTER("qla2100_marker"); +#endif + + tgt = TGT_Q(ha, b, t); + + /* Get request packet. */ + if( (pkt = (mrk_entry_t *)qla2100_req_pkt(ha) ) ) { + pkt->entry_type = MARKER_TYPE; + pkt->modifier = type; + + if( type == MK_SYNC_LIP ) + pkt->sequence_number = ha->lip_seq; + else if( type != MK_SYNC_ALL ) { + pkt->lun = l; + pkt->target = (uint8_t)tgt->loop_id; + } + + /* Issue command to ISP */ + qla2100_isp_cmd(ha); + } + +#if defined(QL_DEBUG_LEVEL_2) || defined(QL_DEBUG_LEVEL_3) + if( !pkt ) + qla2100_print("qla2100_marker: **** FAILED ****\n"); +#endif +#ifdef QL_DEBUG_LEVEL_3 + else + LEAVE("qla2100_marker"); +#endif +} + +#if LINUX_VERSION_CODE > KERNEL_VERSION(2,3,18) +/* +* qla2100_64bit_start_scsi +* The start SCSI is responsible for building request packets on +* request ring and modifying ISP input pointer. +* +* Input: +* ha = adapter block pointer. +* sp = SB structure pointer. +* +* Returns: +* 0 = success, was able to issue command. +*/ +STATIC uint8_t +qla2100_64bit_start_scsi(scsi_qla_host_t *ha, srb_t *sp) { + device_reg_t *reg = ha->iobase; + device2300_reg_t *reg2300 = ha->iobase2300; + uint8_t status = 0; + Scsi_Cmnd *cmd = sp->cmd; + uint32_t cnt; + cmd_a64_entry_t *pkt; + uint16_t req_cnt; + uint16_t seg_cnt; + uint16_t cdb_len,temp; + struct scatterlist *sg = (struct scatterlist *) NULL; + uint32_t timeout; + caddr_t data_ptr; + uint32_t *dword_ptr; + uint64_t dma_handle; + +#ifdef QL_DEBUG_LEVEL_3 + ENTER("qla2100_64bit_start_scsi:"); +#endif + DEBUG(sprintf(debug_buff, + "64bit_start: cmd=%x sp=%x CDB=%x\n\r",cmd,sp,cmd->cmnd[0]);) + DEBUG(qla2100_print(debug_buff)); + + /* Calculate number of entries and segments required. */ + seg_cnt = 0; + req_cnt = 1; + if ( cmd->use_sg ) { + /* 4.10 64 bit S/G Data Transfer */ + sg = (struct scatterlist *) cmd->request_buffer; + seg_cnt = pci_map_sg(ha->pdev, + sg,cmd->use_sg, + scsi_to_pci_dma_dir(cmd->sc_data_direction)); + + if( seg_cnt > 2 ) { + req_cnt += (uint16_t)(seg_cnt - 2) / 5; + if( (uint16_t)(seg_cnt - 2) % 5 ) + req_cnt++; + } + } else if( cmd->request_bufflen ) + { /* no S/G Data Transfer */ + /* DEBUG5(printk("Single data transfer (0x%x)\n", + cmd->request_bufflen)); */ + seg_cnt = 1; + } + + /* Acquire ring specific lock */ + QLA2100_RING_LOCK(ha); + + if( (uint16_t)(req_cnt + 2) >= ha->req_q_cnt ) { + /* Calculate number of free request q out entries. */ + if (ha->device_id == QLA2300_DEVICE_ID) cnt = RD_REG_WORD(®2300->req_q_out); + else cnt = RD_REG_WORD(®->mailbox4); + if( ha->req_ring_index < cnt ) + ha->req_q_cnt = cnt - ha->req_ring_index; + else + ha->req_q_cnt = REQUEST_ENTRY_CNT - (ha->req_ring_index - cnt); + } + + /* If room for request in request ring. */ + if( (uint16_t)(req_cnt + 2) < ha->req_q_cnt ) { + /* Check for room in outstanding command list. */ + for( cnt = 1; cnt < MAX_OUTSTANDING_COMMANDS && + ha->outstanding_cmds[cnt] != 0; cnt++ ) + ; + + if( cnt < MAX_OUTSTANDING_COMMANDS ) { + ha->outstanding_cmds[cnt] = sp; + ha->req_q_cnt -= req_cnt; + CMD_HANDLE(sp->cmd) = (unsigned char *) (u_long) cnt; + + /* + * Build command packet. + */ + pkt = ha->request_ring_ptr; + + pkt->entry_type = COMMAND_A64_TYPE; + pkt->entry_count = (uint8_t)req_cnt; + pkt->sys_define = (uint8_t)ha->req_ring_index; + pkt->control_flags= 0; + pkt->entry_status = 0; + pkt->handle = (uint32_t)cnt; + + /* Zero out remaining portion of packet. */ + dword_ptr = (uint32_t *)pkt + 2; + for( cnt = 2; cnt < REQUEST_ENTRY_SIZE/4; cnt++ ) + *dword_ptr++ = 0; + + /* + * We subtract 2 sec. from the timeout value to insure + * the ISP time-out before the mid-level or the driver. + */ + timeout = (uint32_t) CMD_TIMEOUT(cmd)/HZ; + if( timeout > 2 ) + pkt->timeout = (uint16_t) timeout - 2; + else + pkt->timeout = (uint16_t) timeout; + + /* Set device target ID and LUN */ + pkt->target = TGT_Q(ha, SCSI_BUS_32(cmd), + SCSI_TCN_32(cmd))->loop_id; + pkt->lun = SCSI_LUN_32(cmd); + + /* Enable simple tag queuing if device supports it. */ + if ( cmd->device->tagged_queue ) { + switch (cmd->tag) { + case SIMPLE_QUEUE_TAG: + pkt->control_flags = CF_SIMPLE_TAG; + break; + case HEAD_OF_QUEUE_TAG: + pkt->control_flags = CF_HEAD_TAG; + break; + case ORDERED_QUEUE_TAG: + pkt->control_flags = CF_ORDERED_TAG; + break; + default: + pkt->control_flags = CF_SIMPLE_TAG; + } + } else + pkt->control_flags = CF_SIMPLE_TAG; + + if (ha->device_id == QLA2300_DEVICE_ID) + pkt->control_flags |= CF_NO_FAST_POSTING; + + /* Load SCSI command packet. */ + cdb_len = (uint16_t)CMD_CDBLEN(cmd); + if (cdb_len > MAX_CMDSZ) cdb_len = MAX_CMDSZ; + data_ptr = (uint8_t *) &(CMD_CDBP(cmd)); + for( cnt = 0; cnt < cdb_len; cnt++ ) + pkt->scsi_cdb[cnt] = *data_ptr++; + pkt->byte_count = (uint32_t) CMD_XFRLEN(cmd); + + /* + * Load data segments. + */ + if( seg_cnt ) /* If data transfer. */ + { + switch( cmd->data_cmnd[0] ) { + case FORMAT_UNIT: + case WRITE_6: + case MODE_SELECT: + case SEND_DIAGNOSTIC: + case WRITE_10: + case WRITE_BUFFER: + case WRITE_LONG: + case WRITE_SAME: + case MODE_SELECT_10: + case WRITE_12: + case WRITE_VERIFY_12: + case SEND_VOLUME_TAG: + pkt->control_flags |= BIT_6; /* WRITE */ + break; + default: +#if LINUX_VERSION_CODE < KERNEL_VERSION(2,4,0) +#if QLA_SCSI_VENDOR_DIR + qla2100_set_vend_direction(ha, cmd, pkt); +#else + pkt->control_flags |= BIT_5; /* READ */ +#endif +#else /* kernel version is 2.4.0 or higher */ + if (cmd->sc_data_direction == SCSI_DATA_WRITE) + pkt->control_flags |= BIT_6;/*WRITE*/ + else + pkt->control_flags |= BIT_5;/*READ*/ +#endif /* kernel version 2.4.0 */ + break; + } + sp->dir = pkt->control_flags & (BIT_5|BIT_6); + + /* Set total data segment count. */ + pkt->dseg_count = seg_cnt; + + /* Setup packet address segment pointer. */ + dword_ptr = (uint32_t *)&pkt->dseg_0_address; + + if( cmd->use_sg ) /* If scatter gather */ + { + /* Load command entry data segments. */ + for( cnt = 0; cnt < 2 && seg_cnt; cnt++, seg_cnt-- ) { + /* 4.10 64 bit */ + *dword_ptr++ = cpu_to_le32(pci_dma_lo32(sg_dma_address(sg))); + *dword_ptr++ = cpu_to_le32(pci_dma_hi32(sg_dma_address(sg))); + *dword_ptr++ = cpu_to_le32(sg_dma_len(sg)); + sg++; + /* DEBUG(sprintf(debug_buff, + "S/G Segment phys_addr=%x %x, len=0x%x\n\r", + cpu_to_le32(pci_dma_hi32(sg_dma_address(sg))), + cpu_to_le32(pci_dma_lo32(sg_dma_address(sg))), + cpu_to_le32(sg_dma_len(sg)));) + DEBUG(qla2100_print(debug_buff)); */ + } +#ifdef QL_DEBUG_LEVEL_5 + qla2100_print( + "qla2x00_64bit_start_scsi: Scatter/gather command packet data - "); + qla2100_print("b"); + qla2100_output_number((uint32_t)SCSI_BUS_32(cmd), 10); + qla2100_print("t"); + qla2100_output_number((uint32_t)SCSI_TCN_32(cmd), 10); + qla2100_print("d"); + qla2100_output_number((uint32_t)SCSI_LUN_32(cmd), 10); + qla2100_print("\n\r"); + qla2100_dump_buffer((caddr_t)pkt, REQUEST_ENTRY_SIZE); +#endif + /* + * Build continuation packets. + */ + while( seg_cnt > 0 ) { + /* Adjust ring index. */ + ha->req_ring_index++; + if( ha->req_ring_index == REQUEST_ENTRY_CNT ) { + ha->req_ring_index = 0; + ha->request_ring_ptr = ha->request_ring; + } else + ha->request_ring_ptr++; + + pkt = (cmd_a64_entry_t *)ha->request_ring_ptr; + + /* Zero out packet. */ + dword_ptr = (uint32_t *)pkt; + for( cnt = 0;cnt < REQUEST_ENTRY_SIZE/4; cnt++ ) + *dword_ptr++ = 0; + + /* Load packet defaults. */ + ((cont_a64_entry_t *)pkt)->entry_type = + CONTINUE_A64_TYPE; + ((cont_a64_entry_t *)pkt)->entry_count = 1; + ((cont_a64_entry_t *)pkt)->sys_define = (uint8_t) + ha->req_ring_index; + + /* Setup packet address segment pointer. */ + dword_ptr = (uint32_t *) + &((cont_a64_entry_t *)pkt)->dseg_0_address; + + /* Load continuation entry data segments. */ + for( cnt = 0; cnt < 5 && seg_cnt; cnt++, seg_cnt-- ) { + /* 4.10 64 bit */ + *dword_ptr++ = cpu_to_le32(pci_dma_lo32(sg_dma_address(sg))); + *dword_ptr++ = cpu_to_le32(pci_dma_hi32(sg_dma_address(sg))); + *dword_ptr++ = cpu_to_le32(sg_dma_len(sg)); + sg++; + /* DEBUG(sprintf(debug_buff, + "S/G Segment Cont. phys_addr=%x %x, len=0x%x\n\r", + cpu_to_le32(pci_dma_hi32(sg_dma_address(sg))), + cpu_to_le32(pci_dma_lo32(sg_dma_address(sg))), + cpu_to_le32(sg_dma_len(sg)));) + DEBUG(qla2100_print(debug_buff)); */ + } +#ifdef QL_DEBUG_LEVEL_5 + qla2100_print( + "qla2x00_64bit_start_scsi: continuation packet data - c"); + qla2100_print("b"); + qla2100_output_number((u_long)SCSI_BUS_32(cmd), 10); + + qla2100_print("t"); + qla2100_output_number((u_long)SCSI_TCN_32(cmd), 10); + qla2100_print("d"); + qla2100_output_number((u_long)SCSI_LUN_32(cmd), 10); + qla2100_print("\n\r"); + qla2100_dump_buffer((caddr_t)pkt, REQUEST_ENTRY_SIZE); +#endif + } + } else /* No scatter gather data transfer */ + { /* 4.10 64 bit */ + dma_handle = pci_map_single(ha->pdev, + cmd->request_buffer, + cmd->request_bufflen, + scsi_to_pci_dma_dir(cmd->sc_data_direction)); + /* save dma_handle for pci_unmap_single */ + sp->saved_dma_handle = dma_handle; + + *dword_ptr++ = cpu_to_le32(pci_dma_lo32(dma_handle)); + *dword_ptr++ = cpu_to_le32(pci_dma_hi32(dma_handle)); + *dword_ptr = (uint32_t) cmd->request_bufflen; + /* DEBUG(sprintf(debug_buff, + "64_bit: No S/G map_single saved_dma_handle=%lx len=%x \n\r",dma_handle, cmd->request_bufflen)); + DEBUG(qla2100_print(debug_buff)); */ +#ifdef QL_DEBUG_LEVEL_5 + qla2100_print( + "qla2x00_64bit_start_scsi: No scatter/gather command packet data - c"); + qla2100_print("b"); + qla2100_output_number((uint32_t)SCSI_BUS_32(cmd), 10); + qla2100_print("t"); + qla2100_output_number((uint32_t)SCSI_TCN_32(cmd), 10); + qla2100_print("d"); + qla2100_output_number((uint32_t)SCSI_LUN_32(cmd), 10); + qla2100_print("\n\r"); + qla2100_dump_buffer((caddr_t)pkt, REQUEST_ENTRY_SIZE); +#endif + } + } + else /* No data transfer */ + { + *dword_ptr++ = (uint32_t) 0; + *dword_ptr++ = (uint32_t) 0; + *dword_ptr = (uint32_t) 0; +#ifdef QL_DEBUG_LEVEL_5 + qla2100_print( + "qla2x00_64bit_start_scsi: No data, command packet data - c"); + qla2100_print("b"); + qla2100_output_number((u_long)SCSI_BUS_32(cmd), 10); + qla2100_print("t"); + qla2100_output_number((u_long)SCSI_TCN_32(cmd), 10); + qla2100_print("d"); + qla2100_output_number((u_long)SCSI_LUN_32(cmd), 10); + qla2100_print("\n\r"); + qla2x00_dump_buffer((caddr_t)pkt, REQUEST_ENTRY_SIZE); +#endif + } + DEBUG4(qla2100_print("\nqla2100_64bit_start_scsi: Wakeup RISC for pending command\n\r")); + /* Adjust ring index. */ + ha->req_ring_index++; + if( ha->req_ring_index == REQUEST_ENTRY_CNT ) { + ha->req_ring_index = 0; + ha->request_ring_ptr = ha->request_ring; + } else + ha->request_ring_ptr++; + + /* Set chip new ring index. */ +#if WATCH_THREADS_SIZE + DEBUG3(qla2100_output_number((uint32_t)ha->actthreads, 16)); +#endif + if (ha->device_id == QLA2300_DEVICE_ID) { + temp = CACHE_FLUSH(®2300->req_q_in); + WRT_REG_WORD(®2300->req_q_in, ha->req_ring_index); + } else { + temp = CACHE_FLUSH(®->mailbox4); + WRT_REG_WORD(®->mailbox4, ha->req_ring_index); + } + } else { + status = 1; +#ifdef QL_DEBUG_LEVEL_2 + qla2100_print( + "qla2x00_64bit_start_scsi: NO ROOM IN OUTSTANDING ARRAY\n\r"); + qla2100_print(" req_q_cnt="); + qla2100_output_number((u_long)ha->req_q_cnt, 16); +#endif + } + } else { + status = 1; +#ifdef QL_DEBUG_LEVEL_2 + qla2100_print("qla2x00_64bit_start_scsi: in-ptr="); + qla2100_output_number((u_long)ha->req_ring_index, 16); + qla2100_print(" req_q_cnt="); + qla2100_output_number((u_long)ha->req_q_cnt, 16); + qla2100_print(" req_cnt="); + qla2100_output_number((u_long)req_cnt, 16); + qla2100_print("\n\r"); +#endif + } + + /* Release ring specific lock */ + QLA2100_RING_UNLOCK(ha); + +#if defined(QL_DEBUG_LEVEL_2) || defined(QL_DEBUG_LEVEL_3) + if( status ) + qla2100_print("qla2x00_64bit_start_scsi: **** FAILED ****\n\r"); +#endif +#ifdef QL_DEBUG_LEVEL_3 + else + qla2100_print("qla2x00_64bit_start_scsi: exiting normally\n\r"); +#endif + return(status); +} +#endif + +/* +* qla2100_32bit_start_scsi +* The start SCSI is responsible for building request packets on +* request ring and modifying ISP input pointer. +* +* The Qlogic firmware interface allows every queue slot to have a SCSI +* command and up to 4 scatter/gather (SG) entries. If we need more +* than 4 SG entries, then continuation entries are used that can +* hold another 7 entries each. The start routine determines if there +* is eought empty slots then build the combination of requests to +* fulfill the OS request. +* +* Input: +* ha = adapter block pointer. +* sp = SCSI Request Block structure pointer. +* +* Returns: +* 0 = success, was able to issue command. +*/ +STATIC uint8_t +qla2100_32bit_start_scsi(scsi_qla_host_t *ha, srb_t *sp) { + device_reg_t *reg = ha->iobase; + device2300_reg_t *reg2300 = ha->iobase2300; + uint8_t status = 0; + Scsi_Cmnd *cmd = sp->cmd; + uint16_t cdb_len, temp; + uint32_t cnt; + cmd_entry_t *pkt; + uint16_t req_cnt; + uint16_t seg_cnt; + struct scatterlist *sg = (struct scatterlist *) NULL; + caddr_t data_ptr; + uint32_t *dword_ptr; + uint32_t timeout; +#if LINUX_VERSION_CODE >= KERNEL_VERSION(2,3,18) + uint64_t dma_handle; +#endif + +#ifdef QL_DEBUG_LEVEL_3 + ENTER("qla2100_32bit_start_scsi"); +#endif + +#if defined(QL_DEBUG_LEVEL_5) || defined(QL_DEBUG_LEVEL_3) + printk( + "32bit_start BEGIN: cmd=%x sp=%x CDB=%x\n\r", + cmd,sp,cmd->cmnd[0]); +#endif +#ifdef NEW + /* + * Send marker if required. + */ + if (ha->marker_needed != 0) { + if (qla2200_marker(ha, 0, 0, MK_SYNC_ALL) != 0) { + RING_UNLOCK(ha); + return (1); + } + } +#endif + COMTRACE('S') + /* Calculate number of entries and segments required. */ + seg_cnt = 0; + req_cnt = 1; + if( cmd->use_sg ) { + sg = (struct scatterlist *) cmd->request_buffer; + /* 4.10 32 bit S/G Data Transfer */ +#if LINUX_VERSION_CODE < KERNEL_VERSION(2,3,18) + seg_cnt = cmd->use_sg; +#else + seg_cnt = pci_map_sg(ha->pdev,sg,cmd->use_sg, + scsi_to_pci_dma_dir(cmd->sc_data_direction)); +#endif + /* + * if greater than four sg entries then we need to allocate + * continuation entries + */ + if( seg_cnt > 2 ) { + req_cnt += (uint16_t)(seg_cnt - 3) / 7; + if( (uint16_t)(seg_cnt - 3) % 7 ) + req_cnt++; + } + DEBUG5(sprintf(debug_buff, + "S/G for data transfer -num segs(%d), req blk cnt(%d)\n\r",seg_cnt,req_cnt)); + DEBUG5(qla2100_print(debug_buff)); + } else if( CMD_XFRLEN(cmd) ) /* If data transfer. */ + { /* no S/G Data Transfer */ + /* DEBUG5(printk("Single data transfer (0x%x)\n", + cmd->request_bufflen));*/ + seg_cnt = 1; + } + + /* Acquire ring specific lock */ + QLA2100_RING_LOCK(ha); + + if( (uint16_t)(req_cnt + 2) >= ha->req_q_cnt ) { + /* Calculate number of free request entries. */ + if (ha->device_id == QLA2300_DEVICE_ID) + cnt = qla2100_debounce_register(®2300->req_q_out); + else + cnt = qla2100_debounce_register(®->mailbox4); + + if( ha->req_ring_index < cnt ) + ha->req_q_cnt = cnt - ha->req_ring_index; + else + ha->req_q_cnt = REQUEST_ENTRY_CNT - (ha->req_ring_index - cnt); + } + + DEBUG5(sprintf(debug_buff, + "Number of free entries = (%d)\n\r",ha->req_q_cnt)); + DEBUG5(qla2100_print(debug_buff)); + /* If room for request in request ring. */ + if( (uint16_t)(req_cnt + 2) < ha->req_q_cnt ) { + /* Check for room in outstanding command list. */ + for( cnt = 1; cnt < MAX_OUTSTANDING_COMMANDS && + (ha->outstanding_cmds[cnt] != 0); cnt++ ) + ; + + if( cnt < MAX_OUTSTANDING_COMMANDS ) { + ha->outstanding_cmds[cnt] = sp; + ha->req_q_cnt -= req_cnt; + /* save the handle -- helps if we want to abort it */ + CMD_HANDLE(sp->cmd) = (unsigned char *) (u_long) cnt; + + /* + * Build command packet. + */ + pkt = (cmd_entry_t *)ha->request_ring_ptr; + + pkt->entry_type = COMMAND_TYPE; + pkt->entry_count = (uint8_t)req_cnt; + pkt->sys_define = (uint8_t)ha->req_ring_index; + pkt->entry_status = 0; + pkt->control_flags= 0; + pkt->handle = (uint32_t)cnt; + + /* Zero out remaining portion of packet. */ + dword_ptr = (uint32_t *)pkt + 2; + for( cnt = 2; cnt < REQUEST_ENTRY_SIZE/4; cnt++ ) + *dword_ptr++ = 0; + + /* + * v2.19.8 + * We subtract 5 sec. from the timeout value to insure + * the ISP time-out before the mid-level or the driver. + */ + timeout = (uint32_t) CMD_TIMEOUT(cmd)/HZ; + if( timeout > 5 ) + pkt->timeout = (uint16_t) timeout - 5; + else + pkt->timeout = (uint16_t) timeout; + + /* Set device target ID and LUN */ + pkt->target = TGT_Q(ha, + SCSI_BUS_32(cmd), SCSI_TCN_32(cmd))->loop_id; + pkt->lun = SCSI_LUN_32(cmd); + + /* Enable simple tag queuing if device supports it. */ + if ( cmd->device->tagged_queue ) { + switch (cmd->tag) { + case SIMPLE_QUEUE_TAG: + pkt->control_flags = CF_SIMPLE_TAG; + break; + case HEAD_OF_QUEUE_TAG: + pkt->control_flags = CF_HEAD_TAG; + break; + case ORDERED_QUEUE_TAG: + pkt->control_flags = CF_ORDERED_TAG; + break; + default: + pkt->control_flags = CF_SIMPLE_TAG; + } + } else + pkt->control_flags = CF_SIMPLE_TAG; + + if (ha->device_id == QLA2300_DEVICE_ID) + pkt->control_flags |= CF_NO_FAST_POSTING; + + /* Load SCSI command packet. */ + cdb_len = (uint16_t)CMD_CDBLEN(cmd); + if( cdb_len > MAX_CMDSZ ) + cdb_len = MAX_CMDSZ; + data_ptr = (uint8_t *) &(CMD_CDBP(cmd)); + for( cnt = 0; cnt < cdb_len; cnt++ ) + pkt->scsi_cdb[cnt] = *data_ptr++; + DEBUG3(sprintf(debug_buff, + "qla2100: Packet has command[0]=0x%x, hndl=0x%x\n",pkt->scsi_cdb[0],pkt->handle);) + DEBUG3(qla2100_print(debug_buff);) + pkt->byte_count = (uint32_t) CMD_XFRLEN(cmd); + + /* + * Load data segments. + */ + if( seg_cnt ) { + /* Set transfer direction (READ and WRITE) */ + /* Linux doesn't tell us */ + + switch( cmd->data_cmnd[0] ) { + case FORMAT_UNIT: + case WRITE_6: + case MODE_SELECT: + case SEND_DIAGNOSTIC: + case WRITE_10: + case WRITE_BUFFER: + case WRITE_LONG: + case WRITE_SAME: + case MODE_SELECT_10: + case WRITE_12: + case WRITE_VERIFY_12: + case SEND_VOLUME_TAG: + pkt->control_flags |= BIT_6; /* WRITE */ + break; + default: +#if LINUX_VERSION_CODE < KERNEL_VERSION(2,4,0) +#if QLA_SCSI_VENDOR_DIR + qla2100_set_vend_direction(ha, cmd, pkt); +#else + pkt->control_flags |= BIT_5; /* READ */ +#endif +#else /* kernel version is 2.4.0 or higher */ + if (cmd->sc_data_direction == SCSI_DATA_WRITE) + pkt->control_flags |= BIT_6;/*WRITE*/ + else + pkt->control_flags |= BIT_5;/*READ*/ +#endif /* kernel version 2.4.0 */ + break; + } + sp->dir = pkt->control_flags & (BIT_5|BIT_6); + + /* Set total data segment count. */ + pkt->dseg_count = seg_cnt; + + /* Setup packet address segment pointer. */ + dword_ptr = (uint32_t *)&pkt->dseg_0_address; + + if( cmd->use_sg ) /* If scatter gather */ + { + DEBUG5(qla2100_print("Building S/G data segments..\n\r")); + DEBUG5(qla2100_dump_buffer((caddr_t)sg, 4*16)); + /* Load command entry data segments. */ + for( cnt = 0; cnt < 3 && seg_cnt; cnt++, seg_cnt-- ) { +#if LINUX_VERSION_CODE < KERNEL_VERSION(2,3,18) + *dword_ptr++ = (uint32_t) cpu_to_le32(VIRT_TO_BUS(sg->address)); + *dword_ptr++ = sg->length; + /* DEBUG(sprintf(debug_buff, + "S/G Segment phys_addr=0x%x, len=0x%x\n\r", + cpu_to_le32(VIRT_TO_BUS(sg->address)),sg->length)); + DEBUG(qla2100_print(debug_buff)); */ +#else + *dword_ptr++ = cpu_to_le32(pci_dma_lo32(sg_dma_address(sg))); + *dword_ptr++ = cpu_to_le32(sg_dma_len(sg)); + /* DEBUG(sprintf(debug_buff, + "S/G Segment phys_addr=0x%x, len=0x%x\n\r", + cpu_to_le32(pci_dma_lo32(sg_dma_address(sg))), + cpu_to_le32(sg_dma_len(sg)));) + DEBUG(qla2100_print(debug_buff)); */ +#endif + sg++; + } +#ifdef QL_DEBUG_LEVEL_5 + qla2100_print( + "qla2100_32bit_start_scsi: Scatter/gather command packet data - "); + qla2100_output_number((u_long)ha->host_no, 10); + qla2100_print(":"); + qla2100_output_number((u_long)SCSI_BUS_32(cmd), 10); + qla2100_print(":"); + qla2100_output_number((u_long)SCSI_TCN_32(cmd), 10); + qla2100_print(":"); + qla2100_output_number((u_long)SCSI_LUN_32(cmd), 10); + qla2100_print("\n"); + qla2100_dump_buffer((uint8_t *)pkt, REQUEST_ENTRY_SIZE); +#endif + /* + * Build continuation packets. + */ + while( seg_cnt > 0 ) { + /* Adjust ring index. */ + ha->req_ring_index++; + if( ha->req_ring_index == REQUEST_ENTRY_CNT ) { + ha->req_ring_index = 0; + ha->request_ring_ptr = ha->request_ring; + } else + ha->request_ring_ptr++; + + pkt = (cmd_entry_t *)ha->request_ring_ptr; + + /* Zero out packet. */ + dword_ptr = (uint32_t *)pkt; + for( cnt = 0;cnt < REQUEST_ENTRY_SIZE/4; cnt++ ) + *dword_ptr++ = 0; + + /* Load packet defaults. */ + ((cont_entry_t *)pkt)->entry_type = CONTINUE_TYPE; + ((cont_entry_t *)pkt)->entry_count = 1; + ((cont_entry_t *)pkt)->sys_define = (uint8_t) + ha->req_ring_index; + + /* Setup packet address segment pointer. */ + dword_ptr = (uint32_t *) + &((cont_entry_t *)pkt)->dseg_0_address; + + /* Load continuation entry data segments. */ + for( cnt = 0; cnt < 7 && seg_cnt; cnt++, seg_cnt-- ) { + /* 4.10 32 bit */ +#if LINUX_VERSION_CODE < KERNEL_VERSION(2,3,18) + *dword_ptr++ = (u_int) cpu_to_le32(VIRT_TO_BUS(sg->address)); + *dword_ptr++ = sg->length; + /* DEBUG(sprintf(debug_buff, + "S/G Segment Cont. phys_addr=0x%x, len=0x%x\n\r", + cpu_to_le32(pci_dma_lo32(VIRT_TO_BUS(sg->address))),sg->length);) + DEBUG(qla2100_print(debug_buff)); */ +#else + *dword_ptr++ = cpu_to_le32(pci_dma_lo32(sg_dma_address(sg))); + *dword_ptr++ = cpu_to_le32(sg_dma_len(sg)); + /* DEBUG(sprintf(debug_buff, + "S/G Segment Cont. phys_addr=0x%x, len=0x%x\n\r", + cpu_to_le32(pci_dma_lo32(sg_dma_address(sg))), + cpu_to_le32(sg_dma_len(sg)));) + DEBUG(qla2100_print(debug_buff)); */ +#endif + sg++; + } +#ifdef QL_DEBUG_LEVEL_5 + qla2100_print( + "qla2100_32bit_start_scsi: continuation packet data - "); + qla2100_output_number((u_long)ha->host_no, 10); + qla2100_print(":"); + qla2100_output_number((u_long)SCSI_BUS_32(cmd), 10); + qla2100_print(":"); + qla2100_output_number((u_long)SCSI_TCN_32(cmd), 10); + qla2100_print(":"); + qla2100_output_number((u_long)SCSI_LUN_32(cmd), 10); + qla2100_print("\n"); + qla2100_dump_buffer((uint8_t *)pkt, + REQUEST_ENTRY_SIZE); +#endif + } + } else /* No scatter gather data transfer */ + { + /* 4.10 32 bit */ +#if LINUX_VERSION_CODE < KERNEL_VERSION(2,3,18) + *dword_ptr++ = (uint32_t) cpu_to_le32(VIRT_TO_BUS(cmd->request_buffer)); + *dword_ptr = (uint32_t) cmd->request_bufflen; +#else + dma_handle = pci_map_single(ha->pdev, + cmd->request_buffer, + cmd->request_bufflen, + scsi_to_pci_dma_dir(cmd->sc_data_direction)); + sp->saved_dma_handle = dma_handle; + + *dword_ptr++ = cpu_to_le32(pci_dma_lo32(dma_handle)); + *dword_ptr = (uint32_t) cmd->request_bufflen; + /* DEBUG(sprintf(debug_buff, + "32_bit: No S/G map_single dma_handle=%lx len=%x\n\r",dma_handle,cmd->request_bufflen)); + DEBUG(qla2100_print(debug_buff)); */ +#endif + /* DEBUG5(printk("Single Segment ap=0x%x, len=0x%x\n",cmd->request_buffer,cmd->request_bufflen));*/ + +#ifdef QL_DEBUG_LEVEL_5 + qla2100_print("qla2100_32bit_start_scsi: No scatter/gather command packet data - "); + qla2100_output_number((u_long)ha->host_no, 10); + qla2100_print(":"); + qla2100_output_number((u_long)SCSI_BUS_32(cmd), 10); + qla2100_print(":"); + qla2100_output_number((u_long)SCSI_TCN_32(cmd), 10); + qla2100_print(":"); + qla2100_output_number((u_long)SCSI_LUN_32(cmd), 10); + qla2100_print("\n"); + qla2100_dump_buffer((uint8_t *)pkt, REQUEST_ENTRY_SIZE); +#endif + } + } + else /* No data transfer */ + { + *dword_ptr++ = (uint32_t) 0; + *dword_ptr = (uint32_t) 0; +#ifdef QL_DEBUG_LEVEL_5 + qla2100_print( + "qla2100_32bit_start_scsi: No data, command packet data - "); + qla2100_output_number((u_long)ha->host_no, 10); + qla2100_print(":"); + qla2100_output_number((u_long)SCSI_BUS_32(cmd), 10); + qla2100_print(":"); + qla2100_output_number((u_long)SCSI_TCN_32(cmd), 10); + qla2100_print(":"); + qla2100_output_number((u_long)SCSI_LUN_32(cmd), 10); + qla2100_print("\n"); + qla2100_dump_buffer((uint8_t *)pkt, REQUEST_ENTRY_SIZE); +#endif + } + /* Adjust ring index. */ + ha->req_ring_index++; + if( ha->req_ring_index == REQUEST_ENTRY_CNT ) { + ha->req_ring_index = 0; + ha->request_ring_ptr = ha->request_ring; + } else + ha->request_ring_ptr++; + + /* Set chip new ring index. */ + DEBUG4(qla2100_print("\nqla2100_32bit_start_scsi: Wakeup RISC for pending command\n\r")); + ha->qthreads--; + sp->flags |= SRB_SENT; + sp->state = 0xde; + ha->actthreads++; + + /* DEBUG(sprintf(debug_buff," Start(pid=%d) ",cmd->pid);) + DEBUG(qla2100_print(debug_buff);) */ + +#if WATCH_THREADS_SIZE + DEBUG3(qla2100_output_number((u_long)ha->actthreads, 16)); +#endif + if (ha->device_id == QLA2300_DEVICE_ID) { + temp = CACHE_FLUSH(®2300->req_q_in); + WRT_REG_WORD(®2300->req_q_in, ha->req_ring_index); + } else { + temp = CACHE_FLUSH(®->mailbox4); + WRT_REG_WORD(®->mailbox4, ha->req_ring_index); + } + } else { + status = 1; + qla2100_stats.outarray_full++; +#ifdef QL_DEBUG_LEVEL_8 + qla2100_print( + "qla2100_32bit_start_scsi: NO ROOM IN OUTSTANDING ARRAY\n"); +#endif + } + } else { + status = 1; +#ifdef QL_DEBUG_LEVEL_8 + qla2100_print("qla2100_32bit_start_scsi: in-ptr="); + qla2100_output_number((u_long)ha->req_ring_index, 16); + qla2100_print(" req_q_cnt="); + qla2100_output_number((u_long)ha->req_q_cnt, 16); + qla2100_print(" req_cnt="); + qla2100_output_number((u_long)req_cnt, 16); + qla2100_print("\n"); +#endif + } + + /* Release ring specific lock */ + QLA2100_RING_UNLOCK(ha); + +#if defined(QL_DEBUG_LEVEL_2) || defined(QL_DEBUG_LEVEL_3) + if( status ) + qla2100_print("qla2100_32bit_start_scsi: **** FAILED ****\n"); +#ifdef QL_DEBUG_LEVEL_3 + else qla2100_print("qla2100_32bit_start_scsi: exiting normally\n\n\r"); +#endif +#endif +#ifdef QL_DEBUG_LEVEL_3 + LEAVE("qla2100_32bit_start_scsi"); +#endif + COMTRACE('s') + return(status); +} + +/* +* qla2100_ms_req_pkt +* Function is responsible for locking ring and +* getting a zeroed out Managment Server request packet. +* +* Input: +* ha = adapter block pointer. +* sp = srb_t pointer to handle post function call +* Returns: +* 0 = failed to get slot. +*/ +STATIC request_t * +qla2100_ms_req_pkt(scsi_qla_host_t *ha, srb_t *sp) { + device_reg_t *reg = ha->iobase; + device2300_reg_t *reg2300 = ha->iobase2300; + request_t *pkt = 0; + uint16_t cnt,i; + uint32_t *dword_ptr; + uint32_t timer; + +#ifdef QL_DEBUG_LEVEL_3 + ENTER("qla2100_ms_req_pkt"); +#endif + + /* Wait for 30 seconds for slot. */ + for( timer = 3000000; timer; timer-- ) { + /* Acquire ring specific lock */ + QLA2100_RING_LOCK(ha); + + if( !ha->req_q_cnt ) { + /* Calculate number of free request entries. */ + if (ha->device_id == QLA2300_DEVICE_ID) cnt = qla2100_debounce_register(®2300->req_q_out); + else cnt = qla2100_debounce_register(®->mailbox4); + if( ha->req_ring_index < cnt ) + ha->req_q_cnt = cnt - ha->req_ring_index; + else + ha->req_q_cnt = REQUEST_ENTRY_CNT - (ha->req_ring_index - cnt); + } + + /* Check for room in outstanding command list. */ + for( cnt = 1; cnt < MAX_OUTSTANDING_COMMANDS && + (ha->outstanding_cmds[cnt] != 0); cnt++ ) + ; + + if( (cnt < MAX_OUTSTANDING_COMMANDS) && + ( ha->req_q_cnt != 0 )) { + + pkt = ha->request_ring_ptr; + + /* Zero out packet. */ + dword_ptr = (uint32_t *)pkt; + for( i = 0; i < REQUEST_ENTRY_SIZE/4; i++ ) + *dword_ptr++ = 0; + + DEBUG(sprintf(debug_buff, + "qla2100_ms_req: putting sp=%x in outstanding_cmds[%x]\n",sp,cnt)); + DEBUG(qla2100_print(debug_buff)); + + ha->outstanding_cmds[cnt] = sp; + /* save the handle */ + CMD_HANDLE(sp->cmd) = (unsigned char *) (u_long) cnt; + + ha->req_q_cnt--; + pkt->handle = (uint32_t)cnt; + + /* Set system defined field. */ + pkt->sys_define = (uint8_t)ha->req_ring_index; + pkt->entry_status = 0; + + break; + } + + /* Release ring specific lock */ + QLA2100_RING_UNLOCK(ha); + + SYS_DELAY(2); + + /* Check for pending interrupts. */ + qla2100_poll(ha); + } + +#if defined(QL_DEBUG_LEVEL_2) || defined(QL_DEBUG_LEVEL_3) + if( !pkt ) + qla2100_print("qla2100_ms_req_pkt: **** FAILED ****\n"); +#endif +#ifdef QL_DEBUG_LEVEL_3 + else + LEAVE("qla2100_ms_req_pkt"); +#endif + return(pkt); +} + + +/* +* qla2100_req_pkt +* Function is responsible for locking ring and +* getting a zeroed out request packet. +* +* Input: +* ha = adapter block pointer. +* +* Returns: +* 0 = failed to get slot. +*/ +STATIC request_t * +qla2100_req_pkt(scsi_qla_host_t *ha) { + device_reg_t *reg = ha->iobase; + device2300_reg_t *reg2300 = ha->iobase2300; + request_t *pkt = 0; + uint16_t cnt; + uint32_t *dword_ptr; + uint32_t timer; + +#ifdef QL_DEBUG_LEVEL_3 + ENTER("qla2100_req_pkt"); +#endif + + /* Wait for 30 seconds for slot. */ + for( timer = 3000000; timer; timer-- ) { + /* Acquire ring specific lock */ + QLA2100_RING_LOCK(ha); + + if( !ha->req_q_cnt ) { + /* Calculate number of free request entries. */ + if (ha->device_id == QLA2300_DEVICE_ID) cnt = qla2100_debounce_register(®2300->req_q_out); + else cnt = qla2100_debounce_register(®->mailbox4); + if( ha->req_ring_index < cnt ) + ha->req_q_cnt = cnt - ha->req_ring_index; + else + ha->req_q_cnt = REQUEST_ENTRY_CNT - (ha->req_ring_index - cnt); + } + + /* Found empty request ring slot? */ + if( ha->req_q_cnt ) { + ha->req_q_cnt--; + pkt = ha->request_ring_ptr; + + /* Zero out packet. */ + dword_ptr = (uint32_t *)pkt; + for( cnt = 0; cnt < REQUEST_ENTRY_SIZE/4; cnt++ ) + *dword_ptr++ = 0; + + /* Set system defined field. */ + pkt->sys_define = (uint8_t)ha->req_ring_index; + + /* Set entry count. */ + pkt->entry_count = 1; + + break; + } + + /* Release ring specific lock */ + QLA2100_RING_UNLOCK(ha); + + SYS_DELAY(2); /* 10 */ + + /* Check for pending interrupts. */ + qla2100_poll(ha); + } + +#if defined(QL_DEBUG_LEVEL_2) || defined(QL_DEBUG_LEVEL_3) + if( !pkt ) + qla2100_print("qla2100_req_pkt: **** FAILED ****\n"); +#endif +#ifdef QL_DEBUG_LEVEL_3 + else + LEAVE("qla2100_req_pkt"); +#endif + return(pkt); +} + +/* +* qla2100_isp_cmd +* Function is responsible for modifying ISP input pointer. +* Releases ring lock. +* +* Input: +* ha = adapter block pointer. +*/ +STATIC void +qla2100_isp_cmd(scsi_qla_host_t *ha) { + device_reg_t *reg = ha->iobase; + device2300_reg_t *reg2300 = ha->iobase2300; + +#ifdef QL_DEBUG_LEVEL_3 + ENTER("qla2100_isp_cmd"); +#endif + +#ifdef QL_DEBUG_LEVEL_5 + qla2100_print("qla2100_isp_cmd: IOCB data:\n"); + qla2100_dump_buffer((uint8_t *)ha->request_ring_ptr, REQUEST_ENTRY_SIZE); +#endif + + /* Adjust ring index. */ + ha->req_ring_index++; + if( ha->req_ring_index == REQUEST_ENTRY_CNT ) { + ha->req_ring_index = 0; + ha->request_ring_ptr = ha->request_ring; + } else + ha->request_ring_ptr++; + + /* Set chip new ring index. */ + if (ha->device_id == QLA2300_DEVICE_ID) WRT_REG_WORD(®2300->req_q_in, ha->req_ring_index); + else WRT_REG_WORD(®->mailbox4, ha->req_ring_index); + + /* Release ring specific lock */ + QLA2100_RING_UNLOCK(ha); + +#ifdef QL_DEBUG_LEVEL_3 + LEAVE("qla2100_isp_cmd"); +#endif +} + +/* +* qla2100_enable_lun +* Issue enable LUN entry IOCB. +* +* Input: +* ha = adapter block pointer. +*/ +STATIC void +qla2100_enable_lun(scsi_qla_host_t *ha) { + elun_entry_t *pkt; + +#ifdef QL_DEBUG_LEVEL_3 + ENTER("qla2100_enable_lun"); +#endif + + /* Get request packet. */ + if( (pkt = (elun_entry_t *)qla2100_req_pkt(ha)) != NULL ) { + pkt->entry_type = ENABLE_LUN_TYPE; + pkt->command_count = 32; + pkt->immed_notify_count = 1; + pkt->timeout = 0xffff; + + /* Issue command to ISP */ + qla2100_isp_cmd(ha); + } + +#if defined(QL_DEBUG_LEVEL_2) || defined(QL_DEBUG_LEVEL_3) + if( !pkt ) + qla2100_print("qla2100_enable_lun: **** FAILED ****\n"); +#endif +#ifdef QL_DEBUG_LEVEL_3 + else + LEAVE("qla2100_enable_lun"); +#endif +} + + + +#if QL2100_TARGET_MODE_SUPPORT +/****************************************************************************/ +/* Target Mode Support Functions. */ +/****************************************************************************/ + + +/* +* qla2100_notify_ack +* Issue notify acknowledge IOCB. +* If sequence ID is zero, acknowledgement of +* SCSI bus reset or bus device reset is assumed. +* +* Input: +* ha = adapter block pointer. +* inotify = immediate notify entry pointer. +*/ +STATIC void +qla2100_notify_ack(scsi_qla_host_t *ha, notify_entry_t *inotify) { + nack_entry_t *pkt; + +#ifdef QL_DEBUG_LEVEL_3 + ENTER("qla2100_notify_ack: entered\n"); +#endif + + /* Get request packet. */ + if( pkt = (nack_entry_t *)qla2100_req_pkt(ha) ) { + pkt->entry_type = NOTIFY_ACK_TYPE; + pkt->initiator_id = inotify->initiator_id; + pkt->target_id = inotify->target_id; + + if( (pkt->status = inotify->status) == 0xe ) + /* Reset LIP occurred. */ + pkt->flags = OF_RESET; + else + /* Increment Immediate Notify Resource Count. */ + pkt->flags = OF_INC_RC; + + pkt->task_flags = inotify->task_flags; + pkt->seq_id = inotify->seq_id; + + /* Issue command to ISP */ + qla2100_isp_cmd(ha); + } + +#if defined(QL_DEBUG_LEVEL_2) || defined(QL_DEBUG_LEVEL_3) + if( !pkt ) + qla2100_print("qla2100_notify_ack: **** FAILED ****\n"); +#endif +#ifdef QL_DEBUG_LEVEL_3 + else + LEAVE("qla2100_notify_ack: exiting normally\n"); +#endif +} + +/* +* qla2100_64bit_continue_io +* Issue continue target I/O IOCB. +* +* Input: +* ha = adapter block pointer. +* atio = atio pointer. +* len = total bytecount. +* addr = physical address pointer. +*/ +STATIC void +qla2100_64bit_continue_io(scsi_qla_host_t *ha, atio_entry_t *atio, uint32_t len, + u_long *addr) { + ctio_a64_entry_t *pkt; + uint32_t *dword_ptr; + +#ifdef QL_DEBUG_LEVEL_3 + ENTER("qla2100_64bit_continue_io: entered\n"); +#endif + + /* Get request packet. */ + if( pkt = (ctio_a64_entry_t *)qla2100_req_pkt(ha) ) { + pkt->entry_type = CTIO_A64_TYPE; + pkt->initiator_id = atio->initiator_id; + pkt->exchange_id = atio->exchange_id; + pkt->flags = atio->flags | OF_FAST_POST; + pkt->scsi_status = atio->scsi_status; + + if( len ) { + pkt->dseg_count = 1; + pkt->transfer_length = len; + pkt->dseg_0_length = len; + dword_ptr = (uint32_t *)addr; + pkt->dseg_0_address[0] = *dword_ptr++; + pkt->dseg_0_address[1] = *dword_ptr; + } + + /* Issue command to ISP */ + qla2100_isp_cmd(ha); + } + +#if defined(QL_DEBUG_LEVEL_2) || defined(QL_DEBUG_LEVEL_3) + if( !pkt ) + qla2100_print("qla2100_64bit_continue_io: **** FAILED ****\n"); +#endif +#ifdef QL_DEBUG_LEVEL_3 + else + LEAVE("qla2100_64bit_continue_io: exiting normally\n"); +#endif +} + +/* +* qla2100_32bit_continue_io +* Issue continue target I/O IOCB. +* +* Input: +* ha = adapter block pointer. +* atio = atio pointer. +* len = total bytecount. +* addr = physical address pointer. +*/ +STATIC void +qla2100_32bit_continue_io(scsi_qla_host_t *ha, atio_entry_t *atio, uint32_t len, + u_long *addr) { + ctio_entry_t *pkt; + uint32_t *dword_ptr; + +#ifdef QL_DEBUG_LEVEL_3 + ENTER("qla2100_continue_io: entered\n"); +#endif + + /* Get request packet. */ + if( pkt = (ctio_entry_t *)qla2100_req_pkt(ha) ) { + pkt->entry_type = CONTINUE_TGT_IO_TYPE; + pkt->initiator_id = atio->initiator_id; + pkt->exchange_id = atio->exchange_id; + pkt->flags = atio->flags | OF_FAST_POST; + pkt->scsi_status = atio->scsi_status; + + if( len ) { + pkt->dseg_count = 1; + pkt->transfer_length = len; + pkt->dseg_0_length = len; + dword_ptr = (uint32_t *)addr; + pkt->dseg_0_address = *dword_ptr; + } + + /* Issue command to ISP */ + qla2100_isp_cmd(ha); + } + +#if defined(QL_DEBUG_LEVEL_2) || defined(QL_DEBUG_LEVEL_3) + if( !pkt ) + qla2100_print("qla2100_32bit_continue_io: **** FAILED ****\n"); +#endif +#ifdef QL_DEBUG_LEVEL_3 + else + LEAVE("qla2100_32bit_continue_io: exiting normally\n"); +#endif +} +#endif /* QL2100_TARGET_MODE_SUPPORT */ + + + +/****************************************************************************/ +/* Interrupt Service Routine. */ +/****************************************************************************/ + +/* +* qla2100_isr +* Calls I/O done on command completion. +* +* Input: +* ha = adapter block pointer. +* done_q_first = done queue first pointer. +* done_q_last = done queue last pointer. +* INTR_LOCK must be already obtained. +*/ +STATIC void +qla2100_isr(scsi_qla_host_t *ha, srb_t **done_q_first, srb_t **done_q_last) { + device_reg_t *reg = ha->iobase; + device2300_reg_t *reg2300 = ha->iobase2300; + response_t *pkt, response_entry; + srb_t *sp; + uint16_t mailbox[MAILBOX_REGISTER_COUNT]; + uint16_t *wptr, status2 = 0; + uint32_t index, longstatus, *dptr1, *dptr2; + unsigned long cpu_flags = 0; + +#ifdef QL_DEBUG_LEVEL_3 + ENTER("qla2100_isr"); +#endif + if (ha->device_id != QLA2300_DEVICE_ID) { + /* Check for 2100/2200 mailbox interrupt (semaphore set) */ + longstatus = RD_REG_WORD(®->semaphore); + if (longstatus & BIT_0) status2 = SEMAPHORE_SET; + } else { + /* Get 2300's Interrupt Status byte */ + longstatus = RD_REG_DWORD(®2300->host_status); +/*#if defined(QL_DEBUG_LEVEL_2) || defined(QL_DEBUG_LEVEL_3) + DEBUG(qla2100_print("qla2100_isr: +++ 2300 RISC_TO_HOST reg= ");) + DEBUG(qla2100_output_number((u_long)longstatus, 16);) + DEBUG(qla2100_print(" +++ \n");) +#endif */ + switch(longstatus & 0xff) { + case 0x1: + case 0x2: + case 0x10: + case 0x11: + case 0x12: + case 0x14: + case 0x15: + case 0x16: + case 0x17: + status2 = SEMAPHORE_SET; + break; + case 0x13: + default: + status2 = 0; + break; + } + } + + if ( status2 == SEMAPHORE_SET ) { + + /* Get mailbox data. */ + wptr = &mailbox[0]; + if (ha->device_id != QLA2300_DEVICE_ID) { + *wptr++ = qla2100_debounce_register(®->mailbox0); + *wptr++ = RD_REG_WORD(®->mailbox1); + *wptr = RD_REG_WORD(®->mailbox2); + } else { + *wptr++ = qla2100_debounce_register(®2300->mailbox0); + *wptr++ = RD_REG_WORD(®2300->mailbox1); + *wptr = RD_REG_WORD(®2300->mailbox2); + } + + WRT_REG_WORD(®->host_cmd, HC_CLR_RISC_INT); + +#if defined(QL_DEBUG_LEVEL_4) +DEBUG(qla2100_print("qla2100_isr: SEMAPHORE SET Processing, mailbox[0]=");) +DEBUG(qla2100_output_number((u_long)mailbox[0], 16);) +DEBUG(qla2100_print(" \n");) +DEBUG(qla2100_print("qla2100_isr: mailbox[1]=");) +DEBUG(qla2100_output_number((u_long)mailbox[1], 16);) +DEBUG(qla2100_print(" \n");) +DEBUG(qla2100_print("qla2100_isr: mailbox[2]=");) +DEBUG(qla2100_output_number((u_long)mailbox[2], 16);) +DEBUG(qla2100_print(" \n");) +DEBUG(qla2100_print("qla2100_isr: mailbox[3]=");) +DEBUG(qla2100_output_number((u_long)mailbox[3], 16);) +DEBUG(qla2100_print(" \n");) +#endif + +#ifdef FC_IP_SUPPORT /*******************************************/ + /* Handle IP send fast post */ + if (mailbox[0] == MBA_IP_TRANSMIT_COMPLETE) { + SEND_CB *pSendCB; + + /* Clear the semaphore lock , if it was set */ + if (RD_REG_WORD(®->semaphore) & BIT_0) + WRT_REG_WORD(®->semaphore, 0); + + /* Validate cmd handle and get packet pointer */ + if (mailbox[1] < MAX_SEND_PACKETS) { + if ((pSendCB = (SEND_CB *)ha->apActiveIpQueue[mailbox[1]]) != NULL) { + ha->apActiveIpQueue[mailbox[1]] = NULL; + + /* Complete backdoor command */ + (*ha->pSendCompletionRoutine)(pSendCB); + + return; + } + } + + /* Invalid handle from RISC, reset RISC firmware */ + printk(KERN_WARNING "qla2100_isr: bad IP send fast post handle %x\n", + mailbox[1]); + ha->flags.isp_abort_needed = TRUE; + return; + } + + /* Handle IP receive fast post */ + else if (mailbox[0] == MBA_IP_RECEIVE_COMPLETE || + mailbox[0] == MBA_IP_RECEIVE_COMPLETE_SPLIT) { + PBUFFER_CB pBufferCB, pNextBufferCB; + uint32_t lTagVal; + uint32_t lPacketSize; + uint32_t lReceiveBufferSize; + volatile uint16_t *pNextMailbox; + uint16_t wBufferCount; + + pNextMailbox = ®->mailbox10; + + /* If split buffer, set header size for 1st buffer */ + if (mailbox[0] == MBA_IP_RECEIVE_COMPLETE_SPLIT) + lReceiveBufferSize = ha->wHeaderSize; + else + lReceiveBufferSize = ha->lReceiveBufferSize; + + if ((lTagVal = RD_REG_WORD(pNextMailbox)) >= ha->wReceiveBufferCount) { + goto InvalidIpBufferHandle; + } + + pBufferCB = &ha->pReceiveBufferCBs[lTagVal]; + + if (!(pBufferCB->lFlags & BCB_FLAGS_RISC_OWNS_BUFFER)) { + goto InvalidIpBufferHandle; + } + + /* Set buffer belongs to driver now */ + pBufferCB->lFlags &= ~BCB_FLAGS_RISC_OWNS_BUFFER; + + lPacketSize = RD_REG_WORD(®->mailbox3); + pBufferCB->lPacketSize = lPacketSize; + pNextBufferCB = pBufferCB; + + for (wBufferCount = 1; ; wBufferCount++) { + if (lPacketSize > lReceiveBufferSize) { + pNextBufferCB->lBufferSize = lReceiveBufferSize; + lPacketSize -= lReceiveBufferSize; + + /* If split buffer, only use header size on 1st buffer */ + lReceiveBufferSize = ha->lReceiveBufferSize; + + pNextMailbox++; + if ((lTagVal = RD_REG_WORD(pNextMailbox)) >= + ha->wReceiveBufferCount) { + InvalidIpBufferHandle: + printk(KERN_WARNING "qla2100_isr: bad IP receive fast post handle %x\n", + lTagVal); + ha->flags.isp_abort_needed = TRUE; + return; + } + + pNextBufferCB->pNextBufferCB = &ha->pReceiveBufferCBs[lTagVal]; + pNextBufferCB = pNextBufferCB->pNextBufferCB; + + if (!(pNextBufferCB->lFlags & BCB_FLAGS_RISC_OWNS_BUFFER)) { + goto InvalidIpBufferHandle; + } + + /* Set buffer belongs to driver now */ + pNextBufferCB->lFlags &= ~BCB_FLAGS_RISC_OWNS_BUFFER; + } else { + pNextBufferCB->lBufferSize = lPacketSize; + pNextBufferCB->pNextBufferCB = NULL; + break; + } + } + + /* Clear the semaphore lock , if it was set */ + if (RD_REG_WORD(®->semaphore) & BIT_0) + WRT_REG_WORD(®->semaphore, 0); + + /* Pass received packet to IP driver */ + pBufferCB->wBufferCount = wBufferCount; + + (*ha->pReturnReceivePacketsRoutine) + (ha->pReturnReceivePacketsContext, + pBufferCB); + + /* Keep track of RISC buffer pointer (for IP reinit) */ + ha->wIpBufferOut += wBufferCount; + if (ha->wIpBufferOut >= IP_BUFFER_QUEUE_DEPTH) + ha->wIpBufferOut -= IP_BUFFER_QUEUE_DEPTH; + + return; + } +#endif /* FC_IP_SUPPORT ****************************************8*/ + + if( mailbox[0] != MBA_SCSI_COMPLETION ) { +#ifdef QL_DEBUG_LEVEL_4 + qla2100_print("qla2100_isr: non MBA_SCSI_COMPLETION ; Saving mailbox data\n"); +#endif + wptr++; + if (ha->device_id != QLA2300_DEVICE_ID) { + *wptr++ = RD_REG_WORD(®->mailbox3); + *wptr++ = qla2100_debounce_register(®->mailbox4); + *wptr++ = qla2100_debounce_register(®->mailbox5); + *wptr++ = RD_REG_WORD(®->mailbox6); + *wptr = RD_REG_WORD(®->mailbox7); + } else { + *wptr++ = RD_REG_WORD(®2300->mailbox3); + *wptr++ = qla2100_debounce_register(®2300->mailbox4); + *wptr++ = qla2100_debounce_register(®2300->mailbox5); + *wptr++ = RD_REG_WORD(®2300->mailbox6); + *wptr = RD_REG_WORD(®2300->mailbox7); + } + } + + /* Clear the semaphore lock , if it was set */ + if (RD_REG_WORD(®->semaphore) & BIT_0) + WRT_REG_WORD(®->semaphore, 0); + +#ifdef QL_DEBUG_LEVEL_4 + qla2100_print("qla2100_isr: +++ mailbox interrupt mailbox[0] = "); + qla2100_output_number((u_long)mailbox[0], 16); + qla2100_print("+++ \n"); + #endif + /* Handle asynchronous (0x80xx) and + mailbox command completion (0x400x) events */ + switch( mailbox[0] ) { + case MBA_SCSI_COMPLETION: /* 0x8020 */ + if( ha->flags.online ) { + /* Get outstanding command index. */ + index = (uint32_t)(mailbox[2] << 16 | mailbox[1]); + /* Validate handle. */ + if( index < MAX_OUTSTANDING_COMMANDS ) { + sp = ha->outstanding_cmds[index]; + } else + sp = 0; + + if( sp ) { + /* Free outstanding command slot. */ + ha->outstanding_cmds[index] = 0; + + /* Save ISP completion status */ + CMD_RESULT(sp->cmd) = DID_OK; + sp->flags &= ~SRB_SENT; + /* v2.19.5b2 Reset port down retry on success. */ + sp->port_down_retry_count = ha->port_down_retry_count; + + QLA2100_TIMER_LOCK(ha); + ha->actthreads--; + /* Place block on done queue */ + qla2100_stats.done_q_cnt++; + DEBUG(sp->state = 3;) + + sp->s_next = NULL; + sp->s_prev = *done_q_last; + if( !(*done_q_first) ) + *done_q_first = sp; + else + (*done_q_last)->s_next = sp; + *done_q_last = sp; + QLA2100_TIMER_UNLOCK(ha); + } else { +#ifdef QL_DEBUG_LEVEL_2 + qla2100_print("qla2100_isr: ISP invalid handle\n"); +#endif + ha->flags.isp_abort_needed = TRUE; + } + } + break; + case MBA_RESET: /* Reset 0x8001*/ +#ifdef QL_DEBUG_LEVEL_2 + qla2100_print("qla2100_isr: asynchronous RESET\n"); +#endif + ha->flags.reset_marker = TRUE; + break; + case MBA_SYSTEM_ERR: /* System Error 0x8002 */ +#ifdef QL_DEBUG_LEVEL_2 + qla2100_print("qla2100_isr: ISP System Error - mbx1="); + qla2100_output_number((u_long)mailbox[1], 16); + qla2100_print(", mbx2="); + qla2100_output_number((u_long)mailbox[2], 16); + qla2100_print(", mbx3="); + qla2100_output_number((u_long)mailbox[3], 16); + qla2100_print("\n"); +#endif + printk(KERN_WARNING + "!qla2100_isr: ISP System Error - mbx1=%xh, mbx2=%xh, mbx3=%xh", + mailbox[1], mailbox[2], mailbox[3]); + ha->flags.isp_abort_needed = TRUE; + break; + case MBA_REQ_TRANSFER_ERR: /* Request Transfer Error */ +#ifdef QL_DEBUG_LEVEL_2 + qla2100_print("qla2100_isr: ISP Request Transfer Error\n"); +#endif + printk(KERN_WARNING "qla2100: ISP Request Transfer Error\n"); + ha->flags.isp_abort_needed = TRUE; + break; + case MBA_RSP_TRANSFER_ERR: /* Response Transfer Error */ +#ifdef QL_DEBUG_LEVEL_2 + qla2100_print("qla2100_isr: ISP Response Transfer Error\n"); +#endif + printk(KERN_WARNING "qla2100: ISP Response Transfer Error\n"); + ha->flags.isp_abort_needed = TRUE; + break; + case MBA_WAKEUP_THRES: /* Request Queue Wake-up */ +#ifdef QL_DEBUG_LEVEL_2 + qla2100_print("qla2100_isr: asynchronous WAKEUP_THRES\n"); +#endif + break; + case MBA_LIP_OCCURRED: /* Loop Initialization Procedure */ + if(!qla2100_quiet) printk(KERN_INFO "scsi(%d): LIP occurred.\n",(int)ha->host_no); + DEBUG(sprintf(debug_buff,"\n\nscsi(%d): LIP occurred.\n",(int)ha->host_no);) + DEBUG(qla2100_print(debug_buff)); +#ifdef QL_DEBUG_LEVEL_2 + qla2100_print( + "qla2100_isr: asynchronous MBA_LIP_OCCURRED\n"); +#endif + ha->dpc_flags = ha->dpc_flags | COMMAND_WAIT_NEEDED; + /* Save LIP sequence. */ + ha->lip_seq = mailbox[1]; + if( ha->loop_state != LOOP_DOWN ) { + ha->loop_state = LOOP_DOWN; + ha->loop_down_timer = LOOP_DOWN_TIME; + } + ha->lip_count++; + break; + case MBA_LOOP_UP: + printk(KERN_INFO "scsi(%d): LOOP UP detected\n",(int)ha->host_no); +#ifdef QL_DEBUG_LEVEL_2 + qla2100_print("qla2100_isr: asynchronous MBA_LOOP_UP\n"); +#endif + ha->loop_state = LOOP_UP; + break; + case MBA_LOOP_DOWN: + printk(KERN_INFO "scsi(%d): LOOP DOWN detected\n",(int)ha->host_no); +#ifdef QL_DEBUG_LEVEL_2 + qla2100_print("qla2100_isr: asynchronous MBA_LOOP_DOWN\n"); +#endif + ha->dpc_flags = ha->dpc_flags | COMMAND_WAIT_NEEDED; + if( ha->loop_state != LOOP_DOWN ) { + ha->loop_state = LOOP_DOWN; + ha->loop_down_timer = LOOP_DOWN_TIME; + } + break; + case MBA_LIP_RESET: /* LIP reset occurred. */ + if(!qla2100_quiet) printk(KERN_INFO "scsi(%d): LIP reset occurred\n",(int)ha->host_no); +#ifdef QL_DEBUG_LEVEL_2 + qla2100_print( + "qla2100_isr: asynchronous MBA_LIP_RESET\n"); +#endif + ha->dpc_flags = ha->dpc_flags | COMMAND_WAIT_NEEDED; + ha->flags.reset_marker = TRUE; + ha->loop_down_timer = LOOP_DOWN_TIME; + ha->loop_state = LOOP_DOWN; + ha->operating_mode = LOOP; + break; + case MBA_LINK_MODE_UP: /* Link mode up. */ + DEBUG(printk(KERN_INFO "scsi(%d): Link node is up\n",(int)ha->host_no);) +#ifdef QL_DEBUG_LEVEL_2 + qla2100_print( + "qla2100_isr: asynchronous MBA_LINK_MODE_UP\n"); +#endif + ha->dpc_flags = ha->dpc_flags | COMMAND_WAIT_NEEDED; + break; + case MBA_UPDATE_CONFIG: /* Update Configuration. */ + printk(KERN_INFO "scsi(%d): Configuration change detected: value %d.\n",(int)ha->host_no,mailbox[1]); +#ifdef QL_DEBUG_LEVEL_2 + qla2100_print( + "qla2100_isr: asynchronous MBA_UPDATE_CONFIG\n"); +#endif + ha->flags.update_config_needed = 1; + ha->loop_state = LOOP_DOWN; /* dg - 03/30 */ + ha->flags.isp_abort_needed = TRUE; + break; + case MBA_PORT_UPDATE: /* Port database update occurred. */ + DEBUG(printk("scsi(%d): Port database changed\n",(int)ha->host_no);) +#ifdef QL_DEBUG_LEVEL_2 + qla2100_print( + "qla2100_isr: asynchronous MBA_PORT_UPDATE\n"); +#endif + ha->loop_down_timer = 0; + ha->flags.loop_resync_needed = TRUE; + ha->loop_state = LOOP_UPDATE; + break; + case MBA_SCR_UPDATE: /* State Change Registration. */ +#ifdef QL_DEBUG_LEVEL_2 + qla2100_print( + "qla2100_isr: asynchronous MBA_RSCR_UPDATE\n"); +#endif + mailbox[1] = RD_REG_WORD(®->mailbox1); + mailbox[2] = RD_REG_WORD(®->mailbox2); + + DEBUG(printk("scsi(%d): RSCN database changed - 0x%x,0x%x\n",(int)ha->host_no,mailbox[1],mailbox[2]);) +#ifdef RCSN + index = ha->rscn_in_ptr + 1; + if (index == MAX_RSCN_COUNT) + index = 0; + if (index != ha->rscn_out_ptr) { + ha->rscn_queue[ha->rscn_in_ptr].format = + MSB(mb[1]); + ha->rscn_queue[ha->rscn_in_ptr].d_id.b.domain = + LSB(mb[1]); + ha->rscn_queue[ha->rscn_in_ptr].d_id.b.area = + MSB(mb[2]); + ha->rscn_queue[ha->rscn_in_ptr].d_id.b.al_pa = + LSB(mb[2]); + ha->rscn_in_ptr = (uint8_t)index; + } else { + ha->device_flags |= RSCN_QUEUE_OVERFLOW; + } +#endif + ha->device_flags |= RSCN_UPDATE; + ha->loop_down_timer = 0; + ha->flags.loop_resync_needed = TRUE; + ha->loop_state = LOOP_UPDATE; + /* ha->dpc_flags = ha->dpc_flags | COMMAND_WAIT_NEEDED; */ + break; + case MBA_CTIO_COMPLETION: +#ifdef QL_DEBUG_LEVEL_2 + qla2100_print( + "qla2100_isr: asynchronous MBA_CTIO_COMPLETION\n"); +#endif + break; + default: + if( mailbox[0] < MBA_ASYNC_EVENT /* 0x8000 */) { + wptr = &mailbox[0]; + ha->mailbox_out[0] = *wptr++; + ha->mailbox_out[1] = *wptr++; + ha->mailbox_out[2] = *wptr++; + ha->mailbox_out[3] = *wptr++; + ha->mailbox_out[4] = *wptr++; + ha->mailbox_out[5] = *wptr++; + ha->mailbox_out[6] = *wptr++; + ha->mailbox_out[7] = *wptr; + ha->flags.mbox_int = TRUE; +#ifdef QL_DEBUG_LEVEL_2 + if (mailbox[0] != 0x4000) { + qla2100_print("qla2100_isr: MBA Switch Default mailbox[0]= "); + qla2100_output_number(mailbox[0] , 16); + qla2100_print("\n"); + } +#endif +#ifdef QL_DEBUG_LEVEL_4 + qla2100_print("qla2100_isr: Setting flags.mbox_int=1 in Default mailbox[0]= "); + qla2100_output_number(mailbox[0] , 16); + qla2100_print("\n"); +#endif + } + break; + } /* switch */ + } else { /* not a SEMAPHORE Set Completion */ + if (ha->device_id != QLA2300_DEVICE_ID) + mailbox[5]=qla2100_debounce_register(®->mailbox5); + else + mailbox[5]=qla2100_debounce_register(®2300->rsp_q_in); + + WRT_REG_WORD(®->host_cmd, HC_CLR_RISC_INT); + /* + * Response Ring Update + */ + /* Clear mailbox busy flag for 2300s; + so we don't ignore its Respose Ring Updates + during send of mailbox command */ + if (ha->device_id == QLA2300_DEVICE_ID) + ha->flags.mbox_busy = FALSE; + + if( ha->flags.online && !(ha->flags.mbox_busy) ) { + if( mailbox[5] < RESPONSE_ENTRY_CNT ) { + while( ha->rsp_ring_index != mailbox[5] ) { + pkt = ha->response_ring_ptr; + +#ifdef QL_DEBUG_LEVEL_5 + qla2100_print("qla2100_isr: ha->rsp_ring_index = "); + qla2100_output_number((u_long)ha->rsp_ring_index, 16); + qla2100_print(" mailbox[5] = "); + qla2100_output_number((u_long)mailbox[5], 16); + qla2100_print("\n"); + qla2100_print("\nqla2100_isr: response packet data\n"); + qla2100_dump_buffer((uint8_t *)pkt, RESPONSE_ENTRY_SIZE); +#endif + +#ifdef FC_IP_SUPPORT /************************************************/ + /* Handle IP send completion */ + if (pkt->entry_type == ET_IP_COMMAND_64) { + uint32_t lTagVal; + SEND_CB *pSendCB; + + /* Set packet pointer from queue entry handle */ + if ((lTagVal = pkt->handle) < MAX_SEND_PACKETS) { + if ((pSendCB = (SEND_CB *)ha->apActiveIpQueue[lTagVal]) != NULL) { + ha->apActiveIpQueue[lTagVal] = NULL; + + /* Return send packet to IP driver */ + (*ha->pSendCompletionRoutine)(pSendCB); + } else { + /* Invalid handle from RISC, reset RISC firmware */ + printk(KERN_WARNING "qla2100_isr: bad IP send handle %x\n", lTagVal); + ha->flags.isp_abort_needed = TRUE; + } + } else { + /* Invalid handle from RISC, reset RISC firmware */ + printk(KERN_WARNING "qla2100_isr: bad IP send handle %x\n", lTagVal); + ha->flags.isp_abort_needed = TRUE; + } + + /* Adjust ring index. */ + ha->rsp_ring_index++; + if( ha->rsp_ring_index == RESPONSE_ENTRY_CNT ) { + ha->rsp_ring_index = 0; + ha->response_ring_ptr = ha->response_ring; + } else + ha->response_ring_ptr++; + if (ha->device_id != QLA2300_DEVICE_ID) + WRT_REG_WORD(®->mailbox5, ha->rsp_ring_index); + else + WRT_REG_WORD(®2300->rsp_q_out, ha->rsp_ring_index); + continue; + } + + /* Handle IP receive packet */ + else if (pkt->entry_type == ET_IP_RECEIVE) { + PIP_RECEIVE_ENTRY pIpReceiveEntry = (PIP_RECEIVE_ENTRY)pkt; + PBUFFER_CB pBufferCB, pNextBufferCB; + uint32_t lTagVal; + uint32_t lPacketSize; + uint16_t wBufferCount; + uint32_t lReceiveBufferSize; + + /* If split buffer, set header size for 1st buffer */ + if (pIpReceiveEntry->wCompletionStatus & IP_REC_STATUS_SPLIT_BUFFER) + lReceiveBufferSize = ha->wHeaderSize; + else + lReceiveBufferSize = ha->lReceiveBufferSize; + + if ((lTagVal = pIpReceiveEntry->waBufferHandle[0]) >= + ha->wReceiveBufferCount) { + /* Invalid handle from RISC, reset RISC firmware */ + printk(KERN_WARNING "qla2100_isr: bad IP buffer handle %x\n", lTagVal); + ha->flags.isp_abort_needed = TRUE; + goto InvalidIpHandle; + } + pBufferCB = &ha->pReceiveBufferCBs[lTagVal]; + + if (!(pBufferCB->lFlags & BCB_FLAGS_RISC_OWNS_BUFFER)) { + /* Invalid handle from RISC, reset RISC firmware */ + printk(KERN_WARNING "qla2100_isr: bad IP buffer handle %x\n", lTagVal); + ha->flags.isp_abort_needed = TRUE; + goto InvalidIpHandle; + } + + /* Set buffer belongs to driver now */ + pBufferCB->lFlags &= ~BCB_FLAGS_RISC_OWNS_BUFFER; + + lPacketSize = pIpReceiveEntry->wSequenseLength; + pBufferCB->lPacketSize = lPacketSize; + pNextBufferCB = pBufferCB; + + for (wBufferCount = 1; ; wBufferCount++) { + if (lPacketSize > lReceiveBufferSize) { + pNextBufferCB->lBufferSize = lReceiveBufferSize; + lPacketSize -= lReceiveBufferSize; + + /* If split buffer, only use header size on 1st buffer */ + lReceiveBufferSize = ha->lReceiveBufferSize; + + if ((lTagVal = pIpReceiveEntry->waBufferHandle[wBufferCount]) >= + ha->wReceiveBufferCount) { + /* Invalid handle from RISC, reset RISC firmware */ + printk(KERN_WARNING "qla2100_isr: bad IP buffer handle %x\n", lTagVal); + ha->flags.isp_abort_needed = TRUE; + goto InvalidIpHandle; + } + pNextBufferCB->pNextBufferCB = &ha->pReceiveBufferCBs[lTagVal];; + pNextBufferCB = pNextBufferCB->pNextBufferCB; + + if (!(pNextBufferCB->lFlags & BCB_FLAGS_RISC_OWNS_BUFFER)) { + /* Invalid handle from RISC, reset RISC firmware */ + printk(KERN_WARNING "qla2100_isr: bad IP buffer handle %x\n", lTagVal); + ha->flags.isp_abort_needed = TRUE; + goto InvalidIpHandle; + } + + /* Set buffer belongs to driver now */ + pNextBufferCB->lFlags &= ~BCB_FLAGS_RISC_OWNS_BUFFER; + } else { + pNextBufferCB->lBufferSize = lPacketSize; + pNextBufferCB->pNextBufferCB = NULL; + break; + } + } + + /* Check for incoming ARP packet with matching IP address */ + if (pIpReceiveEntry->wServiceClass == 0) { + PPACKET_HEADER pPacket = (PPACKET_HEADER)pBufferCB->pBuffer; + PIP_DEVICE_BLOCK pIpDevice; + uint8_t acPortId[3]; + + /* Scan list of IP devices to see if login needed */ + for (pIpDevice = ha->pIpDeviceTop; pIpDevice != NULL; + pIpDevice = pIpDevice->pNextIpDevice) { + if (*(uint16_t *)(&pIpDevice->acWorldWideName[2]) == + pPacket->sNetworkHeader.wSourceAddrHigh && + *(uint32_t *)(&pIpDevice->acWorldWideName[4]) == + pPacket->sNetworkHeader.lSourceAddrLow) { + /* Device already in IP list, skip login */ + goto SkipDeviceLogin; + } + } + + /* Device not in list, need to do login */ + acPortId[0] = pIpReceiveEntry->cS_IDHigh; + acPortId[1] = (uint8_t)(pIpReceiveEntry->wS_IDLow >> 8); + acPortId[2] = (uint8_t)pIpReceiveEntry->wS_IDLow; + + /* Make sure its not a local device */ + if (acPortId[0] == ha->port_id[0] && + acPortId[1] == ha->port_id[1]) { + goto SkipDeviceLogin; + } + + if (qla2x00_add_new_ip_device(ha, PUBLIC_LOOP_DEVICE, + acPortId, + (uint8_t *)&pPacket->sNetworkHeader.wSourceNAA, + TRUE) == QL_STATUS_FATAL_ERROR) { + /* Fatal error, reinitialize */ + ha->flags.isp_abort_needed = TRUE; + } + } + SkipDeviceLogin: + /* Pass received packet to IP driver */ + pBufferCB->wBufferCount = wBufferCount; + + (*ha->pReturnReceivePacketsRoutine) + (ha->pReturnReceivePacketsContext, + pBufferCB); + + /* Keep track of RISC buffer pointer (for IP reinit) */ + ha->wIpBufferOut += wBufferCount; + if (ha->wIpBufferOut >= IP_BUFFER_QUEUE_DEPTH) + ha->wIpBufferOut -= IP_BUFFER_QUEUE_DEPTH; + InvalidIpHandle: + /* Adjust ring index. */ + ha->rsp_ring_index++; + if( ha->rsp_ring_index == RESPONSE_ENTRY_CNT ) { + ha->rsp_ring_index = 0; + ha->response_ring_ptr = ha->response_ring; + } else + ha->response_ring_ptr++; + if (ha->device_id != QLA2300_DEVICE_ID) + WRT_REG_WORD(®->mailbox5, ha->rsp_ring_index); + else + WRT_REG_WORD(®2300->rsp_q_out, ha->rsp_ring_index); + continue; + } + + /* Handle IP FARP request */ + else if (pkt->entry_type == ET_IP_FARP_REQUEST) { + PIP_FARP_REQUEST_ENTRY pIpFarpRequestEntry; + uint8_t acPortId[3]; + uint8_t acPortName[8]; + + pIpFarpRequestEntry = (PIP_FARP_REQUEST_ENTRY)pkt; + acPortId[0] = pIpFarpRequestEntry->cRequesterPortIdHigh; + acPortId[1] = (uint8_t)(pIpFarpRequestEntry->wRequesterPortIdLow >> 8); + acPortId[2] = (uint8_t)pIpFarpRequestEntry->wRequesterPortIdLow; + acPortName[0] = pIpFarpRequestEntry->acRequesterPortName[7]; + acPortName[1] = pIpFarpRequestEntry->acRequesterPortName[6]; + acPortName[2] = pIpFarpRequestEntry->acRequesterPortName[5]; + acPortName[3] = pIpFarpRequestEntry->acRequesterPortName[4]; + acPortName[4] = pIpFarpRequestEntry->acRequesterPortName[3]; + acPortName[5] = pIpFarpRequestEntry->acRequesterPortName[2]; + acPortName[6] = pIpFarpRequestEntry->acRequesterPortName[1]; + acPortName[7] = pIpFarpRequestEntry->acRequesterPortName[0]; + + /* Login and add device to IP database */ + if (qla2x00_add_new_ip_device(ha, PUBLIC_LOOP_DEVICE, + acPortId, + acPortName, + TRUE) == QL_STATUS_FATAL_ERROR) { + /* Fatal error, reinitialize */ + ha->flags.isp_abort_needed = TRUE; + } + + /* Adjust ring index. */ + ha->rsp_ring_index++; + if( ha->rsp_ring_index == RESPONSE_ENTRY_CNT ) { + ha->rsp_ring_index = 0; + ha->response_ring_ptr = ha->response_ring; + } else + ha->response_ring_ptr++; + if (ha->device_id != QLA2300_DEVICE_ID) + WRT_REG_WORD(®->mailbox5, ha->rsp_ring_index); + else + WRT_REG_WORD(®2300->rsp_q_out, ha->rsp_ring_index); + + continue; + } +#endif /* FC_IP_SUPPORT *******************************************/ + + if( pkt->entry_type == STATUS_TYPE || + pkt->entry_status ) { + ha->actthreads--; + if( pkt->entry_type == STATUS_TYPE ) { + qla2100_status_entry(ha, (sts_entry_t *)pkt, + done_q_first, done_q_last); + /* DEBUG(printk("qla2100_isr: RespRingUpdate STATUS TYPE\n");) */ + } else { + qla2100_error_entry(ha, pkt, + done_q_first, done_q_last); + /* DEBUG(printk("qla2100_isr: RespRingUpdate ERROR TYPE \n");)*/ + } + /* Adjust ring index. */ + ha->rsp_ring_index++; + if( ha->rsp_ring_index == RESPONSE_ENTRY_CNT ) { + ha->rsp_ring_index = 0; + ha->response_ring_ptr = ha->response_ring; + } else + ha->response_ring_ptr++; + if (ha->device_id != QLA2300_DEVICE_ID) + WRT_REG_WORD(®->mailbox5, ha->rsp_ring_index); + else + WRT_REG_WORD(®2300->rsp_q_out, ha->rsp_ring_index); + } else { + pkt = &response_entry; + + /* Copy packet. */ + dptr1 = (uint32_t *)ha->response_ring_ptr; + dptr2 = (uint32_t *)pkt; + for( index = 0; index < RESPONSE_ENTRY_SIZE/4; + index++ ) + *dptr2++ = *dptr1++; + + /* Adjust ring index. */ + ha->rsp_ring_index++; + if( ha->rsp_ring_index == RESPONSE_ENTRY_CNT ) { + ha->rsp_ring_index = 0; + ha->response_ring_ptr = ha->response_ring; + } else + ha->response_ring_ptr++; + if (ha->device_id != QLA2300_DEVICE_ID) + WRT_REG_WORD(®->mailbox5, ha->rsp_ring_index); + else + WRT_REG_WORD(®2300->rsp_q_out, ha->rsp_ring_index); + + /* Release interrupt specific lock */ + QLA2100_INTR_UNLOCK(ha); + +#if QLA2100_TARGET_MODE_SUPPORT + switch( pkt->entry_type ) { + case ACCEPT_TGT_IO_TYPE: + qla2100_atio_entry(ha, (atio_entry_t *)pkt); + break; + case IMMED_NOTIFY_TYPE: + qla2100_notify_ack(ha, (notify_entry_t *)pkt); + break; + default: + break; + } +#endif /**** FC_TARGET_MODE_SUPPORT */ + + /* Acquire interrupt specific lock */ + QLA2100_INTR_LOCK(ha); + } + } + } else { + ha->flags.isp_abort_needed = TRUE; +#ifdef QL_DEBUG_LEVEL_2 + qla2100_print("qla2100_isr: $$$ Response Pointer Error $$$ mb5=\n"); + qla2100_output_number((u_long)mailbox[5], 16); + qla2100_print(" \n"); + printk(KERN_WARNING "qla2100_isr: [ERROR] Response pointer Error mailbox[5]=%x\n",mailbox[5]); +#endif + } + } + } + +#ifdef QL_DEBUG_LEVEL_3 + LEAVE("qla2100_isr"); +#endif +} + + + +/* +* qla2100_rst_aen +* Processes asynchronous reset. +* +* Input: +* ha = adapter block pointer. +*/ +STATIC void +qla2100_rst_aen(scsi_qla_host_t *ha) { +#if QL2100_TARGET_MODE_SUPPORT + notify_entry_t nentry; +#endif /* QL2100_TARGET_MODE_SUPPORT */ + +#ifdef QL_DEBUG_LEVEL_3 + ENTER("qla2100_rst_aen"); +#endif + + if( ha->flags.online && !ha->flags.reset_active && + !ha->loop_down_timer && !ha->flags.abort_isp_active ) { + ha->flags.reset_active = TRUE; + do { + ha->flags.reset_marker = FALSE; + + /* Issue marker command. */ + qla2100_marker(ha, 0, 0, 0, MK_SYNC_ALL); + +#if QL2100_TARGET_MODE_SUPPORT + if( !ha->loop_down_timer && !ha->flags.reset_marker ) { + /* Issue notify acknowledgement command. */ + BZERO((caddr_t)&nentry, sizeof(notify_entry_t)); + nentry.initiator_id = ha->id; + /* dg 7/3/99 nentry.target_id = ha->id; */ + nentry.task_flags = BIT_13; + qla2100_notify_ack(ha, &nentry); + } +#endif /* QL2100_TARGET_MODE_SUPPORT */ + }while( !ha->loop_down_timer && ha->flags.reset_marker ); + ha->flags.reset_active = FALSE; + } + +#ifdef QL_DEBUG_LEVEL_3 + LEAVE("qla2100_rst_aen"); +#endif +} + +#if QLA2100_TARGET_MODE_SUPPORT +/* +* qla2100_atio_entry +* Processes received ISP accept target I/O entry. +* +* Input: +* ha = adapter block pointer. +* pkt = entry pointer. +*/ +STATIC void +qla2100_atio_entry(scsi_qla_host_t *ha, atio_entry_t *pkt) { + uint64_t *a64; + uint64_t *end_a64; + u_long phy_addr[2]; + u_long end_addr[2]; + uint32_t len; + uint32_t offset; + uint8_t t; + uint8_t *sense_ptr; + +#ifdef QL_DEBUG_LEVEL_3 + ENTER("qla2100_atio_entry: entered\n"); +#endif + + t = pkt->initiator_id; + sense_ptr = ha->tsense + t * TARGET_SENSE_SIZE; + a64 = (uint64_t *)&phy_addr[0]; + end_a64 = (uint64_t *)&end_addr[0]; + + switch( pkt->status & ~BIT_7 ) { + case 7: /* Path invalid */ +#if defined(QL_DEBUG_LEVEL_2) || defined(QL_DEBUG_LEVEL_3) + qla2100_print("qla2100_atio_entry: Path invalid\n"); +#endif + break; + case 0x16: /* Requested Capability Not Available */ +#if defined(QL_DEBUG_LEVEL_2) || defined(QL_DEBUG_LEVEL_3) + qla2100_print( + "qla2100_atio_entry: Requested Capability Not Available\n"); +#endif + break; + case 0x17: /* Bus Device Reset Message Received */ +#if defined(QL_DEBUG_LEVEL_2) || defined(QL_DEBUG_LEVEL_3) + qla2100_print( + "qla2100_atio_entry: Bus Device Reset Message Received\n"); +#endif + break; + case 0x3D: /* CDB Received */ + + /* Check for invalid LUN */ + if( pkt->lun && pkt->cdb[0] != SS_INQUIR && + pkt->cdb[0] != SS_REQSEN ) + pkt->cdb[0] = SS_TEST; + + switch( pkt->cdb[0] ) { + case SS_TEST: +#ifdef QL_DEBUG_LEVEL_3 + qla2100_print("qla2100_atio_entry: SS_TEST\n"); +#endif + BZERO(sense_ptr, TARGET_SENSE_SIZE); + len = 0; + if( pkt->lun == 0 ) + pkt->scsi_status = S_GOOD; + else { + *sense_ptr = 0x70; + *(sense_ptr+2) = SD_ILLREQ; + *(sense_ptr+7) = TARGET_SENSE_SIZE-8; + *(sense_ptr+12) = SC_INVLUN; + pkt->scsi_status = S_CKCON; + } + pkt->flags = (uint16_t)(OF_SSTS | OF_INC_RC | OF_NO_DATA); + break; + case SS_REQSEN: +#ifdef QL_DEBUG_LEVEL_3 + qla2100_print("qla2100_atio_entry: SS_REQSEN\n"); +#endif + phy_addr[0] = ha->tsense_dma; + phy_addr[1] = 0; + *a64 += t * TARGET_SENSE_SIZE; + if( pkt->cdb[4] > TARGET_SENSE_SIZE ) + len = TARGET_SENSE_SIZE; + else + len = pkt->cdb[4]; + pkt->scsi_status = S_GOOD; + pkt->flags = (uint16_t)(OF_SSTS | OF_INC_RC | OF_DATA_IN); + break; + case SS_INQUIR: +#ifdef QL_DEBUG_LEVEL_3 + qla2100_print("qla2100_atio_entry: SS_INQUIR\n"); +#endif + BZERO(sense_ptr, TARGET_SENSE_SIZE); + phy_addr[0] = ha->tbuf_dma; + phy_addr[1] = 0; + *a64 += TARGET_INQ_OFFSET; + + if( pkt->lun == 0 ) { + ha->tbuf->inq.id_type = ID_PROCESOR; + ha->tbuf->inq.id_pqual = ID_QOK; + } else { + ha->tbuf->inq.id_type = ID_NODEV; + ha->tbuf->inq.id_pqual = ID_QNOLU; + } + + if( pkt->cdb[4] > sizeof(struct ident) ) + len = sizeof(struct ident); + else + len = pkt->cdb[4]; + pkt->scsi_status = S_GOOD; + pkt->flags = (uint16_t)(OF_SSTS | OF_INC_RC | OF_DATA_IN); + break; + case SM_WRDB: + BZERO(sense_ptr, TARGET_SENSE_SIZE); + offset = pkt->cdb[5]; + offset |= pkt->cdb[4] << 8; + offset |= pkt->cdb[3] << 16; + len = pkt->cdb[8]; + len |= pkt->cdb[7] << 8; + len |= pkt->cdb[6] << 16; + end_addr[0] = phy_addr[0] = ha->tbuf_dma; + end_addr[1] = phy_addr[1] = 0; + *end_a64 += TARGET_DATA_OFFSET + TARGET_DATA_SIZE; + switch( pkt->cdb[1] & 7 ) { + case RW_BUF_HDATA: +#ifdef QL_DEBUG_LEVEL_3 + qla2100_print("qla2100_atio_entry: SM_WRDB, RW_BUF_HDATA\n"); +#endif + if( len > TARGET_DATA_SIZE + 4 ) { +#ifdef QL_DEBUG_LEVEL_2 + qla2100_print("qla2100_atio_entry: SM_WRDB, length > buffer size\n"); +#endif + *sense_ptr = 0x70; + *(sense_ptr+2) = SD_ILLREQ; + *(sense_ptr+7) = TARGET_SENSE_SIZE-8; + *(sense_ptr+12) = SC_ILLCDB; + pkt->scsi_status = S_CKCON; + pkt->flags = (uint16_t)(OF_SSTS | OF_INC_RC | + OF_NO_DATA); + len = 0; + } else if( len ) { + pkt->scsi_status = S_GOOD; + pkt->flags =(uint16_t)(OF_SSTS | OF_INC_RC | + OF_DATA_OUT); + } else { +#ifdef QL_DEBUG_LEVEL_2 + qla2100_print("qla2100_atio_entry: SM_WRDB, zero length\n"); +#endif + pkt->scsi_status = S_GOOD; + pkt->flags = (uint16_t)(OF_SSTS | OF_INC_RC | + OF_NO_DATA); + } + + break; + case RW_BUF_DATA: +#ifdef QL_DEBUG_LEVEL_3 + qla2100_print("qla2100_atio_entry: SM_WRDB, RW_BUF_DATA\n"); +#endif + *a64 += offset + TARGET_DATA_OFFSET; + if( pkt->cdb[2] != 0 || *a64 >= *end_a64 || + *a64 + len > *end_a64 ) { +#ifdef QL_DEBUG_LEVEL_2 + qla2100_print("qla2100_atio_entry: SM_WRDB, RW_BUF_DATA BAD\n"); + qla2100_print("buf_id="); + qla2100_output_number((u_long)pkt->cdb[2], 16); + qla2100_print(", offset="); + qla2100_output_number((u_long)offset, 16); + qla2100_print(", length="); + qla2100_output_number((u_long)len, 16); + qla2100_print("\n"); +#endif + *sense_ptr = 0x70; + *(sense_ptr+2) = SD_ILLREQ; + *(sense_ptr+7) = TARGET_SENSE_SIZE-8; + *(sense_ptr+12) = SC_ILLCDB; + len = 0; + pkt->scsi_status = S_CKCON; + pkt->flags = (uint16_t)(OF_SSTS | OF_INC_RC | + OF_NO_DATA); + } else if( len ) { + pkt->scsi_status = S_GOOD; + pkt->flags =(uint16_t)(OF_SSTS | OF_INC_RC | + OF_DATA_OUT); + } else { +#ifdef QL_DEBUG_LEVEL_2 + qla2100_print("qla2100_atio_entry: SM_WRDB, zero length\n"); +#endif + pkt->scsi_status = S_GOOD; + pkt->flags = (uint16_t)(OF_SSTS | OF_INC_RC | + OF_NO_DATA); + } + break; + default: +#ifdef QL_DEBUG_LEVEL_2 + qla2100_print("qla2100_atio_entry: SM_WRDB unknown mode\n"); +#endif + *sense_ptr = 0x70; + *(sense_ptr+2) = SD_ILLREQ; + *(sense_ptr+7) = TARGET_SENSE_SIZE-8; + *(sense_ptr+12) = SC_ILLCDB; + len = 0; + pkt->scsi_status = S_CKCON; + pkt->flags = (uint16_t)(OF_SSTS | OF_INC_RC | + OF_NO_DATA); + break; + } + break; + case SM_RDDB: + BZERO(sense_ptr, TARGET_SENSE_SIZE); + offset = pkt->cdb[5]; + offset |= pkt->cdb[4] << 8; + offset |= pkt->cdb[3] << 16; + len = pkt->cdb[8]; + len |= pkt->cdb[7] << 8; + len |= pkt->cdb[6] << 16; + end_addr[0] = phy_addr[0] = ha->tbuf_dma; + end_addr[1] = phy_addr[1] = 0; + *end_a64 += TARGET_DATA_OFFSET + TARGET_DATA_SIZE; + switch( pkt->cdb[1] & 7 ) { + case RW_BUF_HDATA: +#ifdef QL_DEBUG_LEVEL_3 + qla2100_print("qla2100_atio_entry: SM_RDDB, RW_BUF_HDATA\n"); +#endif + if( len ) { + ha->tbuf->hdr[0] = 0; + ha->tbuf->hdr[1] = + (uint8_t)(TARGET_DATA_SIZE >> 16); + ha->tbuf->hdr[2] = + (uint8_t)(TARGET_DATA_SIZE >> 8); + ha->tbuf->hdr[3] = (uint8_t)TARGET_DATA_SIZE; + if( len > TARGET_DATA_SIZE + 4 ) + len = TARGET_DATA_SIZE + 4; + pkt->scsi_status = S_GOOD; + pkt->flags = (uint16_t)(OF_SSTS | OF_INC_RC | + OF_DATA_IN); + } else { +#ifdef QL_DEBUG_LEVEL_2 + qla2100_print("qla2100_atio_entry: SM_RDDB, zero length\n"); +#endif + pkt->scsi_status = S_GOOD; + pkt->flags = (uint16_t)(OF_SSTS | OF_INC_RC | + OF_NO_DATA); + } + break; + case RW_BUF_DATA: +#ifdef QL_DEBUG_LEVEL_3 + qla2100_print("qla2100_atio_entry: SM_RDDB, RW_BUF_DATA\n"); +#endif + *a64 += offset + TARGET_DATA_OFFSET; + if( pkt->cdb[2] != 0 || *a64 >= *end_a64 ) { +#ifdef QL_DEBUG_LEVEL_2 + qla2100_print("qla2100_atio_entry: SM_RDDB, RW_BUF_DATA BAD\n"); + qla2100_print("buf_id="); + qla2100_output_number((u_long)pkt->cdb[2], 16); + qla2100_print(", offset="); + qla2100_output_number((u_long)offset, 16); + qla2100_print("\n"); +#endif + *sense_ptr = 0x70; + *(sense_ptr+2) = SD_ILLREQ; + *(sense_ptr+7) = TARGET_SENSE_SIZE-8; + *(sense_ptr+12) = SC_ILLCDB; + len = 0; + pkt->scsi_status = S_CKCON; + pkt->flags = (uint16_t)(OF_SSTS | OF_INC_RC | + OF_NO_DATA); + } else { + if( *a64 + len > *end_a64 ) + len = *end_a64 - *a64; + if( len ) { + pkt->scsi_status = S_GOOD; + pkt->flags = (uint16_t)(OF_SSTS | + OF_INC_RC | OF_DATA_IN); + } else { +#ifdef QL_DEBUG_LEVEL_2 + qla2100_print("qla2100_atio_entry: SM_RDDB, zero length\n"); +#endif + pkt->scsi_status = S_GOOD; + pkt->flags = (uint16_t)(OF_SSTS | + OF_INC_RC | OF_NO_DATA); + } + } + break; + case RW_BUF_DESC: +#ifdef QL_DEBUG_LEVEL_3 + qla2100_print("qla2100_atio_entry: SM_RDDB, RW_BUF_DESC\n"); +#endif + if( len ) { + if( len > 4 ) + len = 4; + + ha->tbuf->hdr[0] = 0; + if( pkt->cdb[2] != 0 ) { + ha->tbuf->hdr[1] = 0; + ha->tbuf->hdr[2] = 0; + ha->tbuf->hdr[3] = 0; + } else { + ha->tbuf->hdr[1] = + (uint8_t)(TARGET_DATA_SIZE >> 16); + ha->tbuf->hdr[2] = + (uint8_t)(TARGET_DATA_SIZE >> 8); + ha->tbuf->hdr[3] = + (uint8_t)TARGET_DATA_SIZE; + } + pkt->scsi_status = S_GOOD; + pkt->flags = (uint16_t)(OF_SSTS | OF_INC_RC | + OF_DATA_IN); + } else { +#ifdef QL_DEBUG_LEVEL_2 + qla2100_print("qla2100_atio_entry: SM_RDDB, zero length\n"); +#endif + pkt->scsi_status = S_GOOD; + pkt->flags = (uint16_t)(OF_SSTS | OF_INC_RC | + OF_NO_DATA); + } + break; + default: +#ifdef QL_DEBUG_LEVEL_2 + qla2100_print("qla2100_atio_entry: SM_RDDB unknown mode\n"); +#endif + *sense_ptr = 0x70; + *(sense_ptr+2) = SD_ILLREQ; + *(sense_ptr+7) = TARGET_SENSE_SIZE-8; + *(sense_ptr+12) = SC_ILLCDB; + len = 0; + pkt->scsi_status = S_CKCON; + pkt->flags = (uint16_t)(OF_SSTS | OF_INC_RC | + OF_NO_DATA); + break; + } + break; + default: +#ifdef QL_DEBUG_LEVEL_2 + qla2100_print("qla2100_atio_entry: Unknown SCSI command\n"); + qla2100_dump_buffer((uint8_t *)&pkt->cdb[0], MAX_CMDSZ); +#endif + BZERO(sense_ptr, TARGET_SENSE_SIZE); + *sense_ptr = 0x70; + *(sense_ptr+2) = SD_ILLREQ; + *(sense_ptr+7) = TARGET_SENSE_SIZE-8; + *(sense_ptr+12) = SC_INVOPCODE; + len = 0; + pkt->scsi_status = S_CKCON; + pkt->flags = (uint16_t)(OF_SSTS | OF_INC_RC | OF_NO_DATA); + break; + } +#if LINUX_VERSION_CODE >= KERNEL_VERSION(2,3,18) + if ( ha->flags.enable_64bit_addressing ) + qla2100_64bit_continue_io(ha, pkt, len, &phy_addr); + else +#endif + qla2100_32bit_continue_io(ha, pkt, len, &phy_addr); + break; + default: + break; + } + +#ifdef QL_DEBUG_LEVEL_3 + LEAVE("qla2100_atio_entry: exiting normally\n"); +#endif +} +#endif /* QLA2100_TARGET_MODE_SUPPORT */ + +/* +* qla2100_status_entry +* Processes received ISP status entry. +* +* Input: +* ha = adapter block pointer. +* pkt = entry pointer. +* done_q_first = done queue first pointer. +* done_q_last = done queue last pointer. +*/ +STATIC void +qla2100_status_entry(scsi_qla_host_t *ha, sts_entry_t *pkt, srb_t **done_q_first, + srb_t **done_q_last) { + uint32_t b, t, l; + uint8_t sense_sz = 0; + srb_t *sp, *sp2; + scsi_lu_t *q; + Scsi_Cmnd *cp; + +#ifdef QL_DEBUG_LEVEL_3 + ENTER("qla2100_status_entry"); +#endif + /* Validate handle. */ + if( pkt->handle < MAX_OUTSTANDING_COMMANDS ) + sp = ha->outstanding_cmds[pkt->handle]; + else + sp = 0; + + if( sp ) { + /* Free outstanding command slot. */ + ha->outstanding_cmds[pkt->handle] = 0; + cp = sp->cmd; + sp->ccode = pkt->comp_status; + sp->scode = pkt->scsi_status; + + sp->flags &= ~SRB_SENT; + /* Generate LU queue on cntrl, target, LUN */ + b = SCSI_BUS_32(cp); + t = SCSI_TCN_32(cp); + l = SCSI_LUN_32(cp); + q = GET_LU_Q(ha, b, t, l); + + /* Target busy */ + if( pkt->scsi_status & SS_BUSY_CONDITION && + (uint8_t)pkt->scsi_status != SS_RESERVE_CONFLICT ) { +#ifdef QL_DEBUG_LEVEL_2 + qla2100_print("qla2100_status_entry: SCSI busy status, scsi("); + qla2100_output_number((u_long)ha->host_no, 10); + qla2100_print(":"); + qla2100_output_number((u_long)b, 10); + qla2100_print(":"); + qla2100_output_number((u_long)t, 10); + qla2100_print(":"); + qla2100_output_number((u_long)l, 10); + qla2100_print(")\n"); +#endif + sp->retry_count--; + CMD_RESULT(cp) = (int) (DID_BUS_BUSY << 16) | + (pkt->scsi_status & 0xff); + + } +#if 0 + /* dg - 03/30 */ + else if( ha->loop_down_timer ) { +#endif + else if( ha->loop_down_timer || + ha->loop_state != LOOP_READY ) { +#ifdef QL_DEBUG_LEVEL_3 + qla2100_print("scsi("); + qla2100_output_number((u_long)ha->host_no, 10); + qla2100_print(":"); + qla2100_output_number((u_long)b, 10); + qla2100_print(":"); + qla2100_output_number((u_long)t, 10); + qla2100_print(":"); + qla2100_output_number((u_long)l, 10); + qla2100_print("): Loop Not ready - pid ="); + qla2100_output_number((u_long)sp->cmd->pid, 16); + qla2100_print("\n"); +#endif + CMD_RESULT(cp) = (int) (DID_BUS_BUSY << 16); + } else if( sp->port_down_retry_count > 1 && + (pkt->comp_status == CS_PORT_UNAVAILABLE || + pkt->comp_status == CS_PORT_LOGGED_OUT || + pkt->comp_status == CS_PORT_CONFIG_CHG || + pkt->comp_status == CS_PORT_BUSY) ) { + /* if the port is unavaliable and we haven't exceeded the port down count */ + /* then send command back to the mid-level. */ +#ifdef QL_DEBUG_LEVEL_2 + qla2100_print("scsi("); + qla2100_output_number((u_long)ha->host_no, 10); + qla2100_print(":"); + qla2100_output_number((u_long)b, 10); + qla2100_print(":"); + qla2100_output_number((u_long)t, 10); + qla2100_print(":"); + qla2100_output_number((u_long)l, 10); + qla2100_print("): Port Down Retry Cnt =("); + qla2100_output_number((u_long)sp->port_down_retry_count, 10); + qla2100_print("): , pid ="); + qla2100_output_number((u_long)sp->cmd->pid, 16); + qla2100_print(", status ="); + qla2100_output_number((u_long)pkt->comp_status, 16); + qla2100_print("\n"); +#endif + sp->port_down_retry_count--; + + /* dg 08/17/99 + * Force the SCSI layer to keep retrying until our + * port_down_retry_count expire. They will normally + * try and reset the bus after half the retries + * have completed, so double the count. + */ + CMD_RESULT(sp->cmd) = DID_BUS_BUSY << 16; + + /* Acquire target queue lock */ + if( !(q->q_flag & QLA2100_QSUSP) ) { + q->q_flag |= QLA2100_QSUSP; /* suspend starting new commands */ + + /* Decrement port down count on all pending commands. */ + /* and return them back to OS. */ + for( sp2 = q->q_first; sp2; sp2 = sp2->s_next ) { +#if 0 + if( sp2->port_down_retry_count ) /* dg - v4.31.4 */ + sp2->port_down_retry_count--; +#endif + /* v2.19.14 - unconditionally retry these + * requests. + */ + CMD_RESULT(sp2->cmd) = DID_BUS_BUSY << 16; + qla2100_callback(ha,sp2, TRUE); + } + q->q_first = q->q_last = NULL; + /* if port timer is not active then start it */ + if( !ha->queue_restart_timer ) { + ha->queue_restart_timer = PORT_RETRY_TIME; + } + if( TGT_Q(ha, b, t)->down_timer == 0 ) { + TGT_Q(ha, b, t)->down_timer = + ha->port_down_retry_count * PORT_RETRY_TIME; + } + } + + /* Release LU queue specific lock */ + } else { +#ifdef QL_DEBUG_LEVEL_2 + if( pkt->comp_status ) { + qla2100_print( + "qla2100_status_entry: Compl error = "); + qla2100_output_number((u_long)pkt->comp_status, 16); + qla2100_print(", scsi("); + qla2100_output_number((u_long)ha->host_no, 10); + qla2100_print(":"); + qla2100_output_number((u_long)b, 10); + qla2100_print(":"); + qla2100_output_number((u_long)t, 10); + qla2100_print(":"); + qla2100_output_number((u_long)l, 10); + qla2100_print("), retry count= "); + qla2100_output_number((u_long)sp->port_down_retry_count, 10); + qla2100_print(", pid = "); + qla2100_output_number((u_long)cp->pid, 16); + qla2100_print("\n"); + } +#endif + /* Set ISP completion status and target status byte. */ + CMD_RESULT(cp) = qla2100_return_status(ha, pkt, cp); + + memset((caddr_t)cp->sense_buffer, 0,sizeof(cp->sense_buffer)); + if( pkt->scsi_status & SS_CHECK_CONDITION ) { + /* Mid-level always zero sense buffer before giving it to us */ + if( pkt->scsi_status & SS_SENSE_LEN_VALID ) { + if( pkt->req_sense_length < CMD_SNSLEN(cp) ) + sense_sz = pkt->req_sense_length; + else + sense_sz = CMD_SNSLEN(cp) - 1; + + BCOPY((caddr_t)&pkt->req_sense_data, cp->sense_buffer, sense_sz); + + } + +#ifdef QL_DEBUG_LEVEL_2 + qla2100_print( + "qla2100_status_entry: Check condition Sense data, scsi("); + qla2100_output_number((u_long)ha->host_no, 10); + qla2100_print(":"); + qla2100_output_number((u_long)b, 10); + qla2100_print(":"); + qla2100_output_number((u_long)t, 10); + qla2100_print(":"); + qla2100_output_number((u_long)l, 10); + qla2100_print(")\n"); + if( sense_sz ) + qla2100_dump_buffer(cp->sense_buffer, sense_sz); +#endif + } + } + /* Place command on done queue. */ + qla2100_done_q_put(ha, sp, done_q_first, done_q_last); + } else { +#ifdef QL_DEBUG_LEVEL_2 + qla2100_print("qla2100_status_entry: ISP Invalid handle\n"); +#endif + printk(KERN_WARNING "!qla2100: Status Entry invalid handle"); + ha->flags.isp_abort_needed = TRUE; + } +#ifdef QL_DEBUG_LEVEL_3 + LEAVE("qla2100_status_entry"); +#endif +} + +/* +* qla2100_error_entry +* Processes error entry. +* +* Input: +* ha = adapter block pointer. +* pkt = entry pointer. +* done_q_first = done queue first pointer. +* done_q_last = done queue last pointer. +*/ +STATIC void +qla2100_error_entry(scsi_qla_host_t *ha, response_t *pkt, srb_t **done_q_first, + srb_t **done_q_last) { + srb_t *sp; + +#ifdef QL_DEBUG_LEVEL_3 + ENTER("qla2100_error_entry"); +#endif + +#ifdef QL_DEBUG_LEVEL_2 + if( pkt->entry_status & BIT_5 ) + qla2100_print("qla2100_error_entry: Invalid Entry Order\n"); + else if( pkt->entry_status & BIT_4 ) + qla2100_print("qla2100_error_entry: Invalid Entry Count\n"); + else if( pkt->entry_status & BIT_3 ) + qla2100_print("qla2100_error_entry: Invalid Entry Parameter\n"); + else if( pkt->entry_status & BIT_2 ) + qla2100_print("qla2100_error_entry: Invalid Entry Type\n"); + else if( pkt->entry_status & BIT_1 ) + qla2100_print("qla2100_error_entry: Busy\n"); + else + qla2100_print("qla2100_error_entry: UNKNOWN flag error\n"); +#endif + + /* Validate handle. */ + if( pkt->handle < MAX_OUTSTANDING_COMMANDS ) + sp = ha->outstanding_cmds[pkt->handle]; + else + sp = 0; + + if( sp ) { + /* Free outstanding command slot. */ + ha->outstanding_cmds[pkt->handle] = 0; + + sp->flags &= ~SRB_SENT; + /* Bad payload or header */ + if( pkt->entry_status & (BIT_5 + BIT_4 + BIT_3 + BIT_2) ) { + /* Bad payload or header, set error status. */ + CMD_RESULT(sp->cmd) = (int) DID_ERROR << 16; + + } else if( pkt->entry_status & BIT_1 && sp->retry_count ) /* FULL flag */ + { + sp->retry_count--; + CMD_RESULT(sp->cmd) = (int) DID_BUS_BUSY << 16; + } else { + /* Set error status. */ + CMD_RESULT(sp->cmd) =(int) DID_ERROR << 16; + } + /* Place command on done queue. */ + qla2100_done_q_put(ha, sp, done_q_first, done_q_last); + } else if( pkt->entry_type == COMMAND_A64_TYPE || + pkt->entry_type == COMMAND_TYPE ) { +#ifdef QL_DEBUG_LEVEL_2 + qla2100_print("qla2100_error_entry: ISP Invalid handle\n"); +#endif + printk(KERN_WARNING "!qla2100: Error Entry invalid handle"); + ha->flags.isp_abort_needed = TRUE; + } + +#ifdef QL_DEBUG_LEVEL_3 + LEAVE("qla2100_error_entry"); +#endif +} + +/* +* qla2100_abort_isp +* Resets ISP and aborts all outstanding commands. +* +* Input: +* ha = adapter block pointer. +* +* Returns: +* 0 = success +*/ +STATIC uint8_t +qla2100_abort_isp(scsi_qla_host_t *ha) { + uint16_t cnt; + srb_t *sp; + scsi_lu_t *q; + uint32_t b, t, l; +#if LINUX_VERSION_CODE < KERNEL_VERSION(2,1,95) + unsigned long cpu_flags = 0; +#endif + uint8_t status = 0; + + ENTER("qla2100_abort_isp"); + + DRIVER_LOCK + ha->flags.isp_abort_needed = FALSE; + if( !ha->flags.abort_isp_active && ha->flags.online ) { + ha->flags.abort_isp_active = TRUE; + ha->flags.online = FALSE; + ha->dpc_flags &= ~COMMAND_WAIT_NEEDED; + ha->dpc_flags &= ~COMMAND_WAIT_ACTIVE; + qla2100_stats.ispAbort++; + ha->isp_aborts++; + ha->sns_retry_cnt = 0; + printk(KERN_INFO + "qla2100: Performing ISP error recovery - ha= %p\n", + (void *) ha); + qla2100_reset_chip(ha); + + if( ha->loop_state != LOOP_DOWN ) { + ha->loop_state = LOOP_DOWN; + ha->loop_down_timer = LOOP_DOWN_TIME; + } + +#ifdef FC_IP_SUPPORT + /* Return all IP send packets */ + for (cnt = 0; cnt < MAX_SEND_PACKETS; cnt++) { + if (ha->apActiveIpQueue[cnt] != NULL) { + (*ha->pSendCompletionRoutine)(ha->apActiveIpQueue[cnt]); + + ha->apActiveIpQueue[cnt] = NULL; + } + } +#endif + + /* Requeue all commands in outstanding command list. */ + for( cnt = 1; cnt < MAX_OUTSTANDING_COMMANDS; cnt++ ) { + sp = ha->outstanding_cmds[cnt]; + if( sp ) { + ha->outstanding_cmds[cnt] = 0; + /* Generate LU queue on controller, target, LUN */ + b = SCSI_BUS_32(sp->cmd); + t = SCSI_TCN_32(sp->cmd); + l = SCSI_LUN_32(sp->cmd); + if ((q = (scsi_lu_t *)GET_LU_Q(ha, b, t, l))) { + /* Reset outstanding command count. */ + q->q_outcnt = 0; + q->q_flag &= ~QLA2100_QBUSY; + } + /* sp->flags &= ~(SRB_SENT | SRB_TIMEOUT); */ + sp->flags = 0; + /* we need to send the command back to OS */ + CMD_RESULT(sp->cmd) = DID_BUS_BUSY << 16; + CMD_HANDLE(sp->cmd) = (unsigned char *) NULL; + qla2100_done_q_put(ha, sp, (srb_t **)&ha->done_q_first, (srb_t **)&ha->done_q_last); + } + } + + if( ha->device_id == QLA2100_DEVICE_ID ) + qla2100_nvram_config(ha); + else + qla2200_nvram_config(ha); + + /* v2.19.12 */ + ha->retry_count = ql2xretrycount; + if( !qla2100_configure_loop(ha, TRUE) ) { + ha->flags.reset_marker = FALSE; + + if( !ha->loop_down_timer ) + qla2100_marker(ha, 0, 0, 0, MK_SYNC_ALL); + + ha->flags.online = TRUE; + + /* Enable target response to SCSI bus. */ + if( ha->flags.enable_target_mode ) + qla2100_enable_lun(ha); + +#ifdef FC_IP_SUPPORT + /* Reenable IP support */ + if (ha->flags.enable_ip) + qla2x00_ip_initialize(ha); +#endif + /* Enable ISP interrupts. */ + qla2100_enable_intrs(ha); + + /* v2.19.5b6 Return all commands */ + qla2100_abort_queues(ha, TRUE); + + /* Restart queues that may have been stopped. */ + ha->flags.abort_isp_active = FALSE; + /* 6/9 if( !ha->loop_down_timer ) */ + qla2100_restart_queues(ha,TRUE); + } else { + printk(KERN_WARNING + "qla2100: ISP error recovery failed, board disabled"); + qla2100_reset_adapter(ha); + qla2100_abort_queues(ha, FALSE); + } + } + +#if defined(QL_DEBUG_LEVEL_2) || defined(QL_DEBUG_LEVEL_3) + if( status ) + qla2100_print("qla2100_abort_isp: **** FAILED ****\n"); +#endif +#ifdef QL_DEBUG_LEVEL_3 + else + LEAVE("qla2100_abort_isp"); +#endif + return(status); +} +/* +* qla2100_restart_watchdog_queue +* Restart device queues. +* +* Input: +* ha = adapter block pointer. +*/ +STATIC void +qla2100_restart_watchdog_queue(scsi_qla_host_t *ha) { + srb_t *sp, *sp_next; + + for( sp = ha->retry_q_first; (sp); sp = sp_next ) { + sp_next = sp->s_next; + /* when time expire return request back to OS as BUSY */ + qla2100_timeout_remove(ha, sp); + CMD_RESULT(sp->cmd) = DID_BUS_BUSY << 16; + CMD_HANDLE(sp->cmd) = (unsigned char *) NULL; + qla2100_done_q_put(ha, sp, (srb_t **)&ha->done_q_first, (srb_t **)&ha->done_q_last); + } + +} + +/* +* qla2100_restart_queues +* Restart device queues. +* +* Input: +* ha = adapter block pointer. +*/ +STATIC void +qla2100_restart_queues(scsi_qla_host_t *ha, uint8_t flush) { + scsi_lu_t *q; + uint32_t b, t, l; + srb_t *sp, *sp_next; + srb_t *done_q_first = (srb_t *) NULL; + srb_t *done_q_last = (srb_t *) NULL; + int cnt; + unsigned long cpu_flags = 0; + +#ifdef QL_DEBUG_LEVEL_3 + ENTER("qla2100_restart_queues"); +#endif + + ha->flags.restart_queues_needed = FALSE; + + /* + * start all queues working again. + */ + for( b = 0; b < MAX_BUSES; b++ ) + for( t = 0; t < ha->max_targets; t++ ) { + if( TGT_Q(ha, b, t) == NULL ) + continue; + for( l = 0; l < ha->max_luns; l++ ) { + q = (scsi_lu_t *) GET_LU_Q(ha, b, t, l); + if( q != NULL ) { + q->q_flag &= ~QLA2100_QSUSP; + if( q->q_first ) + qla2100_next(ha, q); + } + } + } + + /* + * Clear out our retry queue + */ + if( flush ) { + for( sp = ha->retry_q_first; (sp); sp = sp_next ) { + sp_next = sp->s_next; + /* when time expire return request back to OS as BUSY */ + qla2100_timeout_remove(ha, sp); + CMD_RESULT(sp->cmd) = DID_BUS_BUSY << 16; + CMD_HANDLE(sp->cmd) = (unsigned char *) NULL; + qla2100_done_q_put(ha, sp, (srb_t **)&done_q_first, (srb_t **)&done_q_last); + } + + /* Callback everything in done queue */ + cnt = 0; + while( done_q_first ) { + QLA2100_TIMER_LOCK(ha); + /* remove command from done list */ + sp = done_q_first; + if( !(done_q_first = sp->s_next) ) + done_q_last = NULL; + else + (done_q_first)->s_prev = NULL; + cnt++; + qla2100_stats.done_q_cnt--; + DEBUG(sp->state = 5;) + QLA2100_TIMER_UNLOCK(ha); + /* DEBUG(sprintf(debug_buff, + "qla2100_restart_queues: callback pid %d\n", + sp->cmd->pid);) + DEBUG(qla2100_print(debug_buff);) */ + qla2100_callback(ha,sp,FALSE); + } + DEBUG(sprintf(debug_buff,"qla2100_restart_queues: callback %d commands.\n",cnt);) + DEBUG(qla2100_print(debug_buff);) + } + +#ifdef QL_DEBUG_LEVEL_3 + LEAVE("qla2100_restart_queues"); +#endif +} + +/* +* qla2100_abort_queues +* Abort all commands on device queues. +* +* Input: +* ha = adapter block pointer. +*/ +STATIC void +qla2100_abort_queues(scsi_qla_host_t *ha, uint8_t doneqflg) { + scsi_lu_t *q; + uint32_t b, t, l; + srb_t *sp, *sp_next; + +#ifdef QL_DEBUG_LEVEL_3 + ENTER("qla2100_abort_queues"); +#endif + ha->flags.abort_queue_needed = FALSE; + + for( b = 0; b < MAX_BUSES; b++ ) + for( t = 0; t < ha->max_targets; t++ ) { + if( TGT_Q(ha, b, t) == NULL ) + continue; + for( l = 0; l < MAX_LUNS; l++ ) { + q = GET_LU_Q(ha, b, t, l); + if( q != NULL ) { + /* Try to acquire LU queue specific lock */ + /* if( queue is not busy ) + { */ + sp = q->q_first; + q->q_first = q->q_last = NULL; + + while( sp ) { + q->q_incnt--; + sp_next = sp->s_next; + CMD_RESULT(sp->cmd) = DID_BUS_BUSY << 16; + if ( doneqflg ) { + CMD_HANDLE(sp->cmd) = (unsigned char *) NULL; + qla2100_done_q_put(ha, sp, (srb_t **)&ha->done_q_first, (srb_t **)&ha->done_q_last); + } else + qla2100_callback(ha,sp,FALSE); + sp = sp_next; + } + /* } + else + ha->flags.abort_queue_needed = TRUE; + */ + } + } + } + +#ifdef QL_DEBUG_LEVEL_3 + LEAVE("qla2100_abort_queues"); +#endif +} + +/* +* qla2100_update_config +* Restart RISC in order to update the connection mode. +* +* Input: +* ha = adapter block pointer. +* +* Returns: +* 0 = success +*/ +uint8_t +qla2100_update_config(scsi_qla_host_t *ha) { + uint8_t status = 0; + +#ifdef QL_DEBUG_LEVEL_3 + qla2100_print("qla2100_update_config: entered\n"); +#endif + /* Turn-off flag, so we don't get called again */ + ha->flags.update_config_needed = FALSE; + + /* get the new topology */ + qla2100_configure_hba(ha); + + ha->init_cb->additional_firmware_options.connection_options = ha->operating_mode; + DEBUG(printk("qla2100_update_config: Setting new topology to %d\n" , ha->operating_mode);) + + qla2100_reset_chip(ha); + + if( ha->loop_state != LOOP_DOWN ) { + ha->loop_state = LOOP_DOWN; + ha->loop_down_timer = LOOP_DOWN_TIME; + } + + if( !(status = qla2100_configure_loop(ha, TRUE)) ) { + ha->flags.reset_marker = FALSE; + if( !ha->loop_down_timer ) + qla2100_marker(ha, 0, 0, 0, MK_SYNC_ALL); + + ha->flags.online = TRUE; + + /* Enable target response to SCSI bus. */ + if( ha->flags.enable_target_mode ) + qla2100_enable_lun(ha); + + } + + /* Enable ISP interrupts. */ + qla2100_enable_intrs(ha); + /* WRT_REG_WORD(®->ictrl, ISP_EN_INT + ISP_EN_RISC); */ +#if defined(QL_DEBUG_LEVEL_2) || defined(QL_DEBUG_LEVEL_3) + if( status ) + qla2100_print("qla2100_update_config: **** FAILED ****\n"); +#endif +#ifdef QL_DEBUG_LEVEL_3 + else + qla2100_print("qla2100_update_config: exiting normally\n"); +#endif + return(status); +} + +/* +* qla2100_loop_resync +* Resync with fibre channel devices. +* +* Input: +* ha = adapter block pointer. +* +* Returns: +* 0 = success +*/ +STATIC uint8_t +qla2100_loop_resync(scsi_qla_host_t *ha) { + uint8_t status; + +#ifdef QL_DEBUG_LEVEL_3 + ENTER("qla2100_loop_resync"); +#endif + + ha->loop_state = LOOP_UPDATE; + if( ha->flags.online && !ha->flags.loop_resync_active && + !ha->flags.abort_isp_active ) { + ha->flags.loop_resync_active = TRUE; + if( !(status = qla2100_fw_ready(ha)) ) { + do { + ha->flags.loop_resync_needed = FALSE; + /* v2.19.05b6 */ + ha->loop_state = LOOP_UPDATE; + + /* Issue marker command. */ + qla2100_marker(ha, 0, 0, 0, MK_SYNC_ALL); + + /* Remap devices on Loop. */ + qla2100_update_fc_db(ha, TRUE); + + }while( !ha->loop_down_timer && ha->flags.loop_resync_needed ); + } + ha->flags.loop_resync_active = FALSE; + /* v2.19 - we don't want to call this if we are already + * in the loop resync code + */ + qla2100_restart_queues(ha,TRUE); + } else + status = 0; + + /* Restart queues that may have been stopped. */ + /* 04/10 if( !ha->loop_down_timer ) { + qla2100_restart_queues(ha,TRUE); + } */ + /* v2.19 */ + /* deleted qla2100_restart_queues(ha,TRUE); */ + +#if defined(QL_DEBUG_LEVEL_2) || defined(QL_DEBUG_LEVEL_3) + if( status ) + qla2100_print("qla2100_loop_resync: **** FAILED ****\n"); +#endif +#ifdef QL_DEBUG_LEVEL_3 + else + LEAVE("qla2100_loop_resync"); +#endif + return(status); +} + +/* +* qla2100_debounce_register +* Debounce register. +* +* Input: +* port = register address. +* +* Returns: +* register value. +*/ +STATIC uint16_t +qla2100_debounce_register(volatile uint16_t *addr) { + volatile uint16_t ret; + volatile uint16_t ret2; + + do { + ret = RD_REG_WORD(addr); + ret2 = RD_REG_WORD(addr); + }while( ret != ret2 ); + + return(ret); +} + +/* qla2100_cmd_wait +* Stall driver until all outstanding commands are returned. +* +* Input: +* ha = adapter state pointer. +* +* Return; +* 0 -- Done +* 1 -- continue; +* +* Context: +* Kernel context. +*/ +STATIC uint8_t +qla2100_cmd_wait(scsi_qla_host_t *ha) { + uint16_t index; + uint8_t stat = 1; + + ENTER("qla2200_cmd_wait: started\n"); + + /* Wait for all outstanding commands to be returned. */ + for (index = 1; index < MAX_OUTSTANDING_COMMANDS; index++) { + if (ha->outstanding_cmds[index] == NULL) + continue; + + /* if command not completed then wait for it */ + if (ha->flags.isp_abort_needed){ + stat = 0; + break; + } + + if( (ha->dpc_flags & COMMAND_WAIT_ACTIVE) && + ha->cmd_wait_cnt-- == 0 ) { + ha->flags.isp_abort_needed = TRUE; + DEBUG(printk("qla2200_cmd_wait: ISP abort %d\n",index);) + } else { + ha->cmd_wait_cnt = 30; + ha->dpc_flags |= COMMAND_WAIT_ACTIVE; + } + + DEBUG5( if( (ha->dpc_flags & COMMAND_WAIT_ACTIVE) ) ) + DEBUG5(printk("qla2200_cmd_wait: on handle %d - cnt %d\n",index,ha->cmd_wait_cnt);) + + } + + if (index == MAX_OUTSTANDING_COMMANDS || + ha->flags.isp_abort_needed) { + ha->dpc_flags &= ~COMMAND_WAIT_NEEDED; + ha->dpc_flags &= ~COMMAND_WAIT_ACTIVE; + stat = 0; + } + return( stat ); +} + +/* +* qla2100_reset_chip +* Reset ISP chip. +* +* Input: +* ha = adapter block pointer. +*/ +STATIC void +qla2100_reset_chip(scsi_qla_host_t *ha) { + uint32_t cnt; + device_reg_t *reg = ha->iobase; + +#ifdef QL_DEBUG_LEVEL_3 + ENTER("qla2100_reset_chip"); +#endif + + /* Disable ISP interrupts. */ + qla2100_disable_intrs(ha); + /* WRT_REG_WORD(®->ictrl, 0); */ + +#if 1 + /* Pause RISC. */ + WRT_REG_WORD(®->host_cmd, HC_PAUSE_RISC); + for (cnt = 0; cnt < 30000; cnt++) { + if ((RD_REG_WORD(®->host_cmd) & HC_RISC_PAUSE) != 0) + break; + else + udelay(100); + } + + /* Select FPM registers. */ + WRT_REG_WORD(®->ctrl_status, 0x20); + + /* FPM Soft Reset. */ + WRT_REG_WORD(®->fpm_diag_config, 0x100); + + /* Select frame buffer registers. */ + WRT_REG_WORD(®->ctrl_status, 0x10); + + /* Reset frame buffer FIFOs. */ + WRT_REG_WORD(®->fb_cmd, 0xa000); + + /* Select RISC module registers. */ + WRT_REG_WORD(®->ctrl_status, 0); + + /* Reset RISC module. */ + WRT_REG_WORD(®->host_cmd, HC_RESET_RISC); + + /* Reset ISP semaphore. */ + WRT_REG_WORD(®->semaphore, 0); + + /* Release RISC module. */ + WRT_REG_WORD(®->host_cmd, HC_RELEASE_RISC); + + /* Wait for RISC to recover from reset. */ + for (cnt = 0; cnt < 30000; cnt++) { + if (RD_REG_WORD(®->mailbox0) != MBS_BUSY) + break; + else + udelay(100); + } + + /* Disable RISC pause on FPM parity error. */ + WRT_REG_WORD(®->host_cmd, HC_DISABLE_PARITY_PAUSE); +#else + /* Insure mailbox registers are free. */ + WRT_REG_WORD(®->semaphore, 0); + WRT_REG_WORD(®->host_cmd, HC_CLR_RISC_INT); + WRT_REG_WORD(®->host_cmd, HC_CLR_HOST_INT); + + /* clear mailbox busy */ + ha->flags.mbox_busy = FALSE; + + /* Reset ISP chip. */ + WRT_REG_WORD(®->ctrl_status, ISP_RESET); + + /* + * Delay after reset, for chip to recover. + * Otherwise causes system PANIC + */ + mdelay(2); + + for( cnt = 30000; cnt; cnt-- ) { + if( !(RD_REG_WORD(®->ctrl_status) & ISP_RESET) ) + break; + udelay(100); + } + + /* Reset RISC processor. */ + WRT_REG_WORD(®->host_cmd, HC_RESET_RISC); + WRT_REG_WORD(®->host_cmd, HC_RELEASE_RISC); + for( cnt = 30000; cnt; cnt-- ) { + if( RD_REG_WORD(®->mailbox0) != MBS_BUSY ) + break; + udelay(100); + } +#endif + +#ifdef QL_DEBUG_LEVEL_3 + LEAVE("qla2100_reset_chip"); +#endif +} + + +#ifdef RCSN +/* +* qla2100_device_resync +* Marks devices in the database that needs resynchronization. +* +* Input: +* ha = adapter block pointer. +* +* Context: +* Kernel context. +*/ +STATIC void +qla2100_device_resync(scsi_qla_host_t *ha) { + uint16_t index; + uint32_t mask; + rscn_t dev; + port_id_t p; + + ENTERT("qla2100_device_resync:"); + while (ha->rscn_out_ptr != ha->rscn_in_ptr || + ha->device_flags & RSCN_QUEUE_OVERFLOW) { + INTR_LOCK(ha); + BCOPY(&ha->rscn_queue[ha->rscn_out_ptr], + &dev, sizeof (rscn_t)); + + ha->rscn_out_ptr++; + if (ha->rscn_out_ptr == MAX_RSCN_COUNT) + ha->rscn_out_ptr = 0; + + /* Queue overflow, set switch default case. */ + if (ha->device_flags & RSCN_QUEUE_OVERFLOW) { + dev.format = 3; + ha->device_flags = ha->device_flags & ~RSCN_QUEUE_OVERFLOW; + } + + switch (dev.format) { + case 0: + mask = 0xffffff; + break; + case 1: + mask = 0xffff00; + break; + case 2: + mask = 0xff0000; + break; + default: + mask = 0x0; + dev.d_id.b24 = 0; + ha->rscn_out_ptr = ha->rscn_in_ptr; + break; + } + INTR_UNLOCK(ha); + + for (index = 0; index < MAX_FIBRE_DEVICES; index++) { + p.b.b24 = dev.d_id.b24; + if (ha->fc_db[index].flags & DEV_PUBLIC && + ha->fc_db[index].port_id[2] == p.r.port_id[2] && + ha->fc_db[index].port_id[1] == p.r.port_id[1] && + ha->fc_db[index].port_id[0] == p.r.port_id[0] ) + if (ha->fc_db[index].loop_id <= SNS_LAST_LOOP_ID) + printk(KERN_INFO "qla2100_device_resync: %d:%d:%d\n", + ha->fc_db[index].port_id[2] , + ha->fc_db[index].port_id[1] , + ha->fc_db[index].port_id[0] ) + ha->fc_db[index].flags |= DEV_MISSING; + } + } + } + + LEAVE("qla2100_device_resync: exiting normally"); +} +#endif /* RCSN */ + +#ifdef GET_PORT_INFO + +/* +* qla2100_get_port_database +* Issue enhanced get port database mailbox command +* and copy device name as necessary. +* +* Input: +* ha = adapter state pointer. +* dev = structure pointer. +* opt = mailbox 1 option byte. +* +* Returns: +* qla2100 local function return status code. +* +* Context: +* Kernel context. +*/ +STATIC int +qla2100_get_port_database(scsi_qla_host_t *ha, fcdev_t *dev, uint8_t opt) { + int rval = 0; + port_database_t *pd; + u_long phys_address = 0; + uint16_t mb[MAILBOX_REGISTER_COUNT]; + + ENTER("qla2200_get_port_database:"); +/* 4.10 */ +#if LINUX_VERSION_CODE < KERNEL_VERSION(2,3,18) + pd = KMALLOC(PORT_DATABASE_SIZE); + if ( pd != NULL ) { + phys_address = VIRT_TO_BUS(pd); + BZERO((caddr_t)pd, PORT_DATABASE_SIZE); + } +#else + pd = pci_alloc_consistent(ha->pdev, + PORT_DATABASE_SIZE, + &phys_address); + BZERO((caddr_t)pd, PORT_DATABASE_SIZE); +#endif + if( pd == NULL ) { + return 2; + } + BZERO((caddr_t)pd, PORT_DATABASE_SIZE); + + mb[0] = MBC_GET_PORT_DATABASE; + mb[1] = dev->loop_id << 8 | opt; + mb[2] = MSW(phys_address); + mb[3] = LSW(phys_address); + mb[6] = 0; + mb[7] = 0; + if( !qla2100_mailbox_command(ha, + BIT_7|BIT_6|BIT_3|BIT_2|BIT_1|BIT_0, + &mb[0]) ) { + /* Get d_id of device. */ + /* + dev->d_id.b.al_pa = pd->port_id[2]; + dev->d_id.b.area = pd->port_id[3]; + dev->d_id.b.domain = pd->port_id[0]; + dev->d_id.b.rsvd_1 = 0; + */ + + /* Get initiator status of device. */ + pd->prli_svc_param_word_3[0] & BIT_5 ? + (dev->flags = dev->flags | DEV_INITIATOR) : + (dev->flags = dev->flags & ~DEV_INITIATOR); + } else { + printk(KERN_WARNING "qla2200_get_port_database: [ERROR] failed"); + rval = 1; + } +#if LINUX_VERSION_CODE < KERNEL_VERSION(2,3,18) + KMFREE(pd, PORT_DATABASE_SIZE); +#else + pci_free_consistent(ha->pdev, PORT_DATABASE_SIZE, + pd, phys_address); +#endif + LEAVE("qla2200_get_port_database:"); + + return (rval); +} +#endif + +/* +* qla2100_configure_loop +* Resync with fibre channel devices. +* +* Input: +* ha = adapter block pointer. +* +* Returns: +* 0 = success +*/ + +STATIC uint8_t qla2100_configure_loop(scsi_qla_host_t *ha, uint8_t reuse) { + uint8_t status = 0; + + /* If firmware needs to be loaded */ + if( qla2100_isp_firmware(ha) ) { + ha->flags.online = FALSE; + if( !(status = qla2100_chip_diag(ha)) ) + status = qla2100_setup_chip(ha); + } + + if( !status && !(status = qla2100_init_rings(ha)) ) { + if( !qla2100_fw_ready(ha) ) { + ha->flags.reset_marker = FALSE; + do { + ha->flags.loop_resync_needed = FALSE; + /* remap devices on loop */ + qla2100_update_fc_db(ha, reuse); + }while( !ha->loop_down_timer && ha->flags.loop_resync_needed ); + } + } + return(status); +} + +/* + * This routine will wait for fabric devices for + * the reset delay. + */ +void qla2100_check_fabric_devices(scsi_qla_host_t *ha) { + uint16_t mb[MAILBOX_REGISTER_COUNT]; + + mb[0] = MBC_GET_FIRMWARE_STATE; + qla2100_mailbox_command(ha, BIT_0, &mb[0]); +} + +#if QLA2100_EXT_TIMEOUT +/* +* qla2100_extend_timeout +* This routine will extend the timeout to the specified value. +* +* Input: +* cmd = SCSI command structure +* +* Returns: +* None. +*/ +static void qla2100_extend_timeout(Scsi_Cmnd *cmd, int timeout) { + del_timer(&cmd->eh_timeout); + cmd->eh_timeout.expires = jiffies + timeout; + add_timer(&cmd->eh_timeout); +} +#endif +/* +* qla2100_display_fc_names +* This routine will the node names of the different devices found +* after port inquiry. +* +* Input: +* cmd = SCSI command structure +* +* Returns: +* None. +*/ +STATIC void qla2100_display_fc_names(scsi_qla_host_t *ha) { + uint16_t index; + + /* Display the node name for adapter */ + printk(KERN_INFO + "scsi-qla%d-adapter-node=%02x%02x%02x%02x%02x%02x%02x%02x;\n", + (int)ha->instance, + ha->init_cb->node_name[0], + ha->init_cb->node_name[1], + ha->init_cb->node_name[2], + ha->init_cb->node_name[3], + ha->init_cb->node_name[4], + ha->init_cb->node_name[5], + ha->init_cb->node_name[6], + ha->init_cb->node_name[7]); + + /* display the port name for adapter */ + printk(KERN_INFO + "scsi-qla%d-adapter-port=%02x%02x%02x%02x%02x%02x%02x%02x;\n", + (int)ha->instance, + ha->init_cb->port_name[0], + ha->init_cb->port_name[1], + ha->init_cb->port_name[2], + ha->init_cb->port_name[3], + ha->init_cb->port_name[4], + ha->init_cb->port_name[5], + ha->init_cb->port_name[6], + ha->init_cb->port_name[7]); + + /* Print out device port names */ + for (index = 0; index < MAX_FIBRE_DEVICES; index++) { + if (ha->fc_db[index].loop_id == PORT_UNUSED || + ha->fc_db[index].loop_id == PORT_AVAILABLE ) + continue; + +#if USE_PORTNAME + printk(KERN_INFO + "scsi-qla%d-target-%d=%02x%02x%02x%02x%02x%02x%02x%02x;\n", + (int)ha->instance, index, + ha->fc_db[index].wwn[0], + ha->fc_db[index].wwn[1], + ha->fc_db[index].wwn[2], + ha->fc_db[index].wwn[3], + ha->fc_db[index].wwn[4], + ha->fc_db[index].wwn[5], + ha->fc_db[index].wwn[6], + ha->fc_db[index].wwn[7]); +#else + printk(KERN_INFO + "scsi-qla%d-target-%d=%02x%02x%02x%02x%02x%02x%02x%02x;\n", + (int)ha->instance, index, + ha->fc_db[index].name[0], + ha->fc_db[index].name[1], + ha->fc_db[index].name[2], + ha->fc_db[index].name[3], + ha->fc_db[index].name[4], + ha->fc_db[index].name[5], + ha->fc_db[index].name[6], + ha->fc_db[index].name[7]); +#endif + } +} + +/* +* qla2100_find_propname +* Get property in database. +* +* Input: +* ha = adapter structure pointer. +* db = pointer to database +* propstr = pointer to dest array for string +* propname = name of property to search for. +* +* Returns: +* 0 = no property +* value = index of property value. +* +* Context: +* Kernel context. +*/ +STATIC uint8_t +qla2100_find_propname(scsi_qla_host_t *ha, + char *propname, char *propstr, char *db) { + char *np, *cp; + int i,k,l; + + /* find the specified string */ + for( l=0, cp = db; (*cp) && l < strlen(db) ; cp = np, l++ ) { + np = qla2100_get_line(cp, propstr); + DEBUG5(printk("qla2100_find_propname: %d - Searching for {%s} in cmd substr: {%s}, next line: {%s} \n",l,propname,propstr, np);) + /* find the property name */ + k = strlen(propname); + for ( i = 0; (propstr[i]) && i < strlen(db); i++ ) { + if( BCMP(propname,&propstr[i],k) == 0) { + DEBUG5(printk("qla2100_find_propname: found at index = %d\n",i+k );) + return (i+k); /* match */ + } + } + } + return (0); +} + + + +/* +* qla2100_get_prop_16chars +* Get an 8-byte property value for the specified property name by +* converting from the property string found in the configuration file. +* The resulting converted value is in big endian format (MSB at byte0). +* +* Input: +* ha = adapter state pointer. +* propname = property name pointer. +* propval = pointer to location for the converted property val. +* db = pointer to database +* +* Returns: +* 0 = value returned successfully. +* +* Context: +* Kernel context. +*/ +static int +qla2100_get_prop_16chars(scsi_qla_host_t *ha, char *propname, + char *propval, char *db) { + char *propstr; + int i, k; + int rval; + uint8_t nval; + uint8_t *pchar; + uint8_t *ret_byte; + uint8_t *tmp_byte; + uint8_t *retval = (uint8_t*)propval; + uint8_t tmpval[8] = {0, 0, 0, 0, 0, 0, 0, 0}; + uint16_t max_byte_cnt = 8; /* 16 chars = 8 bytes */ + uint16_t max_strlen = 16; + char buf[LINESIZE]; + + rval = qla2100_find_propname(ha, propname, buf, db); + if ( rval >= LINESIZE ) + rval = 0; + + propstr = &buf[rval]; + if ( *propstr == '=' ) + propstr++; /* ignore equal sign */ + + if (rval == 0 ) { + return (1); + } + + if (strlen(propstr) != max_strlen) { + printk(KERN_INFO + "qla2x00: Failed to find prop for %s - rval=%d, " + "strlen(propstr)=%d->(16), val=%s.\n", + propname, rval, (int)strlen(propstr),propstr); + return (1); + } + + /* Convert string to numbers. */ + + pchar = (uint8_t *)propstr; + tmp_byte = (uint8_t *)tmpval; + + rval = 0; + for (i = 0; i < max_strlen; i++) { + /* + * Check for invalid character, two at a time, + * then convert them starting with first byte. + */ + + if ((pchar[i] >= '0') && (pchar[i] <= '9')) { + nval = pchar[i] - '0'; + } else if ((pchar[i] >= 'A') && (pchar[i] <= 'F')) { + nval = pchar[i] - 'A' + 10; + } else if ((pchar[i] >= 'a') && (pchar[i] <= 'f')) { + nval = pchar[i] - 'a' + 10; + } else { + /* invalid character */ + rval = 1; + break; + } + + if (i & BIT_0) { + *tmp_byte = *tmp_byte | nval; + tmp_byte++; + } else { + *tmp_byte = *tmp_byte | nval << 4; + } + } + + if (rval != 0) { + /* Encountered invalid character. */ + return (rval); + } + + /* Copy over the converted value. */ + + ret_byte = retval; + tmp_byte = tmpval; + + i = max_byte_cnt; + k = 0; + while (i--) { + *ret_byte++ = *tmp_byte++; + } + + /* big endian retval[0]; */ + return (0); +} + +/* +* qla2100_get_properties +* Find all properties for the specified adapeter in +* command line. +* +* Input: +* ha = adapter block pointer. +* cmdline = pointer to command line string +* +* Context: +* Kernel context. +*/ +static void +qla2100_get_properties(scsi_qla_host_t *ha, char *cmdline) { + char propbuf[LINESIZE]; + int tmp_rval; + uint16_t tgt; + uint8_t tmp_name[8]; + + /* Adapter FC node names. */ + sprintf(propbuf, "scsi-qla%d-adapter-node", (int) ha->instance); + qla2100_get_prop_16chars (ha, propbuf, + (caddr_t)(&ha->init_cb->node_name), cmdline); + + sprintf(propbuf, "scsi-qla%d-adapter-port", (int) ha->instance); + + /* DG 04/07 check portname of adapter */ + qla2100_get_prop_16chars (ha, propbuf, + (caddr_t)(tmp_name), cmdline); + if (BCMP(&ha->init_cb->port_name[0], &tmp_name[0], 8) != 0) { + /* + * Adapter port name is WWN, and cannot be changed. + * Inform users of the mismatch, then just continue driver + * loading using the original adapter port name in NVRAM. + */ + printk(KERN_WARNING + "qla2x00: qla%ld found mismatch in adapter port names.\n", + ha->instance); + printk(KERN_INFO + " qla%ld port name found in NVRAM -> %02x%02x%02x%02x%02x%02x%02x%02x\n", + ha->instance, + ha->init_cb->port_name[0], + ha->init_cb->port_name[1], + ha->init_cb->port_name[2], + ha->init_cb->port_name[3], + ha->init_cb->port_name[4], + ha->init_cb->port_name[5], + ha->init_cb->port_name[6], + ha->init_cb->port_name[7]); + printk(KERN_INFO + " qla%ld port name found on command line -> %02x%02x%02x%02x%02x%02x%02x%02x\n", + ha->instance, + tmp_name[0], + tmp_name[1], + tmp_name[2], + tmp_name[3], + tmp_name[4], + tmp_name[5], + tmp_name[6], + tmp_name[7]); + printk(KERN_INFO + " Using port name from NVRAM.\n"); + } + + /* FC name for devices */ + for (tgt = 0; tgt < MAX_FIBRE_DEVICES; tgt++) { + sprintf(propbuf, "scsi-qla%d-target-%d", + (int) ha->instance, tgt); + + tmp_rval = qla2100_get_prop_16chars (ha, propbuf, + tmp_name, cmdline); + if ( tmp_rval == 0 ) { + /* Got a name for this ID. */ + + /* Save to appropriate fields. */ +#if USE_PORTNAME /* updated for ioctl merge */ + BCOPY(tmp_name, ha->fc_db[tgt].wwn, 8); +#else + BCOPY(tmp_name, ha->fc_db[tgt].name, 8); +#endif + ha->fc_db[tgt].loop_id = PORT_AVAILABLE; + ha->fc_db[tgt].flag = 0; /* v2.19.05b3 */ + ha->fc_db[tgt].flag |= DEV_CONFIGURED; + DEBUG(printk("Target %d - configured by user: ",tgt);) + DEBUG(printk("scsi-target=\"%08x%08x\"\n", + tmp_name[1], + tmp_name[0]);)/*ioctl support change*/ + } + } + +} + +/* +* Declarations for load module +*/ + +/* 2.19.15 */ +#ifndef FC_IP_SUPPORT +/************************************************************************/ +/* qla2x00_reserve_loopid */ +/* This routine reserves an unused public loop ID. */ +/* */ +/* Arguments: */ +/* ha - adapter block pointer */ +/* pLoopID - pointer to word for returning loop ID */ +/* */ +/* Return Value: */ +/* QL_STATUS_SUCCESS if no error */ +/* QL_STATUS_RESOURCE_ERROR if out of loop IDs */ +/************************************************************************/ + +static int qla2x00_reserve_loopid(scsi_qla_host_t *ha, uint16_t *pLoopId) +{ + int i; + + /* Look for unused loop ID */ + for (i = ha->min_external_loopid; i < ha->max_public_loop_ids; i++) + { + if (!ha->fabricid[i].in_use) + { + /* Found free loop ID */ + ha->fabricid[i].in_use = TRUE; + *pLoopId = i; + + DEBUG(sprintf(debug_buff, "qla2x00_reserve_loopid: assigned loop ID %x\n\r", *pLoopId)); + DEBUG(qla2100_print(debug_buff)); + return QL_STATUS_SUCCESS; + } + } + + /* Out of loop IDs */ + *pLoopId = ha->max_public_loop_ids + 1; /* Set out of range */ + DEBUG(qla2100_print("qla2x00_reserve_loopid: out of loop IDs\n\r")); + return QL_STATUS_RESOURCE_ERROR; +} /* qla2x00_reserve_loopid */ + + +/************************************************************************/ +/* qla2x00_free_loopid */ +/* This routine frees a public loop ID. */ +/* */ +/* Arguments: */ +/* ha - adapter block pointer */ +/* wLoopID - loop ID to free */ +/* */ +/* Return Value: */ +/* none */ +/************************************************************************/ + +static void qla2x00_free_loopid(scsi_qla_host_t *ha, uint16_t wLoopId) +{ + if (wLoopId < ha->max_public_loop_ids) + { + ha->fabricid[wLoopId].in_use = FALSE; + DEBUG(sprintf(debug_buff, "qla2x00_free_loopid: free loop ID %x\n\r", wLoopId)); + DEBUG(qla2100_print(debug_buff)); + } + else + { + DEBUG(sprintf(debug_buff, "qla2x00_free_loopid: loop ID %x out of range\n\r", wLoopId)); + DEBUG(qla2100_print(debug_buff)); + } +} /* qla2x00_free_loopid */ + + +/************************************************************************/ +/* qla2x00_login_public_device */ +/* This routine issues mailbox command to login fabric port. */ +/* */ +/* Arguments: */ +/* ha - adapter block pointer */ +/* wLoopID - public loop ID for device */ +/* pPortID - pointer to port ID for fabric login */ +/* wOptions - MBC_NO_PLOGI_IF_LOGGED_IN (bit 0) */ +/* MBC_NO_PROCESS_LOGIN (bit 1) */ +/* */ +/* Return Value: */ +/* QL_STATUS_SUCCESS if no error */ +/* QL_STATUS_ERROR if any other error */ +/* QL_STATUS_RESOURCE_ERROR if out of loop IDs */ +/* QL_STATUS_FATAL_ERROR if fatal error */ +/************************************************************************/ + +static int qla2x00_login_public_device(scsi_qla_host_t *ha, + uint16_t *pLoopId, + uint8_t *pPortID, + uint16_t wOptions) +{ + int status = QL_STATUS_SUCCESS; + int wRetryCount; + uint16_t mb[MAILBOX_REGISTER_COUNT]; + + /* Set retry count */ + wRetryCount = 2; + + while (wRetryCount--) + { + DEBUG(sprintf(debug_buff, "qla2x00_login_public_device: login loop ID: %x port ID: %x, option: %x\n\r", + *pLoopId, *pPortID << 16 | *(pPortID+1) << 8 | *(pPortID+2), wOptions )); + DEBUG(qla2100_print(debug_buff)); + + /* Issue fabric login request */ + mb[0] = MBC_LOGIN_FABRIC_PORT; + mb[1] = (uint16_t)(*pLoopId << 8 | (wOptions & 0x00FF)); + mb[2] = (uint16_t)(*pPortID); + mb[3] = (uint16_t)(*(pPortID+1) << 8 | *(pPortID+2)); + if (qla2100_mailbox_command(ha, BIT_3|BIT_2|BIT_1|BIT_0, &mb[0]) == 0) + { + /* Login successful */ + status = QL_STATUS_SUCCESS; + break; + } + + /* Login failed, check status */ + if (mb[0] == MBS_FATAL_ERROR) + { + DEBUG(qla2100_print("qla2x00_login_public_device: LOGIN_FABRIC_PORT fatal error\n\r")); + status = QL_STATUS_FATAL_ERROR; + break; + } + else if (mb[0] == MBS_LOOP_ID_IN_USE) + { + DEBUG(sprintf(debug_buff, "qla2x00_login_public_device: loop ID %x in use by port ID %x (4008)\n\r", + *pLoopId, mb[1] << 16 | mb[2])); + DEBUG(qla2100_print(debug_buff)); + + /* Allocate another loop ID and retry */ + if ((status = qla2x00_reserve_loopid(ha, pLoopId)) == QL_STATUS_SUCCESS) + { + wRetryCount++; + } + else + { + break; + } + } + else if (mb[0] == MBS_PORT_ID_IN_USE) + { + DEBUG(sprintf(debug_buff, "qla2x00_login_public_device: port ID already assigned to loop ID %x (4007)\n\r", + mb[1])); + DEBUG(qla2100_print(debug_buff)); + + /* Free loop ID and use one assigned by RISC */ + qla2x00_free_loopid(ha, *pLoopId); + *pLoopId = mb[1]; + + /* Must reissue login mailbox command with new loop ID */ + wRetryCount++; + } + else + { + DEBUG(sprintf(debug_buff, "qla2x00_login_public_device: login error status %x, MB1: %x, MB2: %x\n\r", + mb[0], mb[1], mb[2])); + DEBUG(qla2100_print(debug_buff)); + status = QL_STATUS_ERROR; + } + } + return(status); +} /* qla2x00_login_public_device */ + + +#endif + +#if LINUX_VERSION_CODE < KERNEL_VERSION(2,4,0) +#ifdef MODULE +Scsi_Host_Template driver_template = QLA2100_LINUX_TEMPLATE; +#include "scsi_module.c" +#endif +#else /* new kernel scsi initialization scheme */ +static Scsi_Host_Template driver_template = QLA2100_LINUX_TEMPLATE; +#include "scsi_module.c" +#endif + +#ifdef QL_DEBUG_ROUTINES +/****************************************************************************/ +/* Driver Debug Functions. */ +/****************************************************************************/ + + /* + * Get byte from I/O port + */ +STATIC uint8_t +qla2100_getbyte(uint8_t *port) { + uint8_t ret; + +#ifdef MEMORY_MAPPED_IO + ret = *port; +#else + ret = inb((int)port); +#endif + + if( ql2x_debug_print ) { + qla2100_print("qla2100_getbyte: address = "); + qla2100_output_number((u_long)port, 16); + qla2100_print(" data = 0x"); + qla2100_output_number((u_long)ret, 16); + qla2100_print("\n"); + } + + return(ret); +} + + /* + * Get word from I/O port + */ +STATIC uint16_t +qla2100_getword(uint16_t *port) { + uint16_t ret; + +#ifdef MEMORY_MAPPED_IO + ret = *port; +#else + ret = inw((int)port); +#endif + + if( ql2x_debug_print ) { + qla2100_print("qla2100_getword: address = "); + qla2100_output_number((u_long)port, 16); + qla2100_print(" data = 0x"); + qla2100_output_number((u_long)ret, 16); + qla2100_print("\n"); + } + + return(ret); +} + + /* + * Get double word from I/O port + */ +STATIC uint32_t +qla2100_getdword(uint32_t *port) { + uint32_t ret; + +#ifdef MEMORY_MAPPED_IO + ret = *port; +#else + ret = inl((int)port); +#endif + + if( ql2x_debug_print ) { + qla2100_print("qla2100_getdword: address = "); + qla2100_output_number((u_long)port, 16); + qla2100_print(" data = 0x"); + qla2100_output_number((u_long)ret, 16); + qla2100_print("\n"); + } + + return(ret); +} + + /* + * Send byte to I/O port + */ +STATIC void +qla2100_putbyte(uint8_t *port, uint8_t data) { +#ifdef MEMORY_MAPPED_IO + *port = data; +#else + outb(data, (int)port); +#endif + + if( ql2x_debug_print ) { + qla2100_print("qla2100_putbyte: address = "); + qla2100_output_number((u_long)port, 16); + qla2100_print(" data = 0x"); + qla2100_output_number((u_long)data, 16); + qla2100_print("\n"); + } +} + + /* + * Send word to I/O port + */ +STATIC void +qla2100_putword(uint16_t *port, uint16_t data) { +#ifdef MEMORY_MAPPED_IO + *port = data; +#else +#ifdef _LINUX_IOPORTS + outw(data, (int)port); +#else + outw((int)port, data); +#endif +#endif + + if( ql2x_debug_print ) { + qla2100_print("qla2100_putword: address = "); + qla2100_output_number((u_long)port, 16); + qla2100_print(" data = 0x"); + qla2100_output_number((u_long)data, 16); + qla2100_print("\n"); + } +} + + /* + * Send double word to I/O port + */ +STATIC void +qla2100_putdword(uint32_t *port, uint32_t data) { +#ifdef MEMORY_MAPPED_IO + *port = data; +#else +#ifdef _LINUX_IOPORTS + outl(data,(int)port); +#else + outl((int)port, data); +#endif +#endif + + if( ql2x_debug_print ) { + qla2100_print("qla2100_putdword: address = "); + qla2100_output_number((u_long)port, 16); + qla2100_print(" data = 0x"); + qla2100_output_number((u_long)data, 16); + qla2100_print("\n"); + } +} + + /* + * Dummy function to prevent warnings for + * declared and unused debug functions + */ +void +qla2100_debug(void) { + qla2100_getbyte(0); + qla2100_getword(0); + qla2100_getdword(0); + qla2100_putbyte(0, 0); + qla2100_putword(0, 0); + qla2100_putdword(0, 0); +} + + /* + * Out character to COM1 port. + * PORT must be at standard address for COM1 = 0x3F8 + * This port is available on both Lion and ia32 systems + */ +#define OUTB(addr,data) outb((data),(addr)) +STATIC void +qla2100_putc(int8_t c) { +#ifdef QL_DEBUG_CONSOLE + + printk("%c",c); + +#else /* QL_DEBUG_CONSOLE */ + + uint8_t data; + int com_addr = 0x3f8; /* COM1 */ + int hardware_flow_control = 1; + int software_flow_control = 0; + uint8_t loop = TRUE; + + do { + + /* Wait for transmitter holding and shift registers for empty. */ + do { + data = inb(com_addr+5); + }while( !(data & BIT_6) ); + + /* + * Set BAUD rate for COM1 to 9600 + */ + + /* BAUD rate divisor LSB. */ + OUTB(com_addr+3, 0x83); + + /* BAUD rate divisor MSB. */ + OUTB(com_addr, 0xc); /* 0xC = 9600 baud */ + + /* Set No parity, 8 bits, 1 stop bit and + select interrupt enable register. */ + OUTB(com_addr+3, 3); + + /* Disable interrupts. */ + OUTB(com_addr+1, 0); + + /* Set data terminal ready and request to send */ + OUTB(com_addr+1, 0); + + if( hardware_flow_control ) { + /* Wait for clear-to-send and data-set-ready */ + do { + data = inb(com_addr+6) & (BIT_5 + BIT_4); + }while( data != (BIT_5 + BIT_4) ); + } else if( software_flow_control ) { + /* Test for data ready. */ + data = inb(com_addr+5); + if( data & BIT_0 ) { + /* If XOFF */ + data = inb(com_addr); + if( data == '\023' ) { + /* Wait for XON */ + do { + /* Wait for int8_t */ + do { + data = inb(com_addr+5); + }while( !(data & BIT_0) ); + data = inb(com_addr); + }while( data != '\021' ); + } + } + } + + /* Output character. */ + OUTB(com_addr, c); + + /* Add return. */ + if( c == '\n' ) + c = '\r'; + else + loop = FALSE; + + }while( loop ); +#endif /* QL_DEBUG_CONSOLE */ +} + + /* + * Out NULL terminated string to COM port. + */ +STATIC void +qla2100_print(int8_t *s) { + if( ql2x_debug_print ) { +#ifdef QL_DEBUG_CONSOLE + printk("%s",s); +#else + /* Output string. */ + while( *s ) + qla2100_putc(*s++); +#endif + } +} + + /* + * Output long number to COM port. + */ +STATIC void + qla2100_output_number(u_long n, uint8_t base) { + int8_t str[12]; + int8_t *s = &str[11]; + uint8_t output = 0; + uint8_t hex = FALSE; + + if( ql2x_debug_print ) { + if( base == 10 || base == 16 ) { + if( base == 16 && n > 9 ) + hex = TRUE; + + *s = 0; + do { + s--; + *s = n % base; + if( *s > 9 ) + *s += 55; + else + *s += '0'; + n /= base; + }while( n ); + + for( ; *s; s++ ) { + if( *s != '0' ) + output = 1; + if( output ) + qla2100_putc(*s); + } + if( !output ) + qla2100_putc(*--s); + + if( hex ) + qla2100_putc('h'); + } + } +} + +STATIC void +qla2100_dump_buffer(uint8_t *b, uint32_t size) { + uint32_t cnt; + uint8_t c; + + if( ql2x_debug_print ) { + qla2100_print( + " 0 1 2 3 4 5 6 7 8 9 Ah Bh Ch Dh Eh Fh\n"); + qla2100_print( + "---------------------------------------------------------------\n"); + + for( cnt = 0; cnt < size; ) { + c = *b++; + if( c < 16 ) + qla2100_putc(' '); + qla2100_output_number((uint32_t)c, 16); + cnt++; + if( !(cnt % 16) ) + qla2100_print("\n"); + else if( c < 10 ) + qla2100_print(" "); + else + qla2100_putc(' '); + } + if( cnt % 16 ) + qla2100_print("\n"); + } +} + /************************************************************************** + * ql2100_print_scsi_cmd + * + **************************************************************************/ +void qla2100_print_scsi_cmd(Scsi_Cmnd *cmd) { + scsi_qla_host_t *ha; + struct Scsi_Host *host = cmd->host; + srb_t *sp; + + int i; + ha = (scsi_qla_host_t *) host->hostdata; + + ql2x_debug_print = 1; + sp = (srb_t *) CMD_SP(cmd); + sprintf(debug_buff,"SCSI Command=0x%p, Handle=0x%08lx pid=%x\n\r", cmd, (u_long)CMD_HANDLE(cmd),cmd->pid); + qla2100_print(debug_buff); + sprintf(debug_buff," chan=%d, target = 0x%02x, lun = 0x%02x, cmd_len = 0x%02x\n\r", + cmd->channel, cmd->target, cmd->lun, cmd->cmd_len); + qla2100_print(debug_buff); + qla2100_print(" CDB = "); + for( i = 0; i < cmd->cmd_len; i++ ) { + sprintf(debug_buff,"0x%02x ", cmd->cmnd[i]); + qla2100_print(debug_buff); + } + + sprintf(debug_buff,"\n\r seg_cnt =%d, retries=%d, serial_number_at_timeout=0x%lx\n\r",cmd->use_sg,cmd->retries,cmd->serial_number_at_timeout); + qla2100_print(debug_buff); + sprintf(debug_buff," request buffer=0x%p, request buffer len=0x%x\n\r",cmd->request_buffer,cmd->request_bufflen); + qla2100_print(debug_buff); + sprintf(debug_buff," tag=%d, flags=0x%x, transfersize=0x%x \n\r", + cmd->tag, cmd->flags,cmd->transfersize); + qla2100_print(debug_buff); + sprintf(debug_buff," Pid=%d, SP=0x%x\n\r", (int)cmd->pid, CMD_SP(cmd)); + + qla2100_print(debug_buff); + sprintf(debug_buff," sp flags=0x%lx, sp state=%x, wdgtime=%d\n\r",sp->flags,sp->state,sp->wdg_time); + qla2100_print(debug_buff); +} + + +void qla2100_print_q_info(scsi_lu_t *q) { + sprintf(debug_buff,"Queue info: queue in =%d, queue out= %d, flags=0x%lx\n\r", q->q_incnt, q->q_outcnt, q->q_flag); + qla2100_print(debug_buff); +} +#endif + + + + + /************************************************************************** + * ql2100_dump_regs + * + **************************************************************************/ +static void qla2100_dump_regs(struct Scsi_Host *host) { + printk("Mailbox registers:\n"); + printk("qla2100 : mbox 0 0x%04x \n", inw(host->io_port + 0x10)); + printk("qla2100 : mbox 1 0x%04x \n", inw(host->io_port + 0x12)); + printk("qla2100 : mbox 2 0x%04x \n", inw(host->io_port + 0x14)); + printk("qla2100 : mbox 3 0x%04x \n", inw(host->io_port + 0x16)); + printk("qla2100 : mbox 4 0x%04x \n", inw(host->io_port + 0x18)); + printk("qla2100 : mbox 5 0x%04x \n", inw(host->io_port + 0x1a)); +#ifdef TRACECODE + sprintf(debug_buff,"qla2100 : mbox 0 0x%04x \n\r", inw(host->io_port + 0x10)); + qla2100_print(debug_buff); + sprintf(debug_buff,"qla2100 : mbox 1 0x%04x \n\r", inw(host->io_port + 0x12)); + qla2100_print(debug_buff); + sprintf(debug_buff,"qla2100 : mbox 2 0x%04x \n\r", inw(host->io_port + 0x14)); + qla2100_print(debug_buff); + sprintf(debug_buff,"qla2100 : mbox 3 0x%04x \n\r", inw(host->io_port + 0x16)); + qla2100_print(debug_buff); + sprintf(debug_buff,"qla2100 : mbox 4 0x%04x \n\r", inw(host->io_port + 0x18)); + qla2100_print(debug_buff); + sprintf(debug_buff,"qla2100 : mbox 5 0x%04x \n\r", inw(host->io_port + 0x1a)); + qla2100_print(debug_buff); +#endif +} + + +#if STOP_ON_ERROR + /************************************************************************** + * ql2100_panic + * + **************************************************************************/ +static void qla2100_panic(char *cp, struct Scsi_Host *host) { + scsi_qla_host_t *ha; + long *fp; + + ha = (scsi_qla_host_t *) host->hostdata; + DEBUG2(ql2x_debug_print = 1;) + sprintf(debug_buff,"qla2100 - PANIC: %s\n",cp); + qla2100_print(debug_buff); + sprintf(debug_buff,"Current time=0x%lx\n", jiffies); + qla2100_print(debug_buff); + sprintf(debug_buff,"Number of pending commands =0x%lx\n", ha->actthreads); + qla2100_print(debug_buff); + sprintf(debug_buff,"Number of queued commands =0x%lx\n", ha->qthreads); + qla2100_print(debug_buff); + sprintf(debug_buff,"Number of free entries = (%d)\n",ha->req_q_cnt); + qla2100_print(debug_buff); + sprintf(debug_buff,"Request Queue @ 0x%lx, Response Queue @ 0x%lx\n", + ha->request_dma, + ha->response_dma); + qla2100_print(debug_buff); + sprintf(debug_buff,"Request In Ptr %d\n", ha->req_ring_index); + qla2100_print(debug_buff); + fp = (long *) &ha->flags; + sprintf(debug_buff,"HA flags =0x%lx\n", *fp); + qla2100_print(debug_buff); + ql2100_dump_requests(ha); + qla2100_dump_regs(host); + cli(); + for( ;; ) { + QLA2100_DELAY(2); barrier(); + } + sti(); +} +#endif +#if 0 + static void qla2100_set_flags(int flag) { + + switch( flag ) { + case 0x1: + qla2100_verbose = 1L; + + } + + } +#endif + /************************************************************************** + * ql2100_dump_requests + * + **************************************************************************/ +void +ql2100_dump_requests(scsi_qla_host_t *ha) { + + Scsi_Cmnd *cp; + srb_t *sp; + int i; +#ifdef QL_DEBUG_ROUTINES + qla2100_print("Outstanding Commands on controller:\n\r"); +#else + printk(KERN_INFO "Outstanding Commands on controller:\n"); +#endif + for( i=0; i < MAX_OUTSTANDING_COMMANDS; i++ ) { + if( (sp = ha->outstanding_cmds[i]) == NULL ) + continue; + if( (cp = sp->cmd) == NULL ) + continue; + sprintf(debug_buff,"(%d): Pid=%ld, sp flags=0x%x, cmd=0x%p\n\r", i, (int)sp->cmd->pid, (long)sp->flags,CMD_SP(sp->cmd)); + +#ifdef QL_DEBUG_ROUTINES + qla2100_print(debug_buff); +#else + printk(KERN_INFO "%s",debug_buff); +#endif + } + +} + + + /************************************************************************** + * qla2100_setup + * + * Handle Linux boot parameters. This routine allows for assigning a value + * to a parameter with a ';' between the parameter and the value. + * ie. qla2x00=arg0;arg1;...;argN; OR + * via the command line. + * ie. qla2x00 ql2xopts=arg0;arg1;...;argN; + **************************************************************************/ +void qla2100_setup(char *s, int *dummy) { + char *cp, *np; + char *slots[MAXARGS]; + char **argv = &slots[0]; + char buf[LINESIZE]; + int argc, opts; + + /* + * Determine if we have any properties. + */ + cp = s; + opts = 1; + while( *cp && (np = qla2100_get_line(cp, buf)) != NULL ) { + if( BCMP("scsi-qla",buf,8) == 0 ) { + DEBUG(printk("qla2100: devconf=%s\n",cp);) + ql2xdevconf = cp; + (opts > 0)? opts-- : 0; + break; + } + opts++; + cp = np; + } + /* + * Parse the args before the properties + */ + if( opts ) { + opts = (opts > MAXARGS-1)? MAXARGS-1: opts; + argc = qla2100_get_tokens(s, argv, opts); + while (argc > 0 ) { + cp = *argv; + DEBUG(printk("scsi: found cmd arg =[%s]\n", cp);) + if( strcmp(cp, "verbose") == 0 ) { + DEBUG(printk("qla2100: verbose\n");) + qla2100_verbose++; + } else if (strcmp(cp, "quiet") == 0) { + qla2100_quiet = 1; + } else if( strcmp(cp, "reinit_on_loopdown") == 0 ) { + qla2100_reinit++; + DEBUG(printk("qla2100: reinit_on_loopdown\n");) + } + argc--, argv++; + } + } + +} + + /********************** qla2100_get_line ********************* + * qla2100_get_line + * Copy a substring from the specified string. The substring + * consists of any number of chars seperated by white spaces (i.e. spaces) + * and ending with a newline '\n' or a semicolon ';'. + * + * Enter: + * str - orig string + * line - substring + * + * Returns: + * cp - pointer to next string + * or + * null - End of string + *************************************************************/ +static char *qla2100_get_line(char *str, char *line) { + register char *cp = str; + register char *sp = line; + + /* skip preceeding spaces */ + while( *cp && *cp == ' ' ) + ++cp; + while ( (*cp) && *cp != '\n' && *cp != ';' ) /* end of line */ + *sp++ = *cp++; + + *sp = '\0'; + DEBUG5(printk("qla2100_get_line: %s\n",line);) + if( (*cp) ) { + cp++; + return( cp ); + } + return( NULL ); +} + + + /**************************** get_tokens ********************* + * Parse command line into argv1, argv2, ... argvX + * Arguments are seperated by white spaces and colons and end + * with a NULL. + *************************************************************/ +static int qla2100_get_tokens(char *line, char **argv, int maxargs ) { + register char *cp = line; + int count = 0; + + while( *cp && count < maxargs ) { + /* skip preceeding spaces */ + while((*cp) && *cp == ' ') + ++cp; + /* symbol starts here */ + argv[count++] = cp; + /* skip symbols */ + while ( (*cp) && !( *cp == ' ' || *cp == ';' || *cp == ':' ) ) + cp++; + /* replace comma or space with a null */ + if( (*cp) && (*cp ==' ' ) && argv[count-1] != cp ) + *cp++ = '\0'; + } + return( count ); +} + +#ifdef FC_IP_SUPPORT + /* Include routines for supporting IP */ +#include "qla2100ip.c" +#endif /* FC_IP_SUPPORT */ + +#if APIDEV +/****************************************************************************/ +/* Create character driver "HbaApiDev" w dynamically allocated major number */ +/* and create "/proc/scsi/qla2x00/HbaApiNode" as the device node associated */ +/* with the major number. */ +/****************************************************************************/ + +#define APIDEV_NODE "HbaApiNode" +#define APIDEV_NAME "HbaApiDev" + +static int apidev_major = 0; +static struct Scsi_Host *apidev_host = 0; + +static int apidev_open(struct inode *inode, struct file *file) +{ + printk (KERN_INFO "qla2100_apidev: open MAJOR number = %d, MINOR number = %d\n", MAJOR (inode->i_rdev), MINOR (inode->i_rdev)); + return 0; +} +static int apidev_close(struct inode *inode, struct file *file) +{ + printk (KERN_INFO "qla2100_apidev: closed\n"); + return 0; +} + +static int apidev_ioctl(struct inode *inode, struct file *fp, unsigned int cmd, unsigned long arg) +{ + Scsi_Device fake_scsi_device; + fake_scsi_device.host = apidev_host; + return(qla2100_ioctl(&fake_scsi_device, (int)cmd, (void*)arg)); +} + +static struct file_operations apidev_fops = { + ioctl: apidev_ioctl, + open: apidev_open, + release: apidev_close +}; + +static int apidev_init(struct Scsi_Host *host) +{ + if(apidev_host) return 0; + if (0 > (apidev_major = register_chrdev(0, APIDEV_NAME, &apidev_fops))) + { + DEBUG(printk("qla2100_apidev: register_chrdev rc=%d\n",apidev_major);) + return apidev_major; + } + apidev_host = host; + DEBUG(printk("qla2x00: Created /proc/scsi/qla2x00/%s major=%d\n",APIDEV_NODE,apidev_major);) + proc_mknod(APIDEV_NODE, 0777+S_IFCHR,host->hostt->proc_dir,(kdev_t)MKDEV(apidev_major,0)); + return 0; +} + +static int apidev_cleanup() +{ + if(!apidev_host) return 0; + unregister_chrdev(apidev_major,APIDEV_NAME); + remove_proc_entry(APIDEV_NODE,apidev_host->hostt->proc_dir); + apidev_host = 0; + return 0; +} +#endif /* APIDEV */ + +#ifdef QL_DEBUG_ROUTINES +#if DEBUG_GET_FW_DUMP +#include "x2300dbg.c" +#endif +#endif + + +/* +* Overrides for Emacs so that we almost follow Linus's tabbing style. +* Emacs will notice this stuff at the end of the file and automatically +* adjust the settings for this buffer only. This must remain at the end +* of the file. +* --------------------------------------------------------------------------- +* Local variables: +* c-indent-level: 2 +* c-brace-imaginary-offset: 0 +* c-brace-offset: -2 +* c-argdecl-indent: 2 +* c-label-offset: -2 +* c-continued-statement-offset: 2 +* c-continued-brace-offset: 0 +* indent-tabs-mode: nil +* tab-width: 8 +* End: +*/ diff -Nru a/drivers/scsi/qla2x00.h b/drivers/scsi/qla2x00.h --- /dev/null Wed Dec 31 16:00:00 1969 +++ b/drivers/scsi/qla2x00.h Mon Apr 15 15:07:57 2002 @@ -0,0 +1,2492 @@ +/******************************************************************************** +* QLOGIC LINUX SOFTWARE +* +* QLogic ISP2x00 device driver for Linux 2.2.x and 2.4.x +* Copyright (C) 2000 and 2001 Qlogic Corporation +* (www.qlogic.com) +* +* This program is free software; you can redistribute it and/or modify it +* under the terms of the GNU General Public License as published by the +* Free Software Foundation; either version 2, or (at your option) any +* later version. +* +* This program is distributed in the hope that it will be useful, but +* WITHOUT ANY WARRANTY; without even the implied warranty of +* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU +* General Public License for more details. +** +******************************************************************************/ + +#ifndef _IO_HBA_QLA2100_H /* wrapper symbol for kernel use */ +#define _IO_HBA_QLA2100_H /* subject to change without notice */ + +#ifndef LINUX_VERSION_CODE +#include +#endif /* LINUX_VERSION_CODE not defined */ + +#ifndef HOSTS_C + +#if defined(__cplusplus) +extern "C" { +#endif + +#ifndef ISP2200 +#define ISP2200 +#endif + + +/* + * Driver debug definitions. + */ +/* #define QL_DEBUG_LEVEL_1 */ /* Output register accesses to COM1 */ +/* #define QL_DEBUG_LEVEL_2 */ /* Output error msgs to COM1 */ +/* #define QL_DEBUG_LEVEL_3 */ /* Output function trace msgs to COM1 */ +/* #define QL_DEBUG_LEVEL_4 */ /* Output NVRAM trace msgs to COM1 */ +/* #define QL_DEBUG_LEVEL_5 */ /* Output ring trace msgs to COM1 */ +/* #define QL_DEBUG_LEVEL_6 */ /* Output WATCHDOG timer trace to COM1 */ +/* #define QL_DEBUG_LEVEL_7 */ /* Output RISC load trace msgs to COM1 */ +/* #define QL_DEBUG_LEVEL_8 */ /* Output ring saturation msgs to COM1 */ + +#define QL_DEBUG_CONSOLE /* Output to console instead of COM1 */ + /* comment this #define to get output of qla2100_print to COM1 */ + /* if COM1 is not connected to a host system, the driver hangs system! */ + +/* + * Data bit definitions. + */ +#define BIT_0 0x1 +#define BIT_1 0x2 +#define BIT_2 0x4 +#define BIT_3 0x8 +#define BIT_4 0x10 +#define BIT_5 0x20 +#define BIT_6 0x40 +#define BIT_7 0x80 +#define BIT_8 0x100 +#define BIT_9 0x200 +#define BIT_10 0x400 +#define BIT_11 0x800 +#define BIT_12 0x1000 +#define BIT_13 0x2000 +#define BIT_14 0x4000 +#define BIT_15 0x8000 +#define BIT_16 0x10000 +#define BIT_17 0x20000 +#define BIT_18 0x40000 +#define BIT_19 0x80000 +#define BIT_20 0x100000 +#define BIT_21 0x200000 +#define BIT_22 0x400000 +#define BIT_23 0x800000 +#define BIT_24 0x1000000 +#define BIT_25 0x2000000 +#define BIT_26 0x4000000 +#define BIT_27 0x8000000 +#define BIT_28 0x10000000 +#define BIT_29 0x20000000 +#define BIT_30 0x40000000 +#define BIT_31 0x80000000 + +/* + * Common size type definitions + */ +#if LINUX_VERSION_CODE < KERNEL_VERSION(2,1,0) +typedef unsigned char uint8_t; +typedef unsigned short uint16_t; +typedef unsigned long uint32_t; +typedef char int8_t; +typedef short int16_t; +typedef long int32_t; +#endif + +/* + * Local Macro Definitions. + */ +#if defined(QL_DEBUG_LEVEL_1) || defined(QL_DEBUG_LEVEL_2) || \ + defined(QL_DEBUG_LEVEL_3) || defined(QL_DEBUG_LEVEL_4) || \ + defined(QL_DEBUG_LEVEL_5) || defined(QL_DEBUG_LEVEL_6) || \ + defined(QL_DEBUG_LEVEL_7) || defined(QL_DEBUG_LEVEL_8) + #define QL_DEBUG_ROUTINES +#endif + +#ifndef TRUE + #define TRUE 1 +#endif + +#ifndef FALSE + #define FALSE 0 +#endif +#ifndef KERNEL_VERSION +# define KERNEL_VERSION(x,y,z) (((x)<<16)+((y)<<8)+(z)) +#endif + +#if LINUX_VERSION_CODE <= KERNEL_VERSION(2,1,92) +# if defined(__sparc_v9__) || defined(__powerpc__) +# error "PPC and Sparc platforms are only support under 2.1.92 and above" +# endif +#endif + + +/* + * Locking + */ +#if LINUX_VERSION_CODE > KERNEL_VERSION(2,1,0) +# if LINUX_VERSION_CODE < KERNEL_VERSION(2,3,18) +# include +# else +# include +# endif +# include +# define cpuid smp_processor_id() +# if LINUX_VERSION_CODE < KERNEL_VERSION(2,1,95) +# define DRIVER_LOCK_INIT \ + spin_lock_init(&ha->spin_lock); +# define DRIVER_LOCK \ + if(!ha->cpu_lock_count[cpuid]) { \ + spin_lock_irqsave(&ha->spin_lock, cpu_flags); \ + ha->cpu_lock_count[cpuid]++; \ + } else { \ + ha->cpu_lock_count[cpuid]++; \ + } +# define DRIVER_UNLOCK \ + if(--ha->cpu_lock_count[cpuid] == 0) \ + spin_unlock_irqrestore(&ha->spin_lock, cpu_flags); +# else +# define DRIVER_LOCK_INIT +# define DRIVER_LOCK +# define DRIVER_UNLOCK +# endif +#else +# define cpuid 0 +# define DRIVER_LOCK_INIT +# define DRIVER_LOCK \ + save_flags(cpu_flags); \ + cli(); +# define DRIVER_UNLOCK \ + restore_flags(cpu_flags); +# define le32_to_cpu(x) (x) +# define cpu_to_le32(x) (x) +#endif + + +/* + * I/O register +*/ +/* #define MEMORY_MAPPED_IO */ /* Enable memory mapped I/O */ +#undef MEMORY_MAPPED_IO /* Disable memory mapped I/O */ +#define LINUX_IOPORTS /* Linux in/out routines are define*/ + /* differently from other OSs */ + +#ifdef QL_DEBUG_LEVEL_1 + #define RD_REG_BYTE(addr) qla2100_getbyte((uint8_t *)addr) + #define RD_REG_WORD(addr) qla2100_getword((uint16_t *)addr) + #define RD_REG_DWORD(addr) qla2100_getdword((uint32_t *)addr) + #define WRT_REG_BYTE(addr, data) qla2100_putbyte((uint8_t *)addr, data) + #define WRT_REG_WORD(addr, data) qla2100_putword((uint16_t *)addr, data) + #define WRT_REG_DWORD(addr, data) qla2100_putdword((uint32_t *)addr, data) +#else /* QL_DEBUG_LEVEL_1 */ +#ifdef MEMORY_MAPPED_IO +#define RD_REG_BYTE(addr) (*((volatile uint8_t *)addr)) +#define RD_REG_WORD(addr) (*((volatile uint16_t *)addr)) +#define RD_REG_DWORD(addr) (*((volatile uint32_t *)addr)) +#define WRT_REG_BYTE(addr, data) (*((volatile uint8_t *)addr) = data) +#define WRT_REG_WORD(addr, data) (*((volatile uint16_t *)addr) = data) +#define WRT_REG_DWORD(addr, data) (*((volatile uint32_t *)addr) = data) +#else /* MEMORY_MAPPED_IO */ +#define RD_REG_BYTE(addr) (inb((unsigned long)addr)) +#define RD_REG_WORD(addr) (inw((unsigned long)addr)) +#define RD_REG_DWORD(addr) (inl((unsigned long)addr)) +#define WRT_REG_BYTE(addr, data) (outb(data,(unsigned long)addr)) +#define WRT_REG_WORD(addr, data) (outw(data,(unsigned long)addr)) +#define WRT_REG_DWORD(addr, data) (outl(data,(unsigned long)addr)) +#endif /* MEMORY_MAPPED_IO */ +#endif /* QL_DEBUG_LEVEL_1 */ + +#define MAX_FIBRE_DEVICES 256 +#define MAX_RSCN_COUNT 10 +#define MAX_HOST_COUNT 16 + +/* + * Host adapter default definitions. + */ +#define MAX_BUSES 1 /* We only have one bus today */ +#define MAX_TARGETS_2100 255 +#define MAX_TARGETS_2200 255 +#define MAX_LUNS 255 + +/* + * Fibre Channel device definitions. + */ +#define LAST_LOCAL_LOOP_ID 0x7d +#define SNS_FL_PORT 0x7e +#define FABRIC_CONTROLLER 0x7f +#define SIMPLE_NAME_SERVER 0x80 +#define SNS_FIRST_LOOP_ID 0x81 +#define LAST_SNS_LOOP_ID 0xfe +#define MANAGEMENT_SERVER 0xfe +#define BROADCAST 0xff +#define SNS_ACCEPT 0x0280 /* 8002 swapped */ +#define SNS_REJECT 0x0180 /* 8001 swapped */ + +/* Loop ID's used as database flags, must be higher than any valid Loop ID */ +#define PORT_UNUSED 0x100 /* Port never been used. */ +#define PORT_AVAILABLE 0x101 /* Device does not exist on port. */ + +/* + * Timeout timer counts in seconds + */ +#define QLA2100_WDG_TIME_QUANTUM 1 /* In seconds */ +#define PORT_RETRY_TIME 2 +#define LOOP_DOWN_TIMEOUT 60 +#define LOOP_DOWN_TIME 240 /* 240 */ + +/* Maximum outstanding commands in ISP queues (1-65535) */ +#define LOOP_DOWN_RESET (LOOP_DOWN_TIME - 30) + +/* Maximum outstanding commands in ISP queues (1-65535) */ +#define MAX_OUTSTANDING_COMMANDS 512*2 + +#define REQUEST_ENTRY_CNT 256 /* # of request entries, was 512 */ +#define RESPONSE_ENTRY_CNT 256 /* # of response entries, was 16 */ + +/* + * UnixWare required definitions. + */ +#define HBA_PREFIX qla2100 + +/* Physical DMA memory requirements */ +#define QLA2100_MEMALIGN 4 +#define QLA2100_BOUNDARY 0x80000000 /* 2GB */ + +/* Number of segments 1 - 65535 */ +#define SG_SEGMENTS 32 /* Cmd entry + 6 continuations */ + +/* + * SCSI Request Block + */ +typedef struct srb +{ + Scsi_Cmnd *cmd; /* (4) SCSI command block */ + struct srb *s_next; /* (4) Next block on LU queue */ + struct srb *s_prev; /* (4) Previous block on LU queue */ + uint8_t flags; /* (1) Status flags. */ + uint8_t dir; /* direction of transfer */ + uint8_t retry_count; /* Retry count. */ + uint8_t port_down_retry_count; /* Port down retry count. */ + uint8_t ccode; /* risc completion code */ + uint8_t scode; /* scsi status code */ + uint8_t wdg_time; /* watchdog time in seconds */ + uint8_t state; +#if LINUX_VERSION_CODE >= KERNEL_VERSION(2,3,18) + uint64_t saved_dma_handle; /* for unmap of single transfers */ +#endif +}srb_t; + +/* + * SRB flag definitions + */ +#define SRB_TIMEOUT BIT_0 /* Command timed out */ +#define SRB_SENT BIT_1 /* Command sent to ISP */ +#define SRB_WATCHDOG BIT_2 /* Command on watchdog list */ +#define SRB_ABORT_PENDING BIT_3 /* Command abort sent to device */ +#define SRB_ABORTED BIT_4 /* Command aborted command already */ +#define SRB_RETRY BIT_5 /* Command aborted command already */ + +/* + * LUN - Logical Unit Queue structure + */ +typedef struct scsi_lu +{ + srb_t *q_first; /* First block on LU queue */ + srb_t *q_last; /* Last block on LU queue */ + u_char q_flag; /* LU queue state flags */ + u_short q_outcnt; /* Pending jobs for this LU */ + u_long q_incnt; /* queued jobs for this LU */ + u_long io_cnt; /* total xfer count */ + u_long resp_time; /* total response time (start - finish) */ + u_long act_time; /* total actived time (minus queuing time) */ + u_long w_cnt; /* total writes */ + u_long r_cnt; /* total reads */ +#if QLA2X00_TARGET_MODE_SUPPORT + void (*q_func)(); /* Target driver event handler */ + long q_param; /* Target driver event param */ +#endif +#if LINUX_VERSION_CODE > KERNEL_VERSION(2,1,0) + spinlock_t *q_spin_lock; /* Device Queue Lock */ +#endif + volatile unsigned char cpu_lock_count[NR_CPUS]; + u_long q_timeout; /* total command timeouts */ +}scsi_lu_t; + +/* + * Logical Unit q_flag definitions + */ +#define QLA2100_QBUSY BIT_0 +#define QLA2100_QWAIT BIT_1 +#define QLA2100_QSUSP BIT_2 +#define QLA2100_QRESET BIT_4 +#define QLA2100_QHBA BIT_5 +#define QLA2100_BSUSP BIT_6 /* controller is suspended */ +#define QLA2100_BREM BIT_7 /* controller is removed */ + +/* + * ISP PCI Configuration Register Set + */ +typedef volatile struct +{ + uint16_t vendor_id; /* 0x0 */ + uint16_t device_id; /* 0x2 */ + uint16_t command; /* 0x4 */ + uint16_t status; /* 0x6 */ + uint8_t revision_id; /* 0x8 */ + uint8_t programming_interface; /* 0x9 */ + uint8_t sub_class; /* 0xa */ + uint8_t base_class; /* 0xb */ + uint8_t cache_line; /* 0xc */ + uint8_t latency_timer; /* 0xd */ + uint8_t header_type; /* 0xe */ + uint8_t bist; /* 0xf */ + uint32_t base_port; /* 0x10 */ + uint32_t mem_base_addr; /* 0x14 */ + uint32_t base_addr[4]; /* 0x18-0x24 */ + uint32_t reserved_1[2]; /* 0x28-0x2c */ + uint16_t expansion_rom; /* 0x30 */ + uint32_t reserved_2[2]; /* 0x34-0x38 */ + uint8_t interrupt_line; /* 0x3c */ + uint8_t interrupt_pin; /* 0x3d */ + uint8_t min_grant; /* 0x3e */ + uint8_t max_latency; /* 0x3f */ +}config_reg_t; + + +/* + * 2100/2200 ISP I/O Register Set structure definitions. + */ +typedef volatile struct +{ + uint16_t flash_address; /* Flash BIOS address */ + uint16_t flash_data; /* Flash BIOS data */ + uint16_t unused_1[1]; /* Gap */ + uint16_t ctrl_status; /* Control/Status */ + #define ISP_FLASH_ENABLE BIT_1 /* Flash BIOS Read/Write enable */ + #define ISP_RESET BIT_0 /* ISP soft reset */ + uint16_t ictrl; /* Interrupt control */ + #define ISP_EN_INT BIT_15 /* ISP enable interrupts. */ + #define ISP_EN_RISC BIT_3 /* ISP enable RISC interrupts. */ + uint16_t istatus; /* Interrupt status @0xa*/ + #define RISC_INT BIT_3 /* RISC interrupt */ + uint16_t semaphore; /* Semaphore */ + uint16_t nvram; /* NVRAM register. @0xe */ + #define NV_DESELECT 0 + #define NV_CLOCK BIT_0 + #define NV_SELECT BIT_1 + #define NV_DATA_OUT BIT_2 + #define NV_DATA_IN BIT_3 + + /* 2100 and 2200 */ + uint16_t mailbox0; /* Mailbox 0 @0x10 */ + uint16_t mailbox1; /* Mailbox 1 */ + uint16_t mailbox2; /* Mailbox 2 */ + uint16_t mailbox3; /* Mailbox 3 */ + uint16_t mailbox4; /* Mailbox 4 */ + uint16_t mailbox5; /* Mailbox 5 */ + uint16_t mailbox6; /* Mailbox 6 */ + uint16_t mailbox7; /* Mailbox 7 */ + + uint16_t unused_2[0x3b]; /* Gap */ + uint16_t fpm_diag_config; + uint16_t unused_3[0x6]; /* Gap */ + uint16_t pcr; /* Processor Control Register. */ + uint16_t unused_4[0x5]; /* Gap */ + uint16_t mctr; /* Memory Configuration and Timing. */ + uint16_t unused_5[0x3]; /* Gap */ + uint16_t fb_cmd; + uint16_t unused_6[0x3]; /* Gap */ + uint16_t host_cmd; /* Host command and control */ + + #define HOST_INT BIT_7 /* host interrupt bit */ +#ifdef FC_IP_SUPPORT + uint16_t unused_3[0x0F]; /* Gap */ + uint16_t mailbox8; /* Mailbox 8 */ + uint16_t mailbox9; /* Mailbox 9 */ + uint16_t mailbox10; /* Mailbox 10 */ + uint16_t mailbox11; /* Mailbox 11 */ + uint16_t mailbox12; /* Mailbox 12 */ + uint16_t mailbox13; /* Mailbox 13 */ + uint16_t mailbox14; /* Mailbox 14 */ + uint16_t mailbox15; /* Mailbox 15 */ + uint16_t mailbox16; /* Mailbox 16 */ + uint16_t mailbox17; /* Mailbox 17 */ + uint16_t mailbox18; /* Mailbox 18 */ + uint16_t mailbox19; /* Mailbox 19 */ + uint16_t mailbox20; /* Mailbox 20 */ + uint16_t mailbox21; /* Mailbox 21 */ + uint16_t mailbox22; /* Mailbox 22 */ + uint16_t mailbox23; /* Mailbox 23 */ +#endif + +}device_reg_t; + +/* + * 2300 ISP I/O Register Set structure definitions. + */ +typedef volatile struct +{ + uint16_t flash_address; /* Flash BIOS address */ + uint16_t flash_data; /* Flash BIOS data */ + uint16_t unused_1[1]; /* Gap */ + uint16_t ctrl_status; /* Control/Status */ + #define ISP_FLASH_ENABLE BIT_1 /* Flash BIOS Read/Write enable */ + #define ISP_RESET BIT_0 /* ISP soft reset */ + uint16_t ictrl; /* Interrupt control */ + #define ISP_EN_INT BIT_15 /* ISP enable interrupts. */ + #define ISP_EN_RISC BIT_3 /* ISP enable RISC interrupts. */ + uint16_t istatus; /* Interrupt status @0xa*/ + #define RISC_2300_INT BIT_15 /* 2300 RISC int for non-ROM cmds */ + uint16_t semaphore; /* Semaphore */ + uint16_t nvram; /* NVRAM register. @0xf */ + #define NV_DESELECT 0 + #define NV_CLOCK BIT_0 + #define NV_SELECT BIT_1 + #define NV_DATA_OUT BIT_2 + #define NV_DATA_IN BIT_3 + /* 2300 */ + uint16_t req_q_in /* @0x10 */; + uint16_t req_q_out /* @0x12 */; + uint16_t rsp_q_in /* @0x14 */; + uint16_t rsp_q_out /* @0x16 */; + uint32_t host_status /* @0x18 */; + uint16_t unused3[0x12]; + uint16_t mailbox0; /* Mailbox 0 @0x40 */ + uint16_t mailbox1; /* Mailbox 1 */ + uint16_t mailbox2; /* Mailbox 2 */ + uint16_t mailbox3; /* Mailbox 3 */ + uint16_t mailbox4; /* Mailbox 4 */ + uint16_t mailbox5; /* Mailbox 5 */ + uint16_t mailbox6; /* Mailbox 6 */ + uint16_t mailbox7; /* Mailbox 7 @0x4E */ + uint16_t mailbox8; /* Mailbox 8 */ + uint16_t mailbox9; /* Mailbox 9 */ + uint16_t mailbox10; /* Mailbox 10 */ + uint16_t mailbox11; /* Mailbox 11 */ + uint16_t mailbox12; /* Mailbox 12 */ + uint16_t mailbox13; /* Mailbox 13 */ + uint16_t mailbox14; /* Mailbox 14 */ + uint16_t mailbox15; /* Mailbox 15 */ + uint16_t mailbox16; /* Mailbox 16 */ + uint16_t mailbox17; /* Mailbox 17 */ + uint16_t mailbox18; /* Mailbox 18 */ + uint16_t mailbox19; /* Mailbox 19 */ + uint16_t mailbox20; /* Mailbox 20 */ + uint16_t mailbox21; /* Mailbox 21 */ + uint16_t mailbox22; /* Mailbox 22 */ + uint16_t mailbox23; /* Mailbox 23 */ + uint16_t mailbox24; /* Mailbox 24 */ + uint16_t mailbox25; /* Mailbox 25 */ + uint16_t mailbox26; /* Mailbox 26 */ + uint16_t mailbox27; /* Mailbox 27 */ + uint16_t mailbox28; /* Mailbox 28 */ + uint16_t mailbox29; /* Mailbox 29 */ + uint16_t mailbox30; /* Mailbox 30 */ + uint16_t mailbox31; /* Mailbox 31 @0x7E */ + uint16_t unused4[0xb]; /* gap */ + + uint16_t fpm_diag_config; + uint16_t unused_3[0x6]; /* Gap */ + uint16_t pcr; /* Processor Control Register. */ + uint16_t unused_4[0x5]; /* Gap */ + uint16_t mctr; /* Memory Configuration and Timing. */ + uint16_t unused_5[0x3]; /* Gap */ + uint16_t fb_cmd; + uint16_t unused_6[0x3]; /* Gap */ + uint16_t host_cmd; /* Host command and control */ + + #define HOST_INT BIT_7 /* host interrupt bit */ +#ifdef FC_IP_SUPPORT + uint16_t unused_3[0x0F]; /* Gap */ + uint16_t mailbox8; /* Mailbox 8 */ + uint16_t mailbox9; /* Mailbox 9 */ + uint16_t mailbox10; /* Mailbox 10 */ + uint16_t mailbox11; /* Mailbox 11 */ + uint16_t mailbox12; /* Mailbox 12 */ + uint16_t mailbox13; /* Mailbox 13 */ + uint16_t mailbox14; /* Mailbox 14 */ + uint16_t mailbox15; /* Mailbox 15 */ + uint16_t mailbox16; /* Mailbox 16 */ + uint16_t mailbox17; /* Mailbox 17 */ + uint16_t mailbox18; /* Mailbox 18 */ + uint16_t mailbox19; /* Mailbox 19 */ + uint16_t mailbox20; /* Mailbox 20 */ + uint16_t mailbox21; /* Mailbox 21 */ + uint16_t mailbox22; /* Mailbox 22 */ + uint16_t mailbox23; /* Mailbox 23 */ +#endif + +}device2300_reg_t; + + +#define MAILBOX_REGISTER_COUNT 32 + +/* + * ISP product identification definitions in mailboxes after reset. + */ +#define PROD_ID_1 0x4953 +#define PROD_ID_2 0x0000 +#define PROD_ID_2a 0x5020 +#define PROD_ID_3 0x2020 +#define PROD_ID_4 0x1 + +/* + * ISP host command and control register command definitions + */ +#define HC_RESET_RISC 0x1000 /* Reset RISC */ +#define HC_PAUSE_RISC 0x2000 /* Pause RISC */ +#define HC_RELEASE_RISC 0x3000 /* Release RISC from reset. */ +#define HC_SET_HOST_INT 0x5000 /* Set host interrupt */ +#define HC_CLR_HOST_INT 0x6000 /* Clear HOST interrupt */ +#define HC_CLR_RISC_INT 0x7000 /* Clear RISC interrupt */ +#define HC_RISC_PAUSE BIT_5 +#define HC_DISABLE_PARITY_PAUSE 0x4001 /* Disable parity error RISC pause. */ + +#define SEMAPHORE_SET 0x1234 + +/* + * ISP mailbox Self-Test status codes + */ +#define MBS_FRM_ALIVE 0 /* Firmware Alive. */ +#define MBS_CHKSUM_ERR 1 /* Checksum Error. */ +#define MBS_BUSY 4 /* Busy. */ + +/* + * ISP mailbox command complete status codes + */ +#define MBS_CMD_CMP 0x4000 /* Command Complete. */ +#define MBS_INV_CMD 0x4001 /* Invalid Command. */ +#define MBS_HOST_INF_ERR 0x4002 /* Host Interface Error. */ +#define MBS_TEST_FAILED 0x4003 /* Test Failed. */ +#define MBS_CMD_ERR 0x4005 /* Command Error. */ +#define MBS_CMD_PARAM_ERR 0x4006 /* Command Parameter Error. */ +#define MBS_FATAL_ERROR 0xF000 /* Command Fatal Error. */ + +#define MBS_FIRMWARE_ALIVE 0x0000 +#define MBS_COMMAND_COMPLETE 0x4000 +#define MBS_INVALID_COMMAND 0x4001 + +/* QLogic subroutine status definitions */ +#define QL_STATUS_SUCCESS 0 +#define QL_STATUS_ERROR 1 +#define QL_STATUS_FATAL_ERROR 2 +#define QL_STATUS_RESOURCE_ERROR 3 +#define QL_STATUS_LOOP_ID_IN_USE 4 +#define QL_STATUS_NO_DATA 5 + +/* + * ISP mailbox asynchronous event status codes + */ +#define MBA_ASYNC_EVENT 0x8000 /* Asynchronous event. */ +#define MBA_RESET 0x8001 /* Reset Detected. */ +#define MBA_SYSTEM_ERR 0x8002 /* System Error. */ +#define MBA_REQ_TRANSFER_ERR 0x8003 /* Request Transfer Error. */ +#define MBA_RSP_TRANSFER_ERR 0x8004 /* Response Transfer Error. */ +#define MBA_WAKEUP_THRES 0x8005 /* Request Queue Wake-up. */ +#define MBA_LIP_OCCURRED 0x8010 /* Loop Initialization Procedure */ + /* occurred. */ +#define MBA_LOOP_UP 0x8011 /* FC Loop UP. */ +#define MBA_LOOP_DOWN 0x8012 /* FC Loop Down. */ +#define MBA_LIP_RESET 0x8013 /* LIP reset occurred. */ +#define MBA_PORT_UPDATE 0x8014 /* Port Database update. */ +#define MBA_SCR_UPDATE 0x8015 /* State Change Registration. */ +#define MBA_SCSI_COMPLETION 0x8020 /* SCSI Command Complete. */ +#define MBA_CTIO_COMPLETION 0x8021 /* CTIO Complete. */ +#ifdef ISP2200 +#define MBA_LINK_MODE_UP 0x8030 /* FC Link Mode UP. */ +#define MBA_UPDATE_CONFIG 0x8036 /* FC Update Configuration. */ +#endif + +/* + * ISP mailbox commands + */ +#define MBC_LOAD_RAM 1 /* Load RAM. */ +#define MBC_EXECUTE_FIRMWARE 2 /* Execute firmware. */ +#define MBC_WRITE_RAM_WORD 4 /* Write RAM word. */ +#define MBC_READ_RAM_WORD 5 /* Read RAM word. */ +#define MBC_MAILBOX_REGISTER_TEST 6 /* Wrap incoming mailboxes */ +#define MBC_VERIFY_CHECKSUM 7 /* Verify checksum. */ +#define MBC_ABOUT_FIRMWARE 8 /* Get firmware revision. */ +#define MBC_DUMP_RAM 0xA /* READ BACK FW */ +#define MBC_DUMP_SRAM 0xC /* Dump SRAM */ +#define MBC_IOCB_EXECUTE 0x12 /* Execute an IOCB command */ +#define MBC_ABORT_COMMAND 0x15 /* Abort IOCB command. */ +#define MBC_ABORT_DEVICE 0x16 /* Abort device (ID/LUN). */ +#define MBC_ABORT_TARGET 0x17 /* Abort target (ID). */ +#define MBC_TARGET_RESET 0x18 /* Target reset. */ +#define MBC_GET_ADAPTER_LOOP_ID 0x20 /* Get loop id of ISP2100. */ +#define MBC_SET_TARGET_PARAMATERS 0x38 /* Set target parameters. */ +#define MBC_DIAGNOSTIC_LOOP_BACK 0x45 /* Perform LoopBack diagnostic */ +#define MBC_INITIALIZE_FIRMWARE 0x60 /* Initialize firmware */ +#define MBC_INITIATE_LIP 0x62 /* Initiate Loop Initialization */ + /* Procedure */ +#define MBC_GET_PORT_DATABASE 0x64 /* Get port database. */ +#define MBC_GET_FIRMWARE_STATE 0x69 /* Get firmware state. */ +#define MBC_GET_PORT_NAME 0x6a /* Get port name. */ +#define MBC_LIP_RESET 0x6c /* LIP reset. */ +#define MBC_SEND_SNS_COMMAND 0x6e /* Send Simple Name Server command. */ +#define MBC_LOGIN_FABRIC_PORT 0x6f /* Login fabric port. */ +#define MBC_LOGOUT_FABRIC_PORT 0x71 /* Logout fabric port. */ +#define MBC_LIP_FULL_LOGIN 0x72 /* Full login LIP. */ +#define MBC_GET_PORT_LIST 0x75 /* Get port list. */ + +/* + * Firmware state codes from get firmware state mailbox command + */ +#define FSTATE_CONFIG_WAIT 0 +#define FSTATE_WAIT_AL_PA 1 +#define FSTATE_WAIT_LOGIN 2 +#define FSTATE_READY 3 +#define FSTATE_LOSS_OF_SYNC 4 +#define FSTATE_ERROR 5 +#define FSTATE_REINIT 6 +#define FSTATE_NON_PART 7 + +#define FSTATE_CONFIG_CORRECT 0 +#define FSTATE_P2P_RCV_LIP 1 +#define FSTATE_P2P_CHOOSE_LOOP 2 +#define FSTATE_P2P_RCV_UNIDEN_LIP 3 +#define FSTATE_FATAL_ERROR 4 +#define FSTATE_LOOP_BACK_CONN 5 + +/* + * ISP Initialization Control Block. + */ +typedef struct +{ + uint8_t version; + #define ICB_VERSION 1 + uint8_t reserved_1; + struct + { + uint8_t enable_hard_loop_id :1; /* bit 0 */ + uint8_t enable_fairness :1; + uint8_t enable_full_duplex :1; + uint8_t enable_fast_posting :1; + uint8_t enable_target_mode :1; + uint8_t disable_initiator_mode :1; + uint8_t enable_adisc :1; + uint8_t enable_lun_response :1; /* bit 7 */ + uint8_t enable_port_update_event :1; + uint8_t disable_initial_lip :1; + uint8_t enable_decending_soft_assign :1; + uint8_t previous_assigned_addressing :1; + uint8_t enable_stop_q_on_full :1; + uint8_t enable_full_login_on_lip :1; + uint8_t enable_name_change :1; + uint8_t expanded_ifwcb :1; /* bit 15 */ + }firmware_options; + uint16_t frame_length; + uint16_t iocb_allocation; + uint16_t execution_throttle; + uint8_t retry_count; + uint8_t retry_delay; +#ifdef ISP2200 + uint8_t port_name[8]; +#else + uint8_t node_name[8]; +#endif + uint16_t adapter_hard_loop_id; + uint8_t inquiry_data; + uint8_t login_timeout; +#ifdef ISP2200 + uint8_t node_name[8]; +#else + uint8_t reserved_1[8]; +#endif + uint16_t request_q_outpointer; + uint16_t response_q_inpointer; + uint16_t request_q_length; + uint16_t response_q_length; + uint32_t request_q_address[2]; + uint32_t response_q_address[2]; + uint16_t lun_enables; + uint8_t command_resource_count; + uint8_t immediate_notify_resource_count; + uint16_t timeout; + uint16_t reserved_2; + struct + { + uint8_t operation_mode :4; /* Bits 0 1 2 3 */ + uint8_t connection_options :3; /* Bits 4 5 6 */ + #define LOOP 0 + #define P2P 1 + #define LOOP_P2P 2 + #define P2P_LOOP 3 + uint8_t nonpart_if_hard_addr_failed :1; /* Bit 7 */ + uint8_t enable_class2 :1; /* Bit 8 */ + uint8_t enable_ack0 :1; /* Bit 9 */ + uint8_t unused_10 :1; /* bit 10 */ + uint8_t unused_11 :1; /* bit 11 */ + uint8_t enable_fc_tape :1; /* bit 12 */ + uint8_t enable_fc_confirm :1; /* bit 13 */ + uint8_t enable_cmd_q_target_mode :1; /* bit 14 */ + uint8_t unused_15 :1; /* bit 15 */ + }additional_firmware_options; + uint8_t response_accum_timer; + uint8_t interrupt_delay_timer; + struct + { + uint8_t enable_read_xfr_rdy :1; /* Bit 0 */ + uint8_t soft_id_only :1; /* Bit 1 */ + uint8_t unused_2 :1; /* Bit 2 */ + uint8_t unused_3 :1; /* Bit 3 */ + uint8_t fcp_rsp_payload :2; /* Bits 4 5 */ + #define send_24_bytes_0 0 + #define send_12_bytes_0 1 + #define second_send_24_bytes_0 2 + #define send_32_bytes_0 3 + uint8_t unused_6 :1; /* Bit 6 */ + uint8_t unused_7 :1; /* Bit 7 */ + uint8_t unused_8 :1; /* Bit 8 */ + uint8_t unused_9 :1; /* Bit 9 */ + uint8_t unused_10 :1; /* Bit 10 */ + uint8_t unused_11 :1; /* Bit 11 */ + uint8_t unused_12 :1; /* Bit 12 */ + uint8_t set_50_ohms_term_enable :1; /* Bit 13 */ + uint8_t data_rate :2; /* Bits 14 15 */ + #define set_1_gig_rate 0 + #define set_2_gig_rate 1 + #define auto_negotiate 2 + }special_options; + uint16_t reserved_3[13]; +}init_cb_t; + +/* + * ISP Get/Set Target Parameters mailbox command control flags. + */ + +/* + * NVRAM Command values. + */ +#define NV_START_BIT BIT_2 +#define NV_WRITE_OP (BIT_26+BIT_24) +#define NV_READ_OP (BIT_26+BIT_25) +#define NV_ERASE_OP (BIT_26+BIT_25+BIT_24) +#define NV_MASK_OP (BIT_26+BIT_25+BIT_24) +#define NV_DELAY_COUNT 10 + +/* + * ISP2200 NVRAM structure definitions. + */ +typedef struct +{ + /* + * NVRAM header + */ + + uint8_t id[4]; + uint8_t nvram_version; + uint8_t reserved_0; + + /* + * NVRAM RISC parameter block + */ + + uint8_t parameter_block_version; + uint8_t reserved_1; + + struct + { + uint8_t enable_hard_loop_id :1; + uint8_t enable_fairness :1; + uint8_t enable_full_duplex :1; + uint8_t enable_fast_posting :1; + uint8_t enable_target_mode :1; + uint8_t disable_initiator_mode :1; + uint8_t enable_adisc :1; + uint8_t enable_lun_response :1; + uint8_t enable_port_update_event :1; + uint8_t disable_initial_lip :1; + uint8_t enable_decending_soft_assign :1; + uint8_t previous_assigned_addressing :1; + uint8_t enable_stop_q_on_full :1; + uint8_t enable_full_login_on_lip :1; + uint8_t enable_name_change :1; + uint8_t expanded_ifwcb :1; + }firmware_options; + + uint16_t frame_payload_size; + uint16_t max_iocb_allocation; + uint16_t execution_throttle; + uint8_t retry_count; + uint8_t retry_delay; + uint8_t port_name[8]; + uint16_t adapter_hard_loop_id; + uint8_t inquiry_data; + uint8_t login_timeout; + + uint8_t node_name[8]; + + /* Expanded RISC parameter block */ + struct + { + uint8_t operation_mode :4; + uint8_t connection_options :3; + uint8_t nonpart_if_hard_addr_failed :1; + uint8_t enable_class2 :1; + uint8_t enable_ack0 :1; + uint8_t unused_10 :1; + uint8_t unused_11 :1; + uint8_t enable_fc_tape :1; + uint8_t enable_fc_confirm :1; + uint8_t enable_command_reference_num :1; + }additional_firmware_options; + + uint8_t response_accum_timer; + uint8_t interrupt_delay_timer; + uint16_t reserved_2[14]; + + /* + * NVRAM host parameter block + */ + + struct + { + uint8_t unused_0 :1; + uint8_t disable_bios :1; + uint8_t disable_luns :1; + uint8_t enable_selectable_boot :1; + uint8_t disable_risc_code_load :1; + uint8_t set_cache_line_size_1 :1; + uint8_t pci_parity_disable :1; + uint8_t enable_extended_logging :1; + uint8_t enable_64bit_addressing :1; + uint8_t enable_lip_reset :1; + uint8_t enable_lip_full_login :1; + uint8_t enable_target_reset :1; + uint8_t enable_database_storage :1; + uint8_t unused_13 :1; + uint8_t unused_14 :1; + uint8_t unused_15 :1; + }host_p; + + uint8_t boot_node_name[8]; + uint8_t boot_lun_number; + uint8_t reset_delay; + uint8_t port_down_retry_count; + uint8_t reserved_3; + + uint16_t maximum_luns_per_target; + + uint16_t reserved_6[7]; + + /* Offset 100 */ + uint16_t reserved_7[25]; + + /* Offset 150 */ + uint16_t reserved_8[25]; + + /* Offset 200 */ + uint8_t oem_id; + + uint8_t oem_spare0; + + uint8_t oem_string[6]; + + uint8_t oem_part[8]; + + uint8_t oem_fru[8]; + + uint8_t oem_ec[8]; + + + /* Offset 232 */ + struct + { + uint8_t external_gbic :1; + uint8_t risc_ram_parity :1; + uint8_t buffer_plus_module :1; + uint8_t multi_chip_hba :1; + uint8_t unused_1 :1; + uint8_t unused_2 :1; + uint8_t unused_3 :1; + uint8_t unused_4 :1; + uint8_t unused_5 :1; + uint8_t unused_6 :1; + uint8_t unused_7 :1; + uint8_t unused_8 :1; + uint8_t unused_9 :1; + uint8_t unused_10 :1; + uint8_t unused_11 :1; + uint8_t unused_12 :1; + }hba_features; + + uint16_t reserved_9; + uint16_t reserved_10; + uint16_t reserved_11; + + uint16_t reserved_12; + uint16_t reserved_13; + + /* Subsystem ID must be at offset 244 */ + uint16_t subsystem_vendor_id; + + uint16_t reserved_14; + + /* Subsystem device ID must be at offset 248 */ + uint16_t subsystem_device_id; + + uint16_t reserved_15[2]; + uint8_t reserved_16; + uint8_t checksum; +}nvram22_t; + +typedef struct +{ + /* + * NVRAM header for 2100 board. + */ + + uint8_t id[4]; + uint8_t nvram_version; + uint8_t reserved_0; + + /* + * NVRAM RISC parameter block + */ + + uint8_t parameter_block_version; + uint8_t reserved_1; + + struct + { + uint8_t enable_hard_loop_id :1; + uint8_t enable_fairness :1; + uint8_t enable_full_duplex :1; + uint8_t enable_fast_posting :1; + uint8_t enable_target_mode :1; + uint8_t disable_initiator_mode :1; + uint8_t enable_adisc :1; + uint8_t enable_lun_response :1; + uint8_t enable_port_update_event :1; + uint8_t disable_initial_lip :1; + uint8_t enable_decending_soft_assign :1; + uint8_t previous_assigned_addressing :1; + uint8_t enable_stop_q_on_full :1; + uint8_t enable_full_login_on_lip :1; + uint8_t enable_name_change :1; + uint8_t unused_15 :1; + }firmware_options; + + uint16_t frame_payload_size; + uint16_t max_iocb_allocation; + uint16_t execution_throttle; + uint8_t retry_count; + uint8_t retry_delay; + uint8_t node_name[8]; + uint16_t adapter_hard_loop_id; + uint8_t reserved_2; + uint8_t login_timeout; + uint16_t reserved_3[4]; + + /* Reserved for expanded RISC parameter block */ + uint16_t reserved_4[16]; + + /* + * NVRAM host parameter block + */ + + struct + { + uint8_t unused_0 :1; + uint8_t disable_bios :1; + uint8_t disable_luns :1; + uint8_t enable_selectable_boot :1; + uint8_t disable_risc_code_load :1; + uint8_t set_cache_line_size_1 :1; + uint8_t pci_parity_disable :1; + uint8_t enable_extended_logging :1; + uint8_t enable_64bit_addressing :1; + uint8_t enable_lip_reset :1; + uint8_t enable_lip_full_login :1; + uint8_t enable_target_reset :1; + uint8_t enable_database_storage :1; + uint8_t unused_13 :1; + uint8_t unused_14 :1; + uint8_t unused_15 :1; + }host_p; + + uint8_t boot_node_name[8]; + uint8_t boot_lun_number; + uint8_t reset_delay; + uint8_t port_down_retry_count; + uint8_t reserved_5; + + uint16_t maximum_luns_per_target; + + uint16_t reserved_6[7]; + + /* Offset 100 */ + uint16_t reserved_7[25]; + + /* Offset 150 */ + uint16_t reserved_8[25]; + + /* Offset 200 */ + uint16_t reserved_9[22]; + + /* Subsystem ID must be at offset 244 */ + uint16_t subsystem_vendor_id; + + uint16_t reserved_10; + + /* Subsystem device ID must be at offset 248 */ + uint16_t subsystem_device_id; + + uint16_t reserved_11[2]; + uint8_t reserved_12; + uint8_t checksum; +}nvram21_t; + +/* + * ISP queue - command entry structure definition. + */ +#define MAX_CMDSZ 16 /* SCSI maximum CDB size. */ +typedef struct +{ + uint8_t entry_type; /* Entry type. */ + #define COMMAND_TYPE 0x11 /* Command entry */ + uint8_t entry_count; /* Entry count. */ + uint8_t sys_define; /* System defined. */ + uint8_t entry_status; /* Entry Status. */ + uint32_t handle; /* System handle. */ + uint8_t reserved; + uint8_t target; /* SCSI ID */ + uint16_t lun; /* SCSI LUN */ + uint16_t control_flags; /* Control flags. */ +#define CF_HEAD_TAG BIT_1 +#define CF_ORDERED_TAG BIT_2 +#define CF_SIMPLE_TAG BIT_3 +#define CF_READ BIT_5 +#define CF_WRITE BIT_6 +#define CF_NO_FAST_POSTING BIT_7 + uint16_t reserved_1; + uint16_t timeout; /* Command timeout. */ + uint16_t dseg_count; /* Data segment count. */ + uint8_t scsi_cdb[MAX_CMDSZ]; /* SCSI command words. */ + uint32_t byte_count; /* Total byte count. */ + uint32_t dseg_0_address; /* Data segment 0 address. */ + uint32_t dseg_0_length; /* Data segment 0 length. */ + uint32_t dseg_1_address; /* Data segment 1 address. */ + uint32_t dseg_1_length; /* Data segment 1 length. */ + uint32_t dseg_2_address; /* Data segment 2 address. */ + uint32_t dseg_2_length; /* Data segment 2 length. */ +}cmd_entry_t; + +/* + * ISP queue - 64-Bit addressing, command entry structure definition. + */ +typedef struct +{ + uint8_t entry_type; /* Entry type. */ + #define COMMAND_A64_TYPE 0x19 /* Command A64 entry */ + uint8_t entry_count; /* Entry count. */ + uint8_t sys_define; /* System defined. */ + uint8_t entry_status; /* Entry Status. */ + uint32_t handle; /* System handle. */ + uint8_t reserved; + uint8_t target; /* SCSI ID */ + uint16_t lun; /* SCSI LUN */ + uint16_t control_flags; /* Control flags. */ + uint16_t reserved_1; + uint16_t timeout; /* Command timeout. */ + uint16_t dseg_count; /* Data segment count. */ + uint8_t scsi_cdb[MAX_CMDSZ]; /* SCSI command words. */ + uint32_t byte_count; /* Total byte count. */ + uint32_t dseg_0_address[2]; /* Data segment 0 address. */ + uint32_t dseg_0_length; /* Data segment 0 length. */ + uint32_t dseg_1_address[2]; /* Data segment 1 address. */ + uint32_t dseg_1_length; /* Data segment 1 length. */ +}cmd_a64_entry_t, request_t; + +/* + * ISP queue - continuation entry structure definition. + */ +typedef struct +{ + uint8_t entry_type; /* Entry type. */ + #define CONTINUE_TYPE 0x02 /* Continuation entry. */ + uint8_t entry_count; /* Entry count. */ + uint8_t sys_define; /* System defined. */ + uint8_t entry_status; /* Entry Status. */ + uint32_t reserved; + uint32_t dseg_0_address; /* Data segment 0 address. */ + uint32_t dseg_0_length; /* Data segment 0 length. */ + uint32_t dseg_1_address; /* Data segment 1 address. */ + uint32_t dseg_1_length; /* Data segment 1 length. */ + uint32_t dseg_2_address; /* Data segment 2 address. */ + uint32_t dseg_2_length; /* Data segment 2 length. */ + uint32_t dseg_3_address; /* Data segment 3 address. */ + uint32_t dseg_3_length; /* Data segment 3 length. */ + uint32_t dseg_4_address; /* Data segment 4 address. */ + uint32_t dseg_4_length; /* Data segment 4 length. */ + uint32_t dseg_5_address; /* Data segment 5 address. */ + uint32_t dseg_5_length; /* Data segment 5 length. */ + uint32_t dseg_6_address; /* Data segment 6 address. */ + uint32_t dseg_6_length; /* Data segment 6 length. */ +}cont_entry_t; + +/* + * ISP queue - 64-Bit addressing, continuation entry structure definition. + */ +typedef struct +{ + uint8_t entry_type; /* Entry type. */ + #define CONTINUE_A64_TYPE 0x0A /* Continuation A64 entry. */ + uint8_t entry_count; /* Entry count. */ + uint8_t sys_define; /* System defined. */ + uint8_t entry_status; /* Entry Status. */ + uint32_t dseg_0_address[2]; /* Data segment 0 address. */ + uint32_t dseg_0_length; /* Data segment 0 length. */ + uint32_t dseg_1_address[2]; /* Data segment 1 address. */ + uint32_t dseg_1_length; /* Data segment 1 length. */ + uint32_t dseg_2_address[2]; /* Data segment 2 address. */ + uint32_t dseg_2_length; /* Data segment 2 length. */ + uint32_t dseg_3_address[2]; /* Data segment 3 address. */ + uint32_t dseg_3_length; /* Data segment 3 length. */ + uint32_t dseg_4_address[2]; /* Data segment 4 address. */ + uint32_t dseg_4_length; /* Data segment 4 length. */ +}cont_a64_entry_t; + +/* + * ISP queue - status entry structure definition. + */ +typedef struct +{ + uint8_t entry_type; /* Entry type. */ + #define STATUS_TYPE 0x03 /* Status entry. */ + uint8_t entry_count; /* Entry count. */ + uint8_t sys_define; /* System defined. */ + uint8_t entry_status; /* Entry Status. */ + #define RF_INV_E_ORDER BIT_5 /* Invalid entry order. */ + #define RF_INV_E_COUNT BIT_4 /* Invalid entry count. */ + #define RF_INV_E_PARAM BIT_3 /* Invalid entry parameter. */ + #define RF_INV_E_TYPE BIT_2 /* Invalid entry type. */ + #define RF_BUSY BIT_1 /* Busy */ + uint32_t handle; /* System handle. */ + uint16_t scsi_status; /* SCSI status. */ + uint16_t comp_status; /* Completion status. */ + uint16_t state_flags; /* State flags. */ + uint16_t status_flags; /* Status flags. */ + #define IOCBSTAT_SF_LOGO 0x2000 /* logo after 2 abts w/ no response (2 sec) */ + uint16_t rsp_info_len; /* Response Info Length. */ + uint16_t req_sense_length; /* Request sense data length. */ + uint32_t residual_length; /* Residual transfer length. */ + uint8_t rsp_info[8]; /* FCP response information. */ + uint8_t req_sense_data[32]; /* Request sense data. */ +}sts_entry_t, response_t; + +/* + * ISP queue - marker entry structure definition. + */ +typedef struct +{ + uint8_t entry_type; /* Entry type. */ + #define MARKER_TYPE 0x04 /* Marker entry. */ + uint8_t entry_count; /* Entry count. */ + uint8_t sys_define; /* System defined. */ + uint8_t entry_status; /* Entry Status. */ + uint32_t sys_define_2; /* System defined. */ + uint8_t reserved; + uint8_t target; /* SCSI ID */ + uint8_t modifier; /* Modifier (7-0). */ + #define MK_SYNC_ID_LUN 0 /* Synchronize ID/LUN */ + #define MK_SYNC_ID 1 /* Synchronize ID */ + #define MK_SYNC_ALL 2 /* Synchronize all ID/LUN */ + #define MK_SYNC_LIP 3 /* Synchronize all ID/LUN, */ + /* clear port changed, */ + /* use sequence number. */ + uint8_t reserved_1; + uint16_t sequence_number; /* Sequence number of event */ + uint16_t lun; /* SCSI LUN */ + uint8_t reserved_2[48]; +}mrk_entry_t; + +/* + * ISP queue - enable LUN entry structure definition. + */ +typedef struct +{ + uint8_t entry_type; /* Entry type. */ + #define ENABLE_LUN_TYPE 0x0B /* Enable LUN entry. */ + uint8_t entry_count; /* Entry count. */ + uint8_t sys_define; /* System defined. */ + uint8_t entry_status; /* Entry Status. */ + uint32_t sys_define_2; /* System defined. */ + uint8_t reserved_8; + uint8_t reserved_1; + uint16_t reserved_2; + uint32_t reserved_3; + uint8_t status; + uint8_t reserved_4; + uint8_t command_count; /* Number of ATIOs allocated. */ + uint8_t immed_notify_count; /* Number of Immediate Notify */ + /* entries allocated. */ + uint16_t reserved_5; + uint16_t timeout; /* 0 = 30 seconds, 0xFFFF = disable */ + uint16_t reserved_6[20]; +}elun_entry_t; + +/* + * ISP queue - modify LUN entry structure definition. + */ +typedef struct +{ + uint8_t entry_type; /* Entry type. */ + #define MODIFY_LUN_TYPE 0x0C /* Modify LUN entry. */ + uint8_t entry_count; /* Entry count. */ + uint8_t sys_define; /* System defined. */ + uint8_t entry_status; /* Entry Status. */ + uint32_t sys_define_2; /* System defined. */ + uint8_t reserved_8; + uint8_t reserved_1; + uint8_t operators; + uint8_t reserved_2; + uint32_t reserved_3; + uint8_t status; + uint8_t reserved_4; + uint8_t command_count; /* Number of ATIOs allocated. */ + uint8_t immed_notify_count; /* Number of Immediate Notify */ + /* entries allocated. */ + uint16_t reserved_5; + uint16_t timeout; /* 0 = 30 seconds, 0xFFFF = disable */ + uint16_t reserved_7[20]; +}modify_lun_entry_t; + +/* + * ISP queue - immediate notify entry structure definition. + */ +typedef struct +{ + uint8_t entry_type; /* Entry type. */ + #define IMMED_NOTIFY_TYPE 0x0D /* Immediate notify entry. */ + uint8_t entry_count; /* Entry count. */ + uint8_t sys_define; /* System defined. */ + uint8_t entry_status; /* Entry Status. */ + uint32_t sys_define_2; /* System defined. */ + uint8_t reserved_8; + uint8_t initiator_id; + uint8_t reserved_1; + uint8_t target_id; + uint32_t reserved_2; + uint16_t status; + uint16_t task_flags; + uint16_t seq_id; + uint16_t reserved_5[11]; + uint16_t scsi_status; + uint8_t sense_data[18]; +}notify_entry_t; + +/* + * ISP queue - notify acknowledge entry structure definition. + */ +typedef struct +{ + uint8_t entry_type; /* Entry type. */ + #define NOTIFY_ACK_TYPE 0x0E /* Notify acknowledge entry. */ + uint8_t entry_count; /* Entry count. */ + uint8_t sys_define; /* System defined. */ + uint8_t entry_status; /* Entry Status. */ + uint32_t sys_define_2; /* System defined. */ + uint8_t reserved_8; + uint8_t initiator_id; + uint8_t reserved_1; + uint8_t target_id; + uint16_t flags; + uint16_t reserved_2; + uint16_t status; + uint16_t task_flags; + uint16_t seq_id; + uint16_t reserved_3[21]; +}nack_entry_t; + +/* + * ISP queue - Accept Target I/O (ATIO) entry structure definition. + */ +typedef struct +{ + uint8_t entry_type; /* Entry type. */ + #define ACCEPT_TGT_IO_TYPE 0x16 /* Accept target I/O entry. */ + uint8_t entry_count; /* Entry count. */ + uint8_t sys_define; /* System defined. */ + uint8_t entry_status; /* Entry Status. */ + uint32_t sys_define_2; /* System defined. */ + uint8_t reserved_8; + uint8_t initiator_id; + uint16_t exchange_id; + uint16_t flags; + uint16_t status; + uint8_t reserved_1; + uint8_t task_codes; + uint8_t task_flags; + uint8_t execution_codes; + uint8_t cdb[MAX_CMDSZ]; + uint32_t data_length; + uint16_t lun; + uint16_t reserved_2A; + uint16_t scsi_status; + uint8_t sense_data[18]; +}atio_entry_t; + +/* + * ISP queue - Continue Target I/O (CTIO) entry for status mode 0 + * structure definition. + */ +typedef struct +{ + uint8_t entry_type; /* Entry type. */ + #define CONTINUE_TGT_IO_TYPE 0x17 /* CTIO entry */ + uint8_t entry_count; /* Entry count. */ + uint8_t sys_define; /* System defined. */ + uint8_t entry_status; /* Entry Status. */ + uint32_t sys_define_2; /* System defined. */ + uint8_t reserved_8; + uint8_t initiator_id; + uint16_t exchange_id; + uint16_t flags; + uint16_t status; + uint16_t timeout; /* 0 = 30 seconds, 0xFFFF = disable */ + uint16_t dseg_count; /* Data segment count. */ + uint32_t relative_offset; + uint32_t residual; + uint16_t reserved_1[3]; + uint16_t scsi_status; + uint32_t transfer_length; + uint32_t dseg_0_address; /* Data segment 0 address. */ + uint32_t dseg_0_length; /* Data segment 0 length. */ + uint32_t dseg_1_address; /* Data segment 1 address. */ + uint32_t dseg_1_length; /* Data segment 1 length. */ + uint32_t dseg_2_address; /* Data segment 2 address. */ + uint32_t dseg_2_length; /* Data segment 2 length. */ +}ctio_entry_t; + +/* + * ISP queue - CTIO returned entry structure definition. + */ +typedef struct +{ + uint8_t entry_type; /* Entry type. */ + #define CTIO_RET_TYPE 0x17 /* CTIO return entry */ + uint8_t entry_count; /* Entry count. */ + uint8_t sys_define; /* System defined. */ + uint8_t entry_status; /* Entry Status. */ + uint32_t sys_define_2; /* System defined. */ + uint8_t reserved_8; + uint8_t initiator_id; + uint16_t exchange_id; + uint16_t flags; + uint16_t status; + uint16_t timeout; /* 0 = 30 seconds, 0xFFFF = disable */ + uint16_t dseg_count; /* Data segment count. */ + uint32_t relative_offset; + uint32_t residual; + uint16_t reserved_1[8]; + uint16_t scsi_status; + uint8_t sense_data[18]; +}ctio_ret_entry_t; + +/* + * ISP queue - CTIO A64 entry structure definition. + */ +typedef struct +{ + uint8_t entry_type; /* Entry type. */ + #define CTIO_A64_TYPE 0x1F /* CTIO A64 entry */ + uint8_t entry_count; /* Entry count. */ + uint8_t sys_define; /* System defined. */ + uint8_t entry_status; /* Entry Status. */ + uint32_t sys_define_2; /* System defined. */ + uint8_t reserved_8; + uint8_t initiator_id; + uint16_t exchange_id; + uint16_t flags; + uint16_t status; + uint16_t timeout; /* 0 = 30 seconds, 0xFFFF = disable */ + uint16_t dseg_count; /* Data segment count. */ + uint32_t relative_offset; + uint32_t residual; + uint16_t reserved_1[3]; + uint16_t scsi_status; + uint32_t transfer_length; + uint32_t dseg_0_address[2]; /* Data segment 0 address. */ + uint32_t dseg_0_length; /* Data segment 0 length. */ + uint32_t dseg_1_address[2]; /* Data segment 1 address. */ + uint32_t dseg_1_length; /* Data segment 1 length. */ +}ctio_a64_entry_t; + +/* + * ISP queue - CTIO returned entry structure definition. + */ +typedef struct +{ + uint8_t entry_type; /* Entry type. */ + #define CTIO_A64_RET_TYPE 0x1F /* CTIO A64 returned entry */ + uint8_t entry_count; /* Entry count. */ + uint8_t sys_define; /* System defined. */ + uint8_t entry_status; /* Entry Status. */ + uint32_t sys_define_2; /* System defined. */ + uint8_t reserved_8; + uint8_t initiator_id; + uint16_t exchange_id; + uint16_t flags; + uint16_t status; + uint16_t timeout; /* 0 = 30 seconds, 0xFFFF = disable */ + uint16_t dseg_count; /* Data segment count. */ + uint32_t relative_offset; + uint32_t residual; + uint16_t reserved_1[8]; + uint16_t scsi_status; + uint8_t sense_data[18]; +}ctio_a64_ret_entry_t; + +/* + * ISP queue - Status Contination entry structure definition. + */ +typedef struct +{ + uint8_t entry_type; /* Entry type. */ + #define STATUS_CONT_TYPE 0x10 /* Status contination entry */ + uint8_t entry_count; /* Entry count. */ + uint8_t reserved; + uint8_t entry_status; /* Entry Status. */ + uint8_t sense_data[60]; +}status_cont_entry_t; + +/* + * ISP queue - Command Set entry structure definition. + */ +typedef struct +{ + uint8_t entry_type; /* Entry type. */ + #define CMD_SET_TYPE 0x18 /* Command set entry */ + uint8_t entry_count; /* Entry count. */ + uint8_t sys_define; /* System defined. */ + uint8_t entry_status; /* Entry Status. */ + uint32_t sys_define_2; /* System defined. */ + uint16_t reserved; + uint16_t status; + uint16_t control_flags; /* Control flags. */ + uint16_t count; + uint32_t iocb_0_address; + uint32_t iocb_1_address; + uint32_t iocb_2_address; + uint32_t iocb_3_address; + uint32_t iocb_4_address; + uint32_t iocb_5_address; + uint32_t iocb_6_address; + uint32_t iocb_7_address; + uint32_t iocb_8_address; + uint32_t iocb_9_address; + uint32_t iocb_10_address; + uint32_t iocb_11_address; +}cmd_set_entry_t; + +/* + * ISP queue - Command Set A64 entry structure definition. + */ +typedef struct +{ + uint8_t entry_type; /* Entry type. */ + #define CMD_SET_TYPE 0x18 /* Command set entry */ + uint8_t entry_count; /* Entry count. */ + uint8_t sys_define; /* System defined. */ + uint8_t entry_status; /* Entry Status. */ + uint32_t sys_define_2; /* System defined. */ + uint16_t reserved; + uint16_t status; + uint16_t control_flags; /* Control flags. */ + uint16_t count; + uint32_t iocb_0_address[2]; + uint32_t iocb_1_address[2]; + uint32_t iocb_2_address[2]; + uint32_t iocb_3_address[2]; + uint32_t iocb_4_address[2]; + uint32_t iocb_5_address[2]; +}cmd_set_a64_entry_t; + +/* 4.11 + * ISP queue - Command Set entry structure definition. + */ +typedef struct +{ + uint8_t entry_type; /* Entry type. */ + #define MS_IOCB_TYPE 0x29 /* Management Server IOCB entry */ + uint8_t entry_count; /* Entry count. */ + uint8_t sys_define; /* System defined. */ + uint8_t entry_status; /* Entry Status. */ + uint32_t handle; /* System handle. */ + uint8_t reserved; + uint8_t loop_id; + uint16_t status; + uint16_t control_flags; /* Control flags. */ + uint16_t reserved2; + uint16_t timeout; + uint16_t DSDcount; + uint16_t RespDSDcount; + uint8_t reserved3[10]; + uint32_t Response_bytecount; + uint32_t Request_bytecount; + uint32_t dseg_req_address[2]; /* Data segment 0 address. */ + uint32_t dseg_req_length; /* Data segment 0 length. */ + uint32_t dseg_rsp_address[2]; /* Data segment 1 address. */ + uint32_t dseg_rsp_length; /* Data segment 1 length. */ +}cmd_ms_iocb_entry_t; + + +/* + * ISP request and response queue entry sizes + */ +#define RESPONSE_ENTRY_SIZE (sizeof(response_t)) +#define REQUEST_ENTRY_SIZE (sizeof(request_t)) + +/* + * ISP status entry - completion status definitions. + */ +#define CS_COMPLETE 0x0 /* No errors */ +#define CS_INCOMPLETE 0x1 /* Incomplete transfer of cmd. */ +#define CS_DMA 0x2 /* A DMA direction error. */ +#define CS_TRANSPORT 0x3 /* Transport error. */ +#define CS_RESET 0x4 /* SCSI bus reset occurred */ +#define CS_ABORTED 0x5 /* System aborted command. */ +#define CS_TIMEOUT 0x6 /* Timeout error. */ +#define CS_DATA_OVERRUN 0x7 /* Data overrun. */ +#define CS_DATA_UNDERRUN 0x15 /* Data Underrun. */ +#define CS_ABORT_MSG 0xE /* Target rejected abort msg. */ +#define CS_DEV_RESET_MSG 0x12 /* Target rejected dev rst msg. */ +#define CS_PORT_UNAVAILABLE 0x28 /* Port unavailable (selection timeout) */ +#define CS_PORT_LOGGED_OUT 0x29 /* Port Logged Out */ +#define CS_PORT_CONFIG_CHG 0x2A /* Port Configuration Changed */ +#define CS_PORT_BUSY 0x2B /* Port Busy */ +#define CS_BAD_PAYLOAD 0x80 /* Driver defined */ +#define CS_UNKNOWN 0x81 /* Driver defined */ +#define CS_RETRY 0x82 /* Driver defined */ + +/* + * ISP status entry - SCSI status byte bit definitions. + */ +#define SS_RESIDUAL_UNDER BIT_11 +#define SS_RESIDUAL_OVER BIT_10 +#define SS_SENSE_LEN_VALID BIT_9 +#ifdef ISP2200 +#define SS_RESPONSE_INFO_LEN_VALID BIT_8 +#else +#define SS_RESIDUAL_LEN_VALID BIT_8 +#endif + +#define SS_RESERVE_CONFLICT (BIT_4 | BIT_3) +#define SS_BUSY_CONDITION BIT_3 +#define SS_CONDITION_MET BIT_2 +#define SS_CHECK_CONDITION BIT_1 + +/* + * ISP target entries - Flags bit definitions. + */ +#define OF_RESET BIT_5 /* Reset LIP flag */ +#define OF_DATA_IN BIT_6 /* Data in to initiator */ + /* (data from target to initiator) */ +#define OF_DATA_OUT BIT_7 /* Data out from initiator */ + /* (data from initiator to target) */ +#define OF_NO_DATA (BIT_7 | BIT_6) +#define OF_INC_RC BIT_8 /* Increment command resource count */ +#define OF_FAST_POST BIT_9 /* Enable mailbox fast posting. */ +#define OF_SSTS BIT_15 /* Send SCSI status */ + +/* + * Target Read/Write buffer structure. + */ +#define TARGET_DATA_OFFSET 4 +#define TARGET_DATA_SIZE 0x2000 /* 8K */ +#define TARGET_INQ_OFFSET (TARGET_DATA_OFFSET + TARGET_DATA_SIZE) +#define TARGET_SENSE_SIZE 18 +#define TARGET_BUF_SIZE 36 + +#if QL1280_TARGET_MODE_SUPPORT +typedef struct +{ + uint8_t hdr[4]; + uint8_t data[TARGET_DATA_SIZE]; +}tgt_buf_t; +#endif /* QL1280_TARGET_MODE_SUPPORT */ +typedef struct +{ + uint16_t loop_id; +#ifdef QL_MAPPED_TARGETS + uint16_t lun_offset; +#endif + uint32_t down_timer; + scsi_lu_t *luns[MAX_LUNS]; +}tgt_t; + +/* + * 24 bit port ID type definition. + */ +typedef union { + struct { + uint8_t port_id[3]; + uint8_t rsvd_1; + }r; +#if defined(_BIT_FIELDS_LTOH) + uint32_t b24 : 24, + rsvd : 8; + struct { + uint8_t al_pa; + uint8_t area; + uint8_t domain; + uint8_t rsvd_1; + }b; +#else + uint32_t rsvd : 8, + b24 : 24; + struct { + uint8_t domain; + uint8_t area; + uint8_t al_pa; + uint8_t rsvd_1; + }b; +#endif +} port_id_t; + + +typedef struct +{ + uint8_t name[8]; /* big endian node name */ + uint8_t wwn[8]; /* big endian port name */ + uint16_t loop_id; + uint8_t port_id[3]; /* 24-bit port ID */ + uint8_t rsvd_1; + /* + * This is used to retry login for devices specified for + * persistent binding or lost devices. + */ + uint8_t port_login_retry_count; + uint8_t port_timer; + uint16_t flag; + uint32_t mask[8]; /* LUN Mask for this Device */ + /* flags bits defined as follows */ +#define DEV_PUBLIC BIT_0 +#define DEV_OFFLINE BIT_1 +#define DEV_LUNMASK_SET BIT_2 /* some LUNs masked for this device */ +#define DEV_MP_DISABLED BIT_3 /* device disabled for qlmultipath */ +#define DEV_TAPE_DEVICE BIT_4 +#define DEV_CONFIGURED BIT_5 +#define DEV_MISSING BIT_6 +#define DEV_RETURN BIT_7 +#define DEV_HOST BIT_8 +#define DEV_RELOGIN BIT_9 +#define DEV_PORT_DOWN BIT_10 +}fcdev_t; + + +typedef struct +{ + uint8_t in_use; +}fabricid_t; + +/* + * Flash Database structures. + */ +#define FLASH_DATABASE_0 0x1c000 +#define FLASH_DATABASE_1 0x18000 +#define FLASH_DATABASE_VERSION 1 + +typedef struct +{ + uint32_t seq; + uint8_t version; + uint8_t checksum; + uint16_t size; + uint8_t spares[8]; +}flash_hdr_t; + +typedef struct +{ + uint32_t name[2]; + uint8_t spares[8]; +}flash_node_t; + +typedef struct +{ + flash_hdr_t hdr; + flash_node_t node[MAX_FIBRE_DEVICES]; +}flash_database_t; + +/* + * SNS structures. + */ +#define SNS_DATA_SIZE 608 + +typedef struct +{ + uint16_t buffer_length; + uint16_t reserved; + uint32_t buffer_address[2]; + uint16_t subcommand_length; + uint16_t reserved_1; +}sns_hdr_t; + +typedef struct +{ + union + { + struct + { + sns_hdr_t hdr; + uint16_t subcommand; + uint8_t param[SNS_DATA_SIZE - sizeof(sns_hdr_t) - 2]; + }req; + + uint8_t rsp[SNS_DATA_SIZE]; + }p; +}sns_data_t; + +/* + * SNS request/response structures for GP_IDNN. + */ +typedef struct +{ + uint8_t controlbyte; + uint8_t port_id[3]; + uint32_t reserved; + uint8_t nodename[8]; +}port_data_t; + +#ifdef ISP2200 +#define GP_IDNN_LENGTH (256 * sizeof(port_data_t)) + 16 +#else +#define GP_IDNN_LENGTH (126 * sizeof(port_data_t)) + 16 +#endif + +typedef union +{ + struct + { + uint16_t buffer_length; + uint16_t reserved; + uint32_t buffer_address[2]; + uint16_t subcommand_length; + uint16_t reserved_1; + uint16_t subcommand; + uint16_t length; + uint32_t reserved2; + uint32_t protocol; + uint8_t param[GP_IDNN_LENGTH - 28]; + }req; + + struct + { + uint8_t revision; + uint8_t inid[3]; + uint8_t fcstype; + uint8_t subtype; + uint8_t options; + uint8_t reserved; + uint16_t response; + uint16_t residual; + uint8_t reserved1; + uint8_t reason_code; + uint8_t explanation_code; + uint8_t vendor_unique; +#ifdef ISP2200 + port_data_t port_data[256]; +#else + port_data_t port_data[126]; +#endif + }rsp; + +}gp_idnn_t; + +#ifdef ISP2200 +#define GN_LIST_LENGTH 256 * sizeof(port_list_entry_t) +#else +#define GN_LIST_LENGTH 126 * sizeof(port_list_entry_t) +#endif +/* + * Structure used in Get Port List mailbox command (0x75). + */ +typedef struct +{ + uint8_t name[8]; + uint16_t loop_id; +}port_list_entry_t; + +/* + * Structure used for device info. + */ +typedef struct +{ + uint8_t name[8]; /* big endian node name */ + uint8_t wwn[8]; /* big endian port name */ + uint16_t loop_id; + uint8_t port_id[3]; +}device_data_t; + +/* + * Port Database structure definition + * Little endian except where noted. + */ +#define PORT_DATABASE_SIZE 128 /* bytes */ +typedef struct { + uint8_t options; + uint8_t control; + uint8_t master_state; + uint8_t slave_state; +#define PD_STATE_DISCOVERY 0 +#define PD_STATE_WAIT_DISCOVERY_ACK 1 +#define PD_STATE_PORT_LOGIN 2 +#define PD_STATE_WAIT_PORT_LOGIN_ACK 3 +#define PD_STATE_PROCESS_LOGIN 4 +#define PD_STATE_WAIT_PROCESS_LOGIN_ACK 5 +#define PD_STATE_PORT_LOGGED_IN 6 +#define PD_STATE_PORT_UNAVAILABLE 7 +#define PD_STATE_PROCESS_LOGOUT 8 +#define PD_STATE_WAIT_PROCESS_LOGOUT_ACK 9 +#define PD_STATE_PORT_LOGOUT 10 +#define PD_STATE_WAIT_PORT_LOGOUT_ACK 11 + uint8_t reserved[2]; + uint8_t hard_address; + uint8_t reserved_1; + uint8_t port_id[4]; + uint8_t node_name[8]; /* Big endian. */ + uint8_t port_name[8]; /* Big endian. */ + uint16_t execution_throttle; + uint16_t execution_count; + uint8_t reset_count; + uint8_t reserved_2; + uint16_t resource_allocation; + uint16_t current_allocation; + uint16_t queue_head; + uint16_t queue_tail; + uint16_t transmit_execution_list_next; + uint16_t transmit_execution_list_previous; + uint16_t common_features; + uint16_t total_concurrent_sequences; + uint16_t RO_by_information_category; + uint8_t recipient; + uint8_t initiator; + uint16_t receive_data_size; + uint16_t concurrent_sequences; + uint16_t open_sequences_per_exchange; + uint16_t lun_abort_flags; + uint16_t lun_stop_flags; + uint16_t stop_queue_head; + uint16_t stop_queue_tail; + uint16_t port_retry_timer; + uint16_t next_sequence_id; + uint16_t frame_count; + uint16_t PRLI_payload_length; + uint8_t prli_svc_param_word_0[2]; /* Big endian */ + /* Bits 15-0 of word 0 */ + uint8_t prli_svc_param_word_3[2]; /* Big endian */ + /* Bits 15-0 of word 3 */ + uint16_t loop_id; + uint16_t extended_lun_info_list_pointer; + uint16_t extended_lun_stop_list_pointer; +} port_database_t; + + + +/* + * Registered State Change Notification structures. + */ +typedef struct { + port_id_t d_id; + uint8_t format; +} rscn_t; + + + +#ifdef FC_IP_SUPPORT +/* + * Definitions for IP support + */ +#define LOOP_ID_MASK 0x00FF +#define PLE_NOT_SCSI_DEVICE 0x8000 /* Upper bit of loop ID set if not SCSI */ + +/* Firmware IP initialization control block definitions */ +typedef struct _IPInitBlock +{ + uint8_t cVersion; + uint8_t cReserved1; + uint16_t wIpFirmwareOptions; + uint16_t wIpHeaderSize; + uint16_t wIpMTUSize; + uint16_t wIpBufferSize; + uint16_t wReserved2; + uint16_t wReserved3; + uint16_t wReserved4; + uint16_t wReserved5; + uint16_t wIpQueueSize; + uint16_t wIpLowWaterMark; + uint16_t wIpQueueAddr[4]; + uint16_t wIpQueueInPointer; + uint16_t wIpFastPostCount; + uint16_t wIpBufferContainerCount; + uint16_t wIpIocbResourceAllocation; +} IP_INIT_BLOCK, *PIP_INIT_BLOCK; + +#define IPIB_VERSION 0x01 +#define IPIB_LOW_WATER_MARK 0 +#define IPIB_FAST_POST_COUNT 4 +#define IPIB_BUFFER_CONTAINER_COUNT 64 +#define IPIB_IOCB_RESERVE_COUNT 250 + +/* IP firmware options */ +#define IPIB_OPTION_64BIT_ADDRESSING 0x0001 +#define IPIB_OPTION_NO_BROADCAST_FASTPOST 0x0002 +#define IPIB_OPTION_OUT_OF_BUFFERS_EVENT 0x0004 + +/* IP device data structure */ +typedef struct _IpDeviceBlock +{ + uint32_t lDeviceFlags; + uint16_t wLoopId; + uint16_t wUnused1; + uint8_t acWorldWideName[8]; + uint8_t acPortId[3]; + uint8_t cUnused2; + struct _IpDeviceBlock *pNextIpDevice; + struct _IpDeviceBlock *pLastIpDevice; + uint32_t lUnused3; +} IP_DEVICE_BLOCK, *PIP_DEVICE_BLOCK; + +#define IP_DEV_FLAG_PRESENT 0x00000001 +#define IP_DEV_FLAG_PUBLIC_DEVICE 0x00000002 + +#define PUBLIC_LOOP_DEVICE ((uint16_t)-1) + +/* Maximum number of IP connections */ +#define QLLAN_MAX_IP_DEVICES 64 + +/* IP IOCB types */ +#define ET_IP_COMMAND_32 0x13 +#define ET_IP_COMMAND_64 0x1B +#define ET_IP_RECEIVE 0x23 +#define ET_IP_RECEIVE_CONTINUATION 0x2B +#define ET_IP_FARP_REQUEST 0x30 + +/* Data segment descriptor structures */ +typedef struct +{ + uint32_t lBase; + uint32_t lCount; +} DATA_SEG; + +typedef struct +{ + uint32_t lBase[2]; + uint32_t lCount; +} DATA_SEG_A64; + +/* IP Command IOCB structure */ +typedef struct _IpCommandEntry +{ + uint32_t lHeader; + uint32_t lHandle; + uint8_t cReserved1; + uint8_t cLoopId; + uint16_t wCompletionStatus; + uint16_t wControlFlags; + uint16_t wReserved2; + uint16_t wTimeout; + uint16_t wSegmentCount; + uint16_t wServiceClass; + uint16_t wReserved3[7]; + uint32_t lTotalByteCount; + union + { + DATA_SEG asDataSeg[3]; + DATA_SEG_A64 asDataSeg64[2]; + } ds; +} IP_COMMAND_ENTRY, *PIP_COMMAND_ENTRY; + +/* IP Receive IOCB structure */ +#define IP_RECEIVE_ENTRY_MAX_HANDLES 24 +typedef struct _IpReceiveEntry +{ + uint8_t cEntryType; + uint8_t cEntryCount; + uint8_t cSegmentCount; + uint8_t cEntryStatus; + uint16_t wS_IDLow; + uint8_t cS_IDHigh; + uint8_t cReserved1; + uint8_t cReserved2; + uint8_t cLoopId; + uint16_t wCompletionStatus; + uint16_t wServiceClass; + uint16_t wSequenseLength; + uint16_t waBufferHandle[IP_RECEIVE_ENTRY_MAX_HANDLES]; +} IP_RECEIVE_ENTRY, *PIP_RECEIVE_ENTRY; + +/* IP Receive IOCB completion status bits */ +#define IP_REC_STATUS_SPLIT_BUFFER 0x0001 + +/* IP FARP Request IOCB structure */ +typedef struct _IpFarpRequestEntry +{ + uint8_t cEntryType; + uint8_t cEntryCount; + uint8_t cReserved1; + uint8_t cEntryStatus; + uint16_t wRequesterPortIdLow; + uint8_t cRequesterPortIdHigh; + uint8_t cReserved2; + uint8_t acRequesterPortName[8]; +} IP_FARP_REQUEST_ENTRY, *PIP_FARP_REQUEST_ENTRY; + +/* IP mailbox commands */ +#define MBC_INITIALIZE_IP 0x0077 +#define MBC_SEND_FARP_REQUEST 0x0078 + +/* Fabric login mailbox command option bits */ +#define MBC_NO_PLOGI_IF_LOGGED_IN 0x01 +#define MBC_NO_PROCESS_LOGIN 0x02 + +/* Mailbox command completion status */ +#define MBS_PORT_ID_IN_USE 0x4007 +#define MBS_LOOP_ID_IN_USE 0x4008 +#define MBS_ALL_LOOP_IDS_IN_USE 0x4009 +#define MBS_NAME_SERVER_NOT_LOGGED_IN 0x400A + +/* IP async events */ +#define MBA_IP_TRANSMIT_COMPLETE 0x8022 +#define MBA_IP_RECEIVE_COMPLETE 0x8023 +#define MBA_IP_BROADCAST_RECEIVED 0x8024 +#define MBA_IP_RECEIVE_BUFFERS_LOW 0x8025 +#define MBA_IP_OUT_OF_BUFFERS 0x8026 +#define MBA_IP_RECEIVE_COMPLETE_SPLIT 0x8027 + +/* FARP request payload structure */ +typedef struct _IpSendFarpPayload +{ + uint8_t cMatchAddressCode; + uint8_t acReserved1[3]; + uint8_t cResponderFlags; + uint8_t acReserved2[3]; + uint8_t acRequesterPortName[8]; + uint8_t acRequesterNodeName[8]; + uint8_t acResponderPortName[8]; + uint8_t acResponderNodeName[8]; +} IP_SEND_FARP_PAYLOAD, *PIP_SEND_FARP_PAYLOAD; + +#define IP_FARP_MATCH_PORTNAME 0x01 +#define IP_FARP_REQUEST_LOGIN 0x01 +#else +/* Fabric login mailbox command option bits */ +#define MBC_NO_PLOGI_IF_LOGGED_IN 0x01 +#define MBC_NO_PROCESS_LOGIN 0x02 + +/* Mailbox command completion status */ +#define MBS_PORT_ID_IN_USE 0x4007 +#define MBS_LOOP_ID_IN_USE 0x4008 +#define MBS_ALL_LOOP_IDS_IN_USE 0x4009 +#define MBS_NAME_SERVER_NOT_LOGGED_IN 0x400A + +#endif /* FC_IP_SUPPORT */ + +/* + * Linux Host Adapter structure + */ +typedef struct scsi_qla_host +{ + /* ISP ring lock, rings, and indexes */ + request_t req[REQUEST_ENTRY_CNT+1]; + response_t res[RESPONSE_ENTRY_CNT+1]; + + /* Linux adapter configuration data */ + struct Scsi_Host *host; /* pointer to host data */ + struct scsi_qla_host *next; + device_reg_t *iobase; /* Base Memory-mapped or I/O address */ + device2300_reg_t *iobase2300;/* Base Memory-mapped or I/O address */ + +#if LINUX_VERSION_CODE > KERNEL_VERSION(2,1,95) + struct pci_dev *pdev; +#endif + uint8_t pci_bus; + uint8_t pci_device_fn; + uint8_t devnum; + volatile unsigned char *mmpbase; /* memory mapped address */ + u_long host_no; + u_long instance; + uint8_t revision; + uint8_t ports; + u_long actthreads; + u_long qthreads; + u_long isr_count; /* Interrupt count */ + u_long isp_aborts; + u_long lip_count; + u_long spurious_int; + uint32_t device_id; + + /* ISP connection configuration data */ + uint16_t max_public_loop_ids; + uint16_t min_external_loopid; /* First external loop Id */ + uint8_t current_topology; /* Current ISP configuration */ + uint8_t prev_topology; /* Previous ISP configuration */ +#define ISP_CFG_NL 1 +#define ISP_CFG_N 2 +#define ISP_CFG_FL 4 +#define ISP_CFG_F 8 + + uint8_t id; /* Host adapter SCSI id */ + uint16_t loop_id; /* Host adapter loop id */ + uint8_t port_id[3]; /* Host adapter port id */ + uint8_t operating_mode; /* current F/W operating connection mode */ + /* 0 - LOOP, 1 - P2P, 2 - LOOP_P2P, + * 3 - P2P_LOOP + */ + + /* NVRAM configuration data */ + uint16_t loop_reset_delay; /* Loop reset delay. */ + uint16_t hiwat; /* High water mark per device. */ + uint16_t execution_throttle; /* queue depth */ + uint16_t minimum_timeout; /* Minimum timeout. */ + uint8_t retry_count; + uint8_t login_timeout; + uint8_t port_down_retry_count; + uint8_t loop_down_timeout; + uint16_t max_luns; + uint16_t max_targets; + + /* Device TGT/LUN queues. */ + tgt_t *tgt[MAX_BUSES][MAX_FIBRE_DEVICES]; /* Logical unit queues */ + + /* Interrupt lock, and data */ + + /* Fibre Channel Device Database and LIP sequence. */ + fcdev_t fc_db[MAX_FIBRE_DEVICES]; /* Driver database. */ + uint32_t flash_db; /* Flash database address in use. */ + fabricid_t fabricid[MAX_FIBRE_DEVICES]; /* Fabric ids table . */ + uint32_t flash_seq; /* Flash database seq # in use. */ + volatile uint16_t lip_seq; /* LIP sequence number. */ + + /* Linux bottom half run queue */ + struct tq_struct run_qla_bh; + + /* Linux kernel thread */ + struct task_struct *dpc_handler; /* kernel thread */ + struct semaphore *dpc_wait; /* DPC waits on this semaphore */ + struct semaphore *dpc_notify; /* requester waits for DPC on this + * semaphore + */ + uint8_t dpc_active; /* DPC routine is active */ + + /* Received ISP mailbox data. */ + volatile uint16_t mailbox_out[MAILBOX_REGISTER_COUNT]; + + /* Outstandings ISP commands. */ + srb_t *outstanding_cmds[MAX_OUTSTANDING_COMMANDS]; + +#if BITS_PER_LONG > 32 + uint64_t request_dma; /* Physical address. */ +#else + uint32_t request_dma; /* Physical address. */ +#endif + request_t *request_ring; /* Base virtual address */ + request_t *request_ring_ptr; /* Current address. */ + uint16_t req_ring_index; /* Current index. */ + uint16_t req_q_cnt; /* Number of available entries. */ + +#if BITS_PER_LONG > 32 + uint64_t response_dma; /* Physical address. */ +#else + uint32_t response_dma; /* Physical address. */ +#endif + response_t *response_ring; /* Base virtual address */ + response_t *response_ring_ptr; /* Current address. */ + uint16_t rsp_ring_index; /* Current index. */ + +#if QL2X00_TARGET_MODE_SUPPORT + /* Target buffer and sense data. */ + u_long tbuf_dma; /* Physical address. */ + tgt_buf_t *tbuf; + u_long tsense_dma; /* Physical address. */ + uint8_t *tsense; +#endif + +#ifdef FC_IP_SUPPORT + /* Data for IP support */ + uint8_t acPortName[8]; + IP_BUFFER_ENTRY asIpBuffers[IP_BUFFER_QUEUE_DEPTH]; + uint32_t ppIpBufferQueueLow; + uint32_t ppIpBufferQueueHigh; + IP_BUFFER_ENTRY *pIpBufferQueue; + uint16_t wIpBufferIn; + uint16_t wIpBufferOut; + uint32_t lMaximumTransferSize; + uint32_t lReceiveBufferSize; + uint16_t wReceiveBufferCount; + uint16_t wHeaderSize; + PSEND_COMPLETION_CALLBACK pSendCompletionRoutine; + PRECEIVE_PACKETS_CALLBACK pReturnReceivePacketsRoutine; + void *pReturnReceivePacketsContext; + PNOTIFY_CALLBACK pNotifyRoutine; + void *pNotifyContext; + BUFFER_CB *pReceiveBufferCBs; + IP_DEVICE_BLOCK asIpDeviceDatabase[QLLAN_MAX_IP_DEVICES]; + IP_DEVICE_BLOCK *pIpDeviceFree; + IP_DEVICE_BLOCK *pIpDeviceTop; + IP_DEVICE_BLOCK *pIpDeviceBottom; + uint32_t lCurrentTagIndex; + void *apActiveIpQueue[MAX_SEND_PACKETS]; +#endif + + /* Firmware Initialization Control Block data */ +#if BITS_PER_LONG > 32 + uint64_t init_cb_dma; /* Physical address. */ +#else + uint32_t init_cb_dma; /* Physical address. */ +#endif + init_cb_t *init_cb; + + /* Timeout timers. */ + uint8_t queue_restart_timer; + uint8_t loop_down_timer; /* loop down timer */ + uint8_t loop_down_abort_time; /* port down timer */ + uint32_t timer_active; + uint32_t forceLip; + struct timer_list timer; + + /* Watchdog queue, lock and total timer */ +#if LINUX_VERSION_CODE > KERNEL_VERSION(2,1,0) + spinlock_t retry_lock; /* Watchdog Queue Lock */ +#endif + srb_t *retry_q_first; /* First job on watchdog queue */ + srb_t *retry_q_last; /* Last job on watchdog queue */ + + srb_t *done_q_first; /* First job on done queue */ + srb_t *done_q_last; /* Last job on done queue */ + + /* RSCN queue. */ + rscn_t rscn_queue[MAX_RSCN_COUNT]; + uint8_t rscn_in_ptr; + uint8_t rscn_out_ptr; + + /* Host Adapter database */ + fcdev_t *phost_db; + uint8_t host_db_ptr; + + volatile struct + { + uint32_t online :1; /* 0 */ + uint32_t enable_64bit_addressing :1; /* 1 */ + uint32_t mbox_int :1; /* 2 */ + uint32_t mbox_busy :1; /* 3 */ + uint32_t reset_marker :1; /* 4 */ + uint32_t loop_resync_needed :1; /* 5 */ + uint32_t watchdog_enabled :1; /* 6 */ + uint32_t isp_abort_needed :1; /* 7 */ + uint32_t disable_host_adapter :1; /* 8 */ + uint32_t loop_resync_active :1; /* 9 */ + uint32_t reset_active :1; /* 10 */ + uint32_t abort_isp_active :1; /* 11 */ + uint32_t disable_risc_code_load :1; /* 12 */ + uint32_t set_cache_line_size_1 :1; /* 13 */ + uint32_t enable_target_mode :1; /* 14 */ + uint32_t disable_luns :1; /* 15 */ + uint32_t enable_lip_reset :1; /* 16 */ + uint32_t enable_lip_full_login :1; /* 17 */ + uint32_t enable_target_reset :1; /* 18 */ + uint32_t updated_fc_db :1; /* 19 */ + uint32_t enable_flash_db_update :1; /* 20 */ + uint32_t abort_queue_needed :1; /* 21 */ + +#define QLA2100_IN_ISR_BIT 22 + uint32_t in_isr :1; /* 22 */ + uint32_t dpc_sched :1; /* 23 */ + uint32_t start_timer :1; /* 24 */ + uint32_t nvram_config_done :1; /* 25 */ + uint32_t update_config_needed :1; /* 26 */ + uint32_t done_requests_needed :1; /* 27 */ + uint32_t restart_queues_needed :1; /* 28 */ + uint32_t port_restart_needed :1; /* 29 */ +#ifdef FC_IP_SUPPORT + uint32_t enable_ip :1; /* 30 */ +#endif + /* 4.11 */ + uint32_t managment_server_logged_in:1; /* 31 */ + } flags; + + uint32_t device_flags; +#define DFLG_LOCAL_DEVICES BIT_0 +#define DFLG_RETRY_LOCAL_DEVICES BIT_1 +#define RSCN_UPDATE BIT_2 +#define LOGIN_RETRY_NEEDED BIT_3 +#define RSCN_QUEUE_OVERFLOW BIT_4 +#define DFLG_FABRIC_DEVICES BIT_5 +#define RELOGIN_NEEDED BIT_6 + + uint8_t marker_needed; + uint8_t missing_targets; + uint8_t sns_retry_cnt; + uint8_t cmd_wait_cnt; + uint32_t dpc_flags; +#define MAILBOX_RETRY BIT_0 +#define COMMAND_WAIT_NEEDED BIT_1 +#define COMMAND_WAIT_ACTIVE BIT_2 +#define ISP_RESET_NEEDED BIT_3 +#define LOGOUT_DONE BIT_4 +#define ISP_RESET_ONCE BIT_5 + + uint16_t interrupts_on; + + volatile uint16_t loop_state; +/* These values are NOT used as flags. */ +#define LOOP_TIMEOUT 0x1 +#define LOOP_DOWN 0x2 +#define LOOP_UP 0x4 +#define LOOP_UPDATE 0x8 +#define LOOP_READY 0x10 + + /* following are new and needed for IOCTL support */ + uint8_t node_name[8]; + uint8_t nvram_version; + uint8_t ioctl_timer; + uint8_t IoctlPassThru_InProgress; + uint8_t IoctlPassFCCT_InProgress; + void *ioctl_mem; +#if BITS_PER_LONG > 32 + uint64_t ioctl_mem_phys; +#else + uint32_t ioctl_mem_phys; +#endif + + /* HBA serial number */ + uint8_t serial0; + uint8_t serial1; + uint8_t serial2; + + /* oem related items */ + uint8_t oem_id; + uint8_t oem_spare0; + uint8_t oem_part[6]; + uint8_t oem_fru[8]; + uint8_t oem_ec[8]; + uint8_t oem_string[8]; + + uint32_t dump_done; + +} scsi_qla_host_t; + +/* + * Macros to help code, maintain, etc. + */ +#define TGT_Q(ha, b, t) (ha->tgt[b][t]) +#define GET_LU_Q(ha, b, t, l) ( (TGT_Q(ha,b,t) != NULL)? TGT_Q(ha, b, t)->luns[l] : NULL) +#define LU_Q(ha, b, t, l) (TGT_Q(ha, b, t)->luns[l]) +#define PORT_DOWN(ha, t) ((ha)->fc_db[(t)].port_timer) + +/* + * Locking Macro Definitions + * + * LOCK/UNLOCK definitions are lock/unlock primitives for multi-processor + * or spl/splx for uniprocessor. + */ +#define QLA2100_INTR_LOCK(ha) +#define QLA2100_INTR_UNLOCK(ha) + +#define QLA2100_RING_LOCK(ha) +#define QLA2100_RING_UNLOCK(ha) + +#if defined(__cplusplus) +} +#endif +#endif + +#if defined(__386__) +# define QLA2100_BIOSPARAM qla2100_biosparam +#else +# define QLA2100_BIOSPARAM NULL +#endif + +/* + * Linux - SCSI Driver Interface Function Prototypes. + */ +int qla2100_ioctl(Scsi_Device *, int , void *); +int qla2100_proc_info ( char *, char **, off_t, int, int, int); +const char * qla2100_info(struct Scsi_Host *host); +int qla2100_detect(Scsi_Host_Template *); +int qla2100_release(struct Scsi_Host *); +const char * qla2100_info(struct Scsi_Host *); +int qla2100_queuecommand(Scsi_Cmnd *, void (* done)(Scsi_Cmnd *)); +int qla2100_abort(Scsi_Cmnd *); +int qla2100_reset(Scsi_Cmnd *, unsigned int); +int qla2100_biosparam(Disk *, kdev_t, int[]); +void qla2100_intr_handler(int, void *, struct pt_regs *); +//void qla2100_device_queue_depth(scsi_qla_host_t *, Scsi_Device *); +void qla2100_setup(char *s, int *dummy); + +/* Number of segments 1 - 65535 */ +#define SG_SEGMENTS 32 /* Cmd entry + 6 continuations */ + +/* + * Scsi_Host_template (see hosts.h) + * Device driver Interfaces to mid-level SCSI driver. + */ +#if LINUX_VERSION_CODE < KERNEL_VERSION(2,1,95) +/* This interface is now obsolete !!! */ +#define QLA2100_LINUX_TEMPLATE { \ + next: NULL, \ + usage_count: NULL, \ + proc_dir: NULL, \ + proc_info: qla2100_proc_info, \ + name: "Qlogic Fibre Channel 2100", \ + detect: qla2100_detect, \ + release: qla2100_release, \ + info: qla2100_info, \ + command: NULL, \ + queuecommand: qla2100_queuecommand, \ + abort: qla2100_abort, \ + reset: qla2100_reset, \ + slave_attach: NULL, \ + bios_param: QLA2100_BIOSPARAM, \ + can_queue: 1, /* MAX_OUTSTANDING_COMMANDS */ \ + this_id: -1, /* scsi id of host adapter */ \ + sg_tablesize: SG_ALL, \ + cmd_per_lun: 1, /* max commands per lun */ \ + present: 0, /* number of ISP present */ \ + unchecked_isa_dma: 0, /* no memeory DMA restrictions */ \ + use_clustering: ENABLE_CLUSTERING \ +} +#else + +#define QLA2100_LINUX_TEMPLATE { \ + next: NULL, \ + module: NULL, \ + proc_dir: NULL, \ + proc_info: qla2100_proc_info, \ + name: "Qlogic Fibre Channel 2100", \ + detect: qla2100_detect, \ + release: qla2100_release, \ + info: qla2100_info, \ + ioctl: qla2100_ioctl, \ + command: NULL, \ + queuecommand: qla2100_queuecommand, \ + eh_strategy_handler: NULL, \ + eh_abort_handler: NULL, \ + eh_device_reset_handler: NULL, \ + eh_bus_reset_handler: NULL, \ + eh_host_reset_handler: NULL, \ + abort: qla2100_abort, \ + reset: qla2100_reset, \ + slave_attach: NULL, \ + bios_param: QLA2100_BIOSPARAM, \ + can_queue: 255, /* max simultaneous cmds */\ + this_id: -1, /* scsi id of host adapter */\ + sg_tablesize: SG_SEGMENTS, /* max scatter-gather cmds */\ + cmd_per_lun: 3, /* cmds per lun (linked cmds) */\ + present: 0, /* number of 7xxx's present */\ + unchecked_isa_dma: 0, /* no memory DMA restrictions */\ + use_clustering: ENABLE_CLUSTERING, \ + use_new_eh_code: 0, \ + emulated: 0 \ +} +#endif +#endif /* _IO_HBA_QLA2100_H */ diff -Nru a/drivers/scsi/qla2x00exioct.h b/drivers/scsi/qla2x00exioct.h --- /dev/null Wed Dec 31 16:00:00 1969 +++ b/drivers/scsi/qla2x00exioct.h Mon Apr 15 15:07:57 2002 @@ -0,0 +1,823 @@ +/* + * File Name: exioct.h + * + * San/Device Management Ioctl Header + * File is created to adhere to Solaris requirement using 8-space tabs. + * + * !!!!! PLEASE DO NOT REMOVE THE TABS !!!!! + * !!!!! PLEASE NO SINGLE LINE COMMENTS: // !!!!! + * !!!!! PLEASE NO MORE THAN 80 CHARS PER LINE !!!!! + * + * *********************************************************************** + * * ** + * * NOTICE ** + * * COPYRIGHT (C) 2000 QLOGIC CORPORATION ** + * * ALL RIGHTS RESERVED ** + * * ** + * *********************************************************************** + * + * Revision History: + * + * Rev. 0 March 1, 2000 + * YPL - Created. + * + * Rev. 1 March 2, 2000 + * RLU - Updated with latest definitions. Added more comments. + * + * Rev. 2 May 16, 2000 + * SP - Updated definitions and changed structures (March 27, 2000) + * SP - Addded structures + * + * Rev. 3 June 1, 2000 + * THL - Made major changes to include all changes talked in our meeting. + * + * Rev. 4 June 5, 2000 + * RLU - Added new definitions/structures for SDM_GET_AEN and SDM_REG_AEN + * functions. + * - Major definition/structure name changes as discussed in meetings. + * - Deleted duplicated command code and structure definitions. + * + * Rev. 4.1 June 14, 2000 + * WTR - Moved Solaris specific defines to exioctso.h. This makes it + * possible for application developers to include only exioct.h + * in their Solaris application development. + * + * Rev. 4.2 June 15, 2000 + * THL - Changed UINT16 and UINT32 back to WORD and DWORD for NT; otherwise, + * NT will get a compilation error for redefining UINT16 and UINT32. + * Added RISC_CODE/FLASH_RAM macros. + * + * Rev. 4.3 June 22, 2000 + * THL - Changed SDM_FC_ADDR according to External Ioctls document. + * Added SDM_DEF_TYPE macros. + * + * Rev. 4.4 June 22, 2000 + * THL - Moved NT specific defines to exioctnt.h. + * + * Rev. 4.5 August 15, 2000 + * SP - Rolled back some changes made by Todd R. + * Kept new status code SDM_STATUS_NO_MEMORY + * Port types fabric and tape device + * + * Rev. 4.7 Sep 6, 2000 + * YPL - Replace SDM_ with EXT_, _ISP with _CHIP. + * Add vendor specific statuses, device update, config defines. + * + * Rev. 5.0 Sep 13, 2000 + * YPL - Update version to 5, remove max defines, make port type bit. + * Change HBA_PORT_PROPERTY to have bus/target/lun defined as UINT16 + * + * Rev. 5.1 Sep 22, 2000 + * THL - Add destination address for specify scsi address or FC address. + * Remove "not support" comment and add more macros. + * + * Rev. 5.2 Sep 27, 2000 + * THL - Add new macros and structure for add and swap target device. + * Create new data structure for get port database. + * TLE - Merge changes needed for FailOver + * + * Rev. 5.3 Sep 29, 2000 + * THL - Add access mode for NVRAM. + * + * Rev. 5.4 Oct 03, 2000 + * THL - Add EXT_SC_GET_FC_STATISTICS. + * + * Rev. 5.5 Oct 18, 2000 + * THL - Remove duplicated EXT_DEF_ADDR_MODE_32 and EXT_DEF_ADDR_MODE_16. + * Reformat new data structures and defines. + * + * Rev. 5.6 Oct 19, 2000 + * RLU - Changed file name from ExIoct.h to exioct.h. + * - Added definition of EXT_RNID_DATA for API implementation. + * - Reformat some lines to conform to the format agreed + * upon in IOCTL meeting (and mentioned at beginning of + * this file). + * + * Rev. 5.7 Oct 25, 2000 + * BN - Added LUN bitmask structure and macros + * + * Rev. 5.8 Oct 25, 2000 + * BN - Added EXT_CC_DRIVER_PROP define + * + * Rev. 5.9 Oct 26, 2000 + * BN - Sync with UnixApi project + * + * Rev. 5.10 Oct 30, 2000 + * BN - Remove not needed #define for EXT_CC_DRIVER_PROP + * - Add EXT_ to IS_LUN_BIT_SET, SET_LUN_BIT, CLR_LUN_BIT + * + * Rev. 5.11 Nov 1, 2000 + * BN - Increased [1] of EXT_DEVICEDATA to [EXT_MAX_TARGET] + * TLE - Decreased [EXT_MAX_TARGET] of EXT_DEVICEDATA to [1] + * + * Rev. 5.12 Nov 7, 2000 + * RLU - Deleted EXT_DEF_MAX_LUNS define and changed all references + * to it to use EXT_MAX_LUN. + * - Changed the revision numbers for the last 2 revisions down + * to use 5.x. + * + * Rev. 5.13 Nov 28, 2000 + * RLU - Change value defines from EXT_... to EXT_DEF_... + * + * Rev. 5.14 Jan 08, 2001 + * BN - Added #define SDM_CC_LOOPBACK SDM_CC_LOOPBACK_OS + * + */ + +#ifndef _EXIOCT_H +#define _EXIOCT_H + +/* + * NOTE: the following version defines must be updated each time the + * changes made may affect the backward compatibility of the + * input/output relations of the SDM IOCTL functions. + */ +#define EXT_VERSION 5 + + +/* + * OS independent General definitions + */ +#define EXT_DEF_SIGNATURE_SIZE 8 +#define EXT_DEF_WWN_NAME_SIZE 8 +#define EXT_DEF_WWP_NAME_SIZE 8 +#define EXT_DEF_SERIAL_NUM_SIZE 4 +#define EXT_DEF_PORTID_SIZE 4 +#define EXT_DEF_PORTID_SIZE_ACTUAL 3 +#define EXT_DEF_MAX_STR_SIZE 128 +#define EXT_DEF_SCSI_PASSTHRU_CDB_LENGTH 12 + +#define EXT_DEF_ADDR_MODE_32 1 +#define EXT_DEF_ADDR_MODE_64 2 + +/* + * *********************************************************************** + * X OS type definitions + * *********************************************************************** + */ +#ifdef _MSC_VER /* NT */ + +#pragma pack(1) +#include "ExIoctNT.h" + +#elif defined(linux) /* Linux */ + +#include "qla2x00exioctln.h" + +#elif defined(sun) || defined(__sun) /* Solaris */ + +#include "exioctso.h" + +#endif + +/* + * *********************************************************************** + * OS dependent General configuration defines + * *********************************************************************** + */ +#define EXT_DEF_MAX_HBA EXT_DEF_MAX_HBA_OS +#define EXT_DEF_MAX_BUS EXT_DEF_MAX_BUS_OS +#define EXT_DEF_MAX_TARGET EXT_DEF_MAX_TARGET_OS +#define EXT_DEF_MAX_LUN EXT_DEF_MAX_LUN_OS + +/* + * *********************************************************************** + * Common header struct definitions for San/Device Mgmt + * *********************************************************************** + */ +typedef struct { + UINT64 Signature; /* 8 chars string */ + UINT16 AddrMode; /* 2 */ + UINT16 Version; /* 2 */ + UINT16 SubCode; /* 2 */ + UINT16 Instance; /* 2 */ + UINT32 Status; /* 4 */ + UINT32 DetailStatus; /* 4 */ + UINT32 Reserved1; /* 4 */ + UINT32 RequestLen; /* 4 */ + UINT32 ResponseLen; /* 4 */ + UINT64 RequestAdr; /* 8 */ + UINT64 ResponseAdr; /* 8 */ + UINT16 HbaSelect; /* 2 */ + UINT16 VendorSpecificStatus[11]; /* 22 */ + UINT64 VendorSpecificData; /* 8 chars string */ +} EXT_IOCTL, *PEXT_IOCTL; /* 84 / 0x54 */ + +/* + * Addressing mode used by the user application + */ +#define EXT_ADDR_MODE EXT_ADDR_MODE_OS + +/* + * Status. These macros are being used for setting Status field in + * EXT_IOCTL structure. + */ +#define EXT_STATUS_OK 0 +#define EXT_STATUS_ERR 1 +#define EXT_STATUS_BUSY 2 +#define EXT_STATUS_PENDING 3 +#define EXT_STATUS_SUSPENDED 4 +#define EXT_STATUS_RETRY_PENDING 5 +#define EXT_STATUS_INVALID_PARAM 6 +#define EXT_STATUS_DATA_OVERRUN 7 +#define EXT_STATUS_DATA_UNDERRUN 8 +#define EXT_STATUS_DEV_NOT_FOUND 9 +#define EXT_STATUS_COPY_ERR 10 +#define EXT_STATUS_MAILBOX 11 +#define EXT_STATUS_UNSUPPORTED_SUBCODE 12 +#define EXT_STATUS_UNSUPPORTED_VERSION 13 +#define EXT_STATUS_MS_NO_RESPONSE 14 +#define EXT_STATUS_SCSI_STATUS 15 +#define EXT_STATUS_BUFFER_TOO_SMALL 16 +#define EXT_STATUS_NO_MEMORY 17 +#define EXT_STATUS_UNKNOWN 18 +#define EXT_STATUS_UNKNOWN_DSTATUS 19 +#define EXT_STATUS_INVALID_REQUEST 20 + +/* + * Detail Status contains the SCSI bus status codes. + */ + +#define EXT_DSTATUS_GOOD 0x00 +#define EXT_DSTATUS_CHECK_CONDITION 0x02 +#define EXT_DSTATUS_CONDITION_MET 0x04 +#define EXT_DSTATUS_BUSY 0x08 +#define EXT_DSTATUS_INTERMEDIATE 0x10 +#define EXT_DSTATUS_INTERMEDIATE_COND_MET 0x14 +#define EXT_DSTATUS_RESERVATION_CONFLICT 0x18 +#define EXT_DSTATUS_COMMAND_TERMINATED 0x22 +#define EXT_DSTATUS_QUEUE_FULL 0x28 + +/* + * Detail Status contains the needed Response buffer space(bytes) + * when Status = EXT_STATUS_BUFFER_TOO_SMALL + */ + + +/* + * Detail Status contains one of the following codes + * when Status = EXT_STATUS_INVALID_PARAM or + * = EXT_STATUS_DEV_NOT_FOUND + */ +#define EXT_DSTATUS_NOADNL_INFO 0x00 +#define EXT_DSTATUS_HBA_INST 0x01 +#define EXT_DSTATUS_TARGET 0x02 +#define EXT_DSTATUS_LUN 0x03 +#define EXT_DSTATUS_REQUEST_LEN 0x04 +#define EXT_DSTATUS_PATH_INDEX 0x05 + +/* + * Currently supported DeviceControl / ioctl command codes + */ +#define EXT_CC_QUERY EXT_CC_QUERY_OS +#define EXT_CC_SEND_FCCT_PASSTHRU EXT_CC_SEND_FCCT_PASSTHRU_OS +#define EXT_CC_REG_AEN EXT_CC_REG_AEN_OS +#define EXT_CC_GET_AEN EXT_CC_GET_AEN_OS +#define EXT_CC_SEND_ELS_RNID EXT_CC_SEND_ELS_RNID_OS +#define EXT_CC_SEND_SCSI_PASSTHRU EXT_CC_SCSI_PASSTHRU_OS +#define EXT_CC_READ_HOST_PARAMS EXT_CC_READ_HOST_PARAMS_OS +#define EXT_CC_READ_RISC_PARAMS EXT_CC_READ_RISC_PARAMS_OS +#define EXT_CC_UPDATE_HOST_PARAMS EXT_CC_UPDATE_HOST_PARAMS_OS +#define EXT_CC_UPDATE_RISC_PARAMS EXT_CC_UPDATE_RISC_PARAMS_OS +#define EXT_CC_READ_NVRAM EXT_CC_READ_NVRAM_OS +#define EXT_CC_UPDATE_NVRAM EXT_CC_UPDATE_NVRAM_OS + +#define EXT_CC_LOOPBACK EXT_CC_LOOPBACK_OS +/* + * HBA port operations + */ +#define EXT_CC_GET_DATA EXT_CC_GET_DATA_OS +#define EXT_CC_SET_DATA EXT_CC_SET_DATA_OS + +/* + * The following DeviceControl / ioctl command codes currently are not + * supported. + */ +#define EXT_CC_SEND_ELS_RTIN EXT_CC_SEND_ELS_RTIN_OS + + +/* + * *********************************************************************** + * EXT_IOCTL SubCode definition. + * These macros are being used for setting SubCode field in EXT_IOCTL + * structure. + * *********************************************************************** + */ + +/* + * Query. + * Uses with EXT_QUERY as the ioctl code. + */ +#define EXT_SC_QUERY_HBA_NODE 1 +#define EXT_SC_QUERY_HBA_PORT 2 +#define EXT_SC_QUERY_DISC_PORT 3 +#define EXT_SC_QUERY_DISC_TGT 4 +#define EXT_SC_QUERY_DISC_LUN 5 /* Currently Not Supported */ +#define EXT_SC_QUERY_DRIVER 6 +#define EXT_SC_QUERY_FW 7 +#define EXT_SC_QUERY_CHIP 8 + +/* + * Get. + * Uses with EXT_GET_DATA as the ioctl code + */ +/* 1 - 99 Common */ +#define EXT_SC_GET_SCSI_ADDR 1 /* Currently Not Supported */ +#define EXT_SC_GET_ERR_DETECTIONS 2 /* Currently Not Supported */ +#define EXT_SC_GET_STATISTICS 3 +#define EXT_SC_GET_BUS_MODE 4 /* Currently Not Supported */ +#define EXT_SC_GET_DR_DUMP_BUF 5 /* Currently Not Supported */ +#define EXT_SC_GET_RISC_CODE 6 +#define EXT_SC_GET_FLASH_RAM 7 + +/* 100 - 199 FC_INTF_TYPE */ +#define EXT_SC_GET_LINK_STATUS 101 /* Currently Not Supported */ +#define EXT_SC_GET_LOOP_ID 102 /* Currently Not Supported */ +#define EXT_SC_GET_LUN_BITMASK 103 +#define EXT_SC_GET_PORT_DATABASE 104 /* Currently Not Supported */ +#define EXT_SC_GET_PORT_DATABASE_MEM 105 /* Currently Not Supported */ +#define EXT_SC_GET_PORT_SUMMARY 106 +#define EXT_SC_GET_POSITION_MAP 107 +#define EXT_SC_GET_RETRY_CNT 108 /* Currently Not Supported */ +#define EXT_SC_GET_RNID 109 +#define EXT_SC_GET_RTIN 110 /* Currently Not Supported */ +#define EXT_SC_GET_FC_LUN_BITMASK 111 +#define EXT_SC_GET_FC_STATISTICS 112 + +/* 200 - 299 SCSI_INTF_TYPE */ +#define EXT_SC_GET_SEL_TIMEOUT 201 /* Currently Not Supported */ + + +/* + * Set. + * Uses with EXT_SET_DATA as the ioctl code + */ +/* 1 - 99 Common */ +#define EXT_SC_RST_STATISTICS 3 /* Currently Not Supported */ +#define EXT_SC_SET_BUS_MODE 4 /* Currently Not Supported */ +#define EXT_SC_SET_DR_DUMP_BUF 5 /* Currently Not Supported */ +#define EXT_SC_SET_RISC_CODE 6 +#define EXT_SC_SET_FLASH_RAM 7 + +/* 100 - 199 FC_INTF_TYPE */ +#define EXT_SC_SET_LUN_BITMASK 103 +#define EXT_SC_SET_RETRY_CNT 108 /* Currently Not Supported */ +#define EXT_SC_SET_RNID 109 +#define EXT_SC_SET_RTIN 110 /* Currently Not Supported */ +#define EXT_SC_SET_FC_LUN_BITMASK 111 +#define EXT_SC_ADD_TARGET_DEVICE 112 +#define EXT_SC_SWAP_TARGET_DEVICE 113 + +/* 200 - 299 SCSI_INTF_TYPE */ +#define EXT_SC_SET_SEL_TIMEOUT 201 /* Currently Not Supported */ + +/* SCSI passthrough */ +#define EXT_SC_SEND_SCSI_PASSTHRU 0 +#define EXT_SC_SEND_FC_SCSI_PASSTHRU 1 + +/* NVRAM */ +#define EXT_SC_NVRAM_HARDWARE 0 /* Save */ +#define EXT_SC_NVRAM_DRIVER 1 /* Driver (Apply) */ +#define EXT_SC_NVRAM_ALL 2 /* NVRAM/Driver (Save+Apply) */ + +/* Read */ + +/* Write */ + +/* Reset */ + +/* Request struct */ + + +/* + * Response struct + */ +typedef struct _EXT_HBA_NODE { + UINT8 WWNN [EXT_DEF_WWN_NAME_SIZE]; /* 8 */ + UINT8 Manufacturer [EXT_DEF_MAX_STR_SIZE]; /* 128; "QLOGIC" */ + UINT8 Model [EXT_DEF_MAX_STR_SIZE]; /* 128; "QLA2200" */ + UINT8 SerialNum [EXT_DEF_SERIAL_NUM_SIZE];/* 4; 123 */ + UINT8 DriverVersion[EXT_DEF_MAX_STR_SIZE]; /* 128; "7.4.3" */ + UINT8 FWVersion [EXT_DEF_MAX_STR_SIZE]; /* 128; "2.1.6" */ + + /* The following field is currently not supported */ + UINT8 OptRomVersion[EXT_DEF_MAX_STR_SIZE]; /* 128; "1.44" */ + + UINT16 PortCount; /* 2; 1 */ + UINT16 InterfaceType; /* 2; FC/SCSI */ + + /* The following two fields are not yet supported */ + UINT32 DriverAttr; /* 4 */ + UINT32 FWAttr; /* 4 */ + + UINT32 Reserved[8]; /* 32 */ +} EXT_HBA_NODE, *PEXT_HBA_NODE; /* 696 */ + +/* HBA node query interface type */ +#define EXT_DEF_FC_INTF_TYPE 1 +#define EXT_DEF_SCSI_INTF_TYPE 2 + +typedef struct _EXT_HBA_PORT { + UINT8 WWPN[EXT_DEF_WWN_NAME_SIZE]; /* 8 */ + UINT8 Id [EXT_DEF_PORTID_SIZE]; /* 4; 3 bytes valid Port Id. */ + UINT16 Type; /* 2; Port Type */ + UINT16 State; /* 2; Port State */ + UINT16 Mode; /* 2 */ + UINT16 DiscPortCount; /* 2 */ + UINT16 DiscPortNameType; /* 2; USE_NODE_NAME or */ + /* USE_PORT_NAME */ + UINT16 DiscTargetCount; /* 2 */ + UINT16 Bus; /* 1 */ + UINT16 Target; /* 1 */ + UINT16 Lun; /* 1 */ + UINT16 Unused; /* 1 */ + UINT32 Reserved[6]; /* 28 */ +} EXT_HBA_PORT, *PEXT_HBA_PORT; /* 56 */ + +/* port type bit definitions */ +#define EXT_DEF_INITIATOR_DEV 0x1 +#define EXT_DEF_TARGET_DEV 0x2 +#define EXT_DEF_TAPE_DEV 0x4 +#define EXT_DEF_FABRIC_DEV 0x8 + + +/* HBA port state */ +#define EXT_DEF_HBA_OK 0 +#define EXT_DEF_HBA_SUSPENDED 1 +#define EXT_DEF_HBA_LOOP_DOWN 2 + +/* Connection mode */ +#define EXT_DEF_P2P_MODE 1 +#define EXT_DEF_LOOP_MODE 2 + +/* Valid name type for Disc. port/target */ +#define EXT_DEF_USE_NODE_NAME 1 +#define EXT_DEF_USE_PORT_NAME 2 + +typedef struct _EXT_DISC_PORT { + UINT8 WWNN[EXT_DEF_WWN_NAME_SIZE]; /* 8 */ + UINT8 WWPN[EXT_DEF_WWN_NAME_SIZE]; /* 8 */ + UINT8 Id [EXT_DEF_PORTID_SIZE]; /* 4; 3 bytes used. big endian*/ + + /* The following fields currently are not supported */ + UINT16 Type; /* 2; Port Type */ + UINT16 Status; /* 2; Port Status */ + UINT16 Bus; /* 2; n/a for Solaris */ + + UINT16 TargetId; /* 2 */ + UINT32 Reserved[8]; /* 32 */ +} EXT_DISC_PORT, *PEXT_DISC_PORT; /* 60 */ + +typedef struct _EXT_DISC_TARGET { + UINT8 WWNN[EXT_DEF_WWN_NAME_SIZE]; /* 8 */ + UINT8 WWPN[EXT_DEF_WWN_NAME_SIZE]; /* 8 */ + UINT8 Id [EXT_DEF_PORTID_SIZE]; /* 4; 3 bytes used. big endian*/ + + /* The following fields currently are not supported */ + UINT16 Type; /* 2; Target Type */ + UINT16 Status; /* 2; Target Status*/ + UINT16 Bus; /* 2; n/a for Solaris */ + + UINT16 TargetId; /* 2 */ + + /* The following field is currently not supported */ + UINT16 LunCount; /* 2; n/a for nt */ + + UINT16 Reserved[15]; /* 30 */ +} EXT_DISC_TARGET, *PEXT_DISC_TARGET; /* 60 */ + +/* The following command is not supported */ +typedef struct _EXT_DISC_LUN { /* n/a for nt */ + UINT16 Id; /* 2 */ + UINT16 State; /* 2 */ + UINT16 IoCount; /* 2 */ + UINT16 Reserved[15]; /* 30 */ +} EXT_DISC_LUN, *PEXT_DISC_LUN; /* 36 */ + + +/* SCSI address */ +typedef struct _EXT_SCSI_ADDR { + UINT16 Bus; /* 2 */ + UINT16 Target; /* 2 */ + UINT16 Lun; /* 2 */ + UINT16 Padding[5]; /* 10 */ +} EXT_SCSI_ADDR, *PEXT_SCSI_ADDR; /* 16 */ + + +/* Fibre Channel address */ +typedef struct _EXT_FC_ADDR { + union { + UINT8 WWNN[EXT_DEF_WWN_NAME_SIZE]; /* 8 */ + UINT8 WWPN[EXT_DEF_WWN_NAME_SIZE]; /* 8 */ + UINT8 Id[EXT_DEF_PORTID_SIZE]; /* 4 */ + } FcAddr; + UINT16 Type; /* 2 */ + UINT16 Padding[2]; /* 2 */ +} EXT_FC_ADDR, *PEXT_FC_ADDR; /* 24 */ + +#define EXT_DEF_TYPE_WWNN 1 +#define EXT_DEF_TYPE_WWPN 2 +#define EXT_DEF_TYPE_PORTID 3 +#define EXT_DEF_TYPE_FABRIC 4 + + +/* Destination address */ +typedef struct _EXT_DEST_ADDR { + union { + UINT8 WWNN[EXT_DEF_WWN_NAME_SIZE]; /* 8 */ + UINT8 WWPN[EXT_DEF_WWN_NAME_SIZE]; /* 8 */ + UINT8 Id[EXT_DEF_PORTID_SIZE]; /* 4 */ + struct { + UINT16 Bus; /* 2 */ + UINT16 Target; /* 2 */ + } ScsiAddr; + } DestAddr; + UINT16 DestType; /* 2 */ + UINT16 Lun; /* 2 */ + UINT16 Padding[2]; /* 4 */ +} EXT_DEST_ADDR, *PEXT_DEST_ADDR; /* 20 */ + + +#define EXT_DEF_DESTTYPE_WWNN 1 +#define EXT_DEF_DESTTYPE_WWPN 2 +#define EXT_DEF_DESTTYPE_PORTID 3 +#define EXT_DEF_DESTTYPE_FABRIC 4 +#define EXT_DEF_DESTTYPE_SCSI 5 + +/* Statistic */ +typedef struct _EXT_HBA_PORT_STAT { + UINT32 ControllerErrorCount; /* 4 */ + UINT32 DeviceErrorCount; /* 4 */ + UINT32 TotalIoCount; /* 4 */ + UINT32 TotalMBytes; /* 4; MB of data processed */ + UINT32 TotalLipResets; /* 4; Total no. of LIP Reset */ + UINT32 TotalInterrupts; /* 4; Total no. of Interrupts */ + UINT32 TotalLinkFailures; /* 4 */ + UINT32 TotalLossOfSync; /* 4 */ + UINT32 TotalLossOfSignals; /* 4 */ + UINT32 PrimitiveSeqProtocolErrorCount;/* 4 */ + UINT32 InvalidTransmissionWordCount; /* 4 */ + UINT32 InvalidCRCCount; /* 4 */ + UINT32 Reserved[16]; /* 64 */ +} EXT_HBA_PORT_STAT, *PEXT_HBA_PORT_STAT; /* 112 */ + + +/* Driver property */ +typedef struct _EXT_DRIVER { + UINT8 Version[EXT_DEF_MAX_STR_SIZE];/* 128 */ + UINT16 NumOfBus; /* 2; Port Type */ + UINT16 TargetsPerBus; /* 2; Port Status */ + UINT16 LunsPerTarget; /* 2 */ + UINT32 MaxTransferLen; /* 4 */ + UINT32 MaxDataSegments; /* 4 */ + UINT16 DmaBitAddresses; /* 2 */ + UINT16 IoMapType; /* 2 */ + UINT32 Attrib; /* 4 */ + UINT32 InternalFlags[4]; /* 16 */ + UINT32 Reserved[8]; /* 32 */ +} EXT_DRIVER, *PEXT_DRIVER; /* 198 */ + + +/* Firmware property */ +typedef struct _EXT_FW { + UINT8 Version[EXT_DEF_MAX_STR_SIZE];/* 128 */ + UINT32 Attrib; /* 4 */ + UINT16 Reserved[33]; /* 66 */ +} EXT_FW, *PEXT_FW; /* 198 */ + + +/* ISP/Chip property */ +typedef struct _EXT_CHIP { + UINT16 VendorId; /* 2 */ + UINT16 DeviceId; /* 2 */ + UINT16 SubVendorId; /* 2 */ + UINT16 SubSystemId; /* 2 */ + UINT16 PciBusNumber; /* 2 */ + UINT16 PciSlotNumber; /* 2 */ + UINT32 IoAddr; /* 4 */ + UINT32 IoAddrLen; /* 4 */ + UINT32 MemAddr; /* 4 */ + UINT32 MemAddrLen; /* 4 */ + UINT16 ChipType; /* 2 */ + UINT16 InterruptLevel; /* 2 */ + UINT16 OutMbx[8]; /* 16 */ + UINT32 Reserved[8]; /* 32 */ +} EXT_CHIP, *PEXT_CHIP; /* 80 */ + + +/* Request Buffer for RNID */ +typedef struct _EXT_RNID_REQ { + EXT_FC_ADDR Addr; + UINT8 DataFormat; + UINT32 Reserved[16]; +} EXT_RNID_REQ, *PEXT_RNID_REQ; + +/* Request Buffer for Set RNID */ +typedef struct _EXT_SET_RNID_REQ { + UINT8 IPVersion[2]; + UINT8 UDPPortNumber[2]; + UINT8 IPAddress[16]; + UINT32 Reserved[16]; +} EXT_SET_RNID_REQ, *PEXT_SET_RNID_REQ; + +/* RNID definition and data struct */ +#define SEND_RNID_RSP_SIZE 72 + +typedef struct _RNID_DATA +{ + UINT8 WWN[16]; /* 16 */ + UINT32 UnitType; /* 4 */ + UINT8 PortId[4]; /* 4 */ + UINT32 NumOfAttachedNodes; /* 4 */ + UINT8 IPVersion[2]; /* 2 */ + UINT8 UDPPortNumber[2]; /* 2 */ + UINT8 IPAddress[16]; /* 16 */ + UINT16 Reserved; /* 2 */ + UINT16 TopoDiscFlags; /* 2 */ +} EXT_RNID_DATA, *PEXT_RNID_DATA; /* 52 */ + + +/* SCSI pass-through */ +typedef struct _EXT_SCSI_PASSTHRU { + EXT_SCSI_ADDR TargetAddr; + UINT8 Direction; + UINT8 CdbLength; + UINT8 Cdb[EXT_DEF_SCSI_PASSTHRU_CDB_LENGTH]; + UINT32 Reserved[16]; + UINT8 SenseData[256]; +} EXT_SCSI_PASSTHRU, *PEXT_SCSI_PASSTHRU; + +/* FC SCSI pass-through */ +typedef struct _EXT_FC_SCSI_PASSTHRU { + EXT_DEST_ADDR FCScsiAddr; + UINT8 Direction; + UINT8 CdbLength; + UINT8 Cdb[EXT_DEF_SCSI_PASSTHRU_CDB_LENGTH]; + UINT32 Reserved[16]; + UINT8 SenseData[256]; +} EXT_FC_SCSI_PASSTHRU, *PEXT_FC_SCSI_PASSTHRU; + +/* SCSI pass-through direction */ +#define EXT_DEF_SCSI_PASSTHRU_DATA_IN 1 +#define EXT_DEF_SCSI_PASSTHRU_DATA_OUT 2 + + +/* EXT_REG_AEN Request struct */ +typedef struct _EXT_REG_AEN { + UINT32 Enable; /* 4; non-0 to enable, 0 to disable. */ + UINT32 Reserved; /* 4 */ +} EXT_REG_AEN, *PEXT_REG_AEN; /* 8 */ + +/* EXT_GET_AEN Response struct */ +typedef struct _EXT_ASYNC_EVENT { + UINT32 AsyncEventCode; /* 4 */ + union { + struct { + UINT8 RSCNInfo[EXT_DEF_PORTID_SIZE_ACTUAL];/* 3, BE */ + UINT8 AddrFormat; /* 1 */ + UINT32 Rsvd_1[2]; /* 8 */ + } RSCN; + + UINT32 Reserved[3]; /* 12 */ + } Payload; +} EXT_ASYNC_EVENT, *PEXT_ASYNC_EVENT; /* 16 */ + +/* Asynchronous Event Codes */ +#define EXT_DEF_LIP_OCCURRED 0x8010 +#define EXT_DEF_LINK_UP 0x8011 +#define EXT_DEF_LINK_DOWN 0x8012 +#define EXT_DEF_LIP_RESET 0x8013 +#define EXT_DEF_RSCN 0x8015 +#define EXT_DEF_DEVICE_UPDATE 0x8014 + +/* Required # of entries in the queue buffer allocated. */ +#define EXT_DEF_MAX_AEN_QUEUE EXT_DEF_MAX_AEN_QUEUE_OS + +/* LUN BitMask structure definition, array of 32bit words, + * 1 bit per lun. When bit == 1, the lun is masked. + * Most significant bit of mask[0] is lun 0, bit 24 is lun 7. + */ +typedef struct _EXT_LUN_BIT_MASK { +#if ((EXT_MAX_LUN & 0x7) == 0) + UINT8 mask[EXT_DEF_MAX_LUN >> 3]; +#else + UINT8 mask[(EXT_DEF_MAX_LUN + 8) >> 3 ]; +#endif +} EXT_LUN_BIT_MASK, *PEXT_LUN_BIT_MASK; + +/* Device type to get for EXT_SC_GET_PORT_SUMMARY */ +#define EXT_DEF_GET_KNOWN_DEVICE 0x1 +#define EXT_DEF_GET_VISIBLE_DEVICE 0x2 +#define EXT_DEF_GET_HIDDEN_DEVICE 0x4 +#define EXT_DEF_GET_FABRIC_DEVICE 0x8 +#define EXT_DEF_GET_LOOP_DEVICE 0x10 + +/* Each entry in device database */ +typedef struct _EXT_DEVICEDATAENTRY +{ + UINT8 NodeWWN[8]; /* Node World Wide Name for device */ + UINT8 PortWWN[8]; /* Port World Wide Name for device */ + UINT8 PortID[3]; /* Current PortId for device */ + UINT8 ControlFlags; /* Control flag */ + EXT_SCSI_ADDR TargetAddress; /* scsi address */ + UINT32 DeviceFlags; /* Flags for device */ + UINT16 LoopID; /* Loop ID */ + UINT16 BaseLunNumber; + UINT32 Reserved[32]; +} EXT_DEVICEDATAENTRY, *PEXT_DEVICEDATAENTRY; + +#define EXT_DEF_EXTERNAL_LUN_COUNT 2048 +#define EXT_DEF_EXTERNAL_LUN_BITMASK_BYTES (EXT_DEF_EXTERNAL_LUN_COUNT / 8) + +/* Structure as used in the IOCTL. */ + +typedef struct _EXT_EXTERNAL_LUN_BITMASK_ENTRY +{ + UINT8 NodeName[EXT_DEF_WWN_NAME_SIZE]; + UINT8 PortName[EXT_DEF_WWN_NAME_SIZE]; + + UINT32 Reserved2; + UINT32 Reserved3; + UINT32 Reserved4; + UINT32 Reserved5; /* Pad to 32-byte header.*/ + + UINT8 Bitmask[EXT_DEF_EXTERNAL_LUN_BITMASK_BYTES]; +} EXT_EXTERNAL_LUN_BITMASK_ENTRY, *PEXT_EXTERNAL_LUN_BITMASK_ENTRY; + + +/* Structure as it is stored in the NT registry.*/ + +typedef struct _LUN_BITMASK_LIST +{ + UINT16 Version; /* Should be LUN_BITMASK_REGISTRY_VERSION */ + UINT16 EntryCount; /* Count of variable entries following.*/ + UINT32 Reserved1; + UINT32 Reserved2; + UINT32 Reserved3; + UINT32 Reserved4; + UINT32 Reserved5; + UINT32 Reserved6; + UINT32 Reserved7; /* Pad to 32-byte header.*/ + + EXT_EXTERNAL_LUN_BITMASK_ENTRY BitmaskEntry[1]; + /* Variable-length data.*/ + +} EXT_LUN_BITMASK_LIST, *PEXT_LUN_BITMASK_LIST; + + +/* Device database information */ +typedef struct _EXT_DEVICEDATA +{ + UINT32 TotalDevices; /* Set to total number of device. */ + UINT32 ReturnListEntryCount; /* Set to number of device entries */ + /* returned in list. */ + + EXT_DEVICEDATAENTRY EntryList[1]; /* Variable length */ +} EXT_DEVICEDATA, *PEXT_DEVICEDATA; + + +/* Swap Target Device Data structure */ +typedef struct _EXT_SWAPTARGETDEVICE +{ + EXT_DEVICEDATAENTRY CurrentExistDevice; + EXT_DEVICEDATAENTRY NewDevice; +} EXT_SWAPTARGETDEVICE, *PEXT_SWAPTARGETDEVICE; + +#define EXT_DEF_LUN_BITMASK_LIST_MIN_ENTRIES 1 +#define EXT_DEF_LUN_BITMASK_LIST_MAX_ENTRIES 256 + +#ifdef _WIN64 +#define EXT_DEF_LUN_BITMASK_LIST_HEADER_SIZE 32 +#else +#define EXT_DEF_LUN_BITMASK_LIST_HEADER_SIZE \ + offsetof(LUN_BITMASK_LIST_BUFFER, asBitmaskEntry) +#endif + +#define EXT_DEF_LUN_BITMASK_LIST_MIN_SIZE \ + (EXT_DEF_LUN_BITMASK_LIST_HEADER_SIZE + \ + (sizeof(EXT_EXTERNAL_LUN_BITMASK_ENTRY) * EXT_DEF_LUN_BITMASK_LIST_MIN_ENTRIES)) +#define EXT_LUN_BITMASK_LIST_MAX_SIZE \ + (EXT_LUN_BITMASK_LIST_HEADER_SIZE + \ + (sizeof(EXT_EXTERNAL_LUN_BITMASK_ENTRY) * EXT_DEF_LUN_BITMASK_LIST_MAX_ENTRIES)) +/* + * LUN mask bit manipulation macros + * + * P = Pointer to an EXT_LUN_BIT_MASK union. + * L = LUN number. + */ +#define EXT_IS_LUN_BIT_SET(P,L) \ + ((P->mask[L/8] & (0x80 >> (L%8)))?1:0) + +#define EXT_SET_LUN_BIT(P,L) \ + (P->mask[L/8] |= (0x80 >> (L%8))) + +#define EXT_CLR_LUN_BIT(P,L) \ + (P->mask[L/8] &= ~(0x80 >> (L%8))) + + + +#ifdef _MSC_VER +#pragma pack() +#endif + +#endif /* _EXIOCT_H */ diff -Nru a/drivers/scsi/qla2x00exioctln.h b/drivers/scsi/qla2x00exioctln.h --- /dev/null Wed Dec 31 16:00:00 1969 +++ b/drivers/scsi/qla2x00exioctln.h Mon Apr 15 15:07:57 2002 @@ -0,0 +1,131 @@ +/***************************************************************************** +* QLOGIC LINUX SOFTWARE +* +* QLogic ISP2x00 device driver for Linux 2.2.x and 2.4.x +* Copyright (C) 2000 Qlogic Corporation +* (www.qlogic.com) +* +* This program is free software; you can redistribute it and/or modify it +* under the terms of the GNU General Public License as published by the +* Free Software Foundation; either version 2, or (at your option) any +* later version. +* +* This program is distributed in the hope that it will be useful, but +* WITHOUT ANY WARRANTY; without even the implied warranty of +* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU +* General Public License for more details. +****************************************************************************/ + +/* + Rev 8 Jan 08, 2001 BN + - Added LOOP_BACK ioctl define + + Rev 7 Nov 06, 2000 BN + - Added EXT_DEF_MAX_AEN_QUEUE_OS define + - Added define for handle_hba_t + + Rev 6 Oct 25, 2000 BN + - Added EXT_CC_DRIVER_PROP_OS define + + Rev 5 Oct 25, 2000 BN + - Redo the copyright header and add AEN details + + Rev 4 Oct 23, 2000 BN + - Added definition for BOOLEAN + + Rev 3 Oct 23, 2000 + BN + - Added definitions for EXT_ADDR_MODE_OS + and also include of + + Rev 2 Oct 18, 2000 + BN + - Enable API Exention support + + Rev 1 Original version Sep 7, 2000 + BN + + + +*/ + +#include + +#if BITS_PER_LONG <= 32 +#define EXT_ADDR_MODE_OS EXT_DEF_ADDR_MODE_32 +#else +#define EXT_ADDR_MODE_OS EXT_DEF_ADDR_MODE_64 +#endif + +#define UINT8 uint8_t +#define UINT16 uint16_t +#define UINT32 uint32_t +#define UINT64 void * +#define BOOLEAN uint8_t + +#define uint8_t unsigned char +#define uint16_t unsigned short +#define uint32_t unsigned int + +#if BITS_PER_LONG > 32 +#define uint64_t unsigned long +#else +#define uint64_t unsigned long long +#endif + +typedef struct track_instance +{ + + int handle; + +} track_instance_t; + + +#define EXT_DEF_MAX_HBA_OS 256 /* 0 - 0xFF */ +#define EXT_DEF_MAX_BUS_OS 1 +#define EXT_DEF_MAX_TARGET_OS 256 /* 0 - 0xFF */ +#define EXT_DEF_MAX_LUN_OS 256 /* 0 - 0xFF */ + +#define EXT_DEF_MAX_AEN_QUEUE_OS 64 + +#define QLMULTIPATH_MAGIC 'y' +#define _QLBUILD /* for exioct.h to enable include of qinsdmgt.h */ + +#define EXT_CC_STARTIOCTL _IOWR(QLMULTIPATH_MAGIC, 0 , sizeof(EXT_IOCTL)) +#define EXT_CC_SETINSTANCE _IOWR(QLMULTIPATH_MAGIC, 1 , sizeof(EXT_IOCTL)) + +#define EXT_CC_QUERY_OS _IOWR(QLMULTIPATH_MAGIC, 2 , sizeof(EXT_IOCTL)) +#define EXT_CC_SEND_FCCT_PASSTHRU_OS _IOWR(QLMULTIPATH_MAGIC, 3 , sizeof(EXT_IOCTL)) +#define EXT_CC_READ_NVRAM_OS _IOWR(QLMULTIPATH_MAGIC, 4 , sizeof(EXT_IOCTL)) +#define EXT_CC_SCSI_PASSTHRU_OS _IOWR(QLMULTIPATH_MAGIC, 5 , sizeof(EXT_IOCTL)) +#define EXT_CC_STOP_QCMD _IOWR(QLMULTIPATH_MAGIC, 6 , sizeof(EXT_IOCTL)) +#define EXT_CC_RESUME_QCMD _IOWR(QLMULTIPATH_MAGIC, 7 , sizeof(EXT_IOCTL)) +#define EXT_CC_GET_DATA_OS _IOWR(QLMULTIPATH_MAGIC, 8 , sizeof(EXT_IOCTL)) +#define EXT_CC_WWPN_TO_SCSIADDR _IOWR(QLMULTIPATH_MAGIC, 9 , sizeof(EXT_IOCTL)) +#define EXT_CC_REG_AEN_OS _IOWR(QLMULTIPATH_MAGIC, 10 , sizeof(EXT_IOCTL)) +#define EXT_CC_GET_AEN_OS _IOWR(QLMULTIPATH_MAGIC, 11 , sizeof(EXT_IOCTL)) + +#define EXT_CC_DRIVER_PROP_OS _IOWR(QLMULTIPATH_MAGIC, 12 , sizeof(EXT_IOCTL)) + +#define EXT_CC_LOOPBACK_OS _IOWR(QLMULTIPATH_MAGIC, 20 , sizeof(EXT_IOCTL)) + + + +/* + * Overrides for Emacs so that we almost follow Linus's tabbing style. + * Emacs will notice this stuff at the end of the file and automatically + * adjust the settings for this buffer only. This must remain at the end + * of the file. + * --------------------------------------------------------------------------- + * Local variables: + * c-indent-level: 2 + * c-brace-imaginary-offset: 0 + * c-brace-offset: -2 + * c-argdecl-indent: 2 + * c-label-offset: -2 + * c-continued-statement-offset: 2 + * c-continued-brace-offset: 0 + * indent-tabs-mode: nil + * tab-width: 8 + * End: + */ diff -Nru a/drivers/scsi/qla2x00ioctl.c b/drivers/scsi/qla2x00ioctl.c --- /dev/null Wed Dec 31 16:00:00 1969 +++ b/drivers/scsi/qla2x00ioctl.c Mon Apr 15 15:07:57 2002 @@ -0,0 +1,1179 @@ +/******************************************************************************** +* QLOGIC LINUX SOFTWARE +* +* QLogic QLA2x00 device driver for Linux 2.2.x and 2.4.x +* Copyright (C) 2000 Qlogic Corporation +* (www.qlogic.com) +* +* This program is free software; you can redistribute it and/or modify it +* under the terms of the GNU General Public License as published by the +* Free Software Foundation; either version 2, or (at your option) any +* later version. +* +* This program is distributed in the hope that it will be useful, but +* WITHOUT ANY WARRANTY; without even the implied warranty of +* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU +* General Public License for more details. +** +******************************************************************************/ +/**************************************************************************** +Revision History: + Rev. 1.3 Beta February 20, 2001 BN QLogic + - Zero the sp used for IOCTL SCSI Passthru operations + Rev. 1.2 Beta January 31, 2001 BN QLogic + - Added setting of scsi completion to pext->DetailStatus + and set pext->Status to EXT_STATUS_SCSI_STATUS. + - Added details to Statistics IOCTL for ispaborts, + lip_count, isr_count. + + Rev. 1.2 Beta January 8, 2001 BN QLogic + - Added loop-back diagnostic IOCTL support. + + Rev. 1.1 Beta October 27, 2000 BN QLogic + - Updated return status from ioctl function. + + Rev. 1.0 Beta October 20, 2000 BN QLogic + - Initial version check in + + +*/ + +void copy_up_EXT( PEXT_IOCTL pext, void *arg) { +uint32_t i; +uint8_t *usr_temp, *kernel_tmp; + + /* copy up the EXT_IOCTL to application (api library) */ + for (i=0 ; i < sizeof(EXT_IOCTL) ; i++) { + usr_temp = (uint8_t *)arg + i; + kernel_tmp = (uint8_t *)pext + i; + __put_user(*kernel_tmp, usr_temp); + } + + return; +} + + +/************************************************************************* + * ioctl_scsi_pt_done + * + * Description: + * Sets completion flag. + * + * Returns: + *************************************************************************/ +void ioctl_scsi_pt_done(Scsi_Cmnd *pscsi_cmd) { + struct Scsi_Host *host; + scsi_qla_host_t *ha; + + host = pscsi_cmd->host; + ha = (scsi_qla_host_t *) host->hostdata; + + ha->IoctlPassThru_InProgress = 0; + return; +} + + +/************************************************************************* + * ioctl_fcct_done + * + * Description: + * Sets completion flag. + * + * Returns: + *************************************************************************/ +void ioctl_fcct_done(Scsi_Cmnd *pscsi_cmd) { + struct Scsi_Host *host; + scsi_qla_host_t *ha; + + host = pscsi_cmd->host; + ha = (scsi_qla_host_t *) host->hostdata; + /* printk("ioctl_fcct_done post function called OK\n"); */ + DEBUG(sprintf(debug_buff,"ioctl_fcct_done post function called OK\n")); + DEBUG(qla2100_print(debug_buff)); + ha->IoctlPassFCCT_InProgress = 0; + return; +} + + +/************************************************************************* + * qla2100_ioctl + * + * Description: + * Performs ioctl requests not satified by the upper levels. + * + * Returns: + * ret = 0 Success + * ret != 0 Failed; detailed status copied to EXT_IOCTL structure + * if applicable + *************************************************************************/ +int +qla2100_ioctl(Scsi_Device *dev, int cmd, void *arg){ + + static EXT_IOCTL ext; + PEXT_IOCTL pext = &ext; + struct Scsi_Host *host; + scsi_qla_host_t *ha, *search_ha; + scsi_lu_t *q; +#if BITS_PER_LONG <= 32 + uint32_t handle; +#else + uint64_t handle; +#endif + uint32_t cnt, i, b, t, l, port_cnt, status; + uint32_t tgt_cnt, tgt, transfer_size, inst; + uint8_t *extptr, *usrsrc, *usr_temp, *kernel_tmp, *kernel_tmp1; + static Scsi_Cmnd scsi_cmd; + Scsi_Cmnd *pscsi_cmd = &scsi_cmd; + static Scsi_Device scsi_device; + static srb_t ioctl_sp; + srb_t *sp = &ioctl_sp; + static EXT_SCSI_PASSTHRU scsi_pass; + EXT_SCSI_PASSTHRU *pscsi_pass = &scsi_pass; + static EXT_HBA_NODE tmp_hba_node; + static EXT_HBA_PORT tmp_hba_port; + static EXT_DISC_PORT tmp_disc_port; + static EXT_DISC_TARGET tmp_disc_target; + static EXT_CHIP tmp_isp; + static EXT_HBA_PORT_STAT tmp_stat; + uint16_t mb[MAILBOX_REGISTER_COUNT]; + unsigned long cpu_flags = 0; + uint16_t scratch; + uint16_t *wptr = &scratch; + qla_boards_t *bdp; + uint8_t *temp; + uint8_t tempbuf[8]; + cmd_ms_iocb_entry_t *pkt; + + int ret = EINVAL; + + BZERO((caddr_t)sp,sizeof(srb_t)); + + host = dev->host; + ha = (scsi_qla_host_t *) host->hostdata; /* midlayer chosen instance */ + + ret = verify_area(VERIFY_READ, (void *)arg, sizeof(EXT_IOCTL)); + if (ret) { + DEBUG2(printk("[qla2100_ioctl: ERROR in verify_area READ ha=%8x]\n",(uint32_t)ha);) + return(ret); + } + /* copy in application layer EXT_IOCTL */ + for (i=0 ; i < sizeof(EXT_IOCTL) ; i++) { + usrsrc = (uint8_t *)(arg + i); + extptr = (uint8_t *)pext + i; + __get_user(*extptr, usrsrc); + } + + /* printk("[GOT QLA2100 IOCTL sig=%s cmd=%x]\n", + (char *)&pext->Signature,cmd); */ + + /* check signature of this ioctl */ + temp = (uint8_t *) &pext->Signature; +#if BITS_PER_LONG <= 32 +for (i=0 ; i<4 ; i++,temp++) tempbuf[i] = *temp; + if( (tempbuf[0] == 'Q') && (tempbuf[1] == 'L') && + (tempbuf[2] == 'O') && (tempbuf[3] == 'G')) status = 0; + else status = 1; +#else + if( (tempbuf[0] == 'Q') && (tempbuf[1] == 'L') && + (tempbuf[2] == 'O') && (tempbuf[3] == 'G') && + (tempbuf[4] == 'I') && (tempbuf[5] == 'C')) status = 0; + else status = 1; +#endif + if ( status != 0) { + DEBUG2(printk("[GOT QLA2100 IOCTL but signature did not match ha=%8x]\n", + (uint32_t)ha);) + ret = EXT_STATUS_ERR; + return(ret); + } + /* check version of this ioctl */ + if (pext->Version != EXT_VERSION) { + pext->Status = EXT_STATUS_ERR; + pext->DetailStatus = EXT_STATUS_INVALID_PARAM; + copy_up_EXT(pext,arg); + printk(KERN_WARNING "qla2x00: GOT QLA2100 IOCTL but version did not match.\n"); + ret = EXT_STATUS_ERR; + return(ret); + } + /* check for API setting HBA Instance for subsequent operations */ + if (cmd == (int)EXT_CC_SETINSTANCE) { + /* since API opens devices once and uses handle for subsequent calls */ + /* we keep a parameter to designate the "active HBA" for ioctls */ + if (pext->HbaSelect < num_hosts) { + apiHBAInstance = pext->HbaSelect; + pext->Status = EXT_STATUS_OK; + pext->DetailStatus = EXT_STATUS_OK; + copy_up_EXT(pext,arg); + ret = EXT_STATUS_OK; + } else { + pext->Status = EXT_STATUS_ERR; + pext->DetailStatus = EXT_STATUS_INVALID_PARAM; + copy_up_EXT(pext,arg); + DEBUG2(printk("[qla2100_ioctl: ERROR in EXT_SETINSTANCE ha=%8x]\n",(uint32_t)ha);) + ret = EXT_STATUS_ERR; + } + return(ret); /* Instance for subsequent IOCTLs are not set */ + } + + /* check for valid apiHBAInstance (set previously by EXT_SETINSTANCE + or default 0) and set ha context for this IOCTL */ + for (search_ha=qla2100_hostlist; + (search_ha != NULL) && search_ha->instance != apiHBAInstance; + search_ha = search_ha->next) ; + if ( !search_ha ) { + pext->Status = EXT_STATUS_ERR; + pext->DetailStatus = EXT_STATUS_INVALID_PARAM; + copy_up_EXT(pext,arg); + DEBUG2(printk("[qla2100_ioctl: ERROR in matching apiHBAInstance to an HBA Instance]\n");) + ret = EXT_STATUS_ERR; + return(ret); + } + /* IOCTL ha context is ready to be set from apiHBAInstance */ + ha = search_ha; + /* set EXT_IOCTL.HbaSelect for reference by IOCTL caller */ + pext->HbaSelect = apiHBAInstance; + + switch (cmd) { /* switch on EXT IOCTL COMMAND CODE */ + case EXT_CC_STARTIOCTL: + pext->Instance = num_hosts; + pext->Status = EXT_STATUS_OK; + pext->DetailStatus = EXT_STATUS_OK; + copy_up_EXT(pext,arg); + /*printk("[QLA2100 EXT_STARTIOCTL did OK ]\n");*/ + ret = EXT_STATUS_OK; + break; + case EXT_CC_QUERY: + /* All Query type ioctls are done here */ + switch(pext->SubCode) { + case EXT_SC_QUERY_HBA_NODE: + /* fill all available HBA NODE Information */ + bdp = &QLBoardTbl_fc[ha->devnum]; + for (i=0; i < 8 ;i++) tmp_hba_node.WWNN[i] = ha->node_name[i]; + sprintf((char *)(tmp_hba_node.Manufacturer),"Qlogic Corp."); + sprintf((char *)(tmp_hba_node.Model),(char *)&bdp->bdName[0]); + tmp_hba_node.SerialNum[0] = ha->node_name[5]; + tmp_hba_node.SerialNum[1] = ha->node_name[6]; + tmp_hba_node.SerialNum[2] = ha->node_name[7]; + sprintf((char *)(tmp_hba_node.DriverVersion),QLA2100_VERSION); + sprintf((char *)(tmp_hba_node.FWVersion),"%2d.%02d.%02d", + bdp->fwver[0], bdp->fwver[1], bdp->fwver[2]); + /* tmp_hba_node.NvramVersion = ha->nvram_version; */ + sprintf((char *)(tmp_hba_node.OptRomVersion),"0"); + tmp_hba_node.InterfaceType = EXT_DEF_FC_INTF_TYPE; + tmp_hba_node.PortCount = 1; + + ret = verify_area(VERIFY_WRITE, (void *)pext->ResponseAdr, + sizeof(EXT_HBA_NODE)); + if (ret) { + pext->Status = EXT_STATUS_ERR; + pext->DetailStatus = EXT_STATUS_COPY_ERR; + copy_up_EXT(pext,arg); + DEBUG2(printk("[qla2100_ioctl: ERROR verify_area WRITE ha=%8x]\n",(uint32_t)ha);) + return(ret); + } + /* now copy up the HBA_NODE to user */ + if (pext->ResponseLen < sizeof(EXT_HBA_NODE)) transfer_size = pext->ResponseLen; + else transfer_size = sizeof(EXT_HBA_NODE); + for (i=0 ; i < transfer_size ; i++) { + usr_temp = (uint8_t *)pext->ResponseAdr + i; + kernel_tmp = (uint8_t *)&tmp_hba_node + i; + __put_user(*kernel_tmp, usr_temp); + } + /*printk("[finished QLA2100 IOCTL QUERY_HBA_NODE ]\n"); */ + pext->Status = EXT_STATUS_OK; + pext->DetailStatus = EXT_STATUS_OK; + copy_up_EXT(pext,arg); + ret = EXT_STATUS_OK; + break; + case EXT_SC_QUERY_HBA_PORT: + /* reflect all HBA PORT related info */ + tmp_hba_port.WWPN[7] = ha->init_cb->port_name[7]; + tmp_hba_port.WWPN[6] = ha->init_cb->port_name[6]; + tmp_hba_port.WWPN[5] = ha->init_cb->port_name[5]; + tmp_hba_port.WWPN[4] = ha->init_cb->port_name[4]; + tmp_hba_port.WWPN[3] = ha->init_cb->port_name[3]; + tmp_hba_port.WWPN[2] = ha->init_cb->port_name[2]; + tmp_hba_port.WWPN[1] = ha->init_cb->port_name[1]; + tmp_hba_port.WWPN[0] = ha->init_cb->port_name[0]; + tmp_hba_port.Id[1] = ha->port_id[0]; + tmp_hba_port.Id[2] = ha->port_id[1]; + tmp_hba_port.Id[3] = ha->port_id[2]; + tmp_hba_port.Type = EXT_DEF_INITIATOR_DEV; + + port_cnt = 0; + tgt_cnt = 0; + for (tgt = 0; tgt < MAX_FIBRE_DEVICES ; tgt++) { + if (ha->fc_db[tgt].loop_id > LAST_SNS_LOOP_ID) + continue; + port_cnt++; + + /* at this point the linux driver does not differentiate */ + /* Initiator devices (ie HBAs) from Targets; so the count */ + /* is same for both */ + /* if (ha->fc_db[tgt] & FC_INITIATOR_DEVICE) + continue; */ + tgt_cnt++; + } + tmp_hba_port.DiscPortCount = port_cnt; + tmp_hba_port.DiscTargetCount = tgt_cnt; + + if ( ha->loop_down_timer == 0 && ha->loop_state == LOOP_DOWN) { + tmp_hba_port.State = EXT_DEF_HBA_LOOP_DOWN; + } else tmp_hba_port.State = EXT_DEF_HBA_OK; + tmp_hba_port.DiscPortNameType = EXT_DEF_USE_PORT_NAME; + + ret = verify_area(VERIFY_WRITE, (void *)pext->ResponseAdr , + sizeof(EXT_HBA_PORT)); + if (ret) { + pext->Status = EXT_STATUS_ERR; + pext->DetailStatus = EXT_STATUS_COPY_ERR; + copy_up_EXT(pext,arg); + DEBUG2(printk("[qla2100_ioctl: ERROR verify_area WRITE ha=%8x]\n",(uint32_t)ha);) + return(ret); + } + /* now copy up the HBA_PORT to user */ + if (pext->ResponseLen < sizeof(EXT_HBA_PORT)) transfer_size = pext->ResponseLen; + else transfer_size = sizeof(EXT_HBA_PORT); + for (i=0 ; i < transfer_size ; i++) { + usr_temp = (uint8_t *)pext->ResponseAdr + i; + kernel_tmp = (uint8_t *)&tmp_hba_port + i; + __put_user(*kernel_tmp, usr_temp); + } + /*printk("[finished QLA2100 IOCTL QUERY_HBA_PORT ports=%x tgts=%x]\n",port_cnt,tgt_cnt); */ + pext->Status = EXT_STATUS_OK; + pext->DetailStatus = EXT_STATUS_OK; + copy_up_EXT(pext,arg); + ret = EXT_STATUS_OK; + break; + case EXT_SC_QUERY_DISC_PORT: + for (tgt=0, inst=0; tgt < MAX_FIBRE_DEVICES; tgt++) { + if (ha->fc_db[tgt].loop_id > LAST_SNS_LOOP_ID) + continue; + if( inst != pext->Instance ) { + inst++; + continue; + } + break; + } + if (tgt == MAX_FIBRE_DEVICES) { + pext->Status = ret = EXT_STATUS_ERR; + pext->DetailStatus = EXT_STATUS_DEV_NOT_FOUND; + copy_up_EXT(pext,arg); + return(ret); + } + + tmp_disc_port.WWNN[0] = ha->fc_db[tgt].name[0]; + tmp_disc_port.WWNN[1] = ha->fc_db[tgt].name[1]; + tmp_disc_port.WWNN[2] = ha->fc_db[tgt].name[2]; + tmp_disc_port.WWNN[3] = ha->fc_db[tgt].name[3]; + + tmp_disc_port.WWNN[4] = ha->fc_db[tgt].name[4]; + tmp_disc_port.WWNN[5] = ha->fc_db[tgt].name[5]; + tmp_disc_port.WWNN[6] = ha->fc_db[tgt].name[6]; + tmp_disc_port.WWNN[7] = ha->fc_db[tgt].name[7]; + + tmp_disc_port.WWPN[0] = ha->fc_db[tgt].wwn[0]; + tmp_disc_port.WWPN[1] = ha->fc_db[tgt].wwn[1]; + tmp_disc_port.WWPN[2] = ha->fc_db[tgt].wwn[2]; + tmp_disc_port.WWPN[3] = ha->fc_db[tgt].wwn[3]; + + tmp_disc_port.WWPN[4] = ha->fc_db[tgt].wwn[4]; + tmp_disc_port.WWPN[5] = ha->fc_db[tgt].wwn[5]; + tmp_disc_port.WWPN[6] = ha->fc_db[tgt].wwn[6]; + tmp_disc_port.WWPN[7] = ha->fc_db[tgt].wwn[7]; + + tmp_disc_port.Id[1] = ha->fc_db[tgt].port_id[0]; + tmp_disc_port.Id[2] = ha->fc_db[tgt].port_id[1]; + tmp_disc_port.Id[3] = ha->fc_db[tgt].port_id[2]; + tmp_disc_port.Type = EXT_DEF_TARGET_DEV; + + tmp_disc_port.Status = EXT_STATUS_OK; + tmp_disc_port.Bus = 0; + tmp_disc_port.TargetId = tgt; + + ret = verify_area(VERIFY_WRITE, (void *)pext->ResponseAdr , + sizeof(EXT_DISC_PORT)); + if (ret) { + pext->Status = EXT_STATUS_ERR; + pext->DetailStatus = EXT_STATUS_COPY_ERR; + copy_up_EXT(pext,arg); + DEBUG2(printk("[qla2100_ioctl: ERROR verify_area WRITE ha=%8x]\n",(uint32_t)ha);) + return(ret); + } + + /* now copy up the DISC_PORT to user */ + if (pext->ResponseLen < sizeof(EXT_DISC_PORT)) transfer_size = pext->ResponseLen; + else transfer_size = sizeof(EXT_DISC_PORT); + for (i=0 ; i < transfer_size ; i++) { + usr_temp = (uint8_t *)pext->ResponseAdr + i; + kernel_tmp = (uint8_t *)&tmp_disc_port + i; + __put_user(*kernel_tmp, usr_temp); + } + /*printk("[finished QLA2100 IOCTL QUERY_DISC_PORT ]\n"); */ + pext->Status = EXT_STATUS_OK; + pext->DetailStatus = EXT_STATUS_OK; + copy_up_EXT(pext,arg); + ret = EXT_STATUS_OK; + break; + case EXT_SC_QUERY_DISC_TGT: + /* (for multipath merge) to do: search the ha->tgt[][] data base + instead of ha->fc_db[] so that we give details on Targets that + are visible to the OS. */ + for (tgt=0, inst=0; tgt < MAX_FIBRE_DEVICES; tgt++) { + if (ha->fc_db[tgt].loop_id > LAST_SNS_LOOP_ID) + continue; + if( inst != pext->Instance ) { + inst++; + continue; + } + break; + } + if (tgt == MAX_FIBRE_DEVICES) { + pext->Status = ret = EXT_STATUS_ERR; + pext->DetailStatus = EXT_STATUS_DEV_NOT_FOUND; + copy_up_EXT(pext,arg); + return(ret); + } + tmp_disc_target.WWNN[0]= ha->fc_db[tgt].name[0]; + tmp_disc_target.WWNN[1]= ha->fc_db[tgt].name[1]; + tmp_disc_target.WWNN[2]= ha->fc_db[tgt].name[2]; + tmp_disc_target.WWNN[3]= ha->fc_db[tgt].name[3]; + + tmp_disc_target.WWNN[4]= ha->fc_db[tgt].name[4]; + tmp_disc_target.WWNN[5]= ha->fc_db[tgt].name[5]; + tmp_disc_target.WWNN[6]= ha->fc_db[tgt].name[6]; + tmp_disc_target.WWNN[7]= ha->fc_db[tgt].name[7]; + + + tmp_disc_target.WWPN[0]= ha->fc_db[tgt].wwn[0]; + tmp_disc_target.WWPN[1]= ha->fc_db[tgt].wwn[1]; + tmp_disc_target.WWPN[2]= ha->fc_db[tgt].wwn[2]; + tmp_disc_target.WWPN[3]= ha->fc_db[tgt].wwn[3]; + + tmp_disc_target.WWPN[4]= ha->fc_db[tgt].wwn[4]; + tmp_disc_target.WWPN[5]= ha->fc_db[tgt].wwn[5]; + tmp_disc_target.WWPN[6]= ha->fc_db[tgt].wwn[6]; + tmp_disc_target.WWPN[7]= ha->fc_db[tgt].wwn[7]; + tmp_disc_target.Id[1] = ha->fc_db[tgt].port_id[0]; + tmp_disc_target.Id[2] = ha->fc_db[tgt].port_id[1]; + tmp_disc_target.Id[3] = ha->fc_db[tgt].port_id[2]; + tmp_disc_target.Type = EXT_DEF_TARGET_DEV; + + tmp_disc_target.Status = EXT_STATUS_OK; + tmp_disc_target.Bus = 0; + tmp_disc_target.TargetId = tgt; + + cnt = 0; + for (i=0; i < MAX_LUNS ; i++) { + if ((ha->tgt[0][tgt])->luns[i] !=0) + cnt++; + } + tmp_disc_target.LunCount = cnt; + + ret = verify_area(VERIFY_WRITE, (void *)pext->ResponseAdr , + sizeof(EXT_DISC_TARGET)); + if (ret) { + pext->Status = EXT_STATUS_ERR; + pext->DetailStatus = EXT_STATUS_COPY_ERR; + copy_up_EXT(pext,arg); + DEBUG2(printk("[qla2100_ioctl: ERROR verify_area WRITE ha=%8x]\n",(uint32_t)ha);) + return(ret); + } + /* now copy up the DISC_TGT to user */ + if (pext->ResponseLen < sizeof(EXT_DISC_PORT)) transfer_size = pext->ResponseLen; + else transfer_size = sizeof(EXT_DISC_TARGET); + for (i=0 ; i < transfer_size ; i++) { + usr_temp = (uint8_t *)pext->ResponseAdr + i; + kernel_tmp = (uint8_t *)&tmp_disc_target + i; + __put_user(*kernel_tmp, usr_temp); + } + /* printk("[finished QLA2100 IOCTL QUERY_DISC_TGT Luns=%x pid0=%x pid1=%x pid2=%x]\n",cnt,ha->fc_db[tgt].port_id[0],ha->fc_db[tgt].port_id[1],ha->fc_db[tgt].port_id[2]);*/ + + pext->Status = EXT_STATUS_OK; + pext->DetailStatus = EXT_STATUS_OK; + copy_up_EXT(pext,arg); + ret = EXT_STATUS_OK; + break; + case EXT_SC_QUERY_CHIP: + host = ha->host; + tmp_isp.VendorId = QLA2100_VENDOR_ID; + tmp_isp.DeviceId = ha->device_id; + tmp_isp.SubVendorId = QLA2100_VENDOR_ID; + tmp_isp.SubSystemId = 0; + tmp_isp.PciBusNumber = ha->pci_bus; + tmp_isp.PciSlotNumber = (ha->pci_device_fn & 0xf8) >> 3; + tmp_isp.IoAddr = host->io_port; + tmp_isp.IoAddrLen = 512; + tmp_isp.MemAddr = 0; + tmp_isp.MemAddrLen = 0; + tmp_isp.ChipType = 0; + tmp_isp.InterruptLevel = host->irq; + for (i=0;i<8;i++) tmp_isp.OutMbx[i] = 0; + + ret = verify_area(VERIFY_WRITE, (void *)pext->ResponseAdr , + sizeof(EXT_CHIP)); + if (ret) { + pext->Status = EXT_STATUS_ERR; + pext->DetailStatus = EXT_STATUS_COPY_ERR; + copy_up_EXT(pext,arg); + DEBUG2(printk("[qla2100_ioctl: ERROR verify_area WRITE ha=%8x]\n",(uint32_t)ha);) + return(ret); + } + /* now copy up the ISP to user */ + if (pext->ResponseLen < sizeof(EXT_CHIP)) transfer_size = pext->ResponseLen; + else transfer_size = sizeof(EXT_CHIP); + for (i=0 ; i < transfer_size ; i++) { + usr_temp = (uint8_t *)pext->ResponseAdr + i; + kernel_tmp = (uint8_t *)&tmp_isp + i; + __put_user(*kernel_tmp, usr_temp); + } + /* printk("[finished QLA2100 IOCTL QUERY_CHIP]\n"); */ + pext->Status = EXT_STATUS_OK; + pext->DetailStatus = EXT_STATUS_OK; + copy_up_EXT(pext,arg); + ret = EXT_STATUS_OK; + break; + + case EXT_SC_QUERY_DISC_LUN: + pext->Status = EXT_STATUS_OK; + pext->DetailStatus = EXT_STATUS_OK; + copy_up_EXT(pext,arg); + ret = EXT_STATUS_OK; + break; + default: + ret = EXT_STATUS_ERR; + break; + } + break; + case EXT_CC_GET_DATA: + switch(pext->SubCode) { + case EXT_SC_GET_STATISTICS: + + tmp_stat.ControllerErrorCount = ha->isp_aborts; + tmp_stat.DeviceErrorCount = 0; + tmp_stat.TotalIoCount = ha->qthreads; + tmp_stat.TotalMBytes = 0; + tmp_stat.TotalLipResets = ha->lip_count; + tmp_stat.TotalInterrupts = ha->isr_count; + + ret = verify_area(VERIFY_WRITE, (void *)pext->ResponseAdr, + sizeof(EXT_HBA_PORT_STAT)); + if (ret) { + pext->Status = EXT_STATUS_ERR; + pext->DetailStatus = EXT_STATUS_COPY_ERR; + copy_up_EXT(pext,arg); + DEBUG2(printk("[qla2100_ioctl: ERROR verify_area WRITE ha=%8x]\n",(uint32_t)ha);) + return(ret); + } + /* now copy up the STATISTICS to user */ + if (pext->ResponseLen < sizeof(EXT_HBA_PORT_STAT)) transfer_size = pext->ResponseLen; + else transfer_size = sizeof(EXT_HBA_PORT_STAT); + for (i=0 ; i < transfer_size ; i++) { + usr_temp = (uint8_t *)pext->ResponseAdr + i; + kernel_tmp = (uint8_t *)&tmp_stat + i; + __put_user(*kernel_tmp, usr_temp); + } + /*printk("[finished QLA2100 IOCTL STATISTICS ]\n");*/ + pext->Status = EXT_STATUS_OK; + pext->DetailStatus = EXT_STATUS_OK; + copy_up_EXT(pext,arg); + ret = EXT_STATUS_OK; + break; + default: + break; + } + break; + case EXT_CC_SEND_FCCT_PASSTHRU: + DEBUG(sprintf(debug_buff,"qla2100_ioctl: start EXT_CC_SEND_FCCT_PASSTHRU\n")); + DEBUG(qla2100_print(debug_buff)); + /* Management Server type (fc switch) pass thru ioctl */ + /* same as EXT_FCSCSI_REQ but it is going to the FC switch */ + /* clear ioctl_sp and scsi_cmd to be used */ + kernel_tmp = (uint8_t *)sp; + for (i=0;iioctl_mem; + for (i=0;iResponseLen > PAGE_SIZE) pext->ResponseLen = PAGE_SIZE; + if (pext->RequestLen > PAGE_SIZE) { + pext->Status = EXT_STATUS_ERR; + pext->DetailStatus = EXT_STATUS_INVALID_PARAM; + copy_up_EXT(pext,arg); + /*printk("[EXT_CC_SEND_FCCT_PASSTHRU too big ResponseLen=%x ReqLen=%x]\n",pext->ResponseLen,pext->RequestLen); */ + DEBUG2(printk("[qla2100_ioctl: ERROR size of requested Resp_len in EXT_CC_SEND_FCCT_PASSTHRU]\n");) + return(ret); + } + ret = verify_area(VERIFY_READ, (void *)pext->RequestAdr, + pext->RequestLen); + if (ret){ + pext->Status = EXT_STATUS_ERR; + pext->DetailStatus = EXT_STATUS_COPY_ERR; + copy_up_EXT(pext,arg); + /*printk("[EXT_CC_SEND_FCCT_PASSTHRU verify read error]\n");*/ + DEBUG2(printk("[qla2100_ioctl: ERROR verify_area READ of EXT_CC_SEND_FCCT_PASSTHRU]\n");) + return(ret); + } + for (i=0 ; i < pext->RequestLen ; i++) { + /* copy in from user space the fcct command to be sent */ + usr_temp = (uint8_t *)pext->RequestAdr + i; + kernel_tmp = (uint8_t *)ha->ioctl_mem + i; + __get_user(*kernel_tmp, usr_temp); + /* printk("{%x}",*kernel_tmp); */ + } + /* check on current topology or loop down */ + if ((ha->current_topology != ISP_CFG_F) && + (ha->current_topology != ISP_CFG_FL ) ) { + pext->Status = EXT_STATUS_ERR; + pext->DetailStatus = EXT_STATUS_DEV_NOT_FOUND; + copy_up_EXT(pext,arg); + /*printk("[EXT_CC_SEND_FCCT_PASSTHRU wrong topology current=%x]\n", + ha->current_topology); */ + DEBUG2(printk("[qla2100_ioctl: ERROR EXT_CC_SEND_FCCT_PASSTHRU not in F-Port or FL-Port mode]\n");) + return(ret); + } + /* check on loop down */ + if ( ha->loop_down_timer == 0 && ha->loop_state == LOOP_DOWN) { + pext->Status = EXT_STATUS_ERR; + pext->DetailStatus = EXT_STATUS_DEV_NOT_FOUND; + copy_up_EXT(pext,arg); + /* printk("[EXT_CC_SEND_FCCT_PASSTHRU loop down]\n"); */ + DEBUG2(printk("[qla2100_ioctl: ERROR EXT_CC_SEND_FCCT_PASSTHRU not in F-Port mode]\n");) + return(ret); + } + /* login to management server device */ + if (ha->flags.managment_server_logged_in == 0) { + mb[0] = MBC_LOGIN_FABRIC_PORT; + mb[1] = MANAGEMENT_SERVER << 8; + mb[2] = 0xff; + mb[3] = 0xfffa; + + ret = qla2100_mailbox_command(ha, BIT_3|BIT_2|BIT_1|BIT_0, + &mb[0]); + if ( (ret != 0) || (mb[0] == 0x4006) || + (mb[0] == 0x4009) || (mb[0] != 0x4000) ) { + pext->Status = EXT_STATUS_ERR; + pext->DetailStatus = EXT_STATUS_DEV_NOT_FOUND; + copy_up_EXT(pext,arg); + /* printk("[EXT_CC_SEND_FCCT_PASSTHRU could not login to sns]\n"); */ + DEBUG2(printk("[qla2100_ioctl: ERROR could not login to Management Server]\n");) + DEBUG(sprintf(debug_buff,"FCCT ioctl: call qla2100_ms_req_pkt\n")); + DEBUG(qla2100_print(debug_buff)); + return(ret); + } + ha->flags.managment_server_logged_in = 1; + } + + /* setup sp for this FCCT pass thru */ + pscsi_cmd->host = ha->host; + sp->cmd = pscsi_cmd; + sp->flags = SRB_WATCHDOG; + + /* mark this as a special delivery and collection command */ + scsi_cmd.flags = 0; + scsi_cmd.scsi_done = ioctl_fcct_done; + + DEBUG(sprintf(debug_buff,"FCCT ioctl: FABRIC_LOGIN OK, call qla2100_ms_req_pkt\n")); + DEBUG(qla2100_print(debug_buff)); + + /* get spin lock for this operation */ + spin_lock_irqsave(&io_request_lock, cpu_flags); + + /* Get MS request packet. */ + if( (pkt = (cmd_ms_iocb_entry_t *)qla2100_ms_req_pkt(ha, sp) ) ) { + pkt->entry_type = MS_IOCB_TYPE; + pkt->entry_count = 1; + pkt->loop_id = MANAGEMENT_SERVER; + pkt->timeout = 4; + pkt->DSDcount = 1; + pkt->RespDSDcount = 2; + pkt->Response_bytecount = pext->ResponseLen; + pkt->Request_bytecount = pext->RequestLen; + + /* loading command payload address */ + pkt->dseg_req_address[0] = LS_64BITS(ha->ioctl_mem_phys); + pkt->dseg_req_address[1] = MS_64BITS(ha->ioctl_mem_phys); + pkt->dseg_req_length = pext->RequestLen; + + /* loading command response address */ + pkt->dseg_rsp_address[0] = LS_64BITS(ha->ioctl_mem_phys); + pkt->dseg_rsp_address[1] = MS_64BITS(ha->ioctl_mem_phys); + pkt->dseg_rsp_length = pext->ResponseLen; + + /* set flag to indicate IOCTL FCCT PassThru in progress */ + ha->IoctlPassFCCT_InProgress = 1; + + ha->ioctl_timer = 6; /* 6 ticks of 1 second timer max wait */ + + /* Issue command to ISP */ + qla2100_isp_cmd(ha); + } + /* release spin lock since command is issued */ + spin_unlock_irqrestore(&io_request_lock, cpu_flags); + + DEBUG(sprintf(debug_buff, + "FCCT ioctl: Command issued and released spin lock\n")); + DEBUG(qla2100_print(debug_buff)); + + if (!pkt) { + pext->Status = EXT_STATUS_ERR; + pext->DetailStatus = EXT_STATUS_DEV_NOT_FOUND; + copy_up_EXT(pext,arg); + /* printk("[EXT_CC_SEND_FCCT_PASSTHRU could not get Request Packet]\n"); */ + DEBUG2(printk("[qla2100_ioctl:EXT_CC_SEND_FCCT_PASSTHRU could not get Request Packet]\n");) + return(ret); + } + + /* wait for post function or timer to zero the InProgress flag */ + while (ha->IoctlPassFCCT_InProgress == 1) { + udelay(35); + } + + DEBUG(sprintf(debug_buff, + "FCCT ioctl: finished while(InProgress) wait loop \n")); + DEBUG(qla2100_print(debug_buff)); + /* printk("[FCCT IOCTL finished while(InProgress) wait loop ]\n");*/ + + if (ha->IoctlPassFCCT_InProgress == 1) { + /* We waited and post function did not get called */ + DEBUG(printk("[FCCT IOCTL post function not called]\n");) + DEBUG(sprintf(debug_buff, + "FCCT ioctl: post function not called \n")); + DEBUG(qla2100_print(debug_buff)); + pext->Status = EXT_STATUS_ERR; + pext->DetailStatus = EXT_STATUS_DEV_NOT_FOUND; + copy_up_EXT(pext,arg); + ret = EXT_STATUS_ERR; + } else { + /* getting device data and putting in pext->ResponseAdr */ + /* printk("[post function called; start FCCT IOCTL returning up data ]\n");*/ + ret = verify_area(VERIFY_WRITE, (void *)pext->ResponseAdr , + pext->ResponseLen); + if (ret) { + pext->Status = EXT_STATUS_ERR; + pext->DetailStatus = EXT_STATUS_COPY_ERR; + copy_up_EXT(pext,arg); + DEBUG2(printk("[qla2100_ioctl: ERROR verify_area WRITE for IOCTL PT ha=%8x]\n", + (uint32_t)ha);) + return(ret); + } + /* sending back data returned from Management Server */ + for (i=0 ; i < pext->ResponseLen ; i++) { + usr_temp = (uint8_t *)pext->ResponseAdr + i; + kernel_tmp = (uint8_t *)ha->ioctl_mem + i; + /*printk("[%x]",*kernel_tmp);*/ + __put_user(*kernel_tmp, usr_temp); + } + /*printk("[finished QLA2100 IOCTL EXT_CC_SEND_FCCT_PASSTHRU]\n");*/ + pext->Status = EXT_STATUS_SCSI_STATUS; + pext->DetailStatus = sp->scode; + copy_up_EXT(pext,arg); + ret = EXT_STATUS_OK; + } + break; + + case EXT_CC_SEND_SCSI_PASSTHRU: + /* printk("[start EXT_CC_SEND_SCSI_PASSTHRU]\n"); */ + ret = verify_area(VERIFY_READ, (void *)pext->RequestAdr, + sizeof(EXT_SCSI_PASSTHRU)); + if (ret) { + pext->Status = EXT_STATUS_ERR; + pext->DetailStatus = EXT_STATUS_COPY_ERR; + copy_up_EXT(pext,arg); + DEBUG2(printk("[qla2100_ioctl: ERROR verify_area READ of EXT_SCSI_PASSTHRU]\n");) + return(ret); + } + for (i=0 ; i < sizeof(EXT_SCSI_PASSTHRU) ; i++) { + usr_temp = (uint8_t *)pext->RequestAdr + i; + kernel_tmp = (uint8_t *)pscsi_pass + i; + __get_user(*kernel_tmp, usr_temp); + } + if (pext->ResponseLen > PAGE_SIZE) { + pext->Status = EXT_STATUS_ERR; + pext->DetailStatus = EXT_STATUS_INVALID_PARAM; + copy_up_EXT(pext,arg); + DEBUG2(printk("[qla2100_ioctl: ERROR size of requested EXT_SCSI_PASSTHRU]\n");) + return(ret); + } + /* clear ioctl_sp and scsi_cmd and scsi_device to be used */ + kernel_tmp = (uint8_t *)sp; + for (i=0;iioctl_mem; + for (i=0;ihost = ha->host; + sp->cmd = pscsi_cmd; + sp->flags = SRB_WATCHDOG; + + /* mark this as a special delivery and collection command */ + scsi_cmd.flags = 0; + scsi_cmd.scsi_done = ioctl_scsi_pt_done; + + scsi_cmd.device = &scsi_device; + scsi_cmd.device->tagged_queue = 0; + scsi_cmd.use_sg = 0; /* no ScatterGather */ + scsi_cmd.target = pscsi_pass->TargetAddr.Target; + scsi_cmd.lun = pscsi_pass->TargetAddr.Lun; + scsi_cmd.request_bufflen = pext->ResponseLen; + scsi_cmd.request_buffer = ha->ioctl_mem; + scsi_cmd.timeout_per_command = 0x300; + + // printk("[start FCSCSI IOCTL look at direction t=%x l=%x]\n", + // scsi_cmd.target,scsi_cmd.lun); + if (pscsi_pass->Direction == EXT_DEF_SCSI_PASSTHRU_DATA_OUT) { + /* sending user data from pext->ResponseAdr to device */ + ret = verify_area(VERIFY_READ, (void *)pext->ResponseAdr, + pext->ResponseLen); + if (ret) { + pext->Status = EXT_STATUS_ERR; + pext->DetailStatus = EXT_STATUS_COPY_ERR; + copy_up_EXT(pext,arg); + DEBUG2(printk("[qla2100_ioctl: ERROR verify_area READ EXT_SCSI_PASSTHRU]\n");) + return(ret); + } + for (i=0 ; i < pext->ResponseLen ; i++) { + usr_temp = (uint8_t *)pext->ResponseAdr + i; + kernel_tmp = (uint8_t *)ha->ioctl_mem + i; + __get_user(*kernel_tmp, usr_temp); + } + } + if (pscsi_pass->CdbLength == 6) { + scsi_cmd.cmd_len = 6; + scsi_cmd.data_cmnd[0] = scsi_cmd.cmnd[0] = pscsi_pass->Cdb[0]; + scsi_cmd.data_cmnd[1] = scsi_cmd.cmnd[1] = pscsi_pass->Cdb[1]; + scsi_cmd.data_cmnd[2] = scsi_cmd.cmnd[2] = pscsi_pass->Cdb[2]; + scsi_cmd.data_cmnd[3] = scsi_cmd.cmnd[3] = pscsi_pass->Cdb[3]; + scsi_cmd.data_cmnd[4] = scsi_cmd.cmnd[4] = pscsi_pass->Cdb[4]; + scsi_cmd.data_cmnd[5] = scsi_cmd.cmnd[5] = pscsi_pass->Cdb[5]; + scsi_cmd.data_cmnd[6] = scsi_cmd.cmnd[6] = 0; + scsi_cmd.data_cmnd[7] = scsi_cmd.cmnd[7] = 0; + scsi_cmd.data_cmnd[8] = scsi_cmd.cmnd[8] = 0; + scsi_cmd.data_cmnd[9] = scsi_cmd.cmnd[9] = 0; + } else if (pscsi_pass->CdbLength == 10) { + scsi_cmd.cmd_len = 0x0A; + scsi_cmd.data_cmnd[0] = scsi_cmd.cmnd[0] = pscsi_pass->Cdb[0]; + scsi_cmd.data_cmnd[1] = scsi_cmd.cmnd[1] = pscsi_pass->Cdb[1]; + scsi_cmd.data_cmnd[2] = scsi_cmd.cmnd[2] = pscsi_pass->Cdb[2]; + scsi_cmd.data_cmnd[3] = scsi_cmd.cmnd[3] = pscsi_pass->Cdb[3]; + scsi_cmd.data_cmnd[4] = scsi_cmd.cmnd[4] = pscsi_pass->Cdb[4]; + scsi_cmd.data_cmnd[5] = scsi_cmd.cmnd[5] = pscsi_pass->Cdb[5]; + scsi_cmd.data_cmnd[6] = scsi_cmd.cmnd[6] = pscsi_pass->Cdb[6]; + scsi_cmd.data_cmnd[7] = scsi_cmd.cmnd[7] = pscsi_pass->Cdb[7]; + scsi_cmd.data_cmnd[8] = scsi_cmd.cmnd[8] = pscsi_pass->Cdb[8]; + scsi_cmd.data_cmnd[9] = scsi_cmd.cmnd[9] = pscsi_pass->Cdb[9]; + } else if (pscsi_pass->CdbLength == 12) { + scsi_cmd.cmd_len = 0x0C; + scsi_cmd.data_cmnd[0] = scsi_cmd.cmnd[0] = pscsi_pass->Cdb[0]; + scsi_cmd.data_cmnd[1] = scsi_cmd.cmnd[1] = pscsi_pass->Cdb[1]; + scsi_cmd.data_cmnd[2] = scsi_cmd.cmnd[2] = pscsi_pass->Cdb[2]; + scsi_cmd.data_cmnd[3] = scsi_cmd.cmnd[3] = pscsi_pass->Cdb[3]; + scsi_cmd.data_cmnd[4] = scsi_cmd.cmnd[4] = pscsi_pass->Cdb[4]; + scsi_cmd.data_cmnd[5] = scsi_cmd.cmnd[5] = pscsi_pass->Cdb[5]; + scsi_cmd.data_cmnd[6] = scsi_cmd.cmnd[6] = pscsi_pass->Cdb[6]; + scsi_cmd.data_cmnd[7] = scsi_cmd.cmnd[7] = pscsi_pass->Cdb[7]; + scsi_cmd.data_cmnd[8] = scsi_cmd.cmnd[8] = pscsi_pass->Cdb[8]; + scsi_cmd.data_cmnd[9] = scsi_cmd.cmnd[9] = pscsi_pass->Cdb[9]; + scsi_cmd.data_cmnd[10] = scsi_cmd.cmnd[10] = pscsi_pass->Cdb[10]; + scsi_cmd.data_cmnd[11] = scsi_cmd.cmnd[10] = pscsi_pass->Cdb[11]; + } + /* Generate LU queue on bus, target, LUN */ + b = SCSI_BUS_32(pscsi_cmd); + t = SCSI_TCN_32(pscsi_cmd); + l = SCSI_LUN_32(pscsi_cmd); + + /* set sp->target for 32bit/64bit delivery */ + sp->wdg_time = 0; + + /* check presense of requested target and other conditions */ + if( TGT_Q(ha,b,t) == NULL || + ( TGT_Q(ha,b,t) && TGT_Q(ha,b,t)->loop_id > LAST_SNS_LOOP_ID) || + ( ha->loop_down_timer == 0 && ha->loop_state == LOOP_DOWN)) { + printk(KERN_WARNING "qla2x00: FCSCSI IOCTL Target MISSING.\n"); + DEBUG2(printk("scsi(%2d:%2d:%2d:%2d): SCSI PT port unavailable\n", + (int)ha->host_no,b,t,l);) + pext->Status = EXT_STATUS_ERR; + pext->DetailStatus = EXT_STATUS_DEV_NOT_FOUND; + copy_up_EXT(pext,arg); + return(ret); + } + /* get spin lock for this operation */ + spin_lock_irqsave(&io_request_lock, cpu_flags); + + /* Allocate a LUN/DEVICE queue from this request */ + if( (q = GET_LU_Q(ha, b, t,l)) == NULL ) { + DRIVER_LOCK + if( (q = qla2100_lun_alloc()) == NULL ) { + pext->Status = EXT_STATUS_ERR; + pext->DetailStatus = EXT_STATUS_DEV_NOT_FOUND; + copy_up_EXT(pext,arg); + DEBUG2(printk("[qla2100_ioctl: ERROR in GET_LU_Q for SCSI_PASSTHRU ha=%8x]\n", + (uint32_t)ha);) + ret = EXT_STATUS_ERR; + return(ret); + } + LU_Q(ha, b, t, l) = q; + DEBUG(sprintf(debug_buff,"Allocate new device queue 0x%x\n",q)); + DEBUG(qla2100_print(debug_buff)); + DRIVER_UNLOCK + } + /* Set an invalid handle until we issue the command to ISP */ + /* then we will set the real handle value. */ + handle = INVALID_HANDLE; + CMD_HANDLE(pscsi_cmd) = (unsigned char *)handle; + + if( sp->flags ) { + sp->port_down_retry_count = ha->port_down_retry_count - 1; + sp->retry_count = ha->retry_count; + DEBUG3(sprintf(debug_buff,"qla2100: PT Set retry counts =0x%x,0x%x\n\r", + sp->port_down_retry_count,sp->retry_count)); + DEBUG3(qla2100_print(debug_buff)); + } + qla2100_putq_t(q,sp); + + /* set flag to indicate IOCTL SCSI PassThru in progress */ + ha->IoctlPassThru_InProgress = 1; + + //printk("[start FCSCSI IOCTL restart queues]\n"); + /* send command to adapter */ + qla2100_restart_queues(ha,FALSE); + + /* release spin lock since command is queued */ + spin_unlock_irqrestore(&io_request_lock, cpu_flags); + + ha->ioctl_timer = 6; /* 6 ticks of 1 second timer max wait */ + + /* wait for post function or timer to zero the InProgress flag */ + while (ha->IoctlPassThru_InProgress == 1) { + udelay(35); + } + + //printk("[start FCSCSI IOCTL finished while]\n"); + if (ha->IoctlPassThru_InProgress == 1) { + /* We waited and post function did not get called */ + DEBUG(printk("[FCSCSI IOCTL post function not called]\n");) + pext->Status = EXT_STATUS_ERR; + pext->DetailStatus = EXT_STATUS_DEV_NOT_FOUND; + copy_up_EXT(pext,arg); + ret = EXT_STATUS_ERR; + } else { + if (pscsi_pass->Direction == EXT_DEF_SCSI_PASSTHRU_DATA_IN) { + /* getting device data and putting in pext->ResponseAdr */ + ret = verify_area(VERIFY_WRITE, (void *)pext->ResponseAdr , + pext->ResponseLen); + if (ret) { + pext->Status = EXT_STATUS_ERR; + pext->DetailStatus = EXT_STATUS_COPY_ERR; + copy_up_EXT(pext,arg); + DEBUG2(printk("[qla2100_ioctl: ERROR verify_area WRITE for IOCTL PT ha=%8x]\n", + (uint32_t)ha);) + return(ret); + } + /* now copy up the READ data to user */ + for (i=0 ; i < pext->ResponseLen ; i++) { + usr_temp = (uint8_t *)pext->ResponseAdr + i; + kernel_tmp = (uint8_t *)ha->ioctl_mem + i; + /*printk("[%x]",*kernel_tmp);*/ + __put_user(*kernel_tmp, usr_temp); + } + } + //printk("[[sense0=%x sense2=%x]]\n", + //pscsi_cmd->sense_buffer[0], + //pscsi_cmd->sense_buffer[2]); + /* copy up structure to make sense data available to user */ + for (i=0;i<16;i++) + pscsi_pass->SenseData[i] = pscsi_cmd->sense_buffer[i]; + ret = verify_area(VERIFY_WRITE, (void *)pext->RequestAdr, + sizeof(EXT_SCSI_PASSTHRU)); + if (ret) { + pext->Status = EXT_STATUS_ERR; + pext->DetailStatus = EXT_STATUS_COPY_ERR; + copy_up_EXT(pext,arg); + DEBUG2(printk("[qla2100_ioctl: ERROR verify_area WRITE of EXT_SCSI_PASSTHRU]\n");) + return(ret); + } + for (i=0 ; i < sizeof(EXT_SCSI_PASSTHRU) ; i++) { + usr_temp = (uint8_t *)pext->RequestAdr + i; + kernel_tmp = (uint8_t *)pscsi_pass + i; + __put_user(*kernel_tmp, usr_temp); + } + /* printk("[finished QLA2100 IOCTL EXT_FCSCSI_REQ]\n"); */ + pext->Status = EXT_STATUS_SCSI_STATUS; + pext->DetailStatus = sp->scode; + copy_up_EXT(pext,arg); + ret = EXT_STATUS_OK; + } + break; + + case EXT_CC_READ_NVRAM: + if (pext->ResponseLen < sizeof(nvram21_t)) transfer_size = pext->ResponseLen; + else transfer_size = sizeof(nvram21_t)/2; + for( i = 0, cnt = 0; cnt < transfer_size ; cnt++ , i++ ) { + *wptr = qla2100_get_nvram_word(ha, cnt); + + usr_temp = (uint8_t *)pext->ResponseAdr; + kernel_tmp = (uint8_t *)wptr; + + usr_temp += i; /* even byte */ + __put_user(*kernel_tmp, usr_temp); + + i++; + usr_temp = (uint8_t *)pext->ResponseAdr; + kernel_tmp1 = (uint8_t *)wptr + 1; + usr_temp += i; /* odd byte */ + __put_user(*kernel_tmp1, usr_temp); + } + + /* printk("[finished QLA2100 IOCTL EXT_NVR_RD]\n"); */ + pext->Status = EXT_STATUS_OK; + pext->DetailStatus = EXT_STATUS_OK; + copy_up_EXT(pext,arg); + ret = EXT_STATUS_OK; + break; + + case EXT_CC_LOOPBACK: + DEBUG(sprintf(debug_buff,"qla2100_ioctl: start EXT_CC_LOOPBACK\n")); + DEBUG(qla2100_print(debug_buff)); + + /* printk("[start EXT_CC_LOOPBACK]\n"); */ + + if (ha->device_id == QLA2100_DEVICE_ID) { + pext->Status = EXT_STATUS_ERR; + pext->DetailStatus = EXT_STATUS_DEV_NOT_FOUND; + copy_up_EXT(pext,arg); + DEBUG2(printk("[EXT_CC_SEND_LOOP_BACK not supported on QLA2100]\n");) + return(ret); + } + + if (pext->ResponseLen > PAGE_SIZE) pext->ResponseLen = PAGE_SIZE; + if (pext->RequestLen > PAGE_SIZE) { + pext->Status = EXT_STATUS_ERR; + pext->DetailStatus = EXT_STATUS_INVALID_PARAM; + copy_up_EXT(pext,arg); + /*printk("[EXT_CC_LOOPBACK too big ResponseLen=%x ReqLen=%x]\n",pext->ResponseLen,pext->RequestLen); */ + DEBUG2(printk("[qla2100_ioctl: ERROR size of requested Resp_len in EXT_CC_SEND_LOOP_BACK]\n");) + return(ret); + } + ret = verify_area(VERIFY_READ, (void *)pext->RequestAdr, + pext->RequestLen); + if (ret){ + pext->Status = EXT_STATUS_ERR; + pext->DetailStatus = EXT_STATUS_COPY_ERR; + copy_up_EXT(pext,arg); + /*printk("[EXT_CC_LOOPBACK verify read error]\n");*/ + DEBUG2(printk("[qla2100_ioctl: ERROR verify_area READ of EXT_CC_LOOPBACK]\n");) + return(ret); + } + for (i=0 ; i < pext->ResponseLen ; i++) { + /* copy in from user space the user data pattern to be sent */ + usr_temp = (uint8_t *)pext->ResponseAdr + i; + kernel_tmp = (uint8_t *)ha->ioctl_mem + i; + __get_user(*kernel_tmp, usr_temp); + /* printk("{%x}",*kernel_tmp); */ + } + /* check on loop down */ + if ( ha->loop_down_timer == 0 && ha->loop_state == LOOP_DOWN) { + pext->Status = EXT_STATUS_ERR; + pext->DetailStatus = EXT_STATUS_DEV_NOT_FOUND; + copy_up_EXT(pext,arg); + /* printk("[EXT_CC_LOOPBACK loop down]\n"); */ + return(ret); + } + + /* get spin lock for this operation */ + spin_lock_irqsave(&io_request_lock, cpu_flags); + + mb[0] = MBC_DIAGNOSTIC_LOOP_BACK; + mb[1] = 0x72; /* options: 64 bit, use buffer for snd/rcv on ext. loop */ + mb[2] = mb[3] = mb[4] = mb[5] = mb[6] = mb[7] = mb[8] = mb[9] = 0; + mb[10] = LSW(pext->ResponseLen); + mb[11] = MSW(pext->ResponseLen); + mb[12] = 0; /* transfer segment count */ + mb[13] = 0; /* receive segment count */ + mb[14] = LSW(ha->ioctl_mem_phys); /* send data address */ + mb[15] = MSW(ha->ioctl_mem_phys); + mb[20] = QL21_64BITS_3RDWD(ha->ioctl_mem_phys); + mb[21] = QL21_64BITS_4THWD(ha->ioctl_mem_phys); + mb[16] = LSW(ha->ioctl_mem_phys); /* recv data address */ + mb[17] = MSW(ha->ioctl_mem_phys); + mb[6] = QL21_64BITS_3RDWD(ha->ioctl_mem_phys); + mb[7] = QL21_64BITS_4THWD(ha->ioctl_mem_phys); + mb[18] = 1; /* iteration count lsb */ + mb[19] = 0; /* iteration count msb */ + + DEBUG(sprintf(debug_buff, + "LoopBack ioctl: issue loop back mailbox command\n")); + DEBUG(qla2100_print(debug_buff)); + + // wait for 64 bit loopback ready firmware + status = qla2100_mailbox_command(ha,BIT_21|BIT_20|BIT_19|BIT_18| + BIT_17|BIT_16|BIT_15|BIT_14| + BIT_13|BIT_12|BIT_11| + BIT_10|BIT_7|BIT_6|BIT_1|BIT_0, + &mb[0]); + + /* release spin lock since command is issued */ + spin_unlock_irqrestore(&io_request_lock, cpu_flags); + + if (status) { + DEBUG(sprintf(debug_buff, + "LoopBack ioctl: issue loop back mailbox command FAILED\n")); + DEBUG(qla2100_print(debug_buff)); + pext->Status = EXT_STATUS_ERR; + pext->DetailStatus = EXT_STATUS_ERR; + copy_up_EXT(pext,arg); + ret = EXT_STATUS_ERR; + } else { + /* put looped back data in pext->ResponseAdr */ + /* printk("[LoopBack ioctl: LoopBack was OK ]\n");*/ + ret = verify_area(VERIFY_WRITE, (void *)pext->ResponseAdr , + pext->ResponseLen); + if (ret) { + pext->Status = EXT_STATUS_ERR; + pext->DetailStatus = EXT_STATUS_COPY_ERR; + copy_up_EXT(pext,arg); + DEBUG2(printk("[LoopBack ioctl: ERROR verify_area WRITE ha=%x]\n", + (uint32_t)ha);) + return(ret); + } + /* sending back looped back data */ + for (i=0 ; i < pext->ResponseLen ; i++) { + usr_temp = (uint8_t *)pext->ResponseAdr + i; + kernel_tmp = (uint8_t *)ha->ioctl_mem + i; + /*printk("[%x]",*kernel_tmp);*/ + __put_user(*kernel_tmp, usr_temp); + } + /*printk("[finished QLA2100 IOCTL EXT_CC_LOOPBACK]\n");*/ + pext->Status = EXT_STATUS_OK; + pext->DetailStatus = EXT_STATUS_OK; + copy_up_EXT(pext,arg); + ret = EXT_STATUS_OK; + } + break; + +/* case EXT_CC_RSCN_REG: + break; + case EXT_CC_RSCN_GET: + break; + case EXT_CC_ELS_RNID_SEND: + break; + case EXT_CC_ELS_RTIN_SEND: + break; + case EXT_CC_PLATFORM_REG: + break; + +all others go here */ + + default: + break; + } + + return(ret); +} + diff -Nru a/drivers/scsi/qlavendor.c b/drivers/scsi/qlavendor.c --- /dev/null Wed Dec 31 16:00:00 1969 +++ b/drivers/scsi/qlavendor.c Mon Apr 15 15:07:57 2002 @@ -0,0 +1,325 @@ +/******************************************************************************** +* QLOGIC LINUX SOFTWARE +* +* QLogic ISP2x00 device driver for Linux 2.2.x (redhat 6.X). +* +* COPYRIGHT (C) 2000 QLOGIC CORPORATION +* +* This program is free software; you can redistribute it and/or modify +* it under the terms of the Qlogic's Linux Software License. See below. +* +* This program is WITHOUT ANY WARRANTY; without even the implied warranty of +* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. +* +* Redistribution and use in source and binary forms, with or without +* modification, are permitted provided that the following conditions +* are met: +* +* 1. Redistribution's or source code must retain the above copyright +* notice, this list of conditions, and the following disclaimer, +* without modification, immediately at the beginning of the file. +* 2. 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If you cannot +distribute so as to satisfy simultaneously your obligations under this License +and any other pertinent obligations, then as a consequence you may not distribute the +Software at all. + +If any portion of this section is held invalid or unenforceable under any particular +circumstance, the balance of the section is intended to apply and the section as a whole +is intended to apply in other circumstances. +NO WARRANTY + +11. THE SOFTWARE IS PROVIDEDWITHOUT A WARRANTY OF ANY KIND. THERE IS NO +WARRANTY FOR THE SOFTWARE, TO THE EXTENT PERMITTED BY APPLICABLE LAW. +EXCEPT WHEN OTHERWISE STATED IN WRITING THE COPYRIGHT HOLDERS AND/OR +OTHER PARTIES PROVIDE THE SOFTWARE "AS IS" WITHOUT WARRANTY OF ANY KIND, +EITHER EXPRESSED OR IMPLIED, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED +WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE. THE +ENTIRE RISK AS TO THE QUALITY AND PERFORMANCE OF THE SOFTWARE IS WITH YOU. +SHOULD THE SOFTWARE PROVE DEFECTIVE, YOU ASSUME THE COST OF ALL +NECESSARY SERVICING, REPAIR OR CORRECTION. + +12. IN NO EVENT UNLESS REQUIRED BY APPLICABLE LAW OR AGREED TO IN WRITING +WILL ANY COPYRIGHT HOLDER, OR ANY OTHER PARTY WHO MAY MODIFY AND/OR +REDISTRIBUTE THE SOFTWARE AS PERMITTED ABOVE, BE LIABLE TO YOU FOR +DAMAGES, INCLUDING ANY GENERAL, SPECIAL, INCIDENTAL OR CONSEQUENTIAL +DAMAGES ARISING OUT OF THE USE OR INABILITY TO USE THE SOFTWARE (INCLUDING +BUT NOT LIMITED TO LOSS OF DATA OR DATA BEING RENDERED INACCURATE OR +LOSSES SUSTAINED BY YOU OR THIRD PARTIES OR A FAILURE OF THE SOFTWARE TO +OPERATE WITH ANY OTHER SOFTWARES), EVEN IF SUCH HOLDER OR OTHER PARTY HAS +BEEN ADVISED OF THE POSSIBILITY OF SUCH DAMAGES. +END OF TERMS AND CONDITIONS + +******************************************************************************/ +/* + * vendor specific op codes. +*/ + +#define UCSCSI_DCMD 0x20 /* DAC960 direct command */ +#define UCSCSI_DCMD_PASSTHRU 0x21 /* DAC960 pass-through command */ +#define UC_SCSI_DCMD 0x22 /* DAC960 FSI direct command */ +#define DAC_CDB_LEN 12 +#define DAC_SENSE_LEN 64 + +#define SCSI_WRITE10 0x2A /* Required for direct disk writes */ +#define SCSI_WRITE6 0x0A /* Required for direct disk writes */ +#define SCSI_WRITEBUFFER 0x3B /* Required for flashing disk FW */ +#define DACMD_WRITE_CONF_ONDISK 0x4B +#define DACMD_WRITE_CONFIG 0x06 +#define DACMD_WRITE_CONF2 0x3C +#define DACMD_WRITE_CONFLABEL 0x49 /* Write configuration label */ +#define DACMD_WRITE_CONFIG_V3x 0x4F +#define DACMD_ADD_CONFIG_V2x 0x18 +#define DACMD_ADD_CONFIG_V3x 0x4C +#define DACMD_STORE_IMAGE 0x21 +#define DACMD_ADD_CAPACITY 0x2A /* add physical drives to existing array */ +#define DACMD_WRITE_IOPORT 0x3A /* write port B */ +#define DACMD_S2S_WRITEFULLCONF 0x60 /* write full configuration */ +#define DACMD_S2S_ADDFULLCONF 0x62 /* add full configuration */ +#define DACMD_S2S_WRITELUNMAP_OLD 0x58 /* write LUN map information */ +#define DACMD_S2S_WRITELUNMAP 0xD2 /* Write LUN MAP Information */ +#define DACMD_S2S_WRITE_IOPORT 0x66 /* write expanded IO port */ +#define DACMD_WRITE_V3x 0x34 /* write data from plain memory */ +#define DACMD_S2S_WRITESIG 0x4D /* write signature information */ + +#define MDACIOCTL_STOREIMAGE 0x2C /* Store the softeware image on controller */ +#define MDACIOCTL_WRITESIGNATURE 0xA6 /* Write Controller Signature */ +#define MDACIOCTL_SETREALTIMECLOCK 0xAC /* Set real time clock value */ +#define MDACIOCTL_PASS_THRU_CDB 0xAD /* Set up a pass-through command */ +#define MDACIOCTL_PASS_THRU_INITIATE 0xAE /* Initiates a pass-through read/write command (bi-directional) */ +#define MDACIOCTL_CREATENEWCONF 0xC0 /* Create new configruation */ +#define MDACIOCTL_ADDNEWCONF 0xC4 /* Add new logical/physical device to configruation */ +#define MDACIOCTL_MORE 0xC6 /* Do MORE operation */ +#define MDACIOCTL_SETPHYSDEVPARAMETER 0xC8 /* Set physical device parameters */ +#define MDACIOCTL_SETLOGDEVPARAMETER 0xCF /* Set logical device parameters */ +#define MDACIOCTL_SETCONTROLLERPARAMTER 0xD1 /* Set controller parameter */ +#define MDACIOCTL_WRITESANMAP 0xD4 /* Set logical device LUN map */ +#define MDACIOCTL_SETMACADDRESS 0xD5 /* Set controller MAC address */ + + /* + * qla2100_set_scsi_direction + * This routine will set the proper direction for vendor specific + * commands. + * + * Note: Vendors should modify this routine to set the proper + * direction of the transfer if they used vendor specific commands. + * + * Input: + * ha = adapter block pointer. + * sp = SCSI Request Block structure pointer. + * + * Returns: + * 0 = success, was able to issue command. + */ + + void qla2100_set_vend_direction(scsi_qla_host_t *ha, + Scsi_Cmnd *cmd, cmd_entry_t *pkt) { + /* This section added 10-JAN-2001 by Lethe. Required to facilitate SCSI + pass-through for flashing disk firmware, and direct disk writes under + Mylex 6.x and 5.x Firmware */ + if( cmd->data_cmnd[0] == UCSCSI_DCMD_PASSTHRU) { + pkt->control_flags = 0; + switch (cmd->data_cmnd[2]) { + case SCSI_WRITE6: + case SCSI_WRITE10: + case SCSI_WRITEBUFFER: + pkt->control_flags |= BIT_6; + break; + default: + pkt->control_flags |= BIT_5; + } + } + else if( cmd->data_cmnd[0] == UCSCSI_DCMD ) + { + pkt->control_flags = 0; + switch( cmd->data_cmnd[2] ) + { + case DACMD_WRITE_CONF_ONDISK: + case DACMD_WRITE_CONFIG: + case DACMD_WRITE_CONF2: + case DACMD_WRITE_CONFLABEL: + case DACMD_WRITE_CONFIG_V3x: + case DACMD_ADD_CONFIG_V2x: + case DACMD_ADD_CONFIG_V3x: + case DACMD_STORE_IMAGE: + case DACMD_ADD_CAPACITY: + case DACMD_WRITE_IOPORT: + case DACMD_S2S_WRITEFULLCONF: + case DACMD_S2S_ADDFULLCONF: + case DACMD_S2S_WRITELUNMAP_OLD: + case DACMD_S2S_WRITELUNMAP: + case DACMD_S2S_WRITE_IOPORT: + case DACMD_WRITE_V3x: + case DACMD_S2S_WRITESIG: + pkt->control_flags |= BIT_6; + break; + default: + pkt->control_flags |= BIT_5; + } + } + +/******************************************************************************************* +* The below logic is required to operate correctly with Mylex (IBM's) DAC960 family of * +* external RAID controllers. * +* * +* In addition to defining whether below CDBs are Reads or Writes, Mylex, in their infinite * +* wisdom, defined a vendor-specific CDB which can act as a Read OR a write, depending on * +* the parameters sent in a previous MDACIOCTL_PASS_THRU_CDB. Instead of adding a lot of * +* logic to define and maintain a MDACIOCTL_PASS_THRU_CDB queue, and parse each one of them * +* to determine direction, I took easy way out (also the low-overhead method). * +* * +* If the high-order bit of the 32-bit UniqueID, defined in byte 3 of data_cmnd[3] is set * +* then I will mark that as a CDB which is going to be a write, otherwise the pass thru * +* operation will be a read. If somebody wishes to rewrite the driver to maintain a 30-sec * +* command queue, and parse the contents of each data buffer passed in to determine R or W * +* then they are free to do so, and it will not impact future versions of the Distributed * +* Array Manager, which required this fix in the first place. * +* * +* This configurator and patch was written by David A. Lethe of Xyratex david@santools.com. * +* In addition, the logic to check cmd->data_cmnd[0] == UC_SCSI_DCMD, was written by * +* Sammy Wilborn of Silicon Graphics, Inc, and David Lethe * +* They define CDBs used by the DAC960FF family, when running FW 7.x and above. * +* * +*******************************************************************************************/ + + else if ( cmd->data_cmnd[0] == UC_SCSI_DCMD ) /* Mylex DAC960 FW 7.x */ + { + pkt->control_flags = 0; + switch( cmd->data_cmnd[2] ) + { + case MDACIOCTL_STOREIMAGE: + case MDACIOCTL_SETREALTIMECLOCK: + case MDACIOCTL_WRITESIGNATURE: + case MDACIOCTL_CREATENEWCONF: + case MDACIOCTL_ADDNEWCONF: + case MDACIOCTL_MORE: + case MDACIOCTL_SETPHYSDEVPARAMETER: + case MDACIOCTL_SETLOGDEVPARAMETER: + case MDACIOCTL_SETCONTROLLERPARAMTER: + case MDACIOCTL_WRITESANMAP: + case MDACIOCTL_SETMACADDRESS: + case MDACIOCTL_PASS_THRU_CDB: + pkt->control_flags |= BIT_6; + break; + default: + if (cmd->data_cmnd[2] == MDACIOCTL_PASS_THRU_INITIATE) { + /* If the high bit of the UniqueID field of the vendor- + specific field is TRUE, then it is marked as a write. */ + if (cmd->data_cmnd[3] & 0x80) + pkt->control_flags |= BIT_6; + else + pkt->control_flags |= BIT_5; + } + else + pkt->control_flags |= BIT_5; + break; + } + } + else + { + pkt->control_flags |= BIT_5; + } + + } diff -Nru a/drivers/scsi/scsi_ioctl.c b/drivers/scsi/scsi_ioctl.c --- a/drivers/scsi/scsi_ioctl.c Mon Apr 15 15:07:57 2002 +++ b/drivers/scsi/scsi_ioctl.c Mon Apr 15 15:07:57 2002 @@ -196,6 +196,9 @@ unsigned int needed, buf_needed; int timeout, retries, result; int data_direction, gfp_mask = GFP_KERNEL; +#if __GNUC__ < 3 + int foo; +#endif if (!sic) return -EINVAL; @@ -209,11 +212,21 @@ if (verify_area(VERIFY_READ, sic, sizeof(Scsi_Ioctl_Command))) return -EFAULT; +#if __GNUC__ < 3 + foo = __get_user(inlen, &sic->inlen); + if (foo) + return -EFAULT; + + foo = __get_user(outlen, &sic->outlen); + if (foo) + return -EFAULT; +#else if(__get_user(inlen, &sic->inlen)) return -EFAULT; if(__get_user(outlen, &sic->outlen)) return -EFAULT; +#endif /* * We do not transfer more than MAX_BUF with this interface. diff -Nru a/drivers/usb/host/usb-ohci.c b/drivers/usb/host/usb-ohci.c --- a/drivers/usb/host/usb-ohci.c Mon Apr 15 15:07:56 2002 +++ b/drivers/usb/host/usb-ohci.c Mon Apr 15 15:07:56 2002 @@ -2624,6 +2624,7 @@ /* may be called with controller, bus, and devices active */ static void __devexit +static void __devexit ohci_pci_remove (struct pci_dev *dev) { ohci_t *ohci = pci_get_drvdata(dev); @@ -2654,6 +2655,7 @@ release_mem_region (pci_resource_start (dev, 0), pci_resource_len (dev, 0)); pci_disable_device (dev); } + #ifdef CONFIG_PM diff -Nru a/fs/binfmt_elf.c b/fs/binfmt_elf.c --- a/fs/binfmt_elf.c Mon Apr 15 15:07:57 2002 +++ b/fs/binfmt_elf.c Mon Apr 15 15:07:57 2002 @@ -572,6 +572,7 @@ SET_PERSONALITY(elf_ex, ibcs2_interpreter); } + /* OK, we are done with that, now set up the arg stuff, and then start this sucker up */ diff -Nru a/fs/fcntl.c b/fs/fcntl.c --- a/fs/fcntl.c Mon Apr 15 15:07:56 2002 +++ b/fs/fcntl.c Mon Apr 15 15:07:56 2002 @@ -311,6 +311,7 @@ * to fix this will be in libc. */ err = filp->f_owner.pid; + force_successful_syscall_return(); break; case F_SETOWN: lock_kernel(); diff -Nru a/fs/nfsd/nfsctl.c b/fs/nfsd/nfsctl.c --- a/fs/nfsd/nfsctl.c Mon Apr 15 15:07:56 2002 +++ b/fs/nfsd/nfsctl.c Mon Apr 15 15:07:56 2002 @@ -13,6 +13,7 @@ #include #include #include +#include #include #include #include diff -Nru a/fs/proc/base.c b/fs/proc/base.c --- a/fs/proc/base.c Mon Apr 15 15:07:56 2002 +++ b/fs/proc/base.c Mon Apr 15 15:07:56 2002 @@ -445,7 +445,24 @@ } #endif +static loff_t mem_lseek(struct file * file, loff_t offset, int orig) +{ + switch (orig) { + case 0: + file->f_pos = offset; + break; + case 1: + file->f_pos += offset; + break; + default: + return -EINVAL; + } + force_successful_syscall_return(); + return file->f_pos; +} + static struct file_operations proc_mem_operations = { + llseek: mem_lseek, read: mem_read, write: mem_write, open: mem_open, diff -Nru a/include/asm-i386/hw_irq.h b/include/asm-i386/hw_irq.h --- a/include/asm-i386/hw_irq.h Mon Apr 15 15:07:57 2002 +++ b/include/asm-i386/hw_irq.h Mon Apr 15 15:07:57 2002 @@ -106,4 +106,6 @@ static inline void hw_resend_irq(struct hw_interrupt_type *h, unsigned int i) {} #endif +extern irq_desc_t irq_desc [NR_IRQS]; + #endif /* _ASM_HW_IRQ_H */ diff -Nru a/include/asm-i386/page.h b/include/asm-i386/page.h --- a/include/asm-i386/page.h Mon Apr 15 15:07:56 2002 +++ b/include/asm-i386/page.h Mon Apr 15 15:07:56 2002 @@ -30,8 +30,8 @@ #endif -#define clear_user_page(page, vaddr) clear_page(page) -#define copy_user_page(to, from, vaddr) copy_page(to, from) +#define clear_user_page(page, vaddr, pg) clear_page(page) +#define copy_user_page(to, from, vaddr, pg) copy_page(to, from) /* * These are used to make use of C type-checking.. diff -Nru a/include/asm-i386/ptrace.h b/include/asm-i386/ptrace.h --- a/include/asm-i386/ptrace.h Mon Apr 15 15:07:56 2002 +++ b/include/asm-i386/ptrace.h Mon Apr 15 15:07:56 2002 @@ -58,6 +58,7 @@ #define user_mode(regs) ((VM_MASK & (regs)->eflags) || (3 & (regs)->xcs)) #define instruction_pointer(regs) ((regs)->eip) extern void show_regs(struct pt_regs *); +#define force_successful_syscall_return() do { } while (0) #endif #endif diff -Nru a/include/asm-ia64/acpi-ext.h b/include/asm-ia64/acpi-ext.h --- a/include/asm-ia64/acpi-ext.h Mon Apr 15 15:07:56 2002 +++ /dev/null Wed Dec 31 16:00:00 1969 @@ -1,323 +0,0 @@ -#ifndef _ASM_IA64_ACPI_EXT_H -#define _ASM_IA64_ACPI_EXT_H - -/* - * Advanced Configuration and Power Infterface - * Based on 'ACPI Specification 1.0b' Febryary 2, 1999 - * and 'IA-64 Extensions to the ACPI Specification' Rev 0.6 - * - * Copyright (C) 1999 VA Linux Systems - * Copyright (C) 1999 Walt Drummond - * Copyright (C) 2000 Intel Corp. - * Copyright (C) 2000,2001 J.I. Lee - * ACPI 2.0 specification - */ - -#include -#include -#include - -#pragma pack(1) -#define ACPI_RSDP_SIG "RSD PTR " /* Trailing space required */ -#define ACPI_RSDP_SIG_LEN 8 -typedef struct { - char signature[8]; - u8 checksum; - char oem_id[6]; - u8 revision; - u32 rsdt; - u32 length; - struct acpi_xsdt *xsdt; - u8 ext_checksum; - u8 reserved[3]; -} acpi20_rsdp_t; - -typedef struct { - char signature[4]; - u32 length; - u8 revision; - u8 checksum; - char oem_id[6]; - char oem_table_id[8]; - u32 oem_revision; - u32 creator_id; - u32 creator_revision; -} acpi_desc_table_hdr_t; - -#define ACPI_RSDT_SIG "RSDT" -#define ACPI_RSDT_SIG_LEN 4 -typedef struct { - acpi_desc_table_hdr_t header; - u8 reserved[4]; - u32 entry_ptrs[1]; /* Not really . . . */ -} acpi20_rsdt_t; - -#define ACPI_XSDT_SIG "XSDT" -#define ACPI_XSDT_SIG_LEN 4 -typedef struct acpi_xsdt { - acpi_desc_table_hdr_t header; - unsigned long entry_ptrs[1]; /* Not really . . . */ -} acpi_xsdt_t; - -/* Common structures for ACPI 2.0 and 0.71 */ - -typedef struct acpi_entry_iosapic { - u8 type; - u8 length; - u8 id; - u8 reserved; - u32 irq_base; /* start of IRQ's this IOSAPIC is responsible for. */ - unsigned long address; /* Address of this IOSAPIC */ -} acpi_entry_iosapic_t; - -/* Local SAPIC flags */ -#define LSAPIC_ENABLED (1<<0) -#define LSAPIC_PERFORMANCE_RESTRICTED (1<<1) -#define LSAPIC_PRESENT (1<<2) - -/* Defines legacy IRQ->pin mapping */ -typedef struct { - u8 type; - u8 length; - u8 bus; /* Constant 0 == ISA */ - u8 isa_irq; /* ISA IRQ # */ - u32 pin; /* called vector in spec; really IOSAPIC pin number */ - u16 flags; /* Edge/Level trigger & High/Low active */ -} acpi_entry_int_override_t; - -#define INT_OVERRIDE_ACTIVE_LOW 0x03 -#define INT_OVERRIDE_LEVEL_TRIGGER 0x0d - -/* IA64 ext 0.71 */ - -typedef struct { - char signature[8]; - u8 checksum; - char oem_id[6]; - char reserved; /* Must be 0 */ - struct acpi_rsdt *rsdt; -} acpi_rsdp_t; - -typedef struct acpi_rsdt { - acpi_desc_table_hdr_t header; - u8 reserved[4]; - unsigned long entry_ptrs[1]; /* Not really . . . */ -} acpi_rsdt_t; - -#define ACPI_SAPIC_SIG "SPIC" -#define ACPI_SAPIC_SIG_LEN 4 -typedef struct { - acpi_desc_table_hdr_t header; - u8 reserved[4]; - unsigned long interrupt_block; -} acpi_sapic_t; - -/* SAPIC structure types */ -#define ACPI_ENTRY_LOCAL_SAPIC 0 -#define ACPI_ENTRY_IO_SAPIC 1 -#define ACPI_ENTRY_INT_SRC_OVERRIDE 2 -#define ACPI_ENTRY_PLATFORM_INT_SOURCE 3 /* Unimplemented */ - -typedef struct acpi_entry_lsapic { - u8 type; - u8 length; - u16 acpi_processor_id; - u16 flags; - u8 id; - u8 eid; -} acpi_entry_lsapic_t; - -typedef struct { - u8 type; - u8 length; - u16 flags; - u8 int_type; - u8 id; - u8 eid; - u8 iosapic_vector; - u8 reserved[4]; - u32 global_vector; -} acpi_entry_platform_src_t; - -/* ACPI 2.0 with 1.3 errata specific structures */ - -#define ACPI_MADT_SIG "APIC" -#define ACPI_MADT_SIG_LEN 4 -typedef struct { - acpi_desc_table_hdr_t header; - u32 lapic_address; - u32 flags; -} acpi_madt_t; - -/* acpi 2.0 MADT flags */ -#define MADT_PCAT_COMPAT (1<<0) - -/* acpi 2.0 MADT structure types */ -#define ACPI20_ENTRY_LOCAL_APIC 0 -#define ACPI20_ENTRY_IO_APIC 1 -#define ACPI20_ENTRY_INT_SRC_OVERRIDE 2 -#define ACPI20_ENTRY_NMI_SOURCE 3 -#define ACPI20_ENTRY_LOCAL_APIC_NMI 4 -#define ACPI20_ENTRY_LOCAL_APIC_ADDR_OVERRIDE 5 -#define ACPI20_ENTRY_IO_SAPIC 6 -#define ACPI20_ENTRY_LOCAL_SAPIC 7 -#define ACPI20_ENTRY_PLATFORM_INT_SOURCE 8 - -typedef struct acpi20_entry_lsapic { - u8 type; - u8 length; - u8 acpi_processor_id; - u8 id; - u8 eid; - u8 reserved[3]; - u32 flags; -} acpi20_entry_lsapic_t; - -typedef struct acpi20_entry_lapic_addr_override { - u8 type; - u8 length; - u8 reserved[2]; - unsigned long lapic_address; -} acpi20_entry_lapic_addr_override_t; - -typedef struct { - u8 type; - u8 length; - u16 flags; - u8 int_type; - u8 id; - u8 eid; - u8 iosapic_vector; - u32 global_vector; -} acpi20_entry_platform_src_t; - -/* constants for interrupt routing API for device drivers */ -#define ACPI20_ENTRY_PIS_PMI 1 -#define ACPI20_ENTRY_PIS_INIT 2 -#define ACPI20_ENTRY_PIS_CPEI 3 -#define ACPI_MAX_PLATFORM_IRQS 4 - -#define ACPI_SPCRT_SIG "SPCR" -#define ACPI_SPCRT_SIG_LEN 4 - -#define ACPI_DBGPT_SIG "DBGP" -#define ACPI_DBGPT_SIG_LEN 4 - -extern int acpi20_parse(acpi20_rsdp_t *); -extern int acpi20_early_parse(acpi20_rsdp_t *); -extern int acpi_parse(acpi_rsdp_t *); -extern const char *acpi_get_sysname (void); -extern int acpi_request_vector(u32 int_type); -extern void (*acpi_idle) (void); /* power-management idle function, if any */ -#ifdef CONFIG_NUMA -extern cnodeid_t paddr_to_nid(unsigned long paddr); -#endif - -/* - * ACPI 2.0 SRAT Table - * http://www.microsoft.com/HWDEV/design/SRAT.htm - */ - -typedef struct acpi_srat { - acpi_desc_table_hdr_t header; - u32 table_revision; - u64 reserved; -} acpi_srat_t; - -typedef struct srat_cpu_affinity { - u8 type; - u8 length; - u8 proximity_domain; - u8 apic_id; - u32 flags; - u8 local_sapic_eid; - u8 reserved[7]; -} srat_cpu_affinity_t; - -typedef struct srat_memory_affinity { - u8 type; - u8 length; - u8 proximity_domain; - u8 reserved[5]; - u32 base_addr_lo; - u32 base_addr_hi; - u32 length_lo; - u32 length_hi; - u32 memory_type; - u32 flags; - u64 reserved2; -} srat_memory_affinity_t; - -/* ACPI 2.0 SRAT structure */ -#define ACPI_SRAT_SIG "SRAT" -#define ACPI_SRAT_SIG_LEN 4 -#define ACPI_SRAT_REVISION 1 - -#define SRAT_CPU_STRUCTURE 0 -#define SRAT_MEMORY_STRUCTURE 1 - -/* Only 1 flag for cpu affinity structure! */ -#define SRAT_CPU_FLAGS_ENABLED 0x00000001 - -#define SRAT_MEMORY_FLAGS_ENABLED 0x00000001 -#define SRAT_MEMORY_FLAGS_HOTREMOVABLE 0x00000002 - -/* ACPI 2.0 address range types */ -#define ACPI_ADDRESS_RANGE_MEMORY 1 -#define ACPI_ADDRESS_RANGE_RESERVED 2 -#define ACPI_ADDRESS_RANGE_ACPI 3 -#define ACPI_ADDRESS_RANGE_NVS 4 - -#define NODE_ARRAY_INDEX(x) ((x) / 8) /* 8 bits/char */ -#define NODE_ARRAY_OFFSET(x) ((x) % 8) /* 8 bits/char */ -#define MAX_PXM_DOMAINS (256) - -#ifdef CONFIG_DISCONTIGMEM -/* - * List of node memory chunks. Filled when parsing SRAT table to - * obtain information about memory nodes. -*/ - -struct node_memory_chunk_s { - unsigned long start_paddr; - unsigned long size; - int pxm; // proximity domain of node - int nid; // which cnode contains this chunk? - int bank; // which mem bank on this node -}; - -extern struct node_memory_chunk_s node_memory_chunk[PLAT_MAXCLUMPS]; // temporary? - -struct node_cpuid_s { - u16 phys_id; /* id << 8 | eid */ - int pxm; // proximity domain of cpu - int nid; -}; -extern struct node_cpuid_s node_cpuid[NR_CPUS]; - -extern int pxm_to_nid_map[MAX_PXM_DOMAINS]; /* _PXM to logical node ID map */ -extern int nid_to_pxm_map[PLAT_MAX_COMPACT_NODES]; /* logical node ID to _PXM map */ -extern int numnodes; /* total number of nodes in system */ -extern int num_memory_chunks; /* total number of memory chunks */ - -/* - * ACPI 2.0 SLIT Table - * http://devresource.hp.com/devresource/Docs/TechPapers/IA64/slit.pdf - */ - -typedef struct acpi_slit { - acpi_desc_table_hdr_t header; - u64 localities; - u8 entries[1]; /* dummy, real size = locality^2 */ -} acpi_slit_t; - -extern u8 acpi20_slit[PLAT_MAX_COMPACT_NODES * PLAT_MAX_COMPACT_NODES]; - -#define ACPI_SLIT_SIG "SLIT" -#define ACPI_SLIT_SIG_LEN 4 -#define ACPI_SLIT_REVISION 1 -#define ACPI_SLIT_LOCAL 10 -#endif /* CONFIG_DISCONTIGMEM */ - -#pragma pack() -#endif /* _ASM_IA64_ACPI_EXT_H */ diff -Nru a/include/asm-ia64/acpi.h b/include/asm-ia64/acpi.h --- /dev/null Wed Dec 31 16:00:00 1969 +++ b/include/asm-ia64/acpi.h Mon Apr 15 15:07:57 2002 @@ -0,0 +1,49 @@ +/* + * asm-ia64/acpi.h + * + * Copyright (C) 1999 VA Linux Systems + * Copyright (C) 1999 Walt Drummond + * Copyright (C) 2000,2001 J.I. Lee + * Copyright (C) 2001,2002 Paul Diefenbaugh + * + * ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License, or + * (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA + * + * ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ + */ + +#ifndef _ASM_ACPI_H +#define _ASM_ACPI_H + +#ifdef __KERNEL__ + +#define __acpi_map_table(phys_addr, size) __va(phys_addr) + +int acpi_boot_init (char *cdline); +int acpi_find_rsdp (unsigned long *phys_addr); +int acpi_request_vector (u32 int_type); +int acpi_get_prt (struct pci_vector_struct **vectors, int *count); +int acpi_get_interrupt_model(int *type); + +#ifdef CONFIG_DISCONTIGMEM +#define NODE_ARRAY_INDEX(x) ((x) / 8) /* 8 bits/char */ +#define NODE_ARRAY_OFFSET(x) ((x) % 8) /* 8 bits/char */ +#define MAX_PXM_DOMAINS (256) +#endif /* CONFIG_DISCONTIGMEM */ + +#endif /*__KERNEL__*/ + +#endif /*_ASM_ACPI_H*/ diff -Nru a/include/asm-ia64/acpikcfg.h b/include/asm-ia64/acpikcfg.h --- a/include/asm-ia64/acpikcfg.h Mon Apr 15 15:07:56 2002 +++ /dev/null Wed Dec 31 16:00:00 1969 @@ -1,30 +0,0 @@ -#ifndef _ASM_IA64_ACPIKCFG_H -#define _ASM_IA64_ACPIKCFG_H - -/* - * acpikcfg.h - ACPI based Kernel Configuration Manager External Interfaces - * - * Copyright (C) 2000 Intel Corp. - * Copyright (C) 2000 J.I. Lee - */ - - -u32 __init acpi_cf_init (void * rsdp); -u32 __init acpi_cf_terminate (void ); - -u32 __init -acpi_cf_get_pci_vectors ( - struct pci_vector_struct **vectors, - int *num_pci_vectors - ); - - -#ifdef CONFIG_ACPI_KERNEL_CONFIG_DEBUG -void __init -acpi_cf_print_pci_vectors ( - struct pci_vector_struct *vectors, - int num_pci_vectors - ); -#endif - -#endif /* _ASM_IA64_ACPIKCFG_H */ diff -Nru a/include/asm-ia64/cacheflush.h b/include/asm-ia64/cacheflush.h --- /dev/null Wed Dec 31 16:00:00 1969 +++ b/include/asm-ia64/cacheflush.h Mon Apr 15 15:07:57 2002 @@ -0,0 +1,37 @@ +#ifndef _ASM_IA64_CACHEFLUSH_H +#define _ASM_IA64_CACHEFLUSH_H + +/* + * Copyright (C) 2002 Hewlett-Packard Co + * David Mosberger-Tang + */ + +#include +#include + +/* + * Cache flushing routines. This is the kind of stuff that can be very expensive, so try + * to avoid them whenever possible. + */ + +#define flush_cache_all() do { } while (0) +#define flush_cache_mm(mm) do { } while (0) +#define flush_cache_range(vma, start, end) do { } while (0) +#define flush_cache_page(vma, vmaddr) do { } while (0) +#define flush_page_to_ram(page) do { } while (0) +#define flush_icache_page(vma,page) do { } while (0) + +#define flush_dcache_page(page) \ +do { \ + clear_bit(PG_arch_1, &page->flags); \ +} while (0) + +extern void flush_icache_range (unsigned long start, unsigned long end); + +#define flush_icache_user_range(vma, page, user_addr, len) \ +do { \ + unsigned long _addr = (unsigned long) page_address(page) + ((user_addr) & ~PAGE_MASK); \ + flush_icache_range(_addr, _addr + (len)); \ +} while (0) + +#endif /* _ASM_IA64_CACHEFLUSH_H */ diff -Nru a/include/asm-ia64/efi.h b/include/asm-ia64/efi.h --- a/include/asm-ia64/efi.h Mon Apr 15 15:07:57 2002 +++ b/include/asm-ia64/efi.h Mon Apr 15 15:07:57 2002 @@ -87,6 +87,8 @@ #define EFI_MEMORY_RUNTIME 0x8000000000000000 /* range requires runtime mapping */ #define EFI_MEMORY_DESCRIPTOR_VERSION 1 +#define EFI_PAGE_SHIFT 12 + typedef struct { u32 type; u32 pad; @@ -257,6 +259,7 @@ extern void efi_gettimeofday (struct timeval *tv); extern void efi_enter_virtual_mode (void); /* switch EFI to virtual mode, if possible */ extern u64 efi_get_iobase (void); +extern u32 efi_mem_type (u64 phys_addr); /* * Variable Attributes diff -Nru a/include/asm-ia64/hw_irq.h b/include/asm-ia64/hw_irq.h --- a/include/asm-ia64/hw_irq.h Mon Apr 15 15:07:57 2002 +++ b/include/asm-ia64/hw_irq.h Mon Apr 15 15:07:57 2002 @@ -88,6 +88,7 @@ extern struct irq_desc _irq_desc[NR_IRQS]; +#ifndef CONFIG_IA64_GENERIC static inline struct irq_desc * __ia64_irq_desc (unsigned int irq) { @@ -105,6 +106,7 @@ { return (unsigned int) vec; } +#endif /* * Next follows the irq descriptor interface. On IA-64, each CPU supports 256 interrupt diff -Nru a/include/asm-ia64/ide.h b/include/asm-ia64/ide.h --- a/include/asm-ia64/ide.h Mon Apr 15 15:07:56 2002 +++ b/include/asm-ia64/ide.h Mon Apr 15 15:07:56 2002 @@ -31,14 +31,14 @@ ide_default_irq (ide_ioreg_t base) { switch (base) { - case 0x1f0: return isa_irq_to_vector(14); - case 0x170: return isa_irq_to_vector(15); - case 0x1e8: return isa_irq_to_vector(11); - case 0x168: return isa_irq_to_vector(10); - case 0x1e0: return isa_irq_to_vector(8); - case 0x160: return isa_irq_to_vector(12); - default: - return 0; + case 0x1f0: return isa_irq_to_vector(14); + case 0x170: return isa_irq_to_vector(15); + case 0x1e8: return isa_irq_to_vector(11); + case 0x168: return isa_irq_to_vector(10); + case 0x1e0: return isa_irq_to_vector(8); + case 0x160: return isa_irq_to_vector(12); + default: + return 0; } } @@ -46,14 +46,14 @@ ide_default_io_base (int index) { switch (index) { - case 0: return 0x1f0; - case 1: return 0x170; - case 2: return 0x1e8; - case 3: return 0x168; - case 4: return 0x1e0; - case 5: return 0x160; - default: - return 0; + case 0: return 0x1f0; + case 1: return 0x170; + case 2: return 0x1e8; + case 3: return 0x168; + case 4: return 0x1e0; + case 5: return 0x160; + default: + return 0; } } diff -Nru a/include/asm-ia64/machvec.h b/include/asm-ia64/machvec.h --- a/include/asm-ia64/machvec.h Mon Apr 15 15:07:56 2002 +++ b/include/asm-ia64/machvec.h Mon Apr 15 15:07:56 2002 @@ -68,6 +68,8 @@ # include # elif defined (CONFIG_IA64_DIG) # include +# elif defined (CONFIG_IA64_HP_ZX1) +# include # elif defined (CONFIG_IA64_SGI_SN1) # include # elif defined (CONFIG_IA64_SGI_SN2) @@ -123,6 +125,7 @@ ia64_mv_cmci_handler_t *cmci_handler; ia64_mv_log_print_t *log_print; ia64_mv_send_ipi_t *send_ipi; + ia64_mv_global_tlb_purge_t *global_tlb_purge; ia64_mv_pci_dma_init *dma_init; ia64_mv_pci_alloc_consistent *alloc_consistent; ia64_mv_pci_free_consistent *free_consistent; @@ -149,6 +152,7 @@ { \ #name, \ platform_setup, \ + platform_cpu_init, \ platform_irq_init, \ platform_pci_fixup, \ platform_map_nr, \ diff -Nru a/include/asm-ia64/machvec_hpzx1.h b/include/asm-ia64/machvec_hpzx1.h --- /dev/null Wed Dec 31 16:00:00 1969 +++ b/include/asm-ia64/machvec_hpzx1.h Mon Apr 15 15:07:57 2002 @@ -0,0 +1,74 @@ +#ifndef _ASM_IA64_MACHVEC_HPZX1_h +#define _ASM_IA64_MACHVEC_HPZX1_h + +extern ia64_mv_setup_t dig_setup; +extern ia64_mv_pci_fixup_t hpzx1_pci_fixup; +extern ia64_mv_map_nr_t map_nr_dense; +extern ia64_mv_pci_alloc_consistent sba_alloc_consistent; +extern ia64_mv_pci_free_consistent sba_free_consistent; +extern ia64_mv_pci_map_single sba_map_single; +extern ia64_mv_pci_unmap_single sba_unmap_single; +extern ia64_mv_pci_map_sg sba_map_sg; +extern ia64_mv_pci_unmap_sg sba_unmap_sg; +extern ia64_mv_pci_dma_address sba_dma_address; + +/* + * This stuff has dual use! + * + * For a generic kernel, the macros are used to initialize the + * platform's machvec structure. When compiling a non-generic kernel, + * the macros are used directly. + */ +#define platform_name "hpzx1" +#define platform_setup dig_setup +#define platform_pci_fixup hpzx1_pci_fixup +#define platform_map_nr map_nr_dense +#define platform_pci_dma_init ((ia64_mv_pci_dma_init *) machvec_noop) +#define platform_pci_alloc_consistent sba_alloc_consistent +#define platform_pci_free_consistent sba_free_consistent +#define platform_pci_map_single sba_map_single +#define platform_pci_unmap_single sba_unmap_single +#define platform_pci_map_sg sba_map_sg +#define platform_pci_unmap_sg sba_unmap_sg +#define platform_pci_dma_sync_single ((ia64_mv_pci_dma_sync_single *) machvec_noop) +#define platform_pci_dma_sync_sg ((ia64_mv_pci_dma_sync_sg *) machvec_noop) +#define platform_pci_dma_address sba_dma_address + +#endif /* _ASM_IA64_MACHVEC_HPZX1_h */ +#ifndef _ASM_IA64_MACHVEC_HPZX1_h +#define _ASM_IA64_MACHVEC_HPZX1_h + +extern ia64_mv_setup_t dig_setup; +extern ia64_mv_pci_fixup_t hpzx1_pci_fixup; +extern ia64_mv_map_nr_t map_nr_dense; +extern ia64_mv_pci_alloc_consistent sba_alloc_consistent; +extern ia64_mv_pci_free_consistent sba_free_consistent; +extern ia64_mv_pci_map_single sba_map_single; +extern ia64_mv_pci_unmap_single sba_unmap_single; +extern ia64_mv_pci_map_sg sba_map_sg; +extern ia64_mv_pci_unmap_sg sba_unmap_sg; +extern ia64_mv_pci_dma_address sba_dma_address; + +/* + * This stuff has dual use! + * + * For a generic kernel, the macros are used to initialize the + * platform's machvec structure. When compiling a non-generic kernel, + * the macros are used directly. + */ +#define platform_name "hpzx1" +#define platform_setup dig_setup +#define platform_pci_fixup hpzx1_pci_fixup +#define platform_map_nr map_nr_dense +#define platform_pci_dma_init ((ia64_mv_pci_dma_init *) machvec_noop) +#define platform_pci_alloc_consistent sba_alloc_consistent +#define platform_pci_free_consistent sba_free_consistent +#define platform_pci_map_single sba_map_single +#define platform_pci_unmap_single sba_unmap_single +#define platform_pci_map_sg sba_map_sg +#define platform_pci_unmap_sg sba_unmap_sg +#define platform_pci_dma_sync_single ((ia64_mv_pci_dma_sync_single *) machvec_noop) +#define platform_pci_dma_sync_sg ((ia64_mv_pci_dma_sync_sg *) machvec_noop) +#define platform_pci_dma_address sba_dma_address + +#endif /* _ASM_IA64_MACHVEC_HPZX1_h */ diff -Nru a/include/asm-ia64/machvec_init.h b/include/asm-ia64/machvec_init.h --- a/include/asm-ia64/machvec_init.h Mon Apr 15 15:07:56 2002 +++ b/include/asm-ia64/machvec_init.h Mon Apr 15 15:07:56 2002 @@ -5,6 +5,11 @@ #include extern ia64_mv_send_ipi_t ia64_send_ipi; +extern ia64_mv_global_tlb_purge_t ia64_global_tlb_purge; +extern ia64_mv_irq_desc __ia64_irq_desc; +extern ia64_mv_irq_to_vector __ia64_irq_to_vector; +extern ia64_mv_local_vector_to_irq __ia64_local_vector_to_irq; + extern ia64_mv_inb_t __ia64_inb; extern ia64_mv_inw_t __ia64_inw; extern ia64_mv_inl_t __ia64_inl; diff -Nru a/include/asm-ia64/module.h b/include/asm-ia64/module.h --- a/include/asm-ia64/module.h Mon Apr 15 15:07:57 2002 +++ b/include/asm-ia64/module.h Mon Apr 15 15:07:57 2002 @@ -51,6 +51,9 @@ return 0; archdata = (struct archdata *)(mod->archdata_start); + if (archdata->unw_start == 0) + return 0; + /* * Make sure the unwind pointers are sane. */ diff -Nru a/include/asm-ia64/offsets.h b/include/asm-ia64/offsets.h --- a/include/asm-ia64/offsets.h Mon Apr 15 15:07:57 2002 +++ b/include/asm-ia64/offsets.h Mon Apr 15 15:07:57 2002 @@ -6,8 +6,8 @@ * This file was generated by arch/ia64/tools/print_offsets.awk. * */ -#define IA64_TASK_SIZE 3936 /* 0xf60 */ -#define IA64_THREAD_INFO_SIZE 24 /* 0x18 */ +#define IA64_TASK_SIZE 3952 /* 0xf70 */ +#define IA64_THREAD_INFO_SIZE 32 /* 0x20 */ #define IA64_PT_REGS_SIZE 400 /* 0x190 */ #define IA64_SWITCH_STACK_SIZE 560 /* 0x230 */ #define IA64_SIGINFO_SIZE 128 /* 0x80 */ @@ -15,7 +15,7 @@ #define SIGFRAME_SIZE 2816 /* 0xb00 */ #define UNW_FRAME_INFO_SIZE 448 /* 0x1c0 */ -#define IA64_TASK_THREAD_KSP_OFFSET 1480 /* 0x5c8 */ +#define IA64_TASK_THREAD_KSP_OFFSET 1496 /* 0x5d8 */ #define IA64_PT_REGS_CR_IPSR_OFFSET 0 /* 0x0 */ #define IA64_PT_REGS_CR_IIP_OFFSET 8 /* 0x8 */ #define IA64_PT_REGS_CR_IFS_OFFSET 16 /* 0x10 */ diff -Nru a/include/asm-ia64/pci.h b/include/asm-ia64/pci.h --- a/include/asm-ia64/pci.h Mon Apr 15 15:07:57 2002 +++ b/include/asm-ia64/pci.h Mon Apr 15 15:07:57 2002 @@ -20,6 +20,11 @@ #define PCIBIOS_MIN_IO 0x1000 #define PCIBIOS_MIN_MEM 0x10000000 +void pcibios_config_init(void); +struct pci_bus * pcibios_scan_root(int seg, int bus); +extern int (*pci_config_read)(int seg, int bus, int dev, int fn, int reg, int len, u32 *value); +extern int (*pci_config_write)(int seg, int bus, int dev, int fn, int reg, int len, u32 value); + struct pci_dev; /* diff -Nru a/include/asm-ia64/percpu.h b/include/asm-ia64/percpu.h --- /dev/null Wed Dec 31 16:00:00 1969 +++ b/include/asm-ia64/percpu.h Mon Apr 15 15:07:57 2002 @@ -0,0 +1,24 @@ +#ifndef _ASM_IA64_PERCPU_H +#define _ASM_IA64_PERCPU_H + +/* + * Copyright (C) 2002 Hewlett-Packard Co + * David Mosberger-Tang + */ + +#ifdef __ASSEMBLY__ + +#define THIS_CPU(var) (var) /* use this to mark accesses to per-CPU variables... */ + +#else /* !__ASSEMBLY__ */ + +#include + +extern unsigned long __per_cpu_offset[NR_CPUS]; + +#define per_cpu(var, cpu) (*(__typeof__(&(var))) ((void *) &(var) + __per_cpu_offset[cpu])) +#define this_cpu(var) (var) + +#endif /* !__ASSEMBLY__ */ + +#endif /* _ASM_IA64_PERCPU_H */ diff -Nru a/include/asm-ia64/pgalloc.h b/include/asm-ia64/pgalloc.h --- a/include/asm-ia64/pgalloc.h Mon Apr 15 15:07:56 2002 +++ b/include/asm-ia64/pgalloc.h Mon Apr 15 15:07:56 2002 @@ -150,7 +150,7 @@ free_page((unsigned long) pte); } -extern int do_check_pgt_cache (int, int); +extern void check_pgt_cache (void); /* * IA-64 doesn't have any external MMU info: the page tables contain all the necessary @@ -175,71 +175,6 @@ flush_icache_range(addr, addr + PAGE_SIZE); set_bit(PG_arch_1, &page->flags); /* mark page as clean */ -} - -/* - * Now for some TLB flushing routines. This is the kind of stuff that - * can be very expensive, so try to avoid them whenever possible. - */ - -/* - * Flush everything (kernel mapping may also have changed due to - * vmalloc/vfree). - */ -extern void __flush_tlb_all (void); - -#ifdef CONFIG_SMP - extern void smp_flush_tlb_all (void); -# define flush_tlb_all() smp_flush_tlb_all() -#else -# define flush_tlb_all() __flush_tlb_all() -#endif - -/* - * Flush a specified user mapping - */ -static inline void -flush_tlb_mm (struct mm_struct *mm) -{ - if (mm) { - mm->context = 0; - if (mm == current->active_mm) { - /* This is called, e.g., as a result of exec(). */ - get_new_mmu_context(mm); - reload_context(mm); - } - } -} - -extern void flush_tlb_range (struct vm_area_struct *vma, unsigned long start, unsigned long end); - -/* - * Page-granular tlb flush. - */ -static inline void -flush_tlb_page (struct vm_area_struct *vma, unsigned long addr) -{ -#ifdef CONFIG_SMP - flush_tlb_range(vma, (addr & PAGE_MASK), (addr & PAGE_MASK) + PAGE_SIZE); -#else - if (vma->vm_mm == current->active_mm) - asm volatile ("ptc.l %0,%1" :: "r"(addr), "r"(PAGE_SHIFT << 2) : "memory"); -#endif -} - -/* - * Flush the TLB entries mapping the virtually mapped linear page - * table corresponding to address range [START-END). - */ -static inline void -flush_tlb_pgtables (struct mm_struct *mm, unsigned long start, unsigned long end) -{ - struct vm_area_struct vma; - - if (rgn_index(start) != rgn_index(end)) - printk("flush_tlb_pgtables: can't flush across regions!!\n"); - vma.vm_mm = mm; - flush_tlb_range(&vma, ia64_thash(start), ia64_thash(end)); } #endif /* _ASM_IA64_PGALLOC_H */ diff -Nru a/include/asm-ia64/pgtable.h b/include/asm-ia64/pgtable.h --- a/include/asm-ia64/pgtable.h Mon Apr 15 15:07:57 2002 +++ b/include/asm-ia64/pgtable.h Mon Apr 15 15:07:57 2002 @@ -121,6 +121,7 @@ # ifndef __ASSEMBLY__ #include +#include #include #include @@ -290,30 +291,6 @@ # define pgprot_writecombine(prot) __pgprot((pgprot_val(prot) & ~_PAGE_MA_MASK) | _PAGE_MA_WC) #endif -/* - * Return the region index for virtual address ADDRESS. - */ -static inline unsigned long -rgn_index (unsigned long address) -{ - ia64_va a; - - a.l = address; - return a.f.reg; -} - -/* - * Return the region offset for virtual address ADDRESS. - */ -static inline unsigned long -rgn_offset (unsigned long address) -{ - ia64_va a; - - a.l = address; - return a.f.off; -} - static inline unsigned long pgd_index (unsigned long address) { @@ -439,33 +416,6 @@ #define PageSkip(page) (0) #define io_remap_page_range remap_page_range /* XXX is this right? */ - - -/* - * Now for some cache flushing routines. This is the kind of stuff that can be very - * expensive, so try to avoid them whenever possible. - */ - -/* Caches aren't brain-dead on the IA-64. */ -#define flush_cache_all() do { } while (0) -#define flush_cache_mm(mm) do { } while (0) -#define flush_cache_range(vma, start, end) do { } while (0) -#define flush_cache_page(vma, vmaddr) do { } while (0) -#define flush_page_to_ram(page) do { } while (0) -#define flush_icache_page(vma,page) do { } while (0) - -#define flush_dcache_page(page) \ -do { \ - clear_bit(PG_arch_1, &page->flags); \ -} while (0) - -extern void flush_icache_range (unsigned long start, unsigned long end); - -#define flush_icache_user_range(vma, page, user_addr, len) \ -do { \ - unsigned long _addr = page_address(page) + ((user_addr) & ~PAGE_MASK); \ - flush_icache_range(_addr, _addr + (len)); \ -} while (0) /* * ZERO_PAGE is a global shared page that is always zero: used diff -Nru a/include/asm-ia64/processor.h b/include/asm-ia64/processor.h --- a/include/asm-ia64/processor.h Mon Apr 15 15:07:57 2002 +++ b/include/asm-ia64/processor.h Mon Apr 15 15:07:57 2002 @@ -15,7 +15,7 @@ #include -#include +#include #include #include @@ -186,10 +186,6 @@ */ #define IA64_USEC_PER_CYC_SHIFT 41 -#define __HAVE_ARCH_PER_CPU - -#define THIS_CPU(var) (var) - #ifndef __ASSEMBLY__ #include @@ -201,11 +197,6 @@ #include #include #include - -extern unsigned long __per_cpu_offset[NR_CPUS]; - -#define per_cpu(var, cpu) (*(__typeof__(&(var))) ((void *) &(var) + __per_cpu_offset[cpu])) -#define this_cpu(var) (var) /* like above but expressed as bitfields for more efficient access: */ struct ia64_psr { diff -Nru a/include/asm-ia64/string.h b/include/asm-ia64/string.h --- a/include/asm-ia64/string.h Mon Apr 15 15:07:57 2002 +++ b/include/asm-ia64/string.h Mon Apr 15 15:07:57 2002 @@ -5,8 +5,8 @@ * Here is where we want to put optimized versions of the string * routines. * - * Copyright (C) 1998-2000 Hewlett-Packard Co - * Copyright (C) 1998-2000 David Mosberger-Tang + * Copyright (C) 1998-2000, 2002 Hewlett-Packard Co + * David Mosberger-Tang */ #include /* remove this once we remove the A-step workaround... */ @@ -17,7 +17,21 @@ #define __HAVE_ARCH_BCOPY 1 /* see arch/ia64/lib/memcpy.S */ extern __kernel_size_t strlen (const char *); -extern void *memset (void *, int, __kernel_size_t); extern void *memcpy (void *, const void *, __kernel_size_t); + +extern void *__memset_generic (void *, int, __kernel_size_t); +extern void __bzero (void *, __kernel_size_t); + +#define memset(s, c, count) \ +({ \ + void *_s = (s); \ + int _c = (c); \ + __kernel_size_t _count = (count); \ + \ + if (__builtin_constant_p(_c) && _c == 0) \ + __bzero(_s, _count); \ + else \ + __memset_generic(_s, _c, _count); \ +}) #endif /* _ASM_IA64_STRING_H */ diff -Nru a/include/asm-ia64/system.h b/include/asm-ia64/system.h --- a/include/asm-ia64/system.h Mon Apr 15 15:07:57 2002 +++ b/include/asm-ia64/system.h Mon Apr 15 15:07:57 2002 @@ -18,14 +18,6 @@ #define KERNEL_START (PAGE_OFFSET + 68*1024*1024) -/* - * The following #defines must match with vmlinux.lds.S: - */ -#define IVT_ADDR (KERNEL_START) -#define IVT_END_ADDR (KERNEL_START + 0x8000) -#define ZERO_PAGE_ADDR PAGE_ALIGN(IVT_END_ADDR) -#define SWAPPER_PGD_ADDR (ZERO_PAGE_ADDR + 1*PAGE_SIZE) - #define GATE_ADDR (0xa000000000000000 + PAGE_SIZE) #define PERCPU_ADDR (0xa000000000000000 + 2*PAGE_SIZE) diff -Nru a/include/asm-ia64/thread_info.h b/include/asm-ia64/thread_info.h --- a/include/asm-ia64/thread_info.h Mon Apr 15 15:07:57 2002 +++ b/include/asm-ia64/thread_info.h Mon Apr 15 15:07:57 2002 @@ -12,7 +12,10 @@ #define TI_EXEC_DOMAIN 0x00 #define TI_FLAGS 0x08 #define TI_CPU 0x0c -#define TI_ADDR_LIMI 0x10 +#define TI_ADDR_LIMIT 0x10 +#define TI_PRE_COUNT 0x18 + +#define PREEMPT_ACTIVE 0x4000000 #ifndef __ASSEMBLY__ @@ -26,6 +29,7 @@ __u32 flags; /* thread_info flags (see TIF_*) */ __u32 cpu; /* current CPU */ mm_segment_t addr_limit; /* user-level address space limit */ + __s32 preempt_count; /* 0=premptable, <0=BUG; will also serve as bh-counter */ }; #define INIT_THREAD_SIZE /* tell sched.h not to declare the thread_union */ @@ -37,6 +41,7 @@ flags: 0, \ cpu: 0, \ addr_limit: KERNEL_DS, \ + preempt_count: 0, \ } /* how to get the thread information struct from C */ diff -Nru a/include/asm-ia64/tlbflush.h b/include/asm-ia64/tlbflush.h --- /dev/null Wed Dec 31 16:00:00 1969 +++ b/include/asm-ia64/tlbflush.h Mon Apr 15 15:07:57 2002 @@ -0,0 +1,83 @@ +#ifndef _ASM_IA64_TLBFLUSH_H +#define _ASM_IA64_TLBFLUSH_H + +/* + * Copyright (C) 2002 Hewlett-Packard Co + * David Mosberger-Tang + */ + +#include + +#include + +#include +#include + +/* + * Now for some TLB flushing routines. This is the kind of stuff that + * can be very expensive, so try to avoid them whenever possible. + */ + +/* + * Flush everything (kernel mapping may also have changed due to + * vmalloc/vfree). + */ +extern void __flush_tlb_all (void); + +#ifdef CONFIG_SMP + extern void smp_flush_tlb_all (void); +# define flush_tlb_all() smp_flush_tlb_all() +#else +# define flush_tlb_all() __flush_tlb_all() +#endif + +/* + * Flush a specified user mapping + */ +static inline void +flush_tlb_mm (struct mm_struct *mm) +{ + if (mm) { + mm->context = 0; + if (mm == current->active_mm) { + /* This is called, e.g., as a result of exec(). */ + get_new_mmu_context(mm); + reload_context(mm); + } + } +} + +extern void flush_tlb_range (struct vm_area_struct *vma, unsigned long start, unsigned long end); + +/* + * Page-granular tlb flush. + */ +static inline void +flush_tlb_page (struct vm_area_struct *vma, unsigned long addr) +{ +#ifdef CONFIG_SMP + flush_tlb_range(vma, (addr & PAGE_MASK), (addr & PAGE_MASK) + PAGE_SIZE); +#else + if (vma->vm_mm == current->active_mm) + asm volatile ("ptc.l %0,%1" :: "r"(addr), "r"(PAGE_SHIFT << 2) : "memory"); +#endif +} + +/* + * Flush the TLB entries mapping the virtually mapped linear page + * table corresponding to address range [START-END). + */ +static inline void +flush_tlb_pgtables (struct mm_struct *mm, unsigned long start, unsigned long end) +{ + struct vm_area_struct vma; + + if (REGION_NUMBER(start) != REGION_NUMBER(end)) + printk("flush_tlb_pgtables: can't flush across regions!!\n"); + vma.vm_mm = mm; + flush_tlb_range(&vma, ia64_thash(start), ia64_thash(end)); +} + +#define flush_tlb_kernel_range(start, end) flush_tlb_all() /* XXX fix me */ + +#endif /* _ASM_IA64_TLBFLUSH_H */ diff -Nru a/include/asm-ia64/uaccess.h b/include/asm-ia64/uaccess.h --- a/include/asm-ia64/uaccess.h Mon Apr 15 15:07:57 2002 +++ b/include/asm-ia64/uaccess.h Mon Apr 15 15:07:57 2002 @@ -56,8 +56,9 @@ * address TASK_SIZE is never valid. We also need to make sure that the address doesn't * point inside the virtually mapped linear page table. */ -#define __access_ok(addr,size,segment) (((unsigned long) (addr)) <= (segment).seg \ - && ((segment).seg == KERNEL_DS.seg || rgn_offset((unsigned long) (addr)) < RGN_MAP_LIMIT)) +#define __access_ok(addr,size,segment) (((unsigned long) (addr)) <= (segment).seg \ + && ((segment).seg == KERNEL_DS.seg \ + || REGION_OFFSET((unsigned long) (addr)) < RGN_MAP_LIMIT)) #define access_ok(type,addr,size) __access_ok((addr),(size),get_fs()) static inline int diff -Nru a/include/asm-ia64/unistd.h b/include/asm-ia64/unistd.h --- a/include/asm-ia64/unistd.h Mon Apr 15 15:07:56 2002 +++ b/include/asm-ia64/unistd.h Mon Apr 15 15:07:56 2002 @@ -219,6 +219,9 @@ #define __NR_lremovexattr 1227 #define __NR_fremovexattr 1228 #define __NR_tkill 1229 +#define __NR_futex 1230 +#define __NR_sched_setaffinity 1231 +#define __NR_sched_getaffinity 1232 #if !defined(__ASSEMBLY__) && !defined(ASSEMBLER) diff -Nru a/include/linux/acpi.h b/include/linux/acpi.h --- a/include/linux/acpi.h Mon Apr 15 15:07:56 2002 +++ b/include/linux/acpi.h Mon Apr 15 15:07:56 2002 @@ -29,6 +29,8 @@ #define _LINUX #endif +#include + /* * YES this is ugly. * But, moving all of ACPI's private headers to include/acpi isn't the right diff -Nru a/include/linux/acpi_serial.h b/include/linux/acpi_serial.h --- a/include/linux/acpi_serial.h Mon Apr 15 15:07:57 2002 +++ b/include/linux/acpi_serial.h Mon Apr 15 15:07:57 2002 @@ -11,6 +11,8 @@ extern void setup_serial_acpi(void *); +#define ACPI_SIG_LEN 4 + /* ACPI table signatures */ #define ACPI_SPCRT_SIGNATURE "SPCR" #define ACPI_DBGPT_SIGNATURE "DBGP" diff -Nru a/include/linux/agp_backend.h b/include/linux/agp_backend.h --- a/include/linux/agp_backend.h Mon Apr 15 15:07:57 2002 +++ b/include/linux/agp_backend.h Mon Apr 15 15:07:57 2002 @@ -52,6 +52,7 @@ INTEL_I845, INTEL_I850, INTEL_I860, + INTEL_460GX, VIA_GENERIC, VIA_VP3, VIA_MVP3, @@ -74,7 +75,8 @@ ALI_GENERIC, SVWRKS_HE, SVWRKS_LE, - SVWRKS_GENERIC + SVWRKS_GENERIC, + HP_ZX1, }; typedef struct _agp_version { @@ -115,6 +117,7 @@ size_t page_count; int num_scratch_pages; unsigned long *memory; + void *vmptr; off_t pg_start; u32 type; u32 physical; diff -Nru a/include/linux/fs.h b/include/linux/fs.h --- a/include/linux/fs.h Mon Apr 15 15:07:57 2002 +++ b/include/linux/fs.h Mon Apr 15 15:07:57 2002 @@ -547,12 +547,17 @@ extern int init_private_file(struct file *, struct dentry *, int); +/* Max fileoffset that can safely be dealt with by filesystems that have not (yet) been + audited for 64-bit issues. */ #define MAX_NON_LFS ((1UL<<31) - 1) -/* Page cache limit. The filesystems should put that into their s_maxbytes - limits, otherwise bad things can happen in VM. */ +/* Max fileoffset that can be stored in a variable of type offset_t. */ +#define MAX_OFF_T ((loff_t)((1UL << ((sizeof(off_t)*8) - 1)) - 1)) + +/* Page cache limit. The filesystems should put that into their s_maxbytes + limits, otherwise bad things can happen in VM. */ #if BITS_PER_LONG==32 -#define MAX_LFS_FILESIZE (((u64)PAGE_CACHE_SIZE << (BITS_PER_LONG-1))-1) +#define MAX_LFS_FILESIZE (((u64)PAGE_CACHE_SIZE << (BITS_PER_LONG-1))-1) #elif BITS_PER_LONG==64 #define MAX_LFS_FILESIZE 0x7fffffffffffffff #endif diff -Nru a/include/linux/highmem.h b/include/linux/highmem.h --- a/include/linux/highmem.h Mon Apr 15 15:07:56 2002 +++ b/include/linux/highmem.h Mon Apr 15 15:07:56 2002 @@ -87,7 +87,7 @@ static inline void clear_user_highpage(struct page *page, unsigned long vaddr) { void *addr = kmap_atomic(page, KM_USER0); - clear_user_page(addr, vaddr); + clear_user_page(addr, vaddr, page); kunmap_atomic(addr, KM_USER0); } @@ -121,7 +121,7 @@ vfrom = kmap_atomic(from, KM_USER0); vto = kmap_atomic(to, KM_USER1); - copy_user_page(vto, vfrom, vaddr); + copy_user_page(vto, vfrom, vaddr, to); kunmap_atomic(vfrom, KM_USER0); kunmap_atomic(vto, KM_USER1); } diff -Nru a/include/linux/irq.h b/include/linux/irq.h --- a/include/linux/irq.h Mon Apr 15 15:07:57 2002 +++ b/include/linux/irq.h Mon Apr 15 15:07:57 2002 @@ -56,15 +56,13 @@ * * Pad this out to 32 bytes for cache and indexing reasons. */ -typedef struct { +typedef struct irq_desc { unsigned int status; /* IRQ status */ hw_irq_controller *handler; struct irqaction *action; /* IRQ action list */ unsigned int depth; /* nested irq disables */ spinlock_t lock; } ____cacheline_aligned irq_desc_t; - -extern irq_desc_t irq_desc [NR_IRQS]; #include /* the arch dependent stuff */ diff -Nru a/include/linux/irq_cpustat.h b/include/linux/irq_cpustat.h --- a/include/linux/irq_cpustat.h Mon Apr 15 15:07:57 2002 +++ b/include/linux/irq_cpustat.h Mon Apr 15 15:07:57 2002 @@ -24,16 +24,32 @@ #define __IRQ_STAT(cpu, member) (irq_stat[cpu].member) #else #define __IRQ_STAT(cpu, member) ((void)(cpu), irq_stat[0].member) -#endif +#endif #endif /* arch independent irq_stat fields */ #define softirq_pending(cpu) __IRQ_STAT((cpu), __softirq_pending) -#define local_irq_count(cpu) __IRQ_STAT((cpu), __local_irq_count) -#define local_bh_count(cpu) __IRQ_STAT((cpu), __local_bh_count) +#define irq_count(cpu) __IRQ_STAT((cpu), __local_irq_count) +#define bh_count(cpu) __IRQ_STAT((cpu), __local_bh_count) #define syscall_count(cpu) __IRQ_STAT((cpu), __syscall_count) #define ksoftirqd_task(cpu) __IRQ_STAT((cpu), __ksoftirqd_task) /* arch dependent irq_stat fields */ #define nmi_count(cpu) __IRQ_STAT((cpu), __nmi_count) /* i386, ia64 */ + +#define local_hardirq_trylock() hardirq_trylock(smp_processor_id()) +#define local_hardirq_endlock() hardirq_trylock(smp_processor_id()) +#define local_irq_enter(irq) irq_enter(smp_processor_id(), (irq)) +#define local_irq_exit(irq) irq_exit(smp_processor_id(), (irq)) +#define local_softirq_pending() softirq_pending(smp_processor_id()) +#define local_ksoftirqd_task() ksoftirqd_task(smp_processor_id()) + +/* These will lose the "really_" prefix when the interim macros below are removed. */ +#define really_local_irq_count()bh_count(smp_processor_id()) +#define really_local_bh_count() bh_count(smp_processor_id()) + +/* Interim macros for backward compatibility. They are deprecated. Use irq_count() and + bh_count() instead. --davidm 01/11/28 */ +#define local_irq_count(cpu) irq_count(cpu) +#define local_bh_count(cpu) bh_count(cpu) #endif /* __irq_cpustat_h */ diff -Nru a/include/linux/kernel.h b/include/linux/kernel.h --- a/include/linux/kernel.h Mon Apr 15 15:07:56 2002 +++ b/include/linux/kernel.h Mon Apr 15 15:07:56 2002 @@ -37,6 +37,13 @@ #define KERN_INFO "<6>" /* informational */ #define KERN_DEBUG "<7>" /* debug-level messages */ +extern int console_printk[]; + +#define console_loglevel (console_printk[0]) +#define default_message_loglevel (console_printk[1]) +#define minimum_console_loglevel (console_printk[2]) +#define default_console_loglevel (console_printk[3]) + struct completion; extern struct notifier_block *panic_notifier_list; @@ -72,8 +79,6 @@ asmlinkage int printk(const char * fmt, ...) __attribute__ ((format (printf, 1, 2))); - -extern int console_loglevel; static inline void console_silent(void) { diff -Nru a/include/linux/pci_ids.h b/include/linux/pci_ids.h --- a/include/linux/pci_ids.h Mon Apr 15 15:07:57 2002 +++ b/include/linux/pci_ids.h Mon Apr 15 15:07:57 2002 @@ -510,6 +510,9 @@ #define PCI_DEVICE_ID_HP_DIVA1 0x1049 #define PCI_DEVICE_ID_HP_DIVA2 0x104A #define PCI_DEVICE_ID_HP_SP2_0 0x104B +#define PCI_DEVICE_ID_HP_ZX1_SBA 0x1229 +#define PCI_DEVICE_ID_HP_ZX1_IOC 0x122a +#define PCI_DEVICE_ID_HP_ZX1_LBA 0x122e #define PCI_VENDOR_ID_PCTECH 0x1042 #define PCI_DEVICE_ID_PCTECH_RZ1000 0x1000 diff -Nru a/include/linux/percpu.h b/include/linux/percpu.h --- a/include/linux/percpu.h Mon Apr 15 15:07:57 2002 +++ b/include/linux/percpu.h Mon Apr 15 15:07:57 2002 @@ -2,11 +2,11 @@ #define __LINUX_PERCPU_H #include -#ifdef CONFIG_SMP #define __per_cpu_data __attribute__((section(".data.percpu"))) + +#ifdef CONFIG_SMP #include #else -#define __per_cpu_data #define per_cpu(var, cpu) var #define this_cpu(var) var #endif diff -Nru a/include/linux/prctl.h b/include/linux/prctl.h --- a/include/linux/prctl.h Mon Apr 15 15:07:57 2002 +++ b/include/linux/prctl.h Mon Apr 15 15:07:57 2002 @@ -20,4 +20,10 @@ #define PR_GET_KEEPCAPS 7 #define PR_SET_KEEPCAPS 8 +/* Get/set floating-point emulation control bits (if meaningful) */ +#define PR_GET_FPEMU 9 +#define PR_SET_FPEMU 10 +# define PR_FPEMU_NOPRINT 1 /* silently emulate fp operations accesses */ +# define PR_FPEMU_SIGFPE 2 /* don't emulate fp operations, send SIGFPE instead */ + #endif /* _LINUX_PRCTL_H */ diff -Nru a/include/linux/sched.h b/include/linux/sched.h --- a/include/linux/sched.h Mon Apr 15 15:07:56 2002 +++ b/include/linux/sched.h Mon Apr 15 15:07:56 2002 @@ -406,14 +406,14 @@ #ifndef INIT_THREAD_SIZE # define INIT_THREAD_SIZE 2048*sizeof(long) -#endif - union thread_union { struct thread_info thread_info; unsigned long stack[INIT_THREAD_SIZE/sizeof(long)]; }; extern union thread_union init_thread_union; +#endif + extern struct task_struct init_task; extern struct mm_struct init_mm; diff -Nru a/include/linux/smp.h b/include/linux/smp.h --- a/include/linux/smp.h Mon Apr 15 15:07:57 2002 +++ b/include/linux/smp.h Mon Apr 15 15:07:57 2002 @@ -36,11 +36,6 @@ extern void smp_boot_cpus(void); /* - * Processor call in. Must hold processors until .. - */ -extern void smp_callin(void); - -/* * Multiprocessors may now schedule */ extern void smp_commence(void); @@ -54,14 +49,10 @@ /* * True once the per process idle is forked */ -extern int smp_threads_ready; +extern volatile int smp_threads_ready; extern int smp_num_cpus; -extern volatile unsigned long smp_msg_data; -extern volatile int smp_src_cpu; -extern volatile int smp_msg_id; - #define MSG_ALL_BUT_SELF 0x8000 /* Assume <32768 CPU's */ #define MSG_ALL 0x8001 @@ -91,9 +82,6 @@ #define cpu_online_map 1 static inline void smp_send_reschedule(int cpu) { } static inline void smp_send_reschedule_all(void) { } -#define __per_cpu_data -#define per_cpu(var, cpu) var -#define this_cpu(var) var #endif #endif diff -Nru a/kernel/exec_domain.c b/kernel/exec_domain.c --- a/kernel/exec_domain.c Mon Apr 15 15:07:57 2002 +++ b/kernel/exec_domain.c Mon Apr 15 15:07:57 2002 @@ -196,8 +196,10 @@ put_exec_domain(oep); +#if 0 printk(KERN_DEBUG "[%s:%d]: set personality to %lx\n", current->comm, current->pid, personality); +#endif return 0; } diff -Nru a/kernel/fork.c b/kernel/fork.c --- a/kernel/fork.c Mon Apr 15 15:07:56 2002 +++ b/kernel/fork.c Mon Apr 15 15:07:56 2002 @@ -95,6 +95,13 @@ init_task.rlim[RLIMIT_NPROC].rlim_max = max_threads/2; } +#if 1 + +extern struct task_struct *dup_task_struct(struct task_struct *orig); +extern void __put_task_struct(struct task_struct *tsk); + +#else + struct task_struct *dup_task_struct(struct task_struct *orig) { struct task_struct *tsk; @@ -123,6 +130,8 @@ free_thread_info(tsk->thread_info); kmem_cache_free(task_struct_cachep,tsk); } + +#endif /* Protects next_safe and last_pid. */ spinlock_t lastpid_lock = SPIN_LOCK_UNLOCKED; diff -Nru a/kernel/ksyms.c b/kernel/ksyms.c --- a/kernel/ksyms.c Mon Apr 15 15:07:56 2002 +++ b/kernel/ksyms.c Mon Apr 15 15:07:56 2002 @@ -380,7 +380,7 @@ EXPORT_SYMBOL(del_timer); EXPORT_SYMBOL(request_irq); EXPORT_SYMBOL(free_irq); -#if !defined(CONFIG_ARCH_S390) +#if !defined(CONFIG_ARCH_S390) && !defined(CONFIG_IA64) EXPORT_SYMBOL(irq_stat); /* No separate irq_stat for s390, it is part of PSA */ #endif @@ -586,7 +586,9 @@ /* init task, for moving kthread roots - ought to export a function ?? */ EXPORT_SYMBOL(init_task); +#ifndef CONFIG_IA64 EXPORT_SYMBOL(init_thread_union); +#endif EXPORT_SYMBOL(tasklist_lock); EXPORT_SYMBOL(pidhash); diff -Nru a/kernel/printk.c b/kernel/printk.c --- a/kernel/printk.c Mon Apr 15 15:07:57 2002 +++ b/kernel/printk.c Mon Apr 15 15:07:57 2002 @@ -16,6 +16,7 @@ * 01Mar01 Andrew Morton */ +#include #include #include #include @@ -39,6 +40,10 @@ #define LOG_BUF_MASK (LOG_BUF_LEN-1) +#ifndef arch_consoles_callable +#define arch_consoles_callable() (1) +#endif + /* printk's without a loglevel use this.. */ #define DEFAULT_MESSAGE_LOGLEVEL 4 /* KERN_WARNING */ @@ -48,11 +53,12 @@ DECLARE_WAIT_QUEUE_HEAD(log_wait); -/* Keep together for sysctl support */ -int console_loglevel = DEFAULT_CONSOLE_LOGLEVEL; -int default_message_loglevel = DEFAULT_MESSAGE_LOGLEVEL; -int minimum_console_loglevel = MINIMUM_CONSOLE_LOGLEVEL; -int default_console_loglevel = DEFAULT_CONSOLE_LOGLEVEL; +int console_printk[4] = { + DEFAULT_CONSOLE_LOGLEVEL, /* console_loglevel */ + DEFAULT_MESSAGE_LOGLEVEL, /* default_message_loglevel */ + MINIMUM_CONSOLE_LOGLEVEL, /* minimum_console_loglevel */ + DEFAULT_CONSOLE_LOGLEVEL, /* default_console_loglevel */ +}; int oops_in_progress; @@ -319,6 +325,12 @@ __call_console_drivers(start, end); } } +#ifdef CONFIG_IA64_EARLY_PRINTK + if (!console_drivers) { + static void early_printk (const char *str, size_t len); + early_printk(&LOG_BUF(start), end - start); + } +#endif } /* @@ -439,6 +451,14 @@ log_level_unknown = 1; } + if (!arch_consoles_callable()) { + /* + * On some architectures, the consoles are not usable + * on secondary CPUs early in the boot process. + */ + spin_unlock_irqrestore(&logbuf_lock, flags); + goto out; + } if (!down_trylock(&console_sem)) { /* * We own the drivers. We can drop the spinlock and let @@ -455,6 +475,7 @@ */ spin_unlock_irqrestore(&logbuf_lock, flags); } +out: return printed_len; } EXPORT_SYMBOL(printk); @@ -669,3 +690,50 @@ tty->driver.write(tty, 0, msg, strlen(msg)); return; } + +#ifdef CONFIG_IA64_EARLY_PRINTK + +#include + +#define VGABASE ((char *)0xc0000000000b8000) +#define VGALINES 24 +#define VGACOLS 80 + +static int current_ypos = VGALINES, current_xpos = 0; + +void +early_printk (const char *str, size_t len) +{ + char c; + int i, k, j; + + while (len-- > 0) { + c = *str++; + if (current_ypos >= VGALINES) { + /* scroll 1 line up */ + for (k = 1, j = 0; k < VGALINES; k++, j++) { + for (i = 0; i < VGACOLS; i++) { + writew(readw(VGABASE + 2*(VGACOLS*k + i)), + VGABASE + 2*(VGACOLS*j + i)); + } + } + for (i = 0; i < VGACOLS; i++) { + writew(0x720, VGABASE + 2*(VGACOLS*j + i)); + } + current_ypos = VGALINES-1; + } + if (c == '\n') { + current_xpos = 0; + current_ypos++; + } else if (c != '\r') { + writew(((0x7 << 8) | (unsigned short) c), + VGABASE + 2*(VGACOLS*current_ypos + current_xpos++)); + if (current_xpos >= VGACOLS) { + current_xpos = 0; + current_ypos++; + } + } + } +} + +#endif /* CONFIG_IA64_EARLY_PRINTK */ diff -Nru a/kernel/sched.c b/kernel/sched.c --- a/kernel/sched.c Mon Apr 15 15:07:56 2002 +++ b/kernel/sched.c Mon Apr 15 15:07:57 2002 @@ -672,7 +672,7 @@ task_t *p = current; if (p == rq->idle) { - if (local_bh_count(cpu) || local_irq_count(cpu) > 1) + if (really_local_bh_count() || really_local_irq_count() > 1) kstat.per_cpu_system[cpu] += system; #if CONFIG_SMP idle_tick(); diff -Nru a/kernel/softirq.c b/kernel/softirq.c --- a/kernel/softirq.c Mon Apr 15 15:07:56 2002 +++ b/kernel/softirq.c Mon Apr 15 15:07:56 2002 @@ -40,7 +40,10 @@ - Bottom halves: globally serialized, grr... */ +/* No separate irq_stat for ia64, it is part of PSA */ +#if !defined(CONFIG_IA64) irq_cpustat_t irq_stat[NR_CPUS]; +#endif /* CONFIG_IA64 */ static struct softirq_action softirq_vec[32] __cacheline_aligned_in_smp; @@ -60,7 +63,6 @@ asmlinkage void do_softirq() { - int cpu = smp_processor_id(); __u32 pending; long flags; __u32 mask; @@ -70,7 +72,7 @@ local_irq_save(flags); - pending = softirq_pending(cpu); + pending = local_softirq_pending(); if (pending) { struct softirq_action *h; @@ -79,7 +81,7 @@ local_bh_disable(); restart: /* Reset the pending bitmask before enabling irqs */ - softirq_pending(cpu) = 0; + local_softirq_pending() = 0; local_irq_enable(); @@ -94,7 +96,7 @@ local_irq_disable(); - pending = softirq_pending(cpu); + pending = local_softirq_pending(); if (pending & mask) { mask &= ~pending; goto restart; @@ -102,7 +104,7 @@ __local_bh_enable(); if (pending) - wakeup_softirqd(cpu); + wakeup_softirqd(smp_processor_id()); } local_irq_restore(flags); @@ -124,7 +126,7 @@ * Otherwise we wake up ksoftirqd to make sure we * schedule the softirq soon. */ - if (!(local_irq_count(cpu) | local_bh_count(cpu))) + if (!(irq_count(cpu) | bh_count(cpu))) wakeup_softirqd(cpu); } @@ -287,18 +289,16 @@ static void bh_action(unsigned long nr) { - int cpu = smp_processor_id(); - if (!spin_trylock(&global_bh_lock)) goto resched; - if (!hardirq_trylock(cpu)) + if (!local_hardirq_trylock()) goto resched_unlock; if (bh_base[nr]) bh_base[nr](); - hardirq_endlock(cpu); + local_hardirq_endlock(); spin_unlock(&global_bh_lock); return; @@ -377,15 +377,15 @@ __set_current_state(TASK_INTERRUPTIBLE); mb(); - ksoftirqd_task(cpu) = current; + local_ksoftirqd_task() = current; for (;;) { - if (!softirq_pending(cpu)) + if (!local_softirq_pending()) schedule(); __set_current_state(TASK_RUNNING); - while (softirq_pending(cpu)) { + while (local_softirq_pending()) { do_softirq(); cond_resched(); } diff -Nru a/kernel/sys.c b/kernel/sys.c --- a/kernel/sys.c Mon Apr 15 15:07:56 2002 +++ b/kernel/sys.c Mon Apr 15 15:07:56 2002 @@ -21,6 +21,19 @@ #include #include +#ifndef SET_UNALIGN_CTL +# define SET_UNALIGN_CTL (-EINVAL) +#endif +#ifndef GET_UNALIGN_CTL +# define GET_UNALIGN_CTL (-EINVAL) +#endif +#ifndef SET_FPEMU_CTL +# define SET_FPEMU_CTL (-EINVAL) +#endif +#ifndef GET_FPEMU_CTL +# define GET_FPEMU_CTL (-EINVAL) +#endif + /* * this is where the system-wide overflow UID and GID are defined, for * architectures that now have 32-bit UID/GID but didn't in the past @@ -1240,21 +1253,12 @@ } current->mm->dumpable = arg2; break; - case PR_SET_UNALIGN: -#ifdef SET_UNALIGN_CTL - error = SET_UNALIGN_CTL(current, arg2); -#else - error = -EINVAL; -#endif - break; - case PR_GET_UNALIGN: -#ifdef GET_UNALIGN_CTL - error = GET_UNALIGN_CTL(current, arg2); -#else - error = -EINVAL; -#endif - break; + case PR_SET_UNALIGN: error = SET_UNALIGN_CTL(current, arg2); break; + case PR_GET_UNALIGN: error = GET_UNALIGN_CTL(current, arg2); break; + + case PR_SET_FPEMU: error = SET_FPEMU_CTL(current, arg2); break; + case PR_GET_FPEMU: error = GET_FPEMU_CTL(current, arg2); break; case PR_GET_KEEPCAPS: if (current->keep_capabilities) diff -Nru a/kernel/time.c b/kernel/time.c --- a/kernel/time.c Mon Apr 15 15:07:56 2002 +++ b/kernel/time.c Mon Apr 15 15:07:56 2002 @@ -39,6 +39,7 @@ /* The xtime_lock is not only serializing the xtime read/writes but it's also serializing all accesses to the global NTP variables now. */ extern rwlock_t xtime_lock; +extern unsigned long last_time_offset; #if !defined(__alpha__) && !defined(__ia64__) @@ -82,6 +83,7 @@ write_lock_irq(&xtime_lock); xtime.tv_sec = value; xtime.tv_usec = 0; + last_time_offset = 0; time_adjust = 0; /* stop active adjtime() */ time_status |= STA_UNSYNC; time_maxerror = NTP_PHASE_LIMIT; @@ -127,6 +129,7 @@ { write_lock_irq(&xtime_lock); xtime.tv_sec += sys_tz.tz_minuteswest * 60; + last_time_offset = 0; write_unlock_irq(&xtime_lock); } @@ -381,6 +384,7 @@ txc->calcnt = pps_calcnt; txc->errcnt = pps_errcnt; txc->stbcnt = pps_stbcnt; + last_time_offset = 0; write_unlock_irq(&xtime_lock); do_gettimeofday(&txc->time); return(result); diff -Nru a/kernel/timer.c b/kernel/timer.c --- a/kernel/timer.c Mon Apr 15 15:07:57 2002 +++ b/kernel/timer.c Mon Apr 15 15:07:57 2002 @@ -635,6 +635,7 @@ * This spinlock protect us from races in SMP while playing with xtime. -arca */ rwlock_t xtime_lock = RW_LOCK_UNLOCKED; +unsigned long last_time_offset; static inline void update_times(void) { @@ -652,6 +653,7 @@ wall_jiffies += ticks; update_wall_time(ticks); } + last_time_offset = 0; write_unlock_irq(&xtime_lock); calc_load(ticks); } @@ -664,7 +666,7 @@ void do_timer(struct pt_regs *regs) { - (*(unsigned long *)&jiffies)++; + (*(volatile unsigned long *)&jiffies)++; #ifndef CONFIG_SMP /* SMP process accounting uses the local APIC timer */ @@ -885,7 +887,7 @@ if (t.tv_nsec >= 1000000000L || t.tv_nsec < 0 || t.tv_sec < 0) return -EINVAL; - +#if !defined(__ia64__) if (t.tv_sec == 0 && t.tv_nsec <= 2000000L && current->policy != SCHED_OTHER) { @@ -898,6 +900,7 @@ udelay((t.tv_nsec + 999) / 1000); return 0; } +#endif expire = timespec_to_jiffies(&t) + (t.tv_sec || t.tv_nsec); diff -Nru a/lib/brlock.c b/lib/brlock.c --- a/lib/brlock.c Mon Apr 15 15:07:56 2002 +++ b/lib/brlock.c Mon Apr 15 15:07:56 2002 @@ -18,7 +18,7 @@ #ifdef __BRLOCK_USE_ATOMICS brlock_read_lock_t __brlock_array[NR_CPUS][__BR_IDX_MAX] = - { [0 ... NR_CPUS-1] = { [0 ... __BR_IDX_MAX-1] = RW_LOCK_UNLOCKED } }; + { [0 ... NR_CPUS-1] = { [0 ... __BR_IDX_MAX-1] = {0, 0} } }; void __br_write_lock (enum brlock_indices idx) { diff -Nru a/mm/filemap.c b/mm/filemap.c --- a/mm/filemap.c Mon Apr 15 15:07:57 2002 +++ b/mm/filemap.c Mon Apr 15 15:07:57 2002 @@ -31,6 +31,7 @@ #include #include #include +#include #include @@ -1328,6 +1329,9 @@ return written; } +#ifndef __NR_sendfile64 +inline +#endif static ssize_t common_sendfile(int out_fd, int in_fd, loff_t *offset, size_t count, loff_t max) { ssize_t retval; @@ -1422,12 +1426,13 @@ pos = off; ppos = &pos; } - ret = common_sendfile(out_fd, in_fd, ppos, count, MAX_NON_LFS); + ret = common_sendfile(out_fd, in_fd, ppos, count, MAX_OFF_T); if (offset && put_user(pos, offset)) ret = -EFAULT; return ret; } +#ifdef __NR_sendfile64 asmlinkage ssize_t sys_sendfile64(int out_fd, int in_fd, loff_t *offset, size_t count) { loff_t pos, *ppos = NULL; @@ -1442,6 +1447,7 @@ ret = -EFAULT; return ret; } +#endif static ssize_t do_readahead(struct file *file, unsigned long index, unsigned long nr) { diff -Nru a/mm/memory.c b/mm/memory.c --- a/mm/memory.c Mon Apr 15 15:07:57 2002 +++ b/mm/memory.c Mon Apr 15 15:07:57 2002 @@ -120,7 +120,7 @@ pmd = pmd_offset(dir, 0); pgd_clear(dir); for (j = 0; j < PTRS_PER_PMD ; j++) { - prefetchw(pmd+j+(PREFETCH_STRIDE/16)); + prefetchw(pmd + j + PREFETCH_STRIDE/sizeof(*pmd)); free_one_pmd(pmd+j); } pmd_free(pmd); diff -Nru a/sound/oss/cs4281/cs4281m.c b/sound/oss/cs4281/cs4281m.c --- a/sound/oss/cs4281/cs4281m.c Mon Apr 15 15:07:57 2002 +++ b/sound/oss/cs4281/cs4281m.c Mon Apr 15 15:07:57 2002 @@ -1943,8 +1943,8 @@ len -= x; } CS_DBGOUT(CS_WAVE_WRITE, 4, printk(KERN_INFO - "cs4281: clear_advance(): memset %d at 0x%.8x for %d size \n", - (unsigned)c, (unsigned)((char *) buf) + bptr, len)); + "cs4281: clear_advance(): memset %d at %p for %d size \n", + (unsigned)c, ((char *) buf) + bptr, len)); memset(((char *) buf) + bptr, c, len); } @@ -1979,9 +1979,8 @@ wake_up(&s->dma_adc.wait); } CS_DBGOUT(CS_PARMS, 8, printk(KERN_INFO - "cs4281: cs4281_update_ptr(): s=0x%.8x hwptr=%d total_bytes=%d count=%d \n", - (unsigned)s, s->dma_adc.hwptr, - s->dma_adc.total_bytes, s->dma_adc.count)); + "cs4281: cs4281_update_ptr(): s=%p hwptr=%d total_bytes=%d count=%d \n", + s, s->dma_adc.hwptr, s->dma_adc.total_bytes, s->dma_adc.count)); } // update DAC pointer // @@ -2013,11 +2012,10 @@ // Continue to play silence until the _release. // CS_DBGOUT(CS_WAVE_WRITE, 6, printk(KERN_INFO - "cs4281: cs4281_update_ptr(): memset %d at 0x%.8x for %d size \n", + "cs4281: cs4281_update_ptr(): memset %d at %p for %d size \n", (unsigned)(s->prop_dac.fmt & (AFMT_U8 | AFMT_U16_LE)) ? 0x80 : 0, - (unsigned)s->dma_dac.rawbuf, - s->dma_dac.dmasize)); + s->dma_dac.rawbuf, s->dma_dac.dmasize)); memset(s->dma_dac.rawbuf, (s->prop_dac. fmt & (AFMT_U8 | AFMT_U16_LE)) ? @@ -2048,9 +2046,8 @@ } } CS_DBGOUT(CS_PARMS, 8, printk(KERN_INFO - "cs4281: cs4281_update_ptr(): s=0x%.8x hwptr=%d total_bytes=%d count=%d \n", - (unsigned) s, s->dma_dac.hwptr, - s->dma_dac.total_bytes, s->dma_dac.count)); + "cs4281: cs4281_update_ptr(): s=%p hwptr=%d total_bytes=%d count=%d \n", + s, s->dma_dac.hwptr, s->dma_dac.total_bytes, s->dma_dac.count)); } } @@ -2181,8 +2178,7 @@ VALIDATE_STATE(s); CS_DBGOUT(CS_FUNCTION, 4, printk(KERN_INFO - "cs4281: mixer_ioctl(): s=0x%.8x cmd=0x%.8x\n", - (unsigned) s, cmd)); + "cs4281: mixer_ioctl(): s=%p cmd=0x%.8x\n", s, cmd)); #if CSDEBUG cs_printioctl(cmd); #endif @@ -2747,9 +2743,8 @@ CS_DBGOUT(CS_FUNCTION, 2, printk(KERN_INFO "cs4281: CopySamples()+ ")); CS_DBGOUT(CS_WAVE_READ, 8, printk(KERN_INFO - " dst=0x%x src=0x%x count=%d iChannels=%d fmt=0x%x\n", - (unsigned) dst, (unsigned) src, (unsigned) count, - (unsigned) iChannels, (unsigned) fmt)); + " dst=%p src=%p count=%d iChannels=%d fmt=0x%x\n", + dst, src, (unsigned) count, (unsigned) iChannels, (unsigned) fmt)); // Gershwin does format conversion in hardware so normally // we don't do any host based coversion. The data formatter @@ -2829,9 +2824,9 @@ void *src = hwsrc; //default to the standard destination buffer addr CS_DBGOUT(CS_FUNCTION, 6, printk(KERN_INFO - "cs_copy_to_user()+ fmt=0x%x fmt_o=0x%x cnt=%d dest=0x%.8x\n", + "cs_copy_to_user()+ fmt=0x%x fmt_o=0x%x cnt=%d dest=%p\n", s->prop_adc.fmt, s->prop_adc.fmt_original, - (unsigned) cnt, (unsigned) dest)); + (unsigned) cnt, dest)); if (cnt > s->dma_adc.dmasize) { cnt = s->dma_adc.dmasize; @@ -2876,7 +2871,7 @@ unsigned copied = 0; CS_DBGOUT(CS_FUNCTION | CS_WAVE_READ, 2, - printk(KERN_INFO "cs4281: cs4281_read()+ %d \n", count)); + printk(KERN_INFO "cs4281: cs4281_read()+ %Zu \n", count)); VALIDATE_STATE(s); if (ppos != &file->f_pos) @@ -2899,7 +2894,7 @@ // while (count > 0) { CS_DBGOUT(CS_WAVE_READ, 8, printk(KERN_INFO - "_read() count>0 count=%d .count=%d .swptr=%d .hwptr=%d \n", + "_read() count>0 count=%Zu .count=%d .swptr=%d .hwptr=%d \n", count, s->dma_adc.count, s->dma_adc.swptr, s->dma_adc.hwptr)); spin_lock_irqsave(&s->lock, flags); @@ -2956,11 +2951,10 @@ // the "cnt" is the number of bytes to read. CS_DBGOUT(CS_WAVE_READ, 2, printk(KERN_INFO - "_read() copy_to cnt=%d count=%d ", cnt, count)); + "_read() copy_to cnt=%d count=%Zu ", cnt, count)); CS_DBGOUT(CS_WAVE_READ, 8, printk(KERN_INFO - " .dmasize=%d .count=%d buffer=0x%.8x ret=%d\n", - s->dma_adc.dmasize, s->dma_adc.count, - (unsigned) buffer, ret)); + " .dmasize=%d .count=%d buffer=%p ret=%Zd\n", + s->dma_adc.dmasize, s->dma_adc.count, buffer, ret)); if (cs_copy_to_user (s, buffer, s->dma_adc.rawbuf + swptr, cnt, &copied)) @@ -2976,7 +2970,7 @@ start_adc(s); } CS_DBGOUT(CS_FUNCTION | CS_WAVE_READ, 2, - printk(KERN_INFO "cs4281: cs4281_read()- %d\n", ret)); + printk(KERN_INFO "cs4281: cs4281_read()- %Zd\n", ret)); return ret; } @@ -2992,7 +2986,7 @@ int cnt; CS_DBGOUT(CS_FUNCTION | CS_WAVE_WRITE, 2, - printk(KERN_INFO "cs4281: cs4281_write()+ count=%d\n", + printk(KERN_INFO "cs4281: cs4281_write()+ count=%Zu\n", count)); VALIDATE_STATE(s); @@ -3048,7 +3042,7 @@ start_dac(s); } CS_DBGOUT(CS_FUNCTION | CS_WAVE_WRITE, 2, - printk(KERN_INFO "cs4281: cs4281_write()- %d\n", ret)); + printk(KERN_INFO "cs4281: cs4281_write()- %Zd\n", ret)); return ret; } @@ -3169,8 +3163,7 @@ int val, mapped, ret; CS_DBGOUT(CS_FUNCTION, 4, printk(KERN_INFO - "cs4281: cs4281_ioctl(): file=0x%.8x cmd=0x%.8x\n", - (unsigned) file, cmd)); + "cs4281: cs4281_ioctl(): file=%p cmd=0x%.8x\n", file, cmd)); #if CSDEBUG cs_printioctl(cmd); #endif @@ -3596,8 +3589,8 @@ (struct cs4281_state *) file->private_data; CS_DBGOUT(CS_FUNCTION | CS_RELEASE, 2, printk(KERN_INFO - "cs4281: cs4281_release(): inode=0x%.8x file=0x%.8x f_mode=%d\n", - (unsigned) inode, (unsigned) file, file->f_mode)); + "cs4281: cs4281_release(): inode=%p file=%p f_mode=%d\n", + inode, file, file->f_mode)); VALIDATE_STATE(s); @@ -3631,8 +3624,8 @@ struct list_head *entry; CS_DBGOUT(CS_FUNCTION | CS_OPEN, 2, printk(KERN_INFO - "cs4281: cs4281_open(): inode=0x%.8x file=0x%.8x f_mode=0x%x\n", - (unsigned) inode, (unsigned) file, file->f_mode)); + "cs4281: cs4281_open(): inode=%p file=%p f_mode=0x%x\n", + inode, file, file->f_mode)); list_for_each(entry, &cs4281_devs) { @@ -4341,10 +4334,8 @@ CS_DBGOUT(CS_INIT, 2, printk(KERN_INFO - "cs4281: probe() BA0=0x%.8x BA1=0x%.8x pBA0=0x%.8x pBA1=0x%.8x \n", - (unsigned) temp1, (unsigned) temp2, - (unsigned) s->pBA0, (unsigned) s->pBA1)); - + "cs4281: probe() BA0=0x%.8x BA1=0x%.8x pBA0=%p pBA1=%p \n", + (unsigned) temp1, (unsigned) temp2, s->pBA0, s->pBA1)); CS_DBGOUT(CS_INIT, 2, printk(KERN_INFO "cs4281: probe() pBA0phys=0x%.8x pBA1phys=0x%.8x\n", @@ -4391,15 +4382,13 @@ if (pmdev) { CS_DBGOUT(CS_INIT | CS_PM, 4, printk(KERN_INFO - "cs4281: probe() pm_register() succeeded (0x%x).\n", - (unsigned)pmdev)); + "cs4281: probe() pm_register() succeeded (%p).\n", pmdev)); pmdev->data = s; } else { CS_DBGOUT(CS_INIT | CS_PM | CS_ERROR, 0, printk(KERN_INFO - "cs4281: probe() pm_register() failed (0x%x).\n", - (unsigned)pmdev)); + "cs4281: probe() pm_register() failed (%p).\n", pmdev)); s->pm.flags |= CS4281_PM_NOT_REGISTERED; } #endif diff -Nru a/sound/oss/cs4281/cs4281pm-24.c b/sound/oss/cs4281/cs4281pm-24.c --- a/sound/oss/cs4281/cs4281pm-24.c Mon Apr 15 15:07:57 2002 +++ b/sound/oss/cs4281/cs4281pm-24.c Mon Apr 15 15:07:57 2002 @@ -38,16 +38,16 @@ #define CS4281_SUSPEND_TBL cs4281_suspend_tbl #define CS4281_RESUME_TBL cs4281_resume_tbl */ -#define CS4281_SUSPEND_TBL cs4281_null -#define CS4281_RESUME_TBL cs4281_null +#define CS4281_SUSPEND_TBL (int (*) (struct pci_dev *, u32)) cs4281_null +#define CS4281_RESUME_TBL (int (*) (struct pci_dev *)) cs4281_null int cs4281_pm_callback(struct pm_dev *dev, pm_request_t rqst, void *data) { struct cs4281_state *state; CS_DBGOUT(CS_PM, 2, printk(KERN_INFO - "cs4281: cs4281_pm_callback dev=0x%x rqst=0x%x state=%d\n", - (unsigned)dev,(unsigned)rqst,(unsigned)data)); + "cs4281: cs4281_pm_callback dev=%p rqst=0x%x state=%p\n", + dev,(unsigned)rqst,data)); state = (struct cs4281_state *) dev->data; if (state) { switch(rqst) { @@ -78,7 +78,7 @@ } #else /* CS4281_PM */ -#define CS4281_SUSPEND_TBL cs4281_null -#define CS4281_RESUME_TBL cs4281_null +#define CS4281_SUSPEND_TBL (int (*) (struct pci_dev *, u32)) cs4281_null +#define CS4281_RESUME_TBL (int (*) (struct pci_dev *)) cs4281_null #endif /* CS4281_PM */